rm9200 lowevel_init: don't touch reserved/readonly registers
For some reason the AT91rm9200 lowlevel init writes to a bunch of
reserved or read-only addresses. All the boards seem to define the
value-to-be-written values as zero ... but they shouldn't actually
be writing *anything* there.
No documented erratum justifies these accesses. It looks like maybe
some pre-release BDI-2000 setup code has been carried along by cargo
cult programming since at least late 2004 (per GIT history).
Here's a patch disabling what seems to be bogosity. Tested on a
csb337; there were no behavioral changes.
Signed-off-by: David Brownell <david-b@pacbell.net>
on RM9200ek
Tested-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
diff --git a/cpu/arm920t/at91rm9200/lowlevel_init.S b/cpu/arm920t/at91rm9200/lowlevel_init.S
index 0913284..d8bb960 100644
--- a/cpu/arm920t/at91rm9200/lowlevel_init.S
+++ b/cpu/arm920t/at91rm9200/lowlevel_init.S
@@ -81,6 +81,7 @@
bne 0b
/* delay - this is all done by guess */
ldr r0, =0x00010000
+ /* (vs reading PMC_SR for LOCKA, LOCKB ... or MOSCS earlier) */
1:
subs r0, r0, #1
bhi 1b
@@ -108,16 +109,6 @@
.ltorg
SMRDATA:
- .word AT91C_MC_PUIA
- .word CONFIG_SYS_MC_PUIA_VAL
- .word AT91C_MC_PUP
- .word CONFIG_SYS_MC_PUP_VAL
- .word AT91C_MC_PUER
- .word CONFIG_SYS_MC_PUER_VAL
- .word AT91C_MC_ASR
- .word CONFIG_SYS_MC_ASR_VAL
- .word AT91C_MC_AASR
- .word CONFIG_SYS_MC_AASR_VAL
.word AT91C_EBI_CFGR
.word CONFIG_SYS_EBI_CFGR_VAL
.word AT91C_SMC_CSR0
@@ -128,8 +119,7 @@
.word CONFIG_SYS_PLLBR_VAL
.word AT91C_MCKR
.word CONFIG_SYS_MCKR_VAL
- /* SMRDATA is 80 bytes long */
- /* here there's a delay of 100 */
+ /* here there's a delay */
SMRDATA1:
.word AT91C_PIOC_ASR
.word CONFIG_SYS_PIOC_ASR_VAL