Merge patch series "Move framebuffer reservation for SPL to RAM end"
Devarsh Thakkar <devarsht@ti.com> says:
Move video memory reservation for SPL at end of RAM so that it does
not interefere with reservations for next stage so that the next stage
need not have holes in between for passed regions and instead it can
maintain continuity in reservations.
Also catch the bloblist before starting reservations to avoid the same
problem.
While at it, also fill missing fields in video handoff struct before
passing it to next stage.
This is as per discussions at :
For moving SPL framebuffer reservation at end of RAM:
https://lore.kernel.org/all/CAPnjgZ3xSoe_G3yrqwuAvoiVjUfZ+YQgkOR0ZTVXGT9VK8TwJg@mail.gmail.com/
For filling missing video handoff fields :
https://lore.kernel.org/all/CAPnjgZ1Hs0rNf0JDirp6YPsOQ5=QqQSP9g9qRwLoOASUV8a4cw@mail.gmail.com/
diff --git a/.azure-pipelines.yml b/.azure-pipelines.yml
index b9d6aa9..e264678 100644
--- a/.azure-pipelines.yml
+++ b/.azure-pipelines.yml
@@ -2,7 +2,7 @@
windows_vm: windows-2019
ubuntu_vm: ubuntu-22.04
macos_vm: macOS-12
- ci_runner_image: trini/u-boot-gitlab-ci-runner:jammy-20230804-25Aug2023
+ ci_runner_image: trini/u-boot-gitlab-ci-runner:jammy-20240111-17Jan2024
# Add '-u 0' options for Azure pipelines, otherwise we get "permission
# denied" error when it tries to "useradd -m -u 1001 vsts_azpcontainer",
# since our $(ci_runner_image) user is not root.
diff --git a/.get_maintainer.conf b/.get_maintainer.conf
index df595f5..f916cfb 100644
--- a/.get_maintainer.conf
+++ b/.get_maintainer.conf
@@ -1 +1 @@
---find-maintainer-files --maintainer-path=.
+--find-maintainer-files --git --maintainer-path=.
diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index fbf99f0..278a2e2 100644
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -10,7 +10,7 @@
# Grab our configured image. The source for this is found
# in the u-boot tree at tools/docker/Dockerfile
-image: ${MIRROR_DOCKER}/trini/u-boot-gitlab-ci-runner:jammy-20230804-25Aug2023
+image: ${MIRROR_DOCKER}/trini/u-boot-gitlab-ci-runner:jammy-20240111-17Jan2024
# We run some tests in different order, to catch some failures quicker.
stages:
diff --git a/MAINTAINERS b/MAINTAINERS
index 7c1cb2d..da477a4 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -53,6 +53,7 @@
ACPI:
M: Simon Glass <sjg@chromium.org>
S: Maintained
+F: board/emulation/configs/acpi.config
F: cmd/acpi.c
F: lib/acpi/
@@ -60,8 +61,8 @@
M: Igor Opaniuk <igor.opaniuk@gmail.com>
R: Sam Protsenko <semen.protsenko@linaro.org>
S: Maintained
+F: boot/android_ab.c
F: cmd/ab_select.c
-F: common/android_ab.c
F: doc/android/ab.rst
F: include/android_ab.h
F: test/py/tests/test_android/test_ab.py
@@ -117,7 +118,7 @@
APPLE M1 SOC SUPPORT
M: Mark Kettenis <kettenis@openbsd.org>
S: Maintained
-F: arch/arm/include/asm/arch-m1/
+F: arch/arm/include/asm/arch-apple/
F: arch/arm/mach-apple/
F: configs/apple_m1_defconfig
F: drivers/iommu/apple_dart.c
@@ -411,6 +412,8 @@
F: drivers/net/mtk_eth.c
F: drivers/net/mtk_eth.h
F: drivers/reset/reset-mediatek.c
+F: include/dt-bindings/clock/mediatek,*
+F: include/dt-bindings/power/mediatek,*
F: tools/mtk_image.c
F: tools/mtk_image.h
F: tools/mtk_nand_headers.c
@@ -572,9 +575,12 @@
R: Sumit Garg <sumit.garg@linaro.org>
S: Maintained
F: arch/arm/mach-snapdragon/
+F: drivers/button/button-qcom-pmic.c
+F: drivers/clk/qcom/
F: drivers/gpio/msm_gpio.c
F: drivers/mmc/msm_sdhci.c
F: drivers/phy/msm8916-usbh-phy.c
+F: drivers/pinctrl/qcom/
F: drivers/serial/serial_msm.c
F: drivers/serial/serial_msm_geni.c
F: drivers/smem/msm_smem.c
@@ -667,11 +673,15 @@
F: tools/sunxi*
ARM TEGRA
-M: Tom Warren <twarren@nvidia.com>
+M: Thierry Reding <treding@nvidia.com>
+M: Svyatoslav Ryhel <clamor95@gmail.com>
S: Maintained
T: git https://source.denx.de/u-boot/custodians/u-boot-tegra.git
-F: arch/arm/mach-tegra/
+F: arch/arm/dts/tegra*
F: arch/arm/include/asm/arch-tegra*/
+F: arch/arm/mach-tegra/
+F: drivers/*/tegra*
+F: drivers/*/tegra*/
ARM TI
M: Tom Rini <trini@konsulko.com>
@@ -687,6 +697,7 @@
F: arch/arm/include/asm/ti-common/
F: board/ti/
F: drivers/dma/ti*
+F: drivers/dma/ti*/
F: drivers/firmware/ti_sci.*
F: drivers/gpio/omap_gpio.c
F: drivers/memory/ti-aemif.c
@@ -698,6 +709,7 @@
F: drivers/phy/phy-ti-am654.c
F: drivers/phy/ti-pipe3-phy.c
F: drivers/ram/k3*
+F: drivers/ram/k3*/
F: drivers/remoteproc/ipu_rproc.c
F: drivers/remoteproc/k3_system_controller.c
F: drivers/remoteproc/pruc_rpoc.c
@@ -976,7 +988,7 @@
M: Simon Glass <sjg@chromium.org>
M: Heinrich Schuchardt <xypron.glpk@gmx.de>
S: Maintained
-W: https://u-boot.readthedocs.io/en/latest/develop/uefi/u-boot_on_efi.html
+W: https://docs.u-boot.org/en/latest/develop/uefi/u-boot_on_efi.html
F: board/efi/efi-x86_app
F: configs/efi-x86_app*
F: doc/develop/uefi/u-boot_on_efi.rst
@@ -1026,8 +1038,10 @@
M: Joe Hershberger <joe.hershberger@ni.com>
S: Maintained
F: env/
+F: include/env/
F: include/env*
F: test/env/
+F: tools/env/
F: tools/env*
F: tools/mkenvimage.c
@@ -1525,7 +1539,6 @@
F: test/py/tests/test_stackprotector.py
TARGET_BCMNS3
-M: Bharat Gooty <bharat.gooty@broadcom.com>
M: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
S: Maintained
F: board/broadcom/bcmns3/
@@ -1548,6 +1561,11 @@
S: Maintained
F: drivers/video/tda19988.c
+TI LP5562 LED DRIVER
+M: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
+S: Supported
+F: drivers/led/led_lp5562.c
+
TI SYSTEM SECURITY
M: Andrew F. Davis <afd@ti.com>
S: Supported
diff --git a/Makefile b/Makefile
index ffeb722..7a3209b 100644
--- a/Makefile
+++ b/Makefile
@@ -3,7 +3,7 @@
VERSION = 2024
PATCHLEVEL = 01
SUBLEVEL =
-EXTRAVERSION = -rc3
+EXTRAVERSION =
NAME =
# *DOCUMENTATION*
@@ -750,6 +750,7 @@
ifeq ($(CONFIG_STACKPROTECTOR),y)
KBUILD_CFLAGS += $(call cc-option,-fstack-protector-strong)
+KBUILD_CFLAGS += $(call cc-option,-mstack-protector-guard=global)
CFLAGS_EFI += $(call cc-option,-fno-stack-protector)
else
KBUILD_CFLAGS += $(call cc-option,-fno-stack-protector)
@@ -1348,6 +1349,7 @@
$(foreach f,$(BINMAN_INDIRS),-I $(f)) \
-a atf-bl31-path=${BL31} \
-a tee-os-path=${TEE} \
+ -a ti-dm-path=${TI_DM} \
-a opensbi-path=${OPENSBI} \
-a default-dt=$(default_dt) \
-a scp-path=$(SCP) \
@@ -2194,6 +2196,8 @@
@find $(if $(KBUILD_EXTMOD), $(KBUILD_EXTMOD), .) $(RCS_FIND_IGNORE) \
\( -name '*.[oas]' -o -name '*.ko' -o -name '.*.cmd' \
-o -name '*.ko.*' -o -name '*.su' -o -name '*.pyc' \
+ -o -name '*.dtb' -o -name '*.dtbo' \
+ -o -name '*.dtb.S' -o -name '*.dtbo.S' \
-o -name '.*.d' -o -name '.*.tmp' -o -name '*.mod.c' \
-o -name '*.lex.c' -o -name '*.tab.[ch]' \
-o -name '*.asn1.[ch]' \
diff --git a/README b/README
index 00d4227..b89768f 100644
--- a/README
+++ b/README
@@ -300,13 +300,6 @@
different from COUNTER_FREQUENCY, and can only be determined
at run time.
-- Tegra SoC options:
- CONFIG_TEGRA_SUPPORT_NON_SECURE
-
- Support executing U-Boot in non-secure (NS) mode. Certain
- impossible actions will be skipped if the CPU is in NS mode,
- such as ARM architectural timer initialization.
-
- Linux Kernel Interface:
CONFIG_OF_LIBFDT
@@ -1247,9 +1240,6 @@
Configuration Settings:
-----------------------
-- MEM_SUPPORT_64BIT_DATA: Defined automatically if compiled as 64-bit.
- Optionally it can be defined to support 64-bit memory commands.
-
- CONFIG_SYS_LONGHELP: Defined when you want long help messages included;
undefine this when you're short of memory.
@@ -1544,16 +1534,26 @@
globally (CONFIG_CMD_MEMORY).
- CONFIG_SPL_BUILD
- Set when the currently-running compilation is for an artifact
- that will end up in the SPL (as opposed to the TPL or U-Boot
- proper). Code that needs stage-specific behavior should check
- this.
+ Set when the currently running compilation is for an artifact
+ that will end up in one of the 'xPL' builds, i.e. SPL, TPL or
+ VPL. Code that needs phase-specific behaviour can check this,
+ or (where possible) use spl_phase() instead.
+
+ Note that CONFIG_SPL_BUILD *is* always defined when either
+ of CONFIG_TPL_BUILD / CONFIG_VPL_BUILD is defined. This can be
+ counter-intuitive and should perhaps be changed.
- CONFIG_TPL_BUILD
- Set when the currently-running compilation is for an artifact
- that will end up in the TPL (as opposed to the SPL or U-Boot
- proper). Code that needs stage-specific behavior should check
- this.
+ Set when the currently running compilation is for an artifact
+ that will end up in the TPL build (as opposed to SPL, VPL or
+ U-Boot proper). Code that needs phase-specific behaviour can
+ check this, or (where possible) use spl_phase() instead.
+
+- CONFIG_VPL_BUILD
+ Set when the currently running compilation is for an artifact
+ that will end up in the VPL build (as opposed to the SPL, TPL
+ or U-Boot proper). Code that needs phase-specific behaviour can
+ check this, or (where possible) use spl_phase() instead.
- CONFIG_ARCH_MAP_SYSMEM
Generally U-Boot (and in particular the md command) uses
@@ -2649,5 +2649,5 @@
The U-Boot projects depends on contributions from the user community.
If you want to participate, please, have a look at the 'General'
-section of https://u-boot.readthedocs.io/en/latest/develop/index.html
+section of https://docs.u-boot.org/en/latest/develop/index.html
where we describe coding standards and the patch submission process.
diff --git a/arch/Kconfig b/arch/Kconfig
index 2e0528d..b6fb9e9 100644
--- a/arch/Kconfig
+++ b/arch/Kconfig
@@ -108,6 +108,7 @@
config RISCV
bool "RISC-V architecture"
select CREATE_ARCH_SYMLINK
+ select SUPPORT_ACPI
select SUPPORT_OF_CONTROL
select OF_CONTROL
select DM
@@ -148,6 +149,7 @@
select GZIP_COMPRESSED
select IO_TRACE
select LZO
+ select MTD
select OF_BOARD_SETUP
select PCI_ENDPOINT
select SPI
@@ -253,6 +255,7 @@
imply DM_RTC
imply SCSI
imply DM_SERIAL
+ imply MTD
imply DM_SPI
imply DM_SPI_FLASH
imply DM_USB
diff --git a/arch/arc/include/asm/arc-bcr.h b/arch/arc/include/asm/arc-bcr.h
index 823906d..a6c972b 100644
--- a/arch/arc/include/asm/arc-bcr.h
+++ b/arch/arc/include/asm/arc-bcr.h
@@ -13,8 +13,6 @@
#define __ARC_BCR_H
#ifndef __ASSEMBLY__
-#include <config.h>
-
union bcr_di_cache {
struct {
#ifdef CONFIG_CPU_BIG_ENDIAN
diff --git a/arch/arc/include/asm/arcregs.h b/arch/arc/include/asm/arcregs.h
index a9f54f6..273fb8e 100644
--- a/arch/arc/include/asm/arcregs.h
+++ b/arch/arc/include/asm/arcregs.h
@@ -7,7 +7,6 @@
#define _ASM_ARC_ARCREGS_H
#include <asm/cache.h>
-#include <config.h>
/*
* ARC architecture has additional address space - auxiliary registers.
diff --git a/arch/arc/include/asm/cache.h b/arch/arc/include/asm/cache.h
index 74cff71..65dff42 100644
--- a/arch/arc/include/asm/cache.h
+++ b/arch/arc/include/asm/cache.h
@@ -6,8 +6,6 @@
#ifndef __ASM_ARC_CACHE_H
#define __ASM_ARC_CACHE_H
-#include <config.h>
-
/*
* As of today we may handle any L1 cache line length right in software.
* For that essentially cache line length is a variable not constant.
diff --git a/arch/arc/lib/bootm.c b/arch/arc/lib/bootm.c
index 44ec586..b143392 100644
--- a/arch/arc/lib/bootm.c
+++ b/arch/arc/lib/bootm.c
@@ -3,6 +3,7 @@
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*/
+#include <bootm.h>
#include <bootstage.h>
#include <env.h>
#include <image.h>
@@ -78,8 +79,10 @@
board_jump_and_run(kernel_entry, r0, 0, r2);
}
-int do_bootm_linux(int flag, int argc, char *argv[], struct bootm_headers *images)
+int do_bootm_linux(int flag, struct bootm_info *bmi)
{
+ struct bootm_headers *images = bmi->images;
+
/* No need for those on ARC */
if ((flag & BOOTM_STATE_OS_BD_T) || (flag & BOOTM_STATE_OS_CMDLINE))
return -1;
diff --git a/arch/arc/lib/cpu.c b/arch/arc/lib/cpu.c
index 803dfd4..5939504 100644
--- a/arch/arc/lib/cpu.c
+++ b/arch/arc/lib/cpu.c
@@ -3,6 +3,7 @@
* Copyright (C) 2013-2014, 2018 Synopsys, Inc. All rights reserved.
*/
+#include <config.h>
#include <clock_legacy.h>
#include <init.h>
#include <malloc.h>
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 1fd7aac..59e4d4d 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -79,6 +79,15 @@
depends on SPL
bool
+config SPL_USE_SEPARATE_FAULT_HANDLERS
+ bool "Use separate fault handlers instead of a single common one"
+ depends on !SPL_SYS_NO_VECTOR_TABLE && !ARM64 && !CPU_V7M
+ help
+ Instead of a common fault handler, generate a separate one for
+ undefined_instruction, software_interrupt, prefetch_abort etc.
+ This is for debugging purposes, when you want to set breakpoints
+ on them separately.
+
config LINUX_KERNEL_IMAGE_HEADER
depends on ARM64
bool
@@ -605,6 +614,7 @@
select DM_SPI
select DM_SPI_FLASH
select GPIO_EXTRA_HEADER
+ select MTD
select SPL_DM_SPI if SPL
select SPL_DM_SPI_FLASH if SPL
select SPL_TIMER if SPL
@@ -630,6 +640,7 @@
select DM_SPI_FLASH
select GPIO_EXTRA_HEADER
select PL01X_SERIAL
+ select MTD
select SPI
select SPI_FLASH
imply CMD_DM
@@ -715,6 +726,7 @@
select DM_SERIAL
select DM_SPI
select DM_SPI_FLASH
+ select MTD
select SPI
select GPIO_EXTRA_HEADER
imply SYS_THUMB_BUILD
@@ -767,6 +779,8 @@
select CLK
select SMEM
select OF_CONTROL
+ select CLK_QCOM_IPQ4019
+ select PINCTRL_QCOM_IPQ4019
imply CMD_DM
config ARCH_KEYSTONE
@@ -997,6 +1011,7 @@
select VIDEO
select IOMMU
select LINUX_KERNEL_IMAGE_HEADER
+ select MTD
select OF_BOARD_SETUP
select OF_CONTROL
select PCI
@@ -1067,6 +1082,7 @@
select DM
select DM_GPIO
select DM_SERIAL
+ select DM_RESET
select GPIO_EXTRA_HEADER
select MSM_SMEM
select OF_CONTROL
@@ -1108,6 +1124,7 @@
imply DM_SPI
imply DM_SPI_FLASH
imply FAT_WRITE
+ imply MTD
imply SPL
imply SPL_DM
imply SPL_DM_SPI
@@ -1131,7 +1148,7 @@
select DM_GPIO
select DM_I2C if I2C
select DM_SPI if SPI
- select DM_SPI_FLASH if SPI
+ select DM_SPI_FLASH if SPI && MTD
select DM_KEYBOARD
select DM_MMC if MMC
select DM_SERIAL
@@ -1143,14 +1160,14 @@
select SPL_SEPARATE_BSS if SPL
select SPL_STACK_R if SPL
select SPL_SYS_MALLOC_SIMPLE if SPL
- select SPL_SYS_THUMB_BUILD if !ARM64
+ select SPL_SYS_THUMB_BUILD if SPL && !ARM64
select SUNXI_GPIO
select SYS_NS16550
select SYS_THUMB_BUILD if !ARM64
select USB if DISTRO_DEFAULTS
select USB_KEYBOARD if DISTRO_DEFAULTS && USB_HOST
select USB_STORAGE if DISTRO_DEFAULTS && USB_HOST
- select SPL_USE_TINY_PRINTF
+ select SPL_USE_TINY_PRINTF if SPL
select USE_PREBOOT
select SYS_RELOC_GD_ENV_ADDR
imply BOARD_LATE_INIT
@@ -1249,6 +1266,7 @@
select DM_SPI
select DM_SPI_FLASH
select OF_CONTROL
+ select MTD
select SPI
select SPL_BOARD_INIT if SPL
select SPL_CLK if SPL
@@ -1287,6 +1305,7 @@
imply DM_MAILBOX
select DM_MMC if MMC
select DM_SERIAL
+ select MTD
select DM_SPI if SPI
select DM_SPI_FLASH if DM_SPI
imply FIRMWARE
@@ -1833,6 +1852,7 @@
select DM_GPIO
select DM_I2C
select DM_MMC
+ select MTD
select DM_SPI_FLASH
select DM_MDIO
select PCI
@@ -1974,8 +1994,10 @@
select DM_SERIAL
select DM_SPI
select DM_SPI_FLASH
+ select DM_USB_GADGET if USB_DWC3_GADGET
select ENABLE_ARM_SOC_BOOT0_HOOK
select OF_CONTROL
+ select MTD
select SPI
select SPL_DM if SPL
select SPL_DM_SPI if SPL
@@ -2059,6 +2081,12 @@
Support for pomelo platform.
It has 8GB Sdram, uart and pcie.
+config TARGET_PE2201
+ bool "Support Phytium PE2201 Platform"
+ select ARM64
+ help
+ Support for pe2201 platform.It has 2GB Sdram, uart and pcie.
+
config TARGET_PRESIDIO_ASIC
bool "Support Cortina Presidio ASIC Platform"
select ARM64
@@ -2335,6 +2363,7 @@
source "board/vscom/baltos/Kconfig"
source "board/phytium/durian/Kconfig"
source "board/phytium/pomelo/Kconfig"
+source "board/phytium/pe2201/Kconfig"
source "board/xen/xenguest_arm64/Kconfig"
source "arch/arm/Kconfig.debug"
diff --git a/arch/arm/cpu/arm926ejs/mxs/mxs.c b/arch/arm/cpu/arm926ejs/mxs/mxs.c
index 6d6166c..4f3cb63 100644
--- a/arch/arm/cpu/arm926ejs/mxs/mxs.c
+++ b/arch/arm/cpu/arm926ejs/mxs/mxs.c
@@ -71,6 +71,7 @@
* actually 0x20, this the associated <destination address>. Loading the PC
* register with an address performs a jump to that address.
*/
+noinline __attribute__((target("arm")))
void mx28_fixup_vt(uint32_t start_addr)
{
/* ldr pc, [pc, #0x18] */
@@ -85,6 +86,9 @@
/* cppcheck-suppress nullPointer */
vt[i + 8] = start_addr + (4 * i);
}
+
+ /* Make sure ARM core points to low vectors */
+ set_cr(get_cr() & ~CR_V);
}
#ifdef CONFIG_ARCH_MISC_INIT
diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
index 5e7bdb7..249f8de 100644
--- a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
+++ b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
@@ -17,6 +17,7 @@
#include <asm/arch/sys_proto.h>
#include <asm/gpio.h>
#include <asm/sections.h>
+#include <asm/system.h>
#include <linux/compiler.h>
#include "mxs_init.h"
@@ -93,7 +94,9 @@
return i;
}
-static void mxs_spl_fixup_vectors(void)
+static noinline
+__attribute__((target("arm")))
+void mxs_spl_fixup_vectors(void)
{
/*
* Copy our vector table to 0x0, since due to HAB, we cannot
@@ -104,6 +107,9 @@
/* cppcheck-suppress nullPointer */
memcpy(0x0, _start, 0x60);
+
+ /* Make sure ARM core points to low vectors */
+ set_cr(get_cr() & ~CR_V);
}
static void mxs_spl_console_init(void)
diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c b/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c
index 7ea029e..77bca7e 100644
--- a/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c
+++ b/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c
@@ -1177,8 +1177,9 @@
if (adjust_up && cfg->bo_irq) {
if (powered_by_linreg) {
- bo_int = readl(cfg->reg);
- clrbits_le32(cfg->reg, cfg->bo_enirq);
+ bo_int = readl(&power_regs->hw_power_ctrl);
+ clrbits_le32(&power_regs->hw_power_ctrl,
+ cfg->bo_enirq);
}
setbits_le32(cfg->reg, cfg->bo_offset_mask);
}
@@ -1220,7 +1221,8 @@
if (adjust_up && powered_by_linreg) {
writel(cfg->bo_irq, &power_regs->hw_power_ctrl_clr);
if (bo_int & cfg->bo_enirq)
- setbits_le32(cfg->reg, cfg->bo_enirq);
+ setbits_le32(&power_regs->hw_power_ctrl,
+ cfg->bo_enirq);
}
clrsetbits_le32(cfg->reg, cfg->bo_offset_mask,
diff --git a/arch/arm/cpu/u-boot.lds b/arch/arm/cpu/u-boot.lds
index fc4f63d..7724c93 100644
--- a/arch/arm/cpu/u-boot.lds
+++ b/arch/arm/cpu/u-boot.lds
@@ -14,9 +14,6 @@
ENTRY(_start)
SECTIONS
{
-#ifndef CONFIG_CMDLINE
- /DISCARD/ : { *(__u_boot_list_2_cmd_*) }
-#endif
#if defined(CONFIG_ARMV7_SECURE_BASE) && defined(CONFIG_ARMV7_NONSEC)
/*
* If CONFIG_ARMV7_SECURE_BASE is true, secure code will not
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index ea420db..50f35e3 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -126,6 +126,7 @@
dtb-$(CONFIG_ROCKCHIP_RK3328) += \
rk3328-evb.dtb \
rk3328-nanopi-r2c.dtb \
+ rk3328-nanopi-r2c-plus.dtb \
rk3328-nanopi-r2s.dtb \
rk3328-orangepi-r1-plus.dtb \
rk3328-orangepi-r1-plus-lts.dtb \
@@ -195,6 +196,7 @@
rk3588s-orangepi-5.dtb \
rk3588-orangepi-5-plus.dtb \
rk3588-quartzpro64.dtb \
+ rk3588-turing-rk1.dtb \
rk3588s-rock-5a.dtb \
rk3588-rock-5b.dtb
@@ -835,6 +837,8 @@
sun50i-h6-tanix-tx6-mini.dtb
dtb-$(CONFIG_MACH_SUN50I_H616) += \
sun50i-h616-orangepi-zero2.dtb \
+ sun50i-h618-orangepi-zero3.dtb \
+ sun50i-h618-transpeed-8k618-t.dtb \
sun50i-h616-x96-mate.dtb
dtb-$(CONFIG_MACH_SUN50I) += \
sun50i-a64-amarula-relic.dtb \
@@ -1074,6 +1078,8 @@
imx8mm-kontron-bl-osm-s.dtb \
imx8mm-mx8menlo.dtb \
imx8mm-phg.dtb \
+ imx8mm-phyboard-polis-rdk.dtb \
+ imx8mm-phygate-tauri-l.dtb \
imx8mm-venice.dtb \
imx8mm-venice-gw71xx-0x.dtb \
imx8mm-venice-gw72xx-0x.dtb \
@@ -1084,7 +1090,6 @@
imx8mm-venice-gw7904.dtb \
imx8mm-venice-gw7905-0x.dtb \
imx8mm-verdin-wifi-dev.dtb \
- phycore-imx8mm.dtb \
imx8mn-bsh-smm-s2.dtb \
imx8mn-bsh-smm-s2pro.dtb \
imx8mn-ddr4-evk.dtb \
@@ -1104,6 +1109,7 @@
imx8mp-dhcom-som-overlay-eth1xfast.dtbo \
imx8mp-dhcom-som-overlay-eth2xfast.dtbo \
imx8mp-dhcom-pdk-overlay-eth2xfast.dtbo \
+ imx8mp-debix-model-a.dtb \
imx8mp-dhcom-pdk2.dtb \
imx8mp-dhcom-pdk3.dtb \
imx8mp-dhcom-pdk3-overlay-rev100.dtbo \
@@ -1123,7 +1129,8 @@
imx8mq-librem5-r4.dtb
dtb-$(CONFIG_ARCH_IMX9) += \
- imx93-11x11-evk.dtb
+ imx93-11x11-evk.dtb \
+ imx93-var-som-symphony.dtb
dtb-$(CONFIG_ARCH_IMXRT) += imxrt1050-evk.dtb \
imxrt1020-evk.dtb \
@@ -1357,10 +1364,10 @@
dtb-$(CONFIG_ARCH_STI) += stih410-b2260.dtb
-dtb-$(CONFIG_STM32MP13x) += \
+dtb-$(CONFIG_STM32MP13X) += \
stm32mp135f-dk.dtb
-dtb-$(CONFIG_STM32MP15x) += \
+dtb-$(CONFIG_STM32MP15X) += \
stm32mp157a-dk1.dtb \
stm32mp157a-dk1-scmi.dtb \
stm32mp157a-icore-stm32mp1-ctouch2.dtb \
@@ -1418,7 +1425,9 @@
k3-am625-beagleplay.dtb \
k3-am625-r5-beagleplay.dtb \
k3-am625-verdin-wifi-dev.dtb \
- k3-am625-verdin-r5.dtb
+ k3-am625-verdin-r5.dtb \
+ k3-am625-phyboard-lyra-rdk.dtb \
+ k3-am625-r5-phycore-som-2gb.dtb
dtb-$(CONFIG_SOC_K3_AM62A7) += k3-am62a7-sk.dtb \
k3-am62a7-r5-sk.dtb
@@ -1474,6 +1483,7 @@
dtb-$(CONFIG_TARGET_DURIAN) += phytium-durian.dtb
dtb-$(CONFIG_TARGET_POMELO) += phytium-pomelo.dtb
+dtb-$(CONFIG_TARGET_PE2201) += phytium-pe2201.dtb
dtb-$(CONFIG_TARGET_PRESIDIO_ASIC) += ca-presidio-engboard.dtb
@@ -1515,6 +1525,8 @@
# Add any required device tree compiler flags here
DTC_FLAGS += -a 0x8
+DTC_FLAGS_imx8mp-dhcom-pdk3-overlay-rev100 += -Wno-avoid_default_addr_size -Wno-reg_format
+
PHONY += dtbs
dtbs: $(addprefix $(obj)/, $(dtb-y))
@:
diff --git a/arch/arm/dts/armada-3720-eDPU-u-boot.dtsi b/arch/arm/dts/armada-3720-eDPU-u-boot.dtsi
index cb02b70..c3d450d 100644
--- a/arch/arm/dts/armada-3720-eDPU-u-boot.dtsi
+++ b/arch/arm/dts/armada-3720-eDPU-u-boot.dtsi
@@ -32,14 +32,17 @@
bootph-all;
};
-ð0 {
- /* G.hn does not work without additional configuration */
- status = "disabled";
-};
-
ð1 {
fixed-link {
speed = <1000>;
full-duplex;
};
};
+
+/*
+ * eDPU v2 has a MV88E6361 switch on the MDIO bus and U-boot is used
+ * to patch the Linux DTS if its found so enable MDIO by default.
+ */
+&mdio {
+ status = "okay";
+};
diff --git a/arch/arm/dts/armada-3720-eDPU.dts b/arch/arm/dts/armada-3720-eDPU.dts
index 57fc698..d6d37a1 100644
--- a/arch/arm/dts/armada-3720-eDPU.dts
+++ b/arch/arm/dts/armada-3720-eDPU.dts
@@ -12,3 +12,50 @@
ð0 {
phy-mode = "2500base-x";
};
+
+/*
+ * External MV88E6361 switch is only available on v2 of the board.
+ * U-Boot will enable the MDIO bus and switch nodes.
+ */
+&mdio {
+ status = "disabled";
+ pinctrl-names = "default";
+ pinctrl-0 = <&smi_pins>;
+
+ /* Actual device is MV88E6361 */
+ switch: switch@0 {
+ compatible = "marvell,mv88e6190";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ label = "cpu";
+ phy-mode = "2500base-x";
+ managed = "in-band-status";
+ ethernet = <ð0>;
+ };
+
+ port@9 {
+ reg = <9>;
+ label = "downlink";
+ phy-mode = "2500base-x";
+ managed = "in-band-status";
+ };
+
+ port@a {
+ reg = <10>;
+ label = "uplink";
+ phy-mode = "2500base-x";
+ managed = "in-band-status";
+ sfp = <&sfp_eth1>;
+ };
+ };
+ };
+};
diff --git a/arch/arm/dts/dragonboard410c-uboot.dtsi b/arch/arm/dts/dragonboard410c-uboot.dtsi
index 3b0bd0e..cec64bf 100644
--- a/arch/arm/dts/dragonboard410c-uboot.dtsi
+++ b/arch/arm/dts/dragonboard410c-uboot.dtsi
@@ -42,14 +42,3 @@
gpios = <&pm8916_gpios 3 0>;
};
};
-
-
-&pm8916_pon {
- key_vol_down {
- gpios = <&pm8916_pon 1 0>;
- };
-
- key_power {
- gpios = <&pm8916_pon 0 0>;
- };
-};
diff --git a/arch/arm/dts/dragonboard410c.dts b/arch/arm/dts/dragonboard410c.dts
index 9230dd3..6a4e3cc 100644
--- a/arch/arm/dts/dragonboard410c.dts
+++ b/arch/arm/dts/dragonboard410c.dts
@@ -147,20 +147,31 @@
#address-cells = <0x1>;
#size-cells = <0x1>;
- pm8916_pon: pm8916_pon@800 {
- compatible = "qcom,pm8916-pwrkey";
- reg = <0x800 0x96>;
- #gpio-cells = <2>;
- gpio-controller;
+ pon@800 {
+ compatible = "qcom,pm8916-pon";
+ reg = <0x800 0x100>;
+ mode-bootloader = <0x2>;
+ mode-recovery = <0x1>;
+
+ pwrkey {
+ compatible = "qcom,pm8941-pwrkey";
+ debounce = <15625>;
+ bias-pull-up;
+ };
+
+ pm8916_resin: resin {
+ compatible = "qcom,pm8941-resin";
+ debounce = <15625>;
+ bias-pull-up;
+ };
};
pm8916_gpios: pm8916_gpios@c000 {
compatible = "qcom,pm8916-gpio";
reg = <0xc000 0x400>;
gpio-controller;
- gpio-count = <4>;
+ gpio-ranges = <&pm8916_gpios 0 0 4>;
#gpio-cells = <2>;
- gpio-bank-name="pmic";
};
};
diff --git a/arch/arm/dts/dragonboard820c-uboot.dtsi b/arch/arm/dts/dragonboard820c-uboot.dtsi
index 457728a..d93c7c1 100644
--- a/arch/arm/dts/dragonboard820c-uboot.dtsi
+++ b/arch/arm/dts/dragonboard820c-uboot.dtsi
@@ -30,15 +30,3 @@
};
};
};
-
-&pm8994_pon {
- key_vol_down {
- gpios = <&pm8994_pon 1 0>;
- label = "key_vol_down";
- };
-
- key_power {
- gpios = <&pm8994_pon 0 0>;
- label = "key_power";
- };
-};
diff --git a/arch/arm/dts/dragonboard820c.dts b/arch/arm/dts/dragonboard820c.dts
index ad201d4..146a0af 100644
--- a/arch/arm/dts/dragonboard820c.dts
+++ b/arch/arm/dts/dragonboard820c.dts
@@ -109,21 +109,31 @@
#address-cells = <0x1>;
#size-cells = <0x1>;
- pm8994_pon: pm8994_pon@800 {
- compatible = "qcom,pm8994-pwrkey";
- reg = <0x800 0x96>;
- #gpio-cells = <2>;
- gpio-controller;
- gpio-bank-name="pm8994_key.";
+ pm8994_pon: pon@800 {
+ compatible = "qcom,pm8916-pon";
+ reg = <0x800 0x100>;
+ mode-bootloader = <0x2>;
+ mode-recovery = <0x1>;
+
+ pwrkey {
+ compatible = "qcom,pm8941-pwrkey";
+ debounce = <15625>;
+ bias-pull-up;
+ };
+
+ pm8994_resin: resin {
+ compatible = "qcom,pm8941-resin";
+ debounce = <15625>;
+ bias-pull-up;
+ };
};
pm8994_gpios: pm8994_gpios@c000 {
compatible = "qcom,pm8994-gpio";
reg = <0xc000 0x400>;
gpio-controller;
- gpio-count = <24>;
+ gpio-ranges = <&pm8994_gpios 0 0 22>;
#gpio-cells = <2>;
- gpio-bank-name="pm8994.";
};
};
diff --git a/arch/arm/dts/dragonboard845c-uboot.dtsi b/arch/arm/dts/dragonboard845c-uboot.dtsi
index 7106db8..775f45c 100644
--- a/arch/arm/dts/dragonboard845c-uboot.dtsi
+++ b/arch/arm/dts/dragonboard845c-uboot.dtsi
@@ -19,19 +19,8 @@
bootph-all;
};
- pinctrl_north@3900000 {
+ pinctrl@3400000 {
bootph-all;
};
};
};
-
-&pm8998_pon {
- key_vol_down {
- gpios = <&pm8998_pon 1 0>;
- label = "key_vol_down";
- };
- key_power {
- gpios = <&pm8998_pon 0 0>;
- label = "key_power";
- };
-};
diff --git a/arch/arm/dts/dragonboard845c.dts b/arch/arm/dts/dragonboard845c.dts
index b4f057a..054f253 100644
--- a/arch/arm/dts/dragonboard845c.dts
+++ b/arch/arm/dts/dragonboard845c.dts
@@ -41,4 +41,8 @@
};
};
+&pm8998_resin {
+ status = "okay";
+};
+
#include "dragonboard845c-uboot.dtsi"
diff --git a/arch/arm/dts/fsl-imx8qm-apalis-u-boot.dtsi b/arch/arm/dts/fsl-imx8qm-apalis-u-boot.dtsi
index f2d6b18..c54a59e 100644
--- a/arch/arm/dts/fsl-imx8qm-apalis-u-boot.dtsi
+++ b/arch/arm/dts/fsl-imx8qm-apalis-u-boot.dtsi
@@ -93,6 +93,12 @@
&gpio4 {
bootph-some-ram;
+
+ usbh_en {
+ gpio-hog;
+ gpios = <4 GPIO_ACTIVE_HIGH>;
+ output-high;
+ };
};
&gpio5 {
diff --git a/arch/arm/dts/fsl-imx8qm-apalis.dts b/arch/arm/dts/fsl-imx8qm-apalis.dts
index bc7c75d..e089ddb 100644
--- a/arch/arm/dts/fsl-imx8qm-apalis.dts
+++ b/arch/arm/dts/fsl-imx8qm-apalis.dts
@@ -9,7 +9,6 @@
/memreserve/ 0x80000000 0x00020000;
#include "fsl-imx8qm.dtsi"
-#include "fsl-imx8qm-apalis-u-boot.dtsi"
/ {
model = "Toradex Apalis iMX8";
diff --git a/arch/arm/dts/fsl-imx8qxp-colibri-u-boot.dtsi b/arch/arm/dts/fsl-imx8qxp-colibri-u-boot.dtsi
index a6af4e5..6ab6b1f 100644
--- a/arch/arm/dts/fsl-imx8qxp-colibri-u-boot.dtsi
+++ b/arch/arm/dts/fsl-imx8qxp-colibri-u-boot.dtsi
@@ -84,6 +84,21 @@
bootph-some-ram;
};
+&gpio_expander_43 {
+ usb-bypass-n-hog {
+ gpio-hog;
+ gpios = <5 GPIO_ACTIVE_LOW>;
+ line-name = "usb-bypass-n";
+ output-high;
+ };
+ usb-reset-n-hog {
+ gpio-hog;
+ gpios = <4 GPIO_ACTIVE_LOW>;
+ line-name = "usb-reset-n";
+ output-low;
+ };
+};
+
&gpio0 {
bootph-some-ram;
};
diff --git a/arch/arm/dts/fsl-imx8qxp-colibri.dts b/arch/arm/dts/fsl-imx8qxp-colibri.dts
index df992ac..b479921 100644
--- a/arch/arm/dts/fsl-imx8qxp-colibri.dts
+++ b/arch/arm/dts/fsl-imx8qxp-colibri.dts
@@ -6,7 +6,6 @@
/dts-v1/;
#include "fsl-imx8qxp.dtsi"
-#include "fsl-imx8qxp-colibri-u-boot.dtsi"
/ {
model = "Toradex Colibri iMX8X";
@@ -320,8 +319,6 @@
gpio-controller;
#gpio-cells = <2>;
reg = <0x43>;
- initial_io_dir = <0xff>;
- initial_output = <0x05>;
};
};
diff --git a/arch/arm/dts/imx6qdl-wandboard-u-boot.dtsi b/arch/arm/dts/imx6qdl-wandboard-u-boot.dtsi
index 46c4b3b..80921e8 100644
--- a/arch/arm/dts/imx6qdl-wandboard-u-boot.dtsi
+++ b/arch/arm/dts/imx6qdl-wandboard-u-boot.dtsi
@@ -6,4 +6,14 @@
aliases {
mmc0 = &usdhc3;
};
+
+ wdt-reboot {
+ compatible = "wdt-reboot";
+ wdt = <&wdog1>;
+ bootph-pre-ram;
+ };
+};
+
+&wdog1 {
+ bootph-pre-ram;
};
diff --git a/arch/arm/dts/imx7d-pico-pi-u-boot.dtsi b/arch/arm/dts/imx7d-pico-pi-u-boot.dtsi
index 843b458..3b5f14e 100644
--- a/arch/arm/dts/imx7d-pico-pi-u-boot.dtsi
+++ b/arch/arm/dts/imx7d-pico-pi-u-boot.dtsi
@@ -1,11 +1,18 @@
#include "imx7s-u-boot.dtsi"
/{
- aliases {
- mmc0 = &usdhc3;
- usb0 = &usbotg1;
- display0 = &lcdif;
- };
+ aliases {
+ mmc0 = &usdhc3;
+ mmc1 = &usdhc1;
+ usb0 = &usbotg1;
+ display0 = &lcdif;
+ };
+
+ wdt-reboot {
+ compatible = "wdt-reboot";
+ wdt = <&wdog1>;
+ bootph-pre-ram;
+ };
};
&usbotg1 {
@@ -45,6 +52,10 @@
};
};
+&wdog1 {
+ bootph-pre-ram;
+};
+
&iomuxc {
pinctrl_backlight: backlight {
fsl,pins = <
diff --git a/arch/arm/dts/imx7d-sdb-u-boot.dtsi b/arch/arm/dts/imx7d-sdb-u-boot.dtsi
index 71bfd80..eace17e 100644
--- a/arch/arm/dts/imx7d-sdb-u-boot.dtsi
+++ b/arch/arm/dts/imx7d-sdb-u-boot.dtsi
@@ -18,57 +18,6 @@
dr_mode = "peripheral";
};
-&usdhc1 {
- pinctrl-names = "default", "state_100mhz", "state_200mhz";
- pinctrl-0 = <&pinctrl_usdhc1>, <&pinctrl_usdhc1_gpio>;
- pinctrl-1 = <&pinctrl_usdhc1_100mhz>, <&pinctrl_usdhc1_gpio>;
- pinctrl-2 = <&pinctrl_usdhc1_200mhz>, <&pinctrl_usdhc1_gpio>;
-};
-
-&pinctrl_usdhc1 {
- fsl,pins = <
- MX7D_PAD_SD1_CMD__SD1_CMD 0x59
- MX7D_PAD_SD1_CLK__SD1_CLK 0x19
- MX7D_PAD_SD1_DATA0__SD1_DATA0 0x59
- MX7D_PAD_SD1_DATA1__SD1_DATA1 0x59
- MX7D_PAD_SD1_DATA2__SD1_DATA2 0x59
- MX7D_PAD_SD1_DATA3__SD1_DATA3 0x59
- >;
-};
-
-&iomuxc {
- pinctrl_usdhc1_gpio: usdhc1gpiogrp {
- fsl,pins = <
- MX7D_PAD_SD1_CD_B__GPIO5_IO0 0x59 /* CD */
- MX7D_PAD_SD1_WP__GPIO5_IO1 0x59 /* WP */
- MX7D_PAD_SD1_RESET_B__GPIO5_IO2 0x59 /* vmmc */
- MX7D_PAD_GPIO1_IO08__SD1_VSELECT 0x59 /* VSELECT */
- >;
- };
-
- pinctrl_usdhc1_100mhz: usdhc1100mhzgrp {
- fsl,pins = <
- MX7D_PAD_SD1_CMD__SD1_CMD 0x5a
- MX7D_PAD_SD1_CLK__SD1_CLK 0x1a
- MX7D_PAD_SD1_DATA0__SD1_DATA0 0x5a
- MX7D_PAD_SD1_DATA1__SD1_DATA1 0x5a
- MX7D_PAD_SD1_DATA2__SD1_DATA2 0x5a
- MX7D_PAD_SD1_DATA3__SD1_DATA3 0x5a
- >;
- };
-
- pinctrl_usdhc1_200mhz: usdhc1200mhzgrp {
- fsl,pins = <
- MX7D_PAD_SD1_CMD__SD1_CMD 0x5b
- MX7D_PAD_SD1_CLK__SD1_CLK 0x1b
- MX7D_PAD_SD1_DATA0__SD1_DATA0 0x5b
- MX7D_PAD_SD1_DATA1__SD1_DATA1 0x5b
- MX7D_PAD_SD1_DATA2__SD1_DATA2 0x5b
- MX7D_PAD_SD1_DATA3__SD1_DATA3 0x5b
- >;
- };
-};
-
&wdog1 {
bootph-pre-ram;
};
diff --git a/arch/arm/dts/imx7d-sdb.dts b/arch/arm/dts/imx7d-sdb.dts
index 78f4224..75f1cd1 100644
--- a/arch/arm/dts/imx7d-sdb.dts
+++ b/arch/arm/dts/imx7d-sdb.dts
@@ -24,14 +24,14 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_keys>;
- volume-up {
+ key-volume-up {
label = "Volume Up";
gpios = <&gpio5 11 GPIO_ACTIVE_LOW>;
linux,code = <KEY_VOLUMEUP>;
wakeup-source;
};
- volume-down {
+ key-volume-down {
label = "Volume Down";
gpios = <&gpio5 10 GPIO_ACTIVE_LOW>;
linux,code = <KEY_VOLUMEDOWN>;
@@ -39,12 +39,12 @@
};
};
- spi4 {
+ spi-4 {
compatible = "spi-gpio";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi4>;
- gpio-sck = <&gpio1 13 GPIO_ACTIVE_HIGH>;
- gpio-mosi = <&gpio1 9 GPIO_ACTIVE_HIGH>;
+ sck-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
+ mosi-gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
cs-gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
num-chipselects = <1>;
#address-cells = <1>;
@@ -60,6 +60,17 @@
};
};
+ reg_sd1_vmmc: regulator-sd1-vmmc {
+ compatible = "regulator-fixed";
+ regulator-name = "VDD_SD1";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ startup-delay-us = <200000>;
+ off-on-delay-us = <20000>;
+ };
+
reg_usb_otg1_vbus: regulator-usb-otg1-vbus {
compatible = "regulator-fixed";
regulator-name = "usb_otg1_vbus";
@@ -205,13 +216,8 @@
pinctrl-0 = <&pinctrl_tsc2046_pendown>;
interrupt-parent = <&gpio2>;
interrupts = <29 0>;
- pendown-gpio = <&gpio2 29 GPIO_ACTIVE_HIGH>;
- ti,x-min = /bits/ 16 <0>;
- ti,x-max = /bits/ 16 <0>;
- ti,y-min = /bits/ 16 <0>;
- ti,y-max = /bits/ 16 <0>;
- ti,pressure-max = /bits/ 16 <0>;
- ti,x-plate-ohms = /bits/ 16 <400>;
+ pendown-gpio = <&gpio2 29 GPIO_ACTIVE_LOW>;
+ touchscreen-max-pressure = <255>;
wakeup-source;
};
};
@@ -269,7 +275,7 @@
pinctrl-0 = <&pinctrl_i2c1>;
status = "okay";
- pmic: pfuze3000@8 {
+ pmic: pmic@8 {
compatible = "fsl,pfuze3000";
reg = <0x08>;
@@ -478,10 +484,13 @@
};
&usdhc1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_usdhc1>;
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
+ pinctrl-0 = <&pinctrl_usdhc1>, <&pinctrl_usdhc1_gpio>;
+ pinctrl-1 = <&pinctrl_usdhc1_100mhz>, <&pinctrl_usdhc1_gpio>;
+ pinctrl-2 = <&pinctrl_usdhc1_200mhz>, <&pinctrl_usdhc1_gpio>;
cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
wp-gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
+ vmmc-supply = <®_sd1_vmmc>;
wakeup-source;
keep-power-in-suspend;
status = "okay";
@@ -736,6 +745,15 @@
>;
};
+ pinctrl_usdhc1_gpio: usdhc1_gpiogrp {
+ fsl,pins = <
+ MX7D_PAD_SD1_CD_B__GPIO5_IO0 0x59 /* CD */
+ MX7D_PAD_SD1_WP__GPIO5_IO1 0x59 /* WP */
+ MX7D_PAD_SD1_RESET_B__GPIO5_IO2 0x59 /* vmmc */
+ MX7D_PAD_GPIO1_IO08__SD1_VSELECT 0x59 /* VSELECT */
+ >;
+ };
+
pinctrl_usdhc1: usdhc1grp {
fsl,pins = <
MX7D_PAD_SD1_CMD__SD1_CMD 0x59
@@ -744,9 +762,28 @@
MX7D_PAD_SD1_DATA1__SD1_DATA1 0x59
MX7D_PAD_SD1_DATA2__SD1_DATA2 0x59
MX7D_PAD_SD1_DATA3__SD1_DATA3 0x59
- MX7D_PAD_SD1_CD_B__GPIO5_IO0 0x59 /* CD */
- MX7D_PAD_SD1_WP__GPIO5_IO1 0x59 /* WP */
- MX7D_PAD_SD1_RESET_B__GPIO5_IO2 0x59 /* vmmc */
+ >;
+ };
+
+ pinctrl_usdhc1_100mhz: usdhc1grp_100mhz {
+ fsl,pins = <
+ MX7D_PAD_SD1_CMD__SD1_CMD 0x5a
+ MX7D_PAD_SD1_CLK__SD1_CLK 0x1a
+ MX7D_PAD_SD1_DATA0__SD1_DATA0 0x5a
+ MX7D_PAD_SD1_DATA1__SD1_DATA1 0x5a
+ MX7D_PAD_SD1_DATA2__SD1_DATA2 0x5a
+ MX7D_PAD_SD1_DATA3__SD1_DATA3 0x5a
+ >;
+ };
+
+ pinctrl_usdhc1_200mhz: usdhc1grp_200mhz {
+ fsl,pins = <
+ MX7D_PAD_SD1_CMD__SD1_CMD 0x5b
+ MX7D_PAD_SD1_CLK__SD1_CLK 0x1b
+ MX7D_PAD_SD1_DATA0__SD1_DATA0 0x5b
+ MX7D_PAD_SD1_DATA1__SD1_DATA1 0x5b
+ MX7D_PAD_SD1_DATA2__SD1_DATA2 0x5b
+ MX7D_PAD_SD1_DATA3__SD1_DATA3 0x5b
>;
};
diff --git a/arch/arm/dts/imx7s-warp-u-boot.dtsi b/arch/arm/dts/imx7s-warp-u-boot.dtsi
index 49b992d..4f44598 100644
--- a/arch/arm/dts/imx7s-warp-u-boot.dtsi
+++ b/arch/arm/dts/imx7s-warp-u-boot.dtsi
@@ -1,12 +1,12 @@
/ {
- aliases {
- mmc0 = &usdhc3;
- usb0 = &usbotg1;
- };
+ aliases {
+ mmc0 = &usdhc3;
+ usb0 = &usbotg1;
+ };
- chosen {
- stdout-path = &uart1;
- };
+ chosen {
+ stdout-path = &uart1;
+ };
};
&aips3 {
diff --git a/arch/arm/dts/imx8mm-data-modul-edm-sbc-u-boot.dtsi b/arch/arm/dts/imx8mm-data-modul-edm-sbc-u-boot.dtsi
index 144c42b..a235e08 100644
--- a/arch/arm/dts/imx8mm-data-modul-edm-sbc-u-boot.dtsi
+++ b/arch/arm/dts/imx8mm-data-modul-edm-sbc-u-boot.dtsi
@@ -77,10 +77,59 @@
&gpio2 {
bootph-pre-ram;
+
+ dsi-reset-hog {
+ bootph-pre-ram;
+ gpio-hog;
+ output-high;
+ gpios = <2 GPIO_ACTIVE_LOW>;
+ line-name = "DSI_RESET_1V8#";
+ };
+
+
+ dsi-irq-hog {
+ bootph-pre-ram;
+ gpio-hog;
+ input;
+ gpios = <3 GPIO_ACTIVE_LOW>;
+ line-name = "DSI_IRQ_1V8#";
+ };
+
+ graphics-prsnt-hog {
+ bootph-pre-ram;
+ gpio-hog;
+ input;
+ gpios = <7 GPIO_ACTIVE_LOW>;
+ line-name = "GRAPHICS_PRSNT_1V8#";
+ };
};
&gpio3 {
bootph-pre-ram;
+
+ bl-enable-hog {
+ bootph-pre-ram;
+ gpio-hog;
+ output-low;
+ gpios = <0 GPIO_ACTIVE_HIGH>;
+ line-name = "BL_ENABLE_1V8";
+ };
+
+ tft-enable-hog {
+ bootph-pre-ram;
+ gpio-hog;
+ output-low;
+ gpios = <6 GPIO_ACTIVE_HIGH>;
+ line-name = "TFT_ENABLE_1V8";
+ };
+
+ graphics-gpio0-hog {
+ bootph-pre-ram;
+ gpio-hog;
+ input;
+ gpios = <7 GPIO_ACTIVE_HIGH>;
+ line-name = "GRAPHICS_GPIO0_1V8";
+ };
};
&gpio4 {
diff --git a/arch/arm/dts/phycore-imx8mm-u-boot.dtsi b/arch/arm/dts/imx8mm-phyboard-polis-rdk-u-boot.dtsi
similarity index 100%
rename from arch/arm/dts/phycore-imx8mm-u-boot.dtsi
rename to arch/arm/dts/imx8mm-phyboard-polis-rdk-u-boot.dtsi
diff --git a/arch/arm/dts/imx8mm-phyboard-polis-rdk.dts b/arch/arm/dts/imx8mm-phyboard-polis-rdk.dts
new file mode 100644
index 0000000..03e7679
--- /dev/null
+++ b/arch/arm/dts/imx8mm-phyboard-polis-rdk.dts
@@ -0,0 +1,460 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2022 PHYTEC Messtechnik GmbH
+ * Author: Teresa Remmet <t.remmet@phytec.de>
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/leds/common.h>
+#include <dt-bindings/phy/phy-imx8-pcie.h>
+#include "imx8mm-phycore-som.dtsi"
+
+/ {
+ model = "PHYTEC phyBOARD-Polis-i.MX8MM RDK";
+ compatible = "phytec,imx8mm-phyboard-polis-rdk",
+ "phytec,imx8mm-phycore-som", "fsl,imx8mm";
+
+ chosen {
+ stdout-path = &uart3;
+ };
+
+ bt_osc_32k: bt-lp-clock {
+ compatible = "fixed-clock";
+ clock-frequency = <32768>;
+ clock-output-names = "bt_osc_32k";
+ #clock-cells = <0>;
+ };
+
+ can_osc_40m: can-clock {
+ compatible = "fixed-clock";
+ clock-frequency = <40000000>;
+ clock-output-names = "can_osc_40m";
+ #clock-cells = <0>;
+ };
+
+ fan {
+ compatible = "gpio-fan";
+ gpios = <&gpio4 8 GPIO_ACTIVE_HIGH>;
+ gpio-fan,speed-map = <0 0
+ 13000 1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_fan>;
+ #cooling-cells = <2>;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_leds>;
+
+ led-0 {
+ color = <LED_COLOR_ID_RED>;
+ function = LED_FUNCTION_DISK;
+ gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "mmc2";
+ };
+
+ led-1 {
+ color = <LED_COLOR_ID_BLUE>;
+ function = LED_FUNCTION_DISK;
+ gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "mmc1";
+ };
+
+ led-2 {
+ color = <LED_COLOR_ID_GREEN>;
+ function = LED_FUNCTION_CPU;
+ gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
+ usdhc1_pwrseq: pwr-seq {
+ compatible = "mmc-pwrseq-simple";
+ post-power-on-delay-ms = <100>;
+ power-off-delay-us = <60>;
+ reset-gpios = <&gpio2 7 GPIO_ACTIVE_LOW>;
+ };
+
+ reg_can_en: regulator-can-en {
+ compatible = "regulator-fixed";
+ gpio = <&gpio1 9 GPIO_ACTIVE_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_can_en>;
+ regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <3300000>;
+ regulator-name = "CAN_EN";
+ startup-delay-us = <20>;
+ };
+
+ reg_usb_otg1_vbus: regulator-usb-otg1 {
+ compatible = "regulator-fixed";
+ gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usbotg1pwrgrp>;
+ regulator-name = "usb_otg1_vbus";
+ regulator-max-microvolt = <5000000>;
+ regulator-min-microvolt = <5000000>;
+ };
+
+ reg_usdhc2_vmmc: regulator-usdhc2 {
+ compatible = "regulator-fixed";
+ gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ off-on-delay-us = <20000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
+ regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <3300000>;
+ regulator-name = "VSD_3V3";
+ };
+
+ reg_vcc_3v3: regulator-vcc-3v3 {
+ compatible = "regulator-fixed";
+ regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <3300000>;
+ regulator-name = "VCC_3V3";
+ };
+};
+
+/* SPI - CAN MCP251XFD */
+&ecspi1 {
+ cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ecspi1>;
+ status = "okay";
+
+ can0: can@0 {
+ compatible = "microchip,mcp251xfd";
+ clocks = <&can_osc_40m>;
+ interrupt-parent = <&gpio1>;
+ interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_can_int>;
+ reg = <0>;
+ spi-max-frequency = <20000000>;
+ xceiver-supply = <®_can_en>;
+ };
+};
+
+&gpio1 {
+ gpio-line-names = "nINT_ETHPHY", "LED_RED", "WDOG_INT", "X_RTC_INT",
+ "", "", "", "RESET_ETHPHY",
+ "CAN_nINT", "CAN_EN", "nENABLE_FLATLINK", "",
+ "USB_OTG_VBUS_EN", "", "LED_GREEN", "LED_BLUE";
+};
+
+&gpio2 {
+ gpio-line-names = "", "", "", "",
+ "", "", "BT_REG_ON", "WL_REG_ON",
+ "BT_DEV_WAKE", "BT_HOST_WAKE", "", "",
+ "X_SD2_CD_B", "", "", "",
+ "", "", "", "SD2_RESET_B";
+};
+
+&gpio4 {
+ gpio-line-names = "", "", "", "",
+ "", "", "", "",
+ "FAN", "miniPCIe_nPERST", "", "",
+ "COEX1", "COEX2";
+};
+
+&gpio5 {
+ gpio-line-names = "", "", "", "",
+ "", "", "", "",
+ "", "ECSPI1_SS0";
+};
+
+&i2c4 {
+ clock-frequency = <400000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c4>;
+};
+
+/* PCIe */
+&pcie0 {
+ assigned-clocks = <&clk IMX8MM_CLK_PCIE1_AUX>,
+ <&clk IMX8MM_CLK_PCIE1_CTRL>;
+ assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>,
+ <&clk IMX8MM_SYS_PLL2_250M>;
+ assigned-clock-rates = <10000000>, <250000000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pcie>;
+ reset-gpio = <&gpio4 9 GPIO_ACTIVE_LOW>;
+ status = "okay";
+};
+
+&pcie_phy {
+ clocks = <&clk IMX8MM_CLK_PCIE1_PHY>;
+ fsl,clkreq-unsupported;
+ fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_OUTPUT>;
+ fsl,tx-deemph-gen1 = <0x2d>;
+ fsl,tx-deemph-gen2 = <0xf>;
+ status = "okay";
+};
+
+&rv3028 {
+ trickle-resistor-ohms = <3000>;
+};
+
+&snvs_pwrkey {
+ status = "okay";
+};
+
+/* UART - RS232/RS485 */
+&uart1 {
+ assigned-clocks = <&clk IMX8MM_CLK_UART1>;
+ assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_80M>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart1>;
+ uart-has-rtscts;
+ status = "okay";
+};
+
+/* UART - Sterling-LWB Bluetooth */
+&uart2 {
+ assigned-clocks = <&clk IMX8MM_CLK_UART2>;
+ assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_80M>;
+ fsl,dte-mode;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart2_bt>;
+ uart-has-rtscts;
+ status = "okay";
+
+ bluetooth {
+ compatible = "brcm,bcm43438-bt";
+ clocks = <&bt_osc_32k>;
+ clock-names = "lpo";
+ device-wakeup-gpios = <&gpio2 8 GPIO_ACTIVE_HIGH>;
+ interrupt-names = "host-wakeup";
+ interrupt-parent = <&gpio2>;
+ interrupts = <9 IRQ_TYPE_EDGE_BOTH>;
+ max-speed = <2000000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_bt>;
+ shutdown-gpios = <&gpio2 6 GPIO_ACTIVE_HIGH>;
+ vddio-supply = <®_vcc_3v3>;
+ };
+};
+
+/* UART - console */
+&uart3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart3>;
+ status = "okay";
+};
+
+/* USB */
+&usbotg1 {
+ adp-disable;
+ dr_mode = "otg";
+ over-current-active-low;
+ samsung,picophy-pre-emp-curr-control = <3>;
+ samsung,picophy-dc-vol-level-adjust = <7>;
+ srp-disable;
+ vbus-supply = <®_usb_otg1_vbus>;
+ status = "okay";
+};
+
+&usbotg2 {
+ disable-over-current;
+ dr_mode = "host";
+ samsung,picophy-pre-emp-curr-control = <3>;
+ samsung,picophy-dc-vol-level-adjust = <7>;
+ status = "okay";
+};
+
+/* SDIO - Sterling-LWB Wifi */
+&usdhc1 {
+ assigned-clocks = <&clk IMX8MM_CLK_USDHC1>;
+ assigned-clock-rates = <200000000>;
+ bus-width = <4>;
+ mmc-pwrseq = <&usdhc1_pwrseq>;
+ non-removable;
+ no-1-8-v;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usdhc1>, <&pinctrl_wlan>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ brcmf: wifi@1 {
+ compatible = "brcm,bcm4329-fmac";
+ reg = <1>;
+ };
+};
+
+/* SD-Card */
+&usdhc2 {
+ assigned-clocks = <&clk IMX8MM_CLK_USDHC2>;
+ assigned-clock-rates = <200000000>;
+ bus-width = <4>;
+ cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
+ disable-wp;
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
+ pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
+ pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
+ pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
+ vmmc-supply = <®_usdhc2_vmmc>;
+ vqmmc-supply = <®_nvcc_sd2>;
+ status = "okay";
+};
+
+&iomuxc {
+ pinctrl_bt: btgrp {
+ fsl,pins = <
+ MX8MM_IOMUXC_SD1_DATA4_GPIO2_IO6 0x00
+ MX8MM_IOMUXC_SD1_DATA6_GPIO2_IO8 0x00
+ MX8MM_IOMUXC_SD1_DATA7_GPIO2_IO9 0x00
+ >;
+ };
+
+ pinctrl_can_en: can-engrp {
+ fsl,pins = <
+ MX8MM_IOMUXC_GPIO1_IO09_GPIO1_IO9 0x00
+ >;
+ };
+
+ pinctrl_can_int: can-intgrp {
+ fsl,pins = <
+ MX8MM_IOMUXC_GPIO1_IO08_GPIO1_IO8 0x00
+ >;
+ };
+
+ pinctrl_ecspi1: ecspi1grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_ECSPI1_MISO_ECSPI1_MISO 0x80
+ MX8MM_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI 0x80
+ MX8MM_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK 0x80
+ MX8MM_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x00
+ >;
+ };
+
+ pinctrl_fan: fan0grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_SAI1_RXD6_GPIO4_IO8 0x16
+ >;
+ };
+
+ pinctrl_i2c4: i2c4grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL 0x400001c2
+ MX8MM_IOMUXC_I2C4_SDA_I2C4_SDA 0x400001c2
+ >;
+ };
+
+ pinctrl_leds: leds1grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_GPIO1_IO01_GPIO1_IO1 0x16
+ MX8MM_IOMUXC_GPIO1_IO14_GPIO1_IO14 0x16
+ MX8MM_IOMUXC_GPIO1_IO15_GPIO1_IO15 0x16
+ >;
+ };
+
+ pinctrl_pcie: pciegrp {
+ fsl,pins = <
+ MX8MM_IOMUXC_SAI1_RXD7_GPIO4_IO9 0x00
+ MX8MM_IOMUXC_SAI1_TXD0_GPIO4_IO12 0x12
+ MX8MM_IOMUXC_SAI1_TXD7_GPIO4_IO19 0x12
+ >;
+ };
+
+ pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp {
+ fsl,pins = <
+ MX8MM_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x40
+ >;
+ };
+
+ pinctrl_uart1: uart1grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_SAI2_RXC_UART1_DCE_RX 0x00
+ MX8MM_IOMUXC_SAI2_RXD0_UART1_DCE_RTS_B 0x00
+ MX8MM_IOMUXC_SAI2_RXFS_UART1_DCE_TX 0x00
+ MX8MM_IOMUXC_SAI2_TXFS_UART1_DCE_CTS_B 0x00
+ >;
+ };
+
+ pinctrl_uart2_bt: uart2btgrp {
+ fsl,pins = <
+ MX8MM_IOMUXC_SAI3_RXC_UART2_DTE_RTS_B 0x00
+ MX8MM_IOMUXC_SAI3_RXD_UART2_DTE_CTS_B 0x00
+ MX8MM_IOMUXC_SAI3_TXC_UART2_DTE_RX 0x00
+ MX8MM_IOMUXC_SAI3_TXFS_UART2_DTE_TX 0x00
+ >;
+ };
+
+ pinctrl_uart3: uart3grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_UART3_RXD_UART3_DCE_RX 0x40
+ MX8MM_IOMUXC_UART3_TXD_UART3_DCE_TX 0x40
+ >;
+ };
+
+ pinctrl_usbotg1pwrgrp: usbotg1pwrgrp {
+ fsl,pins = <
+ MX8MM_IOMUXC_GPIO1_IO12_GPIO1_IO12 0x00
+ >;
+ };
+
+ pinctrl_usdhc1: usdhc1grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x182
+ MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0xc6
+ MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0xc6
+ MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0xc6
+ MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0xc6
+ MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0xc6
+ >;
+ };
+
+ pinctrl_usdhc2_gpio: usdhc2gpiogrp {
+ fsl,pins = <
+ MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x40
+ >;
+ };
+
+ pinctrl_usdhc2: usdhc2grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0
+ MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x192
+ MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d2
+ MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d2
+ MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d2
+ MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d2
+ MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d2
+ >;
+ };
+
+ pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
+ fsl,pins = <
+ MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0
+ MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x194
+ MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4
+ MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4
+ MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4
+ MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4
+ MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4
+ >;
+ };
+
+ pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
+ fsl,pins = <
+ MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0
+ MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x196
+ MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6
+ MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6
+ MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6
+ MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6
+ MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6
+ >;
+ };
+
+ pinctrl_wlan: wlangrp {
+ fsl,pins = <
+ MX8MM_IOMUXC_SD1_DATA5_GPIO2_IO7 0x00
+ >;
+ };
+};
diff --git a/arch/arm/dts/imx8mm-phycore-som.dtsi b/arch/arm/dts/imx8mm-phycore-som.dtsi
new file mode 100644
index 0000000..92616bc
--- /dev/null
+++ b/arch/arm/dts/imx8mm-phycore-som.dtsi
@@ -0,0 +1,440 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2022 PHYTEC Messtechnik GmbH
+ * Author: Teresa Remmet <t.remmet@phytec.de>
+ */
+
+#include "imx8mm.dtsi"
+#include <dt-bindings/net/ti-dp83867.h>
+
+/ {
+ model = "PHYTEC phyCORE-i.MX8MM";
+ compatible = "phytec,imx8mm-phycore-som", "fsl,imx8mm";
+
+ aliases {
+ rtc0 = &rv3028;
+ rtc1 = &snvs_rtc;
+ };
+
+ memory@40000000 {
+ device_type = "memory";
+ reg = <0x0 0x40000000 0 0x80000000>;
+ };
+
+ reg_vdd_3v3_s: regulator-vdd-3v3-s {
+ compatible = "regulator-fixed";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <3300000>;
+ regulator-name = "VDD_3V3_S";
+ };
+};
+
+&A53_0 {
+ cpu-supply = <®_vdd_arm>;
+};
+
+&A53_1 {
+ cpu-supply = <®_vdd_arm>;
+};
+
+&A53_2 {
+ cpu-supply = <®_vdd_arm>;
+};
+
+&A53_3 {
+ cpu-supply = <®_vdd_arm>;
+};
+
+&ddrc {
+ operating-points-v2 = <&ddrc_opp_table>;
+
+ ddrc_opp_table: opp-table {
+ compatible = "operating-points-v2";
+
+ opp-25000000 {
+ opp-hz = /bits/ 64 <25000000>;
+ };
+
+ opp-100000000 {
+ opp-hz = /bits/ 64 <100000000>;
+ };
+
+ opp-750000000 {
+ opp-hz = /bits/ 64 <750000000>;
+ };
+ };
+};
+
+/* Ethernet */
+&fec1 {
+ fsl,magic-packet;
+ phy-mode = "rgmii-id";
+ phy-handle = <ðphy0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_fec1>;
+ status = "okay";
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ethphy0: ethernet-phy@0 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ enet-phy-lane-no-swap;
+ ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
+ ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
+ ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
+ ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
+ reg = <0>;
+ reset-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
+ reset-assert-us = <1000>;
+ reset-deassert-us = <1000>;
+ };
+ };
+};
+
+/* SPI Flash */
+&flexspi {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_flexspi0>;
+ status = "okay";
+
+ som_flash: flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <80000000>;
+ spi-rx-bus-width = <4>;
+ spi-tx-bus-width = <1>;
+ };
+};
+
+&gpio1 {
+ gpio-line-names = "nINT_ETHPHY", "", "WDOG_INT", "X_RTC_INT",
+ "", "", "", "RESET_ETHPHY",
+ "", "", "nENABLE_FLATLINK";
+};
+
+/* I2C1 */
+&i2c1 {
+ clock-frequency = <400000>;
+ pinctrl-names = "default","gpio";
+ pinctrl-0 = <&pinctrl_i2c1>;
+ pinctrl-1 = <&pinctrl_i2c1_gpio>;
+ scl-gpios = <&gpio5 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ sda-gpios = <&gpio5 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ status = "okay";
+
+ pmic@8 {
+ compatible = "nxp,pf8121a";
+ reg = <0x08>;
+
+ regulators {
+ reg_nvcc_sd1: ldo1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <3300000>;
+ regulator-name = "NVCC_SD1 (LDO1)";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ reg_nvcc_sd2: ldo2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <1800000>;
+ regulator-name = "NVCC_SD2 (LDO2)";
+ vselect-en;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ reg_vcc_enet: ldo3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <2500000>;
+ regulator-min-microvolt = <1500000>;
+ regulator-name = "VCC_ENET_2V5 (LDO3)";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ reg_vdda_1v8: ldo4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <1800000>;
+ regulator-min-microvolt = <1500000>;
+ regulator-name = "VDDA_1V8 (LDO4)";
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-min-microvolt = <1500000>;
+ regulator-suspend-max-microvolt = <1500000>;
+ };
+ };
+
+ reg_soc_vdda_phy: buck1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <900000>;
+ regulator-min-microvolt = <400000>;
+ regulator-name = "VDD_SOC_VDDA_PHY_0P8 (BUCK1)";
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-min-microvolt = <400000>;
+ regulator-suspend-max-microvolt = <400000>;
+ };
+ };
+
+ reg_vdd_gpu_dram: buck2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <1000000>;
+ regulator-min-microvolt = <1000000>;
+ regulator-name = "VDD_GPU_DRAM (BUCK2)";
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-max-microvolt = <1000000>;
+ regulator-suspend-min-microvolt = <1000000>;
+ };
+ };
+
+ reg_vdd_gpu: buck3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <1000000>;
+ regulator-min-microvolt = <400000>;
+ regulator-name = "VDD_VPU (BUCK3)";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ reg_vdd_mipi: buck4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <1050000>;
+ regulator-min-microvolt = <900000>;
+ regulator-name = "VDD_MIPI_0P9 (BUCK4)";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ reg_vdd_arm: buck5 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <1050000>;
+ regulator-min-microvolt = <400000>;
+ regulator-name = "VDD_ARM (BUCK5)";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ reg_vdd_1v8: buck6 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <1800000>;
+ regulator-min-microvolt = <1800000>;
+ regulator-name = "VDD_1V8 (BUCK6)";
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-max-microvolt = <1800000>;
+ regulator-suspend-min-microvolt = <1800000>;
+ };
+ };
+
+ reg_nvcc_dram: buck7 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <1100000>;
+ regulator-min-microvolt = <1100000>;
+ regulator-name = "NVCC_DRAM_1P1V (BUCK7)";
+ };
+
+ reg_vsnvs: vsnvs {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <1800000>;
+ regulator-min-microvolt = <1800000>;
+ regulator-name = "NVCC_SNVS_1P8 (VSNVS)";
+ };
+ };
+ };
+
+ sn65dsi83: bridge@2d {
+ compatible = "ti,sn65dsi83";
+ enable-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_sn65dsi83>;
+ reg = <0x2d>;
+ status = "disabled";
+ };
+
+ eeprom@51 {
+ compatible = "atmel,24c32";
+ pagesize = <32>;
+ reg = <0x51>;
+ vcc-supply = <®_vdd_3v3_s>;
+ };
+
+ rv3028: rtc@52 {
+ compatible = "microcrystal,rv3028";
+ interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
+ interrupt-parent = <&gpio1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_rtc>;
+ reg = <0x52>;
+ };
+};
+
+/* EMMC */
+&usdhc3 {
+ assigned-clocks = <&clk IMX8MM_CLK_USDHC3_ROOT>;
+ assigned-clock-rates = <400000000>;
+ bus-width = <8>;
+ keep-power-in-suspend;
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
+ pinctrl-0 = <&pinctrl_usdhc3>;
+ pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
+ pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
+ non-removable;
+ status = "okay";
+};
+
+/* Watchdog */
+&wdog1 {
+ fsl,ext-reset-output;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_wdog>;
+ status = "okay";
+};
+
+&iomuxc {
+ pinctrl_fec1: fec1grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_ENET_MDC_ENET1_MDC 0x2
+ MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO 0x2
+ MX8MM_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x90
+ MX8MM_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x90
+ MX8MM_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x90
+ MX8MM_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x90
+ MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x90
+ MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x90
+ MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x16
+ MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x16
+ MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x16
+ MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x16
+ MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x16
+ MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x16
+ MX8MM_IOMUXC_GPIO1_IO07_GPIO1_IO7 0x10
+ >;
+ };
+
+ pinctrl_flexspi0: flexspi0grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_NAND_ALE_QSPI_A_SCLK 0x1c2
+ MX8MM_IOMUXC_NAND_CE0_B_QSPI_A_SS0_B 0x82
+ MX8MM_IOMUXC_NAND_DATA00_QSPI_A_DATA0 0x82
+ MX8MM_IOMUXC_NAND_DATA01_QSPI_A_DATA1 0x82
+ MX8MM_IOMUXC_NAND_DATA02_QSPI_A_DATA2 0x82
+ MX8MM_IOMUXC_NAND_DATA03_QSPI_A_DATA3 0x82
+ >;
+ };
+
+ pinctrl_i2c1: i2c1grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c0
+ MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL 0x400001c0
+ >;
+ };
+
+ pinctrl_i2c1_gpio: i2c1gpiogrp {
+ fsl,pins = <
+ MX8MM_IOMUXC_I2C1_SDA_GPIO5_IO15 0x1e0
+ MX8MM_IOMUXC_I2C1_SCL_GPIO5_IO14 0x1e0
+ >;
+ };
+
+ pinctrl_rtc: rtcgrp {
+ fsl,pins = <
+ MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x1c0
+ >;
+ };
+
+ pinctrl_sn65dsi83: sn65dsi83grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10 0x0
+ >;
+ };
+
+ pinctrl_usdhc3: usdhc3grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d0
+ MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x190
+ MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d0
+ MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d0
+ MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d0
+ MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d0
+ MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d0
+ MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d0
+ MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d0
+ MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x190
+ MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d0
+ >;
+ };
+
+ pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {
+ fsl,pins = <
+ MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d4
+ MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x194
+ MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d4
+ MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d4
+ MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d4
+ MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d4
+ MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d4
+ MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d4
+ MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d4
+ MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x194
+ MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d4
+ >;
+ };
+
+ pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {
+ fsl,pins = <
+ MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d6
+ MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x196
+ MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d6
+ MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d6
+ MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d6
+ MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d6
+ MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d6
+ MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d6
+ MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d6
+ MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x196
+ MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d6
+ >;
+ };
+
+ pinctrl_wdog: wdoggrp {
+ fsl,pins = <
+ MX8MM_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0x26
+ >;
+ };
+};
diff --git a/arch/arm/dts/imx8mm-phygate-tauri-l-u-boot.dtsi b/arch/arm/dts/imx8mm-phygate-tauri-l-u-boot.dtsi
new file mode 100644
index 0000000..f59f119
--- /dev/null
+++ b/arch/arm/dts/imx8mm-phygate-tauri-l-u-boot.dtsi
@@ -0,0 +1,70 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2024 PHYTEC Messtechnik GmbH
+ */
+
+#include "imx8mm-u-boot.dtsi"
+
+/ {
+ wdt-reboot {
+ compatible = "wdt-reboot";
+ wdt = <&wdog1>;
+ bootph-pre-ram;
+ };
+};
+
+&pinctrl_uart3 {
+ bootph-pre-ram;
+};
+
+&pinctrl_usdhc2_gpio {
+ bootph-pre-ram;
+};
+
+&pinctrl_usdhc2 {
+ bootph-pre-ram;
+};
+
+&pinctrl_usdhc3 {
+ bootph-pre-ram;
+};
+
+&pinctrl_wdog {
+ bootph-pre-ram;
+};
+
+&gpio1 {
+ bootph-pre-ram;
+};
+
+&gpio2 {
+ bootph-pre-ram;
+};
+
+&gpio3 {
+ bootph-pre-ram;
+};
+
+&gpio4 {
+ bootph-pre-ram;
+};
+
+&gpio5 {
+ bootph-pre-ram;
+};
+
+&uart3 {
+ bootph-pre-ram;
+};
+
+&usdhc2 {
+ bootph-pre-ram;
+};
+
+&usdhc3 {
+ bootph-pre-ram;
+};
+
+&wdog1 {
+ bootph-pre-ram;
+};
diff --git a/arch/arm/dts/imx8mm-phygate-tauri-l.dts b/arch/arm/dts/imx8mm-phygate-tauri-l.dts
new file mode 100644
index 0000000..968f475
--- /dev/null
+++ b/arch/arm/dts/imx8mm-phygate-tauri-l.dts
@@ -0,0 +1,489 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2023 PHYTEC Messtechnik GmbH
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/input/linux-event-codes.h>
+#include <dt-bindings/leds/common.h>
+#include "imx8mm-phycore-som.dtsi"
+
+/ {
+ model = "PHYTEC phyGATE-Tauri-L-iMX8MM";
+ compatible = "phytec,imx8mm-phygate-tauri-l",
+ "phytec,imx8mm-phycore-som", "fsl,imx8mm";
+
+ chosen {
+ stdout-path = &uart3;
+ };
+
+ can_osc_40m: clock-can {
+ compatible = "fixed-clock";
+ clock-frequency = <40000000>;
+ clock-output-names = "can_osc_40m";
+ #clock-cells = <0>;
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpiokeys>;
+
+ key {
+ gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
+ label = "KEY-A";
+ linux,code = <KEY_A>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_leds>;
+
+ led-1 {
+ color = <LED_COLOR_ID_RED>;
+ gpios = <&gpio5 5 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "none";
+ };
+
+ led-2 {
+ color = <LED_COLOR_ID_YELLOW>;
+ gpios = <&gpio4 30 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "none";
+ };
+ };
+
+ usdhc1_pwrseq: pwr-seq {
+ compatible = "mmc-pwrseq-simple";
+ post-power-on-delay-ms = <100>;
+ power-off-delay-us = <60>;
+ reset-gpios = <&gpio2 7 GPIO_ACTIVE_LOW>;
+ };
+
+ reg_usb_hub_vbus: regulator-hub-otg1 {
+ compatible = "regulator-fixed";
+ gpio = <&gpio1 14 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usbhubpwr>;
+ regulator-name = "usb_hub_vbus";
+ regulator-max-microvolt = <5000000>;
+ regulator-min-microvolt = <5000000>;
+ };
+
+ reg_usb_otg1_vbus: regulator-usb-otg1 {
+ compatible = "regulator-fixed";
+ gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usbotg1pwr>;
+ regulator-name = "usb_otg1_vbus";
+ regulator-max-microvolt = <5000000>;
+ regulator-min-microvolt = <5000000>;
+ };
+
+ reg_usdhc2_vmmc: regulator-usdhc2 {
+ compatible = "regulator-fixed";
+ gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ off-on-delay-us = <20000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
+ regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <3300000>;
+ regulator-name = "VSD_3V3";
+ };
+};
+
+&ecspi1 {
+ cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>,
+ <&gpio5 13 GPIO_ACTIVE_LOW>,
+ <&gpio5 2 GPIO_ACTIVE_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ecspi1 &pinctrl_ecspi1_cs>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ /* CAN MCP251XFD */
+ can0: can@0 {
+ compatible = "microchip,mcp251xfd";
+ reg = <0>;
+ clocks = <&can_osc_40m>;
+ interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
+ interrupt-parent = <&gpio1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_can_int>;
+ spi-max-frequency = <10000000>;
+ };
+
+ tpm: tpm@1 {
+ compatible = "tcg,tpm_tis-spi";
+ interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
+ interrupt-parent = <&gpio2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_tpm>;
+ reg = <1>;
+ spi-max-frequency = <38000000>;
+ };
+};
+
+&i2c2 {
+ clock-frequency = <400000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c2>;
+ pinctrl-1 = <&pinctrl_i2c2_gpio>;
+ scl-gpios = <&gpio5 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ sda-gpios = <&gpio5 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ status = "okay";
+
+ temp_sense0: temperature-sensor@49 {
+ compatible = "ti,tmp102";
+ reg = <0x49>;
+ interrupt-parent = <&gpio4>;
+ interrupts = <31 IRQ_TYPE_LEVEL_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_tempsense>;
+ #thermal-sensor-cells = <1>;
+ };
+};
+
+&i2c3 {
+ clock-frequency = <400000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c3>;
+ pinctrl-1 = <&pinctrl_i2c3_gpio>;
+ scl-gpios = <&gpio5 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ sda-gpios = <&gpio5 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ status = "okay";
+};
+
+&i2c4 {
+ clock-frequency = <400000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c4>;
+ pinctrl-1 = <&pinctrl_i2c4_gpio>;
+ scl-gpios = <&gpio5 20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ sda-gpios = <&gpio5 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ status = "okay";
+};
+
+/* PCIe */
+&pcie0 {
+ assigned-clocks = <&clk IMX8MM_CLK_PCIE1_AUX>,
+ <&clk IMX8MM_CLK_PCIE1_PHY>,
+ <&clk IMX8MM_CLK_PCIE1_CTRL>;
+ assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>,
+ <&clk IMX8MM_SYS_PLL2_100M>,
+ <&clk IMX8MM_SYS_PLL2_250M>;
+ assigned-clock-rates = <10000000>, <100000000>, <250000000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pcie>;
+ reset-gpio = <&gpio3 22 GPIO_ACTIVE_LOW>;
+ status = "okay";
+};
+
+&pwm1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pwm1>;
+ status = "okay";
+};
+
+&pwm3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pwm3>;
+ status = "okay";
+};
+
+&pwm4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pwm4>;
+ status = "okay";
+};
+
+/* RTC */
+&rv3028 {
+ trickle-resistor-ohms = <3000>;
+};
+
+&uart1 {
+ assigned-clocks = <&clk IMX8MM_CLK_UART1>;
+ assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_80M>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart1>;
+ status = "okay";
+};
+
+/* UART2 - RS232 */
+&uart2 {
+ assigned-clocks = <&clk IMX8MM_CLK_UART2>;
+ assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_80M>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart2>;
+ status = "okay";
+};
+
+/* UART - console */
+&uart3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart3>;
+ status = "okay";
+};
+
+/* USB */
+&usbotg1 {
+ adp-disable;
+ dr_mode = "otg";
+ over-current-active-low;
+ samsung,picophy-pre-emp-curr-control = <3>;
+ samsung,picophy-dc-vol-level-adjust = <7>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usbotg1>;
+ srp-disable;
+ vbus-supply = <®_usb_otg1_vbus>;
+ status = "okay";
+};
+
+&usbotg2 {
+ disable-over-current;
+ dr_mode = "host";
+ samsung,picophy-pre-emp-curr-control = <3>;
+ samsung,picophy-dc-vol-level-adjust = <7>;
+ vbus-supply = <®_usb_hub_vbus>;
+ status = "okay";
+};
+
+/* SD-Card */
+&usdhc2 {
+ assigned-clocks = <&clk IMX8MM_CLK_USDHC2>;
+ assigned-clock-rates = <200000000>;
+ bus-width = <4>;
+ cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
+ disable-wp;
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
+ pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
+ pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
+ pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
+ vmmc-supply = <®_usdhc2_vmmc>;
+ vqmmc-supply = <®_nvcc_sd2>;
+ status = "okay";
+};
+
+&iomuxc {
+ pinctrl_can_int: can-intgrp {
+ fsl,pins = <
+ MX8MM_IOMUXC_GPIO1_IO08_GPIO1_IO8 0x00
+ >;
+ };
+
+ pinctrl_ecspi1: ecspi1grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_ECSPI1_MISO_ECSPI1_MISO 0x82
+ MX8MM_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI 0x82
+ MX8MM_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK 0x82
+ >;
+ };
+
+ pinctrl_ecspi1_cs: ecspi1csgrp {
+ fsl,pins = <
+ MX8MM_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x00
+ MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0x00
+ MX8MM_IOMUXC_SAI3_MCLK_GPIO5_IO2 0x00
+ >;
+ };
+
+ pinctrl_gpiokeys: keygrp {
+ fsl,pins = <
+ MX8MM_IOMUXC_GPIO1_IO09_GPIO1_IO9 0x00
+ >;
+ };
+
+ pinctrl_i2c2: i2c2grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL 0x400001c2
+ MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c2
+ >;
+ };
+
+ pinctrl_i2c2_gpio: i2c2gpiogrp {
+ fsl,pins = <
+ MX8MM_IOMUXC_I2C2_SDA_GPIO5_IO17 0x1e0
+ MX8MM_IOMUXC_I2C2_SCL_GPIO5_IO16 0x1e0
+ >;
+ };
+
+
+ pinctrl_i2c3: i2c3grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL 0x400001c2
+ MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c2
+ >;
+ };
+
+ pinctrl_i2c3_gpio: i2c3gpiogrp {
+ fsl,pins = <
+ MX8MM_IOMUXC_I2C3_SDA_GPIO5_IO19 0x1e0
+ MX8MM_IOMUXC_I2C3_SCL_GPIO5_IO18 0x1e0
+ >;
+ };
+
+ pinctrl_i2c4: i2c4grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL 0x400001c2
+ MX8MM_IOMUXC_I2C4_SDA_I2C4_SDA 0x400001c2
+ >;
+ };
+
+ pinctrl_i2c4_gpio: i2c4gpiogrp {
+ fsl,pins = <
+ MX8MM_IOMUXC_I2C4_SDA_GPIO5_IO21 0x1e0
+ MX8MM_IOMUXC_I2C4_SCL_GPIO5_IO20 0x1e0
+ >;
+ };
+
+ pinctrl_leds: leds1grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_SAI3_RXD_GPIO4_IO30 0x00
+ MX8MM_IOMUXC_SPDIF_EXT_CLK_GPIO5_IO5 0x00
+ >;
+ };
+
+ pinctrl_pcie: pciegrp {
+ fsl,pins = <
+ /* COEX2 */
+ MX8MM_IOMUXC_SAI5_RXD1_GPIO3_IO22 0x00
+ /* COEX1 */
+ MX8MM_IOMUXC_SAI1_TXD0_GPIO4_IO12 0x12
+ >;
+ };
+
+ pinctrl_pwm1: pwm1grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_GPIO1_IO01_PWM1_OUT 0x40
+ >;
+ };
+
+ pinctrl_pwm3: pwm3grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_SPDIF_TX_PWM3_OUT 0x40
+ >;
+ };
+
+ pinctrl_pwm4: pwm4grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_GPIO1_IO15_PWM4_OUT 0x40
+ >;
+ };
+
+ pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp {
+ fsl,pins = <
+ MX8MM_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x40
+ >;
+ };
+
+ pinctrl_tempsense: tempsensegrp {
+ fsl,pins = <
+ MX8MM_IOMUXC_SAI3_TXFS_GPIO4_IO31 0x00
+ >;
+ };
+
+ pinctrl_tpm: tpmgrp {
+ fsl,pins = <
+ MX8MM_IOMUXC_SD1_STROBE_GPIO2_IO11 0x140
+ >;
+ };
+
+ pinctrl_uart1: uart1grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_UART1_TXD_UART1_DCE_TX 0x00
+ MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX 0x00
+ >;
+ };
+
+ pinctrl_uart2: uart2grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0x00
+ MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x00
+ >;
+ };
+
+ pinctrl_uart3: uart3grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_UART3_RXD_UART3_DCE_RX 0x140
+ MX8MM_IOMUXC_UART3_TXD_UART3_DCE_TX 0x140
+ >;
+ };
+
+ pinctrl_usbhubpwr: usbhubpwrgrp {
+ fsl,pins = <
+ MX8MM_IOMUXC_GPIO1_IO14_GPIO1_IO14 0x00
+ >;
+ };
+
+ pinctrl_usbotg1pwr: usbotg1pwrgrp {
+ fsl,pins = <
+ MX8MM_IOMUXC_GPIO1_IO12_GPIO1_IO12 0x00
+ >;
+ };
+
+ pinctrl_usbotg1: usbotg1grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_GPIO1_IO13_USB1_OTG_OC 0x80
+ >;
+ };
+
+ pinctrl_usdhc1: usdhc1grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x182
+ MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0xc6
+ MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0xc6
+ MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0xc6
+ MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0xc6
+ MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0xc6
+ >;
+ };
+
+ pinctrl_usdhc2_gpio: usdhc2gpiogrp {
+ fsl,pins = <
+ MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x40
+ >;
+ };
+
+ pinctrl_usdhc2: usdhc2grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0
+ MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x192
+ MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d2
+ MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d2
+ MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d2
+ MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d2
+ MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d2
+ >;
+ };
+
+ pinctrl_usdhc2_100mhz: usdhc2100mhzgrp {
+ fsl,pins = <
+ MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0
+ MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x194
+ MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4
+ MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4
+ MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4
+ MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4
+ MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4
+ >;
+ };
+
+ pinctrl_usdhc2_200mhz: usdhc2200mhzgrp {
+ fsl,pins = <
+ MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0
+ MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x196
+ MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6
+ MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6
+ MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6
+ MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6
+ MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6
+ >;
+ };
+};
diff --git a/arch/arm/dts/imx8mm-venice-gw72xx-0x-u-boot.dtsi b/arch/arm/dts/imx8mm-venice-gw72xx-0x-u-boot.dtsi
index 92e44d4..31f9d47 100644
--- a/arch/arm/dts/imx8mm-venice-gw72xx-0x-u-boot.dtsi
+++ b/arch/arm/dts/imx8mm-venice-gw72xx-0x-u-boot.dtsi
@@ -39,6 +39,13 @@
gpios = <9 GPIO_ACTIVE_HIGH>;
line-name = "dio1";
};
+
+ tpm_rst {
+ gpio-hog;
+ output-high;
+ gpios = <11 GPIO_ACTIVE_HIGH>;
+ line-name = "tpm_rst#";
+ };
};
&gpio4 {
diff --git a/arch/arm/dts/imx8mm-venice-gw72xx.dtsi b/arch/arm/dts/imx8mm-venice-gw72xx.dtsi
index 41d0de6..97ed34a 100644
--- a/arch/arm/dts/imx8mm-venice-gw72xx.dtsi
+++ b/arch/arm/dts/imx8mm-venice-gw72xx.dtsi
@@ -84,8 +84,15 @@
&ecspi2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi2>;
- cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
+ cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>,
+ <&gpio1 10 GPIO_ACTIVE_LOW>;
status = "okay";
+
+ tpm@1 {
+ compatible = "tcg,tpm_tis-spi";
+ reg = <0x1>;
+ spi-max-frequency = <36000000>;
+ };
};
&gpio1 {
@@ -314,6 +321,7 @@
MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0xd6
MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0xd6
MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0xd6
+ MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10 0xd6
>;
};
diff --git a/arch/arm/dts/imx8mm-venice-gw73xx-0x-u-boot.dtsi b/arch/arm/dts/imx8mm-venice-gw73xx-0x-u-boot.dtsi
index 92e44d4..31f9d47 100644
--- a/arch/arm/dts/imx8mm-venice-gw73xx-0x-u-boot.dtsi
+++ b/arch/arm/dts/imx8mm-venice-gw73xx-0x-u-boot.dtsi
@@ -39,6 +39,13 @@
gpios = <9 GPIO_ACTIVE_HIGH>;
line-name = "dio1";
};
+
+ tpm_rst {
+ gpio-hog;
+ output-high;
+ gpios = <11 GPIO_ACTIVE_HIGH>;
+ line-name = "tpm_rst#";
+ };
};
&gpio4 {
diff --git a/arch/arm/dts/imx8mm-venice-gw73xx.dtsi b/arch/arm/dts/imx8mm-venice-gw73xx.dtsi
index 244ef8d..7b2130d 100644
--- a/arch/arm/dts/imx8mm-venice-gw73xx.dtsi
+++ b/arch/arm/dts/imx8mm-venice-gw73xx.dtsi
@@ -104,8 +104,15 @@
&ecspi2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi2>;
- cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
+ cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>,
+ <&gpio1 10 GPIO_ACTIVE_LOW>;
status = "okay";
+
+ tpm@1 {
+ compatible = "tcg,tpm_tis-spi";
+ reg = <0x1>;
+ spi-max-frequency = <36000000>;
+ };
};
&gpio1 {
@@ -364,6 +371,7 @@
MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0xd6
MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0xd6
MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0xd6
+ MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10 0xd6
>;
};
diff --git a/arch/arm/dts/imx8mm.dtsi b/arch/arm/dts/imx8mm.dtsi
index afb90f5..738024b 100644
--- a/arch/arm/dts/imx8mm.dtsi
+++ b/arch/arm/dts/imx8mm.dtsi
@@ -139,6 +139,7 @@
A53_L2: l2-cache0 {
compatible = "cache";
cache-level = <2>;
+ cache-unified;
cache-size = <0x80000>;
cache-line-size = <64>;
cache-sets = <512>;
@@ -276,6 +277,7 @@
assigned-clocks = <&clk IMX8MM_CLK_USB_PHY_REF>;
assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_100M>;
clock-names = "main_clk";
+ power-domains = <&pgc_otg1>;
};
usbphynop2: usbphynop2 {
@@ -285,6 +287,7 @@
assigned-clocks = <&clk IMX8MM_CLK_USB_PHY_REF>;
assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_100M>;
clock-names = "main_clk";
+ power-domains = <&pgc_otg2>;
};
soc: soc@0 {
@@ -396,6 +399,7 @@
"pll8k", "pll11k", "clkext3";
dmas = <&sdma2 24 25 0x80000000>;
dma-names = "rx";
+ #sound-dai-cells = <0>;
status = "disabled";
};
@@ -493,6 +497,8 @@
compatible = "fsl,imx8mm-tmu";
reg = <0x30260000 0x10000>;
clocks = <&clk IMX8MM_CLK_TMU_ROOT>;
+ nvmem-cells = <&tmu_calib>;
+ nvmem-cell-names = "calib";
#thermal-sensor-cells = <0>;
};
@@ -547,8 +553,8 @@
reg = <0x30330000 0x10000>;
};
- gpr: iomuxc-gpr@30340000 {
- compatible = "fsl,imx8mm-iomuxc-gpr", "fsl,imx6q-iomuxc-gpr", "syscon";
+ gpr: syscon@30340000 {
+ compatible = "fsl,imx8mm-iomuxc-gpr", "syscon";
reg = <0x30340000 0x10000>;
};
@@ -560,22 +566,40 @@
#address-cells = <1>;
#size-cells = <1>;
- imx8mm_uid: unique-id@410 {
+ /*
+ * The register address below maps to the MX8M
+ * Fusemap Description Table entries this way.
+ * Assuming
+ * reg = <ADDR SIZE>;
+ * then
+ * Fuse Address = (ADDR * 4) + 0x400
+ * Note that if SIZE is greater than 4, then
+ * each subsequent fuse is located at offset
+ * +0x10 in Fusemap Description Table (e.g.
+ * reg = <0x4 0x8> describes fuses 0x410 and
+ * 0x420).
+ */
+ imx8mm_uid: unique-id@4 { /* 0x410-0x420 */
reg = <0x4 0x8>;
};
- cpu_speed_grade: speed-grade@10 {
+ cpu_speed_grade: speed-grade@10 { /* 0x440 */
reg = <0x10 4>;
};
- fec_mac_address: mac-address@90 {
+ tmu_calib: calib@3c { /* 0x4f0 */
+ reg = <0x3c 4>;
+ };
+
+ fec_mac_address: mac-address@90 { /* 0x640 */
reg = <0x90 6>;
};
};
- anatop: anatop@30360000 {
- compatible = "fsl,imx8mm-anatop", "syscon";
+ anatop: clock-controller@30360000 {
+ compatible = "fsl,imx8mm-anatop";
reg = <0x30360000 0x10000>;
+ #clock-cells = <1>;
};
snvs: snvs@30370000 {
@@ -674,13 +698,11 @@
pgc_otg1: power-domain@2 {
#power-domain-cells = <0>;
reg = <IMX8MM_POWER_DOMAIN_OTG1>;
- power-domains = <&pgc_hsiomix>;
};
pgc_otg2: power-domain@3 {
#power-domain-cells = <0>;
reg = <IMX8MM_POWER_DOMAIN_OTG2>;
- power-domains = <&pgc_hsiomix>;
};
pgc_gpumix: power-domain@4 {
@@ -1098,6 +1120,61 @@
#size-cells = <1>;
ranges = <0x32c00000 0x32c00000 0x400000>;
+ lcdif: lcdif@32e00000 {
+ compatible = "fsl,imx8mm-lcdif", "fsl,imx6sx-lcdif";
+ reg = <0x32e00000 0x10000>;
+ clocks = <&clk IMX8MM_CLK_LCDIF_PIXEL>,
+ <&clk IMX8MM_CLK_DISP_APB_ROOT>,
+ <&clk IMX8MM_CLK_DISP_AXI_ROOT>;
+ clock-names = "pix", "axi", "disp_axi";
+ assigned-clocks = <&clk IMX8MM_CLK_LCDIF_PIXEL>,
+ <&clk IMX8MM_CLK_DISP_AXI>,
+ <&clk IMX8MM_CLK_DISP_APB>;
+ assigned-clock-parents = <&clk IMX8MM_VIDEO_PLL1_OUT>,
+ <&clk IMX8MM_SYS_PLL2_1000M>,
+ <&clk IMX8MM_SYS_PLL1_800M>;
+ assigned-clock-rates = <594000000>, <500000000>, <200000000>;
+ interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
+ power-domains = <&disp_blk_ctrl IMX8MM_DISPBLK_PD_LCDIF>;
+ status = "disabled";
+
+ port {
+ lcdif_to_dsim: endpoint {
+ remote-endpoint = <&dsim_from_lcdif>;
+ };
+ };
+ };
+
+ mipi_dsi: dsi@32e10000 {
+ compatible = "fsl,imx8mm-mipi-dsim";
+ reg = <0x32e10000 0x400>;
+ clocks = <&clk IMX8MM_CLK_DSI_CORE>,
+ <&clk IMX8MM_CLK_DSI_PHY_REF>;
+ clock-names = "bus_clk", "sclk_mipi";
+ assigned-clocks = <&clk IMX8MM_CLK_DSI_CORE>,
+ <&clk IMX8MM_CLK_DSI_PHY_REF>;
+ assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_266M>,
+ <&clk IMX8MM_CLK_24M>;
+ assigned-clock-rates = <266000000>, <24000000>;
+ samsung,pll-clock-frequency = <24000000>;
+ interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
+ power-domains = <&disp_blk_ctrl IMX8MM_DISPBLK_PD_MIPI_DSI>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ dsim_from_lcdif: endpoint {
+ remote-endpoint = <&lcdif_to_dsim>;
+ };
+ };
+ };
+ };
+
csi: csi@32e20000 {
compatible = "fsl,imx8mm-csi", "fsl,imx7-csi";
reg = <0x32e20000 0x1000>;
@@ -1145,10 +1222,9 @@
compatible = "fsl,imx8mm-mipi-csi2";
reg = <0x32e30000 0x1000>;
interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
- assigned-clocks = <&clk IMX8MM_CLK_CSI1_CORE>,
- <&clk IMX8MM_CLK_CSI1_PHY_REF>;
- assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_1000M>,
- <&clk IMX8MM_SYS_PLL2_1000M>;
+ assigned-clocks = <&clk IMX8MM_CLK_CSI1_CORE>;
+ assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_1000M>;
+
clock-frequency = <333000000>;
clocks = <&clk IMX8MM_CLK_DISP_APB_ROOT>,
<&clk IMX8MM_CLK_CSI1_ROOT>,
@@ -1177,7 +1253,7 @@
};
usbotg1: usb@32e40000 {
- compatible = "fsl,imx8mm-usb", "fsl,imx7d-usb";
+ compatible = "fsl,imx8mm-usb", "fsl,imx7d-usb", "fsl,imx27-usb";
reg = <0x32e40000 0x200>;
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MM_CLK_USB1_CTRL_ROOT>;
@@ -1186,18 +1262,19 @@
assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_500M>;
phys = <&usbphynop1>;
fsl,usbmisc = <&usbmisc1 0>;
- power-domains = <&pgc_otg1>;
+ power-domains = <&pgc_hsiomix>;
status = "disabled";
};
usbmisc1: usbmisc@32e40200 {
- compatible = "fsl,imx8mm-usbmisc", "fsl,imx7d-usbmisc";
+ compatible = "fsl,imx8mm-usbmisc", "fsl,imx7d-usbmisc",
+ "fsl,imx6q-usbmisc";
#index-cells = <1>;
reg = <0x32e40200 0x200>;
};
usbotg2: usb@32e50000 {
- compatible = "fsl,imx8mm-usb", "fsl,imx7d-usb";
+ compatible = "fsl,imx8mm-usb", "fsl,imx7d-usb", "fsl,imx27-usb";
reg = <0x32e50000 0x200>;
interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MM_CLK_USB1_CTRL_ROOT>;
@@ -1206,12 +1283,13 @@
assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_500M>;
phys = <&usbphynop2>;
fsl,usbmisc = <&usbmisc2 0>;
- power-domains = <&pgc_otg2>;
+ power-domains = <&pgc_hsiomix>;
status = "disabled";
};
usbmisc2: usbmisc@32e50200 {
- compatible = "fsl,imx8mm-usbmisc", "fsl,imx7d-usbmisc";
+ compatible = "fsl,imx8mm-usbmisc", "fsl,imx7d-usbmisc",
+ "fsl,imx6q-usbmisc";
#index-cells = <1>;
reg = <0x32e50200 0x200>;
};
@@ -1238,16 +1316,15 @@
<GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "gpmi0", "gpmi1", "gpmi2", "gpmi3";
#dma-cells = <1>;
dma-channels = <4>;
clocks = <&clk IMX8MM_CLK_NAND_USDHC_BUS_RAWNAND_CLK>;
};
- gpmi: nand-controller@33002000{
+ gpmi: nand-controller@33002000 {
compatible = "fsl,imx8mm-gpmi-nand", "fsl,imx7d-gpmi-nand";
#address-cells = <1>;
- #size-cells = <1>;
+ #size-cells = <0>;
reg = <0x33002000 0x2000>, <0x33004000 0x4000>;
reg-names = "gpmi-nand", "bch";
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
@@ -1268,8 +1345,8 @@
#size-cells = <2>;
device_type = "pci";
bus-range = <0x00 0xff>;
- ranges = <0x81000000 0 0x00000000 0x1ff80000 0 0x00010000 /* downstream I/O 64KB */
- 0x82000000 0 0x18000000 0x18000000 0 0x07f00000>; /* non-prefetchable memory */
+ ranges = <0x81000000 0 0x00000000 0x1ff80000 0 0x00010000>, /* downstream I/O 64KB */
+ <0x82000000 0 0x18000000 0x18000000 0 0x07f00000>; /* non-prefetchable memory */
num-lanes = <1>;
num-viewport = <4>;
interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
@@ -1282,6 +1359,10 @@
<0 0 0 4 &gic GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
fsl,max-link-speed = <2>;
linux,pci-domain = <0>;
+ clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>,
+ <&clk IMX8MM_CLK_PCIE1_PHY>,
+ <&clk IMX8MM_CLK_PCIE1_AUX>;
+ clock-names = "pcie", "pcie_bus", "pcie_aux";
power-domains = <&pgc_pcie>;
resets = <&src IMX8MQ_RESET_PCIE_CTRL_APPS_EN>,
<&src IMX8MQ_RESET_PCIE_CTRL_APPS_TURNOFF>;
@@ -1291,6 +1372,30 @@
status = "disabled";
};
+ pcie0_ep: pcie-ep@33800000 {
+ compatible = "fsl,imx8mm-pcie-ep";
+ reg = <0x33800000 0x400000>,
+ <0x18000000 0x8000000>;
+ reg-names = "dbi", "addr_space";
+ num-lanes = <1>;
+ interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "dma";
+ fsl,max-link-speed = <2>;
+ clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>,
+ <&clk IMX8MM_CLK_PCIE1_PHY>,
+ <&clk IMX8MM_CLK_PCIE1_AUX>;
+ clock-names = "pcie", "pcie_bus", "pcie_aux";
+ power-domains = <&pgc_pcie>;
+ resets = <&src IMX8MQ_RESET_PCIE_CTRL_APPS_EN>,
+ <&src IMX8MQ_RESET_PCIE_CTRL_APPS_TURNOFF>;
+ reset-names = "apps", "turnoff";
+ phys = <&pcie_phy>;
+ phy-names = "pcie-phy";
+ num-ib-windows = <4>;
+ num-ob-windows = <4>;
+ status = "disabled";
+ };
+
gpu_3d: gpu@38000000 {
compatible = "vivante,gc";
reg = <0x38000000 0x8000>;
diff --git a/arch/arm/dts/imx8mn-var-som-symphony-u-boot.dtsi b/arch/arm/dts/imx8mn-var-som-symphony-u-boot.dtsi
index e0caf31..2bbc4a4 100644
--- a/arch/arm/dts/imx8mn-var-som-symphony-u-boot.dtsi
+++ b/arch/arm/dts/imx8mn-var-som-symphony-u-boot.dtsi
@@ -39,11 +39,11 @@
};
&i2c1 {
- bootph-pre-ram;
+ bootph-all;
};
&pinctrl_i2c1 {
- bootph-pre-ram;
+ bootph-all;
};
&pinctrl_pmic {
@@ -83,5 +83,5 @@
};
&eeprom_som {
- bootph-pre-ram;
+ bootph-all;
};
diff --git a/arch/arm/dts/imx8mn.dtsi b/arch/arm/dts/imx8mn.dtsi
index cb2836b..1bb1d0c 100644
--- a/arch/arm/dts/imx8mn.dtsi
+++ b/arch/arm/dts/imx8mn.dtsi
@@ -139,6 +139,7 @@
A53_L2: l2-cache0 {
compatible = "cache";
cache-level = <2>;
+ cache-unified;
cache-size = <0x80000>;
cache-line-size = <64>;
cache-sets = <512>;
@@ -295,6 +296,7 @@
sai2: sai@30020000 {
compatible = "fsl,imx8mn-sai", "fsl,imx8mq-sai";
reg = <0x30020000 0x10000>;
+ #sound-dai-cells = <0>;
interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MN_CLK_SAI2_IPG>,
<&clk IMX8MN_CLK_DUMMY>,
@@ -309,6 +311,7 @@
sai3: sai@30030000 {
compatible = "fsl,imx8mn-sai", "fsl,imx8mq-sai";
reg = <0x30030000 0x10000>;
+ #sound-dai-cells = <0>;
interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MN_CLK_SAI3_IPG>,
<&clk IMX8MN_CLK_DUMMY>,
@@ -323,6 +326,7 @@
sai5: sai@30050000 {
compatible = "fsl,imx8mn-sai", "fsl,imx8mq-sai";
reg = <0x30050000 0x10000>;
+ #sound-dai-cells = <0>;
interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MN_CLK_SAI5_IPG>,
<&clk IMX8MN_CLK_DUMMY>,
@@ -339,6 +343,7 @@
sai6: sai@30060000 {
compatible = "fsl,imx8mn-sai", "fsl,imx8mq-sai";
reg = <0x30060000 0x10000>;
+ #sound-dai-cells = <0>;
interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MN_CLK_SAI6_IPG>,
<&clk IMX8MN_CLK_DUMMY>,
@@ -366,6 +371,7 @@
"pll8k", "pll11k", "clkext3";
dmas = <&sdma2 24 25 0x80000000>;
dma-names = "rx";
+ #sound-dai-cells = <0>;
status = "disabled";
};
@@ -396,6 +402,7 @@
sai7: sai@300b0000 {
compatible = "fsl,imx8mn-sai", "fsl,imx8mq-sai";
reg = <0x300b0000 0x10000>;
+ #sound-dai-cells = <0>;
interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MN_CLK_SAI7_IPG>,
<&clk IMX8MN_CLK_DUMMY>,
@@ -497,6 +504,8 @@
compatible = "fsl,imx8mn-tmu", "fsl,imx8mm-tmu";
reg = <0x30260000 0x10000>;
clocks = <&clk IMX8MN_CLK_TMU_ROOT>;
+ nvmem-cells = <&tmu_calib>;
+ nvmem-cell-names = "calib";
#thermal-sensor-cells = <0>;
};
@@ -551,7 +560,7 @@
reg = <0x30330000 0x10000>;
};
- gpr: iomuxc-gpr@30340000 {
+ gpr: syscon@30340000 {
compatible = "fsl,imx8mn-iomuxc-gpr", "syscon";
reg = <0x30340000 0x10000>;
};
@@ -563,23 +572,40 @@
#address-cells = <1>;
#size-cells = <1>;
- imx8mn_uid: unique-id@410 {
+ /*
+ * The register address below maps to the MX8M
+ * Fusemap Description Table entries this way.
+ * Assuming
+ * reg = <ADDR SIZE>;
+ * then
+ * Fuse Address = (ADDR * 4) + 0x400
+ * Note that if SIZE is greater than 4, then
+ * each subsequent fuse is located at offset
+ * +0x10 in Fusemap Description Table (e.g.
+ * reg = <0x4 0x8> describes fuses 0x410 and
+ * 0x420).
+ */
+ imx8mn_uid: unique-id@4 { /* 0x410-0x420 */
reg = <0x4 0x8>;
};
- cpu_speed_grade: speed-grade@10 {
+ cpu_speed_grade: speed-grade@10 { /* 0x440 */
reg = <0x10 4>;
};
- fec_mac_address: mac-address@90 {
+ tmu_calib: calib@3c { /* 0x4f0 */
+ reg = <0x3c 4>;
+ };
+
+ fec_mac_address: mac-address@90 { /* 0x640 */
reg = <0x90 6>;
};
};
- anatop: anatop@30360000 {
- compatible = "fsl,imx8mn-anatop", "fsl,imx8mm-anatop",
- "syscon";
+ anatop: clock-controller@30360000 {
+ compatible = "fsl,imx8mn-anatop", "fsl,imx8mm-anatop";
reg = <0x30360000 0x10000>;
+ #clock-cells = <1>;
};
snvs: snvs@30370000 {
@@ -662,7 +688,6 @@
pgc_otg1: power-domain@1 {
#power-domain-cells = <0>;
reg = <IMX8MN_POWER_DOMAIN_OTG1>;
- power-domains = <&pgc_hsiomix>;
};
pgc_gpumix: power-domain@2 {
@@ -1038,6 +1063,72 @@
#size-cells = <1>;
ranges;
+ lcdif: lcdif@32e00000 {
+ compatible = "fsl,imx8mn-lcdif", "fsl,imx6sx-lcdif";
+ reg = <0x32e00000 0x10000>;
+ clocks = <&clk IMX8MN_CLK_DISP_PIXEL_ROOT>,
+ <&clk IMX8MN_CLK_DISP_APB_ROOT>,
+ <&clk IMX8MN_CLK_DISP_AXI_ROOT>;
+ clock-names = "pix", "axi", "disp_axi";
+ interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
+ power-domains = <&disp_blk_ctrl IMX8MN_DISPBLK_PD_LCDIF>;
+ status = "disabled";
+
+ port {
+ lcdif_to_dsim: endpoint {
+ remote-endpoint = <&dsim_from_lcdif>;
+ };
+ };
+ };
+
+ mipi_dsi: dsi@32e10000 {
+ compatible = "fsl,imx8mn-mipi-dsim", "fsl,imx8mm-mipi-dsim";
+ reg = <0x32e10000 0x400>;
+ clocks = <&clk IMX8MN_CLK_DSI_CORE>,
+ <&clk IMX8MN_CLK_DSI_PHY_REF>;
+ clock-names = "bus_clk", "sclk_mipi";
+ interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
+ power-domains = <&disp_blk_ctrl IMX8MN_DISPBLK_PD_MIPI_DSI>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ dsim_from_lcdif: endpoint {
+ remote-endpoint = <&lcdif_to_dsim>;
+ };
+ };
+ };
+ };
+
+ isi: isi@32e20000 {
+ compatible = "fsl,imx8mn-isi";
+ reg = <0x32e20000 0x8000>;
+ interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MN_CLK_DISP_AXI_ROOT>,
+ <&clk IMX8MN_CLK_DISP_APB_ROOT>;
+ clock-names = "axi", "apb";
+ fsl,blk-ctrl = <&disp_blk_ctrl>;
+ power-domains = <&disp_blk_ctrl IMX8MN_DISPBLK_PD_ISI>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ isi_in: endpoint {
+ remote-endpoint = <&mipi_csi_out>;
+ };
+ };
+ };
+ };
+
disp_blk_ctrl: blk-ctrl@32e28000 {
compatible = "fsl,imx8mn-disp-blk-ctrl", "syscon";
reg = <0x32e28000 0x100>;
@@ -1063,11 +1154,60 @@
"lcdif-axi", "lcdif-apb", "lcdif-pix",
"dsi-pclk", "dsi-ref",
"csi-aclk", "csi-pclk";
+ assigned-clocks = <&clk IMX8MN_CLK_DSI_CORE>,
+ <&clk IMX8MN_CLK_DSI_PHY_REF>,
+ <&clk IMX8MN_CLK_DISP_PIXEL>,
+ <&clk IMX8MN_CLK_DISP_AXI>,
+ <&clk IMX8MN_CLK_DISP_APB>;
+ assigned-clock-parents = <&clk IMX8MN_SYS_PLL1_266M>,
+ <&clk IMX8MN_CLK_24M>,
+ <&clk IMX8MN_VIDEO_PLL1_OUT>,
+ <&clk IMX8MN_SYS_PLL2_1000M>,
+ <&clk IMX8MN_SYS_PLL1_800M>;
+ assigned-clock-rates = <266000000>,
+ <24000000>,
+ <594000000>,
+ <500000000>,
+ <200000000>;
#power-domain-cells = <1>;
};
+ mipi_csi: mipi-csi@32e30000 {
+ compatible = "fsl,imx8mm-mipi-csi2";
+ reg = <0x32e30000 0x1000>;
+ interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
+ assigned-clocks = <&clk IMX8MN_CLK_CAMERA_PIXEL>;
+ assigned-clock-parents = <&clk IMX8MN_SYS_PLL2_1000M>;
+ assigned-clock-rates = <333000000>;
+ clock-frequency = <333000000>;
+ clocks = <&clk IMX8MN_CLK_DISP_APB_ROOT>,
+ <&clk IMX8MN_CLK_CAMERA_PIXEL>,
+ <&clk IMX8MN_CLK_CSI1_PHY_REF>,
+ <&clk IMX8MN_CLK_DISP_AXI_ROOT>;
+ clock-names = "pclk", "wrap", "phy", "axi";
+ power-domains = <&disp_blk_ctrl IMX8MN_DISPBLK_PD_MIPI_CSI>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ };
+
+ port@1 {
+ reg = <1>;
+
+ mipi_csi_out: endpoint {
+ remote-endpoint = <&isi_in>;
+ };
+ };
+ };
+ };
+
usbotg1: usb@32e40000 {
- compatible = "fsl,imx8mn-usb", "fsl,imx7d-usb";
+ compatible = "fsl,imx8mn-usb", "fsl,imx7d-usb", "fsl,imx27-usb";
reg = <0x32e40000 0x200>;
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MN_CLK_USB1_CTRL_ROOT>;
@@ -1076,12 +1216,13 @@
assigned-clock-parents = <&clk IMX8MN_SYS_PLL2_500M>;
phys = <&usbphynop1>;
fsl,usbmisc = <&usbmisc1 0>;
- power-domains = <&pgc_otg1>;
+ power-domains = <&pgc_hsiomix>;
status = "disabled";
};
usbmisc1: usbmisc@32e40200 {
- compatible = "fsl,imx8mn-usbmisc", "fsl,imx7d-usbmisc";
+ compatible = "fsl,imx8mn-usbmisc", "fsl,imx7d-usbmisc",
+ "fsl,imx6q-usbmisc";
#index-cells = <1>;
reg = <0x32e40200 0x200>;
};
@@ -1094,7 +1235,6 @@
<GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "gpmi0", "gpmi1", "gpmi2", "gpmi3";
#dma-cells = <1>;
dma-channels = <4>;
clocks = <&clk IMX8MN_CLK_NAND_USDHC_BUS_RAWNAND_CLK>;
@@ -1103,7 +1243,7 @@
gpmi: nand-controller@33002000 {
compatible = "fsl,imx8mn-gpmi-nand", "fsl,imx7d-gpmi-nand";
#address-cells = <1>;
- #size-cells = <1>;
+ #size-cells = <0>;
reg = <0x33002000 0x2000>, <0x33004000 0x4000>;
reg-names = "gpmi-nand", "bch";
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
@@ -1175,5 +1315,6 @@
assigned-clocks = <&clk IMX8MN_CLK_USB_PHY_REF>;
assigned-clock-parents = <&clk IMX8MN_SYS_PLL1_100M>;
clock-names = "main_clk";
+ power-domains = <&pgc_otg1>;
};
};
diff --git a/arch/arm/dts/imx8mp-data-modul-edm-sbc-u-boot.dtsi b/arch/arm/dts/imx8mp-data-modul-edm-sbc-u-boot.dtsi
index eafe9b9..cb6ea35 100644
--- a/arch/arm/dts/imx8mp-data-modul-edm-sbc-u-boot.dtsi
+++ b/arch/arm/dts/imx8mp-data-modul-edm-sbc-u-boot.dtsi
@@ -51,12 +51,6 @@
};
};
-&eqos {
- /delete-property/ assigned-clocks;
- /delete-property/ assigned-clock-parents;
- /delete-property/ assigned-clock-rates;
-};
-
&gpio1 {
bootph-pre-ram;
};
@@ -67,10 +61,58 @@
&gpio3 {
bootph-pre-ram;
+
+ bl-enable-hog {
+ bootph-pre-ram;
+ gpio-hog;
+ output-low;
+ gpios = <0 GPIO_ACTIVE_HIGH>;
+ line-name = "BL_ENABLE_1V8";
+ };
+
+ tft-enable-hog {
+ bootph-pre-ram;
+ gpio-hog;
+ output-low;
+ gpios = <6 GPIO_ACTIVE_HIGH>;
+ line-name = "TFT_ENABLE_1V8";
+ };
+
+ graphics-gpio0-hog {
+ bootph-pre-ram;
+ gpio-hog;
+ input;
+ gpios = <7 GPIO_ACTIVE_HIGH>;
+ line-name = "GRAPHICS_GPIO0_1V8";
+ };
};
&gpio4 {
bootph-pre-ram;
+
+ dsi-reset-hog {
+ bootph-pre-ram;
+ gpio-hog;
+ output-high;
+ gpios = <0 GPIO_ACTIVE_LOW>;
+ line-name = "DSI_RESET_1V8#";
+ };
+
+ graphics-prsnt-hog {
+ bootph-pre-ram;
+ gpio-hog;
+ input;
+ gpios = <18 GPIO_ACTIVE_LOW>;
+ line-name = "GRAPHICS_PRSNT_1V8#";
+ };
+
+ dsi-irq-hog {
+ bootph-pre-ram;
+ gpio-hog;
+ input;
+ gpios = <19 GPIO_ACTIVE_LOW>;
+ line-name = "DSI_IRQ_1V8#";
+ };
};
&gpio5 {
diff --git a/arch/arm/dts/imx8mp-debix-model-a-u-boot.dtsi b/arch/arm/dts/imx8mp-debix-model-a-u-boot.dtsi
new file mode 100644
index 0000000..33bd89a
--- /dev/null
+++ b/arch/arm/dts/imx8mp-debix-model-a-u-boot.dtsi
@@ -0,0 +1,141 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2019, 2021 NXP
+ * Copyright 2023 Gilles Talis <gilles.talis@gmail.com>
+ */
+
+#include "imx8mp-u-boot.dtsi"
+
+/ {
+ wdt-reboot {
+ compatible = "wdt-reboot";
+ wdt = <&wdog1>;
+ bootph-pre-ram;
+ };
+ firmware {
+ optee {
+ compatible = "linaro,optee-tz";
+ method = "smc";
+ };
+ };
+};
+
+&crypto {
+ bootph-pre-ram;
+};
+
+ðphy0 {
+ reset-gpios = <&gpio4 18 GPIO_ACTIVE_LOW>;
+ reset-delay-us = <15000>;
+ reset-post-delay-us = <100000>;
+};
+
+&fec {
+ phy-reset-gpios = <&gpio4 19 GPIO_ACTIVE_LOW>;
+ phy-reset-duration = <15>;
+ phy-reset-post-delay = <100>;
+};
+
+&gpio1 {
+ bootph-pre-ram;
+};
+
+&gpio2 {
+ bootph-pre-ram;
+};
+
+&gpio3 {
+ bootph-pre-ram;
+};
+
+&gpio4 {
+ bootph-pre-ram;
+};
+
+&gpio5 {
+ bootph-pre-ram;
+};
+
+&i2c1 {
+ bootph-pre-ram;
+};
+
+&pinctrl_i2c1 {
+ bootph-pre-ram;
+};
+
+&pinctrl_pmic {
+ bootph-pre-ram;
+};
+
+&pinctrl_uart2 {
+ bootph-pre-ram;
+};
+
+&pinctrl_usdhc2_gpio {
+ bootph-pre-ram;
+};
+
+&pinctrl_usdhc2 {
+ bootph-pre-ram;
+};
+
+&pinctrl_usdhc3 {
+ bootph-pre-ram;
+};
+
+&pinctrl_wdog {
+ bootph-pre-ram;
+};
+
+&pmic {
+ bootph-pre-ram;
+
+ regulators {
+ bootph-pre-ram;
+ };
+};
+
+®_usdhc2_vmmc {
+ u-boot,off-on-delay-us = <20000>;
+};
+
+®_usdhc2_vmmc {
+ bootph-pre-ram;
+};
+
+&uart2 {
+ bootph-pre-ram;
+};
+
+&sec_jr0 {
+ bootph-pre-ram;
+};
+
+&sec_jr1 {
+ bootph-pre-ram;
+};
+
+&sec_jr2 {
+ bootph-pre-ram;
+};
+
+&usdhc1 {
+ bootph-pre-ram;
+};
+
+&usdhc2 {
+ bootph-pre-ram;
+ sd-uhs-sdr104;
+ sd-uhs-ddr50;
+};
+
+&usdhc3 {
+ bootph-pre-ram;
+ mmc-hs400-1_8v;
+ mmc-hs400-enhanced-strobe;
+};
+
+&wdog1 {
+ bootph-pre-ram;
+};
diff --git a/arch/arm/dts/imx8mp-debix-model-a.dts b/arch/arm/dts/imx8mp-debix-model-a.dts
new file mode 100644
index 0000000..58dae61
--- /dev/null
+++ b/arch/arm/dts/imx8mp-debix-model-a.dts
@@ -0,0 +1,507 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2019 NXP
+ * Copyright 2022 Ideas on Board Oy
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/leds/common.h>
+#include <dt-bindings/usb/pd.h>
+
+#include "imx8mp.dtsi"
+
+/ {
+ model = "Polyhex Debix Model A i.MX8MPlus board";
+ compatible = "polyhex,imx8mp-debix-model-a", "polyhex,imx8mp-debix", "fsl,imx8mp";
+
+ chosen {
+ stdout-path = &uart2;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpio_led>;
+
+ led-0 {
+ function = LED_FUNCTION_POWER;
+ color = <LED_COLOR_ID_RED>;
+ gpios = <&gpio3 16 GPIO_ACTIVE_HIGH>;
+ default-state = "on";
+ };
+ };
+
+ reg_usdhc2_vmmc: regulator-usdhc2 {
+ compatible = "regulator-fixed";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
+ regulator-name = "VSD_3V3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+};
+
+&A53_0 {
+ cpu-supply = <&buck2>;
+};
+
+&A53_1 {
+ cpu-supply = <&buck2>;
+};
+
+&A53_2 {
+ cpu-supply = <&buck2>;
+};
+
+&A53_3 {
+ cpu-supply = <&buck2>;
+};
+
+&eqos {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_eqos>;
+ phy-connection-type = "rgmii-id";
+ phy-handle = <ðphy0>;
+ status = "okay";
+
+ mdio {
+ compatible = "snps,dwmac-mdio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ethphy0: ethernet-phy@0 { /* RTL8211E */
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <0>;
+ reset-gpios = <&gpio4 18 GPIO_ACTIVE_LOW>;
+ reset-assert-us = <20>;
+ reset-deassert-us = <200000>;
+ };
+ };
+};
+
+&i2c1 {
+ clock-frequency = <400000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c1>;
+ status = "okay";
+
+ pmic: pmic@25 {
+ compatible = "nxp,pca9450c";
+ reg = <0x25>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pmic>;
+ interrupt-parent = <&gpio1>;
+ interrupts = <3 IRQ_TYPE_EDGE_RISING>;
+
+ regulators {
+ buck1: BUCK1 {
+ regulator-name = "BUCK1";
+ regulator-min-microvolt = <600000>;
+ regulator-max-microvolt = <2187500>;
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-ramp-delay = <3125>;
+ };
+
+ buck2: BUCK2 {
+ regulator-name = "BUCK2";
+ regulator-min-microvolt = <600000>;
+ regulator-max-microvolt = <2187500>;
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-ramp-delay = <3125>;
+ nxp,dvs-run-voltage = <950000>;
+ nxp,dvs-standby-voltage = <850000>;
+ };
+
+ buck4: BUCK4{
+ regulator-name = "BUCK4";
+ regulator-min-microvolt = <600000>;
+ regulator-max-microvolt = <3400000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ buck5: BUCK5{
+ regulator-name = "BUCK5";
+ regulator-min-microvolt = <600000>;
+ regulator-max-microvolt = <3400000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ buck6: BUCK6 {
+ regulator-name = "BUCK6";
+ regulator-min-microvolt = <600000>;
+ regulator-max-microvolt = <3400000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldo1: LDO1 {
+ regulator-name = "LDO1";
+ regulator-min-microvolt = <1600000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldo2: LDO2 {
+ regulator-name = "LDO2";
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <1150000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldo3: LDO3 {
+ regulator-name = "LDO3";
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldo4: LDO4 {
+ regulator-name = "LDO4";
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldo5: LDO5 {
+ regulator-name = "LDO5";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+ };
+ };
+};
+
+&i2c2 {
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c2>;
+ status = "okay";
+};
+
+&i2c3 {
+ clock-frequency = <400000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c3>;
+ status = "okay";
+};
+
+&i2c4 {
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c4>;
+ status = "okay";
+
+ eeprom@50 {
+ compatible = "atmel,24c02";
+ reg = <0x50>;
+ pagesize = <16>;
+ };
+
+ rtc@51 {
+ compatible = "haoyu,hym8563";
+ reg = <0x51>;
+ #clock-cells = <0>;
+ clock-frequency = <32768>;
+ clock-output-names = "xin32k";
+ interrupt-parent = <&gpio2>;
+ interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_rtc_int>;
+ };
+};
+
+&i2c6 {
+ clock-frequency = <400000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c6>;
+ status = "okay";
+};
+
+&snvs_pwrkey {
+ status = "okay";
+};
+
+&uart2 {
+ /* console */
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart2>;
+ status = "okay";
+};
+
+&uart3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart3>;
+ status = "okay";
+};
+
+&uart4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart4>;
+ status = "okay";
+};
+
+/* SD Card */
+&usdhc2 {
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
+ pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
+ pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
+ pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
+ cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
+ vmmc-supply = <®_usdhc2_vmmc>;
+ bus-width = <4>;
+ status = "okay";
+};
+
+/* eMMC */
+&usdhc3 {
+ assigned-clocks = <&clk IMX8MP_CLK_USDHC3>;
+ assigned-clock-rates = <400000000>;
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
+ pinctrl-0 = <&pinctrl_usdhc3>;
+ pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
+ pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
+ bus-width = <8>;
+ non-removable;
+ status = "okay";
+};
+
+&wdog1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_wdog>;
+ fsl,ext-reset-output;
+ status = "okay";
+};
+
+&iomuxc {
+ pinctrl_eqos: eqosgrp {
+ fsl,pins = <
+ MX8MP_IOMUXC_ENET_MDC__ENET_QOS_MDC 0x3
+ MX8MP_IOMUXC_ENET_MDIO__ENET_QOS_MDIO 0x3
+ MX8MP_IOMUXC_ENET_RD0__ENET_QOS_RGMII_RD0 0x91
+ MX8MP_IOMUXC_ENET_RD1__ENET_QOS_RGMII_RD1 0x91
+ MX8MP_IOMUXC_ENET_RD2__ENET_QOS_RGMII_RD2 0x91
+ MX8MP_IOMUXC_ENET_RD3__ENET_QOS_RGMII_RD3 0x91
+ MX8MP_IOMUXC_ENET_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK 0x91
+ MX8MP_IOMUXC_ENET_RX_CTL__ENET_QOS_RGMII_RX_CTL 0x91
+ MX8MP_IOMUXC_ENET_TD0__ENET_QOS_RGMII_TD0 0x1f
+ MX8MP_IOMUXC_ENET_TD1__ENET_QOS_RGMII_TD1 0x1f
+ MX8MP_IOMUXC_ENET_TD2__ENET_QOS_RGMII_TD2 0x1f
+ MX8MP_IOMUXC_ENET_TD3__ENET_QOS_RGMII_TD3 0x1f
+ MX8MP_IOMUXC_ENET_TX_CTL__ENET_QOS_RGMII_TX_CTL 0x1f
+ MX8MP_IOMUXC_ENET_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK 0x1f
+ MX8MP_IOMUXC_SAI1_RXFS__ENET1_1588_EVENT0_IN 0x1f
+ MX8MP_IOMUXC_SAI1_RXC__ENET1_1588_EVENT0_OUT 0x1f
+ MX8MP_IOMUXC_SAI1_TXD6__GPIO4_IO18 0x19
+ >;
+ };
+
+ pinctrl_fec: fecgrp {
+ fsl,pins = <
+ MX8MP_IOMUXC_SAI1_RXD2__ENET1_MDC 0x3
+ MX8MP_IOMUXC_SAI1_RXD3__ENET1_MDIO 0x3
+ MX8MP_IOMUXC_SAI1_RXD4__ENET1_RGMII_RD0 0x91
+ MX8MP_IOMUXC_SAI1_RXD5__ENET1_RGMII_RD1 0x91
+ MX8MP_IOMUXC_SAI1_RXD6__ENET1_RGMII_RD2 0x91
+ MX8MP_IOMUXC_SAI1_RXD7__ENET1_RGMII_RD3 0x91
+ MX8MP_IOMUXC_SAI1_TXC__ENET1_RGMII_RXC 0x91
+ MX8MP_IOMUXC_SAI1_TXFS__ENET1_RGMII_RX_CTL 0x91
+ MX8MP_IOMUXC_SAI1_TXD0__ENET1_RGMII_TD0 0x1f
+ MX8MP_IOMUXC_SAI1_TXD1__ENET1_RGMII_TD1 0x1f
+ MX8MP_IOMUXC_SAI1_TXD2__ENET1_RGMII_TD2 0x1f
+ MX8MP_IOMUXC_SAI1_TXD3__ENET1_RGMII_TD3 0x1f
+ MX8MP_IOMUXC_SAI1_TXD4__ENET1_RGMII_TX_CTL 0x1f
+ MX8MP_IOMUXC_SAI1_TXD5__ENET1_RGMII_TXC 0x1f
+ MX8MP_IOMUXC_SAI1_RXD1__ENET1_1588_EVENT1_OUT 0x1f
+ MX8MP_IOMUXC_SAI1_RXD0__ENET1_1588_EVENT1_IN 0x1f
+ MX8MP_IOMUXC_SAI1_TXD7__GPIO4_IO19 0x19
+ >;
+ };
+
+ pinctrl_gpio_led: gpioledgrp {
+ fsl,pins = <
+ MX8MP_IOMUXC_NAND_READY_B__GPIO3_IO16 0x19
+ >;
+ };
+
+ pinctrl_i2c1: i2c1grp {
+ fsl,pins = <
+ MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL 0x400001c2
+ MX8MP_IOMUXC_I2C1_SDA__I2C1_SDA 0x400001c2
+ >;
+ };
+
+ pinctrl_i2c2: i2c2grp {
+ fsl,pins = <
+ MX8MP_IOMUXC_I2C2_SCL__I2C2_SCL 0x400001c2
+ MX8MP_IOMUXC_I2C2_SDA__I2C2_SDA 0x400001c2
+ >;
+ };
+
+ pinctrl_i2c3: i2c3grp {
+ fsl,pins = <
+ MX8MP_IOMUXC_I2C3_SCL__I2C3_SCL 0x400001c2
+ MX8MP_IOMUXC_I2C3_SDA__I2C3_SDA 0x400001c2
+ >;
+ };
+
+ pinctrl_i2c4: i2c4grp {
+ fsl,pins = <
+ MX8MP_IOMUXC_I2C4_SCL__I2C4_SCL 0x400001c3
+ MX8MP_IOMUXC_I2C4_SDA__I2C4_SDA 0x400001c3
+ >;
+ };
+
+ pinctrl_i2c6: i2c6grp {
+ fsl,pins = <
+ MX8MP_IOMUXC_SAI5_RXFS__I2C6_SCL 0x400001c3
+ MX8MP_IOMUXC_SAI5_RXC__I2C6_SDA 0x400001c3
+ >;
+ };
+
+ pinctrl_pmic: pmicirqgrp {
+ fsl,pins = <
+ MX8MP_IOMUXC_GPIO1_IO03__GPIO1_IO03 0x41
+ >;
+ };
+
+ pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp {
+ fsl,pins = <
+ MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19 0x41
+ >;
+ };
+
+ pinctrl_rtc_int: rtcintgrp {
+ fsl,pins = <
+ MX8MP_IOMUXC_SD1_STROBE__GPIO2_IO11 0x140
+ >;
+ };
+
+ pinctrl_uart2: uart2grp {
+ fsl,pins = <
+ MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX 0x14f
+ MX8MP_IOMUXC_UART2_TXD__UART2_DCE_TX 0x14f
+ >;
+ };
+
+ pinctrl_uart3: uart3grp {
+ fsl,pins = <
+ MX8MP_IOMUXC_UART3_RXD__UART3_DCE_RX 0x49
+ MX8MP_IOMUXC_UART3_TXD__UART3_DCE_TX 0x49
+ >;
+ };
+
+ pinctrl_uart4: uart4grp {
+ fsl,pins = <
+ MX8MP_IOMUXC_UART4_RXD__UART4_DCE_RX 0x49
+ MX8MP_IOMUXC_UART4_TXD__UART4_DCE_TX 0x49
+ >;
+ };
+
+ pinctrl_usdhc2: usdhc2grp {
+ fsl,pins = <
+ MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x190
+ MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d0
+ MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d0
+ MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d0
+ MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d0
+ MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d0
+ >;
+ };
+
+ pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
+ fsl,pins = <
+ MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x194
+ MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d4
+ MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d4
+ MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d4
+ MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d4
+ MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d4
+ >;
+ };
+
+ pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
+ fsl,pins = <
+ MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x196
+ MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d6
+ MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d6
+ MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d6
+ MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d6
+ MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d6
+ >;
+ };
+
+ pinctrl_usdhc2_gpio: usdhc2gpiogrp {
+ fsl,pins = <
+ MX8MP_IOMUXC_SD2_CD_B__GPIO2_IO12 0x1c4
+ >;
+ };
+
+ pinctrl_usdhc3: usdhc3grp {
+ fsl,pins = <
+ MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x190
+ MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d0
+ MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d0
+ MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d0
+ MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d0
+ MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d0
+ MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d0
+ MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d0
+ MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d0
+ MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d0
+ MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x190
+ >;
+ };
+
+ pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {
+ fsl,pins = <
+ MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x194
+ MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d4
+ MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d4
+ MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d4
+ MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d4
+ MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d4
+ MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d4
+ MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d4
+ MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d4
+ MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d4
+ MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x194
+ >;
+ };
+
+ pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {
+ fsl,pins = <
+ MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x196
+ MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d6
+ MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d6
+ MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d6
+ MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d6
+ MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d6
+ MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d6
+ MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d6
+ MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d6
+ MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d6
+ MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x196
+ >;
+ };
+
+ pinctrl_wdog: wdoggrp {
+ fsl,pins = <
+ MX8MP_IOMUXC_GPIO1_IO02__WDOG1_WDOG_B 0xc6
+ >;
+ };
+};
+
diff --git a/arch/arm/dts/imx8mp-evk-u-boot.dtsi b/arch/arm/dts/imx8mp-evk-u-boot.dtsi
index 9ed62f1..51c8438 100644
--- a/arch/arm/dts/imx8mp-evk-u-boot.dtsi
+++ b/arch/arm/dts/imx8mp-evk-u-boot.dtsi
@@ -13,6 +13,22 @@
};
};
+&pinctrl_i2c1 {
+ bootph-all;
+};
+
+&pinctrl_pmic {
+ bootph-all;
+};
+
+&{/soc@0/bus@30800000/i2c@30a20000/pmic@25} {
+ bootph-all;
+};
+
+&{/soc@0/bus@30800000/i2c@30a20000/pmic@25/regulators} {
+ bootph-all;
+};
+
®_usdhc2_vmmc {
u-boot,off-on-delay-us = <20000>;
};
@@ -66,7 +82,7 @@
};
&i2c1 {
- bootph-pre-ram;
+ bootph-all;
};
&i2c2 {
@@ -121,17 +137,3 @@
&wdog1 {
bootph-pre-ram;
};
-
-ðphy0 {
- reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>;
- reset-delay-us = <15000>;
- reset-post-delay-us = <100000>;
-};
-
-&fec {
- phy-reset-gpios = <&gpio4 2 GPIO_ACTIVE_LOW>;
- phy-reset-duration = <15>;
- phy-reset-post-delay = <100>;
-};
-
-
diff --git a/arch/arm/dts/imx8mp-venice-gw72xx-2x-u-boot.dtsi b/arch/arm/dts/imx8mp-venice-gw72xx-2x-u-boot.dtsi
index 7f2609a..525316d 100644
--- a/arch/arm/dts/imx8mp-venice-gw72xx-2x-u-boot.dtsi
+++ b/arch/arm/dts/imx8mp-venice-gw72xx-2x-u-boot.dtsi
@@ -4,6 +4,15 @@
*/
#include "imx8mp-venice-gw702x-u-boot.dtsi"
+&gpio1 {
+ tpm_rst {
+ gpio-hog;
+ output-high;
+ gpios = <11 GPIO_ACTIVE_HIGH>;
+ line-name = "tpm_rst#";
+ };
+};
+
&gpio4 {
dio_1 {
gpio-hog;
diff --git a/arch/arm/dts/imx8mp-venice-gw72xx.dtsi b/arch/arm/dts/imx8mp-venice-gw72xx.dtsi
index e05fdec..4e72612 100644
--- a/arch/arm/dts/imx8mp-venice-gw72xx.dtsi
+++ b/arch/arm/dts/imx8mp-venice-gw72xx.dtsi
@@ -83,8 +83,14 @@
&ecspi2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi2>;
- cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
+ cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>,
+ <&gpio1 10 GPIO_ACTIVE_LOW>;
status = "okay";
+ tpm@1 {
+ compatible = "tcg,tpm_tis-spi";
+ reg = <0x1>;
+ spi-max-frequency = <36000000>;
+ };
};
&gpio4 {
@@ -286,6 +292,7 @@
MX8MP_IOMUXC_ECSPI2_MOSI__ECSPI2_MOSI 0x140
MX8MP_IOMUXC_ECSPI2_MISO__ECSPI2_MISO 0x140
MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13 0x140
+ MX8MP_IOMUXC_GPIO1_IO10__GPIO1_IO10 0x140
>;
};
diff --git a/arch/arm/dts/imx8mp-venice-gw73xx-2x-u-boot.dtsi b/arch/arm/dts/imx8mp-venice-gw73xx-2x-u-boot.dtsi
index 70433c0..4d0e9a1 100644
--- a/arch/arm/dts/imx8mp-venice-gw73xx-2x-u-boot.dtsi
+++ b/arch/arm/dts/imx8mp-venice-gw73xx-2x-u-boot.dtsi
@@ -10,6 +10,15 @@
reset-post-delay-us = <300000>;
};
+&gpio1 {
+ tpm_rst {
+ gpio-hog;
+ output-high;
+ gpios = <11 GPIO_ACTIVE_HIGH>;
+ line-name = "tpm_rst#";
+ };
+};
+
&gpio4 {
dio_1 {
gpio-hog;
diff --git a/arch/arm/dts/imx8mp-venice-gw73xx.dtsi b/arch/arm/dts/imx8mp-venice-gw73xx.dtsi
index 1c05398..88c3c00 100644
--- a/arch/arm/dts/imx8mp-venice-gw73xx.dtsi
+++ b/arch/arm/dts/imx8mp-venice-gw73xx.dtsi
@@ -95,8 +95,14 @@
&ecspi2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi2>;
- cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
+ cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>,
+ <&gpio1 10 GPIO_ACTIVE_LOW>;
status = "okay";
+ tpm@1 {
+ compatible = "tcg,tpm_tis-spi";
+ reg = <0x1>;
+ spi-max-frequency = <36000000>;
+ };
};
&gpio4 {
@@ -327,6 +333,7 @@
MX8MP_IOMUXC_ECSPI2_MOSI__ECSPI2_MOSI 0x140
MX8MP_IOMUXC_ECSPI2_MISO__ECSPI2_MISO 0x140
MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13 0x140
+ MX8MP_IOMUXC_GPIO1_IO10__GPIO1_IO10 0x140
>;
};
diff --git a/arch/arm/dts/imx8mp.dtsi b/arch/arm/dts/imx8mp.dtsi
index 428c604..c9a610b 100644
--- a/arch/arm/dts/imx8mp.dtsi
+++ b/arch/arm/dts/imx8mp.dtsi
@@ -202,6 +202,60 @@
clock-output-names = "clk_ext4";
};
+ funnel {
+ /*
+ * non-configurable funnel don't show up on the AMBA
+ * bus. As such no need to add "arm,primecell".
+ */
+ compatible = "arm,coresight-static-funnel";
+
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ ca_funnel_in_port0: endpoint {
+ remote-endpoint = <&etm0_out_port>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ ca_funnel_in_port1: endpoint {
+ remote-endpoint = <&etm1_out_port>;
+ };
+ };
+
+ port@2 {
+ reg = <2>;
+
+ ca_funnel_in_port2: endpoint {
+ remote-endpoint = <&etm2_out_port>;
+ };
+ };
+
+ port@3 {
+ reg = <3>;
+
+ ca_funnel_in_port3: endpoint {
+ remote-endpoint = <&etm3_out_port>;
+ };
+ };
+ };
+
+ out-ports {
+ port {
+
+ ca_funnel_out_port0: endpoint {
+ remote-endpoint = <&hugo_funnel_in_port0>;
+ };
+ };
+ };
+ };
+
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
@@ -304,6 +358,153 @@
nvmem-cells = <&imx8mp_uid>;
nvmem-cell-names = "soc_unique_id";
+ etm0: etm@28440000 {
+ compatible = "arm,coresight-etm4x", "arm,primecell";
+ reg = <0x28440000 0x1000>;
+ cpu = <&A53_0>;
+ clocks = <&clk IMX8MP_CLK_MAIN_AXI>;
+ clock-names = "apb_pclk";
+
+ out-ports {
+ port {
+ etm0_out_port: endpoint {
+ remote-endpoint = <&ca_funnel_in_port0>;
+ };
+ };
+ };
+ };
+
+ etm1: etm@28540000 {
+ compatible = "arm,coresight-etm4x", "arm,primecell";
+ reg = <0x28540000 0x1000>;
+ cpu = <&A53_1>;
+ clocks = <&clk IMX8MP_CLK_MAIN_AXI>;
+ clock-names = "apb_pclk";
+
+ out-ports {
+ port {
+ etm1_out_port: endpoint {
+ remote-endpoint = <&ca_funnel_in_port1>;
+ };
+ };
+ };
+ };
+
+ etm2: etm@28640000 {
+ compatible = "arm,coresight-etm4x", "arm,primecell";
+ reg = <0x28640000 0x1000>;
+ cpu = <&A53_2>;
+ clocks = <&clk IMX8MP_CLK_MAIN_AXI>;
+ clock-names = "apb_pclk";
+
+ out-ports {
+ port {
+ etm2_out_port: endpoint {
+ remote-endpoint = <&ca_funnel_in_port2>;
+ };
+ };
+ };
+ };
+
+ etm3: etm@28740000 {
+ compatible = "arm,coresight-etm4x", "arm,primecell";
+ reg = <0x28740000 0x1000>;
+ cpu = <&A53_3>;
+ clocks = <&clk IMX8MP_CLK_MAIN_AXI>;
+ clock-names = "apb_pclk";
+
+ out-ports {
+ port {
+ etm3_out_port: endpoint {
+ remote-endpoint = <&ca_funnel_in_port3>;
+ };
+ };
+ };
+ };
+
+ funnel@28c03000 {
+ compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
+ reg = <0x28c03000 0x1000>;
+ clocks = <&clk IMX8MP_CLK_MAIN_AXI>;
+ clock-names = "apb_pclk";
+
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ hugo_funnel_in_port0: endpoint {
+ remote-endpoint = <&ca_funnel_out_port0>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ hugo_funnel_in_port1: endpoint {
+ /* M7 input */
+ };
+ };
+
+ port@2 {
+ reg = <2>;
+
+ hugo_funnel_in_port2: endpoint {
+ /* DSP input */
+ };
+ };
+ /* the other input ports are not connect to anything */
+ };
+
+ out-ports {
+ port {
+ hugo_funnel_out_port0: endpoint {
+ remote-endpoint = <&etf_in_port>;
+ };
+ };
+ };
+ };
+
+ etf@28c04000 {
+ compatible = "arm,coresight-tmc", "arm,primecell";
+ reg = <0x28c04000 0x1000>;
+ clocks = <&clk IMX8MP_CLK_MAIN_AXI>;
+ clock-names = "apb_pclk";
+
+ in-ports {
+ port {
+ etf_in_port: endpoint {
+ remote-endpoint = <&hugo_funnel_out_port0>;
+ };
+ };
+ };
+
+ out-ports {
+ port {
+ etf_out_port: endpoint {
+ remote-endpoint = <&etr_in_port>;
+ };
+ };
+ };
+ };
+
+ etr@28c06000 {
+ compatible = "arm,coresight-tmc", "arm,primecell";
+ reg = <0x28c06000 0x1000>;
+ clocks = <&clk IMX8MP_CLK_MAIN_AXI>;
+ clock-names = "apb_pclk";
+
+ in-ports {
+ port {
+ etr_in_port: endpoint {
+ remote-endpoint = <&etf_out_port>;
+ };
+ };
+ };
+ };
+
aips1: bus@30000000 {
compatible = "fsl,aips-bus", "simple-bus";
reg = <0x30000000 0x400000>;
@@ -497,7 +698,7 @@
snvs_rtc: snvs-rtc-lp {
compatible = "fsl,sec-v4.0-mon-rtc-lp";
- regmap =<&snvs>;
+ regmap = <&snvs>;
offset = <0x34>;
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
@@ -534,26 +735,16 @@
<&clk IMX8MP_CLK_A53_CORE>,
<&clk IMX8MP_CLK_NOC>,
<&clk IMX8MP_CLK_NOC_IO>,
- <&clk IMX8MP_CLK_GIC>,
- <&clk IMX8MP_CLK_AUDIO_AHB>,
- <&clk IMX8MP_CLK_AUDIO_AXI_SRC>,
- <&clk IMX8MP_AUDIO_PLL1>,
- <&clk IMX8MP_AUDIO_PLL2>;
+ <&clk IMX8MP_CLK_GIC>;
assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>,
<&clk IMX8MP_ARM_PLL_OUT>,
<&clk IMX8MP_SYS_PLL2_1000M>,
<&clk IMX8MP_SYS_PLL1_800M>,
- <&clk IMX8MP_SYS_PLL2_500M>,
- <&clk IMX8MP_SYS_PLL1_800M>,
- <&clk IMX8MP_SYS_PLL1_800M>;
+ <&clk IMX8MP_SYS_PLL2_500M>;
assigned-clock-rates = <0>, <0>,
<1000000000>,
<800000000>,
- <500000000>,
- <400000000>,
- <800000000>,
- <393216000>,
- <361267200>;
+ <500000000>;
};
src: reset-controller@30390000 {
@@ -595,6 +786,19 @@
reg = <IMX8MP_POWER_DOMAIN_USB2_PHY>;
};
+ pgc_audio: power-domain@5 {
+ #power-domain-cells = <0>;
+ reg = <IMX8MP_POWER_DOMAIN_AUDIOMIX>;
+ clocks = <&clk IMX8MP_CLK_AUDIO_ROOT>,
+ <&clk IMX8MP_CLK_AUDIO_AXI>;
+ assigned-clocks = <&clk IMX8MP_CLK_AUDIO_AHB>,
+ <&clk IMX8MP_CLK_AUDIO_AXI_SRC>;
+ assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>,
+ <&clk IMX8MP_SYS_PLL1_800M>;
+ assigned-clock-rates = <400000000>,
+ <600000000>;
+ };
+
pgc_gpu2d: power-domain@6 {
#power-domain-cells = <0>;
reg = <IMX8MP_POWER_DOMAIN_GPU2D>;
@@ -653,7 +857,7 @@
pgc_vpumix: power-domain@19 {
#power-domain-cells = <0>;
reg = <IMX8MP_POWER_DOMAIN_VPUMIX>;
- clocks =<&clk IMX8MP_CLK_VPU_ROOT>;
+ clocks = <&clk IMX8MP_CLK_VPU_ROOT>;
};
pgc_vpu_g1: power-domain@20 {
@@ -1147,6 +1351,198 @@
};
};
+ aips5: bus@30c00000 {
+ compatible = "fsl,aips-bus", "simple-bus";
+ reg = <0x30c00000 0x400000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ spba-bus@30c00000 {
+ compatible = "fsl,spba-bus", "simple-bus";
+ reg = <0x30c00000 0x100000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ sai1: sai@30c10000 {
+ compatible = "fsl,imx8mp-sai", "fsl,imx8mq-sai";
+ reg = <0x30c10000 0x10000>;
+ #sound-dai-cells = <0>;
+ clocks = <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SAI1_IPG>,
+ <&clk IMX8MP_CLK_DUMMY>,
+ <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SAI1_MCLK1>,
+ <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SAI1_MCLK2>,
+ <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SAI1_MCLK3>;
+ clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
+ dmas = <&sdma2 0 2 0>, <&sdma2 1 2 0>;
+ dma-names = "rx", "tx";
+ interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+ sai2: sai@30c20000 {
+ compatible = "fsl,imx8mp-sai", "fsl,imx8mq-sai";
+ reg = <0x30c20000 0x10000>;
+ #sound-dai-cells = <0>;
+ clocks = <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SAI2_IPG>,
+ <&clk IMX8MP_CLK_DUMMY>,
+ <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SAI2_MCLK1>,
+ <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SAI2_MCLK2>,
+ <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SAI2_MCLK3>;
+ clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
+ dmas = <&sdma2 2 2 0>, <&sdma2 3 2 0>;
+ dma-names = "rx", "tx";
+ interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+ sai3: sai@30c30000 {
+ compatible = "fsl,imx8mp-sai", "fsl,imx8mq-sai";
+ reg = <0x30c30000 0x10000>;
+ #sound-dai-cells = <0>;
+ clocks = <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SAI3_IPG>,
+ <&clk IMX8MP_CLK_DUMMY>,
+ <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SAI3_MCLK1>,
+ <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SAI3_MCLK2>,
+ <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SAI3_MCLK3>;
+ clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
+ dmas = <&sdma2 4 2 0>, <&sdma2 5 2 0>;
+ dma-names = "rx", "tx";
+ interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+ sai5: sai@30c50000 {
+ compatible = "fsl,imx8mp-sai", "fsl,imx8mq-sai";
+ reg = <0x30c50000 0x10000>;
+ #sound-dai-cells = <0>;
+ clocks = <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SAI5_IPG>,
+ <&clk IMX8MP_CLK_DUMMY>,
+ <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SAI5_MCLK1>,
+ <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SAI5_MCLK2>,
+ <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SAI5_MCLK3>;
+ clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
+ dmas = <&sdma2 8 2 0>, <&sdma2 9 2 0>;
+ dma-names = "rx", "tx";
+ interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+ sai6: sai@30c60000 {
+ compatible = "fsl,imx8mp-sai", "fsl,imx8mq-sai";
+ reg = <0x30c60000 0x10000>;
+ #sound-dai-cells = <0>;
+ clocks = <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SAI6_IPG>,
+ <&clk IMX8MP_CLK_DUMMY>,
+ <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SAI6_MCLK1>,
+ <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SAI6_MCLK2>,
+ <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SAI6_MCLK3>;
+ clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
+ dmas = <&sdma2 10 2 0>, <&sdma2 11 2 0>;
+ dma-names = "rx", "tx";
+ interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+ sai7: sai@30c80000 {
+ compatible = "fsl,imx8mp-sai", "fsl,imx8mq-sai";
+ reg = <0x30c80000 0x10000>;
+ #sound-dai-cells = <0>;
+ clocks = <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SAI7_IPG>,
+ <&clk IMX8MP_CLK_DUMMY>,
+ <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SAI7_MCLK1>,
+ <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SAI7_MCLK2>,
+ <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SAI7_MCLK3>;
+ clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
+ dmas = <&sdma2 12 2 0>, <&sdma2 13 2 0>;
+ dma-names = "rx", "tx";
+ interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+ easrc: easrc@30c90000 {
+ compatible = "fsl,imx8mp-easrc", "fsl,imx8mn-easrc";
+ reg = <0x30c90000 0x10000>;
+ interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_ASRC_IPG>;
+ clock-names = "mem";
+ dmas = <&sdma2 16 23 0> , <&sdma2 17 23 0>,
+ <&sdma2 18 23 0> , <&sdma2 19 23 0>,
+ <&sdma2 20 23 0> , <&sdma2 21 23 0>,
+ <&sdma2 22 23 0> , <&sdma2 23 23 0>;
+ dma-names = "ctx0_rx", "ctx0_tx",
+ "ctx1_rx", "ctx1_tx",
+ "ctx2_rx", "ctx2_tx",
+ "ctx3_rx", "ctx3_tx";
+ firmware-name = "imx/easrc/easrc-imx8mn.bin";
+ fsl,asrc-rate = <8000>;
+ fsl,asrc-format = <2>;
+ status = "disabled";
+ };
+
+ micfil: audio-controller@30ca0000 {
+ compatible = "fsl,imx8mp-micfil";
+ reg = <0x30ca0000 0x10000>;
+ #sound-dai-cells = <0>;
+ interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_PDM_IPG>,
+ <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_PDM_SEL>,
+ <&clk IMX8MP_AUDIO_PLL1_OUT>,
+ <&clk IMX8MP_AUDIO_PLL2_OUT>,
+ <&clk IMX8MP_CLK_EXT3>;
+ clock-names = "ipg_clk", "ipg_clk_app",
+ "pll8k", "pll11k", "clkext3";
+ dmas = <&sdma2 24 25 0x80000000>;
+ dma-names = "rx";
+ status = "disabled";
+ };
+
+ };
+
+ sdma3: dma-controller@30e00000 {
+ compatible = "fsl,imx8mp-sdma", "fsl,imx8mq-sdma";
+ reg = <0x30e00000 0x10000>;
+ #dma-cells = <3>;
+ clocks = <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SDMA3_ROOT>,
+ <&clk IMX8MP_CLK_AUDIO_ROOT>;
+ clock-names = "ipg", "ahb";
+ interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
+ fsl,sdma-ram-script-name = "imx/sdma/sdma-imx7d.bin";
+ };
+
+ sdma2: dma-controller@30e10000 {
+ compatible = "fsl,imx8mp-sdma", "fsl,imx8mq-sdma";
+ reg = <0x30e10000 0x10000>;
+ #dma-cells = <3>;
+ clocks = <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SDMA2_ROOT>,
+ <&clk IMX8MP_CLK_AUDIO_ROOT>;
+ clock-names = "ipg", "ahb";
+ interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
+ fsl,sdma-ram-script-name = "imx/sdma/sdma-imx7d.bin";
+ };
+
+ audio_blk_ctrl: clock-controller@30e20000 {
+ compatible = "fsl,imx8mp-audio-blk-ctrl";
+ reg = <0x30e20000 0x10000>;
+ #clock-cells = <1>;
+ clocks = <&clk IMX8MP_CLK_AUDIO_ROOT>,
+ <&clk IMX8MP_CLK_SAI1>,
+ <&clk IMX8MP_CLK_SAI2>,
+ <&clk IMX8MP_CLK_SAI3>,
+ <&clk IMX8MP_CLK_SAI5>,
+ <&clk IMX8MP_CLK_SAI6>,
+ <&clk IMX8MP_CLK_SAI7>;
+ clock-names = "ahb",
+ "sai1", "sai2", "sai3",
+ "sai5", "sai6", "sai7";
+ power-domains = <&pgc_audio>;
+ };
+ };
+
noc: interconnect@32700000 {
compatible = "fsl,imx8mp-noc", "fsl,imx8m-noc";
reg = <0x32700000 0x100000>;
@@ -1174,6 +1570,118 @@
#size-cells = <1>;
ranges;
+ isi_0: isi@32e00000 {
+ compatible = "fsl,imx8mp-isi";
+ reg = <0x32e00000 0x4000>;
+ interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MP_CLK_MEDIA_AXI_ROOT>,
+ <&clk IMX8MP_CLK_MEDIA_APB_ROOT>;
+ clock-names = "axi", "apb";
+ fsl,blk-ctrl = <&media_blk_ctrl>;
+ power-domains = <&media_blk_ctrl IMX8MP_MEDIABLK_PD_ISI>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ isi_in_0: endpoint {
+ remote-endpoint = <&mipi_csi_0_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ isi_in_1: endpoint {
+ remote-endpoint = <&mipi_csi_1_out>;
+ };
+ };
+ };
+ };
+
+ dewarp: dwe@32e30000 {
+ compatible = "nxp,imx8mp-dw100";
+ reg = <0x32e30000 0x10000>;
+ interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MP_CLK_MEDIA_AXI_ROOT>,
+ <&clk IMX8MP_CLK_MEDIA_APB_ROOT>;
+ clock-names = "axi", "ahb";
+ power-domains = <&media_blk_ctrl IMX8MP_MEDIABLK_PD_DWE>;
+ };
+
+ mipi_csi_0: csi@32e40000 {
+ compatible = "fsl,imx8mp-mipi-csi2", "fsl,imx8mm-mipi-csi2";
+ reg = <0x32e40000 0x10000>;
+ interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
+ clock-frequency = <500000000>;
+ clocks = <&clk IMX8MP_CLK_MEDIA_APB_ROOT>,
+ <&clk IMX8MP_CLK_MEDIA_CAM1_PIX_ROOT>,
+ <&clk IMX8MP_CLK_MEDIA_MIPI_PHY1_REF_ROOT>,
+ <&clk IMX8MP_CLK_MEDIA_AXI_ROOT>;
+ clock-names = "pclk", "wrap", "phy", "axi";
+ assigned-clocks = <&clk IMX8MP_CLK_MEDIA_CAM1_PIX>;
+ assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_1000M>;
+ assigned-clock-rates = <500000000>;
+ power-domains = <&media_blk_ctrl IMX8MP_MEDIABLK_PD_MIPI_CSI2_1>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ };
+
+ port@1 {
+ reg = <1>;
+
+ mipi_csi_0_out: endpoint {
+ remote-endpoint = <&isi_in_0>;
+ };
+ };
+ };
+ };
+
+ mipi_csi_1: csi@32e50000 {
+ compatible = "fsl,imx8mp-mipi-csi2", "fsl,imx8mm-mipi-csi2";
+ reg = <0x32e50000 0x10000>;
+ interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
+ clock-frequency = <266000000>;
+ clocks = <&clk IMX8MP_CLK_MEDIA_APB_ROOT>,
+ <&clk IMX8MP_CLK_MEDIA_CAM2_PIX_ROOT>,
+ <&clk IMX8MP_CLK_MEDIA_MIPI_PHY1_REF_ROOT>,
+ <&clk IMX8MP_CLK_MEDIA_AXI_ROOT>;
+ clock-names = "pclk", "wrap", "phy", "axi";
+ assigned-clocks = <&clk IMX8MP_CLK_MEDIA_CAM2_PIX>;
+ assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_1000M>;
+ assigned-clock-rates = <266000000>;
+ power-domains = <&media_blk_ctrl IMX8MP_MEDIABLK_PD_MIPI_CSI2_2>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ };
+
+ port@1 {
+ reg = <1>;
+
+ mipi_csi_1_out: endpoint {
+ remote-endpoint = <&isi_in_1>;
+ };
+ };
+ };
+ };
+
mipi_dsi: dsi@32e60000 {
compatible = "fsl,imx8mp-mipi-dsim";
reg = <0x32e60000 0x400>;
@@ -1382,8 +1890,8 @@
#size-cells = <2>;
device_type = "pci";
bus-range = <0x00 0xff>;
- ranges = <0x81000000 0 0x00000000 0x1ff80000 0 0x00010000>, /* downstream I/O 64KB */
- <0x82000000 0 0x18000000 0x18000000 0 0x07f00000>; /* non-prefetchable memory */
+ ranges = <0x81000000 0 0x00000000 0x1ff80000 0 0x00010000>, /* downstream I/O 64KB */
+ <0x82000000 0 0x18000000 0x18000000 0 0x07f00000>; /* non-prefetchable memory */
num-lanes = <1>;
num-viewport = <4>;
interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi b/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi
index a9dffa5..a99ba99 100644
--- a/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi
+++ b/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi
@@ -3,6 +3,8 @@
* Copyright 2022 NXP
*/
+#include "imx93-u-boot.dtsi"
+
/ {
wdt-reboot {
compatible = "wdt-reboot";
@@ -131,10 +133,6 @@
phy-reset-post-delay = <100>;
};
-&eqos {
- compatible = "fsl,imx-eqos";
-};
-
ðphy1 {
reset-gpios = <&pcal6524 15 GPIO_ACTIVE_LOW>;
reset-assert-us = <15000>;
diff --git a/arch/arm/dts/imx93-u-boot.dtsi b/arch/arm/dts/imx93-u-boot.dtsi
new file mode 100644
index 0000000..40e17bb
--- /dev/null
+++ b/arch/arm/dts/imx93-u-boot.dtsi
@@ -0,0 +1,88 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2023 Mathieu Othacehe <m.othacehe@gmail.com>
+ */
+
+/ {
+ binman: binman {
+ multiple-images;
+ };
+};
+
+&binman {
+ u-boot-spl-ddr {
+ align = <4>;
+ align-size = <4>;
+ filename = "u-boot-spl-ddr.bin";
+ pad-byte = <0xff>;
+
+ u-boot-spl {
+ align-end = <4>;
+ filename = "u-boot-spl.bin";
+ };
+
+ ddr-1d-imem-fw {
+ filename = "lpddr4_imem_1d_v202201.bin";
+ align-end = <4>;
+ type = "blob-ext";
+ };
+
+ ddr-1d-dmem-fw {
+ filename = "lpddr4_dmem_1d_v202201.bin";
+ align-end = <4>;
+ type = "blob-ext";
+ };
+
+ ddr-2d-imem-fw {
+ filename = "lpddr4_imem_2d_v202201.bin";
+ align-end = <4>;
+ type = "blob-ext";
+ };
+
+ ddr-2d-dmem-fw {
+ filename = "lpddr4_dmem_2d_v202201.bin";
+ align-end = <4>;
+ type = "blob-ext";
+ };
+ };
+
+ spl {
+ filename = "spl.bin";
+
+ mkimage {
+ args = "-n spl/u-boot-spl.cfgout -T imx8image -e 0x2049A000";
+
+ blob {
+ filename = "u-boot-spl-ddr.bin";
+ };
+ };
+ };
+
+ u-boot-container {
+ filename = "u-boot-container.bin";
+
+ mkimage {
+ args = "-n u-boot-container.cfgout -T imx8image -e 0x0";
+
+ blob {
+ filename = "u-boot.bin";
+ };
+ };
+ };
+
+ imx-boot {
+ filename = "flash.bin";
+ pad-byte = <0x00>;
+
+ spl: blob-ext@1 {
+ filename = "spl.bin";
+ offset = <0x0>;
+ align-size = <0x400>;
+ align = <0x400>;
+ };
+
+ uboot: blob-ext@2 {
+ filename = "u-boot-container.bin";
+ };
+ };
+};
diff --git a/arch/arm/dts/imx93-var-som-symphony-u-boot.dtsi b/arch/arm/dts/imx93-var-som-symphony-u-boot.dtsi
new file mode 100644
index 0000000..1193fc0
--- /dev/null
+++ b/arch/arm/dts/imx93-var-som-symphony-u-boot.dtsi
@@ -0,0 +1,266 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2022 NXP
+ * Copyright 2023 Variscite Ltd.
+ */
+
+#include "imx93-u-boot.dtsi"
+
+/ {
+ wdt-reboot {
+ compatible = "wdt-reboot";
+ wdt = <&wdog3>;
+ bootph-pre-ram;
+ bootph-some-ram;
+ };
+
+ aliases {
+ ethernet0 = &eqos;
+ ethernet1 = &fec;
+ };
+
+ firmware {
+ optee {
+ compatible = "linaro,optee-tz";
+ method = "smc";
+ };
+ };
+};
+
+&{/soc@0} {
+ bootph-all;
+ bootph-pre-ram;
+};
+
+&aips1 {
+ bootph-pre-ram;
+ bootph-all;
+};
+
+&aips2 {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
+&aips3 {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
+&iomuxc {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
+®_usdhc2_vmmc {
+ u-boot,off-on-delay-us = <20000>;
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
+&pinctrl_reg_usdhc2_vmmc {
+ bootph-pre-ram;
+};
+
+&pinctrl_uart1 {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
+&pinctrl_usdhc2 {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
+&gpio1 {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
+&gpio2 {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
+&gpio3 {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
+&gpio4 {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
+&lpuart1 {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
+&usdhc1 {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
+&usdhc2 {
+ bootph-pre-ram;
+ bootph-some-ram;
+ fsl,signal-voltage-switch-extra-delay-ms = <8>;
+};
+
+ðphy0 {
+ reset-gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
+ reset-assert-us = <15000>;
+ reset-deassert-us = <100000>;
+};
+
+ðphy1 {
+ reset-gpios = <&pca9534 5 GPIO_ACTIVE_LOW>;
+ reset-assert-us = <15000>;
+ reset-deassert-us = <100000>;
+};
+
+&s4muap {
+ bootph-pre-ram;
+ bootph-some-ram;
+ status = "okay";
+};
+
+&clk {
+ bootph-all;
+ bootph-pre-ram;
+ /delete-property/ assigned-clocks;
+ /delete-property/ assigned-clock-rates;
+};
+
+&osc_32k {
+ bootph-all;
+ bootph-pre-ram;
+};
+
+&osc_24m {
+ bootph-all;
+ bootph-pre-ram;
+};
+
+&clk_ext1 {
+ bootph-all;
+ bootph-pre-ram;
+};
+
+/*
+ * The two nodes below won't be needed once nxp,pca9451a
+ * support is added to the Linux kernel.
+ */
+&iomuxc {
+ pinctrl_lpi2c3: lpi2c3grp {
+ bootph-pre-ram;
+ fsl,pins = <
+ MX93_PAD_GPIO_IO28__LPI2C3_SDA 0x40000b9e
+ MX93_PAD_GPIO_IO29__LPI2C3_SCL 0x40000b9e
+ >;
+ };
+};
+
+&lpi2c3 {
+ bootph-pre-ram;
+ bootph-some-ram;
+ clock-frequency = <400000>;
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&pinctrl_lpi2c3>;
+ pinctrl-1 = <&pinctrl_lpi2c3>;
+ status = "okay";
+
+ pmic@25 {
+ bootph-pre-ram;
+ bootph-some-ram;
+ compatible = "nxp,pca9451a";
+ reg = <0x25>;
+ pinctrl-names = "default";
+
+ regulators {
+ bootph-pre-ram;
+ buck1: BUCK1 {
+ regulator-name = "BUCK1";
+ regulator-min-microvolt = <600000>;
+ regulator-max-microvolt = <2187500>;
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-ramp-delay = <3125>;
+ };
+
+ buck2: BUCK2 {
+ regulator-name = "BUCK2";
+ regulator-min-microvolt = <600000>;
+ regulator-max-microvolt = <2187500>;
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-ramp-delay = <3125>;
+ };
+
+ buck4: BUCK4{
+ regulator-name = "BUCK4";
+ regulator-min-microvolt = <600000>;
+ regulator-max-microvolt = <3400000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ buck5: BUCK5{
+ regulator-name = "BUCK5";
+ regulator-min-microvolt = <600000>;
+ regulator-max-microvolt = <3400000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ buck6: BUCK6 {
+ regulator-name = "BUCK6";
+ regulator-min-microvolt = <600000>;
+ regulator-max-microvolt = <3400000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldo1: LDO1 {
+ regulator-name = "LDO1";
+ regulator-min-microvolt = <1600000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldo2: LDO2 {
+ regulator-name = "LDO2";
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <1150000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldo3: LDO3 {
+ regulator-name = "LDO3";
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldo4: LDO4 {
+ regulator-name = "LDO4";
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldo5: LDO5 {
+ regulator-name = "LDO5";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+ };
+ };
+};
diff --git a/arch/arm/dts/imx93-var-som-symphony.dts b/arch/arm/dts/imx93-var-som-symphony.dts
new file mode 100644
index 0000000..a67bd00
--- /dev/null
+++ b/arch/arm/dts/imx93-var-som-symphony.dts
@@ -0,0 +1,305 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2021 NXP
+ * Copyright 2023 Variscite Ltd.
+ */
+
+/dts-v1/;
+
+#include "imx93-var-som.dtsi"
+
+/{
+ model = "Variscite VAR-SOM-MX93 on Symphony evaluation board";
+ compatible = "variscite,var-som-mx93-symphony",
+ "variscite,var-som-mx93", "fsl,imx93";
+
+ aliases {
+ ethernet0 = &eqos;
+ ethernet1 = &fec;
+ };
+
+ chosen {
+ stdout-path = &lpuart1;
+ };
+
+ /*
+ * Needed only for Symphony <= v1.5
+ */
+ reg_fec_phy: regulator-fec-phy {
+ compatible = "regulator-fixed";
+ regulator-name = "fec-phy";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-enable-ramp-delay = <20000>;
+ gpio = <&pca9534 7 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ regulator-always-on;
+ };
+
+ reg_usdhc2_vmmc: regulator-usdhc2 {
+ compatible = "regulator-fixed";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
+ regulator-name = "VSD_3V3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ gpio = <&gpio2 18 GPIO_ACTIVE_HIGH>;
+ off-on-delay-us = <20000>;
+ enable-active-high;
+ };
+
+ reg_vref_1v8: regulator-adc-vref {
+ compatible = "regulator-fixed";
+ regulator-name = "vref_1v8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+
+ reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ ethosu_mem: ethosu-region@88000000 {
+ compatible = "shared-dma-pool";
+ reusable;
+ reg = <0x0 0x88000000 0x0 0x8000000>;
+ };
+
+ vdev0vring0: vdev0vring0@87ee0000 {
+ reg = <0 0x87ee0000 0 0x8000>;
+ no-map;
+ };
+
+ vdev0vring1: vdev0vring1@87ee8000 {
+ reg = <0 0x87ee8000 0 0x8000>;
+ no-map;
+ };
+
+ vdev1vring0: vdev1vring0@87ef0000 {
+ reg = <0 0x87ef0000 0 0x8000>;
+ no-map;
+ };
+
+ vdev1vring1: vdev1vring1@87ef8000 {
+ reg = <0 0x87ef8000 0 0x8000>;
+ no-map;
+ };
+
+ rsc_table: rsc-table@2021f000 {
+ reg = <0 0x2021f000 0 0x1000>;
+ no-map;
+ };
+
+ vdevbuffer: vdevbuffer@87f00000 {
+ compatible = "shared-dma-pool";
+ reg = <0 0x87f00000 0 0x100000>;
+ no-map;
+ };
+
+ ele_reserved: ele-reserved@87de0000 {
+ compatible = "shared-dma-pool";
+ reg = <0 0x87de0000 0 0x100000>;
+ no-map;
+ };
+ };
+};
+
+/* Use external instead of internal RTC*/
+&bbnsm_rtc {
+ status = "disabled";
+};
+
+&eqos {
+ mdio {
+ ethphy1: ethernet-phy@5 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <5>;
+ qca,disable-smarteee;
+ eee-broken-1000t;
+ reset-gpios = <&pca9534 5 GPIO_ACTIVE_LOW>;
+ reset-assert-us = <10000>;
+ reset-deassert-us = <20000>;
+ vddio-supply = <&vddio1>;
+
+ vddio1: vddio-regulator {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+ };
+ };
+};
+
+&fec {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_fec>;
+ phy-mode = "rgmii";
+ phy-handle = <ðphy1>;
+ phy-supply = <®_fec_phy>;
+ status = "okay";
+};
+
+&flexcan1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_flexcan1>;
+ status = "okay";
+};
+
+&iomuxc {
+ pinctrl_fec: fecgrp {
+ fsl,pins = <
+ MX93_PAD_ENET2_RD0__ENET1_RGMII_RD0 0x57e
+ MX93_PAD_ENET2_RD1__ENET1_RGMII_RD1 0x57e
+ MX93_PAD_ENET2_RD2__ENET1_RGMII_RD2 0x57e
+ MX93_PAD_ENET2_RD3__ENET1_RGMII_RD3 0x57e
+ MX93_PAD_ENET2_RXC__ENET1_RGMII_RXC 0x5fe
+ MX93_PAD_ENET2_RX_CTL__ENET1_RGMII_RX_CTL 0x57e
+ MX93_PAD_ENET2_TD0__ENET1_RGMII_TD0 0x57e
+ MX93_PAD_ENET2_TD1__ENET1_RGMII_TD1 0x57e
+ MX93_PAD_ENET2_TD2__ENET1_RGMII_TD2 0x57e
+ MX93_PAD_ENET2_TD3__ENET1_RGMII_TD3 0x57e
+ MX93_PAD_ENET2_TXC__ENET1_RGMII_TXC 0x5fe
+ MX93_PAD_ENET2_TX_CTL__ENET1_RGMII_TX_CTL 0x57e
+ >;
+ };
+
+ pinctrl_flexcan1: flexcan1grp {
+ fsl,pins = <
+ MX93_PAD_PDM_CLK__CAN1_TX 0x139e
+ MX93_PAD_PDM_BIT_STREAM0__CAN1_RX 0x139e
+ >;
+ };
+
+ pinctrl_lpi2c1: lpi2c1grp {
+ fsl,pins = <
+ MX93_PAD_I2C1_SCL__LPI2C1_SCL 0x40000b9e
+ MX93_PAD_I2C1_SDA__LPI2C1_SDA 0x40000b9e
+ >;
+ };
+
+ pinctrl_lpi2c1_gpio: lpi2c1gpiogrp {
+ fsl,pins = <
+ MX93_PAD_I2C1_SCL__GPIO1_IO00 0x31e
+ MX93_PAD_I2C1_SDA__GPIO1_IO01 0x31e
+ >;
+ };
+
+ pinctrl_lpi2c5: lpi2c5grp {
+ fsl,pins = <
+ MX93_PAD_GPIO_IO23__LPI2C5_SCL 0x40000b9e
+ MX93_PAD_GPIO_IO22__LPI2C5_SDA 0x40000b9e
+ >;
+ };
+
+ pinctrl_lpi2c5_gpio: lpi2c5gpiogrp {
+ fsl,pins = <
+ MX93_PAD_GPIO_IO23__GPIO2_IO23 0x31e
+ MX93_PAD_GPIO_IO22__GPIO2_IO22 0x31e
+ >;
+ };
+
+ pinctrl_pca9534: pca9534grp {
+ fsl,pins = <
+ MX93_PAD_CCM_CLKO1__GPIO3_IO26 0x31e
+ >;
+ };
+
+ pinctrl_uart1: uart1grp {
+ fsl,pins = <
+ MX93_PAD_UART1_RXD__LPUART1_RX 0x31e
+ MX93_PAD_UART1_TXD__LPUART1_TX 0x31e
+ >;
+ };
+
+ pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp {
+ fsl,pins = <
+ MX93_PAD_GPIO_IO18__GPIO2_IO18 0x31e
+ >;
+ };
+
+ pinctrl_usdhc2: usdhc2grp {
+ fsl,pins = <
+ MX93_PAD_SD2_CLK__USDHC2_CLK 0x15fe
+ MX93_PAD_SD2_CMD__USDHC2_CMD 0x13fe
+ MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x13fe
+ MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x13fe
+ MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x13fe
+ MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x13fe
+ MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e
+ >;
+ };
+
+ pinctrl_usdhc2_gpio: usdhc2gpiogrp {
+ fsl,pins = <
+ MX93_PAD_SD2_CD_B__GPIO3_IO00 0x31e
+ >;
+ };
+};
+
+&lpi2c1 {
+ clock-frequency = <400000>;
+ pinctrl-names = "default", "sleep", "gpio";
+ pinctrl-0 = <&pinctrl_lpi2c1>;
+ pinctrl-1 = <&pinctrl_lpi2c1_gpio>;
+ pinctrl-2 = <&pinctrl_lpi2c1_gpio>;
+ scl-gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>;
+ sda-gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
+ status = "okay";
+
+ /* DS1337 RTC module */
+ rtc@68 {
+ compatible = "dallas,ds1337";
+ reg = <0x68>;
+ };
+};
+
+&lpi2c5 {
+ clock-frequency = <400000>;
+ pinctrl-names = "default", "sleep", "gpio";
+ pinctrl-0 = <&pinctrl_lpi2c5>;
+ pinctrl-1 = <&pinctrl_lpi2c5_gpio>;
+ pinctrl-2 = <&pinctrl_lpi2c5_gpio>;
+ scl-gpios = <&gpio2 23 GPIO_ACTIVE_HIGH>;
+ sda-gpios = <&gpio2 22 GPIO_ACTIVE_HIGH>;
+ status = "okay";
+
+ pca9534: gpio@20 {
+ compatible = "nxp,pca9534";
+ reg = <0x20>;
+ gpio-controller;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pca9534>;
+ interrupt-parent = <&gpio3>;
+ interrupts = <26 IRQ_TYPE_EDGE_FALLING>;
+ #gpio-cells = <2>;
+ wakeup-source;
+ };
+};
+
+/* Console */
+&lpuart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart1>;
+ clocks = <&clk IMX93_CLK_LPUART1_GATE>, <&clk IMX93_CLK_LPUART1_GATE>;
+ clock-names = "ipg", "per";
+ status = "okay";
+};
+
+/* SD */
+&usdhc2 {
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
+ pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
+ pinctrl-1 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
+ pinctrl-2 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
+ cd-gpios = <&gpio3 00 GPIO_ACTIVE_LOW>;
+ vmmc-supply = <®_usdhc2_vmmc>;
+ bus-width = <4>;
+ status = "okay";
+ no-sdio;
+ no-mmc;
+};
+
+/* Watchdog */
+&wdog3 {
+ status = "okay";
+};
diff --git a/arch/arm/dts/imx93-var-som.dtsi b/arch/arm/dts/imx93-var-som.dtsi
new file mode 100644
index 0000000..6c77b88
--- /dev/null
+++ b/arch/arm/dts/imx93-var-som.dtsi
@@ -0,0 +1,111 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2022 NXP
+ * Copyright 2023 Variscite Ltd.
+ */
+
+/dts-v1/;
+
+#include "imx93.dtsi"
+
+/{
+ model = "Variscite VAR-SOM-MX93 module";
+ compatible = "variscite,var-som-mx93", "fsl,imx93";
+
+ mmc_pwrseq: mmc-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ post-power-on-delay-ms = <100>;
+ power-off-delay-us = <10000>;
+ reset-gpios = <&gpio4 14 GPIO_ACTIVE_LOW>, /* WIFI_RESET */
+ <&gpio3 7 GPIO_ACTIVE_LOW>; /* WIFI_PWR_EN */
+ };
+
+ reg_eqos_phy: regulator-eqos-phy {
+ compatible = "regulator-fixed";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_reg_eqos_phy>;
+ regulator-name = "eth_phy_pwr";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ gpio = <&gpio1 7 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ startup-delay-us = <100000>;
+ regulator-always-on;
+ };
+};
+
+&eqos {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_eqos>;
+ phy-mode = "rgmii";
+ phy-handle = <ðphy0>;
+ phy-supply = <®_eqos_phy>;
+ status = "okay";
+
+ mdio {
+ compatible = "snps,dwmac-mdio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clock-frequency = <1000000>;
+
+ ethphy0: ethernet-phy@0 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <0>;
+ eee-broken-1000t;
+ };
+ };
+};
+
+&iomuxc {
+ pinctrl_eqos: eqosgrp {
+ fsl,pins = <
+ MX93_PAD_ENET1_MDC__ENET_QOS_MDC 0x57e
+ MX93_PAD_ENET1_MDIO__ENET_QOS_MDIO 0x57e
+ MX93_PAD_ENET1_RD0__ENET_QOS_RGMII_RD0 0x57e
+ MX93_PAD_ENET1_RD1__ENET_QOS_RGMII_RD1 0x57e
+ MX93_PAD_ENET1_RD2__ENET_QOS_RGMII_RD2 0x57e
+ MX93_PAD_ENET1_RD3__ENET_QOS_RGMII_RD3 0x57e
+ MX93_PAD_ENET1_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK 0x5fe
+ MX93_PAD_ENET1_RX_CTL__ENET_QOS_RGMII_RX_CTL 0x57e
+ MX93_PAD_ENET1_TD0__ENET_QOS_RGMII_TD0 0x57e
+ MX93_PAD_ENET1_TD1__ENET_QOS_RGMII_TD1 0x57e
+ MX93_PAD_ENET1_TD2__ENET_QOS_RGMII_TD2 0x57e
+ MX93_PAD_ENET1_TD3__ENET_QOS_RGMII_TD3 0x57e
+ MX93_PAD_ENET1_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK 0x5fe
+ MX93_PAD_ENET1_TX_CTL__ENET_QOS_RGMII_TX_CTL 0x57e
+ >;
+ };
+
+ pinctrl_reg_eqos_phy: regeqosgrp {
+ fsl,pins = <
+ MX93_PAD_UART2_TXD__GPIO1_IO07 0x51e
+ >;
+ };
+
+ pinctrl_usdhc1: usdhc1grp {
+ fsl,pins = <
+ MX93_PAD_SD1_CLK__USDHC1_CLK 0x15fe
+ MX93_PAD_SD1_CMD__USDHC1_CMD 0x13fe
+ MX93_PAD_SD1_DATA0__USDHC1_DATA0 0x13fe
+ MX93_PAD_SD1_DATA1__USDHC1_DATA1 0x13fe
+ MX93_PAD_SD1_DATA2__USDHC1_DATA2 0x13fe
+ MX93_PAD_SD1_DATA3__USDHC1_DATA3 0x13fe
+ MX93_PAD_SD1_DATA4__USDHC1_DATA4 0x13fe
+ MX93_PAD_SD1_DATA5__USDHC1_DATA5 0x13fe
+ MX93_PAD_SD1_DATA6__USDHC1_DATA6 0x13fe
+ MX93_PAD_SD1_DATA7__USDHC1_DATA7 0x13fe
+ MX93_PAD_SD1_STROBE__USDHC1_STROBE 0x15fe
+ >;
+ };
+};
+
+/* eMMC */
+&usdhc1 {
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
+ pinctrl-0 = <&pinctrl_usdhc1>;
+ pinctrl-1 = <&pinctrl_usdhc1>;
+ pinctrl-2 = <&pinctrl_usdhc1>;
+ bus-width = <8>;
+ non-removable;
+ status = "okay";
+};
diff --git a/arch/arm/dts/k3-am62-main.dtsi b/arch/arm/dts/k3-am62-main.dtsi
index 284b90c..e5c64c8 100644
--- a/arch/arm/dts/k3-am62-main.dtsi
+++ b/arch/arm/dts/k3-am62-main.dtsi
@@ -81,7 +81,8 @@
};
dmss: bus@48000000 {
- compatible = "simple-mfd";
+ bootph-all;
+ compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
dma-ranges;
@@ -90,6 +91,7 @@
ti,sci-dev-id = <25>;
secure_proxy_main: mailbox@4d000000 {
+ bootph-all;
compatible = "ti,am654-secure-proxy";
#mbox-cells = <1>;
reg-names = "target_data", "rt", "scfg";
@@ -165,6 +167,7 @@
};
dmsc: system-controller@44043000 {
+ bootph-all;
compatible = "ti,k2g-sci";
ti,host-id = <12>;
mbox-names = "rx", "tx";
@@ -174,16 +177,19 @@
reg = <0x00 0x44043000 0x00 0xfe0>;
k3_pds: power-controller {
+ bootph-all;
compatible = "ti,sci-pm-domain";
#power-domain-cells = <2>;
};
k3_clks: clock-controller {
+ bootph-all;
compatible = "ti,k2g-sci-clk";
#clock-cells = <2>;
};
k3_reset: reset-controller {
+ bootph-all;
compatible = "ti,sci-reset";
#reset-cells = <2>;
};
@@ -202,6 +208,7 @@
};
secure_proxy_sa3: mailbox@43600000 {
+ bootph-pre-ram;
compatible = "ti,am654-secure-proxy";
#mbox-cells = <1>;
reg-names = "target_data", "rt", "scfg";
@@ -217,6 +224,7 @@
};
main_pmx0: pinctrl@f4000 {
+ bootph-all;
compatible = "pinctrl-single";
reg = <0x00 0xf4000 0x00 0x2ac>;
#pinctrl-cells = <1>;
@@ -225,12 +233,14 @@
};
main_esm: esm@420000 {
+ bootph-pre-ram;
compatible = "ti,j721e-esm";
reg = <0x00 0x420000 0x00 0x1000>;
ti,esm-pins = <160>, <161>, <162>, <163>, <177>, <178>;
};
main_timer0: timer@2400000 {
+ bootph-all;
compatible = "ti,am654-timer";
reg = <0x00 0x2400000 0x00 0x400>;
interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/arch/arm/dts/k3-am62-mcu.dtsi b/arch/arm/dts/k3-am62-mcu.dtsi
index 80a3e1d..0e0b234 100644
--- a/arch/arm/dts/k3-am62-mcu.dtsi
+++ b/arch/arm/dts/k3-am62-mcu.dtsi
@@ -7,6 +7,7 @@
&cbass_mcu {
mcu_pmx0: pinctrl@4084000 {
+ bootph-all;
compatible = "pinctrl-single";
reg = <0x00 0x04084000 0x00 0x88>;
#pinctrl-cells = <1>;
@@ -15,6 +16,7 @@
};
mcu_esm: esm@4100000 {
+ bootph-pre-ram;
compatible = "ti,j721e-esm";
reg = <0x00 0x4100000 0x00 0x1000>;
ti,esm-pins = <0>, <1>, <2>, <85>;
diff --git a/arch/arm/dts/k3-am62-phycore-som-ddr4-2gb.dtsi b/arch/arm/dts/k3-am62-phycore-som-ddr4-2gb.dtsi
new file mode 100644
index 0000000..235cb99
--- /dev/null
+++ b/arch/arm/dts/k3-am62-phycore-som-ddr4-2gb.dtsi
@@ -0,0 +1,2190 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * This file was generated with the
+ * AM62x SysConfig DDR Subsystem Register Configuration Tool v0.09.05
+ * Fri Feb 03 2023 10:59:20 GMT+0100 (Mitteleuropäische Normalzeit)
+ * DDR Type: DDR4
+ * Frequency = 800MHz (1600MTs)
+ * Density: 16Gb
+ * Number of Ranks: 1
+*/
+
+#define DDRSS_PLL_FHS_CNT 6
+#define DDRSS_PLL_FREQUENCY_1 400000000
+#define DDRSS_PLL_FREQUENCY_2 400000000
+
+
+#define DDRSS_CTL_0_DATA 0x00000A00
+#define DDRSS_CTL_1_DATA 0x00000000
+#define DDRSS_CTL_2_DATA 0x00000000
+#define DDRSS_CTL_3_DATA 0x00000000
+#define DDRSS_CTL_4_DATA 0x00000000
+#define DDRSS_CTL_5_DATA 0x00000000
+#define DDRSS_CTL_6_DATA 0x00000000
+#define DDRSS_CTL_7_DATA 0x000890B8
+#define DDRSS_CTL_8_DATA 0x00000000
+#define DDRSS_CTL_9_DATA 0x00000000
+#define DDRSS_CTL_10_DATA 0x00000000
+#define DDRSS_CTL_11_DATA 0x000890B8
+#define DDRSS_CTL_12_DATA 0x00000000
+#define DDRSS_CTL_13_DATA 0x00000000
+#define DDRSS_CTL_14_DATA 0x00000000
+#define DDRSS_CTL_15_DATA 0x000890B8
+#define DDRSS_CTL_16_DATA 0x00000000
+#define DDRSS_CTL_17_DATA 0x00000000
+#define DDRSS_CTL_18_DATA 0x00000000
+#define DDRSS_CTL_19_DATA 0x01010100
+#define DDRSS_CTL_20_DATA 0x01000100
+#define DDRSS_CTL_21_DATA 0x01000110
+#define DDRSS_CTL_22_DATA 0x02010002
+#define DDRSS_CTL_23_DATA 0x00027100
+#define DDRSS_CTL_24_DATA 0x00061A80
+#define DDRSS_CTL_25_DATA 0x02550255
+#define DDRSS_CTL_26_DATA 0x00000255
+#define DDRSS_CTL_27_DATA 0x00000000
+#define DDRSS_CTL_28_DATA 0x00000000
+#define DDRSS_CTL_29_DATA 0x00000000
+#define DDRSS_CTL_30_DATA 0x00000000
+#define DDRSS_CTL_31_DATA 0x00000000
+#define DDRSS_CTL_32_DATA 0x00000000
+#define DDRSS_CTL_33_DATA 0x00000000
+#define DDRSS_CTL_34_DATA 0x00000000
+#define DDRSS_CTL_35_DATA 0x00000000
+#define DDRSS_CTL_36_DATA 0x00000000
+#define DDRSS_CTL_37_DATA 0x00000000
+#define DDRSS_CTL_38_DATA 0x0400091C
+#define DDRSS_CTL_39_DATA 0x1C1C1C1C
+#define DDRSS_CTL_40_DATA 0x0400091C
+#define DDRSS_CTL_41_DATA 0x1C1C1C1C
+#define DDRSS_CTL_42_DATA 0x0400091C
+#define DDRSS_CTL_43_DATA 0x1C1C1C1C
+#define DDRSS_CTL_44_DATA 0x05050404
+#define DDRSS_CTL_45_DATA 0x00002706
+#define DDRSS_CTL_46_DATA 0x0602001D
+#define DDRSS_CTL_47_DATA 0x05001D0B
+#define DDRSS_CTL_48_DATA 0x00270605
+#define DDRSS_CTL_49_DATA 0x0602001D
+#define DDRSS_CTL_50_DATA 0x05001D0B
+#define DDRSS_CTL_51_DATA 0x00270605
+#define DDRSS_CTL_52_DATA 0x0602001D
+#define DDRSS_CTL_53_DATA 0x07001D0B
+#define DDRSS_CTL_54_DATA 0x00180807
+#define DDRSS_CTL_55_DATA 0x04006DB0
+#define DDRSS_CTL_56_DATA 0x07070009
+#define DDRSS_CTL_57_DATA 0x00001808
+#define DDRSS_CTL_58_DATA 0x04006DB0
+#define DDRSS_CTL_59_DATA 0x07070009
+#define DDRSS_CTL_60_DATA 0x00001808
+#define DDRSS_CTL_61_DATA 0x04006DB0
+#define DDRSS_CTL_62_DATA 0x03000009
+#define DDRSS_CTL_63_DATA 0x0D0C0002
+#define DDRSS_CTL_64_DATA 0x0D0C0D0C
+#define DDRSS_CTL_65_DATA 0x01010000
+#define DDRSS_CTL_66_DATA 0x03191919
+#define DDRSS_CTL_67_DATA 0x0B0B0B0B
+#define DDRSS_CTL_68_DATA 0x00000B0B
+#define DDRSS_CTL_69_DATA 0x00000101
+#define DDRSS_CTL_70_DATA 0x00000000
+#define DDRSS_CTL_71_DATA 0x01000000
+#define DDRSS_CTL_72_DATA 0x01180803
+#define DDRSS_CTL_73_DATA 0x00000C30
+#define DDRSS_CTL_74_DATA 0x00000118
+#define DDRSS_CTL_75_DATA 0x00000C30
+#define DDRSS_CTL_76_DATA 0x00000118
+#define DDRSS_CTL_77_DATA 0x00000C30
+#define DDRSS_CTL_78_DATA 0x00000005
+#define DDRSS_CTL_79_DATA 0x00000000
+#define DDRSS_CTL_80_DATA 0x00000000
+#define DDRSS_CTL_81_DATA 0x00000000
+#define DDRSS_CTL_82_DATA 0x00000000
+#define DDRSS_CTL_83_DATA 0x00000000
+#define DDRSS_CTL_84_DATA 0x00000000
+#define DDRSS_CTL_85_DATA 0x00000000
+#define DDRSS_CTL_86_DATA 0x00000000
+#define DDRSS_CTL_87_DATA 0x00090009
+#define DDRSS_CTL_88_DATA 0x00000009
+#define DDRSS_CTL_89_DATA 0x00000000
+#define DDRSS_CTL_90_DATA 0x00000000
+#define DDRSS_CTL_91_DATA 0x00000000
+#define DDRSS_CTL_92_DATA 0x00000000
+#define DDRSS_CTL_93_DATA 0x00000000
+#define DDRSS_CTL_94_DATA 0x00010001
+#define DDRSS_CTL_95_DATA 0x00025501
+#define DDRSS_CTL_96_DATA 0x02550120
+#define DDRSS_CTL_97_DATA 0x02550120
+#define DDRSS_CTL_98_DATA 0x01200120
+#define DDRSS_CTL_99_DATA 0x01200120
+#define DDRSS_CTL_100_DATA 0x00000000
+#define DDRSS_CTL_101_DATA 0x00000000
+#define DDRSS_CTL_102_DATA 0x00000000
+#define DDRSS_CTL_103_DATA 0x00000000
+#define DDRSS_CTL_104_DATA 0x00000000
+#define DDRSS_CTL_105_DATA 0x00000000
+#define DDRSS_CTL_106_DATA 0x03010000
+#define DDRSS_CTL_107_DATA 0x00010000
+#define DDRSS_CTL_108_DATA 0x00000000
+#define DDRSS_CTL_109_DATA 0x01000000
+#define DDRSS_CTL_110_DATA 0x80104002
+#define DDRSS_CTL_111_DATA 0x00040003
+#define DDRSS_CTL_112_DATA 0x00040005
+#define DDRSS_CTL_113_DATA 0x00030000
+#define DDRSS_CTL_114_DATA 0x00050004
+#define DDRSS_CTL_115_DATA 0x00000004
+#define DDRSS_CTL_116_DATA 0x00040003
+#define DDRSS_CTL_117_DATA 0x00040005
+#define DDRSS_CTL_118_DATA 0x00000000
+#define DDRSS_CTL_119_DATA 0x00030C00
+#define DDRSS_CTL_120_DATA 0x00030C00
+#define DDRSS_CTL_121_DATA 0x00030C00
+#define DDRSS_CTL_122_DATA 0x00030C00
+#define DDRSS_CTL_123_DATA 0x00030C00
+#define DDRSS_CTL_124_DATA 0x00000000
+#define DDRSS_CTL_125_DATA 0x00005550
+#define DDRSS_CTL_126_DATA 0x00030C00
+#define DDRSS_CTL_127_DATA 0x00030C00
+#define DDRSS_CTL_128_DATA 0x00030C00
+#define DDRSS_CTL_129_DATA 0x00030C00
+#define DDRSS_CTL_130_DATA 0x00030C00
+#define DDRSS_CTL_131_DATA 0x00000000
+#define DDRSS_CTL_132_DATA 0x00005550
+#define DDRSS_CTL_133_DATA 0x00030C00
+#define DDRSS_CTL_134_DATA 0x00030C00
+#define DDRSS_CTL_135_DATA 0x00030C00
+#define DDRSS_CTL_136_DATA 0x00030C00
+#define DDRSS_CTL_137_DATA 0x00030C00
+#define DDRSS_CTL_138_DATA 0x00000000
+#define DDRSS_CTL_139_DATA 0x00005550
+#define DDRSS_CTL_140_DATA 0x00000000
+#define DDRSS_CTL_141_DATA 0x00000000
+#define DDRSS_CTL_142_DATA 0x00000000
+#define DDRSS_CTL_143_DATA 0x00000000
+#define DDRSS_CTL_144_DATA 0x00000000
+#define DDRSS_CTL_145_DATA 0x00000000
+#define DDRSS_CTL_146_DATA 0x00000000
+#define DDRSS_CTL_147_DATA 0x00000000
+#define DDRSS_CTL_148_DATA 0x00000000
+#define DDRSS_CTL_149_DATA 0x00000000
+#define DDRSS_CTL_150_DATA 0x00000000
+#define DDRSS_CTL_151_DATA 0x00000000
+#define DDRSS_CTL_152_DATA 0x00000000
+#define DDRSS_CTL_153_DATA 0x00000000
+#define DDRSS_CTL_154_DATA 0x00000000
+#define DDRSS_CTL_155_DATA 0x00000000
+#define DDRSS_CTL_156_DATA 0x080C0000
+#define DDRSS_CTL_157_DATA 0x080C080C
+#define DDRSS_CTL_158_DATA 0x08000000
+#define DDRSS_CTL_159_DATA 0x00000808
+#define DDRSS_CTL_160_DATA 0x000E0000
+#define DDRSS_CTL_161_DATA 0x00080808
+#define DDRSS_CTL_162_DATA 0x0E000000
+#define DDRSS_CTL_163_DATA 0x08080800
+#define DDRSS_CTL_164_DATA 0x00000000
+#define DDRSS_CTL_165_DATA 0x0000080E
+#define DDRSS_CTL_166_DATA 0x00040003
+#define DDRSS_CTL_167_DATA 0x00000007
+#define DDRSS_CTL_168_DATA 0x00000000
+#define DDRSS_CTL_169_DATA 0x00000000
+#define DDRSS_CTL_170_DATA 0x00000000
+#define DDRSS_CTL_171_DATA 0x00000000
+#define DDRSS_CTL_172_DATA 0x00000000
+#define DDRSS_CTL_173_DATA 0x00000000
+#define DDRSS_CTL_174_DATA 0x01000000
+#define DDRSS_CTL_175_DATA 0x00000000
+#define DDRSS_CTL_176_DATA 0x00001500
+#define DDRSS_CTL_177_DATA 0x0000100E
+#define DDRSS_CTL_178_DATA 0x00000000
+#define DDRSS_CTL_179_DATA 0x00000000
+#define DDRSS_CTL_180_DATA 0x00000001
+#define DDRSS_CTL_181_DATA 0x00000002
+#define DDRSS_CTL_182_DATA 0x00000C00
+#define DDRSS_CTL_183_DATA 0x00001000
+#define DDRSS_CTL_184_DATA 0x00000C00
+#define DDRSS_CTL_185_DATA 0x00001000
+#define DDRSS_CTL_186_DATA 0x00000C00
+#define DDRSS_CTL_187_DATA 0x00001000
+#define DDRSS_CTL_188_DATA 0x00000000
+#define DDRSS_CTL_189_DATA 0x00000000
+#define DDRSS_CTL_190_DATA 0x00000000
+#define DDRSS_CTL_191_DATA 0x00000000
+#define DDRSS_CTL_192_DATA 0x00000000
+#define DDRSS_CTL_193_DATA 0x00000000
+#define DDRSS_CTL_194_DATA 0x00000000
+#define DDRSS_CTL_195_DATA 0x00000000
+#define DDRSS_CTL_196_DATA 0x00000000
+#define DDRSS_CTL_197_DATA 0x00000000
+#define DDRSS_CTL_198_DATA 0x00000000
+#define DDRSS_CTL_199_DATA 0x00000000
+#define DDRSS_CTL_200_DATA 0x00000000
+#define DDRSS_CTL_201_DATA 0x00000000
+#define DDRSS_CTL_202_DATA 0x00000000
+#define DDRSS_CTL_203_DATA 0x00000000
+#define DDRSS_CTL_204_DATA 0x00042400
+#define DDRSS_CTL_205_DATA 0x00000301
+#define DDRSS_CTL_206_DATA 0x000000C0
+#define DDRSS_CTL_207_DATA 0x00000424
+#define DDRSS_CTL_208_DATA 0x00000301
+#define DDRSS_CTL_209_DATA 0x000000C0
+#define DDRSS_CTL_210_DATA 0x00000424
+#define DDRSS_CTL_211_DATA 0x00000301
+#define DDRSS_CTL_212_DATA 0x000000C0
+#define DDRSS_CTL_213_DATA 0x00000424
+#define DDRSS_CTL_214_DATA 0x00000301
+#define DDRSS_CTL_215_DATA 0x000000C0
+#define DDRSS_CTL_216_DATA 0x00000424
+#define DDRSS_CTL_217_DATA 0x00000301
+#define DDRSS_CTL_218_DATA 0x000000C0
+#define DDRSS_CTL_219_DATA 0x00000424
+#define DDRSS_CTL_220_DATA 0x00000301
+#define DDRSS_CTL_221_DATA 0x000000C0
+#define DDRSS_CTL_222_DATA 0x00000000
+#define DDRSS_CTL_223_DATA 0x00000000
+#define DDRSS_CTL_224_DATA 0x00000000
+#define DDRSS_CTL_225_DATA 0x00000000
+#define DDRSS_CTL_226_DATA 0x00000000
+#define DDRSS_CTL_227_DATA 0x00000000
+#define DDRSS_CTL_228_DATA 0x00000000
+#define DDRSS_CTL_229_DATA 0x00000000
+#define DDRSS_CTL_230_DATA 0x0000000C
+#define DDRSS_CTL_231_DATA 0x0000000C
+#define DDRSS_CTL_232_DATA 0x0000000C
+#define DDRSS_CTL_233_DATA 0x0000000C
+#define DDRSS_CTL_234_DATA 0x0000000C
+#define DDRSS_CTL_235_DATA 0x0000000C
+#define DDRSS_CTL_236_DATA 0x00001401
+#define DDRSS_CTL_237_DATA 0x00001401
+#define DDRSS_CTL_238_DATA 0x00001401
+#define DDRSS_CTL_239_DATA 0x00001401
+#define DDRSS_CTL_240_DATA 0x00001401
+#define DDRSS_CTL_241_DATA 0x00001401
+#define DDRSS_CTL_242_DATA 0x00000493
+#define DDRSS_CTL_243_DATA 0x00000493
+#define DDRSS_CTL_244_DATA 0x00000493
+#define DDRSS_CTL_245_DATA 0x00000493
+#define DDRSS_CTL_246_DATA 0x00000493
+#define DDRSS_CTL_247_DATA 0x00000493
+#define DDRSS_CTL_248_DATA 0x00000000
+#define DDRSS_CTL_249_DATA 0x00000000
+#define DDRSS_CTL_250_DATA 0x00000000
+#define DDRSS_CTL_251_DATA 0x00000000
+#define DDRSS_CTL_252_DATA 0x00000000
+#define DDRSS_CTL_253_DATA 0x00000000
+#define DDRSS_CTL_254_DATA 0x00000000
+#define DDRSS_CTL_255_DATA 0x00000000
+#define DDRSS_CTL_256_DATA 0x00000000
+#define DDRSS_CTL_257_DATA 0x00000000
+#define DDRSS_CTL_258_DATA 0x00000000
+#define DDRSS_CTL_259_DATA 0x00000000
+#define DDRSS_CTL_260_DATA 0x00000000
+#define DDRSS_CTL_261_DATA 0x00000000
+#define DDRSS_CTL_262_DATA 0x00000000
+#define DDRSS_CTL_263_DATA 0x00000000
+#define DDRSS_CTL_264_DATA 0x00000000
+#define DDRSS_CTL_265_DATA 0x00000000
+#define DDRSS_CTL_266_DATA 0x00000000
+#define DDRSS_CTL_267_DATA 0x00000000
+#define DDRSS_CTL_268_DATA 0x00000000
+#define DDRSS_CTL_269_DATA 0x00000000
+#define DDRSS_CTL_270_DATA 0x00000000
+#define DDRSS_CTL_271_DATA 0x00000000
+#define DDRSS_CTL_272_DATA 0x00000000
+#define DDRSS_CTL_273_DATA 0x00000000
+#define DDRSS_CTL_274_DATA 0x00000000
+#define DDRSS_CTL_275_DATA 0x00000000
+#define DDRSS_CTL_276_DATA 0x00000000
+#define DDRSS_CTL_277_DATA 0x00010000
+#define DDRSS_CTL_278_DATA 0x00000000
+#define DDRSS_CTL_279_DATA 0x00000000
+#define DDRSS_CTL_280_DATA 0x00000000
+#define DDRSS_CTL_281_DATA 0x00000101
+#define DDRSS_CTL_282_DATA 0x00000000
+#define DDRSS_CTL_283_DATA 0x00000000
+#define DDRSS_CTL_284_DATA 0x00000000
+#define DDRSS_CTL_285_DATA 0x00000000
+#define DDRSS_CTL_286_DATA 0x00000000
+#define DDRSS_CTL_287_DATA 0x00000000
+#define DDRSS_CTL_288_DATA 0x00000000
+#define DDRSS_CTL_289_DATA 0x00000000
+#define DDRSS_CTL_290_DATA 0x0C181511
+#define DDRSS_CTL_291_DATA 0x00000304
+#define DDRSS_CTL_292_DATA 0x00000000
+#define DDRSS_CTL_293_DATA 0x00000000
+#define DDRSS_CTL_294_DATA 0x00000000
+#define DDRSS_CTL_295_DATA 0x00000000
+#define DDRSS_CTL_296_DATA 0x00000000
+#define DDRSS_CTL_297_DATA 0x00000000
+#define DDRSS_CTL_298_DATA 0x00000000
+#define DDRSS_CTL_299_DATA 0x00000000
+#define DDRSS_CTL_300_DATA 0x00000000
+#define DDRSS_CTL_301_DATA 0x00000000
+#define DDRSS_CTL_302_DATA 0x00000000
+#define DDRSS_CTL_303_DATA 0x00000000
+#define DDRSS_CTL_304_DATA 0x00000000
+#define DDRSS_CTL_305_DATA 0x00040000
+#define DDRSS_CTL_306_DATA 0x00800200
+#define DDRSS_CTL_307_DATA 0x00000000
+#define DDRSS_CTL_308_DATA 0x02000400
+#define DDRSS_CTL_309_DATA 0x00000080
+#define DDRSS_CTL_310_DATA 0x00040000
+#define DDRSS_CTL_311_DATA 0x00800200
+#define DDRSS_CTL_312_DATA 0x00000000
+#define DDRSS_CTL_313_DATA 0x00000000
+#define DDRSS_CTL_314_DATA 0x00000000
+#define DDRSS_CTL_315_DATA 0x00000100
+#define DDRSS_CTL_316_DATA 0x01010000
+#define DDRSS_CTL_317_DATA 0x00000000
+#define DDRSS_CTL_318_DATA 0x3FFF0000
+#define DDRSS_CTL_319_DATA 0x000FFF00
+#define DDRSS_CTL_320_DATA 0xFFFFFFFF
+#define DDRSS_CTL_321_DATA 0x00FFFF00
+#define DDRSS_CTL_322_DATA 0x0A000000
+#define DDRSS_CTL_323_DATA 0x0001FFFF
+#define DDRSS_CTL_324_DATA 0x01010101
+#define DDRSS_CTL_325_DATA 0x01010101
+#define DDRSS_CTL_326_DATA 0x00000118
+#define DDRSS_CTL_327_DATA 0x00000C01
+#define DDRSS_CTL_328_DATA 0x00000000
+#define DDRSS_CTL_329_DATA 0x00000000
+#define DDRSS_CTL_330_DATA 0x00000000
+#define DDRSS_CTL_331_DATA 0x01000000
+#define DDRSS_CTL_332_DATA 0x00000100
+#define DDRSS_CTL_333_DATA 0x00010000
+#define DDRSS_CTL_334_DATA 0x00000000
+#define DDRSS_CTL_335_DATA 0x00000000
+#define DDRSS_CTL_336_DATA 0x00000000
+#define DDRSS_CTL_337_DATA 0x00000000
+#define DDRSS_CTL_338_DATA 0x00000000
+#define DDRSS_CTL_339_DATA 0x00000000
+#define DDRSS_CTL_340_DATA 0x00000000
+#define DDRSS_CTL_341_DATA 0x00000000
+#define DDRSS_CTL_342_DATA 0x00000000
+#define DDRSS_CTL_343_DATA 0x00000000
+#define DDRSS_CTL_344_DATA 0x00000000
+#define DDRSS_CTL_345_DATA 0x00000000
+#define DDRSS_CTL_346_DATA 0x00000000
+#define DDRSS_CTL_347_DATA 0x00000000
+#define DDRSS_CTL_348_DATA 0x00000000
+#define DDRSS_CTL_349_DATA 0x00000000
+#define DDRSS_CTL_350_DATA 0x00000000
+#define DDRSS_CTL_351_DATA 0x00000000
+#define DDRSS_CTL_352_DATA 0x00000000
+#define DDRSS_CTL_353_DATA 0x00000000
+#define DDRSS_CTL_354_DATA 0x00000000
+#define DDRSS_CTL_355_DATA 0x00000000
+#define DDRSS_CTL_356_DATA 0x00000000
+#define DDRSS_CTL_357_DATA 0x00000000
+#define DDRSS_CTL_358_DATA 0x00000000
+#define DDRSS_CTL_359_DATA 0x00000000
+#define DDRSS_CTL_360_DATA 0x00000000
+#define DDRSS_CTL_361_DATA 0x00000000
+#define DDRSS_CTL_362_DATA 0x00000000
+#define DDRSS_CTL_363_DATA 0x00000000
+#define DDRSS_CTL_364_DATA 0x00000000
+#define DDRSS_CTL_365_DATA 0x00000000
+#define DDRSS_CTL_366_DATA 0x00000000
+#define DDRSS_CTL_367_DATA 0x00000000
+#define DDRSS_CTL_368_DATA 0x00000000
+#define DDRSS_CTL_369_DATA 0x00000000
+#define DDRSS_CTL_370_DATA 0x0C000000
+#define DDRSS_CTL_371_DATA 0x060C0606
+#define DDRSS_CTL_372_DATA 0x06060C06
+#define DDRSS_CTL_373_DATA 0x00010101
+#define DDRSS_CTL_374_DATA 0x02000000
+#define DDRSS_CTL_375_DATA 0x05020101
+#define DDRSS_CTL_376_DATA 0x00000505
+#define DDRSS_CTL_377_DATA 0x02020200
+#define DDRSS_CTL_378_DATA 0x02020202
+#define DDRSS_CTL_379_DATA 0x02020202
+#define DDRSS_CTL_380_DATA 0x02020202
+#define DDRSS_CTL_381_DATA 0x00000000
+#define DDRSS_CTL_382_DATA 0x00000000
+#define DDRSS_CTL_383_DATA 0x04000100
+#define DDRSS_CTL_384_DATA 0x1E000004
+#define DDRSS_CTL_385_DATA 0x00001860
+#define DDRSS_CTL_386_DATA 0x00000200
+#define DDRSS_CTL_387_DATA 0x00000200
+#define DDRSS_CTL_388_DATA 0x00000200
+#define DDRSS_CTL_389_DATA 0x00000200
+#define DDRSS_CTL_390_DATA 0x00006DB0
+#define DDRSS_CTL_391_DATA 0x0000F3C0
+#define DDRSS_CTL_392_DATA 0x0C0D0302
+#define DDRSS_CTL_393_DATA 0x001E090A
+#define DDRSS_CTL_394_DATA 0x00001860
+#define DDRSS_CTL_395_DATA 0x00000200
+#define DDRSS_CTL_396_DATA 0x00000200
+#define DDRSS_CTL_397_DATA 0x00000200
+#define DDRSS_CTL_398_DATA 0x00000200
+#define DDRSS_CTL_399_DATA 0x00006DB0
+#define DDRSS_CTL_400_DATA 0x0000F3C0
+#define DDRSS_CTL_401_DATA 0x0C0D0302
+#define DDRSS_CTL_402_DATA 0x001E090A
+#define DDRSS_CTL_403_DATA 0x00001860
+#define DDRSS_CTL_404_DATA 0x00000200
+#define DDRSS_CTL_405_DATA 0x00000200
+#define DDRSS_CTL_406_DATA 0x00000200
+#define DDRSS_CTL_407_DATA 0x00000200
+#define DDRSS_CTL_408_DATA 0x00006DB0
+#define DDRSS_CTL_409_DATA 0x0000F3C0
+#define DDRSS_CTL_410_DATA 0x0C0D0302
+#define DDRSS_CTL_411_DATA 0x0000090A
+#define DDRSS_CTL_412_DATA 0x00000000
+#define DDRSS_CTL_413_DATA 0x0302000A
+#define DDRSS_CTL_414_DATA 0x01000500
+#define DDRSS_CTL_415_DATA 0x01010001
+#define DDRSS_CTL_416_DATA 0x00010001
+#define DDRSS_CTL_417_DATA 0x01010001
+#define DDRSS_CTL_418_DATA 0x02010000
+#define DDRSS_CTL_419_DATA 0x00000200
+#define DDRSS_CTL_420_DATA 0x02000201
+#define DDRSS_CTL_421_DATA 0x00000000
+#define DDRSS_CTL_422_DATA 0x00202020
+#define DDRSS_PI_0_DATA 0x00000A00
+#define DDRSS_PI_1_DATA 0x00000000
+#define DDRSS_PI_2_DATA 0x00000000
+#define DDRSS_PI_3_DATA 0x01000000
+#define DDRSS_PI_4_DATA 0x00000001
+#define DDRSS_PI_5_DATA 0x00010064
+#define DDRSS_PI_6_DATA 0x00000000
+#define DDRSS_PI_7_DATA 0x00000000
+#define DDRSS_PI_8_DATA 0x00000000
+#define DDRSS_PI_9_DATA 0x00000000
+#define DDRSS_PI_10_DATA 0x00000000
+#define DDRSS_PI_11_DATA 0x00000000
+#define DDRSS_PI_12_DATA 0x00000000
+#define DDRSS_PI_13_DATA 0x00010001
+#define DDRSS_PI_14_DATA 0x00000000
+#define DDRSS_PI_15_DATA 0x00010001
+#define DDRSS_PI_16_DATA 0x00000005
+#define DDRSS_PI_17_DATA 0x00000000
+#define DDRSS_PI_18_DATA 0x00000000
+#define DDRSS_PI_19_DATA 0x00000000
+#define DDRSS_PI_20_DATA 0x00000000
+#define DDRSS_PI_21_DATA 0x00000000
+#define DDRSS_PI_22_DATA 0x00000000
+#define DDRSS_PI_23_DATA 0x00000000
+#define DDRSS_PI_24_DATA 0x280D0001
+#define DDRSS_PI_25_DATA 0x00000000
+#define DDRSS_PI_26_DATA 0x00010000
+#define DDRSS_PI_27_DATA 0x00003200
+#define DDRSS_PI_28_DATA 0x00000000
+#define DDRSS_PI_29_DATA 0x00000000
+#define DDRSS_PI_30_DATA 0x00060602
+#define DDRSS_PI_31_DATA 0x00000000
+#define DDRSS_PI_32_DATA 0x00000000
+#define DDRSS_PI_33_DATA 0x00000000
+#define DDRSS_PI_34_DATA 0x00000001
+#define DDRSS_PI_35_DATA 0x00000055
+#define DDRSS_PI_36_DATA 0x000000AA
+#define DDRSS_PI_37_DATA 0x000000AD
+#define DDRSS_PI_38_DATA 0x00000052
+#define DDRSS_PI_39_DATA 0x0000006A
+#define DDRSS_PI_40_DATA 0x00000095
+#define DDRSS_PI_41_DATA 0x00000095
+#define DDRSS_PI_42_DATA 0x000000AD
+#define DDRSS_PI_43_DATA 0x00000000
+#define DDRSS_PI_44_DATA 0x00000000
+#define DDRSS_PI_45_DATA 0x00010100
+#define DDRSS_PI_46_DATA 0x00000014
+#define DDRSS_PI_47_DATA 0x000007D0
+#define DDRSS_PI_48_DATA 0x00000300
+#define DDRSS_PI_49_DATA 0x00000000
+#define DDRSS_PI_50_DATA 0x00000000
+#define DDRSS_PI_51_DATA 0x01000000
+#define DDRSS_PI_52_DATA 0x00010101
+#define DDRSS_PI_53_DATA 0x01000000
+#define DDRSS_PI_54_DATA 0x00000000
+#define DDRSS_PI_55_DATA 0x00010000
+#define DDRSS_PI_56_DATA 0x00000000
+#define DDRSS_PI_57_DATA 0x00000000
+#define DDRSS_PI_58_DATA 0x00000000
+#define DDRSS_PI_59_DATA 0x00000000
+#define DDRSS_PI_60_DATA 0x00001400
+#define DDRSS_PI_61_DATA 0x00000000
+#define DDRSS_PI_62_DATA 0x01000000
+#define DDRSS_PI_63_DATA 0x00000404
+#define DDRSS_PI_64_DATA 0x00000001
+#define DDRSS_PI_65_DATA 0x0001010E
+#define DDRSS_PI_66_DATA 0x02040100
+#define DDRSS_PI_67_DATA 0x00010000
+#define DDRSS_PI_68_DATA 0x00000034
+#define DDRSS_PI_69_DATA 0x00000000
+#define DDRSS_PI_70_DATA 0x00000000
+#define DDRSS_PI_71_DATA 0x00000000
+#define DDRSS_PI_72_DATA 0x00000000
+#define DDRSS_PI_73_DATA 0x00000000
+#define DDRSS_PI_74_DATA 0x00000000
+#define DDRSS_PI_75_DATA 0x00000005
+#define DDRSS_PI_76_DATA 0x01000000
+#define DDRSS_PI_77_DATA 0x04000100
+#define DDRSS_PI_78_DATA 0x00020000
+#define DDRSS_PI_79_DATA 0x00010002
+#define DDRSS_PI_80_DATA 0x00000001
+#define DDRSS_PI_81_DATA 0x00020001
+#define DDRSS_PI_82_DATA 0x00020002
+#define DDRSS_PI_83_DATA 0x00000000
+#define DDRSS_PI_84_DATA 0x00000000
+#define DDRSS_PI_85_DATA 0x00000000
+#define DDRSS_PI_86_DATA 0x00000000
+#define DDRSS_PI_87_DATA 0x00000000
+#define DDRSS_PI_88_DATA 0x00000000
+#define DDRSS_PI_89_DATA 0x00000000
+#define DDRSS_PI_90_DATA 0x00000000
+#define DDRSS_PI_91_DATA 0x00000300
+#define DDRSS_PI_92_DATA 0x0A090B0C
+#define DDRSS_PI_93_DATA 0x04060708
+#define DDRSS_PI_94_DATA 0x01000005
+#define DDRSS_PI_95_DATA 0x00000800
+#define DDRSS_PI_96_DATA 0x00000000
+#define DDRSS_PI_97_DATA 0x00010008
+#define DDRSS_PI_98_DATA 0x00000000
+#define DDRSS_PI_99_DATA 0x0000AA00
+#define DDRSS_PI_100_DATA 0x00000000
+#define DDRSS_PI_101_DATA 0x00010000
+#define DDRSS_PI_102_DATA 0x00000000
+#define DDRSS_PI_103_DATA 0x00000000
+#define DDRSS_PI_104_DATA 0x00000000
+#define DDRSS_PI_105_DATA 0x00000000
+#define DDRSS_PI_106_DATA 0x00000000
+#define DDRSS_PI_107_DATA 0x00000000
+#define DDRSS_PI_108_DATA 0x00000000
+#define DDRSS_PI_109_DATA 0x00000000
+#define DDRSS_PI_110_DATA 0x00000000
+#define DDRSS_PI_111_DATA 0x00000000
+#define DDRSS_PI_112_DATA 0x00000000
+#define DDRSS_PI_113_DATA 0x00000000
+#define DDRSS_PI_114_DATA 0x00000000
+#define DDRSS_PI_115_DATA 0x00000000
+#define DDRSS_PI_116_DATA 0x00000000
+#define DDRSS_PI_117_DATA 0x00000000
+#define DDRSS_PI_118_DATA 0x00000000
+#define DDRSS_PI_119_DATA 0x00000000
+#define DDRSS_PI_120_DATA 0x00000000
+#define DDRSS_PI_121_DATA 0x00000000
+#define DDRSS_PI_122_DATA 0x00000000
+#define DDRSS_PI_123_DATA 0x00000000
+#define DDRSS_PI_124_DATA 0x00000008
+#define DDRSS_PI_125_DATA 0x00000000
+#define DDRSS_PI_126_DATA 0x00000000
+#define DDRSS_PI_127_DATA 0x00000000
+#define DDRSS_PI_128_DATA 0x00000000
+#define DDRSS_PI_129_DATA 0x00000000
+#define DDRSS_PI_130_DATA 0x00000000
+#define DDRSS_PI_131_DATA 0x00000000
+#define DDRSS_PI_132_DATA 0x00000000
+#define DDRSS_PI_133_DATA 0x00010100
+#define DDRSS_PI_134_DATA 0x00000000
+#define DDRSS_PI_135_DATA 0x00000000
+#define DDRSS_PI_136_DATA 0x00027100
+#define DDRSS_PI_137_DATA 0x00061A80
+#define DDRSS_PI_138_DATA 0x00000100
+#define DDRSS_PI_139_DATA 0x00000000
+#define DDRSS_PI_140_DATA 0x00000000
+#define DDRSS_PI_141_DATA 0x00000000
+#define DDRSS_PI_142_DATA 0x00000000
+#define DDRSS_PI_143_DATA 0x00000000
+#define DDRSS_PI_144_DATA 0x01000000
+#define DDRSS_PI_145_DATA 0x00010003
+#define DDRSS_PI_146_DATA 0x02000101
+#define DDRSS_PI_147_DATA 0x01030001
+#define DDRSS_PI_148_DATA 0x00010400
+#define DDRSS_PI_149_DATA 0x06000105
+#define DDRSS_PI_150_DATA 0x01070001
+#define DDRSS_PI_151_DATA 0x00000000
+#define DDRSS_PI_152_DATA 0x00000000
+#define DDRSS_PI_153_DATA 0x00000000
+#define DDRSS_PI_154_DATA 0x00010000
+#define DDRSS_PI_155_DATA 0x00000000
+#define DDRSS_PI_156_DATA 0x00000000
+#define DDRSS_PI_157_DATA 0x00000000
+#define DDRSS_PI_158_DATA 0x00000000
+#define DDRSS_PI_159_DATA 0x00010000
+#define DDRSS_PI_160_DATA 0x00000004
+#define DDRSS_PI_161_DATA 0x00000000
+#define DDRSS_PI_162_DATA 0x00000000
+#define DDRSS_PI_163_DATA 0x00000000
+#define DDRSS_PI_164_DATA 0x00007800
+#define DDRSS_PI_165_DATA 0x00780078
+#define DDRSS_PI_166_DATA 0x00141414
+#define DDRSS_PI_167_DATA 0x0000003A
+#define DDRSS_PI_168_DATA 0x0000003A
+#define DDRSS_PI_169_DATA 0x0004003A
+#define DDRSS_PI_170_DATA 0x04000400
+#define DDRSS_PI_171_DATA 0xC8040009
+#define DDRSS_PI_172_DATA 0x0400091C
+#define DDRSS_PI_173_DATA 0x00091CC8
+#define DDRSS_PI_174_DATA 0x001CC804
+#define DDRSS_PI_175_DATA 0x00000118
+#define DDRSS_PI_176_DATA 0x00000C30
+#define DDRSS_PI_177_DATA 0x00000118
+#define DDRSS_PI_178_DATA 0x00000C30
+#define DDRSS_PI_179_DATA 0x00000118
+#define DDRSS_PI_180_DATA 0x04000C30
+#define DDRSS_PI_181_DATA 0x01010404
+#define DDRSS_PI_182_DATA 0x00001901
+#define DDRSS_PI_183_DATA 0x00190019
+#define DDRSS_PI_184_DATA 0x010C010C
+#define DDRSS_PI_185_DATA 0x0000010C
+#define DDRSS_PI_186_DATA 0x00000000
+#define DDRSS_PI_187_DATA 0x05000000
+#define DDRSS_PI_188_DATA 0x01010505
+#define DDRSS_PI_189_DATA 0x01010101
+#define DDRSS_PI_190_DATA 0x00181818
+#define DDRSS_PI_191_DATA 0x00000000
+#define DDRSS_PI_192_DATA 0x00000000
+#define DDRSS_PI_193_DATA 0x0D000000
+#define DDRSS_PI_194_DATA 0x0A0A0D0D
+#define DDRSS_PI_195_DATA 0x0303030A
+#define DDRSS_PI_196_DATA 0x00000000
+#define DDRSS_PI_197_DATA 0x00000000
+#define DDRSS_PI_198_DATA 0x00000000
+#define DDRSS_PI_199_DATA 0x00000000
+#define DDRSS_PI_200_DATA 0x00000000
+#define DDRSS_PI_201_DATA 0x00000000
+#define DDRSS_PI_202_DATA 0x00000000
+#define DDRSS_PI_203_DATA 0x00000000
+#define DDRSS_PI_204_DATA 0x00000000
+#define DDRSS_PI_205_DATA 0x00000000
+#define DDRSS_PI_206_DATA 0x00000000
+#define DDRSS_PI_207_DATA 0x00000000
+#define DDRSS_PI_208_DATA 0x00000000
+#define DDRSS_PI_209_DATA 0x0D090000
+#define DDRSS_PI_210_DATA 0x0D09000D
+#define DDRSS_PI_211_DATA 0x0D09000D
+#define DDRSS_PI_212_DATA 0x0000000D
+#define DDRSS_PI_213_DATA 0x00000000
+#define DDRSS_PI_214_DATA 0x00000000
+#define DDRSS_PI_215_DATA 0x00000000
+#define DDRSS_PI_216_DATA 0x00000000
+#define DDRSS_PI_217_DATA 0x16000000
+#define DDRSS_PI_218_DATA 0x001600C8
+#define DDRSS_PI_219_DATA 0x001600C8
+#define DDRSS_PI_220_DATA 0x010100C8
+#define DDRSS_PI_221_DATA 0x00001B01
+#define DDRSS_PI_222_DATA 0x1F0F0053
+#define DDRSS_PI_223_DATA 0x05000001
+#define DDRSS_PI_224_DATA 0x001B0A0D
+#define DDRSS_PI_225_DATA 0x1F0F0053
+#define DDRSS_PI_226_DATA 0x05000001
+#define DDRSS_PI_227_DATA 0x001B0A0D
+#define DDRSS_PI_228_DATA 0x1F0F0053
+#define DDRSS_PI_229_DATA 0x05000001
+#define DDRSS_PI_230_DATA 0x00010A0D
+#define DDRSS_PI_231_DATA 0x0C0B0700
+#define DDRSS_PI_232_DATA 0x000D0605
+#define DDRSS_PI_233_DATA 0x000062B8
+#define DDRSS_PI_234_DATA 0x0000001D
+#define DDRSS_PI_235_DATA 0x180A0800
+#define DDRSS_PI_236_DATA 0x0B071C1C
+#define DDRSS_PI_237_DATA 0x0D06050C
+#define DDRSS_PI_238_DATA 0x000062B8
+#define DDRSS_PI_239_DATA 0x0000001D
+#define DDRSS_PI_240_DATA 0x180A0800
+#define DDRSS_PI_241_DATA 0x0B071C1C
+#define DDRSS_PI_242_DATA 0x0D06050C
+#define DDRSS_PI_243_DATA 0x000062B8
+#define DDRSS_PI_244_DATA 0x0000001D
+#define DDRSS_PI_245_DATA 0x180A0800
+#define DDRSS_PI_246_DATA 0x00001C1C
+#define DDRSS_PI_247_DATA 0x00001860
+#define DDRSS_PI_248_DATA 0x0000F3C0
+#define DDRSS_PI_249_DATA 0x00001860
+#define DDRSS_PI_250_DATA 0x0000F3C0
+#define DDRSS_PI_251_DATA 0x00001860
+#define DDRSS_PI_252_DATA 0x0000F3C0
+#define DDRSS_PI_253_DATA 0x02550255
+#define DDRSS_PI_254_DATA 0x03030255
+#define DDRSS_PI_255_DATA 0x00025503
+#define DDRSS_PI_256_DATA 0x02550255
+#define DDRSS_PI_257_DATA 0x0C080C08
+#define DDRSS_PI_258_DATA 0x00000C08
+#define DDRSS_PI_259_DATA 0x000890B8
+#define DDRSS_PI_260_DATA 0x00000000
+#define DDRSS_PI_261_DATA 0x00000000
+#define DDRSS_PI_262_DATA 0x00000000
+#define DDRSS_PI_263_DATA 0x00000120
+#define DDRSS_PI_264_DATA 0x000890B8
+#define DDRSS_PI_265_DATA 0x00000000
+#define DDRSS_PI_266_DATA 0x00000000
+#define DDRSS_PI_267_DATA 0x00000000
+#define DDRSS_PI_268_DATA 0x00000120
+#define DDRSS_PI_269_DATA 0x000890B8
+#define DDRSS_PI_270_DATA 0x00000000
+#define DDRSS_PI_271_DATA 0x00000000
+#define DDRSS_PI_272_DATA 0x00000000
+#define DDRSS_PI_273_DATA 0x02000120
+#define DDRSS_PI_274_DATA 0x00000080
+#define DDRSS_PI_275_DATA 0x00020000
+#define DDRSS_PI_276_DATA 0x00000080
+#define DDRSS_PI_277_DATA 0x00020000
+#define DDRSS_PI_278_DATA 0x00000080
+#define DDRSS_PI_279_DATA 0x00000000
+#define DDRSS_PI_280_DATA 0x00000000
+#define DDRSS_PI_281_DATA 0x00040404
+#define DDRSS_PI_282_DATA 0x00000000
+#define DDRSS_PI_283_DATA 0x02010102
+#define DDRSS_PI_284_DATA 0x67676767
+#define DDRSS_PI_285_DATA 0x00000202
+#define DDRSS_PI_286_DATA 0x00000000
+#define DDRSS_PI_287_DATA 0x00000000
+#define DDRSS_PI_288_DATA 0x00000000
+#define DDRSS_PI_289_DATA 0x00000000
+#define DDRSS_PI_290_DATA 0x00000000
+#define DDRSS_PI_291_DATA 0x0D100F00
+#define DDRSS_PI_292_DATA 0x0003020E
+#define DDRSS_PI_293_DATA 0x00000001
+#define DDRSS_PI_294_DATA 0x01000000
+#define DDRSS_PI_295_DATA 0x00020201
+#define DDRSS_PI_296_DATA 0x00000000
+#define DDRSS_PI_297_DATA 0x00000424
+#define DDRSS_PI_298_DATA 0x00000301
+#define DDRSS_PI_299_DATA 0x000000C0
+#define DDRSS_PI_300_DATA 0x00000000
+#define DDRSS_PI_301_DATA 0x0000000C
+#define DDRSS_PI_302_DATA 0x00001401
+#define DDRSS_PI_303_DATA 0x00000493
+#define DDRSS_PI_304_DATA 0x00000000
+#define DDRSS_PI_305_DATA 0x00000424
+#define DDRSS_PI_306_DATA 0x00000301
+#define DDRSS_PI_307_DATA 0x000000C0
+#define DDRSS_PI_308_DATA 0x00000000
+#define DDRSS_PI_309_DATA 0x0000000C
+#define DDRSS_PI_310_DATA 0x00001401
+#define DDRSS_PI_311_DATA 0x00000493
+#define DDRSS_PI_312_DATA 0x00000000
+#define DDRSS_PI_313_DATA 0x00000424
+#define DDRSS_PI_314_DATA 0x00000301
+#define DDRSS_PI_315_DATA 0x000000C0
+#define DDRSS_PI_316_DATA 0x00000000
+#define DDRSS_PI_317_DATA 0x0000000C
+#define DDRSS_PI_318_DATA 0x00001401
+#define DDRSS_PI_319_DATA 0x00000493
+#define DDRSS_PI_320_DATA 0x00000000
+#define DDRSS_PI_321_DATA 0x00000424
+#define DDRSS_PI_322_DATA 0x00000301
+#define DDRSS_PI_323_DATA 0x000000C0
+#define DDRSS_PI_324_DATA 0x00000000
+#define DDRSS_PI_325_DATA 0x0000000C
+#define DDRSS_PI_326_DATA 0x00001401
+#define DDRSS_PI_327_DATA 0x00000493
+#define DDRSS_PI_328_DATA 0x00000000
+#define DDRSS_PI_329_DATA 0x00000424
+#define DDRSS_PI_330_DATA 0x00000301
+#define DDRSS_PI_331_DATA 0x000000C0
+#define DDRSS_PI_332_DATA 0x00000000
+#define DDRSS_PI_333_DATA 0x0000000C
+#define DDRSS_PI_334_DATA 0x00001401
+#define DDRSS_PI_335_DATA 0x00000493
+#define DDRSS_PI_336_DATA 0x00000000
+#define DDRSS_PI_337_DATA 0x00000424
+#define DDRSS_PI_338_DATA 0x00000301
+#define DDRSS_PI_339_DATA 0x000000C0
+#define DDRSS_PI_340_DATA 0x00000000
+#define DDRSS_PI_341_DATA 0x0000000C
+#define DDRSS_PI_342_DATA 0x00001401
+#define DDRSS_PI_343_DATA 0x00000493
+#define DDRSS_PI_344_DATA 0x00000000
+#define DDRSS_PHY_0_DATA 0x04C00000
+#define DDRSS_PHY_1_DATA 0x00000000
+#define DDRSS_PHY_2_DATA 0x00000200
+#define DDRSS_PHY_3_DATA 0x00000000
+#define DDRSS_PHY_4_DATA 0x00000000
+#define DDRSS_PHY_5_DATA 0x00000000
+#define DDRSS_PHY_6_DATA 0x00000000
+#define DDRSS_PHY_7_DATA 0x00000000
+#define DDRSS_PHY_8_DATA 0x00000001
+#define DDRSS_PHY_9_DATA 0x00000000
+#define DDRSS_PHY_10_DATA 0x00000000
+#define DDRSS_PHY_11_DATA 0x010101FF
+#define DDRSS_PHY_12_DATA 0x00010000
+#define DDRSS_PHY_13_DATA 0x00C00004
+#define DDRSS_PHY_14_DATA 0x00CC0008
+#define DDRSS_PHY_15_DATA 0x00660201
+#define DDRSS_PHY_16_DATA 0x00000000
+#define DDRSS_PHY_17_DATA 0x00000000
+#define DDRSS_PHY_18_DATA 0x00000000
+#define DDRSS_PHY_19_DATA 0x0000AAAA
+#define DDRSS_PHY_20_DATA 0x00005555
+#define DDRSS_PHY_21_DATA 0x0000B5B5
+#define DDRSS_PHY_22_DATA 0x00004A4A
+#define DDRSS_PHY_23_DATA 0x00005656
+#define DDRSS_PHY_24_DATA 0x0000A9A9
+#define DDRSS_PHY_25_DATA 0x0000B7B7
+#define DDRSS_PHY_26_DATA 0x00004848
+#define DDRSS_PHY_27_DATA 0x00000000
+#define DDRSS_PHY_28_DATA 0x00000000
+#define DDRSS_PHY_29_DATA 0x08000000
+#define DDRSS_PHY_30_DATA 0x0F000008
+#define DDRSS_PHY_31_DATA 0x00000F0F
+#define DDRSS_PHY_32_DATA 0x00E4E400
+#define DDRSS_PHY_33_DATA 0x00070820
+#define DDRSS_PHY_34_DATA 0x000C0020
+#define DDRSS_PHY_35_DATA 0x00062000
+#define DDRSS_PHY_36_DATA 0x00000000
+#define DDRSS_PHY_37_DATA 0x55555555
+#define DDRSS_PHY_38_DATA 0xAAAAAAAA
+#define DDRSS_PHY_39_DATA 0x55555555
+#define DDRSS_PHY_40_DATA 0xAAAAAAAA
+#define DDRSS_PHY_41_DATA 0x00005555
+#define DDRSS_PHY_42_DATA 0x01000100
+#define DDRSS_PHY_43_DATA 0x00800180
+#define DDRSS_PHY_44_DATA 0x00000000
+#define DDRSS_PHY_45_DATA 0x00000000
+#define DDRSS_PHY_46_DATA 0x00000000
+#define DDRSS_PHY_47_DATA 0x00000000
+#define DDRSS_PHY_48_DATA 0x00000000
+#define DDRSS_PHY_49_DATA 0x00000000
+#define DDRSS_PHY_50_DATA 0x00000000
+#define DDRSS_PHY_51_DATA 0x00000000
+#define DDRSS_PHY_52_DATA 0x00000000
+#define DDRSS_PHY_53_DATA 0x00000000
+#define DDRSS_PHY_54_DATA 0x00000000
+#define DDRSS_PHY_55_DATA 0x00000000
+#define DDRSS_PHY_56_DATA 0x00000000
+#define DDRSS_PHY_57_DATA 0x00000000
+#define DDRSS_PHY_58_DATA 0x00000000
+#define DDRSS_PHY_59_DATA 0x00000000
+#define DDRSS_PHY_60_DATA 0x00000000
+#define DDRSS_PHY_61_DATA 0x00000000
+#define DDRSS_PHY_62_DATA 0x00000000
+#define DDRSS_PHY_63_DATA 0x00000000
+#define DDRSS_PHY_64_DATA 0x00000000
+#define DDRSS_PHY_65_DATA 0x00000004
+#define DDRSS_PHY_66_DATA 0x00000000
+#define DDRSS_PHY_67_DATA 0x00000000
+#define DDRSS_PHY_68_DATA 0x00000000
+#define DDRSS_PHY_69_DATA 0x00000000
+#define DDRSS_PHY_70_DATA 0x00000000
+#define DDRSS_PHY_71_DATA 0x00000000
+#define DDRSS_PHY_72_DATA 0x041F07FF
+#define DDRSS_PHY_73_DATA 0x00000000
+#define DDRSS_PHY_74_DATA 0x01CCB001
+#define DDRSS_PHY_75_DATA 0x2000CCB0
+#define DDRSS_PHY_76_DATA 0x20000140
+#define DDRSS_PHY_77_DATA 0x07FF0200
+#define DDRSS_PHY_78_DATA 0x0000DD01
+#define DDRSS_PHY_79_DATA 0x10100303
+#define DDRSS_PHY_80_DATA 0x10101010
+#define DDRSS_PHY_81_DATA 0x10101010
+#define DDRSS_PHY_82_DATA 0x00021010
+#define DDRSS_PHY_83_DATA 0x00100010
+#define DDRSS_PHY_84_DATA 0x00100010
+#define DDRSS_PHY_85_DATA 0x00100010
+#define DDRSS_PHY_86_DATA 0x00100010
+#define DDRSS_PHY_87_DATA 0x02020010
+#define DDRSS_PHY_88_DATA 0x51515041
+#define DDRSS_PHY_89_DATA 0x31804000
+#define DDRSS_PHY_90_DATA 0x04BF0340
+#define DDRSS_PHY_91_DATA 0x01008080
+#define DDRSS_PHY_92_DATA 0x04050001
+#define DDRSS_PHY_93_DATA 0x00000504
+#define DDRSS_PHY_94_DATA 0x42100010
+#define DDRSS_PHY_95_DATA 0x010C053E
+#define DDRSS_PHY_96_DATA 0x000F0C14
+#define DDRSS_PHY_97_DATA 0x01000140
+#define DDRSS_PHY_98_DATA 0x007A0120
+#define DDRSS_PHY_99_DATA 0x00000C00
+#define DDRSS_PHY_100_DATA 0x000001CC
+#define DDRSS_PHY_101_DATA 0x20100200
+#define DDRSS_PHY_102_DATA 0x00000005
+#define DDRSS_PHY_103_DATA 0x76543210
+#define DDRSS_PHY_104_DATA 0x00000008
+#define DDRSS_PHY_105_DATA 0x02800280
+#define DDRSS_PHY_106_DATA 0x02800280
+#define DDRSS_PHY_107_DATA 0x02800280
+#define DDRSS_PHY_108_DATA 0x02800280
+#define DDRSS_PHY_109_DATA 0x00000280
+#define DDRSS_PHY_110_DATA 0x00008000
+#define DDRSS_PHY_111_DATA 0x00800080
+#define DDRSS_PHY_112_DATA 0x00800080
+#define DDRSS_PHY_113_DATA 0x00800080
+#define DDRSS_PHY_114_DATA 0x00800080
+#define DDRSS_PHY_115_DATA 0x00800080
+#define DDRSS_PHY_116_DATA 0x00800080
+#define DDRSS_PHY_117_DATA 0x00800080
+#define DDRSS_PHY_118_DATA 0x00800080
+#define DDRSS_PHY_119_DATA 0x01000080
+#define DDRSS_PHY_120_DATA 0x01000000
+#define DDRSS_PHY_121_DATA 0x00000000
+#define DDRSS_PHY_122_DATA 0x00000000
+#define DDRSS_PHY_123_DATA 0x00080200
+#define DDRSS_PHY_124_DATA 0x00000000
+#define DDRSS_PHY_125_DATA 0x00000000
+#define DDRSS_PHY_126_DATA 0x00000000
+#define DDRSS_PHY_127_DATA 0x00000000
+#define DDRSS_PHY_128_DATA 0x00000000
+#define DDRSS_PHY_129_DATA 0x00000000
+#define DDRSS_PHY_130_DATA 0x00000000
+#define DDRSS_PHY_131_DATA 0x00000000
+#define DDRSS_PHY_132_DATA 0x00000000
+#define DDRSS_PHY_133_DATA 0x00000000
+#define DDRSS_PHY_134_DATA 0x00000000
+#define DDRSS_PHY_135_DATA 0x00000000
+#define DDRSS_PHY_136_DATA 0x00000000
+#define DDRSS_PHY_137_DATA 0x00000000
+#define DDRSS_PHY_138_DATA 0x00000000
+#define DDRSS_PHY_139_DATA 0x00000000
+#define DDRSS_PHY_140_DATA 0x00000000
+#define DDRSS_PHY_141_DATA 0x00000000
+#define DDRSS_PHY_142_DATA 0x00000000
+#define DDRSS_PHY_143_DATA 0x00000000
+#define DDRSS_PHY_144_DATA 0x00000000
+#define DDRSS_PHY_145_DATA 0x00000000
+#define DDRSS_PHY_146_DATA 0x00000000
+#define DDRSS_PHY_147_DATA 0x00000000
+#define DDRSS_PHY_148_DATA 0x00000000
+#define DDRSS_PHY_149_DATA 0x00000000
+#define DDRSS_PHY_150_DATA 0x00000000
+#define DDRSS_PHY_151_DATA 0x00000000
+#define DDRSS_PHY_152_DATA 0x00000000
+#define DDRSS_PHY_153_DATA 0x00000000
+#define DDRSS_PHY_154_DATA 0x00000000
+#define DDRSS_PHY_155_DATA 0x00000000
+#define DDRSS_PHY_156_DATA 0x00000000
+#define DDRSS_PHY_157_DATA 0x00000000
+#define DDRSS_PHY_158_DATA 0x00000000
+#define DDRSS_PHY_159_DATA 0x00000000
+#define DDRSS_PHY_160_DATA 0x00000000
+#define DDRSS_PHY_161_DATA 0x00000000
+#define DDRSS_PHY_162_DATA 0x00000000
+#define DDRSS_PHY_163_DATA 0x00000000
+#define DDRSS_PHY_164_DATA 0x00000000
+#define DDRSS_PHY_165_DATA 0x00000000
+#define DDRSS_PHY_166_DATA 0x00000000
+#define DDRSS_PHY_167_DATA 0x00000000
+#define DDRSS_PHY_168_DATA 0x00000000
+#define DDRSS_PHY_169_DATA 0x00000000
+#define DDRSS_PHY_170_DATA 0x00000000
+#define DDRSS_PHY_171_DATA 0x00000000
+#define DDRSS_PHY_172_DATA 0x00000000
+#define DDRSS_PHY_173_DATA 0x00000000
+#define DDRSS_PHY_174_DATA 0x00000000
+#define DDRSS_PHY_175_DATA 0x00000000
+#define DDRSS_PHY_176_DATA 0x00000000
+#define DDRSS_PHY_177_DATA 0x00000000
+#define DDRSS_PHY_178_DATA 0x00000000
+#define DDRSS_PHY_179_DATA 0x00000000
+#define DDRSS_PHY_180_DATA 0x00000000
+#define DDRSS_PHY_181_DATA 0x00000000
+#define DDRSS_PHY_182_DATA 0x00000000
+#define DDRSS_PHY_183_DATA 0x00000000
+#define DDRSS_PHY_184_DATA 0x00000000
+#define DDRSS_PHY_185_DATA 0x00000000
+#define DDRSS_PHY_186_DATA 0x00000000
+#define DDRSS_PHY_187_DATA 0x00000000
+#define DDRSS_PHY_188_DATA 0x00000000
+#define DDRSS_PHY_189_DATA 0x00000000
+#define DDRSS_PHY_190_DATA 0x00000000
+#define DDRSS_PHY_191_DATA 0x00000000
+#define DDRSS_PHY_192_DATA 0x00000000
+#define DDRSS_PHY_193_DATA 0x00000000
+#define DDRSS_PHY_194_DATA 0x00000000
+#define DDRSS_PHY_195_DATA 0x00000000
+#define DDRSS_PHY_196_DATA 0x00000000
+#define DDRSS_PHY_197_DATA 0x00000000
+#define DDRSS_PHY_198_DATA 0x00000000
+#define DDRSS_PHY_199_DATA 0x00000000
+#define DDRSS_PHY_200_DATA 0x00000000
+#define DDRSS_PHY_201_DATA 0x00000000
+#define DDRSS_PHY_202_DATA 0x00000000
+#define DDRSS_PHY_203_DATA 0x00000000
+#define DDRSS_PHY_204_DATA 0x00000000
+#define DDRSS_PHY_205_DATA 0x00000000
+#define DDRSS_PHY_206_DATA 0x00000000
+#define DDRSS_PHY_207_DATA 0x00000000
+#define DDRSS_PHY_208_DATA 0x00000000
+#define DDRSS_PHY_209_DATA 0x00000000
+#define DDRSS_PHY_210_DATA 0x00000000
+#define DDRSS_PHY_211_DATA 0x00000000
+#define DDRSS_PHY_212_DATA 0x00000000
+#define DDRSS_PHY_213_DATA 0x00000000
+#define DDRSS_PHY_214_DATA 0x00000000
+#define DDRSS_PHY_215_DATA 0x00000000
+#define DDRSS_PHY_216_DATA 0x00000000
+#define DDRSS_PHY_217_DATA 0x00000000
+#define DDRSS_PHY_218_DATA 0x00000000
+#define DDRSS_PHY_219_DATA 0x00000000
+#define DDRSS_PHY_220_DATA 0x00000000
+#define DDRSS_PHY_221_DATA 0x00000000
+#define DDRSS_PHY_222_DATA 0x00000000
+#define DDRSS_PHY_223_DATA 0x00000000
+#define DDRSS_PHY_224_DATA 0x00000000
+#define DDRSS_PHY_225_DATA 0x00000000
+#define DDRSS_PHY_226_DATA 0x00000000
+#define DDRSS_PHY_227_DATA 0x00000000
+#define DDRSS_PHY_228_DATA 0x00000000
+#define DDRSS_PHY_229_DATA 0x00000000
+#define DDRSS_PHY_230_DATA 0x00000000
+#define DDRSS_PHY_231_DATA 0x00000000
+#define DDRSS_PHY_232_DATA 0x00000000
+#define DDRSS_PHY_233_DATA 0x00000000
+#define DDRSS_PHY_234_DATA 0x00000000
+#define DDRSS_PHY_235_DATA 0x00000000
+#define DDRSS_PHY_236_DATA 0x00000000
+#define DDRSS_PHY_237_DATA 0x00000000
+#define DDRSS_PHY_238_DATA 0x00000000
+#define DDRSS_PHY_239_DATA 0x00000000
+#define DDRSS_PHY_240_DATA 0x00000000
+#define DDRSS_PHY_241_DATA 0x00000000
+#define DDRSS_PHY_242_DATA 0x00000000
+#define DDRSS_PHY_243_DATA 0x00000000
+#define DDRSS_PHY_244_DATA 0x00000000
+#define DDRSS_PHY_245_DATA 0x00000000
+#define DDRSS_PHY_246_DATA 0x00000000
+#define DDRSS_PHY_247_DATA 0x00000000
+#define DDRSS_PHY_248_DATA 0x00000000
+#define DDRSS_PHY_249_DATA 0x00000000
+#define DDRSS_PHY_250_DATA 0x00000000
+#define DDRSS_PHY_251_DATA 0x00000000
+#define DDRSS_PHY_252_DATA 0x00000000
+#define DDRSS_PHY_253_DATA 0x00000000
+#define DDRSS_PHY_254_DATA 0x00000000
+#define DDRSS_PHY_255_DATA 0x00000000
+#define DDRSS_PHY_256_DATA 0x04C00000
+#define DDRSS_PHY_257_DATA 0x00000000
+#define DDRSS_PHY_258_DATA 0x00000200
+#define DDRSS_PHY_259_DATA 0x00000000
+#define DDRSS_PHY_260_DATA 0x00000000
+#define DDRSS_PHY_261_DATA 0x00000000
+#define DDRSS_PHY_262_DATA 0x00000000
+#define DDRSS_PHY_263_DATA 0x00000000
+#define DDRSS_PHY_264_DATA 0x00000001
+#define DDRSS_PHY_265_DATA 0x00000000
+#define DDRSS_PHY_266_DATA 0x00000000
+#define DDRSS_PHY_267_DATA 0x010101FF
+#define DDRSS_PHY_268_DATA 0x00010000
+#define DDRSS_PHY_269_DATA 0x00C00004
+#define DDRSS_PHY_270_DATA 0x00CC0008
+#define DDRSS_PHY_271_DATA 0x00660201
+#define DDRSS_PHY_272_DATA 0x00000000
+#define DDRSS_PHY_273_DATA 0x00000000
+#define DDRSS_PHY_274_DATA 0x00000000
+#define DDRSS_PHY_275_DATA 0x0000AAAA
+#define DDRSS_PHY_276_DATA 0x00005555
+#define DDRSS_PHY_277_DATA 0x0000B5B5
+#define DDRSS_PHY_278_DATA 0x00004A4A
+#define DDRSS_PHY_279_DATA 0x00005656
+#define DDRSS_PHY_280_DATA 0x0000A9A9
+#define DDRSS_PHY_281_DATA 0x0000B7B7
+#define DDRSS_PHY_282_DATA 0x00004848
+#define DDRSS_PHY_283_DATA 0x00000000
+#define DDRSS_PHY_284_DATA 0x00000000
+#define DDRSS_PHY_285_DATA 0x08000000
+#define DDRSS_PHY_286_DATA 0x0F000008
+#define DDRSS_PHY_287_DATA 0x00000F0F
+#define DDRSS_PHY_288_DATA 0x00E4E400
+#define DDRSS_PHY_289_DATA 0x00070820
+#define DDRSS_PHY_290_DATA 0x000C0020
+#define DDRSS_PHY_291_DATA 0x00062000
+#define DDRSS_PHY_292_DATA 0x00000000
+#define DDRSS_PHY_293_DATA 0x55555555
+#define DDRSS_PHY_294_DATA 0xAAAAAAAA
+#define DDRSS_PHY_295_DATA 0x55555555
+#define DDRSS_PHY_296_DATA 0xAAAAAAAA
+#define DDRSS_PHY_297_DATA 0x00005555
+#define DDRSS_PHY_298_DATA 0x01000100
+#define DDRSS_PHY_299_DATA 0x00800180
+#define DDRSS_PHY_300_DATA 0x00000000
+#define DDRSS_PHY_301_DATA 0x00000000
+#define DDRSS_PHY_302_DATA 0x00000000
+#define DDRSS_PHY_303_DATA 0x00000000
+#define DDRSS_PHY_304_DATA 0x00000000
+#define DDRSS_PHY_305_DATA 0x00000000
+#define DDRSS_PHY_306_DATA 0x00000000
+#define DDRSS_PHY_307_DATA 0x00000000
+#define DDRSS_PHY_308_DATA 0x00000000
+#define DDRSS_PHY_309_DATA 0x00000000
+#define DDRSS_PHY_310_DATA 0x00000000
+#define DDRSS_PHY_311_DATA 0x00000000
+#define DDRSS_PHY_312_DATA 0x00000000
+#define DDRSS_PHY_313_DATA 0x00000000
+#define DDRSS_PHY_314_DATA 0x00000000
+#define DDRSS_PHY_315_DATA 0x00000000
+#define DDRSS_PHY_316_DATA 0x00000000
+#define DDRSS_PHY_317_DATA 0x00000000
+#define DDRSS_PHY_318_DATA 0x00000000
+#define DDRSS_PHY_319_DATA 0x00000000
+#define DDRSS_PHY_320_DATA 0x00000000
+#define DDRSS_PHY_321_DATA 0x00000004
+#define DDRSS_PHY_322_DATA 0x00000000
+#define DDRSS_PHY_323_DATA 0x00000000
+#define DDRSS_PHY_324_DATA 0x00000000
+#define DDRSS_PHY_325_DATA 0x00000000
+#define DDRSS_PHY_326_DATA 0x00000000
+#define DDRSS_PHY_327_DATA 0x00000000
+#define DDRSS_PHY_328_DATA 0x041F07FF
+#define DDRSS_PHY_329_DATA 0x00000000
+#define DDRSS_PHY_330_DATA 0x01CCB001
+#define DDRSS_PHY_331_DATA 0x2000CCB0
+#define DDRSS_PHY_332_DATA 0x20000140
+#define DDRSS_PHY_333_DATA 0x07FF0200
+#define DDRSS_PHY_334_DATA 0x0000DD01
+#define DDRSS_PHY_335_DATA 0x10100303
+#define DDRSS_PHY_336_DATA 0x10101010
+#define DDRSS_PHY_337_DATA 0x10101010
+#define DDRSS_PHY_338_DATA 0x00021010
+#define DDRSS_PHY_339_DATA 0x00100010
+#define DDRSS_PHY_340_DATA 0x00100010
+#define DDRSS_PHY_341_DATA 0x00100010
+#define DDRSS_PHY_342_DATA 0x00100010
+#define DDRSS_PHY_343_DATA 0x02020010
+#define DDRSS_PHY_344_DATA 0x51515041
+#define DDRSS_PHY_345_DATA 0x31804000
+#define DDRSS_PHY_346_DATA 0x04BF0340
+#define DDRSS_PHY_347_DATA 0x01008080
+#define DDRSS_PHY_348_DATA 0x04050001
+#define DDRSS_PHY_349_DATA 0x00000504
+#define DDRSS_PHY_350_DATA 0x42100010
+#define DDRSS_PHY_351_DATA 0x010C053E
+#define DDRSS_PHY_352_DATA 0x000F0C14
+#define DDRSS_PHY_353_DATA 0x01000140
+#define DDRSS_PHY_354_DATA 0x007A0120
+#define DDRSS_PHY_355_DATA 0x00000C00
+#define DDRSS_PHY_356_DATA 0x000001CC
+#define DDRSS_PHY_357_DATA 0x20100200
+#define DDRSS_PHY_358_DATA 0x00000005
+#define DDRSS_PHY_359_DATA 0x76543210
+#define DDRSS_PHY_360_DATA 0x00000008
+#define DDRSS_PHY_361_DATA 0x02800280
+#define DDRSS_PHY_362_DATA 0x02800280
+#define DDRSS_PHY_363_DATA 0x02800280
+#define DDRSS_PHY_364_DATA 0x02800280
+#define DDRSS_PHY_365_DATA 0x00000280
+#define DDRSS_PHY_366_DATA 0x00008000
+#define DDRSS_PHY_367_DATA 0x00800080
+#define DDRSS_PHY_368_DATA 0x00800080
+#define DDRSS_PHY_369_DATA 0x00800080
+#define DDRSS_PHY_370_DATA 0x00800080
+#define DDRSS_PHY_371_DATA 0x00800080
+#define DDRSS_PHY_372_DATA 0x00800080
+#define DDRSS_PHY_373_DATA 0x00800080
+#define DDRSS_PHY_374_DATA 0x00800080
+#define DDRSS_PHY_375_DATA 0x01000080
+#define DDRSS_PHY_376_DATA 0x01000000
+#define DDRSS_PHY_377_DATA 0x00000000
+#define DDRSS_PHY_378_DATA 0x00000000
+#define DDRSS_PHY_379_DATA 0x00080200
+#define DDRSS_PHY_380_DATA 0x00000000
+#define DDRSS_PHY_381_DATA 0x00000000
+#define DDRSS_PHY_382_DATA 0x00000000
+#define DDRSS_PHY_383_DATA 0x00000000
+#define DDRSS_PHY_384_DATA 0x00000000
+#define DDRSS_PHY_385_DATA 0x00000000
+#define DDRSS_PHY_386_DATA 0x00000000
+#define DDRSS_PHY_387_DATA 0x00000000
+#define DDRSS_PHY_388_DATA 0x00000000
+#define DDRSS_PHY_389_DATA 0x00000000
+#define DDRSS_PHY_390_DATA 0x00000000
+#define DDRSS_PHY_391_DATA 0x00000000
+#define DDRSS_PHY_392_DATA 0x00000000
+#define DDRSS_PHY_393_DATA 0x00000000
+#define DDRSS_PHY_394_DATA 0x00000000
+#define DDRSS_PHY_395_DATA 0x00000000
+#define DDRSS_PHY_396_DATA 0x00000000
+#define DDRSS_PHY_397_DATA 0x00000000
+#define DDRSS_PHY_398_DATA 0x00000000
+#define DDRSS_PHY_399_DATA 0x00000000
+#define DDRSS_PHY_400_DATA 0x00000000
+#define DDRSS_PHY_401_DATA 0x00000000
+#define DDRSS_PHY_402_DATA 0x00000000
+#define DDRSS_PHY_403_DATA 0x00000000
+#define DDRSS_PHY_404_DATA 0x00000000
+#define DDRSS_PHY_405_DATA 0x00000000
+#define DDRSS_PHY_406_DATA 0x00000000
+#define DDRSS_PHY_407_DATA 0x00000000
+#define DDRSS_PHY_408_DATA 0x00000000
+#define DDRSS_PHY_409_DATA 0x00000000
+#define DDRSS_PHY_410_DATA 0x00000000
+#define DDRSS_PHY_411_DATA 0x00000000
+#define DDRSS_PHY_412_DATA 0x00000000
+#define DDRSS_PHY_413_DATA 0x00000000
+#define DDRSS_PHY_414_DATA 0x00000000
+#define DDRSS_PHY_415_DATA 0x00000000
+#define DDRSS_PHY_416_DATA 0x00000000
+#define DDRSS_PHY_417_DATA 0x00000000
+#define DDRSS_PHY_418_DATA 0x00000000
+#define DDRSS_PHY_419_DATA 0x00000000
+#define DDRSS_PHY_420_DATA 0x00000000
+#define DDRSS_PHY_421_DATA 0x00000000
+#define DDRSS_PHY_422_DATA 0x00000000
+#define DDRSS_PHY_423_DATA 0x00000000
+#define DDRSS_PHY_424_DATA 0x00000000
+#define DDRSS_PHY_425_DATA 0x00000000
+#define DDRSS_PHY_426_DATA 0x00000000
+#define DDRSS_PHY_427_DATA 0x00000000
+#define DDRSS_PHY_428_DATA 0x00000000
+#define DDRSS_PHY_429_DATA 0x00000000
+#define DDRSS_PHY_430_DATA 0x00000000
+#define DDRSS_PHY_431_DATA 0x00000000
+#define DDRSS_PHY_432_DATA 0x00000000
+#define DDRSS_PHY_433_DATA 0x00000000
+#define DDRSS_PHY_434_DATA 0x00000000
+#define DDRSS_PHY_435_DATA 0x00000000
+#define DDRSS_PHY_436_DATA 0x00000000
+#define DDRSS_PHY_437_DATA 0x00000000
+#define DDRSS_PHY_438_DATA 0x00000000
+#define DDRSS_PHY_439_DATA 0x00000000
+#define DDRSS_PHY_440_DATA 0x00000000
+#define DDRSS_PHY_441_DATA 0x00000000
+#define DDRSS_PHY_442_DATA 0x00000000
+#define DDRSS_PHY_443_DATA 0x00000000
+#define DDRSS_PHY_444_DATA 0x00000000
+#define DDRSS_PHY_445_DATA 0x00000000
+#define DDRSS_PHY_446_DATA 0x00000000
+#define DDRSS_PHY_447_DATA 0x00000000
+#define DDRSS_PHY_448_DATA 0x00000000
+#define DDRSS_PHY_449_DATA 0x00000000
+#define DDRSS_PHY_450_DATA 0x00000000
+#define DDRSS_PHY_451_DATA 0x00000000
+#define DDRSS_PHY_452_DATA 0x00000000
+#define DDRSS_PHY_453_DATA 0x00000000
+#define DDRSS_PHY_454_DATA 0x00000000
+#define DDRSS_PHY_455_DATA 0x00000000
+#define DDRSS_PHY_456_DATA 0x00000000
+#define DDRSS_PHY_457_DATA 0x00000000
+#define DDRSS_PHY_458_DATA 0x00000000
+#define DDRSS_PHY_459_DATA 0x00000000
+#define DDRSS_PHY_460_DATA 0x00000000
+#define DDRSS_PHY_461_DATA 0x00000000
+#define DDRSS_PHY_462_DATA 0x00000000
+#define DDRSS_PHY_463_DATA 0x00000000
+#define DDRSS_PHY_464_DATA 0x00000000
+#define DDRSS_PHY_465_DATA 0x00000000
+#define DDRSS_PHY_466_DATA 0x00000000
+#define DDRSS_PHY_467_DATA 0x00000000
+#define DDRSS_PHY_468_DATA 0x00000000
+#define DDRSS_PHY_469_DATA 0x00000000
+#define DDRSS_PHY_470_DATA 0x00000000
+#define DDRSS_PHY_471_DATA 0x00000000
+#define DDRSS_PHY_472_DATA 0x00000000
+#define DDRSS_PHY_473_DATA 0x00000000
+#define DDRSS_PHY_474_DATA 0x00000000
+#define DDRSS_PHY_475_DATA 0x00000000
+#define DDRSS_PHY_476_DATA 0x00000000
+#define DDRSS_PHY_477_DATA 0x00000000
+#define DDRSS_PHY_478_DATA 0x00000000
+#define DDRSS_PHY_479_DATA 0x00000000
+#define DDRSS_PHY_480_DATA 0x00000000
+#define DDRSS_PHY_481_DATA 0x00000000
+#define DDRSS_PHY_482_DATA 0x00000000
+#define DDRSS_PHY_483_DATA 0x00000000
+#define DDRSS_PHY_484_DATA 0x00000000
+#define DDRSS_PHY_485_DATA 0x00000000
+#define DDRSS_PHY_486_DATA 0x00000000
+#define DDRSS_PHY_487_DATA 0x00000000
+#define DDRSS_PHY_488_DATA 0x00000000
+#define DDRSS_PHY_489_DATA 0x00000000
+#define DDRSS_PHY_490_DATA 0x00000000
+#define DDRSS_PHY_491_DATA 0x00000000
+#define DDRSS_PHY_492_DATA 0x00000000
+#define DDRSS_PHY_493_DATA 0x00000000
+#define DDRSS_PHY_494_DATA 0x00000000
+#define DDRSS_PHY_495_DATA 0x00000000
+#define DDRSS_PHY_496_DATA 0x00000000
+#define DDRSS_PHY_497_DATA 0x00000000
+#define DDRSS_PHY_498_DATA 0x00000000
+#define DDRSS_PHY_499_DATA 0x00000000
+#define DDRSS_PHY_500_DATA 0x00000000
+#define DDRSS_PHY_501_DATA 0x00000000
+#define DDRSS_PHY_502_DATA 0x00000000
+#define DDRSS_PHY_503_DATA 0x00000000
+#define DDRSS_PHY_504_DATA 0x00000000
+#define DDRSS_PHY_505_DATA 0x00000000
+#define DDRSS_PHY_506_DATA 0x00000000
+#define DDRSS_PHY_507_DATA 0x00000000
+#define DDRSS_PHY_508_DATA 0x00000000
+#define DDRSS_PHY_509_DATA 0x00000000
+#define DDRSS_PHY_510_DATA 0x00000000
+#define DDRSS_PHY_511_DATA 0x00000000
+#define DDRSS_PHY_512_DATA 0x00000100
+#define DDRSS_PHY_513_DATA 0x00000000
+#define DDRSS_PHY_514_DATA 0x00000000
+#define DDRSS_PHY_515_DATA 0x00000000
+#define DDRSS_PHY_516_DATA 0x00000000
+#define DDRSS_PHY_517_DATA 0x00000100
+#define DDRSS_PHY_518_DATA 0x00000000
+#define DDRSS_PHY_519_DATA 0x00000000
+#define DDRSS_PHY_520_DATA 0x00000000
+#define DDRSS_PHY_521_DATA 0x00000000
+#define DDRSS_PHY_522_DATA 0x00000000
+#define DDRSS_PHY_523_DATA 0x00000000
+#define DDRSS_PHY_524_DATA 0x00000000
+#define DDRSS_PHY_525_DATA 0x00DCBA98
+#define DDRSS_PHY_526_DATA 0x00000000
+#define DDRSS_PHY_527_DATA 0x00000000
+#define DDRSS_PHY_528_DATA 0x00000000
+#define DDRSS_PHY_529_DATA 0x00000000
+#define DDRSS_PHY_530_DATA 0x00000000
+#define DDRSS_PHY_531_DATA 0x00000000
+#define DDRSS_PHY_532_DATA 0x00000000
+#define DDRSS_PHY_533_DATA 0x00000000
+#define DDRSS_PHY_534_DATA 0x00000000
+#define DDRSS_PHY_535_DATA 0x00000000
+#define DDRSS_PHY_536_DATA 0x00000000
+#define DDRSS_PHY_537_DATA 0x00000000
+#define DDRSS_PHY_538_DATA 0x00000000
+#define DDRSS_PHY_539_DATA 0x00000000
+#define DDRSS_PHY_540_DATA 0x0A418820
+#define DDRSS_PHY_541_DATA 0x103F0000
+#define DDRSS_PHY_542_DATA 0x000F0100
+#define DDRSS_PHY_543_DATA 0x0000000F
+#define DDRSS_PHY_544_DATA 0x020002CC
+#define DDRSS_PHY_545_DATA 0x00030000
+#define DDRSS_PHY_546_DATA 0x00000300
+#define DDRSS_PHY_547_DATA 0x00000300
+#define DDRSS_PHY_548_DATA 0x00000300
+#define DDRSS_PHY_549_DATA 0x00000300
+#define DDRSS_PHY_550_DATA 0x00000300
+#define DDRSS_PHY_551_DATA 0x42080010
+#define DDRSS_PHY_552_DATA 0x0000003E
+#define DDRSS_PHY_553_DATA 0x00000000
+#define DDRSS_PHY_554_DATA 0x00000000
+#define DDRSS_PHY_555_DATA 0x00000000
+#define DDRSS_PHY_556_DATA 0x00000000
+#define DDRSS_PHY_557_DATA 0x00000000
+#define DDRSS_PHY_558_DATA 0x00000000
+#define DDRSS_PHY_559_DATA 0x00000000
+#define DDRSS_PHY_560_DATA 0x00000000
+#define DDRSS_PHY_561_DATA 0x00000000
+#define DDRSS_PHY_562_DATA 0x00000000
+#define DDRSS_PHY_563_DATA 0x00000000
+#define DDRSS_PHY_564_DATA 0x00000000
+#define DDRSS_PHY_565_DATA 0x00000000
+#define DDRSS_PHY_566_DATA 0x00000000
+#define DDRSS_PHY_567_DATA 0x00000000
+#define DDRSS_PHY_568_DATA 0x00000000
+#define DDRSS_PHY_569_DATA 0x00000000
+#define DDRSS_PHY_570_DATA 0x00000000
+#define DDRSS_PHY_571_DATA 0x00000000
+#define DDRSS_PHY_572_DATA 0x00000000
+#define DDRSS_PHY_573_DATA 0x00000000
+#define DDRSS_PHY_574_DATA 0x00000000
+#define DDRSS_PHY_575_DATA 0x00000000
+#define DDRSS_PHY_576_DATA 0x00000000
+#define DDRSS_PHY_577_DATA 0x00000000
+#define DDRSS_PHY_578_DATA 0x00000000
+#define DDRSS_PHY_579_DATA 0x00000000
+#define DDRSS_PHY_580_DATA 0x00000000
+#define DDRSS_PHY_581_DATA 0x00000000
+#define DDRSS_PHY_582_DATA 0x00000000
+#define DDRSS_PHY_583_DATA 0x00000000
+#define DDRSS_PHY_584_DATA 0x00000000
+#define DDRSS_PHY_585_DATA 0x00000000
+#define DDRSS_PHY_586_DATA 0x00000000
+#define DDRSS_PHY_587_DATA 0x00000000
+#define DDRSS_PHY_588_DATA 0x00000000
+#define DDRSS_PHY_589_DATA 0x00000000
+#define DDRSS_PHY_590_DATA 0x00000000
+#define DDRSS_PHY_591_DATA 0x00000000
+#define DDRSS_PHY_592_DATA 0x00000000
+#define DDRSS_PHY_593_DATA 0x00000000
+#define DDRSS_PHY_594_DATA 0x00000000
+#define DDRSS_PHY_595_DATA 0x00000000
+#define DDRSS_PHY_596_DATA 0x00000000
+#define DDRSS_PHY_597_DATA 0x00000000
+#define DDRSS_PHY_598_DATA 0x00000000
+#define DDRSS_PHY_599_DATA 0x00000000
+#define DDRSS_PHY_600_DATA 0x00000000
+#define DDRSS_PHY_601_DATA 0x00000000
+#define DDRSS_PHY_602_DATA 0x00000000
+#define DDRSS_PHY_603_DATA 0x00000000
+#define DDRSS_PHY_604_DATA 0x00000000
+#define DDRSS_PHY_605_DATA 0x00000000
+#define DDRSS_PHY_606_DATA 0x00000000
+#define DDRSS_PHY_607_DATA 0x00000000
+#define DDRSS_PHY_608_DATA 0x00000000
+#define DDRSS_PHY_609_DATA 0x00000000
+#define DDRSS_PHY_610_DATA 0x00000000
+#define DDRSS_PHY_611_DATA 0x00000000
+#define DDRSS_PHY_612_DATA 0x00000000
+#define DDRSS_PHY_613_DATA 0x00000000
+#define DDRSS_PHY_614_DATA 0x00000000
+#define DDRSS_PHY_615_DATA 0x00000000
+#define DDRSS_PHY_616_DATA 0x00000000
+#define DDRSS_PHY_617_DATA 0x00000000
+#define DDRSS_PHY_618_DATA 0x00000000
+#define DDRSS_PHY_619_DATA 0x00000000
+#define DDRSS_PHY_620_DATA 0x00000000
+#define DDRSS_PHY_621_DATA 0x00000000
+#define DDRSS_PHY_622_DATA 0x00000000
+#define DDRSS_PHY_623_DATA 0x00000000
+#define DDRSS_PHY_624_DATA 0x00000000
+#define DDRSS_PHY_625_DATA 0x00000000
+#define DDRSS_PHY_626_DATA 0x00000000
+#define DDRSS_PHY_627_DATA 0x00000000
+#define DDRSS_PHY_628_DATA 0x00000000
+#define DDRSS_PHY_629_DATA 0x00000000
+#define DDRSS_PHY_630_DATA 0x00000000
+#define DDRSS_PHY_631_DATA 0x00000000
+#define DDRSS_PHY_632_DATA 0x00000000
+#define DDRSS_PHY_633_DATA 0x00000000
+#define DDRSS_PHY_634_DATA 0x00000000
+#define DDRSS_PHY_635_DATA 0x00000000
+#define DDRSS_PHY_636_DATA 0x00000000
+#define DDRSS_PHY_637_DATA 0x00000000
+#define DDRSS_PHY_638_DATA 0x00000000
+#define DDRSS_PHY_639_DATA 0x00000000
+#define DDRSS_PHY_640_DATA 0x00000000
+#define DDRSS_PHY_641_DATA 0x00000000
+#define DDRSS_PHY_642_DATA 0x00000000
+#define DDRSS_PHY_643_DATA 0x00000000
+#define DDRSS_PHY_644_DATA 0x00000000
+#define DDRSS_PHY_645_DATA 0x00000000
+#define DDRSS_PHY_646_DATA 0x00000000
+#define DDRSS_PHY_647_DATA 0x00000000
+#define DDRSS_PHY_648_DATA 0x00000000
+#define DDRSS_PHY_649_DATA 0x00000000
+#define DDRSS_PHY_650_DATA 0x00000000
+#define DDRSS_PHY_651_DATA 0x00000000
+#define DDRSS_PHY_652_DATA 0x00000000
+#define DDRSS_PHY_653_DATA 0x00000000
+#define DDRSS_PHY_654_DATA 0x00000000
+#define DDRSS_PHY_655_DATA 0x00000000
+#define DDRSS_PHY_656_DATA 0x00000000
+#define DDRSS_PHY_657_DATA 0x00000000
+#define DDRSS_PHY_658_DATA 0x00000000
+#define DDRSS_PHY_659_DATA 0x00000000
+#define DDRSS_PHY_660_DATA 0x00000000
+#define DDRSS_PHY_661_DATA 0x00000000
+#define DDRSS_PHY_662_DATA 0x00000000
+#define DDRSS_PHY_663_DATA 0x00000000
+#define DDRSS_PHY_664_DATA 0x00000000
+#define DDRSS_PHY_665_DATA 0x00000000
+#define DDRSS_PHY_666_DATA 0x00000000
+#define DDRSS_PHY_667_DATA 0x00000000
+#define DDRSS_PHY_668_DATA 0x00000000
+#define DDRSS_PHY_669_DATA 0x00000000
+#define DDRSS_PHY_670_DATA 0x00000000
+#define DDRSS_PHY_671_DATA 0x00000000
+#define DDRSS_PHY_672_DATA 0x00000000
+#define DDRSS_PHY_673_DATA 0x00000000
+#define DDRSS_PHY_674_DATA 0x00000000
+#define DDRSS_PHY_675_DATA 0x00000000
+#define DDRSS_PHY_676_DATA 0x00000000
+#define DDRSS_PHY_677_DATA 0x00000000
+#define DDRSS_PHY_678_DATA 0x00000000
+#define DDRSS_PHY_679_DATA 0x00000000
+#define DDRSS_PHY_680_DATA 0x00000000
+#define DDRSS_PHY_681_DATA 0x00000000
+#define DDRSS_PHY_682_DATA 0x00000000
+#define DDRSS_PHY_683_DATA 0x00000000
+#define DDRSS_PHY_684_DATA 0x00000000
+#define DDRSS_PHY_685_DATA 0x00000000
+#define DDRSS_PHY_686_DATA 0x00000000
+#define DDRSS_PHY_687_DATA 0x00000000
+#define DDRSS_PHY_688_DATA 0x00000000
+#define DDRSS_PHY_689_DATA 0x00000000
+#define DDRSS_PHY_690_DATA 0x00000000
+#define DDRSS_PHY_691_DATA 0x00000000
+#define DDRSS_PHY_692_DATA 0x00000000
+#define DDRSS_PHY_693_DATA 0x00000000
+#define DDRSS_PHY_694_DATA 0x00000000
+#define DDRSS_PHY_695_DATA 0x00000000
+#define DDRSS_PHY_696_DATA 0x00000000
+#define DDRSS_PHY_697_DATA 0x00000000
+#define DDRSS_PHY_698_DATA 0x00000000
+#define DDRSS_PHY_699_DATA 0x00000000
+#define DDRSS_PHY_700_DATA 0x00000000
+#define DDRSS_PHY_701_DATA 0x00000000
+#define DDRSS_PHY_702_DATA 0x00000000
+#define DDRSS_PHY_703_DATA 0x00000000
+#define DDRSS_PHY_704_DATA 0x00000000
+#define DDRSS_PHY_705_DATA 0x00000000
+#define DDRSS_PHY_706_DATA 0x00000000
+#define DDRSS_PHY_707_DATA 0x00000000
+#define DDRSS_PHY_708_DATA 0x00000000
+#define DDRSS_PHY_709_DATA 0x00000000
+#define DDRSS_PHY_710_DATA 0x00000000
+#define DDRSS_PHY_711_DATA 0x00000000
+#define DDRSS_PHY_712_DATA 0x00000000
+#define DDRSS_PHY_713_DATA 0x00000000
+#define DDRSS_PHY_714_DATA 0x00000000
+#define DDRSS_PHY_715_DATA 0x00000000
+#define DDRSS_PHY_716_DATA 0x00000000
+#define DDRSS_PHY_717_DATA 0x00000000
+#define DDRSS_PHY_718_DATA 0x00000000
+#define DDRSS_PHY_719_DATA 0x00000000
+#define DDRSS_PHY_720_DATA 0x00000000
+#define DDRSS_PHY_721_DATA 0x00000000
+#define DDRSS_PHY_722_DATA 0x00000000
+#define DDRSS_PHY_723_DATA 0x00000000
+#define DDRSS_PHY_724_DATA 0x00000000
+#define DDRSS_PHY_725_DATA 0x00000000
+#define DDRSS_PHY_726_DATA 0x00000000
+#define DDRSS_PHY_727_DATA 0x00000000
+#define DDRSS_PHY_728_DATA 0x00000000
+#define DDRSS_PHY_729_DATA 0x00000000
+#define DDRSS_PHY_730_DATA 0x00000000
+#define DDRSS_PHY_731_DATA 0x00000000
+#define DDRSS_PHY_732_DATA 0x00000000
+#define DDRSS_PHY_733_DATA 0x00000000
+#define DDRSS_PHY_734_DATA 0x00000000
+#define DDRSS_PHY_735_DATA 0x00000000
+#define DDRSS_PHY_736_DATA 0x00000000
+#define DDRSS_PHY_737_DATA 0x00000000
+#define DDRSS_PHY_738_DATA 0x00000000
+#define DDRSS_PHY_739_DATA 0x00000000
+#define DDRSS_PHY_740_DATA 0x00000000
+#define DDRSS_PHY_741_DATA 0x00000000
+#define DDRSS_PHY_742_DATA 0x00000000
+#define DDRSS_PHY_743_DATA 0x00000000
+#define DDRSS_PHY_744_DATA 0x00000000
+#define DDRSS_PHY_745_DATA 0x00000000
+#define DDRSS_PHY_746_DATA 0x00000000
+#define DDRSS_PHY_747_DATA 0x00000000
+#define DDRSS_PHY_748_DATA 0x00000000
+#define DDRSS_PHY_749_DATA 0x00000000
+#define DDRSS_PHY_750_DATA 0x00000000
+#define DDRSS_PHY_751_DATA 0x00000000
+#define DDRSS_PHY_752_DATA 0x00000000
+#define DDRSS_PHY_753_DATA 0x00000000
+#define DDRSS_PHY_754_DATA 0x00000000
+#define DDRSS_PHY_755_DATA 0x00000000
+#define DDRSS_PHY_756_DATA 0x00000000
+#define DDRSS_PHY_757_DATA 0x00000000
+#define DDRSS_PHY_758_DATA 0x00000000
+#define DDRSS_PHY_759_DATA 0x00000000
+#define DDRSS_PHY_760_DATA 0x00000000
+#define DDRSS_PHY_761_DATA 0x00000000
+#define DDRSS_PHY_762_DATA 0x00000000
+#define DDRSS_PHY_763_DATA 0x00000000
+#define DDRSS_PHY_764_DATA 0x00000000
+#define DDRSS_PHY_765_DATA 0x00000000
+#define DDRSS_PHY_766_DATA 0x00000000
+#define DDRSS_PHY_767_DATA 0x00000000
+#define DDRSS_PHY_768_DATA 0x00000100
+#define DDRSS_PHY_769_DATA 0x00000000
+#define DDRSS_PHY_770_DATA 0x00000000
+#define DDRSS_PHY_771_DATA 0x00000000
+#define DDRSS_PHY_772_DATA 0x00000000
+#define DDRSS_PHY_773_DATA 0x00000100
+#define DDRSS_PHY_774_DATA 0x00000000
+#define DDRSS_PHY_775_DATA 0x00000000
+#define DDRSS_PHY_776_DATA 0x00000000
+#define DDRSS_PHY_777_DATA 0x00000000
+#define DDRSS_PHY_778_DATA 0x00000000
+#define DDRSS_PHY_779_DATA 0x00000000
+#define DDRSS_PHY_780_DATA 0x00000000
+#define DDRSS_PHY_781_DATA 0x00DCBA98
+#define DDRSS_PHY_782_DATA 0x00000000
+#define DDRSS_PHY_783_DATA 0x00000000
+#define DDRSS_PHY_784_DATA 0x00000000
+#define DDRSS_PHY_785_DATA 0x00000000
+#define DDRSS_PHY_786_DATA 0x00000000
+#define DDRSS_PHY_787_DATA 0x00000000
+#define DDRSS_PHY_788_DATA 0x00000000
+#define DDRSS_PHY_789_DATA 0x00000000
+#define DDRSS_PHY_790_DATA 0x00000000
+#define DDRSS_PHY_791_DATA 0x00000000
+#define DDRSS_PHY_792_DATA 0x00000000
+#define DDRSS_PHY_793_DATA 0x00000000
+#define DDRSS_PHY_794_DATA 0x00000000
+#define DDRSS_PHY_795_DATA 0x00000000
+#define DDRSS_PHY_796_DATA 0x16A4A0E6
+#define DDRSS_PHY_797_DATA 0x103F0000
+#define DDRSS_PHY_798_DATA 0x000F0000
+#define DDRSS_PHY_799_DATA 0x0000000F
+#define DDRSS_PHY_800_DATA 0x020002CC
+#define DDRSS_PHY_801_DATA 0x00030000
+#define DDRSS_PHY_802_DATA 0x00000300
+#define DDRSS_PHY_803_DATA 0x00000300
+#define DDRSS_PHY_804_DATA 0x00000300
+#define DDRSS_PHY_805_DATA 0x00000300
+#define DDRSS_PHY_806_DATA 0x00000300
+#define DDRSS_PHY_807_DATA 0x42080010
+#define DDRSS_PHY_808_DATA 0x0000003E
+#define DDRSS_PHY_809_DATA 0x00000000
+#define DDRSS_PHY_810_DATA 0x00000000
+#define DDRSS_PHY_811_DATA 0x00000000
+#define DDRSS_PHY_812_DATA 0x00000000
+#define DDRSS_PHY_813_DATA 0x00000000
+#define DDRSS_PHY_814_DATA 0x00000000
+#define DDRSS_PHY_815_DATA 0x00000000
+#define DDRSS_PHY_816_DATA 0x00000000
+#define DDRSS_PHY_817_DATA 0x00000000
+#define DDRSS_PHY_818_DATA 0x00000000
+#define DDRSS_PHY_819_DATA 0x00000000
+#define DDRSS_PHY_820_DATA 0x00000000
+#define DDRSS_PHY_821_DATA 0x00000000
+#define DDRSS_PHY_822_DATA 0x00000000
+#define DDRSS_PHY_823_DATA 0x00000000
+#define DDRSS_PHY_824_DATA 0x00000000
+#define DDRSS_PHY_825_DATA 0x00000000
+#define DDRSS_PHY_826_DATA 0x00000000
+#define DDRSS_PHY_827_DATA 0x00000000
+#define DDRSS_PHY_828_DATA 0x00000000
+#define DDRSS_PHY_829_DATA 0x00000000
+#define DDRSS_PHY_830_DATA 0x00000000
+#define DDRSS_PHY_831_DATA 0x00000000
+#define DDRSS_PHY_832_DATA 0x00000000
+#define DDRSS_PHY_833_DATA 0x00000000
+#define DDRSS_PHY_834_DATA 0x00000000
+#define DDRSS_PHY_835_DATA 0x00000000
+#define DDRSS_PHY_836_DATA 0x00000000
+#define DDRSS_PHY_837_DATA 0x00000000
+#define DDRSS_PHY_838_DATA 0x00000000
+#define DDRSS_PHY_839_DATA 0x00000000
+#define DDRSS_PHY_840_DATA 0x00000000
+#define DDRSS_PHY_841_DATA 0x00000000
+#define DDRSS_PHY_842_DATA 0x00000000
+#define DDRSS_PHY_843_DATA 0x00000000
+#define DDRSS_PHY_844_DATA 0x00000000
+#define DDRSS_PHY_845_DATA 0x00000000
+#define DDRSS_PHY_846_DATA 0x00000000
+#define DDRSS_PHY_847_DATA 0x00000000
+#define DDRSS_PHY_848_DATA 0x00000000
+#define DDRSS_PHY_849_DATA 0x00000000
+#define DDRSS_PHY_850_DATA 0x00000000
+#define DDRSS_PHY_851_DATA 0x00000000
+#define DDRSS_PHY_852_DATA 0x00000000
+#define DDRSS_PHY_853_DATA 0x00000000
+#define DDRSS_PHY_854_DATA 0x00000000
+#define DDRSS_PHY_855_DATA 0x00000000
+#define DDRSS_PHY_856_DATA 0x00000000
+#define DDRSS_PHY_857_DATA 0x00000000
+#define DDRSS_PHY_858_DATA 0x00000000
+#define DDRSS_PHY_859_DATA 0x00000000
+#define DDRSS_PHY_860_DATA 0x00000000
+#define DDRSS_PHY_861_DATA 0x00000000
+#define DDRSS_PHY_862_DATA 0x00000000
+#define DDRSS_PHY_863_DATA 0x00000000
+#define DDRSS_PHY_864_DATA 0x00000000
+#define DDRSS_PHY_865_DATA 0x00000000
+#define DDRSS_PHY_866_DATA 0x00000000
+#define DDRSS_PHY_867_DATA 0x00000000
+#define DDRSS_PHY_868_DATA 0x00000000
+#define DDRSS_PHY_869_DATA 0x00000000
+#define DDRSS_PHY_870_DATA 0x00000000
+#define DDRSS_PHY_871_DATA 0x00000000
+#define DDRSS_PHY_872_DATA 0x00000000
+#define DDRSS_PHY_873_DATA 0x00000000
+#define DDRSS_PHY_874_DATA 0x00000000
+#define DDRSS_PHY_875_DATA 0x00000000
+#define DDRSS_PHY_876_DATA 0x00000000
+#define DDRSS_PHY_877_DATA 0x00000000
+#define DDRSS_PHY_878_DATA 0x00000000
+#define DDRSS_PHY_879_DATA 0x00000000
+#define DDRSS_PHY_880_DATA 0x00000000
+#define DDRSS_PHY_881_DATA 0x00000000
+#define DDRSS_PHY_882_DATA 0x00000000
+#define DDRSS_PHY_883_DATA 0x00000000
+#define DDRSS_PHY_884_DATA 0x00000000
+#define DDRSS_PHY_885_DATA 0x00000000
+#define DDRSS_PHY_886_DATA 0x00000000
+#define DDRSS_PHY_887_DATA 0x00000000
+#define DDRSS_PHY_888_DATA 0x00000000
+#define DDRSS_PHY_889_DATA 0x00000000
+#define DDRSS_PHY_890_DATA 0x00000000
+#define DDRSS_PHY_891_DATA 0x00000000
+#define DDRSS_PHY_892_DATA 0x00000000
+#define DDRSS_PHY_893_DATA 0x00000000
+#define DDRSS_PHY_894_DATA 0x00000000
+#define DDRSS_PHY_895_DATA 0x00000000
+#define DDRSS_PHY_896_DATA 0x00000000
+#define DDRSS_PHY_897_DATA 0x00000000
+#define DDRSS_PHY_898_DATA 0x00000000
+#define DDRSS_PHY_899_DATA 0x00000000
+#define DDRSS_PHY_900_DATA 0x00000000
+#define DDRSS_PHY_901_DATA 0x00000000
+#define DDRSS_PHY_902_DATA 0x00000000
+#define DDRSS_PHY_903_DATA 0x00000000
+#define DDRSS_PHY_904_DATA 0x00000000
+#define DDRSS_PHY_905_DATA 0x00000000
+#define DDRSS_PHY_906_DATA 0x00000000
+#define DDRSS_PHY_907_DATA 0x00000000
+#define DDRSS_PHY_908_DATA 0x00000000
+#define DDRSS_PHY_909_DATA 0x00000000
+#define DDRSS_PHY_910_DATA 0x00000000
+#define DDRSS_PHY_911_DATA 0x00000000
+#define DDRSS_PHY_912_DATA 0x00000000
+#define DDRSS_PHY_913_DATA 0x00000000
+#define DDRSS_PHY_914_DATA 0x00000000
+#define DDRSS_PHY_915_DATA 0x00000000
+#define DDRSS_PHY_916_DATA 0x00000000
+#define DDRSS_PHY_917_DATA 0x00000000
+#define DDRSS_PHY_918_DATA 0x00000000
+#define DDRSS_PHY_919_DATA 0x00000000
+#define DDRSS_PHY_920_DATA 0x00000000
+#define DDRSS_PHY_921_DATA 0x00000000
+#define DDRSS_PHY_922_DATA 0x00000000
+#define DDRSS_PHY_923_DATA 0x00000000
+#define DDRSS_PHY_924_DATA 0x00000000
+#define DDRSS_PHY_925_DATA 0x00000000
+#define DDRSS_PHY_926_DATA 0x00000000
+#define DDRSS_PHY_927_DATA 0x00000000
+#define DDRSS_PHY_928_DATA 0x00000000
+#define DDRSS_PHY_929_DATA 0x00000000
+#define DDRSS_PHY_930_DATA 0x00000000
+#define DDRSS_PHY_931_DATA 0x00000000
+#define DDRSS_PHY_932_DATA 0x00000000
+#define DDRSS_PHY_933_DATA 0x00000000
+#define DDRSS_PHY_934_DATA 0x00000000
+#define DDRSS_PHY_935_DATA 0x00000000
+#define DDRSS_PHY_936_DATA 0x00000000
+#define DDRSS_PHY_937_DATA 0x00000000
+#define DDRSS_PHY_938_DATA 0x00000000
+#define DDRSS_PHY_939_DATA 0x00000000
+#define DDRSS_PHY_940_DATA 0x00000000
+#define DDRSS_PHY_941_DATA 0x00000000
+#define DDRSS_PHY_942_DATA 0x00000000
+#define DDRSS_PHY_943_DATA 0x00000000
+#define DDRSS_PHY_944_DATA 0x00000000
+#define DDRSS_PHY_945_DATA 0x00000000
+#define DDRSS_PHY_946_DATA 0x00000000
+#define DDRSS_PHY_947_DATA 0x00000000
+#define DDRSS_PHY_948_DATA 0x00000000
+#define DDRSS_PHY_949_DATA 0x00000000
+#define DDRSS_PHY_950_DATA 0x00000000
+#define DDRSS_PHY_951_DATA 0x00000000
+#define DDRSS_PHY_952_DATA 0x00000000
+#define DDRSS_PHY_953_DATA 0x00000000
+#define DDRSS_PHY_954_DATA 0x00000000
+#define DDRSS_PHY_955_DATA 0x00000000
+#define DDRSS_PHY_956_DATA 0x00000000
+#define DDRSS_PHY_957_DATA 0x00000000
+#define DDRSS_PHY_958_DATA 0x00000000
+#define DDRSS_PHY_959_DATA 0x00000000
+#define DDRSS_PHY_960_DATA 0x00000000
+#define DDRSS_PHY_961_DATA 0x00000000
+#define DDRSS_PHY_962_DATA 0x00000000
+#define DDRSS_PHY_963_DATA 0x00000000
+#define DDRSS_PHY_964_DATA 0x00000000
+#define DDRSS_PHY_965_DATA 0x00000000
+#define DDRSS_PHY_966_DATA 0x00000000
+#define DDRSS_PHY_967_DATA 0x00000000
+#define DDRSS_PHY_968_DATA 0x00000000
+#define DDRSS_PHY_969_DATA 0x00000000
+#define DDRSS_PHY_970_DATA 0x00000000
+#define DDRSS_PHY_971_DATA 0x00000000
+#define DDRSS_PHY_972_DATA 0x00000000
+#define DDRSS_PHY_973_DATA 0x00000000
+#define DDRSS_PHY_974_DATA 0x00000000
+#define DDRSS_PHY_975_DATA 0x00000000
+#define DDRSS_PHY_976_DATA 0x00000000
+#define DDRSS_PHY_977_DATA 0x00000000
+#define DDRSS_PHY_978_DATA 0x00000000
+#define DDRSS_PHY_979_DATA 0x00000000
+#define DDRSS_PHY_980_DATA 0x00000000
+#define DDRSS_PHY_981_DATA 0x00000000
+#define DDRSS_PHY_982_DATA 0x00000000
+#define DDRSS_PHY_983_DATA 0x00000000
+#define DDRSS_PHY_984_DATA 0x00000000
+#define DDRSS_PHY_985_DATA 0x00000000
+#define DDRSS_PHY_986_DATA 0x00000000
+#define DDRSS_PHY_987_DATA 0x00000000
+#define DDRSS_PHY_988_DATA 0x00000000
+#define DDRSS_PHY_989_DATA 0x00000000
+#define DDRSS_PHY_990_DATA 0x00000000
+#define DDRSS_PHY_991_DATA 0x00000000
+#define DDRSS_PHY_992_DATA 0x00000000
+#define DDRSS_PHY_993_DATA 0x00000000
+#define DDRSS_PHY_994_DATA 0x00000000
+#define DDRSS_PHY_995_DATA 0x00000000
+#define DDRSS_PHY_996_DATA 0x00000000
+#define DDRSS_PHY_997_DATA 0x00000000
+#define DDRSS_PHY_998_DATA 0x00000000
+#define DDRSS_PHY_999_DATA 0x00000000
+#define DDRSS_PHY_1000_DATA 0x00000000
+#define DDRSS_PHY_1001_DATA 0x00000000
+#define DDRSS_PHY_1002_DATA 0x00000000
+#define DDRSS_PHY_1003_DATA 0x00000000
+#define DDRSS_PHY_1004_DATA 0x00000000
+#define DDRSS_PHY_1005_DATA 0x00000000
+#define DDRSS_PHY_1006_DATA 0x00000000
+#define DDRSS_PHY_1007_DATA 0x00000000
+#define DDRSS_PHY_1008_DATA 0x00000000
+#define DDRSS_PHY_1009_DATA 0x00000000
+#define DDRSS_PHY_1010_DATA 0x00000000
+#define DDRSS_PHY_1011_DATA 0x00000000
+#define DDRSS_PHY_1012_DATA 0x00000000
+#define DDRSS_PHY_1013_DATA 0x00000000
+#define DDRSS_PHY_1014_DATA 0x00000000
+#define DDRSS_PHY_1015_DATA 0x00000000
+#define DDRSS_PHY_1016_DATA 0x00000000
+#define DDRSS_PHY_1017_DATA 0x00000000
+#define DDRSS_PHY_1018_DATA 0x00000000
+#define DDRSS_PHY_1019_DATA 0x00000000
+#define DDRSS_PHY_1020_DATA 0x00000000
+#define DDRSS_PHY_1021_DATA 0x00000000
+#define DDRSS_PHY_1022_DATA 0x00000000
+#define DDRSS_PHY_1023_DATA 0x00000000
+#define DDRSS_PHY_1024_DATA 0x00000100
+#define DDRSS_PHY_1025_DATA 0x00000000
+#define DDRSS_PHY_1026_DATA 0x00000000
+#define DDRSS_PHY_1027_DATA 0x00000000
+#define DDRSS_PHY_1028_DATA 0x00000000
+#define DDRSS_PHY_1029_DATA 0x00000100
+#define DDRSS_PHY_1030_DATA 0x00000000
+#define DDRSS_PHY_1031_DATA 0x00000000
+#define DDRSS_PHY_1032_DATA 0x00000000
+#define DDRSS_PHY_1033_DATA 0x00000000
+#define DDRSS_PHY_1034_DATA 0x00000000
+#define DDRSS_PHY_1035_DATA 0x00000000
+#define DDRSS_PHY_1036_DATA 0x00000000
+#define DDRSS_PHY_1037_DATA 0x00DCBA98
+#define DDRSS_PHY_1038_DATA 0x00000000
+#define DDRSS_PHY_1039_DATA 0x00000000
+#define DDRSS_PHY_1040_DATA 0x00000000
+#define DDRSS_PHY_1041_DATA 0x00000000
+#define DDRSS_PHY_1042_DATA 0x00000000
+#define DDRSS_PHY_1043_DATA 0x00000000
+#define DDRSS_PHY_1044_DATA 0x00000000
+#define DDRSS_PHY_1045_DATA 0x00000000
+#define DDRSS_PHY_1046_DATA 0x00000000
+#define DDRSS_PHY_1047_DATA 0x00000000
+#define DDRSS_PHY_1048_DATA 0x00000000
+#define DDRSS_PHY_1049_DATA 0x00000000
+#define DDRSS_PHY_1050_DATA 0x00000000
+#define DDRSS_PHY_1051_DATA 0x00000000
+#define DDRSS_PHY_1052_DATA 0x2307B9AC
+#define DDRSS_PHY_1053_DATA 0x10030000
+#define DDRSS_PHY_1054_DATA 0x000F0000
+#define DDRSS_PHY_1055_DATA 0x0000000F
+#define DDRSS_PHY_1056_DATA 0x020002CC
+#define DDRSS_PHY_1057_DATA 0x00030000
+#define DDRSS_PHY_1058_DATA 0x00000300
+#define DDRSS_PHY_1059_DATA 0x00000300
+#define DDRSS_PHY_1060_DATA 0x00000300
+#define DDRSS_PHY_1061_DATA 0x00000300
+#define DDRSS_PHY_1062_DATA 0x00000300
+#define DDRSS_PHY_1063_DATA 0x42080010
+#define DDRSS_PHY_1064_DATA 0x0000003E
+#define DDRSS_PHY_1065_DATA 0x00000000
+#define DDRSS_PHY_1066_DATA 0x00000000
+#define DDRSS_PHY_1067_DATA 0x00000000
+#define DDRSS_PHY_1068_DATA 0x00000000
+#define DDRSS_PHY_1069_DATA 0x00000000
+#define DDRSS_PHY_1070_DATA 0x00000000
+#define DDRSS_PHY_1071_DATA 0x00000000
+#define DDRSS_PHY_1072_DATA 0x00000000
+#define DDRSS_PHY_1073_DATA 0x00000000
+#define DDRSS_PHY_1074_DATA 0x00000000
+#define DDRSS_PHY_1075_DATA 0x00000000
+#define DDRSS_PHY_1076_DATA 0x00000000
+#define DDRSS_PHY_1077_DATA 0x00000000
+#define DDRSS_PHY_1078_DATA 0x00000000
+#define DDRSS_PHY_1079_DATA 0x00000000
+#define DDRSS_PHY_1080_DATA 0x00000000
+#define DDRSS_PHY_1081_DATA 0x00000000
+#define DDRSS_PHY_1082_DATA 0x00000000
+#define DDRSS_PHY_1083_DATA 0x00000000
+#define DDRSS_PHY_1084_DATA 0x00000000
+#define DDRSS_PHY_1085_DATA 0x00000000
+#define DDRSS_PHY_1086_DATA 0x00000000
+#define DDRSS_PHY_1087_DATA 0x00000000
+#define DDRSS_PHY_1088_DATA 0x00000000
+#define DDRSS_PHY_1089_DATA 0x00000000
+#define DDRSS_PHY_1090_DATA 0x00000000
+#define DDRSS_PHY_1091_DATA 0x00000000
+#define DDRSS_PHY_1092_DATA 0x00000000
+#define DDRSS_PHY_1093_DATA 0x00000000
+#define DDRSS_PHY_1094_DATA 0x00000000
+#define DDRSS_PHY_1095_DATA 0x00000000
+#define DDRSS_PHY_1096_DATA 0x00000000
+#define DDRSS_PHY_1097_DATA 0x00000000
+#define DDRSS_PHY_1098_DATA 0x00000000
+#define DDRSS_PHY_1099_DATA 0x00000000
+#define DDRSS_PHY_1100_DATA 0x00000000
+#define DDRSS_PHY_1101_DATA 0x00000000
+#define DDRSS_PHY_1102_DATA 0x00000000
+#define DDRSS_PHY_1103_DATA 0x00000000
+#define DDRSS_PHY_1104_DATA 0x00000000
+#define DDRSS_PHY_1105_DATA 0x00000000
+#define DDRSS_PHY_1106_DATA 0x00000000
+#define DDRSS_PHY_1107_DATA 0x00000000
+#define DDRSS_PHY_1108_DATA 0x00000000
+#define DDRSS_PHY_1109_DATA 0x00000000
+#define DDRSS_PHY_1110_DATA 0x00000000
+#define DDRSS_PHY_1111_DATA 0x00000000
+#define DDRSS_PHY_1112_DATA 0x00000000
+#define DDRSS_PHY_1113_DATA 0x00000000
+#define DDRSS_PHY_1114_DATA 0x00000000
+#define DDRSS_PHY_1115_DATA 0x00000000
+#define DDRSS_PHY_1116_DATA 0x00000000
+#define DDRSS_PHY_1117_DATA 0x00000000
+#define DDRSS_PHY_1118_DATA 0x00000000
+#define DDRSS_PHY_1119_DATA 0x00000000
+#define DDRSS_PHY_1120_DATA 0x00000000
+#define DDRSS_PHY_1121_DATA 0x00000000
+#define DDRSS_PHY_1122_DATA 0x00000000
+#define DDRSS_PHY_1123_DATA 0x00000000
+#define DDRSS_PHY_1124_DATA 0x00000000
+#define DDRSS_PHY_1125_DATA 0x00000000
+#define DDRSS_PHY_1126_DATA 0x00000000
+#define DDRSS_PHY_1127_DATA 0x00000000
+#define DDRSS_PHY_1128_DATA 0x00000000
+#define DDRSS_PHY_1129_DATA 0x00000000
+#define DDRSS_PHY_1130_DATA 0x00000000
+#define DDRSS_PHY_1131_DATA 0x00000000
+#define DDRSS_PHY_1132_DATA 0x00000000
+#define DDRSS_PHY_1133_DATA 0x00000000
+#define DDRSS_PHY_1134_DATA 0x00000000
+#define DDRSS_PHY_1135_DATA 0x00000000
+#define DDRSS_PHY_1136_DATA 0x00000000
+#define DDRSS_PHY_1137_DATA 0x00000000
+#define DDRSS_PHY_1138_DATA 0x00000000
+#define DDRSS_PHY_1139_DATA 0x00000000
+#define DDRSS_PHY_1140_DATA 0x00000000
+#define DDRSS_PHY_1141_DATA 0x00000000
+#define DDRSS_PHY_1142_DATA 0x00000000
+#define DDRSS_PHY_1143_DATA 0x00000000
+#define DDRSS_PHY_1144_DATA 0x00000000
+#define DDRSS_PHY_1145_DATA 0x00000000
+#define DDRSS_PHY_1146_DATA 0x00000000
+#define DDRSS_PHY_1147_DATA 0x00000000
+#define DDRSS_PHY_1148_DATA 0x00000000
+#define DDRSS_PHY_1149_DATA 0x00000000
+#define DDRSS_PHY_1150_DATA 0x00000000
+#define DDRSS_PHY_1151_DATA 0x00000000
+#define DDRSS_PHY_1152_DATA 0x00000000
+#define DDRSS_PHY_1153_DATA 0x00000000
+#define DDRSS_PHY_1154_DATA 0x00000000
+#define DDRSS_PHY_1155_DATA 0x00000000
+#define DDRSS_PHY_1156_DATA 0x00000000
+#define DDRSS_PHY_1157_DATA 0x00000000
+#define DDRSS_PHY_1158_DATA 0x00000000
+#define DDRSS_PHY_1159_DATA 0x00000000
+#define DDRSS_PHY_1160_DATA 0x00000000
+#define DDRSS_PHY_1161_DATA 0x00000000
+#define DDRSS_PHY_1162_DATA 0x00000000
+#define DDRSS_PHY_1163_DATA 0x00000000
+#define DDRSS_PHY_1164_DATA 0x00000000
+#define DDRSS_PHY_1165_DATA 0x00000000
+#define DDRSS_PHY_1166_DATA 0x00000000
+#define DDRSS_PHY_1167_DATA 0x00000000
+#define DDRSS_PHY_1168_DATA 0x00000000
+#define DDRSS_PHY_1169_DATA 0x00000000
+#define DDRSS_PHY_1170_DATA 0x00000000
+#define DDRSS_PHY_1171_DATA 0x00000000
+#define DDRSS_PHY_1172_DATA 0x00000000
+#define DDRSS_PHY_1173_DATA 0x00000000
+#define DDRSS_PHY_1174_DATA 0x00000000
+#define DDRSS_PHY_1175_DATA 0x00000000
+#define DDRSS_PHY_1176_DATA 0x00000000
+#define DDRSS_PHY_1177_DATA 0x00000000
+#define DDRSS_PHY_1178_DATA 0x00000000
+#define DDRSS_PHY_1179_DATA 0x00000000
+#define DDRSS_PHY_1180_DATA 0x00000000
+#define DDRSS_PHY_1181_DATA 0x00000000
+#define DDRSS_PHY_1182_DATA 0x00000000
+#define DDRSS_PHY_1183_DATA 0x00000000
+#define DDRSS_PHY_1184_DATA 0x00000000
+#define DDRSS_PHY_1185_DATA 0x00000000
+#define DDRSS_PHY_1186_DATA 0x00000000
+#define DDRSS_PHY_1187_DATA 0x00000000
+#define DDRSS_PHY_1188_DATA 0x00000000
+#define DDRSS_PHY_1189_DATA 0x00000000
+#define DDRSS_PHY_1190_DATA 0x00000000
+#define DDRSS_PHY_1191_DATA 0x00000000
+#define DDRSS_PHY_1192_DATA 0x00000000
+#define DDRSS_PHY_1193_DATA 0x00000000
+#define DDRSS_PHY_1194_DATA 0x00000000
+#define DDRSS_PHY_1195_DATA 0x00000000
+#define DDRSS_PHY_1196_DATA 0x00000000
+#define DDRSS_PHY_1197_DATA 0x00000000
+#define DDRSS_PHY_1198_DATA 0x00000000
+#define DDRSS_PHY_1199_DATA 0x00000000
+#define DDRSS_PHY_1200_DATA 0x00000000
+#define DDRSS_PHY_1201_DATA 0x00000000
+#define DDRSS_PHY_1202_DATA 0x00000000
+#define DDRSS_PHY_1203_DATA 0x00000000
+#define DDRSS_PHY_1204_DATA 0x00000000
+#define DDRSS_PHY_1205_DATA 0x00000000
+#define DDRSS_PHY_1206_DATA 0x00000000
+#define DDRSS_PHY_1207_DATA 0x00000000
+#define DDRSS_PHY_1208_DATA 0x00000000
+#define DDRSS_PHY_1209_DATA 0x00000000
+#define DDRSS_PHY_1210_DATA 0x00000000
+#define DDRSS_PHY_1211_DATA 0x00000000
+#define DDRSS_PHY_1212_DATA 0x00000000
+#define DDRSS_PHY_1213_DATA 0x00000000
+#define DDRSS_PHY_1214_DATA 0x00000000
+#define DDRSS_PHY_1215_DATA 0x00000000
+#define DDRSS_PHY_1216_DATA 0x00000000
+#define DDRSS_PHY_1217_DATA 0x00000000
+#define DDRSS_PHY_1218_DATA 0x00000000
+#define DDRSS_PHY_1219_DATA 0x00000000
+#define DDRSS_PHY_1220_DATA 0x00000000
+#define DDRSS_PHY_1221_DATA 0x00000000
+#define DDRSS_PHY_1222_DATA 0x00000000
+#define DDRSS_PHY_1223_DATA 0x00000000
+#define DDRSS_PHY_1224_DATA 0x00000000
+#define DDRSS_PHY_1225_DATA 0x00000000
+#define DDRSS_PHY_1226_DATA 0x00000000
+#define DDRSS_PHY_1227_DATA 0x00000000
+#define DDRSS_PHY_1228_DATA 0x00000000
+#define DDRSS_PHY_1229_DATA 0x00000000
+#define DDRSS_PHY_1230_DATA 0x00000000
+#define DDRSS_PHY_1231_DATA 0x00000000
+#define DDRSS_PHY_1232_DATA 0x00000000
+#define DDRSS_PHY_1233_DATA 0x00000000
+#define DDRSS_PHY_1234_DATA 0x00000000
+#define DDRSS_PHY_1235_DATA 0x00000000
+#define DDRSS_PHY_1236_DATA 0x00000000
+#define DDRSS_PHY_1237_DATA 0x00000000
+#define DDRSS_PHY_1238_DATA 0x00000000
+#define DDRSS_PHY_1239_DATA 0x00000000
+#define DDRSS_PHY_1240_DATA 0x00000000
+#define DDRSS_PHY_1241_DATA 0x00000000
+#define DDRSS_PHY_1242_DATA 0x00000000
+#define DDRSS_PHY_1243_DATA 0x00000000
+#define DDRSS_PHY_1244_DATA 0x00000000
+#define DDRSS_PHY_1245_DATA 0x00000000
+#define DDRSS_PHY_1246_DATA 0x00000000
+#define DDRSS_PHY_1247_DATA 0x00000000
+#define DDRSS_PHY_1248_DATA 0x00000000
+#define DDRSS_PHY_1249_DATA 0x00000000
+#define DDRSS_PHY_1250_DATA 0x00000000
+#define DDRSS_PHY_1251_DATA 0x00000000
+#define DDRSS_PHY_1252_DATA 0x00000000
+#define DDRSS_PHY_1253_DATA 0x00000000
+#define DDRSS_PHY_1254_DATA 0x00000000
+#define DDRSS_PHY_1255_DATA 0x00000000
+#define DDRSS_PHY_1256_DATA 0x00000000
+#define DDRSS_PHY_1257_DATA 0x00000000
+#define DDRSS_PHY_1258_DATA 0x00000000
+#define DDRSS_PHY_1259_DATA 0x00000000
+#define DDRSS_PHY_1260_DATA 0x00000000
+#define DDRSS_PHY_1261_DATA 0x00000000
+#define DDRSS_PHY_1262_DATA 0x00000000
+#define DDRSS_PHY_1263_DATA 0x00000000
+#define DDRSS_PHY_1264_DATA 0x00000000
+#define DDRSS_PHY_1265_DATA 0x00000000
+#define DDRSS_PHY_1266_DATA 0x00000000
+#define DDRSS_PHY_1267_DATA 0x00000000
+#define DDRSS_PHY_1268_DATA 0x00000000
+#define DDRSS_PHY_1269_DATA 0x00000000
+#define DDRSS_PHY_1270_DATA 0x00000000
+#define DDRSS_PHY_1271_DATA 0x00000000
+#define DDRSS_PHY_1272_DATA 0x00000000
+#define DDRSS_PHY_1273_DATA 0x00000000
+#define DDRSS_PHY_1274_DATA 0x00000000
+#define DDRSS_PHY_1275_DATA 0x00000000
+#define DDRSS_PHY_1276_DATA 0x00000000
+#define DDRSS_PHY_1277_DATA 0x00000000
+#define DDRSS_PHY_1278_DATA 0x00000000
+#define DDRSS_PHY_1279_DATA 0x00000000
+#define DDRSS_PHY_1280_DATA 0x00000000
+#define DDRSS_PHY_1281_DATA 0x00000100
+#define DDRSS_PHY_1282_DATA 0x00000000
+#define DDRSS_PHY_1283_DATA 0x00000000
+#define DDRSS_PHY_1284_DATA 0x00000000
+#define DDRSS_PHY_1285_DATA 0x00000000
+#define DDRSS_PHY_1286_DATA 0x00050000
+#define DDRSS_PHY_1287_DATA 0x04000100
+#define DDRSS_PHY_1288_DATA 0x00000055
+#define DDRSS_PHY_1289_DATA 0x00000000
+#define DDRSS_PHY_1290_DATA 0x00000000
+#define DDRSS_PHY_1291_DATA 0x00000000
+#define DDRSS_PHY_1292_DATA 0x00000000
+#define DDRSS_PHY_1293_DATA 0x01002000
+#define DDRSS_PHY_1294_DATA 0x00004001
+#define DDRSS_PHY_1295_DATA 0x00020028
+#define DDRSS_PHY_1296_DATA 0x00010100
+#define DDRSS_PHY_1297_DATA 0x00000001
+#define DDRSS_PHY_1298_DATA 0x00000000
+#define DDRSS_PHY_1299_DATA 0x0F0F0E06
+#define DDRSS_PHY_1300_DATA 0x00010101
+#define DDRSS_PHY_1301_DATA 0x010F0004
+#define DDRSS_PHY_1302_DATA 0x00000000
+#define DDRSS_PHY_1303_DATA 0x00000000
+#define DDRSS_PHY_1304_DATA 0x00000064
+#define DDRSS_PHY_1305_DATA 0x00000000
+#define DDRSS_PHY_1306_DATA 0x00000000
+#define DDRSS_PHY_1307_DATA 0x01020103
+#define DDRSS_PHY_1308_DATA 0x0F020102
+#define DDRSS_PHY_1309_DATA 0x03030303
+#define DDRSS_PHY_1310_DATA 0x03030303
+#define DDRSS_PHY_1311_DATA 0x00040000
+#define DDRSS_PHY_1312_DATA 0x00005201
+#define DDRSS_PHY_1313_DATA 0x00000000
+#define DDRSS_PHY_1314_DATA 0x00000000
+#define DDRSS_PHY_1315_DATA 0x00000000
+#define DDRSS_PHY_1316_DATA 0x00000000
+#define DDRSS_PHY_1317_DATA 0x00000000
+#define DDRSS_PHY_1318_DATA 0x00000000
+#define DDRSS_PHY_1319_DATA 0x07070001
+#define DDRSS_PHY_1320_DATA 0x00005400
+#define DDRSS_PHY_1321_DATA 0x000040A2
+#define DDRSS_PHY_1322_DATA 0x00024410
+#define DDRSS_PHY_1323_DATA 0x00004410
+#define DDRSS_PHY_1324_DATA 0x00004410
+#define DDRSS_PHY_1325_DATA 0x00004410
+#define DDRSS_PHY_1326_DATA 0x00004410
+#define DDRSS_PHY_1327_DATA 0x00004410
+#define DDRSS_PHY_1328_DATA 0x00004410
+#define DDRSS_PHY_1329_DATA 0x00004410
+#define DDRSS_PHY_1330_DATA 0x00004410
+#define DDRSS_PHY_1331_DATA 0x00004410
+#define DDRSS_PHY_1332_DATA 0x00000000
+#define DDRSS_PHY_1333_DATA 0x00000046
+#define DDRSS_PHY_1334_DATA 0x00000400
+#define DDRSS_PHY_1335_DATA 0x00000008
+#define DDRSS_PHY_1336_DATA 0x00000000
+#define DDRSS_PHY_1337_DATA 0x00000000
+#define DDRSS_PHY_1338_DATA 0x00000000
+#define DDRSS_PHY_1339_DATA 0x00000000
+#define DDRSS_PHY_1340_DATA 0x00000000
+#define DDRSS_PHY_1341_DATA 0x03000000
+#define DDRSS_PHY_1342_DATA 0x00000000
+#define DDRSS_PHY_1343_DATA 0x00000000
+#define DDRSS_PHY_1344_DATA 0x00000000
+#define DDRSS_PHY_1345_DATA 0x04102006
+#define DDRSS_PHY_1346_DATA 0x00041020
+#define DDRSS_PHY_1347_DATA 0x01C98C98
+#define DDRSS_PHY_1348_DATA 0x3F400000
+#define DDRSS_PHY_1349_DATA 0x3F3F1F3F
+#define DDRSS_PHY_1350_DATA 0x0000001F
+#define DDRSS_PHY_1351_DATA 0x00000000
+#define DDRSS_PHY_1352_DATA 0x00000000
+#define DDRSS_PHY_1353_DATA 0x00000000
+#define DDRSS_PHY_1354_DATA 0x00000001
+#define DDRSS_PHY_1355_DATA 0x00000000
+#define DDRSS_PHY_1356_DATA 0x00000000
+#define DDRSS_PHY_1357_DATA 0x00000000
+#define DDRSS_PHY_1358_DATA 0x00000000
+#define DDRSS_PHY_1359_DATA 0x76543210
+#define DDRSS_PHY_1360_DATA 0x00000098
+#define DDRSS_PHY_1361_DATA 0x00000000
+#define DDRSS_PHY_1362_DATA 0x00000000
+#define DDRSS_PHY_1363_DATA 0x00000000
+#define DDRSS_PHY_1364_DATA 0x00040700
+#define DDRSS_PHY_1365_DATA 0x00000000
+#define DDRSS_PHY_1366_DATA 0x00000000
+#define DDRSS_PHY_1367_DATA 0x00000000
+#define DDRSS_PHY_1368_DATA 0x00000002
+#define DDRSS_PHY_1369_DATA 0x00000100
+#define DDRSS_PHY_1370_DATA 0x00000000
+#define DDRSS_PHY_1371_DATA 0x00000FC3
+#define DDRSS_PHY_1372_DATA 0x00020002
+#define DDRSS_PHY_1373_DATA 0x00000000
+#define DDRSS_PHY_1374_DATA 0x00001142
+#define DDRSS_PHY_1375_DATA 0x03020400
+#define DDRSS_PHY_1376_DATA 0x00000080
+#define DDRSS_PHY_1377_DATA 0x03900390
+#define DDRSS_PHY_1378_DATA 0x03900390
+#define DDRSS_PHY_1379_DATA 0x03900390
+#define DDRSS_PHY_1380_DATA 0x03900390
+#define DDRSS_PHY_1381_DATA 0x03900390
+#define DDRSS_PHY_1382_DATA 0x03900390
+#define DDRSS_PHY_1383_DATA 0x00000300
+#define DDRSS_PHY_1384_DATA 0x00000300
+#define DDRSS_PHY_1385_DATA 0x00000300
+#define DDRSS_PHY_1386_DATA 0x00000300
+#define DDRSS_PHY_1387_DATA 0x31823FC7
+#define DDRSS_PHY_1388_DATA 0x00000000
+#define DDRSS_PHY_1389_DATA 0x0C000D3F
+#define DDRSS_PHY_1390_DATA 0x30000D3F
+#define DDRSS_PHY_1391_DATA 0x300D3F11
+#define DDRSS_PHY_1392_DATA 0x01990000
+#define DDRSS_PHY_1393_DATA 0x000D3FCC
+#define DDRSS_PHY_1394_DATA 0x00000C11
+#define DDRSS_PHY_1395_DATA 0x300D3F11
+#define DDRSS_PHY_1396_DATA 0x01990000
+#define DDRSS_PHY_1397_DATA 0x300C3F11
+#define DDRSS_PHY_1398_DATA 0x01990000
+#define DDRSS_PHY_1399_DATA 0x300C3F11
+#define DDRSS_PHY_1400_DATA 0x01990000
+#define DDRSS_PHY_1401_DATA 0x300D3F11
+#define DDRSS_PHY_1402_DATA 0x01990000
+#define DDRSS_PHY_1403_DATA 0x300D3F11
+#define DDRSS_PHY_1404_DATA 0x01990000
+#define DDRSS_PHY_1405_DATA 0x20040004
diff --git a/arch/arm/dts/k3-am62-phycore-som.dtsi b/arch/arm/dts/k3-am62-phycore-som.dtsi
new file mode 100644
index 0000000..aa43e74
--- /dev/null
+++ b/arch/arm/dts/k3-am62-phycore-som.dtsi
@@ -0,0 +1,324 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2022 - 2023 PHYTEC Messtechnik GmbH
+ * Author: Wadim Egorov <w.egorov@phytec.de>
+ *
+ * Product homepage:
+ * https://www.phytec.com/product/phycore-am62x
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/leds/common.h>
+#include <dt-bindings/net/ti-dp83867.h>
+
+/ {
+ model = "PHYTEC phyCORE-AM62x";
+ compatible = "phytec,am62-phycore-som", "ti,am625";
+
+ aliases {
+ ethernet0 = &cpsw_port1;
+ gpio0 = &main_gpio0;
+ gpio1 = &main_gpio1;
+ i2c0 = &main_i2c0;
+ mmc0 = &sdhci0;
+ rtc0 = &i2c_som_rtc;
+ rtc1 = &wkup_rtc0;
+ spi0 = &ospi0;
+ };
+
+ memory@80000000 {
+ device_type = "memory";
+ reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
+ };
+
+ reserved_memory: reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ ramoops@9ca00000 {
+ compatible = "ramoops";
+ reg = <0x00 0x9ca00000 0x00 0x00100000>;
+ record-size = <0x8000>;
+ console-size = <0x8000>;
+ ftrace-size = <0x00>;
+ pmsg-size = <0x8000>;
+ };
+
+ secure_tfa_ddr: tfa@9e780000 {
+ reg = <0x00 0x9e780000 0x00 0x80000>;
+ alignment = <0x1000>;
+ no-map;
+ };
+
+ secure_ddr: optee@9e800000 {
+ reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */
+ alignment = <0x1000>;
+ no-map;
+ };
+
+ wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9db00000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0x9db00000 0x00 0x00c00000>;
+ no-map;
+ };
+ };
+
+ vcc_5v0_som: regulator-vcc-5v0-som {
+ compatible = "regulator-fixed";
+ regulator-name = "VCC_5V0_SOM";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ vdd_1v8: regulator-vdd-1v8 {
+ compatible = "regulator-fixed";
+ regulator-name = "VDD_1V8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ vin-supply = <&vcc_5v0_som>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <&leds_pins_default>;
+
+ led-0 {
+ color = <LED_COLOR_ID_GREEN>;
+ gpios = <&main_gpio0 13 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ function = LED_FUNCTION_HEARTBEAT;
+ };
+ };
+};
+
+&main_pmx0 {
+ leds_pins_default: leds-default-pins {
+ pinctrl-single,pins = <
+ AM62X_IOPAD(0x034, PIN_OUTPUT, 7) /* (H21) OSPI0_CSN2.GPIO0_13 */
+ >;
+ };
+
+ main_i2c0_pins_default: main-i2c0-default-pins {
+ pinctrl-single,pins = <
+ AM62X_IOPAD(0x1e0, PIN_INPUT_PULLUP, 0) /* (B16) I2C0_SCL */
+ AM62X_IOPAD(0x1e4, PIN_INPUT_PULLUP, 0) /* (A16) I2C0_SDA */
+ >;
+ };
+
+ main_mdio1_pins_default: main-mdio1-default-pins {
+ pinctrl-single,pins = <
+ AM62X_IOPAD(0x160, PIN_OUTPUT, 0) /* (AD24) MDIO0_MDC */
+ AM62X_IOPAD(0x15c, PIN_INPUT, 0) /* (AB22) MDIO0_MDIO */
+ >;
+ };
+
+ main_mmc0_pins_default: main-mmc0-default-pins {
+ pinctrl-single,pins = <
+ AM62X_IOPAD(0x220, PIN_INPUT_PULLUP, 0) /* (Y3) MMC0_CMD */
+ AM62X_IOPAD(0x218, PIN_INPUT_PULLDOWN, 0) /* (AB1) MMC0_CLK */
+ AM62X_IOPAD(0x214, PIN_INPUT_PULLUP, 0) /* (AA2) MMC0_DAT0 */
+ AM62X_IOPAD(0x210, PIN_INPUT_PULLUP, 0) /* (AA1) MMC0_DAT1 */
+ AM62X_IOPAD(0x20c, PIN_INPUT_PULLUP, 0) /* (AA3) MMC0_DAT2 */
+ AM62X_IOPAD(0x208, PIN_INPUT_PULLUP, 0) /* (Y4) MMC0_DAT3 */
+ AM62X_IOPAD(0x204, PIN_INPUT_PULLUP, 0) /* (AB2) MMC0_DAT4 */
+ AM62X_IOPAD(0x200, PIN_INPUT_PULLUP, 0) /* (AC1) MMC0_DAT5 */
+ AM62X_IOPAD(0x1fc, PIN_INPUT_PULLUP, 0) /* (AD2) MMC0_DAT6 */
+ AM62X_IOPAD(0x1f8, PIN_INPUT_PULLUP, 0) /* (AC2) MMC0_DAT7 */
+ >;
+ };
+
+ main_rgmii1_pins_default: main-rgmii1-default-pins {
+ pinctrl-single,pins = <
+ AM62X_IOPAD(0x14c, PIN_INPUT, 0) /* (AB17) RGMII1_RD0 */
+ AM62X_IOPAD(0x150, PIN_INPUT, 0) /* (AC17) RGMII1_RD1 */
+ AM62X_IOPAD(0x154, PIN_INPUT, 0) /* (AB16) RGMII1_RD2 */
+ AM62X_IOPAD(0x158, PIN_INPUT, 0) /* (AA15) RGMII1_RD3 */
+ AM62X_IOPAD(0x148, PIN_INPUT, 0) /* (AD17) RGMII1_RXC */
+ AM62X_IOPAD(0x144, PIN_INPUT, 0) /* (AE17) RGMII1_RX_CTL */
+ AM62X_IOPAD(0x134, PIN_OUTPUT, 0) /* (AE20) RGMII1_TD0 */
+ AM62X_IOPAD(0x138, PIN_OUTPUT, 0) /* (AD20) RGMII1_TD1 */
+ AM62X_IOPAD(0x13c, PIN_OUTPUT, 0) /* (AE18) RGMII1_TD2 */
+ AM62X_IOPAD(0x140, PIN_OUTPUT, 0) /* (AD18) RGMII1_TD3 */
+ AM62X_IOPAD(0x130, PIN_OUTPUT, 0) /* (AE19) RGMII1_TXC */
+ AM62X_IOPAD(0x12c, PIN_OUTPUT, 0) /* (AD19) RGMII1_TX_CTL */
+ >;
+ };
+
+ ospi0_pins_default: ospi0-default-pins {
+ pinctrl-single,pins = <
+ AM62X_IOPAD(0x000, PIN_OUTPUT, 0) /* (H24) OSPI0_CLK */
+ AM62X_IOPAD(0x02c, PIN_OUTPUT, 0) /* (F23) OSPI0_CSn0 */
+ AM62X_IOPAD(0x00c, PIN_INPUT, 0) /* (E25) OSPI0_D0 */
+ AM62X_IOPAD(0x010, PIN_INPUT, 0) /* (G24) OSPI0_D1 */
+ AM62X_IOPAD(0x014, PIN_INPUT, 0) /* (F25) OSPI0_D2 */
+ AM62X_IOPAD(0x018, PIN_INPUT, 0) /* (F24) OSPI0_D3 */
+ AM62X_IOPAD(0x01c, PIN_INPUT, 0) /* (J23) OSPI0_D4 */
+ AM62X_IOPAD(0x020, PIN_INPUT, 0) /* (J25) OSPI0_D5 */
+ AM62X_IOPAD(0x024, PIN_INPUT, 0) /* (H25) OSPI0_D6 */
+ AM62X_IOPAD(0x028, PIN_INPUT, 0) /* (J22) OSPI0_D7 */
+ AM62X_IOPAD(0x008, PIN_INPUT, 0) /* (J24) OSPI0_DQS */
+ >;
+ };
+
+ pmic_irq_pins_default: pmic-irq-default-pins {
+ pinctrl-single,pins = <
+ AM62X_IOPAD(0x01f4, PIN_INPUT, 0) /* (D16) EXTINTn */
+ >;
+ };
+};
+
+&cpsw3g {
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_rgmii1_pins_default>;
+};
+
+&cpsw_port1 {
+ phy-mode = "rgmii-rxid";
+ phy-handle = <&cpsw3g_phy1>;
+};
+
+&cpsw3g_mdio {
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_mdio1_pins_default>;
+ status = "okay";
+
+ cpsw3g_phy1: ethernet-phy@1 {
+ compatible = "ethernet-phy-id2000.a231", "ethernet-phy-ieee802.3-c22";
+ reg = <1>;
+ ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
+ ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
+ };
+};
+
+&main_i2c0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_i2c0_pins_default>;
+ clock-frequency = <400000>;
+ status = "okay";
+
+ pmic@30 {
+ compatible = "ti,tps65219";
+ reg = <0x30>;
+ buck1-supply = <&vcc_5v0_som>;
+ buck2-supply = <&vcc_5v0_som>;
+ buck3-supply = <&vcc_5v0_som>;
+ ldo1-supply = <&vdd_3v3>;
+ ldo2-supply = <&vdd_1v8>;
+ ldo3-supply = <&vcc_5v0_som>;
+ ldo4-supply = <&vcc_5v0_som>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pmic_irq_pins_default>;
+ interrupt-parent = <&gic500>;
+ interrupts = <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ ti,power-button;
+ system-power-controller;
+
+ regulators {
+ vdd_core: buck1 {
+ regulator-name = "VDD_CORE";
+ regulator-min-microvolt = <750000>;
+ regulator-max-microvolt = <750000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ vdd_3v3: buck2 {
+ regulator-name = "VDD_3V3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ vdd_ddr4: buck3 {
+ regulator-name = "VDD_DDR4";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ vddshv5_sdio: ldo1 {
+ regulator-name = "VDDSHV5_SDIO";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-allow-bypass;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ vddr_core: ldo2 {
+ regulator-name = "VDDR_CORE";
+ regulator-min-microvolt = <850000>;
+ regulator-max-microvolt = <850000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ vdda_1v8: ldo3 {
+ regulator-name = "VDDA_1V8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ vdd_2v5: ldo4 {
+ regulator-name = "VDD_2V5";
+ regulator-min-microvolt = <2500000>;
+ regulator-max-microvolt = <2500000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+ };
+ };
+
+ eeprom@50 {
+ compatible = "atmel,24c32";
+ pagesize = <32>;
+ reg = <0x50>;
+ };
+
+ i2c_som_rtc: rtc@52 {
+ compatible = "microcrystal,rv3028";
+ reg = <0x52>;
+ };
+};
+
+&ospi0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&ospi0_pins_default>;
+ status = "okay";
+
+ serial_flash: flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0x0>;
+ spi-tx-bus-width = <8>;
+ spi-rx-bus-width = <8>;
+ spi-max-frequency = <25000000>;
+ cdns,tshsl-ns = <60>;
+ cdns,tsd2d-ns = <60>;
+ cdns,tchsh-ns = <60>;
+ cdns,tslch-ns = <60>;
+ cdns,read-delay = <0>;
+ };
+};
+
+&sdhci0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_mmc0_pins_default>;
+ ti,driver-strength-ohm = <50>;
+ disable-wp;
+ non-removable;
+ status = "okay";
+};
diff --git a/arch/arm/dts/k3-am62-verdin-wifi.dtsi b/arch/arm/dts/k3-am62-verdin-wifi.dtsi
index 90ddc71..a6808b1 100644
--- a/arch/arm/dts/k3-am62-verdin-wifi.dtsi
+++ b/arch/arm/dts/k3-am62-verdin-wifi.dtsi
@@ -35,5 +35,11 @@
&main_uart5 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart5>;
+ uart-has-rtscts;
status = "okay";
+
+ bluetooth {
+ compatible = "nxp,88w8987-bt";
+ fw-init-baudrate = <3000000>;
+ };
};
diff --git a/arch/arm/dts/k3-am62-verdin.dtsi b/arch/arm/dts/k3-am62-verdin.dtsi
index 40992e7..5db52f2 100644
--- a/arch/arm/dts/k3-am62-verdin.dtsi
+++ b/arch/arm/dts/k3-am62-verdin.dtsi
@@ -1061,6 +1061,7 @@
vddc-supply = <®_1v2_dsi>;
vddmipi-supply = <®_1v2_dsi>;
vddio-supply = <®_1v8_dsi>;
+ status = "disabled";
dsi_bridge_ports: ports {
#address-cells = <1>;
diff --git a/arch/arm/dts/k3-am62-wakeup.dtsi b/arch/arm/dts/k3-am62-wakeup.dtsi
index eae0528..fef76f5 100644
--- a/arch/arm/dts/k3-am62-wakeup.dtsi
+++ b/arch/arm/dts/k3-am62-wakeup.dtsi
@@ -7,6 +7,7 @@
&cbass_wakeup {
wkup_conf: syscon@43000000 {
+ bootph-all;
compatible = "syscon", "simple-mfd";
reg = <0x00 0x43000000 0x00 0x20000>;
#address-cells = <1>;
@@ -14,6 +15,7 @@
ranges = <0x0 0x00 0x43000000 0x20000>;
chipid: chipid@14 {
+ bootph-all;
compatible = "ti,am654-chipid";
reg = <0x14 0x4>;
};
diff --git a/arch/arm/dts/k3-am62.dtsi b/arch/arm/dts/k3-am62.dtsi
index 11f14ee..f1e1520 100644
--- a/arch/arm/dts/k3-am62.dtsi
+++ b/arch/arm/dts/k3-am62.dtsi
@@ -47,6 +47,7 @@
};
cbass_main: bus@f0000 {
+ bootph-all;
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
@@ -86,6 +87,7 @@
<0x00 0x43000000 0x00 0x43000000 0x00 0x00020000>;
cbass_mcu: bus@4000000 {
+ bootph-all;
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
@@ -93,6 +95,7 @@
};
cbass_wakeup: bus@b00000 {
+ bootph-all;
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
diff --git a/arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi b/arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi
index 10bdaa1..a723caa 100644
--- a/arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi
+++ b/arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi
@@ -13,144 +13,42 @@
tick-timer = &main_timer0;
};
- memory@80000000 {
- bootph-all;
- };
-
/* Keep the LEDs on by default to indicate life */
leds {
- bootph-all;
led-0 {
default-state = "on";
- bootph-all;
};
led-1 {
default-state = "on";
- bootph-all;
};
led-2 {
default-state = "on";
- bootph-all;
};
led-3 {
default-state = "on";
- bootph-all;
};
led-4 {
default-state = "on";
- bootph-all;
};
};
};
-&cbass_main {
- bootph-all;
-};
-
&main_timer0 {
clock-frequency = <25000000>;
- bootph-all;
-};
-
-&dmss {
- bootph-all;
-};
-
-&secure_proxy_main {
- bootph-all;
};
&dmsc {
- bootph-all;
-};
-
-&k3_pds {
- bootph-all;
-};
-
-&k3_clks {
- bootph-all;
-};
-
-&k3_reset {
- bootph-all;
-};
-
-&dmsc {
- bootph-all;
k3_sysreset: sysreset-controller {
compatible = "ti,sci-sysreset";
bootph-all;
};
};
-&wkup_conf {
- bootph-all;
-};
-
-&chipid {
- bootph-all;
-};
-
-&main_pmx0 {
- bootph-all;
-};
-
-&main_uart0 {
- bootph-all;
-};
-
-&console_pins_default {
- bootph-all;
-};
-
-&cbass_mcu {
- bootph-all;
-};
-
-&cbass_wakeup {
- bootph-all;
-};
-
-&mcu_pmx0 {
- bootph-all;
-};
-
-&main_i2c0 {
- bootph-all;
-};
-
-&local_i2c_pins_default {
- bootph-all;
-};
-
-&gpio0_pins_default {
- bootph-all;
-};
-
-&main_gpio0 {
- bootph-all;
-};
-
-&main_gpio1 {
- bootph-all;
-};
-
-&sdhci0 {
- /* EMMC */
- bootph-all;
-};
-
-&emmc_pins_default {
- bootph-all;
-};
-
&sd_pins_default {
- bootph-all;
/* Force to use SDCD card detect pin */
pinctrl-single,pins = <
AM62X_IOPAD(0x023c, PIN_INPUT, 0) /* (A21) MMC1_CMD */
@@ -163,14 +61,6 @@
>;
};
-&tps65219 {
- bootph-all;
-};
-
-&sdhci1 {
- bootph-all;
-};
-
#ifdef CONFIG_TARGET_AM625_A53_BEAGLEPLAY
#define SPL_NODTB "spl/u-boot-spl-nodtb.bin"
diff --git a/arch/arm/dts/k3-am625-beagleplay.dts b/arch/arm/dts/k3-am625-beagleplay.dts
index 7cfdf56..9a6bd0a 100644
--- a/arch/arm/dts/k3-am625-beagleplay.dts
+++ b/arch/arm/dts/k3-am625-beagleplay.dts
@@ -46,6 +46,7 @@
};
memory@80000000 {
+ bootph-pre-ram;
device_type = "memory";
/* 2G RAM */
reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
@@ -58,7 +59,7 @@
ramoops: ramoops@9ca00000 {
compatible = "ramoops";
- reg = <0x00 0x9c700000 0x00 0x00100000>;
+ reg = <0x00 0x9ca00000 0x00 0x00100000>;
record-size = <0x8000>;
console-size = <0x8000>;
ftrace-size = <0x00>;
@@ -83,6 +84,7 @@
};
vsys_5v0: regulator-1 {
+ bootph-all;
compatible = "regulator-fixed";
regulator-name = "vsys_5v0";
regulator-min-microvolt = <5000000>;
@@ -93,6 +95,7 @@
vdd_3v3: regulator-2 {
/* output of TLV62595DMQR-U12 */
+ bootph-all;
compatible = "regulator-fixed";
regulator-name = "vdd_3v3";
regulator-min-microvolt = <3300000>;
@@ -118,6 +121,7 @@
vdd_3v3_sd: regulator-4 {
/* output of TPS22918DBVR-U21 */
+ bootph-all;
pinctrl-names = "default";
pinctrl-0 = <&vdd_3v3_sd_pins_default>;
@@ -132,6 +136,7 @@
};
vdd_sd_dv: regulator-5 {
+ bootph-all;
compatible = "regulator-gpio";
regulator-name = "sd_hs200_switch";
pinctrl-names = "default";
@@ -146,9 +151,11 @@
};
leds {
+ bootph-all;
compatible = "gpio-leds";
led-0 {
+ bootph-all;
gpios = <&main_gpio0 3 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
function = LED_FUNCTION_HEARTBEAT;
@@ -156,6 +163,7 @@
};
led-1 {
+ bootph-all;
gpios = <&main_gpio0 4 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "disk-activity";
function = LED_FUNCTION_DISK_ACTIVITY;
@@ -163,16 +171,19 @@
};
led-2 {
+ bootph-all;
gpios = <&main_gpio0 5 GPIO_ACTIVE_HIGH>;
function = LED_FUNCTION_CPU;
};
led-3 {
+ bootph-all;
gpios = <&main_gpio0 6 GPIO_ACTIVE_HIGH>;
function = LED_FUNCTION_LAN;
};
led-4 {
+ bootph-all;
gpios = <&main_gpio0 9 GPIO_ACTIVE_HIGH>;
function = LED_FUNCTION_WLAN;
};
@@ -245,6 +256,7 @@
&main_pmx0 {
gpio0_pins_default: gpio0-default-pins {
+ bootph-all;
pinctrl-single,pins = <
AM62X_IOPAD(0x0004, PIN_INPUT, 7) /* (G25) OSPI0_LBCLKO.GPIO0_1 */
AM62X_IOPAD(0x0008, PIN_INPUT, 7) /* (J24) OSPI0_DQS.GPIO0_2 */
@@ -264,6 +276,7 @@
};
vdd_sd_dv_pins_default: vdd-sd-default-pins {
+ bootph-all;
pinctrl-single,pins = <
AM62X_IOPAD(0x0244, PIN_OUTPUT, 7) /* (C17) MMC1_SDWP.GPIO1_49 */
>;
@@ -283,6 +296,7 @@
};
local_i2c_pins_default: local-i2c-default-pins {
+ bootph-all;
pinctrl-single,pins = <
AM62X_IOPAD(0x01e0, PIN_INPUT_PULLUP, 0) /* (B16) I2C0_SCL */
AM62X_IOPAD(0x01e4, PIN_INPUT_PULLUP, 0) /* (A16) I2C0_SDA */
@@ -321,6 +335,7 @@
};
emmc_pins_default: emmc-default-pins {
+ bootph-all;
pinctrl-single,pins = <
AM62X_IOPAD(0x0220, PIN_INPUT, 0) /* (Y3) MMC0_CMD */
AM62X_IOPAD(0x0218, PIN_INPUT, 0) /* (AB1) MMC0_CLK */
@@ -336,12 +351,14 @@
};
vdd_3v3_sd_pins_default: vdd-3v3-sd-default-pins {
+ bootph-all;
pinctrl-single,pins = <
AM62X_IOPAD(0x01c4, PIN_INPUT, 7) /* (B14) SPI0_D1_GPIO1_19 */
>;
};
sd_pins_default: sd-default-pins {
+ bootph-all;
pinctrl-single,pins = <
AM62X_IOPAD(0x023c, PIN_INPUT, 0) /* (A21) MMC1_CMD */
AM62X_IOPAD(0x0234, PIN_INPUT, 0) /* (B22) MMC1_CLK */
@@ -418,6 +435,7 @@
};
mikrobus_gpio_pins_default: mikrobus-gpio-default-pins {
+ bootph-all;
pinctrl-single,pins = <
AM62X_IOPAD(0x019c, PIN_INPUT, 7) /* (B18) MCASP0_AXR1.GPIO1_9 */
AM62X_IOPAD(0x01a0, PIN_INPUT, 7) /* (E18) MCASP0_AXR0.GPIO1_10 */
@@ -426,6 +444,7 @@
};
console_pins_default: console-default-pins {
+ bootph-all;
pinctrl-single,pins = <
AM62X_IOPAD(0x01c8, PIN_INPUT, 0) /* (D14) UART0_RXD */
AM62X_IOPAD(0x01cc, PIN_OUTPUT, 0) /* (E14) UART0_TXD */
@@ -597,6 +616,7 @@
};
&main_gpio0 {
+ bootph-all;
pinctrl-names = "default";
pinctrl-0 = <&gpio0_pins_default>;
gpio-line-names = "BL_EN_3V3", "SPE_PO_EN", "RTC_INT", /* 0-2 */
@@ -616,6 +636,7 @@
};
&main_gpio1 {
+ bootph-all;
pinctrl-names = "default";
pinctrl-0 = <&mikrobus_gpio_pins_default>;
gpio-line-names = "", "", "", "", "", /* 0-4 */
@@ -633,6 +654,7 @@
};
&main_i2c0 {
+ bootph-all;
pinctrl-names = "default";
pinctrl-0 = <&local_i2c_pins_default>;
clock-frequency = <400000>;
@@ -651,6 +673,7 @@
};
tps65219: pmic@30 {
+ bootph-all;
compatible = "ti,tps65219";
reg = <0x30>;
buck1-supply = <&vsys_5v0>;
@@ -801,6 +824,7 @@
};
&sdhci0 {
+ bootph-all;
pinctrl-names = "default";
pinctrl-0 = <&emmc_pins_default>;
ti,driver-strength-ohm = <50>;
@@ -810,6 +834,7 @@
&sdhci1 {
/* SD/MMC */
+ bootph-all;
pinctrl-names = "default";
pinctrl-0 = <&sd_pins_default>;
@@ -850,6 +875,7 @@
};
&main_uart0 {
+ bootph-all;
pinctrl-names = "default";
pinctrl-0 = <&console_pins_default>;
status = "okay";
@@ -870,6 +896,12 @@
pinctrl-names = "default";
pinctrl-0 = <&wifi_debug_uart_pins_default>;
status = "okay";
+
+ mcu {
+ compatible = "ti,cc1352p7";
+ reset-gpios = <&main_gpio0 72 GPIO_ACTIVE_LOW>;
+ vdds-supply = <&vdd_3v3>;
+ };
};
&dss {
diff --git a/arch/arm/dts/k3-am625-phyboard-lyra-rdk-u-boot.dtsi b/arch/arm/dts/k3-am625-phyboard-lyra-rdk-u-boot.dtsi
new file mode 100644
index 0000000..f6138f3
--- /dev/null
+++ b/arch/arm/dts/k3-am625-phyboard-lyra-rdk-u-boot.dtsi
@@ -0,0 +1,166 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * phyCORE-AM62x dts file for SPLs
+ * Copyright (C) 2022 - 2023 Phytec Messtechnik GmbH
+ * Author: Wadim Egorov <w.egorov@phytec.de>
+ *
+ * Product homepage:
+ * https://www.phytec.com/product/phyboard-am62x
+ */
+
+#include "k3-am625-phycore-som-binman.dtsi"
+
+/ {
+ chosen {
+ stdout-path = "serial2:115200n8";
+ tick-timer = &main_timer0;
+ };
+
+ aliases {
+ mmc0 = &sdhci0;
+ mmc1 = &sdhci1;
+ };
+
+ memory@80000000 {
+ bootph-all;
+ };
+};
+
+&cpsw3g {
+ bootph-all;
+};
+
+&cpsw_port1 {
+ bootph-all;
+};
+
+&cpsw_port2 {
+ status = "disabled";
+};
+
+&cpsw3g_phy1 {
+ bootph-all;
+};
+
+&dmsc {
+ k3_sysreset: sysreset-controller {
+ compatible = "ti,sci-sysreset";
+ bootph-all;
+ };
+};
+
+&fss {
+ bootph-all;
+};
+
+&main_bcdma {
+ bootph-all;
+ reg = <0x00 0x485c0100 0x00 0x100>,
+ <0x00 0x4c000000 0x00 0x20000>,
+ <0x00 0x4a820000 0x00 0x20000>,
+ <0x00 0x4aa40000 0x00 0x20000>,
+ <0x00 0x4bc00000 0x00 0x100000>,
+ <0x00 0x48600000 0x00 0x8000>,
+ <0x00 0x484a4000 0x00 0x2000>,
+ <0x00 0x484c2000 0x00 0x2000>;
+ reg-names = "gcfg", "bchanrt", "rchanrt", "tchanrt",
+ "ringrt" , "cfg", "tchan", "rchan";
+};
+
+&main_gpio0 {
+ bootph-all;
+};
+
+&main_mdio1_pins_default {
+ bootph-all;
+};
+
+&main_i2c0 {
+ bootph-all;
+};
+
+&main_i2c0_pins_default {
+ bootph-all;
+};
+
+&main_mmc0_pins_default {
+ bootph-all;
+};
+
+&main_mmc1_pins_default {
+ bootph-all;
+};
+
+&main_pktdma {
+ bootph-all;
+ reg = <0x00 0x485c0000 0x00 0x100>,
+ <0x00 0x4a800000 0x00 0x20000>,
+ <0x00 0x4aa00000 0x00 0x20000>,
+ <0x00 0x4b800000 0x00 0x200000>,
+ <0x00 0x485e0000 0x00 0x10000>,
+ <0x00 0x484a0000 0x00 0x2000>,
+ <0x00 0x484c0000 0x00 0x2000>,
+ <0x00 0x48430000 0x00 0x1000>;
+ reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt",
+ "cfg", "tchan", "rchan", "rflow";
+};
+
+&main_rgmii1_pins_default {
+ bootph-all;
+};
+
+&main_timer0 {
+ clock-frequency = <25000000>;
+};
+
+&main_uart0 {
+ bootph-all;
+};
+
+&main_uart0_pins_default {
+ bootph-all;
+};
+
+&main_uart1 {
+ bootph-all;
+};
+
+&main_uart1_pins_default {
+ bootph-all;
+};
+
+&ospi0 {
+ bootph-all;
+
+ flash@0 {
+ bootph-all;
+ };
+};
+
+&ospi0_pins_default {
+ bootph-all;
+};
+
+&sdhci0 {
+ bootph-all;
+};
+
+&sdhci1 {
+ bootph-all;
+};
+
+&vcc_3v3_mmc {
+ bootph-all;
+};
+
+&vcc_5v0_som {
+ bootph-all;
+};
+
+&vddshv5_sdio {
+ bootph-all;
+};
+
+&wkup_uart0 {
+ bootph-all;
+};
diff --git a/arch/arm/dts/k3-am625-phyboard-lyra-rdk.dts b/arch/arm/dts/k3-am625-phyboard-lyra-rdk.dts
new file mode 100644
index 0000000..a438baf
--- /dev/null
+++ b/arch/arm/dts/k3-am625-phyboard-lyra-rdk.dts
@@ -0,0 +1,266 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2022 - 2023 PHYTEC Messtechnik GmbH
+ * Author: Wadim Egorov <w.egorov@phytec.de>
+ *
+ * Product homepage:
+ * https://www.phytec.com/product/phyboard-am62x
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
+#include <dt-bindings/net/ti-dp83867.h>
+#include "k3-am625.dtsi"
+#include "k3-am62-phycore-som.dtsi"
+
+/ {
+ compatible = "phytec,am625-phyboard-lyra-rdk",
+ "phytec,am62-phycore-som", "ti,am625";
+ model = "PHYTEC phyBOARD-Lyra AM625";
+
+ aliases {
+ serial2 = &main_uart0;
+ serial3 = &main_uart1;
+ mmc1 = &sdhci1;
+ usb0 = &usb0;
+ usb1 = &usb1;
+ ethernet1 = &cpsw_port2;
+ };
+
+ can_tc1: can-phy0 {
+ compatible = "ti,tcan1042";
+ #phy-cells = <0>;
+ max-bitrate = <5000000>;
+ standby-gpios = <&gpio_exp 1 GPIO_ACTIVE_HIGH>;
+ };
+
+ keys {
+ compatible = "gpio-keys";
+ autorepeat;
+ pinctrl-names = "default";
+ pinctrl-0 = <&gpio_keys_pins_default>;
+
+ key-home {
+ label = "home";
+ linux,code = <KEY_HOME>;
+ gpios = <&main_gpio1 23 GPIO_ACTIVE_HIGH>;
+ };
+
+ key-menu {
+ label = "menu";
+ linux,code = <KEY_MENU>;
+ gpios = <&gpio_exp 4 GPIO_ACTIVE_HIGH>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <&leds_pins_default>, <&user_leds_pins_default>;
+
+ led-1 {
+ gpios = <&main_gpio0 32 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "mmc0";
+ };
+
+ led-2 {
+ gpios = <&gpio_exp 2 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "mmc1";
+ };
+ };
+
+ vcc_3v3_mmc: regulator-vcc-3v3-mmc {
+ compatible = "regulator-fixed";
+ regulator-name = "VCC_3V3_MMC";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+};
+
+&main_pmx0 {
+ gpio_keys_pins_default: gpio-keys-default-pins {
+ pinctrl-single,pins = <
+ AM62X_IOPAD(0x1d4, PIN_INPUT, 7) /* (B15) UART0_RTSn.GPIO1_23 */
+ >;
+ };
+
+ gpio_exp_int_pins_default: gpio-exp-int-default-pins {
+ pinctrl-single,pins = <
+ AM62X_IOPAD(0x244, PIN_INPUT, 7) /* (C17) MMC1_SDWP.GPIO1_49 */
+ >;
+ };
+
+ main_i2c1_pins_default: main-i2c1-default-pins {
+ pinctrl-single,pins = <
+ AM62X_IOPAD(0x1e8, PIN_INPUT_PULLUP, 0) /* (B17) I2C1_SCL */
+ AM62X_IOPAD(0x1ec, PIN_INPUT_PULLUP, 0) /* (A17) I2C1_SDA */
+ >;
+ };
+
+ main_mcan0_pins_default: main-mcan0-default-pins {
+ pinctrl-single,pins = <
+ AM62X_IOPAD(0x1dc, PIN_INPUT, 0) /* (E15) MCAN0_RX */
+ AM62X_IOPAD(0x1d8, PIN_OUTPUT, 0) /* (C15) MCAN0_TX */
+ >;
+ };
+
+ main_mmc1_pins_default: main-mmc1-default-pins {
+ pinctrl-single,pins = <
+ AM62X_IOPAD(0x23c, PIN_INPUT_PULLUP, 0) /* (A21) MMC1_CMD */
+ AM62X_IOPAD(0x234, PIN_INPUT_PULLDOWN, 0) /* (B22) MMC1_CLK */
+ AM62X_IOPAD(0x230, PIN_INPUT_PULLUP, 0) /* (A22) MMC1_DAT0 */
+ AM62X_IOPAD(0x22c, PIN_INPUT_PULLUP, 0) /* (B21) MMC1_DAT1 */
+ AM62X_IOPAD(0x228, PIN_INPUT_PULLUP, 0) /* (C21) MMC1_DAT2 */
+ AM62X_IOPAD(0x224, PIN_INPUT_PULLUP, 0) /* (D22) MMC1_DAT3 */
+ AM62X_IOPAD(0x240, PIN_INPUT_PULLUP, 0) /* (D17) MMC1_SDCD */
+ >;
+ };
+
+ main_rgmii2_pins_default: main-rgmii2-default-pins {
+ pinctrl-single,pins = <
+ AM62X_IOPAD(0x184, PIN_INPUT, 0) /* (AE23) RGMII2_RD0 */
+ AM62X_IOPAD(0x188, PIN_INPUT, 0) /* (AB20) RGMII2_RD1 */
+ AM62X_IOPAD(0x18c, PIN_INPUT, 0) /* (AC21) RGMII2_RD2 */
+ AM62X_IOPAD(0x190, PIN_INPUT, 0) /* (AE22) RGMII2_RD3 */
+ AM62X_IOPAD(0x180, PIN_INPUT, 0) /* (AD23) RGMII2_RXC */
+ AM62X_IOPAD(0x17c, PIN_INPUT, 0) /* (AD22) RGMII2_RX_CTL */
+ AM62X_IOPAD(0x16c, PIN_OUTPUT, 0) /* (Y18) RGMII2_TD0 */
+ AM62X_IOPAD(0x170, PIN_OUTPUT, 0) /* (AA18) RGMII2_TD1 */
+ AM62X_IOPAD(0x174, PIN_OUTPUT, 0) /* (AD21) RGMII2_TD2 */
+ AM62X_IOPAD(0x178, PIN_OUTPUT, 0) /* (AC20) RGMII2_TD3 */
+ AM62X_IOPAD(0x168, PIN_OUTPUT, 0) /* (AE21) RGMII2_TXC */
+ AM62X_IOPAD(0x164, PIN_OUTPUT, 0) /* (AA19) RGMII2_TX_CTL */
+ >;
+ };
+
+ main_uart0_pins_default: main-uart0-default-pins {
+ pinctrl-single,pins = <
+ AM62X_IOPAD(0x1c8, PIN_INPUT, 0) /* (D14) UART0_RXD */
+ AM62X_IOPAD(0x1cc, PIN_OUTPUT, 0) /* (E14) UART0_TXD */
+ >;
+ };
+
+ main_uart1_pins_default: main-uart1-default-pins {
+ pinctrl-single,pins = <
+ AM62X_IOPAD(0x194, PIN_INPUT, 2) /* (B19) MCASP0_AXR3.UART1_CTSn */
+ AM62X_IOPAD(0x198, PIN_OUTPUT, 2) /* (A19) MCASP0_AXR2.UART1_RTSn */
+ AM62X_IOPAD(0x1ac, PIN_INPUT, 2) /* (E19) MCASP0_AFSR.UART1_RXD */
+ AM62X_IOPAD(0x1b0, PIN_OUTPUT, 2) /* (A20) MCASP0_ACLKR.UART1_TXD */
+ >;
+ };
+
+ main_usb1_pins_default: main-usb1-default-pins {
+ pinctrl-single,pins = <
+ AM62X_IOPAD(0x258, PIN_OUTPUT, 0) /* (F18) USB1_DRVVBUS */
+ >;
+ };
+
+ user_leds_pins_default: user-leds-default-pins {
+ pinctrl-single,pins = <
+ AM62X_IOPAD(0x084, PIN_OUTPUT, 7) /* (L23) GPMC0_ADVn_ALE.GPIO0_32 */
+ >;
+ };
+};
+
+&cpsw3g {
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_rgmii1_pins_default>, <&main_rgmii2_pins_default>;
+};
+
+&cpsw_port2 {
+ phy-mode = "rgmii-rxid";
+ phy-handle = <&cpsw3g_phy3>;
+};
+
+&cpsw3g_mdio {
+ cpsw3g_phy3: ethernet-phy@3 {
+ compatible = "ethernet-phy-id2000.a231", "ethernet-phy-ieee802.3-c22";
+ reg = <3>;
+ ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
+ ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
+ };
+};
+
+&main_i2c1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_i2c1_pins_default>;
+ clock-frequency = <400000>;
+ status = "okay";
+
+ gpio_exp: gpio-expander@21 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&gpio_exp_int_pins_default>;
+ compatible = "nxp,pcf8574";
+ reg = <0x21>;
+ interrupt-parent = <&main_gpio1>;
+ interrupts = <49 0>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ gpio-line-names = "GPIO0_HDMI_RST", "GPIO1_CAN0_nEN",
+ "GPIO2_LED2", "GPIO3_LVDS_GPIO",
+ "GPIO4_BUT2", "GPIO5_LVDS_BKLT_EN",
+ "GPIO6_ETH1_USER_RESET", "GPIO7_AUDIO_USER_RESET";
+ };
+
+ eeprom@51 {
+ compatible = "atmel,24c02";
+ pagesize = <16>;
+ reg = <0x51>;
+ };
+};
+
+&main_mcan0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_mcan0_pins_default>;
+ phys = <&can_tc1>;
+ status = "okay";
+};
+
+&main_uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_uart0_pins_default>;
+ status = "okay";
+};
+
+&main_uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_uart1_pins_default>;
+ /* Main UART1 may be used by TIFS firmware */
+ status = "okay";
+};
+
+&sdhci1 {
+ vmmc-supply = <&vcc_3v3_mmc>;
+ vqmmc-supply = <&vddshv5_sdio>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_mmc1_pins_default>;
+ ti,driver-strength-ohm = <50>;
+ disable-wp;
+ no-1-8-v;
+ status = "okay";
+};
+
+&usbss0 {
+ ti,vbus-divider;
+ status = "okay";
+};
+
+&usbss1 {
+ ti,vbus-divider;
+ status = "okay";
+};
+
+&usb0 {
+ dr_mode = "peripheral";
+};
+
+&usb1 {
+ dr_mode = "host";
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_usb1_pins_default>;
+};
diff --git a/arch/arm/dts/k3-am625-phycore-som-binman.dtsi b/arch/arm/dts/k3-am625-phycore-som-binman.dtsi
new file mode 100644
index 0000000..ed50bfe
--- /dev/null
+++ b/arch/arm/dts/k3-am625-phycore-som-binman.dtsi
@@ -0,0 +1,314 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Based on k3-am625-sk-binman.dtsi
+ *
+ * Copyright (C) 2022 - 2023 PHYTEC Messtechnik GmbH
+ * Author: Wadim Egorov <w.egorov@phytec.de>
+ */
+
+#include "k3-binman.dtsi"
+
+#ifdef CONFIG_TARGET_PHYCORE_AM62X_R5
+&binman {
+ tiboot3-am62x-hs-phycore-som.bin {
+ filename = "tiboot3-am62x-hs-phycore-som.bin";
+ ti-secure-rom {
+ content = <&u_boot_spl>, <&ti_fs_enc>, <&combined_tifs_cfg>,
+ <&combined_dm_cfg>, <&sysfw_inner_cert>;
+ combined;
+ dm-data;
+ sysfw-inner-cert;
+ keyfile = "custMpk.pem";
+ sw-rev = <1>;
+ content-sbl = <&u_boot_spl>;
+ content-sysfw = <&ti_fs_enc>;
+ content-sysfw-data = <&combined_tifs_cfg>;
+ content-sysfw-inner-cert = <&sysfw_inner_cert>;
+ content-dm-data = <&combined_dm_cfg>;
+ load = <0x43c00000>;
+ load-sysfw = <0x40000>;
+ load-sysfw-data = <0x67000>;
+ load-dm-data = <0x43c3a800>;
+ };
+ u_boot_spl: u-boot-spl {
+ no-expanded;
+ };
+ ti_fs_enc: ti-fs-enc.bin {
+ filename = "ti-sysfw/ti-fs-firmware-am62x-hs-enc.bin";
+ type = "blob-ext";
+ optional;
+ };
+ combined_tifs_cfg: combined-tifs-cfg.bin {
+ filename = "combined-tifs-cfg.bin";
+ type = "blob-ext";
+ };
+ sysfw_inner_cert: sysfw-inner-cert {
+ filename = "ti-sysfw/ti-fs-firmware-am62x-hs-cert.bin";
+ type = "blob-ext";
+ optional;
+ };
+ combined_dm_cfg: combined-dm-cfg.bin {
+ filename = "combined-dm-cfg.bin";
+ type = "blob-ext";
+ };
+ };
+};
+
+&binman {
+ tiboot3-am62x-hs-fs-phycore-som.bin {
+ filename = "tiboot3-am62x-hs-fs-phycore-som.bin";
+ symlink = "tiboot3.bin";
+ ti-secure-rom {
+ content = <&u_boot_spl_fs>, <&ti_fs_enc_fs>, <&combined_tifs_cfg_fs>,
+ <&combined_dm_cfg_fs>, <&sysfw_inner_cert_fs>;
+ combined;
+ dm-data;
+ sysfw-inner-cert;
+ keyfile = "custMpk.pem";
+ sw-rev = <1>;
+ content-sbl = <&u_boot_spl_fs>;
+ content-sysfw = <&ti_fs_enc_fs>;
+ content-sysfw-data = <&combined_tifs_cfg_fs>;
+ content-sysfw-inner-cert = <&sysfw_inner_cert_fs>;
+ content-dm-data = <&combined_dm_cfg_fs>;
+ load = <0x43c00000>;
+ load-sysfw = <0x40000>;
+ load-sysfw-data = <0x67000>;
+ load-dm-data = <0x43c3a800>;
+ };
+ u_boot_spl_fs: u-boot-spl {
+ no-expanded;
+ };
+ ti_fs_enc_fs: ti-fs-enc.bin {
+ filename = "ti-sysfw/ti-fs-firmware-am62x-hs-fs-enc.bin";
+ type = "blob-ext";
+ optional;
+ };
+ combined_tifs_cfg_fs: combined-tifs-cfg.bin {
+ filename = "combined-tifs-cfg.bin";
+ type = "blob-ext";
+ };
+ sysfw_inner_cert_fs: sysfw-inner-cert {
+ filename = "ti-sysfw/ti-fs-firmware-am62x-hs-fs-cert.bin";
+ type = "blob-ext";
+ optional;
+ };
+ combined_dm_cfg_fs: combined-dm-cfg.bin {
+ filename = "combined-dm-cfg.bin";
+ type = "blob-ext";
+ };
+ };
+};
+
+&binman {
+ tiboot3-am62x-gp-phycore-som.bin {
+ filename = "tiboot3-am62x-gp-phycore-som.bin";
+ ti-secure-rom {
+ content = <&u_boot_spl_unsigned>, <&ti_fs_gp>,
+ <&combined_tifs_cfg_gp>, <&combined_dm_cfg_gp>;
+ combined;
+ dm-data;
+ content-sbl = <&u_boot_spl_unsigned>;
+ load = <0x43c00000>;
+ content-sysfw = <&ti_fs_gp>;
+ load-sysfw = <0x40000>;
+ content-sysfw-data = <&combined_tifs_cfg_gp>;
+ load-sysfw-data = <0x67000>;
+ content-dm-data = <&combined_dm_cfg_gp>;
+ load-dm-data = <0x43c3a800>;
+ sw-rev = <1>;
+ keyfile = "ti-degenerate-key.pem";
+ };
+ u_boot_spl_unsigned: u-boot-spl {
+ no-expanded;
+ };
+ ti_fs_gp: ti-fs-gp.bin {
+ filename = "ti-sysfw/ti-fs-firmware-am62x-gp.bin";
+ type = "blob-ext";
+ optional;
+ };
+ combined_tifs_cfg_gp: combined-tifs-cfg-gp.bin {
+ filename = "combined-tifs-cfg.bin";
+ type = "blob-ext";
+ };
+ combined_dm_cfg_gp: combined-dm-cfg-gp.bin {
+ filename = "combined-dm-cfg.bin";
+ type = "blob-ext";
+ };
+ };
+};
+#endif /* CONFIG_TARGET_PHYCORE_AM62X_R5 */
+
+#ifdef CONFIG_TARGET_PHYCORE_AM62X_A53
+#define SPL_AM625_PHYBOARD_LYRA_DTB "spl/dts/k3-am625-phyboard-lyra-rdk.dtb"
+#define AM625_PHYBOARD_LYRA_DTB "u-boot.dtb"
+
+&binman {
+ ti-dm {
+ filename = "ti-dm.bin";
+ blob-ext {
+ filename = "ti-dm/am62xx/ipc_echo_testb_mcu1_0_release_strip.xer5f";
+ };
+ };
+ ti-spl {
+ insert-template = <&ti_spl_template>;
+
+ fit {
+
+ images {
+ dm {
+ ti-secure {
+ content = <&dm>;
+ keyfile = "custMpk.pem";
+ };
+ dm: blob-ext {
+ filename = "ti-dm.bin";
+ };
+ };
+
+ fdt-0 {
+ description = "k3-am625-phyboard-lyra-rdk";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ ti-secure {
+ content = <&spl_am625_phyboard_lyra_dtb>;
+ keyfile = "custMpk.pem";
+ };
+ spl_am625_phyboard_lyra_dtb: blob-ext {
+ filename = SPL_AM625_PHYBOARD_LYRA_DTB;
+ };
+ };
+ };
+
+ configurations {
+ default = "conf-0";
+
+ conf-0 {
+ description = "k3-am625-phyboard-lyra-rdk";
+ firmware = "atf";
+ loadables = "tee", "dm", "spl";
+ fdt = "fdt-0";
+ };
+ };
+ };
+ };
+};
+
+&binman {
+ u-boot {
+ insert-template = <&u_boot_template>;
+
+ fit {
+ images {
+ uboot {
+ description = "U-Boot for phyCORE-AM62x";
+ };
+
+ fdt-0 {
+ description = "k3-am625-phyboard-lyra-rdk";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ ti-secure {
+ content = <&am625_phyboard_lyra_dtb>;
+ keyfile = "custMpk.pem";
+ };
+ am625_phyboard_lyra_dtb: blob-ext {
+ filename = AM625_PHYBOARD_LYRA_DTB;
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+ };
+
+ configurations {
+ default = "conf-0";
+
+ conf-0 {
+ description = "k3-am625-phyboard-lyra-rdk";
+ firmware = "uboot";
+ loadables = "uboot";
+ fdt = "fdt-0";
+ };
+ };
+ };
+ };
+};
+
+&binman {
+ ti-spl_unsigned {
+ insert-template = <&ti_spl_unsigned_template>;
+
+ fit {
+ images {
+ dm {
+ blob-ext {
+ filename = "ti-dm.bin";
+ };
+ };
+
+ fdt-0 {
+ description = "k3-am625-phyboard-lyra-rdk";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ spl_am625_phyboard_lyra_dtb_unsigned: blob {
+ filename = SPL_AM625_PHYBOARD_LYRA_DTB;
+ };
+ };
+ };
+
+ configurations {
+ default = "conf-0";
+
+ conf-0 {
+ description = "k3-am625-phyboard-lyra-rdk";
+ firmware = "atf";
+ loadables = "tee", "dm", "spl";
+ fdt = "fdt-0";
+ };
+ };
+ };
+ };
+};
+
+&binman {
+ u-boot_unsigned {
+ insert-template = <&u_boot_unsigned_template>;
+
+ fit {
+ images {
+ uboot {
+ description = "U-Boot for phyCORE-AM62x";
+ };
+
+ fdt-0 {
+ description = "k3-am625-phyboard-lyra-rdk";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ am625_phyboard_lyra_dtb_unsigned: blob {
+ filename = AM625_PHYBOARD_LYRA_DTB;
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+ };
+
+ configurations {
+ default = "conf-0";
+
+ conf-0 {
+ description = "k3-am625-phyboard-lyra-rdk";
+ firmware = "uboot";
+ loadables = "uboot";
+ fdt = "fdt-0";
+ };
+ };
+ };
+ };
+};
+#endif /* CONFIG_TARGET_PHYCORE_AM62X_A53 */
diff --git a/arch/arm/dts/k3-am625-r5-beagleplay.dts b/arch/arm/dts/k3-am625-r5-beagleplay.dts
index 864ed54..9db58f0 100644
--- a/arch/arm/dts/k3-am625-r5-beagleplay.dts
+++ b/arch/arm/dts/k3-am625-r5-beagleplay.dts
@@ -54,12 +54,7 @@
ti,secure-host;
};
-&mcu_esm {
- bootph-pre-ram;
-};
-
&secure_proxy_sa3 {
- bootph-pre-ram;
/* We require this for boot handshake */
status = "okay";
};
@@ -73,10 +68,6 @@
};
};
-&main_esm {
- bootph-pre-ram;
-};
-
&main_pktdma {
ti,sci = <&dm_tifs>;
};
diff --git a/arch/arm/dts/k3-am625-r5-phycore-som-2gb.dts b/arch/arm/dts/k3-am625-r5-phycore-som-2gb.dts
new file mode 100644
index 0000000..7015440
--- /dev/null
+++ b/arch/arm/dts/k3-am625-r5-phycore-som-2gb.dts
@@ -0,0 +1,119 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * phyCORE-AM62x dts file for R5 SPL with 2GB RAM
+ * Copyright (C) 2022 - 2023 Phytec Messtechnik GmbH
+ * Author: Wadim Egorov <w.egorov@phytec.de>
+ */
+
+#include "k3-am625-phyboard-lyra-rdk.dts"
+#include "k3-am62-phycore-som-ddr4-2gb.dtsi"
+#include "k3-am62-ddr.dtsi"
+
+#include "k3-am625-phyboard-lyra-rdk-u-boot.dtsi"
+
+/ {
+ aliases {
+ remoteproc0 = &sysctrler;
+ remoteproc1 = &a53_0;
+ serial0 = &wkup_uart0;
+ serial3 = &main_uart1;
+ };
+
+ a53_0: a53@0 {
+ compatible = "ti,am654-rproc";
+ reg = <0x00 0x00a90000 0x00 0x10>;
+ power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>,
+ <&k3_pds 135 TI_SCI_PD_EXCLUSIVE>,
+ <&k3_pds 166 TI_SCI_PD_EXCLUSIVE>;
+ resets = <&k3_reset 135 0>;
+ clocks = <&k3_clks 61 0>;
+ assigned-clocks = <&k3_clks 61 0>, <&k3_clks 135 0>;
+ assigned-clock-parents = <&k3_clks 61 2>;
+ assigned-clock-rates = <200000000>, <1200000000>;
+ ti,sci = <&dmsc>;
+ ti,sci-proc-id = <32>;
+ ti,sci-host-id = <10>;
+ bootph-pre-ram;
+ };
+
+ dm_tifs: dm-tifs {
+ compatible = "ti,j721e-dm-sci";
+ ti,host-id = <36>;
+ ti,secure-host;
+ mbox-names = "rx", "tx";
+ mboxes= <&secure_proxy_main 22>,
+ <&secure_proxy_main 23>;
+ bootph-pre-ram;
+ };
+
+ memory@80000000 {
+ device_type = "memory";
+ /* 2G RAM */
+ reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
+ bootph-pre-ram;
+ };
+};
+
+&secure_proxy_sa3 {
+ /* We require this for boot handshake */
+ status = "okay";
+};
+
+&cbass_main {
+ sysctrler: sysctrler {
+ compatible = "ti,am654-system-controller";
+ mboxes= <&secure_proxy_main 1>, <&secure_proxy_main 0>, <&secure_proxy_sa3 0>;
+ mbox-names = "tx", "rx", "boot_notify";
+ bootph-pre-ram;
+ };
+};
+
+&dmsc {
+ mboxes= <&secure_proxy_main 0>,
+ <&secure_proxy_main 1>,
+ <&secure_proxy_main 0>;
+ mbox-names = "rx", "tx", "notify";
+ ti,host-id = <35>;
+ ti,secure-host;
+};
+
+&main_bcdma {
+ ti,sci = <&dm_tifs>;
+};
+
+&main_pktdma {
+ ti,sci = <&dm_tifs>;
+};
+
+/* Main UART1 is used for TIFS firmware logs */
+&main_uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_uart1_pins_default>;
+ status = "okay";
+ bootph-pre-ram;
+};
+
+&mcu_pmx0 {
+ wkup_uart0_pins_default: wkup-uart0-pins-default {
+ pinctrl-single,pins = <
+ AM62X_MCU_IOPAD(0x02c, PIN_INPUT, 0) /* (C6) WKUP_UART0_CTSn */
+ AM62X_MCU_IOPAD(0x030, PIN_OUTPUT, 0) /* (A4) WKUP_UART0_RTSn */
+ AM62X_MCU_IOPAD(0x024, PIN_INPUT, 0) /* (B4) WKUP_UART0_RXD */
+ AM62X_MCU_IOPAD(0x028, PIN_OUTPUT, 0) /* (C5) WKUP_UART0_TXD */
+ >;
+ bootph-pre-ram;
+ };
+};
+
+&ospi0 {
+ reg = <0x00 0x0fc40000 0x00 0x100>,
+ <0x00 0x60000000 0x00 0x08000000>;
+};
+
+/* WKUP UART0 is used for DM firmware logs */
+&wkup_uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&wkup_uart0_pins_default>;
+ status = "okay";
+ bootph-pre-ram;
+};
diff --git a/arch/arm/dts/k3-am625-r5-sk.dts b/arch/arm/dts/k3-am625-r5-sk.dts
index bf21922..6b9f40e 100644
--- a/arch/arm/dts/k3-am625-r5-sk.dts
+++ b/arch/arm/dts/k3-am625-r5-sk.dts
@@ -55,20 +55,11 @@
ti,secure-host;
};
-&mcu_esm {
- bootph-pre-ram;
-};
-
&secure_proxy_sa3 {
- bootph-pre-ram;
/* We require this for boot handshake */
status = "okay";
};
-&main_esm {
- bootph-pre-ram;
-};
-
&cbass_main {
sysctrler: sysctrler {
compatible = "ti,am654-system-controller";
@@ -78,22 +69,14 @@
};
};
-&wkup_uart0_pins_default {
- bootph-pre-ram;
-};
-
-&main_uart1_pins_default {
- bootph-pre-ram;
-};
-
/* WKUP UART0 is used for DM firmware logs */
&wkup_uart0 {
- bootph-pre-ram;
+ status = "okay";
};
/* Main UART1 is used for TIFS firmware logs */
&main_uart1 {
- bootph-pre-ram;
+ status = "okay";
};
&ospi0 {
diff --git a/arch/arm/dts/k3-am625-sk-binman.dtsi b/arch/arm/dts/k3-am625-sk-binman.dtsi
index 41277bf..5b058bd 100644
--- a/arch/arm/dts/k3-am625-sk-binman.dtsi
+++ b/arch/arm/dts/k3-am625-sk-binman.dtsi
@@ -141,10 +141,7 @@
#ifdef CONFIG_TARGET_AM625_A53_EVM
-#define SPL_NODTB "spl/u-boot-spl-nodtb.bin"
#define SPL_AM625_SK_DTB "spl/dts/k3-am625-sk.dtb"
-
-#define UBOOT_NODTB "u-boot-nodtb.bin"
#define AM625_SK_DTB "u-boot.dtb"
&binman {
@@ -155,81 +152,20 @@
};
};
ti-spl {
- filename = "tispl.bin";
- pad-byte = <0xff>;
+ insert-template = <&ti_spl_template>;
fit {
- description = "Configuration to load ATF and SPL";
- #address-cells = <1>;
-
images {
-
- atf {
- description = "ARM Trusted Firmware";
- type = "firmware";
- arch = "arm64";
- compression = "none";
- os = "arm-trusted-firmware";
- load = <CONFIG_K3_ATF_LOAD_ADDR>;
- entry = <CONFIG_K3_ATF_LOAD_ADDR>;
- ti-secure {
- content = <&atf>;
- keyfile = "custMpk.pem";
- };
- atf: atf-bl31 {
- };
- };
-
- tee {
- description = "OP-TEE";
- type = "tee";
- arch = "arm64";
- compression = "none";
- os = "tee";
- load = <0x9e800000>;
- entry = <0x9e800000>;
- ti-secure {
- content = <&tee>;
- keyfile = "custMpk.pem";
- };
- tee: tee-os {
- };
- };
-
dm {
- description = "DM binary";
- type = "firmware";
- arch = "arm32";
- compression = "none";
- os = "DM";
- load = <0x89000000>;
- entry = <0x89000000>;
ti-secure {
content = <&dm>;
keyfile = "custMpk.pem";
};
- dm: blob-ext {
+ dm: ti-dm {
filename = "ti-dm.bin";
};
};
- spl {
- description = "SPL (64-bit)";
- type = "standalone";
- os = "U-Boot";
- arch = "arm64";
- compression = "none";
- load = <CONFIG_SPL_TEXT_BASE>;
- entry = <CONFIG_SPL_TEXT_BASE>;
- ti-secure {
- content = <&u_boot_spl_nodtb>;
- keyfile = "custMpk.pem";
- };
- u_boot_spl_nodtb: blob-ext {
- filename = SPL_NODTB;
- };
- };
-
fdt-0 {
description = "k3-am625-sk";
type = "flat_dt";
@@ -263,29 +199,12 @@
&binman {
u-boot {
- filename = "u-boot.img";
- pad-byte = <0xff>;
+ insert-template = <&u_boot_template>;
fit {
- description = "FIT image with multiple configurations";
-
images {
uboot {
- description = "U-Boot for AM625 board";
- type = "firmware";
- os = "u-boot";
- arch = "arm";
- compression = "none";
- load = <CONFIG_TEXT_BASE>;
- ti-secure {
- content = <&u_boot_nodtb>;
- keyfile = "custMpk.pem";
- };
- u_boot_nodtb: u-boot-nodtb {
- };
- hash {
- algo = "crc32";
- };
+ description = "U-Boot for AM625 Board";
};
fdt-0 {
@@ -323,67 +242,17 @@
&binman {
ti-spl_unsigned {
- filename = "tispl.bin_unsigned";
- pad-byte = <0xff>;
+ insert-template = <&ti_spl_unsigned_template>;
fit {
- description = "Configuration to load ATF and SPL";
- #address-cells = <1>;
-
images {
- atf {
- description = "ARM Trusted Firmware";
- type = "firmware";
- arch = "arm64";
- compression = "none";
- os = "arm-trusted-firmware";
- load = <CONFIG_K3_ATF_LOAD_ADDR>;
- entry = <CONFIG_K3_ATF_LOAD_ADDR>;
- atf-bl31 {
- filename = "bl31.bin";
- };
- };
-
- tee {
- description = "OP-TEE";
- type = "tee";
- arch = "arm64";
- compression = "none";
- os = "tee";
- load = <0x9e800000>;
- entry = <0x9e800000>;
- tee-os {
- filename = "tee-raw.bin";
- };
- };
-
dm {
- description = "DM binary";
- type = "firmware";
- arch = "arm32";
- compression = "none";
- os = "DM";
- load = <0x89000000>;
- entry = <0x89000000>;
- blob-ext {
+ ti-dm {
filename = "ti-dm.bin";
};
};
- spl {
- description = "SPL (64-bit)";
- type = "standalone";
- os = "U-Boot";
- arch = "arm64";
- compression = "none";
- load = <CONFIG_SPL_TEXT_BASE>;
- entry = <CONFIG_SPL_TEXT_BASE>;
- blob {
- filename = "spl/u-boot-spl-nodtb.bin";
- };
- };
-
fdt-0 {
description = "k3-am625-sk";
type = "flat_dt";
@@ -411,26 +280,12 @@
&binman {
u-boot_unsigned {
- filename = "u-boot.img_unsigned";
- pad-byte = <0xff>;
+ insert-template = <&u_boot_unsigned_template>;
fit {
- description = "FIT image with multiple configurations";
-
images {
uboot {
- description = "U-Boot for AM625 board";
- type = "firmware";
- os = "u-boot";
- arch = "arm";
- compression = "none";
- load = <CONFIG_TEXT_BASE>;
- blob {
- filename = UBOOT_NODTB;
- };
- hash {
- algo = "crc32";
- };
+ description = "U-Boot for AM625 Board";
};
fdt-0 {
diff --git a/arch/arm/dts/k3-am625-sk-u-boot.dtsi b/arch/arm/dts/k3-am625-sk-u-boot.dtsi
index 7ae5e01..fa778b0 100644
--- a/arch/arm/dts/k3-am625-sk-u-boot.dtsi
+++ b/arch/arm/dts/k3-am625-sk-u-boot.dtsi
@@ -8,122 +8,12 @@
/ {
chosen {
- stdout-path = "serial2:115200n8";
tick-timer = &main_timer0;
};
-
- aliases {
- mmc1 = &sdhci1;
- };
-
- memory@80000000 {
- bootph-all;
- };
-};
-
-&main_conf {
- bootph-all;
-};
-
-&cbass_main {
- bootph-all;
};
&main_timer0 {
clock-frequency = <25000000>;
- bootph-all;
-};
-
-&dmss {
- bootph-all;
-};
-
-&secure_proxy_main {
- bootph-all;
-};
-
-&dmsc {
- bootph-all;
-};
-
-&k3_pds {
- bootph-all;
-};
-
-&k3_clks {
- bootph-all;
-};
-
-&k3_reset {
- bootph-all;
-};
-
-&wkup_conf {
- bootph-all;
-};
-
-&chipid {
- bootph-all;
-};
-
-&main_pmx0 {
- bootph-all;
-};
-
-&main_uart0 {
- bootph-all;
-};
-
-&main_uart0_pins_default {
- bootph-all;
-};
-
-&cbass_mcu {
- bootph-all;
-};
-
-&cbass_wakeup {
- bootph-all;
-};
-
-&mcu_pmx0 {
- bootph-all;
-};
-
-&sdhci1 {
- bootph-all;
-};
-
-&main_mmc1_pins_default {
- bootph-all;
-};
-
-&fss {
- bootph-all;
-};
-
-&ospi0_pins_default {
- bootph-all;
-};
-
-&ospi0 {
- bootph-all;
-
- flash@0 {
- bootph-all;
-
- partitions {
- bootph-all;
-
- partition@3fc0000 {
- bootph-all;
- };
- };
- };
-};
-
-&inta_main_dmss {
- bootph-all;
};
&main_bcdma {
@@ -153,41 +43,6 @@
bootph-all;
};
-&cpsw3g_mdio {
- bootph-all;
-};
-
-&cpsw3g_phy0 {
- bootph-all;
-};
-
-&cpsw3g_phy1 {
- bootph-all;
-};
-
-&main_rgmii1_pins_default {
- bootph-all;
-};
-
-&main_rgmii2_pins_default {
- bootph-all;
-};
-
-&phy_gmii_sel {
- bootph-all;
-};
-
-&cpsw3g {
- bootph-all;
- ethernet-ports {
- bootph-all;
- };
-};
-
-&cpsw_port1 {
- bootph-all;
-};
-
&cpsw_port2 {
status = "disabled";
};
diff --git a/arch/arm/dts/k3-am625-sk.dts b/arch/arm/dts/k3-am625-sk.dts
index 7c98c1b..b180924 100644
--- a/arch/arm/dts/k3-am625-sk.dts
+++ b/arch/arm/dts/k3-am625-sk.dts
@@ -31,6 +31,7 @@
vmain_pd: regulator-0 {
/* TPS65988 PD CONTROLLER OUTPUT */
+ bootph-all;
compatible = "regulator-fixed";
regulator-name = "vmain_pd";
regulator-min-microvolt = <5000000>;
@@ -41,6 +42,7 @@
vcc_5v0: regulator-1 {
/* Output of LM34936 */
+ bootph-all;
compatible = "regulator-fixed";
regulator-name = "vcc_5v0";
regulator-min-microvolt = <5000000>;
@@ -52,6 +54,7 @@
vcc_3v3_sys: regulator-2 {
/* output of LM61460-Q1 */
+ bootph-all;
compatible = "regulator-fixed";
regulator-name = "vcc_3v3_sys";
regulator-min-microvolt = <3300000>;
@@ -63,6 +66,7 @@
vdd_mmc1: regulator-3 {
/* TPS22918DBVR */
+ bootph-all;
compatible = "regulator-fixed";
regulator-name = "vdd_mmc1";
regulator-min-microvolt = <3300000>;
@@ -75,6 +79,7 @@
vdd_sd_dv: regulator-4 {
/* Output of TLV71033 */
+ bootph-all;
compatible = "regulator-gpio";
regulator-name = "tlv71033";
pinctrl-names = "default";
@@ -102,6 +107,7 @@
&main_pmx0 {
main_rgmii2_pins_default: main-rgmii2-default-pins {
+ bootph-all;
pinctrl-single,pins = <
AM62X_IOPAD(0x184, PIN_INPUT, 0) /* (AE23) RGMII2_RD0 */
AM62X_IOPAD(0x188, PIN_INPUT, 0) /* (AB20) RGMII2_RD1 */
@@ -119,6 +125,7 @@
};
ospi0_pins_default: ospi0-default-pins {
+ bootph-all;
pinctrl-single,pins = <
AM62X_IOPAD(0x000, PIN_OUTPUT, 0) /* (H24) OSPI0_CLK */
AM62X_IOPAD(0x02c, PIN_OUTPUT, 0) /* (F23) OSPI0_CSn0 */
@@ -135,20 +142,32 @@
};
vdd_sd_dv_pins_default: vdd-sd-dv-default-pins {
+ bootph-all;
pinctrl-single,pins = <
AM62X_IOPAD(0x07c, PIN_OUTPUT, 7) /* (P25) GPMC0_CLK.GPIO0_31 */
>;
};
main_gpio1_ioexp_intr_pins_default: main-gpio1-ioexp-intr-default-pins {
+ bootph-all;
pinctrl-single,pins = <
AM62X_IOPAD(0x01d4, PIN_INPUT, 7) /* (B15) UART0_RTSn.GPIO1_23 */
>;
};
};
+&main_gpio0 {
+ bootph-all;
+};
+
+&main_gpio1 {
+ bootph-all;
+};
+
&main_i2c1 {
+ bootph-all;
exp1: gpio@22 {
+ bootph-all;
compatible = "ti,tca6424";
reg = <0x22>;
gpio-controller;
@@ -207,12 +226,18 @@
};
};
+&fss {
+ bootph-all;
+};
+
&ospi0 {
+ bootph-all;
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&ospi0_pins_default>;
flash@0 {
+ bootph-all;
compatible = "jedec,spi-nor";
reg = <0x0>;
spi-tx-bus-width = <8>;
@@ -225,6 +250,7 @@
cdns,read-delay = <4>;
partitions {
+ bootph-all;
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
@@ -260,6 +286,7 @@
};
partition@3fc0000 {
+ bootph-pre-ram;
label = "ospi.phypattern";
reg = <0x3fc0000 0x40000>;
};
diff --git a/arch/arm/dts/k3-am625-verdin-lpddr4-1600MTs.dtsi b/arch/arm/dts/k3-am625-verdin-lpddr4-1600MTs.dtsi
index 9bad430..841541b 100644
--- a/arch/arm/dts/k3-am625-verdin-lpddr4-1600MTs.dtsi
+++ b/arch/arm/dts/k3-am625-verdin-lpddr4-1600MTs.dtsi
@@ -1,19 +1,20 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* This file was generated with the
- * AM62x SysConfig DDR Subsystem Register Configuration Tool v0.09.08
- * Fri Jun 09 2023 08:01:37 GMT+0200 (Central European Summer Time)
+ * AM62x SysConfig DDR Subsystem Register Configuration Tool v0.09.10
+ * Mon Dec 11 2023 17:07:35 GMT+0100 (Central European Standard Time)
* DDR Type: LPDDR4
* F0 = 50MHz F1 = NA F2 = 800MHz
* Density (per channel): 16Gb
* Write DBI: Enable
* Number of Ranks: 1
- */
+*/
#define DDRSS_PLL_FHS_CNT 3
#define DDRSS_PLL_FREQUENCY_1 400000000
#define DDRSS_PLL_FREQUENCY_2 400000000
+
#define DDRSS_CTL_0_DATA 0x00000B00
#define DDRSS_CTL_1_DATA 0x00000000
#define DDRSS_CTL_2_DATA 0x00000000
@@ -54,20 +55,20 @@
#define DDRSS_CTL_37_DATA 0x00000000
#define DDRSS_CTL_38_DATA 0x0000040C
#define DDRSS_CTL_39_DATA 0x00000000
-#define DDRSS_CTL_40_DATA 0x0000081C
+#define DDRSS_CTL_40_DATA 0x00000A1C
#define DDRSS_CTL_41_DATA 0x00000000
-#define DDRSS_CTL_42_DATA 0x0000081C
+#define DDRSS_CTL_42_DATA 0x00000A1C
#define DDRSS_CTL_43_DATA 0x00000000
#define DDRSS_CTL_44_DATA 0x05000804
#define DDRSS_CTL_45_DATA 0x00000B00
#define DDRSS_CTL_46_DATA 0x09090004
-#define DDRSS_CTL_47_DATA 0x00000204
+#define DDRSS_CTL_47_DATA 0x00000304
#define DDRSS_CTL_48_DATA 0x00370008
#define DDRSS_CTL_49_DATA 0x09090024
-#define DDRSS_CTL_50_DATA 0x00001910
+#define DDRSS_CTL_50_DATA 0x00002110
#define DDRSS_CTL_51_DATA 0x00370008
#define DDRSS_CTL_52_DATA 0x09090024
-#define DDRSS_CTL_53_DATA 0x09001910
+#define DDRSS_CTL_53_DATA 0x09002110
#define DDRSS_CTL_54_DATA 0x000A0A09
#define DDRSS_CTL_55_DATA 0x0400036D
#define DDRSS_CTL_56_DATA 0x09092004
@@ -223,19 +224,19 @@
#define DDRSS_CTL_206_DATA 0x00000000
#define DDRSS_CTL_207_DATA 0x00000000
#define DDRSS_CTL_208_DATA 0x00000024
-#define DDRSS_CTL_209_DATA 0x00000012
+#define DDRSS_CTL_209_DATA 0x0000001A
#define DDRSS_CTL_210_DATA 0x00000000
#define DDRSS_CTL_211_DATA 0x00000024
-#define DDRSS_CTL_212_DATA 0x00000012
+#define DDRSS_CTL_212_DATA 0x0000001A
#define DDRSS_CTL_213_DATA 0x00000000
#define DDRSS_CTL_214_DATA 0x00000004
#define DDRSS_CTL_215_DATA 0x00000000
#define DDRSS_CTL_216_DATA 0x00000000
#define DDRSS_CTL_217_DATA 0x00000024
-#define DDRSS_CTL_218_DATA 0x00000012
+#define DDRSS_CTL_218_DATA 0x0000001A
#define DDRSS_CTL_219_DATA 0x00000000
#define DDRSS_CTL_220_DATA 0x00000024
-#define DDRSS_CTL_221_DATA 0x00000012
+#define DDRSS_CTL_221_DATA 0x0000001A
#define DDRSS_CTL_222_DATA 0x00000000
#define DDRSS_CTL_223_DATA 0x00000000
#define DDRSS_CTL_224_DATA 0x00000031
@@ -268,21 +269,21 @@
#define DDRSS_CTL_251_DATA 0x00000000
#define DDRSS_CTL_252_DATA 0x00000000
#define DDRSS_CTL_253_DATA 0x00000000
-#define DDRSS_CTL_254_DATA 0x46004646
-#define DDRSS_CTL_255_DATA 0x00002746
-#define DDRSS_CTL_256_DATA 0x00000027
-#define DDRSS_CTL_257_DATA 0x00000027
-#define DDRSS_CTL_258_DATA 0x00000027
-#define DDRSS_CTL_259_DATA 0x00000027
-#define DDRSS_CTL_260_DATA 0x00000027
+#define DDRSS_CTL_254_DATA 0x44004444
+#define DDRSS_CTL_255_DATA 0x00004D44
+#define DDRSS_CTL_256_DATA 0x0000004D
+#define DDRSS_CTL_257_DATA 0x0000004D
+#define DDRSS_CTL_258_DATA 0x0000004D
+#define DDRSS_CTL_259_DATA 0x0000004D
+#define DDRSS_CTL_260_DATA 0x0000004D
#define DDRSS_CTL_261_DATA 0x00000000
#define DDRSS_CTL_262_DATA 0x00000000
-#define DDRSS_CTL_263_DATA 0x0000000F
-#define DDRSS_CTL_264_DATA 0x0000000F
-#define DDRSS_CTL_265_DATA 0x0000000F
-#define DDRSS_CTL_266_DATA 0x0000000F
-#define DDRSS_CTL_267_DATA 0x0000000F
-#define DDRSS_CTL_268_DATA 0x0000000F
+#define DDRSS_CTL_263_DATA 0x0000004D
+#define DDRSS_CTL_264_DATA 0x0000004D
+#define DDRSS_CTL_265_DATA 0x0000004D
+#define DDRSS_CTL_266_DATA 0x0000004D
+#define DDRSS_CTL_267_DATA 0x0000004D
+#define DDRSS_CTL_268_DATA 0x0000004D
#define DDRSS_CTL_269_DATA 0x00000000
#define DDRSS_CTL_270_DATA 0x00001000
#define DDRSS_CTL_271_DATA 0x00000015
@@ -388,13 +389,13 @@
#define DDRSS_CTL_371_DATA 0x01000101
#define DDRSS_CTL_372_DATA 0x01010001
#define DDRSS_CTL_373_DATA 0x00010101
-#define DDRSS_CTL_374_DATA 0x01050503
+#define DDRSS_CTL_374_DATA 0x01070703
#define DDRSS_CTL_375_DATA 0x05020201
#define DDRSS_CTL_376_DATA 0x08080C0C
#define DDRSS_CTL_377_DATA 0x00080308
-#define DDRSS_CTL_378_DATA 0x000B030E
-#define DDRSS_CTL_379_DATA 0x000B0310
-#define DDRSS_CTL_380_DATA 0x0B0B0810
+#define DDRSS_CTL_378_DATA 0x0009030E
+#define DDRSS_CTL_379_DATA 0x00090312
+#define DDRSS_CTL_380_DATA 0x09090806
#define DDRSS_CTL_381_DATA 0x01000000
#define DDRSS_CTL_382_DATA 0x03020301
#define DDRSS_CTL_383_DATA 0x04000102
@@ -416,7 +417,7 @@
#define DDRSS_CTL_399_DATA 0x00003690
#define DDRSS_CTL_400_DATA 0x00007940
#define DDRSS_CTL_401_DATA 0x070D0402
-#define DDRSS_CTL_402_DATA 0x00260405
+#define DDRSS_CTL_402_DATA 0x00260607
#define DDRSS_CTL_403_DATA 0x00000C20
#define DDRSS_CTL_404_DATA 0x00000200
#define DDRSS_CTL_405_DATA 0x00000200
@@ -425,7 +426,7 @@
#define DDRSS_CTL_408_DATA 0x00003690
#define DDRSS_CTL_409_DATA 0x00007940
#define DDRSS_CTL_410_DATA 0x070D0402
-#define DDRSS_CTL_411_DATA 0x00000405
+#define DDRSS_CTL_411_DATA 0x00000607
#define DDRSS_CTL_412_DATA 0x00000000
#define DDRSS_CTL_413_DATA 0x0302000A
#define DDRSS_CTL_414_DATA 0x01000500
@@ -609,8 +610,8 @@
#define DDRSS_PI_169_DATA 0x00020043
#define DDRSS_PI_170_DATA 0x02000200
#define DDRSS_PI_171_DATA 0x00000004
-#define DDRSS_PI_172_DATA 0x0000080C
-#define DDRSS_PI_173_DATA 0x00081C00
+#define DDRSS_PI_172_DATA 0x00000A0C
+#define DDRSS_PI_173_DATA 0x000A1C00
#define DDRSS_PI_174_DATA 0x001C0000
#define DDRSS_PI_175_DATA 0x00000013
#define DDRSS_PI_176_DATA 0x00000059
@@ -624,15 +625,15 @@
#define DDRSS_PI_184_DATA 0x01000100
#define DDRSS_PI_185_DATA 0x00000100
#define DDRSS_PI_186_DATA 0x00000000
-#define DDRSS_PI_187_DATA 0x05050503
+#define DDRSS_PI_187_DATA 0x05070703
#define DDRSS_PI_188_DATA 0x01010C0C
#define DDRSS_PI_189_DATA 0x01010101
#define DDRSS_PI_190_DATA 0x000C0C0A
#define DDRSS_PI_191_DATA 0x00000000
#define DDRSS_PI_192_DATA 0x00000000
#define DDRSS_PI_193_DATA 0x04000000
-#define DDRSS_PI_194_DATA 0x04020808
-#define DDRSS_PI_195_DATA 0x04040204
+#define DDRSS_PI_194_DATA 0x06020808
+#define DDRSS_PI_195_DATA 0x04040206
#define DDRSS_PI_196_DATA 0x00090031
#define DDRSS_PI_197_DATA 0x00110039
#define DDRSS_PI_198_DATA 0x00110039
@@ -661,13 +662,13 @@
#define DDRSS_PI_221_DATA 0x00001900
#define DDRSS_PI_222_DATA 0x32000056
#define DDRSS_PI_223_DATA 0x06000101
-#define DDRSS_PI_224_DATA 0x001D0204
-#define DDRSS_PI_225_DATA 0x32120058
+#define DDRSS_PI_224_DATA 0x001F0204
+#define DDRSS_PI_225_DATA 0x72400056
#define DDRSS_PI_226_DATA 0x05000101
-#define DDRSS_PI_227_DATA 0x001D0408
-#define DDRSS_PI_228_DATA 0x32120058
+#define DDRSS_PI_227_DATA 0x001F0608
+#define DDRSS_PI_228_DATA 0x72400056
#define DDRSS_PI_229_DATA 0x05000101
-#define DDRSS_PI_230_DATA 0x00000408
+#define DDRSS_PI_230_DATA 0x00000608
#define DDRSS_PI_231_DATA 0x05040900
#define DDRSS_PI_232_DATA 0x00060900
#define DDRSS_PI_233_DATA 0x00000315
@@ -741,23 +742,23 @@
#define DDRSS_PI_301_DATA 0x00000000
#define DDRSS_PI_302_DATA 0x00000000
#define DDRSS_PI_303_DATA 0x00000000
-#define DDRSS_PI_304_DATA 0x00100F27
+#define DDRSS_PI_304_DATA 0x00104D4D
#define DDRSS_PI_305_DATA 0x00000000
#define DDRSS_PI_306_DATA 0x00000024
-#define DDRSS_PI_307_DATA 0x00000012
+#define DDRSS_PI_307_DATA 0x0000001A
#define DDRSS_PI_308_DATA 0x000000B1
#define DDRSS_PI_309_DATA 0x00000000
#define DDRSS_PI_310_DATA 0x00000000
-#define DDRSS_PI_311_DATA 0x46000000
-#define DDRSS_PI_312_DATA 0x00150F27
+#define DDRSS_PI_311_DATA 0x44000000
+#define DDRSS_PI_312_DATA 0x00154D4D
#define DDRSS_PI_313_DATA 0x00000000
#define DDRSS_PI_314_DATA 0x00000024
-#define DDRSS_PI_315_DATA 0x00000012
+#define DDRSS_PI_315_DATA 0x0000001A
#define DDRSS_PI_316_DATA 0x000000B1
#define DDRSS_PI_317_DATA 0x00000000
#define DDRSS_PI_318_DATA 0x00000000
-#define DDRSS_PI_319_DATA 0x46000000
-#define DDRSS_PI_320_DATA 0x00150F27
+#define DDRSS_PI_319_DATA 0x44000000
+#define DDRSS_PI_320_DATA 0x00154D4D
#define DDRSS_PI_321_DATA 0x00000000
#define DDRSS_PI_322_DATA 0x00000004
#define DDRSS_PI_323_DATA 0x00000000
@@ -765,23 +766,23 @@
#define DDRSS_PI_325_DATA 0x00000000
#define DDRSS_PI_326_DATA 0x00000000
#define DDRSS_PI_327_DATA 0x00000000
-#define DDRSS_PI_328_DATA 0x00100F27
+#define DDRSS_PI_328_DATA 0x00104D4D
#define DDRSS_PI_329_DATA 0x00000000
#define DDRSS_PI_330_DATA 0x00000024
-#define DDRSS_PI_331_DATA 0x00000012
+#define DDRSS_PI_331_DATA 0x0000001A
#define DDRSS_PI_332_DATA 0x000000B1
#define DDRSS_PI_333_DATA 0x00000000
#define DDRSS_PI_334_DATA 0x00000000
-#define DDRSS_PI_335_DATA 0x46000000
-#define DDRSS_PI_336_DATA 0x00150F27
+#define DDRSS_PI_335_DATA 0x44000000
+#define DDRSS_PI_336_DATA 0x00154D4D
#define DDRSS_PI_337_DATA 0x00000000
#define DDRSS_PI_338_DATA 0x00000024
-#define DDRSS_PI_339_DATA 0x00000012
+#define DDRSS_PI_339_DATA 0x0000001A
#define DDRSS_PI_340_DATA 0x000000B1
#define DDRSS_PI_341_DATA 0x00000000
#define DDRSS_PI_342_DATA 0x00000000
-#define DDRSS_PI_343_DATA 0x46000000
-#define DDRSS_PI_344_DATA 0x00150F27
+#define DDRSS_PI_343_DATA 0x44000000
+#define DDRSS_PI_344_DATA 0x00154D4D
#define DDRSS_PHY_0_DATA 0x04F00000
#define DDRSS_PHY_1_DATA 0x00000000
#define DDRSS_PHY_2_DATA 0x00030200
@@ -856,8 +857,8 @@
#define DDRSS_PHY_71_DATA 0x00000000
#define DDRSS_PHY_72_DATA 0x041F07FF
#define DDRSS_PHY_73_DATA 0x00000000
-#define DDRSS_PHY_74_DATA 0x01CC0B01
-#define DDRSS_PHY_75_DATA 0x1003CC0B
+#define DDRSS_PHY_74_DATA 0x01FF0B01
+#define DDRSS_PHY_75_DATA 0x1003FF0B
#define DDRSS_PHY_76_DATA 0x20000140
#define DDRSS_PHY_77_DATA 0x07FF0200
#define DDRSS_PHY_78_DATA 0x0000DD01
@@ -872,7 +873,7 @@
#define DDRSS_PHY_87_DATA 0x02020010
#define DDRSS_PHY_88_DATA 0x51516041
#define DDRSS_PHY_89_DATA 0x31C06000
-#define DDRSS_PHY_90_DATA 0x07AB0340
+#define DDRSS_PHY_90_DATA 0x06B60340
#define DDRSS_PHY_91_DATA 0x0000C0C0
#define DDRSS_PHY_92_DATA 0x04050000
#define DDRSS_PHY_93_DATA 0x00000504
@@ -1112,8 +1113,8 @@
#define DDRSS_PHY_327_DATA 0x00000000
#define DDRSS_PHY_328_DATA 0x041F07FF
#define DDRSS_PHY_329_DATA 0x00000000
-#define DDRSS_PHY_330_DATA 0x01CC0B01
-#define DDRSS_PHY_331_DATA 0x1003CC0B
+#define DDRSS_PHY_330_DATA 0x01FF0B01
+#define DDRSS_PHY_331_DATA 0x1003FF0B
#define DDRSS_PHY_332_DATA 0x20000140
#define DDRSS_PHY_333_DATA 0x07FF0200
#define DDRSS_PHY_334_DATA 0x0000DD01
@@ -1128,7 +1129,7 @@
#define DDRSS_PHY_343_DATA 0x02020010
#define DDRSS_PHY_344_DATA 0x51516041
#define DDRSS_PHY_345_DATA 0x31C06000
-#define DDRSS_PHY_346_DATA 0x07AB0340
+#define DDRSS_PHY_346_DATA 0x06B60340
#define DDRSS_PHY_347_DATA 0x0000C0C0
#define DDRSS_PHY_348_DATA 0x04050000
#define DDRSS_PHY_349_DATA 0x00000504
@@ -1326,7 +1327,7 @@
#define DDRSS_PHY_541_DATA 0x003F0000
#define DDRSS_PHY_542_DATA 0x000F013F
#define DDRSS_PHY_543_DATA 0x0000000F
-#define DDRSS_PHY_544_DATA 0x020002CC
+#define DDRSS_PHY_544_DATA 0x020002FF
#define DDRSS_PHY_545_DATA 0x00030000
#define DDRSS_PHY_546_DATA 0x00000300
#define DDRSS_PHY_547_DATA 0x00000300
@@ -1582,7 +1583,7 @@
#define DDRSS_PHY_797_DATA 0x00000000
#define DDRSS_PHY_798_DATA 0x000F0000
#define DDRSS_PHY_799_DATA 0x0000000F
-#define DDRSS_PHY_800_DATA 0x020002CC
+#define DDRSS_PHY_800_DATA 0x020002FF
#define DDRSS_PHY_801_DATA 0x00030000
#define DDRSS_PHY_802_DATA 0x00000300
#define DDRSS_PHY_803_DATA 0x00000300
@@ -1838,7 +1839,7 @@
#define DDRSS_PHY_1053_DATA 0x10000000
#define DDRSS_PHY_1054_DATA 0x000F0000
#define DDRSS_PHY_1055_DATA 0x0000000F
-#define DDRSS_PHY_1056_DATA 0x020002CC
+#define DDRSS_PHY_1056_DATA 0x020002FF
#define DDRSS_PHY_1057_DATA 0x00030000
#define DDRSS_PHY_1058_DATA 0x00000300
#define DDRSS_PHY_1059_DATA 0x00000300
@@ -2169,22 +2170,22 @@
#define DDRSS_PHY_1384_DATA 0x00000300
#define DDRSS_PHY_1385_DATA 0x00000300
#define DDRSS_PHY_1386_DATA 0x00000300
-#define DDRSS_PHY_1387_DATA 0x3183BF77
+#define DDRSS_PHY_1387_DATA 0x31833F77
#define DDRSS_PHY_1388_DATA 0x00000000
-#define DDRSS_PHY_1389_DATA 0x0C000DFF
-#define DDRSS_PHY_1390_DATA 0x30000DFF
-#define DDRSS_PHY_1391_DATA 0x3F0DFF11
-#define DDRSS_PHY_1392_DATA 0x01990000
-#define DDRSS_PHY_1393_DATA 0x780DFFCC
+#define DDRSS_PHY_1389_DATA 0x0C000DBF
+#define DDRSS_PHY_1390_DATA 0x30000DBF
+#define DDRSS_PHY_1391_DATA 0x3F0DBF11
+#define DDRSS_PHY_1392_DATA 0x01FF0000
+#define DDRSS_PHY_1393_DATA 0x780DBFFF
#define DDRSS_PHY_1394_DATA 0x00000C11
#define DDRSS_PHY_1395_DATA 0x00018011
#define DDRSS_PHY_1396_DATA 0x0089FF00
#define DDRSS_PHY_1397_DATA 0x000C3F11
-#define DDRSS_PHY_1398_DATA 0x01990000
-#define DDRSS_PHY_1399_DATA 0x000C3F11
-#define DDRSS_PHY_1400_DATA 0x01990000
-#define DDRSS_PHY_1401_DATA 0x3F0DFF11
-#define DDRSS_PHY_1402_DATA 0x01990000
+#define DDRSS_PHY_1398_DATA 0x01FF0000
+#define DDRSS_PHY_1399_DATA 0x000C3F91
+#define DDRSS_PHY_1400_DATA 0x01FF0000
+#define DDRSS_PHY_1401_DATA 0x3F0DBF11
+#define DDRSS_PHY_1402_DATA 0x01FF0000
#define DDRSS_PHY_1403_DATA 0x00018011
#define DDRSS_PHY_1404_DATA 0x0089FF00
#define DDRSS_PHY_1405_DATA 0x20040004
diff --git a/arch/arm/dts/k3-am625-verdin-r5.dts b/arch/arm/dts/k3-am625-verdin-r5.dts
index 0cae9c5..305d199 100644
--- a/arch/arm/dts/k3-am625-verdin-r5.dts
+++ b/arch/arm/dts/k3-am625-verdin-r5.dts
@@ -69,16 +69,7 @@
ti,secure-host;
};
-&main_esm {
- bootph-pre-ram;
-};
-
-&mcu_esm {
- bootph-pre-ram;
-};
-
&secure_proxy_sa3 {
- bootph-pre-ram;
/* We require this for boot handshake */
status = "okay";
};
diff --git a/arch/arm/dts/k3-am625-verdin-wifi-dev-binman.dtsi b/arch/arm/dts/k3-am625-verdin-wifi-dev-binman.dtsi
index 9c2d1df..4e37048 100644
--- a/arch/arm/dts/k3-am625-verdin-wifi-dev-binman.dtsi
+++ b/arch/arm/dts/k3-am625-verdin-wifi-dev-binman.dtsi
@@ -5,72 +5,6 @@
#include "k3-binman.dtsi"
-#ifndef CONFIG_ARM64
-
-&bcfg_yaml {
- schema = "../../ti/common/schema.yaml";
-};
-
-&pcfg_yaml {
- schema = "../../ti/common/schema.yaml";
-};
-
-&rcfg_yaml {
- schema = "../../ti/common/schema.yaml";
-};
-
-&scfg_yaml {
- schema = "../../ti/common/schema.yaml";
-};
-
-/* combined-tifs-cfg */
-
-&bcfg_yaml_tifs {
- schema = "../../ti/common/schema.yaml";
-};
-
-&pcfg_yaml_tifs {
- schema = "../../ti/common/schema.yaml";
-};
-
-&rcfg_yaml_tifs {
- schema = "../../ti/common/schema.yaml";
-};
-
-&scfg_yaml_tifs {
- schema = "../../ti/common/schema.yaml";
-};
-
-/* combined-dm-cfg */
-
-&pcfg_yaml_dm {
- schema = "../../ti/common/schema.yaml";
-};
-
-&rcfg_yaml_dm {
- schema = "../../ti/common/schema.yaml";
-};
-
-/* combined-sysfw-cfg */
-
-&bcfg_yaml_sysfw {
- schema = "../../ti/common/schema.yaml";
-};
-
-&pcfg_yaml_sysfw {
- schema = "../../ti/common/schema.yaml";
-};
-
-&rcfg_yaml_sysfw {
- schema = "../../ti/common/schema.yaml";
-};
-
-&scfg_yaml_sysfw {
- schema = "../../ti/common/schema.yaml";
-};
-
-#endif /* CONFIG_ARM64 */
-
#ifdef CONFIG_TARGET_VERDIN_AM62_R5
&binman {
@@ -206,10 +140,7 @@
#ifdef CONFIG_TARGET_VERDIN_AM62_A53
-#define SPL_NODTB "spl/u-boot-spl-nodtb.bin"
#define SPL_VERDIN_AM62_DTB "spl/dts/k3-am625-verdin-wifi-dev.dtb"
-
-#define UBOOT_NODTB "u-boot-nodtb.bin"
#define VERDIN_AM62_DTB "u-boot.dtb"
&binman {
@@ -220,80 +151,21 @@
};
};
ti-spl {
- filename = "tispl.bin";
- pad-byte = <0xff>;
+ insert-template = <&ti_spl_template>;
fit {
- description = "Configuration to load ATF and SPL";
- #address-cells = <1>;
images {
- atf {
- description = "ARM Trusted Firmware";
- type = "firmware";
- arch = "arm64";
- compression = "none";
- os = "arm-trusted-firmware";
- load = <CONFIG_K3_ATF_LOAD_ADDR>;
- entry = <CONFIG_K3_ATF_LOAD_ADDR>;
- ti-secure {
- content = <&atf>;
- keyfile = "custMpk.pem";
- };
- atf: atf-bl31 {
- };
- };
-
- tee {
- description = "OP-TEE";
- type = "tee";
- arch = "arm64";
- compression = "none";
- os = "tee";
- load = <0x9e800000>;
- entry = <0x9e800000>;
- ti-secure {
- content = <&tee>;
- keyfile = "custMpk.pem";
- };
- tee: tee-os {
- };
- };
-
dm {
- description = "DM binary";
- type = "firmware";
- arch = "arm32";
- compression = "none";
- os = "DM";
- load = <0x89000000>;
- entry = <0x89000000>;
ti-secure {
content = <&dm>;
keyfile = "custMpk.pem";
};
- dm: blob-ext {
+ dm: ti-dm {
filename = "ti-dm.bin";
};
};
- spl {
- description = "SPL (64-bit)";
- type = "standalone";
- os = "U-Boot";
- arch = "arm64";
- compression = "none";
- load = <CONFIG_SPL_TEXT_BASE>;
- entry = <CONFIG_SPL_TEXT_BASE>;
- ti-secure {
- content = <&u_boot_spl_nodtb>;
- keyfile = "custMpk.pem";
- };
- u_boot_spl_nodtb: blob-ext {
- filename = SPL_NODTB;
- };
- };
-
fdt-0 {
description = "k3-am625-verdin-wifi-dev";
type = "flat_dt";
@@ -325,29 +197,12 @@
&binman {
u-boot {
- filename = "u-boot.img";
- pad-byte = <0xff>;
+ insert-template = <&u_boot_template>;
fit {
- description = "FIT image with multiple configurations";
-
images {
uboot {
- description = "U-Boot for AM625 board";
- type = "firmware";
- os = "u-boot";
- arch = "arm";
- compression = "none";
- load = <CONFIG_TEXT_BASE>;
- ti-secure {
- content = <&u_boot_nodtb>;
- keyfile = "custMpk.pem";
- };
- u_boot_nodtb: u-boot-nodtb {
- };
- hash {
- algo = "crc32";
- };
+ description = "U-Boot fot AM625 Verdin Board";
};
fdt-0 {
@@ -384,66 +239,16 @@
&binman {
ti-spl_unsigned {
- filename = "tispl.bin_unsigned";
- pad-byte = <0xff>;
+ insert-template = <&ti_spl_unsigned_template>;
fit {
- description = "Configuration to load ATF and SPL";
- #address-cells = <1>;
-
images {
- atf {
- description = "ARM Trusted Firmware";
- type = "firmware";
- arch = "arm64";
- compression = "none";
- os = "arm-trusted-firmware";
- load = <CONFIG_K3_ATF_LOAD_ADDR>;
- entry = <CONFIG_K3_ATF_LOAD_ADDR>;
- atf-bl31 {
- filename = "bl31.bin";
- };
- };
-
- tee {
- description = "OP-TEE";
- type = "tee";
- arch = "arm64";
- compression = "none";
- os = "tee";
- load = <0x9e800000>;
- entry = <0x9e800000>;
- tee-os {
- filename = "tee-raw.bin";
- };
- };
-
dm {
- description = "DM binary";
- type = "firmware";
- arch = "arm32";
- compression = "none";
- os = "DM";
- load = <0x89000000>;
- entry = <0x89000000>;
- blob-ext {
+ ti-dm {
filename = "ti-dm.bin";
};
};
- spl {
- description = "SPL (64-bit)";
- type = "standalone";
- os = "U-Boot";
- arch = "arm64";
- compression = "none";
- load = <CONFIG_SPL_TEXT_BASE>;
- entry = <CONFIG_SPL_TEXT_BASE>;
- blob {
- filename = "spl/u-boot-spl-nodtb.bin";
- };
- };
-
fdt-0 {
description = "k3-am625-verdin-wifi-dev";
type = "flat_dt";
@@ -471,26 +276,12 @@
&binman {
u-boot_unsigned {
- filename = "u-boot.img_unsigned";
- pad-byte = <0xff>;
+ insert-template = <&u_boot_unsigned_template>;
fit {
- description = "FIT image with multiple configurations";
-
images {
uboot {
- description = "U-Boot for AM625 board";
- type = "firmware";
- os = "u-boot";
- arch = "arm";
- compression = "none";
- load = <CONFIG_TEXT_BASE>;
- blob {
- filename = UBOOT_NODTB;
- };
- hash {
- algo = "crc32";
- };
+ description = "U-Boot for AM625 Verdin Board";
};
fdt-0 {
diff --git a/arch/arm/dts/k3-am625-verdin-wifi-dev-u-boot.dtsi b/arch/arm/dts/k3-am625-verdin-wifi-dev-u-boot.dtsi
index 75cb60b..02f34c9 100644
--- a/arch/arm/dts/k3-am625-verdin-wifi-dev-u-boot.dtsi
+++ b/arch/arm/dts/k3-am625-verdin-wifi-dev-u-boot.dtsi
@@ -21,25 +21,8 @@
};
};
-&cbass_main {
- bootph-all;
-
- timer@2400000 {
- clock-frequency = <25000000>;
- bootph-all;
- };
-};
-
-&cbass_mcu {
- bootph-all;
-};
-
-&cbass_wakeup {
- bootph-all;
-};
-
-&chipid {
- bootph-all;
+&main_timer0 {
+ clock-frequency = <25000000>;
};
&main_bcdma {
@@ -53,6 +36,7 @@
<0x00 0x484c2000 0x00 0x2000>;
reg-names = "gcfg", "bchanrt", "rchanrt", "tchanrt",
"ringrt" , "cfg", "tchan", "rchan";
+ bootph-all;
};
&main_pktdma {
@@ -98,34 +82,16 @@
};
&dmsc {
- bootph-all;
-
k3_sysreset: sysreset-controller {
compatible = "ti,sci-sysreset";
bootph-all;
};
};
-&dmss {
- bootph-all;
-};
-
&fss {
bootph-all;
};
-&k3_clks {
- bootph-all;
-};
-
-&k3_pds {
- bootph-all;
-};
-
-&k3_reset {
- bootph-all;
-};
-
&main_gpio0 {
bootph-all;
};
@@ -156,10 +122,6 @@
};
};
-&main_pmx0 {
- bootph-all;
-};
-
/* Verdin UART_3, used as the Linux console */
&main_uart0 {
bootph-all;
@@ -170,10 +132,6 @@
bootph-all;
};
-&mcu_pmx0 {
- bootph-all;
-};
-
&pinctrl_ctrl_sleep_moci {
bootph-all;
};
@@ -210,18 +168,10 @@
status = "disabled";
};
-&secure_proxy_main {
- bootph-all;
-};
-
&verdin_ctrl_sleep_moci {
bootph-all;
};
-&wkup_conf {
- bootph-all;
-};
-
/* Verdin UART_2 */
&wkup_uart0 {
bootph-all;
diff --git a/arch/arm/dts/k3-am62a-sk-binman.dtsi b/arch/arm/dts/k3-am62a-sk-binman.dtsi
index de09430..ec3bf7c 100644
--- a/arch/arm/dts/k3-am62a-sk-binman.dtsi
+++ b/arch/arm/dts/k3-am62a-sk-binman.dtsi
@@ -144,10 +144,7 @@
#ifdef CONFIG_TARGET_AM62A7_A53_EVM
-#define SPL_NODTB "spl/u-boot-spl-nodtb.bin"
#define SPL_AM62A7_SK_DTB "spl/dts/k3-am62a7-sk.dtb"
-
-#define UBOOT_NODTB "u-boot-nodtb.bin"
#define AM62A7_SK_DTB "u-boot.dtb"
&binman {
@@ -158,81 +155,20 @@
};
};
ti-spl {
- filename = "tispl.bin";
- pad-byte = <0xff>;
+ insert-template = <&ti_spl_template>;
fit {
- description = "Configuration to load ATF and SPL";
- #address-cells = <1>;
-
images {
-
- atf {
- description = "ARM Trusted Firmware";
- type = "firmware";
- arch = "arm64";
- compression = "none";
- os = "arm-trusted-firmware";
- load = <CONFIG_K3_ATF_LOAD_ADDR>;
- entry = <CONFIG_K3_ATF_LOAD_ADDR>;
- ti-secure {
- content = <&atf>;
- keyfile = "custMpk.pem";
- };
- atf: atf-bl31 {
- };
- };
-
- tee {
- description = "OP-TEE";
- type = "tee";
- arch = "arm64";
- compression = "none";
- os = "tee";
- load = <0x9e800000>;
- entry = <0x9e800000>;
- ti-secure {
- content = <&tee>;
- keyfile = "custMpk.pem";
- };
- tee: tee-os {
- };
- };
-
dm {
- description = "DM binary";
- type = "firmware";
- arch = "arm32";
- compression = "none";
- os = "DM";
- load = <0x89000000>;
- entry = <0x89000000>;
ti-secure {
content = <&dm>;
keyfile = "custMpk.pem";
};
- dm: blob-ext {
+ dm: ti-dm {
filename = "ti-dm.bin";
};
};
- spl {
- description = "SPL (64-bit)";
- type = "standalone";
- os = "U-Boot";
- arch = "arm64";
- compression = "none";
- load = <CONFIG_SPL_TEXT_BASE>;
- entry = <CONFIG_SPL_TEXT_BASE>;
- ti-secure {
- content = <&u_boot_spl_nodtb>;
- keyfile = "custMpk.pem";
- };
- u_boot_spl_nodtb: blob-ext {
- filename = SPL_NODTB;
- };
- };
-
fdt-0 {
description = "k3-am62a7-sk";
type = "flat_dt";
@@ -266,29 +202,12 @@
&binman {
u-boot {
- filename = "u-boot.img";
- pad-byte = <0xff>;
+ insert-template = <&u_boot_template>;
fit {
- description = "FIT image with multiple configurations";
-
images {
uboot {
- description = "U-Boot for AM62Ax board";
- type = "firmware";
- os = "u-boot";
- arch = "arm";
- compression = "none";
- load = <CONFIG_TEXT_BASE>;
- ti-secure {
- content = <&u_boot_nodtb>;
- keyfile = "custMpk.pem";
- };
- u_boot_nodtb: u-boot-nodtb {
- };
- hash {
- algo = "crc32";
- };
+ description = "U-Boot for AM62Ax Board";
};
fdt-0 {
@@ -326,67 +245,16 @@
&binman {
ti-spl_unsigned {
- filename = "tispl.bin_unsigned";
- pad-byte = <0xff>;
+ insert-template = <&ti_spl_unsigned_template>;
fit {
- description = "Configuration to load ATF and SPL";
- #address-cells = <1>;
-
images {
-
- atf {
- description = "ARM Trusted Firmware";
- type = "firmware";
- arch = "arm64";
- compression = "none";
- os = "arm-trusted-firmware";
- load = <CONFIG_K3_ATF_LOAD_ADDR>;
- entry = <CONFIG_K3_ATF_LOAD_ADDR>;
- atf-bl31 {
- filename = "bl31.bin";
- };
- };
-
- tee {
- description = "OP-TEE";
- type = "tee";
- arch = "arm64";
- compression = "none";
- os = "tee";
- load = <0x9e800000>;
- entry = <0x9e800000>;
- tee-os {
- filename = "tee-raw.bin";
- };
- };
-
dm {
- description = "DM binary";
- type = "firmware";
- arch = "arm32";
- compression = "none";
- os = "DM";
- load = <0x89000000>;
- entry = <0x89000000>;
- blob-ext {
+ ti-dm {
filename = "ti-dm.bin";
};
};
- spl {
- description = "SPL (64-bit)";
- type = "standalone";
- os = "U-Boot";
- arch = "arm64";
- compression = "none";
- load = <CONFIG_SPL_TEXT_BASE>;
- entry = <CONFIG_SPL_TEXT_BASE>;
- blob {
- filename = "spl/u-boot-spl-nodtb.bin";
- };
- };
-
fdt-0 {
description = "k3-am62a7-sk";
type = "flat_dt";
@@ -414,26 +282,12 @@
&binman {
u-boot_unsigned {
- filename = "u-boot.img_unsigned";
- pad-byte = <0xff>;
+ insert-template = <&u_boot_unsigned_template>;
fit {
- description = "FIT image with multiple configurations";
-
images {
uboot {
- description = "U-Boot for AM62Ax board";
- type = "firmware";
- os = "u-boot";
- arch = "arm";
- compression = "none";
- load = <CONFIG_TEXT_BASE>;
- blob {
- filename = UBOOT_NODTB;
- };
- hash {
- algo = "crc32";
- };
+ description = "U-Boot for AM62Ax Board";
};
fdt-0 {
diff --git a/arch/arm/dts/k3-am62x-sk-common.dtsi b/arch/arm/dts/k3-am62x-sk-common.dtsi
index 34c8ffc..19f57ea 100644
--- a/arch/arm/dts/k3-am62x-sk-common.dtsi
+++ b/arch/arm/dts/k3-am62x-sk-common.dtsi
@@ -28,6 +28,7 @@
};
memory@80000000 {
+ bootph-pre-ram;
device_type = "memory";
/* 2G RAM */
reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
@@ -114,11 +115,23 @@
clocks = <&tlv320_mclk>;
};
};
+
+ hdmi0: connector-hdmi {
+ compatible = "hdmi-connector";
+ label = "hdmi";
+ type = "a";
+ port {
+ hdmi_connector_in: endpoint {
+ remote-endpoint = <&sii9022_out>;
+ };
+ };
+ };
};
&main_pmx0 {
/* First pad number is ALW package and second is AMC package */
main_uart0_pins_default: main-uart0-default-pins {
+ bootph-all;
pinctrl-single,pins = <
AM62X_IOPAD(0x1c8, PIN_INPUT, 0) /* (D14/A13) UART0_RXD */
AM62X_IOPAD(0x1cc, PIN_OUTPUT, 0) /* (E14/E11) UART0_TXD */
@@ -126,6 +139,7 @@
};
main_uart1_pins_default: main-uart1-default-pins {
+ bootph-pre-ram;
pinctrl-single,pins = <
AM62X_IOPAD(0x194, PIN_INPUT, 2) /* (B19/B18) MCASP0_AXR3.UART1_CTSn */
AM62X_IOPAD(0x198, PIN_OUTPUT, 2) /* (A19/B17) MCASP0_AXR2.UART1_RTSn */
@@ -156,6 +170,7 @@
};
main_mmc0_pins_default: main-mmc0-default-pins {
+ bootph-all;
pinctrl-single,pins = <
AM62X_IOPAD(0x220, PIN_INPUT, 0) /* (Y3/V3) MMC0_CMD */
AM62X_IOPAD(0x218, PIN_INPUT, 0) /* (AB1/Y1) MMC0_CLK */
@@ -171,6 +186,7 @@
};
main_mmc1_pins_default: main-mmc1-default-pins {
+ bootph-all;
pinctrl-single,pins = <
AM62X_IOPAD(0x23c, PIN_INPUT, 0) /* (A21/C18) MMC1_CMD */
AM62X_IOPAD(0x234, PIN_INPUT, 0) /* (B22/A20) MMC1_CLK */
@@ -196,6 +212,7 @@
};
main_rgmii1_pins_default: main-rgmii1-default-pins {
+ bootph-all;
pinctrl-single,pins = <
AM62X_IOPAD(0x14c, PIN_INPUT, 0) /* (AB17/W15) RGMII1_RD0 */
AM62X_IOPAD(0x150, PIN_INPUT, 0) /* (AC17/Y16) RGMII1_RD1 */
@@ -226,10 +243,44 @@
AM62X_IOPAD(0x084, PIN_INPUT, 2) /* (L23/K20) GPMC0_ADVN_ALE.MCASP1_AXR2 */
>;
};
+
+ main_dss0_pins_default: main-dss0-default-pins {
+ pinctrl-single,pins = <
+ AM62X_IOPAD(0x100, PIN_OUTPUT, 0) /* (AC25) VOUT0_VSYNC */
+ AM62X_IOPAD(0x0f8, PIN_OUTPUT, 0) /* (AB24) VOUT0_HSYNC */
+ AM62X_IOPAD(0x104, PIN_OUTPUT, 0) /* (AC24) VOUT0_PCLK */
+ AM62X_IOPAD(0x0fc, PIN_OUTPUT, 0) /* (Y20) VOUT0_DE */
+ AM62X_IOPAD(0x0b8, PIN_OUTPUT, 0) /* (U22) VOUT0_DATA0 */
+ AM62X_IOPAD(0x0bc, PIN_OUTPUT, 0) /* (V24) VOUT0_DATA1 */
+ AM62X_IOPAD(0x0c0, PIN_OUTPUT, 0) /* (W25) VOUT0_DATA2 */
+ AM62X_IOPAD(0x0c4, PIN_OUTPUT, 0) /* (W24) VOUT0_DATA3 */
+ AM62X_IOPAD(0x0c8, PIN_OUTPUT, 0) /* (Y25) VOUT0_DATA4 */
+ AM62X_IOPAD(0x0cc, PIN_OUTPUT, 0) /* (Y24) VOUT0_DATA5 */
+ AM62X_IOPAD(0x0d0, PIN_OUTPUT, 0) /* (Y23) VOUT0_DATA6 */
+ AM62X_IOPAD(0x0d4, PIN_OUTPUT, 0) /* (AA25) VOUT0_DATA7 */
+ AM62X_IOPAD(0x0d8, PIN_OUTPUT, 0) /* (V21) VOUT0_DATA8 */
+ AM62X_IOPAD(0x0dc, PIN_OUTPUT, 0) /* (W21) VOUT0_DATA9 */
+ AM62X_IOPAD(0x0e0, PIN_OUTPUT, 0) /* (V20) VOUT0_DATA10 */
+ AM62X_IOPAD(0x0e4, PIN_OUTPUT, 0) /* (AA23) VOUT0_DATA11 */
+ AM62X_IOPAD(0x0e8, PIN_OUTPUT, 0) /* (AB25) VOUT0_DATA12 */
+ AM62X_IOPAD(0x0ec, PIN_OUTPUT, 0) /* (AA24) VOUT0_DATA13 */
+ AM62X_IOPAD(0x0f0, PIN_OUTPUT, 0) /* (Y22) VOUT0_DATA14 */
+ AM62X_IOPAD(0x0f4, PIN_OUTPUT, 0) /* (AA21) VOUT0_DATA15 */
+ AM62X_IOPAD(0x05c, PIN_OUTPUT, 1) /* (R24) GPMC0_AD8.VOUT0_DATA16 */
+ AM62X_IOPAD(0x060, PIN_OUTPUT, 1) /* (R25) GPMC0_AD9.VOUT0_DATA17 */
+ AM62X_IOPAD(0x064, PIN_OUTPUT, 1) /* (T25) GPMC0_AD10.VOUT0_DATA18 */
+ AM62X_IOPAD(0x068, PIN_OUTPUT, 1) /* (R21) GPMC0_AD11.VOUT0_DATA19 */
+ AM62X_IOPAD(0x06c, PIN_OUTPUT, 1) /* (T22) GPMC0_AD12.VOUT0_DATA20 */
+ AM62X_IOPAD(0x070, PIN_OUTPUT, 1) /* (T24) GPMC0_AD13.VOUT0_DATA21 */
+ AM62X_IOPAD(0x074, PIN_OUTPUT, 1) /* (U25) GPMC0_AD14.VOUT0_DATA22 */
+ AM62X_IOPAD(0x078, PIN_OUTPUT, 1) /* (U24) GPMC0_AD15.VOUT0_DATA23 */
+ >;
+ };
};
&mcu_pmx0 {
wkup_uart0_pins_default: wkup-uart0-default-pins {
+ bootph-pre-ram;
pinctrl-single,pins = <
AM62X_MCU_IOPAD(0x02c, PIN_INPUT, 0) /* (C6/A7) WKUP_UART0_CTSn */
AM62X_MCU_IOPAD(0x030, PIN_OUTPUT, 0) /* (A4/B4) WKUP_UART0_RTSn */
@@ -241,12 +292,14 @@
&wkup_uart0 {
/* WKUP UART0 is used by DM firmware */
+ bootph-pre-ram;
status = "reserved";
pinctrl-names = "default";
pinctrl-0 = <&wkup_uart0_pins_default>;
};
&main_uart0 {
+ bootph-all;
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&main_uart0_pins_default>;
@@ -254,6 +307,7 @@
&main_uart1 {
/* Main UART1 is used by TIFS firmware */
+ bootph-pre-ram;
status = "reserved";
pinctrl-names = "default";
pinctrl-0 = <&main_uart1_pins_default>;
@@ -300,7 +354,7 @@
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&main_i2c1_pins_default>;
- clock-frequency = <400000>;
+ clock-frequency = <100000>;
tlv320aic3106: audio-codec@1b {
#sound-dai-cells = <0>;
@@ -313,9 +367,40 @@
IOVDD-supply = <&vcc_3v3_sys>;
DRVDD-supply = <&vcc_3v3_sys>;
};
+
+ sii9022: bridge-hdmi@3b {
+ compatible = "sil,sii9022";
+ reg = <0x3b>;
+ interrupt-parent = <&exp1>;
+ interrupts = <16 IRQ_TYPE_EDGE_FALLING>;
+ #sound-dai-cells = <0>;
+ sil,i2s-data-lanes = < 0 >;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ sii9022_in: endpoint {
+ remote-endpoint = <&dpi1_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ sii9022_out: endpoint {
+ remote-endpoint = <&hdmi_connector_in>;
+ };
+ };
+ };
+ };
};
&sdhci0 {
+ bootph-all;
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&main_mmc0_pins_default>;
@@ -325,6 +410,7 @@
&sdhci1 {
/* SD/MMC */
+ bootph-all;
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&main_mmc1_pins_default>;
@@ -333,21 +419,25 @@
};
&cpsw3g {
+ bootph-all;
pinctrl-names = "default";
pinctrl-0 = <&main_rgmii1_pins_default>;
};
&cpsw_port1 {
+ bootph-all;
phy-mode = "rgmii-rxid";
phy-handle = <&cpsw3g_phy0>;
};
&cpsw3g_mdio {
+ bootph-all;
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&main_mdio1_pins_default>;
cpsw3g_phy0: ethernet-phy@0 {
+ bootph-all;
reg = <0>;
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
@@ -410,3 +500,20 @@
tx-num-evt = <32>;
rx-num-evt = <32>;
};
+
+&dss {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_dss0_pins_default>;
+};
+
+&dss_ports {
+ /* VP2: DPI Output */
+ port@1 {
+ reg = <1>;
+
+ dpi1_out: endpoint {
+ remote-endpoint = <&sii9022_in>;
+ };
+ };
+};
diff --git a/arch/arm/dts/k3-am64x-binman.dtsi b/arch/arm/dts/k3-am64x-binman.dtsi
index a5e5400..88df214 100644
--- a/arch/arm/dts/k3-am64x-binman.dtsi
+++ b/arch/arm/dts/k3-am64x-binman.dtsi
@@ -118,87 +118,27 @@
#ifdef CONFIG_TARGET_AM642_A53_EVM
-#define SPL_NODTB "spl/u-boot-spl-nodtb.bin"
#define SPL_AM642_EVM_DTB "spl/dts/k3-am642-evm.dtb"
#define SPL_AM642_SK_DTB "spl/dts/k3-am642-sk.dtb"
-#define UBOOT_NODTB "u-boot-nodtb.bin"
#define AM642_EVM_DTB "u-boot.dtb"
#define AM642_SK_DTB "arch/arm/dts/k3-am642-sk.dtb"
&binman {
ti-spl {
- filename = "tispl.bin";
- pad-byte = <0xff>;
+ insert-template = <&ti_spl_template>;
fit {
description = "Configuration to load ATF and SPL";
#address-cells = <1>;
images {
-
- atf {
- description = "ARM Trusted Firmware";
- type = "firmware";
- arch = "arm64";
- compression = "none";
- os = "arm-trusted-firmware";
- load = <CONFIG_K3_ATF_LOAD_ADDR>;
- entry = <CONFIG_K3_ATF_LOAD_ADDR>;
- ti-secure {
- content = <&atf>;
- keyfile = "custMpk.pem";
- };
- atf: atf-bl31 {
- };
- };
-
- tee {
- description = "OP-TEE";
- type = "tee";
- arch = "arm64";
- compression = "none";
- os = "tee";
- load = <0x9e800000>;
- entry = <0x9e800000>;
- ti-secure {
- content = <&tee>;
- keyfile = "custMpk.pem";
- };
- tee: tee-os {
- };
- };
-
dm {
- description = "DM binary";
- type = "firmware";
- arch = "arm32";
- compression = "none";
- os = "DM";
- load = <0x89000000>;
- entry = <0x89000000>;
blob-ext {
filename = "/dev/null";
};
};
- spl {
- description = "SPL (64-bit)";
- type = "standalone";
- os = "U-Boot";
- arch = "arm64";
- compression = "none";
- load = <CONFIG_SPL_TEXT_BASE>;
- entry = <CONFIG_SPL_TEXT_BASE>;
- ti-secure {
- content = <&u_boot_spl_nodtb>;
- keyfile = "custMpk.pem";
-
- };
- u_boot_spl_nodtb: blob-ext {
- filename = SPL_NODTB;
- };
- };
fdt-0 {
description = "k3-am642-evm";
@@ -254,29 +194,12 @@
&binman {
u-boot {
- filename = "u-boot.img";
- pad-byte = <0xff>;
+ insert-template = <&u_boot_template>;
fit {
- description = "FIT image with multiple configurations";
-
images {
uboot {
- description = "U-Boot for AM64 board";
- type = "firmware";
- os = "u-boot";
- arch = "arm";
- compression = "none";
- load = <CONFIG_TEXT_BASE>;
- ti-secure {
- content = <&u_boot_nodtb>;
- keyfile = "custMpk.pem";
- };
- u_boot_nodtb: u-boot-nodtb {
- };
- hash {
- algo = "crc32";
- };
+ description = "U-Boot for AM64 Board";
};
fdt-0 {
@@ -340,65 +263,17 @@
&binman {
ti-spl_unsigned {
- filename = "tispl.bin_unsigned";
- pad-byte = <0xff>;
+ insert-template = <&ti_spl_unsigned_template>;
fit {
- description = "Configuration to load ATF and SPL";
- #address-cells = <1>;
-
images {
- atf {
- description = "ARM Trusted Firmware";
- type = "firmware";
- arch = "arm64";
- compression = "none";
- os = "arm-trusted-firmware";
- load = <CONFIG_K3_ATF_LOAD_ADDR>;
- entry = <CONFIG_K3_ATF_LOAD_ADDR>;
- atf-bl31 {
- };
- };
-
- tee {
- description = "OP-TEE";
- type = "tee";
- arch = "arm64";
- compression = "none";
- os = "tee";
- load = <0x9e800000>;
- entry = <0x9e800000>;
- tee-os {
- };
- };
-
dm {
- description = "DM binary";
- type = "firmware";
- arch = "arm32";
- compression = "none";
- os = "DM";
- load = <0x89000000>;
- entry = <0x89000000>;
blob-ext {
filename = "/dev/null";
};
};
- spl {
- description = "SPL (64-bit)";
- type = "standalone";
- os = "U-Boot";
- arch = "arm64";
- compression = "none";
- load = <CONFIG_SPL_TEXT_BASE>;
- entry = <CONFIG_SPL_TEXT_BASE>;
- blob {
- filename = "spl/u-boot-spl-nodtb.bin";
- };
- };
-
fdt-0 {
description = "k3-am642-evm";
type = "flat_dt";
@@ -443,26 +318,12 @@
&binman {
u-boot_unsigned {
- filename = "u-boot.img_unsigned";
- pad-byte = <0xff>;
+ insert-template = <&u_boot_unsigned_template>;
fit {
- description = "FIT image with multiple configurations";
-
images {
uboot {
- description = "U-Boot for AM64 board";
- type = "firmware";
- os = "u-boot";
- arch = "arm";
- compression = "none";
- load = <CONFIG_TEXT_BASE>;
- blob {
- filename = UBOOT_NODTB;
- };
- hash {
- algo = "crc32";
- };
+ description = "U-Boot for AM64 Board";
};
fdt-0 {
diff --git a/arch/arm/dts/k3-am65-iot2050-common-pg2.dtsi b/arch/arm/dts/k3-am65-iot2050-common-pg2.dtsi
index e73458c..e9419c4 100644
--- a/arch/arm/dts/k3-am65-iot2050-common-pg2.dtsi
+++ b/arch/arm/dts/k3-am65-iot2050-common-pg2.dtsi
@@ -10,7 +10,7 @@
*/
&main_pmx0 {
- cp2102n_reset_pin_default: cp2102n-reset-pin-default {
+ cp2102n_reset_pin_default: cp2102n-reset-default-pins {
pinctrl-single,pins = <
/* (AF12) GPIO1_24, used as cp2102 reset */
AM65X_IOPAD(0x01e0, PIN_OUTPUT, 7)
diff --git a/arch/arm/dts/k3-am65-iot2050-common.dtsi b/arch/arm/dts/k3-am65-iot2050-common.dtsi
index b6135b8..fa71781 100644
--- a/arch/arm/dts/k3-am65-iot2050-common.dtsi
+++ b/arch/arm/dts/k3-am65-iot2050-common.dtsi
@@ -14,6 +14,16 @@
/ {
aliases {
+ serial0 = &wkup_uart0;
+ serial1 = &mcu_uart0;
+ serial2 = &main_uart0;
+ serial3 = &main_uart1;
+ i2c0 = &wkup_i2c0;
+ i2c1 = &mcu_i2c0;
+ i2c2 = &main_i2c0;
+ i2c3 = &main_i2c1;
+ i2c4 = &main_i2c2;
+ i2c5 = &main_i2c3;
spi0 = &mcu_spi0;
mmc0 = &sdhci1;
mmc1 = &sdhci0;
@@ -21,7 +31,6 @@
chosen {
stdout-path = "serial3:115200n8";
- bootargs = "earlycon=ns16550a,mmio32,0x02810000";
};
reserved-memory {
@@ -111,7 +120,7 @@
};
&wkup_pmx0 {
- wkup_i2c0_pins_default: wkup-i2c0-pins-default {
+ wkup_i2c0_pins_default: wkup-i2c0-default-pins {
pinctrl-single,pins = <
/* (AC7) WKUP_I2C0_SCL */
AM65X_WKUP_IOPAD(0x00e0, PIN_INPUT, 0)
@@ -120,7 +129,7 @@
>;
};
- mcu_i2c0_pins_default: mcu-i2c0-pins-default {
+ mcu_i2c0_pins_default: mcu-i2c0-default-pins {
pinctrl-single,pins = <
/* (AD8) MCU_I2C0_SCL */
AM65X_WKUP_IOPAD(0x00e8, PIN_INPUT, 0)
@@ -129,21 +138,21 @@
>;
};
- arduino_i2c_aio_switch_pins_default: arduino-i2c-aio-switch-pins-default {
+ arduino_i2c_aio_switch_pins_default: arduino-i2c-aio-switch-default-pins {
pinctrl-single,pins = <
/* (R2) WKUP_GPIO0_21 */
AM65X_WKUP_IOPAD(0x0024, PIN_OUTPUT, 7)
>;
};
- push_button_pins_default: push-button-pins-default {
+ push_button_pins_default: push-button-default-pins {
pinctrl-single,pins = <
/* (T1) MCU_OSPI1_CLK.WKUP_GPIO0_25 */
AM65X_WKUP_IOPAD(0x0034, PIN_INPUT, 7)
>;
};
- arduino_uart_pins_default: arduino-uart-pins-default {
+ arduino_uart_pins_default: arduino-uart-default-pins {
pinctrl-single,pins = <
/* (P4) MCU_UART0_RXD */
AM65X_WKUP_IOPAD(0x0044, PIN_INPUT, 4)
@@ -152,7 +161,7 @@
>;
};
- arduino_io_d2_to_d3_pins_default: arduino-io-d2-to-d3-pins-default {
+ arduino_io_d2_to_d3_pins_default: arduino-io-d2-to-d3-default-pins {
pinctrl-single,pins = <
/* (P1) WKUP_GPIO0_31 */
AM65X_WKUP_IOPAD(0x004C, PIN_OUTPUT, 7)
@@ -161,7 +170,7 @@
>;
};
- arduino_io_oe_pins_default: arduino-io-oe-pins-default {
+ arduino_io_oe_pins_default: arduino-io-oe-default-pins {
pinctrl-single,pins = <
/* (N4) WKUP_GPIO0_34 */
AM65X_WKUP_IOPAD(0x0058, PIN_OUTPUT, 7)
@@ -176,7 +185,7 @@
>;
};
- mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-pins-default {
+ mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-default-pins {
pinctrl-single,pins = <
/* (V1) MCU_OSPI0_CLK */
AM65X_WKUP_IOPAD(0x0000, PIN_OUTPUT, 0)
@@ -191,7 +200,7 @@
>;
};
- db9_com_mode_pins_default: db9-com-mode-pins-default {
+ db9_com_mode_pins_default: db9-com-mode-default-pins {
pinctrl-single,pins = <
/* (AD3) WKUP_GPIO0_5, used as uart0 mode 0 */
AM65X_WKUP_IOPAD(0x00c4, PIN_OUTPUT, 7)
@@ -204,7 +213,7 @@
>;
};
- leds_pins_default: leds-pins-default {
+ leds_pins_default: leds-default-pins {
pinctrl-single,pins = <
/* (T2) WKUP_GPIO0_17, used as user led1 red */
AM65X_WKUP_IOPAD(0x0014, PIN_OUTPUT, 7)
@@ -217,7 +226,7 @@
>;
};
- mcu_spi0_pins_default: mcu-spi0-pins-default {
+ mcu_spi0_pins_default: mcu-spi0-default-pins {
pinctrl-single,pins = <
/* (Y1) MCU_SPI0_CLK */
AM65X_WKUP_IOPAD(0x0090, PIN_INPUT, 0)
@@ -230,7 +239,7 @@
>;
};
- minipcie_pins_default: minipcie-pins-default {
+ minipcie_pins_default: minipcie-default-pins {
pinctrl-single,pins = <
/* (P2) MCU_OSPI1_DQS.WKUP_GPIO0_27 */
AM65X_WKUP_IOPAD(0x003C, PIN_OUTPUT, 7)
@@ -239,7 +248,7 @@
};
&main_pmx0 {
- main_uart1_pins_default: main-uart1-pins-default {
+ main_uart1_pins_default: main-uart1-default-pins {
pinctrl-single,pins = <
AM65X_IOPAD(0x0174, PIN_INPUT, 6) /* (AE23) UART1_RXD */
AM65X_IOPAD(0x014c, PIN_OUTPUT, 6) /* (AD23) UART1_TXD */
@@ -248,14 +257,14 @@
>;
};
- main_i2c3_pins_default: main-i2c3-pins-default {
+ main_i2c3_pins_default: main-i2c3-default-pins {
pinctrl-single,pins = <
AM65X_IOPAD(0x01c0, PIN_INPUT, 2) /* (AF13) I2C3_SCL */
AM65X_IOPAD(0x01d4, PIN_INPUT, 2) /* (AG12) I2C3_SDA */
>;
};
- main_mmc1_pins_default: main-mmc1-pins-default {
+ main_mmc1_pins_default: main-mmc1-default-pins {
pinctrl-single,pins = <
AM65X_IOPAD(0x02d4, PIN_INPUT_PULLDOWN, 0) /* (C27) MMC1_CLK */
AM65X_IOPAD(0x02d8, PIN_INPUT_PULLUP, 0) /* (C28) MMC1_CMD */
@@ -268,19 +277,19 @@
>;
};
- usb0_pins_default: usb0-pins-default {
+ usb0_pins_default: usb0-default-pins {
pinctrl-single,pins = <
AM65X_IOPAD(0x02bc, PIN_OUTPUT, 0) /* (AD9) USB0_DRVVBUS */
>;
};
- usb1_pins_default: usb1-pins-default {
+ usb1_pins_default: usb1-default-pins {
pinctrl-single,pins = <
AM65X_IOPAD(0x02c0, PIN_OUTPUT, 0) /* (AC8) USB1_DRVVBUS */
>;
};
- arduino_io_d4_to_d9_pins_default: arduino-io-d4-to-d9-pins-default {
+ arduino_io_d4_to_d9_pins_default: arduino-io-d4-to-d9-default-pins {
pinctrl-single,pins = <
AM65X_IOPAD(0x0084, PIN_OUTPUT, 7) /* (AG18) GPIO0_33 */
AM65X_IOPAD(0x008C, PIN_OUTPUT, 7) /* (AF17) GPIO0_35 */
@@ -291,7 +300,7 @@
>;
};
- dss_vout1_pins_default: dss-vout1-pins-default {
+ dss_vout1_pins_default: dss-vout1-default-pins {
pinctrl-single,pins = <
AM65X_IOPAD(0x0000, PIN_OUTPUT, 1) /* VOUT1_DATA0 */
AM65X_IOPAD(0x0004, PIN_OUTPUT, 1) /* VOUT1_DATA1 */
@@ -324,13 +333,13 @@
>;
};
- dp_pins_default: dp-pins-default {
+ dp_pins_default: dp-default-pins {
pinctrl-single,pins = <
AM65X_IOPAD(0x0078, PIN_OUTPUT, 7) /* (AF18) DP rst_n */
>;
};
- main_i2c2_pins_default: main-i2c2-pins-default {
+ main_i2c2_pins_default: main-i2c2-default-pins {
pinctrl-single,pins = <
AM65X_IOPAD(0x0074, PIN_INPUT, 5) /* (T27) I2C2_SCL */
AM65X_IOPAD(0x0070, PIN_INPUT, 5) /* (R25) I2C2_SDA */
@@ -339,21 +348,21 @@
};
&main_pmx1 {
- main_i2c0_pins_default: main-i2c0-pins-default {
+ main_i2c0_pins_default: main-i2c0-default-pins {
pinctrl-single,pins = <
AM65X_IOPAD(0x0000, PIN_INPUT, 0) /* (D20) I2C0_SCL */
AM65X_IOPAD(0x0004, PIN_INPUT, 0) /* (C21) I2C0_SDA */
>;
};
- main_i2c1_pins_default: main-i2c1-pins-default {
+ main_i2c1_pins_default: main-i2c1-default-pins {
pinctrl-single,pins = <
AM65X_IOPAD(0x0008, PIN_INPUT, 0) /* (B21) I2C1_SCL */
AM65X_IOPAD(0x000c, PIN_INPUT, 0) /* (E21) I2C1_SDA */
>;
};
- ecap0_pins_default: ecap0-pins-default {
+ ecap0_pins_default: ecap0-default-pins {
pinctrl-single,pins = <
AM65X_IOPAD(0x0010, PIN_INPUT, 0) /* (D21) ECAP0_IN_APWM_OUT */
>;
@@ -366,15 +375,13 @@
};
&main_uart1 {
+ status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&main_uart1_pins_default>;
};
-&main_uart2 {
- status = "disabled";
-};
-
&mcu_uart0 {
+ status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&arduino_uart_pins_default>;
};
@@ -393,13 +400,12 @@
&wkup_gpio0 {
pinctrl-names = "default";
- pinctrl-0 = <
- &arduino_io_d2_to_d3_pins_default
- &arduino_i2c_aio_switch_pins_default
- &arduino_io_oe_pins_default
- &push_button_pins_default
- &db9_com_mode_pins_default
- >;
+ pinctrl-0 =
+ <&arduino_io_d2_to_d3_pins_default>,
+ <&arduino_i2c_aio_switch_pins_default>,
+ <&arduino_io_oe_pins_default>,
+ <&push_button_pins_default>,
+ <&db9_com_mode_pins_default>;
gpio-line-names =
/* 0..9 */
"wkup_gpio0-base", "", "", "", "UART0-mode1", "UART0-mode0",
@@ -419,19 +425,21 @@
};
&wkup_i2c0 {
+ status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&wkup_i2c0_pins_default>;
clock-frequency = <400000>;
};
&mcu_i2c0 {
+ status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&mcu_i2c0_pins_default>;
clock-frequency = <400000>;
psu: regulator@60 {
compatible = "ti,tps62363";
- reg = <0x60>;
+ reg = <0x60>;
regulator-name = "tps62363-vout";
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <1500000>;
@@ -484,11 +492,12 @@
};
&main_i2c0 {
+ status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&main_i2c0_pins_default>;
clock-frequency = <400000>;
- rtc: rtc8564@51 {
+ rtc: rtc@51 {
compatible = "nxp,pcf8563";
reg = <0x51>;
};
@@ -501,18 +510,21 @@
};
&main_i2c1 {
+ status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&main_i2c1_pins_default>;
clock-frequency = <400000>;
};
&main_i2c2 {
+ status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&main_i2c2_pins_default>;
clock-frequency = <400000>;
};
&main_i2c3 {
+ status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&main_i2c3_pins_default>;
clock-frequency = <400000>;
@@ -552,6 +564,7 @@
};
&ecap0 {
+ status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&ecap0_pins_default>;
};
@@ -576,25 +589,24 @@
};
&mcu_spi0 {
+ status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&mcu_spi0_pins_default>;
#address-cells = <1>;
- #size-cells= <0>;
+ #size-cells = <0>;
ti,pindir-d0-out-d1-in;
};
-&tscadc0 {
- status = "disabled";
-};
-
&tscadc1 {
+ status = "okay";
adc {
ti,adc-channels = <0 1 2 3 4 5>;
};
};
&ospi0 {
+ status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
@@ -609,8 +621,52 @@
cdns,tchsh-ns = <60>;
cdns,tslch-ns = <60>;
cdns,read-delay = <2>;
- #address-cells = <1>;
- #size-cells = <1>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ seboot@0 {
+ label = "seboot";
+ reg = <0x0 0x180000>; /* 1.5M */
+ };
+
+ tispl@180000 {
+ label = "tispl";
+ reg = <0x180000 0x200000>; /* 2M */
+ };
+
+ u-boot@380000 {
+ label = "u-boot";
+ reg = <0x380000 0x300000>; /* 3M */
+ };
+
+ env@680000 {
+ label = "env";
+ reg = <0x680000 0x20000>; /* 128K */
+ };
+
+ env-backup@6a0000 {
+ label = "env.backup";
+ reg = <0x6a0000 0x20000>; /* 128K */
+ };
+
+ otpcmd@6c0000 {
+ label = "otpcmd";
+ reg = <0x6c0000 0x10000>; /* 64K */
+ };
+
+ unused@6d0000 {
+ label = "unused";
+ reg = <0x6d0000 0x7b0000>; /* 7872K */
+ };
+
+ seboot-backup@e80000 {
+ label = "seboot.backup";
+ reg = <0xe80000 0x180000>; /* 1.5M */
+ };
+ };
};
};
@@ -634,15 +690,8 @@
};
};
-&pcie0_rc {
- status = "disabled";
-};
-
-&pcie0_ep {
- status = "disabled";
-};
-
&pcie1_rc {
+ status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&minipcie_pins_default>;
@@ -652,11 +701,8 @@
reset-gpios = <&wkup_gpio0 27 GPIO_ACTIVE_HIGH>;
};
-&pcie1_ep {
- status = "disabled";
-};
-
&mailbox0_cluster0 {
+ status = "okay";
interrupts = <436>;
mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
@@ -666,6 +712,7 @@
};
&mailbox0_cluster1 {
+ status = "okay";
interrupts = <432>;
mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
@@ -674,71 +721,18 @@
};
};
-&mailbox0_cluster2 {
- status = "disabled";
-};
-
-&mailbox0_cluster3 {
- status = "disabled";
-};
-
-&mailbox0_cluster4 {
- status = "disabled";
-};
-
-&mailbox0_cluster5 {
- status = "disabled";
-};
-
-&mailbox0_cluster6 {
- status = "disabled";
-};
-
-&mailbox0_cluster7 {
- status = "disabled";
-};
-
-&mailbox0_cluster8 {
- status = "disabled";
-};
-
-&mailbox0_cluster9 {
- status = "disabled";
-};
-
-&mailbox0_cluster10 {
- status = "disabled";
-};
-
-&mailbox0_cluster11 {
- status = "disabled";
-};
-
&mcu_r5fss0_core0 {
memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
<&mcu_r5fss0_core0_memory_region>;
- mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>;
+ mboxes = <&mailbox0_cluster0>, <&mbox_mcu_r5fss0_core0>;
};
&mcu_r5fss0_core1 {
memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
<&mcu_r5fss0_core1_memory_region>;
- mboxes = <&mailbox0_cluster1 &mbox_mcu_r5fss0_core1>;
+ mboxes = <&mailbox0_cluster1>, <&mbox_mcu_r5fss0_core1>;
};
&mcu_rti1 {
memory-region = <&wdt_reset_memory_region>;
-
-};
-
-&icssg0_mdio {
- status = "disabled";
-};
-
-&icssg1_mdio {
- status = "disabled";
-};
-
-&icssg2_mdio {
- status = "disabled";
};
diff --git a/arch/arm/dts/k3-am65-main.dtsi b/arch/arm/dts/k3-am65-main.dtsi
index ba4e5d3..5ebb87f 100644
--- a/arch/arm/dts/k3-am65-main.dtsi
+++ b/arch/arm/dts/k3-am65-main.dtsi
@@ -35,7 +35,10 @@
#interrupt-cells = <3>;
interrupt-controller;
reg = <0x00 0x01800000 0x00 0x10000>, /* GICD */
- <0x00 0x01880000 0x00 0x90000>; /* GICR */
+ <0x00 0x01880000 0x00 0x90000>, /* GICR */
+ <0x00 0x6f000000 0x00 0x2000>, /* GICC */
+ <0x00 0x6f010000 0x00 0x1000>, /* GICH */
+ <0x00 0x6f020000 0x00 0x2000>; /* GICV */
/*
* vcpumntirq:
* virtual CPU interface maintenance interrupt
@@ -88,6 +91,7 @@
clock-frequency = <48000000>;
current-speed = <115200>;
power-domains = <&k3_pds 146 TI_SCI_PD_EXCLUSIVE>;
+ status = "disabled";
};
main_uart1: serial@2810000 {
@@ -96,6 +100,7 @@
interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <48000000>;
power-domains = <&k3_pds 147 TI_SCI_PD_EXCLUSIVE>;
+ status = "disabled";
};
main_uart2: serial@2820000 {
@@ -104,29 +109,47 @@
interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <48000000>;
power-domains = <&k3_pds 148 TI_SCI_PD_EXCLUSIVE>;
+ status = "disabled";
};
crypto: crypto@4e00000 {
compatible = "ti,am654-sa2ul";
reg = <0x0 0x4e00000 0x0 0x1200>;
- power-domains = <&k3_pds 136 TI_SCI_PD_EXCLUSIVE>;
+ power-domains = <&k3_pds 136 TI_SCI_PD_SHARED>;
#address-cells = <2>;
#size-cells = <2>;
ranges = <0x0 0x04e00000 0x00 0x04e00000 0x0 0x30000>;
- dmas = <&main_udmap 0xc000>, <&main_udmap 0x4000>,
- <&main_udmap 0x4001>;
+ dmas = <&main_udmap 0xc001>, <&main_udmap 0x4002>,
+ <&main_udmap 0x4003>;
dma-names = "tx", "rx1", "rx2";
- dma-coherent;
rng: rng@4e10000 {
compatible = "inside-secure,safexcel-eip76";
reg = <0x0 0x4e10000 0x0 0x7d>;
interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&k3_clks 136 1>;
+ status = "disabled"; /* Used by OP-TEE */
};
};
+ /* TIMERIO pad input CTRLMMR_TIMER*_CTRL registers */
+ main_timerio_input: pinctrl@104200 {
+ compatible = "pinctrl-single";
+ reg = <0x0 0x104200 0x0 0x30>;
+ #pinctrl-cells = <1>;
+ pinctrl-single,register-width = <32>;
+ pinctrl-single,function-mask = <0x0000001ff>;
+ };
+
+ /* TIMERIO pad output CTCTRLMMR_TIMERIO*_CTRL registers */
+ main_timerio_output: pinctrl@104280 {
+ compatible = "pinctrl-single";
+ reg = <0x0 0x104280 0x0 0x20>;
+ #pinctrl-cells = <1>;
+ pinctrl-single,register-width = <32>;
+ pinctrl-single,function-mask = <0x0000000f>;
+ };
+
main_pmx0: pinctrl@11c000 {
compatible = "pinctrl-single";
reg = <0x0 0x11c000 0x0 0x2e4>;
@@ -152,6 +175,7 @@
clock-names = "fck";
clocks = <&k3_clks 110 1>;
power-domains = <&k3_pds 110 TI_SCI_PD_EXCLUSIVE>;
+ status = "disabled";
};
main_i2c1: i2c@2010000 {
@@ -163,6 +187,7 @@
clock-names = "fck";
clocks = <&k3_clks 111 1>;
power-domains = <&k3_pds 111 TI_SCI_PD_EXCLUSIVE>;
+ status = "disabled";
};
main_i2c2: i2c@2020000 {
@@ -174,6 +199,7 @@
clock-names = "fck";
clocks = <&k3_clks 112 1>;
power-domains = <&k3_pds 112 TI_SCI_PD_EXCLUSIVE>;
+ status = "disabled";
};
main_i2c3: i2c@2030000 {
@@ -185,6 +211,7 @@
clock-names = "fck";
clocks = <&k3_clks 113 1>;
power-domains = <&k3_pds 113 TI_SCI_PD_EXCLUSIVE>;
+ status = "disabled";
};
ecap0: pwm@3100000 {
@@ -194,6 +221,7 @@
power-domains = <&k3_pds 39 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 39 0>;
clock-names = "fck";
+ status = "disabled";
};
main_spi0: spi@2100000 {
@@ -206,6 +234,7 @@
#size-cells = <0>;
dmas = <&main_udmap 0xc500>, <&main_udmap 0x4500>;
dma-names = "tx0", "rx0";
+ status = "disabled";
};
main_spi1: spi@2110000 {
@@ -218,6 +247,7 @@
#size-cells = <0>;
assigned-clocks = <&k3_clks 137 1>;
assigned-clock-rates = <48000000>;
+ status = "disabled";
};
main_spi2: spi@2120000 {
@@ -228,6 +258,7 @@
power-domains = <&k3_pds 139 TI_SCI_PD_EXCLUSIVE>;
#address-cells = <1>;
#size-cells = <0>;
+ status = "disabled";
};
main_spi3: spi@2130000 {
@@ -238,6 +269,7 @@
power-domains = <&k3_pds 140 TI_SCI_PD_EXCLUSIVE>;
#address-cells = <1>;
#size-cells = <0>;
+ status = "disabled";
};
main_spi4: spi@2140000 {
@@ -248,6 +280,151 @@
power-domains = <&k3_pds 141 TI_SCI_PD_EXCLUSIVE>;
#address-cells = <1>;
#size-cells = <0>;
+ status = "disabled";
+ };
+
+ main_timer0: timer@2400000 {
+ compatible = "ti,am654-timer";
+ reg = <0x00 0x2400000 0x00 0x400>;
+ interrupts = <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&k3_clks 23 0>;
+ clock-names = "fck";
+ assigned-clocks = <&k3_clks 23 0>;
+ assigned-clock-parents = <&k3_clks 23 1>;
+ power-domains = <&k3_pds 23 TI_SCI_PD_EXCLUSIVE>;
+ ti,timer-pwm;
+ };
+
+ main_timer1: timer@2410000 {
+ compatible = "ti,am654-timer";
+ reg = <0x00 0x2410000 0x00 0x400>;
+ interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&k3_clks 24 0>;
+ clock-names = "fck";
+ assigned-clocks = <&k3_clks 24 0>;
+ assigned-clock-parents = <&k3_clks 24 1>;
+ power-domains = <&k3_pds 24 TI_SCI_PD_EXCLUSIVE>;
+ ti,timer-pwm;
+ };
+
+ main_timer2: timer@2420000 {
+ compatible = "ti,am654-timer";
+ reg = <0x00 0x2420000 0x00 0x400>;
+ interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&k3_clks 27 0>;
+ clock-names = "fck";
+ assigned-clocks = <&k3_clks 27 0>;
+ assigned-clock-parents = <&k3_clks 27 1>;
+ power-domains = <&k3_pds 27 TI_SCI_PD_EXCLUSIVE>;
+ ti,timer-pwm;
+ };
+
+ main_timer3: timer@2430000 {
+ compatible = "ti,am654-timer";
+ reg = <0x00 0x2430000 0x00 0x400>;
+ interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&k3_clks 28 0>;
+ clock-names = "fck";
+ assigned-clocks = <&k3_clks 28 0>;
+ assigned-clock-parents = <&k3_clks 28 1>;
+ power-domains = <&k3_pds 28 TI_SCI_PD_EXCLUSIVE>;
+ ti,timer-pwm;
+ };
+
+ main_timer4: timer@2440000 {
+ compatible = "ti,am654-timer";
+ reg = <0x00 0x2440000 0x00 0x400>;
+ interrupts = <GIC_SPI 228 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&k3_clks 29 0>;
+ clock-names = "fck";
+ assigned-clocks = <&k3_clks 29 0>;
+ assigned-clock-parents = <&k3_clks 29 1>;
+ power-domains = <&k3_pds 29 TI_SCI_PD_EXCLUSIVE>;
+ ti,timer-pwm;
+ };
+
+ main_timer5: timer@2450000 {
+ compatible = "ti,am654-timer";
+ reg = <0x00 0x2450000 0x00 0x400>;
+ interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&k3_clks 30 0>;
+ clock-names = "fck";
+ assigned-clocks = <&k3_clks 30 0>;
+ assigned-clock-parents = <&k3_clks 30 1>;
+ power-domains = <&k3_pds 30 TI_SCI_PD_EXCLUSIVE>;
+ ti,timer-pwm;
+ };
+
+ main_timer6: timer@2460000 {
+ compatible = "ti,am654-timer";
+ reg = <0x00 0x2460000 0x00 0x400>;
+ interrupts = <GIC_SPI 230 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&k3_clks 31 0>;
+ assigned-clocks = <&k3_clks 31 0>;
+ assigned-clock-parents = <&k3_clks 31 1>;
+ clock-names = "fck";
+ power-domains = <&k3_pds 31 TI_SCI_PD_EXCLUSIVE>;
+ ti,timer-pwm;
+ };
+
+ main_timer7: timer@2470000 {
+ compatible = "ti,am654-timer";
+ reg = <0x00 0x2470000 0x00 0x400>;
+ interrupts = <GIC_SPI 231 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&k3_clks 32 0>;
+ clock-names = "fck";
+ assigned-clocks = <&k3_clks 32 0>;
+ assigned-clock-parents = <&k3_clks 32 1>;
+ power-domains = <&k3_pds 32 TI_SCI_PD_EXCLUSIVE>;
+ ti,timer-pwm;
+ };
+
+ main_timer8: timer@2480000 {
+ compatible = "ti,am654-timer";
+ reg = <0x00 0x2480000 0x00 0x400>;
+ interrupts = <GIC_SPI 232 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&k3_clks 33 0>;
+ clock-names = "fck";
+ assigned-clocks = <&k3_clks 33 0>;
+ assigned-clock-parents = <&k3_clks 33 1>;
+ power-domains = <&k3_pds 33 TI_SCI_PD_EXCLUSIVE>;
+ ti,timer-pwm;
+ };
+
+ main_timer9: timer@2490000 {
+ compatible = "ti,am654-timer";
+ reg = <0x00 0x2490000 0x00 0x400>;
+ interrupts = <GIC_SPI 233 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&k3_clks 34 0>;
+ clock-names = "fck";
+ assigned-clocks = <&k3_clks 34 0>;
+ assigned-clock-parents = <&k3_clks 34 1>;
+ power-domains = <&k3_pds 34 TI_SCI_PD_EXCLUSIVE>;
+ ti,timer-pwm;
+ };
+
+ main_timer10: timer@24a0000 {
+ compatible = "ti,am654-timer";
+ reg = <0x00 0x24a0000 0x00 0x400>;
+ interrupts = <GIC_SPI 234 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&k3_clks 25 0>;
+ clock-names = "fck";
+ assigned-clocks = <&k3_clks 25 0>;
+ assigned-clock-parents = <&k3_clks 25 1>;
+ power-domains = <&k3_pds 25 TI_SCI_PD_EXCLUSIVE>;
+ ti,timer-pwm;
+ };
+
+ main_timer11: timer@24b0000 {
+ compatible = "ti,am654-timer";
+ reg = <0x00 0x24b0000 0x00 0x400>;
+ interrupts = <GIC_SPI 235 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&k3_clks 26 0>;
+ clock-names = "fck";
+ assigned-clocks = <&k3_clks 26 0>;
+ assigned-clock-parents = <&k3_clks 26 1>;
+ power-domains = <&k3_pds 26 TI_SCI_PD_EXCLUSIVE>;
+ ti,timer-pwm;
};
sdhci0: mmc@4f80000 {
@@ -292,7 +469,6 @@
ti,otap-del-sel-ddr52 = <0x4>;
ti,otap-del-sel-hs200 = <0x7>;
ti,clkbuf-sel = <0x7>;
- ti,otap-del-sel = <0x2>;
ti,trm-icp = <0x8>;
dma-coherent;
};
@@ -304,21 +480,6 @@
#size-cells = <1>;
ranges = <0x0 0x0 0x00100000 0x1c000>;
- pcie0_mode: pcie-mode@4060 {
- compatible = "syscon";
- reg = <0x00004060 0x4>;
- };
-
- pcie1_mode: pcie-mode@4070 {
- compatible = "syscon";
- reg = <0x00004070 0x4>;
- };
-
- pcie_devid: pcie-devid@210 {
- compatible = "syscon";
- reg = <0x00000210 0x4>;
- };
-
serdes0_clk: clock@4080 {
compatible = "syscon";
reg = <0x00004080 0x4>;
@@ -338,11 +499,11 @@
dss_oldi_io_ctrl: dss-oldi-io-ctrl@41e0 {
compatible = "syscon";
- reg = <0x0000041e0 0x14>;
+ reg = <0x000041e0 0x14>;
};
- ehrpwm_tbclk: clock@4140 {
- compatible = "ti,am654-ehrpwm-tbclk", "syscon";
+ ehrpwm_tbclk: clock-controller@4140 {
+ compatible = "ti,am654-ehrpwm-tbclk";
reg = <0x4140 0x18>;
#clock-cells = <1>;
};
@@ -439,7 +600,7 @@
};
main_navss: bus@30800000 {
- compatible = "simple-mfd";
+ compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
ranges = <0x0 0x30800000 0x0 0x30800000 0x0 0xbc00000>;
@@ -497,6 +658,7 @@
ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <16>;
interrupt-parent = <&intr_main_navss>;
+ status = "disabled";
};
mailbox0_cluster1: mailbox@31f81000 {
@@ -506,6 +668,7 @@
ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <16>;
interrupt-parent = <&intr_main_navss>;
+ status = "disabled";
};
mailbox0_cluster2: mailbox@31f82000 {
@@ -515,6 +678,7 @@
ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <16>;
interrupt-parent = <&intr_main_navss>;
+ status = "disabled";
};
mailbox0_cluster3: mailbox@31f83000 {
@@ -524,6 +688,7 @@
ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <16>;
interrupt-parent = <&intr_main_navss>;
+ status = "disabled";
};
mailbox0_cluster4: mailbox@31f84000 {
@@ -533,6 +698,7 @@
ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <16>;
interrupt-parent = <&intr_main_navss>;
+ status = "disabled";
};
mailbox0_cluster5: mailbox@31f85000 {
@@ -542,6 +708,7 @@
ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <16>;
interrupt-parent = <&intr_main_navss>;
+ status = "disabled";
};
mailbox0_cluster6: mailbox@31f86000 {
@@ -551,6 +718,7 @@
ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <16>;
interrupt-parent = <&intr_main_navss>;
+ status = "disabled";
};
mailbox0_cluster7: mailbox@31f87000 {
@@ -560,6 +728,7 @@
ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <16>;
interrupt-parent = <&intr_main_navss>;
+ status = "disabled";
};
mailbox0_cluster8: mailbox@31f88000 {
@@ -569,6 +738,7 @@
ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <16>;
interrupt-parent = <&intr_main_navss>;
+ status = "disabled";
};
mailbox0_cluster9: mailbox@31f89000 {
@@ -578,6 +748,7 @@
ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <16>;
interrupt-parent = <&intr_main_navss>;
+ status = "disabled";
};
mailbox0_cluster10: mailbox@31f8a000 {
@@ -587,6 +758,7 @@
ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <16>;
interrupt-parent = <&intr_main_navss>;
+ status = "disabled";
};
mailbox0_cluster11: mailbox@31f8b000 {
@@ -596,15 +768,17 @@
ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <16>;
interrupt-parent = <&intr_main_navss>;
+ status = "disabled";
};
ringacc: ringacc@3c000000 {
compatible = "ti,am654-navss-ringacc";
- reg = <0x0 0x3c000000 0x0 0x400000>,
- <0x0 0x38000000 0x0 0x400000>,
- <0x0 0x31120000 0x0 0x100>,
- <0x0 0x33000000 0x0 0x40000>;
- reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target";
+ reg = <0x0 0x3c000000 0x0 0x400000>,
+ <0x0 0x38000000 0x0 0x400000>,
+ <0x0 0x31120000 0x0 0x100>,
+ <0x0 0x33000000 0x0 0x40000>,
+ <0x0 0x31080000 0x0 0x40000>;
+ reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target", "cfg";
ti,num-rings = <818>;
ti,sci-rm-range-gp-rings = <0x1>; /* GP ring range */
ti,sci = <&dmsc>;
@@ -614,9 +788,9 @@
main_udmap: dma-controller@31150000 {
compatible = "ti,am654-navss-main-udmap";
- reg = <0x0 0x31150000 0x0 0x100>,
- <0x0 0x34000000 0x0 0x100000>,
- <0x0 0x35000000 0x0 0x100000>;
+ reg = <0x0 0x31150000 0x0 0x100>,
+ <0x0 0x34000000 0x0 0x100000>,
+ <0x0 0x35000000 0x0 0x100000>;
reg-names = "gcfg", "rchanrt", "tchanrt";
msi-parent = <&inta_main_udmass>;
#dma-cells = <1>;
@@ -687,15 +861,15 @@
pcie0_rc: pcie@5500000 {
compatible = "ti,am654-pcie-rc";
- reg = <0x0 0x5500000 0x0 0x1000>, <0x0 0x5501000 0x0 0x1000>, <0x0 0x10000000 0x0 0x2000>, <0x0 0x5506000 0x0 0x1000>;
+ reg = <0x0 0x5500000 0x0 0x1000>, <0x0 0x5501000 0x0 0x1000>, <0x0 0x10000000 0x0 0x2000>, <0x0 0x5506000 0x0 0x1000>;
reg-names = "app", "dbics", "config", "atu";
power-domains = <&k3_pds 120 TI_SCI_PD_EXCLUSIVE>;
#address-cells = <3>;
#size-cells = <2>;
- ranges = <0x81000000 0 0 0x0 0x10020000 0 0x00010000
- 0x82000000 0 0x10030000 0x0 0x10030000 0 0x07FD0000>;
- ti,syscon-pcie-id = <&pcie_devid>;
- ti,syscon-pcie-mode = <&pcie0_mode>;
+ ranges = <0x81000000 0 0 0x0 0x10020000 0 0x00010000>,
+ <0x82000000 0 0x10030000 0x0 0x10030000 0 0x07FD0000>;
+ ti,syscon-pcie-id = <&scm_conf 0x210>;
+ ti,syscon-pcie-mode = <&scm_conf 0x4060>;
bus-range = <0x0 0xff>;
num-viewport = <16>;
max-link-speed = <2>;
@@ -703,32 +877,34 @@
interrupts = <GIC_SPI 340 IRQ_TYPE_EDGE_RISING>;
msi-map = <0x0 &gic_its 0x0 0x10000>;
device_type = "pci";
+ status = "disabled";
};
pcie0_ep: pcie-ep@5500000 {
compatible = "ti,am654-pcie-ep";
- reg = <0x0 0x5500000 0x0 0x1000>, <0x0 0x5501000 0x0 0x1000>, <0x0 0x10000000 0x0 0x8000000>, <0x0 0x5506000 0x0 0x1000>;
+ reg = <0x0 0x5500000 0x0 0x1000>, <0x0 0x5501000 0x0 0x1000>, <0x0 0x10000000 0x0 0x8000000>, <0x0 0x5506000 0x0 0x1000>;
reg-names = "app", "dbics", "addr_space", "atu";
power-domains = <&k3_pds 120 TI_SCI_PD_EXCLUSIVE>;
- ti,syscon-pcie-mode = <&pcie0_mode>;
+ ti,syscon-pcie-mode = <&scm_conf 0x4060>;
num-ib-windows = <16>;
num-ob-windows = <16>;
max-link-speed = <2>;
dma-coherent;
interrupts = <GIC_SPI 340 IRQ_TYPE_EDGE_RISING>;
+ status = "disabled";
};
pcie1_rc: pcie@5600000 {
compatible = "ti,am654-pcie-rc";
- reg = <0x0 0x5600000 0x0 0x1000>, <0x0 0x5601000 0x0 0x1000>, <0x0 0x18000000 0x0 0x2000>, <0x0 0x5606000 0x0 0x1000>;
+ reg = <0x0 0x5600000 0x0 0x1000>, <0x0 0x5601000 0x0 0x1000>, <0x0 0x18000000 0x0 0x2000>, <0x0 0x5606000 0x0 0x1000>;
reg-names = "app", "dbics", "config", "atu";
power-domains = <&k3_pds 121 TI_SCI_PD_EXCLUSIVE>;
#address-cells = <3>;
#size-cells = <2>;
- ranges = <0x81000000 0 0 0x0 0x18020000 0 0x00010000
- 0x82000000 0 0x18030000 0x0 0x18030000 0 0x07FD0000>;
- ti,syscon-pcie-id = <&pcie_devid>;
- ti,syscon-pcie-mode = <&pcie1_mode>;
+ ranges = <0x81000000 0 0 0x0 0x18020000 0 0x00010000>,
+ <0x82000000 0 0x18030000 0x0 0x18030000 0 0x07FD0000>;
+ ti,syscon-pcie-id = <&scm_conf 0x210>;
+ ti,syscon-pcie-mode = <&scm_conf 0x4070>;
bus-range = <0x0 0xff>;
num-viewport = <16>;
max-link-speed = <2>;
@@ -736,19 +912,21 @@
interrupts = <GIC_SPI 355 IRQ_TYPE_EDGE_RISING>;
msi-map = <0x0 &gic_its 0x10000 0x10000>;
device_type = "pci";
+ status = "disabled";
};
pcie1_ep: pcie-ep@5600000 {
compatible = "ti,am654-pcie-ep";
- reg = <0x0 0x5600000 0x0 0x1000>, <0x0 0x5601000 0x0 0x1000>, <0x0 0x18000000 0x0 0x4000000>, <0x0 0x5606000 0x0 0x1000>;
+ reg = <0x0 0x5600000 0x0 0x1000>, <0x0 0x5601000 0x0 0x1000>, <0x0 0x18000000 0x0 0x4000000>, <0x0 0x5606000 0x0 0x1000>;
reg-names = "app", "dbics", "addr_space", "atu";
power-domains = <&k3_pds 121 TI_SCI_PD_EXCLUSIVE>;
- ti,syscon-pcie-mode = <&pcie1_mode>;
+ ti,syscon-pcie-mode = <&scm_conf 0x4070>;
num-ib-windows = <16>;
num-ob-windows = <16>;
max-link-speed = <2>;
dma-coherent;
interrupts = <GIC_SPI 355 IRQ_TYPE_EDGE_RISING>;
+ status = "disabled";
};
mcasp0: mcasp@2b00000 {
@@ -766,6 +944,7 @@
clocks = <&k3_clks 104 0>;
clock-names = "fck";
power-domains = <&k3_pds 104 TI_SCI_PD_EXCLUSIVE>;
+ status = "disabled";
};
mcasp1: mcasp@2b10000 {
@@ -783,6 +962,7 @@
clocks = <&k3_clks 105 0>;
clock-names = "fck";
power-domains = <&k3_pds 105 TI_SCI_PD_EXCLUSIVE>;
+ status = "disabled";
};
mcasp2: mcasp@2b20000 {
@@ -800,6 +980,7 @@
clocks = <&k3_clks 106 0>;
clock-names = "fck";
power-domains = <&k3_pds 106 TI_SCI_PD_EXCLUSIVE>;
+ status = "disabled";
};
cal: cal@6f03000 {
@@ -826,13 +1007,13 @@
dss: dss@4a00000 {
compatible = "ti,am65x-dss";
- reg = <0x0 0x04a00000 0x0 0x1000>, /* common */
- <0x0 0x04a02000 0x0 0x1000>, /* vidl1 */
- <0x0 0x04a06000 0x0 0x1000>, /* vid */
- <0x0 0x04a07000 0x0 0x1000>, /* ovr1 */
- <0x0 0x04a08000 0x0 0x1000>, /* ovr2 */
- <0x0 0x04a0a000 0x0 0x1000>, /* vp1 */
- <0x0 0x04a0b000 0x0 0x1000>; /* vp2 */
+ reg = <0x0 0x04a00000 0x0 0x1000>, /* common */
+ <0x0 0x04a02000 0x0 0x1000>, /* vidl1 */
+ <0x0 0x04a06000 0x0 0x1000>, /* vid */
+ <0x0 0x04a07000 0x0 0x1000>, /* ovr1 */
+ <0x0 0x04a08000 0x0 0x1000>, /* ovr2 */
+ <0x0 0x04a0a000 0x0 0x1000>, /* vp1 */
+ <0x0 0x04a0b000 0x0 0x1000>; /* vp2 */
reg-names = "common", "vidl1", "vid",
"ovr1", "ovr2", "vp1", "vp2";
@@ -840,9 +1021,9 @@
power-domains = <&k3_pds 67 TI_SCI_PD_EXCLUSIVE>;
- clocks = <&k3_clks 67 1>,
- <&k3_clks 216 1>,
- <&k3_clks 67 2>;
+ clocks = <&k3_clks 67 1>,
+ <&k3_clks 216 1>,
+ <&k3_clks 67 2>;
clock-names = "fck", "vp1", "vp2";
/*
@@ -870,6 +1051,7 @@
power-domains = <&k3_pds 40 TI_SCI_PD_EXCLUSIVE>;
clocks = <&ehrpwm_tbclk 0>, <&k3_clks 40 0>;
clock-names = "tbclk", "fck";
+ status = "disabled";
};
ehrpwm1: pwm@3010000 {
@@ -879,6 +1061,7 @@
power-domains = <&k3_pds 41 TI_SCI_PD_EXCLUSIVE>;
clocks = <&ehrpwm_tbclk 1>, <&k3_clks 41 0>;
clock-names = "tbclk", "fck";
+ status = "disabled";
};
ehrpwm2: pwm@3020000 {
@@ -888,6 +1071,7 @@
power-domains = <&k3_pds 42 TI_SCI_PD_EXCLUSIVE>;
clocks = <&ehrpwm_tbclk 2>, <&k3_clks 42 0>;
clock-names = "tbclk", "fck";
+ status = "disabled";
};
ehrpwm3: pwm@3030000 {
@@ -897,6 +1081,7 @@
power-domains = <&k3_pds 43 TI_SCI_PD_EXCLUSIVE>;
clocks = <&ehrpwm_tbclk 3>, <&k3_clks 43 0>;
clock-names = "tbclk", "fck";
+ status = "disabled";
};
ehrpwm4: pwm@3040000 {
@@ -906,6 +1091,7 @@
power-domains = <&k3_pds 44 TI_SCI_PD_EXCLUSIVE>;
clocks = <&ehrpwm_tbclk 4>, <&k3_clks 44 0>;
clock-names = "tbclk", "fck";
+ status = "disabled";
};
ehrpwm5: pwm@3050000 {
@@ -915,6 +1101,7 @@
power-domains = <&k3_pds 45 TI_SCI_PD_EXCLUSIVE>;
clocks = <&ehrpwm_tbclk 5>, <&k3_clks 45 0>;
clock-names = "tbclk", "fck";
+ status = "disabled";
};
icssg0: icssg@b000000 {
@@ -964,6 +1151,18 @@
};
};
+ icssg0_iep0: iep@2e000 {
+ compatible = "ti,am654-icss-iep";
+ reg = <0x2e000 0x1000>;
+ clocks = <&icssg0_iepclk_mux>;
+ };
+
+ icssg0_iep1: iep@2f000 {
+ compatible = "ti,am654-icss-iep";
+ reg = <0x2f000 0x1000>;
+ clocks = <&icssg0_iepclk_mux>;
+ };
+
icssg0_mii_rt: mii-rt@32000 {
compatible = "ti,pruss-mii", "syscon";
reg = <0x32000 0x100>;
@@ -1055,6 +1254,7 @@
#address-cells = <1>;
#size-cells = <0>;
bus_freq = <1000000>;
+ status = "disabled";
};
};
@@ -1105,6 +1305,18 @@
};
};
+ icssg1_iep0: iep@2e000 {
+ compatible = "ti,am654-icss-iep";
+ reg = <0x2e000 0x1000>;
+ clocks = <&icssg1_iepclk_mux>;
+ };
+
+ icssg1_iep1: iep@2f000 {
+ compatible = "ti,am654-icss-iep";
+ reg = <0x2f000 0x1000>;
+ clocks = <&icssg1_iepclk_mux>;
+ };
+
icssg1_mii_rt: mii-rt@32000 {
compatible = "ti,pruss-mii", "syscon";
reg = <0x32000 0x100>;
@@ -1196,6 +1408,7 @@
#address-cells = <1>;
#size-cells = <0>;
bus_freq = <1000000>;
+ status = "disabled";
};
};
@@ -1246,6 +1459,18 @@
};
};
+ icssg2_iep0: iep@2e000 {
+ compatible = "ti,am654-icss-iep";
+ reg = <0x2e000 0x1000>;
+ clocks = <&icssg2_iepclk_mux>;
+ };
+
+ icssg2_iep1: iep@2f000 {
+ compatible = "ti,am654-icss-iep";
+ reg = <0x2f000 0x1000>;
+ clocks = <&icssg2_iepclk_mux>;
+ };
+
icssg2_mii_rt: mii-rt@32000 {
compatible = "ti,pruss-mii", "syscon";
reg = <0x32000 0x100>;
@@ -1337,6 +1562,7 @@
#address-cells = <1>;
#size-cells = <0>;
bus_freq = <1000000>;
+ status = "disabled";
};
};
};
diff --git a/arch/arm/dts/k3-am65-mcu.dtsi b/arch/arm/dts/k3-am65-mcu.dtsi
index c93ff15..edd5cfb 100644
--- a/arch/arm/dts/k3-am65-mcu.dtsi
+++ b/arch/arm/dts/k3-am65-mcu.dtsi
@@ -20,13 +20,32 @@
};
};
+ /* MCU_TIMERIO pad input CTRLMMR_MCU_TIMER*_CTRL registers */
+ mcu_timerio_input: pinctrl@40f04200 {
+ compatible = "pinctrl-single";
+ reg = <0x0 0x40f04200 0x0 0x10>;
+ #pinctrl-cells = <1>;
+ pinctrl-single,register-width = <32>;
+ pinctrl-single,function-mask = <0x00000101>;
+ };
+
+ /* MCU_TIMERIO pad output CTRLMMR_MCU_TIMERIO*_CTRL registers */
+ mcu_timerio_output: pinctrl@40f04280 {
+ compatible = "pinctrl-single";
+ reg = <0x0 0x40f04280 0x0 0x8>;
+ #pinctrl-cells = <1>;
+ pinctrl-single,register-width = <32>;
+ pinctrl-single,function-mask = <0x00000003>;
+ };
+
mcu_uart0: serial@40a00000 {
compatible = "ti,am654-uart";
- reg = <0x00 0x40a00000 0x00 0x100>;
- interrupts = <GIC_SPI 565 IRQ_TYPE_LEVEL_HIGH>;
- clock-frequency = <96000000>;
- current-speed = <115200>;
- power-domains = <&k3_pds 149 TI_SCI_PD_EXCLUSIVE>;
+ reg = <0x00 0x40a00000 0x00 0x100>;
+ interrupts = <GIC_SPI 565 IRQ_TYPE_LEVEL_HIGH>;
+ clock-frequency = <96000000>;
+ current-speed = <115200>;
+ power-domains = <&k3_pds 149 TI_SCI_PD_EXCLUSIVE>;
+ status = "disabled";
};
mcu_ram: sram@41c00000 {
@@ -46,6 +65,7 @@
clock-names = "fck";
clocks = <&k3_clks 114 1>;
power-domains = <&k3_pds 114 TI_SCI_PD_EXCLUSIVE>;
+ status = "disabled";
};
mcu_spi0: spi@40300000 {
@@ -56,6 +76,7 @@
power-domains = <&k3_pds 142 TI_SCI_PD_EXCLUSIVE>;
#address-cells = <1>;
#size-cells = <0>;
+ status = "disabled";
};
mcu_spi1: spi@40310000 {
@@ -66,6 +87,7 @@
power-domains = <&k3_pds 143 TI_SCI_PD_EXCLUSIVE>;
#address-cells = <1>;
#size-cells = <0>;
+ status = "disabled";
};
mcu_spi2: spi@40320000 {
@@ -76,6 +98,7 @@
power-domains = <&k3_pds 144 TI_SCI_PD_EXCLUSIVE>;
#address-cells = <1>;
#size-cells = <0>;
+ status = "disabled";
};
tscadc0: tscadc@40200000 {
@@ -85,10 +108,11 @@
clocks = <&k3_clks 0 2>;
assigned-clocks = <&k3_clks 0 2>;
assigned-clock-rates = <60000000>;
- clock-names = "adc_tsc_fck";
+ clock-names = "fck";
dmas = <&mcu_udmap 0x7100>,
<&mcu_udmap 0x7101 >;
dma-names = "fifo0", "fifo1";
+ status = "disabled";
adc {
#io-channel-cells = <1>;
@@ -103,10 +127,11 @@
clocks = <&k3_clks 1 2>;
assigned-clocks = <&k3_clks 1 2>;
assigned-clock-rates = <60000000>;
- clock-names = "adc_tsc_fck";
+ clock-names = "fck";
dmas = <&mcu_udmap 0x7102>,
<&mcu_udmap 0x7103>;
dma-names = "fifo0", "fifo1";
+ status = "disabled";
adc {
#io-channel-cells = <1>;
@@ -114,8 +139,53 @@
};
};
+ /*
+ * The MCU domain timer interrupts are routed only to the ESM module,
+ * and not currently available for Linux. The MCU domain timers are
+ * of limited use without interrupts, and likely reserved by the ESM.
+ */
+ mcu_timer0: timer@40400000 {
+ compatible = "ti,am654-timer";
+ reg = <0x00 0x40400000 0x00 0x400>;
+ clocks = <&k3_clks 35 0>;
+ clock-names = "fck";
+ power-domains = <&k3_pds 35 TI_SCI_PD_EXCLUSIVE>;
+ ti,timer-pwm;
+ status = "reserved";
+ };
+
+ mcu_timer1: timer@40410000 {
+ compatible = "ti,am654-timer";
+ reg = <0x00 0x40410000 0x00 0x400>;
+ clocks = <&k3_clks 36 0>;
+ clock-names = "fck";
+ power-domains = <&k3_pds 36 TI_SCI_PD_EXCLUSIVE>;
+ ti,timer-pwm;
+ status = "reserved";
+ };
+
+ mcu_timer2: timer@40420000 {
+ compatible = "ti,am654-timer";
+ reg = <0x00 0x40420000 0x00 0x400>;
+ clocks = <&k3_clks 37 0>;
+ clock-names = "fck";
+ power-domains = <&k3_pds 37 TI_SCI_PD_EXCLUSIVE>;
+ ti,timer-pwm;
+ status = "reserved";
+ };
+
+ mcu_timer3: timer@40430000 {
+ compatible = "ti,am654-timer";
+ reg = <0x00 0x40430000 0x00 0x400>;
+ clocks = <&k3_clks 38 0>;
+ clock-names = "fck";
+ power-domains = <&k3_pds 38 TI_SCI_PD_EXCLUSIVE>;
+ ti,timer-pwm;
+ status = "reserved";
+ };
+
mcu_navss: bus@28380000 {
- compatible = "simple-mfd";
+ compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
ranges = <0x00 0x28380000 0x00 0x28380000 0x00 0x03880000>;
@@ -126,11 +196,13 @@
mcu_ringacc: ringacc@2b800000 {
compatible = "ti,am654-navss-ringacc";
- reg = <0x0 0x2b800000 0x0 0x400000>,
- <0x0 0x2b000000 0x0 0x400000>,
- <0x0 0x28590000 0x0 0x100>,
- <0x0 0x2a500000 0x0 0x40000>;
- reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target";
+ reg = <0x0 0x2b800000 0x0 0x400000>,
+ <0x0 0x2b000000 0x0 0x400000>,
+ <0x0 0x28590000 0x0 0x100>,
+ <0x0 0x2a500000 0x0 0x40000>,
+ <0x0 0x28440000 0x0 0x40000>;
+ reg-names = "rt", "fifos", "proxy_gcfg",
+ "proxy_target", "cfg";
ti,num-rings = <286>;
ti,sci-rm-range-gp-rings = <0x1>; /* GP ring range */
ti,sci = <&dmsc>;
@@ -140,9 +212,9 @@
mcu_udmap: dma-controller@285c0000 {
compatible = "ti,am654-navss-mcu-udmap";
- reg = <0x0 0x285c0000 0x0 0x100>,
- <0x0 0x2a800000 0x0 0x40000>,
- <0x0 0x2aa00000 0x0 0x40000>;
+ reg = <0x0 0x285c0000 0x0 0x100>,
+ <0x0 0x2a800000 0x0 0x40000>,
+ <0x0 0x2aa00000 0x0 0x40000>;
reg-names = "gcfg", "rchanrt", "tchanrt";
msi-parent = <&inta_main_udmass>;
#dma-cells = <1>;
@@ -159,7 +231,54 @@
};
};
- fss: fss@47000000 {
+ secure_proxy_mcu: mailbox@2a480000 {
+ compatible = "ti,am654-secure-proxy";
+ #mbox-cells = <1>;
+ reg-names = "target_data", "rt", "scfg";
+ reg = <0x0 0x2a480000 0x0 0x80000>,
+ <0x0 0x2a380000 0x0 0x80000>,
+ <0x0 0x2a400000 0x0 0x80000>;
+ /*
+ * Marked Disabled:
+ * Node is incomplete as it is meant for bootloaders and
+ * firmware on non-MPU processors
+ */
+ status = "disabled";
+ };
+
+ m_can0: can@40528000 {
+ compatible = "bosch,m_can";
+ reg = <0x0 0x40528000 0x0 0x400>,
+ <0x0 0x40500000 0x0 0x4400>;
+ reg-names = "m_can", "message_ram";
+ power-domains = <&k3_pds 102 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&k3_clks 102 5>, <&k3_clks 102 0>;
+ clock-names = "hclk", "cclk";
+ interrupt-parent = <&gic500>;
+ interrupts = <GIC_SPI 544 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 545 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "int0", "int1";
+ bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
+ status = "disabled";
+ };
+
+ m_can1: can@40568000 {
+ compatible = "bosch,m_can";
+ reg = <0x0 0x40568000 0x0 0x400>,
+ <0x0 0x40540000 0x0 0x4400>;
+ reg-names = "m_can", "message_ram";
+ power-domains = <&k3_pds 103 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&k3_clks 103 5>, <&k3_clks 103 0>;
+ clock-names = "hclk", "cclk";
+ interrupt-parent = <&gic500>;
+ interrupts = <GIC_SPI 547 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 548 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "int0", "int1";
+ bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
+ status = "disabled";
+ };
+
+ fss: bus@47000000 {
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
@@ -180,6 +299,7 @@
power-domains = <&k3_pds 248 TI_SCI_PD_EXCLUSIVE>;
#address-cells = <1>;
#size-cells = <0>;
+ status = "disabled";
};
ospi1: spi@47050000 {
@@ -194,6 +314,7 @@
power-domains = <&k3_pds 249 TI_SCI_PD_EXCLUSIVE>;
#address-cells = <1>;
#size-cells = <0>;
+ status = "disabled";
};
};
@@ -243,6 +364,7 @@
clocks = <&k3_clks 5 10>;
clock-names = "fck";
bus_freq = <1000000>;
+ status = "disabled";
};
cpts@3d000 {
diff --git a/arch/arm/dts/k3-am65-wakeup.dtsi b/arch/arm/dts/k3-am65-wakeup.dtsi
index 9d21cdf..fd2b998 100644
--- a/arch/arm/dts/k3-am65-wakeup.dtsi
+++ b/arch/arm/dts/k3-am65-wakeup.dtsi
@@ -12,8 +12,8 @@
mbox-names = "rx", "tx";
- mboxes= <&secure_proxy_main 11>,
- <&secure_proxy_main 13>;
+ mboxes = <&secure_proxy_main 11>,
+ <&secure_proxy_main 13>;
reg-names = "debug_messages";
reg = <0x44083000 0x1000>;
@@ -54,6 +54,7 @@
clock-frequency = <48000000>;
current-speed = <115200>;
power-domains = <&k3_pds 150 TI_SCI_PD_EXCLUSIVE>;
+ status = "disabled";
};
wkup_i2c0: i2c@42120000 {
@@ -65,6 +66,7 @@
clock-names = "fck";
clocks = <&k3_clks 115 1>;
power-domains = <&k3_pds 115 TI_SCI_PD_EXCLUSIVE>;
+ status = "disabled";
};
intr_wkup_gpio: interrupt-controller@42200000 {
@@ -100,8 +102,4 @@
power-domains = <&k3_pds 80 TI_SCI_PD_EXCLUSIVE>;
#thermal-sensor-cells = <1>;
};
-
- thermal_zones: thermal-zones {
- #include "k3-am654-industrial-thermal.dtsi"
- };
};
diff --git a/arch/arm/dts/k3-am65.dtsi b/arch/arm/dts/k3-am65.dtsi
index a9fc1af..4d7b615 100644
--- a/arch/arm/dts/k3-am65.dtsi
+++ b/arch/arm/dts/k3-am65.dtsi
@@ -8,9 +8,10 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
-#include <dt-bindings/pinctrl/k3.h>
#include <dt-bindings/soc/ti,sci_pm_domain.h>
+#include "k3-pinctrl.h"
+
/ {
model = "Texas Instruments K3 AM654 SoC";
compatible = "ti,am654";
@@ -18,21 +19,6 @@
#address-cells = <2>;
#size-cells = <2>;
- aliases {
- serial0 = &wkup_uart0;
- serial1 = &mcu_uart0;
- serial2 = &main_uart0;
- serial3 = &main_uart1;
- serial4 = &main_uart2;
- i2c0 = &wkup_i2c0;
- i2c1 = &mcu_i2c0;
- i2c2 = &main_i2c0;
- i2c3 = &main_i2c1;
- i2c4 = &main_i2c2;
- i2c5 = &main_i2c3;
- ethernet0 = &cpsw_port1;
- };
-
chosen { };
firmware {
@@ -84,6 +70,7 @@
<0x00 0x46000000 0x00 0x46000000 0x00 0x00200000>,
<0x00 0x47000000 0x00 0x47000000 0x00 0x00068400>,
<0x00 0x50000000 0x00 0x50000000 0x00 0x8000000>,
+ <0x00 0x6f000000 0x00 0x6f000000 0x00 0x00310000>, /* A53 PERIPHBASE */
<0x00 0x70000000 0x00 0x70000000 0x00 0x200000>,
<0x05 0x00000000 0x05 0x00000000 0x01 0x0000000>,
<0x07 0x00000000 0x07 0x00000000 0x01 0x0000000>;
diff --git a/arch/arm/dts/k3-am6528-iot2050-basic-common.dtsi b/arch/arm/dts/k3-am6528-iot2050-basic-common.dtsi
index 4a9bf7d..5ab434c 100644
--- a/arch/arm/dts/k3-am6528-iot2050-basic-common.dtsi
+++ b/arch/arm/dts/k3-am6528-iot2050-basic-common.dtsi
@@ -35,7 +35,7 @@
};
&main_pmx0 {
- main_uart0_pins_default: main-uart0-pins-default {
+ main_uart0_pins_default: main-uart0-default-pins {
pinctrl-single,pins = <
AM65X_IOPAD(0x01e4, PIN_INPUT, 0) /* (AF11) UART0_RXD */
AM65X_IOPAD(0x01e8, PIN_OUTPUT, 0) /* (AE11) UART0_TXD */
@@ -50,6 +50,7 @@
};
&main_uart0 {
+ status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&main_uart0_pins_default>;
};
diff --git a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
index 11d8392..4fd188f 100644
--- a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
+++ b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
@@ -3,9 +3,168 @@
* Copyright (C) 2018-2021 Texas Instruments Incorporated - https://www.ti.com/
*/
-#include "k3-am654-r5-base-board-u-boot.dtsi"
#include "k3-am65x-binman.dtsi"
+/ {
+ chosen {
+ tick-timer = &mcu_timer0;
+ };
+};
+
+&mcu_timer0 {
+ ti,timer-alwon;
+ clock-frequency = <25000000>;
+ bootph-all;
+};
+
+&vtt_supply {
+ bootph-all;
+};
+
+&cbass_main {
+ bootph-all;
+};
+
+&main_navss {
+ bootph-all;
+};
+
+&cbass_mcu {
+ bootph-all;
+};
+
+&mcu_navss {
+ bootph-all;
+};
+
+&mcu_ringacc {
+ bootph-all;
+};
+
+&mcu_udmap {
+ bootph-all;
+};
+
+&wkup_gpio0 {
+ bootph-all;
+};
+
+&secure_proxy_main {
+ bootph-all;
+};
+
+&cbass_wakeup {
+ bootph-all;
+
+ chipid@43000014 {
+ bootph-all;
+ };
+};
+
+&dmsc {
+ bootph-all;
+};
+
+&k3_pds {
+ bootph-all;
+};
+
+&k3_clks {
+ bootph-all;
+};
+
+&k3_reset {
+ bootph-all;
+};
+
+&main_uart0 {
+ bootph-all;
+};
+
+&wkup_vtm0 {
+ bootph-all;
+};
+
+&wkup_pmx0 {
+ bootph-all;
+};
+
+&wkup_uart0_pins_default {
+ bootph-all;
+};
+
+&ddr_vtt_pins_default {
+ bootph-all;
+};
+
+&mcu_uart0_pins_default {
+ bootph-all;
+};
+
+&wkup_i2c0_pins_default {
+ bootph-all;
+};
+
+&mcu_fss0_ospi0_pins_default {
+ bootph-all;
+};
+
+&main_pmx0 {
+ bootph-all;
+};
+
+&main_uart0_pins_default {
+ bootph-all;
+};
+
+&main_mmc0_pins_default {
+ bootph-all;
+};
+
+&main_mmc1_pins_default {
+ bootph-all;
+};
+
+&main_pmx1 {
+ bootph-all;
+};
+
+&sdhci0 {
+ bootph-all;
+};
+
+&sdhci1 {
+ bootph-all;
+};
+
+&wkup_i2c0 {
+ bootph-all;
+};
+
+&vdd_mpu {
+ bootph-all;
+};
+
+&ospi0 {
+ bootph-all;
+
+ flash@0 {
+ bootph-all;
+ };
+};
+
+&dwc3_0 {
+ bootph-all;
+};
+
+&scm_conf {
+ bootph-all;
+};
+
+&fss {
+ bootph-all;
+};
+
&pru0_0 {
remoteproc-name = "pru0_0";
};
@@ -81,3 +240,37 @@
&mcu_r5fss0 {
ti,cluster-mode = <0>;
};
+
+/*
+ * The DMA driver requires a few extra register ranges
+ * which are missing for the am65x. A patch has been
+ * sent and will be synced after the v6.8-rc1 linux
+ * tag is published
+ */
+&main_udmap {
+ reg = <0x0 0x31150000 0x0 0x100>,
+ <0x0 0x34000000 0x0 0x100000>,
+ <0x0 0x35000000 0x0 0x100000>,
+ <0x0 0x30b00000 0x0 0x10000>,
+ <0x0 0x30c00000 0x0 0x10000>,
+ <0x0 0x30d00000 0x0 0x8000>;
+ reg-names = "gcfg", "rchanrt", "tchanrt",
+ "tchan", "rchan", "rflow";
+};
+
+/*
+ * The DMA driver requires a few extra register ranges
+ * which are missing for the am65x. A patch has been
+ * sent and will be synced after the v6.8-rc1 linux
+ * tag is published
+ */
+&mcu_udmap {
+ reg = <0x0 0x285c0000 0x0 0x100>,
+ <0x0 0x2a800000 0x0 0x40000>,
+ <0x0 0x2aa00000 0x0 0x40000>,
+ <0x0 0x284a0000 0x0 0x4000>,
+ <0x0 0x284c0000 0x0 0x4000>,
+ <0x0 0x28400000 0x0 0x2000>;
+ reg-names = "gcfg", "rchanrt", "tchanrt",
+ "tchan", "rchan", "rflow";
+};
diff --git a/arch/arm/dts/k3-am654-base-board.dts b/arch/arm/dts/k3-am654-base-board.dts
index cfbcebf..1637ec5 100644
--- a/arch/arm/dts/k3-am654-base-board.dts
+++ b/arch/arm/dts/k3-am654-base-board.dts
@@ -10,12 +10,25 @@
#include <dt-bindings/net/ti-dp83867.h>
/ {
- compatible = "ti,am654-evm", "ti,am654";
+ compatible = "ti,am654-evm", "ti,am654";
model = "Texas Instruments AM654 Base Board";
+ aliases {
+ serial0 = &wkup_uart0;
+ serial1 = &mcu_uart0;
+ serial2 = &main_uart0;
+ i2c0 = &wkup_i2c0;
+ i2c1 = &mcu_i2c0;
+ i2c2 = &main_i2c0;
+ i2c3 = &main_i2c1;
+ i2c4 = &main_i2c2;
+ ethernet0 = &cpsw_port1;
+ mmc0 = &sdhci0;
+ mmc1 = &sdhci1;
+ };
+
chosen {
stdout-path = "serial2:115200n8";
- bootargs = "earlycon=ns16550a,mmio32,0x02800000";
};
memory@80000000 {
@@ -73,20 +86,20 @@
pinctrl-names = "default";
pinctrl-0 = <&push_button_pins_default>;
- sw5 {
+ switch-5 {
label = "GPIO Key USER1";
linux,code = <BTN_0>;
gpios = <&wkup_gpio0 24 GPIO_ACTIVE_LOW>;
};
- sw6 {
+ switch-6 {
label = "GPIO Key USER2";
linux,code = <BTN_1>;
gpios = <&wkup_gpio0 27 GPIO_ACTIVE_LOW>;
};
};
- evm_12v0: fixedregulator-evm12v0 {
+ evm_12v0: regulator-0 {
/* main supply */
compatible = "regulator-fixed";
regulator-name = "evm_12v0";
@@ -96,7 +109,7 @@
regulator-boot-on;
};
- vcc3v3_io: fixedregulator-vcc3v3io {
+ vcc3v3_io: regulator-1 {
/* Output of TPS54334 */
compatible = "regulator-fixed";
regulator-name = "vcc3v3_io";
@@ -107,7 +120,7 @@
vin-supply = <&evm_12v0>;
};
- vdd_mmc1_sd: fixedregulator-sd {
+ vdd_mmc1_sd: regulator-2 {
compatible = "regulator-fixed";
regulator-name = "vdd_mmc1_sd";
regulator-min-microvolt = <3300000>;
@@ -117,24 +130,53 @@
vin-supply = <&vcc3v3_io>;
gpio = <&pca9554 4 GPIO_ACTIVE_HIGH>;
};
+
+ vtt_supply: regulator-3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vtt";
+ pinctrl-names = "default";
+ pinctrl-0 = <&ddr_vtt_pins_default>;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ enable-active-high;
+ regulator-always-on;
+ regulator-boot-on;
+ vin-supply = <&vcc3v3_io>;
+ gpio = <&wkup_gpio0 28 GPIO_ACTIVE_HIGH>;
+ };
};
&wkup_pmx0 {
- wkup_i2c0_pins_default: wkup-i2c0-pins-default {
+ wkup_uart0_pins_default: wkup-uart0-default-pins {
+ pinctrl-single,pins = <
+ AM65X_WKUP_IOPAD(0x00a0, PIN_INPUT, 0) /* (AB1) WKUP_UART0_RXD */
+ AM65X_WKUP_IOPAD(0x00a4, PIN_OUTPUT, 0) /* (AB5) WKUP_UART0_TXD */
+ AM65X_WKUP_IOPAD(0x00c8, PIN_INPUT, 1) /* (AC2) WKUP_GPIO0_6.WKUP_UART0_CTSn */
+ AM65X_WKUP_IOPAD(0x00cc, PIN_OUTPUT, 1) /* (AC1) WKUP_GPIO0_7.WKUP_UART0_RTSn */
+ >;
+ };
+
+ ddr_vtt_pins_default: ddr-vtt-default-pins {
+ pinctrl-single,pins = <
+ AM65X_WKUP_IOPAD(0x0040, PIN_OUTPUT_PULLUP, 7) /* WKUP_GPIO0_28 */
+ >;
+ };
+
+ wkup_i2c0_pins_default: wkup-i2c0-default-pins {
pinctrl-single,pins = <
AM65X_WKUP_IOPAD(0x00e0, PIN_INPUT, 0) /* (AC7) WKUP_I2C0_SCL */
AM65X_WKUP_IOPAD(0x00e4, PIN_INPUT, 0) /* (AD6) WKUP_I2C0_SDA */
>;
};
- push_button_pins_default: push-button-pins-default {
+ push_button_pins_default: push-button-default-pins {
pinctrl-single,pins = <
AM65X_WKUP_IOPAD(0x0030, PIN_INPUT, 7) /* (R5) WKUP_GPIO0_24 */
AM65X_WKUP_IOPAD(0x003c, PIN_INPUT, 7) /* (P2) WKUP_GPIO0_27 */
>;
};
- mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-pins-default {
+ mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-default-pins {
pinctrl-single,pins = <
AM65X_WKUP_IOPAD(0x0000, PIN_OUTPUT, 0) /* (V1) MCU_OSPI0_CLK */
AM65X_WKUP_IOPAD(0x0008, PIN_INPUT, 0) /* (U2) MCU_OSPI0_DQS */
@@ -150,13 +192,22 @@
>;
};
- wkup_pca554_default: wkup-pca554-default {
+ wkup_pca554_default: wkup-pca554-default-pins {
pinctrl-single,pins = <
AM65X_WKUP_IOPAD(0x0034, PIN_INPUT, 7) /* (T1) MCU_OSPI1_CLK.WKUP_GPIO0_25 */
>;
};
- mcu_cpsw_pins_default: mcu-cpsw-pins-default {
+ mcu_uart0_pins_default: mcu-uart0-default-pins {
+ pinctrl-single,pins = <
+ AM65X_WKUP_IOPAD(0x0044, PIN_INPUT, 4) /* (P4) MCU_OSPI1_D1.MCU_UART0_RXD */
+ AM65X_WKUP_IOPAD(0x0048, PIN_OUTPUT, 4) /* (P5) MCU_OSPI1_D2.MCU_UART0_TXD */
+ AM65X_WKUP_IOPAD(0x004C, PIN_INPUT, 4) /* (P1) MCU_OSPI1_D3.MCU_UART0_CTSn */
+ AM65X_WKUP_IOPAD(0x0054, PIN_OUTPUT, 4) /* (N3) MCU_OSPI1_CSn1.MCU_UART0_RTSn */
+ >;
+ };
+
+ mcu_cpsw_pins_default: mcu-cpsw-default-pins {
pinctrl-single,pins = <
AM65X_WKUP_IOPAD(0x0058, PIN_OUTPUT, 0) /* (N4) MCU_RGMII1_TX_CTL */
AM65X_WKUP_IOPAD(0x005c, PIN_INPUT, 0) /* (N5) MCU_RGMII1_RX_CTL */
@@ -173,16 +224,23 @@
>;
};
- mcu_mdio_pins_default: mcu-mdio1-pins-default {
+ mcu_mdio_pins_default: mcu-mdio1-default-pins {
pinctrl-single,pins = <
AM65X_WKUP_IOPAD(0x008c, PIN_OUTPUT, 0) /* (L1) MCU_MDIO0_MDC */
AM65X_WKUP_IOPAD(0x0088, PIN_INPUT, 0) /* (L4) MCU_MDIO0_MDIO */
>;
};
+
+ mcu_i2c0_pins_default: mcu-i2c0-default-pins {
+ pinctrl-single,pins = <
+ AM65X_WKUP_IOPAD(0x00e8, PIN_INPUT, 0) /* (AD8) MCU_I2C0_SCL */
+ AM65X_WKUP_IOPAD(0x00ec, PIN_INPUT, 0) /* (AD7) MCU_I2C0_SDA */
+ >;
+ };
};
&main_pmx0 {
- main_uart0_pins_default: main-uart0-pins-default {
+ main_uart0_pins_default: main-uart0-default-pins {
pinctrl-single,pins = <
AM65X_IOPAD(0x01e4, PIN_INPUT, 0) /* (AF11) UART0_RXD */
AM65X_IOPAD(0x01e8, PIN_OUTPUT, 0) /* (AE11) UART0_TXD */
@@ -191,14 +249,14 @@
>;
};
- main_i2c2_pins_default: main-i2c2-pins-default {
+ main_i2c2_pins_default: main-i2c2-default-pins {
pinctrl-single,pins = <
AM65X_IOPAD(0x0074, PIN_INPUT, 5) /* (T27) GPMC0_CSn3.I2C2_SCL */
AM65X_IOPAD(0x0070, PIN_INPUT, 5) /* (R25) GPMC0_CSn2.I2C2_SDA */
>;
};
- main_spi0_pins_default: main-spi0-pins-default {
+ main_spi0_pins_default: main-spi0-default-pins {
pinctrl-single,pins = <
AM65X_IOPAD(0x01c4, PIN_INPUT, 0) /* (AH13) SPI0_CLK */
AM65X_IOPAD(0x01c8, PIN_INPUT, 0) /* (AE13) SPI0_D0 */
@@ -207,7 +265,7 @@
>;
};
- main_mmc0_pins_default: main-mmc0-pins-default {
+ main_mmc0_pins_default: main-mmc0-default-pins {
pinctrl-single,pins = <
AM65X_IOPAD(0x01a8, PIN_INPUT_PULLDOWN, 0) /* (B25) MMC0_CLK */
AM65X_IOPAD(0x01ac, PIN_INPUT_PULLUP, 0) /* (B27) MMC0_CMD */
@@ -224,7 +282,7 @@
>;
};
- main_mmc1_pins_default: main-mmc1-pins-default {
+ main_mmc1_pins_default: main-mmc1-default-pins {
pinctrl-single,pins = <
AM65X_IOPAD(0x02d4, PIN_INPUT_PULLDOWN, 0) /* (C27) MMC1_CLK */
AM65X_IOPAD(0x02d8, PIN_INPUT_PULLUP, 0) /* (C28) MMC1_CMD */
@@ -237,7 +295,7 @@
>;
};
- usb1_pins_default: usb1-pins-default {
+ usb1_pins_default: usb1-default-pins {
pinctrl-single,pins = <
AM65X_IOPAD(0x02c0, PIN_OUTPUT, 0) /* (AC8) USB1_DRVVBUS */
>;
@@ -245,21 +303,21 @@
};
&main_pmx1 {
- main_i2c0_pins_default: main-i2c0-pins-default {
+ main_i2c0_pins_default: main-i2c0-default-pins {
pinctrl-single,pins = <
AM65X_IOPAD(0x0000, PIN_INPUT, 0) /* (D20) I2C0_SCL */
AM65X_IOPAD(0x0004, PIN_INPUT, 0) /* (C21) I2C0_SDA */
>;
};
- main_i2c1_pins_default: main-i2c1-pins-default {
+ main_i2c1_pins_default: main-i2c1-default-pins {
pinctrl-single,pins = <
AM65X_IOPAD(0x0008, PIN_INPUT, 0) /* (B21) I2C1_SCL */
AM65X_IOPAD(0x000c, PIN_INPUT, 0) /* (E21) I2C1_SDA */
>;
};
- ecap0_pins_default: ecap0-pins-default {
+ ecap0_pins_default: ecap0-default-pins {
pinctrl-single,pins = <
AM65X_IOPAD(0x0010, PIN_INPUT, 0) /* (D21) ECAP0_IN_APWM_OUT */
>;
@@ -269,19 +327,55 @@
&wkup_uart0 {
/* Wakeup UART is used by System firmware */
status = "reserved";
+ pinctrl-names = "default";
+ pinctrl-0 = <&wkup_uart0_pins_default>;
+};
+
+&mcu_uart0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&mcu_uart0_pins_default>;
};
&main_uart0 {
+ status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&main_uart0_pins_default>;
power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>;
};
&wkup_i2c0 {
+ status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&wkup_i2c0_pins_default>;
clock-frequency = <400000>;
+ eeprom@50 {
+ /* AT24CM01 */
+ compatible = "atmel,24c1024";
+ reg = <0x50>;
+ };
+
+ vdd_mpu: regulator@60 {
+ compatible = "ti,tps62363";
+ reg = <0x60>;
+ regulator-name = "VDD_MPU";
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <1770000>;
+ regulator-always-on;
+ regulator-boot-on;
+ ti,vsel0-state-high;
+ ti,vsel1-state-high;
+ ti,enable-vout-discharge;
+ };
+
+ gpio@38 {
+ compatible = "nxp,pca9554";
+ reg = <0x38>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
pca9554: gpio@39 {
compatible = "nxp,pca9554";
reg = <0x39>;
@@ -296,7 +390,15 @@
};
};
+&mcu_i2c0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&mcu_i2c0_pins_default>;
+ clock-frequency = <400000>;
+};
+
&main_i2c0 {
+ status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&main_i2c0_pins_default>;
clock-frequency = <400000>;
@@ -310,37 +412,39 @@
};
&main_i2c1 {
+ status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&main_i2c1_pins_default>;
clock-frequency = <400000>;
};
&main_i2c2 {
+ status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&main_i2c2_pins_default>;
clock-frequency = <400000>;
};
&ecap0 {
+ status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&ecap0_pins_default>;
};
&main_spi0 {
+ status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&main_spi0_pins_default>;
#address-cells = <1>;
- #size-cells= <0>;
+ #size-cells = <0>;
ti,pindir-d0-out-d1-in;
- flash@0{
+ flash@0 {
compatible = "jedec,spi-nor";
reg = <0x0>;
spi-tx-bus-width = <1>;
spi-rx-bus-width = <1>;
spi-max-frequency = <48000000>;
- #address-cells = <1>;
- #size-cells= <1>;
};
};
@@ -381,12 +485,14 @@
};
&tscadc0 {
+ status = "okay";
adc {
ti,adc-channels = <0 1 2 3 4 5 6 7>;
};
};
&tscadc1 {
+ status = "okay";
adc {
ti,adc-channels = <0 1 2 3 4 5 6 7>;
};
@@ -400,23 +506,8 @@
status = "disabled";
};
-&pcie0_rc {
- status = "disabled";
-};
-
-&pcie0_ep {
- status = "disabled";
-};
-
-&pcie1_rc {
- status = "disabled";
-};
-
-&pcie1_ep {
- status = "disabled";
-};
-
&mailbox0_cluster0 {
+ status = "okay";
interrupts = <436>;
mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
@@ -426,6 +517,7 @@
};
&mailbox0_cluster1 {
+ status = "okay";
interrupts = <432>;
mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
@@ -434,63 +526,24 @@
};
};
-&mailbox0_cluster2 {
- status = "disabled";
-};
-
-&mailbox0_cluster3 {
- status = "disabled";
-};
-
-&mailbox0_cluster4 {
- status = "disabled";
-};
-
-&mailbox0_cluster5 {
- status = "disabled";
-};
-
-&mailbox0_cluster6 {
- status = "disabled";
-};
-
-&mailbox0_cluster7 {
- status = "disabled";
-};
-
-&mailbox0_cluster8 {
- status = "disabled";
-};
-
-&mailbox0_cluster9 {
- status = "disabled";
-};
-
-&mailbox0_cluster10 {
- status = "disabled";
-};
-
-&mailbox0_cluster11 {
- status = "disabled";
-};
-
&mcu_r5fss0_core0 {
memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
<&mcu_r5fss0_core0_memory_region>;
- mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>;
+ mboxes = <&mailbox0_cluster0>, <&mbox_mcu_r5fss0_core0>;
};
&mcu_r5fss0_core1 {
memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
<&mcu_r5fss0_core1_memory_region>;
- mboxes = <&mailbox0_cluster1 &mbox_mcu_r5fss0_core1>;
+ mboxes = <&mailbox0_cluster1>, <&mbox_mcu_r5fss0_core1>;
};
&ospi0 {
+ status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
- flash@0{
+ flash@0 {
compatible = "jedec,spi-nor";
reg = <0x0>;
spi-tx-bus-width = <8>;
@@ -501,17 +554,65 @@
cdns,tchsh-ns = <60>;
cdns,tslch-ns = <60>;
cdns,read-delay = <0>;
- #address-cells = <1>;
- #size-cells = <1>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "ospi.tiboot3";
+ reg = <0x0 0x80000>;
+ };
+
+ partition@80000 {
+ label = "ospi.tispl";
+ reg = <0x80000 0x200000>;
+ };
+
+ partition@280000 {
+ label = "ospi.u-boot";
+ reg = <0x280000 0x400000>;
+ };
+
+ partition@680000 {
+ label = "ospi.env";
+ reg = <0x680000 0x20000>;
+ };
+
+ partition@6a0000 {
+ label = "ospi.env.backup";
+ reg = <0x6a0000 0x20000>;
+ };
+
+ partition@6c0000 {
+ label = "ospi.sysfw";
+ reg = <0x6c0000 0x100000>;
+ };
+
+ partition@800000 {
+ label = "ospi.rootfs";
+ reg = <0x800000 0x37c0000>;
+ };
+
+ partition@3fe0000 {
+ label = "ospi.phypattern";
+ reg = <0x3fe0000 0x20000>;
+ };
+ };
};
};
&mcu_cpsw {
pinctrl-names = "default";
- pinctrl-0 = <&mcu_cpsw_pins_default &mcu_mdio_pins_default>;
+ pinctrl-0 = <&mcu_cpsw_pins_default>;
};
&davinci_mdio {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&mcu_mdio_pins_default>;
+
phy0: ethernet-phy@0 {
reg = <0>;
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
@@ -524,30 +625,6 @@
phy-handle = <&phy0>;
};
-&mcasp0 {
- status = "disabled";
-};
-
-&mcasp1 {
- status = "disabled";
-};
-
-&mcasp2 {
- status = "disabled";
-};
-
&dss {
status = "disabled";
};
-
-&icssg0_mdio {
- status = "disabled";
-};
-
-&icssg1_mdio {
- status = "disabled";
-};
-
-&icssg2_mdio {
- status = "disabled";
-};
diff --git a/arch/arm/dts/k3-am654-r5-base-board-u-boot.dtsi b/arch/arm/dts/k3-am654-r5-base-board-u-boot.dtsi
deleted file mode 100644
index 2866045..0000000
--- a/arch/arm/dts/k3-am654-r5-base-board-u-boot.dtsi
+++ /dev/null
@@ -1,208 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Copyright (C) 2018-2021 Texas Instruments Incorporated - https://www.ti.com/
- */
-
-#include <dt-bindings/pinctrl/k3.h>
-#include <dt-bindings/net/ti-dp83867.h>
-#include "k3-am65x-binman.dtsi"
-
-/ {
- chosen {
- stdout-path = "serial2:115200n8";
- };
-
- aliases {
- serial2 = &main_uart0;
- ethernet0 = &cpsw_port1;
- usb0 = &usb0;
- usb1 = &usb1;
- spi0 = &ospi0;
- spi1 = &ospi1;
- };
-};
-
-&cbass_main{
- bootph-pre-ram;
- main_navss: bus@30800000 {
- bootph-pre-ram;
- };
-};
-
-&cbass_mcu {
- bootph-pre-ram;
-
- mcu_navss: bus@28380000 {
- bootph-pre-ram;
-
- ringacc@2b800000 {
- reg = <0x0 0x2b800000 0x0 0x400000>,
- <0x0 0x2b000000 0x0 0x400000>,
- <0x0 0x28590000 0x0 0x100>,
- <0x0 0x2a500000 0x0 0x40000>,
- <0x0 0x28440000 0x0 0x40000>;
- reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target", "cfg";
- bootph-pre-ram;
- ti,dma-ring-reset-quirk;
- };
-
- dma-controller@285c0000 {
- reg = <0x0 0x285c0000 0x0 0x100>,
- <0x0 0x284c0000 0x0 0x4000>,
- <0x0 0x2a800000 0x0 0x40000>,
- <0x0 0x284a0000 0x0 0x4000>,
- <0x0 0x2aa00000 0x0 0x40000>,
- <0x0 0x28400000 0x0 0x2000>;
- reg-names = "gcfg", "rchan", "rchanrt", "tchan",
- "tchanrt", "rflow";
- bootph-pre-ram;
- };
- };
-};
-
-&cbass_wakeup {
- bootph-pre-ram;
-
- chipid@43000014 {
- bootph-pre-ram;
- };
-};
-
-&secure_proxy_main {
- bootph-pre-ram;
-};
-
-&dmsc {
- bootph-pre-ram;
- k3_sysreset: sysreset-controller {
- compatible = "ti,sci-sysreset";
- bootph-pre-ram;
- };
-};
-
-&k3_pds {
- bootph-pre-ram;
-};
-
-&k3_clks {
- bootph-pre-ram;
-};
-
-&k3_reset {
- bootph-pre-ram;
-};
-
-&wkup_pmx0 {
- bootph-pre-ram;
-
- wkup_i2c0_pins_default {
- bootph-pre-ram;
- };
-};
-
-&main_pmx0 {
- bootph-pre-ram;
- usb0_pins_default: usb0_pins_default {
- pinctrl-single,pins = <
- AM65X_IOPAD(0x02bc, PIN_OUTPUT, 0) /* (AD9) USB0_DRVVBUS */
- >;
- bootph-pre-ram;
- };
-};
-
-&main_uart0_pins_default {
- bootph-pre-ram;
-};
-
-&main_pmx1 {
- bootph-pre-ram;
-};
-
-&wkup_pmx0 {
- mcu-fss0-ospi0-pins-default {
- bootph-pre-ram;
- };
-};
-
-&main_uart0 {
- bootph-pre-ram;
-};
-
-&main_mmc0_pins_default {
- bootph-pre-ram;
-};
-
-&main_mmc1_pins_default {
- bootph-pre-ram;
-};
-
-&sdhci0 {
- bootph-pre-ram;
-};
-
-&sdhci1 {
- bootph-pre-ram;
-};
-
-&davinci_mdio {
- phy0: ethernet-phy@0 {
- reg = <0>;
- /* TODO: phy reset: TCA9555RTWR(i2c:0x21)[p04].GPIO_MCU_RGMII_RSTN */
- ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
- ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
- };
-};
-
-&mcu_cpsw {
- reg = <0x0 0x46000000 0x0 0x200000>,
- <0x0 0x40f00200 0x0 0x2>;
- reg-names = "cpsw_nuss", "mac_efuse";
- /delete-property/ ranges;
-
- cpsw-phy-sel@40f04040 {
- compatible = "ti,am654-cpsw-phy-sel";
- reg= <0x0 0x40f04040 0x0 0x4>;
- reg-names = "gmii-sel";
- };
-};
-
-&wkup_i2c0 {
- bootph-pre-ram;
-};
-
-&usb1 {
- dr_mode = "peripheral";
-};
-
-&fss {
- bootph-pre-ram;
-};
-
-&ospi0 {
- bootph-pre-ram;
-
- flash@0{
- bootph-pre-ram;
- };
-};
-
-&dwc3_0 {
- status = "okay";
- bootph-pre-ram;
-};
-
-&usb0_phy {
- status = "okay";
- bootph-pre-ram;
-};
-
-&usb0 {
- pinctrl-names = "default";
- pinctrl-0 = <&usb0_pins_default>;
- dr_mode = "peripheral";
- bootph-pre-ram;
-};
-
-&scm_conf {
- bootph-pre-ram;
-};
diff --git a/arch/arm/dts/k3-am654-r5-base-board.dts b/arch/arm/dts/k3-am654-r5-base-board.dts
index 637a5cc..dea2ba8 100644
--- a/arch/arm/dts/k3-am654-r5-base-board.dts
+++ b/arch/arm/dts/k3-am654-r5-base-board.dts
@@ -5,25 +5,12 @@
/dts-v1/;
-#include "k3-am654.dtsi"
+#include "k3-am654-base-board.dts"
+#include "k3-am654-base-board-u-boot.dtsi"
#include "k3-am654-base-board-ddr4-1600MTs.dtsi"
#include "k3-am654-ddr.dtsi"
/ {
- compatible = "ti,am654-evm", "ti,am654";
- model = "Texas Instruments AM654 R5 Base Board";
-
- aliases {
- serial0 = &wkup_uart0;
- serial1 = &mcu_uart0;
- serial2 = &main_uart0;
- };
-
- chosen {
- stdout-path = "serial2:115200n8";
- tick-timer = &timer1;
- };
-
aliases {
remoteproc0 = &sysctrler;
remoteproc1 = &a53_0;
@@ -44,51 +31,6 @@
bootph-pre-ram;
};
- vtt_supply: vtt_supply {
- compatible = "regulator-gpio";
- regulator-name = "vtt";
- regulator-min-microvolt = <0>;
- regulator-max-microvolt = <3300000>;
- gpios = <&wkup_gpio0 28 GPIO_ACTIVE_HIGH>;
- states = <0 0x0 3300000 0x1>;
- bootph-pre-ram;
- };
-};
-
-&cbass_main {
- timer1: timer@40400000 {
- compatible = "ti,omap5430-timer";
- reg = <0x0 0x40400000 0x0 0x80>;
- ti,timer-alwon;
- clock-frequency = <25000000>;
- bootph-all;
- };
-};
-
-&cbass_mcu {
- mcu_secproxy: secproxy@28380000 {
- compatible = "ti,am654-secure-proxy";
- reg = <0x0 0x2a380000 0x0 0x80000>,
- <0x0 0x2a400000 0x0 0x80000>,
- <0x0 0x2a480000 0x0 0x80000>;
- reg-names = "rt", "scfg", "target_data";
- #mbox-cells = <1>;
- bootph-pre-ram;
- };
-};
-
-&wkup_gpio0 {
- bootph-pre-ram;
-};
-
-&cbass_wakeup {
- sysctrler: sysctrler {
- compatible = "ti,am654-system-controller";
- mboxes= <&mcu_secproxy 4>, <&mcu_secproxy 5>;
- mbox-names = "tx", "rx";
- bootph-pre-ram;
- };
-
clk_200mhz: dummy_clock {
compatible = "fixed-clock";
#clock-cells = <0>;
@@ -97,237 +39,120 @@
};
};
+&secure_proxy_mcu {
+ status = "okay";
+ bootph-pre-ram;
+};
+
+&cbass_wakeup {
+ sysctrler: sysctrler {
+ compatible = "ti,am654-system-controller";
+ mboxes= <&secure_proxy_mcu 4>, <&secure_proxy_mcu 5>;
+ mbox-names = "tx", "rx";
+ bootph-pre-ram;
+ };
+};
+
+/*
+ * timer init is called as part of rproc_start() while
+ * starting System Firmware, so any clock/power-domain
+ * operations will fail as SYSFW is not yet up and running.
+ * Delete all clock/power-domain properties to avoid
+ * timer init failure.
+ * This is an always on timer at 20MHz.
+ */
+&mcu_timer0 {
+ /delete-property/ clocks;
+ /delete-property/ assigned-clocks;
+ /delete-property/ assigned-clock-parents;
+ /delete-property/ power-domains;
+};
+
&dmsc {
- mboxes= <&mcu_secproxy 8>, <&mcu_secproxy 6>, <&mcu_secproxy 5>;
+ mboxes = <&secure_proxy_mcu 8>,
+ <&secure_proxy_mcu 6>,
+ <&secure_proxy_mcu 5>;
mbox-names = "tx", "rx", "notify";
ti,host-id = <4>;
ti,secure-host;
};
&wkup_uart0 {
- bootph-pre-ram;
- pinctrl-names = "default";
- pinctrl-0 = <&wkup_uart0_pins_default>;
status = "okay";
+ bootph-pre-ram;
};
&mcu_uart0 {
- bootph-pre-ram;
- pinctrl-names = "default";
- pinctrl-0 = <&mcu_uart0_pins_default>;
clock-frequency = <48000000>;
/delete-property/ power-domains;
status = "okay";
-};
-
-&main_uart0 {
- pinctrl-names = "default";
- pinctrl-0 = <&main_uart0_pins_default>;
- power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>;
- status = "okay";
+ bootph-pre-ram;
};
&wkup_vtm0 {
compatible = "ti,am654-vtm", "ti,am654-avs";
vdd-supply-3 = <&vdd_mpu>;
vdd-supply-4 = <&vdd_mpu>;
- bootph-pre-ram;
-};
-
-&wkup_pmx0 {
- bootph-pre-ram;
- wkup_uart0_pins_default: wkup_uart0_pins_default {
- pinctrl-single,pins = <
- AM65X_WKUP_IOPAD(0x00a0, PIN_INPUT, 0) /* (AB1) WKUP_UART0_RXD */
- AM65X_WKUP_IOPAD(0x00a4, PIN_OUTPUT, 0) /* (AB5) WKUP_UART0_TXD */
- AM65X_WKUP_IOPAD(0x00c8, PIN_INPUT, 1) /* (AC2) WKUP_GPIO0_6.WKUP_UART0_CTSn */
- AM65X_WKUP_IOPAD(0x00cc, PIN_OUTPUT, 1) /* (AC1) WKUP_GPIO0_7.WKUP_UART0_RTSn */
- >;
- bootph-pre-ram;
- };
-
- wkup_vtt_pins_default: wkup_vtt_pins_default {
- pinctrl-single,pins = <
- AM65X_WKUP_IOPAD(0x0040, PIN_OUTPUT_PULLUP, 7) /* WKUP_GPIO0_28 */
- >;
- bootph-pre-ram;
- };
-
- mcu_uart0_pins_default: mcu_uart0_pins_default {
- pinctrl-single,pins = <
- AM65X_WKUP_IOPAD(0x0044, PIN_INPUT, 4) /* (P4) MCU_OSPI1_D1.MCU_UART0_RXD */
- AM65X_WKUP_IOPAD(0x0048, PIN_OUTPUT, 4) /* (P5) MCU_OSPI1_D2.MCU_UART0_TXD */
- AM65X_WKUP_IOPAD(0x004C, PIN_INPUT, 4) /* (P1) MCU_OSPI1_D3.MCU_UART0_CTSn */
- AM65X_WKUP_IOPAD(0x0054, PIN_OUTPUT, 4) /* (N3) MCU_OSPI1_CSn1.MCU_UART0_RTSn */
- >;
- bootph-pre-ram;
- };
-
- wkup_i2c0_pins_default: wkup-i2c0-pins-default {
- pinctrl-single,pins = <
- AM65X_WKUP_IOPAD(0x00e0, PIN_INPUT, 0) /* (AC7) WKUP_I2C0_SCL */
- AM65X_WKUP_IOPAD(0x00e4, PIN_INPUT, 0) /* (AD6) WKUP_I2C0_SDA */
- >;
- };
-
- mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-pins_default {
- pinctrl-single,pins = <
- AM65X_WKUP_IOPAD(0x0000, PIN_OUTPUT, 0) /* (V1) MCU_OSPI0_CLK */
- AM65X_WKUP_IOPAD(0x0008, PIN_INPUT, 0) /* (U2) MCU_OSPI0_DQS */
- AM65X_WKUP_IOPAD(0x000c, PIN_INPUT, 0) /* (U4) MCU_OSPI0_D0 */
- AM65X_WKUP_IOPAD(0x0010, PIN_INPUT, 0) /* (U5) MCU_OSPI0_D1 */
- AM65X_WKUP_IOPAD(0x0014, PIN_INPUT, 0) /* (T2) MCU_OSPI0_D2 */
- AM65X_WKUP_IOPAD(0x0018, PIN_INPUT, 0) /* (T3) MCU_OSPI0_D3 */
- AM65X_WKUP_IOPAD(0x001c, PIN_INPUT, 0) /* (T4) MCU_OSPI0_D4 */
- AM65X_WKUP_IOPAD(0x0020, PIN_INPUT, 0) /* (T5) MCU_OSPI0_D5 */
- AM65X_WKUP_IOPAD(0x0024, PIN_INPUT, 0) /* (R2) MCU_OSPI0_D6 */
- AM65X_WKUP_IOPAD(0x0028, PIN_INPUT, 0) /* (R3) MCU_OSPI0_D7 */
- AM65X_WKUP_IOPAD(0x002c, PIN_OUTPUT, 0) /* (R4) MCU_OSPI0_CSn0 */
- >;
- };
-};
-
-&main_pmx0 {
- bootph-pre-ram;
- main_uart0_pins_default: main-uart0-pins-default {
- pinctrl-single,pins = <
- AM65X_IOPAD(0x01e4, PIN_INPUT, 0) /* (AF11) UART0_RXD */
- AM65X_IOPAD(0x01e8, PIN_OUTPUT, 0) /* (AE11) UART0_TXD */
- AM65X_IOPAD(0x01ec, PIN_INPUT, 0) /* (AG11) UART0_CTSn */
- AM65X_IOPAD(0x01f0, PIN_OUTPUT, 0) /* (AD11) UART0_RTSn */
- >;
- bootph-pre-ram;
- };
-
- main_mmc0_pins_default: main_mmc0_pins_default {
- pinctrl-single,pins = <
- AM65X_IOPAD(0x01a8, PIN_INPUT_PULLDOWN, 0) /* (B25) MMC0_CLK */
- AM65X_IOPAD(0x01aC, PIN_INPUT_PULLUP, 0) /* (B27) MMC0_CMD */
- AM65X_IOPAD(0x01a4, PIN_INPUT_PULLUP, 0) /* (A26) MMC0_DAT0 */
- AM65X_IOPAD(0x01a0, PIN_INPUT_PULLUP, 0) /* (E25) MMC0_DAT1 */
- AM65X_IOPAD(0x019c, PIN_INPUT_PULLUP, 0) /* (C26) MMC0_DAT2 */
- AM65X_IOPAD(0x0198, PIN_INPUT_PULLUP, 0) /* (A25) MMC0_DAT3 */
- AM65X_IOPAD(0x0194, PIN_INPUT_PULLUP, 0) /* (E24) MMC0_DAT4 */
- AM65X_IOPAD(0x0190, PIN_INPUT_PULLUP, 0) /* (A24) MMC0_DAT5 */
- AM65X_IOPAD(0x018c, PIN_INPUT_PULLUP, 0) /* (B26) MMC0_DAT6 */
- AM65X_IOPAD(0x0188, PIN_INPUT_PULLUP, 0) /* (D25) MMC0_DAT7 */
- AM65X_IOPAD(0x01b0, PIN_INPUT, 0) /* (C25) MMC0_DS */
- >;
- bootph-pre-ram;
- };
-
- main_mmc1_pins_default: main_mmc1_pins_default {
- pinctrl-single,pins = <
- AM65X_IOPAD(0x02d4, PIN_INPUT_PULLDOWN, 0) /* (C27) MMC1_CLK */
- AM65X_IOPAD(0x02d8, PIN_INPUT_PULLUP, 0) /* (C28) MMC1_CMD */
- AM65X_IOPAD(0x02d0, PIN_INPUT_PULLUP, 0) /* (D28) MMC1_DAT0 */
- AM65X_IOPAD(0x02cc, PIN_INPUT_PULLUP, 0) /* (E27) MMC1_DAT1 */
- AM65X_IOPAD(0x02c8, PIN_INPUT_PULLUP, 0) /* (D26) MMC1_DAT2 */
- AM65X_IOPAD(0x02c4, PIN_INPUT_PULLUP, 0) /* (D27) MMC1_DAT3 */
- AM65X_IOPAD(0x02dc, PIN_INPUT_PULLUP, 0) /* (B24) MMC1_SDCD */
- AM65X_IOPAD(0x02e0, PIN_INPUT, 0) /* (C24) MMC1_SDWP */
- >;
- bootph-pre-ram;
- };
};
&memorycontroller {
vtt-supply = <&vtt_supply>;
- pinctrl-names = "default";
- pinctrl-0 = <&wkup_vtt_pins_default>;
};
+/*
+ * MMC is probed to pull in firmware, so any clock
+ * or power-domain operation will fail as we do not
+ * have the firmware running at this point. Delete the
+ * power-domain properties to avoid making calls to
+ * SYSFW before it is loaded. Public ROM has already
+ * set it up for us anyway.
+ */
&sdhci0 {
clock-names = "clk_xin";
clocks = <&clk_200mhz>;
- pinctrl-0 = <&main_mmc0_pins_default>;
/delete-property/ power-domains;
- ti,driver-strength-ohm = <50>;
};
+/*
+ * MMC is probed to pull in firmware, so any clock
+ * or power-domain operation will fail as we do not
+ * have the firmware running at this point. Delete the
+ * power-domain properties to avoid making calls to
+ * SYSFW before it is loaded. Public ROM has already
+ * set it up for us anyway.
+ */
&sdhci1 {
clock-names = "clk_xin";
clocks = <&clk_200mhz>;
- pinctrl-0 = <&main_mmc1_pins_default>;
/delete-property/ power-domains;
- ti,driver-strength-ohm = <50>;
-};
-
-&wkup_i2c0 {
- pinctrl-names = "default";
- pinctrl-0 = <&wkup_i2c0_pins_default>;
- clock-frequency = <400000>;
- bootph-pre-ram;
-
- vdd_mpu: tps62363@60 {
- compatible = "ti,tps62363";
- reg = <0x60>;
- regulator-name = "VDD_MPU";
- regulator-min-microvolt = <500000>;
- regulator-max-microvolt = <1770000>;
- regulator-always-on;
- regulator-boot-on;
- ti,vsel0-state-high;
- ti,vsel1-state-high;
- bootph-pre-ram;
- };
};
&ospi0 {
- pinctrl-names = "default";
- pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
-
reg = <0x0 0x47040000 0x0 0x100>,
<0x0 0x50000000 0x0 0x8000000>;
-
- flash@0{
- compatible = "jedec,spi-nor";
- reg = <0x0>;
- spi-tx-bus-width = <1>;
- spi-rx-bus-width = <8>;
- spi-max-frequency = <50000000>;
- cdns,tshsl-ns = <60>;
- cdns,tsd2d-ns = <60>;
- cdns,tchsh-ns = <60>;
- cdns,tslch-ns = <60>;
- cdns,read-delay = <0>;
- #address-cells = <1>;
- #size-cells = <1>;
- };
-};
-
-&main_pmx0 {
- bootph-pre-ram;
- usb0_pins_default: usb0_pins_default {
- pinctrl-single,pins = <
- AM65X_IOPAD(0x02bc, PIN_OUTPUT, 0) /* (AD9) USB0_DRVVBUS */
- >;
- bootph-pre-ram;
- };
};
&dwc3_0 {
status = "okay";
- bootph-pre-ram;
/delete-property/ clocks;
/delete-property/ power-domains;
/delete-property/ assigned-clocks;
/delete-property/ assigned-clock-parents;
};
-&usb0_phy {
- status = "okay";
- bootph-pre-ram;
- /delete-property/ clocks;
+&mcu_cpsw {
+ reg = <0x0 0x46000000 0x0 0x200000>,
+ <0x0 0x40f00200 0x0 0x2>;
+ reg-names = "cpsw_nuss", "mac_efuse";
+ /delete-property/ ranges;
+
+ cpsw-phy-sel@40f04040 {
+ compatible = "ti,am654-cpsw-phy-sel";
+ reg= <0x0 0x40f04040 0x0 0x4>;
+ reg-names = "gmii-sel";
+ };
};
-&usb0 {
- pinctrl-names = "default";
- pinctrl-0 = <&usb0_pins_default>;
+&usb1 {
dr_mode = "peripheral";
- bootph-pre-ram;
-};
-
-&scm_conf {
- bootph-pre-ram;
};
diff --git a/arch/arm/dts/k3-am654.dtsi b/arch/arm/dts/k3-am654.dtsi
index f0a6541..888567b 100644
--- a/arch/arm/dts/k3-am654.dtsi
+++ b/arch/arm/dts/k3-am654.dtsi
@@ -93,6 +93,7 @@
L2_0: l2-cache0 {
compatible = "cache";
cache-level = <2>;
+ cache-unified;
cache-size = <0x80000>;
cache-line-size = <64>;
cache-sets = <512>;
@@ -102,6 +103,7 @@
L2_1: l2-cache1 {
compatible = "cache";
cache-level = <2>;
+ cache-unified;
cache-size = <0x80000>;
cache-line-size = <64>;
cache-sets = <512>;
@@ -111,5 +113,10 @@
msmc_l3: l3-cache0 {
compatible = "cache";
cache-level = <3>;
+ cache-unified;
+ };
+
+ thermal_zones: thermal-zones {
+ #include "k3-am654-industrial-thermal.dtsi"
};
};
diff --git a/arch/arm/dts/k3-am6548-iot2050-advanced-common.dtsi b/arch/arm/dts/k3-am6548-iot2050-advanced-common.dtsi
index d25e8b2..be55494 100644
--- a/arch/arm/dts/k3-am6548-iot2050-advanced-common.dtsi
+++ b/arch/arm/dts/k3-am6548-iot2050-advanced-common.dtsi
@@ -22,7 +22,7 @@
};
&main_pmx0 {
- main_mmc0_pins_default: main-mmc0-pins-default {
+ main_mmc0_pins_default: main-mmc0-default-pins {
pinctrl-single,pins = <
AM65X_IOPAD(0x01a8, PIN_INPUT_PULLDOWN, 0) /* (B25) MMC0_CLK */
AM65X_IOPAD(0x01ac, PIN_INPUT_PULLUP, 0) /* (B27) MMC0_CMD */
@@ -50,7 +50,3 @@
ti,driver-strength-ohm = <50>;
disable-wp;
};
-
-&main_uart0 {
- status = "disabled";
-};
diff --git a/arch/arm/dts/k3-am6548-iot2050-advanced-m2.dts b/arch/arm/dts/k3-am6548-iot2050-advanced-m2.dts
index 9400e35..774eb14 100644
--- a/arch/arm/dts/k3-am6548-iot2050-advanced-m2.dts
+++ b/arch/arm/dts/k3-am6548-iot2050-advanced-m2.dts
@@ -27,26 +27,26 @@
};
&main_pmx0 {
- main_m2_enable_pins_default: main-m2-enable-pins-default {
+ main_m2_enable_pins_default: main-m2-enable-default-pins {
pinctrl-single,pins = <
AM65X_IOPAD(0x01c4, PIN_INPUT_PULLUP, 7) /* (AH13) GPIO1_17 */
>;
};
- main_bkey_pcie_reset: main-bkey-pcie-reset {
+ main_bkey_pcie_reset: main-bkey-pcie-reset-default-pins {
pinctrl-single,pins = <
AM65X_IOPAD(0x01bc, PIN_OUTPUT_PULLUP, 7) /* (AG13) GPIO1_15 */
>;
};
- main_pmx0_m2_config_pins_default: main-pmx0-m2-config-pins-default {
+ main_pmx0_m2_config_pins_default: main-pmx0-m2-config-default-pins {
pinctrl-single,pins = <
AM65X_IOPAD(0x01c8, PIN_INPUT_PULLUP, 7) /* (AE13) GPIO1_18 */
AM65X_IOPAD(0x01cc, PIN_INPUT_PULLUP, 7) /* (AD13) GPIO1_19 */
>;
};
- main_m2_pcie_mux_control: main-m2-pcie-mux-control {
+ main_m2_pcie_mux_control: main-m2-pcie-mux-control-default-pins {
pinctrl-single,pins = <
AM65X_IOPAD(0x0148, PIN_INPUT_PULLUP, 7) /* (AG22) GPIO0_82 */
AM65X_IOPAD(0x0160, PIN_INPUT_PULLUP, 7) /* (AE20) GPIO0_88 */
@@ -56,7 +56,7 @@
};
&main_pmx1 {
- main_pmx1_m2_config_pins_default: main-pmx1-m2-config-pins-default {
+ main_pmx1_m2_config_pins_default: main-pmx1-m2-config-default-pins {
pinctrl-single,pins = <
AM65X_IOPAD(0x0018, PIN_INPUT_PULLUP, 7) /* (B22) GPIO1_88 */
AM65X_IOPAD(0x001c, PIN_INPUT_PULLUP, 7) /* (C23) GPIO1_89 */
@@ -66,20 +66,18 @@
&main_gpio0 {
pinctrl-names = "default";
- pinctrl-0 = <
- &main_m2_pcie_mux_control
- &arduino_io_d4_to_d9_pins_default
- >;
+ pinctrl-0 =
+ <&main_m2_pcie_mux_control>,
+ <&arduino_io_d4_to_d9_pins_default>;
};
&main_gpio1 {
pinctrl-names = "default";
- pinctrl-0 = <
- &main_m2_enable_pins_default
- &main_pmx0_m2_config_pins_default
- &main_pmx1_m2_config_pins_default
- &cp2102n_reset_pin_default
- >;
+ pinctrl-0 =
+ <&main_m2_enable_pins_default>,
+ <&main_pmx0_m2_config_pins_default>,
+ <&main_pmx1_m2_config_pins_default>,
+ <&cp2102n_reset_pin_default>;
};
/*
diff --git a/arch/arm/dts/k3-am65x-binman.dtsi b/arch/arm/dts/k3-am65x-binman.dtsi
index 59605ca..8cc24da 100644
--- a/arch/arm/dts/k3-am65x-binman.dtsi
+++ b/arch/arm/dts/k3-am65x-binman.dtsi
@@ -42,77 +42,7 @@
};
itb {
filename = "sysfw-am65x_sr2-hs-evm.itb";
- fit {
- description = "SYSFW and Config fragments";
- #address-cells = <1>;
- images {
- sysfw.bin {
- description = "sysfw";
- type = "firmware";
- arch = "arm";
- compression = "none";
- blob-ext {
- filename = "sysfw.bin";
- };
- };
- board-cfg.bin {
- description = "board-cfg";
- type = "firmware";
- arch = "arm";
- compression = "none";
- ti-secure {
- content = <&board_cfg>;
- keyfile = "custMpk.pem";
- };
- board_cfg: board-cfg {
- filename = "board-cfg.bin";
- type = "blob-ext";
- };
- };
- pm-cfg.bin {
- description = "pm-cfg";
- type = "firmware";
- arch = "arm";
- compression = "none";
- ti-secure {
- content = <&pm_cfg>;
- keyfile = "custMpk.pem";
- };
- pm_cfg: pm-cfg {
- filename = "pm-cfg.bin";
- type = "blob-ext";
- };
- };
- rm-cfg.bin {
- description = "rm-cfg";
- type = "firmware";
- arch = "arm";
- compression = "none";
- ti-secure {
- content = <&rm_cfg>;
- keyfile = "custMpk.pem";\
- };
- rm_cfg: rm-cfg {
- filename = "rm-cfg.bin";
- type = "blob-ext";
- };
- };
- sec-cfg.bin {
- description = "sec-cfg";
- type = "firmware";
- arch = "arm";
- compression = "none";
- ti-secure {
- content = <&sec_cfg>;
- keyfile = "custMpk.pem";
- };
- sec_cfg: sec-cfg {
- filename = "sec-cfg.bin";
- type = "blob-ext";
- };
- };
- };
- };
+ insert-template = <&itb_template>;
};
};
@@ -149,55 +79,14 @@
itb_gp {
filename = "sysfw-am65x_sr2-gp-evm.itb";
symlink = "sysfw.itb";
+ insert-template = <&itb_unsigned_template>;
fit {
- description = "SYSFW and Config fragments";
- #address-cells = <1>;
images {
sysfw.bin {
- description = "sysfw";
- type = "firmware";
- arch = "arm";
- compression = "none";
blob-ext {
filename = "sysfw.bin_gp";
};
};
- board-cfg.bin {
- description = "board-cfg";
- type = "firmware";
- arch = "arm";
- compression = "none";
- blob-ext {
- filename = "board-cfg.bin";
- };
- };
- pm-cfg.bin {
- description = "pm-cfg";
- type = "firmware";
- arch = "arm";
- compression = "none";
- blob-ext {
- filename = "pm-cfg.bin";
- };
- };
- rm-cfg.bin {
- description = "rm-cfg";
- type = "firmware";
- arch = "arm";
- compression = "none";
- blob-ext {
- filename = "rm-cfg.bin";
- };
- };
- sec-cfg.bin {
- description = "sec-cfg";
- type = "firmware";
- arch = "arm";
- compression = "none";
- blob-ext {
- filename = "sec-cfg.bin";
- };
- };
};
};
};
@@ -206,86 +95,22 @@
#ifdef CONFIG_TARGET_AM654_A53_EVM
-#define SPL_NODTB "spl/u-boot-spl-nodtb.bin"
#define SPL_AM654_EVM_DTB "spl/dts/k3-am654-base-board.dtb"
-
-#define UBOOT_NODTB "u-boot-nodtb.bin"
#define AM654_EVM_DTB "u-boot.dtb"
&binman {
ti-spl {
- filename = "tispl.bin";
- pad-byte = <0xff>;
+ insert-template = <&ti_spl_template>;
fit {
- description = "Configuration to load ATF and SPL";
- #address-cells = <1>;
-
images {
- atf {
- description = "ARM Trusted Firmware";
- type = "firmware";
- arch = "arm64";
- compression = "none";
- os = "arm-trusted-firmware";
- load = <CONFIG_K3_ATF_LOAD_ADDR>;
- entry = <CONFIG_K3_ATF_LOAD_ADDR>;
- ti-secure {
- content = <&atf>;
- keyfile = "custMpk.pem";
- };
- atf: atf-bl31 {
- };
- };
-
- tee {
- description = "OP-TEE";
- type = "tee";
- arch = "arm64";
- compression = "none";
- os = "tee";
- load = <0x9e800000>;
- entry = <0x9e800000>;
- ti-secure {
- content = <&tee>;
- keyfile = "custMpk.pem";
- };
- tee: tee-os {
- };
- };
-
dm {
- description = "DM binary";
- type = "firmware";
- arch = "arm32";
- compression = "none";
- os = "DM";
- load = <0x89000000>;
- entry = <0x89000000>;
blob-ext {
filename = "/dev/null";
};
};
- spl {
- description = "SPL (64-bit)";
- type = "standalone";
- os = "U-Boot";
- arch = "arm64";
- compression = "none";
- load = <CONFIG_SPL_TEXT_BASE>;
- entry = <CONFIG_SPL_TEXT_BASE>;
- ti-secure {
- content = <&u_boot_spl_nodtb>;
- keyfile = "custMpk.pem";
-
- };
- u_boot_spl_nodtb: blob-ext {
- filename = SPL_NODTB;
- };
- };
-
fdt-0 {
description = "k3-am654-base-board";
type = "flat_dt";
@@ -317,29 +142,12 @@
&binman {
u-boot {
- filename = "u-boot.img";
- pad-byte = <0xff>;
+ insert-template = <&u_boot_template>;
fit {
- description = "FIT image with multiple configurations";
-
images {
uboot {
- description = "U-Boot for AM65 board";
- type = "firmware";
- os = "u-boot";
- arch = "arm";
- compression = "none";
- load = <CONFIG_TEXT_BASE>;
- ti-secure {
- content = <&u_boot_nodtb>;
- keyfile = "custMpk.pem";
- };
- u_boot_nodtb: u-boot-nodtb {
- };
- hash {
- algo = "crc32";
- };
+ description = "U-Boot for AM65 Board";
};
fdt-0 {
@@ -378,67 +186,16 @@
&binman {
ti-spl_unsigned {
- filename = "tispl.bin_unsigned";
- pad-byte = <0xff>;
+ insert-template = <&ti_spl_unsigned_template>;
fit {
- description = "Configuration to load ATF and SPL";
- #address-cells = <1>;
-
images {
-
- atf {
- description = "ARM Trusted Firmware";
- type = "firmware";
- arch = "arm64";
- compression = "none";
- os = "arm-trusted-firmware";
- load = <CONFIG_K3_ATF_LOAD_ADDR>;
- entry = <CONFIG_K3_ATF_LOAD_ADDR>;
- atf-bl31 {
- filename = "bl31.bin";
- };
- };
-
- tee {
- description = "OP-TEE";
- type = "tee";
- arch = "arm64";
- compression = "none";
- os = "tee";
- load = <0x9e800000>;
- entry = <0x9e800000>;
- tee-os {
- filename = "tee-raw.bin";
- };
- };
-
dm {
- description = "DM binary";
- type = "firmware";
- arch = "arm32";
- compression = "none";
- os = "DM";
- load = <0x89000000>;
- entry = <0x89000000>;
blob-ext {
filename = "/dev/null";
};
};
- spl {
- description = "SPL (64-bit)";
- type = "standalone";
- os = "U-Boot";
- arch = "arm64";
- compression = "none";
- load = <CONFIG_SPL_TEXT_BASE>;
- entry = <CONFIG_SPL_TEXT_BASE>;
- blob-ext {
- filename = SPL_NODTB;
- };
- };
-
fdt-0 {
description = "k3-j721e-common-proc-board";
type = "flat_dt";
@@ -466,26 +223,12 @@
&binman {
u-boot_unsigned {
- filename = "u-boot.img_unsigned";
- pad-byte = <0xff>;
+ insert-template = <&u_boot_unsigned_template>;
fit {
- description = "FIT image with multiple configurations";
-
images {
uboot {
- description = "U-Boot for AM65 board";
- type = "firmware";
- os = "u-boot";
- arch = "arm";
- compression = "none";
- load = <CONFIG_TEXT_BASE>;
- blob {
- filename = UBOOT_NODTB;
- };
- hash {
- algo = "crc32";
- };
+ description = "U-Boot for AM65 Board";
};
fdt-0 {
diff --git a/arch/arm/dts/k3-am68-sk-base-board.dts b/arch/arm/dts/k3-am68-sk-base-board.dts
index 5df5946..1e1a82f 100644
--- a/arch/arm/dts/k3-am68-sk-base-board.dts
+++ b/arch/arm/dts/k3-am68-sk-base-board.dts
@@ -553,3 +553,59 @@
};
};
};
+
+&serdes_ln_ctrl {
+ idle-states = <J721S2_SERDES0_LANE0_PCIE1_LANE0>, <J721S2_SERDES0_LANE1_PCIE1_LANE1>,
+ <J721S2_SERDES0_LANE2_USB_SWAP>, <J721S2_SERDES0_LANE3_USB>;
+};
+
+&serdes_refclk {
+ clock-frequency = <100000000>;
+};
+
+&serdes0 {
+ status = "okay";
+
+ serdes0_pcie_link: phy@0 {
+ reg = <0>;
+ cdns,num-lanes = <2>;
+ #phy-cells = <0>;
+ cdns,phy-type = <PHY_TYPE_PCIE>;
+ resets = <&serdes_wiz0 1>, <&serdes_wiz0 2>;
+ };
+
+ serdes0_usb_link: phy@2 {
+ status = "okay";
+ reg = <2>;
+ cdns,num-lanes = <1>;
+ #phy-cells = <0>;
+ cdns,phy-type = <PHY_TYPE_USB3>;
+ resets = <&serdes_wiz0 3>;
+ };
+};
+
+&pcie1_rc {
+ status = "okay";
+ reset-gpios = <&exp1 10 GPIO_ACTIVE_HIGH>;
+ phys = <&serdes0_pcie_link>;
+ phy-names = "pcie-phy";
+ num-lanes = <2>;
+};
+
+&usb_serdes_mux {
+ idle-states = <0>; /* USB0 to SERDES lane 2 */
+};
+
+&usbss0 {
+ status = "okay";
+ pinctrl-0 = <&main_usbss0_pins_default>;
+ pinctrl-names = "default";
+ ti,vbus-divider;
+};
+
+&usb0 {
+ dr_mode = "host";
+ maximum-speed = "super-speed";
+ phys = <&serdes0_usb_link>;
+ phy-names = "cdns3,usb3-phy";
+};
diff --git a/arch/arm/dts/k3-am68-sk-som.dtsi b/arch/arm/dts/k3-am68-sk-som.dtsi
index 6c9139f..20861a0 100644
--- a/arch/arm/dts/k3-am68-sk-som.dtsi
+++ b/arch/arm/dts/k3-am68-sk-som.dtsi
@@ -25,6 +25,108 @@
reg = <0x00 0x9e800000 0x00 0x01800000>;
no-map;
};
+
+ mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa0000000 0x00 0x100000>;
+ no-map;
+ };
+
+ mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa0100000 0x00 0xf00000>;
+ no-map;
+ };
+
+ mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa1000000 0x00 0x100000>;
+ no-map;
+ };
+
+ mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa1100000 0x00 0xf00000>;
+ no-map;
+ };
+
+ main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a2000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa2000000 0x00 0x100000>;
+ no-map;
+ };
+
+ main_r5fss0_core0_memory_region: r5f-memory@a2100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa2100000 0x00 0xf00000>;
+ no-map;
+ };
+
+ main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a3000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa3000000 0x00 0x100000>;
+ no-map;
+ };
+
+ main_r5fss0_core1_memory_region: r5f-memory@a3100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa3100000 0x00 0xf00000>;
+ no-map;
+ };
+
+ main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a4000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa4000000 0x00 0x100000>;
+ no-map;
+ };
+
+ main_r5fss1_core0_memory_region: r5f-memory@a4100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa4100000 0x00 0xf00000>;
+ no-map;
+ };
+
+ main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a5000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa5000000 0x00 0x100000>;
+ no-map;
+ };
+
+ main_r5fss1_core1_memory_region: r5f-memory@a5100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa5100000 0x00 0xf00000>;
+ no-map;
+ };
+
+ c71_0_dma_memory_region: c71-dma-memory@a6000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa6000000 0x00 0x100000>;
+ no-map;
+ };
+
+ c71_0_memory_region: c71-memory@a6100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa6100000 0x00 0xf00000>;
+ no-map;
+ };
+
+ c71_1_dma_memory_region: c71-dma-memory@a7000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa7000000 0x00 0x100000>;
+ no-map;
+ };
+
+ c71_1_memory_region: c71-memory@a7100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa7100000 0x00 0xf00000>;
+ no-map;
+ };
+
+ rtos_ipc_memory_region: ipc-memories@a8000000 {
+ reg = <0x00 0xa8000000 0x00 0x01c00000>;
+ alignment = <0x1000>;
+ no-map;
+ };
};
};
@@ -49,3 +151,109 @@
reg = <0x51>;
};
};
+
+&mailbox0_cluster0 {
+ status = "okay";
+ interrupts = <436>;
+ mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
+ ti,mbox-rx = <0 0 0>;
+ ti,mbox-tx = <1 0 0>;
+ };
+
+ mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
+ ti,mbox-rx = <2 0 0>;
+ ti,mbox-tx = <3 0 0>;
+ };
+};
+
+&mailbox0_cluster1 {
+ status = "okay";
+ interrupts = <432>;
+ mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
+ ti,mbox-rx = <0 0 0>;
+ ti,mbox-tx = <1 0 0>;
+ };
+
+ mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
+ ti,mbox-rx = <2 0 0>;
+ ti,mbox-tx = <3 0 0>;
+ };
+};
+
+&mailbox0_cluster2 {
+ status = "okay";
+ interrupts = <428>;
+ mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {
+ ti,mbox-rx = <0 0 0>;
+ ti,mbox-tx = <1 0 0>;
+ };
+
+ mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {
+ ti,mbox-rx = <2 0 0>;
+ ti,mbox-tx = <3 0 0>;
+ };
+};
+
+&mailbox0_cluster4 {
+ status = "okay";
+ interrupts = <420>;
+ mbox_c71_0: mbox-c71-0 {
+ ti,mbox-rx = <0 0 0>;
+ ti,mbox-tx = <1 0 0>;
+ };
+
+ mbox_c71_1: mbox-c71-1 {
+ ti,mbox-rx = <2 0 0>;
+ ti,mbox-tx = <3 0 0>;
+ };
+};
+
+&mcu_r5fss0_core0 {
+ mboxes = <&mailbox0_cluster0>, <&mbox_mcu_r5fss0_core0>;
+ memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
+ <&mcu_r5fss0_core0_memory_region>;
+};
+
+&mcu_r5fss0_core1 {
+ mboxes = <&mailbox0_cluster0>, <&mbox_mcu_r5fss0_core1>;
+ memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
+ <&mcu_r5fss0_core1_memory_region>;
+};
+
+&main_r5fss0_core0 {
+ mboxes = <&mailbox0_cluster1>, <&mbox_main_r5fss0_core0>;
+ memory-region = <&main_r5fss0_core0_dma_memory_region>,
+ <&main_r5fss0_core0_memory_region>;
+};
+
+&main_r5fss0_core1 {
+ mboxes = <&mailbox0_cluster1>, <&mbox_main_r5fss0_core1>;
+ memory-region = <&main_r5fss0_core1_dma_memory_region>,
+ <&main_r5fss0_core1_memory_region>;
+};
+
+&main_r5fss1_core0 {
+ mboxes = <&mailbox0_cluster2>, <&mbox_main_r5fss1_core0>;
+ memory-region = <&main_r5fss1_core0_dma_memory_region>,
+ <&main_r5fss1_core0_memory_region>;
+};
+
+&main_r5fss1_core1 {
+ mboxes = <&mailbox0_cluster2>, <&mbox_main_r5fss1_core1>;
+ memory-region = <&main_r5fss1_core1_dma_memory_region>,
+ <&main_r5fss1_core1_memory_region>;
+};
+
+&c71_0 {
+ status = "okay";
+ mboxes = <&mailbox0_cluster4>, <&mbox_c71_0>;
+ memory-region = <&c71_0_dma_memory_region>,
+ <&c71_0_memory_region>;
+};
+
+&c71_1 {
+ status = "okay";
+ mboxes = <&mailbox0_cluster4>, <&mbox_c71_1>;
+ memory-region = <&c71_1_dma_memory_region>,
+ <&c71_1_memory_region>;
+};
diff --git a/arch/arm/dts/k3-binman.dtsi b/arch/arm/dts/k3-binman.dtsi
index 3ab771f..758c8bf 100644
--- a/arch/arm/dts/k3-binman.dtsi
+++ b/arch/arm/dts/k3-binman.dtsi
@@ -3,6 +3,8 @@
* Copyright (C) 2022-2023 Texas Instruments Incorporated - https://www.ti.com/
*/
+#include "k3-security.h"
+
/ {
binman: binman {
multiple-images;
@@ -32,28 +34,28 @@
filename = "board-cfg.bin";
bcfg_yaml: ti-board-config {
config = "board-cfg.yaml";
- schema = "board/ti/common/schema.yaml";
+ schema = "arch/arm/mach-k3/schema.yaml";
};
};
pm-cfg {
filename = "pm-cfg.bin";
pcfg_yaml: ti-board-config {
config = "pm-cfg.yaml";
- schema = "board/ti/common/schema.yaml";
+ schema = "arch/arm/mach-k3/schema.yaml";
};
};
rm-cfg {
filename = "rm-cfg.bin";
rcfg_yaml: ti-board-config {
config = "rm-cfg.yaml";
- schema = "board/ti/common/schema.yaml";
+ schema = "arch/arm/mach-k3/schema.yaml";
};
};
sec-cfg {
filename = "sec-cfg.bin";
scfg_yaml: ti-board-config {
config = "sec-cfg.yaml";
- schema = "board/ti/common/schema.yaml";
+ schema = "arch/arm/mach-k3/schema.yaml";
};
};
combined-tifs-cfg {
@@ -61,19 +63,19 @@
ti-board-config {
bcfg_yaml_tifs: board-cfg {
config = "board-cfg.yaml";
- schema = "board/ti/common/schema.yaml";
+ schema = "arch/arm/mach-k3/schema.yaml";
};
scfg_yaml_tifs: sec-cfg {
config = "sec-cfg.yaml";
- schema = "board/ti/common/schema.yaml";
+ schema = "arch/arm/mach-k3/schema.yaml";
};
pcfg_yaml_tifs: pm-cfg {
config = "pm-cfg.yaml";
- schema = "board/ti/common/schema.yaml";
+ schema = "arch/arm/mach-k3/schema.yaml";
};
rcfg_yaml_tifs: rm-cfg {
config = "rm-cfg.yaml";
- schema = "board/ti/common/schema.yaml";
+ schema = "arch/arm/mach-k3/schema.yaml";
};
};
};
@@ -82,11 +84,11 @@
ti-board-config {
pcfg_yaml_dm: pm-cfg {
config = "pm-cfg.yaml";
- schema = "board/ti/common/schema.yaml";
+ schema = "arch/arm/mach-k3/schema.yaml";
};
rcfg_yaml_dm: rm-cfg {
config = "rm-cfg.yaml";
- schema = "board/ti/common/schema.yaml";
+ schema = "arch/arm/mach-k3/schema.yaml";
};
};
};
@@ -95,22 +97,396 @@
ti-board-config {
bcfg_yaml_sysfw: board-cfg {
config = "board-cfg.yaml";
- schema = "board/ti/common/schema.yaml";
+ schema = "arch/arm/mach-k3/schema.yaml";
};
scfg_yaml_sysfw: sec-cfg {
config = "sec-cfg.yaml";
- schema = "board/ti/common/schema.yaml";
+ schema = "arch/arm/mach-k3/schema.yaml";
};
pcfg_yaml_sysfw: pm-cfg {
config = "pm-cfg.yaml";
- schema = "board/ti/common/schema.yaml";
+ schema = "arch/arm/mach-k3/schema.yaml";
};
rcfg_yaml_sysfw: rm-cfg {
config = "rm-cfg.yaml";
- schema = "board/ti/common/schema.yaml";
+ schema = "arch/arm/mach-k3/schema.yaml";
};
};
};
};
+&binman {
+ itb_template: template-5 {
+ fit {
+ description = "SYSFW and Config fragments";
+ #address-cells = <1>;
+ images {
+ sysfw.bin {
+ description = "sysfw";
+ type = "firmware";
+ arch = "arm";
+ compression = "none";
+ blob-ext {
+ filename = "sysfw.bin";
+ };
+ };
+ board-cfg.bin {
+ description = "board-cfg";
+ type = "firmware";
+ arch = "arm";
+ compression = "none";
+ ti-secure {
+ content = <&board_cfg>;
+ keyfile = "custMpk.pem";
+ };
+ board_cfg: board-cfg {
+ filename = "board-cfg.bin";
+ type = "blob-ext";
+ };
+
+ };
+ pm-cfg.bin {
+ description = "pm-cfg";
+ type = "firmware";
+ arch = "arm";
+ compression = "none";
+ ti-secure {
+ content = <&pm_cfg>;
+ keyfile = "custMpk.pem";
+ };
+ pm_cfg: pm-cfg {
+ filename = "pm-cfg.bin";
+ type = "blob-ext";
+ };
+ };
+ rm-cfg.bin {
+ description = "rm-cfg";
+ type = "firmware";
+ arch = "arm";
+ compression = "none";
+ ti-secure {
+ content = <&rm_cfg>;
+ keyfile = "custMpk.pem";
+ };
+ rm_cfg: rm-cfg {
+ filename = "rm-cfg.bin";
+ type = "blob-ext";
+ };
+ };
+ sec-cfg.bin {
+ description = "sec-cfg";
+ type = "firmware";
+ arch = "arm";
+ compression = "none";
+ ti-secure {
+ content = <&sec_cfg>;
+ keyfile = "custMpk.pem";
+ };
+ sec_cfg: sec-cfg {
+ filename = "sec-cfg.bin";
+ type = "blob-ext";
+ };
+ };
+ };
+ };
+ };
+
+ itb_unsigned_template: template-6 {
+ fit {
+ description = "SYSFW and Config fragments";
+ #address-cells = <1>;
+ images {
+ sysfw.bin {
+ description = "sysfw";
+ type = "firmware";
+ arch = "arm";
+ compression = "none";
+ blob-ext {
+ filename = "sysfw.bin_fs";
+ };
+ };
+ board-cfg.bin {
+ description = "board-cfg";
+ type = "firmware";
+ arch = "arm";
+ compression = "none";
+ board-cfg {
+ filename = "board-cfg.bin";
+ type = "blob-ext";
+ };
+
+ };
+ pm-cfg.bin {
+ description = "pm-cfg";
+ type = "firmware";
+ arch = "arm";
+ compression = "none";
+ pm-cfg {
+ filename = "pm-cfg.bin";
+ type = "blob-ext";
+ };
+ };
+ rm-cfg.bin {
+ description = "rm-cfg";
+ type = "firmware";
+ arch = "arm";
+ compression = "none";
+ rm-cfg {
+ filename = "rm-cfg.bin";
+ type = "blob-ext";
+ };
+ };
+ sec-cfg.bin {
+ description = "sec-cfg";
+ type = "firmware";
+ arch = "arm";
+ compression = "none";
+ sec-cfg {
+ filename = "sec-cfg.bin";
+ type = "blob-ext";
+ };
+ };
+ };
+ };
+ };
+};
+
+#else
+
+&binman {
+ ti_spl_template: template-1 {
+ filename = "tispl.bin";
+ pad-byte = <0xff>;
+
+ fit {
+ description = "Configuration to load ATF and SPL";
+ #address-cells = <1>;
+
+ images {
+
+ atf {
+ description = "ARM Trusted Firmware";
+ type = "firmware";
+ arch = "arm64";
+ compression = "none";
+ os = "arm-trusted-firmware";
+ load = <CONFIG_K3_ATF_LOAD_ADDR>;
+ entry = <CONFIG_K3_ATF_LOAD_ADDR>;
+ ti-secure {
+ content = <&atf>;
+ keyfile = "custMpk.pem";
+ };
+ atf: atf-bl31 {
+ };
+ };
+
+ tee {
+ description = "OP-TEE";
+ type = "tee";
+ arch = "arm64";
+ compression = "none";
+ os = "tee";
+ load = <0x9e800000>;
+ entry = <0x9e800000>;
+ ti-secure {
+ content = <&tee>;
+ keyfile = "custMpk.pem";
+ };
+ tee: tee-os {
+ };
+ };
+
+ dm {
+ description = "DM binary";
+ type = "firmware";
+ arch = "arm32";
+ compression = "none";
+ os = "DM";
+ load = <0x89000000>;
+ entry = <0x89000000>;
+ };
+
+ spl {
+ description = "SPL (64-bit)";
+ type = "standalone";
+ os = "U-Boot";
+ arch = "arm64";
+ compression = "none";
+ load = <CONFIG_SPL_TEXT_BASE>;
+ entry = <CONFIG_SPL_TEXT_BASE>;
+ ti-secure {
+ content = <&u_boot_spl_nodtb>;
+ keyfile = "custMpk.pem";
+
+ };
+ u_boot_spl_nodtb: blob-ext {
+ filename = "spl/u-boot-spl-nodtb.bin";
+ };
+ };
+
+ };
+ };
+ };
+ ti_spl_unsigned_template: template-2 {
+ filename = "tispl.bin_unsigned";
+ pad-byte = <0xff>;
+
+ fit {
+ description = "Configuration to load ATF and SPL";
+ #address-cells = <1>;
+
+ images {
+
+ atf {
+ description = "ARM Trusted Firmware";
+ type = "firmware";
+ arch = "arm64";
+ compression = "none";
+ os = "arm-trusted-firmware";
+ load = <CONFIG_K3_ATF_LOAD_ADDR>;
+ entry = <CONFIG_K3_ATF_LOAD_ADDR>;
+ atf-bl31 {
+ filename = "bl31.bin";
+ };
+ };
+
+ tee {
+ description = "OP-TEE";
+ type = "tee";
+ arch = "arm64";
+ compression = "none";
+ os = "tee";
+ load = <0x9e800000>;
+ entry = <0x9e800000>;
+ tee-os {
+ filename = "tee-raw.bin";
+ };
+ };
+
+ dm {
+ description = "DM binary";
+ type = "firmware";
+ arch = "arm32";
+ compression = "none";
+ os = "DM";
+ load = <0x89000000>;
+ entry = <0x89000000>;
+ };
+
+ spl {
+ description = "SPL (64-bit)";
+ type = "standalone";
+ os = "U-Boot";
+ arch = "arm64";
+ compression = "none";
+ load = <CONFIG_SPL_TEXT_BASE>;
+ entry = <CONFIG_SPL_TEXT_BASE>;
+ blob-ext {
+ filename = "spl/u-boot-spl-nodtb.bin";
+ };
+ };
+ };
+ };
+ };
+ u_boot_template: template-3 {
+ filename = "u-boot.img";
+ pad-byte = <0xff>;
+
+ fit {
+ description = "FIT image with multiple configurations";
+
+ images {
+ uboot {
+ type = "firmware";
+ os = "u-boot";
+ arch = "arm";
+ compression = "none";
+ load = <CONFIG_TEXT_BASE>;
+ ti-secure {
+ content = <&u_boot_nodtb>;
+ keyfile = "custMpk.pem";
+ };
+ u_boot_nodtb: u-boot-nodtb {
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+ };
+ };
+ };
+ u_boot_unsigned_template: template-4 {
+ filename = "u-boot.img_unsigned";
+ pad-byte = <0xff>;
+
+ fit {
+ description = "FIT image with multiple configurations";
+
+ images {
+ uboot {
+ type = "firmware";
+ os = "u-boot";
+ arch = "arm";
+ compression = "none";
+ load = <CONFIG_TEXT_BASE>;
+ blob {
+ filename = "u-boot-nodtb.bin";
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+ };
+ };
+ };
+ firewall_bg_1: template-5 {
+ control = <(FWCTRL_EN | FWCTRL_LOCK |
+ FWCTRL_BG | FWCTRL_CACHE)>;
+ permissions = <((FWPRIVID_ALL << FWPRIVID_SHIFT) |
+ FWPERM_SECURE_PRIV_RWCD |
+ FWPERM_SECURE_USER_RWCD |
+ FWPERM_NON_SECURE_PRIV_RWCD |
+ FWPERM_NON_SECURE_USER_RWCD)>;
+ start_address = <0x0 0x0>;
+ end_address = <0xff 0xffffffff>;
+ };
+ firewall_bg_3: template-6 {
+ insert-template = <&firewall_bg_1>;
+ permissions = <((FWPRIVID_ALL << FWPRIVID_SHIFT) |
+ FWPERM_SECURE_PRIV_RWCD |
+ FWPERM_SECURE_USER_RWCD |
+ FWPERM_NON_SECURE_PRIV_RWCD |
+ FWPERM_NON_SECURE_USER_RWCD)>,
+ <((FWPRIVID_ALL << FWPRIVID_SHIFT) |
+ FWPERM_SECURE_PRIV_RWCD |
+ FWPERM_SECURE_USER_RWCD |
+ FWPERM_NON_SECURE_PRIV_RWCD |
+ FWPERM_NON_SECURE_USER_RWCD)>,
+ <((FWPRIVID_ALL << FWPRIVID_SHIFT) |
+ FWPERM_SECURE_PRIV_RWCD |
+ FWPERM_SECURE_USER_RWCD |
+ FWPERM_NON_SECURE_PRIV_RWCD |
+ FWPERM_NON_SECURE_USER_RWCD)>;
+ };
+ firewall_armv8_atf_fg: template-7 {
+ control = <(FWCTRL_EN | FWCTRL_LOCK |
+ FWCTRL_CACHE)>;
+ permissions = <((FWPRIVID_ARMV8 << FWPRIVID_SHIFT) |
+ FWPERM_SECURE_PRIV_RWCD |
+ FWPERM_SECURE_USER_RWCD)>;
+ start_address = <0x0 0x70000000>;
+ end_address = <0x0 0x7001ffff>;
+ };
+ firewall_armv8_optee_fg: template-8 {
+ control = <(FWCTRL_EN | FWCTRL_LOCK |
+ FWCTRL_CACHE)>;
+ permissions = <((FWPRIVID_ARMV8 << FWPRIVID_SHIFT) |
+ FWPERM_SECURE_PRIV_RWCD |
+ FWPERM_SECURE_USER_RWCD)>;
+ start_address = <0x0 0x9e800000>;
+ end_address = <0x0 0x9fffffff>;
+ };
+
+};
+
#endif
diff --git a/arch/arm/dts/k3-j7200-binman.dtsi b/arch/arm/dts/k3-j7200-binman.dtsi
index 14f7dea..06db865 100644
--- a/arch/arm/dts/k3-j7200-binman.dtsi
+++ b/arch/arm/dts/k3-j7200-binman.dtsi
@@ -180,10 +180,7 @@
#ifdef CONFIG_TARGET_J7200_A72_EVM
-#define SPL_NODTB "spl/u-boot-spl-nodtb.bin"
#define SPL_J7200_EVM_DTB "spl/dts/k3-j7200-common-proc-board.dtb"
-
-#define UBOOT_NODTB "u-boot-nodtb.bin"
#define J7200_EVM_DTB "u-boot.dtb"
&binman {
@@ -194,82 +191,110 @@
};
};
ti-spl {
- filename = "tispl.bin";
- pad-byte = <0xff>;
+ insert-template = <&ti_spl_template>;
fit {
- description = "Configuration to load ATF and SPL";
- #address-cells = <1>;
-
images {
-
atf {
- description = "ARM Trusted Firmware";
- type = "firmware";
- arch = "arm64";
- compression = "none";
- os = "arm-trusted-firmware";
- load = <CONFIG_K3_ATF_LOAD_ADDR>;
- entry = <CONFIG_K3_ATF_LOAD_ADDR>;
ti-secure {
- content = <&atf>;
- keyfile = "custMpk.pem";
- };
- atf: atf-bl31 {
+ auth-in-place = <0xa02>;
+
+ firewall-257-0 {
+ /* cpu_0_cpu_0_msmc Background Firewall */
+ insert-template = <&firewall_bg_1>;
+ id = <257>;
+ region = <0>;
+ };
+
+ firewall-257-1 {
+ /* cpu_0_cpu_0_msmc Foreground Firewall */
+ insert-template = <&firewall_armv8_atf_fg>;
+ id = <257>;
+ region = <1>;
+ };
+
+ /* firewall-4760-0 {
+ * nb_slv0__mem0 Background Firewall
+ * Already configured by the secure entity
+ * };
+ */
+
+ firewall-4760-1 {
+ /* nb_slv0__mem0 Foreground Firewall */
+ insert-template = <&firewall_armv8_atf_fg>;
+ id = <4760>;
+ region = <1>;
+ };
+
+ /* firewall-4761-0 {
+ * nb_slv1__mem0 Background Firewall
+ * Already configured by the secure entity
+ * };
+ */
+
+ firewall-4761-1 {
+ /* nb_slv1__mem0 Foreground Firewall */
+ insert-template = <&firewall_armv8_atf_fg>;
+ id = <4761>;
+ region = <1>;
+ };
};
};
tee {
- description = "OP-TEE";
- type = "tee";
- arch = "arm64";
- compression = "none";
- os = "tee";
- load = <0x9e800000>;
- entry = <0x9e800000>;
ti-secure {
- content = <&tee>;
- keyfile = "custMpk.pem";
- };
- tee: tee-os {
+ auth-in-place = <0xa02>;
+
+ /* cpu_0_cpu_0_msmc region 0 and 1 configured
+ * during ATF Firewalling
+ */
+
+ firewall-257-2 {
+ /* cpu_0_cpu_0_msmc Foreground Firewall */
+ insert-template = <&firewall_armv8_optee_fg>;
+ id = <257>;
+ region = <2>;
+ };
+
+ firewall-4762-0 {
+ /* nb_slv2__mem0 Background Firewall - 0 */
+ insert-template = <&firewall_bg_3>;
+ id = <4762>;
+ region = <0>;
+ };
+
+ firewall-4762-1 {
+ /* nb_slv2__mem0 Foreground Firewall */
+ insert-template = <&firewall_armv8_optee_fg>;
+ id = <4762>;
+ region = <1>;
+ };
+
+ firewall-4763-0 {
+ /* nb_slv3__mem0 Background Firewall - 0 */
+ insert-template = <&firewall_bg_3>;
+ id = <4763>;
+ region = <0>;
+ };
+
+ firewall-4763-1 {
+ /* nb_slv3__mem0 Foreground Firewall */
+ insert-template = <&firewall_armv8_optee_fg>;
+ id = <4763>;
+ region = <1>;
+ };
};
};
-
dm {
- description = "DM binary";
- type = "firmware";
- arch = "arm32";
- compression = "none";
- os = "DM";
- load = <0x89000000>;
- entry = <0x89000000>;
ti-secure {
content = <&dm>;
keyfile = "custMpk.pem";
};
-
- dm: blob-ext {
+ dm: ti-dm {
filename = "ti-dm.bin";
};
};
- spl {
- description = "SPL (64-bit)";
- type = "standalone";
- os = "U-Boot";
- arch = "arm64";
- compression = "none";
- load = <CONFIG_SPL_TEXT_BASE>;
- entry = <CONFIG_SPL_TEXT_BASE>;
- ti-secure {
- content = <&u_boot_spl_nodtb>;
- keyfile = "custMpk.pem";
- };
- u_boot_spl_nodtb: blob-ext {
- filename = SPL_NODTB;
- };
- };
-
fdt-0 {
description = "k3-j7200-common-proc-board";
type = "flat_dt";
@@ -302,29 +327,12 @@
&binman {
u-boot {
- filename = "u-boot.img";
- pad-byte = <0xff>;
+ insert-template = <&u_boot_template>;
fit {
- description = "FIT image with multiple configurations";
-
images {
uboot {
- description = "U-Boot for J7200 board";
- type = "firmware";
- os = "u-boot";
- arch = "arm";
- compression = "none";
- load = <CONFIG_TEXT_BASE>;
- ti-secure {
- content = <&u_boot_nodtb>;
- keyfile = "custMpk.pem";
- };
- u_boot_nodtb: u-boot-nodtb {
- };
- hash {
- algo = "crc32";
- };
+ description = "U-Boot for J7200 Board";
};
fdt-0 {
@@ -362,67 +370,16 @@
&binman {
ti-spl_unsigned {
- filename = "tispl.bin_unsigned";
- pad-byte = <0xff>;
+ insert-template = <&ti_spl_unsigned_template>;
fit {
- description = "Configuration to load ATF and SPL";
- #address-cells = <1>;
-
images {
-
- atf {
- description = "ARM Trusted Firmware";
- type = "firmware";
- arch = "arm64";
- compression = "none";
- os = "arm-trusted-firmware";
- load = <CONFIG_K3_ATF_LOAD_ADDR>;
- entry = <CONFIG_K3_ATF_LOAD_ADDR>;
- atf-bl31 {
- filename = "bl31.bin";
- };
- };
-
- tee {
- description = "OP-TEE";
- type = "tee";
- arch = "arm64";
- compression = "none";
- os = "tee";
- load = <0x9e800000>;
- entry = <0x9e800000>;
- tee-os {
- filename = "tee-raw.bin";
- };
- };
-
dm {
- description = "DM binary";
- type = "firmware";
- arch = "arm32";
- compression = "none";
- os = "DM";
- load = <0x89000000>;
- entry = <0x89000000>;
- blob-ext {
+ ti-dm {
filename = "ti-dm.bin";
};
};
- spl {
- description = "SPL (64-bit)";
- type = "standalone";
- os = "U-Boot";
- arch = "arm64";
- compression = "none";
- load = <CONFIG_SPL_TEXT_BASE>;
- entry = <CONFIG_SPL_TEXT_BASE>;
- blob {
- filename = SPL_NODTB;
- };
- };
-
fdt-1 {
description = "k3-j7200-common-proc-board";
type = "flat_dt";
@@ -450,26 +407,12 @@
&binman {
u-boot_unsigned {
- filename = "u-boot.img_unsigned";
- pad-byte = <0xff>;
+ insert-template = <&u_boot_unsigned_template>;
fit {
- description = "FIT image with multiple configurations";
-
images {
uboot {
- description = "U-Boot for J7200 board";
- type = "firmware";
- os = "u-boot";
- arch = "arm";
- compression = "none";
- load = <CONFIG_TEXT_BASE>;
- blob {
- filename = UBOOT_NODTB;
- };
- hash {
- algo = "crc32";
- };
+ description = "U-Boot for J7200 Board";
};
fdt-1 {
diff --git a/arch/arm/dts/k3-j7200-main.dtsi b/arch/arm/dts/k3-j7200-main.dtsi
index cdb1d6b..264913f 100644
--- a/arch/arm/dts/k3-j7200-main.dtsi
+++ b/arch/arm/dts/k3-j7200-main.dtsi
@@ -91,7 +91,7 @@
};
main_navss: bus@30000000 {
- compatible = "simple-mfd";
+ compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
ranges = <0x00 0x30000000 0x00 0x30000000 0x00 0x0c400000>;
diff --git a/arch/arm/dts/k3-j7200-mcu-wakeup.dtsi b/arch/arm/dts/k3-j7200-mcu-wakeup.dtsi
index 6ffaf85..3fc588b 100644
--- a/arch/arm/dts/k3-j7200-mcu-wakeup.dtsi
+++ b/arch/arm/dts/k3-j7200-mcu-wakeup.dtsi
@@ -318,7 +318,7 @@
};
mcu_navss: bus@28380000 {
- compatible = "simple-mfd";
+ compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
ranges = <0x00 0x28380000 0x00 0x28380000 0x00 0x03880000>;
@@ -637,4 +637,11 @@
power-domains = <&k3_pds 154 TI_SCI_PD_EXCLUSIVE>;
#thermal-sensor-cells = <1>;
};
+
+ mcu_esm: esm@40800000 {
+ compatible = "ti,j721e-esm";
+ reg = <0x00 0x40800000 0x00 0x1000>;
+ ti,esm-pins = <95>;
+ bootph-pre-ram;
+ };
};
diff --git a/arch/arm/dts/k3-j7200-r5-common-proc-board.dts b/arch/arm/dts/k3-j7200-r5-common-proc-board.dts
index f0a7360..018faaa 100644
--- a/arch/arm/dts/k3-j7200-r5-common-proc-board.dts
+++ b/arch/arm/dts/k3-j7200-r5-common-proc-board.dts
@@ -24,7 +24,8 @@
<&k3_pds 4 TI_SCI_PD_EXCLUSIVE>;
resets = <&k3_reset 202 0>;
clocks = <&k3_clks 61 1>;
- assigned-clocks = <&k3_clks 202 2>, <&k3_clks 61 1>;
+ assigned-clocks = <&k3_clks 202 2>, <&k3_clks 61 1>, <&k3_clks 323 0>;
+ assigned-clock-parents= <0>, <0>, <&k3_clks 323 2>;
assigned-clock-rates = <2000000000>, <200000000>;
ti,sci = <&dmsc>;
ti,sci-proc-id = <32>;
diff --git a/arch/arm/dts/k3-j721e-beagleboneai64-u-boot.dtsi b/arch/arm/dts/k3-j721e-beagleboneai64-u-boot.dtsi
index f83caf7..017a5a7 100644
--- a/arch/arm/dts/k3-j721e-beagleboneai64-u-boot.dtsi
+++ b/arch/arm/dts/k3-j721e-beagleboneai64-u-boot.dtsi
@@ -165,6 +165,7 @@
&serdes_ln_ctrl {
bootph-all;
+ u-boot,mux-autoprobe;
};
&serdes2_usb_link {
@@ -173,6 +174,7 @@
&usb_serdes_mux {
bootph-all;
+ u-boot,mux-autoprobe;
};
&serdes_wiz2 {
diff --git a/arch/arm/dts/k3-j721e-binman.dtsi b/arch/arm/dts/k3-j721e-binman.dtsi
index 4f566c2..75a6e95 100644
--- a/arch/arm/dts/k3-j721e-binman.dtsi
+++ b/arch/arm/dts/k3-j721e-binman.dtsi
@@ -20,6 +20,20 @@
no-expanded;
};
};
+
+ tiboot3-j721e_sr2-hs-evm.bin {
+ filename = "tiboot3-j721e_sr2-hs-evm.bin";
+ ti-secure-rom {
+ content = <&u_boot_spl_sr2>;
+ core = "public";
+ load = <CONFIG_SPL_TEXT_BASE>;
+ keyfile = "custMpk.pem";
+ };
+ u_boot_spl_sr2: u-boot-spl {
+ no-expanded;
+ };
+ };
+
sysfw {
filename = "sysfw.bin";
ti-secure-rom {
@@ -40,78 +54,76 @@
optional;
};
};
+
+ sysfw_sr2 {
+ filename = "sysfw.bin_sr2";
+ ti-secure-rom {
+ content = <&ti_fs_cert_sr2>;
+ core = "secure";
+ load = <0x40000>;
+ keyfile = "custMpk.pem";
+ countersign;
+ };
+ ti_fs_cert_sr2: ti-fs-cert.bin {
+ filename = "ti-sysfw/ti-fs-firmware-j721e_sr2-hs-cert.bin";
+ type = "blob-ext";
+ optional;
+ };
+ ti-fs-firmware-j721e_sr2-hs-enc.bin {
+ filename = "ti-sysfw/ti-fs-firmware-j721e_sr2-hs-enc.bin";
+ type = "blob-ext";
+ optional;
+ };
+ };
+
itb {
filename = "sysfw-j721e_sr1_1-hs-evm.itb";
+ insert-template = <&itb_template>;
+ };
+
+ itb_sr2 {
+ filename = "sysfw-j721e_sr2-hs-evm.itb";
+ insert-template = <&itb_template>;
fit {
- description = "SYSFW and Config fragments";
- #address-cells = <1>;
images {
sysfw.bin {
- description = "sysfw";
- type = "firmware";
- arch = "arm";
- compression = "none";
blob-ext {
- filename = "sysfw.bin";
+ filename = "sysfw.bin_sr2";
};
};
board-cfg.bin {
- description = "board-cfg";
- type = "firmware";
- arch = "arm";
- compression = "none";
ti-secure {
- content = <&board_cfg>;
- keyfile = "custMpk.pem";
+ content = <&board_cfg_sr2>;
};
- board_cfg: board-cfg {
+ board_cfg_sr2: board-cfg {
filename = "board-cfg.bin";
- type = "blob-ext";
};
-
};
pm-cfg.bin {
- description = "pm-cfg";
- type = "firmware";
- arch = "arm";
- compression = "none";
ti-secure {
- content = <&pm_cfg>;
- keyfile = "custMpk.pem";
+ content = <&pm_cfg_sr2>;
};
- pm_cfg: pm-cfg {
+ pm_cfg_sr2: pm-cfg {
filename = "pm-cfg.bin";
- type = "blob-ext";
};
};
rm-cfg.bin {
- description = "rm-cfg";
- type = "firmware";
- arch = "arm";
- compression = "none";
ti-secure {
- content = <&rm_cfg>;
- keyfile = "custMpk.pem";
+ content = <&rm_cfg_sr2>;
};
- rm_cfg: rm-cfg {
+ rm_cfg_sr2: rm-cfg {
filename = "rm-cfg.bin";
- type = "blob-ext";
};
};
sec-cfg.bin {
- description = "sec-cfg";
- type = "firmware";
- arch = "arm";
- compression = "none";
ti-secure {
- content = <&sec_cfg>;
- keyfile = "custMpk.pem";
+ content = <&sec_cfg_sr2>;
};
- sec_cfg: sec-cfg {
+ sec_cfg_sr2: sec-cfg {
filename = "sec-cfg.bin";
- type = "blob-ext";
};
};
+
};
};
};
@@ -145,62 +157,7 @@
};
itb_fs {
filename = "sysfw-j721e_sr2-hs-fs-evm.itb";
- fit {
- description = "SYSFW and Config fragments";
- #address-cells = <1>;
- images {
- sysfw.bin {
- description = "sysfw";
- type = "firmware";
- arch = "arm";
- compression = "none";
- blob-ext {
- filename = "sysfw.bin_fs";
- };
- };
- board-cfg.bin {
- description = "board-cfg";
- type = "firmware";
- arch = "arm";
- compression = "none";
- board-cfg {
- filename = "board-cfg.bin";
- type = "blob-ext";
- };
-
- };
- pm-cfg.bin {
- description = "pm-cfg";
- type = "firmware";
- arch = "arm";
- compression = "none";
- pm-cfg {
- filename = "pm-cfg.bin";
- type = "blob-ext";
- };
- };
- rm-cfg.bin {
- description = "rm-cfg";
- type = "firmware";
- arch = "arm";
- compression = "none";
- rm-cfg {
- filename = "rm-cfg.bin";
- type = "blob-ext";
- };
- };
- sec-cfg.bin {
- description = "sec-cfg";
- type = "firmware";
- arch = "arm";
- compression = "none";
- sec-cfg {
- filename = "sec-cfg.bin";
- type = "blob-ext";
- };
- };
- };
- };
+ insert-template = <&itb_unsigned_template>;
};
};
@@ -237,55 +194,15 @@
itb_gp {
filename = "sysfw-j721e-gp-evm.itb";
symlink = "sysfw.itb";
+ insert-template = <&itb_unsigned_template>;
+
fit {
- description = "SYSFW and Config fragments";
- #address-cells = <1>;
images {
sysfw.bin {
- description = "sysfw";
- type = "firmware";
- arch = "arm";
- compression = "none";
blob-ext {
filename = "sysfw.bin_gp";
};
};
- board-cfg.bin {
- description = "board-cfg";
- type = "firmware";
- arch = "arm";
- compression = "none";
- blob-ext {
- filename = "board-cfg.bin";
- };
- };
- pm-cfg.bin {
- description = "pm-cfg";
- type = "firmware";
- arch = "arm";
- compression = "none";
- blob-ext {
- filename = "pm-cfg.bin";
- };
- };
- rm-cfg.bin {
- description = "rm-cfg";
- type = "firmware";
- arch = "arm";
- compression = "none";
- blob-ext {
- filename = "rm-cfg.bin";
- };
- };
- sec-cfg.bin {
- description = "sec-cfg";
- type = "firmware";
- arch = "arm";
- compression = "none";
- blob-ext {
- filename = "sec-cfg.bin";
- };
- };
};
};
};
@@ -294,11 +211,9 @@
#ifdef CONFIG_TARGET_J721E_A72_EVM
-#define SPL_NODTB "spl/u-boot-spl-nodtb.bin"
#define SPL_J721E_EVM_DTB "spl/dts/k3-j721e-common-proc-board.dtb"
#define SPL_J721E_SK_DTB "spl/dts/k3-j721e-sk.dtb"
-#define UBOOT_NODTB "u-boot-nodtb.bin"
#define J721E_EVM_DTB "u-boot.dtb"
#define J721E_SK_DTB "arch/arm/dts/k3-j721e-sk.dtb"
@@ -310,82 +225,136 @@
};
};
ti-spl {
- filename = "tispl.bin";
- pad-byte = <0xff>;
+ insert-template = <&ti_spl_template>;
fit {
- description = "Configuration to load ATF and SPL";
- #address-cells = <1>;
-
images {
-
atf {
- description = "ARM Trusted Firmware";
- type = "firmware";
- arch = "arm64";
- compression = "none";
- os = "arm-trusted-firmware";
- load = <CONFIG_K3_ATF_LOAD_ADDR>;
- entry = <CONFIG_K3_ATF_LOAD_ADDR>;
ti-secure {
- content = <&atf>;
- keyfile = "custMpk.pem";
- };
- atf: atf-bl31 {
+ auth-in-place = <0xa02>;
+
+ firewall-257-0 {
+ /* cpu_0_cpu_0_msmc Background Firewall */
+ insert-template = <&firewall_bg_1>;
+ id = <257>;
+ region = <0>;
+ };
+
+ firewall-257-1 {
+ /* cpu_0_cpu_0_msmc Foreground Firewall */
+ insert-template = <&firewall_armv8_atf_fg>;
+ id = <257>;
+ region = <1>;
+ };
+
+ firewall-284-0 {
+ /* dru_0_msmc Background Firewall */
+ insert-template = <&firewall_bg_3>;
+ id = <284>;
+ region = <0>;
+ };
+
+ firewall-284-1 {
+ /* dru_0_msmc Foreground Firewall */
+ insert-template = <&firewall_armv8_atf_fg>;
+ id = <284>;
+ region = <1>;
+ };
+
+ /* firewall-4760-0 {
+ * nb_slv0__mem0 Background Firewall
+ * Already configured by the secure entity
+ * };
+ */
+
+ firewall-4760-1 {
+ /* nb_slv0__mem0 Foreground Firewall */
+ insert-template = <&firewall_armv8_atf_fg>;
+ id = <4760>;
+ region = <1>;
+ };
+
+ /* firewall-4761-0 {
+ * nb_slv1__mem0 Background Firewall
+ * Already configured by the secure entity
+ * };
+ */
+
+ firewall-4761-1 {
+ /* nb_slv1__mem0 Foreground Firewall */
+ insert-template = <&firewall_armv8_atf_fg>;
+ id = <4761>;
+ region = <1>;
+ };
+
};
};
tee {
- description = "OP-TEE";
- type = "tee";
- arch = "arm64";
- compression = "none";
- os = "tee";
- load = <0x9e800000>;
- entry = <0x9e800000>;
ti-secure {
- content = <&tee>;
- keyfile = "custMpk.pem";
- };
- tee: tee-os {
+ auth-in-place = <0xa02>;
+
+ /* cpu_0_cpu_0_msmc region 0 and 1 configured
+ * during ATF Firewalling
+ */
+
+ firewall-257-2 {
+ /* cpu_0_cpu_0_msmc Foreground Firewall */
+ insert-template = <&firewall_armv8_optee_fg>;
+ id = <257>;
+ region = <2>;
+ };
+
+ /* dru_0_msmc region 0 and 1 configured
+ * during ATF Firewalling
+ */
+
+ firewall-284-2 {
+ /* dru_0_msmc Foreground Firewall */
+ insert-template = <&firewall_armv8_optee_fg>;
+ id = <284>;
+ region = <2>;
+ };
+
+ firewall-4762-0 {
+ /* nb_slv2__mem0 Background Firewall */
+ insert-template = <&firewall_bg_3>;
+ id = <4762>;
+ region = <0>;
+ };
+
+ firewall-4762-1 {
+ /* nb_slv2__mem0 Foreground Firewall */
+ insert-template = <&firewall_armv8_optee_fg>;
+ id = <4762>;
+ region = <1>;
+ };
+
+ firewall-4763-0 {
+ /* nb_slv3__mem0 Background Firewall */
+ insert-template = <&firewall_bg_3>;
+ id = <4763>;
+ region = <0>;
+ };
+
+ firewall-4763-1 {
+ /* nb_slv3__mem0 Foreground Firewall */
+ insert-template = <&firewall_armv8_optee_fg>;
+ id = <4763>;
+ region = <1>;
+ };
};
};
-
dm {
- description = "DM binary";
- type = "firmware";
- arch = "arm32";
- compression = "none";
- os = "DM";
- load = <0x89000000>;
- entry = <0x89000000>;
ti-secure {
content = <&dm>;
keyfile = "custMpk.pem";
};
- dm: blob-ext {
+ dm: ti-dm {
filename = "ti-dm.bin";
};
};
- spl {
- description = "SPL (64-bit)";
- type = "standalone";
- os = "U-Boot";
- arch = "arm64";
- compression = "none";
- load = <CONFIG_SPL_TEXT_BASE>;
- entry = <CONFIG_SPL_TEXT_BASE>;
- ti-secure {
- content = <&u_boot_spl_nodtb>;
- keyfile = "custMpk.pem";
-
- };
- u_boot_spl_nodtb: blob-ext {
- filename = SPL_NODTB;
- };
- };
-
fdt-0 {
description = "k3-j721e-common-proc-board";
type = "flat_dt";
@@ -439,29 +408,12 @@
&binman {
u-boot {
- filename = "u-boot.img";
- pad-byte = <0xff>;
-
+ insert-template = <&u_boot_template>;
fit {
- description = "FIT image with multiple configurations";
images {
uboot {
- description = "U-Boot for j721e board";
- type = "firmware";
- os = "u-boot";
- arch = "arm";
- compression = "none";
- load = <CONFIG_TEXT_BASE>;
- ti-secure {
- content = <&u_boot_nodtb>;
- keyfile = "custMpk.pem";
- };
- u_boot_nodtb: u-boot-nodtb {
- };
- hash {
- algo = "crc32";
- };
+ description = "U-Boot for J721E Board";
};
fdt-0 {
@@ -524,67 +476,16 @@
&binman {
ti-spl_unsigned {
- filename = "tispl.bin_unsigned";
- pad-byte = <0xff>;
+ insert-template = <&ti_spl_unsigned_template>;
fit {
- description = "Configuration to load ATF and SPL";
- #address-cells = <1>;
-
images {
-
- atf {
- description = "ARM Trusted Firmware";
- type = "firmware";
- arch = "arm64";
- compression = "none";
- os = "arm-trusted-firmware";
- load = <CONFIG_K3_ATF_LOAD_ADDR>;
- entry = <CONFIG_K3_ATF_LOAD_ADDR>;
- atf-bl31 {
- filename = "bl31.bin";
- };
- };
-
- tee {
- description = "OP-TEE";
- type = "tee";
- arch = "arm64";
- compression = "none";
- os = "tee";
- load = <0x9e800000>;
- entry = <0x9e800000>;
- tee-os {
- filename = "tee-raw.bin";
- };
- };
-
dm {
- description = "DM binary";
- type = "firmware";
- arch = "arm32";
- compression = "none";
- os = "DM";
- load = <0x89000000>;
- entry = <0x89000000>;
- blob-ext {
+ ti-dm {
filename = "ti-dm.bin";
};
};
- spl {
- description = "SPL (64-bit)";
- type = "standalone";
- os = "U-Boot";
- arch = "arm64";
- compression = "none";
- load = <CONFIG_SPL_TEXT_BASE>;
- entry = <CONFIG_SPL_TEXT_BASE>;
- blob-ext {
- filename = SPL_NODTB;
- };
- };
-
fdt-0 {
description = "k3-j721e-common-proc-board";
type = "flat_dt";
@@ -629,26 +530,12 @@
&binman {
u-boot_unsigned {
- filename = "u-boot.img_unsigned";
- pad-byte = <0xff>;
+ insert-template = <&u_boot_unsigned_template>;
fit {
- description = "FIT image with multiple configurations";
-
images {
uboot {
- description = "U-Boot for j721e board";
- type = "firmware";
- os = "u-boot";
- arch = "arm";
- compression = "none";
- load = <CONFIG_TEXT_BASE>;
- blob {
- filename = UBOOT_NODTB;
- };
- hash {
- algo = "crc32";
- };
+ description = "U-Boot for J721E Board";
};
fdt-0 {
diff --git a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
index b77f8d9..7ae7cf3 100644
--- a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
+++ b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
@@ -93,6 +93,14 @@
bootph-all;
};
+&serdes_ln_ctrl {
+ u-boot,mux-autoprobe;
+};
+
+&usb_serdes_mux {
+ u-boot,mux-autoprobe;
+};
+
&main_usbss0_pins_default {
bootph-all;
};
diff --git a/arch/arm/dts/k3-j721e-sk-u-boot.dtsi b/arch/arm/dts/k3-j721e-sk-u-boot.dtsi
index 370fe51..479b7bc 100644
--- a/arch/arm/dts/k3-j721e-sk-u-boot.dtsi
+++ b/arch/arm/dts/k3-j721e-sk-u-boot.dtsi
@@ -89,6 +89,14 @@
bootph-all;
};
+&serdes_ln_ctrl {
+ u-boot,mux-autoprobe;
+};
+
+&usb_serdes_mux {
+ u-boot,mux-autoprobe;
+};
+
&main_usbss0_pins_default {
bootph-all;
};
diff --git a/arch/arm/dts/k3-j721s2-binman.dtsi b/arch/arm/dts/k3-j721s2-binman.dtsi
index 5bca4e9..7efb135 100644
--- a/arch/arm/dts/k3-j721s2-binman.dtsi
+++ b/arch/arm/dts/k3-j721s2-binman.dtsi
@@ -141,11 +141,9 @@
#ifdef CONFIG_TARGET_J721S2_A72_EVM
-#define SPL_NODTB "spl/u-boot-spl-nodtb.bin"
#define SPL_J721S2_EVM_DTB "spl/dts/k3-j721s2-common-proc-board.dtb"
#define SPL_AM68_SK_DTB "spl/dts/k3-am68-sk-base-board.dtb"
-#define UBOOT_NODTB "u-boot-nodtb.bin"
#define J721S2_EVM_DTB "u-boot.dtb"
#define AM68_SK_DTB "arch/arm/dts/k3-am68-sk-base-board.dtb"
@@ -157,81 +155,143 @@
};
};
ti-spl {
- filename = "tispl.bin";
- pad-byte = <0xff>;
+ insert-template = <&ti_spl_template>;
fit {
- description = "Configuration to load ATF and SPL";
- #address-cells = <1>;
-
images {
-
atf {
- description = "ARM Trusted Firmware";
- type = "firmware";
- arch = "arm64";
- compression = "none";
- os = "arm-trusted-firmware";
- load = <CONFIG_K3_ATF_LOAD_ADDR>;
- entry = <CONFIG_K3_ATF_LOAD_ADDR>;
ti-secure {
- content = <&atf>;
- keyfile = "custMpk.pem";
- };
- atf: atf-bl31 {
+ auth-in-place = <0xa02>;
+
+ firewall-257-0 {
+ /* cpu_0_cpu_0_msmc Background Firewall */
+ insert-template = <&firewall_bg_1>;
+ id = <257>;
+ region = <0>;
+ };
+
+ firewall-257-1 {
+ /* cpu_0_cpu_0_msmc Foreground Firewall */
+ insert-template = <&firewall_armv8_atf_fg>;
+ id = <257>;
+ region = <1>;
+ };
+
+ firewall-284-0 {
+ /* dru_0_msmc Background Firewall */
+ insert-template = <&firewall_bg_3>;
+ id = <284>;
+ region = <0>;
+ };
+
+ firewall-284-1 {
+ /* dru_0_msmc Foreground Firewall */
+ insert-template = <&firewall_armv8_atf_fg>;
+ id = <284>;
+ region = <1>;
+ };
+
+ /* firewall-5140-0 {
+ * nb_slv0__mem0 Background Firewall
+ * Already configured by the secure entity
+ * };
+ */
+
+ firewall-5140-1 {
+ /* nb_slv0__mem0 Foreground Firewall */
+ insert-template = <&firewall_armv8_atf_fg>;
+ id = <5140>;
+ region = <1>;
+ };
+
+ /* firewall-5140-0 {
+ * nb_slv1__mem0 Background Firewall
+ * Already configured by the secure entity
+ * };
+ */
+
+ firewall-5141-1 {
+ /* nb_slv1__mem0 Foreground Firewall */
+ insert-template = <&firewall_armv8_atf_fg>;
+ id = <5141>;
+ region = <1>;
+ };
+
};
};
tee {
- description = "OP-TEE";
- type = "tee";
- arch = "arm64";
- compression = "none";
- os = "tee";
- load = <0x9e800000>;
- entry = <0x9e800000>;
ti-secure {
- content = <&tee>;
- keyfile = "custMpk.pem";
- };
- tee: tee-os {
+ auth-in-place = <0xa02>;
+
+ firewall-257-2 {
+ /* cpu_0_cpu_0_msmc Foreground Firewall */
+ insert-template = <&firewall_armv8_optee_fg>;
+ id = <257>;
+ region = <2>;
+ };
+
+ firewall-284-2 {
+ /* dru_0_msmc Foreground Firewall */
+ insert-template = <&firewall_armv8_optee_fg>;
+ id = <284>;
+ region = <2>;
+ };
+
+ firewall-5142-0 {
+ /* nb_slv2__mem0 Background Firewall - 0 */
+ insert-template = <&firewall_bg_3>;
+ id = <5142>;
+ region = <0>;
+ };
+
+ firewall-5142-1 {
+ /* nb_slv2__mem0 Foreground Firewall */
+ insert-template = <&firewall_armv8_optee_fg>;
+ id = <5142>;
+ region = <1>;
+ };
+
+ firewall-5143-0 {
+ /* nb_slv3__mem0 Background Firewall - 0 */
+ insert-template = <&firewall_bg_3>;
+ id = <5143>;
+ region = <0>;
+ };
+
+ firewall-5143-1 {
+ /* nb_slv3__mem0 Foreground Firewall */
+ insert-template = <&firewall_armv8_optee_fg>;
+ id = <5143>;
+ region = <1>;
+ };
+
+ firewall-5144-0 {
+ /* nb_slv4__mem0 Background Firewall - 0 */
+ insert-template = <&firewall_bg_3>;
+ id = <5144>;
+ region = <0>;
+ };
+
+ firewall-5144-1 {
+ /* nb_slv4__mem0 Foreground Firewall */
+ insert-template = <&firewall_armv8_optee_fg>;
+ id = <5144>;
+ region = <1>;
+ };
+
};
};
-
dm {
- description = "DM binary";
- type = "firmware";
- arch = "arm32";
- compression = "none";
- os = "DM";
- load = <0x89000000>;
- entry = <0x89000000>;
ti-secure {
content = <&dm>;
keyfile = "custMpk.pem";
};
- dm: blob-ext {
+ dm: ti-dm {
filename = "ti-dm.bin";
};
};
- spl {
- description = "SPL (64-bit)";
- type = "standalone";
- os = "U-Boot";
- arch = "arm64";
- compression = "none";
- load = <CONFIG_SPL_TEXT_BASE>;
- entry = <CONFIG_SPL_TEXT_BASE>;
- ti-secure {
- content = <&u_boot_spl_nodtb>;
- keyfile = "custMpk.pem";
- };
- u_boot_spl_nodtb: blob-ext {
- filename = SPL_NODTB;
- };
- };
-
fdt-0 {
description = "k3-j721s2-common-proc-board";
type = "flat_dt";
@@ -285,29 +345,12 @@
&binman {
u-boot {
- filename = "u-boot.img";
- pad-byte = <0xff>;
+ insert-template = <&u_boot_template>;
fit {
- description = "FIT image with multiple configurations";
-
images {
uboot {
- description = "U-Boot for J721S2 board";
- type = "firmware";
- os = "u-boot";
- arch = "arm";
- compression = "none";
- load = <CONFIG_TEXT_BASE>;
- ti-secure {
- content = <&u_boot_nodtb>;
- keyfile = "custMpk.pem";
- };
- u_boot_nodtb: u-boot-nodtb {
- };
- hash {
- algo = "crc32";
- };
+ description = "U-Boot for J721S2 Board";
};
fdt-0 {
@@ -371,67 +414,16 @@
&binman {
ti-spl_unsigned {
- filename = "tispl.bin_unsigned";
- pad-byte = <0xff>;
+ insert-template = <&ti_spl_unsigned_template>;
fit {
- description = "Configuration to load ATF and SPL";
- #address-cells = <1>;
-
images {
-
- atf {
- description = "ARM Trusted Firmware";
- type = "firmware";
- arch = "arm64";
- compression = "none";
- os = "arm-trusted-firmware";
- load = <CONFIG_K3_ATF_LOAD_ADDR>;
- entry = <CONFIG_K3_ATF_LOAD_ADDR>;
- atf-bl31 {
- filename = "bl31.bin";
- };
- };
-
- tee {
- description = "OP-TEE";
- type = "tee";
- arch = "arm64";
- compression = "none";
- os = "tee";
- load = <0x9e800000>;
- entry = <0x9e800000>;
- tee-os {
- filename = "tee-raw.bin";
- };
- };
-
dm {
- description = "DM binary";
- type = "firmware";
- arch = "arm32";
- compression = "none";
- os = "DM";
- load = <0x89000000>;
- entry = <0x89000000>;
- blob-ext {
+ ti-dm {
filename = "ti-dm.bin";
};
};
- spl {
- description = "SPL (64-bit)";
- type = "standalone";
- os = "U-Boot";
- arch = "arm64";
- compression = "none";
- load = <CONFIG_SPL_TEXT_BASE>;
- entry = <CONFIG_SPL_TEXT_BASE>;
- blob {
- filename = "spl/u-boot-spl-nodtb.bin";
- };
- };
-
fdt-0 {
description = "k3-j721s2-common-proc-board";
type = "flat_dt";
@@ -475,26 +467,12 @@
&binman {
u-boot_unsigned {
- filename = "u-boot.img_unsigned";
- pad-byte = <0xff>;
+ insert-template = <&u_boot_unsigned_template>;
fit {
- description = "FIT image with multiple configurations";
-
images {
uboot {
- description = "U-Boot for J721S2 board";
- type = "firmware";
- os = "u-boot";
- arch = "arm";
- compression = "none";
- load = <CONFIG_TEXT_BASE>;
- blob {
- filename = UBOOT_NODTB;
- };
- hash {
- algo = "crc32";
- };
+ description = "U-Boot for J721S2 Board";
};
fdt-0 {
diff --git a/arch/arm/dts/k3-j721s2-main.dtsi b/arch/arm/dts/k3-j721s2-main.dtsi
index 084f8f5..b03731b 100644
--- a/arch/arm/dts/k3-j721s2-main.dtsi
+++ b/arch/arm/dts/k3-j721s2-main.dtsi
@@ -775,7 +775,7 @@
};
main_navss: bus@30000000 {
- compatible = "simple-mfd";
+ compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
ranges = <0x00 0x30000000 0x00 0x30000000 0x00 0x0c400000>;
@@ -807,6 +807,7 @@
ti,sci = <&sms>;
ti,sci-dev-id = <265>;
ti,interrupt-ranges = <0 0 256>;
+ ti,unmapped-event-sources = <&main_bcdma_csi>;
};
secure_proxy_main: mailbox@32c00000 {
@@ -1103,6 +1104,22 @@
ti,sci-rm-range-rflow = <0x00>; /* GP RFLOW */
};
+ main_bcdma_csi: dma-controller@311a0000 {
+ compatible = "ti,j721s2-dmss-bcdma-csi";
+ reg = <0x00 0x311a0000 0x00 0x100>,
+ <0x00 0x35d00000 0x00 0x20000>,
+ <0x00 0x35c00000 0x00 0x10000>,
+ <0x00 0x35e00000 0x00 0x80000>;
+ reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt";
+ msi-parent = <&main_udmass_inta>;
+ #dma-cells = <3>;
+ ti,sci = <&sms>;
+ ti,sci-dev-id = <225>;
+ ti,sci-rm-range-rchan = <0x21>;
+ ti,sci-rm-range-tchan = <0x22>;
+ status = "disabled";
+ };
+
cpts@310d0000 {
compatible = "ti,j721e-cpts";
reg = <0x0 0x310d0000 0x0 0x400>;
@@ -1695,4 +1712,217 @@
dss_ports: ports {
};
};
+
+ main_r5fss0: r5fss@5c00000 {
+ compatible = "ti,j721s2-r5fss";
+ ti,cluster-mode = <1>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x5c00000 0x00 0x5c00000 0x20000>,
+ <0x5d00000 0x00 0x5d00000 0x20000>;
+ power-domains = <&k3_pds 277 TI_SCI_PD_EXCLUSIVE>;
+
+ main_r5fss0_core0: r5f@5c00000 {
+ compatible = "ti,j721s2-r5f";
+ reg = <0x5c00000 0x00010000>,
+ <0x5c10000 0x00010000>;
+ reg-names = "atcm", "btcm";
+ ti,sci = <&sms>;
+ ti,sci-dev-id = <279>;
+ ti,sci-proc-ids = <0x06 0xff>;
+ resets = <&k3_reset 279 1>;
+ firmware-name = "j721s2-main-r5f0_0-fw";
+ ti,atcm-enable = <1>;
+ ti,btcm-enable = <1>;
+ ti,loczrama = <1>;
+ };
+
+ main_r5fss0_core1: r5f@5d00000 {
+ compatible = "ti,j721s2-r5f";
+ reg = <0x5d00000 0x00010000>,
+ <0x5d10000 0x00010000>;
+ reg-names = "atcm", "btcm";
+ ti,sci = <&sms>;
+ ti,sci-dev-id = <280>;
+ ti,sci-proc-ids = <0x07 0xff>;
+ resets = <&k3_reset 280 1>;
+ firmware-name = "j721s2-main-r5f0_1-fw";
+ ti,atcm-enable = <1>;
+ ti,btcm-enable = <1>;
+ ti,loczrama = <1>;
+ };
+ };
+
+ main_r5fss1: r5fss@5e00000 {
+ compatible = "ti,j721s2-r5fss";
+ ti,cluster-mode = <1>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x5e00000 0x00 0x5e00000 0x20000>,
+ <0x5f00000 0x00 0x5f00000 0x20000>;
+ power-domains = <&k3_pds 278 TI_SCI_PD_EXCLUSIVE>;
+
+ main_r5fss1_core0: r5f@5e00000 {
+ compatible = "ti,j721s2-r5f";
+ reg = <0x5e00000 0x00010000>,
+ <0x5e10000 0x00010000>;
+ reg-names = "atcm", "btcm";
+ ti,sci = <&sms>;
+ ti,sci-dev-id = <281>;
+ ti,sci-proc-ids = <0x08 0xff>;
+ resets = <&k3_reset 281 1>;
+ firmware-name = "j721s2-main-r5f1_0-fw";
+ ti,atcm-enable = <1>;
+ ti,btcm-enable = <1>;
+ ti,loczrama = <1>;
+ };
+
+ main_r5fss1_core1: r5f@5f00000 {
+ compatible = "ti,j721s2-r5f";
+ reg = <0x5f00000 0x00010000>,
+ <0x5f10000 0x00010000>;
+ reg-names = "atcm", "btcm";
+ ti,sci = <&sms>;
+ ti,sci-dev-id = <282>;
+ ti,sci-proc-ids = <0x09 0xff>;
+ resets = <&k3_reset 282 1>;
+ firmware-name = "j721s2-main-r5f1_1-fw";
+ ti,atcm-enable = <1>;
+ ti,btcm-enable = <1>;
+ ti,loczrama = <1>;
+ };
+ };
+
+ c71_0: dsp@64800000 {
+ compatible = "ti,j721s2-c71-dsp";
+ reg = <0x00 0x64800000 0x00 0x00080000>,
+ <0x00 0x64e00000 0x00 0x0000c000>;
+ reg-names = "l2sram", "l1dram";
+ ti,sci = <&sms>;
+ ti,sci-dev-id = <8>;
+ ti,sci-proc-ids = <0x30 0xff>;
+ resets = <&k3_reset 8 1>;
+ firmware-name = "j721s2-c71_0-fw";
+ status = "disabled";
+ };
+
+ c71_1: dsp@65800000 {
+ compatible = "ti,j721s2-c71-dsp";
+ reg = <0x00 0x65800000 0x00 0x00080000>,
+ <0x00 0x65e00000 0x00 0x0000c000>;
+ reg-names = "l2sram", "l1dram";
+ ti,sci = <&sms>;
+ ti,sci-dev-id = <11>;
+ ti,sci-proc-ids = <0x31 0xff>;
+ resets = <&k3_reset 11 1>;
+ firmware-name = "j721s2-c71_1-fw";
+ status = "disabled";
+ };
+
+ main_esm: esm@700000 {
+ compatible = "ti,j721e-esm";
+ reg = <0x00 0x700000 0x00 0x1000>;
+ ti,esm-pins = <688>, <689>;
+ bootph-pre-ram;
+ };
+
+ watchdog0: watchdog@2200000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x2200000 0x00 0x100>;
+ clocks = <&k3_clks 286 1>;
+ power-domains = <&k3_pds 286 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 286 1>;
+ assigned-clock-parents = <&k3_clks 286 5>;
+ };
+
+ watchdog1: watchdog@2210000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x2210000 0x00 0x100>;
+ clocks = <&k3_clks 287 1>;
+ power-domains = <&k3_pds 287 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 287 1>;
+ assigned-clock-parents = <&k3_clks 287 5>;
+ };
+
+ /*
+ * The following RTI instances are coupled with MCU R5Fs, c7x and
+ * GPU so keeping them reserved as these will be used by their
+ * respective firmware
+ */
+ watchdog2: watchdog@22f0000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x22f0000 0x00 0x100>;
+ clocks = <&k3_clks 290 1>;
+ power-domains = <&k3_pds 290 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 290 1>;
+ assigned-clock-parents = <&k3_clks 290 5>;
+ /* reserved for GPU */
+ status = "reserved";
+ };
+
+ watchdog3: watchdog@2300000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x2300000 0x00 0x100>;
+ clocks = <&k3_clks 288 1>;
+ power-domains = <&k3_pds 288 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 288 1>;
+ assigned-clock-parents = <&k3_clks 288 5>;
+ /* reserved for C7X_0 */
+ status = "reserved";
+ };
+
+ watchdog4: watchdog@2310000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x2310000 0x00 0x100>;
+ clocks = <&k3_clks 289 1>;
+ power-domains = <&k3_pds 289 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 289 1>;
+ assigned-clock-parents = <&k3_clks 289 5>;
+ /* reserved for C7X_1 */
+ status = "reserved";
+ };
+
+ watchdog5: watchdog@23c0000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x23c0000 0x00 0x100>;
+ clocks = <&k3_clks 291 1>;
+ power-domains = <&k3_pds 291 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 291 1>;
+ assigned-clock-parents = <&k3_clks 291 5>;
+ /* reserved for MAIN_R5F0_0 */
+ status = "reserved";
+ };
+
+ watchdog6: watchdog@23d0000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x23d0000 0x00 0x100>;
+ clocks = <&k3_clks 292 1>;
+ power-domains = <&k3_pds 292 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 292 1>;
+ assigned-clock-parents = <&k3_clks 292 5>;
+ /* reserved for MAIN_R5F0_1 */
+ status = "reserved";
+ };
+
+ watchdog7: watchdog@23e0000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x23e0000 0x00 0x100>;
+ clocks = <&k3_clks 293 1>;
+ power-domains = <&k3_pds 293 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 293 1>;
+ assigned-clock-parents = <&k3_clks 293 5>;
+ /* reserved for MAIN_R5F1_0 */
+ status = "reserved";
+ };
+
+ watchdog8: watchdog@23f0000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x23f0000 0x00 0x100>;
+ clocks = <&k3_clks 294 1>;
+ power-domains = <&k3_pds 294 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 294 1>;
+ assigned-clock-parents = <&k3_clks 294 5>;
+ /* reserved for MAIN_R5F1_1 */
+ status = "reserved";
+ };
};
diff --git a/arch/arm/dts/k3-j721s2-mcu-wakeup.dtsi b/arch/arm/dts/k3-j721s2-mcu-wakeup.dtsi
index 2ddad93..7254f3b 100644
--- a/arch/arm/dts/k3-j721s2-mcu-wakeup.dtsi
+++ b/arch/arm/dts/k3-j721s2-mcu-wakeup.dtsi
@@ -443,7 +443,7 @@
};
mcu_navss: bus@28380000 {
- compatible = "simple-mfd";
+ compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
ranges = <0x00 0x28380000 0x00 0x28380000 0x00 0x03880000>;
@@ -655,4 +655,84 @@
power-domains = <&k3_pds 154 TI_SCI_PD_SHARED>;
#thermal-sensor-cells = <1>;
};
+
+ mcu_r5fss0: r5fss@41000000 {
+ compatible = "ti,j721s2-r5fss";
+ ti,cluster-mode = <1>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x41000000 0x00 0x41000000 0x20000>,
+ <0x41400000 0x00 0x41400000 0x20000>;
+ power-domains = <&k3_pds 283 TI_SCI_PD_EXCLUSIVE>;
+
+ mcu_r5fss0_core0: r5f@41000000 {
+ compatible = "ti,j721s2-r5f";
+ reg = <0x41000000 0x00010000>,
+ <0x41010000 0x00010000>;
+ reg-names = "atcm", "btcm";
+ ti,sci = <&sms>;
+ ti,sci-dev-id = <284>;
+ ti,sci-proc-ids = <0x01 0xff>;
+ resets = <&k3_reset 284 1>;
+ firmware-name = "j721s2-mcu-r5f0_0-fw";
+ ti,atcm-enable = <1>;
+ ti,btcm-enable = <1>;
+ ti,loczrama = <1>;
+ };
+
+ mcu_r5fss0_core1: r5f@41400000 {
+ compatible = "ti,j721s2-r5f";
+ reg = <0x41400000 0x00010000>,
+ <0x41410000 0x00010000>;
+ reg-names = "atcm", "btcm";
+ ti,sci = <&sms>;
+ ti,sci-dev-id = <285>;
+ ti,sci-proc-ids = <0x02 0xff>;
+ resets = <&k3_reset 285 1>;
+ firmware-name = "j721s2-mcu-r5f0_1-fw";
+ ti,atcm-enable = <1>;
+ ti,btcm-enable = <1>;
+ ti,loczrama = <1>;
+ };
+ };
+
+ mcu_esm: esm@40800000 {
+ compatible = "ti,j721e-esm";
+ reg = <0x00 0x40800000 0x00 0x1000>;
+ ti,esm-pins = <95>;
+ bootph-pre-ram;
+ };
+
+ wkup_esm: esm@42080000 {
+ compatible = "ti,j721e-esm";
+ reg = <0x00 0x42080000 0x00 0x1000>;
+ ti,esm-pins = <63>;
+ bootph-pre-ram;
+ };
+
+ /*
+ * The 2 RTI instances are couple with MCU R5Fs so keeping them
+ * reserved as these will be used by their respective firmware
+ */
+ mcu_watchdog0: watchdog@40600000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x40600000 0x00 0x100>;
+ clocks = <&k3_clks 295 1>;
+ power-domains = <&k3_pds 295 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 295 1>;
+ assigned-clock-parents = <&k3_clks 295 5>;
+ /* reserved for MCU_R5F0_0 */
+ status = "reserved";
+ };
+
+ mcu_watchdog1: watchdog@40610000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x40610000 0x00 0x100>;
+ clocks = <&k3_clks 296 1>;
+ power-domains = <&k3_pds 296 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 296 1>;
+ assigned-clock-parents = <&k3_clks 296 5>;
+ /* reserved for MCU_R5F0_1 */
+ status = "reserved";
+ };
};
diff --git a/arch/arm/dts/k3-j721s2-som-p0.dtsi b/arch/arm/dts/k3-j721s2-som-p0.dtsi
index a4006f3..dcad372 100644
--- a/arch/arm/dts/k3-j721s2-som-p0.dtsi
+++ b/arch/arm/dts/k3-j721s2-som-p0.dtsi
@@ -29,6 +29,108 @@
alignment = <0x1000>;
no-map;
};
+
+ mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa0000000 0x00 0x100000>;
+ no-map;
+ };
+
+ mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa0100000 0x00 0xf00000>;
+ no-map;
+ };
+
+ mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa1000000 0x00 0x100000>;
+ no-map;
+ };
+
+ mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa1100000 0x00 0xf00000>;
+ no-map;
+ };
+
+ main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a2000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa2000000 0x00 0x100000>;
+ no-map;
+ };
+
+ main_r5fss0_core0_memory_region: r5f-memory@a2100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa2100000 0x00 0xf00000>;
+ no-map;
+ };
+
+ main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a3000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa3000000 0x00 0x100000>;
+ no-map;
+ };
+
+ main_r5fss0_core1_memory_region: r5f-memory@a3100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa3100000 0x00 0xf00000>;
+ no-map;
+ };
+
+ main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a4000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa4000000 0x00 0x100000>;
+ no-map;
+ };
+
+ main_r5fss1_core0_memory_region: r5f-memory@a4100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa4100000 0x00 0xf00000>;
+ no-map;
+ };
+
+ main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a5000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa5000000 0x00 0x100000>;
+ no-map;
+ };
+
+ main_r5fss1_core1_memory_region: r5f-memory@a5100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa5100000 0x00 0xf00000>;
+ no-map;
+ };
+
+ c71_0_dma_memory_region: c71-dma-memory@a6000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa6000000 0x00 0x100000>;
+ no-map;
+ };
+
+ c71_0_memory_region: c71-memory@a6100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa6100000 0x00 0xf00000>;
+ no-map;
+ };
+
+ c71_1_dma_memory_region: c71-dma-memory@a7000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa7000000 0x00 0x100000>;
+ no-map;
+ };
+
+ c71_1_memory_region: c71-memory@a7100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa7100000 0x00 0xf00000>;
+ no-map;
+ };
+
+ rtos_ipc_memory_region: ipc-memories@a8000000 {
+ reg = <0x00 0xa8000000 0x00 0x01c00000>;
+ alignment = <0x1000>;
+ no-map;
+ };
};
mux0: mux-controller {
@@ -151,3 +253,109 @@
cdns,read-delay = <4>;
};
};
+
+&mailbox0_cluster0 {
+ status = "okay";
+ interrupts = <436>;
+ mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
+ ti,mbox-rx = <0 0 0>;
+ ti,mbox-tx = <1 0 0>;
+ };
+
+ mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
+ ti,mbox-rx = <2 0 0>;
+ ti,mbox-tx = <3 0 0>;
+ };
+};
+
+&mailbox0_cluster1 {
+ status = "okay";
+ interrupts = <432>;
+ mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
+ ti,mbox-rx = <0 0 0>;
+ ti,mbox-tx = <1 0 0>;
+ };
+
+ mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
+ ti,mbox-rx = <2 0 0>;
+ ti,mbox-tx = <3 0 0>;
+ };
+};
+
+&mailbox0_cluster2 {
+ status = "okay";
+ interrupts = <428>;
+ mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {
+ ti,mbox-rx = <0 0 0>;
+ ti,mbox-tx = <1 0 0>;
+ };
+
+ mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {
+ ti,mbox-rx = <2 0 0>;
+ ti,mbox-tx = <3 0 0>;
+ };
+};
+
+&mailbox0_cluster4 {
+ status = "okay";
+ interrupts = <420>;
+ mbox_c71_0: mbox-c71-0 {
+ ti,mbox-rx = <0 0 0>;
+ ti,mbox-tx = <1 0 0>;
+ };
+
+ mbox_c71_1: mbox-c71-1 {
+ ti,mbox-rx = <2 0 0>;
+ ti,mbox-tx = <3 0 0>;
+ };
+};
+
+&mcu_r5fss0_core0 {
+ mboxes = <&mailbox0_cluster0>, <&mbox_mcu_r5fss0_core0>;
+ memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
+ <&mcu_r5fss0_core0_memory_region>;
+};
+
+&mcu_r5fss0_core1 {
+ mboxes = <&mailbox0_cluster0>, <&mbox_mcu_r5fss0_core1>;
+ memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
+ <&mcu_r5fss0_core1_memory_region>;
+};
+
+&main_r5fss0_core0 {
+ mboxes = <&mailbox0_cluster1>, <&mbox_main_r5fss0_core0>;
+ memory-region = <&main_r5fss0_core0_dma_memory_region>,
+ <&main_r5fss0_core0_memory_region>;
+};
+
+&main_r5fss0_core1 {
+ mboxes = <&mailbox0_cluster1>, <&mbox_main_r5fss0_core1>;
+ memory-region = <&main_r5fss0_core1_dma_memory_region>,
+ <&main_r5fss0_core1_memory_region>;
+};
+
+&main_r5fss1_core0 {
+ mboxes = <&mailbox0_cluster2>, <&mbox_main_r5fss1_core0>;
+ memory-region = <&main_r5fss1_core0_dma_memory_region>,
+ <&main_r5fss1_core0_memory_region>;
+};
+
+&main_r5fss1_core1 {
+ mboxes = <&mailbox0_cluster2>, <&mbox_main_r5fss1_core1>;
+ memory-region = <&main_r5fss1_core1_dma_memory_region>,
+ <&main_r5fss1_core1_memory_region>;
+};
+
+&c71_0 {
+ status = "okay";
+ mboxes = <&mailbox0_cluster4>, <&mbox_c71_0>;
+ memory-region = <&c71_0_dma_memory_region>,
+ <&c71_0_memory_region>;
+};
+
+&c71_1 {
+ status = "okay";
+ mboxes = <&mailbox0_cluster4>, <&mbox_c71_1>;
+ memory-region = <&c71_1_dma_memory_region>,
+ <&c71_1_memory_region>;
+};
diff --git a/arch/arm/dts/k3-security.h b/arch/arm/dts/k3-security.h
new file mode 100644
index 0000000..33609ca
--- /dev/null
+++ b/arch/arm/dts/k3-security.h
@@ -0,0 +1,58 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
+ */
+
+#ifndef DTS_ARM64_TI_K3_FIREWALL_H
+#define DTS_ARM64_TI_K3_FIREWALL_H
+
+#define FWPRIVID_ALL 0xc3
+#define FWPRIVID_ARMV8 1
+#define FWPRIVID_SHIFT 16
+
+#define FWCTRL_EN 0xA
+#define FWCTRL_LOCK (1 << 4)
+#define FWCTRL_BG (1 << 8)
+#define FWCTRL_CACHE (1 << 9)
+
+#define FWPERM_SECURE_PRIV_WRITE (1 << 0)
+#define FWPERM_SECURE_PRIV_READ (1 << 1)
+#define FWPERM_SECURE_PRIV_CACHEABLE (1 << 2)
+#define FWPERM_SECURE_PRIV_DEBUG (1 << 3)
+
+#define FWPERM_SECURE_PRIV_RWCD (FWPERM_SECURE_PRIV_READ | \
+ FWPERM_SECURE_PRIV_WRITE | \
+ FWPERM_SECURE_PRIV_CACHEABLE | \
+ FWPERM_SECURE_PRIV_DEBUG)
+
+#define FWPERM_SECURE_USER_WRITE (1 << 4)
+#define FWPERM_SECURE_USER_READ (1 << 5)
+#define FWPERM_SECURE_USER_CACHEABLE (1 << 6)
+#define FWPERM_SECURE_USER_DEBUG (1 << 7)
+
+#define FWPERM_SECURE_USER_RWCD (FWPERM_SECURE_USER_READ | \
+ FWPERM_SECURE_USER_WRITE | \
+ FWPERM_SECURE_USER_CACHEABLE | \
+ FWPERM_SECURE_USER_DEBUG)
+
+#define FWPERM_NON_SECURE_PRIV_WRITE (1 << 8)
+#define FWPERM_NON_SECURE_PRIV_READ (1 << 9)
+#define FWPERM_NON_SECURE_PRIV_CACHEABLE (1 << 10)
+#define FWPERM_NON_SECURE_PRIV_DEBUG (1 << 11)
+
+#define FWPERM_NON_SECURE_PRIV_RWCD (FWPERM_NON_SECURE_PRIV_READ | \
+ FWPERM_NON_SECURE_PRIV_WRITE | \
+ FWPERM_NON_SECURE_PRIV_CACHEABLE | \
+ FWPERM_NON_SECURE_PRIV_DEBUG)
+
+#define FWPERM_NON_SECURE_USER_WRITE (1 << 12)
+#define FWPERM_NON_SECURE_USER_READ (1 << 13)
+#define FWPERM_NON_SECURE_USER_CACHEABLE (1 << 14)
+#define FWPERM_NON_SECURE_USER_DEBUG (1 << 15)
+
+#define FWPERM_NON_SECURE_USER_RWCD (FWPERM_NON_SECURE_USER_READ | \
+ FWPERM_NON_SECURE_USER_WRITE | \
+ FWPERM_NON_SECURE_USER_CACHEABLE | \
+ FWPERM_NON_SECURE_USER_DEBUG)
+
+#endif
diff --git a/arch/arm/dts/k3-serdes.h b/arch/arm/dts/k3-serdes.h
index 29167f8..21b4886 100644
--- a/arch/arm/dts/k3-serdes.h
+++ b/arch/arm/dts/k3-serdes.h
@@ -111,7 +111,7 @@
#define J721S2_SERDES0_LANE2_EDP_LANE2 0x0
#define J721S2_SERDES0_LANE2_PCIE1_LANE2 0x1
-#define J721S2_SERDES0_LANE2_IP3_UNUSED 0x2
+#define J721S2_SERDES0_LANE2_USB_SWAP 0x2
#define J721S2_SERDES0_LANE2_IP4_UNUSED 0x3
#define J721S2_SERDES0_LANE3_EDP_LANE3 0x0
diff --git a/arch/arm/dts/meson-gx-libretech-pc.dtsi b/arch/arm/dts/meson-gx-libretech-pc.dtsi
index 2d7032f..4e84ab8 100644
--- a/arch/arm/dts/meson-gx-libretech-pc.dtsi
+++ b/arch/arm/dts/meson-gx-libretech-pc.dtsi
@@ -17,7 +17,7 @@
io-channel-names = "buttons";
keyup-threshold-microvolt = <1800000>;
- update-button {
+ button-update {
label = "update";
linux,code = <KEY_VENDOR>;
press-threshold-microvolt = <1300000>;
@@ -416,7 +416,7 @@
pinctrl-names = "default";
status = "okay";
- gd25lq128: spi-flash@0 {
+ gd25lq128: flash@0 {
compatible = "jedec,spi-nor";
#address-cells = <1>;
#size-cells = <1>;
diff --git a/arch/arm/dts/meson-gx.dtsi b/arch/arm/dts/meson-gx.dtsi
index 6b457b2..11f89bf 100644
--- a/arch/arm/dts/meson-gx.dtsi
+++ b/arch/arm/dts/meson-gx.dtsi
@@ -49,6 +49,12 @@
no-map;
};
+ /* 32 MiB reserved for ARM Trusted Firmware (BL32) */
+ secmon_reserved_bl32: secmon@5300000 {
+ reg = <0x0 0x05300000 0x0 0x2000000>;
+ no-map;
+ };
+
linux,cma {
compatible = "shared-dma-pool";
reusable;
@@ -126,6 +132,7 @@
l2: l2-cache0 {
compatible = "cache";
+ cache-level = <2>;
};
};
@@ -226,7 +233,7 @@
reg = <0x14 0x10>;
};
- eth_mac: eth_mac@34 {
+ eth_mac: eth-mac@34 {
reg = <0x34 0x10>;
};
@@ -243,7 +250,7 @@
scpi_clocks: clocks {
compatible = "arm,scpi-clocks";
- scpi_dvfs: scpi_clocks@0 {
+ scpi_dvfs: clocks-0 {
compatible = "arm,scpi-dvfs-clocks";
#clock-cells = <1>;
clock-indices = <0>;
@@ -444,7 +451,7 @@
sysctrl_AO: sys-ctrl@0 {
compatible = "amlogic,meson-gx-ao-sysctrl", "simple-mfd", "syscon";
- reg = <0x0 0x0 0x0 0x100>;
+ reg = <0x0 0x0 0x0 0x100>;
clkc_AO: clock-controller {
compatible = "amlogic,meson-gx-aoclkc";
@@ -525,7 +532,7 @@
#size-cells = <2>;
ranges = <0x0 0x0 0x0 0xc8834000 0x0 0x2000>;
- hwrng: rng {
+ hwrng: rng@0 {
compatible = "amlogic,meson-rng";
reg = <0x0 0x0 0x0 0x4>;
};
@@ -596,21 +603,21 @@
sd_emmc_a: mmc@70000 {
compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc";
reg = <0x0 0x70000 0x0 0x800>;
- interrupts = <GIC_SPI 216 IRQ_TYPE_EDGE_RISING>;
+ interrupts = <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
sd_emmc_b: mmc@72000 {
compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc";
reg = <0x0 0x72000 0x0 0x800>;
- interrupts = <GIC_SPI 217 IRQ_TYPE_EDGE_RISING>;
+ interrupts = <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
sd_emmc_c: mmc@74000 {
compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc";
reg = <0x0 0x74000 0x0 0x800>;
- interrupts = <GIC_SPI 218 IRQ_TYPE_EDGE_RISING>;
+ interrupts = <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
};
diff --git a/arch/arm/dts/meson-gxbb-nanopi-k2.dts b/arch/arm/dts/meson-gxbb-nanopi-k2.dts
index 7273eed..7d94160 100644
--- a/arch/arm/dts/meson-gxbb-nanopi-k2.dts
+++ b/arch/arm/dts/meson-gxbb-nanopi-k2.dts
@@ -385,9 +385,20 @@
/* Bluetooth on AP6212 */
&uart_A {
- status = "disabled";
+ status = "okay";
pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
pinctrl-names = "default";
+ uart-has-rtscts;
+
+ bluetooth {
+ compatible = "brcm,bcm43438-bt";
+ clocks = <&wifi_32k>;
+ clock-names = "lpo";
+ vbat-supply = <&vddio_ao3v3>;
+ vddio-supply = <&vddio_ao18>;
+ host-wakeup-gpios = <&gpio GPIOX_21 GPIO_ACTIVE_HIGH>;
+ shutdown-gpios = <&gpio GPIOX_20 GPIO_ACTIVE_HIGH>;
+ };
};
/* 40-pin CON1 */
diff --git a/arch/arm/dts/meson-gxbb-odroidc2.dts b/arch/arm/dts/meson-gxbb-odroidc2.dts
index 2015962..0135643 100644
--- a/arch/arm/dts/meson-gxbb-odroidc2.dts
+++ b/arch/arm/dts/meson-gxbb-odroidc2.dts
@@ -250,21 +250,6 @@
};
};
-&gpio_ao {
- /*
- * WARNING: The USB Hub on the Odroid-C2 needs a reset signal
- * to be turned high in order to be detected by the USB Controller
- * This signal should be handled by a USB specific power sequence
- * in order to reset the Hub when USB bus is powered down.
- */
- hog-0 {
- gpio-hog;
- gpios = <GPIOAO_4 GPIO_ACTIVE_HIGH>;
- output-high;
- line-name = "usb-hub-reset";
- };
-};
-
&hdmi_tx {
status = "okay";
pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>;
@@ -414,5 +399,16 @@
};
&usb1 {
+ dr_mode = "host";
+ #address-cells = <1>;
+ #size-cells = <0>;
status = "okay";
+
+ hub@1 {
+ /* Genesys Logic GL852G USB 2.0 hub */
+ compatible = "usb5e3,610";
+ reg = <1>;
+ vdd-supply = <&p5v0>;
+ reset-gpio = <&gpio_ao GPIOAO_4 GPIO_ACTIVE_LOW>;
+ };
};
diff --git a/arch/arm/dts/meson-gxbb.dtsi b/arch/arm/dts/meson-gxbb.dtsi
index 7c029f5..12ef6e8 100644
--- a/arch/arm/dts/meson-gxbb.dtsi
+++ b/arch/arm/dts/meson-gxbb.dtsi
@@ -300,8 +300,8 @@
};
&gpio_intc {
- compatible = "amlogic,meson-gpio-intc",
- "amlogic,meson-gxbb-gpio-intc";
+ compatible = "amlogic,meson-gxbb-gpio-intc",
+ "amlogic,meson-gpio-intc";
status = "okay";
};
@@ -427,6 +427,20 @@
};
};
+ spi_idle_high_pins: spi-idle-high-pins {
+ mux {
+ groups = "spi_sclk";
+ bias-pull-up;
+ };
+ };
+
+ spi_idle_low_pins: spi-idle-low-pins {
+ mux {
+ groups = "spi_sclk";
+ bias-pull-down;
+ };
+ };
+
spi_ss0_pins: spi-ss0 {
mux {
groups = "spi_ss0";
diff --git a/arch/arm/dts/meson-gxl-s805x-libretech-ac.dts b/arch/arm/dts/meson-gxl-s805x-libretech-ac.dts
index 2d76920..213a070 100644
--- a/arch/arm/dts/meson-gxl-s805x-libretech-ac.dts
+++ b/arch/arm/dts/meson-gxl-s805x-libretech-ac.dts
@@ -298,7 +298,7 @@
pinctrl-0 = <&nor_pins>;
pinctrl-names = "default";
- w25q32: spi-flash@0 {
+ w25q32: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
diff --git a/arch/arm/dts/meson-gxl-s905w-jethome-jethub-j80.dts b/arch/arm/dts/meson-gxl-s905w-jethome-jethub-j80.dts
index 6eafb90..a18d6d2 100644
--- a/arch/arm/dts/meson-gxl-s905w-jethome-jethub-j80.dts
+++ b/arch/arm/dts/meson-gxl-s905w-jethome-jethub-j80.dts
@@ -86,11 +86,11 @@
};
&efuse {
- bt_mac: bt_mac@6 {
+ bt_mac: bt-mac@6 {
reg = <0x6 0x6>;
};
- wifi_mac: wifi_mac@C {
+ wifi_mac: wifi-mac@c {
reg = <0xc 0x6>;
};
};
@@ -213,6 +213,12 @@
pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
pinctrl-names = "default";
uart-has-rtscts;
+
+ bluetooth {
+ compatible = "realtek,rtl8822cs-bt";
+ enable-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
+ host-wake-gpios = <&gpio GPIOX_18 GPIO_ACTIVE_HIGH>;
+ };
};
&uart_C {
@@ -233,7 +239,7 @@
pinctrl-names = "default";
pinctrl-0 = <&i2c_b_pins>;
- pcf8563: pcf8563@51 {
+ pcf8563: rtc@51 {
compatible = "nxp,pcf8563";
reg = <0x51>;
status = "okay";
diff --git a/arch/arm/dts/meson-gxl-s905x-khadas-vim.dts b/arch/arm/dts/meson-gxl-s905x-khadas-vim.dts
index 60feac0..02f8183 100644
--- a/arch/arm/dts/meson-gxl-s905x-khadas-vim.dts
+++ b/arch/arm/dts/meson-gxl-s905x-khadas-vim.dts
@@ -140,7 +140,6 @@
compatible = "haoyu,hym8563";
reg = <0x51>;
#clock-cells = <0>;
- clock-frequency = <32768>;
clock-output-names = "xin32k";
};
};
@@ -218,20 +217,7 @@
};
&sd_emmc_a {
- brcmf: wifi@1 {
- reg = <1>;
- compatible = "brcm,bcm4329-fmac";
- };
-};
-
-&uart_A {
- bluetooth {
- compatible = "brcm,bcm43438-bt";
- shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
- max-speed = <2000000>;
- clocks = <&wifi32k>;
- clock-names = "lpo";
- };
+ max-frequency = <100000000>;
};
/* This is brought out on the Linux_RX (18) and Linux_TX (19) pins: */
diff --git a/arch/arm/dts/meson-gxl-s905x-libretech-cc-v2.dts b/arch/arm/dts/meson-gxl-s905x-libretech-cc-v2.dts
index 93d8f8a..6c4e68e 100644
--- a/arch/arm/dts/meson-gxl-s905x-libretech-cc-v2.dts
+++ b/arch/arm/dts/meson-gxl-s905x-libretech-cc-v2.dts
@@ -284,7 +284,7 @@
pinctrl-0 = <&nor_pins>;
pinctrl-names = "default";
- nor_4u1: spi-flash@0 {
+ nor_4u1: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
@@ -305,7 +305,6 @@
};
&usb2_phy0 {
- pinctrl-names = "default";
phy-supply = <&vcc5v>;
};
diff --git a/arch/arm/dts/meson-gxl-s905x-p212.dts b/arch/arm/dts/meson-gxl-s905x-p212.dts
index 2602940..9b4ea6a 100644
--- a/arch/arm/dts/meson-gxl-s905x-p212.dts
+++ b/arch/arm/dts/meson-gxl-s905x-p212.dts
@@ -7,11 +7,19 @@
/dts-v1/;
#include "meson-gxl-s905x-p212.dtsi"
+#include <dt-bindings/sound/meson-aiu.h>
/ {
compatible = "amlogic,p212", "amlogic,s905x", "amlogic,meson-gxl";
model = "Amlogic Meson GXL (S905X) P212 Development Board";
+ dio2133: analog-amplifier {
+ compatible = "simple-audio-amplifier";
+ sound-name-prefix = "AU2";
+ VCC-supply = <&hdmi_5v>;
+ enable-gpios = <&gpio GPIOH_5 GPIO_ACTIVE_HIGH>;
+ };
+
cvbs-connector {
compatible = "composite-video-connector";
@@ -32,6 +40,66 @@
};
};
};
+
+ sound {
+ compatible = "amlogic,gx-sound-card";
+ model = "S905X-P212";
+ audio-aux-devs = <&dio2133>;
+ audio-widgets = "Line", "Lineout";
+ audio-routing = "AU2 INL", "ACODEC LOLN",
+ "AU2 INR", "ACODEC LORN",
+ "Lineout", "AU2 OUTL",
+ "Lineout", "AU2 OUTR";
+ assigned-clocks = <&clkc CLKID_MPLL0>,
+ <&clkc CLKID_MPLL1>,
+ <&clkc CLKID_MPLL2>;
+ assigned-clock-parents = <0>, <0>, <0>;
+ assigned-clock-rates = <294912000>,
+ <270950400>,
+ <393216000>;
+ dai-link-0 {
+ sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>;
+ };
+
+ dai-link-1 {
+ sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>;
+ dai-format = "i2s";
+ mclk-fs = <256>;
+
+ codec-0 {
+ sound-dai = <&aiu AIU_HDMI CTRL_I2S>;
+ };
+
+ codec-1 {
+ sound-dai = <&aiu AIU_ACODEC CTRL_I2S>;
+ };
+ };
+
+ dai-link-2 {
+ sound-dai = <&aiu AIU_HDMI CTRL_OUT>;
+
+ codec-0 {
+ sound-dai = <&hdmi_tx>;
+ };
+ };
+
+ dai-link-3 {
+ sound-dai = <&aiu AIU_ACODEC CTRL_OUT>;
+
+ codec-0 {
+ sound-dai = <&acodec>;
+ };
+ };
+ };
+};
+
+&acodec {
+ AVDD-supply = <&vddio_ao18>;
+ status = "okay";
+};
+
+&aiu {
+ status = "okay";
};
&cec_AO {
diff --git a/arch/arm/dts/meson-gxl-s905x-p212.dtsi b/arch/arm/dts/meson-gxl-s905x-p212.dtsi
index 05cb2f5..a150cc0 100644
--- a/arch/arm/dts/meson-gxl-s905x-p212.dtsi
+++ b/arch/arm/dts/meson-gxl-s905x-p212.dtsi
@@ -97,6 +97,14 @@
pinctrl-names = "default";
};
+&pwm_ef {
+ status = "okay";
+ pinctrl-0 = <&pwm_e_pins>;
+ pinctrl-names = "default";
+ clocks = <&clkc CLKID_FCLK_DIV4>;
+ clock-names = "clkin0";
+};
+
&saradc {
status = "okay";
vref-supply = <&vddio_ao18>;
@@ -125,6 +133,11 @@
vmmc-supply = <&vddao_3v3>;
vqmmc-supply = <&vddio_boot>;
+
+ brcmf: wifi@1 {
+ reg = <1>;
+ compatible = "brcm,bcm4329-fmac";
+ };
};
/* SD card */
@@ -165,14 +178,6 @@
vqmmc-supply = <&vddio_boot>;
};
-&pwm_ef {
- status = "okay";
- pinctrl-0 = <&pwm_e_pins>;
- pinctrl-names = "default";
- clocks = <&clkc CLKID_FCLK_DIV4>;
- clock-names = "clkin0";
-};
-
/* This is connected to the Bluetooth module: */
&uart_A {
status = "okay";
diff --git a/arch/arm/dts/meson-gxl.dtsi b/arch/arm/dts/meson-gxl.dtsi
index c3ac531..17bcfa4 100644
--- a/arch/arm/dts/meson-gxl.dtsi
+++ b/arch/arm/dts/meson-gxl.dtsi
@@ -312,8 +312,8 @@
};
&gpio_intc {
- compatible = "amlogic,meson-gpio-intc",
- "amlogic,meson-gxl-gpio-intc";
+ compatible = "amlogic,meson-gxl-gpio-intc",
+ "amlogic,meson-gpio-intc";
status = "okay";
};
@@ -429,6 +429,20 @@
};
};
+ spi_idle_high_pins: spi-idle-high-pins {
+ mux {
+ groups = "spi_sclk";
+ bias-pull-up;
+ };
+ };
+
+ spi_idle_low_pins: spi-idle-low-pins {
+ mux {
+ groups = "spi_sclk";
+ bias-pull-down;
+ };
+ };
+
spi_ss0_pins: spi-ss0 {
mux {
groups = "spi_ss0";
@@ -759,16 +773,23 @@
};
};
- eth-phy-mux {
- compatible = "mdio-mux-mmioreg", "mdio-mux";
+ eth_phy_mux: mdio@558 {
+ reg = <0x0 0x558 0x0 0xc>;
+ compatible = "amlogic,gxl-mdio-mux";
#address-cells = <1>;
#size-cells = <0>;
- reg = <0x0 0x55c 0x0 0x4>;
- mux-mask = <0xffffffff>;
+ clocks = <&clkc CLKID_FCLK_DIV4>;
+ clock-names = "ref";
mdio-parent-bus = <&mdio0>;
- internal_mdio: mdio@e40908ff {
- reg = <0xe40908ff>;
+ external_mdio: mdio@0 {
+ reg = <0x0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ internal_mdio: mdio@1 {
+ reg = <0x1>;
#address-cells = <1>;
#size-cells = <0>;
@@ -779,12 +800,6 @@
max-speed = <100>;
};
};
-
- external_mdio: mdio@2009087f {
- reg = <0x2009087f>;
- #address-cells = <1>;
- #size-cells = <0>;
- };
};
};
diff --git a/arch/arm/dts/meson-gxm-khadas-vim2.dts b/arch/arm/dts/meson-gxm-khadas-vim2.dts
index 18a4b7a..74897a1 100644
--- a/arch/arm/dts/meson-gxm-khadas-vim2.dts
+++ b/arch/arm/dts/meson-gxm-khadas-vim2.dts
@@ -52,10 +52,11 @@
gpios = <&gpio GPIODV_14 GPIO_ACTIVE_HIGH
&gpio GPIODV_15 GPIO_ACTIVE_HIGH>;
/* Dummy RPM values since fan is optional */
- gpio-fan,speed-map = <0 0
- 1 1
- 2 2
- 3 3>;
+ gpio-fan,speed-map =
+ <0 0>,
+ <1 1>,
+ <2 2>,
+ <3 3>;
#cooling-cells = <2>;
};
@@ -270,7 +271,6 @@
compatible = "haoyu,hym8563";
reg = <0x51>;
#clock-cells = <0>;
- clock-frequency = <32768>;
clock-output-names = "xin32k";
};
};
@@ -307,7 +307,8 @@
#size-cells = <0>;
bus-width = <4>;
- max-frequency = <60000000>;
+ cap-sd-highspeed;
+ max-frequency = <100000000>;
non-removable;
disable-wp;
@@ -373,7 +374,7 @@
pinctrl-0 = <&nor_pins>;
pinctrl-names = "default";
- w25q32: spi-flash@0 {
+ w25q32: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "winbond,w25q16", "jedec,spi-nor";
diff --git a/arch/arm/dts/meson-gxm-wetek-core2.dts b/arch/arm/dts/meson-gxm-wetek-core2.dts
index 1e7f77f..f8c4034 100644
--- a/arch/arm/dts/meson-gxm-wetek-core2.dts
+++ b/arch/arm/dts/meson-gxm-wetek-core2.dts
@@ -45,8 +45,6 @@
gpio-keys-polled {
compatible = "gpio-keys-polled";
- #address-cells = <1>;
- #size-cells = <0>;
poll-interval = <100>;
button-power {
diff --git a/arch/arm/dts/mt6357.dtsi b/arch/arm/dts/mt6357.dtsi
new file mode 100644
index 0000000..3330a03
--- /dev/null
+++ b/arch/arm/dts/mt6357.dtsi
@@ -0,0 +1,282 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright (c) 2020 MediaTek Inc.
+ * Copyright (c) 2023 BayLibre Inc.
+ */
+
+#include <dt-bindings/input/input.h>
+
+&pwrap {
+ mt6357_pmic: pmic {
+ compatible = "mediatek,mt6357";
+
+ regulators {
+ mt6357_vproc_reg: buck-vproc {
+ regulator-name = "vproc";
+ regulator-min-microvolt = <518750>;
+ regulator-max-microvolt = <1312500>;
+ regulator-ramp-delay = <6250>;
+ regulator-enable-ramp-delay = <220>;
+ regulator-always-on;
+ };
+
+ mt6357_vcore_reg: buck-vcore {
+ regulator-name = "vcore";
+ regulator-min-microvolt = <518750>;
+ regulator-max-microvolt = <1312500>;
+ regulator-ramp-delay = <6250>;
+ regulator-enable-ramp-delay = <220>;
+ regulator-always-on;
+ };
+
+ mt6357_vmodem_reg: buck-vmodem {
+ regulator-name = "vmodem";
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <1193750>;
+ regulator-ramp-delay = <6250>;
+ regulator-enable-ramp-delay = <220>;
+ };
+
+ mt6357_vs1_reg: buck-vs1 {
+ regulator-name = "vs1";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <2200000>;
+ regulator-ramp-delay = <12500>;
+ regulator-enable-ramp-delay = <220>;
+ regulator-always-on;
+ };
+
+ mt6357_vpa_reg: buck-vpa {
+ regulator-name = "vpa";
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <3650000>;
+ regulator-ramp-delay = <50000>;
+ regulator-enable-ramp-delay = <220>;
+ };
+
+ mt6357_vfe28_reg: ldo-vfe28 {
+ compatible = "regulator-fixed";
+ regulator-name = "vfe28";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-enable-ramp-delay = <264>;
+ };
+
+ mt6357_vxo22_reg: ldo-vxo22 {
+ regulator-name = "vxo22";
+ regulator-min-microvolt = <2200000>;
+ regulator-max-microvolt = <2400000>;
+ regulator-enable-ramp-delay = <110>;
+ };
+
+ mt6357_vrf18_reg: ldo-vrf18 {
+ compatible = "regulator-fixed";
+ regulator-name = "vrf18";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-enable-ramp-delay = <110>;
+ };
+
+ mt6357_vrf12_reg: ldo-vrf12 {
+ compatible = "regulator-fixed";
+ regulator-name = "vrf12";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-enable-ramp-delay = <110>;
+ };
+
+ mt6357_vefuse_reg: ldo-vefuse {
+ regulator-name = "vefuse";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-enable-ramp-delay = <264>;
+ };
+
+ mt6357_vcn33_bt_reg: ldo-vcn33-bt {
+ regulator-name = "vcn33-bt";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3500000>;
+ regulator-enable-ramp-delay = <264>;
+ };
+
+ mt6357_vcn33_wifi_reg: ldo-vcn33-wifi {
+ regulator-name = "vcn33-wifi";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3500000>;
+ regulator-enable-ramp-delay = <264>;
+ };
+
+ mt6357_vcn28_reg: ldo-vcn28 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcn28";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-enable-ramp-delay = <264>;
+ };
+
+ mt6357_vcn18_reg: ldo-vcn18 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcn18";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-enable-ramp-delay = <264>;
+ };
+
+ mt6357_vcama_reg: ldo-vcama {
+ regulator-name = "vcama";
+ regulator-min-microvolt = <2500000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-enable-ramp-delay = <264>;
+ };
+
+ mt6357_vcamd_reg: ldo-vcamd {
+ regulator-name = "vcamd";
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-enable-ramp-delay = <264>;
+ };
+
+ mt6357_vcamio_reg: ldo-vcamio18 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcamio";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-enable-ramp-delay = <264>;
+ };
+
+ mt6357_vldo28_reg: ldo-vldo28 {
+ regulator-name = "vldo28";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-enable-ramp-delay = <264>;
+ };
+
+ mt6357_vsram_others_reg: ldo-vsram-others {
+ regulator-name = "vsram-others";
+ regulator-min-microvolt = <518750>;
+ regulator-max-microvolt = <1312500>;
+ regulator-ramp-delay = <6250>;
+ regulator-enable-ramp-delay = <110>;
+ regulator-always-on;
+ };
+
+ mt6357_vsram_proc_reg: ldo-vsram-proc {
+ regulator-name = "vsram-proc";
+ regulator-min-microvolt = <518750>;
+ regulator-max-microvolt = <1312500>;
+ regulator-ramp-delay = <6250>;
+ regulator-enable-ramp-delay = <110>;
+ regulator-always-on;
+ };
+
+ mt6357_vaux18_reg: ldo-vaux18 {
+ compatible = "regulator-fixed";
+ regulator-name = "vaux18";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-enable-ramp-delay = <264>;
+ };
+
+ mt6357_vaud28_reg: ldo-vaud28 {
+ compatible = "regulator-fixed";
+ regulator-name = "vaud28";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-enable-ramp-delay = <264>;
+ };
+
+ mt6357_vio28_reg: ldo-vio28 {
+ compatible = "regulator-fixed";
+ regulator-name = "vio28";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-enable-ramp-delay = <264>;
+ };
+
+ mt6357_vio18_reg: ldo-vio18 {
+ compatible = "regulator-fixed";
+ regulator-name = "vio18";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-enable-ramp-delay = <264>;
+ regulator-always-on;
+ };
+
+ mt6357_vdram_reg: ldo-vdram {
+ regulator-name = "vdram";
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-enable-ramp-delay = <3300>;
+ };
+
+ mt6357_vmc_reg: ldo-vmc {
+ regulator-name = "vmc";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-enable-ramp-delay = <44>;
+ };
+
+ mt6357_vmch_reg: ldo-vmch {
+ regulator-name = "vmch";
+ regulator-min-microvolt = <2900000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-enable-ramp-delay = <44>;
+ };
+
+ mt6357_vemc_reg: ldo-vemc {
+ regulator-name = "vemc";
+ regulator-min-microvolt = <2900000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-enable-ramp-delay = <44>;
+ regulator-always-on;
+ };
+
+ mt6357_vsim1_reg: ldo-vsim1 {
+ regulator-name = "vsim1";
+ regulator-min-microvolt = <1700000>;
+ regulator-max-microvolt = <3100000>;
+ regulator-enable-ramp-delay = <264>;
+ };
+
+ mt6357_vsim2_reg: ldo-vsim2 {
+ regulator-name = "vsim2";
+ regulator-min-microvolt = <1700000>;
+ regulator-max-microvolt = <3100000>;
+ regulator-enable-ramp-delay = <264>;
+ };
+
+ mt6357_vibr_reg: ldo-vibr {
+ regulator-name = "vibr";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-enable-ramp-delay = <44>;
+ };
+
+ mt6357_vusb33_reg: ldo-vusb33 {
+ regulator-name = "vusb33";
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3100000>;
+ regulator-enable-ramp-delay = <264>;
+ };
+ };
+
+ rtc {
+ compatible = "mediatek,mt6357-rtc";
+ };
+
+ keys {
+ compatible = "mediatek,mt6357-keys";
+
+ key-power {
+ linux,keycodes = <KEY_POWER>;
+ wakeup-source;
+ };
+
+ key-home {
+ linux,keycodes = <KEY_HOME>;
+ wakeup-source;
+ };
+
+ };
+ };
+};
diff --git a/arch/arm/dts/mt8365-evk.dts b/arch/arm/dts/mt8365-evk.dts
new file mode 100644
index 0000000..50cbaef
--- /dev/null
+++ b/arch/arm/dts/mt8365-evk.dts
@@ -0,0 +1,418 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2021-2022 BayLibre, SAS.
+ * Authors:
+ * Fabien Parent <fparent@baylibre.com>
+ * Bernhard Rosenkränzer <bero@baylibre.com>
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/pinctrl/mt8365-pinfunc.h>
+#include "mt8365.dtsi"
+#include "mt6357.dtsi"
+
+/ {
+ model = "MediaTek MT8365 Open Platform EVK";
+ compatible = "mediatek,mt8365-evk", "mediatek,mt8365";
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:921600n8";
+ };
+
+ firmware {
+ optee {
+ compatible = "linaro,optee-tz";
+ method = "smc";
+ };
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+ pinctrl-names = "default";
+ pinctrl-0 = <&gpio_keys>;
+
+ key-volume-up {
+ gpios = <&pio 24 GPIO_ACTIVE_LOW>;
+ label = "volume_up";
+ linux,code = <KEY_VOLUMEUP>;
+ wakeup-source;
+ debounce-interval = <15>;
+ };
+ };
+
+ memory@40000000 {
+ device_type = "memory";
+ reg = <0 0x40000000 0 0xc0000000>;
+ };
+
+ usb_otg_vbus: regulator-0 {
+ compatible = "regulator-fixed";
+ regulator-name = "otg_vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ gpio = <&pio 16 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
+ reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ /* 192 KiB reserved for ARM Trusted Firmware (BL31) */
+ bl31_secmon_reserved: secmon@43000000 {
+ no-map;
+ reg = <0 0x43000000 0 0x30000>;
+ };
+
+ /* 12 MiB reserved for OP-TEE (BL32)
+ * +-----------------------+ 0x43e0_0000
+ * | SHMEM 2MiB |
+ * +-----------------------+ 0x43c0_0000
+ * | | TA_RAM 8MiB |
+ * + TZDRAM +--------------+ 0x4340_0000
+ * | | TEE_RAM 2MiB |
+ * +-----------------------+ 0x4320_0000
+ */
+ optee_reserved: optee@43200000 {
+ no-map;
+ reg = <0 0x43200000 0 0x00c00000>;
+ };
+ };
+};
+
+&cpu0 {
+ proc-supply = <&mt6357_vproc_reg>;
+ sram-supply = <&mt6357_vsram_proc_reg>;
+};
+
+&cpu1 {
+ proc-supply = <&mt6357_vproc_reg>;
+ sram-supply = <&mt6357_vsram_proc_reg>;
+};
+
+&cpu2 {
+ proc-supply = <&mt6357_vproc_reg>;
+ sram-supply = <&mt6357_vsram_proc_reg>;
+};
+
+&cpu3 {
+ proc-supply = <&mt6357_vproc_reg>;
+ sram-supply = <&mt6357_vsram_proc_reg>;
+};
+
+ðernet {
+ pinctrl-0 = <ðernet_pins>;
+ pinctrl-names = "default";
+ phy-handle = <ð_phy>;
+ phy-mode = "rmii";
+ /*
+ * Ethernet and HDMI (DSI0) are sharing pins.
+ * Only one can be enabled at a time and require the physical switch
+ * SW2101 to be set on LAN position
+ * mt6357_vibr_reg and mt6357_vsim2_reg are needed to supply ethernet
+ */
+ status = "disabled";
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ eth_phy: ethernet-phy@0 {
+ reg = <0>;
+ };
+ };
+};
+
+&i2c0 {
+ clock-frequency = <100000>;
+ pinctrl-0 = <&i2c0_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+};
+
+&mmc0 {
+ assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL>;
+ assigned-clocks = <&topckgen CLK_TOP_MSDC50_0_SEL>;
+ bus-width = <8>;
+ cap-mmc-highspeed;
+ cap-mmc-hw-reset;
+ hs400-ds-delay = <0x12012>;
+ max-frequency = <200000000>;
+ mmc-hs200-1_8v;
+ mmc-hs400-1_8v;
+ no-sd;
+ no-sdio;
+ non-removable;
+ pinctrl-0 = <&mmc0_default_pins>;
+ pinctrl-1 = <&mmc0_uhs_pins>;
+ pinctrl-names = "default", "state_uhs";
+ vmmc-supply = <&mt6357_vemc_reg>;
+ vqmmc-supply = <&mt6357_vio18_reg>;
+ status = "okay";
+};
+
+&mmc1 {
+ bus-width = <4>;
+ cap-sd-highspeed;
+ cd-gpios = <&pio 76 GPIO_ACTIVE_LOW>;
+ max-frequency = <200000000>;
+ pinctrl-0 = <&mmc1_default_pins>;
+ pinctrl-1 = <&mmc1_uhs_pins>;
+ pinctrl-names = "default", "state_uhs";
+ sd-uhs-sdr104;
+ sd-uhs-sdr50;
+ vmmc-supply = <&mt6357_vmch_reg>;
+ vqmmc-supply = <&mt6357_vmc_reg>;
+ status = "okay";
+};
+
+&mt6357_pmic {
+ interrupts-extended = <&pio 145 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+};
+
+&pio {
+ ethernet_pins: ethernet-pins {
+ phy_reset_pins {
+ pinmux = <MT8365_PIN_133_TDM_TX_DATA1__FUNC_GPIO133>;
+ };
+
+ rmii_pins {
+ pinmux = <MT8365_PIN_0_GPIO0__FUNC_EXT_TXD0>,
+ <MT8365_PIN_1_GPIO1__FUNC_EXT_TXD1>,
+ <MT8365_PIN_2_GPIO2__FUNC_EXT_TXD2>,
+ <MT8365_PIN_3_GPIO3__FUNC_EXT_TXD3>,
+ <MT8365_PIN_4_GPIO4__FUNC_EXT_TXC>,
+ <MT8365_PIN_5_GPIO5__FUNC_EXT_RXER>,
+ <MT8365_PIN_6_GPIO6__FUNC_EXT_RXC>,
+ <MT8365_PIN_7_GPIO7__FUNC_EXT_RXDV>,
+ <MT8365_PIN_8_GPIO8__FUNC_EXT_RXD0>,
+ <MT8365_PIN_9_GPIO9__FUNC_EXT_RXD1>,
+ <MT8365_PIN_10_GPIO10__FUNC_EXT_RXD2>,
+ <MT8365_PIN_11_GPIO11__FUNC_EXT_RXD3>,
+ <MT8365_PIN_12_GPIO12__FUNC_EXT_TXEN>,
+ <MT8365_PIN_13_GPIO13__FUNC_EXT_COL>,
+ <MT8365_PIN_14_GPIO14__FUNC_EXT_MDIO>,
+ <MT8365_PIN_15_GPIO15__FUNC_EXT_MDC>;
+ };
+ };
+
+ gpio_keys: gpio-keys-pins {
+ pins {
+ pinmux = <MT8365_PIN_24_KPCOL0__FUNC_KPCOL0>;
+ bias-pull-up;
+ input-enable;
+ };
+ };
+
+ i2c0_pins: i2c0-pins {
+ pins {
+ pinmux = <MT8365_PIN_57_SDA0__FUNC_SDA0_0>,
+ <MT8365_PIN_58_SCL0__FUNC_SCL0_0>;
+ bias-pull-up;
+ };
+ };
+
+ mmc0_default_pins: mmc0-default-pins {
+ clk-pins {
+ pinmux = <MT8365_PIN_99_MSDC0_CLK__FUNC_MSDC0_CLK>;
+ bias-pull-down;
+ };
+
+ cmd-dat-pins {
+ pinmux = <MT8365_PIN_103_MSDC0_DAT0__FUNC_MSDC0_DAT0>,
+ <MT8365_PIN_102_MSDC0_DAT1__FUNC_MSDC0_DAT1>,
+ <MT8365_PIN_101_MSDC0_DAT2__FUNC_MSDC0_DAT2>,
+ <MT8365_PIN_100_MSDC0_DAT3__FUNC_MSDC0_DAT3>,
+ <MT8365_PIN_96_MSDC0_DAT4__FUNC_MSDC0_DAT4>,
+ <MT8365_PIN_95_MSDC0_DAT5__FUNC_MSDC0_DAT5>,
+ <MT8365_PIN_94_MSDC0_DAT6__FUNC_MSDC0_DAT6>,
+ <MT8365_PIN_93_MSDC0_DAT7__FUNC_MSDC0_DAT7>,
+ <MT8365_PIN_98_MSDC0_CMD__FUNC_MSDC0_CMD>;
+ input-enable;
+ bias-pull-up;
+ };
+
+ rst-pins {
+ pinmux = <MT8365_PIN_97_MSDC0_RSTB__FUNC_MSDC0_RSTB>;
+ bias-pull-up;
+ };
+ };
+
+ mmc0_uhs_pins: mmc0-uhs-pins {
+ clk-pins {
+ pinmux = <MT8365_PIN_99_MSDC0_CLK__FUNC_MSDC0_CLK>;
+ drive-strength = <MTK_DRIVE_10mA>;
+ bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
+ };
+
+ cmd-dat-pins {
+ pinmux = <MT8365_PIN_103_MSDC0_DAT0__FUNC_MSDC0_DAT0>,
+ <MT8365_PIN_102_MSDC0_DAT1__FUNC_MSDC0_DAT1>,
+ <MT8365_PIN_101_MSDC0_DAT2__FUNC_MSDC0_DAT2>,
+ <MT8365_PIN_100_MSDC0_DAT3__FUNC_MSDC0_DAT3>,
+ <MT8365_PIN_96_MSDC0_DAT4__FUNC_MSDC0_DAT4>,
+ <MT8365_PIN_95_MSDC0_DAT5__FUNC_MSDC0_DAT5>,
+ <MT8365_PIN_94_MSDC0_DAT6__FUNC_MSDC0_DAT6>,
+ <MT8365_PIN_93_MSDC0_DAT7__FUNC_MSDC0_DAT7>,
+ <MT8365_PIN_98_MSDC0_CMD__FUNC_MSDC0_CMD>;
+ input-enable;
+ drive-strength = <MTK_DRIVE_10mA>;
+ bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
+ };
+
+ ds-pins {
+ pinmux = <MT8365_PIN_104_MSDC0_DSL__FUNC_MSDC0_DSL>;
+ drive-strength = <MTK_DRIVE_10mA>;
+ bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
+ };
+
+ rst-pins {
+ pinmux = <MT8365_PIN_97_MSDC0_RSTB__FUNC_MSDC0_RSTB>;
+ drive-strength = <MTK_DRIVE_10mA>;
+ bias-pull-up;
+ };
+ };
+
+ mmc1_default_pins: mmc1-default-pins {
+ cd-pins {
+ pinmux = <MT8365_PIN_76_CMDAT8__FUNC_GPIO76>;
+ bias-pull-up;
+ };
+
+ clk-pins {
+ pinmux = <MT8365_PIN_88_MSDC1_CLK__FUNC_MSDC1_CLK>;
+ bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
+ };
+
+ cmd-dat-pins {
+ pinmux = <MT8365_PIN_89_MSDC1_DAT0__FUNC_MSDC1_DAT0>,
+ <MT8365_PIN_90_MSDC1_DAT1__FUNC_MSDC1_DAT1>,
+ <MT8365_PIN_91_MSDC1_DAT2__FUNC_MSDC1_DAT2>,
+ <MT8365_PIN_92_MSDC1_DAT3__FUNC_MSDC1_DAT3>,
+ <MT8365_PIN_87_MSDC1_CMD__FUNC_MSDC1_CMD>;
+ input-enable;
+ bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
+ };
+ };
+
+ mmc1_uhs_pins: mmc1-uhs-pins {
+ clk-pins {
+ pinmux = <MT8365_PIN_88_MSDC1_CLK__FUNC_MSDC1_CLK>;
+ drive-strength = <MTK_DRIVE_8mA>;
+ bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
+ };
+
+ cmd-dat-pins {
+ pinmux = <MT8365_PIN_89_MSDC1_DAT0__FUNC_MSDC1_DAT0>,
+ <MT8365_PIN_90_MSDC1_DAT1__FUNC_MSDC1_DAT1>,
+ <MT8365_PIN_91_MSDC1_DAT2__FUNC_MSDC1_DAT2>,
+ <MT8365_PIN_92_MSDC1_DAT3__FUNC_MSDC1_DAT3>,
+ <MT8365_PIN_87_MSDC1_CMD__FUNC_MSDC1_CMD>;
+ input-enable;
+ drive-strength = <MTK_DRIVE_6mA>;
+ bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
+ };
+ };
+
+ uart0_pins: uart0-pins {
+ pins {
+ pinmux = <MT8365_PIN_35_URXD0__FUNC_URXD0>,
+ <MT8365_PIN_36_UTXD0__FUNC_UTXD0>;
+ };
+ };
+
+ uart1_pins: uart1-pins {
+ pins {
+ pinmux = <MT8365_PIN_37_URXD1__FUNC_URXD1>,
+ <MT8365_PIN_38_UTXD1__FUNC_UTXD1>;
+ };
+ };
+
+ uart2_pins: uart2-pins {
+ pins {
+ pinmux = <MT8365_PIN_39_URXD2__FUNC_URXD2>,
+ <MT8365_PIN_40_UTXD2__FUNC_UTXD2>;
+ };
+ };
+
+ usb_pins: usb-pins {
+ id-pins {
+ pinmux = <MT8365_PIN_17_GPIO17__FUNC_GPIO17>;
+ input-enable;
+ bias-pull-up;
+ };
+
+ usb0-vbus-pins {
+ pinmux = <MT8365_PIN_16_GPIO16__FUNC_USB_DRVVBUS>;
+ output-high;
+ };
+
+ usb1-vbus-pins {
+ pinmux = <MT8365_PIN_18_GPIO18__FUNC_GPIO18>;
+ output-high;
+ };
+ };
+
+ pwm_pins: pwm-pins {
+ pins {
+ pinmux = <MT8365_PIN_19_DISP_PWM__FUNC_PWM_A>,
+ <MT8365_PIN_116_I2S_BCK__FUNC_PWM_C>;
+ };
+ };
+};
+
+&pwm {
+ pinctrl-0 = <&pwm_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+};
+
+&ssusb {
+ dr_mode = "otg";
+ maximum-speed = "high-speed";
+ pinctrl-0 = <&usb_pins>;
+ pinctrl-names = "default";
+ usb-role-switch;
+ vusb33-supply = <&mt6357_vusb33_reg>;
+ status = "okay";
+
+ connector {
+ compatible = "gpio-usb-b-connector", "usb-b-connector";
+ id-gpios = <&pio 17 GPIO_ACTIVE_HIGH>;
+ type = "micro";
+ vbus-supply = <&usb_otg_vbus>;
+ };
+};
+
+&usb_host {
+ vusb33-supply = <&mt6357_vusb33_reg>;
+ status = "okay";
+};
+
+&uart0 {
+ pinctrl-0 = <&uart0_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+};
+
+&uart1 {
+ pinctrl-0 = <&uart1_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+};
+
+&uart2 {
+ pinctrl-0 = <&uart2_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+};
diff --git a/arch/arm/dts/mt8365.dtsi b/arch/arm/dts/mt8365.dtsi
new file mode 100644
index 0000000..24581f7
--- /dev/null
+++ b/arch/arm/dts/mt8365.dtsi
@@ -0,0 +1,840 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * (C) 2018 MediaTek Inc.
+ * Copyright (C) 2022 BayLibre SAS
+ * Fabien Parent <fparent@baylibre.com>
+ * Bernhard Rosenkränzer <bero@baylibre.com>
+ */
+#include <dt-bindings/clock/mediatek,mt8365-clk.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/phy/phy.h>
+#include <dt-bindings/power/mediatek,mt8365-power.h>
+
+/ {
+ compatible = "mediatek,mt8365";
+ interrupt-parent = <&sysirq>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cluster0_opp: opp-table-0 {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp-850000000 {
+ opp-hz = /bits/ 64 <850000000>;
+ opp-microvolt = <650000>;
+ };
+
+ opp-918000000 {
+ opp-hz = /bits/ 64 <918000000>;
+ opp-microvolt = <668750>;
+ };
+
+ opp-987000000 {
+ opp-hz = /bits/ 64 <987000000>;
+ opp-microvolt = <687500>;
+ };
+
+ opp-1056000000 {
+ opp-hz = /bits/ 64 <1056000000>;
+ opp-microvolt = <706250>;
+ };
+
+ opp-1125000000 {
+ opp-hz = /bits/ 64 <1125000000>;
+ opp-microvolt = <725000>;
+ };
+
+ opp-1216000000 {
+ opp-hz = /bits/ 64 <1216000000>;
+ opp-microvolt = <750000>;
+ };
+
+ opp-1308000000 {
+ opp-hz = /bits/ 64 <1308000000>;
+ opp-microvolt = <775000>;
+ };
+
+ opp-1400000000 {
+ opp-hz = /bits/ 64 <1400000000>;
+ opp-microvolt = <800000>;
+ };
+
+ opp-1466000000 {
+ opp-hz = /bits/ 64 <1466000000>;
+ opp-microvolt = <825000>;
+ };
+
+ opp-1533000000 {
+ opp-hz = /bits/ 64 <1533000000>;
+ opp-microvolt = <850000>;
+ };
+
+ opp-1633000000 {
+ opp-hz = /bits/ 64 <1633000000>;
+ opp-microvolt = <887500>;
+ };
+
+ opp-1700000000 {
+ opp-hz = /bits/ 64 <1700000000>;
+ opp-microvolt = <912500>;
+ };
+
+ opp-1767000000 {
+ opp-hz = /bits/ 64 <1767000000>;
+ opp-microvolt = <937500>;
+ };
+
+ opp-1834000000 {
+ opp-hz = /bits/ 64 <1834000000>;
+ opp-microvolt = <962500>;
+ };
+
+ opp-1917000000 {
+ opp-hz = /bits/ 64 <1917000000>;
+ opp-microvolt = <993750>;
+ };
+
+ opp-2001000000 {
+ opp-hz = /bits/ 64 <2001000000>;
+ opp-microvolt = <1025000>;
+ };
+ };
+
+ cpu-map {
+ cluster0 {
+ core0 {
+ cpu = <&cpu0>;
+ };
+ core1 {
+ cpu = <&cpu1>;
+ };
+ core2 {
+ cpu = <&cpu2>;
+ };
+ core3 {
+ cpu = <&cpu3>;
+ };
+ };
+ };
+
+ cpu0: cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = <0x0>;
+ #cooling-cells = <2>;
+ enable-method = "psci";
+ cpu-idle-states = <&CPU_MCDI &CLUSTER_MCDI &CLUSTER_DPIDLE>;
+ i-cache-size = <0x8000>;
+ i-cache-line-size = <64>;
+ i-cache-sets = <256>;
+ d-cache-size = <0x8000>;
+ d-cache-line-size = <64>;
+ d-cache-sets = <256>;
+ next-level-cache = <&l2>;
+ clocks = <&mcucfg CLK_MCU_BUS_SEL>,
+ <&apmixedsys CLK_APMIXED_MAINPLL>;
+ clock-names = "cpu", "intermediate";
+ operating-points-v2 = <&cluster0_opp>;
+ };
+
+ cpu1: cpu@1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = <0x1>;
+ #cooling-cells = <2>;
+ enable-method = "psci";
+ cpu-idle-states = <&CPU_MCDI &CLUSTER_MCDI &CLUSTER_DPIDLE>;
+ i-cache-size = <0x8000>;
+ i-cache-line-size = <64>;
+ i-cache-sets = <256>;
+ d-cache-size = <0x8000>;
+ d-cache-line-size = <64>;
+ d-cache-sets = <256>;
+ next-level-cache = <&l2>;
+ clocks = <&mcucfg CLK_MCU_BUS_SEL>,
+ <&apmixedsys CLK_APMIXED_MAINPLL>;
+ clock-names = "cpu", "intermediate", "armpll";
+ operating-points-v2 = <&cluster0_opp>;
+ };
+
+ cpu2: cpu@2 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = <0x2>;
+ #cooling-cells = <2>;
+ enable-method = "psci";
+ cpu-idle-states = <&CPU_MCDI &CLUSTER_MCDI &CLUSTER_DPIDLE>;
+ i-cache-size = <0x8000>;
+ i-cache-line-size = <64>;
+ i-cache-sets = <256>;
+ d-cache-size = <0x8000>;
+ d-cache-line-size = <64>;
+ d-cache-sets = <256>;
+ next-level-cache = <&l2>;
+ clocks = <&mcucfg CLK_MCU_BUS_SEL>,
+ <&apmixedsys CLK_APMIXED_MAINPLL>;
+ clock-names = "cpu", "intermediate", "armpll";
+ operating-points-v2 = <&cluster0_opp>;
+ };
+
+ cpu3: cpu@3 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = <0x3>;
+ #cooling-cells = <2>;
+ enable-method = "psci";
+ cpu-idle-states = <&CPU_MCDI &CLUSTER_MCDI &CLUSTER_DPIDLE>;
+ i-cache-size = <0x8000>;
+ i-cache-line-size = <64>;
+ i-cache-sets = <256>;
+ d-cache-size = <0x8000>;
+ d-cache-line-size = <64>;
+ d-cache-sets = <256>;
+ next-level-cache = <&l2>;
+ clocks = <&mcucfg CLK_MCU_BUS_SEL>,
+ <&apmixedsys CLK_APMIXED_MAINPLL>;
+ clock-names = "cpu", "intermediate", "armpll";
+ operating-points-v2 = <&cluster0_opp>;
+ };
+
+ idle-states {
+ entry-method = "psci";
+
+ CPU_MCDI: cpu-mcdi {
+ compatible = "arm,idle-state";
+ local-timer-stop;
+ arm,psci-suspend-param = <0x00010001>;
+ entry-latency-us = <300>;
+ exit-latency-us = <200>;
+ min-residency-us = <1000>;
+ };
+
+ CLUSTER_MCDI: cluster-mcdi {
+ compatible = "arm,idle-state";
+ local-timer-stop;
+ arm,psci-suspend-param = <0x01010001>;
+ entry-latency-us = <350>;
+ exit-latency-us = <250>;
+ min-residency-us = <1200>;
+ };
+
+ CLUSTER_DPIDLE: cluster-dpidle {
+ compatible = "arm,idle-state";
+ local-timer-stop;
+ arm,psci-suspend-param = <0x01010004>;
+ entry-latency-us = <300>;
+ exit-latency-us = <800>;
+ min-residency-us = <3300>;
+ };
+ };
+
+ l2: l2-cache {
+ compatible = "cache";
+ cache-level = <2>;
+ cache-size = <0x80000>;
+ cache-line-size = <64>;
+ cache-sets = <512>;
+ cache-unified;
+ };
+ };
+
+ clk26m: oscillator {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <26000000>;
+ clock-output-names = "clk26m";
+ };
+
+ psci {
+ compatible = "arm,psci-1.0";
+ method = "smc";
+ };
+
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ compatible = "simple-bus";
+ ranges;
+
+ gic: interrupt-controller@c000000 {
+ compatible = "arm,gic-v3";
+ #interrupt-cells = <3>;
+ interrupt-parent = <&gic>;
+ interrupt-controller;
+ reg = <0 0x0c000000 0 0x10000>, /* GICD */
+ <0 0x0c080000 0 0x80000>, /* GICR */
+ <0 0x0c400000 0 0x2000>, /* GICC */
+ <0 0x0c410000 0 0x1000>, /* GICH */
+ <0 0x0c420000 0 0x2000>; /* GICV */
+
+ interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ topckgen: syscon@10000000 {
+ compatible = "mediatek,mt8365-topckgen", "syscon";
+ reg = <0 0x10000000 0 0x1000>;
+ #clock-cells = <1>;
+ };
+
+ infracfg: syscon@10001000 {
+ compatible = "mediatek,mt8365-infracfg", "syscon";
+ reg = <0 0x10001000 0 0x1000>;
+ #clock-cells = <1>;
+ };
+
+ pericfg: syscon@10003000 {
+ compatible = "mediatek,mt8365-pericfg", "syscon";
+ reg = <0 0x10003000 0 0x1000>;
+ #clock-cells = <1>;
+ };
+
+ syscfg_pctl: syscfg-pctl@10005000 {
+ compatible = "mediatek,mt8365-syscfg", "syscon";
+ reg = <0 0x10005000 0 0x1000>;
+ };
+
+ scpsys: syscon@10006000 {
+ compatible = "mediatek,mt8365-syscfg", "syscon", "simple-mfd";
+ reg = <0 0x10006000 0 0x1000>;
+ #power-domain-cells = <1>;
+
+ /* System Power Manager */
+ spm: power-controller {
+ compatible = "mediatek,mt8365-power-controller";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ #power-domain-cells = <1>;
+
+ /* power domains of the SoC */
+ power-domain@MT8365_POWER_DOMAIN_MM {
+ reg = <MT8365_POWER_DOMAIN_MM>;
+ clocks = <&topckgen CLK_TOP_MM_SEL>,
+ <&mmsys CLK_MM_MM_SMI_COMMON>,
+ <&mmsys CLK_MM_MM_SMI_COMM0>,
+ <&mmsys CLK_MM_MM_SMI_COMM1>,
+ <&mmsys CLK_MM_MM_SMI_LARB0>;
+ clock-names = "mm", "mm-0", "mm-1",
+ "mm-2", "mm-3";
+ #power-domain-cells = <0>;
+ mediatek,infracfg = <&infracfg>;
+ mediatek,infracfg-nao = <&infracfg_nao>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ power-domain@MT8365_POWER_DOMAIN_CAM {
+ reg = <MT8365_POWER_DOMAIN_CAM>;
+ clocks = <&camsys CLK_CAM_LARB2>,
+ <&camsys CLK_CAM_SENIF>,
+ <&camsys CLK_CAMSV0>,
+ <&camsys CLK_CAMSV1>,
+ <&camsys CLK_CAM_FDVT>,
+ <&camsys CLK_CAM_WPE>;
+ clock-names = "cam-0", "cam-1",
+ "cam-2", "cam-3",
+ "cam-4", "cam-5";
+ #power-domain-cells = <0>;
+ mediatek,infracfg = <&infracfg>;
+ mediatek,smi = <&smi_common>;
+ };
+
+ power-domain@MT8365_POWER_DOMAIN_VDEC {
+ reg = <MT8365_POWER_DOMAIN_VDEC>;
+ #power-domain-cells = <0>;
+ mediatek,smi = <&smi_common>;
+ };
+
+ power-domain@MT8365_POWER_DOMAIN_VENC {
+ reg = <MT8365_POWER_DOMAIN_VENC>;
+ #power-domain-cells = <0>;
+ mediatek,smi = <&smi_common>;
+ };
+
+ power-domain@MT8365_POWER_DOMAIN_APU {
+ reg = <MT8365_POWER_DOMAIN_APU>;
+ clocks = <&infracfg CLK_IFR_APU_AXI>,
+ <&apu CLK_APU_IPU_CK>,
+ <&apu CLK_APU_AXI>,
+ <&apu CLK_APU_JTAG>,
+ <&apu CLK_APU_IF_CK>,
+ <&apu CLK_APU_EDMA>,
+ <&apu CLK_APU_AHB>;
+ clock-names = "apu", "apu-0",
+ "apu-1", "apu-2",
+ "apu-3", "apu-4",
+ "apu-5";
+ #power-domain-cells = <0>;
+ mediatek,infracfg = <&infracfg>;
+ mediatek,smi = <&smi_common>;
+ };
+ };
+
+ power-domain@MT8365_POWER_DOMAIN_CONN {
+ reg = <MT8365_POWER_DOMAIN_CONN>;
+ clocks = <&topckgen CLK_TOP_CONN_32K>,
+ <&topckgen CLK_TOP_CONN_26M>;
+ clock-names = "conn", "conn1";
+ #power-domain-cells = <0>;
+ mediatek,infracfg = <&infracfg>;
+ };
+
+ power-domain@MT8365_POWER_DOMAIN_MFG {
+ reg = <MT8365_POWER_DOMAIN_MFG>;
+ clocks = <&topckgen CLK_TOP_MFG_SEL>;
+ clock-names = "mfg";
+ #power-domain-cells = <0>;
+ mediatek,infracfg = <&infracfg>;
+ };
+
+ power-domain@MT8365_POWER_DOMAIN_AUDIO {
+ reg = <MT8365_POWER_DOMAIN_AUDIO>;
+ clocks = <&topckgen CLK_TOP_AUD_INTBUS_SEL>,
+ <&infracfg CLK_IFR_AUDIO>,
+ <&infracfg CLK_IFR_AUD_26M_BK>;
+ clock-names = "audio", "audio1", "audio2";
+ #power-domain-cells = <0>;
+ mediatek,infracfg = <&infracfg>;
+ };
+
+ power-domain@MT8365_POWER_DOMAIN_DSP {
+ reg = <MT8365_POWER_DOMAIN_DSP>;
+ clocks = <&topckgen CLK_TOP_DSP_SEL>,
+ <&topckgen CLK_TOP_DSP_26M>;
+ clock-names = "dsp", "dsp1";
+ #power-domain-cells = <0>;
+ mediatek,infracfg = <&infracfg>;
+ };
+ };
+ };
+
+ watchdog: watchdog@10007000 {
+ compatible = "mediatek,mt8365-wdt", "mediatek,mt6589-wdt";
+ reg = <0 0x10007000 0 0x100>;
+ #reset-cells = <1>;
+ };
+
+ pio: pinctrl@1000b000 {
+ compatible = "mediatek,mt8365-pinctrl";
+ reg = <0 0x1000b000 0 0x1000>;
+ mediatek,pctl-regmap = <&syscfg_pctl>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ apmixedsys: syscon@1000c000 {
+ compatible = "mediatek,mt8365-apmixedsys", "syscon";
+ reg = <0 0x1000c000 0 0x1000>;
+ #clock-cells = <1>;
+ };
+
+ pwrap: pwrap@1000d000 {
+ compatible = "mediatek,mt8365-pwrap";
+ reg = <0 0x1000d000 0 0x1000>;
+ reg-names = "pwrap";
+ interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&infracfg CLK_IFR_PWRAP_SPI>,
+ <&infracfg CLK_IFR_PMIC_AP>,
+ <&infracfg CLK_IFR_PWRAP_SYS>,
+ <&infracfg CLK_IFR_PWRAP_TMR>;
+ clock-names = "spi", "wrap", "sys", "tmr";
+ };
+
+ keypad: keypad@10010000 {
+ compatible = "mediatek,mt6779-keypad";
+ reg = <0 0x10010000 0 0x1000>;
+ wakeup-source;
+ interrupts = <GIC_SPI 124 IRQ_TYPE_EDGE_FALLING>;
+ clocks = <&clk26m>;
+ clock-names = "kpd";
+ status = "disabled";
+ };
+
+ mcucfg: syscon@10200000 {
+ compatible = "mediatek,mt8365-mcucfg", "syscon";
+ reg = <0 0x10200000 0 0x2000>;
+ #clock-cells = <1>;
+ };
+
+ sysirq: interrupt-controller@10200a80 {
+ compatible = "mediatek,mt8365-sysirq", "mediatek,mt6577-sysirq";
+ interrupt-controller;
+ #interrupt-cells = <3>;
+ interrupt-parent = <&gic>;
+ reg = <0 0x10200a80 0 0x20>;
+ };
+
+ iommu: iommu@10205000 {
+ compatible = "mediatek,mt8365-m4u";
+ reg = <0 0x10205000 0 0x1000>;
+ interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_LOW>;
+ mediatek,larbs = <&larb0>, <&larb1>, <&larb2>, <&larb3>;
+ #iommu-cells = <1>;
+ };
+
+ infracfg_nao: infracfg@1020e000 {
+ compatible = "mediatek,mt8365-infracfg", "syscon";
+ reg = <0 0x1020e000 0 0x1000>;
+ #clock-cells = <1>;
+ };
+
+ rng: rng@1020f000 {
+ compatible = "mediatek,mt8365-rng", "mediatek,mt7623-rng";
+ reg = <0 0x1020f000 0 0x100>;
+ clocks = <&infracfg CLK_IFR_TRNG>;
+ clock-names = "rng";
+ };
+
+ apdma: dma-controller@11000280 {
+ compatible = "mediatek,mt8365-uart-dma", "mediatek,mt6577-uart-dma";
+ reg = <0 0x11000280 0 0x80>,
+ <0 0x11000300 0 0x80>,
+ <0 0x11000380 0 0x80>,
+ <0 0x11000400 0 0x80>,
+ <0 0x11000580 0 0x80>,
+ <0 0x11000600 0 0x80>;
+ interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_SPI 46 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_SPI 47 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_SPI 48 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_SPI 51 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_SPI 52 IRQ_TYPE_LEVEL_LOW>;
+ dma-requests = <6>;
+ clocks = <&infracfg CLK_IFR_AP_DMA>;
+ clock-names = "apdma";
+ #dma-cells = <1>;
+ };
+
+ uart0: serial@11002000 {
+ compatible = "mediatek,mt8365-uart", "mediatek,mt6577-uart";
+ reg = <0 0x11002000 0 0x1000>;
+ interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&clk26m>, <&infracfg CLK_IFR_UART0>;
+ clock-names = "baud", "bus";
+ dmas = <&apdma 0>, <&apdma 1>;
+ dma-names = "tx", "rx";
+ status = "disabled";
+ };
+
+ uart1: serial@11003000 {
+ compatible = "mediatek,mt8365-uart", "mediatek,mt6577-uart";
+ reg = <0 0x11003000 0 0x1000>;
+ interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&clk26m>, <&infracfg CLK_IFR_UART1>;
+ clock-names = "baud", "bus";
+ dmas = <&apdma 2>, <&apdma 3>;
+ dma-names = "tx", "rx";
+ status = "disabled";
+ };
+
+ uart2: serial@11004000 {
+ compatible = "mediatek,mt8365-uart", "mediatek,mt6577-uart";
+ reg = <0 0x11004000 0 0x1000>;
+ interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&clk26m>, <&infracfg CLK_IFR_UART2>;
+ clock-names = "baud", "bus";
+ dmas = <&apdma 4>, <&apdma 5>;
+ dma-names = "tx", "rx";
+ status = "disabled";
+ };
+
+ pwm: pwm@11006000 {
+ compatible = "mediatek,mt8365-pwm";
+ reg = <0 0x11006000 0 0x1000>;
+ #pwm-cells = <2>;
+ interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&infracfg CLK_IFR_PWM_HCLK>,
+ <&infracfg CLK_IFR_PWM>,
+ <&infracfg CLK_IFR_PWM1>,
+ <&infracfg CLK_IFR_PWM2>,
+ <&infracfg CLK_IFR_PWM3>;
+ clock-names = "top", "main", "pwm1", "pwm2", "pwm3";
+ };
+
+ i2c0: i2c@11007000 {
+ compatible = "mediatek,mt8365-i2c", "mediatek,mt8168-i2c";
+ reg = <0 0x11007000 0 0xa0>, <0 0x11000080 0 0x80>;
+ interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_LOW>;
+ clock-div = <1>;
+ clocks = <&infracfg CLK_IFR_I2C0_AXI>, <&infracfg CLK_IFR_AP_DMA>;
+ clock-names = "main", "dma";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ i2c1: i2c@11008000 {
+ compatible = "mediatek,mt8365-i2c", "mediatek,mt8168-i2c";
+ reg = <0 0x11008000 0 0xa0>, <0 0x11000100 0 0x80>;
+ interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_LOW>;
+ clock-div = <1>;
+ clocks = <&infracfg CLK_IFR_I2C1_AXI>, <&infracfg CLK_IFR_AP_DMA>;
+ clock-names = "main", "dma";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ i2c2: i2c@11009000 {
+ compatible = "mediatek,mt8365-i2c", "mediatek,mt8168-i2c";
+ reg = <0 0x11009000 0 0xa0>, <0 0x11000180 0 0x80>;
+ interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_LOW>;
+ clock-div = <1>;
+ clocks = <&infracfg CLK_IFR_I2C2_AXI>, <&infracfg CLK_IFR_AP_DMA>;
+ clock-names = "main", "dma";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ spi: spi@1100a000 {
+ compatible = "mediatek,mt8365-spi", "mediatek,mt7622-spi";
+ reg = <0 0x1100a000 0 0x100>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&topckgen CLK_TOP_UNIVPLL2_D4>,
+ <&topckgen CLK_TOP_SPI_SEL>,
+ <&infracfg CLK_IFR_SPI0>;
+ clock-names = "parent-clk", "sel-clk", "spi-clk";
+ status = "disabled";
+ };
+
+ i2c3: i2c@1100f000 {
+ compatible = "mediatek,mt8365-i2c", "mediatek,mt8168-i2c";
+ reg = <0 0x1100f000 0 0xa0>, <0 0x11000200 0 0x80>;
+ interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_LOW>;
+ clock-div = <1>;
+ clocks = <&infracfg CLK_IFR_I2C3_AXI>, <&infracfg CLK_IFR_AP_DMA>;
+ clock-names = "main", "dma";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ ssusb: usb@11201000 {
+ compatible = "mediatek,mt8365-mtu3", "mediatek,mtu3";
+ reg = <0 0x11201000 0 0x2e00>, <0 0x11203e00 0 0x0100>;
+ reg-names = "mac", "ippc";
+ interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_LOW>;
+ phys = <&u2port0 PHY_TYPE_USB2>,
+ <&u2port1 PHY_TYPE_USB2>;
+ clocks = <&topckgen CLK_TOP_SSUSB_TOP_CK_EN>,
+ <&infracfg CLK_IFR_SSUSB_REF>,
+ <&infracfg CLK_IFR_SSUSB_SYS>,
+ <&infracfg CLK_IFR_ICUSB>;
+ clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+ status = "disabled";
+
+ usb_host: usb@11200000 {
+ compatible = "mediatek,mt8365-xhci", "mediatek,mtk-xhci";
+ reg = <0 0x11200000 0 0x1000>;
+ reg-names = "mac";
+ interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&topckgen CLK_TOP_SSUSB_TOP_CK_EN>,
+ <&infracfg CLK_IFR_SSUSB_REF>,
+ <&infracfg CLK_IFR_SSUSB_SYS>,
+ <&infracfg CLK_IFR_ICUSB>,
+ <&infracfg CLK_IFR_SSUSB_XHCI>;
+ clock-names = "sys_ck", "ref_ck", "mcu_ck",
+ "dma_ck", "xhci_ck";
+ status = "disabled";
+ };
+ };
+
+ mmc0: mmc@11230000 {
+ compatible = "mediatek,mt8365-mmc", "mediatek,mt8183-mmc";
+ reg = <0 0x11230000 0 0x1000>,
+ <0 0x11cd0000 0 0x1000>;
+ interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&topckgen CLK_TOP_MSDC50_0_SEL>,
+ <&infracfg CLK_IFR_MSDC0_HCLK>,
+ <&infracfg CLK_IFR_MSDC0_SRC>;
+ clock-names = "source", "hclk", "source_cg";
+ status = "disabled";
+ };
+
+ mmc1: mmc@11240000 {
+ compatible = "mediatek,mt8365-mmc", "mediatek,mt8183-mmc";
+ reg = <0 0x11240000 0 0x1000>,
+ <0 0x11c90000 0 0x1000>;
+ interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&topckgen CLK_TOP_MSDC30_1_SEL>,
+ <&infracfg CLK_IFR_MSDC1_HCLK>,
+ <&infracfg CLK_IFR_MSDC1_SRC>;
+ clock-names = "source", "hclk", "source_cg";
+ status = "disabled";
+ };
+
+ mmc2: mmc@11250000 {
+ compatible = "mediatek,mt8365-mmc", "mediatek,mt8183-mmc";
+ reg = <0 0x11250000 0 0x1000>,
+ <0 0x11c60000 0 0x1000>;
+ interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&topckgen CLK_TOP_MSDC50_2_SEL>,
+ <&infracfg CLK_IFR_MSDC2_HCLK>,
+ <&infracfg CLK_IFR_MSDC2_SRC>,
+ <&infracfg CLK_IFR_MSDC2_BK>,
+ <&infracfg CLK_IFR_AP_MSDC0>;
+ clock-names = "source", "hclk", "source_cg",
+ "bus_clk", "sys_cg";
+ status = "disabled";
+ };
+
+ ethernet: ethernet@112a0000 {
+ compatible = "mediatek,mt8365-eth";
+ reg = <0 0x112a0000 0 0x1000>;
+ mediatek,pericfg = <&infracfg>;
+ interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&topckgen CLK_TOP_ETH_SEL>,
+ <&infracfg CLK_IFR_NIC_AXI>,
+ <&infracfg CLK_IFR_NIC_SLV_AXI>;
+ clock-names = "core", "reg", "trans";
+ status = "disabled";
+ };
+
+ u3phy: t-phy@11cc0000 {
+ compatible = "mediatek,mt8365-tphy", "mediatek,generic-tphy-v2";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0 0x11cc0000 0x9000>;
+
+ u2port0: usb-phy@0 {
+ reg = <0x0 0x400>;
+ clocks = <&topckgen CLK_TOP_SSUSB_PHY_CK_EN>,
+ <&topckgen CLK_TOP_USB20_48M_EN>;
+ clock-names = "ref", "da_ref";
+ #phy-cells = <1>;
+ };
+
+ u2port1: usb-phy@1000 {
+ reg = <0x1000 0x400>;
+ clocks = <&topckgen CLK_TOP_SSUSB_PHY_CK_EN>,
+ <&topckgen CLK_TOP_USB20_48M_EN>;
+ clock-names = "ref", "da_ref";
+ #phy-cells = <1>;
+ };
+ };
+
+ mmsys: syscon@14000000 {
+ compatible = "mediatek,mt8365-mmsys", "syscon";
+ reg = <0 0x14000000 0 0x1000>;
+ #clock-cells = <1>;
+ };
+
+ smi_common: smi@14002000 {
+ compatible = "mediatek,mt8365-smi-common";
+ reg = <0 0x14002000 0 0x1000>;
+ clocks = <&mmsys CLK_MM_MM_SMI_COMMON>,
+ <&mmsys CLK_MM_MM_SMI_COMMON>,
+ <&mmsys CLK_MM_MM_SMI_COMM0>,
+ <&mmsys CLK_MM_MM_SMI_COMM1>;
+ clock-names = "apb", "smi", "gals0", "gals1";
+ power-domains = <&spm MT8365_POWER_DOMAIN_MM>;
+ };
+
+ larb0: larb@14003000 {
+ compatible = "mediatek,mt8365-smi-larb",
+ "mediatek,mt8186-smi-larb";
+ reg = <0 0x14003000 0 0x1000>;
+ mediatek,smi = <&smi_common>;
+ clocks = <&mmsys CLK_MM_MM_SMI_LARB0>,
+ <&mmsys CLK_MM_MM_SMI_LARB0>;
+ clock-names = "apb", "smi";
+ power-domains = <&spm MT8365_POWER_DOMAIN_MM>;
+ mediatek,larb-id = <0>;
+ };
+
+ camsys: syscon@15000000 {
+ compatible = "mediatek,mt8365-imgsys", "syscon";
+ reg = <0 0x15000000 0 0x1000>;
+ #clock-cells = <1>;
+ };
+
+ larb2: larb@15001000 {
+ compatible = "mediatek,mt8365-smi-larb",
+ "mediatek,mt8186-smi-larb";
+ reg = <0 0x15001000 0 0x1000>;
+ mediatek,smi = <&smi_common>;
+ clocks = <&mmsys CLK_MM_MM_SMI_IMG>,
+ <&camsys CLK_CAM_LARB2>;
+ clock-names = "apb", "smi";
+ power-domains = <&spm MT8365_POWER_DOMAIN_CAM>;
+ mediatek,larb-id = <2>;
+ };
+
+ vdecsys: syscon@16000000 {
+ compatible = "mediatek,mt8365-vdecsys", "syscon";
+ reg = <0 0x16000000 0 0x1000>;
+ #clock-cells = <1>;
+ };
+
+ larb3: larb@16010000 {
+ compatible = "mediatek,mt8365-smi-larb",
+ "mediatek,mt8186-smi-larb";
+ reg = <0 0x16010000 0 0x1000>;
+ mediatek,smi = <&smi_common>;
+ clocks = <&vdecsys CLK_VDEC_LARB1>,
+ <&vdecsys CLK_VDEC_LARB1>;
+ clock-names = "apb", "smi";
+ power-domains = <&spm MT8365_POWER_DOMAIN_VDEC>;
+ mediatek,larb-id = <3>;
+ };
+
+ vencsys: syscon@17000000 {
+ compatible = "mediatek,mt8365-vencsys", "syscon";
+ reg = <0 0x17000000 0 0x1000>;
+ #clock-cells = <1>;
+ };
+
+ larb1: larb@17010000 {
+ compatible = "mediatek,mt8365-smi-larb",
+ "mediatek,mt8186-smi-larb";
+ reg = <0 0x17010000 0 0x1000>;
+ mediatek,smi = <&smi_common>;
+ clocks = <&vencsys CLK_VENC>, <&vencsys CLK_VENC>;
+ clock-names = "apb", "smi";
+ power-domains = <&spm MT8365_POWER_DOMAIN_VENC>;
+ mediatek,larb-id = <1>;
+ };
+
+ apu: syscon@19020000 {
+ compatible = "mediatek,mt8365-apu", "syscon";
+ reg = <0 0x19020000 0 0x1000>;
+ #clock-cells = <1>;
+ };
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupt-parent = <&gic>;
+ interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
+ };
+
+ system_clk: dummy13m {
+ compatible = "fixed-clock";
+ clock-frequency = <13000000>;
+ #clock-cells = <0>;
+ };
+
+ systimer: timer@10017000 {
+ compatible = "mediatek,mt8365-systimer", "mediatek,mt6765-timer";
+ reg = <0 0x10017000 0 0x100>;
+ interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&system_clk>;
+ clock-names = "clk13m";
+ };
+};
diff --git a/arch/arm/dts/nuvoton-common-npcm8xx.dtsi b/arch/arm/dts/nuvoton-common-npcm8xx.dtsi
index fabe592..1694ef8 100644
--- a/arch/arm/dts/nuvoton-common-npcm8xx.dtsi
+++ b/arch/arm/dts/nuvoton-common-npcm8xx.dtsi
@@ -133,7 +133,16 @@
ranges = <0x0 0x0 0xf0000000 0x00300000>,
<0xfff00000 0x0 0xfff00000 0x00016000>;
- spi1: spi@201000 {
+ host_intf: host_intf@9f000 {
+ compatible = "nuvoton,npcm845-host-intf";
+ reg = <0x9f000 0x1000>;
+ type = "espi";
+ ioaddr = <0x4e>;
+ channel-support = <0xf>;
+ syscon = <&gcr>;
+ };
+
+ pspi: spi@201000 {
compatible = "nuvoton,npcm845-pspi";
reg = <0x201000 0x1000>;
pinctrl-names = "default";
diff --git a/arch/arm/dts/nuvoton-npcm845-evb.dts b/arch/arm/dts/nuvoton-npcm845-evb.dts
index a93666c..0d3aaa0 100644
--- a/arch/arm/dts/nuvoton-npcm845-evb.dts
+++ b/arch/arm/dts/nuvoton-npcm845-evb.dts
@@ -2,6 +2,8 @@
// Copyright (c) 2021 Nuvoton Technology tomer.maimon@nuvoton.com
/dts-v1/;
+
+#include <dt-bindings/phy/nuvoton,npcm-usbphy.h>
#include "nuvoton-npcm845.dtsi"
#include "nuvoton-npcm845-pincfg.dtsi"
@@ -46,10 +48,10 @@
spi1 = &fiu1;
spi3 = &fiu3;
spi4 = &fiux;
- spi5 = &spi1;
+ spi5 = &pspi;
usb0 = &udc0;
usb1 = &ehci1;
- usb2 = &ehci2;
+ usb2 = &udc8;
};
chosen {
@@ -60,6 +62,17 @@
reg = <0x0 0x0 0x0 0x40000000>;
};
+ tpm@0 {
+ compatible = "microsoft,ftpm";
+ };
+
+ firmware {
+ optee {
+ compatible = "linaro,optee-tz";
+ method = "smc";
+ };
+ };
+
vsbr2: vsbr2 {
compatible = "regulator-npcm845";
regulator-name = "vr2";
@@ -149,6 +162,8 @@
snps,reset-active-low;
snps,reset-delays-us = <0 10000 1000000>;
snps,reset-gpio = <&gpio5 2 GPIO_ACTIVE_LOW>; /* gpio162 */
+ phy-supply = <&vsbr2>;
+ phy-supply-microvolt = <1800000>;
status = "okay";
};
@@ -179,7 +194,7 @@
status = "okay";
};
-&spi1 {
+&pspi {
status = "okay";
};
@@ -197,7 +212,7 @@
&udc0 {
status = "okay";
- phys = <&usbphy1 0>;
+ phys = <&usbphy1 NPCM_UDC0_7>;
};
&sdhci0 {
@@ -207,12 +222,12 @@
&ehci1 {
status = "okay";
- phys = <&usbphy2 3>;
+ phys = <&usbphy2 NPCM_USBH1>;
};
-&ehci2 {
+&udc8 {
status = "okay";
- phys = <&usbphy3 4>;
+ phys = <&usbphy3 NPCM_UDC8>;
};
&rng {
diff --git a/arch/arm/dts/nuvoton-npcm8xx-u-boot.dtsi b/arch/arm/dts/nuvoton-npcm8xx-u-boot.dtsi
index e49e564..4c6d5be 100644
--- a/arch/arm/dts/nuvoton-npcm8xx-u-boot.dtsi
+++ b/arch/arm/dts/nuvoton-npcm8xx-u-boot.dtsi
@@ -174,7 +174,7 @@
compatible = "nuvoton,npcm845-usb-phy";
#phy-cells = <1>;
reg = <3>;
- resets = <&rstc3 NPCM8XX_RESET_USBPHY3>;
+ resets = <&rstc4 NPCM8XX_RESET_USBPHY3>;
status = "disabled";
};
};
diff --git a/arch/arm/dts/phycore-imx8mm.dts b/arch/arm/dts/phycore-imx8mm.dts
deleted file mode 100644
index e57dfd3..0000000
--- a/arch/arm/dts/phycore-imx8mm.dts
+++ /dev/null
@@ -1,287 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-/*
- * Copyright (C) 2019-2020 PHYTEC Messtechnik GmbH
- * Author: Teresa Remmet <t.remmet@phytec.de>
- */
-
-/dts-v1/;
-
-#include <dt-bindings/net/ti-dp83867.h>
-#include "imx8mm.dtsi"
-
-/ {
- model = "PHYTEC phyCORE-i.MX8MM";
- compatible = "phytec,imx8mm-phycore-som", "fsl,imx8mm";
-
- chosen {
- stdout-path = &uart3;
- };
-
- reg_usdhc2_vmmc: regulator-usdhc2 {
- compatible = "regulator-fixed";
- regulator-name = "VSD_3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- startup-delay-us = <100>;
- off-on-delay-us = <12000>;
- };
-};
-
-/* ethernet */
-&fec1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_fec1>;
- phy-mode = "rgmii-id";
- phy-handle = <ðphy0>;
- phy-reset-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
- phy-reset-duration = <1>;
- phy-reset-post-delay = <1>;
- status = "okay";
-
- mdio {
- #address-cells = <1>;
- #size-cells = <0>;
-
- ethphy0: ethernet-phy@0 {
- compatible = "ethernet-phy-ieee802.3-c22";
- reg = <0x0>;
- ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
- ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
- ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
- ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
- enet-phy-lane-no-swap;
- };
- };
-};
-
-/* SPI nor flash */
-&flexspi {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_flexspi0>;
- status = "okay";
-
- flash0: norflash@0 {
- reg = <0>;
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "jedec,spi-nor";
- spi-max-frequency = <80000000>;
- spi-tx-bus-width = <4>;
- spi-rx-bus-width = <4>;
- };
-};
-
-/* i2c eeprom */
-&i2c1 {
- clock-frequency = <400000>;
- pinctrl-names = "default", "gpio";
- pinctrl-0 = <&pinctrl_i2c1>;
- pinctrl-1 = <&pinctrl_i2c1_gpio>;
- scl-gpios = <&gpio5 14 GPIO_ACTIVE_HIGH>;
- sda-gpios = <&gpio5 15 GPIO_ACTIVE_HIGH>;
- status = "okay";
-
- /* M24C32-D */
- i2c_eeprom: eeprom@51 {
- compatible = "atmel,24c32";
- reg = <0x51>;
- u-boot,i2c-offset-len = <2>;
- };
-
- /* M24C32-D Identification page */
- i2c_eeprom_id: eeprom@59 {
- compatible = "atmel,24c32";
- reg = <0x59>;
- u-boot,i2c-offset-len = <2>;
- };
-};
-
-/* debug console */
-&uart3 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart3>;
- status = "okay";
-};
-
-/* sd-card */
-&usdhc2 {
- pinctrl-names = "default", "state_100mhz", "state_200mhz";
- pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
- pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
- pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
- cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
- bus-width = <4>;
- vmmc-supply = <®_usdhc2_vmmc>;
- status = "okay";
-};
-
-/* eMMC */
-&usdhc3 {
- pinctrl-names = "default", "state_100mhz", "state_200mhz";
- pinctrl-0 = <&pinctrl_usdhc3>;
- pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
- pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
- bus-width = <8>;
- non-removable;
- status = "okay";
-};
-
-/* watchdog */
-&wdog1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_wdog>;
- fsl,ext-reset-output;
- status = "okay";
-};
-
-&iomuxc {
- pinctrl-names = "default";
-
- pinctrl_fec1: fec1grp {
- fsl,pins = <
- MX8MM_IOMUXC_ENET_MDC_ENET1_MDC 0x3
- MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO 0x3
- MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f
- MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f
- MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f
- MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f
- MX8MM_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91
- MX8MM_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91
- MX8MM_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91
- MX8MM_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91
- MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f
- MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91
- MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91
- MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f
- MX8MM_IOMUXC_GPIO1_IO07_GPIO1_IO7 0x19
- >;
- };
-
- pinctrl_flexspi0: flexspi0grp {
- fsl,pins = <
- MX8MM_IOMUXC_NAND_ALE_QSPI_A_SCLK 0x1c2
- MX8MM_IOMUXC_NAND_CE0_B_QSPI_A_SS0_B 0x82
- MX8MM_IOMUXC_NAND_DATA00_QSPI_A_DATA0 0x82
- MX8MM_IOMUXC_NAND_DATA01_QSPI_A_DATA1 0x82
- MX8MM_IOMUXC_NAND_DATA02_QSPI_A_DATA2 0x82
- MX8MM_IOMUXC_NAND_DATA03_QSPI_A_DATA3 0x82
- >;
- };
-
- pinctrl_i2c1: i2c1grp {
- fsl,pins = <
- MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL 0x400001c3
- MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c3
- >;
- };
-
- pinctrl_i2c1_gpio: i2c1grp-gpio {
- fsl,pins = <
- MX8MM_IOMUXC_I2C1_SCL_GPIO5_IO14 0x1c3
- MX8MM_IOMUXC_I2C1_SDA_GPIO5_IO15 0x1c3
- >;
- };
-
- pinctrl_uart3: uart3grp {
- fsl,pins = <
- MX8MM_IOMUXC_UART3_RXD_UART3_DCE_RX 0x49
- MX8MM_IOMUXC_UART3_TXD_UART3_DCE_TX 0x49
- >;
- };
-
- pinctrl_usdhc2_gpio: usdhc2grpgpio {
- fsl,pins = <
- MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x41
- >;
- };
-
- pinctrl_usdhc2: usdhc2grp {
- fsl,pins = <
- MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x190
- MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0
- MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0
- MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0
- MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0
- MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0
- MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0
- >;
- };
-
- pinctrl_usdhc2_100mhz: usdhc2grp100mhz {
- fsl,pins = <
- MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x194
- MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4
- MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4
- MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4
- MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4
- MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4
- MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0
- >;
- };
-
- pinctrl_usdhc2_200mhz: usdhc2grp200mhz {
- fsl,pins = <
- MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x196
- MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6
- MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6
- MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6
- MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6
- MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6
- MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0
- >;
- };
-
- pinctrl_usdhc3: usdhc3grp {
- fsl,pins = <
- MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x40000190
- MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d0
- MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d0
- MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d0
- MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d0
- MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d0
- MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d0
- MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d0
- MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d0
- MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d0
- MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x190
- >;
- };
-
- pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
- fsl,pins = <
- MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x40000194
- MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d4
- MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d4
- MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d4
- MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d4
- MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d4
- MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d4
- MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d4
- MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d4
- MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d4
- MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x194
- >;
- };
-
- pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
- fsl,pins = <
- MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x40000196
- MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d6
- MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d6
- MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d6
- MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d6
- MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d6
- MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d6
- MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d6
- MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d6
- MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d6
- MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x196
- >;
- };
-
- pinctrl_wdog: wdoggrp {
- fsl,pins = <
- MX8MM_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0xc6
- >;
- };
-};
diff --git a/arch/arm/dts/phytium-pe2201.dts b/arch/arm/dts/phytium-pe2201.dts
new file mode 100644
index 0000000..959584f
--- /dev/null
+++ b/arch/arm/dts/phytium-pe2201.dts
@@ -0,0 +1,43 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * dts file for Phytium pe2201 board
+ * Copyright (C) 2023, Phytium Technology Co., Ltd.
+ * lixinde <lixinde@phytium.com.cn>
+ * weichangzheng <weichangzheng@phytium.com.cn>
+ */
+/dts-v1/;
+
+/ {
+ model = "Phytium pe2201 Board";
+ compatible = "phytium,pe2201";
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ uart0: serial@2800c000 {
+ compatible = "arm,pl011", "arm,primecell";
+ reg = <0x0 0x2800c000 0x0 0x1000>;
+ clock = <100000000>;
+ };
+
+ soc {
+ compatible = "simple-bus";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ pcie@40000000 {
+ compatible = "pci-host-ecam-generic";
+ device_type = "pci";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ reg = <0x0 0x40000000 0x0 0x10000000>;
+ ranges = <0x01000000 0x00 0x00000000 0x0 0x50000000 0x0 0x00F00000>,
+ <0x02000000 0x00 0x58000000 0x0 0x58000000 0x0 0x28000000>,
+ <0x43000000 0x10 0x00000000 0x10 0x00000000 0x10 0x00000000>;
+ };
+ };
+};
diff --git a/arch/arm/dts/qcom-ipq4019.dtsi b/arch/arm/dts/qcom-ipq4019.dtsi
index 0850ae5..f9489e4 100644
--- a/arch/arm/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/dts/qcom-ipq4019.dtsi
@@ -66,14 +66,6 @@
status = "disabled";
};
- reset: gcc-reset@1800000 {
- compatible = "qcom,gcc-reset-ipq4019";
- reg = <0x1800000 0x60000>;
- #clock-cells = <1>;
- #reset-cells = <1>;
- bootph-all;
- };
-
soc_gpios: pinctrl@1000000 {
compatible = "qcom,ipq4019-pinctrl";
reg = <0x1000000 0x300000>;
@@ -136,7 +128,7 @@
#phy-cells = <0>;
reg = <0x9a000 0x800>;
reg-names = "phy_base";
- resets = <&reset USB3_UNIPHY_PHY_ARES>;
+ resets = <&gcc USB3_UNIPHY_PHY_ARES>;
reset-names = "por_rst";
status = "disabled";
};
@@ -146,7 +138,7 @@
#phy-cells = <0>;
reg = <0xa6000 0x40>;
reg-names = "phy_base";
- resets = <&reset USB3_HSPHY_POR_ARES>, <&reset USB3_HSPHY_S_ARES>;
+ resets = <&gcc USB3_HSPHY_POR_ARES>, <&gcc USB3_HSPHY_S_ARES>;
reset-names = "por_rst", "srif_rst";
status = "disabled";
};
@@ -179,7 +171,7 @@
#phy-cells = <0>;
reg = <0xa8000 0x40>;
reg-names = "phy_base";
- resets = <&reset USB2_HSPHY_POR_ARES>, <&reset USB2_HSPHY_S_ARES>;
+ resets = <&gcc USB2_HSPHY_POR_ARES>, <&gcc USB2_HSPHY_S_ARES>;
reset-names = "por_rst", "srif_rst";
status = "disabled";
};
diff --git a/arch/arm/dts/qcs404-evb.dts b/arch/arm/dts/qcs404-evb.dts
index 8d7893c..07bf7dd 100644
--- a/arch/arm/dts/qcs404-evb.dts
+++ b/arch/arm/dts/qcs404-evb.dts
@@ -208,11 +208,6 @@
#address-cells = <0x1>;
#size-cells = <0x0>;
#clock-cells = <1>;
- };
-
- reset: gcc-reset@1800000 {
- compatible = "qcom,gcc-reset-qcs404";
- reg = <0x1800000 0x80000>;
#reset-cells = <1>;
};
@@ -245,8 +240,8 @@
clocks = <&gcc GCC_USB_HS_PHY_CFG_AHB_CLK>,
<&gcc GCC_USB3_PHY_PIPE_CLK>;
clock-names = "ahb", "pipe";
- resets = <&reset GCC_USB3_PHY_BCR>,
- <&reset GCC_USB3PHY_PHY_BCR>;
+ resets = <&gcc GCC_USB3_PHY_BCR>,
+ <&gcc GCC_USB3PHY_PHY_BCR>;
reset-names = "com", "phy";
};
@@ -257,8 +252,8 @@
clocks = <&gcc GCC_USB_HS_PHY_CFG_AHB_CLK>,
<&gcc GCC_USB2A_PHY_SLEEP_CLK>;
clock-names = "ahb", "sleep";
- resets = <&reset GCC_USB_HS_PHY_CFG_AHB_BCR>,
- <&reset GCC_USB2A_PHY_BCR>;
+ resets = <&gcc GCC_USB_HS_PHY_CFG_AHB_BCR>,
+ <&gcc GCC_USB2A_PHY_BCR>;
reset-names = "phy", "por";
};
@@ -269,8 +264,8 @@
clocks = <&gcc GCC_USB_HS_PHY_CFG_AHB_CLK>,
<&gcc GCC_USB2A_PHY_SLEEP_CLK>;
clock-names = "ahb", "sleep";
- resets = <&reset GCC_QUSB2_PHY_BCR>,
- <&reset GCC_USB2_HS_PHY_ONLY_BCR>;
+ resets = <&gcc GCC_QUSB2_PHY_BCR>,
+ <&gcc GCC_USB2_HS_PHY_ONLY_BCR>;
reset-names = "phy", "por";
};
@@ -335,7 +330,7 @@
<&gcc GCC_ETH_PTP_CLK>,
<&gcc GCC_ETH_RGMII_CLK>;
- resets = <&reset GCC_EMAC_BCR>;
+ resets = <&gcc GCC_EMAC_BCR>;
reset-names = "emac";
snps,tso;
@@ -367,9 +362,10 @@
spmi@200f000 {
compatible = "qcom,spmi-pmic-arb";
- reg = <0x200f000 0x1000
- 0x2400000 0x400000
- 0x2c00000 0x400000>;
+ reg = <0x200f000 0x001000>,
+ <0x2400000 0x800000>,
+ <0x2c00000 0x800000>;
+ reg-names = "core", "chnls", "obsrvr";
#address-cells = <0x1>;
#size-cells = <0x1>;
@@ -383,9 +379,8 @@
compatible = "qcom,pms405-gpio";
reg = <0xc000 0x400>;
gpio-controller;
- gpio-count = <12>;
+ gpio-ranges = <&pms405_gpios 0 0 12>;
#gpio-cells = <2>;
- gpio-bank-name="pmic";
};
};
};
diff --git a/arch/arm/dts/r8a7792-blanche.dts b/arch/arm/dts/r8a7792-blanche.dts
index c66de9d..6a83923 100644
--- a/arch/arm/dts/r8a7792-blanche.dts
+++ b/arch/arm/dts/r8a7792-blanche.dts
@@ -239,7 +239,7 @@
};
keyboard_pins: keyboard {
- pins = "GP_3_10", "GP_3_11", "GP_3_12", "GP_3_15", "GP_11_02";
+ pins = "GP_3_10", "GP_3_11", "GP_3_12", "GP_3_15", "GP_11_2";
bias-pull-up;
};
diff --git a/arch/arm/dts/r8a77970-v3msk.dts b/arch/arm/dts/r8a77970-v3msk.dts
index c2b65f8..e36999e 100644
--- a/arch/arm/dts/r8a77970-v3msk.dts
+++ b/arch/arm/dts/r8a77970-v3msk.dts
@@ -145,7 +145,7 @@
status = "okay";
clock-frequency = <400000>;
- hdmi@39{
+ hdmi@39 {
compatible = "adi,adv7511w";
#sound-dai-cells = <0>;
reg = <0x39>;
diff --git a/arch/arm/dts/r8a77990.dtsi b/arch/arm/dts/r8a77990.dtsi
index 1be0b99..4c545ef 100644
--- a/arch/arm/dts/r8a77990.dtsi
+++ b/arch/arm/dts/r8a77990.dtsi
@@ -76,7 +76,7 @@
enable-method = "psci";
cpu-idle-states = <&CPU_SLEEP_0>;
dynamic-power-coefficient = <277>;
- clocks =<&cpg CPG_CORE R8A77990_CLK_Z2>;
+ clocks = <&cpg CPG_CORE R8A77990_CLK_Z2>;
operating-points-v2 = <&cluster1_opp>;
};
@@ -88,7 +88,7 @@
next-level-cache = <&L2_CA53>;
enable-method = "psci";
cpu-idle-states = <&CPU_SLEEP_0>;
- clocks =<&cpg CPG_CORE R8A77990_CLK_Z2>;
+ clocks = <&cpg CPG_CORE R8A77990_CLK_Z2>;
operating-points-v2 = <&cluster1_opp>;
};
diff --git a/arch/arm/dts/r8a779f0-spider-cpu.dtsi b/arch/arm/dts/r8a779f0-spider-cpu.dtsi
index dd8e0e1..5cbde8e 100644
--- a/arch/arm/dts/r8a779f0-spider-cpu.dtsi
+++ b/arch/arm/dts/r8a779f0-spider-cpu.dtsi
@@ -1,4 +1,4 @@
-// SPDX-License-Identifier: (GPL-2.0 or MIT)
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
* Device Tree Source for the Spider CPU board
*
@@ -6,6 +6,8 @@
*/
#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/leds/common.h>
+
#include "r8a779f0.dtsi"
/ {
@@ -22,6 +24,24 @@
stdout-path = "serial0:1843200n8";
};
+ leds {
+ compatible = "gpio-leds";
+
+ led-7 {
+ gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>;
+ color = <LED_COLOR_ID_GREEN>;
+ function = LED_FUNCTION_INDICATOR;
+ function-enumerator = <7>;
+ };
+
+ led-8 {
+ gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>;
+ color = <LED_COLOR_ID_GREEN>;
+ function = LED_FUNCTION_INDICATOR;
+ function-enumerator = <8>;
+ };
+ };
+
memory@48000000 {
device_type = "memory";
/* first 128MB is reserved for secure area. */
diff --git a/arch/arm/dts/r8a779f0-spider.dts b/arch/arm/dts/r8a779f0-spider.dts
index 7aac3f4..f139cc4 100644
--- a/arch/arm/dts/r8a779f0-spider.dts
+++ b/arch/arm/dts/r8a779f0-spider.dts
@@ -1,4 +1,4 @@
-// SPDX-License-Identifier: (GPL-2.0 or MIT)
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
* Device Tree Source for the Spider CPU and BreakOut boards
*
diff --git a/arch/arm/dts/r8a779f0.dtsi b/arch/arm/dts/r8a779f0.dtsi
index 1d5426e..ecdd5a5 100644
--- a/arch/arm/dts/r8a779f0.dtsi
+++ b/arch/arm/dts/r8a779f0.dtsi
@@ -1,4 +1,4 @@
-// SPDX-License-Identifier: (GPL-2.0 or MIT)
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
* Device Tree Source for the R-Car S4-8 (R8A779F0) SoC
*
@@ -466,6 +466,21 @@
#thermal-sensor-cells = <1>;
};
+ intc_ex: interrupt-controller@e61c0000 {
+ compatible = "renesas,intc-ex-r8a779f0", "renesas,irqc";
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ reg = <0 0xe61c0000 0 0x200>;
+ interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_CORE R8A779F0_CLK_CL16M>;
+ power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
+ };
+
tmu0: timer@e61e0000 {
compatible = "renesas,tmu-r8a779f0", "renesas,tmu";
reg = <0 0xe61e0000 0 0x30>;
diff --git a/arch/arm/dts/r8a779g0-u-boot.dtsi b/arch/arm/dts/r8a779g0-u-boot.dtsi
index 150657f..cc8beca 100644
--- a/arch/arm/dts/r8a779g0-u-boot.dtsi
+++ b/arch/arm/dts/r8a779g0-u-boot.dtsi
@@ -7,20 +7,10 @@
#include "r8a779x-u-boot.dtsi"
-/ {
- soc {
- rpc: spi@ee200000 {
- compatible = "renesas,r8a779g0-rpc-if", "renesas,rcar-gen4-rpc-if";
- reg = <0 0xee200000 0 0x200>, <0 0x08000000 0 0x04000000>;
- interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 629>;
- power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
- resets = <&cpg 629>;
- bank-width = <2>;
- num-cs = <1>;
- status = "disabled";
- };
- };
+&rpc {
+ reg = <0 0xee200000 0 0x200>, <0 0x08000000 0 0x04000000>;
+ bank-width = <2>;
+ num-cs = <1>;
};
&extalr_clk {
diff --git a/arch/arm/dts/r8a779g0-white-hawk-u-boot.dts b/arch/arm/dts/r8a779g0-white-hawk-u-boot.dts
index efc1b95..bd75603 100644
--- a/arch/arm/dts/r8a779g0-white-hawk-u-boot.dts
+++ b/arch/arm/dts/r8a779g0-white-hawk-u-boot.dts
@@ -28,7 +28,7 @@
#address-cells = <1>;
#size-cells = <0>;
spi-max-frequency = <40000000>;
- status = "okay";
+ status = "disabled";
spi-flash@0 {
#address-cells = <1>;
diff --git a/arch/arm/dts/rk3288-evb.dtsi b/arch/arm/dts/rk3288-evb.dtsi
index 72da884..0e347be 100644
--- a/arch/arm/dts/rk3288-evb.dtsi
+++ b/arch/arm/dts/rk3288-evb.dtsi
@@ -7,7 +7,7 @@
/ {
memory {
- reg = <0 0x80000000>;
+ reg = <0x0 0x0 0x0 0x80000000>;
};
ext_gmac: external-gmac-clock {
diff --git a/arch/arm/dts/rk3288-firefly.dtsi b/arch/arm/dts/rk3288-firefly.dtsi
index 1117d39..0824b19e 100644
--- a/arch/arm/dts/rk3288-firefly.dtsi
+++ b/arch/arm/dts/rk3288-firefly.dtsi
@@ -7,7 +7,7 @@
/ {
memory {
- reg = <0 0x80000000>;
+ reg = <0x0 0x0 0x0 0x80000000>;
};
ext_gmac: external-gmac-clock {
diff --git a/arch/arm/dts/rk3288-miqi.dtsi b/arch/arm/dts/rk3288-miqi.dtsi
index 00c8613..c56e110 100644
--- a/arch/arm/dts/rk3288-miqi.dtsi
+++ b/arch/arm/dts/rk3288-miqi.dtsi
@@ -8,7 +8,7 @@
/ {
memory {
device_type = "memory";
- reg = <0 0x80000000>;
+ reg = <0x0 0x0 0x0 0x80000000>;
};
ext_gmac: external-gmac-clock {
diff --git a/arch/arm/dts/rk3288-phycore-som.dtsi b/arch/arm/dts/rk3288-phycore-som.dtsi
index 70c0030..bde5910 100644
--- a/arch/arm/dts/rk3288-phycore-som.dtsi
+++ b/arch/arm/dts/rk3288-phycore-som.dtsi
@@ -55,7 +55,7 @@
*/
memory {
device_type = "memory";
- reg = <0 0x8000000>;
+ reg = <0x0 0x0 0x0 0x80000000>;
};
aliases {
diff --git a/arch/arm/dts/rk3288-popmetal.dtsi b/arch/arm/dts/rk3288-popmetal.dtsi
index d732a70..ecff641 100644
--- a/arch/arm/dts/rk3288-popmetal.dtsi
+++ b/arch/arm/dts/rk3288-popmetal.dtsi
@@ -44,7 +44,7 @@
/ {
memory{
device_type = "memory";
- reg = <0 0x80000000>;
+ reg = <0x0 0x0 0x0 0x80000000>;
};
ext_gmac: external-gmac-clock {
diff --git a/arch/arm/dts/rk3288-rock2-som.dtsi b/arch/arm/dts/rk3288-rock2-som.dtsi
index 1ece66f..58e32fb 100644
--- a/arch/arm/dts/rk3288-rock2-som.dtsi
+++ b/arch/arm/dts/rk3288-rock2-som.dtsi
@@ -43,7 +43,7 @@
/ {
memory {
- reg = <0x0 0x80000000>;
+ reg = <0x0 0x0 0x0 0x80000000>;
device_type = "memory";
};
diff --git a/arch/arm/dts/rk3288-tinker.dtsi b/arch/arm/dts/rk3288-tinker.dtsi
index 46460ae..62b4beb 100644
--- a/arch/arm/dts/rk3288-tinker.dtsi
+++ b/arch/arm/dts/rk3288-tinker.dtsi
@@ -44,7 +44,7 @@
/ {
memory {
device_type = "memory";
- reg = <0x0 0x80000000>;
+ reg = <0x0 0x0 0x0 0x80000000>;
};
ext_gmac: external-gmac-clock {
diff --git a/arch/arm/dts/rk3288-u-boot.dtsi b/arch/arm/dts/rk3288-u-boot.dtsi
index c4c5a2d22..a43d320 100644
--- a/arch/arm/dts/rk3288-u-boot.dtsi
+++ b/arch/arm/dts/rk3288-u-boot.dtsi
@@ -29,10 +29,10 @@
dmc: dmc@ff610000 {
compatible = "rockchip,rk3288-dmc", "syscon";
- reg = <0xff610000 0x3fc
- 0xff620000 0x294
- 0xff630000 0x3fc
- 0xff640000 0x294>;
+ reg = <0x0 0xff610000 0x0 0x3fc
+ 0x0 0xff620000 0x0 0x294
+ 0x0 0xff630000 0x0 0x3fc
+ 0x0 0xff640000 0x0 0x294>;
clocks = <&cru PCLK_DDRUPCTL0>, <&cru PCLK_PUBL0>,
<&cru PCLK_DDRUPCTL1>, <&cru PCLK_PUBL1>,
<&cru ARMCLK>;
@@ -50,7 +50,7 @@
noc: syscon@ffac0000 {
compatible = "rockchip,rk3288-noc", "syscon";
- reg = <0xffac0000 0x2000>;
+ reg = <0x0 0xffac0000 0x0 0x2000>;
bootph-all;
};
};
@@ -134,3 +134,7 @@
&vopl {
bootph-all;
};
+
+&xin24m {
+ bootph-all;
+};
diff --git a/arch/arm/dts/rk3288-veyron.dtsi b/arch/arm/dts/rk3288-veyron.dtsi
index 434b0d4..9940615 100644
--- a/arch/arm/dts/rk3288-veyron.dtsi
+++ b/arch/arm/dts/rk3288-veyron.dtsi
@@ -11,7 +11,7 @@
/ {
memory {
- reg = <0x0 0x80000000>;
+ reg = <0x0 0x0 0x0 0x80000000>;
};
chosen {
diff --git a/arch/arm/dts/rk3288.dtsi b/arch/arm/dts/rk3288.dtsi
index dd1d989..ead343d 100644
--- a/arch/arm/dts/rk3288.dtsi
+++ b/arch/arm/dts/rk3288.dtsi
@@ -10,8 +10,8 @@
#include <dt-bindings/soc/rockchip,boot-mode.h>
/ {
- #address-cells = <1>;
- #size-cells = <1>;
+ #address-cells = <2>;
+ #size-cells = <2>;
compatible = "rockchip,rk3288";
@@ -19,6 +19,15 @@
aliases {
ethernet0 = &gmac;
+ gpio0 = &gpio0;
+ gpio1 = &gpio1;
+ gpio2 = &gpio2;
+ gpio3 = &gpio3;
+ gpio4 = &gpio4;
+ gpio5 = &gpio5;
+ gpio6 = &gpio6;
+ gpio7 = &gpio7;
+ gpio8 = &gpio8;
i2c0 = &i2c0;
i2c1 = &i2c1;
i2c2 = &i2c2;
@@ -155,8 +164,8 @@
};
reserved-memory {
- #address-cells = <1>;
- #size-cells = <1>;
+ #address-cells = <2>;
+ #size-cells = <2>;
ranges;
/*
@@ -170,7 +179,7 @@
* is found.
*/
dma-unusable@fe000000 {
- reg = <0xfe000000 0x1000000>;
+ reg = <0x0 0xfe000000 0x0 0x1000000>;
};
};
@@ -213,7 +222,7 @@
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
fifo-depth = <0x100>;
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
- reg = <0xff0c0000 0x4000>;
+ reg = <0x0 0xff0c0000 0x0 0x4000>;
resets = <&cru SRST_MMC0>;
reset-names = "reset";
status = "disabled";
@@ -227,7 +236,7 @@
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
fifo-depth = <0x100>;
interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
- reg = <0xff0d0000 0x4000>;
+ reg = <0x0 0xff0d0000 0x0 0x4000>;
resets = <&cru SRST_SDIO0>;
reset-names = "reset";
status = "disabled";
@@ -241,7 +250,7 @@
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
fifo-depth = <0x100>;
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
- reg = <0xff0e0000 0x4000>;
+ reg = <0x0 0xff0e0000 0x0 0x4000>;
resets = <&cru SRST_SDIO1>;
reset-names = "reset";
status = "disabled";
@@ -255,7 +264,7 @@
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
fifo-depth = <0x100>;
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
- reg = <0xff0f0000 0x4000>;
+ reg = <0x0 0xff0f0000 0x0 0x4000>;
resets = <&cru SRST_EMMC>;
reset-names = "reset";
status = "disabled";
@@ -263,7 +272,7 @@
saradc: saradc@ff100000 {
compatible = "rockchip,saradc";
- reg = <0xff100000 0x100>;
+ reg = <0x0 0xff100000 0x0 0x100>;
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
#io-channel-cells = <1>;
clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>;
@@ -282,7 +291,7 @@
interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&spi0_clk &spi0_tx &spi0_rx &spi0_cs0>;
- reg = <0xff110000 0x1000>;
+ reg = <0x0 0xff110000 0x0 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
@@ -297,7 +306,7 @@
interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&spi1_clk &spi1_tx &spi1_rx &spi1_cs0>;
- reg = <0xff120000 0x1000>;
+ reg = <0x0 0xff120000 0x0 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
@@ -312,7 +321,7 @@
interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&spi2_clk &spi2_tx &spi2_rx &spi2_cs0>;
- reg = <0xff130000 0x1000>;
+ reg = <0x0 0xff130000 0x0 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
@@ -320,7 +329,7 @@
i2c1: i2c@ff140000 {
compatible = "rockchip,rk3288-i2c";
- reg = <0xff140000 0x1000>;
+ reg = <0x0 0xff140000 0x0 0x1000>;
interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
@@ -333,7 +342,7 @@
i2c3: i2c@ff150000 {
compatible = "rockchip,rk3288-i2c";
- reg = <0xff150000 0x1000>;
+ reg = <0x0 0xff150000 0x0 0x1000>;
interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
@@ -346,7 +355,7 @@
i2c4: i2c@ff160000 {
compatible = "rockchip,rk3288-i2c";
- reg = <0xff160000 0x1000>;
+ reg = <0x0 0xff160000 0x0 0x1000>;
interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
@@ -359,7 +368,7 @@
i2c5: i2c@ff170000 {
compatible = "rockchip,rk3288-i2c";
- reg = <0xff170000 0x1000>;
+ reg = <0x0 0xff170000 0x0 0x1000>;
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
@@ -372,7 +381,7 @@
uart0: serial@ff180000 {
compatible = "rockchip,rk3288-uart", "snps,dw-apb-uart";
- reg = <0xff180000 0x100>;
+ reg = <0x0 0xff180000 0x0 0x100>;
interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
@@ -387,7 +396,7 @@
uart1: serial@ff190000 {
compatible = "rockchip,rk3288-uart", "snps,dw-apb-uart";
- reg = <0xff190000 0x100>;
+ reg = <0x0 0xff190000 0x0 0x100>;
interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
@@ -402,7 +411,7 @@
uart2: serial@ff690000 {
compatible = "rockchip,rk3288-uart", "snps,dw-apb-uart";
- reg = <0xff690000 0x100>;
+ reg = <0x0 0xff690000 0x0 0x100>;
interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
@@ -415,7 +424,7 @@
uart3: serial@ff1b0000 {
compatible = "rockchip,rk3288-uart", "snps,dw-apb-uart";
- reg = <0xff1b0000 0x100>;
+ reg = <0x0 0xff1b0000 0x0 0x100>;
interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
@@ -430,7 +439,7 @@
uart4: serial@ff1c0000 {
compatible = "rockchip,rk3288-uart", "snps,dw-apb-uart";
- reg = <0xff1c0000 0x100>;
+ reg = <0x0 0xff1c0000 0x0 0x100>;
interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
@@ -445,7 +454,7 @@
dmac_peri: dma-controller@ff250000 {
compatible = "arm,pl330", "arm,primecell";
- reg = <0xff250000 0x4000>;
+ reg = <0x0 0xff250000 0x0 0x4000>;
interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
#dma-cells = <1>;
@@ -455,7 +464,7 @@
clock-names = "apb_pclk";
};
- thermal: thermal-zones {
+ thermal-zones {
reserve_thermal: reserve-thermal {
polling-delay-passive = <1000>; /* milliseconds */
polling-delay = <5000>; /* milliseconds */
@@ -538,24 +547,28 @@
tsadc: tsadc@ff280000 {
compatible = "rockchip,rk3288-tsadc";
- reg = <0xff280000 0x100>;
+ reg = <0x0 0xff280000 0x0 0x100>;
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;
clock-names = "tsadc", "apb_pclk";
resets = <&cru SRST_TSADC>;
reset-names = "tsadc-apb";
- pinctrl-names = "otp_out";
- pinctrl-0 = <&otp_out>;
+ pinctrl-names = "init", "default", "sleep";
+ pinctrl-0 = <&otp_pin>;
+ pinctrl-1 = <&otp_out>;
+ pinctrl-2 = <&otp_pin>;
#thermal-sensor-cells = <1>;
- hw-shut-temp = <125000>;
+ rockchip,grf = <&grf>;
+ rockchip,hw-tshut-temp = <95000>;
status = "disabled";
};
gmac: ethernet@ff290000 {
compatible = "rockchip,rk3288-gmac";
- reg = <0xff290000 0x10000>;
- interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "macirq";
+ reg = <0x0 0xff290000 0x0 0x10000>;
+ interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "macirq", "eth_wake_irq";
rockchip,grf = <&grf>;
clocks = <&cru SCLK_MAC>,
<&cru SCLK_MAC_RX>, <&cru SCLK_MAC_TX>,
@@ -567,14 +580,14 @@
"aclk_mac", "pclk_mac";
resets = <&cru SRST_MAC>;
reset-names = "stmmaceth";
+ status = "disabled";
};
usb_host0_ehci: usb@ff500000 {
compatible = "generic-ehci";
- reg = <0xff500000 0x100>;
+ reg = <0x0 0xff500000 0x0 0x100>;
interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru HCLK_USBHOST0>;
- clock-names = "usbhost";
phys = <&usbphy1>;
phy-names = "usb";
status = "disabled";
@@ -594,7 +607,7 @@
usb_host1: usb@ff540000 {
compatible = "rockchip,rk3288-usb", "rockchip,rk3066-usb",
"snps,dwc2";
- reg = <0xff540000 0x40000>;
+ reg = <0x0 0xff540000 0x0 0x40000>;
interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru HCLK_USBHOST1>;
clock-names = "otg";
@@ -608,7 +621,7 @@
usb_otg: usb@ff580000 {
compatible = "rockchip,rk3288-usb", "rockchip,rk3066-usb",
"snps,dwc2";
- reg = <0xff580000 0x40000>;
+ reg = <0x0 0xff580000 0x0 0x40000>;
interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru HCLK_OTG0>;
clock-names = "otg";
@@ -623,16 +636,15 @@
usb_hsic: usb@ff5c0000 {
compatible = "generic-ehci";
- reg = <0xff5c0000 0x100>;
+ reg = <0x0 0xff5c0000 0x0 0x100>;
interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru HCLK_HSIC>;
- clock-names = "usbhost";
status = "disabled";
};
dmac_bus_ns: dma-controller@ff600000 {
compatible = "arm,pl330", "arm,primecell";
- reg = <0xff600000 0x4000>;
+ reg = <0x0 0xff600000 0x0 0x4000>;
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
#dma-cells = <1>;
@@ -645,7 +657,7 @@
i2c0: i2c@ff650000 {
compatible = "rockchip,rk3288-i2c";
- reg = <0xff650000 0x1000>;
+ reg = <0x0 0xff650000 0x0 0x1000>;
interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
@@ -658,7 +670,7 @@
i2c2: i2c@ff660000 {
compatible = "rockchip,rk3288-i2c";
- reg = <0xff660000 0x1000>;
+ reg = <0x0 0xff660000 0x0 0x1000>;
interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
@@ -671,7 +683,7 @@
pwm0: pwm@ff680000 {
compatible = "rockchip,rk3288-pwm";
- reg = <0xff680000 0x10>;
+ reg = <0x0 0xff680000 0x0 0x10>;
#pwm-cells = <3>;
pinctrl-names = "default";
pinctrl-0 = <&pwm0_pin>;
@@ -681,7 +693,7 @@
pwm1: pwm@ff680010 {
compatible = "rockchip,rk3288-pwm";
- reg = <0xff680010 0x10>;
+ reg = <0x0 0xff680010 0x0 0x10>;
#pwm-cells = <3>;
pinctrl-names = "default";
pinctrl-0 = <&pwm1_pin>;
@@ -691,7 +703,7 @@
pwm2: pwm@ff680020 {
compatible = "rockchip,rk3288-pwm";
- reg = <0xff680020 0x10>;
+ reg = <0x0 0xff680020 0x0 0x10>;
#pwm-cells = <3>;
pinctrl-names = "default";
pinctrl-0 = <&pwm2_pin>;
@@ -701,7 +713,7 @@
pwm3: pwm@ff680030 {
compatible = "rockchip,rk3288-pwm";
- reg = <0xff680030 0x10>;
+ reg = <0x0 0xff680030 0x0 0x10>;
#pwm-cells = <3>;
pinctrl-names = "default";
pinctrl-0 = <&pwm3_pin>;
@@ -711,10 +723,10 @@
bus_intmem: sram@ff700000 {
compatible = "mmio-sram";
- reg = <0xff700000 0x18000>;
+ reg = <0x0 0xff700000 0x0 0x18000>;
#address-cells = <1>;
#size-cells = <1>;
- ranges = <0 0xff700000 0x18000>;
+ ranges = <0 0x0 0xff700000 0x18000>;
smp-sram@0 {
compatible = "rockchip,rk3066-smp-sram";
reg = <0x00 0x10>;
@@ -723,12 +735,12 @@
pmu_sram: sram@ff720000 {
compatible = "rockchip,rk3288-pmu-sram", "mmio-sram";
- reg = <0xff720000 0x1000>;
+ reg = <0x0 0xff720000 0x0 0x1000>;
};
pmu: power-management@ff730000 {
compatible = "rockchip,rk3288-pmu", "syscon", "simple-mfd";
- reg = <0xff730000 0x100>;
+ reg = <0x0 0xff730000 0x0 0x100>;
power: power-controller {
compatible = "rockchip,rk3288-power-controller";
@@ -853,12 +865,14 @@
sgrf: syscon@ff740000 {
compatible = "rockchip,rk3288-sgrf", "syscon";
- reg = <0xff740000 0x1000>;
+ reg = <0x0 0xff740000 0x0 0x1000>;
};
cru: clock-controller@ff760000 {
compatible = "rockchip,rk3288-cru";
- reg = <0xff760000 0x1000>;
+ reg = <0x0 0xff760000 0x0 0x1000>;
+ clocks = <&xin24m>;
+ clock-names = "xin24m";
rockchip,grf = <&grf>;
#clock-cells = <1>;
#reset-cells = <1>;
@@ -876,7 +890,7 @@
grf: syscon@ff770000 {
compatible = "rockchip,rk3288-grf", "syscon", "simple-mfd";
- reg = <0xff770000 0x1000>;
+ reg = <0x0 0xff770000 0x0 0x1000>;
edp_phy: edp-phy {
compatible = "rockchip,rk3288-dp-phy";
@@ -931,15 +945,15 @@
wdt: watchdog@ff800000 {
compatible = "rockchip,rk3288-wdt", "snps,dw-wdt";
- reg = <0xff800000 0x100>;
+ reg = <0x0 0xff800000 0x0 0x100>;
clocks = <&cru PCLK_WDT>;
interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
- spdif: sound@ff88b0000 {
+ spdif: sound@ff8b0000 {
compatible = "rockchip,rk3288-spdif", "rockchip,rk3066-spdif";
- reg = <0xff8b0000 0x10000>;
+ reg = <0x0 0xff8b0000 0x0 0x10000>;
#sound-dai-cells = <0>;
clocks = <&cru SCLK_SPDIF8CH>, <&cru HCLK_SPDIF8CH>;
clock-names = "mclk", "hclk";
@@ -954,7 +968,7 @@
i2s: i2s@ff890000 {
compatible = "rockchip,rk3288-i2s", "rockchip,rk3066-i2s";
- reg = <0xff890000 0x10000>;
+ reg = <0x0 0xff890000 0x0 0x10000>;
#sound-dai-cells = <0>;
interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru SCLK_I2S0>, <&cru HCLK_I2S0>;
@@ -970,7 +984,7 @@
crypto: crypto@ff8a0000 {
compatible = "rockchip,rk3288-crypto";
- reg = <0xff8a0000 0x4000>;
+ reg = <0x0 0xff8a0000 0x0 0x4000>;
interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru ACLK_CRYPTO>, <&cru HCLK_CRYPTO>,
<&cru SCLK_CRYPTO>, <&cru ACLK_DMAC1>;
@@ -981,7 +995,7 @@
iep_mmu: iommu@ff900800 {
compatible = "rockchip,iommu";
- reg = <0xff900800 0x40>;
+ reg = <0x0 0xff900800 0x0 0x40>;
interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>;
clock-names = "aclk", "iface";
@@ -991,7 +1005,7 @@
isp_mmu: iommu@ff914000 {
compatible = "rockchip,iommu";
- reg = <0xff914000 0x100>, <0xff915000 0x100>;
+ reg = <0x0 0xff914000 0x0 0x100>, <0x0 0xff915000 0x0 0x100>;
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru ACLK_ISP>, <&cru HCLK_ISP>;
clock-names = "aclk", "iface";
@@ -1002,7 +1016,7 @@
rga: rga@ff920000 {
compatible = "rockchip,rk3288-rga";
- reg = <0xff920000 0x180>;
+ reg = <0x0 0xff920000 0x0 0x180>;
interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru ACLK_RGA>, <&cru HCLK_RGA>, <&cru SCLK_RGA>;
clock-names = "aclk", "hclk", "sclk";
@@ -1013,7 +1027,7 @@
vopb: vop@ff930000 {
compatible = "rockchip,rk3288-vop";
- reg = <0xff930000 0x19c>, <0xff931000 0x1000>;
+ reg = <0x0 0xff930000 0x0 0x19c>, <0x0 0xff931000 0x0 0x1000>;
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru ACLK_VOP0>, <&cru DCLK_VOP0>, <&cru HCLK_VOP0>;
clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
@@ -1051,7 +1065,7 @@
vopb_mmu: iommu@ff930300 {
compatible = "rockchip,iommu";
- reg = <0xff930300 0x100>;
+ reg = <0x0 0xff930300 0x0 0x100>;
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru ACLK_VOP0>, <&cru HCLK_VOP0>;
clock-names = "aclk", "iface";
@@ -1062,7 +1076,7 @@
vopl: vop@ff940000 {
compatible = "rockchip,rk3288-vop";
- reg = <0xff940000 0x19c>, <0xff941000 0x1000>;
+ reg = <0x0 0xff940000 0x0 0x19c>, <0x0 0xff941000 0x0 0x1000>;
interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru ACLK_VOP1>, <&cru DCLK_VOP1>, <&cru HCLK_VOP1>;
clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
@@ -1100,7 +1114,7 @@
vopl_mmu: iommu@ff940300 {
compatible = "rockchip,iommu";
- reg = <0xff940300 0x100>;
+ reg = <0x0 0xff940300 0x0 0x100>;
interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru ACLK_VOP1>, <&cru HCLK_VOP1>;
clock-names = "aclk", "iface";
@@ -1109,9 +1123,9 @@
status = "disabled";
};
- mipi_dsi: mipi@ff960000 {
+ mipi_dsi: dsi@ff960000 {
compatible = "rockchip,rk3288-mipi-dsi", "snps,dw-mipi-dsi";
- reg = <0xff960000 0x4000>;
+ reg = <0x0 0xff960000 0x0 0x4000>;
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru SCLK_MIPIDSI_24M>, <&cru PCLK_MIPI_DSI0>;
clock-names = "ref", "pclk";
@@ -1120,24 +1134,34 @@
status = "disabled";
ports {
- mipi_in: port {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ mipi_in: port@0 {
+ reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
+
mipi_in_vopb: endpoint@0 {
reg = <0>;
remote-endpoint = <&vopb_out_mipi>;
};
+
mipi_in_vopl: endpoint@1 {
reg = <1>;
remote-endpoint = <&vopl_out_mipi>;
};
};
+
+ mipi_out: port@1 {
+ reg = <1>;
+ };
};
};
lvds: lvds@ff96c000 {
compatible = "rockchip,rk3288-lvds";
- reg = <0xff96c000 0x4000>;
+ reg = <0x0 0xff96c000 0x0 0x4000>;
clocks = <&cru PCLK_LVDS_PHY>;
clock-names = "pclk_lvds";
pinctrl-names = "lcdc";
@@ -1152,7 +1176,6 @@
lvds_in: port@0 {
reg = <0>;
-
#address-cells = <1>;
#size-cells = <0>;
@@ -1160,17 +1183,22 @@
reg = <0>;
remote-endpoint = <&vopb_out_lvds>;
};
+
lvds_in_vopl: endpoint@1 {
reg = <1>;
remote-endpoint = <&vopl_out_lvds>;
};
};
+
+ lvds_out: port@1 {
+ reg = <1>;
+ };
};
};
edp: dp@ff970000 {
compatible = "rockchip,rk3288-dp";
- reg = <0xff970000 0x4000>;
+ reg = <0x0 0xff970000 0x0 0x4000>;
interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru SCLK_EDP>, <&cru PCLK_EDP_CTRL>;
clock-names = "dp", "pclk";
@@ -1185,25 +1213,32 @@
ports {
#address-cells = <1>;
#size-cells = <0>;
+
edp_in: port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
+
edp_in_vopb: endpoint@0 {
reg = <0>;
remote-endpoint = <&vopb_out_edp>;
};
+
edp_in_vopl: endpoint@1 {
reg = <1>;
remote-endpoint = <&vopl_out_edp>;
};
};
+
+ edp_out: port@1 {
+ reg = <1>;
+ };
};
};
hdmi: hdmi@ff980000 {
compatible = "rockchip,rk3288-dw-hdmi";
- reg = <0xff980000 0x20000>;
+ reg = <0x0 0xff980000 0x0 0x20000>;
reg-io-width = <4>;
#sound-dai-cells = <0>;
rockchip,grf = <&grf>;
@@ -1231,7 +1266,7 @@
vpu: video-codec@ff9a0000 {
compatible = "rockchip,rk3288-vpu";
- reg = <0xff9a0000 0x800>;
+ reg = <0x0 0xff9a0000 0x0 0x800>;
interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "vepu", "vdpu";
@@ -1243,7 +1278,7 @@
vpu_mmu: iommu@ff9a0800 {
compatible = "rockchip,iommu";
- reg = <0xff9a0800 0x100>;
+ reg = <0x0 0xff9a0800 0x0 0x100>;
interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>;
clock-names = "aclk", "iface";
@@ -1253,7 +1288,7 @@
hevc_mmu: iommu@ff9c0440 {
compatible = "rockchip,iommu";
- reg = <0xff9c0440 0x40>, <0xff9c0480 0x40>;
+ reg = <0x0 0xff9c0440 0x0 0x40>, <0x0 0xff9c0480 0x0 0x40>;
interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru ACLK_HEVC>, <&cru HCLK_HEVC>;
clock-names = "aclk", "iface";
@@ -1263,7 +1298,7 @@
gpu: gpu@ffa30000 {
compatible = "rockchip,rk3288-mali", "arm,mali-t760";
- reg = <0xffa30000 0x10000>;
+ reg = <0x0 0xffa30000 0x0 0x10000>;
interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
@@ -1302,22 +1337,22 @@
qos_gpu_r: qos@ffaa0000 {
compatible = "rockchip,rk3288-qos", "syscon";
- reg = <0xffaa0000 0x20>;
+ reg = <0x0 0xffaa0000 0x0 0x20>;
};
qos_gpu_w: qos@ffaa0080 {
compatible = "rockchip,rk3288-qos", "syscon";
- reg = <0xffaa0080 0x20>;
+ reg = <0x0 0xffaa0080 0x0 0x20>;
};
qos_vio1_vop: qos@ffad0000 {
compatible = "rockchip,rk3288-qos", "syscon";
- reg = <0xffad0000 0x20>;
+ reg = <0x0 0xffad0000 0x0 0x20>;
};
qos_vio1_isp_w0: qos@ffad0100 {
compatible = "rockchip,rk3288-qos", "syscon";
- reg = <0xffad0100 0x20>;
+ reg = <0x0 0xffad0100 0x0 0x20>;
};
qos_vio1_isp_w1: qos@ffad0180 {
@@ -1332,47 +1367,47 @@
qos_vio0_vip: qos@ffad0480 {
compatible = "rockchip,rk3288-qos", "syscon";
- reg = <0xffad0480 0x20>;
+ reg = <0x0 0xffad0480 0x0 0x20>;
};
qos_vio0_iep: qos@ffad0500 {
compatible = "rockchip,rk3288-qos", "syscon";
- reg = <0xffad0500 0x20>;
+ reg = <0x0 0xffad0500 0x0 0x20>;
};
qos_vio2_rga_r: qos@ffad0800 {
compatible = "rockchip,rk3288-qos", "syscon";
- reg = <0xffad0800 0x20>;
+ reg = <0x0 0xffad0800 0x0 0x20>;
};
qos_vio2_rga_w: qos@ffad0880 {
compatible = "rockchip,rk3288-qos", "syscon";
- reg = <0xffad0880 0x20>;
+ reg = <0x0 0xffad0880 0x0 0x20>;
};
qos_vio1_isp_r: qos@ffad0900 {
compatible = "rockchip,rk3288-qos", "syscon";
- reg = <0xffad0900 0x20>;
+ reg = <0x0 0xffad0900 0x0 0x20>;
};
qos_video: qos@ffae0000 {
compatible = "rockchip,rk3288-qos", "syscon";
- reg = <0xffae0000 0x20>;
+ reg = <0x0 0xffae0000 0x0 0x20>;
};
qos_hevc_r: qos@ffaf0000 {
compatible = "rockchip,rk3288-qos", "syscon";
- reg = <0xffaf0000 0x20>;
+ reg = <0x0 0xffaf0000 0x0 0x20>;
};
qos_hevc_w: qos@ffaf0080 {
compatible = "rockchip,rk3288-qos", "syscon";
- reg = <0xffaf0080 0x20>;
+ reg = <0x0 0xffaf0080 0x0 0x20>;
};
dmac_bus_s: dma-controller@ffb20000 {
compatible = "arm,pl330", "arm,primecell";
- reg = <0xffb20000 0x4000>;
+ reg = <0x0 0xffb20000 0x0 0x4000>;
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
#dma-cells = <1>;
@@ -1384,7 +1419,7 @@
efuse: efuse@ffb40000 {
compatible = "rockchip,rk3288-efuse";
- reg = <0xffb40000 0x10000>;
+ reg = <0x0 0xffb40000 0x0 0x20>;
#address-cells = <1>;
#size-cells = <1>;
clocks = <&cru PCLK_EFUSE256>;
@@ -1404,10 +1439,10 @@
#interrupt-cells = <3>;
#address-cells = <0>;
- reg = <0xffc01000 0x1000>,
- <0xffc02000 0x1000>,
- <0xffc04000 0x2000>,
- <0xffc06000 0x2000>;
+ reg = <0x0 0xffc01000 0x0 0x1000>,
+ <0x0 0xffc02000 0x0 0x2000>,
+ <0x0 0xffc04000 0x0 0x2000>,
+ <0x0 0xffc06000 0x0 0x2000>;
interrupts = <GIC_PPI 9 0xf04>;
};
@@ -1415,13 +1450,13 @@
compatible = "rockchip,rk3288-pinctrl";
rockchip,grf = <&grf>;
rockchip,pmu = <&pmu>;
- #address-cells = <1>;
- #size-cells = <1>;
+ #address-cells = <2>;
+ #size-cells = <2>;
ranges;
- gpio0: gpio0@ff750000 {
+ gpio0: gpio@ff750000 {
compatible = "rockchip,gpio-bank";
- reg = <0xff750000 0x100>;
+ reg = <0x0 0xff750000 0x0 0x100>;
interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO0>;
@@ -1432,9 +1467,9 @@
#interrupt-cells = <2>;
};
- gpio1: gpio1@ff780000 {
+ gpio1: gpio@ff780000 {
compatible = "rockchip,gpio-bank";
- reg = <0xff780000 0x100>;
+ reg = <0x0 0xff780000 0x0 0x100>;
interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO1>;
@@ -1445,9 +1480,9 @@
#interrupt-cells = <2>;
};
- gpio2: gpio2@ff790000 {
+ gpio2: gpio@ff790000 {
compatible = "rockchip,gpio-bank";
- reg = <0xff790000 0x100>;
+ reg = <0x0 0xff790000 0x0 0x100>;
interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO2>;
@@ -1458,9 +1493,9 @@
#interrupt-cells = <2>;
};
- gpio3: gpio3@ff7a0000 {
+ gpio3: gpio@ff7a0000 {
compatible = "rockchip,gpio-bank";
- reg = <0xff7a0000 0x100>;
+ reg = <0x0 0xff7a0000 0x0 0x100>;
interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO3>;
@@ -1471,9 +1506,9 @@
#interrupt-cells = <2>;
};
- gpio4: gpio4@ff7b0000 {
+ gpio4: gpio@ff7b0000 {
compatible = "rockchip,gpio-bank";
- reg = <0xff7b0000 0x100>;
+ reg = <0x0 0xff7b0000 0x0 0x100>;
interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO4>;
@@ -1484,9 +1519,9 @@
#interrupt-cells = <2>;
};
- gpio5: gpio5@ff7c0000 {
+ gpio5: gpio@ff7c0000 {
compatible = "rockchip,gpio-bank";
- reg = <0xff7c0000 0x100>;
+ reg = <0x0 0xff7c0000 0x0 0x100>;
interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO5>;
@@ -1497,9 +1532,9 @@
#interrupt-cells = <2>;
};
- gpio6: gpio6@ff7d0000 {
+ gpio6: gpio@ff7d0000 {
compatible = "rockchip,gpio-bank";
- reg = <0xff7d0000 0x100>;
+ reg = <0x0 0xff7d0000 0x0 0x100>;
interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO6>;
@@ -1510,9 +1545,9 @@
#interrupt-cells = <2>;
};
- gpio7: gpio7@ff7e0000 {
+ gpio7: gpio@ff7e0000 {
compatible = "rockchip,gpio-bank";
- reg = <0xff7e0000 0x100>;
+ reg = <0x0 0xff7e0000 0x0 0x100>;
interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO7>;
@@ -1523,9 +1558,9 @@
#interrupt-cells = <2>;
};
- gpio8: gpio8@ff7f0000 {
+ gpio8: gpio@ff7f0000 {
compatible = "rockchip,gpio-bank";
- reg = <0xff7f0000 0x100>;
+ reg = <0x0 0xff7f0000 0x0 0x100>;
interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO8>;
diff --git a/arch/arm/dts/rk3328-nanopi-r2c-plus-u-boot.dtsi b/arch/arm/dts/rk3328-nanopi-r2c-plus-u-boot.dtsi
new file mode 100644
index 0000000..f8adb9e
--- /dev/null
+++ b/arch/arm/dts/rk3328-nanopi-r2c-plus-u-boot.dtsi
@@ -0,0 +1,9 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+#include "rk3328-nanopi-r2c-u-boot.dtsi"
+
+/ {
+ chosen {
+ u-boot,spl-boot-order = "same-as-spl", &sdmmc, &emmc;
+ };
+};
diff --git a/arch/arm/dts/rk3328-nanopi-r2c-plus.dts b/arch/arm/dts/rk3328-nanopi-r2c-plus.dts
new file mode 100644
index 0000000..16a1958
--- /dev/null
+++ b/arch/arm/dts/rk3328-nanopi-r2c-plus.dts
@@ -0,0 +1,33 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/*
+ * Copyright (c) 2021 FriendlyElec Computer Tech. Co., Ltd.
+ * (http://www.friendlyarm.com)
+ *
+ * Copyright (c) 2023 Tianling Shen <cnsztl@gmail.com>
+ */
+
+/dts-v1/;
+#include "rk3328-nanopi-r2c.dts"
+
+/ {
+ model = "FriendlyElec NanoPi R2C Plus";
+ compatible = "friendlyarm,nanopi-r2c-plus", "rockchip,rk3328";
+
+ aliases {
+ mmc1 = &emmc;
+ };
+};
+
+&emmc {
+ bus-width = <8>;
+ cap-mmc-highspeed;
+ max-frequency = <150000000>;
+ mmc-ddr-1_8v;
+ mmc-hs200-1_8v;
+ non-removable;
+ pinctrl-names = "default";
+ pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
+ vmmc-supply = <&vcc_io_33>;
+ vqmmc-supply = <&vcc18_emmc>;
+ status = "okay";
+};
diff --git a/arch/arm/dts/rk3588-turing-rk1-u-boot.dtsi b/arch/arm/dts/rk3588-turing-rk1-u-boot.dtsi
new file mode 100644
index 0000000..06c6f32
--- /dev/null
+++ b/arch/arm/dts/rk3588-turing-rk1-u-boot.dtsi
@@ -0,0 +1,25 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2023 Joshua Riek <jjriek@verizon.net>
+ *
+ */
+
+#include "rk3588-u-boot.dtsi"
+
+/ {
+ chosen {
+ u-boot,spl-boot-order = "same-as-spl", &sdmmc, &sdhci;
+ };
+};
+
+&sdhci {
+ cap-mmc-highspeed;
+ mmc-ddr-1_8v;
+ mmc-hs200-1_8v;
+};
+
+&uart9 {
+ bootph-pre-ram;
+ clock-frequency = <24000000>;
+ status = "okay";
+};
diff --git a/arch/arm/dts/rk3588-turing-rk1.dts b/arch/arm/dts/rk3588-turing-rk1.dts
new file mode 100644
index 0000000..7bcad28
--- /dev/null
+++ b/arch/arm/dts/rk3588-turing-rk1.dts
@@ -0,0 +1,21 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * This device tree covers the common case where the RK1 is used as a
+ * "compute node" system, where the carrier board is functioning more like a
+ * generic backplane (with no non-autoenumerable peripherals of its own) than
+ * like a device that the SoM is meant to enable.
+ *
+ * Copyright (c) 2023 Sam Edwards <CFSworks@gmail.com>
+ */
+
+/dts-v1/;
+#include "rk3588-turing-rk1.dtsi"
+
+/ {
+ model = "Turing Machines RK1";
+ compatible = "turing,rk1", "rockchip,rk3588";
+
+ chosen {
+ stdout-path = "serial9:115200n8";
+ };
+};
diff --git a/arch/arm/dts/rk3588-turing-rk1.dtsi b/arch/arm/dts/rk3588-turing-rk1.dtsi
new file mode 100644
index 0000000..9570b34
--- /dev/null
+++ b/arch/arm/dts/rk3588-turing-rk1.dtsi
@@ -0,0 +1,614 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Device tree definitions for the Turing RK1 SoM.
+ *
+ * Copyright (c) 2023 Sam Edwards <CFSworks@gmail.com>
+ *
+ * Based on RK3588-EVB1 devicetree
+ * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
+ */
+
+/dts-v1/;
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+#include "rk3588.dtsi"
+
+/ {
+ compatible = "turing,rk1", "rockchip,rk3588";
+
+ aliases {
+ ethernet0 = &gmac1;
+ mmc0 = &sdhci;
+ serial2 = &uart2;
+ serial9 = &uart9;
+ };
+
+ fan: pwm-fan {
+ compatible = "pwm-fan";
+ cooling-levels = <0 25 95 145 195 255>;
+ fan-supply = <&vcc5v0_sys>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm0m2_pins &fan_int>;
+ interrupt-parent = <&gpio0>;
+ interrupts = <RK_PA4 IRQ_TYPE_EDGE_FALLING>;
+ pwms = <&pwm0 0 50000 0>;
+ #cooling-cells = <2>;
+ };
+
+ vcc3v3_pcie30: vcc3v3-pcie30-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3_pcie30";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ enable-active-high;
+ gpios = <&gpio2 RK_PC5 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&vcc3v3_pcie30_en>;
+ startup-delay-us = <5000>;
+ };
+
+ vcc5v0_sys: vcc5v0-sys-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_sys";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ };
+
+ vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_1v1_nldo_s3";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1100000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+};
+
+&combphy2_psu {
+ status = "okay";
+};
+
+&cpu_b0 {
+ cpu-supply = <&vdd_cpu_big0_s0>;
+};
+
+&cpu_b1 {
+ cpu-supply = <&vdd_cpu_big0_s0>;
+};
+
+&cpu_b2 {
+ cpu-supply = <&vdd_cpu_big1_s0>;
+};
+
+&cpu_b3 {
+ cpu-supply = <&vdd_cpu_big1_s0>;
+};
+
+&cpu_l0 {
+ cpu-supply = <&vdd_cpu_lit_s0>;
+};
+
+&cpu_l1 {
+ cpu-supply = <&vdd_cpu_lit_s0>;
+};
+
+&cpu_l2 {
+ cpu-supply = <&vdd_cpu_lit_s0>;
+};
+
+&cpu_l3 {
+ cpu-supply = <&vdd_cpu_lit_s0>;
+};
+
+&gmac1 {
+ clock_in_out = "output";
+ phy-handle = <&rgmii_phy>;
+ phy-mode = "rgmii-rxid";
+ pinctrl-0 = <&gmac1_miim
+ &gmac1_tx_bus2
+ &gmac1_rx_bus2
+ &gmac1_rgmii_clk
+ &gmac1_rgmii_bus>;
+ pinctrl-names = "default";
+ rx_delay = <0x00>;
+ tx_delay = <0x43>;
+ status = "okay";
+};
+
+&i2c0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0m2_xfer>;
+ status = "okay";
+
+ vdd_cpu_big0_s0: regulator@42 {
+ compatible = "rockchip,rk8602";
+ reg = <0x42>;
+ fcs,suspend-voltage-selector = <1>;
+ regulator-name = "vdd_cpu_big0_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <1050000>;
+ regulator-ramp-delay = <2300>;
+ vin-supply = <&vcc5v0_sys>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_cpu_big1_s0: regulator@43 {
+ compatible = "rockchip,rk8603", "rockchip,rk8602";
+ reg = <0x43>;
+ fcs,suspend-voltage-selector = <1>;
+ regulator-name = "vdd_cpu_big1_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <1050000>;
+ regulator-ramp-delay = <2300>;
+ vin-supply = <&vcc5v0_sys>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+};
+
+&i2c1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c1m2_xfer>;
+ status = "okay";
+
+ vdd_npu_s0: regulator@42 {
+ compatible = "rockchip,rk8602";
+ reg = <0x42>;
+ fcs,suspend-voltage-selector = <1>;
+ regulator-name = "vdd_npu_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <950000>;
+ regulator-ramp-delay = <2300>;
+ vin-supply = <&vcc5v0_sys>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+};
+
+&i2c6 {
+ status = "okay";
+
+ hym8563: rtc@51 {
+ compatible = "haoyu,hym8563";
+ reg = <0x51>;
+ #clock-cells = <0>;
+ clock-output-names = "hym8563";
+ pinctrl-names = "default";
+ pinctrl-0 = <&hym8563_int>;
+ interrupt-parent = <&gpio0>;
+ interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>;
+ wakeup-source;
+ };
+};
+
+&mdio1 {
+ rgmii_phy: ethernet-phy@1 {
+ /* RTL8211F */
+ compatible = "ethernet-phy-id001c.c916",
+ "ethernet-phy-ieee802.3-c22";
+ reg = <0x1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&rtl8211f_rst>;
+ reset-assert-us = <15000>;
+ reset-deassert-us = <50000>;
+ reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
+ };
+};
+
+&pcie2x1l1 {
+ linux,pci-domain = <1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie2_reset>;
+ reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
+ status = "okay";
+};
+
+&pcie30phy {
+ status = "okay";
+};
+
+&pcie3x4 {
+ linux,pci-domain = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie3_reset>;
+ reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
+ vpcie3v3-supply = <&vcc3v3_pcie30>;
+ status = "okay";
+};
+
+&pinctrl {
+ fan {
+ fan_int: fan-int {
+ rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ hym8563 {
+ hym8563_int: hym8563-int {
+ rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ pcie2 {
+ pcie2_reset: pcie2-reset {
+ rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ pcie3 {
+ pcie3_reset: pcie3-reset {
+ rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ vcc3v3_pcie30_en: pcie3-reg {
+ rockchip,pins = <2 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ rtl8211f {
+ rtl8211f_rst: rtl8211f-rst {
+ rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+};
+
+&pwm0 {
+ status = "okay";
+};
+
+&sdhci {
+ bus-width = <8>;
+ no-sdio;
+ no-sd;
+ non-removable;
+ mmc-hs400-1_8v;
+ mmc-hs400-enhanced-strobe;
+ status = "okay";
+};
+
+&spi2 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>;
+ num-cs = <1>;
+
+ pmic@0 {
+ compatible = "rockchip,rk806";
+ spi-max-frequency = <1000000>;
+ reg = <0x0>;
+
+ interrupt-parent = <&gpio0>;
+ interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
+ <&rk806_dvs2_null>, <&rk806_dvs3_null>;
+
+ vcc1-supply = <&vcc5v0_sys>;
+ vcc2-supply = <&vcc5v0_sys>;
+ vcc3-supply = <&vcc5v0_sys>;
+ vcc4-supply = <&vcc5v0_sys>;
+ vcc5-supply = <&vcc5v0_sys>;
+ vcc6-supply = <&vcc5v0_sys>;
+ vcc7-supply = <&vcc5v0_sys>;
+ vcc8-supply = <&vcc5v0_sys>;
+ vcc9-supply = <&vcc5v0_sys>;
+ vcc10-supply = <&vcc5v0_sys>;
+ vcc11-supply = <&vcc_2v0_pldo_s3>;
+ vcc12-supply = <&vcc5v0_sys>;
+ vcc13-supply = <&vcc_1v1_nldo_s3>;
+ vcc14-supply = <&vcc_1v1_nldo_s3>;
+ vcca-supply = <&vcc5v0_sys>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ rk806_dvs1_null: dvs1-null-pins {
+ pins = "gpio_pwrctrl2";
+ function = "pin_fun0";
+ };
+
+ rk806_dvs2_null: dvs2-null-pins {
+ pins = "gpio_pwrctrl2";
+ function = "pin_fun0";
+ };
+
+ rk806_dvs3_null: dvs3-null-pins {
+ pins = "gpio_pwrctrl3";
+ function = "pin_fun0";
+ };
+
+ regulators {
+ vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
+ regulator-boot-on;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <950000>;
+ regulator-ramp-delay = <12500>;
+ regulator-name = "vdd_gpu_s0";
+ regulator-enable-ramp-delay = <400>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <950000>;
+ regulator-ramp-delay = <12500>;
+ regulator-name = "vdd_cpu_lit_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_log_s0: dcdc-reg3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <675000>;
+ regulator-max-microvolt = <750000>;
+ regulator-ramp-delay = <12500>;
+ regulator-name = "vdd_log_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <750000>;
+ };
+ };
+
+ vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <950000>;
+ regulator-ramp-delay = <12500>;
+ regulator-name = "vdd_vdenc_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_ddr_s0: dcdc-reg5 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <675000>;
+ regulator-max-microvolt = <900000>;
+ regulator-ramp-delay = <12500>;
+ regulator-name = "vdd_ddr_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <850000>;
+ };
+ };
+
+ vdd2_ddr_s3: dcdc-reg6 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-name = "vdd2_ddr_s3";
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ vcc_2v0_pldo_s3: dcdc-reg7 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <2000000>;
+ regulator-max-microvolt = <2000000>;
+ regulator-ramp-delay = <12500>;
+ regulator-name = "vdd_2v0_pldo_s3";
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <2000000>;
+ };
+ };
+
+ vcc_3v3_s3: dcdc-reg8 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc_3v3_s3";
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3300000>;
+ };
+ };
+
+ vddq_ddr_s0: dcdc-reg9 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-name = "vddq_ddr_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_1v8_s3: dcdc-reg10 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc_1v8_s3";
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ avcc_1v8_s0: pldo-reg1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "avcc_1v8_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_1v8_s0: pldo-reg2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc_1v8_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ avdd_1v2_s0: pldo-reg3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-name = "avdd_1v2_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_3v3_s0: pldo-reg4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-ramp-delay = <12500>;
+ regulator-name = "vcc_3v3_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vccio_sd_s0: pldo-reg5 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-ramp-delay = <12500>;
+ regulator-name = "vccio_sd_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ pldo6_s3: pldo-reg6 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "pldo6_s3";
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vdd_0v75_s3: nldo-reg1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <750000>;
+ regulator-max-microvolt = <750000>;
+ regulator-name = "vdd_0v75_s3";
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <750000>;
+ };
+ };
+
+ vdd_ddr_pll_s0: nldo-reg2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <850000>;
+ regulator-max-microvolt = <850000>;
+ regulator-name = "vdd_ddr_pll_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <850000>;
+ };
+ };
+
+ avdd_0v75_s0: nldo-reg3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <750000>;
+ regulator-max-microvolt = <750000>;
+ regulator-name = "avdd_0v75_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_0v85_s0: nldo-reg4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <850000>;
+ regulator-max-microvolt = <850000>;
+ regulator-name = "vdd_0v85_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_0v75_s0: nldo-reg5 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <750000>;
+ regulator-max-microvolt = <750000>;
+ regulator-name = "vdd_0v75_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+ };
+ };
+};
+
+&uart2 {
+ pinctrl-0 = <&uart2m0_xfer>;
+ status = "okay";
+};
+
+&uart9 {
+ pinctrl-0 = <&uart9m0_xfer>;
+ status = "okay";
+};
diff --git a/arch/arm/dts/sdm845.dtsi b/arch/arm/dts/sdm845.dtsi
index 3b86b93..96c9749 100644
--- a/arch/arm/dts/sdm845.dtsi
+++ b/arch/arm/dts/sdm845.dtsi
@@ -26,23 +26,13 @@
#power-domain-cells = <1>;
};
- gpio_north: gpio_north@3900000 {
- #gpio-cells = <2>;
+ tlmm: pinctrl@3400000 {
compatible = "qcom,sdm845-pinctrl";
- reg = <0x3900000 0x400000>;
- gpio-count = <150>;
- gpio-controller;
- gpio-ranges = <&gpio_north 0 0 150>;
- gpio-bank-name = "soc_north.";
- };
-
- tlmm_north: pinctrl_north@3900000 {
- compatible = "qcom,sdm845-pinctrl";
- reg = <0x3900000 0x400000>;
+ reg = <0x3400000 0xc00000>;
gpio-count = <150>;
gpio-controller;
#gpio-cells = <2>;
- gpio-ranges = <&tlmm_north 0 0 150>;
+ gpio-ranges = <&tlmm 0 0 150>;
/* DEBUG UART */
qup_uart9: qup-uart9-default {
@@ -73,7 +63,7 @@
reg = <0xc440000 0x1100>,
<0xc600000 0x2000000>,
<0xe600000 0x100000>;
- reg-names = "cnfg", "core", "obsrvr";
+ reg-names = "core", "chnls", "obsrvr";
#address-cells = <0x1>;
#size-cells = <0x1>;
@@ -88,21 +78,33 @@
#address-cells = <0x1>;
#size-cells = <0x1>;
- pm8998_pon: pm8998_pon@800 {
- compatible = "qcom,pm8998-pwrkey";
+ pm8998_pon: pon@800 {
+ compatible = "qcom,pm8998-pon";
+
reg = <0x800 0x100>;
- #gpio-cells = <2>;
- gpio-controller;
- gpio-bank-name = "pm8998_key.";
+ mode-bootloader = <0x2>;
+ mode-recovery = <0x1>;
+
+ pm8998_pwrkey: pwrkey {
+ compatible = "qcom,pm8941-pwrkey";
+ debounce = <15625>;
+ bias-pull-up;
+ };
+
+ pm8998_resin: resin {
+ compatible = "qcom,pm8941-resin";
+ debounce = <15625>;
+ bias-pull-up;
+ status = "disabled";
+ };
};
pm8998_gpios: pm8998_gpios@c000 {
compatible = "qcom,pm8998-gpio";
reg = <0xc000 0x1a00>;
gpio-controller;
- gpio-count = <21>;
+ gpio-ranges = <&pm8998_gpios 0 0 26>;
#gpio-cells = <2>;
- gpio-bank-name = "pm8998.";
};
};
diff --git a/arch/arm/dts/socfpga_agilex.dtsi b/arch/arm/dts/socfpga_agilex.dtsi
index c3ead2d..712304d 100644
--- a/arch/arm/dts/socfpga_agilex.dtsi
+++ b/arch/arm/dts/socfpga_agilex.dtsi
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
/*
- * Copyright (C) 2019, Intel Corporation
+ * Copyright (C) 2019-2023 Intel Corporation <www.intel.com>
*/
/dts-v1/;
@@ -20,7 +20,7 @@
service_reserved: svcbuffer@0 {
compatible = "shared-dma-pool";
- reg = <0x0 0x0 0x0 0x1000000>;
+ reg = <0x0 0x0 0x0 0x2000000>;
alignment = <0x1000>;
no-map;
};
diff --git a/arch/arm/dts/starqltechn-uboot.dtsi b/arch/arm/dts/starqltechn-uboot.dtsi
index d81a22f..55c6d18 100644
--- a/arch/arm/dts/starqltechn-uboot.dtsi
+++ b/arch/arm/dts/starqltechn-uboot.dtsi
@@ -19,22 +19,9 @@
clock-controller@100000 {
bootph-all;
};
- gpio_north@3900000 {
- bootph-all;
- };
- pinctrl_north@3900000 {
+ pinctrl@3400000 {
bootph-all;
};
};
};
-&pm8998_pon {
- key_vol_down {
- gpios = <&pm8998_pon 1 0>;
- label = "key_vol_down";
- };
- key_power {
- gpios = <&pm8998_pon 0 0>;
- label = "key_power";
- };
-};
diff --git a/arch/arm/dts/starqltechn.dts b/arch/arm/dts/starqltechn.dts
index eec51d1..0842e19 100644
--- a/arch/arm/dts/starqltechn.dts
+++ b/arch/arm/dts/starqltechn.dts
@@ -45,35 +45,23 @@
format = "a8r8g8b8";
};
- gpio-keys {
- compatible = "gpio-keys";
-
- key-pwr {
- label = "Power";
- linux,code = <KEY_ENTER>;
- gpios = <&pm8998_pon 0 GPIO_ACTIVE_LOW>;
- };
-
- key-vol-down {
- label = "Volume Down";
- linux,code = <KEY_DOWN>;
- gpios = <&pm8998_pon 1 GPIO_ACTIVE_LOW>;
- };
- };
-
soc: soc {
serial@a84000 {
status = "okay";
};
+ };
+};
- pinctrl_north@3900000 {
- muic_i2c: muic_i2c {
- pins = "GPIO_33", "GPIO_34";
- drive-strength = <0x2>;
- function = "gpio";
- bias-disable;
- };
- };
+&pm8998_resin {
+ status = "okay";
+};
+
+&tlmm {
+ muic_i2c: muic-i2c-n {
+ pins = "GPIO_33", "GPIO_34";
+ drive-strength = <0x2>;
+ function = "gpio";
+ bias-disable;
};
};
diff --git a/arch/arm/dts/stm32f469-disco-u-boot.dtsi b/arch/arm/dts/stm32f469-disco-u-boot.dtsi
index c07e202..47ba9fa 100644
--- a/arch/arm/dts/stm32f469-disco-u-boot.dtsi
+++ b/arch/arm/dts/stm32f469-disco-u-boot.dtsi
@@ -90,6 +90,13 @@
bootph-all;
};
+&dsi {
+ clocks = <&rcc 0 STM32F4_APB2_CLOCK(DSI)>,
+ <&rcc 0 STM32F4_APB2_CLOCK(LTDC)>,
+ <&clk_hse>;
+ clock-names = "pclk", "px_clk", "ref";
+};
+
&gpioa {
bootph-all;
};
@@ -134,6 +141,12 @@
bootph-all;
};
+<dc {
+ bootph-all;
+
+ clocks = <&rcc 0 STM32F4_APB2_CLOCK(LTDC)>;
+};
+
&pinctrl {
bootph-all;
diff --git a/arch/arm/dts/stm32f469-disco.dts b/arch/arm/dts/stm32f469-disco.dts
index 6e0ffc1..c9acabf 100644
--- a/arch/arm/dts/stm32f469-disco.dts
+++ b/arch/arm/dts/stm32f469-disco.dts
@@ -119,7 +119,7 @@
};
};
- panel-dsi@0 {
+ panel@0 {
compatible = "orisetech,otm8009a";
reg = <0>; /* dsi virtual channel (0..3) */
reset-gpios = <&gpioh 7 GPIO_ACTIVE_LOW>;
@@ -138,7 +138,7 @@
status = "okay";
port {
- ltdc_out_dsi: endpoint@0 {
+ ltdc_out_dsi: endpoint {
remote-endpoint = <&dsi_in>;
};
};
diff --git a/arch/arm/dts/stm32f769-disco-u-boot.dtsi b/arch/arm/dts/stm32f769-disco-u-boot.dtsi
index 2c823cc..add55c9 100644
--- a/arch/arm/dts/stm32f769-disco-u-boot.dtsi
+++ b/arch/arm/dts/stm32f769-disco-u-boot.dtsi
@@ -70,22 +70,17 @@
};
};
};
+ };
+};
- ltdc: display-controller@40016800 {
- compatible = "st,stm32-ltdc";
- reg = <0x40016800 0x200>;
- resets = <&rcc STM32F7_APB2_RESET(LTDC)>;
- clocks = <&rcc 0 STM32F7_APB2_CLOCK(LTDC)>;
+<dc {
+ clocks = <&rcc 0 STM32F7_APB2_CLOCK(LTDC)>;
+ bootph-all;
- status = "okay";
- bootph-all;
-
- ports {
- port@0 {
- dp_out: endpoint {
- remote-endpoint = <&dsi_in>;
- };
- };
+ ports {
+ port@0 {
+ dp_out: endpoint {
+ remote-endpoint = <&dsi_in>;
};
};
};
diff --git a/arch/arm/dts/stm32f769-disco.dts b/arch/arm/dts/stm32f769-disco.dts
index 6f93fc7..d63cd2b 100644
--- a/arch/arm/dts/stm32f769-disco.dts
+++ b/arch/arm/dts/stm32f769-disco.dts
@@ -86,6 +86,10 @@
status = "okay";
};
+<dc {
+ status = "okay";
+};
+
&rtc {
status = "okay";
};
diff --git a/arch/arm/dts/stm32mp15-scmi-u-boot.dtsi b/arch/arm/dts/stm32mp15-scmi-u-boot.dtsi
index 7c8fec6..79494ec 100644
--- a/arch/arm/dts/stm32mp15-scmi-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp15-scmi-u-boot.dtsi
@@ -135,7 +135,7 @@
};
&usart1 {
- resets = <&rcc USART1_R>;
+ resets = <&scmi_reset RST_SCMI_USART1>;
};
&usart2 {
diff --git a/arch/arm/dts/stm32mp15-u-boot.dtsi b/arch/arm/dts/stm32mp15-u-boot.dtsi
index 573dd4d..fe56f05 100644
--- a/arch/arm/dts/stm32mp15-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp15-u-boot.dtsi
@@ -206,7 +206,7 @@
resets = <&rcc UART8_R>;
};
-#if defined(CONFIG_STM32MP15x_STM32IMAGE)
+#if defined(CONFIG_STM32MP15X_STM32IMAGE)
&binman {
u-boot-stm32 {
filename = "u-boot.stm32";
diff --git a/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi b/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi
index 2623ceb..a163582 100644
--- a/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi
@@ -22,13 +22,13 @@
st,stm32prog-gpios = <&gpioa 14 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
};
-#if defined(CONFIG_STM32MP15x_STM32IMAGE) || defined(CONFIG_SPL)
+#if defined(CONFIG_STM32MP15X_STM32IMAGE) || defined(CONFIG_SPL)
config {
u-boot,mmc-env-partition = "ssbl";
};
#endif
-#ifdef CONFIG_STM32MP15x_STM32IMAGE
+#ifdef CONFIG_STM32MP15X_STM32IMAGE
/* only needed for boot with TF-A, witout FIP support */
firmware {
optee {
diff --git a/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi b/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi
index b828827..ef91088 100644
--- a/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi
@@ -20,13 +20,13 @@
st,stm32prog-gpios = <&gpioa 14 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
};
-#if defined(CONFIG_STM32MP15x_STM32IMAGE) || defined(CONFIG_SPL)
+#if defined(CONFIG_STM32MP15X_STM32IMAGE) || defined(CONFIG_SPL)
config {
u-boot,mmc-env-partition = "ssbl";
};
#endif
-#ifdef CONFIG_STM32MP15x_STM32IMAGE
+#ifdef CONFIG_STM32MP15X_STM32IMAGE
/* only needed for boot with TF-A, witout FIP support */
firmware {
optee {
diff --git a/arch/arm/dts/stm32mp157c-ev1-u-boot.dtsi b/arch/arm/dts/stm32mp157c-ev1-u-boot.dtsi
index eb283ca..139940b 100644
--- a/arch/arm/dts/stm32mp157c-ev1-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp157c-ev1-u-boot.dtsi
@@ -28,7 +28,7 @@
#address-cells = <1>;
#size-cells = <1>;
-#if defined(CONFIG_STM32MP15x_STM32IMAGE) || defined(CONFIG_SPL)
+#if defined(CONFIG_STM32MP15X_STM32IMAGE) || defined(CONFIG_SPL)
partition@0 {
label = "fsbl1";
reg = <0x00000000 0x00040000>;
@@ -82,7 +82,7 @@
#address-cells = <1>;
#size-cells = <1>;
-#if defined(CONFIG_STM32MP15x_STM32IMAGE) || defined(CONFIG_SPL)
+#if defined(CONFIG_STM32MP15X_STM32IMAGE) || defined(CONFIG_SPL)
partition@0 {
label = "fsbl";
reg = <0x00000000 0x00200000>;
diff --git a/arch/arm/dts/stm32mp25-u-boot.dtsi b/arch/arm/dts/stm32mp25-u-boot.dtsi
index f4f26ad..0c8e95b 100644
--- a/arch/arm/dts/stm32mp25-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp25-u-boot.dtsi
@@ -37,6 +37,10 @@
};
};
+&bsec {
+ bootph-all;
+};
+
&gpioa {
bootph-all;
};
diff --git a/arch/arm/dts/stm32mp251.dtsi b/arch/arm/dts/stm32mp251.dtsi
index cf2f28d..44eb664 100644
--- a/arch/arm/dts/stm32mp251.dtsi
+++ b/arch/arm/dts/stm32mp251.dtsi
@@ -127,6 +127,22 @@
};
};
+ bsec: efuse@44000000 {
+ compatible = "st,stm32mp25-bsec";
+ reg = <0x44000000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ part_number_otp@24 {
+ reg = <0x24 0x4>;
+ };
+
+ package_otp@1e8 {
+ reg = <0x1e8 0x1>;
+ bits = <0 3>;
+ };
+ };
+
syscfg: syscon@44230000 {
compatible = "st,stm32mp25-syscfg", "syscon";
reg = <0x44230000 0x10000>;
diff --git a/arch/arm/dts/sun50i-h616-bigtreetech-cb1-manta.dts b/arch/arm/dts/sun50i-h616-bigtreetech-cb1-manta.dts
new file mode 100644
index 0000000..dbce61b
--- /dev/null
+++ b/arch/arm/dts/sun50i-h616-bigtreetech-cb1-manta.dts
@@ -0,0 +1,35 @@
+// SPDX-License-Identifier: (GPL-2.0+ or MIT)
+/*
+ * Copyright (C) 2023 Martin Botka <martin.botka@somainline.org>.
+ */
+
+/dts-v1/;
+
+#include "sun50i-h616-bigtreetech-cb1.dtsi"
+
+/ {
+ model = "BigTreeTech CB1";
+ compatible = "bigtreetech,cb1-manta", "bigtreetech,cb1", "allwinner,sun50i-h616";
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+};
+
+&ehci1 {
+ status = "okay";
+};
+
+&ohci1 {
+ status = "okay";
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_ph_pins>;
+ status = "okay";
+};
diff --git a/arch/arm/dts/sun50i-h616-bigtreetech-cb1.dtsi b/arch/arm/dts/sun50i-h616-bigtreetech-cb1.dtsi
new file mode 100644
index 0000000..1fed2b4
--- /dev/null
+++ b/arch/arm/dts/sun50i-h616-bigtreetech-cb1.dtsi
@@ -0,0 +1,138 @@
+// SPDX-License-Identifier: (GPL-2.0+ or MIT)
+/*
+ * Copyright (C) 2023 Martin Botka <martin.botka@somainline.org>.
+ */
+
+/dts-v1/;
+
+#include "sun50i-h616.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/leds/common.h>
+
+/ {
+ aliases {
+ ethernet0 = &rtl8189ftv;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ led-0 {
+ function = LED_FUNCTION_STATUS;
+ color = <LED_COLOR_ID_GREEN>;
+ gpios = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */
+ };
+ };
+
+ reg_vcc5v: regulator-vcc5v {
+ /* board wide 5V supply from carrier boards */
+ compatible = "regulator-fixed";
+ regulator-name = "vcc-5v";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ };
+
+ reg_vcc33_wifi: vcc33-wifi {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc33-wifi";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ vin-supply = <®_vcc5v>;
+ };
+
+ reg_vcc_wifi_io: vcc-wifi-io {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc-wifi-io";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ vin-supply = <®_vcc33_wifi>;
+ };
+
+ wifi_pwrseq: wifi-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ clocks = <&rtc 1>;
+ clock-names = "ext_clock";
+ reset-gpios = <&pio 6 18 GPIO_ACTIVE_LOW>; /* PG18 */
+ post-power-on-delay-ms = <200>;
+ };
+};
+
+&mmc0 {
+ vmmc-supply = <®_dldo1>;
+ /* Card detection pin is not connected */
+ broken-cd;
+ bus-width = <4>;
+ status = "okay";
+};
+
+&mmc1 {
+ vmmc-supply = <®_vcc33_wifi>;
+ vqmmc-supply = <®_vcc_wifi_io>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ bus-width = <4>;
+ non-removable;
+ mmc-ddr-1_8v;
+ status = "okay";
+
+ rtl8189ftv: wifi@1 {
+ reg = <1>;
+ };
+};
+
+&r_i2c {
+ status = "okay";
+
+ axp313a: pmic@36 {
+ compatible = "x-powers,axp313a";
+ reg = <0x36>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ regulators{
+ reg_dcdc1: dcdc1 {
+ regulator-name = "vdd-gpu-sys";
+ regulator-min-microvolt = <810000>;
+ regulator-max-microvolt = <990000>;
+ regulator-always-on;
+ };
+
+ reg_dcdc2: dcdc2 {
+ regulator-name = "vdd-cpu";
+ regulator-min-microvolt = <810000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-ramp-delay = <200>;
+ regulator-always-on;
+ };
+
+ reg_dcdc3: dcdc3 {
+ regulator-name = "vcc-dram";
+ regulator-min-microvolt = <1350000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-always-on;
+ };
+
+ reg_aldo1: aldo1 {
+ regulator-name = "vcc-1v8-pll";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ };
+
+ reg_dldo1: dldo1 {
+ regulator-name = "vcc-3v3-io";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
+ };
+ };
+};
+
+&usbphy {
+ status = "okay";
+};
diff --git a/arch/arm/dts/sun50i-h616-bigtreetech-pi.dts b/arch/arm/dts/sun50i-h616-bigtreetech-pi.dts
new file mode 100644
index 0000000..832f08b
--- /dev/null
+++ b/arch/arm/dts/sun50i-h616-bigtreetech-pi.dts
@@ -0,0 +1,63 @@
+// SPDX-License-Identifier: (GPL-2.0+ or MIT)
+/*
+ * Copyright (C) 2023 Martin Botka <martin@biqu3d.com>.
+ */
+
+/dts-v1/;
+
+#include "sun50i-h616-bigtreetech-cb1.dtsi"
+
+/ {
+ model = "BigTreeTech Pi";
+ compatible = "bigtreetech,pi", "allwinner,sun50i-h616";
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&ehci1 {
+ status = "okay";
+};
+
+&ehci2 {
+ status = "okay";
+};
+
+&ehci3 {
+ status = "okay";
+};
+
+&ir {
+ status = "okay";
+};
+
+&ohci0 {
+ status = "okay";
+};
+
+&ohci1 {
+ status = "okay";
+};
+
+&ohci2 {
+ status = "okay";
+};
+
+&ohci3 {
+ status = "okay";
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_ph_pins>;
+ status = "okay";
+};
diff --git a/arch/arm/dts/sun50i-h616-orangepi-zero.dtsi b/arch/arm/dts/sun50i-h616-orangepi-zero.dtsi
index 15290e6..fc7315b 100644
--- a/arch/arm/dts/sun50i-h616-orangepi-zero.dtsi
+++ b/arch/arm/dts/sun50i-h616-orangepi-zero.dtsi
@@ -68,10 +68,7 @@
&emac0 {
pinctrl-names = "default";
pinctrl-0 = <&ext_rgmii_pins>;
- phy-mode = "rgmii";
phy-handle = <&ext_rgmii_phy>;
- allwinner,rx-delay-ps = <3100>;
- allwinner,tx-delay-ps = <700>;
status = "okay";
};
diff --git a/arch/arm/dts/sun50i-h616-orangepi-zero2.dts b/arch/arm/dts/sun50i-h616-orangepi-zero2.dts
index d83852e..b5d7139 100644
--- a/arch/arm/dts/sun50i-h616-orangepi-zero2.dts
+++ b/arch/arm/dts/sun50i-h616-orangepi-zero2.dts
@@ -13,6 +13,9 @@
};
&emac0 {
+ allwinner,rx-delay-ps = <3100>;
+ allwinner,tx-delay-ps = <700>;
+ phy-mode = "rgmii";
phy-supply = <®_dcdce>;
};
diff --git a/arch/arm/dts/sun50i-h616.dtsi b/arch/arm/dts/sun50i-h616.dtsi
index 74aed0d..d549d27 100644
--- a/arch/arm/dts/sun50i-h616.dtsi
+++ b/arch/arm/dts/sun50i-h616.dtsi
@@ -133,6 +133,13 @@
#reset-cells = <1>;
};
+ sid: efuse@3006000 {
+ compatible = "allwinner,sun50i-h616-sid", "allwinner,sun50i-a64-sid";
+ reg = <0x03006000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ };
+
watchdog: watchdog@30090a0 {
compatible = "allwinner,sun50i-h616-wdt",
"allwinner,sun6i-a31-wdt";
diff --git a/arch/arm/dts/sun50i-h618-orangepi-zero2w.dts b/arch/arm/dts/sun50i-h618-orangepi-zero2w.dts
new file mode 100644
index 0000000..21ca197
--- /dev/null
+++ b/arch/arm/dts/sun50i-h618-orangepi-zero2w.dts
@@ -0,0 +1,176 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2023 Arm Ltd.
+ */
+
+/dts-v1/;
+
+#include "sun50i-h616.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/leds/common.h>
+
+/ {
+ model = "OrangePi Zero 2W";
+ compatible = "xunlong,orangepi-zero2w", "allwinner,sun50i-h618";
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ led-0 {
+ function = LED_FUNCTION_STATUS;
+ color = <LED_COLOR_ID_GREEN>;
+ gpios = <&pio 2 13 GPIO_ACTIVE_HIGH>; /* PC13 */
+ };
+ };
+
+ reg_vcc5v: vcc5v {
+ /* board wide 5V supply directly from the USB-C socket */
+ compatible = "regulator-fixed";
+ regulator-name = "vcc-5v";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ };
+
+ reg_vcc3v3: vcc3v3 {
+ /* SY8089 DC/DC converter */
+ compatible = "regulator-fixed";
+ regulator-name = "vcc-3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <®_vcc5v>;
+ regulator-always-on;
+ };
+};
+
+&ehci1 {
+ status = "okay";
+};
+
+/* USB 2 & 3 are on the FPC connector (or the exansion board) */
+
+&mmc0 {
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
+ bus-width = <4>;
+ vmmc-supply = <®_vcc3v3>;
+ status = "okay";
+};
+
+&ohci1 {
+ status = "okay";
+};
+
+&pio {
+ vcc-pc-supply = <®_dldo1>;
+ vcc-pf-supply = <®_dldo1>; /* internally via VCC-IO */
+ vcc-pg-supply = <®_aldo1>;
+ vcc-ph-supply = <®_dldo1>; /* internally via VCC-IO */
+ vcc-pi-supply = <®_dldo1>;
+};
+
+&r_i2c {
+ status = "okay";
+
+ axp313: pmic@36 {
+ compatible = "x-powers,axp313a";
+ reg = <0x36>;
+ #interrupt-cells = <1>;
+ interrupt-controller;
+ interrupt-parent = <&pio>;
+ interrupts = <2 9 IRQ_TYPE_LEVEL_LOW>; /* PC9 */
+
+ vin1-supply = <®_vcc5v>;
+ vin2-supply = <®_vcc5v>;
+ vin3-supply = <®_vcc5v>;
+
+ regulators {
+ /* Supplies VCC-PLL and DRAM */
+ reg_aldo1: aldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc1v8";
+ };
+
+ /* Supplies VCC-IO, so needs to be always on. */
+ reg_dldo1: dldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc3v3";
+ };
+
+ reg_dcdc1: dcdc1 {
+ regulator-always-on;
+ regulator-min-microvolt = <810000>;
+ regulator-max-microvolt = <990000>;
+ regulator-name = "vdd-gpu-sys";
+ };
+
+ reg_dcdc2: dcdc2 {
+ regulator-always-on;
+ regulator-min-microvolt = <810000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-name = "vdd-cpu";
+ };
+
+ reg_dcdc3: dcdc3 {
+ regulator-always-on;
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-name = "vdd-dram";
+ };
+ };
+ };
+};
+
+&spi0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi0_pins>, <&spi0_cs0_pin>;
+
+ flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <40000000>;
+ };
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_ph_pins>;
+ status = "okay";
+};
+
+&usbotg {
+ /*
+ * PHY0 pins are connected to a USB-C socket, but a role switch
+ * is not implemented: both CC pins are pulled to GND.
+ * The VBUS pins power the device, so a fixed peripheral mode
+ * is the best choice.
+ * The board can be powered via GPIOs, in this case port0 *can*
+ * act as a host (with a cable/adapter ignoring CC), as VBUS is
+ * then provided by the GPIOs. Any user of this setup would
+ * need to adjust the DT accordingly: dr_mode set to "host",
+ * enabling OHCI0 and EHCI0.
+ */
+ dr_mode = "peripheral";
+ status = "okay";
+};
+
+&usbphy {
+ usb1_vbus-supply = <®_vcc5v>;
+ status = "okay";
+};
diff --git a/arch/arm/dts/sun50i-h618-orangepi-zero3.dts b/arch/arm/dts/sun50i-h618-orangepi-zero3.dts
index 00fe28c..b3b1b86 100644
--- a/arch/arm/dts/sun50i-h618-orangepi-zero3.dts
+++ b/arch/arm/dts/sun50i-h618-orangepi-zero3.dts
@@ -13,6 +13,8 @@
};
&emac0 {
+ allwinner,tx-delay-ps = <700>;
+ phy-mode = "rgmii-rxid";
phy-supply = <®_dldo1>;
};
diff --git a/arch/arm/dts/sun50i-h618-transpeed-8k618-t.dts b/arch/arm/dts/sun50i-h618-transpeed-8k618-t.dts
new file mode 100644
index 0000000..8ea1fd4
--- /dev/null
+++ b/arch/arm/dts/sun50i-h618-transpeed-8k618-t.dts
@@ -0,0 +1,161 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2023 Arm Ltd.
+ */
+
+/dts-v1/;
+
+#include "sun50i-h616.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+ model = "Transpeed 8K618-T";
+ compatible = "transpeed,8k618-t", "allwinner,sun50i-h618";
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ reg_vcc5v: vcc5v {
+ /* board wide 5V supply directly from the DC input */
+ compatible = "regulator-fixed";
+ regulator-name = "vcc-5v";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ };
+
+ reg_vcc3v3: vcc3v3 {
+ /* discrete 3.3V regulator */
+ compatible = "regulator-fixed";
+ regulator-name = "vcc-3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&ehci1 {
+ status = "okay";
+};
+
+&ir {
+ status = "okay";
+};
+
+&mmc0 {
+ vmmc-supply = <®_dldo1>;
+ cd-gpios = <&pio 8 16 GPIO_ACTIVE_LOW>; /* PI16 */
+ bus-width = <4>;
+ status = "okay";
+};
+
+&mmc2 {
+ vmmc-supply = <®_dldo1>;
+ vqmmc-supply = <®_aldo1>;
+ bus-width = <8>;
+ non-removable;
+ cap-mmc-hw-reset;
+ mmc-ddr-1_8v;
+ mmc-hs200-1_8v;
+ status = "okay";
+};
+
+&ohci0 {
+ status = "okay";
+};
+
+&ohci1 {
+ status = "okay";
+};
+
+&r_i2c {
+ status = "okay";
+
+ axp313: pmic@36 {
+ compatible = "x-powers,axp313a";
+ reg = <0x36>;
+ #interrupt-cells = <1>;
+ interrupt-controller;
+
+ vin1-supply = <®_vcc5v>;
+ vin2-supply = <®_vcc5v>;
+ vin3-supply = <®_vcc5v>;
+
+ regulators {
+ reg_aldo1: aldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-1v8-pll";
+ };
+
+ reg_dldo1: dldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-3v3-io-mmc";
+ };
+
+ reg_dcdc1: dcdc1 {
+ regulator-always-on;
+ regulator-min-microvolt = <810000>;
+ regulator-max-microvolt = <990000>;
+ regulator-name = "vdd-gpu-sys";
+ };
+
+ reg_dcdc2: dcdc2 {
+ regulator-always-on;
+ regulator-min-microvolt = <810000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-name = "vdd-cpu";
+ };
+
+ reg_dcdc3: dcdc3 {
+ regulator-always-on;
+ regulator-min-microvolt = <1360000>;
+ regulator-max-microvolt = <1360000>;
+ regulator-name = "vdd-dram";
+ };
+ };
+ };
+};
+
+&pio {
+ vcc-pc-supply = <®_aldo1>;
+ vcc-pg-supply = <®_dldo1>;
+ vcc-ph-supply = <®_dldo1>;
+ vcc-pi-supply = <®_dldo1>;
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_ph_pins>;
+ status = "okay";
+};
+
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
+ uart-has-rtscts;
+ status = "okay";
+};
+
+&usbotg {
+ dr_mode = "host"; /* USB A type receptable */
+ status = "okay";
+};
+
+&usbphy {
+ status = "okay";
+};
diff --git a/arch/arm/dts/sun8i-r40.dtsi b/arch/arm/dts/sun8i-r40.dtsi
index 4ef26d8..a5b1f1e 100644
--- a/arch/arm/dts/sun8i-r40.dtsi
+++ b/arch/arm/dts/sun8i-r40.dtsi
@@ -338,6 +338,8 @@
resets = <&ccu RST_BUS_VE>;
interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
allwinner,sram = <&ve_sram 1>;
+ interconnects = <&mbus 4>;
+ interconnect-names = "dma-mem";
};
mmc0: mmc@1c0f000 {
diff --git a/arch/arm/dts/sun8i-v3s-anbernic-rg-nano.dts b/arch/arm/dts/sun8i-v3s-anbernic-rg-nano.dts
new file mode 100644
index 0000000..f34dfdf
--- /dev/null
+++ b/arch/arm/dts/sun8i-v3s-anbernic-rg-nano.dts
@@ -0,0 +1,276 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+/dts-v1/;
+#include <dt-bindings/input/linux-event-codes.h>
+#include "sun8i-v3s.dtsi"
+#include "sunxi-common-regulators.dtsi"
+
+/ {
+ model = "Anbernic RG Nano";
+ compatible = "anbernic,rg-nano", "allwinner,sun8i-v3s";
+
+ aliases {
+ rtc0 = &pcf8563;
+ rtc1 = &rtc;
+ serial0 = &uart0;
+ };
+
+ backlight: backlight {
+ compatible = "pwm-backlight";
+ brightness-levels = <0 1 2 3 8 14 21 32 46 60 80 100>;
+ default-brightness-level = <11>;
+ power-supply = <®_vcc5v0>;
+ pwms = <&pwm 0 40000 1>;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ gpio_keys: gpio-keys {
+ compatible = "gpio-keys";
+
+ button-a {
+ gpios = <&gpio_expander 12 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
+ label = "BTN-A";
+ linux,code = <BTN_EAST>;
+ };
+
+ button-b {
+ gpios = <&gpio_expander 14 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
+ label = "BTN-B";
+ linux,code = <BTN_SOUTH>;
+ };
+
+ button-down {
+ gpios = <&gpio_expander 1 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
+ label = "DPAD-DOWN";
+ linux,code = <BTN_DPAD_DOWN>;
+ };
+
+ button-left {
+ gpios = <&gpio_expander 4 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
+ label = "DPAD-LEFT";
+ linux,code = <BTN_DPAD_LEFT>;
+ };
+
+ button-right {
+ gpios = <&gpio_expander 0 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
+ label = "DPAD-RIGHT";
+ linux,code = <BTN_DPAD_RIGHT>;
+ };
+
+ button-se {
+ gpios = <&gpio_expander 7 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
+ label = "BTN-SELECT";
+ linux,code = <BTN_SELECT>;
+ };
+
+ button-st {
+ gpios = <&gpio_expander 6 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
+ label = "BTN-START";
+ linux,code = <BTN_START>;
+ };
+
+ button-tl {
+ gpios = <&gpio_expander 2 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
+ label = "BTN-L";
+ linux,code = <BTN_TL>;
+ };
+
+ button-tr {
+ gpios = <&gpio_expander 15 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
+ label = "BTN-R";
+ linux,code = <BTN_TR>;
+ };
+
+ button-up {
+ gpios = <&gpio_expander 3 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
+ label = "DPAD-UP";
+ linux,code = <BTN_DPAD_UP>;
+ };
+
+ button-x {
+ gpios = <&gpio_expander 11 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
+ label = "BTN-X";
+ linux,code = <BTN_NORTH>;
+ };
+
+ button-y {
+ gpios = <&gpio_expander 13 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
+ label = "BTN-Y";
+ linux,code = <BTN_WEST>;
+ };
+ };
+};
+
+&codec {
+ allwinner,audio-routing = "Speaker", "HP",
+ "MIC1", "Mic",
+ "Mic", "HBIAS";
+ allwinner,pa-gpios = <&pio 5 6 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PF6 */
+ status = "okay";
+};
+
+&ehci {
+ status = "okay";
+};
+
+&i2c0 {
+ status = "okay";
+
+ gpio_expander: gpio@20 {
+ compatible = "nxp,pcal6416";
+ reg = <0x20>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ interrupt-parent = <&pio>;
+ interrupts = <1 3 IRQ_TYPE_EDGE_BOTH>; /* PB3/EINT3 */
+ vcc-supply = <®_vcc3v3>;
+ };
+
+ axp209: pmic@34 {
+ reg = <0x34>;
+ interrupt-parent = <&pio>;
+ interrupts = <1 5 IRQ_TYPE_EDGE_FALLING>; /* PB5/EINT5 */
+ };
+
+ pcf8563: rtc@51 {
+ compatible = "nxp,pcf8563";
+ reg = <0x51>;
+ };
+};
+
+#include "axp209.dtsi"
+
+&battery_power_supply {
+ status = "okay";
+};
+
+&mmc0 {
+ broken-cd;
+ bus-width = <4>;
+ disable-wp;
+ vmmc-supply = <®_vcc3v3>;
+ vqmmc-supply = <®_vcc3v3>;
+ status = "okay";
+};
+
+&ohci {
+ status = "okay";
+};
+
+&pio {
+ vcc-pb-supply = <®_vcc3v3>;
+ vcc-pc-supply = <®_vcc3v3>;
+ vcc-pf-supply = <®_vcc3v3>;
+ vcc-pg-supply = <®_vcc3v3>;
+
+ spi0_no_miso_pins: spi0-no-miso-pins {
+ pins = "PC1", "PC2", "PC3";
+ function = "spi0";
+ };
+};
+
+&pwm {
+ pinctrl-0 = <&pwm0_pin>;
+ pinctrl-names = "default";
+ status = "okay";
+};
+
+/* DCDC2 wired into vdd-cpu, vdd-sys, and vdd-ephy. */
+®_dcdc2 {
+ regulator-always-on;
+ regulator-max-microvolt = <1250000>;
+ regulator-min-microvolt = <1250000>;
+ regulator-name = "vdd-cpu";
+};
+
+/* DCDC3 wired into every 3.3v input that isn't the RTC. */
+®_dcdc3 {
+ regulator-always-on;
+ regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <3300000>;
+ regulator-name = "vcc-io";
+};
+
+/* LDO1 wired into RTC, voltage is hard-wired at 3.3v. */
+®_ldo1 {
+ regulator-always-on;
+ regulator-name = "vcc-rtc";
+};
+
+/* LDO2 wired into VCC-PLL and audio codec. */
+®_ldo2 {
+ regulator-always-on;
+ regulator-max-microvolt = <3000000>;
+ regulator-min-microvolt = <3000000>;
+ regulator-name = "vcc-pll";
+};
+
+/* LDO3, LDO4, and LDO5 unused. */
+®_ldo3 {
+ status = "disabled";
+};
+
+®_ldo4 {
+ status = "disabled";
+};
+
+/* RTC uses internal oscillator */
+&rtc {
+ /delete-property/ clocks;
+};
+
+&spi0 {
+ pinctrl-0 = <&spi0_no_miso_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+
+ display@0 {
+ compatible = "saef,sftc154b", "panel-mipi-dbi-spi";
+ reg = <0>;
+ backlight = <&backlight>;
+ dc-gpios = <&pio 2 0 GPIO_ACTIVE_HIGH>; /* PC0 */
+ reset-gpios = <&pio 1 2 GPIO_ACTIVE_HIGH>; /* PB2 */
+ spi-max-frequency = <100000000>;
+
+ height-mm = <39>;
+ width-mm = <39>;
+
+ /* Set hb-porch to compensate for non-visible area */
+ panel-timing {
+ hactive = <240>;
+ vactive = <240>;
+ hback-porch = <80>;
+ vback-porch = <0>;
+ clock-frequency = <0>;
+ hfront-porch = <0>;
+ hsync-len = <0>;
+ vfront-porch = <0>;
+ vsync-len = <0>;
+ };
+ };
+};
+
+&uart0 {
+ pinctrl-0 = <&uart0_pb_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+};
+
+&usb_otg {
+ dr_mode = "otg";
+ status = "okay";
+};
+
+&usb_power_supply {
+ status = "okay";
+};
+
+&usbphy {
+ usb0_id_det-gpios = <&pio 6 5 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PG5 */
+ status = "okay";
+};
diff --git a/arch/arm/dts/sun8i-v3s.dtsi b/arch/arm/dts/sun8i-v3s.dtsi
index 3b9a282..e8a0447 100644
--- a/arch/arm/dts/sun8i-v3s.dtsi
+++ b/arch/arm/dts/sun8i-v3s.dtsi
@@ -319,6 +319,29 @@
#phy-cells = <1>;
};
+ ehci: usb@1c1a000 {
+ compatible = "allwinner,sun8i-v3s-ehci", "generic-ehci";
+ reg = <0x01c1a000 0x100>;
+ interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_EHCI0>, <&ccu CLK_BUS_OHCI0>;
+ resets = <&ccu RST_BUS_EHCI0>, <&ccu RST_BUS_OHCI0>;
+ phys = <&usbphy 0>;
+ phy-names = "usb";
+ status = "disabled";
+ };
+
+ ohci: usb@1c1a400 {
+ compatible = "allwinner,sun8i-v3s-ohci", "generic-ohci";
+ reg = <0x01c1a400 0x100>;
+ interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_EHCI0>, <&ccu CLK_BUS_OHCI0>,
+ <&ccu CLK_USB_OHCI0>;
+ resets = <&ccu RST_BUS_EHCI0>, <&ccu RST_BUS_OHCI0>;
+ phys = <&usbphy 0>;
+ phy-names = "usb";
+ status = "disabled";
+ };
+
ccu: clock@1c20000 {
compatible = "allwinner,sun8i-v3s-ccu";
reg = <0x01c20000 0x400>;
@@ -414,6 +437,18 @@
bias-pull-up;
};
+ /omit-if-no-ref/
+ pwm0_pin: pwm0-pin {
+ pins = "PB4";
+ function = "pwm0";
+ };
+
+ /omit-if-no-ref/
+ pwm1_pin: pwm1-pin {
+ pins = "PB5";
+ function = "pwm1";
+ };
+
spi0_pins: spi0-pins {
pins = "PC0", "PC1", "PC2", "PC3";
function = "spi0";
diff --git a/arch/arm/dts/sunxi-u-boot.dtsi b/arch/arm/dts/sunxi-u-boot.dtsi
index a0c8abb..0909a67 100644
--- a/arch/arm/dts/sunxi-u-boot.dtsi
+++ b/arch/arm/dts/sunxi-u-boot.dtsi
@@ -1,13 +1,9 @@
#include <config.h>
-#ifdef CONFIG_MACH_SUN50I_H6
-#define BL31_ADDR 0x104000
-#define SCP_ADDR 0x114000
-#elif defined(CONFIG_MACH_SUN50I_H616)
-#define BL31_ADDR 0x40000000
+#ifdef CONFIG_ARM64
+#define ARCH "arm64"
#else
-#define BL31_ADDR 0x44000
-#define SCP_ADDR 0x50000
+#define ARCH "arm"
#endif
/ {
@@ -44,47 +40,52 @@
filename = "spl/sunxi-spl.bin";
};
-#ifdef CONFIG_ARM64
+#ifdef CONFIG_SPL_LOAD_FIT
fit {
- description = "Configuration to load ATF before U-Boot";
+ description = "Configuration to load U-Boot and firmware";
#address-cells = <1>;
fit,fdt-list = "of-list";
images {
uboot {
- description = "U-Boot (64-bit)";
+ description = "U-Boot";
type = "standalone";
os = "u-boot";
- arch = "arm64";
+ arch = ARCH;
compression = "none";
load = <CONFIG_TEXT_BASE>;
+#if CONFIG_SUNXI_BL31_BASE == 0
+ entry = <CONFIG_TEXT_BASE>;
+#endif
u-boot-nodtb {
};
};
+#if CONFIG_SUNXI_BL31_BASE
atf {
description = "ARM Trusted Firmware";
type = "firmware";
os = "arm-trusted-firmware";
- arch = "arm64";
+ arch = ARCH;
compression = "none";
- load = <BL31_ADDR>;
- entry = <BL31_ADDR>;
+ load = <CONFIG_SUNXI_BL31_BASE>;
+ entry = <CONFIG_SUNXI_BL31_BASE>;
atf-bl31 {
filename = "bl31.bin";
missing-msg = "atf-bl31-sunxi";
};
};
+#endif
-#ifdef SCP_ADDR
+#if CONFIG_SUNXI_SCP_BASE
scp {
description = "SCP firmware";
type = "firmware";
arch = "or1k";
compression = "none";
- load = <SCP_ADDR>;
+ load = <CONFIG_SUNXI_SCP_BASE>;
scp {
filename = "scp.bin";
@@ -105,11 +106,15 @@
@config-SEQ {
description = "NAME";
+#if CONFIG_SUNXI_BL31_BASE
firmware = "atf";
-#ifndef SCP_ADDR
- loadables = "uboot";
#else
+ firmware = "uboot";
+#endif
+#if CONFIG_SUNXI_SCP_BASE
loadables = "scp", "uboot";
+#else
+ loadables = "uboot";
#endif
fdt = "fdt-SEQ";
};
diff --git a/arch/arm/dts/tegra20-paz00.dts b/arch/arm/dts/tegra20-paz00.dts
index ecf9fbd..5cf604e 100644
--- a/arch/arm/dts/tegra20-paz00.dts
+++ b/arch/arm/dts/tegra20-paz00.dts
@@ -315,20 +315,19 @@
clock-frequency = <100000>;
};
- nvec@7000c500 {
+ i2c@7000c500 {
compatible = "nvidia,nvec";
- reg = <0x7000c500 0x100>;
- interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
+
+ /delete-property/ #address-cells;
+ /delete-property/ #size-cells;
+ /delete-property/ dmas;
+ /delete-property/ dma-names;
+
clock-frequency = <80000>;
request-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>;
slave-addr = <138>;
- clocks = <&tegra_car TEGRA20_CLK_I2C3>,
- <&tegra_car TEGRA20_CLK_PLL_P_OUT3>;
- clock-names = "div-clk", "fast-clk";
- resets = <&tegra_car 67>;
- reset-names = "i2c";
+
+ status = "okay";
};
i2c@7000d000 {
@@ -523,8 +522,8 @@
power-supply = <&vdd_bl_reg>;
pwms = <&pwm 0 5000000>;
- brightness-levels = <0 16 32 48 64 80 96 112 128 144 160 176 192 208 224 240 255>;
- default-brightness-level = <10>;
+ brightness-levels = <1 35 70 105 140 175 210 255>;
+ default-brightness-level = <2>;
backlight-boot-off;
};
diff --git a/arch/arm/dts/tegra30-asus-grouper-common.dtsi b/arch/arm/dts/tegra30-asus-grouper-common.dtsi
index fcf31e2..e8a3511 100644
--- a/arch/arm/dts/tegra30-asus-grouper-common.dtsi
+++ b/arch/arm/dts/tegra30-asus-grouper-common.dtsi
@@ -44,6 +44,718 @@
};
};
+ pinmux@70000868 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&state_default>;
+
+ state_default: pinmux {
+ clk_32k_out_pa0 {
+ nvidia,pins = "clk_32k_out_pa0";
+ nvidia,function = "blink";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ uart3_cts_n_pa1 {
+ nvidia,pins = "uart3_cts_n_pa1",
+ "uart3_rxd_pw7";
+ nvidia,function = "uartc";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ dap2_fs_pa2 {
+ nvidia,pins = "dap2_fs_pa2",
+ "dap2_sclk_pa3",
+ "dap2_din_pa4",
+ "dap2_dout_pa5";
+ nvidia,function = "i2s1";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ sdmmc3_clk_pa6 {
+ nvidia,pins = "sdmmc3_clk_pa6";
+ nvidia,function = "sdmmc3";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ sdmmc3_cmd_pa7 {
+ nvidia,pins = "sdmmc3_cmd_pa7",
+ "sdmmc3_dat3_pb4",
+ "sdmmc3_dat2_pb5",
+ "sdmmc3_dat1_pb6",
+ "sdmmc3_dat0_pb7",
+ "sdmmc3_dat4_pd1",
+ "sdmmc3_dat6_pd3",
+ "sdmmc3_dat7_pd4";
+ nvidia,function = "sdmmc3";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ gmi_a17_pb0 {
+ nvidia,pins = "gmi_a17_pb0",
+ "gmi_a18_pb1";
+ nvidia,function = "uartd";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ lcd_pwr0_pb2 {
+ nvidia,pins = "lcd_pwr0_pb2",
+ "lcd_pwr1_pc1",
+ "lcd_m1_pw1";
+ nvidia,function = "displaya";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ lcd_pclk_pb3 {
+ nvidia,pins = "lcd_pclk_pb3",
+ "lcd_d0_pe0",
+ "lcd_d1_pe1",
+ "lcd_d2_pe2",
+ "lcd_d3_pe3",
+ "lcd_d4_pe4",
+ "lcd_d5_pe5",
+ "lcd_d6_pe6",
+ "lcd_d7_pe7",
+ "lcd_d8_pf0",
+ "lcd_d9_pf1",
+ "lcd_d10_pf2",
+ "lcd_d11_pf3",
+ "lcd_d12_pf4",
+ "lcd_d13_pf5",
+ "lcd_d14_pf6",
+ "lcd_d15_pf7",
+ "lcd_de_pj1",
+ "lcd_hsync_pj3",
+ "lcd_vsync_pj4",
+ "lcd_d16_pm0",
+ "lcd_d17_pm1",
+ "lcd_d18_pm2",
+ "lcd_d19_pm3",
+ "lcd_d20_pm4",
+ "lcd_d21_pm5",
+ "lcd_d22_pm6",
+ "lcd_d23_pm7",
+ "lcd_cs0_n_pn4",
+ "lcd_sdout_pn5",
+ "lcd_dc0_pn6",
+ "lcd_cs1_n_pw0",
+ "lcd_sdin_pz2",
+ "lcd_sck_pz4";
+ nvidia,function = "displaya";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ uart3_rts_n_pc0 {
+ nvidia,pins = "uart3_rts_n_pc0",
+ "uart3_txd_pw6";
+ nvidia,function = "uartc";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ uart2_txd_pc2 {
+ nvidia,pins = "uart2_txd_pc2",
+ "uart2_rts_n_pj6";
+ nvidia,function = "uartb";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ uart2_rxd_pc3 {
+ nvidia,pins = "uart2_rxd_pc3",
+ "uart2_cts_n_pj5";
+ nvidia,function = "uartb";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ gen1_i2c_scl_pc4 {
+ nvidia,pins = "gen1_i2c_scl_pc4",
+ "gen1_i2c_sda_pc5";
+ nvidia,function = "i2c1";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ nvidia,open-drain = <TEGRA_PIN_ENABLE>;
+ };
+ gmi_wp_n_pc7 {
+ nvidia,pins = "gmi_wp_n_pc7",
+ "gmi_wait_pi7",
+ "gmi_cs4_n_pk2",
+ "gmi_cs3_n_pk4";
+ nvidia,function = "rsvd1";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ gmi_ad12_ph4 {
+ nvidia,pins = "gmi_ad12_ph4",
+ "gmi_cs0_n_pj0",
+ "gmi_cs1_n_pj2",
+ "gmi_cs2_n_pk3";
+ nvidia,function = "rsvd1";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ sdmmc3_dat5_pd0 {
+ nvidia,pins = "sdmmc3_dat5_pd0";
+ nvidia,function = "sdmmc3";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ gmi_ad0_pg0 {
+ nvidia,pins = "gmi_ad0_pg0",
+ "gmi_ad1_pg1",
+ "gmi_ad14_ph6",
+ "pu1";
+ nvidia,function = "rsvd1";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ gmi_ad2_pg2 {
+ nvidia,pins = "gmi_ad2_pg2",
+ "gmi_ad3_pg3",
+ "gmi_ad6_pg6",
+ "gmi_ad7_pg7";
+ nvidia,function = "rsvd1";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ gmi_ad4_pg4 {
+ nvidia,pins = "gmi_ad4_pg4",
+ "gmi_ad5_pg5";
+ nvidia,function = "nand";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ gmi_ad8_ph0 {
+ nvidia,pins = "gmi_ad8_ph0";
+ nvidia,function = "pwm0";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ gmi_ad9_ph1 {
+ nvidia,pins = "gmi_ad9_ph1";
+ nvidia,function = "rsvd4";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ gmi_ad10_ph2 {
+ nvidia,pins = "gmi_ad10_ph2";
+ nvidia,function = "pwm2";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ gmi_ad11_ph3 {
+ nvidia,pins = "gmi_ad11_ph3";
+ nvidia,function = "pwm3";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ gmi_ad13_ph5 {
+ nvidia,pins = "gmi_ad13_ph5",
+ "gmi_wr_n_pi0",
+ "gmi_oe_n_pi1",
+ "gmi_adv_n_pk0";
+ nvidia,function = "rsvd1";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ gmi_ad15_ph7 {
+ nvidia,pins = "gmi_ad15_ph7";
+ nvidia,function = "rsvd1";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ gmi_dqs_pi2 {
+ nvidia,pins = "gmi_dqs_pi2",
+ "pu2",
+ "pv1";
+ nvidia,function = "rsvd1";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ gmi_rst_n_pi4 {
+ nvidia,pins = "gmi_rst_n_pi4";
+ nvidia,function = "nand";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ gmi_iordy_pi5 {
+ nvidia,pins = "gmi_iordy_pi5";
+ nvidia,function = "rsvd1";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ gmi_cs7_n_pi6 {
+ nvidia,pins = "gmi_cs7_n_pi6",
+ "gmi_clk_pk1";
+ nvidia,function = "nand";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ gmi_a16_pj7 {
+ nvidia,pins = "gmi_a16_pj7",
+ "gmi_a19_pk7";
+ nvidia,function = "uartd";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ spdif_out_pk5 {
+ nvidia,pins = "spdif_out_pk5";
+ nvidia,function = "spdif";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ spdif_in_pk6 {
+ nvidia,pins = "spdif_in_pk6";
+ nvidia,function = "spdif";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ dap1_fs_pn0 {
+ nvidia,pins = "dap1_fs_pn0",
+ "dap1_din_pn1",
+ "dap1_dout_pn2",
+ "dap1_sclk_pn3";
+ nvidia,function = "i2s0";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ hdmi_int_pn7 {
+ nvidia,pins = "hdmi_int_pn7";
+ nvidia,function = "hdmi";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ ulpi_data7_po0 {
+ nvidia,pins = "ulpi_data7_po0";
+ nvidia,function = "uarta";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ ulpi_data3_po4 {
+ nvidia,pins = "ulpi_data3_po4";
+ nvidia,function = "ulpi";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ dap3_fs_pp0 {
+ nvidia,pins = "dap3_fs_pp0";
+ nvidia,function = "i2s2";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ dap4_fs_pp4 {
+ nvidia,pins = "dap4_fs_pp4",
+ "dap4_din_pp5",
+ "dap4_dout_pp6",
+ "dap4_sclk_pp7";
+ nvidia,function = "i2s3";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ kb_col0_pq0 {
+ nvidia,pins = "kb_col0_pq0",
+ "kb_col1_pq1",
+ "kb_row1_pr1";
+ nvidia,function = "kbc";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ kb_col2_pq2 {
+ nvidia,pins = "kb_col2_pq2",
+ "kb_col3_pq3";
+ nvidia,function = "rsvd4";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ kb_col4_pq4 {
+ nvidia,pins = "kb_col4_pq4",
+ "kb_col5_pq5",
+ "kb_col7_pq7",
+ "kb_row2_pr2",
+ "kb_row4_pr4",
+ "kb_row5_pr5",
+ "kb_row14_ps6";
+ nvidia,function = "kbc";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ kb_row0_pr0 {
+ nvidia,pins = "kb_row0_pr0";
+ nvidia,function = "rsvd4";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ kb_row6_pr6 {
+ nvidia,pins = "kb_row6_pr6",
+ "kb_row8_ps0",
+ "kb_row9_ps1",
+ "kb_row10_ps2";
+ nvidia,function = "kbc";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ kb_row11_ps3 {
+ nvidia,pins = "kb_row11_ps3",
+ "kb_row12_ps4";
+ nvidia,function = "kbc";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ gen2_i2c_scl_pt5 {
+ nvidia,pins = "gen2_i2c_scl_pt5",
+ "gen2_i2c_sda_pt6";
+ nvidia,function = "i2c2";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ nvidia,open-drain = <TEGRA_PIN_ENABLE>;
+ };
+ sdmmc4_cmd_pt7 {
+ nvidia,pins = "sdmmc4_cmd_pt7",
+ "sdmmc4_dat0_paa0",
+ "sdmmc4_dat1_paa1",
+ "sdmmc4_dat2_paa2",
+ "sdmmc4_dat3_paa3",
+ "sdmmc4_dat4_paa4",
+ "sdmmc4_dat5_paa5",
+ "sdmmc4_dat6_paa6",
+ "sdmmc4_dat7_paa7";
+ nvidia,function = "sdmmc4";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ pu0 {
+ nvidia,pins = "pu0",
+ "pu6";
+ nvidia,function = "rsvd4";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ jtag_rtck_pu7 {
+ nvidia,pins = "jtag_rtck_pu7";
+ nvidia,function = "rtck";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ pv0 {
+ nvidia,pins = "pv0";
+ nvidia,function = "rsvd1";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ ddc_scl_pv4 {
+ nvidia,pins = "ddc_scl_pv4",
+ "ddc_sda_pv5";
+ nvidia,function = "i2c4";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ crt_hsync_pv6 {
+ nvidia,pins = "crt_hsync_pv6",
+ "crt_vsync_pv7";
+ nvidia,function = "crt";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ spi2_cs1_n_pw2 {
+ nvidia,pins = "spi2_cs1_n_pw2",
+ "spi2_miso_px1",
+ "spi2_sck_px2";
+ nvidia,function = "spi2";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ clk1_out_pw4 {
+ nvidia,pins = "clk1_out_pw4";
+ nvidia,function = "extperiph1";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ clk2_out_pw5 {
+ nvidia,pins = "clk2_out_pw5";
+ nvidia,function = "extperiph2";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ spi2_cs0_n_px3 {
+ nvidia,pins = "spi2_cs0_n_px3";
+ nvidia,function = "spi6";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ spi1_mosi_px4 {
+ nvidia,pins = "spi1_mosi_px4",
+ "spi1_cs0_n_px6";
+ nvidia,function = "spi1";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ ulpi_clk_py0 {
+ nvidia,pins = "ulpi_clk_py0",
+ "ulpi_dir_py1";
+ nvidia,function = "ulpi";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ sdmmc1_dat3_py4 {
+ nvidia,pins = "sdmmc1_dat3_py4",
+ "sdmmc1_dat2_py5",
+ "sdmmc1_dat1_py6",
+ "sdmmc1_dat0_py7",
+ "sdmmc1_cmd_pz1";
+ nvidia,function = "sdmmc1";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ sdmmc1_clk_pz0 {
+ nvidia,pins = "sdmmc1_clk_pz0";
+ nvidia,function = "sdmmc1";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ lcd_wr_n_pz3 {
+ nvidia,pins = "lcd_wr_n_pz3";
+ nvidia,function = "displaya";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ sys_clk_req_pz5 {
+ nvidia,pins = "sys_clk_req_pz5";
+ nvidia,function = "sysclk";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ pwr_i2c_scl_pz6 {
+ nvidia,pins = "pwr_i2c_scl_pz6",
+ "pwr_i2c_sda_pz7";
+ nvidia,function = "i2cpwr";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ nvidia,open-drain = <TEGRA_PIN_ENABLE>;
+ };
+ pbb0 {
+ nvidia,pins = "pbb0",
+ "pcc1";
+ nvidia,function = "rsvd2";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ cam_i2c_scl_pbb1 {
+ nvidia,pins = "cam_i2c_scl_pbb1",
+ "cam_i2c_sda_pbb2";
+ nvidia,function = "i2c3";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ nvidia,open-drain = <TEGRA_PIN_ENABLE>;
+ };
+ pbb3 {
+ nvidia,pins = "pbb3";
+ nvidia,function = "vgp3";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ pbb4 {
+ nvidia,pins = "pbb4";
+ nvidia,function = "vgp4";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ pbb5 {
+ nvidia,pins = "pbb5";
+ nvidia,function = "vgp5";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ pbb6 {
+ nvidia,pins = "pbb6";
+ nvidia,function = "vgp6";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ pbb7 {
+ nvidia,pins = "pbb7",
+ "pcc2";
+ nvidia,function = "i2s4";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ cam_mclk_pcc0 {
+ nvidia,pins = "cam_mclk_pcc0";
+ nvidia,function = "vi_alt3";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ sdmmc4_rst_n_pcc3 {
+ nvidia,pins = "sdmmc4_rst_n_pcc3";
+ nvidia,function = "rsvd2";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ sdmmc4_clk_pcc4 {
+ nvidia,pins = "sdmmc4_clk_pcc4";
+ nvidia,function = "sdmmc4";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ clk2_req_pcc5 {
+ nvidia,pins = "clk2_req_pcc5";
+ nvidia,function = "dap";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ pex_l2_rst_n_pcc6 {
+ nvidia,pins = "pex_l2_rst_n_pcc6",
+ "pex_l2_clkreq_n_pcc7";
+ nvidia,function = "pcie";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ pex_wake_n_pdd3 {
+ nvidia,pins = "pex_wake_n_pdd3",
+ "pex_l2_prsnt_n_pdd7";
+ nvidia,function = "pcie";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ clk3_out_pee0 {
+ nvidia,pins = "clk3_out_pee0";
+ nvidia,function = "extperiph3";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ clk1_req_pee2 {
+ nvidia,pins = "clk1_req_pee2";
+ nvidia,function = "dap";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ hdmi_cec_pee3 {
+ nvidia,pins = "hdmi_cec_pee3";
+ nvidia,function = "cec";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ nvidia,open-drain = <TEGRA_PIN_DISABLE>;
+ };
+ owr {
+ nvidia,pins = "owr";
+ nvidia,function = "owr";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ drive_dap1 {
+ nvidia,pins = "drive_dap1",
+ "drive_dap2",
+ "drive_dbg",
+ "drive_at5",
+ "drive_gme",
+ "drive_ddc",
+ "drive_ao1",
+ "drive_uart3";
+ nvidia,high-speed-mode = <0>;
+ nvidia,schmitt = <TEGRA_PIN_ENABLE>;
+ nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
+ nvidia,pull-down-strength = <31>;
+ nvidia,pull-up-strength = <31>;
+ nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
+ nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
+ };
+ drive_sdio1 {
+ nvidia,pins = "drive_sdio1",
+ "drive_sdio3";
+ nvidia,high-speed-mode = <0>;
+ nvidia,schmitt = <TEGRA_PIN_DISABLE>;
+ nvidia,pull-down-strength = <46>;
+ nvidia,pull-up-strength = <42>;
+ nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FAST>;
+ nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FAST>;
+ };
+ drive_gma {
+ nvidia,pins = "drive_gma",
+ "drive_gmb",
+ "drive_gmc",
+ "drive_gmd";
+ nvidia,pull-down-strength = <9>;
+ nvidia,pull-up-strength = <9>;
+ nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
+ nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
+ };
+ };
+ };
+
uarta: serial@70006000 {
status = "okay";
};
@@ -71,6 +783,13 @@
dr_mode = "otg";
};
+ usb-phy@7d000000 {
+ status = "okay";
+ nvidia,hssync-start-delay = <0>;
+ nvidia,xcvr-lsfslew = <2>;
+ nvidia,xcvr-lsrslew = <2>;
+ };
+
backlight: backlight {
compatible = "pwm-backlight";
diff --git a/arch/arm/dts/tegra30-asus-nexus7-grouper-E1565.dts b/arch/arm/dts/tegra30-asus-nexus7-grouper-E1565.dts
index 945ae40..1714e08 100644
--- a/arch/arm/dts/tegra30-asus-nexus7-grouper-E1565.dts
+++ b/arch/arm/dts/tegra30-asus-nexus7-grouper-E1565.dts
@@ -7,6 +7,119 @@
model = "ASUS Google Nexus 7 (Project Nakasi / ME370T) E1565";
compatible = "asus,grouper", "nvidia,tegra30";
+ pinmux@70000868 {
+ state_default: pinmux {
+ lcd_dc1_pd2 {
+ nvidia,pins = "lcd_dc1_pd2";
+ nvidia,function = "displaya";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ lcd_pwr2_pc6 {
+ nvidia,pins = "lcd_pwr2_pc6";
+ nvidia,function = "displaya";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ spi2_cs2_n_pw3 {
+ nvidia,pins = "spi2_cs2_n_pw3";
+ nvidia,function = "spi2";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ spi1_sck_px5 {
+ nvidia,pins = "spi1_sck_px5";
+ nvidia,function = "spi1";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ pu5 {
+ nvidia,pins = "pu5";
+ nvidia,function = "pwm2";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ spi1_miso_px7 {
+ nvidia,pins = "spi1_miso_px7";
+ nvidia,function = "spi1";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ spi2_mosi_px0 {
+ nvidia,pins = "spi2_mosi_px0";
+ nvidia,function = "spi2";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ kb_row7_pr7 {
+ nvidia,pins = "kb_row7_pr7";
+ nvidia,function = "kbc";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ pu3 {
+ nvidia,pins = "pu3";
+ nvidia,function = "rsvd4";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ pu4 {
+ nvidia,pins = "pu4";
+ nvidia,function = "pwm1";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ kb_row15_ps7 {
+ nvidia,pins = "kb_row15_ps7";
+ nvidia,function = "kbc";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ kb_row3_pr3 {
+ nvidia,pins = "kb_row3_pr3";
+ nvidia,function = "kbc";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ kb_row13_ps5 {
+ nvidia,pins = "kb_row13_ps5";
+ nvidia,function = "kbc";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ gmi_wp_n_pc7 {
+ nvidia,pins = "gmi_wp_n_pc7",
+ "gmi_wait_pi7",
+ "gmi_cs4_n_pk2",
+ "gmi_cs3_n_pk4";
+ nvidia,function = "rsvd1";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ gmi_cs6_n_pi3 {
+ nvidia,pins = "gmi_cs6_n_pi3";
+ nvidia,function = "gmi";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ };
+ };
+
i2c@7000d000 {
pmic: max77663@3c {
compatible = "maxim,max77663";
@@ -35,6 +148,7 @@
regulator-name = "vcore_emmc";
regulator-min-microvolt = <2850000>;
regulator-max-microvolt = <2850000>;
+ regulator-boot-on;
};
};
};
diff --git a/arch/arm/dts/tegra30-asus-nexus7-grouper-PM269.dts b/arch/arm/dts/tegra30-asus-nexus7-grouper-PM269.dts
index 4363bfc..e7765a4 100644
--- a/arch/arm/dts/tegra30-asus-nexus7-grouper-PM269.dts
+++ b/arch/arm/dts/tegra30-asus-nexus7-grouper-PM269.dts
@@ -7,6 +7,119 @@
model = "ASUS Google Nexus 7 (Project Nakasi / ME370T) PM269";
compatible = "asus,grouper", "nvidia,tegra30";
+ pinmux@70000868 {
+ state_default: pinmux {
+ lcd_dc1_pd2 {
+ nvidia,pins = "lcd_dc1_pd2";
+ nvidia,function = "displaya";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ lcd_pwr2_pc6 {
+ nvidia,pins = "lcd_pwr2_pc6";
+ nvidia,function = "displaya";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ spi2_cs2_n_pw3 {
+ nvidia,pins = "spi2_cs2_n_pw3";
+ nvidia,function = "spi2";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ spi1_sck_px5 {
+ nvidia,pins = "spi1_sck_px5";
+ nvidia,function = "spi1";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ pu5 {
+ nvidia,pins = "pu5";
+ nvidia,function = "pwm2";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ spi1_miso_px7 {
+ nvidia,pins = "spi1_miso_px7";
+ nvidia,function = "spi1";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ spi2_mosi_px0 {
+ nvidia,pins = "spi2_mosi_px0";
+ nvidia,function = "spi2";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ kb_row7_pr7 {
+ nvidia,pins = "kb_row7_pr7";
+ nvidia,function = "kbc";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ pu3 {
+ nvidia,pins = "pu3";
+ nvidia,function = "rsvd4";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ pu4 {
+ nvidia,pins = "pu4";
+ nvidia,function = "pwm1";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ kb_row15_ps7 {
+ nvidia,pins = "kb_row15_ps7";
+ nvidia,function = "kbc";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ kb_row3_pr3 {
+ nvidia,pins = "kb_row3_pr3";
+ nvidia,function = "kbc";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ kb_row13_ps5 {
+ nvidia,pins = "kb_row13_ps5";
+ nvidia,function = "kbc";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ gmi_wp_n_pc7 {
+ nvidia,pins = "gmi_wp_n_pc7",
+ "gmi_wait_pi7",
+ "gmi_cs4_n_pk2",
+ "gmi_cs3_n_pk4";
+ nvidia,function = "rsvd1";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ gmi_cs6_n_pi3 {
+ nvidia,pins = "gmi_cs6_n_pi3";
+ nvidia,function = "gmi";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ };
+ };
+
i2c@7000d000 {
/* Texas Instruments TPS659110 PMIC */
pmic: tps65911@2d {
@@ -36,6 +149,7 @@
regulator-name = "vdd_emmc_core";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
};
};
};
diff --git a/arch/arm/dts/tegra30-asus-nexus7-tilapia-E1565.dts b/arch/arm/dts/tegra30-asus-nexus7-tilapia-E1565.dts
index 89348fd..3f0dff8 100644
--- a/arch/arm/dts/tegra30-asus-nexus7-tilapia-E1565.dts
+++ b/arch/arm/dts/tegra30-asus-nexus7-tilapia-E1565.dts
@@ -7,6 +7,155 @@
model = "ASUS Google Nexus 7 (Project Bach / ME370TG) E1565";
compatible = "asus,tilapia", "nvidia,tegra30";
+ pinmux@70000868 {
+ state_default: pinmux {
+ lcd_dc1_pd2 {
+ nvidia,pins = "lcd_dc1_pd2";
+ nvidia,function = "displaya";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ lcd_pwr2_pc6 {
+ nvidia,pins = "lcd_pwr2_pc6";
+ nvidia,function = "displaya";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ spi2_cs2_n_pw3 {
+ nvidia,pins = "spi2_cs2_n_pw3";
+ nvidia,function = "spi2";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ dap3_din_pp1 {
+ nvidia,pins = "dap3_din_pp1";
+ nvidia,function = "i2s2";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ spi1_sck_px5 {
+ nvidia,pins = "spi1_sck_px5";
+ nvidia,function = "spi1";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ pu5 {
+ nvidia,pins = "pu5";
+ nvidia,function = "pwm2";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ spi1_miso_px7 {
+ nvidia,pins = "spi1_miso_px7";
+ nvidia,function = "spi1";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ spi2_mosi_px0 {
+ nvidia,pins = "spi2_mosi_px0";
+ nvidia,function = "spi2";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ clk3_req_pee1 {
+ nvidia,pins = "clk3_req_pee1";
+ nvidia,function = "dev3";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ ulpi_nxt_py2 {
+ nvidia,pins = "ulpi_nxt_py2";
+ nvidia,function = "uartd";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ ulpi_stp_py3 {
+ nvidia,pins = "ulpi_stp_py3";
+ nvidia,function = "uartd";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ kb_row7_pr7 {
+ nvidia,pins = "kb_row7_pr7";
+ nvidia,function = "kbc";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ pu4 {
+ nvidia,pins = "pu4";
+ nvidia,function = "pwm1";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ pu3 {
+ nvidia,pins = "pu3";
+ nvidia,function = "rsvd4";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ kb_row15_ps7 {
+ nvidia,pins = "kb_row15_ps7";
+ nvidia,function = "kbc";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ dap3_sclk_pp3 {
+ nvidia,pins = "dap3_sclk_pp3";
+ nvidia,function = "i2s2";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ kb_row3_pr3 {
+ nvidia,pins = "kb_row3_pr3",
+ "kb_row13_ps5";
+ nvidia,function = "kbc";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ kb_row13_ps5 {
+ nvidia,pins = "kb_row13_ps5";
+ nvidia,function = "kbc";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ gmi_wp_n_pc7 {
+ nvidia,pins = "gmi_wp_n_pc7",
+ "gmi_wait_pi7",
+ "gmi_cs4_n_pk2",
+ "gmi_cs3_n_pk4";
+ nvidia,function = "rsvd1";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ gmi_cs6_n_pi3 {
+ nvidia,pins = "gmi_cs6_n_pi3";
+ nvidia,function = "gmi";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ };
+ };
+
i2c@7000d000 {
pmic: max77663@3c {
compatible = "maxim,max77663";
@@ -35,6 +184,7 @@
regulator-name = "vcore_emmc";
regulator-min-microvolt = <2850000>;
regulator-max-microvolt = <2850000>;
+ regulator-boot-on;
};
};
};
diff --git a/arch/arm/dts/tegra30-asus-p1801-t.dts b/arch/arm/dts/tegra30-asus-p1801-t.dts
index 39f7caf..350443d 100644
--- a/arch/arm/dts/tegra30-asus-p1801-t.dts
+++ b/arch/arm/dts/tegra30-asus-p1801-t.dts
@@ -60,6 +60,988 @@
};
};
+ pinmux@70000868 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&state_default>;
+
+ state_default: pinmux {
+ /* SDMMC1 pinmux */
+ sdmmc1_clk {
+ nvidia,pins = "sdmmc1_clk_pz0";
+ nvidia,function = "sdmmc1";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ sdmmc1_cmd {
+ nvidia,pins = "sdmmc1_dat3_py4",
+ "sdmmc1_dat2_py5",
+ "sdmmc1_dat1_py6",
+ "sdmmc1_dat0_py7",
+ "sdmmc1_cmd_pz1";
+ nvidia,function = "sdmmc1";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ sdmmc1_cd {
+ nvidia,pins = "gmi_iordy_pi5";
+ nvidia,function = "rsvd1";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ sdmmc1_wp {
+ nvidia,pins = "vi_d11_pt3";
+ nvidia,function = "rsvd2";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* SDMMC2 pinmux */
+ vi_d1_pd5 {
+ nvidia,pins = "vi_d1_pd5",
+ "vi_d2_pl0",
+ "vi_d3_pl1",
+ "vi_d5_pl3",
+ "vi_d7_pl5";
+ nvidia,function = "sdmmc2";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ vi_d8_pl6 {
+ nvidia,pins = "vi_d8_pl6",
+ "vi_d9_pl7";
+ nvidia,function = "sdmmc2";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ nvidia,lock = <0>;
+ nvidia,ioreset = <0>;
+ };
+
+ /* SDMMC3 pinmux */
+ sdmmc3_clk {
+ nvidia,pins = "sdmmc3_clk_pa6";
+ nvidia,function = "sdmmc3";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ sdmmc3_cmd {
+ nvidia,pins = "sdmmc3_cmd_pa7",
+ "sdmmc3_dat0_pb7",
+ "sdmmc3_dat1_pb6",
+ "sdmmc3_dat2_pb5",
+ "sdmmc3_dat3_pb4",
+ "sdmmc3_dat4_pd1",
+ "sdmmc3_dat5_pd0",
+ "sdmmc3_dat6_pd3",
+ "sdmmc3_dat7_pd4";
+ nvidia,function = "sdmmc3";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* SDMMC4 pinmux */
+ sdmmc4_clk {
+ nvidia,pins = "sdmmc4_clk_pcc4";
+ nvidia,function = "sdmmc4";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ sdmmc4_cmd {
+ nvidia,pins = "sdmmc4_cmd_pt7",
+ "sdmmc4_dat0_paa0",
+ "sdmmc4_dat1_paa1",
+ "sdmmc4_dat2_paa2",
+ "sdmmc4_dat3_paa3",
+ "sdmmc4_dat4_paa4",
+ "sdmmc4_dat5_paa5",
+ "sdmmc4_dat6_paa6",
+ "sdmmc4_dat7_paa7";
+ nvidia,function = "sdmmc4";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ sdmmc4_rst_n {
+ nvidia,pins = "sdmmc4_rst_n_pcc3";
+ nvidia,function = "rsvd2";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ cam_mclk {
+ nvidia,pins = "cam_mclk_pcc0";
+ nvidia,function = "vi_alt3";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ drive_sdmmc4 {
+ nvidia,pins = "drive_gma",
+ "drive_gmb",
+ "drive_gmc",
+ "drive_gmd";
+ nvidia,pull-down-strength = <9>;
+ nvidia,pull-up-strength = <9>;
+ nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
+ nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
+ };
+
+ /* I2C pinmux */
+ gen1_i2c {
+ nvidia,pins = "gen1_i2c_scl_pc4",
+ "gen1_i2c_sda_pc5";
+ nvidia,function = "i2c1";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ nvidia,open-drain = <TEGRA_PIN_ENABLE>;
+ nvidia,lock = <0>;
+ };
+ gen2_i2c {
+ nvidia,pins = "gen2_i2c_scl_pt5",
+ "gen2_i2c_sda_pt6";
+ nvidia,function = "i2c2";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ nvidia,open-drain = <TEGRA_PIN_ENABLE>;
+ nvidia,lock = <0>;
+ };
+ cam_i2c {
+ nvidia,pins = "cam_i2c_scl_pbb1",
+ "cam_i2c_sda_pbb2";
+ nvidia,function = "i2c3";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ nvidia,open-drain = <TEGRA_PIN_ENABLE>;
+ nvidia,lock = <0>;
+ };
+ ddc_i2c {
+ nvidia,pins = "ddc_scl_pv4",
+ "ddc_sda_pv5";
+ nvidia,function = "i2c4";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ nvidia,lock = <0>;
+ };
+ pwr_i2c {
+ nvidia,pins = "pwr_i2c_scl_pz6",
+ "pwr_i2c_sda_pz7";
+ nvidia,function = "i2cpwr";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ nvidia,open-drain = <TEGRA_PIN_ENABLE>;
+ nvidia,lock = <0>;
+ };
+ hotplug_i2c {
+ nvidia,pins = "pu4";
+ nvidia,function = "rsvd4";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* HDMI pinmux */
+ hdmi_cec {
+ nvidia,pins = "hdmi_cec_pee3";
+ nvidia,function = "cec";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ nvidia,open-drain = <TEGRA_PIN_ENABLE>;
+ nvidia,lock = <0>;
+ };
+ hdmi_hpd {
+ nvidia,pins = "hdmi_int_pn7";
+ nvidia,function = "hdmi";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* UART-A */
+ ulpi_data0_po1 {
+ nvidia,pins = "ulpi_data0_po1";
+ nvidia,function = "uarta";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ ulpi_data1_po2 {
+ nvidia,pins = "ulpi_data1_po2";
+ nvidia,function = "uarta";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ ulpi_data5_po6 {
+ nvidia,pins = "ulpi_data5_po6";
+ nvidia,function = "uarta";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ ulpi_data7_po0 {
+ nvidia,pins = "ulpi_data7_po0",
+ "ulpi_data2_po3",
+ "ulpi_data3_po4",
+ "ulpi_data4_po5",
+ "ulpi_data6_po7";
+ nvidia,function = "uarta";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* UART-B */
+ uartb_txd_rts {
+ nvidia,pins = "uart2_txd_pc2",
+ "uart2_rts_n_pj6";
+ nvidia,function = "uartb";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ uartb_rxd_cts {
+ nvidia,pins = "uart2_rxd_pc3",
+ "uart2_cts_n_pj5";
+ nvidia,function = "uartb";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* UART-C */
+ uartc_rxd_cts {
+ nvidia,pins = "uart3_cts_n_pa1",
+ "uart3_rxd_pw7";
+ nvidia,function = "uartc";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ uartc_txd_rts {
+ nvidia,pins = "uart3_rts_n_pc0",
+ "uart3_txd_pw6";
+ nvidia,function = "uartc";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
+ /* UART-D */
+ ulpi_nxt_py2 {
+ nvidia,pins = "ulpi_nxt_py2";
+ nvidia,function = "uartd";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ ulpi_clk_py0 {
+ nvidia,pins = "ulpi_clk_py0",
+ "ulpi_dir_py1",
+ "ulpi_stp_py3";
+ nvidia,function = "uartd";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
+ /* I2S pinmux */
+ dap_i2s0 {
+ nvidia,pins = "dap1_fs_pn0",
+ "dap1_din_pn1",
+ "dap1_dout_pn2",
+ "dap1_sclk_pn3";
+ nvidia,function = "i2s0";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ dap_i2s1 {
+ nvidia,pins = "dap2_fs_pa2",
+ "dap2_sclk_pa3",
+ "dap2_din_pa4",
+ "dap2_dout_pa5";
+ nvidia,function = "i2s1";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ dap3_fs {
+ nvidia,pins = "dap3_fs_pp0",
+ "dap3_din_pp1";
+ nvidia,function = "i2s2";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ dap3_dout {
+ nvidia,pins = "dap3_dout_pp2",
+ "dap3_sclk_pp3";
+ nvidia,function = "i2s2";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ dap_i2s3 {
+ nvidia,pins = "dap4_fs_pp4",
+ "dap4_din_pp5",
+ "dap4_dout_pp6",
+ "dap4_sclk_pp7";
+ nvidia,function = "i2s3";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* sensors pinmux */
+ nct_irq {
+ nvidia,pins = "pcc2";
+ nvidia,function = "i2s4";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* Asus EC pinmux */
+ ec_irqs {
+ nvidia,pins = "kb_row10_ps2",
+ "kb_row15_ps7";
+ nvidia,function = "kbc";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ ec_reqs {
+ nvidia,pins = "kb_col1_pq1";
+ nvidia,function = "kbc";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* memory type bootstrap */
+ mem_boostraps {
+ nvidia,pins = "gmi_ad4_pg4",
+ "gmi_ad5_pg5";
+ nvidia,function = "nand";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* PCI-e pinmux */
+ pex_l2_rst_n {
+ nvidia,pins = "pex_l2_rst_n_pcc6",
+ "pex_l0_rst_n_pdd1",
+ "pex_l1_rst_n_pdd5";
+ nvidia,function = "pcie";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ pex_l2_clkreq_n {
+ nvidia,pins = "pex_l2_clkreq_n_pcc7",
+ "pex_l0_prsnt_n_pdd0",
+ "pex_l0_clkreq_n_pdd2",
+ "pex_wake_n_pdd3",
+ "pex_l1_prsnt_n_pdd4",
+ "pex_l1_clkreq_n_pdd6",
+ "pex_l2_prsnt_n_pdd7";
+ nvidia,function = "pcie";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* SPI pinmux */
+ spi1_mosi_px4 {
+ nvidia,pins = "spi1_mosi_px4",
+ "spi1_sck_px5",
+ "spi1_cs0_n_px6",
+ "spi1_miso_px7";
+ nvidia,function = "spi1";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ spi2_cs1_n_pw2 {
+ nvidia,pins = "spi2_cs1_n_pw2";
+ nvidia,function = "spi2";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ spi2_sck_px2 {
+ nvidia,pins = "spi2_sck_px2";
+ nvidia,function = "spi2";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ gmi_a17_pb0 {
+ nvidia,pins = "gmi_a17_pb0",
+ "gmi_a16_pj7";
+ nvidia,function = "spi4";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ gmi_a18_pb1 {
+ nvidia,pins = "gmi_a18_pb1";
+ nvidia,function = "spi4";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ gmi_a19_pk7 {
+ nvidia,pins = "gmi_a19_pk7";
+ nvidia,function = "spi4";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* Display A pinmux */
+ lcd_pwr0_pb2 {
+ nvidia,pins = "lcd_pwr0_pb2",
+ "lcd_pclk_pb3",
+ "lcd_pwr1_pc1",
+ "lcd_d0_pe0",
+ "lcd_d1_pe1",
+ "lcd_d2_pe2",
+ "lcd_d3_pe3",
+ "lcd_d4_pe4",
+ "lcd_d5_pe5",
+ "lcd_d6_pe6",
+ "lcd_d7_pe7",
+ "lcd_d8_pf0",
+ "lcd_d9_pf1",
+ "lcd_d10_pf2",
+ "lcd_d11_pf3",
+ "lcd_d12_pf4",
+ "lcd_d13_pf5",
+ "lcd_d14_pf6",
+ "lcd_d15_pf7",
+ "lcd_de_pj1",
+ "lcd_hsync_pj3",
+ "lcd_vsync_pj4",
+ "lcd_d16_pm0",
+ "lcd_d17_pm1",
+ "lcd_d18_pm2",
+ "lcd_d19_pm3",
+ "lcd_d20_pm4",
+ "lcd_d21_pm5",
+ "lcd_d22_pm6",
+ "lcd_d23_pm7",
+ "lcd_cs1_n_pw0",
+ "lcd_dc0_pn6",
+ "lcd_sck_pz4",
+ "lcd_sdin_pz2";
+ nvidia,function = "displaya";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ lcd_cs0_n_pn4 {
+ nvidia,pins = "lcd_cs0_n_pn4",
+ "lcd_sdout_pn5",
+ "lcd_wr_n_pz3";
+ nvidia,function = "displaya";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ blink {
+ nvidia,pins = "clk_32k_out_pa0";
+ nvidia,function = "blink";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
+ /* KBC keys */
+ kb_col0_pq0 {
+ nvidia,pins = "kb_col0_pq0";
+ nvidia,function = "kbc";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ kb_col1_pq1 {
+ nvidia,pins = "kb_row1_pr1",
+ "kb_row3_pr3",
+ "kb_row9_ps1",
+ "kb_row11_ps3",
+ "kb_row14_ps6",
+ "kb_col6_pq6";
+ nvidia,function = "kbc";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ kb_col4_pq4 {
+ nvidia,pins = "kb_col4_pq4",
+ "kb_col5_pq5",
+ "kb_col7_pq7",
+ "kb_row2_pr2",
+ "kb_row4_pr4",
+ "kb_row5_pr5",
+ "kb_row12_ps4",
+ "kb_row13_ps5";
+ nvidia,function = "kbc";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ gmi_wp_n_pc7 {
+ nvidia,pins = "gmi_wp_n_pc7",
+ "gmi_wait_pi7",
+ "gmi_cs3_n_pk4";
+ nvidia,function = "rsvd1";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ gmi_cs0_n_pj0 {
+ nvidia,pins = "gmi_cs0_n_pj0",
+ "gmi_cs1_n_pj2",
+ "gmi_cs2_n_pk3";
+ nvidia,function = "rsvd1";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ vi_pclk_pt0 {
+ nvidia,pins = "vi_pclk_pt0";
+ nvidia,function = "rsvd1";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ nvidia,lock = <0>;
+ nvidia,ioreset = <0>;
+ };
+
+ /* GPIO keys pinmux */
+ power_key {
+ nvidia,pins = "pv0";
+ nvidia,function = "rsvd1";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ vol_keys {
+ nvidia,pins = "kb_col2_pq2",
+ "kb_col3_pq3";
+ nvidia,function = "rsvd4";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* Bluetooth */
+ bt_shutdown {
+ nvidia,pins = "pu0";
+ nvidia,function = "rsvd4";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ bt_dev_wake {
+ nvidia,pins = "pu1";
+ nvidia,function = "rsvd1";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ bt_host_wake {
+ nvidia,pins = "pu6";
+ nvidia,function = "rsvd4";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ pu2 {
+ nvidia,pins = "pu2";
+ nvidia,function = "rsvd1";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ pu3 {
+ nvidia,pins = "pu3";
+ nvidia,function = "rsvd4";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ pcc1 {
+ nvidia,pins = "pcc1";
+ nvidia,function = "rsvd2";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ pv2 {
+ nvidia,pins = "pv2";
+ nvidia,function = "rsvd2";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ pv3 {
+ nvidia,pins = "pv3";
+ nvidia,function = "rsvd2";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ vi_vsync_pd6 {
+ nvidia,pins = "vi_vsync_pd6",
+ "vi_hsync_pd7";
+ nvidia,function = "rsvd2";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ nvidia,lock = <0>;
+ nvidia,ioreset = <0>;
+ };
+ vi_d10_pt2 {
+ nvidia,pins = "vi_d10_pt2",
+ "vi_d0_pt4", "pbb0";
+ nvidia,function = "rsvd2";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ kb_row0_pr0 {
+ nvidia,pins = "kb_row0_pr0";
+ nvidia,function = "rsvd4";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
+ gmi_ad0_pg0 {
+ nvidia,pins = "gmi_ad0_pg0",
+ "gmi_ad1_pg1",
+ "gmi_ad2_pg2",
+ "gmi_ad3_pg3",
+ "gmi_ad6_pg6",
+ "gmi_ad7_pg7",
+ "gmi_wr_n_pi0",
+ "gmi_oe_n_pi1",
+ "gmi_dqs_pi2",
+ "gmi_adv_n_pk0",
+ "gmi_clk_pk1";
+ nvidia,function = "nand";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ gmi_ad13_ph5 {
+ nvidia,pins = "gmi_ad13_ph5";
+ nvidia,function = "nand";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ gmi_ad10_ph2 {
+ nvidia,pins = "gmi_ad10_ph2",
+ "gmi_ad11_ph3",
+ "gmi_ad14_ph6";
+ nvidia,function = "nand";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ gmi_ad12_ph4 {
+ nvidia,pins = "gmi_ad12_ph4",
+ "gmi_rst_n_pi4";
+ nvidia,function = "nand";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ /* USB2 VBUS control */
+ usb2_vbus_control {
+ nvidia,pins = "gmi_ad15_ph7";
+ nvidia,function = "nand";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ /* PWM pinmux */
+ pwm_0 {
+ nvidia,pins = "gmi_ad8_ph0";
+ nvidia,function = "pwm0";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ pwm_1 {
+ nvidia,pins = "gmi_ad9_ph1";
+ nvidia,function = "pwm1";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ pwm_2 {
+ nvidia,pins = "pu5";
+ nvidia,function = "pwm2";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* S/PDIF pinmux */
+ spdif_out {
+ nvidia,pins = "spdif_out_pk5";
+ nvidia,function = "spdif";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ spdif_in {
+ nvidia,pins = "spdif_in_pk6";
+ nvidia,function = "spdif";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ vi_d4_pl2 {
+ nvidia,pins = "vi_d4_pl2";
+ nvidia,function = "vi";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ vi_d6_pl4 {
+ nvidia,pins = "vi_d6_pl4";
+ nvidia,function = "vi";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ nvidia,lock = <0>;
+ nvidia,ioreset = <0>;
+ };
+ vi_mclk_pt1 {
+ nvidia,pins = "vi_mclk_pt1";
+ nvidia,function = "vi";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ jtag_rtck {
+ nvidia,pins = "jtag_rtck_pu7";
+ nvidia,function = "rtck";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
+ crt_hsync_pv6 {
+ nvidia,pins = "crt_hsync_pv6",
+ "crt_vsync_pv7";
+ nvidia,function = "crt";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
+ clk1_out {
+ nvidia,pins = "clk1_out_pw4";
+ nvidia,function = "extperiph1";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ clk2_out {
+ nvidia,pins = "clk2_out_pw5";
+ nvidia,function = "extperiph2";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ clk3_out {
+ nvidia,pins = "clk3_out_pee0";
+ nvidia,function = "extperiph3";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ sys_clk_req {
+ nvidia,pins = "sys_clk_req_pz5";
+ nvidia,function = "sysclk";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ pbb4 {
+ nvidia,pins = "pbb4";
+ nvidia,function = "vgp4";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ pbb5 {
+ nvidia,pins = "pbb5";
+ nvidia,function = "vgp5";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ pbb6 {
+ nvidia,pins = "pbb6";
+ nvidia,function = "vgp6";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ clk2_req_pcc5 {
+ nvidia,pins = "clk2_req_pcc5",
+ "clk1_req_pee2";
+ nvidia,function = "dap";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ clk3_req_pee1 {
+ nvidia,pins = "clk3_req_pee1";
+ nvidia,function = "dev3";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ owr {
+ nvidia,pins = "owr";
+ nvidia,function = "owr";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* P1801-T specific pinmux */
+ lcd_pwr2 {
+ nvidia,pins = "lcd_pwr2_pc6",
+ "lcd_dc1_pd2";
+ nvidia,function = "displaya";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ lcd_m1 {
+ nvidia,pins = "lcd_m1_pw1";
+ nvidia,function = "displaya";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ key_mode {
+ nvidia,pins = "gmi_cs4_n_pk2";
+ nvidia,function = "rsvd4";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ splashtop {
+ nvidia,pins = "gmi_cs6_n_pi3";
+ nvidia,function = "nand_alt";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ w8_detect {
+ nvidia,pins = "gmi_cs7_n_pi6";
+ nvidia,function = "nand_alt";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ pbb3 {
+ nvidia,pins = "pbb3";
+ nvidia,function = "vgp3";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ pbb7 {
+ nvidia,pins = "pbb7";
+ nvidia,function = "i2s4";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ spi2_mosi_px0 {
+ nvidia,pins = "spi2_mosi_px0";
+ nvidia,function = "spi6";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ tp_vendor {
+ nvidia,pins = "kb_row6_pr6",
+ "kb_row7_pr7";
+ nvidia,function = "kbc";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ tp_power {
+ nvidia,pins = "kb_row8_ps0";
+ nvidia,function = "kbc";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
+ /* GPIO power/drive control */
+ drive_dap1 {
+ nvidia,pins = "drive_dap1",
+ "drive_dap2",
+ "drive_dbg",
+ "drive_at5",
+ "drive_gme",
+ "drive_ddc",
+ "drive_ao1",
+ "drive_uart3";
+ nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
+ nvidia,schmitt = <TEGRA_PIN_ENABLE>;
+ nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
+ nvidia,pull-down-strength = <31>;
+ nvidia,pull-up-strength = <31>;
+ nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
+ nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
+ };
+ drive_sdio1 {
+ nvidia,pins = "drive_sdio1",
+ "drive_sdio3";
+ nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
+ nvidia,schmitt = <TEGRA_PIN_DISABLE>;
+ nvidia,pull-down-strength = <46>;
+ nvidia,pull-up-strength = <42>;
+ nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FAST>;
+ nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FAST>;
+ };
+ };
+ };
+
uarta: serial@70006000 {
status = "okay";
};
@@ -101,6 +1083,7 @@
regulator-name = "vdd_emmc_core";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
};
/* uSD slot VDD */
@@ -108,6 +1091,7 @@
regulator-name = "vdd_usd";
regulator-min-microvolt = <3100000>;
regulator-max-microvolt = <3100000>;
+ regulator-boot-on;
};
/* uSD slot VDDIO */
@@ -148,17 +1132,32 @@
dr_mode = "otg";
};
+ usb-phy@7d000000 {
+ status = "okay";
+ nvidia,hssync-start-delay = <0>;
+ nvidia,xcvr-lsfslew = <2>;
+ nvidia,xcvr-lsrslew = <2>;
+ };
+
/* Mini USB port */
usb2: usb@7d004000 {
status = "okay";
nvidia,vbus-gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_HIGH>;
};
+ usb-phy@7d004000 {
+ status = "okay";
+ };
+
/* Dock's USB port */
usb3: usb@7d008000 {
status = "okay";
};
+ usb-phy@7d008000 {
+ status = "okay";
+ };
+
/* PMIC has a built-in 32KHz oscillator which is used by PMC */
clk32k_in: clock-32k {
compatible = "fixed-clock";
diff --git a/arch/arm/dts/tegra30-asus-tf201.dts b/arch/arm/dts/tegra30-asus-tf201.dts
index 59e19f9..12dd909 100644
--- a/arch/arm/dts/tegra30-asus-tf201.dts
+++ b/arch/arm/dts/tegra30-asus-tf201.dts
@@ -7,6 +7,51 @@
model = "ASUS Transformer Prime TF201";
compatible = "asus,tf201", "nvidia,tegra30";
+ pinmux@70000868 {
+ state_default: pinmux {
+ lcd_pwr2_pc6 {
+ nvidia,pins = "lcd_pwr2_pc6",
+ "lcd_dc1_pd2";
+ nvidia,function = "displaya";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ pbb3 {
+ nvidia,pins = "pbb3";
+ nvidia,function = "vgp3";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ pbb7 {
+ nvidia,pins = "pbb7";
+ nvidia,function = "i2s4";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ kb_row7_pr7 {
+ nvidia,pins = "kb_row7_pr7";
+ nvidia,function = "kbc";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ gmi_cs4_n_pk2 {
+ nvidia,pins = "gmi_cs4_n_pk2";
+ nvidia,function = "gmi";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ };
+ };
+
usb-phy@7d008000 {
/delete-property/ nvidia,xcvr-setup-use-fuses;
nvidia,xcvr-setup = <5>; /* Based on TF201 fuse value - 48 */
diff --git a/arch/arm/dts/tegra30-asus-tf300t.dts b/arch/arm/dts/tegra30-asus-tf300t.dts
index db08488..b30afa3 100644
--- a/arch/arm/dts/tegra30-asus-tf300t.dts
+++ b/arch/arm/dts/tegra30-asus-tf300t.dts
@@ -15,4 +15,49 @@
output-low;
};
};
+
+ pinmux@70000868 {
+ state_default: pinmux {
+ lcd_pwr2_pc6 {
+ nvidia,pins = "lcd_pwr2_pc6",
+ "lcd_dc1_pd2";
+ nvidia,function = "displaya";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ pbb3 {
+ nvidia,pins = "pbb3";
+ nvidia,function = "vgp3";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ pbb7 {
+ nvidia,pins = "pbb7";
+ nvidia,function = "i2s4";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ kb_row7_pr7 {
+ nvidia,pins = "kb_row7_pr7";
+ nvidia,function = "kbc";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ gmi_cs4_n_pk2 {
+ nvidia,pins = "gmi_cs4_n_pk2";
+ nvidia,function = "gmi";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ };
+ };
};
diff --git a/arch/arm/dts/tegra30-asus-tf300tg.dts b/arch/arm/dts/tegra30-asus-tf300tg.dts
index 6f42182..83921c6 100644
--- a/arch/arm/dts/tegra30-asus-tf300tg.dts
+++ b/arch/arm/dts/tegra30-asus-tf300tg.dts
@@ -6,4 +6,132 @@
/ {
model = "ASUS Transformer Pad 3G TF300TG";
compatible = "asus,tf300tg", "nvidia,tegra30";
+
+ pinmux@70000868 {
+ state_default: pinmux {
+ pbb3 {
+ nvidia,pins = "pbb3";
+ nvidia,function = "vgp3";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ pbb7 {
+ nvidia,pins = "pbb7";
+ nvidia,function = "i2s4";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ gmi_cs4_n_pk2 {
+ nvidia,pins = "gmi_cs4_n_pk2";
+ nvidia,function = "gmi";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ lcd_pwr2_pc6 {
+ nvidia,pins = "lcd_pwr2_pc6",
+ "lcd_dc1_pd2";
+ nvidia,function = "displaya";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
+ kb_row7_pr7 {
+ nvidia,pins = "kb_row7_pr7";
+ nvidia,function = "kbc";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
+ spi2_cs2_n_pw3 {
+ nvidia,pins = "spi2_cs2_n_pw3";
+ nvidia,function = "spi2";
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ };
+
+ dap3_din_pp1 {
+ nvidia,pins = "dap3_din_pp1";
+ nvidia,function = "i2s2";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
+ spi1_sck_px5 {
+ nvidia,pins = "spi1_sck_px5";
+ nvidia,function = "spi1";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ pu5 {
+ nvidia,pins = "pu5";
+ nvidia,function = "pwm2";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ spi2_mosi_px0 {
+ nvidia,pins = "spi2_mosi_px0";
+ nvidia,function = "spi2";
+ };
+
+ spi1_miso_px7 {
+ nvidia,pins = "spi1_miso_px7";
+ nvidia,function = "spi1";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
+ clk3_req_pee1 {
+ nvidia,pins = "clk3_req_pee1";
+ nvidia,function = "dev3";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ ulpi_nxt_py2 {
+ nvidia,pins = "ulpi_nxt_py2";
+ nvidia,function = "uartd";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
+ ulpi_stp_py3 {
+ nvidia,pins = "ulpi_stp_py3";
+ nvidia,function = "uartd";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ pu3 {
+ nvidia,pins = "pu3";
+ nvidia,function = "rsvd1";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
+ dap1_din_pn1 {
+ nvidia,pins = "dap1_din_pn1";
+ nvidia,function = "i2s0";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ };
+ };
};
diff --git a/arch/arm/dts/tegra30-asus-tf300tl.dts b/arch/arm/dts/tegra30-asus-tf300tl.dts
index 242f791..13b96fd 100644
--- a/arch/arm/dts/tegra30-asus-tf300tl.dts
+++ b/arch/arm/dts/tegra30-asus-tf300tl.dts
@@ -6,4 +6,167 @@
/ {
model = "ASUS Transformer Pad LTE TF300TL";
compatible = "asus,tf300tl", "nvidia,tegra30";
+
+ pinmux@70000868 {
+ state_default: pinmux {
+ lcd_pwr2_pc6 {
+ nvidia,pins = "lcd_pwr2_pc6",
+ "lcd_dc1_pd2";
+ nvidia,function = "displaya";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
+ pbb3 {
+ nvidia,pins = "pbb3";
+ nvidia,function = "vgp3";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ pbb7 {
+ nvidia,pins = "pbb7";
+ nvidia,function = "i2s4";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ kb_row7_pr7 {
+ nvidia,pins = "kb_row7_pr7";
+ nvidia,function = "kbc";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
+ gmi_cs4_n_pk2 {
+ nvidia,pins = "gmi_cs4_n_pk2";
+ nvidia,function = "gmi";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* TF300TL specific pinmux reconfiguration */
+
+ ulpi_data5_po6 {
+ nvidia,pins = "ulpi_data5_po6";
+ nvidia,function = "uarta";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ dap3_din_pp1 {
+ nvidia,pins = "dap3_din_pp1";
+ nvidia,function = "i2s2";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
+ crt_hsync_pv6 {
+ nvidia,pins = "crt_hsync_pv6";
+ nvidia,function = "crt";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
+ crt_vsync_pv7 {
+ nvidia,pins = "crt_vsync_pv7";
+ nvidia,function = "crt";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
+ pu5 {
+ nvidia,pins = "pu5";
+ nvidia,function = "pwm2";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ clk3_out_pee0 {
+ nvidia,pins = "clk3_out_pee0";
+ nvidia,function = "extperiph3";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ clk3_req_pee1 {
+ nvidia,pins = "clk3_req_pee1";
+ nvidia,function = "dev3";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
+ dap1_fs_pn0 {
+ nvidia,pins = "dap1_fs_pn0",
+ "dap1_sclk_pn3";
+ nvidia,function = "i2s0";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
+ dap1_din_pn1 {
+ nvidia,pins = "dap1_din_pn1";
+ nvidia,function = "i2s0";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ dap1_dout_pn2 {
+ nvidia,pins = "dap1_dout_pn2";
+ nvidia,function = "i2s0";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ clk1_req_pee2 {
+ nvidia,pins = "clk1_req_pee2";
+ nvidia,function = "dap";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
+ spi2_mosi_px0 {
+ nvidia,pins = "spi2_mosi_px0";
+ nvidia,function = "spi2";
+ };
+
+ spi1_sck_px5 {
+ nvidia,pins = "spi1_sck_px5";
+ nvidia,function = "spi1";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ spi1_miso_px7 {
+ nvidia,pins = "spi1_miso_px7";
+ nvidia,function = "spi1";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ spi2_cs2_n_pw3 {
+ nvidia,pins = "spi2_cs2_n_pw3";
+ nvidia,function = "spi2";
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ };
+ };
+ };
};
diff --git a/arch/arm/dts/tegra30-asus-tf600t.dts b/arch/arm/dts/tegra30-asus-tf600t.dts
index fd9d11c..f49e734 100644
--- a/arch/arm/dts/tegra30-asus-tf600t.dts
+++ b/arch/arm/dts/tegra30-asus-tf600t.dts
@@ -53,6 +53,895 @@
};
};
+ pinmux@70000868 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&state_default>;
+
+ state_default: pinmux {
+ /* SDMMC1 pinmux */
+ sdmmc1_clk {
+ nvidia,pins = "sdmmc1_clk_pz0";
+ nvidia,function = "sdmmc1";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ sdmmc1_cmd {
+ nvidia,pins = "sdmmc1_dat3_py4",
+ "sdmmc1_dat2_py5",
+ "sdmmc1_dat1_py6",
+ "sdmmc1_dat0_py7",
+ "sdmmc1_cmd_pz1";
+ nvidia,function = "sdmmc1";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ sdmmc1_cd {
+ nvidia,pins = "gmi_iordy_pi5";
+ nvidia,function = "rsvd1";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ sdmmc1_wp {
+ nvidia,pins = "vi_d11_pt3";
+ nvidia,function = "rsvd2";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* SDMMC2 pinmux */
+ vi_d1_pd5 {
+ nvidia,pins = "vi_d1_pd5",
+ "vi_d2_pl0",
+ "vi_d3_pl1",
+ "vi_d5_pl3",
+ "vi_d7_pl5";
+ nvidia,function = "sdmmc2";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ vi_d8_pl6 {
+ nvidia,pins = "vi_d8_pl6",
+ "vi_d9_pl7";
+ nvidia,function = "sdmmc2";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ nvidia,lock = <0>;
+ nvidia,ioreset = <0>;
+ };
+
+ /* SDMMC3 pinmux */
+ sdmmc3_clk {
+ nvidia,pins = "sdmmc3_clk_pa6";
+ nvidia,function = "sdmmc3";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ sdmmc3_cmd {
+ nvidia,pins = "sdmmc3_cmd_pa7",
+ "sdmmc3_dat0_pb7",
+ "sdmmc3_dat1_pb6",
+ "sdmmc3_dat2_pb5",
+ "sdmmc3_dat3_pb4",
+ "sdmmc3_dat4_pd1",
+ "sdmmc3_dat5_pd0",
+ "sdmmc3_dat6_pd3",
+ "sdmmc3_dat7_pd4";
+ nvidia,function = "sdmmc3";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* SDMMC4 pinmux */
+ sdmmc4_clk {
+ nvidia,pins = "sdmmc4_clk_pcc4";
+ nvidia,function = "sdmmc4";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ sdmmc4_cmd {
+ nvidia,pins = "sdmmc4_cmd_pt7",
+ "sdmmc4_dat0_paa0",
+ "sdmmc4_dat1_paa1",
+ "sdmmc4_dat2_paa2",
+ "sdmmc4_dat3_paa3",
+ "sdmmc4_dat4_paa4",
+ "sdmmc4_dat5_paa5",
+ "sdmmc4_dat6_paa6",
+ "sdmmc4_dat7_paa7";
+ nvidia,function = "sdmmc4";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ sdmmc4_rst_n {
+ nvidia,pins = "sdmmc4_rst_n_pcc3";
+ nvidia,function = "rsvd2";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ cam_mclk {
+ nvidia,pins = "cam_mclk_pcc0";
+ nvidia,function = "vi_alt3";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* I2C pinmux */
+ gen1_i2c {
+ nvidia,pins = "gen1_i2c_scl_pc4",
+ "gen1_i2c_sda_pc5";
+ nvidia,function = "i2c1";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ nvidia,open-drain = <TEGRA_PIN_ENABLE>;
+ nvidia,lock = <0>;
+ };
+ gen2_i2c {
+ nvidia,pins = "gen2_i2c_scl_pt5",
+ "gen2_i2c_sda_pt6";
+ nvidia,function = "i2c2";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ nvidia,open-drain = <TEGRA_PIN_ENABLE>;
+ nvidia,lock = <0>;
+ };
+ cam_i2c {
+ nvidia,pins = "cam_i2c_scl_pbb1",
+ "cam_i2c_sda_pbb2";
+ nvidia,function = "i2c3";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ nvidia,open-drain = <TEGRA_PIN_ENABLE>;
+ nvidia,lock = <0>;
+ };
+ ddc_i2c {
+ nvidia,pins = "ddc_scl_pv4",
+ "ddc_sda_pv5";
+ nvidia,function = "i2c4";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ nvidia,lock = <0>;
+ };
+ pwr_i2c {
+ nvidia,pins = "pwr_i2c_scl_pz6",
+ "pwr_i2c_sda_pz7";
+ nvidia,function = "i2cpwr";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ nvidia,open-drain = <TEGRA_PIN_ENABLE>;
+ nvidia,lock = <0>;
+ };
+ hotplug_i2c {
+ nvidia,pins = "pu4";
+ nvidia,function = "rsvd4";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* HDMI pinmux */
+ hdmi_cec {
+ nvidia,pins = "hdmi_cec_pee3";
+ nvidia,function = "cec";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ nvidia,open-drain = <TEGRA_PIN_ENABLE>;
+ nvidia,lock = <0>;
+ };
+ hdmi_hpd {
+ nvidia,pins = "hdmi_int_pn7";
+ nvidia,function = "hdmi";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* UART-A */
+ ulpi_data0_po1 {
+ nvidia,pins = "ulpi_data0_po1";
+ nvidia,function = "uarta";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ ulpi_data1_po2 {
+ nvidia,pins = "ulpi_data1_po2";
+ nvidia,function = "uarta";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ ulpi_data5_po6 {
+ nvidia,pins = "ulpi_data5_po6";
+ nvidia,function = "uarta";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ ulpi_data7_po0 {
+ nvidia,pins = "ulpi_data7_po0",
+ "ulpi_data2_po3",
+ "ulpi_data3_po4",
+ "ulpi_data4_po5",
+ "ulpi_data6_po7";
+ nvidia,function = "uarta";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* UART-B */
+ uartb_txd_rts {
+ nvidia,pins = "uart2_txd_pc2",
+ "uart2_rts_n_pj6";
+ nvidia,function = "uartb";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ uartb_rxd_cts {
+ nvidia,pins = "uart2_rxd_pc3",
+ "uart2_cts_n_pj5";
+ nvidia,function = "uartb";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* UART-C */
+ uartc_rxd_cts {
+ nvidia,pins = "uart3_cts_n_pa1",
+ "uart3_rxd_pw7";
+ nvidia,function = "uartc";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ uartc_txd_rts {
+ nvidia,pins = "uart3_rts_n_pc0",
+ "uart3_txd_pw6";
+ nvidia,function = "uartc";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
+ /* UART-D */
+ ulpi_nxt_py2 {
+ nvidia,pins = "ulpi_nxt_py2";
+ nvidia,function = "uartd";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ ulpi_clk_py0 {
+ nvidia,pins = "ulpi_clk_py0",
+ "ulpi_dir_py1",
+ "ulpi_stp_py3";
+ nvidia,function = "uartd";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
+ /* I2S pinmux */
+ dap_i2s0 {
+ nvidia,pins = "dap1_fs_pn0",
+ "dap1_din_pn1",
+ "dap1_dout_pn2",
+ "dap1_sclk_pn3";
+ nvidia,function = "i2s0";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ dap_i2s1 {
+ nvidia,pins = "dap2_fs_pa2",
+ "dap2_sclk_pa3",
+ "dap2_din_pa4",
+ "dap2_dout_pa5";
+ nvidia,function = "i2s1";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ dap3_fs {
+ nvidia,pins = "dap3_fs_pp0";
+ nvidia,function = "i2s2";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ dap3_din {
+ nvidia,pins = "dap3_din_pp1";
+ nvidia,function = "i2s2";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ dap3_dout {
+ nvidia,pins = "dap3_dout_pp2",
+ "dap3_sclk_pp3";
+ nvidia,function = "i2s2";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ dap_i2s3 {
+ nvidia,pins = "dap4_fs_pp4",
+ "dap4_din_pp5",
+ "dap4_dout_pp6",
+ "dap4_sclk_pp7";
+ nvidia,function = "i2s3";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ i2s4 {
+ nvidia,pins = "pbb7";
+ nvidia,function = "i2s4";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* Sensors pinmux */
+ nct_irq {
+ nvidia,pins = "pcc2";
+ nvidia,function = "i2s4";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ hall {
+ nvidia,pins = "pbb6";
+ nvidia,function = "vgp6";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* Asus EC pinmux */
+ ec_irqs {
+ nvidia,pins = "kb_row10_ps2",
+ "kb_row15_ps7";
+ nvidia,function = "kbc";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ ec_reqs {
+ nvidia,pins = "kb_col1_pq1";
+ nvidia,function = "kbc";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* Memory type bootstrap */
+ mem_boostraps {
+ nvidia,pins = "gmi_ad4_pg4",
+ "gmi_ad5_pg5";
+ nvidia,function = "nand";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* PCI-e pinmux */
+ pex_l2_rst_n {
+ nvidia,pins = "pex_l2_rst_n_pcc6",
+ "pex_l0_rst_n_pdd1",
+ "pex_l1_rst_n_pdd5";
+ nvidia,function = "pcie";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ pex_l2_clkreq_n {
+ nvidia,pins = "pex_l2_clkreq_n_pcc7",
+ "pex_l0_prsnt_n_pdd0",
+ "pex_l0_clkreq_n_pdd2",
+ "pex_wake_n_pdd3",
+ "pex_l1_prsnt_n_pdd4",
+ "pex_l1_clkreq_n_pdd6",
+ "pex_l2_prsnt_n_pdd7";
+ nvidia,function = "pcie";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* Display A pinmux */
+ lcd_pwr0_pb2 {
+ nvidia,pins = "lcd_pwr0_pb2",
+ "lcd_pclk_pb3",
+ "lcd_pwr1_pc1",
+ "lcd_d0_pe0",
+ "lcd_d1_pe1",
+ "lcd_d2_pe2",
+ "lcd_d3_pe3",
+ "lcd_d4_pe4",
+ "lcd_d5_pe5",
+ "lcd_d6_pe6",
+ "lcd_d7_pe7",
+ "lcd_d8_pf0",
+ "lcd_d9_pf1",
+ "lcd_d10_pf2",
+ "lcd_d11_pf3",
+ "lcd_d12_pf4",
+ "lcd_d13_pf5",
+ "lcd_d14_pf6",
+ "lcd_d15_pf7",
+ "lcd_de_pj1",
+ "lcd_hsync_pj3",
+ "lcd_vsync_pj4",
+ "lcd_d16_pm0",
+ "lcd_d17_pm1",
+ "lcd_d18_pm2",
+ "lcd_d19_pm3",
+ "lcd_d20_pm4",
+ "lcd_d21_pm5",
+ "lcd_d22_pm6",
+ "lcd_d23_pm7",
+ "lcd_cs1_n_pw0",
+ "lcd_m1_pw1",
+ "lcd_dc0_pn6",
+ "lcd_sck_pz4",
+ "lcd_sdin_pz2";
+ nvidia,function = "displaya";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ lcd_cs0_n_pn4 {
+ nvidia,pins = "lcd_sdout_pn5",
+ "lcd_wr_n_pz3",
+ "lcd_pwr2_pc6",
+ "lcd_dc1_pd2";
+ nvidia,function = "displaya";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ blink {
+ nvidia,pins = "clk_32k_out_pa0";
+ nvidia,function = "blink";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
+ /* KBC keys */
+ kb_col0 {
+ nvidia,pins = "kb_col0_pq0",
+ "kb_row1_pr1",
+ "kb_row3_pr3",
+ "kb_row6_pr6",
+ "kb_row8_ps0",
+ "kb_row9_ps1",
+ "kb_row11_ps3",
+ "kb_row14_ps6",
+ "kb_col6_pq6";
+ nvidia,function = "kbc";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ kb_col5 {
+ nvidia,pins = "kb_col5_pq5",
+ "kb_col7_pq7",
+ "kb_row2_pr2",
+ "kb_row4_pr4",
+ "kb_row5_pr5",
+ "kb_row13_ps5";
+ nvidia,function = "kbc";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ gmi_cs0_n_pj0 {
+ nvidia,pins = "gmi_wp_n_pc7",
+ "gmi_wait_pi7",
+ "gmi_cs0_n_pj0",
+ "gmi_cs1_n_pj2",
+ "gmi_cs2_n_pk3",
+ "gmi_cs3_n_pk4";
+ nvidia,function = "rsvd1";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ vi_pclk_pt0 {
+ nvidia,pins = "vi_pclk_pt0";
+ nvidia,function = "rsvd1";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ nvidia,lock = <0>;
+ nvidia,ioreset = <0>;
+ };
+
+ /* GPIO keys pinmux */
+ power_key {
+ nvidia,pins = "pv0";
+ nvidia,function = "rsvd1";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ vol_keys {
+ nvidia,pins = "kb_col3_pq3",
+ "kb_col4_pq4";
+ nvidia,function = "rsvd4";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* Bluetooth */
+ bt_shutdown {
+ nvidia,pins = "pu0";
+ nvidia,function = "rsvd4";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ bt_dev_wake {
+ nvidia,pins = "pu1";
+ nvidia,function = "rsvd1";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ bt_host_wake {
+ nvidia,pins = "pu6";
+ nvidia,function = "rsvd4";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ pu2 {
+ nvidia,pins = "pu2";
+ nvidia,function = "rsvd1";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ pu3 {
+ nvidia,pins = "pu3";
+ nvidia,function = "rsvd4";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ pcc1 {
+ nvidia,pins = "pcc1";
+ nvidia,function = "rsvd2";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ pv2 {
+ nvidia,pins = "pv2";
+ nvidia,function = "rsvd2";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ pv3 {
+ nvidia,pins = "pv3";
+ nvidia,function = "rsvd2";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ vi_vsync_pd6 {
+ nvidia,pins = "vi_vsync_pd6",
+ "vi_hsync_pd7";
+ nvidia,function = "rsvd2";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ nvidia,lock = <0>;
+ nvidia,ioreset = <0>;
+ };
+ vi_d10_pt2 {
+ nvidia,pins = "vi_d10_pt2",
+ "vi_d0_pt4", "pbb0";
+ nvidia,function = "rsvd2";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ kb_row0_pr0 {
+ nvidia,pins = "kb_row0_pr0";
+ nvidia,function = "rsvd4";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
+ gmi_ad0_pg0 {
+ nvidia,pins = "gmi_ad0_pg0",
+ "gmi_ad1_pg1",
+ "gmi_ad2_pg2",
+ "gmi_ad3_pg3",
+ "gmi_ad6_pg6",
+ "gmi_ad7_pg7",
+ "gmi_wr_n_pi0",
+ "gmi_oe_n_pi1",
+ "gmi_dqs_pi2",
+ "gmi_adv_n_pk0",
+ "gmi_clk_pk1";
+ nvidia,function = "nand";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ gmi_ad13_ph5 {
+ nvidia,pins = "gmi_ad13_ph5";
+ nvidia,function = "nand";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ gmi_ad10_ph2 {
+ nvidia,pins = "gmi_ad10_ph2",
+ "gmi_ad11_ph3",
+ "gmi_ad14_ph6";
+ nvidia,function = "nand";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ gmi_ad12_ph4 {
+ nvidia,pins = "gmi_ad12_ph4",
+ "gmi_rst_n_pi4",
+ "gmi_cs7_n_pi6";
+ nvidia,function = "nand";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* Vibrator control */
+ vibrator {
+ nvidia,pins = "gmi_ad11_ph3";
+ nvidia,function = "nand";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
+ /* PWM pinmux */
+ pwm_0 {
+ nvidia,pins = "gmi_ad8_ph0";
+ nvidia,function = "pwm0";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ pwm_1 {
+ nvidia,pins = "gmi_ad9_ph1";
+ nvidia,function = "pwm1";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ pwm_2 {
+ nvidia,pins = "pu5";
+ nvidia,function = "pwm2";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ gmi_cs_n {
+ nvidia,pins = "gmi_cs4_n_pk2",
+ "gmi_cs6_n_pi3";
+ nvidia,function = "gmi";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* Spdif pinmux */
+ spdif_out {
+ nvidia,pins = "spdif_out_pk5";
+ nvidia,function = "spdif";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ spdif_in {
+ nvidia,pins = "spdif_in_pk6";
+ nvidia,function = "spdif";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ vi_d4_pl2 {
+ nvidia,pins = "vi_d4_pl2";
+ nvidia,function = "vi";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ vi_d6_pl4 {
+ nvidia,pins = "vi_d6_pl4";
+ nvidia,function = "vi";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ nvidia,lock = <0>;
+ nvidia,ioreset = <0>;
+ };
+ vi_mclk_pt1 {
+ nvidia,pins = "vi_mclk_pt1";
+ nvidia,function = "vi";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ jtag {
+ nvidia,pins = "jtag_rtck_pu7";
+ nvidia,function = "rtck";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
+ crt_sync {
+ nvidia,pins = "crt_hsync_pv6",
+ "crt_vsync_pv7";
+ nvidia,function = "crt";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
+ clk1_out {
+ nvidia,pins = "clk1_out_pw4";
+ nvidia,function = "extperiph1";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ clk2_out {
+ nvidia,pins = "clk2_out_pw5";
+ nvidia,function = "extperiph2";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ clk3_out {
+ nvidia,pins = "clk3_out_pee0";
+ nvidia,function = "extperiph3";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
+ sys_clk_req {
+ nvidia,pins = "sys_clk_req_pz5";
+ nvidia,function = "sysclk";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
+ pbb3 {
+ nvidia,pins = "pbb3";
+ nvidia,function = "vgp3";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ pbb4 {
+ nvidia,pins = "pbb4";
+ nvidia,function = "vgp4";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ pbb5 {
+ nvidia,pins = "pbb5";
+ nvidia,function = "vgp5";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ clk2_req_pcc5 {
+ nvidia,pins = "clk2_req_pcc5",
+ "clk1_req_pee2";
+ nvidia,function = "dap";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ clk3_req_pee1 {
+ nvidia,pins = "clk3_req_pee1";
+ nvidia,function = "dev3";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ owr {
+ nvidia,pins = "owr";
+ nvidia,function = "owr";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* GPIO power/drive control */
+ drive_dap1 {
+ nvidia,pins = "drive_dap1",
+ "drive_dap2",
+ "drive_dbg",
+ "drive_at5",
+ "drive_gme",
+ "drive_ddc",
+ "drive_ao1",
+ "drive_uart3";
+ nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
+ nvidia,schmitt = <TEGRA_PIN_ENABLE>;
+ nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
+ nvidia,pull-down-strength = <31>;
+ nvidia,pull-up-strength = <31>;
+ nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
+ nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
+ };
+ drive_sdio1 {
+ nvidia,pins = "drive_sdio1",
+ "drive_sdio3";
+ nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
+ nvidia,schmitt = <TEGRA_PIN_DISABLE>;
+ nvidia,pull-down-strength = <46>;
+ nvidia,pull-up-strength = <42>;
+ nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FAST>;
+ nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FAST>;
+ };
+ drive_sdmmc4 {
+ nvidia,pins = "drive_gma",
+ "drive_gmb",
+ "drive_gmc",
+ "drive_gmd";
+ nvidia,pull-down-strength = <9>;
+ nvidia,pull-up-strength = <9>;
+ nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
+ nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
+ };
+ };
+ };
+
uarta: serial@70006000 {
status = "okay";
};
@@ -84,12 +973,14 @@
regulator-name = "vdd_1v2_backlight";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
+ regulator-boot-on;
};
vcore_lcd: vdd2 {
regulator-name = "vcore_lcd";
regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <1500000>;
+ regulator-boot-on;
};
vdd_1v8_vio: vddio {
@@ -105,6 +996,7 @@
regulator-name = "vdd_emmc_core";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
};
/* uSD slot VDDIO */
@@ -119,6 +1011,7 @@
regulator-name = "avdd_dsi_csi";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
+ regulator-boot-on;
};
};
};
@@ -161,11 +1054,22 @@
dr_mode = "otg";
};
+ usb-phy@7d000000 {
+ status = "okay";
+ nvidia,hssync-start-delay = <0>;
+ nvidia,xcvr-lsfslew = <2>;
+ nvidia,xcvr-lsrslew = <2>;
+ };
+
/* Dock's USB port */
usb3: usb@7d008000 {
status = "okay";
};
+ usb-phy@7d008000 {
+ status = "okay";
+ };
+
backlight: backlight {
compatible = "pwm-backlight";
diff --git a/arch/arm/dts/tegra30-asus-tf700t.dts b/arch/arm/dts/tegra30-asus-tf700t.dts
index d530527..cc03f5a 100644
--- a/arch/arm/dts/tegra30-asus-tf700t.dts
+++ b/arch/arm/dts/tegra30-asus-tf700t.dts
@@ -9,5 +9,58 @@
/delete-node/ host1x@50000000;
+ pinmux@70000868 {
+ state_default: pinmux {
+ lcd_pwr2_pc6 {
+ nvidia,pins = "lcd_pwr2_pc6",
+ "lcd_dc1_pd2";
+ nvidia,function = "displaya";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
+ pbb3 {
+ nvidia,pins = "pbb3";
+ nvidia,function = "vgp3";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
+ spi2_mosi_px0 {
+ nvidia,pins = "spi2_mosi_px0";
+ nvidia,function = "spi2";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
+ pbb7 {
+ nvidia,pins = "pbb7";
+ nvidia,function = "i2s4";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
+ kb_row7_pr7 {
+ nvidia,pins = "kb_row7_pr7";
+ nvidia,function = "kbc";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
+ gmi_cs4_n_pk2 {
+ nvidia,pins = "gmi_cs4_n_pk2";
+ nvidia,function = "gmi";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ };
+ };
+
/delete-node/ panel;
};
diff --git a/arch/arm/dts/tegra30-asus-transformer.dtsi b/arch/arm/dts/tegra30-asus-transformer.dtsi
index 888f9ca..e6cc6e7 100644
--- a/arch/arm/dts/tegra30-asus-transformer.dtsi
+++ b/arch/arm/dts/tegra30-asus-transformer.dtsi
@@ -37,6 +37,990 @@
};
};
+ pinmux@70000868 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&state_default>;
+
+ state_default: pinmux {
+ /* SDMMC1 pinmux */
+ sdmmc1_clk {
+ nvidia,pins = "sdmmc1_clk_pz0";
+ nvidia,function = "sdmmc1";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ sdmmc1_cmd {
+ nvidia,pins = "sdmmc1_dat3_py4",
+ "sdmmc1_dat2_py5",
+ "sdmmc1_dat1_py6",
+ "sdmmc1_dat0_py7",
+ "sdmmc1_cmd_pz1";
+ nvidia,function = "sdmmc1";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ sdmmc1_cd {
+ nvidia,pins = "gmi_iordy_pi5";
+ nvidia,function = "rsvd1";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ sdmmc1_wp {
+ nvidia,pins = "vi_d11_pt3";
+ nvidia,function = "rsvd2";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* SDMMC2 pinmux */
+ vi_d1_pd5 {
+ nvidia,pins = "vi_d1_pd5",
+ "vi_d2_pl0",
+ "vi_d3_pl1",
+ "vi_d5_pl3",
+ "vi_d7_pl5";
+ nvidia,function = "sdmmc2";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ vi_d8_pl6 {
+ nvidia,pins = "vi_d8_pl6",
+ "vi_d9_pl7";
+ nvidia,function = "sdmmc2";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ nvidia,lock = <0>;
+ nvidia,io-reset = <0>;
+ };
+
+ /* SDMMC3 pinmux */
+ sdmmc3_clk {
+ nvidia,pins = "sdmmc3_clk_pa6";
+ nvidia,function = "sdmmc3";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ sdmmc3_cmd {
+ nvidia,pins = "sdmmc3_cmd_pa7",
+ "sdmmc3_dat0_pb7",
+ "sdmmc3_dat1_pb6",
+ "sdmmc3_dat2_pb5",
+ "sdmmc3_dat3_pb4",
+ "sdmmc3_dat4_pd1",
+ "sdmmc3_dat5_pd0",
+ "sdmmc3_dat6_pd3",
+ "sdmmc3_dat7_pd4";
+ nvidia,function = "sdmmc3";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* SDMMC4 pinmux */
+ sdmmc4_clk {
+ nvidia,pins = "sdmmc4_clk_pcc4";
+ nvidia,function = "sdmmc4";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ sdmmc4_cmd {
+ nvidia,pins = "sdmmc4_cmd_pt7",
+ "sdmmc4_dat0_paa0",
+ "sdmmc4_dat1_paa1",
+ "sdmmc4_dat2_paa2",
+ "sdmmc4_dat3_paa3",
+ "sdmmc4_dat4_paa4",
+ "sdmmc4_dat5_paa5",
+ "sdmmc4_dat6_paa6",
+ "sdmmc4_dat7_paa7";
+ nvidia,function = "sdmmc4";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ sdmmc4_rst_n {
+ nvidia,pins = "sdmmc4_rst_n_pcc3";
+ nvidia,function = "rsvd2";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ cam_mclk {
+ nvidia,pins = "cam_mclk_pcc0";
+ nvidia,function = "vi_alt3";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ drive_sdmmc4 {
+ nvidia,pins = "drive_gma",
+ "drive_gmb",
+ "drive_gmc",
+ "drive_gmd";
+ nvidia,pull-down-strength = <9>;
+ nvidia,pull-up-strength = <9>;
+ nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
+ nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
+ };
+
+ /* I2C pinmux */
+ gen1_i2c {
+ nvidia,pins = "gen1_i2c_scl_pc4",
+ "gen1_i2c_sda_pc5";
+ nvidia,function = "i2c1";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ nvidia,open-drain = <TEGRA_PIN_ENABLE>;
+ nvidia,lock = <0>;
+ };
+
+ gen2_i2c {
+ nvidia,pins = "gen2_i2c_scl_pt5",
+ "gen2_i2c_sda_pt6";
+ nvidia,function = "i2c2";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ nvidia,open-drain = <TEGRA_PIN_ENABLE>;
+ nvidia,lock = <0>;
+ };
+
+ cam_i2c {
+ nvidia,pins = "cam_i2c_scl_pbb1",
+ "cam_i2c_sda_pbb2";
+ nvidia,function = "i2c3";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ nvidia,open-drain = <TEGRA_PIN_ENABLE>;
+ nvidia,lock = <0>;
+ };
+
+ ddc_i2c {
+ nvidia,pins = "ddc_scl_pv4",
+ "ddc_sda_pv5";
+ nvidia,function = "i2c4";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ nvidia,lock = <0>;
+ };
+
+ pwr_i2c {
+ nvidia,pins = "pwr_i2c_scl_pz6",
+ "pwr_i2c_sda_pz7";
+ nvidia,function = "i2cpwr";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ nvidia,open-drain = <TEGRA_PIN_ENABLE>;
+ nvidia,lock = <0>;
+ };
+
+ hotplug_i2c {
+ nvidia,pins = "pu4";
+ nvidia,function = "rsvd4";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* HDMI pinmux */
+ hdmi_cec {
+ nvidia,pins = "hdmi_cec_pee3";
+ nvidia,function = "cec";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ hdmi_hpd {
+ nvidia,pins = "hdmi_int_pn7";
+ nvidia,function = "hdmi";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* UART-A */
+ ulpi_data0_po1 {
+ nvidia,pins = "ulpi_data0_po1";
+ nvidia,function = "uarta";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
+ ulpi_data1_po2 {
+ nvidia,pins = "ulpi_data1_po2";
+ nvidia,function = "uarta";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ ulpi_data5_po6 {
+ nvidia,pins = "ulpi_data5_po6";
+ nvidia,function = "uarta";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ ulpi_data7_po0 {
+ nvidia,pins = "ulpi_data7_po0",
+ "ulpi_data2_po3",
+ "ulpi_data3_po4",
+ "ulpi_data4_po5",
+ "ulpi_data6_po7";
+ nvidia,function = "uarta";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* UART-B */
+ uartb_txd_rts {
+ nvidia,pins = "uart2_txd_pc2",
+ "uart2_rts_n_pj6";
+ nvidia,function = "uartb";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
+ uartb_rxd_cts {
+ nvidia,pins = "uart2_rxd_pc3",
+ "uart2_cts_n_pj5";
+ nvidia,function = "uartb";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* UART-C */
+ uartc_rxd_cts {
+ nvidia,pins = "uart3_cts_n_pa1",
+ "uart3_rxd_pw7";
+ nvidia,function = "uartc";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ uartc_txd_rts {
+ nvidia,pins = "uart3_rts_n_pc0",
+ "uart3_txd_pw6";
+ nvidia,function = "uartc";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
+ /* UART-D */
+ ulpi_nxt_py2 {
+ nvidia,pins = "ulpi_nxt_py2";
+ nvidia,function = "uartd";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ ulpi_clk_py0 {
+ nvidia,pins = "ulpi_clk_py0",
+ "ulpi_dir_py1",
+ "ulpi_stp_py3";
+ nvidia,function = "uartd";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
+ /* I2S pinmux */
+ dap_i2s0 {
+ nvidia,pins = "dap1_fs_pn0",
+ "dap1_din_pn1",
+ "dap1_dout_pn2",
+ "dap1_sclk_pn3";
+ nvidia,function = "i2s0";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ dap_i2s1 {
+ nvidia,pins = "dap2_fs_pa2",
+ "dap2_sclk_pa3",
+ "dap2_din_pa4",
+ "dap2_dout_pa5";
+ nvidia,function = "i2s1";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ dap3_fs {
+ nvidia,pins = "dap3_fs_pp0",
+ "dap3_din_pp1";
+ nvidia,function = "i2s2";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ dap3_dout {
+ nvidia,pins = "dap3_dout_pp2",
+ "dap3_sclk_pp3";
+ nvidia,function = "i2s2";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ dap_i2s3 {
+ nvidia,pins = "dap4_fs_pp4",
+ "dap4_din_pp5",
+ "dap4_dout_pp6",
+ "dap4_sclk_pp7";
+ nvidia,function = "i2s3";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* Sensors pinmux */
+ nct_irq {
+ nvidia,pins = "pcc2";
+ nvidia,function = "i2s4";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* Asus EC pinmux */
+ ec_irqs {
+ nvidia,pins = "kb_row10_ps2",
+ "kb_row15_ps7";
+ nvidia,function = "kbc";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ ec_reqs {
+ nvidia,pins = "kb_col1_pq1";
+ nvidia,function = "kbc";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* Memory type bootstrap */
+ mem_boostraps {
+ nvidia,pins = "gmi_ad4_pg4",
+ "gmi_ad5_pg5";
+ nvidia,function = "nand";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* PCI-e pinmux */
+ pex_l2_rst_n {
+ nvidia,pins = "pex_l2_rst_n_pcc6",
+ "pex_l0_rst_n_pdd1",
+ "pex_l1_rst_n_pdd5";
+ nvidia,function = "pcie";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
+ pex_l2_clkreq_n {
+ nvidia,pins = "pex_l2_clkreq_n_pcc7",
+ "pex_l0_prsnt_n_pdd0",
+ "pex_l0_clkreq_n_pdd2",
+ "pex_wake_n_pdd3",
+ "pex_l1_prsnt_n_pdd4",
+ "pex_l1_clkreq_n_pdd6",
+ "pex_l2_prsnt_n_pdd7";
+ nvidia,function = "pcie";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* SPI pinmux */
+ spi1_mosi_px4 {
+ nvidia,pins = "spi1_mosi_px4",
+ "spi1_sck_px5",
+ "spi1_cs0_n_px6",
+ "spi1_miso_px7";
+ nvidia,function = "spi1";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ hp_detect {
+ nvidia,pins = "spi2_cs1_n_pw2";
+ nvidia,function = "spi2";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ mic_detect {
+ nvidia,pins = "spi2_sck_px2";
+ nvidia,function = "spi2";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ gmi_a17_pb0 {
+ nvidia,pins = "gmi_a17_pb0",
+ "gmi_a16_pj7";
+ nvidia,function = "spi4";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
+ gmi_a18_pb1 {
+ nvidia,pins = "gmi_a18_pb1";
+ nvidia,function = "spi4";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ gmi_a19_pk7 {
+ nvidia,pins = "gmi_a19_pk7";
+ nvidia,function = "spi4";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* Display A pinmux */
+ lcd_pwr0_pb2 {
+ nvidia,pins = "lcd_pwr0_pb2",
+ "lcd_pclk_pb3",
+ "lcd_pwr1_pc1",
+ "lcd_d0_pe0",
+ "lcd_d1_pe1",
+ "lcd_d2_pe2",
+ "lcd_d3_pe3",
+ "lcd_d4_pe4",
+ "lcd_d5_pe5",
+ "lcd_d6_pe6",
+ "lcd_d7_pe7",
+ "lcd_d8_pf0",
+ "lcd_d9_pf1",
+ "lcd_d10_pf2",
+ "lcd_d11_pf3",
+ "lcd_d12_pf4",
+ "lcd_d13_pf5",
+ "lcd_d14_pf6",
+ "lcd_d15_pf7",
+ "lcd_de_pj1",
+ "lcd_hsync_pj3",
+ "lcd_vsync_pj4",
+ "lcd_d16_pm0",
+ "lcd_d17_pm1",
+ "lcd_d18_pm2",
+ "lcd_d19_pm3",
+ "lcd_d20_pm4",
+ "lcd_d21_pm5",
+ "lcd_d22_pm6",
+ "lcd_d23_pm7",
+ "lcd_cs1_n_pw0",
+ "lcd_m1_pw1",
+ "lcd_dc0_pn6",
+ "lcd_sck_pz4",
+ "lcd_sdin_pz2";
+ nvidia,function = "displaya";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ lcd_cs0_n_pn4 {
+ nvidia,pins = "lcd_cs0_n_pn4",
+ "lcd_sdout_pn5",
+ "lcd_wr_n_pz3";
+ nvidia,function = "displaya";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ blink {
+ nvidia,pins = "clk_32k_out_pa0";
+ nvidia,function = "blink";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
+ /* KBC keys */
+ kb_col0_pq0 {
+ nvidia,pins = "kb_col0_pq0";
+ nvidia,function = "kbc";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
+ kb_col1_pq1 {
+ nvidia,pins = "kb_row1_pr1",
+ "kb_row3_pr3",
+ "kb_row6_pr6",
+ "kb_row8_ps0",
+ "kb_row9_ps1",
+ "kb_row11_ps3",
+ "kb_row14_ps6",
+ "kb_col6_pq6";
+ nvidia,function = "kbc";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ kb_col4_pq4 {
+ nvidia,pins = "kb_col4_pq4",
+ "kb_col5_pq5",
+ "kb_col7_pq7",
+ "kb_row2_pr2",
+ "kb_row4_pr4",
+ "kb_row5_pr5",
+ "kb_row12_ps4",
+ "kb_row13_ps5";
+ nvidia,function = "kbc";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ gmi_wp_n_pc7 {
+ nvidia,pins = "gmi_wp_n_pc7",
+ "gmi_wait_pi7",
+ "gmi_cs3_n_pk4";
+ nvidia,function = "rsvd1";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
+ gmi_cs0_n_pj0 {
+ nvidia,pins = "gmi_cs0_n_pj0",
+ "gmi_cs1_n_pj2",
+ "gmi_cs2_n_pk3";
+ nvidia,function = "rsvd1";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ vi_pclk_pt0 {
+ nvidia,pins = "vi_pclk_pt0";
+ nvidia,function = "rsvd1";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ nvidia,lock = <0>;
+ nvidia,io-reset = <0>;
+ };
+
+ /* GPIO keys pinmux */
+ power_key {
+ nvidia,pins = "pv0";
+ nvidia,function = "rsvd1";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ vol_keys {
+ nvidia,pins = "kb_col2_pq2",
+ "kb_col3_pq3";
+ nvidia,function = "rsvd4";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* Bluetooth */
+ bt_shutdown {
+ nvidia,pins = "pu0";
+ nvidia,function = "rsvd4";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ bt_dev_wake {
+ nvidia,pins = "pu1";
+ nvidia,function = "rsvd1";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
+ bt_host_wake {
+ nvidia,pins = "pu6";
+ nvidia,function = "rsvd4";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ pu2 {
+ nvidia,pins = "pu2";
+ nvidia,function = "rsvd1";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ pu3 {
+ nvidia,pins = "pu3";
+ nvidia,function = "rsvd4";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
+ pcc1 {
+ nvidia,pins = "pcc1";
+ nvidia,function = "rsvd2";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ pv2 {
+ nvidia,pins = "pv2";
+ nvidia,function = "rsvd2";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
+ pv3 {
+ nvidia,pins = "pv3";
+ nvidia,function = "rsvd2";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
+ vi_vsync_pd6 {
+ nvidia,pins = "vi_vsync_pd6",
+ "vi_hsync_pd7";
+ nvidia,function = "rsvd2";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ nvidia,lock = <0>;
+ nvidia,io-reset = <0>;
+ };
+
+ vi_d10_pt2 {
+ nvidia,pins = "vi_d10_pt2",
+ "vi_d0_pt4", "pbb0";
+ nvidia,function = "rsvd2";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ kb_row0_pr0 {
+ nvidia,pins = "kb_row0_pr0";
+ nvidia,function = "rsvd4";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
+ gmi_ad0_pg0 {
+ nvidia,pins = "gmi_ad0_pg0",
+ "gmi_ad1_pg1",
+ "gmi_ad2_pg2",
+ "gmi_ad3_pg3",
+ "gmi_ad6_pg6",
+ "gmi_ad7_pg7",
+ "gmi_wr_n_pi0",
+ "gmi_oe_n_pi1",
+ "gmi_dqs_pi2",
+ "gmi_adv_n_pk0",
+ "gmi_clk_pk1";
+ nvidia,function = "nand";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
+ gmi_ad13_ph5 {
+ nvidia,pins = "gmi_ad13_ph5";
+ nvidia,function = "nand";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ gmi_ad10_ph2 {
+ nvidia,pins = "gmi_ad10_ph2",
+ "gmi_ad11_ph3",
+ "gmi_ad14_ph6";
+ nvidia,function = "nand";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
+ gmi_ad12_ph4 {
+ nvidia,pins = "gmi_ad12_ph4",
+ "gmi_rst_n_pi4",
+ "gmi_cs7_n_pi6";
+ nvidia,function = "nand";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* Vibrator control */
+ vibrator {
+ nvidia,pins = "gmi_ad15_ph7";
+ nvidia,function = "nand";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
+ /* PWM pimnmux */
+ pwm_0 {
+ nvidia,pins = "gmi_ad8_ph0";
+ nvidia,function = "pwm0";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ pwm_1 {
+ nvidia,pins = "gmi_ad9_ph1";
+ nvidia,function = "pwm1";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ pwm_2 {
+ nvidia,pins = "pu5";
+ nvidia,function = "pwm2";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ gmi_cs6_n_pi3 {
+ nvidia,pins = "gmi_cs6_n_pi3";
+ nvidia,function = "gmi";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
+ /* Spdif pinmux */
+ spdif_out {
+ nvidia,pins = "spdif_out_pk5";
+ nvidia,function = "spdif";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
+ spdif_in {
+ nvidia,pins = "spdif_in_pk6";
+ nvidia,function = "spdif";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ vi_d4_pl2 {
+ nvidia,pins = "vi_d4_pl2";
+ nvidia,function = "vi";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
+ vi_d6_pl4 {
+ nvidia,pins = "vi_d6_pl4";
+ nvidia,function = "vi";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ nvidia,lock = <0>;
+ nvidia,io-reset = <0>;
+ };
+
+ vi_mclk_pt1 {
+ nvidia,pins = "vi_mclk_pt1";
+ nvidia,function = "vi";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ jtag_rtck {
+ nvidia,pins = "jtag_rtck_pu7";
+ nvidia,function = "rtck";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
+ crt_hsync_pv6 {
+ nvidia,pins = "crt_hsync_pv6",
+ "crt_vsync_pv7";
+ nvidia,function = "crt";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
+ clk1_out {
+ nvidia,pins = "clk1_out_pw4";
+ nvidia,function = "extperiph1";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ clk2_out {
+ nvidia,pins = "clk2_out_pw5";
+ nvidia,function = "extperiph2";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ clk3_out {
+ nvidia,pins = "clk3_out_pee0";
+ nvidia,function = "extperiph3";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
+ sys_clk_req {
+ nvidia,pins = "sys_clk_req_pz5";
+ nvidia,function = "sysclk";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
+ pbb4 {
+ nvidia,pins = "pbb4";
+ nvidia,function = "vgp4";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ pbb5 {
+ nvidia,pins = "pbb5";
+ nvidia,function = "vgp5";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ pbb6 {
+ nvidia,pins = "pbb6";
+ nvidia,function = "vgp6";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ clk2_req_pcc5 {
+ nvidia,pins = "clk2_req_pcc5",
+ "clk1_req_pee2";
+ nvidia,function = "dap";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ clk3_req_pee1 {
+ nvidia,pins = "clk3_req_pee1";
+ nvidia,function = "dev3";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ owr {
+ nvidia,pins = "owr";
+ nvidia,function = "owr";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* GPIO power/drive control */
+ drive_dap1 {
+ nvidia,pins = "drive_dap1",
+ "drive_dap2",
+ "drive_dbg",
+ "drive_at5",
+ "drive_gme",
+ "drive_ddc",
+ "drive_ao1",
+ "drive_uart3";
+ nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
+ nvidia,schmitt = <TEGRA_PIN_ENABLE>;
+ nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
+ nvidia,pull-down-strength = <31>;
+ nvidia,pull-up-strength = <31>;
+ nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
+ nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
+ };
+
+ drive_sdio1 {
+ nvidia,pins = "drive_sdio1",
+ "drive_sdio3";
+ nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
+ nvidia,schmitt = <TEGRA_PIN_DISABLE>;
+ nvidia,pull-down-strength = <46>;
+ nvidia,pull-up-strength = <42>;
+ nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FAST>;
+ nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FAST>;
+ };
+ };
+ };
+
uarta: serial@70006000 {
status = "okay";
};
@@ -82,6 +1066,7 @@
regulator-name = "vdd_emmc_core";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
};
/* uSD slot VDD */
@@ -89,6 +1074,7 @@
regulator-name = "vdd_usd";
regulator-min-microvolt = <3100000>;
regulator-max-microvolt = <3100000>;
+ regulator-boot-on;
};
/* uSD slot VDDIO */
@@ -129,6 +1115,13 @@
dr_mode = "otg";
};
+ usb-phy@7d000000 {
+ status = "okay";
+ nvidia,hssync-start-delay = <0>;
+ nvidia,xcvr-lsfslew = <2>;
+ nvidia,xcvr-lsrslew = <2>;
+ };
+
/* Dock's USB port */
usb3: usb@7d008000 {
status = "okay";
diff --git a/arch/arm/dts/tegra30-htc-endeavoru.dts b/arch/arm/dts/tegra30-htc-endeavoru.dts
index 5c7b2de..dbff795 100644
--- a/arch/arm/dts/tegra30-htc-endeavoru.dts
+++ b/arch/arm/dts/tegra30-htc-endeavoru.dts
@@ -52,6 +52,1153 @@
};
};
+ pinmux@70000868 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&state_default>;
+
+ state_default: pinmux {
+ /* PORT A */
+ clk_32k_out {
+ nvidia,pins = "clk_32k_out_pa0";
+ nvidia,function = "blink";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ bt_uart_cts {
+ nvidia,pins = "uart3_cts_n_pa1";
+ nvidia,function = "uartc";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ aud_aic3008_i2s {
+ nvidia,pins = "dap2_fs_pa2",
+ "dap2_sclk_pa3",
+ "dap2_din_pa4",
+ "dap2_dout_pa5";
+ nvidia,function = "i2s1";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ wifi_sdio_clock {
+ nvidia,pins = "sdmmc3_clk_pa6";
+ nvidia,function = "sdmmc3";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ wifi_sdio_command {
+ nvidia,pins = "sdmmc3_cmd_pa7";
+ nvidia,function = "sdmmc3";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* PORT B */
+ mdm_imc_uart {
+ nvidia,pins = "gmi_a17_pb0",
+ "gmi_a18_pb1";
+ nvidia,function = "uartd";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ aud_3v3_en {
+ nvidia,pins = "lcd_pwr0_pb2",
+ "lcd_pclk_pb3";
+ nvidia,function = "displaya";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ wifi_sdio_data {
+ nvidia,pins = "sdmmc3_dat3_pb4",
+ "sdmmc3_dat2_pb5",
+ "sdmmc3_dat1_pb6",
+ "sdmmc3_dat0_pb7";
+ nvidia,function = "sdmmc3";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* PORT C */
+ bt_uart_rts {
+ nvidia,pins = "uart3_rts_n_pc0";
+ nvidia,function = "uartc";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ mdm_ap2bb_rst_pwrdwn {
+ nvidia,pins = "lcd_pwr1_pc1";
+ nvidia,function = "rsvd4";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ cam_spi_clk_do {
+ nvidia,pins = "uart2_txd_pc2",
+ "uart2_rxd_pc3";
+ nvidia,function = "spi4";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ per_sensor_i2c {
+ nvidia,pins = "gen1_i2c_scl_pc4",
+ "gen1_i2c_sda_pc5";
+ nvidia,function = "i2c1";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ nvidia,open-drain = <TEGRA_PIN_ENABLE>;
+ };
+ mdm_ap2bb_slave_wakeup {
+ nvidia,pins = "lcd_pwr2_pc6";
+ nvidia,function = "displaya";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ mhl_int {
+ nvidia,pins = "gmi_wp_n_pc7";
+ nvidia,function = "rsvd1";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* PORT D */
+ sdmmc3_data {
+ nvidia,pins = "sdmmc3_dat5_pd0",
+ "sdmmc3_dat4_pd1";
+ nvidia,function = "sdmmc3";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ aud_1v8_en {
+ nvidia,pins = "lcd_dc1_pd2";
+ nvidia,function = "rsvd4";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ sdmmc3_dat6_pd3 {
+ nvidia,pins = "sdmmc3_dat6_pd3",
+ "sdmmc3_dat7_pd4";
+ nvidia,function = "rsvd1";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* PORT E */
+ mhl_usb_sel {
+ nvidia,pins = "lcd_d0_pe0";
+ nvidia,function = "displaya";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ lcd_d1_pe1 {
+ nvidia,pins = "lcd_d1_pe1";
+ nvidia,function = "displaya";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ peh_cap_int {
+ nvidia,pins = "lcd_d2_pe2";
+ nvidia,function = "rsvd3";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ mhl_1v2_en {
+ nvidia,pins = "lcd_d3_pe3",
+ "lcd_d4_pe4";
+ nvidia,function = "displaya";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ dsp_lcm_1v8_en {
+ nvidia,pins = "lcd_d5_pe5";
+ nvidia,function = "displaya";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ mhl_rst {
+ nvidia,pins = "lcd_d6_pe6";
+ nvidia,function = "rsvd3";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ peh_vibrator_on {
+ nvidia,pins = "lcd_d7_pe7";
+ nvidia,function = "displaya";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* PORT F */
+ cam_vcm_2v85_pwr {
+ nvidia,pins = "lcd_d8_pf0";
+ nvidia,function = "rsvd4";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ lcd_d9_d13 {
+ nvidia,pins = "lcd_d9_pf1",
+ "lcd_d10_pf2",
+ "lcd_d11_pf3",
+ "lcd_d12_pf4",
+ "lcd_d13_pf5";
+ nvidia,function = "displaya";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ cam_cam2_core_1v8_en {
+ nvidia,pins = "lcd_d14_pf6";
+ nvidia,function = "rsvd4";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ sys_pmu_msecure {
+ nvidia,pins = "lcd_d15_pf7";
+ nvidia,function = "rsvd4";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
+ /* PORT G */
+ bootstraps {
+ nvidia,pins = "gmi_ad0_pg0",
+ "gmi_ad1_pg1",
+ "gmi_ad2_pg2",
+ "gmi_ad3_pg3",
+ "gmi_ad4_pg4",
+ "gmi_ad5_pg5",
+ "gmi_ad6_pg6",
+ "gmi_ad7_pg7";
+ nvidia,function = "rsvd4";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* PORT H */
+ haptic_pwm {
+ nvidia,pins = "gmi_ad8_ph0";
+ nvidia,function = "pwm0";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ gmi_ad9 {
+ nvidia,pins = "gmi_ad9_ph1";
+ nvidia,function = "rsvd4";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ gmi_ad10 {
+ nvidia,pins = "gmi_ad10_ph2";
+ nvidia,function = "nand";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ dsp_tp_rst {
+ nvidia,pins = "gmi_ad11_ph3",
+ "gmi_ad12_ph4",
+ "gmi_ad13_ph5",
+ "gmi_ad14_ph6";
+ nvidia,function = "rsvd4";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ gmi_ad15 {
+ nvidia,pins = "gmi_ad15_ph7";
+ nvidia,function = "nand";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* PORT I */
+ gmi_wr_n {
+ nvidia,pins = "gmi_wr_n_pi0",
+ "gmi_oe_n_pi1",
+ "gmi_dqs_pi2",
+ "gmi_cs6_n_pi3";
+ nvidia,function = "rsvd4";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ gmi_rst_n_pi4 {
+ nvidia,pins = "gmi_rst_n_pi4";
+ nvidia,function = "rsvd4";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ sim_detect {
+ nvidia,pins = "gmi_iordy_pi5";
+ nvidia,function = "rsvd1";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ peh_gyr_int {
+ nvidia,pins = "gmi_cs7_n_pi6",
+ "gmi_wait_pi7";
+ nvidia,function = "rsvd4";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* PORT J */
+ mdm_bb2ap_host_wakeup {
+ nvidia,pins = "gmi_cs0_n_pj0";
+ nvidia,function = "gmi";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ dsp_lcm_de {
+ nvidia,pins = "lcd_de_pj1";
+ nvidia,function = "displaya";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ peh_comp_int {
+ nvidia,pins = "gmi_cs1_n_pj2";
+ nvidia,function = "rsvd1";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ lcd_hsync {
+ nvidia,pins = "lcd_hsync_pj3";
+ nvidia,function = "displaya";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ mdm_ap_usb_uart_oe {
+ nvidia,pins = "lcd_vsync_pj4";
+ nvidia,function = "displaya";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ mcam_spi_di_cs0 {
+ nvidia,pins = "uart2_cts_n_pj5",
+ "uart2_rts_n_pj6";
+ nvidia,function = "spi4";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ mdm_tx {
+ nvidia,pins = "gmi_a16_pj7";
+ nvidia,function = "uartd";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
+ /* PORT K */
+ gmi_adv_n {
+ nvidia,pins = "gmi_adv_n_pk0",
+ "gmi_clk_pk1",
+ "gmi_cs2_n_pk3";
+ nvidia,function = "rsvd4";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ gmi_cs4_n {
+ nvidia,pins = "gmi_cs4_n_pk2";
+ nvidia,function = "rsvd4";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ gmi_cs3_n {
+ nvidia,pins = "gmi_cs3_n_pk4";
+ nvidia,function = "rsvd1";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ spdif_out {
+ nvidia,pins = "spdif_out_pk5";
+ nvidia,function = "spdif";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ spdif_in {
+ nvidia,pins = "spdif_in_pk6";
+ nvidia,function = "spdif";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ mdm_rts {
+ nvidia,pins = "gmi_a19_pk7";
+ nvidia,function = "uartd";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
+ /* PORT L */
+ port_l {
+ nvidia,pins = "vi_d2_pl0",
+ "vi_d3_pl1",
+ "vi_d4_pl2",
+ "vi_d5_pl3",
+ "vi_d6_pl4",
+ "vi_d7_pl5",
+ "vi_d8_pl6",
+ "vi_d9_pl7";
+ nvidia,function = "sdmmc2";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* PORT M */
+ dsp_lcd_id {
+ nvidia,pins = "lcd_d16_pm0",
+ "lcd_d17_pm1";
+ nvidia,function = "displaya";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ front_cam_rst {
+ nvidia,pins = "lcd_d18_pm2";
+ nvidia,function = "rsvd4";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ mdm_v_dcin_modem_en {
+ nvidia,pins = "lcd_d19_pm3",
+ "lcd_d20_pm4";
+ nvidia,function = "rsvd4";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ nfc_pins {
+ nvidia,pins = "lcd_d21_pm5",
+ "lcd_d22_pm6";
+ nvidia,function = "rsvd4";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ cam_vaa_2v85_en {
+ nvidia,pins = "lcd_d23_pm7";
+ nvidia,function = "rsvd4";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* PORT N */
+ mdm_ap2bb_rst_host_pwr {
+ nvidia,pins = "dap1_fs_pn0",
+ "dap1_din_pn1",
+ "dap1_sclk_pn3";
+ nvidia,function = "i2s0";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ mdm_bb_fatal_int {
+ nvidia,pins = "dap1_dout_pn2";
+ nvidia,function = "i2s0";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ lcd_cs0_n {
+ nvidia,pins = "lcd_cs0_n_pn4";
+ nvidia,function = "rsvd4";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ lcd_sdout {
+ nvidia,pins = "lcd_sdout_pn5";
+ nvidia,function = "displaya";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ dsp_lcd_rst {
+ nvidia,pins = "lcd_dc0_pn6";
+ nvidia,function = "displaya";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ mhl_hpd {
+ nvidia,pins = "hdmi_int_pn7";
+ nvidia,function = "rsvd1";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* PORT O */
+ ap_usb_uart_sel {
+ nvidia,pins = "ulpi_data7_po0";
+ nvidia,function = "spi2";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ bsp_ap_debug_tx {
+ nvidia,pins = "ulpi_data0_po1";
+ nvidia,function = "uarta";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ bsp_ap_debug_rx {
+ nvidia,pins = "ulpi_data1_po2";
+ nvidia,function = "uarta";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ ulpi_data2 {
+ nvidia,pins = "ulpi_data2_po3";
+ nvidia,function = "spi3";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ con_wifi_irq {
+ nvidia,pins = "ulpi_data3_po4";
+ nvidia,function = "hsi";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ per_gsensor_int {
+ nvidia,pins = "ulpi_data4_po5";
+ nvidia,function = "ulpi";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ ulpi_data5_data6 {
+ nvidia,pins = "ulpi_data5_po6",
+ "ulpi_data6_po7";
+ nvidia,function = "ulpi";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* PORT P */
+ aud_ap_pcm {
+ nvidia,pins = "dap3_fs_pp0",
+ "dap3_din_pp1",
+ "dap3_dout_pp2",
+ "dap3_sclk_pp3";
+ nvidia,function = "i2s2";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ aud_btpcm {
+ nvidia,pins = "dap4_fs_pp4",
+ "dap4_din_pp5";
+ nvidia,function = "i2s3";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ aud_ext {
+ nvidia,pins = "dap4_dout_pp6",
+ "dap4_sclk_pp7";
+ nvidia,function = "rsvd4";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
+ /* PORT Q */
+ port_q {
+ nvidia,pins = "kb_col0_pq0",
+ "kb_col1_pq1",
+ "kb_col2_pq2",
+ "kb_col3_pq3",
+ "kb_col4_pq4",
+ "kb_col5_pq5",
+ "kb_col6_pq6",
+ "kb_col7_pq7";
+ nvidia,function = "kbc";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* PORT R */
+ raw_intr0 {
+ nvidia,pins = "kb_row0_pr0";
+ nvidia,function = "kbc";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ per_torch_en {
+ nvidia,pins = "kb_row1_pr1";
+ nvidia,function = "kbc";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ gyro_pwr {
+ nvidia,pins = "kb_row2_pr2";
+ nvidia,function = "rsvd4";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ haptic_en {
+ nvidia,pins = "kb_row3_pr3";
+ nvidia,function = "rsvd3";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ kb_row4_row5 {
+ nvidia,pins = "kb_row4_pr4",
+ "kb_row5_pr5";
+ nvidia,function = "rsvd4";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ cam_id {
+ nvidia,pins = "kb_row6_pr6",
+ "kb_row7_pr7";
+ nvidia,function = "kbc";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* PORT S */
+ dsp_vol_up {
+ nvidia,pins = "kb_row8_ps0";
+ nvidia,function = "kbc";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ con_usb_id_1 {
+ nvidia,pins = "kb_row9_ps1",
+ "kb_row10_ps2";
+ nvidia,function = "kbc";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ port_s {
+ nvidia,pins = "kb_row11_ps3",
+ "kb_row12_ps4",
+ "kb_row13_ps5",
+ "kb_row14_ps6",
+ "kb_row15_ps7";
+ nvidia,function = "kbc";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* PORT T */
+ dsp_tw_i2c {
+ nvidia,pins = "gen2_i2c_scl_pt5",
+ "gen2_i2c_sda_pt6";
+ nvidia,function = "i2c2";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ nvidia,open-drain = <TEGRA_PIN_ENABLE>;
+ };
+ per_emmc_cmd {
+ nvidia,pins = "sdmmc4_cmd_pt7";
+ nvidia,function = "sdmmc4";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* PORT U */
+ con_bt_en {
+ nvidia,pins = "pu0", "pu1", "pu2",
+ "pu3", "pu4";
+ nvidia,function = "rsvd4";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ per_capsensor_int_cpu {
+ nvidia,pins = "pu5";
+ nvidia,function = "rsvd4";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ dsp_ap_kpdpwr {
+ nvidia,pins = "pu6";
+ nvidia,function = "pwm3";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ jtag_rtck {
+ nvidia,pins = "jtag_rtck_pu7";
+ nvidia,function = "rtck";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* PORT V */
+ mdm_bb2ap_suspend_req {
+ nvidia,pins = "pv0";
+ nvidia,function = "rsvd1";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ dsp_tp_att {
+ nvidia,pins = "pv1";
+ nvidia,function = "rsvd1";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ con_wifi_en {
+ nvidia,pins = "pv2", "pv3";
+ nvidia,function = "rsvd2";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ mhl_ddc {
+ nvidia,pins = "ddc_scl_pv4",
+ "ddc_sda_pv5";
+ nvidia,function = "i2c4";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ crt_hsync {
+ nvidia,pins = "crt_hsync_pv6";
+ nvidia,function = "crt";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ crt_vsync {
+ nvidia,pins = "crt_vsync_pv7";
+ nvidia,function = "rsvd4";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
+ /* PORT W */
+ pwr_chg_stat {
+ nvidia,pins = "lcd_cs1_n_pw0";
+ nvidia,function = "rsvd4";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ dsp_bl_pwm_cpu {
+ nvidia,pins = "lcd_m1_pw1";
+ nvidia,function = "displaya";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ aud_hp_det {
+ nvidia,pins = "spi2_cs1_n_pw2";
+ nvidia,function = "spi2";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ dsp_vol_down {
+ nvidia,pins = "spi2_cs2_n_pw3";
+ nvidia,function = "spi2";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ aud_mclk {
+ nvidia,pins = "clk1_out_pw4";
+ nvidia,function = "rsvd4";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ aud_aic3008_rst {
+ nvidia,pins = "clk2_out_pw5";
+ nvidia,function = "rsvd4";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ con_bt_tx {
+ nvidia,pins = "uart3_txd_pw6";
+ nvidia,function = "uartc";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ con_bt_rx {
+ nvidia,pins = "uart3_rxd_pw7";
+ nvidia,function = "uartc";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* PORT X */
+ aud_spi_do {
+ nvidia,pins = "spi2_mosi_px0",
+ "spi2_sck_px2",
+ "spi2_cs0_n_px3";
+ nvidia,function = "spi2";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ aud_spi_di {
+ nvidia,pins = "spi2_miso_px1";
+ nvidia,function = "spi2";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ spi1_mosi {
+ nvidia,pins = "spi1_mosi_px4";
+ nvidia,function = "spi1";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ pwr_chg_int {
+ nvidia,pins = "spi1_sck_px5";
+ nvidia,function = "spi2";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ spi1_cs0_n {
+ nvidia,pins = "spi1_cs0_n_px6";
+ nvidia,function = "spi1";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ audio_mclk_en {
+ nvidia,pins = "spi1_miso_px7";
+ nvidia,function = "rsvd4";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
+ /* PORT Y */
+ led_drv_en_trig {
+ nvidia,pins = "ulpi_clk_py0",
+ "ulpi_dir_py1";
+ nvidia,function = "rsvd2";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ mhl_3v3_en {
+ nvidia,pins = "ulpi_nxt_py2";
+ nvidia,function = "ulpi";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ peh_v_srio_1v8_en {
+ nvidia,pins = "ulpi_stp_py3";
+ nvidia,function = "ulpi";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ aud_remo_tx {
+ nvidia,pins = "sdmmc1_dat3_py4";
+ nvidia,function = "uarte";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ aud_remo_rx {
+ nvidia,pins = "sdmmc1_dat2_py5";
+ nvidia,function = "uarte";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ nfc_irq {
+ nvidia,pins = "sdmmc1_dat1_py6";
+ nvidia,function = "rsvd2";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ testpoint1 {
+ nvidia,pins = "sdmmc1_dat0_py7";
+ nvidia,function = "sdmmc1";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* PORT Z */
+ aud_remo_oe {
+ nvidia,pins = "sdmmc1_clk_pz0";
+ nvidia,function = "sdmmc1";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ testpoint2 {
+ nvidia,pins = "sdmmc1_cmd_pz1";
+ nvidia,function = "sdmmc1";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ mdm_usb_uart_oe {
+ nvidia,pins = "lcd_sdin_pz2";
+ nvidia,function = "displaya";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ lcd_wr_n {
+ nvidia,pins = "lcd_wr_n_pz3";
+ nvidia,function = "displaya";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ lcd_sck {
+ nvidia,pins = "lcd_sck_pz4";
+ nvidia,function = "displaya";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ sys_clk_req {
+ nvidia,pins = "sys_clk_req_pz5";
+ nvidia,function = "sysclk";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ sys_pwr_i2c {
+ nvidia,pins = "pwr_i2c_scl_pz6",
+ "pwr_i2c_sda_pz7";
+ nvidia,function = "i2cpwr";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ nvidia,open-drain = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* PORT AA */
+ bsp_emmc {
+ nvidia,pins = "sdmmc4_dat0_paa0",
+ "sdmmc4_dat1_paa1",
+ "sdmmc4_dat2_paa2",
+ "sdmmc4_dat3_paa3",
+ "sdmmc4_dat4_paa4",
+ "sdmmc4_dat5_paa5",
+ "sdmmc4_dat6_paa6",
+ "sdmmc4_dat7_paa7";
+ nvidia,function = "sdmmc4";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* PORT BB */
+ cam1_rst {
+ nvidia,pins = "pbb0";
+ nvidia,function = "rsvd3";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ cam_i2c {
+ nvidia,pins = "cam_i2c_scl_pbb1",
+ "cam_i2c_sda_pbb2";
+ nvidia,function = "i2c3";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ nvidia,open-drain = <TEGRA_PIN_ENABLE>;
+ };
+ per_flash_en {
+ nvidia,pins = "pbb3";
+ nvidia,function = "vgp3";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ cam_vddio_1v8_en {
+ nvidia,pins = "pbb4";
+ nvidia,function = "vgp4";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ cam1_vcm_pd {
+ nvidia,pins = "pbb5";
+ nvidia,function = "vgp5";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ aud_remo_pres {
+ nvidia,pins = "pbb6";
+ nvidia,function = "vgp6";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ front_cam_standby {
+ nvidia,pins = "pbb7";
+ nvidia,function = "rsvd3";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* PORT CC */
+ cam_mclk {
+ nvidia,pins = "cam_mclk_pcc0";
+ nvidia,function = "vi_alt3";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ cam_sel {
+ nvidia,pins = "pcc1";
+ nvidia,function = "rsvd3";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ pwr_themp_alert_int {
+ nvidia,pins = "pcc2";
+ nvidia,function = "rsvd3";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ bsp_emmc_resout {
+ nvidia,pins = "sdmmc4_rst_n_pcc3";
+ nvidia,function = "rsvd2";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ bsp_emmc_clk {
+ nvidia,pins = "sdmmc4_clk_pcc4";
+ nvidia,function = "sdmmc4";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ aud_dock_out_en {
+ nvidia,pins = "clk2_req_pcc5";
+ nvidia,function = "rsvd4";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
+ /* PORT DD */
+ /* PORT EE */
+ clk3_out {
+ nvidia,pins = "clk3_out_pee0";
+ nvidia,function = "extperiph3";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ raw_intr1 {
+ nvidia,pins = "clk3_req_pee1";
+ nvidia,function = "rsvd4";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ clk1_req {
+ nvidia,pins = "clk1_req_pee2";
+ nvidia,function = "dap";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ hdmi_cec {
+ nvidia,pins = "hdmi_cec_pee3";
+ nvidia,function = "cec";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ owr {
+ nvidia,pins = "owr";
+ nvidia,function = "owr";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ };
+ };
+
uarta: serial@70006000 {
status = "okay";
};
@@ -81,6 +1228,7 @@
regulator-name = "avdd_dsi_csi";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
+ regulator-boot-on;
};
};
};
@@ -100,6 +1248,13 @@
dr_mode = "otg";
};
+ usb-phy@7d000000 {
+ status = "okay";
+ nvidia,hssync-start-delay = <0>;
+ nvidia,xcvr-lsfslew = <2>;
+ nvidia,xcvr-lsrslew = <2>;
+ };
+
backlight: backlight {
compatible = "nvidia,tegra-pwm-backlight";
diff --git a/arch/arm/dts/tegra30-lg-p880.dts b/arch/arm/dts/tegra30-lg-p880.dts
index 81d3643..1d5ca14 100644
--- a/arch/arm/dts/tegra30-lg-p880.dts
+++ b/arch/arm/dts/tegra30-lg-p880.dts
@@ -11,6 +11,96 @@
mmc1 = &sdmmc3; /* uSD slot */
};
+ pinmux@70000868 {
+ state_default: pinmux {
+ /* WLAN SDIO pinmux */
+ host_wlan_wake {
+ nvidia,pins = "pu4";
+ nvidia,function = "pwm1";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* GNSS UART-B pinmux */
+ uartb_rxd {
+ nvidia,pins = "uart2_rxd_pc3";
+ nvidia,function = "uartb";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ uartb_txd {
+ nvidia,pins = "uart2_txd_pc2";
+ nvidia,function = "uartb";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ gps_reset {
+ nvidia,pins = "kb_row7_pr7";
+ nvidia,function = "kbc";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
+ /* MicroSD pinmux */
+ sdmmc3_clk {
+ nvidia,pins = "sdmmc3_clk_pa6";
+ nvidia,function = "sdmmc3";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ sdmmc3_data {
+ nvidia,pins = "sdmmc3_cmd_pa7",
+ "sdmmc3_dat0_pb7",
+ "sdmmc3_dat1_pb6",
+ "sdmmc3_dat2_pb5",
+ "sdmmc3_dat3_pb4";
+ nvidia,function = "sdmmc3";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ microsd_detect {
+ nvidia,pins = "clk2_out_pw5";
+ nvidia,function = "rsvd2";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* GPIO keys pinmux */
+ volume_up {
+ nvidia,pins = "ulpi_data6_po7";
+ nvidia,function = "spi2";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* Sensors pinmux */
+ current_alert_irq {
+ nvidia,pins = "uart2_rts_n_pj6";
+ nvidia,function = "uartb";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* AUDIO pinmux */
+ sub_mic_ldo {
+ nvidia,pins = "gmi_cs7_n_pi6";
+ nvidia,function = "gmi";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ };
+ };
+
sdmmc3: sdhci@78000400 {
status = "okay";
bus-width = <4>;
diff --git a/arch/arm/dts/tegra30-lg-p895.dts b/arch/arm/dts/tegra30-lg-p895.dts
index 074205d..43bb373 100644
--- a/arch/arm/dts/tegra30-lg-p895.dts
+++ b/arch/arm/dts/tegra30-lg-p895.dts
@@ -15,6 +15,99 @@
};
};
+ pinmux@70000868 {
+ state_default: pinmux {
+ /* GNSS UART-B pinmux */
+ uartb_cts_rxd {
+ nvidia,pins = "uart2_cts_n_pj5",
+ "uart2_rxd_pc3";
+ nvidia,function = "uartb";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ uartb_rts_txd {
+ nvidia,pins = "uart2_rts_n_pj6",
+ "uart2_txd_pc2";
+ nvidia,function = "uartb";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ gps_reset {
+ nvidia,pins = "spdif_out_pk5";
+ nvidia,function = "spdif";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
+ /* GPIO keys pinmux */
+ volume_up {
+ nvidia,pins = "gmi_cs7_n_pi6";
+ nvidia,function = "gmi";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ memo_key {
+ nvidia,pins = "sdmmc3_dat1_pb6";
+ nvidia,function = "rsvd1";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* Sensors pinmux */
+ current_alert_irq {
+ nvidia,pins = "spi1_cs0_n_px6";
+ nvidia,function = "gmi";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* Panel pinmux */
+ panel_vdd {
+ nvidia,pins = "pbb0";
+ nvidia,function = "rsvd2";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
+ /* AUDIO pinmux */
+ sub_mic_ldo {
+ nvidia,pins = "gmi_dqs_pi2";
+ nvidia,function = "gmi";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
+ /* Modem pinmux */
+ usim_detect {
+ nvidia,pins = "clk2_out_pw5";
+ nvidia,function = "rsvd2";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* GPIO power/drive control */
+ drive_sdmmc4 {
+ nvidia,pins = "drive_gma",
+ "drive_gmb",
+ "drive_gmc",
+ "drive_gmd";
+ nvidia,pull-down-strength = <9>;
+ nvidia,pull-up-strength = <9>;
+ nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
+ nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
+ };
+ };
+ };
+
panel: panel {
compatible = "hitachi,tx13d100vm0eaa";
diff --git a/arch/arm/dts/tegra30-lg-x3.dtsi b/arch/arm/dts/tegra30-lg-x3.dtsi
index 6e52fc5..30d6dcb 100644
--- a/arch/arm/dts/tegra30-lg-x3.dtsi
+++ b/arch/arm/dts/tegra30-lg-x3.dtsi
@@ -37,6 +37,851 @@
};
};
+ pinmux@70000868 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&state_default>;
+
+ state_default: pinmux {
+ /* WLAN SDIO pinmux */
+ sdmmc1_clk {
+ nvidia,pins = "sdmmc1_clk_pz0";
+ nvidia,function = "sdmmc1";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ sdmmc1_cmd {
+ nvidia,pins = "sdmmc1_cmd_pz1",
+ "sdmmc1_dat3_py4",
+ "sdmmc1_dat2_py5",
+ "sdmmc1_dat1_py6",
+ "sdmmc1_dat0_py7";
+ nvidia,function = "sdmmc1";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ wlan_reset {
+ nvidia,pins = "pv3";
+ nvidia,function = "rsvd2";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ wlan_host_wake {
+ nvidia,pins = "pu6";
+ nvidia,function = "pwm3";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* GNSS UART-B pinmux */
+ gps_pwr_en {
+ nvidia,pins = "kb_row6_pr6";
+ nvidia,function = "kbc";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ gps_ldo_en {
+ nvidia,pins = "ulpi_dir_py1";
+ nvidia,function = "rsvd2";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ gps_clk_ref {
+ nvidia,pins = "gmi_ad8_ph0";
+ nvidia,function = "gmi";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
+ /* Bluetooth UART-C pinmux */
+ uartc_cts_rxd {
+ nvidia,pins = "uart3_cts_n_pa1",
+ "uart3_rxd_pw7";
+ nvidia,function = "uartc";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ uartc_rts_txd {
+ nvidia,pins = "uart3_rts_n_pc0",
+ "uart3_txd_pw6";
+ nvidia,function = "uartc";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ bt_reset {
+ nvidia,pins = "clk2_req_pcc5";
+ nvidia,function = "dap";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ bt_dev_wake {
+ nvidia,pins = "kb_row11_ps3";
+ nvidia,function = "kbc";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ bt_host_wake {
+ nvidia,pins = "kb_row12_ps4";
+ nvidia,function = "kbc";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ bt_pcm_dap4 {
+ nvidia,pins = "dap4_fs_pp4",
+ "dap4_din_pp5",
+ "dap4_dout_pp6",
+ "dap4_sclk_pp7";
+ nvidia,function = "i2s3";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* EMMC pinmux */
+ sdmmc4_clk {
+ nvidia,pins = "sdmmc4_clk_pcc4";
+ nvidia,function = "sdmmc4";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ sdmmc4_data {
+ nvidia,pins = "sdmmc4_cmd_pt7",
+ "sdmmc4_dat0_paa0",
+ "sdmmc4_dat1_paa1",
+ "sdmmc4_dat2_paa2",
+ "sdmmc4_dat3_paa3",
+ "sdmmc4_dat4_paa4",
+ "sdmmc4_dat5_paa5",
+ "sdmmc4_dat6_paa6",
+ "sdmmc4_dat7_paa7";
+ nvidia,function = "sdmmc4";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ sdmmc4_reset {
+ nvidia,pins = "sdmmc4_rst_n_pcc3";
+ nvidia,function = "rsvd2";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* I2C pinmux */
+ gen1_i2c {
+ nvidia,pins = "gen1_i2c_scl_pc4",
+ "gen1_i2c_sda_pc5";
+ nvidia,function = "i2c1";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ nvidia,open-drain = <TEGRA_PIN_ENABLE>;
+ nvidia,lock = <TEGRA_PIN_DISABLE>;
+ };
+
+ gen2_i2c {
+ nvidia,pins = "gen2_i2c_scl_pt5",
+ "gen2_i2c_sda_pt6";
+ nvidia,function = "i2c2";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ nvidia,open-drain = <TEGRA_PIN_ENABLE>;
+ nvidia,lock = <TEGRA_PIN_DISABLE>;
+ };
+
+ cam_i2c {
+ nvidia,pins = "cam_i2c_scl_pbb1",
+ "cam_i2c_sda_pbb2";
+ nvidia,function = "i2c3";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ nvidia,open-drain = <TEGRA_PIN_ENABLE>;
+ nvidia,lock = <TEGRA_PIN_DISABLE>;
+ };
+
+ ddc_i2c {
+ nvidia,pins = "ddc_scl_pv4",
+ "ddc_sda_pv5";
+ nvidia,function = "i2c4";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ nvidia,lock = <TEGRA_PIN_DISABLE>;
+ };
+
+ pwr_i2c {
+ nvidia,pins = "pwr_i2c_scl_pz6",
+ "pwr_i2c_sda_pz7";
+ nvidia,function = "i2cpwr";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ nvidia,open-drain = <TEGRA_PIN_ENABLE>;
+ nvidia,lock = <TEGRA_PIN_DISABLE>;
+ };
+
+ mhl_i2c {
+ nvidia,pins = "kb_col6_pq6",
+ "kb_col7_pq7";
+ nvidia,function = "kbc";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* GPIO keys pinmux */
+ power_key {
+ nvidia,pins = "gmi_wp_n_pc7";
+ nvidia,function = "gmi";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ volume_down {
+ nvidia,pins = "ulpi_data3_po4";
+ nvidia,function = "spi3";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* Sensors pinmux */
+ sen_vdd {
+ nvidia,pins = "spi1_miso_px7";
+ nvidia,function = "rsvd4";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ proxi_vdd {
+ nvidia,pins = "spi2_miso_px1";
+ nvidia,function = "gmi";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ sen_vio {
+ nvidia,pins = "lcd_dc1_pd2";
+ nvidia,function = "rsvd4";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ nct_irq {
+ nvidia,pins = "gmi_iordy_pi5";
+ nvidia,function = "rsvd1";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ bat_irq {
+ nvidia,pins = "kb_row8_ps0";
+ nvidia,function = "kbc";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ charger_irq {
+ nvidia,pins = "gmi_cs1_n_pj2";
+ nvidia,function = "rsvd1";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ mpu_irq {
+ nvidia,pins = "gmi_ad12_ph4";
+ nvidia,function = "rsvd1";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ compass_irq {
+ nvidia,pins = "gmi_ad13_ph5";
+ nvidia,function = "rsvd1";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ light_irq {
+ nvidia,pins = "gmi_cs4_n_pk2";
+ nvidia,function = "rsvd1";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* LED pinmux */
+ backlight_en {
+ nvidia,pins = "lcd_dc0_pn6";
+ nvidia,function = "rsvd3";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ flash_led_en {
+ nvidia,pins = "pbb3";
+ nvidia,function = "vgp3";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ keypad_led {
+ nvidia,pins = "kb_row2_pr2",
+ "kb_row3_pr3";
+ nvidia,function = "rsvd3";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
+ /* NFC pinmux */
+ nfc_irq {
+ nvidia,pins = "spi2_cs1_n_pw2";
+ nvidia,function = "spi2";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ nfc_ven {
+ nvidia,pins = "spi1_sck_px5";
+ nvidia,function = "spi1";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ nfc_firm {
+ nvidia,pins = "kb_row0_pr0";
+ nvidia,function = "rsvd4";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
+ /* DC pinmux */
+ lcd_pwr {
+ nvidia,pins = "lcd_pwr0_pb2",
+ "lcd_pwr1_pc1";
+ nvidia,function = "displaya";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ lcd_wr_n {
+ nvidia,pins = "lcd_wr_n_pz3";
+ nvidia,function = "displaya";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ lcd_id {
+ nvidia,pins = "lcd_m1_pw1";
+ nvidia,function = "displaya";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ lcd_pclk {
+ nvidia,pins = "lcd_pclk_pb3",
+ "lcd_de_pj1",
+ "lcd_hsync_pj3",
+ "lcd_vsync_pj4";
+ nvidia,function = "displaya";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ lcd_rgb_blue {
+ nvidia,pins = "lcd_d0_pe0",
+ "lcd_d1_pe1",
+ "lcd_d2_pe2",
+ "lcd_d3_pe3",
+ "lcd_d4_pe4",
+ "lcd_d5_pe5",
+ "lcd_d18_pm2",
+ "lcd_d19_pm3";
+ nvidia,function = "displaya";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ lcd_rgb_green {
+ nvidia,pins = "lcd_d6_pe6",
+ "lcd_d7_pe7",
+ "lcd_d8_pf0",
+ "lcd_d9_pf1",
+ "lcd_d10_pf2",
+ "lcd_d11_pf3",
+ "lcd_d20_pm4",
+ "lcd_d21_pm5";
+ nvidia,function = "displaya";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ lcd_rgb_red {
+ nvidia,pins = "lcd_d12_pf4",
+ "lcd_d13_pf5",
+ "lcd_d14_pf6",
+ "lcd_d15_pf7",
+ "lcd_d16_pm0",
+ "lcd_d17_pm1",
+ "lcd_d22_pm6",
+ "lcd_d23_pm7";
+ nvidia,function = "displaya";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* Bridge pinmux */
+ bridge_reset {
+ nvidia,pins = "ulpi_data1_po2";
+ nvidia,function = "spi3";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ rgb_ic_en {
+ nvidia,pins = "gmi_a18_pb1";
+ nvidia,function = "uartd";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ bridge_clk {
+ nvidia,pins = "clk3_out_pee0";
+ nvidia,function = "extperiph3";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ rgb_bridge {
+ nvidia,pins = "lcd_sdin_pz2",
+ "lcd_sdout_pn5",
+ "lcd_cs0_n_pn4",
+ "lcd_sck_pz4";
+ nvidia,function = "spi5";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* Panel pinmux */
+ panel_reset {
+ nvidia,pins = "lcd_cs1_n_pw0";
+ nvidia,function = "rsvd4";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ panel_vio {
+ nvidia,pins = "ulpi_clk_py0";
+ nvidia,function = "rsvd2";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
+ /* Touchscreen pinmux */
+ touch_vdd {
+ nvidia,pins = "kb_col1_pq1";
+ nvidia,function = "kbc";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ touch_vio {
+ nvidia,pins = "spi1_mosi_px4";
+ nvidia,function = "spi2";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ touch_int_n {
+ nvidia,pins = "kb_col3_pq3";
+ nvidia,function = "kbc";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ touch_rst_n {
+ nvidia,pins = "ulpi_data0_po1";
+ nvidia,function = "spi3";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ touch_maker_id {
+ nvidia,pins = "kb_col2_pq2";
+ nvidia,function = "kbc";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* MHL pinmux */
+ mhl_vio {
+ nvidia,pins = "pv2";
+ nvidia,function = "owr";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ mhl_rst_n {
+ nvidia,pins = "clk3_req_pee1";
+ nvidia,function = "dev3";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ mhl_int {
+ nvidia,pins = "crt_vsync_pv7";
+ nvidia,function = "rsvd2";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ mhl_sel {
+ nvidia,pins = "kb_row10_ps2";
+ nvidia,function = "kbc";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ hdmi_hpd {
+ nvidia,pins = "hdmi_int_pn7";
+ nvidia,function = "hdmi";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* AUDIO pinmux */
+ hp_detect {
+ nvidia,pins = "pbb6";
+ nvidia,function = "vgp6";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ hp_hook {
+ nvidia,pins = "ulpi_data4_po5";
+ nvidia,function = "ulpi";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ ear_mic_en {
+ nvidia,pins = "spi2_mosi_px0";
+ nvidia,function = "spi2";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ audio_irq {
+ nvidia,pins = "spi2_cs2_n_pw3";
+ nvidia,function = "spi3";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ audio_mclk {
+ nvidia,pins = "clk1_out_pw4";
+ nvidia,function = "extperiph1";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ dap_i2s0 {
+ nvidia,pins = "dap1_fs_pn0",
+ "dap1_din_pn1",
+ "dap1_dout_pn2",
+ "dap1_sclk_pn3";
+ nvidia,function = "i2s0";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ dap_i2s1 {
+ nvidia,pins = "dap2_fs_pa2",
+ "dap2_sclk_pa3",
+ "dap2_din_pa4",
+ "dap2_dout_pa5";
+ nvidia,function = "i2s1";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* MUIC pinmux */
+ muic_irq {
+ nvidia,pins = "gmi_cs0_n_pj0";
+ nvidia,function = "gmi";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ muic_dp2t {
+ nvidia,pins = "pcc2";
+ nvidia,function = "rsvd2";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ muic_usif {
+ nvidia,pins = "ulpi_stp_py3";
+ nvidia,function = "spi1";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ ifx_usb_vbus_en {
+ nvidia,pins = "kb_row4_pr4";
+ nvidia,function = "rsvd4";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ pcb_rev {
+ nvidia,pins = "gmi_wait_pi7",
+ "gmi_rst_n_pi4";
+ nvidia,function = "gmi";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ jtag_rtck {
+ nvidia,pins = "jtag_rtck_pu7";
+ nvidia,function = "rtck";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
+ /* Camera pinmux */
+ cam_mclk {
+ nvidia,pins = "cam_mclk_pcc0";
+ nvidia,function = "vi_alt3";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ cam_pmic_en {
+ nvidia,pins = "pbb4";
+ nvidia,function = "vgp4";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ front_cam_rst {
+ nvidia,pins = "pbb5";
+ nvidia,function = "vgp5";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ front_cam_vio {
+ nvidia,pins = "ulpi_nxt_py2";
+ nvidia,function = "rsvd2";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ rear_cam_rst {
+ nvidia,pins = "gmi_cs3_n_pk4";
+ nvidia,function = "rsvd1";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ rear_cam_eprom_pr {
+ nvidia,pins = "gmi_cs2_n_pk3";
+ nvidia,function = "rsvd1";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ rear_cam_vcm_pwdn {
+ nvidia,pins = "kb_row1_pr1";
+ nvidia,function = "kbc";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* Haptic pinmux */
+ haptic_en {
+ nvidia,pins = "gmi_ad9_ph1";
+ nvidia,function = "gmi";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ haptic_osc {
+ nvidia,pins = "gmi_ad11_ph3";
+ nvidia,function = "pwm3";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
+ /* Modem pinmux */
+ cp2ap_ack1_host_active {
+ nvidia,pins = "pu5";
+ nvidia,function = "rsvd4";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ cp2ap_ack2_host_wakeup {
+ nvidia,pins = "pv0";
+ nvidia,function = "rsvd4";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ ap2cp_ack2_suspend_req {
+ nvidia,pins = "kb_row14_ps6";
+ nvidia,function = "kbc";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ ap2cp_ack1_slave_wakeup {
+ nvidia,pins = "kb_row15_ps7";
+ nvidia,function = "kbc";
+ nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
+ cp_kkp {
+ nvidia,pins = "kb_col0_pq0";
+ nvidia,function = "kbc";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ cp_crash_irq {
+ nvidia,pins = "kb_row13_ps5";
+ nvidia,function = "kbc";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ ap2cp_uarta_tx_ipc {
+ nvidia,pins = "pu0";
+ nvidia,function = "uarta";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ ap2cp_uarta_rx_ipc {
+ nvidia,pins = "pu1";
+ nvidia,function = "uarta";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ fota_ap_cts_cp_rts {
+ nvidia,pins = "pu2";
+ nvidia,function = "uarta";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ fota_ap_rts_cp_cts {
+ nvidia,pins = "pu3";
+ nvidia,function = "uarta";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ modem_enable {
+ nvidia,pins = "ulpi_data7_po0";
+ nvidia,function = "hsi";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+ modem_reset {
+ nvidia,pins = "pv1";
+ nvidia,function = "rsvd1";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_DISABLE>;
+ };
+
+ dap_i2s2 {
+ nvidia,pins = "dap3_fs_pp0",
+ "dap3_din_pp1",
+ "dap3_dout_pp2",
+ "dap3_sclk_pp3";
+ nvidia,function = "i2s2";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
+ /* GPIO power/drive control */
+ drive_i2c {
+ nvidia,pins = "drive_dbg",
+ "drive_at5",
+ "drive_gme",
+ "drive_ddc",
+ "drive_ao1";
+ nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
+ nvidia,schmitt = <TEGRA_PIN_ENABLE>;
+ nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
+ nvidia,pull-down-strength = <31>;
+ nvidia,pull-up-strength = <31>;
+ nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
+ nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
+ };
+
+ drive_uart3 {
+ nvidia,pins = "drive_uart3";
+ nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
+ nvidia,schmitt = <TEGRA_PIN_ENABLE>;
+ nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
+ nvidia,pull-down-strength = <31>;
+ nvidia,pull-up-strength = <31>;
+ nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
+ nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
+ };
+
+ drive_gmi {
+ nvidia,pins = "drive_at3";
+ nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
+ nvidia,schmitt = <TEGRA_PIN_ENABLE>;
+ nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
+ nvidia,pull-down-strength = <31>;
+ nvidia,pull-up-strength = <31>;
+ nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
+ nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
+ };
+ };
+ };
+
uartd: serial@70006300 {
status = "okay";
};
@@ -110,6 +955,7 @@
regulator-name = "vdd_ddr_rx";
regulator-min-microvolt = <2850000>;
regulator-max-microvolt = <2850000>;
+ regulator-boot-on;
};
};
};
@@ -152,6 +998,14 @@
dr_mode = "otg";
};
+ usb-phy@7d000000 {
+ status = "okay";
+ nvidia,hssync-start-delay = <0>;
+ nvidia,xcvr-lsfslew = <2>;
+ nvidia,xcvr-lsrslew = <2>;
+ vbus-supply = <&avdd_3v3_periph>;
+ };
+
/* PMIC has a built-in 32KHz oscillator which is used by PMC */
clk32k_in: clock-32k {
compatible = "fixed-clock";
diff --git a/arch/arm/dts/zynq-cc108.dts b/arch/arm/dts/zynq-cc108.dts
index 593ca4a..ec39aad 100644
--- a/arch/arm/dts/zynq-cc108.dts
+++ b/arch/arm/dts/zynq-cc108.dts
@@ -49,7 +49,6 @@
ethernet_phy: ethernet-phy@1 {
reg = <1>;
- device_type = "ethernet-phy";
};
};
diff --git a/arch/arm/dts/zynq-syzygy-hub.dts b/arch/arm/dts/zynq-syzygy-hub.dts
index 99f248d..1b3eddc 100644
--- a/arch/arm/dts/zynq-syzygy-hub.dts
+++ b/arch/arm/dts/zynq-syzygy-hub.dts
@@ -48,7 +48,6 @@
ethernet_phy: ethernet-phy@0 {
reg = <0>;
- device_type = "ethernet-phy";
};
};
diff --git a/arch/arm/dts/zynq-zc702.dts b/arch/arm/dts/zynq-zc702.dts
index 0106d7b..7864b4b 100644
--- a/arch/arm/dts/zynq-zc702.dts
+++ b/arch/arm/dts/zynq-zc702.dts
@@ -88,7 +88,6 @@
ethernet_phy: ethernet-phy@7 {
reg = <7>;
- device_type = "ethernet-phy";
};
};
@@ -295,7 +294,7 @@
};
};
- pinctrl_i2c0_gpio: i2c0-gpio {
+ pinctrl_i2c0_gpio: i2c0-gpio-grp {
mux {
groups = "gpio0_50_grp", "gpio0_51_grp";
function = "gpio0";
diff --git a/arch/arm/dts/zynq-zc706.dts b/arch/arm/dts/zynq-zc706.dts
index ceea982..bbdbf99 100644
--- a/arch/arm/dts/zynq-zc706.dts
+++ b/arch/arm/dts/zynq-zc706.dts
@@ -49,7 +49,6 @@
ethernet_phy: ethernet-phy@7 {
reg = <7>;
- device_type = "ethernet-phy";
};
};
diff --git a/arch/arm/dts/zynq-zc770-xm010.dts b/arch/arm/dts/zynq-zc770-xm010.dts
index 199384b..ff475f8 100644
--- a/arch/arm/dts/zynq-zc770-xm010.dts
+++ b/arch/arm/dts/zynq-zc770-xm010.dts
@@ -46,7 +46,6 @@
ethernet_phy: ethernet-phy@7 {
reg = <7>;
- device_type = "ethernet-phy";
};
};
diff --git a/arch/arm/dts/zynq-zc770-xm013.dts b/arch/arm/dts/zynq-zc770-xm013.dts
index add7599..02298b9 100644
--- a/arch/arm/dts/zynq-zc770-xm013.dts
+++ b/arch/arm/dts/zynq-zc770-xm013.dts
@@ -41,7 +41,6 @@
ethernet_phy: ethernet-phy@7 {
reg = <7>;
- device_type = "ethernet-phy";
};
};
diff --git a/arch/arm/dts/zynq-zed.dts b/arch/arm/dts/zynq-zed.dts
index 70bc418..1d967bd 100644
--- a/arch/arm/dts/zynq-zed.dts
+++ b/arch/arm/dts/zynq-zed.dts
@@ -44,7 +44,6 @@
ethernet_phy: ethernet-phy@0 {
reg = <0>;
- device_type = "ethernet-phy";
};
};
diff --git a/arch/arm/dts/zynq-zybo-z7.dts b/arch/arm/dts/zynq-zybo-z7.dts
index 83b8413..b621860 100644
--- a/arch/arm/dts/zynq-zybo-z7.dts
+++ b/arch/arm/dts/zynq-zybo-z7.dts
@@ -55,7 +55,6 @@
ethernet_phy: ethernet-phy@0 {
reg = <0>;
- device_type = "ethernet-phy";
};
};
diff --git a/arch/arm/dts/zynq-zybo.dts b/arch/arm/dts/zynq-zybo.dts
index 0ce5238..c3d9785 100644
--- a/arch/arm/dts/zynq-zybo.dts
+++ b/arch/arm/dts/zynq-zybo.dts
@@ -45,7 +45,6 @@
ethernet_phy: ethernet-phy@0 {
reg = <0>;
- device_type = "ethernet-phy";
};
};
diff --git a/arch/arm/dts/zynqmp-dlc21-revA.dts b/arch/arm/dts/zynqmp-dlc21-revA.dts
index f737004..2076271 100644
--- a/arch/arm/dts/zynqmp-dlc21-revA.dts
+++ b/arch/arm/dts/zynqmp-dlc21-revA.dts
@@ -43,13 +43,13 @@
reg = <0 0 0 0x80000000>, <0x8 0 0x3 0x80000000>;
};
- si5332_1: si5332_1 { /* clk0_sgmii - u142 */
+ si5332_1: si5332-1 { /* clk0_sgmii - u142 */
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <125000000>;
};
- si5332_2: si5332_2 { /* clk1_usb - u142 */
+ si5332_2: si5332-2 { /* clk1_usb - u142 */
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <26000000>;
@@ -155,7 +155,6 @@
/* u138 - TUSB320IRWBR - for USB-C */
};
-
&usb0 {
status = "okay";
};
diff --git a/arch/arm/dts/zynqmp-e-a2197-00-revA.dts b/arch/arm/dts/zynqmp-e-a2197-00-revA.dts
index bf7569c..f1b0a4a 100644
--- a/arch/arm/dts/zynqmp-e-a2197-00-revA.dts
+++ b/arch/arm/dts/zynqmp-e-a2197-00-revA.dts
@@ -43,7 +43,7 @@
reg = <0x0 0x0 0x0 0x80000000>;
};
- si5332_1: si5332_1 { /* u142 - GEM0 */
+ si5332_1: si5332-1 { /* u142 - GEM0 */
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <125000000>;
@@ -311,13 +311,7 @@
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
- clock_8t49n287: clock-generator@6c { /* u39 8T49N240 */
- #clock-cells = <1>; /* author David Cater <david.cater@idt.com>*/
- compatible = "idt,8t49n240", "idt,8t49n241"; /* FIXME no driver for 240 */
- reg = <0x6c>;
- /* Documentation/devicetree/bindings/clock/idt,idt8t49n24x.txt */
- /* FIXME there input via J241 Samtec CLK1 and CLK0 from U38 - selection PIN */
- };
+ /* u39 8T49N240 */
};
i2c@3 { /* PMBUS2_INA226 */
#address-cells = <1>;
diff --git a/arch/arm/dts/zynqmp-mini-emmc0.dts b/arch/arm/dts/zynqmp-mini-emmc0.dts
index 02e80bd..7823c58 100644
--- a/arch/arm/dts/zynqmp-mini-emmc0.dts
+++ b/arch/arm/dts/zynqmp-mini-emmc0.dts
@@ -35,7 +35,7 @@
bootph-all;
};
- clk_xin: clk_xin {
+ clk_xin: clk-xin {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <200000000>;
diff --git a/arch/arm/dts/zynqmp-mini-emmc1.dts b/arch/arm/dts/zynqmp-mini-emmc1.dts
index ce1cdb2..2f6ba95 100644
--- a/arch/arm/dts/zynqmp-mini-emmc1.dts
+++ b/arch/arm/dts/zynqmp-mini-emmc1.dts
@@ -35,7 +35,7 @@
bootph-all;
};
- clk_xin: clk_xin {
+ clk_xin: clk-xin {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <200000000>;
diff --git a/arch/arm/dts/zynqmp-mini-qspi.dts b/arch/arm/dts/zynqmp-mini-qspi.dts
index ee8be53..e35317f 100644
--- a/arch/arm/dts/zynqmp-mini-qspi.dts
+++ b/arch/arm/dts/zynqmp-mini-qspi.dts
@@ -53,7 +53,7 @@
#size-cells = <0>;
};
- misc_clk: misc_clk {
+ misc_clk: misc-clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <125000000>;
diff --git a/arch/arm/dts/zynqmp-p-a2197-00-revA.dts b/arch/arm/dts/zynqmp-p-a2197-00-revA.dts
index c456c37..5a60b86 100644
--- a/arch/arm/dts/zynqmp-p-a2197-00-revA.dts
+++ b/arch/arm/dts/zynqmp-p-a2197-00-revA.dts
@@ -43,13 +43,13 @@
reg = <0x0 0x0 0x0 0x80000000>;
};
- si5332_1: si5332_1 { /* clk0_sgmii - u142 */
+ si5332_1: si5332-1 { /* clk0_sgmii - u142 */
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <125000000>;
};
- si5332_2: si5332_2 { /* clk1_usb - u142 */
+ si5332_2: si5332-2 { /* clk1_usb - u142 */
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <27000000>;
@@ -532,15 +532,7 @@
/* u36 0xd8 or 0xde - pcie clk buf - 9ZML1241EKILF PCIe GEN 4 CLOCK BUFFER FIXME - no driver */
/* u37 0xd0 DNP - pcie clocking 1 - 9FGV1006BQ505LTGI - PCIe GEN 4 CLOCK GENERATOR FIXME - no linux driver */
/* u38 0xca - pcie clocking 2 - 9ZML1241EKILF PCIe GEN 4 CLOCK BUFFER FIXME - no driver */
- clock_8t49n287: clock-generator@60 { /* u39 8T49N240 - pcie clocking 3 */
- #clock-cells = <1>; /* author David Cater <david.cater@idt.com>*/
- compatible = "idt,8t49n240", "idt,8t49n241"; /* FIXME no driver for 240 */
- reg = <0x60>;
- /* Documentation/devicetree/bindings/clock/idt,idt8t49n24x.txt */
- /* FIXME there input via J241 Samtec CLK1 and CLK0 from U38 - selection PIN */
-
- };
-
+ /* u39 8T49N240 - pcie clocking 3 */
};
};
};
diff --git a/arch/arm/dts/zynqmp-sc-revB.dts b/arch/arm/dts/zynqmp-sc-revB.dts
index e0b554c..8517bda 100644
--- a/arch/arm/dts/zynqmp-sc-revB.dts
+++ b/arch/arm/dts/zynqmp-sc-revB.dts
@@ -71,7 +71,7 @@
};
};
- si5332_2: si5332_2 { /* u42 */
+ si5332_2: si5332-2 { /* u42 */
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <26000000>;
@@ -344,7 +344,7 @@
};
};
- pinctrl_i2c0_gpio: i2c0-gpio {
+ pinctrl_i2c0_gpio: i2c0-gpio-grp {
mux {
groups = "gpio0_34_grp", "gpio0_35_grp";
function = "gpio0";
@@ -371,7 +371,7 @@
};
};
- pinctrl_i2c1_gpio: i2c1-gpio {
+ pinctrl_i2c1_gpio: i2c1-gpio-grp {
conf {
groups = "gpio0_24_grp", "gpio0_25_grp";
slew-rate = <SLEW_RATE_SLOW>;
diff --git a/arch/arm/dts/zynqmp-sc-vpk120-revB.dtso b/arch/arm/dts/zynqmp-sc-vpk120-revB.dtso
index 750bc39..853d981 100644
--- a/arch/arm/dts/zynqmp-sc-vpk120-revB.dtso
+++ b/arch/arm/dts/zynqmp-sc-vpk120-revB.dtso
@@ -13,7 +13,6 @@
/dts-v1/;
/plugin/;
-
&{/} {
compatible = "xlnx,zynqmp-sc-vpk120-revB", "xlnx,zynqmp-vpk120-revB",
"xlnx,zynqmp-vpk120", "xlnx,zynqmp";
diff --git a/arch/arm/dts/zynqmp-sc-vpk180-revA.dtso b/arch/arm/dts/zynqmp-sc-vpk180-revA.dtso
index 551341f..1862593 100644
--- a/arch/arm/dts/zynqmp-sc-vpk180-revA.dtso
+++ b/arch/arm/dts/zynqmp-sc-vpk180-revA.dtso
@@ -13,7 +13,6 @@
/dts-v1/;
/plugin/;
-
&{/} {
compatible = "xlnx,zynqmp-sc-vpk180-revA", "xlnx,zynqmp-vpk180-revA",
"xlnx,zynqmp-vpk180", "xlnx,zynqmp";
diff --git a/arch/arm/dts/zynqmp-sc-vpk180-revB.dtso b/arch/arm/dts/zynqmp-sc-vpk180-revB.dtso
index e70eb4d..3990d05 100644
--- a/arch/arm/dts/zynqmp-sc-vpk180-revB.dtso
+++ b/arch/arm/dts/zynqmp-sc-vpk180-revB.dtso
@@ -13,7 +13,6 @@
/dts-v1/;
/plugin/;
-
&{/} {
compatible = "xlnx,zynqmp-sc-vpk180-revB", "xlnx,zynqmp-vpk180-revB",
"xlnx,zynqmp-vpk180", "xlnx,zynqmp";
diff --git a/arch/arm/dts/zynqmp-sck-kd-g-revA.dtso b/arch/arm/dts/zynqmp-sck-kd-g-revA.dtso
index 5a5c1ef..766f783 100644
--- a/arch/arm/dts/zynqmp-sck-kd-g-revA.dtso
+++ b/arch/arm/dts/zynqmp-sck-kd-g-revA.dtso
@@ -87,7 +87,7 @@
phys = <&psgtr 2 PHY_TYPE_USB3 0 2>;
reset-gpios = <&slg7xl45106 0 GPIO_ACTIVE_LOW>;
assigned-clock-rates = <250000000>, <20000000>;
-
+#if 0
usbhub0: usb-hub { /* u36 */
i2c-bus = <&i2c1>;
compatible = "microchip,usb5744";
@@ -98,6 +98,7 @@
compatible = "microchip,usb2244";
reset-gpios = <&slg7xl45106 2 GPIO_ACTIVE_LOW>;
};
+#endif
};
&dwc3_0 {
@@ -119,6 +120,8 @@
#address-cells = <1>;
#size-cells = <0>;
phy0: ethernet-phy@8 { /* Adin u31 */
+ #phy-cells = <1>;
+ compatible = "ethernet-phy-id0283.bc30";
reg = <8>;
adi,rx-internal-delay-ps = <2000>;
adi,tx-internal-delay-ps = <2000>;
@@ -222,7 +225,7 @@
};
};
- pinctrl_i2c1_gpio: i2c1-gpio {
+ pinctrl_i2c1_gpio: i2c1-gpio-grp {
conf {
groups = "gpio0_24_grp", "gpio0_25_grp";
slew-rate = <SLEW_RATE_SLOW>;
diff --git a/arch/arm/dts/zynqmp-sck-kr-g-revA.dtso b/arch/arm/dts/zynqmp-sck-kr-g-revA.dtso
index 30a0230..7717abf 100644
--- a/arch/arm/dts/zynqmp-sck-kr-g-revA.dtso
+++ b/arch/arm/dts/zynqmp-sck-kr-g-revA.dtso
@@ -25,37 +25,37 @@
io-channels = <&u14 0>, <&u14 1>, <&u14 2>;
};
- si5332_0: si5332_0 { /* u17 - GEM0/1 */
+ si5332_0: si5332-0 { /* u17 - GEM0/1 */
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <125000000>;
};
- si5332_1: si5332_1 { /* u17 - DP */
+ si5332_1: si5332-1 { /* u17 - DP */
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <27000000>;
};
- si5332_2: si5332_2 { /* u17 - USB */
+ si5332_2: si5332-2 { /* u17 - USB */
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <26000000>;
};
- si5332_3: si5332_3 { /* u17 - SFP+ */
+ si5332_3: si5332-3 { /* u17 - SFP+ */
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <156250000>;
};
- si5332_4: si5332_4 { /* u17 - GEM2 */
+ si5332_4: si5332-4 { /* u17 - GEM2 */
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <25000000>;
};
- si5332_5: si5332_5 { /* u17 - GEM3 */
+ si5332_5: si5332-5 { /* u17 - GEM3 */
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <25000000>;
@@ -139,7 +139,7 @@
phys = <&psgtr 2 PHY_TYPE_USB3 0 2>;
reset-gpios = <&slg7xl45106 0 GPIO_ACTIVE_LOW>;
assigned-clock-rates = <250000000>, <20000000>;
-
+#if 0
usbhub0: usb-hub { /* u43 */
i2c-bus = <&usbhub_i2c0>;
compatible = "microchip,usb5744";
@@ -150,6 +150,7 @@
compatible = "microchip,usb2244";
reset-gpios = <&slg7xl45106 2 GPIO_ACTIVE_LOW>;
};
+#endif
};
&dwc3_0 {
@@ -273,7 +274,7 @@
};
};
- pinctrl_i2c1_gpio: i2c1-gpio {
+ pinctrl_i2c1_gpio: i2c1-gpio-grp {
conf {
groups = "gpio0_24_grp", "gpio0_25_grp";
slew-rate = <SLEW_RATE_SLOW>;
diff --git a/arch/arm/dts/zynqmp-sck-kr-g-revB.dtso b/arch/arm/dts/zynqmp-sck-kr-g-revB.dtso
index 8f4c52d..2118739 100644
--- a/arch/arm/dts/zynqmp-sck-kr-g-revB.dtso
+++ b/arch/arm/dts/zynqmp-sck-kr-g-revB.dtso
@@ -139,7 +139,7 @@
phys = <&psgtr 2 PHY_TYPE_USB3 0 2>;
reset-gpios = <&slg7xl45106 0 GPIO_ACTIVE_LOW>;
assigned-clock-rates = <250000000>, <20000000>;
-
+#if 0
usbhub0: usb-hub { /* u43 */
i2c-bus = <&usbhub_i2c0>;
compatible = "microchip,usb5744";
@@ -150,6 +150,7 @@
compatible = "microchip,usb2244";
reset-gpios = <&slg7xl45106 2 GPIO_ACTIVE_LOW>;
};
+#endif
};
&dwc3_0 {
@@ -273,7 +274,7 @@
};
};
- pinctrl_i2c1_gpio: i2c1-gpio {
+ pinctrl_i2c1_gpio: i2c1-gpio-grp {
conf {
groups = "gpio0_24_grp", "gpio0_25_grp";
slew-rate = <SLEW_RATE_SLOW>;
diff --git a/arch/arm/dts/zynqmp-sck-kv-g-revA.dtso b/arch/arm/dts/zynqmp-sck-kv-g-revA.dtso
index c4f1da9..6d0d5c4 100644
--- a/arch/arm/dts/zynqmp-sck-kv-g-revA.dtso
+++ b/arch/arm/dts/zynqmp-sck-kv-g-revA.dtso
@@ -27,6 +27,47 @@
"xlnx,zynqmp-sk-kv260-revZ",
"xlnx,zynqmp-sk-kv260", "xlnx,zynqmp";
model = "ZynqMP KV260 revA";
+
+ ina260-u14 {
+ compatible = "iio-hwmon";
+ io-channels = <&u14 0>, <&u14 1>, <&u14 2>;
+ };
+
+ si5332_0: si5332-0 { /* u17 */
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <125000000>;
+ };
+
+ si5332_1: si5332-1 { /* u17 */
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <25000000>;
+ };
+
+ si5332_2: si5332-2 { /* u17 */
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <48000000>;
+ };
+
+ si5332_3: si5332-3 { /* u17 */
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <24000000>;
+ };
+
+ si5332_4: si5332-4 { /* u17 */
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <26000000>;
+ };
+
+ si5332_5: si5332-5 { /* u17 */
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <27000000>;
+ };
};
&i2c1 { /* I2C_SCK C23/C24 - MIO from SOM */
@@ -47,49 +88,6 @@
/* u27 - 0xe0 - STDP4320 DP/HDMI splitter */
};
-&amba {
- ina260-u14 {
- compatible = "iio-hwmon";
- io-channels = <&u14 0>, <&u14 1>, <&u14 2>;
- };
-
- si5332_0: si5332_0 { /* u17 */
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <125000000>;
- };
-
- si5332_1: si5332_1 { /* u17 */
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <25000000>;
- };
-
- si5332_2: si5332_2 { /* u17 */
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <48000000>;
- };
-
- si5332_3: si5332_3 { /* u17 */
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <24000000>;
- };
-
- si5332_4: si5332_4 { /* u17 */
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <26000000>;
- };
-
- si5332_5: si5332_5 { /* u17 */
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <27000000>;
- };
-};
-
/* DP/USB 3.0 and SATA */
&psgtr {
status = "okay";
@@ -131,10 +129,12 @@
pinctrl-0 = <&pinctrl_usb0_default>;
phy-names = "usb3-phy";
phys = <&psgtr 2 PHY_TYPE_USB3 0 1>;
+#if 0
usbhub: usb5744 { /* u43 */
compatible = "microchip,usb5744";
reset-gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
};
+#endif
};
&dwc3_0 {
@@ -248,7 +248,7 @@
};
};
- pinctrl_i2c1_gpio: i2c1-gpio {
+ pinctrl_i2c1_gpio: i2c1-gpio-grp {
conf {
groups = "gpio0_24_grp", "gpio0_25_grp";
slew-rate = <SLEW_RATE_SLOW>;
diff --git a/arch/arm/dts/zynqmp-sck-kv-g-revB.dtso b/arch/arm/dts/zynqmp-sck-kv-g-revB.dtso
index 6c5e0e5..a4b4465 100644
--- a/arch/arm/dts/zynqmp-sck-kv-g-revB.dtso
+++ b/arch/arm/dts/zynqmp-sck-kv-g-revB.dtso
@@ -22,6 +22,47 @@
"xlnx,zynqmp-sk-kv260-revB",
"xlnx,zynqmp-sk-kv260", "xlnx,zynqmp";
model = "ZynqMP KV260 revB";
+
+ ina260-u14 {
+ compatible = "iio-hwmon";
+ io-channels = <&u14 0>, <&u14 1>, <&u14 2>;
+ };
+
+ si5332_0: si5332-0 { /* u17 */
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <125000000>;
+ };
+
+ si5332_1: si5332-1 { /* u17 */
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <25000000>;
+ };
+
+ si5332_2: si5332-2 { /* u17 */
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <48000000>;
+ };
+
+ si5332_3: si5332-3 { /* u17 */
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <24000000>;
+ };
+
+ si5332_4: si5332-4 { /* u17 */
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <26000000>;
+ };
+
+ si5332_5: si5332-5 { /* u17 */
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <27000000>;
+ };
};
&i2c1 { /* I2C_SCK C23/C24 - MIO from SOM */
@@ -43,49 +84,6 @@
/* u27 - 0xe0 - STDP4320 DP/HDMI splitter */
};
-&amba {
- ina260-u14 {
- compatible = "iio-hwmon";
- io-channels = <&u14 0>, <&u14 1>, <&u14 2>;
- };
-
- si5332_0: si5332_0 { /* u17 */
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <125000000>;
- };
-
- si5332_1: si5332_1 { /* u17 */
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <25000000>;
- };
-
- si5332_2: si5332_2 { /* u17 */
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <48000000>;
- };
-
- si5332_3: si5332_3 { /* u17 */
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <24000000>;
- };
-
- si5332_4: si5332_4 { /* u17 */
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <26000000>;
- };
-
- si5332_5: si5332_5 { /* u17 */
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <27000000>;
- };
-};
-
/* DP/USB 3.0 */
&psgtr {
status = "okay";
@@ -113,13 +111,14 @@
phy-names = "usb3-phy";
phys = <&psgtr 2 PHY_TYPE_USB3 0 1>;
assigned-clock-rates = <250000000>, <20000000>;
-
+#if 0
usb5744: usb-hub { /* u43 */
status = "okay";
compatible = "microchip,usb5744";
i2c-bus = <&i2c1>;
reset-gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
};
+#endif
};
&dwc3_0 {
@@ -236,7 +235,7 @@
};
};
- pinctrl_i2c1_gpio: i2c1-gpio {
+ pinctrl_i2c1_gpio: i2c1-gpio-grp {
conf {
groups = "gpio0_24_grp", "gpio0_25_grp";
slew-rate = <SLEW_RATE_SLOW>;
diff --git a/arch/arm/dts/zynqmp-sm-k26-revA.dts b/arch/arm/dts/zynqmp-sm-k26-revA.dts
index 1d62c48..5859e6c 100644
--- a/arch/arm/dts/zynqmp-sm-k26-revA.dts
+++ b/arch/arm/dts/zynqmp-sm-k26-revA.dts
@@ -144,7 +144,7 @@
&qspi { /* MIO 0-5 - U143 */
status = "okay";
spi_flash: flash@0 { /* MT25QU512A */
- compatible = "mt25qu512a", "jedec,spi-nor"; /* 64MB */
+ compatible = "jedec,spi-nor"; /* 64MB */
reg = <0>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
diff --git a/arch/arm/dts/zynqmp-vp-x-a2785-00-revA.dts b/arch/arm/dts/zynqmp-vp-x-a2785-00-revA.dts
index 9ab8f5b..2a3bbe1 100644
--- a/arch/arm/dts/zynqmp-vp-x-a2785-00-revA.dts
+++ b/arch/arm/dts/zynqmp-vp-x-a2785-00-revA.dts
@@ -65,19 +65,19 @@
};
};
- si5332_0: si5332_0 { /* ps_ref_clk - u142 */
+ si5332_0: si5332-0 { /* ps_ref_clk - u142 */
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <33333333>;
};
- si5332_1: si5332_1 { /* clk0_sgmii - u142 */
+ si5332_1: si5332-1 { /* clk0_sgmii - u142 */
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <33333333>; /* FIXME */
};
- si5332_2: si5332_2 { /* clk1_usb - u142 */
+ si5332_2: si5332-2 { /* clk1_usb - u142 */
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <27000000>;
@@ -400,7 +400,7 @@
};
};
- pinctrl_i2c0_gpio: i2c0-gpio {
+ pinctrl_i2c0_gpio: i2c0-gpio-grp {
mux {
groups = "gpio0_34_grp", "gpio0_35_grp";
function = "gpio0";
@@ -427,7 +427,7 @@
};
};
- pinctrl_i2c1_gpio: i2c1-gpio {
+ pinctrl_i2c1_gpio: i2c1-gpio-grp {
mux {
groups = "gpio0_36_grp", "gpio0_37_grp";
function = "gpio0";
diff --git a/arch/arm/dts/zynqmp-vpk120-revA.dts b/arch/arm/dts/zynqmp-vpk120-revA.dts
index ce76e0b..e0e4f1b 100644
--- a/arch/arm/dts/zynqmp-vpk120-revA.dts
+++ b/arch/arm/dts/zynqmp-vpk120-revA.dts
@@ -65,19 +65,19 @@
};
};
- si5332_0: si5332_0 { /* ps_ref_clk */
+ si5332_0: si5332-0 { /* ps_ref_clk */
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <33333333>;
};
- si5332_1: si5332_1 { /* clk0_sgmii */
+ si5332_1: si5332-1 { /* clk0_sgmii */
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <33333333>; /* FIXME */
};
- si5332_2: si5332_2 { /* clk1_usb */
+ si5332_2: si5332-2 { /* clk1_usb */
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <27000000>;
@@ -536,7 +536,7 @@
};
};
- pinctrl_i2c0_gpio: i2c0-gpio {
+ pinctrl_i2c0_gpio: i2c0-gpio-grp {
mux {
groups = "gpio0_34_grp", "gpio0_35_grp";
function = "gpio0";
@@ -563,7 +563,7 @@
};
};
- pinctrl_i2c1_gpio: i2c1-gpio {
+ pinctrl_i2c1_gpio: i2c1-gpio-grp {
mux {
groups = "gpio0_36_grp", "gpio0_37_grp";
function = "gpio0";
diff --git a/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts b/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts
index e72ed50..27b38e9 100644
--- a/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts
+++ b/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts
@@ -148,7 +148,7 @@
};
};
- pinctrl_i2c1_gpio: i2c1-gpio {
+ pinctrl_i2c1_gpio: i2c1-gpio-grp {
mux {
groups = "gpio0_36_grp", "gpio0_37_grp";
function = "gpio0";
diff --git a/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts b/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts
index 160c6c5..ff7069b 100644
--- a/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts
+++ b/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts
@@ -273,7 +273,7 @@
};
};
- pinctrl_i2c0_gpio: i2c0-gpio {
+ pinctrl_i2c0_gpio: i2c0-gpio-grp {
mux {
groups = "gpio0_6_grp", "gpio0_7_grp";
function = "gpio0";
diff --git a/arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts b/arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts
index b1857e1..53aa3dc 100644
--- a/arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts
+++ b/arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts
@@ -125,7 +125,7 @@
};
};
- pinctrl_i2c0_gpio: i2c0-gpio {
+ pinctrl_i2c0_gpio: i2c0-gpio-grp {
mux {
groups = "gpio0_74_grp", "gpio0_75_grp";
function = "gpio0";
@@ -152,7 +152,7 @@
};
};
- pinctrl_i2c1_gpio: i2c1-gpio {
+ pinctrl_i2c1_gpio: i2c1-gpio-grp {
mux {
groups = "gpio0_76_grp", "gpio0_77_grp";
function = "gpio0";
diff --git a/arch/arm/dts/zynqmp-zcu100-revC.dts b/arch/arm/dts/zynqmp-zcu100-revC.dts
index 44d1b24..c594506 100644
--- a/arch/arm/dts/zynqmp-zcu100-revC.dts
+++ b/arch/arm/dts/zynqmp-zcu100-revC.dts
@@ -103,15 +103,6 @@
};
};
- ltc2954: ltc2954 { /* U7 */
- compatible = "lltc,ltc2954", "lltc,ltc2952";
- status = "disabled";
- trigger-gpios = <&gpio 26 GPIO_ACTIVE_LOW>; /* INT line - input */
- /* If there is HW watchdog on mezzanine this signal should be connected there */
- watchdog-gpios = <&gpio 35 GPIO_ACTIVE_HIGH>; /* MIO on PAD */
- kill-gpios = <&gpio 34 GPIO_ACTIVE_LOW>; /* KILL signal - output */
- };
-
wmmcsdio_fixed: fixedregulator-mmcsdio {
compatible = "regulator-fixed";
regulator-name = "wmmcsdio_fixed";
@@ -284,7 +275,7 @@
};
};
- pinctrl_i2c1_gpio: i2c1-gpio {
+ pinctrl_i2c1_gpio: i2c1-gpio-grp {
mux {
groups = "gpio0_4_grp", "gpio0_5_grp";
function = "gpio0";
diff --git a/arch/arm/dts/zynqmp-zcu102-revA.dts b/arch/arm/dts/zynqmp-zcu102-revA.dts
index e166c95..3132fa5 100644
--- a/arch/arm/dts/zynqmp-zcu102-revA.dts
+++ b/arch/arm/dts/zynqmp-zcu102-revA.dts
@@ -708,7 +708,7 @@
};
};
- pinctrl_i2c0_gpio: i2c0-gpio {
+ pinctrl_i2c0_gpio: i2c0-gpio-grp {
mux {
groups = "gpio0_14_grp", "gpio0_15_grp";
function = "gpio0";
@@ -735,7 +735,7 @@
};
};
- pinctrl_i2c1_gpio: i2c1-gpio {
+ pinctrl_i2c1_gpio: i2c1-gpio-grp {
mux {
groups = "gpio0_16_grp", "gpio0_17_grp";
function = "gpio0";
diff --git a/arch/arm/dts/zynqmp-zcu104-revA.dts b/arch/arm/dts/zynqmp-zcu104-revA.dts
index cdfeea2..31effbf 100644
--- a/arch/arm/dts/zynqmp-zcu104-revA.dts
+++ b/arch/arm/dts/zynqmp-zcu104-revA.dts
@@ -272,7 +272,7 @@
};
};
- pinctrl_i2c1_gpio: i2c1-gpio {
+ pinctrl_i2c1_gpio: i2c1-gpio-grp {
mux {
groups = "gpio0_16_grp", "gpio0_17_grp";
function = "gpio0";
diff --git a/arch/arm/dts/zynqmp-zcu104-revC.dts b/arch/arm/dts/zynqmp-zcu104-revC.dts
index 4b942ac..999b243 100644
--- a/arch/arm/dts/zynqmp-zcu104-revC.dts
+++ b/arch/arm/dts/zynqmp-zcu104-revC.dts
@@ -284,7 +284,7 @@
};
};
- pinctrl_i2c1_gpio: i2c1-gpio {
+ pinctrl_i2c1_gpio: i2c1-gpio-grp {
mux {
groups = "gpio0_16_grp", "gpio0_17_grp";
function = "gpio0";
diff --git a/arch/arm/dts/zynqmp-zcu106-revA.dts b/arch/arm/dts/zynqmp-zcu106-revA.dts
index b90ff61..ba3989c 100644
--- a/arch/arm/dts/zynqmp-zcu106-revA.dts
+++ b/arch/arm/dts/zynqmp-zcu106-revA.dts
@@ -719,7 +719,7 @@
};
};
- pinctrl_i2c0_gpio: i2c0-gpio {
+ pinctrl_i2c0_gpio: i2c0-gpio-grp {
mux {
groups = "gpio0_14_grp", "gpio0_15_grp";
function = "gpio0";
@@ -746,7 +746,7 @@
};
};
- pinctrl_i2c1_gpio: i2c1-gpio {
+ pinctrl_i2c1_gpio: i2c1-gpio-grp {
mux {
groups = "gpio0_16_grp", "gpio0_17_grp";
function = "gpio0";
diff --git a/arch/arm/dts/zynqmp-zcu111-revA.dts b/arch/arm/dts/zynqmp-zcu111-revA.dts
index ba9e489..787cf0d 100644
--- a/arch/arm/dts/zynqmp-zcu111-revA.dts
+++ b/arch/arm/dts/zynqmp-zcu111-revA.dts
@@ -589,7 +589,7 @@
};
};
- pinctrl_i2c0_gpio: i2c0-gpio {
+ pinctrl_i2c0_gpio: i2c0-gpio-grp {
mux {
groups = "gpio0_14_grp", "gpio0_15_grp";
function = "gpio0";
@@ -616,7 +616,7 @@
};
};
- pinctrl_i2c1_gpio: i2c1-gpio {
+ pinctrl_i2c1_gpio: i2c1-gpio-grp {
mux {
groups = "gpio0_16_grp", "gpio0_17_grp";
function = "gpio0";
diff --git a/arch/arm/dts/zynqmp-zcu1285-revA.dts b/arch/arm/dts/zynqmp-zcu1285-revA.dts
index 4f85837..38735b1 100644
--- a/arch/arm/dts/zynqmp-zcu1285-revA.dts
+++ b/arch/arm/dts/zynqmp-zcu1285-revA.dts
@@ -37,26 +37,6 @@
reg = <0x0 0x0 0x0 0x80000000>;
};
- ina226-u60 {
- compatible = "iio-hwmon";
- io-channels = <&u60 0>, <&u60 1>, <&u60 2>, <&u60 3>;
- };
- ina226-u61 {
- compatible = "iio-hwmon";
- io-channels = <&u61 0>, <&u61 1>, <&u61 2>, <&u61 3>;
- };
- ina226-u63 {
- compatible = "iio-hwmon";
- io-channels = <&u63 0>, <&u63 1>, <&u63 2>, <&u63 3>;
- };
- ina226-u65 {
- compatible = "iio-hwmon";
- io-channels = <&u65 0>, <&u65 1>, <&u65 2>, <&u65 3>;
- };
- ina226-u64 {
- compatible = "iio-hwmon";
- io-channels = <&u64 0>, <&u64 1>, <&u64 2>, <&u64 3>;
- };
};
&dcc {
@@ -67,160 +47,6 @@
status = "okay";
clock-frequency = <400000>;
- i2c-mux@75 {
- compatible = "nxp,pca9548"; /* u22 */
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0x75>;
-
- i2c@0 {
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0>;
- /* PMBUS */
- max20751@74 { /* u23 */
- compatible = "maxim,max20751";
- reg = <0x74>;
- };
- max20751@70 { /* u89 */
- compatible = "maxim,max20751";
- reg = <0x70>;
- };
- max15301@a { /* u28 */
- compatible = "maxim,max15301";
- reg = <0xa>;
- };
- max15303@b { /* u48 */
- compatible = "maxim,max15303";
- reg = <0xb>;
- };
- max15303@d { /* u27 */
- compatible = "maxim,max15303";
- reg = <0xd>;
- };
- max15303@e { /* u11 */
- compatible = "maxim,max15303";
- reg = <0xe>;
- };
- max15303@f { /* u96 */
- compatible = "maxim,max15303";
- reg = <0xf>;
- };
- max15303@11 { /* u47 */
- compatible = "maxim,max15303";
- reg = <0x11>;
- };
- max15303@12 { /* u24 */
- compatible = "maxim,max15303";
- reg = <0x12>;
- };
- max15301@13 { /* u29 */
- compatible = "maxim,max15301";
- reg = <0x13>;
- };
- max15303@14 { /* u51 */
- compatible = "maxim,max15303";
- reg = <0x14>;
- };
- max15303@15 { /* u30 */
- compatible = "maxim,max15303";
- reg = <0x15>;
- };
- max15303@16 { /* u102 */
- compatible = "maxim,max15303";
- reg = <0x16>;
- };
- max15301@17 { /* u50 */
- compatible = "maxim,max15301";
- reg = <0x17>;
- };
- max15301@18 { /* u31 */
- compatible = "maxim,max15301";
- reg = <0x18>;
- };
- };
- i2c@1 {
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <1>;
- /* CM_I2C */
- };
- i2c@2 {
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <2>;
- /* SYS_EEPROM */
- eeprom: eeprom@54 { /* u101 */
- compatible = "atmel,24c32"; /* 24LC32A */
- reg = <0x54>;
- };
- };
- i2c@3 {
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <3>;
- /* FMC1 */
- };
- i2c@4 {
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <4>;
- /* FMC2 */
- };
- i2c@5 {
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <5>;
- /* ANALOG_PMBUS */
- u60: ina226@40 { /* u60 */
- compatible = "ti,ina226";
- #io-channel-cells = <1>;
- label = "ina226-u60";
- reg = <0x40>;
- shunt-resistor = <1000>;
- };
- u61: ina226@41 { /* u61 */
- compatible = "ti,ina226";
- #io-channel-cells = <1>;
- label = "ina226-u61";
- reg = <0x41>;
- shunt-resistor = <1000>;
- };
- u63: ina226@42 { /* u63 */
- compatible = "ti,ina226";
- #io-channel-cells = <1>;
- label = "ina226-u63";
- reg = <0x42>;
- shunt-resistor = <1000>;
- };
- u65: ina226@43 { /* u65 */
- compatible = "ti,ina226";
- #io-channel-cells = <1>;
- label = "ina226-u65";
- reg = <0x43>;
- shunt-resistor = <1000>;
- };
- u64: ina226@44 { /* u64 */
- compatible = "ti,ina226";
- #io-channel-cells = <1>;
- label = "ina226-u64";
- reg = <0x44>;
- shunt-resistor = <1000>;
- };
- };
- i2c@6 {
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <6>;
- /* ANALOG_CM_I2C */
- };
- i2c@7 {
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <7>;
- /* FMC3 */
- };
- };
};
&gem1 {
diff --git a/arch/arm/dts/zynqmp-zcu208-revA.dts b/arch/arm/dts/zynqmp-zcu208-revA.dts
index 22ad8d3..b4e2474 100644
--- a/arch/arm/dts/zynqmp-zcu208-revA.dts
+++ b/arch/arm/dts/zynqmp-zcu208-revA.dts
@@ -600,7 +600,7 @@
};
};
- pinctrl_i2c0_gpio: i2c0-gpio {
+ pinctrl_i2c0_gpio: i2c0-gpio-grp {
mux {
groups = "gpio0_14_grp", "gpio0_15_grp";
function = "gpio0";
@@ -627,7 +627,7 @@
};
};
- pinctrl_i2c1_gpio: i2c1-gpio {
+ pinctrl_i2c1_gpio: i2c1-gpio-grp {
mux {
groups = "gpio0_16_grp", "gpio0_17_grp";
function = "gpio0";
diff --git a/arch/arm/dts/zynqmp-zcu216-revA.dts b/arch/arm/dts/zynqmp-zcu216-revA.dts
index 575ff5b..6f593e8 100644
--- a/arch/arm/dts/zynqmp-zcu216-revA.dts
+++ b/arch/arm/dts/zynqmp-zcu216-revA.dts
@@ -610,7 +610,7 @@
};
};
- pinctrl_i2c0_gpio: i2c0-gpio {
+ pinctrl_i2c0_gpio: i2c0-gpio-grp {
mux {
groups = "gpio0_14_grp", "gpio0_15_grp";
function = "gpio0";
@@ -637,7 +637,7 @@
};
};
- pinctrl_i2c1_gpio: i2c1-gpio {
+ pinctrl_i2c1_gpio: i2c1-gpio-grp {
mux {
groups = "gpio0_16_grp", "gpio0_17_grp";
function = "gpio0";
diff --git a/arch/arm/dts/zynqmp-zcu670-revA.dts b/arch/arm/dts/zynqmp-zcu670-revA.dts
index edbbf0b..7f70904 100644
--- a/arch/arm/dts/zynqmp-zcu670-revA.dts
+++ b/arch/arm/dts/zynqmp-zcu670-revA.dts
@@ -131,7 +131,7 @@
clock-frequency = <48000000>;
};
- si5381_6: si5381_6 { /* refclk_usb3 - u43 */
+ si5381_6: si5381-6 { /* refclk_usb3 - u43 */
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <26000000>;
@@ -573,7 +573,7 @@
};
};
- pinctrl_i2c0_gpio: i2c0-gpio {
+ pinctrl_i2c0_gpio: i2c0-gpio-grp {
mux {
groups = "gpio0_14_grp", "gpio0_15_grp";
function = "gpio0";
@@ -600,7 +600,7 @@
};
};
- pinctrl_i2c1_gpio: i2c1-gpio {
+ pinctrl_i2c1_gpio: i2c1-gpio-grp {
mux {
groups = "gpio0_16_grp", "gpio0_17_grp";
function = "gpio0";
diff --git a/arch/arm/dts/zynqmp-zcu670-revB.dts b/arch/arm/dts/zynqmp-zcu670-revB.dts
index 97599c5..0adb206 100644
--- a/arch/arm/dts/zynqmp-zcu670-revB.dts
+++ b/arch/arm/dts/zynqmp-zcu670-revB.dts
@@ -131,7 +131,7 @@
clock-frequency = <48000000>;
};
- si5381_6: si5381_6 { /* refclk_usb3 - u43 */
+ si5381_6: si5381-6 { /* refclk_usb3 - u43 */
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <26000000>;
@@ -573,7 +573,7 @@
};
};
- pinctrl_i2c0_gpio: i2c0-gpio {
+ pinctrl_i2c0_gpio: i2c0-gpio-grp {
mux {
groups = "gpio0_14_grp", "gpio0_15_grp";
function = "gpio0";
@@ -600,7 +600,7 @@
};
};
- pinctrl_i2c1_gpio: i2c1-gpio {
+ pinctrl_i2c1_gpio: i2c1-gpio-grp {
mux {
groups = "gpio0_16_grp", "gpio0_17_grp";
function = "gpio0";
diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi
index 58a56bc..63238c0 100644
--- a/arch/arm/dts/zynqmp.dtsi
+++ b/arch/arm/dts/zynqmp.dtsi
@@ -148,6 +148,7 @@
ipi_mailbox_pmu1: mailbox@ff9905c0 {
bootph-all;
+ compatible = "xlnx,zynqmp-ipi-dest-mailbox";
reg = <0x0 0xff9905c0 0x0 0x20>,
<0x0 0xff9905e0 0x0 0x20>,
<0x0 0xff990e80 0x0 0x20>,
@@ -197,7 +198,7 @@
method = "smc";
bootph-all;
- zynqmp_power: zynqmp-power {
+ zynqmp_power: power-management {
bootph-all;
compatible = "xlnx,zynqmp-power";
interrupt-parent = <&gic>;
@@ -257,12 +258,18 @@
efuse_spkid: efuse-spkid@5c {
reg = <0x5c 0x4>;
};
+ efuse_aeskey: efuse-aeskey@60 {
+ reg = <0x60 0x20>;
+ };
efuse_ppk0hash: efuse-ppk0hash@a0 {
reg = <0xa0 0x30>;
};
efuse_ppk1hash: efuse-ppk1hash@d0 {
reg = <0xd0 0x30>;
};
+ efuse_pufuser: efuse-pufuser@100 {
+ reg = <0x100 0x7F>;
+ };
};
zynqmp_pcap: pcap {
@@ -736,7 +743,7 @@
compatible = "xlnx,zynqmp-ocmc-1.0";
reg = <0x0 0xff960000 0x0 0x1000>;
interrupt-parent = <&gic>;
- interrupts = <0 10 4>;
+ interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
};
pcie: pcie@fd0e0000 {
@@ -995,7 +1002,7 @@
status = "disabled";
reg = <0x0 0xfe200000 0x0 0x40000>;
interrupt-parent = <&gic>;
- interrupt-names = "dwc_usb3", "otg", "hiber";
+ interrupt-names = "host", "peripheral", "otg";
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
@@ -1027,7 +1034,7 @@
status = "disabled";
reg = <0x0 0xfe300000 0x0 0x40000>;
interrupt-parent = <&gic>;
- interrupt-names = "dwc_usb3", "otg", "hiber";
+ interrupt-names = "host", "peripheral", "otg";
interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h b/arch/arm/include/asm/arch-fsl-layerscape/config.h
index 516c9ea..faace43 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/config.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h
@@ -7,7 +7,6 @@
#ifndef _ASM_ARMV8_FSL_LAYERSCAPE_CONFIG_H_
#define _ASM_ARMV8_FSL_LAYERSCAPE_CONFIG_H_
-#include <linux/kconfig.h>
#include <fsl_ddrc_version.h>
#ifndef __ASSEMBLY__
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h b/arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h
index 8f43651..9e29350 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h
@@ -7,8 +7,6 @@
#ifndef __FSL_SERDES_H__
#define __FSL_SERDES_H__
-#include <config.h>
-
#ifdef CONFIG_FSL_LSCH3
enum srds_prtcl {
/*
diff --git a/arch/arm/include/asm/arch-imx8/sys_proto.h b/arch/arm/include/asm/arch-imx8/sys_proto.h
index e7625c4..405e9bd 100644
--- a/arch/arm/include/asm/arch-imx8/sys_proto.h
+++ b/arch/arm/include/asm/arch-imx8/sys_proto.h
@@ -23,6 +23,7 @@
extern unsigned long boot_pointer[];
void build_info(void);
+int ahab_close(void);
int print_bootinfo(void);
int sc_pm_setup_uart(sc_rsrc_t uart_rsrc, sc_pm_clock_rate_t clk_rate);
int imx8_power_domain_lookup_name(const char *name,
diff --git a/arch/arm/include/asm/arch-imx9/clock.h b/arch/arm/include/asm/arch-imx9/clock.h
index 1169ffd..1ce6ac4 100644
--- a/arch/arm/include/asm/arch-imx9/clock.h
+++ b/arch/arm/include/asm/arch-imx9/clock.h
@@ -222,6 +222,7 @@
void dram_pll_init(ulong pll_val);
void dram_enable_bypass(ulong clk_val);
void dram_disable_bypass(void);
+void set_arm_core_max_clk(void);
int configure_intpll(enum ccm_clk_src pll, u32 freq);
diff --git a/arch/arm/include/asm/arch-ls102xa/fsl_serdes.h b/arch/arm/include/asm/arch-ls102xa/fsl_serdes.h
index d99a6f3..9244e0a 100644
--- a/arch/arm/include/asm/arch-ls102xa/fsl_serdes.h
+++ b/arch/arm/include/asm/arch-ls102xa/fsl_serdes.h
@@ -6,8 +6,6 @@
#ifndef __FSL_SERDES_H
#define __FSL_SERDES_H
-#include <config.h>
-
enum srds_prtcl {
/*
* Nobody will check whether the device 'NONE' has been configured,
diff --git a/arch/arm/include/asm/arch-mxs/regs-base.h b/arch/arm/include/asm/arch-mxs/regs-base.h
index 44d40ca..33d2ab5 100644
--- a/arch/arm/include/asm/arch-mxs/regs-base.h
+++ b/arch/arm/include/asm/arch-mxs/regs-base.h
@@ -60,7 +60,7 @@
* Register base addresses for i.MX28
*/
#elif defined(CONFIG_MX28)
-#define MXS_ICOL_BASE 0x80000000
+#define MXS_ICOLL_BASE 0x80000000
#define MXS_HSADC_BASE 0x80002000
#define MXS_APBH_BASE 0x80004000
#define MXS_PERFMON_BASE 0x80006000
diff --git a/arch/arm/include/asm/arch-omap3/mem.h b/arch/arm/include/asm/arch-omap3/mem.h
index 569779c..fce3568 100644
--- a/arch/arm/include/asm/arch-omap3/mem.h
+++ b/arch/arm/include/asm/arch-omap3/mem.h
@@ -475,7 +475,7 @@
#ifndef __ASSEMBLY__
/* Function prototypes */
-void mem_init(void);
+void omap3_mem_init(void);
u32 is_mem_sdr(void);
u32 mem_ok(u32 cs);
diff --git a/arch/arm/include/asm/arch-rockchip/bootrom.h b/arch/arm/include/asm/arch-rockchip/bootrom.h
index 7dab18f..4276a0f 100644
--- a/arch/arm/include/asm/arch-rockchip/bootrom.h
+++ b/arch/arm/include/asm/arch-rockchip/bootrom.h
@@ -48,7 +48,6 @@
BROM_BOOTSOURCE_SPINOR = 3,
BROM_BOOTSOURCE_SPINAND = 4,
BROM_BOOTSOURCE_SD = 5,
- BROM_BOOTSOURCE_SPINOR_RK3588 = 6,
BROM_BOOTSOURCE_USB = 10,
BROM_LAST_BOOTSOURCE = BROM_BOOTSOURCE_USB
};
diff --git a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h
index 3daee2f..f023a4c 100644
--- a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h
+++ b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h
@@ -36,58 +36,20 @@
#define SUNXI_SRAMC_BASE 0x01c00000
#define SUNXI_DRAMC_BASE 0x01c01000
-#define SUNXI_DMA_BASE 0x01c02000
#define SUNXI_NFC_BASE 0x01c03000
-#define SUNXI_TS_BASE 0x01c04000
-#define SUNXI_SPI0_BASE 0x01c05000
-#define SUNXI_SPI1_BASE 0x01c06000
-#define SUNXI_MS_BASE 0x01c07000
-#define SUNXI_TVD_BASE 0x01c08000
-#define SUNXI_CSI0_BASE 0x01c09000
#ifndef CONFIG_MACH_SUNXI_H3_H5
#define SUNXI_TVE0_BASE 0x01c0a000
#endif
-#define SUNXI_EMAC_BASE 0x01c0b000
#define SUNXI_LCD0_BASE 0x01c0C000
#define SUNXI_LCD1_BASE 0x01c0d000
-#define SUNXI_VE_BASE 0x01c0e000
#define SUNXI_MMC0_BASE 0x01c0f000
#define SUNXI_MMC1_BASE 0x01c10000
#define SUNXI_MMC2_BASE 0x01c11000
#define SUNXI_MMC3_BASE 0x01c12000
-#ifdef CONFIG_SUNXI_GEN_SUN4I
-#define SUNXI_USB0_BASE 0x01c13000
-#define SUNXI_USB1_BASE 0x01c14000
-#endif
#define SUNXI_SS_BASE 0x01c15000
#if !defined(CONFIG_MACH_SUNXI_H3_H5) && !defined(CONFIG_MACH_SUN50I)
#define SUNXI_HDMI_BASE 0x01c16000
#endif
-#define SUNXI_SPI2_BASE 0x01c17000
-#define SUNXI_SATA_BASE 0x01c18000
-#ifdef CONFIG_SUNXI_GEN_SUN4I
-#define SUNXI_PATA_BASE 0x01c19000
-#define SUNXI_ACE_BASE 0x01c1a000
-#define SUNXI_TVE1_BASE 0x01c1b000
-#define SUNXI_USB2_BASE 0x01c1c000
-#endif
-#ifdef CONFIG_SUNXI_GEN_SUN6I
-#if defined(CONFIG_MACH_SUNXI_H3_H5) || defined(CONFIG_MACH_SUN50I)
-#define SUNXI_USBPHY_BASE 0x01c19000
-#define SUNXI_USB0_BASE SUNXI_USBPHY_BASE
-#define SUNXI_USB1_BASE 0x01c1a000
-#define SUNXI_USB2_BASE 0x01c1b000
-#define SUNXI_USB3_BASE 0x01c1c000
-#define SUNXI_USB4_BASE 0x01c1d000
-#else
-#define SUNXI_USB0_BASE 0x01c19000
-#define SUNXI_USB1_BASE 0x01c1a000
-#define SUNXI_USB2_BASE 0x01c1b000
-#endif
-#endif
-#define SUNXI_CSI1_BASE 0x01c1d000
-#define SUNXI_TZASC_BASE 0x01c1e000
-#define SUNXI_SPI3_BASE 0x01c1f000
#define SUNXI_CCM_BASE 0x01c20000
#define SUNXI_INTC_BASE 0x01c20400
@@ -177,8 +139,6 @@
#else
#define SUNXI_TVE0_BASE 0x01e40000
#endif
-#define SUNXI_MP_BASE 0x01e80000
-#define SUNXI_AVG_BASE 0x01ea0000
#if defined(CONFIG_MACH_SUNXI_H3_H5) || defined(CONFIG_MACH_SUN50I)
#define SUNXI_HDMI_BASE 0x01ee0000
@@ -197,13 +157,6 @@
#define SUN6I_P2WI_BASE 0x01f03400
#define SUNXI_RSB_BASE 0x01f03400
-/* CoreSight Debug Module */
-#define SUNXI_CSDM_BASE 0x3f500000
-
-#define SUNXI_DDRII_DDRIII_BASE 0x40000000 /* 2 GiB */
-
-#define SUNXI_BROM_BASE 0xffff0000 /* 32 kiB */
-
#define SUNXI_CPU_CFG (SUNXI_TIMER_BASE + 0x13c)
/* SS bonding ids used for cpu identification */
diff --git a/arch/arm/include/asm/arch-sunxi/cpu_sun50i_h6.h b/arch/arm/include/asm/arch-sunxi/cpu_sun50i_h6.h
index 15ee092..8a3f465 100644
--- a/arch/arm/include/asm/arch-sunxi/cpu_sun50i_h6.h
+++ b/arch/arm/include/asm/arch-sunxi/cpu_sun50i_h6.h
@@ -7,25 +7,14 @@
#ifndef _SUNXI_CPU_SUN50I_H6_H
#define _SUNXI_CPU_SUN50I_H6_H
-#define SUNXI_SRAM_A1_BASE CONFIG_SUNXI_SRAM_ADDRESS
-#define SUNXI_SRAM_C_BASE 0x00028000
-#define SUNXI_SRAM_A2_BASE 0x00100000
-
-#define SUNXI_DE3_BASE 0x01000000
-#define SUNXI_SS_BASE 0x01904000
-#define SUNXI_EMCE_BASE 0x01905000
-
#define SUNXI_SRAMC_BASE 0x03000000
#define SUNXI_CCM_BASE 0x03001000
-#define SUNXI_DMA_BASE 0x03002000
/* SID address space starts at 0x03006000, but e-fuse is at offset 0x200 */
#define SUNXI_SIDC_BASE 0x03006000
#define SUNXI_SID_BASE 0x03006200
#define SUNXI_TIMER_BASE 0x03009000
-#define SUNXI_PSI_BASE 0x0300C000
#define SUNXI_GIC400_BASE 0x03020000
-#define SUNXI_IOMMU_BASE 0x030F0000
#ifdef CONFIG_MACH_SUN50I_H6
#define SUNXI_DRAM_COM_BASE 0x04002000
@@ -46,18 +35,8 @@
#define SUNXI_TWI1_BASE 0x05002400
#define SUNXI_TWI2_BASE 0x05002800
#define SUNXI_TWI3_BASE 0x05002C00
-#define SUNXI_SPI0_BASE 0x05010000
-#define SUNXI_SPI1_BASE 0x05011000
-#define SUNXI_GMAC_BASE 0x05020000
-#define SUNXI_USB0_BASE 0x05100000
-#define SUNXI_XHCI_BASE 0x05200000
-#define SUNXI_USB3_BASE 0x05311000
-#define SUNXI_PCIE_BASE 0x05400000
#define SUNXI_HDMI_BASE 0x06000000
-#define SUNXI_TCON_TOP_BASE 0x06510000
-#define SUNXI_TCON_LCD0_BASE 0x06511000
-#define SUNXI_TCON_TV0_BASE 0x06515000
#define SUNXI_RTC_BASE 0x07000000
#define SUNXI_R_CPUCFG_BASE 0x07000400
diff --git a/arch/arm/include/asm/arch-sunxi/cpu_sun9i.h b/arch/arm/include/asm/arch-sunxi/cpu_sun9i.h
index 2bf2675..73de470 100644
--- a/arch/arm/include/asm/arch-sunxi/cpu_sun9i.h
+++ b/arch/arm/include/asm/arch-sunxi/cpu_sun9i.h
@@ -20,7 +20,6 @@
/* AHB0 Module */
#define SUNXI_NFC_BASE (REGS_AHB0_BASE + 0x3000)
-#define SUNXI_TSC_BASE (REGS_AHB0_BASE + 0x4000)
#define SUNXI_GTBUS_BASE (REGS_AHB0_BASE + 0x9000)
/* SID address space starts at 0x01ce000, but e-fuse is at offset 0x200 */
@@ -32,14 +31,7 @@
#define SUNXI_MMC3_BASE (REGS_AHB0_BASE + 0x12000)
#define SUNXI_MMC_COMMON_BASE (REGS_AHB0_BASE + 0x13000)
-#define SUNXI_SPI0_BASE (REGS_AHB0_BASE + 0x1A000)
-#define SUNXI_SPI1_BASE (REGS_AHB0_BASE + 0x1B000)
-#define SUNXI_SPI2_BASE (REGS_AHB0_BASE + 0x1C000)
-#define SUNXI_SPI3_BASE (REGS_AHB0_BASE + 0x1D000)
-
#define SUNXI_GIC400_BASE (REGS_AHB0_BASE + 0x40000)
-#define SUNXI_ARMA9_GIC_BASE (REGS_AHB0_BASE + 0x41000)
-#define SUNXI_ARMA9_CPUIF_BASE (REGS_AHB0_BASE + 0x42000)
#define SUNXI_DRAM_COM_BASE (REGS_AHB0_BASE + 0x62000)
#define SUNXI_DRAM_CTL0_BASE (REGS_AHB0_BASE + 0x63000)
@@ -47,59 +39,26 @@
#define SUNXI_DRAM_PHY0_BASE (REGS_AHB0_BASE + 0x65000)
#define SUNXI_DRAM_PHY1_BASE (REGS_AHB0_BASE + 0x66000)
-/* AHB1 Module */
-#define SUNXI_DMA_BASE (REGS_AHB1_BASE + 0x002000)
-#define SUNXI_USBOTG_BASE (REGS_AHB1_BASE + 0x100000)
-#define SUNXI_USBEHCI0_BASE (REGS_AHB1_BASE + 0x200000)
-#define SUNXI_USBEHCI1_BASE (REGS_AHB1_BASE + 0x201000)
-#define SUNXI_USBEHCI2_BASE (REGS_AHB1_BASE + 0x202000)
-
-/* AHB2 Module */
-#define SUNXI_DE_SYS_BASE (REGS_AHB2_BASE + 0x000000)
-#define SUNXI_DISP_SYS_BASE (REGS_AHB2_BASE + 0x010000)
#define SUNXI_DE_FE0_BASE (REGS_AHB2_BASE + 0x100000)
-#define SUNXI_DE_FE1_BASE (REGS_AHB2_BASE + 0x140000)
-#define SUNXI_DE_FE2_BASE (REGS_AHB2_BASE + 0x180000)
-
#define SUNXI_DE_BE0_BASE (REGS_AHB2_BASE + 0x200000)
-#define SUNXI_DE_BE1_BASE (REGS_AHB2_BASE + 0x240000)
-#define SUNXI_DE_BE2_BASE (REGS_AHB2_BASE + 0x280000)
-
-#define SUNXI_DE_DEU0_BASE (REGS_AHB2_BASE + 0x300000)
-#define SUNXI_DE_DEU1_BASE (REGS_AHB2_BASE + 0x340000)
-#define SUNXI_DE_DRC0_BASE (REGS_AHB2_BASE + 0x400000)
-#define SUNXI_DE_DRC1_BASE (REGS_AHB2_BASE + 0x440000)
-
#define SUNXI_LCD0_BASE (REGS_AHB2_BASE + 0xC00000)
#define SUNXI_LCD1_BASE (REGS_AHB2_BASE + 0xC10000)
#define SUNXI_LCD2_BASE (REGS_AHB2_BASE + 0xC20000)
-#define SUNXI_MIPI_DSI0_BASE (REGS_AHB2_BASE + 0xC40000)
-/* Also seen as SUNXI_MIPI_DSI0_DPHY_BASE 0x01ca1000 */
-#define SUNXI_MIPI_DSI0_DPHY_BASE (REGS_AHB2_BASE + 0xC40100)
#define SUNXI_HDMI_BASE (REGS_AHB2_BASE + 0xD00000)
/* APB0 Module */
#define SUNXI_CCM_BASE (REGS_APB0_BASE + 0x0000)
-#define SUNXI_CCMMODULE_BASE (REGS_APB0_BASE + 0x0400)
#define SUNXI_TIMER_BASE (REGS_APB0_BASE + 0x0C00)
#define SUNXI_PWM_BASE (REGS_APB0_BASE + 0x1400)
-#define SUNXI_LRADC_BASE (REGS_APB0_BASE + 0x1800)
/* APB1 Module */
#define SUNXI_TWI0_BASE (REGS_APB1_BASE + 0x2800)
#define SUNXI_TWI1_BASE (REGS_APB1_BASE + 0x2C00)
-#define SUNXI_TWI2_BASE (REGS_APB1_BASE + 0x3000)
-#define SUNXI_TWI3_BASE (REGS_APB1_BASE + 0x3400)
-#define SUNXI_TWI4_BASE (REGS_APB1_BASE + 0x3800)
/* RCPUS Module */
#define SUNXI_PRCM_BASE (REGS_RCPUS_BASE + 0x1400)
#define SUNXI_RSB_BASE (REGS_RCPUS_BASE + 0x3400)
-/* Misc. */
-#define SUNXI_BROM_BASE 0xFFFF0000 /* 32K */
-#define SUNXI_CPU_CFG (SUNXI_TIMER_BASE + 0x13c)
-
#ifndef __ASSEMBLY__
void sunxi_board_init(void);
void sunxi_reset(void);
diff --git a/arch/arm/include/asm/arch-tegra/clk_rst.h b/arch/arm/include/asm/arch-tegra/clk_rst.h
index 2359e14..04910d5 100644
--- a/arch/arm/include/asm/arch-tegra/clk_rst.h
+++ b/arch/arm/include/asm/arch-tegra/clk_rst.h
@@ -174,8 +174,7 @@
uint crc_audio_sync_clk_i2s4; /* _AUDIO_SYNC_CLK_I2S4_0, 0x4B0 */
uint crc_audio_sync_clk_spdif; /* _AUDIO_SYNC_CLK_SPDIF_0, 0x4B4 */
- uint crc_plld2_base; /* _PLLD2_BASE_0, 0x4B8 */
- uint crc_plld2_misc; /* _PLLD2_MISC_0, 0x4BC */
+ struct clk_pll_simple plld2; /* _PLLD2_BASE_0, 0x4B8 */
uint crc_utmip_pll_cfg3; /* _UTMIP_PLL_CFG3_0, 0x4C0 */
uint crc_pllrefe_base; /* _PLLREFE_BASE_0, 0x4C4 */
uint crc_pllrefe_misc; /* _PLLREFE_MISC_0, 0x4C8 */
diff --git a/arch/arm/include/asm/arch-tegra114/clock-tables.h b/arch/arm/include/asm/arch-tegra114/clock-tables.h
index 9b95b33..af4d481 100644
--- a/arch/arm/include/asm/arch-tegra114/clock-tables.h
+++ b/arch/arm/include/asm/arch-tegra114/clock-tables.h
@@ -23,6 +23,7 @@
CLOCK_ID_XCPU = CLOCK_ID_FIRST_SIMPLE,
CLOCK_ID_EPCI,
CLOCK_ID_SFROM32KHZ,
+ CLOCK_ID_DISPLAY2,
/* These are the base clocks (inputs to the Tegra SOC) */
CLOCK_ID_32KHZ,
@@ -30,7 +31,6 @@
CLOCK_ID_CLK_M,
CLOCK_ID_COUNT, /* number of PLLs */
- CLOCK_ID_DISPLAY2, /* placeholder */
CLOCK_ID_NONE = -1,
};
@@ -109,7 +109,7 @@
PERIPH_ID_UART3,
/* 56 */
- PERIPH_ID_RESERVED56,
+ PERIPH_ID_MIPI_CAL,
PERIPH_ID_EMC,
PERIPH_ID_USB2,
PERIPH_ID_USB3,
diff --git a/arch/arm/include/asm/arch-tegra114/mc.h b/arch/arm/include/asm/arch-tegra114/mc.h
index 3930bab..2fd2f50 100644
--- a/arch/arm/include/asm/arch-tegra114/mc.h
+++ b/arch/arm/include/asm/arch-tegra114/mc.h
@@ -25,9 +25,34 @@
u32 mc_emem_adr_cfg; /* offset 0x54 */
u32 mc_emem_adr_cfg_dev0; /* offset 0x58 */
u32 mc_emem_adr_cfg_dev1; /* offset 0x5C */
- u32 reserved3[12]; /* offset 0x60 - 0x8C */
+ u32 reserved3[4]; /* offset 0x60 - 0x6C */
+ u32 mc_security_cfg0; /* offset 0x70 */
+ u32 mc_security_cfg1; /* offset 0x74 */
+ u32 reserved4[6]; /* offset 0x7C - 0x8C */
u32 mc_emem_arb_reserved[28]; /* offset 0x90 - 0xFC */
- u32 reserved4[338]; /* offset 0x100 - 0x644 */
+ u32 reserved5[74]; /* offset 0x100 - 0x224 */
+ u32 mc_smmu_translation_enable_0; /* offset 0x228 */
+ u32 mc_smmu_translation_enable_1; /* offset 0x22C */
+ u32 mc_smmu_translation_enable_2; /* offset 0x230 */
+ u32 mc_smmu_translation_enable_3; /* offset 0x234 */
+ u32 mc_smmu_afi_asid; /* offset 0x238 */
+ u32 mc_smmu_avpc_asid; /* offset 0x23C */
+ u32 mc_smmu_dc_asid; /* offset 0x240 */
+ u32 mc_smmu_dcb_asid; /* offset 0x244 */
+ u32 reserved6[2]; /* offset 0x248 - 0x24C */
+ u32 mc_smmu_hc_asid; /* offset 0x250 */
+ u32 mc_smmu_hda_asid; /* offset 0x254 */
+ u32 mc_smmu_isp_asid; /* offset 0x258 */
+ u32 reserved7[2]; /* offset 0x25C - 0x260 */
+ u32 mc_smmu_mpe_asid; /* offset 0x264 */
+ u32 mc_smmu_nv_asid; /* offset 0x268 */
+ u32 mc_smmu_nv2_asid; /* offset 0x26C */
+ u32 mc_smmu_ppcs_asid; /* offset 0x270 */
+ u32 reserved8[1]; /* offset 0x274 */
+ u32 mc_smmu_sata_asid; /* offset 0x278 */
+ u32 mc_smmu_vde_asid; /* offset 0x27C */
+ u32 mc_smmu_vi_asid; /* offset 0x280 */
+ u32 reserved9[241]; /* offset 0x284 - 0x644 */
u32 mc_video_protect_bom; /* offset 0x648 */
u32 mc_video_protect_size_mb; /* offset 0x64c */
u32 mc_video_protect_reg_ctrl; /* offset 0x650 */
diff --git a/arch/arm/include/asm/arch-tegra114/pinmux.h b/arch/arm/include/asm/arch-tegra114/pinmux.h
index 414b22e..63b3684 100644
--- a/arch/arm/include/asm/arch-tegra114/pinmux.h
+++ b/arch/arm/include/asm/arch-tegra114/pinmux.h
@@ -312,6 +312,309 @@
PMUX_FUNC_COUNT,
};
+static const char * const tegra_pinctrl_to_pingrp[] = {
+ [PMUX_PINGRP_ULPI_DATA0_PO1] = "ulpi_data0_po1",
+ [PMUX_PINGRP_ULPI_DATA1_PO2] = "ulpi_data1_po2",
+ [PMUX_PINGRP_ULPI_DATA2_PO3] = "ulpi_data2_po3",
+ [PMUX_PINGRP_ULPI_DATA3_PO4] = "ulpi_data3_po4",
+ [PMUX_PINGRP_ULPI_DATA4_PO5] = "ulpi_data4_po5",
+ [PMUX_PINGRP_ULPI_DATA5_PO6] = "ulpi_data5_po6",
+ [PMUX_PINGRP_ULPI_DATA6_PO7] = "ulpi_data6_po7",
+ [PMUX_PINGRP_ULPI_DATA7_PO0] = "ulpi_data7_po0",
+ [PMUX_PINGRP_ULPI_CLK_PY0] = "ulpi_clk_py0",
+ [PMUX_PINGRP_ULPI_DIR_PY1] = "ulpi_dir_py1",
+ [PMUX_PINGRP_ULPI_NXT_PY2] = "ulpi_nxt_py2",
+ [PMUX_PINGRP_ULPI_STP_PY3] = "ulpi_stp_py3",
+ [PMUX_PINGRP_DAP3_FS_PP0] = "dap3_fs_pp0",
+ [PMUX_PINGRP_DAP3_DIN_PP1] = "dap3_din_pp1",
+ [PMUX_PINGRP_DAP3_DOUT_PP2] = "dap3_dout_pp2",
+ [PMUX_PINGRP_DAP3_SCLK_PP3] = "dap3_sclk_pp3",
+ [PMUX_PINGRP_PV0] = "pv0",
+ [PMUX_PINGRP_PV1] = "pv1",
+ [PMUX_PINGRP_SDMMC1_CLK_PZ0] = "sdmmc1_clk_pz0",
+ [PMUX_PINGRP_SDMMC1_CMD_PZ1] = "sdmmc1_cmd_pz1",
+ [PMUX_PINGRP_SDMMC1_DAT3_PY4] = "sdmmc1_dat3_py4",
+ [PMUX_PINGRP_SDMMC1_DAT2_PY5] = "sdmmc1_dat2_py5",
+ [PMUX_PINGRP_SDMMC1_DAT1_PY6] = "sdmmc1_dat1_py6",
+ [PMUX_PINGRP_SDMMC1_DAT0_PY7] = "sdmmc1_dat0_py7",
+ [PMUX_PINGRP_CLK2_OUT_PW5] = "clk2_out_pw5",
+ [PMUX_PINGRP_CLK2_REQ_PCC5] = "clk2_req_pcc5",
+ [PMUX_PINGRP_HDMI_INT_PN7] = "hdmi_int_pn7",
+ [PMUX_PINGRP_DDC_SCL_PV4] = "ddc_scl_pv4",
+ [PMUX_PINGRP_DDC_SDA_PV5] = "ddc_sda_pv5",
+ [PMUX_PINGRP_UART2_RXD_PC3] = "uart2_rxd_pc3",
+ [PMUX_PINGRP_UART2_TXD_PC2] = "uart2_txd_pc2",
+ [PMUX_PINGRP_UART2_RTS_N_PJ6] = "uart2_rts_n_pj6",
+ [PMUX_PINGRP_UART2_CTS_N_PJ5] = "uart2_cts_n_pj5",
+ [PMUX_PINGRP_UART3_TXD_PW6] = "uart3_txd_pw6",
+ [PMUX_PINGRP_UART3_RXD_PW7] = "uart3_rxd_pw7",
+ [PMUX_PINGRP_UART3_CTS_N_PA1] = "uart3_cts_n_pa1",
+ [PMUX_PINGRP_UART3_RTS_N_PC0] = "uart3_rts_n_pc0",
+ [PMUX_PINGRP_PU0] = "pu0",
+ [PMUX_PINGRP_PU1] = "pu1",
+ [PMUX_PINGRP_PU2] = "pu2",
+ [PMUX_PINGRP_PU3] = "pu3",
+ [PMUX_PINGRP_PU4] = "pu4",
+ [PMUX_PINGRP_PU5] = "pu5",
+ [PMUX_PINGRP_PU6] = "pu6",
+ [PMUX_PINGRP_GEN1_I2C_SDA_PC5] = "gen1_i2c_sda_pc5",
+ [PMUX_PINGRP_GEN1_I2C_SCL_PC4] = "gen1_i2c_scl_pc4",
+ [PMUX_PINGRP_DAP4_FS_PP4] = "dap4_fs_pp4",
+ [PMUX_PINGRP_DAP4_DIN_PP5] = "dap4_din_pp5",
+ [PMUX_PINGRP_DAP4_DOUT_PP6] = "dap4_dout_pp6",
+ [PMUX_PINGRP_DAP4_SCLK_PP7] = "dap4_sclk_pp7",
+ [PMUX_PINGRP_CLK3_OUT_PEE0] = "clk3_out_pee0",
+ [PMUX_PINGRP_CLK3_REQ_PEE1] = "clk3_req_pee1",
+ [PMUX_PINGRP_GMI_WP_N_PC7] = "gmi_wp_n_pc7",
+ [PMUX_PINGRP_GMI_IORDY_PI5] = "gmi_iordy_pi5",
+ [PMUX_PINGRP_GMI_WAIT_PI7] = "gmi_wait_pi7",
+ [PMUX_PINGRP_GMI_ADV_N_PK0] = "gmi_adv_n_pk0",
+ [PMUX_PINGRP_GMI_CLK_PK1] = "gmi_clk_pk1",
+ [PMUX_PINGRP_GMI_CS0_N_PJ0] = "gmi_cs0_n_pj0",
+ [PMUX_PINGRP_GMI_CS1_N_PJ2] = "gmi_cs1_n_pj2",
+ [PMUX_PINGRP_GMI_CS2_N_PK3] = "gmi_cs2_n_pk3",
+ [PMUX_PINGRP_GMI_CS3_N_PK4] = "gmi_cs3_n_pk4",
+ [PMUX_PINGRP_GMI_CS4_N_PK2] = "gmi_cs4_n_pk2",
+ [PMUX_PINGRP_GMI_CS6_N_PI3] = "gmi_cs6_n_pi3",
+ [PMUX_PINGRP_GMI_CS7_N_PI6] = "gmi_cs7_n_pi6",
+ [PMUX_PINGRP_GMI_AD0_PG0] = "gmi_ad0_pg0",
+ [PMUX_PINGRP_GMI_AD1_PG1] = "gmi_ad1_pg1",
+ [PMUX_PINGRP_GMI_AD2_PG2] = "gmi_ad2_pg2",
+ [PMUX_PINGRP_GMI_AD3_PG3] = "gmi_ad3_pg3",
+ [PMUX_PINGRP_GMI_AD4_PG4] = "gmi_ad4_pg4",
+ [PMUX_PINGRP_GMI_AD5_PG5] = "gmi_ad5_pg5",
+ [PMUX_PINGRP_GMI_AD6_PG6] = "gmi_ad6_pg6",
+ [PMUX_PINGRP_GMI_AD7_PG7] = "gmi_ad7_pg7",
+ [PMUX_PINGRP_GMI_AD8_PH0] = "gmi_ad8_ph0",
+ [PMUX_PINGRP_GMI_AD9_PH1] = "gmi_ad9_ph1",
+ [PMUX_PINGRP_GMI_AD10_PH2] = "gmi_ad10_ph2",
+ [PMUX_PINGRP_GMI_AD11_PH3] = "gmi_ad11_ph3",
+ [PMUX_PINGRP_GMI_AD12_PH4] = "gmi_ad12_ph4",
+ [PMUX_PINGRP_GMI_AD13_PH5] = "gmi_ad13_ph5",
+ [PMUX_PINGRP_GMI_AD14_PH6] = "gmi_ad14_ph6",
+ [PMUX_PINGRP_GMI_AD15_PH7] = "gmi_ad15_ph7",
+ [PMUX_PINGRP_GMI_A16_PJ7] = "gmi_a16_pj7",
+ [PMUX_PINGRP_GMI_A17_PB0] = "gmi_a17_pb0",
+ [PMUX_PINGRP_GMI_A18_PB1] = "gmi_a18_pb1",
+ [PMUX_PINGRP_GMI_A19_PK7] = "gmi_a19_pk7",
+ [PMUX_PINGRP_GMI_WR_N_PI0] = "gmi_wr_n_pi0",
+ [PMUX_PINGRP_GMI_OE_N_PI1] = "gmi_oe_n_pi1",
+ [PMUX_PINGRP_GMI_DQS_P_PJ3] = "gmi_dqs_p_pj3",
+ [PMUX_PINGRP_GMI_RST_N_PI4] = "gmi_rst_n_pi4",
+ [PMUX_PINGRP_GEN2_I2C_SCL_PT5] = "gen2_i2c_scl_pt5",
+ [PMUX_PINGRP_GEN2_I2C_SDA_PT6] = "gen2_i2c_sda_pt6",
+ [PMUX_PINGRP_SDMMC4_CLK_PCC4] = "sdmmc4_clk_pcc4",
+ [PMUX_PINGRP_SDMMC4_CMD_PT7] = "sdmmc4_cmd_pt7",
+ [PMUX_PINGRP_SDMMC4_DAT0_PAA0] = "sdmmc4_dat0_paa0",
+ [PMUX_PINGRP_SDMMC4_DAT1_PAA1] = "sdmmc4_dat1_paa1",
+ [PMUX_PINGRP_SDMMC4_DAT2_PAA2] = "sdmmc4_dat2_paa2",
+ [PMUX_PINGRP_SDMMC4_DAT3_PAA3] = "sdmmc4_dat3_paa3",
+ [PMUX_PINGRP_SDMMC4_DAT4_PAA4] = "sdmmc4_dat4_paa4",
+ [PMUX_PINGRP_SDMMC4_DAT5_PAA5] = "sdmmc4_dat5_paa5",
+ [PMUX_PINGRP_SDMMC4_DAT6_PAA6] = "sdmmc4_dat6_paa6",
+ [PMUX_PINGRP_SDMMC4_DAT7_PAA7] = "sdmmc4_dat7_paa7",
+ [PMUX_PINGRP_CAM_MCLK_PCC0] = "cam_mclk_pcc0",
+ [PMUX_PINGRP_PCC1] = "pcc1",
+ [PMUX_PINGRP_PBB0] = "pbb0",
+ [PMUX_PINGRP_CAM_I2C_SCL_PBB1] = "cam_i2c_scl_pbb1",
+ [PMUX_PINGRP_CAM_I2C_SDA_PBB2] = "cam_i2c_sda_pbb2",
+ [PMUX_PINGRP_PBB3] = "pbb3",
+ [PMUX_PINGRP_PBB4] = "pbb4",
+ [PMUX_PINGRP_PBB5] = "pbb5",
+ [PMUX_PINGRP_PBB6] = "pbb6",
+ [PMUX_PINGRP_PBB7] = "pbb7",
+ [PMUX_PINGRP_PCC2] = "pcc2",
+ [PMUX_PINGRP_JTAG_RTCK] = "jtag_rtck",
+ [PMUX_PINGRP_PWR_I2C_SCL_PZ6] = "pwr_i2c_scl_pz6",
+ [PMUX_PINGRP_PWR_I2C_SDA_PZ7] = "pwr_i2c_sda_pz7",
+ [PMUX_PINGRP_KB_ROW0_PR0] = "kb_row0_pr0",
+ [PMUX_PINGRP_KB_ROW1_PR1] = "kb_row1_pr1",
+ [PMUX_PINGRP_KB_ROW2_PR2] = "kb_row2_pr2",
+ [PMUX_PINGRP_KB_ROW3_PR3] = "kb_row3_pr3",
+ [PMUX_PINGRP_KB_ROW4_PR4] = "kb_row4_pr4",
+ [PMUX_PINGRP_KB_ROW5_PR5] = "kb_row5_pr5",
+ [PMUX_PINGRP_KB_ROW6_PR6] = "kb_row6_pr6",
+ [PMUX_PINGRP_KB_ROW7_PR7] = "kb_row7_pr7",
+ [PMUX_PINGRP_KB_ROW8_PS0] = "kb_row8_ps0",
+ [PMUX_PINGRP_KB_ROW9_PS1] = "kb_row9_ps1",
+ [PMUX_PINGRP_KB_ROW10_PS2] = "kb_row10_ps2",
+ [PMUX_PINGRP_KB_COL0_PQ0] = "kb_col0_pq0",
+ [PMUX_PINGRP_KB_COL1_PQ1] = "kb_col1_pq1",
+ [PMUX_PINGRP_KB_COL2_PQ2] = "kb_col2_pq2",
+ [PMUX_PINGRP_KB_COL3_PQ3] = "kb_col3_pq3",
+ [PMUX_PINGRP_KB_COL4_PQ4] = "kb_col4_pq4",
+ [PMUX_PINGRP_KB_COL5_PQ5] = "kb_col5_pq5",
+ [PMUX_PINGRP_KB_COL6_PQ6] = "kb_col6_pq6",
+ [PMUX_PINGRP_KB_COL7_PQ7] = "kb_col7_pq7",
+ [PMUX_PINGRP_CLK_32K_OUT_PA0] = "clk_32k_out_pa0",
+ [PMUX_PINGRP_SYS_CLK_REQ_PZ5] = "sys_clk_req_pz5",
+ [PMUX_PINGRP_CORE_PWR_REQ] = "core_pwr_req",
+ [PMUX_PINGRP_CPU_PWR_REQ] = "cpu_pwr_req",
+ [PMUX_PINGRP_PWR_INT_N] = "pwr_int_n",
+ [PMUX_PINGRP_CLK_32K_IN] = "clk_32k_in",
+ [PMUX_PINGRP_OWR] = "owr",
+ [PMUX_PINGRP_DAP1_FS_PN0] = "dap1_fs_pn0",
+ [PMUX_PINGRP_DAP1_DIN_PN1] = "dap1_din_pn1",
+ [PMUX_PINGRP_DAP1_DOUT_PN2] = "dap1_dout_pn2",
+ [PMUX_PINGRP_DAP1_SCLK_PN3] = "dap1_sclk_pn3",
+ [PMUX_PINGRP_CLK1_REQ_PEE2] = "clk1_req_pee2",
+ [PMUX_PINGRP_CLK1_OUT_PW4] = "clk1_out_pw4",
+ [PMUX_PINGRP_SPDIF_IN_PK6] = "spdif_in_pk6",
+ [PMUX_PINGRP_SPDIF_OUT_PK5] = "spdif_out_pk5",
+ [PMUX_PINGRP_DAP2_FS_PA2] = "dap2_fs_pa2",
+ [PMUX_PINGRP_DAP2_DIN_PA4] = "dap2_din_pa4",
+ [PMUX_PINGRP_DAP2_DOUT_PA5] = "dap2_dout_pa5",
+ [PMUX_PINGRP_DAP2_SCLK_PA3] = "dap2_sclk_pa3",
+ [PMUX_PINGRP_DVFS_PWM_PX0] = "dvfs_pwm_px0",
+ [PMUX_PINGRP_GPIO_X1_AUD_PX1] = "gpio_x1_aud_px1",
+ [PMUX_PINGRP_GPIO_X3_AUD_PX3] = "gpio_x3_aud_px3",
+ [PMUX_PINGRP_DVFS_CLK_PX2] = "dvfs_clk_px2",
+ [PMUX_PINGRP_GPIO_X4_AUD_PX4] = "gpio_x4_aud_px4",
+ [PMUX_PINGRP_GPIO_X5_AUD_PX5] = "gpio_x5_aud_px5",
+ [PMUX_PINGRP_GPIO_X6_AUD_PX6] = "gpio_x6_aud_px6",
+ [PMUX_PINGRP_GPIO_X7_AUD_PX7] = "gpio_x7_aud_px7",
+ [PMUX_PINGRP_SDMMC3_CLK_PA6] = "sdmmc3_clk_pa6",
+ [PMUX_PINGRP_SDMMC3_CMD_PA7] = "sdmmc3_cmd_pa7",
+ [PMUX_PINGRP_SDMMC3_DAT0_PB7] = "sdmmc3_dat0_pb7",
+ [PMUX_PINGRP_SDMMC3_DAT1_PB6] = "sdmmc3_dat1_pb6",
+ [PMUX_PINGRP_SDMMC3_DAT2_PB5] = "sdmmc3_dat2_pb5",
+ [PMUX_PINGRP_SDMMC3_DAT3_PB4] = "sdmmc3_dat3_pb4",
+ [PMUX_PINGRP_HDMI_CEC_PEE3] = "hdmi_cec_pee3",
+ [PMUX_PINGRP_SDMMC1_WP_N_PV3] = "sdmmc1_wp_n_pv3",
+ [PMUX_PINGRP_SDMMC3_CD_N_PV2] = "sdmmc3_cd_n_pv2",
+ [PMUX_PINGRP_GPIO_W2_AUD_PW2] = "gpio_w2_aud_pw2",
+ [PMUX_PINGRP_GPIO_W3_AUD_PW3] = "gpio_w3_aud_pw3",
+ [PMUX_PINGRP_USB_VBUS_EN0_PN4] = "usb_vbus_en0_pn4",
+ [PMUX_PINGRP_USB_VBUS_EN1_PN5] = "usb_vbus_en1_pn5",
+ [PMUX_PINGRP_SDMMC3_CLK_LB_IN_PEE5] = "sdmmc3_clk_lb_in_pee5",
+ [PMUX_PINGRP_SDMMC3_CLK_LB_OUT_PEE4] = "sdmmc3_clk_lb_out_pee4",
+ [PMUX_PINGRP_GMI_CLK_LB] = "gmi_clk_lb",
+ [PMUX_PINGRP_RESET_OUT_N] = "reset_out_n",
+};
+
+static const char * const tegra_pinctrl_to_drvgrp[] = {
+ [PMUX_DRVGRP_AO1] = "drive_ao1",
+ [PMUX_DRVGRP_AO2] = "drive_ao2",
+ [PMUX_DRVGRP_AT1] = "drive_at1",
+ [PMUX_DRVGRP_AT2] = "drive_at2",
+ [PMUX_DRVGRP_AT3] = "drive_at3",
+ [PMUX_DRVGRP_AT4] = "drive_at4",
+ [PMUX_DRVGRP_AT5] = "drive_at5",
+ [PMUX_DRVGRP_CDEV1] = "drive_cdev1",
+ [PMUX_DRVGRP_CDEV2] = "drive_cdev2",
+ [PMUX_DRVGRP_DAP1] = "drive_dap1",
+ [PMUX_DRVGRP_DAP2] = "drive_dap2",
+ [PMUX_DRVGRP_DAP3] = "drive_dap3",
+ [PMUX_DRVGRP_DAP4] = "drive_dap4",
+ [PMUX_DRVGRP_DBG] = "drive_dbg",
+ [PMUX_DRVGRP_SDIO3] = "drive_sdio3",
+ [PMUX_DRVGRP_SPI] = "drive_spi",
+ [PMUX_DRVGRP_UAA] = "drive_uaa",
+ [PMUX_DRVGRP_UAB] = "drive_uab",
+ [PMUX_DRVGRP_UART2] = "drive_uart2",
+ [PMUX_DRVGRP_UART3] = "drive_uart3",
+ [PMUX_DRVGRP_SDIO1] = "drive_sdio1",
+ [PMUX_DRVGRP_DDC] = "drive_ddc",
+ [PMUX_DRVGRP_GMA] = "drive_gma",
+ [PMUX_DRVGRP_GME] = "drive_gme",
+ [PMUX_DRVGRP_GMF] = "drive_gmf",
+ [PMUX_DRVGRP_GMG] = "drive_gmg",
+ [PMUX_DRVGRP_GMH] = "drive_gmh",
+ [PMUX_DRVGRP_OWR] = "drive_owr",
+ [PMUX_DRVGRP_UDA] = "drive_uda",
+ [PMUX_DRVGRP_DEV3] = "drive_dev3",
+ [PMUX_DRVGRP_CEC] = "drive_cec",
+ [PMUX_DRVGRP_AT6] = "drive_at6",
+ [PMUX_DRVGRP_DAP5] = "drive_dap5",
+ [PMUX_DRVGRP_USB_VBUS_EN] = "drive_usb_vbus_en",
+ [PMUX_DRVGRP_AO3] = "drive_ao3",
+ [PMUX_DRVGRP_HV0] = "drive_hv0",
+ [PMUX_DRVGRP_SDIO4] = "drive_sdio4",
+ [PMUX_DRVGRP_AO0] = "drive_ao0",
+};
+
+static const char * const tegra_pinctrl_to_func[] = {
+ [PMUX_FUNC_DEFAULT] = "default",
+ [PMUX_FUNC_BLINK] = "blink",
+ [PMUX_FUNC_CEC] = "cec",
+ [PMUX_FUNC_CLDVFS] = "cldvfs",
+ [PMUX_FUNC_CLK] = "clk",
+ [PMUX_FUNC_CLK12] = "clk12",
+ [PMUX_FUNC_CPU] = "cpu",
+ [PMUX_FUNC_DAP] = "dap",
+ [PMUX_FUNC_DAP1] = "dap1",
+ [PMUX_FUNC_DAP2] = "dap2",
+ [PMUX_FUNC_DEV3] = "dev3",
+ [PMUX_FUNC_DISPLAYA] = "displaya",
+ [PMUX_FUNC_DISPLAYA_ALT] = "displaya_alt",
+ [PMUX_FUNC_DISPLAYB] = "displayb",
+ [PMUX_FUNC_DTV] = "dtv",
+ [PMUX_FUNC_EMC_DLL] = "emc_dll",
+ [PMUX_FUNC_EXTPERIPH1] = "extperiph1",
+ [PMUX_FUNC_EXTPERIPH2] = "extperiph2",
+ [PMUX_FUNC_EXTPERIPH3] = "extperiph3",
+ [PMUX_FUNC_GMI] = "gmi",
+ [PMUX_FUNC_GMI_ALT] = "gmi_alt",
+ [PMUX_FUNC_HDA] = "hda",
+ [PMUX_FUNC_HSI] = "hsi",
+ [PMUX_FUNC_I2C1] = "i2c1",
+ [PMUX_FUNC_I2C2] = "i2c2",
+ [PMUX_FUNC_I2C3] = "i2c3",
+ [PMUX_FUNC_I2C4] = "i2c4",
+ [PMUX_FUNC_I2CPWR] = "i2cpwr",
+ [PMUX_FUNC_I2S0] = "i2s0",
+ [PMUX_FUNC_I2S1] = "i2s1",
+ [PMUX_FUNC_I2S2] = "i2s2",
+ [PMUX_FUNC_I2S3] = "i2s3",
+ [PMUX_FUNC_I2S4] = "i2s4",
+ [PMUX_FUNC_IRDA] = "irda",
+ [PMUX_FUNC_KBC] = "kbc",
+ [PMUX_FUNC_NAND] = "nand",
+ [PMUX_FUNC_NAND_ALT] = "nand_alt",
+ [PMUX_FUNC_OWR] = "owr",
+ [PMUX_FUNC_PMI] = "pmi",
+ [PMUX_FUNC_PWM0] = "pwm0",
+ [PMUX_FUNC_PWM1] = "pwm1",
+ [PMUX_FUNC_PWM2] = "pwm2",
+ [PMUX_FUNC_PWM3] = "pwm3",
+ [PMUX_FUNC_PWRON] = "pwron",
+ [PMUX_FUNC_RESET_OUT_N] = "reset_out_n",
+ [PMUX_FUNC_RTCK] = "rtck",
+ [PMUX_FUNC_SDMMC1] = "sdmmc1",
+ [PMUX_FUNC_SDMMC2] = "sdmmc2",
+ [PMUX_FUNC_SDMMC3] = "sdmmc3",
+ [PMUX_FUNC_SDMMC4] = "sdmmc4",
+ [PMUX_FUNC_SOC] = "soc",
+ [PMUX_FUNC_SPDIF] = "spdif",
+ [PMUX_FUNC_SPI1] = "spi1",
+ [PMUX_FUNC_SPI2] = "spi2",
+ [PMUX_FUNC_SPI3] = "spi3",
+ [PMUX_FUNC_SPI4] = "spi4",
+ [PMUX_FUNC_SPI5] = "spi5",
+ [PMUX_FUNC_SPI6] = "spi6",
+ [PMUX_FUNC_SYSCLK] = "sysclk",
+ [PMUX_FUNC_TRACE] = "trace",
+ [PMUX_FUNC_UARTA] = "uarta",
+ [PMUX_FUNC_UARTB] = "uartb",
+ [PMUX_FUNC_UARTC] = "uartc",
+ [PMUX_FUNC_UARTD] = "uartd",
+ [PMUX_FUNC_ULPI] = "ulpi",
+ [PMUX_FUNC_USB] = "usb",
+ [PMUX_FUNC_VGP1] = "vgp1",
+ [PMUX_FUNC_VGP2] = "vgp2",
+ [PMUX_FUNC_VGP3] = "vgp3",
+ [PMUX_FUNC_VGP4] = "vgp4",
+ [PMUX_FUNC_VGP5] = "vgp5",
+ [PMUX_FUNC_VGP6] = "vgp6",
+ [PMUX_FUNC_VI] = "vi",
+ [PMUX_FUNC_VI_ALT1] = "vi_alt1",
+ [PMUX_FUNC_VI_ALT3] = "vi_alt3",
+ [PMUX_FUNC_RSVD1] = "rsvd1",
+ [PMUX_FUNC_RSVD2] = "rsvd2",
+ [PMUX_FUNC_RSVD3] = "rsvd3",
+ [PMUX_FUNC_RSVD4] = "rsvd4",
+};
+
#define TEGRA_PMX_SOC_DRV_GROUP_BASE_REG 0x868
#define TEGRA_PMX_SOC_HAS_IO_CLAMPING
#define TEGRA_PMX_SOC_HAS_DRVGRPS
diff --git a/arch/arm/include/asm/arch-tegra124/pinmux.h b/arch/arm/include/asm/arch-tegra124/pinmux.h
index 4c593aa..3aba17d 100644
--- a/arch/arm/include/asm/arch-tegra124/pinmux.h
+++ b/arch/arm/include/asm/arch-tegra124/pinmux.h
@@ -341,6 +341,333 @@
PMUX_FUNC_COUNT,
};
+static const char * const tegra_pinctrl_to_pingrp[] = {
+ [PMUX_PINGRP_ULPI_DATA0_PO1] = "ulpi_data0_po1",
+ [PMUX_PINGRP_ULPI_DATA1_PO2] = "ulpi_data1_po2",
+ [PMUX_PINGRP_ULPI_DATA2_PO3] = "ulpi_data2_po3",
+ [PMUX_PINGRP_ULPI_DATA3_PO4] = "ulpi_data3_po4",
+ [PMUX_PINGRP_ULPI_DATA4_PO5] = "ulpi_data4_po5",
+ [PMUX_PINGRP_ULPI_DATA5_PO6] = "ulpi_data5_po6",
+ [PMUX_PINGRP_ULPI_DATA6_PO7] = "ulpi_data6_po7",
+ [PMUX_PINGRP_ULPI_DATA7_PO0] = "ulpi_data7_po0",
+ [PMUX_PINGRP_ULPI_CLK_PY0] = "ulpi_clk_py0",
+ [PMUX_PINGRP_ULPI_DIR_PY1] = "ulpi_dir_py1",
+ [PMUX_PINGRP_ULPI_NXT_PY2] = "ulpi_nxt_py2",
+ [PMUX_PINGRP_ULPI_STP_PY3] = "ulpi_stp_py3",
+ [PMUX_PINGRP_DAP3_FS_PP0] = "dap3_fs_pp0",
+ [PMUX_PINGRP_DAP3_DIN_PP1] = "dap3_din_pp1",
+ [PMUX_PINGRP_DAP3_DOUT_PP2] = "dap3_dout_pp2",
+ [PMUX_PINGRP_DAP3_SCLK_PP3] = "dap3_sclk_pp3",
+ [PMUX_PINGRP_PV0] = "pv0",
+ [PMUX_PINGRP_PV1] = "pv1",
+ [PMUX_PINGRP_SDMMC1_CLK_PZ0] = "sdmmc1_clk_pz0",
+ [PMUX_PINGRP_SDMMC1_CMD_PZ1] = "sdmmc1_cmd_pz1",
+ [PMUX_PINGRP_SDMMC1_DAT3_PY4] = "sdmmc1_dat3_py4",
+ [PMUX_PINGRP_SDMMC1_DAT2_PY5] = "sdmmc1_dat2_py5",
+ [PMUX_PINGRP_SDMMC1_DAT1_PY6] = "sdmmc1_dat1_py6",
+ [PMUX_PINGRP_SDMMC1_DAT0_PY7] = "sdmmc1_dat0_py7",
+ [PMUX_PINGRP_CLK2_OUT_PW5] = "clk2_out_pw5",
+ [PMUX_PINGRP_CLK2_REQ_PCC5] = "clk2_req_pcc5",
+ [PMUX_PINGRP_HDMI_INT_PN7] = "hdmi_int_pn7",
+ [PMUX_PINGRP_DDC_SCL_PV4] = "ddc_scl_pv4",
+ [PMUX_PINGRP_DDC_SDA_PV5] = "ddc_sda_pv5",
+ [PMUX_PINGRP_UART2_RXD_PC3] = "uart2_rxd_pc3",
+ [PMUX_PINGRP_UART2_TXD_PC2] = "uart2_txd_pc2",
+ [PMUX_PINGRP_UART2_RTS_N_PJ6] = "uart2_rts_n_pj6",
+ [PMUX_PINGRP_UART2_CTS_N_PJ5] = "uart2_cts_n_pj5",
+ [PMUX_PINGRP_UART3_TXD_PW6] = "uart3_txd_pw6",
+ [PMUX_PINGRP_UART3_RXD_PW7] = "uart3_rxd_pw7",
+ [PMUX_PINGRP_UART3_CTS_N_PA1] = "uart3_cts_n_pa1",
+ [PMUX_PINGRP_UART3_RTS_N_PC0] = "uart3_rts_n_pc0",
+ [PMUX_PINGRP_PU0] = "pu0",
+ [PMUX_PINGRP_PU1] = "pu1",
+ [PMUX_PINGRP_PU2] = "pu2",
+ [PMUX_PINGRP_PU3] = "pu3",
+ [PMUX_PINGRP_PU4] = "pu4",
+ [PMUX_PINGRP_PU5] = "pu5",
+ [PMUX_PINGRP_PU6] = "pu6",
+ [PMUX_PINGRP_GEN1_I2C_SDA_PC5] = "gen1_i2c_sda_pc5",
+ [PMUX_PINGRP_GEN1_I2C_SCL_PC4] = "gen1_i2c_scl_pc4",
+ [PMUX_PINGRP_DAP4_FS_PP4] = "dap4_fs_pp4",
+ [PMUX_PINGRP_DAP4_DIN_PP5] = "dap4_din_pp5",
+ [PMUX_PINGRP_DAP4_DOUT_PP6] = "dap4_dout_pp6",
+ [PMUX_PINGRP_DAP4_SCLK_PP7] = "dap4_sclk_pp7",
+ [PMUX_PINGRP_CLK3_OUT_PEE0] = "clk3_out_pee0",
+ [PMUX_PINGRP_CLK3_REQ_PEE1] = "clk3_req_pee1",
+ [PMUX_PINGRP_PC7] = "pc7",
+ [PMUX_PINGRP_PI5] = "pi5",
+ [PMUX_PINGRP_PI7] = "pi7",
+ [PMUX_PINGRP_PK0] = "pk0",
+ [PMUX_PINGRP_PK1] = "pk1",
+ [PMUX_PINGRP_PJ0] = "pj0",
+ [PMUX_PINGRP_PJ2] = "pj2",
+ [PMUX_PINGRP_PK3] = "pk3",
+ [PMUX_PINGRP_PK4] = "pk4",
+ [PMUX_PINGRP_PK2] = "pk2",
+ [PMUX_PINGRP_PI3] = "pi3",
+ [PMUX_PINGRP_PI6] = "pi6",
+ [PMUX_PINGRP_PG0] = "pg0",
+ [PMUX_PINGRP_PG1] = "pg1",
+ [PMUX_PINGRP_PG2] = "pg2",
+ [PMUX_PINGRP_PG3] = "pg3",
+ [PMUX_PINGRP_PG4] = "pg4",
+ [PMUX_PINGRP_PG5] = "pg5",
+ [PMUX_PINGRP_PG6] = "pg6",
+ [PMUX_PINGRP_PG7] = "pg7",
+ [PMUX_PINGRP_PH0] = "ph0",
+ [PMUX_PINGRP_PH1] = "ph1",
+ [PMUX_PINGRP_PH2] = "ph2",
+ [PMUX_PINGRP_PH3] = "ph3",
+ [PMUX_PINGRP_PH4] = "ph4",
+ [PMUX_PINGRP_PH5] = "ph5",
+ [PMUX_PINGRP_PH6] = "ph6",
+ [PMUX_PINGRP_PH7] = "ph7",
+ [PMUX_PINGRP_PJ7] = "pj7",
+ [PMUX_PINGRP_PB0] = "pb0",
+ [PMUX_PINGRP_PB1] = "pb1",
+ [PMUX_PINGRP_PK7] = "pk7",
+ [PMUX_PINGRP_PI0] = "pi0",
+ [PMUX_PINGRP_PI1] = "pi1",
+ [PMUX_PINGRP_PI2] = "pi2",
+ [PMUX_PINGRP_PI4] = "pi4",
+ [PMUX_PINGRP_GEN2_I2C_SCL_PT5] = "gen2_i2c_scl_pt5",
+ [PMUX_PINGRP_GEN2_I2C_SDA_PT6] = "gen2_i2c_sda_pt6",
+ [PMUX_PINGRP_SDMMC4_CLK_PCC4] = "sdmmc4_clk_pcc4",
+ [PMUX_PINGRP_SDMMC4_CMD_PT7] = "sdmmc4_cmd_pt7",
+ [PMUX_PINGRP_SDMMC4_DAT0_PAA0] = "sdmmc4_dat0_paa0",
+ [PMUX_PINGRP_SDMMC4_DAT1_PAA1] = "sdmmc4_dat1_paa1",
+ [PMUX_PINGRP_SDMMC4_DAT2_PAA2] = "sdmmc4_dat2_paa2",
+ [PMUX_PINGRP_SDMMC4_DAT3_PAA3] = "sdmmc4_dat3_paa3",
+ [PMUX_PINGRP_SDMMC4_DAT4_PAA4] = "sdmmc4_dat4_paa4",
+ [PMUX_PINGRP_SDMMC4_DAT5_PAA5] = "sdmmc4_dat5_paa5",
+ [PMUX_PINGRP_SDMMC4_DAT6_PAA6] = "sdmmc4_dat6_paa6",
+ [PMUX_PINGRP_SDMMC4_DAT7_PAA7] = "sdmmc4_dat7_paa7",
+ [PMUX_PINGRP_CAM_MCLK_PCC0] = "cam_mclk_pcc0",
+ [PMUX_PINGRP_PCC1] = "pcc1",
+ [PMUX_PINGRP_PBB0] = "pbb0",
+ [PMUX_PINGRP_CAM_I2C_SCL_PBB1] = "cam_i2c_scl_pbb1",
+ [PMUX_PINGRP_CAM_I2C_SDA_PBB2] = "cam_i2c_sda_pbb2",
+ [PMUX_PINGRP_PBB3] = "pbb3",
+ [PMUX_PINGRP_PBB4] = "pbb4",
+ [PMUX_PINGRP_PBB5] = "pbb5",
+ [PMUX_PINGRP_PBB6] = "pbb6",
+ [PMUX_PINGRP_PBB7] = "pbb7",
+ [PMUX_PINGRP_PCC2] = "pcc2",
+ [PMUX_PINGRP_JTAG_RTCK] = "jtag_rtck",
+ [PMUX_PINGRP_PWR_I2C_SCL_PZ6] = "pwr_i2c_scl_pz6",
+ [PMUX_PINGRP_PWR_I2C_SDA_PZ7] = "pwr_i2c_sda_pz7",
+ [PMUX_PINGRP_KB_ROW0_PR0] = "kb_row0_pr0",
+ [PMUX_PINGRP_KB_ROW1_PR1] = "kb_row1_pr1",
+ [PMUX_PINGRP_KB_ROW2_PR2] = "kb_row2_pr2",
+ [PMUX_PINGRP_KB_ROW3_PR3] = "kb_row3_pr3",
+ [PMUX_PINGRP_KB_ROW4_PR4] = "kb_row4_pr4",
+ [PMUX_PINGRP_KB_ROW5_PR5] = "kb_row5_pr5",
+ [PMUX_PINGRP_KB_ROW6_PR6] = "kb_row6_pr6",
+ [PMUX_PINGRP_KB_ROW7_PR7] = "kb_row7_pr7",
+ [PMUX_PINGRP_KB_ROW8_PS0] = "kb_row8_ps0",
+ [PMUX_PINGRP_KB_ROW9_PS1] = "kb_row9_ps1",
+ [PMUX_PINGRP_KB_ROW10_PS2] = "kb_row10_ps2",
+ [PMUX_PINGRP_KB_ROW11_PS3] = "kb_row11_ps3",
+ [PMUX_PINGRP_KB_ROW12_PS4] = "kb_row12_ps4",
+ [PMUX_PINGRP_KB_ROW13_PS5] = "kb_row13_ps5",
+ [PMUX_PINGRP_KB_ROW14_PS6] = "kb_row14_ps6",
+ [PMUX_PINGRP_KB_ROW15_PS7] = "kb_row15_ps7",
+ [PMUX_PINGRP_KB_COL0_PQ0] = "kb_col0_pq0",
+ [PMUX_PINGRP_KB_COL1_PQ1] = "kb_col1_pq1",
+ [PMUX_PINGRP_KB_COL2_PQ2] = "kb_col2_pq2",
+ [PMUX_PINGRP_KB_COL3_PQ3] = "kb_col3_pq3",
+ [PMUX_PINGRP_KB_COL4_PQ4] = "kb_col4_pq4",
+ [PMUX_PINGRP_KB_COL5_PQ5] = "kb_col5_pq5",
+ [PMUX_PINGRP_KB_COL6_PQ6] = "kb_col6_pq6",
+ [PMUX_PINGRP_KB_COL7_PQ7] = "kb_col7_pq7",
+ [PMUX_PINGRP_CLK_32K_OUT_PA0] = "clk_32k_out_pa0",
+ [PMUX_PINGRP_CORE_PWR_REQ] = "core_pwr_req",
+ [PMUX_PINGRP_CPU_PWR_REQ] = "cpu_pwr_req",
+ [PMUX_PINGRP_PWR_INT_N] = "pwr_int_n",
+ [PMUX_PINGRP_CLK_32K_IN] = "clk_32k_in",
+ [PMUX_PINGRP_OWR] = "owr",
+ [PMUX_PINGRP_DAP1_FS_PN0] = "dap1_fs_pn0",
+ [PMUX_PINGRP_DAP1_DIN_PN1] = "dap1_din_pn1",
+ [PMUX_PINGRP_DAP1_DOUT_PN2] = "dap1_dout_pn2",
+ [PMUX_PINGRP_DAP1_SCLK_PN3] = "dap1_sclk_pn3",
+ [PMUX_PINGRP_DAP_MCLK1_REQ_PEE2] = "dap_mclk1_req_pee2",
+ [PMUX_PINGRP_DAP_MCLK1_PW4] = "dap_mclk1_pw4",
+ [PMUX_PINGRP_SPDIF_IN_PK6] = "spdif_in_pk6",
+ [PMUX_PINGRP_SPDIF_OUT_PK5] = "spdif_out_pk5",
+ [PMUX_PINGRP_DAP2_FS_PA2] = "dap2_fs_pa2",
+ [PMUX_PINGRP_DAP2_DIN_PA4] = "dap2_din_pa4",
+ [PMUX_PINGRP_DAP2_DOUT_PA5] = "dap2_dout_pa5",
+ [PMUX_PINGRP_DAP2_SCLK_PA3] = "dap2_sclk_pa3",
+ [PMUX_PINGRP_DVFS_PWM_PX0] = "dvfs_pwm_px0",
+ [PMUX_PINGRP_GPIO_X1_AUD_PX1] = "gpio_x1_aud_px1",
+ [PMUX_PINGRP_GPIO_X3_AUD_PX3] = "gpio_x3_aud_px3",
+ [PMUX_PINGRP_DVFS_CLK_PX2] = "dvfs_clk_px2",
+ [PMUX_PINGRP_GPIO_X4_AUD_PX4] = "gpio_x4_aud_px4",
+ [PMUX_PINGRP_GPIO_X5_AUD_PX5] = "gpio_x5_aud_px5",
+ [PMUX_PINGRP_GPIO_X6_AUD_PX6] = "gpio_x6_aud_px6",
+ [PMUX_PINGRP_GPIO_X7_AUD_PX7] = "gpio_x7_aud_px7",
+ [PMUX_PINGRP_SDMMC3_CLK_PA6] = "sdmmc3_clk_pa6",
+ [PMUX_PINGRP_SDMMC3_CMD_PA7] = "sdmmc3_cmd_pa7",
+ [PMUX_PINGRP_SDMMC3_DAT0_PB7] = "sdmmc3_dat0_pb7",
+ [PMUX_PINGRP_SDMMC3_DAT1_PB6] = "sdmmc3_dat1_pb6",
+ [PMUX_PINGRP_SDMMC3_DAT2_PB5] = "sdmmc3_dat2_pb5",
+ [PMUX_PINGRP_SDMMC3_DAT3_PB4] = "sdmmc3_dat3_pb4",
+ [PMUX_PINGRP_PEX_L0_RST_N_PDD1] = "pex_l0_rst_n_pdd1",
+ [PMUX_PINGRP_PEX_L0_CLKREQ_N_PDD2] = "pex_l0_clkreq_n_pdd2",
+ [PMUX_PINGRP_PEX_WAKE_N_PDD3] = "pex_wake_n_pdd3",
+ [PMUX_PINGRP_PEX_L1_RST_N_PDD5] = "pex_l1_rst_n_pdd5",
+ [PMUX_PINGRP_PEX_L1_CLKREQ_N_PDD6] = "pex_l1_clkreq_n_pdd6",
+ [PMUX_PINGRP_HDMI_CEC_PEE3] = "hdmi_cec_pee3",
+ [PMUX_PINGRP_SDMMC1_WP_N_PV3] = "sdmmc1_wp_n_pv3",
+ [PMUX_PINGRP_SDMMC3_CD_N_PV2] = "sdmmc3_cd_n_pv2",
+ [PMUX_PINGRP_GPIO_W2_AUD_PW2] = "gpio_w2_aud_pw2",
+ [PMUX_PINGRP_GPIO_W3_AUD_PW3] = "gpio_w3_aud_pw3",
+ [PMUX_PINGRP_USB_VBUS_EN0_PN4] = "usb_vbus_en0_pn4",
+ [PMUX_PINGRP_USB_VBUS_EN1_PN5] = "usb_vbus_en1_pn5",
+ [PMUX_PINGRP_SDMMC3_CLK_LB_IN_PEE5] = "sdmmc3_clk_lb_in_pee5",
+ [PMUX_PINGRP_SDMMC3_CLK_LB_OUT_PEE4] = "sdmmc3_clk_lb_out_pee4",
+ [PMUX_PINGRP_GMI_CLK_LB] = "gmi_clk_lb",
+ [PMUX_PINGRP_RESET_OUT_N] = "reset_out_n",
+ [PMUX_PINGRP_KB_ROW16_PT0] = "kb_row16_pt0",
+ [PMUX_PINGRP_KB_ROW17_PT1] = "kb_row17_pt1",
+ [PMUX_PINGRP_USB_VBUS_EN2_PFF1] = "usb_vbus_en2_pff1",
+ [PMUX_PINGRP_PFF2] = "pff2",
+ [PMUX_PINGRP_DP_HPD_PFF0] = "dp_hpd_pff0",
+};
+
+static const char * const tegra_pinctrl_to_drvgrp[] = {
+ [PMUX_DRVGRP_AO1] = "ao1",
+ [PMUX_DRVGRP_AO2] = "ao2",
+ [PMUX_DRVGRP_AT1] = "at1",
+ [PMUX_DRVGRP_AT2] = "at2",
+ [PMUX_DRVGRP_AT3] = "at3",
+ [PMUX_DRVGRP_AT4] = "at4",
+ [PMUX_DRVGRP_AT5] = "at5",
+ [PMUX_DRVGRP_CDEV1] = "cdev1",
+ [PMUX_DRVGRP_CDEV2] = "cdev2",
+ [PMUX_DRVGRP_DAP1] = "dap1",
+ [PMUX_DRVGRP_DAP2] = "dap2",
+ [PMUX_DRVGRP_DAP3] = "dap3",
+ [PMUX_DRVGRP_DAP4] = "dap4",
+ [PMUX_DRVGRP_DBG] = "dbg",
+ [PMUX_DRVGRP_SDIO3] = "sdio3",
+ [PMUX_DRVGRP_SPI] = "spi",
+ [PMUX_DRVGRP_UAA] = "uaa",
+ [PMUX_DRVGRP_UAB] = "uab",
+ [PMUX_DRVGRP_UART2] = "uart2",
+ [PMUX_DRVGRP_UART3] = "uart3",
+ [PMUX_DRVGRP_SDIO1] = "sdio1",
+ [PMUX_DRVGRP_DDC] = "ddc",
+ [PMUX_DRVGRP_GMA] = "gma",
+ [PMUX_DRVGRP_GME] = "gme",
+ [PMUX_DRVGRP_GMF] = "gmf",
+ [PMUX_DRVGRP_GMG] = "gmg",
+ [PMUX_DRVGRP_GMH] = "gmh",
+ [PMUX_DRVGRP_OWR] = "owr",
+ [PMUX_DRVGRP_UDA] = "uda",
+ [PMUX_DRVGRP_GPV] = "gpv",
+ [PMUX_DRVGRP_DEV3] = "dev3",
+ [PMUX_DRVGRP_CEC] = "cec",
+ [PMUX_DRVGRP_AT6] = "at6",
+ [PMUX_DRVGRP_DAP5] = "dap5",
+ [PMUX_DRVGRP_USB_VBUS_EN] = "usb_vbus_en",
+ [PMUX_DRVGRP_AO3] = "ao3",
+ [PMUX_DRVGRP_AO0] = "ao0",
+ [PMUX_DRVGRP_HV0] = "hv0",
+ [PMUX_DRVGRP_SDIO4] = "sdio4",
+ [PMUX_DRVGRP_AO4] = "ao4",
+};
+
+static const char * const tegra_pinctrl_to_func[] = {
+ [PMUX_FUNC_DEFAULT] = "default",
+ [PMUX_FUNC_BLINK] = "blink",
+ [PMUX_FUNC_CCLA] = "ccla",
+ [PMUX_FUNC_CEC] = "cec",
+ [PMUX_FUNC_CLDVFS] = "cldvfs",
+ [PMUX_FUNC_CLK] = "clk",
+ [PMUX_FUNC_CLK12] = "clk12",
+ [PMUX_FUNC_CPU] = "cpu",
+ [PMUX_FUNC_CSI] = "csi",
+ [PMUX_FUNC_DAP] = "dap",
+ [PMUX_FUNC_DAP1] = "dap1",
+ [PMUX_FUNC_DAP2] = "dap2",
+ [PMUX_FUNC_DEV3] = "dev3",
+ [PMUX_FUNC_DISPLAYA] = "displaya",
+ [PMUX_FUNC_DISPLAYA_ALT] = "displaya_alt",
+ [PMUX_FUNC_DISPLAYB] = "displayb",
+ [PMUX_FUNC_DP] = "dp",
+ [PMUX_FUNC_DSI_B] = "dsi_b",
+ [PMUX_FUNC_DTV] = "dtv",
+ [PMUX_FUNC_EXTPERIPH1] = "extperiph1",
+ [PMUX_FUNC_EXTPERIPH2] = "extperiph2",
+ [PMUX_FUNC_EXTPERIPH3] = "extperiph3",
+ [PMUX_FUNC_GMI] = "gmi",
+ [PMUX_FUNC_GMI_ALT] = "gmi_alt",
+ [PMUX_FUNC_HDA] = "hda",
+ [PMUX_FUNC_HSI] = "hsi",
+ [PMUX_FUNC_I2C1] = "i2c1",
+ [PMUX_FUNC_I2C2] = "i2c2",
+ [PMUX_FUNC_I2C3] = "i2c3",
+ [PMUX_FUNC_I2C4] = "i2c4",
+ [PMUX_FUNC_I2CPWR] = "i2cpwr",
+ [PMUX_FUNC_I2S0] = "i2s0",
+ [PMUX_FUNC_I2S1] = "i2s1",
+ [PMUX_FUNC_I2S2] = "i2s2",
+ [PMUX_FUNC_I2S3] = "i2s3",
+ [PMUX_FUNC_I2S4] = "i2s4",
+ [PMUX_FUNC_IRDA] = "irda",
+ [PMUX_FUNC_KBC] = "kbc",
+ [PMUX_FUNC_OWR] = "owr",
+ [PMUX_FUNC_PE] = "pe",
+ [PMUX_FUNC_PE0] = "pe0",
+ [PMUX_FUNC_PE1] = "pe1",
+ [PMUX_FUNC_PMI] = "pmi",
+ [PMUX_FUNC_PWM0] = "pwm0",
+ [PMUX_FUNC_PWM1] = "pwm1",
+ [PMUX_FUNC_PWM2] = "pwm2",
+ [PMUX_FUNC_PWM3] = "pwm3",
+ [PMUX_FUNC_PWRON] = "pwron",
+ [PMUX_FUNC_RESET_OUT_N] = "reset_out_n",
+ [PMUX_FUNC_RTCK] = "rtck",
+ [PMUX_FUNC_SATA] = "sata",
+ [PMUX_FUNC_SDMMC1] = "sdmmc1",
+ [PMUX_FUNC_SDMMC2] = "sdmmc2",
+ [PMUX_FUNC_SDMMC3] = "sdmmc3",
+ [PMUX_FUNC_SDMMC4] = "sdmmc4",
+ [PMUX_FUNC_SOC] = "soc",
+ [PMUX_FUNC_SPDIF] = "spdif",
+ [PMUX_FUNC_SPI1] = "spi1",
+ [PMUX_FUNC_SPI2] = "spi2",
+ [PMUX_FUNC_SPI3] = "spi3",
+ [PMUX_FUNC_SPI4] = "spi4",
+ [PMUX_FUNC_SPI5] = "spi5",
+ [PMUX_FUNC_SPI6] = "spi6",
+ [PMUX_FUNC_SYS] = "sys",
+ [PMUX_FUNC_TMDS] = "tmds",
+ [PMUX_FUNC_TRACE] = "trace",
+ [PMUX_FUNC_UARTA] = "uarta",
+ [PMUX_FUNC_UARTB] = "uartb",
+ [PMUX_FUNC_UARTC] = "uartc",
+ [PMUX_FUNC_UARTD] = "uartd",
+ [PMUX_FUNC_ULPI] = "ulpi",
+ [PMUX_FUNC_USB] = "usb",
+ [PMUX_FUNC_VGP1] = "vgp1",
+ [PMUX_FUNC_VGP2] = "vgp2",
+ [PMUX_FUNC_VGP3] = "vgp3",
+ [PMUX_FUNC_VGP4] = "vgp4",
+ [PMUX_FUNC_VGP5] = "vgp5",
+ [PMUX_FUNC_VGP6] = "vgp6",
+ [PMUX_FUNC_VI] = "vi",
+ [PMUX_FUNC_VI_ALT1] = "vi_alt1",
+ [PMUX_FUNC_VI_ALT3] = "vi_alt3",
+ [PMUX_FUNC_VIMCLK2] = "vimclk2",
+ [PMUX_FUNC_VIMCLK2_ALT] = "vimclk2_alt",
+ [PMUX_FUNC_RSVD1] = "rsvd1",
+ [PMUX_FUNC_RSVD2] = "rsvd2",
+ [PMUX_FUNC_RSVD3] = "rsvd3",
+ [PMUX_FUNC_RSVD4] = "rsvd4",
+};
+
#define TEGRA_PMX_SOC_DRV_GROUP_BASE_REG 0x868
#define TEGRA_PMX_SOC_MIPIPADCTRL_BASE_REG 0x820
#define TEGRA_PMX_SOC_HAS_IO_CLAMPING
diff --git a/arch/arm/include/asm/arch-tegra20/pinmux.h b/arch/arm/include/asm/arch-tegra20/pinmux.h
index e9e3801..8c8579e 100644
--- a/arch/arm/include/asm/arch-tegra20/pinmux.h
+++ b/arch/arm/include/asm/arch-tegra20/pinmux.h
@@ -159,6 +159,47 @@
PMUX_PINGRP_COUNT,
};
+enum pmux_drvgrp {
+ PMUX_DRVGRP_AO1,
+ PMUX_DRVGRP_AO2,
+ PMUX_DRVGRP_AT1,
+ PMUX_DRVGRP_AT2,
+ PMUX_DRVGRP_CDEV1,
+ PMUX_DRVGRP_CDEV2,
+ PMUX_DRVGRP_CSUS,
+ PMUX_DRVGRP_DAP1,
+ PMUX_DRVGRP_DAP2,
+ PMUX_DRVGRP_DAP3,
+ PMUX_DRVGRP_DAP4,
+ PMUX_DRVGRP_DBG,
+ PMUX_DRVGRP_LCD1,
+ PMUX_DRVGRP_LCD2,
+ PMUX_DRVGRP_SDIO2,
+ PMUX_DRVGRP_SDIO3,
+ PMUX_DRVGRP_SPI,
+ PMUX_DRVGRP_UAA,
+ PMUX_DRVGRP_UAB,
+ PMUX_DRVGRP_UART2,
+ PMUX_DRVGRP_UART3,
+ PMUX_DRVGRP_VI1,
+ PMUX_DRVGRP_VI2,
+ PMUX_DRVGRP_XM2A,
+ PMUX_DRVGRP_XM2C,
+ PMUX_DRVGRP_XM2D,
+ PMUX_DRVGRP_XM2CLK,
+ PMUX_DRVGRP_SDIO1 = (0x78 / 4),
+ PMUX_DRVGRP_CRT = (0x84 / 4),
+ PMUX_DRVGRP_DDC,
+ PMUX_DRVGRP_GMA,
+ PMUX_DRVGRP_GMB,
+ PMUX_DRVGRP_GMC,
+ PMUX_DRVGRP_GMD,
+ PMUX_DRVGRP_GME,
+ PMUX_DRVGRP_OWR,
+ PMUX_DRVGRP_UDA,
+ PMUX_DRVGRP_COUNT,
+};
+
/*
* Functions which can be assigned to each of the pin groups. The values here
* bear no relation to the values programmed into pinmux registers and are
@@ -232,6 +273,256 @@
PMUX_FUNC_COUNT,
};
+static const char * const tegra_pinctrl_to_pingrp[] = {
+ /* APB_MISC_PP_TRISTATE_REG_A_0 */
+ [PMUX_PINGRP_ATA] = "ata",
+ [PMUX_PINGRP_ATB] = "atb",
+ [PMUX_PINGRP_ATC] = "atc",
+ [PMUX_PINGRP_ATD] = "atd",
+ [PMUX_PINGRP_CDEV1] = "cdev1",
+ [PMUX_PINGRP_CDEV2] = "cdev2",
+ [PMUX_PINGRP_CSUS] = "csus",
+ [PMUX_PINGRP_DAP1] = "dap1",
+
+ [PMUX_PINGRP_DAP2] = "dap2",
+ [PMUX_PINGRP_DAP3] = "dap3",
+ [PMUX_PINGRP_DAP4] = "dap4",
+ [PMUX_PINGRP_DTA] = "dta",
+ [PMUX_PINGRP_DTB] = "dtb",
+ [PMUX_PINGRP_DTC] = "dtc",
+ [PMUX_PINGRP_DTD] = "dtd",
+ [PMUX_PINGRP_DTE] = "dte",
+
+ [PMUX_PINGRP_GPU] = "gpu",
+ [PMUX_PINGRP_GPV] = "gpv",
+ [PMUX_PINGRP_I2CP] = "i2cp",
+ [PMUX_PINGRP_IRTX] = "irtx",
+ [PMUX_PINGRP_IRRX] = "irrx",
+ [PMUX_PINGRP_KBCB] = "kbcb",
+ [PMUX_PINGRP_KBCA] = "kbca",
+ [PMUX_PINGRP_PMC] = "pmc",
+
+ [PMUX_PINGRP_PTA] = "pta",
+ [PMUX_PINGRP_RM] = "rm",
+ [PMUX_PINGRP_KBCE] = "kbce",
+ [PMUX_PINGRP_KBCF] = "kbcf",
+ [PMUX_PINGRP_GMA] = "gma",
+ [PMUX_PINGRP_GMC] = "gmc",
+ [PMUX_PINGRP_SDIO1] = "sdio1",
+ [PMUX_PINGRP_OWC] = "owc",
+
+ /* 32: APB_MISC_PP_TRISTATE_REG_B_0 */
+ [PMUX_PINGRP_GME] = "gme",
+ [PMUX_PINGRP_SDC] = "sdc",
+ [PMUX_PINGRP_SDD] = "sdd",
+ [PMUX_PINGRP_RESERVED0] = "reserved0",
+ [PMUX_PINGRP_SLXA] = "slxa",
+ [PMUX_PINGRP_SLXC] = "slxc",
+ [PMUX_PINGRP_SLXD] = "slxd",
+ [PMUX_PINGRP_SLXK] = "slxk",
+
+ [PMUX_PINGRP_SPDI] = "spdi",
+ [PMUX_PINGRP_SPDO] = "spdo",
+ [PMUX_PINGRP_SPIA] = "spia",
+ [PMUX_PINGRP_SPIB] = "spib",
+ [PMUX_PINGRP_SPIC] = "spic",
+ [PMUX_PINGRP_SPID] = "spid",
+ [PMUX_PINGRP_SPIE] = "spie",
+ [PMUX_PINGRP_SPIF] = "spif",
+
+ [PMUX_PINGRP_SPIG] = "spig",
+ [PMUX_PINGRP_SPIH] = "spih",
+ [PMUX_PINGRP_UAA] = "uaa",
+ [PMUX_PINGRP_UAB] = "uab",
+ [PMUX_PINGRP_UAC] = "uac",
+ [PMUX_PINGRP_UAD] = "uad",
+ [PMUX_PINGRP_UCA] = "uca",
+ [PMUX_PINGRP_UCB] = "ucb",
+
+ [PMUX_PINGRP_RESERVED1] = "reserved1",
+ [PMUX_PINGRP_ATE] = "ate",
+ [PMUX_PINGRP_KBCC] = "kbcc",
+ [PMUX_PINGRP_RESERVED2] = "reserved2",
+ [PMUX_PINGRP_RESERVED3] = "reserved3",
+ [PMUX_PINGRP_GMB] = "gmb",
+ [PMUX_PINGRP_GMD] = "gmd",
+ [PMUX_PINGRP_DDC] = "ddc",
+
+ /* 64: APB_MISC_PP_TRISTATE_REG_C_0 */
+ [PMUX_PINGRP_LD0] = "ld0",
+ [PMUX_PINGRP_LD1] = "ld1",
+ [PMUX_PINGRP_LD2] = "ld2",
+ [PMUX_PINGRP_LD3] = "ld3",
+ [PMUX_PINGRP_LD4] = "ld4",
+ [PMUX_PINGRP_LD5] = "ld5",
+ [PMUX_PINGRP_LD6] = "ld6",
+ [PMUX_PINGRP_LD7] = "ld7",
+
+ [PMUX_PINGRP_LD8] = "ld8",
+ [PMUX_PINGRP_LD9] = "ld9",
+ [PMUX_PINGRP_LD10] = "ld10",
+ [PMUX_PINGRP_LD11] = "ld11",
+ [PMUX_PINGRP_LD12] = "ld12",
+ [PMUX_PINGRP_LD13] = "ld13",
+ [PMUX_PINGRP_LD14] = "ld14",
+ [PMUX_PINGRP_LD15] = "ld15",
+
+ [PMUX_PINGRP_LD16] = "ld16",
+ [PMUX_PINGRP_LD17] = "ld17",
+ [PMUX_PINGRP_LHP0] = "lhp0",
+ [PMUX_PINGRP_LHP1] = "lhp1",
+ [PMUX_PINGRP_LHP2] = "lhp2",
+ [PMUX_PINGRP_LVP0] = "lvp0",
+ [PMUX_PINGRP_LVP1] = "lvp1",
+ [PMUX_PINGRP_HDINT] = "hdint",
+
+ [PMUX_PINGRP_LM0] = "lm0",
+ [PMUX_PINGRP_LM1] = "lm1",
+ [PMUX_PINGRP_LVS] = "lvs",
+ [PMUX_PINGRP_LSC0] = "lsc0",
+ [PMUX_PINGRP_LSC1] = "lsc1",
+ [PMUX_PINGRP_LSCK] = "lsck",
+ [PMUX_PINGRP_LDC] = "ldc",
+ [PMUX_PINGRP_LCSN] = "lcsn",
+
+ /* 96: APB_MISC_PP_TRISTATE_REG_D_0 */
+ [PMUX_PINGRP_LSPI] = "lspi",
+ [PMUX_PINGRP_LSDA] = "lsda",
+ [PMUX_PINGRP_LSDI] = "lsdi",
+ [PMUX_PINGRP_LPW0] = "lpw0",
+ [PMUX_PINGRP_LPW1] = "lpw1",
+ [PMUX_PINGRP_LPW2] = "lpw2",
+ [PMUX_PINGRP_LDI] = "ldi",
+ [PMUX_PINGRP_LHS] = "lhs",
+
+ [PMUX_PINGRP_LPP] = "lpp",
+ [PMUX_PINGRP_RESERVED4] = "reserved4",
+ [PMUX_PINGRP_KBCD] = "kbcd",
+ [PMUX_PINGRP_GPU7] = "gpu7",
+ [PMUX_PINGRP_DTF] = "dtf",
+ [PMUX_PINGRP_UDA] = "uda",
+ [PMUX_PINGRP_CRTP] = "crtp",
+ [PMUX_PINGRP_SDB] = "sdb",
+
+ /* these pin groups only have pullup and pull down control */
+ [PMUX_PINGRP_CK32] = "ck32",
+ [PMUX_PINGRP_DDRC] = "ddrc",
+ [PMUX_PINGRP_PMCA] = "pmca",
+ [PMUX_PINGRP_PMCB] = "pmcb",
+ [PMUX_PINGRP_PMCC] = "pmcc",
+ [PMUX_PINGRP_PMCD] = "pmcd",
+ [PMUX_PINGRP_PMCE] = "pmce",
+ [PMUX_PINGRP_XM2C] = "xm2c",
+ [PMUX_PINGRP_XM2D] = "xm2d",
+};
+
+static const char * const tegra_pinctrl_to_drvgrp[] = {
+ [PMUX_DRVGRP_AO1] = "drive_ao1",
+ [PMUX_DRVGRP_AO2] = "drive_ao2",
+ [PMUX_DRVGRP_AT1] = "drive_at1",
+ [PMUX_DRVGRP_AT2] = "drive_at2",
+ [PMUX_DRVGRP_CDEV1] = "drive_cdev1",
+ [PMUX_DRVGRP_CDEV2] = "drive_cdev2",
+ [PMUX_DRVGRP_CSUS] = "drive_csus",
+ [PMUX_DRVGRP_DAP1] = "drive_dap1",
+ [PMUX_DRVGRP_DAP2] = "drive_dap2",
+ [PMUX_DRVGRP_DAP3] = "drive_dap3",
+ [PMUX_DRVGRP_DAP4] = "drive_dap4",
+ [PMUX_DRVGRP_DBG] = "drive_dbg",
+ [PMUX_DRVGRP_LCD1] = "drive_lcd1",
+ [PMUX_DRVGRP_LCD2] = "drive_lcd2",
+ [PMUX_DRVGRP_SDIO2] = "drive_sdio2",
+ [PMUX_DRVGRP_SDIO3] = "drive_sdio3",
+ [PMUX_DRVGRP_SPI] = "drive_spi",
+ [PMUX_DRVGRP_UAA] = "drive_uaa",
+ [PMUX_DRVGRP_UAB] = "drive_uab",
+ [PMUX_DRVGRP_UART2] = "drive_uart2",
+ [PMUX_DRVGRP_UART3] = "drive_uart3",
+ [PMUX_DRVGRP_VI1] = "drive_vi1",
+ [PMUX_DRVGRP_VI2] = "drive_vi2",
+ [PMUX_DRVGRP_XM2A] = "drive_xm2a",
+ [PMUX_DRVGRP_XM2C] = "drive_xm2c",
+ [PMUX_DRVGRP_XM2D] = "drive_xm2d",
+ [PMUX_DRVGRP_XM2CLK] = "drive_xm2clk",
+ [PMUX_DRVGRP_SDIO1] = "drive_sdio1",
+ [PMUX_DRVGRP_CRT] = "drive_crt",
+ [PMUX_DRVGRP_DDC] = "drive_ddc",
+ [PMUX_DRVGRP_GMA] = "drive_gma",
+ [PMUX_DRVGRP_GMB] = "drive_gmb",
+ [PMUX_DRVGRP_GMC] = "drive_gmc",
+ [PMUX_DRVGRP_GMD] = "drive_gmd",
+ [PMUX_DRVGRP_GME] = "drive_gme",
+ [PMUX_DRVGRP_OWR] = "drive_owr",
+ [PMUX_DRVGRP_UDA] = "drive_uda",
+};
+
+static const char * const tegra_pinctrl_to_func[] = {
+ [PMUX_FUNC_DEFAULT] = "default",
+ [PMUX_FUNC_AHB_CLK] = "ahb_clk",
+ [PMUX_FUNC_APB_CLK] = "apb_clk",
+ [PMUX_FUNC_AUDIO_SYNC] = "audio_sync",
+ [PMUX_FUNC_CRT] = "crt",
+ [PMUX_FUNC_DAP1] = "dap1",
+ [PMUX_FUNC_DAP2] = "dap2",
+ [PMUX_FUNC_DAP3] = "dap3",
+ [PMUX_FUNC_DAP4] = "dap4",
+ [PMUX_FUNC_DAP5] = "dap5",
+ [PMUX_FUNC_DISPA] = "dispa",
+ [PMUX_FUNC_DISPB] = "dispb",
+ [PMUX_FUNC_EMC_TEST0_DLL] = "emc_test0_dll",
+ [PMUX_FUNC_EMC_TEST1_DLL] = "emc_test1_dll",
+ [PMUX_FUNC_GMI] = "gmi",
+ [PMUX_FUNC_GMI_INT] = "gmi_int",
+ [PMUX_FUNC_HDMI] = "hdmi",
+ [PMUX_FUNC_I2C] = "i2c",
+ [PMUX_FUNC_I2C2] = "i2c2",
+ [PMUX_FUNC_I2C3] = "i2c3",
+ [PMUX_FUNC_IDE] = "ide",
+ [PMUX_FUNC_KBC] = "kbc",
+ [PMUX_FUNC_MIO] = "mio",
+ [PMUX_FUNC_MIPI_HS] = "mipi_hs",
+ [PMUX_FUNC_NAND] = "nand",
+ [PMUX_FUNC_OSC] = "osc",
+ [PMUX_FUNC_OWR] = "owr",
+ [PMUX_FUNC_PCIE] = "pcie",
+ [PMUX_FUNC_PLLA_OUT] = "plla_out",
+ [PMUX_FUNC_PLLC_OUT1] = "pllc_out1",
+ [PMUX_FUNC_PLLM_OUT1] = "pllm_out1",
+ [PMUX_FUNC_PLLP_OUT2] = "pllp_out2",
+ [PMUX_FUNC_PLLP_OUT3] = "pllp_out3",
+ [PMUX_FUNC_PLLP_OUT4] = "pllp_out4",
+ [PMUX_FUNC_PWM] = "pwm",
+ [PMUX_FUNC_PWR_INTR] = "pwr_intr",
+ [PMUX_FUNC_PWR_ON] = "pwr_on",
+ [PMUX_FUNC_RTCK] = "rtck",
+ [PMUX_FUNC_SDIO1] = "sdio1",
+ [PMUX_FUNC_SDIO2] = "sdio2",
+ [PMUX_FUNC_SDIO3] = "sdio3",
+ [PMUX_FUNC_SDIO4] = "sdio4",
+ [PMUX_FUNC_SFLASH] = "sflash",
+ [PMUX_FUNC_SPDIF] = "spdif",
+ [PMUX_FUNC_SPI1] = "spi1",
+ [PMUX_FUNC_SPI2] = "spi2",
+ [PMUX_FUNC_SPI2_ALT] = "spi2_alt",
+ [PMUX_FUNC_SPI3] = "spi3",
+ [PMUX_FUNC_SPI4] = "spi4",
+ [PMUX_FUNC_TRACE] = "trace",
+ [PMUX_FUNC_TWC] = "twc",
+ [PMUX_FUNC_UARTA] = "uarta",
+ [PMUX_FUNC_UARTB] = "uartb",
+ [PMUX_FUNC_UARTC] = "uartc",
+ [PMUX_FUNC_UARTD] = "uartd",
+ [PMUX_FUNC_UARTE] = "uarte",
+ [PMUX_FUNC_ULPI] = "ulpi",
+ [PMUX_FUNC_VI] = "vi",
+ [PMUX_FUNC_VI_SENSOR_CLK] = "vi_sensor_clk",
+ [PMUX_FUNC_XIO] = "xio",
+ [PMUX_FUNC_RSVD1] = "rsvd1",
+ [PMUX_FUNC_RSVD2] = "rsvd2",
+ [PMUX_FUNC_RSVD3] = "rsvd3",
+ [PMUX_FUNC_RSVD4] = "rsvd4",
+};
+
#define TEGRA_PMX_SOC_DRV_GROUP_BASE_REG 0x868
#include <asm/arch-tegra/pinmux.h>
diff --git a/arch/arm/include/asm/arch-tegra210/pinmux.h b/arch/arm/include/asm/arch-tegra210/pinmux.h
index 9e94074..062d724 100644
--- a/arch/arm/include/asm/arch-tegra210/pinmux.h
+++ b/arch/arm/include/asm/arch-tegra210/pinmux.h
@@ -403,6 +403,400 @@
PMUX_FUNC_COUNT,
};
+static const char * const tegra_pinctrl_to_pingrp[] = {
+ [PMUX_PINGRP_SDMMC1_CLK_PM0] = "sdmmc1_clk_pm0",
+ [PMUX_PINGRP_SDMMC1_CMD_PM1] = "sdmmc1_cmd_pm1",
+ [PMUX_PINGRP_SDMMC1_DAT3_PM2] = "sdmmc1_dat3_pm2",
+ [PMUX_PINGRP_SDMMC1_DAT2_PM3] = "sdmmc1_dat2_pm3",
+ [PMUX_PINGRP_SDMMC1_DAT1_PM4] = "sdmmc1_dat1_pm4",
+ [PMUX_PINGRP_SDMMC1_DAT0_PM5] = "sdmmc1_dat0_pm5",
+ [PMUX_PINGRP_SDMMC3_CLK_PP0] = "sdmmc3_clk_pp0",
+ [PMUX_PINGRP_SDMMC3_CMD_PP1] = "sdmmc3_cmd_pp1",
+ [PMUX_PINGRP_SDMMC3_DAT0_PP5] = "sdmmc3_dat0_pp5",
+ [PMUX_PINGRP_SDMMC3_DAT1_PP4] = "sdmmc3_dat1_pp4",
+ [PMUX_PINGRP_SDMMC3_DAT2_PP3] = "sdmmc3_dat2_pp3",
+ [PMUX_PINGRP_SDMMC3_DAT3_PP2] = "sdmmc3_dat3_pp2",
+ [PMUX_PINGRP_PEX_L0_RST_N_PA0] = "pex_l0_rst_n_pa0",
+ [PMUX_PINGRP_PEX_L0_CLKREQ_N_PA1] = "pex_l0_clkreq_n_pa1",
+ [PMUX_PINGRP_PEX_WAKE_N_PA2] = "pex_wake_n_pa2",
+ [PMUX_PINGRP_PEX_L1_RST_N_PA3] = "pex_l1_rst_n_pa3",
+ [PMUX_PINGRP_PEX_L1_CLKREQ_N_PA4] = "pex_l1_clkreq_n_pa4",
+ [PMUX_PINGRP_SATA_LED_ACTIVE_PA5] = "sata_led_active_pa5",
+ [PMUX_PINGRP_SPI1_MOSI_PC0] = "spi1_mosi_pc0",
+ [PMUX_PINGRP_SPI1_MISO_PC1] = "spi1_miso_pc1",
+ [PMUX_PINGRP_SPI1_SCK_PC2] = "spi1_sck_pc2",
+ [PMUX_PINGRP_SPI1_CS0_PC3] = "spi1_cs0_pc3",
+ [PMUX_PINGRP_SPI1_CS1_PC4] = "spi1_cs1_pc4",
+ [PMUX_PINGRP_SPI2_MOSI_PB4] = "spi2_mosi_pb4",
+ [PMUX_PINGRP_SPI2_MISO_PB5] = "spi2_miso_pb5",
+ [PMUX_PINGRP_SPI2_SCK_PB6] = "spi2_sck_pb6",
+ [PMUX_PINGRP_SPI2_CS0_PB7] = "spi2_cs0_pb7",
+ [PMUX_PINGRP_SPI2_CS1_PDD0] = "spi2_cs1_pdd0",
+ [PMUX_PINGRP_SPI4_MOSI_PC7] = "spi4_mosi_pc7",
+ [PMUX_PINGRP_SPI4_MISO_PD0] = "spi4_miso_pd0",
+ [PMUX_PINGRP_SPI4_SCK_PC5] = "spi4_sck_pc5",
+ [PMUX_PINGRP_SPI4_CS0_PC6] = "spi4_cs0_pc6",
+ [PMUX_PINGRP_QSPI_SCK_PEE0] = "qspi_sck_pee0",
+ [PMUX_PINGRP_QSPI_CS_N_PEE1] = "qspi_cs_n_pee1",
+ [PMUX_PINGRP_QSPI_IO0_PEE2] = "qspi_io0_pee2",
+ [PMUX_PINGRP_QSPI_IO1_PEE3] = "qspi_io1_pee3",
+ [PMUX_PINGRP_QSPI_IO2_PEE4] = "qspi_io2_pee4",
+ [PMUX_PINGRP_QSPI_IO3_PEE5] = "qspi_io3_pee5",
+ [PMUX_PINGRP_DMIC1_CLK_PE0] = "dmic1_clk_pe0",
+ [PMUX_PINGRP_DMIC1_DAT_PE1] = "dmic1_dat_pe1",
+ [PMUX_PINGRP_DMIC2_CLK_PE2] = "dmic2_clk_pe2",
+ [PMUX_PINGRP_DMIC2_DAT_PE3] = "dmic2_dat_pe3",
+ [PMUX_PINGRP_DMIC3_CLK_PE4] = "dmic3_clk_pe4",
+ [PMUX_PINGRP_DMIC3_DAT_PE5] = "dmic3_dat_pe5",
+ [PMUX_PINGRP_GEN1_I2C_SCL_PJ1] = "gen1_i2c_scl_pj1",
+ [PMUX_PINGRP_GEN1_I2C_SDA_PJ0] = "gen1_i2c_sda_pj0",
+ [PMUX_PINGRP_GEN2_I2C_SCL_PJ2] = "gen2_i2c_scl_pj2",
+ [PMUX_PINGRP_GEN2_I2C_SDA_PJ3] = "gen2_i2c_sda_pj3",
+ [PMUX_PINGRP_GEN3_I2C_SCL_PF0] = "gen3_i2c_scl_pf0",
+ [PMUX_PINGRP_GEN3_I2C_SDA_PF1] = "gen3_i2c_sda_pf1",
+ [PMUX_PINGRP_CAM_I2C_SCL_PS2] = "cam_i2c_scl_ps2",
+ [PMUX_PINGRP_CAM_I2C_SDA_PS3] = "cam_i2c_sda_ps3",
+ [PMUX_PINGRP_PWR_I2C_SCL_PY3] = "pwr_i2c_scl_py3",
+ [PMUX_PINGRP_PWR_I2C_SDA_PY4] = "pwr_i2c_sda_py4",
+ [PMUX_PINGRP_UART1_TX_PU0] = "uart1_tx_pu0",
+ [PMUX_PINGRP_UART1_RX_PU1] = "uart1_rx_pu1",
+ [PMUX_PINGRP_UART1_RTS_PU2] = "uart1_rts_pu2",
+ [PMUX_PINGRP_UART1_CTS_PU3] = "uart1_cts_pu3",
+ [PMUX_PINGRP_UART2_TX_PG0] = "uart2_tx_pg0",
+ [PMUX_PINGRP_UART2_RX_PG1] = "uart2_rx_pg1",
+ [PMUX_PINGRP_UART2_RTS_PG2] = "uart2_rts_pg2",
+ [PMUX_PINGRP_UART2_CTS_PG3] = "uart2_cts_pg3",
+ [PMUX_PINGRP_UART3_TX_PD1] = "uart3_tx_pd1",
+ [PMUX_PINGRP_UART3_RX_PD2] = "uart3_rx_pd2",
+ [PMUX_PINGRP_UART3_RTS_PD3] = "uart3_rts_pd3",
+ [PMUX_PINGRP_UART3_CTS_PD4] = "uart3_cts_pd4",
+ [PMUX_PINGRP_UART4_TX_PI4] = "uart4_tx_pi4",
+ [PMUX_PINGRP_UART4_RX_PI5] = "uart4_rx_pi5",
+ [PMUX_PINGRP_UART4_RTS_PI6] = "uart4_rts_pi6",
+ [PMUX_PINGRP_UART4_CTS_PI7] = "uart4_cts_pi7",
+ [PMUX_PINGRP_DAP1_FS_PB0] = "dap1_fs_pb0",
+ [PMUX_PINGRP_DAP1_DIN_PB1] = "dap1_din_pb1",
+ [PMUX_PINGRP_DAP1_DOUT_PB2] = "dap1_dout_pb2",
+ [PMUX_PINGRP_DAP1_SCLK_PB3] = "dap1_sclk_pb3",
+ [PMUX_PINGRP_DAP2_FS_PAA0] = "dap2_fs_paa0",
+ [PMUX_PINGRP_DAP2_DIN_PAA2] = "dap2_din_paa2",
+ [PMUX_PINGRP_DAP2_DOUT_PAA3] = "dap2_dout_paa3",
+ [PMUX_PINGRP_DAP2_SCLK_PAA1] = "dap2_sclk_paa1",
+ [PMUX_PINGRP_DAP4_FS_PJ4] = "dap4_fs_pj4",
+ [PMUX_PINGRP_DAP4_DIN_PJ5] = "dap4_din_pj5",
+ [PMUX_PINGRP_DAP4_DOUT_PJ6] = "dap4_dout_pj6",
+ [PMUX_PINGRP_DAP4_SCLK_PJ7] = "dap4_sclk_pj7",
+ [PMUX_PINGRP_CAM1_MCLK_PS0] = "cam1_mclk_ps0",
+ [PMUX_PINGRP_CAM2_MCLK_PS1] = "cam2_mclk_ps1",
+ [PMUX_PINGRP_JTAG_RTCK] = "jtag_rtck",
+ [PMUX_PINGRP_CLK_32K_IN] = "clk_32k_in",
+ [PMUX_PINGRP_CLK_32K_OUT_PY5] = "clk_32k_out_py5",
+ [PMUX_PINGRP_BATT_BCL] = "batt_bcl",
+ [PMUX_PINGRP_CLK_REQ] = "clk_req",
+ [PMUX_PINGRP_CPU_PWR_REQ] = "cpu_pwr_req",
+ [PMUX_PINGRP_PWR_INT_N] = "pwr_int_n",
+ [PMUX_PINGRP_SHUTDOWN] = "shutdown",
+ [PMUX_PINGRP_CORE_PWR_REQ] = "core_pwr_req",
+ [PMUX_PINGRP_AUD_MCLK_PBB0] = "aud_mclk_pbb0",
+ [PMUX_PINGRP_DVFS_PWM_PBB1] = "dvfs_pwm_pbb1",
+ [PMUX_PINGRP_DVFS_CLK_PBB2] = "dvfs_clk_pbb2",
+ [PMUX_PINGRP_GPIO_X1_AUD_PBB3] = "gpio_x1_aud_pbb3",
+ [PMUX_PINGRP_GPIO_X3_AUD_PBB4] = "gpio_x3_aud_pbb4",
+ [PMUX_PINGRP_PCC7] = "pcc7",
+ [PMUX_PINGRP_HDMI_CEC_PCC0] = "hdmi_cec_pcc0",
+ [PMUX_PINGRP_HDMI_INT_DP_HPD_PCC1] = "hdmi_int_dp_hpd_pcc1",
+ [PMUX_PINGRP_SPDIF_OUT_PCC2] = "spdif_out_pcc2",
+ [PMUX_PINGRP_SPDIF_IN_PCC3] = "spdif_in_pcc3",
+ [PMUX_PINGRP_USB_VBUS_EN0_PCC4] = "usb_vbus_en0_pcc4",
+ [PMUX_PINGRP_USB_VBUS_EN1_PCC5] = "usb_vbus_en1_pcc5",
+ [PMUX_PINGRP_DP_HPD0_PCC6] = "dp_hpd0_pcc6",
+ [PMUX_PINGRP_WIFI_EN_PH0] = "wifi_en_ph0",
+ [PMUX_PINGRP_WIFI_RST_PH1] = "wifi_rst_ph1",
+ [PMUX_PINGRP_WIFI_WAKE_AP_PH2] = "wifi_wake_ap_ph2",
+ [PMUX_PINGRP_AP_WAKE_BT_PH3] = "ap_wake_bt_ph3",
+ [PMUX_PINGRP_BT_RST_PH4] = "bt_rst_ph4",
+ [PMUX_PINGRP_BT_WAKE_AP_PH5] = "bt_wake_ap_ph5",
+ [PMUX_PINGRP_AP_WAKE_NFC_PH7] = "ap_wake_nfc_ph7",
+ [PMUX_PINGRP_NFC_EN_PI0] = "nfc_en_pi0",
+ [PMUX_PINGRP_NFC_INT_PI1] = "nfc_int_pi1",
+ [PMUX_PINGRP_GPS_EN_PI2] = "gps_en_pi2",
+ [PMUX_PINGRP_GPS_RST_PI3] = "gps_rst_pi3",
+ [PMUX_PINGRP_CAM_RST_PS4] = "cam_rst_ps4",
+ [PMUX_PINGRP_CAM_AF_EN_PS5] = "cam_af_en_ps5",
+ [PMUX_PINGRP_CAM_FLASH_EN_PS6] = "cam_flash_en_ps6",
+ [PMUX_PINGRP_CAM1_PWDN_PS7] = "cam1_pwdn_ps7",
+ [PMUX_PINGRP_CAM2_PWDN_PT0] = "cam2_pwdn_pt0",
+ [PMUX_PINGRP_CAM1_STROBE_PT1] = "cam1_strobe_pt1",
+ [PMUX_PINGRP_LCD_TE_PY2] = "lcd_te_py2",
+ [PMUX_PINGRP_LCD_BL_PWM_PV0] = "lcd_bl_pwm_pv0",
+ [PMUX_PINGRP_LCD_BL_EN_PV1] = "lcd_bl_en_pv1",
+ [PMUX_PINGRP_LCD_RST_PV2] = "lcd_rst_pv2",
+ [PMUX_PINGRP_LCD_GPIO1_PV3] = "lcd_gpio1_pv3",
+ [PMUX_PINGRP_LCD_GPIO2_PV4] = "lcd_gpio2_pv4",
+ [PMUX_PINGRP_AP_READY_PV5] = "ap_ready_pv5",
+ [PMUX_PINGRP_TOUCH_RST_PV6] = "touch_rst_pv6",
+ [PMUX_PINGRP_TOUCH_CLK_PV7] = "touch_clk_pv7",
+ [PMUX_PINGRP_MODEM_WAKE_AP_PX0] = "modem_wake_ap_px0",
+ [PMUX_PINGRP_TOUCH_INT_PX1] = "touch_int_px1",
+ [PMUX_PINGRP_MOTION_INT_PX2] = "motion_int_px2",
+ [PMUX_PINGRP_ALS_PROX_INT_PX3] = "als_prox_int_px3",
+ [PMUX_PINGRP_TEMP_ALERT_PX4] = "temp_alert_px4",
+ [PMUX_PINGRP_BUTTON_POWER_ON_PX5] = "button_power_on_px5",
+ [PMUX_PINGRP_BUTTON_VOL_UP_PX6] = "button_vol_up_px6",
+ [PMUX_PINGRP_BUTTON_VOL_DOWN_PX7] = "button_vol_down_px7",
+ [PMUX_PINGRP_BUTTON_SLIDE_SW_PY0] = "button_slide_sw_py0",
+ [PMUX_PINGRP_BUTTON_HOME_PY1] = "button_home_py1",
+ [PMUX_PINGRP_PA6] = "pa6",
+ [PMUX_PINGRP_PE6] = "pe6",
+ [PMUX_PINGRP_PE7] = "pe7",
+ [PMUX_PINGRP_PH6] = "ph6",
+ [PMUX_PINGRP_PK0] = "pk0",
+ [PMUX_PINGRP_PK1] = "pk1",
+ [PMUX_PINGRP_PK2] = "pk2",
+ [PMUX_PINGRP_PK3] = "pk3",
+ [PMUX_PINGRP_PK4] = "pk4",
+ [PMUX_PINGRP_PK5] = "pk5",
+ [PMUX_PINGRP_PK6] = "pk6",
+ [PMUX_PINGRP_PK7] = "pk7",
+ [PMUX_PINGRP_PL0] = "pl0",
+ [PMUX_PINGRP_PL1] = "pl1",
+ [PMUX_PINGRP_PZ0] = "pz0",
+ [PMUX_PINGRP_PZ1] = "pz1",
+ [PMUX_PINGRP_PZ2] = "pz2",
+ [PMUX_PINGRP_PZ3] = "pz3",
+ [PMUX_PINGRP_PZ4] = "pz4",
+ [PMUX_PINGRP_PZ5] = "pz5",
+};
+
+static const char * const tegra_pinctrl_to_drvgrp[] = {
+ [PMUX_DRVGRP_ALS_PROX_INT] = "als_prox_int",
+ [PMUX_DRVGRP_AP_READY] = "ap_ready",
+ [PMUX_DRVGRP_AP_WAKE_BT] = "ap_wake_bt",
+ [PMUX_DRVGRP_AP_WAKE_NFC] = "ap_wake_nfc",
+ [PMUX_DRVGRP_AUD_MCLK] = "aud_mclk",
+ [PMUX_DRVGRP_BATT_BCL] = "batt_bcl",
+ [PMUX_DRVGRP_BT_RST] = "bt_rst",
+ [PMUX_DRVGRP_BT_WAKE_AP] = "bt_wake_ap",
+ [PMUX_DRVGRP_BUTTON_HOME] = "button_home",
+ [PMUX_DRVGRP_BUTTON_POWER_ON] = "button_power_on",
+ [PMUX_DRVGRP_BUTTON_SLIDE_SW] = "button_slide_sw",
+ [PMUX_DRVGRP_BUTTON_VOL_DOWN] = "button_vol_down",
+ [PMUX_DRVGRP_BUTTON_VOL_UP] = "button_vol_up",
+ [PMUX_DRVGRP_CAM1_MCLK] = "cam1_mclk",
+ [PMUX_DRVGRP_CAM1_PWDN] = "cam1_pwdn",
+ [PMUX_DRVGRP_CAM1_STROBE] = "cam1_strobe",
+ [PMUX_DRVGRP_CAM2_MCLK] = "cam2_mclk",
+ [PMUX_DRVGRP_CAM2_PWDN] = "cam2_pwdn",
+ [PMUX_DRVGRP_CAM_AF_EN] = "cam_af_en",
+ [PMUX_DRVGRP_CAM_FLASH_EN] = "cam_flash_en",
+ [PMUX_DRVGRP_CAM_I2C_SCL] = "cam_i2c_scl",
+ [PMUX_DRVGRP_CAM_I2C_SDA] = "cam_i2c_sda",
+ [PMUX_DRVGRP_CAM_RST] = "cam_rst",
+ [PMUX_DRVGRP_CLK_32K_IN] = "clk_32k_in",
+ [PMUX_DRVGRP_CLK_32K_OUT] = "clk_32k_out",
+ [PMUX_DRVGRP_CLK_REQ] = "clk_req",
+ [PMUX_DRVGRP_CORE_PWR_REQ] = "core_pwr_req",
+ [PMUX_DRVGRP_CPU_PWR_REQ] = "cpu_pwr_req",
+ [PMUX_DRVGRP_DAP1_DIN] = "dap1_din",
+ [PMUX_DRVGRP_DAP1_DOUT] = "dap1_dout",
+ [PMUX_DRVGRP_DAP1_FS] = "dap1_fs",
+ [PMUX_DRVGRP_DAP1_SCLK] = "dap1_sclk",
+ [PMUX_DRVGRP_DAP2_DIN] = "dap2_din",
+ [PMUX_DRVGRP_DAP2_DOUT] = "dap2_dout",
+ [PMUX_DRVGRP_DAP2_FS] = "dap2_fs",
+ [PMUX_DRVGRP_DAP2_SCLK] = "dap2_sclk",
+ [PMUX_DRVGRP_DAP4_DIN] = "dap4_din",
+ [PMUX_DRVGRP_DAP4_DOUT] = "dap4_dout",
+ [PMUX_DRVGRP_DAP4_FS] = "dap4_fs",
+ [PMUX_DRVGRP_DAP4_SCLK] = "dap4_sclk",
+ [PMUX_DRVGRP_DMIC1_CLK] = "dmic1_clk",
+ [PMUX_DRVGRP_DMIC1_DAT] = "dmic1_dat",
+ [PMUX_DRVGRP_DMIC2_CLK] = "dmic2_clk",
+ [PMUX_DRVGRP_DMIC2_DAT] = "dmic2_dat",
+ [PMUX_DRVGRP_DMIC3_CLK] = "dmic3_clk",
+ [PMUX_DRVGRP_DMIC3_DAT] = "dmic3_dat",
+ [PMUX_DRVGRP_DP_HPD0] = "dp_hpd0",
+ [PMUX_DRVGRP_DVFS_CLK] = "dvfs_clk",
+ [PMUX_DRVGRP_DVFS_PWM] = "dvfs_pwm",
+ [PMUX_DRVGRP_GEN1_I2C_SCL] = "gen1_i2c_scl",
+ [PMUX_DRVGRP_GEN1_I2C_SDA] = "gen1_i2c_sda",
+ [PMUX_DRVGRP_GEN2_I2C_SCL] = "gen2_i2c_scl",
+ [PMUX_DRVGRP_GEN2_I2C_SDA] = "gen2_i2c_sda",
+ [PMUX_DRVGRP_GEN3_I2C_SCL] = "gen3_i2c_scl",
+ [PMUX_DRVGRP_GEN3_I2C_SDA] = "gen3_i2c_sda",
+ [PMUX_DRVGRP_PA6] = "pa6",
+ [PMUX_DRVGRP_PCC7] = "pcc7",
+ [PMUX_DRVGRP_PE6] = "pe6",
+ [PMUX_DRVGRP_PE7] = "pe7",
+ [PMUX_DRVGRP_PH6] = "ph6",
+ [PMUX_DRVGRP_PK0] = "pk0",
+ [PMUX_DRVGRP_PK1] = "pk1",
+ [PMUX_DRVGRP_PK2] = "pk2",
+ [PMUX_DRVGRP_PK3] = "pk3",
+ [PMUX_DRVGRP_PK4] = "pk4",
+ [PMUX_DRVGRP_PK5] = "pk5",
+ [PMUX_DRVGRP_PK6] = "pk6",
+ [PMUX_DRVGRP_PK7] = "pk7",
+ [PMUX_DRVGRP_PL0] = "pl0",
+ [PMUX_DRVGRP_PL1] = "pl1",
+ [PMUX_DRVGRP_PZ0] = "pz0",
+ [PMUX_DRVGRP_PZ1] = "pz1",
+ [PMUX_DRVGRP_PZ2] = "pz2",
+ [PMUX_DRVGRP_PZ3] = "pz3",
+ [PMUX_DRVGRP_PZ4] = "pz4",
+ [PMUX_DRVGRP_PZ5] = "pz5",
+ [PMUX_DRVGRP_GPIO_X1_AUD] = "gpio_x1_aud",
+ [PMUX_DRVGRP_GPIO_X3_AUD] = "gpio_x3_aud",
+ [PMUX_DRVGRP_GPS_EN] = "gps_en",
+ [PMUX_DRVGRP_GPS_RST] = "gps_rst",
+ [PMUX_DRVGRP_HDMI_CEC] = "hdmi_cec",
+ [PMUX_DRVGRP_HDMI_INT_DP_HPD] = "hdmi_int_dp_hpd",
+ [PMUX_DRVGRP_JTAG_RTCK] = "jtag_rtck",
+ [PMUX_DRVGRP_LCD_BL_EN] = "lcd_bl_en",
+ [PMUX_DRVGRP_LCD_BL_PWM] = "lcd_bl_pwm",
+ [PMUX_DRVGRP_LCD_GPIO1] = "lcd_gpio1",
+ [PMUX_DRVGRP_LCD_GPIO2] = "lcd_gpio2",
+ [PMUX_DRVGRP_LCD_RST] = "lcd_rst",
+ [PMUX_DRVGRP_LCD_TE] = "lcd_te",
+ [PMUX_DRVGRP_MODEM_WAKE_AP] = "modem_wake_ap",
+ [PMUX_DRVGRP_MOTION_INT] = "motion_int",
+ [PMUX_DRVGRP_NFC_EN] = "nfc_en",
+ [PMUX_DRVGRP_NFC_INT] = "nfc_int",
+ [PMUX_DRVGRP_PEX_L0_CLKREQ_N] = "pex_l0_clkreq_n",
+ [PMUX_DRVGRP_PEX_L0_RST_N] = "pex_l0_rst_n",
+ [PMUX_DRVGRP_PEX_L1_CLKREQ_N] = "pex_l1_clkreq_n",
+ [PMUX_DRVGRP_PEX_L1_RST_N] = "pex_l1_rst_n",
+ [PMUX_DRVGRP_PEX_WAKE_N] = "pex_wake_n",
+ [PMUX_DRVGRP_PWR_I2C_SCL] = "pwr_i2c_scl",
+ [PMUX_DRVGRP_PWR_I2C_SDA] = "pwr_i2c_sda",
+ [PMUX_DRVGRP_PWR_INT_N] = "pwr_int_n",
+ [PMUX_DRVGRP_QSPI_SCK] = "qspi_sck",
+ [PMUX_DRVGRP_SATA_LED_ACTIVE] = "sata_led_active",
+ [PMUX_DRVGRP_SDMMC1] = "sdmmc1",
+ [PMUX_DRVGRP_SDMMC2] = "sdmmc2",
+ [PMUX_DRVGRP_SDMMC3] = "sdmmc3",
+ [PMUX_DRVGRP_SDMMC4] = "sdmmc4",
+ [PMUX_DRVGRP_SHUTDOWN] = "shutdown",
+ [PMUX_DRVGRP_SPDIF_IN] = "spdif_in",
+ [PMUX_DRVGRP_SPDIF_OUT] = "spdif_out",
+ [PMUX_DRVGRP_SPI1_CS0] = "spi1_cs0",
+ [PMUX_DRVGRP_SPI1_CS1] = "spi1_cs1",
+ [PMUX_DRVGRP_SPI1_MISO] = "spi1_miso",
+ [PMUX_DRVGRP_SPI1_MOSI] = "spi1_mosi",
+ [PMUX_DRVGRP_SPI1_SCK] = "spi1_sck",
+ [PMUX_DRVGRP_SPI2_CS0] = "spi2_cs0",
+ [PMUX_DRVGRP_SPI2_CS1] = "spi2_cs1",
+ [PMUX_DRVGRP_SPI2_MISO] = "spi2_miso",
+ [PMUX_DRVGRP_SPI2_MOSI] = "spi2_mosi",
+ [PMUX_DRVGRP_SPI2_SCK] = "spi2_sck",
+ [PMUX_DRVGRP_SPI4_CS0] = "spi4_cs0",
+ [PMUX_DRVGRP_SPI4_MISO] = "spi4_miso",
+ [PMUX_DRVGRP_SPI4_MOSI] = "spi4_mosi",
+ [PMUX_DRVGRP_SPI4_SCK] = "spi4_sck",
+ [PMUX_DRVGRP_TEMP_ALERT] = "temp_alert",
+ [PMUX_DRVGRP_TOUCH_CLK] = "touch_clk",
+ [PMUX_DRVGRP_TOUCH_INT] = "touch_int",
+ [PMUX_DRVGRP_TOUCH_RST] = "touch_rst",
+ [PMUX_DRVGRP_UART1_CTS] = "uart1_cts",
+ [PMUX_DRVGRP_UART1_RTS] = "uart1_rts",
+ [PMUX_DRVGRP_UART1_RX] = "uart1_rx",
+ [PMUX_DRVGRP_UART1_TX] = "uart1_tx",
+ [PMUX_DRVGRP_UART2_CTS] = "uart2_cts",
+ [PMUX_DRVGRP_UART2_RTS] = "uart2_rts",
+ [PMUX_DRVGRP_UART2_RX] = "uart2_rx",
+ [PMUX_DRVGRP_UART2_TX] = "uart2_tx",
+ [PMUX_DRVGRP_UART3_CTS] = "uart3_cts",
+ [PMUX_DRVGRP_UART3_RTS] = "uart3_rts",
+ [PMUX_DRVGRP_UART3_RX] = "uart3_rx",
+ [PMUX_DRVGRP_UART3_TX] = "uart3_tx",
+ [PMUX_DRVGRP_UART4_CTS] = "uart4_cts",
+ [PMUX_DRVGRP_UART4_RTS] = "uart4_rts",
+ [PMUX_DRVGRP_UART4_RX] = "uart4_rx",
+ [PMUX_DRVGRP_UART4_TX] = "uart4_tx",
+ [PMUX_DRVGRP_USB_VBUS_EN0] = "usb_vbus_en0",
+ [PMUX_DRVGRP_USB_VBUS_EN1] = "usb_vbus_en1",
+ [PMUX_DRVGRP_WIFI_EN] = "wifi_en",
+ [PMUX_DRVGRP_WIFI_RST] = "wifi_rst",
+ [PMUX_DRVGRP_WIFI_WAKE_AP] = "wifi_wake_ap",
+};
+
+static const char * const tegra_pinctrl_to_func[] = {
+ [PMUX_FUNC_DEFAULT] = "default",
+ [PMUX_FUNC_AUD] = "aud",
+ [PMUX_FUNC_BCL] = "bcl",
+ [PMUX_FUNC_BLINK] = "blink",
+ [PMUX_FUNC_CCLA] = "ccla",
+ [PMUX_FUNC_CEC] = "cec",
+ [PMUX_FUNC_CLDVFS] = "cldvfs",
+ [PMUX_FUNC_CLK] = "clk",
+ [PMUX_FUNC_CORE] = "core",
+ [PMUX_FUNC_CPU] = "cpu",
+ [PMUX_FUNC_DISPLAYA] = "displaya",
+ [PMUX_FUNC_DISPLAYB] = "displayb",
+ [PMUX_FUNC_DMIC1] = "dmic1",
+ [PMUX_FUNC_DMIC2] = "dmic2",
+ [PMUX_FUNC_DMIC3] = "dmic3",
+ [PMUX_FUNC_DP] = "dp",
+ [PMUX_FUNC_DTV] = "dtv",
+ [PMUX_FUNC_EXTPERIPH3] = "extperiph3",
+ [PMUX_FUNC_I2C1] = "i2c1",
+ [PMUX_FUNC_I2C2] = "i2c2",
+ [PMUX_FUNC_I2C3] = "i2c3",
+ [PMUX_FUNC_I2CPMU] = "i2cpmu",
+ [PMUX_FUNC_I2CVI] = "i2cvi",
+ [PMUX_FUNC_I2S1] = "i2s1",
+ [PMUX_FUNC_I2S2] = "i2s2",
+ [PMUX_FUNC_I2S3] = "i2s3",
+ [PMUX_FUNC_I2S4A] = "i2s4a",
+ [PMUX_FUNC_I2S4B] = "i2s4b",
+ [PMUX_FUNC_I2S5A] = "i2s5a",
+ [PMUX_FUNC_I2S5B] = "i2s5b",
+ [PMUX_FUNC_IQC0] = "iqc0",
+ [PMUX_FUNC_IQC1] = "iqc1",
+ [PMUX_FUNC_JTAG] = "jtag",
+ [PMUX_FUNC_PE] = "pe",
+ [PMUX_FUNC_PE0] = "pe0",
+ [PMUX_FUNC_PE1] = "pe1",
+ [PMUX_FUNC_PMI] = "pmi",
+ [PMUX_FUNC_PWM0] = "pwm0",
+ [PMUX_FUNC_PWM1] = "pwm1",
+ [PMUX_FUNC_PWM2] = "pwm2",
+ [PMUX_FUNC_PWM3] = "pwm3",
+ [PMUX_FUNC_QSPI] = "qspi",
+ [PMUX_FUNC_SATA] = "sata",
+ [PMUX_FUNC_SDMMC1] = "sdmmc1",
+ [PMUX_FUNC_SDMMC3] = "sdmmc3",
+ [PMUX_FUNC_SHUTDOWN] = "shutdown",
+ [PMUX_FUNC_SOC] = "soc",
+ [PMUX_FUNC_SOR0] = "sor0",
+ [PMUX_FUNC_SOR1] = "sor1",
+ [PMUX_FUNC_SPDIF] = "spdif",
+ [PMUX_FUNC_SPI1] = "spi1",
+ [PMUX_FUNC_SPI2] = "spi2",
+ [PMUX_FUNC_SPI3] = "spi3",
+ [PMUX_FUNC_SPI4] = "spi4",
+ [PMUX_FUNC_SYS] = "sys",
+ [PMUX_FUNC_TOUCH] = "touch",
+ [PMUX_FUNC_UART] = "uart",
+ [PMUX_FUNC_UARTA] = "uarta",
+ [PMUX_FUNC_UARTB] = "uartb",
+ [PMUX_FUNC_UARTC] = "uartc",
+ [PMUX_FUNC_UARTD] = "uartd",
+ [PMUX_FUNC_USB] = "usb",
+ [PMUX_FUNC_VGP1] = "vgp1",
+ [PMUX_FUNC_VGP2] = "vgp2",
+ [PMUX_FUNC_VGP3] = "vgp3",
+ [PMUX_FUNC_VGP4] = "vgp4",
+ [PMUX_FUNC_VGP5] = "vgp5",
+ [PMUX_FUNC_VGP6] = "vgp6",
+ [PMUX_FUNC_VIMCLK] = "vimclk",
+ [PMUX_FUNC_VIMCLK2] = "vimclk2",
+ [PMUX_FUNC_RSVD0] = "rsvd0",
+ [PMUX_FUNC_RSVD1] = "rsvd1",
+ [PMUX_FUNC_RSVD2] = "rsvd2",
+ [PMUX_FUNC_RSVD3] = "rsvd3",
+};
+
#define TEGRA_PMX_SOC_DRV_GROUP_BASE_REG 0x8d4
#define TEGRA_PMX_SOC_HAS_IO_CLAMPING
#define TEGRA_PMX_SOC_HAS_DRVGRPS
diff --git a/arch/arm/include/asm/arch-tegra30/clock-tables.h b/arch/arm/include/asm/arch-tegra30/clock-tables.h
index 6c899ff..5ebcbc2 100644
--- a/arch/arm/include/asm/arch-tegra30/clock-tables.h
+++ b/arch/arm/include/asm/arch-tegra30/clock-tables.h
@@ -23,6 +23,7 @@
CLOCK_ID_XCPU = CLOCK_ID_FIRST_SIMPLE,
CLOCK_ID_EPCI,
CLOCK_ID_SFROM32KHZ,
+ CLOCK_ID_DISPLAY2,
/* These are the base clocks (inputs to the Tegra SOC) */
CLOCK_ID_32KHZ,
@@ -30,7 +31,6 @@
CLOCK_ID_CLK_M,
CLOCK_ID_COUNT, /* number of PLLs */
- CLOCK_ID_DISPLAY2, /* Tegra3, placeholder */
CLOCK_ID_NONE = -1,
};
diff --git a/arch/arm/include/asm/arch-tegra30/pinmux.h b/arch/arm/include/asm/arch-tegra30/pinmux.h
index 1261943..686417d 100644
--- a/arch/arm/include/asm/arch-tegra30/pinmux.h
+++ b/arch/arm/include/asm/arch-tegra30/pinmux.h
@@ -390,6 +390,387 @@
PMUX_FUNC_COUNT,
};
+static const char * const tegra_pinctrl_to_pingrp[] = {
+ [PMUX_PINGRP_ULPI_DATA0_PO1] = "ulpi_data0_po1",
+ [PMUX_PINGRP_ULPI_DATA1_PO2] = "ulpi_data1_po2",
+ [PMUX_PINGRP_ULPI_DATA2_PO3] = "ulpi_data2_po3",
+ [PMUX_PINGRP_ULPI_DATA3_PO4] = "ulpi_data3_po4",
+ [PMUX_PINGRP_ULPI_DATA4_PO5] = "ulpi_data4_po5",
+ [PMUX_PINGRP_ULPI_DATA5_PO6] = "ulpi_data5_po6",
+ [PMUX_PINGRP_ULPI_DATA6_PO7] = "ulpi_data6_po7",
+ [PMUX_PINGRP_ULPI_DATA7_PO0] = "ulpi_data7_po0",
+ [PMUX_PINGRP_ULPI_CLK_PY0] = "ulpi_clk_py0",
+ [PMUX_PINGRP_ULPI_DIR_PY1] = "ulpi_dir_py1",
+ [PMUX_PINGRP_ULPI_NXT_PY2] = "ulpi_nxt_py2",
+ [PMUX_PINGRP_ULPI_STP_PY3] = "ulpi_stp_py3",
+ [PMUX_PINGRP_DAP3_FS_PP0] = "dap3_fs_pp0",
+ [PMUX_PINGRP_DAP3_DIN_PP1] = "dap3_din_pp1",
+ [PMUX_PINGRP_DAP3_DOUT_PP2] = "dap3_dout_pp2",
+ [PMUX_PINGRP_DAP3_SCLK_PP3] = "dap3_sclk_pp3",
+ [PMUX_PINGRP_PV0] = "pv0",
+ [PMUX_PINGRP_PV1] = "pv1",
+ [PMUX_PINGRP_SDMMC1_CLK_PZ0] = "sdmmc1_clk_pz0",
+ [PMUX_PINGRP_SDMMC1_CMD_PZ1] = "sdmmc1_cmd_pz1",
+ [PMUX_PINGRP_SDMMC1_DAT3_PY4] = "sdmmc1_dat3_py4",
+ [PMUX_PINGRP_SDMMC1_DAT2_PY5] = "sdmmc1_dat2_py5",
+ [PMUX_PINGRP_SDMMC1_DAT1_PY6] = "sdmmc1_dat1_py6",
+ [PMUX_PINGRP_SDMMC1_DAT0_PY7] = "sdmmc1_dat0_py7",
+ [PMUX_PINGRP_PV2] = "pv2",
+ [PMUX_PINGRP_PV3] = "pv3",
+ [PMUX_PINGRP_CLK2_OUT_PW5] = "clk2_out_pw5",
+ [PMUX_PINGRP_CLK2_REQ_PCC5] = "clk2_req_pcc5",
+ [PMUX_PINGRP_LCD_PWR1_PC1] = "lcd_pwr1_pc1",
+ [PMUX_PINGRP_LCD_PWR2_PC6] = "lcd_pwr2_pc6",
+ [PMUX_PINGRP_LCD_SDIN_PZ2] = "lcd_sdin_pz2",
+ [PMUX_PINGRP_LCD_SDOUT_PN5] = "lcd_sdout_pn5",
+ [PMUX_PINGRP_LCD_WR_N_PZ3] = "lcd_wr_n_pz3",
+ [PMUX_PINGRP_LCD_CS0_N_PN4] = "lcd_cs0_n_pn4",
+ [PMUX_PINGRP_LCD_DC0_PN6] = "lcd_dc0_pn6",
+ [PMUX_PINGRP_LCD_SCK_PZ4] = "lcd_sck_pz4",
+ [PMUX_PINGRP_LCD_PWR0_PB2] = "lcd_pwr0_pb2",
+ [PMUX_PINGRP_LCD_PCLK_PB3] = "lcd_pclk_pb3",
+ [PMUX_PINGRP_LCD_DE_PJ1] = "lcd_de_pj1",
+ [PMUX_PINGRP_LCD_HSYNC_PJ3] = "lcd_hsync_pj3",
+ [PMUX_PINGRP_LCD_VSYNC_PJ4] = "lcd_vsync_pj4",
+ [PMUX_PINGRP_LCD_D0_PE0] = "lcd_d0_pe0",
+ [PMUX_PINGRP_LCD_D1_PE1] = "lcd_d1_pe1",
+ [PMUX_PINGRP_LCD_D2_PE2] = "lcd_d2_pe2",
+ [PMUX_PINGRP_LCD_D3_PE3] = "lcd_d3_pe3",
+ [PMUX_PINGRP_LCD_D4_PE4] = "lcd_d4_pe4",
+ [PMUX_PINGRP_LCD_D5_PE5] = "lcd_d5_pe5",
+ [PMUX_PINGRP_LCD_D6_PE6] = "lcd_d6_pe6",
+ [PMUX_PINGRP_LCD_D7_PE7] = "lcd_d7_pe7",
+ [PMUX_PINGRP_LCD_D8_PF0] = "lcd_d8_pf0",
+ [PMUX_PINGRP_LCD_D9_PF1] = "lcd_d9_pf1",
+ [PMUX_PINGRP_LCD_D10_PF2] = "lcd_d10_pf2",
+ [PMUX_PINGRP_LCD_D11_PF3] = "lcd_d11_pf3",
+ [PMUX_PINGRP_LCD_D12_PF4] = "lcd_d12_pf4",
+ [PMUX_PINGRP_LCD_D13_PF5] = "lcd_d13_pf5",
+ [PMUX_PINGRP_LCD_D14_PF6] = "lcd_d14_pf6",
+ [PMUX_PINGRP_LCD_D15_PF7] = "lcd_d15_pf7",
+ [PMUX_PINGRP_LCD_D16_PM0] = "lcd_d16_pm0",
+ [PMUX_PINGRP_LCD_D17_PM1] = "lcd_d17_pm1",
+ [PMUX_PINGRP_LCD_D18_PM2] = "lcd_d18_pm2",
+ [PMUX_PINGRP_LCD_D19_PM3] = "lcd_d19_pm3",
+ [PMUX_PINGRP_LCD_D20_PM4] = "lcd_d20_pm4",
+ [PMUX_PINGRP_LCD_D21_PM5] = "lcd_d21_pm5",
+ [PMUX_PINGRP_LCD_D22_PM6] = "lcd_d22_pm6",
+ [PMUX_PINGRP_LCD_D23_PM7] = "lcd_d23_pm7",
+ [PMUX_PINGRP_LCD_CS1_N_PW0] = "lcd_cs1_n_pw0",
+ [PMUX_PINGRP_LCD_M1_PW1] = "lcd_m1_pw1",
+ [PMUX_PINGRP_LCD_DC1_PD2] = "lcd_dc1_pd2",
+ [PMUX_PINGRP_HDMI_INT_PN7] = "hdmi_int_pn7",
+ [PMUX_PINGRP_DDC_SCL_PV4] = "ddc_scl_pv4",
+ [PMUX_PINGRP_DDC_SDA_PV5] = "ddc_sda_pv5",
+ [PMUX_PINGRP_CRT_HSYNC_PV6] = "crt_hsync_pv6",
+ [PMUX_PINGRP_CRT_VSYNC_PV7] = "crt_vsync_pv7",
+ [PMUX_PINGRP_VI_D0_PT4] = "vi_d0_pt4",
+ [PMUX_PINGRP_VI_D1_PD5] = "vi_d1_pd5",
+ [PMUX_PINGRP_VI_D2_PL0] = "vi_d2_pl0",
+ [PMUX_PINGRP_VI_D3_PL1] = "vi_d3_pl1",
+ [PMUX_PINGRP_VI_D4_PL2] = "vi_d4_pl2",
+ [PMUX_PINGRP_VI_D5_PL3] = "vi_d5_pl3",
+ [PMUX_PINGRP_VI_D6_PL4] = "vi_d6_pl4",
+ [PMUX_PINGRP_VI_D7_PL5] = "vi_d7_pl5",
+ [PMUX_PINGRP_VI_D8_PL6] = "vi_d8_pl6",
+ [PMUX_PINGRP_VI_D9_PL7] = "vi_d9_pl7",
+ [PMUX_PINGRP_VI_D10_PT2] = "vi_d10_pt2",
+ [PMUX_PINGRP_VI_D11_PT3] = "vi_d11_pt3",
+ [PMUX_PINGRP_VI_PCLK_PT0] = "vi_pclk_pt0",
+ [PMUX_PINGRP_VI_MCLK_PT1] = "vi_mclk_pt1",
+ [PMUX_PINGRP_VI_VSYNC_PD6] = "vi_vsync_pd6",
+ [PMUX_PINGRP_VI_HSYNC_PD7] = "vi_hsync_pd7",
+ [PMUX_PINGRP_UART2_RXD_PC3] = "uart2_rxd_pc3",
+ [PMUX_PINGRP_UART2_TXD_PC2] = "uart2_txd_pc2",
+ [PMUX_PINGRP_UART2_RTS_N_PJ6] = "uart2_rts_n_pj6",
+ [PMUX_PINGRP_UART2_CTS_N_PJ5] = "uart2_cts_n_pj5",
+ [PMUX_PINGRP_UART3_TXD_PW6] = "uart3_txd_pw6",
+ [PMUX_PINGRP_UART3_RXD_PW7] = "uart3_rxd_pw7",
+ [PMUX_PINGRP_UART3_CTS_N_PA1] = "uart3_cts_n_pa1",
+ [PMUX_PINGRP_UART3_RTS_N_PC0] = "uart3_rts_n_pc0",
+ [PMUX_PINGRP_PU0] = "pu0",
+ [PMUX_PINGRP_PU1] = "pu1",
+ [PMUX_PINGRP_PU2] = "pu2",
+ [PMUX_PINGRP_PU3] = "pu3",
+ [PMUX_PINGRP_PU4] = "pu4",
+ [PMUX_PINGRP_PU5] = "pu5",
+ [PMUX_PINGRP_PU6] = "pu6",
+ [PMUX_PINGRP_GEN1_I2C_SDA_PC5] = "gen1_i2c_sda_pc5",
+ [PMUX_PINGRP_GEN1_I2C_SCL_PC4] = "gen1_i2c_scl_pc4",
+ [PMUX_PINGRP_DAP4_FS_PP4] = "dap4_fs_pp4",
+ [PMUX_PINGRP_DAP4_DIN_PP5] = "dap4_din_pp5",
+ [PMUX_PINGRP_DAP4_DOUT_PP6] = "dap4_dout_pp6",
+ [PMUX_PINGRP_DAP4_SCLK_PP7] = "dap4_sclk_pp7",
+ [PMUX_PINGRP_CLK3_OUT_PEE0] = "clk3_out_pee0",
+ [PMUX_PINGRP_CLK3_REQ_PEE1] = "clk3_req_pee1",
+ [PMUX_PINGRP_GMI_WP_N_PC7] = "gmi_wp_n_pc7",
+ [PMUX_PINGRP_GMI_IORDY_PI5] = "gmi_iordy_pi5",
+ [PMUX_PINGRP_GMI_WAIT_PI7] = "gmi_wait_pi7",
+ [PMUX_PINGRP_GMI_ADV_N_PK0] = "gmi_adv_n_pk0",
+ [PMUX_PINGRP_GMI_CLK_PK1] = "gmi_clk_pk1",
+ [PMUX_PINGRP_GMI_CS0_N_PJ0] = "gmi_cs0_n_pj0",
+ [PMUX_PINGRP_GMI_CS1_N_PJ2] = "gmi_cs1_n_pj2",
+ [PMUX_PINGRP_GMI_CS2_N_PK3] = "gmi_cs2_n_pk3",
+ [PMUX_PINGRP_GMI_CS3_N_PK4] = "gmi_cs3_n_pk4",
+ [PMUX_PINGRP_GMI_CS4_N_PK2] = "gmi_cs4_n_pk2",
+ [PMUX_PINGRP_GMI_CS6_N_PI3] = "gmi_cs6_n_pi3",
+ [PMUX_PINGRP_GMI_CS7_N_PI6] = "gmi_cs7_n_pi6",
+ [PMUX_PINGRP_GMI_AD0_PG0] = "gmi_ad0_pg0",
+ [PMUX_PINGRP_GMI_AD1_PG1] = "gmi_ad1_pg1",
+ [PMUX_PINGRP_GMI_AD2_PG2] = "gmi_ad2_pg2",
+ [PMUX_PINGRP_GMI_AD3_PG3] = "gmi_ad3_pg3",
+ [PMUX_PINGRP_GMI_AD4_PG4] = "gmi_ad4_pg4",
+ [PMUX_PINGRP_GMI_AD5_PG5] = "gmi_ad5_pg5",
+ [PMUX_PINGRP_GMI_AD6_PG6] = "gmi_ad6_pg6",
+ [PMUX_PINGRP_GMI_AD7_PG7] = "gmi_ad7_pg7",
+ [PMUX_PINGRP_GMI_AD8_PH0] = "gmi_ad8_ph0",
+ [PMUX_PINGRP_GMI_AD9_PH1] = "gmi_ad9_ph1",
+ [PMUX_PINGRP_GMI_AD10_PH2] = "gmi_ad10_ph2",
+ [PMUX_PINGRP_GMI_AD11_PH3] = "gmi_ad11_ph3",
+ [PMUX_PINGRP_GMI_AD12_PH4] = "gmi_ad12_ph4",
+ [PMUX_PINGRP_GMI_AD13_PH5] = "gmi_ad13_ph5",
+ [PMUX_PINGRP_GMI_AD14_PH6] = "gmi_ad14_ph6",
+ [PMUX_PINGRP_GMI_AD15_PH7] = "gmi_ad15_ph7",
+ [PMUX_PINGRP_GMI_A16_PJ7] = "gmi_a16_pj7",
+ [PMUX_PINGRP_GMI_A17_PB0] = "gmi_a17_pb0",
+ [PMUX_PINGRP_GMI_A18_PB1] = "gmi_a18_pb1",
+ [PMUX_PINGRP_GMI_A19_PK7] = "gmi_a19_pk7",
+ [PMUX_PINGRP_GMI_WR_N_PI0] = "gmi_wr_n_pi0",
+ [PMUX_PINGRP_GMI_OE_N_PI1] = "gmi_oe_n_pi1",
+ [PMUX_PINGRP_GMI_DQS_PI2] = "gmi_dqs_pi2",
+ [PMUX_PINGRP_GMI_RST_N_PI4] = "gmi_rst_n_pi4",
+ [PMUX_PINGRP_GEN2_I2C_SCL_PT5] = "gen2_i2c_scl_pt5",
+ [PMUX_PINGRP_GEN2_I2C_SDA_PT6] = "gen2_i2c_sda_pt6",
+ [PMUX_PINGRP_SDMMC4_CLK_PCC4] = "sdmmc4_clk_pcc4",
+ [PMUX_PINGRP_SDMMC4_CMD_PT7] = "sdmmc4_cmd_pt7",
+ [PMUX_PINGRP_SDMMC4_DAT0_PAA0] = "sdmmc4_dat0_paa0",
+ [PMUX_PINGRP_SDMMC4_DAT1_PAA1] = "sdmmc4_dat1_paa1",
+ [PMUX_PINGRP_SDMMC4_DAT2_PAA2] = "sdmmc4_dat2_paa2",
+ [PMUX_PINGRP_SDMMC4_DAT3_PAA3] = "sdmmc4_dat3_paa3",
+ [PMUX_PINGRP_SDMMC4_DAT4_PAA4] = "sdmmc4_dat4_paa4",
+ [PMUX_PINGRP_SDMMC4_DAT5_PAA5] = "sdmmc4_dat5_paa5",
+ [PMUX_PINGRP_SDMMC4_DAT6_PAA6] = "sdmmc4_dat6_paa6",
+ [PMUX_PINGRP_SDMMC4_DAT7_PAA7] = "sdmmc4_dat7_paa7",
+ [PMUX_PINGRP_SDMMC4_RST_N_PCC3] = "sdmmc4_rst_n_pcc3",
+ [PMUX_PINGRP_CAM_MCLK_PCC0] = "cam_mclk_pcc0",
+ [PMUX_PINGRP_PCC1] = "pcc1",
+ [PMUX_PINGRP_PBB0] = "pbb0",
+ [PMUX_PINGRP_CAM_I2C_SCL_PBB1] = "cam_i2c_scl_pbb1",
+ [PMUX_PINGRP_CAM_I2C_SDA_PBB2] = "cam_i2c_sda_pbb2",
+ [PMUX_PINGRP_PBB3] = "pbb3",
+ [PMUX_PINGRP_PBB4] = "pbb4",
+ [PMUX_PINGRP_PBB5] = "pbb5",
+ [PMUX_PINGRP_PBB6] = "pbb6",
+ [PMUX_PINGRP_PBB7] = "pbb7",
+ [PMUX_PINGRP_PCC2] = "pcc2",
+ [PMUX_PINGRP_JTAG_RTCK_PU7] = "jtag_rtck_pu7",
+ [PMUX_PINGRP_PWR_I2C_SCL_PZ6] = "pwr_i2c_scl_pz6",
+ [PMUX_PINGRP_PWR_I2C_SDA_PZ7] = "pwr_i2c_sda_pz7",
+ [PMUX_PINGRP_KB_ROW0_PR0] = "kb_row0_pr0",
+ [PMUX_PINGRP_KB_ROW1_PR1] = "kb_row1_pr1",
+ [PMUX_PINGRP_KB_ROW2_PR2] = "kb_row2_pr2",
+ [PMUX_PINGRP_KB_ROW3_PR3] = "kb_row3_pr3",
+ [PMUX_PINGRP_KB_ROW4_PR4] = "kb_row4_pr4",
+ [PMUX_PINGRP_KB_ROW5_PR5] = "kb_row5_pr5",
+ [PMUX_PINGRP_KB_ROW6_PR6] = "kb_row6_pr6",
+ [PMUX_PINGRP_KB_ROW7_PR7] = "kb_row7_pr7",
+ [PMUX_PINGRP_KB_ROW8_PS0] = "kb_row8_ps0",
+ [PMUX_PINGRP_KB_ROW9_PS1] = "kb_row9_ps1",
+ [PMUX_PINGRP_KB_ROW10_PS2] = "kb_row10_ps2",
+ [PMUX_PINGRP_KB_ROW11_PS3] = "kb_row11_ps3",
+ [PMUX_PINGRP_KB_ROW12_PS4] = "kb_row12_ps4",
+ [PMUX_PINGRP_KB_ROW13_PS5] = "kb_row13_ps5",
+ [PMUX_PINGRP_KB_ROW14_PS6] = "kb_row14_ps6",
+ [PMUX_PINGRP_KB_ROW15_PS7] = "kb_row15_ps7",
+ [PMUX_PINGRP_KB_COL0_PQ0] = "kb_col0_pq0",
+ [PMUX_PINGRP_KB_COL1_PQ1] = "kb_col1_pq1",
+ [PMUX_PINGRP_KB_COL2_PQ2] = "kb_col2_pq2",
+ [PMUX_PINGRP_KB_COL3_PQ3] = "kb_col3_pq3",
+ [PMUX_PINGRP_KB_COL4_PQ4] = "kb_col4_pq4",
+ [PMUX_PINGRP_KB_COL5_PQ5] = "kb_col5_pq5",
+ [PMUX_PINGRP_KB_COL6_PQ6] = "kb_col6_pq6",
+ [PMUX_PINGRP_KB_COL7_PQ7] = "kb_col7_pq7",
+ [PMUX_PINGRP_CLK_32K_OUT_PA0] = "clk_32k_out_pa0",
+ [PMUX_PINGRP_SYS_CLK_REQ_PZ5] = "sys_clk_req_pz5",
+ [PMUX_PINGRP_CORE_PWR_REQ] = "core_pwr_req",
+ [PMUX_PINGRP_CPU_PWR_REQ] = "cpu_pwr_req",
+ [PMUX_PINGRP_PWR_INT_N] = "pwr_int_n",
+ [PMUX_PINGRP_CLK_32K_IN] = "clk_32k_in",
+ [PMUX_PINGRP_OWR] = "owr",
+ [PMUX_PINGRP_DAP1_FS_PN0] = "dap1_fs_pn0",
+ [PMUX_PINGRP_DAP1_DIN_PN1] = "dap1_din_pn1",
+ [PMUX_PINGRP_DAP1_DOUT_PN2] = "dap1_dout_pn2",
+ [PMUX_PINGRP_DAP1_SCLK_PN3] = "dap1_sclk_pn3",
+ [PMUX_PINGRP_CLK1_REQ_PEE2] = "clk1_req_pee2",
+ [PMUX_PINGRP_CLK1_OUT_PW4] = "clk1_out_pw4",
+ [PMUX_PINGRP_SPDIF_IN_PK6] = "spdif_in_pk6",
+ [PMUX_PINGRP_SPDIF_OUT_PK5] = "spdif_out_pk5",
+ [PMUX_PINGRP_DAP2_FS_PA2] = "dap2_fs_pa2",
+ [PMUX_PINGRP_DAP2_DIN_PA4] = "dap2_din_pa4",
+ [PMUX_PINGRP_DAP2_DOUT_PA5] = "dap2_dout_pa5",
+ [PMUX_PINGRP_DAP2_SCLK_PA3] = "dap2_sclk_pa3",
+ [PMUX_PINGRP_SPI2_MOSI_PX0] = "spi2_mosi_px0",
+ [PMUX_PINGRP_SPI2_MISO_PX1] = "spi2_miso_px1",
+ [PMUX_PINGRP_SPI2_CS0_N_PX3] = "spi2_cs0_n_px3",
+ [PMUX_PINGRP_SPI2_SCK_PX2] = "spi2_sck_px2",
+ [PMUX_PINGRP_SPI1_MOSI_PX4] = "spi1_mosi_px4",
+ [PMUX_PINGRP_SPI1_SCK_PX5] = "spi1_sck_px5",
+ [PMUX_PINGRP_SPI1_CS0_N_PX6] = "spi1_cs0_n_px6",
+ [PMUX_PINGRP_SPI1_MISO_PX7] = "spi1_miso_px7",
+ [PMUX_PINGRP_SPI2_CS1_N_PW2] = "spi2_cs1_n_pw2",
+ [PMUX_PINGRP_SPI2_CS2_N_PW3] = "spi2_cs2_n_pw3",
+ [PMUX_PINGRP_SDMMC3_CLK_PA6] = "sdmmc3_clk_pa6",
+ [PMUX_PINGRP_SDMMC3_CMD_PA7] = "sdmmc3_cmd_pa7",
+ [PMUX_PINGRP_SDMMC3_DAT0_PB7] = "sdmmc3_dat0_pb7",
+ [PMUX_PINGRP_SDMMC3_DAT1_PB6] = "sdmmc3_dat1_pb6",
+ [PMUX_PINGRP_SDMMC3_DAT2_PB5] = "sdmmc3_dat2_pb5",
+ [PMUX_PINGRP_SDMMC3_DAT3_PB4] = "sdmmc3_dat3_pb4",
+ [PMUX_PINGRP_SDMMC3_DAT4_PD1] = "sdmmc3_dat4_pd1",
+ [PMUX_PINGRP_SDMMC3_DAT5_PD0] = "sdmmc3_dat5_pd0",
+ [PMUX_PINGRP_SDMMC3_DAT6_PD3] = "sdmmc3_dat6_pd3",
+ [PMUX_PINGRP_SDMMC3_DAT7_PD4] = "sdmmc3_dat7_pd4",
+ [PMUX_PINGRP_PEX_L0_PRSNT_N_PDD0] = "pex_l0_prsnt_n_pdd0",
+ [PMUX_PINGRP_PEX_L0_RST_N_PDD1] = "pex_l0_rst_n_pdd1",
+ [PMUX_PINGRP_PEX_L0_CLKREQ_N_PDD2] = "pex_l0_clkreq_n_pdd2",
+ [PMUX_PINGRP_PEX_WAKE_N_PDD3] = "pex_wake_n_pdd3",
+ [PMUX_PINGRP_PEX_L1_PRSNT_N_PDD4] = "pex_l1_prsnt_n_pdd4",
+ [PMUX_PINGRP_PEX_L1_RST_N_PDD5] = "pex_l1_rst_n_pdd5",
+ [PMUX_PINGRP_PEX_L1_CLKREQ_N_PDD6] = "pex_l1_clkreq_n_pdd6",
+ [PMUX_PINGRP_PEX_L2_PRSNT_N_PDD7] = "pex_l2_prsnt_n_pdd7",
+ [PMUX_PINGRP_PEX_L2_RST_N_PCC6] = "pex_l2_rst_n_pcc6",
+ [PMUX_PINGRP_PEX_L2_CLKREQ_N_PCC7] = "pex_l2_clkreq_n_pcc7",
+ [PMUX_PINGRP_HDMI_CEC_PEE3] = "hdmi_cec_pee3",
+};
+
+static const char * const tegra_pinctrl_to_drvgrp[] = {
+ [PMUX_DRVGRP_AO1] = "drive_ao1",
+ [PMUX_DRVGRP_AO2] = "drive_ao2",
+ [PMUX_DRVGRP_AT1] = "drive_at1",
+ [PMUX_DRVGRP_AT2] = "drive_at2",
+ [PMUX_DRVGRP_AT3] = "drive_at3",
+ [PMUX_DRVGRP_AT4] = "drive_at4",
+ [PMUX_DRVGRP_AT5] = "drive_at5",
+ [PMUX_DRVGRP_CDEV1] = "drive_cdev1",
+ [PMUX_DRVGRP_CDEV2] = "drive_cdev2",
+ [PMUX_DRVGRP_CSUS] = "drive_csus",
+ [PMUX_DRVGRP_DAP1] = "drive_dap1",
+ [PMUX_DRVGRP_DAP2] = "drive_dap2",
+ [PMUX_DRVGRP_DAP3] = "drive_dap3",
+ [PMUX_DRVGRP_DAP4] = "drive_dap4",
+ [PMUX_DRVGRP_DBG] = "drive_dbg",
+ [PMUX_DRVGRP_LCD1] = "drive_lcd1",
+ [PMUX_DRVGRP_LCD2] = "drive_lcd2",
+ [PMUX_DRVGRP_SDIO2] = "drive_sdio2",
+ [PMUX_DRVGRP_SDIO3] = "drive_sdio3",
+ [PMUX_DRVGRP_SPI] = "drive_spi",
+ [PMUX_DRVGRP_UAA] = "drive_uaa",
+ [PMUX_DRVGRP_UAB] = "drive_uab",
+ [PMUX_DRVGRP_UART2] = "drive_uart2",
+ [PMUX_DRVGRP_UART3] = "drive_uart3",
+ [PMUX_DRVGRP_VI1] = "drive_vi1",
+ [PMUX_DRVGRP_SDIO1] = "drive_sdio1",
+ [PMUX_DRVGRP_CRT] = "drive_crt",
+ [PMUX_DRVGRP_DDC] = "drive_ddc",
+ [PMUX_DRVGRP_GMA] = "drive_gma",
+ [PMUX_DRVGRP_GMB] = "drive_gmb",
+ [PMUX_DRVGRP_GMC] = "drive_gmc",
+ [PMUX_DRVGRP_GMD] = "drive_gmd",
+ [PMUX_DRVGRP_GME] = "drive_gme",
+ [PMUX_DRVGRP_GMF] = "drive_gmf",
+ [PMUX_DRVGRP_GMG] = "drive_gmg",
+ [PMUX_DRVGRP_GMH] = "drive_gmh",
+ [PMUX_DRVGRP_OWR] = "drive_owr",
+ [PMUX_DRVGRP_UDA] = "drive_uda",
+ [PMUX_DRVGRP_GPV] = "drive_gpv",
+ [PMUX_DRVGRP_DEV3] = "drive_dev3",
+ [PMUX_DRVGRP_CEC] = "drive_cec",
+};
+
+static const char * const tegra_pinctrl_to_func[] = {
+ [PMUX_FUNC_DEFAULT] = "default",
+ [PMUX_FUNC_BLINK] = "blink",
+ [PMUX_FUNC_CEC] = "cec",
+ [PMUX_FUNC_CLK_12M_OUT] = "clk_12m_out",
+ [PMUX_FUNC_CLK_32K_IN] = "clk_32k_in",
+ [PMUX_FUNC_CORE_PWR_REQ] = "core_pwr_req",
+ [PMUX_FUNC_CPU_PWR_REQ] = "cpu_pwr_req",
+ [PMUX_FUNC_CRT] = "crt",
+ [PMUX_FUNC_DAP] = "dap",
+ [PMUX_FUNC_DDR] = "ddr",
+ [PMUX_FUNC_DEV3] = "dev3",
+ [PMUX_FUNC_DISPLAYA] = "displaya",
+ [PMUX_FUNC_DISPLAYB] = "displayb",
+ [PMUX_FUNC_DTV] = "dtv",
+ [PMUX_FUNC_EXTPERIPH1] = "extperiph1",
+ [PMUX_FUNC_EXTPERIPH2] = "extperiph2",
+ [PMUX_FUNC_EXTPERIPH3] = "extperiph3",
+ [PMUX_FUNC_GMI] = "gmi",
+ [PMUX_FUNC_GMI_ALT] = "gmi_alt",
+ [PMUX_FUNC_HDA] = "hda",
+ [PMUX_FUNC_HDCP] = "hdcp",
+ [PMUX_FUNC_HDMI] = "hdmi",
+ [PMUX_FUNC_HSI] = "hsi",
+ [PMUX_FUNC_I2C1] = "i2c1",
+ [PMUX_FUNC_I2C2] = "i2c2",
+ [PMUX_FUNC_I2C3] = "i2c3",
+ [PMUX_FUNC_I2C4] = "i2c4",
+ [PMUX_FUNC_I2CPWR] = "i2cpwr",
+ [PMUX_FUNC_I2S0] = "i2s0",
+ [PMUX_FUNC_I2S1] = "i2s1",
+ [PMUX_FUNC_I2S2] = "i2s2",
+ [PMUX_FUNC_I2S3] = "i2s3",
+ [PMUX_FUNC_I2S4] = "i2s4",
+ [PMUX_FUNC_INVALID] = "invalid",
+ [PMUX_FUNC_KBC] = "kbc",
+ [PMUX_FUNC_MIO] = "mio",
+ [PMUX_FUNC_NAND] = "nand",
+ [PMUX_FUNC_NAND_ALT] = "nand_alt",
+ [PMUX_FUNC_OWR] = "owr",
+ [PMUX_FUNC_PCIE] = "pcie",
+ [PMUX_FUNC_PWM0] = "pwm0",
+ [PMUX_FUNC_PWM1] = "pwm1",
+ [PMUX_FUNC_PWM2] = "pwm2",
+ [PMUX_FUNC_PWM3] = "pwm3",
+ [PMUX_FUNC_PWR_INT_N] = "pwr_int_n",
+ [PMUX_FUNC_RTCK] = "rtck",
+ [PMUX_FUNC_SATA] = "sata",
+ [PMUX_FUNC_SDMMC1] = "sdmmc1",
+ [PMUX_FUNC_SDMMC2] = "sdmmc2",
+ [PMUX_FUNC_SDMMC3] = "sdmmc3",
+ [PMUX_FUNC_SDMMC4] = "sdmmc4",
+ [PMUX_FUNC_SPDIF] = "spdif",
+ [PMUX_FUNC_SPI1] = "spi1",
+ [PMUX_FUNC_SPI2] = "spi2",
+ [PMUX_FUNC_SPI2_ALT] = "spi2_alt",
+ [PMUX_FUNC_SPI3] = "spi3",
+ [PMUX_FUNC_SPI4] = "spi4",
+ [PMUX_FUNC_SPI5] = "spi5",
+ [PMUX_FUNC_SPI6] = "spi6",
+ [PMUX_FUNC_SYSCLK] = "sysclk",
+ [PMUX_FUNC_TEST] = "test",
+ [PMUX_FUNC_TRACE] = "trace",
+ [PMUX_FUNC_UARTA] = "uarta",
+ [PMUX_FUNC_UARTB] = "uartb",
+ [PMUX_FUNC_UARTC] = "uartc",
+ [PMUX_FUNC_UARTD] = "uartd",
+ [PMUX_FUNC_UARTE] = "uarte",
+ [PMUX_FUNC_ULPI] = "ulpi",
+ [PMUX_FUNC_VGP1] = "vgp1",
+ [PMUX_FUNC_VGP2] = "vgp2",
+ [PMUX_FUNC_VGP3] = "vgp3",
+ [PMUX_FUNC_VGP4] = "vgp4",
+ [PMUX_FUNC_VGP5] = "vgp5",
+ [PMUX_FUNC_VGP6] = "vgp6",
+ [PMUX_FUNC_VI] = "vi",
+ [PMUX_FUNC_VI_ALT1] = "vi_alt1",
+ [PMUX_FUNC_VI_ALT2] = "vi_alt2",
+ [PMUX_FUNC_VI_ALT3] = "vi_alt3",
+ [PMUX_FUNC_RSVD1] = "rsvd1",
+ [PMUX_FUNC_RSVD2] = "rsvd2",
+ [PMUX_FUNC_RSVD3] = "rsvd3",
+ [PMUX_FUNC_RSVD4] = "rsvd4",
+};
+
#define TEGRA_PMX_SOC_DRV_GROUP_BASE_REG 0x868
#define TEGRA_PMX_SOC_HAS_DRVGRPS
#define TEGRA_PMX_GRPS_HAVE_LPMD
diff --git a/arch/arm/include/asm/assembler.h b/arch/arm/include/asm/assembler.h
index 8d42ef4..4fda483 100644
--- a/arch/arm/include/asm/assembler.h
+++ b/arch/arm/include/asm/assembler.h
@@ -14,7 +14,6 @@
* assembler source.
*/
-#include <config.h>
#include <asm/unified.h>
/*
diff --git a/arch/arm/include/asm/global_data.h b/arch/arm/include/asm/global_data.h
index 75bd9d5..452bcd1 100644
--- a/arch/arm/include/asm/global_data.h
+++ b/arch/arm/include/asm/global_data.h
@@ -11,7 +11,6 @@
#include <config.h>
-#include <asm/types.h>
#include <linux/types.h>
/* Architecture-specific global data */
@@ -19,7 +18,12 @@
#if defined(CONFIG_FSL_ESDHC) || defined(CONFIG_FSL_ESDHC_IMX)
u32 sdhc_clk;
#endif
-
+#if CONFIG_IS_ENABLED(ACPI)
+ ulong table_start; /* Start address of ACPI tables */
+ ulong table_end; /* End address of ACPI tables */
+ ulong table_start_high; /* Start address of high ACPI tables */
+ ulong table_end_high; /* End address of high ACPI tables */
+#endif
#if defined(CONFIG_FSL_ESDHC)
u32 sdhc_per_clk;
#endif
diff --git a/arch/arm/include/asm/secure.h b/arch/arm/include/asm/secure.h
index c7b00be..abfa464 100644
--- a/arch/arm/include/asm/secure.h
+++ b/arch/arm/include/asm/secure.h
@@ -1,7 +1,6 @@
#ifndef __ASM_SECURE_H
#define __ASM_SECURE_H
-#include <config.h>
#include <asm/global_data.h>
#define __secure __section("._secure.text")
diff --git a/arch/arm/include/asm/string.h b/arch/arm/include/asm/string.h
index ead3f2c..c9ecdde 100644
--- a/arch/arm/include/asm/string.h
+++ b/arch/arm/include/asm/string.h
@@ -1,8 +1,6 @@
#ifndef __ASM_ARM_STRING_H
#define __ASM_ARM_STRING_H
-#include <config.h>
-
/*
* We don't do inline string functions, since the
* optimised inline asm versions are not small.
diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c
index c562857..f30a483 100644
--- a/arch/arm/lib/bootm.c
+++ b/arch/arm/lib/bootm.c
@@ -12,6 +12,7 @@
*/
#include <common.h>
+#include <bootm.h>
#include <bootstage.h>
#include <command.h>
#include <cpu_func.h>
@@ -378,9 +379,10 @@
* DIFFERENCE: Instead of calling prep and go at the end
* they are called if subcommand is equal 0.
*/
-int do_bootm_linux(int flag, int argc, char *const argv[],
- struct bootm_headers *images)
+int do_bootm_linux(int flag, struct bootm_info *bmi)
{
+ struct bootm_headers *images = bmi->images;
+
/* No need for those on ARM */
if (flag & BOOTM_STATE_OS_BD_T || flag & BOOTM_STATE_OS_CMDLINE)
return -1;
diff --git a/arch/arm/lib/vectors.S b/arch/arm/lib/vectors.S
index 843f9b9..b6b8793 100644
--- a/arch/arm/lib/vectors.S
+++ b/arch/arm/lib/vectors.S
@@ -138,11 +138,29 @@
#if !CONFIG_IS_ENABLED(SYS_NO_VECTOR_TABLE)
.align 5
undefined_instruction:
+#if CONFIG_IS_ENABLED(USE_SEPARATE_FAULT_HANDLERS)
+ b undefined_instruction
+#endif
software_interrupt:
+#if CONFIG_IS_ENABLED(USE_SEPARATE_FAULT_HANDLERS)
+ b software_interrupt
+#endif
prefetch_abort:
+#if CONFIG_IS_ENABLED(USE_SEPARATE_FAULT_HANDLERS)
+ b prefetch_abort
+#endif
data_abort:
+#if CONFIG_IS_ENABLED(USE_SEPARATE_FAULT_HANDLERS)
+ b data_abort
+#endif
not_used:
+#if CONFIG_IS_ENABLED(USE_SEPARATE_FAULT_HANDLERS)
+ b not_used
+#endif
irq:
+#if CONFIG_IS_ENABLED(USE_SEPARATE_FAULT_HANDLERS)
+ b irq
+#endif
fiq:
1:
b 1b /* hang and never return */
diff --git a/arch/arm/mach-apple/board.c b/arch/arm/mach-apple/board.c
index 47393ba..7a6151a 100644
--- a/arch/arm/mach-apple/board.c
+++ b/arch/arm/mach-apple/board.c
@@ -372,6 +372,22 @@
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
/* I/O */
+ .virt = 0x400000000,
+ .phys = 0x400000000,
+ .size = SZ_1G,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+ PTE_BLOCK_NON_SHARE |
+ PTE_BLOCK_PXN | PTE_BLOCK_UXN
+ }, {
+ /* I/O */
+ .virt = 0x480000000,
+ .phys = 0x480000000,
+ .size = SZ_1G,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+ PTE_BLOCK_NON_SHARE |
+ PTE_BLOCK_PXN | PTE_BLOCK_UXN
+ }, {
+ /* I/O */
.virt = 0x580000000,
.phys = 0x580000000,
.size = SZ_512M,
@@ -473,6 +489,22 @@
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
/* I/O */
+ .virt = 0x400000000,
+ .phys = 0x400000000,
+ .size = SZ_1G,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+ PTE_BLOCK_NON_SHARE |
+ PTE_BLOCK_PXN | PTE_BLOCK_UXN
+ }, {
+ /* I/O */
+ .virt = 0x480000000,
+ .phys = 0x480000000,
+ .size = SZ_1G,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+ PTE_BLOCK_NON_SHARE |
+ PTE_BLOCK_PXN | PTE_BLOCK_UXN
+ }, {
+ /* I/O */
.virt = 0x580000000,
.phys = 0x580000000,
.size = SZ_512M,
@@ -553,6 +585,22 @@
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
/* I/O */
+ .virt = 0x2400000000,
+ .phys = 0x2400000000,
+ .size = SZ_1G,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+ PTE_BLOCK_NON_SHARE |
+ PTE_BLOCK_PXN | PTE_BLOCK_UXN
+ }, {
+ /* I/O */
+ .virt = 0x2480000000,
+ .phys = 0x2480000000,
+ .size = SZ_1G,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+ PTE_BLOCK_NON_SHARE |
+ PTE_BLOCK_PXN | PTE_BLOCK_UXN
+ }, {
+ /* I/O */
.virt = 0x2580000000,
.phys = 0x2580000000,
.size = SZ_512M,
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index 37ef2d6..c5fd869 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -88,6 +88,7 @@
select DM_GPIO
select DM_SERIAL
select DM_SPI
+ select MTD
select SPI
imply CMD_DM
@@ -294,6 +295,7 @@
select DM_GPIO
select DM_SERIAL
select DM_SPI
+ select MTD
select SPI
select SUPPORT_SPL
imply CMD_DM
@@ -312,6 +314,7 @@
bool "Support VINCO"
select DM
select DM_SPI
+ select MTD
select SAMA5D4
select SPI
select SUPPORT_SPL
diff --git a/arch/arm/mach-davinci/include/mach/pinmux_defs.h b/arch/arm/mach-davinci/include/mach/pinmux_defs.h
index 4901ba4..1209353 100644
--- a/arch/arm/mach-davinci/include/mach/pinmux_defs.h
+++ b/arch/arm/mach-davinci/include/mach/pinmux_defs.h
@@ -9,7 +9,6 @@
#define __ASM_ARCH_PINMUX_DEFS_H
#include <asm/arch/davinci_misc.h>
-#include <config.h>
/* SPI0 pin muxer settings */
extern const struct pinmux_config spi0_pins_base[3];
diff --git a/arch/arm/mach-exynos/exynos4_setup.h b/arch/arm/mach-exynos/exynos4_setup.h
index fbb45eb..23c9011 100644
--- a/arch/arm/mach-exynos/exynos4_setup.h
+++ b/arch/arm/mach-exynos/exynos4_setup.h
@@ -8,7 +8,6 @@
#ifndef _ORIGEN_SETUP_H
#define _ORIGEN_SETUP_H
-#include <config.h>
#include <asm/arch/cpu.h>
/* Bus Configuration Register Address */
diff --git a/arch/arm/mach-exynos/exynos5_setup.h b/arch/arm/mach-exynos/exynos5_setup.h
index af7a5af..e9874a8 100644
--- a/arch/arm/mach-exynos/exynos5_setup.h
+++ b/arch/arm/mach-exynos/exynos5_setup.h
@@ -8,7 +8,6 @@
#ifndef _SMDK5250_SETUP_H
#define _SMDK5250_SETUP_H
-#include <config.h>
#include <asm/arch/dmc.h>
#define NOT_AVAILABLE 0
diff --git a/arch/arm/mach-exynos/include/mach/gpio.h b/arch/arm/mach-exynos/include/mach/gpio.h
index f9975d7..9eeeb76 100644
--- a/arch/arm/mach-exynos/include/mach/gpio.h
+++ b/arch/arm/mach-exynos/include/mach/gpio.h
@@ -8,6 +8,9 @@
#define __ASM_ARCH_GPIO_H
#ifndef __ASSEMBLY__
+
+#include <asm/arch/cpu.h>
+
struct s5p_gpio_bank {
unsigned int con;
unsigned int dat;
diff --git a/arch/arm/mach-exynos/soc.c b/arch/arm/mach-exynos/soc.c
index a07c87a..aff2b5e 100644
--- a/arch/arm/mach-exynos/soc.c
+++ b/arch/arm/mach-exynos/soc.c
@@ -9,6 +9,7 @@
#include <asm/cache.h>
#include <asm/io.h>
#include <asm/system.h>
+#include <asm/arch/cpu.h>
#ifdef CONFIG_TARGET_ESPRESSO7420
/*
@@ -20,12 +21,14 @@
void *secondary_boot_addr = (void *)_main;
#endif /* CONFIG_TARGET_ESPRESSO7420 */
+#if !CONFIG_IS_ENABLED(SYSRESET)
void reset_cpu(void)
{
#ifdef CONFIG_CPU_V7A
writel(0x1, samsung_get_base_swreset());
#endif
}
+#endif
#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
void enable_caches(void)
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index abd48d4..c34bc25 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -54,6 +54,7 @@
bool "Support i.MX HAB features"
depends on ARCH_MX7 || ARCH_MX6 || ARCH_MX5 || ARCH_IMX8M || ARCH_MX7ULP
select FSL_CAAM if HAS_CAAM
+ select SPL_DRIVERS_MISC if SPL
imply CMD_DEKBLOB if HAS_CAAM
help
This option enables the support for secure boot (HAB).
diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
index a3b44c9..ef0caed 100644
--- a/arch/arm/mach-imx/Makefile
+++ b/arch/arm/mach-imx/Makefile
@@ -129,6 +129,9 @@
else ifeq ($(CONFIG_ARCH_IMX8M), y)
IMAGE_TYPE := imx8mimage
DEPFILE_EXISTS := 0
+else ifeq ($(CONFIG_ARCH_IMX9), y)
+IMAGE_TYPE := imx8image
+DEPFILE_EXISTS := 0
else
IMAGE_TYPE := imximage
DEPFILE_EXISTS := 0
@@ -213,7 +216,29 @@
endif
ifeq ($(CONFIG_ARCH_IMX9), y)
-SPL:
+
+quiet_cmd_imx9_check = CHECK $@
+cmd_imx9_check = $(srctree)/tools/imx9_image.sh $@
+
+SPL: spl/u-boot-spl.bin spl/u-boot-spl.cfgout u-boot-container.cfgout FORCE
+
+MKIMAGEFLAGS_flash.bin = -n spl/u-boot-spl.cfgout -T $(IMAGE_TYPE) -e $(CONFIG_SPL_TEXT_BASE)
+flash.bin: MKIMAGEOUTPUT = flash.log
+
+spl/u-boot-spl.cfgout: $(IMX_CONFIG) FORCE
+ $(Q)mkdir -p $(dir $@)
+ $(call if_changed_dep,cpp_cfg)
+ $(call if_changed,imx9_check)
+
+spl/u-boot-spl-ddr.bin: spl/u-boot-spl.bin spl/u-boot-spl.cfgout FORCE
+
+u-boot-container.cfgout: $(IMX_CONTAINER_CFG) FORCE
+ $(Q)mkdir -p $(dir $@)
+ $(call if_changed_dep,cpp_cfg)
+ $(call if_changed,imx9_check)
+
+flash.bin: spl/u-boot-spl-ddr.bin container.cfgout FORCE
+ $(call if_changed,mkimage)
endif
else
diff --git a/arch/arm/mach-imx/imx8/ahab.c b/arch/arm/mach-imx/imx8/ahab.c
index 994becc..1c072f6 100644
--- a/arch/arm/mach-imx/imx8/ahab.c
+++ b/arch/arm/mach-imx/imx8/ahab.c
@@ -340,6 +340,32 @@
return 0;
}
+int ahab_close(void)
+{
+ int err;
+ u16 lc;
+
+ err = sc_seco_chip_info(-1, &lc, NULL, NULL, NULL);
+ if (err != SC_ERR_NONE) {
+ printf("Error in get lifecycle\n");
+ return -EIO;
+ }
+
+ if (lc != 0x20) {
+ puts("Current lifecycle is NOT NXP closed, can't move to OEM closed\n");
+ display_life_cycle(lc);
+ return -EPERM;
+ }
+
+ err = sc_seco_forward_lifecycle(-1, 16);
+ if (err != SC_ERR_NONE) {
+ printf("Error in forward lifecycle to OEM closed\n");
+ return -EIO;
+ }
+
+ return 0;
+}
+
static int confirm_close(void)
{
puts("Warning: Please ensure your sample is in NXP closed state, "
@@ -361,27 +387,14 @@
{
int confirmed = argc >= 2 && !strcmp(argv[1], "-y");
int err;
- u16 lc;
if (!confirmed && !confirm_close())
return -EACCES;
- err = sc_seco_chip_info(-1, &lc, NULL, NULL, NULL);
+ err = ahab_close();
if (err) {
- printf("Error in get lifecycle\n");
- return -EIO;
- }
-
- if (lc != 0x20) {
- puts("Current lifecycle is NOT NXP closed, can't move to OEM closed\n");
- display_life_cycle(lc);
- return -EPERM;
- }
-
- err = sc_seco_forward_lifecycle(-1, 16);
- if (err) {
- printf("Error in forward lifecycle to OEM closed\n");
- return -EIO;
+ printf("Change to OEM closed failed\n");
+ return err;
}
printf("Change to OEM closed successfully\n");
diff --git a/arch/arm/mach-imx/imx8m/Kconfig b/arch/arm/mach-imx/imx8m/Kconfig
index 3d62d70..328c3e3 100644
--- a/arch/arm/mach-imx/imx8m/Kconfig
+++ b/arch/arm/mach-imx/imx8m/Kconfig
@@ -2,8 +2,10 @@
config IMX8M
bool
+ select BINMAN
select GICV3 if ARMV8_PSCI
select HAS_CAAM
+ select LTO
select ROM_UNIFIED_SECTIONS
select ARMV8_CRYPTO
@@ -41,13 +43,11 @@
config TARGET_IMX8MQ_CM
bool "Ronetix iMX8MQ-CM SoM"
- select BINMAN
select IMX8MQ
select IMX8M_LPDDR4
config TARGET_IMX8MQ_EVK
bool "imx8mq_evk"
- select BINMAN
select IMX8MQ
select IMX8M_LPDDR4
select FSL_CAAM
@@ -56,26 +56,22 @@
config TARGET_IMX8MQ_PHANBELL
bool "imx8mq_phanbell"
- select BINMAN
select IMX8MQ
select IMX8M_LPDDR4
config TARGET_IMX8MQ_REFORM2
bool "imx8mq_reform2"
- select BINMAN
select IMX8MQ
select IMX8M_LPDDR4
config TARGET_IMX8MM_DATA_MODUL_EDM_SBC
bool "Data Modul eDM SBC i.MX8M Mini"
- select BINMAN
select IMX8MM
select IMX8M_LPDDR4
select SUPPORT_SPL
config TARGET_IMX8MM_EVK
bool "imx8mm LPDDR4 EVK board"
- select BINMAN
select IMX8MM
select SUPPORT_SPL
select IMX8M_LPDDR4
@@ -85,7 +81,6 @@
config TARGET_IMX8MM_ICORE_MX8MM
bool "Engicam i.Core MX8M Mini SOM"
- select BINMAN
select IMX8MM
select SUPPORT_SPL
select IMX8M_LPDDR4
@@ -104,21 +99,18 @@
config TARGET_IMX8MM_MX8MENLO
bool "Support i.MX8M Mini MX8Menlo board based on Toradex Verdin SoM"
- select BINMAN
select IMX8MM
select SUPPORT_SPL
select IMX8M_LPDDR4
config TARGET_IMX8MM_PHG
bool "i.MX8MM PHG board"
- select BINMAN
select IMX8MM
select SUPPORT_SPL
select IMX8M_LPDDR4
config TARGET_IMX8MM_VENICE
bool "Support Gateworks Venice iMX8M Mini module"
- select BINMAN
select IMX8MM
select SUPPORT_SPL
select IMX8M_LPDDR4
@@ -130,7 +122,6 @@
config TARGET_KONTRON_MX8MM
bool "Kontron Electronics N80xx"
- select BINMAN
select IMX8MM
select SUPPORT_SPL
select IMX8M_LPDDR4
@@ -140,21 +131,18 @@
config TARGET_IMX8MN_BSH_SMM_S2
bool "imx8mn-bsh-smm-s2"
- select BINMAN
select IMX8MN
select SUPPORT_SPL
select IMX8M_DDR3L
config TARGET_IMX8MN_BSH_SMM_S2PRO
bool "imx8mn-bsh-smm-s2pro"
- select BINMAN
select IMX8MN
select SUPPORT_SPL
select IMX8M_DDR3L
config TARGET_IMX8MN_EVK
bool "imx8mn LPDDR4 EVK board"
- select BINMAN
select IMX8MN
select SUPPORT_SPL
select IMX8M_LPDDR4
@@ -163,7 +151,6 @@
config TARGET_IMX8MN_DDR4_EVK
bool "imx8mn DDR4 EVK board"
- select BINMAN
select IMX8MN
select SUPPORT_SPL
select IMX8M_DDR4
@@ -172,7 +159,6 @@
config TARGET_IMX8MN_VENICE
bool "Support Gateworks Venice iMX8M Nano module"
- select BINMAN
select IMX8MN
select SUPPORT_SPL
select IMX8M_LPDDR4
@@ -184,14 +170,12 @@
config TARGET_IMX8MP_DATA_MODUL_EDM_SBC
bool "Data Modul eDM SBC i.MX8M Plus"
- select BINMAN
select IMX8MP
select IMX8M_LPDDR4
select SUPPORT_SPL
config TARGET_IMX8MP_BEACON
bool "imx8mm Beacon Embedded devkit"
- select BINMAN
select IMX8MP
select SUPPORT_SPL
select IMX8M_LPDDR4
@@ -199,16 +183,20 @@
select ARCH_MISC_INIT
select SPL_CRYPTO if SPL
+config TARGET_IMX8MP_DEBIX_MODEL_A
+ bool "Polyhex i.MX8M Plus Debix Model A SBC"
+ select IMX8MP
+ select IMX8M_LPDDR4
+ select SUPPORT_SPL
+
config TARGET_IMX8MP_DH_DHCOM_PDK2
bool "DH electronics DHCOM Premium Developer Kit (2) i.MX8M Plus"
- select BINMAN
select IMX8MP
select IMX8M_LPDDR4
select SUPPORT_SPL
config TARGET_IMX8MP_ICORE_MX8MP
bool "Engicam i.Core MX8M Plus SOM"
- select BINMAN
select IMX8MP
select IMX8M_LPDDR4
select SUPPORT_SPL
@@ -222,7 +210,6 @@
config TARGET_IMX8MP_EVK
bool "imx8mp LPDDR4 EVK board"
- select BINMAN
select IMX8MP
select SUPPORT_SPL
select IMX8M_LPDDR4
@@ -232,7 +219,6 @@
config TARGET_IMX8MP_VENICE
bool "Support Gateworks Venice iMX8M Plus module"
- select BINMAN
select IMX8MP
select SUPPORT_SPL
select IMX8M_LPDDR4
@@ -244,13 +230,11 @@
config TARGET_PICO_IMX8MQ
bool "Support Technexion Pico iMX8MQ"
- select BINMAN
select IMX8MQ
select IMX8M_LPDDR4
config TARGET_IMX8MN_VAR_SOM
- bool "imx8mn_var_som"
- select BINMAN
+ bool "Variscite imx8mn_var_som"
select IMX8MN
select SUPPORT_SPL
select IMX8M_DDR4
@@ -261,27 +245,23 @@
config TARGET_KONTRON_PITX_IMX8M
bool "Support Kontron pITX-imx8m"
- select BINMAN
select IMX8MQ
select IMX8M_LPDDR4
config TARGET_VERDIN_IMX8MM
bool "Support Toradex Verdin iMX8M Mini module"
- select BINMAN
select IMX8MM
select SUPPORT_SPL
select IMX8M_LPDDR4
config TARGET_VERDIN_IMX8MP
bool "Support Toradex Verdin iMX8M Plus module"
- select BINMAN
select IMX8MP
select SUPPORT_SPL
select IMX8M_LPDDR4
config TARGET_IMX8MM_BEACON
bool "imx8mm Beacon Embedded devkit"
- select BINMAN
select IMX8MM
select SUPPORT_SPL
select IMX8M_LPDDR4
@@ -291,7 +271,6 @@
config TARGET_IMX8MN_BEACON
bool "imx8mn Beacon Embedded devkit"
- select BINMAN
select IMX8MN
select SUPPORT_SPL
select IMX8M_LPDDR4
@@ -301,21 +280,18 @@
config TARGET_PHYCORE_IMX8MM
bool "PHYTEC PHYCORE i.MX8MM"
- select BINMAN
select IMX8MM
select SUPPORT_SPL
select IMX8M_LPDDR4
config TARGET_PHYCORE_IMX8MP
bool "PHYTEC PHYCORE i.MX8MP"
- select BINMAN
select IMX8MP
select SUPPORT_SPL
select IMX8M_LPDDR4
config TARGET_IMX8MM_CL_IOT_GATE
bool "CompuLab iot-gate-imx8"
- select BINMAN
select IMX8MM
select SUPPORT_SPL
select IMX8M_LPDDR4
@@ -323,7 +299,6 @@
config TARGET_IMX8MM_CL_IOT_GATE_OPTEE
bool "CompuLab iot-gate-imx8 with optee support"
- select BINMAN
select IMX8MM
select SUPPORT_SPL
select IMX8M_LPDDR4
@@ -331,28 +306,24 @@
config TARGET_IMX8MP_RSB3720A1_4G
bool "Support i.MX8MP RSB3720A1 4G"
- select BINMAN
select IMX8MP
select SUPPORT_SPL
select IMX8M_LPDDR4
config TARGET_IMX8MP_RSB3720A1_6G
bool "Support i.MX8MP RSB3720A1 6G"
- select BINMAN
select IMX8MP
select SUPPORT_SPL
select IMX8M_LPDDR4
config TARGET_MSC_SM2S_IMX8MP
bool "MSC SMARC2 i.MX8MPLUS"
- select BINMAN
select IMX8MP
select SUPPORT_SPL
select IMX8M_LPDDR4
config TARGET_LIBREM5
bool "Purism Librem5 Phone"
- select BINMAN
select IMX8MQ
select SUPPORT_SPL
select IMX8M_LPDDR4
@@ -384,6 +355,7 @@
source "board/mntre/imx8mq_reform2/Kconfig"
source "board/phytec/phycore_imx8mm/Kconfig"
source "board/phytec/phycore_imx8mp/Kconfig"
+source "board/polyhex/imx8mp_debix_model_a/Kconfig"
source "board/purism/librem5/Kconfig"
source "board/ronetix/imx8mq-cm/Kconfig"
source "board/technexion/pico-imx8mq/Kconfig"
diff --git a/arch/arm/mach-imx/imx8m/clock_imx8mm.c b/arch/arm/mach-imx/imx8m/clock_imx8mm.c
index 9868707..4721995 100644
--- a/arch/arm/mach-imx/imx8m/clock_imx8mm.c
+++ b/arch/arm/mach-imx/imx8m/clock_imx8mm.c
@@ -56,6 +56,7 @@
static struct imx_int_pll_rate_table imx8mm_fracpll_tbl[] = {
PLL_1443X_RATE(1000000000U, 250, 3, 1, 0),
PLL_1443X_RATE(933000000U, 311, 4, 1, 0),
+ PLL_1443X_RATE(900000000U, 300, 8, 0, 0),
PLL_1443X_RATE(800000000U, 300, 9, 0, 0),
PLL_1443X_RATE(750000000U, 250, 8, 0, 0),
PLL_1443X_RATE(650000000U, 325, 3, 2, 0),
@@ -904,6 +905,13 @@
return 0;
}
+#else
+static int imx8mp_fec_interface_init(struct udevice *dev,
+ phy_interface_t interface_type,
+ bool mx8mp)
+{
+ return 0;
+}
#endif
int board_interface_eth_init(struct udevice *dev, phy_interface_t interface_type)
diff --git a/arch/arm/mach-imx/imx8ulp/soc.c b/arch/arm/mach-imx/imx8ulp/soc.c
index fd436dd..c3722c6 100644
--- a/arch/arm/mach-imx/imx8ulp/soc.c
+++ b/arch/arm/mach-imx/imx8ulp/soc.c
@@ -865,33 +865,29 @@
enum env_location env_get_location(enum env_operation op, int prio)
{
enum boot_device dev = get_boot_device();
- enum env_location env_loc = ENVL_UNKNOWN;
if (prio)
- return env_loc;
+ return ENVL_UNKNOWN;
switch (dev) {
-#ifdef CONFIG_ENV_IS_IN_SPI_FLASH
case QSPI_BOOT:
- env_loc = ENVL_SPI_FLASH;
- break;
-#endif
-#ifdef CONFIG_ENV_IS_IN_MMC
+ if (CONFIG_IS_ENABLED(ENV_IS_IN_SPI_FLASH))
+ return ENVL_SPI_FLASH;
+ return ENVL_NOWHERE;
case SD1_BOOT:
case SD2_BOOT:
case SD3_BOOT:
case MMC1_BOOT:
case MMC2_BOOT:
case MMC3_BOOT:
- env_loc = ENVL_MMC;
- break;
-#endif
+ if (CONFIG_IS_ENABLED(ENV_IS_IN_MMC))
+ return ENVL_MMC;
+ else if (CONFIG_IS_ENABLED(ENV_IS_IN_EXT4))
+ return ENVL_EXT4;
+ else if (CONFIG_IS_ENABLED(ENV_IS_IN_FAT))
+ return ENVL_FAT;
+ return ENVL_NOWHERE;
default:
-#if defined(CONFIG_ENV_IS_NOWHERE)
- env_loc = ENVL_NOWHERE;
-#endif
- break;
+ return ENVL_NOWHERE;
}
-
- return env_loc;
}
diff --git a/arch/arm/mach-imx/imx9/Kconfig b/arch/arm/mach-imx/imx9/Kconfig
index c51f80f..961d6f5 100644
--- a/arch/arm/mach-imx/imx9/Kconfig
+++ b/arch/arm/mach-imx/imx9/Kconfig
@@ -12,6 +12,7 @@
config IMX9
bool
+ select BINMAN
select HAS_CAAM
select ROM_UNIFIED_SECTIONS
@@ -31,9 +32,15 @@
bool "imx93_11x11_evk"
select IMX93
+config TARGET_IMX93_VAR_SOM
+ bool "imx93_var_som"
+ select IMX93
+ select IMX9_LPDDR4X
+
endchoice
source "board/freescale/imx93_evk/Kconfig"
+source "board/variscite/imx93_var_som/Kconfig"
endif
diff --git a/arch/arm/mach-imx/imx9/clock.c b/arch/arm/mach-imx/imx9/clock.c
index 766a881..92c41e9 100644
--- a/arch/arm/mach-imx/imx9/clock.c
+++ b/arch/arm/mach-imx/imx9/clock.c
@@ -18,6 +18,7 @@
#include <linux/bitops.h>
#include <linux/delay.h>
#include <log.h>
+#include <phy.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -832,6 +833,58 @@
return ccm_clk_root_get_rate(WAKEUP_AXI_CLK_ROOT);
}
+#if defined(CONFIG_IMX93) && defined(CONFIG_DWC_ETH_QOS)
+static int imx93_eqos_interface_init(struct udevice *dev, phy_interface_t interface_type)
+{
+ struct blk_ctrl_wakeupmix_regs *bctrl =
+ (struct blk_ctrl_wakeupmix_regs *)BLK_CTRL_WAKEUPMIX_BASE_ADDR;
+
+ clrbits_le32(&bctrl->eqos_gpr,
+ BCTRL_GPR_ENET_QOS_INTF_MODE_MASK |
+ BCTRL_GPR_ENET_QOS_CLK_GEN_EN);
+
+ switch (interface_type) {
+ case PHY_INTERFACE_MODE_MII:
+ setbits_le32(&bctrl->eqos_gpr,
+ BCTRL_GPR_ENET_QOS_INTF_SEL_MII |
+ BCTRL_GPR_ENET_QOS_CLK_GEN_EN);
+ break;
+ case PHY_INTERFACE_MODE_RMII:
+ setbits_le32(&bctrl->eqos_gpr,
+ BCTRL_GPR_ENET_QOS_INTF_SEL_RMII |
+ BCTRL_GPR_ENET_QOS_CLK_GEN_EN);
+ break;
+ case PHY_INTERFACE_MODE_RGMII:
+ case PHY_INTERFACE_MODE_RGMII_ID:
+ case PHY_INTERFACE_MODE_RGMII_RXID:
+ case PHY_INTERFACE_MODE_RGMII_TXID:
+ setbits_le32(&bctrl->eqos_gpr,
+ BCTRL_GPR_ENET_QOS_INTF_SEL_RGMII |
+ BCTRL_GPR_ENET_QOS_CLK_GEN_EN);
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ return 0;
+}
+#else
+static int imx93_eqos_interface_init(struct udevice *dev, phy_interface_t interface_type)
+{
+ return 0;
+}
+#endif
+
+int board_interface_eth_init(struct udevice *dev, phy_interface_t interface_type)
+{
+ if (IS_ENABLED(CONFIG_IMX93) &&
+ IS_ENABLED(CONFIG_DWC_ETH_QOS) &&
+ device_is_compatible(dev, "nxp,imx93-dwmac-eqos"))
+ return imx93_eqos_interface_init(dev, interface_type);
+
+ return -EINVAL;
+}
+
int set_clk_enet(enum enet_freq type)
{
u32 div;
diff --git a/arch/arm/mach-imx/imx9/container.cfg b/arch/arm/mach-imx/imx9/container.cfg
new file mode 100644
index 0000000..f268bc9
--- /dev/null
+++ b/arch/arm/mach-imx/imx9/container.cfg
@@ -0,0 +1,10 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2023 Mathieu Othacehe <m.othacehe@gmail.com>
+ */
+
+BOOT_FROM SD 0x400
+SOC_TYPE IMX9
+CONTAINER
+IMAGE A55 bl31.bin 0x204E0000
+IMAGE A55 u-boot.bin CONFIG_TEXT_BASE
\ No newline at end of file
diff --git a/arch/arm/mach-imx/imx9/imximage.cfg b/arch/arm/mach-imx/imx9/imximage.cfg
new file mode 100644
index 0000000..3e44046
--- /dev/null
+++ b/arch/arm/mach-imx/imx9/imximage.cfg
@@ -0,0 +1,10 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2023 Mathieu Othacehe <m.othacehe@gmail.com>
+ */
+
+BOOT_FROM SD 0x400
+SOC_TYPE IMX9
+APPEND mx93a0-ahab-container.img
+CONTAINER
+IMAGE A55 u-boot-spl-ddr.bin 0x2049A000
\ No newline at end of file
diff --git a/arch/arm/mach-imx/imx9/soc.c b/arch/arm/mach-imx/imx9/soc.c
index 86b45be..f06339f 100644
--- a/arch/arm/mach-imx/imx9/soc.c
+++ b/arch/arm/mach-imx/imx9/soc.c
@@ -507,8 +507,53 @@
return 0;
}
+static int fixup_thermal_trips(void *blob, const char *name)
+{
+ int minc, maxc;
+ int node, trip;
+
+ node = fdt_path_offset(blob, "/thermal-zones");
+ if (node < 0)
+ return node;
+
+ node = fdt_subnode_offset(blob, node, name);
+ if (node < 0)
+ return node;
+
+ node = fdt_subnode_offset(blob, node, "trips");
+ if (node < 0)
+ return node;
+
+ get_cpu_temp_grade(&minc, &maxc);
+
+ fdt_for_each_subnode(trip, blob, node) {
+ const char *type;
+ int temp, ret;
+
+ type = fdt_getprop(blob, trip, "type", NULL);
+ if (!type)
+ continue;
+
+ temp = 0;
+ if (!strcmp(type, "critical"))
+ temp = 1000 * (maxc - 5);
+ else if (!strcmp(type, "passive"))
+ temp = 1000 * (maxc - 10);
+ if (temp) {
+ ret = fdt_setprop_u32(blob, trip, "temperature", temp);
+ if (ret)
+ return ret;
+ }
+ }
+
+ return 0;
+}
+
int ft_system_setup(void *blob, struct bd_info *bd)
{
+ if (fixup_thermal_trips(blob, "cpu-thermal"))
+ printf("Failed to update cpu-thermal trip(s)");
+
return 0;
}
diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig
index 50a9c3e..114cce4 100644
--- a/arch/arm/mach-imx/mx6/Kconfig
+++ b/arch/arm/mach-imx/mx6/Kconfig
@@ -201,6 +201,7 @@
select DM_SPI
select DM_GPIO
select DM_SERIAL
+ select MTD
select SUPPORT_SPL
imply CMD_DM
@@ -261,6 +262,7 @@
select DM_SERIAL
select DM_I2C
select DM_SPI
+ select MTD
imply CMD_DM
config TARGET_MX6CUBOXI
@@ -602,6 +604,7 @@
imply DM
imply DM_GPIO
imply DM_MMC
+ imply MTD
imply DM_SPI
imply DM_SPI_FLASH
imply DM_I2C
diff --git a/arch/arm/mach-ipq40xx/Makefile b/arch/arm/mach-ipq40xx/Makefile
deleted file mode 100644
index 08a65b8..0000000
--- a/arch/arm/mach-ipq40xx/Makefile
+++ /dev/null
@@ -1,9 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-#
-# Copyright (c) 2019 Sartura Ltd.
-#
-# Author: Robert Marko <robert.marko@sartura.hr>
-
-obj-y += clock-ipq4019.o
-obj-y += pinctrl-snapdragon.o
-obj-y += pinctrl-ipq4019.o
diff --git a/arch/arm/mach-ipq40xx/clock-ipq4019.c b/arch/arm/mach-ipq40xx/clock-ipq4019.c
deleted file mode 100644
index c1d5c4e..0000000
--- a/arch/arm/mach-ipq40xx/clock-ipq4019.c
+++ /dev/null
@@ -1,88 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Clock drivers for Qualcomm IPQ40xx
- *
- * Copyright (c) 2020 Sartura Ltd.
- *
- * Author: Robert Marko <robert.marko@sartura.hr>
- *
- */
-
-#include <clk-uclass.h>
-#include <common.h>
-#include <dm.h>
-#include <errno.h>
-
-#include <dt-bindings/clock/qcom,ipq4019-gcc.h>
-
-struct msm_clk_priv {
- phys_addr_t base;
-};
-
-ulong msm_set_rate(struct clk *clk, ulong rate)
-{
- switch (clk->id) {
- case GCC_BLSP1_UART1_APPS_CLK: /*UART1*/
- /* This clock is already initialized by SBL1 */
- return 0;
- default:
- return -EINVAL;
- }
-}
-
-static int msm_clk_probe(struct udevice *dev)
-{
- struct msm_clk_priv *priv = dev_get_priv(dev);
-
- priv->base = dev_read_addr(dev);
- if (priv->base == FDT_ADDR_T_NONE)
- return -EINVAL;
-
- return 0;
-}
-
-static ulong msm_clk_set_rate(struct clk *clk, ulong rate)
-{
- return msm_set_rate(clk, rate);
-}
-
-static int msm_enable(struct clk *clk)
-{
- switch (clk->id) {
- case GCC_BLSP1_QUP1_SPI_APPS_CLK: /*SPI1*/
- /* This clock is already initialized by SBL1 */
- return 0;
- case GCC_PRNG_AHB_CLK: /*PRNG*/
- /* This clock is already initialized by SBL1 */
- return 0;
- case GCC_USB3_MASTER_CLK:
- case GCC_USB3_SLEEP_CLK:
- case GCC_USB3_MOCK_UTMI_CLK:
- case GCC_USB2_MASTER_CLK:
- case GCC_USB2_SLEEP_CLK:
- case GCC_USB2_MOCK_UTMI_CLK:
- /* These clocks is already initialized by SBL1 */
- return 0;
- default:
- return -EINVAL;
- }
-}
-
-static struct clk_ops msm_clk_ops = {
- .set_rate = msm_clk_set_rate,
- .enable = msm_enable,
-};
-
-static const struct udevice_id msm_clk_ids[] = {
- { .compatible = "qcom,gcc-ipq4019" },
- { }
-};
-
-U_BOOT_DRIVER(clk_msm) = {
- .name = "clk_msm",
- .id = UCLASS_CLK,
- .of_match = msm_clk_ids,
- .ops = &msm_clk_ops,
- .priv_auto = sizeof(struct msm_clk_priv),
- .probe = msm_clk_probe,
-};
diff --git a/arch/arm/mach-ipq40xx/pinctrl-snapdragon.c b/arch/arm/mach-ipq40xx/pinctrl-snapdragon.c
deleted file mode 100644
index 036fec9..0000000
--- a/arch/arm/mach-ipq40xx/pinctrl-snapdragon.c
+++ /dev/null
@@ -1,166 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * TLMM driver for Qualcomm IPQ40xx
- *
- * (C) Copyright 2018 Ramon Fried <ramon.fried@gmail.com>
- *
- * Copyright (c) 2020 Sartura Ltd.
- *
- * Author: Robert Marko <robert.marko@sartura.hr>
- *
- */
-
-#include <common.h>
-#include <dm.h>
-#include <errno.h>
-#include <asm/io.h>
-#include <dm/device_compat.h>
-#include <dm/lists.h>
-#include <dm/pinctrl.h>
-#include <linux/bitops.h>
-#include "pinctrl-snapdragon.h"
-
-struct msm_pinctrl_priv {
- phys_addr_t base;
- struct msm_pinctrl_data *data;
-};
-
-#define GPIO_CONFIG_OFFSET(x) ((x) * 0x1000)
-#define TLMM_GPIO_PULL_MASK GENMASK(1, 0)
-#define TLMM_FUNC_SEL_MASK GENMASK(5, 2)
-#define TLMM_DRV_STRENGTH_MASK GENMASK(8, 6)
-#define TLMM_GPIO_DISABLE BIT(9)
-
-static const struct pinconf_param msm_conf_params[] = {
- { "drive-strength", PIN_CONFIG_DRIVE_STRENGTH, 2 },
- { "bias-disable", PIN_CONFIG_BIAS_DISABLE, 0 },
- { "bias-pull-up", PIN_CONFIG_BIAS_PULL_UP, 2 },
-};
-
-static int msm_get_functions_count(struct udevice *dev)
-{
- struct msm_pinctrl_priv *priv = dev_get_priv(dev);
-
- return priv->data->functions_count;
-}
-
-static int msm_get_pins_count(struct udevice *dev)
-{
- struct msm_pinctrl_priv *priv = dev_get_priv(dev);
-
- return priv->data->pin_count;
-}
-
-static const char *msm_get_function_name(struct udevice *dev,
- unsigned int selector)
-{
- struct msm_pinctrl_priv *priv = dev_get_priv(dev);
-
- return priv->data->get_function_name(dev, selector);
-}
-
-static int msm_pinctrl_probe(struct udevice *dev)
-{
- struct msm_pinctrl_priv *priv = dev_get_priv(dev);
-
- priv->base = devfdt_get_addr(dev);
- priv->data = (struct msm_pinctrl_data *)dev->driver_data;
-
- return priv->base == FDT_ADDR_T_NONE ? -EINVAL : 0;
-}
-
-static const char *msm_get_pin_name(struct udevice *dev, unsigned int selector)
-{
- struct msm_pinctrl_priv *priv = dev_get_priv(dev);
-
- return priv->data->get_pin_name(dev, selector);
-}
-
-static int msm_pinmux_set(struct udevice *dev, unsigned int pin_selector,
- unsigned int func_selector)
-{
- struct msm_pinctrl_priv *priv = dev_get_priv(dev);
-
- clrsetbits_le32(priv->base + GPIO_CONFIG_OFFSET(pin_selector),
- TLMM_FUNC_SEL_MASK | TLMM_GPIO_DISABLE,
- priv->data->get_function_mux(func_selector) << 2);
- return 0;
-}
-
-static int msm_pinconf_set(struct udevice *dev, unsigned int pin_selector,
- unsigned int param, unsigned int argument)
-{
- struct msm_pinctrl_priv *priv = dev_get_priv(dev);
-
- switch (param) {
- case PIN_CONFIG_DRIVE_STRENGTH:
- clrsetbits_le32(priv->base + GPIO_CONFIG_OFFSET(pin_selector),
- TLMM_DRV_STRENGTH_MASK, argument << 6);
- break;
- case PIN_CONFIG_BIAS_DISABLE:
- clrbits_le32(priv->base + GPIO_CONFIG_OFFSET(pin_selector),
- TLMM_GPIO_PULL_MASK);
- break;
- case PIN_CONFIG_BIAS_PULL_UP:
- clrsetbits_le32(priv->base + GPIO_CONFIG_OFFSET(pin_selector),
- TLMM_GPIO_PULL_MASK, argument);
- break;
- default:
- return 0;
- }
-
- return 0;
-}
-
-static int msm_pinctrl_bind(struct udevice *dev)
-{
- ofnode node = dev_ofnode(dev);
- const char *name;
- int ret;
-
- ofnode_get_property(node, "gpio-controller", &ret);
- if (ret < 0)
- return 0;
-
- /* Get the name of gpio node */
- name = ofnode_get_name(node);
- if (!name)
- return -EINVAL;
-
- /* Bind gpio node */
- ret = device_bind_driver_to_node(dev, "gpio_msm",
- name, node, NULL);
- if (ret)
- return ret;
-
- dev_dbg(dev, "bind %s\n", name);
-
- return 0;
-}
-
-static struct pinctrl_ops msm_pinctrl_ops = {
- .get_pins_count = msm_get_pins_count,
- .get_pin_name = msm_get_pin_name,
- .set_state = pinctrl_generic_set_state,
- .pinmux_set = msm_pinmux_set,
- .pinconf_num_params = ARRAY_SIZE(msm_conf_params),
- .pinconf_params = msm_conf_params,
- .pinconf_set = msm_pinconf_set,
- .get_functions_count = msm_get_functions_count,
- .get_function_name = msm_get_function_name,
-};
-
-static const struct udevice_id msm_pinctrl_ids[] = {
- { .compatible = "qcom,ipq4019-pinctrl", .data = (ulong)&ipq4019_data },
- { }
-};
-
-U_BOOT_DRIVER(pinctrl_snapdraon) = {
- .name = "pinctrl_msm",
- .id = UCLASS_PINCTRL,
- .of_match = msm_pinctrl_ids,
- .priv_auto = sizeof(struct msm_pinctrl_priv),
- .ops = &msm_pinctrl_ops,
- .probe = msm_pinctrl_probe,
- .bind = msm_pinctrl_bind,
-};
diff --git a/arch/arm/mach-k3/am625_fdt.c b/arch/arm/mach-k3/am625_fdt.c
index 3780690..970dd34 100644
--- a/arch/arm/mach-k3/am625_fdt.c
+++ b/arch/arm/mach-k3/am625_fdt.c
@@ -38,29 +38,6 @@
fdt_del_node_path(blob, "/bus@f0000/pruss@30040000");
}
-static int k3_get_core_nr(void)
-{
- u32 full_devid = readl(CTRLMMR_WKUP_JTAG_DEVICE_ID);
-
- return (full_devid & JTAG_DEV_CORE_NR_MASK) >> JTAG_DEV_CORE_NR_SHIFT;
-}
-
-static int k3_has_pru(void)
-{
- u32 full_devid = readl(CTRLMMR_WKUP_JTAG_DEVICE_ID);
- u32 feature_mask = (full_devid & JTAG_DEV_FEATURES_MASK) >>
- JTAG_DEV_FEATURES_SHIFT;
-
- return !(feature_mask & JTAG_DEV_FEATURE_NO_PRU);
-}
-
-static int k3_has_gpu(void)
-{
- u32 full_devid = readl(CTRLMMR_WKUP_JTAG_DEVICE_ID);
-
- return (full_devid & JTAG_DEV_GPU_MASK) >> JTAG_DEV_GPU_SHIFT;
-}
-
int ft_system_setup(void *blob, struct bd_info *bd)
{
fdt_fixup_cores_nodes_am625(blob, k3_get_core_nr());
diff --git a/arch/arm/mach-k3/am625_init.c b/arch/arm/mach-k3/am625_init.c
index 1d4ef35..6c96e88 100644
--- a/arch/arm/mach-k3/am625_init.c
+++ b/arch/arm/mach-k3/am625_init.c
@@ -222,11 +222,8 @@
switch (bootmode) {
case BOOT_DEVICE_EMMC:
- if (IS_ENABLED(CONFIG_SUPPORT_EMMC_BOOT)) {
- if (spl_mmc_emmc_boot_partition(mmc))
- return MMCSD_MODE_EMMCBOOT;
- return MMCSD_MODE_FS;
- }
+ if (IS_ENABLED(CONFIG_SUPPORT_EMMC_BOOT))
+ return MMCSD_MODE_EMMCBOOT;
if (IS_ENABLED(CONFIG_SPL_FS_FAT) || IS_ENABLED(CONFIG_SPL_FS_EXT4))
return MMCSD_MODE_FS;
return MMCSD_MODE_EMMCBOOT;
diff --git a/arch/arm/mach-k3/am62x/Kconfig b/arch/arm/mach-k3/am62x/Kconfig
index 8091d72..935d596 100644
--- a/arch/arm/mach-k3/am62x/Kconfig
+++ b/arch/arm/mach-k3/am62x/Kconfig
@@ -25,6 +25,22 @@
select BINMAN
imply SYS_K3_SPL_ATF
+config TARGET_PHYCORE_AM62X_A53
+ bool "PHYTEC phyCORE-AM62x running on A53"
+ select ARM64
+ select BINMAN
+
+config TARGET_PHYCORE_AM62X_R5
+ bool "PHYTEC phyCORE-AM62x running on R5"
+ select CPU_V7R
+ select SYS_THUMB_BUILD
+ select K3_LOAD_SYSFW
+ select RAM
+ select SPL_RAM
+ select K3_DDRSS
+ select BINMAN
+ imply SYS_K3_SPL_ATF
+
config TARGET_VERDIN_AM62_A53
bool "Toradex Verdin AM62 running on A53"
select ARM64
@@ -44,6 +60,7 @@
endchoice
source "board/beagle/beagleplay/Kconfig"
+source "board/phytec/phycore_am62x/Kconfig"
source "board/ti/am62x/Kconfig"
source "board/toradex/verdin-am62/Kconfig"
diff --git a/arch/arm/mach-k3/am642_init.c b/arch/arm/mach-k3/am642_init.c
index 6085379..ddf47ef 100644
--- a/arch/arm/mach-k3/am642_init.c
+++ b/arch/arm/mach-k3/am642_init.c
@@ -348,6 +348,9 @@
case BOOT_DEVICE_EMMC:
return BOOT_DEVICE_MMC1;
+ case BOOT_DEVICE_NAND:
+ return BOOT_DEVICE_NAND;
+
case BOOT_DEVICE_MMC:
if ((bootmode_cfg & MAIN_DEVSTAT_PRIMARY_MMC_PORT_MASK) >>
MAIN_DEVSTAT_PRIMARY_MMC_PORT_SHIFT)
diff --git a/arch/arm/mach-k3/arm64-mmu.c b/arch/arm/mach-k3/arm64-mmu.c
index e8db533..0e07b1b 100644
--- a/arch/arm/mach-k3/arm64-mmu.c
+++ b/arch/arm/mach-k3/arm64-mmu.c
@@ -12,12 +12,7 @@
#include <asm/system.h>
#include <asm/armv8/mmu.h>
-#ifdef CONFIG_SOC_K3_AM654
-/* NR_DRAM_BANKS + 32bit IO + 64bit IO + terminator */
-#define NR_MMU_REGIONS (CONFIG_NR_DRAM_BANKS + 5)
-
-/* ToDo: Add 64bit IO */
-struct mm_region am654_mem_map[NR_MMU_REGIONS] = {
+struct mm_region k3_mem_map[] = {
{
.virt = 0x0UL,
.phys = 0x0UL,
@@ -28,271 +23,12 @@
}, {
.virt = 0x80000000UL,
.phys = 0x80000000UL,
- .size = 0x20000000UL,
+ .size = 0x1e780000UL,
.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
PTE_BLOCK_INNER_SHARE
}, {
.virt = 0xa0000000UL,
.phys = 0xa0000000UL,
- .size = 0x02100000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL_NC) |
- PTE_BLOCK_INNER_SHARE
- }, {
- .virt = 0xa2100000UL,
- .phys = 0xa2100000UL,
- .size = 0x5df00000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
- PTE_BLOCK_INNER_SHARE
- }, {
- .virt = 0x880000000UL,
- .phys = 0x880000000UL,
- .size = 0x80000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
- PTE_BLOCK_INNER_SHARE
- }, {
- .virt = 0x500000000UL,
- .phys = 0x500000000UL,
- .size = 0x400000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
- PTE_BLOCK_NON_SHARE |
- PTE_BLOCK_PXN | PTE_BLOCK_UXN
- }, {
- /* List terminator */
- 0,
- }
-};
-
-struct mm_region *mem_map = am654_mem_map;
-#endif /* CONFIG_SOC_K3_AM654 */
-
-#ifdef CONFIG_SOC_K3_J721E
-
-#ifdef CONFIG_SOC_K3_J721E_J7200
-#define NR_MMU_REGIONS (CONFIG_NR_DRAM_BANKS + 5)
-
-/* ToDo: Add 64bit IO */
-struct mm_region j7200_mem_map[NR_MMU_REGIONS] = {
- {
- .virt = 0x0UL,
- .phys = 0x0UL,
- .size = 0x80000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
- PTE_BLOCK_NON_SHARE |
- PTE_BLOCK_PXN | PTE_BLOCK_UXN
- }, {
- .virt = 0x80000000UL,
- .phys = 0x80000000UL,
- .size = 0x20000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
- PTE_BLOCK_INNER_SHARE
- }, {
- .virt = 0xa0000000UL,
- .phys = 0xa0000000UL,
- .size = 0x04800000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL_NC) |
- PTE_BLOCK_NON_SHARE
- }, {
- .virt = 0xa4800000UL,
- .phys = 0xa4800000UL,
- .size = 0x5b800000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
- PTE_BLOCK_INNER_SHARE
- }, {
- .virt = 0x880000000UL,
- .phys = 0x880000000UL,
- .size = 0x80000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
- PTE_BLOCK_INNER_SHARE
- }, {
- .virt = 0x500000000UL,
- .phys = 0x500000000UL,
- .size = 0x400000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
- PTE_BLOCK_NON_SHARE |
- PTE_BLOCK_PXN | PTE_BLOCK_UXN
- }, {
- /* List terminator */
- 0,
- }
-};
-
-struct mm_region *mem_map = j7200_mem_map;
-
-#else /* CONFIG_SOC_K3_J721E_J7200 */
-
-/* NR_DRAM_BANKS + 32bit IO + 64bit IO + terminator */
-#define NR_MMU_REGIONS (CONFIG_NR_DRAM_BANKS + 6)
-
-/* ToDo: Add 64bit IO */
-struct mm_region j721e_mem_map[NR_MMU_REGIONS] = {
- {
- .virt = 0x0UL,
- .phys = 0x0UL,
- .size = 0x80000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
- PTE_BLOCK_NON_SHARE |
- PTE_BLOCK_PXN | PTE_BLOCK_UXN
- }, {
- .virt = 0x80000000UL,
- .phys = 0x80000000UL,
- .size = 0x20000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
- PTE_BLOCK_INNER_SHARE
- }, {
- .virt = 0xa0000000UL,
- .phys = 0xa0000000UL,
- .size = 0x1bc00000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL_NC) |
- PTE_BLOCK_NON_SHARE
- }, {
- .virt = 0xbbc00000UL,
- .phys = 0xbbc00000UL,
- .size = 0x44400000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
- PTE_BLOCK_INNER_SHARE
- }, {
- .virt = 0x880000000UL,
- .phys = 0x880000000UL,
- .size = 0x80000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
- PTE_BLOCK_INNER_SHARE
- }, {
- .virt = 0x500000000UL,
- .phys = 0x500000000UL,
- .size = 0x400000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
- PTE_BLOCK_NON_SHARE |
- PTE_BLOCK_PXN | PTE_BLOCK_UXN
- }, {
- .virt = 0x4d80000000UL,
- .phys = 0x4d80000000UL,
- .size = 0x0002000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL_NC) |
- PTE_BLOCK_INNER_SHARE
- }, {
- /* List terminator */
- 0,
- }
-};
-
-struct mm_region *mem_map = j721e_mem_map;
-#endif /* CONFIG_SOC_K3_J721E_J7200 */
-
-#endif /* CONFIG_SOC_K3_J721E */
-
-#ifdef CONFIG_SOC_K3_J721S2
-#define NR_MMU_REGIONS (CONFIG_NR_DRAM_BANKS + 3)
-
-/* ToDo: Add 64bit IO */
-struct mm_region j721s2_mem_map[NR_MMU_REGIONS] = {
- {
- .virt = 0x0UL,
- .phys = 0x0UL,
- .size = 0x80000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
- PTE_BLOCK_NON_SHARE |
- PTE_BLOCK_PXN | PTE_BLOCK_UXN
- }, {
- .virt = 0x80000000UL,
- .phys = 0x80000000UL,
- .size = 0x80000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
- PTE_BLOCK_INNER_SHARE
- }, {
- .virt = 0x880000000UL,
- .phys = 0x880000000UL,
- .size = 0x80000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
- PTE_BLOCK_INNER_SHARE
- }, {
- .virt = 0x500000000UL,
- .phys = 0x500000000UL,
- .size = 0x400000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
- PTE_BLOCK_NON_SHARE |
- PTE_BLOCK_PXN | PTE_BLOCK_UXN
- }, {
- /* List terminator */
- 0,
- }
-};
-
-struct mm_region *mem_map = j721s2_mem_map;
-
-#endif /* CONFIG_SOC_K3_J721S2 */
-
-#if defined(CONFIG_SOC_K3_AM625) || defined(CONFIG_SOC_K3_AM62A7)
-
-/* NR_DRAM_BANKS + 32bit IO + 64bit IO + terminator */
-#define NR_MMU_REGIONS (CONFIG_NR_DRAM_BANKS + 4)
-
-/* ToDo: Add 64bit IO */
-struct mm_region am62_mem_map[NR_MMU_REGIONS] = {
- {
- .virt = 0x0UL,
- .phys = 0x0UL,
- .size = 0x80000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
- PTE_BLOCK_NON_SHARE |
- PTE_BLOCK_PXN | PTE_BLOCK_UXN
- }, {
- .virt = 0x80000000UL,
- .phys = 0x80000000UL,
- .size = 0x1E780000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
- PTE_BLOCK_INNER_SHARE
- }, {
- .virt = 0xA0000000UL,
- .phys = 0xA0000000UL,
- .size = 0x60000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
- PTE_BLOCK_INNER_SHARE
-
- }, {
- .virt = 0x880000000UL,
- .phys = 0x880000000UL,
- .size = 0x80000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
- PTE_BLOCK_INNER_SHARE
- }, {
- .virt = 0x500000000UL,
- .phys = 0x500000000UL,
- .size = 0x400000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
- PTE_BLOCK_NON_SHARE |
- PTE_BLOCK_PXN | PTE_BLOCK_UXN
- }, {
- /* List terminator */
- 0,
- }
-};
-
-struct mm_region *mem_map = am62_mem_map;
-#endif /* CONFIG_SOC_K3_AM625 || CONFIG_SOC_K3_AM62A7 */
-
-#ifdef CONFIG_SOC_K3_AM642
-
-/* NR_DRAM_BANKS + 32bit IO + 64bit IO + terminator */
-#define NR_MMU_REGIONS (CONFIG_NR_DRAM_BANKS + 4)
-
-/* ToDo: Add 64bit IO */
-struct mm_region am64_mem_map[NR_MMU_REGIONS] = {
- {
- .virt = 0x0UL,
- .phys = 0x0UL,
- .size = 0x80000000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
- PTE_BLOCK_NON_SHARE |
- PTE_BLOCK_PXN | PTE_BLOCK_UXN
- }, {
- .virt = 0x80000000UL,
- .phys = 0x80000000UL,
- .size = 0x1E800000UL,
- .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
- PTE_BLOCK_INNER_SHARE
- }, {
- .virt = 0xA0000000UL,
- .phys = 0xA0000000UL,
.size = 0x60000000UL,
.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
PTE_BLOCK_INNER_SHARE
@@ -305,7 +41,7 @@
}, {
.virt = 0x500000000UL,
.phys = 0x500000000UL,
- .size = 0x400000000UL,
+ .size = 0x380000000UL,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
PTE_BLOCK_NON_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
@@ -315,5 +51,4 @@
}
};
-struct mm_region *mem_map = am64_mem_map;
-#endif /* CONFIG_SOC_K3_AM642 */
+struct mm_region *mem_map = k3_mem_map;
diff --git a/arch/arm/mach-k3/common.c b/arch/arm/mach-k3/common.c
index 42ceeb5..f411366 100644
--- a/arch/arm/mach-k3/common.c
+++ b/arch/arm/mach-k3/common.c
@@ -6,6 +6,7 @@
* Lokesh Vutla <lokeshvutla@ti.com>
*/
+#include <config.h>
#include <cpu_func.h>
#include <image.h>
#include <init.h>
diff --git a/arch/arm/mach-k3/include/mach/am62_hardware.h b/arch/arm/mach-k3/include/mach/am62_hardware.h
index acd2d10..54380f3 100644
--- a/arch/arm/mach-k3/include/mach/am62_hardware.h
+++ b/arch/arm/mach-k3/include/mach/am62_hardware.h
@@ -79,6 +79,45 @@
#define TI_SRAM_SCRATCH_BOARD_EEPROM_START 0x43c30000
+static inline int k3_get_core_nr(void)
+{
+ u32 full_devid = readl(CTRLMMR_WKUP_JTAG_DEVICE_ID);
+
+ return (full_devid & JTAG_DEV_CORE_NR_MASK) >> JTAG_DEV_CORE_NR_SHIFT;
+}
+
+static inline char k3_get_speed_grade(void)
+{
+ u32 full_devid = readl(CTRLMMR_WKUP_JTAG_DEVICE_ID);
+ u32 speed_grade = (full_devid & JTAG_DEV_SPEED_MASK) >>
+ JTAG_DEV_SPEED_SHIFT;
+
+ return 'A' - 1 + speed_grade;
+}
+
+static inline int k3_get_temp_grade(void)
+{
+ u32 full_devid = readl(CTRLMMR_WKUP_JTAG_DEVICE_ID);
+
+ return (full_devid & JTAG_DEV_TEMP_MASK) >> JTAG_DEV_TEMP_SHIFT;
+}
+
+static inline int k3_has_pru(void)
+{
+ u32 full_devid = readl(CTRLMMR_WKUP_JTAG_DEVICE_ID);
+ u32 feature_mask = (full_devid & JTAG_DEV_FEATURES_MASK) >>
+ JTAG_DEV_FEATURES_SHIFT;
+
+ return !(feature_mask & JTAG_DEV_FEATURE_NO_PRU);
+}
+
+static inline int k3_has_gpu(void)
+{
+ u32 full_devid = readl(CTRLMMR_WKUP_JTAG_DEVICE_ID);
+
+ return (full_devid & JTAG_DEV_GPU_MASK) >> JTAG_DEV_GPU_SHIFT;
+}
+
#if defined(CONFIG_SYS_K3_SPL_ATF) && !defined(__ASSEMBLY__)
static const u32 put_device_ids[] = {};
diff --git a/arch/arm/mach-k3/include/mach/am64_spl.h b/arch/arm/mach-k3/include/mach/am64_spl.h
index b4f396b..a0a5170 100644
--- a/arch/arm/mach-k3/include/mach/am64_spl.h
+++ b/arch/arm/mach-k3/include/mach/am64_spl.h
@@ -22,6 +22,7 @@
#define BOOT_DEVICE_USB 0x2A
#define BOOT_DEVICE_DFU 0x0A
+#define BOOT_DEVICE_NAND 0x0B
#define BOOT_DEVICE_GPMC_NOR 0x0C
#define BOOT_DEVICE_PCIE 0x0D
#define BOOT_DEVICE_XSPI 0x0E
diff --git a/arch/arm/mach-k3/include/mach/clock.h b/arch/arm/mach-k3/include/mach/clock.h
index 32368ce..8663193 100644
--- a/arch/arm/mach-k3/include/mach/clock.h
+++ b/arch/arm/mach-k3/include/mach/clock.h
@@ -7,8 +7,6 @@
#ifndef __ASM_ARCH_CLOCK_H
#define __ASM_ARCH_CLOCK_H
-#include <config.h>
-
/* Clock Defines */
#define V_OSCK 24000000
#define V_SCLK V_OSCK
diff --git a/arch/arm/mach-k3/include/mach/j721e_hardware.h b/arch/arm/mach-k3/include/mach/j721e_hardware.h
index 7803411..0ba37c9 100644
--- a/arch/arm/mach-k3/include/mach/j721e_hardware.h
+++ b/arch/arm/mach-k3/include/mach/j721e_hardware.h
@@ -7,7 +7,6 @@
#ifndef __ASM_ARCH_J721E_HARDWARE_H
#define __ASM_ARCH_J721E_HARDWARE_H
-#include <config.h>
#ifndef __ASSEMBLY__
#include <linux/bitops.h>
#endif
diff --git a/arch/arm/mach-k3/include/mach/j721s2_hardware.h b/arch/arm/mach-k3/include/mach/j721s2_hardware.h
index ad4fcdd..5aa2282 100644
--- a/arch/arm/mach-k3/include/mach/j721s2_hardware.h
+++ b/arch/arm/mach-k3/include/mach/j721s2_hardware.h
@@ -7,7 +7,6 @@
#ifndef __ASM_ARCH_J721S2_HARDWARE_H
#define __ASM_ARCH_J721S2_HARDWARE_H
-#include <config.h>
#ifndef __ASSEMBLY__
#include <linux/bitops.h>
#endif
diff --git a/arch/arm/mach-k3/r5/j7200/clk-data.c b/arch/arm/mach-k3/r5/j7200/clk-data.c
index 9b45786..eb8436d 100644
--- a/arch/arm/mach-k3/r5/j7200/clk-data.c
+++ b/arch/arm/mach-k3/r5/j7200/clk-data.c
@@ -141,6 +141,11 @@
"hsdiv4_16fft_main_0_hsdivout0_clk",
};
+static const char * const main_pll8_sel_extwave_out0_parents[] = {
+ "pllfracf_ssmod_16fft_main_8_foutvcop_clk",
+ "hsdiv0_16fft_main_8_hsdivout0_clk",
+};
+
static const char * const mcu_obsclk_outmux_out0_parents[] = {
"mcu_obsclk_div_out0",
"gluelogic_hfosc0_clkout",
@@ -396,6 +401,7 @@
CLK_DIV("hsdiv4_16fft_main_3_hsdivout2_clk", "pllfracf_ssmod_16fft_main_3_foutvcop_clk", 0x683088, 0, 7, 0, 0),
CLK_MUX_PLLCTRL("k3_pll_ctrl_wrap_main_0_sysclkout_clk", k3_pll_ctrl_wrap_main_0_sysclkout_clk_parents, 2, 0x410000, 0),
CLK_DIV("k3_pll_ctrl_wrap_main_0_chip_div1_clk_clk", "k3_pll_ctrl_wrap_main_0_sysclkout_clk", 0x410118, 0, 5, 0, 0),
+ CLK_MUX("main_pll8_sel_extwave_out0", main_pll8_sel_extwave_out0_parents, 2, 0x688040, 0, 1, 0),
CLK_DIV("mcu_obsclk_div_out0", "wkup_obsclk_mux_out0", 0x43008000, 8, 4, 0, 0),
CLK_MUX("mcu_obsclk_outmux_out0", mcu_obsclk_outmux_out0_parents, 2, 0x43008000, 24, 1, 0),
CLK_PLL("pllfracf_ssmod_16fft_main_4_foutvcop_clk", "main_pll4_xref_sel_out0", 0x684000, 0),
@@ -545,11 +551,14 @@
DEV_CLK(288, 14, "board_0_hfosc1_clk_out"),
DEV_CLK(288, 15, "k3_pll_ctrl_wrap_main_0_chip_div1_clk_clk"),
DEV_CLK(288, 17, "k3_pll_ctrl_wrap_main_0_chip_div1_clk_clk"),
+ DEV_CLK(323, 0, "main_pll8_sel_extwave_out0"),
+ DEV_CLK(323, 1, "pllfracf_ssmod_16fft_main_8_foutvcop_clk"),
+ DEV_CLK(323, 2, "hsdiv0_16fft_main_8_hsdivout0_clk"),
};
const struct ti_k3_clk_platdata j7200_clk_platdata = {
.clk_list = clk_list,
- .clk_list_cnt = 109,
+ .clk_list_cnt = ARRAY_SIZE(clk_list),
.soc_dev_clk_data = soc_dev_clk_data,
- .soc_dev_clk_data_cnt = 129,
+ .soc_dev_clk_data_cnt = ARRAY_SIZE(soc_dev_clk_data),
};
diff --git a/board/ti/common/schema.yaml b/arch/arm/mach-k3/schema.yaml
similarity index 100%
rename from board/ti/common/schema.yaml
rename to arch/arm/mach-k3/schema.yaml
diff --git a/arch/arm/mach-keystone/clock.c b/arch/arm/mach-keystone/clock.c
index 0c59515..4f19379 100644
--- a/arch/arm/mach-keystone/clock.c
+++ b/arch/arm/mach-keystone/clock.c
@@ -6,7 +6,6 @@
* Texas Instruments Incorporated, <www.ti.com>
*/
-#include <common.h>
#include <asm/arch/clock.h>
#include <asm/arch/clock_defs.h>
#include <linux/bitops.h>
diff --git a/arch/arm/mach-keystone/cmd_clock.c b/arch/arm/mach-keystone/cmd_clock.c
index 72dc394..e9ecc05 100644
--- a/arch/arm/mach-keystone/cmd_clock.c
+++ b/arch/arm/mach-keystone/cmd_clock.c
@@ -6,7 +6,7 @@
* Texas Instruments Incorporated, <www.ti.com>
*/
-#include <common.h>
+#include <vsprintf.h>
#include <command.h>
#include <asm/arch/hardware.h>
#include <asm/arch/clock.h>
diff --git a/arch/arm/mach-keystone/cmd_mon.c b/arch/arm/mach-keystone/cmd_mon.c
index dc97bac..d3b894c 100644
--- a/arch/arm/mach-keystone/cmd_mon.c
+++ b/arch/arm/mach-keystone/cmd_mon.c
@@ -6,7 +6,7 @@
* Texas Instruments Incorporated, <www.ti.com>
*/
-#include <common.h>
+#include <config.h>
#include <command.h>
#include <image.h>
#include <mach/mon.h>
diff --git a/arch/arm/mach-keystone/cmd_poweroff.c b/arch/arm/mach-keystone/cmd_poweroff.c
index f0ad917..0ad31ef 100644
--- a/arch/arm/mach-keystone/cmd_poweroff.c
+++ b/arch/arm/mach-keystone/cmd_poweroff.c
@@ -6,7 +6,6 @@
* Texas Instruments Incorporated, <www.ti.com>
*/
-#include <common.h>
#include <command.h>
#include <asm/arch/mon.h>
#include <asm/arch/psc_defs.h>
diff --git a/arch/arm/mach-keystone/ddr3.c b/arch/arm/mach-keystone/ddr3.c
index ea7d0b9..ca0fb70 100644
--- a/arch/arm/mach-keystone/ddr3.c
+++ b/arch/arm/mach-keystone/ddr3.c
@@ -9,7 +9,7 @@
#include <cpu_func.h>
#include <env.h>
#include <asm/io.h>
-#include <common.h>
+#include <vsprintf.h>
#include <asm/arch/msmc.h>
#include <asm/arch/ddr3.h>
#include <asm/arch/psc_defs.h>
diff --git a/arch/arm/mach-keystone/ddr3_spd.c b/arch/arm/mach-keystone/ddr3_spd.c
index 6f7f8ab..d4ff442 100644
--- a/arch/arm/mach-keystone/ddr3_spd.c
+++ b/arch/arm/mach-keystone/ddr3_spd.c
@@ -5,8 +5,8 @@
* (C) Copyright 2015-2016 Texas Instruments Incorporated, <www.ti.com>
*/
-#include <common.h>
#include <log.h>
+#include <string.h>
#include <i2c.h>
#include <ddr_spd.h>
diff --git a/arch/arm/mach-keystone/init.c b/arch/arm/mach-keystone/init.c
index 1954e69..39afaaa 100644
--- a/arch/arm/mach-keystone/init.c
+++ b/arch/arm/mach-keystone/init.c
@@ -6,7 +6,6 @@
* Texas Instruments Incorporated, <www.ti.com>
*/
-#include <common.h>
#include <cpu_func.h>
#include <init.h>
#include <ns16550.h>
diff --git a/arch/arm/mach-keystone/keystone.c b/arch/arm/mach-keystone/keystone.c
index efaabca..8846df3 100644
--- a/arch/arm/mach-keystone/keystone.c
+++ b/arch/arm/mach-keystone/keystone.c
@@ -6,7 +6,6 @@
* Texas Instruments Incorporated, <www.ti.com>
*/
-#include <common.h>
#include <env.h>
#include <init.h>
#include <asm/io.h>
diff --git a/arch/arm/mach-keystone/mon.c b/arch/arm/mach-keystone/mon.c
index e91b0d6..b945e19 100644
--- a/arch/arm/mach-keystone/mon.c
+++ b/arch/arm/mach-keystone/mon.c
@@ -8,7 +8,6 @@
#include <hang.h>
#include <image.h>
#include <asm/unaligned.h>
-#include <common.h>
#include <command.h>
#include <mach/mon.h>
#include <spl.h>
diff --git a/arch/arm/mach-keystone/msmc.c b/arch/arm/mach-keystone/msmc.c
index f5cadfb..a20e0c9 100644
--- a/arch/arm/mach-keystone/msmc.c
+++ b/arch/arm/mach-keystone/msmc.c
@@ -6,7 +6,6 @@
* Texas Instruments Incorporated, <www.ti.com>
*/
-#include <common.h>
#include <asm/arch/msmc.h>
struct mpax {
diff --git a/arch/arm/mach-keystone/psc.c b/arch/arm/mach-keystone/psc.c
index 145aff8..84d64f3 100644
--- a/arch/arm/mach-keystone/psc.c
+++ b/arch/arm/mach-keystone/psc.c
@@ -6,7 +6,6 @@
* Texas Instruments Incorporated, <www.ti.com>
*/
-#include <common.h>
#include <linux/delay.h>
#include <linux/errno.h>
#include <asm/io.h>
diff --git a/arch/arm/mach-mediatek/Kconfig b/arch/arm/mach-mediatek/Kconfig
index 8971e2d..c3872f4 100644
--- a/arch/arm/mach-mediatek/Kconfig
+++ b/arch/arm/mach-mediatek/Kconfig
@@ -76,6 +76,14 @@
SD and MMC cards, UFS, PWM, I2C, I2S, S/PDIF, and several LPDDR3
and LPDDR4 options.
+config TARGET_MT8365
+ bool "MediaTek MT8365 SoC"
+ select ARM64
+ help
+ The MediaTek MT8365 is a ARM64-based SoC with a quad-core Cortex-A53.
+ It is including UART, SPI, USB2.0 dual role, SD and MMC cards, NAND, PWM,
+ I2C, I2S, S/PDIF, and several LPDDR3 and LPDDR4 options.
+
config TARGET_MT8512
bool "MediaTek MT8512 M1 Board"
select ARM64
@@ -133,6 +141,7 @@
default "mt7986" if TARGET_MT7986
default "mt7988" if TARGET_MT7988
default "mt8183" if TARGET_MT8183
+ default "mt8365" if TARGET_MT8365
default "mt8512" if TARGET_MT8512
default "mt8516" if TARGET_MT8516
default "mt8518" if TARGET_MT8518
diff --git a/arch/arm/mach-mediatek/Makefile b/arch/arm/mach-mediatek/Makefile
index 71aa341..46bdab8 100644
--- a/arch/arm/mach-mediatek/Makefile
+++ b/arch/arm/mach-mediatek/Makefile
@@ -11,5 +11,6 @@
obj-$(CONFIG_TARGET_MT7986) += mt7986/
obj-$(CONFIG_TARGET_MT7988) += mt7988/
obj-$(CONFIG_TARGET_MT8183) += mt8183/
+obj-$(CONFIG_TARGET_MT8365) += mt8365/
obj-$(CONFIG_TARGET_MT8516) += mt8516/
obj-$(CONFIG_TARGET_MT8518) += mt8518/
diff --git a/arch/arm/mach-mediatek/mt8365/Makefile b/arch/arm/mach-mediatek/mt8365/Makefile
new file mode 100644
index 0000000..886ab7e
--- /dev/null
+++ b/arch/arm/mach-mediatek/mt8365/Makefile
@@ -0,0 +1,3 @@
+# SPDX-License-Identifier: GPL-2.0
+
+obj-y += init.o
diff --git a/arch/arm/mach-mediatek/mt8365/init.c b/arch/arm/mach-mediatek/mt8365/init.c
new file mode 100644
index 0000000..8f03ed2
--- /dev/null
+++ b/arch/arm/mach-mediatek/mt8365/init.c
@@ -0,0 +1,51 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2023 MediaTek Inc.
+ * Copyright (C) 2023 BayLibre, SAS
+ * Author: Julien Masson <jmasson@baylibre.com>
+ * Author: Fabien Parent <fparent@baylibre.com>
+ */
+
+#include <asm/global_data.h>
+#include <asm/system.h>
+#include <dm/uclass.h>
+#include <wdt.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int dram_init(void)
+{
+ return fdtdec_setup_mem_size_base();
+}
+
+int dram_init_banksize(void)
+{
+ gd->bd->bi_dram[0].start = gd->ram_base;
+ gd->bd->bi_dram[0].size = gd->ram_size;
+
+ return 0;
+}
+
+int mtk_soc_early_init(void)
+{
+ return 0;
+}
+
+void reset_cpu(void)
+{
+ struct udevice *wdt;
+
+ if (IS_ENABLED(CONFIG_PSCI_RESET)) {
+ psci_system_reset();
+ } else {
+ uclass_first_device(UCLASS_WDT, &wdt);
+ if (wdt)
+ wdt_expire_now(wdt, 0);
+ }
+}
+
+int print_cpuinfo(void)
+{
+ printf("CPU: MediaTek MT8365\n");
+ return 0;
+}
diff --git a/arch/arm/mach-meson/board-info.c b/arch/arm/mach-meson/board-info.c
index 2421acd..95a29da 100644
--- a/arch/arm/mach-meson/board-info.c
+++ b/arch/arm/mach-meson/board-info.c
@@ -168,7 +168,7 @@
return socinfo;
}
-int show_board_info(void)
+int checkboard(void)
{
unsigned int socinfo;
diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig
index c80d858..2058c95 100644
--- a/arch/arm/mach-mvebu/Kconfig
+++ b/arch/arm/mach-mvebu/Kconfig
@@ -15,6 +15,7 @@
select SUPPORT_SPL
select SYS_L2_PL310 if !SYS_L2CACHE_OFF
select TRANSLATION_OFFSET
+ select TOOLS_KWBIMAGE if SPL
select SPL_SYS_NO_VECTOR_TABLE if SPL
select ARCH_VERY_EARLY_INIT
diff --git a/arch/arm/mach-mvebu/alleycat5/cpu.c b/arch/arm/mach-mvebu/alleycat5/cpu.c
index 8204d96..0f72ae1 100644
--- a/arch/arm/mach-mvebu/alleycat5/cpu.c
+++ b/arch/arm/mach-mvebu/alleycat5/cpu.c
@@ -16,7 +16,10 @@
DECLARE_GLOBAL_DATA_PTR;
-#define RAM_SIZE SZ_1G
+#define AC5_PTE_BLOCK_DEVICE \
+ (PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | \
+ PTE_BLOCK_NON_SHARE | \
+ PTE_BLOCK_PXN | PTE_BLOCK_UXN)
static struct mm_region ac5_mem_map[] = {
{
@@ -31,30 +34,63 @@
.phys = 0x00000000,
.virt = 0xa0000000,
.size = 0x100000,
-
- .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
- PTE_BLOCK_NON_SHARE |
- PTE_BLOCK_PXN | PTE_BLOCK_UXN
+ .attrs = AC5_PTE_BLOCK_DEVICE,
},
{
/* MMIO regions */
.phys = 0x100000,
.virt = 0x100000,
.size = 0x3ff00000,
-
- .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
- PTE_BLOCK_NON_SHARE |
- PTE_BLOCK_PXN | PTE_BLOCK_UXN
+ .attrs = AC5_PTE_BLOCK_DEVICE,
},
{
- /* MMIO regions */
.phys = 0x7F000000,
.virt = 0x7F000000,
- .size = 0x21000000,
-
- .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
- PTE_BLOCK_NON_SHARE |
- PTE_BLOCK_PXN | PTE_BLOCK_UXN
+ .size = SZ_8M,
+ .attrs = AC5_PTE_BLOCK_DEVICE,
+ },
+ {
+ .phys = 0x7F800000,
+ .virt = 0x7F800000,
+ .size = SZ_4M,
+ .attrs = AC5_PTE_BLOCK_DEVICE,
+ },
+ {
+ .phys = 0x7FC00000,
+ .virt = 0x7FC00000,
+ .size = SZ_512K,
+ .attrs = AC5_PTE_BLOCK_DEVICE,
+ },
+ {
+ .phys = 0x7FC80000,
+ .virt = 0x7FC80000,
+ .size = SZ_512K,
+ .attrs = AC5_PTE_BLOCK_DEVICE,
+ },
+ {
+ .phys = 0x7FD00000,
+ .virt = 0x7FD00000,
+ .size = SZ_512K,
+ .attrs = AC5_PTE_BLOCK_DEVICE,
+ },
+ /* ATF region 0x7FE00000-0x7FE20000 not mapped */
+ {
+ .phys = 0x7FE80000,
+ .virt = 0x7FE80000,
+ .size = SZ_512K,
+ .attrs = AC5_PTE_BLOCK_DEVICE,
+ },
+ {
+ .phys = 0x7FFF0000,
+ .virt = 0x7FFF0000,
+ .size = SZ_1M,
+ .attrs = AC5_PTE_BLOCK_DEVICE,
+ },
+ {
+ .phys = 0x80000000,
+ .virt = 0x80000000,
+ .size = SZ_2G,
+ .attrs = AC5_PTE_BLOCK_DEVICE,
},
{
0,
diff --git a/arch/arm/mach-omap2/am33xx/Kconfig b/arch/arm/mach-omap2/am33xx/Kconfig
index 8cb0c57..46abf07 100644
--- a/arch/arm/mach-omap2/am33xx/Kconfig
+++ b/arch/arm/mach-omap2/am33xx/Kconfig
@@ -105,15 +105,6 @@
select DM_SERIAL
imply CMD_DM
-config TARGET_DRACO
- bool "Support draco"
- select BOARD_LATE_INIT
- select DM
- select DM_GPIO
- select DM_SERIAL
- select FACTORYSET
- imply CMD_DM
-
config TARGET_ETAMIN
bool "Support etamin"
select BOARD_LATE_INIT
@@ -213,6 +204,7 @@
imply DM_I2C
imply DM_SPI
imply DM_SPI_FLASH
+ imply MTD
imply SPL_ENV_SUPPORT
imply SPL_FS_EXT4
imply SPL_FS_FAT
diff --git a/arch/arm/mach-omap2/omap3/Kconfig b/arch/arm/mach-omap2/omap3/Kconfig
index bd524f8..850ee76 100644
--- a/arch/arm/mach-omap2/omap3/Kconfig
+++ b/arch/arm/mach-omap2/omap3/Kconfig
@@ -144,6 +144,7 @@
config SPL_OMAP3_ID_NAND
bool "Support OMAP3-specific ID and MFR function"
+ depends on NAND_OMAP_GPMC
help
Support for an OMAP3-specific set of functions to return the
ID and MFR of the first attached NAND chip, if present.
diff --git a/arch/arm/mach-omap2/omap3/board.c b/arch/arm/mach-omap2/omap3/board.c
index 8b70251..c76a95d 100644
--- a/arch/arm/mach-omap2/omap3/board.c
+++ b/arch/arm/mach-omap2/omap3/board.c
@@ -216,7 +216,7 @@
void board_init_f(ulong dummy)
{
early_system_init();
- mem_init();
+ omap3_mem_init();
/*
* Save the boot parameters passed from romcode.
* We cannot delay the saving further than this,
diff --git a/arch/arm/mach-omap2/omap3/emif4.c b/arch/arm/mach-omap2/omap3/emif4.c
index 7e5a281..4fbfb38 100644
--- a/arch/arm/mach-omap2/omap3/emif4.c
+++ b/arch/arm/mach-omap2/omap3/emif4.c
@@ -159,10 +159,10 @@
}
/*
- * mem_init() -
+ * omap3_mem_init() -
* - Initialize memory subsystem
*/
-void mem_init(void)
+void omap3_mem_init(void)
{
do_emif4_init();
}
diff --git a/arch/arm/mach-omap2/omap3/sdrc.c b/arch/arm/mach-omap2/omap3/sdrc.c
index 5d43e7c..4d27d82 100644
--- a/arch/arm/mach-omap2/omap3/sdrc.c
+++ b/arch/arm/mach-omap2/omap3/sdrc.c
@@ -4,7 +4,7 @@
*
* This file has been created after exctracting and consolidating
* the SDRC related content from mem.c and board.c, also created
- * generic init function (mem_init).
+ * generic init function (omap3_mem_init).
*
* Copyright (C) 2004-2010
* Texas Instruments Incorporated - https://www.ti.com/
@@ -232,11 +232,11 @@
}
/*
- * mem_init -
+ * omap3_mem_init -
* - Init the sdrc chip,
* - Selects CS0 and CS1,
*/
-void mem_init(void)
+void omap3_mem_init(void)
{
/* only init up first bank here */
do_sdrc_init(CS0, EARLY_INIT);
diff --git a/arch/arm/mach-rmobile/cpu_info-rzg2l.c b/arch/arm/mach-rmobile/cpu_info-rzg2l.c
index f69649d..bd3146f 100644
--- a/arch/arm/mach-rmobile/cpu_info-rzg2l.c
+++ b/arch/arm/mach-rmobile/cpu_info-rzg2l.c
@@ -4,6 +4,7 @@
*
*/
+#include <mach/rmobile.h>
#include <asm/io.h>
#include <linux/libfdt.h>
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index b577a91..6ff0aa6 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -125,6 +125,7 @@
select SUPPORT_SPL
select SPL
select SUPPORT_TPL
+ select FDT_64BIT
imply PRE_CONSOLE_BUFFER
imply ROCKCHIP_COMMON_BOARD
imply SPL_ROCKCHIP_COMMON_BOARD
diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 57f08e0..2620530 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -16,7 +16,6 @@
#include <syscon.h>
#include <uuid.h>
#include <asm/cache.h>
-#include <asm/global_data.h>
#include <asm/io.h>
#include <asm/arch-rockchip/boot_mode.h>
#include <asm/arch-rockchip/clock.h>
@@ -24,8 +23,6 @@
#include <asm/arch-rockchip/misc.h>
#include <power/regulator.h>
-DECLARE_GLOBAL_DATA_PTR;
-
#if defined(CONFIG_EFI_HAVE_CAPSULE_SUPPORT) && defined(CONFIG_EFI_PARTITION)
#define DFU_ALT_BUF_LEN SZ_1K
@@ -208,10 +205,8 @@
}
#endif
-#if defined(CONFIG_USB_GADGET)
+#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
#include <usb.h>
-
-#if defined(CONFIG_USB_GADGET_DWC2_OTG)
#include <linux/usb/otg.h>
#include <usb/dwc2_udc.h>
@@ -287,32 +282,6 @@
}
#endif /* CONFIG_USB_GADGET_DWC2_OTG */
-#if defined(CONFIG_USB_DWC3_GADGET) && !defined(CONFIG_DM_USB_GADGET)
-#include <dwc3-uboot.h>
-
-static struct dwc3_device dwc3_device_data = {
- .maximum_speed = USB_SPEED_HIGH,
- .base = 0xfe800000,
- .dr_mode = USB_DR_MODE_PERIPHERAL,
- .index = 0,
- .dis_u2_susphy_quirk = 1,
- .hsphy_mode = USBPHY_INTERFACE_MODE_UTMIW,
-};
-
-int dm_usb_gadget_handle_interrupts(struct udevice *dev)
-{
- dwc3_uboot_handle_interrupt(dev);
- return 0;
-}
-
-int board_usb_init(int index, enum usb_init_type init)
-{
- return dwc3_uboot_init(&dwc3_device_data);
-}
-#endif /* CONFIG_USB_DWC3_GADGET */
-
-#endif /* CONFIG_USB_GADGET */
-
#if IS_ENABLED(CONFIG_FASTBOOT)
int fastboot_set_reboot_flag(enum fastboot_reboot_reason reason)
{
@@ -348,3 +317,35 @@
return ret;
}
#endif
+
+#if IS_ENABLED(CONFIG_BOARD_RNG_SEED) && IS_ENABLED(CONFIG_RNG_ROCKCHIP)
+#include <rng.h>
+
+/* Use hardware rng to seed Linux random. */
+__weak int board_rng_seed(struct abuf *buf)
+{
+ struct udevice *dev;
+ size_t len = 0x8;
+ u64 *data;
+
+ data = malloc(len);
+ if (!data) {
+ printf("Out of memory\n");
+ return -ENOMEM;
+ }
+
+ if (uclass_get_device(UCLASS_RNG, 0, &dev) || !dev) {
+ printf("No RNG device\n");
+ return -ENODEV;
+ }
+
+ if (dm_rng_read(dev, data, len)) {
+ printf("Reading RNG failed\n");
+ return -EIO;
+ }
+
+ abuf_init_set(buf, data, len);
+
+ return 0;
+}
+#endif
diff --git a/arch/arm/mach-rockchip/px30/px30.c b/arch/arm/mach-rockchip/px30/px30.c
index 3bca25c..fc7456e 100644
--- a/arch/arm/mach-rockchip/px30/px30.c
+++ b/arch/arm/mach-rockchip/px30/px30.c
@@ -443,52 +443,3 @@
#endif /* CONFIG_DEBUG_UART_BASE && CONFIG_DEBUG_UART_BASE == ... */
}
#endif /* CONFIG_DEBUG_UART_BOARD_INIT */
-
-#if defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD)
-const char *spl_decode_boot_device(u32 boot_device)
-{
- int i;
- static const struct {
- u32 boot_device;
- const char *ofpath;
- } spl_boot_devices_tbl[] = {
- { BOOT_DEVICE_MMC2, "/mmc@ff370000" },
- { BOOT_DEVICE_MMC1, "/mmc@ff390000" },
- };
-
- for (i = 0; i < ARRAY_SIZE(spl_boot_devices_tbl); ++i)
- if (spl_boot_devices_tbl[i].boot_device == boot_device)
- return spl_boot_devices_tbl[i].ofpath;
-
- return NULL;
-}
-
-void spl_perform_fixups(struct spl_image_info *spl_image)
-{
- void *blob = spl_image->fdt_addr;
- const char *boot_ofpath;
- int chosen;
-
- /*
- * Inject the ofpath of the device the full U-Boot (or Linux in
- * Falcon-mode) was booted from into the FDT, if a FDT has been
- * loaded at the same time.
- */
- if (!blob)
- return;
-
- boot_ofpath = spl_decode_boot_device(spl_image->boot_device);
- if (!boot_ofpath) {
- pr_err("%s: could not map boot_device to ofpath\n", __func__);
- return;
- }
-
- chosen = fdt_find_or_add_subnode(blob, 0, "chosen");
- if (chosen < 0) {
- pr_err("%s: could not find/create '/chosen'\n", __func__);
- return;
- }
- fdt_setprop_string(blob, chosen,
- "u-boot,spl-boot-device", boot_ofpath);
-}
-#endif
diff --git a/arch/arm/mach-rockchip/rk3128/Makefile b/arch/arm/mach-rockchip/rk3128/Makefile
index 50e1117..8df1a60 100644
--- a/arch/arm/mach-rockchip/rk3128/Makefile
+++ b/arch/arm/mach-rockchip/rk3128/Makefile
@@ -4,6 +4,5 @@
# SPDX-License-Identifier: GPL-2.0+
#
-obj-y += rk3128.o
obj-y += syscon_rk3128.o
obj-y += clk_rk3128.o
diff --git a/arch/arm/mach-rockchip/rk3128/rk3128.c b/arch/arm/mach-rockchip/rk3128/rk3128.c
deleted file mode 100644
index 01dbfa7..0000000
--- a/arch/arm/mach-rockchip/rk3128/rk3128.c
+++ /dev/null
@@ -1,16 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (c) 2017 Rockchip Electronics Co., Ltd
- */
-#include <common.h>
-#include <init.h>
-#include <asm/global_data.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-int arch_cpu_init(void)
-{
- /* We do some SoC one time setting here. */
-
- return 0;
-}
diff --git a/arch/arm/mach-rockchip/rk3308/rk3308.c b/arch/arm/mach-rockchip/rk3308/rk3308.c
index 5763604..6f121bf 100644
--- a/arch/arm/mach-rockchip/rk3308/rk3308.c
+++ b/arch/arm/mach-rockchip/rk3308/rk3308.c
@@ -5,7 +5,6 @@
#include <common.h>
#include <init.h>
#include <malloc.h>
-#include <asm/global_data.h>
#include <asm/io.h>
#include <asm/arch/grf_rk3308.h>
#include <asm/arch-rockchip/bootrom.h>
@@ -14,8 +13,6 @@
#include <debug_uart.h>
#include <linux/bitops.h>
-DECLARE_GLOBAL_DATA_PTR;
-
#include <asm/armv8/mmu.h>
static struct mm_region rk3308_mem_map[] = {
{
diff --git a/arch/arm/mach-rockchip/rk3328/rk3328.c b/arch/arm/mach-rockchip/rk3328/rk3328.c
index de17b88..b591d38 100644
--- a/arch/arm/mach-rockchip/rk3328/rk3328.c
+++ b/arch/arm/mach-rockchip/rk3328/rk3328.c
@@ -10,15 +10,29 @@
#include <asm/arch-rockchip/grf_rk3328.h>
#include <asm/arch-rockchip/uart.h>
#include <asm/armv8/mmu.h>
-#include <asm/global_data.h>
#include <asm/io.h>
-DECLARE_GLOBAL_DATA_PTR;
-
#define CRU_BASE 0xFF440000
#define GRF_BASE 0xFF100000
#define UART2_BASE 0xFF130000
#define FW_DDR_CON_REG 0xFF7C0040
+#define EFUSE_NS_BASE 0xFF260000
+
+#define EFUSE_MOD 0x0000
+#define EFUSE_INT_CON 0x0014
+#define EFUSE_T_CSB_P 0x0028
+#define EFUSE_T_PGENB_P 0x002C
+#define EFUSE_T_LOAD_P 0x0030
+#define EFUSE_T_ADDR_P 0x0034
+#define EFUSE_T_STROBE_P 0x0038
+#define EFUSE_T_CSB_R 0x003C
+#define EFUSE_T_PGENB_R 0x0040
+#define EFUSE_T_LOAD_R 0x0044
+#define EFUSE_T_ADDR_R 0x0048
+#define EFUSE_T_STROBE_R 0x004C
+
+#define EFUSE_USER_MODE 0x1
+#define EFUSE_TIMING(s, l) (((s) << 16) | (l))
const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
[BROM_BOOTSOURCE_EMMC] = "/mmc@ff520000",
@@ -50,10 +64,31 @@
int arch_cpu_init(void)
{
#ifdef CONFIG_SPL_BUILD
+ u32 reg;
+
/* We do some SoC one time setting here. */
/* Disable the ddr secure region setting to make it non-secure */
rk_setreg(FW_DDR_CON_REG, 0x200);
+
+ /* Use efuse auto mode */
+ reg = readl(EFUSE_NS_BASE + EFUSE_MOD);
+ writel(reg & ~EFUSE_USER_MODE, EFUSE_NS_BASE + EFUSE_MOD);
+
+ /* Enable efuse finish and auto access err interrupt */
+ writel(0x07, EFUSE_NS_BASE + EFUSE_INT_CON);
+
+ /* Set efuse timing control */
+ writel(EFUSE_TIMING(1, 241), EFUSE_NS_BASE + EFUSE_T_CSB_P);
+ writel(EFUSE_TIMING(1, 241), EFUSE_NS_BASE + EFUSE_T_PGENB_P);
+ writel(EFUSE_TIMING(1, 241), EFUSE_NS_BASE + EFUSE_T_LOAD_P);
+ writel(EFUSE_TIMING(1, 241), EFUSE_NS_BASE + EFUSE_T_ADDR_P);
+ writel(EFUSE_TIMING(2, 240), EFUSE_NS_BASE + EFUSE_T_STROBE_P);
+ writel(EFUSE_TIMING(1, 4), EFUSE_NS_BASE + EFUSE_T_CSB_R);
+ writel(EFUSE_TIMING(1, 4), EFUSE_NS_BASE + EFUSE_T_PGENB_R);
+ writel(EFUSE_TIMING(1, 4), EFUSE_NS_BASE + EFUSE_T_LOAD_R);
+ writel(EFUSE_TIMING(1, 4), EFUSE_NS_BASE + EFUSE_T_ADDR_R);
+ writel(EFUSE_TIMING(2, 3), EFUSE_NS_BASE + EFUSE_T_STROBE_R);
#endif
return 0;
}
diff --git a/arch/arm/mach-rockchip/rk3368/rk3368.c b/arch/arm/mach-rockchip/rk3368/rk3368.c
index d0a6107..d009b87 100644
--- a/arch/arm/mach-rockchip/rk3368/rk3368.c
+++ b/arch/arm/mach-rockchip/rk3368/rk3368.c
@@ -8,7 +8,6 @@
#include <init.h>
#include <syscon.h>
#include <asm/armv8/mmu.h>
-#include <asm/global_data.h>
#include <asm/io.h>
#include <asm/arch-rockchip/bootrom.h>
#include <asm/arch-rockchip/clock.h>
@@ -18,8 +17,6 @@
#include <linux/bitops.h>
#include <linux/delay.h>
-DECLARE_GLOBAL_DATA_PTR;
-
#define IMEM_BASE 0xFF8C0000
/* Max MCU's SRAM value is 8K, begin at (IMEM_BASE + 4K) */
diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c b/arch/arm/mach-rockchip/rk3399/rk3399.c
index 14565d2..a1aa0e3 100644
--- a/arch/arm/mach-rockchip/rk3399/rk3399.c
+++ b/arch/arm/mach-rockchip/rk3399/rk3399.c
@@ -11,7 +11,6 @@
#include <spl_gpio.h>
#include <syscon.h>
#include <asm/armv8/mmu.h>
-#include <asm/global_data.h>
#include <asm/io.h>
#include <asm/arch-rockchip/bootrom.h>
#include <asm/arch-rockchip/clock.h>
@@ -23,8 +22,6 @@
#include <linux/printk.h>
#include <power/regulator.h>
-DECLARE_GLOBAL_DATA_PTR;
-
#define GRF_EMMCCORE_CON11 0xff77f02c
#define GRF_BASE 0xff770000
@@ -175,54 +172,6 @@
#endif
#if defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD)
-const char *spl_decode_boot_device(u32 boot_device)
-{
- int i;
- static const struct {
- u32 boot_device;
- const char *ofpath;
- } spl_boot_devices_tbl[] = {
- { BOOT_DEVICE_MMC2, "/mmc@fe320000" },
- { BOOT_DEVICE_MMC1, "/mmc@fe330000" },
- { BOOT_DEVICE_SPI, "/spi@ff1d0000/flash@0" },
- };
-
- for (i = 0; i < ARRAY_SIZE(spl_boot_devices_tbl); ++i)
- if (spl_boot_devices_tbl[i].boot_device == boot_device)
- return spl_boot_devices_tbl[i].ofpath;
-
- return NULL;
-}
-
-void spl_perform_fixups(struct spl_image_info *spl_image)
-{
- void *blob = spl_image->fdt_addr;
- const char *boot_ofpath;
- int chosen;
-
- /*
- * Inject the ofpath of the device the full U-Boot (or Linux in
- * Falcon-mode) was booted from into the FDT, if a FDT has been
- * loaded at the same time.
- */
- if (!blob)
- return;
-
- boot_ofpath = spl_decode_boot_device(spl_image->boot_device);
- if (!boot_ofpath) {
- pr_err("%s: could not map boot_device to ofpath\n", __func__);
- return;
- }
-
- chosen = fdt_find_or_add_subnode(blob, 0, "chosen");
- if (chosen < 0) {
- pr_err("%s: could not find/create '/chosen'\n", __func__);
- return;
- }
- fdt_setprop_string(blob, chosen,
- "u-boot,spl-boot-device", boot_ofpath);
-}
-
static void rk3399_force_power_on_reset(void)
{
ofnode node;
diff --git a/arch/arm/mach-rockchip/rk3588/Kconfig b/arch/arm/mach-rockchip/rk3588/Kconfig
index e5282dd..a2193fb 100644
--- a/arch/arm/mach-rockchip/rk3588/Kconfig
+++ b/arch/arm/mach-rockchip/rk3588/Kconfig
@@ -132,6 +132,29 @@
Pine64 QuartzPro64 is a Rockchip RK3588 based SBC (Single Board
Computer) by Pine64.
+config TARGET_TURINGRK1_RK3588
+ bool "Turing Machines RK1 RK3588 board"
+ select BOARD_LATE_INIT
+ help
+ The Turing RK1 is a Rockchip RK3588 based SoM from Turing Machines.
+
+ There are three variants depending on the DRAM size : 8G, 16G and 32G.
+
+ Specifications:
+
+ Rockchip RK3588 SoC
+ 4x ARM Cortex-A76, 4x ARM Cortex-A55
+ 8/16/32GB memory LPDDR4x
+ Mali G610MC4 GPU
+ 32GB eMMC HS400
+ 2x USB 2.0, 2x USB 3.0
+ 2x MIPI CSI 4x lanes
+ 1x MIPI-DSI DPHY 2x lanes
+ PCIe 2.0 x1, PCIe 3.0 x4
+ 1x HDMI 2.1 output, 1x DP 1.4 output
+ Gigabit Ethernet
+ Size: 69.6mm x 45mm (260-pin SO-DIMM connector)
+
config ROCKCHIP_BOOT_MODE_REG
default 0xfd588080
@@ -147,6 +170,7 @@
source board/edgeble/neural-compute-module-6/Kconfig
source board/friendlyelec/nanopc-t6-rk3588/Kconfig
source board/pine64/quartzpro64-rk3588/Kconfig
+source board/turing/turing-rk1-rk3588/Kconfig
source board/rockchip/evb_rk3588/Kconfig
source board/radxa/rock5a-rk3588s/Kconfig
source board/radxa/rock5b-rk3588/Kconfig
diff --git a/arch/arm/mach-rockchip/rk3588/rk3588.c b/arch/arm/mach-rockchip/rk3588/rk3588.c
index b1f535f..38e95a6 100644
--- a/arch/arm/mach-rockchip/rk3588/rk3588.c
+++ b/arch/arm/mach-rockchip/rk3588/rk3588.c
@@ -12,8 +12,6 @@
#include <asm/arch-rockchip/hardware.h>
#include <asm/arch-rockchip/ioc_rk3588.h>
-DECLARE_GLOBAL_DATA_PTR;
-
#define FIREWALL_DDR_BASE 0xfe030000
#define FW_DDR_MST5_REG 0x54
#define FW_DDR_MST13_REG 0x74
@@ -37,11 +35,23 @@
#define BUS_IOC_GPIO2D_IOMUX_SEL_H 0x5c
#define BUS_IOC_GPIO3A_IOMUX_SEL_L 0x60
+/**
+ * Boot-device identifiers used by the BROM on RK3588 when device is booted
+ * from SPI flash. IOMUX used for SPI flash affect the value used by the BROM
+ * and not the type of SPI flash used.
+ */
+enum {
+ BROM_BOOTSOURCE_FSPI_M0 = 3,
+ BROM_BOOTSOURCE_FSPI_M1 = 4,
+ BROM_BOOTSOURCE_FSPI_M2 = 6,
+};
+
const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
[BROM_BOOTSOURCE_EMMC] = "/mmc@fe2e0000",
- [BROM_BOOTSOURCE_SPINOR] = "/spi@fe2b0000/flash@0",
+ [BROM_BOOTSOURCE_FSPI_M0] = "/spi@fe2b0000/flash@0",
+ [BROM_BOOTSOURCE_FSPI_M1] = "/spi@fe2b0000/flash@0",
+ [BROM_BOOTSOURCE_FSPI_M2] = "/spi@fe2b0000/flash@0",
[BROM_BOOTSOURCE_SD] = "/mmc@fe2c0000",
- [BROM_BOOTSOURCE_SPINOR_RK3588] = "/spi@fe2b0000/flash@0",
};
static struct mm_region rk3588_mem_map[] = {
diff --git a/arch/arm/mach-rockchip/spl-boot-order.c b/arch/arm/mach-rockchip/spl-boot-order.c
index 93b8e7d..2c39a21 100644
--- a/arch/arm/mach-rockchip/spl-boot-order.c
+++ b/arch/arm/mach-rockchip/spl-boot-order.c
@@ -5,10 +5,12 @@
#include <common.h>
#include <dm.h>
+#include <fdt_support.h>
#include <log.h>
#include <mmc.h>
#include <spl.h>
#include <asm/global_data.h>
+#include <dm/uclass-internal.h>
#if CONFIG_IS_ENABLED(OF_LIBFDT)
/**
@@ -161,4 +163,113 @@
if (idx == 0)
spl_boot_list[0] = spl_boot_device();
}
+
+int spl_decode_boot_device(u32 boot_device, char *buf, size_t buflen)
+{
+ struct udevice *dev;
+#if CONFIG_IS_ENABLED(BLK)
+ int dev_num;
+#endif
+ int ret;
+
+ if (boot_device == BOOT_DEVICE_SPI) {
+ /* Revert spl_node_to_boot_device() logic to find appropriate SPI flash device */
+
+ /*
+ * Devices with multiple SPI flash devices will take the first SPI flash found in
+ * /chosen/u-boot,spl-boot-order.
+ */
+ const void *blob = gd->fdt_blob;
+ int chosen_node = fdt_path_offset(blob, "/chosen");
+ int elem;
+ int node;
+ const char *conf;
+
+ if (chosen_node < 0) {
+ debug("%s: /chosen not found\n", __func__);
+ return -ENODEV;
+ }
+
+ for (elem = 0;
+ (conf = fdt_stringlist_get(blob, chosen_node,
+ "u-boot,spl-boot-order", elem, NULL));
+ elem++) {
+ const char *alias;
+
+ /* Handle the case of 'same device the SPL was loaded from' */
+ if (strncmp(conf, "same-as-spl", 11) == 0) {
+ conf = board_spl_was_booted_from();
+ if (!conf)
+ continue;
+ }
+
+ /* First check if the list element is an alias */
+ alias = fdt_get_alias(blob, conf);
+ if (alias)
+ conf = alias;
+
+ /* Try to resolve the config item (or alias) as a path */
+ node = fdt_path_offset(blob, conf);
+ if (node < 0) {
+ debug("%s: could not find %s in FDT\n", __func__, conf);
+ continue;
+ }
+
+ ret = uclass_find_device_by_of_offset(UCLASS_SPI_FLASH, node, &dev);
+ if (ret) {
+ debug("%s: could not find udevice for %s\n", __func__, conf);
+ continue;
+ }
+
+ return ofnode_get_path(dev_ofnode(dev), buf, buflen);
+ }
+
+ return -ENODEV;
+ }
+
+#if CONFIG_IS_ENABLED(BLK)
+ dev_num = (boot_device == BOOT_DEVICE_MMC1) ? 0 : 1;
+
+ ret = blk_find_device(UCLASS_MMC, dev_num, &dev);
+ if (ret) {
+ debug("%s: could not find blk device for MMC device %d: %d\n",
+ __func__, dev_num, ret);
+ return ret;
+ }
+
+ dev = dev_get_parent(dev);
+ return ofnode_get_path(dev_ofnode(dev), buf, buflen);
+#else
+ return -ENODEV;
+#endif
+}
+
+void spl_perform_fixups(struct spl_image_info *spl_image)
+{
+ void *blob = spl_image_fdt_addr(spl_image);
+ char boot_ofpath[512];
+ int chosen, ret;
+
+ /*
+ * Inject the ofpath of the device the full U-Boot (or Linux in
+ * Falcon-mode) was booted from into the FDT, if a FDT has been
+ * loaded at the same time.
+ */
+ if (!blob)
+ return;
+
+ ret = spl_decode_boot_device(spl_image->boot_device, boot_ofpath, sizeof(boot_ofpath));
+ if (ret) {
+ pr_err("%s: could not map boot_device to ofpath: %d\n", __func__, ret);
+ return;
+ }
+
+ chosen = fdt_find_or_add_subnode(blob, 0, "chosen");
+ if (chosen < 0) {
+ pr_err("%s: could not find/create '/chosen'\n", __func__);
+ return;
+ }
+ fdt_setprop_string(blob, chosen,
+ "u-boot,spl-boot-device", boot_ofpath);
+}
#endif
diff --git a/arch/arm/mach-rockchip/tpl.c b/arch/arm/mach-rockchip/tpl.c
index fdd0c59..2c3e978 100644
--- a/arch/arm/mach-rockchip/tpl.c
+++ b/arch/arm/mach-rockchip/tpl.c
@@ -16,7 +16,6 @@
#include <asm/io.h>
#include <asm/arch-rockchip/bootrom.h>
#include <linux/bitops.h>
-#include <linux/kconfig.h>
#if CONFIG_IS_ENABLED(BANNER_PRINT)
#include <timestamp.h>
diff --git a/arch/arm/mach-snapdragon/Kconfig b/arch/arm/mach-snapdragon/Kconfig
index 2fc1521..ad66710 100644
--- a/arch/arm/mach-snapdragon/Kconfig
+++ b/arch/arm/mach-snapdragon/Kconfig
@@ -15,6 +15,9 @@
config SDM845
bool "Qualcomm Snapdragon 845 SoC"
select LINUX_KERNEL_IMAGE_HEADER
+ imply CLK_QCOM_SDM845
+ imply PINCTRL_QCOM_SDM845
+ imply BUTTON_QCOM_PMIC
config LNX_KRNL_IMG_TEXT_OFFSET_BASE
default 0x80000000
@@ -26,6 +29,9 @@
bool "96Boards Dragonboard 410C"
select BOARD_LATE_INIT
select ENABLE_ARM_SOC_BOOT0_HOOK
+ imply CLK_QCOM_APQ8016
+ imply PINCTRL_QCOM_APQ8016
+ imply BUTTON_QCOM_PMIC
help
Support for 96Boards Dragonboard 410C. This board complies with
96Board Open Platform Specifications. Features:
@@ -39,6 +45,9 @@
config TARGET_DRAGONBOARD820C
bool "96Boards Dragonboard 820C"
+ imply CLK_QCOM_APQ8096
+ imply PINCTRL_QCOM_APQ8096
+ imply BUTTON_QCOM_PMIC
help
Support for 96Boards Dragonboard 820C. This board complies with
96Board Open Platform Specifications. Features:
@@ -72,6 +81,8 @@
config TARGET_QCS404EVB
bool "Qualcomm Technologies, Inc. QCS404 EVB"
select LINUX_KERNEL_IMAGE_HEADER
+ imply CLK_QCOM_QCS404
+ imply PINCTRL_QCOM_QCS404
help
Support for Qualcomm Technologies, Inc. QCS404 evaluation board.
Features:
diff --git a/arch/arm/mach-snapdragon/Makefile b/arch/arm/mach-snapdragon/Makefile
index cbaaf23..3a3a297 100644
--- a/arch/arm/mach-snapdragon/Makefile
+++ b/arch/arm/mach-snapdragon/Makefile
@@ -2,20 +2,10 @@
#
# (C) Copyright 2015 Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
-obj-$(CONFIG_SDM845) += clock-sdm845.o
obj-$(CONFIG_SDM845) += sysmap-sdm845.o
obj-$(CONFIG_SDM845) += init_sdm845.o
-obj-$(CONFIG_TARGET_DRAGONBOARD820C) += clock-apq8096.o
obj-$(CONFIG_TARGET_DRAGONBOARD820C) += sysmap-apq8096.o
-obj-$(CONFIG_TARGET_DRAGONBOARD410C) += clock-apq8016.o
obj-$(CONFIG_TARGET_DRAGONBOARD410C) += sysmap-apq8016.o
obj-y += misc.o
-obj-y += clock-snapdragon.o
obj-y += dram.o
-obj-y += pinctrl-snapdragon.o
-obj-y += pinctrl-apq8016.o
-obj-y += pinctrl-apq8096.o
-obj-y += pinctrl-qcs404.o
-obj-y += pinctrl-sdm845.o
-obj-$(CONFIG_TARGET_QCS404EVB) += clock-qcs404.o
obj-$(CONFIG_TARGET_QCS404EVB) += sysmap-qcs404.o
diff --git a/arch/arm/mach-snapdragon/clock-qcs404.c b/arch/arm/mach-snapdragon/clock-qcs404.c
deleted file mode 100644
index 3357b54..0000000
--- a/arch/arm/mach-snapdragon/clock-qcs404.c
+++ /dev/null
@@ -1,237 +0,0 @@
-// SPDX-License-Identifier: BSD-3-Clause
-/*
- * Clock drivers for Qualcomm QCS404
- *
- * (C) Copyright 2022 Sumit Garg <sumit.garg@linaro.org>
- */
-
-#include <common.h>
-#include <clk-uclass.h>
-#include <dm.h>
-#include <errno.h>
-#include <asm/io.h>
-#include <linux/bitops.h>
-#include "clock-snapdragon.h"
-
-#include <dt-bindings/clock/qcom,gcc-qcs404.h>
-
-/* GPLL0 clock control registers */
-#define GPLL0_STATUS_ACTIVE BIT(31)
-
-#define CFG_CLK_SRC_GPLL1 BIT(8)
-#define GPLL1_STATUS_ACTIVE BIT(31)
-
-static struct vote_clk gcc_blsp1_ahb_clk = {
- .cbcr_reg = BLSP1_AHB_CBCR,
- .ena_vote = APCS_CLOCK_BRANCH_ENA_VOTE,
- .vote_bit = BIT(10) | BIT(5) | BIT(4),
-};
-
-static const struct bcr_regs uart2_regs = {
- .cfg_rcgr = BLSP1_UART2_APPS_CFG_RCGR,
- .cmd_rcgr = BLSP1_UART2_APPS_CMD_RCGR,
- .M = BLSP1_UART2_APPS_M,
- .N = BLSP1_UART2_APPS_N,
- .D = BLSP1_UART2_APPS_D,
-};
-
-static const struct bcr_regs sdc_regs = {
- .cfg_rcgr = SDCC_CFG_RCGR(1),
- .cmd_rcgr = SDCC_CMD_RCGR(1),
- .M = SDCC_M(1),
- .N = SDCC_N(1),
- .D = SDCC_D(1),
-};
-
-static struct pll_vote_clk gpll0_vote_clk = {
- .status = GPLL0_STATUS,
- .status_bit = GPLL0_STATUS_ACTIVE,
- .ena_vote = APCS_GPLL_ENA_VOTE,
- .vote_bit = BIT(0),
-};
-
-static struct pll_vote_clk gpll1_vote_clk = {
- .status = GPLL1_STATUS,
- .status_bit = GPLL1_STATUS_ACTIVE,
- .ena_vote = APCS_GPLL_ENA_VOTE,
- .vote_bit = BIT(1),
-};
-
-static const struct bcr_regs usb30_master_regs = {
- .cfg_rcgr = USB30_MASTER_CFG_RCGR,
- .cmd_rcgr = USB30_MASTER_CMD_RCGR,
- .M = USB30_MASTER_M,
- .N = USB30_MASTER_N,
- .D = USB30_MASTER_D,
-};
-
-static const struct bcr_regs emac_regs = {
- .cfg_rcgr = EMAC_CFG_RCGR,
- .cmd_rcgr = EMAC_CMD_RCGR,
- .M = EMAC_M,
- .N = EMAC_N,
- .D = EMAC_D,
-};
-
-static const struct bcr_regs emac_ptp_regs = {
- .cfg_rcgr = EMAC_PTP_CFG_RCGR,
- .cmd_rcgr = EMAC_PTP_CMD_RCGR,
- .M = EMAC_M,
- .N = EMAC_N,
- .D = EMAC_D,
-};
-
-static const struct bcr_regs blsp1_qup0_i2c_apps_regs = {
- .cmd_rcgr = BLSP1_QUP0_I2C_APPS_CMD_RCGR,
- .cfg_rcgr = BLSP1_QUP0_I2C_APPS_CFG_RCGR,
- /* mnd_width = 0 */
-};
-
-static const struct bcr_regs blsp1_qup1_i2c_apps_regs = {
- .cmd_rcgr = BLSP1_QUP1_I2C_APPS_CMD_RCGR,
- .cfg_rcgr = BLSP1_QUP1_I2C_APPS_CFG_RCGR,
- /* mnd_width = 0 */
-};
-
-static const struct bcr_regs blsp1_qup2_i2c_apps_regs = {
- .cmd_rcgr = BLSP1_QUP2_I2C_APPS_CMD_RCGR,
- .cfg_rcgr = BLSP1_QUP2_I2C_APPS_CFG_RCGR,
- /* mnd_width = 0 */
-};
-
-static const struct bcr_regs blsp1_qup3_i2c_apps_regs = {
- .cmd_rcgr = BLSP1_QUP3_I2C_APPS_CMD_RCGR,
- .cfg_rcgr = BLSP1_QUP3_I2C_APPS_CFG_RCGR,
- /* mnd_width = 0 */
-};
-
-static const struct bcr_regs blsp1_qup4_i2c_apps_regs = {
- .cmd_rcgr = BLSP1_QUP4_I2C_APPS_CMD_RCGR,
- .cfg_rcgr = BLSP1_QUP4_I2C_APPS_CFG_RCGR,
- /* mnd_width = 0 */
-};
-
-ulong msm_set_rate(struct clk *clk, ulong rate)
-{
- struct msm_clk_priv *priv = dev_get_priv(clk->dev);
-
- switch (clk->id) {
- case GCC_BLSP1_UART2_APPS_CLK:
- /* UART: 115200 */
- clk_rcg_set_rate_mnd(priv->base, &uart2_regs, 0, 12, 125,
- CFG_CLK_SRC_CXO);
- clk_enable_cbc(priv->base + BLSP1_UART2_APPS_CBCR);
- break;
- case GCC_BLSP1_AHB_CLK:
- clk_enable_vote_clk(priv->base, &gcc_blsp1_ahb_clk);
- break;
- case GCC_SDCC1_APPS_CLK:
- /* SDCC1: 200MHz */
- clk_rcg_set_rate_mnd(priv->base, &sdc_regs, 4, 0, 0,
- CFG_CLK_SRC_GPLL0);
- clk_enable_gpll0(priv->base, &gpll0_vote_clk);
- clk_enable_cbc(priv->base + SDCC_APPS_CBCR(1));
- break;
- case GCC_SDCC1_AHB_CLK:
- clk_enable_cbc(priv->base + SDCC_AHB_CBCR(1));
- break;
- case GCC_ETH_RGMII_CLK:
- if (rate == 250000000)
- clk_rcg_set_rate_mnd(priv->base, &emac_regs, 2, 0, 0,
- CFG_CLK_SRC_GPLL1);
- else if (rate == 125000000)
- clk_rcg_set_rate_mnd(priv->base, &emac_regs, 4, 0, 0,
- CFG_CLK_SRC_GPLL1);
- else if (rate == 50000000)
- clk_rcg_set_rate_mnd(priv->base, &emac_regs, 10, 0, 0,
- CFG_CLK_SRC_GPLL1);
- else if (rate == 5000000)
- clk_rcg_set_rate_mnd(priv->base, &emac_regs, 2, 1, 50,
- CFG_CLK_SRC_GPLL1);
- break;
- default:
- return 0;
- }
-
- return 0;
-}
-
-int msm_enable(struct clk *clk)
-{
- struct msm_clk_priv *priv = dev_get_priv(clk->dev);
-
- switch (clk->id) {
- case GCC_USB30_MASTER_CLK:
- clk_enable_cbc(priv->base + USB30_MASTER_CBCR);
- clk_rcg_set_rate_mnd(priv->base, &usb30_master_regs, 4, 0, 0,
- CFG_CLK_SRC_GPLL0);
- break;
- case GCC_SYS_NOC_USB3_CLK:
- clk_enable_cbc(priv->base + SYS_NOC_USB3_CBCR);
- break;
- case GCC_USB30_SLEEP_CLK:
- clk_enable_cbc(priv->base + USB30_SLEEP_CBCR);
- break;
- case GCC_USB30_MOCK_UTMI_CLK:
- clk_enable_cbc(priv->base + USB30_MOCK_UTMI_CBCR);
- break;
- case GCC_USB_HS_PHY_CFG_AHB_CLK:
- clk_enable_cbc(priv->base + USB_HS_PHY_CFG_AHB_CBCR);
- break;
- case GCC_USB2A_PHY_SLEEP_CLK:
- clk_enable_cbc(priv->base + USB_HS_PHY_CFG_AHB_CBCR);
- break;
- case GCC_ETH_PTP_CLK:
- /* SPEED_1000: freq -> 250MHz */
- clk_enable_cbc(priv->base + ETH_PTP_CBCR);
- clk_enable_gpll0(priv->base, &gpll1_vote_clk);
- clk_rcg_set_rate_mnd(priv->base, &emac_ptp_regs, 2, 0, 0,
- CFG_CLK_SRC_GPLL1);
- break;
- case GCC_ETH_RGMII_CLK:
- /* SPEED_1000: freq -> 250MHz */
- clk_enable_cbc(priv->base + ETH_RGMII_CBCR);
- clk_enable_gpll0(priv->base, &gpll1_vote_clk);
- clk_rcg_set_rate_mnd(priv->base, &emac_regs, 2, 0, 0,
- CFG_CLK_SRC_GPLL1);
- break;
- case GCC_ETH_SLAVE_AHB_CLK:
- clk_enable_cbc(priv->base + ETH_SLAVE_AHB_CBCR);
- break;
- case GCC_ETH_AXI_CLK:
- clk_enable_cbc(priv->base + ETH_AXI_CBCR);
- break;
- case GCC_BLSP1_AHB_CLK:
- clk_enable_vote_clk(priv->base, &gcc_blsp1_ahb_clk);
- break;
- case GCC_BLSP1_QUP0_I2C_APPS_CLK:
- clk_enable_cbc(priv->base + BLSP1_QUP0_I2C_APPS_CBCR);
- clk_rcg_set_rate(priv->base, &blsp1_qup0_i2c_apps_regs, 0,
- CFG_CLK_SRC_CXO);
- break;
- case GCC_BLSP1_QUP1_I2C_APPS_CLK:
- clk_enable_cbc(priv->base + BLSP1_QUP1_I2C_APPS_CBCR);
- clk_rcg_set_rate(priv->base, &blsp1_qup1_i2c_apps_regs, 0,
- CFG_CLK_SRC_CXO);
- break;
- case GCC_BLSP1_QUP2_I2C_APPS_CLK:
- clk_enable_cbc(priv->base + BLSP1_QUP2_I2C_APPS_CBCR);
- clk_rcg_set_rate(priv->base, &blsp1_qup2_i2c_apps_regs, 0,
- CFG_CLK_SRC_CXO);
- break;
- case GCC_BLSP1_QUP3_I2C_APPS_CLK:
- clk_enable_cbc(priv->base + BLSP1_QUP3_I2C_APPS_CBCR);
- clk_rcg_set_rate(priv->base, &blsp1_qup3_i2c_apps_regs, 0,
- CFG_CLK_SRC_CXO);
- break;
- case GCC_BLSP1_QUP4_I2C_APPS_CLK:
- clk_enable_cbc(priv->base + BLSP1_QUP4_I2C_APPS_CBCR);
- clk_rcg_set_rate(priv->base, &blsp1_qup4_i2c_apps_regs, 0,
- CFG_CLK_SRC_CXO);
- break;
- default:
- return 0;
- }
-
- return 0;
-}
diff --git a/arch/arm/mach-snapdragon/clock-sdm845.c b/arch/arm/mach-snapdragon/clock-sdm845.c
deleted file mode 100644
index d6df036..0000000
--- a/arch/arm/mach-snapdragon/clock-sdm845.c
+++ /dev/null
@@ -1,98 +0,0 @@
-// SPDX-License-Identifier: BSD-3-Clause
-/*
- * Clock drivers for Qualcomm SDM845
- *
- * (C) Copyright 2017 Jorge Ramirez Ortiz <jorge.ramirez-ortiz@linaro.org>
- * (C) Copyright 2021 Dzmitry Sankouski <dsankouski@gmail.com>
- *
- * Based on Little Kernel driver, simplified
- */
-
-#include <common.h>
-#include <clk-uclass.h>
-#include <dm.h>
-#include <errno.h>
-#include <asm/io.h>
-#include <linux/bitops.h>
-#include <dt-bindings/clock/qcom,gcc-sdm845.h>
-#include "clock-snapdragon.h"
-
-#define F(f, s, h, m, n) { (f), (s), (2 * (h) - 1), (m), (n) }
-
-struct freq_tbl {
- uint freq;
- uint src;
- u8 pre_div;
- u16 m;
- u16 n;
-};
-
-static const struct freq_tbl ftbl_gcc_qupv3_wrap0_s0_clk_src[] = {
- F(7372800, CFG_CLK_SRC_GPLL0_EVEN, 1, 384, 15625),
- F(14745600, CFG_CLK_SRC_GPLL0_EVEN, 1, 768, 15625),
- F(19200000, CFG_CLK_SRC_CXO, 1, 0, 0),
- F(29491200, CFG_CLK_SRC_GPLL0_EVEN, 1, 1536, 15625),
- F(32000000, CFG_CLK_SRC_GPLL0_EVEN, 1, 8, 75),
- F(48000000, CFG_CLK_SRC_GPLL0_EVEN, 1, 4, 25),
- F(64000000, CFG_CLK_SRC_GPLL0_EVEN, 1, 16, 75),
- F(80000000, CFG_CLK_SRC_GPLL0_EVEN, 1, 4, 15),
- F(96000000, CFG_CLK_SRC_GPLL0_EVEN, 1, 8, 25),
- F(100000000, CFG_CLK_SRC_GPLL0_EVEN, 3, 0, 0),
- F(102400000, CFG_CLK_SRC_GPLL0_EVEN, 1, 128, 375),
- F(112000000, CFG_CLK_SRC_GPLL0_EVEN, 1, 28, 75),
- F(117964800, CFG_CLK_SRC_GPLL0_EVEN, 1, 6144, 15625),
- F(120000000, CFG_CLK_SRC_GPLL0_EVEN, 2.5, 0, 0),
- F(128000000, CFG_CLK_SRC_GPLL0, 1, 16, 75),
- { }
-};
-
-static const struct bcr_regs uart2_regs = {
- .cfg_rcgr = SE9_UART_APPS_CFG_RCGR,
- .cmd_rcgr = SE9_UART_APPS_CMD_RCGR,
- .M = SE9_UART_APPS_M,
- .N = SE9_UART_APPS_N,
- .D = SE9_UART_APPS_D,
-};
-
-const struct freq_tbl *qcom_find_freq(const struct freq_tbl *f, uint rate)
-{
- if (!f)
- return NULL;
-
- if (!f->freq)
- return f;
-
- for (; f->freq; f++)
- if (rate <= f->freq)
- return f;
-
- /* Default to our fastest rate */
- return f - 1;
-}
-
-static int clk_init_uart(struct msm_clk_priv *priv, uint rate)
-{
- const struct freq_tbl *freq = qcom_find_freq(ftbl_gcc_qupv3_wrap0_s0_clk_src, rate);
-
- clk_rcg_set_rate_mnd(priv->base, &uart2_regs,
- freq->pre_div, freq->m, freq->n, freq->src);
-
- return 0;
-}
-
-ulong msm_set_rate(struct clk *clk, ulong rate)
-{
- struct msm_clk_priv *priv = dev_get_priv(clk->dev);
-
- switch (clk->id) {
- case GCC_QUPV3_WRAP1_S1_CLK: /*UART2*/
- return clk_init_uart(priv, rate);
- default:
- return 0;
- }
-}
-
-int msm_enable(struct clk *clk)
-{
- return 0;
-}
diff --git a/arch/arm/mach-snapdragon/clock-snapdragon.c b/arch/arm/mach-snapdragon/clock-snapdragon.c
deleted file mode 100644
index 0ac45dc..0000000
--- a/arch/arm/mach-snapdragon/clock-snapdragon.c
+++ /dev/null
@@ -1,181 +0,0 @@
-// SPDX-License-Identifier: BSD-3-Clause
-/*
- * Clock drivers for Qualcomm APQ8016, APQ8096
- *
- * (C) Copyright 2015 Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
- *
- * Based on Little Kernel driver, simplified
- */
-
-#include <common.h>
-#include <clk-uclass.h>
-#include <dm.h>
-#include <errno.h>
-#include <asm/io.h>
-#include <linux/bitops.h>
-#include "clock-snapdragon.h"
-
-/* CBCR register fields */
-#define CBCR_BRANCH_ENABLE_BIT BIT(0)
-#define CBCR_BRANCH_OFF_BIT BIT(31)
-
-extern ulong msm_set_rate(struct clk *clk, ulong rate);
-extern int msm_enable(struct clk *clk);
-
-/* Enable clock controlled by CBC soft macro */
-void clk_enable_cbc(phys_addr_t cbcr)
-{
- setbits_le32(cbcr, CBCR_BRANCH_ENABLE_BIT);
-
- while (readl(cbcr) & CBCR_BRANCH_OFF_BIT)
- ;
-}
-
-void clk_enable_gpll0(phys_addr_t base, const struct pll_vote_clk *gpll0)
-{
- if (readl(base + gpll0->status) & gpll0->status_bit)
- return; /* clock already enabled */
-
- setbits_le32(base + gpll0->ena_vote, gpll0->vote_bit);
-
- while ((readl(base + gpll0->status) & gpll0->status_bit) == 0)
- ;
-}
-
-#define BRANCH_ON_VAL (0)
-#define BRANCH_NOC_FSM_ON_VAL BIT(29)
-#define BRANCH_CHECK_MASK GENMASK(31, 28)
-
-void clk_enable_vote_clk(phys_addr_t base, const struct vote_clk *vclk)
-{
- u32 val;
-
- setbits_le32(base + vclk->ena_vote, vclk->vote_bit);
- do {
- val = readl(base + vclk->cbcr_reg);
- val &= BRANCH_CHECK_MASK;
- } while ((val != BRANCH_ON_VAL) && (val != BRANCH_NOC_FSM_ON_VAL));
-}
-
-#define APPS_CMD_RCGR_UPDATE BIT(0)
-
-/* Update clock command via CMD_RCGR */
-void clk_bcr_update(phys_addr_t apps_cmd_rcgr)
-{
- setbits_le32(apps_cmd_rcgr, APPS_CMD_RCGR_UPDATE);
-
- /* Wait for frequency to be updated. */
- while (readl(apps_cmd_rcgr) & APPS_CMD_RCGR_UPDATE)
- ;
-}
-
-#define CFG_MODE_DUAL_EDGE (0x2 << 12) /* Counter mode */
-
-#define CFG_MASK 0x3FFF
-
-#define CFG_DIVIDER_MASK 0x1F
-
-/* root set rate for clocks with half integer and MND divider */
-void clk_rcg_set_rate_mnd(phys_addr_t base, const struct bcr_regs *regs,
- int div, int m, int n, int source)
-{
- u32 cfg;
- /* M value for MND divider. */
- u32 m_val = m;
- /* NOT(N-M) value for MND divider. */
- u32 n_val = ~((n) - (m)) * !!(n);
- /* NOT 2D value for MND divider. */
- u32 d_val = ~(n);
-
- /* Program MND values */
- writel(m_val, base + regs->M);
- writel(n_val, base + regs->N);
- writel(d_val, base + regs->D);
-
- /* setup src select and divider */
- cfg = readl(base + regs->cfg_rcgr);
- cfg &= ~CFG_MASK;
- cfg |= source & CFG_CLK_SRC_MASK; /* Select clock source */
-
- /* Set the divider; HW permits fraction dividers (+0.5), but
- for simplicity, we will support integers only */
- if (div)
- cfg |= (2 * div - 1) & CFG_DIVIDER_MASK;
-
- if (n_val)
- cfg |= CFG_MODE_DUAL_EDGE;
-
- writel(cfg, base + regs->cfg_rcgr); /* Write new clock configuration */
-
- /* Inform h/w to start using the new config. */
- clk_bcr_update(base + regs->cmd_rcgr);
-}
-
-/* root set rate for clocks with half integer and mnd_width=0 */
-void clk_rcg_set_rate(phys_addr_t base, const struct bcr_regs *regs, int div,
- int source)
-{
- u32 cfg;
-
- /* setup src select and divider */
- cfg = readl(base + regs->cfg_rcgr);
- cfg &= ~CFG_MASK;
- cfg |= source & CFG_CLK_SRC_MASK; /* Select clock source */
-
- /*
- * Set the divider; HW permits fraction dividers (+0.5), but
- * for simplicity, we will support integers only
- */
- if (div)
- cfg |= (2 * div - 1) & CFG_DIVIDER_MASK;
-
- writel(cfg, base + regs->cfg_rcgr); /* Write new clock configuration */
-
- /* Inform h/w to start using the new config. */
- clk_bcr_update(base + regs->cmd_rcgr);
-}
-
-static int msm_clk_probe(struct udevice *dev)
-{
- struct msm_clk_priv *priv = dev_get_priv(dev);
-
- priv->base = dev_read_addr(dev);
- if (priv->base == FDT_ADDR_T_NONE)
- return -EINVAL;
-
- return 0;
-}
-
-static ulong msm_clk_set_rate(struct clk *clk, ulong rate)
-{
- return msm_set_rate(clk, rate);
-}
-
-static int msm_clk_enable(struct clk *clk)
-{
- return msm_enable(clk);
-}
-
-static struct clk_ops msm_clk_ops = {
- .set_rate = msm_clk_set_rate,
- .enable = msm_clk_enable,
-};
-
-static const struct udevice_id msm_clk_ids[] = {
- { .compatible = "qcom,gcc-msm8916" },
- { .compatible = "qcom,gcc-apq8016" },
- { .compatible = "qcom,gcc-msm8996" },
- { .compatible = "qcom,gcc-apq8096" },
- { .compatible = "qcom,gcc-sdm845" },
- { .compatible = "qcom,gcc-qcs404" },
- { }
-};
-
-U_BOOT_DRIVER(clk_msm) = {
- .name = "clk_msm",
- .id = UCLASS_CLK,
- .of_match = msm_clk_ids,
- .ops = &msm_clk_ops,
- .priv_auto = sizeof(struct msm_clk_priv),
- .probe = msm_clk_probe,
-};
diff --git a/arch/arm/mach-snapdragon/clock-snapdragon.h b/arch/arm/mach-snapdragon/clock-snapdragon.h
deleted file mode 100644
index c90bbef..0000000
--- a/arch/arm/mach-snapdragon/clock-snapdragon.h
+++ /dev/null
@@ -1,48 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Qualcomm APQ8016, APQ8096, SDM845
- *
- * (C) Copyright 2017 Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
- */
-#ifndef _CLOCK_SNAPDRAGON_H
-#define _CLOCK_SNAPDRAGON_H
-
-#define CFG_CLK_SRC_CXO (0 << 8)
-#define CFG_CLK_SRC_GPLL0 (1 << 8)
-#define CFG_CLK_SRC_GPLL0_EVEN (6 << 8)
-#define CFG_CLK_SRC_MASK (7 << 8)
-
-struct pll_vote_clk {
- uintptr_t status;
- int status_bit;
- uintptr_t ena_vote;
- int vote_bit;
-};
-
-struct vote_clk {
- uintptr_t cbcr_reg;
- uintptr_t ena_vote;
- int vote_bit;
-};
-struct bcr_regs {
- uintptr_t cfg_rcgr;
- uintptr_t cmd_rcgr;
- uintptr_t M;
- uintptr_t N;
- uintptr_t D;
-};
-
-struct msm_clk_priv {
- phys_addr_t base;
-};
-
-void clk_enable_gpll0(phys_addr_t base, const struct pll_vote_clk *gpll0);
-void clk_bcr_update(phys_addr_t apps_cmd_rgcr);
-void clk_enable_cbc(phys_addr_t cbcr);
-void clk_enable_vote_clk(phys_addr_t base, const struct vote_clk *vclk);
-void clk_rcg_set_rate_mnd(phys_addr_t base, const struct bcr_regs *regs,
- int div, int m, int n, int source);
-void clk_rcg_set_rate(phys_addr_t base, const struct bcr_regs *regs, int div,
- int source);
-
-#endif
diff --git a/arch/arm/mach-snapdragon/include/mach/gpio.h b/arch/arm/mach-snapdragon/include/mach/gpio.h
index bbc2bc1..8dac62f 100644
--- a/arch/arm/mach-snapdragon/include/mach/gpio.h
+++ b/arch/arm/mach-snapdragon/include/mach/gpio.h
@@ -1,8 +1,28 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
- * Empty gpio.h
+ * Qualcomm common pin control data.
*
- * This file must stay as arch/arm/include/asm/gpio.h requires it.
- *
- * (C) Copyright 2015 Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
+ * Copyright (C) 2023 Linaro Ltd.
*/
+#ifndef _QCOM_GPIO_H_
+#define _QCOM_GPIO_H_
+
+#include <asm/types.h>
+#include <stdbool.h>
+
+struct msm_pin_data {
+ int pin_count;
+ const unsigned int *pin_offsets;
+};
+
+static inline u32 qcom_pin_offset(const unsigned int *offs, unsigned int selector)
+{
+ u32 out = (selector * 0x1000);
+
+ if (offs)
+ return out + offs[selector];
+
+ return out;
+}
+
+#endif /* _QCOM_GPIO_H_ */
diff --git a/arch/arm/mach-snapdragon/include/mach/sysmap-apq8016.h b/arch/arm/mach-snapdragon/include/mach/sysmap-apq8016.h
deleted file mode 100644
index d9a3b1a..0000000
--- a/arch/arm/mach-snapdragon/include/mach/sysmap-apq8016.h
+++ /dev/null
@@ -1,39 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Qualcomm APQ8916 sysmap
- *
- * (C) Copyright 2015 Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
- */
-#ifndef _MACH_SYSMAP_APQ8016_H
-#define _MACH_SYSMAP_APQ8016_H
-
-#define GICD_BASE (0x0b000000)
-#define GICC_BASE (0x0b002000)
-
-/* Clocks: (from CLK_CTL_BASE) */
-#define GPLL0_STATUS (0x2101C)
-#define APCS_GPLL_ENA_VOTE (0x45000)
-#define APCS_CLOCK_BRANCH_ENA_VOTE (0x45004)
-
-#define SDCC_BCR(n) ((n * 0x1000) + 0x41000)
-#define SDCC_CMD_RCGR(n) ((n * 0x1000) + 0x41004)
-#define SDCC_CFG_RCGR(n) ((n * 0x1000) + 0x41008)
-#define SDCC_M(n) ((n * 0x1000) + 0x4100C)
-#define SDCC_N(n) ((n * 0x1000) + 0x41010)
-#define SDCC_D(n) ((n * 0x1000) + 0x41014)
-#define SDCC_APPS_CBCR(n) ((n * 0x1000) + 0x41018)
-#define SDCC_AHB_CBCR(n) ((n * 0x1000) + 0x4101C)
-
-/* BLSP1 AHB clock (root clock for BLSP) */
-#define BLSP1_AHB_CBCR 0x1008
-
-/* Uart clock control registers */
-#define BLSP1_UART2_BCR (0x3028)
-#define BLSP1_UART2_APPS_CBCR (0x302C)
-#define BLSP1_UART2_APPS_CMD_RCGR (0x3034)
-#define BLSP1_UART2_APPS_CFG_RCGR (0x3038)
-#define BLSP1_UART2_APPS_M (0x303C)
-#define BLSP1_UART2_APPS_N (0x3040)
-#define BLSP1_UART2_APPS_D (0x3044)
-
-#endif
diff --git a/arch/arm/mach-snapdragon/include/mach/sysmap-apq8096.h b/arch/arm/mach-snapdragon/include/mach/sysmap-apq8096.h
deleted file mode 100644
index 36a902b..0000000
--- a/arch/arm/mach-snapdragon/include/mach/sysmap-apq8096.h
+++ /dev/null
@@ -1,37 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Qualcomm APQ8096 sysmap
- *
- * (C) Copyright 2017 Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
- */
-#ifndef _MACH_SYSMAP_APQ8096_H
-#define _MACH_SYSMAP_APQ8096_H
-
-#define TLMM_BASE_ADDR (0x1010000)
-
-/* Strength (sdc1) */
-#define SDC1_HDRV_PULL_CTL_REG (TLMM_BASE_ADDR + 0x0012D000)
-
-/* Clocks: (from CLK_CTL_BASE) */
-#define GPLL0_STATUS (0x0000)
-#define APCS_GPLL_ENA_VOTE (0x52000)
-#define APCS_CLOCK_BRANCH_ENA_VOTE (0x52004)
-
-#define SDCC2_BCR (0x14000) /* block reset */
-#define SDCC2_APPS_CBCR (0x14004) /* branch control */
-#define SDCC2_AHB_CBCR (0x14008)
-#define SDCC2_CMD_RCGR (0x14010)
-#define SDCC2_CFG_RCGR (0x14014)
-#define SDCC2_M (0x14018)
-#define SDCC2_N (0x1401C)
-#define SDCC2_D (0x14020)
-
-#define BLSP2_AHB_CBCR (0x25004)
-#define BLSP2_UART2_APPS_CBCR (0x29004)
-#define BLSP2_UART2_APPS_CMD_RCGR (0x2900C)
-#define BLSP2_UART2_APPS_CFG_RCGR (0x29010)
-#define BLSP2_UART2_APPS_M (0x29014)
-#define BLSP2_UART2_APPS_N (0x29018)
-#define BLSP2_UART2_APPS_D (0x2901C)
-
-#endif
diff --git a/arch/arm/mach-snapdragon/include/mach/sysmap-qcs404.h b/arch/arm/mach-snapdragon/include/mach/sysmap-qcs404.h
deleted file mode 100644
index 5768fb1..0000000
--- a/arch/arm/mach-snapdragon/include/mach/sysmap-qcs404.h
+++ /dev/null
@@ -1,88 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Qualcomm QCS404 sysmap
- *
- * (C) Copyright 2022 Sumit Garg <sumit.garg@linaro.org>
- */
-#ifndef _MACH_SYSMAP_QCS404_H
-#define _MACH_SYSMAP_QCS404_H
-
-#define GICD_BASE (0x0b000000)
-#define GICC_BASE (0x0b002000)
-
-/* Clocks: (from CLK_CTL_BASE) */
-#define GPLL0_STATUS (0x21000)
-#define GPLL1_STATUS (0x20000)
-#define APCS_GPLL_ENA_VOTE (0x45000)
-#define APCS_CLOCK_BRANCH_ENA_VOTE (0x45004)
-
-/* BLSP1 AHB clock (root clock for BLSP) */
-#define BLSP1_AHB_CBCR 0x1008
-
-/* Uart clock control registers */
-#define BLSP1_UART2_BCR (0x3028)
-#define BLSP1_UART2_APPS_CBCR (0x302C)
-#define BLSP1_UART2_APPS_CMD_RCGR (0x3034)
-#define BLSP1_UART2_APPS_CFG_RCGR (0x3038)
-#define BLSP1_UART2_APPS_M (0x303C)
-#define BLSP1_UART2_APPS_N (0x3040)
-#define BLSP1_UART2_APPS_D (0x3044)
-
-/* I2C controller clock control registerss */
-#define BLSP1_QUP0_I2C_APPS_CBCR (0x6028)
-#define BLSP1_QUP0_I2C_APPS_CMD_RCGR (0x602C)
-#define BLSP1_QUP0_I2C_APPS_CFG_RCGR (0x6030)
-#define BLSP1_QUP1_I2C_APPS_CBCR (0x2008)
-#define BLSP1_QUP1_I2C_APPS_CMD_RCGR (0x200C)
-#define BLSP1_QUP1_I2C_APPS_CFG_RCGR (0x2010)
-#define BLSP1_QUP2_I2C_APPS_CBCR (0x3010)
-#define BLSP1_QUP2_I2C_APPS_CMD_RCGR (0x3000)
-#define BLSP1_QUP2_I2C_APPS_CFG_RCGR (0x3004)
-#define BLSP1_QUP3_I2C_APPS_CBCR (0x4020)
-#define BLSP1_QUP3_I2C_APPS_CMD_RCGR (0x4000)
-#define BLSP1_QUP3_I2C_APPS_CFG_RCGR (0x4004)
-#define BLSP1_QUP4_I2C_APPS_CBCR (0x5020)
-#define BLSP1_QUP4_I2C_APPS_CMD_RCGR (0x5000)
-#define BLSP1_QUP4_I2C_APPS_CFG_RCGR (0x5004)
-
-/* SD controller clock control registers */
-#define SDCC_BCR(n) (((n) * 0x1000) + 0x41000)
-#define SDCC_CMD_RCGR(n) (((n) * 0x1000) + 0x41004)
-#define SDCC_CFG_RCGR(n) (((n) * 0x1000) + 0x41008)
-#define SDCC_M(n) (((n) * 0x1000) + 0x4100C)
-#define SDCC_N(n) (((n) * 0x1000) + 0x41010)
-#define SDCC_D(n) (((n) * 0x1000) + 0x41014)
-#define SDCC_APPS_CBCR(n) (((n) * 0x1000) + 0x41018)
-#define SDCC_AHB_CBCR(n) (((n) * 0x1000) + 0x4101C)
-
-/* USB-3.0 controller clock control registers */
-#define SYS_NOC_USB3_CBCR (0x26014)
-#define USB30_BCR (0x39000)
-#define USB3PHY_BCR (0x39008)
-#define USB30_MASTER_CBCR (0x3900C)
-#define USB30_SLEEP_CBCR (0x39010)
-#define USB30_MOCK_UTMI_CBCR (0x39014)
-#define USB30_MOCK_UTMI_CMD_RCGR (0x3901C)
-#define USB30_MOCK_UTMI_CFG_RCGR (0x39020)
-#define USB30_MASTER_CMD_RCGR (0x39028)
-#define USB30_MASTER_CFG_RCGR (0x3902C)
-#define USB30_MASTER_M (0x39030)
-#define USB30_MASTER_N (0x39034)
-#define USB30_MASTER_D (0x39038)
-#define USB2A_PHY_SLEEP_CBCR (0x4102C)
-#define USB_HS_PHY_CFG_AHB_CBCR (0x41030)
-
-/* ETH controller clock control registers */
-#define ETH_PTP_CBCR (0x4e004)
-#define ETH_RGMII_CBCR (0x4e008)
-#define ETH_SLAVE_AHB_CBCR (0x4e00c)
-#define ETH_AXI_CBCR (0x4e010)
-#define EMAC_PTP_CMD_RCGR (0x4e014)
-#define EMAC_PTP_CFG_RCGR (0x4e018)
-#define EMAC_CMD_RCGR (0x4e01c)
-#define EMAC_CFG_RCGR (0x4e020)
-#define EMAC_M (0x4e024)
-#define EMAC_N (0x4e028)
-#define EMAC_D (0x4e02c)
-
-#endif
diff --git a/arch/arm/mach-snapdragon/include/mach/sysmap-sdm845.h b/arch/arm/mach-snapdragon/include/mach/sysmap-sdm845.h
deleted file mode 100644
index 7165985..0000000
--- a/arch/arm/mach-snapdragon/include/mach/sysmap-sdm845.h
+++ /dev/null
@@ -1,42 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Qualcomm SDM845 sysmap
- *
- * (C) Copyright 2021 Dzmitry Sankouski <dsankouski@gmail.com>
- */
-#ifndef _MACH_SYSMAP_SDM845_H
-#define _MACH_SYSMAP_SDM845_H
-
-#define TLMM_BASE_ADDR (0x1010000)
-
-/* Strength (sdc1) */
-#define SDC1_HDRV_PULL_CTL_REG (TLMM_BASE_ADDR + 0x0012D000)
-
-/* Clocks: (from CLK_CTL_BASE) */
-#define GPLL0_STATUS (0x0000)
-#define APCS_GPLL_ENA_VOTE (0x52000)
-#define APCS_CLOCK_BRANCH_ENA_VOTE (0x52004)
-
-#define SDCC2_BCR (0x14000) /* block reset */
-#define SDCC2_APPS_CBCR (0x14004) /* branch control */
-#define SDCC2_AHB_CBCR (0x14008)
-#define SDCC2_CMD_RCGR (0x1400c)
-#define SDCC2_CFG_RCGR (0x14010)
-#define SDCC2_M (0x14014)
-#define SDCC2_N (0x14018)
-#define SDCC2_D (0x1401C)
-
-#define RCG2_CFG_REG 0x4
-#define M_REG 0x8
-#define N_REG 0xc
-#define D_REG 0x10
-
-#define SE9_AHB_CBCR (0x25004)
-#define SE9_UART_APPS_CBCR (0x29004)
-#define SE9_UART_APPS_CMD_RCGR (0x18148)
-#define SE9_UART_APPS_CFG_RCGR (0x1814C)
-#define SE9_UART_APPS_M (0x18150)
-#define SE9_UART_APPS_N (0x18154)
-#define SE9_UART_APPS_D (0x18158)
-
-#endif
diff --git a/arch/arm/mach-snapdragon/init_sdm845.c b/arch/arm/mach-snapdragon/init_sdm845.c
index 1f88502..067acc9 100644
--- a/arch/arm/mach-snapdragon/init_sdm845.c
+++ b/arch/arm/mach-snapdragon/init_sdm845.c
@@ -5,6 +5,7 @@
* (C) Copyright 2021 Dzmitry Sankouski <dsankouski@gmail.com>
*/
+#include <button.h>
#include <init.h>
#include <env.h>
#include <common.h>
@@ -32,46 +33,18 @@
/* Check for vol- and power buttons */
__weak int misc_init_r(void)
{
- struct udevice *pon;
- struct gpio_desc resin;
- int node, ret;
+ struct udevice *btn;
+ int ret;
+ enum button_state_t state;
- ret = uclass_get_device_by_name(UCLASS_GPIO, "pm8998_pon@800", &pon);
+ ret = button_get_by_label("pwrkey", &btn);
if (ret < 0) {
- printf("Failed to find PMIC pon node. Check device tree\n");
- return 0;
+ printf("Couldn't find power button!\n");
+ return ret;
}
- node = fdt_subnode_offset(gd->fdt_blob, dev_of_offset(pon),
- "key_vol_down");
- if (node < 0) {
- printf("Failed to find key_vol_down node. Check device tree\n");
- return 0;
- }
- if (gpio_request_by_name_nodev(offset_to_ofnode(node), "gpios", 0,
- &resin, 0)) {
- printf("Failed to request key_vol_down button.\n");
- return 0;
- }
- if (dm_gpio_get_value(&resin)) {
- env_set("key_vol_down", "1");
- printf("Volume down button pressed\n");
- } else {
- env_set("key_vol_down", "0");
- }
-
- node = fdt_subnode_offset(gd->fdt_blob, dev_of_offset(pon),
- "key_power");
- if (node < 0) {
- printf("Failed to find key_power node. Check device tree\n");
- return 0;
- }
- if (gpio_request_by_name_nodev(offset_to_ofnode(node), "gpios", 0,
- &resin, 0)) {
- printf("Failed to request key_power button.\n");
- return 0;
- }
- if (dm_gpio_get_value(&resin)) {
+ state = button_get_state(btn);
+ if (state == BUTTON_ON) {
env_set("key_power", "1");
printf("Power button pressed\n");
} else {
diff --git a/arch/arm/mach-snapdragon/pinctrl-sdm845.c b/arch/arm/mach-snapdragon/pinctrl-sdm845.c
deleted file mode 100644
index 40f2f01..0000000
--- a/arch/arm/mach-snapdragon/pinctrl-sdm845.c
+++ /dev/null
@@ -1,44 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Qualcomm SDM845 pinctrl
- *
- * (C) Copyright 2021 Dzmitry Sankouski <dsankouski@gmail.com>
- *
- */
-
-#include "pinctrl-snapdragon.h"
-#include <common.h>
-
-#define MAX_PIN_NAME_LEN 32
-static char pin_name[MAX_PIN_NAME_LEN] __section(".data");
-
-static const struct pinctrl_function msm_pinctrl_functions[] = {
- {"qup9", 1},
- {"gpio", 0},
-};
-
-static const char *sdm845_get_function_name(struct udevice *dev,
- unsigned int selector)
-{
- return msm_pinctrl_functions[selector].name;
-}
-
-static const char *sdm845_get_pin_name(struct udevice *dev,
- unsigned int selector)
-{
- snprintf(pin_name, MAX_PIN_NAME_LEN, "GPIO_%u", selector);
- return pin_name;
-}
-
-static unsigned int sdm845_get_function_mux(unsigned int selector)
-{
- return msm_pinctrl_functions[selector].val;
-}
-
-struct msm_pinctrl_data sdm845_data = {
- .pin_count = 150,
- .functions_count = ARRAY_SIZE(msm_pinctrl_functions),
- .get_function_name = sdm845_get_function_name,
- .get_function_mux = sdm845_get_function_mux,
- .get_pin_name = sdm845_get_pin_name,
-};
diff --git a/arch/arm/mach-snapdragon/pinctrl-snapdragon.h b/arch/arm/mach-snapdragon/pinctrl-snapdragon.h
deleted file mode 100644
index 178ee01..0000000
--- a/arch/arm/mach-snapdragon/pinctrl-snapdragon.h
+++ /dev/null
@@ -1,33 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Qualcomm Pin control
- *
- * (C) Copyright 2018 Ramon Fried <ramon.fried@gmail.com>
- *
- */
-#ifndef _PINCTRL_SNAPDRAGON_H
-#define _PINCTRL_SNAPDRAGON_H
-
-struct udevice;
-
-struct msm_pinctrl_data {
- int pin_count;
- int functions_count;
- const char *(*get_function_name)(struct udevice *dev,
- unsigned int selector);
- unsigned int (*get_function_mux)(unsigned int selector);
- const char *(*get_pin_name)(struct udevice *dev,
- unsigned int selector);
-};
-
-struct pinctrl_function {
- const char *name;
- int val;
-};
-
-extern struct msm_pinctrl_data apq8016_data;
-extern struct msm_pinctrl_data apq8096_data;
-extern struct msm_pinctrl_data sdm845_data;
-extern struct msm_pinctrl_data qcs404_data;
-
-#endif
diff --git a/arch/arm/mach-socfpga/clock_manager_s10.c b/arch/arm/mach-socfpga/clock_manager_s10.c
index 4b4f074..4530033 100644
--- a/arch/arm/mach-socfpga/clock_manager_s10.c
+++ b/arch/arm/mach-socfpga/clock_manager_s10.c
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
/*
- * Copyright (C) 2016-2018 Intel Corporation <www.intel.com>
+ * Copyright (C) 2016-2023 Intel Corporation <www.intel.com>
*
*/
@@ -399,6 +399,21 @@
return cm_get_l3_main_clk_hz() / 4;
}
+/*
+ * Override weak dw_spi_get_clk implementation in designware_spi.c driver
+ */
+
+int dw_spi_get_clk(struct udevice *bus, ulong *rate)
+{
+ *rate = cm_get_spi_controller_clk_hz();
+ if (!*rate) {
+ printf("SPI: clock rate is zero");
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
void cm_print_clock_quick_summary(void)
{
printf("MPU %d kHz\n", (u32)(cm_get_mpu_clk_hz() / 1000));
diff --git a/arch/arm/mach-socfpga/include/mach/handoff_soc64.h b/arch/arm/mach-socfpga/include/mach/handoff_soc64.h
index 902fc6b..9b85e58 100644
--- a/arch/arm/mach-socfpga/include/mach/handoff_soc64.h
+++ b/arch/arm/mach-socfpga/include/mach/handoff_soc64.h
@@ -78,12 +78,6 @@
#ifndef __ASSEMBLY__
#include <asm/types.h>
-enum endianness {
- LITTLE_ENDIAN = 0,
- BIG_ENDIAN,
- UNKNOWN_ENDIANNESS
-};
-
int socfpga_get_handoff_size(void *handoff_address);
int socfpga_handoff_read(void *handoff_address, void *table, u32 table_len);
#endif
diff --git a/arch/arm/mach-socfpga/wrap_handoff_soc64.c b/arch/arm/mach-socfpga/wrap_handoff_soc64.c
index e7cb5ea..df0701e 100644
--- a/arch/arm/mach-socfpga/wrap_handoff_soc64.c
+++ b/arch/arm/mach-socfpga/wrap_handoff_soc64.c
@@ -10,6 +10,15 @@
#include <errno.h>
#include "log.h"
+#ifndef __ASSEMBLY__
+#include <asm/types.h>
+enum endianness {
+ LITTLE_ENDIAN = 0,
+ BIG_ENDIAN,
+ UNKNOWN_ENDIANNESS
+};
+#endif
+
static enum endianness check_endianness(u32 handoff)
{
switch (handoff) {
diff --git a/arch/arm/mach-stm32mp/Kconfig b/arch/arm/mach-stm32mp/Kconfig
index 5fc92d0..b9af03d 100644
--- a/arch/arm/mach-stm32mp/Kconfig
+++ b/arch/arm/mach-stm32mp/Kconfig
@@ -35,9 +35,9 @@
choice
prompt "Select STMicroelectronics STM32MPxxx Soc"
- default STM32MP15x
+ default STM32MP15X
-config STM32MP13x
+config STM32MP13X
bool "Support STMicroelectronics STM32MP13x Soc"
select ARM_SMCCC
select CPU_V7A
@@ -55,7 +55,7 @@
support of STMicroelectronics SOC STM32MP13x family
STMicroelectronics MPU with core ARMv7
-config STM32MP15x
+config STM32MP15X
bool "Support STMicroelectronics STM32MP15x Soc"
select ARCH_SUPPORT_PSCI
select BINMAN
@@ -127,7 +127,7 @@
config STM32_ETZPC
bool "STM32 Extended TrustZone Protection"
- depends on STM32MP15x || STM32MP13x
+ depends on STM32MP15X || STM32MP13X
default y
imply BOOTP_SERVERIP
help
@@ -144,6 +144,7 @@
config CMD_STM32KEY
bool "command stm32key to fuse public key hash"
+ depends on CMDLINE
help
fuse public key hash in corresponding fuse used to authenticate
binary.
diff --git a/arch/arm/mach-stm32mp/Kconfig.13x b/arch/arm/mach-stm32mp/Kconfig.13x
index acc02a5..4d74b35 100644
--- a/arch/arm/mach-stm32mp/Kconfig.13x
+++ b/arch/arm/mach-stm32mp/Kconfig.13x
@@ -1,10 +1,10 @@
-if STM32MP13x
+if STM32MP13X
choice
prompt "STM32MP13x board select"
optional
-config TARGET_ST_STM32MP13x
+config TARGET_ST_STM32MP13X
bool "STMicroelectronics STM32MP13x boards"
imply BOOTSTAGE
imply CMD_BOOTSTAGE
diff --git a/arch/arm/mach-stm32mp/Kconfig.15x b/arch/arm/mach-stm32mp/Kconfig.15x
index 1d32f8b..71c14eb 100644
--- a/arch/arm/mach-stm32mp/Kconfig.15x
+++ b/arch/arm/mach-stm32mp/Kconfig.15x
@@ -1,6 +1,6 @@
-if STM32MP15x
+if STM32MP15X
-config STM32MP15x_STM32IMAGE
+config STM32MP15X_STM32IMAGE
bool "Support STM32 image for generated U-Boot image"
depends on TFABOOT
help
@@ -11,7 +11,7 @@
prompt "STM32MP15x board select"
optional
-config TARGET_ST_STM32MP15x
+config TARGET_ST_STM32MP15X
bool "STMicroelectronics STM32MP15x boards"
imply BOOTSTAGE
imply CMD_BOOTSTAGE
diff --git a/arch/arm/mach-stm32mp/Makefile b/arch/arm/mach-stm32mp/Makefile
index 00dc25b..ee8a542 100644
--- a/arch/arm/mach-stm32mp/Makefile
+++ b/arch/arm/mach-stm32mp/Makefile
@@ -6,9 +6,10 @@
obj-y += dram_init.o
obj-y += syscon.o
obj-y += bsec.o
+obj-y += soc.o
-obj-$(CONFIG_STM32MP15x) += stm32mp1/
-obj-$(CONFIG_STM32MP13x) += stm32mp1/
+obj-$(CONFIG_STM32MP15X) += stm32mp1/
+obj-$(CONFIG_STM32MP13X) += stm32mp1/
obj-$(CONFIG_STM32MP25X) += stm32mp2/
obj-$(CONFIG_STM32_ECDSA_VERIFY) += ecdsa_romapi.o
diff --git a/arch/arm/mach-stm32mp/bsec.c b/arch/arm/mach-stm32mp/bsec.c
index 28a8280..5b86901 100644
--- a/arch/arm/mach-stm32mp/bsec.c
+++ b/arch/arm/mach-stm32mp/bsec.c
@@ -20,7 +20,6 @@
#include <linux/iopoll.h>
#include <linux/printk.h>
-#define BSEC_OTP_MAX_VALUE 95
#define BSEC_OTP_UPPER_START 32
#define BSEC_TIMEOUT_US 10000
@@ -400,6 +399,11 @@
struct udevice *tee;
};
+struct stm32mp_bsec_drvdata {
+ int size;
+ bool ta;
+};
+
static int stm32mp_bsec_read_otp(struct udevice *dev, u32 *val, u32 otp)
{
struct stm32mp_bsec_plat *plat;
@@ -609,6 +613,7 @@
void *buf, int size)
{
struct stm32mp_bsec_priv *priv = dev_get_priv(dev);
+ struct stm32mp_bsec_drvdata *data = (struct stm32mp_bsec_drvdata *)dev_get_driver_data(dev);
int ret;
int i;
bool shadow = true, lock = false;
@@ -642,7 +647,7 @@
otp = offs / sizeof(u32);
- for (i = otp; i < (otp + nb_otp) && i <= BSEC_OTP_MAX_VALUE; i++) {
+ for (i = otp; i < (otp + nb_otp) && i < data->size; i++) {
u32 *addr = &((u32 *)buf)[i - otp];
if (lock)
@@ -665,6 +670,7 @@
const void *buf, int size)
{
struct stm32mp_bsec_priv *priv = dev_get_priv(dev);
+ struct stm32mp_bsec_drvdata *data = (struct stm32mp_bsec_drvdata *)dev_get_driver_data(dev);
int ret = 0;
int i;
bool shadow = true, lock = false;
@@ -698,7 +704,7 @@
otp = offs / sizeof(u32);
- for (i = otp; i < otp + nb_otp && i <= BSEC_OTP_MAX_VALUE; i++) {
+ for (i = otp; i < otp + nb_otp && i < data->size; i++) {
u32 *val = &((u32 *)buf)[i - otp];
if (lock)
@@ -732,6 +738,7 @@
static int stm32mp_bsec_probe(struct udevice *dev)
{
+ struct stm32mp_bsec_drvdata *data = (struct stm32mp_bsec_drvdata *)dev_get_driver_data(dev);
int otp;
struct stm32mp_bsec_plat *plat;
struct clk_bulk clk_bulk;
@@ -745,16 +752,22 @@
}
if (IS_ENABLED(CONFIG_OPTEE))
- bsec_optee_open(dev);
+ ret = bsec_optee_open(dev);
+ else
+ ret = -ENOTSUPP;
+ /* failed if OP-TEE TA is required */
+ if (data->ta && !ret)
+ return ret;
/*
* update unlocked shadow for OTP cleared by the rom code
* only executed in SPL, it is done in TF-A for TFABOOT
*/
- if (IS_ENABLED(CONFIG_SPL_BUILD)) {
+ if (IS_ENABLED(CONFIG_SPL_BUILD) && !data->ta) {
plat = dev_get_plat(dev);
- for (otp = 57; otp <= BSEC_OTP_MAX_VALUE; otp++)
+ /* here 57 is the value for STM32MP15x ROM code, only MPU with SPL support*/
+ for (otp = 57; otp < data->size; otp++)
if (!bsec_read_SR_lock(plat->base, otp))
bsec_shadow_register(dev, plat->base, otp);
}
@@ -762,9 +775,25 @@
return 0;
}
+static const struct stm32mp_bsec_drvdata stm32mp13_data = {
+ .size = 96,
+ .ta = true,
+};
+
+static const struct stm32mp_bsec_drvdata stm32mp15_data = {
+ .size = 96,
+ .ta = false,
+};
+
+static const struct stm32mp_bsec_drvdata stm32mp25_data = {
+ .size = 368, /* 384 but no access to HWKEY and STM32PRVKEY */
+ .ta = true,
+};
+
static const struct udevice_id stm32mp_bsec_ids[] = {
- { .compatible = "st,stm32mp13-bsec" },
- { .compatible = "st,stm32mp15-bsec" },
+ { .compatible = "st,stm32mp13-bsec", .data = (ulong)&stm32mp13_data},
+ { .compatible = "st,stm32mp15-bsec", .data = (ulong)&stm32mp15_data},
+ { .compatible = "st,stm32mp25-bsec", .data = (ulong)&stm32mp25_data},
{}
};
diff --git a/arch/arm/mach-stm32mp/cmd_stm32key.c b/arch/arm/mach-stm32mp/cmd_stm32key.c
index e16fcf4..c7fe232 100644
--- a/arch/arm/mach-stm32mp/cmd_stm32key.c
+++ b/arch/arm/mach-stm32mp/cmd_stm32key.c
@@ -19,8 +19,8 @@
* STM32MP13x: 0b111111 = 0x3F for OTP_SECURED closed device
*/
#define STM32_OTP_CLOSE_ID 0
-#define STM32_OTP_STM32MP13x_CLOSE_MASK 0x3F
-#define STM32_OTP_STM32MP15x_CLOSE_MASK BIT(6)
+#define STM32_OTP_STM32MP13X_CLOSE_MASK 0x3F
+#define STM32_OTP_STM32MP15X_CLOSE_MASK BIT(6)
/* PKH is the first element of the key list */
#define STM32KEY_PKH 0
@@ -61,29 +61,29 @@
static u8 get_key_nb(void)
{
- if (IS_ENABLED(CONFIG_STM32MP13x))
+ if (IS_ENABLED(CONFIG_STM32MP13X))
return ARRAY_SIZE(stm32mp13_list);
- if (IS_ENABLED(CONFIG_STM32MP15x))
+ if (IS_ENABLED(CONFIG_STM32MP15X))
return ARRAY_SIZE(stm32mp15_list);
}
static const struct stm32key *get_key(u8 index)
{
- if (IS_ENABLED(CONFIG_STM32MP13x))
+ if (IS_ENABLED(CONFIG_STM32MP13X))
return &stm32mp13_list[index];
- if (IS_ENABLED(CONFIG_STM32MP15x))
+ if (IS_ENABLED(CONFIG_STM32MP15X))
return &stm32mp15_list[index];
}
static u32 get_otp_close_mask(void)
{
- if (IS_ENABLED(CONFIG_STM32MP13x))
- return STM32_OTP_STM32MP13x_CLOSE_MASK;
+ if (IS_ENABLED(CONFIG_STM32MP13X))
+ return STM32_OTP_STM32MP13X_CLOSE_MASK;
- if (IS_ENABLED(CONFIG_STM32MP15x))
- return STM32_OTP_STM32MP15x_CLOSE_MASK;
+ if (IS_ENABLED(CONFIG_STM32MP15X))
+ return STM32_OTP_STM32MP15X_CLOSE_MASK;
}
static int get_misc_dev(struct udevice **dev)
diff --git a/arch/arm/mach-stm32mp/cmd_stm32prog/cmd_stm32prog.c b/arch/arm/mach-stm32mp/cmd_stm32prog/cmd_stm32prog.c
index 2411bcf..adee6e0 100644
--- a/arch/arm/mach-stm32mp/cmd_stm32prog/cmd_stm32prog.c
+++ b/arch/arm/mach-stm32mp/cmd_stm32prog/cmd_stm32prog.c
@@ -4,6 +4,7 @@
*/
#include <common.h>
+#include <bootm.h>
#include <command.h>
#include <dfu.h>
#include <image.h>
@@ -124,35 +125,41 @@
char boot_addr_start[20];
char dtb_addr[20];
char initrd_addr[40];
- char *bootm_argv[5] = {
- "bootm", boot_addr_start, "-", dtb_addr, NULL
- };
+ char *fdt_arg, *initrd_arg;
const void *uimage = (void *)data->uimage;
const void *dtb = (void *)data->dtb;
const void *initrd = (void *)data->initrd;
+ struct bootm_info bmi;
+ fdt_arg = dtb_addr;
if (!dtb)
- bootm_argv[3] = env_get("fdtcontroladdr");
+ fdt_arg = env_get("fdtcontroladdr");
else
- snprintf(dtb_addr, sizeof(dtb_addr) - 1,
- "0x%p", dtb);
+ snprintf(dtb_addr, sizeof(dtb_addr) - 1, "0x%p", dtb);
snprintf(boot_addr_start, sizeof(boot_addr_start) - 1,
"0x%p", uimage);
+ initrd_arg = NULL;
if (initrd) {
- snprintf(initrd_addr, sizeof(initrd_addr) - 1, "0x%p:0x%zx",
- initrd, data->initrd_size);
- bootm_argv[2] = initrd_addr;
+ snprintf(initrd_addr, sizeof(initrd_addr) - 1,
+ "0x%p:0x%zx", initrd, data->initrd_size);
+ initrd_arg = initrd_addr;
}
- printf("Booting kernel at %s %s %s...\n\n\n",
- boot_addr_start, bootm_argv[2], bootm_argv[3]);
+ printf("Booting kernel at %s %s %s...\n\n\n", boot_addr_start,
+ initrd_arg ?: "-", fdt_arg);
+
+ bootm_init(&bmi);
+ bmi.addr_img = boot_addr_start;
+ bmi.conf_ramdisk = initrd_arg;
+ bmi.conf_fdt = fdt_arg;
+
/* Try bootm for legacy and FIT format image */
if (genimg_get_format(uimage) != IMAGE_FORMAT_INVALID)
- do_bootm(cmdtp, 0, 4, bootm_argv);
+ bootm_run(&bmi);
else if (IS_ENABLED(CONFIG_CMD_BOOTZ))
- do_bootz(cmdtp, 0, 4, bootm_argv);
+ bootz_run(&bmi);
}
if (data->script)
cmd_source_script(data->script, NULL, NULL);
diff --git a/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.h b/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.h
index ae4bd88..bf184c8 100644
--- a/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.h
+++ b/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.h
@@ -23,12 +23,20 @@
#define CMD_SIZE 512
/* SMC is only supported in SPMIN for STM32MP15x */
-#ifdef CONFIG_STM32MP15x
+#ifdef CONFIG_STM32MP15X
#define OTP_SIZE_SMC 1024
#else
#define OTP_SIZE_SMC 0
#endif
-#define OTP_SIZE_TA 776
+/* size of the OTP struct in NVMEM PTA */
+#define _OTP_SIZE_TA(otp) (((otp) * 2 + 2) * 4)
+#if defined(CONFIG_STM32MP13X) || defined(CONFIG_STM32MP15X)
+/* STM32MP1 with BSEC2 */
+#define OTP_SIZE_TA _OTP_SIZE_TA(96)
+#else
+/* STM32MP2 with BSEC3 */
+#define OTP_SIZE_TA _OTP_SIZE_TA(368)
+#endif
#define PMIC_SIZE 8
enum stm32prog_target {
diff --git a/arch/arm/mach-stm32mp/include/mach/stm32.h b/arch/arm/mach-stm32mp/include/mach/stm32.h
index 46d4698..6eb85ba 100644
--- a/arch/arm/mach-stm32mp/include/mach/stm32.h
+++ b/arch/arm/mach-stm32mp/include/mach/stm32.h
@@ -71,11 +71,11 @@
* only address used before device tree parsing
*/
-#if defined(CONFIG_STM32MP15x) || defined(CONFIG_STM32MP13x)
+#if defined(CONFIG_STM32MP15X) || defined(CONFIG_STM32MP13X)
#define STM32_RCC_BASE 0x50000000
#define STM32_PWR_BASE 0x50001000
#define STM32_SYSCFG_BASE 0x50020000
-#ifdef CONFIG_STM32MP15x
+#ifdef CONFIG_STM32MP15X
#define STM32_DBGMCU_BASE 0x50081000
#endif
#define STM32_FMC2_BASE 0x58002000
@@ -88,11 +88,11 @@
#define STM32_STGEN_BASE 0x5C008000
#define STM32_TAMP_BASE 0x5C00A000
-#ifdef CONFIG_STM32MP15x
+#ifdef CONFIG_STM32MP15X
#define STM32_USART1_BASE 0x5C000000
#define STM32_USART2_BASE 0x4000E000
#endif
-#ifdef CONFIG_STM32MP13x
+#ifdef CONFIG_STM32MP13X
#define STM32_USART1_BASE 0x4c000000
#define STM32_USART2_BASE 0x4c001000
#endif
@@ -107,7 +107,7 @@
#define STM32_SDMMC2_BASE 0x58007000
#define STM32_SDMMC3_BASE 0x48004000
-#ifdef CONFIG_STM32MP15x
+#ifdef CONFIG_STM32MP15X
#define STM32_SYSRAM_BASE 0x2FFC0000
#define STM32_SYSRAM_SIZE SZ_256K
#endif
@@ -129,7 +129,7 @@
/* TAMP registers */
#define TAMP_BACKUP_REGISTER(x) (STM32_TAMP_BASE + 0x100 + 4 * x)
-#ifdef CONFIG_STM32MP15x
+#ifdef CONFIG_STM32MP15X
#define TAMP_BACKUP_MAGIC_NUMBER TAMP_BACKUP_REGISTER(4)
#define TAMP_BACKUP_BRANCH_ADDRESS TAMP_BACKUP_REGISTER(5)
#define TAMP_FWU_BOOT_INFO_REG TAMP_BACKUP_REGISTER(10)
@@ -149,7 +149,7 @@
#define TAMP_COPRO_STATE_CRASH 5
#endif
-#ifdef CONFIG_STM32MP13x
+#ifdef CONFIG_STM32MP13X
#define TAMP_BOOTCOUNT TAMP_BACKUP_REGISTER(31)
#define TAMP_BOOT_CONTEXT TAMP_BACKUP_REGISTER(30)
#endif
@@ -157,7 +157,7 @@
#endif /* __ASSEMBLY__ */
#endif /* CONFIG_STM32MP15X || CONFIG_STM32MP13X */
-#if CONFIG_STM32MP25X
+#ifdef CONFIG_STM32MP25X
#define STM32_RCC_BASE 0x44200000
#define STM32_TAMP_BASE 0x46010000
@@ -181,14 +181,14 @@
#define STM32_BSEC_LOCK(id) (STM32_BSEC_LOCK_OFFSET + (id) * 4)
/* BSEC OTP index */
-#ifdef CONFIG_STM32MP15x
+#ifdef CONFIG_STM32MP15X
#define BSEC_OTP_RPN 1
#define BSEC_OTP_SERIAL 13
#define BSEC_OTP_PKG 16
#define BSEC_OTP_MAC 57
#define BSEC_OTP_BOARD 59
#endif
-#ifdef CONFIG_STM32MP13x
+#ifdef CONFIG_STM32MP13X
#define BSEC_OTP_RPN 1
#define BSEC_OTP_SERIAL 13
#define BSEC_OTP_MAC 57
@@ -197,7 +197,9 @@
#ifdef CONFIG_STM32MP25X
#define BSEC_OTP_SERIAL 5
#define BSEC_OTP_RPN 9
-#define BSEC_OTP_PKG 246
+#define BSEC_OTP_PKG 122
+#define BSEC_OTP_BOARD 246
+#define BSEC_OTP_MAC 247
#endif
#ifndef __ASSEMBLY__
diff --git a/arch/arm/mach-stm32mp/include/mach/sys_proto.h b/arch/arm/mach-stm32mp/include/mach/sys_proto.h
index 83388fd..2a65efc 100644
--- a/arch/arm/mach-stm32mp/include/mach/sys_proto.h
+++ b/arch/arm/mach-stm32mp/include/mach/sys_proto.h
@@ -97,6 +97,7 @@
int get_eth_nb(void);
int setup_mac_address(void);
+int setup_serial_number(void);
/* board power management : configure vddcore according OPP */
void board_vddcore_init(u32 voltage_mv);
diff --git a/arch/arm/mach-stm32mp/soc.c b/arch/arm/mach-stm32mp/soc.c
new file mode 100644
index 0000000..fa56b0d
--- /dev/null
+++ b/arch/arm/mach-stm32mp/soc.c
@@ -0,0 +1,118 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR BSD-3-Clause
+/*
+ * Copyright (C) 2024, STMicroelectronics - All Rights Reserved
+ */
+
+#include <env.h>
+#include <misc.h>
+#include <net.h>
+#include <asm/arch/sys_proto.h>
+#include <dm/device.h>
+#include <dm/uclass.h>
+
+/* max: 8 OTP for 5 mac address on stm32mp2*/
+#define MAX_NB_OTP 8
+
+/* used when CONFIG_DISPLAY_CPUINFO is activated */
+int print_cpuinfo(void)
+{
+ char name[SOC_NAME_SIZE];
+
+ get_soc_name(name);
+ printf("CPU: %s\n", name);
+
+ return 0;
+}
+
+int setup_serial_number(void)
+{
+ char serial_string[25];
+ u32 otp[3] = {0, 0, 0 };
+ struct udevice *dev;
+ int ret;
+
+ if (env_get("serial#"))
+ return 0;
+
+ ret = uclass_get_device_by_driver(UCLASS_MISC,
+ DM_DRIVER_GET(stm32mp_bsec),
+ &dev);
+ if (ret)
+ return ret;
+
+ ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_SERIAL),
+ otp, sizeof(otp));
+ if (ret < 0)
+ return ret;
+
+ sprintf(serial_string, "%08X%08X%08X", otp[0], otp[1], otp[2]);
+ env_set("serial#", serial_string);
+
+ return 0;
+}
+
+/*
+ * If there is no MAC address in the environment, then it will be initialized
+ * (silently) from the value in the OTP.
+ */
+__weak int setup_mac_address(void)
+{
+ int ret;
+ int i;
+ u32 otp[MAX_NB_OTP];
+ uchar enetaddr[ARP_HLEN];
+ struct udevice *dev;
+ int nb_eth, nb_otp, index;
+
+ if (!IS_ENABLED(CONFIG_NET))
+ return 0;
+
+ nb_eth = get_eth_nb();
+ if (!nb_eth)
+ return 0;
+
+ /* 6 bytes for each MAC addr and 4 bytes for each OTP */
+ nb_otp = DIV_ROUND_UP(ARP_HLEN * nb_eth, 4);
+ if (nb_otp > MAX_NB_OTP) {
+ log_err("invalid number of OTP = %d, max = %d\n", nb_otp, MAX_NB_OTP);
+ return -EINVAL;
+ }
+
+ ret = uclass_get_device_by_driver(UCLASS_MISC,
+ DM_DRIVER_GET(stm32mp_bsec),
+ &dev);
+ if (ret)
+ return ret;
+
+ ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_MAC), otp, 4 * nb_otp);
+ if (ret < 0)
+ return ret;
+
+ for (index = 0; index < nb_eth; index++) {
+ /* MAC already in environment */
+ if (eth_env_get_enetaddr_by_index("eth", index, enetaddr))
+ continue;
+
+ for (i = 0; i < ARP_HLEN; i++)
+ enetaddr[i] = ((uint8_t *)&otp)[i + ARP_HLEN * index];
+
+ /* skip FF:FF:FF:FF:FF:FF */
+ if (is_broadcast_ethaddr(enetaddr))
+ continue;
+
+ if (!is_valid_ethaddr(enetaddr)) {
+ log_err("invalid MAC address %d in OTP %pM\n",
+ index, enetaddr);
+ return -EINVAL;
+ }
+ log_debug("OTP MAC address %d = %pM\n", index, enetaddr);
+ ret = eth_env_set_enetaddr_by_index("eth", index, enetaddr);
+ if (ret) {
+ log_err("Failed to set mac address %pM from OTP: %d\n",
+ enetaddr, ret);
+ return ret;
+ }
+ }
+
+ return 0;
+}
diff --git a/arch/arm/mach-stm32mp/stm32mp1/Makefile b/arch/arm/mach-stm32mp/stm32mp1/Makefile
index 94c7724..8571487 100644
--- a/arch/arm/mach-stm32mp/stm32mp1/Makefile
+++ b/arch/arm/mach-stm32mp/stm32mp1/Makefile
@@ -5,8 +5,8 @@
obj-y += cpu.o
-obj-$(CONFIG_STM32MP13x) += stm32mp13x.o
-obj-$(CONFIG_STM32MP15x) += stm32mp15x.o
+obj-$(CONFIG_STM32MP13X) += stm32mp13x.o
+obj-$(CONFIG_STM32MP15X) += stm32mp15x.o
obj-$(CONFIG_STM32_ECDSA_VERIFY) += ecdsa_romapi.o
ifdef CONFIG_SPL_BUILD
diff --git a/arch/arm/mach-stm32mp/stm32mp1/cpu.c b/arch/arm/mach-stm32mp/stm32mp1/cpu.c
index 55574fd..524778f 100644
--- a/arch/arm/mach-stm32mp/stm32mp1/cpu.c
+++ b/arch/arm/mach-stm32mp/stm32mp1/cpu.c
@@ -14,8 +14,8 @@
#include <log.h>
#include <lmb.h>
#include <misc.h>
-#include <net.h>
#include <spl.h>
+#include <asm/cache.h>
#include <asm/io.h>
#include <asm/arch/stm32.h>
#include <asm/arch/sys_proto.h>
@@ -158,17 +158,6 @@
dcache_enable();
}
-/* used when CONFIG_DISPLAY_CPUINFO is activated */
-int print_cpuinfo(void)
-{
- char name[SOC_NAME_SIZE];
-
- get_soc_name(name);
- printf("CPU: %s\n", name);
-
- return 0;
-}
-
static void setup_boot_mode(void)
{
const u32 serial_addr[] = {
@@ -291,89 +280,6 @@
clrsetbits_le32(TAMP_BOOT_CONTEXT, TAMP_BOOT_FORCED_MASK, BOOT_NORMAL);
}
-/*
- * If there is no MAC address in the environment, then it will be initialized
- * (silently) from the value in the OTP.
- */
-__weak int setup_mac_address(void)
-{
- int ret;
- int i;
- u32 otp[3];
- uchar enetaddr[6];
- struct udevice *dev;
- int nb_eth, nb_otp, index;
-
- if (!IS_ENABLED(CONFIG_NET))
- return 0;
-
- nb_eth = get_eth_nb();
-
- /* 6 bytes for each MAC addr and 4 bytes for each OTP */
- nb_otp = DIV_ROUND_UP(6 * nb_eth, 4);
-
- ret = uclass_get_device_by_driver(UCLASS_MISC,
- DM_DRIVER_GET(stm32mp_bsec),
- &dev);
- if (ret)
- return ret;
-
- ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_MAC), otp, 4 * nb_otp);
- if (ret < 0)
- return ret;
-
- for (index = 0; index < nb_eth; index++) {
- /* MAC already in environment */
- if (eth_env_get_enetaddr_by_index("eth", index, enetaddr))
- continue;
-
- for (i = 0; i < 6; i++)
- enetaddr[i] = ((uint8_t *)&otp)[i + 6 * index];
-
- if (!is_valid_ethaddr(enetaddr)) {
- log_err("invalid MAC address %d in OTP %pM\n",
- index, enetaddr);
- return -EINVAL;
- }
- log_debug("OTP MAC address %d = %pM\n", index, enetaddr);
- ret = eth_env_set_enetaddr_by_index("eth", index, enetaddr);
- if (ret) {
- log_err("Failed to set mac address %pM from OTP: %d\n",
- enetaddr, ret);
- return ret;
- }
- }
-
- return 0;
-}
-
-static int setup_serial_number(void)
-{
- char serial_string[25];
- u32 otp[3] = {0, 0, 0 };
- struct udevice *dev;
- int ret;
-
- if (env_get("serial#"))
- return 0;
-
- ret = uclass_get_device_by_driver(UCLASS_MISC,
- DM_DRIVER_GET(stm32mp_bsec),
- &dev);
- if (ret)
- return ret;
-
- ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_SERIAL),
- otp, sizeof(otp));
- if (ret < 0)
- return ret;
-
- sprintf(serial_string, "%08X%08X%08X", otp[0], otp[1], otp[2]);
- env_set("serial#", serial_string);
-
- return 0;
-}
-
__weak void stm32mp_misc_init(void)
{
}
diff --git a/arch/arm/mach-stm32mp/stm32mp1/fdt.c b/arch/arm/mach-stm32mp/stm32mp1/fdt.c
index de5c5a5..d0b6c3c 100644
--- a/arch/arm/mach-stm32mp/stm32mp1/fdt.c
+++ b/arch/arm/mach-stm32mp/stm32mp1/fdt.c
@@ -270,12 +270,12 @@
int offset, shift;
u32 addr, status, decprot[ETZPC_DECPROT_NB];
- if (IS_ENABLED(CONFIG_STM32MP13x)) {
+ if (IS_ENABLED(CONFIG_STM32MP13X)) {
array = stm32mp13_ip_addr;
array_size = ARRAY_SIZE(stm32mp13_ip_addr);
}
- if (IS_ENABLED(CONFIG_STM32MP15x)) {
+ if (IS_ENABLED(CONFIG_STM32MP15X)) {
array = stm32mp15_ip_addr;
array_size = ARRAY_SIZE(stm32mp15_ip_addr);
}
@@ -491,10 +491,10 @@
cpu = get_cpu_type();
get_soc_name(name);
- if (IS_ENABLED(CONFIG_STM32MP13x))
+ if (IS_ENABLED(CONFIG_STM32MP13X))
stm32mp13_fdt_fixup(blob, soc, cpu, name);
- if (IS_ENABLED(CONFIG_STM32MP15x)) {
+ if (IS_ENABLED(CONFIG_STM32MP15X)) {
stm32mp15_fdt_fixup(blob, soc, cpu, name);
/*
@@ -505,7 +505,7 @@
* under CONFIG_STM32MP15x_STM32IMAGE only for compatibility
* when FIP is not used by TF-A
*/
- if (IS_ENABLED(CONFIG_STM32MP15x_STM32IMAGE) &&
+ if (IS_ENABLED(CONFIG_STM32MP15X_STM32IMAGE) &&
!tee_find_device(NULL, NULL, NULL, NULL))
stm32_fdt_disable_optee(blob);
}
diff --git a/arch/arm/mach-stm32mp/stm32mp2/cpu.c b/arch/arm/mach-stm32mp/stm32mp2/cpu.c
index f43d1aa..9530aa8 100644
--- a/arch/arm/mach-stm32mp/stm32mp2/cpu.c
+++ b/arch/arm/mach-stm32mp/stm32mp2/cpu.c
@@ -67,19 +67,11 @@
dcache_enable();
}
-/* used when CONFIG_DISPLAY_CPUINFO is activated */
-int print_cpuinfo(void)
-{
- char name[SOC_NAME_SIZE];
-
- get_soc_name(name);
- printf("CPU: %s\n", name);
-
- return 0;
-}
-
int arch_misc_init(void)
{
+ setup_serial_number();
+ setup_mac_address();
+
return 0;
}
diff --git a/arch/arm/mach-stm32mp/stm32mp2/stm32mp25x.c b/arch/arm/mach-stm32mp/stm32mp2/stm32mp25x.c
index 4b2f70a..7f896a0 100644
--- a/arch/arm/mach-stm32mp/stm32mp2/stm32mp25x.c
+++ b/arch/arm/mach-stm32mp/stm32mp2/stm32mp25x.c
@@ -167,6 +167,9 @@
case CPU_REV1:
cpu_r = "A";
break;
+ case CPU_REV2:
+ cpu_r = "B";
+ break;
default:
break;
}
diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
index a4a8d8e..fe89aec 100644
--- a/arch/arm/mach-sunxi/Kconfig
+++ b/arch/arm/mach-sunxi/Kconfig
@@ -161,6 +161,23 @@
for all other SoCs, so the content of the SRAM_VER_REG becomes
irrelevant there, and we can use the same code.
+config SUNXI_BL31_BASE
+ hex
+ default 0x00044000 if MACH_SUN50I || MACH_SUN50I_H5
+ default 0x00104000 if MACH_SUN50I_H6
+ default 0x40000000 if MACH_SUN50I_H616
+ default 0x0
+ help
+ Address where BL31 (TF-A) is loaded, or zero if BL31 is not used.
+
+config SUNXI_SCP_BASE
+ hex
+ default 0x00050000 if MACH_SUN50I || MACH_SUN50I_H5
+ default 0x00114000 if MACH_SUN50I_H6
+ default 0x0
+ help
+ Address where SCP firmware is loaded, or zero if it is not used.
+
config SUNXI_A64_TIMER_ERRATUM
bool
@@ -182,7 +199,7 @@
config SUN50I_GEN_H6
bool
select FIT
- select SPL_LOAD_FIT
+ select SPL_LOAD_FIT if SPL
select MMC_SUNXI_HAS_NEW_MODE
select SUPPORT_SPL
---help---
@@ -272,7 +289,7 @@
select ARCH_SUPPORT_PSCI
select SPL_ARMV7_SET_CORTEX_SMPEN
select DRAM_SUN6I
- select SPL_I2C
+ select SPL_I2C if SPL
select SUN6I_PRCM
select SUNXI_GEN_SUN6I
select SUPPORT_SPL
@@ -300,7 +317,7 @@
select CPU_V7_HAS_VIRT
select ARCH_SUPPORT_PSCI
select DRAM_SUN8I_A23
- select SPL_I2C
+ select SPL_I2C if SPL
select SUNXI_GEN_SUN6I
select SUPPORT_SPL
select SYS_I2C_SUN8I_RSB
@@ -313,7 +330,7 @@
select CPU_V7_HAS_VIRT
select ARCH_SUPPORT_PSCI
select DRAM_SUN8I_A33
- select SPL_I2C
+ select SPL_I2C if SPL
select SUNXI_GEN_SUN6I
select SUPPORT_SPL
select SYS_I2C_SUN8I_RSB
@@ -323,7 +340,7 @@
bool "sun8i (Allwinner A83T)"
select CPU_V7A
select DRAM_SUN8I_A83T
- select SPL_I2C
+ select SPL_I2C if SPL
select SUNXI_GEN_SUN6I
select MMC_SUNXI_HAS_NEW_MODE
select MMC_SUNXI_HAS_MODE_SWITCH
@@ -382,7 +399,7 @@
select CPU_V7A
select SPL_ARMV7_SET_CORTEX_SMPEN
select DRAM_SUN9I
- select SPL_I2C
+ select SPL_I2C if SPL
select SUN6I_PRCM
select SUNXI_GEN_SUN6I
select SUPPORT_SPL
@@ -398,7 +415,7 @@
select SUNXI_DRAM_DW
select SUNXI_DRAM_DW_32BIT
select FIT
- select SPL_LOAD_FIT
+ select SPL_LOAD_FIT if SPL
select SUNXI_A64_TIMER_ERRATUM
config MACH_SUN50I_H5
@@ -407,7 +424,7 @@
select MACH_SUNXI_H3_H5
select MMC_SUNXI_HAS_NEW_MODE
select FIT
- select SPL_LOAD_FIT
+ select SPL_LOAD_FIT if SPL
config MACH_SUN50I_H6
bool "sun50i (Allwinner H6)"
diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c
index 11a4941..f4dbb2a 100644
--- a/arch/arm/mach-sunxi/board.c
+++ b/arch/arm/mach-sunxi/board.c
@@ -9,7 +9,6 @@
* Some init for sunxi platform.
*/
-#include <common.h>
#include <cpu_func.h>
#include <init.h>
#include <log.h>
diff --git a/arch/arm/mach-sunxi/clock.c b/arch/arm/mach-sunxi/clock.c
index da3a0eb..b6c68c9 100644
--- a/arch/arm/mach-sunxi/clock.c
+++ b/arch/arm/mach-sunxi/clock.c
@@ -7,7 +7,6 @@
* (C) Copyright 2013 Luke Kenneth Casson Leighton <lkcl@lkcl.net>
*/
-#include <common.h>
#include <asm/io.h>
#include <asm/arch/clock.h>
#include <asm/arch/prcm.h>
diff --git a/arch/arm/mach-sunxi/clock_sun4i.c b/arch/arm/mach-sunxi/clock_sun4i.c
index 4716097..8f1d1b6 100644
--- a/arch/arm/mach-sunxi/clock_sun4i.c
+++ b/arch/arm/mach-sunxi/clock_sun4i.c
@@ -9,7 +9,6 @@
* (C) Copyright 2013 Luke Kenneth Casson Leighton <lkcl@lkcl.net>
*/
-#include <common.h>
#include <asm/io.h>
#include <asm/arch/clock.h>
#include <asm/arch/sys_proto.h>
diff --git a/arch/arm/mach-sunxi/clock_sun50i_h6.c b/arch/arm/mach-sunxi/clock_sun50i_h6.c
index bea91c7..dac3663 100644
--- a/arch/arm/mach-sunxi/clock_sun50i_h6.c
+++ b/arch/arm/mach-sunxi/clock_sun50i_h6.c
@@ -1,4 +1,3 @@
-#include <common.h>
#include <asm/io.h>
#include <asm/arch/cpu.h>
#include <asm/arch/clock.h>
diff --git a/arch/arm/mach-sunxi/clock_sun6i.c b/arch/arm/mach-sunxi/clock_sun6i.c
index 6bd75a1..aad9df2 100644
--- a/arch/arm/mach-sunxi/clock_sun6i.c
+++ b/arch/arm/mach-sunxi/clock_sun6i.c
@@ -9,7 +9,6 @@
* (C) Copyright 2013 Luke Kenneth Casson Leighton <lkcl@lkcl.net>
*/
-#include <common.h>
#include <asm/io.h>
#include <asm/arch/clock.h>
#include <asm/arch/prcm.h>
diff --git a/arch/arm/mach-sunxi/clock_sun8i_a83t.c b/arch/arm/mach-sunxi/clock_sun8i_a83t.c
index 31e4281..198fe9d 100644
--- a/arch/arm/mach-sunxi/clock_sun8i_a83t.c
+++ b/arch/arm/mach-sunxi/clock_sun8i_a83t.c
@@ -9,7 +9,6 @@
* (C) Copyright 2015 Vishnu Patekar <vishnupatekar0510@gmail.com>
*/
-#include <common.h>
#include <asm/io.h>
#include <asm/arch/clock.h>
#include <asm/arch/prcm.h>
diff --git a/arch/arm/mach-sunxi/clock_sun9i.c b/arch/arm/mach-sunxi/clock_sun9i.c
index 8ba4802..edaff9a 100644
--- a/arch/arm/mach-sunxi/clock_sun9i.c
+++ b/arch/arm/mach-sunxi/clock_sun9i.c
@@ -9,7 +9,6 @@
* Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
*/
-#include <common.h>
#include <asm/io.h>
#include <asm/arch/clock.h>
#include <asm/arch/prcm.h>
diff --git a/arch/arm/mach-sunxi/cpu_info.c b/arch/arm/mach-sunxi/cpu_info.c
index 7fecc3b..310dca0 100644
--- a/arch/arm/mach-sunxi/cpu_info.c
+++ b/arch/arm/mach-sunxi/cpu_info.c
@@ -5,7 +5,6 @@
* Tom Cubie <tangliang@allwinnertech.com>
*/
-#include <common.h>
#include <init.h>
#include <asm/io.h>
#include <asm/arch/cpu.h>
diff --git a/arch/arm/mach-sunxi/dram_helpers.c b/arch/arm/mach-sunxi/dram_helpers.c
index cdf2750..4a867df 100644
--- a/arch/arm/mach-sunxi/dram_helpers.c
+++ b/arch/arm/mach-sunxi/dram_helpers.c
@@ -5,8 +5,9 @@
* (C) Copyright 2015 Hans de Goede <hdegoede@redhat.com>
*/
-#include <common.h>
+#include <config.h>
#include <time.h>
+#include <vsprintf.h>
#include <asm/barriers.h>
#include <asm/io.h>
#include <asm/arch/dram.h>
diff --git a/arch/arm/mach-sunxi/dram_sun4i.c b/arch/arm/mach-sunxi/dram_sun4i.c
index 80a6c4b..2cce381 100644
--- a/arch/arm/mach-sunxi/dram_sun4i.c
+++ b/arch/arm/mach-sunxi/dram_sun4i.c
@@ -20,7 +20,6 @@
* rather undocumented and full of magic.
*/
-#include <common.h>
#include <init.h>
#include <asm/io.h>
#include <asm/arch/clock.h>
diff --git a/arch/arm/mach-sunxi/dram_sun50i_h6.c b/arch/arm/mach-sunxi/dram_sun50i_h6.c
index bff2e42..e7862bd 100644
--- a/arch/arm/mach-sunxi/dram_sun50i_h6.c
+++ b/arch/arm/mach-sunxi/dram_sun50i_h6.c
@@ -5,7 +5,6 @@
* (C) Copyright 2017 Icenowy Zheng <icenowy@aosc.io>
*
*/
-#include <common.h>
#include <init.h>
#include <log.h>
#include <asm/io.h>
@@ -15,7 +14,6 @@
#include <asm/arch/prcm.h>
#include <linux/bitops.h>
#include <linux/delay.h>
-#include <linux/kconfig.h>
/*
* The DRAM controller structure on H6 is similar to the ones on A23/A80:
diff --git a/arch/arm/mach-sunxi/dram_sun50i_h616.c b/arch/arm/mach-sunxi/dram_sun50i_h616.c
index c5c1331..37c139e 100644
--- a/arch/arm/mach-sunxi/dram_sun50i_h616.c
+++ b/arch/arm/mach-sunxi/dram_sun50i_h616.c
@@ -12,7 +12,6 @@
* (C) Copyright 2020 Jernej Skrabec <jernej.skrabec@siol.net>
*
*/
-#include <common.h>
#include <init.h>
#include <log.h>
#include <asm/io.h>
@@ -22,7 +21,6 @@
#include <asm/arch/prcm.h>
#include <linux/bitops.h>
#include <linux/delay.h>
-#include <linux/kconfig.h>
enum {
MBUS_QOS_LOWEST = 0,
diff --git a/arch/arm/mach-sunxi/dram_sun6i.c b/arch/arm/mach-sunxi/dram_sun6i.c
index 0590110..c023845 100644
--- a/arch/arm/mach-sunxi/dram_sun6i.c
+++ b/arch/arm/mach-sunxi/dram_sun6i.c
@@ -9,7 +9,6 @@
*
* (C) Copyright 2014 Hans de Goede <hdegoede@redhat.com>
*/
-#include <common.h>
#include <errno.h>
#include <init.h>
#include <asm/io.h>
diff --git a/arch/arm/mach-sunxi/dram_sun8i_a23.c b/arch/arm/mach-sunxi/dram_sun8i_a23.c
index 056cb03..1c3c6d8 100644
--- a/arch/arm/mach-sunxi/dram_sun8i_a23.c
+++ b/arch/arm/mach-sunxi/dram_sun8i_a23.c
@@ -19,7 +19,6 @@
* This may be used as a (possible) reference for future work / cleanups.
*/
-#include <common.h>
#include <errno.h>
#include <init.h>
#include <asm/io.h>
diff --git a/arch/arm/mach-sunxi/dram_sun8i_a33.c b/arch/arm/mach-sunxi/dram_sun8i_a33.c
index 367b740..0d08b6a 100644
--- a/arch/arm/mach-sunxi/dram_sun8i_a33.c
+++ b/arch/arm/mach-sunxi/dram_sun8i_a33.c
@@ -7,7 +7,6 @@
* (C) Copyright 2015 Vishnu Patekar <vishnupatekar0510@gmail.com>
* (C) Copyright 2015 Hans de Goede <hdegoede@redhat.com>
*/
-#include <common.h>
#include <errno.h>
#include <init.h>
#include <asm/io.h>
diff --git a/arch/arm/mach-sunxi/dram_sun8i_a83t.c b/arch/arm/mach-sunxi/dram_sun8i_a83t.c
index a3f833d..ef83332 100644
--- a/arch/arm/mach-sunxi/dram_sun8i_a83t.c
+++ b/arch/arm/mach-sunxi/dram_sun8i_a83t.c
@@ -7,7 +7,6 @@
* (C) Copyright 2015 Vishnu Patekar <vishnupatekar0510@gmail.com>
* (C) Copyright 2015 Hans de Goede <hdegoede@redhat.com>
*/
-#include <common.h>
#include <errno.h>
#include <init.h>
#include <asm/io.h>
diff --git a/arch/arm/mach-sunxi/dram_sun9i.c b/arch/arm/mach-sunxi/dram_sun9i.c
index 14be212..002b6df 100644
--- a/arch/arm/mach-sunxi/dram_sun9i.c
+++ b/arch/arm/mach-sunxi/dram_sun9i.c
@@ -10,7 +10,6 @@
* Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <init.h>
diff --git a/arch/arm/mach-sunxi/dram_suniv.c b/arch/arm/mach-sunxi/dram_suniv.c
index 9e583e1..640f872 100644
--- a/arch/arm/mach-sunxi/dram_suniv.c
+++ b/arch/arm/mach-sunxi/dram_suniv.c
@@ -9,7 +9,7 @@
* Copyright(c) 2007-2018 Jianjun Jiang <8192542@qq.com>
*/
-#include <common.h>
+#include <config.h>
#include <asm/io.h>
#include <asm/arch/clock.h>
#include <asm/arch/dram.h>
diff --git a/arch/arm/mach-sunxi/dram_sunxi_dw.c b/arch/arm/mach-sunxi/dram_sunxi_dw.c
index 9382d3d..3bfcc63 100644
--- a/arch/arm/mach-sunxi/dram_sunxi_dw.c
+++ b/arch/arm/mach-sunxi/dram_sunxi_dw.c
@@ -8,7 +8,6 @@
* (C) Copyright 2015 Hans de Goede <hdegoede@redhat.com>
* (C) Copyright 2015 Jens Kuske <jenskuske@gmail.com>
*/
-#include <common.h>
#include <init.h>
#include <log.h>
#include <asm/io.h>
@@ -16,7 +15,6 @@
#include <asm/arch/dram.h>
#include <asm/arch/cpu.h>
#include <linux/delay.h>
-#include <linux/kconfig.h>
static void mctl_phy_init(u32 val)
{
diff --git a/arch/arm/mach-sunxi/gtbus_sun9i.c b/arch/arm/mach-sunxi/gtbus_sun9i.c
index 5624621..a058fea 100644
--- a/arch/arm/mach-sunxi/gtbus_sun9i.c
+++ b/arch/arm/mach-sunxi/gtbus_sun9i.c
@@ -6,7 +6,6 @@
* Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
*/
-#include <common.h>
#include <asm/io.h>
#include <asm/arch/cpu.h>
#include <asm/arch/gtbus_sun9i.h>
diff --git a/arch/arm/mach-sunxi/pmic_bus.c b/arch/arm/mach-sunxi/pmic_bus.c
index 8e7625f..87df312 100644
--- a/arch/arm/mach-sunxi/pmic_bus.c
+++ b/arch/arm/mach-sunxi/pmic_bus.c
@@ -9,7 +9,6 @@
*/
#include <axp_pmic.h>
-#include <common.h>
#include <dm.h>
#include <asm/arch/p2wi.h>
#include <asm/arch/rsb.h>
diff --git a/arch/arm/mach-sunxi/prcm.c b/arch/arm/mach-sunxi/prcm.c
index 71a2e44..ef7c46e 100644
--- a/arch/arm/mach-sunxi/prcm.c
+++ b/arch/arm/mach-sunxi/prcm.c
@@ -13,7 +13,6 @@
* Tom Cubie <tangliang@allwinnertech.com>
*/
-#include <common.h>
#include <errno.h>
#include <asm/io.h>
#include <asm/arch/cpu.h>
diff --git a/arch/arm/mach-sunxi/spl_spi_sunxi.c b/arch/arm/mach-sunxi/spl_spi_sunxi.c
index 267cb0b..72faa71 100644
--- a/arch/arm/mach-sunxi/spl_spi_sunxi.c
+++ b/arch/arm/mach-sunxi/spl_spi_sunxi.c
@@ -3,7 +3,6 @@
* Copyright (C) 2016 Siarhei Siamashka <siarhei.siamashka@gmail.com>
*/
-#include <common.h>
#include <image.h>
#include <log.h>
#include <spl.h>
diff --git a/arch/arm/mach-sunxi/timer.c b/arch/arm/mach-sunxi/timer.c
index 9a6f6c0..1bbfad5 100644
--- a/arch/arm/mach-sunxi/timer.c
+++ b/arch/arm/mach-sunxi/timer.c
@@ -5,7 +5,6 @@
* Tom Cubie <tangliang@allwinnertech.com>
*/
-#include <common.h>
#include <init.h>
#include <time.h>
#include <asm/global_data.h>
diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
index f273778..05e194d 100644
--- a/arch/arm/mach-tegra/Kconfig
+++ b/arch/arm/mach-tegra/Kconfig
@@ -33,9 +33,6 @@
config TEGRA_MC
bool
-config TEGRA_PINCTRL
- bool
-
config TEGRA_PMC
bool
@@ -58,10 +55,10 @@
select DM_SPI
select DM_SPI_FLASH
select MISC
+ select MTD
select OF_CONTROL
select SPI
select SYSRESET
- select SPL_SYSRESET if SPL
select SYSRESET_TEGRA
imply CMD_DM
imply CRC32_VERIFY
@@ -76,9 +73,15 @@
bool "Tegra 32-bit common options"
select BINMAN
select CPU_V7A
+ select PINCTRL
+ select PINCTRL_TEGRA
select SPL
select SPL_BOARD_INIT if SPL
+ select SPL_DM if SPL
+ select SPL_PINCTRL if SPL
+ select SPL_PINCTRL_TEGRA if SPL
select SPL_SKIP_LOWLEVEL_INIT_ONLY if SPL
+ select SPL_SYSRESET if SPL
select SUPPORT_SPL
select TIMER
select TEGRA_CLKRST
@@ -87,7 +90,6 @@
select TEGRA_GP_PADCTRL
select TEGRA_MC
select TEGRA_NO_BPMP
- select TEGRA_PINCTRL
select TEGRA_PMC
select TEGRA_TIMER
@@ -134,6 +136,8 @@
config TEGRA210
bool "Tegra210 family"
select GICV2
+ select PINCTRL
+ select PINCTRL_TEGRA
select TIMER
select TEGRA_ARMV8_COMMON
select TEGRA_CLKRST
@@ -141,7 +145,6 @@
select TEGRA_GP_PADCTRL
select TEGRA_MC
select TEGRA_NO_BPMP
- select TEGRA_PINCTRL
select TEGRA_PMC
select TEGRA_PMC_SECURE
select TEGRA_TIMER
@@ -174,6 +177,13 @@
USB controller when U-Boot boots to avoid leaving a stale USB device
present.
+config TEGRA_SUPPORT_NON_SECURE
+ bool "Support executing U-Boot in non-secure (NS) mode"
+ depends on TEGRA114 || TEGRA124
+ help
+ Certain impossible actions will be skipped if the CPU is in NS mode,
+ such as ARM architectural timer initialization.
+
config CI_UDC_HAS_HOSTPC
def_bool y
depends on CI_UDC && !TEGRA20
@@ -194,7 +204,7 @@
choice
prompt "UART to use for console"
- depends on TEGRA_PINCTRL
+ depends on PINCTRL_TEGRA
default TEGRA_ENABLE_UARTA
config TEGRA_ENABLE_UARTA
diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile
index a5733b0..1d22dc3 100644
--- a/arch/arm/mach-tegra/Makefile
+++ b/arch/arm/mach-tegra/Makefile
@@ -17,7 +17,6 @@
obj-y += cache.o
obj-$(CONFIG_TEGRA_CLKRST) += clock.o
obj-$(CONFIG_$(SPL_)TEGRA_CRYPTO) += crypto.o
-obj-$(CONFIG_TEGRA_PINCTRL) += pinmux-common.o
obj-$(CONFIG_TEGRA_PMC) += powergate.o
obj-y += xusb-padctl-dummy.o
diff --git a/arch/arm/mach-tegra/board.c b/arch/arm/mach-tegra/board.c
index f8b61a2..327d70b 100644
--- a/arch/arm/mach-tegra/board.c
+++ b/arch/arm/mach-tegra/board.c
@@ -17,7 +17,7 @@
#if IS_ENABLED(CONFIG_TEGRA_CLKRST)
#include <asm/arch/clock.h>
#endif
-#if IS_ENABLED(CONFIG_TEGRA_PINCTRL)
+#if CONFIG_IS_ENABLED(PINCTRL_TEGRA)
#include <asm/arch/funcmux.h>
#endif
#if IS_ENABLED(CONFIG_TEGRA_MC)
@@ -77,9 +77,6 @@
}
#if defined(CONFIG_TEGRA_SUPPORT_NON_SECURE)
-#if !defined(CONFIG_TEGRA124)
-#error tegra_cpu_is_non_secure has only been validated on Tegra124
-#endif
bool tegra_cpu_is_non_secure(void)
{
/*
@@ -163,7 +160,7 @@
return 0;
}
-#if IS_ENABLED(CONFIG_TEGRA_PINCTRL)
+#if CONFIG_IS_ENABLED(PINCTRL_TEGRA)
static int uart_configs[] = {
#if defined(CONFIG_TEGRA20)
#if defined(CONFIG_TEGRA_UARTA_UAA_UAB)
@@ -235,7 +232,7 @@
void board_init_uart_f(void)
{
-#if IS_ENABLED(CONFIG_TEGRA_PINCTRL)
+#if CONFIG_IS_ENABLED(PINCTRL_TEGRA)
int uart_ids = 0; /* bit mask of which UART ids to enable */
#ifdef CONFIG_TEGRA_ENABLE_UARTA
diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c
index cd40587..adea12c 100644
--- a/arch/arm/mach-tegra/board2.c
+++ b/arch/arm/mach-tegra/board2.c
@@ -11,6 +11,7 @@
#include <init.h>
#include <log.h>
#include <ns16550.h>
+#include <power/regulator.h>
#include <usb.h>
#include <asm/global_data.h>
#include <asm/io.h>
@@ -33,7 +34,7 @@
#if IS_ENABLED(CONFIG_TEGRA_CLKRST)
#include <asm/arch/clock.h>
#endif
-#if IS_ENABLED(CONFIG_TEGRA_PINCTRL)
+#if CONFIG_IS_ENABLED(PINCTRL_TEGRA)
#include <asm/arch/funcmux.h>
#include <asm/arch/pinmux.h>
#endif
@@ -185,6 +186,10 @@
/* prepare the WB code to LP0 location */
warmboot_prepare_code(TEGRA_LP0_ADDR, TEGRA_LP0_SIZE);
#endif
+
+ /* Set up boot-on regulators */
+ regulators_enable_boot_on(_DEBUG);
+
return nvidia_board_init();
}
diff --git a/arch/arm/mach-tegra/clock.c b/arch/arm/mach-tegra/clock.c
index 966009f..575da2b 100644
--- a/arch/arm/mach-tegra/clock.c
+++ b/arch/arm/mach-tegra/clock.c
@@ -128,14 +128,14 @@
struct clk_pll_simple *simple_pll = NULL;
u32 misc_data, data;
- if (clkid < (enum clock_id)TEGRA_CLK_PLLS) {
+ if (clkid < (enum clock_id)TEGRA_CLK_PLLS)
pll = get_pll(clkid);
- } else {
+ else
simple_pll = clock_get_simple_pll(clkid);
- if (!simple_pll) {
- debug("%s: Uknown simple PLL %d\n", __func__, clkid);
- return 0;
- }
+
+ if (!simple_pll && !pll) {
+ log_err("Unknown PLL id %d\n", clkid);
+ return 0;
}
/*
@@ -542,7 +542,8 @@
unsigned clock_get_rate(enum clock_id clkid)
{
- struct clk_pll *pll;
+ struct clk_pll *pll = NULL;
+ struct clk_pll_simple *simple_pll = NULL;
u32 base, divm;
u64 parent_rate, rate;
struct clk_pll_info *pllinfo = &tegra_pll_info_table[clkid];
@@ -554,10 +555,20 @@
if (clkid == CLOCK_ID_CLK_M)
return clk_m_get_rate(parent_rate);
- pll = get_pll(clkid);
- if (!pll)
+ if (clkid < (enum clock_id)TEGRA_CLK_PLLS)
+ pll = get_pll(clkid);
+ else
+ simple_pll = clock_get_simple_pll(clkid);
+
+ if (!simple_pll && !pll) {
+ log_err("Unknown PLL id %d\n", clkid);
return 0;
- base = readl(&pll->pll_base);
+ }
+
+ if (pll)
+ base = readl(&pll->pll_base);
+ else
+ base = readl(&simple_pll->pll_base);
rate = parent_rate * ((base >> pllinfo->n_shift) & pllinfo->n_mask);
divm = (base >> pllinfo->m_shift) & pllinfo->m_mask;
@@ -599,12 +610,24 @@
int clock_set_rate(enum clock_id clkid, u32 n, u32 m, u32 p, u32 cpcon)
{
u32 base_reg, misc_reg;
- struct clk_pll *pll;
+ struct clk_pll *pll = NULL;
+ struct clk_pll_simple *simple_pll = NULL;
struct clk_pll_info *pllinfo = &tegra_pll_info_table[clkid];
- pll = get_pll(clkid);
+ if (clkid < (enum clock_id)TEGRA_CLK_PLLS)
+ pll = get_pll(clkid);
+ else
+ simple_pll = clock_get_simple_pll(clkid);
- base_reg = readl(&pll->pll_base);
+ if (!simple_pll && !pll) {
+ log_err("Unknown PLL id %d\n", clkid);
+ return 0;
+ }
+
+ if (pll)
+ base_reg = readl(&pll->pll_base);
+ else
+ base_reg = readl(&simple_pll->pll_base);
/* Set BYPASS, m, n and p to PLL_BASE */
base_reg &= ~(pllinfo->m_mask << pllinfo->m_shift);
@@ -631,21 +654,37 @@
}
base_reg |= PLL_BYPASS_MASK;
- writel(base_reg, &pll->pll_base);
+ if (pll)
+ writel(base_reg, &pll->pll_base);
+ else
+ writel(base_reg, &simple_pll->pll_base);
/* Set cpcon (KCP) to PLL_MISC */
- misc_reg = readl(&pll->pll_misc);
+ if (pll)
+ misc_reg = readl(&pll->pll_misc);
+ else
+ misc_reg = readl(&simple_pll->pll_misc);
+
misc_reg &= ~(pllinfo->kcp_mask << pllinfo->kcp_shift);
misc_reg |= cpcon << pllinfo->kcp_shift;
- writel(misc_reg, &pll->pll_misc);
+ if (pll)
+ writel(misc_reg, &pll->pll_misc);
+ else
+ writel(misc_reg, &simple_pll->pll_misc);
/* Enable PLL */
base_reg |= PLL_ENABLE_MASK;
- writel(base_reg, &pll->pll_base);
+ if (pll)
+ writel(base_reg, &pll->pll_base);
+ else
+ writel(base_reg, &simple_pll->pll_base);
/* Disable BYPASS */
base_reg &= ~PLL_BYPASS_MASK;
- writel(base_reg, &pll->pll_base);
+ if (pll)
+ writel(base_reg, &pll->pll_base);
+ else
+ writel(base_reg, &simple_pll->pll_base);
return 0;
}
@@ -729,6 +768,9 @@
pll_rate[CLOCK_ID_SFROM32KHZ] = 32768;
pll_rate[CLOCK_ID_OSC] = clock_get_rate(CLOCK_ID_OSC);
pll_rate[CLOCK_ID_CLK_M] = clock_get_rate(CLOCK_ID_CLK_M);
+#ifndef CONFIG_TEGRA20
+ pll_rate[CLOCK_ID_DISPLAY2] = clock_get_rate(CLOCK_ID_DISPLAY2);
+#endif
debug("Osc = %d\n", pll_rate[CLOCK_ID_OSC]);
debug("CLKM = %d\n", pll_rate[CLOCK_ID_CLK_M]);
diff --git a/arch/arm/mach-tegra/tegra114/Makefile b/arch/arm/mach-tegra/tegra114/Makefile
index 0e8f32c..346d6cb 100644
--- a/arch/arm/mach-tegra/tegra114/Makefile
+++ b/arch/arm/mach-tegra/tegra114/Makefile
@@ -4,4 +4,4 @@
obj-$(CONFIG_SPL_BUILD) += cpu.o
-obj-y += clock.o funcmux.o pinmux.o
+obj-y += clock.o
diff --git a/arch/arm/mach-tegra/tegra114/clock.c b/arch/arm/mach-tegra/tegra114/clock.c
index 8ad71f5..2ee755b 100644
--- a/arch/arm/mach-tegra/tegra114/clock.c
+++ b/arch/arm/mach-tegra/tegra114/clock.c
@@ -299,7 +299,7 @@
PERIPHC_UART3,
/* 56 */
- NONE(RESERVED56),
+ NONE(MIPI_CAL),
PERIPHC_EMC,
NONE(USB2),
NONE(USB3),
@@ -457,6 +457,8 @@
.lock_ena = 9, .lock_det = 11, .kcp_shift = 6, .kcp_mask = 3, .kvco_shift = 0, .kvco_mask = 1 }, /* PLLE */
{ .m_shift = 0, .m_mask = 0x0F, .n_shift = 8, .n_mask = 0x3FF, .p_shift = 20, .p_mask = 0x07,
.lock_ena = 18, .lock_det = 27, .kcp_shift = 8, .kcp_mask = 0xF, .kvco_shift = 4, .kvco_mask = 0xF }, /* PLLS (RESERVED) */
+ { .m_shift = 0, .m_mask = 0x1F, .n_shift = 8, .n_mask = 0x3FF, .p_shift = 20, .p_mask = 0x07,
+ .lock_ena = 22, .lock_det = 27, .kcp_shift = 8, .kcp_mask = 0xF, .kvco_shift = 4, .kvco_mask = 0xF }, /* PLLD2 */
};
/*
@@ -633,7 +635,6 @@
case PERIPH_ID_RESERVED35:
case PERIPH_ID_RESERVED43:
case PERIPH_ID_RESERVED45:
- case PERIPH_ID_RESERVED56:
case PERIPH_ID_RESERVED76:
case PERIPH_ID_RESERVED77:
case PERIPH_ID_RESERVED78:
@@ -671,6 +672,9 @@
case TEGRA114_CLK_PLL_D:
case TEGRA114_CLK_PLL_D_OUT0:
return CLOCK_ID_DISPLAY;
+ case TEGRA114_CLK_PLL_D2:
+ case TEGRA114_CLK_PLL_D2_OUT0:
+ return CLOCK_ID_DISPLAY2;
case TEGRA114_CLK_PLL_X:
return CLOCK_ID_XCPU;
case TEGRA114_CLK_PLL_E_OUT0:
@@ -768,6 +772,23 @@
debug("%s: TSC CNTCR = 0x%08X\n", __func__, val);
}
+struct clk_pll_simple *clock_get_simple_pll(enum clock_id clkid)
+{
+ struct clk_rst_ctlr *clkrst =
+ (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE;
+
+ switch (clkid) {
+ case CLOCK_ID_XCPU:
+ case CLOCK_ID_EPCI:
+ case CLOCK_ID_SFROM32KHZ:
+ return &clkrst->crc_pll_simple[clkid - CLOCK_ID_FIRST_SIMPLE];
+ case CLOCK_ID_DISPLAY2:
+ return &clkrst->plld2;
+ default:
+ return NULL;
+ }
+}
+
struct periph_clk_init periph_clk_init_table[] = {
{ PERIPH_ID_SBC1, CLOCK_ID_PERIPH },
{ PERIPH_ID_SBC2, CLOCK_ID_PERIPH },
diff --git a/arch/arm/mach-tegra/tegra124/Makefile b/arch/arm/mach-tegra/tegra124/Makefile
index d275daf..6ea511e 100644
--- a/arch/arm/mach-tegra/tegra124/Makefile
+++ b/arch/arm/mach-tegra/tegra124/Makefile
@@ -8,8 +8,6 @@
obj-$(CONFIG_SPL_BUILD) += cpu.o
obj-y += clock.o
-obj-y += funcmux.o
-obj-y += pinmux.o
obj-y += pmc.o
obj-y += xusb-padctl.o
obj-y += ../xusb-padctl-common.o
diff --git a/arch/arm/mach-tegra/tegra124/clock.c b/arch/arm/mach-tegra/tegra124/clock.c
index ca9549a..ed8b6d9 100644
--- a/arch/arm/mach-tegra/tegra124/clock.c
+++ b/arch/arm/mach-tegra/tegra124/clock.c
@@ -1189,10 +1189,16 @@
struct clk_rst_ctlr *clkrst =
(struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE;
- if (clkid == CLOCK_ID_DP)
+ switch (clkid) {
+ case CLOCK_ID_XCPU:
+ case CLOCK_ID_EPCI:
+ case CLOCK_ID_SFROM32KHZ:
+ return &clkrst->crc_pll_simple[clkid - CLOCK_ID_FIRST_SIMPLE];
+ case CLOCK_ID_DP:
return &clkrst->plldp;
-
- return NULL;
+ default:
+ return NULL;
+ }
}
struct periph_clk_init periph_clk_init_table[] = {
diff --git a/arch/arm/mach-tegra/tegra20/Makefile b/arch/arm/mach-tegra/tegra20/Makefile
index 991cabe..c2ae98e 100644
--- a/arch/arm/mach-tegra/tegra20/Makefile
+++ b/arch/arm/mach-tegra/tegra20/Makefile
@@ -11,7 +11,7 @@
-D__LINUX_ARM_ARCH__=4
CFLAGS_REMOVE_warmboot_avp.o := $(LTO_CFLAGS)
-obj-y += clock.o funcmux.o pinmux.o
+obj-y += clock.o
obj-$(CONFIG_TEGRA_LP0) += warmboot.o warmboot_avp.o
obj-$(CONFIG_TEGRA_CLOCK_SCALING) += emc.o
obj-$(CONFIG_TEGRA_PMU) += pmu.o
diff --git a/arch/arm/mach-tegra/tegra20/clock.c b/arch/arm/mach-tegra/tegra20/clock.c
index abd6e39..109b73b 100644
--- a/arch/arm/mach-tegra/tegra20/clock.c
+++ b/arch/arm/mach-tegra/tegra20/clock.c
@@ -792,6 +792,21 @@
return 0;
}
+struct clk_pll_simple *clock_get_simple_pll(enum clock_id clkid)
+{
+ struct clk_rst_ctlr *clkrst =
+ (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE;
+
+ switch (clkid) {
+ case CLOCK_ID_XCPU:
+ case CLOCK_ID_EPCI:
+ case CLOCK_ID_SFROM32KHZ:
+ return &clkrst->crc_pll_simple[clkid - CLOCK_ID_FIRST_SIMPLE];
+ default:
+ return NULL;
+ }
+}
+
struct periph_clk_init periph_clk_init_table[] = {
{ PERIPH_ID_SPI1, CLOCK_ID_PERIPH },
{ PERIPH_ID_SBC1, CLOCK_ID_PERIPH },
diff --git a/arch/arm/mach-tegra/tegra210/Makefile b/arch/arm/mach-tegra/tegra210/Makefile
index cfcba5b..5cc718d 100644
--- a/arch/arm/mach-tegra/tegra210/Makefile
+++ b/arch/arm/mach-tegra/tegra210/Makefile
@@ -6,6 +6,5 @@
#
obj-y += clock.o
-obj-y += funcmux.o
obj-y += xusb-padctl.o
obj-y += ../xusb-padctl-common.o
diff --git a/arch/arm/mach-tegra/tegra210/clock.c b/arch/arm/mach-tegra/tegra210/clock.c
index 900537a..74817e0 100644
--- a/arch/arm/mach-tegra/tegra210/clock.c
+++ b/arch/arm/mach-tegra/tegra210/clock.c
@@ -1266,6 +1266,21 @@
return 0;
}
+struct clk_pll_simple *clock_get_simple_pll(enum clock_id clkid)
+{
+ struct clk_rst_ctlr *clkrst =
+ (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE;
+
+ switch (clkid) {
+ case CLOCK_ID_XCPU:
+ case CLOCK_ID_EPCI:
+ case CLOCK_ID_SFROM32KHZ:
+ return &clkrst->crc_pll_simple[clkid - CLOCK_ID_FIRST_SIMPLE];
+ default:
+ return NULL;
+ }
+}
+
struct periph_clk_init periph_clk_init_table[] = {
{ PERIPH_ID_SBC1, CLOCK_ID_PERIPH },
{ PERIPH_ID_SBC2, CLOCK_ID_PERIPH },
diff --git a/arch/arm/mach-tegra/tegra30/Makefile b/arch/arm/mach-tegra/tegra30/Makefile
index 28dd486..ee0e6f5 100644
--- a/arch/arm/mach-tegra/tegra30/Makefile
+++ b/arch/arm/mach-tegra/tegra30/Makefile
@@ -5,4 +5,4 @@
obj-$(CONFIG_SPL_BUILD) += cpu.o
obj-$(CONFIG_$(SPL_)CMD_EBTUPDATE) += bct.o
-obj-y += clock.o funcmux.o pinmux.o
+obj-y += clock.o
diff --git a/arch/arm/mach-tegra/tegra30/clock.c b/arch/arm/mach-tegra/tegra30/clock.c
index 698c7ab..0af8cde 100644
--- a/arch/arm/mach-tegra/tegra30/clock.c
+++ b/arch/arm/mach-tegra/tegra30/clock.c
@@ -438,6 +438,8 @@
.lock_ena = 9, .lock_det = 11, .kcp_shift = 6, .kcp_mask = 3, .kvco_shift = 0, .kvco_mask = 1 }, /* PLLE */
{ .m_shift = 0, .m_mask = 0x0F, .n_shift = 8, .n_mask = 0x3FF, .p_shift = 20, .p_mask = 0x07,
.lock_ena = 18, .lock_det = 27, .kcp_shift = 8, .kcp_mask = 0xF, .kvco_shift = 4, .kvco_mask = 0xF }, /* PLLS (RESERVED) */
+ { .m_shift = 0, .m_mask = 0x1F, .n_shift = 8, .n_mask = 0x3FF, .p_shift = 20, .p_mask = 0x07,
+ .lock_ena = 22, .lock_det = 27, .kcp_shift = 8, .kcp_mask = 0xF, .kvco_shift = 4, .kvco_mask = 0xF }, /* PLLD2 */
};
/*
@@ -654,6 +656,9 @@
case TEGRA30_CLK_PLL_D:
case TEGRA30_CLK_PLL_D_OUT0:
return CLOCK_ID_DISPLAY;
+ case TEGRA30_CLK_PLL_D2:
+ case TEGRA30_CLK_PLL_D2_OUT0:
+ return CLOCK_ID_DISPLAY2;
case TEGRA30_CLK_PLL_X:
return CLOCK_ID_XCPU;
case TEGRA30_CLK_PLL_E:
@@ -871,6 +876,23 @@
return 0;
}
+struct clk_pll_simple *clock_get_simple_pll(enum clock_id clkid)
+{
+ struct clk_rst_ctlr *clkrst =
+ (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE;
+
+ switch (clkid) {
+ case CLOCK_ID_XCPU:
+ case CLOCK_ID_EPCI:
+ case CLOCK_ID_SFROM32KHZ:
+ return &clkrst->crc_pll_simple[clkid - CLOCK_ID_FIRST_SIMPLE];
+ case CLOCK_ID_DISPLAY2:
+ return &clkrst->plld2;
+ default:
+ return NULL;
+ }
+}
+
struct periph_clk_init periph_clk_init_table[] = {
{ PERIPH_ID_SBC1, CLOCK_ID_PERIPH },
{ PERIPH_ID_SBC2, CLOCK_ID_PERIPH },
diff --git a/arch/arm/mach-zynq/clk.c b/arch/arm/mach-zynq/clk.c
index 1945f60..e6a6732 100644
--- a/arch/arm/mach-zynq/clk.c
+++ b/arch/arm/mach-zynq/clk.c
@@ -13,20 +13,6 @@
DECLARE_GLOBAL_DATA_PTR;
-static const char * const clk_names[clk_max] = {
- "armpll", "ddrpll", "iopll",
- "cpu_6or4x", "cpu_3or2x", "cpu_2x", "cpu_1x",
- "ddr2x", "ddr3x", "dci",
- "lqspi", "smc", "pcap", "gem0", "gem1",
- "fclk0", "fclk1", "fclk2", "fclk3", "can0", "can1",
- "sdio0", "sdio1", "uart0", "uart1", "spi0", "spi1", "dma",
- "usb0_aper", "usb1_aper", "gem0_aper", "gem1_aper",
- "sdio0_aper", "sdio1_aper", "spi0_aper", "spi1_aper",
- "can0_aper", "can1_aper", "i2c0_aper", "i2c1_aper",
- "uart0_aper", "uart1_aper", "gpio_aper", "lqspi_aper",
- "smc_aper", "swdt", "dbg_trc", "dbg_apb"
-};
-
/**
* set_cpu_clk_info() - Setup clock information
*
@@ -65,46 +51,3 @@
return 0;
}
-
-/**
- * soc_clk_dump() - Print clock frequencies
- * Returns zero on success
- *
- * Implementation for the clk dump command.
- */
-int soc_clk_dump(void)
-{
- struct udevice *dev;
- int i, ret;
-
- ret = uclass_get_device_by_driver(UCLASS_CLK,
- DM_DRIVER_GET(zynq_clk), &dev);
- if (ret)
- return ret;
-
- printf("clk\t\tfrequency\n");
- for (i = 0; i < clk_max; i++) {
- const char *name = clk_names[i];
- if (name) {
- struct clk clk;
- unsigned long rate;
-
- clk.id = i;
- ret = clk_request(dev, &clk);
- if (ret < 0)
- return ret;
-
- rate = clk_get_rate(&clk);
-
- clk_free(&clk);
-
- if ((rate == (unsigned long)-ENOSYS) ||
- (rate == (unsigned long)-ENXIO))
- printf("%10s%20s\n", name, "unknown");
- else
- printf("%10s%20lu\n", name, rate);
- }
- }
-
- return 0;
-}
diff --git a/arch/arm/mach-zynqmp-r5/include/mach/sys_r5_proto.h b/arch/arm/mach-zynqmp-r5/include/mach/sys_r5_proto.h
new file mode 100644
index 0000000..0f7a47b
--- /dev/null
+++ b/arch/arm/mach-zynqmp-r5/include/mach/sys_r5_proto.h
@@ -0,0 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2024, Advanced Micro Devices, Inc.
+ * Michal Simek <michal.simek@amd.com>
+ */
diff --git a/arch/m68k/include/asm/cache.h b/arch/m68k/include/asm/cache.h
index 8ed2b4d..6ef7f7b 100644
--- a/arch/m68k/include/asm/cache.h
+++ b/arch/m68k/include/asm/cache.h
@@ -9,6 +9,8 @@
#ifndef __CACHE_H
#define __CACHE_H
+#include <config.h>
+
#if defined(CONFIG_MCF520x) || defined(CONFIG_MCF523x) || \
defined(CONFIG_MCF52x2)
#define CFG_CF_V2
diff --git a/arch/m68k/include/asm/global_data.h b/arch/m68k/include/asm/global_data.h
index 5f576ba..c2ef577 100644
--- a/arch/m68k/include/asm/global_data.h
+++ b/arch/m68k/include/asm/global_data.h
@@ -7,8 +7,6 @@
#ifndef __ASM_GBL_DATA_H
#define __ASM_GBL_DATA_H
-#include <config.h>
-
/* Architecture-specific global data */
struct arch_global_data {
#ifdef CONFIG_SYS_I2C_FSL
@@ -24,7 +22,7 @@
unsigned long sdhc_clk;
#endif
#if defined(CONFIG_FSL_ESDHC)
- u32 sdhc_per_clk;
+ unsigned long sdhc_per_clk;
#endif
};
diff --git a/arch/m68k/lib/bootm.c b/arch/m68k/lib/bootm.c
index 79d8b34..f2d02e4 100644
--- a/arch/m68k/lib/bootm.c
+++ b/arch/m68k/lib/bootm.c
@@ -4,6 +4,7 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
+#include <bootm.h>
#include <bootstage.h>
#include <command.h>
#include <env.h>
@@ -34,9 +35,9 @@
arch_lmb_reserve_generic(lmb, get_sp(), gd->ram_top, 1024);
}
-int do_bootm_linux(int flag, int argc, char *const argv[],
- struct bootm_headers *images)
+int do_bootm_linux(int flag, struct bootm_info *bmi)
{
+ struct bootm_headers *images = bmi->images;
int ret;
struct bd_info *kbd;
void (*kernel) (struct bd_info *, ulong, ulong, ulong, ulong);
diff --git a/arch/m68k/lib/traps.c b/arch/m68k/lib/traps.c
index c283351..e09f36f 100644
--- a/arch/m68k/lib/traps.c
+++ b/arch/m68k/lib/traps.c
@@ -7,6 +7,8 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
+#include <config.h>
+#include <cpu_func.h>
#include <init.h>
#include <watchdog.h>
#include <command.h>
@@ -65,3 +67,9 @@
return 0;
}
+
+void reset_cpu(void)
+{
+ /* TODO: Refactor all the do_reset calls to be reset_cpu() instead */
+ do_reset(NULL, 0, 0, NULL);
+}
diff --git a/arch/microblaze/Kconfig b/arch/microblaze/Kconfig
index e38c9f6..4261e50 100644
--- a/arch/microblaze/Kconfig
+++ b/arch/microblaze/Kconfig
@@ -23,6 +23,7 @@
select SYSRESET
select DM_SPI
select DM_SPI_FLASH
+ select MTD
select SPI
imply CMD_DM
diff --git a/arch/microblaze/lib/bootm.c b/arch/microblaze/lib/bootm.c
index f3ec4b7..cbe9d85 100644
--- a/arch/microblaze/lib/bootm.c
+++ b/arch/microblaze/lib/bootm.c
@@ -7,6 +7,7 @@
* Yasushi SHOJI <yashi@atmark-techno.com>
*/
+#include <bootm.h>
#include <bootstage.h>
#include <command.h>
#include <cpu_func.h>
@@ -81,9 +82,10 @@
}
}
-int do_bootm_linux(int flag, int argc, char *const argv[],
- struct bootm_headers *images)
+int do_bootm_linux(int flag, struct bootm_info *bmi)
{
+ struct bootm_headers *images = bmi->images;
+
images->cmdline_start = (ulong)env_get("bootargs");
/* cmdline init is the part of 'prep' and nothing to do for 'bdt' */
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 569f5f4..f0704d9 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -77,6 +77,7 @@
select PINMUX
select PINCONF
select RESET_MTMIPS
+ imply MTD
imply DM_SPI
imply DM_SPI_FLASH
select LAST_STAGE_INIT
@@ -109,6 +110,7 @@
select MIPS_L2_CACHE
select MIPS_MACH_EARLY_INIT
select MIPS_TUNE_OCTEON3
+ select MTD
select ROM_EXCEPTION_VECTORS
select SUPPORTS_BIG_ENDIAN
select SUPPORTS_CPU_MIPS64_OCTEON
diff --git a/arch/mips/cpu/cpu.c b/arch/mips/cpu/cpu.c
index acfc9dc..4434650 100644
--- a/arch/mips/cpu/cpu.c
+++ b/arch/mips/cpu/cpu.c
@@ -4,6 +4,7 @@
* Wolfgang Denk, DENX Software Engineering, <wd@denx.de>
*/
+#include <cpu_func.h>
#include <command.h>
#include <init.h>
#include <linux/compiler.h>
@@ -20,9 +21,14 @@
/* NOP */;
}
-int do_reset(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
+void reset_cpu(void)
{
_machine_restart();
+}
+
+int do_reset(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
+{
+ reset_cpu();
return 0;
}
diff --git a/arch/mips/include/asm/global_data.h b/arch/mips/include/asm/global_data.h
index f0d3b07..34b7e0b 100644
--- a/arch/mips/include/asm/global_data.h
+++ b/arch/mips/include/asm/global_data.h
@@ -7,8 +7,8 @@
#ifndef __ASM_GBL_DATA_H
#define __ASM_GBL_DATA_H
+#include <linux/types.h>
#include <asm/regdef.h>
-#include <asm/types.h>
struct octeon_eeprom_mac_addr {
u8 mac_addr_base[6];
diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h
index d3ad669..3774aca 100644
--- a/arch/mips/include/asm/io.h
+++ b/arch/mips/include/asm/io.h
@@ -336,6 +336,22 @@
BUILDIO_MEM(w, u16)
BUILDIO_MEM(l, u32)
BUILDIO_MEM(q, u64)
+#define __raw_readb __raw_readb
+#define __raw_readw __raw_readw
+#define __raw_readl __raw_readl
+#define __raw_readq __raw_readq
+#define __raw_writeb __raw_writeb
+#define __raw_writew __raw_writew
+#define __raw_writel __raw_writel
+#define __raw_writeq __raw_writeq
+#define readb readb
+#define readw readw
+#define readl readl
+#define readq readq
+#define writeb writeb
+#define writew writew
+#define writel writel
+#define writeq writeq
#define __BUILD_IOPORT_PFX(bus, bwlq, type) \
__BUILD_IOPORT_SINGLE(bus, bwlq, type, ) \
@@ -405,7 +421,8 @@
} \
} \
\
-static inline void reads##bwlq(volatile void __iomem *mem, void *addr, \
+static inline void reads##bwlq(const volatile void __iomem *mem, \
+ void *addr, \
unsigned int count) \
{ \
volatile type *__addr = addr; \
@@ -448,8 +465,24 @@
BUILDSTRING(b, u8)
BUILDSTRING(w, u16)
BUILDSTRING(l, u32)
+#define readsb readsb
+#define readsw readsw
+#define readsl readsl
+#define writesb writesb
+#define writesw writesw
+#define writesl writesl
+#define outsb outsb
+#define outsw outsw
+#define outsl outsl
+#define insb insb
+#define insw insw
+#define insl insl
#ifdef CONFIG_64BIT
BUILDSTRING(q, u64)
+#define readsq readsq
+#define writesq writesq
+#define insq insq
+#define outsq outsq
#endif
diff --git a/arch/mips/lib/bootm.c b/arch/mips/lib/bootm.c
index d6d2f7d..adb6b6c 100644
--- a/arch/mips/lib/bootm.c
+++ b/arch/mips/lib/bootm.c
@@ -4,6 +4,7 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
+#include <bootm.h>
#include <bootstage.h>
#include <env.h>
#include <image.h>
@@ -216,7 +217,7 @@
{
/*
* In case of legacy uImage's, relocation of FDT is already done
- * by do_bootm_states() and should not repeated in 'bootm prep'.
+ * by bootm_run_states() and should not repeated in 'bootm prep'.
*/
if (images->state & BOOTM_STATE_FDT) {
debug("## FDT already relocated\n");
@@ -246,8 +247,8 @@
{
images->initrd_start = virt_to_phys((void *)images->initrd_start);
images->initrd_end = virt_to_phys((void *)images->initrd_end);
- return image_setup_libfdt(images, images->ft_addr, images->ft_len,
- &images->lmb);
+
+ return image_setup_libfdt(images, images->ft_addr, &images->lmb);
}
static void boot_prep_linux(struct bootm_headers *images)
@@ -300,9 +301,10 @@
linux_extra);
}
-int do_bootm_linux(int flag, int argc, char *const argv[],
- struct bootm_headers *images)
+int do_bootm_linux(int flag, struct bootm_info *bmi)
{
+ struct bootm_headers *images = bmi->images;
+
/* No need for those on MIPS */
if (flag & BOOTM_STATE_OS_BD_T)
return -1;
diff --git a/arch/mips/mach-pic32/cpu.c b/arch/mips/mach-pic32/cpu.c
index dbf8c9c..3181a94 100644
--- a/arch/mips/mach-pic32/cpu.c
+++ b/arch/mips/mach-pic32/cpu.c
@@ -143,26 +143,3 @@
return str;
}
#endif
-#ifdef CONFIG_CMD_CLK
-
-int soc_clk_dump(void)
-{
- int i;
-
- printf("PLL Speed: %lu MHz\n",
- CLK_MHZ(rate(PLLCLK)));
-
- printf("CPU Speed: %lu MHz\n", CLK_MHZ(rate(PB7CLK)));
-
- printf("MPLL Speed: %lu MHz\n", CLK_MHZ(rate(MPLL)));
-
- for (i = PB1CLK; i <= PB7CLK; i++)
- printf("PB%d Clock Speed: %lu MHz\n", i - PB1CLK + 1,
- CLK_MHZ(rate(i)));
-
- for (i = REF1CLK; i <= REF5CLK; i++)
- printf("REFO%d Clock Speed: %lu MHz\n", i - REF1CLK + 1,
- CLK_MHZ(rate(i)));
- return 0;
-}
-#endif
diff --git a/arch/nios2/cpu/cpu.c b/arch/nios2/cpu/cpu.c
index 79a54d1..de7bfa9 100644
--- a/arch/nios2/cpu/cpu.c
+++ b/arch/nios2/cpu/cpu.c
@@ -35,11 +35,17 @@
}
#endif
-int do_reset(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
+void reset_cpu(void)
{
disable_interrupts();
/* indirect call to go beyond 256MB limitation of toolchain */
nios2_callr(gd->arch.reset_addr);
+}
+
+int do_reset(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
+{
+ reset_cpu();
+
return 0;
}
diff --git a/arch/nios2/include/asm/global_data.h b/arch/nios2/include/asm/global_data.h
index 1a0e7d2..b56e8a5 100644
--- a/arch/nios2/include/asm/global_data.h
+++ b/arch/nios2/include/asm/global_data.h
@@ -6,6 +6,8 @@
#ifndef __ASM_NIOS2_GLOBALDATA_H_
#define __ASM_NIOS2_GLOBALDATA_H_
+#include <linux/types.h>
+
/* Architecture-specific global data */
struct arch_global_data {
u32 dcache_line_size;
diff --git a/arch/nios2/include/asm/io.h b/arch/nios2/include/asm/io.h
index 817cd72..321e4fd 100644
--- a/arch/nios2/include/asm/io.h
+++ b/arch/nios2/include/asm/io.h
@@ -94,6 +94,9 @@
unsigned long *p = dst;
while (count--) *p++ = inl (port);
}
+#define insb insb
+#define insw insw
+#define insl insl
static inline void outsb (unsigned long port, const void *src, unsigned long count)
{
@@ -111,6 +114,9 @@
const unsigned long *p = src;
while (count--) outl (*p++, port);
}
+#define outsb outsb
+#define outsw outsw
+#define outsl outsl
/*
* Clear and set bits in one shot. These macros can be used to clear and
diff --git a/arch/nios2/lib/bootm.c b/arch/nios2/lib/bootm.c
index 06c094d..657a17c 100644
--- a/arch/nios2/lib/bootm.c
+++ b/arch/nios2/lib/bootm.c
@@ -5,6 +5,7 @@
*/
#include <common.h>
+#include <bootm.h>
#include <cpu_func.h>
#include <env.h>
#include <image.h>
@@ -16,9 +17,9 @@
#define NIOS_MAGIC 0x534f494e /* enable command line and initrd passing */
-int do_bootm_linux(int flag, int argc, char *const argv[],
- struct bootm_headers *images)
+int do_bootm_linux(int flag, struct bootm_info *bmi)
{
+ struct bootm_headers *images = bmi->images;
void (*kernel)(int, int, int, char *) = (void *)images->ep;
char *commandline = env_get("bootargs");
ulong initrd_start = images->rd_start;
@@ -29,8 +30,9 @@
if (images->ft_len)
of_flat_tree = images->ft_addr;
#endif
- if (!of_flat_tree && argc > 1)
- of_flat_tree = (char *)hextoul(argv[1], NULL);
+ /* TODO: Clean this up - the DT should already be set up */
+ if (!of_flat_tree && bmi->argc > 1)
+ of_flat_tree = (char *)hextoul(bmi->argv[1], NULL);
if (of_flat_tree)
initrd_end = (ulong)of_flat_tree;
diff --git a/arch/powerpc/include/asm/global_data.h b/arch/powerpc/include/asm/global_data.h
index 43d71f5..f786012 100644
--- a/arch/powerpc/include/asm/global_data.h
+++ b/arch/powerpc/include/asm/global_data.h
@@ -8,7 +8,6 @@
#ifndef __ASM_GBL_DATA_H
#define __ASM_GBL_DATA_H
-#include <config.h>
#include <linux/types.h>
/* Architecture-specific global data */
diff --git a/arch/powerpc/include/asm/io.h b/arch/powerpc/include/asm/io.h
index f63cae0..2412bb9 100644
--- a/arch/powerpc/include/asm/io.h
+++ b/arch/powerpc/include/asm/io.h
@@ -138,26 +138,37 @@
{
return *(volatile unsigned char *)PCI_FIX_ADDR(addr);
}
+#define __raw_readb __raw_readb
+
static inline unsigned short __raw_readw(const volatile void __iomem *addr)
{
return *(volatile unsigned short *)PCI_FIX_ADDR(addr);
}
+#define __raw_readw __raw_readw
+
static inline unsigned int __raw_readl(const volatile void __iomem *addr)
{
return *(volatile unsigned int *)PCI_FIX_ADDR(addr);
}
+#define __raw_readl __raw_readl
+
static inline void __raw_writeb(unsigned char v, volatile void __iomem *addr)
{
*(volatile unsigned char *)PCI_FIX_ADDR(addr) = v;
}
+#define __raw_writeb __raw_writeb
+
static inline void __raw_writew(unsigned short v, volatile void __iomem *addr)
{
*(volatile unsigned short *)PCI_FIX_ADDR(addr) = v;
}
+#define __raw_writew __raw_writew
+
static inline void __raw_writel(unsigned int v, volatile void __iomem *addr)
{
*(volatile unsigned int *)PCI_FIX_ADDR(addr) = v;
}
+#define __raw_writel __raw_writel
/*
* 8, 16 and 32 bit, big and little endian I/O operations, with barrier.
diff --git a/arch/powerpc/lib/bootm.c b/arch/powerpc/lib/bootm.c
index 910121e..75c6bfd 100644
--- a/arch/powerpc/lib/bootm.c
+++ b/arch/powerpc/lib/bootm.c
@@ -8,6 +8,7 @@
#include <common.h>
+#include <bootm.h>
#include <bootstage.h>
#include <cpu_func.h>
#include <env.h>
@@ -223,9 +224,9 @@
return 0;
}
-noinline int do_bootm_linux(int flag, int argc, char *const argv[],
- struct bootm_headers *images)
+int do_bootm_linux(int flag, struct bootm_info *bmi)
{
+ struct bootm_headers *images = bmi->images;
int ret;
if (flag & BOOTM_STATE_OS_CMDLINE) {
diff --git a/arch/powerpc/lib/traps.c b/arch/powerpc/lib/traps.c
index c7bce82..cf8da2e 100644
--- a/arch/powerpc/lib/traps.c
+++ b/arch/powerpc/lib/traps.c
@@ -4,6 +4,8 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
+#include <command.h>
+#include <cpu_func.h>
#include <init.h>
#include <asm/global_data.h>
@@ -17,3 +19,11 @@
return 0;
}
+
+#ifndef CONFIG_SYSRESET
+void reset_cpu(void)
+{
+ /* TODO: Refactor all the do_reset calls to be reset_cpu() instead */
+ do_reset(NULL, 0, 0, NULL);
+}
+#endif
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 6d0d812..67126d9 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -39,6 +39,9 @@
bool "Support Sipeed's TH1520 Lichee PI 4A Board"
select SYS_CACHE_SHIFT_6
+config TARGET_XILINX_MBV
+ bool "Support AMD/Xilinx MicroBlaze V"
+
endchoice
config SYS_ICACHE_OFF
@@ -82,6 +85,7 @@
source "board/sipeed/maix/Kconfig"
source "board/starfive/visionfive2/Kconfig"
source "board/thead/th1520_lpi4a/Kconfig"
+source "board/xilinx/mbv/Kconfig"
# platform-specific options below
source "arch/riscv/cpu/andesv5/Kconfig"
diff --git a/arch/riscv/cpu/andesv5/cpu.c b/arch/riscv/cpu/andesv5/cpu.c
index 63bc24c..d25ecba 100644
--- a/arch/riscv/cpu/andesv5/cpu.c
+++ b/arch/riscv/cpu/andesv5/cpu.c
@@ -31,19 +31,34 @@
/* Enable I/D-cache in SPL */
if (CONFIG_IS_ENABLED(RISCV_MMODE)) {
unsigned long mcache_ctl_val = csr_read(CSR_MCACHE_CTL);
+ unsigned long mmisc_ctl_val = csr_read(CSR_MMISC_CTL);
- mcache_ctl_val |= (MCACHE_CTL_DC_COHEN | MCACHE_CTL_IC_EN |
- MCACHE_CTL_DC_EN | MCACHE_CTL_CCTL_SUEN);
+ mcache_ctl_val |= (MCACHE_CTL_CCTL_SUEN | \
+ MCACHE_CTL_IC_PREFETCH_EN | MCACHE_CTL_DC_PREFETCH_EN | \
+ MCACHE_CTL_DC_WAROUND_EN | MCACHE_CTL_L2C_WAROUND_EN | \
+ MCACHE_CTL_IC_ECCEN | MCACHE_CTL_DC_ECCEN | MCACHE_CTL_TLB_ECCEN);
+
+ if (!CONFIG_IS_ENABLED(SYS_ICACHE_OFF))
+ mcache_ctl_val |= MCACHE_CTL_IC_EN;
+
+ if (!CONFIG_IS_ENABLED(SYS_DCACHE_OFF))
+ mcache_ctl_val |= (MCACHE_CTL_DC_EN | MCACHE_CTL_DC_COHEN);
csr_write(CSR_MCACHE_CTL, mcache_ctl_val);
- /*
- * Check mcache_ctl.DC_COHEN, we assume this platform does
- * not support CM if the bit is hard-wired to 0.
- */
- if (csr_read(CSR_MCACHE_CTL) & MCACHE_CTL_DC_COHEN) {
- /* Wait for DC_COHSTA bit to be set */
- while (!(csr_read(CSR_MCACHE_CTL) & MCACHE_CTL_DC_COHSTA));
+ if (!CONFIG_IS_ENABLED(SYS_DCACHE_OFF)) {
+ /*
+ * Check mcache_ctl.DC_COHEN, we assume this platform does
+ * not support CM if the bit is hard-wired to 0.
+ */
+ if (csr_read(CSR_MCACHE_CTL) & MCACHE_CTL_DC_COHEN) {
+ /* Wait for DC_COHSTA bit to be set */
+ while (!(csr_read(CSR_MCACHE_CTL) & MCACHE_CTL_DC_COHSTA));
+ }
}
+
+ mmisc_ctl_val |= MMISC_CTL_NON_BLOCKING_EN;
+
+ csr_write(CSR_MMISC_CTL, mmisc_ctl_val);
}
}
diff --git a/arch/riscv/cpu/cpu.c b/arch/riscv/cpu/cpu.c
index ebd39cb..8445c58 100644
--- a/arch/riscv/cpu/cpu.c
+++ b/arch/riscv/cpu/cpu.c
@@ -3,10 +3,13 @@
* Copyright (C) 2018, Bin Meng <bmeng.cn@gmail.com>
*/
+#include <command.h>
#include <cpu.h>
+#include <cpu_func.h>
#include <dm.h>
#include <dm/lists.h>
#include <event.h>
+#include <hang.h>
#include <init.h>
#include <log.h>
#include <asm/encoding.h>
@@ -162,3 +165,13 @@
__weak void harts_early_init(void)
{
}
+
+#if !CONFIG_IS_ENABLED(SYSRESET)
+void reset_cpu(void)
+{
+ printf("resetting ...\n");
+
+ printf("reset not supported yet\n");
+ hang();
+}
+#endif
diff --git a/arch/riscv/dts/Makefile b/arch/riscv/dts/Makefile
index be6c8a4..b05bb56 100644
--- a/arch/riscv/dts/Makefile
+++ b/arch/riscv/dts/Makefile
@@ -9,6 +9,8 @@
dtb-$(CONFIG_TARGET_SIPEED_MAIX) += k210-maix-bit.dtb
dtb-$(CONFIG_TARGET_STARFIVE_VISIONFIVE2) += jh7110-starfive-visionfive-2.dtb
dtb-$(CONFIG_TARGET_TH1520_LPI4A) += th1520-lichee-pi-4a.dtb
+dtb-$(CONFIG_TARGET_XILINX_MBV) += xilinx-mbv32.dtb
+
include $(srctree)/scripts/Makefile.dts
targets += $(dtb-y)
diff --git a/arch/riscv/dts/binman.dtsi b/arch/riscv/dts/binman.dtsi
index 6b4eb8d..9271de0 100644
--- a/arch/riscv/dts/binman.dtsi
+++ b/arch/riscv/dts/binman.dtsi
@@ -5,9 +5,6 @@
#include <config.h>
-#define U64_TO_U32_H(addr) (((addr) >> 32) & 0xffffffff)
-#define U64_TO_U32_L(addr) ((addr) & 0xffffffff)
-
/ {
binman: binman {
multiple-images;
@@ -36,8 +33,7 @@
os = "U-Boot";
arch = "riscv";
compression = "none";
- load = <U64_TO_U32_H(CONFIG_TEXT_BASE)
- U64_TO_U32_L(CONFIG_TEXT_BASE)>;
+ load = /bits/ 64 <CONFIG_TEXT_BASE>;
uboot_blob: blob-ext {
filename = "u-boot-nodtb.bin";
@@ -50,7 +46,7 @@
os = "Linux";
arch = "riscv";
compression = "none";
- load = <CONFIG_TEXT_BASE>;
+ load = /bits/ 64 <CONFIG_TEXT_BASE>;
linux_blob: blob-ext {
filename = "Image";
@@ -64,10 +60,8 @@
os = "opensbi";
arch = "riscv";
compression = "none";
- load = <U64_TO_U32_H(CONFIG_SPL_OPENSBI_LOAD_ADDR)
- U64_TO_U32_L(CONFIG_SPL_OPENSBI_LOAD_ADDR)>;
- entry = <U64_TO_U32_H(CONFIG_SPL_OPENSBI_LOAD_ADDR)
- U64_TO_U32_L(CONFIG_SPL_OPENSBI_LOAD_ADDR)>;
+ load = /bits/ 64 <CONFIG_SPL_OPENSBI_LOAD_ADDR>;
+ entry = /bits/ 64 <CONFIG_SPL_OPENSBI_LOAD_ADDR>;
opensbi_blob: opensbi {
filename = "fw_dynamic.bin";
diff --git a/arch/riscv/dts/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/dts/jh7110-starfive-visionfive-2.dtsi
index e40f57a..e94f9fe 100644
--- a/arch/riscv/dts/jh7110-starfive-visionfive-2.dtsi
+++ b/arch/riscv/dts/jh7110-starfive-visionfive-2.dtsi
@@ -34,6 +34,11 @@
device_type = "memory";
reg = <0x0 0x40000000 0x2 0x0>;
};
+
+ gpio-restart {
+ compatible = "gpio-restart";
+ gpios = <&sysgpio 35 GPIO_ACTIVE_HIGH>;
+ };
};
&osc {
diff --git a/arch/riscv/dts/jh7110.dtsi b/arch/riscv/dts/jh7110.dtsi
index 13c47f7..6d2675d 100644
--- a/arch/riscv/dts/jh7110.dtsi
+++ b/arch/riscv/dts/jh7110.dtsi
@@ -533,6 +533,16 @@
#gpio-cells = <2>;
};
+ watchdog@13070000 {
+ compatible = "starfive,jh7110-wdt";
+ reg = <0x0 0x13070000 0x0 0x10000>;
+ clocks = <&syscrg JH7110_SYSCLK_WDT_APB>,
+ <&syscrg JH7110_SYSCLK_WDT_CORE>;
+ clock-names = "apb", "core";
+ resets = <&syscrg JH7110_SYSRST_WDT_APB>,
+ <&syscrg JH7110_SYSRST_WDT_CORE>;
+ };
+
mmc0: mmc@16010000 {
compatible = "starfive,jh7110-mmc";
reg = <0x0 0x16010000 0x0 0x10000>;
diff --git a/arch/riscv/dts/xilinx-mbv32.dts b/arch/riscv/dts/xilinx-mbv32.dts
new file mode 100644
index 0000000..94e42c2
--- /dev/null
+++ b/arch/riscv/dts/xilinx-mbv32.dts
@@ -0,0 +1,106 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * dts file for AMD MicroBlaze V
+ *
+ * (C) Copyright 2023, Advanced Micro Devices, Inc.
+ *
+ * Michal Simek <michal.simek@amd.com>
+ */
+
+/dts-v1/;
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ model = "AMD MicroBlaze V 32bit";
+ compatible = "qemu,mbv", "amd,mbv";
+
+ cpus: cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ timebase-frequency = <102000000>;
+ cpu_0: cpu@0 {
+ compatible = "amd,mbv32", "riscv";
+ device_type = "cpu";
+ reg = <0>;
+ riscv,isa = "rv32imafdc";
+ i-cache-size = <32768>;
+ d-cache-size = <32768>;
+ clock-frequency = <102000000>;
+ cpu0_intc: interrupt-controller {
+ compatible = "riscv,cpu-intc";
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+ };
+ };
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ bootargs = "earlycon";
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory@20000000 {
+ device_type = "memory";
+ reg = <0x20000000 0x20000000>;
+ };
+
+ clk102: clock {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <102000000>;
+ };
+
+ axi: axi {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "simple-bus";
+ ranges;
+ bootph-all;
+
+ axi_intc: interrupt-controller@41200000 {
+ compatible = "xlnx,xps-intc-1.00.a";
+ reg = <0x41200000 0x1000>;
+ interrupt-controller;
+ interrupt-parent = <&cpu0_intc>;
+ #interrupt-cells = <2>;
+ kind-of-intr = <0>;
+ };
+
+ xlnx_timer0: timer@41c00000 {
+ compatible = "xlnx,xps-timer-1.00.a";
+ reg = <0x41c00000 0x1000>;
+ interrupt-parent = <&axi_intc>;
+ interrupts = <1 2>;
+ bootph-all;
+ xlnx,one-timer-only = <0>;
+ clock-names = "s_axi_aclk";
+ clocks = <&clk102>;
+ };
+
+ xlnx_timer1: timer@41c20000 {
+ compatible = "xlnx,xps-timer-1.00.a";
+ reg = <0x41c20000 0x1000>;
+ interrupt-parent = <&axi_intc>;
+ interrupts = <0 2>;
+ xlnx,one-timer-only = <0>;
+ clock-names = "s_axi_aclk";
+ clocks = <&clk102>;
+ };
+
+ uart0: serial@40600000 {
+ compatible = "xlnx,xps-uartlite-1.00.a";
+ reg = <0x40600000 0x1000>;
+ interrupt-parent = <&axi_intc>;
+ interrupts = <2 2>;
+ bootph-all;
+ clocks = <&clk102>;
+ current-speed = <115200>;
+ xlnx,data-bits = <8>;
+ xlnx,use-parity = <0>;
+ };
+ };
+};
diff --git a/arch/riscv/include/asm/arch-andes/csr.h b/arch/riscv/include/asm/arch-andes/csr.h
index 393d51c..028fd01 100644
--- a/arch/riscv/include/asm/arch-andes/csr.h
+++ b/arch/riscv/include/asm/arch-andes/csr.h
@@ -12,20 +12,25 @@
#define CSR_MCACHE_CTL 0x7ca
#define CSR_MMISC_CTL 0x7d0
-#define CSR_MARCHID 0xf12
#define CSR_MCCTLCOMMAND 0x7cc
-#define MCACHE_CTL_IC_EN_OFFSET 0
-#define MCACHE_CTL_DC_EN_OFFSET 1
-#define MCACHE_CTL_CCTL_SUEN_OFFSET 8
-#define MCACHE_CTL_DC_COHEN_OFFSET 19
-#define MCACHE_CTL_DC_COHSTA_OFFSET 20
+/* mcache_ctl register */
-#define MCACHE_CTL_IC_EN BIT(MCACHE_CTL_IC_EN_OFFSET)
-#define MCACHE_CTL_DC_EN BIT(MCACHE_CTL_DC_EN_OFFSET)
-#define MCACHE_CTL_CCTL_SUEN BIT(MCACHE_CTL_CCTL_SUEN_OFFSET)
-#define MCACHE_CTL_DC_COHEN BIT(MCACHE_CTL_DC_COHEN_OFFSET)
-#define MCACHE_CTL_DC_COHSTA BIT(MCACHE_CTL_DC_COHSTA_OFFSET)
+#define MCACHE_CTL_IC_EN BIT(0)
+#define MCACHE_CTL_DC_EN BIT(1)
+#define MCACHE_CTL_IC_ECCEN BIT(3)
+#define MCACHE_CTL_DC_ECCEN BIT(5)
+#define MCACHE_CTL_CCTL_SUEN BIT(8)
+#define MCACHE_CTL_IC_PREFETCH_EN BIT(9)
+#define MCACHE_CTL_DC_PREFETCH_EN BIT(10)
+#define MCACHE_CTL_DC_WAROUND_EN BIT(13)
+#define MCACHE_CTL_L2C_WAROUND_EN BIT(15)
+#define MCACHE_CTL_TLB_ECCEN BIT(18)
+#define MCACHE_CTL_DC_COHEN BIT(19)
+#define MCACHE_CTL_DC_COHSTA BIT(20)
+
+/* mmisc_ctl register */
+#define MMISC_CTL_NON_BLOCKING_EN BIT(8)
#define CCTL_L1D_WBINVAL_ALL 6
diff --git a/arch/riscv/include/asm/csr.h b/arch/riscv/include/asm/csr.h
index 1a15089..986f951 100644
--- a/arch/riscv/include/asm/csr.h
+++ b/arch/riscv/include/asm/csr.h
@@ -142,6 +142,7 @@
#define CSR_CYCLEH 0xc80
#define CSR_TIMEH 0xc81
#define CSR_INSTRETH 0xc82
+#define CSR_MARCHID 0xf12
#define CSR_MHARTID 0xf14
#ifndef __ASSEMBLY__
diff --git a/arch/riscv/include/asm/global_data.h b/arch/riscv/include/asm/global_data.h
index 937fa4d..593d927 100644
--- a/arch/riscv/include/asm/global_data.h
+++ b/arch/riscv/include/asm/global_data.h
@@ -10,6 +10,7 @@
#ifndef __ASM_GBL_DATA_H
#define __ASM_GBL_DATA_H
+#include <linux/types.h>
#include <asm/smp.h>
#include <asm/u-boot.h>
#include <compiler.h>
@@ -32,6 +33,12 @@
ulong available_harts;
#endif
#endif
+#if CONFIG_IS_ENABLED(ACPI)
+ ulong table_start; /* Start address of ACPI tables */
+ ulong table_end; /* End address of ACPI tables */
+ ulong table_start_high; /* Start address of high ACPI tables */
+ ulong table_end_high; /* End address of high ACPI tables */
+#endif
#ifdef CONFIG_SMBIOS
ulong smbios_start; /* Start address of SMBIOS table */
#endif
diff --git a/arch/riscv/include/asm/io.h b/arch/riscv/include/asm/io.h
index 4170877..da16585 100644
--- a/arch/riscv/include/asm/io.h
+++ b/arch/riscv/include/asm/io.h
@@ -218,7 +218,8 @@
#define insw(p, d, l) readsw(__io(p), d, l)
#define insl(p, d, l) readsl(__io(p), d, l)
-static inline void readsb(unsigned int *addr, void *data, int bytelen)
+static inline void readsb(const volatile void __iomem *addr, void *data,
+ unsigned int bytelen)
{
unsigned char *ptr;
unsigned char *ptr2;
@@ -233,7 +234,8 @@
}
}
-static inline void readsw(unsigned int *addr, void *data, int wordlen)
+static inline void readsw(const volatile void __iomem *addr, void *data,
+ unsigned int wordlen)
{
unsigned short *ptr;
unsigned short *ptr2;
@@ -248,7 +250,8 @@
}
}
-static inline void readsl(unsigned int *addr, void *data, int longlen)
+static inline void readsl(const volatile void __iomem *addr, void *data,
+ unsigned int longlen)
{
unsigned int *ptr;
unsigned int *ptr2;
@@ -263,7 +266,8 @@
}
}
-static inline void writesb(unsigned int *addr, const void *data, int bytelen)
+static inline void writesb(volatile void __iomem *addr, const void *data,
+ unsigned int bytelen)
{
unsigned char *ptr;
unsigned char *ptr2;
@@ -278,7 +282,8 @@
}
}
-static inline void writesw(unsigned int *addr, const void *data, int wordlen)
+static inline void writesw(volatile void __iomem *addr, const void *data,
+ unsigned int wordlen)
{
unsigned short *ptr;
unsigned short *ptr2;
@@ -293,7 +298,8 @@
}
}
-static inline void writesl(unsigned int *addr, const void *data, int longlen)
+static inline void writesl(volatile void __iomem *addr, const void *data,
+ unsigned int longlen)
{
unsigned int *ptr;
unsigned int *ptr2;
@@ -307,6 +313,14 @@
longlen--;
}
}
+
+#define readsb readsb
+#define readsw readsw
+#define readsl readsl
+#define writesb writesb
+#define writesw writesw
+#define writesl writesl
+
#endif
#define outb_p(val, port) outb((val), (port))
diff --git a/arch/riscv/lib/andes_plicsw.c b/arch/riscv/lib/andes_plicsw.c
index 6a63661..c09e5c6 100644
--- a/arch/riscv/lib/andes_plicsw.c
+++ b/arch/riscv/lib/andes_plicsw.c
@@ -21,41 +21,36 @@
#include <linux/err.h>
/* pending register */
-#define PENDING_REG(base) ((ulong)(base) + 0x1000)
+#define PENDING_REG(base, hart) ((ulong)(base) + 0x1000 + 4 * (((hart) + 1) / 32))
/* enable register */
-#define ENABLE_REG(base, hart) ((ulong)(base) + 0x2000 + (hart) * 0x80)
+#define ENABLE_REG(base, hart) ((ulong)(base) + 0x2000 + (hart) * 0x80 + 4 * (((hart) + 1) / 32))
/* claim register */
#define CLAIM_REG(base, hart) ((ulong)(base) + 0x200004 + (hart) * 0x1000)
/* priority register */
#define PRIORITY_REG(base) ((ulong)(base) + PLICSW_PRIORITY_BASE)
/* Bit 0 of PLIC-SW pending array is hardwired to zero, so we start from bit 1 */
-#define FIRST_AVAILABLE_BIT 0x2
-#define SEND_IPI_TO_HART(hart) (FIRST_AVAILABLE_BIT << (hart))
#define PLICSW_PRIORITY_BASE 0x4
-#define PLICSW_INTERRUPT_PER_HART 0x1
DECLARE_GLOBAL_DATA_PTR;
static int enable_ipi(int hart)
{
- unsigned int en;
+ u32 enable_bit = (hart + 1) % 32;
- en = FIRST_AVAILABLE_BIT << hart;
- writel(en, (void __iomem *)ENABLE_REG(gd->arch.plicsw, hart));
+ writel(BIT(enable_bit), (void __iomem *)ENABLE_REG(gd->arch.plicsw, hart));
return 0;
}
static void init_priority_ipi(int hart_num)
{
- uint32_t *priority = (void *)PRIORITY_REG(gd->arch.plicsw);
+ u32 *priority = (void *)PRIORITY_REG(gd->arch.plicsw);
- for (int i = 0; i < hart_num * PLICSW_INTERRUPT_PER_HART; i++) {
- writel(1, &priority[i]);
- }
+ for (int i = 0; i < hart_num; i++)
+ writel(1, &priority[i]);
- return;
+ return;
}
int riscv_init_ipi(void)
@@ -104,9 +99,10 @@
int riscv_send_ipi(int hart)
{
- unsigned int ipi = SEND_IPI_TO_HART(hart);
+ u32 interrupt_id = hart + 1;
+ u32 pending_bit = interrupt_id % 32;
- writel(ipi, (void __iomem *)PENDING_REG(gd->arch.plicsw));
+ writel(BIT(pending_bit), (void __iomem *)PENDING_REG(gd->arch.plicsw, hart));
return 0;
}
@@ -123,10 +119,11 @@
int riscv_get_ipi(int hart, int *pending)
{
- unsigned int ipi = SEND_IPI_TO_HART(hart);
+ u32 interrupt_id = hart + 1;
+ u32 pending_bit = interrupt_id % 32;
- *pending = readl((void __iomem *)PENDING_REG(gd->arch.plicsw));
- *pending = !!(*pending & ipi);
+ *pending = readl((void __iomem *)PENDING_REG(gd->arch.plicsw, hart));
+ *pending = !!(*pending & BIT(pending_bit));
return 0;
}
diff --git a/arch/riscv/lib/bootm.c b/arch/riscv/lib/bootm.c
index f9e1e18..13cbaab 100644
--- a/arch/riscv/lib/bootm.c
+++ b/arch/riscv/lib/bootm.c
@@ -7,6 +7,7 @@
*/
#include <bootstage.h>
+#include <bootm.h>
#include <command.h>
#include <dm.h>
#include <fdt_support.h>
@@ -105,9 +106,10 @@
}
}
-int do_bootm_linux(int flag, int argc, char *const argv[],
- struct bootm_headers *images)
+int do_bootm_linux(int flag, struct bootm_info *bmi)
{
+ struct bootm_headers *images = bmi->images;
+
/* No need for those on RISC-V */
if (flag & BOOTM_STATE_OS_BD_T || flag & BOOTM_STATE_OS_CMDLINE)
return -1;
@@ -127,10 +129,9 @@
return 0;
}
-int do_bootm_vxworks(int flag, int argc, char *const argv[],
- struct bootm_headers *images)
+int do_bootm_vxworks(int flag, struct bootm_info *bmi)
{
- return do_bootm_linux(flag, argc, argv, images);
+ return do_bootm_linux(flag, bmi);
}
static ulong get_sp(void)
diff --git a/arch/riscv/lib/reset.c b/arch/riscv/lib/reset.c
index 712e1bd..c4153c9 100644
--- a/arch/riscv/lib/reset.c
+++ b/arch/riscv/lib/reset.c
@@ -4,14 +4,11 @@
*/
#include <command.h>
-#include <hang.h>
+#include <cpu_func.h>
int do_reset(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
{
- printf("resetting ...\n");
-
- printf("reset not supported yet\n");
- hang();
+ reset_cpu();
return 0;
}
diff --git a/arch/riscv/lib/sifive_cache.c b/arch/riscv/lib/sifive_cache.c
index 39b0248..d8fe1df 100644
--- a/arch/riscv/lib/sifive_cache.c
+++ b/arch/riscv/lib/sifive_cache.c
@@ -7,7 +7,10 @@
#include <cpu_func.h>
#include <log.h>
#include <dm.h>
+#include <dm/device-internal.h>
+#include <dm/uclass-internal.h>
+#ifndef CONFIG_SPL_BUILD
void enable_caches(void)
{
struct udevice *dev;
@@ -25,3 +28,21 @@
log_debug("ccache enable failed");
}
}
+#else
+static inline void probe_cache_device(struct driver *driver, struct udevice *dev)
+{
+ for (uclass_find_first_device(UCLASS_CACHE, &dev);
+ dev;
+ uclass_find_next_device(&dev)) {
+ if (dev->driver == driver)
+ device_probe(dev);
+ }
+}
+
+void enable_caches(void)
+{
+ struct udevice *dev = NULL;
+
+ probe_cache_device(DM_DRIVER_GET(sifive_pl2), dev);
+}
+#endif /* !CONFIG_SPL_BUILD */
diff --git a/arch/sandbox/cpu/cache.c b/arch/sandbox/cpu/cache.c
index 46c62c0..c8a5e64 100644
--- a/arch/sandbox/cpu/cache.c
+++ b/arch/sandbox/cpu/cache.c
@@ -3,7 +3,6 @@
* Copyright 2020, Heinrich Schuchardt <xypron.glpk@gmx.de>
*/
-#include <common.h>
#include <cpu_func.h>
#include <asm/state.h>
diff --git a/arch/sandbox/cpu/cpu.c b/arch/sandbox/cpu/cpu.c
index a1c5c7c..0ed85b3 100644
--- a/arch/sandbox/cpu/cpu.c
+++ b/arch/sandbox/cpu/cpu.c
@@ -5,7 +5,6 @@
#define LOG_CATEGORY LOGC_SANDBOX
-#include <common.h>
#include <bootstage.h>
#include <cpu_func.h>
#include <errno.h>
@@ -286,6 +285,14 @@
enable_pci_map = enable;
}
+void dcache_enable(void)
+{
+}
+
+void dcache_disable(void)
+{
+}
+
int dcache_status(void)
{
return 1;
diff --git a/arch/sandbox/cpu/eth-raw-os.c b/arch/sandbox/cpu/eth-raw-os.c
index e59b96b..92c35ae 100644
--- a/arch/sandbox/cpu/eth-raw-os.c
+++ b/arch/sandbox/cpu/eth-raw-os.c
@@ -256,7 +256,7 @@
strerror(errno));
return -errno;
}
- return retval;
+ return 0;
}
int sandbox_eth_raw_os_recv(void *packet, int *length,
diff --git a/arch/sandbox/cpu/sdl.c b/arch/sandbox/cpu/sdl.c
index 590e406..ed84646 100644
--- a/arch/sandbox/cpu/sdl.c
+++ b/arch/sandbox/cpu/sdl.c
@@ -72,7 +72,7 @@
static void sandbox_sdl_poll_events(void)
{
/*
- * We don't want to include common.h in this file since it uses
+ * We don't want to include cpu_func.h in this file since it uses
* system headers. So add a declation here.
*/
extern void reset_cpu(void);
diff --git a/arch/sandbox/cpu/spl.c b/arch/sandbox/cpu/spl.c
index 16b7662..9ad9da6 100644
--- a/arch/sandbox/cpu/spl.c
+++ b/arch/sandbox/cpu/spl.c
@@ -3,7 +3,6 @@
* Copyright (c) 2016 Google, Inc
*/
-#include <common.h>
#include <dm.h>
#include <hang.h>
#include <handoff.h>
diff --git a/arch/sandbox/cpu/start.c b/arch/sandbox/cpu/start.c
index 2589c2e..dce8041 100644
--- a/arch/sandbox/cpu/start.c
+++ b/arch/sandbox/cpu/start.c
@@ -3,7 +3,7 @@
* Copyright (c) 2011-2012 The Chromium OS Authors.
*/
-#include <common.h>
+#include <config.h>
#include <cli.h>
#include <command.h>
#include <efi_loader.h>
diff --git a/arch/sandbox/cpu/state.c b/arch/sandbox/cpu/state.c
index e38bb24..a9ca79e 100644
--- a/arch/sandbox/cpu/state.c
+++ b/arch/sandbox/cpu/state.c
@@ -3,9 +3,8 @@
* Copyright (c) 2011-2012 The Chromium OS Authors.
*/
-#include <common.h>
-#include <autoboot.h>
#include <bloblist.h>
+#include <config.h>
#include <errno.h>
#include <fdtdec.h>
#include <log.h>
diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
index 9131eda..e264b29 100644
--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
@@ -631,9 +631,10 @@
clocks = <&clk_fixed>,
<&clk_sandbox 1>,
<&clk_sandbox 0>,
+ <&ccf 11>,
<&clk_sandbox 3>,
<&clk_sandbox 2>;
- clock-names = "fixed", "i2c", "spi", "uart2", "uart1";
+ clock-names = "fixed", "i2c", "spi", "i2c_root", "uart2", "uart1";
};
clk-test2 {
@@ -654,6 +655,7 @@
ccf: clk-ccf {
compatible = "sandbox,clk-ccf";
+ #clock-cells = <1>;
};
efi-media {
@@ -1542,10 +1544,10 @@
spmi_gpios: gpios@c000 {
compatible = "qcom,pm8916-gpio";
reg = <0xc000 0x400>;
+ gpio-ranges = <&spmi_gpios 0 0 4>;
gpio-controller;
gpio-count = <4>;
#gpio-cells = <2>;
- gpio-bank-name="spmi";
};
};
};
diff --git a/arch/sandbox/include/asm/clk.h b/arch/sandbox/include/asm/clk.h
index 2b7dbca..d4e04ad 100644
--- a/arch/sandbox/include/asm/clk.h
+++ b/arch/sandbox/include/asm/clk.h
@@ -38,6 +38,7 @@
SANDBOX_CLK_TEST_ID_FIXED,
SANDBOX_CLK_TEST_ID_SPI,
SANDBOX_CLK_TEST_ID_I2C,
+ SANDBOX_CLK_TEST_ID_I2C_ROOT,
SANDBOX_CLK_TEST_ID_DEVM1,
SANDBOX_CLK_TEST_ID_DEVM2,
SANDBOX_CLK_TEST_ID_DEVM_NULL,
diff --git a/arch/sandbox/include/asm/global_data.h b/arch/sandbox/include/asm/global_data.h
index c697773..001b2b5 100644
--- a/arch/sandbox/include/asm/global_data.h
+++ b/arch/sandbox/include/asm/global_data.h
@@ -9,6 +9,8 @@
#ifndef __ASM_GBL_DATA_H
#define __ASM_GBL_DATA_H
+#include <linux/types.h>
+
/* Architecture-specific global data */
struct arch_global_data {
uint8_t *ram_buf; /* emulated RAM buffer */
diff --git a/arch/sandbox/include/asm/io.h b/arch/sandbox/include/asm/io.h
index 31ab728..a23bd64 100644
--- a/arch/sandbox/include/asm/io.h
+++ b/arch/sandbox/include/asm/io.h
@@ -6,6 +6,8 @@
#ifndef __SANDBOX_ASM_IO_H
#define __SANDBOX_ASM_IO_H
+#include <linux/types.h>
+
enum sandboxio_size_t {
SB_SIZE_8,
SB_SIZE_16,
@@ -28,20 +30,6 @@
void unmap_physmem(const void *vaddr, unsigned long flags);
#define unmap_physmem unmap_physmem
-#include <asm-generic/io.h>
-
-/* For sandbox, we want addresses to point into our RAM buffer */
-static inline void *map_sysmem(phys_addr_t paddr, unsigned long len)
-{
- return map_physmem(paddr, len, MAP_WRBACK);
-}
-
-/* Remove a previous mapping */
-static inline void unmap_sysmem(const void *vaddr)
-{
- unmap_physmem(vaddr, MAP_WRBACK);
-}
-
/* Map from a pointer to our RAM buffer */
phys_addr_t map_to_sysmem(const void *ptr);
@@ -229,5 +217,35 @@
#include <iotrace.h>
#include <asm/types.h>
+#include <asm-generic/io.h>
+
+/* For sandbox, we want addresses to point into our RAM buffer */
+static inline void *map_sysmem(phys_addr_t paddr, unsigned long len)
+{
+ return map_physmem(paddr, len, MAP_WRBACK);
+}
+
+/* Remove a previous mapping */
+static inline void unmap_sysmem(const void *vaddr)
+{
+ unmap_physmem(vaddr, MAP_WRBACK);
+}
+
+/**
+ * nomap_sysmem() - pass through an address unchanged
+ *
+ * This is used to indicate an address which should NOT be mapped, e.g. in
+ * SMBIOS tables. Using this function instead of a case shows that the sandbox
+ * conversion has been done
+ */
+static inline void *nomap_sysmem(phys_addr_t paddr, unsigned long len)
+{
+ return (void *)(uintptr_t)paddr;
+}
+
+static inline phys_addr_t nomap_to_sysmem(const void *ptr)
+{
+ return (phys_addr_t)(uintptr_t)ptr;
+}
#endif
diff --git a/arch/sandbox/include/asm/state.h b/arch/sandbox/include/asm/state.h
index 59a2059..c84a1f7 100644
--- a/arch/sandbox/include/asm/state.h
+++ b/arch/sandbox/include/asm/state.h
@@ -6,7 +6,6 @@
#ifndef __SANDBOX_STATE_H
#define __SANDBOX_STATE_H
-#include <config.h>
#include <sysreset.h>
#include <stdbool.h>
#include <linux/list.h>
diff --git a/arch/sandbox/lib/bootm.c b/arch/sandbox/lib/bootm.c
index dc8b8e4..8dbcd9f 100644
--- a/arch/sandbox/lib/bootm.c
+++ b/arch/sandbox/lib/bootm.c
@@ -4,7 +4,7 @@
* Copyright (c) 2015 Sjoerd Simons <sjoerd.simons@collabora.co.uk>
*/
-#include <common.h>
+#include <bootm.h>
#include <bootstage.h>
#include <image.h>
#include <asm/io.h>
@@ -64,8 +64,10 @@
return 0;
}
-int do_bootm_linux(int flag, int argc, char *argv[], struct bootm_headers *images)
+int do_bootm_linux(int flag, struct bootm_info *bmi)
{
+ struct bootm_headers *images = bmi->images;
+
if (flag & BOOTM_STATE_OS_PREP)
return boot_prep_linux(images);
@@ -78,3 +80,10 @@
return 0;
}
+
+/* used for testing 'booti' command */
+int booti_setup(ulong image, ulong *relocated_addr, ulong *size,
+ bool force_reloc)
+{
+ return 0;
+}
diff --git a/arch/sandbox/lib/fdt_fixup.c b/arch/sandbox/lib/fdt_fixup.c
index a646f20..e333bd5 100644
--- a/arch/sandbox/lib/fdt_fixup.c
+++ b/arch/sandbox/lib/fdt_fixup.c
@@ -2,7 +2,6 @@
#define LOG_CATEGORY LOGC_ARCH
-#include <common.h>
#include <fdt_support.h>
#include <log.h>
diff --git a/arch/sandbox/lib/interrupts.c b/arch/sandbox/lib/interrupts.c
index 4d7cbff..3f6583e 100644
--- a/arch/sandbox/lib/interrupts.c
+++ b/arch/sandbox/lib/interrupts.c
@@ -5,7 +5,6 @@
* found in the LICENSE file.
*/
-#include <common.h>
#include <efi_loader.h>
#include <irq_func.h>
#include <os.h>
diff --git a/arch/sandbox/lib/pci_io.c b/arch/sandbox/lib/pci_io.c
index 2038141..6040eac 100644
--- a/arch/sandbox/lib/pci_io.c
+++ b/arch/sandbox/lib/pci_io.c
@@ -8,7 +8,6 @@
* IO space access commands.
*/
-#include <common.h>
#include <command.h>
#include <dm.h>
#include <log.h>
diff --git a/arch/sh/lib/bootm.c b/arch/sh/lib/bootm.c
index b205e5e..05d586b 100644
--- a/arch/sh/lib/bootm.c
+++ b/arch/sh/lib/bootm.c
@@ -8,6 +8,7 @@
*/
#include <common.h>
+#include <bootm.h>
#include <command.h>
#include <env.h>
#include <image.h>
@@ -39,9 +40,10 @@
return val;
}
-int do_bootm_linux(int flag, int argc, char *const argv[],
- struct bootm_headers *images)
+int do_bootm_linux(int flag, struct bootm_info *bmi)
{
+ struct bootm_headers *images = bmi->images;
+
/* Linux kernel load address */
void (*kernel) (void) = (void (*)(void))images->ep;
/* empty_zero_page */
diff --git a/arch/x86/cpu/baytrail/acpi.c b/arch/x86/cpu/baytrail/acpi.c
index 4378846..ccc4851 100644
--- a/arch/x86/cpu/baytrail/acpi.c
+++ b/arch/x86/cpu/baytrail/acpi.c
@@ -7,6 +7,7 @@
#include <cpu.h>
#include <dm.h>
#include <log.h>
+#include <mapmem.h>
#include <acpi/acpi_s3.h>
#include <acpi/acpi_table.h>
#include <asm/io.h>
@@ -31,8 +32,6 @@
header->length = sizeof(struct acpi_fadt);
header->revision = 4;
- fadt->firmware_ctrl = (u32)ctx->facs;
- fadt->dsdt = (u32)ctx->dsdt;
fadt->preferred_pm_profile = ACPI_PM_MOBILE;
fadt->sci_int = 9;
fadt->smi_cmd = 0;
@@ -79,10 +78,8 @@
fadt->reset_reg.addrh = 0;
fadt->reset_value = SYS_RST | RST_CPU | FULL_RST;
- fadt->x_firmware_ctl_l = (u32)ctx->facs;
- fadt->x_firmware_ctl_h = 0;
- fadt->x_dsdt_l = (u32)ctx->dsdt;
- fadt->x_dsdt_h = 0;
+ fadt->x_firmware_ctrl = map_to_sysmem(ctx->facs);
+ fadt->x_dsdt = map_to_sysmem(ctx->dsdt);
fadt->x_pm1a_evt_blk.space_id = ACPI_ADDRESS_SPACE_IO;
fadt->x_pm1a_evt_blk.bit_width = fadt->pm1_evt_len * 8;
diff --git a/arch/x86/cpu/coreboot/Kconfig b/arch/x86/cpu/coreboot/Kconfig
index 178f8ad..085302c 100644
--- a/arch/x86/cpu/coreboot/Kconfig
+++ b/arch/x86/cpu/coreboot/Kconfig
@@ -27,5 +27,7 @@
imply X86_TSC_READ_BASE
imply USE_PREBOOT
select BINMAN if X86_64
+ select SYSINFO
+ imply SYSINFO_EXTRA
endif
diff --git a/arch/x86/cpu/quark/acpi.c b/arch/x86/cpu/quark/acpi.c
index 9a2d682..0e18cea 100644
--- a/arch/x86/cpu/quark/acpi.c
+++ b/arch/x86/cpu/quark/acpi.c
@@ -4,6 +4,7 @@
*/
#include <common.h>
+#include <mapmem.h>
#include <acpi/acpi_table.h>
#include <asm/processor.h>
#include <asm/tables.h>
@@ -26,8 +27,6 @@
header->length = sizeof(struct acpi_fadt);
header->revision = 4;
- fadt->firmware_ctrl = (u32)ctx->facs;
- fadt->dsdt = (u32)ctx->dsdt;
fadt->preferred_pm_profile = ACPI_PM_UNSPECIFIED;
fadt->sci_int = 9;
fadt->smi_cmd = 0;
@@ -74,10 +73,8 @@
fadt->reset_reg.addrh = 0;
fadt->reset_value = SYS_RST | RST_CPU | FULL_RST;
- fadt->x_firmware_ctl_l = (u32)ctx->facs;
- fadt->x_firmware_ctl_h = 0;
- fadt->x_dsdt_l = (u32)ctx->dsdt;
- fadt->x_dsdt_h = 0;
+ fadt->x_firmware_ctrl = map_to_sysmem(ctx->facs);
+ fadt->x_dsdt = map_to_sysmem(ctx->dsdt);
fadt->x_pm1a_evt_blk.space_id = ACPI_ADDRESS_SPACE_IO;
fadt->x_pm1a_evt_blk.bit_width = fadt->pm1_evt_len * 8;
diff --git a/arch/x86/cpu/tangier/acpi.c b/arch/x86/cpu/tangier/acpi.c
index 1c667c7..1d37cc9 100644
--- a/arch/x86/cpu/tangier/acpi.c
+++ b/arch/x86/cpu/tangier/acpi.c
@@ -8,6 +8,7 @@
#include <common.h>
#include <cpu.h>
#include <dm.h>
+#include <mapmem.h>
#include <acpi/acpi_table.h>
#include <asm/ioapic.h>
#include <asm/mpspec.h>
@@ -31,8 +32,6 @@
header->length = sizeof(struct acpi_fadt);
header->revision = 6;
- fadt->firmware_ctrl = (u32)ctx->facs;
- fadt->dsdt = (u32)ctx->dsdt;
fadt->preferred_pm_profile = ACPI_PM_UNSPECIFIED;
fadt->iapc_boot_arch = ACPI_FADT_VGA_NOT_PRESENT |
@@ -45,10 +44,8 @@
fadt->minor_revision = 2;
- fadt->x_firmware_ctl_l = (u32)ctx->facs;
- fadt->x_firmware_ctl_h = 0;
- fadt->x_dsdt_l = (u32)ctx->dsdt;
- fadt->x_dsdt_h = 0;
+ fadt->x_firmware_ctrl = map_to_sysmem(ctx->facs);
+ fadt->x_dsdt = map_to_sysmem(ctx->dsdt);
header->checksum = table_compute_checksum(fadt, header->length);
diff --git a/arch/x86/cpu/u-boot-64.lds b/arch/x86/cpu/u-boot-64.lds
index d0398ff..00a6d86 100644
--- a/arch/x86/cpu/u-boot-64.lds
+++ b/arch/x86/cpu/u-boot-64.lds
@@ -11,10 +11,6 @@
SECTIONS
{
-#ifndef CONFIG_CMDLINE
- /DISCARD/ : { *(__u_boot_list_2_cmd_*) }
-#endif
-
#ifdef CONFIG_TEXT_BASE
. = CONFIG_TEXT_BASE; /* Location of bootcode in flash */
#endif
diff --git a/arch/x86/cpu/u-boot-spl.lds b/arch/x86/cpu/u-boot-spl.lds
index a0a2a06..50b4b16 100644
--- a/arch/x86/cpu/u-boot-spl.lds
+++ b/arch/x86/cpu/u-boot-spl.lds
@@ -11,10 +11,6 @@
SECTIONS
{
-#ifndef CONFIG_CMDLINE
- /DISCARD/ : { *(__u_boot_list_2_cmd_*) }
-#endif
-
. = IMAGE_TEXT_BASE; /* Location of bootcode in flash */
__text_start = .;
.text : {
diff --git a/arch/x86/cpu/u-boot.lds b/arch/x86/cpu/u-boot.lds
index a31f422..c418ff4 100644
--- a/arch/x86/cpu/u-boot.lds
+++ b/arch/x86/cpu/u-boot.lds
@@ -11,10 +11,6 @@
SECTIONS
{
-#ifndef CONFIG_CMDLINE
- /DISCARD/ : { *(__u_boot_list_2_cmd_*) }
-#endif
-
. = CONFIG_TEXT_BASE; /* Location of bootcode in flash */
__text_start = .;
diff --git a/arch/x86/dts/chromebook_coral.dts b/arch/x86/dts/chromebook_coral.dts
index 8bfb2c0..2412801 100644
--- a/arch/x86/dts/chromebook_coral.dts
+++ b/arch/x86/dts/chromebook_coral.dts
@@ -369,12 +369,14 @@
rw-mrc-cache {
label = "rw-mrc-cache";
reg = <0x008e0000 0x00010000>;
- bootph-all;
+ bootph-some-ram;
+ bootph-pre-ram;
};
rw-var-mrc-cache {
label = "rw-mrc-cache";
reg = <0x008f0000 0x0001000>;
- bootph-all;
+ bootph-some-ram;
+ bootph-pre-ram;
};
};
};
diff --git a/arch/x86/dts/coreboot.dts b/arch/x86/dts/coreboot.dts
index 0eb31ca..dfce7c2 100644
--- a/arch/x86/dts/coreboot.dts
+++ b/arch/x86/dts/coreboot.dts
@@ -45,4 +45,8 @@
bootph-some-ram;
compatible = "coreboot-fb";
};
+
+ sysinfo {
+ compatible = "coreboot,sysinfo";
+ };
};
diff --git a/arch/x86/include/asm/acpi_table.h b/arch/x86/include/asm/acpi_table.h
index 226753b..57e4165 100644
--- a/arch/x86/include/asm/acpi_table.h
+++ b/arch/x86/include/asm/acpi_table.h
@@ -65,15 +65,6 @@
int acpi_create_gnvs(struct acpi_global_nvs *gnvs);
/**
- * acpi_get_rsdp_addr() - get ACPI RSDP table address
- *
- * This routine returns the ACPI RSDP table address in the system memory.
- *
- * @return: ACPI RSDP table address
- */
-ulong acpi_get_rsdp_addr(void);
-
-/**
* arch_read_sci_irq_select() - Read the system-control interrupt number
*
* @returns value of IRQ register in the PMC
diff --git a/arch/x86/include/asm/global_data.h b/arch/x86/include/asm/global_data.h
index 6f4a713..1ef7f1f 100644
--- a/arch/x86/include/asm/global_data.h
+++ b/arch/x86/include/asm/global_data.h
@@ -9,6 +9,7 @@
#ifndef __ASSEMBLY__
+#include <linux/types.h>
#include <asm/processor.h>
#include <asm/mrccache.h>
diff --git a/arch/x86/include/asm/io.h b/arch/x86/include/asm/io.h
index 83dc097..5efb2e1 100644
--- a/arch/x86/include/asm/io.h
+++ b/arch/x86/include/asm/io.h
@@ -202,10 +202,16 @@
__INS(b)
__INS(w)
__INS(l)
+#define insb insb
+#define insw insw
+#define insl insl
__OUTS(b)
__OUTS(w)
__OUTS(l)
+#define outsb outsb
+#define outsw outsw
+#define outsl outsl
/* IO space accessors */
#define clrio(type, addr, clear) \
diff --git a/arch/x86/lib/acpi_table.c b/arch/x86/lib/acpi_table.c
index c5b33dc..5ecd3d4 100644
--- a/arch/x86/lib/acpi_table.c
+++ b/arch/x86/lib/acpi_table.c
@@ -197,7 +197,7 @@
tcpa->platform_class = 0;
tcpa->laml = size;
- tcpa->lasa = map_to_sysmem(log);
+ tcpa->lasa = nomap_to_sysmem(log);
/* (Re)calculate length and checksum */
current = (u32)tcpa + sizeof(struct acpi_tcpa);
@@ -268,7 +268,7 @@
/* Fill the log area size and start address fields. */
tpm2->laml = tpm2_log_len;
- tpm2->lasa = map_to_sysmem(lasa);
+ tpm2->lasa = nomap_to_sysmem(lasa);
/* Calculate checksum. */
header->checksum = table_compute_checksum(tpm2, header->length);
@@ -430,7 +430,7 @@
u32 *gnvs = (u32 *)((u32)ctx->dsdt + i);
if (*gnvs == ACPI_GNVS_ADDR) {
- *gnvs = map_to_sysmem(ctx->current);
+ *gnvs = nomap_to_sysmem(ctx->current);
log_debug("Fix up global NVS in DSDT to %#08x\n",
*gnvs);
break;
@@ -572,13 +572,8 @@
memcpy(header->aslc_id, ASLC_ID, 4);
header->aslc_revision = 1;
- fadt->firmware_ctrl = (unsigned long)facs;
- fadt->dsdt = (unsigned long)dsdt;
-
- fadt->x_firmware_ctl_l = (unsigned long)facs;
- fadt->x_firmware_ctl_h = 0;
- fadt->x_dsdt_l = (unsigned long)dsdt;
- fadt->x_dsdt_h = 0;
+ fadt->x_firmware_ctrl = map_to_sysmem(facs);
+ fadt->x_dsdt = map_to_sysmem(dsdt);
fadt->preferred_pm_profile = ACPI_PM_MOBILE;
diff --git a/arch/x86/lib/bootm.c b/arch/x86/lib/bootm.c
index 3196f9d..050c420 100644
--- a/arch/x86/lib/bootm.c
+++ b/arch/x86/lib/bootm.c
@@ -8,6 +8,7 @@
*/
#include <common.h>
+#include <bootm.h>
#include <bootstage.h>
#include <command.h>
#include <efi.h>
@@ -237,9 +238,10 @@
images->os.arch == IH_ARCH_X86_64);
}
-int do_bootm_linux(int flag, int argc, char *const argv[],
- struct bootm_headers *images)
+int do_bootm_linux(int flag, struct bootm_info *bmi)
{
+ struct bootm_headers *images = bmi->images;
+
/* No need for those on x86 */
if (flag & BOOTM_STATE_OS_BD_T || flag & BOOTM_STATE_OS_CMDLINE)
return -1;
diff --git a/arch/x86/lib/tables.c b/arch/x86/lib/tables.c
index 5b5070f..12eae17 100644
--- a/arch/x86/lib/tables.c
+++ b/arch/x86/lib/tables.c
@@ -16,6 +16,7 @@
#include <asm/mpspec.h>
#include <asm/tables.h>
#include <asm/coreboot_tables.h>
+#include <linux/log2.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -61,7 +62,7 @@
#ifdef CONFIG_GENERATE_ACPI_TABLE
{ "acpi", write_acpi_tables, BLOBLISTT_ACPI_TABLES, 0x10000, 0x1000},
#endif
-#ifdef CONFIG_GENERATE_SMBIOS_TABLE
+#if defined(CONFIG_GENERATE_SMBIOS_TABLE) && !defined(CONFIG_QFW_SMBIOS)
{ "smbios", write_smbios_table, BLOBLISTT_SMBIOS_TABLES, 0x1000, 0x100},
#endif
};
@@ -104,7 +105,7 @@
if (!gd->arch.table_end)
gd->arch.table_end = rom_addr;
rom_addr = (ulong)bloblist_add(table->tag, size,
- table->align);
+ ilog2(table->align));
if (!rom_addr)
return log_msg_ret("bloblist", -ENOBUFS);
diff --git a/arch/xtensa/include/asm/io.h b/arch/xtensa/include/asm/io.h
index 76a646e..87ad9fa 100644
--- a/arch/xtensa/include/asm/io.h
+++ b/arch/xtensa/include/asm/io.h
@@ -76,6 +76,12 @@
void outsb(unsigned long port, const void *src, unsigned long count);
void outsw(unsigned long port, const void *src, unsigned long count);
void outsl(unsigned long port, const void *src, unsigned long count);
+#define insb insb
+#define insw insw
+#define insl insl
+#define outsb outsb
+#define outsw outsw
+#define outsl outsl
#define IO_SPACE_LIMIT ~0
diff --git a/arch/xtensa/lib/bootm.c b/arch/xtensa/lib/bootm.c
index fee3392..9780d46 100644
--- a/arch/xtensa/lib/bootm.c
+++ b/arch/xtensa/lib/bootm.c
@@ -5,6 +5,7 @@
*/
#include <common.h>
+#include <bootm.h>
#include <bootstage.h>
#include <command.h>
#include <cpu_func.h>
@@ -134,8 +135,9 @@
* Boot Linux.
*/
-int do_bootm_linux(int flag, int argc, char *argv[], struct bootm_headers *images)
+int do_bootm_linux(int flag, struct bootm_info *bmi)
{
+ struct bootm_headers *images = bmi->images;
struct bp_tag *params, *params_start;
ulong initrd_start, initrd_end;
char *commandline = env_get("bootargs");
diff --git a/board/AndesTech/ae350/ae350.c b/board/AndesTech/ae350/ae350.c
index 772c6bf..4e53fee 100644
--- a/board/AndesTech/ae350/ae350.c
+++ b/board/AndesTech/ae350/ae350.c
@@ -13,7 +13,9 @@
#if defined(CONFIG_FTMAC100) && !defined(CONFIG_DM_ETH)
#include <netdev.h>
#endif
+#include <asm/csr.h>
#include <asm/global_data.h>
+#include <asm/sbi.h>
#include <linux/io.h>
#include <faraday/ftsmc020.h>
#include <fdtdec.h>
@@ -27,6 +29,27 @@
/*
* Miscellaneous platform dependent initializations
*/
+#if IS_ENABLED(CONFIG_MISC_INIT_R)
+int misc_init_r(void)
+{
+ long csr_marchid = 0;
+ const long mask_64 = 0x8000;
+ const long mask_cpu = 0xff;
+ char cpu_name[10] = {};
+
+#if CONFIG_IS_ENABLED(RISCV_SMODE)
+ sbi_get_marchid(&csr_marchid);
+#elif CONFIG_IS_ENABLED(RISCV_MMODE)
+ csr_marchid = csr_read(CSR_MARCHID);
+#endif
+ if (mask_64 & csr_marchid)
+ snprintf(cpu_name, sizeof(cpu_name), "ax%lx", (mask_cpu & csr_marchid));
+ else
+ snprintf(cpu_name, sizeof(cpu_name), "a%lx", (mask_cpu & csr_marchid));
+
+ return env_set("cpu", cpu_name);
+}
+#endif
#if CONFIG_IS_ENABLED(LOAD_FIT) || CONFIG_IS_ENABLED(LOAD_FIT_FULL)
#define ANDES_SPL_FDT_ADDR (CONFIG_TEXT_BASE - 0x100000)
@@ -102,7 +125,8 @@
void spl_board_init()
{
/* enable v5l2 cache */
- enable_caches();
+ if (!CONFIG_IS_ENABLED(SYS_DCACHE_OFF))
+ enable_caches();
}
#endif
diff --git a/board/BuR/common/br_resetc.h b/board/BuR/common/br_resetc.h
index ba0689b..999045b 100644
--- a/board/BuR/common/br_resetc.h
+++ b/board/BuR/common/br_resetc.h
@@ -7,7 +7,6 @@
*/
#ifndef __CONFIG_BRRESETC_H__
#define __CONFIG_BRRESETC_H__
-#include <common.h>
int br_resetc_regget(u8 reg, u8 *dst);
int br_resetc_regset(u8 reg, u8 val);
diff --git a/board/CZ.NIC/turris_mox/mox_sp.h b/board/CZ.NIC/turris_mox/mox_sp.h
index 720880d..c766c74 100644
--- a/board/CZ.NIC/turris_mox/mox_sp.h
+++ b/board/CZ.NIC/turris_mox/mox_sp.h
@@ -6,8 +6,6 @@
#ifndef _BOARD_CZNIC_TURRIS_MOX_MOX_SP_H_
#define _BOARD_CZNIC_TURRIS_MOX_MOX_SP_H_
-#include <common.h>
-
enum cznic_a3720_board {
BOARD_UNDEFINED = 0x0,
BOARD_TURRIS_MOX = 0x1,
diff --git a/board/CZ.NIC/turris_mox/turris_mox.c b/board/CZ.NIC/turris_mox/turris_mox.c
index 63b8699..3489bdd 100644
--- a/board/CZ.NIC/turris_mox/turris_mox.c
+++ b/board/CZ.NIC/turris_mox/turris_mox.c
@@ -562,7 +562,7 @@
}
}
-int show_board_info(void)
+int checkboard(void)
{
int i, ret, board_version, ram_size, is_sd;
const char *pub_key, *model;
diff --git a/board/CZ.NIC/turris_omnia/turris_omnia.c b/board/CZ.NIC/turris_omnia/turris_omnia.c
index 19c5043..adeb69a 100644
--- a/board/CZ.NIC/turris_omnia/turris_omnia.c
+++ b/board/CZ.NIC/turris_omnia/turris_omnia.c
@@ -962,7 +962,7 @@
return 0;
}
-int show_board_info(void)
+int checkboard(void)
{
char serial[17];
int err;
diff --git a/board/Marvell/mvebu_armada-37xx/board.c b/board/Marvell/mvebu_armada-37xx/board.c
index 04124d8..1685b12 100644
--- a/board/Marvell/mvebu_armada-37xx/board.c
+++ b/board/Marvell/mvebu_armada-37xx/board.c
@@ -14,6 +14,7 @@
#include <mmc.h>
#include <miiphy.h>
#include <phy.h>
+#include <fdt_support.h>
#include <asm/global_data.h>
#include <asm/io.h>
#include <asm/arch/cpu.h>
@@ -50,6 +51,7 @@
/* Single-chip mode */
/* Switch Port Registers */
#define MVEBU_SW_LINK_CTRL_REG (1)
+#define MVEBU_SW_PORT_SWITCH_ID (3)
#define MVEBU_SW_PORT_CTRL_REG (4)
#define MVEBU_SW_PORT_BASE_VLAN (6)
@@ -57,6 +59,8 @@
#define MVEBU_G2_SMI_PHY_CMD_REG (24)
#define MVEBU_G2_SMI_PHY_DATA_REG (25)
+#define SWITCH_88E6361_PRODUCT_NUMBER 0x2610
+
/*
* Memory Controller Registers
*
@@ -73,6 +77,30 @@
#define A3700_MC_CTRL2_SDRAM_TYPE_DDR3 2
#define A3700_MC_CTRL2_SDRAM_TYPE_DDR4 3
+static bool is_edpu_plus(void)
+{
+ struct udevice *bus;
+ ofnode node;
+ int val;
+
+ if (!CONFIG_IS_ENABLED(DM_MDIO))
+ return false;
+
+ node = ofnode_by_compatible(ofnode_null(), "marvell,orion-mdio");
+ if (!ofnode_valid(node) ||
+ uclass_get_device_by_ofnode(UCLASS_MDIO, node, &bus) ||
+ device_probe(bus)) {
+ printf("Cannot find MDIO bus\n");
+ return -ENODEV;
+ }
+
+ val = dm_mdio_read(bus, 0x0, MDIO_DEVAD_NONE, MVEBU_SW_PORT_SWITCH_ID);
+ if (val == SWITCH_88E6361_PRODUCT_NUMBER)
+ return true;
+ else
+ return false;
+}
+
int board_early_init_f(void)
{
return 0;
@@ -301,14 +329,12 @@
return 0;
}
-/* Bring-up board-specific network stuff */
-static int last_stage_init(void)
+static int espressobin_last_stage_init(void)
{
struct udevice *bus;
ofnode node;
- if (!CONFIG_IS_ENABLED(DM_MDIO) ||
- !of_machine_is_compatible("globalscale,espressobin"))
+ if (!CONFIG_IS_ENABLED(DM_MDIO))
return 0;
node = ofnode_by_compatible(ofnode_null(), "marvell,orion-mdio");
@@ -358,23 +384,66 @@
return 0;
}
-EVENT_SPY_SIMPLE(EVT_LAST_STAGE_INIT, last_stage_init);
+static int edpu_plus_last_stage_init(void)
+{
+ struct udevice *dev;
+ int ret;
+
+ if (is_edpu_plus()) {
+ ret = uclass_get_device_by_name(UCLASS_ETH,
+ "ethernet@40000",
+ &dev);
+ if (!ret) {
+ device_remove(dev, DM_REMOVE_NORMAL);
+ device_unbind(dev);
+ }
+
+ /* Currently no networking support on the eDPU+ board */
+ ret = uclass_get_device_by_name(UCLASS_ETH,
+ "ethernet@30000",
+ &dev);
+ if (!ret) {
+ device_remove(dev, DM_REMOVE_NORMAL);
+ device_unbind(dev);
+ }
+ } else {
+ ret = uclass_get_device_by_name(UCLASS_ETH,
+ "ethernet@30000",
+ &dev);
+ if (!ret) {
+ device_remove(dev, DM_REMOVE_NORMAL);
+ device_unbind(dev);
+ }
+ }
+
+ return 0;
+}
+
+/* Bring-up board-specific network stuff */
+static int last_stage_init(void)
+{
+
+ if (of_machine_is_compatible("globalscale,espressobin"))
+ return espressobin_last_stage_init();
+
+ if (of_machine_is_compatible("methode,edpu"))
+ return edpu_plus_last_stage_init();
+
+ return 0;
+}
+EVENT_SPY_SIMPLE(EVT_LAST_STAGE_INIT, last_stage_init);
#endif
#ifdef CONFIG_OF_BOARD_SETUP
-int ft_board_setup(void *blob, struct bd_info *bd)
+static int espressobin_fdt_setup(void *blob)
{
-#ifdef CONFIG_ENV_IS_IN_SPI_FLASH
int ret;
int spi_off;
int parts_off;
int part_off;
/* Fill SPI MTD partitions for Linux kernel on Espressobin */
- if (!of_machine_is_compatible("globalscale,espressobin"))
- return 0;
-
spi_off = fdt_node_offset_by_compatible(blob, -1, "jedec,spi-nor");
if (spi_off < 0)
return 0;
@@ -459,7 +528,77 @@
return 0;
}
+ return 0;
+}
+
+static int edpu_plus_fdt_setup(void *blob)
+{
+ const char *ports[] = { "downlink", "uplink" };
+ uint8_t mac[ETH_ALEN];
+ const char *path;
+ int i, ret;
+
+ if (is_edpu_plus()) {
+ ret = fdt_set_status_by_compatible(blob,
+ "marvell,orion-mdio",
+ FDT_STATUS_OKAY);
+ if (ret)
+ printf("Failed to enable MDIO!\n");
+
+ ret = fdt_set_status_by_alias(blob,
+ "ethernet1",
+ FDT_STATUS_DISABLED);
+ if (ret)
+ printf("Failed to disable ethernet1!\n");
+
+ path = fdt_get_alias(blob, "ethernet0");
+ if (path)
+ do_fixup_by_path_string(blob, path, "phy-mode", "2500base-x");
+ else
+ printf("Failed to update ethernet0 phy-mode to 2500base-x!\n");
+
+ ret = fdt_set_status_by_compatible(blob,
+ "marvell,mv88e6190",
+ FDT_STATUS_OKAY);
+ if (ret)
+ printf("Failed to enable MV88E6361!\n");
+
+ /*
+ * MAC-s for Uplink and Downlink ports are stored under
+ * non standard variable names, so lets manually fixup the
+ * switch port nodes to have the desired MAC-s.
+ */
+ for (i = 0; i < 2; i++) {
+ if (eth_env_get_enetaddr(ports[i], mac)) {
+ do_fixup_by_prop(blob,
+ "label",
+ ports[i],
+ strlen(ports[i]) + 1,
+ "mac-address",
+ mac, ARP_HLEN, 1);
+
+ do_fixup_by_prop(blob,
+ "label",
+ ports[i],
+ strlen(ports[i]) + 1,
+ "local-mac-address",
+ mac, ARP_HLEN, 1);
+ }
+ }
+ }
+
+ return 0;
+}
+
+int ft_board_setup(void *blob, struct bd_info *bd)
+{
+#ifdef CONFIG_ENV_IS_IN_SPI_FLASH
+ if (of_machine_is_compatible("globalscale,espressobin"))
+ return espressobin_fdt_setup(blob);
#endif
+ if (of_machine_is_compatible("methode,edpu"))
+ return edpu_plus_fdt_setup(blob);
+
return 0;
}
#endif
diff --git a/board/abilis/tb100/tb100.c b/board/abilis/tb100/tb100.c
index 3dc9e14..eb7d129 100644
--- a/board/abilis/tb100/tb100.c
+++ b/board/abilis/tb100/tb100.c
@@ -14,6 +14,10 @@
writel(0x1, (void *)CRM_SWRESET);
}
+/*
+ * Ethernet configuration
+ */
+#define ETH0_BASE_ADDRESS 0xFE100000
int board_eth_init(struct bd_info *bis)
{
if (designware_initialize(ETH0_BASE_ADDRESS, 0) >= 0)
diff --git a/board/anbernic/rgxx3_rk3566/rgxx3-rk3566.c b/board/anbernic/rgxx3_rk3566/rgxx3-rk3566.c
index 3f1a42d..d05502f 100644
--- a/board/anbernic/rgxx3_rk3566/rgxx3-rk3566.c
+++ b/board/anbernic/rgxx3_rk3566/rgxx3-rk3566.c
@@ -16,7 +16,6 @@
#include <mmc.h>
#include <panel.h>
#include <pwm.h>
-#include <rng.h>
#include <stdlib.h>
#include <video_bridge.h>
@@ -40,6 +39,7 @@
const char *board;
const char *board_name;
const char *fdtfile;
+ const bool detect_panel;
};
enum rgxx3_device_id {
@@ -47,59 +47,106 @@
RG353P,
RG353V,
RG503,
+ RGB30,
+ RK2023,
+ RGARCD,
/* Devices with duplicate ADC value */
RG353PS,
RG353VS,
+ RGARCS,
};
static const struct rg3xx_model rg3xx_model_details[] = {
[RG353M] = {
- 517, /* Observed average from device */
- "rk3566-anbernic-rg353m",
- "RG353M",
- DTB_DIR "rk3566-anbernic-rg353p.dtb", /* Identical devices */
+ .adc_value = 517, /* Observed average from device */
+ .board = "rk3566-anbernic-rg353m",
+ .board_name = "RG353M",
+ /* Device is identical to RG353P. */
+ .fdtfile = DTB_DIR "rk3566-anbernic-rg353p.dtb",
+ .detect_panel = 1,
},
[RG353P] = {
- 860, /* Documented value of 860 */
- "rk3566-anbernic-rg353p",
- "RG353P",
- DTB_DIR "rk3566-anbernic-rg353p.dtb",
+ .adc_value = 860, /* Documented value of 860 */
+ .board = "rk3566-anbernic-rg353p",
+ .board_name = "RG353P",
+ .fdtfile = DTB_DIR "rk3566-anbernic-rg353p.dtb",
+ .detect_panel = 1,
},
[RG353V] = {
- 695, /* Observed average from device */
- "rk3566-anbernic-rg353v",
- "RG353V",
- DTB_DIR "rk3566-anbernic-rg353v.dtb",
+ .adc_value = 695, /* Observed average from device */
+ .board = "rk3566-anbernic-rg353v",
+ .board_name = "RG353V",
+ .fdtfile = DTB_DIR "rk3566-anbernic-rg353v.dtb",
+ .detect_panel = 1,
},
[RG503] = {
- 1023, /* Observed average from device */
- "rk3566-anbernic-rg503",
- "RG503",
- DTB_DIR "rk3566-anbernic-rg503.dtb",
+ .adc_value = 1023, /* Observed average from device */
+ .board = "rk3566-anbernic-rg503",
+ .board_name = "RG503",
+ .fdtfile = DTB_DIR "rk3566-anbernic-rg503.dtb",
+ .detect_panel = 0,
+ },
+ [RGB30] = {
+ .adc_value = 383, /* Gathered from second hand information */
+ .board = "rk3566-powkiddy-rgb30",
+ .board_name = "RGB30",
+ .fdtfile = DTB_DIR "rk3566-powkiddy-rgb30.dtb",
+ .detect_panel = 0,
+ },
+ [RK2023] = {
+ .adc_value = 635, /* Observed average from device */
+ .board = "rk3566-powkiddy-rk2023",
+ .board_name = "RK2023",
+ .fdtfile = DTB_DIR "rk3566-powkiddy-rk2023.dtb",
+ .detect_panel = 0,
+ },
+ [RGARCD] = {
+ .adc_value = 183, /* Observed average from device */
+ .board = "rk3566-anbernic-rg-arc-d",
+ .board_name = "Anbernic RG ARC-D",
+ .fdtfile = DTB_DIR "rk3566-anbernic-rg-arc-d.dtb",
+ .detect_panel = 0,
},
/* Devices with duplicate ADC value */
[RG353PS] = {
- 860, /* Observed average from device */
- "rk3566-anbernic-rg353ps",
- "RG353PS",
- DTB_DIR "rk3566-anbernic-rg353ps.dtb",
+ .adc_value = 860, /* Observed average from device */
+ .board = "rk3566-anbernic-rg353ps",
+ .board_name = "RG353PS",
+ .fdtfile = DTB_DIR "rk3566-anbernic-rg353ps.dtb",
+ .detect_panel = 1,
},
[RG353VS] = {
- 695, /* Gathered from second hand information */
- "rk3566-anbernic-rg353vs",
- "RG353VS",
- DTB_DIR "rk3566-anbernic-rg353vs.dtb",
+ .adc_value = 695, /* Gathered from second hand information */
+ .board = "rk3566-anbernic-rg353vs",
+ .board_name = "RG353VS",
+ .fdtfile = DTB_DIR "rk3566-anbernic-rg353vs.dtb",
+ .detect_panel = 1,
+ },
+ [RGARCS] = {
+ .adc_value = 183, /* Observed average from device */
+ .board = "rk3566-anbernic-rg-arc-s",
+ .board_name = "Anbernic RG ARC-S",
+ .fdtfile = DTB_DIR "rk3566-anbernic-rg-arc-s.dtb",
+ .detect_panel = 0,
},
};
struct rg353_panel {
const u16 id;
- const char *panel_compat;
+ const char *panel_compat[2];
};
static const struct rg353_panel rg353_panel_details[] = {
- { .id = 0x3052, .panel_compat = "newvision,nv3051d"},
- { .id = 0x3821, .panel_compat = "anbernic,rg353v-panel-v2"},
+ {
+ .id = 0x3052,
+ .panel_compat[0] = "anbernic,rg353p-panel",
+ .panel_compat[1] = "newvision,nv3051d",
+ },
+ {
+ .id = 0x3821,
+ .panel_compat[0] = "anbernic,rg353v-panel-v2",
+ .panel_compat[1] = NULL,
+ },
};
/*
@@ -117,34 +164,6 @@
(GPIO0_BASE + GPIO_SWPORT_DR_H));
}
-/* Use hardware rng to seed Linux random. */
-int board_rng_seed(struct abuf *buf)
-{
- struct udevice *dev;
- size_t len = 0x8;
- u64 *data;
-
- data = malloc(len);
- if (!data) {
- printf("Out of memory\n");
- return -ENOMEM;
- }
-
- if (uclass_get_device(UCLASS_RNG, 0, &dev) || !dev) {
- printf("No RNG device\n");
- return -ENODEV;
- }
-
- if (dm_rng_read(dev, data, len)) {
- printf("Reading RNG failed\n");
- return -EIO;
- }
-
- abuf_init_set(buf, data, len);
-
- return 0;
-}
-
/*
* Buzz the buzzer so the user knows something is going on. Make it
* optional in case PWM is disabled.
@@ -298,11 +317,10 @@
if (!panel) {
printf("Unable to identify panel_id %x\n",
(panel_id[0] << 8) | panel_id[1]);
- env_set("panel", "unknown");
return -EINVAL;
}
- env_set("panel", panel->panel_compat);
+ env_set("panel", panel->panel_compat[0]);
return 0;
}
@@ -342,19 +360,21 @@
}
/*
- * Try to access the eMMC on an RG353V or RG353P. If it's
- * missing, it's an RG353VS or RG353PS. Note we could also
- * check for a touchscreen at 0x1a on i2c2.
+ * Try to access the eMMC on an RG353V, RG353P, or RG Arc D.
+ * If it's missing, it's an RG353VS, RG353PS, or RG Arc S.
+ * Note we could also check for a touchscreen at 0x1a on i2c2.
*/
- if (board_id == RG353V || board_id == RG353P) {
+ if (board_id == RG353V || board_id == RG353P || board_id == RGARCD) {
mmc = find_mmc_device(0);
if (mmc) {
ret = mmc_init(mmc);
if (ret) {
if (board_id == RG353V)
board_id = RG353VS;
- else
+ else if (board_id == RG353P)
board_id = RG353PS;
+ else
+ board_id = RGARCS;
}
}
}
@@ -367,13 +387,14 @@
rg3xx_model_details[board_id].board_name);
env_set("fdtfile", rg3xx_model_details[board_id].fdtfile);
- /* Detect the panel type for any device that isn't a 503. */
- if (board_id == RG503)
+ /* Skip panel detection for when it is not needed. */
+ if (!rg3xx_model_details[board_id].detect_panel)
return 0;
+ /* Warn but don't fail for errors in auto-detection of the panel. */
ret = rgxx3_detect_display();
if (ret)
- return ret;
+ printf("Failed to detect panel type\n");
return 0;
}
@@ -400,7 +421,8 @@
int ft_board_setup(void *blob, struct bd_info *bd)
{
- int node, ret;
+ const struct rg353_panel *panel = NULL;
+ int node, ret, i;
char *env;
/* No fixups necessary for the RG503 */
@@ -414,6 +436,12 @@
rg3xx_model_details[RG353M].board_name,
sizeof(rg3xx_model_details[RG353M].board_name));
+ env = env_get("panel");
+ if (!env) {
+ printf("Can't get panel env\n");
+ return 0;
+ }
+
/*
* Check if the environment variable doesn't equal the panel.
* If it doesn't, update the devicetree to the correct panel.
@@ -424,12 +452,6 @@
return -ENODEV;
}
- env = env_get("panel");
- if (!env) {
- printf("Can't get panel env\n");
- return -ENODEV;
- }
-
ret = fdt_node_check_compatible(blob, node, env);
if (ret < 0)
return -ENODEV;
@@ -438,8 +460,24 @@
if (!ret)
return 0;
- do_fixup_by_path_string(blob, "/dsi@fe060000/panel@0",
- "compatible", env);
+ /* Panels don't match, search by first compatible value. */
+ for (i = 0; i < ARRAY_SIZE(rg353_panel_details); i++) {
+ if (!strcmp(env, rg353_panel_details[i].panel_compat[0])) {
+ panel = &rg353_panel_details[i];
+ break;
+ }
+ }
+
+ if (!panel) {
+ printf("Unable to identify panel by compat string\n");
+ return -ENODEV;
+ }
+
+ /* Set the compatible with the auto-detected values */
+ fdt_setprop_string(blob, node, "compatible", panel->panel_compat[0]);
+ if (panel->panel_compat[1])
+ fdt_appendprop_string(blob, node, "compatible",
+ panel->panel_compat[1]);
return 0;
}
diff --git a/board/asus/grouper/Kconfig b/board/asus/grouper/Kconfig
index 47d9bae..f935cce 100644
--- a/board/asus/grouper/Kconfig
+++ b/board/asus/grouper/Kconfig
@@ -9,12 +9,4 @@
config SYS_CONFIG_NAME
default "grouper"
-config GROUPER_TPS65911
- bool "Enable support TI TPS65911 PMIC"
- select CMD_POWEROFF
-
-config GROUPER_MAX77663
- bool "Enable support MAXIM MAX77663 PMIC"
- select CMD_POWEROFF
-
endif
diff --git a/board/asus/grouper/Makefile b/board/asus/grouper/Makefile
index e4a477a..d041cf8 100644
--- a/board/asus/grouper/Makefile
+++ b/board/asus/grouper/Makefile
@@ -7,8 +7,8 @@
# Svyatoslav Ryhel <clamor95@gmail.com>
ifdef CONFIG_SPL_BUILD
-obj-$(CONFIG_GROUPER_MAX77663) += grouper-spl-max.o
-obj-$(CONFIG_GROUPER_TPS65911) += grouper-spl-ti.o
+obj-$(CONFIG_DM_PMIC_MAX77663) += grouper-spl-max.o
+obj-$(CONFIG_DM_PMIC_TPS65910) += grouper-spl-ti.o
endif
obj-y += grouper.o
diff --git a/board/asus/grouper/configs/grouper_E1565.config b/board/asus/grouper/configs/grouper_E1565.config
index 4d8d526..265295c 100644
--- a/board/asus/grouper/configs/grouper_E1565.config
+++ b/board/asus/grouper/configs/grouper_E1565.config
@@ -1,2 +1,6 @@
CONFIG_DEFAULT_DEVICE_TREE="tegra30-asus-nexus7-grouper-E1565"
-CONFIG_GROUPER_MAX77663=y
+CONFIG_CMD_POWEROFF=y
+# CONFIG_MAX77663_GPIO is not set
+CONFIG_DM_PMIC_MAX77663=y
+CONFIG_DM_REGULATOR_MAX77663=y
+CONFIG_SYSRESET_MAX77663=y
diff --git a/board/asus/grouper/configs/grouper_PM269.config b/board/asus/grouper/configs/grouper_PM269.config
index fc768b2..a7ee358 100644
--- a/board/asus/grouper/configs/grouper_PM269.config
+++ b/board/asus/grouper/configs/grouper_PM269.config
@@ -1,2 +1,6 @@
CONFIG_DEFAULT_DEVICE_TREE="tegra30-asus-nexus7-grouper-PM269"
-CONFIG_GROUPER_TPS65911=y
+CONFIG_CMD_POWEROFF=y
+CONFIG_DM_PMIC_TPS65910=y
+# CONFIG_DM_REGULATOR_TPS65910 is not set
+CONFIG_DM_REGULATOR_TPS65911=y
+CONFIG_SYSRESET_TPS65910=y
diff --git a/board/asus/grouper/configs/tilapia.config b/board/asus/grouper/configs/tilapia.config
index 1fb0633..d461b47 100644
--- a/board/asus/grouper/configs/tilapia.config
+++ b/board/asus/grouper/configs/tilapia.config
@@ -1,3 +1,7 @@
CONFIG_DEFAULT_DEVICE_TREE="tegra30-asus-nexus7-tilapia-E1565"
-CONFIG_GROUPER_MAX77663=y
CONFIG_SYS_PROMPT="Tegra30 (Tilapia) # "
+CONFIG_CMD_POWEROFF=y
+# CONFIG_MAX77663_GPIO is not set
+CONFIG_DM_PMIC_MAX77663=y
+CONFIG_DM_REGULATOR_MAX77663=y
+CONFIG_SYSRESET_MAX77663=y
diff --git a/board/asus/grouper/grouper-spl-max.c b/board/asus/grouper/grouper-spl-max.c
index 8443837..3e58bf9 100644
--- a/board/asus/grouper/grouper-spl-max.c
+++ b/board/asus/grouper/grouper-spl-max.c
@@ -9,7 +9,7 @@
* Svyatoslav Ryhel <clamor95@gmail.com>
*/
-#include <common.h>
+#include <asm/arch/tegra.h>
#include <asm/arch-tegra/tegra_i2c.h>
#include <linux/delay.h>
diff --git a/board/asus/grouper/grouper-spl-ti.c b/board/asus/grouper/grouper-spl-ti.c
index e5b78f0..1dcce80 100644
--- a/board/asus/grouper/grouper-spl-ti.c
+++ b/board/asus/grouper/grouper-spl-ti.c
@@ -9,7 +9,7 @@
* Svyatoslav Ryhel <clamor95@gmail.com>
*/
-#include <common.h>
+#include <asm/arch/tegra.h>
#include <asm/arch-tegra/tegra_i2c.h>
#include <linux/delay.h>
diff --git a/board/asus/grouper/grouper.c b/board/asus/grouper/grouper.c
index 5398ec8..78eb34e7 100644
--- a/board/asus/grouper/grouper.c
+++ b/board/asus/grouper/grouper.c
@@ -7,176 +7,7 @@
* Svyatoslav Ryhel <clamor95@gmail.com>
*/
-#include <common.h>
-#include <dm.h>
#include <fdt_support.h>
-#include <i2c.h>
-#include <log.h>
-#include <asm/arch/pinmux.h>
-#include <asm/arch/gp_padctrl.h>
-#include <asm/arch/gpio.h>
-#include <asm/gpio.h>
-#include <linux/delay.h>
-#include "pinmux-config-grouper.h"
-
-#define TPS65911_I2C_ADDRESS 0x2D
-
-#define TPS65911_REG_LDO1 0x30
-#define TPS65911_REG_DEVCTRL 0x3F
-#define DEVCTRL_PWR_OFF_MASK BIT(7)
-#define DEVCTRL_DEV_ON_MASK BIT(2)
-#define DEVCTRL_DEV_OFF_MASK BIT(0)
-
-#define MAX77663_I2C_ADDRESS 0x3C
-
-#define MAX77663_REG_SD2 0x18
-#define MAX77663_REG_LDO3 0x29
-#define MAX77663_REG_ONOFF_CFG1 0x41
-#define ONOFF_PWR_OFF BIT(1)
-
-#ifdef CONFIG_CMD_POWEROFF
-#ifdef CONFIG_GROUPER_TPS65911
-int do_poweroff(struct cmd_tbl *cmdtp,
- int flag, int argc, char *const argv[])
-{
- struct udevice *dev;
- uchar data_buffer[1];
- int ret;
-
- ret = i2c_get_chip_for_busnum(0, TPS65911_I2C_ADDRESS, 1, &dev);
- if (ret) {
- log_debug("cannot find PMIC I2C chip\n");
- return 0;
- }
-
- ret = dm_i2c_read(dev, TPS65911_REG_DEVCTRL, data_buffer, 1);
- if (ret)
- return ret;
-
- data_buffer[0] |= DEVCTRL_PWR_OFF_MASK;
-
- ret = dm_i2c_write(dev, TPS65911_REG_DEVCTRL, data_buffer, 1);
- if (ret)
- return ret;
-
- data_buffer[0] |= DEVCTRL_DEV_OFF_MASK;
- data_buffer[0] &= ~DEVCTRL_DEV_ON_MASK;
-
- ret = dm_i2c_write(dev, TPS65911_REG_DEVCTRL, data_buffer, 1);
- if (ret)
- return ret;
-
- // wait some time and then print error
- mdelay(5000);
-
- printf("Failed to power off!!!\n");
- return 1;
-}
-#endif /* CONFIG_GROUPER_TPS65911 */
-
-#ifdef CONFIG_GROUPER_MAX77663
-int do_poweroff(struct cmd_tbl *cmdtp,
- int flag, int argc, char *const argv[])
-{
- struct udevice *dev;
- uchar data_buffer[1];
- int ret;
-
- ret = i2c_get_chip_for_busnum(0, MAX77663_I2C_ADDRESS, 1, &dev);
- if (ret) {
- log_debug("cannot find PMIC I2C chip\n");
- return 0;
- }
-
- ret = dm_i2c_read(dev, MAX77663_REG_ONOFF_CFG1, data_buffer, 1);
- if (ret)
- return ret;
-
- data_buffer[0] |= ONOFF_PWR_OFF;
-
- ret = dm_i2c_write(dev, MAX77663_REG_ONOFF_CFG1, data_buffer, 1);
- if (ret)
- return ret;
-
- // wait some time and then print error
- mdelay(5000);
-
- printf("Failed to power off!!!\n");
- return 1;
-}
-#endif /* CONFIG_GROUPER_MAX77663 */
-#endif /* CONFIG_CMD_POWEROFF */
-
-/*
- * Routine: pinmux_init
- * Description: Do individual peripheral pinmux configs
- */
-void pinmux_init(void)
-{
- pinmux_config_pingrp_table(grouper_pinmux_common,
- ARRAY_SIZE(grouper_pinmux_common));
-
- pinmux_config_drvgrp_table(grouper_padctrl,
- ARRAY_SIZE(grouper_padctrl));
-}
-
-#ifdef CONFIG_MMC_SDHCI_TEGRA
-static void __maybe_unused tps65911_voltage_init(void)
-{
- struct udevice *dev;
- int ret;
-
- ret = i2c_get_chip_for_busnum(0, TPS65911_I2C_ADDRESS, 1, &dev);
- if (ret) {
- log_debug("cannot find PMIC I2C chip\n");
- return;
- }
-
- /* TPS659110: LDO1_REG = 3.3v, ACTIVE to SDMMC4 */
- ret = dm_i2c_reg_write(dev, TPS65911_REG_LDO1, 0xC9);
- if (ret)
- log_debug("vcore_emmc set failed: %d\n", ret);
-}
-
-static void __maybe_unused max77663_voltage_init(void)
-{
- struct udevice *dev;
- int ret;
-
- ret = i2c_get_chip_for_busnum(0, MAX77663_I2C_ADDRESS, 1, &dev);
- if (ret) {
- log_debug("cannot find PMIC I2C chip\n");
- return;
- }
-
- /* 0x60 for 1.8v, bit7:0 = voltage */
- ret = dm_i2c_reg_write(dev, MAX77663_REG_SD2, 0x60);
- if (ret)
- log_debug("vdd_1v8_vio set failed: %d\n", ret);
-
- /* 0xEC for 3.00v, enabled: bit7:6 = 11 = enable, bit5:0 = voltage */
- ret = dm_i2c_reg_write(dev, MAX77663_REG_LDO3, 0xEC);
- if (ret)
- log_debug("vcore_emmc set failed: %d\n", ret);
-}
-
-/*
- * Routine: pin_mux_mmc
- * Description: setup the MMC muxes, power rails, etc.
- */
-void pin_mux_mmc(void)
-{
-#ifdef CONFIG_GROUPER_MAX77663
- /* Bring up eMMC power on MAX PMIC */
- max77663_voltage_init();
-#endif
-
-#ifdef CONFIG_GROUPER_TPS65911
- /* Bring up eMMC power on TI PMIC */
- tps65911_voltage_init();
-#endif
-}
-#endif /* MMC */
#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
int ft_board_setup(void *blob, struct bd_info *bd)
diff --git a/board/asus/grouper/pinmux-config-grouper.h b/board/asus/grouper/pinmux-config-grouper.h
deleted file mode 100644
index 98134f7..0000000
--- a/board/asus/grouper/pinmux-config-grouper.h
+++ /dev/null
@@ -1,362 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * Copyright (c) 2010-2013, NVIDIA CORPORATION. All rights reserved.
- */
-
-#ifndef _PINMUX_CONFIG_GROUPER_H_
-#define _PINMUX_CONFIG_GROUPER_H_
-
-#define DEFAULT_PINMUX(_pingrp, _mux, _pull, _tri, _io) \
- { \
- .pingrp = PMUX_PINGRP_##_pingrp, \
- .func = PMUX_FUNC_##_mux, \
- .pull = PMUX_PULL_##_pull, \
- .tristate = PMUX_TRI_##_tri, \
- .io = PMUX_PIN_##_io, \
- .lock = PMUX_PIN_LOCK_DEFAULT, \
- .od = PMUX_PIN_OD_DEFAULT, \
- .ioreset = PMUX_PIN_IO_RESET_DEFAULT, \
- }
-
-#define I2C_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _od) \
- { \
- .pingrp = PMUX_PINGRP_##_pingrp, \
- .func = PMUX_FUNC_##_mux, \
- .pull = PMUX_PULL_##_pull, \
- .tristate = PMUX_TRI_##_tri, \
- .io = PMUX_PIN_##_io, \
- .lock = PMUX_PIN_LOCK_##_lock, \
- .od = PMUX_PIN_OD_##_od, \
- .ioreset = PMUX_PIN_IO_RESET_DEFAULT, \
- }
-
-#define LV_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _ioreset) \
- { \
- .pingrp = PMUX_PINGRP_##_pingrp, \
- .func = PMUX_FUNC_##_mux, \
- .pull = PMUX_PULL_##_pull, \
- .tristate = PMUX_TRI_##_tri, \
- .io = PMUX_PIN_##_io, \
- .lock = PMUX_PIN_LOCK_##_lock, \
- .od = PMUX_PIN_OD_DEFAULT, \
- .ioreset = PMUX_PIN_IO_RESET_##_ioreset \
- }
-
-#define DEFAULT_PADCFG(_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \
- { \
- .drvgrp = PMUX_DRVGRP_##_drvgrp, \
- .slwf = _slwf, \
- .slwr = _slwr, \
- .drvup = _drvup, \
- .drvdn = _drvdn, \
- .lpmd = PMUX_LPMD_##_lpmd, \
- .schmt = PMUX_SCHMT_##_schmt, \
- .hsm = PMUX_HSM_##_hsm, \
- }
-
-static struct pmux_pingrp_config grouper_pinmux_common[] = {
- /* SDMMC1 pinmux */
- DEFAULT_PINMUX(SDMMC1_CLK_PZ0, SDMMC1, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(SDMMC1_CMD_PZ1, SDMMC1, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(SDMMC1_DAT3_PY4, SDMMC1, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(SDMMC1_DAT2_PY5, SDMMC1, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(SDMMC1_DAT1_PY6, SDMMC1, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(SDMMC1_DAT0_PY7, SDMMC1, UP, NORMAL, INPUT),
-
- /* SDMMC3 pinmux */
- DEFAULT_PINMUX(SDMMC3_CLK_PA6, SDMMC3, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(SDMMC3_CMD_PA7, SDMMC3, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(SDMMC3_DAT0_PB7, SDMMC3, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(SDMMC3_DAT1_PB6, SDMMC3, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(SDMMC3_DAT2_PB5, SDMMC3, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(SDMMC3_DAT3_PB4, SDMMC3, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(SDMMC3_DAT4_PD1, SDMMC3, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(SDMMC3_DAT5_PD0, SDMMC3, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(SDMMC3_DAT6_PD3, SDMMC3, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(SDMMC3_DAT7_PD4, SDMMC3, UP, NORMAL, INPUT),
-
- /* SDMMC4 pinmux */
- LV_PINMUX(SDMMC4_CLK_PCC4, SDMMC4, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
- LV_PINMUX(SDMMC4_CMD_PT7, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
- LV_PINMUX(SDMMC4_DAT0_PAA0, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
- LV_PINMUX(SDMMC4_DAT1_PAA1, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
- LV_PINMUX(SDMMC4_DAT2_PAA2, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
- LV_PINMUX(SDMMC4_DAT3_PAA3, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
- LV_PINMUX(SDMMC4_DAT4_PAA4, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
- LV_PINMUX(SDMMC4_DAT5_PAA5, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
- LV_PINMUX(SDMMC4_DAT6_PAA6, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
- LV_PINMUX(SDMMC4_DAT7_PAA7, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
- LV_PINMUX(SDMMC4_RST_N_PCC3, RSVD2, DOWN, NORMAL, INPUT, DISABLE, DISABLE),
-
- /* I2C pinmux */
- I2C_PINMUX(GEN1_I2C_SCL_PC4, I2C1, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
- I2C_PINMUX(GEN1_I2C_SDA_PC5, I2C1, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
- I2C_PINMUX(GEN2_I2C_SCL_PT5, I2C2, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
- I2C_PINMUX(GEN2_I2C_SDA_PT6, I2C2, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
- I2C_PINMUX(CAM_I2C_SCL_PBB1, I2C3, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
- I2C_PINMUX(CAM_I2C_SDA_PBB2, I2C3, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
- I2C_PINMUX(DDC_SCL_PV4, I2C4, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
- I2C_PINMUX(DDC_SDA_PV5, I2C4, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
- I2C_PINMUX(PWR_I2C_SCL_PZ6, I2CPWR, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
- I2C_PINMUX(PWR_I2C_SDA_PZ7, I2CPWR, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
-
- /* HDMI-CEC pinmux */
- DEFAULT_PINMUX(HDMI_CEC_PEE3, CEC, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(HDMI_INT_PN7, RSVD1, NORMAL, TRISTATE, INPUT),
-
- /* ULPI pinmux */
- DEFAULT_PINMUX(ULPI_DATA0_PO1, UARTA, DOWN, TRISTATE, OUTPUT),
- DEFAULT_PINMUX(ULPI_DATA1_PO2, UARTA, UP, TRISTATE, INPUT),
- DEFAULT_PINMUX(ULPI_DATA2_PO3, UARTA, UP, TRISTATE, INPUT),
- DEFAULT_PINMUX(ULPI_DATA3_PO4, ULPI, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(ULPI_DATA4_PO5, UARTA, UP, TRISTATE, INPUT),
- DEFAULT_PINMUX(ULPI_DATA5_PO6, UARTA, UP, TRISTATE, INPUT),
- DEFAULT_PINMUX(ULPI_DATA6_PO7, UARTA, UP, TRISTATE, INPUT),
- DEFAULT_PINMUX(ULPI_DATA7_PO0, UARTA, UP, TRISTATE, OUTPUT),
- DEFAULT_PINMUX(ULPI_CLK_PY0, ULPI, NORMAL, TRISTATE, OUTPUT),
- DEFAULT_PINMUX(ULPI_DIR_PY1, ULPI, NORMAL, TRISTATE, OUTPUT),
- DEFAULT_PINMUX(ULPI_NXT_PY2, RSVD1, NORMAL, TRISTATE, OUTPUT),
- DEFAULT_PINMUX(ULPI_STP_PY3, RSVD1, NORMAL, TRISTATE, OUTPUT),
-
- /* DAP3 pinmux */
- DEFAULT_PINMUX(DAP3_FS_PP0, I2S2, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(DAP3_DIN_PP1, I2S2, DOWN, NORMAL, INPUT),
- DEFAULT_PINMUX(DAP3_DOUT_PP2, I2S2, DOWN, NORMAL, INPUT),
- DEFAULT_PINMUX(DAP3_SCLK_PP3, I2S2, DOWN, TRISTATE, INPUT),
-
- DEFAULT_PINMUX(PV0, RSVD1, UP, TRISTATE, INPUT),
- DEFAULT_PINMUX(PV1, RSVD1, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(PV2, OWR, NORMAL, TRISTATE, OUTPUT),
- DEFAULT_PINMUX(PV3, RSVD1, NORMAL, TRISTATE, INPUT),
-
- /* CLK2 pinmux */
- DEFAULT_PINMUX(CLK2_OUT_PW5, EXTPERIPH2, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(CLK2_REQ_PCC5, DAP, NORMAL, NORMAL, INPUT),
-
- /* LCD pinmux */
- DEFAULT_PINMUX(LCD_PWR1_PC1, DISPLAYA, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(LCD_PWR2_PC6, DISPLAYA, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(LCD_SDIN_PZ2, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_SDOUT_PN5, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_WR_N_PZ3, DISPLAYA, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_CS0_N_PN4, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_DC0_PN6, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_SCK_PZ4, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_PWR0_PB2, DISPLAYA, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(LCD_PCLK_PB3, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_DE_PJ1, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_HSYNC_PJ3, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_VSYNC_PJ4, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D0_PE0, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D1_PE1, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D2_PE2, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D3_PE3, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D4_PE4, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D5_PE5, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D6_PE6, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D7_PE7, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D8_PF0, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D9_PF1, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D10_PF2, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D11_PF3, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D12_PF4, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D13_PF5, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D14_PF6, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D15_PF7, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D16_PM0, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D17_PM1, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D18_PM2, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D19_PM3, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D20_PM4, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D21_PM5, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D22_PM6, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D23_PM7, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_CS1_N_PW0, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_M1_PW1, DISPLAYA, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(LCD_DC1_PD2, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(CRT_HSYNC_PV6, CRT, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(CRT_VSYNC_PV7, CRT, NORMAL, NORMAL, OUTPUT),
-
- /* VI-group pinmux */
- LV_PINMUX(VI_D0_PT4, RSVD1, DOWN, TRISTATE, INPUT, DISABLE, DISABLE),
- LV_PINMUX(VI_D1_PD5, SDMMC2, DOWN, TRISTATE, INPUT, DISABLE, DISABLE),
- LV_PINMUX(VI_D2_PL0, SDMMC2, DOWN, TRISTATE, INPUT, DISABLE, DISABLE),
- LV_PINMUX(VI_D3_PL1, SDMMC2, DOWN, TRISTATE, INPUT, DISABLE, DISABLE),
- LV_PINMUX(VI_D4_PL2, VI, UP, NORMAL, INPUT, DISABLE, DISABLE),
- LV_PINMUX(VI_D5_PL3, SDMMC2, DOWN, TRISTATE, INPUT, DISABLE, DISABLE),
- LV_PINMUX(VI_D6_PL4, VI, UP, NORMAL, INPUT, DISABLE, DISABLE),
- LV_PINMUX(VI_D7_PL5, SDMMC2, DOWN, TRISTATE, INPUT, DISABLE, DISABLE),
- LV_PINMUX(VI_D8_PL6, SDMMC2, DOWN, TRISTATE, INPUT, DISABLE, DISABLE),
- LV_PINMUX(VI_D9_PL7, SDMMC2, DOWN, TRISTATE, INPUT, DISABLE, DISABLE),
- LV_PINMUX(VI_D10_PT2, RSVD1, DOWN, TRISTATE, INPUT, DISABLE, DISABLE),
- LV_PINMUX(VI_D11_PT3, RSVD1, DOWN, TRISTATE, INPUT, DISABLE, DISABLE),
- LV_PINMUX(VI_PCLK_PT0, SDMMC2, UP, TRISTATE, INPUT, DISABLE, DISABLE),
- LV_PINMUX(VI_MCLK_PT1, RSVD1, DOWN, TRISTATE, INPUT, DISABLE, DISABLE),
- LV_PINMUX(VI_HSYNC_PD7, RSVD1, DOWN, TRISTATE, INPUT, DISABLE, DISABLE),
- LV_PINMUX(VI_VSYNC_PD6, RSVD1, DOWN, TRISTATE, INPUT, DISABLE, DISABLE),
-
- /* UART-B pinmux */
- DEFAULT_PINMUX(UART2_RXD_PC3, UARTB, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(UART2_TXD_PC2, UARTB, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(UART2_RTS_N_PJ6, UARTB, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(UART2_CTS_N_PJ5, UARTB, NORMAL, NORMAL, INPUT),
-
- /* UART-C pinmux */
- DEFAULT_PINMUX(UART3_TXD_PW6, UARTC, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(UART3_RXD_PW7, UARTC, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(UART3_CTS_N_PA1, UARTC, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(UART3_RTS_N_PC0, UARTC, NORMAL, NORMAL, OUTPUT),
-
- /* U-gpio group pinmux */
- DEFAULT_PINMUX(PU0, RSVD4, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(PU1, RSVD1, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(PU2, RSVD1, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(PU3, RSVD4, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(PU4, PWM1, NORMAL, TRISTATE, INPUT),
- DEFAULT_PINMUX(PU5, PWM2, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(PU6, RSVD4, NORMAL, NORMAL, INPUT),
-
- /* DAP4 pinmux */
- DEFAULT_PINMUX(DAP4_FS_PP4, I2S3, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(DAP4_DIN_PP5, I2S3, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(DAP4_DOUT_PP6, I2S3, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(DAP4_SCLK_PP7, I2S3, NORMAL, NORMAL, INPUT),
-
- /* CLK3 pinmux */
- DEFAULT_PINMUX(CLK3_OUT_PEE0, EXTPERIPH3, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(CLK3_REQ_PEE1, DEV3, NORMAL, NORMAL, INPUT),
-
- DEFAULT_PINMUX(CAM_MCLK_PCC0, VI_ALT3, DOWN, NORMAL, INPUT),
-
- DEFAULT_PINMUX(PCC1, RSVD2, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(PBB0, RSVD2, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(PBB3, VGP3, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(PBB4, VGP4, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(PBB5, VGP5, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(PBB6, VGP6, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(PBB7, I2S4, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(PCC2, I2S4, NORMAL, NORMAL, INPUT),
-
- DEFAULT_PINMUX(JTAG_RTCK_PU7, RTCK, UP, NORMAL, INPUT),
-
- /* KBC keys */
- DEFAULT_PINMUX(KB_ROW0_PR0, RSVD4, UP, NORMAL, OUTPUT),
- DEFAULT_PINMUX(KB_ROW1_PR1, KBC, NORMAL, TRISTATE, OUTPUT),
- DEFAULT_PINMUX(KB_ROW2_PR2, KBC, NORMAL, TRISTATE, INPUT),
- DEFAULT_PINMUX(KB_ROW3_PR3, KBC, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(KB_ROW4_PR4, KBC, NORMAL, TRISTATE, INPUT),
- DEFAULT_PINMUX(KB_ROW5_PR5, KBC, NORMAL, TRISTATE, INPUT),
- DEFAULT_PINMUX(KB_ROW6_PR6, KBC, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(KB_ROW7_PR7, KBC, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(KB_ROW8_PS0, KBC, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(KB_ROW9_PS1, KBC, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(KB_ROW10_PS2, KBC, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(KB_ROW11_PS3, KBC, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(KB_ROW12_PS4, KBC, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(KB_ROW13_PS5, KBC, NORMAL, TRISTATE, OUTPUT),
- DEFAULT_PINMUX(KB_ROW14_PS6, KBC, NORMAL, TRISTATE, INPUT),
- DEFAULT_PINMUX(KB_ROW15_PS7, KBC, NORMAL, NORMAL, OUTPUT),
-
- DEFAULT_PINMUX(KB_COL0_PQ0, KBC, NORMAL, TRISTATE, OUTPUT),
- DEFAULT_PINMUX(KB_COL1_PQ1, KBC, NORMAL, TRISTATE, OUTPUT),
- DEFAULT_PINMUX(KB_COL2_PQ2, RSVD4, UP, TRISTATE, INPUT),
- DEFAULT_PINMUX(KB_COL3_PQ3, RSVD4, UP, TRISTATE, INPUT),
- DEFAULT_PINMUX(KB_COL4_PQ4, KBC, NORMAL, TRISTATE, INPUT),
- DEFAULT_PINMUX(KB_COL5_PQ5, KBC, NORMAL, TRISTATE, INPUT),
- DEFAULT_PINMUX(KB_COL6_PQ6, KBC, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(KB_COL7_PQ7, KBC, NORMAL, TRISTATE, INPUT),
-
- /* CLK */
- DEFAULT_PINMUX(CLK_32K_OUT_PA0, BLINK, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(SYS_CLK_REQ_PZ5, SYSCLK, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(OWR, OWR, NORMAL, NORMAL, INPUT),
-
- /* DAP1 pinmux */
- DEFAULT_PINMUX(DAP1_FS_PN0, I2S0, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(DAP1_DIN_PN1, I2S0, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(DAP1_DOUT_PN2, I2S0, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(DAP1_SCLK_PN3, I2S0, NORMAL, NORMAL, INPUT),
-
- /* CLK1 pinmux */
- DEFAULT_PINMUX(CLK1_REQ_PEE2, DAP, NORMAL, TRISTATE, OUTPUT),
- DEFAULT_PINMUX(CLK1_OUT_PW4, EXTPERIPH1, NORMAL, NORMAL, INPUT),
-
- /* SPDIF pinmux */
- DEFAULT_PINMUX(SPDIF_IN_PK6, SPDIF, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(SPDIF_OUT_PK5, SPDIF, NORMAL, NORMAL, OUTPUT),
-
- /* DAP2 pinmux */
- DEFAULT_PINMUX(DAP2_FS_PA2, I2S1, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(DAP2_DIN_PA4, I2S1, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(DAP2_DOUT_PA5, I2S1, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(DAP2_SCLK_PA3, I2S1, NORMAL, NORMAL, INPUT),
-
- /* SPI pinmux */
- DEFAULT_PINMUX(SPI1_MOSI_PX4, SPI1, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(SPI1_SCK_PX5, SPI1, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(SPI1_CS0_N_PX6, SPI1, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(SPI1_MISO_PX7, SPI1, NORMAL, NORMAL, INPUT),
-
- DEFAULT_PINMUX(SPI2_MOSI_PX0, SPI2, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(SPI2_MISO_PX1, SPI2, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(SPI2_SCK_PX2, SPI2, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(SPI2_CS1_N_PW2, SPI2, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(SPI2_CS2_N_PW3, SPI2, NORMAL, NORMAL, INPUT),
-
- /* PEX pinmux */
- DEFAULT_PINMUX(PEX_L0_PRSNT_N_PDD0, PCIE, NORMAL, TRISTATE, INPUT),
- DEFAULT_PINMUX(PEX_L0_RST_N_PDD1, PCIE, NORMAL, TRISTATE, OUTPUT),
- DEFAULT_PINMUX(PEX_L0_CLKREQ_N_PDD2, PCIE, NORMAL, TRISTATE, INPUT),
- DEFAULT_PINMUX(PEX_WAKE_N_PDD3, PCIE, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(PEX_L1_PRSNT_N_PDD4, PCIE, NORMAL, TRISTATE, INPUT),
- DEFAULT_PINMUX(PEX_L1_RST_N_PDD5, PCIE, NORMAL, TRISTATE, OUTPUT),
- DEFAULT_PINMUX(PEX_L1_CLKREQ_N_PDD6, PCIE, NORMAL, TRISTATE, INPUT),
- DEFAULT_PINMUX(PEX_L2_PRSNT_N_PDD7, PCIE, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(PEX_L2_RST_N_PCC6, PCIE, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(PEX_L2_CLKREQ_N_PCC7, PCIE, NORMAL, NORMAL, OUTPUT),
-
- /* GMI pinmux */
- DEFAULT_PINMUX(GMI_WP_N_PC7, RSVD1, NORMAL, TRISTATE, OUTPUT),
- DEFAULT_PINMUX(GMI_IORDY_PI5, RSVD1, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(GMI_WAIT_PI7, RSVD1, NORMAL, TRISTATE, OUTPUT),
- DEFAULT_PINMUX(GMI_ADV_N_PK0, RSVD1, NORMAL, TRISTATE, OUTPUT),
- DEFAULT_PINMUX(GMI_CLK_PK1, NAND, NORMAL, TRISTATE, OUTPUT),
- DEFAULT_PINMUX(GMI_CS0_N_PJ0, RSVD1, NORMAL, TRISTATE, INPUT),
- DEFAULT_PINMUX(GMI_CS1_N_PJ2, RSVD1, NORMAL, TRISTATE, INPUT),
- DEFAULT_PINMUX(GMI_CS2_N_PK3, RSVD1, NORMAL, TRISTATE, INPUT),
- DEFAULT_PINMUX(GMI_CS3_N_PK4, RSVD1, NORMAL, TRISTATE, OUTPUT),
- DEFAULT_PINMUX(GMI_CS4_N_PK2, RSVD1, NORMAL, TRISTATE, OUTPUT),
- DEFAULT_PINMUX(GMI_CS6_N_PI3, GMI, NORMAL, TRISTATE, OUTPUT),
- DEFAULT_PINMUX(GMI_CS7_N_PI6, NAND, NORMAL, TRISTATE, OUTPUT),
- DEFAULT_PINMUX(GMI_AD0_PG0, RSVD1, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(GMI_AD1_PG1, RSVD1, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(GMI_AD2_PG2, RSVD1, DOWN, NORMAL, OUTPUT),
- DEFAULT_PINMUX(GMI_AD3_PG3, RSVD1, DOWN, NORMAL, OUTPUT),
- DEFAULT_PINMUX(GMI_AD4_PG4, NAND, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(GMI_AD5_PG5, NAND, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(GMI_AD6_PG6, RSVD1, DOWN, NORMAL, OUTPUT),
- DEFAULT_PINMUX(GMI_AD7_PG7, RSVD1, DOWN, NORMAL, OUTPUT),
- DEFAULT_PINMUX(GMI_AD8_PH0, PWM0, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(GMI_AD9_PH1, RSVD4, DOWN, NORMAL, OUTPUT),
- DEFAULT_PINMUX(GMI_AD10_PH2, PWM2, NORMAL, TRISTATE, OUTPUT),
- DEFAULT_PINMUX(GMI_AD11_PH3, PWM3, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(GMI_AD12_PH4, RSVD1, NORMAL, TRISTATE, INPUT),
- DEFAULT_PINMUX(GMI_AD13_PH5, RSVD1, NORMAL, TRISTATE, OUTPUT),
- DEFAULT_PINMUX(GMI_AD14_PH6, RSVD1, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(GMI_AD15_PH7, RSVD1, UP, NORMAL, OUTPUT),
- DEFAULT_PINMUX(GMI_A16_PJ7, UARTD, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(GMI_A17_PB0, UARTD, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(GMI_A18_PB1, UARTD, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(GMI_A19_PK7, UARTD, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(GMI_WR_N_PI0, RSVD1, NORMAL, TRISTATE, OUTPUT),
- DEFAULT_PINMUX(GMI_OE_N_PI1, RSVD1, NORMAL, TRISTATE, OUTPUT),
- DEFAULT_PINMUX(GMI_DQS_PI2, RSVD1, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(GMI_RST_N_PI4, NAND, UP, NORMAL, OUTPUT),
-};
-
-static struct pmux_drvgrp_config grouper_padctrl[] = {
- /* (_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) */
- DEFAULT_PADCFG(SDIO1, SDIOCFG_DRVUP_SLWF, SDIOCFG_DRVDN_SLWR, \
- SDIOCFG_DRVUP, SDIOCFG_DRVDN, NONE, DISABLE, DISABLE),
-};
-#endif /* _PINMUX_CONFIG_GROUPER_H_ */
diff --git a/board/asus/transformer-t30/Kconfig b/board/asus/transformer-t30/Kconfig
index accc999..915436b 100644
--- a/board/asus/transformer-t30/Kconfig
+++ b/board/asus/transformer-t30/Kconfig
@@ -9,14 +9,4 @@
config SYS_CONFIG_NAME
default "transformer-t30"
-config TRANSFORMER_SPI_BOOT
- bool "Enable support for SPI based flash"
- select TEGRA20_SLINK
- select DM_SPI_FLASH
- select SPI_FLASH_WINBOND
- help
- Tegra 3 based Transformers with Windows RT have core
- boot sequence (BCT and EBT) on separate SPI FLASH
- memory with 4MB size.
-
endif
diff --git a/board/asus/transformer-t30/configs/tf600t.config b/board/asus/transformer-t30/configs/tf600t.config
index 18ab4fb..e40d0fd 100644
--- a/board/asus/transformer-t30/configs/tf600t.config
+++ b/board/asus/transformer-t30/configs/tf600t.config
@@ -1,4 +1,4 @@
CONFIG_DEFAULT_DEVICE_TREE="tegra30-asus-tf600t"
-CONFIG_TRANSFORMER_SPI_BOOT=y
CONFIG_BOOTCOMMAND="setenv gpio_button 222; if run check_button; then poweroff; fi; setenv gpio_button 132; if run check_button; then echo Starting SPI flash update ...; run update_spi; fi; run bootcmd_usb0; run bootcmd_mmc1; run bootcmd_mmc0; poweroff;"
+CONFIG_SPI_FLASH_WINBOND=y
CONFIG_USB_GADGET_PRODUCT_NUM=0x4d00
diff --git a/board/asus/transformer-t30/pinmux-config-transformer.h b/board/asus/transformer-t30/pinmux-config-transformer.h
deleted file mode 100644
index 96ff45d..0000000
--- a/board/asus/transformer-t30/pinmux-config-transformer.h
+++ /dev/null
@@ -1,365 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * Copyright (c) 2010-2013, NVIDIA CORPORATION. All rights reserved.
- *
- * Copyright (c) 2021, Svyatoslav Ryhel.
- */
-
-#ifndef _PINMUX_CONFIG_TRANSFORMER_H_
-#define _PINMUX_CONFIG_TRANSFORMER_H_
-
-#define DEFAULT_PINMUX(_pingrp, _mux, _pull, _tri, _io) \
- { \
- .pingrp = PMUX_PINGRP_##_pingrp, \
- .func = PMUX_FUNC_##_mux, \
- .pull = PMUX_PULL_##_pull, \
- .tristate = PMUX_TRI_##_tri, \
- .io = PMUX_PIN_##_io, \
- .lock = PMUX_PIN_LOCK_DEFAULT, \
- .od = PMUX_PIN_OD_DEFAULT, \
- .ioreset = PMUX_PIN_IO_RESET_DEFAULT, \
- }
-
-#define I2C_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _od) \
- { \
- .pingrp = PMUX_PINGRP_##_pingrp, \
- .func = PMUX_FUNC_##_mux, \
- .pull = PMUX_PULL_##_pull, \
- .tristate = PMUX_TRI_##_tri, \
- .io = PMUX_PIN_##_io, \
- .lock = PMUX_PIN_LOCK_##_lock, \
- .od = PMUX_PIN_OD_##_od, \
- .ioreset = PMUX_PIN_IO_RESET_DEFAULT, \
- }
-
-#define LV_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _ioreset) \
- { \
- .pingrp = PMUX_PINGRP_##_pingrp, \
- .func = PMUX_FUNC_##_mux, \
- .pull = PMUX_PULL_##_pull, \
- .tristate = PMUX_TRI_##_tri, \
- .io = PMUX_PIN_##_io, \
- .lock = PMUX_PIN_LOCK_##_lock, \
- .od = PMUX_PIN_OD_DEFAULT, \
- .ioreset = PMUX_PIN_IO_RESET_##_ioreset \
- }
-
-#define DEFAULT_PADCFG(_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \
- { \
- .drvgrp = PMUX_DRVGRP_##_drvgrp, \
- .slwf = _slwf, \
- .slwr = _slwr, \
- .drvup = _drvup, \
- .drvdn = _drvdn, \
- .lpmd = PMUX_LPMD_##_lpmd, \
- .schmt = PMUX_SCHMT_##_schmt, \
- .hsm = PMUX_HSM_##_hsm, \
- }
-
-static struct pmux_pingrp_config transformer_pinmux_common[] = {
- /* SDMMC1 pinmux */
- DEFAULT_PINMUX(SDMMC1_CLK_PZ0, SDMMC1, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(SDMMC1_CMD_PZ1, SDMMC1, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(SDMMC1_DAT3_PY4, SDMMC1, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(SDMMC1_DAT2_PY5, SDMMC1, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(SDMMC1_DAT1_PY6, SDMMC1, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(SDMMC1_DAT0_PY7, SDMMC1, UP, NORMAL, INPUT),
-
- /* SDMMC3 pinmux */
- DEFAULT_PINMUX(SDMMC3_CLK_PA6, SDMMC3, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(SDMMC3_CMD_PA7, SDMMC3, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(SDMMC3_DAT0_PB7, SDMMC3, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(SDMMC3_DAT1_PB6, SDMMC3, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(SDMMC3_DAT2_PB5, SDMMC3, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(SDMMC3_DAT3_PB4, SDMMC3, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(SDMMC3_DAT4_PD1, SDMMC3, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(SDMMC3_DAT5_PD0, SDMMC3, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(SDMMC3_DAT6_PD3, SDMMC3, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(SDMMC3_DAT7_PD4, SDMMC3, UP, NORMAL, INPUT),
-
- /* SDMMC4 pinmux */
- LV_PINMUX(SDMMC4_CLK_PCC4, SDMMC4, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
- LV_PINMUX(SDMMC4_CMD_PT7, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
- LV_PINMUX(SDMMC4_DAT0_PAA0, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
- LV_PINMUX(SDMMC4_DAT1_PAA1, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
- LV_PINMUX(SDMMC4_DAT2_PAA2, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
- LV_PINMUX(SDMMC4_DAT3_PAA3, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
- LV_PINMUX(SDMMC4_DAT4_PAA4, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
- LV_PINMUX(SDMMC4_DAT5_PAA5, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
- LV_PINMUX(SDMMC4_DAT6_PAA6, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
- LV_PINMUX(SDMMC4_DAT7_PAA7, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
- LV_PINMUX(SDMMC4_RST_N_PCC3, RSVD1, DOWN, NORMAL, INPUT, DISABLE, DISABLE),
-
- /* I2C pinmux */
- I2C_PINMUX(GEN1_I2C_SCL_PC4, I2C1, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
- I2C_PINMUX(GEN1_I2C_SDA_PC5, I2C1, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
- I2C_PINMUX(GEN2_I2C_SCL_PT5, I2C2, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
- I2C_PINMUX(GEN2_I2C_SDA_PT6, I2C2, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
- I2C_PINMUX(CAM_I2C_SCL_PBB1, I2C3, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
- I2C_PINMUX(CAM_I2C_SDA_PBB2, I2C3, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
- I2C_PINMUX(DDC_SCL_PV4, I2C4, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
- I2C_PINMUX(DDC_SDA_PV5, I2C4, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
- I2C_PINMUX(PWR_I2C_SCL_PZ6, I2CPWR, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
- I2C_PINMUX(PWR_I2C_SDA_PZ7, I2CPWR, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
-
- /* HDMI-CEC pinmux */
- DEFAULT_PINMUX(HDMI_CEC_PEE3, CEC, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(HDMI_INT_PN7, RSVD1, NORMAL, TRISTATE, INPUT),
-
- /* ULPI pinmux */
- DEFAULT_PINMUX(ULPI_DATA0_PO1, UARTA, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(ULPI_DATA1_PO2, UARTA, DOWN, TRISTATE, INPUT),
- DEFAULT_PINMUX(ULPI_DATA2_PO3, UARTA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(ULPI_DATA3_PO4, UARTA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(ULPI_DATA4_PO5, UARTA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(ULPI_DATA5_PO6, UARTA, NORMAL, TRISTATE, INPUT),
- DEFAULT_PINMUX(ULPI_DATA6_PO7, UARTA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(ULPI_DATA7_PO0, UARTA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(ULPI_CLK_PY0, UARTD, NORMAL, TRISTATE, OUTPUT),
- DEFAULT_PINMUX(ULPI_DIR_PY1, UARTD, NORMAL, TRISTATE, OUTPUT),
- DEFAULT_PINMUX(ULPI_NXT_PY2, UARTD, NORMAL, TRISTATE, INPUT),
- DEFAULT_PINMUX(ULPI_STP_PY3, UARTD, NORMAL, TRISTATE, OUTPUT),
-
- /* DAP3 pinmux */
- DEFAULT_PINMUX(DAP3_FS_PP0, I2S2, NORMAL, TRISTATE, INPUT),
- DEFAULT_PINMUX(DAP3_DIN_PP1, I2S2, NORMAL, TRISTATE, INPUT),
- DEFAULT_PINMUX(DAP3_DOUT_PP2, I2S2, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(DAP3_SCLK_PP3, I2S2, NORMAL, NORMAL, INPUT),
-
- DEFAULT_PINMUX(PV0, RSVD1, UP, TRISTATE, INPUT),
- DEFAULT_PINMUX(PV2, RSVD1, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(PV3, RSVD1, NORMAL, TRISTATE, OUTPUT),
-
- /* CLK2 pinmux */
- DEFAULT_PINMUX(CLK2_OUT_PW5, EXTPERIPH2, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(CLK2_REQ_PCC5, DAP, NORMAL, NORMAL, INPUT),
-
- /* LCD pinmux */
- DEFAULT_PINMUX(LCD_PWR1_PC1, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_PWR2_PC6, DISPLAYA, NORMAL, TRISTATE, INPUT),
- DEFAULT_PINMUX(LCD_SDIN_PZ2, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_SDOUT_PN5, DISPLAYA, NORMAL, TRISTATE, INPUT),
- DEFAULT_PINMUX(LCD_WR_N_PZ3, DISPLAYA, NORMAL, TRISTATE, INPUT),
- DEFAULT_PINMUX(LCD_CS0_N_PN4, DISPLAYA, NORMAL, TRISTATE, INPUT),
- DEFAULT_PINMUX(LCD_DC0_PN6, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_SCK_PZ4, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_PWR0_PB2, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_PCLK_PB3, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_DE_PJ1, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_HSYNC_PJ3, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_VSYNC_PJ4, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D0_PE0, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D1_PE1, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D2_PE2, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D3_PE3, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D4_PE4, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D5_PE5, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D6_PE6, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D7_PE7, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D8_PF0, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D9_PF1, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D10_PF2, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D11_PF3, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D12_PF4, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D13_PF5, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D14_PF6, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D15_PF7, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D16_PM0, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D17_PM1, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D18_PM2, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D19_PM3, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D20_PM4, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D21_PM5, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D22_PM6, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D23_PM7, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_CS1_N_PW0, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_M1_PW1, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_DC1_PD2, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(CRT_HSYNC_PV6, CRT, NORMAL, TRISTATE, OUTPUT),
- DEFAULT_PINMUX(CRT_VSYNC_PV7, CRT, NORMAL, TRISTATE, OUTPUT),
-
- /* VI-group pinmux */
- LV_PINMUX(VI_D0_PT4, RSVD1, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
- LV_PINMUX(VI_D1_PD5, SDMMC2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
- LV_PINMUX(VI_D2_PL0, SDMMC2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
- LV_PINMUX(VI_D3_PL1, SDMMC2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
- LV_PINMUX(VI_D4_PL2, VI, NORMAL, NORMAL, OUTPUT, DISABLE, DISABLE),
- LV_PINMUX(VI_D5_PL3, SDMMC2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
- LV_PINMUX(VI_D6_PL4, VI, NORMAL, NORMAL, OUTPUT, DISABLE, DISABLE),
- LV_PINMUX(VI_D7_PL5, SDMMC2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
- LV_PINMUX(VI_D8_PL6, SDMMC2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
- LV_PINMUX(VI_D9_PL7, SDMMC2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
- LV_PINMUX(VI_D10_PT2, RSVD1, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
- LV_PINMUX(VI_D11_PT3, RSVD1, UP, NORMAL, INPUT, DISABLE, DISABLE),
- LV_PINMUX(VI_PCLK_PT0, RSVD1, UP, TRISTATE, INPUT, DISABLE, DISABLE),
- LV_PINMUX(VI_MCLK_PT1, VI, UP, NORMAL, INPUT, DISABLE, DISABLE),
- LV_PINMUX(VI_HSYNC_PD7, RSVD1, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
- LV_PINMUX(VI_VSYNC_PD6, RSVD1, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
-
- /* UART-B pinmux */
- DEFAULT_PINMUX(UART2_RXD_PC3, UARTB, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(UART2_TXD_PC2, UARTB, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(UART2_RTS_N_PJ6, UARTB, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(UART2_CTS_N_PJ5, UARTB, NORMAL, NORMAL, INPUT),
-
- /* UART-C pinmux */
- DEFAULT_PINMUX(UART3_TXD_PW6, UARTC, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(UART3_RXD_PW7, UARTC, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(UART3_CTS_N_PA1, UARTC, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(UART3_RTS_N_PC0, UARTC, NORMAL, NORMAL, OUTPUT),
-
- /* U-gpio group pinmux */
- DEFAULT_PINMUX(PU0, RSVD1, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(PU1, RSVD1, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(PU2, RSVD1, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(PU3, RSVD1, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(PU4, RSVD1, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(PU5, PWM2, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(PU6, RSVD1, DOWN, NORMAL, INPUT),
-
- /* DAP4 pinmux */
- DEFAULT_PINMUX(DAP4_FS_PP4, I2S3, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(DAP4_DIN_PP5, I2S3, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(DAP4_DOUT_PP6, I2S3, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(DAP4_SCLK_PP7, I2S3, NORMAL, NORMAL, INPUT),
-
- /* CLK3 pinmux */
- DEFAULT_PINMUX(CLK3_OUT_PEE0, EXTPERIPH3, NORMAL, TRISTATE, OUTPUT),
- DEFAULT_PINMUX(CLK3_REQ_PEE1, DEV3, NORMAL, TRISTATE, INPUT),
-
- DEFAULT_PINMUX(CAM_MCLK_PCC0, VI_ALT3, UP, NORMAL, INPUT),
-
- DEFAULT_PINMUX(PCC1, RSVD1, NORMAL, TRISTATE, INPUT),
- DEFAULT_PINMUX(PBB0, RSVD1, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(PBB3, VGP3, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(PBB4, VGP4, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(PBB5, VGP5, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(PBB6, VGP6, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(PBB7, I2S4, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(PCC2, I2S4, NORMAL, NORMAL, INPUT),
-
- DEFAULT_PINMUX(JTAG_RTCK_PU7, RTCK, NORMAL, NORMAL, OUTPUT),
-
- /* KBC keys */
- DEFAULT_PINMUX(KB_ROW0_PR0, RSVD4, UP, NORMAL, OUTPUT),
- DEFAULT_PINMUX(KB_ROW1_PR1, KBC, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(KB_ROW2_PR2, KBC, NORMAL, TRISTATE, INPUT),
- DEFAULT_PINMUX(KB_ROW3_PR3, KBC, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(KB_ROW4_PR4, KBC, NORMAL, TRISTATE, INPUT),
- DEFAULT_PINMUX(KB_ROW5_PR5, KBC, NORMAL, TRISTATE, INPUT),
- DEFAULT_PINMUX(KB_ROW6_PR6, KBC, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(KB_ROW7_PR7, KBC, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(KB_ROW8_PS0, KBC, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(KB_ROW9_PS1, KBC, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(KB_ROW10_PS2, KBC, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(KB_ROW11_PS3, KBC, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(KB_ROW12_PS4, KBC, NORMAL, TRISTATE, INPUT),
- DEFAULT_PINMUX(KB_ROW13_PS5, KBC, NORMAL, TRISTATE, INPUT),
- DEFAULT_PINMUX(KB_ROW14_PS6, KBC, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(KB_ROW15_PS7, KBC, UP, NORMAL, INPUT),
-
- DEFAULT_PINMUX(KB_COL0_PQ0, KBC, NORMAL, TRISTATE, OUTPUT),
- DEFAULT_PINMUX(KB_COL1_PQ1, KBC, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(KB_COL2_PQ2, RSVD4, UP, TRISTATE, INPUT),
- DEFAULT_PINMUX(KB_COL3_PQ3, RSVD4, UP, TRISTATE, INPUT),
- DEFAULT_PINMUX(KB_COL4_PQ4, RSVD4, UP, TRISTATE, INPUT),
- DEFAULT_PINMUX(KB_COL5_PQ5, KBC, NORMAL, TRISTATE, INPUT),
- DEFAULT_PINMUX(KB_COL6_PQ6, KBC, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(KB_COL7_PQ7, KBC, NORMAL, TRISTATE, INPUT),
-
- /* CLK */
- DEFAULT_PINMUX(CLK_32K_OUT_PA0, BLINK, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(SYS_CLK_REQ_PZ5, SYSCLK, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(OWR, OWR, NORMAL, NORMAL, INPUT),
-
- /* DAP1 pinmux */
- DEFAULT_PINMUX(DAP1_FS_PN0, I2S0, NORMAL, TRISTATE, INPUT),
- DEFAULT_PINMUX(DAP1_DIN_PN1, I2S0, NORMAL, TRISTATE, INPUT),
- DEFAULT_PINMUX(DAP1_DOUT_PN2, I2S0, NORMAL, TRISTATE, INPUT),
- DEFAULT_PINMUX(DAP1_SCLK_PN3, I2S0, NORMAL, TRISTATE, INPUT),
-
- /* CLK1 pinmux */
- DEFAULT_PINMUX(CLK1_REQ_PEE2, DAP, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(CLK1_OUT_PW4, EXTPERIPH1, NORMAL, NORMAL, INPUT),
-
- /* SPDIF pinmux */
- DEFAULT_PINMUX(SPDIF_IN_PK6, SPDIF, NORMAL, TRISTATE, INPUT),
- DEFAULT_PINMUX(SPDIF_OUT_PK5, SPDIF, NORMAL, TRISTATE, OUTPUT),
-
- /* DAP2 pinmux */
- DEFAULT_PINMUX(DAP2_FS_PA2, I2S1, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(DAP2_DIN_PA4, I2S1, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(DAP2_DOUT_PA5, I2S1, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(DAP2_SCLK_PA3, I2S1, NORMAL, NORMAL, INPUT),
-
- /* SPI pinmux */
- DEFAULT_PINMUX(SPI1_MOSI_PX4, SPI1, NORMAL, TRISTATE, INPUT),
- DEFAULT_PINMUX(SPI1_SCK_PX5, SPI1, NORMAL, TRISTATE, INPUT),
- DEFAULT_PINMUX(SPI1_CS0_N_PX6, SPI1, NORMAL, TRISTATE, INPUT),
- DEFAULT_PINMUX(SPI1_MISO_PX7, SPI1, NORMAL, TRISTATE, INPUT),
- DEFAULT_PINMUX(SPI2_SCK_PX2, GMI, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(SPI2_CS1_N_PW2, SPI2, UP, NORMAL, INPUT),
-
- /* PEX pinmux */
- DEFAULT_PINMUX(PEX_L0_PRSNT_N_PDD0, PCIE, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(PEX_L0_RST_N_PDD1, PCIE, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(PEX_L0_CLKREQ_N_PDD2, PCIE, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(PEX_WAKE_N_PDD3, PCIE, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(PEX_L1_PRSNT_N_PDD4, PCIE, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(PEX_L1_RST_N_PDD5, PCIE, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(PEX_L1_CLKREQ_N_PDD6, PCIE, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(PEX_L2_PRSNT_N_PDD7, PCIE, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(PEX_L2_RST_N_PCC6, PCIE, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(PEX_L2_CLKREQ_N_PCC7, PCIE, NORMAL, NORMAL, INPUT),
-
- /* GMI pinmux */
- DEFAULT_PINMUX(GMI_WP_N_PC7, RSVD1, NORMAL, TRISTATE, INPUT),
- DEFAULT_PINMUX(GMI_IORDY_PI5, RSVD1, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(GMI_WAIT_PI7, RSVD1, NORMAL, TRISTATE, INPUT),
- DEFAULT_PINMUX(GMI_ADV_N_PK0, NAND, NORMAL, TRISTATE, OUTPUT),
- DEFAULT_PINMUX(GMI_CLK_PK1, NAND, NORMAL, TRISTATE, OUTPUT),
- DEFAULT_PINMUX(GMI_CS2_N_PK3, RSVD1, NORMAL, TRISTATE, INPUT),
- DEFAULT_PINMUX(GMI_CS3_N_PK4, RSVD1, NORMAL, TRISTATE, INPUT),
- DEFAULT_PINMUX(GMI_CS7_N_PI6, NAND, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(GMI_AD0_PG0, NAND, NORMAL, TRISTATE, OUTPUT),
- DEFAULT_PINMUX(GMI_AD1_PG1, NAND, NORMAL, TRISTATE, OUTPUT),
- DEFAULT_PINMUX(GMI_AD2_PG2, NAND, NORMAL, TRISTATE, OUTPUT),
- DEFAULT_PINMUX(GMI_AD3_PG3, NAND, NORMAL, TRISTATE, OUTPUT),
- DEFAULT_PINMUX(GMI_AD4_PG4, NAND, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(GMI_AD5_PG5, NAND, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(GMI_AD6_PG6, NAND, NORMAL, TRISTATE, OUTPUT),
- DEFAULT_PINMUX(GMI_AD7_PG7, NAND, NORMAL, TRISTATE, OUTPUT),
- DEFAULT_PINMUX(GMI_AD8_PH0, PWM0, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(GMI_AD9_PH1, PWM1, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(GMI_AD10_PH2, NAND, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(GMI_AD11_PH3, NAND, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(GMI_AD12_PH4, NAND, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(GMI_AD13_PH5, NAND, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(GMI_AD14_PH6, NAND, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(GMI_AD15_PH7, NAND, DOWN, NORMAL, OUTPUT),
- DEFAULT_PINMUX(GMI_A16_PJ7, SPI4, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(GMI_A17_PB0, SPI4, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(GMI_A18_PB1, SPI4, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(GMI_A19_PK7, SPI4, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(GMI_WR_N_PI0, NAND, NORMAL, TRISTATE, OUTPUT),
- DEFAULT_PINMUX(GMI_OE_N_PI1, NAND, NORMAL, TRISTATE, OUTPUT),
- DEFAULT_PINMUX(GMI_DQS_PI2, NAND, NORMAL, TRISTATE, OUTPUT),
-};
-
-static struct pmux_pingrp_config tf700t_mipi_pinmux[] = {
- DEFAULT_PINMUX(LCD_PWR2_PC6, DISPLAYA, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(LCD_DC1_PD2, DISPLAYA, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(PBB3, VGP3, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(PBB7, I2S4, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(SPI2_MOSI_PX0, SPI2, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(KB_ROW7_PR7, KBC, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(GMI_CS4_N_PK2, GMI, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(CAM_MCLK_PCC0, VI_ALT3, UP, TRISTATE, INPUT),
-};
-
-static struct pmux_drvgrp_config transformer_padctrl[] = {
- /* (_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) */
- DEFAULT_PADCFG(SDIO1, SDIOCFG_DRVUP_SLWF, SDIOCFG_DRVDN_SLWR, \
- SDIOCFG_DRVUP, SDIOCFG_DRVDN, NONE, DISABLE, DISABLE),
-};
-#endif /* _PINMUX_CONFIG_TRANSFORMER_H_ */
diff --git a/board/asus/transformer-t30/transformer-t30-spl.c b/board/asus/transformer-t30/transformer-t30-spl.c
index 89819b2..952e2c8 100644
--- a/board/asus/transformer-t30/transformer-t30-spl.c
+++ b/board/asus/transformer-t30/transformer-t30-spl.c
@@ -9,7 +9,7 @@
* Svyatoslav Ryhel <clamor95@gmail.com>
*/
-#include <common.h>
+#include <asm/arch/tegra.h>
#include <asm/arch-tegra/tegra_i2c.h>
#include <linux/delay.h>
diff --git a/board/asus/transformer-t30/transformer-t30.c b/board/asus/transformer-t30/transformer-t30.c
index ba795a8..a3fac1c 100644
--- a/board/asus/transformer-t30/transformer-t30.c
+++ b/board/asus/transformer-t30/transformer-t30.c
@@ -9,148 +9,7 @@
/* T30 Transformers derive from Cardhu board */
-#include <common.h>
-#include <dm.h>
#include <fdt_support.h>
-#include <i2c.h>
-#include <log.h>
-#include <asm/arch/pinmux.h>
-#include <asm/arch/gp_padctrl.h>
-#include <asm/arch/gpio.h>
-#include <asm/gpio.h>
-#include <linux/delay.h>
-#include "pinmux-config-transformer.h"
-
-#define TPS65911_I2C_ADDRESS 0x2D
-
-#define TPS65911_VDD1 0x21
-#define TPS65911_VDD1_OP 0x22
-#define TPS65911_LDO1 0x30
-#define TPS65911_LDO2 0x31
-#define TPS65911_LDO3 0x37
-#define TPS65911_LDO5 0x32
-#define TPS65911_LDO6 0x35
-
-#define TPS65911_DEVCTRL 0x3F
-#define DEVCTRL_PWR_OFF_MASK BIT(7)
-#define DEVCTRL_DEV_ON_MASK BIT(2)
-#define DEVCTRL_DEV_OFF_MASK BIT(0)
-
-#ifdef CONFIG_CMD_POWEROFF
-int do_poweroff(struct cmd_tbl *cmdtp, int flag,
- int argc, char *const argv[])
-{
- struct udevice *dev;
- uchar data_buffer[1];
- int ret;
-
- ret = i2c_get_chip_for_busnum(0, TPS65911_I2C_ADDRESS, 1, &dev);
- if (ret) {
- log_debug("cannot find PMIC I2C chip\n");
- return 0;
- }
-
- ret = dm_i2c_read(dev, TPS65911_DEVCTRL, data_buffer, 1);
- if (ret)
- return ret;
-
- data_buffer[0] |= DEVCTRL_PWR_OFF_MASK;
-
- ret = dm_i2c_write(dev, TPS65911_DEVCTRL, data_buffer, 1);
- if (ret)
- return ret;
-
- data_buffer[0] |= DEVCTRL_DEV_OFF_MASK;
- data_buffer[0] &= ~DEVCTRL_DEV_ON_MASK;
-
- ret = dm_i2c_write(dev, TPS65911_DEVCTRL, data_buffer, 1);
- if (ret)
- return ret;
-
- // wait some time and then print error
- mdelay(5000);
- printf("Failed to power off!!!\n");
- return 1;
-}
-#endif
-
-/*
- * Routine: pinmux_init
- * Description: Do individual peripheral pinmux configs
- */
-void pinmux_init(void)
-{
- pinmux_config_pingrp_table(transformer_pinmux_common,
- ARRAY_SIZE(transformer_pinmux_common));
-
- pinmux_config_drvgrp_table(transformer_padctrl,
- ARRAY_SIZE(transformer_padctrl));
-
- if (of_machine_is_compatible("asus,tf700t")) {
- pinmux_config_pingrp_table(tf700t_mipi_pinmux,
- ARRAY_SIZE(tf700t_mipi_pinmux));
- }
-}
-
-#ifdef CONFIG_MMC_SDHCI_TEGRA
-static void tps65911_voltage_init(void)
-{
- struct udevice *dev;
- int ret;
-
- ret = i2c_get_chip_for_busnum(0, TPS65911_I2C_ADDRESS, 1, &dev);
- if (ret) {
- log_debug("cannot find PMIC I2C chip\n");
- return;
- }
-
- /* TPS659110: LDO1_REG = 3.3v, ACTIVE to SDMMC4 */
- ret = dm_i2c_reg_write(dev, TPS65911_LDO1, 0xc9);
- if (ret)
- log_debug("vcore_emmc set failed: %d\n", ret);
-
- if (of_machine_is_compatible("asus,tf600t")) {
- /* TPS659110: VDD1_REG = 1.2v, ACTIVE to backlight */
- ret = dm_i2c_reg_write(dev, TPS65911_VDD1_OP, 0x33);
- if (ret)
- log_debug("vdd_bl set failed: %d\n", ret);
-
- ret = dm_i2c_reg_write(dev, TPS65911_VDD1, 0x0d);
- if (ret)
- log_debug("vdd_bl enable failed: %d\n", ret);
-
- /* TPS659110: LDO5_REG = 3.3v, ACTIVE to SDMMC1 VIO */
- ret = dm_i2c_reg_write(dev, TPS65911_LDO5, 0x65);
- if (ret)
- log_debug("vdd_usd set failed: %d\n", ret);
-
- /* TPS659110: LDO6_REG = 1.2v, ACTIVE to MIPI */
- ret = dm_i2c_reg_write(dev, TPS65911_LDO6, 0x11);
- if (ret)
- log_debug("vdd_mipi set failed: %d\n", ret);
- } else {
- /* TPS659110: LDO2_REG = 3.1v, ACTIVE to SDMMC1 */
- ret = dm_i2c_reg_write(dev, TPS65911_LDO2, 0xb9);
- if (ret)
- log_debug("vdd_usd set failed: %d\n", ret);
-
- /* TPS659110: LDO3_REG = 3.1v, ACTIVE to SDMMC1 VIO */
- ret = dm_i2c_reg_write(dev, TPS65911_LDO3, 0x5d);
- if (ret)
- log_debug("vddio_usd set failed: %d\n", ret);
- }
-}
-
-/*
- * Routine: pin_mux_mmc
- * Description: setup the MMC muxes, power rails, etc.
- */
-void pin_mux_mmc(void)
-{
- /* Bring up uSD and eMMC power */
- tps65911_voltage_init();
-}
-#endif /* MMC */
#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
int ft_board_setup(void *blob, struct bd_info *bd)
diff --git a/board/beagle/beagleboneai64/rm-cfg.yaml b/board/beagle/beagleboneai64/rm-cfg.yaml
index 9f604cf..0163e3e 100644
--- a/board/beagle/beagleboneai64/rm-cfg.yaml
+++ b/board/beagle/beagleboneai64/rm-cfg.yaml
@@ -16,224 +16,224 @@
magic: 0x4C41
size: 356
host_cfg_entries:
- - #1
+ - # 1
host_id: 3
allowed_atype: 0x2A
allowed_qos: 0xAAAA
allowed_orderid: 0xAAAAAAAA
allowed_priority: 0xAAAA
allowed_sched_priority: 0xAA
- - #2
+ - # 2
host_id: 5
allowed_atype: 0x2A
allowed_qos: 0xAAAA
allowed_orderid: 0xAAAAAAAA
allowed_priority: 0xAAAA
allowed_sched_priority: 0xAA
- - #3
+ - # 3
host_id: 12
allowed_atype: 0x2A
allowed_qos: 0xAAAA
allowed_orderid: 0xAAAAAAAA
allowed_priority: 0xAAAA
allowed_sched_priority: 0xAA
- - #4
+ - # 4
host_id: 13
allowed_atype: 0x2A
allowed_qos: 0xAAAA
allowed_orderid: 0xAAAAAAAA
allowed_priority: 0xAAAA
allowed_sched_priority: 0xAA
- - #5
+ - # 5
host_id: 21
allowed_atype: 0x2A
allowed_qos: 0xAAAA
allowed_orderid: 0xAAAAAAAA
allowed_priority: 0xAAAA
allowed_sched_priority: 0xAA
- - #6
+ - # 6
host_id: 26
allowed_atype: 0x2A
allowed_qos: 0xAAAA
allowed_orderid: 0xAAAAAAAA
allowed_priority: 0xAAAA
allowed_sched_priority: 0xAA
- - #7
+ - # 7
host_id: 28
allowed_atype: 0x2A
allowed_qos: 0xAAAA
allowed_orderid: 0xAAAAAAAA
allowed_priority: 0xAAAA
allowed_sched_priority: 0xAA
- - #8
+ - # 8
host_id: 35
allowed_atype: 0x2A
allowed_qos: 0xAAAA
allowed_orderid: 0xAAAAAAAA
allowed_priority: 0xAAAA
allowed_sched_priority: 0xAA
- - #9
+ - # 9
host_id: 37
allowed_atype: 0x2A
allowed_qos: 0xAAAA
allowed_orderid: 0xAAAAAAAA
allowed_priority: 0xAAAA
allowed_sched_priority: 0xAA
- - #10
+ - # 10
host_id: 40
allowed_atype: 0x2A
allowed_qos: 0xAAAA
allowed_orderid: 0xAAAAAAAA
allowed_priority: 0xAAAA
allowed_sched_priority: 0xAA
- - #11
+ - # 11
host_id: 42
allowed_atype: 0x2A
allowed_qos: 0xAAAA
allowed_orderid: 0xAAAAAAAA
allowed_priority: 0xAAAA
allowed_sched_priority: 0xAA
- - #12
+ - # 12
host_id: 0
allowed_atype: 0
allowed_qos: 0
allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
- - #13
+ - # 13
host_id: 0
allowed_atype: 0
allowed_qos: 0
allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
- - #14
+ - # 14
host_id: 0
allowed_atype: 0
allowed_qos: 0
allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
- - #15
+ - # 15
host_id: 0
allowed_atype: 0
allowed_qos: 0
allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
- - #16
+ - # 16
host_id: 0
allowed_atype: 0
allowed_qos: 0
allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
- - #17
+ - # 17
host_id: 0
allowed_atype: 0
allowed_qos: 0
allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
- - #18
+ - # 18
host_id: 0
allowed_atype: 0
allowed_qos: 0
allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
- - #19
+ - # 19
host_id: 0
allowed_atype: 0
allowed_qos: 0
allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
- - #20
+ - # 20
host_id: 0
allowed_atype: 0
allowed_qos: 0
allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
- - #21
+ - # 21
host_id: 0
allowed_atype: 0
allowed_qos: 0
allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
- - #22
+ - # 22
host_id: 0
allowed_atype: 0
allowed_qos: 0
allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
- - #23
+ - # 23
host_id: 0
allowed_atype: 0
allowed_qos: 0
allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
- - #24
+ - # 24
host_id: 0
allowed_atype: 0
allowed_qos: 0
allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
- - #25
+ - # 25
host_id: 0
allowed_atype: 0
allowed_qos: 0
allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
- - #26
+ - # 26
host_id: 0
allowed_atype: 0
allowed_qos: 0
allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
- - #27
+ - # 27
host_id: 0
allowed_atype: 0
allowed_qos: 0
allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
- - #28
+ - # 28
host_id: 0
allowed_atype: 0
allowed_qos: 0
allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
- - #29
+ - # 29
host_id: 0
allowed_atype: 0
allowed_qos: 0
allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
- - #30
+ - # 30
host_id: 0
allowed_atype: 0
allowed_qos: 0
allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
- - #31
+ - # 31
host_id: 0
allowed_atype: 0
allowed_qos: 0
allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
- - #32
+ - # 32
host_id: 0
allowed_atype: 0
allowed_qos: 0
@@ -253,2919 +253,2502 @@
type: 7744
host_id: 26
reserved: 0
-
-
start_resource: 4
num_resource: 93
type: 7808
host_id: 28
reserved: 0
-
-
start_resource: 0
num_resource: 32
type: 7872
host_id: 128
reserved: 0
-
-
start_resource: 0
num_resource: 32
type: 8192
host_id: 3
reserved: 0
-
-
start_resource: 32
num_resource: 32
type: 8192
host_id: 5
reserved: 0
-
-
start_resource: 0
num_resource: 24
type: 8320
host_id: 3
reserved: 0
-
-
start_resource: 24
num_resource: 24
type: 8320
host_id: 5
reserved: 0
-
-
start_resource: 0
num_resource: 8
type: 8384
host_id: 3
reserved: 0
-
-
start_resource: 8
num_resource: 8
type: 8384
host_id: 5
reserved: 0
-
-
start_resource: 16
num_resource: 4
type: 8384
host_id: 40
reserved: 0
-
-
start_resource: 20
num_resource: 4
type: 8384
host_id: 42
reserved: 0
-
-
start_resource: 24
num_resource: 4
type: 8384
host_id: 35
reserved: 0
-
-
start_resource: 28
num_resource: 4
type: 8384
host_id: 37
reserved: 0
-
-
start_resource: 32
num_resource: 4
type: 8384
host_id: 26
reserved: 0
-
-
start_resource: 36
num_resource: 4
type: 8384
host_id: 28
reserved: 0
-
-
start_resource: 40
num_resource: 12
type: 8384
host_id: 12
reserved: 0
-
-
start_resource: 52
num_resource: 12
type: 8384
host_id: 13
reserved: 0
-
-
start_resource: 0
num_resource: 128
type: 8576
host_id: 35
reserved: 0
-
-
start_resource: 128
num_resource: 128
type: 8576
host_id: 37
reserved: 0
-
-
start_resource: 0
num_resource: 128
type: 8640
host_id: 40
reserved: 0
-
-
start_resource: 128
num_resource: 128
type: 8640
host_id: 42
reserved: 0
-
-
start_resource: 0
num_resource: 48
type: 8704
host_id: 128
reserved: 0
-
-
start_resource: 0
num_resource: 8
type: 8768
host_id: 3
reserved: 0
-
-
start_resource: 8
num_resource: 8
type: 8768
host_id: 5
reserved: 0
-
-
start_resource: 16
num_resource: 6
type: 8768
host_id: 12
reserved: 0
-
-
start_resource: 22
num_resource: 6
type: 8768
host_id: 13
reserved: 0
-
-
start_resource: 28
num_resource: 2
type: 8768
host_id: 35
reserved: 0
-
-
start_resource: 30
num_resource: 2
type: 8768
host_id: 37
reserved: 0
-
-
start_resource: 0
num_resource: 64
type: 13258
host_id: 128
reserved: 0
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diff --git a/board/beagle/beagleboneai64/sec-cfg.yaml b/board/beagle/beagleboneai64/sec-cfg.yaml
index 1eab588..c725b59 100644
--- a/board/beagle/beagleboneai64/sec-cfg.yaml
+++ b/board/beagle/beagleboneai64/sec-cfg.yaml
@@ -15,234 +15,233 @@
magic: 0xF1EA
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- - #1
+ - # 1
host_id: 0
supervisor_host_id: 0
- - #2
+ - # 2
host_id: 0
supervisor_host_id: 0
- - #3
+ - # 3
host_id: 0
supervisor_host_id: 0
- - #4
+ - # 4
host_id: 0
supervisor_host_id: 0
- - #5
+ - # 5
host_id: 0
supervisor_host_id: 0
- - #6
+ - # 6
host_id: 0
supervisor_host_id: 0
- - #7
+ - # 7
host_id: 0
supervisor_host_id: 0
- - #8
+ - # 8
host_id: 0
supervisor_host_id: 0
- - #9
+ - # 9
host_id: 0
supervisor_host_id: 0
- - #10
+ - # 10
host_id: 0
supervisor_host_id: 0
- - #11
+ - # 11
host_id: 0
supervisor_host_id: 0
- - #12
+ - # 12
host_id: 0
supervisor_host_id: 0
- - #13
+ - # 13
host_id: 0
supervisor_host_id: 0
- - #14
+ - # 14
host_id: 0
supervisor_host_id: 0
- - #15
+ - # 15
host_id: 0
supervisor_host_id: 0
- - #16
+ - # 16
host_id: 0
supervisor_host_id: 0
- - #17
+ - # 17
host_id: 0
supervisor_host_id: 0
- - #18
+ - # 18
host_id: 0
supervisor_host_id: 0
- - #19
+ - # 19
host_id: 0
supervisor_host_id: 0
- - #20
+ - # 20
host_id: 0
supervisor_host_id: 0
- - #21
+ - # 21
host_id: 0
supervisor_host_id: 0
- - #22
+ - # 22
host_id: 0
supervisor_host_id: 0
- - #23
+ - # 23
host_id: 0
supervisor_host_id: 0
- - #24
+ - # 24
host_id: 0
supervisor_host_id: 0
- - #25
+ - # 25
host_id: 0
supervisor_host_id: 0
- - #26
+ - # 26
host_id: 0
supervisor_host_id: 0
- - #27
+ - # 27
host_id: 0
supervisor_host_id: 0
- - #28
+ - # 28
host_id: 0
supervisor_host_id: 0
- - #29
+ - # 29
host_id: 0
supervisor_host_id: 0
- - #30
+ - # 30
host_id: 0
supervisor_host_id: 0
- - #31
+ - # 31
host_id: 0
supervisor_host_id: 0
- - #32
+ - # 32
host_id: 0
supervisor_host_id: 0
otp_config:
@@ -250,100 +249,100 @@
magic: 0x4081
size: 69
otp_entry:
- - #1
+ - # 1
host_id: 0
host_perms: 0
- - #2
+ - # 2
host_id: 0
host_perms: 0
- - #3
+ - # 3
host_id: 0
host_perms: 0
- - #4
+ - # 4
host_id: 0
host_perms: 0
- - #5
+ - # 5
host_id: 0
host_perms: 0
- - #6
+ - # 6
host_id: 0
host_perms: 0
- - #7
+ - # 7
host_id: 0
host_perms: 0
- - #8
+ - # 8
host_id: 0
host_perms: 0
- - #9
+ - # 9
host_id: 0
host_perms: 0
- - #10
+ - # 10
host_id: 0
host_perms: 0
- - #11
+ - # 11
host_id: 0
host_perms: 0
- - #12
+ - # 12
host_id: 0
host_perms: 0
- - #13
+ - # 13
host_id: 0
host_perms: 0
- - #14
+ - # 14
host_id: 0
host_perms: 0
- - #15
+ - # 15
host_id: 0
host_perms: 0
- - #16
+ - # 16
host_id: 0
host_perms: 0
- - #17
+ - # 17
host_id: 0
host_perms: 0
- - #18
+ - # 18
host_id: 0
host_perms: 0
- - #19
+ - # 19
host_id: 0
host_perms: 0
- - #20
+ - # 20
host_id: 0
host_perms: 0
- - #21
+ - # 21
host_id: 0
host_perms: 0
- - #22
+ - # 22
host_id: 0
host_perms: 0
- - #23
+ - # 23
host_id: 0
host_perms: 0
- - #24
+ - # 24
host_id: 0
host_perms: 0
- - #25
+ - # 25
host_id: 0
host_perms: 0
- - #26
+ - # 26
host_id: 0
host_perms: 0
- - #27
+ - # 27
host_id: 0
host_perms: 0
- - #28
+ - # 28
host_id: 0
host_perms: 0
- - #29
+ - # 29
host_id: 0
host_perms: 0
- - #30
+ - # 30
host_id: 0
host_perms: 0
- - #31
+ - # 31
host_id: 0
host_perms: 0
- - #32
+ - # 32
host_id: 0
host_perms: 0
write_host_id: 0
diff --git a/board/beagle/beagleplay/board-cfg.yaml b/board/beagle/beagleplay/board-cfg.yaml
index 36cfb55..45c89dd 100644
--- a/board/beagle/beagleplay/board-cfg.yaml
+++ b/board/beagle/beagleplay/board-cfg.yaml
@@ -8,29 +8,29 @@
board-cfg:
rev:
- boardcfg_abi_maj : 0x0
- boardcfg_abi_min : 0x1
+ boardcfg_abi_maj: 0x0
+ boardcfg_abi_min: 0x1
control:
subhdr:
magic: 0xC1D3
size: 7
- main_isolation_enable : 0x5A
- main_isolation_hostid : 0x2
+ main_isolation_enable: 0x5A
+ main_isolation_hostid: 0x2
secproxy:
subhdr:
magic: 0x1207
size: 7
- scaling_factor : 0x1
- scaling_profile : 0x1
- disable_main_nav_secure_proxy : 0
+ scaling_factor: 0x1
+ scaling_profile: 0x1
+ disable_main_nav_secure_proxy: 0
msmc:
subhdr:
magic: 0xA5C3
size: 5
- msmc_cache_size : 0x0
+ msmc_cache_size: 0x0
debug_cfg:
subhdr:
magic: 0x020C
size: 8
- trace_dst_enables : 0x00
- trace_src_enables : 0x00
+ trace_dst_enables: 0x00
+ trace_src_enables: 0x00
diff --git a/board/beagle/beagleplay/pm-cfg.yaml b/board/beagle/beagleplay/pm-cfg.yaml
index 5d04cf8..9853a25 100644
--- a/board/beagle/beagleplay/pm-cfg.yaml
+++ b/board/beagle/beagleplay/pm-cfg.yaml
@@ -8,5 +8,5 @@
pm-cfg:
rev:
- boardcfg_abi_maj : 0x0
- boardcfg_abi_min : 0x1
+ boardcfg_abi_maj: 0x0
+ boardcfg_abi_min: 0x1
diff --git a/board/beagle/beagleplay/rm-cfg.yaml b/board/beagle/beagleplay/rm-cfg.yaml
index c28707b..e4221f8 100644
--- a/board/beagle/beagleplay/rm-cfg.yaml
+++ b/board/beagle/beagleplay/rm-cfg.yaml
@@ -9,1080 +9,961 @@
rm-cfg:
rm_boardcfg:
rev:
- boardcfg_abi_maj : 0x0
- boardcfg_abi_min : 0x1
+ boardcfg_abi_maj: 0x0
+ boardcfg_abi_min: 0x1
host_cfg:
subhdr:
magic: 0x4C41
- size : 356
+ size: 356
host_cfg_entries:
- - #1
+ - # 1
host_id: 12
- allowed_atype : 0x2A
- allowed_qos : 0xAAAA
- allowed_orderid : 0xAAAAAAAA
- allowed_priority : 0xAAAA
- allowed_sched_priority : 0xAA
- - #2
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - # 2
host_id: 30
- allowed_atype : 0x2A
- allowed_qos : 0xAAAA
- allowed_orderid : 0xAAAAAAAA
- allowed_priority : 0xAAAA
- allowed_sched_priority : 0xAA
- - #3
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - # 3
host_id: 36
- allowed_atype : 0x2A
- allowed_qos : 0xAAAA
- allowed_orderid : 0xAAAAAAAA
- allowed_priority : 0xAAAA
- allowed_sched_priority : 0xAA
- - #4
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - # 4
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #5
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 5
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #6
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 6
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #7
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 7
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #8
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 8
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #9
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 9
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #10
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 10
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #11
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 11
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #12
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 12
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #13
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 13
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #14
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 14
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #15
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 15
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #16
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 16
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #17
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 17
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #18
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 18
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #19
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 19
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #20
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 20
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #21
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 21
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #22
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 22
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #23
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 23
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #24
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 24
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #25
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 25
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #26
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 26
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #27
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 27
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #28
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 28
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #29
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 29
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #30
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 30
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #31
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 31
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #32
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 32
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
resasg:
subhdr:
magic: 0x7B25
- size : 8
+ size: 8
resasg_entries_size: 960
- reserved : 0
+ reserved: 0
resasg_entries:
-
- start_resource: 0
- num_resource: 16
- type: 64
- host_id: 12
- reserved: 0
-
+ start_resource: 0
+ num_resource: 16
+ type: 64
+ host_id: 12
+ reserved: 0
-
- start_resource: 16
- num_resource: 4
- type: 64
- host_id: 35
- reserved: 0
-
+ start_resource: 16
+ num_resource: 4
+ type: 64
+ host_id: 35
+ reserved: 0
-
- start_resource: 16
- num_resource: 4
- type: 64
- host_id: 36
- reserved: 0
-
+ start_resource: 16
+ num_resource: 4
+ type: 64
+ host_id: 36
+ reserved: 0
-
- start_resource: 20
- num_resource: 22
- type: 64
- host_id: 30
- reserved: 0
-
+ start_resource: 20
+ num_resource: 22
+ type: 64
+ host_id: 30
+ reserved: 0
-
- start_resource: 0
- num_resource: 16
- type: 192
- host_id: 12
- reserved: 0
-
+ start_resource: 0
+ num_resource: 16
+ type: 192
+ host_id: 12
+ reserved: 0
-
- start_resource: 34
- num_resource: 2
- type: 192
- host_id: 30
- reserved: 0
-
+ start_resource: 34
+ num_resource: 2
+ type: 192
+ host_id: 30
+ reserved: 0
-
- start_resource: 0
- num_resource: 4
- type: 320
- host_id: 12
- reserved: 0
-
+ start_resource: 0
+ num_resource: 4
+ type: 320
+ host_id: 12
+ reserved: 0
-
- start_resource: 4
- num_resource: 4
- type: 320
- host_id: 30
- reserved: 0
-
+ start_resource: 4
+ num_resource: 4
+ type: 320
+ host_id: 30
+ reserved: 0
-
- start_resource: 0
- num_resource: 26
- type: 384
- host_id: 128
- reserved: 0
-
+ start_resource: 0
+ num_resource: 26
+ type: 384
+ host_id: 128
+ reserved: 0
-
- start_resource: 50176
- num_resource: 164
- type: 1666
- host_id: 128
- reserved: 0
-
+ start_resource: 50176
+ num_resource: 164
+ type: 1666
+ host_id: 128
+ reserved: 0
-
- start_resource: 0
- num_resource: 1
- type: 1667
- host_id: 128
- reserved: 0
-
+ start_resource: 0
+ num_resource: 1
+ type: 1667
+ host_id: 128
+ reserved: 0
-
- start_resource: 0
- num_resource: 18
- type: 1677
- host_id: 12
- reserved: 0
-
+ start_resource: 0
+ num_resource: 18
+ type: 1677
+ host_id: 12
+ reserved: 0
-
- start_resource: 18
- num_resource: 6
- type: 1677
- host_id: 35
- reserved: 0
-
+ start_resource: 18
+ num_resource: 6
+ type: 1677
+ host_id: 35
+ reserved: 0
-
- start_resource: 18
- num_resource: 6
- type: 1677
- host_id: 36
- reserved: 0
-
+ start_resource: 18
+ num_resource: 6
+ type: 1677
+ host_id: 36
+ reserved: 0
-
- start_resource: 24
- num_resource: 2
- type: 1677
- host_id: 30
- reserved: 0
-
+ start_resource: 24
+ num_resource: 2
+ type: 1677
+ host_id: 30
+ reserved: 0
-
- start_resource: 26
- num_resource: 6
- type: 1677
- host_id: 128
- reserved: 0
-
+ start_resource: 26
+ num_resource: 6
+ type: 1677
+ host_id: 128
+ reserved: 0
-
- start_resource: 54
- num_resource: 18
- type: 1678
- host_id: 12
- reserved: 0
-
+ start_resource: 54
+ num_resource: 18
+ type: 1678
+ host_id: 12
+ reserved: 0
-
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- num_resource: 6
- type: 1678
- host_id: 35
- reserved: 0
-
+ start_resource: 72
+ num_resource: 6
+ type: 1678
+ host_id: 35
+ reserved: 0
-
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- num_resource: 6
- type: 1678
- host_id: 36
- reserved: 0
-
+ start_resource: 72
+ num_resource: 6
+ type: 1678
+ host_id: 36
+ reserved: 0
-
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- num_resource: 2
- type: 1678
- host_id: 30
- reserved: 0
-
+ start_resource: 78
+ num_resource: 2
+ type: 1678
+ host_id: 30
+ reserved: 0
-
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- num_resource: 2
- type: 1678
- host_id: 128
- reserved: 0
-
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+ num_resource: 2
+ type: 1678
+ host_id: 128
+ reserved: 0
-
- start_resource: 32
- num_resource: 12
- type: 1679
- host_id: 12
- reserved: 0
-
+ start_resource: 32
+ num_resource: 12
+ type: 1679
+ host_id: 12
+ reserved: 0
-
- start_resource: 44
- num_resource: 6
- type: 1679
- host_id: 35
- reserved: 0
-
+ start_resource: 44
+ num_resource: 6
+ type: 1679
+ host_id: 35
+ reserved: 0
-
- start_resource: 44
- num_resource: 6
- type: 1679
- host_id: 36
- reserved: 0
-
+ start_resource: 44
+ num_resource: 6
+ type: 1679
+ host_id: 36
+ reserved: 0
-
- start_resource: 50
- num_resource: 2
- type: 1679
- host_id: 30
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diff --git a/board/beagle/beagleplay/sec-cfg.yaml b/board/beagle/beagleplay/sec-cfg.yaml
index 07081ce..088b2db 100644
--- a/board/beagle/beagleplay/sec-cfg.yaml
+++ b/board/beagle/beagleplay/sec-cfg.yaml
@@ -8,138 +8,138 @@
sec-cfg:
rev:
- boardcfg_abi_maj : 0x0
- boardcfg_abi_min : 0x1
+ boardcfg_abi_maj: 0x0
+ boardcfg_abi_min: 0x1
processor_acl_list:
subhdr:
magic: 0xF1EA
size: 164
proc_acl_entries:
- - #1
+ - # 1
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #2
+ - # 2
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #3
+ - # 3
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #4
+ - # 4
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #5
+ - # 5
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #6
+ - # 6
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #7
+ - # 7
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #8
+ - # 8
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #9
+ - # 9
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #10
+ - # 10
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #11
+ - # 11
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #12
+ - # 12
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #13
+ - # 13
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #14
+ - # 14
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #15
+ - # 15
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #16
+ - # 16
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #17
+ - # 17
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #18
+ - # 18
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #19
+ - # 19
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #20
+ - # 20
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #21
+ - # 21
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #22
+ - # 22
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #23
+ - # 23
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #24
+ - # 24
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #25
+ - # 25
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #26
+ - # 26
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #27
+ - # 27
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #28
+ - # 28
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #29
+ - # 29
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #30
+ - # 30
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #31
+ - # 31
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #32
+ - # 32
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
@@ -148,202 +148,202 @@
magic: 0x8D27
size: 68
host_hierarchy_entries:
- - #1
+ - # 1
host_id: 0
supervisor_host_id: 0
- - #2
+ - # 2
host_id: 0
supervisor_host_id: 0
- - #3
+ - # 3
host_id: 0
supervisor_host_id: 0
- - #4
+ - # 4
host_id: 0
supervisor_host_id: 0
- - #5
+ - # 5
host_id: 0
supervisor_host_id: 0
- - #6
+ - # 6
host_id: 0
supervisor_host_id: 0
- - #7
+ - # 7
host_id: 0
supervisor_host_id: 0
- - #8
+ - # 8
host_id: 0
supervisor_host_id: 0
- - #9
+ - # 9
host_id: 0
supervisor_host_id: 0
- - #10
+ - # 10
host_id: 0
supervisor_host_id: 0
- - #11
+ - # 11
host_id: 0
supervisor_host_id: 0
- - #12
+ - # 12
host_id: 0
supervisor_host_id: 0
- - #13
+ - # 13
host_id: 0
supervisor_host_id: 0
- - #14
+ - # 14
host_id: 0
supervisor_host_id: 0
- - #15
+ - # 15
host_id: 0
supervisor_host_id: 0
- - #16
+ - # 16
host_id: 0
supervisor_host_id: 0
- - #17
+ - # 17
host_id: 0
supervisor_host_id: 0
- - #18
+ - # 18
host_id: 0
supervisor_host_id: 0
- - #19
+ - # 19
host_id: 0
supervisor_host_id: 0
- - #20
+ - # 20
host_id: 0
supervisor_host_id: 0
- - #21
+ - # 21
host_id: 0
supervisor_host_id: 0
- - #22
+ - # 22
host_id: 0
supervisor_host_id: 0
- - #23
+ - # 23
host_id: 0
supervisor_host_id: 0
- - #24
+ - # 24
host_id: 0
supervisor_host_id: 0
- - #25
+ - # 25
host_id: 0
supervisor_host_id: 0
- - #26
+ - # 26
host_id: 0
supervisor_host_id: 0
- - #27
+ - # 27
host_id: 0
supervisor_host_id: 0
- - #28
+ - # 28
host_id: 0
supervisor_host_id: 0
- - #29
+ - # 29
host_id: 0
supervisor_host_id: 0
- - #30
+ - # 30
host_id: 0
supervisor_host_id: 0
- - #31
+ - # 31
host_id: 0
supervisor_host_id: 0
- - #32
+ - # 32
host_id: 0
supervisor_host_id: 0
otp_config:
subhdr:
magic: 0x4081
size: 69
- write_host_id : 0
+ write_host_id: 0
otp_entry:
- - #1
+ - # 1
host_id: 0
host_perms: 0
- - #2
+ - # 2
host_id: 0
host_perms: 0
- - #3
+ - # 3
host_id: 0
host_perms: 0
- - #4
+ - # 4
host_id: 0
host_perms: 0
- - #5
+ - # 5
host_id: 0
host_perms: 0
- - #6
+ - # 6
host_id: 0
host_perms: 0
- - #7
+ - # 7
host_id: 0
host_perms: 0
- - #8
+ - # 8
host_id: 0
host_perms: 0
- - #9
+ - # 9
host_id: 0
host_perms: 0
- - #10
+ - # 10
host_id: 0
host_perms: 0
- - #11
+ - # 11
host_id: 0
host_perms: 0
- - #12
+ - # 12
host_id: 0
host_perms: 0
- - #13
+ - # 13
host_id: 0
host_perms: 0
- - #14
+ - # 14
host_id: 0
host_perms: 0
- - #15
+ - # 15
host_id: 0
host_perms: 0
- - #16
+ - # 16
host_id: 0
host_perms: 0
- - #17
+ - # 17
host_id: 0
host_perms: 0
- - #18
+ - # 18
host_id: 0
host_perms: 0
- - #19
+ - # 19
host_id: 0
host_perms: 0
- - #20
+ - # 20
host_id: 0
host_perms: 0
- - #21
+ - # 21
host_id: 0
host_perms: 0
- - #22
+ - # 22
host_id: 0
host_perms: 0
- - #23
+ - # 23
host_id: 0
host_perms: 0
- - #24
+ - # 24
host_id: 0
host_perms: 0
- - #25
+ - # 25
host_id: 0
host_perms: 0
- - #26
+ - # 26
host_id: 0
host_perms: 0
- - #27
+ - # 27
host_id: 0
host_perms: 0
- - #28
+ - # 28
host_id: 0
host_perms: 0
- - #29
+ - # 29
host_id: 0
host_perms: 0
- - #30
+ - # 30
host_id: 0
host_perms: 0
- - #31
+ - # 31
host_id: 0
host_perms: 0
- - #32
+ - # 32
host_id: 0
host_perms: 0
dkek_config:
@@ -351,12 +351,12 @@
magic: 0x5170
size: 12
allowed_hosts: [128, 0, 0, 0]
- allow_dkek_export_tisci : 0x5A
+ allow_dkek_export_tisci: 0x5A
rsvd: [0, 0, 0]
sa2ul_cfg:
subhdr:
magic: 0x23BE
- size : 0
+ size: 0
auth_resource_owner: 0
enable_saul_psil_global_config_writes: 0x5A
rsvd: [0, 0]
@@ -364,16 +364,16 @@
subhdr:
magic: 0x42AF
size: 16
- allow_jtag_unlock : 0x5A
- allow_wildcard_unlock : 0x5A
+ allow_jtag_unlock: 0x5A
+ allow_wildcard_unlock: 0x5A
allowed_debug_level_rsvd: 0
rsvd: 0
- min_cert_rev : 0x0
+ min_cert_rev: 0x0
jtag_unlock_hosts: [0, 0, 0, 0]
sec_handover_cfg:
subhdr:
magic: 0x608F
size: 10
- handover_msg_sender : 0
- handover_to_host_id : 0
+ handover_msg_sender: 0
+ handover_to_host_id: 0
rsvd: [0, 0, 0, 0]
diff --git a/board/bsh/imx8mn_smm_s2/MAINTAINERS b/board/bsh/imx8mn_smm_s2/MAINTAINERS
index 1de816c..c789827 100644
--- a/board/bsh/imx8mn_smm_s2/MAINTAINERS
+++ b/board/bsh/imx8mn_smm_s2/MAINTAINERS
@@ -1,5 +1,4 @@
ARM i.MX8MN BSH SMM S2 BOARDS
-M: Ariel D'Alessandro <ariel.dalessandro@collabora.com>
M: Michael Trimarchi <michael@amarulasolutions.com>
S: Maintained
F: arch/arm/dts/imx8mn-bsh-smm-s2*
diff --git a/board/compal/paz00/Makefile b/board/compal/paz00/Makefile
deleted file mode 100644
index 22c26ed..0000000
--- a/board/compal/paz00/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0
-#
-# Copyright (c) 2010-2012, NVIDIA CORPORATION. All rights reserved.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-
-obj-y := paz00.o
diff --git a/board/compal/paz00/paz00.c b/board/compal/paz00/paz00.c
deleted file mode 100644
index d92eb16..0000000
--- a/board/compal/paz00/paz00.c
+++ /dev/null
@@ -1,53 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Copyright (c) 2010-2012, NVIDIA CORPORATION. All rights reserved.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- */
-
-#include <common.h>
-#include <log.h>
-#include <asm/io.h>
-#include <asm/arch/tegra.h>
-#include <asm/arch/pinmux.h>
-#include <asm/gpio.h>
-
-#ifdef CONFIG_MMC_SDHCI_TEGRA
-/*
- * Routine: pin_mux_mmc
- * Description: setup the pin muxes/tristate values for the SDMMC(s)
- */
-void pin_mux_mmc(void)
-{
- /* SDMMC4: config 3, x8 on 2nd set of pins */
- pinmux_set_func(PMUX_PINGRP_ATB, PMUX_FUNC_SDIO4);
- pinmux_set_func(PMUX_PINGRP_GMA, PMUX_FUNC_SDIO4);
- pinmux_set_func(PMUX_PINGRP_GME, PMUX_FUNC_SDIO4);
-
- pinmux_tristate_disable(PMUX_PINGRP_ATB);
- pinmux_tristate_disable(PMUX_PINGRP_GMA);
- pinmux_tristate_disable(PMUX_PINGRP_GME);
-
- /* SDIO1: SDIO1_CLK, SDIO1_CMD, SDIO1_DAT[3:0] */
- pinmux_set_func(PMUX_PINGRP_SDIO1, PMUX_FUNC_SDIO1);
-
- pinmux_tristate_disable(PMUX_PINGRP_SDIO1);
-
- /* For power GPIO PV1 */
- pinmux_tristate_disable(PMUX_PINGRP_UAC);
- /* For CD GPIO PV5 */
- pinmux_tristate_disable(PMUX_PINGRP_GPV);
-}
-#endif
-
-#ifdef CONFIG_VIDEO
-/* this is a weak define that we are overriding */
-void pin_mux_display(void)
-{
- debug("init display pinmux\n");
-
- /* EN_VDD_PANEL GPIO A4 */
- pinmux_tristate_disable(PMUX_PINGRP_DAP2);
-}
-#endif
diff --git a/board/coreboot/coreboot/Makefile b/board/coreboot/coreboot/Makefile
index d292b70..75bfbd1 100644
--- a/board/coreboot/coreboot/Makefile
+++ b/board/coreboot/coreboot/Makefile
@@ -11,3 +11,4 @@
# Daniel Engström, Omicron Ceti AB, daniel@omicron.se.
obj-y += coreboot.o
+obj-$(CONFIG_$(SPL_TPL_)SMBIOS_PARSER) += sysinfo.o
diff --git a/board/coreboot/coreboot/coreboot.c b/board/coreboot/coreboot/coreboot.c
index db855c1..e58dce3 100644
--- a/board/coreboot/coreboot/coreboot.c
+++ b/board/coreboot/coreboot/coreboot.c
@@ -23,50 +23,6 @@
return 0;
}
-#ifdef CONFIG_SMBIOS_PARSER
-int show_board_info(void)
-{
- const struct smbios_entry *smbios = smbios_entry(lib_sysinfo.smbios_start, lib_sysinfo.smbios_size);
-
- if (!smbios)
- goto fallback;
-
- const struct smbios_header *bios = smbios_header(smbios, SMBIOS_BIOS_INFORMATION);
- const struct smbios_header *system = smbios_header(smbios, SMBIOS_SYSTEM_INFORMATION);
- const struct smbios_type0 *t0 = (struct smbios_type0 *)bios;
- const struct smbios_type1 *t1 = (struct smbios_type1 *)system;
-
- if (!t0 || !t1)
- goto fallback;
-
- const char *bios_ver = smbios_string(bios, t0->bios_ver);
- const char *bios_date = smbios_string(bios, t0->bios_release_date);
- const char *model = smbios_string(system, t1->product_name);
- const char *manufacturer = smbios_string(system, t1->manufacturer);
-
- if (!model || !manufacturer || !bios_ver)
- goto fallback;
-
- printf("Vendor: %s\n", manufacturer);
- printf("Model: %s\n", model);
- printf("BIOS Version: %s\n", bios_ver);
- if (bios_date)
- printf("BIOS date: %s\n", bios_date);
-
- return 0;
-
-fallback:
- if (IS_ENABLED(CONFIG_OF_CONTROL)) {
- model = fdt_getprop(gd->fdt_blob, 0, "model", NULL);
-
- if (model)
- printf("Model: %s\n", model);
- }
-
- return checkboard();
-}
-#endif
-
static struct splash_location coreboot_splash_locations[] = {
{
.name = "virtio_fs",
diff --git a/board/coreboot/coreboot/sysinfo.c b/board/coreboot/coreboot/sysinfo.c
new file mode 100644
index 0000000..e0bdc7a
--- /dev/null
+++ b/board/coreboot/coreboot/sysinfo.c
@@ -0,0 +1,89 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * coreboot sysinfo driver
+ *
+ * Copyright 2023 Google LLC
+ * Written by Simon Glass <sjg@chromium.org>
+ */
+
+#include <dm.h>
+#include <smbios.h>
+#include <sysinfo.h>
+#include <asm/cb_sysinfo.h>
+
+struct cb_sysinfo_priv {
+ const struct smbios_header *bios;
+ const struct smbios_header *system;
+ const struct smbios_type0 *t0;
+ const struct smbios_type1 *t1;
+};
+
+static int cb_get_str(struct udevice *dev, int id, size_t size, char *val)
+{
+ struct cb_sysinfo_priv *priv = dev_get_priv(dev);
+ const char *str = NULL;
+
+ switch (id) {
+ case SYSINFO_ID_BOARD_MODEL:
+ if (priv->t1)
+ str = smbios_string(priv->system,
+ priv->t1->product_name);
+ break;
+ case SYSINFO_ID_BOARD_MANUFACTURER:
+ if (priv->t1)
+ str = smbios_string(priv->system,
+ priv->t1->manufacturer);
+ break;
+ case SYSINFO_ID_PRIOR_STAGE_VERSION:
+ if (priv->t0)
+ str = smbios_string(priv->bios, priv->t0->bios_ver);
+ break;
+ case SYSINFO_ID_PRIOR_STAGE_DATE:
+ if (priv->t0)
+ str = smbios_string(priv->bios,
+ priv->t0->bios_release_date);
+ break;
+ }
+ if (!str)
+ return -ENOTSUPP;
+
+ strlcpy(val, str, size);
+
+ return 0;
+}
+
+static int cb_detect(struct udevice *dev)
+{
+ struct cb_sysinfo_priv *priv = dev_get_priv(dev);
+ const struct smbios_entry *smbios;
+
+ smbios = smbios_entry(lib_sysinfo.smbios_start,
+ lib_sysinfo.smbios_size);
+ if (!smbios)
+ return 0;
+
+ priv->bios = smbios_header(smbios, SMBIOS_BIOS_INFORMATION);
+ priv->system = smbios_header(smbios, SMBIOS_SYSTEM_INFORMATION);
+ priv->t0 = (struct smbios_type0 *)priv->bios;
+ priv->t1 = (struct smbios_type1 *)priv->system;
+
+ return 0;
+}
+
+static const struct udevice_id sysinfo_coreboot_ids[] = {
+ { .compatible = "coreboot,sysinfo" },
+ { /* sentinel */ }
+};
+
+static const struct sysinfo_ops sysinfo_coreboot_ops = {
+ .detect = cb_detect,
+ .get_str = cb_get_str,
+};
+
+U_BOOT_DRIVER(sysinfo_coreboot) = {
+ .name = "sysinfo_coreboot",
+ .id = UCLASS_SYSINFO,
+ .of_match = sysinfo_coreboot_ids,
+ .ops = &sysinfo_coreboot_ops,
+ .priv_auto = sizeof(struct cb_sysinfo_priv),
+};
diff --git a/board/cssi/cmpc885/sdram.c b/board/cssi/cmpc885/sdram.c
index 11a50c3..828784b 100644
--- a/board/cssi/cmpc885/sdram.c
+++ b/board/cssi/cmpc885/sdram.c
@@ -4,6 +4,7 @@
* Charles Frey <charles.frey@c-s.fr>
*/
+#include <config.h>
#include <linux/sizes.h>
#include <linux/delay.h>
#include <init.h>
diff --git a/board/data_modul/common/common.c b/board/data_modul/common/common.c
index bf9a114..4ece82c 100644
--- a/board/data_modul/common/common.c
+++ b/board/data_modul/common/common.c
@@ -12,7 +12,6 @@
#include <asm/io.h>
#include <asm/mach-imx/boot_mode.h>
#include <asm/mach-imx/iomux-v3.h>
-#include <common.h>
#include <dm/uclass.h>
#include <hang.h>
#include <i2c_eeprom.h>
@@ -30,6 +29,8 @@
#define WDOG_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE)
+#define DDRC_ECCCFG0_ECC_MODE_MASK 0x7
+
u8 dmo_get_memcfg(void)
{
struct gpio_desc gpio[4];
@@ -58,8 +59,16 @@
int board_phys_sdram_size(phys_size_t *size)
{
u8 memcfg = dmo_get_memcfg();
+ u8 ecc = 0;
- *size = (4ULL >> ((memcfg >> 1) & 0x3)) * SZ_1G;
+ *size = 4ULL >> ((memcfg >> 1) & 0x3);
+
+ if (IS_ENABLED(CONFIG_IMX8M_DRAM_INLINE_ECC)) {
+ /* 896 MiB, i.e. 1 GiB without 12.5% reserved for in-band ECC */
+ ecc = readl(DDRC_ECCCFG0(0)) & DDRC_ECCCFG0_ECC_MODE_MASK;
+ }
+
+ *size *= SZ_1G - (ecc ? (SZ_1G / 8) : 0);
return 0;
}
@@ -100,6 +109,12 @@
}
ddr_init(dram_timing_info[memcfg]);
+
+ if (IS_ENABLED(CONFIG_IMX8M_DRAM_INLINE_ECC)) {
+ printf("DDR: Inline ECC %sabled\n",
+ (readl(DDRC_ECCCFG0(0)) & DDRC_ECCCFG0_ECC_MODE_MASK) ?
+ "en" : "dis");
+ }
}
void dmo_board_init_f(const iomux_v3_cfg_t wdog_pad,
diff --git a/board/data_modul/imx8mm_edm_sbc/imx8mm_data_modul_edm_sbc.c b/board/data_modul/imx8mm_edm_sbc/imx8mm_data_modul_edm_sbc.c
index ff89333..bfb2bdd 100644
--- a/board/data_modul/imx8mm_edm_sbc/imx8mm_data_modul_edm_sbc.c
+++ b/board/data_modul/imx8mm_edm_sbc/imx8mm_data_modul_edm_sbc.c
@@ -5,9 +5,11 @@
#include <common.h>
#include <asm/arch/clock.h>
+#include <asm/arch/imx8mm_pins.h>
#include <asm/io.h>
#include <dm.h>
#include <dm/device-internal.h>
+#include <linux/bitfield.h>
#include <malloc.h>
#include <spl.h>
@@ -34,3 +36,43 @@
return 0;
}
+
+int fdtdec_board_setup(const void *fdt_blob)
+{
+ const void __iomem *mux = (void __iomem *)IOMUXC_BASE_ADDR +
+ FIELD_GET(MUX_CTRL_OFS_MASK, IMX8MM_PAD_ENET_MDC_GPIO1_IO16);
+ const char *phy_compat = "ethernet-phy-ieee802.3-c22";
+ bool is_bcmphy;
+ int phy_node;
+ int ret;
+
+ /* Do nothing if not i.MX8MM eDM SBC */
+ ret = fdt_node_check_compatible(fdt_blob, 0, "dmo,imx8mm-data-modul-edm-sbc");
+ if (ret)
+ return 0;
+
+ /*
+ * If GPIO1_16 RGMII_MDC is HIGH, then R530 is populated.
+ * R530 is populated only on boards with AR8031 PHY.
+ *
+ * If GPIO1_16 RGMII_MDC is LOW, then the in-SoM pull down
+ * is the dominant pull resistor. This is the case on boards
+ * with BCM54213PE PHY.
+ */
+ setbits_le32(mux, IOMUX_CONFIG_SION);
+ is_bcmphy = !(readl(GPIO1_BASE_ADDR) & BIT(16));
+ clrbits_le32(mux, IOMUX_CONFIG_SION);
+
+ phy_node = fdt_node_offset_by_compatible(fdt_blob, -1, phy_compat);
+ if (phy_node < 0)
+ return 0;
+
+ /*
+ * Update PHY MDC address in control DT based on the populated
+ * PHY type. AR8031 is at address 0, BCM54213PE is at address 1.
+ */
+ fdt_setprop_inplace_u32((void *)fdt_blob, phy_node,
+ "reg", is_bcmphy ? 1 : 0);
+
+ return 0;
+}
diff --git a/board/data_modul/imx8mp_edm_sbc/imx8mp_data_modul_edm_sbc.c b/board/data_modul/imx8mp_edm_sbc/imx8mp_data_modul_edm_sbc.c
index 9fbbbc1..f0f373a 100644
--- a/board/data_modul/imx8mp_edm_sbc/imx8mp_data_modul_edm_sbc.c
+++ b/board/data_modul/imx8mp_edm_sbc/imx8mp_data_modul_edm_sbc.c
@@ -5,11 +5,13 @@
#include <common.h>
#include <asm/arch/clock.h>
+#include <asm/arch/imx8mp_pins.h>
#include <asm/io.h>
#include <dm.h>
#include <dm/device-internal.h>
#include <env.h>
#include <env_internal.h>
+#include <linux/bitfield.h>
#include <malloc.h>
#include <net.h>
#include <spl.h>
@@ -65,3 +67,51 @@
return 0;
}
+
+int fdtdec_board_setup(const void *fdt_blob)
+{
+ const void __iomem *mux = (void __iomem *)IOMUXC_BASE_ADDR +
+ FIELD_GET(MUX_CTRL_OFS_MASK, MX8MP_PAD_ENET_MDC__ENET_QOS_MDC);
+ const char *phy_compat = "ethernet-phy-ieee802.3-c22";
+ bool is_bcmphy;
+ int phy_node;
+ int ret;
+
+ /* Do nothing if not i.MX8MP eDM SBC */
+ ret = fdt_node_check_compatible(fdt_blob, 0, "dmo,imx8mp-data-modul-edm-sbc");
+ if (ret)
+ return 0;
+
+ /*
+ * If GPIO1_16 RGMII_MDC is HIGH, then R390 is populated.
+ * R390 is populated only on boards with AR8031 PHY.
+ *
+ * If GPIO1_16 RGMII_MDC is LOW, then the in-SoM pull down
+ * is the dominant pull resistor. This is the case on boards
+ * with BCM54213PE PHY.
+ */
+ setbits_le32(mux, IOMUX_CONFIG_SION);
+ is_bcmphy = !(readl(GPIO1_BASE_ADDR) & BIT(16));
+ clrbits_le32(mux, IOMUX_CONFIG_SION);
+
+ phy_node = fdt_node_offset_by_compatible(fdt_blob, -1, phy_compat);
+ if (phy_node < 0)
+ return 0;
+
+ /*
+ * Update PHY MDC address in control DT based on the populated
+ * PHY type. AR8031 is at address 0, BCM54213PE is at address 1.
+ */
+ fdt_setprop_inplace_u32((void *)fdt_blob, phy_node,
+ "reg", is_bcmphy ? 1 : 0);
+
+ /* Apply the same modification to EQoS PHY */
+ phy_node = fdt_node_offset_by_compatible(fdt_blob, phy_node, phy_compat);
+ if (phy_node < 0)
+ return 0;
+
+ fdt_setprop_inplace_u32((void *)fdt_blob, phy_node,
+ "reg", is_bcmphy ? 1 : 0);
+
+ return 0;
+}
diff --git a/board/data_modul/imx8mp_edm_sbc/lpddr4_timing_4G_32.c b/board/data_modul/imx8mp_edm_sbc/lpddr4_timing_4G_32.c
index 04cef3a..0ad4000 100644
--- a/board/data_modul/imx8mp_edm_sbc/lpddr4_timing_4G_32.c
+++ b/board/data_modul/imx8mp_edm_sbc/lpddr4_timing_4G_32.c
@@ -19,47 +19,66 @@
{ 0x3d400030, 0x1 },
{ 0x3d400000, 0xa3080020 },
{ 0x3d400020, 0x1303 },
- { 0x3d400024, 0x1c79100 },
+ { 0x3d400024, 0x1c7cf80 },
{ 0x3d400064, 0x710106 },
+#if IS_ENABLED(CONFIG_IMX8M_DRAM_INLINE_ECC)
+ { 0x3d400070, 0x7027fd4 },
+#else
{ 0x3d400070, 0x7027f90 },
+#endif
{ 0x3d400074, 0x790 },
- { 0x3d4000d0, 0xc0030720 },
+ { 0x3d4000d0, 0xc0030721 },
{ 0x3d4000d4, 0xb80000 },
- { 0x3d4000dc, 0xe40036 },
- { 0x3d4000e0, 0x330000 },
+ { 0x3d4000dc, 0xf4003f },
+ { 0x3d4000e0, 0xf30000 },
{ 0x3d4000e8, 0x660048 },
{ 0x3d4000ec, 0x160048 },
- { 0x3d400100, 0x1e262028 },
- { 0x3d400104, 0x7073b },
+ { 0x3d400100, 0x1f262028 },
+ { 0x3d400104, 0x8083b },
{ 0x3d40010c, 0xe0e000 },
{ 0x3d400110, 0x11040a11 },
- { 0x3d400114, 0x2050e0e },
- { 0x3d400118, 0x1010008 },
- { 0x3d40011c, 0x501 },
- { 0x3d400130, 0x20700 },
+ { 0x3d400114, 0x2050f0f },
+ { 0x3d400118, 0x1010009 },
+ { 0x3d40011c, 0x502 },
+ { 0x3d400130, 0x20800 },
{ 0x3d400134, 0xe100002 },
{ 0x3d400138, 0x10d },
{ 0x3d400144, 0xbb005e },
- { 0x3d400180, 0x3a5001c },
- { 0x3d400184, 0x2f071e5 },
+ { 0x3d400180, 0x3a6001d },
+ { 0x3d400184, 0x2f071f4 },
{ 0x3d400188, 0x0 },
- { 0x3d400190, 0x49b820c },
+ { 0x3d400190, 0x4a3820e },
{ 0x3d400194, 0x80303 },
- { 0x3d4001b4, 0x1b0c },
+ { 0x3d4001b4, 0x230e },
{ 0x3d4001a0, 0xe0400018 },
{ 0x3d4001a4, 0xdf00e4 },
{ 0x3d4001a8, 0x80000000 },
{ 0x3d4001b0, 0x11 },
- { 0x3d4001c0, 0x1 },
+ { 0x3d4001c0, 0x7 },
{ 0x3d4001c4, 0x1 },
- { 0x3d4000f4, 0xc99 },
- { 0x3d400108, 0x810191a },
+ { 0x3d4000f4, 0x799 },
+ { 0x3d400108, 0x9141c1c },
+#if IS_ENABLED(CONFIG_IMX8M_DRAM_INLINE_ECC)
+ { 0x3d400200, 0x14 },
+#else
{ 0x3d400200, 0x17 },
+#endif
+ { 0x3d400208, 0x0 },
+#if IS_ENABLED(CONFIG_IMX8M_DRAM_INLINE_ECC)
+ { 0x3d40020c, 0x14141400 },
+#else
{ 0x3d40020c, 0x0 },
+#endif
{ 0x3d400210, 0x1f1f },
+#if IS_ENABLED(CONFIG_IMX8M_DRAM_INLINE_ECC)
+ { 0x3d400204, 0x50505 },
+ { 0x3d400214, 0x4040404 },
+ { 0x3d400218, 0x4040404 },
+#else
{ 0x3d400204, 0x80808 },
{ 0x3d400214, 0x7070707 },
{ 0x3d400218, 0x7070707 },
+#endif
{ 0x3d40021c, 0xf0f },
{ 0x3d400250, 0x1705 },
{ 0x3d400254, 0x2c },
@@ -78,7 +97,7 @@
{ 0x3d402050, 0x20d000 },
{ 0x3d402064, 0xc001c },
{ 0x3d4020dc, 0x840000 },
- { 0x3d4020e0, 0x330000 },
+ { 0x3d4020e0, 0xf30000 },
{ 0x3d4020e8, 0x660048 },
{ 0x3d4020ec, 0x160048 },
{ 0x3d402100, 0xa040305 },
@@ -88,7 +107,7 @@
{ 0x3d402110, 0x2040202 },
{ 0x3d402114, 0x2030202 },
{ 0x3d402118, 0x1010004 },
- { 0x3d40211c, 0x301 },
+ { 0x3d40211c, 0x302 },
{ 0x3d402130, 0x20300 },
{ 0x3d402134, 0xa100002 },
{ 0x3d402138, 0x1d },
@@ -97,13 +116,13 @@
{ 0x3d402190, 0x3818200 },
{ 0x3d402194, 0x80303 },
{ 0x3d4021b4, 0x100 },
- { 0x3d4020f4, 0xc99 },
+ { 0x3d4020f4, 0x599 },
{ 0x3d403020, 0x1001 },
{ 0x3d403024, 0xc3500 },
{ 0x3d403050, 0x20d000 },
{ 0x3d403064, 0x30007 },
{ 0x3d4030dc, 0x840000 },
- { 0x3d4030e0, 0x330000 },
+ { 0x3d4030e0, 0xf30000 },
{ 0x3d4030e8, 0x660048 },
{ 0x3d4030ec, 0x160048 },
{ 0x3d403100, 0xa010102 },
@@ -113,7 +132,7 @@
{ 0x3d403110, 0x2040202 },
{ 0x3d403114, 0x2030202 },
{ 0x3d403118, 0x1010004 },
- { 0x3d40311c, 0x301 },
+ { 0x3d40311c, 0x302 },
{ 0x3d403130, 0x20300 },
{ 0x3d403134, 0xa100002 },
{ 0x3d403138, 0x8 },
@@ -122,7 +141,7 @@
{ 0x3d403190, 0x3818200 },
{ 0x3d403194, 0x80303 },
{ 0x3d4031b4, 0x100 },
- { 0x3d4030f4, 0xc99 },
+ { 0x3d4030f4, 0x599 },
{ 0x3d400028, 0x0 },
};
@@ -260,16 +279,16 @@
{ 0x212149, 0xeba },
{ 0x213049, 0xeba },
{ 0x213149, 0xeba },
- { 0x43, 0xe7 },
- { 0x1043, 0xe7 },
- { 0x2043, 0xe7 },
- { 0x3043, 0xe7 },
- { 0x4043, 0xe7 },
- { 0x5043, 0xe7 },
- { 0x6043, 0xe7 },
- { 0x7043, 0xe7 },
- { 0x8043, 0xe7 },
- { 0x9043, 0xe7 },
+ { 0x43, 0x3ff },
+ { 0x1043, 0x3ff },
+ { 0x2043, 0x3ff },
+ { 0x3043, 0x3ff },
+ { 0x4043, 0x3ff },
+ { 0x5043, 0x3ff },
+ { 0x6043, 0x3ff },
+ { 0x7043, 0x3ff },
+ { 0x8043, 0x3ff },
+ { 0x9043, 0x3ff },
{ 0x20018, 0x3 },
{ 0x20075, 0x4 },
{ 0x20050, 0x0 },
@@ -319,19 +338,15 @@
{ 0x200f6, 0x0 },
{ 0x200f7, 0xf000 },
{ 0x20025, 0x0 },
- { 0x2002d, 0x0 },
- { 0x12002d, 0x0 },
- { 0x22002d, 0x0 },
+ { 0x2002d, 0x1 },
+ { 0x12002d, 0x1 },
+ { 0x22002d, 0x1 },
{ 0x2007d, 0x212 },
{ 0x12007d, 0x212 },
{ 0x22007d, 0x212 },
{ 0x2007c, 0x61 },
{ 0x12007c, 0x61 },
{ 0x22007c, 0x61 },
- { 0x1004a, 0x500 },
- { 0x1104a, 0x500 },
- { 0x1204a, 0x500 },
- { 0x1304a, 0x500 },
{ 0x2002c, 0x0 },
};
@@ -1061,7 +1076,7 @@
/* P0 message block paremeter for training firmware */
static struct dram_cfg_param ddr_fsp0_cfg[] = {
{ 0xd0000, 0x0 },
- { 0x54003, 0xe94 },
+ { 0x54003, 0xe96 },
{ 0x54004, 0x2 },
{ 0x54005, 0x2228 },
{ 0x54006, 0x14 },
@@ -1070,26 +1085,26 @@
{ 0x5400b, 0x2 },
{ 0x5400f, 0x100 },
{ 0x54012, 0x310 },
- { 0x54019, 0x36e4 },
- { 0x5401a, 0x33 },
+ { 0x54019, 0x3ff4 },
+ { 0x5401a, 0xf3 },
{ 0x5401b, 0x4866 },
{ 0x5401c, 0x4800 },
{ 0x5401e, 0x16 },
- { 0x5401f, 0x36e4 },
- { 0x54020, 0x33 },
+ { 0x5401f, 0x3ff4 },
+ { 0x54020, 0xf3 },
{ 0x54021, 0x4866 },
{ 0x54022, 0x4800 },
{ 0x54024, 0x16 },
{ 0x5402b, 0x1000 },
{ 0x5402c, 0x3 },
- { 0x54032, 0xe400 },
- { 0x54033, 0x3336 },
+ { 0x54032, 0xf400 },
+ { 0x54033, 0xf33f },
{ 0x54034, 0x6600 },
{ 0x54035, 0x48 },
{ 0x54036, 0x48 },
{ 0x54037, 0x1600 },
- { 0x54038, 0xe400 },
- { 0x54039, 0x3336 },
+ { 0x54038, 0xf400 },
+ { 0x54039, 0xf33f },
{ 0x5403a, 0x6600 },
{ 0x5403b, 0x48 },
{ 0x5403c, 0x48 },
@@ -1111,25 +1126,25 @@
{ 0x5400f, 0x100 },
{ 0x54012, 0x310 },
{ 0x54019, 0x84 },
- { 0x5401a, 0x33 },
+ { 0x5401a, 0xf3 },
{ 0x5401b, 0x4866 },
{ 0x5401c, 0x4800 },
{ 0x5401e, 0x16 },
{ 0x5401f, 0x84 },
- { 0x54020, 0x33 },
+ { 0x54020, 0xf3 },
{ 0x54021, 0x4866 },
{ 0x54022, 0x4800 },
{ 0x54024, 0x16 },
{ 0x5402b, 0x1000 },
{ 0x5402c, 0x3 },
{ 0x54032, 0x8400 },
- { 0x54033, 0x3300 },
+ { 0x54033, 0xf300 },
{ 0x54034, 0x6600 },
{ 0x54035, 0x48 },
{ 0x54036, 0x48 },
{ 0x54037, 0x1600 },
{ 0x54038, 0x8400 },
- { 0x54039, 0x3300 },
+ { 0x54039, 0xf300 },
{ 0x5403a, 0x6600 },
{ 0x5403b, 0x48 },
{ 0x5403c, 0x48 },
@@ -1151,25 +1166,25 @@
{ 0x5400f, 0x100 },
{ 0x54012, 0x310 },
{ 0x54019, 0x84 },
- { 0x5401a, 0x33 },
+ { 0x5401a, 0xf3 },
{ 0x5401b, 0x4866 },
{ 0x5401c, 0x4800 },
{ 0x5401e, 0x16 },
{ 0x5401f, 0x84 },
- { 0x54020, 0x33 },
+ { 0x54020, 0xf3 },
{ 0x54021, 0x4866 },
{ 0x54022, 0x4800 },
{ 0x54024, 0x16 },
{ 0x5402b, 0x1000 },
{ 0x5402c, 0x3 },
{ 0x54032, 0x8400 },
- { 0x54033, 0x3300 },
+ { 0x54033, 0xf300 },
{ 0x54034, 0x6600 },
{ 0x54035, 0x48 },
{ 0x54036, 0x48 },
{ 0x54037, 0x1600 },
{ 0x54038, 0x8400 },
- { 0x54039, 0x3300 },
+ { 0x54039, 0xf300 },
{ 0x5403a, 0x6600 },
{ 0x5403b, 0x48 },
{ 0x5403c, 0x48 },
@@ -1180,7 +1195,7 @@
/* P0 2D message block paremeter for training firmware */
static struct dram_cfg_param ddr_fsp0_2d_cfg[] = {
{ 0xd0000, 0x0 },
- { 0x54003, 0xe94 },
+ { 0x54003, 0xe96 },
{ 0x54004, 0x2 },
{ 0x54005, 0x2228 },
{ 0x54006, 0x14 },
@@ -1190,26 +1205,26 @@
{ 0x5400f, 0x100 },
{ 0x54010, 0x1f7f },
{ 0x54012, 0x310 },
- { 0x54019, 0x36e4 },
- { 0x5401a, 0x33 },
+ { 0x54019, 0x3ff4 },
+ { 0x5401a, 0xf3 },
{ 0x5401b, 0x4866 },
{ 0x5401c, 0x4800 },
{ 0x5401e, 0x16 },
- { 0x5401f, 0x36e4 },
- { 0x54020, 0x33 },
+ { 0x5401f, 0x3ff4 },
+ { 0x54020, 0xf3 },
{ 0x54021, 0x4866 },
{ 0x54022, 0x4800 },
{ 0x54024, 0x16 },
{ 0x5402b, 0x1000 },
{ 0x5402c, 0x3 },
- { 0x54032, 0xe400 },
- { 0x54033, 0x3336 },
+ { 0x54032, 0xf400 },
+ { 0x54033, 0xf33f },
{ 0x54034, 0x6600 },
{ 0x54035, 0x48 },
{ 0x54036, 0x48 },
{ 0x54037, 0x1600 },
- { 0x54038, 0xe400 },
- { 0x54039, 0x3336 },
+ { 0x54038, 0xf400 },
+ { 0x54039, 0xf33f },
{ 0x5403a, 0x6600 },
{ 0x5403b, 0x48 },
{ 0x5403c, 0x48 },
@@ -1699,9 +1714,9 @@
{ 0x400d7, 0x20b },
{ 0x2003a, 0x2 },
{ 0x200be, 0x3 },
- { 0x2000b, 0x419 },
+ { 0x2000b, 0x41a },
{ 0x2000c, 0xe9 },
- { 0x2000d, 0x91c },
+ { 0x2000d, 0x91d },
{ 0x2000e, 0x2c },
{ 0x12000b, 0x70 },
{ 0x12000c, 0x19 },
@@ -1804,8 +1819,8 @@
static struct dram_fsp_msg ddr_dram_fsp_msg[] = {
{
- /* P0 3733mts 1D */
- .drate = 3733,
+ /* P0 3600mts 1D */
+ .drate = 3600,
.fw_type = FW_1D_IMAGE,
.fsp_cfg = ddr_fsp0_cfg,
.fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_cfg),
@@ -1825,8 +1840,8 @@
.fsp_cfg_num = ARRAY_SIZE(ddr_fsp2_cfg),
},
{
- /* P0 3733mts 2D */
- .drate = 3733,
+ /* P0 3600mts 2D */
+ .drate = 3600,
.fw_type = FW_2D_IMAGE,
.fsp_cfg = ddr_fsp0_2d_cfg,
.fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_2d_cfg),
@@ -1845,5 +1860,19 @@
.ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr),
.ddrphy_pie = ddr_phy_pie,
.ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
- .fsp_table = { 3733, 400, 100, },
+ .fsp_table = { 3600, 400, 100, },
};
+
+#if IS_ENABLED(CONFIG_IMX8M_DRAM_INLINE_ECC)
+void board_dram_ecc_scrub(void)
+{
+ ddrc_inline_ecc_scrub(0x0,0x7ffffff);
+ ddrc_inline_ecc_scrub(0x8000000,0xfffffff);
+ ddrc_inline_ecc_scrub(0x10000000,0x17ffffff);
+ ddrc_inline_ecc_scrub(0x18000000,0x1fffffff);
+ ddrc_inline_ecc_scrub(0x20000000,0x27ffffff);
+ ddrc_inline_ecc_scrub(0x28000000,0x2fffffff);
+ ddrc_inline_ecc_scrub(0x30000000,0x37ffffff);
+ ddrc_inline_ecc_scrub_end(0x0,0x3fffffff);
+}
+#endif
diff --git a/board/data_modul/imx8mp_edm_sbc/spl.c b/board/data_modul/imx8mp_edm_sbc/spl.c
index cfc4b65..cc2d253 100644
--- a/board/data_modul/imx8mp_edm_sbc/spl.c
+++ b/board/data_modul/imx8mp_edm_sbc/spl.c
@@ -68,6 +68,11 @@
/* To avoid timing risk from SoC to ARM, increase VDD_ARM to OD voltage 0.95V */
pmic_reg_write(dev, PCA9450_BUCK2OUT_DVS0, 0x1c);
+ /* DRAM Vdd1 always FPWM */
+ pmic_reg_write(dev, PCA9450_BUCK5CTRL, 0x0d);
+ /* DRAM Vdd2/Vddq always FPWM */
+ pmic_reg_write(dev, PCA9450_BUCK6CTRL, 0x0d);
+
/* Set LDO4 and CONFIG2 to enable the I2C level translator. */
pmic_reg_write(dev, PCA9450_LDO4CTRL, 0x59);
pmic_reg_write(dev, PCA9450_CONFIG2, 0x1);
@@ -75,6 +80,19 @@
return 0;
}
+void spl_board_init(void)
+{
+ /*
+ * Set GIC clock to 500 MHz for OD VDD_SOC. Kernel driver does not
+ * allow to change it. Should set the clock after PMIC setting done.
+ * Default is 400 MHz (system_pll1_800m with div = 2) set by ROM for
+ * ND VDD_SOC.
+ */
+ clock_enable(CCGR_GIC, 0);
+ clock_set_target_val(GIC_CLK_ROOT, CLK_ROOT_ON | CLK_ROOT_SOURCE_SEL(5));
+ clock_enable(CCGR_GIC, 1);
+}
+
int spl_board_boot_device(enum boot_device boot_dev_spl)
{
if (boot_dev_spl == SPI_NOR_BOOT) /* SPI NOR */
diff --git a/board/dhelectronics/dh_imx8mp/imx8mp_dhcom_pdk2.c b/board/dhelectronics/dh_imx8mp/imx8mp_dhcom_pdk2.c
index 5edb85e..5f12d78 100644
--- a/board/dhelectronics/dh_imx8mp/imx8mp_dhcom_pdk2.c
+++ b/board/dhelectronics/dh_imx8mp/imx8mp_dhcom_pdk2.c
@@ -5,6 +5,7 @@
#include <common.h>
#include <asm/arch/clock.h>
+#include <asm/arch/ddr.h>
#include <asm/arch/sys_proto.h>
#include <asm/io.h>
#include <dm.h>
@@ -30,9 +31,11 @@
int board_phys_sdram_size(phys_size_t *size)
{
const u16 memsz[] = { 512, 1024, 1536, 2048, 3072, 4096, 6144, 8192 };
+ const u8 ecc = readl(DDRC_ECCCFG0(0)) & DDRC_ECCCFG0_ECC_MODE_MASK;
u8 memcfg = dh_get_memcfg();
- *size = (u64)memsz[memcfg] << 20ULL;
+ /* 896 kiB, i.e. 1 MiB without 12.5% reserved for in-band ECC */
+ *size = (u64)memsz[memcfg] * (SZ_1M - (ecc ? (SZ_1M / 8) : 0));
return 0;
}
diff --git a/board/dhelectronics/dh_imx8mp/lpddr4_timing.h b/board/dhelectronics/dh_imx8mp/lpddr4_timing.h
index 7894da3..c4d5117 100644
--- a/board/dhelectronics/dh_imx8mp/lpddr4_timing.h
+++ b/board/dhelectronics/dh_imx8mp/lpddr4_timing.h
@@ -9,6 +9,12 @@
extern struct dram_timing_info dh_imx8mp_dhcom_dram_timing_16g_x32;
extern struct dram_timing_info dh_imx8mp_dhcom_dram_timing_32g_x32;
+typedef void (*scrub_func_t)(void);
+extern void dh_imx8mp_dhcom_dram_scrub_16g_x32(void);
+extern void dh_imx8mp_dhcom_dram_scrub_32g_x32(void);
+
u8 dh_get_memcfg(void);
+#define DDRC_ECCCFG0_ECC_MODE_MASK 0x7
+
#endif /* __LPDDR4_TIMING_H__ */
diff --git a/board/dhelectronics/dh_imx8mp/lpddr4_timing_2G_32.c b/board/dhelectronics/dh_imx8mp/lpddr4_timing_2G_32.c
index 51b8c4c..add7a0b 100644
--- a/board/dhelectronics/dh_imx8mp/lpddr4_timing_2G_32.c
+++ b/board/dhelectronics/dh_imx8mp/lpddr4_timing_2G_32.c
@@ -14,48 +14,62 @@
{ 0x3d400030, 0x1 },
{ 0x3d400000, 0xa1080020 },
{ 0x3d400020, 0x1323 },
- { 0x3d400024, 0x1c79100 },
- { 0x3d400064, 0x710106 },
+ { 0x3d400024, 0x1b77400 },
+ { 0x3d400064, 0x6d00fc },
+#if IS_ENABLED(CONFIG_IMX8M_DRAM_INLINE_ECC)
+ { 0x3d400070, 0x7027fd4 },
+#else
{ 0x3d400070, 0x7027f90 },
+#endif
{ 0x3d400074, 0x790 },
- { 0x3d4000d0, 0xc0030720 },
- { 0x3d4000d4, 0xb80000 },
+ { 0x3d4000d0, 0xc00306df },
+ { 0x3d4000d4, 0xb10000 },
{ 0x3d4000dc, 0xe40036 },
- { 0x3d4000e0, 0x330000 },
+ { 0x3d4000e0, 0xf30000 },
{ 0x3d4000e8, 0x660048 },
{ 0x3d4000ec, 0x160048 },
- { 0x3d400100, 0x1e262028 },
- { 0x3d400104, 0x7073b },
- { 0x3d40010c, 0xe0e000 },
- { 0x3d400110, 0x11040a11 },
+ { 0x3d400100, 0x1d241e26 },
+ { 0x3d400104, 0x70739 },
+ { 0x3d40010c, 0xd0d000 },
+ { 0x3d400110, 0x11040911 },
{ 0x3d400114, 0x2050e0e },
{ 0x3d400118, 0x1010008 },
{ 0x3d40011c, 0x502 },
{ 0x3d400130, 0x20700 },
{ 0x3d400134, 0xd100002 },
- { 0x3d400138, 0x10d },
- { 0x3d400144, 0xbb005e },
- { 0x3d400180, 0x3a5001c },
- { 0x3d400184, 0x2f071e5 },
+ { 0x3d400138, 0x103 },
+ { 0x3d400144, 0xb4005a },
+ { 0x3d400180, 0x384001b },
+ { 0x3d400184, 0x2d06ddd },
{ 0x3d400188, 0x0 },
- { 0x3d400190, 0x49b820c },
+ { 0x3d400190, 0x49f820c },
{ 0x3d400194, 0x80303 },
- { 0x3d4001b4, 0x1b0c },
+ { 0x3d4001b4, 0x1f0c },
{ 0x3d4001a0, 0xe0400018 },
{ 0x3d4001a4, 0xdf00e4 },
{ 0x3d4001a8, 0x80000000 },
{ 0x3d4001b0, 0x11 },
- { 0x3d4001c0, 0x1 },
+ { 0x3d4001c0, 0x7 },
{ 0x3d4001c4, 0x1 },
{ 0x3d4000f4, 0x799 },
- { 0x3d400108, 0x810191a },
+ { 0x3d400108, 0x8121b1a },
{ 0x3d400200, 0x1f },
{ 0x3d400208, 0x0 },
+#if IS_ENABLED(CONFIG_IMX8M_DRAM_INLINE_ECC)
+ { 0x3d40020c, 0x13131300 },
+#else
{ 0x3d40020c, 0x0 },
+#endif
{ 0x3d400210, 0x1f1f },
+#if IS_ENABLED(CONFIG_IMX8M_DRAM_INLINE_ECC)
+ { 0x3d400204, 0x50505 },
+ { 0x3d400214, 0x4040404 },
+ { 0x3d400218, 0x4040404 },
+#else
{ 0x3d400204, 0x80808 },
{ 0x3d400214, 0x7070707 },
{ 0x3d400218, 0x7070707 },
+#endif
{ 0x3d40021c, 0xf0f },
{ 0x3d400250, 0x1705 },
{ 0x3d400254, 0x2c },
@@ -74,7 +88,7 @@
{ 0x3d402050, 0x20d000 },
{ 0x3d402064, 0xc001c },
{ 0x3d4020dc, 0x840000 },
- { 0x3d4020e0, 0x330000 },
+ { 0x3d4020e0, 0xf30000 },
{ 0x3d4020e8, 0x660048 },
{ 0x3d4020ec, 0x160048 },
{ 0x3d402100, 0xa040305 },
@@ -99,7 +113,7 @@
{ 0x3d403050, 0x20d000 },
{ 0x3d403064, 0x30007 },
{ 0x3d4030dc, 0x840000 },
- { 0x3d4030e0, 0x330000 },
+ { 0x3d4030e0, 0xf30000 },
{ 0x3d4030e8, 0x660048 },
{ 0x3d4030ec, 0x160048 },
{ 0x3d403100, 0xa010102 },
@@ -269,7 +283,7 @@
{ 0x20018, 0x3 },
{ 0x20075, 0x4 },
{ 0x20050, 0x0 },
- { 0x20008, 0x3a5 },
+ { 0x20008, 0x384 },
{ 0x120008, 0x64 },
{ 0x220008, 0x19 },
{ 0x20088, 0x9 },
@@ -315,19 +329,15 @@
{ 0x200f6, 0x0 },
{ 0x200f7, 0xf000 },
{ 0x20025, 0x0 },
- { 0x2002d, 0x0 },
- { 0x12002d, 0x0 },
- { 0x22002d, 0x0 },
+ { 0x2002d, 0x1 },
+ { 0x12002d, 0x1 },
+ { 0x22002d, 0x1 },
{ 0x2007d, 0x212 },
{ 0x12007d, 0x212 },
{ 0x22007d, 0x212 },
{ 0x2007c, 0x61 },
{ 0x12007c, 0x61 },
{ 0x22007c, 0x61 },
- { 0x1004a, 0x500 },
- { 0x1104a, 0x500 },
- { 0x1204a, 0x500 },
- { 0x1304a, 0x500 },
{ 0x2002c, 0x0 },
};
@@ -1057,7 +1067,7 @@
/* P0 message block paremeter for training firmware */
static struct dram_cfg_param ddr_fsp0_cfg[] = {
{ 0xd0000, 0x0 },
- { 0x54003, 0xe94 },
+ { 0x54003, 0xe10 },
{ 0x54004, 0x2 },
{ 0x54005, 0x2228 },
{ 0x54006, 0x14 },
@@ -1067,25 +1077,25 @@
{ 0x5400f, 0x100 },
{ 0x54012, 0x110 },
{ 0x54019, 0x36e4 },
- { 0x5401a, 0x33 },
+ { 0x5401a, 0xf3 },
{ 0x5401b, 0x4866 },
{ 0x5401c, 0x4800 },
{ 0x5401e, 0x16 },
{ 0x5401f, 0x36e4 },
- { 0x54020, 0x33 },
+ { 0x54020, 0xf3 },
{ 0x54021, 0x4866 },
{ 0x54022, 0x4800 },
{ 0x54024, 0x16 },
{ 0x5402b, 0x1000 },
{ 0x5402c, 0x1 },
{ 0x54032, 0xe400 },
- { 0x54033, 0x3336 },
+ { 0x54033, 0xf336 },
{ 0x54034, 0x6600 },
{ 0x54035, 0x48 },
{ 0x54036, 0x48 },
{ 0x54037, 0x1600 },
{ 0x54038, 0xe400 },
- { 0x54039, 0x3336 },
+ { 0x54039, 0xf336 },
{ 0x5403a, 0x6600 },
{ 0x5403b, 0x48 },
{ 0x5403c, 0x48 },
@@ -1107,25 +1117,25 @@
{ 0x5400f, 0x100 },
{ 0x54012, 0x110 },
{ 0x54019, 0x84 },
- { 0x5401a, 0x33 },
+ { 0x5401a, 0xf3 },
{ 0x5401b, 0x4866 },
{ 0x5401c, 0x4800 },
{ 0x5401e, 0x16 },
{ 0x5401f, 0x84 },
- { 0x54020, 0x33 },
+ { 0x54020, 0xf3 },
{ 0x54021, 0x4866 },
{ 0x54022, 0x4800 },
{ 0x54024, 0x16 },
{ 0x5402b, 0x1000 },
{ 0x5402c, 0x1 },
{ 0x54032, 0x8400 },
- { 0x54033, 0x3300 },
+ { 0x54033, 0xf300 },
{ 0x54034, 0x6600 },
{ 0x54035, 0x48 },
{ 0x54036, 0x48 },
{ 0x54037, 0x1600 },
{ 0x54038, 0x8400 },
- { 0x54039, 0x3300 },
+ { 0x54039, 0xf300 },
{ 0x5403a, 0x6600 },
{ 0x5403b, 0x48 },
{ 0x5403c, 0x48 },
@@ -1147,25 +1157,25 @@
{ 0x5400f, 0x100 },
{ 0x54012, 0x110 },
{ 0x54019, 0x84 },
- { 0x5401a, 0x33 },
+ { 0x5401a, 0xf3 },
{ 0x5401b, 0x4866 },
{ 0x5401c, 0x4800 },
{ 0x5401e, 0x16 },
{ 0x5401f, 0x84 },
- { 0x54020, 0x33 },
+ { 0x54020, 0xf3 },
{ 0x54021, 0x4866 },
{ 0x54022, 0x4800 },
{ 0x54024, 0x16 },
{ 0x5402b, 0x1000 },
{ 0x5402c, 0x1 },
{ 0x54032, 0x8400 },
- { 0x54033, 0x3300 },
+ { 0x54033, 0xf300 },
{ 0x54034, 0x6600 },
{ 0x54035, 0x48 },
{ 0x54036, 0x48 },
{ 0x54037, 0x1600 },
{ 0x54038, 0x8400 },
- { 0x54039, 0x3300 },
+ { 0x54039, 0xf300 },
{ 0x5403a, 0x6600 },
{ 0x5403b, 0x48 },
{ 0x5403c, 0x48 },
@@ -1176,7 +1186,7 @@
/* P0 2D message block paremeter for training firmware */
static struct dram_cfg_param ddr_fsp0_2d_cfg[] = {
{ 0xd0000, 0x0 },
- { 0x54003, 0xe94 },
+ { 0x54003, 0xe10 },
{ 0x54004, 0x2 },
{ 0x54005, 0x2228 },
{ 0x54006, 0x14 },
@@ -1187,25 +1197,25 @@
{ 0x54010, 0x1f7f },
{ 0x54012, 0x110 },
{ 0x54019, 0x36e4 },
- { 0x5401a, 0x33 },
+ { 0x5401a, 0xf3 },
{ 0x5401b, 0x4866 },
{ 0x5401c, 0x4800 },
{ 0x5401e, 0x16 },
{ 0x5401f, 0x36e4 },
- { 0x54020, 0x33 },
+ { 0x54020, 0xf3 },
{ 0x54021, 0x4866 },
{ 0x54022, 0x4800 },
{ 0x54024, 0x16 },
{ 0x5402b, 0x1000 },
{ 0x5402c, 0x1 },
{ 0x54032, 0xe400 },
- { 0x54033, 0x3336 },
+ { 0x54033, 0xf336 },
{ 0x54034, 0x6600 },
{ 0x54035, 0x48 },
{ 0x54036, 0x48 },
{ 0x54037, 0x1600 },
{ 0x54038, 0xe400 },
- { 0x54039, 0x3336 },
+ { 0x54039, 0xf336 },
{ 0x5403a, 0x6600 },
{ 0x5403b, 0x48 },
{ 0x5403c, 0x48 },
@@ -1695,9 +1705,9 @@
{ 0x400d7, 0x20b },
{ 0x2003a, 0x2 },
{ 0x200be, 0x3 },
- { 0x2000b, 0x419 },
- { 0x2000c, 0xe9 },
- { 0x2000d, 0x91c },
+ { 0x2000b, 0x3f4 },
+ { 0x2000c, 0xe1 },
+ { 0x2000d, 0x8ca },
{ 0x2000e, 0x2c },
{ 0x12000b, 0x70 },
{ 0x12000c, 0x19 },
@@ -1800,8 +1810,8 @@
static struct dram_fsp_msg ddr_dram_fsp_msg[] = {
{
- /* P0 3733mts 1D */
- .drate = 3733,
+ /* P0 3600mts 1D */
+ .drate = 3600,
.fw_type = FW_1D_IMAGE,
.fsp_cfg = ddr_fsp0_cfg,
.fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_cfg),
@@ -1821,8 +1831,8 @@
.fsp_cfg_num = ARRAY_SIZE(ddr_fsp2_cfg),
},
{
- /* P0 3733mts 2D */
- .drate = 3733,
+ /* P0 3600mts 2D */
+ .drate = 3600,
.fw_type = FW_2D_IMAGE,
.fsp_cfg = ddr_fsp0_2d_cfg,
.fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_2d_cfg),
@@ -1841,5 +1851,19 @@
.ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr),
.ddrphy_pie = ddr_phy_pie,
.ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
- .fsp_table = { 3733, 400, 100, },
+ .fsp_table = { 3600, 400, 100, },
};
+
+#if IS_ENABLED(CONFIG_IMX8M_DRAM_INLINE_ECC)
+void dh_imx8mp_dhcom_dram_scrub_16g_x32(void)
+{
+ ddrc_inline_ecc_scrub(0x0,0x3ffffff);
+ ddrc_inline_ecc_scrub(0x4000000,0x7ffffff);
+ ddrc_inline_ecc_scrub(0x8000000,0xbffffff);
+ ddrc_inline_ecc_scrub(0xc000000,0xfffffff);
+ ddrc_inline_ecc_scrub(0x10000000,0x13ffffff);
+ ddrc_inline_ecc_scrub(0x14000000,0x17ffffff);
+ ddrc_inline_ecc_scrub(0x18000000,0x1bffffff);
+ ddrc_inline_ecc_scrub_end(0x0,0x1fffffff);
+}
+#endif
diff --git a/board/dhelectronics/dh_imx8mp/lpddr4_timing_4G_32.c b/board/dhelectronics/dh_imx8mp/lpddr4_timing_4G_32.c
index a4c1b12..41b078f 100644
--- a/board/dhelectronics/dh_imx8mp/lpddr4_timing_4G_32.c
+++ b/board/dhelectronics/dh_imx8mp/lpddr4_timing_4G_32.c
@@ -14,47 +14,66 @@
{ 0x3d400030, 0x1 },
{ 0x3d400000, 0xa3080020 },
{ 0x3d400020, 0x1323 },
- { 0x3d400024, 0x1c79100 },
- { 0x3d400064, 0x710106 },
+ { 0x3d400024, 0x1b77400 },
+ { 0x3d400064, 0x6d00fc },
+#if IS_ENABLED(CONFIG_IMX8M_DRAM_INLINE_ECC)
+ { 0x3d400070, 0x7027fd4 },
+#else
{ 0x3d400070, 0x7027f90 },
+#endif
{ 0x3d400074, 0x790 },
- { 0x3d4000d0, 0xc0030720 },
- { 0x3d4000d4, 0xb80000 },
+ { 0x3d4000d0, 0xc00306df },
+ { 0x3d4000d4, 0xb10000 },
{ 0x3d4000dc, 0xe40036 },
- { 0x3d4000e0, 0x330000 },
+ { 0x3d4000e0, 0xf30000 },
{ 0x3d4000e8, 0x660048 },
{ 0x3d4000ec, 0x160048 },
- { 0x3d400100, 0x1e262028 },
- { 0x3d400104, 0x7073b },
- { 0x3d40010c, 0xe0e000 },
- { 0x3d400110, 0x11040a11 },
+ { 0x3d400100, 0x1d241e26 },
+ { 0x3d400104, 0x70739 },
+ { 0x3d40010c, 0xd0d000 },
+ { 0x3d400110, 0x11040911 },
{ 0x3d400114, 0x2050e0e },
{ 0x3d400118, 0x1010008 },
- { 0x3d40011c, 0x501 },
+ { 0x3d40011c, 0x502 },
{ 0x3d400130, 0x20700 },
- { 0x3d400134, 0xe100002 },
- { 0x3d400138, 0x10d },
- { 0x3d400144, 0xbb005e },
- { 0x3d400180, 0x3a5001c },
- { 0x3d400184, 0x2f071e5 },
+ { 0x3d400134, 0xd100002 },
+ { 0x3d400138, 0x103 },
+ { 0x3d400144, 0xb4005a },
+ { 0x3d400180, 0x384001b },
+ { 0x3d400184, 0x2d06ddd },
{ 0x3d400188, 0x0 },
- { 0x3d400190, 0x49b820c },
+ { 0x3d400190, 0x49f820c },
{ 0x3d400194, 0x80303 },
- { 0x3d4001b4, 0x1b0c },
+ { 0x3d4001b4, 0x1f0c },
{ 0x3d4001a0, 0xe0400018 },
{ 0x3d4001a4, 0xdf00e4 },
{ 0x3d4001a8, 0x80000000 },
{ 0x3d4001b0, 0x11 },
- { 0x3d4001c0, 0x1 },
+ { 0x3d4001c0, 0x7 },
{ 0x3d4001c4, 0x1 },
- { 0x3d4000f4, 0xc99 },
- { 0x3d400108, 0x810191a },
+ { 0x3d4000f4, 0x799 },
+ { 0x3d400108, 0x8121b1a },
+#if IS_ENABLED(CONFIG_IMX8M_DRAM_INLINE_ECC)
+ { 0x3d400200, 0x14 },
+#else
{ 0x3d400200, 0x17 },
+#endif
+ { 0x3d400208, 0x0 },
+#if IS_ENABLED(CONFIG_IMX8M_DRAM_INLINE_ECC)
+ { 0x3d40020c, 0x14141400 },
+#else
{ 0x3d40020c, 0x0 },
+#endif
{ 0x3d400210, 0x1f1f },
+#if IS_ENABLED(CONFIG_IMX8M_DRAM_INLINE_ECC)
+ { 0x3d400204, 0x50505 },
+ { 0x3d400214, 0x4040404 },
+ { 0x3d400218, 0x4040404 },
+#else
{ 0x3d400204, 0x80808 },
{ 0x3d400214, 0x7070707 },
{ 0x3d400218, 0x7070707 },
+#endif
{ 0x3d40021c, 0xf0f },
{ 0x3d400250, 0x1705 },
{ 0x3d400254, 0x2c },
@@ -73,7 +92,7 @@
{ 0x3d402050, 0x20d000 },
{ 0x3d402064, 0xc001c },
{ 0x3d4020dc, 0x840000 },
- { 0x3d4020e0, 0x330000 },
+ { 0x3d4020e0, 0xf30000 },
{ 0x3d4020e8, 0x660048 },
{ 0x3d4020ec, 0x160048 },
{ 0x3d402100, 0xa040305 },
@@ -83,7 +102,7 @@
{ 0x3d402110, 0x2040202 },
{ 0x3d402114, 0x2030202 },
{ 0x3d402118, 0x1010004 },
- { 0x3d40211c, 0x301 },
+ { 0x3d40211c, 0x302 },
{ 0x3d402130, 0x20300 },
{ 0x3d402134, 0xa100002 },
{ 0x3d402138, 0x1d },
@@ -92,13 +111,13 @@
{ 0x3d402190, 0x3818200 },
{ 0x3d402194, 0x80303 },
{ 0x3d4021b4, 0x100 },
- { 0x3d4020f4, 0xc99 },
+ { 0x3d4020f4, 0x599 },
{ 0x3d403020, 0x1021 },
{ 0x3d403024, 0xc3500 },
{ 0x3d403050, 0x20d000 },
{ 0x3d403064, 0x30007 },
{ 0x3d4030dc, 0x840000 },
- { 0x3d4030e0, 0x330000 },
+ { 0x3d4030e0, 0xf30000 },
{ 0x3d4030e8, 0x660048 },
{ 0x3d4030ec, 0x160048 },
{ 0x3d403100, 0xa010102 },
@@ -108,7 +127,7 @@
{ 0x3d403110, 0x2040202 },
{ 0x3d403114, 0x2030202 },
{ 0x3d403118, 0x1010004 },
- { 0x3d40311c, 0x301 },
+ { 0x3d40311c, 0x302 },
{ 0x3d403130, 0x20300 },
{ 0x3d403134, 0xa100002 },
{ 0x3d403138, 0x8 },
@@ -117,7 +136,7 @@
{ 0x3d403190, 0x3818200 },
{ 0x3d403194, 0x80303 },
{ 0x3d4031b4, 0x100 },
- { 0x3d4030f4, 0xc99 },
+ { 0x3d4030f4, 0x599 },
{ 0x3d400028, 0x0 },
};
@@ -268,7 +287,7 @@
{ 0x20018, 0x3 },
{ 0x20075, 0x4 },
{ 0x20050, 0x0 },
- { 0x20008, 0x3a5 },
+ { 0x20008, 0x384 },
{ 0x120008, 0x64 },
{ 0x220008, 0x19 },
{ 0x20088, 0x9 },
@@ -314,19 +333,15 @@
{ 0x200f6, 0x0 },
{ 0x200f7, 0xf000 },
{ 0x20025, 0x0 },
- { 0x2002d, 0x0 },
- { 0x12002d, 0x0 },
- { 0x22002d, 0x0 },
+ { 0x2002d, 0x1 },
+ { 0x12002d, 0x1 },
+ { 0x22002d, 0x1 },
{ 0x2007d, 0x212 },
{ 0x12007d, 0x212 },
{ 0x22007d, 0x212 },
{ 0x2007c, 0x61 },
{ 0x12007c, 0x61 },
{ 0x22007c, 0x61 },
- { 0x1004a, 0x500 },
- { 0x1104a, 0x500 },
- { 0x1204a, 0x500 },
- { 0x1304a, 0x500 },
{ 0x2002c, 0x0 },
};
@@ -1056,7 +1071,7 @@
/* P0 message block paremeter for training firmware */
static struct dram_cfg_param ddr_fsp0_cfg[] = {
{ 0xd0000, 0x0 },
- { 0x54003, 0xe94 },
+ { 0x54003, 0xe10 },
{ 0x54004, 0x2 },
{ 0x54005, 0x2228 },
{ 0x54006, 0x14 },
@@ -1066,25 +1081,25 @@
{ 0x5400f, 0x100 },
{ 0x54012, 0x310 },
{ 0x54019, 0x36e4 },
- { 0x5401a, 0x33 },
+ { 0x5401a, 0xf3 },
{ 0x5401b, 0x4866 },
{ 0x5401c, 0x4800 },
{ 0x5401e, 0x16 },
{ 0x5401f, 0x36e4 },
- { 0x54020, 0x33 },
+ { 0x54020, 0xf3 },
{ 0x54021, 0x4866 },
{ 0x54022, 0x4800 },
{ 0x54024, 0x16 },
{ 0x5402b, 0x1000 },
{ 0x5402c, 0x3 },
{ 0x54032, 0xe400 },
- { 0x54033, 0x3336 },
+ { 0x54033, 0xf336 },
{ 0x54034, 0x6600 },
{ 0x54035, 0x48 },
{ 0x54036, 0x48 },
{ 0x54037, 0x1600 },
{ 0x54038, 0xe400 },
- { 0x54039, 0x3336 },
+ { 0x54039, 0xf336 },
{ 0x5403a, 0x6600 },
{ 0x5403b, 0x48 },
{ 0x5403c, 0x48 },
@@ -1106,25 +1121,25 @@
{ 0x5400f, 0x100 },
{ 0x54012, 0x310 },
{ 0x54019, 0x84 },
- { 0x5401a, 0x33 },
+ { 0x5401a, 0xf3 },
{ 0x5401b, 0x4866 },
{ 0x5401c, 0x4800 },
{ 0x5401e, 0x16 },
{ 0x5401f, 0x84 },
- { 0x54020, 0x33 },
+ { 0x54020, 0xf3 },
{ 0x54021, 0x4866 },
{ 0x54022, 0x4800 },
{ 0x54024, 0x16 },
{ 0x5402b, 0x1000 },
{ 0x5402c, 0x3 },
{ 0x54032, 0x8400 },
- { 0x54033, 0x3300 },
+ { 0x54033, 0xf300 },
{ 0x54034, 0x6600 },
{ 0x54035, 0x48 },
{ 0x54036, 0x48 },
{ 0x54037, 0x1600 },
{ 0x54038, 0x8400 },
- { 0x54039, 0x3300 },
+ { 0x54039, 0xf300 },
{ 0x5403a, 0x6600 },
{ 0x5403b, 0x48 },
{ 0x5403c, 0x48 },
@@ -1146,25 +1161,25 @@
{ 0x5400f, 0x100 },
{ 0x54012, 0x310 },
{ 0x54019, 0x84 },
- { 0x5401a, 0x33 },
+ { 0x5401a, 0xf3 },
{ 0x5401b, 0x4866 },
{ 0x5401c, 0x4800 },
{ 0x5401e, 0x16 },
{ 0x5401f, 0x84 },
- { 0x54020, 0x33 },
+ { 0x54020, 0xf3 },
{ 0x54021, 0x4866 },
{ 0x54022, 0x4800 },
{ 0x54024, 0x16 },
{ 0x5402b, 0x1000 },
{ 0x5402c, 0x3 },
{ 0x54032, 0x8400 },
- { 0x54033, 0x3300 },
+ { 0x54033, 0xf300 },
{ 0x54034, 0x6600 },
{ 0x54035, 0x48 },
{ 0x54036, 0x48 },
{ 0x54037, 0x1600 },
{ 0x54038, 0x8400 },
- { 0x54039, 0x3300 },
+ { 0x54039, 0xf300 },
{ 0x5403a, 0x6600 },
{ 0x5403b, 0x48 },
{ 0x5403c, 0x48 },
@@ -1175,7 +1190,7 @@
/* P0 2D message block paremeter for training firmware */
static struct dram_cfg_param ddr_fsp0_2d_cfg[] = {
{ 0xd0000, 0x0 },
- { 0x54003, 0xe94 },
+ { 0x54003, 0xe10 },
{ 0x54004, 0x2 },
{ 0x54005, 0x2228 },
{ 0x54006, 0x14 },
@@ -1186,25 +1201,25 @@
{ 0x54010, 0x1f7f },
{ 0x54012, 0x310 },
{ 0x54019, 0x36e4 },
- { 0x5401a, 0x33 },
+ { 0x5401a, 0xf3 },
{ 0x5401b, 0x4866 },
{ 0x5401c, 0x4800 },
{ 0x5401e, 0x16 },
{ 0x5401f, 0x36e4 },
- { 0x54020, 0x33 },
+ { 0x54020, 0xf3 },
{ 0x54021, 0x4866 },
{ 0x54022, 0x4800 },
{ 0x54024, 0x16 },
{ 0x5402b, 0x1000 },
{ 0x5402c, 0x3 },
{ 0x54032, 0xe400 },
- { 0x54033, 0x3336 },
+ { 0x54033, 0xf336 },
{ 0x54034, 0x6600 },
{ 0x54035, 0x48 },
{ 0x54036, 0x48 },
{ 0x54037, 0x1600 },
{ 0x54038, 0xe400 },
- { 0x54039, 0x3336 },
+ { 0x54039, 0xf336 },
{ 0x5403a, 0x6600 },
{ 0x5403b, 0x48 },
{ 0x5403c, 0x48 },
@@ -1694,9 +1709,9 @@
{ 0x400d7, 0x20b },
{ 0x2003a, 0x2 },
{ 0x200be, 0x3 },
- { 0x2000b, 0x419 },
- { 0x2000c, 0xe9 },
- { 0x2000d, 0x91c },
+ { 0x2000b, 0x3f4 },
+ { 0x2000c, 0xe1 },
+ { 0x2000d, 0x8ca },
{ 0x2000e, 0x2c },
{ 0x12000b, 0x70 },
{ 0x12000c, 0x19 },
@@ -1799,8 +1814,8 @@
static struct dram_fsp_msg ddr_dram_fsp_msg[] = {
{
- /* P0 3733mts 1D */
- .drate = 3733,
+ /* P0 3600mts 1D */
+ .drate = 3600,
.fw_type = FW_1D_IMAGE,
.fsp_cfg = ddr_fsp0_cfg,
.fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_cfg),
@@ -1820,8 +1835,8 @@
.fsp_cfg_num = ARRAY_SIZE(ddr_fsp2_cfg),
},
{
- /* P0 3733mts 2D */
- .drate = 3733,
+ /* P0 3600mts 2D */
+ .drate = 3600,
.fw_type = FW_2D_IMAGE,
.fsp_cfg = ddr_fsp0_2d_cfg,
.fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_2d_cfg),
@@ -1840,5 +1855,19 @@
.ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr),
.ddrphy_pie = ddr_phy_pie,
.ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
- .fsp_table = { 3733, 400, 100, },
+ .fsp_table = { 3600, 400, 100, },
};
+
+#if IS_ENABLED(CONFIG_IMX8M_DRAM_INLINE_ECC)
+void dh_imx8mp_dhcom_dram_scrub_32g_x32(void)
+{
+ ddrc_inline_ecc_scrub(0x0,0x7ffffff);
+ ddrc_inline_ecc_scrub(0x8000000,0xfffffff);
+ ddrc_inline_ecc_scrub(0x10000000,0x17ffffff);
+ ddrc_inline_ecc_scrub(0x18000000,0x1fffffff);
+ ddrc_inline_ecc_scrub(0x20000000,0x27ffffff);
+ ddrc_inline_ecc_scrub(0x28000000,0x2fffffff);
+ ddrc_inline_ecc_scrub(0x30000000,0x37ffffff);
+ ddrc_inline_ecc_scrub_end(0x0,0x3fffffff);
+}
+#endif
diff --git a/board/dhelectronics/dh_imx8mp/spl.c b/board/dhelectronics/dh_imx8mp/spl.c
index 1b05da5..7d228da 100644
--- a/board/dhelectronics/dh_imx8mp/spl.c
+++ b/board/dhelectronics/dh_imx8mp/spl.c
@@ -11,6 +11,7 @@
#include <asm/io.h>
#include <asm-generic/gpio.h>
#include <asm/arch/clock.h>
+#include <asm/arch/ddr.h>
#include <asm/arch/imx8mp_pins.h>
#include <asm/arch/sys_proto.h>
#include <asm/mach-imx/boot_mode.h>
@@ -94,6 +95,11 @@
/* To avoid timing risk from SoC to ARM, increase VDD_ARM to OD voltage 0.95V */
pmic_reg_write(dev, PCA9450_BUCK2OUT_DVS0, 0x1c);
+ /* DRAM Vdd1 always FPWM */
+ pmic_reg_write(dev, PCA9450_BUCK5CTRL, 0x0d);
+ /* DRAM Vdd2/Vddq always FPWM */
+ pmic_reg_write(dev, PCA9450_BUCK6CTRL, 0x0d);
+
/* Set LDO4 and CONFIG2 to enable the I2C level translator. */
pmic_reg_write(dev, PCA9450_LDO4CTRL, 0x59);
pmic_reg_write(dev, PCA9450_CONFIG2, 0x1);
@@ -129,8 +135,35 @@
}
ddr_init(dram_timing_info[memcfg]);
+
+ printf("DDR: Inline ECC %sabled\n",
+ (readl(DDRC_ECCCFG0(0)) & DDRC_ECCCFG0_ECC_MODE_MASK) ?
+ "en" : "dis");
}
+#if IS_ENABLED(CONFIG_IMX8M_DRAM_INLINE_ECC)
+static const scrub_func_t dram_scrub_fn[8] = {
+ NULL, /* 512 MiB */
+ NULL, /* 1024 MiB */
+ NULL, /* 1536 MiB */
+ dh_imx8mp_dhcom_dram_scrub_16g_x32, /* 2048 MiB */
+ NULL, /* 3072 MiB */
+ dh_imx8mp_dhcom_dram_scrub_32g_x32, /* 4096 MiB */
+ NULL, /* 6144 MiB */
+ NULL, /* 8192 MiB */
+};
+
+void board_dram_ecc_scrub(void)
+{
+ u8 memcfg = dh_get_memcfg();
+
+ if (!dram_scrub_fn[memcfg])
+ return;
+
+ dram_scrub_fn[memcfg]();
+}
+#endif
+
void spl_board_init(void)
{
/*
diff --git a/board/emulation/configs/acpi.config b/board/emulation/configs/acpi.config
new file mode 100644
index 0000000..b7ed811
--- /dev/null
+++ b/board/emulation/configs/acpi.config
@@ -0,0 +1,3 @@
+CONFIG_CMD_QFW=y
+CONFIG_ACPI=y
+CONFIG_GENERATE_ACPI_TABLE=y
diff --git a/board/emulation/qemu-arm/Kconfig b/board/emulation/qemu-arm/Kconfig
index ac2d078..e21c135 100644
--- a/board/emulation/qemu-arm/Kconfig
+++ b/board/emulation/qemu-arm/Kconfig
@@ -5,6 +5,7 @@
config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
+ select QFW if ACPI
select QFW_MMIO if CMD_QFW
imply VIRTIO_MMIO
imply VIRTIO_PCI
diff --git a/board/emulation/qemu-riscv/Kconfig b/board/emulation/qemu-riscv/Kconfig
index 108e9fd..9538c66 100644
--- a/board/emulation/qemu-riscv/Kconfig
+++ b/board/emulation/qemu-riscv/Kconfig
@@ -33,6 +33,8 @@
def_bool y
select GENERIC_RISCV
select SUPPORT_SPL
+ select QFW if ACPI
+ select QFW_MMIO if QFW
imply AHCI
imply SMP
imply BOARD_LATE_INIT
@@ -54,10 +56,12 @@
imply SCSI_AHCI
imply AHCI_PCI
imply E1000
- imply NVME
imply PCI
+ imply NVME_PCI
imply PCIE_ECAM_GENERIC
imply DM_RNG
+ imply DM_RTC
+ imply RTC_GOLDFISH
imply SCSI
imply SYS_NS16550
imply SIFIVE_SERIAL
@@ -81,5 +85,7 @@
imply USB_XHCI_PCI
imply USB_KEYBOARD
imply CMD_USB
+ imply UFS
+ imply UFS_PCI
endif
diff --git a/board/freescale/common/vid.c b/board/freescale/common/vid.c
index 5ec3f2a..fc5d400 100644
--- a/board/freescale/common/vid.c
+++ b/board/freescale/common/vid.c
@@ -793,4 +793,4 @@
vdd_read, 1, 0, do_vdd_read,
"read VDD",
" - Read the voltage specified in mV"
-)
+);
diff --git a/board/freescale/common/vsc3316_3308.h b/board/freescale/common/vsc3316_3308.h
index 8d343ba..9725d6d 100644
--- a/board/freescale/common/vsc3316_3308.h
+++ b/board/freescale/common/vsc3316_3308.h
@@ -6,7 +6,6 @@
#ifndef __VSC_CROSSBAR_H_
#define __VSC_CROSSBAR_H_
-#include <common.h>
#include <i2c.h>
#include <errno.h>
diff --git a/board/freescale/imx8mp_evk/MAINTAINERS b/board/freescale/imx8mp_evk/MAINTAINERS
index 2759652..c2c7c83 100644
--- a/board/freescale/imx8mp_evk/MAINTAINERS
+++ b/board/freescale/imx8mp_evk/MAINTAINERS
@@ -1,4 +1,5 @@
i.MX8MP EVK BOARD
+M: Fabio Estevm <festevam@gmail.com>
M: Peng Fan <peng.fan@nxp.com>
S: Maintained
F: board/freescale/imx8mp_evk/
diff --git a/board/freescale/imx8mp_evk/imx8mp_evk.c b/board/freescale/imx8mp_evk/imx8mp_evk.c
index a24b8c1..024b46e 100644
--- a/board/freescale/imx8mp_evk/imx8mp_evk.c
+++ b/board/freescale/imx8mp_evk/imx8mp_evk.c
@@ -3,50 +3,11 @@
* Copyright 2019 NXP
*/
-#include <common.h>
#include <env.h>
-#include <errno.h>
-#include <init.h>
-#include <miiphy.h>
-#include <netdev.h>
-#include <linux/delay.h>
-#include <asm/global_data.h>
-#include <asm/mach-imx/iomux-v3.h>
-#include <asm-generic/gpio.h>
-#include <asm/arch/imx8mp_pins.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/sys_proto.h>
-#include <asm/mach-imx/gpio.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-static void setup_fec(void)
-{
- struct iomuxc_gpr_base_regs *gpr =
- (struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR;
-
- /* Enable RGMII TX clk output */
- setbits_le32(&gpr->gpr[1], BIT(22));
-}
-
-#if CONFIG_IS_ENABLED(NET)
-int board_phy_config(struct phy_device *phydev)
-{
- if (phydev->drv->config)
- phydev->drv->config(phydev);
- return 0;
-}
-#endif
int board_init(void)
{
- int ret = 0;
-
- if (IS_ENABLED(CONFIG_FEC_MXC)) {
- setup_fec();
- }
-
- return ret;
+ return 0;
}
int board_late_init(void)
diff --git a/board/freescale/imx8mp_evk/spl.c b/board/freescale/imx8mp_evk/spl.c
index 246826a..9dd2cbc 100644
--- a/board/freescale/imx8mp_evk/spl.c
+++ b/board/freescale/imx8mp_evk/spl.c
@@ -67,40 +67,44 @@
},
};
-#if CONFIG_IS_ENABLED(POWER_LEGACY)
-#define I2C_PMIC 0
+#if CONFIG_IS_ENABLED(DM_PMIC_PCA9450)
int power_init_board(void)
{
- struct pmic *p;
+ struct udevice *dev;
int ret;
- ret = power_pca9450_init(I2C_PMIC, 0x25);
- if (ret)
- printf("power init failed");
- p = pmic_get("PCA9450");
- pmic_probe(p);
+ ret = pmic_get("pmic@25", &dev);
+ if (ret == -ENODEV) {
+ puts("No pmic@25\n");
+ return 0;
+ }
+ if (ret < 0)
+ return ret;
/* BUCKxOUT_DVS0/1 control BUCK123 output */
- pmic_reg_write(p, PCA9450_BUCK123_DVS, 0x29);
+ pmic_reg_write(dev, PCA9450_BUCK123_DVS, 0x29);
/*
- * increase VDD_SOC to typical value 0.95V before first
- * DRAM access, set DVS1 to 0.85v for suspend.
+ * Increase VDD_SOC to typical value 0.95V before first
+ * DRAM access, set DVS1 to 0.85V for suspend.
* Enable DVS control through PMIC_STBY_REQ and
* set B1_ENMODE=1 (ON by PMIC_ON_REQ=H)
*/
-#ifdef CONFIG_IMX8M_VDD_SOC_850MV
- /* set DVS0 to 0.85v for special case*/
- pmic_reg_write(p, PCA9450_BUCK1OUT_DVS0, 0x14);
-#else
- pmic_reg_write(p, PCA9450_BUCK1OUT_DVS0, 0x1C);
-#endif
- pmic_reg_write(p, PCA9450_BUCK1OUT_DVS1, 0x14);
- pmic_reg_write(p, PCA9450_BUCK1CTRL, 0x59);
+ if (CONFIG_IS_ENABLED(IMX8M_VDD_SOC_850MV))
+ pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, 0x14);
+ else
+ pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, 0x1C);
- /* Kernel uses OD/OD freq for SOC */
- /* To avoid timing risk from SOC to ARM,increase VDD_ARM to OD voltage 0.95v */
- pmic_reg_write(p, PCA9450_BUCK2OUT_DVS0, 0x1C);
+ pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS1, 0x14);
+ pmic_reg_write(dev, PCA9450_BUCK1CTRL, 0x59);
+
+ /*
+ * Kernel uses OD/OD freq for SOC.
+ * To avoid timing risk from SOC to ARM,increase VDD_ARM to OD
+ * voltage 0.95V.
+ */
+
+ pmic_reg_write(dev, PCA9450_BUCK2OUT_DVS0, 0x1C);
return 0;
}
@@ -135,8 +139,6 @@
enable_tzc380();
- setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
-
power_init_board();
/* DDR initialization */
diff --git a/board/freescale/imx93_evk/imx93_evk.c b/board/freescale/imx93_evk/imx93_evk.c
index f4297f8..c54dc9d 100644
--- a/board/freescale/imx93_evk/imx93_evk.c
+++ b/board/freescale/imx93_evk/imx93_evk.c
@@ -49,27 +49,11 @@
return 0;
}
-static int setup_eqos(void)
-{
- struct blk_ctrl_wakeupmix_regs *bctrl =
- (struct blk_ctrl_wakeupmix_regs *)BLK_CTRL_WAKEUPMIX_BASE_ADDR;
-
- /* set INTF as RGMII, enable RGMII TXC clock */
- clrsetbits_le32(&bctrl->eqos_gpr,
- BCTRL_GPR_ENET_QOS_INTF_MODE_MASK,
- BCTRL_GPR_ENET_QOS_INTF_SEL_RGMII | BCTRL_GPR_ENET_QOS_CLK_GEN_EN);
-
- return set_clk_eqos(ENET_125MHZ);
-}
-
int board_init(void)
{
if (IS_ENABLED(CONFIG_FEC_MXC))
setup_fec();
- if (IS_ENABLED(CONFIG_DWC_ETH_QOS))
- setup_eqos();
-
return 0;
}
diff --git a/board/freescale/ls1088a/eth_ls1088aqds.c b/board/freescale/ls1088a/eth_ls1088aqds.c
index 2fece3a..e6033d2 100644
--- a/board/freescale/ls1088a/eth_ls1088aqds.c
+++ b/board/freescale/ls1088a/eth_ls1088aqds.c
@@ -3,6 +3,7 @@
* Copyright 2017 NXP
*/
+#include <config.h>
#include <vsprintf.h>
#include <linux/string.h>
#include <asm/io.h>
diff --git a/board/freescale/ls2080aqds/eth.c b/board/freescale/ls2080aqds/eth.c
index 048ab44..b47e2ec 100644
--- a/board/freescale/ls2080aqds/eth.c
+++ b/board/freescale/ls2080aqds/eth.c
@@ -3,6 +3,7 @@
* Copyright 2015 Freescale Semiconductor, Inc.
*/
+#include <config.h>
#include <vsprintf.h>
#include <linux/string.h>
#include <asm/io.h>
diff --git a/board/freescale/mx7dsabresd/mx7dsabresd.c b/board/freescale/mx7dsabresd/mx7dsabresd.c
index cff2e6a..4fe23b5 100644
--- a/board/freescale/mx7dsabresd/mx7dsabresd.c
+++ b/board/freescale/mx7dsabresd/mx7dsabresd.c
@@ -267,7 +267,7 @@
struct udevice *dev;
int ret, dev_id, rev_id;
- ret = pmic_get("pfuze3000@8", &dev);
+ ret = pmic_get("pmic@8", &dev);
if (ret == -ENODEV)
return 0;
if (ret != 0)
diff --git a/board/gateworks/venice/lpddr4_timing_imx8mp.c b/board/gateworks/venice/lpddr4_timing_imx8mp.c
index 7bfd1b5..56c6e2b 100644
--- a/board/gateworks/venice/lpddr4_timing_imx8mp.c
+++ b/board/gateworks/venice/lpddr4_timing_imx8mp.c
@@ -1211,9 +1211,9 @@
{ 0x400d7, 0x20b },
{ 0x2003a, 0x2 },
{ 0x200be, 0x3 },
- { 0x2000b, 0x34b },
- { 0x2000c, 0xbb },
- { 0x2000d, 0x753 },
+ { 0x2000b, 0x465 },
+ { 0x2000c, 0xfa },
+ { 0x2000d, 0x9c4 },
{ 0x2000e, 0x2c },
{ 0x12000b, 0x70 },
{ 0x12000c, 0x19 },
@@ -1323,42 +1323,42 @@
{ 0x3d400304, 0x1 },
{ 0x3d400030, 0x1 },
{ 0x3d400000, 0xa1080020 },
- { 0x3d400020, 0x1203 },
- { 0x3d400024, 0x16e3600 },
- { 0x3d400064, 0x5b0087 },
+ { 0x3d400020, 0x1323 },
+ { 0x3d400024, 0x1e84800 },
+ { 0x3d400064, 0x7a00b4 },
{ 0x3d400070, 0x7027f90 },
{ 0x3d400074, 0x790 },
- { 0x3d4000d0, 0xc00305ba },
- { 0x3d4000d4, 0x940000 },
- { 0x3d4000dc, 0xd4002d },
- { 0x3d4000e0, 0x310000 },
+ { 0x3d4000d0, 0xc00307a3 },
+ { 0x3d4000d4, 0xc50000 },
+ { 0x3d4000dc, 0xf4003f },
+ { 0x3d4000e0, 0x330000 },
{ 0x3d4000e8, 0x660048 },
{ 0x3d4000ec, 0x160048 },
- { 0x3d400100, 0x191e1920 },
- { 0x3d400104, 0x60630 },
- { 0x3d40010c, 0xb0b000 },
- { 0x3d400110, 0xe04080e },
- { 0x3d400114, 0x2040c0c },
- { 0x3d400118, 0x1010007 },
- { 0x3d40011c, 0x402 },
- { 0x3d400130, 0x20600 },
- { 0x3d400134, 0xc100002 },
- { 0x3d400138, 0x8d },
- { 0x3d400144, 0x96004b },
- { 0x3d400180, 0x2ee0017 },
- { 0x3d400184, 0x2605b8e },
+ { 0x3d400100, 0x2028222a },
+ { 0x3d400104, 0x8083f },
+ { 0x3d40010c, 0xe0e000 },
+ { 0x3d400110, 0x12040a12 },
+ { 0x3d400114, 0x2050f0f },
+ { 0x3d400118, 0x1010009 },
+ { 0x3d40011c, 0x502 },
+ { 0x3d400130, 0x20800 },
+ { 0x3d400134, 0xe100002 },
+ { 0x3d400138, 0xbc },
+ { 0x3d400144, 0xc80064 },
+ { 0x3d400180, 0x3e8001e },
+ { 0x3d400184, 0x3207a12 },
{ 0x3d400188, 0x0 },
- { 0x3d400190, 0x497820a },
+ { 0x3d400190, 0x49f820e },
{ 0x3d400194, 0x80303 },
- { 0x3d4001b4, 0x170a },
+ { 0x3d4001b4, 0x1f0e },
{ 0x3d4001a0, 0xe0400018 },
{ 0x3d4001a4, 0xdf00e4 },
{ 0x3d4001a8, 0x80000000 },
{ 0x3d4001b0, 0x11 },
{ 0x3d4001c0, 0x1 },
{ 0x3d4001c4, 0x1 },
- { 0x3d4000f4, 0x699 },
- { 0x3d400108, 0x70e1617 },
+ { 0x3d4000f4, 0x799 },
+ { 0x3d400108, 0x9121b1c },
{ 0x3d400200, 0x1f },
{ 0x3d400208, 0x0 },
{ 0x3d40020c, 0x0 },
@@ -1379,7 +1379,7 @@
{ 0x3d400498, 0x620096 },
{ 0x3d40049c, 0x1100e07 },
{ 0x3d4004a0, 0xc8012c },
- { 0x3d402020, 0x1001 },
+ { 0x3d402020, 0x1021 },
{ 0x3d402024, 0x30d400 },
{ 0x3d402050, 0x20d000 },
{ 0x3d402064, 0xc0012 },
@@ -1404,7 +1404,7 @@
{ 0x3d402194, 0x80303 },
{ 0x3d4021b4, 0x100 },
{ 0x3d4020f4, 0x599 },
- { 0x3d403020, 0x1001 },
+ { 0x3d403020, 0x1021 },
{ 0x3d403024, 0xc3500 },
{ 0x3d403050, 0x20d000 },
{ 0x3d403064, 0x30005 },
@@ -1436,36 +1436,36 @@
struct dram_cfg_param ddr_ddrphy_cfg_1gb_single_die[] = {
{ 0x100a0, 0x0 },
{ 0x100a1, 0x1 },
- { 0x100a2, 0x3 },
- { 0x100a3, 0x2 },
- { 0x100a4, 0x5 },
- { 0x100a5, 0x4 },
- { 0x100a6, 0x7 },
- { 0x100a7, 0x6 },
+ { 0x100a2, 0x2 },
+ { 0x100a3, 0x3 },
+ { 0x100a4, 0x4 },
+ { 0x100a5, 0x5 },
+ { 0x100a6, 0x6 },
+ { 0x100a7, 0x7 },
{ 0x110a0, 0x0 },
{ 0x110a1, 0x1 },
- { 0x110a2, 0x2 },
- { 0x110a3, 0x3 },
- { 0x110a4, 0x4 },
- { 0x110a5, 0x5 },
- { 0x110a6, 0x6 },
- { 0x110a7, 0x7 },
+ { 0x110a2, 0x3 },
+ { 0x110a3, 0x4 },
+ { 0x110a4, 0x5 },
+ { 0x110a5, 0x2 },
+ { 0x110a6, 0x7 },
+ { 0x110a7, 0x6 },
{ 0x120a0, 0x0 },
{ 0x120a1, 0x1 },
- { 0x120a2, 0x2 },
- { 0x120a3, 0x3 },
- { 0x120a4, 0x4 },
- { 0x120a5, 0x5 },
- { 0x120a6, 0x6 },
- { 0x120a7, 0x7 },
+ { 0x120a2, 0x3 },
+ { 0x120a3, 0x2 },
+ { 0x120a4, 0x5 },
+ { 0x120a5, 0x4 },
+ { 0x120a6, 0x7 },
+ { 0x120a7, 0x6 },
{ 0x130a0, 0x0 },
{ 0x130a1, 0x1 },
- { 0x130a2, 0x3 },
- { 0x130a3, 0x4 },
- { 0x130a4, 0x5 },
- { 0x130a5, 0x2 },
- { 0x130a6, 0x7 },
- { 0x130a7, 0x6 },
+ { 0x130a2, 0x2 },
+ { 0x130a3, 0x3 },
+ { 0x130a4, 0x4 },
+ { 0x130a5, 0x5 },
+ { 0x130a6, 0x6 },
+ { 0x130a7, 0x7 },
{ 0x1005f, 0x1ff },
{ 0x1015f, 0x1ff },
{ 0x1105f, 0x1ff },
@@ -1500,7 +1500,7 @@
{ 0x7055, 0x1ff },
{ 0x8055, 0x1ff },
{ 0x9055, 0x1ff },
- { 0x200c5, 0x19 },
+ { 0x200c5, 0x18 },
{ 0x1200c5, 0x7 },
{ 0x2200c5, 0x7 },
{ 0x2002e, 0x2 },
@@ -1509,11 +1509,11 @@
{ 0x90204, 0x0 },
{ 0x190204, 0x0 },
{ 0x290204, 0x0 },
- { 0x20024, 0x1a3 },
+ { 0x20024, 0x1e3 },
{ 0x2003a, 0x2 },
- { 0x120024, 0x1a3 },
+ { 0x120024, 0x1e3 },
{ 0x2003a, 0x2 },
- { 0x220024, 0x1a3 },
+ { 0x220024, 0x1e3 },
{ 0x2003a, 0x2 },
{ 0x20056, 0x3 },
{ 0x120056, 0x3 },
@@ -1579,7 +1579,7 @@
{ 0x20018, 0x3 },
{ 0x20075, 0x4 },
{ 0x20050, 0x0 },
- { 0x20008, 0x2ee },
+ { 0x20008, 0x3e8 },
{ 0x120008, 0x64 },
{ 0x220008, 0x19 },
{ 0x20088, 0x9 },
@@ -1644,7 +1644,7 @@
/* P0 message block paremeter for training firmware */
struct dram_cfg_param ddr_fsp0_cfg_1gb_single_die[] = {
{ 0xd0000, 0x0 },
- { 0x54003, 0xbb8 },
+ { 0x54003, 0xfa0 },
{ 0x54004, 0x2 },
{ 0x54005, 0x2228 },
{ 0x54006, 0x14 },
@@ -1653,26 +1653,26 @@
{ 0x5400b, 0x2 },
{ 0x5400f, 0x100 },
{ 0x54012, 0x110 },
- { 0x54019, 0x2dd4 },
- { 0x5401a, 0x31 },
+ { 0x54019, 0x3ff4 },
+ { 0x5401a, 0x33 },
{ 0x5401b, 0x4866 },
{ 0x5401c, 0x4800 },
{ 0x5401e, 0x16 },
- { 0x5401f, 0x2dd4 },
- { 0x54020, 0x31 },
+ { 0x5401f, 0x3ff4 },
+ { 0x54020, 0x33 },
{ 0x54021, 0x4866 },
{ 0x54022, 0x4800 },
{ 0x54024, 0x16 },
{ 0x5402b, 0x1000 },
{ 0x5402c, 0x1 },
- { 0x54032, 0xd400 },
- { 0x54033, 0x312d },
+ { 0x54032, 0xf400 },
+ { 0x54033, 0x333f },
{ 0x54034, 0x6600 },
{ 0x54035, 0x48 },
{ 0x54036, 0x48 },
{ 0x54037, 0x1600 },
- { 0x54038, 0xd400 },
- { 0x54039, 0x312d },
+ { 0x54038, 0xf400 },
+ { 0x54039, 0x333f },
{ 0x5403a, 0x6600 },
{ 0x5403b, 0x48 },
{ 0x5403c, 0x48 },
@@ -1763,7 +1763,7 @@
/* P0 2D message block paremeter for training firmware */
struct dram_cfg_param ddr_fsp0_2d_cfg_1gb_single_die[] = {
{ 0xd0000, 0x0 },
- { 0x54003, 0xbb8 },
+ { 0x54003, 0xfa0 },
{ 0x54004, 0x2 },
{ 0x54005, 0x2228 },
{ 0x54006, 0x14 },
@@ -1773,26 +1773,26 @@
{ 0x5400f, 0x100 },
{ 0x54010, 0x1f7f },
{ 0x54012, 0x110 },
- { 0x54019, 0x2dd4 },
- { 0x5401a, 0x31 },
+ { 0x54019, 0x3ff4 },
+ { 0x5401a, 0x33 },
{ 0x5401b, 0x4866 },
{ 0x5401c, 0x4800 },
{ 0x5401e, 0x16 },
- { 0x5401f, 0x2dd4 },
- { 0x54020, 0x31 },
+ { 0x5401f, 0x3ff4 },
+ { 0x54020, 0x33 },
{ 0x54021, 0x4866 },
{ 0x54022, 0x4800 },
{ 0x54024, 0x16 },
{ 0x5402b, 0x1000 },
{ 0x5402c, 0x1 },
- { 0x54032, 0xd400 },
- { 0x54033, 0x312d },
+ { 0x54032, 0xf400 },
+ { 0x54033, 0x333f },
{ 0x54034, 0x6600 },
{ 0x54035, 0x48 },
{ 0x54036, 0x48 },
{ 0x54037, 0x1600 },
- { 0x54038, 0xd400 },
- { 0x54039, 0x312d },
+ { 0x54038, 0xf400 },
+ { 0x54039, 0x333f },
{ 0x5403a, 0x6600 },
{ 0x5403b, 0x48 },
{ 0x5403c, 0x48 },
@@ -1802,8 +1802,8 @@
struct dram_fsp_msg ddr_dram_fsp_msg_1gb_single_die[] = {
{
- /* P0 3000mts 1D */
- .drate = 3000,
+ /* P0 4000mts 1D */
+ .drate = 4000,
.fw_type = FW_1D_IMAGE,
.fsp_cfg = ddr_fsp0_cfg_1gb_single_die,
.fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_cfg_1gb_single_die),
@@ -1823,8 +1823,8 @@
.fsp_cfg_num = ARRAY_SIZE(ddr_fsp2_cfg_1gb_single_die),
},
{
- /* P0 3000mts 2D */
- .drate = 3000,
+ /* P0 4000mts 2D */
+ .drate = 4000,
.fw_type = FW_2D_IMAGE,
.fsp_cfg = ddr_fsp0_2d_cfg_1gb_single_die,
.fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_2d_cfg_1gb_single_die),
@@ -1843,7 +1843,7 @@
.ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr),
.ddrphy_pie = ddr_phy_pie,
.ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
- .fsp_table = { 3000, 400, 100, },
+ .fsp_table = { 4000, 400, 100, },
};
/*
@@ -1856,43 +1856,44 @@
{ 0x3d400304, 0x1 },
{ 0x3d400030, 0x1 },
{ 0x3d400000, 0xa3080020 },
- { 0x3d400020, 0x1203 },
- { 0x3d400024, 0x16e3600 },
- { 0x3d400064, 0x5b00d2 },
+ { 0x3d400020, 0x1323 },
+ { 0x3d400024, 0x1e84800 },
+ { 0x3d400064, 0x7a0118 },
{ 0x3d400070, 0x7027f90 },
{ 0x3d400074, 0x790 },
- { 0x3d4000d0, 0xc00305ba },
- { 0x3d4000d4, 0x940000 },
- { 0x3d4000dc, 0xd4002d },
- { 0x3d4000e0, 0x310000 },
+ { 0x3d4000d0, 0xc00307a3 },
+ { 0x3d4000d4, 0xc50000 },
+ { 0x3d4000dc, 0xf4003f },
+ { 0x3d4000e0, 0x330000 },
{ 0x3d4000e8, 0x660048 },
{ 0x3d4000ec, 0x160048 },
- { 0x3d400100, 0x191e1920 },
- { 0x3d400104, 0x60630 },
- { 0x3d40010c, 0xb0b000 },
- { 0x3d400110, 0xe04080e },
- { 0x3d400114, 0x2040c0c },
- { 0x3d400118, 0x1010007 },
- { 0x3d40011c, 0x401 },
- { 0x3d400130, 0x20600 },
- { 0x3d400134, 0xc100002 },
- { 0x3d400138, 0xd8 },
- { 0x3d400144, 0x96004b },
- { 0x3d400180, 0x2ee0017 },
- { 0x3d400184, 0x2605b8e },
+ { 0x3d400100, 0x2028222a },
+ { 0x3d400104, 0x8083f },
+ { 0x3d40010c, 0xe0e000 },
+ { 0x3d400110, 0x12040a12 },
+ { 0x3d400114, 0x2050f0f },
+ { 0x3d400118, 0x1010009 },
+ { 0x3d40011c, 0x502 },
+ { 0x3d400130, 0x20800 },
+ { 0x3d400134, 0xe100002 },
+ { 0x3d400138, 0x120 },
+ { 0x3d400144, 0xc80064 },
+ { 0x3d400180, 0x3e8001e },
+ { 0x3d400184, 0x3207a12 },
{ 0x3d400188, 0x0 },
- { 0x3d400190, 0x497820a },
+ { 0x3d400190, 0x49f820e},
{ 0x3d400194, 0x80303 },
- { 0x3d4001b4, 0x170a },
+ { 0x3d4001b4, 0x1f0e },
{ 0x3d4001a0, 0xe0400018 },
{ 0x3d4001a4, 0xdf00e4 },
{ 0x3d4001a8, 0x80000000 },
{ 0x3d4001b0, 0x11 },
{ 0x3d4001c0, 0x1 },
{ 0x3d4001c4, 0x1 },
- { 0x3d4000f4, 0xc99 },
- { 0x3d400108, 0x70e1617 },
+ { 0x3d4000f4, 0x799 },
+ { 0x3d400108, 0x9121b1c },
{ 0x3d400200, 0x17 },
+ { 0x3d400208, 0x0 },
{ 0x3d40020c, 0x0 },
{ 0x3d400210, 0x1f1f },
{ 0x3d400204, 0x80808 },
@@ -1911,7 +1912,7 @@
{ 0x3d400498, 0x620096 },
{ 0x3d40049c, 0x1100e07 },
{ 0x3d4004a0, 0xc8012c },
- { 0x3d402020, 0x1001 },
+ { 0x3d402020, 0x1021 },
{ 0x3d402024, 0x30d400 },
{ 0x3d402050, 0x20d000 },
{ 0x3d402064, 0xc001c },
@@ -1926,7 +1927,7 @@
{ 0x3d402110, 0x2040202 },
{ 0x3d402114, 0x2030202 },
{ 0x3d402118, 0x1010004 },
- { 0x3d40211c, 0x301 },
+ { 0x3d40211c, 0x302 },
{ 0x3d402130, 0x20300 },
{ 0x3d402134, 0xa100002 },
{ 0x3d402138, 0x1d },
@@ -1935,8 +1936,8 @@
{ 0x3d402190, 0x3818200 },
{ 0x3d402194, 0x80303 },
{ 0x3d4021b4, 0x100 },
- { 0x3d4020f4, 0xc99 },
- { 0x3d403020, 0x1001 },
+ { 0x3d4020f4, 0x599 },
+ { 0x3d403020, 0x1021 },
{ 0x3d403024, 0xc3500 },
{ 0x3d403050, 0x20d000 },
{ 0x3d403064, 0x30007 },
@@ -1951,7 +1952,7 @@
{ 0x3d403110, 0x2040202 },
{ 0x3d403114, 0x2030202 },
{ 0x3d403118, 0x1010004 },
- { 0x3d40311c, 0x301 },
+ { 0x3d40311c, 0x302 },
{ 0x3d403130, 0x20300 },
{ 0x3d403134, 0xa100002 },
{ 0x3d403138, 0x8 },
@@ -1960,7 +1961,7 @@
{ 0x3d403190, 0x3818200 },
{ 0x3d403194, 0x80303 },
{ 0x3d4031b4, 0x100 },
- { 0x3d4030f4, 0xc99 },
+ { 0x3d4030f4, 0x599 },
{ 0x3d400028, 0x0 },
};
@@ -1968,36 +1969,36 @@
static struct dram_cfg_param ddr_ddrphy_cfg_4gb_dual_die[] = {
{ 0x100a0, 0x0 },
{ 0x100a1, 0x1 },
- { 0x100a2, 0x3 },
- { 0x100a3, 0x2 },
- { 0x100a4, 0x5 },
- { 0x100a5, 0x4 },
- { 0x100a6, 0x7 },
- { 0x100a7, 0x6 },
+ { 0x100a2, 0x2 },
+ { 0x100a3, 0x3 },
+ { 0x100a4, 0x4 },
+ { 0x100a5, 0x5 },
+ { 0x100a6, 0x6 },
+ { 0x100a7, 0x7 },
{ 0x110a0, 0x0 },
{ 0x110a1, 0x1 },
- { 0x110a2, 0x2 },
- { 0x110a3, 0x3 },
- { 0x110a4, 0x4 },
- { 0x110a5, 0x5 },
- { 0x110a6, 0x6 },
- { 0x110a7, 0x7 },
+ { 0x110a2, 0x3 },
+ { 0x110a3, 0x4 },
+ { 0x110a4, 0x5 },
+ { 0x110a5, 0x2 },
+ { 0x110a6, 0x7 },
+ { 0x110a7, 0x6 },
{ 0x120a0, 0x0 },
{ 0x120a1, 0x1 },
- { 0x120a2, 0x2 },
- { 0x120a3, 0x3 },
- { 0x120a4, 0x4 },
- { 0x120a5, 0x5 },
- { 0x120a6, 0x6 },
- { 0x120a7, 0x7 },
+ { 0x120a2, 0x3 },
+ { 0x120a3, 0x2 },
+ { 0x120a4, 0x5 },
+ { 0x120a5, 0x4 },
+ { 0x120a6, 0x7 },
+ { 0x120a7, 0x6 },
{ 0x130a0, 0x0 },
{ 0x130a1, 0x1 },
- { 0x130a2, 0x3 },
- { 0x130a3, 0x4 },
- { 0x130a4, 0x5 },
- { 0x130a5, 0x2 },
- { 0x130a6, 0x7 },
- { 0x130a7, 0x6 },
+ { 0x130a2, 0x2 },
+ { 0x130a3, 0x3 },
+ { 0x130a4, 0x4 },
+ { 0x130a5, 0x5 },
+ { 0x130a6, 0x6 },
+ { 0x130a7, 0x7 },
{ 0x1005f, 0x1ff },
{ 0x1015f, 0x1ff },
{ 0x1105f, 0x1ff },
@@ -2032,7 +2033,7 @@
{ 0x7055, 0x1ff },
{ 0x8055, 0x1ff },
{ 0x9055, 0x1ff },
- { 0x200c5, 0x19 },
+ { 0x200c5, 0x18 },
{ 0x1200c5, 0x7 },
{ 0x2200c5, 0x7 },
{ 0x2002e, 0x2 },
@@ -2041,11 +2042,11 @@
{ 0x90204, 0x0 },
{ 0x190204, 0x0 },
{ 0x290204, 0x0 },
- { 0x20024, 0x1a3 },
+ { 0x20024, 0x1e3 },
{ 0x2003a, 0x2 },
- { 0x120024, 0x1a3 },
+ { 0x120024, 0x1e3 },
{ 0x2003a, 0x2 },
- { 0x220024, 0x1a3 },
+ { 0x220024, 0x1e3 },
{ 0x2003a, 0x2 },
{ 0x20056, 0x3 },
{ 0x120056, 0x3 },
@@ -2111,7 +2112,7 @@
{ 0x20018, 0x3 },
{ 0x20075, 0x4 },
{ 0x20050, 0x0 },
- { 0x20008, 0x2ee },
+ { 0x20008, 0x3e8 },
{ 0x120008, 0x64 },
{ 0x220008, 0x19 },
{ 0x20088, 0x9 },
@@ -2175,7 +2176,7 @@
static struct dram_cfg_param ddr_fsp0_cfg_4gb_dual_die[] = {
{ 0xd0000, 0x0 },
- { 0x54003, 0xbb8 },
+ { 0x54003, 0xfa0 },
{ 0x54004, 0x2 },
{ 0x54005, 0x2228 },
{ 0x54006, 0x14 },
@@ -2184,26 +2185,26 @@
{ 0x5400b, 0x2 },
{ 0x5400f, 0x100 },
{ 0x54012, 0x310 },
- { 0x54019, 0x2dd4 },
- { 0x5401a, 0x31 },
+ { 0x54019, 0x3ff4 },
+ { 0x5401a, 0x33 },
{ 0x5401b, 0x4866 },
{ 0x5401c, 0x4800 },
{ 0x5401e, 0x16 },
- { 0x5401f, 0x2dd4 },
- { 0x54020, 0x31 },
+ { 0x5401f, 0x3ff4 },
+ { 0x54020, 0x33 },
{ 0x54021, 0x4866 },
{ 0x54022, 0x4800 },
{ 0x54024, 0x16 },
{ 0x5402b, 0x1000 },
{ 0x5402c, 0x3 },
- { 0x54032, 0xd400 },
- { 0x54033, 0x312d },
+ { 0x54032, 0xf400 },
+ { 0x54033, 0x333f },
{ 0x54034, 0x6600 },
{ 0x54035, 0x48 },
{ 0x54036, 0x48 },
{ 0x54037, 0x1600 },
- { 0x54038, 0xd400 },
- { 0x54039, 0x312d },
+ { 0x54038, 0xf400 },
+ { 0x54039, 0x333f },
{ 0x5403a, 0x6600 },
{ 0x5403b, 0x48 },
{ 0x5403c, 0x48 },
@@ -2294,7 +2295,7 @@
/* P0 2D message block paremeter for training firmware */
static struct dram_cfg_param ddr_fsp0_2d_cfg_4gb_dual_die[] = {
{ 0xd0000, 0x0 },
- { 0x54003, 0xbb8 },
+ { 0x54003, 0xfa0 },
{ 0x54004, 0x2 },
{ 0x54005, 0x2228 },
{ 0x54006, 0x14 },
@@ -2304,26 +2305,26 @@
{ 0x5400f, 0x100 },
{ 0x54010, 0x1f7f },
{ 0x54012, 0x310 },
- { 0x54019, 0x2dd4 },
- { 0x5401a, 0x31 },
+ { 0x54019, 0x3ff4 },
+ { 0x5401a, 0x33 },
{ 0x5401b, 0x4866 },
{ 0x5401c, 0x4800 },
{ 0x5401e, 0x16 },
- { 0x5401f, 0x2dd4 },
- { 0x54020, 0x31 },
+ { 0x5401f, 0x3ff4 },
+ { 0x54020, 0x33 },
{ 0x54021, 0x4866 },
{ 0x54022, 0x4800 },
{ 0x54024, 0x16 },
{ 0x5402b, 0x1000 },
{ 0x5402c, 0x3 },
- { 0x54032, 0xd400 },
- { 0x54033, 0x312d },
+ { 0x54032, 0xf400 },
+ { 0x54033, 0x333f },
{ 0x54034, 0x6600 },
{ 0x54035, 0x48 },
{ 0x54036, 0x48 },
{ 0x54037, 0x1600 },
- { 0x54038, 0xd400 },
- { 0x54039, 0x312d },
+ { 0x54038, 0xf400 },
+ { 0x54039, 0x333f },
{ 0x5403a, 0x6600 },
{ 0x5403b, 0x48 },
{ 0x5403c, 0x48 },
@@ -2333,8 +2334,8 @@
static struct dram_fsp_msg ddr_dram_fsp_msg_4gb_dual_die[] = {
{
- /* P0 3000mts 1D */
- .drate = 3000,
+ /* P0 4000mts 1D */
+ .drate = 4000,
.fw_type = FW_1D_IMAGE,
.fsp_cfg = ddr_fsp0_cfg_4gb_dual_die,
.fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_cfg_4gb_dual_die),
@@ -2354,8 +2355,8 @@
.fsp_cfg_num = ARRAY_SIZE(ddr_fsp2_cfg_4gb_dual_die),
},
{
- /* P0 3000mts 2D */
- .drate = 3000,
+ /* P0 4000mts 2D */
+ .drate = 4000,
.fw_type = FW_2D_IMAGE,
.fsp_cfg = ddr_fsp0_2d_cfg_4gb_dual_die,
.fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_2d_cfg_4gb_dual_die),
@@ -2374,5 +2375,5 @@
.ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr),
.ddrphy_pie = ddr_phy_pie,
.ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
- .fsp_table = { 3000, 400, 100, },
+ .fsp_table = { 4000, 400, 100, },
};
diff --git a/board/gateworks/venice/venice.c b/board/gateworks/venice/venice.c
index a39ae58..0902a1d 100644
--- a/board/gateworks/venice/venice.c
+++ b/board/gateworks/venice/venice.c
@@ -238,12 +238,12 @@
if (!strncmp(base_model, "GW73", 4)) {
pcbrev = get_pcb_rev(base_model);
- if (pcbrev > 'B') {
+ if (pcbrev > 'B' && pcbrev < 'E') {
printf("adjusting dt for %s\n", base_model);
/*
- * revC replaced PCIe 5-port switch with 4-port
- * which changed ethernet1 PCIe GbE
+ * revC/D/E has PCIe 4-port switch which changes
+ * ethernet1 PCIe GbE:
* from: pcie@0,0/pcie@1,0/pcie@2,4/pcie@6.0
* to: pcie@0,0/pcie@1,0/pcie@2,3/pcie@5.0
*/
diff --git a/board/grinn/liteboard/board.c b/board/grinn/liteboard/board.c
index 48392c4..cf1d7ce 100644
--- a/board/grinn/liteboard/board.c
+++ b/board/grinn/liteboard/board.c
@@ -20,7 +20,6 @@
#include <asm/mach-imx/iomux-v3.h>
#include <asm/mach-imx/boot_mode.h>
#include <asm/io.h>
-#include <common.h>
#include <env.h>
#include <fsl_esdhc_imx.h>
#include <linux/sizes.h>
diff --git a/board/hisilicon/hikey/MAINTAINERS b/board/hisilicon/hikey/MAINTAINERS
index 11088ee..1045abe 100644
--- a/board/hisilicon/hikey/MAINTAINERS
+++ b/board/hisilicon/hikey/MAINTAINERS
@@ -2,5 +2,6 @@
M: Peter Griffin <peter.griffin@linaro.org>
S: Maintained
F: board/hisilicon/hikey
+F: doc/board/hisilicon/hikey.rst
F: include/configs/hikey.h
F: configs/hikey_defconfig
diff --git a/board/hisilicon/hikey/README b/board/hisilicon/hikey/README
deleted file mode 100644
index 94e8397..0000000
--- a/board/hisilicon/hikey/README
+++ /dev/null
@@ -1,227 +0,0 @@
-Introduction
-============
-
-HiKey is the first certified 96Boards Consumer Edition board. The board/SoC has: -
-* HiSilicon Kirin 6220 eight-core ARM Cortex-A53 64-bit SoC running at 1.2GHz.
-* ARM Mali 450-MP4 GPU
-* 1GB 800MHz LPDDR3 DRAM
-* 4GB eMMC Flash Storage
-* microSD
-* 802.11a/b/g/n WiFi, Bluetooth
-
-The HiKey schematic can be found here: -
-https://github.com/96boards/documentation/blob/master/consumer/hikey/hikey620/hardware-docs/HiKey_schematics_LeMaker_version_Rev_A1.pdf
-
-The SoC datasheet can be found here: -
-https://github.com/96boards/documentation/blob/master/consumer/hikey/hikey620/hardware-docs/Hi6220V100_Multi-Mode_Application_Processor_Function_Description.pdf
-
-Currently the u-boot port supports: -
-* USB
-* eMMC
-* SD card
-* GPIO
-
-The HiKey U-Boot port has been tested with l-loader, booting ATF, which then boots
-U-Boot as the bl33.bin executable.
-
-Compile from source
-===================
-
-First get all the sources
-
- > mkdir -p ~/hikey/src ~/hikey/bin
- > cd ~/hikey/src
- > git clone https://github.com/96boards-hikey/edk2 -b testing/hikey960_v2.5
- > git clone https://github.com/ARM-software/arm-trusted-firmware
- > git clone https://github.com/96boards-hikey/l-loader -b testing/hikey960_v1.2
- > git clone https://github.com/96boards-hikey/OpenPlatformPkg -b testing/hikey960_v1.3.4
- > git clone https://github.com/96boards-hikey/atf-fastboot
- > wget https://snapshots.linaro.org/96boards/reference-platform/components/uefi-staging/latest/hikey/release/hisi-idt.py
-
-Get the BL30 mcuimage.bin binary. It is shipped as part of the UEFI source.
-The latest version can be obtained from the OpenPlatformPkg repo.
-
- > cp OpenPlatformPkg/Platforms/Hisilicon/HiKey/Binary/mcuimage.bin ~/hikey/bin/
-
-Get nvme.img binary
- > wget -P ~/hikey/bin https://snapshots.linaro.org/96boards/reference-platform/components/uefi-staging/latest/hikey/release/nvme.img
-
-Compile U-Boot
-==============
-
- > cd ~/hikey/src/u-boot
- > make CROSS_COMPILE=aarch64-linux-gnu- hikey_config
- > make CROSS_COMPILE=aarch64-linux-gnu-
- > cp u-boot.bin ~/hikey/bin
-
-Compile ARM Trusted Firmware (ATF)
-==================================
-
- > cd ~/hikey/src/arm-trusted-firmware
- > make CROSS_COMPILE=aarch64-linux-gnu- all fip \
- SCP_BL2=~/hikey/bin/mcuimage.bin \
- BL33=~/hikey/bin/u-boot.bin DEBUG=1 PLAT=hikey
-
-Copy the resulting FIP binary
- > cp build/hikey/debug/fip.bin ~/hikey/bin
-
-Compile ATF Fastboot
-====================
-
- > cd ~/hikey/src/atf-fastboot
- > make CROSS_COMPILE=aarch64-linux-gnu- PLAT=hikey DEBUG=1
-
-Compile l-loader
-================
- > cd ~/hikey/src/l-loader
- > ln -sf ~/hikey/src/arm-trusted-firmware/build/hikey/debug/bl1.bin
- > ln -sf ~/hikey/src/arm-trusted-firmware/build/hikey/debug/bl2.bin
- > ln -sf ~/hikey/src/atf-fastboot/build/hikey/debug/bl1.bin fastboot.bin
- > make hikey PTABLE_LST=aosp-8g
-
-Copy the resulting binaries
- > cp *.img ~/hikey/bin
- > cp l-loader.bin ~/hikey/bin
- > cp recovery.bin ~/hikey/bin
-
-These instructions are adapted from
-https://github.com/ARM-software/arm-trusted-firmware/blob/master/docs/plat/hikey.rst
-
-FLASHING
-========
-
-1. Connect the second jumper on J15 BOOT SEL, to go into recovery mode and flash l-loader.bin with
-the hisi-idt.py utility. Then connect a USB A to B mini cable from your PC to the USB OTG port of HiKey and execute the below command.
-
-The command below assumes HiKey enumerated as the first USB serial port
-
- > sudo python ~/hikey/src/hisi-idt.py -d /dev/ttyUSB0 --img1 ~/hikey/bin/recovery.bin
-
-2. Once LED 0 comes on solid, HiKey board should be detected as a fastboot device.
-
- > sudo fastboot devices
-
-0123456789ABCDEF fastboot
-
-3. Flash the images
-
- > sudo fastboot flash ptable ~/hikey/bin/prm_ptable.img
- > sudo fastboot flash loader ~/hikey/bin/l-loader.bin
- > sudo fastboot flash fastboot ~/hikey/bin/fip.bin
- > sudo fastboot flash nvme ~/hikey/bin/nvme.img
-
-4. Disconnect second jumper on J15 BOOT SEL, and reset the board and you will now (hopefully)
- have ATF, booting u-boot from eMMC.
-
- Note: To get USB host working, also disconnect the USB OTG cable used for flashing. Otherwise you
- will get 'dwc_otg_core_host_init: Timeout!' errors.
-
-See working boot trace below on UART3 available at Low Speed Expansion header: -
-
-NOTICE: BL2: v1.5(debug):v1.5-694-g6d4f6aea
-NOTICE: BL2: Built : 09:21:42, Aug 29 2018
-INFO: BL2: Doing platform setup
-INFO: ddr3 rank1 init pass
-INFO: succeed to set ddrc 150mhz
-INFO: ddr3 rank1 init pass
-INFO: succeed to set ddrc 266mhz
-INFO: ddr3 rank1 init pass
-INFO: succeed to set ddrc 400mhz
-INFO: ddr3 rank1 init pass
-INFO: succeed to set ddrc 533mhz
-INFO: ddr3 rank1 init pass
-INFO: succeed to set ddrc 800mhz
-INFO: Samsung DDR
-INFO: ddr test value:0xa5a55a5a
-INFO: BL2: TrustZone: protecting 16777216 bytes of memory at 0x3f000000
-INFO: BL2: TrustZone: protecting 4194304 bytes of memory at 0x3e800000
-INFO: [BDID] [fff91c18] midr: 0x410fd033
-INFO: init_acpu_dvfs: pmic version 17
-INFO: init_acpu_dvfs: ACPU_CHIP_MAX_FREQ=0x186a00.
-INFO: acpu_dvfs_volt_init: success!
-INFO: acpu_dvfs_set_freq: support freq num is 5
-INFO: acpu_dvfs_set_freq: start prof is 0x4
-INFO: acpu_dvfs_set_freq: magic is 0x5a5ac5c5
-INFO: acpu_dvfs_set_freq: voltage:
-INFO: - 0: 0x49
-INFO: - 1: 0x49
-INFO: - 2: 0x50
-INFO: - 3: 0x60
-INFO: - 4: 0x78
-NOTICE: acpu_dvfs_set_freq: set acpu freq success!INFO: BL2: Loading image id 2
-INFO: Loading image id=2 at address 0x1000000
-INFO: Image id=2 loaded: 0x1000000 - 0x1023d00
-INFO: hisi_mcu_load_image: mcu sections 0:
-INFO: hisi_mcu_load_image: src = 0x1000200
-INFO: hisi_mcu_load_image: dst = 0xf6000000
-INFO: hisi_mcu_load_image: size = 31184
-INFO: hisi_mcu_load_image: [SRC 0x1000200] 0x8000 0x3701 0x7695 0x7689
-INFO: hisi_mcu_load_image: [DST 0xf6000000] 0x8000 0x3701 0x7695 0x7689
-INFO: hisi_mcu_load_image: mcu sections 1:
-INFO: hisi_mcu_load_image: src = 0x1007bd0
-INFO: hisi_mcu_load_image: dst = 0x5e00000
-INFO: hisi_mcu_load_image: size = 93828
-INFO: hisi_mcu_load_image: [SRC 0x1007bd0] 0xf000b510 0x2103fb3d 0xf0004604 0xf003fb57
-INFO: hisi_mcu_load_image: [DST 0x5e00000] 0xf000b510 0x2103fb3d 0xf0004604 0xf003fb57
-INFO: hisi_mcu_load_image: mcu sections 2:
-INFO: hisi_mcu_load_image: src = 0x101ea54
-INFO: hisi_mcu_load_image: dst = 0x5e16e84
-INFO: hisi_mcu_load_image: size = 15428
-INFO: hisi_mcu_load_image: [SRC 0x101ea54] 0x9 0x1020640 0x10001 0x8f0d180
-INFO: hisi_mcu_load_image: [DST 0x5e16e84] 0x9 0x1020640 0x10001 0x8f0d180
-INFO: hisi_mcu_load_image: mcu sections 3:
-INFO: hisi_mcu_load_image: src = 0x1022698
-INFO: hisi_mcu_load_image: dst = 0x5e22a10
-INFO: hisi_mcu_load_image: size = 3060
-INFO: hisi_mcu_load_image: [SRC 0x1022698] 0x0 0x0 0x0 0x0
-INFO: hisi_mcu_load_image: [DST 0x5e22a10] 0x0 0x0 0x0 0x0
-INFO: hisi_mcu_load_image: mcu sections 4:
-INFO: hisi_mcu_load_image: src = 0x102328c
-INFO: hisi_mcu_load_image: dst = 0x5e23604
-INFO: hisi_mcu_load_image: size = 2616
-INFO: hisi_mcu_load_image: [SRC 0x102328c] 0xf80000a0 0x0 0xf80000ac 0x0
-INFO: hisi_mcu_load_image: [DST 0x5e23604] 0xf80000a0 0x0 0xf80000ac 0x0
-INFO: hisi_mcu_start_run: AO_SC_SYS_CTRL2=0
-INFO: plat_hikey_bl2_handle_scp_bl2: MCU PC is at 0x42933301
-INFO: plat_hikey_bl2_handle_scp_bl2: AO_SC_PERIPH_CLKSTAT4 is 0x3b018f09
-WARNING: BL2: Platform setup already done!!
-INFO: BL2: Loading image id 3
-INFO: Loading image id=3 at address 0xf9858000
-INFO: Image id=3 loaded: 0xf9858000 - 0xf9860058
-INFO: BL2: Loading image id 5
-INFO: Loading image id=5 at address 0x35000000
-INFO: Image id=5 loaded: 0x35000000 - 0x35061cd2
-NOTICE: BL2: Booting BL31
-INFO: Entry point address = 0xf9858000
-INFO: SPSR = 0x3cd
-NOTICE: BL31: v1.5(debug):v1.5-694-g6d4f6aea
-NOTICE: BL31: Built : 09:21:44, Aug 29 2018
-WARNING: Using deprecated integer interrupt array in gicv2_driver_data_t
-WARNING: Please migrate to using an interrupt_prop_t array
-INFO: ARM GICv2 driver initialized
-INFO: BL31: Initializing runtime services
-INFO: BL31: cortex_a53: CPU workaround for disable_non_temporal_hint was applied
-INFO: BL31: cortex_a53: CPU workaround for 843419 was applied
-INFO: BL31: cortex_a53: CPU workaround for 855873 was applied
-INFO: BL31: Preparing for EL3 exit to normal world
-INFO: Entry point address = 0x35000000
-INFO: SPSR = 0x3c9
-
-
-U-Boot 2018.09-rc1 (Aug 22 2018 - 14:55:49 +0530)hikey
-
-DRAM: 990 MiB
-HI6553 PMIC init
-MMC: config_sd_carddetect: SD card present
-Hisilicon DWMMC: 0, Hisilicon DWMMC: 1
-Loading Environment from FAT... Unable to use mmc 1:1... Failed (-5)
-In: uart@f7113000
-Out: uart@f7113000
-Err: uart@f7113000
-Net: Net Initialization Skipped
-No ethernet found.
-Hit any key to stop autoboot: 0
-starting USB...
-USB0: scanning bus 0 for devices... 2 USB Device(s) found
- scanning usb for storage devices... 0 Storage Device(s) found
- scanning usb for ethernet devices... 0 Ethernet Device(s) found
diff --git a/board/hisilicon/hikey960/MAINTAINERS b/board/hisilicon/hikey960/MAINTAINERS
index 2c98932..a442271 100644
--- a/board/hisilicon/hikey960/MAINTAINERS
+++ b/board/hisilicon/hikey960/MAINTAINERS
@@ -2,5 +2,6 @@
M: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
S: Maintained
F: board/hisilicon/hikey960
+F: doc/board/hisilicon/hikey960.rst
F: include/configs/hikey960.h
F: configs/hikey960_defconfig
diff --git a/board/hisilicon/hikey960/README b/board/hisilicon/hikey960/README
deleted file mode 100644
index 6e01862..0000000
--- a/board/hisilicon/hikey960/README
+++ /dev/null
@@ -1,247 +0,0 @@
-Introduction
-============
-
-HiKey960 is one of the 96Boards Consumer Edition board from HiSilicon.
-The board/SoC has: -
-* HiSilicon Kirin960 (HI3660) SoC with 4xCortex-A73 and 4xCortex-A53
-* ARM Mali G71 MP8 GPU
-* 3GB LPDDR4 SDRAM
-* 32GB UFS Flash Storage
-* microSD
-* 802.11a/b/g/n WiFi, Bluetooth
-
-More information about this board can be found in 96Boards website:
-https://www.96boards.org/product/hikey960/
-
-Currently the u-boot port supports: -
-* SD card
-
-Compile from source
-===================
-
-First get all the sources
-
- > mkdir -p ~/hikey960/src ~/hikey960/bin
- > cd ~/hikey960/src
- > git clone https://github.com/ARM-software/arm-trusted-firmware
- > git clone https://github.com/96boards-hikey/OpenPlatformPkg -b testing/hikey960_v1.3.4
- > git clone https://github.com/96boards-hikey/l-loader -b testing/hikey960_v1.2
- > wget http://snapshots.linaro.org/reference-platform/components/uefi-staging/123/hikey960/release/config
- > wget http://snapshots.linaro.org/reference-platform/components/uefi-staging/123/hikey960/release/hisi-sec_usb_xloader.img
- > wget http://snapshots.linaro.org/reference-platform/components/uefi-staging/123/hikey960/release/hisi-sec_uce_boot.img
- > wget http://snapshots.linaro.org/reference-platform/components/uefi-staging/123/hikey960/release/hisi-sec_xloader.img
- > wget http://snapshots.linaro.org/reference-platform/components/uefi-staging/123/hikey960/release/recovery.bin
- > wget http://snapshots.linaro.org/reference-platform/components/uefi-staging/123/hikey960/release/hikey_idt
-
-Get the SCP_BL2 lpm3.img binary. It is shipped as part of the UEFI source.
-The latest version can be obtained from the OpenPlatformPkg repo.
-
- > cp OpenPlatformPkg/Platforms/Hisilicon/HiKey960/Binary/lpm3.img ~/hikey960/bin/
-
-Compile U-Boot
-==============
-
- > cd ~/hikey960/src/u-boot
- > make CROSS_COMPILE=aarch64-linux-gnu- hikey960_defconfig
- > make CROSS_COMPILE=aarch64-linux-gnu-
- > cp u-boot.bin ~/hikey960/bin/
-
-Compile ARM Trusted Firmware (ATF)
-==================================
-
- > cd ~/hikey960/src/arm-trusted-firmware
- > make CROSS_COMPILE=aarch64-linux-gnu- all fip \
- SCP_BL2=~/hikey960/bin/lpm3.img \
- BL33=~/hikey960/bin/u-boot.bin DEBUG=1 PLAT=hikey960
-
-Copy the resulting FIP binary
- > cp build/hikey960/debug/fip.bin ~/hikey960/bin
-
-Compile l-loader
-================
- > cd ~/hikey960/src/l-loader
- > ln -sf ~/hikey960/src/arm-trusted-firmware/build/hikey960/debug/bl1.bin
- > ln -sf ~/hikey960/src/arm-trusted-firmware/build/hikey960/debug/bl2.bin
- > ln -sf ~/hikey960/src/arm-trusted-firmware/build/hikey960/debug/fip.bin
- > ln -sf ~/hikey960/bin/u-boot.bin
- > make hikey960 PTABLE_LST=linux-32g NS_BL1U=u-boot.bin
-
-Copy the resulting binaries
- > cp *.img ~/hikey960/bin
- > cp l-loader.bin ~/hikey960/bin
-
-These instructions are adapted from
-https://github.com/ARM-software/arm-trusted-firmware/blob/master/docs/plat/hikey960.rst
-
-Setup Console
-=============
-
-Install ser2net. Use telnet as the console since UEFI in recovery mode
-output window fails to display in minicom.
-
- > sudo apt-get install ser2net
-
-Configure ser2net
-
- > sudo vi /etc/ser2net.conf
-
-Append one line for serial-over-USB in #ser2net.conf
-
- > 2004:telnet:0:/dev/ttyUSB0:115200 8DATABITS NONE 1STOPBIT banner
-
-Start ser2net
-
- > sudo killall ser2net
- > sudo ser2net -u
-
-Open the console.
-
- > telnet localhost 2004
-
-And you could open the console remotely, too.
-
-Flashing
-========
-
-1. Boot Hikey960 into recovery mode as per the below document:
-https://github.com/96boards/documentation/blob/master/consumer/hikey/hikey960/installation/board-recovery.md
-
-Once Hikey960 is in recovery mode, flash the recovery binary:
-
- > cd ~/hikey960/src
- > chmod +x ./hikey_idt
- > sudo ./hikey_idt -c config -p /dev/ttyUSB1
-
-Now move to the Hikey960 console and press `f` during UEFI boot. This
-will allow the board to boot into fastboot mode. Once the board is in
-fastboot mode, you should see the ID of the HiKey960 board using the
-following command
-
- > sudo fastboot devices
-
-1ED3822A018E3372 fastboot
-
-3. Flash the images
-
-Now, the images can be flashed using fastboot:
-
- > sudo fastboot flash ptable ~/hikey960/bin/prm_ptable.img
- > sudo fastboot flash xloader ~/hikey960/bin/hisi-sec_xloader.img
- > sudo fastboot flash fastboot ~/hikey960/bin/l-loader.bin
- > sudo fastboot flash fip ~/hikey960/bin/fip.bin
-
-4. Set the "Boot Mode" switch to OFF position for normal boot mode.
-Then power on HiKey960
-
-Observe the console traces using UART6 on the Low Speed Expansion header:
-
-NOTICE: BL2: v2.1(debug):v2.1-531-g3ee48f40
-NOTICE: BL2: Built : 18:15:58, Aug 2 2019
-INFO: BL2: Doing platform setup
-INFO: UFS LUN0 contains 1024 blocks with 4096-byte size
-INFO: UFS LUN1 contains 1024 blocks with 4096-byte size
-INFO: UFS LUN2 contains 2048 blocks with 4096-byte size
-INFO: UFS LUN3 contains 7805952 blocks with 4096-byte size
-INFO: ufs: change power mode success
-INFO: BL2: Loading image id 2
-INFO: Loading image id=2 at address 0x89c80000
-INFO: Image id=2 loaded: 0x89c80000 - 0x89cb5088
-INFO: BL2: Initiating SCP_BL2 transfer to SCP
-INFO: BL2: SCP_BL2: 0x89c80000@0x35088
-INFO: BL2: SCP_BL2 HEAD:
-INFO: BL2: SCP_BL2 0x7000 0x179 0x159 0x149
-INFO: BL2: SCP_BL2 0x189 0x18b 0x18d 0x0
-INFO: BL2: SCP_BL2 0x0 0x0 0x0 0x18f
-INFO: BL2: SCP_BL2 0x191 0x0 0x193 0x195
-INFO: BL2: SCP_BL2 0x18fd 0x18fd 0x18fd 0x18fd
-INFO: BL2: SCP_BL2 0x18fd 0x18fd 0x18fd 0x18fd
-INFO: BL2: SCP_BL2 0x18fd 0x18fd 0x18fd 0x18fd
-INFO: BL2: SCP_BL2 0x4d454355 0x43494741 0x424d554e 0x21215245
-INFO: BL2: SCP_BL2 0x4a054904 0x42912000 0xf841bfbc 0xe7fa0b04
-INFO: BL2: SCP_BL2 0xb88cf000 0x3b18 0x3d1c 0x6809493e
-INFO: BL2: SCP_BL2 0x4613680a 0x201f102 0xf0002a04 0x600a804c
-INFO: BL2: SCP_BL2 0x204f04f 0xf203fb02 0xf102440a 0x60100204
-INFO: BL2: SCP_BL2 0x160f04f 0xf103fb01 0x68004834 0x61044408
-INFO: BL2: SCP_BL2 0x61866145 0xf8c061c7 0xf8c08020 0xf8c09024
-INFO: BL2: SCP_BL2 0xf8c0a028 0xf3efb02c 0xf3ef8208 0x68118309
-INFO: BL2: SCP_BL2 0xf1026401 0xf0110204 0xbf070f04 0x46113220
-INFO: BL2: SCP_BL2 TAIL:
-INFO: BL2: SCP_BL2 0x0 0x0 0x0 0x0
-INFO: BL2: SCP_BL2 0x0 0x0 0x0 0x0
-INFO: BL2: SCP_BL2 0x0 0x0 0x0 0x0
-INFO: BL2: SCP_BL2 0x0 0x0 0x0 0x0
-INFO: BL2: SCP_BL2 0x0 0x0 0x0 0x0
-INFO: BL2: SCP_BL2 0x0 0x0 0x0 0x0
-INFO: BL2: SCP_BL2 0x0 0x0 0x0 0x0
-INFO: BL2: SCP_BL2 0x0 0x0 0x0 0x0
-INFO: BL2: SCP_BL2 0x0 0x0 0x0 0x0
-INFO: BL2: SCP_BL2 0x0 0x0 0x0 0x0
-INFO: BL2: SCP_BL2 0x0 0x19cad151 0x19b80040 0x0
-INFO: BL2: SCP_BL2 0x0 0x0 0x0 0x0
-INFO: BL2: SCP_BL2 0x0 0x0 0x0 0x0
-INFO: BL2: SCP_BL2 0x0 0x0 0x0 0x0
-INFO: BL2: SCP_BL2 0x0 0x0 0x0 0x0
-INFO: BL2: SCP_BL2 0x0 0x0 0x0 0x0
-INFO: BL2: SCP_BL2 transferred to SCP
-INFO: start fw loading
-INFO: fw load success
-WARNING: BL2: Platform setup already done!!
-INFO: BL2: Loading image id 3
-INFO: Loading image id=3 at address 0x1ac58000
-INFO: Image id=3 loaded: 0x1ac58000 - 0x1ac63024
-INFO: BL2: Loading image id 5
-INFO: Loading image id=5 at address 0x1ac98000
-INFO: Image id=5 loaded: 0x1ac98000 - 0x1ad0819c
-NOTICE: BL2: Booting BL31
-INFO: Entry point address = 0x1ac58000
-INFO: SPSR = 0x3cd
-NOTICE: BL31: v2.1(debug):v2.1-531-g3ee48f40
-NOTICE: BL31: Built : 18:16:01, Aug 2 2019
-INFO: ARM GICv2 driver initialized
-INFO: BL31: Initializing runtime services
-INFO: BL31: cortex_a53: CPU workaround for 855873 was applied
-INFO: plat_setup_psci_ops: sec_entrypoint=0x1ac580fc
-INFO: BL31: Preparing for EL3 exit to normal world
-INFO: Entry point address = 0x1ac98000
-INFO: SPSR = 0x3c9
-
-
-U-Boot 2019.07-00628-g286f05a6fc-dirty (Aug 02 2019 - 17:14:05 +0530)
-Hikey960
-
-DRAM: 3 GiB
-PSCI: v1.1
-MMC: dwmmc1@ff37f000: 0
-Loading Environment from EXT4... ** File not found /uboot.env **
-
-** Unable to read "/uboot.env" from mmc0:2 **
-In: serial@fff32000
-Out: serial@fff32000
-Err: serial@fff32000
-Net: Net Initialization Skipped
-No ethernet found.
-Hit any key to stop autoboot: 0
-switch to partitions #0, OK
-mmc0 is current device
-Scanning mmc 0:1...
-Found /extlinux/extlinux.conf
-Retrieving file: /extlinux/extlinux.conf
-201 bytes read in 12 ms (15.6 KiB/s)
-1: hikey960-kernel
-Retrieving file: /Image
-24689152 bytes read in 4377 ms (5.4 MiB/s)
-append: earlycon=pl011,mmio32,0xfff32000 console=ttyAMA6,115200 rw root=/dev/mmcblk0p2 rot
-Retrieving file: /hi3660-hikey960.dtb
-35047 bytes read in 14 ms (2.4 MiB/s)
-## Flattened Device Tree blob at 10000000
- Booting using the fdt blob at 0x10000000
- Using Device Tree in place at 0000000010000000, end 000000001000b8e6
-
-Starting kernel ...
-
-[ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
-[ 0.000000] Linux version 5.2.0-03138-gd75da80dce39 (mani@Mani-XPS-13-9360) (gcc versi9
-[ 0.000000] Machine model: HiKey960
-[ 0.000000] earlycon: pl11 at MMIO32 0x00000000fff32000 (options '')
-[ 0.000000] printk: bootconsole [pl11] enabled
-[ 0.000000] efi: Getting EFI parameters from FDT:
diff --git a/board/hisilicon/poplar/MAINTAINERS b/board/hisilicon/poplar/MAINTAINERS
index 9c045ea..bfd4a9b 100644
--- a/board/hisilicon/poplar/MAINTAINERS
+++ b/board/hisilicon/poplar/MAINTAINERS
@@ -3,5 +3,6 @@
M: Shawn Guo <shawn.guo@linaro.org>
S: Maintained
F: board/hisilicon/poplar
+F: doc/board/hisilicon/poplar.rst
F: include/configs/poplar.h
F: configs/poplar_defconfig
diff --git a/board/hisilicon/poplar/README b/board/hisilicon/poplar/README
deleted file mode 100644
index 77dcc3b..0000000
--- a/board/hisilicon/poplar/README
+++ /dev/null
@@ -1,288 +0,0 @@
-================================================================================
- Board Information
-================================================================================
-
-Developed by HiSilicon, the board features the Hi3798C V200 with an
-integrated quad-core 64-bit ARM Cortex A53 processor and high
-performance Mali T720 GPU, making it capable of running any commercial
-set-top solution based on Linux or Android. Its high performance
-specification also supports a premium user experience with up to H.265
-HEVC decoding of 4K video at 60 frames per second.
-
-SOC Hisilicon Hi3798CV200
-CPU Quad-core ARM Cortex-A53 64 bit
-DRAM DDR3/3L/4 SDRAM interface, maximum 32-bit data width 2 GB
-USB Two USB 2.0 ports One USB 3.0 ports
-CONSOLE USB-micro port for console support
-ETHERNET 1 GBe Ethernet
-PCIE One PCIe 2.0 interfaces
-JTAG 8-Pin JTAG
-EXPANSION INTERFACE Linaro 96Boards Low Speed Expansion slot
-DIMENSION Standard 160×120 mm 96Boards Enterprice Edition form factor
-WIFI 802.11AC 2*2 with Bluetooth
-CONNECTORS One connector for Smart Card One connector for TSI
-
-
-================================================================================
- BUILD INSTRUCTIONS
-================================================================================
-
-Note of warning:
-================
-
-U-Boot has a *strong* dependency with the l-loader and the arm trusted firmware
-repositories.
-
-The boot sequence is:
- l-loader --> arm_trusted_firmware --> u-boot
-
-U-Boot needs to be aware of the BL31 runtime location and size to avoid writing
-over it. Currently, BL31 is being placed below the kernel text offset (check
-poplar.c) but this could change in the future.
-
-The current version of u-boot has been tested with:
- - https://github.com/Linaro/poplar-l-loader.git
-
- commit f0988698dcc5c08bd0a8f50aa0457e138a5f438c
- Author: Alex Elder <elder@linaro.org>
- Date: Fri Jun 16 08:57:59 2017 -0500
-
- l-loader: use external memory region definitions
-
- The ARM Trusted Firmware code now has a header file that collects
- all the definitions for the memory regions used for its boot stages.
- Include that file where needed, and use the definitions found therein
-
- Signed-off-by: Alex Elder <elder@linaro.org>
-
-
- - https://github.com/Linaro/poplar-arm-trusted-firmware.git
-
- commit 6ac42dd3be13c99aa8ce29a15073e2f19d935f68
- Author: Alex Elder <elder@linaro.org>
- Date: Fri Jun 16 09:24:50 2017 -0500
-
- poplar: define memory regions in a separate file
-
- Separate the definitions for memory regions used for the BL stage
- images and FIP into a new file. The "l-loader" image uses knowledge
- of the sizes and locations of these memory regions, and it can now
- include this (external) header to get these definitions, rather than
- having to make coordinated changes to both code bases.
-
- The new file has a complete set of definitions (more than may be
- required by one or the other user). It also includes a summary of
- how the boot process works, and how it uses these regions.
-
- It should now be relatively easy to adjust the sizes and locations
- of these memory regions, or to add to them (e.g. for TEE).
-
- Signed-off-by: Alex Elder <elder@linaro.org>
-
-
-Compile from source:
-====================
-
-Get all the sources
-
- > mkdir -p ~/poplar/src ~/poplar/bin
- > cd ~/poplar/src
- > git clone https://github.com/Linaro/poplar-l-loader.git l-loader
- > git clone https://github.com/Linaro/poplar-arm-trusted-firmware.git atf
- > git clone https://github.com/Linaro/poplar-u-boot.git u-boot
-
-Make sure you are using the correct branch on each one of these repositories.
-The definition of "correct" might change over time (at this moment in time this
-would be the "latest" branch).
-
-Compile U-Boot:
-===============
-
- Prerequisite:
- # sudo apt-get install device-tree-compiler
-
- > cd ~/poplar/src/u-boot
- > make CROSS_COMPILE=aarch64-linux-gnu- poplar_defconfig
- > make CROSS_COMPILE=aarch64-linux-gnu-
- > cp u-boot.bin ~/poplar/bin
-
-Compile ARM Trusted Firmware (ATF):
-===================================
-
- > cd ~/poplar/src/atf
- > make CROSS_COMPILE=aarch64-linux-gnu- all fip \
- SPD=none BL33=~/poplar/bin/u-boot.bin DEBUG=1 PLAT=poplar
-
-Copy resulting binaries
- > cp build/hi3798cv200/debug/bl1.bin ~/poplar/src/l-loader/atf/
- > cp build/hi3798cv200/debug/fip.bin ~/poplar/src/l-loader/atf/
-
-Compile l-loader:
-=================
-
- > cd ~/poplar/src/l-loader
- > make clean
- > make CROSS_COMPILE=arm-linux-gnueabi-
-
- Due to BootROM requiremets, rename l-loader.bin to fastboot.bin:
- > cp l-loader.bin ~/poplar/bin/fastboot.bin
-
-
-================================================================================
- FLASH INSTRUCTIONS
-================================================================================
-
-Two methods:
-
-Using USB debrick support:
- Copy fastboot.bin to a FAT partition on the USB drive and reboot the
- poplar board while pressing S3(usb_boot).
-
- The system will execute the new u-boot and boot into a shell which you
- can then use to write to eMMC.
-
-Using U-BOOT from shell:
- 1) using AXIS usb ethernet dongle and tftp
- 2) using FAT formated USB drive
-
-
-1. TFTP (USB ethernet dongle)
-=============================
-
-Plug a USB AXIS ethernet dongle on any of the USB2 ports on the Poplar board.
-Copy fastboot.bin to your tftp server.
-In u-boot make sure your network is properly setup.
-
-Then
-
-=> tftp 0x30000000 fastboot.bin
-starting USB...
-USB0: USB EHCI 1.00
-scanning bus 0 for devices... 1 USB Device(s) found
-USB1: USB EHCI 1.00
-scanning bus 1 for devices... 3 USB Device(s) found
- scanning usb for storage devices... 0 Storage Device(s) found
- scanning usb for ethernet devices... 1 Ethernet Device(s) found
-Waiting for Ethernet connection... done.
-Using asx0 device
-TFTP from server 192.168.1.4; our IP address is 192.168.1.10
-Filename 'poplar/fastboot.bin'.
-Load address: 0x30000000
-Loading: #################################################################
- #################################################################
- ###############################################################
- 2 MiB/s
-done
-Bytes transferred = 983040 (f0000 hex)
-
-=> mmc write 0x30000000 0 0x780
-
-MMC write: dev # 0, block # 0, count 1920 ... 1920 blocks written: OK
-=> reset
-
-
-2. USING USB FAT DRIVE
-=======================
-
-Copy fastboot.bin to any partition on a FAT32 formated usb flash drive.
-Enter the uboot prompt
-
-=> fatls usb 0:2
- 983040 fastboot.bin
-
-1 file(s), 0 dir(s)
-
-=> fatload usb 0:2 0x30000000 fastboot.bin
-reading fastboot.bin
-983040 bytes read in 44 ms (21.3 MiB/s)
-
-=> mmc write 0x30000000 0 0x780
-
-MMC write: dev # 0, block # 0, count 1920 ... 1920 blocks written: OK
-
-
-================================================================================
- BOOT TRACE
-================================================================================
-
-Bootrom start
-Boot Media: eMMC
-Decrypt auxiliary code ...OK
-
-lsadc voltage min: 000000FE, max: 000000FF, aver: 000000FE, index: 00000000
-
-Entry boot auxiliary code
-
-Auxiliary code - v1.00
-DDR code - V1.1.2 20160205
-Build: Mar 24 2016 - 17:09:44
-Reg Version: v134
-Reg Time: 2016/03/18 09:44:55
-Reg Name: hi3798cv2dmb_hi3798cv200_ddr3_2gbyte_8bitx4_4layers.reg
-
-Boot auxiliary code success
-Bootrom success
-
-LOADER: Switched to aarch64 mode
-LOADER: Entering ARM TRUSTED FIRMWARE
-LOADER: CPU0 executes at 0x000ce000
-
-INFO: BL1: 0xe1000 - 0xe7000 [size = 24576]
-NOTICE: Booting Trusted Firmware
-NOTICE: BL1: v1.3(debug):v1.3-372-g1ba9c60
-NOTICE: BL1: Built : 17:51:33, Apr 30 2017
-INFO: BL1: RAM 0xe1000 - 0xe7000
-INFO: BL1: Loading BL2
-INFO: Loading image id=1 at address 0xe9000
-INFO: Image id=1 loaded at address 0xe9000, size = 0x5008
-NOTICE: BL1: Booting BL2
-INFO: Entry point address = 0xe9000
-INFO: SPSR = 0x3c5
-NOTICE: BL2: v1.3(debug):v1.3-372-g1ba9c60
-NOTICE: BL2: Built : 17:51:33, Apr 30 2017
-INFO: BL2: Loading BL31
-INFO: Loading image id=3 at address 0x129000
-INFO: Image id=3 loaded at address 0x129000, size = 0x8038
-INFO: BL2: Loading BL33
-INFO: Loading image id=5 at address 0x37000000
-INFO: Image id=5 loaded at address 0x37000000, size = 0x58f17
-NOTICE: BL1: Booting BL31
-INFO: Entry point address = 0x129000
-INFO: SPSR = 0x3cd
-INFO: Boot bl33 from 0x37000000 for 364311 Bytes
-NOTICE: BL31: v1.3(debug):v1.3-372-g1ba9c60
-NOTICE: BL31: Built : 17:51:33, Apr 30 2017
-INFO: BL31: Initializing runtime services
-INFO: BL31: Preparing for EL3 exit to normal world
-INFO: Entry point address = 0x37000000
-INFO: SPSR = 0x3c9
-
-
-U-Boot 2017.05-rc2-00130-gd2255b0 (Apr 30 2017 - 17:51:28 +0200)poplar
-
-Model: HiSilicon Poplar Development Board
-BOARD: Hisilicon HI3798cv200 Poplar
-DRAM: 1 GiB
-MMC: Hisilicon DWMMC: 0
-In: serial@f8b00000
-Out: serial@f8b00000
-Err: serial@f8b00000
-Net: Net Initialization Skipped
-No ethernet found.
-
-Hit any key to stop autoboot: 0
-starting USB...
-USB0: USB EHCI 1.00
-scanning bus 0 for devices... 1 USB Device(s) found
-USB1: USB EHCI 1.00
-scanning bus 1 for devices... 4 USB Device(s) found
- scanning usb for storage devices... 1 Storage Device(s) found
- scanning usb for ethernet devices... 1 Ethernet Device(s) found
-
-USB device 0:
- Device 0: Vendor: SanDisk Rev: 1.00 Prod: Cruzer Blade
- Type: Removable Hard Disk
- Capacity: 7632.0 MB = 7.4 GB (15630336 x 512)
-... is now current device
-Scanning usb 0:1...
-=>
diff --git a/board/htc/endeavoru/endeavoru-spl.c b/board/htc/endeavoru/endeavoru-spl.c
index 7921ff1..3c4caff 100644
--- a/board/htc/endeavoru/endeavoru-spl.c
+++ b/board/htc/endeavoru/endeavoru-spl.c
@@ -9,7 +9,12 @@
* Svyatoslav Ryhel <clamor95@gmail.com>
*/
-#include <common.h>
+#include <asm/io.h>
+#include <asm/gpio.h>
+#include <asm/arch/pinmux.h>
+#include <asm/arch/tegra.h>
+#include <asm/arch-tegra/board.h>
+#include <asm/arch-tegra/pmc.h>
#include <asm/arch-tegra/tegra_i2c.h>
#include <linux/delay.h>
@@ -30,6 +35,8 @@
#define TPS80032_SMPS1_CFG_STATE_DATA (0x0100 | TPS80032_SMPS1_CFG_STATE_REG)
#define TPS80032_SMPS2_CFG_STATE_DATA (0x0100 | TPS80032_SMPS2_CFG_STATE_REG)
+#define TEGRA_GPIO_PS0 144
+
void pmic_enable_cpu_vdd(void)
{
/* Set VDD_CORE to 1.200V. */
@@ -45,3 +52,52 @@
tegra_i2c_ll_write(TPS80032_CTL1_I2C_ADDR, TPS80032_SMPS1_CFG_STATE_DATA);
udelay(10 * 1000);
}
+
+/*
+ * Unlike all other supported Tegra devices and most known Tegra devices, the
+ * HTC One X has no hardware way to enter APX/RCM mode, which may lead to a
+ * dangerous situation when, if BCT is set correctly and the bootloader is
+ * faulty, the device will hang in a permanent brick state. Exiting from this
+ * state can be done only by disassembling the device and shortening testpad
+ * to the ground.
+ *
+ * To prevent this or to minimize the probability of such an accident, it was
+ * proposed to add the RCM rebooting hook as early into SPL as possible since
+ * SPL is much more robust and has minimal changes that can break bootflow.
+ *
+ * gpio_early_init_uart() function was chosen as it is the earliest function
+ * exposed for setup by the device. Hook performs a check for volume up
+ * button state and triggers RCM if it is pressed.
+ */
+void gpio_early_init_uart(void)
+{
+ struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
+ struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(TEGRA_GPIO_PS0)];
+ u32 value;
+
+ /* Configure pinmux */
+ pinmux_set_func(PMUX_PINGRP_KB_ROW8_PS0, PMUX_FUNC_KBC);
+ pinmux_set_pullupdown(PMUX_PINGRP_KB_ROW8_PS0, PMUX_PULL_UP);
+ pinmux_tristate_disable(PMUX_PINGRP_KB_ROW8_PS0);
+ pinmux_set_io(PMUX_PINGRP_KB_ROW8_PS0, PMUX_PIN_INPUT);
+
+ /* Configure GPIO direction as input. */
+ value = readl(&bank->gpio_dir_out[GPIO_PORT(TEGRA_GPIO_PS0)]);
+ value &= ~(1 << GPIO_BIT(TEGRA_GPIO_PS0));
+ writel(value, &bank->gpio_dir_out[GPIO_PORT(TEGRA_GPIO_PS0)]);
+
+ /* Enable the pin as a GPIO */
+ value = readl(&bank->gpio_config[GPIO_PORT(TEGRA_GPIO_PS0)]);
+ value |= 1 << GPIO_BIT(TEGRA_GPIO_PS0);
+ writel(value, &bank->gpio_config[GPIO_PORT(TEGRA_GPIO_PS0)]);
+
+ /* Get GPIO value */
+ value = readl(&bank->gpio_in[GPIO_PORT(TEGRA_GPIO_PS0)]);
+ value = (value >> GPIO_BIT(TEGRA_GPIO_PS0)) & 1;
+
+ /* Enter RCM if button is pressed */
+ if (!value) {
+ tegra_pmc_writel(2, PMC_SCRATCH0);
+ tegra_pmc_writel(PMC_CNTRL_MAIN_RST, PMC_CNTRL);
+ }
+}
diff --git a/board/htc/endeavoru/endeavoru.c b/board/htc/endeavoru/endeavoru.c
index e1a0b24..78eb34e7 100644
--- a/board/htc/endeavoru/endeavoru.c
+++ b/board/htc/endeavoru/endeavoru.c
@@ -7,90 +7,7 @@
* Svyatoslav Ryhel <clamor95@gmail.com>
*/
-#include <common.h>
-#include <dm.h>
#include <fdt_support.h>
-#include <i2c.h>
-#include <log.h>
-#include <asm/arch/pinmux.h>
-#include <asm/arch/gp_padctrl.h>
-#include <asm/arch/gpio.h>
-#include <asm/gpio.h>
-#include <linux/delay.h>
-#include "pinmux-config-endeavoru.h"
-
-#define TPS80032_CTL1_I2C_ADDR 0x48
-#define TPS80032_PHOENIX_DEV_ON 0x25
-#define DEVOFF BIT(0)
-#define TPS80032_LDO1_CFG_STATE 0x9E
-#define TPS80032_LDO1_CFG_VOLTAGE 0x9F
-
-#ifdef CONFIG_CMD_POWEROFF
-int do_poweroff(struct cmd_tbl *cmdtp, int flag,
- int argc, char *const argv[])
-{
- struct udevice *dev;
- int ret;
-
- ret = i2c_get_chip_for_busnum(0, TPS80032_CTL1_I2C_ADDR, 1, &dev);
- if (ret) {
- log_debug("cannot find PMIC I2C chip\n");
- return 0;
- }
-
- ret = dm_i2c_reg_write(dev, TPS80032_PHOENIX_DEV_ON, DEVOFF);
- if (ret)
- return ret;
-
- // wait some time and then print error
- mdelay(5000);
-
- printf("Failed to power off!!!\n");
- return 1;
-}
-#endif
-
-/*
- * Routine: pinmux_init
- * Description: Do individual peripheral pinmux configs
- */
-void pinmux_init(void)
-{
- pinmux_config_pingrp_table(endeavoru_pinmux_common,
- ARRAY_SIZE(endeavoru_pinmux_common));
-}
-
-#ifdef CONFIG_MMC_SDHCI_TEGRA
-static void tps80032_voltage_init(void)
-{
- struct udevice *dev;
- int ret;
-
- ret = i2c_get_chip_for_busnum(0, TPS80032_CTL1_I2C_ADDR, 1, &dev);
- if (ret)
- log_debug("cannot find PMIC I2C chip\n");
-
- /* TPS80032: LDO1_REG = 1.2v to DSI */
- ret = dm_i2c_reg_write(dev, TPS80032_LDO1_CFG_VOLTAGE, 0x03);
- if (ret)
- log_debug("avdd_dsi_csi voltage set failed: %d\n", ret);
-
- /* TPS80032: LDO1_REG enable */
- ret = dm_i2c_reg_write(dev, TPS80032_LDO1_CFG_STATE, 0x01);
- if (ret)
- log_debug("avdd_dsi_csi enable failed: %d\n", ret);
-}
-
-/*
- * Routine: pin_mux_mmc
- * Description: setup the MMC muxes, power rails, etc.
- */
-void pin_mux_mmc(void)
-{
- /* Bring up DSI power */
- tps80032_voltage_init();
-}
-#endif /* MMC */
#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
int ft_board_setup(void *blob, struct bd_info *bd)
diff --git a/board/htc/endeavoru/pinmux-config-endeavoru.h b/board/htc/endeavoru/pinmux-config-endeavoru.h
deleted file mode 100644
index a00c5c9..0000000
--- a/board/htc/endeavoru/pinmux-config-endeavoru.h
+++ /dev/null
@@ -1,362 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * Copyright (c) 2010-2013, NVIDIA CORPORATION. All rights reserved.
- *
- * Copyright (c) 2022, Svyatoslav Ryhel.
- */
-
-#ifndef _PINMUX_CONFIG_ENDEAVORU_H_
-#define _PINMUX_CONFIG_ENDEAVORU_H_
-
-#define DEFAULT_PINMUX(_pingrp, _mux, _pull, _tri, _io) \
- { \
- .pingrp = PMUX_PINGRP_##_pingrp, \
- .func = PMUX_FUNC_##_mux, \
- .pull = PMUX_PULL_##_pull, \
- .tristate = PMUX_TRI_##_tri, \
- .io = PMUX_PIN_##_io, \
- .lock = PMUX_PIN_LOCK_DEFAULT, \
- .od = PMUX_PIN_OD_DEFAULT, \
- .ioreset = PMUX_PIN_IO_RESET_DEFAULT, \
- }
-
-#define I2C_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _od) \
- { \
- .pingrp = PMUX_PINGRP_##_pingrp, \
- .func = PMUX_FUNC_##_mux, \
- .pull = PMUX_PULL_##_pull, \
- .tristate = PMUX_TRI_##_tri, \
- .io = PMUX_PIN_##_io, \
- .lock = PMUX_PIN_LOCK_##_lock, \
- .od = PMUX_PIN_OD_##_od, \
- .ioreset = PMUX_PIN_IO_RESET_DEFAULT, \
- }
-
-#define LV_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _ioreset) \
- { \
- .pingrp = PMUX_PINGRP_##_pingrp, \
- .func = PMUX_FUNC_##_mux, \
- .pull = PMUX_PULL_##_pull, \
- .tristate = PMUX_TRI_##_tri, \
- .io = PMUX_PIN_##_io, \
- .lock = PMUX_PIN_LOCK_##_lock, \
- .od = PMUX_PIN_OD_DEFAULT, \
- .ioreset = PMUX_PIN_IO_RESET_##_ioreset \
- }
-
-#define DEFAULT_PADCFG(_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \
- { \
- .drvgrp = PMUX_DRVGRP_##_drvgrp, \
- .slwf = _slwf, \
- .slwr = _slwr, \
- .drvup = _drvup, \
- .drvdn = _drvdn, \
- .lpmd = PMUX_LPMD_##_lpmd, \
- .schmt = PMUX_SCHMT_##_schmt, \
- .hsm = PMUX_HSM_##_hsm, \
- }
-
-static struct pmux_pingrp_config endeavoru_pinmux_common[] = {
- /* SDMMC1 pinmux */
- DEFAULT_PINMUX(SDMMC1_CLK_PZ0, SDMMC1, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(SDMMC1_CMD_PZ1, SDMMC1, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(SDMMC1_DAT3_PY4, UARTE, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(SDMMC1_DAT2_PY5, UARTE, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(SDMMC1_DAT1_PY6, RSVD2, NORMAL, TRISTATE, INPUT),
- DEFAULT_PINMUX(SDMMC1_DAT0_PY7, SDMMC1, UP, NORMAL, INPUT),
-
- /* SDMMC3 pinmux */
- DEFAULT_PINMUX(SDMMC3_CLK_PA6, SDMMC3, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(SDMMC3_CMD_PA7, SDMMC3, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(SDMMC3_DAT0_PB7, SDMMC3, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(SDMMC3_DAT1_PB6, SDMMC3, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(SDMMC3_DAT2_PB5, SDMMC3, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(SDMMC3_DAT3_PB4, SDMMC3, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(SDMMC3_DAT4_PD1, SDMMC3, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(SDMMC3_DAT5_PD0, SDMMC3, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(SDMMC3_DAT6_PD3, INVALID, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(SDMMC3_DAT7_PD4, INVALID, NORMAL, NORMAL, INPUT),
-
- /* SDMMC4 pinmux */
- LV_PINMUX(SDMMC4_CLK_PCC4, SDMMC4, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
- LV_PINMUX(SDMMC4_CMD_PT7, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
- LV_PINMUX(SDMMC4_DAT0_PAA0, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
- LV_PINMUX(SDMMC4_DAT1_PAA1, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
- LV_PINMUX(SDMMC4_DAT2_PAA2, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
- LV_PINMUX(SDMMC4_DAT3_PAA3, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
- LV_PINMUX(SDMMC4_DAT4_PAA4, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
- LV_PINMUX(SDMMC4_DAT5_PAA5, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
- LV_PINMUX(SDMMC4_DAT6_PAA6, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
- LV_PINMUX(SDMMC4_DAT7_PAA7, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
- LV_PINMUX(SDMMC4_RST_N_PCC3, RSVD2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
-
- /* I2C pinmux */
- I2C_PINMUX(GEN1_I2C_SCL_PC4, I2C1, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
- I2C_PINMUX(GEN1_I2C_SDA_PC5, I2C1, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
- I2C_PINMUX(GEN2_I2C_SCL_PT5, I2C2, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
- I2C_PINMUX(GEN2_I2C_SDA_PT6, I2C2, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
- I2C_PINMUX(CAM_I2C_SCL_PBB1, I2C3, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
- I2C_PINMUX(CAM_I2C_SDA_PBB2, I2C3, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
- I2C_PINMUX(DDC_SCL_PV4, I2C4, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
- I2C_PINMUX(DDC_SDA_PV5, I2C4, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
- I2C_PINMUX(PWR_I2C_SCL_PZ6, I2CPWR, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
- I2C_PINMUX(PWR_I2C_SDA_PZ7, I2CPWR, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
-
- /* HDMI pinmux */
- DEFAULT_PINMUX(HDMI_CEC_PEE3, CEC, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(HDMI_INT_PN7, RSVD1, NORMAL, TRISTATE, INPUT),
-
- /* ULPI pinmux */
- DEFAULT_PINMUX(ULPI_DATA0_PO1, UARTA, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(ULPI_DATA1_PO2, UARTA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(ULPI_DATA2_PO3, SPI3, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(ULPI_DATA3_PO4, HSI, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(ULPI_DATA4_PO5, SPI2, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(ULPI_DATA5_PO6, ULPI, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(ULPI_DATA6_PO7, ULPI, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(ULPI_DATA7_PO0, SPI2, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(ULPI_CLK_PY0, RSVD2, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(ULPI_DIR_PY1, RSVD2, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(ULPI_NXT_PY2, ULPI, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(ULPI_STP_PY3, ULPI, NORMAL, NORMAL, INPUT),
-
- /* DAP3 pinmux */
- DEFAULT_PINMUX(DAP3_FS_PP0, I2S2, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(DAP3_DIN_PP1, I2S2, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(DAP3_DOUT_PP2, I2S2, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(DAP3_SCLK_PP3, I2S2, NORMAL, NORMAL, INPUT),
-
- /* PV-gpio group pinmux */
- DEFAULT_PINMUX(PV0, RSVD1, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(PV1, RSVD1, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(PV2, RSVD2, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(PV3, RSVD2, NORMAL, NORMAL, OUTPUT),
-
- /* CLK2 pinmux */
- DEFAULT_PINMUX(CLK2_OUT_PW5, RSVD4, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(CLK2_REQ_PCC5, RSVD4, NORMAL, NORMAL, OUTPUT),
-
- /* LCD pinmux */
- DEFAULT_PINMUX(LCD_PWR1_PC1, RSVD4, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(LCD_PWR2_PC6, DISPLAYA, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(LCD_SDIN_PZ2, DISPLAYA, UP, NORMAL, OUTPUT),
- DEFAULT_PINMUX(LCD_SDOUT_PN5, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_WR_N_PZ3, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_CS0_N_PN4, RSVD4, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_DC0_PN6, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_SCK_PZ4, DISPLAYA, UP, TRISTATE, OUTPUT),
- DEFAULT_PINMUX(LCD_PWR0_PB2, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_PCLK_PB3, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_DE_PJ1, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_HSYNC_PJ3, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_VSYNC_PJ4, DISPLAYA, DOWN, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D0_PE0, DISPLAYA, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(LCD_D1_PE1, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D2_PE2, RSVD3, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(LCD_D3_PE3, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D4_PE4, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D5_PE5, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D6_PE6, RSVD3, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D7_PE7, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D8_PF0, RSVD4, DOWN, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D9_PF1, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D10_PF2, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D11_PF3, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D12_PF4, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D13_PF5, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D14_PF6, RSVD4, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D15_PF7, RSVD4, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(LCD_D16_PM0, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D17_PM1, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D18_PM2, RSVD4, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D19_PM3, RSVD4, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(LCD_D20_PM4, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D21_PM5, RSVD4, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(LCD_D22_PM6, RSVD4, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(LCD_D23_PM7, RSVD4, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_CS1_N_PW0, RSVD4, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_M1_PW1, DISPLAYA, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(LCD_DC1_PD2, RSVD4, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(CRT_HSYNC_PV6, CRT, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(CRT_VSYNC_PV7, RSVD4, NORMAL, NORMAL, OUTPUT),
-
- /* VI-group pinmux */
- LV_PINMUX(VI_D0_PT4, INVALID, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
- LV_PINMUX(VI_D1_PD5, SDMMC2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
- LV_PINMUX(VI_D2_PL0, SDMMC2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
- LV_PINMUX(VI_D3_PL1, SDMMC2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
- LV_PINMUX(VI_D4_PL2, SDMMC2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
- LV_PINMUX(VI_D5_PL3, SDMMC2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
- LV_PINMUX(VI_D6_PL4, SDMMC2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
- LV_PINMUX(VI_D7_PL5, SDMMC2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
- LV_PINMUX(VI_D8_PL6, SDMMC2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
- LV_PINMUX(VI_D9_PL7, SDMMC2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
- LV_PINMUX(VI_D10_PT2, INVALID, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
- LV_PINMUX(VI_D11_PT3, INVALID, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
- LV_PINMUX(VI_PCLK_PT0, SDMMC2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
- LV_PINMUX(VI_MCLK_PT1, INVALID, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
- LV_PINMUX(VI_VSYNC_PD6, INVALID, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
- LV_PINMUX(VI_HSYNC_PD7, INVALID, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
-
- /* UART-2 pinmux */
- DEFAULT_PINMUX(UART2_RXD_PC3, SPI4, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(UART2_TXD_PC2, SPI4, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(UART2_RTS_N_PJ6, SPI4, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(UART2_CTS_N_PJ5, SPI4, NORMAL, NORMAL, INPUT),
-
- /* UART-3 pinmux */
- DEFAULT_PINMUX(UART3_TXD_PW6, UARTC, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(UART3_RXD_PW7, UARTC, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(UART3_CTS_N_PA1, UARTC, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(UART3_RTS_N_PC0, UARTC, NORMAL, NORMAL, OUTPUT),
-
- /* PU-gpio group pinmux */
- DEFAULT_PINMUX(PU0, RSVD4, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(PU1, RSVD4, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(PU2, RSVD4, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(PU3, RSVD4, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(PU4, RSVD4, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(PU5, RSVD4, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(PU6, PWM3, UP, TRISTATE, INPUT),
-
- /* DAP4 pinmux */
- DEFAULT_PINMUX(DAP4_FS_PP4, I2S3, DOWN, NORMAL, INPUT),
- DEFAULT_PINMUX(DAP4_DIN_PP5, I2S3, DOWN, NORMAL, INPUT),
- DEFAULT_PINMUX(DAP4_DOUT_PP6, RSVD4, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(DAP4_SCLK_PP7, RSVD4, NORMAL, NORMAL, OUTPUT),
-
- /* CLK3 pinmux */
- DEFAULT_PINMUX(CLK3_OUT_PEE0, EXTPERIPH3, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(CLK3_REQ_PEE1, RSVD4, NORMAL, TRISTATE, INPUT),
-
- /* GMI pinmux */
- DEFAULT_PINMUX(GMI_WP_N_PC7, RSVD1, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(GMI_IORDY_PI5, RSVD1, NORMAL, TRISTATE, INPUT),
- DEFAULT_PINMUX(GMI_WAIT_PI7, RSVD4, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(GMI_ADV_N_PK0, RSVD4, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(GMI_CLK_PK1, RSVD4, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(GMI_CS0_N_PJ0, GMI, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(GMI_CS1_N_PJ2, RSVD1, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(GMI_CS2_N_PK3, RSVD4, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(GMI_CS3_N_PK4, RSVD1, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(GMI_CS4_N_PK2, RSVD4, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(GMI_CS6_N_PI3, NAND, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(GMI_CS7_N_PI6, NAND, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(GMI_AD0_PG0, RSVD4, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(GMI_AD1_PG1, RSVD4, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(GMI_AD2_PG2, RSVD4, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(GMI_AD3_PG3, RSVD4, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(GMI_AD4_PG4, RSVD4, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(GMI_AD5_PG5, RSVD4, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(GMI_AD6_PG6, RSVD4, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(GMI_AD7_PG7, RSVD4, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(GMI_AD8_PH0, PWM0, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(GMI_AD9_PH1, RSVD4, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(GMI_AD10_PH2, NAND, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(GMI_AD11_PH3, RSVD4, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(GMI_AD12_PH4, RSVD4, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(GMI_AD13_PH5, RSVD4, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(GMI_AD14_PH6, RSVD4, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(GMI_AD15_PH7, NAND, UP, TRISTATE, INPUT),
- DEFAULT_PINMUX(GMI_A16_PJ7, UARTD, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(GMI_A17_PB0, UARTD, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(GMI_A18_PB1, UARTD, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(GMI_A19_PK7, UARTD, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(GMI_WR_N_PI0, RSVD4, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(GMI_OE_N_PI1, RSVD4, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(GMI_DQS_PI2, RSVD4, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(GMI_RST_N_PI4, RSVD4, UP, TRISTATE, INPUT),
-
- DEFAULT_PINMUX(CAM_MCLK_PCC0, VI_ALT3, NORMAL, NORMAL, INPUT),
-
- DEFAULT_PINMUX(PCC1, RSVD3, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(PBB0, RSVD3, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(PBB3, VGP3, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(PBB4, VGP4, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(PBB5, VGP5, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(PBB6, VGP6, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(PBB7, RSVD3, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(PCC2, RSVD3, UP, NORMAL, INPUT),
-
- DEFAULT_PINMUX(JTAG_RTCK_PU7, RTCK, UP, NORMAL, INPUT),
-
- /* KBC keys */
- DEFAULT_PINMUX(KB_ROW0_PR0, RSVD4, NORMAL, TRISTATE, INPUT),
- DEFAULT_PINMUX(KB_ROW1_PR1, KBC, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(KB_ROW2_PR2, RSVD4, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(KB_ROW3_PR3, RSVD3, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(KB_ROW4_PR4, RSVD4, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(KB_ROW5_PR5, KBC, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(KB_ROW6_PR6, KBC, NORMAL, TRISTATE, INPUT),
- DEFAULT_PINMUX(KB_ROW7_PR7, KBC, UP, TRISTATE, INPUT),
- DEFAULT_PINMUX(KB_ROW8_PS0, KBC, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(KB_ROW9_PS1, KBC, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(KB_ROW10_PS2, KBC, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(KB_ROW11_PS3, KBC, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(KB_ROW12_PS4, KBC, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(KB_ROW13_PS5, KBC, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(KB_ROW14_PS6, KBC, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(KB_ROW15_PS7, KBC, NORMAL, NORMAL, INPUT),
-
- DEFAULT_PINMUX(KB_COL0_PQ0, KBC, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(KB_COL1_PQ1, KBC, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(KB_COL2_PQ2, KBC, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(KB_COL3_PQ3, KBC, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(KB_COL4_PQ4, KBC, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(KB_COL5_PQ5, KBC, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(KB_COL6_PQ6, KBC, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(KB_COL7_PQ7, KBC, NORMAL, NORMAL, INPUT),
-
- /* CLK */
- DEFAULT_PINMUX(CLK_32K_OUT_PA0, BLINK, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(SYS_CLK_REQ_PZ5, SYSCLK, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(OWR, OWR, UP, NORMAL, INPUT),
-
- /* DAP1 pinmux */
- DEFAULT_PINMUX(DAP1_FS_PN0, I2S0, NORMAL, TRISTATE, OUTPUT),
- DEFAULT_PINMUX(DAP1_DIN_PN1, I2S0, NORMAL, TRISTATE, OUTPUT),
- DEFAULT_PINMUX(DAP1_DOUT_PN2, I2S0, NORMAL, TRISTATE, INPUT),
- DEFAULT_PINMUX(DAP1_SCLK_PN3, I2S0, NORMAL, TRISTATE, OUTPUT),
-
- /* CLK1 pinmux */
- DEFAULT_PINMUX(CLK1_REQ_PEE2, DAP, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(CLK1_OUT_PW4, RSVD4, NORMAL, NORMAL, INPUT),
-
- /* SPDIF pinmux */
- DEFAULT_PINMUX(SPDIF_IN_PK6, SPDIF, NORMAL, TRISTATE, INPUT),
- DEFAULT_PINMUX(SPDIF_OUT_PK5, SPDIF, NORMAL, TRISTATE, OUTPUT),
-
- /* DAP2 pinmux */
- DEFAULT_PINMUX(DAP2_FS_PA2, I2S1, DOWN, NORMAL, INPUT),
- DEFAULT_PINMUX(DAP2_DIN_PA4, I2S1, DOWN, NORMAL, INPUT),
- DEFAULT_PINMUX(DAP2_DOUT_PA5, I2S1, DOWN, NORMAL, INPUT),
- DEFAULT_PINMUX(DAP2_SCLK_PA3, I2S1, DOWN, NORMAL, INPUT),
-
- /* SPI pinmux */
- DEFAULT_PINMUX(SPI2_MOSI_PX0, SPI2, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(SPI2_MISO_PX1, SPI2, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(SPI2_CS0_N_PX3, SPI2, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(SPI2_SCK_PX2, SPI2, NORMAL, NORMAL, OUTPUT),
-
- DEFAULT_PINMUX(SPI2_CS1_N_PW2, SPI2, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(SPI2_CS2_N_PW3, SPI2, UP, TRISTATE, INPUT),
-
- DEFAULT_PINMUX(SPI1_MOSI_PX4, SPI1, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(SPI1_SCK_PX5, SPI2, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(SPI1_CS0_N_PX6, SPI1, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(SPI1_MISO_PX7, RSVD4, NORMAL, NORMAL, OUTPUT),
-
- /* PEX pinmux */
- DEFAULT_PINMUX(PEX_L0_PRSNT_N_PDD0, PCIE, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(PEX_L0_RST_N_PDD1, PCIE, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(PEX_L0_CLKREQ_N_PDD2, PCIE, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(PEX_WAKE_N_PDD3, PCIE, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(PEX_L1_PRSNT_N_PDD4, PCIE, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(PEX_L1_RST_N_PDD5, PCIE, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(PEX_L1_CLKREQ_N_PDD6, PCIE, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(PEX_L2_PRSNT_N_PDD7, PCIE, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(PEX_L2_RST_N_PCC6, PCIE, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(PEX_L2_CLKREQ_N_PCC7, PCIE, NORMAL, NORMAL, INPUT),
-};
-
-#endif /* _PINMUX_CONFIG_TRANSFORMER_H_ */
diff --git a/board/keymile/kmcent2/kmcent2.env b/board/keymile/kmcent2/kmcent2.env
index efa762e..dc5508e 100644
--- a/board/keymile/kmcent2/kmcent2.env
+++ b/board/keymile/kmcent2/kmcent2.env
@@ -21,7 +21,7 @@
erase CONFIG_SYS_MONITOR_BASE +${filesize} &&
cp.b ${load_addr_r} CONFIG_SYS_MONITOR_BASE ${filesize} &&
protect on CONFIG_SYS_MONITOR_BASE +${filesize}
- update-nor=protect off CONFIG_SYS_FLASH_BASE +${filesize} &&
+update-nor=protect off CONFIG_SYS_FLASH_BASE +${filesize} &&
erase CONFIG_SYS_FLASH_BASE +${filesize} &&
cp.b ${load_addr_r} CONFIG_SYS_FLASH_BASE ${filesize} &&
protect on CONFIG_SYS_MONITOR_BASE +CONFIG_SYS_MONITOR_LEN
diff --git a/board/lg/x3-t30/Kconfig b/board/lg/x3-t30/Kconfig
index 53d7760..53b6ab3 100644
--- a/board/lg/x3-t30/Kconfig
+++ b/board/lg/x3-t30/Kconfig
@@ -9,16 +9,4 @@
config SYS_CONFIG_NAME
default "x3-t30"
-config DEVICE_P880
- bool "Enable support for LG Optimus 4X HD"
- help
- LG Optimus 4X HD derives from x3 board but has slight
- differences.
-
-config DEVICE_P895
- bool "Enable support for LG Optimus Vu"
- help
- LG Optimus Vu derives from x3 board but has slight
- differences.
-
endif
diff --git a/board/lg/x3-t30/configs/p880.config b/board/lg/x3-t30/configs/p880.config
index 1a47b5f..57c2885 100644
--- a/board/lg/x3-t30/configs/p880.config
+++ b/board/lg/x3-t30/configs/p880.config
@@ -1,4 +1,3 @@
CONFIG_DEFAULT_DEVICE_TREE="tegra30-lg-p880"
-CONFIG_DEVICE_P880=y
CONFIG_SYS_PROMPT="Tegra30 (P880) # "
CONFIG_VIDEO_LCD_RENESAS_R69328=y
diff --git a/board/lg/x3-t30/configs/p895.config b/board/lg/x3-t30/configs/p895.config
index 019a566..2eba925 100644
--- a/board/lg/x3-t30/configs/p895.config
+++ b/board/lg/x3-t30/configs/p895.config
@@ -1,4 +1,3 @@
CONFIG_DEFAULT_DEVICE_TREE="tegra30-lg-p895"
-CONFIG_DEVICE_P895=y
CONFIG_SYS_PROMPT="Tegra30 (P895) # "
CONFIG_VIDEO_LCD_RENESAS_R61307=y
diff --git a/board/lg/x3-t30/pinmux-config-x3.h b/board/lg/x3-t30/pinmux-config-x3.h
deleted file mode 100644
index cdb2809..0000000
--- a/board/lg/x3-t30/pinmux-config-x3.h
+++ /dev/null
@@ -1,449 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * Copyright (c) 2010-2013, NVIDIA CORPORATION. All rights reserved.
- *
- * Copyright (c) 2021, Svyatoslav Ryhel.
- */
-
-#ifndef _PINMUX_CONFIG_X3_H_
-#define _PINMUX_CONFIG_X3_H_
-
-#define DEFAULT_PINMUX(_pingrp, _mux, _pull, _tri, _io) \
- { \
- .pingrp = PMUX_PINGRP_##_pingrp, \
- .func = PMUX_FUNC_##_mux, \
- .pull = PMUX_PULL_##_pull, \
- .tristate = PMUX_TRI_##_tri, \
- .io = PMUX_PIN_##_io, \
- .lock = PMUX_PIN_LOCK_DEFAULT, \
- .od = PMUX_PIN_OD_DEFAULT, \
- .ioreset = PMUX_PIN_IO_RESET_DEFAULT, \
- }
-
-#define I2C_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _od) \
- { \
- .pingrp = PMUX_PINGRP_##_pingrp, \
- .func = PMUX_FUNC_##_mux, \
- .pull = PMUX_PULL_##_pull, \
- .tristate = PMUX_TRI_##_tri, \
- .io = PMUX_PIN_##_io, \
- .lock = PMUX_PIN_LOCK_##_lock, \
- .od = PMUX_PIN_OD_##_od, \
- .ioreset = PMUX_PIN_IO_RESET_DEFAULT, \
- }
-
-#define LV_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _ioreset) \
- { \
- .pingrp = PMUX_PINGRP_##_pingrp, \
- .func = PMUX_FUNC_##_mux, \
- .pull = PMUX_PULL_##_pull, \
- .tristate = PMUX_TRI_##_tri, \
- .io = PMUX_PIN_##_io, \
- .lock = PMUX_PIN_LOCK_##_lock, \
- .od = PMUX_PIN_OD_DEFAULT, \
- .ioreset = PMUX_PIN_IO_RESET_##_ioreset \
- }
-
-static struct pmux_pingrp_config tegra3_x3_pinmux_common[] = {
- /* SDMMC1 pinmux */
- DEFAULT_PINMUX(SDMMC1_CLK_PZ0, SDMMC1, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(SDMMC1_CMD_PZ1, SDMMC1, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(SDMMC1_DAT3_PY4, SDMMC1, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(SDMMC1_DAT2_PY5, SDMMC1, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(SDMMC1_DAT1_PY6, SDMMC1, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(SDMMC1_DAT0_PY7, SDMMC1, UP, NORMAL, INPUT),
-
- /* SDMMC3 pinmux */
-// DEFAULT_PINMUX(SDMMC3_CLK_PA6, SDMMC3, NORMAL, TRISTATE, INPUT), // device specific
-// DEFAULT_PINMUX(SDMMC3_CMD_PA7, SDMMC3, NORMAL, TRISTATE, INPUT), // device specific
-// DEFAULT_PINMUX(SDMMC3_DAT0_PB7, RSVD1, NORMAL, TRISTATE, INPUT), // device specific
-// DEFAULT_PINMUX(SDMMC3_DAT1_PB6, RSVD1, NORMAL, NORMAL, INPUT), // device specific
-// DEFAULT_PINMUX(SDMMC3_DAT2_PB5, RSVD1, NORMAL, TRISTATE, INPUT), // device specific
-// DEFAULT_PINMUX(SDMMC3_DAT3_PB4, RSVD1, NORMAL, TRISTATE, INPUT), // device specific
-// DEFAULT_PINMUX(SDMMC3_DAT4_PD1, SDMMC3, NORMAL, TRISTATE, INPUT), // device specific
-// DEFAULT_PINMUX(SDMMC3_DAT5_PD0, SDMMC3, NORMAL, TRISTATE, INPUT), // device specific
-// DEFAULT_PINMUX(SDMMC3_DAT6_PD3, SDMMC3, NORMAL, TRISTATE, INPUT), // device specific
-// DEFAULT_PINMUX(SDMMC3_DAT7_PD4, RSVD2, NORMAL, TRISTATE, INPUT), // device specific
-
- /* SDMMC4 pinmux */
- LV_PINMUX(SDMMC4_CLK_PCC4, SDMMC4, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
-// LV_PINMUX(SDMMC4_CMD_PT7, SDMMC4, NORMAL, NORMAL, INPUT, DISABLE, DISABLE), // device specific
- LV_PINMUX(SDMMC4_DAT0_PAA0, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
- LV_PINMUX(SDMMC4_DAT1_PAA1, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
- LV_PINMUX(SDMMC4_DAT2_PAA2, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
- LV_PINMUX(SDMMC4_DAT3_PAA3, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
- LV_PINMUX(SDMMC4_DAT4_PAA4, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
- LV_PINMUX(SDMMC4_DAT5_PAA5, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
- LV_PINMUX(SDMMC4_DAT6_PAA6, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
- LV_PINMUX(SDMMC4_DAT7_PAA7, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
- LV_PINMUX(SDMMC4_RST_N_PCC3, RSVD2, DOWN, NORMAL, INPUT, DISABLE, DISABLE),
-
- /* I2C1 pinmux */
- I2C_PINMUX(GEN1_I2C_SCL_PC4, I2C1, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
- I2C_PINMUX(GEN1_I2C_SDA_PC5, I2C1, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
-
- /* I2C2 pinmux */
- I2C_PINMUX(GEN2_I2C_SCL_PT5, I2C2, UP, NORMAL, INPUT, DISABLE, ENABLE),
- I2C_PINMUX(GEN2_I2C_SDA_PT6, I2C2, UP, NORMAL, INPUT, DISABLE, ENABLE),
-
- /* I2C3 pinmux */
- I2C_PINMUX(CAM_I2C_SCL_PBB1, I2C3, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
- I2C_PINMUX(CAM_I2C_SDA_PBB2, I2C3, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
-
- /* I2C4 pinmux */
- I2C_PINMUX(DDC_SCL_PV4, I2C4, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
- I2C_PINMUX(DDC_SDA_PV5, I2C4, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
-
- /* Power I2C pinmux */
- I2C_PINMUX(PWR_I2C_SCL_PZ6, I2CPWR, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
- I2C_PINMUX(PWR_I2C_SDA_PZ7, I2CPWR, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
-
- /* HDMI-CEC pinmux */
- DEFAULT_PINMUX(HDMI_CEC_PEE3, CEC, NORMAL, TRISTATE, OUTPUT),
- DEFAULT_PINMUX(HDMI_INT_PN7, RSVD1, NORMAL, TRISTATE, INPUT),
-
- /* ULPI pinmux */
- DEFAULT_PINMUX(ULPI_DATA0_PO1, SPI3, UP, TRISTATE, OUTPUT),
- DEFAULT_PINMUX(ULPI_DATA1_PO2, SPI3, UP, NORMAL, OUTPUT), // LCD_BRIDGE_RESET_N
- DEFAULT_PINMUX(ULPI_DATA2_PO3, SPI3, UP, TRISTATE, INPUT),
- DEFAULT_PINMUX(ULPI_DATA3_PO4, SPI3, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(ULPI_DATA4_PO5, ULPI, UP, NORMAL, INPUT),
-// DEFAULT_PINMUX(ULPI_DATA5_PO6, SPI2, UP, TRISTATE, INPUT), // unconfigured
-// DEFAULT_PINMUX(ULPI_DATA6_PO7, SPI2, UP, NORMAL, INPUT), // device specific
-// DEFAULT_PINMUX(ULPI_DATA7_PO0, SPI2, UP, NORMAL, INPUT), // unconfigured
- DEFAULT_PINMUX(ULPI_CLK_PY0, RSVD2, DOWN, NORMAL, OUTPUT), // LCD_EN
- DEFAULT_PINMUX(ULPI_DIR_PY1, RSVD2, UP, NORMAL, OUTPUT),
- DEFAULT_PINMUX(ULPI_NXT_PY2, RSVD2, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(ULPI_STP_PY3, SPI1, NORMAL, NORMAL, OUTPUT),
-
- /* DAP3 pinmux */
- DEFAULT_PINMUX(DAP3_FS_PP0, I2S2, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(DAP3_DIN_PP1, I2S2, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(DAP3_DOUT_PP2, I2S2, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(DAP3_SCLK_PP3, I2S2, NORMAL, NORMAL, INPUT),
-
- DEFAULT_PINMUX(PV0, RSVD1, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(PV1, RSVD1, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(PV2, OWR, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(PV3, RSVD2, DOWN, NORMAL, INPUT),
-
- /* CLK2 pinmux */
- DEFAULT_PINMUX(CLK2_OUT_PW5, RSVD2, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(CLK2_REQ_PCC5, DAP, NORMAL, NORMAL, OUTPUT),
-
- /* LCD pinmux */
- DEFAULT_PINMUX(LCD_PWR1_PC1, DISPLAYA, NORMAL, NORMAL, OUTPUT),
-// DEFAULT_PINMUX(LCD_PWR2_PC6, DISPLAYA, DOWN, TRISTATE, OUTPUT), // unconfigured
- DEFAULT_PINMUX(LCD_SDIN_PZ2, SPI5, NORMAL, NORMAL, INPUT), // LCD_RGB_SDI
- DEFAULT_PINMUX(LCD_SDOUT_PN5, SPI5, NORMAL, NORMAL, INPUT), // LCD_RGB_SDO
- DEFAULT_PINMUX(LCD_WR_N_PZ3, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_CS0_N_PN4, SPI5, NORMAL, NORMAL, INPUT), // LCD_RGB_CS
- DEFAULT_PINMUX(LCD_DC0_PN6, RSVD3, NORMAL, NORMAL, OUTPUT), // LCD_CP_EN / BL
- DEFAULT_PINMUX(LCD_SCK_PZ4, SPI5, NORMAL, NORMAL, INPUT), // LCD_RGB_SCL
- DEFAULT_PINMUX(LCD_PWR0_PB2, DISPLAYA, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(LCD_PCLK_PB3, DISPLAYA, NORMAL, NORMAL, INPUT), // LCD_RGB_PCLK
- DEFAULT_PINMUX(LCD_DE_PJ1, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_HSYNC_PJ3, DISPLAYA, NORMAL, NORMAL, INPUT), // LCD_RGB_HSYNC
- DEFAULT_PINMUX(LCD_VSYNC_PJ4, DISPLAYA, NORMAL, NORMAL, INPUT), // LCD_RGB_VSYNC
- DEFAULT_PINMUX(LCD_D0_PE0, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D1_PE1, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D2_PE2, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D3_PE3, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D4_PE4, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D5_PE5, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D6_PE6, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D7_PE7, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D8_PF0, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D9_PF1, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D10_PF2, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D11_PF3, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D12_PF4, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D13_PF5, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D14_PF6, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D15_PF7, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D16_PM0, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D17_PM1, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D18_PM2, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D19_PM3, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D20_PM4, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D21_PM5, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D22_PM6, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_D23_PM7, DISPLAYA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(LCD_CS1_N_PW0, RSVD4, UP, NORMAL, OUTPUT), // LCD_RESET_N
- DEFAULT_PINMUX(LCD_M1_PW1, DISPLAYA, NORMAL, TRISTATE, OUTPUT), // LCD_MAKER_ID
- DEFAULT_PINMUX(LCD_DC1_PD2, RSVD3, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(CRT_HSYNC_PV6, RSVD2, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(CRT_VSYNC_PV7, RSVD2, NORMAL, NORMAL, INPUT),
-
- /* VI-group pinmux */
- LV_PINMUX(VI_D0_PT4, RSVD2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
- LV_PINMUX(VI_D1_PD5, SDMMC2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
- LV_PINMUX(VI_D2_PL0, SDMMC2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
- LV_PINMUX(VI_D3_PL1, SDMMC2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
- LV_PINMUX(VI_D4_PL2, VI, NORMAL, NORMAL, OUTPUT, DISABLE, DISABLE),
- LV_PINMUX(VI_D5_PL3, SDMMC2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
- LV_PINMUX(VI_D6_PL4, VI, NORMAL, NORMAL, OUTPUT, DISABLE, DISABLE),
- LV_PINMUX(VI_D7_PL5, SDMMC2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
- LV_PINMUX(VI_D8_PL6, SDMMC2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
- LV_PINMUX(VI_D9_PL7, SDMMC2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
- LV_PINMUX(VI_D10_PT2, RSVD2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
- LV_PINMUX(VI_D11_PT3, RSVD2, UP, NORMAL, INPUT, DISABLE, DISABLE),
- LV_PINMUX(VI_PCLK_PT0, RSVD1, UP, TRISTATE, INPUT, DISABLE, DISABLE),
- LV_PINMUX(VI_MCLK_PT1, VI, UP, NORMAL, INPUT, DISABLE, DISABLE),
- LV_PINMUX(VI_HSYNC_PD7, RSVD2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
- LV_PINMUX(VI_VSYNC_PD6, RSVD2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
-
- /* UART-B pinmux */
-// DEFAULT_PINMUX(UART2_RXD_PC3, UARTB, NORMAL, NORMAL, INPUT), // device specific
-// DEFAULT_PINMUX(UART2_TXD_PC2, UARTB, NORMAL, NORMAL, OUTPUT), // device specific
- DEFAULT_PINMUX(UART2_RTS_N_PJ6, UARTB, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(UART2_CTS_N_PJ5, UARTB, NORMAL, NORMAL, INPUT),
-
- /* UART-C pinmux */
- DEFAULT_PINMUX(UART3_TXD_PW6, UARTC, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(UART3_RXD_PW7, UARTC, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(UART3_CTS_N_PA1, UARTC, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(UART3_RTS_N_PC0, UARTC, NORMAL, NORMAL, OUTPUT),
-
- /* PU-gpio group pinmux */
-// DEFAULT_PINMUX(PU0, UARTA, NORMAL, NORMAL, OUTPUT), // device specific
-// DEFAULT_PINMUX(PU1, UARTA, NORMAL, NORMAL, INPUT), // device specific
-// DEFAULT_PINMUX(PU2, RSVD1, NORMAL, TRISTATE, INPUT), // device specific
-// DEFAULT_PINMUX(PU3, PWM0, NORMAL, TRISTATE, INPUT), // device specific
-// DEFAULT_PINMUX(PU4, PWM1, NORMAL, TRISTATE, INPUT), // device specific
- DEFAULT_PINMUX(PU5, RSVD4, DOWN, NORMAL, OUTPUT),
- DEFAULT_PINMUX(PU6, PWM3, DOWN, NORMAL, INPUT),
-
- /* DAP4 pinmux */
- DEFAULT_PINMUX(DAP4_FS_PP4, I2S3, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(DAP4_DIN_PP5, I2S3, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(DAP4_DOUT_PP6, I2S3, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(DAP4_SCLK_PP7, I2S3, NORMAL, NORMAL, INPUT),
-
- /* CLK3 pinmux */
- DEFAULT_PINMUX(CLK3_OUT_PEE0, EXTPERIPH3, NORMAL, NORMAL, OUTPUT), // MIPI_BRIDGE_CLK
- DEFAULT_PINMUX(CLK3_REQ_PEE1, DEV3, NORMAL, NORMAL, INPUT),
-
- DEFAULT_PINMUX(CAM_MCLK_PCC0, VI_ALT2, UP, NORMAL, INPUT),
-
- DEFAULT_PINMUX(PCC1, RSVD3, NORMAL, NORMAL, OUTPUT),
-// DEFAULT_PINMUX(PBB0, RSVD2, NORMAL, NORMAL, OUTPUT), // device specific
- DEFAULT_PINMUX(PBB3, VGP3, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(PBB4, VGP4, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(PBB5, VGP5, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(PBB6, VGP6, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(PBB7, I2S4, NORMAL, TRISTATE, INPUT),
- DEFAULT_PINMUX(PCC2, RSVD3, NORMAL, NORMAL, OUTPUT),
-
- DEFAULT_PINMUX(JTAG_RTCK_PU7, RTCK, NORMAL, NORMAL, OUTPUT),
-
- /* KBC keys */
- DEFAULT_PINMUX(KB_ROW0_PR0, RSVD4, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(KB_ROW1_PR1, KBC, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(KB_ROW2_PR2, RSVD4, DOWN, NORMAL, OUTPUT),
- DEFAULT_PINMUX(KB_ROW3_PR3, RSVD3, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(KB_ROW4_PR4, RSVD4, DOWN, NORMAL, OUTPUT),
- DEFAULT_PINMUX(KB_ROW5_PR5, KBC, DOWN, NORMAL, INPUT),
- DEFAULT_PINMUX(KB_ROW6_PR6, KBC, DOWN, NORMAL, INPUT),
- DEFAULT_PINMUX(KB_ROW7_PR7, KBC, DOWN, NORMAL, INPUT),
- DEFAULT_PINMUX(KB_ROW8_PS0, KBC, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(KB_ROW9_PS1, KBC, DOWN, NORMAL, INPUT),
- DEFAULT_PINMUX(KB_ROW10_PS2, KBC, DOWN, NORMAL, INPUT),
- DEFAULT_PINMUX(KB_ROW11_PS3, KBC, DOWN, NORMAL, OUTPUT),
- DEFAULT_PINMUX(KB_ROW12_PS4, KBC, DOWN, NORMAL, INPUT),
- DEFAULT_PINMUX(KB_ROW13_PS5, KBC, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(KB_ROW14_PS6, KBC, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(KB_ROW15_PS7, KBC, DOWN, NORMAL, INPUT),
-
- DEFAULT_PINMUX(KB_COL0_PQ0, KBC, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(KB_COL1_PQ1, KBC, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(KB_COL2_PQ2, KBC, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(KB_COL3_PQ3, KBC, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(KB_COL4_PQ4, KBC, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(KB_COL5_PQ5, KBC, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(KB_COL6_PQ6, KBC, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(KB_COL7_PQ7, KBC, UP, NORMAL, INPUT),
-
- /* CLK */
- DEFAULT_PINMUX(CLK_32K_OUT_PA0, BLINK, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(SYS_CLK_REQ_PZ5, SYSCLK, NORMAL, NORMAL, INPUT),
-// DEFAULT_PINMUX(CORE_PWR_REQ, RSVD1, NORMAL, NORMAL, INPUT), // unconfigured
-// DEFAULT_PINMUX(CPU_PWR_REQ, RSVD1, NORMAL, NORMAL, INPUT), // unconfigured
-// DEFAULT_PINMUX(PWR_INT_N, RSVD1, NORMAL, NORMAL, INPUT), // unconfigured
-// DEFAULT_PINMUX(CLK_32K_IN, RSVD1, NORMAL, NORMAL, INPUT), // unconfigured
- DEFAULT_PINMUX(OWR, OWR, NORMAL, NORMAL, INPUT),
-
- /* DAP1 pinmux */
- DEFAULT_PINMUX(DAP1_FS_PN0, I2S0, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(DAP1_DIN_PN1, I2S0, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(DAP1_DOUT_PN2, I2S0, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(DAP1_SCLK_PN3, I2S0, NORMAL, NORMAL, INPUT),
-
- /* CLK1 pinmux */
- DEFAULT_PINMUX(CLK1_REQ_PEE2, DAP, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(CLK1_OUT_PW4, EXTPERIPH1, DOWN, NORMAL, INPUT),
-
- /* SPDIF pinmux */
- DEFAULT_PINMUX(SPDIF_IN_PK6, SPDIF, NORMAL, NORMAL, OUTPUT),
-// DEFAULT_PINMUX(SPDIF_OUT_PK5, SPDIF, DOWN, NORMAL, OUTPUT), // device specific
-
- /* DAP2 pinmux */
- DEFAULT_PINMUX(DAP2_FS_PA2, HDA, DOWN, NORMAL, INPUT),
- DEFAULT_PINMUX(DAP2_DIN_PA4, HDA, DOWN, NORMAL, INPUT),
- DEFAULT_PINMUX(DAP2_DOUT_PA5, HDA, DOWN, NORMAL, INPUT),
- DEFAULT_PINMUX(DAP2_SCLK_PA3, HDA, DOWN, NORMAL, INPUT),
-
- /* SPI pinmux */
- DEFAULT_PINMUX(SPI1_MOSI_PX4, SPI2, NORMAL, NORMAL, OUTPUT),
-// DEFAULT_PINMUX(SPI1_SCK_PX5, SPI1, NORMAL, NORMAL, OUTPUT), // device specific
-// DEFAULT_PINMUX(SPI1_CS0_N_PX6, GMI, NORMAL, NORMAL, INPUT), // device specific
- DEFAULT_PINMUX(SPI1_MISO_PX7, RSVD4, NORMAL, NORMAL, OUTPUT),
-
- DEFAULT_PINMUX(SPI2_MOSI_PX0, SPI2, DOWN, NORMAL, OUTPUT),
- DEFAULT_PINMUX(SPI2_MISO_PX1, GMI, NORMAL, NORMAL, OUTPUT),
-// DEFAULT_PINMUX(SPI2_CS0_N_PX3, SPI6, UP, NORMAL, INPUT), // unconfigured
-// DEFAULT_PINMUX(SPI2_SCK_PX2, SPI6, UP, NORMAL, INPUT), // unconfigured
- DEFAULT_PINMUX(SPI2_CS1_N_PW2, SPI2, NORMAL, NORMAL, INPUT),
-// DEFAULT_PINMUX(SPI2_CS2_N_PW3, SPI2, UP, TRISTATE, INPUT), // unconfigured
-
- /* PEX pinmux */
- DEFAULT_PINMUX(PEX_L0_PRSNT_N_PDD0, PCIE, NORMAL, TRISTATE, INPUT),
- DEFAULT_PINMUX(PEX_L0_RST_N_PDD1, PCIE, NORMAL, TRISTATE, OUTPUT),
- DEFAULT_PINMUX(PEX_L0_CLKREQ_N_PDD2, PCIE, NORMAL, TRISTATE, INPUT),
- DEFAULT_PINMUX(PEX_WAKE_N_PDD3, PCIE, NORMAL, TRISTATE, INPUT),
- DEFAULT_PINMUX(PEX_L1_PRSNT_N_PDD4, PCIE, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(PEX_L1_RST_N_PDD5, PCIE, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(PEX_L1_CLKREQ_N_PDD6, PCIE, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(PEX_L2_PRSNT_N_PDD7, PCIE, NORMAL, TRISTATE, INPUT),
- DEFAULT_PINMUX(PEX_L2_RST_N_PCC6, PCIE, NORMAL, TRISTATE, INPUT),
- DEFAULT_PINMUX(PEX_L2_CLKREQ_N_PCC7, PCIE, NORMAL, TRISTATE, INPUT),
-
- /* GMI pinmux */
- DEFAULT_PINMUX(GMI_WP_N_PC7, GMI, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(GMI_IORDY_PI5, RSVD1, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(GMI_WAIT_PI7, GMI, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(GMI_ADV_N_PK0, GMI, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(GMI_CLK_PK1, GMI, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(GMI_CS0_N_PJ0, GMI, UP, TRISTATE, INPUT), // LCD_RGB_DE
- DEFAULT_PINMUX(GMI_CS1_N_PJ2, RSVD1, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(GMI_CS2_N_PK3, RSVD1, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(GMI_CS3_N_PK4, RSVD1, NORMAL, NORMAL, OUTPUT),
-// DEFAULT_PINMUX(GMI_CS4_N_PK2, RSVD4, UP, NORMAL, INPUT), // device specific
- DEFAULT_PINMUX(GMI_CS6_N_PI3, GMI, UP, NORMAL, INPUT),
-// DEFAULT_PINMUX(GMI_CS7_N_PI6, GMI, UP, NORMAL, INPUT), // device specific
- DEFAULT_PINMUX(GMI_AD0_PG0, GMI, NORMAL, TRISTATE, INPUT),
- DEFAULT_PINMUX(GMI_AD1_PG1, GMI, NORMAL, TRISTATE, INPUT),
- DEFAULT_PINMUX(GMI_AD2_PG2, GMI, NORMAL, TRISTATE, INPUT),
- DEFAULT_PINMUX(GMI_AD3_PG3, GMI, NORMAL, TRISTATE, INPUT),
- DEFAULT_PINMUX(GMI_AD4_PG4, GMI, NORMAL, TRISTATE, INPUT),
- DEFAULT_PINMUX(GMI_AD5_PG5, GMI, NORMAL, TRISTATE, INPUT),
- DEFAULT_PINMUX(GMI_AD6_PG6, GMI, NORMAL, TRISTATE, INPUT),
- DEFAULT_PINMUX(GMI_AD7_PG7, GMI, NORMAL, TRISTATE, INPUT),
- DEFAULT_PINMUX(GMI_AD8_PH0, GMI, DOWN, NORMAL, INPUT),
- DEFAULT_PINMUX(GMI_AD9_PH1, GMI, DOWN, NORMAL, INPUT),
- DEFAULT_PINMUX(GMI_AD10_PH2, GMI, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(GMI_AD11_PH3, PWM3, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(GMI_AD12_PH4, RSVD4, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(GMI_AD13_PH5, RSVD4, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(GMI_AD14_PH6, GMI, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(GMI_AD15_PH7, GMI, NORMAL, TRISTATE, INPUT),
- DEFAULT_PINMUX(GMI_A16_PJ7, UARTD, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(GMI_A17_PB0, UARTD, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(GMI_A18_PB1, UARTD, DOWN, NORMAL, OUTPUT), // RGB_IC_EN
- DEFAULT_PINMUX(GMI_A19_PK7, UARTD, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(GMI_WR_N_PI0, GMI, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(GMI_OE_N_PI1, RSVD1, NORMAL, TRISTATE, INPUT),
- DEFAULT_PINMUX(GMI_DQS_PI2, GMI, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(GMI_RST_N_PI4, GMI, UP, NORMAL, INPUT),
-};
-
-#ifdef CONFIG_DEVICE_P880
-static struct pmux_pingrp_config tegra3_p880_pinmux[] = {
- /* SDMMC3 pinmux */
- DEFAULT_PINMUX(SDMMC3_CLK_PA6, SDMMC3, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(SDMMC3_CMD_PA7, SDMMC3, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(SDMMC3_DAT0_PB7, SDMMC3, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(SDMMC3_DAT1_PB6, SDMMC3, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(SDMMC3_DAT2_PB5, SDMMC3, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(SDMMC3_DAT3_PB4, SDMMC3, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(SDMMC3_DAT4_PD1, SDMMC3, UP, TRISTATE, INPUT),
- DEFAULT_PINMUX(SDMMC3_DAT5_PD0, SDMMC3, UP, TRISTATE, INPUT),
- DEFAULT_PINMUX(SDMMC3_DAT6_PD3, SDMMC3, UP, TRISTATE, INPUT),
- DEFAULT_PINMUX(SDMMC3_DAT7_PD4, SDMMC3, UP, TRISTATE, INPUT),
-
- /* SDMMC4 pinmux */
- LV_PINMUX(SDMMC4_CMD_PT7, SDMMC4, UP, NORMAL, INPUT, DISABLE, DISABLE),
-
- /* ULPI pinmux */
- DEFAULT_PINMUX(ULPI_DATA6_PO7, SPI2, NORMAL, NORMAL, INPUT),
-
- /* UART-B pinmux */
- DEFAULT_PINMUX(UART2_RXD_PC3, UARTB, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(UART2_TXD_PC2, UARTB, UP, NORMAL, OUTPUT),
-
- /* GPIO group pinmux */
- DEFAULT_PINMUX(PU0, UARTA, UP, NORMAL, OUTPUT),
- DEFAULT_PINMUX(PU1, UARTA, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(PU2, UARTA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(PU3, UARTA, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(PU4, PWM1, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(PBB0, I2S4, NORMAL, TRISTATE, INPUT),
-
- /* SPDIF pinmux */
- DEFAULT_PINMUX(SPDIF_OUT_PK5, SPDIF, UP, TRISTATE, OUTPUT),
-
- /* SPI pinmux */
- DEFAULT_PINMUX(SPI1_SCK_PX5, SPI2, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(SPI1_CS0_N_PX6, SPI1, NORMAL, NORMAL, INPUT),
-
- /* GMI pinmux */
- DEFAULT_PINMUX(GMI_CS4_N_PK2, RSVD1, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(GMI_CS7_N_PI6, GMI, DOWN, NORMAL, OUTPUT),
-};
-#endif /* CONFIG_DEVICE_P880 */
-
-#ifdef CONFIG_DEVICE_P895
-static struct pmux_pingrp_config tegra3_p895_pinmux[] = {
- /* SDMMC3 pinmux */
- DEFAULT_PINMUX(SDMMC3_CLK_PA6, SDMMC3, NORMAL, TRISTATE, INPUT),
- DEFAULT_PINMUX(SDMMC3_CMD_PA7, SDMMC3, NORMAL, TRISTATE, INPUT),
- DEFAULT_PINMUX(SDMMC3_DAT0_PB7, RSVD1, NORMAL, TRISTATE, INPUT),
- DEFAULT_PINMUX(SDMMC3_DAT1_PB6, RSVD1, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(SDMMC3_DAT2_PB5, RSVD1, NORMAL, TRISTATE, INPUT),
- DEFAULT_PINMUX(SDMMC3_DAT3_PB4, RSVD1, NORMAL, TRISTATE, INPUT),
- DEFAULT_PINMUX(SDMMC3_DAT4_PD1, SDMMC3, NORMAL, TRISTATE, INPUT),
- DEFAULT_PINMUX(SDMMC3_DAT5_PD0, SDMMC3, NORMAL, TRISTATE, INPUT),
- DEFAULT_PINMUX(SDMMC3_DAT6_PD3, SDMMC3, NORMAL, TRISTATE, INPUT),
- DEFAULT_PINMUX(SDMMC3_DAT7_PD4, RSVD2, NORMAL, TRISTATE, INPUT),
-
- /* SDMMC4 pinmux */
- LV_PINMUX(SDMMC4_CMD_PT7, SDMMC4, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
-
- /* ULPI pinmux */
- DEFAULT_PINMUX(ULPI_DATA6_PO7, SPI2, UP, NORMAL, INPUT),
-
- /* UART-B pinmux */
- DEFAULT_PINMUX(UART2_RXD_PC3, UARTB, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(UART2_TXD_PC2, UARTB, NORMAL, NORMAL, OUTPUT),
-
- /* Gpio group pinmux */
- DEFAULT_PINMUX(PU0, UARTA, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(PU1, UARTA, NORMAL, NORMAL, INPUT),
- DEFAULT_PINMUX(PU2, RSVD1, NORMAL, TRISTATE, INPUT),
- DEFAULT_PINMUX(PU3, PWM0, NORMAL, TRISTATE, INPUT),
- DEFAULT_PINMUX(PU4, PWM1, NORMAL, TRISTATE, INPUT),
- DEFAULT_PINMUX(PBB0, RSVD2, NORMAL, NORMAL, OUTPUT), // LCD_EN_3V0
-
- /* SPDIF pinmux */
- DEFAULT_PINMUX(SPDIF_OUT_PK5, SPDIF, DOWN, NORMAL, OUTPUT),
-
- /* SPI pinmux */
- DEFAULT_PINMUX(SPI1_SCK_PX5, SPI1, NORMAL, NORMAL, OUTPUT),
- DEFAULT_PINMUX(SPI1_CS0_N_PX6, GMI, NORMAL, NORMAL, INPUT),
-
- /* GMI pinmux */
- DEFAULT_PINMUX(GMI_CS4_N_PK2, RSVD4, UP, NORMAL, INPUT),
- DEFAULT_PINMUX(GMI_CS7_N_PI6, GMI, UP, NORMAL, INPUT),
-};
-#endif /* CONFIG_DEVICE_P895 */
-#endif /* _PINMUX_CONFIG_X3_H_ */
diff --git a/board/lg/x3-t30/x3-t30-spl.c b/board/lg/x3-t30/x3-t30-spl.c
index 864f2de..00f79dd 100644
--- a/board/lg/x3-t30/x3-t30-spl.c
+++ b/board/lg/x3-t30/x3-t30-spl.c
@@ -9,7 +9,7 @@
* Svyatoslav Ryhel <clamor95@gmail.com>
*/
-#include <common.h>
+#include <asm/arch/tegra.h>
#include <asm/arch-tegra/tegra_i2c.h>
#include <linux/delay.h>
diff --git a/board/lg/x3-t30/x3-t30.c b/board/lg/x3-t30/x3-t30.c
index a08e00d..b781a16 100644
--- a/board/lg/x3-t30/x3-t30.c
+++ b/board/lg/x3-t30/x3-t30.c
@@ -7,124 +7,10 @@
* Svyatoslav Ryhel <clamor95@gmail.com>
*/
-#include <common.h>
#include <dm.h>
#include <fdt_support.h>
-#include <i2c.h>
-#include <log.h>
-#include <asm/arch/pinmux.h>
#include <asm/arch/clock.h>
-#include <asm/arch/gpio.h>
-#include <asm/arch/tegra.h>
#include <asm/arch-tegra/fuse.h>
-#include <asm/gpio.h>
-#include <linux/delay.h>
-#include "pinmux-config-x3.h"
-
-#define MAX77663_I2C_ADDR 0x1C
-
-#define MAX77663_REG_SD2 0x18
-#define MAX77663_REG_LDO2 0x27
-#define MAX77663_REG_LDO3 0x29
-#define MAX77663_REG_LDO5 0x2D
-#define MAX77663_REG_ONOFF_CFG1 0x41
-#define ONOFF_PWR_OFF BIT(1)
-
-#ifdef CONFIG_CMD_POWEROFF
-int do_poweroff(struct cmd_tbl *cmdtp, int flag,
- int argc, char *const argv[])
-{
- struct udevice *dev;
- uchar data_buffer[1];
- int ret;
-
- ret = i2c_get_chip_for_busnum(0, MAX77663_I2C_ADDR, 1, &dev);
- if (ret) {
- log_debug("cannot find PMIC I2C chip\n");
- return 0;
- }
-
- ret = dm_i2c_read(dev, MAX77663_REG_ONOFF_CFG1, data_buffer, 1);
- if (ret)
- return ret;
-
- data_buffer[0] |= ONOFF_PWR_OFF;
-
- ret = dm_i2c_write(dev, MAX77663_REG_ONOFF_CFG1, data_buffer, 1);
- if (ret)
- return ret;
-
- /* wait some time and then print error */
- mdelay(5000);
-
- printf("Failed to power off!!!\n");
- return 1;
-}
-#endif
-
-/*
- * Routine: pinmux_init
- * Description: Do individual peripheral pinmux configs
- */
-void pinmux_init(void)
-{
- pinmux_config_pingrp_table(tegra3_x3_pinmux_common,
- ARRAY_SIZE(tegra3_x3_pinmux_common));
-
-#ifdef CONFIG_DEVICE_P880
- pinmux_config_pingrp_table(tegra3_p880_pinmux,
- ARRAY_SIZE(tegra3_p880_pinmux));
-#endif
-
-#ifdef CONFIG_DEVICE_P895
- pinmux_config_pingrp_table(tegra3_p895_pinmux,
- ARRAY_SIZE(tegra3_p895_pinmux));
-#endif
-}
-
-#ifdef CONFIG_MMC_SDHCI_TEGRA
-static void max77663_voltage_init(void)
-{
- struct udevice *dev;
- int ret;
-
- ret = i2c_get_chip_for_busnum(0, MAX77663_I2C_ADDR, 1, &dev);
- if (ret) {
- log_debug("cannot find PMIC I2C chip\n");
- return;
- }
-
- /* 0x60 for 1.8v, bit7:0 = voltage */
- ret = dm_i2c_reg_write(dev, MAX77663_REG_SD2, 0x60);
- if (ret)
- log_debug("vdd_1v8_vio set failed: %d\n", ret);
-
- /* 0xF2 for 3.30v, enabled: bit7:6 = 11 = enable, bit5:0 = voltage */
- ret = dm_i2c_reg_write(dev, MAX77663_REG_LDO2, 0xF2);
- if (ret)
- log_debug("avdd_usb set failed: %d\n", ret);
-
- /* 0xEC for 3.00v, enabled: bit7:6 = 11 = enable, bit5:0 = voltage */
- ret = dm_i2c_reg_write(dev, MAX77663_REG_LDO3, 0xEC);
- if (ret)
- log_debug("vdd_usd set failed: %d\n", ret);
-
- /* 0xE9 for 2.85v, enabled: bit7:6 = 11 = enable, bit5:0 = voltage */
- ret = dm_i2c_reg_write(dev, MAX77663_REG_LDO5, 0xE9);
- if (ret)
- log_debug("vcore_emmc set failed: %d\n", ret);
-}
-
-/*
- * Routine: pin_mux_mmc
- * Description: setup the MMC muxes, power rails, etc.
- */
-void pin_mux_mmc(void)
-{
- /* Bring up uSD and eMMC power */
- max77663_voltage_init();
-}
-#endif /* MMC */
int nvidia_board_init(void)
{
diff --git a/board/liebherr/xea/boot_img_scr.h b/board/liebherr/xea/boot_img_scr.h
new file mode 100644
index 0000000..baa3072
--- /dev/null
+++ b/board/liebherr/xea/boot_img_scr.h
@@ -0,0 +1,27 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Struct for boot image source description for placing in last
+ * two SPI NOR flash sectors on legcom.
+ */
+
+struct boot_img_src {
+ u8 magic; /* Must be 'B' = 0x42 */
+ u8 flags; /* flags to specify mmcblk[0|1] boot[0|1] */
+ u8 crc8; /* CRC-8 over above two bytes */
+} __packed;
+
+/*
+ * Bit definition in boot_img_src.flags:
+ * Bit 0: mmcblk device 0 or 1 (1 - if this bit set)
+ * Bit 1: mmcblk boot partition 0 or 1.
+ * for eMMC: boot0 if this bit is cleared, boot1 - if set
+ * for SD-card the boot partition value will always be 0
+ * (independent of the value of this bit)
+ *
+ */
+#define BOOT_SRC_MMC1 BIT(0)
+#define BOOT_SRC_PART1 BIT(1)
+
+/* Offset of the first boot image source descriptor in SPI NOR */
+#define SPI_FLASH_BOOT_SRC_OFFS 0xFE0000
+#define SPI_FLASH_SECTOR_SIZE 0x10000
diff --git a/board/liebherr/xea/xea.c b/board/liebherr/xea/xea.c
index e4d2eb6..c8ac526 100644
--- a/board/liebherr/xea/xea.c
+++ b/board/liebherr/xea/xea.c
@@ -32,6 +32,11 @@
#include <errno.h>
#include <usb.h>
#include <serial.h>
+#include <u-boot/crc.h>
+#include "boot_img_scr.h"
+
+#include <spi.h>
+#include <spi_flash.h>
#ifdef CONFIG_SPL_BUILD
#include <spl.h>
@@ -66,6 +71,52 @@
preloader_console_init();
}
+static struct boot_img_src img_src[2];
+static int spi_load_boot_info(void)
+{
+ struct spi_flash *flash;
+ int err;
+
+ flash = spi_flash_probe(CONFIG_SF_DEFAULT_BUS,
+ CONFIG_SF_DEFAULT_CS,
+ CONFIG_SF_DEFAULT_SPEED,
+ CONFIG_SF_DEFAULT_MODE);
+ if (!flash) {
+ printf("%s: SPI probe err\n", __func__);
+ return -ENODEV;
+ }
+
+ /*
+ * Load both boot info structs from SPI flash
+ */
+ err = spi_flash_read(flash, SPI_FLASH_BOOT_SRC_OFFS,
+ sizeof(img_src[0]),
+ (void *)&img_src[0]);
+ if (err) {
+ debug("%s: First boot info NOR sector read error %d\n",
+ __func__, err);
+ return err;
+ }
+
+ err = spi_flash_read(flash,
+ SPI_FLASH_BOOT_SRC_OFFS + SPI_FLASH_SECTOR_SIZE,
+ sizeof(img_src[0]),
+ (void *)&img_src[1]);
+ if (err) {
+ debug("%s: First boot info NOR sector read error %d\n",
+ __func__, err);
+ return err;
+ }
+
+ debug("%s: BI0 0x%x 0x%x 0x%x\n", __func__,
+ img_src[0].magic, img_src[0].flags, img_src[0].crc8);
+
+ debug("%s: BI1 0x%x 0x%x 0x%x\n", __func__,
+ img_src[1].magic, img_src[1].flags, img_src[1].crc8);
+
+ return 0;
+}
+
static int boot_tiva0, boot_tiva1;
/* Check if TIVAs request booting via U-Boot proper */
@@ -114,6 +165,40 @@
boot_tiva1 = dm_gpio_get_value(&btiva1);
}
+int spl_mmc_emmc_boot_partition(struct mmc *mmc)
+{
+ int i, src_idx = -1, ret;
+
+ ret = spi_load_boot_info();
+ if (ret) {
+ printf("%s: Cannot read XEA boot info! [%d]\n", __func__, ret);
+ /* To avoid bricking board - by default boot from boot0 eMMC */
+ return 1;
+ }
+
+ for (i = 0; i < 2; i++) {
+ if (img_src[i].magic == 'B' &&
+ img_src[i].crc8 == crc8(0, &img_src[i].magic, 2)) {
+ src_idx = i;
+ break;
+ }
+ }
+
+ debug("%s: src idx: %d\n", __func__, src_idx);
+
+ if (src_idx < 0)
+ /*
+ * Always use eMMC (mmcblkX) boot0 if no
+ * valid image source description found
+ */
+ return 1;
+
+ if (img_src[src_idx].flags & BOOT_SRC_PART1)
+ return 2;
+
+ return 1;
+}
+
void board_boot_order(u32 *spl_boot_list)
{
spl_boot_list[0] = BOOT_DEVICE_MMC1;
diff --git a/board/liebherr/xea/xea.env b/board/liebherr/xea/xea.env
new file mode 100644
index 0000000..b87b7e5
--- /dev/null
+++ b/board/liebherr/xea/xea.env
@@ -0,0 +1,139 @@
+bootmode=update
+bootpri=mmc_mmc
+bootsec=sf_swu
+consdev=ttyAMA0
+baudrate=115200
+dtbfile=imx28-xea.dtb
+rootdev=/dev/mmcblk0p2
+netdev=eth0
+swufile=swupdate-image-xea-upd.itb
+sf_kernel_offset=0xA0000
+sf_swu_size=0xF40000
+ethact=FEC
+arch=xea
+lwe_env=
+ if dhcp ${loadaddr} ${hostname}/${lwe_uenv} ; then
+ source ${loadaddr};
+ fi
+lwe_uenv=env_uboot_xea.bin
+do_update_mmc=
+ if mmc rescan ; then
+ mmc dev 0 ${update_mmc_part} ;
+ if dhcp ${hostname}/${update_filename} ; then
+ setexpr fw_sz ${filesize} / 0x200 ;
+ setexpr fw_sz ${fw_sz} + 1 ;
+ mmc write ${loadaddr} ${update_offset} ${fw_sz} ;
+ fi ;
+ fi
+do_update_sf=
+ if sf probe ; then
+ if dhcp ${hostname}/${update_filename} ; then
+ sf erase ${update_offset} +${filesize} ;
+ sf write ${loadaddr} ${update_offset} ${filesize} ;
+ fi ;
+ fi
+factory_reset=
+ if sf probe ; then
+ run update_swu ;
+ setenv bootmode update ;
+ saveenv ;
+ fi
+update_spl_filename=u-boot.sb
+update_spl=
+ setenv update_filename ${update_spl_filename} ;
+ setenv update_offset 0 ;
+ run do_update_sf
+update_uboot_filename=u-boot.img
+update_uboot=
+ setenv update_filename ${update_uboot_filename} ;
+ setenv update_offset 0x10000 ;
+ run do_update_sf ;
+ setenv update_mmc_part 1 ;
+ setenv update_offset 0 ;
+ run do_update_mmc ;
+ setenv update_mmc_part 2 ;
+ run do_update_mmc
+update_kernel_filename=uImage
+update_kernel=
+ setenv update_mmc_part 1 ;
+ setenv update_filename ${update_kernel_filename} ;
+ setenv update_offset 0x800 ;
+ run do_update_mmc ;
+ setenv update_filename ${dtbfile} ;
+ setenv update_offset 0x400 ;
+ run do_update_mmc
+update_swu=
+ setenv update_filename ${swufile} ;
+ setenv update_offset ${sf_kernel_offset} ;
+ run do_update_sf
+addcons=
+ setenv bootargs ${bootargs}
+ console=${consdev},${baudrate}
+addip=
+ setenv bootargs ${bootargs}
+ ip=${ipaddr}:${serverip}:${gatewayip}:
+ ${netmask}:${hostname}:${netdev}:off
+addmisc=
+ setenv bootargs ${bootargs} ${miscargs}
+addargs=run addcons addmisc
+mmcload=
+ mmc rescan ;
+ mmc dev 0 1 ;
+ mmc read ${loadaddr} 0x800 0x2000 ;
+ mmc read ${dtbaddr} 0x400 0x80
+netload=
+ dhcp ${loadaddr} ${hostname}/${bootfile} ;
+ tftp ${dtbaddr} ${hostname}/${dtbfile}
+usbload=
+ usb start ;
+ load usb 0:1 ${loadaddr} ${bootfile}
+miscargs=panic=1
+mmcargs=setenv bootargs root=${rootdev} rw rootwait
+nfsargs=
+ setenv bootargs root=/dev/nfs rw
+ nfsroot=${serverip}:${rootpath},v3,tcp
+mmc_mmc=
+ if run mmcload mmcargs addargs ; then
+ bootm ${loadaddr} - ${dtbaddr} ;
+ fi
+mmc_nfs=
+ if run mmcload nfsargs addip addargs ; then
+ bootm ${loadaddr} - ${dtbaddr} ;
+ fi
+sf_mmc=
+ if run sfload mmcargs addargs ; then
+ bootm ${loadaddr} - ${dtbaddr} ;
+ fi
+sf_swu=
+ if sf probe ; then
+ sf read ${loadaddr} ${sf_kernel_offset} ${sf_swu_size} ;
+ setenv bootargs root=/dev/ram0 rw ;
+ run addargs ;
+ bootm ${loadaddr} ;
+ fi
+net_mmc=
+ if run netload mmcargs addargs ; then
+ bootm ${loadaddr} - ${dtbaddr} ;
+ fi
+net_nfs=
+ if run netload nfsargs addip addargs ; then
+ bootm ${loadaddr} - ${dtbaddr} ;
+ fi
+prebootcmd=
+ if test ${envsaved} != y ; then ;
+ setenv envsaved y ;
+ saveenv ;
+ fi ;
+ if test ${bootmode} = normal ; then
+ setenv bootdelay 0 ;
+ setenv bootpri mmc_mmc ;
+ elif test ${bootmode} = devel ; then
+ setenv bootdelay 3 ;
+ setenv bootpri net_mmc ;
+ else
+ if test ${bootmode} != update ; then
+ echo Warning: unknown bootmode ${bootmode} ;
+ fi ;
+ setenv bootdelay 1 ;
+ setenv bootpri sf_swu ;
+ fi
diff --git a/board/mediatek/mt8365_evk/MAINTAINERS b/board/mediatek/mt8365_evk/MAINTAINERS
new file mode 100644
index 0000000..bb28ae8
--- /dev/null
+++ b/board/mediatek/mt8365_evk/MAINTAINERS
@@ -0,0 +1,6 @@
+MT8365 EVK
+M: Julien Masson <jmasson@baylibre.com>
+S: Maintained
+F: arch/arm/dts/mt8365-evk.dts
+F: board/mediatek/mt8365_evk/
+F: configs/mt8365_evk_defconfig
diff --git a/board/mediatek/mt8365_evk/Makefile b/board/mediatek/mt8365_evk/Makefile
new file mode 100644
index 0000000..90fc92b
--- /dev/null
+++ b/board/mediatek/mt8365_evk/Makefile
@@ -0,0 +1,3 @@
+# SPDX-License-Identifier: GPL-2.0
+
+obj-y += mt8365_evk.o
diff --git a/board/mediatek/mt8365_evk/mt8365_evk.c b/board/mediatek/mt8365_evk/mt8365_evk.c
new file mode 100644
index 0000000..723a50f
--- /dev/null
+++ b/board/mediatek/mt8365_evk/mt8365_evk.c
@@ -0,0 +1,33 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2023 BayLibre SAS
+ * Author: Julien Masson <jmasson@baylibre.com>
+ */
+
+#include <asm/armv8/mmu.h>
+
+int board_init(void)
+{
+ return 0;
+}
+
+static struct mm_region mt8365_evk_mem_map[] = {
+ {
+ /* DDR */
+ .virt = 0x40000000UL,
+ .phys = 0x40000000UL,
+ .size = 0xc0000000UL,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_OUTER_SHARE,
+ }, {
+ .virt = 0x00000000UL,
+ .phys = 0x00000000UL,
+ .size = 0x20000000UL,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+ PTE_BLOCK_NON_SHARE |
+ PTE_BLOCK_PXN | PTE_BLOCK_UXN
+ }, {
+ 0,
+ }
+};
+
+struct mm_region *mem_map = mt8365_evk_mem_map;
diff --git a/board/microchip/mpfs_icicle/Kconfig b/board/microchip/mpfs_icicle/Kconfig
index 7cd5a59..4309f75 100644
--- a/board/microchip/mpfs_icicle/Kconfig
+++ b/board/microchip/mpfs_icicle/Kconfig
@@ -50,12 +50,12 @@
imply CMD_I2C
imply DM_I2C
imply SYS_I2C_MICROCHIP
+ imply MTD
imply SPI
imply DM_SPI
imply MICROCHIP_COREQSPI
imply MTD_SPI_NAND
imply CMD_MTD
- imply MTD_PARTITIONS
imply CMD_MTDPARTS
endif
diff --git a/board/nuvoton/arbel_evb/Kconfig b/board/nuvoton/arbel_evb/Kconfig
index 33c589f..ed1c1ad 100644
--- a/board/nuvoton/arbel_evb/Kconfig
+++ b/board/nuvoton/arbel_evb/Kconfig
@@ -15,4 +15,5 @@
help
Reserve memory for ECC/GFX/OPTEE/TIP/CP.
+source "board/nuvoton/common/Kconfig"
endif
diff --git a/board/nuvoton/arbel_evb/arbel_evb.c b/board/nuvoton/arbel_evb/arbel_evb.c
index 59e1a42..8fc56c1 100644
--- a/board/nuvoton/arbel_evb/arbel_evb.c
+++ b/board/nuvoton/arbel_evb/arbel_evb.c
@@ -7,6 +7,7 @@
#include <dm.h>
#include <asm/io.h>
#include <asm/arch/gcr.h>
+#include "../common/uart.h"
#define SR_MII_CTRL_SWR_BIT15 15
@@ -90,3 +91,9 @@
return 0;
}
+int last_stage_init(void)
+{
+ board_set_console();
+
+ return 0;
+}
diff --git a/board/nuvoton/common/Kconfig b/board/nuvoton/common/Kconfig
new file mode 100644
index 0000000..61de7bc
--- /dev/null
+++ b/board/nuvoton/common/Kconfig
@@ -0,0 +1,9 @@
+if ARCH_NPCM
+
+config SYS_SKIP_UART_INIT
+ bool "Skip UART initialization"
+ depends on NPCM_SERIAL
+ help
+ Select this if the UART you want to use is already
+ initialized by the time U-Boot starts its execution.
+endif
diff --git a/board/nuvoton/common/Makefile b/board/nuvoton/common/Makefile
new file mode 100644
index 0000000..8fd83b2
--- /dev/null
+++ b/board/nuvoton/common/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_SYS_SKIP_UART_INIT) += uart.o
diff --git a/board/nuvoton/common/uart.c b/board/nuvoton/common/uart.c
new file mode 100644
index 0000000..b35c795
--- /dev/null
+++ b/board/nuvoton/common/uart.c
@@ -0,0 +1,70 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2023 Nuvoton Technology Corp.
+ */
+
+#include <clk.h>
+#include <dm.h>
+#include <env.h>
+#include <serial.h>
+#include <linux/delay.h>
+
+#define UART_DLL 0x0
+#define UART_DLM 0x4
+#define UART_LCR 0xc
+#define LCR_DLAB BIT(7)
+
+void board_set_console(void)
+{
+ const unsigned long baudrate_table[] = CFG_SYS_BAUDRATE_TABLE;
+ struct udevice *dev = gd->cur_serial_dev;
+ unsigned int baudrate, max_delta;
+ void __iomem *uart_reg;
+ struct clk clk;
+ char string[32];
+ u32 uart_clk;
+ u8 dll, dlm;
+ u16 divisor;
+ int ret, i;
+
+ if (!dev)
+ return;
+
+ uart_reg = dev_read_addr_ptr(dev);
+ ret = clk_get_by_index(dev, 0, &clk);
+ if (ret)
+ return;
+
+ uart_clk = clk_get_rate(&clk);
+ setbits_8(uart_reg + UART_LCR, LCR_DLAB);
+ dll = readb(uart_reg + UART_DLL);
+ dlm = readb(uart_reg + UART_DLM);
+ clrbits_8(uart_reg + UART_LCR, LCR_DLAB);
+ divisor = dll | (dlm << 8);
+ baudrate = uart_clk / ((16 * (divisor + 2)));
+ for (i = 0; i < ARRAY_SIZE(baudrate_table); ++i) {
+ max_delta = baudrate_table[i] / 20;
+ if (abs(baudrate - baudrate_table[i]) < max_delta) {
+ /* The baudrate is supported */
+ gd->baudrate = baudrate_table[i];
+ break;
+ }
+ }
+
+ if (i == ARRAY_SIZE(baudrate_table)) {
+ /* current baudrate is not suitable, set to default */
+ divisor = DIV_ROUND_CLOSEST(uart_clk, 16 * gd->baudrate) - 2;
+ setbits_8(uart_reg + UART_LCR, LCR_DLAB);
+ writeb(divisor & 0xff, uart_reg + UART_DLL);
+ writeb(divisor >> 8, uart_reg + UART_DLM);
+ clrbits_8(uart_reg + UART_LCR, LCR_DLAB);
+ udelay(100);
+ printf("\r\nUART(source %u): change baudrate from %u to %u\n",
+ uart_clk, baudrate, uart_clk / ((16 * (divisor + 2))));
+ }
+
+ debug("Set env baudrate=%u\n", gd->baudrate);
+ snprintf(string, sizeof(string), "ttyS0,%un8", gd->baudrate);
+ env_set("console", string);
+
+}
diff --git a/board/nuvoton/common/uart.h b/board/nuvoton/common/uart.h
new file mode 100644
index 0000000..9cc8952
--- /dev/null
+++ b/board/nuvoton/common/uart.h
@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (c) 2023 Nuvoton Technology Corp.
+ */
+
+#ifndef _NUVOTON_UART_H
+#define _NUVOTON_UART_H
+
+void board_set_console(void);
+
+#endif /* _NUVOTON_COMMON_H */
diff --git a/board/nuvoton/poleg_evb/Kconfig b/board/nuvoton/poleg_evb/Kconfig
index d3f4c1d..6f7f1ef 100644
--- a/board/nuvoton/poleg_evb/Kconfig
+++ b/board/nuvoton/poleg_evb/Kconfig
@@ -22,4 +22,5 @@
endchoice
+source "board/nuvoton/common/Kconfig"
endif
diff --git a/board/nuvoton/poleg_evb/poleg_evb.c b/board/nuvoton/poleg_evb/poleg_evb.c
index 2052af6..7421911 100644
--- a/board/nuvoton/poleg_evb/poleg_evb.c
+++ b/board/nuvoton/poleg_evb/poleg_evb.c
@@ -10,6 +10,7 @@
#include <asm/io.h>
#include <asm/arch/gcr.h>
#include <asm/mach-types.h>
+#include "../common/uart.h"
DECLARE_GLOBAL_DATA_PTR;
@@ -53,3 +54,10 @@
return 0;
}
+
+int last_stage_init(void)
+{
+ board_set_console();
+
+ return 0;
+}
diff --git a/board/phytec/common/Makefile b/board/phytec/common/Makefile
index fe28964..35c8174 100644
--- a/board/phytec/common/Makefile
+++ b/board/phytec/common/Makefile
@@ -7,5 +7,5 @@
obj- := __dummy__.o
endif
-obj-$(CONFIG_PHYTEC_SOM_DETECTION) += phytec_som_detection.o
-obj-$(CONFIG_PHYTEC_IMX8M_SOM_DETECTION) += imx8m_som_detection.o
+obj-y += phytec_som_detection.o
+obj-$(CONFIG_ARCH_IMX8M) += imx8m_som_detection.o
diff --git a/board/phytec/common/imx8m_som_detection.c b/board/phytec/common/imx8m_som_detection.c
index c6c96ed..214b75d 100644
--- a/board/phytec/common/imx8m_som_detection.c
+++ b/board/phytec/common/imx8m_som_detection.c
@@ -15,6 +15,8 @@
extern struct phytec_eeprom_data eeprom_data;
+#if IS_ENABLED(CONFIG_PHYTEC_IMX8M_SOM_DETECTION)
+
/* Check if the SoM is actually one of the following products:
* - i.MX8MM
* - i.MX8MN
@@ -23,18 +25,18 @@
*
* Returns 0 in case it's a known SoM. Otherwise, returns -1.
*/
-u8 __maybe_unused phytec_imx8m_detect(struct phytec_eeprom_data *data)
+int __maybe_unused phytec_imx8m_detect(struct phytec_eeprom_data *data)
{
char *opt;
u8 som;
+ if (!data)
+ data = &eeprom_data;
+
/* We can not do the check for early API revisions */
if (data->api_rev < PHYTEC_API_REV2)
return -1;
- if (!data)
- data = &eeprom_data;
-
som = data->data.data_api2.som_no;
debug("%s: som id: %u\n", __func__, som);
@@ -166,3 +168,33 @@
debug("%s: rtc: %u\n", __func__, rtc);
return rtc;
}
+
+#else
+
+inline int __maybe_unused phytec_imx8m_detect(struct phytec_eeprom_data *data)
+{
+ return -1;
+}
+
+inline u8 __maybe_unused
+phytec_get_imx8m_ddr_size(struct phytec_eeprom_data *data)
+{
+ return PHYTEC_EEPROM_INVAL;
+}
+
+inline u8 __maybe_unused phytec_get_imx8mp_rtc(struct phytec_eeprom_data *data)
+{
+ return PHYTEC_EEPROM_INVAL;
+}
+
+inline u8 __maybe_unused phytec_get_imx8m_spi(struct phytec_eeprom_data *data)
+{
+ return PHYTEC_EEPROM_INVAL;
+}
+
+inline u8 __maybe_unused phytec_get_imx8m_eth(struct phytec_eeprom_data *data)
+{
+ return PHYTEC_EEPROM_INVAL;
+}
+
+#endif /* IS_ENABLED(CONFIG_PHYTEC_IMX8M_SOM_DETECTION) */
diff --git a/board/phytec/common/imx8m_som_detection.h b/board/phytec/common/imx8m_som_detection.h
index 88d3037..0176347 100644
--- a/board/phytec/common/imx8m_som_detection.h
+++ b/board/phytec/common/imx8m_som_detection.h
@@ -13,42 +13,10 @@
#define PHYTEC_IMX8MM_SOM 69
#define PHYTEC_IMX8MP_SOM 70
-#if IS_ENABLED(CONFIG_PHYTEC_IMX8M_SOM_DETECTION)
-
-u8 __maybe_unused phytec_imx8m_detect(struct phytec_eeprom_data *data);
+int __maybe_unused phytec_imx8m_detect(struct phytec_eeprom_data *data);
u8 __maybe_unused phytec_get_imx8m_ddr_size(struct phytec_eeprom_data *data);
u8 __maybe_unused phytec_get_imx8mp_rtc(struct phytec_eeprom_data *data);
u8 __maybe_unused phytec_get_imx8m_spi(struct phytec_eeprom_data *data);
u8 __maybe_unused phytec_get_imx8m_eth(struct phytec_eeprom_data *data);
-#else
-
-inline u8 __maybe_unused phytec_imx8m_detect(struct phytec_eeprom_data *data)
-{
- return -1;
-}
-
-inline u8 __maybe_unused
-phytec_get_imx8m_ddr_size(struct phytec_eeprom_data *data)
-{
- return PHYTEC_EEPROM_INVAL;
-}
-
-inline u8 __maybe_unused phytec_get_imx8mp_rtc(struct phytec_eeprom_data *data)
-{
- return PHYTEC_EEPROM_INVAL;
-}
-
-inline u8 __maybe_unused phytec_get_imx8m_spi(struct phytec_eeprom_data *data)
-{
- return PHYTEC_EEPROM_INVAL;
-}
-
-inline u8 __maybe_unused phytec_get_imx8m_eth(struct phytec_eeprom_data *data)
-{
- return PHYTEC_EEPROM_INVAL;
-}
-
-#endif /* IS_ENABLED(CONFIG_PHYTEC_IMX8M_SOM_DETECTION) */
-
#endif /* _PHYTEC_IMX8M_SOM_DETECTION_H */
diff --git a/board/phytec/common/phytec_som_detection.c b/board/phytec/common/phytec_som_detection.c
index 5556273..c73bf97 100644
--- a/board/phytec/common/phytec_som_detection.c
+++ b/board/phytec/common/phytec_som_detection.c
@@ -5,8 +5,6 @@
*/
#include <common.h>
-#include <asm/mach-imx/mxc_i2c.h>
-#include <asm/arch/sys_proto.h>
#include <dm/device.h>
#include <dm/uclass.h>
#include <i2c.h>
@@ -16,6 +14,8 @@
struct phytec_eeprom_data eeprom_data;
+#if IS_ENABLED(CONFIG_PHYTEC_SOM_DETECTION)
+
int phytec_eeprom_data_setup_fallback(struct phytec_eeprom_data *data,
int bus_num, int addr, int addr_fallback)
{
@@ -83,8 +83,8 @@
}
ptr = (int *)data;
- for (i = 0; i < sizeof(struct phytec_eeprom_data); i += sizeof(ptr))
- if (*ptr != 0x0)
+ for (i = 0; i < sizeof(struct phytec_eeprom_data); i++)
+ if (ptr[i] != 0x0)
break;
if (i == sizeof(struct phytec_eeprom_data)) {
@@ -159,7 +159,8 @@
sub_som_type2 = 2;
break;
default:
- break;
+ pr_err("%s: Invalid SoM type: %i", __func__, api2->som_type);
+ return;
};
printf("SoM: %s-%03u-%s-%03u ",
@@ -201,3 +202,40 @@
return api2->pcb_rev;
}
+
+#else
+
+inline int phytec_eeprom_data_setup(struct phytec_eeprom_data *data,
+ int bus_num, int addr)
+{
+ return PHYTEC_EEPROM_INVAL;
+}
+
+inline int phytec_eeprom_data_setup_fallback(struct phytec_eeprom_data *data,
+ int bus_num, int addr,
+ int addr_fallback)
+{
+ return PHYTEC_EEPROM_INVAL;
+}
+
+inline int phytec_eeprom_data_init(struct phytec_eeprom_data *data,
+ int bus_num, int addr)
+{
+ return PHYTEC_EEPROM_INVAL;
+}
+
+inline void __maybe_unused phytec_print_som_info(struct phytec_eeprom_data *data)
+{
+}
+
+inline char *__maybe_unused phytec_get_opt(struct phytec_eeprom_data *data)
+{
+ return NULL;
+}
+
+u8 __maybe_unused phytec_get_rev(struct phytec_eeprom_data *data)
+{
+ return PHYTEC_EEPROM_INVAL;
+}
+
+#endif /* IS_ENABLED(CONFIG_PHYTEC_SOM_DETECTION) */
diff --git a/board/phytec/common/phytec_som_detection.h b/board/phytec/common/phytec_som_detection.h
index c68e230..1100924 100644
--- a/board/phytec/common/phytec_som_detection.h
+++ b/board/phytec/common/phytec_som_detection.h
@@ -56,8 +56,6 @@
} data;
} __packed;
-#if IS_ENABLED(CONFIG_PHYTEC_SOM_DETECTION)
-
int phytec_eeprom_data_setup_fallback(struct phytec_eeprom_data *data,
int bus_num, int addr,
int addr_fallback);
@@ -70,40 +68,4 @@
char * __maybe_unused phytec_get_opt(struct phytec_eeprom_data *data);
u8 __maybe_unused phytec_get_rev(struct phytec_eeprom_data *data);
-#else
-
-inline int phytec_eeprom_data_setup(struct phytec_eeprom_data *data,
- int bus_num, int addr)
-{
- return PHYTEC_EEPROM_INVAL;
-}
-
-inline int phytec_eeprom_data_setup_fallback(struct phytec_eeprom_data *data,
- int bus_num, int addr,
- int addr_fallback)
-{
- return PHYTEC_EEPROM_INVAL;
-}
-
-inline int phytec_eeprom_data_init(struct phytec_eeprom_data *data,
- int bus_num, int addr)
-{
- return PHYTEC_EEPROM_INVAL;
-}
-
-inline void __maybe_unused phytec_print_som_info(struct phytec_eeprom_data *data)
-{
-}
-
-inline char *__maybe_unused phytec_get_opt(struct phytec_eeprom_data *data)
-{
- return NULL;
-}
-
-u8 __maybe_unused phytec_get_rev(struct phytec_eeprom_data *data)
-{
- return PHYTEC_EEPROM_INVAL;
-}
-#endif /* IS_ENABLED(CONFIG_PHYTEC_SOM_DETECTION) */
-
#endif /* _PHYTEC_SOM_DETECTION_H */
diff --git a/board/phytec/phycore_am62x/Kconfig b/board/phytec/phycore_am62x/Kconfig
new file mode 100644
index 0000000..b64c345
--- /dev/null
+++ b/board/phytec/phycore_am62x/Kconfig
@@ -0,0 +1,33 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2022 - 2023 PHYTEC Messtechnik GmbH
+# Author: Wadim Egorov <w.egorov@phytec.de>
+
+if TARGET_PHYCORE_AM62X_A53
+
+config SYS_BOARD
+ default "phycore_am62x"
+
+config SYS_VENDOR
+ default "phytec"
+
+config SYS_CONFIG_NAME
+ default "phycore_am62x"
+
+endif
+
+if TARGET_PHYCORE_AM62X_R5
+
+config SYS_BOARD
+ default "phycore_am62x"
+
+config SYS_VENDOR
+ default "phytec"
+
+config SYS_CONFIG_NAME
+ default "phycore_am62x"
+
+config SPL_LDSCRIPT
+ default "arch/arm/mach-omap2/u-boot-spl.lds"
+
+endif
diff --git a/board/phytec/phycore_am62x/MAINTAINERS b/board/phytec/phycore_am62x/MAINTAINERS
new file mode 100644
index 0000000..884e9c6
--- /dev/null
+++ b/board/phytec/phycore_am62x/MAINTAINERS
@@ -0,0 +1,15 @@
+phyCORE-AM62x
+M: Wadim Egorov <w.egorov@phytec.de>
+W: https://www.phytec.com/product/phycore-am62x
+S: Maintained
+F: arch/arm/dts/k3-am62-phycore-som-ddr4-2gb.dtsi
+F: arch/arm/dts/k3-am62-phycore-som.dtsi
+F: arch/arm/dts/k3-am625-phyboard-lyra-rdk-u-boot.dtsi
+F: arch/arm/dts/k3-am625-phyboard-lyra-rdk.dts
+F: arch/arm/dts/k3-am625-phycore-som-binman.dtsi
+F: arch/arm/dts/k3-am625-r5-phycore-som-2gb.dts
+F: board/phytec/phycore_am62x/
+F: configs/phycore_am62x_a53_defconfig
+F: configs/phycore_am62x_r5_defconfig
+F: include/configs/phycore_am62x.h
+F: doc/board/phytec/phycore-am62x.rst
diff --git a/board/phytec/phycore_am62x/Makefile b/board/phytec/phycore_am62x/Makefile
new file mode 100644
index 0000000..76a663f
--- /dev/null
+++ b/board/phytec/phycore_am62x/Makefile
@@ -0,0 +1,8 @@
+#
+# Copyright (C) 2022 - 2023 PHYTEC Messtechnik GmbH
+# Author: Wadim Egorov <w.egorov@phytec.de>
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += phycore-am62x.o
diff --git a/board/phytec/phycore_am62x/board-cfg.yaml b/board/phytec/phycore_am62x/board-cfg.yaml
new file mode 100644
index 0000000..45c89dd
--- /dev/null
+++ b/board/phytec/phycore_am62x/board-cfg.yaml
@@ -0,0 +1,36 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2022-2023 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Board configuration for AM62
+#
+
+---
+
+board-cfg:
+ rev:
+ boardcfg_abi_maj: 0x0
+ boardcfg_abi_min: 0x1
+ control:
+ subhdr:
+ magic: 0xC1D3
+ size: 7
+ main_isolation_enable: 0x5A
+ main_isolation_hostid: 0x2
+ secproxy:
+ subhdr:
+ magic: 0x1207
+ size: 7
+ scaling_factor: 0x1
+ scaling_profile: 0x1
+ disable_main_nav_secure_proxy: 0
+ msmc:
+ subhdr:
+ magic: 0xA5C3
+ size: 5
+ msmc_cache_size: 0x0
+ debug_cfg:
+ subhdr:
+ magic: 0x020C
+ size: 8
+ trace_dst_enables: 0x00
+ trace_src_enables: 0x00
diff --git a/board/phytec/phycore_am62x/phycore-am62x.c b/board/phytec/phycore_am62x/phycore-am62x.c
new file mode 100644
index 0000000..91a2401
--- /dev/null
+++ b/board/phytec/phycore_am62x/phycore-am62x.c
@@ -0,0 +1,59 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2022 - 2023 PHYTEC Messtechnik GmbH
+ * Author: Wadim Egorov <w.egorov@phytec.de>
+ */
+
+#include <asm/io.h>
+#include <env.h>
+#include <env_internal.h>
+#include <spl.h>
+#include <fdt_support.h>
+#include <asm/arch/hardware.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int board_init(void)
+{
+ return 0;
+}
+
+int dram_init(void)
+{
+ return fdtdec_setup_mem_size_base();
+}
+
+int dram_init_banksize(void)
+{
+ return fdtdec_setup_memory_banksize();
+}
+
+#define CTRLMMR_USB0_PHY_CTRL 0x43004008
+#define CTRLMMR_USB1_PHY_CTRL 0x43004018
+#define CORE_VOLTAGE 0x80000000
+
+#ifdef CONFIG_SPL_BOARD_INIT
+void spl_board_init(void)
+{
+ u32 val;
+
+ /* Set USB0 PHY core voltage to 0.85V */
+ val = readl(CTRLMMR_USB0_PHY_CTRL);
+ val &= ~(CORE_VOLTAGE);
+ writel(val, CTRLMMR_USB0_PHY_CTRL);
+
+ /* Set USB1 PHY core voltage to 0.85V */
+ val = readl(CTRLMMR_USB1_PHY_CTRL);
+ val &= ~(CORE_VOLTAGE);
+ writel(val, CTRLMMR_USB1_PHY_CTRL);
+
+ /* We have 32k crystal, so lets enable it */
+ val = readl(MCU_CTRL_LFXOSC_CTRL);
+ val &= ~(MCU_CTRL_LFXOSC_32K_DISABLE_VAL);
+ writel(val, MCU_CTRL_LFXOSC_CTRL);
+ /* Add any TRIM needed for the crystal here.. */
+ /* Make sure to mux up to take the SoC 32k from the crystal */
+ writel(MCU_CTRL_DEVICE_CLKOUT_LFOSC_SELECT_VAL,
+ MCU_CTRL_DEVICE_CLKOUT_32K_CTRL);
+}
+#endif
diff --git a/board/phytec/phycore_am62x/phycore_am62x.env b/board/phytec/phycore_am62x/phycore_am62x.env
new file mode 100644
index 0000000..ada3a92
--- /dev/null
+++ b/board/phytec/phycore_am62x/phycore_am62x.env
@@ -0,0 +1,23 @@
+fdtaddr=0x88000000
+loadaddr=0x82000000
+scriptaddr=0x80000000
+fdt_addr_r=0x88000000
+kernel_addr_r=0x82000000
+ramdisk_addr_r=0x88080000
+fdtoverlay_addr_r=0x89000000
+
+fdtfile=CONFIG_DEFAULT_FDT_FILE
+mmcdev=1
+mmcroot=2
+mmcpart=1
+console=ttyS2,115200n8
+mmcargs=setenv bootargs console=${console} earlycon=ns16550a,mmio32,0x02800000
+ root=/dev/mmcblk${mmcdev}p${mmcroot} rootwait rw
+loadimage=load mmc ${mmcdev}:${mmcpart} ${loadaddr} Image
+loadfdt=load mmc ${mmcdev}:${mmcpart} ${fdtaddr} ${fdtfile}
+mmcboot=run mmcargs;
+ mmc dev ${mmcdev};
+ mmc rescan;
+ run loadimage;
+ run loadfdt;
+ booti ${loadaddr} - ${fdtaddr}
diff --git a/board/phytec/phycore_am62x/pm-cfg.yaml b/board/phytec/phycore_am62x/pm-cfg.yaml
new file mode 100644
index 0000000..9853a25
--- /dev/null
+++ b/board/phytec/phycore_am62x/pm-cfg.yaml
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2022-2023 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Power management configuration for AM62
+#
+
+---
+
+pm-cfg:
+ rev:
+ boardcfg_abi_maj: 0x0
+ boardcfg_abi_min: 0x1
diff --git a/board/phytec/phycore_am62x/rm-cfg.yaml b/board/phytec/phycore_am62x/rm-cfg.yaml
new file mode 100644
index 0000000..e4221f8
--- /dev/null
+++ b/board/phytec/phycore_am62x/rm-cfg.yaml
@@ -0,0 +1,969 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2022-2023 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Resource management configuration for AM62
+#
+
+---
+
+rm-cfg:
+ rm_boardcfg:
+ rev:
+ boardcfg_abi_maj: 0x0
+ boardcfg_abi_min: 0x1
+ host_cfg:
+ subhdr:
+ magic: 0x4C41
+ size: 356
+ host_cfg_entries:
+ - # 1
+ host_id: 12
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - # 2
+ host_id: 30
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - # 3
+ host_id: 36
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - # 4
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 5
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 6
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 7
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 8
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 9
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 10
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 11
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 12
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 13
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 14
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 15
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 16
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 17
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 18
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 19
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 20
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 21
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 22
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 23
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 24
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 25
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 26
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 27
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 28
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 29
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 30
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 31
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 32
+ host_id: 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ resasg:
+ subhdr:
+ magic: 0x7B25
+ size: 8
+ resasg_entries_size: 960
+ reserved: 0
+ resasg_entries:
+ -
+ start_resource: 0
+ num_resource: 16
+ type: 64
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 16
+ num_resource: 4
+ type: 64
+ host_id: 35
+ reserved: 0
+ -
+ start_resource: 16
+ num_resource: 4
+ type: 64
+ host_id: 36
+ reserved: 0
+ -
+ start_resource: 20
+ num_resource: 22
+ type: 64
+ host_id: 30
+ reserved: 0
+ -
+ start_resource: 0
+ num_resource: 16
+ type: 192
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 34
+ num_resource: 2
+ type: 192
+ host_id: 30
+ reserved: 0
+ -
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+ num_resource: 4
+ type: 320
+ host_id: 12
+ reserved: 0
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+ num_resource: 4
+ type: 320
+ host_id: 30
+ reserved: 0
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+ type: 384
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+ reserved: 0
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+ type: 1666
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+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 10
+ num_resource: 3
+ type: 1955
+ host_id: 35
+ reserved: 0
+ -
+ start_resource: 10
+ num_resource: 3
+ type: 1955
+ host_id: 36
+ reserved: 0
+ -
+ start_resource: 13
+ num_resource: 3
+ type: 1955
+ host_id: 30
+ reserved: 0
+ -
+ start_resource: 16
+ num_resource: 3
+ type: 1955
+ host_id: 128
+ reserved: 0
+ -
+ start_resource: 19
+ num_resource: 8
+ type: 1956
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 19
+ num_resource: 8
+ type: 1956
+ host_id: 36
+ reserved: 0
+ -
+ start_resource: 27
+ num_resource: 1
+ type: 1957
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 28
+ num_resource: 1
+ type: 1958
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 0
+ num_resource: 10
+ type: 1961
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 10
+ num_resource: 3
+ type: 1961
+ host_id: 35
+ reserved: 0
+ -
+ start_resource: 10
+ num_resource: 3
+ type: 1961
+ host_id: 36
+ reserved: 0
+ -
+ start_resource: 13
+ num_resource: 3
+ type: 1961
+ host_id: 30
+ reserved: 0
+ -
+ start_resource: 16
+ num_resource: 3
+ type: 1961
+ host_id: 128
+ reserved: 0
+ -
+ start_resource: 0
+ num_resource: 10
+ type: 1962
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 10
+ num_resource: 3
+ type: 1962
+ host_id: 35
+ reserved: 0
+ -
+ start_resource: 10
+ num_resource: 3
+ type: 1962
+ host_id: 36
+ reserved: 0
+ -
+ start_resource: 13
+ num_resource: 3
+ type: 1962
+ host_id: 30
+ reserved: 0
+ -
+ start_resource: 16
+ num_resource: 3
+ type: 1962
+ host_id: 128
+ reserved: 0
+ -
+ start_resource: 19
+ num_resource: 1
+ type: 1963
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 19
+ num_resource: 1
+ type: 1963
+ host_id: 36
+ reserved: 0
+ -
+ start_resource: 19
+ num_resource: 16
+ type: 1964
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 19
+ num_resource: 16
+ type: 1964
+ host_id: 36
+ reserved: 0
+ -
+ start_resource: 20
+ num_resource: 1
+ type: 1965
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 35
+ num_resource: 8
+ type: 1966
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 21
+ num_resource: 1
+ type: 1967
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 35
+ num_resource: 8
+ type: 1968
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 22
+ num_resource: 1
+ type: 1969
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 43
+ num_resource: 8
+ type: 1970
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 23
+ num_resource: 1
+ type: 1971
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 43
+ num_resource: 8
+ type: 1972
+ host_id: 12
+ reserved: 0
+ -
+ start_resource: 0
+ num_resource: 1
+ type: 2112
+ host_id: 128
+ reserved: 0
+ -
+ start_resource: 2
+ num_resource: 2
+ type: 2122
+ host_id: 12
+ reserved: 0
diff --git a/board/phytec/phycore_am62x/sec-cfg.yaml b/board/phytec/phycore_am62x/sec-cfg.yaml
new file mode 100644
index 0000000..088b2db
--- /dev/null
+++ b/board/phytec/phycore_am62x/sec-cfg.yaml
@@ -0,0 +1,379 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2022-2023 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Security management configuration for AM62
+#
+
+---
+
+sec-cfg:
+ rev:
+ boardcfg_abi_maj: 0x0
+ boardcfg_abi_min: 0x1
+ processor_acl_list:
+ subhdr:
+ magic: 0xF1EA
+ size: 164
+ proc_acl_entries:
+ - # 1
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 2
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 3
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 4
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 5
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 6
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 7
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 8
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 9
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 10
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 11
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 12
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 13
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 14
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 15
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 16
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 17
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 18
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 19
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 20
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 21
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 22
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 23
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 24
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 25
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 26
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 27
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 28
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 29
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 30
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 31
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ - # 32
+ processor_id: 0
+ proc_access_master: 0
+ proc_access_secondary: [0, 0, 0]
+ host_hierarchy:
+ subhdr:
+ magic: 0x8D27
+ size: 68
+ host_hierarchy_entries:
+ - # 1
+ host_id: 0
+ supervisor_host_id: 0
+ - # 2
+ host_id: 0
+ supervisor_host_id: 0
+ - # 3
+ host_id: 0
+ supervisor_host_id: 0
+ - # 4
+ host_id: 0
+ supervisor_host_id: 0
+ - # 5
+ host_id: 0
+ supervisor_host_id: 0
+ - # 6
+ host_id: 0
+ supervisor_host_id: 0
+ - # 7
+ host_id: 0
+ supervisor_host_id: 0
+ - # 8
+ host_id: 0
+ supervisor_host_id: 0
+ - # 9
+ host_id: 0
+ supervisor_host_id: 0
+ - # 10
+ host_id: 0
+ supervisor_host_id: 0
+ - # 11
+ host_id: 0
+ supervisor_host_id: 0
+ - # 12
+ host_id: 0
+ supervisor_host_id: 0
+ - # 13
+ host_id: 0
+ supervisor_host_id: 0
+ - # 14
+ host_id: 0
+ supervisor_host_id: 0
+ - # 15
+ host_id: 0
+ supervisor_host_id: 0
+ - # 16
+ host_id: 0
+ supervisor_host_id: 0
+ - # 17
+ host_id: 0
+ supervisor_host_id: 0
+ - # 18
+ host_id: 0
+ supervisor_host_id: 0
+ - # 19
+ host_id: 0
+ supervisor_host_id: 0
+ - # 20
+ host_id: 0
+ supervisor_host_id: 0
+ - # 21
+ host_id: 0
+ supervisor_host_id: 0
+ - # 22
+ host_id: 0
+ supervisor_host_id: 0
+ - # 23
+ host_id: 0
+ supervisor_host_id: 0
+ - # 24
+ host_id: 0
+ supervisor_host_id: 0
+ - # 25
+ host_id: 0
+ supervisor_host_id: 0
+ - # 26
+ host_id: 0
+ supervisor_host_id: 0
+ - # 27
+ host_id: 0
+ supervisor_host_id: 0
+ - # 28
+ host_id: 0
+ supervisor_host_id: 0
+ - # 29
+ host_id: 0
+ supervisor_host_id: 0
+ - # 30
+ host_id: 0
+ supervisor_host_id: 0
+ - # 31
+ host_id: 0
+ supervisor_host_id: 0
+ - # 32
+ host_id: 0
+ supervisor_host_id: 0
+ otp_config:
+ subhdr:
+ magic: 0x4081
+ size: 69
+ write_host_id: 0
+ otp_entry:
+ - # 1
+ host_id: 0
+ host_perms: 0
+ - # 2
+ host_id: 0
+ host_perms: 0
+ - # 3
+ host_id: 0
+ host_perms: 0
+ - # 4
+ host_id: 0
+ host_perms: 0
+ - # 5
+ host_id: 0
+ host_perms: 0
+ - # 6
+ host_id: 0
+ host_perms: 0
+ - # 7
+ host_id: 0
+ host_perms: 0
+ - # 8
+ host_id: 0
+ host_perms: 0
+ - # 9
+ host_id: 0
+ host_perms: 0
+ - # 10
+ host_id: 0
+ host_perms: 0
+ - # 11
+ host_id: 0
+ host_perms: 0
+ - # 12
+ host_id: 0
+ host_perms: 0
+ - # 13
+ host_id: 0
+ host_perms: 0
+ - # 14
+ host_id: 0
+ host_perms: 0
+ - # 15
+ host_id: 0
+ host_perms: 0
+ - # 16
+ host_id: 0
+ host_perms: 0
+ - # 17
+ host_id: 0
+ host_perms: 0
+ - # 18
+ host_id: 0
+ host_perms: 0
+ - # 19
+ host_id: 0
+ host_perms: 0
+ - # 20
+ host_id: 0
+ host_perms: 0
+ - # 21
+ host_id: 0
+ host_perms: 0
+ - # 22
+ host_id: 0
+ host_perms: 0
+ - # 23
+ host_id: 0
+ host_perms: 0
+ - # 24
+ host_id: 0
+ host_perms: 0
+ - # 25
+ host_id: 0
+ host_perms: 0
+ - # 26
+ host_id: 0
+ host_perms: 0
+ - # 27
+ host_id: 0
+ host_perms: 0
+ - # 28
+ host_id: 0
+ host_perms: 0
+ - # 29
+ host_id: 0
+ host_perms: 0
+ - # 30
+ host_id: 0
+ host_perms: 0
+ - # 31
+ host_id: 0
+ host_perms: 0
+ - # 32
+ host_id: 0
+ host_perms: 0
+ dkek_config:
+ subhdr:
+ magic: 0x5170
+ size: 12
+ allowed_hosts: [128, 0, 0, 0]
+ allow_dkek_export_tisci: 0x5A
+ rsvd: [0, 0, 0]
+ sa2ul_cfg:
+ subhdr:
+ magic: 0x23BE
+ size: 0
+ auth_resource_owner: 0
+ enable_saul_psil_global_config_writes: 0x5A
+ rsvd: [0, 0]
+ sec_dbg_config:
+ subhdr:
+ magic: 0x42AF
+ size: 16
+ allow_jtag_unlock: 0x5A
+ allow_wildcard_unlock: 0x5A
+ allowed_debug_level_rsvd: 0
+ rsvd: 0
+ min_cert_rev: 0x0
+ jtag_unlock_hosts: [0, 0, 0, 0]
+ sec_handover_cfg:
+ subhdr:
+ magic: 0x608F
+ size: 10
+ handover_msg_sender: 0
+ handover_to_host_id: 0
+ rsvd: [0, 0, 0, 0]
diff --git a/board/phytec/phycore_imx8mm/MAINTAINERS b/board/phytec/phycore_imx8mm/MAINTAINERS
index 9edec7b..e46e369 100644
--- a/board/phytec/phycore_imx8mm/MAINTAINERS
+++ b/board/phytec/phycore_imx8mm/MAINTAINERS
@@ -2,8 +2,15 @@
M: Teresa Remmet <t.remmet@phytec.de>
W: https://www.phytec.eu/product-eu/system-on-modules/phycore-imx-8m-mini-nano/
S: Maintained
-F: arch/arm/dts/phycore-imx8mm.dts
-F: arch/arm/dts/phycore-imx8mm-u-boot.dtsi
+F: arch/arm/dts/imx8mm-phyboard-polis-rdk.dts
+F: arch/arm/dts/imx8mm-phycore-som.dtsi
+F: arch/arm/dts/imx8mm-phyboard-polis-rdk-u-boot.dtsi
+F: arch/arm/dts/imx8mm-phygate-tauri-l.dts
+F: arch/arm/dts/imx8mm-phygate-tauri-l-u-boot.dtsi
F: board/phytec/phycore_imx8mm/
+F: configs/imx8mm-phygate-tauri-l_defconfig
F: configs/phycore-imx8mm_defconfig
+F: doc/board/phytec/imx8mm-phygate-tauri-l.rst
+F: doc/board/phytec/index.rst
+F: doc/board/phytec/phycore_imx8mm.rst
F: include/configs/phycore_imx8mm.h
diff --git a/board/phytec/phycore_imx8mp/MAINTAINERS b/board/phytec/phycore_imx8mp/MAINTAINERS
index cb7ce55..d3beb97 100644
--- a/board/phytec/phycore_imx8mp/MAINTAINERS
+++ b/board/phytec/phycore_imx8mp/MAINTAINERS
@@ -6,4 +6,5 @@
F: arch/arm/dts/imx8mp-phyboard-pollux-rdk-u-boot.dtsi
F: board/phytec/phycore_imx8mp/
F: configs/phycore-imx8mp_defconfig
+F: doc/board/phytec/phycore-imx8mp.rst
F: include/configs/phycore_imx8mp.h
diff --git a/board/phytium/pe2201/Kconfig b/board/phytium/pe2201/Kconfig
new file mode 100644
index 0000000..f2f222b
--- /dev/null
+++ b/board/phytium/pe2201/Kconfig
@@ -0,0 +1,12 @@
+if TARGET_PE2201
+
+config SYS_BOARD
+ default "pe2201"
+
+config SYS_VENDOR
+ default "phytium"
+
+config SYS_CONFIG_NAME
+ default "pe2201"
+
+endif
diff --git a/board/phytium/pe2201/MAINTAINERS b/board/phytium/pe2201/MAINTAINERS
new file mode 100644
index 0000000..f583d63
--- /dev/null
+++ b/board/phytium/pe2201/MAINTAINERS
@@ -0,0 +1,8 @@
+PE2201 BOARD
+M: lixinde <lixinde@phytium.com.cn>
+M: weichangzheng <weichangzheng@phytium.com.cn>
+S: Maintained
+F: board/phytium/pe2201/*
+F: include/configs/pe2201.h
+F: configs/pe2201_defconfig
+F: arch/arm/dts/phytium-pe2201.dts
diff --git a/board/phytium/pe2201/Makefile b/board/phytium/pe2201/Makefile
new file mode 100644
index 0000000..5350f0f
--- /dev/null
+++ b/board/phytium/pe2201/Makefile
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2023, Phytium Technology Co., Ltd.
+# lixinde <lixinde@phytium.com.cn>
+# weichangzheng <weichangzheng@phytium.com.cn>
+#
+
+obj-y += pe2201.o
+obj-y += pll.o
+obj-y += pcie.o
+obj-y += ddr.o
+obj-y += sec.o
diff --git a/board/phytium/pe2201/cpu.h b/board/phytium/pe2201/cpu.h
new file mode 100644
index 0000000..01adbb0
--- /dev/null
+++ b/board/phytium/pe2201/cpu.h
@@ -0,0 +1,64 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2023, Phytium Technology Co., Ltd.
+ * lixinde <lixinde@phytium.com.cn>
+ * weichangzheng <weichangzheng@phytium.com.cn>
+ */
+
+#ifndef _FT_PE2201_H
+#define _FT_PE2201_H
+
+/* SMCCC ID */
+#define CPU_SVC_VERSION 0xC2000F00
+#define CPU_GET_RST_SOURCE 0xC2000F01
+#define CPU_INIT_PLL 0xC2000F02
+#define CPU_INIT_PCIE 0xC2000F03
+#define CPU_INIT_MEM 0xC2000F04
+#define CPU_INIT_SEC_SVC 0xC2000F05
+
+/* CPU RESET */
+#define CPU_RESET_POWER_ON 0x1
+#define CPU_RESET_PLL 0x4
+#define CPU_RESET_WATCH_DOG 0x8
+
+/* PLL */
+#define PARAMETER_PLL_MAGIC 0x54460020
+
+/* PCIE */
+#define PARAMETER_PCIE_MAGIC 0x54460021
+#define CFG_INDEPENDENT_TREE 0x0
+#define PCI_PEU0 0x1
+#define PCI_PEU1 0x1
+#define PEU1_OFFSET 16
+#define PEU_C_OFFSET_MODE 16
+#define PEU_C_OFFSET_SPEED 0
+#define X1X1X1X1 0x2
+#define X1X1 0x0
+#define EP_MODE 0x0
+#define RC_MODE 0x1
+#define GEN3 3
+
+/* DDR */
+#define PARAMETER_MCU_MAGIC 0x54460024
+#define PARAM_MCU_VERSION 0x3
+#define PARAM_MCU_SIZE 0x100
+#define PARAM_CH_ENABLE 0x1
+
+#define RDIMM_TYPE 0x1
+#define UDIMM_TYPE 0x2
+#define LPDDR4_TYPE 0x10
+#define DIMM_X8 0x1
+#define DIMM_X16 0x2
+#define NO_MIRROR 0x0
+#define NO_ECC_TYPE 0
+#define DDR4_TYPE 0xC
+
+/* SEC */
+#define PARAMETER_COMMON_MAGIC 0x54460013
+
+void ddr_init(void);
+void sec_init(void);
+void check_reset(void);
+void pcie_init(void);
+
+#endif /* _FT_PE2201_H */
diff --git a/board/phytium/pe2201/ddr.c b/board/phytium/pe2201/ddr.c
new file mode 100644
index 0000000..549d211
--- /dev/null
+++ b/board/phytium/pe2201/ddr.c
@@ -0,0 +1,190 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2023, Phytium Technology Co., Ltd.
+ * lixinde <lixinde@phytium.com.cn>
+ * weichangzheng <weichangzheng@phytium.com.cn>
+ */
+
+#include <stdio.h>
+#include <linux/arm-smccc.h>
+#include <init.h>
+#include "cpu.h"
+
+struct ddr_spd {
+ /***************** read from spd ******************/
+ u8 dimm_type; /* 1: RDIMM; 2: UDIMM; 3: SODIMM; 4: LRDIMM */
+ u8 data_width; /* 0: x4; 1: x8; 2: x16; 3: x32 */
+ u8 mirror_type; /* 0: standard; 1: mirror */
+ u8 ecc_type; /* 0: no-ecc; 1: ecc */
+ u8 dram_type; /* 0xB: DDR3; 0xC: DDR4 */
+ u8 rank_num;
+ u8 row_num;
+ u8 col_num;
+
+ u8 bg_num; /* DDR4/DDR5 */
+ u8 bank_num;
+ u16 module_manufacturer_id;
+ u16 taamin;
+ u16 trcdmin;
+
+ u16 trpmin;
+ u16 trasmin;
+ u16 trcmin;
+ u16 tfawmin; /* only DDR3/DDR4 */
+
+ u16 trrd_smin; /* only DDR4 */
+ u16 trrd_lmin; /* only DDR4 */
+ u16 tccd_lmin; /* only DDR4 */
+ u16 twrmin;
+
+ u16 twtr_smin; /* only DDR4 */
+ u16 twtr_lmin; /* only DDR4 */
+ u32 trfc1min;
+
+ u32 trfc2min;
+ u32 trfc4_rfcsbmin; /* DDR4: tRFC4min; DDR5: tRFCsbmin */
+ u8 resv[8];
+
+ /***************** RCD control words ******************/
+ u8 f0rc03; /* bit[3:2]:CS bit[1:0]:CA */
+ u8 f0rc04; /* bit[3:2]:ODT bit[1:0]:CKE */
+ u8 f0rc05; /* bit[3:2]:CLK-A side bit[1:0]:CLK-B side */
+ u8 rcd_num; /* Registers used on RDIMM */
+
+ u8 lrdimm_resv[4];
+ u8 lrdimm_resv1[8];
+ u8 lrdimm_resv2[8];
+} __attribute((aligned(4)));
+
+struct mcu_config {
+ u32 magic;
+ u32 version;
+ u32 size;
+ u8 rev1[4];
+
+ u8 ch_enable;
+ u8 resv1[7];
+
+ u64 misc_enable;
+
+ u8 train_debug;
+ u8 train_recover;
+ u8 train_param_type;
+ u8 train_param_1; /* DDR4: cpu_odt */
+ u8 train_param_2; /* DDR4: cpu_drv */
+ u8 train_param_3; /* DDR4: mr_drv */
+ u8 train_param_4; /* DDR4: rtt_nom */
+ u8 train_param_5; /* DDR4: rtt_park */
+
+ u8 train_param_6; /* DDR4: rtt_wr */
+ u8 resv2[7];
+
+ /***************** for LPDDR4 dq swap ******************/
+ u32 data_byte_swap;
+ u32 slice0_dq_swizzle;
+
+ u32 slice1_dq_swizzle;
+ u32 slice2_dq_swizzle;
+
+ u32 slice3_dq_swizzle;
+ u32 slice4_dq_swizzle;
+
+ u32 slice5_dq_swizzle;
+ u32 slice6_dq_swizzle;
+
+ u32 slice7_dq_swizzle;
+ u8 resv3[4];
+ u8 resv4[8];
+
+ struct ddr_spd ddr_spd_info;
+} __attribute((aligned(4)));
+
+static void get_mcu_up_info_default(struct mcu_config *pm)
+{
+ pm->magic = PARAMETER_MCU_MAGIC;
+ pm->version = PARAM_MCU_VERSION;
+ pm->size = PARAM_MCU_SIZE;
+ pm->ch_enable = PARAM_CH_ENABLE;
+}
+
+static u8 init_dimm_param(struct mcu_config *pm)
+{
+ debug("manual config dimm info...\n");
+ pm->misc_enable = 0x2001;
+ pm->train_debug = 0x0;
+ pm->train_recover = 0x0;
+ pm->train_param_type = 0x0;
+ pm->train_param_1 = 0x0;
+ pm->train_param_2 = 0x0;
+ pm->train_param_3 = 0x0;
+ pm->train_param_4 = 0x0;
+ pm->train_param_5 = 0x0;
+ pm->train_param_6 = 0x0;
+
+ pm->data_byte_swap = 0x76543210;
+ pm->slice0_dq_swizzle = 0x3145726;
+
+ pm->slice1_dq_swizzle = 0x54176230;
+ pm->slice2_dq_swizzle = 0x57604132;
+
+ pm->slice3_dq_swizzle = 0x20631547;
+ pm->slice4_dq_swizzle = 0x16057423;
+
+ pm->slice5_dq_swizzle = 0x16057423;
+ pm->slice6_dq_swizzle = 0x16057423;
+
+ pm->slice7_dq_swizzle = 0x16057423;
+
+ pm->ddr_spd_info.dimm_type = RDIMM_TYPE;
+ pm->ddr_spd_info.data_width = DIMM_X16;
+ pm->ddr_spd_info.mirror_type = NO_MIRROR;
+ pm->ddr_spd_info.ecc_type = NO_ECC_TYPE;
+ pm->ddr_spd_info.dram_type = LPDDR4_TYPE;
+ pm->ddr_spd_info.rank_num = 0x1;
+ pm->ddr_spd_info.row_num = 0x10;
+ pm->ddr_spd_info.col_num = 0xa;
+ pm->ddr_spd_info.bg_num = 0x0;
+ pm->ddr_spd_info.bank_num = 0x8;
+ pm->ddr_spd_info.taamin = 0x0;
+ pm->ddr_spd_info.trcdmin = 0x0;
+
+ pm->ddr_spd_info.trpmin = 0x0;
+ pm->ddr_spd_info.trasmin = 0x0;
+ pm->ddr_spd_info.trcmin = 0x0;
+ pm->ddr_spd_info.tfawmin = 0x0;
+
+ pm->ddr_spd_info.trrd_smin = 0x0;
+ pm->ddr_spd_info.trrd_lmin = 0x0;
+ pm->ddr_spd_info.tccd_lmin = 0x0;
+ pm->ddr_spd_info.twrmin = 0x0;
+
+ pm->ddr_spd_info.twtr_smin = 0x0;
+ pm->ddr_spd_info.twtr_lmin = 0x0;
+
+ return 0;
+}
+
+void get_default_mcu_info(u8 *data)
+{
+ get_mcu_up_info_default((struct mcu_config *)data);
+}
+
+void fix_mcu_info(u8 *data)
+{
+ struct mcu_config *mcu_info = (struct mcu_config *)data;
+
+ init_dimm_param(mcu_info);
+}
+
+void ddr_init(void)
+{
+ u8 buffer[0x100];
+ struct arm_smccc_res res;
+
+ get_default_mcu_info(buffer);
+ fix_mcu_info(buffer);
+
+ arm_smccc_smc(CPU_INIT_MEM, 0, (u64)buffer, 0, 0, 0, 0, 0, &res);
+ if (res.a0 != 0)
+ panic("DRAM init failed :0x%lx\n", res.a0);
+}
diff --git a/board/phytium/pe2201/pcie.c b/board/phytium/pe2201/pcie.c
new file mode 100644
index 0000000..34c38d2
--- /dev/null
+++ b/board/phytium/pe2201/pcie.c
@@ -0,0 +1,60 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2023, Phytium Technology Co., Ltd.
+ * lixinde <lixinde@phytium.com.cn>
+ * weichangzheng <weichangzheng@phytium.com.cn>
+ */
+
+#include <stdio.h>
+#include <string.h>
+#include <linux/arm-smccc.h>
+#include <init.h>
+#include "cpu.h"
+
+struct pcu_ctr {
+ u32 base_config[4];
+ u32 equalization[4];
+ u8 rev[72];
+} __attribute((aligned(4)));
+
+struct pcu_config {
+ u32 magic;
+ u32 version;
+ u32 size;
+ u8 rev1[4];
+ u32 independent_tree;
+ u32 base_cfg;
+ u8 rev2[16];
+ struct pcu_ctr ctr_cfg[2];
+} __attribute((aligned(4)));
+
+struct pcu_config const peu_base_info = {
+ .magic = PARAMETER_PCIE_MAGIC,
+ .version = 0x4,
+ .size = 0x100,
+ .independent_tree = CFG_INDEPENDENT_TREE,
+ .base_cfg = ((PCI_PEU1 | (X1X1X1X1 << 1)) << PEU1_OFFSET | (PCI_PEU0 | (X1X1 << 1))),
+ .ctr_cfg[0].base_config[0] = (EP_MODE << PEU_C_OFFSET_MODE) | (GEN3 << PEU_C_OFFSET_SPEED),
+ .ctr_cfg[0].base_config[1] = (EP_MODE << PEU_C_OFFSET_MODE) | (GEN3 << PEU_C_OFFSET_SPEED),
+ .ctr_cfg[0].base_config[2] = (EP_MODE << PEU_C_OFFSET_MODE) | (GEN3 << PEU_C_OFFSET_SPEED),
+ .ctr_cfg[1].base_config[0] = (EP_MODE << PEU_C_OFFSET_MODE) | (GEN3 << PEU_C_OFFSET_SPEED),
+ .ctr_cfg[1].base_config[1] = (EP_MODE << PEU_C_OFFSET_MODE) | (GEN3 << PEU_C_OFFSET_SPEED),
+ .ctr_cfg[1].base_config[2] = (EP_MODE << PEU_C_OFFSET_MODE) | (GEN3 << PEU_C_OFFSET_SPEED),
+ .ctr_cfg[0].equalization[0] = 0x7,
+ .ctr_cfg[0].equalization[1] = 0x7,
+ .ctr_cfg[0].equalization[2] = 0x7,
+ .ctr_cfg[1].equalization[0] = 0x7,
+ .ctr_cfg[1].equalization[1] = 0x7,
+ .ctr_cfg[1].equalization[2] = 0x7,
+};
+
+void pcie_init(void)
+{
+ u8 buffer[0x100];
+ struct arm_smccc_res res;
+
+ memcpy(buffer, &peu_base_info, sizeof(peu_base_info));
+ arm_smccc_smc(CPU_INIT_PCIE, 0, (u64)buffer, 0, 0, 0, 0, 0, &res);
+ if (res.a0 != 0)
+ panic("PCIE init failed :0x%lx\n", res.a0);
+}
diff --git a/board/phytium/pe2201/pe2201.c b/board/phytium/pe2201/pe2201.c
new file mode 100644
index 0000000..0e837b0
--- /dev/null
+++ b/board/phytium/pe2201/pe2201.c
@@ -0,0 +1,92 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2023, Phytium Technology Co., Ltd.
+ * lixinde <lixinde@phytium.com.cn>
+ * weichangzheng <weichangzheng@phytium.com.cn>
+ */
+
+#include <stdio.h>
+#include <command.h>
+#include <init.h>
+#include <asm/armv8/mmu.h>
+#include <asm/io.h>
+#include <linux/arm-smccc.h>
+#include <scsi.h>
+#include <asm/u-boot.h>
+#include "cpu.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int mach_cpu_init(void)
+{
+ check_reset();
+ return 0;
+}
+
+int board_early_init_f(void)
+{
+ pcie_init();
+ return 0;
+}
+
+int dram_init(void)
+{
+ debug("Phytium ddr init\n");
+ ddr_init();
+
+ gd->mem_clk = 0;
+ gd->ram_size = PHYS_SDRAM_1_SIZE;
+
+ sec_init();
+ debug("PBF relocate done\n");
+
+ return 0;
+}
+
+int dram_init_banksize(void)
+{
+ gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+ gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+
+ return 0;
+}
+
+int board_init(void)
+{
+ return 0;
+}
+
+void reset_cpu(void)
+{
+ struct arm_smccc_res res;
+
+ debug("run in reset cpu\n");
+ arm_smccc_smc(0x84000009, 0, 0, 0, 0, 0, 0, 0, &res);
+ if (res.a0 != 0)
+ panic("reset cpu error, %lx\n", res.a0);
+}
+
+static struct mm_region pe2201_mem_map[] = {
+ {
+ .virt = 0x0UL,
+ .phys = 0x0UL,
+ .size = 0x80000000UL,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | PTE_BLOCK_NON_SHARE | PTE_BLOCK_PXN
+ },
+ {
+ .virt = 0x80000000UL,
+ .phys = 0x80000000UL,
+ .size = 0x7b000000UL,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_NS | PTE_BLOCK_INNER_SHARE
+ },
+ {
+ 0,
+ }
+};
+
+struct mm_region *mem_map = pe2201_mem_map;
+
+int last_stage_init(void)
+{
+ return 0;
+}
diff --git a/board/phytium/pe2201/pe2201.env b/board/phytium/pe2201/pe2201.env
new file mode 100644
index 0000000..d57b82d
--- /dev/null
+++ b/board/phytium/pe2201/pe2201.env
@@ -0,0 +1,25 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2023, Phytium Technology Co., Ltd.
+ */
+
+/* Initial environment variables */
+
+image=Image
+scriptaddr=0x90100000
+script_offset_f=0xc00000
+script_size_f=0x2000
+kernel_addr_r=0x90200000
+fdt_addr_r=0x90000000
+boot_fit=no
+fdtfile=phytium-pe2201.dtb
+ft_fdt_name=boot/dtb/pe2201.dtb
+fdtoverlay_addr_r=0x95100000
+kernel_comp_addr_r=0x96000000
+kernel_comp_size=0x2000000
+pxefile_addr_r=0x9A000000
+ramdisk_addr_r=0x95000000
+load_kernel=ext4load scsi 0:2 $kernel_addr_r boot/uImage-2004
+load_initrd=ext4load scsi 0:2 $ramdisk_addr_r initrd.img-4.19.0.pe2201
+load_fdt=ext4load scsi 0:2 $fdt_addr_r $ft_fdt_name
+distro_bootcmd=run load_kernel; run load_initrd; run load_fdt; run boot_os
diff --git a/board/phytium/pe2201/pll.c b/board/phytium/pe2201/pll.c
new file mode 100644
index 0000000..f46435c
--- /dev/null
+++ b/board/phytium/pe2201/pll.c
@@ -0,0 +1,75 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2023, Phytium Technology Co., Ltd.
+ * lixinde <lixinde@phytium.com.cn>
+ * weichangzheng <weichangzheng@phytium.com.cn>
+ */
+
+#include <stdio.h>
+#include <string.h>
+#include <asm/io.h>
+#include <linux/arm-smccc.h>
+#include <init.h>
+#include "cpu.h"
+
+struct pll_config {
+ u32 magic;
+ u32 version;
+ u32 size;
+ u8 rev1[4];
+ u32 clust0_pll;
+ u32 clust1_pll;
+ u32 clust2_pll;
+ u32 noc_pll;
+ u32 dmu_pll;
+} __attribute((aligned(4)));
+
+struct pll_config const pll_base_info = {
+ .magic = PARAMETER_PLL_MAGIC,
+ .version = 0x2,
+ .size = 0x100,
+ .clust0_pll = 2000,
+ .clust1_pll = 2000,
+ .clust2_pll = 2000,
+ .noc_pll = 1800,
+ .dmu_pll = 600,
+};
+
+u32 get_reset_source(void)
+{
+ struct arm_smccc_res res;
+
+ arm_smccc_smc(CPU_GET_RST_SOURCE, 0, 0, 0, 0, 0, 0, 0, &res);
+
+ return res.a0;
+}
+
+void pll_init(void)
+{
+ u8 buffer[0x100];
+ struct arm_smccc_res res;
+
+ memcpy(buffer, &pll_base_info, sizeof(pll_base_info));
+ arm_smccc_smc(CPU_INIT_PLL, 0, (u64)buffer, 0, 0, 0, 0, 0, &res);
+ if (res.a0 != 0)
+ panic("PLL init failed :0x%lx\n", res.a0);
+}
+
+void check_reset(void)
+{
+ u32 rst;
+
+ rst = get_reset_source();
+
+ switch (rst) {
+ case CPU_RESET_POWER_ON:
+ pll_init();
+ break;
+ case CPU_RESET_PLL:
+ break;
+ case CPU_RESET_WATCH_DOG:
+ break;
+ default:
+ panic("other reset source\n");
+ }
+}
diff --git a/board/phytium/pe2201/sec.c b/board/phytium/pe2201/sec.c
new file mode 100644
index 0000000..6a980d6
--- /dev/null
+++ b/board/phytium/pe2201/sec.c
@@ -0,0 +1,37 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2023, Phytium Technology Co., Ltd.
+ * lixinde <lixinde@phytium.com.cn>
+ * weichangzheng <weichangzheng@phytium.com.cn>
+ */
+
+#include <stdio.h>
+#include <string.h>
+#include <linux/arm-smccc.h>
+#include <init.h>
+#include "cpu.h"
+
+struct common_config {
+ u32 magic;
+ u32 version;
+ u32 size;
+ u8 rev1[4];
+ u64 core_bit_map;
+} __attribute((aligned(4)));
+
+struct common_config const common_base_info = {
+ .magic = PARAMETER_COMMON_MAGIC,
+ .version = 0x1,
+ .core_bit_map = 0x3333,
+};
+
+void sec_init(void)
+{
+ u8 buffer[0x100];
+ struct arm_smccc_res res;
+
+ memcpy(buffer, &common_base_info, sizeof(common_base_info));
+ arm_smccc_smc(CPU_INIT_SEC_SVC, 0, (u64)buffer, 0, 0, 0, 0, 0, &res);
+ if (res.a0 != 0)
+ panic("SEC init failed :0x%lx\n", res.a0);
+}
diff --git a/board/pine64/rockpro64_rk3399/MAINTAINERS b/board/pine64/rockpro64_rk3399/MAINTAINERS
index 303db14..220ee21 100644
--- a/board/pine64/rockpro64_rk3399/MAINTAINERS
+++ b/board/pine64/rockpro64_rk3399/MAINTAINERS
@@ -1,5 +1,4 @@
ROCKPRO64
-M: Akash Gajjar <akash@openedev.com>
M: Jagan Teki <jagan@amarulasolutions.com>
S: Maintained
F: board/pine64/rockpro64_rk3399
diff --git a/board/polyhex/imx8mp_debix_model_a/Kconfig b/board/polyhex/imx8mp_debix_model_a/Kconfig
new file mode 100644
index 0000000..3ebb6bc
--- /dev/null
+++ b/board/polyhex/imx8mp_debix_model_a/Kconfig
@@ -0,0 +1,15 @@
+if TARGET_IMX8MP_DEBIX_MODEL_A
+
+config SYS_BOARD
+ default "imx8mp_debix_model_a"
+
+config SYS_VENDOR
+ default "polyhex"
+
+config SYS_CONFIG_NAME
+ default "imx8mp_debix_model_a"
+
+config IMX_CONFIG
+ default "board/polyhex/imx8mp_debix_model_a/imximage-8mp-lpddr4.cfg"
+
+endif
diff --git a/board/polyhex/imx8mp_debix_model_a/MAINTAINERS b/board/polyhex/imx8mp_debix_model_a/MAINTAINERS
new file mode 100644
index 0000000..d3afa91
--- /dev/null
+++ b/board/polyhex/imx8mp_debix_model_a/MAINTAINERS
@@ -0,0 +1,8 @@
+DEBIX MODEL A BOARD (i.MX8M Plus)
+M: Gilles Talis <gilles.talis@gmail.com>
+S: Maintained
+F: arch/arm/dts/imx8mp-debix-model-a.dts
+F: arch/arm/dts/imx8mp-debix-model-a-u-boot.dtsi
+F: board/polyhex/imx8mp_debix_model_a/
+F: include/configs/imx8mp_debix_model_a.h
+F: configs/imx8mp_debix_model_a_defconfig
diff --git a/board/polyhex/imx8mp_debix_model_a/Makefile b/board/polyhex/imx8mp_debix_model_a/Makefile
new file mode 100644
index 0000000..e5cdc85
--- /dev/null
+++ b/board/polyhex/imx8mp_debix_model_a/Makefile
@@ -0,0 +1,13 @@
+#
+# Copyright 2019 NXP
+# Copyright 2023 Gilles Talis <gilles.talis@gmail.com>
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += imx8mp_debix_model_a.o
+
+ifdef CONFIG_SPL_BUILD
+obj-y += spl.o
+obj-$(CONFIG_IMX8M_LPDDR4) += lpddr4_timing.o
+endif
diff --git a/board/polyhex/imx8mp_debix_model_a/imx8mp_debix_model_a.c b/board/polyhex/imx8mp_debix_model_a/imx8mp_debix_model_a.c
new file mode 100644
index 0000000..14b94c9
--- /dev/null
+++ b/board/polyhex/imx8mp_debix_model_a/imx8mp_debix_model_a.c
@@ -0,0 +1,55 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2019 NXP
+ * Copyright 2023 Gilles Talis <gilles.talis@gmail.com>
+ */
+
+#include <asm-generic/gpio.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/imx8mp_pins.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/global_data.h>
+#include <asm/mach-imx/gpio.h>
+#include <asm/mach-imx/iomux-v3.h>
+#include <common.h>
+#include <env.h>
+#include <errno.h>
+#include <init.h>
+#include <linux/delay.h>
+#include <miiphy.h>
+#include <netdev.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static void setup_fec(void)
+{
+ struct iomuxc_gpr_base_regs *gpr =
+ (struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR;
+
+ /* Enable RGMII TX clk output */
+ setbits_le32(&gpr->gpr[1], BIT(22));
+}
+
+#if CONFIG_IS_ENABLED(NET)
+int board_phy_config(struct phy_device *phydev)
+{
+ if (phydev->drv->config)
+ phydev->drv->config(phydev);
+ return 0;
+}
+#endif
+
+int board_init(void)
+{
+ int ret = 0;
+
+ if (IS_ENABLED(CONFIG_FEC_MXC))
+ setup_fec();
+
+ return ret;
+}
+
+int board_late_init(void)
+{
+ return 0;
+}
diff --git a/board/polyhex/imx8mp_debix_model_a/imximage-8mp-lpddr4.cfg b/board/polyhex/imx8mp_debix_model_a/imximage-8mp-lpddr4.cfg
new file mode 100644
index 0000000..23fd052
--- /dev/null
+++ b/board/polyhex/imx8mp_debix_model_a/imximage-8mp-lpddr4.cfg
@@ -0,0 +1,9 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2021, 2023 NXP
+ */
+
+
+ROM_VERSION v2
+BOOT_FROM sd
+LOADER u-boot-spl-ddr.bin 0x920000
diff --git a/board/gateworks/venice/lpddr4_timing_imx8mm_512mb.c b/board/polyhex/imx8mp_debix_model_a/lpddr4_timing.c
similarity index 84%
rename from board/gateworks/venice/lpddr4_timing_imx8mm_512mb.c
rename to board/polyhex/imx8mp_debix_model_a/lpddr4_timing.c
index 8803fbf..518daa3 100644
--- a/board/gateworks/venice/lpddr4_timing_imx8mm_512mb.c
+++ b/board/polyhex/imx8mp_debix_model_a/lpddr4_timing.c
@@ -1,49 +1,44 @@
// SPDX-License-Identifier: GPL-2.0+
/*
- * Generated code from MX8M_DDR_tool v3.20 using RPAv20
- * - 1x Micron MT53E128M32D2DS-046 32bit dual-channel for total of 512MiB
- * - imx8mm-gw7903
- *
- * Align with uboot version:
- * imx_v2019.04_5.4.x and above version
- * For imx_v2018.03_4.14.78_1.0.0_ga ~ imx_v2018.04_4.19.35_1.1.0_ga:
- * please replace #include <asm/arch/ddr.h> with #include <asm/arch/imx8m_ddr.h>
+ * Copyright 2019, 2023 NXP
*/
#include <linux/kernel.h>
#include <asm/arch/ddr.h>
-static struct dram_cfg_param ddr_ddrc_cfg[] = {
+struct dram_cfg_param ddr_ddrc_cfg[] = {
/** Initialize DDRC registers **/
{ 0x3d400304, 0x1 },
{ 0x3d400030, 0x1 },
{ 0x3d400000, 0xa1080020 },
- { 0x3d400020, 0x203 },
- { 0x3d400024, 0x3a980 },
- { 0x3d400064, 0x5b0062 },
- { 0x3d4000d0, 0xc00305ba },
- { 0x3d4000d4, 0x940000 },
- { 0x3d4000dc, 0xd4002d },
- { 0x3d4000e0, 0x310000 },
- { 0x3d4000e8, 0x66004d },
- { 0x3d4000ec, 0x16004d },
- { 0x3d400100, 0x191e1920 },
- { 0x3d400104, 0x60630 },
- { 0x3d40010c, 0xb0b000 },
- { 0x3d400110, 0xe04080e },
- { 0x3d400114, 0x2040c0c },
- { 0x3d400118, 0x1010007 },
- { 0x3d40011c, 0x401 },
- { 0x3d400130, 0x20600 },
- { 0x3d400134, 0xc100002 },
- { 0x3d400138, 0x68 },
- { 0x3d400144, 0x96004b },
- { 0x3d400180, 0x2ee0017 },
- { 0x3d400184, 0x2605b8e },
+ { 0x3d400020, 0x1323 },
+ { 0x3d400024, 0x1c61a00 },
+ { 0x3d400064, 0x710105 },
+ { 0x3d400070, 0x61027f10 },
+ { 0x3d400074, 0x7b0 },
+ { 0x3d4000d0, 0xc003071a },
+ { 0x3d4000d4, 0xb70000 },
+ { 0x3d4000dc, 0xe40036 },
+ { 0x3d4000e0, 0x330000 },
+ { 0x3d4000e8, 0x660048 },
+ { 0x3d4000ec, 0x160048 },
+ { 0x3d400100, 0x1e261f28 },
+ { 0x3d400104, 0x7073b },
+ { 0x3d40010c, 0xe0e000 },
+ { 0x3d400110, 0x11040a11 },
+ { 0x3d400114, 0x2050e0e },
+ { 0x3d400118, 0x1010008 },
+ { 0x3d40011c, 0x501 },
+ { 0x3d400130, 0x20700 },
+ { 0x3d400134, 0xe100002 },
+ { 0x3d400138, 0x10c },
+ { 0x3d400144, 0xba005d },
+ { 0x3d400180, 0x3a2001c },
+ { 0x3d400184, 0x2f07187 },
{ 0x3d400188, 0x0 },
- { 0x3d400190, 0x497820a },
+ { 0x3d400190, 0x49b820c },
{ 0x3d400194, 0x80303 },
- { 0x3d4001b4, 0x170a },
+ { 0x3d4001b4, 0x1b0c },
{ 0x3d4001a0, 0xe0400018 },
{ 0x3d4001a4, 0xdf00e4 },
{ 0x3d4001a8, 0x80000000 },
@@ -51,33 +46,34 @@
{ 0x3d4001c0, 0x1 },
{ 0x3d4001c4, 0x1 },
{ 0x3d4000f4, 0xc99 },
- { 0x3d400108, 0x70e1617 },
+ { 0x3d400108, 0x810191a },
{ 0x3d400200, 0x1f },
{ 0x3d40020c, 0x0 },
{ 0x3d400210, 0x1f1f },
{ 0x3d400204, 0x80808 },
{ 0x3d400214, 0x7070707 },
- { 0x3d400218, 0xf0f0707 },
+ { 0x3d400218, 0x7070707 },
{ 0x3d40021c, 0xf0f },
- { 0x3d400250, 0x29001701 },
+ { 0x3d400250, 0x1705 },
{ 0x3d400254, 0x2c },
{ 0x3d40025c, 0x4000030 },
{ 0x3d400264, 0x900093e7 },
{ 0x3d40026c, 0x2005574 },
{ 0x3d400400, 0x111 },
+ { 0x3d400404, 0x72ff },
{ 0x3d400408, 0x72ff },
{ 0x3d400494, 0x2100e07 },
{ 0x3d400498, 0x620096 },
{ 0x3d40049c, 0x1100e07 },
{ 0x3d4004a0, 0xc8012c },
- { 0x3d402020, 0x1 },
- { 0x3d402024, 0x7d00 },
- { 0x3d402050, 0x20d040 },
- { 0x3d402064, 0xc000d },
+ { 0x3d402020, 0x1021 },
+ { 0x3d402024, 0x30d400 },
+ { 0x3d402050, 0x20d000 },
+ { 0x3d402064, 0xc001c },
{ 0x3d4020dc, 0x840000 },
- { 0x3d4020e0, 0x310000 },
- { 0x3d4020e8, 0x66004d },
- { 0x3d4020ec, 0x16004d },
+ { 0x3d4020e0, 0x330000 },
+ { 0x3d4020e8, 0x660048 },
+ { 0x3d4020ec, 0x160048 },
{ 0x3d402100, 0xa040305 },
{ 0x3d402104, 0x30407 },
{ 0x3d402108, 0x203060b },
@@ -88,21 +84,21 @@
{ 0x3d40211c, 0x301 },
{ 0x3d402130, 0x20300 },
{ 0x3d402134, 0xa100002 },
- { 0x3d402138, 0xe },
+ { 0x3d402138, 0x1d },
{ 0x3d402144, 0x14000a },
{ 0x3d402180, 0x640004 },
{ 0x3d402190, 0x3818200 },
{ 0x3d402194, 0x80303 },
{ 0x3d4021b4, 0x100 },
{ 0x3d4020f4, 0xc99 },
- { 0x3d403020, 0x1 },
- { 0x3d403024, 0x1f40 },
- { 0x3d403050, 0x20d040 },
- { 0x3d403064, 0x30004 },
+ { 0x3d403020, 0x1021 },
+ { 0x3d403024, 0xc3500 },
+ { 0x3d403050, 0x20d000 },
+ { 0x3d403064, 0x30007 },
{ 0x3d4030dc, 0x840000 },
- { 0x3d4030e0, 0x310000 },
- { 0x3d4030e8, 0x66004d },
- { 0x3d4030ec, 0x16004d },
+ { 0x3d4030e0, 0x330000 },
+ { 0x3d4030e8, 0x660048 },
+ { 0x3d4030ec, 0x160048 },
{ 0x3d403100, 0xa010102 },
{ 0x3d403104, 0x30404 },
{ 0x3d403108, 0x203060b },
@@ -113,7 +109,7 @@
{ 0x3d40311c, 0x301 },
{ 0x3d403130, 0x20300 },
{ 0x3d403134, 0xa100002 },
- { 0x3d403138, 0x4 },
+ { 0x3d403138, 0x8 },
{ 0x3d403144, 0x50003 },
{ 0x3d403180, 0x190004 },
{ 0x3d403190, 0x3818200 },
@@ -124,7 +120,7 @@
};
/* PHY Initialize Configuration */
-static struct dram_cfg_param ddr_ddrphy_cfg[] = {
+struct dram_cfg_param ddr_ddrphy_cfg[] = {
{ 0x100a0, 0x0 },
{ 0x100a1, 0x1 },
{ 0x100a2, 0x2 },
@@ -144,9 +140,9 @@
{ 0x120a0, 0x0 },
{ 0x120a1, 0x1 },
{ 0x120a2, 0x3 },
- { 0x120a3, 0x4 },
+ { 0x120a3, 0x2 },
{ 0x120a4, 0x5 },
- { 0x120a5, 0x2 },
+ { 0x120a5, 0x4 },
{ 0x120a6, 0x7 },
{ 0x120a7, 0x6 },
{ 0x130a0, 0x0 },
@@ -200,12 +196,12 @@
{ 0x90204, 0x0 },
{ 0x190204, 0x0 },
{ 0x290204, 0x0 },
- { 0x20024, 0x1ab },
- { 0x2003a, 0x0 },
- { 0x120024, 0x1ab },
- { 0x2003a, 0x0 },
- { 0x220024, 0x1ab },
- { 0x2003a, 0x0 },
+ { 0x20024, 0x1e3 },
+ { 0x2003a, 0x2 },
+ { 0x120024, 0x1e3 },
+ { 0x2003a, 0x2 },
+ { 0x220024, 0x1e3 },
+ { 0x2003a, 0x2 },
{ 0x20056, 0x3 },
{ 0x120056, 0x3 },
{ 0x220056, 0x3 },
@@ -270,11 +266,11 @@
{ 0x20018, 0x3 },
{ 0x20075, 0x4 },
{ 0x20050, 0x0 },
- { 0x20008, 0x2ee },
+ { 0x20008, 0x3a2 },
{ 0x120008, 0x64 },
{ 0x220008, 0x19 },
{ 0x20088, 0x9 },
- { 0x200b2, 0xdc },
+ { 0x200b2, 0x104 },
{ 0x10043, 0x5a1 },
{ 0x10143, 0x5a1 },
{ 0x11043, 0x5a1 },
@@ -283,7 +279,7 @@
{ 0x12143, 0x5a1 },
{ 0x13043, 0x5a1 },
{ 0x13143, 0x5a1 },
- { 0x1200b2, 0xdc },
+ { 0x1200b2, 0x104 },
{ 0x110043, 0x5a1 },
{ 0x110143, 0x5a1 },
{ 0x111043, 0x5a1 },
@@ -292,7 +288,7 @@
{ 0x112143, 0x5a1 },
{ 0x113043, 0x5a1 },
{ 0x113143, 0x5a1 },
- { 0x2200b2, 0xdc },
+ { 0x2200b2, 0x104 },
{ 0x210043, 0x5a1 },
{ 0x210143, 0x5a1 },
{ 0x211043, 0x5a1 },
@@ -319,16 +315,21 @@
{ 0x2002d, 0x0 },
{ 0x12002d, 0x0 },
{ 0x22002d, 0x0 },
- { 0x200c7, 0x21 },
- { 0x1200c7, 0x21 },
- { 0x2200c7, 0x21 },
- { 0x200ca, 0x24 },
- { 0x1200ca, 0x24 },
- { 0x2200ca, 0x24 },
+ { 0x2007d, 0x212 },
+ { 0x12007d, 0x212 },
+ { 0x22007d, 0x212 },
+ { 0x2007c, 0x61 },
+ { 0x12007c, 0x61 },
+ { 0x22007c, 0x61 },
+ { 0x1004a, 0x500 },
+ { 0x1104a, 0x500 },
+ { 0x1204a, 0x500 },
+ { 0x1304a, 0x500 },
+ { 0x2002c, 0x0 },
};
/* ddr phy trained csr */
-static struct dram_cfg_param ddr_ddrphy_trained_csr[] = {
+struct dram_cfg_param ddr_ddrphy_trained_csr[] = {
{ 0x200b2, 0x0 },
{ 0x1200b2, 0x0 },
{ 0x2200b2, 0x0 },
@@ -1051,163 +1052,166 @@
};
/* P0 message block paremeter for training firmware */
-static struct dram_cfg_param ddr_fsp0_cfg[] = {
+struct dram_cfg_param ddr_fsp0_cfg[] = {
{ 0xd0000, 0x0 },
- { 0x54003, 0xbb8 },
+ { 0x54003, 0xe88 },
{ 0x54004, 0x2 },
{ 0x54005, 0x2228 },
- { 0x54006, 0x11 },
+ { 0x54006, 0x14 },
{ 0x54008, 0x131f },
{ 0x54009, 0xc8 },
{ 0x5400b, 0x2 },
+ { 0x5400f, 0x100 },
{ 0x54012, 0x110 },
- { 0x54019, 0x2dd4 },
- { 0x5401a, 0x31 },
- { 0x5401b, 0x4d66 },
- { 0x5401c, 0x4d00 },
+ { 0x54019, 0x36e4 },
+ { 0x5401a, 0x33 },
+ { 0x5401b, 0x4866 },
+ { 0x5401c, 0x4800 },
{ 0x5401e, 0x16 },
- { 0x5401f, 0x2dd4 },
- { 0x54020, 0x31 },
- { 0x54021, 0x4d66 },
- { 0x54022, 0x4d00 },
+ { 0x5401f, 0x36e4 },
+ { 0x54020, 0x33 },
+ { 0x54021, 0x4866 },
+ { 0x54022, 0x4800 },
{ 0x54024, 0x16 },
{ 0x5402b, 0x1000 },
{ 0x5402c, 0x1 },
- { 0x54032, 0xd400 },
- { 0x54033, 0x312d },
+ { 0x54032, 0xe400 },
+ { 0x54033, 0x3336 },
{ 0x54034, 0x6600 },
- { 0x54035, 0x4d },
- { 0x54036, 0x4d },
+ { 0x54035, 0x48 },
+ { 0x54036, 0x48 },
{ 0x54037, 0x1600 },
- { 0x54038, 0xd400 },
- { 0x54039, 0x312d },
+ { 0x54038, 0xe400 },
+ { 0x54039, 0x3336 },
{ 0x5403a, 0x6600 },
- { 0x5403b, 0x4d },
- { 0x5403c, 0x4d },
+ { 0x5403b, 0x48 },
+ { 0x5403c, 0x48 },
{ 0x5403d, 0x1600 },
{ 0xd0000, 0x1 },
};
/* P1 message block paremeter for training firmware */
-static struct dram_cfg_param ddr_fsp1_cfg[] = {
+struct dram_cfg_param ddr_fsp1_cfg[] = {
{ 0xd0000, 0x0 },
{ 0x54002, 0x101 },
{ 0x54003, 0x190 },
{ 0x54004, 0x2 },
{ 0x54005, 0x2228 },
- { 0x54006, 0x11 },
+ { 0x54006, 0x14 },
{ 0x54008, 0x121f },
{ 0x54009, 0xc8 },
{ 0x5400b, 0x2 },
+ { 0x5400f, 0x100 },
{ 0x54012, 0x110 },
{ 0x54019, 0x84 },
- { 0x5401a, 0x31 },
- { 0x5401b, 0x4d66 },
- { 0x5401c, 0x4d00 },
+ { 0x5401a, 0x33 },
+ { 0x5401b, 0x4866 },
+ { 0x5401c, 0x4800 },
{ 0x5401e, 0x16 },
{ 0x5401f, 0x84 },
- { 0x54020, 0x31 },
- { 0x54021, 0x4d66 },
- { 0x54022, 0x4d00 },
+ { 0x54020, 0x33 },
+ { 0x54021, 0x4866 },
+ { 0x54022, 0x4800 },
{ 0x54024, 0x16 },
{ 0x5402b, 0x1000 },
{ 0x5402c, 0x1 },
{ 0x54032, 0x8400 },
- { 0x54033, 0x3100 },
+ { 0x54033, 0x3300 },
{ 0x54034, 0x6600 },
- { 0x54035, 0x4d },
- { 0x54036, 0x4d },
+ { 0x54035, 0x48 },
+ { 0x54036, 0x48 },
{ 0x54037, 0x1600 },
{ 0x54038, 0x8400 },
- { 0x54039, 0x3100 },
+ { 0x54039, 0x3300 },
{ 0x5403a, 0x6600 },
- { 0x5403b, 0x4d },
- { 0x5403c, 0x4d },
+ { 0x5403b, 0x48 },
+ { 0x5403c, 0x48 },
{ 0x5403d, 0x1600 },
{ 0xd0000, 0x1 },
};
/* P2 message block paremeter for training firmware */
-static struct dram_cfg_param ddr_fsp2_cfg[] = {
+struct dram_cfg_param ddr_fsp2_cfg[] = {
{ 0xd0000, 0x0 },
{ 0x54002, 0x102 },
{ 0x54003, 0x64 },
{ 0x54004, 0x2 },
{ 0x54005, 0x2228 },
- { 0x54006, 0x11 },
+ { 0x54006, 0x14 },
{ 0x54008, 0x121f },
{ 0x54009, 0xc8 },
{ 0x5400b, 0x2 },
+ { 0x5400f, 0x100 },
{ 0x54012, 0x110 },
{ 0x54019, 0x84 },
- { 0x5401a, 0x31 },
- { 0x5401b, 0x4d66 },
- { 0x5401c, 0x4d00 },
+ { 0x5401a, 0x33 },
+ { 0x5401b, 0x4866 },
+ { 0x5401c, 0x4800 },
{ 0x5401e, 0x16 },
{ 0x5401f, 0x84 },
- { 0x54020, 0x31 },
- { 0x54021, 0x4d66 },
- { 0x54022, 0x4d00 },
+ { 0x54020, 0x33 },
+ { 0x54021, 0x4866 },
+ { 0x54022, 0x4800 },
{ 0x54024, 0x16 },
{ 0x5402b, 0x1000 },
{ 0x5402c, 0x1 },
{ 0x54032, 0x8400 },
- { 0x54033, 0x3100 },
+ { 0x54033, 0x3300 },
{ 0x54034, 0x6600 },
- { 0x54035, 0x4d },
- { 0x54036, 0x4d },
+ { 0x54035, 0x48 },
+ { 0x54036, 0x48 },
{ 0x54037, 0x1600 },
{ 0x54038, 0x8400 },
- { 0x54039, 0x3100 },
+ { 0x54039, 0x3300 },
{ 0x5403a, 0x6600 },
- { 0x5403b, 0x4d },
- { 0x5403c, 0x4d },
+ { 0x5403b, 0x48 },
+ { 0x5403c, 0x48 },
{ 0x5403d, 0x1600 },
{ 0xd0000, 0x1 },
};
/* P0 2D message block paremeter for training firmware */
-static struct dram_cfg_param ddr_fsp0_2d_cfg[] = {
+struct dram_cfg_param ddr_fsp0_2d_cfg[] = {
{ 0xd0000, 0x0 },
- { 0x54003, 0xbb8 },
+ { 0x54003, 0xe88 },
{ 0x54004, 0x2 },
{ 0x54005, 0x2228 },
- { 0x54006, 0x11 },
+ { 0x54006, 0x14 },
{ 0x54008, 0x61 },
{ 0x54009, 0xc8 },
{ 0x5400b, 0x2 },
{ 0x5400f, 0x100 },
{ 0x54010, 0x1f7f },
{ 0x54012, 0x110 },
- { 0x54019, 0x2dd4 },
- { 0x5401a, 0x31 },
- { 0x5401b, 0x4d66 },
- { 0x5401c, 0x4d00 },
+ { 0x54019, 0x36e4 },
+ { 0x5401a, 0x33 },
+ { 0x5401b, 0x4866 },
+ { 0x5401c, 0x4800 },
{ 0x5401e, 0x16 },
- { 0x5401f, 0x2dd4 },
- { 0x54020, 0x31 },
- { 0x54021, 0x4d66 },
- { 0x54022, 0x4d00 },
+ { 0x5401f, 0x36e4 },
+ { 0x54020, 0x33 },
+ { 0x54021, 0x4866 },
+ { 0x54022, 0x4800 },
{ 0x54024, 0x16 },
{ 0x5402b, 0x1000 },
{ 0x5402c, 0x1 },
- { 0x54032, 0xd400 },
- { 0x54033, 0x312d },
+ { 0x54032, 0xe400 },
+ { 0x54033, 0x3336 },
{ 0x54034, 0x6600 },
- { 0x54035, 0x4d },
- { 0x54036, 0x4d },
+ { 0x54035, 0x48 },
+ { 0x54036, 0x48 },
{ 0x54037, 0x1600 },
- { 0x54038, 0xd400 },
- { 0x54039, 0x312d },
+ { 0x54038, 0xe400 },
+ { 0x54039, 0x3336 },
{ 0x5403a, 0x6600 },
- { 0x5403b, 0x4d },
- { 0x5403c, 0x4d },
+ { 0x5403b, 0x48 },
+ { 0x5403c, 0x48 },
{ 0x5403d, 0x1600 },
{ 0xd0000, 0x1 },
};
/* DRAM PHY init engine image */
-static struct dram_cfg_param ddr_phy_pie[] = {
+struct dram_cfg_param ddr_phy_pie[] = {
{ 0xd0000, 0x0 },
{ 0x90000, 0x10 },
{ 0x90001, 0x400 },
@@ -1230,20 +1234,20 @@
{ 0x90035, 0x2 },
{ 0x90036, 0x10 },
{ 0x90037, 0x139 },
- { 0x90038, 0xf },
+ { 0x90038, 0xb },
{ 0x90039, 0x7c0 },
{ 0x9003a, 0x139 },
{ 0x9003b, 0x44 },
- { 0x9003c, 0x630 },
+ { 0x9003c, 0x633 },
{ 0x9003d, 0x159 },
{ 0x9003e, 0x14f },
{ 0x9003f, 0x630 },
{ 0x90040, 0x159 },
{ 0x90041, 0x47 },
- { 0x90042, 0x630 },
+ { 0x90042, 0x633 },
{ 0x90043, 0x149 },
{ 0x90044, 0x4f },
- { 0x90045, 0x630 },
+ { 0x90045, 0x633 },
{ 0x90046, 0x179 },
{ 0x90047, 0x8 },
{ 0x90048, 0xe0 },
@@ -1261,25 +1265,25 @@
{ 0x90054, 0x448 },
{ 0x90055, 0x109 },
{ 0x90056, 0x40 },
- { 0x90057, 0x630 },
+ { 0x90057, 0x633 },
{ 0x90058, 0x179 },
{ 0x90059, 0x1 },
{ 0x9005a, 0x618 },
{ 0x9005b, 0x109 },
{ 0x9005c, 0x40c0 },
- { 0x9005d, 0x630 },
+ { 0x9005d, 0x633 },
{ 0x9005e, 0x149 },
{ 0x9005f, 0x8 },
{ 0x90060, 0x4 },
{ 0x90061, 0x48 },
{ 0x90062, 0x4040 },
- { 0x90063, 0x630 },
+ { 0x90063, 0x633 },
{ 0x90064, 0x149 },
{ 0x90065, 0x0 },
{ 0x90066, 0x4 },
{ 0x90067, 0x48 },
{ 0x90068, 0x40 },
- { 0x90069, 0x630 },
+ { 0x90069, 0x633 },
{ 0x9006a, 0x149 },
{ 0x9006b, 0x10 },
{ 0x9006c, 0x4 },
@@ -1288,22 +1292,22 @@
{ 0x9006f, 0x4 },
{ 0x90070, 0x78 },
{ 0x90071, 0x549 },
- { 0x90072, 0x630 },
+ { 0x90072, 0x633 },
{ 0x90073, 0x159 },
{ 0x90074, 0xd49 },
- { 0x90075, 0x630 },
+ { 0x90075, 0x633 },
{ 0x90076, 0x159 },
{ 0x90077, 0x94a },
- { 0x90078, 0x630 },
+ { 0x90078, 0x633 },
{ 0x90079, 0x159 },
{ 0x9007a, 0x441 },
- { 0x9007b, 0x630 },
+ { 0x9007b, 0x633 },
{ 0x9007c, 0x149 },
{ 0x9007d, 0x42 },
- { 0x9007e, 0x630 },
+ { 0x9007e, 0x633 },
{ 0x9007f, 0x149 },
{ 0x90080, 0x1 },
- { 0x90081, 0x630 },
+ { 0x90081, 0x633 },
{ 0x90082, 0x149 },
{ 0x90083, 0x0 },
{ 0x90084, 0xe0 },
@@ -1329,18 +1333,15 @@
{ 0x90098, 0x18 },
{ 0x90099, 0x4 },
{ 0x9009a, 0x58 },
- { 0x9009b, 0xa },
+ { 0x9009b, 0xb },
{ 0x9009c, 0x10 },
{ 0x9009d, 0x109 },
- { 0x9009e, 0x2 },
+ { 0x9009e, 0x1 },
{ 0x9009f, 0x10 },
{ 0x900a0, 0x109 },
{ 0x900a1, 0x5 },
{ 0x900a2, 0x7c0 },
{ 0x900a3, 0x109 },
- { 0x900a4, 0x10 },
- { 0x900a5, 0x10 },
- { 0x900a6, 0x109 },
{ 0x40000, 0x811 },
{ 0x40020, 0x880 },
{ 0x40040, 0x0 },
@@ -1385,7 +1386,7 @@
{ 0x4002a, 0xc15 },
{ 0x4004a, 0x0 },
{ 0x4006a, 0x0 },
- { 0x4000b, 0x623 },
+ { 0x4000b, 0x625 },
{ 0x4002b, 0x15 },
{ 0x4004b, 0x0 },
{ 0x4006b, 0x0 },
@@ -1397,7 +1398,7 @@
{ 0x4002d, 0xc1a },
{ 0x4004d, 0x0 },
{ 0x4006d, 0x0 },
- { 0x4000e, 0x623 },
+ { 0x4000e, 0x625 },
{ 0x4002e, 0x1a },
{ 0x4004e, 0x0 },
{ 0x4006e, 0x0 },
@@ -1449,17 +1450,20 @@
{ 0x4003a, 0x880 },
{ 0x4005a, 0x0 },
{ 0x4007a, 0x0 },
- { 0x900a7, 0x0 },
- { 0x900a8, 0x790 },
- { 0x900a9, 0x11a },
- { 0x900aa, 0x8 },
- { 0x900ab, 0x7aa },
+ { 0x900a4, 0x0 },
+ { 0x900a5, 0x790 },
+ { 0x900a6, 0x11a },
+ { 0x900a7, 0x8 },
+ { 0x900a8, 0x7aa },
+ { 0x900a9, 0x2a },
+ { 0x900aa, 0x10 },
+ { 0x900ab, 0x7b2 },
{ 0x900ac, 0x2a },
- { 0x900ad, 0x10 },
- { 0x900ae, 0x7b2 },
- { 0x900af, 0x2a },
- { 0x900b0, 0x0 },
- { 0x900b1, 0x7c8 },
+ { 0x900ad, 0x0 },
+ { 0x900ae, 0x7c8 },
+ { 0x900af, 0x109 },
+ { 0x900b0, 0x10 },
+ { 0x900b1, 0x10 },
{ 0x900b2, 0x109 },
{ 0x900b3, 0x10 },
{ 0x900b4, 0x2a8 },
@@ -1557,7 +1561,7 @@
{ 0x90110, 0x0 },
{ 0x90111, 0x8b10 },
{ 0x90112, 0x168 },
- { 0x90113, 0x0 },
+ { 0x90113, 0x1 },
{ 0x90114, 0xab10 },
{ 0x90115, 0x168 },
{ 0x90116, 0x0 },
@@ -1608,7 +1612,7 @@
{ 0x90143, 0xf },
{ 0x90144, 0x408 },
{ 0x90145, 0x169 },
- { 0x90146, 0xc },
+ { 0x90146, 0xd },
{ 0x90147, 0x0 },
{ 0x90148, 0x68 },
{ 0x90149, 0x0 },
@@ -1626,67 +1630,58 @@
{ 0x90155, 0x20 },
{ 0x90156, 0x2aa },
{ 0x90157, 0x9 },
- { 0x90158, 0x0 },
- { 0x90159, 0x400 },
- { 0x9015a, 0x10e },
- { 0x9015b, 0x8 },
- { 0x9015c, 0xe8 },
- { 0x9015d, 0x109 },
- { 0x9015e, 0x0 },
- { 0x9015f, 0x8140 },
- { 0x90160, 0x10c },
- { 0x90161, 0x10 },
- { 0x90162, 0x8138 },
- { 0x90163, 0x10c },
- { 0x90164, 0x8 },
- { 0x90165, 0x7c8 },
- { 0x90166, 0x101 },
- { 0x90167, 0x8 },
- { 0x90168, 0x0 },
- { 0x90169, 0x8 },
- { 0x9016a, 0x8 },
- { 0x9016b, 0x448 },
+ { 0x90158, 0x8 },
+ { 0x90159, 0xe8 },
+ { 0x9015a, 0x109 },
+ { 0x9015b, 0x0 },
+ { 0x9015c, 0x8140 },
+ { 0x9015d, 0x10c },
+ { 0x9015e, 0x10 },
+ { 0x9015f, 0x8138 },
+ { 0x90160, 0x104 },
+ { 0x90161, 0x8 },
+ { 0x90162, 0x448 },
+ { 0x90163, 0x109 },
+ { 0x90164, 0xf },
+ { 0x90165, 0x7c0 },
+ { 0x90166, 0x109 },
+ { 0x90167, 0x0 },
+ { 0x90168, 0xe8 },
+ { 0x90169, 0x109 },
+ { 0x9016a, 0x47 },
+ { 0x9016b, 0x630 },
{ 0x9016c, 0x109 },
- { 0x9016d, 0xf },
- { 0x9016e, 0x7c0 },
+ { 0x9016d, 0x8 },
+ { 0x9016e, 0x618 },
{ 0x9016f, 0x109 },
- { 0x90170, 0x0 },
- { 0x90171, 0xe8 },
+ { 0x90170, 0x8 },
+ { 0x90171, 0xe0 },
{ 0x90172, 0x109 },
- { 0x90173, 0x47 },
- { 0x90174, 0x630 },
+ { 0x90173, 0x0 },
+ { 0x90174, 0x7c8 },
{ 0x90175, 0x109 },
{ 0x90176, 0x8 },
- { 0x90177, 0x618 },
- { 0x90178, 0x109 },
- { 0x90179, 0x8 },
- { 0x9017a, 0xe0 },
+ { 0x90177, 0x8140 },
+ { 0x90178, 0x10c },
+ { 0x90179, 0x0 },
+ { 0x9017a, 0x478 },
{ 0x9017b, 0x109 },
{ 0x9017c, 0x0 },
- { 0x9017d, 0x7c8 },
- { 0x9017e, 0x109 },
+ { 0x9017d, 0x1 },
+ { 0x9017e, 0x8 },
{ 0x9017f, 0x8 },
- { 0x90180, 0x8140 },
- { 0x90181, 0x10c },
- { 0x90182, 0x0 },
- { 0x90183, 0x1 },
- { 0x90184, 0x8 },
- { 0x90185, 0x8 },
- { 0x90186, 0x4 },
- { 0x90187, 0x8 },
- { 0x90188, 0x8 },
- { 0x90189, 0x7c8 },
- { 0x9018a, 0x101 },
- { 0x90006, 0x0 },
- { 0x90007, 0x0 },
- { 0x90008, 0x8 },
+ { 0x90180, 0x4 },
+ { 0x90181, 0x0 },
+ { 0x90006, 0x8 },
+ { 0x90007, 0x7c8 },
+ { 0x90008, 0x109 },
{ 0x90009, 0x0 },
- { 0x9000a, 0x0 },
- { 0x9000b, 0x0 },
+ { 0x9000a, 0x400 },
+ { 0x9000b, 0x106 },
{ 0xd00e7, 0x400 },
{ 0x90017, 0x0 },
- { 0x9001f, 0x2a },
- { 0x90026, 0x6a },
+ { 0x9001f, 0x29 },
+ { 0x90026, 0x68 },
{ 0x400d0, 0x0 },
{ 0x400d1, 0x101 },
{ 0x400d2, 0x105 },
@@ -1696,9 +1691,10 @@
{ 0x400d6, 0x20a },
{ 0x400d7, 0x20b },
{ 0x2003a, 0x2 },
- { 0x2000b, 0x5d },
- { 0x2000c, 0xbb },
- { 0x2000d, 0x753 },
+ { 0x200be, 0x3 },
+ { 0x2000b, 0x74 },
+ { 0x2000c, 0xe8 },
+ { 0x2000d, 0x915 },
{ 0x2000e, 0x2c },
{ 0x12000b, 0xc },
{ 0x12000c, 0x19 },
@@ -1714,14 +1710,10 @@
{ 0x9000f, 0x6110 },
{ 0x90010, 0x2152 },
{ 0x90011, 0xdfbd },
- { 0x90012, 0x60 },
+ { 0x90012, 0x2060 },
{ 0x90013, 0x6152 },
{ 0x20010, 0x5a },
{ 0x20011, 0x3 },
- { 0x120010, 0x5a },
- { 0x120011, 0x3 },
- { 0x220010, 0x5a },
- { 0x220011, 0x3 },
{ 0x40080, 0xe0 },
{ 0x40081, 0x12 },
{ 0x40082, 0xe0 },
@@ -1797,15 +1789,16 @@
{ 0x136b4, 0x1 },
{ 0x137b4, 0x1 },
{ 0x138b4, 0x1 },
- { 0x2003a, 0x2 },
+ { 0x20089, 0x1 },
+ { 0x20088, 0x19 },
{ 0xc0080, 0x2 },
{ 0xd0000, 0x1 }
};
-static struct dram_fsp_msg ddr_dram_fsp_msg[] = {
+struct dram_fsp_msg ddr_dram_fsp_msg[] = {
{
- /* P0 3000mts 1D */
- .drate = 3000,
+ /* P0 3732mts 1D */
+ .drate = 3732,
.fw_type = FW_1D_IMAGE,
.fsp_cfg = ddr_fsp0_cfg,
.fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_cfg),
@@ -1825,8 +1818,8 @@
.fsp_cfg_num = ARRAY_SIZE(ddr_fsp2_cfg),
},
{
- /* P0 3000mts 2D */
- .drate = 3000,
+ /* P0 3732mts 2D */
+ .drate = 3732,
.fw_type = FW_2D_IMAGE,
.fsp_cfg = ddr_fsp0_2d_cfg,
.fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_2d_cfg),
@@ -1834,7 +1827,7 @@
};
/* ddr timing config params */
-struct dram_timing_info dram_timing_512mb = {
+struct dram_timing_info dram_timing = {
.ddrc_cfg = ddr_ddrc_cfg,
.ddrc_cfg_num = ARRAY_SIZE(ddr_ddrc_cfg),
.ddrphy_cfg = ddr_ddrphy_cfg,
@@ -1845,5 +1838,6 @@
.ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr),
.ddrphy_pie = ddr_phy_pie,
.ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
- .fsp_table = { 3000, 400, 100, },
+ .fsp_table = { 3732, 400, 100, },
};
+
diff --git a/board/polyhex/imx8mp_debix_model_a/spl.c b/board/polyhex/imx8mp_debix_model_a/spl.c
new file mode 100644
index 0000000..eb904e1
--- /dev/null
+++ b/board/polyhex/imx8mp_debix_model_a/spl.c
@@ -0,0 +1,129 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Copyright 2018-2019, 2021 NXP
+ * Copyright 2023 Gilles Talis <gilles.talis@gmail.com>
+ */
+
+#include <asm/arch/clock.h>
+#include <asm/arch/ddr.h>
+#include <asm/arch/imx8mp_pins.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/global_data.h>
+#include <asm/mach-imx/boot_mode.h>
+#include <asm/sections.h>
+#include <common.h>
+#include <dm/device.h>
+#include <dm/uclass.h>
+#include <hang.h>
+#include <init.h>
+#include <log.h>
+#include <power/pca9450.h>
+#include <power/pmic.h>
+#include <spl.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int spl_board_boot_device(enum boot_device boot_dev_spl)
+{
+ return BOOT_DEVICE_BOOTROM;
+}
+
+void spl_dram_init(void)
+{
+ ddr_init(&dram_timing);
+}
+
+void spl_board_init(void)
+{
+ /*
+ * Set GIC clock to 500Mhz for OD VDD_SOC. Kernel driver does
+ * not allow to change it. Should set the clock after PMIC
+ * setting done. Default is 400Mhz (system_pll1_800m with div = 2)
+ * set by ROM for ND VDD_SOC
+ */
+ clock_enable(CCGR_GIC, 0);
+ clock_set_target_val(GIC_CLK_ROOT, CLK_ROOT_ON | CLK_ROOT_SOURCE_SEL(5));
+ clock_enable(CCGR_GIC, 1);
+
+ puts("Normal Boot\n");
+}
+
+static int power_init_board(void)
+{
+ struct udevice *dev;
+ int ret;
+
+ ret = pmic_get("pmic@25", &dev);
+ if (ret == -ENODEV) {
+ puts("Failed to get PMIC\n");
+ return 0;
+ }
+ if (ret != 0)
+ return ret;
+
+ /* BUCKxOUT_DVS0/1 control BUCK123 output. */
+ pmic_reg_write(dev, PCA9450_BUCK123_DVS, 0x29);
+
+ /* Increase VDD_SOC to typical value 0.95V before first DRAM access. */
+ if (IS_ENABLED(CONFIG_IMX8M_VDD_SOC_850MV))
+ /* Set DVS0 to 0.85V for special case. */
+ pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, 0x14);
+ else
+ pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, 0x1c);
+
+ /* Set DVS1 to 0.85v for suspend. */
+ pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS1, 0x14);
+
+ /*
+ * Enable DVS control through PMIC_STBY_REQ and
+ * set B1_ENMODE=1 (ON by PMIC_ON_REQ=H).
+ */
+ pmic_reg_write(dev, PCA9450_BUCK1CTRL, 0x59);
+
+ /*
+ * Kernel uses OD/OD frequency for SoC.
+ * To avoid timing risk from SoC to ARM,
+ * increase VDD_ARM to OD voltage 0.95V
+ */
+ pmic_reg_write(dev, PCA9450_BUCK2OUT_DVS0, 0x1C);
+
+ return 0;
+}
+
+int board_fit_config_name_match(const char *name)
+{
+ if (is_imx8mp() &&
+ !strcmp(name, "imx8mp-debix-model-a"))
+ return 0;
+
+ return -1;
+}
+
+void board_init_f(ulong dummy)
+{
+ int ret;
+
+ arch_cpu_init();
+
+ init_uart_clk(1);
+
+ /* Clear the BSS. */
+ memset(__bss_start, 0, __bss_end - __bss_start);
+
+ ret = spl_init();
+ if (ret) {
+ debug("spl_init() failed: %d\n", ret);
+ hang();
+ }
+
+ preloader_console_init();
+
+ enable_tzc380();
+
+ power_init_board();
+
+ /* DDR initialization */
+ spl_dram_init();
+
+ board_init_r(NULL, 0);
+}
diff --git a/board/purism/librem5/librem5.c b/board/purism/librem5/librem5.c
index 386ed1b..d0249e7 100644
--- a/board/purism/librem5/librem5.c
+++ b/board/purism/librem5/librem5.c
@@ -399,21 +399,46 @@
int board_late_init(void)
{
if (IS_ENABLED(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG)) {
- u32 rev;
+ /*
+ * Use the r4 dtb by default as those are the most
+ * widespread devices.
+ */
+ u32 rev, dtb_rev = 4;
char rev_str[3];
+ char fdt_str[50];
env_set("board_name", "librem5");
if (fuse_read(9, 0, &rev)) {
env_set("board_rev", BOARD_REV_ERROR);
} else if (rev == 0) {
+ /*
+ * If the fuses aren't burnt we should use either the
+ * r2 or r3 DTB. The latter makes more sense as there
+ * are far more r3 devices out there.
+ */
+ dtb_rev = 3;
env_set("board_rev", BOARD_REV_UNKNOWN);
} else if (rev > 0) {
+ if (rev == 1)
+ dtb_rev = 2;
+ else if (rev < dtb_rev)
+ dtb_rev = rev;
+ /*
+ * FCC-approved devices report '5' as their board
+ * revision but use the r4 DTB as the PCB's are
+ * functionally identical.
+ */
+ else if (rev == 5)
+ dtb_rev = 4;
sprintf(rev_str, "%u", rev);
env_set("board_rev", rev_str);
}
printf("Board name: %s\n", env_get("board_name"));
printf("Board rev: %s\n", env_get("board_rev"));
+
+ sprintf(fdt_str, "freescale/imx8mq-librem5-r%u.dtb", dtb_rev);
+ env_set("fdtfile", fdt_str);
}
if (is_usb_boot()) {
diff --git a/board/qualcomm/dragonboard410c/dragonboard410c.c b/board/qualcomm/dragonboard410c/dragonboard410c.c
index 371b326..350e0e9 100644
--- a/board/qualcomm/dragonboard410c/dragonboard410c.c
+++ b/board/qualcomm/dragonboard410c/dragonboard410c.c
@@ -5,6 +5,7 @@
* (C) Copyright 2015 Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
*/
+#include <button.h>
#include <common.h>
#include <cpu_func.h>
#include <dm.h>
@@ -108,32 +109,20 @@
/* Check for vol- button - if pressed - stop autoboot */
int misc_init_r(void)
{
- struct udevice *pon;
- struct gpio_desc resin;
- int node, ret;
+ struct udevice *btn;
+ int ret;
+ enum button_state_t state;
- ret = uclass_get_device_by_name(UCLASS_GPIO, "pm8916_pon@800", &pon);
+ ret = button_get_by_label("vol_down", &btn);
if (ret < 0) {
- printf("Failed to find PMIC pon node. Check device tree\n");
- return 0;
+ printf("Couldn't find power button!\n");
+ return ret;
}
- node = fdt_subnode_offset(gd->fdt_blob, dev_of_offset(pon),
- "key_vol_down");
- if (node < 0) {
- printf("Failed to find key_vol_down node. Check device tree\n");
- return 0;
- }
-
- if (gpio_request_by_name_nodev(offset_to_ofnode(node), "gpios", 0,
- &resin, 0)) {
- printf("Failed to request key_vol_down button.\n");
- return 0;
- }
-
- if (dm_gpio_get_value(&resin)) {
+ state = button_get_state(btn);
+ if (state == BUTTON_ON) {
env_set("preboot", "setenv preboot; fastboot 0");
- printf("key_vol_down pressed - Starting fastboot.\n");
+ printf("vol_down pressed - Starting fastboot.\n");
}
return 0;
diff --git a/board/qualcomm/dragonboard820c/dragonboard820c.c b/board/qualcomm/dragonboard820c/dragonboard820c.c
index f9cc762..2f0db62 100644
--- a/board/qualcomm/dragonboard820c/dragonboard820c.c
+++ b/board/qualcomm/dragonboard820c/dragonboard820c.c
@@ -5,9 +5,9 @@
* (C) Copyright 2017 Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
*/
+#include <button.h>
#include <cpu_func.h>
#include <init.h>
-#include <asm/arch/sysmap-apq8096.h>
#include <env.h>
#include <asm/cache.h>
#include <asm/global_data.h>
@@ -20,6 +20,11 @@
#include <asm/psci.h>
#include <asm/gpio.h>
+#define TLMM_BASE_ADDR (0x1010000)
+
+/* Strength (sdc1) */
+#define SDC1_HDRV_PULL_CTL_REG (TLMM_BASE_ADDR + 0x0012D000)
+
DECLARE_GLOBAL_DATA_PTR;
int dram_init(void)
@@ -135,30 +140,18 @@
/* Check for vol- button - if pressed - stop autoboot */
int misc_init_r(void)
{
- struct udevice *pon;
- struct gpio_desc resin;
- int node, ret;
+ struct udevice *btn;
+ int ret;
+ enum button_state_t state;
- ret = uclass_get_device_by_name(UCLASS_GPIO, "pm8994_pon@800", &pon);
+ ret = button_get_by_label("pwrkey", &btn);
if (ret < 0) {
- printf("Failed to find PMIC pon node. Check device tree\n");
- return 0;
+ printf("Couldn't find power button!\n");
+ return ret;
}
- node = fdt_subnode_offset(gd->fdt_blob, dev_of_offset(pon),
- "key_vol_down");
- if (node < 0) {
- printf("Failed to find key_vol_down node. Check device tree\n");
- return 0;
- }
-
- if (gpio_request_by_name_nodev(offset_to_ofnode(node), "gpios", 0,
- &resin, 0)) {
- printf("Failed to request key_vol_down button.\n");
- return 0;
- }
-
- if (dm_gpio_get_value(&resin)) {
+ state = button_get_state(btn);
+ if (state == BUTTON_ON) {
env_set("bootdelay", "-1");
printf("Power button pressed - dropping to console.\n");
}
diff --git a/board/renesas/alt/alt.c b/board/renesas/alt/alt.c
index 85fbaf0..be77cad 100644
--- a/board/renesas/alt/alt.c
+++ b/board/renesas/alt/alt.c
@@ -5,7 +5,6 @@
* Copyright (C) 2014, 2015 Renesas Electronics Corporation
*/
-#include <common.h>
#include <cpu_func.h>
#include <env.h>
#include <hang.h>
diff --git a/board/renesas/alt/alt_spl.c b/board/renesas/alt/alt_spl.c
index cdaa04e..fc9dac5 100644
--- a/board/renesas/alt/alt_spl.c
+++ b/board/renesas/alt/alt_spl.c
@@ -5,7 +5,6 @@
* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
*/
-#include <common.h>
#include <cpu_func.h>
#include <init.h>
#include <malloc.h>
diff --git a/board/renesas/alt/qos.c b/board/renesas/alt/qos.c
index 2f65750..38dfa64 100644
--- a/board/renesas/alt/qos.c
+++ b/board/renesas/alt/qos.c
@@ -6,7 +6,6 @@
*
*/
-#include <common.h>
#include <asm/processor.h>
#include <asm/mach-types.h>
#include <asm/io.h>
diff --git a/board/renesas/blanche/blanche.c b/board/renesas/blanche/blanche.c
index 8e1ae29..c6ecea2 100644
--- a/board/renesas/blanche/blanche.c
+++ b/board/renesas/blanche/blanche.c
@@ -6,7 +6,6 @@
* Copyright (C) 2016 Renesas Electronics Corporation
*/
-#include <common.h>
#include <cpu_func.h>
#include <init.h>
#include <net.h>
diff --git a/board/renesas/blanche/qos.c b/board/renesas/blanche/qos.c
index e3ad83e..3134b36 100644
--- a/board/renesas/blanche/qos.c
+++ b/board/renesas/blanche/qos.c
@@ -5,7 +5,6 @@
* Copyright (C) 2016 Renesas Electronics Corporation
*/
-#include <common.h>
#include <asm/processor.h>
#include <asm/mach-types.h>
#include <asm/io.h>
diff --git a/board/renesas/draak/draak.c b/board/renesas/draak/draak.c
index 1ed72d3..06a3a83 100644
--- a/board/renesas/draak/draak.c
+++ b/board/renesas/draak/draak.c
@@ -6,7 +6,6 @@
* Copyright (C) 2017 Marek Vasut <marek.vasut+renesas@gmail.com>
*/
-#include <common.h>
#include <cpu_func.h>
#include <hang.h>
#include <init.h>
diff --git a/board/renesas/falcon/falcon.c b/board/renesas/falcon/falcon.c
index 0aa0f1a..cd86bb3 100644
--- a/board/renesas/falcon/falcon.c
+++ b/board/renesas/falcon/falcon.c
@@ -6,7 +6,6 @@
* Copyright (C) 2020 Renesas Electronics Corp.
*/
-#include <common.h>
#include <asm/arch/rmobile.h>
#include <asm/arch/sys_proto.h>
#include <asm/global_data.h>
@@ -15,6 +14,7 @@
#include <asm/processor.h>
#include <linux/errno.h>
#include <asm/system.h>
+#include <asm/u-boot.h>
DECLARE_GLOBAL_DATA_PTR;
diff --git a/board/renesas/gose/gose.c b/board/renesas/gose/gose.c
index 2d1435a..6edbdac 100644
--- a/board/renesas/gose/gose.c
+++ b/board/renesas/gose/gose.c
@@ -5,7 +5,6 @@
* Copyright (C) 2014 Renesas Electronics Corporation
*/
-#include <common.h>
#include <clock_legacy.h>
#include <cpu_func.h>
#include <env.h>
diff --git a/board/renesas/gose/gose_spl.c b/board/renesas/gose/gose_spl.c
index c0bf720..87126a0 100644
--- a/board/renesas/gose/gose_spl.c
+++ b/board/renesas/gose/gose_spl.c
@@ -5,7 +5,6 @@
* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
*/
-#include <common.h>
#include <cpu_func.h>
#include <init.h>
#include <malloc.h>
diff --git a/board/renesas/gose/qos.c b/board/renesas/gose/qos.c
index 1c4ebfc..9944df7 100644
--- a/board/renesas/gose/qos.c
+++ b/board/renesas/gose/qos.c
@@ -6,7 +6,6 @@
* Copyright (C) 2014 Renesas Electronics Corporation
*/
-#include <common.h>
#include <asm/processor.h>
#include <asm/mach-types.h>
#include <asm/io.h>
diff --git a/board/renesas/grpeach/grpeach.c b/board/renesas/grpeach/grpeach.c
index f609e4f..c475c3f 100644
--- a/board/renesas/grpeach/grpeach.c
+++ b/board/renesas/grpeach/grpeach.c
@@ -4,12 +4,13 @@
* Copyright (C) Chris Brandt
*/
-#include <common.h>
#include <cpu_func.h>
+#include <errno.h>
#include <init.h>
#include <asm/global_data.h>
#include <asm/io.h>
#include <asm/arch/sys_proto.h>
+#include <asm/u-boot.h>
#define RZA1_WDT_BASE 0xfcfe0000
#define WTCSR 0x00
diff --git a/board/renesas/koelsch/koelsch.c b/board/renesas/koelsch/koelsch.c
index c3ebcd3..ee5597a 100644
--- a/board/renesas/koelsch/koelsch.c
+++ b/board/renesas/koelsch/koelsch.c
@@ -6,7 +6,6 @@
*
*/
-#include <common.h>
#include <clock_legacy.h>
#include <cpu_func.h>
#include <env.h>
diff --git a/board/renesas/koelsch/koelsch_spl.c b/board/renesas/koelsch/koelsch_spl.c
index b377f70..7581920 100644
--- a/board/renesas/koelsch/koelsch_spl.c
+++ b/board/renesas/koelsch/koelsch_spl.c
@@ -5,7 +5,6 @@
* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
*/
-#include <common.h>
#include <cpu_func.h>
#include <init.h>
#include <malloc.h>
diff --git a/board/renesas/koelsch/qos.c b/board/renesas/koelsch/qos.c
index f884e5f..70cd117 100644
--- a/board/renesas/koelsch/qos.c
+++ b/board/renesas/koelsch/qos.c
@@ -6,7 +6,6 @@
*
*/
-#include <common.h>
#include <asm/processor.h>
#include <asm/mach-types.h>
#include <asm/io.h>
diff --git a/board/renesas/lager/lager.c b/board/renesas/lager/lager.c
index 1437875..0daad0b 100644
--- a/board/renesas/lager/lager.c
+++ b/board/renesas/lager/lager.c
@@ -7,7 +7,6 @@
* Copyright (C) 2013 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
*/
-#include <common.h>
#include <clock_legacy.h>
#include <cpu_func.h>
#include <env.h>
diff --git a/board/renesas/lager/lager_spl.c b/board/renesas/lager/lager_spl.c
index d3d397e..df3e240 100644
--- a/board/renesas/lager/lager_spl.c
+++ b/board/renesas/lager/lager_spl.c
@@ -5,7 +5,6 @@
* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
*/
-#include <common.h>
#include <cpu_func.h>
#include <init.h>
#include <malloc.h>
diff --git a/board/renesas/lager/qos.c b/board/renesas/lager/qos.c
index f01ca2f..ddc831c 100644
--- a/board/renesas/lager/qos.c
+++ b/board/renesas/lager/qos.c
@@ -5,7 +5,6 @@
* Copyright (C) 2013,2014 Renesas Electronics Corporation
*/
-#include <common.h>
#include <asm/processor.h>
#include <asm/mach-types.h>
#include <asm/io.h>
diff --git a/board/renesas/porter/porter.c b/board/renesas/porter/porter.c
index db1fb4b..2e6051a 100644
--- a/board/renesas/porter/porter.c
+++ b/board/renesas/porter/porter.c
@@ -6,7 +6,6 @@
* Copyright (C) 2015 Cogent Embedded, Inc.
*/
-#include <common.h>
#include <clock_legacy.h>
#include <cpu_func.h>
#include <env.h>
diff --git a/board/renesas/porter/porter_spl.c b/board/renesas/porter/porter_spl.c
index 8595770..039fc7b 100644
--- a/board/renesas/porter/porter_spl.c
+++ b/board/renesas/porter/porter_spl.c
@@ -5,7 +5,6 @@
* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
*/
-#include <common.h>
#include <cpu_func.h>
#include <init.h>
#include <malloc.h>
diff --git a/board/renesas/porter/qos.c b/board/renesas/porter/qos.c
index bca54f7..e4d8f3d 100644
--- a/board/renesas/porter/qos.c
+++ b/board/renesas/porter/qos.c
@@ -7,7 +7,6 @@
*
*/
-#include <common.h>
#include <asm/processor.h>
#include <asm/mach-types.h>
#include <asm/io.h>
diff --git a/board/renesas/r2dplus/r2dplus.c b/board/renesas/r2dplus/r2dplus.c
index 4b9959a..78b8cb4 100644
--- a/board/renesas/r2dplus/r2dplus.c
+++ b/board/renesas/r2dplus/r2dplus.c
@@ -4,7 +4,6 @@
* Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
*/
-#include <common.h>
#include <ide.h>
#include <init.h>
#include <net.h>
diff --git a/board/renesas/rcar-common/common.c b/board/renesas/rcar-common/common.c
index ed3f093..66eb6a2 100644
--- a/board/renesas/rcar-common/common.c
+++ b/board/renesas/rcar-common/common.c
@@ -7,7 +7,6 @@
* Copyright (C) 2015 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
*/
-#include <common.h>
#include <dm.h>
#include <fdt_support.h>
#include <hang.h>
diff --git a/board/renesas/rcar-common/gen3-spl.c b/board/renesas/rcar-common/gen3-spl.c
index b02a946..44a20ce 100644
--- a/board/renesas/rcar-common/gen3-spl.c
+++ b/board/renesas/rcar-common/gen3-spl.c
@@ -5,7 +5,6 @@
* Copyright (C) 2019 Marek Vasut <marek.vasut@gmail.com>
*/
-#include <common.h>
#include <cpu_func.h>
#include <image.h>
#include <init.h>
diff --git a/board/renesas/rcar-common/v3-common.c b/board/renesas/rcar-common/v3-common.c
index 7c6202e..26c589d 100644
--- a/board/renesas/rcar-common/v3-common.c
+++ b/board/renesas/rcar-common/v3-common.c
@@ -3,8 +3,8 @@
* Copyright (C) 2017-2023 Marek Vasut <marek.vasut+renesas@mailbox.org>
*/
-#include <common.h>
#include <clock_legacy.h>
+#include <asm/arch/rmobile.h>
#include <asm/io.h>
#define CPGWPR 0xE6150900
diff --git a/board/renesas/salvator-x/salvator-x.c b/board/renesas/salvator-x/salvator-x.c
index 939b48e..d8312dd 100644
--- a/board/renesas/salvator-x/salvator-x.c
+++ b/board/renesas/salvator-x/salvator-x.c
@@ -7,7 +7,6 @@
* Copyright (C) 2015 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
*/
-#include <common.h>
#include <cpu_func.h>
#include <image.h>
#include <init.h>
diff --git a/board/renesas/silk/qos.c b/board/renesas/silk/qos.c
index 43a2989..bdd7646 100644
--- a/board/renesas/silk/qos.c
+++ b/board/renesas/silk/qos.c
@@ -7,7 +7,6 @@
*
*/
-#include <common.h>
#include <asm/processor.h>
#include <asm/mach-types.h>
#include <asm/io.h>
diff --git a/board/renesas/silk/silk.c b/board/renesas/silk/silk.c
index 6ecebfe..18ff759 100644
--- a/board/renesas/silk/silk.c
+++ b/board/renesas/silk/silk.c
@@ -6,7 +6,6 @@
* Copyright (C) 2015 Cogent Embedded, Inc.
*/
-#include <common.h>
#include <cpu_func.h>
#include <env.h>
#include <hang.h>
diff --git a/board/renesas/silk/silk_spl.c b/board/renesas/silk/silk_spl.c
index afb9f85..b899442 100644
--- a/board/renesas/silk/silk_spl.c
+++ b/board/renesas/silk/silk_spl.c
@@ -5,7 +5,6 @@
* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
*/
-#include <common.h>
#include <cpu_func.h>
#include <init.h>
#include <malloc.h>
diff --git a/board/renesas/spider/spider.c b/board/renesas/spider/spider.c
index fd83a72..1eb75a6 100644
--- a/board/renesas/spider/spider.c
+++ b/board/renesas/spider/spider.c
@@ -6,7 +6,6 @@
* Copyright (C) 2021 Renesas Electronics Corp.
*/
-#include <common.h>
#include <asm/arch/rmobile.h>
#include <asm/arch/sys_proto.h>
#include <asm/global_data.h>
diff --git a/board/renesas/stout/cpld.c b/board/renesas/stout/cpld.c
index b7c75f5..f5bb549 100644
--- a/board/renesas/stout/cpld.c
+++ b/board/renesas/stout/cpld.c
@@ -7,7 +7,6 @@
* Copyright (C) 2015 Cogent Embedded, Inc.
*/
-#include <common.h>
#include <command.h>
#include <cpu_func.h>
#include <asm/io.h>
diff --git a/board/renesas/stout/qos.c b/board/renesas/stout/qos.c
index c2f0b85..9030ba7 100644
--- a/board/renesas/stout/qos.c
+++ b/board/renesas/stout/qos.c
@@ -7,7 +7,6 @@
* Copyright (C) 2015 Cogent Embedded, Inc.
*/
-#include <common.h>
#include <asm/processor.h>
#include <asm/mach-types.h>
#include <asm/io.h>
diff --git a/board/renesas/stout/stout.c b/board/renesas/stout/stout.c
index f069ecc..131deac 100644
--- a/board/renesas/stout/stout.c
+++ b/board/renesas/stout/stout.c
@@ -8,7 +8,6 @@
* Copyright (C) 2015 Cogent Embedded, Inc.
*/
-#include <common.h>
#include <clock_legacy.h>
#include <env.h>
#include <init.h>
diff --git a/board/renesas/stout/stout_spl.c b/board/renesas/stout/stout_spl.c
index c37c055..8ec0216 100644
--- a/board/renesas/stout/stout_spl.c
+++ b/board/renesas/stout/stout_spl.c
@@ -5,7 +5,6 @@
* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
*/
-#include <common.h>
#include <cpu_func.h>
#include <init.h>
#include <malloc.h>
diff --git a/board/renesas/ulcb/cpld.c b/board/renesas/ulcb/cpld.c
index 0c060a5..e72e45e 100644
--- a/board/renesas/ulcb/cpld.c
+++ b/board/renesas/ulcb/cpld.c
@@ -6,7 +6,6 @@
* Copyright (C) 2017 Cogent Embedded, Inc.
*/
-#include <common.h>
#include <command.h>
#include <asm/gpio.h>
#include <asm/io.h>
diff --git a/board/renesas/ulcb/ulcb.c b/board/renesas/ulcb/ulcb.c
index 1477750..b2a16b0 100644
--- a/board/renesas/ulcb/ulcb.c
+++ b/board/renesas/ulcb/ulcb.c
@@ -6,7 +6,6 @@
* Copyright (C) 2017 Renesas Electronics Corporation
*/
-#include <common.h>
#include <image.h>
#include <init.h>
#include <malloc.h>
diff --git a/board/renesas/v3hsk/cpld.c b/board/renesas/v3hsk/cpld.c
index 6016f6d..1272aec 100644
--- a/board/renesas/v3hsk/cpld.c
+++ b/board/renesas/v3hsk/cpld.c
@@ -7,7 +7,6 @@
*
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <i2c.h>
diff --git a/board/renesas/v3msk/cpld.c b/board/renesas/v3msk/cpld.c
index aed616a..260755a 100644
--- a/board/renesas/v3msk/cpld.c
+++ b/board/renesas/v3msk/cpld.c
@@ -7,7 +7,6 @@
*
*/
-#include <common.h>
#include <asm/gpio.h>
#include <asm/io.h>
#include <dm.h>
diff --git a/board/renesas/whitehawk/whitehawk.c b/board/renesas/whitehawk/whitehawk.c
index 32284b2..a72f5e0 100644
--- a/board/renesas/whitehawk/whitehawk.c
+++ b/board/renesas/whitehawk/whitehawk.c
@@ -6,7 +6,6 @@
* Copyright (C) 2021 Renesas Electronics Corp.
*/
-#include <common.h>
#include <asm/arch/rmobile.h>
#include <asm/arch/sys_proto.h>
#include <asm/global_data.h>
@@ -32,7 +31,7 @@
static void init_gic_v3(void)
{
- /* GIC v3 power on */
+ /* GIC v3 power on */
writel(BIT(1), GICR_LPI_PWRR);
/* Wait till the WAKER_CA_BIT changes to 0 */
diff --git a/board/rockchip/evb_rk3328/MAINTAINERS b/board/rockchip/evb_rk3328/MAINTAINERS
index 8a19eb3..5fc114a 100644
--- a/board/rockchip/evb_rk3328/MAINTAINERS
+++ b/board/rockchip/evb_rk3328/MAINTAINERS
@@ -11,6 +11,12 @@
F: configs/nanopi-r2c-rk3328_defconfig
F: arch/arm/dts/rk3328-nanopi-r2c-u-boot.dtsi
+NANOPI-R2C-PLUS-RK3328
+M: Tianling Shen <cnsztl@gmail.com>
+S: Maintained
+F: configs/nanopi-r2c-plus-rk3328_defconfig
+F: arch/arm/dts/rk3328-nanopi-r2c-plus-u-boot.dtsi
+
NANOPI-R2S-RK3328
M: David Bauer <mail@david-bauer.net>
S: Maintained
diff --git a/board/rockchip/evb_rk3399/MAINTAINERS b/board/rockchip/evb_rk3399/MAINTAINERS
index c7e412b..acdb840 100644
--- a/board/rockchip/evb_rk3399/MAINTAINERS
+++ b/board/rockchip/evb_rk3399/MAINTAINERS
@@ -93,7 +93,6 @@
F: arch/arm/dts/rk3399-rock-4se-u-boot.dtsi
ROCK-PI-4
-M: Akash Gajjar <akash@openedev.com>
M: Jagan Teki <jagan@amarulasolutions.com>
S: Maintained
F: configs/rock-pi-4-rk3399_defconfig
diff --git a/board/samsung/axy17lte/Kconfig b/board/samsung/axy17lte/Kconfig
index a018547..64a4ffa 100644
--- a/board/samsung/axy17lte/Kconfig
+++ b/board/samsung/axy17lte/Kconfig
@@ -1,11 +1,3 @@
-config SYS_CONFIG_NAME
- string "Board configuration name"
- default "exynos78x0-common.h"
- help
- This option contains information about board configuration name.
- Based on this option include/configs/<CONFIG_SYS_CONFIG_NAME>.h header
- will be used for board configuration.
-
if TARGET_A5Y17LTE
config SYS_BOARD
default "axy17lte"
@@ -16,7 +8,7 @@
default "samsung"
config SYS_CONFIG_NAME
- default "a5y17lte"
+ default "exynos78x0-common"
config EXYNOS7880
bool "Exynos 7880 SOC support"
@@ -33,7 +25,7 @@
default "samsung"
config SYS_CONFIG_NAME
- default "a5y17lte"
+ default "exynos78x0-common"
config EXYNOS7880
bool "Exynos 7880 SOC support"
@@ -50,7 +42,7 @@
default "samsung"
config SYS_CONFIG_NAME
- default "a3y17lte"
+ default "exynos78x0-common"
config EXYNOS7870
bool "Exynos 7870 SOC support"
diff --git a/board/sandbox/sandbox.c b/board/sandbox/sandbox.c
index 9d58860..8025965 100644
--- a/board/sandbox/sandbox.c
+++ b/board/sandbox/sandbox.c
@@ -3,8 +3,8 @@
* Copyright (c) 2011 The Chromium OS Authors.
*/
-#include <common.h>
#include <addr_map.h>
+#include <config.h>
#include <cpu_func.h>
#include <cros_ec.h>
#include <dm.h>
diff --git a/board/siemens/draco/Kconfig b/board/siemens/draco/Kconfig
index 1eb8a48..0cdf5bc 100644
--- a/board/siemens/draco/Kconfig
+++ b/board/siemens/draco/Kconfig
@@ -1,19 +1,3 @@
-if TARGET_DRACO
-
-config SYS_BOARD
- default "draco"
-
-config SYS_VENDOR
- default "siemens"
-
-config SYS_SOC
- default "am33xx"
-
-config SYS_CONFIG_NAME
- default "draco"
-
-endif
-
if TARGET_THUBAN
config SYS_BOARD
@@ -26,7 +10,7 @@
default "am33xx"
config SYS_CONFIG_NAME
- default "thuban"
+ default "draco-thuban"
endif
@@ -42,7 +26,7 @@
default "am33xx"
config SYS_CONFIG_NAME
- default "rastaban"
+ default "draco-rastaban"
endif
@@ -58,7 +42,7 @@
default "am33xx"
config SYS_CONFIG_NAME
- default "etamin"
+ default "draco-etamin"
config NAND_CS_INIT
def_bool y
diff --git a/board/siemens/draco/MAINTAINERS b/board/siemens/draco/MAINTAINERS
index c73f18c..82e01eb 100644
--- a/board/siemens/draco/MAINTAINERS
+++ b/board/siemens/draco/MAINTAINERS
@@ -1,11 +1,10 @@
DRACO BOARD
-M: Samuel Egli <samuel.egli@siemens.com>
+M: Enrico Leto <enrico.leto@siemens.com>
S: Maintained
F: board/siemens/draco/
-F: include/configs/draco.h
-F: configs/draco_defconfig
-F: configs/etamin_defconfig
-F: include/configs/thuban.h
-F: configs/thuban_defconfig
-F: include/configs/rastaban.h
-F: configs/rastaban_defconfig
+F: configs/draco-etamin_defconfig
+F: configs/draco-rastaban_defconfig
+F: configs/draco-thuban_defconfig
+F: include/configs/draco-etamin.h
+F: include/configs/draco-rastaban.h
+F: include/configs/draco-thuban.h
diff --git a/board/sifive/unmatched/unmatched.env b/board/sifive/unmatched/unmatched.env
new file mode 100644
index 0000000..0f1e5a7
--- /dev/null
+++ b/board/sifive/unmatched/unmatched.env
@@ -0,0 +1,19 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+
+/* environment for HiFive Unmatched boards */
+
+kernel_addr_r=0x80200000
+kernel_comp_addr_r=0x88000000
+kernel_comp_size=0x4000000
+fdt_addr_r=0x8c000000
+scriptaddr=0x8c100000
+pxefile_addr_r=0x8c200000
+ramdisk_addr_r=0x8c300000
+type_guid_gpt_loader1=5B193300-FC78-40CD-8002-E86C45580B47
+type_guid_gpt_loader2=2E54B353-1271-4842-806F-E436D6AF6985
+type_guid_gpt_system=0FC63DAF-8483-4772-8E79-3D69D8477DE4
+partitions=
+ name=loader1,start=17K,size=1M,type=${type_guid_gpt_loader1};
+ name=loader2,size=4MB,type=${type_guid_gpt_loader2};
+ name=system,size=-,bootable,type=${type_guid_gpt_system};
+fdtfile= CONFIG_DEFAULT_FDT_FILE
diff --git a/board/solidrun/clearfog/Kconfig b/board/solidrun/clearfog/Kconfig
index 60d3921..b1623038 100644
--- a/board/solidrun/clearfog/Kconfig
+++ b/board/solidrun/clearfog/Kconfig
@@ -39,6 +39,25 @@
SGMII connection (requires a supporting SFP). By default, transfer speed
of 1.25 Gbps is used, suitable for a more common 1 Gbps SFP module.
+choice CLEARFOG_GTR_SERDES0
+ prompt "Select Clearfog GTR SerDes 0 Function"
+ default CLEARFOG_GTR_SERDES0_PCIE
+ help
+ Select function for SerDes 0 which is shared between CON3 and CON18
+ for either pci-e or sata.
+
+config CLEARFOG_GTR_SERDES0_PCIE
+ bool "PCI-E on CON3"
+ help
+ Configure SerDes 0 for PCI-E to enable CON3 mini-PCI-E connector.
+
+config CLEARFOG_GTR_SERDES0_SATA
+ bool "SATA on CON18"
+ help
+ Configure SerDes 0 for SATA to enable CON18 SATA connector.
+
+endchoice
+
config ENV_SIZE
hex "Environment Size"
default 0x10000
diff --git a/board/solidrun/clearfog/clearfog.c b/board/solidrun/clearfog/clearfog.c
index 6fa2fe5..6977db0 100644
--- a/board/solidrun/clearfog/clearfog.c
+++ b/board/solidrun/clearfog/clearfog.c
@@ -90,9 +90,22 @@
/* Apply runtime detection changes */
if (sr_product_is(&cf_tlv_data, "Clearfog GTR")) {
- board_serdes_map[0].serdes_type = PEX0;
- board_serdes_map[0].serdes_speed = SERDES_SPEED_5_GBPS;
- board_serdes_map[0].serdes_mode = PEX_ROOT_COMPLEX_X1;
+ if (IS_ENABLED(CONFIG_CLEARFOG_GTR_SERDES0_SATA)) {
+ /* serdes 0 is sata (like clearfog pro) */
+ } else if (IS_ENABLED(CONFIG_CLEARFOG_GTR_SERDES0_PCIE)) {
+ /* serdes 0 is pci */
+ board_serdes_map[0].serdes_type = PEX0;
+ board_serdes_map[0].serdes_speed = SERDES_SPEED_5_GBPS;
+ board_serdes_map[0].serdes_mode = PEX_ROOT_COMPLEX_X1;
+ }
+ /* serdes 1 is 2.5Gbps fixed link to ethernet switch */
+ board_serdes_map[1].serdes_type = SGMII1;
+ board_serdes_map[1].serdes_speed = SERDES_SPEED_3_125_GBPS;
+ board_serdes_map[1].serdes_mode = SERDES_DEFAULT_MODE;
+ /* serdes 2 is pci (like clearfog pro) */
+ /* serdes 3 is usb-3 (like clearfog pro) */
+ /* serdes 4 is pci (like clearfog pro) */
+ /* serdes 5 is sfp connector (like clearfog pro) */
} else if (sr_product_is(&cf_tlv_data, "Clearfog Pro")) {
/* handle recognized product as noop, no adjustment required */
} else if (sr_product_is(&cf_tlv_data, "Clearfog Base")) {
diff --git a/board/solidrun/mx6cuboxi/mx6cuboxi.c b/board/solidrun/mx6cuboxi/mx6cuboxi.c
index e119330..8edabf4 100644
--- a/board/solidrun/mx6cuboxi/mx6cuboxi.c
+++ b/board/solidrun/mx6cuboxi/mx6cuboxi.c
@@ -381,6 +381,7 @@
return (mmc_get_op_cond(mmc, true) < 0) ? 0 : 1;
}
+/* Override the default implementation, DT model is not accurate */
int checkboard(void)
{
request_detect_gpios();
@@ -496,12 +497,6 @@
}
#endif
-/* Override the default implementation, DT model is not accurate */
-int show_board_info(void)
-{
- return checkboard();
-}
-
int board_late_init(void)
{
#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
diff --git a/board/st/common/Kconfig b/board/st/common/Kconfig
index c1c254d..5efac65 100644
--- a/board/st/common/Kconfig
+++ b/board/st/common/Kconfig
@@ -1,7 +1,7 @@
config CMD_STBOARD
bool "stboard - command for OTP board information"
depends on ARCH_STM32MP
- default y if TARGET_ST_STM32MP15x || TARGET_ST_STM32MP13x
+ default y if TARGET_ST_STM32MP25X || TARGET_ST_STM32MP15X || TARGET_ST_STM32MP13X
help
This compile the stboard command to
read and write the board in the OTP.
diff --git a/board/st/common/cmd_stboard.c b/board/st/common/cmd_stboard.c
index 853ab78..cb103e6 100644
--- a/board/st/common/cmd_stboard.c
+++ b/board/st/common/cmd_stboard.c
@@ -49,7 +49,9 @@
0x1298,
0x1341,
0x1497,
+ 0x1605, /* stm32mp25xx-dk */
0x1635,
+ 0x1936, /* stm32mp25xx-ev1 */
};
for (i = 0; i < ARRAY_SIZE(st_board_id); i++)
diff --git a/board/st/common/stm32mp_dfu.c b/board/st/common/stm32mp_dfu.c
index a8eb8d5..77edb86 100644
--- a/board/st/common/stm32mp_dfu.c
+++ b/board/st/common/stm32mp_dfu.c
@@ -73,7 +73,6 @@
static void board_get_alt_info_mtd(struct mtd_info *mtd, char *buf)
{
struct mtd_info *part;
- bool first = true;
const char *name;
int len, partnum = 0;
@@ -86,17 +85,13 @@
"mtd %s=", name);
len += snprintf(buf + len, DFU_ALT_BUF_LEN - len,
- "%s raw 0x0 0x%llx ",
+ "%s raw 0x0 0x%llx",
name, mtd->size);
list_for_each_entry(part, &mtd->partitions, node) {
partnum++;
- if (!first)
- len += snprintf(buf + len, DFU_ALT_BUF_LEN - len, ";");
- first = false;
-
len += snprintf(buf + len, DFU_ALT_BUF_LEN - len,
- "%s_%s part %d",
+ ";%s_%s part %d",
name, part->name, partnum);
}
}
@@ -128,24 +123,9 @@
/* probe all MTD devices */
mtd_probe_devices();
- /* probe SPI flash device on a bus */
- if (!uclass_get_device(UCLASS_SPI_FLASH, 0, &dev)) {
- mtd = get_mtd_device_nm("nor0");
- if (!IS_ERR_OR_NULL(mtd))
+ mtd_for_each_device(mtd)
+ if (!mtd_is_partition(mtd))
board_get_alt_info_mtd(mtd, buf);
-
- mtd = get_mtd_device_nm("nor1");
- if (!IS_ERR_OR_NULL(mtd))
- board_get_alt_info_mtd(mtd, buf);
- }
-
- mtd = get_mtd_device_nm("nand0");
- if (!IS_ERR_OR_NULL(mtd))
- board_get_alt_info_mtd(mtd, buf);
-
- mtd = get_mtd_device_nm("spi-nand0");
- if (!IS_ERR_OR_NULL(mtd))
- board_get_alt_info_mtd(mtd, buf);
}
if (IS_ENABLED(CONFIG_DFU_VIRT)) {
diff --git a/board/st/stm32mp1/Kconfig b/board/st/stm32mp1/Kconfig
index 6ab8f80..96de415 100644
--- a/board/st/stm32mp1/Kconfig
+++ b/board/st/stm32mp1/Kconfig
@@ -1,4 +1,4 @@
-if TARGET_ST_STM32MP15x
+if TARGET_ST_STM32MP15X
config SYS_BOARD
default "stm32mp1"
@@ -12,7 +12,7 @@
source "board/st/common/Kconfig"
endif
-if TARGET_ST_STM32MP13x
+if TARGET_ST_STM32MP13X
config SYS_BOARD
default "stm32mp1"
diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c
index 8f5719c..a17c314 100644
--- a/board/st/stm32mp1/stm32mp1.c
+++ b/board/st/stm32mp1/stm32mp1.c
@@ -114,7 +114,7 @@
int fdt_compat_len;
if (IS_ENABLED(CONFIG_TFABOOT)) {
- if (IS_ENABLED(CONFIG_STM32MP15x_STM32IMAGE))
+ if (IS_ENABLED(CONFIG_STM32MP15X_STM32IMAGE))
mode = "trusted - stm32image";
else
mode = "trusted";
@@ -616,7 +616,7 @@
static bool board_is_stm32mp15x_dk2(void)
{
- if (CONFIG_IS_ENABLED(TARGET_ST_STM32MP15x) &&
+ if (CONFIG_IS_ENABLED(TARGET_ST_STM32MP15X) &&
of_machine_is_compatible("st,stm32mp157c-dk2"))
return true;
@@ -625,7 +625,7 @@
static bool board_is_stm32mp15x_ev1(void)
{
- if (CONFIG_IS_ENABLED(TARGET_ST_STM32MP15x) &&
+ if (CONFIG_IS_ENABLED(TARGET_ST_STM32MP15X) &&
(of_machine_is_compatible("st,stm32mp157a-ev1") ||
of_machine_is_compatible("st,stm32mp157c-ev1") ||
of_machine_is_compatible("st,stm32mp157d-ev1") ||
diff --git a/board/st/stm32mp2/stm32mp2.c b/board/st/stm32mp2/stm32mp2.c
index c97a7ef..aa7dd31 100644
--- a/board/st/stm32mp2/stm32mp2.c
+++ b/board/st/stm32mp2/stm32mp2.c
@@ -8,14 +8,51 @@
#include <config.h>
#include <env.h>
#include <fdt_support.h>
+#include <log.h>
+#include <misc.h>
#include <asm/global_data.h>
#include <asm/arch/sys_proto.h>
+#include <dm/device.h>
+#include <dm/ofnode.h>
+#include <dm/uclass.h>
/*
* Get a global data pointer
*/
DECLARE_GLOBAL_DATA_PTR;
+int checkboard(void)
+{
+ int ret;
+ u32 otp;
+ struct udevice *dev;
+ const char *fdt_compat;
+ int fdt_compat_len;
+
+ fdt_compat = ofnode_get_property(ofnode_root(), "compatible", &fdt_compat_len);
+
+ log_info("Board: stm32mp2 (%s)\n", fdt_compat && fdt_compat_len ? fdt_compat : "");
+
+ /* display the STMicroelectronics board identification */
+ if (CONFIG_IS_ENABLED(CMD_STBOARD)) {
+ ret = uclass_get_device_by_driver(UCLASS_MISC,
+ DM_DRIVER_GET(stm32mp_bsec),
+ &dev);
+ if (!ret)
+ ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_BOARD),
+ &otp, sizeof(otp));
+ if (ret > 0 && otp)
+ log_info("Board: MB%04x Var%d.%d Rev.%c-%02d\n",
+ otp >> 16,
+ (otp >> 12) & 0xF,
+ (otp >> 4) & 0xF,
+ ((otp >> 8) & 0xF) - 1 + 'A',
+ otp & 0xF);
+ }
+
+ return 0;
+}
+
/* board dependent setup after realloc */
int board_init(void)
{
diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS
index 0061437..a2da6a4 100644
--- a/board/sunxi/MAINTAINERS
+++ b/board/sunxi/MAINTAINERS
@@ -348,6 +348,11 @@
S: Maintained
F: configs/libretech_all_h5_cc_h5_defconfig
+NANOPI DUO2 BOARD
+M: Chuanhong Guo <gch981213@gmail.com>
+S: Maintained
+F: configs/nanopi_duo2_defconfig
+
NANOPI-M1 BOARD
M: Mylène Josserand <mylene.josserand@free-electrons.com>
S: Maintained
@@ -455,6 +460,11 @@
S: Maintained
F: configs/orangepi_zero2_defconfig
+ORANGEPI ZERO 3 BOARD
+M: Andre Przywara <andre.przywara@arm.com>
+S: Maintained
+F: configs/orangepi_zero3_defconfig
+
ORANGEPI PC 2 BOARD
M: Andre Przywara <andre.przywara@arm.com>
S: Maintained
@@ -545,6 +555,11 @@
S: Maintained
F: configs/tbs_a711_defconfig
+TRANSPEED 8K618-T BOARD
+M: Nick Alilovic <nickalilovic@gmail.com>
+S: Maintained
+F: configs/transpeed-8k618-t_defconfig
+
WEXLER-TAB7200 BOARD
M: Aleksei Mamlin <mamlinav@gmail.com>
S: Maintained
diff --git a/board/technexion/pico-imx7d/Makefile b/board/technexion/pico-imx7d/Makefile
index 4ae3d60..61b55fc 100644
--- a/board/technexion/pico-imx7d/Makefile
+++ b/board/technexion/pico-imx7d/Makefile
@@ -1,4 +1,4 @@
# SPDX-License-Identifier: GPL-2.0+
# (C) Copyright 2017 NXP Semiconductors
-obj-y := pico-imx7d.o spl.o
+obj-y := pico-imx7d.o spl.o ../../freescale/common/mmc.o
diff --git a/board/technexion/pico-imx7d/pico-imx7d.c b/board/technexion/pico-imx7d/pico-imx7d.c
index 6e98b85..b12941c 100644
--- a/board/technexion/pico-imx7d/pico-imx7d.c
+++ b/board/technexion/pico-imx7d/pico-imx7d.c
@@ -13,6 +13,7 @@
#include <asm/global_data.h>
#include <asm/gpio.h>
#include <asm/mach-imx/iomux-v3.h>
+#include <asm/mach-imx/boot_mode.h>
#include <asm/io.h>
#include <common.h>
#include <miiphy.h>
@@ -25,6 +26,11 @@
#define UART_PAD_CTRL (PAD_CTL_DSE_3P3V_49OHM | \
PAD_CTL_PUS_PU100KOHM | PAD_CTL_HYS)
+#define PICO_MMC0 0
+#define PICO_MMC0_BLK 2
+#define PICO_MMC1 1
+#define PICO_MMC1_BLK 0
+
int dram_init(void)
{
gd->ram_size = imx_ddr_size();
@@ -101,32 +107,6 @@
return set_clk_enet(ENET_125MHZ);
}
-
-int board_phy_config(struct phy_device *phydev)
-{
- unsigned short val;
-
- /* To enable AR8035 ouput a 125MHz clk from CLK_25M */
- phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x7);
- phy_write(phydev, MDIO_DEVAD_NONE, 0xe, 0x8016);
- phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x4007);
-
- val = phy_read(phydev, MDIO_DEVAD_NONE, 0xe);
- val &= 0xffe7;
- val |= 0x18;
- phy_write(phydev, MDIO_DEVAD_NONE, 0xe, val);
-
- /* introduce tx clock delay */
- phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x5);
- val = phy_read(phydev, MDIO_DEVAD_NONE, 0x1e);
- val |= 0x0100;
- phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, val);
-
- if (phydev->drv->config)
- phydev->drv->config(phydev);
-
- return 0;
-}
#endif
static void setup_iomux_uart(void)
@@ -176,6 +156,12 @@
set_wdog_reset(wdog);
+#if CONFIG_IS_ENABLED(FSL_ESDHC_IMX)
+#if CONFIG_IS_ENABLED(ENV_IS_IN_MMC) || CONFIG_IS_ENABLED(ENV_IS_NOWHERE)
+ board_late_mmc_env_init();
+#endif /* CONFIG_ENV_IS_IN_MMC or CONFIG_ENV_IS_NOWHERE */
+#endif
+
/*
* Do not assert internal WDOG_RESET_B_DEB(controlled by bit 4),
* since we use PMIC_PWRON to reset the board.
@@ -210,3 +196,53 @@
}
return 0;
}
+
+#if CONFIG_IS_ENABLED(FSL_ESDHC_IMX)
+#if CONFIG_IS_ENABLED(ENV_IS_IN_MMC) || CONFIG_IS_ENABLED(ENV_IS_NOWHERE)
+int board_mmc_get_env_dev(int devno)
+{
+ int dev_env = 0;
+
+ switch (get_boot_device()) {
+ case SD3_BOOT:
+ case MMC3_BOOT:
+ env_set("bootdev", "MMC3");
+ dev_env = PICO_MMC0;
+ break;
+ case SD1_BOOT:
+ env_set("bootdev", "SD1");
+ dev_env = PICO_MMC1;
+ break;
+ default:
+ printf("Wrong boot device!");
+ }
+
+ return dev_env;
+}
+
+int mmc_map_to_kernel_blk(int dev_no)
+{
+ int blk_no = 0;
+
+ switch (dev_no) {
+ case PICO_MMC0:
+ blk_no = PICO_MMC0_BLK;
+ break;
+ case PICO_MMC1:
+ blk_no = PICO_MMC1_BLK;
+ break;
+ default:
+ printf("Invalid MMC device!");
+ }
+
+ return blk_no;
+}
+#endif
+
+#if CONFIG_IS_ENABLED(ENV_IS_NOWHERE)
+int mmc_get_env_dev(void)
+{
+ return board_mmc_get_env_dev(0);
+}
+#endif
+#endif /* CONFIG_FSL_ESDHC_IMX */
diff --git a/board/technexion/pico-imx7d/spl.c b/board/technexion/pico-imx7d/spl.c
index c6b21aa..0192eaf 100644
--- a/board/technexion/pico-imx7d/spl.c
+++ b/board/technexion/pico-imx7d/spl.c
@@ -15,6 +15,7 @@
#include <asm/arch/sys_proto.h>
#include <asm/arch-mx7/mx7-ddr.h>
#include <asm/mach-imx/iomux-v3.h>
+#include <asm/mach-imx/boot_mode.h>
#include <asm/gpio.h>
#include <asm/sections.h>
#include <fsl_esdhc_imx.h>
@@ -159,7 +160,20 @@
#define USDHC_PAD_CTRL (PAD_CTL_DSE_3P3V_32OHM | PAD_CTL_SRE_SLOW | \
PAD_CTL_HYS | PAD_CTL_PUE | PAD_CTL_PUS_PU47KOHM)
-static iomux_v3_cfg_t const usdhc3_pads[] = {
+#define USDHC1_CD_GPIO IMX_GPIO_NR(5, 0)
+/* EMMC/SD */
+static const iomux_v3_cfg_t usdhc1_pads[] = {
+ MX7D_PAD_SD1_CLK__SD1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+ MX7D_PAD_SD1_CMD__SD1_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+ MX7D_PAD_SD1_DATA0__SD1_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+ MX7D_PAD_SD1_DATA1__SD1_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+ MX7D_PAD_SD1_DATA2__SD1_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+ MX7D_PAD_SD1_DATA3__SD1_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+ MX7D_PAD_SD1_CD_B__GPIO5_IO0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+};
+
+#define USDHC3_CD_GPIO IMX_GPIO_NR(1, 14)
+static const iomux_v3_cfg_t usdhc3_emmc_pads[] = {
MX7D_PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
MX7D_PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
MX7D_PAD_SD3_DATA0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
@@ -173,20 +187,83 @@
MX7D_PAD_GPIO1_IO14__GPIO1_IO14 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
};
-static struct fsl_esdhc_cfg usdhc_cfg[1] = {
+static struct fsl_esdhc_cfg usdhc_cfg[2] = {
{USDHC3_BASE_ADDR},
+ {USDHC1_BASE_ADDR},
};
int board_mmc_getcd(struct mmc *mmc)
{
- /* Assume uSDHC3 emmc is always present */
- return 1;
+ struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
+ int ret = 0;
+
+ switch (cfg->esdhc_base) {
+ case USDHC1_BASE_ADDR:
+ ret = !gpio_get_value(USDHC1_CD_GPIO);
+ break;
+ case USDHC3_BASE_ADDR:
+ ret = !gpio_get_value(USDHC3_CD_GPIO);
+ break;
+ }
+
+ return ret;
}
int board_mmc_init(struct bd_info *bis)
{
- imx_iomux_v3_setup_multiple_pads(usdhc3_pads, ARRAY_SIZE(usdhc3_pads));
- usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
- return fsl_esdhc_initialize(bis, &usdhc_cfg[0]);
+ int ret;
+ u32 index;
+
+ /*
+ * Following map is done:
+ * (USDHC) (Physical Port)
+ * usdhc3 SOM MicroSD/MMC
+ * usdhc1 Carrier board MicroSD
+ * Always set boot USDHC as mmc0
+ */
+
+ imx_iomux_v3_setup_multiple_pads(usdhc3_emmc_pads,
+ ARRAY_SIZE(usdhc3_emmc_pads));
+ gpio_direction_input(USDHC3_CD_GPIO);
+
+ imx_iomux_v3_setup_multiple_pads(usdhc1_pads,
+ ARRAY_SIZE(usdhc1_pads));
+ gpio_direction_input(USDHC1_CD_GPIO);
+
+ switch (get_boot_device()) {
+ case SD1_BOOT:
+ usdhc_cfg[0].esdhc_base = USDHC1_BASE_ADDR;
+ usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
+ usdhc_cfg[0].max_bus_width = 4;
+ usdhc_cfg[1].esdhc_base = USDHC3_BASE_ADDR;
+ usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
+ usdhc_cfg[1].max_bus_width = 4;
+ break;
+ case MMC3_BOOT:
+ usdhc_cfg[0].esdhc_base = USDHC3_BASE_ADDR;
+ usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
+ usdhc_cfg[0].max_bus_width = 8;
+ usdhc_cfg[1].esdhc_base = USDHC1_BASE_ADDR;
+ usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
+ usdhc_cfg[1].max_bus_width = 4;
+ break;
+ case SD3_BOOT:
+ default:
+ usdhc_cfg[0].esdhc_base = USDHC3_BASE_ADDR;
+ usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
+ usdhc_cfg[0].max_bus_width = 4;
+ usdhc_cfg[1].esdhc_base = USDHC1_BASE_ADDR;
+ usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
+ usdhc_cfg[1].max_bus_width = 4;
+ break;
+ }
+
+ for (index = 0; index < CFG_SYS_FSL_USDHC_NUM; ++index) {
+ ret = fsl_esdhc_initialize(bis, &usdhc_cfg[index]);
+ if (ret)
+ return ret;
+ }
+
+ return 0;
}
#endif
diff --git a/board/theobroma-systems/common/common.c b/board/theobroma-systems/common/common.c
new file mode 100644
index 0000000..864bcdd
--- /dev/null
+++ b/board/theobroma-systems/common/common.c
@@ -0,0 +1,151 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
+ */
+
+#include <dm.h>
+#include <env.h>
+#include <env_internal.h>
+#include <dm/uclass-internal.h>
+
+/*
+ * Swap mmc0 and mmc1 in boot_targets if booted from SD-Card.
+ *
+ * If bootsource is uSD-card we can assume that we want to use the
+ * SD-Card instead of the eMMC as first boot_target for distroboot.
+ * We only want to swap the defaults and not any custom environment a
+ * user has set. We exit early if a changed boot_targets environment
+ * is detected.
+ */
+int setup_boottargets(void)
+{
+ const char *boot_device =
+ ofnode_read_chosen_string("u-boot,spl-boot-device");
+ char env_default[sizeof(BOOT_TARGETS)];
+ char *env;
+ int ret;
+
+ if (!boot_device) {
+ debug("%s: /chosen/u-boot,spl-boot-device not set\n",
+ __func__);
+ return -1;
+ }
+ debug("%s: booted from %s\n", __func__, boot_device);
+
+ ret = env_get_default_into("boot_targets", env_default, sizeof(env_default));
+ if (ret < 0)
+ env_default[0] = '\0';
+ env = env_get("boot_targets");
+ if (!env) {
+ debug("%s: boot_targets does not exist\n", __func__);
+ return -1;
+ }
+ debug("%s: boot_targets current: %s - default: %s\n",
+ __func__, env, env_default);
+
+ if (strcmp(env_default, env) != 0) {
+ debug("%s: boot_targets not default, don't change it\n",
+ __func__);
+ return 0;
+ }
+
+ /*
+ * Make the default boot medium between SD Card and eMMC, the one that
+ * was used to load U-Boot proper. If SPI-NOR flash was used, keep
+ * original default order.
+ */
+ struct udevice *devp;
+
+ if (uclass_find_device_by_ofnode(UCLASS_MMC, ofnode_path(boot_device), &devp)) {
+ debug("%s: not reordering boot_targets, bootdev %s != MMC\n",
+ __func__, boot_device);
+ return 0;
+ }
+
+ char *mmc0, *mmc1;
+
+ mmc0 = strstr(env, "mmc0");
+ mmc1 = strstr(env, "mmc1");
+
+ if (!mmc0 || !mmc1) {
+ debug("%s: only one mmc boot_target found\n", __func__);
+ return -1;
+ }
+
+ /*
+ * If mmc0 comes first in the boot order and U-Boot proper was
+ * loaded from mmc1, swap mmc0 and mmc1 in the list.
+ * If mmc1 comes first in the boot order and U-Boot proper was
+ * loaded from mmc0, swap mmc0 and mmc1 in the list.
+ */
+ if ((mmc0 < mmc1 && devp->seq_ == 1) ||
+ (mmc0 > mmc1 && devp->seq_ == 0)) {
+ mmc0[3] = '1';
+ mmc1[3] = '0';
+ debug("%s: set boot_targets to: %s\n", __func__, env);
+ env_set("boot_targets", env);
+ }
+
+ return 0;
+}
+
+int mmc_get_env_dev(void)
+{
+ const char *boot_device =
+ ofnode_read_chosen_string("u-boot,spl-boot-device");
+ struct udevice *devp;
+
+ if (!boot_device) {
+ debug("%s: /chosen/u-boot,spl-boot-device not set\n",
+ __func__);
+#ifdef CONFIG_SYS_MMC_ENV_DEV
+ return CONFIG_SYS_MMC_ENV_DEV;
+#else
+ return 0;
+#endif
+ }
+
+ debug("%s: booted from %s\n", __func__, boot_device);
+
+ if (uclass_find_device_by_ofnode(UCLASS_MMC, ofnode_path(boot_device), &devp))
+#ifdef CONFIG_SYS_MMC_ENV_DEV
+ return CONFIG_SYS_MMC_ENV_DEV;
+#else
+ return 0;
+#endif
+
+ debug("%s: get MMC ENV from mmc%d\n", __func__, devp->seq_);
+
+ return devp->seq_;
+}
+
+enum env_location arch_env_get_location(enum env_operation op, int prio)
+{
+ const char *boot_device =
+ ofnode_read_chosen_string("u-boot,spl-boot-device");
+ struct udevice *devp;
+
+ if (prio > 0)
+ return ENVL_UNKNOWN;
+
+ if (!boot_device) {
+ debug("%s: /chosen/u-boot,spl-boot-device not set\n",
+ __func__);
+ return ENVL_NOWHERE;
+ }
+
+ debug("%s: booted from %s\n", __func__, boot_device);
+
+ if (IS_ENABLED(CONFIG_ENV_IS_IN_SPI_FLASH) &&
+ !uclass_find_device_by_ofnode(UCLASS_SPI_FLASH, ofnode_path(boot_device), &devp))
+ return ENVL_SPI_FLASH;
+
+ if (IS_ENABLED(CONFIG_ENV_IS_IN_MMC) &&
+ !uclass_find_device_by_ofnode(UCLASS_MMC, ofnode_path(boot_device), &devp))
+ return ENVL_MMC;
+
+ printf("%s: No environment available: booted from %s but U-Boot config does not allow loading environment from it.",
+ __func__, boot_device);
+
+ return ENVL_NOWHERE;
+}
diff --git a/board/theobroma-systems/common/common.h b/board/theobroma-systems/common/common.h
new file mode 100644
index 0000000..488313a
--- /dev/null
+++ b/board/theobroma-systems/common/common.h
@@ -0,0 +1,19 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * (C) Copyright 2023 Theobroma Systems Design und Consulting GmbH
+ */
+
+/*
+ * setup_boottargets() - Swap mmc0 and mmc1 in boot_targets depending on U-Boot
+ * proper load medium.
+ *
+ * If bootsource is uSD-card we can assume that we want to use the
+ * SD-Card instead of the eMMC as first boot_target for distroboot.
+ * We only want to swap the defaults and not any custom environment a
+ * user has set. We exit early if a changed boot_targets environment
+ * is detected.
+ *
+ * Return:
+ * 0 if OK, -1 otherwise
+ */
+int setup_boottargets(void);
diff --git a/board/theobroma-systems/puma_rk3399/MAINTAINERS b/board/theobroma-systems/puma_rk3399/MAINTAINERS
index 1ec2dd7..93f570f 100644
--- a/board/theobroma-systems/puma_rk3399/MAINTAINERS
+++ b/board/theobroma-systems/puma_rk3399/MAINTAINERS
@@ -3,6 +3,7 @@
M: Klaus Goger <klaus.goger@theobroma-systems.com>
S: Maintained
F: board/theobroma-systems/puma_rk3399
+F: board/theobroma-systems/common
F: include/configs/puma_rk3399.h
F: arch/arm/dts/rk3399-puma.dts
F: configs/puma-rk3399_defconfig
diff --git a/board/theobroma-systems/puma_rk3399/Makefile b/board/theobroma-systems/puma_rk3399/Makefile
index d962b56..edd61a3 100644
--- a/board/theobroma-systems/puma_rk3399/Makefile
+++ b/board/theobroma-systems/puma_rk3399/Makefile
@@ -5,3 +5,6 @@
#
obj-y += puma-rk3399.o
+ifneq ($(CONFIG_SPL_BUILD),y)
+obj-y += ../common/common.o
+endif
diff --git a/board/theobroma-systems/puma_rk3399/puma-rk3399.c b/board/theobroma-systems/puma_rk3399/puma-rk3399.c
index 614a60e..a82f97b 100644
--- a/board/theobroma-systems/puma_rk3399/puma-rk3399.c
+++ b/board/theobroma-systems/puma_rk3399/puma-rk3399.c
@@ -3,28 +3,15 @@
* (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
*/
-#include <common.h>
#include <dm.h>
-#include <env.h>
-#include <env_internal.h>
-#include <init.h>
-#include <log.h>
-#include <misc.h>
-#include <spl.h>
#include <syscon.h>
-#include <u-boot/crc.h>
-#include <usb.h>
#include <dm/pinctrl.h>
-#include <dm/uclass-internal.h>
#include <asm/io.h>
-#include <asm/setup.h>
#include <asm/arch-rockchip/clock.h>
#include <asm/arch-rockchip/hardware.h>
#include <asm/arch-rockchip/grf_rk3399.h>
-#include <asm/arch-rockchip/periph.h>
#include <asm/arch-rockchip/misc.h>
-#include <power/regulator.h>
-#include <u-boot/sha256.h>
+#include "../common/common.h"
static void setup_iodomain(void)
{
@@ -40,134 +27,6 @@
rk_setreg(&grf->io_vsel, 1 << GRF_IO_VSEL_GPIO4CD_SHIFT);
}
-/*
- * Swap mmc0 and mmc1 in boot_targets if booted from SD-Card.
- *
- * If bootsource is uSD-card we can assume that we want to use the
- * SD-Card instead of the eMMC as first boot_target for distroboot.
- * We only want to swap the defaults and not any custom environment a
- * user has set. We exit early if a changed boot_targets environment
- * is detected.
- */
-static int setup_boottargets(void)
-{
- const char *boot_device =
- ofnode_read_chosen_string("u-boot,spl-boot-device");
- char *env_default, *env;
-
- if (!boot_device) {
- debug("%s: /chosen/u-boot,spl-boot-device not set\n",
- __func__);
- return -1;
- }
- debug("%s: booted from %s\n", __func__, boot_device);
-
- env_default = env_get_default("boot_targets");
- env = env_get("boot_targets");
- if (!env) {
- debug("%s: boot_targets does not exist\n", __func__);
- return -1;
- }
- debug("%s: boot_targets current: %s - default: %s\n",
- __func__, env, env_default);
-
- if (strcmp(env_default, env) != 0) {
- debug("%s: boot_targets not default, don't change it\n",
- __func__);
- return 0;
- }
-
- /*
- * Make the default boot medium between SD Card and eMMC, the one that
- * was used to load U-Boot proper. If SPI-NOR flash was used, keep
- * original default order.
- */
- if (strcmp(boot_device, "/spi@ff1d0000/flash@0")) {
- bool sd_booted = !strcmp(boot_device, "/mmc@fe320000");
- char *mmc0, *mmc1;
-
- debug("%s: booted from %s\n", __func__,
- sd_booted ? "SD-Card" : "eMMC");
- mmc0 = strstr(env, "mmc0");
- mmc1 = strstr(env, "mmc1");
-
- if (!mmc0 || !mmc1) {
- debug("%s: only one mmc boot_target found\n", __func__);
- return -1;
- }
-
- /*
- * If mmc0 comes first in the boot order and U-Boot proper was
- * loaded from mmc1, swap mmc0 and mmc1 in the list.
- * If mmc1 comes first in the boot order and U-Boot proper was
- * loaded from mmc0, swap mmc0 and mmc1 in the list.
- */
- if ((mmc0 < mmc1 && sd_booted) ||
- (mmc0 > mmc1 && !sd_booted)) {
- mmc0[3] = '1';
- mmc1[3] = '0';
- debug("%s: set boot_targets to: %s\n", __func__, env);
- env_set("boot_targets", env);
- }
- }
-
- return 0;
-}
-
-int mmc_get_env_dev(void)
-{
- const char *boot_device =
- ofnode_read_chosen_string("u-boot,spl-boot-device");
-
- if (!boot_device) {
- debug("%s: /chosen/u-boot,spl-boot-device not set\n",
- __func__);
- return CONFIG_SYS_MMC_ENV_DEV;
- }
-
- debug("%s: booted from %s\n", __func__, boot_device);
-
- if (!strcmp(boot_device, "/mmc@fe320000"))
- return 1;
-
- if (!strcmp(boot_device, "/mmc@fe330000"))
- return 0;
-
- return CONFIG_SYS_MMC_ENV_DEV;
-}
-
-enum env_location arch_env_get_location(enum env_operation op, int prio)
-{
- const char *boot_device =
- ofnode_read_chosen_string("u-boot,spl-boot-device");
-
- if (prio > 0)
- return ENVL_UNKNOWN;
-
- if (!boot_device) {
- debug("%s: /chosen/u-boot,spl-boot-device not set\n",
- __func__);
- return ENVL_NOWHERE;
- }
-
- debug("%s: booted from %s\n", __func__, boot_device);
-
- if (IS_ENABLED(CONFIG_ENV_IS_IN_SPI_FLASH) &&
- !strcmp(boot_device, "/spi@ff1d0000/flash@0"))
- return ENVL_SPI_FLASH;
-
- if (IS_ENABLED(CONFIG_ENV_IS_IN_MMC) &&
- (!strcmp(boot_device, "/mmc@fe320000") ||
- !strcmp(boot_device, "/mmc@fe330000")))
- return ENVL_MMC;
-
- printf("%s: No environment available: booted from %s but U-Boot "
- "config does not allow loading environment from it.",
- __func__, boot_device);
-
- return ENVL_NOWHERE;
-}
-
int misc_init_r(void)
{
const u32 cpuid_offset = 0x7;
diff --git a/board/theobroma-systems/ringneck_px30/MAINTAINERS b/board/theobroma-systems/ringneck_px30/MAINTAINERS
index d764e26..06e1bea 100644
--- a/board/theobroma-systems/ringneck_px30/MAINTAINERS
+++ b/board/theobroma-systems/ringneck_px30/MAINTAINERS
@@ -3,6 +3,7 @@
M: Klaus Goger <klaus.goger@theobroma-systems.com>
S: Maintained
F: board/theobroma-systems/ringneck_px30
+F: board/theobroma-systems/common
F: include/configs/ringneck_px30.h
F: arch/arm/dts/px30-ringneck*
F: configs/ringneck-px30_defconfig
diff --git a/board/theobroma-systems/ringneck_px30/Makefile b/board/theobroma-systems/ringneck_px30/Makefile
index 31ada1a..45cc65b 100644
--- a/board/theobroma-systems/ringneck_px30/Makefile
+++ b/board/theobroma-systems/ringneck_px30/Makefile
@@ -5,3 +5,6 @@
#
obj-y += ringneck-px30.o
+ifneq ($(CONFIG_SPL_BUILD),y)
+obj-y += ../common/common.o
+endif
diff --git a/board/theobroma-systems/ringneck_px30/ringneck-px30.c b/board/theobroma-systems/ringneck_px30/ringneck-px30.c
index 537ce0d..ff7e414 100644
--- a/board/theobroma-systems/ringneck_px30/ringneck-px30.c
+++ b/board/theobroma-systems/ringneck_px30/ringneck-px30.c
@@ -3,150 +3,10 @@
* (C) Copyright 2022 Theobroma Systems Design und Consulting GmbH
*/
-#include <common.h>
-#include <dm.h>
-#include <env.h>
-#include <env_internal.h>
-#include <init.h>
-#include <log.h>
-#include <misc.h>
-#include <spl.h>
-#include <syscon.h>
-#include <u-boot/crc.h>
-#include <usb.h>
-#include <dm/pinctrl.h>
-#include <dm/uclass-internal.h>
#include <asm/gpio.h>
-#include <asm/io.h>
-#include <asm/setup.h>
-#include <asm/arch-rockchip/clock.h>
-#include <asm/arch-rockchip/hardware.h>
-#include <asm/arch-rockchip/periph.h>
#include <asm/arch-rockchip/misc.h>
#include <linux/delay.h>
-#include <power/regulator.h>
-#include <u-boot/sha256.h>
-
-/*
- * Swap mmc0 and mmc1 in boot_targets if booted from SD-Card.
- *
- * If bootsource is uSD-card we can assume that we want to use the
- * SD-Card instead of the eMMC as first boot_target for distroboot.
- * We only want to swap the defaults and not any custom environment a
- * user has set. We exit early if a changed boot_targets environment
- * is detected.
- */
-static int setup_boottargets(void)
-{
- const char *boot_device =
- ofnode_read_chosen_string("u-boot,spl-boot-device");
- char *env_default, *env;
-
- if (!boot_device) {
- debug("%s: /chosen/u-boot,spl-boot-device not set\n",
- __func__);
- return -1;
- }
- debug("%s: booted from %s\n", __func__, boot_device);
-
- env_default = env_get_default("boot_targets");
- env = env_get("boot_targets");
- if (!env) {
- debug("%s: boot_targets does not exist\n", __func__);
- return -1;
- }
- debug("%s: boot_targets current: %s - default: %s\n",
- __func__, env, env_default);
-
- if (strcmp(env_default, env) != 0) {
- debug("%s: boot_targets not default, don't change it\n",
- __func__);
- return 0;
- }
-
- /*
- * Make the default boot medium between SD Card and eMMC, the one that
- * was used to load U-Boot proper.
- */
- bool sd_booted = !strcmp(boot_device, "/mmc@ff370000");
- char *mmc0, *mmc1;
-
- debug("%s: booted from %s\n", __func__,
- sd_booted ? "SD-Card" : "eMMC");
- mmc0 = strstr(env, "mmc0");
- mmc1 = strstr(env, "mmc1");
-
- if (!mmc0 || !mmc1) {
- debug("%s: only one mmc boot_target found\n", __func__);
- return -1;
- }
-
- /*
- * If mmc0 comes first in the boot order and U-Boot proper was
- * loaded from mmc1, swap mmc0 and mmc1 in the list.
- * If mmc1 comes first in the boot order and U-Boot proper was
- * loaded from mmc0, swap mmc0 and mmc1 in the list.
- */
- if ((mmc0 < mmc1 && sd_booted) ||
- (mmc0 > mmc1 && !sd_booted)) {
- mmc0[3] = '1';
- mmc1[3] = '0';
- debug("%s: set boot_targets to: %s\n", __func__, env);
- env_set("boot_targets", env);
- }
-
- return 0;
-}
-
-int mmc_get_env_dev(void)
-{
- const char *boot_device =
- ofnode_read_chosen_string("u-boot,spl-boot-device");
-
- if (!boot_device) {
- debug("%s: /chosen/u-boot,spl-boot-device not set\n",
- __func__);
- return CONFIG_SYS_MMC_ENV_DEV;
- }
-
- debug("%s: booted from %s\n", __func__, boot_device);
-
- if (!strcmp(boot_device, "/mmc@ff370000"))
- return 1;
-
- if (!strcmp(boot_device, "/mmc@ff390000"))
- return 0;
-
- return CONFIG_SYS_MMC_ENV_DEV;
-}
-
-enum env_location arch_env_get_location(enum env_operation op, int prio)
-{
- const char *boot_device =
- ofnode_read_chosen_string("u-boot,spl-boot-device");
-
- if (prio > 0)
- return ENVL_UNKNOWN;
-
- if (!boot_device) {
- debug("%s: /chosen/u-boot,spl-boot-device not set\n",
- __func__);
- return ENVL_NOWHERE;
- }
-
- debug("%s: booted from %s\n", __func__, boot_device);
-
- if (IS_ENABLED(CONFIG_ENV_IS_IN_MMC) &&
- (!strcmp(boot_device, "/mmc@ff370000") ||
- !strcmp(boot_device, "/mmc@ff390000")))
- return ENVL_MMC;
-
- printf("%s: No environment available: booted from %s but U-Boot "
- "config does not allow loading environment from it.",
- __func__, boot_device);
-
- return ENVL_NOWHERE;
-}
+#include "../common/common.h"
int misc_init_r(void)
{
diff --git a/board/ti/am335x/u-boot.lds b/board/ti/am335x/u-boot.lds
deleted file mode 100644
index 087dee8..0000000
--- a/board/ti/am335x/u-boot.lds
+++ /dev/null
@@ -1,164 +0,0 @@
-/*
- * Copyright (c) 2004-2008 Texas Instruments
- *
- * (C) Copyright 2002
- * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-OUTPUT_ARCH(arm)
-ENTRY(_start)
-SECTIONS
-{
- . = 0x00000000;
-
- . = ALIGN(4);
- .text :
- {
- *(.__image_copy_start)
- *(.vectors)
- CPUDIR/start.o (.text*)
- board/ti/am335x/built-in.o (.text*)
- }
-
- /* This needs to come before *(.text*) */
- .__efi_runtime_start : {
- *(.__efi_runtime_start)
- }
-
- .efi_runtime : {
- *(.text.efi_runtime*)
- *(.rodata.efi_runtime*)
- *(.data.efi_runtime*)
- }
-
- .__efi_runtime_stop : {
- *(.__efi_runtime_stop)
- }
-
- .text_rest :
- {
- *(.text*)
- }
-
- . = ALIGN(4);
- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
-
- . = ALIGN(4);
- .data : {
- *(.data*)
- }
-
- . = ALIGN(4);
-
- . = .;
-
- . = ALIGN(4);
- __u_boot_list : {
- KEEP(*(SORT(__u_boot_list*)));
- }
-
- . = ALIGN(4);
-
- .efi_runtime_rel_start :
- {
- *(.__efi_runtime_rel_start)
- }
-
- .efi_runtime_rel : {
- *(.rel*.efi_runtime)
- *(.rel*.efi_runtime.*)
- }
-
- .efi_runtime_rel_stop :
- {
- *(.__efi_runtime_rel_stop)
- }
-
- . = ALIGN(4);
-
- .image_copy_end :
- {
- *(.__image_copy_end)
- }
-
- .rel_dyn_start :
- {
- *(.__rel_dyn_start)
- }
-
- .rel.dyn : {
- *(.rel*)
- }
-
- .rel_dyn_end :
- {
- *(.__rel_dyn_end)
- }
-
- .hash : { *(.hash*) }
-
- .end :
- {
- *(.__end)
- }
-
- _image_binary_end = .;
-
- /*
- * Deprecated: this MMU section is used by pxa at present but
- * should not be used by new boards/CPUs.
- */
- . = ALIGN(4096);
- .mmutable : {
- *(.mmutable)
- }
-
-/*
- * Compiler-generated __bss_start and __bss_end, see arch/arm/lib/bss.c
- * __bss_base and __bss_limit are for linker only (overlay ordering)
- */
-
- .bss_start __rel_dyn_start (OVERLAY) : {
- KEEP(*(.__bss_start));
- __bss_base = .;
- }
-
- .bss __bss_base (OVERLAY) : {
- *(.bss*)
- . = ALIGN(4);
- __bss_limit = .;
- }
-
- .bss_end __bss_limit (OVERLAY) : {
- KEEP(*(.__bss_end));
- }
-
- .dynsym _image_binary_end : { *(.dynsym) }
- .dynbss : { *(.dynbss) }
- .dynstr : { *(.dynstr*) }
- .dynamic : { *(.dynamic*) }
- .gnu.hash : { *(.gnu.hash) }
- .plt : { *(.plt*) }
- .interp : { *(.interp*) }
- .gnu : { *(.gnu*) }
- .ARM.exidx : { *(.ARM.exidx*) }
-}
diff --git a/board/ti/am62ax/board-cfg.yaml b/board/ti/am62ax/board-cfg.yaml
index 4aa8ddd..a0930d6 100644
--- a/board/ti/am62ax/board-cfg.yaml
+++ b/board/ti/am62ax/board-cfg.yaml
@@ -8,29 +8,29 @@
board-cfg:
rev:
- boardcfg_abi_maj : 0x0
- boardcfg_abi_min : 0x1
+ boardcfg_abi_maj: 0x0
+ boardcfg_abi_min: 0x1
control:
subhdr:
magic: 0xC1D3
size: 7
- main_isolation_enable : 0x5A
- main_isolation_hostid : 0x2
+ main_isolation_enable: 0x5A
+ main_isolation_hostid: 0x2
secproxy:
subhdr:
magic: 0x1207
size: 7
- scaling_factor : 0x1
- scaling_profile : 0x1
- disable_main_nav_secure_proxy : 0
+ scaling_factor: 0x1
+ scaling_profile: 0x1
+ disable_main_nav_secure_proxy: 0
msmc:
subhdr:
magic: 0xA5C3
size: 5
- msmc_cache_size : 0x10
+ msmc_cache_size: 0x10
debug_cfg:
subhdr:
magic: 0x020C
size: 8
- trace_dst_enables : 0x00
- trace_src_enables : 0x00
+ trace_dst_enables: 0x00
+ trace_src_enables: 0x00
diff --git a/board/ti/am62ax/pm-cfg.yaml b/board/ti/am62ax/pm-cfg.yaml
index 3ad182a..4031af2 100644
--- a/board/ti/am62ax/pm-cfg.yaml
+++ b/board/ti/am62ax/pm-cfg.yaml
@@ -8,5 +8,5 @@
pm-cfg:
rev:
- boardcfg_abi_maj : 0x0
- boardcfg_abi_min : 0x1
+ boardcfg_abi_maj: 0x0
+ boardcfg_abi_min: 0x1
diff --git a/board/ti/am62ax/rm-cfg.yaml b/board/ti/am62ax/rm-cfg.yaml
index 15c4017..73e8e15 100644
--- a/board/ti/am62ax/rm-cfg.yaml
+++ b/board/ti/am62ax/rm-cfg.yaml
@@ -1,7 +1,7 @@
# SPDX-License-Identifier: GPL-2.0+
# Copyright (C) 2022-2023 Texas Instruments Incorporated - https://www.ti.com/
#
-# Resource management configuration for AM62ax
+# Resource management configuration for AM62A
#
---
@@ -9,1143 +9,1039 @@
rm-cfg:
rm_boardcfg:
rev:
- boardcfg_abi_maj : 0x0
- boardcfg_abi_min : 0x1
+ boardcfg_abi_maj: 0x0
+ boardcfg_abi_min: 0x1
host_cfg:
subhdr:
magic: 0x4C41
- size : 356
+ size: 356
host_cfg_entries:
- - #1
+ - # 1
host_id: 12
- allowed_atype : 0x2A
- allowed_qos : 0xAAAA
- allowed_orderid : 0xAAAAAAAA
- allowed_priority : 0xAAAA
- allowed_sched_priority : 0xAA
- - #2
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - # 2
+ host_id: 20
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - # 3
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- - #3
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+ allowed_sched_priority: 0xAA
+ - # 4
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- - #4
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- - #6
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- - #7
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- - #8
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+ - # 9
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- - #9
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+ - # 10
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- - #10
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+ - # 11
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- - #11
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+ - # 12
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- - #12
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- - #13
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- - #16
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- - #17
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- - #18
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- - #23
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- num_resource: 64
- type: 1937
- host_id: 30
- reserved: 0
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+ type: 1937
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- num_resource: 8
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- reserved: 0
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+ num_resource: 3
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- num_resource: 3
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- reserved: 0
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+ type: 1942
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- num_resource: 3
- type: 1942
- host_id: 30
- reserved: 0
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- num_resource: 3
- type: 1942
- host_id: 128
- reserved: 0
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+ start_resource: 115
+ num_resource: 3
+ type: 1942
+ host_id: 128
+ reserved: 0
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- type: 1943
- host_id: 12
- reserved: 0
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+ num_resource: 16
+ type: 1943
+ host_id: 12
+ reserved: 0
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- num_resource: 16
- type: 1943
- host_id: 30
- reserved: 0
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+ start_resource: 118
+ num_resource: 16
+ type: 1943
+ host_id: 30
+ reserved: 0
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- num_resource: 8
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- host_id: 12
- reserved: 0
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+ type: 1944
+ host_id: 12
+ reserved: 0
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- num_resource: 8
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- host_id: 12
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- host_id: 12
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- reserved: 0
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- num_resource: 3
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- num_resource: 3
- type: 1955
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- reserved: 0
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- reserved: 0
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- reserved: 0
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+ reserved: 0
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- num_resource: 8
- type: 1956
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- reserved: 0
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- host_id: 12
- reserved: 0
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- host_id: 128
- reserved: 0
-
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- host_id: 12
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- num_resource: 128
- type: 12813
- host_id: 12
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- num_resource: 6
- type: 12829
- host_id: 128
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+ num_resource: 6
+ type: 12829
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+ reserved: 0
-
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diff --git a/board/ti/am62ax/sec-cfg.yaml b/board/ti/am62ax/sec-cfg.yaml
index f0ad20c..ae6939e 100644
--- a/board/ti/am62ax/sec-cfg.yaml
+++ b/board/ti/am62ax/sec-cfg.yaml
@@ -8,138 +8,138 @@
sec-cfg:
rev:
- boardcfg_abi_maj : 0x0
- boardcfg_abi_min : 0x1
+ boardcfg_abi_maj: 0x0
+ boardcfg_abi_min: 0x1
processor_acl_list:
subhdr:
magic: 0xF1EA
size: 164
proc_acl_entries:
- - #1
+ - # 1
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #2
+ - # 2
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #3
+ - # 3
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #4
+ - # 4
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #5
+ - # 5
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #6
+ - # 6
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #7
+ - # 7
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #8
+ - # 8
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #9
+ - # 9
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #10
+ - # 10
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #11
+ - # 11
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #12
+ - # 12
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #13
+ - # 13
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #14
+ - # 14
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #15
+ - # 15
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #16
+ - # 16
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #17
+ - # 17
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #18
+ - # 18
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #19
+ - # 19
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #20
+ - # 20
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #21
+ - # 21
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #22
+ - # 22
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #23
+ - # 23
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #24
+ - # 24
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #25
+ - # 25
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #26
+ - # 26
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #27
+ - # 27
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #28
+ - # 28
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #29
+ - # 29
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #30
+ - # 30
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #31
+ - # 31
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #32
+ - # 32
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
@@ -148,202 +148,202 @@
magic: 0x8D27
size: 68
host_hierarchy_entries:
- - #1
+ - # 1
host_id: 0
supervisor_host_id: 0
- - #2
+ - # 2
host_id: 0
supervisor_host_id: 0
- - #3
+ - # 3
host_id: 0
supervisor_host_id: 0
- - #4
+ - # 4
host_id: 0
supervisor_host_id: 0
- - #5
+ - # 5
host_id: 0
supervisor_host_id: 0
- - #6
+ - # 6
host_id: 0
supervisor_host_id: 0
- - #7
+ - # 7
host_id: 0
supervisor_host_id: 0
- - #8
+ - # 8
host_id: 0
supervisor_host_id: 0
- - #9
+ - # 9
host_id: 0
supervisor_host_id: 0
- - #10
+ - # 10
host_id: 0
supervisor_host_id: 0
- - #11
+ - # 11
host_id: 0
supervisor_host_id: 0
- - #12
+ - # 12
host_id: 0
supervisor_host_id: 0
- - #13
+ - # 13
host_id: 0
supervisor_host_id: 0
- - #14
+ - # 14
host_id: 0
supervisor_host_id: 0
- - #15
+ - # 15
host_id: 0
supervisor_host_id: 0
- - #16
+ - # 16
host_id: 0
supervisor_host_id: 0
- - #17
+ - # 17
host_id: 0
supervisor_host_id: 0
- - #18
+ - # 18
host_id: 0
supervisor_host_id: 0
- - #19
+ - # 19
host_id: 0
supervisor_host_id: 0
- - #20
+ - # 20
host_id: 0
supervisor_host_id: 0
- - #21
+ - # 21
host_id: 0
supervisor_host_id: 0
- - #22
+ - # 22
host_id: 0
supervisor_host_id: 0
- - #23
+ - # 23
host_id: 0
supervisor_host_id: 0
- - #24
+ - # 24
host_id: 0
supervisor_host_id: 0
- - #25
+ - # 25
host_id: 0
supervisor_host_id: 0
- - #26
+ - # 26
host_id: 0
supervisor_host_id: 0
- - #27
+ - # 27
host_id: 0
supervisor_host_id: 0
- - #28
+ - # 28
host_id: 0
supervisor_host_id: 0
- - #29
+ - # 29
host_id: 0
supervisor_host_id: 0
- - #30
+ - # 30
host_id: 0
supervisor_host_id: 0
- - #31
+ - # 31
host_id: 0
supervisor_host_id: 0
- - #32
+ - # 32
host_id: 0
supervisor_host_id: 0
otp_config:
subhdr:
magic: 0x4081
size: 69
- write_host_id : 0
+ write_host_id: 0
otp_entry:
- - #1
+ - # 1
host_id: 0
host_perms: 0
- - #2
+ - # 2
host_id: 0
host_perms: 0
- - #3
+ - # 3
host_id: 0
host_perms: 0
- - #4
+ - # 4
host_id: 0
host_perms: 0
- - #5
+ - # 5
host_id: 0
host_perms: 0
- - #6
+ - # 6
host_id: 0
host_perms: 0
- - #7
+ - # 7
host_id: 0
host_perms: 0
- - #8
+ - # 8
host_id: 0
host_perms: 0
- - #9
+ - # 9
host_id: 0
host_perms: 0
- - #10
+ - # 10
host_id: 0
host_perms: 0
- - #11
+ - # 11
host_id: 0
host_perms: 0
- - #12
+ - # 12
host_id: 0
host_perms: 0
- - #13
+ - # 13
host_id: 0
host_perms: 0
- - #14
+ - # 14
host_id: 0
host_perms: 0
- - #15
+ - # 15
host_id: 0
host_perms: 0
- - #16
+ - # 16
host_id: 0
host_perms: 0
- - #17
+ - # 17
host_id: 0
host_perms: 0
- - #18
+ - # 18
host_id: 0
host_perms: 0
- - #19
+ - # 19
host_id: 0
host_perms: 0
- - #20
+ - # 20
host_id: 0
host_perms: 0
- - #21
+ - # 21
host_id: 0
host_perms: 0
- - #22
+ - # 22
host_id: 0
host_perms: 0
- - #23
+ - # 23
host_id: 0
host_perms: 0
- - #24
+ - # 24
host_id: 0
host_perms: 0
- - #25
+ - # 25
host_id: 0
host_perms: 0
- - #26
+ - # 26
host_id: 0
host_perms: 0
- - #27
+ - # 27
host_id: 0
host_perms: 0
- - #28
+ - # 28
host_id: 0
host_perms: 0
- - #29
+ - # 29
host_id: 0
host_perms: 0
- - #30
+ - # 30
host_id: 0
host_perms: 0
- - #31
+ - # 31
host_id: 0
host_perms: 0
- - #32
+ - # 32
host_id: 0
host_perms: 0
dkek_config:
@@ -351,12 +351,12 @@
magic: 0x5170
size: 12
allowed_hosts: [128, 0, 0, 0]
- allow_dkek_export_tisci : 0x5A
+ allow_dkek_export_tisci: 0x5A
rsvd: [0, 0, 0]
sa2ul_cfg:
subhdr:
magic: 0x23BE
- size : 0
+ size: 0
auth_resource_owner: 0
enable_saul_psil_global_config_writes: 0x5A
rsvd: [0, 0]
@@ -364,16 +364,16 @@
subhdr:
magic: 0x42AF
size: 16
- allow_jtag_unlock : 0x5A
- allow_wildcard_unlock : 0x5A
+ allow_jtag_unlock: 0x5A
+ allow_wildcard_unlock: 0x5A
allowed_debug_level_rsvd: 0
rsvd: 0
- min_cert_rev : 0x0
+ min_cert_rev: 0x0
jtag_unlock_hosts: [0, 0, 0, 0]
sec_handover_cfg:
subhdr:
magic: 0x608F
size: 10
- handover_msg_sender : 0
- handover_to_host_id : 0
+ handover_msg_sender: 0
+ handover_to_host_id: 0
rsvd: [0, 0, 0, 0]
diff --git a/board/ti/am62ax/tifs-rm-cfg.yaml b/board/ti/am62ax/tifs-rm-cfg.yaml
index 0b1980e..151cd59 100644
--- a/board/ti/am62ax/tifs-rm-cfg.yaml
+++ b/board/ti/am62ax/tifs-rm-cfg.yaml
@@ -9,1003 +9,895 @@
tifs-rm-cfg:
rm_boardcfg:
rev:
- boardcfg_abi_maj : 0x0
- boardcfg_abi_min : 0x1
+ boardcfg_abi_maj: 0x0
+ boardcfg_abi_min: 0x1
host_cfg:
subhdr:
magic: 0x4C41
- size : 356
+ size: 356
host_cfg_entries:
- - #1
+ - # 1
host_id: 12
- allowed_atype : 0x2A
- allowed_qos : 0xAAAA
- allowed_orderid : 0xAAAAAAAA
- allowed_priority : 0xAAAA
- allowed_sched_priority : 0xAA
- - #2
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - # 2
host_id: 30
- allowed_atype : 0x2A
- allowed_qos : 0xAAAA
- allowed_orderid : 0xAAAAAAAA
- allowed_priority : 0xAAAA
- allowed_sched_priority : 0xAA
- - #3
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - # 3
host_id: 36
- allowed_atype : 0x2A
- allowed_qos : 0xAAAA
- allowed_orderid : 0xAAAAAAAA
- allowed_priority : 0xAAAA
- allowed_sched_priority : 0xAA
- - #4
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - # 4
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #5
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 5
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #6
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 6
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #7
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 7
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #8
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 8
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #9
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 9
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #10
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 10
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #11
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 11
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #12
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 12
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #13
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 13
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #14
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 14
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #15
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 15
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #16
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 16
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #17
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 17
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #18
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 18
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #19
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 19
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #20
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 20
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #21
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 21
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #22
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 22
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #23
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 23
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #24
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 24
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #25
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 25
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #26
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 26
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #27
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 27
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #28
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 28
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #29
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 29
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #30
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 30
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #31
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 31
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #32
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 32
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
resasg:
subhdr:
magic: 0x7B25
- size : 8
+ size: 8
resasg_entries_size: 872
- reserved : 0
+ reserved: 0
resasg_entries:
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+ start_resource: 5632
+ num_resource: 51
+ type: 1811
+ host_id: 128
+ reserved: 0
-
- start_resource: 6144
- num_resource: 51
- type: 1812
- host_id: 128
- reserved: 0
-
+ start_resource: 6144
+ num_resource: 51
+ type: 1812
+ host_id: 128
+ reserved: 0
-
- start_resource: 6656
- num_resource: 51
- type: 1813
- host_id: 128
- reserved: 0
-
+ start_resource: 6656
+ num_resource: 51
+ type: 1813
+ host_id: 128
+ reserved: 0
-
- start_resource: 8192
- num_resource: 32
- type: 1814
- host_id: 128
- reserved: 0
-
+ start_resource: 8192
+ num_resource: 32
+ type: 1814
+ host_id: 128
+ reserved: 0
-
- start_resource: 8704
- num_resource: 32
- type: 1815
- host_id: 128
- reserved: 0
-
+ start_resource: 8704
+ num_resource: 32
+ type: 1815
+ host_id: 128
+ reserved: 0
-
- start_resource: 9216
- num_resource: 32
- type: 1816
- host_id: 128
- reserved: 0
-
+ start_resource: 9216
+ num_resource: 32
+ type: 1816
+ host_id: 128
+ reserved: 0
-
- start_resource: 9728
- num_resource: 22
- type: 1817
- host_id: 128
- reserved: 0
-
+ start_resource: 9728
+ num_resource: 22
+ type: 1817
+ host_id: 128
+ reserved: 0
-
- start_resource: 10240
- num_resource: 22
- type: 1818
- host_id: 128
- reserved: 0
-
+ start_resource: 10240
+ num_resource: 22
+ type: 1818
+ host_id: 128
+ reserved: 0
-
- start_resource: 10752
- num_resource: 22
- type: 1819
- host_id: 128
- reserved: 0
-
+ start_resource: 10752
+ num_resource: 22
+ type: 1819
+ host_id: 128
+ reserved: 0
-
- start_resource: 11264
- num_resource: 28
- type: 1820
- host_id: 128
- reserved: 0
-
+ start_resource: 11264
+ num_resource: 28
+ type: 1820
+ host_id: 128
+ reserved: 0
-
- start_resource: 11776
- num_resource: 28
- type: 1821
- host_id: 128
- reserved: 0
-
+ start_resource: 11776
+ num_resource: 28
+ type: 1821
+ host_id: 128
+ reserved: 0
-
- start_resource: 12288
- num_resource: 28
- type: 1822
- host_id: 128
- reserved: 0
-
+ start_resource: 12288
+ num_resource: 28
+ type: 1822
+ host_id: 128
+ reserved: 0
-
- start_resource: 0
- num_resource: 10
- type: 1936
- host_id: 12
- reserved: 0
-
+ start_resource: 0
+ num_resource: 10
+ type: 1936
+ host_id: 12
+ reserved: 0
-
- start_resource: 10
- num_resource: 3
- type: 1936
- host_id: 35
- reserved: 0
-
+ start_resource: 10
+ num_resource: 3
+ type: 1936
+ host_id: 35
+ reserved: 0
-
- start_resource: 10
- num_resource: 3
- type: 1936
- host_id: 36
- reserved: 0
-
+ start_resource: 10
+ num_resource: 3
+ type: 1936
+ host_id: 36
+ reserved: 0
-
- start_resource: 13
- num_resource: 3
- type: 1936
- host_id: 30
- reserved: 0
-
+ start_resource: 13
+ num_resource: 3
+ type: 1936
+ host_id: 30
+ reserved: 0
-
- start_resource: 16
- num_resource: 3
- type: 1936
- host_id: 128
- reserved: 0
-
+ start_resource: 16
+ num_resource: 3
+ type: 1936
+ host_id: 128
+ reserved: 0
-
- start_resource: 19
- num_resource: 64
- type: 1937
- host_id: 12
- reserved: 0
-
+ start_resource: 19
+ num_resource: 64
+ type: 1937
+ host_id: 12
+ reserved: 0
-
- start_resource: 19
- num_resource: 64
- type: 1937
- host_id: 30
- reserved: 0
-
+ start_resource: 19
+ num_resource: 64
+ type: 1937
+ host_id: 30
+ reserved: 0
-
- start_resource: 83
- num_resource: 8
- type: 1938
- host_id: 12
- reserved: 0
-
+ start_resource: 83
+ num_resource: 8
+ type: 1938
+ host_id: 12
+ reserved: 0
-
- start_resource: 91
- num_resource: 8
- type: 1939
- host_id: 12
- reserved: 0
-
+ start_resource: 91
+ num_resource: 8
+ type: 1939
+ host_id: 12
+ reserved: 0
-
- start_resource: 99
- num_resource: 10
- type: 1942
- host_id: 12
- reserved: 0
-
+ start_resource: 99
+ num_resource: 10
+ type: 1942
+ host_id: 12
+ reserved: 0
-
- start_resource: 109
- num_resource: 3
- type: 1942
- host_id: 35
- reserved: 0
-
+ start_resource: 109
+ num_resource: 3
+ type: 1942
+ host_id: 35
+ reserved: 0
-
- start_resource: 109
- num_resource: 3
- type: 1942
- host_id: 36
- reserved: 0
-
+ start_resource: 109
+ num_resource: 3
+ type: 1942
+ host_id: 36
+ reserved: 0
-
- start_resource: 112
- num_resource: 3
- type: 1942
- host_id: 30
- reserved: 0
-
+ start_resource: 112
+ num_resource: 3
+ type: 1942
+ host_id: 30
+ reserved: 0
-
- start_resource: 115
- num_resource: 3
- type: 1942
- host_id: 128
- reserved: 0
-
+ start_resource: 115
+ num_resource: 3
+ type: 1942
+ host_id: 128
+ reserved: 0
-
- start_resource: 118
- num_resource: 16
- type: 1943
- host_id: 12
- reserved: 0
-
+ start_resource: 118
+ num_resource: 16
+ type: 1943
+ host_id: 12
+ reserved: 0
-
- start_resource: 118
- num_resource: 16
- type: 1943
- host_id: 30
- reserved: 0
-
+ start_resource: 118
+ num_resource: 16
+ type: 1943
+ host_id: 30
+ reserved: 0
-
- start_resource: 134
- num_resource: 8
- type: 1944
- host_id: 12
- reserved: 0
-
+ start_resource: 134
+ num_resource: 8
+ type: 1944
+ host_id: 12
+ reserved: 0
-
- start_resource: 134
- num_resource: 8
- type: 1945
- host_id: 12
- reserved: 0
-
+ start_resource: 134
+ num_resource: 8
+ type: 1945
+ host_id: 12
+ reserved: 0
-
- start_resource: 142
- num_resource: 8
- type: 1946
- host_id: 12
- reserved: 0
-
+ start_resource: 142
+ num_resource: 8
+ type: 1946
+ host_id: 12
+ reserved: 0
-
- start_resource: 142
- num_resource: 8
- type: 1947
- host_id: 12
- reserved: 0
-
+ start_resource: 142
+ num_resource: 8
+ type: 1947
+ host_id: 12
+ reserved: 0
-
- start_resource: 0
- num_resource: 10
- type: 1955
- host_id: 12
- reserved: 0
-
+ start_resource: 0
+ num_resource: 10
+ type: 1955
+ host_id: 12
+ reserved: 0
-
- start_resource: 10
- num_resource: 3
- type: 1955
- host_id: 35
- reserved: 0
-
+ start_resource: 10
+ num_resource: 3
+ type: 1955
+ host_id: 35
+ reserved: 0
-
- start_resource: 10
- num_resource: 3
- type: 1955
- host_id: 36
- reserved: 0
-
+ start_resource: 10
+ num_resource: 3
+ type: 1955
+ host_id: 36
+ reserved: 0
-
- start_resource: 13
- num_resource: 3
- type: 1955
- host_id: 30
- reserved: 0
-
+ start_resource: 13
+ num_resource: 3
+ type: 1955
+ host_id: 30
+ reserved: 0
-
- start_resource: 16
- num_resource: 3
- type: 1955
- host_id: 128
- reserved: 0
-
+ start_resource: 16
+ num_resource: 3
+ type: 1955
+ host_id: 128
+ reserved: 0
-
- start_resource: 19
- num_resource: 8
- type: 1956
- host_id: 12
- reserved: 0
-
+ start_resource: 19
+ num_resource: 8
+ type: 1956
+ host_id: 12
+ reserved: 0
-
- start_resource: 19
- num_resource: 8
- type: 1956
- host_id: 30
- reserved: 0
-
+ start_resource: 19
+ num_resource: 8
+ type: 1956
+ host_id: 30
+ reserved: 0
-
- start_resource: 27
- num_resource: 1
- type: 1957
- host_id: 12
- reserved: 0
-
+ start_resource: 27
+ num_resource: 1
+ type: 1957
+ host_id: 12
+ reserved: 0
-
- start_resource: 28
- num_resource: 1
- type: 1958
- host_id: 12
- reserved: 0
-
+ start_resource: 28
+ num_resource: 1
+ type: 1958
+ host_id: 12
+ reserved: 0
-
- start_resource: 0
- num_resource: 10
- type: 1961
- host_id: 12
- reserved: 0
-
+ start_resource: 0
+ num_resource: 10
+ type: 1961
+ host_id: 12
+ reserved: 0
-
- start_resource: 10
- num_resource: 3
- type: 1961
- host_id: 35
- reserved: 0
-
+ start_resource: 10
+ num_resource: 3
+ type: 1961
+ host_id: 35
+ reserved: 0
-
- start_resource: 10
- num_resource: 3
- type: 1961
- host_id: 36
- reserved: 0
-
+ start_resource: 10
+ num_resource: 3
+ type: 1961
+ host_id: 36
+ reserved: 0
-
- start_resource: 13
- num_resource: 3
- type: 1961
- host_id: 30
- reserved: 0
-
+ start_resource: 13
+ num_resource: 3
+ type: 1961
+ host_id: 30
+ reserved: 0
-
- start_resource: 16
- num_resource: 3
- type: 1961
- host_id: 128
- reserved: 0
-
+ start_resource: 16
+ num_resource: 3
+ type: 1961
+ host_id: 128
+ reserved: 0
-
- start_resource: 0
- num_resource: 10
- type: 1962
- host_id: 12
- reserved: 0
-
+ start_resource: 0
+ num_resource: 10
+ type: 1962
+ host_id: 12
+ reserved: 0
-
- start_resource: 10
- num_resource: 3
- type: 1962
- host_id: 35
- reserved: 0
-
+ start_resource: 10
+ num_resource: 3
+ type: 1962
+ host_id: 35
+ reserved: 0
-
- start_resource: 10
- num_resource: 3
- type: 1962
- host_id: 36
- reserved: 0
-
+ start_resource: 10
+ num_resource: 3
+ type: 1962
+ host_id: 36
+ reserved: 0
-
- start_resource: 13
- num_resource: 3
- type: 1962
- host_id: 30
- reserved: 0
-
+ start_resource: 13
+ num_resource: 3
+ type: 1962
+ host_id: 30
+ reserved: 0
-
- start_resource: 16
- num_resource: 3
- type: 1962
- host_id: 128
- reserved: 0
-
+ start_resource: 16
+ num_resource: 3
+ type: 1962
+ host_id: 128
+ reserved: 0
-
- start_resource: 19
- num_resource: 1
- type: 1963
- host_id: 12
- reserved: 0
-
+ start_resource: 19
+ num_resource: 1
+ type: 1963
+ host_id: 12
+ reserved: 0
-
- start_resource: 19
- num_resource: 1
- type: 1963
- host_id: 30
- reserved: 0
-
+ start_resource: 19
+ num_resource: 1
+ type: 1963
+ host_id: 30
+ reserved: 0
-
- start_resource: 19
- num_resource: 16
- type: 1964
- host_id: 12
- reserved: 0
-
+ start_resource: 19
+ num_resource: 16
+ type: 1964
+ host_id: 12
+ reserved: 0
-
- start_resource: 19
- num_resource: 16
- type: 1964
- host_id: 30
- reserved: 0
-
+ start_resource: 19
+ num_resource: 16
+ type: 1964
+ host_id: 30
+ reserved: 0
-
- start_resource: 20
- num_resource: 1
- type: 1965
- host_id: 12
- reserved: 0
-
+ start_resource: 20
+ num_resource: 1
+ type: 1965
+ host_id: 12
+ reserved: 0
-
- start_resource: 35
- num_resource: 8
- type: 1966
- host_id: 12
- reserved: 0
-
+ start_resource: 35
+ num_resource: 8
+ type: 1966
+ host_id: 12
+ reserved: 0
-
- start_resource: 21
- num_resource: 1
- type: 1967
- host_id: 12
- reserved: 0
-
+ start_resource: 21
+ num_resource: 1
+ type: 1967
+ host_id: 12
+ reserved: 0
-
- start_resource: 35
- num_resource: 8
- type: 1968
- host_id: 12
- reserved: 0
-
+ start_resource: 35
+ num_resource: 8
+ type: 1968
+ host_id: 12
+ reserved: 0
-
- start_resource: 22
- num_resource: 1
- type: 1969
- host_id: 12
- reserved: 0
-
+ start_resource: 22
+ num_resource: 1
+ type: 1969
+ host_id: 12
+ reserved: 0
-
- start_resource: 43
- num_resource: 8
- type: 1970
- host_id: 12
- reserved: 0
-
+ start_resource: 43
+ num_resource: 8
+ type: 1970
+ host_id: 12
+ reserved: 0
-
- start_resource: 23
- num_resource: 1
- type: 1971
- host_id: 12
- reserved: 0
-
+ start_resource: 23
+ num_resource: 1
+ type: 1971
+ host_id: 12
+ reserved: 0
-
- start_resource: 43
- num_resource: 8
- type: 1972
- host_id: 12
- reserved: 0
-
+ start_resource: 43
+ num_resource: 8
+ type: 1972
+ host_id: 12
+ reserved: 0
-
- start_resource: 0
- num_resource: 1
- type: 2112
- host_id: 128
- reserved: 0
-
+ start_resource: 0
+ num_resource: 1
+ type: 2112
+ host_id: 128
+ reserved: 0
-
- start_resource: 2
- num_resource: 2
- type: 2122
- host_id: 12
- reserved: 0
-
+ start_resource: 2
+ num_resource: 2
+ type: 2122
+ host_id: 12
+ reserved: 0
-
- start_resource: 0
- num_resource: 6
- type: 12750
- host_id: 12
- reserved: 0
-
+ start_resource: 0
+ num_resource: 6
+ type: 12750
+ host_id: 12
+ reserved: 0
-
- start_resource: 0
- num_resource: 6
- type: 12769
- host_id: 12
- reserved: 0
-
+ start_resource: 0
+ num_resource: 6
+ type: 12769
+ host_id: 12
+ reserved: 0
-
- start_resource: 0
- num_resource: 8
- type: 12810
- host_id: 12
- reserved: 0
-
+ start_resource: 0
+ num_resource: 8
+ type: 12810
+ host_id: 12
+ reserved: 0
-
- start_resource: 3072
- num_resource: 6
- type: 12828
- host_id: 128
- reserved: 0
-
+ start_resource: 3072
+ num_resource: 6
+ type: 12828
+ host_id: 128
+ reserved: 0
-
- start_resource: 3584
- num_resource: 6
- type: 12829
- host_id: 128
- reserved: 0
-
+ start_resource: 3584
+ num_resource: 6
+ type: 12829
+ host_id: 128
+ reserved: 0
-
- start_resource: 4096
- num_resource: 6
- type: 12830
- host_id: 128
- reserved: 0
+ start_resource: 4096
+ num_resource: 6
+ type: 12830
+ host_id: 128
+ reserved: 0
diff --git a/board/ti/am62x/board-cfg.yaml b/board/ti/am62x/board-cfg.yaml
index 36cfb55..45c89dd 100644
--- a/board/ti/am62x/board-cfg.yaml
+++ b/board/ti/am62x/board-cfg.yaml
@@ -8,29 +8,29 @@
board-cfg:
rev:
- boardcfg_abi_maj : 0x0
- boardcfg_abi_min : 0x1
+ boardcfg_abi_maj: 0x0
+ boardcfg_abi_min: 0x1
control:
subhdr:
magic: 0xC1D3
size: 7
- main_isolation_enable : 0x5A
- main_isolation_hostid : 0x2
+ main_isolation_enable: 0x5A
+ main_isolation_hostid: 0x2
secproxy:
subhdr:
magic: 0x1207
size: 7
- scaling_factor : 0x1
- scaling_profile : 0x1
- disable_main_nav_secure_proxy : 0
+ scaling_factor: 0x1
+ scaling_profile: 0x1
+ disable_main_nav_secure_proxy: 0
msmc:
subhdr:
magic: 0xA5C3
size: 5
- msmc_cache_size : 0x0
+ msmc_cache_size: 0x0
debug_cfg:
subhdr:
magic: 0x020C
size: 8
- trace_dst_enables : 0x00
- trace_src_enables : 0x00
+ trace_dst_enables: 0x00
+ trace_src_enables: 0x00
diff --git a/board/ti/am62x/pm-cfg.yaml b/board/ti/am62x/pm-cfg.yaml
index 5d04cf8..9853a25 100644
--- a/board/ti/am62x/pm-cfg.yaml
+++ b/board/ti/am62x/pm-cfg.yaml
@@ -8,5 +8,5 @@
pm-cfg:
rev:
- boardcfg_abi_maj : 0x0
- boardcfg_abi_min : 0x1
+ boardcfg_abi_maj: 0x0
+ boardcfg_abi_min: 0x1
diff --git a/board/ti/am62x/rm-cfg.yaml b/board/ti/am62x/rm-cfg.yaml
index c28707b..725f7c8 100644
--- a/board/ti/am62x/rm-cfg.yaml
+++ b/board/ti/am62x/rm-cfg.yaml
@@ -1,7 +1,7 @@
# SPDX-License-Identifier: GPL-2.0+
# Copyright (C) 2022-2023 Texas Instruments Incorporated - https://www.ti.com/
#
-# Resource management configuration for AM62
+# Resource management configuration for AM62X
#
---
@@ -9,1080 +9,973 @@
rm-cfg:
rm_boardcfg:
rev:
- boardcfg_abi_maj : 0x0
- boardcfg_abi_min : 0x1
+ boardcfg_abi_maj: 0x0
+ boardcfg_abi_min: 0x1
host_cfg:
subhdr:
magic: 0x4C41
- size : 356
+ size: 356
host_cfg_entries:
- - #1
+ - # 1
host_id: 12
- allowed_atype : 0x2A
- allowed_qos : 0xAAAA
- allowed_orderid : 0xAAAAAAAA
- allowed_priority : 0xAAAA
- allowed_sched_priority : 0xAA
- - #2
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - # 2
host_id: 30
- allowed_atype : 0x2A
- allowed_qos : 0xAAAA
- allowed_orderid : 0xAAAAAAAA
- allowed_priority : 0xAAAA
- allowed_sched_priority : 0xAA
- - #3
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - # 3
host_id: 36
- allowed_atype : 0x2A
- allowed_qos : 0xAAAA
- allowed_orderid : 0xAAAAAAAA
- allowed_priority : 0xAAAA
- allowed_sched_priority : 0xAA
- - #4
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - # 4
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #5
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 5
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #6
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 6
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #7
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 7
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #8
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 8
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #9
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 9
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #10
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 10
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #11
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 11
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #12
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 12
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #13
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 13
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #14
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 14
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #15
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 15
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #16
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 16
host_id: 0
- allowed_atype : 0
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+ host_id: 35
+ reserved: 0
-
- start_resource: 109
- num_resource: 3
- type: 1942
- host_id: 36
- reserved: 0
-
+ start_resource: 109
+ num_resource: 3
+ type: 1942
+ host_id: 36
+ reserved: 0
-
- start_resource: 112
- num_resource: 3
- type: 1942
- host_id: 30
- reserved: 0
-
+ start_resource: 112
+ num_resource: 3
+ type: 1942
+ host_id: 30
+ reserved: 0
-
- start_resource: 115
- num_resource: 3
- type: 1942
- host_id: 128
- reserved: 0
-
+ start_resource: 115
+ num_resource: 3
+ type: 1942
+ host_id: 128
+ reserved: 0
-
- start_resource: 118
- num_resource: 16
- type: 1943
- host_id: 12
- reserved: 0
-
+ start_resource: 118
+ num_resource: 16
+ type: 1943
+ host_id: 12
+ reserved: 0
-
- start_resource: 118
- num_resource: 16
- type: 1943
- host_id: 36
- reserved: 0
-
+ start_resource: 118
+ num_resource: 16
+ type: 1943
+ host_id: 36
+ reserved: 0
-
- start_resource: 134
- num_resource: 8
- type: 1944
- host_id: 12
- reserved: 0
-
+ start_resource: 134
+ num_resource: 8
+ type: 1944
+ host_id: 12
+ reserved: 0
-
- start_resource: 134
- num_resource: 8
- type: 1945
- host_id: 12
- reserved: 0
-
+ start_resource: 134
+ num_resource: 8
+ type: 1945
+ host_id: 12
+ reserved: 0
-
- start_resource: 142
- num_resource: 8
- type: 1946
- host_id: 12
- reserved: 0
-
+ start_resource: 142
+ num_resource: 8
+ type: 1946
+ host_id: 12
+ reserved: 0
-
- start_resource: 142
- num_resource: 8
- type: 1947
- host_id: 12
- reserved: 0
-
+ start_resource: 142
+ num_resource: 8
+ type: 1947
+ host_id: 12
+ reserved: 0
-
- start_resource: 0
- num_resource: 10
- type: 1955
- host_id: 12
- reserved: 0
-
+ start_resource: 0
+ num_resource: 10
+ type: 1955
+ host_id: 12
+ reserved: 0
-
- start_resource: 10
- num_resource: 3
- type: 1955
- host_id: 35
- reserved: 0
-
+ start_resource: 10
+ num_resource: 3
+ type: 1955
+ host_id: 35
+ reserved: 0
-
- start_resource: 10
- num_resource: 3
- type: 1955
- host_id: 36
- reserved: 0
-
+ start_resource: 10
+ num_resource: 3
+ type: 1955
+ host_id: 36
+ reserved: 0
-
- start_resource: 13
- num_resource: 3
- type: 1955
- host_id: 30
- reserved: 0
-
+ start_resource: 13
+ num_resource: 3
+ type: 1955
+ host_id: 30
+ reserved: 0
-
- start_resource: 16
- num_resource: 3
- type: 1955
- host_id: 128
- reserved: 0
-
+ start_resource: 16
+ num_resource: 3
+ type: 1955
+ host_id: 128
+ reserved: 0
-
- start_resource: 19
- num_resource: 8
- type: 1956
- host_id: 12
- reserved: 0
-
+ start_resource: 19
+ num_resource: 8
+ type: 1956
+ host_id: 12
+ reserved: 0
-
- start_resource: 19
- num_resource: 8
- type: 1956
- host_id: 36
- reserved: 0
-
+ start_resource: 19
+ num_resource: 8
+ type: 1956
+ host_id: 36
+ reserved: 0
-
- start_resource: 27
- num_resource: 1
- type: 1957
- host_id: 12
- reserved: 0
-
+ start_resource: 27
+ num_resource: 1
+ type: 1957
+ host_id: 12
+ reserved: 0
-
- start_resource: 28
- num_resource: 1
- type: 1958
- host_id: 12
- reserved: 0
-
+ start_resource: 28
+ num_resource: 1
+ type: 1958
+ host_id: 12
+ reserved: 0
-
- start_resource: 0
- num_resource: 10
- type: 1961
- host_id: 12
- reserved: 0
-
+ start_resource: 0
+ num_resource: 10
+ type: 1961
+ host_id: 12
+ reserved: 0
-
- start_resource: 10
- num_resource: 3
- type: 1961
- host_id: 35
- reserved: 0
-
+ start_resource: 10
+ num_resource: 3
+ type: 1961
+ host_id: 35
+ reserved: 0
-
- start_resource: 10
- num_resource: 3
- type: 1961
- host_id: 36
- reserved: 0
-
+ start_resource: 10
+ num_resource: 3
+ type: 1961
+ host_id: 36
+ reserved: 0
-
- start_resource: 13
- num_resource: 3
- type: 1961
- host_id: 30
- reserved: 0
-
+ start_resource: 13
+ num_resource: 3
+ type: 1961
+ host_id: 30
+ reserved: 0
-
- start_resource: 16
- num_resource: 3
- type: 1961
- host_id: 128
- reserved: 0
-
+ start_resource: 16
+ num_resource: 3
+ type: 1961
+ host_id: 128
+ reserved: 0
-
- start_resource: 0
- num_resource: 10
- type: 1962
- host_id: 12
- reserved: 0
-
+ start_resource: 0
+ num_resource: 10
+ type: 1962
+ host_id: 12
+ reserved: 0
-
- start_resource: 10
- num_resource: 3
- type: 1962
- host_id: 35
- reserved: 0
-
+ start_resource: 10
+ num_resource: 3
+ type: 1962
+ host_id: 35
+ reserved: 0
-
- start_resource: 10
- num_resource: 3
- type: 1962
- host_id: 36
- reserved: 0
-
+ start_resource: 10
+ num_resource: 3
+ type: 1962
+ host_id: 36
+ reserved: 0
-
- start_resource: 13
- num_resource: 3
- type: 1962
- host_id: 30
- reserved: 0
-
+ start_resource: 13
+ num_resource: 3
+ type: 1962
+ host_id: 30
+ reserved: 0
-
- start_resource: 16
- num_resource: 3
- type: 1962
- host_id: 128
- reserved: 0
-
+ start_resource: 16
+ num_resource: 3
+ type: 1962
+ host_id: 128
+ reserved: 0
-
- start_resource: 19
- num_resource: 1
- type: 1963
- host_id: 12
- reserved: 0
-
+ start_resource: 19
+ num_resource: 1
+ type: 1963
+ host_id: 12
+ reserved: 0
-
- start_resource: 19
- num_resource: 1
- type: 1963
- host_id: 36
- reserved: 0
-
+ start_resource: 19
+ num_resource: 1
+ type: 1963
+ host_id: 36
+ reserved: 0
-
- start_resource: 19
- num_resource: 16
- type: 1964
- host_id: 12
- reserved: 0
-
+ start_resource: 19
+ num_resource: 16
+ type: 1964
+ host_id: 12
+ reserved: 0
-
- start_resource: 19
- num_resource: 16
- type: 1964
- host_id: 36
- reserved: 0
-
+ start_resource: 19
+ num_resource: 16
+ type: 1964
+ host_id: 36
+ reserved: 0
-
- start_resource: 20
- num_resource: 1
- type: 1965
- host_id: 12
- reserved: 0
-
+ start_resource: 20
+ num_resource: 1
+ type: 1965
+ host_id: 12
+ reserved: 0
-
- start_resource: 35
- num_resource: 8
- type: 1966
- host_id: 12
- reserved: 0
-
+ start_resource: 35
+ num_resource: 8
+ type: 1966
+ host_id: 12
+ reserved: 0
-
- start_resource: 21
- num_resource: 1
- type: 1967
- host_id: 12
- reserved: 0
-
+ start_resource: 21
+ num_resource: 1
+ type: 1967
+ host_id: 12
+ reserved: 0
-
- start_resource: 35
- num_resource: 8
- type: 1968
- host_id: 12
- reserved: 0
-
+ start_resource: 35
+ num_resource: 8
+ type: 1968
+ host_id: 12
+ reserved: 0
-
- start_resource: 22
- num_resource: 1
- type: 1969
- host_id: 12
- reserved: 0
-
+ start_resource: 22
+ num_resource: 1
+ type: 1969
+ host_id: 12
+ reserved: 0
-
- start_resource: 43
- num_resource: 8
- type: 1970
- host_id: 12
- reserved: 0
-
+ start_resource: 43
+ num_resource: 8
+ type: 1970
+ host_id: 12
+ reserved: 0
-
- start_resource: 23
- num_resource: 1
- type: 1971
- host_id: 12
- reserved: 0
-
+ start_resource: 23
+ num_resource: 1
+ type: 1971
+ host_id: 12
+ reserved: 0
-
- start_resource: 43
- num_resource: 8
- type: 1972
- host_id: 12
- reserved: 0
-
+ start_resource: 43
+ num_resource: 8
+ type: 1972
+ host_id: 12
+ reserved: 0
-
- start_resource: 0
- num_resource: 1
- type: 2112
- host_id: 128
- reserved: 0
-
+ start_resource: 0
+ num_resource: 1
+ type: 2112
+ host_id: 128
+ reserved: 0
-
- start_resource: 2
- num_resource: 2
- type: 2122
- host_id: 12
- reserved: 0
+ start_resource: 2
+ num_resource: 2
+ type: 2122
+ host_id: 12
+ reserved: 0
diff --git a/board/ti/am62x/sec-cfg.yaml b/board/ti/am62x/sec-cfg.yaml
index 07081ce..088b2db 100644
--- a/board/ti/am62x/sec-cfg.yaml
+++ b/board/ti/am62x/sec-cfg.yaml
@@ -8,138 +8,138 @@
sec-cfg:
rev:
- boardcfg_abi_maj : 0x0
- boardcfg_abi_min : 0x1
+ boardcfg_abi_maj: 0x0
+ boardcfg_abi_min: 0x1
processor_acl_list:
subhdr:
magic: 0xF1EA
size: 164
proc_acl_entries:
- - #1
+ - # 1
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #2
+ - # 2
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #3
+ - # 3
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #4
+ - # 4
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #5
+ - # 5
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #6
+ - # 6
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #7
+ - # 7
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #8
+ - # 8
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #9
+ - # 9
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #10
+ - # 10
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #11
+ - # 11
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #12
+ - # 12
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #13
+ - # 13
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #14
+ - # 14
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #15
+ - # 15
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #16
+ - # 16
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #17
+ - # 17
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #18
+ - # 18
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #19
+ - # 19
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #20
+ - # 20
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #21
+ - # 21
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #22
+ - # 22
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #23
+ - # 23
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #24
+ - # 24
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #25
+ - # 25
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #26
+ - # 26
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #27
+ - # 27
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #28
+ - # 28
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #29
+ - # 29
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #30
+ - # 30
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #31
+ - # 31
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #32
+ - # 32
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
@@ -148,202 +148,202 @@
magic: 0x8D27
size: 68
host_hierarchy_entries:
- - #1
+ - # 1
host_id: 0
supervisor_host_id: 0
- - #2
+ - # 2
host_id: 0
supervisor_host_id: 0
- - #3
+ - # 3
host_id: 0
supervisor_host_id: 0
- - #4
+ - # 4
host_id: 0
supervisor_host_id: 0
- - #5
+ - # 5
host_id: 0
supervisor_host_id: 0
- - #6
+ - # 6
host_id: 0
supervisor_host_id: 0
- - #7
+ - # 7
host_id: 0
supervisor_host_id: 0
- - #8
+ - # 8
host_id: 0
supervisor_host_id: 0
- - #9
+ - # 9
host_id: 0
supervisor_host_id: 0
- - #10
+ - # 10
host_id: 0
supervisor_host_id: 0
- - #11
+ - # 11
host_id: 0
supervisor_host_id: 0
- - #12
+ - # 12
host_id: 0
supervisor_host_id: 0
- - #13
+ - # 13
host_id: 0
supervisor_host_id: 0
- - #14
+ - # 14
host_id: 0
supervisor_host_id: 0
- - #15
+ - # 15
host_id: 0
supervisor_host_id: 0
- - #16
+ - # 16
host_id: 0
supervisor_host_id: 0
- - #17
+ - # 17
host_id: 0
supervisor_host_id: 0
- - #18
+ - # 18
host_id: 0
supervisor_host_id: 0
- - #19
+ - # 19
host_id: 0
supervisor_host_id: 0
- - #20
+ - # 20
host_id: 0
supervisor_host_id: 0
- - #21
+ - # 21
host_id: 0
supervisor_host_id: 0
- - #22
+ - # 22
host_id: 0
supervisor_host_id: 0
- - #23
+ - # 23
host_id: 0
supervisor_host_id: 0
- - #24
+ - # 24
host_id: 0
supervisor_host_id: 0
- - #25
+ - # 25
host_id: 0
supervisor_host_id: 0
- - #26
+ - # 26
host_id: 0
supervisor_host_id: 0
- - #27
+ - # 27
host_id: 0
supervisor_host_id: 0
- - #28
+ - # 28
host_id: 0
supervisor_host_id: 0
- - #29
+ - # 29
host_id: 0
supervisor_host_id: 0
- - #30
+ - # 30
host_id: 0
supervisor_host_id: 0
- - #31
+ - # 31
host_id: 0
supervisor_host_id: 0
- - #32
+ - # 32
host_id: 0
supervisor_host_id: 0
otp_config:
subhdr:
magic: 0x4081
size: 69
- write_host_id : 0
+ write_host_id: 0
otp_entry:
- - #1
+ - # 1
host_id: 0
host_perms: 0
- - #2
+ - # 2
host_id: 0
host_perms: 0
- - #3
+ - # 3
host_id: 0
host_perms: 0
- - #4
+ - # 4
host_id: 0
host_perms: 0
- - #5
+ - # 5
host_id: 0
host_perms: 0
- - #6
+ - # 6
host_id: 0
host_perms: 0
- - #7
+ - # 7
host_id: 0
host_perms: 0
- - #8
+ - # 8
host_id: 0
host_perms: 0
- - #9
+ - # 9
host_id: 0
host_perms: 0
- - #10
+ - # 10
host_id: 0
host_perms: 0
- - #11
+ - # 11
host_id: 0
host_perms: 0
- - #12
+ - # 12
host_id: 0
host_perms: 0
- - #13
+ - # 13
host_id: 0
host_perms: 0
- - #14
+ - # 14
host_id: 0
host_perms: 0
- - #15
+ - # 15
host_id: 0
host_perms: 0
- - #16
+ - # 16
host_id: 0
host_perms: 0
- - #17
+ - # 17
host_id: 0
host_perms: 0
- - #18
+ - # 18
host_id: 0
host_perms: 0
- - #19
+ - # 19
host_id: 0
host_perms: 0
- - #20
+ - # 20
host_id: 0
host_perms: 0
- - #21
+ - # 21
host_id: 0
host_perms: 0
- - #22
+ - # 22
host_id: 0
host_perms: 0
- - #23
+ - # 23
host_id: 0
host_perms: 0
- - #24
+ - # 24
host_id: 0
host_perms: 0
- - #25
+ - # 25
host_id: 0
host_perms: 0
- - #26
+ - # 26
host_id: 0
host_perms: 0
- - #27
+ - # 27
host_id: 0
host_perms: 0
- - #28
+ - # 28
host_id: 0
host_perms: 0
- - #29
+ - # 29
host_id: 0
host_perms: 0
- - #30
+ - # 30
host_id: 0
host_perms: 0
- - #31
+ - # 31
host_id: 0
host_perms: 0
- - #32
+ - # 32
host_id: 0
host_perms: 0
dkek_config:
@@ -351,12 +351,12 @@
magic: 0x5170
size: 12
allowed_hosts: [128, 0, 0, 0]
- allow_dkek_export_tisci : 0x5A
+ allow_dkek_export_tisci: 0x5A
rsvd: [0, 0, 0]
sa2ul_cfg:
subhdr:
magic: 0x23BE
- size : 0
+ size: 0
auth_resource_owner: 0
enable_saul_psil_global_config_writes: 0x5A
rsvd: [0, 0]
@@ -364,16 +364,16 @@
subhdr:
magic: 0x42AF
size: 16
- allow_jtag_unlock : 0x5A
- allow_wildcard_unlock : 0x5A
+ allow_jtag_unlock: 0x5A
+ allow_wildcard_unlock: 0x5A
allowed_debug_level_rsvd: 0
rsvd: 0
- min_cert_rev : 0x0
+ min_cert_rev: 0x0
jtag_unlock_hosts: [0, 0, 0, 0]
sec_handover_cfg:
subhdr:
magic: 0x608F
size: 10
- handover_msg_sender : 0
- handover_to_host_id : 0
+ handover_msg_sender: 0
+ handover_to_host_id: 0
rsvd: [0, 0, 0, 0]
diff --git a/board/ti/am64x/board-cfg.yaml b/board/ti/am64x/board-cfg.yaml
index 62947c0..8981b75 100644
--- a/board/ti/am64x/board-cfg.yaml
+++ b/board/ti/am64x/board-cfg.yaml
@@ -8,29 +8,29 @@
board-cfg:
rev:
- boardcfg_abi_maj : 0x0
- boardcfg_abi_min : 0x1
+ boardcfg_abi_maj: 0x0
+ boardcfg_abi_min: 0x1
control:
subhdr:
magic: 0xC1D3
size: 7
- main_isolation_enable : 0x5A
- main_isolation_hostid : 0x2
+ main_isolation_enable: 0x5A
+ main_isolation_hostid: 0x2
secproxy:
subhdr:
magic: 0x1207
size: 7
- scaling_factor : 0x1
- scaling_profile : 0x1
- disable_main_nav_secure_proxy : 0
+ scaling_factor: 0x1
+ scaling_profile: 0x1
+ disable_main_nav_secure_proxy: 0
msmc:
subhdr:
magic: 0xA5C3
size: 5
- msmc_cache_size : 0x0
+ msmc_cache_size: 0x0
debug_cfg:
subhdr:
magic: 0x020C
size: 8
- trace_dst_enables : 0x00
- trace_src_enables : 0x00
+ trace_dst_enables: 0x00
+ trace_src_enables: 0x00
diff --git a/board/ti/am64x/evm.c b/board/ti/am64x/evm.c
index a6dcff2..a7ca6be 100644
--- a/board/ti/am64x/evm.c
+++ b/board/ti/am64x/evm.c
@@ -18,6 +18,7 @@
#include "../common/board_detect.h"
#define board_is_am64x_gpevm() (board_ti_k3_is("AM64-GPEVM") || \
+ board_ti_k3_is("AM64-EVM") || \
board_ti_k3_is("AM64-HSEVM"))
#define board_is_am64x_skevm() (board_ti_k3_is("AM64-SKEVM") || \
diff --git a/board/ti/am64x/pm-cfg.yaml b/board/ti/am64x/pm-cfg.yaml
index 83c6a03..7afb296 100644
--- a/board/ti/am64x/pm-cfg.yaml
+++ b/board/ti/am64x/pm-cfg.yaml
@@ -8,5 +8,5 @@
pm-cfg:
rev:
- boardcfg_abi_maj : 0x0
- boardcfg_abi_min : 0x1
+ boardcfg_abi_maj: 0x0
+ boardcfg_abi_min: 0x1
diff --git a/board/ti/am64x/rm-cfg.yaml b/board/ti/am64x/rm-cfg.yaml
index 1f4c6cf..88b37b5 100644
--- a/board/ti/am64x/rm-cfg.yaml
+++ b/board/ti/am64x/rm-cfg.yaml
@@ -9,256 +9,231 @@
rm-cfg:
rm_boardcfg:
rev:
- boardcfg_abi_maj : 0x0
- boardcfg_abi_min : 0x1
+ boardcfg_abi_maj: 0x0
+ boardcfg_abi_min: 0x1
host_cfg:
subhdr:
magic: 0x4C41
- size : 356
+ size: 356
host_cfg_entries:
- - #1
+ - # 1
host_id: 12
- allowed_atype : 0x2A
- allowed_qos : 0xAAAA
- allowed_orderid : 0xAAAAAAAA
- allowed_priority : 0xAAAA
- allowed_sched_priority : 0xAA
- - #2
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - # 2
host_id: 30
- allowed_atype : 0x2A
- allowed_qos : 0xAAAA
- allowed_orderid : 0xAAAAAAAA
- allowed_priority : 0xAAAA
- allowed_sched_priority : 0xAA
- - #3
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - # 3
host_id: 36
- allowed_atype : 0x2A
- allowed_qos : 0xAAAA
- allowed_orderid : 0xAAAAAAAA
- allowed_priority : 0xAAAA
- allowed_sched_priority : 0xAA
- - #4
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - # 4
host_id: 38
- allowed_atype : 0x2A
- allowed_qos : 0xAAAA
- allowed_orderid : 0xAAAAAAAA
- allowed_priority : 0xAAAA
- allowed_sched_priority : 0xAA
- - #5
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - # 5
host_id: 41
- allowed_atype : 0x2A
- allowed_qos : 0xAAAA
- allowed_orderid : 0xAAAAAAAA
- allowed_priority : 0xAAAA
- allowed_sched_priority : 0xAA
- - #6
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - # 6
host_id: 43
- allowed_atype : 0x2A
- allowed_qos : 0xAAAA
- allowed_orderid : 0xAAAAAAAA
- allowed_priority : 0xAAAA
- allowed_sched_priority : 0xAA
- - #7
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - # 7
host_id: 0
allowed_atype: 0
allowed_qos: 0
allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
-
- - #8
+ - # 8
host_id: 0
allowed_atype: 0
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allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
-
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+ - # 9
host_id: 0
allowed_atype: 0
allowed_qos: 0
allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
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- - #10
+ - # 10
host_id: 0
allowed_atype: 0
allowed_qos: 0
allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
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+ - # 11
host_id: 0
allowed_atype: 0
allowed_qos: 0
allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
-
- - #12
+ - # 12
host_id: 0
allowed_atype: 0
allowed_qos: 0
allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
-
- - #13
+ - # 13
host_id: 0
allowed_atype: 0
allowed_qos: 0
allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
-
- - #14
+ - # 14
host_id: 0
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allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
-
- - #15
+ - # 15
host_id: 0
allowed_atype: 0
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allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
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- - #16
+ - # 16
host_id: 0
allowed_atype: 0
allowed_qos: 0
allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
-
- - #17
+ - # 17
host_id: 0
allowed_atype: 0
allowed_qos: 0
allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
-
- - #18
+ - # 18
host_id: 0
allowed_atype: 0
allowed_qos: 0
allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
-
- - #19
+ - # 19
host_id: 0
allowed_atype: 0
allowed_qos: 0
allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
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- - #20
+ - # 20
host_id: 0
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allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
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- - #21
+ - # 21
host_id: 0
allowed_atype: 0
allowed_qos: 0
allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
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- - #22
+ - # 22
host_id: 0
allowed_atype: 0
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allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
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- - #23
+ - # 23
host_id: 0
allowed_atype: 0
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allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
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- - #24
+ - # 24
host_id: 0
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allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
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- - #25
+ - # 25
host_id: 0
allowed_atype: 0
allowed_qos: 0
allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
-
- - #26
+ - # 26
host_id: 0
allowed_atype: 0
allowed_qos: 0
allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
-
- - #27
+ - # 27
host_id: 0
allowed_atype: 0
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allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
-
- - #28
+ - # 28
host_id: 0
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allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
-
- - #29
+ - # 29
host_id: 0
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allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
-
- - #30
+ - # 30
host_id: 0
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allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
-
- - #31
+ - # 31
host_id: 0
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allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
-
- - #32
+ - # 32
host_id: 0
allowed_atype: 0
allowed_qos: 0
@@ -268,1133 +243,973 @@
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diff --git a/board/ti/am64x/sec-cfg.yaml b/board/ti/am64x/sec-cfg.yaml
index 7c51fd3..b61551c 100644
--- a/board/ti/am64x/sec-cfg.yaml
+++ b/board/ti/am64x/sec-cfg.yaml
@@ -8,343 +8,342 @@
sec-cfg:
rev:
- boardcfg_abi_maj : 0x0
- boardcfg_abi_min : 0x1
+ boardcfg_abi_maj: 0x0
+ boardcfg_abi_min: 0x1
processor_acl_list:
subhdr:
magic: 0xF1EA
size: 164
proc_acl_entries:
- - #1
+ - # 1
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #2
+ - # 2
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #3
+ - # 3
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #4
+ - # 4
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #5
+ - # 5
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #6
+ - # 6
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #7
+ - # 7
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #8
+ - # 8
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #9
+ - # 9
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #10
+ - # 10
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #11
+ - # 11
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #12
+ - # 12
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #13
+ - # 13
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #14
+ - # 14
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #15
+ - # 15
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #16
+ - # 16
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #17
+ - # 17
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #18
+ - # 18
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #19
+ - # 19
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #20
+ - # 20
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #21
+ - # 21
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #22
+ - # 22
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #23
+ - # 23
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #24
+ - # 24
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #25
+ - # 25
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #26
+ - # 26
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #27
+ - # 27
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #28
+ - # 28
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #29
+ - # 29
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #30
+ - # 30
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #31
+ - # 31
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #32
+ - # 32
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
-
host_hierarchy:
subhdr:
magic: 0x8D27
size: 68
host_hierarchy_entries:
- - #1
+ - # 1
host_id: 0
supervisor_host_id: 0
- - #2
+ - # 2
host_id: 0
supervisor_host_id: 0
- - #3
+ - # 3
host_id: 0
supervisor_host_id: 0
- - #4
+ - # 4
host_id: 0
supervisor_host_id: 0
- - #5
+ - # 5
host_id: 0
supervisor_host_id: 0
- - #6
+ - # 6
host_id: 0
supervisor_host_id: 0
- - #7
+ - # 7
host_id: 0
supervisor_host_id: 0
- - #8
+ - # 8
host_id: 0
supervisor_host_id: 0
- - #9
+ - # 9
host_id: 0
supervisor_host_id: 0
- - #10
+ - # 10
host_id: 0
supervisor_host_id: 0
- - #11
+ - # 11
host_id: 0
supervisor_host_id: 0
- - #12
+ - # 12
host_id: 0
supervisor_host_id: 0
- - #13
+ - # 13
host_id: 0
supervisor_host_id: 0
- - #14
+ - # 14
host_id: 0
supervisor_host_id: 0
- - #15
+ - # 15
host_id: 0
supervisor_host_id: 0
- - #16
+ - # 16
host_id: 0
supervisor_host_id: 0
- - #17
+ - # 17
host_id: 0
supervisor_host_id: 0
- - #18
+ - # 18
host_id: 0
supervisor_host_id: 0
- - #19
+ - # 19
host_id: 0
supervisor_host_id: 0
- - #20
+ - # 20
host_id: 0
supervisor_host_id: 0
- - #21
+ - # 21
host_id: 0
supervisor_host_id: 0
- - #22
+ - # 22
host_id: 0
supervisor_host_id: 0
- - #23
+ - # 23
host_id: 0
supervisor_host_id: 0
- - #24
+ - # 24
host_id: 0
supervisor_host_id: 0
- - #25
+ - # 25
host_id: 0
supervisor_host_id: 0
- - #26
+ - # 26
host_id: 0
supervisor_host_id: 0
- - #27
+ - # 27
host_id: 0
supervisor_host_id: 0
- - #28
+ - # 28
host_id: 0
supervisor_host_id: 0
- - #29
+ - # 29
host_id: 0
supervisor_host_id: 0
- - #30
+ - # 30
host_id: 0
supervisor_host_id: 0
- - #31
+ - # 31
host_id: 0
supervisor_host_id: 0
- - #32
+ - # 32
host_id: 0
supervisor_host_id: 0
otp_config:
subhdr:
magic: 0x4081
size: 69
- write_host_id : 0
+ write_host_id: 0
otp_entry:
- - #1
+ - # 1
host_id: 0
host_perms: 0
- - #2
+ - # 2
host_id: 0
host_perms: 0
- - #3
+ - # 3
host_id: 0
host_perms: 0
- - #4
+ - # 4
host_id: 0
host_perms: 0
- - #5
+ - # 5
host_id: 0
host_perms: 0
- - #6
+ - # 6
host_id: 0
host_perms: 0
- - #7
+ - # 7
host_id: 0
host_perms: 0
- - #8
+ - # 8
host_id: 0
host_perms: 0
- - #9
+ - # 9
host_id: 0
host_perms: 0
- - #10
+ - # 10
host_id: 0
host_perms: 0
- - #11
+ - # 11
host_id: 0
host_perms: 0
- - #12
+ - # 12
host_id: 0
host_perms: 0
- - #13
+ - # 13
host_id: 0
host_perms: 0
- - #14
+ - # 14
host_id: 0
host_perms: 0
- - #15
+ - # 15
host_id: 0
host_perms: 0
- - #16
+ - # 16
host_id: 0
host_perms: 0
- - #17
+ - # 17
host_id: 0
host_perms: 0
- - #18
+ - # 18
host_id: 0
host_perms: 0
- - #19
+ - # 19
host_id: 0
host_perms: 0
- - #20
+ - # 20
host_id: 0
host_perms: 0
- - #21
+ - # 21
host_id: 0
host_perms: 0
- - #22
+ - # 22
host_id: 0
host_perms: 0
- - #23
+ - # 23
host_id: 0
host_perms: 0
- - #24
+ - # 24
host_id: 0
host_perms: 0
- - #25
+ - # 25
host_id: 0
host_perms: 0
- - #26
+ - # 26
host_id: 0
host_perms: 0
- - #27
+ - # 27
host_id: 0
host_perms: 0
- - #28
+ - # 28
host_id: 0
host_perms: 0
- - #29
+ - # 29
host_id: 0
host_perms: 0
- - #30
+ - # 30
host_id: 0
host_perms: 0
- - #31
+ - # 31
host_id: 0
host_perms: 0
- - #32
+ - # 32
host_id: 0
host_perms: 0
dkek_config:
@@ -352,12 +351,12 @@
magic: 0x5170
size: 12
allowed_hosts: [128, 0, 0, 0]
- allow_dkek_export_tisci : 0x5A
+ allow_dkek_export_tisci: 0x5A
rsvd: [0, 0, 0]
sa2ul_cfg:
subhdr:
magic: 0x23BE
- size : 0
+ size: 0
auth_resource_owner: 0
enable_saul_psil_global_config_writes: 0
rsvd: [0, 0]
@@ -365,16 +364,16 @@
subhdr:
magic: 0x42AF
size: 16
- allow_jtag_unlock : 0x5A
- allow_wildcard_unlock : 0x5A
- allowed_debug_level_rsvd : 0
- rsvd : 0
- min_cert_rev : 0x0
+ allow_jtag_unlock: 0x5A
+ allow_wildcard_unlock: 0x5A
+ allowed_debug_level_rsvd: 0
+ rsvd: 0
+ min_cert_rev: 0x0
jtag_unlock_hosts: [0, 0, 0, 0]
sec_handover_cfg:
subhdr:
magic: 0x608F
size: 10
- handover_msg_sender : 0
- handover_to_host_id : 0
+ handover_msg_sender: 0
+ handover_to_host_id: 0
rsvd: [0, 0, 0, 0]
diff --git a/board/ti/am65x/board-cfg.yaml b/board/ti/am65x/board-cfg.yaml
index a8e0616..6fe66f1 100644
--- a/board/ti/am65x/board-cfg.yaml
+++ b/board/ti/am65x/board-cfg.yaml
@@ -8,29 +8,29 @@
board-cfg:
rev:
- boardcfg_abi_maj : 0x0
- boardcfg_abi_min : 0x1
+ boardcfg_abi_maj: 0x0
+ boardcfg_abi_min: 0x1
control:
subhdr:
magic: 0xC1D3
size: 7
- main_isolation_enable : 0x5A
- main_isolation_hostid : 0x2
+ main_isolation_enable: 0x5A
+ main_isolation_hostid: 0x2
secproxy:
subhdr:
magic: 0x1207
size: 7
- scaling_factor : 0x1
- scaling_profile : 0x1
- disable_main_nav_secure_proxy : 0
+ scaling_factor: 0x1
+ scaling_profile: 0x1
+ disable_main_nav_secure_proxy: 0
msmc:
subhdr:
magic: 0xA5C3
size: 5
- msmc_cache_size : 0x10
+ msmc_cache_size: 0x10
debug_cfg:
subhdr:
magic: 0x020C
size: 8
- trace_dst_enables : 0x00
- trace_src_enables : 0x00
+ trace_dst_enables: 0x00
+ trace_src_enables: 0x00
diff --git a/board/ti/am65x/evm.c b/board/ti/am65x/evm.c
index 975eb17..df20902 100644
--- a/board/ti/am65x/evm.c
+++ b/board/ti/am65x/evm.c
@@ -73,13 +73,13 @@
int dram_init_banksize(void)
{
/* Bank 0 declares the memory available in the DDR low region */
- gd->bd->bi_dram[0].start = CFG_SYS_SDRAM_BASE;
+ gd->bd->bi_dram[0].start = 0x80000000;
gd->bd->bi_dram[0].size = 0x80000000;
gd->ram_size = 0x80000000;
#ifdef CONFIG_PHYS_64BIT
/* Bank 1 declares the memory available in the DDR high region */
- gd->bd->bi_dram[1].start = CFG_SYS_SDRAM_BASE1;
+ gd->bd->bi_dram[1].start = 0x880000000;
gd->bd->bi_dram[1].size = 0x80000000;
gd->ram_size = 0x100000000;
#endif
diff --git a/board/ti/am65x/pm-cfg.yaml b/board/ti/am65x/pm-cfg.yaml
index 73fe86c..ee0d1c6 100644
--- a/board/ti/am65x/pm-cfg.yaml
+++ b/board/ti/am65x/pm-cfg.yaml
@@ -8,5 +8,5 @@
pm-cfg:
rev:
- boardcfg_abi_maj : 0x0
- boardcfg_abi_min : 0x1
+ boardcfg_abi_maj: 0x0
+ boardcfg_abi_min: 0x1
diff --git a/board/ti/am65x/rm-cfg.yaml b/board/ti/am65x/rm-cfg.yaml
index 5903773..1dd792d 100644
--- a/board/ti/am65x/rm-cfg.yaml
+++ b/board/ti/am65x/rm-cfg.yaml
@@ -9,2060 +9,1801 @@
rm-cfg:
rm_boardcfg:
rev:
- boardcfg_abi_maj : 0x0
- boardcfg_abi_min : 0x1
+ boardcfg_abi_maj: 0x0
+ boardcfg_abi_min: 0x1
host_cfg:
subhdr:
magic: 0x4C41
- size : 356
+ size: 356
host_cfg_entries:
- - #1
+ - # 1
host_id: 3
- allowed_atype : 0x2A
- allowed_qos : 0xAAAA
- allowed_orderid : 0xAAAAAAAA
- allowed_priority : 0xAAAA
- allowed_sched_priority : 0xAA
- - #2
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - # 2
host_id: 5
- allowed_atype : 0x2A
- allowed_qos : 0xAAAA
- allowed_orderid : 0xAAAAAAAA
- allowed_priority : 0xAAAA
- allowed_sched_priority : 0xAA
- - #3
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - # 3
host_id: 12
- allowed_atype : 0x2A
- allowed_qos : 0xAAAA
- allowed_orderid : 0xAAAAAAAA
- allowed_priority : 0xAAAA
- allowed_sched_priority : 0xAA
- - #4
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - # 4
host_id: 13
- allowed_atype : 0x2A
- allowed_qos : 0xAAAA
- allowed_orderid : 0xAAAAAAAA
- allowed_priority : 0xAAAA
- allowed_sched_priority : 0xAA
- - #5
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - # 5
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #6
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 6
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #7
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 7
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #8
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 8
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #9
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 9
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #10
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 10
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #11
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 11
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #12
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 12
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #13
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 13
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #14
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 14
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #15
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 15
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #16
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 16
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #17
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 17
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #18
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 18
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #19
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 19
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #20
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 20
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #21
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 21
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #22
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 22
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #23
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 23
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #24
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 24
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #25
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 25
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #26
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 26
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #27
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 27
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #28
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 28
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #29
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 29
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #30
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 30
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #31
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 31
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #32
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 32
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
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- reserved: 0
-
+ start_resource: 0
+ num_resource: 0
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+ reserved: 0
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- num_resource: 2
- type: 12427
- host_id: 4
- reserved: 0
-
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+ num_resource: 2
+ type: 12427
+ host_id: 4
+ reserved: 0
-
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- num_resource: 2
- type: 12429
- host_id: 12
- reserved: 0
-
+ start_resource: 2
+ num_resource: 2
+ type: 12429
+ host_id: 12
+ reserved: 0
-
- start_resource: 4
- num_resource: 4
- type: 12429
- host_id: 3
- reserved: 0
-
+ start_resource: 4
+ num_resource: 4
+ type: 12429
+ host_id: 3
+ reserved: 0
-
- start_resource: 4
- num_resource: 4
- type: 12429
- host_id: 4
- reserved: 0
-
+ start_resource: 4
+ num_resource: 4
+ type: 12429
+ host_id: 4
+ reserved: 0
-
- start_resource: 4
- num_resource: 0
- type: 12429
- host_id: 13
- reserved: 0
-
+ start_resource: 4
+ num_resource: 0
+ type: 12429
+ host_id: 13
+ reserved: 0
-
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- num_resource: 2
- type: 12429
- host_id: 5
- reserved: 0
-
+ start_resource: 8
+ num_resource: 2
+ type: 12429
+ host_id: 5
+ reserved: 0
-
- start_resource: 10
- num_resource: 12
- type: 12429
- host_id: 12
- reserved: 0
-
+ start_resource: 10
+ num_resource: 12
+ type: 12429
+ host_id: 12
+ reserved: 0
-
- start_resource: 22
- num_resource: 4
- type: 12429
- host_id: 13
- reserved: 0
-
+ start_resource: 22
+ num_resource: 4
+ type: 12429
+ host_id: 13
+ reserved: 0
-
- start_resource: 26
- num_resource: 10
- type: 12429
- host_id: 3
- reserved: 0
-
+ start_resource: 26
+ num_resource: 10
+ type: 12429
+ host_id: 3
+ reserved: 0
-
- start_resource: 26
- num_resource: 10
- type: 12429
- host_id: 4
- reserved: 0
-
+ start_resource: 26
+ num_resource: 10
+ type: 12429
+ host_id: 4
+ reserved: 0
-
- start_resource: 36
- num_resource: 12
- type: 12429
- host_id: 5
- reserved: 0
-
+ start_resource: 36
+ num_resource: 12
+ type: 12429
+ host_id: 5
+ reserved: 0
-
- start_resource: 0
- num_resource: 0
- type: 12431
- host_id: 3
- reserved: 0
-
+ start_resource: 0
+ num_resource: 0
+ type: 12431
+ host_id: 3
+ reserved: 0
-
- start_resource: 0
- num_resource: 2
- type: 12431
- host_id: 3
- reserved: 0
-
+ start_resource: 0
+ num_resource: 2
+ type: 12431
+ host_id: 3
+ reserved: 0
-
- start_resource: 0
- num_resource: 0
- type: 12431
- host_id: 4
- reserved: 0
-
+ start_resource: 0
+ num_resource: 0
+ type: 12431
+ host_id: 4
+ reserved: 0
-
- start_resource: 0
- num_resource: 2
- type: 12431
- host_id: 4
- reserved: 0
-
+ start_resource: 0
+ num_resource: 2
+ type: 12431
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+ reserved: 0
-
- start_resource: 0
- num_resource: 1
- type: 12480
- host_id: 128
- reserved: 0
-
+ start_resource: 0
+ num_resource: 1
+ type: 12480
+ host_id: 128
+ reserved: 0
-
- start_resource: 96
- num_resource: 32
- type: 12481
- host_id: 12
- reserved: 0
-
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+ num_resource: 32
+ type: 12481
+ host_id: 12
+ reserved: 0
-
- start_resource: 128
- num_resource: 8
- type: 12481
- host_id: 13
- reserved: 0
-
+ start_resource: 128
+ num_resource: 8
+ type: 12481
+ host_id: 13
+ reserved: 0
-
- start_resource: 136
- num_resource: 60
- type: 12481
- host_id: 3
- reserved: 0
-
+ start_resource: 136
+ num_resource: 60
+ type: 12481
+ host_id: 3
+ reserved: 0
-
- start_resource: 136
- num_resource: 60
- type: 12481
- host_id: 4
- reserved: 0
-
+ start_resource: 136
+ num_resource: 60
+ type: 12481
+ host_id: 4
+ reserved: 0
-
- start_resource: 196
- num_resource: 60
- type: 12481
- host_id: 5
- reserved: 0
-
+ start_resource: 196
+ num_resource: 60
+ type: 12481
+ host_id: 5
+ reserved: 0
-
- start_resource: 50
- num_resource: 2
- type: 12482
- host_id: 12
- reserved: 0
-
+ start_resource: 50
+ num_resource: 2
+ type: 12482
+ host_id: 12
+ reserved: 0
-
- start_resource: 52
- num_resource: 4
- type: 12482
- host_id: 3
- reserved: 0
-
+ start_resource: 52
+ num_resource: 4
+ type: 12482
+ host_id: 3
+ reserved: 0
-
- start_resource: 52
- num_resource: 4
- type: 12482
- host_id: 4
- reserved: 0
-
+ start_resource: 52
+ num_resource: 4
+ type: 12482
+ host_id: 4
+ reserved: 0
-
- start_resource: 52
- num_resource: 0
- type: 12482
- host_id: 13
- reserved: 0
-
+ start_resource: 52
+ num_resource: 0
+ type: 12482
+ host_id: 13
+ reserved: 0
-
- start_resource: 56
- num_resource: 2
- type: 12482
- host_id: 5
- reserved: 0
-
+ start_resource: 56
+ num_resource: 2
+ type: 12482
+ host_id: 5
+ reserved: 0
-
- start_resource: 58
- num_resource: 12
- type: 12482
- host_id: 12
- reserved: 0
-
+ start_resource: 58
+ num_resource: 12
+ type: 12482
+ host_id: 12
+ reserved: 0
-
- start_resource: 70
- num_resource: 4
- type: 12482
- host_id: 13
- reserved: 0
-
+ start_resource: 70
+ num_resource: 4
+ type: 12482
+ host_id: 13
+ reserved: 0
-
- start_resource: 74
- num_resource: 10
- type: 12482
- host_id: 3
- reserved: 0
-
+ start_resource: 74
+ num_resource: 10
+ type: 12482
+ host_id: 3
+ reserved: 0
-
- start_resource: 74
- num_resource: 10
- type: 12482
- host_id: 4
- reserved: 0
-
+ start_resource: 74
+ num_resource: 10
+ type: 12482
+ host_id: 4
+ reserved: 0
-
- start_resource: 84
- num_resource: 12
- type: 12482
- host_id: 5
- reserved: 0
-
+ start_resource: 84
+ num_resource: 12
+ type: 12482
+ host_id: 5
+ reserved: 0
-
- start_resource: 2
- num_resource: 2
- type: 12483
- host_id: 12
- reserved: 0
-
+ start_resource: 2
+ num_resource: 2
+ type: 12483
+ host_id: 12
+ reserved: 0
-
- start_resource: 4
- num_resource: 4
- type: 12483
- host_id: 3
- reserved: 0
-
+ start_resource: 4
+ num_resource: 4
+ type: 12483
+ host_id: 3
+ reserved: 0
-
- start_resource: 4
- num_resource: 4
- type: 12483
- host_id: 4
- reserved: 0
-
+ start_resource: 4
+ num_resource: 4
+ type: 12483
+ host_id: 4
+ reserved: 0
-
- start_resource: 4
- num_resource: 0
- type: 12483
- host_id: 13
- reserved: 0
-
+ start_resource: 4
+ num_resource: 0
+ type: 12483
+ host_id: 13
+ reserved: 0
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- start_resource: 8
- num_resource: 2
- type: 12483
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- reserved: 0
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+ host_id: 5
+ reserved: 0
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- start_resource: 10
- num_resource: 12
- type: 12483
- host_id: 12
- reserved: 0
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+ start_resource: 10
+ num_resource: 12
+ type: 12483
+ host_id: 12
+ reserved: 0
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- start_resource: 22
- num_resource: 4
- type: 12483
- host_id: 13
- reserved: 0
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+ num_resource: 4
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+ reserved: 0
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- start_resource: 26
- num_resource: 10
- type: 12483
- host_id: 3
- reserved: 0
-
+ start_resource: 26
+ num_resource: 10
+ type: 12483
+ host_id: 3
+ reserved: 0
-
- start_resource: 26
- num_resource: 10
- type: 12483
- host_id: 4
- reserved: 0
-
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+ num_resource: 10
+ type: 12483
+ host_id: 4
+ reserved: 0
-
- start_resource: 36
- num_resource: 12
- type: 12483
- host_id: 5
- reserved: 0
-
+ start_resource: 36
+ num_resource: 12
+ type: 12483
+ host_id: 5
+ reserved: 0
-
- start_resource: 48
- num_resource: 0
- type: 12485
- host_id: 3
- reserved: 0
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+ start_resource: 48
+ num_resource: 0
+ type: 12485
+ host_id: 3
+ reserved: 0
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- start_resource: 48
- num_resource: 2
- type: 12485
- host_id: 3
- reserved: 0
-
+ start_resource: 48
+ num_resource: 2
+ type: 12485
+ host_id: 3
+ reserved: 0
-
- start_resource: 48
- num_resource: 0
- type: 12485
- host_id: 4
- reserved: 0
-
+ start_resource: 48
+ num_resource: 0
+ type: 12485
+ host_id: 4
+ reserved: 0
-
- start_resource: 48
- num_resource: 2
- type: 12485
- host_id: 4
- reserved: 0
-
+ start_resource: 48
+ num_resource: 2
+ type: 12485
+ host_id: 4
+ reserved: 0
-
- start_resource: 0
- num_resource: 0
- type: 12487
- host_id: 3
- reserved: 0
-
+ start_resource: 0
+ num_resource: 0
+ type: 12487
+ host_id: 3
+ reserved: 0
-
- start_resource: 0
- num_resource: 2
- type: 12487
- host_id: 3
- reserved: 0
-
+ start_resource: 0
+ num_resource: 2
+ type: 12487
+ host_id: 3
+ reserved: 0
-
- start_resource: 0
- num_resource: 0
- type: 12487
- host_id: 4
- reserved: 0
-
+ start_resource: 0
+ num_resource: 0
+ type: 12487
+ host_id: 4
+ reserved: 0
-
- start_resource: 0
- num_resource: 2
- type: 12487
- host_id: 4
- reserved: 0
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+ start_resource: 0
+ num_resource: 2
+ type: 12487
+ host_id: 4
+ reserved: 0
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- start_resource: 2
- num_resource: 1
- type: 12490
- host_id: 12
- reserved: 0
-
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+ num_resource: 1
+ type: 12490
+ host_id: 12
+ reserved: 0
-
- start_resource: 3
- num_resource: 1
- type: 12490
- host_id: 13
- reserved: 0
-
+ start_resource: 3
+ num_resource: 1
+ type: 12490
+ host_id: 13
+ reserved: 0
-
- start_resource: 0
- num_resource: 8
- type: 12491
- host_id: 12
- reserved: 0
-
+ start_resource: 0
+ num_resource: 8
+ type: 12491
+ host_id: 12
+ reserved: 0
-
- start_resource: 8
- num_resource: 8
- type: 12491
- host_id: 3
- reserved: 0
-
+ start_resource: 8
+ num_resource: 8
+ type: 12491
+ host_id: 3
+ reserved: 0
-
- start_resource: 8
- num_resource: 8
- type: 12491
- host_id: 4
- reserved: 0
-
+ start_resource: 8
+ num_resource: 8
+ type: 12491
+ host_id: 4
+ reserved: 0
-
- start_resource: 16
- num_resource: 8
- type: 12491
- host_id: 5
- reserved: 0
-
+ start_resource: 16
+ num_resource: 8
+ type: 12491
+ host_id: 5
+ reserved: 0
-
- start_resource: 24
- num_resource: 8
- type: 12491
- host_id: 128
- reserved: 0
+ start_resource: 24
+ num_resource: 8
+ type: 12491
+ host_id: 128
+ reserved: 0
diff --git a/board/ti/am65x/sec-cfg.yaml b/board/ti/am65x/sec-cfg.yaml
index 7fa12f0..2ee503b 100644
--- a/board/ti/am65x/sec-cfg.yaml
+++ b/board/ti/am65x/sec-cfg.yaml
@@ -8,138 +8,138 @@
sec-cfg:
rev:
- boardcfg_abi_maj : 0x0
- boardcfg_abi_min : 0x1
+ boardcfg_abi_maj: 0x0
+ boardcfg_abi_min: 0x1
processor_acl_list:
subhdr:
magic: 0xF1EA
size: 164
proc_acl_entries:
- - #1
+ - # 1
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #2
+ - # 2
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #3
+ - # 3
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #4
+ - # 4
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #5
+ - # 5
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #6
+ - # 6
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #7
+ - # 7
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #8
+ - # 8
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #9
+ - # 9
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #10
+ - # 10
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #11
+ - # 11
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #12
+ - # 12
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #13
+ - # 13
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #14
+ - # 14
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #15
+ - # 15
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #16
+ - # 16
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #17
+ - # 17
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #18
+ - # 18
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #19
+ - # 19
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #20
+ - # 20
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #21
+ - # 21
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #22
+ - # 22
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #23
+ - # 23
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #24
+ - # 24
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #25
+ - # 25
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #26
+ - # 26
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #27
+ - # 27
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #28
+ - # 28
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #29
+ - # 29
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #30
+ - # 30
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #31
+ - # 31
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #32
+ - # 32
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
@@ -148,202 +148,202 @@
magic: 0x8D27
size: 68
host_hierarchy_entries:
- - #1
+ - # 1
host_id: 0
supervisor_host_id: 0
- - #2
+ - # 2
host_id: 0
supervisor_host_id: 0
- - #3
+ - # 3
host_id: 0
supervisor_host_id: 0
- - #4
+ - # 4
host_id: 0
supervisor_host_id: 0
- - #5
+ - # 5
host_id: 0
supervisor_host_id: 0
- - #6
+ - # 6
host_id: 0
supervisor_host_id: 0
- - #7
+ - # 7
host_id: 0
supervisor_host_id: 0
- - #8
+ - # 8
host_id: 0
supervisor_host_id: 0
- - #9
+ - # 9
host_id: 0
supervisor_host_id: 0
- - #10
+ - # 10
host_id: 0
supervisor_host_id: 0
- - #11
+ - # 11
host_id: 0
supervisor_host_id: 0
- - #12
+ - # 12
host_id: 0
supervisor_host_id: 0
- - #13
+ - # 13
host_id: 0
supervisor_host_id: 0
- - #14
+ - # 14
host_id: 0
supervisor_host_id: 0
- - #15
+ - # 15
host_id: 0
supervisor_host_id: 0
- - #16
+ - # 16
host_id: 0
supervisor_host_id: 0
- - #17
+ - # 17
host_id: 0
supervisor_host_id: 0
- - #18
+ - # 18
host_id: 0
supervisor_host_id: 0
- - #19
+ - # 19
host_id: 0
supervisor_host_id: 0
- - #20
+ - # 20
host_id: 0
supervisor_host_id: 0
- - #21
+ - # 21
host_id: 0
supervisor_host_id: 0
- - #22
+ - # 22
host_id: 0
supervisor_host_id: 0
- - #23
+ - # 23
host_id: 0
supervisor_host_id: 0
- - #24
+ - # 24
host_id: 0
supervisor_host_id: 0
- - #25
+ - # 25
host_id: 0
supervisor_host_id: 0
- - #26
+ - # 26
host_id: 0
supervisor_host_id: 0
- - #27
+ - # 27
host_id: 0
supervisor_host_id: 0
- - #28
+ - # 28
host_id: 0
supervisor_host_id: 0
- - #29
+ - # 29
host_id: 0
supervisor_host_id: 0
- - #30
+ - # 30
host_id: 0
supervisor_host_id: 0
- - #31
+ - # 31
host_id: 0
supervisor_host_id: 0
- - #32
+ - # 32
host_id: 0
supervisor_host_id: 0
otp_config:
subhdr:
magic: 0x4081
size: 69
- write_host_id : 0
+ write_host_id: 0
otp_entry:
- - #1
+ - # 1
host_id: 0
host_perms: 0
- - #2
+ - # 2
host_id: 0
host_perms: 0
- - #3
+ - # 3
host_id: 0
host_perms: 0
- - #4
+ - # 4
host_id: 0
host_perms: 0
- - #5
+ - # 5
host_id: 0
host_perms: 0
- - #6
+ - # 6
host_id: 0
host_perms: 0
- - #7
+ - # 7
host_id: 0
host_perms: 0
- - #8
+ - # 8
host_id: 0
host_perms: 0
- - #9
+ - # 9
host_id: 0
host_perms: 0
- - #10
+ - # 10
host_id: 0
host_perms: 0
- - #11
+ - # 11
host_id: 0
host_perms: 0
- - #12
+ - # 12
host_id: 0
host_perms: 0
- - #13
+ - # 13
host_id: 0
host_perms: 0
- - #14
+ - # 14
host_id: 0
host_perms: 0
- - #15
+ - # 15
host_id: 0
host_perms: 0
- - #16
+ - # 16
host_id: 0
host_perms: 0
- - #17
+ - # 17
host_id: 0
host_perms: 0
- - #18
+ - # 18
host_id: 0
host_perms: 0
- - #19
+ - # 19
host_id: 0
host_perms: 0
- - #20
+ - # 20
host_id: 0
host_perms: 0
- - #21
+ - # 21
host_id: 0
host_perms: 0
- - #22
+ - # 22
host_id: 0
host_perms: 0
- - #23
+ - # 23
host_id: 0
host_perms: 0
- - #24
+ - # 24
host_id: 0
host_perms: 0
- - #25
+ - # 25
host_id: 0
host_perms: 0
- - #26
+ - # 26
host_id: 0
host_perms: 0
- - #27
+ - # 27
host_id: 0
host_perms: 0
- - #28
+ - # 28
host_id: 0
host_perms: 0
- - #29
+ - # 29
host_id: 0
host_perms: 0
- - #30
+ - # 30
host_id: 0
host_perms: 0
- - #31
+ - # 31
host_id: 0
host_perms: 0
- - #32
+ - # 32
host_id: 0
host_perms: 0
dkek_config:
@@ -351,12 +351,12 @@
magic: 0x5170
size: 12
allowed_hosts: [128, 0, 0, 0]
- allow_dkek_export_tisci : 0x5A
+ allow_dkek_export_tisci: 0x5A
rsvd: [0, 0, 0]
sa2ul_cfg:
subhdr:
magic: 0x23BE
- size : 0
+ size: 0
auth_resource_owner: 0
enable_saul_psil_global_config_writes: 0
rsvd: [0, 0]
@@ -364,16 +364,16 @@
subhdr:
magic: 0x42AF
size: 16
- allow_jtag_unlock : 0x5A
- allow_wildcard_unlock : 0x5A
+ allow_jtag_unlock: 0x5A
+ allow_wildcard_unlock: 0x5A
allowed_debug_level_rsvd: 0
rsvd: 0
- min_cert_rev : 0x0
+ min_cert_rev: 0x0
jtag_unlock_hosts: [0, 0, 0, 0]
sec_handover_cfg:
subhdr:
magic: 0x608F
size: 10
- handover_msg_sender : 0
- handover_to_host_id : 0
+ handover_msg_sender: 0
+ handover_to_host_id: 0
rsvd: [0, 0, 0, 0]
diff --git a/board/ti/common/board_detect.c b/board/ti/common/board_detect.c
index 0ec6d1a..38e23cc 100644
--- a/board/ti/common/board_detect.c
+++ b/board/ti/common/board_detect.c
@@ -129,7 +129,7 @@
rc = dm_i2c_read(dev, 0x1, &offset_test, sizeof(offset_test));
- if (*((u32 *)ep) != (header & 0xFF))
+ if (offset_test != ((header >> 8) & 0xFF))
one_byte_addressing = false;
/* Corrupted data??? */
@@ -181,7 +181,7 @@
rc = i2c_read(dev_addr, 0x1, byte, &offset_test, sizeof(offset_test));
- if (*((u32 *)ep) != (header & 0xFF))
+ if (offset_test != ((header >> 8) & 0xFF))
one_byte_addressing = false;
/* Corrupted data??? */
diff --git a/board/ti/j721e/board-cfg_j7200.yaml b/board/ti/j721e/board-cfg_j7200.yaml
index 0ac1ae9..a1e55a2 100644
--- a/board/ti/j721e/board-cfg_j7200.yaml
+++ b/board/ti/j721e/board-cfg_j7200.yaml
@@ -8,29 +8,29 @@
board-cfg:
rev:
- boardcfg_abi_maj : 0x0
- boardcfg_abi_min : 0x1
+ boardcfg_abi_maj: 0x0
+ boardcfg_abi_min: 0x1
control:
subhdr:
magic: 0xC1D3
size: 7
- main_isolation_enable : 0x5A
- main_isolation_hostid : 0x2
+ main_isolation_enable: 0x5A
+ main_isolation_hostid: 0x2
secproxy:
subhdr:
magic: 0x1207
size: 7
- scaling_factor : 0x1
- scaling_profile : 0x1
- disable_main_nav_secure_proxy : 0
+ scaling_factor: 0x1
+ scaling_profile: 0x1
+ disable_main_nav_secure_proxy: 0
msmc:
subhdr:
magic: 0xA5C3
size: 5
- msmc_cache_size : 0x10
+ msmc_cache_size: 0x10
debug_cfg:
subhdr:
magic: 0x020C
size: 8
- trace_dst_enables : 0x00
- trace_src_enables : 0x00
+ trace_dst_enables: 0x00
+ trace_src_enables: 0x00
diff --git a/board/ti/j721e/evm.c b/board/ti/j721e/evm.c
index 0768385..b77cffc 100644
--- a/board/ti/j721e/evm.c
+++ b/board/ti/j721e/evm.c
@@ -61,13 +61,13 @@
int dram_init_banksize(void)
{
/* Bank 0 declares the memory available in the DDR low region */
- gd->bd->bi_dram[0].start = CFG_SYS_SDRAM_BASE;
+ gd->bd->bi_dram[0].start = 0x80000000;
gd->bd->bi_dram[0].size = 0x80000000;
gd->ram_size = 0x80000000;
#ifdef CONFIG_PHYS_64BIT
/* Bank 1 declares the memory available in the DDR high region */
- gd->bd->bi_dram[1].start = CFG_SYS_SDRAM_BASE1;
+ gd->bd->bi_dram[1].start = 0x880000000;
gd->bd->bi_dram[1].size = 0x80000000;
gd->ram_size = 0x100000000;
#endif
@@ -352,77 +352,6 @@
}
#endif
-void configure_serdes_torrent(void)
-{
- struct udevice *dev;
- struct phy serdes;
- int ret;
-
- if (!IS_ENABLED(CONFIG_PHY_CADENCE_TORRENT))
- return;
-
- ret = uclass_get_device_by_driver(UCLASS_PHY,
- DM_DRIVER_GET(torrent_phy_provider),
- &dev);
- if (ret) {
- printf("Torrent init failed:%d\n", ret);
- return;
- }
-
- serdes.dev = dev;
- serdes.id = 0;
-
- ret = generic_phy_init(&serdes);
- if (ret) {
- printf("phy_init failed!!: %d\n", ret);
- return;
- }
-
- ret = generic_phy_power_on(&serdes);
- if (ret) {
- printf("phy_power_on failed!!: %d\n", ret);
- return;
- }
-}
-
-void configure_serdes_sierra(void)
-{
- struct udevice *dev, *link_dev;
- struct phy link;
- int ret, count, i;
- int link_count = 0;
-
- if (!IS_ENABLED(CONFIG_PHY_CADENCE_SIERRA))
- return;
-
- ret = uclass_get_device_by_driver(UCLASS_MISC,
- DM_DRIVER_GET(sierra_phy_provider),
- &dev);
- if (ret) {
- printf("Sierra init failed:%d\n", ret);
- return;
- }
-
- count = device_get_child_count(dev);
- for (i = 0; i < count; i++) {
- ret = device_get_child(dev, i, &link_dev);
- if (ret) {
- printf("probe of sierra child node %d failed: %d\n", i, ret);
- return;
- }
- if (link_dev->driver->id == UCLASS_PHY) {
- link.dev = link_dev;
- link.id = link_count++;
-
- ret = generic_phy_power_on(&link);
- if (ret) {
- printf("phy_power_on failed!!: %d\n", ret);
- return;
- }
- }
- }
-}
-
#ifdef CONFIG_BOARD_LATE_INIT
static void setup_board_eeprom_env(void)
{
@@ -476,12 +405,6 @@
probe_daughtercards();
}
- if (board_is_j7200_som())
- configure_serdes_torrent();
-
- if (board_is_j721e_som())
- configure_serdes_sierra();
-
return 0;
}
#endif
diff --git a/board/ti/j721e/pm-cfg_j7200.yaml b/board/ti/j721e/pm-cfg_j7200.yaml
index daaefb1..85cd2c9 100644
--- a/board/ti/j721e/pm-cfg_j7200.yaml
+++ b/board/ti/j721e/pm-cfg_j7200.yaml
@@ -8,5 +8,5 @@
pm-cfg:
rev:
- boardcfg_abi_maj : 0x0
- boardcfg_abi_min : 0x1
+ boardcfg_abi_maj: 0x0
+ boardcfg_abi_min: 0x1
diff --git a/board/ti/j721e/rm-cfg.yaml b/board/ti/j721e/rm-cfg.yaml
index 9f604cf..0163e3e 100644
--- a/board/ti/j721e/rm-cfg.yaml
+++ b/board/ti/j721e/rm-cfg.yaml
@@ -16,224 +16,224 @@
magic: 0x4C41
size: 356
host_cfg_entries:
- - #1
+ - # 1
host_id: 3
allowed_atype: 0x2A
allowed_qos: 0xAAAA
allowed_orderid: 0xAAAAAAAA
allowed_priority: 0xAAAA
allowed_sched_priority: 0xAA
- - #2
+ - # 2
host_id: 5
allowed_atype: 0x2A
allowed_qos: 0xAAAA
allowed_orderid: 0xAAAAAAAA
allowed_priority: 0xAAAA
allowed_sched_priority: 0xAA
- - #3
+ - # 3
host_id: 12
allowed_atype: 0x2A
allowed_qos: 0xAAAA
allowed_orderid: 0xAAAAAAAA
allowed_priority: 0xAAAA
allowed_sched_priority: 0xAA
- - #4
+ - # 4
host_id: 13
allowed_atype: 0x2A
allowed_qos: 0xAAAA
allowed_orderid: 0xAAAAAAAA
allowed_priority: 0xAAAA
allowed_sched_priority: 0xAA
- - #5
+ - # 5
host_id: 21
allowed_atype: 0x2A
allowed_qos: 0xAAAA
allowed_orderid: 0xAAAAAAAA
allowed_priority: 0xAAAA
allowed_sched_priority: 0xAA
- - #6
+ - # 6
host_id: 26
allowed_atype: 0x2A
allowed_qos: 0xAAAA
allowed_orderid: 0xAAAAAAAA
allowed_priority: 0xAAAA
allowed_sched_priority: 0xAA
- - #7
+ - # 7
host_id: 28
allowed_atype: 0x2A
allowed_qos: 0xAAAA
allowed_orderid: 0xAAAAAAAA
allowed_priority: 0xAAAA
allowed_sched_priority: 0xAA
- - #8
+ - # 8
host_id: 35
allowed_atype: 0x2A
allowed_qos: 0xAAAA
allowed_orderid: 0xAAAAAAAA
allowed_priority: 0xAAAA
allowed_sched_priority: 0xAA
- - #9
+ - # 9
host_id: 37
allowed_atype: 0x2A
allowed_qos: 0xAAAA
allowed_orderid: 0xAAAAAAAA
allowed_priority: 0xAAAA
allowed_sched_priority: 0xAA
- - #10
+ - # 10
host_id: 40
allowed_atype: 0x2A
allowed_qos: 0xAAAA
allowed_orderid: 0xAAAAAAAA
allowed_priority: 0xAAAA
allowed_sched_priority: 0xAA
- - #11
+ - # 11
host_id: 42
allowed_atype: 0x2A
allowed_qos: 0xAAAA
allowed_orderid: 0xAAAAAAAA
allowed_priority: 0xAAAA
allowed_sched_priority: 0xAA
- - #12
+ - # 12
host_id: 0
allowed_atype: 0
allowed_qos: 0
allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
- - #13
+ - # 13
host_id: 0
allowed_atype: 0
allowed_qos: 0
allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
- - #14
+ - # 14
host_id: 0
allowed_atype: 0
allowed_qos: 0
allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
- - #15
+ - # 15
host_id: 0
allowed_atype: 0
allowed_qos: 0
allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
- - #16
+ - # 16
host_id: 0
allowed_atype: 0
allowed_qos: 0
allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
- - #17
+ - # 17
host_id: 0
allowed_atype: 0
allowed_qos: 0
allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
- - #18
+ - # 18
host_id: 0
allowed_atype: 0
allowed_qos: 0
allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
- - #19
+ - # 19
host_id: 0
allowed_atype: 0
allowed_qos: 0
allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
- - #20
+ - # 20
host_id: 0
allowed_atype: 0
allowed_qos: 0
allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
- - #21
+ - # 21
host_id: 0
allowed_atype: 0
allowed_qos: 0
allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
- - #22
+ - # 22
host_id: 0
allowed_atype: 0
allowed_qos: 0
allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
- - #23
+ - # 23
host_id: 0
allowed_atype: 0
allowed_qos: 0
allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
- - #24
+ - # 24
host_id: 0
allowed_atype: 0
allowed_qos: 0
allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
- - #25
+ - # 25
host_id: 0
allowed_atype: 0
allowed_qos: 0
allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
- - #26
+ - # 26
host_id: 0
allowed_atype: 0
allowed_qos: 0
allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
- - #27
+ - # 27
host_id: 0
allowed_atype: 0
allowed_qos: 0
allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
- - #28
+ - # 28
host_id: 0
allowed_atype: 0
allowed_qos: 0
allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
- - #29
+ - # 29
host_id: 0
allowed_atype: 0
allowed_qos: 0
allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
- - #30
+ - # 30
host_id: 0
allowed_atype: 0
allowed_qos: 0
allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
- - #31
+ - # 31
host_id: 0
allowed_atype: 0
allowed_qos: 0
allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
- - #32
+ - # 32
host_id: 0
allowed_atype: 0
allowed_qos: 0
@@ -253,2919 +253,2502 @@
type: 7744
host_id: 26
reserved: 0
-
-
start_resource: 4
num_resource: 93
type: 7808
host_id: 28
reserved: 0
-
-
start_resource: 0
num_resource: 32
type: 7872
host_id: 128
reserved: 0
-
-
start_resource: 0
num_resource: 32
type: 8192
host_id: 3
reserved: 0
-
-
start_resource: 32
num_resource: 32
type: 8192
host_id: 5
reserved: 0
-
-
start_resource: 0
num_resource: 24
type: 8320
host_id: 3
reserved: 0
-
-
start_resource: 24
num_resource: 24
type: 8320
host_id: 5
reserved: 0
-
-
start_resource: 0
num_resource: 8
type: 8384
host_id: 3
reserved: 0
-
-
start_resource: 8
num_resource: 8
type: 8384
host_id: 5
reserved: 0
-
-
start_resource: 16
num_resource: 4
type: 8384
host_id: 40
reserved: 0
-
-
start_resource: 20
num_resource: 4
type: 8384
host_id: 42
reserved: 0
-
-
start_resource: 24
num_resource: 4
type: 8384
host_id: 35
reserved: 0
-
-
start_resource: 28
num_resource: 4
type: 8384
host_id: 37
reserved: 0
-
-
start_resource: 32
num_resource: 4
type: 8384
host_id: 26
reserved: 0
-
-
start_resource: 36
num_resource: 4
type: 8384
host_id: 28
reserved: 0
-
-
start_resource: 40
num_resource: 12
type: 8384
host_id: 12
reserved: 0
-
-
start_resource: 52
num_resource: 12
type: 8384
host_id: 13
reserved: 0
-
-
start_resource: 0
num_resource: 128
type: 8576
host_id: 35
reserved: 0
-
-
start_resource: 128
num_resource: 128
type: 8576
host_id: 37
reserved: 0
-
-
start_resource: 0
num_resource: 128
type: 8640
host_id: 40
reserved: 0
-
-
start_resource: 128
num_resource: 128
type: 8640
host_id: 42
reserved: 0
-
-
start_resource: 0
num_resource: 48
type: 8704
host_id: 128
reserved: 0
-
-
start_resource: 0
num_resource: 8
type: 8768
host_id: 3
reserved: 0
-
-
start_resource: 8
num_resource: 8
type: 8768
host_id: 5
reserved: 0
-
-
start_resource: 16
num_resource: 6
type: 8768
host_id: 12
reserved: 0
-
-
start_resource: 22
num_resource: 6
type: 8768
host_id: 13
reserved: 0
-
-
start_resource: 28
num_resource: 2
type: 8768
host_id: 35
reserved: 0
-
-
start_resource: 30
num_resource: 2
type: 8768
host_id: 37
reserved: 0
-
-
start_resource: 0
num_resource: 64
type: 13258
host_id: 128
reserved: 0
-
-
start_resource: 20480
num_resource: 1024
type: 13261
host_id: 128
reserved: 0
-
-
start_resource: 0
num_resource: 64
type: 13322
host_id: 128
reserved: 0
-
-
start_resource: 22528
num_resource: 1024
type: 13325
host_id: 128
reserved: 0
-
-
start_resource: 38
num_resource: 86
type: 13386
host_id: 12
reserved: 0
-
-
start_resource: 124
num_resource: 32
type: 13386
host_id: 13
reserved: 0
-
-
start_resource: 156
num_resource: 12
type: 13386
host_id: 40
reserved: 0
-
-
start_resource: 168
num_resource: 12
type: 13386
host_id: 42
reserved: 0
-
-
start_resource: 180
num_resource: 12
type: 13386
host_id: 21
reserved: 0
-
-
start_resource: 192
num_resource: 12
type: 13386
host_id: 26
reserved: 0
-
-
start_resource: 204
num_resource: 12
type: 13386
host_id: 28
reserved: 0
-
-
start_resource: 216
num_resource: 28
type: 13386
host_id: 35
reserved: 0
-
-
start_resource: 244
num_resource: 8
type: 13386
host_id: 37
reserved: 0
-
-
start_resource: 252
num_resource: 4
type: 13386
host_id: 128
reserved: 0
-
-
start_resource: 38
num_resource: 1024
type: 13389
host_id: 12
reserved: 0
-
-
start_resource: 1062
num_resource: 512
type: 13389
host_id: 13
reserved: 0
-
-
start_resource: 1574
num_resource: 32
type: 13389
host_id: 3
reserved: 0
-
-
start_resource: 1606
num_resource: 32
type: 13389
host_id: 5
reserved: 0
-
-
start_resource: 1638
num_resource: 256
type: 13389
host_id: 40
reserved: 0
-
-
start_resource: 1894
num_resource: 256
type: 13389
host_id: 42
reserved: 0
-
-
start_resource: 2150
num_resource: 256
type: 13389
host_id: 21
reserved: 0
-
-
start_resource: 2406
num_resource: 256
type: 13389
host_id: 26
reserved: 0
-
-
start_resource: 2662
num_resource: 256
type: 13389
host_id: 28
reserved: 0
-
-
start_resource: 2918
num_resource: 512
type: 13389
host_id: 35
reserved: 0
-
-
start_resource: 3430
num_resource: 256
type: 13389
host_id: 37
reserved: 0
-
-
start_resource: 3686
num_resource: 922
type: 13389
host_id: 128
reserved: 0
-
-
start_resource: 0
num_resource: 4
type: 13440
host_id: 12
reserved: 0
-
-
start_resource: 4
num_resource: 4
type: 13440
host_id: 13
reserved: 0
-
-
start_resource: 8
num_resource: 4
type: 13440
host_id: 3
reserved: 0
-
-
start_resource: 12
num_resource: 4
type: 13440
host_id: 5
reserved: 0
-
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start_resource: 16
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type: 13440
host_id: 40
reserved: 0
-
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start_resource: 20
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type: 13440
host_id: 42
reserved: 0
-
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start_resource: 24
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type: 13440
host_id: 21
reserved: 0
-
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start_resource: 28
num_resource: 4
type: 13440
host_id: 26
reserved: 0
-
-
start_resource: 32
num_resource: 4
type: 13440
host_id: 28
reserved: 0
-
-
start_resource: 36
num_resource: 12
type: 13440
host_id: 35
reserved: 0
-
-
start_resource: 48
num_resource: 4
type: 13440
host_id: 37
reserved: 0
-
-
start_resource: 52
num_resource: 12
type: 13440
host_id: 128
reserved: 0
-
-
start_resource: 0
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type: 13504
host_id: 128
reserved: 0
-
-
start_resource: 440
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type: 13505
host_id: 12
reserved: 0
-
-
start_resource: 590
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type: 13505
host_id: 13
reserved: 0
-
-
start_resource: 630
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type: 13505
host_id: 3
reserved: 0
-
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start_resource: 636
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type: 13505
host_id: 5
reserved: 0
-
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start_resource: 642
num_resource: 10
type: 13505
host_id: 40
reserved: 0
-
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start_resource: 652
num_resource: 10
type: 13505
host_id: 42
reserved: 0
-
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start_resource: 662
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reserved: 0
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start_resource: 694
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reserved: 0
-
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host_id: 28
reserved: 0
-
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start_resource: 744
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type: 13505
host_id: 35
reserved: 0
-
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start_resource: 926
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host_id: 37
reserved: 0
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start_resource: 966
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reserved: 0
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start_resource: 316
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host_id: 12
reserved: 0
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-
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type: 13506
host_id: 3
reserved: 0
-
-
start_resource: 324
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type: 13506
host_id: 13
reserved: 0
-
-
start_resource: 326
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type: 13506
host_id: 5
reserved: 0
-
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start_resource: 328
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type: 13506
host_id: 40
reserved: 0
-
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start_resource: 330
num_resource: 2
type: 13506
host_id: 42
reserved: 0
-
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num_resource: 2
type: 13506
host_id: 21
reserved: 0
-
-
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num_resource: 8
type: 13506
host_id: 26
reserved: 0
-
-
start_resource: 342
num_resource: 2
type: 13506
host_id: 28
reserved: 0
-
-
start_resource: 344
num_resource: 4
type: 13506
host_id: 35
reserved: 0
-
-
start_resource: 348
num_resource: 1
type: 13506
host_id: 37
reserved: 0
-
-
start_resource: 349
num_resource: 47
type: 13506
host_id: 12
reserved: 0
-
-
start_resource: 396
num_resource: 1
type: 13506
host_id: 13
reserved: 0
-
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start_resource: 397
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type: 13506
host_id: 40
reserved: 0
-
-
start_resource: 401
num_resource: 4
type: 13506
host_id: 42
reserved: 0
-
-
start_resource: 405
num_resource: 4
type: 13506
host_id: 21
reserved: 0
-
-
start_resource: 409
num_resource: 8
type: 13506
host_id: 26
reserved: 0
-
-
start_resource: 417
num_resource: 6
type: 13506
host_id: 28
reserved: 0
-
-
start_resource: 423
num_resource: 16
type: 13506
host_id: 35
reserved: 0
-
-
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diff --git a/board/ti/j721e/rm-cfg_j7200.yaml b/board/ti/j721e/rm-cfg_j7200.yaml
index 263285f..f83184b 100644
--- a/board/ti/j721e/rm-cfg_j7200.yaml
+++ b/board/ti/j721e/rm-cfg_j7200.yaml
@@ -9,256 +9,231 @@
rm-cfg:
rm_boardcfg:
rev:
- boardcfg_abi_maj : 0x0
- boardcfg_abi_min : 0x1
+ boardcfg_abi_maj: 0x0
+ boardcfg_abi_min: 0x1
host_cfg:
subhdr:
magic: 0x4C41
- size : 356
+ size: 356
host_cfg_entries:
- - #1
+ - # 1
host_id: 3
- allowed_atype : 0b101010
- allowed_qos : 0xAAAA
- allowed_orderid : 0xAAAAAAAA
- allowed_priority : 0xAAAA
- allowed_sched_priority : 0xAA
- - #2
+ allowed_atype: 0b101010
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - # 2
host_id: 5
- allowed_atype : 0b101010
- allowed_qos : 0xAAAA
- allowed_orderid : 0xAAAAAAAA
- allowed_priority : 0xAAAA
- allowed_sched_priority : 0xAA
- - #3
+ allowed_atype: 0b101010
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - # 3
host_id: 12
- allowed_atype : 0b101010
- allowed_qos : 0xAAAA
- allowed_orderid : 0xAAAAAAAA
- allowed_priority : 0xAAAA
- allowed_sched_priority : 0xAA
- - #4
+ allowed_atype: 0b101010
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - # 4
host_id: 13
- allowed_atype : 0b101010
- allowed_qos : 0xAAAA
- allowed_orderid : 0xAAAAAAAA
- allowed_priority : 0xAAAA
- allowed_sched_priority : 0xAA
- - #5
+ allowed_atype: 0b101010
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - # 5
host_id: 35
- allowed_atype : 0b101010
- allowed_qos : 0xAAAA
- allowed_orderid : 0xAAAAAAAA
- allowed_priority : 0xAAAA
- allowed_sched_priority : 0xAA
- - #6
+ allowed_atype: 0b101010
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - # 6
host_id: 37
- allowed_atype : 0b101010
- allowed_qos : 0xAAAA
- allowed_orderid : 0xAAAAAAAA
- allowed_priority : 0xAAAA
- allowed_sched_priority : 0xAA
- - #7
+ allowed_atype: 0b101010
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - # 7
host_id: 0
allowed_atype: 0
allowed_qos: 0
allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
-
- - #8
+ - # 8
host_id: 0
allowed_atype: 0
allowed_qos: 0
allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
-
- - #9
+ - # 9
host_id: 0
allowed_atype: 0
allowed_qos: 0
allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
-
- - #10
+ - # 10
host_id: 0
allowed_atype: 0
allowed_qos: 0
allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
-
- - #11
+ - # 11
host_id: 0
allowed_atype: 0
allowed_qos: 0
allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
-
- - #12
+ - # 12
host_id: 0
allowed_atype: 0
allowed_qos: 0
allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
-
- - #13
+ - # 13
host_id: 0
allowed_atype: 0
allowed_qos: 0
allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
-
- - #14
+ - # 14
host_id: 0
allowed_atype: 0
allowed_qos: 0
allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
-
- - #15
+ - # 15
host_id: 0
allowed_atype: 0
allowed_qos: 0
allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
-
- - #16
+ - # 16
host_id: 0
allowed_atype: 0
allowed_qos: 0
allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
-
- - #17
+ - # 17
host_id: 0
allowed_atype: 0
allowed_qos: 0
allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
-
- - #18
+ - # 18
host_id: 0
allowed_atype: 0
allowed_qos: 0
allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
-
- - #19
+ - # 19
host_id: 0
allowed_atype: 0
allowed_qos: 0
allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
-
- - #20
+ - # 20
host_id: 0
allowed_atype: 0
allowed_qos: 0
allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
-
- - #21
+ - # 21
host_id: 0
allowed_atype: 0
allowed_qos: 0
allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
-
- - #22
+ - # 22
host_id: 0
allowed_atype: 0
allowed_qos: 0
allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
-
- - #23
+ - # 23
host_id: 0
allowed_atype: 0
allowed_qos: 0
allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
-
- - #24
+ - # 24
host_id: 0
allowed_atype: 0
allowed_qos: 0
allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
-
- - #25
+ - # 25
host_id: 0
allowed_atype: 0
allowed_qos: 0
allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
-
- - #26
+ - # 26
host_id: 0
allowed_atype: 0
allowed_qos: 0
allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
-
- - #27
+ - # 27
host_id: 0
allowed_atype: 0
allowed_qos: 0
allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
-
- - #28
+ - # 28
host_id: 0
allowed_atype: 0
allowed_qos: 0
allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
-
- - #29
+ - # 29
host_id: 0
allowed_atype: 0
allowed_qos: 0
allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
-
- - #30
+ - # 30
host_id: 0
allowed_atype: 0
allowed_qos: 0
allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
-
- - #31
+ - # 31
host_id: 0
allowed_atype: 0
allowed_qos: 0
allowed_orderid: 0
allowed_priority: 0
allowed_sched_priority: 0
-
- - #32
+ - # 32
host_id: 0
allowed_atype: 0
allowed_qos: 0
@@ -268,9 +243,9 @@
resasg:
subhdr:
magic: 0x7B25
- size : 8
+ size: 8
resasg_entries_size: 2048
- reserved : 0
+ reserved: 0
resasg_entries:
-
start_resource: 0
@@ -278,1785 +253,1530 @@
type: 8192
host_id: 3
reserved: 0
-
-
start_resource: 32
num_resource: 32
type: 8192
host_id: 5
reserved: 0
-
-
start_resource: 0
num_resource: 24
type: 8320
host_id: 3
reserved: 0
-
-
start_resource: 24
num_resource: 24
type: 8320
host_id: 5
reserved: 0
-
-
start_resource: 0
num_resource: 8
type: 8384
host_id: 3
reserved: 0
-
-
start_resource: 8
num_resource: 8
type: 8384
host_id: 5
reserved: 0
-
-
start_resource: 16
num_resource: 8
type: 8384
host_id: 35
reserved: 0
-
-
start_resource: 24
num_resource: 8
type: 8384
host_id: 37
reserved: 0
-
-
start_resource: 32
num_resource: 16
type: 8384
host_id: 12
reserved: 0
-
-
start_resource: 48
num_resource: 16
type: 8384
host_id: 13
reserved: 0
-
-
start_resource: 0
num_resource: 48
type: 8704
host_id: 128
reserved: 0
-
-
start_resource: 0
num_resource: 8
type: 8768
host_id: 3
reserved: 0
-
-
start_resource: 8
num_resource: 8
type: 8768
host_id: 5
reserved: 0
-
-
start_resource: 16
num_resource: 8
type: 8768
host_id: 12
reserved: 0
-
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start_resource: 24
num_resource: 8
type: 8768
host_id: 13
reserved: 0
-
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start_resource: 0
num_resource: 64
type: 13258
host_id: 128
reserved: 0
-
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start_resource: 20480
num_resource: 1024
type: 13261
host_id: 128
reserved: 0
-
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start_resource: 0
num_resource: 64
type: 13322
host_id: 128
reserved: 0
-
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start_resource: 22528
num_resource: 1024
type: 13325
host_id: 128
reserved: 0
-
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num_resource: 86
type: 13386
host_id: 12
reserved: 0
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num_resource: 32
type: 13386
host_id: 13
reserved: 0
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type: 13386
host_id: 3
reserved: 0
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type: 13386
host_id: 5
reserved: 0
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num_resource: 32
type: 13386
host_id: 35
reserved: 0
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num_resource: 24
type: 13386
host_id: 37
reserved: 0
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type: 13386
host_id: 128
reserved: 0
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num_resource: 1024
type: 13389
host_id: 12
reserved: 0
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num_resource: 512
type: 13389
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reserved: 0
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num_resource: 128
type: 13389
host_id: 3
reserved: 0
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num_resource: 128
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host_id: 5
reserved: 0
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num_resource: 256
type: 13389
host_id: 35
reserved: 0
-
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num_resource: 512
type: 13389
host_id: 37
reserved: 0
-
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num_resource: 2030
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host_id: 128
reserved: 0
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type: 13440
host_id: 12
reserved: 0
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reserved: 0
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host_id: 5
reserved: 0
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host_id: 35
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diff --git a/board/ti/j721e/sec-cfg.yaml b/board/ti/j721e/sec-cfg.yaml
index 1eab588..c725b59 100644
--- a/board/ti/j721e/sec-cfg.yaml
+++ b/board/ti/j721e/sec-cfg.yaml
@@ -15,234 +15,233 @@
magic: 0xF1EA
size: 164
proc_acl_entries:
- - #1
+ - # 1
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #2
+ - # 2
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #3
+ - # 3
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #4
+ - # 4
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #5
+ - # 5
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #6
+ - # 6
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #7
+ - # 7
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #8
+ - # 8
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #9
+ - # 9
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #10
+ - # 10
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #11
+ - # 11
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #12
+ - # 12
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #13
+ - # 13
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #14
+ - # 14
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #15
+ - # 15
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #16
+ - # 16
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #17
+ - # 17
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #18
+ - # 18
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #19
+ - # 19
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #20
+ - # 20
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #21
+ - # 21
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #22
+ - # 22
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #23
+ - # 23
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #24
+ - # 24
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #25
+ - # 25
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #26
+ - # 26
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #27
+ - # 27
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #28
+ - # 28
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #29
+ - # 29
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #30
+ - # 30
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #31
+ - # 31
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #32
+ - # 32
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
-
host_hierarchy:
subhdr:
magic: 0x8D27
size: 68
host_hierarchy_entries:
- - #1
+ - # 1
host_id: 0
supervisor_host_id: 0
- - #2
+ - # 2
host_id: 0
supervisor_host_id: 0
- - #3
+ - # 3
host_id: 0
supervisor_host_id: 0
- - #4
+ - # 4
host_id: 0
supervisor_host_id: 0
- - #5
+ - # 5
host_id: 0
supervisor_host_id: 0
- - #6
+ - # 6
host_id: 0
supervisor_host_id: 0
- - #7
+ - # 7
host_id: 0
supervisor_host_id: 0
- - #8
+ - # 8
host_id: 0
supervisor_host_id: 0
- - #9
+ - # 9
host_id: 0
supervisor_host_id: 0
- - #10
+ - # 10
host_id: 0
supervisor_host_id: 0
- - #11
+ - # 11
host_id: 0
supervisor_host_id: 0
- - #12
+ - # 12
host_id: 0
supervisor_host_id: 0
- - #13
+ - # 13
host_id: 0
supervisor_host_id: 0
- - #14
+ - # 14
host_id: 0
supervisor_host_id: 0
- - #15
+ - # 15
host_id: 0
supervisor_host_id: 0
- - #16
+ - # 16
host_id: 0
supervisor_host_id: 0
- - #17
+ - # 17
host_id: 0
supervisor_host_id: 0
- - #18
+ - # 18
host_id: 0
supervisor_host_id: 0
- - #19
+ - # 19
host_id: 0
supervisor_host_id: 0
- - #20
+ - # 20
host_id: 0
supervisor_host_id: 0
- - #21
+ - # 21
host_id: 0
supervisor_host_id: 0
- - #22
+ - # 22
host_id: 0
supervisor_host_id: 0
- - #23
+ - # 23
host_id: 0
supervisor_host_id: 0
- - #24
+ - # 24
host_id: 0
supervisor_host_id: 0
- - #25
+ - # 25
host_id: 0
supervisor_host_id: 0
- - #26
+ - # 26
host_id: 0
supervisor_host_id: 0
- - #27
+ - # 27
host_id: 0
supervisor_host_id: 0
- - #28
+ - # 28
host_id: 0
supervisor_host_id: 0
- - #29
+ - # 29
host_id: 0
supervisor_host_id: 0
- - #30
+ - # 30
host_id: 0
supervisor_host_id: 0
- - #31
+ - # 31
host_id: 0
supervisor_host_id: 0
- - #32
+ - # 32
host_id: 0
supervisor_host_id: 0
otp_config:
@@ -250,100 +249,100 @@
magic: 0x4081
size: 69
otp_entry:
- - #1
+ - # 1
host_id: 0
host_perms: 0
- - #2
+ - # 2
host_id: 0
host_perms: 0
- - #3
+ - # 3
host_id: 0
host_perms: 0
- - #4
+ - # 4
host_id: 0
host_perms: 0
- - #5
+ - # 5
host_id: 0
host_perms: 0
- - #6
+ - # 6
host_id: 0
host_perms: 0
- - #7
+ - # 7
host_id: 0
host_perms: 0
- - #8
+ - # 8
host_id: 0
host_perms: 0
- - #9
+ - # 9
host_id: 0
host_perms: 0
- - #10
+ - # 10
host_id: 0
host_perms: 0
- - #11
+ - # 11
host_id: 0
host_perms: 0
- - #12
+ - # 12
host_id: 0
host_perms: 0
- - #13
+ - # 13
host_id: 0
host_perms: 0
- - #14
+ - # 14
host_id: 0
host_perms: 0
- - #15
+ - # 15
host_id: 0
host_perms: 0
- - #16
+ - # 16
host_id: 0
host_perms: 0
- - #17
+ - # 17
host_id: 0
host_perms: 0
- - #18
+ - # 18
host_id: 0
host_perms: 0
- - #19
+ - # 19
host_id: 0
host_perms: 0
- - #20
+ - # 20
host_id: 0
host_perms: 0
- - #21
+ - # 21
host_id: 0
host_perms: 0
- - #22
+ - # 22
host_id: 0
host_perms: 0
- - #23
+ - # 23
host_id: 0
host_perms: 0
- - #24
+ - # 24
host_id: 0
host_perms: 0
- - #25
+ - # 25
host_id: 0
host_perms: 0
- - #26
+ - # 26
host_id: 0
host_perms: 0
- - #27
+ - # 27
host_id: 0
host_perms: 0
- - #28
+ - # 28
host_id: 0
host_perms: 0
- - #29
+ - # 29
host_id: 0
host_perms: 0
- - #30
+ - # 30
host_id: 0
host_perms: 0
- - #31
+ - # 31
host_id: 0
host_perms: 0
- - #32
+ - # 32
host_id: 0
host_perms: 0
write_host_id: 0
diff --git a/board/ti/j721e/sec-cfg_j7200.yaml b/board/ti/j721e/sec-cfg_j7200.yaml
index c346087..4726ac2 100644
--- a/board/ti/j721e/sec-cfg_j7200.yaml
+++ b/board/ti/j721e/sec-cfg_j7200.yaml
@@ -8,343 +8,342 @@
sec-cfg:
rev:
- boardcfg_abi_maj : 0x0
- boardcfg_abi_min : 0x1
+ boardcfg_abi_maj: 0x0
+ boardcfg_abi_min: 0x1
processor_acl_list:
subhdr:
magic: 0xF1EA
size: 164
proc_acl_entries:
- - #1
+ - # 1
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #2
+ - # 2
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #3
+ - # 3
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #4
+ - # 4
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #5
+ - # 5
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #6
+ - # 6
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #7
+ - # 7
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #8
+ - # 8
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #9
+ - # 9
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #10
+ - # 10
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #11
+ - # 11
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #12
+ - # 12
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #13
+ - # 13
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #14
+ - # 14
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #15
+ - # 15
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #16
+ - # 16
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #17
+ - # 17
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #18
+ - # 18
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #19
+ - # 19
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #20
+ - # 20
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #21
+ - # 21
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #22
+ - # 22
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #23
+ - # 23
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #24
+ - # 24
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #25
+ - # 25
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #26
+ - # 26
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #27
+ - # 27
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #28
+ - # 28
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #29
+ - # 29
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #30
+ - # 30
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #31
+ - # 31
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #32
+ - # 32
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
-
host_hierarchy:
subhdr:
magic: 0x8D27
size: 68
host_hierarchy_entries:
- - #1
+ - # 1
host_id: 0
supervisor_host_id: 0
- - #2
+ - # 2
host_id: 0
supervisor_host_id: 0
- - #3
+ - # 3
host_id: 0
supervisor_host_id: 0
- - #4
+ - # 4
host_id: 0
supervisor_host_id: 0
- - #5
+ - # 5
host_id: 0
supervisor_host_id: 0
- - #6
+ - # 6
host_id: 0
supervisor_host_id: 0
- - #7
+ - # 7
host_id: 0
supervisor_host_id: 0
- - #8
+ - # 8
host_id: 0
supervisor_host_id: 0
- - #9
+ - # 9
host_id: 0
supervisor_host_id: 0
- - #10
+ - # 10
host_id: 0
supervisor_host_id: 0
- - #11
+ - # 11
host_id: 0
supervisor_host_id: 0
- - #12
+ - # 12
host_id: 0
supervisor_host_id: 0
- - #13
+ - # 13
host_id: 0
supervisor_host_id: 0
- - #14
+ - # 14
host_id: 0
supervisor_host_id: 0
- - #15
+ - # 15
host_id: 0
supervisor_host_id: 0
- - #16
+ - # 16
host_id: 0
supervisor_host_id: 0
- - #17
+ - # 17
host_id: 0
supervisor_host_id: 0
- - #18
+ - # 18
host_id: 0
supervisor_host_id: 0
- - #19
+ - # 19
host_id: 0
supervisor_host_id: 0
- - #20
+ - # 20
host_id: 0
supervisor_host_id: 0
- - #21
+ - # 21
host_id: 0
supervisor_host_id: 0
- - #22
+ - # 22
host_id: 0
supervisor_host_id: 0
- - #23
+ - # 23
host_id: 0
supervisor_host_id: 0
- - #24
+ - # 24
host_id: 0
supervisor_host_id: 0
- - #25
+ - # 25
host_id: 0
supervisor_host_id: 0
- - #26
+ - # 26
host_id: 0
supervisor_host_id: 0
- - #27
+ - # 27
host_id: 0
supervisor_host_id: 0
- - #28
+ - # 28
host_id: 0
supervisor_host_id: 0
- - #29
+ - # 29
host_id: 0
supervisor_host_id: 0
- - #30
+ - # 30
host_id: 0
supervisor_host_id: 0
- - #31
+ - # 31
host_id: 0
supervisor_host_id: 0
- - #32
+ - # 32
host_id: 0
supervisor_host_id: 0
otp_config:
subhdr:
magic: 0x4081
size: 69
- write_host_id : 0
+ write_host_id: 0
otp_entry:
- - #1
+ - # 1
host_id: 0
host_perms: 0
- - #2
+ - # 2
host_id: 0
host_perms: 0
- - #3
+ - # 3
host_id: 0
host_perms: 0
- - #4
+ - # 4
host_id: 0
host_perms: 0
- - #5
+ - # 5
host_id: 0
host_perms: 0
- - #6
+ - # 6
host_id: 0
host_perms: 0
- - #7
+ - # 7
host_id: 0
host_perms: 0
- - #8
+ - # 8
host_id: 0
host_perms: 0
- - #9
+ - # 9
host_id: 0
host_perms: 0
- - #10
+ - # 10
host_id: 0
host_perms: 0
- - #11
+ - # 11
host_id: 0
host_perms: 0
- - #12
+ - # 12
host_id: 0
host_perms: 0
- - #13
+ - # 13
host_id: 0
host_perms: 0
- - #14
+ - # 14
host_id: 0
host_perms: 0
- - #15
+ - # 15
host_id: 0
host_perms: 0
- - #16
+ - # 16
host_id: 0
host_perms: 0
- - #17
+ - # 17
host_id: 0
host_perms: 0
- - #18
+ - # 18
host_id: 0
host_perms: 0
- - #19
+ - # 19
host_id: 0
host_perms: 0
- - #20
+ - # 20
host_id: 0
host_perms: 0
- - #21
+ - # 21
host_id: 0
host_perms: 0
- - #22
+ - # 22
host_id: 0
host_perms: 0
- - #23
+ - # 23
host_id: 0
host_perms: 0
- - #24
+ - # 24
host_id: 0
host_perms: 0
- - #25
+ - # 25
host_id: 0
host_perms: 0
- - #26
+ - # 26
host_id: 0
host_perms: 0
- - #27
+ - # 27
host_id: 0
host_perms: 0
- - #28
+ - # 28
host_id: 0
host_perms: 0
- - #29
+ - # 29
host_id: 0
host_perms: 0
- - #30
+ - # 30
host_id: 0
host_perms: 0
- - #31
+ - # 31
host_id: 0
host_perms: 0
- - #32
+ - # 32
host_id: 0
host_perms: 0
dkek_config:
@@ -352,12 +351,12 @@
magic: 0x5170
size: 12
allowed_hosts: [128, 0, 0, 0]
- allow_dkek_export_tisci : 0x5A
+ allow_dkek_export_tisci: 0x5A
rsvd: [0, 0, 0]
sa2ul_cfg:
subhdr:
magic: 0x23BE
- size : 0
+ size: 0
auth_resource_owner: 0
enable_saul_psil_global_config_writes: 0
rsvd: [0, 0]
@@ -365,16 +364,16 @@
subhdr:
magic: 0x42AF
size: 16
- allow_jtag_unlock : 0x5A
- allow_wildcard_unlock : 0x5A
- allowed_debug_level_rsvd : 0
- rsvd : 0
- min_cert_rev : 0x0
+ allow_jtag_unlock: 0x5A
+ allow_wildcard_unlock: 0x5A
+ allowed_debug_level_rsvd: 0
+ rsvd: 0
+ min_cert_rev: 0x0
jtag_unlock_hosts: [0, 0, 0, 0]
sec_handover_cfg:
subhdr:
magic: 0x608F
size: 10
- handover_msg_sender : 0
- handover_to_host_id : 0
+ handover_msg_sender: 0
+ handover_to_host_id: 0
rsvd: [0, 0, 0, 0]
diff --git a/board/ti/j721s2/board-cfg.yaml b/board/ti/j721s2/board-cfg.yaml
index dd02411..94e61ab 100644
--- a/board/ti/j721s2/board-cfg.yaml
+++ b/board/ti/j721s2/board-cfg.yaml
@@ -8,29 +8,29 @@
board-cfg:
rev:
- boardcfg_abi_maj : 0x0
- boardcfg_abi_min : 0x1
+ boardcfg_abi_maj: 0x0
+ boardcfg_abi_min: 0x1
control:
subhdr:
magic: 0xC1D3
size: 7
- main_isolation_enable : 0x5A
- main_isolation_hostid : 0x2
+ main_isolation_enable: 0x5A
+ main_isolation_hostid: 0x2
secproxy:
subhdr:
magic: 0x1207
size: 7
- scaling_factor : 0x1
- scaling_profile : 0x1
- disable_main_nav_secure_proxy : 0
+ scaling_factor: 0x1
+ scaling_profile: 0x1
+ disable_main_nav_secure_proxy: 0
msmc:
subhdr:
magic: 0xA5C3
size: 5
- msmc_cache_size : 0x0
+ msmc_cache_size: 0x0
debug_cfg:
subhdr:
magic: 0x020C
size: 8
- trace_dst_enables : 0x00
- trace_src_enables : 0x00
+ trace_dst_enables: 0x00
+ trace_src_enables: 0x00
diff --git a/board/ti/j721s2/evm.c b/board/ti/j721s2/evm.c
index db71739..1220cd8 100644
--- a/board/ti/j721s2/evm.c
+++ b/board/ti/j721s2/evm.c
@@ -56,13 +56,13 @@
int dram_init_banksize(void)
{
/* Bank 0 declares the memory available in the DDR low region */
- gd->bd->bi_dram[0].start = CFG_SYS_SDRAM_BASE;
+ gd->bd->bi_dram[0].start = 0x80000000;
gd->bd->bi_dram[0].size = 0x7fffffff;
gd->ram_size = 0x80000000;
#ifdef CONFIG_PHYS_64BIT
/* Bank 1 declares the memory available in the DDR high region */
- gd->bd->bi_dram[1].start = CFG_SYS_SDRAM_BASE1;
+ gd->bd->bi_dram[1].start = 0x880000000;
gd->bd->bi_dram[1].size = 0x37fffffff;
gd->ram_size = 0x400000000;
#endif
diff --git a/board/ti/j721s2/pm-cfg.yaml b/board/ti/j721s2/pm-cfg.yaml
index a640460..e649651 100644
--- a/board/ti/j721s2/pm-cfg.yaml
+++ b/board/ti/j721s2/pm-cfg.yaml
@@ -8,5 +8,5 @@
pm-cfg:
rev:
- boardcfg_abi_maj : 0x0
- boardcfg_abi_min : 0x1
+ boardcfg_abi_maj: 0x0
+ boardcfg_abi_min: 0x1
diff --git a/board/ti/j721s2/rm-cfg.yaml b/board/ti/j721s2/rm-cfg.yaml
index f772832..8796463 100644
--- a/board/ti/j721s2/rm-cfg.yaml
+++ b/board/ti/j721s2/rm-cfg.yaml
@@ -9,2893 +9,2515 @@
rm-cfg:
rm_boardcfg:
rev:
- boardcfg_abi_maj : 0x0
- boardcfg_abi_min : 0x1
+ boardcfg_abi_maj: 0x0
+ boardcfg_abi_min: 0x1
host_cfg:
subhdr:
magic: 0x4C41
- size : 356
+ size: 356
host_cfg_entries:
- - #1
+ - # 1
host_id: 3
- allowed_atype : 0x2A
- allowed_qos : 0xAAAA
- allowed_orderid : 0xAAAAAAAA
- allowed_priority : 0xAAAA
- allowed_sched_priority : 0xAA
- - #2
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - # 2
host_id: 5
- allowed_atype : 0x2A
- allowed_qos : 0xAAAA
- allowed_orderid : 0xAAAAAAAA
- allowed_priority : 0xAAAA
- allowed_sched_priority : 0xAA
- - #3
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - # 3
host_id: 12
- allowed_atype : 0x2A
- allowed_qos : 0xAAAA
- allowed_orderid : 0xAAAAAAAA
- allowed_priority : 0xAAAA
- allowed_sched_priority : 0xAA
- - #4
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - # 4
host_id: 13
- allowed_atype : 0x2A
- allowed_qos : 0xAAAA
- allowed_orderid : 0xAAAAAAAA
- allowed_priority : 0xAAAA
- allowed_sched_priority : 0xAA
- - #5
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - # 5
host_id: 21
- allowed_atype : 0x2A
- allowed_qos : 0xAAAA
- allowed_orderid : 0xAAAAAAAA
- allowed_priority : 0xAAAA
- allowed_sched_priority : 0xAA
- - #6
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - # 6
host_id: 23
- allowed_atype : 0x2A
- allowed_qos : 0xAAAA
- allowed_orderid : 0xAAAAAAAA
- allowed_priority : 0xAAAA
- allowed_sched_priority : 0xAA
- - #7
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - # 7
host_id: 35
- allowed_atype : 0x2A
- allowed_qos : 0xAAAA
- allowed_orderid : 0xAAAAAAAA
- allowed_priority : 0xAAAA
- allowed_sched_priority : 0xAA
- - #8
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - # 8
host_id: 37
- allowed_atype : 0x2A
- allowed_qos : 0xAAAA
- allowed_orderid : 0xAAAAAAAA
- allowed_priority : 0xAAAA
- allowed_sched_priority : 0xAA
- - #9
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - # 9
host_id: 40
- allowed_atype : 0x2A
- allowed_qos : 0xAAAA
- allowed_orderid : 0xAAAAAAAA
- allowed_priority : 0xAAAA
- allowed_sched_priority : 0xAA
- - #10
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - # 10
host_id: 42
- allowed_atype : 0x2A
- allowed_qos : 0xAAAA
- allowed_orderid : 0xAAAAAAAA
- allowed_priority : 0xAAAA
- allowed_sched_priority : 0xAA
- - #11
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - # 11
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #12
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 12
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #13
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 13
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #14
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 14
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #15
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 15
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #16
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 16
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #17
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 17
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #18
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 18
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #19
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 19
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #20
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 20
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #21
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 21
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #22
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 22
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #23
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 23
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #24
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 24
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #25
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 25
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #26
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 26
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #27
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 27
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #28
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 28
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #29
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 29
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #30
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 30
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #31
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 31
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #32
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 32
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
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+ start_resource: 22
+ num_resource: 32
+ type: 17610
+ host_id: 12
+ reserved: 0
-
- start_resource: 54
- num_resource: 16
- type: 17610
- host_id: 13
- reserved: 0
-
+ start_resource: 54
+ num_resource: 16
+ type: 17610
+ host_id: 13
+ reserved: 0
-
- start_resource: 70
- num_resource: 8
- type: 17610
- host_id: 21
- reserved: 0
-
+ start_resource: 70
+ num_resource: 8
+ type: 17610
+ host_id: 21
+ reserved: 0
-
- start_resource: 78
- num_resource: 8
- type: 17610
- host_id: 23
- reserved: 0
-
+ start_resource: 78
+ num_resource: 8
+ type: 17610
+ host_id: 23
+ reserved: 0
-
- start_resource: 86
- num_resource: 24
- type: 17610
- host_id: 35
- reserved: 0
-
+ start_resource: 86
+ num_resource: 24
+ type: 17610
+ host_id: 35
+ reserved: 0
-
- start_resource: 110
- num_resource: 8
- type: 17610
- host_id: 37
- reserved: 0
-
+ start_resource: 110
+ num_resource: 8
+ type: 17610
+ host_id: 37
+ reserved: 0
-
- start_resource: 118
- num_resource: 16
- type: 17610
- host_id: 40
- reserved: 0
-
+ start_resource: 118
+ num_resource: 16
+ type: 17610
+ host_id: 40
+ reserved: 0
-
- start_resource: 134
- num_resource: 16
- type: 17610
- host_id: 42
- reserved: 0
-
+ start_resource: 134
+ num_resource: 16
+ type: 17610
+ host_id: 42
+ reserved: 0
-
- start_resource: 150
- num_resource: 64
- type: 17610
- host_id: 3
- reserved: 0
-
+ start_resource: 150
+ num_resource: 64
+ type: 17610
+ host_id: 3
+ reserved: 0
-
- start_resource: 214
- num_resource: 4
- type: 17610
- host_id: 5
- reserved: 0
-
+ start_resource: 214
+ num_resource: 4
+ type: 17610
+ host_id: 5
+ reserved: 0
-
- start_resource: 218
- num_resource: 38
- type: 17610
- host_id: 128
- reserved: 0
-
+ start_resource: 218
+ num_resource: 38
+ type: 17610
+ host_id: 128
+ reserved: 0
-
- start_resource: 16406
- num_resource: 128
- type: 17613
- host_id: 12
- reserved: 0
-
+ start_resource: 16406
+ num_resource: 128
+ type: 17613
+ host_id: 12
+ reserved: 0
-
- start_resource: 16534
- num_resource: 128
- type: 17613
- host_id: 13
- reserved: 0
-
+ start_resource: 16534
+ num_resource: 128
+ type: 17613
+ host_id: 13
+ reserved: 0
-
- start_resource: 16662
- num_resource: 64
- type: 17613
- host_id: 21
- reserved: 0
-
+ start_resource: 16662
+ num_resource: 64
+ type: 17613
+ host_id: 21
+ reserved: 0
-
- start_resource: 16726
- num_resource: 64
- type: 17613
- host_id: 23
- reserved: 0
-
+ start_resource: 16726
+ num_resource: 64
+ type: 17613
+ host_id: 23
+ reserved: 0
-
- start_resource: 16790
- num_resource: 128
- type: 17613
- host_id: 35
- reserved: 0
-
+ start_resource: 16790
+ num_resource: 128
+ type: 17613
+ host_id: 35
+ reserved: 0
-
- start_resource: 16918
- num_resource: 128
- type: 17613
- host_id: 37
- reserved: 0
-
+ start_resource: 16918
+ num_resource: 128
+ type: 17613
+ host_id: 37
+ reserved: 0
-
- start_resource: 17046
- num_resource: 128
- type: 17613
- host_id: 40
- reserved: 0
-
+ start_resource: 17046
+ num_resource: 128
+ type: 17613
+ host_id: 40
+ reserved: 0
-
- start_resource: 17174
- num_resource: 128
- type: 17613
- host_id: 42
- reserved: 0
-
+ start_resource: 17174
+ num_resource: 128
+ type: 17613
+ host_id: 42
+ reserved: 0
-
- start_resource: 17302
- num_resource: 256
- type: 17613
- host_id: 3
- reserved: 0
-
+ start_resource: 17302
+ num_resource: 256
+ type: 17613
+ host_id: 3
+ reserved: 0
-
- start_resource: 17558
- num_resource: 64
- type: 17613
- host_id: 5
- reserved: 0
-
+ start_resource: 17558
+ num_resource: 64
+ type: 17613
+ host_id: 5
+ reserved: 0
-
- start_resource: 17622
- num_resource: 298
- type: 17613
- host_id: 128
- reserved: 0
+ start_resource: 17622
+ num_resource: 298
+ type: 17613
+ host_id: 128
+ reserved: 0
diff --git a/board/ti/j721s2/sec-cfg.yaml b/board/ti/j721s2/sec-cfg.yaml
index b3601d2..d0f3a16 100644
--- a/board/ti/j721s2/sec-cfg.yaml
+++ b/board/ti/j721s2/sec-cfg.yaml
@@ -8,138 +8,138 @@
sec-cfg:
rev:
- boardcfg_abi_maj : 0x0
- boardcfg_abi_min : 0x1
+ boardcfg_abi_maj: 0x0
+ boardcfg_abi_min: 0x1
processor_acl_list:
subhdr:
magic: 0xF1EA
size: 164
proc_acl_entries:
- - #1
+ - # 1
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #2
+ - # 2
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #3
+ - # 3
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #4
+ - # 4
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #5
+ - # 5
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #6
+ - # 6
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #7
+ - # 7
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #8
+ - # 8
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #9
+ - # 9
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #10
+ - # 10
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #11
+ - # 11
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #12
+ - # 12
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #13
+ - # 13
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #14
+ - # 14
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #15
+ - # 15
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #16
+ - # 16
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #17
+ - # 17
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #18
+ - # 18
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #19
+ - # 19
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #20
+ - # 20
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #21
+ - # 21
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #22
+ - # 22
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #23
+ - # 23
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #24
+ - # 24
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #25
+ - # 25
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #26
+ - # 26
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #27
+ - # 27
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #28
+ - # 28
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #29
+ - # 29
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #30
+ - # 30
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #31
+ - # 31
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #32
+ - # 32
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
@@ -148,202 +148,202 @@
magic: 0x8D27
size: 68
host_hierarchy_entries:
- - #1
+ - # 1
host_id: 0
supervisor_host_id: 0
- - #2
+ - # 2
host_id: 0
supervisor_host_id: 0
- - #3
+ - # 3
host_id: 0
supervisor_host_id: 0
- - #4
+ - # 4
host_id: 0
supervisor_host_id: 0
- - #5
+ - # 5
host_id: 0
supervisor_host_id: 0
- - #6
+ - # 6
host_id: 0
supervisor_host_id: 0
- - #7
+ - # 7
host_id: 0
supervisor_host_id: 0
- - #8
+ - # 8
host_id: 0
supervisor_host_id: 0
- - #9
+ - # 9
host_id: 0
supervisor_host_id: 0
- - #10
+ - # 10
host_id: 0
supervisor_host_id: 0
- - #11
+ - # 11
host_id: 0
supervisor_host_id: 0
- - #12
+ - # 12
host_id: 0
supervisor_host_id: 0
- - #13
+ - # 13
host_id: 0
supervisor_host_id: 0
- - #14
+ - # 14
host_id: 0
supervisor_host_id: 0
- - #15
+ - # 15
host_id: 0
supervisor_host_id: 0
- - #16
+ - # 16
host_id: 0
supervisor_host_id: 0
- - #17
+ - # 17
host_id: 0
supervisor_host_id: 0
- - #18
+ - # 18
host_id: 0
supervisor_host_id: 0
- - #19
+ - # 19
host_id: 0
supervisor_host_id: 0
- - #20
+ - # 20
host_id: 0
supervisor_host_id: 0
- - #21
+ - # 21
host_id: 0
supervisor_host_id: 0
- - #22
+ - # 22
host_id: 0
supervisor_host_id: 0
- - #23
+ - # 23
host_id: 0
supervisor_host_id: 0
- - #24
+ - # 24
host_id: 0
supervisor_host_id: 0
- - #25
+ - # 25
host_id: 0
supervisor_host_id: 0
- - #26
+ - # 26
host_id: 0
supervisor_host_id: 0
- - #27
+ - # 27
host_id: 0
supervisor_host_id: 0
- - #28
+ - # 28
host_id: 0
supervisor_host_id: 0
- - #29
+ - # 29
host_id: 0
supervisor_host_id: 0
- - #30
+ - # 30
host_id: 0
supervisor_host_id: 0
- - #31
+ - # 31
host_id: 0
supervisor_host_id: 0
- - #32
+ - # 32
host_id: 0
supervisor_host_id: 0
otp_config:
subhdr:
magic: 0x4081
size: 69
- write_host_id : 0
+ write_host_id: 0
otp_entry:
- - #1
+ - # 1
host_id: 0
host_perms: 0
- - #2
+ - # 2
host_id: 0
host_perms: 0
- - #3
+ - # 3
host_id: 0
host_perms: 0
- - #4
+ - # 4
host_id: 0
host_perms: 0
- - #5
+ - # 5
host_id: 0
host_perms: 0
- - #6
+ - # 6
host_id: 0
host_perms: 0
- - #7
+ - # 7
host_id: 0
host_perms: 0
- - #8
+ - # 8
host_id: 0
host_perms: 0
- - #9
+ - # 9
host_id: 0
host_perms: 0
- - #10
+ - # 10
host_id: 0
host_perms: 0
- - #11
+ - # 11
host_id: 0
host_perms: 0
- - #12
+ - # 12
host_id: 0
host_perms: 0
- - #13
+ - # 13
host_id: 0
host_perms: 0
- - #14
+ - # 14
host_id: 0
host_perms: 0
- - #15
+ - # 15
host_id: 0
host_perms: 0
- - #16
+ - # 16
host_id: 0
host_perms: 0
- - #17
+ - # 17
host_id: 0
host_perms: 0
- - #18
+ - # 18
host_id: 0
host_perms: 0
- - #19
+ - # 19
host_id: 0
host_perms: 0
- - #20
+ - # 20
host_id: 0
host_perms: 0
- - #21
+ - # 21
host_id: 0
host_perms: 0
- - #22
+ - # 22
host_id: 0
host_perms: 0
- - #23
+ - # 23
host_id: 0
host_perms: 0
- - #24
+ - # 24
host_id: 0
host_perms: 0
- - #25
+ - # 25
host_id: 0
host_perms: 0
- - #26
+ - # 26
host_id: 0
host_perms: 0
- - #27
+ - # 27
host_id: 0
host_perms: 0
- - #28
+ - # 28
host_id: 0
host_perms: 0
- - #29
+ - # 29
host_id: 0
host_perms: 0
- - #30
+ - # 30
host_id: 0
host_perms: 0
- - #31
+ - # 31
host_id: 0
host_perms: 0
- - #32
+ - # 32
host_id: 0
host_perms: 0
dkek_config:
@@ -351,12 +351,12 @@
magic: 0x5170
size: 12
allowed_hosts: [128, 0, 0, 0]
- allow_dkek_export_tisci : 0x5A
+ allow_dkek_export_tisci: 0x5A
rsvd: [0, 0, 0]
sa2ul_cfg:
subhdr:
magic: 0x23BE
- size : 0
+ size: 0
auth_resource_owner: 0
enable_saul_psil_global_config_writes: 0
rsvd: [0, 0]
@@ -364,16 +364,16 @@
subhdr:
magic: 0x42AF
size: 16
- allow_jtag_unlock : 0x0
- allow_wildcard_unlock : 0x0
+ allow_jtag_unlock: 0x0
+ allow_wildcard_unlock: 0x0
allowed_debug_level_rsvd: 0
rsvd: 0
- min_cert_rev : 0x0
+ min_cert_rev: 0x0
jtag_unlock_hosts: [0, 0, 0, 0]
sec_handover_cfg:
subhdr:
magic: 0x608F
size: 10
- handover_msg_sender : 0
- handover_to_host_id : 0
+ handover_msg_sender: 0
+ handover_to_host_id: 0
rsvd: [0, 0, 0, 0]
diff --git a/board/ti/ks2_evm/mux-k2g.h b/board/ti/ks2_evm/mux-k2g.h
index f24e628..447e706 100644
--- a/board/ti/ks2_evm/mux-k2g.h
+++ b/board/ti/ks2_evm/mux-k2g.h
@@ -6,7 +6,6 @@
* Texas Instruments Incorporated, <www.ti.com>
*/
-#include <common.h>
#include <hang.h>
#include <asm/io.h>
#include <asm/arch/mux-k2g.h>
diff --git a/board/toradex/apalis-imx8/apalis-imx8.c b/board/toradex/apalis-imx8/apalis-imx8.c
index e2bbaba..b351ce6 100644
--- a/board/toradex/apalis-imx8/apalis-imx8.c
+++ b/board/toradex/apalis-imx8/apalis-imx8.c
@@ -215,7 +215,7 @@
build_info();
print_bootinfo();
- return 0;
+ return tdx_checkboard();
}
static enum pcb_rev_t get_pcb_revision(void)
diff --git a/board/toradex/apalis-tk1/apalis-tk1.c b/board/toradex/apalis-tk1/apalis-tk1.c
index 8513431..79a1c92 100644
--- a/board/toradex/apalis-tk1/apalis-tk1.c
+++ b/board/toradex/apalis-tk1/apalis-tk1.c
@@ -95,7 +95,7 @@
{
puts("Model: Toradex Apalis TK1 2GB\n");
- return 0;
+ return tdx_checkboard();
}
#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
diff --git a/board/toradex/apalis_imx6/apalis_imx6.c b/board/toradex/apalis_imx6/apalis_imx6.c
index fa6b722..164fcc4 100644
--- a/board/toradex/apalis_imx6/apalis_imx6.c
+++ b/board/toradex/apalis_imx6/apalis_imx6.c
@@ -701,13 +701,16 @@
env_set("board_rev", env_str);
#endif /* CONFIG_BOARD_LATE_INIT */
-#ifdef CONFIG_CMD_USB_SDP
- if (is_boot_from_usb()) {
- printf("Serial Downloader recovery mode, using sdp command\n");
+ if (IS_ENABLED(CONFIG_USB) && is_boot_from_usb()) {
env_set("bootdelay", "0");
- env_set("bootcmd", "sdp 0");
+ if (IS_ENABLED(CONFIG_CMD_USB_SDP)) {
+ printf("Serial Downloader recovery mode, using sdp command\n");
+ env_set("bootcmd", "sdp 0");
+ } else if (IS_ENABLED(CONFIG_CMD_FASTBOOT)) {
+ printf("Fastboot recovery mode, using fastboot command\n");
+ env_set("bootcmd", "fastboot usb 0");
+ }
}
-#endif /* CONFIG_CMD_USB_SDP */
return 0;
}
@@ -730,7 +733,8 @@
is_cpu_type(MXC_CPU_MX6D) ? "Dual" : "Quad",
(gd->ram_size == 0x80000000) ? "2GB" :
(gd->ram_size == 0x40000000) ? "1GB" : "512MB", it);
- return 0;
+
+ return tdx_checkboard();
}
#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
diff --git a/board/toradex/apalis_t30/apalis_t30.c b/board/toradex/apalis_t30/apalis_t30.c
index ef71270..b9a2af3 100644
--- a/board/toradex/apalis_t30/apalis_t30.c
+++ b/board/toradex/apalis_t30/apalis_t30.c
@@ -50,7 +50,7 @@
printf("Model: Toradex Apalis T30 %dGB\n",
(gd->ram_size == 0x40000000) ? 1 : 2);
- return 0;
+ return tdx_checkboard();
}
#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
diff --git a/board/toradex/colibri-imx6ull/colibri-imx6ull.c b/board/toradex/colibri-imx6ull/colibri-imx6ull.c
index 48fdb1e..a775f54 100644
--- a/board/toradex/colibri-imx6ull/colibri-imx6ull.c
+++ b/board/toradex/colibri-imx6ull/colibri-imx6ull.c
@@ -187,13 +187,16 @@
add_board_boot_modes(board_boot_modes);
#endif
-#ifdef CONFIG_CMD_USB_SDP
- if (is_boot_from_usb()) {
- printf("Serial Downloader recovery mode, using sdp command\n");
+ if (IS_ENABLED(CONFIG_USB) && is_boot_from_usb()) {
env_set("bootdelay", "0");
- env_set("bootcmd", "sdp 0");
+ if (IS_ENABLED(CONFIG_CMD_USB_SDP)) {
+ printf("Serial Downloader recovery mode, using sdp command\n");
+ env_set("bootcmd", "sdp 0");
+ } else if (IS_ENABLED(CONFIG_CMD_FASTBOOT)) {
+ printf("Fastboot recovery mode, using fastboot command\n");
+ env_set("bootcmd", "fastboot usb 0");
+ }
}
-#endif /* CONFIG_CMD_USB_SDP */
#if defined(CONFIG_VIDEO)
setup_lcd();
@@ -206,7 +209,7 @@
{
printf("Model: Toradex Colibri iMX6ULL\n");
- return 0;
+ return tdx_checkboard();
}
#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
diff --git a/board/toradex/colibri-imx8x/colibri-imx8x.c b/board/toradex/colibri-imx8x/colibri-imx8x.c
index 6c0b097..d8cc72f 100644
--- a/board/toradex/colibri-imx8x/colibri-imx8x.c
+++ b/board/toradex/colibri-imx8x/colibri-imx8x.c
@@ -121,7 +121,7 @@
build_info();
print_bootinfo();
- return 0;
+ return tdx_checkboard();
}
static void select_dt_from_module_version(void)
diff --git a/board/toradex/colibri_imx6/colibri_imx6.c b/board/toradex/colibri_imx6/colibri_imx6.c
index e6c9b10..784ca7f 100644
--- a/board/toradex/colibri_imx6/colibri_imx6.c
+++ b/board/toradex/colibri_imx6/colibri_imx6.c
@@ -621,13 +621,16 @@
env_set("board_rev", env_str);
#endif
-#ifdef CONFIG_CMD_USB_SDP
- if (is_boot_from_usb()) {
- printf("Serial Downloader recovery mode, using sdp command\n");
+ if (IS_ENABLED(CONFIG_USB) && is_boot_from_usb()) {
env_set("bootdelay", "0");
- env_set("bootcmd", "sdp 0");
+ if (IS_ENABLED(CONFIG_CMD_USB_SDP)) {
+ printf("Serial Downloader recovery mode, using sdp command\n");
+ env_set("bootcmd", "sdp 0");
+ } else if (IS_ENABLED(CONFIG_CMD_FASTBOOT)) {
+ printf("Fastboot recovery mode, using fastboot command\n");
+ env_set("bootcmd", "fastboot usb 0");
+ }
}
-#endif /* CONFIG_CMD_USB_SDP */
return 0;
}
@@ -649,7 +652,8 @@
printf("Model: Toradex Colibri iMX6 %s %sMB%s\n",
is_cpu_type(MXC_CPU_MX6DL) ? "DualLite" : "Solo",
(gd->ram_size == 0x20000000) ? "512" : "256", it);
- return 0;
+
+ return tdx_checkboard();
}
#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
diff --git a/board/toradex/colibri_imx7/colibri_imx7.c b/board/toradex/colibri_imx7/colibri_imx7.c
index f0356af..2e5b02f 100644
--- a/board/toradex/colibri_imx7/colibri_imx7.c
+++ b/board/toradex/colibri_imx7/colibri_imx7.c
@@ -16,7 +16,6 @@
#include <asm/gpio.h>
#include <asm/mach-imx/iomux-v3.h>
#include <asm/io.h>
-#include <common.h>
#include <dm.h>
#include <dm/platform_data/serial_mxc.h>
#include <fdt_support.h>
@@ -66,7 +65,7 @@
}
static iomux_v3_cfg_t const flash_detection_pads[] = {
- MX7D_PAD_SD3_RESET_B__GPIO6_IO11 | MUX_PAD_CTRL(FLASH_DETECTION_CTRL),
+ MX7D_PAD_SD3_RESET_B__GPIO6_IO11 | MUX_PAD_CTRL(FLASH_DETECTION_CTRL) | MUX_MODE_SION,
};
static iomux_v3_cfg_t const uart1_pads[] = {
@@ -193,9 +192,9 @@
gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
/*
- * Enable GPIO on NAND_WE_B/eMMC_RST with 100k pull-down. eMMC_RST
+ * Enable GPIO SION on NAND_WE_B/eMMC_RST with 100k pull-down. eMMC_RST
* is pulled high with 4.7k for eMMC devices. This allows to reliably
- * detect eMMC/NAND flash
+ * detect eMMC vs NAND flash.
*/
imx_iomux_v3_setup_multiple_pads(flash_detection_pads, ARRAY_SIZE(flash_detection_pads));
gpio_request(FLASH_DET_GPIO, "flash-detection-gpio");
@@ -279,7 +278,7 @@
printf("Model: Toradex Colibri iMX7%c\n",
is_cpu_type(MXC_CPU_MX7D) ? 'D' : 'S');
- return 0;
+ return tdx_checkboard();
}
#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
@@ -360,13 +359,17 @@
setup_lcd();
#endif
-#if defined(CONFIG_CMD_USB_SDP)
- if (is_boot_from_usb()) {
- printf("Serial Downloader recovery mode, using sdp command\n");
+ if (IS_ENABLED(CONFIG_USB) && is_boot_from_usb()) {
env_set("bootdelay", "0");
- env_set("bootcmd", "sdp 0");
+ if (IS_ENABLED(CONFIG_CMD_USB_SDP)) {
+ printf("Serial Downloader recovery mode, using sdp command\n");
+ env_set("bootcmd", "sdp 0");
+ } else if (IS_ENABLED(CONFIG_CMD_FASTBOOT)) {
+ printf("Fastboot recovery mode, using fastboot command\n");
+ env_set("bootcmd", "fastboot usb 0");
+ }
}
-#endif
+
if (is_emmc)
env_set("variant", "-emmc");
else
diff --git a/board/toradex/colibri_t20/colibri_t20.c b/board/toradex/colibri_t20/colibri_t20.c
index 1df9697..5861cf7 100644
--- a/board/toradex/colibri_t20/colibri_t20.c
+++ b/board/toradex/colibri_t20/colibri_t20.c
@@ -77,7 +77,7 @@
(get_nand_dev_by_index(0)->erasesize >> 10 == 512) ?
((gd->ram_size == 0x10000000) ? "1.1B" : "1.1C") : "1.2A");
- return 0;
+ return tdx_checkboard();
}
#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
diff --git a/board/toradex/colibri_t30/colibri_t30.c b/board/toradex/colibri_t30/colibri_t30.c
index b6b0046..8cef098 100644
--- a/board/toradex/colibri_t30/colibri_t30.c
+++ b/board/toradex/colibri_t30/colibri_t30.c
@@ -32,7 +32,7 @@
{
puts("Model: Toradex Colibri T30 1GB\n");
- return 0;
+ return tdx_checkboard();
}
#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
diff --git a/board/toradex/colibri_vf/colibri_vf.c b/board/toradex/colibri_vf/colibri_vf.c
index dcef2db..af9f2d3 100644
--- a/board/toradex/colibri_vf/colibri_vf.c
+++ b/board/toradex/colibri_vf/colibri_vf.c
@@ -373,7 +373,7 @@
else
puts("Model: Toradex Colibri VF50\n");
- return 0;
+ return tdx_checkboard();
}
#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
diff --git a/board/toradex/common/tdx-common.c b/board/toradex/common/tdx-common.c
index d144914..ed8f0a6 100644
--- a/board/toradex/common/tdx-common.c
+++ b/board/toradex/common/tdx-common.c
@@ -96,7 +96,7 @@
return ver_name;
}
-int show_board_info(void)
+int tdx_checkboard(void)
{
unsigned char ethaddr[6];
diff --git a/board/toradex/common/tdx-common.h b/board/toradex/common/tdx-common.h
index d446e9f..44234dc 100644
--- a/board/toradex/common/tdx-common.h
+++ b/board/toradex/common/tdx-common.h
@@ -11,5 +11,6 @@
int ft_common_board_setup(void *blob, struct bd_info *bd);
u32 get_board_revision(void);
+int tdx_checkboard(void);
#endif /* _TDX_COMMON_H */
diff --git a/board/toradex/verdin-am62/board-cfg.yaml b/board/toradex/verdin-am62/board-cfg.yaml
index 36cfb55..45c89dd 100644
--- a/board/toradex/verdin-am62/board-cfg.yaml
+++ b/board/toradex/verdin-am62/board-cfg.yaml
@@ -8,29 +8,29 @@
board-cfg:
rev:
- boardcfg_abi_maj : 0x0
- boardcfg_abi_min : 0x1
+ boardcfg_abi_maj: 0x0
+ boardcfg_abi_min: 0x1
control:
subhdr:
magic: 0xC1D3
size: 7
- main_isolation_enable : 0x5A
- main_isolation_hostid : 0x2
+ main_isolation_enable: 0x5A
+ main_isolation_hostid: 0x2
secproxy:
subhdr:
magic: 0x1207
size: 7
- scaling_factor : 0x1
- scaling_profile : 0x1
- disable_main_nav_secure_proxy : 0
+ scaling_factor: 0x1
+ scaling_profile: 0x1
+ disable_main_nav_secure_proxy: 0
msmc:
subhdr:
magic: 0xA5C3
size: 5
- msmc_cache_size : 0x0
+ msmc_cache_size: 0x0
debug_cfg:
subhdr:
magic: 0x020C
size: 8
- trace_dst_enables : 0x00
- trace_src_enables : 0x00
+ trace_dst_enables: 0x00
+ trace_src_enables: 0x00
diff --git a/board/toradex/verdin-am62/pm-cfg.yaml b/board/toradex/verdin-am62/pm-cfg.yaml
index 5d04cf8..9853a25 100644
--- a/board/toradex/verdin-am62/pm-cfg.yaml
+++ b/board/toradex/verdin-am62/pm-cfg.yaml
@@ -8,5 +8,5 @@
pm-cfg:
rev:
- boardcfg_abi_maj : 0x0
- boardcfg_abi_min : 0x1
+ boardcfg_abi_maj: 0x0
+ boardcfg_abi_min: 0x1
diff --git a/board/toradex/verdin-am62/rm-cfg.yaml b/board/toradex/verdin-am62/rm-cfg.yaml
index c28707b..e4221f8 100644
--- a/board/toradex/verdin-am62/rm-cfg.yaml
+++ b/board/toradex/verdin-am62/rm-cfg.yaml
@@ -9,1080 +9,961 @@
rm-cfg:
rm_boardcfg:
rev:
- boardcfg_abi_maj : 0x0
- boardcfg_abi_min : 0x1
+ boardcfg_abi_maj: 0x0
+ boardcfg_abi_min: 0x1
host_cfg:
subhdr:
magic: 0x4C41
- size : 356
+ size: 356
host_cfg_entries:
- - #1
+ - # 1
host_id: 12
- allowed_atype : 0x2A
- allowed_qos : 0xAAAA
- allowed_orderid : 0xAAAAAAAA
- allowed_priority : 0xAAAA
- allowed_sched_priority : 0xAA
- - #2
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - # 2
host_id: 30
- allowed_atype : 0x2A
- allowed_qos : 0xAAAA
- allowed_orderid : 0xAAAAAAAA
- allowed_priority : 0xAAAA
- allowed_sched_priority : 0xAA
- - #3
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - # 3
host_id: 36
- allowed_atype : 0x2A
- allowed_qos : 0xAAAA
- allowed_orderid : 0xAAAAAAAA
- allowed_priority : 0xAAAA
- allowed_sched_priority : 0xAA
- - #4
+ allowed_atype: 0x2A
+ allowed_qos: 0xAAAA
+ allowed_orderid: 0xAAAAAAAA
+ allowed_priority: 0xAAAA
+ allowed_sched_priority: 0xAA
+ - # 4
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #5
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 5
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #6
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 6
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #7
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 7
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #8
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 8
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #9
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 9
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #10
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 10
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #11
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 11
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #12
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 12
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #13
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 13
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #14
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 14
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #15
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 15
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #16
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 16
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #17
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 17
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #18
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 18
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #19
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 19
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #20
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 20
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #21
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 21
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #22
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 22
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #23
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 23
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #24
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 24
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #25
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 25
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #26
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 26
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #27
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 27
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #28
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 28
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #29
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 29
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #30
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 30
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #31
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 31
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
- - #32
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
+ - # 32
host_id: 0
- allowed_atype : 0
- allowed_qos : 0
- allowed_orderid : 0
- allowed_priority : 0
- allowed_sched_priority : 0
+ allowed_atype: 0
+ allowed_qos: 0
+ allowed_orderid: 0
+ allowed_priority: 0
+ allowed_sched_priority: 0
resasg:
subhdr:
magic: 0x7B25
- size : 8
+ size: 8
resasg_entries_size: 960
- reserved : 0
+ reserved: 0
resasg_entries:
-
- start_resource: 0
- num_resource: 16
- type: 64
- host_id: 12
- reserved: 0
-
+ start_resource: 0
+ num_resource: 16
+ type: 64
+ host_id: 12
+ reserved: 0
-
- start_resource: 16
- num_resource: 4
- type: 64
- host_id: 35
- reserved: 0
-
+ start_resource: 16
+ num_resource: 4
+ type: 64
+ host_id: 35
+ reserved: 0
-
- start_resource: 16
- num_resource: 4
- type: 64
- host_id: 36
- reserved: 0
-
+ start_resource: 16
+ num_resource: 4
+ type: 64
+ host_id: 36
+ reserved: 0
-
- start_resource: 20
- num_resource: 22
- type: 64
- host_id: 30
- reserved: 0
-
+ start_resource: 20
+ num_resource: 22
+ type: 64
+ host_id: 30
+ reserved: 0
-
- start_resource: 0
- num_resource: 16
- type: 192
- host_id: 12
- reserved: 0
-
+ start_resource: 0
+ num_resource: 16
+ type: 192
+ host_id: 12
+ reserved: 0
-
- start_resource: 34
- num_resource: 2
- type: 192
- host_id: 30
- reserved: 0
-
+ start_resource: 34
+ num_resource: 2
+ type: 192
+ host_id: 30
+ reserved: 0
-
- start_resource: 0
- num_resource: 4
- type: 320
- host_id: 12
- reserved: 0
-
+ start_resource: 0
+ num_resource: 4
+ type: 320
+ host_id: 12
+ reserved: 0
-
- start_resource: 4
- num_resource: 4
- type: 320
- host_id: 30
- reserved: 0
-
+ start_resource: 4
+ num_resource: 4
+ type: 320
+ host_id: 30
+ reserved: 0
-
- start_resource: 0
- num_resource: 26
- type: 384
- host_id: 128
- reserved: 0
-
+ start_resource: 0
+ num_resource: 26
+ type: 384
+ host_id: 128
+ reserved: 0
-
- start_resource: 50176
- num_resource: 164
- type: 1666
- host_id: 128
- reserved: 0
-
+ start_resource: 50176
+ num_resource: 164
+ type: 1666
+ host_id: 128
+ reserved: 0
-
- start_resource: 0
- num_resource: 1
- type: 1667
- host_id: 128
- reserved: 0
-
+ start_resource: 0
+ num_resource: 1
+ type: 1667
+ host_id: 128
+ reserved: 0
-
- start_resource: 0
- num_resource: 18
- type: 1677
- host_id: 12
- reserved: 0
-
+ start_resource: 0
+ num_resource: 18
+ type: 1677
+ host_id: 12
+ reserved: 0
-
- start_resource: 18
- num_resource: 6
- type: 1677
- host_id: 35
- reserved: 0
-
+ start_resource: 18
+ num_resource: 6
+ type: 1677
+ host_id: 35
+ reserved: 0
-
- start_resource: 18
- num_resource: 6
- type: 1677
- host_id: 36
- reserved: 0
-
+ start_resource: 18
+ num_resource: 6
+ type: 1677
+ host_id: 36
+ reserved: 0
-
- start_resource: 24
- num_resource: 2
- type: 1677
- host_id: 30
- reserved: 0
-
+ start_resource: 24
+ num_resource: 2
+ type: 1677
+ host_id: 30
+ reserved: 0
-
- start_resource: 26
- num_resource: 6
- type: 1677
- host_id: 128
- reserved: 0
-
+ start_resource: 26
+ num_resource: 6
+ type: 1677
+ host_id: 128
+ reserved: 0
-
- start_resource: 54
- num_resource: 18
- type: 1678
- host_id: 12
- reserved: 0
-
+ start_resource: 54
+ num_resource: 18
+ type: 1678
+ host_id: 12
+ reserved: 0
-
- start_resource: 72
- num_resource: 6
- type: 1678
- host_id: 35
- reserved: 0
-
+ start_resource: 72
+ num_resource: 6
+ type: 1678
+ host_id: 35
+ reserved: 0
-
- start_resource: 72
- num_resource: 6
- type: 1678
- host_id: 36
- reserved: 0
-
+ start_resource: 72
+ num_resource: 6
+ type: 1678
+ host_id: 36
+ reserved: 0
-
- start_resource: 78
- num_resource: 2
- type: 1678
- host_id: 30
- reserved: 0
-
+ start_resource: 78
+ num_resource: 2
+ type: 1678
+ host_id: 30
+ reserved: 0
-
- start_resource: 80
- num_resource: 2
- type: 1678
- host_id: 128
- reserved: 0
-
+ start_resource: 80
+ num_resource: 2
+ type: 1678
+ host_id: 128
+ reserved: 0
-
- start_resource: 32
- num_resource: 12
- type: 1679
- host_id: 12
- reserved: 0
-
+ start_resource: 32
+ num_resource: 12
+ type: 1679
+ host_id: 12
+ reserved: 0
-
- start_resource: 44
- num_resource: 6
- type: 1679
- host_id: 35
- reserved: 0
-
+ start_resource: 44
+ num_resource: 6
+ type: 1679
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diff --git a/board/toradex/verdin-am62/sec-cfg.yaml b/board/toradex/verdin-am62/sec-cfg.yaml
index 07081ce..088b2db 100644
--- a/board/toradex/verdin-am62/sec-cfg.yaml
+++ b/board/toradex/verdin-am62/sec-cfg.yaml
@@ -8,138 +8,138 @@
sec-cfg:
rev:
- boardcfg_abi_maj : 0x0
- boardcfg_abi_min : 0x1
+ boardcfg_abi_maj: 0x0
+ boardcfg_abi_min: 0x1
processor_acl_list:
subhdr:
magic: 0xF1EA
size: 164
proc_acl_entries:
- - #1
+ - # 1
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #2
+ - # 2
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #3
+ - # 3
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #4
+ - # 4
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #5
+ - # 5
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #6
+ - # 6
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #7
+ - # 7
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #8
+ - # 8
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #9
+ - # 9
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #10
+ - # 10
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #11
+ - # 11
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #12
+ - # 12
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #13
+ - # 13
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #14
+ - # 14
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #15
+ - # 15
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #16
+ - # 16
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #17
+ - # 17
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #18
+ - # 18
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #19
+ - # 19
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #20
+ - # 20
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #21
+ - # 21
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #22
+ - # 22
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #23
+ - # 23
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #24
+ - # 24
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #25
+ - # 25
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #26
+ - # 26
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #27
+ - # 27
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #28
+ - # 28
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #29
+ - # 29
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #30
+ - # 30
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #31
+ - # 31
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
- - #32
+ - # 32
processor_id: 0
proc_access_master: 0
proc_access_secondary: [0, 0, 0]
@@ -148,202 +148,202 @@
magic: 0x8D27
size: 68
host_hierarchy_entries:
- - #1
+ - # 1
host_id: 0
supervisor_host_id: 0
- - #2
+ - # 2
host_id: 0
supervisor_host_id: 0
- - #3
+ - # 3
host_id: 0
supervisor_host_id: 0
- - #4
+ - # 4
host_id: 0
supervisor_host_id: 0
- - #5
+ - # 5
host_id: 0
supervisor_host_id: 0
- - #6
+ - # 6
host_id: 0
supervisor_host_id: 0
- - #7
+ - # 7
host_id: 0
supervisor_host_id: 0
- - #8
+ - # 8
host_id: 0
supervisor_host_id: 0
- - #9
+ - # 9
host_id: 0
supervisor_host_id: 0
- - #10
+ - # 10
host_id: 0
supervisor_host_id: 0
- - #11
+ - # 11
host_id: 0
supervisor_host_id: 0
- - #12
+ - # 12
host_id: 0
supervisor_host_id: 0
- - #13
+ - # 13
host_id: 0
supervisor_host_id: 0
- - #14
+ - # 14
host_id: 0
supervisor_host_id: 0
- - #15
+ - # 15
host_id: 0
supervisor_host_id: 0
- - #16
+ - # 16
host_id: 0
supervisor_host_id: 0
- - #17
+ - # 17
host_id: 0
supervisor_host_id: 0
- - #18
+ - # 18
host_id: 0
supervisor_host_id: 0
- - #19
+ - # 19
host_id: 0
supervisor_host_id: 0
- - #20
+ - # 20
host_id: 0
supervisor_host_id: 0
- - #21
+ - # 21
host_id: 0
supervisor_host_id: 0
- - #22
+ - # 22
host_id: 0
supervisor_host_id: 0
- - #23
+ - # 23
host_id: 0
supervisor_host_id: 0
- - #24
+ - # 24
host_id: 0
supervisor_host_id: 0
- - #25
+ - # 25
host_id: 0
supervisor_host_id: 0
- - #26
+ - # 26
host_id: 0
supervisor_host_id: 0
- - #27
+ - # 27
host_id: 0
supervisor_host_id: 0
- - #28
+ - # 28
host_id: 0
supervisor_host_id: 0
- - #29
+ - # 29
host_id: 0
supervisor_host_id: 0
- - #30
+ - # 30
host_id: 0
supervisor_host_id: 0
- - #31
+ - # 31
host_id: 0
supervisor_host_id: 0
- - #32
+ - # 32
host_id: 0
supervisor_host_id: 0
otp_config:
subhdr:
magic: 0x4081
size: 69
- write_host_id : 0
+ write_host_id: 0
otp_entry:
- - #1
+ - # 1
host_id: 0
host_perms: 0
- - #2
+ - # 2
host_id: 0
host_perms: 0
- - #3
+ - # 3
host_id: 0
host_perms: 0
- - #4
+ - # 4
host_id: 0
host_perms: 0
- - #5
+ - # 5
host_id: 0
host_perms: 0
- - #6
+ - # 6
host_id: 0
host_perms: 0
- - #7
+ - # 7
host_id: 0
host_perms: 0
- - #8
+ - # 8
host_id: 0
host_perms: 0
- - #9
+ - # 9
host_id: 0
host_perms: 0
- - #10
+ - # 10
host_id: 0
host_perms: 0
- - #11
+ - # 11
host_id: 0
host_perms: 0
- - #12
+ - # 12
host_id: 0
host_perms: 0
- - #13
+ - # 13
host_id: 0
host_perms: 0
- - #14
+ - # 14
host_id: 0
host_perms: 0
- - #15
+ - # 15
host_id: 0
host_perms: 0
- - #16
+ - # 16
host_id: 0
host_perms: 0
- - #17
+ - # 17
host_id: 0
host_perms: 0
- - #18
+ - # 18
host_id: 0
host_perms: 0
- - #19
+ - # 19
host_id: 0
host_perms: 0
- - #20
+ - # 20
host_id: 0
host_perms: 0
- - #21
+ - # 21
host_id: 0
host_perms: 0
- - #22
+ - # 22
host_id: 0
host_perms: 0
- - #23
+ - # 23
host_id: 0
host_perms: 0
- - #24
+ - # 24
host_id: 0
host_perms: 0
- - #25
+ - # 25
host_id: 0
host_perms: 0
- - #26
+ - # 26
host_id: 0
host_perms: 0
- - #27
+ - # 27
host_id: 0
host_perms: 0
- - #28
+ - # 28
host_id: 0
host_perms: 0
- - #29
+ - # 29
host_id: 0
host_perms: 0
- - #30
+ - # 30
host_id: 0
host_perms: 0
- - #31
+ - # 31
host_id: 0
host_perms: 0
- - #32
+ - # 32
host_id: 0
host_perms: 0
dkek_config:
@@ -351,12 +351,12 @@
magic: 0x5170
size: 12
allowed_hosts: [128, 0, 0, 0]
- allow_dkek_export_tisci : 0x5A
+ allow_dkek_export_tisci: 0x5A
rsvd: [0, 0, 0]
sa2ul_cfg:
subhdr:
magic: 0x23BE
- size : 0
+ size: 0
auth_resource_owner: 0
enable_saul_psil_global_config_writes: 0x5A
rsvd: [0, 0]
@@ -364,16 +364,16 @@
subhdr:
magic: 0x42AF
size: 16
- allow_jtag_unlock : 0x5A
- allow_wildcard_unlock : 0x5A
+ allow_jtag_unlock: 0x5A
+ allow_wildcard_unlock: 0x5A
allowed_debug_level_rsvd: 0
rsvd: 0
- min_cert_rev : 0x0
+ min_cert_rev: 0x0
jtag_unlock_hosts: [0, 0, 0, 0]
sec_handover_cfg:
subhdr:
magic: 0x608F
size: 10
- handover_msg_sender : 0
- handover_to_host_id : 0
+ handover_msg_sender: 0
+ handover_to_host_id: 0
rsvd: [0, 0, 0, 0]
diff --git a/board/toradex/verdin-am62/verdin-am62.c b/board/toradex/verdin-am62/verdin-am62.c
index d09dda5..395eb36 100644
--- a/board/toradex/verdin-am62/verdin-am62.c
+++ b/board/toradex/verdin-am62/verdin-am62.c
@@ -6,6 +6,7 @@
*
*/
+#include <config.h>
#include <asm/arch/hardware.h>
#include <asm/io.h>
#include <dm/uclass.h>
@@ -13,10 +14,13 @@
#include <fdt_support.h>
#include <init.h>
#include <k3-ddrss.h>
+#include <power/regulator.h>
#include <spl.h>
#include "../common/tdx-cfg-block.h"
+#define VDD_CORE_REG "buck1"
+
DECLARE_GLOBAL_DATA_PTR;
int board_init(void)
@@ -49,9 +53,37 @@
}
#endif
+static u32 get_vdd_core_nominal(void)
+{
+ int core_uvolt;
+
+ switch (k3_get_speed_grade()) {
+ case 'G':
+ case 'K':
+ case 'S':
+ core_uvolt = 750000;
+ break;
+ case 'T':
+ default:
+ core_uvolt = 850000;
+ break;
+ }
+ return core_uvolt;
+}
+
#if IS_ENABLED(CONFIG_OF_LIBFDT) && IS_ENABLED(CONFIG_OF_BOARD_SETUP)
int ft_board_setup(void *blob, struct bd_info *bd)
{
+ int core_uvolt;
+
+ core_uvolt = get_vdd_core_nominal();
+ if (core_uvolt != 850000) {
+ do_fixup_by_path_u32(blob, "/bus@f0000/i2c@20000000/pmic@30/regulators/buck1",
+ "regulator-max-microvolt", core_uvolt, 0);
+ do_fixup_by_path_u32(blob, "/bus@f0000/i2c@20000000/pmic@30/regulators/buck1",
+ "regulator-min-microvolt", core_uvolt, 0);
+ }
+
return ft_common_board_setup(blob, bd);
}
#endif
@@ -86,6 +118,22 @@
int board_late_init(void)
{
+ int ret;
+ int core_uvolt;
+ struct udevice *dev = NULL;
+
+ core_uvolt = get_vdd_core_nominal();
+ if (core_uvolt != 850000) {
+ /* Set CPU core voltage to 0.75V for slower speed grades */
+ ret = regulator_get_by_devname(VDD_CORE_REG, &dev);
+ if (ret)
+ pr_err("VDD CORE Regulator get error: %d\n", ret);
+
+ ret = regulator_set_value_force(dev, core_uvolt);
+ if (ret)
+ pr_err("VDD CORE Regulator value setting error: %d\n", ret);
+ }
+
select_dt_from_module_version();
return 0;
@@ -101,12 +149,13 @@
{
u32 val;
- /* Set USB0 PHY core voltage to 0.85V */
+ /* Clear USB0_PHY_CTRL_CORE_VOLTAGE */
+ /* TI recommends to clear the bit independent of VDDA_CORE_USB */
val = readl(CTRLMMR_USB0_PHY_CTRL);
val &= ~(CORE_VOLTAGE);
writel(val, CTRLMMR_USB0_PHY_CTRL);
- /* Set USB1 PHY core voltage to 0.85V */
+ /* Clear USB1_PHY_CTRL_CORE_VOLTAGE */
val = readl(CTRLMMR_USB1_PHY_CTRL);
val &= ~(CORE_VOLTAGE);
writel(val, CTRLMMR_USB1_PHY_CTRL);
diff --git a/board/tq/tqma6/tqma6_bb.h b/board/tq/tqma6/tqma6_bb.h
index ca81bdf..a2f871a 100644
--- a/board/tq/tqma6/tqma6_bb.h
+++ b/board/tq/tqma6/tqma6_bb.h
@@ -7,8 +7,6 @@
#ifndef __TQMA6_BB__
#define __TQMA6_BB__
-#include <common.h>
-
int tqma6_bb_board_mmc_getwp(struct mmc *mmc);
int tqma6_bb_board_mmc_getcd(struct mmc *mmc);
int tqma6_bb_board_mmc_init(struct bd_info *bis);
diff --git a/board/tq/tqma6/tqma6q.cfg b/board/tq/tqma6/tqma6q.cfg
index a49489a..a345c4d 100644
--- a/board/tq/tqma6/tqma6q.cfg
+++ b/board/tq/tqma6/tqma6q.cfg
@@ -36,7 +36,7 @@
DATA 4, MX6_IOM_DRAM_CAS, 0x00008030
DATA 4, MX6_IOM_DRAM_RAS, 0x00008030
DATA 4, MX6_IOM_GRP_ADDDS, 0x00000030
-DATA 4, MX6_IOM_DRAM_RESET, 0x000C3030
+DATA 4, MX6_IOM_DRAM_RESET, 0x00003030
DATA 4, MX6_IOM_DRAM_SDCKE0, 0x00003000
DATA 4, MX6_IOM_DRAM_SDCKE1, 0x00000000
DATA 4, MX6_IOM_DRAM_SDBA2, 0x00000000
diff --git a/board/turing/turing-rk1-rk3588/Kconfig b/board/turing/turing-rk1-rk3588/Kconfig
new file mode 100644
index 0000000..4c6cd6a
--- /dev/null
+++ b/board/turing/turing-rk1-rk3588/Kconfig
@@ -0,0 +1,15 @@
+if TARGET_TURINGRK1_RK3588
+
+config SYS_BOARD
+ default "turing-rk1-rk3588"
+
+config SYS_VENDOR
+ default "turing"
+
+config SYS_CONFIG_NAME
+ default "turing-rk1-rk3588"
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+ def_bool y
+
+endif
diff --git a/board/turing/turing-rk1-rk3588/MAINTAINERS b/board/turing/turing-rk1-rk3588/MAINTAINERS
new file mode 100644
index 0000000..4f31373
--- /dev/null
+++ b/board/turing/turing-rk1-rk3588/MAINTAINERS
@@ -0,0 +1,9 @@
+TURINGRK1-RK3588
+M: Joshua Riek <jjriek@verizon.net>
+S: Maintained
+F: board/turing/turing-rk1-rk3588
+F: include/configs/turing-rk1-rk3588.h
+F: configs/turing-rk1-rk3588_defconfig
+F: arch/arm/dts/rk3588-turing-rk1.dts
+F: arch/arm/dts/rk3588-turing-rk1.dtsi
+F: arch/arm/dts/rk3588-turing-rk1-u-boot.dtsi
diff --git a/board/turing/turing-rk1-rk3588/Makefile b/board/turing/turing-rk1-rk3588/Makefile
new file mode 100644
index 0000000..a979d80
--- /dev/null
+++ b/board/turing/turing-rk1-rk3588/Makefile
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (c) 2023 Rockchip Electronics Co,. Ltd.
+#
+
+obj-y += turing-rk1-rk3588.o
diff --git a/board/turing/turing-rk1-rk3588/turing-rk1-rk3588.c b/board/turing/turing-rk1-rk3588/turing-rk1-rk3588.c
new file mode 100644
index 0000000..e2338a2
--- /dev/null
+++ b/board/turing/turing-rk1-rk3588/turing-rk1-rk3588.c
@@ -0,0 +1,39 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2023 Rockchip Electronics Co,. Ltd.
+ */
+
+#include <fdtdec.h>
+#include <fdt_support.h>
+
+#ifdef CONFIG_OF_BOARD_SETUP
+int turing_rk1_add_reserved_memory_fdt_nodes(void *new_blob)
+{
+ struct fdt_memory gap1 = {
+ .start = 0x3fc000000,
+ .end = 0x3fc4fffff,
+ };
+ struct fdt_memory gap2 = {
+ .start = 0x3fff00000,
+ .end = 0x3ffffffff,
+ };
+ unsigned long flags = FDTDEC_RESERVED_MEMORY_NO_MAP;
+ unsigned int ret;
+
+ /*
+ * Inject the reserved-memory nodes into the DTS
+ */
+ ret = fdtdec_add_reserved_memory(new_blob, "gap1", &gap1, NULL, 0,
+ NULL, flags);
+ if (ret)
+ return ret;
+
+ return fdtdec_add_reserved_memory(new_blob, "gap2", &gap2, NULL, 0,
+ NULL, flags);
+}
+
+int ft_board_setup(void *blob, struct bd_info *bd)
+{
+ return turing_rk1_add_reserved_memory_fdt_nodes(blob);
+}
+#endif
diff --git a/board/udoo/neo/neo.c b/board/udoo/neo/neo.c
index 730e266..d99d93b 100644
--- a/board/udoo/neo/neo.c
+++ b/board/udoo/neo/neo.c
@@ -212,7 +212,7 @@
}
/* Override the default implementation, DT model is not accurate */
-int show_board_info(void)
+int checkboard(void)
{
int *board_type = (int *)OCRAM_START;
diff --git a/board/variscite/common/eth.c b/board/variscite/common/eth.c
new file mode 100644
index 0000000..a794533
--- /dev/null
+++ b/board/variscite/common/eth.c
@@ -0,0 +1,58 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2023 Variscite Ltd.
+ */
+#include <net.h>
+#include <miiphy.h>
+#include <env.h>
+#include "../common/imx9_eeprom.h"
+
+#define CHAR_BIT 8
+
+static u64 mac2int(const u8 hwaddr[])
+{
+ u8 i;
+ u64 ret = 0;
+ const u8 *p = hwaddr;
+
+ for (i = 6; i > 0; i--)
+ ret |= (u64)*p++ << (CHAR_BIT * (i - 1));
+
+ return ret;
+}
+
+static void int2mac(const u64 mac, u8 *hwaddr)
+{
+ u8 i;
+ u8 *p = hwaddr;
+
+ for (i = 6; i > 0; i--)
+ *p++ = mac >> (CHAR_BIT * (i - 1));
+}
+
+int var_setup_mac(struct var_eeprom *eeprom)
+{
+ int ret;
+ unsigned char enetaddr[6];
+ u64 addr;
+ unsigned char enet1addr[6];
+
+ ret = eth_env_get_enetaddr("ethaddr", enetaddr);
+ if (ret)
+ return 0;
+
+ ret = var_eeprom_get_mac(eeprom, enetaddr);
+ if (ret)
+ return ret;
+
+ if (!is_valid_ethaddr(enetaddr))
+ return -EINVAL;
+
+ eth_env_set_enetaddr("ethaddr", enetaddr);
+
+ addr = mac2int(enetaddr);
+ int2mac(addr + 1, enet1addr);
+ eth_env_set_enetaddr("eth1addr", enet1addr);
+
+ return 0;
+}
diff --git a/board/variscite/common/eth.h b/board/variscite/common/eth.h
new file mode 100644
index 0000000..a335c08
--- /dev/null
+++ b/board/variscite/common/eth.h
@@ -0,0 +1,12 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2023 Variscite Ltd.
+ *
+ */
+
+#ifndef _MX9_ETH_H_
+#define _MX9_ETH_H_
+
+int var_setup_mac(struct var_eeprom *eeprom);
+
+#endif /* _MX9_ETH_H_ */
diff --git a/board/variscite/common/imx9_eeprom.c b/board/variscite/common/imx9_eeprom.c
new file mode 100644
index 0000000..32551af
--- /dev/null
+++ b/board/variscite/common/imx9_eeprom.c
@@ -0,0 +1,190 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2023 Variscite Ltd.
+ *
+ */
+#include <command.h>
+#include <dm.h>
+#include <i2c.h>
+#include <asm/io.h>
+#include <cpu_func.h>
+#include <u-boot/crc.h>
+#include <asm/arch-imx9/ddr.h>
+
+#include "imx9_eeprom.h"
+
+static int var_eeprom_get_dev(struct udevice **devp)
+{
+ int ret;
+ struct udevice *bus;
+
+ ret = uclass_get_device_by_name(UCLASS_I2C, VAR_SOM_EEPROM_I2C_NAME, &bus);
+ if (ret) {
+ printf("%s: No EEPROM I2C bus '%s'\n", __func__,
+ VAR_SOM_EEPROM_I2C_NAME);
+ return ret;
+ }
+
+ ret = dm_i2c_probe(bus, VAR_SOM_EEPROM_I2C_ADDR, 0, devp);
+ if (ret) {
+ printf("%s: I2C EEPROM probe failed\n", __func__);
+ return ret;
+ }
+
+ i2c_set_chip_offset_len(*devp, 1);
+ i2c_set_chip_addr_offset_mask(*devp, 1);
+
+ return 0;
+}
+
+int var_eeprom_read_header(struct var_eeprom *e)
+{
+ int ret;
+ struct udevice *dev;
+
+ ret = var_eeprom_get_dev(&dev);
+ if (ret) {
+ printf("%s: Failed to detect I2C EEPROM\n", __func__);
+ return ret;
+ }
+
+ /* Read EEPROM header to memory */
+ ret = dm_i2c_read(dev, 0, (void *)e, sizeof(*e));
+ if (ret) {
+ printf("%s: EEPROM read failed, ret=%d\n", __func__, ret);
+ return ret;
+ }
+
+ return 0;
+}
+
+int var_eeprom_get_mac(struct var_eeprom *ep, u8 *mac)
+{
+ flush_dcache_all();
+ if (!var_eeprom_is_valid(ep))
+ return -1;
+
+ memcpy(mac, ep->mac, sizeof(ep->mac));
+
+ return 0;
+}
+
+int var_eeprom_get_dram_size(struct var_eeprom *ep, phys_size_t *size)
+{
+ /* No data in EEPROM - return default DRAM size */
+ if (!var_eeprom_is_valid(ep)) {
+ *size = DEFAULT_SDRAM_SIZE;
+ return 0;
+ }
+
+ *size = (ep->dramsize * 128UL) << 20;
+ return 0;
+}
+
+void var_eeprom_print_prod_info(struct var_eeprom *ep)
+{
+ if (IS_ENABLED(CONFIG_SPL_BUILD))
+ return;
+
+ flush_dcache_all();
+
+ if (!var_eeprom_is_valid(ep))
+ return;
+
+ if (IS_ENABLED(CONFIG_TARGET_IMX93_VAR_SOM))
+ printf("\nPart number: VSM-MX93-%.*s\n",
+ (int)sizeof(ep->partnum), ep->partnum);
+
+ printf("Assembly: AS%.*s\n", (int)sizeof(ep->assembly), (char *)ep->assembly);
+
+ printf("Production date: %.*s %.*s %.*s\n",
+ 4, /* YYYY */
+ (char *)ep->date,
+ 3, /* MMM */
+ ((char *)ep->date) + 4,
+ 2, /* DD */
+ ((char *)ep->date) + 4 + 3);
+
+ printf("Serial Number: %02x:%02x:%02x:%02x:%02x:%02x\n",
+ ep->mac[0], ep->mac[1], ep->mac[2], ep->mac[3], ep->mac[4], ep->mac[5]);
+
+ debug("EEPROM version: 0x%x\n", ep->version);
+ debug("SOM features: 0x%x\n", ep->features);
+ printf("SOM revision: 0x%x\n", ep->somrev);
+ printf("DRAM PN: VIC-%04d\n", ep->ddr_vic);
+ debug("DRAM size: %d GiB\n\n", (ep->dramsize * 128) / 1024);
+}
+
+int var_carrier_eeprom_read(const char *bus_name, int addr, struct var_carrier_eeprom *ep)
+{
+ int ret;
+ struct udevice *bus;
+ struct udevice *dev;
+
+ ret = uclass_get_device_by_name(UCLASS_I2C, bus_name, &bus);
+ if (ret) {
+ printf("%s: No bus '%s'\n", __func__, bus_name);
+ return ret;
+ }
+
+ ret = dm_i2c_probe(bus, addr, 0, &dev);
+ if (ret) {
+ printf("%s: Carrier EEPROM I2C probe failed\n", __func__);
+ return ret;
+ }
+
+ /* Read EEPROM to memory */
+ ret = dm_i2c_read(dev, 0, (void *)ep, sizeof(*ep));
+ if (ret) {
+ printf("%s: Carrier EEPROM read failed, ret=%d\n", __func__, ret);
+ return ret;
+ }
+
+ return 0;
+}
+
+int var_carrier_eeprom_is_valid(struct var_carrier_eeprom *ep)
+{
+ u32 crc, crc_offset = offsetof(struct var_carrier_eeprom, crc);
+
+ if (htons(ep->magic) != VAR_CARRIER_EEPROM_MAGIC) {
+ printf("Invalid carrier EEPROM magic 0x%x, expected 0x%x\n",
+ htons(ep->magic), VAR_CARRIER_EEPROM_MAGIC);
+ return 0;
+ }
+
+ if (ep->struct_ver < 1) {
+ printf("Invalid carrier EEPROM version 0x%x\n", ep->struct_ver);
+ return 0;
+ }
+
+ if (ep->struct_ver == 1)
+ return 1;
+
+ /* Only EEPROM structure above version 1 has CRC field */
+ crc = crc32(0, (void *)ep, crc_offset);
+
+ if (crc != ep->crc) {
+ printf("Carrier EEPROM CRC mismatch (%08x != %08x)\n",
+ crc, be32_to_cpu(ep->crc));
+ return 0;
+ }
+
+ return 1;
+}
+
+/*
+ * Returns carrier board revision string via 'rev' argument. For legacy
+ * carrier board revisions the "legacy" string is returned. For new carrier
+ * board revisions the actual carrier revision is returned. Symphony-Board
+ * 1.4 and below are legacy, 1.4a and above are new. DT8MCustomBoard 1.4 and
+ * below are legacy, 2.0 and above are new.
+ *
+ */
+void var_carrier_eeprom_get_revision(struct var_carrier_eeprom *ep, char *rev, size_t size)
+{
+ if (var_carrier_eeprom_is_valid(ep))
+ strlcpy(rev, (const char *)ep->carrier_rev, size);
+ else
+ strlcpy(rev, "legacy", size);
+}
diff --git a/board/variscite/common/imx9_eeprom.h b/board/variscite/common/imx9_eeprom.h
new file mode 100644
index 0000000..ed33368
--- /dev/null
+++ b/board/variscite/common/imx9_eeprom.h
@@ -0,0 +1,83 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2023 Variscite Ltd.
+ *
+ */
+
+#ifndef _MX9_VAR_EEPROM_H_
+#define _MX9_VAR_EEPROM_H_
+
+#ifdef CONFIG_ARCH_IMX9
+#include <asm/arch-imx9/ddr.h>
+#endif
+
+#define VAR_SOM_EEPROM_MAGIC 0x4D58 /* == HEX("MX") */
+
+#define VAR_SOM_EEPROM_I2C_ADDR 0x52
+
+/* Optional SOM features */
+#define VAR_EEPROM_F_WIFI BIT(0)
+#define VAR_EEPROM_F_ETH BIT(1)
+#define VAR_EEPROM_F_AUDIO BIT(2)
+
+/* SOM storage types */
+enum som_storage {
+ SOM_STORAGE_EMMC,
+ SOM_STORAGE_NAND,
+ SOM_STORAGE_UNDEFINED,
+};
+
+/* Number of DRAM adjustment tables */
+#define DRAM_TABLE_NUM 7
+
+struct __packed var_eeprom
+{
+ u16 magic; /* 00-0x00 - magic number */
+ u8 partnum[8]; /* 02-0x02 - part number */
+ u8 assembly[10]; /* 10-0x0a - assembly number */
+ u8 date[9]; /* 20-0x14 - build date */
+ u8 mac[6]; /* 29-0x1d - MAC address */
+ u8 somrev; /* 35-0x23 - SOM revision */
+ u8 version; /* 36-0x24 - EEPROM version */
+ u8 features; /* 37-0x25 - SOM features */
+ u8 dramsize; /* 38-0x26 - DRAM size */
+ u8 reserved[5]; /* 39 0x27 - reserved */
+ u32 ddr_crc32; /* 44-0x2c - CRC32 of DDR DATAi */
+ u16 ddr_vic; /* 48-0x30 - DDR VIC PN */
+ u16 off[DRAM_TABLE_NUM + 1]; /* 50-0x32 - DRAM table offsets */
+};
+
+#define VAR_EEPROM_DATA ((struct var_eeprom *)VAR_EEPROM_DRAM_START)
+
+#define VAR_CARRIER_EEPROM_MAGIC 0x5643 /* == HEX("VC") */
+
+#define CARRIER_REV_LEN 16
+struct __packed var_carrier_eeprom
+{
+ u16 magic; /* 00-0x00 - magic number */
+ u8 struct_ver; /* 01-0x01 - EEPROM structure version */
+ u8 carrier_rev[CARRIER_REV_LEN]; /* 02-0x02 - carrier board revision */
+ u32 crc; /* 10-0x0a - checksum */
+};
+
+static inline int var_eeprom_is_valid(struct var_eeprom *ep)
+{
+ if (htons(ep->magic) != VAR_SOM_EEPROM_MAGIC) {
+ debug("Invalid EEPROM magic 0x%x, expected 0x%x\n",
+ htons(ep->magic), VAR_SOM_EEPROM_MAGIC);
+ return 0;
+ }
+
+ return 1;
+}
+
+int var_eeprom_read_header(struct var_eeprom *e);
+int var_eeprom_get_dram_size(struct var_eeprom *e, phys_size_t *size);
+int var_eeprom_get_mac(struct var_eeprom *e, u8 *mac);
+void var_eeprom_print_prod_info(struct var_eeprom *e);
+
+int var_carrier_eeprom_read(const char *bus_name, int addr, struct var_carrier_eeprom *ep);
+int var_carrier_eeprom_is_valid(struct var_carrier_eeprom *ep);
+void var_carrier_eeprom_get_revision(struct var_carrier_eeprom *ep, char *rev, size_t size);
+
+#endif /* _MX9_VAR_EEPROM_H_ */
diff --git a/board/variscite/common/mmc.c b/board/variscite/common/mmc.c
new file mode 100644
index 0000000..0db416d
--- /dev/null
+++ b/board/variscite/common/mmc.c
@@ -0,0 +1,47 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2016 Freescale Semiconductor, Inc.
+ * Copyright 2018 NXP
+ *
+ */
+#include <command.h>
+#include <asm/arch/sys_proto.h>
+#include <linux/errno.h>
+#include <asm/io.h>
+#include <stdbool.h>
+#include <mmc.h>
+#include <vsprintf.h>
+#include <env.h>
+
+static int check_mmc_autodetect(void)
+{
+ char *autodetect_str = env_get("mmcautodetect");
+
+ if (autodetect_str && (strcmp(autodetect_str, "yes") == 0))
+ return 1;
+
+ return 0;
+}
+
+/* This should be defined for each board */
+__weak int mmc_map_to_kernel_blk(int dev_no)
+{
+ return dev_no;
+}
+
+void board_late_mmc_env_init(void)
+{
+ char cmd[32];
+ u32 dev_no = mmc_get_env_dev();
+
+ if (!check_mmc_autodetect())
+ return;
+
+ env_set_ulong("mmcdev", dev_no);
+
+ /* Set mmcblk env */
+ env_set_ulong("mmcblk", mmc_map_to_kernel_blk(dev_no));
+
+ sprintf(cmd, "mmc dev %d", dev_no);
+ run_command(cmd, 0);
+}
diff --git a/board/variscite/imx8mn_var_som/MAINTAINERS b/board/variscite/imx8mn_var_som/MAINTAINERS
index 068f807..a0fb154 100644
--- a/board/variscite/imx8mn_var_som/MAINTAINERS
+++ b/board/variscite/imx8mn_var_som/MAINTAINERS
@@ -1,5 +1,5 @@
ARM i.MX8MN VARISCITE VAR-SOM-MX8MN MODULE
-M: Ariel D'Alessandro <ariel.dalessandro@collabora.com>
+M: Hugo Villeneuve <hvilleneuve@dimonoff.com>
S: Maintained
F: arch/arm/dts/imx8mn-var-som*
F: board/variscite/imx8mn_var_som/
diff --git a/board/variscite/imx8mn_var_som/imx8mn_var_som.c b/board/variscite/imx8mn_var_som/imx8mn_var_som.c
index 61b9455..994fd4f 100644
--- a/board/variscite/imx8mn_var_som/imx8mn_var_som.c
+++ b/board/variscite/imx8mn_var_som/imx8mn_var_som.c
@@ -12,7 +12,6 @@
#include <fdt_support.h>
#include <i2c_eeprom.h>
#include <malloc.h>
-#include <asm/io.h>
#include <asm/global_data.h>
#include <dt-bindings/gpio/gpio.h>
#include <linux/libfdt.h>
@@ -46,20 +45,8 @@
u8 partnumber2[5]; /* Part number 2 */
} __packed;
-static void setup_fec(void)
-{
- struct iomuxc_gpr_base_regs *gpr =
- (struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR;
-
- /* Use 125M anatop REF_CLK1 for ENET1, not from external */
- clrsetbits_le32(&gpr->gpr[1], 0x2000, 0);
-}
-
int board_init(void)
{
- if (IS_ENABLED(CONFIG_FEC_MXC))
- setup_fec();
-
return 0;
}
diff --git a/board/variscite/imx93_var_som/Kconfig b/board/variscite/imx93_var_som/Kconfig
new file mode 100644
index 0000000..f02e48d
--- /dev/null
+++ b/board/variscite/imx93_var_som/Kconfig
@@ -0,0 +1,12 @@
+if TARGET_IMX93_VAR_SOM
+
+config SYS_BOARD
+ default "imx93_var_som"
+
+config SYS_VENDOR
+ default "variscite"
+
+config SYS_CONFIG_NAME
+ default "imx93_var_som"
+
+endif
diff --git a/board/variscite/imx93_var_som/MAINTAINERS b/board/variscite/imx93_var_som/MAINTAINERS
new file mode 100644
index 0000000..7ddaaac
--- /dev/null
+++ b/board/variscite/imx93_var_som/MAINTAINERS
@@ -0,0 +1,7 @@
+ARM i.MX93 VARISCITE VAR-SOM-MX93 MODULE
+M: Mathieu Othacehe <m.othacehe@gmail.com>
+S: Maintained
+F: arch/arm/dts/imx93-var-som*
+F: board/variscite/imx93_var_som/
+F: configs/imx93_var_som_defconfig
+F: include/configs/imx93_var_som.h
diff --git a/board/variscite/imx93_var_som/Makefile b/board/variscite/imx93_var_som/Makefile
new file mode 100644
index 0000000..b638839
--- /dev/null
+++ b/board/variscite/imx93_var_som/Makefile
@@ -0,0 +1,17 @@
+#
+# Copyright 2022 NXP
+# Copyright 2023 Variscite Ltd.
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += imx93_var_som.o
+obj-$(CONFIG_TARGET_IMX93_VAR_SOM) += ../common/imx9_eeprom.o
+
+ifdef CONFIG_SPL_BUILD
+obj-y += spl.o
+obj-$(CONFIG_TARGET_IMX93_VAR_SOM) += lpddr4x_timing.o
+else
+obj-y += ../common/eth.o
+obj-y += ../common/mmc.o
+endif
diff --git a/board/variscite/imx93_var_som/imx93_var_som.c b/board/variscite/imx93_var_som/imx93_var_som.c
new file mode 100644
index 0000000..b2b7d81
--- /dev/null
+++ b/board/variscite/imx93_var_som/imx93_var_som.c
@@ -0,0 +1,126 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2022 NXP
+ * Copyright 2023 Variscite Ltd.
+ */
+
+#include <env.h>
+#include <init.h>
+#include <miiphy.h>
+#include <netdev.h>
+#include <asm/global_data.h>
+#include <asm/arch-imx9/ccm_regs.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/arch-imx9/imx93_pins.h>
+#include <asm/arch/clock.h>
+#include <power/pmic.h>
+#include <dm/device.h>
+#include <dm/uclass.h>
+
+#include "../common/imx9_eeprom.h"
+#include "../common/eth.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define CARRIER_EEPROM_ADDR 0x54
+
+#define UART_PAD_CTRL (PAD_CTL_DSE(6) | PAD_CTL_FSEL2)
+#define WDOG_PAD_CTRL (PAD_CTL_DSE(6) | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE)
+
+static const iomux_v3_cfg_t uart_pads[] = {
+ MX93_PAD_UART1_RXD__LPUART1_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
+ MX93_PAD_UART1_TXD__LPUART1_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
+};
+
+int board_early_init_f(void)
+{
+ imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads));
+
+ init_uart_clk(LPUART1_CLK_ROOT);
+
+ return 0;
+}
+
+int board_phys_sdram_size(phys_size_t *size)
+{
+ struct var_eeprom *ep = VAR_EEPROM_DATA;
+
+ var_eeprom_get_dram_size(ep, size);
+ return 0;
+}
+
+int board_phy_config(struct phy_device *phydev)
+{
+ if (phydev->drv->config)
+ phydev->drv->config(phydev);
+
+ return 0;
+}
+
+static int setup_eqos(void)
+{
+ struct blk_ctrl_wakeupmix_regs *bctrl =
+ (struct blk_ctrl_wakeupmix_regs *)BLK_CTRL_WAKEUPMIX_BASE_ADDR;
+
+ /* set INTF as RGMII, enable RGMII TXC clock */
+ clrsetbits_le32(&bctrl->eqos_gpr,
+ BCTRL_GPR_ENET_QOS_INTF_MODE_MASK,
+ BCTRL_GPR_ENET_QOS_INTF_SEL_RGMII | BCTRL_GPR_ENET_QOS_CLK_GEN_EN);
+
+ return set_clk_eqos(ENET_125MHZ);
+}
+
+int board_init(void)
+{
+ set_clk_enet(ENET_125MHZ);
+
+ if (CONFIG_IS_ENABLED(DWC_ETH_QOS))
+ setup_eqos();
+
+ return 0;
+}
+
+#define SDRAM_SIZE_STR_LEN 5
+
+int board_late_init(void)
+{
+ int ret;
+ struct var_eeprom *ep = VAR_EEPROM_DATA;
+ char sdram_size_str[SDRAM_SIZE_STR_LEN];
+ struct var_carrier_eeprom carrier_eeprom;
+ char carrier_rev[CARRIER_REV_LEN] = {0};
+ char som_rev[CARRIER_REV_LEN] = {0};
+
+ var_setup_mac(ep);
+ var_eeprom_print_prod_info(ep);
+
+ /* SDRAM ENV */
+ snprintf(sdram_size_str, SDRAM_SIZE_STR_LEN, "%d",
+ (int)(gd->ram_size / 1024 / 1024));
+ env_set("sdram_size", sdram_size_str);
+
+ /* Carrier Board ENV */
+ ret = var_carrier_eeprom_read(VAR_CARRIER_EEPROM_I2C_NAME,
+ CARRIER_EEPROM_ADDR, &carrier_eeprom);
+ if (!ret) {
+ var_carrier_eeprom_get_revision(&carrier_eeprom, carrier_rev,
+ sizeof(carrier_rev));
+ env_set("carrier_rev", carrier_rev);
+ }
+
+ /* SoM Rev ENV */
+ snprintf(som_rev, CARRIER_REV_LEN, "som_rev1%d", ep->somrev);
+ env_set("som_rev", som_rev);
+
+ if (IS_ENABLED(CONFIG_ENV_IS_IN_MMC))
+ board_late_mmc_env_init();
+
+ env_set("sec_boot", "no");
+ if (IS_ENABLED(CONFIG_AHAB_BOOT))
+ env_set("sec_boot", "yes");
+
+ if (IS_ENABLED(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG))
+ env_set("board_name", "VAR-SOM-MX93");
+
+ return 0;
+}
diff --git a/board/variscite/imx93_var_som/imx93_var_som.env b/board/variscite/imx93_var_som/imx93_var_som.env
new file mode 100644
index 0000000..8340739
--- /dev/null
+++ b/board/variscite/imx93_var_som/imx93_var_som.env
@@ -0,0 +1,99 @@
+initrd_addr=0x83800000
+image=Image.gz
+img_addr=0x82000000
+console=ttyLP0,115200
+fdt_addr_r=0x83000000
+fdt_addr=0x83000000
+cntr_addr=0x98000000
+cntr_file=os_cntr_signed.bin
+boot_fit=no
+bootdir=/boot
+fdt_file=undefined
+bootm_size=0x10000000
+mmcdev=0
+mmcpart=1
+mmcautodetect=yes
+optargs=setenv bootargs ${bootargs} ${kernelargs};
+mmcroot=root=/dev/mmcblk0p1
+mmcargs=setenv bootargs ${jh_clk} console=${console} ${mmcroot} rootwait rw
+loadbootscript=load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${bootdir}/${script};
+bootscript=echo Running bootscript from mmc ...; source
+loadimage=load mmc ${mmcdev}:${mmcpart} ${img_addr} ${bootdir}/${image};
+ unzip ${img_addr} ${loadaddr}
+findfdt=if test $fdt_file = undefined; then
+ setenv fdt_file CONFIG_DEFAULT_FDT_FILE ;
+ fi;
+ echo fdt_file=${fdt_file};
+loadfdt=run findfdt;load mmc ${mmcdev}:${mmcpart} ${fdt_addr_r} ${bootdir}/${fdt_file}
+loadcntr=fatload mmc ${mmcdev}:${mmcpart} ${cntr_addr} ${cntr_file}
+auth_os=auth_cntr ${cntr_addr}
+boot_os=booti ${loadaddr} - ${fdt_addr_r};
+mmcboot=echo Booting from mmc ...;
+ run mmcargs;
+ run optargs;
+ if test ${sec_boot} = yes; then
+ if run auth_os; then
+ "run boot_os;
+ else
+ "echo ERR: failed to authenticate;
+ fi;
+ else
+ if test ${boot_fit} = yes || test ${boot_fit} = try; then
+ bootm ${loadaddr};
+ else
+ if run loadfdt; then
+ run boot_os;
+ else
+ echo WARN: Cannot load the DT;
+ fi;
+ fi;
+ fi;
+netargs=setenv bootargs ${jh_clk} console=${console}
+ root=/dev/nfs
+ ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp
+ etboot=echo Booting from net ...;
+ run netargs;
+ run optargs;
+ if test ${ip_dyn} = yes; then
+ setenv get_cmd dhcp;
+ else
+ setenv get_cmd tftp;
+ fi;
+ if test ${sec_boot} = yes; then
+ ${get_cmd} ${cntr_addr} ${cntr_file};
+ if run auth_os; then
+ "run boot_os;
+ else
+ "echo ERR: failed to authenticate;
+ fi;
+ else
+ ${get_cmd} ${img_addr} ${image}; unzip ${img_addr} ${loadaddr};
+ if test ${boot_fit} = yes || test ${boot_fit} = try; then
+ bootm ${loadaddr};
+ else
+ run findfdt;
+ if ${get_cmd} ${fdt_addr_r} ${fdt_file}; then
+ run boot_os;
+ else
+ echo WARN: Cannot load the DT;
+ fi;
+ fi;
+ fi;
+bsp_bootcmd=echo Running BSP bootcmd ...;
+ mmc dev ${mmcdev}; if mmc rescan; then
+ if run loadbootscript; then
+ run bootscript;
+ else
+ if test ${sec_boot} = yes; then
+ if run loadcntr; then
+ run mmcboot;
+ else run netboot;
+ fi;
+ else
+ if run loadimage; then
+ run mmcboot;
+ else run netboot;
+ fi;
+ fi;
+ fi;
+ fi;
diff --git a/board/variscite/imx93_var_som/lpddr4x_timing.c b/board/variscite/imx93_var_som/lpddr4x_timing.c
new file mode 100644
index 0000000..c30aa29
--- /dev/null
+++ b/board/variscite/imx93_var_som/lpddr4x_timing.c
@@ -0,0 +1,1488 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2023 NXP
+ *
+ * Code generated with DDR Tool.
+ */
+
+#include <linux/kernel.h>
+#include <asm/arch/ddr.h>
+
+static struct dram_cfg_param ddr_ddrc_cfg[] = {
+ /** Initialize DDRC registers **/
+ { 0x4e300110, 0x44100001 },
+ { 0x4e300000, 0x8000ff },
+ { 0x4e300008, 0x0 },
+ { 0x4e300080, 0x80000512 },
+ { 0x4e300084, 0x0 },
+ { 0x4e300100, 0x24ab321b },
+ { 0x4e300104, 0xa8ee001b },
+ { 0x4e300108, 0x2f2ee233 },
+ { 0x4e30010c, 0x5e18b },
+ { 0x4e300114, 0x1002 },
+ { 0x4e300124, 0x1c770000 },
+ { 0x4e300160, 0x5402 },
+ { 0x4e30016c, 0x35f00000 },
+ { 0x4e300170, 0x8b0b0608 },
+ { 0x4e300250, 0x28 },
+ { 0x4e300254, 0x0 },
+ { 0x4e30025c, 0x400 },
+ { 0x4e300260, 0x800 },
+ { 0x4e300300, 0x14281114 },
+ { 0x4e300304, 0x163110a },
+ { 0x4e300308, 0xa200e3c },
+ { 0x4e300f04, 0x80 },
+ { 0x4e300800, 0x43b30002 },
+ { 0x4e300804, 0x1f1f1f1f },
+ { 0x4e301000, 0x0 },
+
+};
+
+/* PHY Initialize Configuration */
+static struct dram_cfg_param ddr_ddrphy_cfg[] = {
+ { 0x100a0, 0x4 },
+ { 0x100a1, 0x5 },
+ { 0x100a2, 0x6 },
+ { 0x100a3, 0x7 },
+ { 0x100a4, 0x0 },
+ { 0x100a5, 0x1 },
+ { 0x100a6, 0x2 },
+ { 0x100a7, 0x3 },
+ { 0x110a0, 0x3 },
+ { 0x110a1, 0x2 },
+ { 0x110a2, 0x0 },
+ { 0x110a3, 0x1 },
+ { 0x110a4, 0x7 },
+ { 0x110a5, 0x6 },
+ { 0x110a6, 0x4 },
+ { 0x110a7, 0x5 },
+ { 0x1005f, 0x5ff },
+ { 0x1015f, 0x5ff },
+ { 0x1105f, 0x5ff },
+ { 0x1115f, 0x5ff },
+ { 0x55, 0x1ff },
+ { 0x1055, 0x1ff },
+ { 0x2055, 0x1ff },
+ { 0x200c5, 0x19 },
+ { 0x2002e, 0x2 },
+ { 0x90204, 0x0 },
+ { 0x20024, 0x1e3 },
+ { 0x2003a, 0x2 },
+ { 0x2007d, 0x212 },
+ { 0x2007c, 0x61 },
+ { 0x20056, 0x3 },
+ { 0x1004d, 0xe00 },
+ { 0x1014d, 0xe00 },
+ { 0x1104d, 0xe00 },
+ { 0x1114d, 0xe00 },
+ { 0x10049, 0xe00 },
+ { 0x10149, 0xe00 },
+ { 0x11049, 0xe00 },
+ { 0x11149, 0xe00 },
+ { 0x43, 0x60 },
+ { 0x1043, 0x60 },
+ { 0x2043, 0x60 },
+ { 0x20018, 0x1 },
+ { 0x20075, 0x4 },
+ { 0x20050, 0x0 },
+ { 0x2009b, 0x2 },
+ { 0x20008, 0x3a5 },
+ { 0x20088, 0x9 },
+ { 0x200b2, 0x10c },
+ { 0x10043, 0x5a1 },
+ { 0x10143, 0x5a1 },
+ { 0x11043, 0x5a1 },
+ { 0x11143, 0x5a1 },
+ { 0x200fa, 0x2 },
+ { 0x20019, 0x1 },
+ { 0x200f0, 0x0 },
+ { 0x200f1, 0x0 },
+ { 0x200f2, 0x4444 },
+ { 0x200f3, 0x8888 },
+ { 0x200f4, 0x5555 },
+ { 0x200f5, 0x0 },
+ { 0x200f6, 0x0 },
+ { 0x200f7, 0xf000 },
+ { 0x1004a, 0x500 },
+ { 0x1104a, 0x500 },
+ { 0x20025, 0x0 },
+ { 0x2002d, 0x0 },
+ { 0x2002c, 0x0 },
+
+};
+
+/* ddr phy trained csr */
+static struct dram_cfg_param ddr_ddrphy_trained_csr[] = {
+ { 0x200b2, 0x0 },
+ { 0x1200b2, 0x0 },
+ { 0x2200b2, 0x0 },
+ { 0x200cb, 0x0 },
+ { 0x10043, 0x0 },
+ { 0x110043, 0x0 },
+ { 0x210043, 0x0 },
+ { 0x10143, 0x0 },
+ { 0x110143, 0x0 },
+ { 0x210143, 0x0 },
+ { 0x11043, 0x0 },
+ { 0x111043, 0x0 },
+ { 0x211043, 0x0 },
+ { 0x11143, 0x0 },
+ { 0x111143, 0x0 },
+ { 0x211143, 0x0 },
+ { 0x12043, 0x0 },
+ { 0x112043, 0x0 },
+ { 0x212043, 0x0 },
+ { 0x12143, 0x0 },
+ { 0x112143, 0x0 },
+ { 0x212143, 0x0 },
+ { 0x13043, 0x0 },
+ { 0x113043, 0x0 },
+ { 0x213043, 0x0 },
+ { 0x13143, 0x0 },
+ { 0x113143, 0x0 },
+ { 0x213143, 0x0 },
+ { 0x80, 0x0 },
+ { 0x100080, 0x0 },
+ { 0x200080, 0x0 },
+ { 0x1080, 0x0 },
+ { 0x101080, 0x0 },
+ { 0x201080, 0x0 },
+ { 0x2080, 0x0 },
+ { 0x102080, 0x0 },
+ { 0x202080, 0x0 },
+ { 0x3080, 0x0 },
+ { 0x103080, 0x0 },
+ { 0x203080, 0x0 },
+ { 0x4080, 0x0 },
+ { 0x104080, 0x0 },
+ { 0x204080, 0x0 },
+ { 0x5080, 0x0 },
+ { 0x105080, 0x0 },
+ { 0x205080, 0x0 },
+ { 0x6080, 0x0 },
+ { 0x106080, 0x0 },
+ { 0x206080, 0x0 },
+ { 0x7080, 0x0 },
+ { 0x107080, 0x0 },
+ { 0x207080, 0x0 },
+ { 0x8080, 0x0 },
+ { 0x108080, 0x0 },
+ { 0x208080, 0x0 },
+ { 0x9080, 0x0 },
+ { 0x109080, 0x0 },
+ { 0x209080, 0x0 },
+ { 0x10080, 0x0 },
+ { 0x110080, 0x0 },
+ { 0x210080, 0x0 },
+ { 0x10180, 0x0 },
+ { 0x110180, 0x0 },
+ { 0x210180, 0x0 },
+ { 0x11080, 0x0 },
+ { 0x111080, 0x0 },
+ { 0x211080, 0x0 },
+ { 0x11180, 0x0 },
+ { 0x111180, 0x0 },
+ { 0x211180, 0x0 },
+ { 0x12080, 0x0 },
+ { 0x112080, 0x0 },
+ { 0x212080, 0x0 },
+ { 0x12180, 0x0 },
+ { 0x112180, 0x0 },
+ { 0x212180, 0x0 },
+ { 0x13080, 0x0 },
+ { 0x113080, 0x0 },
+ { 0x213080, 0x0 },
+ { 0x13180, 0x0 },
+ { 0x113180, 0x0 },
+ { 0x213180, 0x0 },
+ { 0x10081, 0x0 },
+ { 0x110081, 0x0 },
+ { 0x210081, 0x0 },
+ { 0x10181, 0x0 },
+ { 0x110181, 0x0 },
+ { 0x210181, 0x0 },
+ { 0x11081, 0x0 },
+ { 0x111081, 0x0 },
+ { 0x211081, 0x0 },
+ { 0x11181, 0x0 },
+ { 0x111181, 0x0 },
+ { 0x211181, 0x0 },
+ { 0x12081, 0x0 },
+ { 0x112081, 0x0 },
+ { 0x212081, 0x0 },
+ { 0x12181, 0x0 },
+ { 0x112181, 0x0 },
+ { 0x212181, 0x0 },
+ { 0x13081, 0x0 },
+ { 0x113081, 0x0 },
+ { 0x213081, 0x0 },
+ { 0x13181, 0x0 },
+ { 0x113181, 0x0 },
+ { 0x213181, 0x0 },
+ { 0x100d0, 0x0 },
+ { 0x1100d0, 0x0 },
+ { 0x2100d0, 0x0 },
+ { 0x101d0, 0x0 },
+ { 0x1101d0, 0x0 },
+ { 0x2101d0, 0x0 },
+ { 0x110d0, 0x0 },
+ { 0x1110d0, 0x0 },
+ { 0x2110d0, 0x0 },
+ { 0x111d0, 0x0 },
+ { 0x1111d0, 0x0 },
+ { 0x2111d0, 0x0 },
+ { 0x120d0, 0x0 },
+ { 0x1120d0, 0x0 },
+ { 0x2120d0, 0x0 },
+ { 0x121d0, 0x0 },
+ { 0x1121d0, 0x0 },
+ { 0x2121d0, 0x0 },
+ { 0x130d0, 0x0 },
+ { 0x1130d0, 0x0 },
+ { 0x2130d0, 0x0 },
+ { 0x131d0, 0x0 },
+ { 0x1131d0, 0x0 },
+ { 0x2131d0, 0x0 },
+ { 0x100d1, 0x0 },
+ { 0x1100d1, 0x0 },
+ { 0x2100d1, 0x0 },
+ { 0x101d1, 0x0 },
+ { 0x1101d1, 0x0 },
+ { 0x2101d1, 0x0 },
+ { 0x110d1, 0x0 },
+ { 0x1110d1, 0x0 },
+ { 0x2110d1, 0x0 },
+ { 0x111d1, 0x0 },
+ { 0x1111d1, 0x0 },
+ { 0x2111d1, 0x0 },
+ { 0x120d1, 0x0 },
+ { 0x1120d1, 0x0 },
+ { 0x2120d1, 0x0 },
+ { 0x121d1, 0x0 },
+ { 0x1121d1, 0x0 },
+ { 0x2121d1, 0x0 },
+ { 0x130d1, 0x0 },
+ { 0x1130d1, 0x0 },
+ { 0x2130d1, 0x0 },
+ { 0x131d1, 0x0 },
+ { 0x1131d1, 0x0 },
+ { 0x2131d1, 0x0 },
+ { 0x10068, 0x0 },
+ { 0x10168, 0x0 },
+ { 0x10268, 0x0 },
+ { 0x10368, 0x0 },
+ { 0x10468, 0x0 },
+ { 0x10568, 0x0 },
+ { 0x10668, 0x0 },
+ { 0x10768, 0x0 },
+ { 0x10868, 0x0 },
+ { 0x11068, 0x0 },
+ { 0x11168, 0x0 },
+ { 0x11268, 0x0 },
+ { 0x11368, 0x0 },
+ { 0x11468, 0x0 },
+ { 0x11568, 0x0 },
+ { 0x11668, 0x0 },
+ { 0x11768, 0x0 },
+ { 0x11868, 0x0 },
+ { 0x12068, 0x0 },
+ { 0x12168, 0x0 },
+ { 0x12268, 0x0 },
+ { 0x12368, 0x0 },
+ { 0x12468, 0x0 },
+ { 0x12568, 0x0 },
+ { 0x12668, 0x0 },
+ { 0x12768, 0x0 },
+ { 0x12868, 0x0 },
+ { 0x13068, 0x0 },
+ { 0x13168, 0x0 },
+ { 0x13268, 0x0 },
+ { 0x13368, 0x0 },
+ { 0x13468, 0x0 },
+ { 0x13568, 0x0 },
+ { 0x13668, 0x0 },
+ { 0x13768, 0x0 },
+ { 0x13868, 0x0 },
+ { 0x10069, 0x0 },
+ { 0x10169, 0x0 },
+ { 0x10269, 0x0 },
+ { 0x10369, 0x0 },
+ { 0x10469, 0x0 },
+ { 0x10569, 0x0 },
+ { 0x10669, 0x0 },
+ { 0x10769, 0x0 },
+ { 0x10869, 0x0 },
+ { 0x11069, 0x0 },
+ { 0x11169, 0x0 },
+ { 0x11269, 0x0 },
+ { 0x11369, 0x0 },
+ { 0x11469, 0x0 },
+ { 0x11569, 0x0 },
+ { 0x11669, 0x0 },
+ { 0x11769, 0x0 },
+ { 0x11869, 0x0 },
+ { 0x12069, 0x0 },
+ { 0x12169, 0x0 },
+ { 0x12269, 0x0 },
+ { 0x12369, 0x0 },
+ { 0x12469, 0x0 },
+ { 0x12569, 0x0 },
+ { 0x12669, 0x0 },
+ { 0x12769, 0x0 },
+ { 0x12869, 0x0 },
+ { 0x13069, 0x0 },
+ { 0x13169, 0x0 },
+ { 0x13269, 0x0 },
+ { 0x13369, 0x0 },
+ { 0x13469, 0x0 },
+ { 0x13569, 0x0 },
+ { 0x13669, 0x0 },
+ { 0x13769, 0x0 },
+ { 0x13869, 0x0 },
+ { 0x1008c, 0x0 },
+ { 0x11008c, 0x0 },
+ { 0x21008c, 0x0 },
+ { 0x1018c, 0x0 },
+ { 0x11018c, 0x0 },
+ { 0x21018c, 0x0 },
+ { 0x1108c, 0x0 },
+ { 0x11108c, 0x0 },
+ { 0x21108c, 0x0 },
+ { 0x1118c, 0x0 },
+ { 0x11118c, 0x0 },
+ { 0x21118c, 0x0 },
+ { 0x1208c, 0x0 },
+ { 0x11208c, 0x0 },
+ { 0x21208c, 0x0 },
+ { 0x1218c, 0x0 },
+ { 0x11218c, 0x0 },
+ { 0x21218c, 0x0 },
+ { 0x1308c, 0x0 },
+ { 0x11308c, 0x0 },
+ { 0x21308c, 0x0 },
+ { 0x1318c, 0x0 },
+ { 0x11318c, 0x0 },
+ { 0x21318c, 0x0 },
+ { 0x1008d, 0x0 },
+ { 0x11008d, 0x0 },
+ { 0x21008d, 0x0 },
+ { 0x1018d, 0x0 },
+ { 0x11018d, 0x0 },
+ { 0x21018d, 0x0 },
+ { 0x1108d, 0x0 },
+ { 0x11108d, 0x0 },
+ { 0x21108d, 0x0 },
+ { 0x1118d, 0x0 },
+ { 0x11118d, 0x0 },
+ { 0x21118d, 0x0 },
+ { 0x1208d, 0x0 },
+ { 0x11208d, 0x0 },
+ { 0x21208d, 0x0 },
+ { 0x1218d, 0x0 },
+ { 0x11218d, 0x0 },
+ { 0x21218d, 0x0 },
+ { 0x1308d, 0x0 },
+ { 0x11308d, 0x0 },
+ { 0x21308d, 0x0 },
+ { 0x1318d, 0x0 },
+ { 0x11318d, 0x0 },
+ { 0x21318d, 0x0 },
+ { 0x100c0, 0x0 },
+ { 0x1100c0, 0x0 },
+ { 0x2100c0, 0x0 },
+ { 0x101c0, 0x0 },
+ { 0x1101c0, 0x0 },
+ { 0x2101c0, 0x0 },
+ { 0x102c0, 0x0 },
+ { 0x1102c0, 0x0 },
+ { 0x2102c0, 0x0 },
+ { 0x103c0, 0x0 },
+ { 0x1103c0, 0x0 },
+ { 0x2103c0, 0x0 },
+ { 0x104c0, 0x0 },
+ { 0x1104c0, 0x0 },
+ { 0x2104c0, 0x0 },
+ { 0x105c0, 0x0 },
+ { 0x1105c0, 0x0 },
+ { 0x2105c0, 0x0 },
+ { 0x106c0, 0x0 },
+ { 0x1106c0, 0x0 },
+ { 0x2106c0, 0x0 },
+ { 0x107c0, 0x0 },
+ { 0x1107c0, 0x0 },
+ { 0x2107c0, 0x0 },
+ { 0x108c0, 0x0 },
+ { 0x1108c0, 0x0 },
+ { 0x2108c0, 0x0 },
+ { 0x110c0, 0x0 },
+ { 0x1110c0, 0x0 },
+ { 0x2110c0, 0x0 },
+ { 0x111c0, 0x0 },
+ { 0x1111c0, 0x0 },
+ { 0x2111c0, 0x0 },
+ { 0x112c0, 0x0 },
+ { 0x1112c0, 0x0 },
+ { 0x2112c0, 0x0 },
+ { 0x113c0, 0x0 },
+ { 0x1113c0, 0x0 },
+ { 0x2113c0, 0x0 },
+ { 0x114c0, 0x0 },
+ { 0x1114c0, 0x0 },
+ { 0x2114c0, 0x0 },
+ { 0x115c0, 0x0 },
+ { 0x1115c0, 0x0 },
+ { 0x2115c0, 0x0 },
+ { 0x116c0, 0x0 },
+ { 0x1116c0, 0x0 },
+ { 0x2116c0, 0x0 },
+ { 0x117c0, 0x0 },
+ { 0x1117c0, 0x0 },
+ { 0x2117c0, 0x0 },
+ { 0x118c0, 0x0 },
+ { 0x1118c0, 0x0 },
+ { 0x2118c0, 0x0 },
+ { 0x120c0, 0x0 },
+ { 0x1120c0, 0x0 },
+ { 0x2120c0, 0x0 },
+ { 0x121c0, 0x0 },
+ { 0x1121c0, 0x0 },
+ { 0x2121c0, 0x0 },
+ { 0x122c0, 0x0 },
+ { 0x1122c0, 0x0 },
+ { 0x2122c0, 0x0 },
+ { 0x123c0, 0x0 },
+ { 0x1123c0, 0x0 },
+ { 0x2123c0, 0x0 },
+ { 0x124c0, 0x0 },
+ { 0x1124c0, 0x0 },
+ { 0x2124c0, 0x0 },
+ { 0x125c0, 0x0 },
+ { 0x1125c0, 0x0 },
+ { 0x2125c0, 0x0 },
+ { 0x126c0, 0x0 },
+ { 0x1126c0, 0x0 },
+ { 0x2126c0, 0x0 },
+ { 0x127c0, 0x0 },
+ { 0x1127c0, 0x0 },
+ { 0x2127c0, 0x0 },
+ { 0x128c0, 0x0 },
+ { 0x1128c0, 0x0 },
+ { 0x2128c0, 0x0 },
+ { 0x130c0, 0x0 },
+ { 0x1130c0, 0x0 },
+ { 0x2130c0, 0x0 },
+ { 0x131c0, 0x0 },
+ { 0x1131c0, 0x0 },
+ { 0x2131c0, 0x0 },
+ { 0x132c0, 0x0 },
+ { 0x1132c0, 0x0 },
+ { 0x2132c0, 0x0 },
+ { 0x133c0, 0x0 },
+ { 0x1133c0, 0x0 },
+ { 0x2133c0, 0x0 },
+ { 0x134c0, 0x0 },
+ { 0x1134c0, 0x0 },
+ { 0x2134c0, 0x0 },
+ { 0x135c0, 0x0 },
+ { 0x1135c0, 0x0 },
+ { 0x2135c0, 0x0 },
+ { 0x136c0, 0x0 },
+ { 0x1136c0, 0x0 },
+ { 0x2136c0, 0x0 },
+ { 0x137c0, 0x0 },
+ { 0x1137c0, 0x0 },
+ { 0x2137c0, 0x0 },
+ { 0x138c0, 0x0 },
+ { 0x1138c0, 0x0 },
+ { 0x2138c0, 0x0 },
+ { 0x100c1, 0x0 },
+ { 0x1100c1, 0x0 },
+ { 0x2100c1, 0x0 },
+ { 0x101c1, 0x0 },
+ { 0x1101c1, 0x0 },
+ { 0x2101c1, 0x0 },
+ { 0x102c1, 0x0 },
+ { 0x1102c1, 0x0 },
+ { 0x2102c1, 0x0 },
+ { 0x103c1, 0x0 },
+ { 0x1103c1, 0x0 },
+ { 0x2103c1, 0x0 },
+ { 0x104c1, 0x0 },
+ { 0x1104c1, 0x0 },
+ { 0x2104c1, 0x0 },
+ { 0x105c1, 0x0 },
+ { 0x1105c1, 0x0 },
+ { 0x2105c1, 0x0 },
+ { 0x106c1, 0x0 },
+ { 0x1106c1, 0x0 },
+ { 0x2106c1, 0x0 },
+ { 0x107c1, 0x0 },
+ { 0x1107c1, 0x0 },
+ { 0x2107c1, 0x0 },
+ { 0x108c1, 0x0 },
+ { 0x1108c1, 0x0 },
+ { 0x2108c1, 0x0 },
+ { 0x110c1, 0x0 },
+ { 0x1110c1, 0x0 },
+ { 0x2110c1, 0x0 },
+ { 0x111c1, 0x0 },
+ { 0x1111c1, 0x0 },
+ { 0x2111c1, 0x0 },
+ { 0x112c1, 0x0 },
+ { 0x1112c1, 0x0 },
+ { 0x2112c1, 0x0 },
+ { 0x113c1, 0x0 },
+ { 0x1113c1, 0x0 },
+ { 0x2113c1, 0x0 },
+ { 0x114c1, 0x0 },
+ { 0x1114c1, 0x0 },
+ { 0x2114c1, 0x0 },
+ { 0x115c1, 0x0 },
+ { 0x1115c1, 0x0 },
+ { 0x2115c1, 0x0 },
+ { 0x116c1, 0x0 },
+ { 0x1116c1, 0x0 },
+ { 0x2116c1, 0x0 },
+ { 0x117c1, 0x0 },
+ { 0x1117c1, 0x0 },
+ { 0x2117c1, 0x0 },
+ { 0x118c1, 0x0 },
+ { 0x1118c1, 0x0 },
+ { 0x2118c1, 0x0 },
+ { 0x120c1, 0x0 },
+ { 0x1120c1, 0x0 },
+ { 0x2120c1, 0x0 },
+ { 0x121c1, 0x0 },
+ { 0x1121c1, 0x0 },
+ { 0x2121c1, 0x0 },
+ { 0x122c1, 0x0 },
+ { 0x1122c1, 0x0 },
+ { 0x2122c1, 0x0 },
+ { 0x123c1, 0x0 },
+ { 0x1123c1, 0x0 },
+ { 0x2123c1, 0x0 },
+ { 0x124c1, 0x0 },
+ { 0x1124c1, 0x0 },
+ { 0x2124c1, 0x0 },
+ { 0x125c1, 0x0 },
+ { 0x1125c1, 0x0 },
+ { 0x2125c1, 0x0 },
+ { 0x126c1, 0x0 },
+ { 0x1126c1, 0x0 },
+ { 0x2126c1, 0x0 },
+ { 0x127c1, 0x0 },
+ { 0x1127c1, 0x0 },
+ { 0x2127c1, 0x0 },
+ { 0x128c1, 0x0 },
+ { 0x1128c1, 0x0 },
+ { 0x2128c1, 0x0 },
+ { 0x130c1, 0x0 },
+ { 0x1130c1, 0x0 },
+ { 0x2130c1, 0x0 },
+ { 0x131c1, 0x0 },
+ { 0x1131c1, 0x0 },
+ { 0x2131c1, 0x0 },
+ { 0x132c1, 0x0 },
+ { 0x1132c1, 0x0 },
+ { 0x2132c1, 0x0 },
+ { 0x133c1, 0x0 },
+ { 0x1133c1, 0x0 },
+ { 0x2133c1, 0x0 },
+ { 0x134c1, 0x0 },
+ { 0x1134c1, 0x0 },
+ { 0x2134c1, 0x0 },
+ { 0x135c1, 0x0 },
+ { 0x1135c1, 0x0 },
+ { 0x2135c1, 0x0 },
+ { 0x136c1, 0x0 },
+ { 0x1136c1, 0x0 },
+ { 0x2136c1, 0x0 },
+ { 0x137c1, 0x0 },
+ { 0x1137c1, 0x0 },
+ { 0x2137c1, 0x0 },
+ { 0x138c1, 0x0 },
+ { 0x1138c1, 0x0 },
+ { 0x2138c1, 0x0 },
+ { 0x10020, 0x0 },
+ { 0x110020, 0x0 },
+ { 0x210020, 0x0 },
+ { 0x11020, 0x0 },
+ { 0x111020, 0x0 },
+ { 0x211020, 0x0 },
+ { 0x12020, 0x0 },
+ { 0x112020, 0x0 },
+ { 0x212020, 0x0 },
+ { 0x13020, 0x0 },
+ { 0x113020, 0x0 },
+ { 0x213020, 0x0 },
+ { 0x20072, 0x0 },
+ { 0x20073, 0x0 },
+ { 0x20074, 0x0 },
+ { 0x100aa, 0x0 },
+ { 0x110aa, 0x0 },
+ { 0x120aa, 0x0 },
+ { 0x130aa, 0x0 },
+ { 0x20010, 0x0 },
+ { 0x120010, 0x0 },
+ { 0x220010, 0x0 },
+ { 0x20011, 0x0 },
+ { 0x120011, 0x0 },
+ { 0x220011, 0x0 },
+ { 0x100ae, 0x0 },
+ { 0x1100ae, 0x0 },
+ { 0x2100ae, 0x0 },
+ { 0x100af, 0x0 },
+ { 0x1100af, 0x0 },
+ { 0x2100af, 0x0 },
+ { 0x110ae, 0x0 },
+ { 0x1110ae, 0x0 },
+ { 0x2110ae, 0x0 },
+ { 0x110af, 0x0 },
+ { 0x1110af, 0x0 },
+ { 0x2110af, 0x0 },
+ { 0x120ae, 0x0 },
+ { 0x1120ae, 0x0 },
+ { 0x2120ae, 0x0 },
+ { 0x120af, 0x0 },
+ { 0x1120af, 0x0 },
+ { 0x2120af, 0x0 },
+ { 0x130ae, 0x0 },
+ { 0x1130ae, 0x0 },
+ { 0x2130ae, 0x0 },
+ { 0x130af, 0x0 },
+ { 0x1130af, 0x0 },
+ { 0x2130af, 0x0 },
+ { 0x20020, 0x0 },
+ { 0x120020, 0x0 },
+ { 0x220020, 0x0 },
+ { 0x100a0, 0x0 },
+ { 0x100a1, 0x0 },
+ { 0x100a2, 0x0 },
+ { 0x100a3, 0x0 },
+ { 0x100a4, 0x0 },
+ { 0x100a5, 0x0 },
+ { 0x100a6, 0x0 },
+ { 0x100a7, 0x0 },
+ { 0x110a0, 0x0 },
+ { 0x110a1, 0x0 },
+ { 0x110a2, 0x0 },
+ { 0x110a3, 0x0 },
+ { 0x110a4, 0x0 },
+ { 0x110a5, 0x0 },
+ { 0x110a6, 0x0 },
+ { 0x110a7, 0x0 },
+ { 0x120a0, 0x0 },
+ { 0x120a1, 0x0 },
+ { 0x120a2, 0x0 },
+ { 0x120a3, 0x0 },
+ { 0x120a4, 0x0 },
+ { 0x120a5, 0x0 },
+ { 0x120a6, 0x0 },
+ { 0x120a7, 0x0 },
+ { 0x130a0, 0x0 },
+ { 0x130a1, 0x0 },
+ { 0x130a2, 0x0 },
+ { 0x130a3, 0x0 },
+ { 0x130a4, 0x0 },
+ { 0x130a5, 0x0 },
+ { 0x130a6, 0x0 },
+ { 0x130a7, 0x0 },
+ { 0x2007c, 0x0 },
+ { 0x12007c, 0x0 },
+ { 0x22007c, 0x0 },
+ { 0x2007d, 0x0 },
+ { 0x12007d, 0x0 },
+ { 0x22007d, 0x0 },
+ { 0x400fd, 0x0 },
+ { 0x400c0, 0x0 },
+ { 0x90201, 0x0 },
+ { 0x190201, 0x0 },
+ { 0x290201, 0x0 },
+ { 0x90202, 0x0 },
+ { 0x190202, 0x0 },
+ { 0x290202, 0x0 },
+ { 0x90203, 0x0 },
+ { 0x190203, 0x0 },
+ { 0x290203, 0x0 },
+ { 0x90204, 0x0 },
+ { 0x190204, 0x0 },
+ { 0x290204, 0x0 },
+ { 0x90205, 0x0 },
+ { 0x190205, 0x0 },
+ { 0x290205, 0x0 },
+ { 0x90206, 0x0 },
+ { 0x190206, 0x0 },
+ { 0x290206, 0x0 },
+ { 0x90207, 0x0 },
+ { 0x190207, 0x0 },
+ { 0x290207, 0x0 },
+ { 0x90208, 0x0 },
+ { 0x190208, 0x0 },
+ { 0x290208, 0x0 },
+ { 0x10062, 0x0 },
+ { 0x10162, 0x0 },
+ { 0x10262, 0x0 },
+ { 0x10362, 0x0 },
+ { 0x10462, 0x0 },
+ { 0x10562, 0x0 },
+ { 0x10662, 0x0 },
+ { 0x10762, 0x0 },
+ { 0x10862, 0x0 },
+ { 0x11062, 0x0 },
+ { 0x11162, 0x0 },
+ { 0x11262, 0x0 },
+ { 0x11362, 0x0 },
+ { 0x11462, 0x0 },
+ { 0x11562, 0x0 },
+ { 0x11662, 0x0 },
+ { 0x11762, 0x0 },
+ { 0x11862, 0x0 },
+ { 0x12062, 0x0 },
+ { 0x12162, 0x0 },
+ { 0x12262, 0x0 },
+ { 0x12362, 0x0 },
+ { 0x12462, 0x0 },
+ { 0x12562, 0x0 },
+ { 0x12662, 0x0 },
+ { 0x12762, 0x0 },
+ { 0x12862, 0x0 },
+ { 0x13062, 0x0 },
+ { 0x13162, 0x0 },
+ { 0x13262, 0x0 },
+ { 0x13362, 0x0 },
+ { 0x13462, 0x0 },
+ { 0x13562, 0x0 },
+ { 0x13662, 0x0 },
+ { 0x13762, 0x0 },
+ { 0x13862, 0x0 },
+ { 0x20077, 0x0 },
+ { 0x10001, 0x0 },
+ { 0x11001, 0x0 },
+ { 0x12001, 0x0 },
+ { 0x13001, 0x0 },
+ { 0x10040, 0x0 },
+ { 0x10140, 0x0 },
+ { 0x10240, 0x0 },
+ { 0x10340, 0x0 },
+ { 0x10440, 0x0 },
+ { 0x10540, 0x0 },
+ { 0x10640, 0x0 },
+ { 0x10740, 0x0 },
+ { 0x10840, 0x0 },
+ { 0x10030, 0x0 },
+ { 0x10130, 0x0 },
+ { 0x10230, 0x0 },
+ { 0x10330, 0x0 },
+ { 0x10430, 0x0 },
+ { 0x10530, 0x0 },
+ { 0x10630, 0x0 },
+ { 0x10730, 0x0 },
+ { 0x10830, 0x0 },
+ { 0x11040, 0x0 },
+ { 0x11140, 0x0 },
+ { 0x11240, 0x0 },
+ { 0x11340, 0x0 },
+ { 0x11440, 0x0 },
+ { 0x11540, 0x0 },
+ { 0x11640, 0x0 },
+ { 0x11740, 0x0 },
+ { 0x11840, 0x0 },
+ { 0x11030, 0x0 },
+ { 0x11130, 0x0 },
+ { 0x11230, 0x0 },
+ { 0x11330, 0x0 },
+ { 0x11430, 0x0 },
+ { 0x11530, 0x0 },
+ { 0x11630, 0x0 },
+ { 0x11730, 0x0 },
+ { 0x11830, 0x0 },
+ { 0x12040, 0x0 },
+ { 0x12140, 0x0 },
+ { 0x12240, 0x0 },
+ { 0x12340, 0x0 },
+ { 0x12440, 0x0 },
+ { 0x12540, 0x0 },
+ { 0x12640, 0x0 },
+ { 0x12740, 0x0 },
+ { 0x12840, 0x0 },
+ { 0x12030, 0x0 },
+ { 0x12130, 0x0 },
+ { 0x12230, 0x0 },
+ { 0x12330, 0x0 },
+ { 0x12430, 0x0 },
+ { 0x12530, 0x0 },
+ { 0x12630, 0x0 },
+ { 0x12730, 0x0 },
+ { 0x12830, 0x0 },
+ { 0x13040, 0x0 },
+ { 0x13140, 0x0 },
+ { 0x13240, 0x0 },
+ { 0x13340, 0x0 },
+ { 0x13440, 0x0 },
+ { 0x13540, 0x0 },
+ { 0x13640, 0x0 },
+ { 0x13740, 0x0 },
+ { 0x13840, 0x0 },
+ { 0x13030, 0x0 },
+ { 0x13130, 0x0 },
+ { 0x13230, 0x0 },
+ { 0x13330, 0x0 },
+ { 0x13430, 0x0 },
+ { 0x13530, 0x0 },
+ { 0x13630, 0x0 },
+ { 0x13730, 0x0 },
+ { 0x13830, 0x0 },
+
+};
+
+/* P0 message block parameter for training firmware */
+static struct dram_cfg_param ddr_fsp0_cfg[] = {
+ { 0xd0000, 0x0 },
+ { 0x54003, 0xe94 },
+ { 0x54004, 0x4 },
+ { 0x54005, 0x2228 },
+ { 0x54006, 0x15 },
+ { 0x54008, 0x131f },
+ { 0x54009, 0xff },
+ { 0x5400b, 0x4 },
+ { 0x5400c, 0x1 },
+ { 0x5400d, 0x100 },
+ { 0x5400f, 0x100 },
+ { 0x54012, 0x110 },
+ { 0x54019, 0x36e4 },
+ { 0x5401a, 0x32 },
+ { 0x5401b, 0x1146 },
+ { 0x5401c, 0x1108 },
+ { 0x5401e, 0x6 },
+ { 0x5401f, 0x36e4 },
+ { 0x54020, 0x32 },
+ { 0x54021, 0x1146 },
+ { 0x54022, 0x1108 },
+ { 0x54024, 0x6 },
+ { 0x54032, 0xe400 },
+ { 0x54033, 0x3236 },
+ { 0x54034, 0x4600 },
+ { 0x54035, 0x811 },
+ { 0x54036, 0x11 },
+ { 0x54037, 0x600 },
+ { 0x54038, 0xe400 },
+ { 0x54039, 0x3236 },
+ { 0x5403a, 0x4600 },
+ { 0x5403b, 0x811 },
+ { 0x5403c, 0x11 },
+ { 0x5403d, 0x600 },
+ { 0xd0000, 0x1}
+};
+
+/* P0 2D message block parameter for training firmware */
+static struct dram_cfg_param ddr_fsp0_2d_cfg[] = {
+ { 0xd0000, 0x0 },
+ { 0x54003, 0xe94 },
+ { 0x54004, 0x4 },
+ { 0x54005, 0x2228 },
+ { 0x54006, 0x15 },
+ { 0x54008, 0x61 },
+ { 0x54009, 0xff },
+ { 0x5400b, 0x4 },
+ { 0x5400c, 0x1 },
+ { 0x5400d, 0x100 },
+ { 0x5400f, 0x100 },
+ { 0x54010, 0x2080 },
+ { 0x54012, 0x110 },
+ { 0x54019, 0x36e4 },
+ { 0x5401a, 0x32 },
+ { 0x5401b, 0x1146 },
+ { 0x5401c, 0x1108 },
+ { 0x5401e, 0x6 },
+ { 0x5401f, 0x36e4 },
+ { 0x54020, 0x32 },
+ { 0x54021, 0x1146 },
+ { 0x54022, 0x1108 },
+ { 0x54024, 0x6 },
+ { 0x54032, 0xe400 },
+ { 0x54033, 0x3236 },
+ { 0x54034, 0x4600 },
+ { 0x54035, 0x811 },
+ { 0x54036, 0x11 },
+ { 0x54037, 0x600 },
+ { 0x54038, 0xe400 },
+ { 0x54039, 0x3236 },
+ { 0x5403a, 0x4600 },
+ { 0x5403b, 0x811 },
+ { 0x5403c, 0x11 },
+ { 0x5403d, 0x600 },
+ { 0xd0000, 0x1}
+};
+
+/* DRAM PHY init engine image */
+static struct dram_cfg_param ddr_phy_pie[] = {
+ { 0xd0000, 0x0 },
+ { 0x90000, 0x10 },
+ { 0x90001, 0x400 },
+ { 0x90002, 0x10e },
+ { 0x90003, 0x0 },
+ { 0x90004, 0x0 },
+ { 0x90005, 0x8 },
+ { 0x90029, 0xb },
+ { 0x9002a, 0x480 },
+ { 0x9002b, 0x109 },
+ { 0x9002c, 0x8 },
+ { 0x9002d, 0x448 },
+ { 0x9002e, 0x139 },
+ { 0x9002f, 0x8 },
+ { 0x90030, 0x478 },
+ { 0x90031, 0x109 },
+ { 0x90032, 0x0 },
+ { 0x90033, 0xe8 },
+ { 0x90034, 0x109 },
+ { 0x90035, 0x2 },
+ { 0x90036, 0x10 },
+ { 0x90037, 0x139 },
+ { 0x90038, 0xb },
+ { 0x90039, 0x7c0 },
+ { 0x9003a, 0x139 },
+ { 0x9003b, 0x44 },
+ { 0x9003c, 0x633 },
+ { 0x9003d, 0x159 },
+ { 0x9003e, 0x14f },
+ { 0x9003f, 0x630 },
+ { 0x90040, 0x159 },
+ { 0x90041, 0x47 },
+ { 0x90042, 0x633 },
+ { 0x90043, 0x149 },
+ { 0x90044, 0x4f },
+ { 0x90045, 0x633 },
+ { 0x90046, 0x179 },
+ { 0x90047, 0x8 },
+ { 0x90048, 0xe0 },
+ { 0x90049, 0x109 },
+ { 0x9004a, 0x0 },
+ { 0x9004b, 0x7c8 },
+ { 0x9004c, 0x109 },
+ { 0x9004d, 0x0 },
+ { 0x9004e, 0x1 },
+ { 0x9004f, 0x8 },
+ { 0x90050, 0x30 },
+ { 0x90051, 0x65a },
+ { 0x90052, 0x9 },
+ { 0x90053, 0x0 },
+ { 0x90054, 0x45a },
+ { 0x90055, 0x9 },
+ { 0x90056, 0x0 },
+ { 0x90057, 0x448 },
+ { 0x90058, 0x109 },
+ { 0x90059, 0x40 },
+ { 0x9005a, 0x633 },
+ { 0x9005b, 0x179 },
+ { 0x9005c, 0x1 },
+ { 0x9005d, 0x618 },
+ { 0x9005e, 0x109 },
+ { 0x9005f, 0x40c0 },
+ { 0x90060, 0x633 },
+ { 0x90061, 0x149 },
+ { 0x90062, 0x8 },
+ { 0x90063, 0x4 },
+ { 0x90064, 0x48 },
+ { 0x90065, 0x4040 },
+ { 0x90066, 0x633 },
+ { 0x90067, 0x149 },
+ { 0x90068, 0x0 },
+ { 0x90069, 0x4 },
+ { 0x9006a, 0x48 },
+ { 0x9006b, 0x40 },
+ { 0x9006c, 0x633 },
+ { 0x9006d, 0x149 },
+ { 0x9006e, 0x0 },
+ { 0x9006f, 0x658 },
+ { 0x90070, 0x109 },
+ { 0x90071, 0x10 },
+ { 0x90072, 0x4 },
+ { 0x90073, 0x18 },
+ { 0x90074, 0x0 },
+ { 0x90075, 0x4 },
+ { 0x90076, 0x78 },
+ { 0x90077, 0x549 },
+ { 0x90078, 0x633 },
+ { 0x90079, 0x159 },
+ { 0x9007a, 0xd49 },
+ { 0x9007b, 0x633 },
+ { 0x9007c, 0x159 },
+ { 0x9007d, 0x94a },
+ { 0x9007e, 0x633 },
+ { 0x9007f, 0x159 },
+ { 0x90080, 0x441 },
+ { 0x90081, 0x633 },
+ { 0x90082, 0x149 },
+ { 0x90083, 0x42 },
+ { 0x90084, 0x633 },
+ { 0x90085, 0x149 },
+ { 0x90086, 0x1 },
+ { 0x90087, 0x633 },
+ { 0x90088, 0x149 },
+ { 0x90089, 0x0 },
+ { 0x9008a, 0xe0 },
+ { 0x9008b, 0x109 },
+ { 0x9008c, 0xa },
+ { 0x9008d, 0x10 },
+ { 0x9008e, 0x109 },
+ { 0x9008f, 0x9 },
+ { 0x90090, 0x3c0 },
+ { 0x90091, 0x149 },
+ { 0x90092, 0x9 },
+ { 0x90093, 0x3c0 },
+ { 0x90094, 0x159 },
+ { 0x90095, 0x18 },
+ { 0x90096, 0x10 },
+ { 0x90097, 0x109 },
+ { 0x90098, 0x0 },
+ { 0x90099, 0x3c0 },
+ { 0x9009a, 0x109 },
+ { 0x9009b, 0x18 },
+ { 0x9009c, 0x4 },
+ { 0x9009d, 0x48 },
+ { 0x9009e, 0x18 },
+ { 0x9009f, 0x4 },
+ { 0x900a0, 0x58 },
+ { 0x900a1, 0xb },
+ { 0x900a2, 0x10 },
+ { 0x900a3, 0x109 },
+ { 0x900a4, 0x1 },
+ { 0x900a5, 0x10 },
+ { 0x900a6, 0x109 },
+ { 0x900a7, 0x5 },
+ { 0x900a8, 0x7c0 },
+ { 0x900a9, 0x109 },
+ { 0x40000, 0x811 },
+ { 0x40020, 0x880 },
+ { 0x40040, 0x0 },
+ { 0x40060, 0x0 },
+ { 0x40001, 0x4008 },
+ { 0x40021, 0x83 },
+ { 0x40041, 0x4f },
+ { 0x40061, 0x0 },
+ { 0x40002, 0x4040 },
+ { 0x40022, 0x83 },
+ { 0x40042, 0x51 },
+ { 0x40062, 0x0 },
+ { 0x40003, 0x811 },
+ { 0x40023, 0x880 },
+ { 0x40043, 0x0 },
+ { 0x40063, 0x0 },
+ { 0x40004, 0x720 },
+ { 0x40024, 0xf },
+ { 0x40044, 0x1740 },
+ { 0x40064, 0x0 },
+ { 0x40005, 0x16 },
+ { 0x40025, 0x83 },
+ { 0x40045, 0x4b },
+ { 0x40065, 0x0 },
+ { 0x40006, 0x716 },
+ { 0x40026, 0xf },
+ { 0x40046, 0x2001 },
+ { 0x40066, 0x0 },
+ { 0x40007, 0x716 },
+ { 0x40027, 0xf },
+ { 0x40047, 0x2800 },
+ { 0x40067, 0x0 },
+ { 0x40008, 0x716 },
+ { 0x40028, 0xf },
+ { 0x40048, 0xf00 },
+ { 0x40068, 0x0 },
+ { 0x40009, 0x720 },
+ { 0x40029, 0xf },
+ { 0x40049, 0x1400 },
+ { 0x40069, 0x0 },
+ { 0x4000a, 0xe08 },
+ { 0x4002a, 0xc15 },
+ { 0x4004a, 0x0 },
+ { 0x4006a, 0x0 },
+ { 0x4000b, 0x625 },
+ { 0x4002b, 0x15 },
+ { 0x4004b, 0x0 },
+ { 0x4006b, 0x0 },
+ { 0x4000c, 0x4028 },
+ { 0x4002c, 0x80 },
+ { 0x4004c, 0x0 },
+ { 0x4006c, 0x0 },
+ { 0x4000d, 0xe08 },
+ { 0x4002d, 0xc1a },
+ { 0x4004d, 0x0 },
+ { 0x4006d, 0x0 },
+ { 0x4000e, 0x625 },
+ { 0x4002e, 0x1a },
+ { 0x4004e, 0x0 },
+ { 0x4006e, 0x0 },
+ { 0x4000f, 0x4040 },
+ { 0x4002f, 0x80 },
+ { 0x4004f, 0x0 },
+ { 0x4006f, 0x0 },
+ { 0x40010, 0x2604 },
+ { 0x40030, 0x15 },
+ { 0x40050, 0x0 },
+ { 0x40070, 0x0 },
+ { 0x40011, 0x708 },
+ { 0x40031, 0x5 },
+ { 0x40051, 0x0 },
+ { 0x40071, 0x2002 },
+ { 0x40012, 0x8 },
+ { 0x40032, 0x80 },
+ { 0x40052, 0x0 },
+ { 0x40072, 0x0 },
+ { 0x40013, 0x2604 },
+ { 0x40033, 0x1a },
+ { 0x40053, 0x0 },
+ { 0x40073, 0x0 },
+ { 0x40014, 0x708 },
+ { 0x40034, 0xa },
+ { 0x40054, 0x0 },
+ { 0x40074, 0x2002 },
+ { 0x40015, 0x4040 },
+ { 0x40035, 0x80 },
+ { 0x40055, 0x0 },
+ { 0x40075, 0x0 },
+ { 0x40016, 0x60a },
+ { 0x40036, 0x15 },
+ { 0x40056, 0x1200 },
+ { 0x40076, 0x0 },
+ { 0x40017, 0x61a },
+ { 0x40037, 0x15 },
+ { 0x40057, 0x1300 },
+ { 0x40077, 0x0 },
+ { 0x40018, 0x60a },
+ { 0x40038, 0x1a },
+ { 0x40058, 0x1200 },
+ { 0x40078, 0x0 },
+ { 0x40019, 0x642 },
+ { 0x40039, 0x1a },
+ { 0x40059, 0x1300 },
+ { 0x40079, 0x0 },
+ { 0x4001a, 0x4808 },
+ { 0x4003a, 0x880 },
+ { 0x4005a, 0x0 },
+ { 0x4007a, 0x0 },
+ { 0x900aa, 0x0 },
+ { 0x900ab, 0x790 },
+ { 0x900ac, 0x11a },
+ { 0x900ad, 0x8 },
+ { 0x900ae, 0x7aa },
+ { 0x900af, 0x2a },
+ { 0x900b0, 0x10 },
+ { 0x900b1, 0x7b2 },
+ { 0x900b2, 0x2a },
+ { 0x900b3, 0x0 },
+ { 0x900b4, 0x7c8 },
+ { 0x900b5, 0x109 },
+ { 0x900b6, 0x10 },
+ { 0x900b7, 0x10 },
+ { 0x900b8, 0x109 },
+ { 0x900b9, 0x10 },
+ { 0x900ba, 0x2a8 },
+ { 0x900bb, 0x129 },
+ { 0x900bc, 0x8 },
+ { 0x900bd, 0x370 },
+ { 0x900be, 0x129 },
+ { 0x900bf, 0xa },
+ { 0x900c0, 0x3c8 },
+ { 0x900c1, 0x1a9 },
+ { 0x900c2, 0xc },
+ { 0x900c3, 0x408 },
+ { 0x900c4, 0x199 },
+ { 0x900c5, 0x14 },
+ { 0x900c6, 0x790 },
+ { 0x900c7, 0x11a },
+ { 0x900c8, 0x8 },
+ { 0x900c9, 0x4 },
+ { 0x900ca, 0x18 },
+ { 0x900cb, 0xe },
+ { 0x900cc, 0x408 },
+ { 0x900cd, 0x199 },
+ { 0x900ce, 0x8 },
+ { 0x900cf, 0x8568 },
+ { 0x900d0, 0x108 },
+ { 0x900d1, 0x18 },
+ { 0x900d2, 0x790 },
+ { 0x900d3, 0x16a },
+ { 0x900d4, 0x8 },
+ { 0x900d5, 0x1d8 },
+ { 0x900d6, 0x169 },
+ { 0x900d7, 0x10 },
+ { 0x900d8, 0x8558 },
+ { 0x900d9, 0x168 },
+ { 0x900da, 0x1ff8 },
+ { 0x900db, 0x85a8 },
+ { 0x900dc, 0x1e8 },
+ { 0x900dd, 0x50 },
+ { 0x900de, 0x798 },
+ { 0x900df, 0x16a },
+ { 0x900e0, 0x60 },
+ { 0x900e1, 0x7a0 },
+ { 0x900e2, 0x16a },
+ { 0x900e3, 0x8 },
+ { 0x900e4, 0x8310 },
+ { 0x900e5, 0x168 },
+ { 0x900e6, 0x8 },
+ { 0x900e7, 0xa310 },
+ { 0x900e8, 0x168 },
+ { 0x900e9, 0xa },
+ { 0x900ea, 0x408 },
+ { 0x900eb, 0x169 },
+ { 0x900ec, 0x6e },
+ { 0x900ed, 0x0 },
+ { 0x900ee, 0x68 },
+ { 0x900ef, 0x0 },
+ { 0x900f0, 0x408 },
+ { 0x900f1, 0x169 },
+ { 0x900f2, 0x0 },
+ { 0x900f3, 0x8310 },
+ { 0x900f4, 0x168 },
+ { 0x900f5, 0x0 },
+ { 0x900f6, 0xa310 },
+ { 0x900f7, 0x168 },
+ { 0x900f8, 0x1ff8 },
+ { 0x900f9, 0x85a8 },
+ { 0x900fa, 0x1e8 },
+ { 0x900fb, 0x68 },
+ { 0x900fc, 0x798 },
+ { 0x900fd, 0x16a },
+ { 0x900fe, 0x78 },
+ { 0x900ff, 0x7a0 },
+ { 0x90100, 0x16a },
+ { 0x90101, 0x68 },
+ { 0x90102, 0x790 },
+ { 0x90103, 0x16a },
+ { 0x90104, 0x8 },
+ { 0x90105, 0x8b10 },
+ { 0x90106, 0x168 },
+ { 0x90107, 0x8 },
+ { 0x90108, 0xab10 },
+ { 0x90109, 0x168 },
+ { 0x9010a, 0xa },
+ { 0x9010b, 0x408 },
+ { 0x9010c, 0x169 },
+ { 0x9010d, 0x58 },
+ { 0x9010e, 0x0 },
+ { 0x9010f, 0x68 },
+ { 0x90110, 0x0 },
+ { 0x90111, 0x408 },
+ { 0x90112, 0x169 },
+ { 0x90113, 0x0 },
+ { 0x90114, 0x8b10 },
+ { 0x90115, 0x168 },
+ { 0x90116, 0x1 },
+ { 0x90117, 0xab10 },
+ { 0x90118, 0x168 },
+ { 0x90119, 0x0 },
+ { 0x9011a, 0x1d8 },
+ { 0x9011b, 0x169 },
+ { 0x9011c, 0x80 },
+ { 0x9011d, 0x790 },
+ { 0x9011e, 0x16a },
+ { 0x9011f, 0x18 },
+ { 0x90120, 0x7aa },
+ { 0x90121, 0x6a },
+ { 0x90122, 0xa },
+ { 0x90123, 0x0 },
+ { 0x90124, 0x1e9 },
+ { 0x90125, 0x8 },
+ { 0x90126, 0x8080 },
+ { 0x90127, 0x108 },
+ { 0x90128, 0xf },
+ { 0x90129, 0x408 },
+ { 0x9012a, 0x169 },
+ { 0x9012b, 0xc },
+ { 0x9012c, 0x0 },
+ { 0x9012d, 0x68 },
+ { 0x9012e, 0x9 },
+ { 0x9012f, 0x0 },
+ { 0x90130, 0x1a9 },
+ { 0x90131, 0x0 },
+ { 0x90132, 0x408 },
+ { 0x90133, 0x169 },
+ { 0x90134, 0x0 },
+ { 0x90135, 0x8080 },
+ { 0x90136, 0x108 },
+ { 0x90137, 0x8 },
+ { 0x90138, 0x7aa },
+ { 0x90139, 0x6a },
+ { 0x9013a, 0x0 },
+ { 0x9013b, 0x8568 },
+ { 0x9013c, 0x108 },
+ { 0x9013d, 0xb7 },
+ { 0x9013e, 0x790 },
+ { 0x9013f, 0x16a },
+ { 0x90140, 0x1f },
+ { 0x90141, 0x0 },
+ { 0x90142, 0x68 },
+ { 0x90143, 0x8 },
+ { 0x90144, 0x8558 },
+ { 0x90145, 0x168 },
+ { 0x90146, 0xf },
+ { 0x90147, 0x408 },
+ { 0x90148, 0x169 },
+ { 0x90149, 0xd },
+ { 0x9014a, 0x0 },
+ { 0x9014b, 0x68 },
+ { 0x9014c, 0x0 },
+ { 0x9014d, 0x408 },
+ { 0x9014e, 0x169 },
+ { 0x9014f, 0x0 },
+ { 0x90150, 0x8558 },
+ { 0x90151, 0x168 },
+ { 0x90152, 0x8 },
+ { 0x90153, 0x3c8 },
+ { 0x90154, 0x1a9 },
+ { 0x90155, 0x3 },
+ { 0x90156, 0x370 },
+ { 0x90157, 0x129 },
+ { 0x90158, 0x20 },
+ { 0x90159, 0x2aa },
+ { 0x9015a, 0x9 },
+ { 0x9015b, 0x8 },
+ { 0x9015c, 0xe8 },
+ { 0x9015d, 0x109 },
+ { 0x9015e, 0x0 },
+ { 0x9015f, 0x8140 },
+ { 0x90160, 0x10c },
+ { 0x90161, 0x10 },
+ { 0x90162, 0x8138 },
+ { 0x90163, 0x104 },
+ { 0x90164, 0x8 },
+ { 0x90165, 0x448 },
+ { 0x90166, 0x109 },
+ { 0x90167, 0xf },
+ { 0x90168, 0x7c0 },
+ { 0x90169, 0x109 },
+ { 0x9016a, 0x0 },
+ { 0x9016b, 0xe8 },
+ { 0x9016c, 0x109 },
+ { 0x9016d, 0x47 },
+ { 0x9016e, 0x630 },
+ { 0x9016f, 0x109 },
+ { 0x90170, 0x8 },
+ { 0x90171, 0x618 },
+ { 0x90172, 0x109 },
+ { 0x90173, 0x8 },
+ { 0x90174, 0xe0 },
+ { 0x90175, 0x109 },
+ { 0x90176, 0x0 },
+ { 0x90177, 0x7c8 },
+ { 0x90178, 0x109 },
+ { 0x90179, 0x8 },
+ { 0x9017a, 0x8140 },
+ { 0x9017b, 0x10c },
+ { 0x9017c, 0x0 },
+ { 0x9017d, 0x478 },
+ { 0x9017e, 0x109 },
+ { 0x9017f, 0x0 },
+ { 0x90180, 0x1 },
+ { 0x90181, 0x8 },
+ { 0x90182, 0x8 },
+ { 0x90183, 0x4 },
+ { 0x90184, 0x0 },
+ { 0x90006, 0x8 },
+ { 0x90007, 0x7c8 },
+ { 0x90008, 0x109 },
+ { 0x90009, 0x0 },
+ { 0x9000a, 0x400 },
+ { 0x9000b, 0x106 },
+ { 0xd00e7, 0x400 },
+ { 0x90017, 0x0 },
+ { 0x9001f, 0x2b },
+ { 0x90026, 0x69 },
+ { 0x400d0, 0x0 },
+ { 0x400d1, 0x101 },
+ { 0x400d2, 0x105 },
+ { 0x400d3, 0x107 },
+ { 0x400d4, 0x10f },
+ { 0x400d5, 0x202 },
+ { 0x400d6, 0x20a },
+ { 0x400d7, 0x20b },
+ { 0x2003a, 0x2 },
+ { 0x200be, 0x3 },
+ { 0x2000b, 0x75 },
+ { 0x2000c, 0xe9 },
+ { 0x2000d, 0x91c },
+ { 0x2000e, 0x2c },
+ { 0x9000c, 0x0 },
+ { 0x9000d, 0x173 },
+ { 0x9000e, 0x60 },
+ { 0x9000f, 0x6110 },
+ { 0x90010, 0x2152 },
+ { 0x90011, 0xdfbd },
+ { 0x90012, 0x2060 },
+ { 0x90013, 0x6152 },
+ { 0x20010, 0x5a },
+ { 0x20011, 0x3 },
+ { 0x40080, 0xe0 },
+ { 0x40081, 0x12 },
+ { 0x40082, 0xe0 },
+ { 0x40083, 0x12 },
+ { 0x40084, 0xe0 },
+ { 0x40085, 0x12 },
+ { 0x400fd, 0xf },
+ { 0x400f1, 0xe },
+ { 0x10011, 0x1 },
+ { 0x10012, 0x1 },
+ { 0x10013, 0x180 },
+ { 0x10018, 0x1 },
+ { 0x10002, 0x6209 },
+ { 0x100b2, 0x1 },
+ { 0x101b4, 0x1 },
+ { 0x102b4, 0x1 },
+ { 0x103b4, 0x1 },
+ { 0x104b4, 0x1 },
+ { 0x105b4, 0x1 },
+ { 0x106b4, 0x1 },
+ { 0x107b4, 0x1 },
+ { 0x108b4, 0x1 },
+ { 0x11011, 0x1 },
+ { 0x11012, 0x1 },
+ { 0x11013, 0x180 },
+ { 0x11018, 0x1 },
+ { 0x11002, 0x6209 },
+ { 0x110b2, 0x1 },
+ { 0x111b4, 0x1 },
+ { 0x112b4, 0x1 },
+ { 0x113b4, 0x1 },
+ { 0x114b4, 0x1 },
+ { 0x115b4, 0x1 },
+ { 0x116b4, 0x1 },
+ { 0x117b4, 0x1 },
+ { 0x118b4, 0x1 },
+ { 0x20089, 0x1 },
+ { 0x20088, 0x19 },
+ { 0xc0080, 0x0 },
+ { 0xd0000, 0x1 },
+};
+
+static struct dram_fsp_msg ddr_dram_fsp_msg[] = {
+ {
+ /* P0 3733mts 1D */
+ .drate = 3733,
+ .fw_type = FW_1D_IMAGE,
+ .fsp_cfg = ddr_fsp0_cfg,
+ .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_cfg),
+ },
+ {
+ /* P0 3733mts 2D */
+ .drate = 3733,
+ .fw_type = FW_2D_IMAGE,
+ .fsp_cfg = ddr_fsp0_2d_cfg,
+ .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_2d_cfg),
+ },
+};
+
+/* ddr timing config params */
+struct dram_timing_info dram_timing = {
+ .ddrc_cfg = ddr_ddrc_cfg,
+ .ddrc_cfg_num = ARRAY_SIZE(ddr_ddrc_cfg),
+ .ddrphy_cfg = ddr_ddrphy_cfg,
+ .ddrphy_cfg_num = ARRAY_SIZE(ddr_ddrphy_cfg),
+ .fsp_msg = ddr_dram_fsp_msg,
+ .fsp_msg_num = ARRAY_SIZE(ddr_dram_fsp_msg),
+ .ddrphy_trained_csr = ddr_ddrphy_trained_csr,
+ .ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr),
+ .ddrphy_pie = ddr_phy_pie,
+ .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
+ .fsp_table = { 3733, },
+};
diff --git a/board/variscite/imx93_var_som/spl.c b/board/variscite/imx93_var_som/spl.c
new file mode 100644
index 0000000..502e599
--- /dev/null
+++ b/board/variscite/imx93_var_som/spl.c
@@ -0,0 +1,143 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2022 NXP
+ * Copyright 2023 Variscite Ltd.
+ */
+
+#include <command.h>
+#include <cpu_func.h>
+#include <image.h>
+#include <init.h>
+#include <log.h>
+#include <spl.h>
+#include <asm/global_data.h>
+#include <asm/io.h>
+#include <asm/arch/imx93_pins.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/mach-imx/boot_mode.h>
+#include <asm/mach-imx/mxc_i2c.h>
+#include <asm/arch-mx7ulp/gpio.h>
+#include <asm/sections.h>
+#include <asm/mach-imx/syscounter.h>
+#include <dm/uclass.h>
+#include <dm/device.h>
+#include <dm/uclass-internal.h>
+#include <dm/device-internal.h>
+#include <linux/delay.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/ccm_regs.h>
+#include <asm/arch/ddr.h>
+#include <power/pmic.h>
+#include <power/pca9450.h>
+#include <asm/arch/trdc.h>
+
+#include "../common/imx9_eeprom.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static struct var_eeprom eeprom = {0};
+
+int spl_board_boot_device(enum boot_device boot_dev_spl)
+{
+ return BOOT_DEVICE_BOOTROM;
+}
+
+void spl_board_init(void)
+{
+ struct var_eeprom *ep = VAR_EEPROM_DATA;
+
+ puts("Normal Boot\n");
+
+ /* Copy EEPROM contents to DRAM */
+ memcpy(ep, &eeprom, sizeof(*ep));
+}
+
+void spl_dram_init(void)
+{
+ /* EEPROM initialization */
+ var_eeprom_read_header(&eeprom);
+
+ ddr_init(&dram_timing);
+}
+
+int power_init_board(void)
+{
+ struct udevice *dev;
+ int ret;
+
+ if (IS_ENABLED(CONFIG_SPL_DM_PMIC_PCA9450)) {
+ ret = pmic_get("pmic@25", &dev);
+ if (ret == -ENODEV) {
+ puts("No pca9450@25\n");
+ return 0;
+ }
+ if (ret != 0)
+ return ret;
+
+ /* BUCKxOUT_DVS0/1 control BUCK123 output */
+ pmic_reg_write(dev, PCA9450_BUCK123_DVS, 0x29);
+
+ /* enable DVS control through PMIC_STBY_REQ */
+ pmic_reg_write(dev, PCA9450_BUCK1CTRL, 0x59);
+
+ pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, 0x18);
+ pmic_reg_write(dev, PCA9450_BUCK3OUT_DVS0, 0x18);
+
+ /* set standby voltage to 0.65V */
+ pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS1, 0x4);
+
+ /* I2C_LT_EN*/
+ pmic_reg_write(dev, 0xa, 0x3);
+
+ /* set WDOG_B_CFG to cold reset */
+ pmic_reg_write(dev, PCA9450_RESET_CTRL, 0xA1);
+ }
+
+ return 0;
+}
+
+void board_init_f(ulong dummy)
+{
+ int ret;
+
+ /* Clear the BSS. */
+ memset(__bss_start, 0, __bss_end - __bss_start);
+
+ timer_init();
+
+ arch_cpu_init();
+
+ board_early_init_f();
+
+ spl_early_init();
+
+ preloader_console_init();
+
+ ret = arch_cpu_init();
+ if (ret) {
+ printf("Fail to init Sentinel API\n");
+ } else {
+ printf("SOC: 0x%x\n", gd->arch.soc_rev);
+ printf("LC: 0x%x\n", gd->arch.lifecycle);
+ }
+ power_init_board();
+
+ set_arm_core_max_clk();
+
+ /* Init power of mix */
+ soc_power_init();
+
+ /* Setup TRDC for DDR access */
+ trdc_init();
+
+ /* DDR initialization */
+ spl_dram_init();
+
+ /* Put M33 into CPUWAIT for following kick */
+ ret = m33_prepare();
+ if (!ret)
+ printf("M33 prepare ok\n");
+
+ board_init_r(NULL, 0);
+}
diff --git a/board/wandboard/wandboard.c b/board/wandboard/wandboard.c
index 4891445..8be62c8 100644
--- a/board/wandboard/wandboard.c
+++ b/board/wandboard/wandboard.c
@@ -28,7 +28,6 @@
#include <env.h>
#include <linux/delay.h>
#include <linux/sizes.h>
-#include <common.h>
#include <miiphy.h>
#include <netdev.h>
#include <phy.h>
diff --git a/board/xilinx/Kconfig b/board/xilinx/Kconfig
index 4f0776e..843198f 100644
--- a/board/xilinx/Kconfig
+++ b/board/xilinx/Kconfig
@@ -51,10 +51,11 @@
config BOOT_SCRIPT_OFFSET
hex "Boot script offset"
- depends on ARCH_ZYNQ || ARCH_ZYNQMP || ARCH_VERSAL || ARCH_VERSAL_NET || MICROBLAZE
+ depends on ARCH_ZYNQ || ARCH_ZYNQMP || ARCH_VERSAL || ARCH_VERSAL_NET || MICROBLAZE || TARGET_XILINX_MBV
default 0xFC0000 if ARCH_ZYNQ || MICROBLAZE
default 0x3E80000 if ARCH_ZYNQMP
default 0x7F80000 if ARCH_VERSAL || ARCH_VERSAL_NET
+ default 0 if TARGET_XILINX_MBV
help
Specifies distro boot script offset in NAND/QSPI/NOR flash.
diff --git a/board/xilinx/common/board.c b/board/xilinx/common/board.c
index 9309b07..9641ed3 100644
--- a/board/xilinx/common/board.c
+++ b/board/xilinx/common/board.c
@@ -25,6 +25,7 @@
#include <i2c_eeprom.h>
#include <net.h>
#include <generated/dt.h>
+#include <rng.h>
#include <slre.h>
#include <soc.h>
#include <linux/ctype.h>
@@ -652,6 +653,11 @@
#endif
#if defined(CONFIG_LMB)
+
+#ifndef MMU_SECTION_SIZE
+#define MMU_SECTION_SIZE (1 * 1024 * 1024)
+#endif
+
phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
{
phys_size_t size;
@@ -677,3 +683,51 @@
return reg + size;
}
#endif
+
+#ifdef CONFIG_OF_BOARD_SETUP
+#define MAX_RAND_SIZE 8
+int ft_board_setup(void *blob, struct bd_info *bd)
+{
+ size_t n = MAX_RAND_SIZE;
+ struct udevice *dev;
+ u8 buf[MAX_RAND_SIZE];
+ int nodeoffset, ret;
+
+ if (uclass_get_device(UCLASS_RNG, 0, &dev) || !dev) {
+ debug("No RNG device\n");
+ return 0;
+ }
+
+ if (dm_rng_read(dev, buf, n)) {
+ debug("Reading RNG failed\n");
+ return 0;
+ }
+
+ if (!blob) {
+ debug("No FDT memory address configured. Please configure\n"
+ "the FDT address via \"fdt addr <address>\" command.\n"
+ "Aborting!\n");
+ return 0;
+ }
+
+ ret = fdt_check_header(blob);
+ if (ret < 0) {
+ debug("fdt_chosen: %s\n", fdt_strerror(ret));
+ return ret;
+ }
+
+ nodeoffset = fdt_find_or_add_subnode(blob, 0, "chosen");
+ if (nodeoffset < 0) {
+ debug("Reading chosen node failed\n");
+ return nodeoffset;
+ }
+
+ ret = fdt_setprop(blob, nodeoffset, "kaslr-seed", buf, sizeof(buf));
+ if (ret < 0) {
+ debug("Unable to set kaslr-seed on chosen node: %s\n", fdt_strerror(ret));
+ return ret;
+ }
+
+ return 0;
+}
+#endif
diff --git a/board/xilinx/common/fru.c b/board/xilinx/common/fru.c
index c916c3d..12b2131 100644
--- a/board/xilinx/common/fru.c
+++ b/board/xilinx/common/fru.c
@@ -85,4 +85,4 @@
fru, 8, 1, do_fru,
"FRU table info",
fru_help_text
-)
+);
diff --git a/board/xilinx/mbv/Kconfig b/board/xilinx/mbv/Kconfig
new file mode 100644
index 0000000..4bc9f72
--- /dev/null
+++ b/board/xilinx/mbv/Kconfig
@@ -0,0 +1,28 @@
+if TARGET_XILINX_MBV
+
+config SYS_BOARD
+ default "mbv"
+
+config SYS_VENDOR
+ default "xilinx"
+
+config SYS_CPU
+ default "generic"
+
+config SYS_CONFIG_NAME
+ default "xilinx_mbv"
+
+config TEXT_BASE
+ default 0x80000000 if !RISCV_SMODE
+ default 0x80400000 if RISCV_SMODE && ARCH_RV32I
+
+config BOARD_SPECIFIC_OPTIONS
+ def_bool y
+ select GENERIC_RISCV
+ imply BOARD_LATE_INIT
+ imply CMD_SBI
+ imply CMD_PING
+
+source "board/xilinx/Kconfig"
+
+endif
diff --git a/board/xilinx/mbv/MAINTAINERS b/board/xilinx/mbv/MAINTAINERS
new file mode 100644
index 0000000..445654f
--- /dev/null
+++ b/board/xilinx/mbv/MAINTAINERS
@@ -0,0 +1,7 @@
+XILINX MicroBlaze V BOARD
+M: Michal Simek <michal.simek@amd.com>
+S: Maintained
+F: arch/riscv/dts/xilinx-mbv*
+F: board/xilinx/mbv/
+F: configs/xilinx_mbv*
+F: include/configs/xilinx_mbv.h
diff --git a/board/xilinx/mbv/Makefile b/board/xilinx/mbv/Makefile
new file mode 100644
index 0000000..e2fc0c6
--- /dev/null
+++ b/board/xilinx/mbv/Makefile
@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0
+#
+# (C) Copyright 2023, Advanced Micro Devices, Inc.
+
+obj-y += board.o
diff --git a/board/xilinx/mbv/board.c b/board/xilinx/mbv/board.c
new file mode 100644
index 0000000..ccf4395
--- /dev/null
+++ b/board/xilinx/mbv/board.c
@@ -0,0 +1,11 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2023, Advanced Micro Devices, Inc.
+ *
+ * Michal Simek <michal.simek@amd.com>
+ */
+
+int board_init(void)
+{
+ return 0;
+}
diff --git a/board/xilinx/versal/cmds.c b/board/xilinx/versal/cmds.c
index 9cc2cdc..2a74e49 100644
--- a/board/xilinx/versal/cmds.c
+++ b/board/xilinx/versal/cmds.c
@@ -98,4 +98,4 @@
U_BOOT_CMD(versal, 4, 1, do_versal,
"versal sub-system",
versal_help_text
-)
+);
diff --git a/board/xilinx/zynq/board.c b/board/xilinx/zynq/board.c
index 3b6581e..6c36591 100644
--- a/board/xilinx/zynq/board.c
+++ b/board/xilinx/zynq/board.c
@@ -184,6 +184,7 @@
"mmc 0=boot.bin fat 0 1;"
"%s fat 0 1", CONFIG_SPL_FS_LOAD_PAYLOAD_NAME);
break;
+#if defined(CONFIG_SPL_SPI_LOAD)
case ZYNQ_BM_QSPI:
snprintf(buf, DFU_ALT_BUF_LEN,
"sf 0:0=boot.bin raw 0 0x1500000;"
@@ -191,6 +192,7 @@
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME,
CONFIG_SYS_SPI_U_BOOT_OFFS);
break;
+#endif
default:
return;
}
diff --git a/board/xilinx/zynqmp/cmds.c b/board/xilinx/zynqmp/cmds.c
index f1f3eff..9524688 100644
--- a/board/xilinx/zynqmp/cmds.c
+++ b/board/xilinx/zynqmp/cmds.c
@@ -427,4 +427,4 @@
zynqmp, 9, 1, do_zynqmp,
"ZynqMP sub-system",
zynqmp_help_text
-)
+);
diff --git a/board/xilinx/zynqmp/xil_io.h b/board/xilinx/zynqmp/xil_io.h
index e6caa7c..dd823d6 100644
--- a/board/xilinx/zynqmp/xil_io.h
+++ b/board/xilinx/zynqmp/xil_io.h
@@ -5,7 +5,6 @@
/* FIXME remove this when vivado is fixed */
#include <asm/io.h>
-#include <common.h>
#include <linux/delay.h>
#define xil_printf(...)
diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c
index f162803..9f50090 100644
--- a/board/xilinx/zynqmp/zynqmp.c
+++ b/board/xilinx/zynqmp/zynqmp.c
@@ -156,9 +156,12 @@
#if defined(CONFIG_ZYNQMP_FIRMWARE)
struct udevice *dev;
- uclass_get_device_by_name(UCLASS_FIRMWARE, "zynqmp-power", &dev);
- if (!dev)
- panic("PMU Firmware device not found - Enable it");
+ uclass_get_device_by_name(UCLASS_FIRMWARE, "power-management", &dev);
+ if (!dev) {
+ uclass_get_device_by_name(UCLASS_FIRMWARE, "zynqmp-power", &dev);
+ if (!dev)
+ panic("PMU Firmware device not found - Enable it");
+ }
#endif
#if defined(CONFIG_SPL_BUILD)
@@ -670,7 +673,7 @@
len += snprintf(buf + len, DFU_ALT_BUF_LEN,
";%s raw 0x%x 0x500000",
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME,
- CONFIG_SYS_SPI_U_BOOT_OFFS);
+ multiboot * SZ_32K + CONFIG_SYS_SPI_U_BOOT_OFFS);
#endif
break;
default:
@@ -681,3 +684,18 @@
puts("DFU alt info setting: done\n");
}
#endif
+
+#if defined(CONFIG_SPL_SPI_LOAD)
+unsigned int spl_spi_get_uboot_offs(struct spi_flash *flash)
+{
+ u32 offset;
+ int multiboot = multi_boot();
+
+ offset = multiboot * SZ_32K;
+ offset += CONFIG_SYS_SPI_U_BOOT_OFFS;
+
+ log_info("SPI offset:\t0x%x\n", offset);
+
+ return offset;
+}
+#endif
diff --git a/board/xilinx/zynqmp/zynqmp_kria.env b/board/xilinx/zynqmp/zynqmp_kria.env
new file mode 100644
index 0000000..0f940bd
--- /dev/null
+++ b/board/xilinx/zynqmp/zynqmp_kria.env
@@ -0,0 +1,69 @@
+autoload=no
+baudrate=115200
+boot_a_script=load ${devtype} ${devnum}:${distro_bootpart} ${scriptaddr} ${prefix}${script}; source ${scriptaddr}
+boot_efi_binary=if fdt addr ${fdt_addr_r}; then bootefi bootmgr ${fdt_addr_r};else bootefi bootmgr ${fdtcontroladdr};fi;load ${devtype} ${devnum}:${distro_bootpart} ${kernel_addr_r} efi/boot/bootaa64.efi; if fdt addr ${fdt_addr_r}; then bootefi ${kernel_addr_r} ${fdt_addr_r};else bootefi ${kernel_addr_r} ${fdtcontroladdr};fi
+boot_extlinux=sysboot ${devtype} ${devnum}:${distro_bootpart} any ${scriptaddr} ${prefix}${boot_syslinux_conf}
+boot_net_usb_start=usb start
+boot_prefixes=/ /boot/
+boot_script_dhcp=boot.scr.uimg
+boot_scripts=boot.scr.uimg boot.scr
+boot_syslinux_conf=extlinux/extlinux.conf
+bootcmd_dhcp=run boot_net_usb_start; if dhcp ${scriptaddr} ${boot_script_dhcp}; then source ${scriptaddr}; fi;setenv efi_fdtfile ${fdtfile}; setenv efi_old_vci ${bootp_vci};setenv efi_old_arch ${bootp_arch};setenv bootp_vci PXEClient:Arch:00011:UNDI:003000;setenv bootp_arch 0xb;if dhcp ${kernel_addr_r}; then tftpboot ${fdt_addr_r} dtb/${efi_fdtfile};if fdt addr ${fdt_addr_r}; then bootefi ${kernel_addr_r} ${fdt_addr_r}; else bootefi ${kernel_addr_r} ${fdtcontroladdr};fi;fi;setenv bootp_vci ${efi_old_vci};setenv bootp_arch ${efi_old_arch};setenv efi_fdtfile;setenv efi_old_arch;setenv efi_old_vci;
+bootcmd_jtag=echo JTAG: Trying to boot script at ${scriptaddr} && source ${scriptaddr}; echo JTAG: SCRIPT FAILED: continuing...;
+bootcmd_mmc0=devnum=0; run mmc_boot
+bootcmd_mmc1=devnum=1; run mmc_boot
+bootcmd_pxe=run boot_net_usb_start; dhcp; if pxe get; then pxe boot; fi
+bootcmd_usb0=devnum=0; run usb_boot
+bootcmd_usb1=devnum=1; run usb_boot
+bootcmd_usb2=devnum=2; run usb_boot
+bootcmd_usb3=devnum=3; run usb_boot
+bootdelay=2
+bootfstype=fat
+bootm_low=0
+bootm_size=0x80000000
+distro_bootcmd=scsi_need_init=; for target in ${boot_targets}; do run bootcmd_${target}; done
+efi_dtb_prefixes=/ /dtb/ /dtb/current/
+fdt_addr_r=0x40000000
+fdt_high=0x10000000
+fileaddr=0x18000000
+initrd_high=0x79000000
+kernel_addr_r=0x18000000
+load_efi_dtb=load ${devtype} ${devnum}:${distro_bootpart} ${fdt_addr_r} ${prefix}${efi_fdtfile}
+mmc_boot=if mmc dev ${devnum}; then devtype=mmc; run scan_dev_for_boot_part; fi
+pxefile_addr_r=0x10000000
+ramdisk_addr_r=0x02100000
+scan_dev_for_boot=echo Scanning ${devtype} ${devnum}:${distro_bootpart}...; for prefix in ${boot_prefixes}; do run scan_dev_for_extlinux; run scan_dev_for_scripts; done;run scan_dev_for_efi;
+scan_dev_for_boot_part=part list ${devtype} ${devnum} -bootable devplist; env exists devplist || setenv devplist 1; for distro_bootpart in ${devplist}; do if fstype ${devtype} ${devnum}:${distro_bootpart} bootfstype; then run scan_dev_for_boot; fi; done; setenv devplist
+scan_dev_for_efi=setenv efi_fdtfile ${fdtfile}; for prefix in ${efi_dtb_prefixes}; do if test -e ${devtype} ${devnum}:${distro_bootpart} ${prefix}${efi_fdtfile}; then run load_efi_dtb; fi;done;if test -e ${devtype} ${devnum}:${distro_bootpart} efi/boot/bootaa64.efi; then echo Found EFI removable media binary efi/boot/bootaa64.efi; run boot_efi_binary; echo EFI LOAD FAILED: continuing...; fi; setenv efi_fdtfile
+scan_dev_for_extlinux=if test -e ${devtype} ${devnum}:${distro_bootpart} ${prefix}${boot_syslinux_conf}; then echo Found ${prefix}${boot_syslinux_conf}; run boot_extlinux; echo SCRIPT FAILED: continuing...; fi
+scan_dev_for_scripts=for script in ${boot_scripts}; do if test -e ${devtype} ${devnum}:${distro_bootpart} ${prefix}${script}; then echo Found U-Boot script ${prefix}${script}; run boot_a_script; echo SCRIPT FAILED: continuing...; fi; done
+script_offset_f=0x3e80000
+script_size_f=0x80000
+scriptaddr=0x20000000
+usb_boot=usb start; if usb dev ${devnum}; then devtype=usb; run scan_dev_for_boot_part; fi
+preboot=setenv boot_targets; setenv modeboot; run board_setup
+
+# SOM specific boot methods
+som_cc_boot=if test ${card1_name} = SCK-KV-G; then setenv boot_targets mmc1 usb0 usb1 usb2 usb3 pxe dhcp && run distro_bootcmd; elif test ${card1_name} = SCK-KR-G; then setenv boot_targets usb0 usb1 usb2 usb3 pxe dhcp && run distro_bootcmd; else test ${card1_name} = SCK-KD-G; setenv boot_targets usb0 usb1 usb2 usb3 pxe dhcp && run distro_bootcmd; fi;"
+som_mmc_boot=setenv boot_targets mmc0 && run distro_bootcmd
+
+k26_starter=SMK-K26-XCL2G
+k24_starter=SMK-K24-XCL2G
+bootcmd=setenv model $board_name && if setexpr model gsub .*$k24_starter* $k24_starter || setexpr model gsub .*$k26_starter* $k26_starter; then run som_cc_boot; else run som_mmc_boot; run som_cc_boot; fi
+
+usb_hub_init=mw 1000 0056 && sleep 1 && i2c write 1000 2d aa 2 -s
+
+# usb hub init
+kv260_setup=i2c dev 1 && run usb_hub_init
+# usb hub init
+kr260_setup=i2c dev 1 && run usb_hub_init; i2c dev 2 && run usb_hub_init;
+# usb hub init with enabling PM nodes for ...
+kd240_setup=i2c dev 1 && run usb_hub_init;zynqmp pmufw node 33; zynqmp pmufw node 47
+
+tpm_setup=tpm autostart;
+
+board_setup=\
+if test ${card1_name} = SCK-KV-G; then run kv260_setup; fi;\
+if test ${card1_name} = SCK-KR-G; then run kr260_setup; fi;\
+if test ${card1_name} = SCK-KD-G; then run kd240_setup; fi;\
+run tpm_setup
diff --git a/boot/Kconfig b/boot/Kconfig
index ef71883..71ee416 100644
--- a/boot/Kconfig
+++ b/boot/Kconfig
@@ -426,6 +426,7 @@
config BOOTSTD_FULL
bool "Enhanced features for standard boot"
default y if SANDBOX
+ imply BOOTSTD_DEFAULTS
help
This enables various useful features for standard boot, which are not
essential for operation:
@@ -459,6 +460,18 @@
standard boot does not support all of the features of distro boot
yet.
+config BOOTSTD_PROG
+ bool "Use programmatic boot"
+ depends on !CMDLINE
+ default y
+ help
+ Enable this to provide a board_run_command() function which can boot
+ a systen without using commands. If the boot fails, then U-Boot will
+ panic.
+
+ Note: This currently has many limitations and is not a useful booting
+ solution. Future work will eventually make this a viable option.
+
config BOOTMETH_GLOBAL
bool
help
@@ -511,7 +524,7 @@
config BOOTMETH_EFILOADER
bool "Bootdev support for EFI boot"
- depends on CMD_BOOTEFI
+ depends on EFI_BINARY_EXEC
default y
help
Enables support for EFI boot using bootdevs. This makes the
@@ -546,7 +559,7 @@
select BOOTMETH_SCRIPT if CMDLINE # E.g. Armbian uses scripts
select BOOTMETH_EXTLINUX # E.g. Debian uses these
select BOOTMETH_EXTLINUX_PXE if CMD_PXE && CMD_NET && DM_ETH
- select BOOTMETH_EFILOADER if CMD_BOOTEFI # E.g. Ubuntu uses this
+ select BOOTMETH_EFILOADER if EFI_BINARY_EXEC # E.g. Ubuntu uses this
config SPL_BOOTMETH_VBE
bool "Bootdev support for Verified Boot for Embedded (SPL)"
@@ -1502,6 +1515,15 @@
menu "Devicetree fixup"
+config OF_ENV_SETUP
+ bool "Run a command from environment to set up device tree before boot"
+ depends on CMD_FDT
+ help
+ This causes U-Boot to run a command from the environment variable
+ fdt_fixup before booting into the operating system, which can use the
+ fdt command to modify the device tree. The device tree is then passed
+ to the OS.
+
config OF_BOARD_SETUP
bool "Set up board-specific details in device tree before boot"
help
@@ -1666,7 +1688,7 @@
config CEDIT
bool "Configuration editor"
- depends on BOOTSTD
+ depends on EXPO
help
Provides a way to deal with board configuration and present it to
the user for adjustment.
diff --git a/boot/Makefile b/boot/Makefile
index 3fd048b..f0a279c 100644
--- a/boot/Makefile
+++ b/boot/Makefile
@@ -25,17 +25,19 @@
obj-$(CONFIG_$(SPL_TPL_)BOOTSTD) += bootmeth-uclass.o
obj-$(CONFIG_$(SPL_TPL_)BOOTSTD) += bootstd-uclass.o
+obj-$(CONFIG_$(SPL_TPL_)BOOTSTD_PROG) += prog_boot.o
+
obj-$(CONFIG_$(SPL_TPL_)BOOTMETH_EXTLINUX) += bootmeth_extlinux.o
obj-$(CONFIG_$(SPL_TPL_)BOOTMETH_EXTLINUX_PXE) += bootmeth_pxe.o
obj-$(CONFIG_$(SPL_TPL_)BOOTMETH_EFILOADER) += bootmeth_efi.o
obj-$(CONFIG_$(SPL_TPL_)BOOTMETH_CROS) += bootm.o bootm_os.o bootmeth_cros.o
obj-$(CONFIG_$(SPL_TPL_)BOOTMETH_SANDBOX) += bootmeth_sandbox.o
obj-$(CONFIG_$(SPL_TPL_)BOOTMETH_SCRIPT) += bootmeth_script.o
+obj-$(CONFIG_$(SPL_TPL_)CEDIT) += cedit.o
ifdef CONFIG_$(SPL_TPL_)BOOTSTD_FULL
-obj-$(CONFIG_CMD_BOOTEFI_BOOTMGR) += bootmeth_efi_mgr.o
+obj-$(CONFIG_EFI_BOOTMGR) += bootmeth_efi_mgr.o
obj-$(CONFIG_$(SPL_TPL_)EXPO) += bootflow_menu.o
obj-$(CONFIG_$(SPL_TPL_)BOOTSTD) += bootflow_menu.o
-obj-$(CONFIG_$(SPL_TPL_)CEDIT) += cedit.o
endif
obj-$(CONFIG_$(SPL_TPL_)OF_LIBFDT) += fdt_support.o
diff --git a/boot/android_ab.c b/boot/android_ab.c
index 0f20a34..c9df6d2 100644
--- a/boot/android_ab.c
+++ b/boot/android_ab.c
@@ -336,7 +336,14 @@
if (store_needed) {
abc->crc32_le = ab_control_compute_crc(abc);
- ab_control_store(dev_desc, part_info, abc, 0);
+ ret = ab_control_store(dev_desc, part_info, abc, 0);
+ if (ret < 0) {
+#if ANDROID_AB_BACKUP_OFFSET
+ free(backup_abc);
+#endif
+ free(abc);
+ return ret;
+ }
}
#if ANDROID_AB_BACKUP_OFFSET
@@ -345,8 +352,13 @@
* to the backup offset
*/
if (memcmp(backup_abc, abc, sizeof(*abc)) != 0) {
- ab_control_store(dev_desc, part_info, abc,
- ANDROID_AB_BACKUP_OFFSET);
+ ret = ab_control_store(dev_desc, part_info, abc,
+ ANDROID_AB_BACKUP_OFFSET);
+ if (ret < 0) {
+ free(backup_abc);
+ free(abc);
+ return ret;
+ }
}
free(backup_abc);
#endif
diff --git a/boot/bootdev-uclass.c b/boot/bootdev-uclass.c
index 4926a50..35afb93 100644
--- a/boot/bootdev-uclass.c
+++ b/boot/bootdev-uclass.c
@@ -632,7 +632,7 @@
int bootdev_next_prio(struct bootflow_iter *iter, struct udevice **devp)
{
- struct udevice *dev = *devp;
+ struct udevice *dev = *devp, *last_dev = NULL;
bool found;
int ret;
@@ -682,9 +682,19 @@
}
} else {
ret = device_probe(dev);
+ if (!ret)
+ last_dev = dev;
if (ret) {
- log_debug("Device '%s' failed to probe\n",
+ log_warning("Device '%s' failed to probe\n",
dev->name);
+ if (last_dev == dev) {
+ /*
+ * We have already tried this device
+ * and it failed to probe. Give up.
+ */
+ return log_msg_ret("probe", ret);
+ }
+ last_dev = dev;
dev = NULL;
}
}
diff --git a/boot/bootflow.c b/boot/bootflow.c
index 1ea2966..05484fd 100644
--- a/boot/bootflow.c
+++ b/boot/bootflow.c
@@ -361,7 +361,7 @@
}
/* Unless there is nothing more to try, move to the next device */
- else if (ret != BF_NO_MORE_PARTS && ret != -ENOSYS) {
+ if (ret != BF_NO_MORE_PARTS && ret != -ENOSYS) {
log_debug("Bootdev '%s' part %d method '%s': Error %d\n",
dev->name, iter->part, iter->method->name, ret);
/*
@@ -371,10 +371,8 @@
if (iter->flags & BOOTFLOWIF_ALL)
return log_msg_ret("all", ret);
}
- if (ret)
- return log_msg_ret("check", ret);
- return 0;
+ return log_msg_ret("check", ret);
}
int bootflow_scan_first(struct udevice *dev, const char *label,
diff --git a/boot/bootflow_menu.c b/boot/bootflow_menu.c
index 7c1abe5..16f9cd8 100644
--- a/boot/bootflow_menu.c
+++ b/boot/bootflow_menu.c
@@ -120,7 +120,6 @@
if (ret < 0)
return log_msg_ret("itm", -EINVAL);
- ret = 0;
priv->num_bootflows++;
}
diff --git a/boot/bootm.c b/boot/bootm.c
index cb61485..d071537 100644
--- a/boot/bootm.c
+++ b/boot/bootm.c
@@ -6,6 +6,7 @@
#ifndef USE_HOSTCC
#include <common.h>
+#include <bootm.h>
#include <bootstage.h>
#include <cli.h>
#include <command.h>
@@ -44,14 +45,200 @@
struct bootm_headers images; /* pointers to os/initrd/fdt images */
-static const void *boot_get_kernel(struct cmd_tbl *cmdtp, int flag, int argc,
- char *const argv[], struct bootm_headers *images,
- ulong *os_data, ulong *os_len);
-
__weak void board_quiesce_devices(void)
{
}
+#if CONFIG_IS_ENABLED(LEGACY_IMAGE_FORMAT)
+/**
+ * image_get_kernel - verify legacy format kernel image
+ * @img_addr: in RAM address of the legacy format image to be verified
+ * @verify: data CRC verification flag
+ *
+ * image_get_kernel() verifies legacy image integrity and returns pointer to
+ * legacy image header if image verification was completed successfully.
+ *
+ * returns:
+ * pointer to a legacy image header if valid image was found
+ * otherwise return NULL
+ */
+static struct legacy_img_hdr *image_get_kernel(ulong img_addr, int verify)
+{
+ struct legacy_img_hdr *hdr = (struct legacy_img_hdr *)img_addr;
+
+ if (!image_check_magic(hdr)) {
+ puts("Bad Magic Number\n");
+ bootstage_error(BOOTSTAGE_ID_CHECK_MAGIC);
+ return NULL;
+ }
+ bootstage_mark(BOOTSTAGE_ID_CHECK_HEADER);
+
+ if (!image_check_hcrc(hdr)) {
+ puts("Bad Header Checksum\n");
+ bootstage_error(BOOTSTAGE_ID_CHECK_HEADER);
+ return NULL;
+ }
+
+ bootstage_mark(BOOTSTAGE_ID_CHECK_CHECKSUM);
+ image_print_contents(hdr);
+
+ if (verify) {
+ puts(" Verifying Checksum ... ");
+ if (!image_check_dcrc(hdr)) {
+ printf("Bad Data CRC\n");
+ bootstage_error(BOOTSTAGE_ID_CHECK_CHECKSUM);
+ return NULL;
+ }
+ puts("OK\n");
+ }
+ bootstage_mark(BOOTSTAGE_ID_CHECK_ARCH);
+
+ if (!image_check_target_arch(hdr)) {
+ printf("Unsupported Architecture 0x%x\n", image_get_arch(hdr));
+ bootstage_error(BOOTSTAGE_ID_CHECK_ARCH);
+ return NULL;
+ }
+ return hdr;
+}
+#endif
+
+/**
+ * boot_get_kernel() - find kernel image
+ *
+ * @addr_fit: first argument to bootm: address, fit configuration, etc.
+ * @os_data: pointer to a ulong variable, will hold os data start address
+ * @os_len: pointer to a ulong variable, will hold os data length
+ * address and length, otherwise NULL
+ * pointer to image header if valid image was found, plus kernel start
+ * @kernp: image header if valid image was found, otherwise NULL
+ *
+ * boot_get_kernel() tries to find a kernel image, verifies its integrity
+ * and locates kernel data.
+ *
+ * Return: 0 on success, -ve on error. -EPROTOTYPE means that the image is in
+ * a wrong or unsupported format
+ */
+static int boot_get_kernel(const char *addr_fit, struct bootm_headers *images,
+ ulong *os_data, ulong *os_len, const void **kernp)
+{
+#if CONFIG_IS_ENABLED(LEGACY_IMAGE_FORMAT)
+ struct legacy_img_hdr *hdr;
+#endif
+ ulong img_addr;
+ const void *buf;
+ const char *fit_uname_config = NULL, *fit_uname_kernel = NULL;
+#if CONFIG_IS_ENABLED(FIT)
+ int os_noffset;
+#endif
+
+#ifdef CONFIG_ANDROID_BOOT_IMAGE
+ const void *boot_img;
+ const void *vendor_boot_img;
+#endif
+ img_addr = genimg_get_kernel_addr_fit(addr_fit, &fit_uname_config,
+ &fit_uname_kernel);
+
+ if (IS_ENABLED(CONFIG_CMD_BOOTM_PRE_LOAD))
+ img_addr += image_load_offset;
+
+ bootstage_mark(BOOTSTAGE_ID_CHECK_MAGIC);
+
+ /* check image type, for FIT images get FIT kernel node */
+ *os_data = *os_len = 0;
+ buf = map_sysmem(img_addr, 0);
+ switch (genimg_get_format(buf)) {
+#if CONFIG_IS_ENABLED(LEGACY_IMAGE_FORMAT)
+ case IMAGE_FORMAT_LEGACY:
+ printf("## Booting kernel from Legacy Image at %08lx ...\n",
+ img_addr);
+ hdr = image_get_kernel(img_addr, images->verify);
+ if (!hdr)
+ return -EINVAL;
+ bootstage_mark(BOOTSTAGE_ID_CHECK_IMAGETYPE);
+
+ /* get os_data and os_len */
+ switch (image_get_type(hdr)) {
+ case IH_TYPE_KERNEL:
+ case IH_TYPE_KERNEL_NOLOAD:
+ *os_data = image_get_data(hdr);
+ *os_len = image_get_data_size(hdr);
+ break;
+ case IH_TYPE_MULTI:
+ image_multi_getimg(hdr, 0, os_data, os_len);
+ break;
+ case IH_TYPE_STANDALONE:
+ *os_data = image_get_data(hdr);
+ *os_len = image_get_data_size(hdr);
+ break;
+ default:
+ bootstage_error(BOOTSTAGE_ID_CHECK_IMAGETYPE);
+ return -EPROTOTYPE;
+ }
+
+ /*
+ * copy image header to allow for image overwrites during
+ * kernel decompression.
+ */
+ memmove(&images->legacy_hdr_os_copy, hdr,
+ sizeof(struct legacy_img_hdr));
+
+ /* save pointer to image header */
+ images->legacy_hdr_os = hdr;
+
+ images->legacy_hdr_valid = 1;
+ bootstage_mark(BOOTSTAGE_ID_DECOMP_IMAGE);
+ break;
+#endif
+#if CONFIG_IS_ENABLED(FIT)
+ case IMAGE_FORMAT_FIT:
+ os_noffset = fit_image_load(images, img_addr,
+ &fit_uname_kernel, &fit_uname_config,
+ IH_ARCH_DEFAULT, IH_TYPE_KERNEL,
+ BOOTSTAGE_ID_FIT_KERNEL_START,
+ FIT_LOAD_IGNORED, os_data, os_len);
+ if (os_noffset < 0)
+ return -ENOENT;
+
+ images->fit_hdr_os = map_sysmem(img_addr, 0);
+ images->fit_uname_os = fit_uname_kernel;
+ images->fit_uname_cfg = fit_uname_config;
+ images->fit_noffset_os = os_noffset;
+ break;
+#endif
+#ifdef CONFIG_ANDROID_BOOT_IMAGE
+ case IMAGE_FORMAT_ANDROID: {
+ int ret;
+
+ boot_img = buf;
+ vendor_boot_img = NULL;
+ if (IS_ENABLED(CONFIG_CMD_ABOOTIMG)) {
+ boot_img = map_sysmem(get_abootimg_addr(), 0);
+ vendor_boot_img = map_sysmem(get_avendor_bootimg_addr(), 0);
+ }
+ printf("## Booting Android Image at 0x%08lx ...\n", img_addr);
+ ret = android_image_get_kernel(boot_img, vendor_boot_img,
+ images->verify, os_data, os_len);
+ if (IS_ENABLED(CONFIG_CMD_ABOOTIMG)) {
+ unmap_sysmem(vendor_boot_img);
+ unmap_sysmem(boot_img);
+ }
+ if (ret)
+ return ret;
+ break;
+ }
+#endif
+ default:
+ bootstage_error(BOOTSTAGE_ID_CHECK_IMAGETYPE);
+ return -EPROTOTYPE;
+ }
+
+ debug(" kernel data at 0x%08lx, len = 0x%08lx (%ld)\n",
+ *os_data, *os_len, *os_len);
+ *kernp = buf;
+
+ return 0;
+}
+
#ifdef CONFIG_LMB
static void boot_start_lmb(struct bootm_headers *images)
{
@@ -69,8 +256,7 @@
static inline void boot_start_lmb(struct bootm_headers *images) { }
#endif
-static int bootm_start(struct cmd_tbl *cmdtp, int flag, int argc,
- char *const argv[])
+static int bootm_start(void)
{
memset((void *)&images, 0, sizeof(images));
images.verify = env_get_yesno("verify");
@@ -83,22 +269,31 @@
return 0;
}
-static ulong bootm_data_addr(int argc, char *const argv[])
+static ulong bootm_data_addr(const char *addr_str)
{
ulong addr;
- if (argc > 0)
- addr = simple_strtoul(argv[0], NULL, 16);
+ if (addr_str)
+ addr = hextoul(addr_str, NULL);
else
addr = image_load_addr;
return addr;
}
-static int bootm_pre_load(struct cmd_tbl *cmdtp, int flag, int argc,
- char *const argv[])
+/**
+ * bootm_pre_load() - Handle the pre-load processing
+ *
+ * This can be used to do a full signature check of the image, for example.
+ * It calls image_pre_load() with the data address of the image to check.
+ *
+ * @addr_str: String containing load address in hex, or NULL to use
+ * image_load_addr
+ * Return: 0 if OK, CMD_RET_FAILURE on failure
+ */
+static int bootm_pre_load(const char *addr_str)
{
- ulong data_addr = bootm_data_addr(argc, argv);
+ ulong data_addr = bootm_data_addr(addr_str);
int ret = 0;
if (IS_ENABLED(CONFIG_CMD_BOOTM_PRE_LOAD))
@@ -110,8 +305,14 @@
return ret;
}
-static int bootm_find_os(struct cmd_tbl *cmdtp, int flag, int argc,
- char *const argv[])
+/**
+ * bootm_find_os(): Find the OS to boot
+ *
+ * @cmd_name: Command name that started this boot, e.g. "bootm"
+ * @addr_fit: Address and/or FIT specifier (first arg of bootm command)
+ * Return: 0 on success, -ve on error
+ */
+static int bootm_find_os(const char *cmd_name, const char *addr_fit)
{
const void *os_hdr;
#ifdef CONFIG_ANDROID_BOOT_IMAGE
@@ -122,10 +323,13 @@
int ret;
/* get kernel image header, start address and length */
- os_hdr = boot_get_kernel(cmdtp, flag, argc, argv,
- &images, &images.os.image_start, &images.os.image_len);
- if (images.os.image_len == 0) {
- puts("ERROR: can't get kernel image!\n");
+ ret = boot_get_kernel(addr_fit, &images, &images.os.image_start,
+ &images.os.image_len, &os_hdr);
+ if (ret) {
+ if (ret == -EPROTOTYPE)
+ printf("Wrong Image Type for %s command\n", cmd_name);
+
+ printf("ERROR %dE: can't get kernel image!\n", ret);
return 1;
}
@@ -240,24 +444,8 @@
}
if (images.os.type == IH_TYPE_KERNEL_NOLOAD) {
- if (IS_ENABLED(CONFIG_CMD_BOOTI) &&
- images.os.arch == IH_ARCH_ARM64 &&
- images.os.os == IH_OS_LINUX) {
- ulong image_addr;
- ulong image_size;
-
- ret = booti_setup(images.os.image_start, &image_addr,
- &image_size, true);
- if (ret != 0)
- return 1;
-
- images.os.type = IH_TYPE_KERNEL;
- images.os.load = image_addr;
- images.ep = image_addr;
- } else {
- images.os.load = images.os.image_start;
- images.ep += images.os.image_start;
- }
+ images.os.load = images.os.image_start;
+ images.ep += images.os.image_start;
}
images.os.start = map_to_sysmem(os_hdr);
@@ -266,30 +454,58 @@
}
/**
- * bootm_find_images - wrapper to find and locate various images
- * @flag: Ignored Argument
- * @argc: command argument count
- * @argv: command argument list
- * @start: OS image start address
- * @size: OS image size
+ * check_overlap() - Check if an image overlaps the OS
*
- * boot_find_images() will attempt to load an available ramdisk,
- * flattened device tree, as well as specifically marked
- * "loadable" images (loadables are FIT only)
- *
- * Note: bootm_find_images will skip an image if it is not found
- *
- * @return:
- * 0, if all existing images were loaded correctly
- * 1, if an image is found but corrupted, or invalid
+ * @name: Name of image to check (used to print error)
+ * @base: Base address of image
+ * @end: End address of image (+1)
+ * @os_start: Start of OS
+ * @os_size: Size of OS in bytes
+ * Return: 0 if OK, -EXDEV if the image overlaps the OS
*/
-int bootm_find_images(int flag, int argc, char *const argv[], ulong start,
- ulong size)
+static int check_overlap(const char *name, ulong base, ulong end,
+ ulong os_start, ulong os_size)
{
+ ulong os_end;
+
+ if (!base)
+ return 0;
+ os_end = os_start + os_size;
+
+ if ((base >= os_start && base < os_end) ||
+ (end > os_start && end <= os_end) ||
+ (base < os_start && end >= os_end)) {
+ printf("ERROR: %s image overlaps OS image (OS=%lx..%lx)\n",
+ name, os_start, os_end);
+
+ return -EXDEV;
+ }
+
+ return 0;
+}
+
+int bootm_find_images(ulong img_addr, const char *conf_ramdisk,
+ const char *conf_fdt, ulong start, ulong size)
+{
+ const char *select = conf_ramdisk;
+ char addr_str[17];
+ void *buf;
int ret;
+ if (IS_ENABLED(CONFIG_ANDROID_BOOT_IMAGE)) {
+ /* Look for an Android boot image */
+ buf = map_sysmem(images.os.start, 0);
+ if (buf && genimg_get_format(buf) == IMAGE_FORMAT_ANDROID) {
+ strcpy(addr_str, simple_xtoa(img_addr));
+ select = addr_str;
+ }
+ }
+
+ if (conf_ramdisk)
+ select = conf_ramdisk;
+
/* find ramdisk */
- ret = boot_get_ramdisk(argc, argv, &images, IH_INITRD_ARCH,
+ ret = boot_get_ramdisk(select, &images, IH_INITRD_ARCH,
&images.rd_start, &images.rd_end);
if (ret) {
puts("Ramdisk image is corrupt or invalid\n");
@@ -297,46 +513,33 @@
}
/* check if ramdisk overlaps OS image */
- if (images.rd_start && (((ulong)images.rd_start >= start &&
- (ulong)images.rd_start < start + size) ||
- ((ulong)images.rd_end > start &&
- (ulong)images.rd_end <= start + size) ||
- ((ulong)images.rd_start < start &&
- (ulong)images.rd_end >= start + size))) {
- printf("ERROR: RD image overlaps OS image (OS=0x%lx..0x%lx)\n",
- start, start + size);
+ if (check_overlap("RD", images.rd_start, images.rd_end, start, size))
return 1;
- }
-#if CONFIG_IS_ENABLED(OF_LIBFDT)
- /* find flattened device tree */
- ret = boot_get_fdt(flag, argc, argv, IH_ARCH_DEFAULT, &images,
- &images.ft_addr, &images.ft_len);
- if (ret) {
- puts("Could not find a valid device tree\n");
- return 1;
- }
+ if (CONFIG_IS_ENABLED(OF_LIBFDT)) {
+ buf = map_sysmem(img_addr, 0);
- /* check if FDT overlaps OS image */
- if (images.ft_addr &&
- (((ulong)images.ft_addr >= start &&
- (ulong)images.ft_addr < start + size) ||
- ((ulong)images.ft_addr + images.ft_len >= start &&
- (ulong)images.ft_addr + images.ft_len < start + size))) {
- printf("ERROR: FDT image overlaps OS image (OS=0x%lx..0x%lx)\n",
- start, start + size);
- return 1;
- }
+ /* find flattened device tree */
+ ret = boot_get_fdt(buf, conf_fdt, IH_ARCH_DEFAULT, &images,
+ &images.ft_addr, &images.ft_len);
+ if (ret) {
+ puts("Could not find a valid device tree\n");
+ return 1;
+ }
- if (IS_ENABLED(CONFIG_CMD_FDT))
- set_working_fdt_addr(map_to_sysmem(images.ft_addr));
-#endif
+ /* check if FDT overlaps OS image */
+ if (check_overlap("FDT", map_to_sysmem(images.ft_addr),
+ images.ft_len, start, size))
+ return 1;
+
+ if (IS_ENABLED(CONFIG_CMD_FDT))
+ set_working_fdt_addr(map_to_sysmem(images.ft_addr));
+ }
#if CONFIG_IS_ENABLED(FIT)
if (IS_ENABLED(CONFIG_FPGA)) {
/* find bitstreams */
- ret = boot_get_fpga(argc, argv, &images, IH_ARCH_DEFAULT,
- NULL, NULL);
+ ret = boot_get_fpga(&images);
if (ret) {
printf("FPGA image is corrupted or invalid\n");
return 1;
@@ -344,8 +547,7 @@
}
/* find all of the loadables */
- ret = boot_get_loadable(argc, argv, &images, IH_ARCH_DEFAULT,
- NULL, NULL);
+ ret = boot_get_loadable(&images);
if (ret) {
printf("Loadable(s) is corrupt or invalid\n");
return 1;
@@ -355,15 +557,17 @@
return 0;
}
-static int bootm_find_other(struct cmd_tbl *cmdtp, int flag, int argc,
- char *const argv[])
+static int bootm_find_other(ulong img_addr, const char *conf_ramdisk,
+ const char *conf_fdt)
{
- if (((images.os.type == IH_TYPE_KERNEL) ||
- (images.os.type == IH_TYPE_KERNEL_NOLOAD) ||
- (images.os.type == IH_TYPE_MULTI)) &&
- (images.os.os == IH_OS_LINUX ||
- images.os.os == IH_OS_VXWORKS))
- return bootm_find_images(flag, argc, argv, 0, 0);
+ if ((images.os.type == IH_TYPE_KERNEL ||
+ images.os.type == IH_TYPE_KERNEL_NOLOAD ||
+ images.os.type == IH_TYPE_MULTI) &&
+ (images.os.os == IH_OS_LINUX || images.os.os == IH_OS_VXWORKS ||
+ images.os.os == IH_OS_EFI || images.os.os == IH_OS_TEE)) {
+ return bootm_find_images(img_addr, conf_ramdisk, conf_fdt, 0,
+ 0);
+ }
return 0;
}
@@ -426,6 +630,25 @@
void *load_buf, *image_buf;
int err;
+ /*
+ * For a "noload" compressed kernel we need to allocate a buffer large
+ * enough to decompress in to and use that as the load address now.
+ * Assume that the kernel compression is at most a factor of 4 since
+ * zstd almost achieves that.
+ * Use an alignment of 2MB since this might help arm64
+ */
+ if (os.type == IH_TYPE_KERNEL_NOLOAD && os.comp != IH_COMP_NONE) {
+ ulong req_size = ALIGN(image_len * 4, SZ_1M);
+
+ load = lmb_alloc(&images->lmb, req_size, SZ_2M);
+ if (!load)
+ return 1;
+ os.load = load;
+ images->ep = load;
+ debug("Allocated %lx bytes at %lx for kernel (size %lx) decompression\n",
+ req_size, load, image_len);
+ }
+
load_buf = map_sysmem(load, 0);
image_buf = map_sysmem(os.image_start, image_len);
err = image_decomp(os.comp, load, os.image_start, os.type,
@@ -466,6 +689,31 @@
}
}
+ if (IS_ENABLED(CONFIG_CMD_BOOTI) && images->os.arch == IH_ARCH_ARM64 &&
+ images->os.os == IH_OS_LINUX) {
+ ulong relocated_addr;
+ ulong image_size;
+ int ret;
+
+ ret = booti_setup(load, &relocated_addr, &image_size, false);
+ if (ret) {
+ printf("Failed to prep arm64 kernel (err=%d)\n", ret);
+ return BOOTM_ERR_RESET;
+ }
+
+ /* Handle BOOTM_STATE_LOADOS */
+ if (relocated_addr != load) {
+ printf("Moving Image from 0x%lx to 0x%lx, end=%lx\n",
+ load, relocated_addr,
+ relocated_addr + image_size);
+ memmove((void *)relocated_addr, load_buf, image_size);
+ }
+
+ images->ep = relocated_addr;
+ images->os.start = relocated_addr;
+ images->os.end = relocated_addr + image_size;
+ }
+
lmb_reserve(&images->lmb, images->os.load, (load_end -
images->os.load));
return 0;
@@ -743,35 +991,9 @@
return ret;
}
-/**
- * Execute selected states of the bootm command.
- *
- * Note the arguments to this state must be the first argument, Any 'bootm'
- * or sub-command arguments must have already been taken.
- *
- * Note that if states contains more than one flag it MUST contain
- * BOOTM_STATE_START, since this handles and consumes the command line args.
- *
- * Also note that aside from boot_os_fn functions and bootm_load_os no other
- * functions we store the return value of in 'ret' may use a negative return
- * value, without special handling.
- *
- * @param cmdtp Pointer to bootm command table entry
- * @param flag Command flags (CMD_FLAG_...)
- * @param argc Number of subcommand arguments (0 = no arguments)
- * @param argv Arguments
- * @param states Mask containing states to run (BOOTM_STATE_...)
- * @param images Image header information
- * @param boot_progress 1 to show boot progress, 0 to not do this
- * Return: 0 if ok, something else on error. Some errors will cause this
- * function to perform a reboot! If states contains BOOTM_STATE_OS_GO
- * then the intent is to boot an OS, so this function will not return
- * unless the image type is standalone.
- */
-int do_bootm_states(struct cmd_tbl *cmdtp, int flag, int argc,
- char *const argv[], int states, struct bootm_headers *images,
- int boot_progress)
+int bootm_run_states(struct bootm_info *bmi, int states)
{
+ struct bootm_headers *images = bmi->images;
boot_os_fn *boot_fn;
ulong iflag = 0;
int ret = 0, need_boot_fn;
@@ -783,16 +1005,22 @@
* any error.
*/
if (states & BOOTM_STATE_START)
- ret = bootm_start(cmdtp, flag, argc, argv);
+ ret = bootm_start();
if (!ret && (states & BOOTM_STATE_PRE_LOAD))
- ret = bootm_pre_load(cmdtp, flag, argc, argv);
+ ret = bootm_pre_load(bmi->addr_img);
if (!ret && (states & BOOTM_STATE_FINDOS))
- ret = bootm_find_os(cmdtp, flag, argc, argv);
+ ret = bootm_find_os(bmi->cmd_name, bmi->addr_img);
- if (!ret && (states & BOOTM_STATE_FINDOTHER))
- ret = bootm_find_other(cmdtp, flag, argc, argv);
+ if (!ret && (states & BOOTM_STATE_FINDOTHER)) {
+ ulong img_addr;
+
+ img_addr = bmi->addr_img ? hextoul(bmi->addr_img, NULL)
+ : image_load_addr;
+ ret = bootm_find_other(img_addr, bmi->conf_ramdisk,
+ bmi->conf_fdt);
+ }
if (IS_ENABLED(CONFIG_MEASURED_BOOT) && !ret &&
(states & BOOTM_STATE_MEASURE))
@@ -845,20 +1073,23 @@
return 1;
}
-
/* Call various other states that are not generally used */
if (!ret && (states & BOOTM_STATE_OS_CMDLINE))
- ret = boot_fn(BOOTM_STATE_OS_CMDLINE, argc, argv, images);
+ ret = boot_fn(BOOTM_STATE_OS_CMDLINE, bmi);
if (!ret && (states & BOOTM_STATE_OS_BD_T))
- ret = boot_fn(BOOTM_STATE_OS_BD_T, argc, argv, images);
+ ret = boot_fn(BOOTM_STATE_OS_BD_T, bmi);
if (!ret && (states & BOOTM_STATE_OS_PREP)) {
- ret = bootm_process_cmdline_env(images->os.os == IH_OS_LINUX);
+ int flags = 0;
+ /* For Linux OS do all substitutions at console processing */
+ if (images->os.os == IH_OS_LINUX)
+ flags = BOOTM_CL_ALL;
+ ret = bootm_process_cmdline_env(flags);
if (ret) {
printf("Cmdline setup failed (err=%d)\n", ret);
ret = CMD_RET_FAILURE;
goto err;
}
- ret = boot_fn(BOOTM_STATE_OS_PREP, argc, argv, images);
+ ret = boot_fn(BOOTM_STATE_OS_PREP, bmi);
}
#ifdef CONFIG_TRACE
@@ -866,10 +1097,9 @@
if (!ret && (states & BOOTM_STATE_OS_FAKE_GO)) {
char *cmd_list = env_get("fakegocmd");
- ret = boot_selected_os(argc, argv, BOOTM_STATE_OS_FAKE_GO,
- images, boot_fn);
+ ret = boot_selected_os(BOOTM_STATE_OS_FAKE_GO, bmi, boot_fn);
if (!ret && cmd_list)
- ret = run_command_list(cmd_list, -1, flag);
+ ret = run_command_list(cmd_list, -1, 0);
}
#endif
@@ -881,37 +1111,61 @@
/* Now run the OS! We hope this doesn't return */
if (!ret && (states & BOOTM_STATE_OS_GO))
- ret = boot_selected_os(argc, argv, BOOTM_STATE_OS_GO,
- images, boot_fn);
+ ret = boot_selected_os(BOOTM_STATE_OS_GO, bmi, boot_fn);
/* Deal with any fallout */
err:
if (iflag)
enable_interrupts();
- if (ret == BOOTM_ERR_UNIMPLEMENTED)
+ if (ret == BOOTM_ERR_UNIMPLEMENTED) {
bootstage_error(BOOTSTAGE_ID_DECOMP_UNIMPL);
- else if (ret == BOOTM_ERR_RESET)
- do_reset(cmdtp, flag, argc, argv);
+ } else if (ret == BOOTM_ERR_RESET) {
+ printf("Resetting the board...\n");
+ reset_cpu();
+ }
return ret;
}
+int boot_run(struct bootm_info *bmi, const char *cmd, int extra_states)
+{
+ int states;
+
+ bmi->cmd_name = cmd;
+ states = BOOTM_STATE_MEASURE | BOOTM_STATE_OS_PREP |
+ BOOTM_STATE_OS_FAKE_GO | BOOTM_STATE_OS_GO;
+ if (IS_ENABLED(CONFIG_SYS_BOOT_RAMDISK_HIGH))
+ states |= BOOTM_STATE_RAMDISK;
+ states |= extra_states;
+
+ return bootm_run_states(bmi, states);
+}
+
+int bootm_run(struct bootm_info *bmi)
+{
+ return boot_run(bmi, "bootm", BOOTM_STATE_START | BOOTM_STATE_FINDOS |
+ BOOTM_STATE_PRE_LOAD | BOOTM_STATE_FINDOTHER |
+ BOOTM_STATE_LOADOS);
+}
+
+int bootz_run(struct bootm_info *bmi)
+{
+ return boot_run(bmi, "bootz", 0);
+}
+
+int booti_run(struct bootm_info *bmi)
+{
+ return boot_run(bmi, "booti", 0);
+}
+
int bootm_boot_start(ulong addr, const char *cmdline)
{
- static struct cmd_tbl cmd = {"bootm"};
char addr_str[30];
- char *argv[] = {addr_str, NULL};
+ struct bootm_info bmi;
int states;
int ret;
- /*
- * TODO(sjg@chromium.org): This uses the command-line interface, but
- * should not. To clean this up, the various bootm states need to be
- * passed an info structure instead of cmdline flags. Then this can
- * set up the required info and move through the states without needing
- * the command line.
- */
states = BOOTM_STATE_START | BOOTM_STATE_FINDOS | BOOTM_STATE_PRE_LOAD |
BOOTM_STATE_FINDOTHER | BOOTM_STATE_LOADOS |
BOOTM_STATE_OS_PREP | BOOTM_STATE_OS_FAKE_GO |
@@ -929,196 +1183,20 @@
printf("Failed to set cmdline\n");
return ret;
}
- ret = do_bootm_states(&cmd, 0, 1, argv, states, &images, 1);
+ bootm_init(&bmi);
+ bmi.addr_img = addr_str;
+ bmi.cmd_name = "bootm";
+ ret = bootm_run_states(&bmi, states);
return ret;
}
-#if CONFIG_IS_ENABLED(LEGACY_IMAGE_FORMAT)
-/**
- * image_get_kernel - verify legacy format kernel image
- * @img_addr: in RAM address of the legacy format image to be verified
- * @verify: data CRC verification flag
- *
- * image_get_kernel() verifies legacy image integrity and returns pointer to
- * legacy image header if image verification was completed successfully.
- *
- * returns:
- * pointer to a legacy image header if valid image was found
- * otherwise return NULL
- */
-static struct legacy_img_hdr *image_get_kernel(ulong img_addr, int verify)
+void bootm_init(struct bootm_info *bmi)
{
- struct legacy_img_hdr *hdr = (struct legacy_img_hdr *)img_addr;
-
- if (!image_check_magic(hdr)) {
- puts("Bad Magic Number\n");
- bootstage_error(BOOTSTAGE_ID_CHECK_MAGIC);
- return NULL;
- }
- bootstage_mark(BOOTSTAGE_ID_CHECK_HEADER);
-
- if (!image_check_hcrc(hdr)) {
- puts("Bad Header Checksum\n");
- bootstage_error(BOOTSTAGE_ID_CHECK_HEADER);
- return NULL;
- }
-
- bootstage_mark(BOOTSTAGE_ID_CHECK_CHECKSUM);
- image_print_contents(hdr);
-
- if (verify) {
- puts(" Verifying Checksum ... ");
- if (!image_check_dcrc(hdr)) {
- printf("Bad Data CRC\n");
- bootstage_error(BOOTSTAGE_ID_CHECK_CHECKSUM);
- return NULL;
- }
- puts("OK\n");
- }
- bootstage_mark(BOOTSTAGE_ID_CHECK_ARCH);
-
- if (!image_check_target_arch(hdr)) {
- printf("Unsupported Architecture 0x%x\n", image_get_arch(hdr));
- bootstage_error(BOOTSTAGE_ID_CHECK_ARCH);
- return NULL;
- }
- return hdr;
-}
-#endif
-
-/**
- * boot_get_kernel - find kernel image
- * @os_data: pointer to a ulong variable, will hold os data start address
- * @os_len: pointer to a ulong variable, will hold os data length
- *
- * boot_get_kernel() tries to find a kernel image, verifies its integrity
- * and locates kernel data.
- *
- * returns:
- * pointer to image header if valid image was found, plus kernel start
- * address and length, otherwise NULL
- */
-static const void *boot_get_kernel(struct cmd_tbl *cmdtp, int flag, int argc,
- char *const argv[], struct bootm_headers *images,
- ulong *os_data, ulong *os_len)
-{
-#if CONFIG_IS_ENABLED(LEGACY_IMAGE_FORMAT)
- struct legacy_img_hdr *hdr;
-#endif
- ulong img_addr;
- const void *buf;
- const char *fit_uname_config = NULL;
- const char *fit_uname_kernel = NULL;
-#if CONFIG_IS_ENABLED(FIT)
- int os_noffset;
-#endif
-
-#ifdef CONFIG_ANDROID_BOOT_IMAGE
- const void *boot_img;
- const void *vendor_boot_img;
-#endif
- img_addr = genimg_get_kernel_addr_fit(argc < 1 ? NULL : argv[0],
- &fit_uname_config,
- &fit_uname_kernel);
-
- if (IS_ENABLED(CONFIG_CMD_BOOTM_PRE_LOAD))
- img_addr += image_load_offset;
-
- bootstage_mark(BOOTSTAGE_ID_CHECK_MAGIC);
-
- /* check image type, for FIT images get FIT kernel node */
- *os_data = *os_len = 0;
- buf = map_sysmem(img_addr, 0);
- switch (genimg_get_format(buf)) {
-#if CONFIG_IS_ENABLED(LEGACY_IMAGE_FORMAT)
- case IMAGE_FORMAT_LEGACY:
- printf("## Booting kernel from Legacy Image at %08lx ...\n",
- img_addr);
- hdr = image_get_kernel(img_addr, images->verify);
- if (!hdr)
- return NULL;
- bootstage_mark(BOOTSTAGE_ID_CHECK_IMAGETYPE);
-
- /* get os_data and os_len */
- switch (image_get_type(hdr)) {
- case IH_TYPE_KERNEL:
- case IH_TYPE_KERNEL_NOLOAD:
- *os_data = image_get_data(hdr);
- *os_len = image_get_data_size(hdr);
- break;
- case IH_TYPE_MULTI:
- image_multi_getimg(hdr, 0, os_data, os_len);
- break;
- case IH_TYPE_STANDALONE:
- *os_data = image_get_data(hdr);
- *os_len = image_get_data_size(hdr);
- break;
- default:
- printf("Wrong Image Type for %s command\n",
- cmdtp->name);
- bootstage_error(BOOTSTAGE_ID_CHECK_IMAGETYPE);
- return NULL;
- }
-
- /*
- * copy image header to allow for image overwrites during
- * kernel decompression.
- */
- memmove(&images->legacy_hdr_os_copy, hdr,
- sizeof(struct legacy_img_hdr));
-
- /* save pointer to image header */
- images->legacy_hdr_os = hdr;
-
- images->legacy_hdr_valid = 1;
- bootstage_mark(BOOTSTAGE_ID_DECOMP_IMAGE);
- break;
-#endif
-#if CONFIG_IS_ENABLED(FIT)
- case IMAGE_FORMAT_FIT:
- os_noffset = fit_image_load(images, img_addr,
- &fit_uname_kernel, &fit_uname_config,
- IH_ARCH_DEFAULT, IH_TYPE_KERNEL,
- BOOTSTAGE_ID_FIT_KERNEL_START,
- FIT_LOAD_IGNORED, os_data, os_len);
- if (os_noffset < 0)
- return NULL;
-
- images->fit_hdr_os = map_sysmem(img_addr, 0);
- images->fit_uname_os = fit_uname_kernel;
- images->fit_uname_cfg = fit_uname_config;
- images->fit_noffset_os = os_noffset;
- break;
-#endif
-#ifdef CONFIG_ANDROID_BOOT_IMAGE
- case IMAGE_FORMAT_ANDROID:
- boot_img = buf;
- vendor_boot_img = NULL;
- if (IS_ENABLED(CONFIG_CMD_ABOOTIMG)) {
- boot_img = map_sysmem(get_abootimg_addr(), 0);
- vendor_boot_img = map_sysmem(get_avendor_bootimg_addr(), 0);
- }
- printf("## Booting Android Image at 0x%08lx ...\n", img_addr);
- if (android_image_get_kernel(boot_img, vendor_boot_img, images->verify,
- os_data, os_len))
- return NULL;
- if (IS_ENABLED(CONFIG_CMD_ABOOTIMG)) {
- unmap_sysmem(vendor_boot_img);
- unmap_sysmem(boot_img);
- }
- break;
-#endif
- default:
- printf("Wrong Image Format for %s command\n", cmdtp->name);
- bootstage_error(BOOTSTAGE_ID_FIT_KERNEL_INFO);
- return NULL;
- }
-
- debug(" kernel data at 0x%08lx, len = 0x%08lx (%ld)\n",
- *os_data, *os_len, *os_len);
-
- return buf;
+ memset(bmi, '\0', sizeof(struct bootm_info));
+ bmi->boot_progress = true;
+ if (IS_ENABLED(CONFIG_CMD_BOOTM))
+ bmi->images = &images;
}
/**
diff --git a/boot/bootm_os.c b/boot/bootm_os.c
index 30296eb..ccde72d 100644
--- a/boot/bootm_os.c
+++ b/boot/bootm_os.c
@@ -23,9 +23,9 @@
DECLARE_GLOBAL_DATA_PTR;
-static int do_bootm_standalone(int flag, int argc, char *const argv[],
- struct bootm_headers *images)
+static int do_bootm_standalone(int flag, struct bootm_info *bmi)
{
+ struct bootm_headers *images = bmi->images;
int (*appl)(int, char *const[]);
if (!env_get_autostart()) {
@@ -33,7 +33,7 @@
return 0;
}
appl = (int (*)(int, char * const []))images->ep;
- appl(argc, argv);
+ appl(bmi->argc, bmi->argv);
return 0;
}
@@ -64,9 +64,9 @@
}
#ifdef CONFIG_BOOTM_NETBSD
-static int do_bootm_netbsd(int flag, int argc, char *const argv[],
- struct bootm_headers *images)
+static int do_bootm_netbsd(int flag, struct bootm_info *bmi)
{
+ struct bootm_headers *images = bmi->images;
void (*loader)(struct bd_info *bd, struct legacy_img_hdr *hdr,
char *console, char *cmdline);
struct legacy_img_hdr *os_hdr, *hdr;
@@ -102,14 +102,14 @@
os_hdr = hdr;
}
- if (argc > 0) {
+ if (bmi->argc > 0) {
ulong len;
int i;
- for (i = 0, len = 0; i < argc; i += 1)
- len += strlen(argv[i]) + 1;
+ for (i = 0, len = 0; i < bmi->argc; i += 1)
+ len += strlen(bmi->argv[i]) + 1;
cmdline = malloc(len);
- copy_args(cmdline, argc, argv, ' ');
+ copy_args(cmdline, bmi->argc, bmi->argv, ' ');
} else {
cmdline = env_get("bootargs");
if (cmdline == NULL)
@@ -137,9 +137,9 @@
#endif /* CONFIG_BOOTM_NETBSD*/
#ifdef CONFIG_BOOTM_RTEMS
-static int do_bootm_rtems(int flag, int argc, char *const argv[],
- struct bootm_headers *images)
+static int do_bootm_rtems(int flag, struct bootm_info *bmi)
{
+ struct bootm_headers *images = bmi->images;
void (*entry_point)(struct bd_info *);
if (flag != BOOTM_STATE_OS_GO)
@@ -170,9 +170,9 @@
#endif /* CONFIG_BOOTM_RTEMS */
#if defined(CONFIG_BOOTM_OSE)
-static int do_bootm_ose(int flag, int argc, char *const argv[],
- struct bootm_headers *images)
+static int do_bootm_ose(int flag, struct bootm_info *bmi)
{
+ struct bootm_headers *images = bmi->images;
void (*entry_point)(void);
if (flag != BOOTM_STATE_OS_GO)
@@ -203,9 +203,9 @@
#endif /* CONFIG_BOOTM_OSE */
#if defined(CONFIG_BOOTM_PLAN9)
-static int do_bootm_plan9(int flag, int argc, char *const argv[],
- struct bootm_headers *images)
+static int do_bootm_plan9(int flag, struct bootm_info *bmi)
{
+ struct bootm_headers *images = bmi->images;
void (*entry_point)(void);
char *s;
@@ -224,8 +224,8 @@
if (s != NULL) {
char *confaddr = (char *)hextoul(s, NULL);
- if (argc > 0) {
- copy_args(confaddr, argc, argv, '\n');
+ if (bmi->argc) {
+ copy_args(confaddr, bmi->argc, bmi->argv, '\n');
} else {
s = env_get("bootargs");
if (s != NULL)
@@ -311,9 +311,10 @@
puts("## vxWorks terminated\n");
}
-static int do_bootm_vxworks_legacy(int flag, int argc, char *const argv[],
- struct bootm_headers *images)
+static int do_bootm_vxworks_legacy(int flag, struct bootm_info *bmi)
{
+ struct bootm_headers *images = bmi->images;
+
if (flag != BOOTM_STATE_OS_GO)
return 0;
@@ -322,8 +323,7 @@
return 1;
}
-int do_bootm_vxworks(int flag, int argc, char *const argv[],
- struct bootm_headers *images)
+int do_bootm_vxworks(int flag, struct bootm_info *bmi)
{
char *bootargs;
int pos;
@@ -348,19 +348,19 @@
if (std_dtb) {
if (flag & BOOTM_STATE_OS_PREP)
printf(" Using standard DTB\n");
- return do_bootm_linux(flag, argc, argv, images);
+ return do_bootm_linux(flag, bmi);
} else {
if (flag & BOOTM_STATE_OS_PREP)
printf(" !!! WARNING !!! Using legacy DTB\n");
- return do_bootm_vxworks_legacy(flag, argc, argv, images);
+ return do_bootm_vxworks_legacy(flag, bmi);
}
}
#endif
#if defined(CONFIG_CMD_ELF)
-static int do_bootm_qnxelf(int flag, int argc, char *const argv[],
- struct bootm_headers *images)
+static int do_bootm_qnxelf(int flag, struct bootm_info *bmi)
{
+ struct bootm_headers *images = bmi->images;
char *local_args[2];
char str[16];
int dcache;
@@ -376,7 +376,7 @@
#endif
sprintf(str, "%lx", images->ep); /* write entry-point into string */
- local_args[0] = argv[0];
+ local_args[0] = bmi->argv[0];
local_args[1] = str; /* and provide it via the arguments */
/*
@@ -396,9 +396,9 @@
#endif
#ifdef CONFIG_INTEGRITY
-static int do_bootm_integrity(int flag, int argc, char *const argv[],
- struct bootm_headers *images)
+static int do_bootm_integrity(int flag, struct bootm_info *bmi)
{
+ struct bootm_headers *images = bmi->images;
void (*entry_point)(void);
if (flag != BOOTM_STATE_OS_GO)
@@ -429,9 +429,9 @@
#endif
#ifdef CONFIG_BOOTM_OPENRTOS
-static int do_bootm_openrtos(int flag, int argc, char *const argv[],
- struct bootm_headers *images)
+static int do_bootm_openrtos(int flag, struct bootm_info *bmi)
{
+ struct bootm_headers *images = bmi->images;
void (*entry_point)(void);
if (flag != BOOTM_STATE_OS_GO)
@@ -455,16 +455,11 @@
#endif
#ifdef CONFIG_BOOTM_OPTEE
-static int do_bootm_tee(int flag, int argc, char *const argv[],
- struct bootm_headers *images)
+static int do_bootm_tee(int flag, struct bootm_info *bmi)
{
+ struct bootm_headers *images = bmi->images;
int ret;
- /* Verify OS type */
- if (images->os.os != IH_OS_TEE) {
- return 1;
- };
-
/* Validate OPTEE header */
ret = optee_verify_bootm_image(images->os.image_start,
images->os.load,
@@ -472,63 +467,36 @@
if (ret)
return ret;
- /* Locate FDT etc */
- ret = bootm_find_images(flag, argc, argv, 0, 0);
- if (ret)
- return ret;
-
/* From here we can run the regular linux boot path */
- return do_bootm_linux(flag, argc, argv, images);
+ return do_bootm_linux(flag, bmi);
}
#endif
#ifdef CONFIG_BOOTM_EFI
-static int do_bootm_efi(int flag, int argc, char *const argv[],
- struct bootm_headers *images)
+static int do_bootm_efi(int flag, struct bootm_info *bmi)
{
+ struct bootm_headers *images = bmi->images;
int ret;
- efi_status_t efi_ret;
void *image_buf;
if (flag != BOOTM_STATE_OS_GO)
return 0;
- /* Locate FDT, if provided */
- ret = bootm_find_images(flag, argc, argv, 0, 0);
- if (ret)
- return ret;
-
- /* Initialize EFI drivers */
- efi_ret = efi_init_obj_list();
- if (efi_ret != EFI_SUCCESS) {
- printf("## Failed to initialize UEFI sub-system: r = %lu\n",
- efi_ret & ~EFI_ERROR_MASK);
- return 1;
- }
-
- /* Install device tree */
- efi_ret = efi_install_fdt(images->ft_len
- ? images->ft_addr : EFI_FDT_USE_INTERNAL);
- if (efi_ret != EFI_SUCCESS) {
- printf("## Failed to install device tree: r = %lu\n",
- efi_ret & ~EFI_ERROR_MASK);
- return 1;
- }
-
- /* Run EFI image */
- printf("## Transferring control to EFI (at address %08lx) ...\n",
- images->ep);
- bootstage_mark(BOOTSTAGE_ID_RUN_OS);
-
/* We expect to return */
images->os.type = IH_TYPE_STANDALONE;
image_buf = map_sysmem(images->ep, images->os.image_len);
- efi_ret = efi_run_image(image_buf, images->os.image_len);
- if (efi_ret != EFI_SUCCESS)
- return 1;
- return 0;
+ /* Run EFI image */
+ printf("## Transferring control to EFI (at address %08lx) ...\n",
+ images->ep);
+ bootstage_mark(BOOTSTAGE_ID_RUN_OS);
+
+ ret = efi_binary_run(image_buf, images->os.image_len,
+ images->ft_len
+ ? images->ft_addr : EFI_FDT_USE_INTERNAL);
+
+ return ret;
}
#endif
@@ -582,15 +550,15 @@
/* please define board specific board_preboot_os() */
}
-int boot_selected_os(int argc, char *const argv[], int state,
- struct bootm_headers *images, boot_os_fn *boot_fn)
+int boot_selected_os(int state, struct bootm_info *bmi, boot_os_fn *boot_fn)
{
arch_preboot_os();
board_preboot_os();
- boot_fn(state, argc, argv, images);
+
+ boot_fn(state, bmi);
/* Stand-alone may return when 'autostart' is 'no' */
- if (images->os.type == IH_TYPE_STANDALONE ||
+ if (bmi->images->os.type == IH_TYPE_STANDALONE ||
IS_ENABLED(CONFIG_SANDBOX) ||
state == BOOTM_STATE_OS_FAKE_GO) /* We expect to return */
return 0;
diff --git a/boot/bootmeth_efi.c b/boot/bootmeth_efi.c
index 9ba7734..c4eb331 100644
--- a/boot/bootmeth_efi.c
+++ b/boot/bootmeth_efi.c
@@ -160,7 +160,6 @@
if (ret)
return log_msg_ret("read", ret);
bflow->buf = map_sysmem(addr, bflow->size);
- bflow->flags |= BOOTFLOWF_STATIC_BUF;
set_efi_bootdev(desc, bflow);
@@ -313,6 +312,7 @@
*/
} else {
log_debug("No device tree available\n");
+ bflow->flags |= BOOTFLOWF_USE_BUILTIN_FDT;
}
return 0;
@@ -323,7 +323,7 @@
char file_addr[17], fname[256];
char *tftp_argv[] = {"tftp", file_addr, fname, NULL};
struct cmd_tbl cmdtp = {}; /* dummy */
- const char *addr_str, *fdt_addr_str;
+ const char *addr_str, *fdt_addr_str, *bootfile_name;
int ret, arch, size;
ulong addr, fdt_addr;
char str[36];
@@ -339,7 +339,7 @@
ret = env_set("bootp_vci", str);
if (ret)
return log_msg_ret("vcs", ret);
- ret = env_set_ulong("bootp_arch", arch);
+ ret = env_set_hex("bootp_arch", arch);
if (ret)
return log_msg_ret("ars", ret);
@@ -360,6 +360,12 @@
return log_msg_ret("sz", -EINVAL);
bflow->size = size;
+ /* bootfile should be setup by dhcp*/
+ bootfile_name = env_get("bootfile");
+ if (!bootfile_name)
+ return log_msg_ret("bootfile_name", ret);
+ bflow->fname = strdup(bootfile_name);
+
/* do the hideous EFI hack */
efi_set_bootdev("Net", "", bflow->fname, map_sysmem(addr, 0),
bflow->size);
@@ -385,6 +391,7 @@
bflow->fdt_addr = fdt_addr;
} else {
log_debug("No device tree available\n");
+ bflow->flags |= BOOTFLOWF_USE_BUILTIN_FDT;
}
bflow->state = BOOTFLOWST_READY;
@@ -396,6 +403,12 @@
{
int ret;
+ /*
+ * bootmeth_efi doesn't allocate any buffer neither for blk nor net device
+ * set flag to avoid freeing static buffer.
+ */
+ bflow->flags |= BOOTFLOWF_STATIC_BUF;
+
if (bootmeth_uses_network(bflow)) {
/* we only support reading from one device, so ignore 'dev' */
ret = distro_efi_read_bootflow_net(bflow);
@@ -413,7 +426,6 @@
static int distro_efi_boot(struct udevice *dev, struct bootflow *bflow)
{
ulong kernel, fdt;
- char cmd[50];
int ret;
kernel = env_get_hex("kernel_addr_r", 0);
@@ -423,13 +435,11 @@
return log_msg_ret("read", ret);
/*
- * use the provided device tree if available, else fall back to
- * the control FDT
+ * use the provided device tree if not using the built-in fdt
*/
- if (bflow->fdt_fname)
+ if (bflow->flags & ~BOOTFLOWF_USE_BUILTIN_FDT)
fdt = bflow->fdt_addr;
- else
- fdt = (ulong)map_to_sysmem(gd->fdt_blob);
+
} else {
/*
* This doesn't actually work for network devices:
@@ -442,13 +452,17 @@
fdt = env_get_hex("fdt_addr_r", 0);
}
- /*
- * At some point we can add a real interface to bootefi so we can call
- * this directly. For now, go through the CLI, like distro boot.
- */
- snprintf(cmd, sizeof(cmd), "bootefi %lx %lx", kernel, fdt);
- if (run_command(cmd, 0))
- return log_msg_ret("run", -EINVAL);
+ if (bflow->flags & BOOTFLOWF_USE_BUILTIN_FDT) {
+ log_debug("Booting with built-in fdt\n");
+ if (efi_binary_run(map_sysmem(kernel, 0), bflow->size,
+ EFI_FDT_USE_INTERNAL))
+ return log_msg_ret("run", -EINVAL);
+ } else {
+ log_debug("Booting with external fdt\n");
+ if (efi_binary_run(map_sysmem(kernel, 0), bflow->size,
+ map_sysmem(fdt, 0)))
+ return log_msg_ret("run", -EINVAL);
+ }
return 0;
}
diff --git a/boot/bootmeth_efi_mgr.c b/boot/bootmeth_efi_mgr.c
index e6c42d4..ed29d7e 100644
--- a/boot/bootmeth_efi_mgr.c
+++ b/boot/bootmeth_efi_mgr.c
@@ -16,6 +16,7 @@
#include <dm.h>
#include <efi_loader.h>
#include <efi_variable.h>
+#include <malloc.h>
/**
* struct efi_mgr_priv - private info for the efi-mgr driver
@@ -65,6 +66,7 @@
bootorder = efi_get_var(u"BootOrder", &efi_global_variable_guid,
&size);
if (bootorder) {
+ free(bootorder);
bflow->state = BOOTFLOWST_READY;
return 0;
}
@@ -85,7 +87,7 @@
int ret;
/* Booting is handled by the 'bootefi bootmgr' command */
- ret = run_command("bootefi bootmgr", 0);
+ ret = efi_bootmgr_run(EFI_FDT_USE_INTERNAL);
return 0;
}
diff --git a/boot/bootmeth_extlinux.c b/boot/bootmeth_extlinux.c
index aa2a459..ae0ad1d 100644
--- a/boot/bootmeth_extlinux.c
+++ b/boot/bootmeth_extlinux.c
@@ -82,7 +82,7 @@
log_debug("parsing bflow file size %x\n", bflow->size);
membuff_init(&mb, bflow->buf, bflow->size);
membuff_putraw(&mb, bflow->size, true, &data);
- while (len = membuff_readline(&mb, line, sizeof(line) - 1, ' '), len) {
+ while (len = membuff_readline(&mb, line, sizeof(line) - 1, ' ', true), len) {
char *tok, *p = line;
tok = strsep(&p, " ");
diff --git a/boot/fdt_support.c b/boot/fdt_support.c
index b15d077..090d82e 100644
--- a/boot/fdt_support.c
+++ b/boot/fdt_support.c
@@ -667,7 +667,6 @@
return node;
}
-/* Resize the fdt to its actual size + a bit of padding */
int fdt_shrink_to_minimum(void *blob, uint extrasize)
{
int i;
diff --git a/boot/image-board.c b/boot/image-board.c
index d500da1..75f6906 100644
--- a/boot/image-board.c
+++ b/boot/image-board.c
@@ -198,22 +198,7 @@
}
}
-/**
- * genimg_get_kernel_addr_fit - get the real kernel address and return 2
- * FIT strings
- * @img_addr: a string might contain real image address
- * @fit_uname_config: double pointer to a char, will hold pointer to a
- * configuration unit name
- * @fit_uname_kernel: double pointer to a char, will hold pointer to a subimage
- * name
- *
- * genimg_get_kernel_addr_fit get the real kernel start address from a string
- * which is normally the first argv of bootm/bootz
- *
- * returns:
- * kernel start address
- */
-ulong genimg_get_kernel_addr_fit(char * const img_addr,
+ulong genimg_get_kernel_addr_fit(const char *const img_addr,
const char **fit_uname_config,
const char **fit_uname_kernel)
{
@@ -471,49 +456,14 @@
return 0;
}
-/**
- * boot_get_ramdisk - main ramdisk handling routine
- * @argc: command argument count
- * @argv: command argument list
- * @images: pointer to the bootm images structure
- * @arch: expected ramdisk architecture
- * @rd_start: pointer to a ulong variable, will hold ramdisk start address
- * @rd_end: pointer to a ulong variable, will hold ramdisk end
- *
- * boot_get_ramdisk() is responsible for finding a valid ramdisk image.
- * Currently supported are the following ramdisk sources:
- * - multicomponent kernel/ramdisk image,
- * - commandline provided address of decicated ramdisk image.
- *
- * returns:
- * 0, if ramdisk image was found and valid, or skiped
- * rd_start and rd_end are set to ramdisk start/end addresses if
- * ramdisk image is found and valid
- *
- * 1, if ramdisk image is found but corrupted, or invalid
- * rd_start and rd_end are set to 0 if no ramdisk exists
- */
-int boot_get_ramdisk(int argc, char *const argv[], struct bootm_headers *images,
- u8 arch, ulong *rd_start, ulong *rd_end)
+int boot_get_ramdisk(char const *select, struct bootm_headers *images,
+ uint arch, ulong *rd_start, ulong *rd_end)
{
ulong rd_data, rd_len;
- const char *select = NULL;
*rd_start = 0;
*rd_end = 0;
- if (IS_ENABLED(CONFIG_ANDROID_BOOT_IMAGE)) {
- char *buf;
-
- /* Look for an Android boot image */
- buf = map_sysmem(images->os.start, 0);
- if (buf && genimg_get_format(buf) == IMAGE_FORMAT_ANDROID)
- select = (argc == 0) ? env_get("loadaddr") : argv[0];
- }
-
- if (argc >= 2)
- select = argv[1];
-
/*
* Look for a '-' which indicates to ignore the
* ramdisk argument
@@ -666,8 +616,7 @@
return boot_get_setup_fit(images, arch, setup_start, setup_len);
}
-int boot_get_fpga(int argc, char *const argv[], struct bootm_headers *images,
- u8 arch, const ulong *ld_start, ulong * const ld_len)
+int boot_get_fpga(struct bootm_headers *images)
{
ulong tmp_img_addr, img_data, img_len;
void *buf;
@@ -709,7 +658,7 @@
tmp_img_addr,
(const char **)&uname,
&images->fit_uname_cfg,
- arch,
+ IH_ARCH_DEFAULT,
IH_TYPE_FPGA,
BOOTSTAGE_ID_FPGA_INIT,
FIT_LOAD_OPTIONAL_NON_ZERO,
@@ -769,8 +718,7 @@
fit_loadable_handler->handler(img_data, img_len);
}
-int boot_get_loadable(int argc, char *const argv[], struct bootm_headers *images,
- u8 arch, const ulong *ld_start, ulong * const ld_len)
+int boot_get_loadable(struct bootm_headers *images)
{
/*
* These variables are used to hold the current image location
@@ -816,7 +764,8 @@
fit_img_result = fit_image_load(images, tmp_img_addr,
&uname,
&images->fit_uname_cfg,
- arch, IH_TYPE_LOADABLE,
+ IH_ARCH_DEFAULT,
+ IH_TYPE_LOADABLE,
BOOTSTAGE_ID_FIT_LOADABLE_START,
FIT_LOAD_OPTIONAL_NON_ZERO,
&img_data, &img_len);
@@ -959,7 +908,7 @@
}
if (CONFIG_IS_ENABLED(OF_LIBFDT) && of_size) {
- ret = image_setup_libfdt(images, *of_flat_tree, of_size, lmb);
+ ret = image_setup_libfdt(images, *of_flat_tree, lmb);
if (ret)
return ret;
}
diff --git a/boot/image-fdt.c b/boot/image-fdt.c
index f10200f..75bdd55 100644
--- a/boot/image-fdt.c
+++ b/boot/image-fdt.c
@@ -9,6 +9,7 @@
*/
#include <common.h>
+#include <command.h>
#include <fdt_support.h>
#include <fdtdec.h>
#include <env.h>
@@ -24,9 +25,6 @@
#include <dm/ofnode.h>
#include <tee/optee.h>
-/* adding a ramdisk needs 0x44 bytes in version 2008.10 */
-#define FDT_RAMDISK_OVERHEAD 0x80
-
DECLARE_GLOBAL_DATA_PTR;
static void fdt_error(const char *msg)
@@ -447,45 +445,16 @@
return 0;
}
-/**
- * boot_get_fdt - main fdt handling routine
- * @argc: command argument count
- * @argv: command argument list
- * @arch: architecture (IH_ARCH_...)
- * @images: pointer to the bootm images structure
- * @of_flat_tree: pointer to a char* variable, will hold fdt start address
- * @of_size: pointer to a ulong variable, will hold fdt length
- *
- * boot_get_fdt() is responsible for finding a valid flat device tree image.
- * Currently supported are the following ramdisk sources:
- * - multicomponent kernel/ramdisk image,
- * - commandline provided address of decicated ramdisk image.
- *
- * returns:
- * 0, if fdt image was found and valid, or skipped
- * of_flat_tree and of_size are set to fdt start address and length if
- * fdt image is found and valid
- *
- * 1, if fdt image is found but corrupted
- * of_flat_tree and of_size are set to 0 if no fdt exists
- */
-int boot_get_fdt(int flag, int argc, char *const argv[], uint8_t arch,
- struct bootm_headers *images, char **of_flat_tree, ulong *of_size)
+int boot_get_fdt(void *buf, const char *select, uint arch,
+ struct bootm_headers *images, char **of_flat_tree,
+ ulong *of_size)
{
- ulong img_addr;
- ulong fdt_addr;
- char *fdt_blob = NULL;
- void *buf;
- const char *select = NULL;
+ char *fdt_blob = NULL;
+ ulong fdt_addr;
*of_flat_tree = NULL;
*of_size = 0;
- img_addr = (argc == 0) ? image_load_addr : hextoul(argv[0], NULL);
- buf = map_sysmem(img_addr, 0);
-
- if (argc > 2)
- select = argv[2];
if (select || genimg_has_config(images)) {
int ret;
@@ -604,12 +573,26 @@
}
int image_setup_libfdt(struct bootm_headers *images, void *blob,
- int of_size, struct lmb *lmb)
+ struct lmb *lmb)
{
ulong *initrd_start = &images->initrd_start;
ulong *initrd_end = &images->initrd_end;
- int ret = -EPERM;
- int fdt_ret;
+ int ret, fdt_ret, of_size;
+
+ if (IS_ENABLED(CONFIG_OF_ENV_SETUP)) {
+ const char *fdt_fixup;
+
+ fdt_fixup = env_get("fdt_fixup");
+ if (fdt_fixup) {
+ set_working_fdt_addr(map_to_sysmem(blob));
+ ret = run_command_list(fdt_fixup, -1, 0);
+ if (ret)
+ printf("WARNING: fdt_fixup command returned %d\n",
+ ret);
+ }
+ }
+
+ ret = -EPERM;
if (fdt_root(blob) < 0) {
printf("ERROR: root node setup failed\n");
@@ -666,6 +649,14 @@
goto err;
}
}
+
+ if (fdt_initrd(blob, *initrd_start, *initrd_end))
+ goto err;
+
+ if (!ft_verify_fdt(blob))
+ goto err;
+
+ /* after here we are using a livetree */
if (!of_live_active() && CONFIG_IS_ENABLED(EVENT)) {
struct event_ft_fixup fixup;
@@ -683,25 +674,16 @@
/* Delete the old LMB reservation */
if (lmb)
- lmb_free(lmb, (phys_addr_t)(u32)(uintptr_t)blob,
- (phys_size_t)fdt_totalsize(blob));
+ lmb_free(lmb, map_to_sysmem(blob), fdt_totalsize(blob));
ret = fdt_shrink_to_minimum(blob, 0);
if (ret < 0)
goto err;
of_size = ret;
- if (*initrd_start && *initrd_end) {
- of_size += FDT_RAMDISK_OVERHEAD;
- fdt_set_totalsize(blob, of_size);
- }
/* Create a new LMB reservation */
if (lmb)
- lmb_reserve(lmb, (ulong)blob, of_size);
-
- fdt_initrd(blob, *initrd_start, *initrd_end);
- if (!ft_verify_fdt(blob))
- goto err;
+ lmb_reserve(lmb, map_to_sysmem(blob), of_size);
#if defined(CONFIG_ARCH_KEYSTONE)
if (IS_ENABLED(CONFIG_OF_BOARD_SETUP))
diff --git a/boot/image-fit.c b/boot/image-fit.c
index 3cc556b..89e3775 100644
--- a/boot/image-fit.c
+++ b/boot/image-fit.c
@@ -15,6 +15,7 @@
#include <time.h>
#include <linux/libfdt.h>
#include <u-boot/crc.h>
+#include <linux/kconfig.h>
#else
#include <linux/compiler.h>
#include <linux/sizes.h>
@@ -36,7 +37,6 @@
#include <bootm.h>
#include <image.h>
#include <bootstage.h>
-#include <linux/kconfig.h>
#include <u-boot/crc.h>
#include <u-boot/md5.h>
#include <u-boot/sha1.h>
diff --git a/boot/image.c b/boot/image.c
index 88b67bc..073931c 100644
--- a/boot/image.c
+++ b/boot/image.c
@@ -42,6 +42,7 @@
#else /* USE_HOSTCC */
#include "mkimage.h"
+#include <linux/kconfig.h>
#include <u-boot/md5.h>
#include <time.h>
@@ -62,7 +63,6 @@
#include <relocate.h>
#include <linux/lzo.h>
#include <linux/zstd.h>
-#include <linux/kconfig.h>
#include <lzma/LzmaTypes.h>
#include <lzma/LzmaDec.h>
#include <lzma/LzmaTools.h>
@@ -415,15 +415,20 @@
* @type: OS type (IH_OS_...)
* @comp_type: Compression type being used (IH_COMP_...)
* @is_xip: true if the load address matches the image start
+ * @load: Load address for printing
*/
-static void print_decomp_msg(int comp_type, int type, bool is_xip)
+static void print_decomp_msg(int comp_type, int type, bool is_xip,
+ ulong load)
{
const char *name = genimg_get_type_name(type);
+ /* Shows "Loading Kernel Image" for example */
if (comp_type == IH_COMP_NONE)
- printf(" %s %s\n", is_xip ? "XIP" : "Loading", name);
+ printf(" %s %s", is_xip ? "XIP" : "Loading", name);
else
- printf(" Uncompressing %s\n", name);
+ printf(" Uncompressing %s", name);
+
+ printf(" to %lx\n", load);
}
int image_decomp_type(const unsigned char *buf, ulong len)
@@ -448,7 +453,7 @@
int ret = -ENOSYS;
*load_end = load;
- print_decomp_msg(comp, type, load == image_start);
+ print_decomp_msg(comp, type, load == image_start, load);
/*
* Load the image to the right place, decompressing if needed. After
diff --git a/boot/prog_boot.c b/boot/prog_boot.c
new file mode 100644
index 0000000..045554b
--- /dev/null
+++ b/boot/prog_boot.c
@@ -0,0 +1,51 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2021 Google LLC
+ * Written by Simon Glass <sjg@chromium.org>
+ */
+
+#define LOG_CATEGORY UCLASS_BOOTSTD
+
+#include <bootflow.h>
+#include <bootstd.h>
+#include <command.h>
+#include <dm.h>
+
+/*
+ * show_bootmeths() - List available bootmeths
+ *
+ * We could refactor this to use do_bootmeth_list() if more detail (or ordering)
+ * are needed
+ */
+static void show_bootmeths(void)
+{
+ struct udevice *dev;
+ struct uclass *uc;
+
+ printf("Bootmeths: ");
+ uclass_id_foreach_dev(UCLASS_BOOTMETH, dev, uc)
+ printf(" %s", dev->name);
+ printf("\n");
+}
+
+int bootstd_prog_boot(void)
+{
+ struct bootflow_iter iter;
+ struct bootflow bflow;
+ int ret, flags, i;
+
+ printf("Programmatic boot starting\n");
+ show_bootmeths();
+ flags = BOOTFLOWIF_HUNT | BOOTFLOWIF_SHOW | BOOTFLOWIF_SKIP_GLOBAL;
+
+ bootstd_clear_glob();
+ for (i = 0, ret = bootflow_scan_first(NULL, NULL, &iter, flags, &bflow);
+ i < 1000 && ret != -ENODEV;
+ i++, ret = bootflow_scan_next(&iter, &bflow)) {
+ if (!bflow.err)
+ bootflow_run_boot(&iter, &bflow);
+ bootflow_free(&bflow);
+ }
+
+ return -EFAULT;
+}
diff --git a/boot/pxe_utils.c b/boot/pxe_utils.c
index a92bb89..83bc167 100644
--- a/boot/pxe_utils.c
+++ b/boot/pxe_utils.c
@@ -700,6 +700,11 @@
label->name);
goto cleanup;
}
+
+ if (label->fdtdir) {
+ printf("Skipping fdtdir %s for failure retrieving dts\n",
+ label->fdtdir);
+ }
}
if (label->kaslrseed)
diff --git a/cmd/Kconfig b/cmd/Kconfig
index 6f63615..a86b570 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -22,6 +22,31 @@
If disabled, you get the old, much simpler behaviour with a somewhat
smaller memory footprint.
+menu "Hush flavor to use"
+depends on HUSH_PARSER
+
+config HUSH_OLD_PARSER
+ bool "Use hush old parser"
+ default y
+ help
+ This option enables the old flavor of hush based on hush Busybox from
+ 2005.
+
+ It is actually the default U-Boot shell when decided to use hush as shell.
+
+config HUSH_MODERN_PARSER
+ bool "Use hush modern parser"
+ help
+ This option enables the new flavor of hush based on hush upstream
+ Busybox.
+
+ This parser is experimental and not well tested.
+
+config HUSH_SELECTABLE
+ bool
+ default y if HUSH_OLD_PARSER && HUSH_MODERN_PARSER
+endmenu
+
config CMDLINE_EDITING
bool "Enable command line editing"
default y
@@ -69,7 +94,7 @@
config SYS_MAXARGS
int "Maximum number arguments accepted by commands"
- default 16
+ default 64
config SYS_XTRACE
bool "Command execution tracer"
@@ -167,6 +192,7 @@
config CMD_LICENSE
bool "license"
select BUILD_BIN2C
+ depends on GZIP
help
Print GPL license text
@@ -206,6 +232,12 @@
help
Display information about the SBI implementation.
+config CMD_SMBIOS
+ bool "smbios"
+ depends on SMBIOS
+ help
+ Display the SMBIOS information.
+
endmenu
menu "Boot commands"
@@ -273,7 +305,7 @@
config BOOTM_EFI
bool "Support booting UEFI FIT images"
- depends on CMD_BOOTEFI && CMD_BOOTM && FIT
+ depends on EFI_BINARY_EXEC && CMD_BOOTM && FIT
default y
help
Support booting UEFI FIT images via the bootm command.
@@ -285,7 +317,7 @@
config CMD_BOOTI
bool "booti"
- depends on ARM64 || RISCV
+ depends on ARM64 || RISCV || SANDBOX
default y
help
Boot an AArch64 Linux Kernel image from memory.
@@ -362,9 +394,19 @@
help
Boot an EFI image from memory.
+if CMD_BOOTEFI
+config CMD_BOOTEFI_BINARY
+ bool "Allow booting an EFI binary directly"
+ depends on EFI_BINARY_EXEC
+ default y
+ help
+ Select this option to enable direct execution of binary at 'bootefi'.
+ This subcommand will allow you to load the UEFI binary using
+ other U-Boot commands or external methods and then run it.
+
config CMD_BOOTEFI_BOOTMGR
bool "UEFI Boot Manager command"
- depends on BOOTEFI_BOOTMGR && CMD_BOOTEFI
+ depends on EFI_BOOTMGR
default y
help
Select this option to enable the 'bootmgr' subcommand of 'bootefi'.
@@ -373,7 +415,6 @@
config CMD_BOOTEFI_HELLO_COMPILE
bool "Compile a standard EFI hello world binary for testing"
- depends on CMD_BOOTEFI && !CPU_V7M
default y
help
This compiles a standard EFI hello world application with U-Boot so
@@ -386,7 +427,7 @@
config CMD_BOOTEFI_HELLO
bool "Allow booting a standard EFI hello world for testing"
- depends on CMD_BOOTEFI_HELLO_COMPILE
+ depends on CMD_BOOTEFI_BINARY && CMD_BOOTEFI_HELLO_COMPILE
default y if CMD_BOOTEFI_SELFTEST
help
This adds a standard EFI hello world application to U-Boot so that
@@ -395,6 +436,7 @@
up EFI support on a new architecture.
source lib/efi_selftest/Kconfig
+endif
config CMD_BOOTMENU
bool "bootmenu"
@@ -485,6 +527,16 @@
help
Extract a part of a multi-image.
+config SYS_XIMG_LEN
+ hex "imxtract max gunzip size"
+ default 0x800000
+ depends on CMD_XIMG && GZIP
+ help
+ This provides the size of the commad-line argument area
+ used by imxtract for extracting pieces of FIT image.
+ It should be large enough to fit uncompressed size of
+ FIT piece we are extracting.
+
config CMD_SPL
bool "spl export - Export boot information for Falcon boot"
depends on SPL
@@ -977,7 +1029,7 @@
config CMD_BIND
bool "bind/unbind - Bind or unbind a device to/from a driver"
depends on DM
- default y if USB_ETHER
+ imply CMD_DM
help
Bind or unbind a device to/from a driver from the command line.
This is useful in situations where a device may be handled by several
@@ -1039,7 +1091,7 @@
config CMD_FLASH
bool "flinfo, erase, protect"
default y
- depends on MTD || FLASH_CFI_DRIVER || MTD_NOR_FLASH
+ depends on FLASH_CFI_DRIVER || MTD_NOR_FLASH
help
NOR flash support.
flinfo - print FLASH memory information
@@ -1520,7 +1572,7 @@
Turndra tsi148 device. See the command help for full details.
config CMD_UFS
- bool "Enable UFS - Universal Flash Subsystem commands"
+ bool "ufs - Universal Flash Storage commands"
depends on UFS
help
"This provides commands to initialise and configure universal flash
@@ -1681,7 +1733,6 @@
menuconfig CMD_NET
bool "Network commands"
default y
- imply NETDEVICES
if CMD_NET
@@ -2113,7 +2164,7 @@
config CMD_EFICONFIG
bool "eficonfig - provide menu-driven uefi variables maintenance interface"
default y if !HAS_BOARD_SIZE_LIMIT
- depends on BOOTEFI_BOOTMGR
+ depends on EFI_BOOTMGR
select MENU
help
Enable the 'eficonfig' command which provides the menu-driven UEFI
@@ -2533,6 +2584,15 @@
a number of sub-commands for performing EC tasks such as
updating its flash, accessing a small saved context area
and talking to the I2C bus behind the EC (if there is one).
+
+config CMD_SCMI
+ bool "Enable scmi command"
+ depends on SCMI_FIRMWARE
+ default n
+ help
+ This command provides user interfaces to several SCMI (System
+ Control and Management Interface) protocols available on Arm
+ platforms to manage system resources.
endmenu
menu "Filesystem commands"
@@ -2648,6 +2708,7 @@
config CMD_MTDPARTS
bool "MTD partition support"
depends on MTD
+ select MTD_PARTITIONS
help
MTD partitioning tool support.
It is strongly encouraged to avoid using this command
diff --git a/cmd/Makefile b/cmd/Makefile
index dbeeebe..87133cc 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -160,6 +160,7 @@
obj-$(CONFIG_CMD_NVME) += nvme.o
obj-$(CONFIG_SANDBOX) += sb.o
obj-$(CONFIG_CMD_SF) += sf.o
+obj-$(CONFIG_CMD_SCMI) += scmi.o
obj-$(CONFIG_CMD_SCSI) += scsi.o disk.o
obj-$(CONFIG_CMD_SHA1SUM) += sha1sum.o
obj-$(CONFIG_CMD_SEAMA) += seama.o
@@ -167,6 +168,7 @@
obj-$(CONFIG_CMD_SETEXPR_FMT) += printf.o
obj-$(CONFIG_CMD_SPI) += spi.o
obj-$(CONFIG_CMD_STRINGS) += strings.o
+obj-$(CONFIG_CMD_SMBIOS) += smbios.o
obj-$(CONFIG_CMD_SMC) += smccc.o
obj-$(CONFIG_CMD_SYSBOOT) += sysboot.o
obj-$(CONFIG_CMD_STACKPROTECTOR_TEST) += stackprot_test.o
@@ -228,6 +230,8 @@
# Foundries.IO SCP03
obj-$(CONFIG_CMD_SCP03) += scp03.o
+obj-$(CONFIG_HUSH_SELECTABLE) += cli.o
+
obj-$(CONFIG_ARM) += arm/
obj-$(CONFIG_RISCV) += riscv/
obj-$(CONFIG_SANDBOX) += sandbox/
diff --git a/cmd/acpi.c b/cmd/acpi.c
index 7e397d1..65caaa5 100644
--- a/cmd/acpi.c
+++ b/cmd/acpi.c
@@ -6,6 +6,7 @@
#include <common.h>
#include <command.h>
#include <display_options.h>
+#include <log.h>
#include <mapmem.h>
#include <acpi/acpi_table.h>
#include <asm/acpi_table.h>
@@ -17,7 +18,8 @@
/**
* dump_hdr() - Dump an ACPI header
*
- * If the header is for FACS then it shows the revision information as well
+ * Except for the Firmware ACPI Control Structure (FACS)
+ * additionally show the revision information.
*
* @hdr: ACPI header to dump
*/
@@ -25,7 +27,7 @@
{
bool has_hdr = memcmp(hdr->signature, "FACS", ACPI_NAME_LEN);
- printf("%.*s %08lx %5x", ACPI_NAME_LEN, hdr->signature,
+ printf("%.*s %16lx %5x", ACPI_NAME_LEN, hdr->signature,
(ulong)map_to_sysmem(hdr), hdr->length);
if (has_hdr) {
printf(" v%02d %.6s %.8s %x %.4s %x\n", hdr->revision,
@@ -43,8 +45,8 @@
hdr = acpi_find_table(sig);
if (!hdr)
return -ENOENT;
- printf("%.*s @ %08lx\n", ACPI_NAME_LEN, hdr->signature,
- (ulong)map_to_sysmem(hdr));
+ printf("%.*s @ %16lx\n", ACPI_NAME_LEN, hdr->signature,
+ (ulong)nomap_to_sysmem(hdr));
print_buffer(0, hdr, 1, hdr->length, 0);
return 0;
@@ -52,53 +54,63 @@
static void list_fadt(struct acpi_fadt *fadt)
{
- if (fadt->dsdt)
- dump_hdr(map_sysmem(fadt->dsdt, 0));
- if (fadt->firmware_ctrl)
- dump_hdr(map_sysmem(fadt->firmware_ctrl, 0));
+ if (fadt->header.revision >= 3 && fadt->x_dsdt)
+ dump_hdr(nomap_sysmem(fadt->x_dsdt, 0));
+ else if (fadt->dsdt)
+ dump_hdr(nomap_sysmem(fadt->dsdt, 0));
+ if (!IS_ENABLED(CONFIG_X86) &&
+ !(fadt->flags & ACPI_FADT_HW_REDUCED_ACPI))
+ log_err("FADT not ACPI-hardware-reduced-compliant\n");
+ if (fadt->header.revision >= 3 && fadt->x_firmware_ctrl)
+ dump_hdr(nomap_sysmem(fadt->x_firmware_ctrl, 0));
+ else if (fadt->firmware_ctrl)
+ dump_hdr(nomap_sysmem(fadt->firmware_ctrl, 0));
}
-static int list_rsdt(struct acpi_rsdt *rsdt, struct acpi_xsdt *xsdt)
+static void list_rsdt(struct acpi_rsdp *rsdp)
{
int len, i, count;
-
- dump_hdr(&rsdt->header);
- if (xsdt)
- dump_hdr(&xsdt->header);
- len = rsdt->header.length - sizeof(rsdt->header);
- count = len / sizeof(u32);
- for (i = 0; i < count; i++) {
- struct acpi_table_header *hdr;
-
- if (!rsdt->entry[i])
- break;
- hdr = map_sysmem(rsdt->entry[i], 0);
- dump_hdr(hdr);
- if (!memcmp(hdr->signature, "FACP", ACPI_NAME_LEN))
- list_fadt((struct acpi_fadt *)hdr);
- if (xsdt) {
- if (xsdt->entry[i] != rsdt->entry[i]) {
- printf(" (xsdt mismatch %llx)\n",
- xsdt->entry[i]);
- }
- }
- }
-
- return 0;
-}
-
-static int list_rsdp(struct acpi_rsdp *rsdp)
-{
struct acpi_rsdt *rsdt;
struct acpi_xsdt *xsdt;
- printf("RSDP %08lx %5x v%02d %.6s\n", (ulong)map_to_sysmem(rsdp),
- rsdp->length, rsdp->revision, rsdp->oem_id);
- rsdt = map_sysmem(rsdp->rsdt_address, 0);
- xsdt = map_sysmem(rsdp->xsdt_address, 0);
- list_rsdt(rsdt, xsdt);
+ if (rsdp->rsdt_address) {
+ rsdt = nomap_sysmem(rsdp->rsdt_address, 0);
+ dump_hdr(&rsdt->header);
+ }
+ if (rsdp->xsdt_address) {
+ xsdt = nomap_sysmem(rsdp->xsdt_address, 0);
+ dump_hdr(&xsdt->header);
+ len = xsdt->header.length - sizeof(xsdt->header);
+ count = len / sizeof(u64);
+ } else if (rsdp->rsdt_address) {
+ len = rsdt->header.length - sizeof(rsdt->header);
+ count = len / sizeof(u32);
+ } else {
+ return;
+ }
- return 0;
+ for (i = 0; i < count; i++) {
+ struct acpi_table_header *hdr;
+ u64 entry;
+
+ if (rsdp->xsdt_address)
+ entry = xsdt->entry[i];
+ else
+ entry = rsdt->entry[i];
+ if (!entry)
+ break;
+ hdr = nomap_sysmem(entry, 0);
+ dump_hdr(hdr);
+ if (!memcmp(hdr->signature, "FACP", ACPI_NAME_LEN))
+ list_fadt((struct acpi_fadt *)hdr);
+ }
+}
+
+static void list_rsdp(struct acpi_rsdp *rsdp)
+{
+ printf("RSDP %16lx %5x v%02d %.6s\n", (ulong)map_to_sysmem(rsdp),
+ rsdp->length, rsdp->revision, rsdp->oem_id);
+ list_rsdt(rsdp);
}
static int do_acpi_list(struct cmd_tbl *cmdtp, int flag, int argc,
@@ -111,8 +123,8 @@
printf("No ACPI tables present\n");
return 0;
}
- printf("Name Base Size Detail\n");
- printf("---- -------- ----- ------\n");
+ printf("Name Base Size Detail\n"
+ "---- ---------------- ----- ----------------------------\n");
list_rsdp(rsdp);
return 0;
@@ -156,6 +168,9 @@
char sig[ACPI_NAME_LEN];
int ret;
+ if (argc < 2)
+ return CMD_RET_USAGE;
+
name = argv[1];
if (strlen(name) != ACPI_NAME_LEN) {
printf("Table name '%s' must be four characters\n", name);
diff --git a/cmd/armflash.c b/cmd/armflash.c
index d1466f7..fdaea5a 100644
--- a/cmd/armflash.c
+++ b/cmd/armflash.c
@@ -180,6 +180,7 @@
{
struct afs_image *afi = NULL;
int i;
+ loff_t len_read = 0;
parse_flash();
for (i = 0; i < num_afs_images; i++) {
@@ -197,6 +198,7 @@
for (i = 0; i < afi->region_count; i++) {
ulong from, to;
+ u32 size;
from = afi->flash_mem_start + afi->regions[i].offset;
if (address) {
@@ -208,14 +210,20 @@
return CMD_RET_FAILURE;
}
- memcpy((void *)to, (void *)from, afi->regions[i].size);
+ size = afi->regions[i].size;
+ memcpy((void *)to, (void *)from, size);
printf("loaded region %d from %08lX to %08lX, %08X bytes\n",
i,
from,
to,
- afi->regions[i].size);
+ size);
+
+ len_read += size;
}
+
+ env_set_hex("filesize", len_read);
+
return CMD_RET_SUCCESS;
}
diff --git a/cmd/bdinfo.c b/cmd/bdinfo.c
index 1fe13ca..79106ca 100644
--- a/cmd/bdinfo.c
+++ b/cmd/bdinfo.c
@@ -10,6 +10,7 @@
#include <command.h>
#include <dm.h>
#include <env.h>
+#include <getopt.h>
#include <lmb.h>
#include <mapmem.h>
#include <net.h>
@@ -133,10 +134,8 @@
bdinfo_print_num_l(" clock", info.clock);
}
-int do_bdinfo(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
+static int bdinfo_print_all(struct bd_info *bd)
{
- struct bd_info *bd = gd->bd;
-
#ifdef DEBUG
bdinfo_print_num_l("bd address", (ulong)bd);
#endif
@@ -184,8 +183,38 @@
return 0;
}
+int do_bdinfo(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
+{
+ struct bd_info *bd = gd->bd;
+ struct getopt_state gs;
+ int opt;
+
+ if (!CONFIG_IS_ENABLED(GETOPT) || argc == 1)
+ return bdinfo_print_all(bd);
+
+ getopt_init_state(&gs);
+ while ((opt = getopt(&gs, argc, argv, "aem")) > 0) {
+ switch (opt) {
+ case 'a':
+ return bdinfo_print_all(bd);
+ case 'e':
+ if (!IS_ENABLED(CONFIG_CMD_NET))
+ return CMD_RET_USAGE;
+ print_eth();
+ return CMD_RET_SUCCESS;
+ case 'm':
+ print_bi_dram(bd);
+ return CMD_RET_SUCCESS;
+ default:
+ return CMD_RET_USAGE;
+ }
+ }
+
+ return CMD_RET_USAGE;
+}
+
U_BOOT_CMD(
- bdinfo, 1, 1, do_bdinfo,
+ bdinfo, 2, 1, do_bdinfo,
"print Board Info structure",
""
);
diff --git a/cmd/bind.c b/cmd/bind.c
index 4d1b788..be0d4d2 100644
--- a/cmd/bind.c
+++ b/cmd/bind.c
@@ -246,6 +246,8 @@
"Bind a device to a driver",
"<node path> <driver>\n"
"bind <class> <index> <driver>\n"
+ "Use 'dm tree' to list all devices registered in the driver model,\n"
+ "their path, class, index and current driver.\n"
);
U_BOOT_CMD(
@@ -254,4 +256,6 @@
"<node path>\n"
"unbind <class> <index>\n"
"unbind <class> <index> <driver>\n"
+ "Use 'dm tree' to list all devices registered in the driver model,\n"
+ "their path, class, index and current driver.\n"
);
diff --git a/cmd/bootefi.c b/cmd/bootefi.c
index 4d74969..9cf9027 100644
--- a/cmd/bootefi.c
+++ b/cmd/bootefi.c
@@ -7,555 +7,23 @@
#define LOG_CATEGORY LOGC_EFI
-#include <common.h>
-#include <bootm.h>
-#include <charset.h>
#include <command.h>
-#include <dm.h>
+#include <efi.h>
#include <efi_loader.h>
-#include <efi_selftest.h>
-#include <env.h>
-#include <errno.h>
-#include <image.h>
+#include <exports.h>
#include <log.h>
#include <malloc.h>
-#include <asm/global_data.h>
-#include <linux/libfdt.h>
-#include <linux/libfdt_env.h>
#include <mapmem.h>
-#include <memalign.h>
+#include <vsprintf.h>
#include <asm-generic/sections.h>
-#include <linux/linkage.h>
+#include <asm/global_data.h>
+#include <linux/string.h>
DECLARE_GLOBAL_DATA_PTR;
-static struct efi_device_path *bootefi_image_path;
-static struct efi_device_path *bootefi_device_path;
-static void *image_addr;
-static size_t image_size;
+static struct efi_device_path *test_image_path;
+static struct efi_device_path *test_device_path;
-/**
- * efi_get_image_parameters() - return image parameters
- *
- * @img_addr: address of loaded image in memory
- * @img_size: size of loaded image
- */
-void efi_get_image_parameters(void **img_addr, size_t *img_size)
-{
- *img_addr = image_addr;
- *img_size = image_size;
-}
-
-/**
- * efi_clear_bootdev() - clear boot device
- */
-static void efi_clear_bootdev(void)
-{
- efi_free_pool(bootefi_device_path);
- efi_free_pool(bootefi_image_path);
- bootefi_device_path = NULL;
- bootefi_image_path = NULL;
- image_addr = NULL;
- image_size = 0;
-}
-
-/**
- * efi_set_bootdev() - set boot device
- *
- * This function is called when a file is loaded, e.g. via the 'load' command.
- * We use the path to this file to inform the UEFI binary about the boot device.
- *
- * @dev: device, e.g. "MMC"
- * @devnr: number of the device, e.g. "1:2"
- * @path: path to file loaded
- * @buffer: buffer with file loaded
- * @buffer_size: size of file loaded
- */
-void efi_set_bootdev(const char *dev, const char *devnr, const char *path,
- void *buffer, size_t buffer_size)
-{
- struct efi_device_path *device, *image;
- efi_status_t ret;
-
- log_debug("dev=%s, devnr=%s, path=%s, buffer=%p, size=%zx\n", dev,
- devnr, path, buffer, buffer_size);
-
- /* Forget overwritten image */
- if (buffer + buffer_size >= image_addr &&
- image_addr + image_size >= buffer)
- efi_clear_bootdev();
-
- /* Remember only PE-COFF and FIT images */
- if (efi_check_pe(buffer, buffer_size, NULL) != EFI_SUCCESS) {
- if (IS_ENABLED(CONFIG_FIT) &&
- !fit_check_format(buffer, IMAGE_SIZE_INVAL)) {
- /*
- * FIT images of type EFI_OS are started via command
- * bootm. We should not use their boot device with the
- * bootefi command.
- */
- buffer = 0;
- buffer_size = 0;
- } else {
- log_debug("- not remembering image\n");
- return;
- }
- }
-
- /* efi_set_bootdev() is typically called repeatedly, recover memory */
- efi_clear_bootdev();
-
- image_addr = buffer;
- image_size = buffer_size;
-
- ret = efi_dp_from_name(dev, devnr, path, &device, &image);
- if (ret == EFI_SUCCESS) {
- bootefi_device_path = device;
- if (image) {
- /* FIXME: image should not contain device */
- struct efi_device_path *image_tmp = image;
-
- efi_dp_split_file_path(image, &device, &image);
- efi_free_pool(image_tmp);
- }
- bootefi_image_path = image;
- log_debug("- boot device %pD\n", device);
- if (image)
- log_debug("- image %pD\n", image);
- } else {
- log_debug("- efi_dp_from_name() failed, err=%lx\n", ret);
- efi_clear_bootdev();
- }
-}
-
-/**
- * efi_env_set_load_options() - set load options from environment variable
- *
- * @handle: the image handle
- * @env_var: name of the environment variable
- * @load_options: pointer to load options (output)
- * Return: status code
- */
-static efi_status_t efi_env_set_load_options(efi_handle_t handle,
- const char *env_var,
- u16 **load_options)
-{
- const char *env = env_get(env_var);
- size_t size;
- u16 *pos;
- efi_status_t ret;
-
- *load_options = NULL;
- if (!env)
- return EFI_SUCCESS;
- size = sizeof(u16) * (utf8_utf16_strlen(env) + 1);
- pos = calloc(size, 1);
- if (!pos)
- return EFI_OUT_OF_RESOURCES;
- *load_options = pos;
- utf8_utf16_strcpy(&pos, env);
- ret = efi_set_load_options(handle, size, *load_options);
- if (ret != EFI_SUCCESS) {
- free(*load_options);
- *load_options = NULL;
- }
- return ret;
-}
-
-#if !CONFIG_IS_ENABLED(GENERATE_ACPI_TABLE)
-
-/**
- * copy_fdt() - Copy the device tree to a new location available to EFI
- *
- * The FDT is copied to a suitable location within the EFI memory map.
- * Additional 12 KiB are added to the space in case the device tree needs to be
- * expanded later with fdt_open_into().
- *
- * @fdtp: On entry a pointer to the flattened device tree.
- * On exit a pointer to the copy of the flattened device tree.
- * FDT start
- * Return: status code
- */
-static efi_status_t copy_fdt(void **fdtp)
-{
- unsigned long fdt_ram_start = -1L, fdt_pages;
- efi_status_t ret = 0;
- void *fdt, *new_fdt;
- u64 new_fdt_addr;
- uint fdt_size;
- int i;
-
- for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
- u64 ram_start = gd->bd->bi_dram[i].start;
- u64 ram_size = gd->bd->bi_dram[i].size;
-
- if (!ram_size)
- continue;
-
- if (ram_start < fdt_ram_start)
- fdt_ram_start = ram_start;
- }
-
- /*
- * Give us at least 12 KiB of breathing room in case the device tree
- * needs to be expanded later.
- */
- fdt = *fdtp;
- fdt_pages = efi_size_in_pages(fdt_totalsize(fdt) + 0x3000);
- fdt_size = fdt_pages << EFI_PAGE_SHIFT;
-
- ret = efi_allocate_pages(EFI_ALLOCATE_ANY_PAGES,
- EFI_ACPI_RECLAIM_MEMORY, fdt_pages,
- &new_fdt_addr);
- if (ret != EFI_SUCCESS) {
- log_err("ERROR: Failed to reserve space for FDT\n");
- goto done;
- }
- new_fdt = (void *)(uintptr_t)new_fdt_addr;
- memcpy(new_fdt, fdt, fdt_totalsize(fdt));
- fdt_set_totalsize(new_fdt, fdt_size);
-
- *fdtp = (void *)(uintptr_t)new_fdt_addr;
-done:
- return ret;
-}
-
-/**
- * get_config_table() - get configuration table
- *
- * @guid: GUID of the configuration table
- * Return: pointer to configuration table or NULL
- */
-static void *get_config_table(const efi_guid_t *guid)
-{
- size_t i;
-
- for (i = 0; i < systab.nr_tables; i++) {
- if (!guidcmp(guid, &systab.tables[i].guid))
- return systab.tables[i].table;
- }
- return NULL;
-}
-
-#endif /* !CONFIG_IS_ENABLED(GENERATE_ACPI_TABLE) */
-
-/**
- * efi_install_fdt() - install device tree
- *
- * If fdt is not EFI_FDT_USE_INTERNAL, the device tree located at that memory
- * address will will be installed as configuration table, otherwise the device
- * tree located at the address indicated by environment variable fdt_addr or as
- * fallback fdtcontroladdr will be used.
- *
- * On architectures using ACPI tables device trees shall not be installed as
- * configuration table.
- *
- * @fdt: address of device tree or EFI_FDT_USE_INTERNAL to use the
- * the hardware device tree as indicated by environment variable
- * fdt_addr or as fallback the internal device tree as indicated by
- * the environment variable fdtcontroladdr
- * Return: status code
- */
-efi_status_t efi_install_fdt(void *fdt)
-{
- /*
- * The EBBR spec requires that we have either an FDT or an ACPI table
- * but not both.
- */
-#if CONFIG_IS_ENABLED(GENERATE_ACPI_TABLE)
- if (fdt) {
- log_warning("WARNING: Can't have ACPI table and device tree - ignoring DT.\n");
- return EFI_SUCCESS;
- }
-#else
- struct bootm_headers img = { 0 };
- efi_status_t ret;
-
- if (fdt == EFI_FDT_USE_INTERNAL) {
- const char *fdt_opt;
- uintptr_t fdt_addr;
-
- /* Look for device tree that is already installed */
- if (get_config_table(&efi_guid_fdt))
- return EFI_SUCCESS;
- /* Check if there is a hardware device tree */
- fdt_opt = env_get("fdt_addr");
- /* Use our own device tree as fallback */
- if (!fdt_opt) {
- fdt_opt = env_get("fdtcontroladdr");
- if (!fdt_opt) {
- log_err("ERROR: need device tree\n");
- return EFI_NOT_FOUND;
- }
- }
- fdt_addr = hextoul(fdt_opt, NULL);
- if (!fdt_addr) {
- log_err("ERROR: invalid $fdt_addr or $fdtcontroladdr\n");
- return EFI_LOAD_ERROR;
- }
- fdt = map_sysmem(fdt_addr, 0);
- }
-
- /* Install device tree */
- if (fdt_check_header(fdt)) {
- log_err("ERROR: invalid device tree\n");
- return EFI_LOAD_ERROR;
- }
-
- /* Prepare device tree for payload */
- ret = copy_fdt(&fdt);
- if (ret) {
- log_err("ERROR: out of memory\n");
- return EFI_OUT_OF_RESOURCES;
- }
-
- if (image_setup_libfdt(&img, fdt, 0, NULL)) {
- log_err("ERROR: failed to process device tree\n");
- return EFI_LOAD_ERROR;
- }
-
- /* Create memory reservations as indicated by the device tree */
- efi_carve_out_dt_rsv(fdt);
-
- efi_try_purge_kaslr_seed(fdt);
-
- if (CONFIG_IS_ENABLED(EFI_TCG2_PROTOCOL_MEASURE_DTB)) {
- ret = efi_tcg2_measure_dtb(fdt);
- if (ret == EFI_SECURITY_VIOLATION) {
- log_err("ERROR: failed to measure DTB\n");
- return ret;
- }
- }
-
- /* Install device tree as UEFI table */
- ret = efi_install_configuration_table(&efi_guid_fdt, fdt);
- if (ret != EFI_SUCCESS) {
- log_err("ERROR: failed to install device tree\n");
- return ret;
- }
-#endif /* GENERATE_ACPI_TABLE */
-
- return EFI_SUCCESS;
-}
-
-/**
- * do_bootefi_exec() - execute EFI binary
- *
- * The image indicated by @handle is started. When it returns the allocated
- * memory for the @load_options is freed.
- *
- * @handle: handle of loaded image
- * @load_options: load options
- * Return: status code
- *
- * Load the EFI binary into a newly assigned memory unwinding the relocation
- * information, install the loaded image protocol, and call the binary.
- */
-static efi_status_t do_bootefi_exec(efi_handle_t handle, void *load_options)
-{
- efi_status_t ret;
- efi_uintn_t exit_data_size = 0;
- u16 *exit_data = NULL;
- struct efi_event *evt;
-
- /* On ARM switch from EL3 or secure mode to EL2 or non-secure mode */
- switch_to_non_secure_mode();
-
- /*
- * The UEFI standard requires that the watchdog timer is set to five
- * minutes when invoking an EFI boot option.
- *
- * Unified Extensible Firmware Interface (UEFI), version 2.7 Errata A
- * 7.5. Miscellaneous Boot Services - EFI_BOOT_SERVICES.SetWatchdogTimer
- */
- ret = efi_set_watchdog(300);
- if (ret != EFI_SUCCESS) {
- log_err("ERROR: Failed to set watchdog timer\n");
- goto out;
- }
-
- /* Call our payload! */
- ret = EFI_CALL(efi_start_image(handle, &exit_data_size, &exit_data));
- if (ret != EFI_SUCCESS) {
- log_err("## Application failed, r = %lu\n",
- ret & ~EFI_ERROR_MASK);
- if (exit_data) {
- log_err("## %ls\n", exit_data);
- efi_free_pool(exit_data);
- }
- }
-
- efi_restore_gd();
-
-out:
- free(load_options);
-
- if (IS_ENABLED(CONFIG_EFI_LOAD_FILE2_INITRD)) {
- if (efi_initrd_deregister() != EFI_SUCCESS)
- log_err("Failed to remove loadfile2 for initrd\n");
- }
-
- /* Notify EFI_EVENT_GROUP_RETURN_TO_EFIBOOTMGR event group. */
- list_for_each_entry(evt, &efi_events, link) {
- if (evt->group &&
- !guidcmp(evt->group,
- &efi_guid_event_group_return_to_efibootmgr)) {
- efi_signal_event(evt);
- EFI_CALL(systab.boottime->close_event(evt));
- break;
- }
- }
-
- /* Control is returned to U-Boot, disable EFI watchdog */
- efi_set_watchdog(0);
-
- return ret;
-}
-
-/**
- * do_efibootmgr() - execute EFI boot manager
- *
- * Return: status code
- */
-static int do_efibootmgr(void)
-{
- efi_handle_t handle;
- efi_status_t ret;
- void *load_options;
-
- ret = efi_bootmgr_load(&handle, &load_options);
- if (ret != EFI_SUCCESS) {
- log_notice("EFI boot manager: Cannot load any image\n");
- return CMD_RET_FAILURE;
- }
-
- ret = do_bootefi_exec(handle, load_options);
-
- if (ret != EFI_SUCCESS)
- return CMD_RET_FAILURE;
-
- return CMD_RET_SUCCESS;
-}
-
-/**
- * do_bootefi_image() - execute EFI binary
- *
- * Set up memory image for the binary to be loaded, prepare device path, and
- * then call do_bootefi_exec() to execute it.
- *
- * @image_opt: string with image start address
- * @size_opt: string with image size or NULL
- * Return: status code
- */
-static int do_bootefi_image(const char *image_opt, const char *size_opt)
-{
- void *image_buf;
- unsigned long addr, size;
- efi_status_t ret;
-
-#ifdef CONFIG_CMD_BOOTEFI_HELLO
- if (!strcmp(image_opt, "hello")) {
- image_buf = __efi_helloworld_begin;
- size = __efi_helloworld_end - __efi_helloworld_begin;
- efi_clear_bootdev();
- } else
-#endif
- {
- addr = strtoul(image_opt, NULL, 16);
- /* Check that a numeric value was passed */
- if (!addr)
- return CMD_RET_USAGE;
- image_buf = map_sysmem(addr, 0);
-
- if (size_opt) {
- size = strtoul(size_opt, NULL, 16);
- if (!size)
- return CMD_RET_USAGE;
- efi_clear_bootdev();
- } else {
- if (image_buf != image_addr) {
- log_err("No UEFI binary known at %s\n",
- image_opt);
- return CMD_RET_FAILURE;
- }
- size = image_size;
- }
- }
- ret = efi_run_image(image_buf, size);
-
- if (ret != EFI_SUCCESS)
- return CMD_RET_FAILURE;
-
- return CMD_RET_SUCCESS;
-}
-
-/**
- * efi_run_image() - run loaded UEFI image
- *
- * @source_buffer: memory address of the UEFI image
- * @source_size: size of the UEFI image
- * Return: status code
- */
-efi_status_t efi_run_image(void *source_buffer, efi_uintn_t source_size)
-{
- efi_handle_t mem_handle = NULL, handle;
- struct efi_device_path *file_path = NULL;
- struct efi_device_path *msg_path;
- efi_status_t ret, ret2;
- u16 *load_options;
-
- if (!bootefi_device_path || !bootefi_image_path) {
- log_debug("Not loaded from disk\n");
- /*
- * Special case for efi payload not loaded from disk,
- * such as 'bootefi hello' or for example payload
- * loaded directly into memory via JTAG, etc:
- */
- file_path = efi_dp_from_mem(EFI_RESERVED_MEMORY_TYPE,
- (uintptr_t)source_buffer,
- source_size);
- /*
- * Make sure that device for device_path exist
- * in load_image(). Otherwise, shell and grub will fail.
- */
- ret = efi_install_multiple_protocol_interfaces(&mem_handle,
- &efi_guid_device_path,
- file_path, NULL);
- if (ret != EFI_SUCCESS)
- goto out;
- msg_path = file_path;
- } else {
- file_path = efi_dp_append(bootefi_device_path,
- bootefi_image_path);
- msg_path = bootefi_image_path;
- log_debug("Loaded from disk\n");
- }
-
- log_info("Booting %pD\n", msg_path);
-
- ret = EFI_CALL(efi_load_image(false, efi_root, file_path, source_buffer,
- source_size, &handle));
- if (ret != EFI_SUCCESS) {
- log_err("Loading image failed\n");
- goto out;
- }
-
- /* Transfer environment variable as load options */
- ret = efi_env_set_load_options(handle, "bootargs", &load_options);
- if (ret != EFI_SUCCESS)
- goto out;
-
- ret = do_bootefi_exec(handle, load_options);
-
-out:
- ret2 = efi_uninstall_multiple_protocol_interfaces(mem_handle,
- &efi_guid_device_path,
- file_path, NULL);
- efi_free_pool(file_path);
- return (ret != EFI_SUCCESS) ? ret : ret2;
-}
-
-#ifdef CONFIG_CMD_BOOTEFI_SELFTEST
static efi_status_t bootefi_run_prepare(const char *load_options_path,
struct efi_device_path *device_path,
struct efi_device_path *image_path,
@@ -597,23 +65,26 @@
efi_status_t ret;
/* Construct a dummy device path */
- bootefi_device_path = efi_dp_from_mem(EFI_RESERVED_MEMORY_TYPE, 0, 0);
- if (!bootefi_device_path)
+ test_device_path = efi_dp_from_mem(EFI_RESERVED_MEMORY_TYPE, 0, 0);
+ if (!test_device_path)
return EFI_OUT_OF_RESOURCES;
- bootefi_image_path = efi_dp_from_file(NULL, path);
- if (!bootefi_image_path) {
+ test_image_path = efi_dp_from_file(NULL, path);
+ if (!test_image_path) {
ret = EFI_OUT_OF_RESOURCES;
goto failure;
}
- ret = bootefi_run_prepare(load_options_path, bootefi_device_path,
- bootefi_image_path, image_objp,
+ ret = bootefi_run_prepare(load_options_path, test_device_path,
+ test_image_path, image_objp,
loaded_image_infop);
if (ret == EFI_SUCCESS)
return ret;
failure:
+ efi_free_pool(test_device_path);
+ efi_free_pool(test_image_path);
+ /* TODO: not sure calling clear function is necessary */
efi_clear_bootdev();
return ret;
}
@@ -638,6 +109,8 @@
ret = EFI_CALL(efi_selftest(&image_obj->header, &systab));
efi_restore_gd();
free(loaded_image_info->load_options);
+ efi_free_pool(test_device_path);
+ efi_free_pool(test_image_path);
if (ret != EFI_SUCCESS)
efi_delete_handle(&image_obj->header);
else
@@ -645,7 +118,6 @@
return ret != EFI_SUCCESS;
}
-#endif /* CONFIG_CMD_BOOTEFI_SELFTEST */
/**
* do_bootefi() - execute `bootefi` command
@@ -660,20 +132,15 @@
char *const argv[])
{
efi_status_t ret;
- char *img_addr, *img_size, *str_copy, *pos;
- void *fdt;
+ char *p;
+ void *fdt, *image_buf;
+ unsigned long addr, size;
+ void *image_addr;
+ size_t image_size;
if (argc < 2)
return CMD_RET_USAGE;
- /* Initialize EFI drivers */
- ret = efi_init_obj_list();
- if (ret != EFI_SUCCESS) {
- log_err("Error: Cannot initialize UEFI sub-system, r = %lu\n",
- ret & ~EFI_ERROR_MASK);
- return CMD_RET_FAILURE;
- }
-
if (argc > 2) {
uintptr_t fdt_addr;
@@ -682,32 +149,81 @@
} else {
fdt = EFI_FDT_USE_INTERNAL;
}
- ret = efi_install_fdt(fdt);
+
+ if (IS_ENABLED(CONFIG_CMD_BOOTEFI_BOOTMGR) &&
+ !strcmp(argv[1], "bootmgr")) {
+ ret = efi_bootmgr_run(fdt);
+
+ if (ret == EFI_INVALID_PARAMETER)
+ return CMD_RET_USAGE;
+ else if (ret)
+ return CMD_RET_FAILURE;
+
+ return CMD_RET_SUCCESS;
+ }
+
+ if (IS_ENABLED(CONFIG_CMD_BOOTEFI_SELFTEST) &&
+ !strcmp(argv[1], "selftest")) {
+ /* Initialize EFI drivers */
+ ret = efi_init_obj_list();
+ if (ret != EFI_SUCCESS) {
+ log_err("Error: Cannot initialize UEFI sub-system, r = %lu\n",
+ ret & ~EFI_ERROR_MASK);
+ return CMD_RET_FAILURE;
+ }
+
+ ret = efi_install_fdt(fdt);
+ if (ret == EFI_INVALID_PARAMETER)
+ return CMD_RET_USAGE;
+ else if (ret != EFI_SUCCESS)
+ return CMD_RET_FAILURE;
+
+ return do_efi_selftest();
+ }
+
+ if (!IS_ENABLED(CONFIG_CMD_BOOTEFI_BINARY))
+ return CMD_RET_SUCCESS;
+
+ if (IS_ENABLED(CONFIG_CMD_BOOTEFI_HELLO) &&
+ !strcmp(argv[1], "hello")) {
+ image_buf = __efi_helloworld_begin;
+ size = __efi_helloworld_end - __efi_helloworld_begin;
+ /* TODO: not sure calling clear function is necessary */
+ efi_clear_bootdev();
+ } else {
+ addr = strtoul(argv[1], NULL, 16);
+ /* Check that a numeric value was passed */
+ if (!addr)
+ return CMD_RET_USAGE;
+ image_buf = map_sysmem(addr, 0);
+
+ p = strchr(argv[1], ':');
+ if (p) {
+ size = strtoul(++p, NULL, 16);
+ if (!size)
+ return CMD_RET_USAGE;
+ efi_clear_bootdev();
+ } else {
+ /* Image should be already loaded */
+ efi_get_image_parameters(&image_addr, &image_size);
+
+ if (image_buf != image_addr) {
+ log_err("No UEFI binary known at %s\n",
+ argv[1]);
+ return CMD_RET_FAILURE;
+ }
+ size = image_size;
+ }
+ }
+
+ ret = efi_binary_run(image_buf, size, fdt);
+
if (ret == EFI_INVALID_PARAMETER)
return CMD_RET_USAGE;
- else if (ret != EFI_SUCCESS)
+ else if (ret)
return CMD_RET_FAILURE;
- if (IS_ENABLED(CONFIG_CMD_BOOTEFI_BOOTMGR)) {
- if (!strcmp(argv[1], "bootmgr"))
- return do_efibootmgr();
- }
-#ifdef CONFIG_CMD_BOOTEFI_SELFTEST
- if (!strcmp(argv[1], "selftest"))
- return do_efi_selftest();
-#endif
- str_copy = strdup(argv[1]);
- if (!str_copy) {
- log_err("Out of memory\n");
- return CMD_RET_FAILURE;
- }
- pos = str_copy;
- img_addr = strsep(&pos, ":");
- img_size = strsep(&pos, ":");
- ret = do_bootefi_image(img_addr, img_size);
- free(str_copy);
-
- return ret;
+ return CMD_RET_SUCCESS;
}
U_BOOT_LONGHELP(bootefi,
diff --git a/cmd/bootflow.c b/cmd/bootflow.c
index 3aeb40d..be5d7d8 100644
--- a/cmd/bootflow.c
+++ b/cmd/bootflow.c
@@ -135,7 +135,7 @@
struct udevice *dev = NULL;
struct bootflow bflow;
bool all = false, boot = false, errors = false, no_global = false;
- bool list = false, no_hunter = false;
+ bool list = false, no_hunter = false, menu = false, text_mode = false;
int num_valid = 0;
const char *label = NULL;
bool has_args;
@@ -155,6 +155,8 @@
no_global = strchr(argv[1], 'G');
list = strchr(argv[1], 'l');
no_hunter = strchr(argv[1], 'H');
+ menu = strchr(argv[1], 'm');
+ text_mode = strchr(argv[1], 't');
argc--;
argv++;
}
@@ -213,15 +215,32 @@
}
if (list)
show_bootflow(i, &bflow, errors);
- if (boot && !bflow.err)
+ if (!menu && boot && !bflow.err)
bootflow_run_boot(&iter, &bflow);
}
bootflow_iter_uninit(&iter);
if (list)
show_footer(i, num_valid);
- if (IS_ENABLED(CONFIG_CMD_BOOTFLOW_FULL) && !num_valid && !list)
- printf("No bootflows found; try again with -l\n");
+ if (IS_ENABLED(CONFIG_CMD_BOOTFLOW_FULL) && IS_ENABLED(CONFIG_EXPO)) {
+ if (!num_valid && !list) {
+ printf("No bootflows found; try again with -l\n");
+ } else if (menu) {
+ struct bootflow *sel_bflow;
+
+ ret = bootflow_handle_menu(std, text_mode, &sel_bflow);
+ if (!ret && boot) {
+ ret = console_clear();
+ if (ret) {
+ log_err("Failed to clear console: %dE\n",
+ ret);
+ return ret;
+ }
+
+ bootflow_run_boot(NULL, sel_bflow);
+ }
+ }
+ }
return 0;
}
@@ -524,9 +543,7 @@
op = argv[1];
arg = argv[2];
if (*op == 's') {
- if (argc < 4)
- return CMD_RET_USAGE;
- val = argv[3];
+ val = argv[3] ?: (const char *)BOOTFLOWCL_EMPTY;
}
switch (*op) {
diff --git a/cmd/booti.c b/cmd/booti.c
index a6c7db2..898df0f 100644
--- a/cmd/booti.c
+++ b/cmd/booti.c
@@ -20,9 +20,9 @@
/*
* Image booting support
*/
-static int booti_start(struct cmd_tbl *cmdtp, int flag, int argc,
- char *const argv[], struct bootm_headers *images)
+static int booti_start(struct bootm_info *bmi)
{
+ struct bootm_headers *images = bmi->images;
int ret;
ulong ld;
ulong relocated_addr;
@@ -34,16 +34,15 @@
unsigned long decomp_len;
int ctype;
- ret = do_bootm_states(cmdtp, flag, argc, argv, BOOTM_STATE_START,
- images, 1);
+ ret = bootm_run_states(bmi, BOOTM_STATE_START);
/* Setup Linux kernel Image entry point */
- if (!argc) {
+ if (!bmi->addr_img) {
ld = image_load_addr;
debug("* kernel: default image load address = 0x%08lx\n",
image_load_addr);
} else {
- ld = hextoul(argv[0], NULL);
+ ld = hextoul(bmi->addr_img, NULL);
debug("* kernel: cmdline image address = 0x%08lx\n", ld);
}
@@ -75,7 +74,7 @@
unmap_sysmem((void *)ld);
ret = booti_setup(ld, &relocated_addr, &image_size, false);
- if (ret != 0)
+ if (ret || IS_ENABLED(CONFIG_SANDBOX))
return 1;
/* Handle BOOTM_STATE_LOADOS */
@@ -95,7 +94,8 @@
* Handle the BOOTM_STATE_FINDOTHER state ourselves as we do not
* have a header that provide this informaiton.
*/
- if (bootm_find_images(flag, argc, argv, relocated_addr, image_size))
+ if (bootm_find_images(image_load_addr, bmi->conf_ramdisk, bmi->conf_fdt,
+ relocated_addr, image_size))
return 1;
return 0;
@@ -103,12 +103,25 @@
int do_booti(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
{
+ struct bootm_info bmi;
+ int states;
int ret;
/* Consume 'booti' */
argc--; argv++;
- if (booti_start(cmdtp, flag, argc, argv, &images))
+ bootm_init(&bmi);
+ if (argc)
+ bmi.addr_img = argv[0];
+ if (argc > 1)
+ bmi.conf_ramdisk = argv[1];
+ if (argc > 2)
+ bmi.conf_fdt = argv[2];
+ bmi.boot_progress = true;
+ bmi.cmd_name = "booti";
+ /* do not set up argc and argv[] since nothing uses them */
+
+ if (booti_start(&bmi))
return 1;
/*
@@ -118,19 +131,17 @@
bootm_disable_interrupts();
images.os.os = IH_OS_LINUX;
-#ifdef CONFIG_RISCV_SMODE
- images.os.arch = IH_ARCH_RISCV;
-#elif CONFIG_ARM64
- images.os.arch = IH_ARCH_ARM64;
-#endif
- ret = do_bootm_states(cmdtp, flag, argc, argv,
-#ifdef CONFIG_SYS_BOOT_RAMDISK_HIGH
- BOOTM_STATE_RAMDISK |
-#endif
- BOOTM_STATE_MEASURE |
- BOOTM_STATE_OS_PREP | BOOTM_STATE_OS_FAKE_GO |
- BOOTM_STATE_OS_GO,
- &images, 1);
+ if (IS_ENABLED(CONFIG_RISCV_SMODE))
+ images.os.arch = IH_ARCH_RISCV;
+ else if (IS_ENABLED(CONFIG_ARM64))
+ images.os.arch = IH_ARCH_ARM64;
+
+ states = BOOTM_STATE_MEASURE | BOOTM_STATE_OS_PREP |
+ BOOTM_STATE_OS_FAKE_GO | BOOTM_STATE_OS_GO;
+ if (IS_ENABLED(CONFIG_SYS_BOOT_RAMDISK_HIGH))
+ states |= BOOTM_STATE_RAMDISK;
+
+ ret = bootm_run_states(&bmi, states);
return ret;
}
diff --git a/cmd/bootm.c b/cmd/bootm.c
index 6ded091..9737a2d 100644
--- a/cmd/bootm.c
+++ b/cmd/bootm.c
@@ -76,6 +76,7 @@
static int do_bootm_subcommand(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[])
{
+ struct bootm_info bmi;
int ret = 0;
long state;
struct cmd_tbl *c;
@@ -103,7 +104,21 @@
return CMD_RET_USAGE;
}
- ret = do_bootm_states(cmdtp, flag, argc, argv, state, &images, 0);
+ bootm_init(&bmi);
+ if (argc)
+ bmi.addr_img = argv[0];
+ if (argc > 1)
+ bmi.conf_ramdisk = argv[1];
+ if (argc > 2)
+ bmi.conf_fdt = argv[2];
+ bmi.cmd_name = "bootm";
+ bmi.boot_progress = false;
+
+ /* set up argc and argv[] since some OSes use them */
+ bmi.argc = argc;
+ bmi.argv = argv;
+
+ ret = bootm_run_states(&bmi, state);
#if defined(CONFIG_CMD_BOOTM_PRE_LOAD)
if (!ret && (state & BOOTM_STATE_PRE_LOAD))
@@ -120,7 +135,7 @@
int do_bootm(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
{
- int states;
+ struct bootm_info bmi;
int ret;
/* determine if we have a sub command */
@@ -141,17 +156,19 @@
return do_bootm_subcommand(cmdtp, flag, argc, argv);
}
- states = BOOTM_STATE_START | BOOTM_STATE_FINDOS | BOOTM_STATE_PRE_LOAD |
- BOOTM_STATE_FINDOTHER | BOOTM_STATE_LOADOS |
- BOOTM_STATE_OS_PREP | BOOTM_STATE_OS_FAKE_GO |
- BOOTM_STATE_OS_GO;
- if (IS_ENABLED(CONFIG_SYS_BOOT_RAMDISK_HIGH))
- states |= BOOTM_STATE_RAMDISK;
- if (IS_ENABLED(CONFIG_MEASURED_BOOT))
- states |= BOOTM_STATE_MEASURE;
- if (IS_ENABLED(CONFIG_PPC) || IS_ENABLED(CONFIG_MIPS))
- states |= BOOTM_STATE_OS_CMDLINE;
- ret = do_bootm_states(cmdtp, flag, argc, argv, states, &images, 1);
+ bootm_init(&bmi);
+ if (argc)
+ bmi.addr_img = argv[0];
+ if (argc > 1)
+ bmi.conf_ramdisk = argv[1];
+ if (argc > 2)
+ bmi.conf_fdt = argv[2];
+
+ /* set up argc and argv[] since some OSes use them */
+ bmi.argc = argc;
+ bmi.argv = argv;
+
+ ret = bootm_run(&bmi);
return ret ? CMD_RET_FAILURE : 0;
}
diff --git a/cmd/bootmenu.c b/cmd/bootmenu.c
index 987b168..78184fc 100644
--- a/cmd/bootmenu.c
+++ b/cmd/bootmenu.c
@@ -119,7 +119,7 @@
iter = iter->next;
return iter->key;
case BKEY_QUIT:
- /* Quit by choosing the last entry - U-Boot console */
+ /* Quit by choosing the last entry */
iter = menu->first;
while (iter->next)
iter = iter->next;
@@ -361,15 +361,15 @@
}
#endif
- /* Add U-Boot console entry at the end */
+ /* Add Exit entry at the end */
if (i <= MAX_COUNT - 1) {
entry = malloc(sizeof(struct bootmenu_entry));
if (!entry)
goto cleanup;
- /* Add Quit entry if entering U-Boot console is disabled */
+ /* Add Quit entry if exiting bootmenu is disabled */
if (!IS_ENABLED(CONFIG_BOOTMENU_DISABLE_UBOOT_CONSOLE))
- entry->title = strdup("U-Boot console");
+ entry->title = strdup("Exit");
else
entry->title = strdup("Quit");
@@ -532,7 +532,7 @@
title = strdup(iter->title);
command = strdup(iter->command);
- /* last entry is U-Boot console or Quit */
+ /* last entry exits bootmenu */
if (iter->num == iter->menu->count - 1) {
ret = BOOTMENU_RET_QUIT;
goto cleanup;
diff --git a/cmd/bootz.c b/cmd/bootz.c
index dd6fe49..b6bb4aa 100644
--- a/cmd/bootz.c
+++ b/cmd/bootz.c
@@ -27,11 +27,20 @@
static int bootz_start(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[], struct bootm_headers *images)
{
- int ret;
ulong zi_start, zi_end;
+ struct bootm_info bmi;
+ int ret;
- ret = do_bootm_states(cmdtp, flag, argc, argv, BOOTM_STATE_START,
- images, 1);
+ bootm_init(&bmi);
+ if (argc)
+ bmi.addr_img = argv[0];
+ if (argc > 1)
+ bmi.conf_ramdisk = argv[1];
+ if (argc > 2)
+ bmi.conf_fdt = argv[2];
+ /* do not set up argc and argv[] since nothing uses them */
+
+ ret = bootm_run_states(&bmi, BOOTM_STATE_START);
/* Setup Linux kernel zImage entry point */
if (!argc) {
@@ -54,7 +63,9 @@
* Handle the BOOTM_STATE_FINDOTHER state ourselves as we do not
* have a header that provide this informaiton.
*/
- if (bootm_find_images(flag, argc, argv, images->ep, zi_end - zi_start))
+ if (bootm_find_images(image_load_addr, cmd_arg1(argc, argv),
+ cmd_arg2(argc, argv), images->ep,
+ zi_end - zi_start))
return 1;
return 0;
@@ -62,6 +73,7 @@
int do_bootz(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
{
+ struct bootm_info bmi;
int ret;
/* Consume 'bootz' */
@@ -77,14 +89,17 @@
bootm_disable_interrupts();
images.os.os = IH_OS_LINUX;
- ret = do_bootm_states(cmdtp, flag, argc, argv,
-#ifdef CONFIG_SYS_BOOT_RAMDISK_HIGH
- BOOTM_STATE_RAMDISK |
-#endif
- BOOTM_STATE_MEASURE |
- BOOTM_STATE_OS_PREP | BOOTM_STATE_OS_FAKE_GO |
- BOOTM_STATE_OS_GO,
- &images, 1);
+
+ bootm_init(&bmi);
+ if (argc)
+ bmi.addr_img = argv[0];
+ if (argc > 1)
+ bmi.conf_ramdisk = argv[1];
+ if (argc > 2)
+ bmi.conf_fdt = argv[2];
+ bmi.cmd_name = "bootz";
+
+ ret = bootz_run(&bmi);
return ret;
}
diff --git a/cmd/btrfs.c b/cmd/btrfs.c
index 98daea9..2843835 100644
--- a/cmd/btrfs.c
+++ b/cmd/btrfs.c
@@ -24,4 +24,4 @@
"list subvolumes of a BTRFS filesystem",
"<interface> <dev[:part]>\n"
" - List subvolumes of a BTRFS filesystem."
-)
+);
diff --git a/cmd/cli.c b/cmd/cli.c
new file mode 100644
index 0000000..be3bf7d
--- /dev/null
+++ b/cmd/cli.c
@@ -0,0 +1,133 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+#include <cli.h>
+#include <command.h>
+#include <string.h>
+#include <asm/global_data.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static const char *gd_flags_to_parser_name(void)
+{
+ if (gd->flags & GD_FLG_HUSH_OLD_PARSER)
+ return "old";
+ if (gd->flags & GD_FLG_HUSH_MODERN_PARSER)
+ return "modern";
+ return NULL;
+}
+
+static int do_cli_get(struct cmd_tbl *cmdtp, int flag, int argc,
+ char *const argv[])
+{
+ const char *current = gd_flags_to_parser_name();
+
+ if (!current) {
+ printf("current cli value is not valid, this should not happen!\n");
+ return CMD_RET_FAILURE;
+ }
+
+ printf("%s\n", current);
+
+ return CMD_RET_SUCCESS;
+}
+
+static int parser_string_to_gd_flags(const char *parser)
+{
+ if (!strcmp(parser, "old"))
+ return GD_FLG_HUSH_OLD_PARSER;
+ if (!strcmp(parser, "modern"))
+ return GD_FLG_HUSH_MODERN_PARSER;
+ return -1;
+}
+
+static int gd_flags_to_parser_config(int flag)
+{
+ if (gd->flags & GD_FLG_HUSH_OLD_PARSER)
+ return CONFIG_VAL(HUSH_OLD_PARSER);
+ if (gd->flags & GD_FLG_HUSH_MODERN_PARSER)
+ return CONFIG_VAL(HUSH_MODERN_PARSER);
+ return -1;
+}
+
+static void reset_parser_gd_flags(void)
+{
+ gd->flags &= ~GD_FLG_HUSH_OLD_PARSER;
+ gd->flags &= ~GD_FLG_HUSH_MODERN_PARSER;
+}
+
+static int do_cli_set(struct cmd_tbl *cmdtp, int flag, int argc,
+ char *const argv[])
+{
+ char *parser_name;
+ int parser_config;
+ int parser_flag;
+
+ if (argc < 2)
+ return CMD_RET_USAGE;
+
+ parser_name = argv[1];
+
+ parser_flag = parser_string_to_gd_flags(parser_name);
+ if (parser_flag == -1) {
+ printf("Bad value for parser name: %s\n", parser_name);
+ return CMD_RET_USAGE;
+ }
+
+ parser_config = gd_flags_to_parser_config(parser_flag);
+ switch (parser_config) {
+ case -1:
+ printf("Bad value for parser flags: %d\n", parser_flag);
+ return CMD_RET_FAILURE;
+ case 0:
+ printf("Want to set current parser to %s, but its code was not compiled!\n",
+ parser_name);
+ return CMD_RET_FAILURE;
+ }
+
+ reset_parser_gd_flags();
+ gd->flags |= parser_flag;
+
+ cli_init();
+ cli_loop();
+
+ /* cli_loop() should never return. */
+ return CMD_RET_FAILURE;
+}
+
+static struct cmd_tbl parser_sub[] = {
+ U_BOOT_CMD_MKENT(get, 1, 1, do_cli_get, "", ""),
+ U_BOOT_CMD_MKENT(set, 2, 1, do_cli_set, "", ""),
+};
+
+static int do_cli(struct cmd_tbl *cmdtp, int flag, int argc,
+ char *const argv[])
+{
+ struct cmd_tbl *cp;
+
+ if (argc < 2)
+ return CMD_RET_USAGE;
+
+ /* drop initial "parser" arg */
+ argc--;
+ argv++;
+
+ cp = find_cmd_tbl(argv[0], parser_sub, ARRAY_SIZE(parser_sub));
+ if (cp)
+ return cp->cmd(cmdtp, flag, argc, argv);
+
+ return CMD_RET_USAGE;
+}
+
+#if CONFIG_IS_ENABLED(SYS_LONGHELP)
+static char cli_help_text[] =
+ "get - print current cli\n"
+ "set - set the current cli, possible value are: old, modern"
+ ;
+#endif
+
+U_BOOT_CMD(cli, 3, 1, do_cli,
+ "cli",
+#if CONFIG_IS_ENABLED(SYS_LONGHELP)
+ cli_help_text
+#endif
+);
diff --git a/cmd/clk.c b/cmd/clk.c
index c7c379d..7bbcbfe 100644
--- a/cmd/clk.c
+++ b/cmd/clk.c
@@ -59,9 +59,10 @@
}
}
-int __weak soc_clk_dump(void)
+static int soc_clk_dump(void)
{
struct udevice *dev;
+ const struct clk_ops *ops;
printf(" Rate Usecnt Name\n");
printf("------------------------------------------\n");
@@ -69,10 +70,18 @@
uclass_foreach_dev_probe(UCLASS_CLK, dev)
show_clks(dev, -1, 0);
+ uclass_foreach_dev_probe(UCLASS_CLK, dev) {
+ ops = dev_get_driver_ops(dev);
+ if (ops && ops->dump) {
+ printf("\n%s %s:\n", dev->driver->name, dev->name);
+ ops->dump(dev);
+ }
+ }
+
return 0;
}
#else
-int __weak soc_clk_dump(void)
+static int soc_clk_dump(void)
{
puts("Not implemented\n");
return 1;
diff --git a/cmd/cls.c b/cmd/cls.c
index 1125a3f..80d0558 100644
--- a/cmd/cls.c
+++ b/cmd/cls.c
@@ -7,33 +7,14 @@
*/
#include <common.h>
#include <command.h>
+#include <console.h>
#include <dm.h>
-#include <video_console.h>
-
-#define CSI "\x1b["
static int do_video_clear(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[])
{
- __maybe_unused struct udevice *dev;
-
- /*
- * Send clear screen and home
- *
- * FIXME(Heinrich Schuchardt <xypron.glpk@gmx.de>): This should go
- * through an API and only be written to serial terminals, not video
- * displays
- */
- printf(CSI "2J" CSI "1;1H");
- if (IS_ENABLED(CONFIG_VIDEO_ANSI))
- return 0;
-
- if (IS_ENABLED(CONFIG_VIDEO)) {
- if (uclass_first_device_err(UCLASS_VIDEO_CONSOLE, &dev))
- return CMD_RET_FAILURE;
- if (vidconsole_clear_and_reset(dev))
- return CMD_RET_FAILURE;
- }
+ if (console_clear())
+ return CMD_RET_FAILURE;
return CMD_RET_SUCCESS;
}
diff --git a/cmd/disk.c b/cmd/disk.c
index 3d7bc2f..92eaa02 100644
--- a/cmd/disk.c
+++ b/cmd/disk.c
@@ -40,8 +40,8 @@
bootstage_mark(BOOTSTAGE_ID_IDE_BOOT_DEVICE);
- part = blk_get_device_part_str(intf, (argc == 3) ? argv[2] : NULL,
- &dev_desc, &info, 1);
+ part = blk_get_device_part_str(intf, cmd_arg2(argc, argv),
+ &dev_desc, &info, 1);
if (part < 0) {
bootstage_error(BOOTSTAGE_ID_IDE_TYPE);
return 1;
diff --git a/cmd/eeprom.c b/cmd/eeprom.c
index 0b6ca8c..322765a 100644
--- a/cmd/eeprom.c
+++ b/cmd/eeprom.c
@@ -435,4 +435,4 @@
"The values which can be provided with the -l option are:\n"
CONFIG_EEPROM_LAYOUT_HELP_STRING"\n"
#endif
-)
+);
diff --git a/cmd/efi_common.c b/cmd/efi_common.c
index f405609..1aa2351 100644
--- a/cmd/efi_common.c
+++ b/cmd/efi_common.c
@@ -17,10 +17,8 @@
for (i = 0; i < systab->nr_tables; i++) {
struct efi_configuration_table *tab = &systab->tables[i];
- char guid_str[37];
- uuid_bin_to_str(tab->guid.b, guid_str, 1);
- printf("%p %pUl %s\n", tab->table, guid_str,
+ printf("%p %pUl %s\n", tab->table, tab->guid.b,
uuid_guid_get_str(tab->guid.b) ?: "(unknown)");
}
}
diff --git a/cmd/eficonfig.c b/cmd/eficonfig.c
index e6e8a0a..8234e60 100644
--- a/cmd/eficonfig.c
+++ b/cmd/eficonfig.c
@@ -528,7 +528,10 @@
p += fp_size;
*((struct efi_device_path *)p) = END;
- dp = efi_dp_append(dp_volume, (struct efi_device_path *)buf);
+ dp = efi_dp_shorten(dp_volume);
+ if (!dp)
+ dp = dp_volume;
+ dp = efi_dp_concat(dp, &fp->dp, false);
free(buf);
return dp;
@@ -1481,7 +1484,8 @@
ret = EFI_OUT_OF_RESOURCES;
goto out;
}
- initrd_dp = efi_dp_append((const struct efi_device_path *)&id_dp, dp);
+ initrd_dp = efi_dp_concat((const struct efi_device_path *)&id_dp,
+ dp, false);
efi_free_pool(dp);
}
@@ -1492,7 +1496,7 @@
}
final_dp_size = efi_dp_size(dp) + sizeof(END);
if (initrd_dp) {
- final_dp = efi_dp_concat(dp, initrd_dp);
+ final_dp = efi_dp_concat(dp, initrd_dp, true);
final_dp_size += efi_dp_size(initrd_dp) + sizeof(END);
} else {
final_dp = efi_dp_dup(dp);
diff --git a/cmd/efidebug.c b/cmd/efidebug.c
index 78ef16f..a3a7556 100644
--- a/cmd/efidebug.c
+++ b/cmd/efidebug.c
@@ -699,8 +699,8 @@
if (!short_fp)
short_fp = tmp_fp;
- initrd_dp = efi_dp_append((const struct efi_device_path *)&id_dp,
- short_fp);
+ initrd_dp = efi_dp_concat((const struct efi_device_path *)&id_dp,
+ short_fp, false);
out:
efi_free_pool(tmp_dp);
@@ -754,6 +754,10 @@
uridp_len = sizeof(struct efi_device_path) + strlen(argv[3]) + 1;
uridp = efi_alloc(uridp_len + sizeof(END));
+ if (!uridp) {
+ log_err("Out of memory\n");
+ return CMD_RET_FAILURE;
+ }
uridp->dp.type = DEVICE_PATH_TYPE_MESSAGING_DEVICE;
uridp->dp.sub_type = DEVICE_PATH_SUB_TYPE_MSG_URI;
uridp->dp.length = uridp_len;
@@ -916,7 +920,7 @@
goto out;
}
- final_fp = efi_dp_concat(file_path, initrd_dp);
+ final_fp = efi_dp_concat(file_path, initrd_dp, true);
if (!final_fp) {
printf("Cannot create final device path\n");
r = CMD_RET_FAILURE;
@@ -1410,7 +1414,7 @@
}
static struct cmd_tbl cmd_efidebug_test_sub[] = {
-#ifdef CONFIG_CMD_BOOTEFI_BOOTMGR
+#ifdef CONFIG_EFI_BOOTMGR
U_BOOT_CMD_MKENT(bootmgr, CONFIG_SYS_MAXARGS, 1, do_efi_test_bootmgr,
"", ""),
#endif
@@ -1604,7 +1608,7 @@
" - show UEFI memory map\n"
"efidebug tables\n"
" - show UEFI configuration tables\n"
-#ifdef CONFIG_CMD_BOOTEFI_BOOTMGR
+#ifdef CONFIG_EFI_BOOTMGR
"efidebug test bootmgr\n"
" - run simple bootmgr for test\n"
#endif
diff --git a/cmd/ext2.c b/cmd/ext2.c
index 57a9951..a0ce0cf 100644
--- a/cmd/ext2.c
+++ b/cmd/ext2.c
@@ -42,7 +42,7 @@
"list files in a directory (default /)",
"<interface> <dev[:part]> [directory]\n"
" - list files from 'dev' on 'interface' in a 'directory'"
-)
+);
U_BOOT_CMD(
ext2load, 6, 0, do_ext2load,
@@ -50,4 +50,4 @@
"<interface> [<dev[:part]> [addr [filename [bytes [pos]]]]]\n"
" - load binary file 'filename' from 'dev' on 'interface'\n"
" to address 'addr' from ext2 filesystem."
-)
+);
diff --git a/cmd/fs.c b/cmd/fs.c
index 6044f73..46cb43d 100644
--- a/cmd/fs.c
+++ b/cmd/fs.c
@@ -39,7 +39,7 @@
" If 'bytes' is 0 or omitted, the file is read until the end.\n"
" 'pos' gives the file byte position to start reading from.\n"
" If 'pos' is 0 or omitted, the file is read from the start."
-)
+);
static int do_save_wrapper(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[])
@@ -56,7 +56,7 @@
" 'bytes' gives the size to save in bytes and is mandatory.\n"
" 'pos' gives the file byte position to start writing to.\n"
" If 'pos' is 0 or omitted, the file is written from the start."
-)
+);
static int do_ls_wrapper(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[])
@@ -70,7 +70,7 @@
"<interface> [<dev[:part]> [directory]]\n"
" - List files in directory 'directory' of partition 'part' on\n"
" device type 'interface' instance 'dev'."
-)
+);
static int do_ln_wrapper(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[])
@@ -84,7 +84,7 @@
"<interface> <dev[:part]> target linkname\n"
" - create a symbolic link to 'target' with the name 'linkname' on\n"
" device type 'interface' instance 'dev'."
-)
+);
static int do_fstype_wrapper(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[])
diff --git a/cmd/fuse.c b/cmd/fuse.c
index 0676bb7..f884c89 100644
--- a/cmd/fuse.c
+++ b/cmd/fuse.c
@@ -44,7 +44,7 @@
static int do_fuse(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[])
{
- const char *op = argc >= 2 ? argv[1] : NULL;
+ const char *op = cmd_arg1(argc, argv);
int confirmed = argc >= 3 && !strcmp(argv[2], "-y");
u32 bank, word, cnt, val, cmp;
ulong addr;
diff --git a/cmd/load.c b/cmd/load.c
index 2715cf5..540361b 100644
--- a/cmd/load.c
+++ b/cmd/load.c
@@ -230,7 +230,7 @@
static int read_record(char *buf, ulong len)
{
char *p;
- char c;
+ int c;
--len; /* always leave room for terminating '\0' byte */
@@ -827,7 +827,7 @@
/* k_recv receives a OS Open image file over kermit line */
static int k_recv(void)
{
- char new_char;
+ int new_char;
char k_state, k_state_saved;
int sum;
int done;
diff --git a/cmd/mem.c b/cmd/mem.c
index 66c2d36..768057e 100644
--- a/cmd/mem.c
+++ b/cmd/mem.c
@@ -35,11 +35,9 @@
DECLARE_GLOBAL_DATA_PTR;
/* Create a compile-time value */
-#ifdef MEM_SUPPORT_64BIT_DATA
-#define SUPPORT_64BIT_DATA 1
+#if MEM_SUPPORT_64BIT_DATA
#define HELP_Q ", .q"
#else
-#define SUPPORT_64BIT_DATA 0
#define HELP_Q ""
#endif
@@ -131,7 +129,7 @@
static int do_mem_mw(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[])
{
- ulong writeval; /* 64-bit if SUPPORT_64BIT_DATA */
+ ulong writeval; /* 64-bit if MEM_SUPPORT_64BIT_DATA */
ulong addr, count;
int size;
void *buf, *start;
@@ -152,7 +150,7 @@
/* Get the value to write.
*/
- if (SUPPORT_64BIT_DATA)
+ if (MEM_SUPPORT_64BIT_DATA)
writeval = simple_strtoull(argv[2], NULL, 16);
else
writeval = hextoul(argv[2], NULL);
@@ -170,7 +168,7 @@
while (count-- > 0) {
if (size == 4)
*((u32 *)buf) = (u32)writeval;
- else if (SUPPORT_64BIT_DATA && size == 8)
+ else if (MEM_SUPPORT_64BIT_DATA && size == 8)
*((ulong *)buf) = writeval;
else if (size == 2)
*((u16 *)buf) = (u16)writeval;
@@ -248,7 +246,7 @@
int rcode = 0;
const char *type;
const void *buf1, *buf2, *base;
- ulong word1, word2; /* 64-bit if SUPPORT_64BIT_DATA */
+ ulong word1, word2; /* 64-bit if MEM_SUPPORT_64BIT_DATA */
if (argc != 4)
return CMD_RET_USAGE;
@@ -276,7 +274,7 @@
if (size == 4) {
word1 = *(u32 *)buf1;
word2 = *(u32 *)buf2;
- } else if (SUPPORT_64BIT_DATA && size == 8) {
+ } else if (MEM_SUPPORT_64BIT_DATA && size == 8) {
word1 = *(ulong *)buf1;
word2 = *(ulong *)buf2;
} else if (size == 2) {
@@ -361,7 +359,7 @@
}
#endif
- memcpy(dst, src, count * size);
+ memmove(dst, src, count * size);
unmap_sysmem(src);
unmap_sysmem(dst);
@@ -528,7 +526,7 @@
{
ulong addr, length, i, bytes;
int size;
- volatile ulong *llp; /* 64-bit if SUPPORT_64BIT_DATA */
+ volatile ulong *llp; /* 64-bit if MEM_SUPPORT_64BIT_DATA */
volatile u32 *longp;
volatile u16 *shortp;
volatile u8 *cp;
@@ -559,7 +557,7 @@
* If we have only one object, just run infinite loops.
*/
if (length == 1) {
- if (SUPPORT_64BIT_DATA && size == 8) {
+ if (MEM_SUPPORT_64BIT_DATA && size == 8) {
llp = (ulong *)buf;
for (;;)
i = *llp;
@@ -579,7 +577,7 @@
i = *cp;
}
- if (SUPPORT_64BIT_DATA && size == 8) {
+ if (MEM_SUPPORT_64BIT_DATA && size == 8) {
for (;;) {
llp = (ulong *)buf;
i = length;
@@ -620,8 +618,8 @@
{
ulong addr, length, i, bytes;
int size;
- volatile ulong *llp; /* 64-bit if SUPPORT_64BIT_DATA */
- ulong data; /* 64-bit if SUPPORT_64BIT_DATA */
+ volatile ulong *llp; /* 64-bit if MEM_SUPPORT_64BIT_DATA */
+ ulong data; /* 64-bit if MEM_SUPPORT_64BIT_DATA */
volatile u32 *longp;
volatile u16 *shortp;
volatile u8 *cp;
@@ -646,7 +644,7 @@
length = hextoul(argv[2], NULL);
/* data to write */
- if (SUPPORT_64BIT_DATA)
+ if (MEM_SUPPORT_64BIT_DATA)
data = simple_strtoull(argv[3], NULL, 16);
else
data = hextoul(argv[3], NULL);
@@ -658,7 +656,7 @@
* If we have only one object, just run infinite loops.
*/
if (length == 1) {
- if (SUPPORT_64BIT_DATA && size == 8) {
+ if (MEM_SUPPORT_64BIT_DATA && size == 8) {
llp = (ulong *)buf;
for (;;)
*llp = data;
@@ -678,7 +676,7 @@
*cp = data;
}
- if (SUPPORT_64BIT_DATA && size == 8) {
+ if (MEM_SUPPORT_64BIT_DATA && size == 8) {
for (;;) {
llp = (ulong *)buf;
i = length;
@@ -1151,7 +1149,7 @@
char *const argv[])
{
ulong addr;
- ulong i; /* 64-bit if SUPPORT_64BIT_DATA */
+ ulong i; /* 64-bit if MEM_SUPPORT_64BIT_DATA */
int nbytes, size;
void *ptr = NULL;
@@ -1186,7 +1184,7 @@
printf("%08lx:", addr);
if (size == 4)
printf(" %08x", *((u32 *)ptr));
- else if (SUPPORT_64BIT_DATA && size == 8)
+ else if (MEM_SUPPORT_64BIT_DATA && size == 8)
printf(" %0lx", *((ulong *)ptr));
else if (size == 2)
printf(" %04x", *((u16 *)ptr));
@@ -1211,7 +1209,7 @@
#endif
else {
char *endp;
- if (SUPPORT_64BIT_DATA)
+ if (MEM_SUPPORT_64BIT_DATA)
i = simple_strtoull(console_buffer, &endp, 16);
else
i = hextoul(console_buffer, &endp);
@@ -1222,7 +1220,7 @@
bootretry_reset_cmd_timeout();
if (size == 4)
*((u32 *)ptr) = i;
- else if (SUPPORT_64BIT_DATA && size == 8)
+ else if (MEM_SUPPORT_64BIT_DATA && size == 8)
*((ulong *)ptr) = i;
else if (size == 2)
*((u16 *)ptr) = i;
diff --git a/cmd/mmc.c b/cmd/mmc.c
index 96befb2..2d5430a 100644
--- a/cmd/mmc.c
+++ b/cmd/mmc.c
@@ -946,7 +946,7 @@
}
if (argc == 2 || argc == 3)
- return mmc_partconf_print(mmc, argc == 3 ? argv[2] : NULL);
+ return mmc_partconf_print(mmc, cmd_arg2(argc, argv));
ack = dectoul(argv[2], NULL);
part_num = dectoul(argv[3], NULL);
diff --git a/cmd/mtd.c b/cmd/mtd.c
index e63c011..9083a68 100644
--- a/cmd/mtd.c
+++ b/cmd/mtd.c
@@ -77,7 +77,7 @@
if (has_pages) {
for (page = 0; page < npages; page++) {
- u64 data_off = page * mtd->writesize;
+ u64 data_off = (u64)page * mtd->writesize;
printf("\nDump %d data bytes from 0x%08llx:\n",
mtd->writesize, start_off + data_off);
@@ -85,7 +85,7 @@
mtd->writesize, start_off + data_off);
if (woob) {
- u64 oob_off = page * mtd->oobsize;
+ u64 oob_off = (u64)page * mtd->oobsize;
printf("Dump %d OOB bytes from page at 0x%08llx:\n",
mtd->oobsize, start_off + data_off);
diff --git a/cmd/part.c b/cmd/part.c
index 0ce1900..c75f85a 100644
--- a/cmd/part.c
+++ b/cmd/part.c
@@ -308,9 +308,9 @@
#ifdef CONFIG_PARTITION_TYPE_GUID
"part type <interface> <dev>:<part>\n"
" - print partition type\n"
-#endif
"part type <interface> <dev>:<part> <varname>\n"
" - set environment variable to partition type\n"
+#endif
"part set <interface> <dev> type\n"
" - set partition type for a device\n"
"part types\n"
diff --git a/cmd/pinmux.c b/cmd/pinmux.c
index f17cf41..105f01e 100644
--- a/cmd/pinmux.c
+++ b/cmd/pinmux.c
@@ -178,4 +178,4 @@
"list - list UCLASS_PINCTRL devices\n"
"pinmux dev [pincontroller-name] - select pin-controller device\n"
"pinmux status [-a | pin-name] - print pin-controller muxing [for all | for pin-name]\n"
-)
+);
diff --git a/cmd/qfw.c b/cmd/qfw.c
index d6ecfa6..1b8c775 100644
--- a/cmd/qfw.c
+++ b/cmd/qfw.c
@@ -121,4 +121,4 @@
" - list : print firmware(s) currently loaded\n"
" - cpus : print online cpu number\n"
" - load <kernel addr> <initrd addr> : load kernel and initrd (if any), and setup for zboot\n"
-)
+);
diff --git a/cmd/scmi.c b/cmd/scmi.c
new file mode 100644
index 0000000..664062c
--- /dev/null
+++ b/cmd/scmi.c
@@ -0,0 +1,384 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * SCMI (System Control and Management Interface) utility command
+ *
+ * Copyright (c) 2023 Linaro Limited
+ * Author: AKASHI Takahiro
+ */
+
+#include <command.h>
+#include <exports.h>
+#include <scmi_agent.h>
+#include <scmi_agent-uclass.h>
+#include <stdlib.h>
+#include <asm/types.h>
+#include <dm/device.h>
+#include <dm/uclass.h> /* uclass_get_device */
+#include <linux/bitfield.h>
+#include <linux/bitops.h>
+
+struct {
+ enum scmi_std_protocol id;
+ const char *name;
+} protocol_name[] = {
+ {SCMI_PROTOCOL_ID_BASE, "Base"},
+ {SCMI_PROTOCOL_ID_POWER_DOMAIN, "Power domain management"},
+ {SCMI_PROTOCOL_ID_SYSTEM, "System power management"},
+ {SCMI_PROTOCOL_ID_PERF, "Performance domain management"},
+ {SCMI_PROTOCOL_ID_CLOCK, "Clock management"},
+ {SCMI_PROTOCOL_ID_SENSOR, "Sensor management"},
+ {SCMI_PROTOCOL_ID_RESET_DOMAIN, "Reset domain management"},
+ {SCMI_PROTOCOL_ID_VOLTAGE_DOMAIN, "Voltage domain management"},
+};
+
+/**
+ * get_agent() - get SCMI agent device
+ *
+ * Return: Pointer to SCMI agent device on success, NULL on failure
+ */
+static struct udevice *get_agent(void)
+{
+ struct udevice *agent;
+
+ if (uclass_get_device(UCLASS_SCMI_AGENT, 0, &agent)) {
+ printf("Cannot find any SCMI agent\n");
+ return NULL;
+ }
+
+ return agent;
+}
+
+/**
+ * get_base_proto() - get SCMI base protocol device
+ * @agent: SCMI agent device
+ *
+ * Return: Pointer to SCMI base protocol device on success,
+ * NULL on failure
+ */
+static struct udevice *get_base_proto(struct udevice *agent)
+{
+ struct udevice *base_proto;
+
+ if (!agent) {
+ agent = get_agent();
+ if (!agent)
+ return NULL;
+ }
+
+ base_proto = scmi_get_protocol(agent, SCMI_PROTOCOL_ID_BASE);
+ if (!base_proto) {
+ printf("SCMI base protocol not found\n");
+ return NULL;
+ }
+
+ return base_proto;
+}
+
+/**
+ * get_proto_name() - get the name of SCMI protocol
+ *
+ * @id: SCMI Protocol ID
+ *
+ * Get the printable name of the protocol, @id
+ *
+ * Return: Name string on success, NULL on failure
+ */
+static const char *get_proto_name(enum scmi_std_protocol id)
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(protocol_name); i++)
+ if (id == protocol_name[i].id)
+ return protocol_name[i].name;
+
+ return NULL;
+}
+
+/**
+ * do_scmi_info() - get the information of SCMI services
+ *
+ * @cmdtp: Command table
+ * @flag: Command flag
+ * @argc: Number of arguments
+ * @argv: Argument array
+ *
+ * Get the information of SCMI services using various interfaces
+ * provided by the Base protocol.
+ *
+ * Return: CMD_RET_SUCCESS on success, CMD_RET_RET_FAILURE on failure
+ */
+static int do_scmi_info(struct cmd_tbl *cmdtp, int flag, int argc,
+ char * const argv[])
+{
+ struct udevice *agent, *base_proto;
+ u32 agent_id, num_protocols;
+ u8 *agent_name, *protocols;
+ int i, ret;
+
+ if (argc != 1)
+ return CMD_RET_USAGE;
+
+ agent = get_agent();
+ if (!agent)
+ return CMD_RET_FAILURE;
+ base_proto = get_base_proto(agent);
+ if (!base_proto)
+ return CMD_RET_FAILURE;
+
+ printf("SCMI device: %s\n", agent->name);
+ printf(" protocol version: 0x%x\n", scmi_version(agent));
+ printf(" # of agents: %d\n", scmi_num_agents(agent));
+ for (i = 0; i < scmi_num_agents(agent); i++) {
+ ret = scmi_base_discover_agent(base_proto, i, &agent_id,
+ &agent_name);
+ if (ret) {
+ if (ret != -EOPNOTSUPP)
+ printf("base_discover_agent() failed for id: %d (%d)\n",
+ i, ret);
+ break;
+ }
+ printf(" %c%2d: %s\n", i == scmi_agent_id(agent) ? '>' : ' ',
+ i, agent_name);
+ free(agent_name);
+ }
+ printf(" # of protocols: %d\n", scmi_num_protocols(agent));
+ num_protocols = scmi_num_protocols(agent);
+ protocols = scmi_protocols(agent);
+ if (protocols)
+ for (i = 0; i < num_protocols; i++)
+ printf(" %s\n", get_proto_name(protocols[i]));
+ printf(" vendor: %s\n", scmi_vendor(agent));
+ printf(" sub vendor: %s\n", scmi_sub_vendor(agent));
+ printf(" impl version: 0x%x\n", scmi_impl_version(agent));
+
+ return CMD_RET_SUCCESS;
+}
+
+/**
+ * do_scmi_set_dev() - set access permission to device
+ *
+ * @cmdtp: Command table
+ * @flag: Command flag
+ * @argc: Number of arguments
+ * @argv: Argument array
+ *
+ * Set access permission to device with SCMI_BASE_SET_DEVICE_PERMISSIONS
+ *
+ * Return: CMD_RET_SUCCESS on success, CMD_RET_RET_FAILURE on failure
+ */
+static int do_scmi_set_dev(struct cmd_tbl *cmdtp, int flag, int argc,
+ char * const argv[])
+{
+ u32 agent_id, device_id, flags, attributes;
+ char *end;
+ struct udevice *base_proto;
+ int ret;
+
+ if (argc != 4)
+ return CMD_RET_USAGE;
+
+ agent_id = simple_strtoul(argv[1], &end, 16);
+ if (*end != '\0')
+ return CMD_RET_USAGE;
+
+ device_id = simple_strtoul(argv[2], &end, 16);
+ if (*end != '\0')
+ return CMD_RET_USAGE;
+
+ flags = simple_strtoul(argv[3], &end, 16);
+ if (*end != '\0')
+ return CMD_RET_USAGE;
+
+ base_proto = get_base_proto(NULL);
+ if (!base_proto)
+ return CMD_RET_FAILURE;
+
+ ret = scmi_base_protocol_message_attrs(base_proto,
+ SCMI_BASE_SET_DEVICE_PERMISSIONS,
+ &attributes);
+ if (ret) {
+ printf("This operation is not supported\n");
+ return CMD_RET_FAILURE;
+ }
+
+ ret = scmi_base_set_device_permissions(base_proto, agent_id,
+ device_id, flags);
+ if (ret) {
+ printf("%s access to device:%u failed (%d)\n",
+ flags ? "Allowing" : "Denying", device_id, ret);
+ return CMD_RET_FAILURE;
+ }
+
+ return CMD_RET_SUCCESS;
+}
+
+/**
+ * do_scmi_set_proto() - set protocol permission to device
+ *
+ * @cmdtp: Command table
+ * @flag: Command flag
+ * @argc: Number of arguments
+ * @argv: Argument array
+ *
+ * Set protocol permission to device with SCMI_BASE_SET_PROTOCOL_PERMISSIONS
+ *
+ * Return: CMD_RET_SUCCESS on success, CMD_RET_RET_FAILURE on failure
+ */
+static int do_scmi_set_proto(struct cmd_tbl *cmdtp, int flag, int argc,
+ char * const argv[])
+{
+ u32 agent_id, device_id, protocol_id, flags, attributes;
+ char *end;
+ struct udevice *base_proto;
+ int ret;
+
+ if (argc != 5)
+ return CMD_RET_USAGE;
+
+ agent_id = simple_strtoul(argv[1], &end, 16);
+ if (*end != '\0')
+ return CMD_RET_USAGE;
+
+ device_id = simple_strtoul(argv[2], &end, 16);
+ if (*end != '\0')
+ return CMD_RET_USAGE;
+
+ protocol_id = simple_strtoul(argv[3], &end, 16);
+ if (*end != '\0')
+ return CMD_RET_USAGE;
+
+ flags = simple_strtoul(argv[4], &end, 16);
+ if (*end != '\0')
+ return CMD_RET_USAGE;
+
+ base_proto = get_base_proto(NULL);
+ if (!base_proto)
+ return CMD_RET_FAILURE;
+
+ ret = scmi_base_protocol_message_attrs(base_proto,
+ SCMI_BASE_SET_PROTOCOL_PERMISSIONS,
+ &attributes);
+ if (ret) {
+ printf("This operation is not supported\n");
+ return CMD_RET_FAILURE;
+ }
+
+ ret = scmi_base_set_protocol_permissions(base_proto, agent_id,
+ device_id, protocol_id,
+ flags);
+ if (ret) {
+ printf("%s access to protocol:0x%x on device:%u failed (%d)\n",
+ flags ? "Allowing" : "Denying", protocol_id, device_id,
+ ret);
+ return CMD_RET_FAILURE;
+ }
+
+ return CMD_RET_SUCCESS;
+}
+
+/**
+ * do_scmi_reset() - reset platform resource settings
+ *
+ * @cmdtp: Command table
+ * @flag: Command flag
+ * @argc: Number of arguments
+ * @argv: Argument array
+ *
+ * Reset platform resource settings with BASE_RESET_AGENT_CONFIGURATION
+ *
+ * Return: CMD_RET_SUCCESS on success, CMD_RET_RET_FAILURE on failure
+ */
+static int do_scmi_reset(struct cmd_tbl *cmdtp, int flag, int argc,
+ char * const argv[])
+{
+ u32 agent_id, flags, attributes;
+ char *end;
+ struct udevice *base_proto;
+ int ret;
+
+ if (argc != 3)
+ return CMD_RET_USAGE;
+
+ agent_id = simple_strtoul(argv[1], &end, 16);
+ if (*end != '\0')
+ return CMD_RET_USAGE;
+
+ flags = simple_strtoul(argv[2], &end, 16);
+ if (*end != '\0')
+ return CMD_RET_USAGE;
+
+ base_proto = get_base_proto(NULL);
+ if (!base_proto)
+ return CMD_RET_FAILURE;
+
+ ret = scmi_base_protocol_message_attrs(base_proto,
+ SCMI_BASE_RESET_AGENT_CONFIGURATION,
+ &attributes);
+ if (ret) {
+ printf("Reset is not supported\n");
+ return CMD_RET_FAILURE;
+ }
+
+ ret = scmi_base_reset_agent_configuration(base_proto, agent_id, flags);
+ if (ret) {
+ printf("Reset failed (%d)\n", ret);
+ return CMD_RET_FAILURE;
+ }
+
+ return CMD_RET_SUCCESS;
+}
+
+static struct cmd_tbl cmd_scmi_sub[] = {
+ U_BOOT_CMD_MKENT(info, CONFIG_SYS_MAXARGS, 1,
+ do_scmi_info, "", ""),
+ U_BOOT_CMD_MKENT(perm_dev, CONFIG_SYS_MAXARGS, 1,
+ do_scmi_set_dev, "", ""),
+ U_BOOT_CMD_MKENT(perm_proto, CONFIG_SYS_MAXARGS, 1,
+ do_scmi_set_proto, "", ""),
+ U_BOOT_CMD_MKENT(reset, CONFIG_SYS_MAXARGS, 1,
+ do_scmi_reset, "", ""),
+};
+
+/**
+ * do_scmi() - SCMI utility
+ *
+ * @cmdtp: Command table
+ * @flag: Command flag
+ * @argc: Number of arguments
+ * @argv: Argument array
+ *
+ * Provide user interfaces to SCMI protocols.
+ *
+ * Return: CMD_RET_SUCCESS on success,
+ * CMD_RET_USAGE or CMD_RET_RET_FAILURE on failure
+ */
+static int do_scmi(struct cmd_tbl *cmdtp, int flag,
+ int argc, char *const argv[])
+{
+ struct cmd_tbl *cp;
+
+ if (argc < 2)
+ return CMD_RET_USAGE;
+
+ argc--; argv++;
+
+ cp = find_cmd_tbl(argv[0], cmd_scmi_sub, ARRAY_SIZE(cmd_scmi_sub));
+ if (!cp)
+ return CMD_RET_USAGE;
+
+ return cp->cmd(cmdtp, flag, argc, argv);
+}
+
+static char scmi_help_text[] =
+ " - SCMI utility\n"
+ " info - get the info of SCMI services\n"
+ " perm_dev <agent-id in hex> <device-id in hex> <flags in hex>\n"
+ " - set access permission to device\n"
+ " perm_proto <agent-id in hex> <device-id in hex> <protocol-id in hex> <flags in hex>\n"
+ " - set protocol permission to device\n"
+ " reset <agent-id in hex> <flags in hex>\n"
+ " - reset platform resource settings\n"
+ "";
+
+U_BOOT_CMD(scmi, CONFIG_SYS_MAXARGS, 0, do_scmi, "SCMI utility",
+ scmi_help_text);
diff --git a/cmd/smbios.c b/cmd/smbios.c
new file mode 100644
index 0000000..feebf93
--- /dev/null
+++ b/cmd/smbios.c
@@ -0,0 +1,191 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * The 'smbios' command displays information from the SMBIOS table.
+ *
+ * Copyright (c) 2023, Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
+ */
+
+#include <command.h>
+#include <hexdump.h>
+#include <mapmem.h>
+#include <smbios.h>
+#include <tables_csum.h>
+#include <asm/global_data.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/**
+ * smbios_get_string() - get SMBIOS string from table
+ *
+ * @table: SMBIOS table
+ * @index: index of the string
+ * Return: address of string, may point to empty string
+ */
+static const char *smbios_get_string(void *table, int index)
+{
+ const char *str = (char *)table +
+ ((struct smbios_header *)table)->length;
+
+ if (!*str)
+ ++str;
+ for (--index; *str && index; --index)
+ str += strlen(str) + 1;
+
+ return str;
+}
+
+static struct smbios_header *next_table(struct smbios_header *table)
+{
+ const char *str;
+
+ if (table->type == SMBIOS_END_OF_TABLE)
+ return NULL;
+
+ str = smbios_get_string(table, 0);
+ return (struct smbios_header *)(++str);
+}
+
+static void smbios_print_generic(struct smbios_header *table)
+{
+ char *str = (char *)table + table->length;
+
+ if (CONFIG_IS_ENABLED(HEXDUMP)) {
+ printf("Header and Data:\n");
+ print_hex_dump("\t", DUMP_PREFIX_OFFSET, 16, 1,
+ table, table->length, false);
+ }
+ if (*str) {
+ printf("Strings:\n");
+ for (int index = 1; *str; ++index) {
+ printf("\tString %u: %s\n", index, str);
+ str += strlen(str) + 1;
+ }
+ }
+}
+
+void smbios_print_str(const char *label, void *table, u8 index)
+{
+ printf("\t%s: %s\n", label, smbios_get_string(table, index));
+}
+
+static void smbios_print_type1(struct smbios_type1 *table)
+{
+ printf("System Information\n");
+ smbios_print_str("Manufacturer", table, table->manufacturer);
+ smbios_print_str("Product Name", table, table->product_name);
+ smbios_print_str("Version", table, table->version);
+ smbios_print_str("Serial Number", table, table->serial_number);
+ if (table->length >= 0x19) {
+ printf("\tUUID %pUl\n", table->uuid);
+ smbios_print_str("Wake Up Type", table, table->serial_number);
+ }
+ if (table->length >= 0x1b) {
+ smbios_print_str("Serial Number", table, table->serial_number);
+ smbios_print_str("SKU Number", table, table->sku_number);
+ }
+}
+
+static void smbios_print_type2(struct smbios_type2 *table)
+{
+ u16 *handle;
+
+ printf("Base Board Information\n");
+ smbios_print_str("Manufacturer", table, table->manufacturer);
+ smbios_print_str("Product Name", table, table->product_name);
+ smbios_print_str("Version", table, table->version);
+ smbios_print_str("Serial Number", table, table->serial_number);
+ smbios_print_str("Asset Tag", table, table->asset_tag_number);
+ printf("\tFeature Flags: 0x%2x\n", table->feature_flags);
+ smbios_print_str("Chassis Location", table, table->chassis_location);
+ printf("\tChassis Handle: 0x%2x\n", table->chassis_handle);
+ smbios_print_str("Board Type", table, table->board_type);
+ printf("\tContained Object Handles: ");
+ handle = (void *)table->eos;
+ for (int i = 0; i < table->number_contained_objects; ++i)
+ printf("0x%04x ", handle[i]);
+ printf("\n");
+}
+
+static void smbios_print_type127(struct smbios_type127 *table)
+{
+ printf("End Of Table\n");
+}
+
+static int do_smbios(struct cmd_tbl *cmdtp, int flag, int argc,
+ char *const argv[])
+{
+ ulong addr;
+ void *entry;
+ u32 size;
+ char version[12];
+ struct smbios_header *table;
+ static const char smbios_sig[] = "_SM_";
+ static const char smbios3_sig[] = "_SM3_";
+ size_t count = 0;
+ u32 max_struct_size;
+
+ addr = gd_smbios_start();
+ if (!addr) {
+ log_warning("SMBIOS not available\n");
+ return CMD_RET_FAILURE;
+ }
+ entry = map_sysmem(addr, 0);
+ if (!memcmp(entry, smbios3_sig, sizeof(smbios3_sig) - 1)) {
+ struct smbios3_entry *entry3 = entry;
+
+ table = (void *)(uintptr_t)entry3->struct_table_address;
+ snprintf(version, sizeof(version), "%d.%d.%d",
+ entry3->major_ver, entry3->minor_ver, entry3->doc_rev);
+ table = (void *)(uintptr_t)entry3->struct_table_address;
+ size = entry3->length;
+ max_struct_size = entry3->max_struct_size;
+ } else if (!memcmp(entry, smbios_sig, sizeof(smbios_sig) - 1)) {
+ struct smbios_entry *entry2 = entry;
+
+ snprintf(version, sizeof(version), "%d.%d",
+ entry2->major_ver, entry2->minor_ver);
+ table = (void *)(uintptr_t)entry2->struct_table_address;
+ size = entry2->length;
+ max_struct_size = entry2->max_struct_size;
+ } else {
+ log_err("Unknown SMBIOS anchor format\n");
+ return CMD_RET_FAILURE;
+ }
+ if (table_compute_checksum(entry, size)) {
+ log_err("Invalid anchor checksum\n");
+ return CMD_RET_FAILURE;
+ }
+ printf("SMBIOS %s present.\n", version);
+
+ for (struct smbios_header *pos = table; pos; pos = next_table(pos))
+ ++count;
+ printf("%zd structures occupying %d bytes\n", count, max_struct_size);
+ printf("Table at 0x%llx\n", (unsigned long long)map_to_sysmem(table));
+
+ for (struct smbios_header *pos = table; pos; pos = next_table(pos)) {
+ printf("\nHandle 0x%04x, DMI type %d, %d bytes at 0x%llx\n",
+ pos->handle, pos->type, pos->length,
+ (unsigned long long)map_to_sysmem(pos));
+ switch (pos->type) {
+ case 1:
+ smbios_print_type1((struct smbios_type1 *)pos);
+ break;
+ case 2:
+ smbios_print_type2((struct smbios_type2 *)pos);
+ break;
+ case 127:
+ smbios_print_type127((struct smbios_type127 *)pos);
+ break;
+ default:
+ smbios_print_generic(pos);
+ break;
+ }
+ }
+
+ return CMD_RET_SUCCESS;
+}
+
+U_BOOT_LONGHELP(smbios, "- display SMBIOS information");
+
+U_BOOT_CMD(smbios, 1, 0, do_smbios, "display SMBIOS information",
+ smbios_help_text);
diff --git a/cmd/ufs.c b/cmd/ufs.c
index 282b414..536bd85 100644
--- a/cmd/ufs.c
+++ b/cmd/ufs.c
@@ -32,6 +32,6 @@
}
U_BOOT_CMD(ufs, 3, 1, do_ufs,
- "UFS sub system",
+ "UFS sub-system",
"init [dev] - init UFS subsystem\n"
);
diff --git a/cmd/ximg.c b/cmd/ximg.c
index a50dd20..0e7eead 100644
--- a/cmd/ximg.c
+++ b/cmd/ximg.c
@@ -27,11 +27,6 @@
#include <asm/cache.h>
#include <asm/io.h>
-#ifndef CFG_SYS_XIMG_LEN
-/* use 8MByte as default max gunzip size */
-#define CFG_SYS_XIMG_LEN 0x800000
-#endif
-
static int
do_imgextract(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
{
@@ -52,7 +47,7 @@
size_t fit_len;
#endif
#ifdef CONFIG_GZIP
- uint unc_len = CFG_SYS_XIMG_LEN;
+ uint unc_len = CONFIG_SYS_XIMG_LEN;
#endif
uint8_t comp;
diff --git a/common/Makefile b/common/Makefile
index 1495436..f010c2a 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -9,7 +9,8 @@
obj-y += main.o
obj-y += exports.o
obj-y += cli_getch.o cli_simple.o cli_readline.o
-obj-$(CONFIG_HUSH_PARSER) += cli_hush.o
+obj-$(CONFIG_HUSH_OLD_PARSER) += cli_hush.o
+obj-$(CONFIG_HUSH_MODERN_PARSER) += cli_hush_modern.o
obj-$(CONFIG_AUTOBOOT) += autoboot.o
obj-y += version.o
diff --git a/common/bloblist.c b/common/bloblist.c
index a22f6c1..2d37391 100644
--- a/common/bloblist.c
+++ b/common/bloblist.c
@@ -13,6 +13,7 @@
#include <malloc.h>
#include <mapmem.h>
#include <spl.h>
+#include <tables_csum.h>
#include <asm/global_data.h>
#include <u-boot/crc.h>
@@ -26,8 +27,6 @@
* start address of the data in each blob is aligned as required. Note that
* each blob's *data* is aligned to BLOBLIST_ALIGN regardless of the alignment
* of the bloblist itself or the blob header.
- *
- * So far, only BLOBLIST_ALIGN alignment is supported.
*/
DECLARE_GLOBAL_DATA_PTR;
@@ -36,16 +35,26 @@
enum bloblist_tag_t tag;
const char *name;
} tag_name[] = {
- { BLOBLISTT_NONE, "(none)" },
+ { BLOBLISTT_VOID, "(void)" },
/* BLOBLISTT_AREA_FIRMWARE_TOP */
+ { BLOBLISTT_CONTROL_FDT, "Control FDT" },
+ { BLOBLISTT_HOB_BLOCK, "HOB block" },
+ { BLOBLISTT_HOB_LIST, "HOB list" },
+ { BLOBLISTT_ACPI_TABLES, "ACPI tables for x86" },
+ { BLOBLISTT_TPM_EVLOG, "TPM event log defined by TCG EFI" },
+ { BLOBLISTT_TPM_CRB_BASE, "TPM Command Response Buffer address" },
/* BLOBLISTT_AREA_FIRMWARE */
- { BLOBLISTT_ACPI_GNVS, "ACPI GNVS" },
- { BLOBLISTT_INTEL_VBT, "Intel Video-BIOS table" },
{ BLOBLISTT_TPM2_TCG_LOG, "TPM v2 log space" },
{ BLOBLISTT_TCPA_LOG, "TPM log space" },
- { BLOBLISTT_ACPI_TABLES, "ACPI tables for x86" },
+ { BLOBLISTT_ACPI_GNVS, "ACPI GNVS" },
+
+ /* BLOBLISTT_AREA_TF */
+ { BLOBLISTT_OPTEE_PAGABLE_PART, "OP-TEE pagable part" },
+
+ /* BLOBLISTT_AREA_OTHER */
+ { BLOBLISTT_INTEL_VBT, "Intel Video-BIOS table" },
{ BLOBLISTT_SMBIOS_TABLES, "SMBIOS tables for x86" },
{ BLOBLISTT_VBOOT_CTX, "Chrome OS vboot context" },
@@ -71,18 +80,36 @@
static struct bloblist_rec *bloblist_first_blob(struct bloblist_hdr *hdr)
{
- if (hdr->alloced <= hdr->hdr_size)
+ if (hdr->used_size <= hdr->hdr_size)
return NULL;
return (struct bloblist_rec *)((void *)hdr + hdr->hdr_size);
}
+static inline uint rec_hdr_size(struct bloblist_rec *rec)
+{
+ return (rec->tag_and_hdr_size & BLOBLISTR_HDR_SIZE_MASK) >>
+ BLOBLISTR_HDR_SIZE_SHIFT;
+}
+
+static inline uint rec_tag(struct bloblist_rec *rec)
+{
+ return (rec->tag_and_hdr_size & BLOBLISTR_TAG_MASK) >>
+ BLOBLISTR_TAG_SHIFT;
+}
+
static ulong bloblist_blob_end_ofs(struct bloblist_hdr *hdr,
struct bloblist_rec *rec)
{
ulong offset;
offset = (void *)rec - (void *)hdr;
- offset += rec->hdr_size + ALIGN(rec->size, BLOBLIST_ALIGN);
+ /*
+ * The data section of next TE should start from an address aligned
+ * to 1 << hdr->align_log2.
+ */
+ offset += rec_hdr_size(rec) + rec->size;
+ offset = round_up(offset + rec_hdr_size(rec), 1 << hdr->align_log2);
+ offset -= rec_hdr_size(rec);
return offset;
}
@@ -92,7 +119,7 @@
{
ulong offset = bloblist_blob_end_ofs(hdr, rec);
- if (offset >= hdr->alloced)
+ if (offset >= hdr->used_size)
return NULL;
return (struct bloblist_rec *)((void *)hdr + offset);
}
@@ -111,55 +138,69 @@
return NULL;
foreach_rec(rec, hdr) {
- if (rec->tag == tag)
+ if (rec_tag(rec) == tag)
return rec;
}
return NULL;
}
-static int bloblist_addrec(uint tag, int size, int align,
+static int bloblist_addrec(uint tag, int size, int align_log2,
struct bloblist_rec **recp)
{
struct bloblist_hdr *hdr = gd->bloblist;
struct bloblist_rec *rec;
- int data_start, new_alloced;
+ int data_start, aligned_start, new_alloced;
- if (!align)
- align = BLOBLIST_ALIGN;
+ if (!align_log2)
+ align_log2 = BLOBLIST_BLOB_ALIGN_LOG2;
/* Figure out where the new data will start */
- data_start = map_to_sysmem(hdr) + hdr->alloced + sizeof(*rec);
+ data_start = map_to_sysmem(hdr) + hdr->used_size + sizeof(*rec);
- /* Align the address and then calculate the offset from ->alloced */
- data_start = ALIGN(data_start, align) - map_to_sysmem(hdr);
+ /* Align the address and then calculate the offset from used size */
+ aligned_start = ALIGN(data_start, 1U << align_log2) - data_start;
+
+ /* If we need to create a dummy record, create it */
+ if (aligned_start) {
+ int void_size = aligned_start - sizeof(*rec);
+ struct bloblist_rec *vrec;
+ int ret;
+
+ ret = bloblist_addrec(BLOBLISTT_VOID, void_size, 0, &vrec);
+ if (ret)
+ return log_msg_ret("void", ret);
+
+ /* start the record after that */
+ data_start = map_to_sysmem(hdr) + hdr->used_size + sizeof(*vrec);
+ }
/* Calculate the new allocated total */
- new_alloced = data_start + ALIGN(size, align);
+ new_alloced = data_start - map_to_sysmem(hdr) +
+ ALIGN(size, 1U << align_log2);
- if (new_alloced > hdr->size) {
- log_err("Failed to allocate %x bytes size=%x, need size=%x\n",
- size, hdr->size, new_alloced);
+ if (new_alloced > hdr->total_size) {
+ log_err("Failed to allocate %x bytes\n", size);
+ log_err("Used size=%x, total size=%x\n",
+ hdr->used_size, hdr->total_size);
return log_msg_ret("bloblist add", -ENOSPC);
}
- rec = (void *)hdr + hdr->alloced;
+ rec = (void *)hdr + hdr->used_size;
- rec->tag = tag;
- rec->hdr_size = data_start - hdr->alloced;
+ rec->tag_and_hdr_size = tag | sizeof(*rec) << BLOBLISTR_HDR_SIZE_SHIFT;
rec->size = size;
- rec->spare = 0;
/* Zero the record data */
- memset((void *)rec + rec->hdr_size, '\0', rec->size);
+ memset((void *)rec + rec_hdr_size(rec), '\0', rec->size);
- hdr->alloced = new_alloced;
+ hdr->used_size = new_alloced;
*recp = rec;
return 0;
}
static int bloblist_ensurerec(uint tag, struct bloblist_rec **recp, int size,
- int align)
+ int align_log2)
{
struct bloblist_rec *rec;
@@ -172,7 +213,7 @@
} else {
int ret;
- ret = bloblist_addrec(tag, size, align, &rec);
+ ret = bloblist_addrec(tag, size, align_log2, &rec);
if (ret)
return ret;
}
@@ -191,28 +232,28 @@
if (size && size != rec->size)
return NULL;
- return (void *)rec + rec->hdr_size;
+ return (void *)rec + rec_hdr_size(rec);
}
-void *bloblist_add(uint tag, int size, int align)
+void *bloblist_add(uint tag, int size, int align_log2)
{
struct bloblist_rec *rec;
- if (bloblist_addrec(tag, size, align, &rec))
+ if (bloblist_addrec(tag, size, align_log2, &rec))
return NULL;
- return (void *)rec + rec->hdr_size;
+ return (void *)rec + rec_hdr_size(rec);
}
-int bloblist_ensure_size(uint tag, int size, int align, void **blobp)
+int bloblist_ensure_size(uint tag, int size, int align_log2, void **blobp)
{
struct bloblist_rec *rec;
int ret;
- ret = bloblist_ensurerec(tag, &rec, size, align);
+ ret = bloblist_ensurerec(tag, &rec, size, align_log2);
if (ret)
return ret;
- *blobp = (void *)rec + rec->hdr_size;
+ *blobp = (void *)rec + rec_hdr_size(rec);
return 0;
}
@@ -224,7 +265,7 @@
if (bloblist_ensurerec(tag, &rec, size, 0))
return NULL;
- return (void *)rec + rec->hdr_size;
+ return (void *)rec + rec_hdr_size(rec);
}
int bloblist_ensure_size_ret(uint tag, int *sizep, void **blobp)
@@ -237,7 +278,7 @@
*sizep = rec->size;
else if (ret)
return ret;
- *blobp = (void *)rec + rec->hdr_size;
+ *blobp = (void *)rec + rec_hdr_size(rec);
return 0;
}
@@ -247,33 +288,34 @@
int new_size)
{
int expand_by; /* Number of bytes to expand by (-ve to contract) */
- int new_alloced; /* New value for @hdr->alloced */
+ int new_alloced;
ulong next_ofs; /* Offset of the record after @rec */
- expand_by = ALIGN(new_size - rec->size, BLOBLIST_ALIGN);
- new_alloced = ALIGN(hdr->alloced + expand_by, BLOBLIST_ALIGN);
+ expand_by = ALIGN(new_size - rec->size, BLOBLIST_BLOB_ALIGN);
+ new_alloced = ALIGN(hdr->used_size + expand_by, BLOBLIST_BLOB_ALIGN);
if (new_size < 0) {
log_debug("Attempt to shrink blob size below 0 (%x)\n",
new_size);
return log_msg_ret("size", -EINVAL);
}
- if (new_alloced > hdr->size) {
- log_err("Failed to allocate %x bytes size=%x, need size=%x\n",
- new_size, hdr->size, new_alloced);
+ if (new_alloced > hdr->total_size) {
+ log_err("Failed to allocate %x bytes\n", new_size);
+ log_err("Used size=%x, total size=%x\n",
+ hdr->used_size, hdr->total_size);
return log_msg_ret("alloc", -ENOSPC);
}
/* Move the following blobs up or down, if this is not the last */
next_ofs = bloblist_blob_end_ofs(hdr, rec);
- if (next_ofs != hdr->alloced) {
+ if (next_ofs != hdr->used_size) {
memmove((void *)hdr + next_ofs + expand_by,
(void *)hdr + next_ofs, new_alloced - next_ofs);
}
- hdr->alloced = new_alloced;
+ hdr->used_size = new_alloced;
/* Zero the new part of the blob */
if (expand_by > 0) {
- memset((void *)rec + rec->hdr_size + rec->size, '\0',
+ memset((void *)rec + rec_hdr_size(rec) + rec->size, '\0',
new_size - rec->size);
}
@@ -301,20 +343,15 @@
static u32 bloblist_calc_chksum(struct bloblist_hdr *hdr)
{
- struct bloblist_rec *rec;
- u32 chksum;
+ u8 chksum;
- chksum = crc32(0, (unsigned char *)hdr,
- offsetof(struct bloblist_hdr, chksum));
- foreach_rec(rec, hdr) {
- chksum = crc32(chksum, (void *)rec, rec->hdr_size);
- chksum = crc32(chksum, (void *)rec + rec->hdr_size, rec->size);
- }
+ chksum = table_compute_checksum(hdr, hdr->used_size);
+ chksum += hdr->chksum;
return chksum;
}
-int bloblist_new(ulong addr, uint size, uint flags)
+int bloblist_new(ulong addr, uint size, uint flags, uint align_log2)
{
struct bloblist_hdr *hdr;
@@ -328,8 +365,9 @@
hdr->hdr_size = sizeof(*hdr);
hdr->flags = flags;
hdr->magic = BLOBLIST_MAGIC;
- hdr->size = size;
- hdr->alloced = hdr->hdr_size;
+ hdr->used_size = hdr->hdr_size;
+ hdr->total_size = size;
+ hdr->align_log2 = align_log2 ? align_log2 : BLOBLIST_BLOB_ALIGN_LOG2;
hdr->chksum = 0;
gd->bloblist = hdr;
@@ -346,8 +384,13 @@
return log_msg_ret("Bad magic", -ENOENT);
if (hdr->version != BLOBLIST_VERSION)
return log_msg_ret("Bad version", -EPROTONOSUPPORT);
- if (size && hdr->size != size)
- return log_msg_ret("Bad size", -EFBIG);
+ if (!hdr->total_size || (size && hdr->total_size != size))
+ return log_msg_ret("Bad total size", -EFBIG);
+ if (hdr->used_size > hdr->total_size)
+ return log_msg_ret("Bad used size", -ENOENT);
+ if (hdr->hdr_size != sizeof(struct bloblist_hdr))
+ return log_msg_ret("Bad header size", -ENOENT);
+
chksum = bloblist_calc_chksum(hdr);
if (hdr->chksum != chksum) {
log_err("Checksum %x != %x\n", hdr->chksum, chksum);
@@ -363,7 +406,7 @@
struct bloblist_hdr *hdr = gd->bloblist;
hdr->chksum = bloblist_calc_chksum(hdr);
- log_debug("Finished bloblist size %lx at %lx\n", (ulong)hdr->size,
+ log_debug("Finished bloblist size %lx at %lx\n", (ulong)hdr->used_size,
(ulong)map_to_sysmem(hdr));
return 0;
@@ -378,33 +421,40 @@
{
struct bloblist_hdr *hdr = gd->bloblist;
- return hdr->size;
+ return hdr->used_size;
}
-void bloblist_get_stats(ulong *basep, ulong *sizep, ulong *allocedp)
+ulong bloblist_get_total_size(void)
+{
+ struct bloblist_hdr *hdr = gd->bloblist;
+
+ return hdr->total_size;
+}
+
+void bloblist_get_stats(ulong *basep, ulong *tsizep, ulong *usizep)
{
struct bloblist_hdr *hdr = gd->bloblist;
*basep = map_to_sysmem(gd->bloblist);
- *sizep = hdr->size;
- *allocedp = hdr->alloced;
+ *tsizep = hdr->total_size;
+ *usizep = hdr->used_size;
}
static void show_value(const char *prompt, ulong value)
{
- printf("%s:%*s %-5lx ", prompt, 8 - (int)strlen(prompt), "", value);
+ printf("%s:%*s %-5lx ", prompt, 10 - (int)strlen(prompt), "", value);
print_size(value, "\n");
}
void bloblist_show_stats(void)
{
- ulong base, size, alloced;
+ ulong base, tsize, usize;
- bloblist_get_stats(&base, &size, &alloced);
- printf("base: %lx\n", base);
- show_value("size", size);
- show_value("alloced", alloced);
- show_value("free", size - alloced);
+ bloblist_get_stats(&base, &tsize, &usize);
+ printf("base: %lx\n", base);
+ show_value("total size", tsize);
+ show_value("used size", usize);
+ show_value("free", tsize - usize);
}
void bloblist_show_list(void)
@@ -416,8 +466,9 @@
for (rec = bloblist_first_blob(hdr); rec;
rec = bloblist_next_blob(hdr, rec)) {
printf("%08lx %8x %4x %s\n",
- (ulong)map_to_sysmem((void *)rec + rec->hdr_size),
- rec->size, rec->tag, bloblist_tag_name(rec->tag));
+ (ulong)map_to_sysmem((void *)rec + rec_hdr_size(rec)),
+ rec->size, rec_tag(rec),
+ bloblist_tag_name(rec_tag(rec)));
}
}
@@ -427,7 +478,7 @@
memcpy(to, from, from_size);
hdr = to;
- hdr->size = to_size;
+ hdr->total_size = to_size;
}
int bloblist_init(void)
@@ -457,7 +508,7 @@
addr, ret);
} else {
/* Get the real size, if it is not what we expected */
- size = gd->bloblist->size;
+ size = gd->bloblist->total_size;
}
}
if (ret) {
@@ -472,7 +523,7 @@
}
log_debug("Creating new bloblist size %lx at %lx\n", size,
addr);
- ret = bloblist_new(addr, size, 0);
+ ret = bloblist_new(addr, size, 0, 0);
} else {
log_debug("Found existing bloblist size %lx at %lx\n", size,
addr);
diff --git a/common/board_info.c b/common/board_info.c
index e0f2d93..f4c385a 100644
--- a/common/board_info.c
+++ b/common/board_info.c
@@ -15,41 +15,65 @@
return 0;
}
-/*
- * Check sysinfo for board information. Failing that if the root node of the DTB
- * has a "model" property, show it.
- *
- * Then call checkboard().
- */
-int __weak show_board_info(void)
+static const struct to_show {
+ const char *name;
+ enum sysinfo_id id;
+} to_show[] = {
+ { "Manufacturer", SYSINFO_ID_BOARD_MANUFACTURER},
+ { "Prior-stage version", SYSINFO_ID_PRIOR_STAGE_VERSION },
+ { "Prior-stage date", SYSINFO_ID_PRIOR_STAGE_DATE },
+ { /* sentinel */ }
+};
+
+static int try_sysinfo(void)
+{
+ struct udevice *dev;
+ char str[80];
+ int ret;
+
+ /* This might provide more detail */
+ ret = sysinfo_get(&dev);
+ if (ret)
+ return ret;
+
+ ret = sysinfo_detect(dev);
+ if (ret)
+ return ret;
+
+ ret = sysinfo_get_str(dev, SYSINFO_ID_BOARD_MODEL, sizeof(str), str);
+ if (ret)
+ return ret;
+ printf("Model: %s\n", str);
+
+ if (IS_ENABLED(CONFIG_SYSINFO_EXTRA)) {
+ const struct to_show *item;
+
+ for (item = to_show; item->id; item++) {
+ ret = sysinfo_get_str(dev, item->id, sizeof(str), str);
+ if (!ret)
+ printf("%s: %s\n", item->name, str);
+ }
+ }
+
+ return 0;
+}
+
+int show_board_info(void)
{
if (IS_ENABLED(CONFIG_OF_CONTROL)) {
- struct udevice *dev;
- const char *model;
- char str[80];
int ret = -ENOSYS;
- if (IS_ENABLED(CONFIG_SYSINFO)) {
- /* This might provide more detail */
- ret = sysinfo_get(&dev);
- if (!ret) {
- ret = sysinfo_detect(dev);
- if (!ret) {
- ret = sysinfo_get_str(dev,
- SYSINFO_ID_BOARD_MODEL,
- sizeof(str), str);
- }
- }
- }
+ if (IS_ENABLED(CONFIG_SYSINFO))
+ ret = try_sysinfo();
/* Fail back to the main 'model' if available */
- if (ret)
- model = fdt_getprop(gd->fdt_blob, 0, "model", NULL);
- else
- model = str;
+ if (ret) {
+ const char *model;
- if (model)
- printf("Model: %s\n", model);
+ model = fdt_getprop(gd->fdt_blob, 0, "model", NULL);
+ if (model)
+ printf("Model: %s\n", model);
+ }
}
return checkboard();
diff --git a/common/cli.c b/common/cli.c
index 3916a7b..a349382 100644
--- a/common/cli.c
+++ b/common/cli.c
@@ -25,6 +25,14 @@
#include <linux/errno.h>
#ifdef CONFIG_CMDLINE
+
+static inline bool use_hush_old(void)
+{
+ return IS_ENABLED(CONFIG_HUSH_SELECTABLE) ?
+ gd->flags & GD_FLG_HUSH_OLD_PARSER :
+ IS_ENABLED(CONFIG_HUSH_OLD_PARSER);
+}
+
/*
* Run a command using the selected parser.
*
@@ -44,11 +52,29 @@
return 0;
#else
- int hush_flags = FLAG_PARSE_SEMICOLON | FLAG_EXIT_FROM_LOOP;
+ if (use_hush_old()) {
+ int hush_flags = FLAG_PARSE_SEMICOLON | FLAG_EXIT_FROM_LOOP;
- if (flag & CMD_FLAG_ENV)
- hush_flags |= FLAG_CONT_ON_NEWLINE;
- return parse_string_outer(cmd, hush_flags);
+ if (flag & CMD_FLAG_ENV)
+ hush_flags |= FLAG_CONT_ON_NEWLINE;
+ return parse_string_outer(cmd, hush_flags);
+ }
+ /*
+ * Possible values for flags are the following:
+ * FLAG_EXIT_FROM_LOOP: This flags ensures we exit from loop in
+ * parse_and_run_stream() after first iteration while normal
+ * behavior, * i.e. when called from cli_loop(), is to loop
+ * infinitely.
+ * FLAG_PARSE_SEMICOLON: modern Hush parses ';' and does not stop
+ * first time it sees one. So, I think we do not need this flag.
+ * FLAG_REPARSING: For the moment, I do not understand the goal
+ * of this flag.
+ * FLAG_CONT_ON_NEWLINE: This flag seems to be used to continue
+ * parsing even when reading '\n' when coming from
+ * run_command(). In this case, modern Hush reads until it finds
+ * '\0'. So, I think we do not need this flag.
+ */
+ return parse_string_outer_modern(cmd, FLAG_EXIT_FROM_LOOP);
#endif
}
@@ -64,12 +90,23 @@
#ifndef CONFIG_HUSH_PARSER
return cli_simple_run_command(cmd, flag);
#else
+ int ret;
+
+ if (use_hush_old()) {
+ ret = parse_string_outer(cmd,
+ FLAG_PARSE_SEMICOLON
+ | FLAG_EXIT_FROM_LOOP);
+ } else {
+ ret = parse_string_outer_modern(cmd,
+ FLAG_PARSE_SEMICOLON
+ | FLAG_EXIT_FROM_LOOP);
+ }
+
/*
* parse_string_outer() returns 1 for failure, so clean up
* its result.
*/
- if (parse_string_outer(cmd,
- FLAG_PARSE_SEMICOLON | FLAG_EXIT_FROM_LOOP))
+ if (ret)
return -1;
return 0;
@@ -108,7 +145,11 @@
buff[len] = '\0';
}
#ifdef CONFIG_HUSH_PARSER
- rcode = parse_string_outer(buff, FLAG_PARSE_SEMICOLON);
+ if (use_hush_old()) {
+ rcode = parse_string_outer(buff, FLAG_PARSE_SEMICOLON);
+ } else {
+ rcode = parse_string_outer_modern(buff, FLAG_PARSE_SEMICOLON);
+ }
#else
/*
* This function will overwrite any \n it sees with a \0, which
@@ -254,8 +295,13 @@
void cli_loop(void)
{
bootstage_mark(BOOTSTAGE_ID_ENTER_CLI_LOOP);
-#ifdef CONFIG_HUSH_PARSER
- parse_file_outer();
+#if CONFIG_IS_ENABLED(HUSH_PARSER)
+ if (gd->flags & GD_FLG_HUSH_MODERN_PARSER)
+ parse_and_run_file();
+ else if (gd->flags & GD_FLG_HUSH_OLD_PARSER)
+ parse_file_outer();
+
+ printf("Problem\n");
/* This point is never reached */
for (;;);
#elif defined(CONFIG_CMDLINE)
@@ -268,7 +314,23 @@
void cli_init(void)
{
#ifdef CONFIG_HUSH_PARSER
- u_boot_hush_start();
+ /* This if block is used to initialize hush parser gd flag. */
+ if (!(gd->flags & GD_FLG_HUSH_OLD_PARSER)
+ && !(gd->flags & GD_FLG_HUSH_MODERN_PARSER)) {
+ if (CONFIG_IS_ENABLED(HUSH_OLD_PARSER))
+ gd->flags |= GD_FLG_HUSH_OLD_PARSER;
+ else if (CONFIG_IS_ENABLED(HUSH_MODERN_PARSER))
+ gd->flags |= GD_FLG_HUSH_MODERN_PARSER;
+ }
+
+ if (gd->flags & GD_FLG_HUSH_OLD_PARSER) {
+ u_boot_hush_start();
+ } else if (gd->flags & GD_FLG_HUSH_MODERN_PARSER) {
+ u_boot_hush_start_modern();
+ } else {
+ printf("No valid hush parser to use, cli will not initialized!\n");
+ return;
+ }
#endif
#if defined(CONFIG_HUSH_INIT_VAR)
diff --git a/common/cli_hush_modern.c b/common/cli_hush_modern.c
new file mode 100644
index 0000000..cd88c9d
--- /dev/null
+++ b/common/cli_hush_modern.c
@@ -0,0 +1,323 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * This file defines the compilation unit for the new hush shell version. The
+ * actual implementation from upstream BusyBox can be found in
+ * `cli_hush_upstream.c` which is included at the end of this file.
+ *
+ * This "wrapper" technique is used to keep the changes to the upstream version
+ * as minmal as possible. Instead, all defines and redefines necessary are done
+ * here, outside the upstream sources. This will hopefully make upgrades to
+ * newer revisions much easier.
+ *
+ * Copyright (c) 2021, Harald Seiler, DENX Software Engineering, hws@denx.de
+ */
+
+#include <env.h>
+#include <malloc.h> /* malloc, free, realloc*/
+#include <linux/ctype.h> /* isalpha, isdigit */
+#include <console.h>
+#include <bootretry.h>
+#include <cli.h>
+#include <cli_hush.h>
+#include <command.h> /* find_cmd */
+#include <asm/global_data.h>
+
+/*
+ * BusyBox Version: UPDATE THIS WHEN PULLING NEW UPSTREAM REVISION!
+ */
+#define BB_VER "1.35.0.git7d1c7d833785"
+
+/*
+ * Define hush features by the names used upstream.
+ */
+#define ENABLE_HUSH_INTERACTIVE 1
+#define ENABLE_FEATURE_EDITING 1
+#define ENABLE_HUSH_IF 1
+#define ENABLE_HUSH_LOOPS 1
+/* No MMU in U-Boot */
+#define BB_MMU 0
+#define USE_FOR_NOMMU(...) __VA_ARGS__
+#define USE_FOR_MMU(...)
+
+/*
+ * Size-saving "small" ints (arch-dependent)
+ */
+#if CONFIG_IS_ENABLED(X86) || CONFIG_IS_ENABLED(X86_64) || CONFIG_IS_ENABLED(MIPS)
+/* add other arches which benefit from this... */
+typedef signed char smallint;
+typedef unsigned char smalluint;
+#else
+/* for arches where byte accesses generate larger code: */
+typedef int smallint;
+typedef unsigned smalluint;
+#endif
+
+/*
+ * Alignment defines used by BusyBox.
+ */
+#define ALIGN1 __attribute__((aligned(1)))
+#define ALIGN2 __attribute__((aligned(2)))
+#define ALIGN4 __attribute__((aligned(4)))
+#define ALIGN8 __attribute__((aligned(8)))
+#define ALIGN_PTR __attribute__((aligned(sizeof(void*))))
+
+/*
+ * Miscellaneous compiler/platform defines.
+ */
+#define FAST_FUNC /* not used in U-Boot */
+#define UNUSED_PARAM __always_unused
+#define ALWAYS_INLINE __always_inline
+#define NOINLINE noinline
+
+/*
+ * Defines to provide equivalents to what libc/BusyBox defines.
+ */
+#define EOF (-1)
+#define EXIT_SUCCESS 0
+#define EXIT_FAILURE 1
+
+/*
+ * Stubs to provide libc/BusyBox functions based on U-Boot equivalents where it
+ * makes sense.
+ */
+#define utoa simple_itoa
+
+static void __noreturn xfunc_die(void)
+{
+ panic("HUSH died!");
+}
+
+#define bb_error_msg_and_die(format, ...) do { \
+panic("HUSH: " format, __VA_ARGS__); \
+} while (0);
+
+#define bb_simple_error_msg_and_die(msg) do { \
+panic_str("HUSH: " msg); \
+} while (0);
+
+/* fdprintf() is used for debug output. */
+static int __maybe_unused fdprintf(int fd, const char *format, ...)
+{
+ va_list args;
+ uint i;
+
+ assert(fd == 2);
+
+ va_start(args, format);
+ i = vprintf(format, args);
+ va_end(args);
+
+ return i;
+}
+
+static void bb_verror_msg(const char *s, va_list p, const char* strerr)
+{
+ /* TODO: what to do with strerr arg? */
+ vprintf(s, p);
+}
+
+static void bb_error_msg(const char *s, ...)
+{
+ va_list p;
+
+ va_start(p, s);
+ bb_verror_msg(s, p, NULL);
+ va_end(p);
+}
+
+static void bb_simple_error_msg(const char *s)
+{
+ bb_error_msg("%s", s);
+}
+
+static void *xmalloc(size_t size)
+{
+ void *p = NULL;
+ if (!(p = malloc(size)))
+ panic("out of memory");
+ return p;
+}
+
+static void *xzalloc(size_t size)
+{
+ void *p = xmalloc(size);
+ memset(p, 0, size);
+ return p;
+}
+
+static void *xrealloc(void *ptr, size_t size)
+{
+ void *p = NULL;
+ if (!(p = realloc(ptr, size)))
+ panic("out of memory");
+ return p;
+}
+
+static void *xmemdup(const void *s, int n)
+{
+ return memcpy(xmalloc(n), s, n);
+}
+
+#define xstrdup strdup
+#define xstrndup strndup
+
+static void *mempcpy(void *dest, const void *src, size_t len)
+{
+ return memcpy(dest, src, len) + len;
+}
+
+/* Like strcpy but can copy overlapping strings. */
+static void overlapping_strcpy(char *dst, const char *src)
+{
+ /*
+ * Cheap optimization for dst == src case -
+ * better to have it here than in many callers.
+ */
+ if (dst != src) {
+ while ((*dst = *src) != '\0') {
+ dst++;
+ src++;
+ }
+ }
+}
+
+static char* skip_whitespace(const char *s)
+{
+ /*
+ * In POSIX/C locale (the only locale we care about: do we REALLY want
+ * to allow Unicode whitespace in, say, .conf files? nuts!)
+ * isspace is only these chars: "\t\n\v\f\r" and space.
+ * "\t\n\v\f\r" happen to have ASCII codes 9,10,11,12,13.
+ * Use that.
+ */
+ while (*s == ' ' || (unsigned char)(*s - 9) <= (13 - 9))
+ s++;
+
+ return (char *) s;
+}
+
+static char* skip_non_whitespace(const char *s)
+{
+ while (*s != '\0' && *s != ' ' && (unsigned char)(*s - 9) > (13 - 9))
+ s++;
+
+ return (char *) s;
+}
+
+#define is_name(c) ((c) == '_' || isalpha((unsigned char)(c)))
+#define is_in_name(c) ((c) == '_' || isalnum((unsigned char)(c)))
+
+static const char* endofname(const char *name)
+{
+ if (!is_name(*name))
+ return name;
+ while (*++name) {
+ if (!is_in_name(*name))
+ break;
+ }
+ return name;
+}
+
+/**
+ * list_size() - returns the number of elements in char ** before NULL.
+ *
+ * Argument must contain NULL to signalize its end.
+ *
+ * @list The list to count the number of element.
+ * @return The number of element in list.
+ */
+static size_t list_size(char **list)
+{
+ size_t size;
+
+ for (size = 0; list[size] != NULL; size++);
+
+ return size;
+}
+
+static int varcmp(const char *p, const char *q)
+{
+ int c, d;
+
+ while ((c = *p) == (d = *q)) {
+ if (c == '\0' || c == '=')
+ goto out;
+ p++;
+ q++;
+ }
+ if (c == '=')
+ c = '\0';
+ if (d == '=')
+ d = '\0';
+out:
+ return c - d;
+}
+
+struct in_str;
+static int u_boot_cli_readline(struct in_str *i);
+
+struct in_str;
+static int u_boot_cli_readline(struct in_str *i);
+
+/*
+ * BusyBox globals which are needed for hush.
+ */
+static uint8_t xfunc_error_retval;
+
+static const char defifsvar[] __aligned(1) = "IFS= \t\n";
+#define defifs (defifsvar + 4)
+
+/* This define is used to check if exit command was called. */
+#define EXIT_RET_CODE -2
+
+/*
+ * This define is used for changes that need be done directly in the upstream
+ * sources still. Ideally, its use should be minimized as much as possible.
+ */
+#define __U_BOOT__
+
+/*
+ *
+ * +-- Include of the upstream sources --+ *
+ * V V
+ */
+#include "cli_hush_upstream.c"
+/*
+ * A A
+ * +-- Include of the upstream sources --+ *
+ *
+ */
+
+int u_boot_hush_start_modern(void)
+{
+ INIT_G();
+ return 0;
+}
+
+static int u_boot_cli_readline(struct in_str *i)
+{
+ char *prompt;
+ char __maybe_unused *ps_prompt = NULL;
+
+ if (!G.promptmode)
+ prompt = CONFIG_SYS_PROMPT;
+#ifdef CONFIG_SYS_PROMPT_HUSH_PS2
+ else
+ prompt = CONFIG_SYS_PROMPT_HUSH_PS2;
+#else
+ /* TODO: default value? */
+ #error "SYS_PROMPT_HUSH_PS2 is not defined!"
+#endif
+
+ if (CONFIG_IS_ENABLED(CMDLINE_PS_SUPPORT)) {
+ if (!G.promptmode)
+ ps_prompt = env_get("PS1");
+ else
+ ps_prompt = env_get("PS2");
+
+ if (ps_prompt)
+ prompt = ps_prompt;
+ }
+
+ return cli_readline(prompt);
+}
diff --git a/common/cli_hush_upstream.c b/common/cli_hush_upstream.c
new file mode 100644
index 0000000..ca40bbb
--- /dev/null
+++ b/common/cli_hush_upstream.c
@@ -0,0 +1,13030 @@
+/* vi: set sw=4 ts=4: */
+/*
+ * A prototype Bourne shell grammar parser.
+ * Intended to follow the original Thompson and Ritchie
+ * "small and simple is beautiful" philosophy, which
+ * incidentally is a good match to today's BusyBox.
+ *
+ * Copyright (C) 2000,2001 Larry Doolittle <larry@doolittle.boa.org>
+ * Copyright (C) 2008,2009 Denys Vlasenko <vda.linux@googlemail.com>
+ *
+ * Licensed under GPLv2 or later, see file LICENSE in this source tree.
+ *
+ * Credits:
+ * The parser routines proper are all original material, first
+ * written Dec 2000 and Jan 2001 by Larry Doolittle. The
+ * execution engine, the builtins, and much of the underlying
+ * support has been adapted from busybox-0.49pre's lash, which is
+ * Copyright (C) 1999-2004 by Erik Andersen <andersen@codepoet.org>
+ * written by Erik Andersen <andersen@codepoet.org>. That, in turn,
+ * is based in part on ladsh.c, by Michael K. Johnson and Erik W.
+ * Troan, which they placed in the public domain. I don't know
+ * how much of the Johnson/Troan code has survived the repeated
+ * rewrites.
+ *
+ * Other credits:
+ * o_addchr derived from similar w_addchar function in glibc-2.2.
+ * parse_redirect, redirect_opt_num, and big chunks of main
+ * and many builtins derived from contributions by Erik Andersen.
+ * Miscellaneous bugfixes from Matt Kraai.
+ *
+ * There are two big (and related) architecture differences between
+ * this parser and the lash parser. One is that this version is
+ * actually designed from the ground up to understand nearly all
+ * of the Bourne grammar. The second, consequential change is that
+ * the parser and input reader have been turned inside out. Now,
+ * the parser is in control, and asks for input as needed. The old
+ * way had the input reader in control, and it asked for parsing to
+ * take place as needed. The new way makes it much easier to properly
+ * handle the recursion implicit in the various substitutions, especially
+ * across continuation lines.
+ *
+ * TODOs:
+ * grep for "TODO" and fix (some of them are easy)
+ * make complex ${var%...} constructs support optional
+ * make here documents optional
+ * special variables (done: PWD, PPID, RANDOM)
+ * follow IFS rules more precisely, including update semantics
+ * tilde expansion
+ * aliases
+ * "command" missing features:
+ * command -p CMD: run CMD using default $PATH
+ * (can use this to override standalone shell as well?)
+ * command BLTIN: disables special-ness (e.g. errors do not abort)
+ * command -V CMD1 CMD2 CMD3 (multiple args) (not in standard)
+ * builtins mandated by standards we don't support:
+ * [un]alias, fc:
+ * fc -l[nr] [BEG] [END]: list range of commands in history
+ * fc [-e EDITOR] [BEG] [END]: edit/rerun range of commands
+ * fc -s [PAT=REP] [CMD]: rerun CMD, replacing PAT with REP
+ *
+ * Bash compat TODO:
+ * redirection of stdout+stderr: &> and >&
+ * reserved words: function select
+ * advanced test: [[ ]]
+ * process substitution: <(list) and >(list)
+ * let EXPR [EXPR...]
+ * Each EXPR is an arithmetic expression (ARITHMETIC EVALUATION)
+ * If the last arg evaluates to 0, let returns 1; 0 otherwise.
+ * NB: let `echo 'a=a + 1'` - error (IOW: multi-word expansion is used)
+ * ((EXPR))
+ * The EXPR is evaluated according to ARITHMETIC EVALUATION.
+ * This is exactly equivalent to let "EXPR".
+ * $[EXPR]: synonym for $((EXPR))
+ * indirect expansion: ${!VAR}
+ * substring op on @: ${@:n:m}
+ *
+ * Won't do:
+ * Some builtins mandated by standards:
+ * newgrp [GRP]: not a builtin in bash but a suid binary
+ * which spawns a new shell with new group ID
+ *
+ * Status of [[ support:
+ * [[ args ]] are CMD_SINGLEWORD_NOGLOB:
+ * v='a b'; [[ $v = 'a b' ]]; echo 0:$?
+ * [[ /bin/n* ]]; echo 0:$?
+ * = is glob match operator, not equality operator: STR = GLOB
+ * == same as =
+ * =~ is regex match operator: STR =~ REGEX
+ * TODO:
+ * quoting needs to be considered (-f is an operator, "-f" and ""-f are not; etc)
+ * in word = GLOB, quoting should be significant on char-by-char basis: a*cd"*"
+ */
+//config:config HUSH
+//config: bool "hush (70 kb)"
+//config: default y
+//config: select SHELL_HUSH
+//config: help
+//config: hush is a small shell. It handles the normal flow control
+//config: constructs such as if/then/elif/else/fi, for/in/do/done, while loops,
+//config: case/esac. Redirections, here documents, $((arithmetic))
+//config: and functions are supported.
+//config:
+//config: It will compile and work on no-mmu systems.
+//config:
+//config: It does not handle select, aliases, tilde expansion,
+//config: &>file and >&file redirection of stdout+stderr.
+//config:
+// This option is visible (has a description) to make it possible to select
+// a "scripted" applet (such as NOLOGIN) but avoid selecting any shells:
+//config:config SHELL_HUSH
+//config: bool "Internal shell for embedded script support"
+//config: default n
+//config:
+//config:# hush options
+//config:# It's only needed to get "nice" menuconfig indenting.
+//config:if SHELL_HUSH || HUSH || SH_IS_HUSH || BASH_IS_HUSH
+//config:
+//config:config HUSH_BASH_COMPAT
+//config: bool "bash-compatible extensions"
+//config: default y
+//config: depends on SHELL_HUSH
+//config:
+//config:config HUSH_BRACE_EXPANSION
+//config: bool "Brace expansion"
+//config: default y
+//config: depends on HUSH_BASH_COMPAT
+//config: help
+//config: Enable {abc,def} extension.
+//config:
+//config:config HUSH_BASH_SOURCE_CURDIR
+//config: bool "'source' and '.' builtins search current directory after $PATH"
+//config: default n # do not encourage non-standard behavior
+//config: depends on HUSH_BASH_COMPAT
+//config: help
+//config: This is not compliant with standards. Avoid if possible.
+//config:
+//config:config HUSH_LINENO_VAR
+//config: bool "$LINENO variable (bashism)"
+//config: default y
+//config: depends on SHELL_HUSH
+//config:
+//config:config HUSH_INTERACTIVE
+//config: bool "Interactive mode"
+//config: default y
+//config: depends on SHELL_HUSH
+//config: help
+//config: Enable interactive mode (prompt and command editing).
+//config: Without this, hush simply reads and executes commands
+//config: from stdin just like a shell script from a file.
+//config: No prompt, no PS1/PS2 magic shell variables.
+//config:
+//config:config HUSH_SAVEHISTORY
+//config: bool "Save command history to .hush_history"
+//config: default y
+//config: depends on HUSH_INTERACTIVE && FEATURE_EDITING_SAVEHISTORY
+//config:
+//config:config HUSH_JOB
+//config: bool "Job control"
+//config: default y
+//config: depends on HUSH_INTERACTIVE
+//config: help
+//config: Enable job control: Ctrl-Z backgrounds, Ctrl-C interrupts current
+//config: command (not entire shell), fg/bg builtins work. Without this option,
+//config: "cmd &" still works by simply spawning a process and immediately
+//config: prompting for next command (or executing next command in a script),
+//config: but no separate process group is formed.
+//config:
+//config:config HUSH_TICK
+//config: bool "Support command substitution"
+//config: default y
+//config: depends on SHELL_HUSH
+//config: help
+//config: Enable `command` and $(command).
+//config:
+//config:config HUSH_IF
+//config: bool "Support if/then/elif/else/fi"
+//config: default y
+//config: depends on SHELL_HUSH
+//config:
+//config:config HUSH_LOOPS
+//config: bool "Support for, while and until loops"
+//config: default y
+//config: depends on SHELL_HUSH
+//config:
+//config:config HUSH_CASE
+//config: bool "Support case ... esac statement"
+//config: default y
+//config: depends on SHELL_HUSH
+//config: help
+//config: Enable case ... esac statement. +400 bytes.
+//config:
+//config:config HUSH_FUNCTIONS
+//config: bool "Support funcname() { commands; } syntax"
+//config: default y
+//config: depends on SHELL_HUSH
+//config: help
+//config: Enable support for shell functions. +800 bytes.
+//config:
+//config:config HUSH_LOCAL
+//config: bool "local builtin"
+//config: default y
+//config: depends on HUSH_FUNCTIONS
+//config: help
+//config: Enable support for local variables in functions.
+//config:
+//config:config HUSH_RANDOM_SUPPORT
+//config: bool "Pseudorandom generator and $RANDOM variable"
+//config: default y
+//config: depends on SHELL_HUSH
+//config: help
+//config: Enable pseudorandom generator and dynamic variable "$RANDOM".
+//config: Each read of "$RANDOM" will generate a new pseudorandom value.
+//config:
+//config:config HUSH_MODE_X
+//config: bool "Support 'hush -x' option and 'set -x' command"
+//config: default y
+//config: depends on SHELL_HUSH
+//config: help
+//config: This instructs hush to print commands before execution.
+//config: Adds ~300 bytes.
+//config:
+//config:config HUSH_ECHO
+//config: bool "echo builtin"
+//config: default y
+//config: depends on SHELL_HUSH
+//config:
+//config:config HUSH_PRINTF
+//config: bool "printf builtin"
+//config: default y
+//config: depends on SHELL_HUSH
+//config:
+//config:config HUSH_TEST
+//config: bool "test builtin"
+//config: default y
+//config: depends on SHELL_HUSH
+//config:
+//config:config HUSH_HELP
+//config: bool "help builtin"
+//config: default y
+//config: depends on SHELL_HUSH
+//config:
+//config:config HUSH_EXPORT
+//config: bool "export builtin"
+//config: default y
+//config: depends on SHELL_HUSH
+//config:
+//config:config HUSH_EXPORT_N
+//config: bool "Support 'export -n' option"
+//config: default y
+//config: depends on HUSH_EXPORT
+//config: help
+//config: export -n unexports variables. It is a bash extension.
+//config:
+//config:config HUSH_READONLY
+//config: bool "readonly builtin"
+//config: default y
+//config: depends on SHELL_HUSH
+//config: help
+//config: Enable support for read-only variables.
+//config:
+//config:config HUSH_KILL
+//config: bool "kill builtin (supports kill %jobspec)"
+//config: default y
+//config: depends on SHELL_HUSH
+//config:
+//config:config HUSH_WAIT
+//config: bool "wait builtin"
+//config: default y
+//config: depends on SHELL_HUSH
+//config:
+//config:config HUSH_COMMAND
+//config: bool "command builtin"
+//config: default y
+//config: depends on SHELL_HUSH
+//config:
+//config:config HUSH_TRAP
+//config: bool "trap builtin"
+//config: default y
+//config: depends on SHELL_HUSH
+//config:
+//config:config HUSH_TYPE
+//config: bool "type builtin"
+//config: default y
+//config: depends on SHELL_HUSH
+//config:
+//config:config HUSH_TIMES
+//config: bool "times builtin"
+//config: default y
+//config: depends on SHELL_HUSH
+//config:
+//config:config HUSH_READ
+//config: bool "read builtin"
+//config: default y
+//config: depends on SHELL_HUSH
+//config:
+//config:config HUSH_SET
+//config: bool "set builtin"
+//config: default y
+//config: depends on SHELL_HUSH
+//config:
+//config:config HUSH_UNSET
+//config: bool "unset builtin"
+//config: default y
+//config: depends on SHELL_HUSH
+//config:
+//config:config HUSH_ULIMIT
+//config: bool "ulimit builtin"
+//config: default y
+//config: depends on SHELL_HUSH
+//config:
+//config:config HUSH_UMASK
+//config: bool "umask builtin"
+//config: default y
+//config: depends on SHELL_HUSH
+//config:
+//config:config HUSH_GETOPTS
+//config: bool "getopts builtin"
+//config: default y
+//config: depends on SHELL_HUSH
+//config:
+//config:config HUSH_MEMLEAK
+//config: bool "memleak builtin (debugging)"
+//config: default n
+//config: depends on SHELL_HUSH
+//config:
+//config:endif # hush options
+
+//applet:IF_HUSH(APPLET(hush, BB_DIR_BIN, BB_SUID_DROP))
+// APPLET_ODDNAME:name main location suid_type help
+//applet:IF_SH_IS_HUSH( APPLET_ODDNAME(sh, hush, BB_DIR_BIN, BB_SUID_DROP, hush))
+//applet:IF_BASH_IS_HUSH(APPLET_ODDNAME(bash, hush, BB_DIR_BIN, BB_SUID_DROP, hush))
+
+//kbuild:lib-$(CONFIG_SHELL_HUSH) += hush.o match.o shell_common.o
+//kbuild:lib-$(CONFIG_HUSH_RANDOM_SUPPORT) += random.o
+
+/* -i (interactive) is also accepted,
+ * but does nothing, therefore not shown in help.
+ * NOMMU-specific options are not meant to be used by users,
+ * therefore we don't show them either.
+ */
+//usage:#define hush_trivial_usage
+//usage: "[-enxl] [-c 'SCRIPT' [ARG0 ARGS] | FILE ARGS | -s ARGS]"
+//usage:#define hush_full_usage "\n\n"
+//usage: "Unix shell interpreter"
+
+#ifndef __U_BOOT__
+#if !(defined(__FreeBSD__) || defined(__OpenBSD__) || defined(__NetBSD__) \
+ || defined(__APPLE__) \
+ )
+# include <malloc.h> /* for malloc_trim */
+#endif
+#include <glob.h>
+/* #include <dmalloc.h> */
+#if ENABLE_HUSH_CASE
+# include <fnmatch.h>
+#endif
+#include <sys/times.h>
+#include <sys/utsname.h> /* for setting $HOSTNAME */
+
+#include "busybox.h" /* for APPLET_IS_NOFORK/NOEXEC */
+#include "unicode.h"
+#include "shell_common.h"
+#include "math.h"
+#include "match.h"
+#if ENABLE_HUSH_RANDOM_SUPPORT
+# include "random.h"
+#else
+# define CLEAR_RANDOM_T(rnd) ((void)0)
+#endif
+#ifndef O_CLOEXEC
+# define O_CLOEXEC 0
+#endif
+#ifndef F_DUPFD_CLOEXEC
+# define F_DUPFD_CLOEXEC F_DUPFD
+#endif
+
+#if ENABLE_FEATURE_SH_EMBEDDED_SCRIPTS && !ENABLE_SHELL_ASH
+# include "embedded_scripts.h"
+#else
+# define NUM_SCRIPTS 0
+#endif
+#endif /* !__U_BOOT__ */
+
+/* So far, all bash compat is controlled by one config option */
+/* Separate defines document which part of code implements what */
+#define BASH_PATTERN_SUBST ENABLE_HUSH_BASH_COMPAT
+#define BASH_SUBSTR ENABLE_HUSH_BASH_COMPAT
+#define BASH_SOURCE ENABLE_HUSH_BASH_COMPAT
+#define BASH_DOLLAR_SQUOTE ENABLE_HUSH_BASH_COMPAT
+#define BASH_HOSTNAME_VAR ENABLE_HUSH_BASH_COMPAT
+#define BASH_EPOCH_VARS ENABLE_HUSH_BASH_COMPAT
+#define BASH_TEST2 (ENABLE_HUSH_BASH_COMPAT && ENABLE_HUSH_TEST)
+#define BASH_READ_D ENABLE_HUSH_BASH_COMPAT
+
+
+/* Build knobs */
+#define LEAK_HUNTING 0
+#define BUILD_AS_NOMMU 0
+/* Enable/disable sanity checks. Ok to enable in production,
+ * only adds a bit of bloat. Set to >1 to get non-production level verbosity.
+ * Keeping 1 for now even in released versions.
+ */
+#define HUSH_DEBUG 1
+/* Slightly bigger (+200 bytes), but faster hush.
+ * So far it only enables a trick with counting SIGCHLDs and forks,
+ * which allows us to do fewer waitpid's.
+ * (we can detect a case where neither forks were done nor SIGCHLDs happened
+ * and therefore waitpid will return the same result as last time)
+ */
+#define ENABLE_HUSH_FAST 0
+/* TODO: implement simplified code for users which do not need ${var%...} ops
+ * So far ${var%...} ops are always enabled:
+ */
+#define ENABLE_HUSH_DOLLAR_OPS 1
+
+
+#if BUILD_AS_NOMMU
+# undef BB_MMU
+# undef USE_FOR_NOMMU
+# undef USE_FOR_MMU
+# define BB_MMU 0
+# define USE_FOR_NOMMU(...) __VA_ARGS__
+# define USE_FOR_MMU(...)
+#endif
+
+#ifndef __U_BOOT__
+#include "NUM_APPLETS.h"
+#if NUM_APPLETS == 1
+/* STANDALONE does not make sense, and won't compile */
+# undef ENABLE_FEATURE_SH_STANDALONE
+# undef IF_FEATURE_SH_STANDALONE
+# undef IF_NOT_FEATURE_SH_STANDALONE
+# define ENABLE_FEATURE_SH_STANDALONE 0
+# define IF_FEATURE_SH_STANDALONE(...)
+# define IF_NOT_FEATURE_SH_STANDALONE(...) __VA_ARGS__
+#endif
+#endif /* __U_BOOT__ */
+
+#if !ENABLE_HUSH_INTERACTIVE
+# undef ENABLE_FEATURE_EDITING
+# define ENABLE_FEATURE_EDITING 0
+# undef ENABLE_FEATURE_EDITING_FANCY_PROMPT
+# define ENABLE_FEATURE_EDITING_FANCY_PROMPT 0
+# undef ENABLE_FEATURE_EDITING_SAVE_ON_EXIT
+# define ENABLE_FEATURE_EDITING_SAVE_ON_EXIT 0
+#endif
+
+/* Do we support ANY keywords? */
+#if ENABLE_HUSH_IF || ENABLE_HUSH_LOOPS || ENABLE_HUSH_CASE
+# define HAS_KEYWORDS 1
+# define IF_HAS_KEYWORDS(...) __VA_ARGS__
+# define IF_HAS_NO_KEYWORDS(...)
+#else
+# define HAS_KEYWORDS 0
+# define IF_HAS_KEYWORDS(...)
+# define IF_HAS_NO_KEYWORDS(...) __VA_ARGS__
+#endif
+
+/* If you comment out one of these below, it will be #defined later
+ * to perform debug printfs to stderr: */
+#define debug_printf(...) do {} while (0)
+/* Finer-grained debug switches */
+#define debug_printf_parse(...) do {} while (0)
+#define debug_printf_heredoc(...) do {} while (0)
+#define debug_print_tree(a, b) do {} while (0)
+#define debug_printf_exec(...) do {} while (0)
+#define debug_printf_env(...) do {} while (0)
+#define debug_printf_jobs(...) do {} while (0)
+#define debug_printf_expand(...) do {} while (0)
+#define debug_printf_varexp(...) do {} while (0)
+#define debug_printf_glob(...) do {} while (0)
+#define debug_printf_redir(...) do {} while (0)
+#define debug_printf_list(...) do {} while (0)
+#define debug_printf_subst(...) do {} while (0)
+#define debug_printf_prompt(...) do {} while (0)
+#define debug_printf_clean(...) do {} while (0)
+
+#define ERR_PTR ((void*)(long)1)
+
+#define JOB_STATUS_FORMAT "[%u] %-22s %.40s\n"
+
+#define _SPECIAL_VARS_STR "_*@$!?#-"
+#ifndef __U_BOOT__
+#define SPECIAL_VARS_STR ("_*@$!?#-" + 1)
+#define NUMERIC_SPECVARS_STR ("_*@$!?#-" + 3)
+#else /* __U_BOOT__ */
+#define SPECIAL_VARS_STR "*@$!?#-"
+#define NUMERIC_SPECVARS_STR "$!?#-"
+#endif /* __U_BOOT__ */
+#if BASH_PATTERN_SUBST
+/* Support / and // replace ops */
+/* Note that // is stored as \ in "encoded" string representation */
+# define VAR_ENCODED_SUBST_OPS "\\/%#:-=+?"
+# define VAR_SUBST_OPS ("\\/%#:-=+?" + 1)
+# define MINUS_PLUS_EQUAL_QUESTION ("\\/%#:-=+?" + 5)
+#else
+# define VAR_ENCODED_SUBST_OPS "%#:-=+?"
+# define VAR_SUBST_OPS "%#:-=+?"
+# define MINUS_PLUS_EQUAL_QUESTION ("%#:-=+?" + 3)
+#endif
+
+#define SPECIAL_VAR_SYMBOL_STR "\3"
+#define SPECIAL_VAR_SYMBOL 3
+/* The "variable" with name "\1" emits string "\3". Testcase: "echo ^C" */
+#define SPECIAL_VAR_QUOTED_SVS 1
+
+struct variable;
+
+static const char hush_version_str[] ALIGN1 = "HUSH_VERSION="BB_VER;
+
+/* This supports saving pointers malloced in vfork child,
+ * to be freed in the parent.
+ */
+#if !BB_MMU
+typedef struct nommu_save_t {
+ struct variable *old_vars;
+ char **argv;
+ char **argv_from_re_execing;
+} nommu_save_t;
+#endif
+
+
+enum {
+ RES_NONE = 0,
+#if ENABLE_HUSH_IF
+ RES_IF ,
+ RES_THEN ,
+ RES_ELIF ,
+ RES_ELSE ,
+ RES_FI ,
+#endif
+#if ENABLE_HUSH_LOOPS
+ RES_FOR ,
+ RES_WHILE ,
+ RES_UNTIL ,
+ RES_DO ,
+ RES_DONE ,
+#endif
+#if ENABLE_HUSH_LOOPS || ENABLE_HUSH_CASE
+ RES_IN ,
+#endif
+#if ENABLE_HUSH_CASE
+ RES_CASE ,
+ /* three pseudo-keywords support contrived "case" syntax: */
+ RES_CASE_IN, /* "case ... IN", turns into RES_MATCH when IN is observed */
+ RES_MATCH , /* "word)" */
+ RES_CASE_BODY, /* "this command is inside CASE" */
+ RES_ESAC ,
+#endif
+ RES_XXXX ,
+ RES_SNTX
+};
+
+typedef struct o_string {
+ char *data;
+ int length; /* position where data is appended */
+ int maxlen;
+ int o_expflags;
+ /* At least some part of the string was inside '' or "",
+ * possibly empty one: word"", wo''rd etc. */
+ smallint has_quoted_part;
+ smallint has_empty_slot;
+ smallint ended_in_ifs;
+} o_string;
+enum {
+ EXP_FLAG_SINGLEWORD = 0x80, /* must be 0x80 */
+ EXP_FLAG_GLOB = 0x2,
+ /* Protect newly added chars against globbing
+ * by prepending \ to *, ?, [, \ */
+ EXP_FLAG_ESC_GLOB_CHARS = 0x1,
+};
+/* Used for initialization: o_string foo = NULL_O_STRING; */
+#define NULL_O_STRING { NULL }
+
+#ifndef debug_printf_parse
+static const char *const assignment_flag[] ALIGN_PTR = {
+ "MAYBE_ASSIGNMENT",
+ "DEFINITELY_ASSIGNMENT",
+ "NOT_ASSIGNMENT",
+ "WORD_IS_KEYWORD",
+};
+#endif
+
+/* We almost can use standard FILE api, but we need an ability to move
+ * its fd when redirects coincide with it. No api exists for that
+ * (RFE for it at https://sourceware.org/bugzilla/show_bug.cgi?id=21902).
+ * HFILE is our internal alternative. Only supports reading.
+ * Since we now can, we incorporate linked list of all opened HFILEs
+ * into the struct (used to be a separate mini-list).
+ */
+typedef struct HFILE {
+ char *cur;
+ char *end;
+ struct HFILE *next_hfile;
+ int fd;
+ char buf[1024];
+} HFILE;
+
+typedef struct in_str {
+ const char *p;
+ int peek_buf[2];
+ int last_char;
+ HFILE *file;
+} in_str;
+
+#ifndef __U_BOOT__
+/* The descrip member of this structure is only used to make
+ * debugging output pretty */
+static const struct {
+ int32_t mode;
+ signed char default_fd;
+ char descrip[3];
+} redir_table[] ALIGN4 = {
+ { O_RDONLY, 0, "<" },
+ { O_CREAT|O_TRUNC|O_WRONLY, 1, ">" },
+ { O_CREAT|O_APPEND|O_WRONLY, 1, ">>" },
+ { O_CREAT|O_RDWR, 1, "<>" },
+ { O_RDONLY, 0, "<<" },
+/* Should not be needed. Bogus default_fd helps in debugging */
+/* { O_RDONLY, 77, "<<" }, */
+};
+
+struct redir_struct {
+ struct redir_struct *next;
+ char *rd_filename; /* filename */
+ int rd_fd; /* fd to redirect */
+ /* fd to redirect to, or -3 if rd_fd is to be closed (n>&-) */
+ int rd_dup;
+ smallint rd_type; /* (enum redir_type) */
+ /* note: for heredocs, rd_filename contains heredoc delimiter,
+ * and subsequently heredoc itself; and rd_dup is a bitmask:
+ * bit 0: do we need to trim leading tabs?
+ * bit 1: is heredoc quoted (<<'delim' syntax) ?
+ */
+};
+typedef enum redir_type {
+ REDIRECT_INPUT = 0,
+ REDIRECT_OVERWRITE = 1,
+ REDIRECT_APPEND = 2,
+ REDIRECT_IO = 3,
+ REDIRECT_HEREDOC = 4,
+ REDIRECT_HEREDOC2 = 5, /* REDIRECT_HEREDOC after heredoc is loaded */
+
+ REDIRFD_CLOSE = -3,
+ REDIRFD_SYNTAX_ERR = -2,
+ REDIRFD_TO_FILE = -1,
+ /* otherwise, rd_fd is redirected to rd_dup */
+
+ HEREDOC_SKIPTABS = 1,
+ HEREDOC_QUOTED = 2,
+} redir_type;
+
+#endif /* !__U_BOOT__ */
+
+struct command {
+#ifndef __U_BOOT__
+ pid_t pid; /* 0 if exited */
+#endif /* !__U_BOOT__ */
+ unsigned assignment_cnt; /* how many argv[i] are assignments? */
+#if ENABLE_HUSH_LINENO_VAR
+ unsigned lineno;
+#endif
+ smallint cmd_type; /* CMD_xxx */
+#define CMD_NORMAL 0
+#define CMD_SUBSHELL 1
+#if BASH_TEST2
+/* used for "[[ EXPR ]]" */
+# define CMD_TEST2_SINGLEWORD_NOGLOB 2
+#endif
+#if BASH_TEST2 || ENABLE_HUSH_LOCAL || ENABLE_HUSH_EXPORT || ENABLE_HUSH_READONLY
+/* used to prevent word splitting and globbing in "export v=t*" */
+# define CMD_SINGLEWORD_NOGLOB 3
+#endif
+#if ENABLE_HUSH_FUNCTIONS
+# define CMD_FUNCDEF 4
+#endif
+
+ smalluint cmd_exitcode;
+ /* if non-NULL, this "command" is { list }, ( list ), or a compound statement */
+ struct pipe *group;
+#if !BB_MMU
+ char *group_as_string;
+#endif
+#if ENABLE_HUSH_FUNCTIONS
+ struct function *child_func;
+/* This field is used to prevent a bug here:
+ * while...do f1() {a;}; f1; f1() {b;}; f1; done
+ * When we execute "f1() {a;}" cmd, we create new function and clear
+ * cmd->group, cmd->group_as_string, cmd->argv[0].
+ * When we execute "f1() {b;}", we notice that f1 exists,
+ * and that its "parent cmd" struct is still "alive",
+ * we put those fields back into cmd->xxx
+ * (struct function has ->parent_cmd ptr to facilitate that).
+ * When we loop back, we can execute "f1() {a;}" again and set f1 correctly.
+ * Without this trick, loop would execute a;b;b;b;...
+ * instead of correct sequence a;b;a;b;...
+ * When command is freed, it severs the link
+ * (sets ->child_func->parent_cmd to NULL).
+ */
+#endif
+#ifdef __U_BOOT__
+ int argc; /* number of program arguments */
+#endif
+ char **argv; /* command name and arguments */
+/* argv vector may contain variable references (^Cvar^C, ^C0^C etc)
+ * and on execution these are substituted with their values.
+ * Substitution can make _several_ words out of one argv[n]!
+ * Example: argv[0]=='.^C*^C.' here: echo .$*.
+ * References of the form ^C`cmd arg^C are `cmd arg` substitutions.
+ */
+#ifndef __U_BOOT__
+ struct redir_struct *redirects; /* I/O redirections */
+#endif /* !__U_BOOT__ */
+};
+/* Is there anything in this command at all? */
+#ifndef __U_BOOT__
+#define IS_NULL_CMD(cmd) \
+ (!(cmd)->group && !(cmd)->argv && !(cmd)->redirects)
+
+#else /* __U_BOOT__ */
+#define IS_NULL_CMD(cmd) \
+ (!(cmd)->group && !(cmd)->argv)
+#endif /* __U_BOOT__ */
+struct pipe {
+ struct pipe *next;
+ int num_cmds; /* total number of commands in pipe */
+#ifndef __U_BOOT__
+ int alive_cmds; /* number of commands running (not exited) */
+ int stopped_cmds; /* number of commands alive, but stopped */
+#if ENABLE_HUSH_JOB
+ unsigned jobid; /* job number */
+ pid_t pgrp; /* process group ID for the job */
+ char *cmdtext; /* name of job */
+#endif
+#endif /* !__U_BOOT__ */
+ struct command *cmds; /* array of commands in pipe */
+ smallint followup; /* PIPE_BG, PIPE_SEQ, PIPE_OR, PIPE_AND */
+ IF_HAS_KEYWORDS(smallint pi_inverted;) /* "! cmd | cmd" */
+ IF_HAS_KEYWORDS(smallint res_word;) /* needed for if, for, while, until... */
+};
+typedef enum pipe_style {
+ PIPE_SEQ = 0,
+ PIPE_AND = 1,
+ PIPE_OR = 2,
+ PIPE_BG = 3,
+} pipe_style;
+/* Is there anything in this pipe at all? */
+#define IS_NULL_PIPE(pi) \
+ ((pi)->num_cmds == 0 IF_HAS_KEYWORDS( && (pi)->res_word == RES_NONE))
+
+/* This holds pointers to the various results of parsing */
+struct parse_context {
+ /* linked list of pipes */
+ struct pipe *list_head;
+ /* last pipe (being constructed right now) */
+ struct pipe *pipe;
+ /* last command in pipe (being constructed right now) */
+ struct command *command;
+#ifndef __U_BOOT__
+ /* last redirect in command->redirects list */
+ struct redir_struct *pending_redirect;
+#endif /* !__U_BOOT__ */
+ o_string word;
+#if !BB_MMU
+ o_string as_string;
+#endif
+ smallint is_assignment; /* 0:maybe, 1:yes, 2:no, 3:keyword */
+#if HAS_KEYWORDS
+ smallint ctx_res_w;
+ smallint ctx_inverted; /* "! cmd | cmd" */
+#if ENABLE_HUSH_CASE
+ smallint ctx_dsemicolon; /* ";;" seen */
+#endif
+ /* bitmask of FLAG_xxx, for figuring out valid reserved words */
+ int old_flag;
+ /* group we are enclosed in:
+ * example: "if pipe1; pipe2; then pipe3; fi"
+ * when we see "if" or "then", we malloc and copy current context,
+ * and make ->stack point to it. then we parse pipeN.
+ * when closing "then" / fi" / whatever is found,
+ * we move list_head into ->stack->command->group,
+ * copy ->stack into current context, and delete ->stack.
+ * (parsing of { list } and ( list ) doesn't use this method)
+ */
+ struct parse_context *stack;
+#endif
+};
+enum {
+ MAYBE_ASSIGNMENT = 0,
+ DEFINITELY_ASSIGNMENT = 1,
+ NOT_ASSIGNMENT = 2,
+ /* Not an assignment, but next word may be: "if v=xyz cmd;" */
+ WORD_IS_KEYWORD = 3,
+};
+
+#ifndef __U_BOOT__
+/* On program start, environ points to initial environment.
+ * putenv adds new pointers into it, unsetenv removes them.
+ * Neither of these (de)allocates the strings.
+ * setenv allocates new strings in malloc space and does putenv,
+ * and thus setenv is unusable (leaky) for shell's purposes */
+#define setenv(...) setenv_is_leaky_dont_use()
+#endif /* !__U_BOOT__ */
+struct variable {
+ struct variable *next;
+ char *varstr; /* points to "name=" portion */
+ int max_len; /* if > 0, name is part of initial env; else name is malloced */
+#ifndef __U_BOOT__
+ uint16_t var_nest_level;
+ smallint flg_export; /* putenv should be done on this var */
+ smallint flg_read_only;
+#endif /* !__U_BOOT__ */
+};
+
+enum {
+ BC_BREAK = 1,
+ BC_CONTINUE = 2,
+};
+
+#if ENABLE_HUSH_FUNCTIONS
+struct function {
+ struct function *next;
+ char *name;
+ struct command *parent_cmd;
+ struct pipe *body;
+# if !BB_MMU
+ char *body_as_string;
+# endif
+};
+#endif
+
+
+/* set -/+o OPT support. (TODO: make it optional)
+ * bash supports the following opts:
+ * allexport off
+ * braceexpand on
+ * emacs on
+ * errexit off
+ * errtrace off
+ * functrace off
+ * hashall on
+ * histexpand off
+ * history on
+ * ignoreeof off
+ * interactive-comments on
+ * keyword off
+ * monitor on
+ * noclobber off
+ * noexec off
+ * noglob off
+ * nolog off
+ * notify off
+ * nounset off
+ * onecmd off
+ * physical off
+ * pipefail off
+ * posix off
+ * privileged off
+ * verbose off
+ * vi off
+ * xtrace off
+ */
+static const char o_opt_strings[] ALIGN1 =
+ "pipefail\0"
+ "noexec\0"
+ "errexit\0"
+#if ENABLE_HUSH_MODE_X
+ "xtrace\0"
+#endif
+ ;
+enum {
+ OPT_O_PIPEFAIL,
+ OPT_O_NOEXEC,
+ OPT_O_ERREXIT,
+#if ENABLE_HUSH_MODE_X
+ OPT_O_XTRACE,
+#endif
+ NUM_OPT_O
+};
+
+/* "Globals" within this file */
+/* Sorted roughly by size (smaller offsets == smaller code) */
+struct globals {
+#ifndef __U_BOOT__
+ /* interactive_fd != 0 means we are an interactive shell.
+ * If we are, then saved_tty_pgrp can also be != 0, meaning
+ * that controlling tty is available. With saved_tty_pgrp == 0,
+ * job control still works, but terminal signals
+ * (^C, ^Z, ^Y, ^\) won't work at all, and background
+ * process groups can only be created with "cmd &".
+ * With saved_tty_pgrp != 0, hush will use tcsetpgrp()
+ * to give tty to the foreground process group,
+ * and will take it back when the group is stopped (^Z)
+ * or killed (^C).
+ */
+#if ENABLE_HUSH_INTERACTIVE
+ /* 'interactive_fd' is a fd# open to ctty, if we have one
+ * _AND_ if we decided to act interactively */
+ int interactive_fd;
+ IF_NOT_FEATURE_EDITING_FANCY_PROMPT(char *PS1;)
+# define G_interactive_fd (G.interactive_fd)
+#else
+# define G_interactive_fd 0
+#endif
+#else /* __U_BOOT__ */
+# define G_interactive_fd 0
+#endif /* __U_BOOT__ */
+#ifndef __U_BOOT__
+#if ENABLE_FEATURE_EDITING
+ line_input_t *line_input_state;
+#endif
+ pid_t root_pid;
+ pid_t root_ppid;
+ pid_t last_bg_pid;
+#if ENABLE_HUSH_RANDOM_SUPPORT
+ random_t random_gen;
+#endif
+#if ENABLE_HUSH_JOB
+ int run_list_level;
+ unsigned last_jobid;
+ pid_t saved_tty_pgrp;
+ struct pipe *job_list;
+# define G_saved_tty_pgrp (G.saved_tty_pgrp)
+#else
+# define G_saved_tty_pgrp 0
+#endif
+#endif /* !__U_BOOT__ */
+ /* How deeply are we in context where "set -e" is ignored */
+ int errexit_depth;
+#ifndef __U_BOOT__
+ /* "set -e" rules (do we follow them correctly?):
+ * Exit if pipe, list, or compound command exits with a non-zero status.
+ * Shell does not exit if failed command is part of condition in
+ * if/while, part of && or || list except the last command, any command
+ * in a pipe but the last, or if the command's return value is being
+ * inverted with !. If a compound command other than a subshell returns a
+ * non-zero status because a command failed while -e was being ignored, the
+ * shell does not exit. A trap on ERR, if set, is executed before the shell
+ * exits [ERR is a bashism].
+ *
+ * If a compound command or function executes in a context where -e is
+ * ignored, none of the commands executed within are affected by the -e
+ * setting. If a compound command or function sets -e while executing in a
+ * context where -e is ignored, that setting does not have any effect until
+ * the compound command or the command containing the function call completes.
+ */
+
+ char o_opt[NUM_OPT_O];
+#if ENABLE_HUSH_MODE_X
+# define G_x_mode (G.o_opt[OPT_O_XTRACE])
+#else
+# define G_x_mode 0
+#endif
+ char opt_s;
+ char opt_c;
+#endif /* !__U_BOOT__ */
+#if ENABLE_HUSH_INTERACTIVE
+ smallint promptmode; /* 0: PS1, 1: PS2 */
+#endif
+ /* set by signal handler if SIGINT is received _and_ its trap is not set */
+ smallint flag_SIGINT;
+#ifndef __U_BOOT__
+#if ENABLE_HUSH_LOOPS
+ smallint flag_break_continue;
+#endif
+#endif /* !__U_BOOT__ */
+#if ENABLE_HUSH_FUNCTIONS
+ /* 0: outside of a function (or sourced file)
+ * -1: inside of a function, ok to use return builtin
+ * 1: return is invoked, skip all till end of func
+ */
+ smallint flag_return_in_progress;
+# define G_flag_return_in_progress (G.flag_return_in_progress)
+#else
+# define G_flag_return_in_progress 0
+#endif
+ smallint exiting; /* used to prevent EXIT trap recursion */
+ /* These support $? */
+ smalluint last_exitcode;
+ smalluint expand_exitcode;
+ smalluint last_bg_pid_exitcode;
+#ifndef __U_BOOT__
+#if ENABLE_HUSH_SET
+ /* are global_argv and global_argv[1..n] malloced? (note: not [0]) */
+ smalluint global_args_malloced;
+# define G_global_args_malloced (G.global_args_malloced)
+#else
+# define G_global_args_malloced 0
+#endif
+#if ENABLE_HUSH_BASH_COMPAT
+ int dead_job_exitcode; /* for "wait -n" */
+#endif
+#endif /* !__U_BOOT__ */
+ /* how many non-NULL argv's we have. NB: $# + 1 */
+ int global_argc;
+ char **global_argv;
+#if !BB_MMU
+ char *argv0_for_re_execing;
+#endif
+#if ENABLE_HUSH_LOOPS
+#ifndef __U_BOOT__
+ unsigned depth_break_continue;
+#endif /* !__U_BOOT__ */
+ unsigned depth_of_loop;
+#endif
+#ifndef __U_BOOT__
+#if ENABLE_HUSH_GETOPTS
+ unsigned getopt_count;
+#endif
+#endif /* !__U_BOOT__ */
+ const char *ifs;
+#ifdef __U_BOOT__
+ int flag_repeat;
+ int do_repeat;
+ int run_command_flags;
+#endif /* __U_BOOT__ */
+ char *ifs_whitespace; /* = G.ifs or malloced */
+#ifndef __U_BOOT__
+ const char *cwd;
+#endif /* !__U_BOOT__ */
+ struct variable *top_var;
+ char **expanded_assignments;
+ struct variable **shadowed_vars_pp;
+ unsigned var_nest_level;
+#ifndef __U_BOOT__
+#if ENABLE_HUSH_FUNCTIONS
+# if ENABLE_HUSH_LOCAL
+ unsigned func_nest_level; /* solely to prevent "local v" in non-functions */
+# endif
+ struct function *top_func;
+#endif
+ /* Signal and trap handling */
+#if ENABLE_HUSH_FAST
+ unsigned count_SIGCHLD;
+ unsigned handled_SIGCHLD;
+ smallint we_have_children;
+#endif
+#if ENABLE_HUSH_LINENO_VAR
+ unsigned parse_lineno;
+ unsigned execute_lineno;
+#endif
+ HFILE *HFILE_list;
+ HFILE *HFILE_stdin;
+ /* Which signals have non-DFL handler (even with no traps set)?
+ * Set at the start to:
+ * (SIGQUIT + maybe SPECIAL_INTERACTIVE_SIGS + maybe SPECIAL_JOBSTOP_SIGS)
+ * SPECIAL_INTERACTIVE_SIGS are cleared after fork.
+ * The rest is cleared right before execv syscalls.
+ * Other than these two times, never modified.
+ */
+ unsigned special_sig_mask;
+#if ENABLE_HUSH_JOB
+ unsigned fatal_sig_mask;
+# define G_fatal_sig_mask (G.fatal_sig_mask)
+#else
+# define G_fatal_sig_mask 0
+#endif
+#if ENABLE_HUSH_TRAP
+ int pre_trap_exitcode;
+# if ENABLE_HUSH_FUNCTIONS
+ int return_exitcode;
+# endif
+ char **traps; /* char *traps[NSIG] */
+# define G_traps G.traps
+#else
+# define G_traps ((char**)NULL)
+#endif
+ sigset_t pending_set;
+#if ENABLE_HUSH_MEMLEAK
+ unsigned long memleak_value;
+#endif
+#if ENABLE_HUSH_MODE_X
+ unsigned x_mode_depth;
+ /* "set -x" output should not be redirectable with subsequent 2>FILE.
+ * We dup fd#2 to x_mode_fd when "set -x" is executed, and use it
+ * for all subsequent output.
+ */
+ int x_mode_fd;
+ o_string x_mode_buf;
+#endif
+#endif /* !__U_BOOT__ */
+#if HUSH_DEBUG >= 2
+ int debug_indent;
+#endif
+#ifndef __U_BOOT__
+ struct sigaction sa;
+ char optstring_buf[sizeof("eixcs")];
+#if BASH_EPOCH_VARS
+ char epoch_buf[sizeof("%llu.nnnnnn") + sizeof(long long)*3];
+#endif
+#if ENABLE_FEATURE_EDITING
+ char user_input_buf[CONFIG_FEATURE_EDITING_MAX_LEN];
+#endif
+#endif /* !__U_BOOT__ */
+};
+#ifdef __U_BOOT__
+struct globals *ptr_to_globals;
+#endif /* __U_BOOT__ */
+#define G (*ptr_to_globals)
+/* Not #defining name to G.name - this quickly gets unwieldy
+ * (too many defines). Also, I actually prefer to see when a variable
+ * is global, thus "G." prefix is a useful hint */
+#ifdef __U_BOOT__
+#define SET_PTR_TO_GLOBALS(x) do { \
+ (*(struct globals**)&ptr_to_globals) = (void*)(x); \
+ barrier(); \
+} while (0)
+#define INIT_G() do { \
+ SET_PTR_TO_GLOBALS(xzalloc(sizeof(G))); \
+ G.promptmode = 1; \
+} while (0)
+#else /* !__U_BOOT__ */
+#define INIT_G() do { \
+ SET_PTR_TO_GLOBALS(xzalloc(sizeof(G))); \
+ /* memset(&G.sa, 0, sizeof(G.sa)); */ \
+ sigfillset(&G.sa.sa_mask); \
+ G.sa.sa_flags = SA_RESTART; \
+} while (0)
+#endif /* !__U_BOOT__ */
+
+
+#ifndef __U_BOOT__
+/* Function prototypes for builtins */
+static int builtin_cd(char **argv) FAST_FUNC;
+#if ENABLE_HUSH_ECHO
+static int builtin_echo(char **argv) FAST_FUNC;
+#endif
+static int builtin_eval(char **argv) FAST_FUNC;
+static int builtin_exec(char **argv) FAST_FUNC;
+static int builtin_exit(char **argv) FAST_FUNC;
+#if ENABLE_HUSH_EXPORT
+static int builtin_export(char **argv) FAST_FUNC;
+#endif
+#if ENABLE_HUSH_READONLY
+static int builtin_readonly(char **argv) FAST_FUNC;
+#endif
+static int builtin_false(char **argv) FAST_FUNC;
+#if ENABLE_HUSH_JOB
+static int builtin_fg_bg(char **argv) FAST_FUNC;
+static int builtin_jobs(char **argv) FAST_FUNC;
+#endif
+#if ENABLE_HUSH_GETOPTS
+static int builtin_getopts(char **argv) FAST_FUNC;
+#endif
+#if ENABLE_HUSH_HELP
+static int builtin_help(char **argv) FAST_FUNC;
+#endif
+#if MAX_HISTORY && ENABLE_FEATURE_EDITING
+static int builtin_history(char **argv) FAST_FUNC;
+#endif
+#if ENABLE_HUSH_LOCAL
+static int builtin_local(char **argv) FAST_FUNC;
+#endif
+#if ENABLE_HUSH_MEMLEAK
+static int builtin_memleak(char **argv) FAST_FUNC;
+#endif
+#if ENABLE_HUSH_PRINTF
+static int builtin_printf(char **argv) FAST_FUNC;
+#endif
+static int builtin_pwd(char **argv) FAST_FUNC;
+#if ENABLE_HUSH_READ
+static int builtin_read(char **argv) FAST_FUNC;
+#endif
+#if ENABLE_HUSH_SET
+static int builtin_set(char **argv) FAST_FUNC;
+#endif
+static int builtin_shift(char **argv) FAST_FUNC;
+static int builtin_source(char **argv) FAST_FUNC;
+#if ENABLE_HUSH_TEST || BASH_TEST2
+static int builtin_test(char **argv) FAST_FUNC;
+#endif
+#if ENABLE_HUSH_TRAP
+static int builtin_trap(char **argv) FAST_FUNC;
+#endif
+#if ENABLE_HUSH_TYPE
+static int builtin_type(char **argv) FAST_FUNC;
+#endif
+#if ENABLE_HUSH_TIMES
+static int builtin_times(char **argv) FAST_FUNC;
+#endif
+static int builtin_true(char **argv) FAST_FUNC;
+#if ENABLE_HUSH_UMASK
+static int builtin_umask(char **argv) FAST_FUNC;
+#endif
+#if ENABLE_HUSH_UNSET
+static int builtin_unset(char **argv) FAST_FUNC;
+#endif
+#if ENABLE_HUSH_KILL
+static int builtin_kill(char **argv) FAST_FUNC;
+#endif
+#if ENABLE_HUSH_WAIT
+static int builtin_wait(char **argv) FAST_FUNC;
+#endif
+#if ENABLE_HUSH_LOOPS
+static int builtin_break(char **argv) FAST_FUNC;
+static int builtin_continue(char **argv) FAST_FUNC;
+#endif
+#if ENABLE_HUSH_FUNCTIONS
+static int builtin_return(char **argv) FAST_FUNC;
+#endif
+
+/* Table of built-in functions. They can be forked or not, depending on
+ * context: within pipes, they fork. As simple commands, they do not.
+ * When used in non-forking context, they can change global variables
+ * in the parent shell process. If forked, of course they cannot.
+ * For example, 'unset foo | whatever' will parse and run, but foo will
+ * still be set at the end. */
+struct built_in_command {
+ const char *b_cmd;
+ int (*b_function)(char **argv) FAST_FUNC;
+#if ENABLE_HUSH_HELP
+ const char *b_descr;
+# define BLTIN(cmd, func, help) { cmd, func, help }
+#else
+# define BLTIN(cmd, func, help) { cmd, func }
+#endif
+};
+
+static const struct built_in_command bltins1[] ALIGN_PTR = {
+ BLTIN("." , builtin_source , "Run commands in file"),
+ BLTIN(":" , builtin_true , NULL),
+#if ENABLE_HUSH_JOB
+ BLTIN("bg" , builtin_fg_bg , "Resume job in background"),
+#endif
+#if ENABLE_HUSH_LOOPS
+ BLTIN("break" , builtin_break , "Exit loop"),
+#endif
+ BLTIN("cd" , builtin_cd , "Change directory"),
+#if ENABLE_HUSH_LOOPS
+ BLTIN("continue" , builtin_continue, "Start new loop iteration"),
+#endif
+ BLTIN("eval" , builtin_eval , "Construct and run shell command"),
+ BLTIN("exec" , builtin_exec , "Execute command, don't return to shell"),
+ BLTIN("exit" , builtin_exit , NULL),
+#if ENABLE_HUSH_EXPORT
+ BLTIN("export" , builtin_export , "Set environment variables"),
+#endif
+ BLTIN("false" , builtin_false , NULL),
+#if ENABLE_HUSH_JOB
+ BLTIN("fg" , builtin_fg_bg , "Bring job to foreground"),
+#endif
+#if ENABLE_HUSH_GETOPTS
+ BLTIN("getopts" , builtin_getopts , NULL),
+#endif
+#if ENABLE_HUSH_HELP
+ BLTIN("help" , builtin_help , NULL),
+#endif
+#if MAX_HISTORY && ENABLE_FEATURE_EDITING
+ BLTIN("history" , builtin_history , "Show history"),
+#endif
+#if ENABLE_HUSH_JOB
+ BLTIN("jobs" , builtin_jobs , "List jobs"),
+#endif
+#if ENABLE_HUSH_KILL
+ BLTIN("kill" , builtin_kill , "Send signals to processes"),
+#endif
+#if ENABLE_HUSH_LOCAL
+ BLTIN("local" , builtin_local , "Set local variables"),
+#endif
+#if ENABLE_HUSH_MEMLEAK
+ BLTIN("memleak" , builtin_memleak , NULL),
+#endif
+#if ENABLE_HUSH_READ
+ BLTIN("read" , builtin_read , "Input into variable"),
+#endif
+#if ENABLE_HUSH_READONLY
+ BLTIN("readonly" , builtin_readonly, "Make variables read-only"),
+#endif
+#if ENABLE_HUSH_FUNCTIONS
+ BLTIN("return" , builtin_return , "Return from function"),
+#endif
+#if ENABLE_HUSH_SET
+ BLTIN("set" , builtin_set , "Set positional parameters"),
+#endif
+ BLTIN("shift" , builtin_shift , "Shift positional parameters"),
+#if BASH_SOURCE
+ BLTIN("source" , builtin_source , NULL),
+#endif
+#if ENABLE_HUSH_TIMES
+ BLTIN("times" , builtin_times , NULL),
+#endif
+#if ENABLE_HUSH_TRAP
+ BLTIN("trap" , builtin_trap , "Trap signals"),
+#endif
+ BLTIN("true" , builtin_true , NULL),
+#if ENABLE_HUSH_TYPE
+ BLTIN("type" , builtin_type , "Show command type"),
+#endif
+#if ENABLE_HUSH_ULIMIT
+ BLTIN("ulimit" , shell_builtin_ulimit, "Control resource limits"),
+#endif
+#if ENABLE_HUSH_UMASK
+ BLTIN("umask" , builtin_umask , "Set file creation mask"),
+#endif
+#if ENABLE_HUSH_UNSET
+ BLTIN("unset" , builtin_unset , "Unset variables"),
+#endif
+#if ENABLE_HUSH_WAIT
+ BLTIN("wait" , builtin_wait , "Wait for process to finish"),
+#endif
+};
+/* These builtins won't be used if we are on NOMMU and need to re-exec
+ * (it's cheaper to run an external program in this case):
+ */
+static const struct built_in_command bltins2[] ALIGN_PTR = {
+#if ENABLE_HUSH_TEST
+ BLTIN("[" , builtin_test , NULL),
+#endif
+#if BASH_TEST2
+ BLTIN("[[" , builtin_test , NULL),
+#endif
+#if ENABLE_HUSH_ECHO
+ BLTIN("echo" , builtin_echo , NULL),
+#endif
+#if ENABLE_HUSH_PRINTF
+ BLTIN("printf" , builtin_printf , NULL),
+#endif
+ BLTIN("pwd" , builtin_pwd , NULL),
+#if ENABLE_HUSH_TEST
+ BLTIN("test" , builtin_test , NULL),
+#endif
+};
+
+#endif /* !__U_BOOT__ */
+
+/* Debug printouts.
+ */
+#if HUSH_DEBUG >= 2
+/* prevent disasters with G.debug_indent < 0 */
+# define indent() fdprintf(2, "%*s", (G.debug_indent * 2) & 0xff, "")
+# define debug_enter() (G.debug_indent++)
+# define debug_leave() (G.debug_indent--)
+#else
+# define indent() ((void)0)
+# define debug_enter() ((void)0)
+# define debug_leave() ((void)0)
+#endif
+
+#ifndef debug_printf
+# define debug_printf(...) (indent(), fdprintf(2, __VA_ARGS__))
+#endif
+
+#ifndef debug_printf_parse
+# define debug_printf_parse(...) (indent(), fdprintf(2, __VA_ARGS__))
+#endif
+
+#ifndef debug_printf_heredoc
+# define debug_printf_heredoc(...) (indent(), fdprintf(2, __VA_ARGS__))
+#endif
+
+#ifndef debug_printf_exec
+#define debug_printf_exec(...) (indent(), fdprintf(2, __VA_ARGS__))
+#endif
+
+#ifndef debug_printf_env
+# define debug_printf_env(...) (indent(), fdprintf(2, __VA_ARGS__))
+#endif
+
+#ifndef debug_printf_jobs
+# define debug_printf_jobs(...) (indent(), fdprintf(2, __VA_ARGS__))
+# define DEBUG_JOBS 1
+#else
+# define DEBUG_JOBS 0
+#endif
+
+#ifndef debug_printf_expand
+# define debug_printf_expand(...) (indent(), fdprintf(2, __VA_ARGS__))
+# define DEBUG_EXPAND 1
+#else
+# define DEBUG_EXPAND 0
+#endif
+
+#ifndef debug_printf_varexp
+# define debug_printf_varexp(...) (indent(), fdprintf(2, __VA_ARGS__))
+#endif
+
+#ifndef debug_printf_glob
+# define debug_printf_glob(...) (indent(), fdprintf(2, __VA_ARGS__))
+# define DEBUG_GLOB 1
+#else
+# define DEBUG_GLOB 0
+#endif
+
+#ifndef debug_printf_redir
+# define debug_printf_redir(...) (indent(), fdprintf(2, __VA_ARGS__))
+#endif
+
+#ifndef debug_printf_list
+# define debug_printf_list(...) (indent(), fdprintf(2, __VA_ARGS__))
+#endif
+
+#ifndef debug_printf_subst
+# define debug_printf_subst(...) (indent(), fdprintf(2, __VA_ARGS__))
+#endif
+
+#ifndef debug_printf_prompt
+# define debug_printf_prompt(...) (indent(), fdprintf(2, __VA_ARGS__))
+#endif
+
+#ifndef debug_printf_clean
+# define debug_printf_clean(...) (indent(), fdprintf(2, __VA_ARGS__))
+# define DEBUG_CLEAN 1
+#else
+# define DEBUG_CLEAN 0
+#endif
+
+#if DEBUG_EXPAND
+static void debug_print_strings(const char *prefix, char **vv)
+{
+ indent();
+ fdprintf(2, "%s:\n", prefix);
+ while (*vv)
+ fdprintf(2, " '%s'\n", *vv++);
+}
+#else
+# define debug_print_strings(prefix, vv) ((void)0)
+#endif
+
+
+/* Leak hunting. Use hush_leaktool.sh for post-processing.
+ */
+#if LEAK_HUNTING
+static void *xxmalloc(int lineno, size_t size)
+{
+ void *ptr = xmalloc((size + 0xff) & ~0xff);
+ fdprintf(2, "line %d: malloc %p\n", lineno, ptr);
+ return ptr;
+}
+static void *xxrealloc(int lineno, void *ptr, size_t size)
+{
+ ptr = xrealloc(ptr, (size + 0xff) & ~0xff);
+ fdprintf(2, "line %d: realloc %p\n", lineno, ptr);
+ return ptr;
+}
+static char *xxstrdup(int lineno, const char *str)
+{
+ char *ptr = xstrdup(str);
+ fdprintf(2, "line %d: strdup %p\n", lineno, ptr);
+ return ptr;
+}
+static void xxfree(void *ptr)
+{
+ fdprintf(2, "free %p\n", ptr);
+ free(ptr);
+}
+# define xmalloc(s) xxmalloc(__LINE__, s)
+# define xrealloc(p, s) xxrealloc(__LINE__, p, s)
+# define xstrdup(s) xxstrdup(__LINE__, s)
+# define free(p) xxfree(p)
+#endif
+
+
+/* Syntax and runtime errors. They always abort scripts.
+ * In interactive use they usually discard unparsed and/or unexecuted commands
+ * and return to the prompt.
+ * HUSH_DEBUG >= 2 prints line number in this file where it was detected.
+ */
+#if HUSH_DEBUG < 2
+# define msg_and_die_if_script(lineno, ...) msg_and_die_if_script(__VA_ARGS__)
+# define syntax_error(lineno, msg) syntax_error(msg)
+# define syntax_error_at(lineno, msg) syntax_error_at(msg)
+# define syntax_error_unterm_ch(lineno, ch) syntax_error_unterm_ch(ch)
+# define syntax_error_unterm_str(lineno, s) syntax_error_unterm_str(s)
+# define syntax_error_unexpected_ch(lineno, ch) syntax_error_unexpected_ch(ch)
+#endif
+
+static void die_if_script(void)
+{
+ if (!G_interactive_fd) {
+ if (G.last_exitcode) /* sometines it's 2, not 1 (bash compat) */
+ xfunc_error_retval = G.last_exitcode;
+ xfunc_die();
+ }
+}
+
+#ifdef __U_BOOT__
+static void __maybe_unused msg_and_die_if_script(unsigned lineno, const char *fmt, ...)
+#else /* !__U_BOOT__ */
+static void msg_and_die_if_script(unsigned lineno, const char *fmt, ...)
+#endif /* !__U_BOOT__ */
+{
+ va_list p;
+
+#if HUSH_DEBUG >= 2
+ bb_error_msg("hush.c:%u", lineno);
+#endif
+ va_start(p, fmt);
+ bb_verror_msg(fmt, p, NULL);
+ va_end(p);
+ die_if_script();
+}
+
+static void syntax_error(unsigned lineno UNUSED_PARAM, const char *msg)
+{
+ if (msg)
+ bb_error_msg("syntax error: %s", msg);
+ else
+ bb_simple_error_msg("syntax error");
+ die_if_script();
+}
+
+static void syntax_error_at(unsigned lineno UNUSED_PARAM, const char *msg)
+{
+ bb_error_msg("syntax error at '%s'", msg);
+ die_if_script();
+}
+
+static void syntax_error_unterm_str(unsigned lineno UNUSED_PARAM, const char *s)
+{
+ bb_error_msg("syntax error: unterminated %s", s);
+//? source4.tests fails: in bash, echo ${^} in script does not terminate the script
+// (but bash --posix, or if bash is run as "sh", does terminate in script, so maybe uncomment this?)
+// die_if_script();
+}
+
+static void syntax_error_unterm_ch(unsigned lineno, char ch)
+{
+ char msg[2] = { ch, '\0' };
+ syntax_error_unterm_str(lineno, msg);
+}
+
+static void syntax_error_unexpected_ch(unsigned lineno UNUSED_PARAM, int ch)
+{
+ char msg[2];
+ msg[0] = ch;
+ msg[1] = '\0';
+#if HUSH_DEBUG >= 2
+ bb_error_msg("hush.c:%u", lineno);
+#endif
+ bb_error_msg("syntax error: unexpected %s", ch == EOF ? "EOF" : msg);
+ die_if_script();
+}
+
+#if HUSH_DEBUG < 2
+# undef msg_and_die_if_script
+# undef syntax_error
+# undef syntax_error_at
+# undef syntax_error_unterm_ch
+# undef syntax_error_unterm_str
+# undef syntax_error_unexpected_ch
+#else
+# define msg_and_die_if_script(...) msg_and_die_if_script(__LINE__, __VA_ARGS__)
+# define syntax_error(msg) syntax_error(__LINE__, msg)
+# define syntax_error_at(msg) syntax_error_at(__LINE__, msg)
+# define syntax_error_unterm_ch(ch) syntax_error_unterm_ch(__LINE__, ch)
+# define syntax_error_unterm_str(s) syntax_error_unterm_str(__LINE__, s)
+# define syntax_error_unexpected_ch(ch) syntax_error_unexpected_ch(__LINE__, ch)
+#endif
+
+/* Utility functions
+ */
+/* Replace each \x with x in place, return ptr past NUL. */
+static char *unbackslash(char *src)
+{
+#ifdef __U_BOOT__
+ char *dst = src = (char *)strchrnul(src, '\\');
+#else /* !__U_BOOT__ */
+ char *dst = src = strchrnul(src, '\\');
+#endif /* !__U_BOOT__ */
+ while (1) {
+ if (*src == '\\') {
+ src++;
+ if (*src != '\0') {
+ /* \x -> x */
+ *dst++ = *src++;
+ continue;
+ }
+ /* else: "\<nul>". Do not delete this backslash.
+ * Testcase: eval 'echo ok\'
+ */
+ *dst++ = '\\';
+ /* fallthrough */
+ }
+ if ((*dst++ = *src++) == '\0')
+ break;
+ }
+ return dst;
+}
+
+static char **add_strings_to_strings(char **strings, char **add, int need_to_dup)
+{
+ int i;
+ unsigned count1;
+ unsigned count2;
+ char **v;
+
+ v = strings;
+ count1 = 0;
+ if (v) {
+ while (*v) {
+ count1++;
+ v++;
+ }
+ }
+ count2 = 0;
+ v = add;
+ while (*v) {
+ count2++;
+ v++;
+ }
+ v = xrealloc(strings, (count1 + count2 + 1) * sizeof(char*));
+ v[count1 + count2] = NULL;
+ i = count2;
+ while (--i >= 0)
+ v[count1 + i] = (need_to_dup ? xstrdup(add[i]) : add[i]);
+ return v;
+}
+#if LEAK_HUNTING
+static char **xx_add_strings_to_strings(int lineno, char **strings, char **add, int need_to_dup)
+{
+ char **ptr = add_strings_to_strings(strings, add, need_to_dup);
+ fdprintf(2, "line %d: add_strings_to_strings %p\n", lineno, ptr);
+ return ptr;
+}
+#define add_strings_to_strings(strings, add, need_to_dup) \
+ xx_add_strings_to_strings(__LINE__, strings, add, need_to_dup)
+#endif
+
+/* Note: takes ownership of "add" ptr (it is not strdup'ed) */
+static char **add_string_to_strings(char **strings, char *add)
+{
+ char *v[2];
+ v[0] = add;
+ v[1] = NULL;
+ return add_strings_to_strings(strings, v, /*dup:*/ 0);
+}
+
+#if LEAK_HUNTING
+static char **xx_add_string_to_strings(int lineno, char **strings, char *add)
+{
+ char **ptr = add_string_to_strings(strings, add);
+ fdprintf(2, "line %d: add_string_to_strings %p\n", lineno, ptr);
+ return ptr;
+}
+#define add_string_to_strings(strings, add) \
+ xx_add_string_to_strings(__LINE__, strings, add)
+#endif
+
+static void free_strings(char **strings)
+{
+ char **v;
+
+ if (!strings)
+ return;
+ v = strings;
+ while (*v) {
+ free(*v);
+ v++;
+ }
+ free(strings);
+}
+
+#ifndef __U_BOOT__
+static int dup_CLOEXEC(int fd, int avoid_fd)
+{
+ int newfd;
+ repeat:
+ newfd = fcntl(fd, F_DUPFD_CLOEXEC, avoid_fd + 1);
+ if (newfd >= 0) {
+ if (F_DUPFD_CLOEXEC == F_DUPFD) /* if old libc (w/o F_DUPFD_CLOEXEC) */
+ fcntl(newfd, F_SETFD, FD_CLOEXEC);
+ } else { /* newfd < 0 */
+ if (errno == EBUSY)
+ goto repeat;
+ if (errno == EINTR)
+ goto repeat;
+ }
+ return newfd;
+}
+
+static int xdup_CLOEXEC_and_close(int fd, int avoid_fd)
+{
+ int newfd;
+ repeat:
+ newfd = fcntl(fd, F_DUPFD_CLOEXEC, avoid_fd + 1);
+ if (newfd < 0) {
+ if (errno == EBUSY)
+ goto repeat;
+ if (errno == EINTR)
+ goto repeat;
+ /* fd was not open? */
+ if (errno == EBADF)
+ return fd;
+ xfunc_die();
+ }
+ if (F_DUPFD_CLOEXEC == F_DUPFD) /* if old libc (w/o F_DUPFD_CLOEXEC) */
+ fcntl(newfd, F_SETFD, FD_CLOEXEC);
+ close(fd);
+ return newfd;
+}
+
+
+/* Manipulating HFILEs */
+static HFILE *hfopen(const char *name)
+{
+ HFILE *fp;
+ int fd;
+
+ fd = STDIN_FILENO;
+ if (name) {
+ fd = open(name, O_RDONLY | O_CLOEXEC);
+ if (fd < 0)
+ return NULL;
+ if (O_CLOEXEC == 0) /* ancient libc */
+ close_on_exec_on(fd);
+ }
+
+ fp = xmalloc(sizeof(*fp));
+ if (name == NULL)
+ G.HFILE_stdin = fp;
+ fp->fd = fd;
+ fp->cur = fp->end = fp->buf;
+ fp->next_hfile = G.HFILE_list;
+ G.HFILE_list = fp;
+ return fp;
+}
+static void hfclose(HFILE *fp)
+{
+ HFILE **pp = &G.HFILE_list;
+ while (*pp) {
+ HFILE *cur = *pp;
+ if (cur == fp) {
+ *pp = cur->next_hfile;
+ break;
+ }
+ pp = &cur->next_hfile;
+ }
+ if (fp->fd >= 0)
+ close(fp->fd);
+ free(fp);
+}
+static int refill_HFILE_and_getc(HFILE *fp)
+{
+ int n;
+
+ if (fp->fd < 0) {
+ /* Already saw EOF */
+ return EOF;
+ }
+#if ENABLE_HUSH_INTERACTIVE && !ENABLE_FEATURE_EDITING
+ /* If user presses ^C, read() restarts after SIGINT (we use SA_RESTART).
+ * IOW: ^C will not immediately stop line input.
+ * But poll() is different: it does NOT restart after signals.
+ */
+ if (fp == G.HFILE_stdin) {
+ struct pollfd pfd[1];
+ pfd[0].fd = fp->fd;
+ pfd[0].events = POLLIN;
+ n = poll(pfd, 1, -1);
+ if (n < 0
+ /*&& errno == EINTR - assumed true */
+ && sigismember(&G.pending_set, SIGINT)
+ ) {
+ return '\0';
+ }
+ }
+#else
+/* if FEATURE_EDITING=y, we do not use this routine for interactive input */
+#endif
+ /* Try to buffer more input */
+ n = safe_read(fp->fd, fp->buf, sizeof(fp->buf));
+ if (n < 0) {
+ bb_simple_perror_msg("read error");
+ n = 0;
+ }
+ fp->cur = fp->buf;
+ fp->end = fp->buf + n;
+ if (n == 0) {
+ /* EOF/error */
+ close(fp->fd);
+ fp->fd = -1;
+ return EOF;
+ }
+ return (unsigned char)(*fp->cur++);
+}
+/* Inlined for common case of non-empty buffer.
+ */
+static ALWAYS_INLINE int hfgetc(HFILE *fp)
+{
+ if (fp->cur < fp->end)
+ return (unsigned char)(*fp->cur++);
+ /* Buffer empty */
+ return refill_HFILE_and_getc(fp);
+}
+static int move_HFILEs_on_redirect(int fd, int avoid_fd)
+{
+ HFILE *fl = G.HFILE_list;
+ while (fl) {
+ if (fd == fl->fd) {
+ /* We use it only on script files, they are all CLOEXEC */
+ fl->fd = xdup_CLOEXEC_and_close(fd, avoid_fd);
+ debug_printf_redir("redirect_fd %d: matches a script fd, moving it to %d\n", fd, fl->fd);
+ return 1; /* "found and moved" */
+ }
+ fl = fl->next_hfile;
+ }
+#if ENABLE_HUSH_MODE_X
+ if (G.x_mode_fd > 0 && fd == G.x_mode_fd) {
+ G.x_mode_fd = xdup_CLOEXEC_and_close(fd, avoid_fd);
+ return 1; /* "found and moved" */
+ }
+#endif
+ return 0; /* "not in the list" */
+}
+#if ENABLE_FEATURE_SH_STANDALONE && BB_MMU
+static void close_all_HFILE_list(void)
+{
+ HFILE *fl = G.HFILE_list;
+ while (fl) {
+ /* hfclose would also free HFILE object.
+ * It is disastrous if we share memory with a vforked parent.
+ * I'm not sure we never come here after vfork.
+ * Therefore just close fd, nothing more.
+ *
+ * ">" instead of ">=": we don't close fd#0,
+ * interactive shell uses hfopen(NULL) as stdin input
+ * which has fl->fd == 0, but fd#0 gets redirected in pipes.
+ * If we'd close it here, then e.g. interactive "set | sort"
+ * with NOFORKed sort, would have sort's input fd closed.
+ */
+ if (fl->fd > 0)
+ /*hfclose(fl); - unsafe */
+ close(fl->fd);
+ fl = fl->next_hfile;
+ }
+}
+#endif
+static int fd_in_HFILEs(int fd)
+{
+ HFILE *fl = G.HFILE_list;
+ while (fl) {
+ if (fl->fd == fd)
+ return 1;
+ fl = fl->next_hfile;
+ }
+ return 0;
+}
+
+#endif /* !__U_BOOT__ */
+
+/* Helpers for setting new $n and restoring them back
+ */
+typedef struct save_arg_t {
+ char *sv_argv0;
+ char **sv_g_argv;
+ int sv_g_argc;
+#ifndef __U_BOOT__
+ IF_HUSH_SET(smallint sv_g_malloced;)
+#endif /* !__U_BOOT__ */
+} save_arg_t;
+
+#ifndef __U_BOOT__
+static void save_and_replace_G_args(save_arg_t *sv, char **argv)
+{
+ sv->sv_argv0 = argv[0];
+ sv->sv_g_argv = G.global_argv;
+ sv->sv_g_argc = G.global_argc;
+ IF_HUSH_SET(sv->sv_g_malloced = G.global_args_malloced;)
+
+ argv[0] = G.global_argv[0]; /* retain $0 */
+ G.global_argv = argv;
+ IF_HUSH_SET(G.global_args_malloced = 0;)
+
+ G.global_argc = 1 + string_array_len(argv + 1);
+}
+
+static void restore_G_args(save_arg_t *sv, char **argv)
+{
+#if ENABLE_HUSH_SET
+ if (G.global_args_malloced) {
+ /* someone ran "set -- arg1 arg2 ...", undo */
+ char **pp = G.global_argv;
+ while (*++pp) /* note: does not free $0 */
+ free(*pp);
+ free(G.global_argv);
+ }
+#endif
+ argv[0] = sv->sv_argv0;
+ G.global_argv = sv->sv_g_argv;
+ G.global_argc = sv->sv_g_argc;
+ IF_HUSH_SET(G.global_args_malloced = sv->sv_g_malloced;)
+}
+#endif /* !__U_BOOT__ */
+
+
+#ifndef __U_BOOT__
+/* Basic theory of signal handling in shell
+ * ========================================
+ * This does not describe what hush does, rather, it is current understanding
+ * what it _should_ do. If it doesn't, it's a bug.
+ * http://www.opengroup.org/onlinepubs/9699919799/utilities/V3_chap02.html#trap
+ *
+ * Signals are handled only after each pipe ("cmd | cmd | cmd" thing)
+ * is finished or backgrounded. It is the same in interactive and
+ * non-interactive shells, and is the same regardless of whether
+ * a user trap handler is installed or a shell special one is in effect.
+ * ^C or ^Z from keyboard seems to execute "at once" because it usually
+ * backgrounds (i.e. stops) or kills all members of currently running
+ * pipe.
+ *
+ * Wait builtin is interruptible by signals for which user trap is set
+ * or by SIGINT in interactive shell.
+ *
+ * Trap handlers will execute even within trap handlers. (right?)
+ *
+ * User trap handlers are forgotten when subshell ("(cmd)") is entered,
+ * except for handlers set to '' (empty string).
+ *
+ * If job control is off, backgrounded commands ("cmd &")
+ * have SIGINT, SIGQUIT set to SIG_IGN.
+ *
+ * Commands which are run in command substitution ("`cmd`")
+ * have SIGTTIN, SIGTTOU, SIGTSTP set to SIG_IGN.
+ *
+ * Ordinary commands have signals set to SIG_IGN/DFL as inherited
+ * by the shell from its parent.
+ *
+ * Signals which differ from SIG_DFL action
+ * (note: child (i.e., [v]forked) shell is not an interactive shell):
+ *
+ * SIGQUIT: ignore
+ * SIGTERM (interactive): ignore
+ * SIGHUP (interactive):
+ * Send SIGCONT to stopped jobs, send SIGHUP to all jobs and exit.
+ * Kernel would do this for us ("orphaned process group" handling
+ * according to POSIX) if we are a session leader and thus our death
+ * frees the controlling tty, but to be bash-compatible, we also do it
+ * for every interactive shell's death by SIGHUP.
+ * (Also, we need to restore tty pgrp, otherwise e.g. Midnight Commander
+ * backgrounds when hush started from it gets killed by SIGHUP).
+ * SIGTTIN, SIGTTOU, SIGTSTP (if job control is on): ignore
+ * Note that ^Z is handled not by trapping SIGTSTP, but by seeing
+ * that all pipe members are stopped. Try this in bash:
+ * while :; do :; done - ^Z does not background it
+ * (while :; do :; done) - ^Z backgrounds it
+ * SIGINT (interactive): wait for last pipe, ignore the rest
+ * of the command line, show prompt. NB: ^C does not send SIGINT
+ * to interactive shell while shell is waiting for a pipe,
+ * since shell is bg'ed (is not in foreground process group).
+ * Example 1: this waits 5 sec, but does not execute ls:
+ * "echo $$; sleep 5; ls -l" + "kill -INT <pid>"
+ * Example 2: this does not wait and does not execute ls:
+ * "echo $$; sleep 5 & wait; ls -l" + "kill -INT <pid>"
+ * Example 3: this does not wait 5 sec, but executes ls:
+ * "sleep 5; ls -l" + press ^C
+ * Example 4: this does not wait and does not execute ls:
+ * "sleep 5 & wait; ls -l" + press ^C
+ *
+ * (What happens to signals which are IGN on shell start?)
+ * (What happens with signal mask on shell start?)
+ *
+ * Old implementation
+ * ==================
+ * We use in-kernel pending signal mask to determine which signals were sent.
+ * We block all signals which we don't want to take action immediately,
+ * i.e. we block all signals which need to have special handling as described
+ * above, and all signals which have traps set.
+ * After each pipe execution, we extract any pending signals via sigtimedwait()
+ * and act on them.
+ *
+ * unsigned special_sig_mask: a mask of such "special" signals
+ * sigset_t blocked_set: current blocked signal set
+ *
+ * "trap - SIGxxx":
+ * clear bit in blocked_set unless it is also in special_sig_mask
+ * "trap 'cmd' SIGxxx":
+ * set bit in blocked_set (even if 'cmd' is '')
+ * after [v]fork, if we plan to be a shell:
+ * unblock signals with special interactive handling
+ * (child shell is not interactive),
+ * unset all traps except '' (note: regardless of child shell's type - {}, (), etc)
+ * after [v]fork, if we plan to exec:
+ * POSIX says fork clears pending signal mask in child - no need to clear it.
+ * Restore blocked signal set to one inherited by shell just prior to exec.
+ *
+ * Note: as a result, we do not use signal handlers much. The only uses
+ * are to count SIGCHLDs
+ * and to restore tty pgrp on signal-induced exit.
+ *
+ * Note 2 (compat):
+ * Standard says "When a subshell is entered, traps that are not being ignored
+ * are set to the default actions". bash interprets it so that traps which
+ * are set to '' (ignore) are NOT reset to defaults. We do the same.
+ *
+ * Problem: the above approach makes it unwieldy to catch signals while
+ * we are in read builtin, or while we read commands from stdin:
+ * masked signals are not visible!
+ *
+ * New implementation
+ * ==================
+ * We record each signal we are interested in by installing signal handler
+ * for them - a bit like emulating kernel pending signal mask in userspace.
+ * We are interested in: signals which need to have special handling
+ * as described above, and all signals which have traps set.
+ * Signals are recorded in pending_set.
+ * After each pipe execution, we extract any pending signals
+ * and act on them.
+ *
+ * unsigned special_sig_mask: a mask of shell-special signals.
+ * unsigned fatal_sig_mask: a mask of signals on which we restore tty pgrp.
+ * char *traps[sig] if trap for sig is set (even if it's '').
+ * sigset_t pending_set: set of sigs we received.
+ *
+ * "trap - SIGxxx":
+ * if sig is in special_sig_mask, set handler back to:
+ * record_pending_signo, or to IGN if it's a tty stop signal
+ * if sig is in fatal_sig_mask, set handler back to sigexit.
+ * else: set handler back to SIG_DFL
+ * "trap 'cmd' SIGxxx":
+ * set handler to record_pending_signo.
+ * "trap '' SIGxxx":
+ * set handler to SIG_IGN.
+ * after [v]fork, if we plan to be a shell:
+ * set signals with special interactive handling to SIG_DFL
+ * (because child shell is not interactive),
+ * unset all traps except '' (note: regardless of child shell's type - {}, (), etc)
+ * after [v]fork, if we plan to exec:
+ * POSIX says fork clears pending signal mask in child - no need to clear it.
+ *
+ * To make wait builtin interruptible, we handle SIGCHLD as special signal,
+ * otherwise (if we leave it SIG_DFL) sigsuspend in wait builtin will not wake up on it.
+ *
+ * Note (compat):
+ * Standard says "When a subshell is entered, traps that are not being ignored
+ * are set to the default actions". bash interprets it so that traps which
+ * are set to '' (ignore) are NOT reset to defaults. We do the same.
+ */
+enum {
+ SPECIAL_INTERACTIVE_SIGS = 0
+ | (1 << SIGTERM)
+ | (1 << SIGINT)
+ | (1 << SIGHUP)
+ ,
+ SPECIAL_JOBSTOP_SIGS = 0
+#if ENABLE_HUSH_JOB
+ | (1 << SIGTTIN)
+ | (1 << SIGTTOU)
+ | (1 << SIGTSTP)
+#endif
+ ,
+};
+
+static void record_pending_signo(int sig)
+{
+ sigaddset(&G.pending_set, sig);
+#if ENABLE_FEATURE_EDITING
+ if (sig != SIGCHLD
+ || (G_traps && G_traps[SIGCHLD] && G_traps[SIGCHLD][0])
+ /* ^^^ if SIGCHLD, interrupt line reading only if it has a trap */
+ ) {
+ bb_got_signal = sig; /* for read_line_input: "we got a signal" */
+ }
+#endif
+#if ENABLE_HUSH_FAST
+ if (sig == SIGCHLD) {
+ G.count_SIGCHLD++;
+//bb_error_msg("[%d] SIGCHLD_handler: G.count_SIGCHLD:%d G.handled_SIGCHLD:%d", getpid(), G.count_SIGCHLD, G.handled_SIGCHLD);
+ }
+#endif
+}
+
+static sighandler_t install_sighandler(int sig, sighandler_t handler)
+{
+ struct sigaction old_sa;
+
+ /* We could use signal() to install handlers... almost:
+ * except that we need to mask ALL signals while handlers run.
+ * I saw signal nesting in strace, race window isn't small.
+ * SA_RESTART is also needed, but in Linux, signal()
+ * sets SA_RESTART too.
+ */
+ /* memset(&G.sa, 0, sizeof(G.sa)); - already done */
+ /* sigfillset(&G.sa.sa_mask); - already done */
+ /* G.sa.sa_flags = SA_RESTART; - already done */
+ G.sa.sa_handler = handler;
+ sigaction(sig, &G.sa, &old_sa);
+ return old_sa.sa_handler;
+}
+#endif /* !__U_BOOT__ */
+
+#ifndef __U_BOOT__
+static void hush_exit(int exitcode) NORETURN;
+
+static void restore_ttypgrp_and__exit(void) NORETURN;
+static void restore_ttypgrp_and__exit(void)
+{
+ /* xfunc has failed! die die die */
+ /* no EXIT traps, this is an escape hatch! */
+ G.exiting = 1;
+ hush_exit(xfunc_error_retval);
+}
+
+#if ENABLE_HUSH_JOB
+
+/* Needed only on some libc:
+ * It was observed that on exit(), fgetc'ed buffered data
+ * gets "unwound" via lseek(fd, -NUM, SEEK_CUR).
+ * With the net effect that even after fork(), not vfork(),
+ * exit() in NOEXECed applet in "sh SCRIPT":
+ * noexec_applet_here
+ * echo END_OF_SCRIPT
+ * lseeks fd in input FILE object from EOF to "e" in "echo END_OF_SCRIPT".
+ * This makes "echo END_OF_SCRIPT" executed twice.
+ * Similar problems can be seen with msg_and_die_if_script() -> xfunc_die()
+ * and in `cmd` handling.
+ * If set as die_func(), this makes xfunc_die() exit via _exit(), not exit():
+ */
+static void fflush_and__exit(void) NORETURN;
+static void fflush_and__exit(void)
+{
+ fflush_all();
+ _exit(xfunc_error_retval);
+}
+
+/* After [v]fork, in child: do not restore tty pgrp on xfunc death */
+# define disable_restore_tty_pgrp_on_exit() (die_func = fflush_and__exit)
+/* After [v]fork, in parent: restore tty pgrp on xfunc death */
+# define enable_restore_tty_pgrp_on_exit() (die_func = restore_ttypgrp_and__exit)
+
+/* Restores tty foreground process group, and exits.
+ * May be called as signal handler for fatal signal
+ * (will resend signal to itself, producing correct exit state)
+ * or called directly with -EXITCODE.
+ * We also call it if xfunc is exiting.
+ */
+static void sigexit(int sig) NORETURN;
+static void sigexit(int sig)
+{
+ /* Careful: we can end up here after [v]fork. Do not restore
+ * tty pgrp then, only top-level shell process does that */
+ if (G_saved_tty_pgrp && getpid() == G.root_pid) {
+ /* Disable all signals: job control, SIGPIPE, etc.
+ * Mostly paranoid measure, to prevent infinite SIGTTOU.
+ */
+ sigprocmask_allsigs(SIG_BLOCK);
+ tcsetpgrp(G_interactive_fd, G_saved_tty_pgrp);
+ }
+
+ /* Not a signal, just exit */
+ if (sig <= 0)
+ _exit(- sig);
+
+ kill_myself_with_sig(sig); /* does not return */
+}
+#else
+
+# define disable_restore_tty_pgrp_on_exit() ((void)0)
+# define enable_restore_tty_pgrp_on_exit() ((void)0)
+
+#endif
+#endif /* !__U_BOOT__ */
+
+#ifndef __U_BOOT__
+static sighandler_t pick_sighandler(unsigned sig)
+{
+ sighandler_t handler = SIG_DFL;
+ if (sig < sizeof(unsigned)*8) {
+ unsigned sigmask = (1 << sig);
+
+#if ENABLE_HUSH_JOB
+ /* is sig fatal? */
+ if (G_fatal_sig_mask & sigmask)
+ handler = sigexit;
+ else
+#endif
+ /* sig has special handling? */
+ if (G.special_sig_mask & sigmask) {
+ handler = record_pending_signo;
+ /* TTIN/TTOU/TSTP can't be set to record_pending_signo
+ * in order to ignore them: they will be raised
+ * in an endless loop when we try to do some
+ * terminal ioctls! We do have to _ignore_ these.
+ */
+ if (SPECIAL_JOBSTOP_SIGS & sigmask)
+ handler = SIG_IGN;
+ }
+ }
+ return handler;
+}
+#endif /* !__U_BOOT__ */
+
+#ifndef __U_BOOT__
+/* Restores tty foreground process group, and exits. */
+static void hush_exit(int exitcode)
+{
+#if ENABLE_FEATURE_EDITING_SAVE_ON_EXIT
+ save_history(G.line_input_state); /* may be NULL */
+#endif
+
+ fflush_all();
+ if (G.exiting <= 0 && G_traps && G_traps[0] && G_traps[0][0]) {
+ char *argv[3];
+ /* argv[0] is unused */
+ argv[1] = xstrdup(G_traps[0]); /* copy, since EXIT trap handler may modify G_traps[0] */
+ argv[2] = NULL;
+ G.exiting = 1; /* prevent EXIT trap recursion */
+ /* Note: G_traps[0] is not cleared!
+ * "trap" will still show it, if executed
+ * in the handler */
+ builtin_eval(argv);
+ }
+
+#if ENABLE_FEATURE_CLEAN_UP
+ {
+ struct variable *cur_var;
+ if (G.cwd != bb_msg_unknown)
+ free((char*)G.cwd);
+ cur_var = G.top_var;
+ while (cur_var) {
+ struct variable *tmp = cur_var;
+ if (!cur_var->max_len)
+ free(cur_var->varstr);
+ cur_var = cur_var->next;
+ free(tmp);
+ }
+ }
+#endif
+
+ fflush_all();
+#if ENABLE_HUSH_JOB
+ sigexit(- (exitcode & 0xff));
+#else
+ _exit(exitcode);
+#endif
+}
+
+//TODO: return a mask of ALL handled sigs?
+static int check_and_run_traps(void)
+{
+ int last_sig = 0;
+
+ while (1) {
+ int sig;
+
+ if (sigisemptyset(&G.pending_set))
+ break;
+ sig = 0;
+ do {
+ sig++;
+ if (sigismember(&G.pending_set, sig)) {
+ sigdelset(&G.pending_set, sig);
+ goto got_sig;
+ }
+ } while (sig < NSIG);
+ break;
+ got_sig:
+#if ENABLE_HUSH_TRAP
+ if (G_traps && G_traps[sig]) {
+ debug_printf_exec("%s: sig:%d handler:'%s'\n", __func__, sig, G.traps[sig]);
+ if (G_traps[sig][0]) {
+ /* We have user-defined handler */
+ smalluint save_rcode;
+ int save_pre;
+ char *argv[3];
+ /* argv[0] is unused */
+ argv[1] = xstrdup(G_traps[sig]);
+ /* why strdup? trap can modify itself: trap 'trap "echo oops" INT' INT */
+ argv[2] = NULL;
+ save_pre = G.pre_trap_exitcode;
+ G.pre_trap_exitcode = save_rcode = G.last_exitcode;
+ builtin_eval(argv);
+ free(argv[1]);
+ G.pre_trap_exitcode = save_pre;
+ G.last_exitcode = save_rcode;
+# if ENABLE_HUSH_FUNCTIONS
+ if (G.return_exitcode >= 0) {
+ debug_printf_exec("trap exitcode:%d\n", G.return_exitcode);
+ G.last_exitcode = G.return_exitcode;
+ }
+# endif
+ last_sig = sig;
+ } /* else: "" trap, ignoring signal */
+ continue;
+ }
+#endif
+ /* not a trap: special action */
+ switch (sig) {
+ case SIGINT:
+ debug_printf_exec("%s: sig:%d default SIGINT handler\n", __func__, sig);
+ G.flag_SIGINT = 1;
+ last_sig = sig;
+ break;
+#if ENABLE_HUSH_JOB
+ case SIGHUP: {
+ /* if (G_interactive_fd) - no need to check, the handler
+ * is only installed if we *are* interactive */
+ {
+ /* bash compat: "Before exiting, an interactive
+ * shell resends the SIGHUP to all jobs, running
+ * or stopped. Stopped jobs are sent SIGCONT
+ * to ensure that they receive the SIGHUP."
+ */
+ struct pipe *job;
+ debug_printf_exec("%s: sig:%d default SIGHUP handler\n", __func__, sig);
+ /* bash is observed to signal whole process groups,
+ * not individual processes */
+ for (job = G.job_list; job; job = job->next) {
+ if (job->pgrp <= 0)
+ continue;
+ debug_printf_exec("HUPing pgrp %d\n", job->pgrp);
+ if (kill(- job->pgrp, SIGHUP) == 0)
+ kill(- job->pgrp, SIGCONT);
+ }
+ }
+ /* this restores tty pgrp, then kills us with SIGHUP */
+ sigexit(SIGHUP);
+ }
+#endif
+#if ENABLE_HUSH_FAST
+ case SIGCHLD:
+ debug_printf_exec("%s: sig:%d default SIGCHLD handler\n", __func__, sig);
+ G.count_SIGCHLD++;
+//bb_error_msg("[%d] check_and_run_traps: G.count_SIGCHLD:%d G.handled_SIGCHLD:%d", getpid(), G.count_SIGCHLD, G.handled_SIGCHLD);
+ /* Note:
+ * We don't do 'last_sig = sig' here -> NOT returning this sig.
+ * This simplifies wait builtin a bit.
+ */
+ break;
+#endif
+ default: /* ignored: */
+ debug_printf_exec("%s: sig:%d default handling is to ignore\n", __func__, sig);
+ /* SIGTERM, SIGQUIT, SIGTTIN, SIGTTOU, SIGTSTP */
+ /* Note:
+ * We don't do 'last_sig = sig' here -> NOT returning this sig.
+ * Example: wait is not interrupted by TERM
+ * in interactive shell, because TERM is ignored.
+ */
+ break;
+ }
+ }
+ return last_sig;
+}
+
+
+static const char *get_cwd(int force)
+{
+ if (force || G.cwd == NULL) {
+ /* xrealloc_getcwd_or_warn(arg) calls free(arg),
+ * we must not try to free(bb_msg_unknown) */
+ if (G.cwd == bb_msg_unknown)
+ G.cwd = NULL;
+ G.cwd = xrealloc_getcwd_or_warn((char *)G.cwd);
+ if (!G.cwd)
+ G.cwd = bb_msg_unknown;
+ }
+ return G.cwd;
+}
+
+#endif /* !__U_BOOT__ */
+
+/*
+ * Shell and environment variable support
+ */
+static struct variable **get_ptr_to_local_var(const char *name)
+{
+ struct variable **pp;
+ struct variable *cur;
+
+ pp = &G.top_var;
+ while ((cur = *pp) != NULL) {
+ if (varcmp(cur->varstr, name) == 0)
+ return pp;
+ pp = &cur->next;
+ }
+ return NULL;
+}
+
+static const char* FAST_FUNC get_local_var_value(const char *name)
+{
+ struct variable **vpp;
+
+ if (G.expanded_assignments) {
+ char **cpp = G.expanded_assignments;
+ while (*cpp) {
+ char *cp = *cpp;
+ if (varcmp(cp, name) == 0)
+ return strchr(cp, '=') + 1;
+ cpp++;
+ }
+ }
+
+ vpp = get_ptr_to_local_var(name);
+ if (vpp)
+ return strchr((*vpp)->varstr, '=') + 1;
+
+#ifndef __U_BOOT__
+ if (strcmp(name, "PPID") == 0)
+ return utoa(G.root_ppid);
+#endif /* !__U_BOOT__ */
+ // bash compat: UID? EUID?
+#if ENABLE_HUSH_RANDOM_SUPPORT
+ if (strcmp(name, "RANDOM") == 0)
+ return utoa(next_random(&G.random_gen));
+#endif
+#if ENABLE_HUSH_LINENO_VAR
+ if (strcmp(name, "LINENO") == 0)
+ return utoa(G.execute_lineno);
+#endif
+#if BASH_EPOCH_VARS
+ {
+ const char *fmt = NULL;
+ if (strcmp(name, "EPOCHSECONDS") == 0)
+ fmt = "%llu";
+ else if (strcmp(name, "EPOCHREALTIME") == 0)
+ fmt = "%llu.%06u";
+ if (fmt) {
+ struct timeval tv;
+ xgettimeofday(&tv);
+ sprintf(G.epoch_buf, fmt, (unsigned long long)tv.tv_sec,
+ (unsigned)tv.tv_usec);
+ return G.epoch_buf;
+ }
+ }
+#endif
+ return NULL;
+}
+
+#ifndef __U_BOOT__
+#if ENABLE_HUSH_GETOPTS
+static void handle_changed_special_names(const char *name)
+{
+ if (varcmp(name, "OPTIND") == 0) {
+ G.getopt_count = 0;
+ return;
+ }
+}
+#else
+/* Do not even bother evaluating arguments */
+# define handle_changed_special_names(...) ((void)0)
+#endif
+#else /* __U_BOOT__ */
+/* Do not even bother evaluating arguments */
+# define handle_changed_special_names(...) ((void)0)
+#endif /* __U_BOOT__ */
+
+/* str holds "NAME=VAL" and is expected to be malloced.
+ * We take ownership of it.
+ */
+#ifndef __U_BOOT__
+#define SETFLAG_EXPORT (1 << 0)
+#define SETFLAG_UNEXPORT (1 << 1)
+#define SETFLAG_MAKE_RO (1 << 2)
+#endif /* !__U_BOOT__ */
+#define SETFLAG_VARLVL_SHIFT 3
+#ifndef __U_BOOT__
+static int set_local_var(char *str, unsigned flags)
+#else /* __U_BOOT__ */
+int set_local_var_modern(char *str, int flags)
+#endif /* __U_BOOT__ */
+{
+ struct variable **cur_pp;
+ struct variable *cur;
+ char *free_me = NULL;
+ char *eq_sign;
+ int name_len;
+ int retval;
+#ifndef __U_BOOT__
+ unsigned local_lvl = (flags >> SETFLAG_VARLVL_SHIFT);
+#endif /* !__U_BOOT__ */
+
+ eq_sign = strchr(str, '=');
+ if (HUSH_DEBUG && !eq_sign)
+ bb_simple_error_msg_and_die("BUG in setvar");
+
+ name_len = eq_sign - str + 1; /* including '=' */
+ cur_pp = &G.top_var;
+ while ((cur = *cur_pp) != NULL) {
+ if (strncmp(cur->varstr, str, name_len) != 0) {
+ cur_pp = &cur->next;
+ continue;
+ }
+
+#ifndef __U_BOOT__
+ /* We found an existing var with this name */
+ if (cur->flg_read_only) {
+ bb_error_msg("%s: readonly variable", str);
+ free(str);
+//NOTE: in bash, assignment in "export READONLY_VAR=Z" fails, and sets $?=1,
+//but export per se succeeds (does put the var in env). We don't mimic that.
+ return -1;
+ }
+ if (flags & SETFLAG_UNEXPORT) { // && cur->flg_export ?
+ debug_printf_env("%s: unsetenv '%s'\n", __func__, str);
+ *eq_sign = '\0';
+ unsetenv(str);
+ *eq_sign = '=';
+ }
+ if (cur->var_nest_level < local_lvl) {
+ /* bash 3.2.33(1) and exported vars:
+ * # export z=z
+ * # f() { local z=a; env | grep ^z; }
+ * # f
+ * z=a
+ * # env | grep ^z
+ * z=z
+ */
+ if (cur->flg_export)
+ flags |= SETFLAG_EXPORT;
+ /* New variable is local ("local VAR=VAL" or
+ * "VAR=VAL cmd")
+ * and existing one is global, or local
+ * on a lower level that new one.
+ * Remove it from global variable list:
+ */
+ *cur_pp = cur->next;
+ if (G.shadowed_vars_pp) {
+ /* Save in "shadowed" list */
+ debug_printf_env("shadowing %s'%s'/%u by '%s'/%u\n",
+ cur->flg_export ? "exported " : "",
+ cur->varstr, cur->var_nest_level, str, local_lvl
+ );
+ cur->next = *G.shadowed_vars_pp;
+ *G.shadowed_vars_pp = cur;
+ } else {
+ /* Came from pseudo_exec_argv(), no need to save: delete it */
+ debug_printf_env("shadow-deleting %s'%s'/%u by '%s'/%u\n",
+ cur->flg_export ? "exported " : "",
+ cur->varstr, cur->var_nest_level, str, local_lvl
+ );
+ if (cur->max_len == 0) /* allocated "VAR=VAL"? */
+ free_me = cur->varstr; /* then free it later */
+ free(cur);
+ }
+ break;
+ }
+#endif /* !__U_BOOT__ */
+
+ if (strcmp(cur->varstr + name_len, eq_sign + 1) == 0) {
+ debug_printf_env("assignement '%s' does not change anything\n", str);
+ free_and_exp:
+ free(str);
+ goto exp;
+ }
+
+ /* Replace the value in the found "struct variable" */
+ if (cur->max_len != 0) {
+ if (cur->max_len >= strnlen(str, cur->max_len + 1)) {
+ /* This one is from startup env, reuse space */
+ debug_printf_env("reusing startup env for '%s'\n", str);
+ strcpy(cur->varstr, str);
+ goto free_and_exp;
+ }
+ /* Can't reuse */
+ cur->max_len = 0;
+ goto set_str_and_exp;
+ }
+ /* max_len == 0 signifies "malloced" var, which we can
+ * (and have to) free. But we can't free(cur->varstr) here:
+ * if cur->flg_export is 1, it is in the environment.
+ * We should either unsetenv+free, or wait until putenv,
+ * then putenv(new)+free(old).
+ */
+ free_me = cur->varstr;
+ goto set_str_and_exp;
+ }
+
+ /* Not found or shadowed - create new variable struct */
+#ifndef __U_BOOT__
+ debug_printf_env("%s: alloc new var '%s'/%u\n", __func__, str, local_lvl);
+#else /* __U_BOOT__ */
+ debug_printf_env("%s: alloc new var '%s'\n", __func__, str);
+#endif /* __U_BOOT__ */
+ cur = xzalloc(sizeof(*cur));
+#ifndef __U_BOOT__
+ cur->var_nest_level = local_lvl;
+#endif /* !__U_BOOT__ */
+ cur->next = *cur_pp;
+ *cur_pp = cur;
+
+ set_str_and_exp:
+ cur->varstr = str;
+ exp:
+#ifndef __U_BOOT__
+#if !BB_MMU || ENABLE_HUSH_READONLY
+ if (flags & SETFLAG_MAKE_RO) {
+ cur->flg_read_only = 1;
+ }
+#endif
+ if (flags & SETFLAG_EXPORT)
+ cur->flg_export = 1;
+#endif /* !__U_BOOT__ */
+ retval = 0;
+#ifndef __U_BOOT__
+ if (cur->flg_export) {
+ if (flags & SETFLAG_UNEXPORT) {
+ cur->flg_export = 0;
+ /* unsetenv was already done */
+ } else {
+ debug_printf_env("%s: putenv '%s'/%u\n", __func__, cur->varstr, cur->var_nest_level);
+ retval = putenv(cur->varstr);
+ /* fall through to "free(free_me)" -
+ * only now we can free old exported malloced string
+ */
+ }
+ }
+#endif /* !__U_BOOT__ */
+ free(free_me);
+
+ handle_changed_special_names(cur->varstr);
+
+ return retval;
+}
+
+#ifndef __U_BOOT__
+static int set_local_var0(char *str)
+{
+ return set_local_var(str, 0);
+}
+
+static void FAST_FUNC set_local_var_from_halves(const char *name, const char *val)
+{
+ char *var = xasprintf("%s=%s", name, val);
+ set_local_var0(var);
+}
+
+/* Used at startup and after each cd */
+static void set_pwd_var(unsigned flag)
+{
+ set_local_var(xasprintf("PWD=%s", get_cwd(/*force:*/ 1)), flag);
+}
+#endif /* !__U_BOOT__ */
+
+#if ENABLE_HUSH_UNSET || ENABLE_HUSH_GETOPTS
+static int unset_local_var(const char *name)
+{
+ struct variable *cur;
+ struct variable **cur_pp;
+
+ cur_pp = &G.top_var;
+ while ((cur = *cur_pp) != NULL) {
+ if (varcmp(cur->varstr, name) == 0) {
+ if (cur->flg_read_only) {
+ bb_error_msg("%s: readonly variable", name);
+ return EXIT_FAILURE;
+ }
+
+ *cur_pp = cur->next;
+ debug_printf_env("%s: unsetenv '%s'\n", __func__, cur->varstr);
+ bb_unsetenv(cur->varstr);
+ if (!cur->max_len)
+ free(cur->varstr);
+ free(cur);
+
+ break;
+ }
+ cur_pp = &cur->next;
+ }
+
+ /* Handle "unset LINENO" et al even if did not find the variable to unset */
+ handle_changed_special_names(name);
+
+ return EXIT_SUCCESS;
+}
+#endif
+
+
+#ifndef __U_BOOT__
+/*
+ * Helpers for "var1=val1 var2=val2 cmd" feature
+ */
+static void add_vars(struct variable *var)
+{
+ struct variable *next;
+
+ while (var) {
+ next = var->next;
+ var->next = G.top_var;
+ G.top_var = var;
+ if (var->flg_export) {
+ debug_printf_env("%s: restoring exported '%s'/%u\n", __func__, var->varstr, var->var_nest_level);
+ putenv(var->varstr);
+ } else {
+ debug_printf_env("%s: restoring variable '%s'/%u\n", __func__, var->varstr, var->var_nest_level);
+ }
+ var = next;
+ }
+}
+
+/* We put strings[i] into variable table and possibly putenv them.
+ * If variable is read only, we can free the strings[i]
+ * which attempts to overwrite it.
+ * The strings[] vector itself is freed.
+ */
+static void set_vars_and_save_old(char **strings)
+{
+ char **s;
+
+ if (!strings)
+ return;
+
+ s = strings;
+ while (*s) {
+ struct variable *var_p;
+ struct variable **var_pp;
+ char *eq;
+
+ eq = strchr(*s, '=');
+ if (HUSH_DEBUG && !eq)
+ bb_simple_error_msg_and_die("BUG in varexp4");
+ var_pp = get_ptr_to_local_var(*s);
+ if (var_pp) {
+ var_p = *var_pp;
+ if (var_p->flg_read_only) {
+ char **p;
+ bb_error_msg("%s: readonly variable", *s);
+ /*
+ * "VAR=V BLTIN" unsets VARs after BLTIN completes.
+ * If VAR is readonly, leaving it in the list
+ * after asssignment error (msg above)
+ * causes doubled error message later, on unset.
+ */
+ debug_printf_env("removing/freeing '%s' element\n", *s);
+ free(*s);
+ p = s;
+ do { *p = p[1]; p++; } while (*p);
+ goto next;
+ }
+ /* below, set_local_var() with nest level will
+ * "shadow" (remove) this variable from
+ * global linked list.
+ */
+ }
+ debug_printf_env("%s: env override '%s'/%u\n", __func__, *s, G.var_nest_level);
+ set_local_var(*s, (G.var_nest_level << SETFLAG_VARLVL_SHIFT) | SETFLAG_EXPORT);
+ s++;
+ next: ;
+ }
+ free(strings);
+}
+
+
+/*
+ * Unicode helper
+ */
+static void reinit_unicode_for_hush(void)
+{
+ /* Unicode support should be activated even if LANG is set
+ * _during_ shell execution, not only if it was set when
+ * shell was started. Therefore, re-check LANG every time:
+ */
+ if (ENABLE_FEATURE_CHECK_UNICODE_IN_ENV
+ || ENABLE_UNICODE_USING_LOCALE
+ ) {
+ const char *s = get_local_var_value("LC_ALL");
+ if (!s) s = get_local_var_value("LC_CTYPE");
+ if (!s) s = get_local_var_value("LANG");
+ reinit_unicode(s);
+ }
+}
+
+#endif /* !__U_BOOT__ */
+/*
+ * in_str support (strings, and "strings" read from files).
+ */
+
+#if ENABLE_HUSH_INTERACTIVE
+#ifndef __U_BOOT__
+/* To test correct lineedit/interactive behavior, type from command line:
+ * echo $P\
+ * \
+ * AT\
+ * H\
+ * \
+ * It exercises a lot of corner cases.
+ */
+static const char *setup_prompt_string(void)
+{
+ const char *prompt_str;
+
+ debug_printf_prompt("%s promptmode:%d\n", __func__, G.promptmode);
+
+# if ENABLE_FEATURE_EDITING_FANCY_PROMPT
+ prompt_str = get_local_var_value(G.promptmode == 0 ? "PS1" : "PS2");
+ if (!prompt_str)
+ prompt_str = "";
+# else
+ prompt_str = "> "; /* if PS2, else... */
+ if (G.promptmode == 0) { /* PS1 */
+ /* No fancy prompts supported, (re)generate "CURDIR $ " by hand */
+ free(G.PS1);
+ /* bash uses $PWD value, even if it is set by user.
+ * It uses current dir only if PWD is unset.
+ * We always use current dir. */
+ prompt_str = G.PS1 = xasprintf("%s %c ", get_cwd(0), (geteuid() != 0) ? '$' : '#');
+ }
+# endif
+ debug_printf("prompt_str '%s'\n", prompt_str);
+ return prompt_str;
+}
+#endif /* !__U_BOOT__ */
+
+#ifndef __U_BOOT__
+static int get_user_input(struct in_str *i)
+#else /* __U_BOOT__ */
+static void get_user_input(struct in_str *i)
+#endif /* __U_BOOT__ */
+{
+#ifndef __U_BOOT__
+# if ENABLE_FEATURE_EDITING
+ /* In EDITING case, this function reads next input line,
+ * saves it in i->p, then returns 1st char of it.
+ */
+ int r;
+ const char *prompt_str;
+
+ prompt_str = setup_prompt_string();
+ for (;;) {
+ reinit_unicode_for_hush();
+ G.flag_SIGINT = 0;
+
+ bb_got_signal = 0;
+ if (!sigisemptyset(&G.pending_set)) {
+ /* Whoops, already got a signal, do not call read_line_input */
+ bb_got_signal = r = -1;
+ } else {
+ /* For shell, LI_INTERRUPTIBLE is set:
+ * read_line_input will abort on either
+ * getting EINTR in poll() and bb_got_signal became != 0,
+ * or if it sees bb_got_signal != 0
+ * (IOW: if signal arrives before poll() is reached).
+ * Interactive testcases:
+ * (while kill -INT $$; do sleep 1; done) &
+ * #^^^ prints ^C, prints prompt, repeats
+ * trap 'echo I' int; (while kill -INT $$; do sleep 1; done) &
+ * #^^^ prints ^C, prints "I", prints prompt, repeats
+ * trap 'echo T' term; (while kill $$; do sleep 1; done) &
+ * #^^^ prints "T", prints prompt, repeats
+ * #(bash 5.0.17 exits after first "T", looks like a bug)
+ */
+ r = read_line_input(G.line_input_state, prompt_str,
+ G.user_input_buf, CONFIG_FEATURE_EDITING_MAX_LEN-1
+ );
+ /* read_line_input intercepts ^C, "convert" it to SIGINT */
+ if (r == 0)
+ raise(SIGINT);
+ }
+ /* bash prints ^C (before running a trap, if any)
+ * both on keyboard ^C and on real SIGINT (non-kbd generated).
+ */
+ if (sigismember(&G.pending_set, SIGINT)) {
+ write(STDOUT_FILENO, "^C\n", 3);
+ G.last_exitcode = 128 | SIGINT;
+ }
+ check_and_run_traps();
+ if (r == 0) /* keyboard ^C? */
+ continue; /* go back, read another input line */
+ if (r > 0) /* normal input? (no ^C, no ^D, no signals) */
+ break;
+ if (!bb_got_signal) {
+ /* r < 0: ^D/EOF/error detected (but not signal) */
+ /* ^D on interactive input goes to next line before exiting: */
+ write(STDOUT_FILENO, "\n", 1);
+ i->p = NULL;
+ i->peek_buf[0] = r = EOF;
+ return r;
+ }
+ /* it was a signal: go back, read another input line */
+ }
+ i->p = G.user_input_buf;
+ return (unsigned char)*i->p++;
+# else
+ /* In !EDITING case, this function gets called for every char.
+ * Buffering happens deeper in the call chain, in hfgetc(i->file).
+ */
+ int r;
+
+ for (;;) {
+ G.flag_SIGINT = 0;
+ if (i->last_char == '\0' || i->last_char == '\n') {
+ const char *prompt_str = setup_prompt_string();
+ /* Why check_and_run_traps here? Try this interactively:
+ * $ trap 'echo INT' INT; (sleep 2; kill -INT $$) &
+ * $ <[enter], repeatedly...>
+ * Without check_and_run_traps, handler never runs.
+ */
+ check_and_run_traps();
+ fputs_stdout(prompt_str);
+ fflush_all();
+ }
+ r = hfgetc(i->file);
+ /* In !ENABLE_FEATURE_EDITING we don't use read_line_input,
+ * no ^C masking happens during fgetc, no special code for ^C:
+ * it generates SIGINT as usual.
+ */
+ check_and_run_traps();
+ if (r != '\0' && !G.flag_SIGINT)
+ break;
+ if (G.flag_SIGINT) {
+ /* ^C or SIGINT: repeat */
+ /* bash prints ^C even on real SIGINT (non-kbd generated) */
+ /* kernel prints "^C" itself, just print newline: */
+ write(STDOUT_FILENO, "\n", 1);
+ G.last_exitcode = 128 | SIGINT;
+ }
+ }
+ return r;
+# endif
+#else /* __U_BOOT__ */
+ int n;
+ int promptme;
+ static char the_command[CONFIG_SYS_CBSIZE + 1];
+
+ bootretry_reset_cmd_timeout();
+ promptme = 1;
+ n = u_boot_cli_readline(i);
+
+# ifdef CONFIG_BOOT_RETRY_TIME
+ if (n == -2) {
+ puts("\nTimeout waiting for command\n");
+# ifdef CONFIG_RESET_TO_RETRY
+ do_reset(NULL, 0, 0, NULL);
+# else
+# error "This currently only works with CONFIG_RESET_TO_RETRY enabled"
+# endif
+ }
+# endif
+ if (n == -1 ) {
+ G.flag_repeat = 0;
+ promptme = 0;
+ }
+ n = strlen(console_buffer);
+ console_buffer[n] = '\n';
+ console_buffer[n+1]= '\0';
+ if (had_ctrlc())
+ G.flag_repeat = 0;
+ clear_ctrlc();
+ G.do_repeat = 0;
+#ifndef __U_BOOT__
+ if (G.promptmode == 1) {
+#else /* __U_BOOT__ */
+ if (!G.promptmode) {
+#endif /* __U_BOOT__ */
+ if (console_buffer[0] == '\n'&& G.flag_repeat == 0) {
+ strcpy(the_command, console_buffer);
+ }
+ else {
+ if (console_buffer[0] != '\n') {
+ strcpy(the_command, console_buffer);
+ G.flag_repeat = 1;
+ }
+ else {
+ G.do_repeat = 1;
+ }
+ }
+ i->p = the_command;
+ }
+ else {
+ if (console_buffer[0] != '\n') {
+ if (strlen(the_command) + strlen(console_buffer)
+ < CONFIG_SYS_CBSIZE) {
+ n = strlen(the_command);
+#ifdef __U_BOOT__
+ /*
+ * To avoid writing to bad places, we check if
+ * n is greater than 0.
+ * This bug was found by Harald Seiler.
+ */
+ if (n > 0)
+ the_command[n-1] = ' ';
+ strcpy(&the_command[n], console_buffer);
+#else /* !__U_BOOT__ */
+ the_command[n-1] = ' ';
+ strcpy(&the_command[n], console_buffer);
+#endif /* !__U_BOOT__ */
+ }
+ else {
+ the_command[0] = '\n';
+ the_command[1] = '\0';
+ G.flag_repeat = 0;
+ }
+ }
+ if (promptme == 0) {
+ the_command[0] = '\n';
+ the_command[1] = '\0';
+ }
+ i->p = console_buffer;
+ }
+#endif /* __U_BOOT__ */
+}
+/* This is the magic location that prints prompts
+ * and gets data back from the user */
+static int fgetc_interactive(struct in_str *i)
+{
+ int ch;
+#ifndef __U_BOOT__
+ /* If it's interactive stdin, get new line. */
+ if (G_interactive_fd && i->file == G.HFILE_stdin) {
+#endif /* !__U_BOOT__ */
+#ifndef __U_BOOT__
+ /* Returns first char (or EOF), the rest is in i->p[] */
+ ch = get_user_input(i);
+#else /* __U_BOOT__ */
+ /* Avoid garbage value and make clang happy. */
+ ch = 0;
+ /*
+ * get_user_input() does not return anything when used in
+ * U-Boot.
+ * So, we need to take the read character from i->p[].
+ */
+ get_user_input(i);
+ if (i->p && *i->p) {
+ ch = *i->p++;
+ }
+#endif /* __U_BOOT__ */
+ G.promptmode = 1; /* PS2 */
+ debug_printf_prompt("%s promptmode=%d\n", __func__, G.promptmode);
+#ifndef __U_BOOT__
+ } else {
+ /* Not stdin: script file, sourced file, etc */
+ do ch = hfgetc(i->file); while (ch == '\0');
+ }
+#endif /* !__U_BOOT__ */
+ return ch;
+}
+#else /* !INTERACTIVE */
+#ifndef __U_BOOT__
+static ALWAYS_INLINE int fgetc_interactive(struct in_str *i)
+{
+ int ch;
+ do ch = hfgetc(i->file); while (ch == '\0');
+ return ch;
+}
+#endif /* !__U_BOOT__ */
+#endif /* !INTERACTIVE */
+
+static int i_getch(struct in_str *i)
+{
+ int ch;
+
+#ifndef __U_BOOT__
+ if (!i->file) {
+ /* string-based in_str */
+ ch = (unsigned char)*i->p;
+ if (ch != '\0') {
+ i->p++;
+ i->last_char = ch;
+#if ENABLE_HUSH_LINENO_VAR
+ if (ch == '\n') {
+ G.parse_lineno++;
+ debug_printf_parse("G.parse_lineno++ = %u\n", G.parse_lineno);
+ }
+#endif
+ return ch;
+ }
+ return EOF;
+ }
+
+#endif /* !__U_BOOT__ */
+ /* FILE-based in_str */
+
+#if ENABLE_FEATURE_EDITING
+ /* This can be stdin, check line editing char[] buffer */
+ if (i->p && *i->p != '\0') {
+ ch = (unsigned char)*i->p++;
+ goto out;
+#ifndef __U_BOOT__
+ }
+#else /* __U_BOOT__ */
+ /*
+ * There are two ways for command to be called:
+ * 1. The first one is when they are typed by the user.
+ * 2. The second one is through run_command() (NOTE command run
+ * internally calls run_command()).
+ *
+ * In the second case, we do not get input from the user, so once we
+ * get a '\0', it means we need to stop.
+ * NOTE G.run_command_flags is only set on run_command call stack, so
+ * we use this to know if we come from user input or run_command().
+ */
+ } else if (i->p && *i->p == '\0' && G.run_command_flags){
+ return EOF;
+ }
+#endif /* __U_BOOT__ */
+#endif
+#ifndef __U_BOOT__
+ /* peek_buf[] is an int array, not char. Can contain EOF. */
+ ch = i->peek_buf[0];
+ if (ch != 0) {
+ int ch2 = i->peek_buf[1];
+ i->peek_buf[0] = ch2;
+ if (ch2 == 0) /* very likely, avoid redundant write */
+ goto out;
+ i->peek_buf[1] = 0;
+ goto out;
+ }
+
+#endif /* !__U_BOOT__ */
+ ch = fgetc_interactive(i);
+ out:
+ debug_printf("file_get: got '%c' %d\n", ch, ch);
+ i->last_char = ch;
+#if ENABLE_HUSH_LINENO_VAR
+ if (ch == '\n') {
+ G.parse_lineno++;
+ debug_printf_parse("G.parse_lineno++ = %u\n", G.parse_lineno);
+ }
+#endif
+ return ch;
+}
+
+static int i_peek(struct in_str *i)
+{
+#ifndef __U_BOOT__
+ int ch;
+
+ if (!i->file) {
+ /* string-based in_str */
+ /* Doesn't report EOF on NUL. None of the callers care. */
+ return (unsigned char)*i->p;
+ }
+
+ /* FILE-based in_str */
+
+#if ENABLE_FEATURE_EDITING && ENABLE_HUSH_INTERACTIVE
+ /* This can be stdin, check line editing char[] buffer */
+ if (i->p && *i->p != '\0')
+ return (unsigned char)*i->p;
+#endif
+ /* peek_buf[] is an int array, not char. Can contain EOF. */
+ ch = i->peek_buf[0];
+ if (ch != 0)
+ return ch;
+
+ /* Need to get a new char */
+ ch = fgetc_interactive(i);
+ debug_printf("file_peek: got '%c' %d\n", ch, ch);
+
+ /* Save it by either rolling back line editing buffer, or in i->peek_buf[0] */
+#if ENABLE_FEATURE_EDITING && ENABLE_HUSH_INTERACTIVE
+ if (i->p) {
+ i->p -= 1;
+ return ch;
+ }
+#endif
+ i->peek_buf[0] = ch;
+ /*i->peek_buf[1] = 0; - already is */
+ return ch;
+#else /* __U_BOOT__ */
+ /* string-based in_str */
+ /* Doesn't report EOF on NUL. None of the callers care. */
+ return (unsigned char)*i->p;
+#endif /* __U_BOOT__ */
+}
+
+/* Only ever called if i_peek() was called, and did not return EOF.
+ * IOW: we know the previous peek saw an ordinary char, not EOF, not NUL,
+ * not end-of-line. Therefore we never need to read a new editing line here.
+ */
+static int i_peek2(struct in_str *i)
+{
+#ifndef __U_BOOT__
+ int ch;
+#endif /* !__U_BOOT__ */
+
+ /* There are two cases when i->p[] buffer exists.
+ * (1) it's a string in_str.
+ * (2) It's a file, and we have a saved line editing buffer.
+ * In both cases, we know that i->p[0] exists and not NUL, and
+ * the peek2 result is in i->p[1].
+ */
+ if (i->p)
+ return (unsigned char)i->p[1];
+
+#ifndef __U_BOOT__
+ /* Now we know it is a file-based in_str. */
+
+ /* peek_buf[] is an int array, not char. Can contain EOF. */
+ /* Is there 2nd char? */
+ ch = i->peek_buf[1];
+ if (ch == 0) {
+ /* We did not read it yet, get it now */
+ do ch = hfgetc(i->file); while (ch == '\0');
+ i->peek_buf[1] = ch;
+ }
+
+ debug_printf("file_peek2: got '%c' %d\n", ch, ch);
+ return ch;
+#else
+ return 0;
+#endif /* __U_BOOT__ */
+}
+
+static int i_getch_and_eat_bkslash_nl(struct in_str *input)
+{
+ for (;;) {
+ int ch, ch2;
+
+ ch = i_getch(input);
+ if (ch != '\\')
+ return ch;
+ ch2 = i_peek(input);
+ if (ch2 != '\n')
+ return ch;
+ /* backslash+newline, skip it */
+ i_getch(input);
+ }
+}
+
+/* Note: this function _eats_ \<newline> pairs, safe to use plain
+ * i_getch() after it instead of i_getch_and_eat_bkslash_nl().
+ */
+static int i_peek_and_eat_bkslash_nl(struct in_str *input)
+{
+ for (;;) {
+ int ch, ch2;
+
+ ch = i_peek(input);
+ if (ch != '\\')
+ return ch;
+ ch2 = i_peek2(input);
+ if (ch2 != '\n')
+ return ch;
+ /* backslash+newline, skip it */
+ i_getch(input);
+ i_getch(input);
+ }
+}
+
+#ifndef __U_BOOT__
+static void setup_file_in_str(struct in_str *i, HFILE *fp)
+#else /* __U_BOOT__ */
+static void setup_file_in_str(struct in_str *i)
+#endif /* __U_BOOT__ */
+{
+ memset(i, 0, sizeof(*i));
+#ifndef __U_BOOT__
+ i->file = fp;
+ /* i->p = NULL; */
+#endif /* !__U_BOOT__ */
+}
+
+static void setup_string_in_str(struct in_str *i, const char *s)
+{
+ memset(i, 0, sizeof(*i));
+ /*i->file = NULL */;
+ i->p = s;
+}
+
+
+/*
+ * o_string support
+ */
+#define B_CHUNK (32 * sizeof(char*))
+
+static void o_reset_to_empty_unquoted(o_string *o)
+{
+ o->length = 0;
+ o->has_quoted_part = 0;
+ if (o->data)
+ o->data[0] = '\0';
+}
+
+static void o_free_and_set_NULL(o_string *o)
+{
+ free(o->data);
+ memset(o, 0, sizeof(*o));
+}
+
+static ALWAYS_INLINE void o_free(o_string *o)
+{
+ free(o->data);
+}
+
+static void o_grow_by(o_string *o, int len)
+{
+ if (o->length + len > o->maxlen) {
+ o->maxlen += (2 * len) | (B_CHUNK-1);
+ o->data = xrealloc(o->data, 1 + o->maxlen);
+ }
+}
+
+static void o_addchr(o_string *o, int ch)
+{
+ debug_printf("o_addchr: '%c' o->length=%d o=%p\n", ch, o->length, o);
+ if (o->length < o->maxlen) {
+ /* likely. avoid o_grow_by() call */
+ add:
+ o->data[o->length] = ch;
+ o->length++;
+ o->data[o->length] = '\0';
+ return;
+ }
+ o_grow_by(o, 1);
+ goto add;
+}
+
+#if 0
+/* Valid only if we know o_string is not empty */
+static void o_delchr(o_string *o)
+{
+ o->length--;
+ o->data[o->length] = '\0';
+}
+#endif
+
+static void o_addblock(o_string *o, const char *str, int len)
+{
+ o_grow_by(o, len);
+ ((char*)mempcpy(&o->data[o->length], str, len))[0] = '\0';
+ o->length += len;
+}
+
+static void o_addstr(o_string *o, const char *str)
+{
+ o_addblock(o, str, strlen(str));
+}
+
+#ifndef __U_BOOT__
+static void o_addstr_with_NUL(o_string *o, const char *str)
+{
+ o_addblock(o, str, strlen(str) + 1);
+}
+#endif /* !__U_BOOT__ */
+
+#if !BB_MMU
+static void nommu_addchr(o_string *o, int ch)
+{
+ if (o)
+ o_addchr(o, ch);
+}
+#else
+# define nommu_addchr(o, str) ((void)0)
+#endif
+
+#ifndef __U_BOOT__
+#if ENABLE_HUSH_MODE_X
+static void x_mode_addchr(int ch)
+{
+ o_addchr(&G.x_mode_buf, ch);
+}
+static void x_mode_addstr(const char *str)
+{
+ o_addstr(&G.x_mode_buf, str);
+}
+static void x_mode_addblock(const char *str, int len)
+{
+ o_addblock(&G.x_mode_buf, str, len);
+}
+static void x_mode_prefix(void)
+{
+ int n = G.x_mode_depth;
+ do x_mode_addchr('+'); while (--n >= 0);
+}
+static void x_mode_flush(void)
+{
+ int len = G.x_mode_buf.length;
+ if (len <= 0)
+ return;
+ if (G.x_mode_fd > 0) {
+ G.x_mode_buf.data[len] = '\n';
+ full_write(G.x_mode_fd, G.x_mode_buf.data, len + 1);
+ }
+ G.x_mode_buf.length = 0;
+}
+#endif
+#endif /* !__U_BOOT__ */
+
+/*
+ * HUSH_BRACE_EXPANSION code needs corresponding quoting on variable expansion side.
+ * Currently, "v='{q,w}'; echo $v" erroneously expands braces in $v.
+ * Apparently, on unquoted $v bash still does globbing
+ * ("v='*.txt'; echo $v" prints all .txt files),
+ * but NOT brace expansion! Thus, there should be TWO independent
+ * quoting mechanisms on $v expansion side: one protects
+ * $v from brace expansion, and other additionally protects "$v" against globbing.
+ * We have only second one.
+ */
+
+#if ENABLE_HUSH_BRACE_EXPANSION
+# define MAYBE_BRACES "{}"
+#else
+# define MAYBE_BRACES ""
+#endif
+
+/* My analysis of quoting semantics tells me that state information
+ * is associated with a destination, not a source.
+ */
+static void o_addqchr(o_string *o, int ch)
+{
+ int sz = 1;
+ /* '-' is included because of this case:
+ * >filename0 >filename1 >filename9; v='-'; echo filename[0"$v"9]
+ */
+ char *found = strchr("*?[-\\" MAYBE_BRACES, ch);
+ if (found)
+ sz++;
+ o_grow_by(o, sz);
+ if (found) {
+ o->data[o->length] = '\\';
+ o->length++;
+ }
+ o->data[o->length] = ch;
+ o->length++;
+ o->data[o->length] = '\0';
+}
+
+static void o_addQchr(o_string *o, int ch)
+{
+ int sz = 1;
+ if ((o->o_expflags & EXP_FLAG_ESC_GLOB_CHARS)
+ && strchr("*?[-\\" MAYBE_BRACES, ch)
+ ) {
+ sz++;
+ o->data[o->length] = '\\';
+ o->length++;
+ }
+ o_grow_by(o, sz);
+ o->data[o->length] = ch;
+ o->length++;
+ o->data[o->length] = '\0';
+}
+
+static void o_addqblock(o_string *o, const char *str, int len)
+{
+ while (len) {
+ char ch;
+ int sz;
+ int ordinary_cnt = strcspn(str, "*?[-\\" MAYBE_BRACES);
+ if (ordinary_cnt > len) /* paranoia */
+ ordinary_cnt = len;
+ o_addblock(o, str, ordinary_cnt);
+ if (ordinary_cnt == len)
+ return; /* NUL is already added by o_addblock */
+ str += ordinary_cnt;
+ len -= ordinary_cnt + 1; /* we are processing + 1 char below */
+
+ ch = *str++;
+ sz = 1;
+ if (ch) { /* it is necessarily one of "*?[-\\" MAYBE_BRACES */
+ sz++;
+ o->data[o->length] = '\\';
+ o->length++;
+ }
+ o_grow_by(o, sz);
+ o->data[o->length] = ch;
+ o->length++;
+ }
+ o->data[o->length] = '\0';
+}
+
+static void o_addQblock(o_string *o, const char *str, int len)
+{
+ if (!(o->o_expflags & EXP_FLAG_ESC_GLOB_CHARS)) {
+ o_addblock(o, str, len);
+ return;
+ }
+ o_addqblock(o, str, len);
+}
+
+static void o_addQstr(o_string *o, const char *str)
+{
+ o_addQblock(o, str, strlen(str));
+}
+
+/* A special kind of o_string for $VAR and `cmd` expansion.
+ * It contains char* list[] at the beginning, which is grown in 16 element
+ * increments. Actual string data starts at the next multiple of 16 * (char*).
+ * list[i] contains an INDEX (int!) into this string data.
+ * It means that if list[] needs to grow, data needs to be moved higher up
+ * but list[i]'s need not be modified.
+ * NB: remembering how many list[i]'s you have there is crucial.
+ * o_finalize_list() operation post-processes this structure - calculates
+ * and stores actual char* ptrs in list[]. Oh, it NULL terminates it as well.
+ */
+#if DEBUG_EXPAND || DEBUG_GLOB
+static void debug_print_list(const char *prefix, o_string *o, int n)
+{
+ char **list = (char**)o->data;
+ int string_start = ((n + 0xf) & ~0xf) * sizeof(list[0]);
+ int i = 0;
+
+ indent();
+ fdprintf(2, "%s: list:%p n:%d string_start:%d length:%d maxlen:%d glob:%d quoted:%d escape:%d\n",
+ prefix, list, n, string_start, o->length, o->maxlen,
+ !!(o->o_expflags & EXP_FLAG_GLOB),
+ o->has_quoted_part,
+ !!(o->o_expflags & EXP_FLAG_ESC_GLOB_CHARS));
+ while (i < n) {
+ indent();
+ fdprintf(2, " list[%d]=%d '%s' %p\n", i, (int)(uintptr_t)list[i],
+ o->data + (int)(uintptr_t)list[i] + string_start,
+ o->data + (int)(uintptr_t)list[i] + string_start);
+ i++;
+ }
+ if (n) {
+ const char *p = o->data + (int)(uintptr_t)list[n - 1] + string_start;
+ indent();
+#ifndef __U_BOOT__
+ fdprintf(2, " total_sz:%ld\n", (long)((p + strlen(p) + 1) - o->data));
+#else /* __U_BOOT__ */
+ printf(" total_sz:%ld\n", (long)((p + strlen(p) + 1) - o->data));
+#endif /* __U_BOOT__ */
+ }
+}
+#else
+# define debug_print_list(prefix, o, n) ((void)0)
+#endif
+
+/* n = o_save_ptr_helper(str, n) "starts new string" by storing an index value
+ * in list[n] so that it points past last stored byte so far.
+ * It returns n+1. */
+static int o_save_ptr_helper(o_string *o, int n)
+{
+ char **list = (char**)o->data;
+ int string_start;
+ int string_len;
+
+ if (!o->has_empty_slot) {
+ string_start = ((n + 0xf) & ~0xf) * sizeof(list[0]);
+ string_len = o->length - string_start;
+ if (!(n & 0xf)) { /* 0, 0x10, 0x20...? */
+ debug_printf_list("list[%d]=%d string_start=%d (growing)\n", n, string_len, string_start);
+ /* list[n] points to string_start, make space for 16 more pointers */
+ o->maxlen += 0x10 * sizeof(list[0]);
+ o->data = xrealloc(o->data, o->maxlen + 1);
+ list = (char**)o->data;
+ memmove(list + n + 0x10, list + n, string_len);
+ /*
+ * expand_on_ifs() has a "previous argv[] ends in IFS?"
+ * check. (grep for -prev-ifs-check-).
+ * Ensure that argv[-1][last] is not garbage
+ * but zero bytes, to save index check there.
+ */
+ list[n + 0x10 - 1] = 0;
+ o->length += 0x10 * sizeof(list[0]);
+ } else {
+ debug_printf_list("list[%d]=%d string_start=%d\n",
+ n, string_len, string_start);
+ }
+ } else {
+ /* We have empty slot at list[n], reuse without growth */
+ string_start = ((n+1 + 0xf) & ~0xf) * sizeof(list[0]); /* NB: n+1! */
+ string_len = o->length - string_start;
+ debug_printf_list("list[%d]=%d string_start=%d (empty slot)\n",
+ n, string_len, string_start);
+ o->has_empty_slot = 0;
+ }
+ o->has_quoted_part = 0;
+ list[n] = (char*)(uintptr_t)string_len;
+ return n + 1;
+}
+
+/* "What was our last o_save_ptr'ed position (byte offset relative o->data)?" */
+static int o_get_last_ptr(o_string *o, int n)
+{
+ char **list = (char**)o->data;
+ int string_start = ((n + 0xf) & ~0xf) * sizeof(list[0]);
+
+ return ((int)(uintptr_t)list[n-1]) + string_start;
+}
+
+/*
+ * Globbing routines.
+ *
+ * Most words in commands need to be globbed, even ones which are
+ * (single or double) quoted. This stems from the possiblity of
+ * constructs like "abc"* and 'abc'* - these should be globbed.
+ * Having a different code path for fully-quoted strings ("abc",
+ * 'abc') would only help performance-wise, but we still need
+ * code for partially-quoted strings.
+ *
+ * Unfortunately, if we want to match bash and ash behavior in all cases,
+ * the logic can't be "shell-syntax argument is first transformed
+ * to a string, then globbed, and if globbing does not match anything,
+ * it is used verbatim". Here are two examples where it fails:
+ *
+ * echo 'b\*'?
+ *
+ * The globbing can't be avoided (because of '?' at the end).
+ * The glob pattern is: b\\\*? - IOW, both \ and * are literals
+ * and are glob-escaped. If this does not match, bash/ash print b\*?
+ * - IOW: they "unbackslash" the glob pattern.
+ * Now, look at this:
+ *
+ * v='\\\*'; echo b$v?
+ *
+ * The glob pattern is the same here: b\\\*? - the unquoted $v expansion
+ * should be used as glob pattern with no changes. However, if glob
+ * does not match, bash/ash print b\\\*? - NOT THE SAME as first example!
+ *
+ * ash implements this by having an encoded representation of the word
+ * to glob, which IS NOT THE SAME as the glob pattern - it has more data.
+ * Glob pattern is derived from it. If glob fails, the decision what result
+ * should be is made using that encoded representation. Not glob pattern.
+ */
+
+#if ENABLE_HUSH_BRACE_EXPANSION
+/* There in a GNU extension, GLOB_BRACE, but it is not usable:
+ * first, it processes even {a} (no commas), second,
+ * I didn't manage to make it return strings when they don't match
+ * existing files. Need to re-implement it.
+ */
+
+/* Helper */
+static int glob_needed(const char *s)
+{
+ while (*s) {
+ if (*s == '\\') {
+ if (!s[1])
+ return 0;
+ s += 2;
+ continue;
+ }
+ if (*s == '*' || *s == '[' || *s == '?' || *s == '{')
+ return 1;
+ s++;
+ }
+ return 0;
+}
+/* Return pointer to next closing brace or to comma */
+static const char *next_brace_sub(const char *cp)
+{
+ unsigned depth = 0;
+ cp++;
+ while (*cp != '\0') {
+ if (*cp == '\\') {
+ if (*++cp == '\0')
+ break;
+ cp++;
+ continue;
+ }
+ if ((*cp == '}' && depth-- == 0) || (*cp == ',' && depth == 0))
+ break;
+ if (*cp++ == '{')
+ depth++;
+ }
+
+ return *cp != '\0' ? cp : NULL;
+}
+/* Recursive brace globber. Note: may garble pattern[]. */
+static int glob_brace(char *pattern, o_string *o, int n)
+{
+ char *new_pattern_buf;
+ const char *begin;
+ const char *next;
+ const char *rest;
+ const char *p;
+ size_t rest_len;
+
+ debug_printf_glob("glob_brace('%s')\n", pattern);
+
+ begin = pattern;
+ while (1) {
+ if (*begin == '\0')
+ goto simple_glob;
+ if (*begin == '{') {
+ /* Find the first sub-pattern and at the same time
+ * find the rest after the closing brace */
+ next = next_brace_sub(begin);
+ if (next == NULL) {
+ /* An illegal expression */
+ goto simple_glob;
+ }
+ if (*next == '}') {
+ /* "{abc}" with no commas - illegal
+ * brace expr, disregard and skip it */
+ begin = next + 1;
+ continue;
+ }
+ break;
+ }
+ if (*begin == '\\' && begin[1] != '\0')
+ begin++;
+ begin++;
+ }
+ debug_printf_glob("begin:%s\n", begin);
+ debug_printf_glob("next:%s\n", next);
+
+ /* Now find the end of the whole brace expression */
+ rest = next;
+ while (*rest != '}') {
+ rest = next_brace_sub(rest);
+ if (rest == NULL) {
+ /* An illegal expression */
+ goto simple_glob;
+ }
+ debug_printf_glob("rest:%s\n", rest);
+ }
+ rest_len = strlen(++rest) + 1;
+
+ /* We are sure the brace expression is well-formed */
+
+ /* Allocate working buffer large enough for our work */
+ new_pattern_buf = xmalloc(strlen(pattern));
+
+ /* We have a brace expression. BEGIN points to the opening {,
+ * NEXT points past the terminator of the first element, and REST
+ * points past the final }. We will accumulate result names from
+ * recursive runs for each brace alternative in the buffer using
+ * GLOB_APPEND. */
+
+ p = begin + 1;
+ while (1) {
+ /* Construct the new glob expression */
+ memcpy(
+ mempcpy(
+ mempcpy(new_pattern_buf,
+ /* We know the prefix for all sub-patterns */
+ pattern, begin - pattern),
+ p, next - p),
+ rest, rest_len);
+
+ /* Note: glob_brace() may garble new_pattern_buf[].
+ * That's why we re-copy prefix every time (1st memcpy above).
+ */
+ n = glob_brace(new_pattern_buf, o, n);
+ if (*next == '}') {
+ /* We saw the last entry */
+ break;
+ }
+ p = next + 1;
+ next = next_brace_sub(next);
+ }
+ free(new_pattern_buf);
+ return n;
+
+ simple_glob:
+ {
+ int gr;
+ glob_t globdata;
+
+ memset(&globdata, 0, sizeof(globdata));
+ gr = glob(pattern, 0, NULL, &globdata);
+ debug_printf_glob("glob('%s'):%d\n", pattern, gr);
+ if (gr != 0) {
+ if (gr == GLOB_NOMATCH) {
+ globfree(&globdata);
+ /* NB: garbles parameter */
+ unbackslash(pattern);
+ o_addstr_with_NUL(o, pattern);
+ debug_printf_glob("glob pattern '%s' is literal\n", pattern);
+ return o_save_ptr_helper(o, n);
+ }
+ if (gr == GLOB_NOSPACE)
+ bb_die_memory_exhausted();
+ /* GLOB_ABORTED? Only happens with GLOB_ERR flag,
+ * but we didn't specify it. Paranoia again. */
+ bb_error_msg_and_die("glob error %d on '%s'", gr, pattern);
+ }
+ if (globdata.gl_pathv && globdata.gl_pathv[0]) {
+ char **argv = globdata.gl_pathv;
+ while (1) {
+ o_addstr_with_NUL(o, *argv);
+ n = o_save_ptr_helper(o, n);
+ argv++;
+ if (!*argv)
+ break;
+ }
+ }
+ globfree(&globdata);
+ }
+ return n;
+}
+/* Performs globbing on last list[],
+ * saving each result as a new list[].
+ */
+static int perform_glob(o_string *o, int n)
+{
+ char *pattern, *copy;
+
+ debug_printf_glob("start perform_glob: n:%d o->data:%p\n", n, o->data);
+ if (!o->data)
+ return o_save_ptr_helper(o, n);
+ pattern = o->data + o_get_last_ptr(o, n);
+ debug_printf_glob("glob pattern '%s'\n", pattern);
+ if (!glob_needed(pattern)) {
+ /* unbackslash last string in o in place, fix length */
+ o->length = unbackslash(pattern) - o->data;
+ debug_printf_glob("glob pattern '%s' is literal\n", pattern);
+ return o_save_ptr_helper(o, n);
+ }
+
+ copy = xstrdup(pattern);
+ /* "forget" pattern in o */
+ o->length = pattern - o->data;
+ n = glob_brace(copy, o, n);
+ free(copy);
+ if (DEBUG_GLOB)
+ debug_print_list("perform_glob returning", o, n);
+ return n;
+}
+
+#else /* !HUSH_BRACE_EXPANSION */
+
+/* Helper */
+static int glob_needed(const char *s)
+{
+ while (*s) {
+ if (*s == '\\') {
+ if (!s[1])
+ return 0;
+ s += 2;
+ continue;
+ }
+ if (*s == '*' || *s == '[' || *s == '?')
+ return 1;
+ s++;
+ }
+ return 0;
+}
+/* Performs globbing on last list[],
+ * saving each result as a new list[].
+ */
+static int perform_glob(o_string *o, int n)
+{
+#ifndef __U_BOOT__
+ glob_t globdata;
+ int gr;
+#endif /* __U_BOOT__ */
+ char *pattern;
+
+ debug_printf_glob("start perform_glob: n:%d o->data:%p\n", n, o->data);
+ if (!o->data)
+ return o_save_ptr_helper(o, n);
+ pattern = o->data + o_get_last_ptr(o, n);
+ debug_printf_glob("glob pattern '%s'\n", pattern);
+ if (!glob_needed(pattern)) {
+#ifndef __U_BOOT__
+ literal:
+#endif /* __U_BOOT__ */
+ /* unbackslash last string in o in place, fix length */
+ o->length = unbackslash(pattern) - o->data;
+ debug_printf_glob("glob pattern '%s' is literal\n", pattern);
+ return o_save_ptr_helper(o, n);
+ }
+
+#ifndef __U_BOOT__
+ memset(&globdata, 0, sizeof(globdata));
+ /* Can't use GLOB_NOCHECK: it does not unescape the string.
+ * If we glob "*.\*" and don't find anything, we need
+ * to fall back to using literal "*.*", but GLOB_NOCHECK
+ * will return "*.\*"!
+ */
+ gr = glob(pattern, 0, NULL, &globdata);
+ debug_printf_glob("glob('%s'):%d\n", pattern, gr);
+ if (gr != 0) {
+ if (gr == GLOB_NOMATCH) {
+ globfree(&globdata);
+ goto literal;
+ }
+ if (gr == GLOB_NOSPACE)
+ bb_die_memory_exhausted();
+ /* GLOB_ABORTED? Only happens with GLOB_ERR flag,
+ * but we didn't specify it. Paranoia again. */
+ bb_error_msg_and_die("glob error %d on '%s'", gr, pattern);
+ }
+ if (globdata.gl_pathv && globdata.gl_pathv[0]) {
+ char **argv = globdata.gl_pathv;
+ /* "forget" pattern in o */
+ o->length = pattern - o->data;
+ while (1) {
+ o_addstr_with_NUL(o, *argv);
+ n = o_save_ptr_helper(o, n);
+ argv++;
+ if (!*argv)
+ break;
+ }
+ }
+ globfree(&globdata);
+ if (DEBUG_GLOB)
+ debug_print_list("perform_glob returning", o, n);
+ return n;
+#else /* __U_BOOT__ */
+ /*
+ * NOTE We only use perform glob to call unbackslash to remove backslash
+ * from string once expanded.
+ * So, it seems OK to return this if no previous return was done.
+ */
+ return o_save_ptr_helper(o, n);
+#endif /* __U_BOOT__ */
+}
+
+#endif /* !HUSH_BRACE_EXPANSION */
+
+/* If o->o_expflags & EXP_FLAG_GLOB, glob the string so far remembered.
+ * Otherwise, just finish current list[] and start new */
+static int o_save_ptr(o_string *o, int n)
+{
+ if (o->o_expflags & EXP_FLAG_GLOB) {
+ /* If o->has_empty_slot, list[n] was already globbed
+ * (if it was requested back then when it was filled)
+ * so don't do that again! */
+ if (!o->has_empty_slot)
+ return perform_glob(o, n); /* o_save_ptr_helper is inside */
+ }
+ return o_save_ptr_helper(o, n);
+}
+
+/* "Please convert list[n] to real char* ptrs, and NULL terminate it." */
+static char **o_finalize_list(o_string *o, int n)
+{
+ char **list;
+ int string_start;
+
+ if (DEBUG_EXPAND)
+ debug_print_list("finalized", o, n);
+ debug_printf_expand("finalized n:%d\n", n);
+ list = (char**)o->data;
+ string_start = ((n + 0xf) & ~0xf) * sizeof(list[0]);
+ list[--n] = NULL;
+ while (n) {
+ n--;
+ list[n] = o->data + (int)(uintptr_t)list[n] + string_start;
+ }
+ return list;
+}
+
+static void free_pipe_list(struct pipe *pi);
+
+/* Returns pi->next - next pipe in the list */
+static struct pipe *free_pipe(struct pipe *pi)
+{
+ struct pipe *next;
+ int i;
+
+#ifndef __U_BOOT__
+ debug_printf_clean("free_pipe (pid %d)\n", getpid());
+#endif /* !__U_BOOT__ */
+ for (i = 0; i < pi->num_cmds; i++) {
+ struct command *command;
+#ifndef __U_BOOT__
+ struct redir_struct *r, *rnext;
+#endif /* !__U_BOOT__ */
+
+ command = &pi->cmds[i];
+ debug_printf_clean(" command %d:\n", i);
+ if (command->argv) {
+ if (DEBUG_CLEAN) {
+ int a;
+ char **p;
+ for (a = 0, p = command->argv; *p; a++, p++) {
+ debug_printf_clean(" argv[%d] = %s\n", a, *p);
+ }
+ }
+ free_strings(command->argv);
+ //command->argv = NULL;
+ }
+ /* not "else if": on syntax error, we may have both! */
+ if (command->group) {
+ debug_printf_clean(" begin group (cmd_type:%d)\n",
+ command->cmd_type);
+ free_pipe_list(command->group);
+ debug_printf_clean(" end group\n");
+ //command->group = NULL;
+ }
+ /* else is crucial here.
+ * If group != NULL, child_func is meaningless */
+#if ENABLE_HUSH_FUNCTIONS
+ else if (command->child_func) {
+ debug_printf_exec("cmd %p releases child func at %p\n", command, command->child_func);
+ command->child_func->parent_cmd = NULL;
+ }
+#endif
+#if !BB_MMU
+ free(command->group_as_string);
+ //command->group_as_string = NULL;
+#endif
+#ifndef __U_BOOT__
+ for (r = command->redirects; r; r = rnext) {
+ debug_printf_clean(" redirect %d%s",
+ r->rd_fd, redir_table[r->rd_type].descrip);
+ /* guard against the case >$FOO, where foo is unset or blank */
+ if (r->rd_filename) {
+ debug_printf_clean(" fname:'%s'\n", r->rd_filename);
+ free(r->rd_filename);
+ //r->rd_filename = NULL;
+ }
+ debug_printf_clean(" rd_dup:%d\n", r->rd_dup);
+ rnext = r->next;
+ free(r);
+ }
+ //command->redirects = NULL;
+#endif /* !__U_BOOT__ */
+ }
+ free(pi->cmds); /* children are an array, they get freed all at once */
+ //pi->cmds = NULL;
+#ifndef __U_BOOT__
+#if ENABLE_HUSH_JOB
+ free(pi->cmdtext);
+ //pi->cmdtext = NULL;
+#endif
+#endif /* !__U_BOOT__ */
+
+ next = pi->next;
+ free(pi);
+ return next;
+}
+
+static void free_pipe_list(struct pipe *pi)
+{
+ while (pi) {
+#if HAS_KEYWORDS
+ debug_printf_clean("pipe reserved word %d\n", pi->res_word);
+#endif
+ debug_printf_clean("pipe followup code %d\n", pi->followup);
+ pi = free_pipe(pi);
+ }
+}
+
+
+/*** Parsing routines ***/
+
+#ifndef debug_print_tree
+static void debug_print_tree(struct pipe *pi, int lvl)
+{
+ static const char *const PIPE[] ALIGN_PTR = {
+ [PIPE_SEQ] = "SEQ",
+ [PIPE_AND] = "AND",
+ [PIPE_OR ] = "OR" ,
+ [PIPE_BG ] = "BG" ,
+ };
+ static const char *RES[] = {
+ [RES_NONE ] = "NONE" ,
+# if ENABLE_HUSH_IF
+ [RES_IF ] = "IF" ,
+ [RES_THEN ] = "THEN" ,
+ [RES_ELIF ] = "ELIF" ,
+ [RES_ELSE ] = "ELSE" ,
+ [RES_FI ] = "FI" ,
+# endif
+# if ENABLE_HUSH_LOOPS
+ [RES_FOR ] = "FOR" ,
+ [RES_WHILE] = "WHILE",
+ [RES_UNTIL] = "UNTIL",
+ [RES_DO ] = "DO" ,
+ [RES_DONE ] = "DONE" ,
+# endif
+# if ENABLE_HUSH_LOOPS || ENABLE_HUSH_CASE
+ [RES_IN ] = "IN" ,
+# endif
+# if ENABLE_HUSH_CASE
+ [RES_CASE ] = "CASE" ,
+ [RES_CASE_IN ] = "CASE_IN" ,
+ [RES_MATCH] = "MATCH",
+ [RES_CASE_BODY] = "CASE_BODY",
+ [RES_ESAC ] = "ESAC" ,
+# endif
+ [RES_XXXX ] = "XXXX" ,
+ [RES_SNTX ] = "SNTX" ,
+ };
+ static const char *const CMDTYPE[] ALIGN_PTR = {
+ "{}",
+ "()",
+ "[noglob]",
+# if ENABLE_HUSH_FUNCTIONS
+ "func()",
+# endif
+ };
+
+ int pin, prn;
+
+ pin = 0;
+ while (pi) {
+ fdprintf(2, "%*spipe %d #cmds:%d %sres_word=%s followup=%d %s\n",
+ lvl*2, "",
+ pin,
+ pi->num_cmds,
+ (IF_HAS_KEYWORDS(pi->pi_inverted ? "! " :) ""),
+ RES[pi->res_word],
+ pi->followup, PIPE[pi->followup]
+ );
+ prn = 0;
+ while (prn < pi->num_cmds) {
+ struct command *command = &pi->cmds[prn];
+ char **argv = command->argv;
+
+ fdprintf(2, "%*s cmd %d assignment_cnt:%d",
+ lvl*2, "", prn,
+ command->assignment_cnt);
+# if ENABLE_HUSH_LINENO_VAR
+ fdprintf(2, " LINENO:%u", command->lineno);
+# endif
+ if (command->group) {
+ fdprintf(2, " group %s: (argv=%p)%s%s\n",
+ CMDTYPE[command->cmd_type],
+ argv
+# if !BB_MMU
+ , " group_as_string:", command->group_as_string
+# else
+ , "", ""
+# endif
+ );
+ debug_print_tree(command->group, lvl+1);
+ prn++;
+ continue;
+ }
+ if (argv) while (*argv) {
+ fdprintf(2, " '%s'", *argv);
+ argv++;
+ }
+#ifndef __U_BOOT__
+ if (command->redirects)
+ fdprintf(2, " {redir}");
+#endif /* __U_BOOT__ */
+ fdprintf(2, "\n");
+ prn++;
+ }
+ pi = pi->next;
+ pin++;
+ }
+}
+#endif /* debug_print_tree */
+
+static struct pipe *new_pipe(void)
+{
+ struct pipe *pi;
+ pi = xzalloc(sizeof(struct pipe));
+ /*pi->res_word = RES_NONE; - RES_NONE is 0 anyway */
+ return pi;
+}
+
+/* Command (member of a pipe) is complete, or we start a new pipe
+ * if ctx->command is NULL.
+ * No errors possible here.
+ */
+static int done_command(struct parse_context *ctx)
+{
+ /* The command is really already in the pipe structure, so
+ * advance the pipe counter and make a new, null command. */
+ struct pipe *pi = ctx->pipe;
+ struct command *command = ctx->command;
+
+#if 0 /* Instead we emit error message at run time */
+ if (ctx->pending_redirect) {
+ /* For example, "cmd >" (no filename to redirect to) */
+ syntax_error("invalid redirect");
+ ctx->pending_redirect = NULL;
+ }
+#endif
+
+ if (command) {
+ if (IS_NULL_CMD(command)) {
+ debug_printf_parse("done_command: skipping null cmd, num_cmds=%d\n", pi->num_cmds);
+ goto clear_and_ret;
+ }
+ pi->num_cmds++;
+ debug_printf_parse("done_command: ++num_cmds=%d\n", pi->num_cmds);
+ //debug_print_tree(ctx->list_head, 20);
+ } else {
+ debug_printf_parse("done_command: initializing, num_cmds=%d\n", pi->num_cmds);
+ }
+
+ /* Only real trickiness here is that the uncommitted
+ * command structure is not counted in pi->num_cmds. */
+ pi->cmds = xrealloc(pi->cmds, sizeof(*pi->cmds) * (pi->num_cmds+1));
+ ctx->command = command = &pi->cmds[pi->num_cmds];
+ clear_and_ret:
+ memset(command, 0, sizeof(*command));
+#if ENABLE_HUSH_LINENO_VAR
+ command->lineno = G.parse_lineno;
+ debug_printf_parse("command->lineno = G.parse_lineno (%u)\n", G.parse_lineno);
+#endif
+ return pi->num_cmds; /* used only for 0/nonzero check */
+}
+
+static void done_pipe(struct parse_context *ctx, pipe_style type)
+{
+ int not_null;
+
+ debug_printf_parse("done_pipe entered, followup %d\n", type);
+ /* Close previous command */
+ not_null = done_command(ctx);
+#if HAS_KEYWORDS
+ ctx->pipe->pi_inverted = ctx->ctx_inverted;
+ ctx->ctx_inverted = 0;
+ ctx->pipe->res_word = ctx->ctx_res_w;
+#endif
+ if (type == PIPE_BG && ctx->list_head != ctx->pipe) {
+ /* Necessary since && and || have precedence over &:
+ * "cmd1 && cmd2 &" must spawn both cmds, not only cmd2,
+ * in a backgrounded subshell.
+ */
+ struct pipe *pi;
+ struct command *command;
+
+ /* Is this actually this construct, all pipes end with && or ||? */
+ pi = ctx->list_head;
+ while (pi != ctx->pipe) {
+ if (pi->followup != PIPE_AND && pi->followup != PIPE_OR)
+ goto no_conv;
+ pi = pi->next;
+ }
+
+ debug_printf_parse("BG with more than one pipe, converting to { p1 &&...pN; } &\n");
+ pi->followup = PIPE_SEQ; /* close pN _not_ with "&"! */
+ pi = xzalloc(sizeof(*pi));
+ pi->followup = PIPE_BG;
+ pi->num_cmds = 1;
+ pi->cmds = xzalloc(sizeof(pi->cmds[0]));
+ command = &pi->cmds[0];
+ if (CMD_NORMAL != 0) /* "if xzalloc didn't do that already" */
+ command->cmd_type = CMD_NORMAL;
+ command->group = ctx->list_head;
+#if !BB_MMU
+ command->group_as_string = xstrndup(
+ ctx->as_string.data,
+ ctx->as_string.length - 1 /* do not copy last char, "&" */
+ );
+#endif
+ /* Replace all pipes in ctx with one newly created */
+ ctx->list_head = ctx->pipe = pi;
+ /* for cases like "cmd && &", do not be tricked by last command
+ * being null - the entire {...} & is NOT null! */
+ not_null = 1;
+ } else {
+ no_conv:
+ ctx->pipe->followup = type;
+ }
+
+ /* Without this check, even just <enter> on command line generates
+ * tree of three NOPs (!). Which is harmless but annoying.
+ * IOW: it is safe to do it unconditionally. */
+ if (not_null
+#if ENABLE_HUSH_IF
+ || ctx->ctx_res_w == RES_FI
+#endif
+#if ENABLE_HUSH_LOOPS
+ || ctx->ctx_res_w == RES_DONE
+ || ctx->ctx_res_w == RES_FOR
+ || ctx->ctx_res_w == RES_IN
+#endif
+#if ENABLE_HUSH_CASE
+ || ctx->ctx_res_w == RES_ESAC
+#endif
+ ) {
+ struct pipe *new_p;
+ debug_printf_parse("done_pipe: adding new pipe: "
+#ifndef __U_BOOT__
+ "not_null:%d ctx->ctx_res_w:%d\n",
+ not_null, ctx->ctx_res_w);
+#else /* __U_BOOT__ */
+ "not_null:%d\n",
+ not_null);
+#endif /* __U_BOOT__ */
+ new_p = new_pipe();
+ ctx->pipe->next = new_p;
+ ctx->pipe = new_p;
+ /* RES_THEN, RES_DO etc are "sticky" -
+ * they remain set for pipes inside if/while.
+ * This is used to control execution.
+ * RES_FOR and RES_IN are NOT sticky (needed to support
+ * cases where variable or value happens to match a keyword):
+ */
+#if ENABLE_HUSH_LOOPS
+ if (ctx->ctx_res_w == RES_FOR
+ || ctx->ctx_res_w == RES_IN)
+ ctx->ctx_res_w = RES_NONE;
+#endif
+#if ENABLE_HUSH_CASE
+ if (ctx->ctx_res_w == RES_MATCH)
+ ctx->ctx_res_w = RES_CASE_BODY;
+ if (ctx->ctx_res_w == RES_CASE)
+ ctx->ctx_res_w = RES_CASE_IN;
+#endif
+ ctx->command = NULL; /* trick done_command below */
+ /* Create the memory for command, roughly:
+ * ctx->pipe->cmds = new struct command;
+ * ctx->command = &ctx->pipe->cmds[0];
+ */
+ done_command(ctx);
+ //debug_print_tree(ctx->list_head, 10);
+ }
+ debug_printf_parse("done_pipe return\n");
+}
+
+static void initialize_context(struct parse_context *ctx)
+{
+ memset(ctx, 0, sizeof(*ctx));
+ if (MAYBE_ASSIGNMENT != 0)
+ ctx->is_assignment = MAYBE_ASSIGNMENT;
+ ctx->pipe = ctx->list_head = new_pipe();
+ /* Create the memory for command, roughly:
+ * ctx->pipe->cmds = new struct command;
+ * ctx->command = &ctx->pipe->cmds[0];
+ */
+ done_command(ctx);
+}
+
+/* If a reserved word is found and processed, parse context is modified
+ * and 1 is returned.
+ */
+#if HAS_KEYWORDS
+struct reserved_combo {
+ char literal[6];
+ unsigned char res;
+ unsigned char assignment_flag;
+ uint32_t flag;
+};
+enum {
+ FLAG_END = (1 << RES_NONE ),
+# if ENABLE_HUSH_IF
+ FLAG_IF = (1 << RES_IF ),
+ FLAG_THEN = (1 << RES_THEN ),
+ FLAG_ELIF = (1 << RES_ELIF ),
+ FLAG_ELSE = (1 << RES_ELSE ),
+ FLAG_FI = (1 << RES_FI ),
+# endif
+# if ENABLE_HUSH_LOOPS
+ FLAG_FOR = (1 << RES_FOR ),
+ FLAG_WHILE = (1 << RES_WHILE),
+ FLAG_UNTIL = (1 << RES_UNTIL),
+ FLAG_DO = (1 << RES_DO ),
+ FLAG_DONE = (1 << RES_DONE ),
+ FLAG_IN = (1 << RES_IN ),
+# endif
+# if ENABLE_HUSH_CASE
+ FLAG_MATCH = (1 << RES_MATCH),
+ FLAG_ESAC = (1 << RES_ESAC ),
+# endif
+ FLAG_START = (1 << RES_XXXX ),
+};
+
+static const struct reserved_combo* match_reserved_word(o_string *word)
+{
+ /* Mostly a list of accepted follow-up reserved words.
+ * FLAG_END means we are done with the sequence, and are ready
+ * to turn the compound list into a command.
+ * FLAG_START means the word must start a new compound list.
+ */
+ static const struct reserved_combo reserved_list[] ALIGN4 = {
+# if ENABLE_HUSH_IF
+ { "!", RES_NONE, NOT_ASSIGNMENT , 0 },
+ { "if", RES_IF, MAYBE_ASSIGNMENT, FLAG_THEN | FLAG_START },
+ { "then", RES_THEN, MAYBE_ASSIGNMENT, FLAG_ELIF | FLAG_ELSE | FLAG_FI },
+ { "elif", RES_ELIF, MAYBE_ASSIGNMENT, FLAG_THEN },
+ { "else", RES_ELSE, MAYBE_ASSIGNMENT, FLAG_FI },
+ { "fi", RES_FI, NOT_ASSIGNMENT , FLAG_END },
+# endif
+# if ENABLE_HUSH_LOOPS
+ { "for", RES_FOR, NOT_ASSIGNMENT , FLAG_IN | FLAG_DO | FLAG_START },
+ { "while", RES_WHILE, MAYBE_ASSIGNMENT, FLAG_DO | FLAG_START },
+ { "until", RES_UNTIL, MAYBE_ASSIGNMENT, FLAG_DO | FLAG_START },
+ { "in", RES_IN, NOT_ASSIGNMENT , FLAG_DO },
+ { "do", RES_DO, MAYBE_ASSIGNMENT, FLAG_DONE },
+ { "done", RES_DONE, NOT_ASSIGNMENT , FLAG_END },
+# endif
+# if ENABLE_HUSH_CASE
+ { "case", RES_CASE, NOT_ASSIGNMENT , FLAG_MATCH | FLAG_START },
+ { "esac", RES_ESAC, NOT_ASSIGNMENT , FLAG_END },
+# endif
+ };
+ const struct reserved_combo *r;
+
+ for (r = reserved_list; r < reserved_list + ARRAY_SIZE(reserved_list); r++) {
+ if (strcmp(word->data, r->literal) == 0)
+ return r;
+ }
+ return NULL;
+}
+/* Return NULL: not a keyword, else: keyword
+ */
+static const struct reserved_combo* reserved_word(struct parse_context *ctx)
+{
+# if ENABLE_HUSH_CASE
+ static const struct reserved_combo reserved_match = {
+ "", RES_MATCH, NOT_ASSIGNMENT , FLAG_MATCH | FLAG_ESAC
+ };
+# endif
+ const struct reserved_combo *r;
+
+ if (ctx->word.has_quoted_part)
+ return 0;
+ r = match_reserved_word(&ctx->word);
+ if (!r)
+ return r; /* NULL */
+
+ debug_printf("found reserved word %s, res %d\n", r->literal, r->res);
+# if ENABLE_HUSH_CASE
+ if (r->res == RES_IN && ctx->ctx_res_w == RES_CASE_IN) {
+ /* "case word IN ..." - IN part starts first MATCH part */
+ r = &reserved_match;
+ } else
+# endif
+ if (r->flag == 0) { /* '!' */
+ if (ctx->ctx_inverted) { /* bash doesn't accept '! ! true' */
+ syntax_error("! ! command");
+ ctx->ctx_res_w = RES_SNTX;
+ }
+ ctx->ctx_inverted = 1;
+ return r;
+ }
+ if (r->flag & FLAG_START) {
+ struct parse_context *old;
+
+ old = xmemdup(ctx, sizeof(*ctx));
+ debug_printf_parse("push stack %p\n", old);
+ initialize_context(ctx);
+ ctx->stack = old;
+ } else if (/*ctx->ctx_res_w == RES_NONE ||*/ !(ctx->old_flag & (1 << r->res))) {
+ syntax_error_at(ctx->word.data);
+ ctx->ctx_res_w = RES_SNTX;
+ return r;
+ } else {
+ /* "{...} fi" is ok. "{...} if" is not
+ * Example:
+ * if { echo foo; } then { echo bar; } fi */
+ if (ctx->command->group)
+ done_pipe(ctx, PIPE_SEQ);
+ }
+
+ ctx->ctx_res_w = r->res;
+ ctx->old_flag = r->flag;
+ ctx->is_assignment = r->assignment_flag;
+ debug_printf_parse("ctx->is_assignment='%s'\n", assignment_flag[ctx->is_assignment]);
+
+ if (ctx->old_flag & FLAG_END) {
+ struct parse_context *old;
+
+ done_pipe(ctx, PIPE_SEQ);
+ debug_printf_parse("pop stack %p\n", ctx->stack);
+ old = ctx->stack;
+ old->command->group = ctx->list_head;
+ old->command->cmd_type = CMD_NORMAL;
+# if !BB_MMU
+ /* At this point, the compound command's string is in
+ * ctx->as_string... except for the leading keyword!
+ * Consider this example: "echo a | if true; then echo a; fi"
+ * ctx->as_string will contain "true; then echo a; fi",
+ * with "if " remaining in old->as_string!
+ */
+ {
+ char *str;
+ int len = old->as_string.length;
+ /* Concatenate halves */
+ o_addstr(&old->as_string, ctx->as_string.data);
+ o_free(&ctx->as_string);
+ /* Find where leading keyword starts in first half */
+ str = old->as_string.data + len;
+ if (str > old->as_string.data)
+ str--; /* skip whitespace after keyword */
+ while (str > old->as_string.data && isalpha(str[-1]))
+ str--;
+ /* Ugh, we're done with this horrid hack */
+ old->command->group_as_string = xstrdup(str);
+ debug_printf_parse("pop, remembering as:'%s'\n",
+ old->command->group_as_string);
+ }
+# endif
+ *ctx = *old; /* physical copy */
+ free(old);
+ }
+ return r;
+}
+#endif /* HAS_KEYWORDS */
+
+/* Word is complete, look at it and update parsing context.
+ * Normal return is 0. Syntax errors return 1.
+ * Note: on return, word is reset, but not o_free'd!
+ */
+static int done_word(struct parse_context *ctx)
+{
+ struct command *command = ctx->command;
+
+ debug_printf_parse("done_word entered: '%s' %p\n", ctx->word.data, command);
+ if (ctx->word.length == 0 && !ctx->word.has_quoted_part) {
+ debug_printf_parse("done_word return 0: true null, ignored\n");
+ return 0;
+ }
+
+#ifndef __U_BOOT__
+ if (ctx->pending_redirect) {
+ /* We do not glob in e.g. >*.tmp case. bash seems to glob here
+ * only if run as "bash", not "sh" */
+ /* http://pubs.opengroup.org/onlinepubs/9699919799/utilities/V3_chap02.html
+ * "2.7 Redirection
+ * If the redirection operator is "<<" or "<<-", the word
+ * that follows the redirection operator shall be
+ * subjected to quote removal; it is unspecified whether
+ * any of the other expansions occur. For the other
+ * redirection operators, the word that follows the
+ * redirection operator shall be subjected to tilde
+ * expansion, parameter expansion, command substitution,
+ * arithmetic expansion, and quote removal.
+ * Pathname expansion shall not be performed
+ * on the word by a non-interactive shell; an interactive
+ * shell may perform it, but shall do so only when
+ * the expansion would result in one word."
+ */
+//bash does not do parameter/command substitution or arithmetic expansion
+//for _heredoc_ redirection word: these constructs look for exact eof marker
+// as written:
+// <<EOF$t
+// <<EOF$((1))
+// <<EOF`true` [this case also makes heredoc "quoted", a-la <<"EOF". Probably bash-4.3.43 bug]
+
+ ctx->pending_redirect->rd_filename = xstrdup(ctx->word.data);
+ /* Cater for >\file case:
+ * >\a creates file a; >\\a, >"\a", >"\\a" create file \a
+ * Same with heredocs:
+ * for <<\H delim is H; <<\\H, <<"\H", <<"\\H" - \H
+ */
+ if (ctx->pending_redirect->rd_type == REDIRECT_HEREDOC) {
+ unbackslash(ctx->pending_redirect->rd_filename);
+ /* Is it <<"HEREDOC"? */
+ if (ctx->word.has_quoted_part) {
+ ctx->pending_redirect->rd_dup |= HEREDOC_QUOTED;
+ }
+ }
+ debug_printf_parse("word stored in rd_filename: '%s'\n", ctx->word.data);
+ ctx->pending_redirect = NULL;
+ } else {
+#endif /* !__U_BOOT__ */
+#if HAS_KEYWORDS
+# if ENABLE_HUSH_CASE
+ if (ctx->ctx_dsemicolon
+ && strcmp(ctx->word.data, "esac") != 0 /* not "... pattern) cmd;; esac" */
+ ) {
+ /* already done when ctx_dsemicolon was set to 1: */
+ /* ctx->ctx_res_w = RES_MATCH; */
+ ctx->ctx_dsemicolon = 0;
+ } else
+# endif
+# if defined(CMD_TEST2_SINGLEWORD_NOGLOB)
+ if (command->cmd_type == CMD_TEST2_SINGLEWORD_NOGLOB
+ && strcmp(ctx->word.data, "]]") == 0
+ ) {
+ /* allow "[[ ]] >file" etc */
+ command->cmd_type = CMD_SINGLEWORD_NOGLOB;
+ } else
+# endif
+ if (!command->argv /* if it's the first word... */
+# if ENABLE_HUSH_LOOPS
+ && ctx->ctx_res_w != RES_FOR /* ...not after FOR or IN */
+ && ctx->ctx_res_w != RES_IN
+# endif
+# if ENABLE_HUSH_CASE
+ && ctx->ctx_res_w != RES_CASE
+# endif
+ ) {
+ const struct reserved_combo *reserved;
+ reserved = reserved_word(ctx);
+ debug_printf_parse("checking for reserved-ness: %d\n", !!reserved);
+ if (reserved) {
+# if ENABLE_HUSH_LINENO_VAR
+/* Case:
+ * "while ...; do
+ * cmd ..."
+ * If we don't close the pipe _now_, immediately after "do", lineno logic
+ * sees "cmd" as starting at "do" - i.e., at the previous line.
+ */
+ if (0
+ IF_HUSH_IF(|| reserved->res == RES_THEN)
+ IF_HUSH_IF(|| reserved->res == RES_ELIF)
+ IF_HUSH_IF(|| reserved->res == RES_ELSE)
+ IF_HUSH_LOOPS(|| reserved->res == RES_DO)
+ ) {
+ done_pipe(ctx, PIPE_SEQ);
+ }
+# endif
+ o_reset_to_empty_unquoted(&ctx->word);
+ debug_printf_parse("done_word return %d\n",
+ (ctx->ctx_res_w == RES_SNTX));
+ return (ctx->ctx_res_w == RES_SNTX);
+ }
+# if defined(CMD_TEST2_SINGLEWORD_NOGLOB)
+ if (strcmp(ctx->word.data, "[[") == 0) {
+ command->cmd_type = CMD_TEST2_SINGLEWORD_NOGLOB;
+ } else
+# endif
+# if defined(CMD_SINGLEWORD_NOGLOB)
+ if (0
+ /* In bash, local/export/readonly are special, args
+ * are assignments and therefore expansion of them
+ * should be "one-word" expansion:
+ * $ export i=`echo 'a b'` # one arg: "i=a b"
+ * compare with:
+ * $ ls i=`echo 'a b'` # two args: "i=a" and "b"
+ * ls: cannot access i=a: No such file or directory
+ * ls: cannot access b: No such file or directory
+ * Note: bash 3.2.33(1) does this only if export word
+ * itself is not quoted:
+ * $ export i=`echo 'aaa bbb'`; echo "$i"
+ * aaa bbb
+ * $ "export" i=`echo 'aaa bbb'`; echo "$i"
+ * aaa
+ */
+ IF_HUSH_LOCAL( || strcmp(ctx->word.data, "local") == 0)
+ IF_HUSH_EXPORT( || strcmp(ctx->word.data, "export") == 0)
+ IF_HUSH_READONLY(|| strcmp(ctx->word.data, "readonly") == 0)
+ ) {
+ command->cmd_type = CMD_SINGLEWORD_NOGLOB;
+ }
+# else
+ { /* empty block to pair "if ... else" */ }
+# endif
+ }
+#endif /* HAS_KEYWORDS */
+
+ if (command->group) {
+ /* "{ echo foo; } echo bar" - bad */
+ syntax_error_at(ctx->word.data);
+ debug_printf_parse("done_word return 1: syntax error, "
+ "groups and arglists don't mix\n");
+ return 1;
+ }
+
+ /* If this word wasn't an assignment, next ones definitely
+ * can't be assignments. Even if they look like ones. */
+ if (ctx->is_assignment != DEFINITELY_ASSIGNMENT
+ && ctx->is_assignment != WORD_IS_KEYWORD
+ ) {
+ ctx->is_assignment = NOT_ASSIGNMENT;
+ } else {
+ if (ctx->is_assignment == DEFINITELY_ASSIGNMENT) {
+ command->assignment_cnt++;
+ debug_printf_parse("++assignment_cnt=%d\n", command->assignment_cnt);
+ }
+ debug_printf_parse("ctx->is_assignment was:'%s'\n", assignment_flag[ctx->is_assignment]);
+ ctx->is_assignment = MAYBE_ASSIGNMENT;
+ }
+ debug_printf_parse("ctx->is_assignment='%s'\n", assignment_flag[ctx->is_assignment]);
+ command->argv = add_string_to_strings(command->argv, xstrdup(ctx->word.data));
+#ifdef __U_BOOT__
+ command->argc++;
+#endif /* __U_BOOT__ */
+ debug_print_strings("word appended to argv", command->argv);
+
+#ifndef __U_BOOT__
+ }
+#endif /* !__U_BOOT__ */
+
+#if ENABLE_HUSH_LOOPS
+ if (ctx->ctx_res_w == RES_FOR) {
+ if (ctx->word.has_quoted_part
+ || endofname(command->argv[0])[0] != '\0'
+ ) {
+ /* bash says just "not a valid identifier" */
+ syntax_error("bad for loop variable");
+ return 1;
+ }
+ /* Force FOR to have just one word (variable name) */
+ /* NB: basically, this makes hush see "for v in ..."
+ * syntax as if it is "for v; in ...". FOR and IN become
+ * two pipe structs in parse tree. */
+ done_pipe(ctx, PIPE_SEQ);
+ }
+#endif
+#if ENABLE_HUSH_CASE
+ /* Force CASE to have just one word */
+ if (ctx->ctx_res_w == RES_CASE) {
+ done_pipe(ctx, PIPE_SEQ);
+ }
+#endif
+
+ o_reset_to_empty_unquoted(&ctx->word);
+
+ debug_printf_parse("done_word return 0\n");
+ return 0;
+}
+
+
+#ifndef __U_BOOT__
+/* Peek ahead in the input to find out if we have a "&n" construct,
+ * as in "2>&1", that represents duplicating a file descriptor.
+ * Return:
+ * REDIRFD_CLOSE if >&- "close fd" construct is seen,
+ * REDIRFD_SYNTAX_ERR if syntax error,
+ * REDIRFD_TO_FILE if no & was seen,
+ * or the number found.
+ */
+#if BB_MMU
+#define parse_redir_right_fd(as_string, input) \
+ parse_redir_right_fd(input)
+#endif
+static int parse_redir_right_fd(o_string *as_string, struct in_str *input)
+{
+ int ch, d, ok;
+
+ ch = i_peek(input);
+ if (ch != '&')
+ return REDIRFD_TO_FILE;
+
+ ch = i_getch(input); /* get the & */
+ nommu_addchr(as_string, ch);
+ ch = i_peek(input);
+ if (ch == '-') {
+ ch = i_getch(input);
+ nommu_addchr(as_string, ch);
+ return REDIRFD_CLOSE;
+ }
+ d = 0;
+ ok = 0;
+ while (ch != EOF && isdigit(ch)) {
+ d = d*10 + (ch-'0');
+ ok = 1;
+ ch = i_getch(input);
+ nommu_addchr(as_string, ch);
+ ch = i_peek(input);
+ }
+ if (ok) return d;
+
+//TODO: this is the place to catch ">&file" bashism (redirect both fd 1 and 2)
+
+ bb_simple_error_msg("ambiguous redirect");
+ return REDIRFD_SYNTAX_ERR;
+}
+
+/* Return code is 0 normal, 1 if a syntax error is detected
+ */
+static int parse_redirect(struct parse_context *ctx,
+ int fd,
+ redir_type style,
+ struct in_str *input)
+{
+ struct command *command = ctx->command;
+ struct redir_struct *redir;
+ struct redir_struct **redirp;
+ int dup_num;
+
+ dup_num = REDIRFD_TO_FILE;
+ if (style != REDIRECT_HEREDOC) {
+ /* Check for a '>&1' type redirect */
+ dup_num = parse_redir_right_fd(&ctx->as_string, input);
+ if (dup_num == REDIRFD_SYNTAX_ERR)
+ return 1;
+ } else {
+ int ch = i_peek_and_eat_bkslash_nl(input);
+ dup_num = (ch == '-'); /* HEREDOC_SKIPTABS bit is 1 */
+ if (dup_num) { /* <<-... */
+ ch = i_getch(input);
+ nommu_addchr(&ctx->as_string, ch);
+ ch = i_peek(input);
+ }
+ }
+
+ if (style == REDIRECT_OVERWRITE && dup_num == REDIRFD_TO_FILE) {
+ int ch = i_peek_and_eat_bkslash_nl(input);
+ if (ch == '|') {
+ /* >|FILE redirect ("clobbering" >).
+ * Since we do not support "set -o noclobber" yet,
+ * >| and > are the same for now. Just eat |.
+ */
+ ch = i_getch(input);
+ nommu_addchr(&ctx->as_string, ch);
+ }
+ }
+
+ /* Create a new redir_struct and append it to the linked list */
+ redirp = &command->redirects;
+ while ((redir = *redirp) != NULL) {
+ redirp = &(redir->next);
+ }
+ *redirp = redir = xzalloc(sizeof(*redir));
+ /* redir->next = NULL; */
+ /* redir->rd_filename = NULL; */
+ redir->rd_type = style;
+ redir->rd_fd = (fd == -1) ? redir_table[style].default_fd : fd;
+
+ debug_printf_parse("redirect type %d %s\n", redir->rd_fd,
+ redir_table[style].descrip);
+
+ redir->rd_dup = dup_num;
+ if (style != REDIRECT_HEREDOC && dup_num != REDIRFD_TO_FILE) {
+ /* Erik had a check here that the file descriptor in question
+ * is legit; I postpone that to "run time"
+ * A "-" representation of "close me" shows up as a -3 here */
+ debug_printf_parse("duplicating redirect '%d>&%d'\n",
+ redir->rd_fd, redir->rd_dup);
+ } else {
+#if 0 /* Instead we emit error message at run time */
+ if (ctx->pending_redirect) {
+ /* For example, "cmd > <file" */
+ syntax_error("invalid redirect");
+ }
+#endif
+ /* Set ctx->pending_redirect, so we know what to do at the
+ * end of the next parsed word. */
+ ctx->pending_redirect = redir;
+ }
+ return 0;
+}
+
+/* If a redirect is immediately preceded by a number, that number is
+ * supposed to tell which file descriptor to redirect. This routine
+ * looks for such preceding numbers. In an ideal world this routine
+ * needs to handle all the following classes of redirects...
+ * echo 2>foo # redirects fd 2 to file "foo", nothing passed to echo
+ * echo 49>foo # redirects fd 49 to file "foo", nothing passed to echo
+ * echo -2>foo # redirects fd 1 to file "foo", "-2" passed to echo
+ * echo 49x>foo # redirects fd 1 to file "foo", "49x" passed to echo
+ *
+ * http://www.opengroup.org/onlinepubs/009695399/utilities/xcu_chap02.html
+ * "2.7 Redirection
+ * ... If n is quoted, the number shall not be recognized as part of
+ * the redirection expression. For example:
+ * echo \2>a
+ * writes the character 2 into file a"
+ * We are getting it right by setting ->has_quoted_part on any \<char>
+ *
+ * A -1 return means no valid number was found,
+ * the caller should use the appropriate default for this redirection.
+ */
+static int redirect_opt_num(o_string *o)
+{
+ int num;
+
+ if (o->data == NULL)
+ return -1;
+ num = bb_strtou(o->data, NULL, 10);
+ if (errno || num < 0)
+ return -1;
+ o_reset_to_empty_unquoted(o);
+ return num;
+}
+
+#if BB_MMU
+#define fetch_till_str(as_string, input, word, skip_tabs) \
+ fetch_till_str(input, word, skip_tabs)
+#endif
+static char *fetch_till_str(o_string *as_string,
+ struct in_str *input,
+ const char *word,
+ int heredoc_flags)
+{
+ o_string heredoc = NULL_O_STRING;
+ unsigned past_EOL;
+ int prev = 0; /* not \ */
+ int ch;
+
+ /* Starting with "" is necessary for this case:
+ * cat <<EOF
+ *
+ * xxx
+ * EOF
+ */
+ heredoc.data = xzalloc(1); /* start as "", not as NULL */
+
+ goto jump_in;
+
+ while (1) {
+ ch = i_getch(input);
+ if (ch != EOF)
+ nommu_addchr(as_string, ch);
+ if (ch == '\n' || ch == EOF) {
+ check_heredoc_end:
+#ifndef __U_BOOT__
+ if ((heredoc_flags & HEREDOC_QUOTED) || prev != '\\') {
+#else /* __U_BOOT__ */
+ if (prev != '\\') {
+#endif
+ /* End-of-line, and not a line continuation */
+ if (strcmp(heredoc.data + past_EOL, word) == 0) {
+ heredoc.data[past_EOL] = '\0';
+ debug_printf_heredoc("parsed '%s' heredoc '%s'\n", word, heredoc.data);
+ return heredoc.data;
+ }
+ if (ch == '\n') {
+ /* This is a new line.
+ * Remember position and backslash-escaping status.
+ */
+ o_addchr(&heredoc, ch);
+ prev = ch;
+ jump_in:
+ past_EOL = heredoc.length;
+ /* Get 1st char of next line, possibly skipping leading tabs */
+ do {
+ ch = i_getch(input);
+ if (ch != EOF)
+ nommu_addchr(as_string, ch);
+#ifndef __U_BOOT__
+ } while ((heredoc_flags & HEREDOC_SKIPTABS) && ch == '\t');
+#else /* __U_BOOT__ */
+ } while (ch == '\t');
+#endif
+ /* If this immediately ended the line,
+ * go back to end-of-line checks.
+ */
+ if (ch == '\n')
+ goto check_heredoc_end;
+ }
+ } else {
+ /* Backslash-line continuation in an unquoted
+ * heredoc. This does not need special handling
+ * for heredoc body (unquoted heredocs are
+ * expanded on "execution" and that would take
+ * care of this case too), but not the case
+ * of line continuation *in terminator*:
+ * cat <<EOF
+ * Ok1
+ * EO\
+ * F
+ */
+ heredoc.data[--heredoc.length] = '\0';
+ prev = 0; /* not '\' */
+ continue;
+ }
+ }
+ if (ch == EOF) {
+ o_free(&heredoc);
+ return NULL; /* error */
+ }
+ o_addchr(&heredoc, ch);
+ nommu_addchr(as_string, ch);
+ if (prev == '\\' && ch == '\\')
+ /* Correctly handle foo\\<eol> (not a line cont.) */
+ prev = 0; /* not '\' */
+ else
+ prev = ch;
+ }
+}
+#endif /* !__U_BOOT__ */
+
+/* Look at entire parse tree for not-yet-loaded REDIRECT_HEREDOCs
+ * and load them all. There should be exactly heredoc_cnt of them.
+ */
+#if BB_MMU
+#define fetch_heredocs(as_string, pi, heredoc_cnt, input) \
+ fetch_heredocs(pi, heredoc_cnt, input)
+#endif
+static int fetch_heredocs(o_string *as_string, struct pipe *pi, int heredoc_cnt, struct in_str *input)
+{
+ while (pi && heredoc_cnt) {
+ int i;
+ struct command *cmd = pi->cmds;
+
+ debug_printf_heredoc("fetch_heredocs: num_cmds:%d cmd argv0:'%s'\n",
+ pi->num_cmds,
+ cmd->argv ? cmd->argv[0] : "NONE"
+ );
+ for (i = 0; i < pi->num_cmds; i++) {
+#ifndef __U_BOOT__
+ struct redir_struct *redir = cmd->redirects;
+
+#endif /* !__U_BOOT__ */
+ debug_printf_heredoc("fetch_heredocs: %d cmd argv0:'%s'\n",
+ i, cmd->argv ? cmd->argv[0] : "NONE");
+#ifndef __U_BOOT__
+ while (redir) {
+ if (redir->rd_type == REDIRECT_HEREDOC) {
+ char *p;
+
+ redir->rd_type = REDIRECT_HEREDOC2;
+ /* redir->rd_dup is (ab)used to indicate <<- */
+ p = fetch_till_str(as_string, input,
+ redir->rd_filename, redir->rd_dup);
+ if (!p) {
+ syntax_error("unexpected EOF in here document");
+ return -1;
+ }
+ free(redir->rd_filename);
+ redir->rd_filename = p;
+ heredoc_cnt--;
+ }
+ redir = redir->next;
+ }
+#endif /* !__U_BOOT__ */
+ if (cmd->group) {
+ //bb_error_msg("%s:%u heredoc_cnt:%d", __func__, __LINE__, heredoc_cnt);
+ heredoc_cnt = fetch_heredocs(as_string, cmd->group, heredoc_cnt, input);
+ //bb_error_msg("%s:%u heredoc_cnt:%d", __func__, __LINE__, heredoc_cnt);
+ if (heredoc_cnt < 0)
+ return heredoc_cnt; /* error */
+ }
+ cmd++;
+ }
+ pi = pi->next;
+ }
+ return heredoc_cnt;
+}
+
+
+static int run_list(struct pipe *pi);
+#if BB_MMU
+#define parse_stream(pstring, heredoc_cnt_ptr, input, end_trigger) \
+ parse_stream(heredoc_cnt_ptr, input, end_trigger)
+#endif
+static struct pipe *parse_stream(char **pstring,
+ int *heredoc_cnt_ptr,
+ struct in_str *input,
+ int end_trigger);
+
+/* Returns number of heredocs not yet consumed,
+ * or -1 on error.
+ */
+static int parse_group(struct parse_context *ctx,
+ struct in_str *input, int ch)
+{
+ /* ctx->word contains characters seen prior to ( or {.
+ * Typically it's empty, but for function defs,
+ * it contains function name (without '()'). */
+#if BB_MMU
+# define as_string NULL
+#else
+ char *as_string = NULL;
+#endif
+ struct pipe *pipe_list;
+ int heredoc_cnt = 0;
+ int endch;
+ struct command *command = ctx->command;
+
+ debug_printf_parse("parse_group entered\n");
+#if ENABLE_HUSH_FUNCTIONS
+ if (ch == '(' && !ctx->word.has_quoted_part) {
+ if (ctx->word.length)
+ if (done_word(ctx))
+ return -1;
+ if (!command->argv)
+ goto skip; /* (... */
+ if (command->argv[1]) { /* word word ... (... */
+ syntax_error_unexpected_ch('(');
+ return -1;
+ }
+ /* it is "word(..." or "word (..." */
+ do
+ ch = i_getch(input);
+ while (ch == ' ' || ch == '\t');
+ if (ch != ')') {
+ syntax_error_unexpected_ch(ch);
+ return -1;
+ }
+ nommu_addchr(&ctx->as_string, ch);
+ do
+ ch = i_getch(input);
+ while (ch == ' ' || ch == '\t' || ch == '\n');
+ if (ch != '{' && ch != '(') {
+ syntax_error_unexpected_ch(ch);
+ return -1;
+ }
+//bash allows functions named "123", "..", "return"!
+// if (endofname(command->argv[0])[0] != '\0') {
+// syntax_error("bad function name");
+// return -1;
+// }
+ nommu_addchr(&ctx->as_string, ch);
+ command->cmd_type = CMD_FUNCDEF;
+ goto skip;
+ }
+#endif
+
+#if 0 /* Prevented by caller */
+ if (command->argv /* word [word]{... */
+ || ctx->word.length /* word{... */
+ || ctx->word.has_quoted_part /* ""{... */
+ ) {
+ syntax_error(NULL);
+ debug_printf_parse("parse_group return -1: "
+ "syntax error, groups and arglists don't mix\n");
+ return -1;
+ }
+#endif
+
+#ifndef __U_BOOT__
+ IF_HUSH_FUNCTIONS(skip:)
+#endif /* !__U_BOOT__ */
+
+ endch = '}';
+ if (ch == '(') {
+ endch = ')';
+#ifndef __U_BOOT__
+ IF_HUSH_FUNCTIONS(if (command->cmd_type != CMD_FUNCDEF))
+ command->cmd_type = CMD_SUBSHELL;
+#endif /* !__U_BOOT__ */
+ } else {
+ /* bash does not allow "{echo...", requires whitespace */
+ ch = i_peek(input);
+ if (ch != ' ' && ch != '\t' && ch != '\n'
+ && ch != '(' /* but "{(..." is allowed (without whitespace) */
+ ) {
+ syntax_error_unexpected_ch(ch);
+ return -1;
+ }
+ if (ch != '(') {
+ ch = i_getch(input);
+ nommu_addchr(&ctx->as_string, ch);
+ }
+ }
+
+ debug_printf_heredoc("calling parse_stream, heredoc_cnt:%d\n", heredoc_cnt);
+ pipe_list = parse_stream(&as_string, &heredoc_cnt, input, endch);
+ debug_printf_heredoc("parse_stream returned: heredoc_cnt:%d\n", heredoc_cnt);
+#if !BB_MMU
+ if (as_string)
+ o_addstr(&ctx->as_string, as_string);
+#endif
+
+ /* empty ()/{} or parse error? */
+ if (!pipe_list || pipe_list == ERR_PTR) {
+ /* parse_stream already emitted error msg */
+ if (!BB_MMU)
+ free(as_string);
+ debug_printf_parse("parse_group return -1: "
+ "parse_stream returned %p\n", pipe_list);
+ return -1;
+ }
+#if !BB_MMU
+ as_string[strlen(as_string) - 1] = '\0'; /* plink ')' or '}' */
+ command->group_as_string = as_string;
+ debug_printf_parse("end of group, remembering as:'%s'\n",
+ command->group_as_string);
+#endif
+
+#if ENABLE_HUSH_FUNCTIONS
+ /* Convert "f() (cmds)" to "f() {(cmds)}" */
+ if (command->cmd_type == CMD_FUNCDEF && endch == ')') {
+ struct command *cmd2;
+
+ cmd2 = xzalloc(sizeof(*cmd2));
+ cmd2->cmd_type = CMD_SUBSHELL;
+ cmd2->group = pipe_list;
+# if !BB_MMU
+//UNTESTED!
+ cmd2->group_as_string = command->group_as_string;
+ command->group_as_string = xasprintf("(%s)", command->group_as_string);
+# endif
+
+ pipe_list = new_pipe();
+ pipe_list->cmds = cmd2;
+ pipe_list->num_cmds = 1;
+ }
+#endif
+
+ command->group = pipe_list;
+
+ debug_printf_parse("parse_group return %d\n", heredoc_cnt);
+ return heredoc_cnt;
+ /* command remains "open", available for possible redirects */
+#undef as_string
+}
+
+#ifndef __U_BOOT__
+#if ENABLE_HUSH_TICK || ENABLE_FEATURE_SH_MATH || ENABLE_HUSH_DOLLAR_OPS
+/* Subroutines for copying $(...) and `...` things */
+/* '...' */
+static int add_till_single_quote(o_string *dest, struct in_str *input)
+{
+ while (1) {
+ int ch = i_getch(input);
+ if (ch == EOF) {
+ syntax_error_unterm_ch('\'');
+ return 0;
+ }
+ if (ch == '\'')
+ return 1;
+ o_addchr(dest, ch);
+ }
+}
+static int add_till_single_quote_dquoted(o_string *dest, struct in_str *input)
+{
+ while (1) {
+ int ch = i_getch(input);
+ if (ch == EOF) {
+ syntax_error_unterm_ch('\'');
+ return 0;
+ }
+ if (ch == '\'')
+ return 1;
+ o_addqchr(dest, ch);
+ }
+}
+
+/* "...\"...`..`...." - do we need to handle "...$(..)..." too? */
+static int add_till_backquote(o_string *dest, struct in_str *input, int in_dquote);
+static int add_till_double_quote(o_string *dest, struct in_str *input)
+{
+ while (1) {
+ int ch = i_getch(input);
+ if (ch == EOF) {
+ syntax_error_unterm_ch('"');
+ return 0;
+ }
+ if (ch == '"')
+ return 1;
+ if (ch == '\\') { /* \x. Copy both chars. */
+ o_addchr(dest, ch);
+ ch = i_getch(input);
+ }
+ o_addchr(dest, ch);
+ if (ch == '`') {
+ if (!add_till_backquote(dest, input, /*in_dquote:*/ 1))
+ return 0;
+ o_addchr(dest, ch);
+ continue;
+ }
+ //if (ch == '$') ...
+ }
+}
+
+
+/* Process `cmd` - copy contents until "`" is seen. Complicated by
+ * \` quoting.
+ * "Within the backquoted style of command substitution, backslash
+ * shall retain its literal meaning, except when followed by: '$', '`', or '\'.
+ * The search for the matching backquote shall be satisfied by the first
+ * backquote found without a preceding backslash; during this search,
+ * if a non-escaped backquote is encountered within a shell comment,
+ * a here-document, an embedded command substitution of the $(command)
+ * form, or a quoted string, undefined results occur. A single-quoted
+ * or double-quoted string that begins, but does not end, within the
+ * "`...`" sequence produces undefined results."
+ * Example Output
+ * echo `echo '\'TEST\`echo ZZ\`BEST` \TESTZZBEST
+ */
+static int add_till_backquote(o_string *dest, struct in_str *input, int in_dquote)
+{
+ while (1) {
+ int ch = i_getch(input);
+ if (ch == '`')
+ return 1;
+ if (ch == '\\') {
+ /* \x. Copy both unless it is \`, \$, \\ and maybe \" */
+ ch = i_getch(input);
+ if (ch != '`'
+ && ch != '$'
+ && ch != '\\'
+ && (!in_dquote || ch != '"')
+ ) {
+ o_addchr(dest, '\\');
+ }
+ }
+ if (ch == EOF) {
+ syntax_error_unterm_ch('`');
+ return 0;
+ }
+ o_addchr(dest, ch);
+ }
+}
+/* Process $(cmd) - copy contents until ")" is seen. Complicated by
+ * quoting and nested ()s.
+ * "With the $(command) style of command substitution, all characters
+ * following the open parenthesis to the matching closing parenthesis
+ * constitute the command. Any valid shell script can be used for command,
+ * except a script consisting solely of redirections which produces
+ * unspecified results."
+ * Example Output
+ * echo $(echo '(TEST)' BEST) (TEST) BEST
+ * echo $(echo 'TEST)' BEST) TEST) BEST
+ * echo $(echo \(\(TEST\) BEST) ((TEST) BEST
+ *
+ * Also adapted to eat ${var%...} and $((...)) constructs, since ... part
+ * can contain arbitrary constructs, just like $(cmd).
+ * In bash compat mode, it needs to also be able to stop on ':' or '/'
+ * for ${var:N[:M]} and ${var/P[/R]} parsing.
+ */
+#define DOUBLE_CLOSE_CHAR_FLAG 0x80
+static int add_till_closing_bracket(o_string *dest, struct in_str *input, unsigned end_ch)
+{
+ int ch;
+ char dbl = end_ch & DOUBLE_CLOSE_CHAR_FLAG;
+# if BASH_SUBSTR || BASH_PATTERN_SUBST
+ char end_char2 = end_ch >> 8;
+# endif
+ end_ch &= (DOUBLE_CLOSE_CHAR_FLAG - 1);
+
+# if ENABLE_HUSH_INTERACTIVE
+ G.promptmode = 1; /* PS2 */
+# endif
+ debug_printf_prompt("%s promptmode=%d\n", __func__, G.promptmode);
+
+ while (1) {
+ ch = i_getch(input);
+ if (ch == EOF) {
+ syntax_error_unterm_ch(end_ch);
+ return 0;
+ }
+ if (ch == end_ch
+# if BASH_SUBSTR || BASH_PATTERN_SUBST
+ || ch == end_char2
+# endif
+ ) {
+ if (!dbl)
+ break;
+ /* we look for closing )) of $((EXPR)) */
+ if (i_peek_and_eat_bkslash_nl(input) == end_ch) {
+ i_getch(input); /* eat second ')' */
+ break;
+ }
+ }
+ o_addchr(dest, ch);
+ //bb_error_msg("%s:o_addchr('%c')", __func__, ch);
+ if (ch == '(' || ch == '{') {
+ ch = (ch == '(' ? ')' : '}');
+ if (!add_till_closing_bracket(dest, input, ch))
+ return 0;
+ o_addchr(dest, ch);
+ continue;
+ }
+ if (ch == '\'') {
+ if (!add_till_single_quote(dest, input))
+ return 0;
+ o_addchr(dest, ch);
+ continue;
+ }
+ if (ch == '"') {
+ if (!add_till_double_quote(dest, input))
+ return 0;
+ o_addchr(dest, ch);
+ continue;
+ }
+ if (ch == '`') {
+ if (!add_till_backquote(dest, input, /*in_dquote:*/ 0))
+ return 0;
+ o_addchr(dest, ch);
+ continue;
+ }
+ if (ch == '\\') {
+ /* \x. Copy verbatim. Important for \(, \) */
+ ch = i_getch(input);
+ if (ch == EOF) {
+ syntax_error_unterm_ch(end_ch);
+ return 0;
+ }
+# if 0
+ if (ch == '\n') {
+ /* "backslash+newline", ignore both */
+ o_delchr(dest); /* undo insertion of '\' */
+ continue;
+ }
+# endif
+ o_addchr(dest, ch);
+ //bb_error_msg("%s:o_addchr('%c') after '\\'", __func__, ch);
+ continue;
+ }
+ }
+ debug_printf_parse("%s return '%s' ch:'%c'\n", __func__, dest->data, ch);
+ return ch;
+}
+#endif /* ENABLE_HUSH_TICK || ENABLE_FEATURE_SH_MATH || ENABLE_HUSH_DOLLAR_OPS */
+
+#if BASH_DOLLAR_SQUOTE
+/* Return code: 1 for "found and parsed", 0 for "seen something else" */
+# if BB_MMU
+#define parse_dollar_squote(as_string, dest, input) \
+ parse_dollar_squote(dest, input)
+#define as_string NULL
+# endif
+static int parse_dollar_squote(o_string *as_string, o_string *dest, struct in_str *input)
+{
+ int start;
+ int ch = i_peek_and_eat_bkslash_nl(input); /* first character after the $ */
+ debug_printf_parse("parse_dollar_squote entered: ch='%c'\n", ch);
+ if (ch != '\'')
+ return 0;
+
+ dest->has_quoted_part = 1;
+ start = dest->length;
+
+ ch = i_getch(input); /* eat ' */
+ nommu_addchr(as_string, ch);
+ while (1) {
+ ch = i_getch(input);
+ nommu_addchr(as_string, ch);
+ if (ch == EOF) {
+ syntax_error_unterm_ch('\'');
+ return 0;
+ }
+ if (ch == '\'')
+ break;
+ if (ch == SPECIAL_VAR_SYMBOL) {
+ /* Convert raw ^C to corresponding special variable reference */
+ o_addchr(dest, SPECIAL_VAR_SYMBOL);
+ o_addchr(dest, SPECIAL_VAR_QUOTED_SVS);
+ /* will addchr() another SPECIAL_VAR_SYMBOL (see after the if() block) */
+ } else if (ch == '\\') {
+ static const char C_escapes[] ALIGN1 = "nrbtfav""x\\01234567";
+
+ ch = i_getch(input);
+ nommu_addchr(as_string, ch);
+ if (strchr(C_escapes, ch)) {
+ char buf[4];
+ char *p = buf;
+ int cnt = 2;
+
+ buf[0] = ch;
+ if ((unsigned char)(ch - '0') <= 7) { /* \ooo */
+ do {
+ ch = i_peek(input);
+ if ((unsigned char)(ch - '0') > 7)
+ break;
+ *++p = ch = i_getch(input);
+ nommu_addchr(as_string, ch);
+ } while (--cnt != 0);
+ } else if (ch == 'x') { /* \xHH */
+ do {
+ ch = i_peek(input);
+ if (!isxdigit(ch))
+ break;
+ *++p = ch = i_getch(input);
+ nommu_addchr(as_string, ch);
+ } while (--cnt != 0);
+ if (cnt == 2) { /* \x but next char is "bad" */
+ ch = 'x';
+ goto unrecognized;
+ }
+ } /* else simple seq like \\ or \t */
+ *++p = '\0';
+ p = buf;
+ ch = bb_process_escape_sequence((void*)&p);
+ //bb_error_msg("buf:'%s' ch:%x", buf, ch);
+ if (ch == '\0')
+ continue; /* bash compat: $'...\0...' emits nothing */
+ } else { /* unrecognized "\z": encode both chars unless ' or " */
+ if (ch != '\'' && ch != '"') {
+ unrecognized:
+ o_addqchr(dest, '\\');
+ }
+ }
+ } /* if (\...) */
+ o_addqchr(dest, ch);
+ }
+
+ if (dest->length == start) {
+ /* $'', $'\0', $'\000\x00' and the like */
+ o_addchr(dest, SPECIAL_VAR_SYMBOL);
+ o_addchr(dest, SPECIAL_VAR_SYMBOL);
+ }
+
+ return 1;
+# undef as_string
+}
+#else
+# define parse_dollar_squote(as_string, dest, input) 0
+#endif /* BASH_DOLLAR_SQUOTE */
+#endif /* !__U_BOOT__ */
+
+/* Return code: 0 for OK, 1 for syntax error */
+#if BB_MMU
+#define parse_dollar(as_string, dest, input, quote_mask) \
+ parse_dollar(dest, input, quote_mask)
+#define as_string NULL
+#endif
+static int parse_dollar(o_string *as_string,
+ o_string *dest,
+ struct in_str *input, unsigned char quote_mask)
+{
+ int ch = i_peek_and_eat_bkslash_nl(input); /* first character after the $ */
+
+ debug_printf_parse("parse_dollar entered: ch='%c' quote_mask:0x%x\n", ch, quote_mask);
+ if (isalpha(ch)) {
+ make_var:
+ ch = i_getch(input);
+ nommu_addchr(as_string, ch);
+ /*make_var1:*/
+ o_addchr(dest, SPECIAL_VAR_SYMBOL);
+ while (1) {
+ debug_printf_parse(": '%c'\n", ch);
+ o_addchr(dest, ch | quote_mask);
+ quote_mask = 0;
+ ch = i_peek_and_eat_bkslash_nl(input);
+ if (!isalnum(ch) && ch != '_') {
+ /* End of variable name reached */
+ break;
+ }
+ ch = i_getch(input);
+ nommu_addchr(as_string, ch);
+ }
+ o_addchr(dest, SPECIAL_VAR_SYMBOL);
+ } else if (isdigit(ch)) {
+ make_one_char_var:
+ ch = i_getch(input);
+ nommu_addchr(as_string, ch);
+ o_addchr(dest, SPECIAL_VAR_SYMBOL);
+ debug_printf_parse(": '%c'\n", ch);
+ o_addchr(dest, ch | quote_mask);
+ o_addchr(dest, SPECIAL_VAR_SYMBOL);
+ } else switch (ch) {
+#ifndef __U_BOOT__
+ case '$': /* pid */
+ case '!': /* last bg pid */
+#endif /* !__U_BOOT__ */
+ case '?': /* last exit code */
+ case '#': /* number of args */
+ case '*': /* args */
+ case '@': /* args */
+ case '-': /* $- option flags set by set builtin or shell options (-i etc) */
+ goto make_one_char_var;
+ case '{': {
+ char len_single_ch;
+
+ o_addchr(dest, SPECIAL_VAR_SYMBOL);
+
+ ch = i_getch(input); /* eat '{' */
+ nommu_addchr(as_string, ch);
+
+ ch = i_getch_and_eat_bkslash_nl(input); /* first char after '{' */
+ /* It should be ${?}, or ${#var},
+ * or even ${?+subst} - operator acting on a special variable,
+ * or the beginning of variable name.
+ */
+ if (ch == EOF
+ || (!strchr(_SPECIAL_VARS_STR, ch) && !isalnum(ch)) /* not one of those */
+ ) {
+ bad_dollar_syntax:
+ syntax_error_unterm_str("${name}");
+ debug_printf_parse("parse_dollar return 0: unterminated ${name}\n");
+ return 0;
+ }
+ nommu_addchr(as_string, ch);
+ len_single_ch = ch;
+ ch |= quote_mask;
+
+ /* It's possible to just call add_till_closing_bracket() at this point.
+ * However, this regresses some of our testsuite cases
+ * which check invalid constructs like ${%}.
+ * Oh well... let's check that the var name part is fine... */
+
+ if (isdigit(len_single_ch)
+ || (len_single_ch == '#' && isdigit(i_peek_and_eat_bkslash_nl(input)))
+ ) {
+ /* Execution engine uses plain xatoi_positive()
+ * to interpret ${NNN} and {#NNN},
+ * check syntax here in the parser.
+ * (bash does not support expressions in ${#NN},
+ * e.g. ${#$var} and {#1:+WORD} are not supported).
+ */
+ unsigned cnt = 9; /* max 9 digits for ${NN} and 8 for {#NN} */
+ while (1) {
+ o_addchr(dest, ch);
+ debug_printf_parse(": '%c'\n", ch);
+ ch = i_getch_and_eat_bkslash_nl(input);
+ nommu_addchr(as_string, ch);
+ if (ch == '}')
+ break;
+ if (--cnt == 0)
+ goto bad_dollar_syntax;
+ if (len_single_ch != '#' && strchr(VAR_SUBST_OPS, ch))
+ /* ${NN<op>...} is valid */
+ goto eat_until_closing;
+ if (!isdigit(ch))
+ goto bad_dollar_syntax;
+ }
+ } else
+ while (1) {
+ unsigned pos;
+
+ o_addchr(dest, ch);
+ debug_printf_parse(": '%c'\n", ch);
+
+ ch = i_getch(input);
+ nommu_addchr(as_string, ch);
+ if (ch == '}')
+ break;
+#ifndef __U_BOOT__
+ if (!isalnum(ch) && ch != '_') {
+#else /* __U_BOOT__ */
+ /*
+ * In several places in U-Boot, we use variable like
+ * foo# (e.g. serial#), particularly in env.
+ * So, we need to authorize # to appear inside
+ * variable name and then expand this variable.
+ * NOTE Having # in variable name is not permitted in
+ * upstream hush but expansion will be done (even though
+ * the result will be empty).
+ */
+ if (!isalnum(ch) && ch != '_' && ch != '#') {
+#endif /* __U_BOOT__ */
+ unsigned end_ch;
+#ifndef __U_BOOT__
+ unsigned char last_ch;
+#endif /* !__U_BOOT__ */
+ /* handle parameter expansions
+ * http://www.opengroup.org/onlinepubs/009695399/utilities/xcu_chap02.html#tag_02_06_02
+ */
+ if (!strchr(VAR_SUBST_OPS, ch)) { /* ${var<bad_char>... */
+ if (len_single_ch != '#'
+ /*|| !strchr(SPECIAL_VARS_STR, ch) - disallow errors like ${#+} ? */
+ || i_peek(input) != '}'
+ ) {
+ goto bad_dollar_syntax;
+ }
+ /* else: it's "length of C" ${#C} op,
+ * where C is a single char
+ * special var name, e.g. ${#!}.
+ */
+ }
+ eat_until_closing:
+ /* Eat everything until closing '}' (or ':') */
+ end_ch = '}';
+#ifndef __U_BOOT__
+ if (BASH_SUBSTR
+ && ch == ':'
+ && !strchr(MINUS_PLUS_EQUAL_QUESTION, i_peek(input))
+ ) {
+ /* It's ${var:N[:M]} thing */
+ end_ch = '}' * 0x100 + ':';
+ }
+ if (BASH_PATTERN_SUBST
+ && ch == '/'
+ ) {
+ /* It's ${var/[/]pattern[/repl]} thing */
+ if (i_peek(input) == '/') { /* ${var//pattern[/repl]}? */
+ i_getch(input);
+ nommu_addchr(as_string, '/');
+ ch = '\\';
+ }
+ end_ch = '}' * 0x100 + '/';
+ }
+#endif /* !__U_BOOT__ */
+ o_addchr(dest, ch);
+ /* The pattern can't be empty.
+ * IOW: if the first char after "${v//" is a slash,
+ * it does not terminate the pattern - it's the first char of the pattern:
+ * v=/dev/ram; echo ${v////-} prints -dev-ram (pattern is "/")
+ * v=/dev/ram; echo ${v///r/-} prints /dev-am (pattern is "/r")
+ */
+ if (i_peek(input) == '/') {
+ o_addchr(dest, i_getch(input));
+ }
+#ifndef __U_BOOT__
+ again:
+#endif /* !__U_BOOT__ */
+ if (!BB_MMU)
+ pos = dest->length;
+#if ENABLE_HUSH_DOLLAR_OPS
+#ifndef __U_BOOT__
+ last_ch = add_till_closing_bracket(dest, input, end_ch);
+ if (last_ch == 0) /* error? */
+ return 0;
+#endif /* !__U_BOOT__ */
+#else
+# error Simple code to only allow ${var} is not implemented
+#endif
+ if (as_string) {
+ o_addstr(as_string, dest->data + pos);
+#ifndef __U_BOOT__
+ o_addchr(as_string, last_ch);
+#endif /* !__U_BOOT__ */
+ }
+
+#ifndef __U_BOOT__
+ if ((BASH_SUBSTR || BASH_PATTERN_SUBST)
+ && (end_ch & 0xff00)
+ ) {
+ /* close the first block: */
+ o_addchr(dest, SPECIAL_VAR_SYMBOL);
+ /* while parsing N from ${var:N[:M]}
+ * or pattern from ${var/[/]pattern[/repl]} */
+ if ((end_ch & 0xff) == last_ch) {
+ /* got ':' or '/'- parse the rest */
+ end_ch = '}';
+ goto again;
+ }
+ /* got '}' */
+ if (BASH_SUBSTR && end_ch == '}' * 0x100 + ':') {
+ /* it's ${var:N} - emulate :999999999 */
+ o_addstr(dest, "999999999");
+ } /* else: it's ${var/[/]pattern} */
+ }
+#endif /* !__U_BOOT__ */
+ break;
+ }
+ len_single_ch = 0; /* it can't be ${#C} op */
+ }
+ o_addchr(dest, SPECIAL_VAR_SYMBOL);
+ break;
+ }
+#if ENABLE_FEATURE_SH_MATH || ENABLE_HUSH_TICK
+ case '(': {
+ unsigned pos;
+
+ ch = i_getch(input);
+ nommu_addchr(as_string, ch);
+# if ENABLE_FEATURE_SH_MATH
+ if (i_peek_and_eat_bkslash_nl(input) == '(') {
+ ch = i_getch(input);
+ nommu_addchr(as_string, ch);
+ o_addchr(dest, SPECIAL_VAR_SYMBOL);
+ o_addchr(dest, quote_mask | '+');
+ if (!BB_MMU)
+ pos = dest->length;
+ if (!add_till_closing_bracket(dest, input, ')' | DOUBLE_CLOSE_CHAR_FLAG))
+ return 0; /* error */
+ if (as_string) {
+ o_addstr(as_string, dest->data + pos);
+ o_addchr(as_string, ')');
+ o_addchr(as_string, ')');
+ }
+ o_addchr(dest, SPECIAL_VAR_SYMBOL);
+ break;
+ }
+# endif
+# if ENABLE_HUSH_TICK
+ o_addchr(dest, SPECIAL_VAR_SYMBOL);
+ o_addchr(dest, quote_mask | '`');
+ if (!BB_MMU)
+ pos = dest->length;
+ if (!add_till_closing_bracket(dest, input, ')'))
+ return 0; /* error */
+ if (as_string) {
+ o_addstr(as_string, dest->data + pos);
+ o_addchr(as_string, ')');
+ }
+ o_addchr(dest, SPECIAL_VAR_SYMBOL);
+# endif
+ break;
+ }
+#endif
+ case '_':
+ goto make_var;
+#if 0
+ /* TODO: $_: */
+ /* $_ Shell or shell script name; or last argument of last command
+ * (if last command wasn't a pipe; if it was, bash sets $_ to "");
+ * but in command's env, set to full pathname used to invoke it */
+ ch = i_getch(input);
+ nommu_addchr(as_string, ch);
+ ch = i_peek_and_eat_bkslash_nl(input);
+ if (isalnum(ch)) { /* it's $_name or $_123 */
+ ch = '_';
+ goto make_var1;
+ }
+ /* else: it's $_ */
+#endif
+ default:
+ o_addQchr(dest, '$');
+ }
+ debug_printf_parse("parse_dollar return 1 (ok)\n");
+ return 1;
+#undef as_string
+}
+
+#if BB_MMU
+#define encode_string(as_string, dest, input, dquote_end) \
+ encode_string(dest, input, dquote_end)
+#define as_string NULL
+#endif
+static int encode_string(o_string *as_string,
+ o_string *dest,
+ struct in_str *input,
+ int dquote_end)
+{
+ int ch;
+ int next;
+
+ again:
+ ch = i_getch(input);
+ if (ch != EOF)
+ nommu_addchr(as_string, ch);
+ if (ch == dquote_end) { /* may be only '"' or EOF */
+ debug_printf_parse("encode_string return 1 (ok)\n");
+ return 1;
+ }
+ /* note: can't move it above ch == dquote_end check! */
+ if (ch == EOF) {
+ syntax_error_unterm_ch('"');
+ return 0; /* error */
+ }
+ next = '\0';
+ if (ch != '\n') {
+ next = i_peek(input);
+ }
+ debug_printf_parse("\" ch=%c (%d) escape=%d\n",
+ ch, ch, !!(dest->o_expflags & EXP_FLAG_ESC_GLOB_CHARS));
+ if (ch == '\\') {
+ if (next == EOF) {
+ /* Testcase: in interactive shell a file with
+ * echo "unterminated string\<eof>
+ * is sourced.
+ */
+ syntax_error_unterm_ch('"');
+ return 0; /* error */
+ }
+ /* bash:
+ * "The backslash retains its special meaning [in "..."]
+ * only when followed by one of the following characters:
+ * $, `, ", \, or <newline>. A double quote may be quoted
+ * within double quotes by preceding it with a backslash."
+ * NB: in (unquoted) heredoc, above does not apply to ",
+ * therefore we check for it by "next == dquote_end" cond.
+ */
+ if (next == dquote_end || strchr("$`\\\n", next)) {
+ ch = i_getch(input); /* eat next */
+ if (ch == '\n')
+ goto again; /* skip \<newline> */
+ } /* else: ch remains == '\\', and we double it below: */
+ o_addqchr(dest, ch); /* \c if c is a glob char, else just c */
+ nommu_addchr(as_string, ch);
+ goto again;
+ }
+ if (ch == '$') {
+ //if (parse_dollar_squote(as_string, dest, input))
+ // goto again;
+ if (!parse_dollar(as_string, dest, input, /*quote_mask:*/ 0x80)) {
+ debug_printf_parse("encode_string return 0: "
+ "parse_dollar returned 0 (error)\n");
+ return 0;
+ }
+ goto again;
+ }
+#if ENABLE_HUSH_TICK
+ if (ch == '`') {
+ //unsigned pos = dest->length;
+ o_addchr(dest, SPECIAL_VAR_SYMBOL);
+ o_addchr(dest, 0x80 | '`');
+ if (!add_till_backquote(dest, input, /*in_dquote:*/ dquote_end == '"'))
+ return 0; /* error */
+ o_addchr(dest, SPECIAL_VAR_SYMBOL);
+ //debug_printf_subst("SUBST RES3 '%s'\n", dest->data + pos);
+ goto again;
+ }
+#endif
+ o_addQchr(dest, ch);
+ if (ch == SPECIAL_VAR_SYMBOL) {
+ /* Convert "^C" to corresponding special variable reference */
+ o_addchr(dest, SPECIAL_VAR_QUOTED_SVS);
+ o_addchr(dest, SPECIAL_VAR_SYMBOL);
+ }
+ goto again;
+#undef as_string
+}
+
+/*
+ * Scan input until EOF or end_trigger char.
+ * Return a list of pipes to execute, or NULL on EOF
+ * or if end_trigger character is met.
+ * On syntax error, exit if shell is not interactive,
+ * reset parsing machinery and start parsing anew,
+ * or return ERR_PTR.
+ */
+static struct pipe *parse_stream(char **pstring,
+ int *heredoc_cnt_ptr,
+ struct in_str *input,
+ int end_trigger)
+{
+ struct parse_context ctx;
+ int heredoc_cnt;
+
+ /* Single-quote triggers a bypass of the main loop until its mate is
+ * found. When recursing, quote state is passed in via ctx.word.o_expflags.
+ */
+ debug_printf_parse("parse_stream entered, end_trigger='%c'\n",
+ end_trigger ? end_trigger : 'X');
+ debug_enter();
+
+ initialize_context(&ctx);
+
+ /* If very first arg is "" or '', ctx.word.data may end up NULL.
+ * Preventing this:
+ */
+ ctx.word.data = xzalloc(1); /* start as "", not as NULL */
+
+ /* We used to separate words on $IFS here. This was wrong.
+ * $IFS is used only for word splitting when $var is expanded,
+ * here we should use blank chars as separators, not $IFS
+ */
+
+ heredoc_cnt = 0;
+ while (1) {
+ const char *is_blank;
+ const char *is_special;
+ int ch;
+ int next;
+#ifndef __U_BOOT__
+ int redir_fd;
+ redir_type redir_style;
+#endif /* !__U_BOOT__ */
+
+ ch = i_getch(input);
+ debug_printf_parse(": ch=%c (%d) escape=%d\n",
+ ch, ch, !!(ctx.word.o_expflags & EXP_FLAG_ESC_GLOB_CHARS));
+ if (ch == EOF) {
+ struct pipe *pi;
+
+ if (heredoc_cnt) {
+ syntax_error_unterm_str("here document");
+ goto parse_error_exitcode1;
+ }
+ if (end_trigger == ')') {
+ syntax_error_unterm_ch('(');
+ goto parse_error_exitcode1;
+ }
+ if (end_trigger == '}') {
+ syntax_error_unterm_ch('{');
+ goto parse_error_exitcode1;
+ }
+
+ if (done_word(&ctx)) {
+ goto parse_error_exitcode1;
+ }
+ o_free_and_set_NULL(&ctx.word);
+ done_pipe(&ctx, PIPE_SEQ);
+ pi = ctx.list_head;
+ /* If we got nothing... */
+ /* (this makes bare "&" cmd a no-op.
+ * bash says: "syntax error near unexpected token '&'") */
+ if (pi->num_cmds == 0
+ IF_HAS_KEYWORDS(&& pi->res_word == RES_NONE)
+ ) {
+ free_pipe_list(pi);
+ pi = NULL;
+ }
+#if !BB_MMU
+ debug_printf_parse("as_string1 '%s'\n", ctx.as_string.data);
+ if (pstring)
+ *pstring = ctx.as_string.data;
+ else
+ o_free(&ctx.as_string);
+#endif
+ // heredoc_cnt must be 0 here anyway
+ //if (heredoc_cnt_ptr)
+ // *heredoc_cnt_ptr = heredoc_cnt;
+ debug_leave();
+ debug_printf_heredoc("parse_stream return heredoc_cnt:%d\n", heredoc_cnt);
+ debug_printf_parse("parse_stream return %p\n", pi);
+ return pi;
+ }
+
+ /* Handle "'" and "\" first, as they won't play nice with
+ * i_peek_and_eat_bkslash_nl() anyway:
+ * echo z\\
+ * and
+ * echo '\
+ * '
+ * would break.
+ */
+ if (ch == '\\') {
+ ch = i_getch(input);
+ if (ch == '\n')
+ continue; /* drop \<newline>, get next char */
+ nommu_addchr(&ctx.as_string, '\\');
+ if (ch == SPECIAL_VAR_SYMBOL) {
+ nommu_addchr(&ctx.as_string, ch);
+ /* Convert \^C to corresponding special variable reference */
+ goto case_SPECIAL_VAR_SYMBOL;
+ }
+ o_addchr(&ctx.word, '\\');
+ if (ch == EOF) {
+ /* Testcase: eval 'echo Ok\' */
+ /* bash-4.3.43 was removing backslash,
+ * but 4.4.19 retains it, most other shells too
+ */
+ continue; /* get next char */
+ }
+ /* Example: echo Hello \2>file
+ * we need to know that word 2 is quoted
+ */
+ ctx.word.has_quoted_part = 1;
+ nommu_addchr(&ctx.as_string, ch);
+ o_addchr(&ctx.word, ch);
+ continue; /* get next char */
+ }
+ nommu_addchr(&ctx.as_string, ch);
+ if (ch == '\'') {
+ ctx.word.has_quoted_part = 1;
+ next = i_getch(input);
+#ifndef __U_BOOT__
+ if (next == '\'' && !ctx.pending_redirect)
+ goto insert_empty_quoted_str_marker;
+#endif /* !__U_BOOT__ */
+
+ ch = next;
+ while (1) {
+ if (ch == EOF) {
+ syntax_error_unterm_ch('\'');
+ goto parse_error_exitcode1;
+ }
+ nommu_addchr(&ctx.as_string, ch);
+ if (ch == '\'')
+ break;
+ if (ch == SPECIAL_VAR_SYMBOL) {
+ /* Convert raw ^C to corresponding special variable reference */
+ o_addchr(&ctx.word, SPECIAL_VAR_SYMBOL);
+ o_addchr(&ctx.word, SPECIAL_VAR_QUOTED_SVS);
+ }
+ o_addqchr(&ctx.word, ch);
+ ch = i_getch(input);
+ }
+ continue; /* get next char */
+ }
+
+ next = '\0';
+ if (ch != '\n')
+ next = i_peek_and_eat_bkslash_nl(input);
+
+ is_special = "{}<>&|();#" /* special outside of "str" */
+#ifndef __U_BOOT__
+ "$\"" IF_HUSH_TICK("`") /* always special */
+#else /* __U_BOOT__ */
+ "$\""
+#endif /* __U_BOOT__ */
+ SPECIAL_VAR_SYMBOL_STR;
+#if defined(CMD_TEST2_SINGLEWORD_NOGLOB)
+ if (ctx.command->cmd_type == CMD_TEST2_SINGLEWORD_NOGLOB) {
+ /* In [[ ]], {}<>&|() are not special */
+ is_special += 8;
+ } else
+#endif
+ /* Are { and } special here? */
+ if (ctx.command->argv /* word [word]{... - non-special */
+ || ctx.word.length /* word{... - non-special */
+ || ctx.word.has_quoted_part /* ""{... - non-special */
+ || (next != ';' /* }; - special */
+ && next != ')' /* }) - special */
+ && next != '(' /* {( - special */
+ && next != '&' /* }& and }&& ... - special */
+ && next != '|' /* }|| ... - special */
+ && !strchr(defifs, next) /* {word - non-special */
+ )
+ ) {
+ /* They are not special, skip "{}" */
+ is_special += 2;
+ }
+ is_special = strchr(is_special, ch);
+ is_blank = strchr(defifs, ch);
+
+ if (!is_special && !is_blank) { /* ordinary char */
+ ordinary_char:
+ o_addQchr(&ctx.word, ch);
+ if ((ctx.is_assignment == MAYBE_ASSIGNMENT
+ || ctx.is_assignment == WORD_IS_KEYWORD)
+ && ch == '='
+ && endofname(ctx.word.data)[0] == '='
+ ) {
+ ctx.is_assignment = DEFINITELY_ASSIGNMENT;
+ debug_printf_parse("ctx.is_assignment='%s'\n", assignment_flag[ctx.is_assignment]);
+ }
+ continue;
+ }
+
+ if (is_blank) {
+#if ENABLE_HUSH_LINENO_VAR
+/* Case:
+ * "while ...; do<whitespace><newline>
+ * cmd ..."
+ * would think that "cmd" starts in <whitespace> -
+ * i.e., at the previous line.
+ * We need to skip all whitespace before newlines.
+ */
+ while (ch != '\n') {
+ next = i_peek(input);
+ if (next != ' ' && next != '\t' && next != '\n')
+ break; /* next char is not ws */
+ ch = i_getch(input);
+ }
+ /* ch == last eaten whitespace char */
+#endif
+ if (done_word(&ctx)) {
+ goto parse_error_exitcode1;
+ }
+ if (ch == '\n') {
+ /* Is this a case when newline is simply ignored?
+ * Some examples:
+ * "cmd | <newline> cmd ..."
+ * "case ... in <newline> word) ..."
+ */
+ if (IS_NULL_CMD(ctx.command)
+ && ctx.word.length == 0
+ && !ctx.word.has_quoted_part
+ && heredoc_cnt == 0
+ ) {
+ /* This newline can be ignored. But...
+ * Without check #1, interactive shell
+ * ignores even bare <newline>,
+ * and shows the continuation prompt:
+ * ps1_prompt$ <enter>
+ * ps2> _ <=== wrong, should be ps1
+ * Without check #2, "cmd & <newline>"
+ * is similarly mistreated.
+ * (BTW, this makes "cmd & cmd"
+ * and "cmd && cmd" non-orthogonal.
+ * Really, ask yourself, why
+ * "cmd && <newline>" doesn't start
+ * cmd but waits for more input?
+ * The only reason is that it might be
+ * a "cmd1 && <nl> cmd2 &" construct,
+ * cmd1 may need to run in BG).
+ */
+ struct pipe *pi = ctx.list_head;
+ if (pi->num_cmds != 0 /* check #1 */
+ && pi->followup != PIPE_BG /* check #2 */
+ ) {
+ continue;
+ }
+ }
+ /* Treat newline as a command separator. */
+ done_pipe(&ctx, PIPE_SEQ);
+ debug_printf_heredoc("heredoc_cnt:%d\n", heredoc_cnt);
+ if (heredoc_cnt) {
+ heredoc_cnt = fetch_heredocs(&ctx.as_string, ctx.list_head, heredoc_cnt, input);
+ if (heredoc_cnt != 0)
+ goto parse_error_exitcode1;
+ }
+ ctx.is_assignment = MAYBE_ASSIGNMENT;
+ debug_printf_parse("ctx.is_assignment='%s'\n", assignment_flag[ctx.is_assignment]);
+ ch = ';';
+ /* note: if (is_blank) continue;
+ * will still trigger for us */
+ }
+ }
+
+ /* "cmd}" or "cmd }..." without semicolon or &:
+ * } is an ordinary char in this case, even inside { cmd; }
+ * Pathological example: { ""}; } should exec "}" cmd
+ */
+#ifndef __U_BOOT__
+ if (ch == '}') {
+#else /* __U_BOOT__ */
+ if (ch == '}' || ch == ')') {
+#endif /* __U_BOOT__ */
+ if (ctx.word.length != 0 /* word} */
+ || ctx.word.has_quoted_part /* ""} */
+ ) {
+ goto ordinary_char;
+ }
+ if (!IS_NULL_CMD(ctx.command)) { /* cmd } */
+ /* Generally, there should be semicolon: "cmd; }"
+ * However, bash allows to omit it if "cmd" is
+ * a group. Examples:
+ * { { echo 1; } }
+ * {(echo 1)}
+ * { echo 0 >&2 | { echo 1; } }
+ * { while false; do :; done }
+ * { case a in b) ;; esac }
+ */
+ if (ctx.command->group)
+ goto term_group;
+ goto ordinary_char;
+ }
+ if (!IS_NULL_PIPE(ctx.pipe)) /* cmd | } */
+ /* Can't be an end of {cmd}, skip the check */
+ goto skip_end_trigger;
+ /* else: } does terminate a group */
+ }
+ term_group:
+ if (end_trigger && end_trigger == ch
+ && (ch != ';' || heredoc_cnt == 0)
+#if ENABLE_HUSH_CASE
+ && (ch != ')'
+ || ctx.ctx_res_w != RES_MATCH
+ || (!ctx.word.has_quoted_part && strcmp(ctx.word.data, "esac") == 0)
+ )
+#endif
+ ) {
+ if (done_word(&ctx)) {
+ goto parse_error_exitcode1;
+ }
+ done_pipe(&ctx, PIPE_SEQ);
+ ctx.is_assignment = MAYBE_ASSIGNMENT;
+ debug_printf_parse("ctx.is_assignment='%s'\n", assignment_flag[ctx.is_assignment]);
+ /* Do we sit outside of any if's, loops or case's? */
+ if (!HAS_KEYWORDS
+ IF_HAS_KEYWORDS(|| (ctx.ctx_res_w == RES_NONE && ctx.old_flag == 0))
+ ) {
+ o_free_and_set_NULL(&ctx.word);
+#if !BB_MMU
+ debug_printf_parse("as_string2 '%s'\n", ctx.as_string.data);
+ if (pstring)
+ *pstring = ctx.as_string.data;
+ else
+ o_free(&ctx.as_string);
+#endif
+ if (ch != ';' && IS_NULL_PIPE(ctx.list_head)) {
+ /* Example: bare "{ }", "()" */
+ G.last_exitcode = 2; /* bash compat */
+ syntax_error_unexpected_ch(ch);
+ goto parse_error;
+ }
+ if (heredoc_cnt_ptr)
+ *heredoc_cnt_ptr = heredoc_cnt;
+ debug_printf_heredoc("parse_stream return heredoc_cnt:%d\n", heredoc_cnt);
+ debug_printf_parse("parse_stream return %p: "
+ "end_trigger char found\n",
+ ctx.list_head);
+ debug_leave();
+ return ctx.list_head;
+ }
+ }
+
+ if (is_blank)
+ continue;
+
+ /* Catch <, > before deciding whether this word is
+ * an assignment. a=1 2>z b=2: b=2 is still assignment */
+ switch (ch) {
+#ifndef __U_BOOT__
+ case '>':
+ redir_fd = redirect_opt_num(&ctx.word);
+ if (done_word(&ctx)) {
+ goto parse_error_exitcode1;
+ }
+ redir_style = REDIRECT_OVERWRITE;
+ if (next == '>') {
+ redir_style = REDIRECT_APPEND;
+ ch = i_getch(input);
+ nommu_addchr(&ctx.as_string, ch);
+ }
+#if 0
+ else if (next == '(') {
+ syntax_error(">(process) not supported");
+ goto parse_error_exitcode1;
+ }
+#endif
+ if (parse_redirect(&ctx, redir_fd, redir_style, input))
+ goto parse_error_exitcode1;
+ continue; /* get next char */
+ case '<':
+ redir_fd = redirect_opt_num(&ctx.word);
+ if (done_word(&ctx)) {
+ goto parse_error_exitcode1;
+ }
+ redir_style = REDIRECT_INPUT;
+ if (next == '<') {
+ redir_style = REDIRECT_HEREDOC;
+ heredoc_cnt++;
+ debug_printf_heredoc("++heredoc_cnt=%d\n", heredoc_cnt);
+ ch = i_getch(input);
+ nommu_addchr(&ctx.as_string, ch);
+ } else if (next == '>') {
+ redir_style = REDIRECT_IO;
+ ch = i_getch(input);
+ nommu_addchr(&ctx.as_string, ch);
+ }
+#if 0
+ else if (next == '(') {
+ syntax_error("<(process) not supported");
+ goto parse_error_exitcode1;
+ }
+#endif
+ if (parse_redirect(&ctx, redir_fd, redir_style, input))
+ goto parse_error_exitcode1;
+ continue; /* get next char */
+#else /* __U_BOOT__ */
+ /*
+ * In U-Boot, '<' and '>' can be used in test command to test if
+ * a string is, alphabetically, before or after another.
+ * In 2021 Busybox hush, we will keep the same behavior and so not treat
+ * them as redirection operator.
+ *
+ * Indeed, in U-Boot, tests are handled by the test command and not by the
+ * shell code.
+ * So, better to give this character as input to test command.
+ *
+ * NOTE In my opinion, when you use '<' or '>' I am almost sure
+ * you wanted to use "-gt" or "-lt" in place, so thinking to
+ * escape these will make you should check your code (sh syntax
+ * at this level is, for me, error prone).
+ */
+ case '>':
+ fallthrough;
+ case '<':
+ o_addQchr(&ctx.word, ch);
+ continue;
+#endif /* __U_BOOT__ */
+ case '#':
+ if (ctx.word.length == 0 && !ctx.word.has_quoted_part) {
+ /* skip "#comment" */
+ /* note: we do not add it to &ctx.as_string */
+/* TODO: in bash:
+ * comment inside $() goes to the next \n, even inside quoted string (!):
+ * cmd "$(cmd2 #comment)" - syntax error
+ * cmd "`cmd2 #comment`" - ok
+ * We accept both (comment ends where command subst ends, in both cases).
+ */
+ while (1) {
+ ch = i_peek(input);
+ if (ch == '\n') {
+ nommu_addchr(&ctx.as_string, '\n');
+ break;
+ }
+ ch = i_getch(input);
+ if (ch == EOF)
+ break;
+ }
+ continue; /* get next char */
+ }
+ break;
+ }
+ skip_end_trigger:
+
+ if (ctx.is_assignment == MAYBE_ASSIGNMENT
+#ifndef __U_BOOT__
+ /* check that we are not in word in "a=1 2>word b=1": */
+ && !ctx.pending_redirect
+#endif /* !__U_BOOT__ */
+ ) {
+ /* ch is a special char and thus this word
+ * cannot be an assignment */
+ ctx.is_assignment = NOT_ASSIGNMENT;
+ debug_printf_parse("ctx.is_assignment='%s'\n", assignment_flag[ctx.is_assignment]);
+ }
+
+ /* Note: nommu_addchr(&ctx.as_string, ch) is already done */
+
+ switch (ch) {
+ case_SPECIAL_VAR_SYMBOL:
+ case SPECIAL_VAR_SYMBOL:
+ /* Convert raw ^C to corresponding special variable reference */
+ o_addchr(&ctx.word, SPECIAL_VAR_SYMBOL);
+ o_addchr(&ctx.word, SPECIAL_VAR_QUOTED_SVS);
+ /* fall through */
+ case '#':
+ /* non-comment #: "echo a#b" etc */
+ o_addchr(&ctx.word, ch);
+ continue; /* get next char */
+ case '$':
+#ifndef __U_BOOT__
+ if (parse_dollar_squote(&ctx.as_string, &ctx.word, input))
+ continue; /* get next char */
+#endif /* !__U_BOOT__ */
+ if (!parse_dollar(&ctx.as_string, &ctx.word, input, /*quote_mask:*/ 0)) {
+ debug_printf_parse("parse_stream parse error: "
+ "parse_dollar returned 0 (error)\n");
+ goto parse_error_exitcode1;
+ }
+ continue; /* get next char */
+ case '"':
+ ctx.word.has_quoted_part = 1;
+#ifndef __U_BOOT__
+ if (next == '"' && !ctx.pending_redirect) {
+#else /* __U_BOOT__ */
+ if (next == '"') {
+#endif /* __U_BOOT__ */
+ i_getch(input); /* eat second " */
+#ifndef __U_BOOT__
+ insert_empty_quoted_str_marker:
+#endif /* !__U_BOOT__ */
+ nommu_addchr(&ctx.as_string, next);
+ o_addchr(&ctx.word, SPECIAL_VAR_SYMBOL);
+ o_addchr(&ctx.word, SPECIAL_VAR_SYMBOL);
+ continue; /* get next char */
+ }
+ if (ctx.is_assignment == NOT_ASSIGNMENT)
+ ctx.word.o_expflags |= EXP_FLAG_ESC_GLOB_CHARS;
+ if (!encode_string(&ctx.as_string, &ctx.word, input, '"'))
+ goto parse_error_exitcode1;
+ ctx.word.o_expflags &= ~EXP_FLAG_ESC_GLOB_CHARS;
+ continue; /* get next char */
+#if ENABLE_HUSH_TICK
+ case '`': {
+ USE_FOR_NOMMU(unsigned pos;)
+
+ o_addchr(&ctx.word, SPECIAL_VAR_SYMBOL);
+ o_addchr(&ctx.word, '`');
+ USE_FOR_NOMMU(pos = ctx.word.length;)
+ if (!add_till_backquote(&ctx.word, input, /*in_dquote:*/ 0))
+ goto parse_error_exitcode1;
+# if !BB_MMU
+ o_addstr(&ctx.as_string, ctx.word.data + pos);
+ o_addchr(&ctx.as_string, '`');
+# endif
+ o_addchr(&ctx.word, SPECIAL_VAR_SYMBOL);
+ //debug_printf_subst("SUBST RES3 '%s'\n", ctx.word.data + pos);
+ continue; /* get next char */
+ }
+#endif
+ case ';':
+#if ENABLE_HUSH_CASE
+ case_semi:
+#endif
+ if (done_word(&ctx)) {
+ goto parse_error_exitcode1;
+ }
+ done_pipe(&ctx, PIPE_SEQ);
+#if ENABLE_HUSH_CASE
+ /* Eat multiple semicolons, detect
+ * whether it means something special */
+ while (1) {
+ ch = i_peek_and_eat_bkslash_nl(input);
+ if (ch != ';')
+ break;
+ ch = i_getch(input);
+ nommu_addchr(&ctx.as_string, ch);
+ if (ctx.ctx_res_w == RES_CASE_BODY) {
+ ctx.ctx_dsemicolon = 1;
+ ctx.ctx_res_w = RES_MATCH;
+ break;
+ }
+ }
+#endif
+ new_cmd:
+ /* We just finished a cmd. New one may start
+ * with an assignment */
+ ctx.is_assignment = MAYBE_ASSIGNMENT;
+ debug_printf_parse("ctx.is_assignment='%s'\n", assignment_flag[ctx.is_assignment]);
+ continue; /* get next char */
+ case '&':
+ if (done_word(&ctx)) {
+ goto parse_error_exitcode1;
+ }
+ if (next == '&') {
+ ch = i_getch(input);
+ nommu_addchr(&ctx.as_string, ch);
+ done_pipe(&ctx, PIPE_AND);
+ } else {
+ done_pipe(&ctx, PIPE_BG);
+ }
+ goto new_cmd;
+ case '|':
+ if (done_word(&ctx)) {
+ goto parse_error_exitcode1;
+ }
+#if ENABLE_HUSH_CASE
+ if (ctx.ctx_res_w == RES_MATCH)
+ break; /* we are in case's "word | word)" */
+#endif
+ if (next == '|') { /* || */
+ ch = i_getch(input);
+ nommu_addchr(&ctx.as_string, ch);
+ done_pipe(&ctx, PIPE_OR);
+ } else {
+ /* we could pick up a file descriptor choice here
+ * with redirect_opt_num(), but bash doesn't do it.
+ * "echo foo 2| cat" yields "foo 2". */
+ done_command(&ctx);
+ }
+ goto new_cmd;
+ case '(':
+#if ENABLE_HUSH_CASE
+ /* "case... in [(]word)..." - skip '(' */
+ if (ctx.ctx_res_w == RES_MATCH
+ && ctx.command->argv == NULL /* not (word|(... */
+ && ctx.word.length == 0 /* not word(... */
+ && ctx.word.has_quoted_part == 0 /* not ""(... */
+ ) {
+ continue; /* get next char */
+ }
+#endif
+ /* fall through */
+ case '{': {
+ int n = parse_group(&ctx, input, ch);
+ if (n < 0) {
+ goto parse_error_exitcode1;
+ }
+ debug_printf_heredoc("parse_group done, needs heredocs:%d\n", n);
+ heredoc_cnt += n;
+ goto new_cmd;
+ }
+ case ')':
+#if ENABLE_HUSH_CASE
+ if (ctx.ctx_res_w == RES_MATCH)
+ goto case_semi;
+#endif
+ case '}':
+ /* proper use of this character is caught by end_trigger:
+ * if we see {, we call parse_group(..., end_trigger='}')
+ * and it will match } earlier (not here). */
+ G.last_exitcode = 2;
+ syntax_error_unexpected_ch(ch);
+ goto parse_error;
+ default:
+ if (HUSH_DEBUG)
+ bb_error_msg_and_die("BUG: unexpected %c", ch);
+ }
+ } /* while (1) */
+
+ parse_error_exitcode1:
+ G.last_exitcode = 1;
+ parse_error:
+ {
+ struct parse_context *pctx;
+ IF_HAS_KEYWORDS(struct parse_context *p2;)
+
+ /* Clean up allocated tree.
+ * Sample for finding leaks on syntax error recovery path.
+ * Run it from interactive shell, watch pmap `pidof hush`.
+ * while if false; then false; fi; do break; fi
+ * Samples to catch leaks at execution:
+ * while if (true | { true;}); then echo ok; fi; do break; done
+ * while if (true | { true;}); then echo ok; fi; do (if echo ok; break; then :; fi) | cat; break; done
+ */
+ pctx = &ctx;
+ do {
+ /* Update pipe/command counts,
+ * otherwise freeing may miss some */
+ done_pipe(pctx, PIPE_SEQ);
+ debug_printf_clean("freeing list %p from ctx %p\n",
+ pctx->list_head, pctx);
+ debug_print_tree(pctx->list_head, 0);
+ free_pipe_list(pctx->list_head);
+ debug_printf_clean("freed list %p\n", pctx->list_head);
+#if !BB_MMU
+ o_free(&pctx->as_string);
+#endif
+ IF_HAS_KEYWORDS(p2 = pctx->stack;)
+ if (pctx != &ctx) {
+ free(pctx);
+ }
+ IF_HAS_KEYWORDS(pctx = p2;)
+ } while (HAS_KEYWORDS && pctx);
+
+ o_free(&ctx.word);
+#if !BB_MMU
+ if (pstring)
+ *pstring = NULL;
+#endif
+ debug_leave();
+ return ERR_PTR;
+ }
+}
+
+
+/*** Execution routines ***/
+
+/* Expansion can recurse, need forward decls: */
+#if !BASH_PATTERN_SUBST && !ENABLE_HUSH_CASE
+#define expand_string_to_string(str, EXP_flags, do_unbackslash) \
+ expand_string_to_string(str)
+#endif
+static char *expand_string_to_string(const char *str, int EXP_flags, int do_unbackslash);
+#if ENABLE_HUSH_TICK
+static int process_command_subs(o_string *dest, const char *s);
+#endif
+static int expand_vars_to_list(o_string *output, int n, char *arg);
+
+/* expand_strvec_to_strvec() takes a list of strings, expands
+ * all variable references within and returns a pointer to
+ * a list of expanded strings, possibly with larger number
+ * of strings. (Think VAR="a b"; echo $VAR).
+ * This new list is allocated as a single malloc block.
+ * NULL-terminated list of char* pointers is at the beginning of it,
+ * followed by strings themselves.
+ * Caller can deallocate entire list by single free(list). */
+
+/* A horde of its helpers come first: */
+
+static void o_addblock_duplicate_backslash(o_string *o, const char *str, int len)
+{
+ while (--len >= 0) {
+ char c = *str++;
+
+#if ENABLE_HUSH_BRACE_EXPANSION
+ if (c == '{' || c == '}') {
+ /* { -> \{, } -> \} */
+ o_addchr(o, '\\');
+ /* And now we want to add { or } and continue:
+ * o_addchr(o, c);
+ * continue;
+ * luckily, just falling through achieves this.
+ */
+ }
+#endif
+ o_addchr(o, c);
+ if (c == '\\') {
+ /* \z -> \\\z; \<eol> -> \\<eol> */
+ o_addchr(o, '\\');
+ if (len) {
+ len--;
+ o_addchr(o, '\\');
+ o_addchr(o, *str++);
+ }
+ }
+ }
+}
+
+/* Store given string, finalizing the word and starting new one whenever
+ * we encounter IFS char(s). This is used for expanding variable values.
+ * End-of-string does NOT finalize word: think about 'echo -$VAR-'.
+ * Return in output->ended_in_ifs:
+ * 1 - ended with IFS char, else 0 (this includes case of empty str).
+ */
+static int expand_on_ifs(o_string *output, int n, const char *str)
+{
+ int last_is_ifs = 0;
+
+ while (1) {
+ int word_len;
+
+ if (!*str) /* EOL - do not finalize word */
+ break;
+ word_len = strcspn(str, G.ifs);
+ if (word_len) {
+ /* We have WORD_LEN leading non-IFS chars */
+ if (!(output->o_expflags & EXP_FLAG_GLOB)) {
+ o_addblock(output, str, word_len);
+ } else {
+ /* Protect backslashes against globbing up :)
+ * Example: "v='\*'; echo b$v" prints "b\*"
+ * (and does not try to glob on "*")
+ */
+ o_addblock_duplicate_backslash(output, str, word_len);
+ /*/ Why can't we do it easier? */
+ /*o_addblock(output, str, word_len); - WRONG: "v='\*'; echo Z$v" prints "Z*" instead of "Z\*" */
+ /*o_addqblock(output, str, word_len); - WRONG: "v='*'; echo Z$v" prints "Z*" instead of Z* files */
+ }
+ last_is_ifs = 0;
+ str += word_len;
+ if (!*str) /* EOL - do not finalize word */
+ break;
+ }
+
+ /* We know str here points to at least one IFS char */
+ last_is_ifs = 1;
+ str += strspn(str, G.ifs_whitespace); /* skip IFS whitespace chars */
+ if (!*str) /* EOL - do not finalize word */
+ break;
+
+ if (G.ifs_whitespace != G.ifs /* usually false ($IFS is usually all whitespace), */
+ && strchr(G.ifs, *str) /* the second check would fail */
+ ) {
+ /* This is a non-whitespace $IFS char */
+ /* Skip it and IFS whitespace chars, start new word */
+ str++;
+ str += strspn(str, G.ifs_whitespace);
+ goto new_word;
+ }
+
+ /* Start new word... but not always! */
+ /* Case "v=' a'; echo ''$v": we do need to finalize empty word: */
+ if (output->has_quoted_part
+ /*
+ * Case "v=' a'; echo $v":
+ * here nothing precedes the space in $v expansion,
+ * therefore we should not finish the word
+ * (IOW: if there *is* word to finalize, only then do it):
+ * It's okay if this accesses the byte before first argv[]:
+ * past call to o_save_ptr() cleared it to zero byte
+ * (grep for -prev-ifs-check-).
+ */
+ || output->data[output->length - 1]
+ ) {
+ new_word:
+ o_addchr(output, '\0');
+ debug_print_list("expand_on_ifs", output, n);
+ n = o_save_ptr(output, n);
+ }
+ }
+
+ output->ended_in_ifs = last_is_ifs;
+ debug_print_list("expand_on_ifs[1]", output, n);
+ return n;
+}
+
+#ifndef __U_BOOT__
+/* Helper to expand $((...)) and heredoc body. These act as if
+ * they are in double quotes, with the exception that they are not :).
+ * Just the rules are similar: "expand only $var and `cmd`"
+ *
+ * Returns malloced string.
+ * As an optimization, we return NULL if expansion is not needed.
+ */
+static char *encode_then_expand_string(const char *str)
+{
+ char *exp_str;
+ struct in_str input;
+ o_string dest = NULL_O_STRING;
+ const char *cp;
+
+ cp = str;
+ for (;;) {
+ if (!*cp) return NULL; /* string has no special chars */
+ if (*cp == '$') break;
+ if (*cp == '\\') break;
+#if ENABLE_HUSH_TICK
+ if (*cp == '`') break;
+#endif
+ cp++;
+ }
+
+ /* We need to expand. Example:
+ * echo $(($a + `echo 1`)) $((1 + $((2)) ))
+ */
+ setup_string_in_str(&input, str);
+ encode_string(NULL, &dest, &input, EOF);
+//TODO: error check (encode_string returns 0 on error)?
+ //bb_error_msg("'%s' -> '%s'", str, dest.data);
+ exp_str = expand_string_to_string(dest.data,
+ EXP_FLAG_ESC_GLOB_CHARS,
+ /*unbackslash:*/ 1
+ );
+ //bb_error_msg("'%s' -> '%s'", dest.data, exp_str);
+ o_free(&dest);
+ return exp_str;
+}
+
+static const char *first_special_char_in_vararg(const char *cp)
+{
+ for (;;) {
+ if (!*cp) return NULL; /* string has no special chars */
+ if (*cp == '$') return cp;
+ if (*cp == '\\') return cp;
+ if (*cp == '\'') return cp;
+ if (*cp == '"') return cp;
+#if ENABLE_HUSH_TICK
+ if (*cp == '`') return cp;
+#endif
+ /* dquoted "${x:+ARG}" should not glob, therefore
+ * '*' et al require some non-literal processing: */
+ if (*cp == '*') return cp;
+ if (*cp == '?') return cp;
+ if (*cp == '[') return cp;
+ cp++;
+ }
+}
+
+/* Expanding ARG in ${var#ARG}, ${var%ARG}, or ${var/ARG/ARG}.
+ * These can contain single- and double-quoted strings,
+ * and treated as if the ARG string is initially unquoted. IOW:
+ * ${var#ARG} and "${var#ARG}" treat ARG the same (ARG can even be
+ * a dquoted string: "${var#"zz"}"), the difference only comes later
+ * (word splitting and globbing of the ${var...} result).
+ */
+#if !BASH_PATTERN_SUBST
+#define encode_then_expand_vararg(str, handle_squotes, do_unbackslash) \
+ encode_then_expand_vararg(str, handle_squotes)
+#endif
+static char *encode_then_expand_vararg(const char *str, int handle_squotes, int do_unbackslash)
+{
+#if !BASH_PATTERN_SUBST && ENABLE_HUSH_CASE
+ const int do_unbackslash = 0;
+#endif
+ char *exp_str;
+ struct in_str input;
+ o_string dest = NULL_O_STRING;
+
+ if (!first_special_char_in_vararg(str)) {
+ /* string has no special chars */
+ return NULL;
+ }
+
+ setup_string_in_str(&input, str);
+ dest.data = xzalloc(1); /* start as "", not as NULL */
+ exp_str = NULL;
+
+ for (;;) {
+ int ch;
+
+ ch = i_getch(&input);
+ debug_printf_parse("%s: ch=%c (%d) escape=%d\n",
+ __func__, ch, ch, !!dest.o_expflags);
+
+ if (!dest.o_expflags) {
+ if (ch == EOF)
+ break;
+ if (handle_squotes && ch == '\'') {
+ if (!add_till_single_quote_dquoted(&dest, &input))
+ goto ret; /* error */
+ continue;
+ }
+ }
+ if (ch == EOF) {
+ syntax_error_unterm_ch('"');
+ goto ret; /* error */
+ }
+ if (ch == '"') {
+ dest.o_expflags ^= EXP_FLAG_ESC_GLOB_CHARS;
+ continue;
+ }
+ if (ch == '\\') {
+ ch = i_getch(&input);
+ if (ch == EOF) {
+//example? error message? syntax_error_unterm_ch('"');
+ debug_printf_parse("%s: error: \\<eof>\n", __func__);
+ goto ret;
+ }
+ o_addqchr(&dest, ch);
+ continue;
+ }
+ if (ch == '$') {
+ if (parse_dollar_squote(NULL, &dest, &input))
+ continue;
+ if (!parse_dollar(NULL, &dest, &input, /*quote_mask:*/ 0x80)) {
+ debug_printf_parse("%s: error: parse_dollar returned 0 (error)\n", __func__);
+ goto ret;
+ }
+ continue;
+ }
+#if ENABLE_HUSH_TICK
+ if (ch == '`') {
+ //unsigned pos = dest->length;
+ o_addchr(&dest, SPECIAL_VAR_SYMBOL);
+ o_addchr(&dest, 0x80 | '`');
+ if (!add_till_backquote(&dest, &input,
+ /*in_dquote:*/ dest.o_expflags /* nonzero if EXP_FLAG_ESC_GLOB_CHARS set */
+ )
+ ) {
+ goto ret; /* error */
+ }
+ o_addchr(&dest, SPECIAL_VAR_SYMBOL);
+ //debug_printf_subst("SUBST RES3 '%s'\n", dest->data + pos);
+ continue;
+ }
+#endif
+ o_addQchr(&dest, ch);
+ } /* for (;;) */
+
+ debug_printf_parse("encode: '%s' -> '%s'\n", str, dest.data);
+ exp_str = expand_string_to_string(dest.data,
+ do_unbackslash ? EXP_FLAG_ESC_GLOB_CHARS : 0,
+ do_unbackslash
+ );
+ ret:
+ debug_printf_parse("expand: '%s' -> '%s'\n", dest.data, exp_str);
+ o_free(&dest);
+ return exp_str;
+}
+
+/* Expanding ARG in ${var+ARG}, ${var-ARG}
+ */
+static NOINLINE int encode_then_append_var_plusminus(o_string *output, int n,
+ char *str, int dquoted)
+{
+ struct in_str input;
+ o_string dest = NULL_O_STRING;
+
+ if (!first_special_char_in_vararg(str)
+ && '\0' == str[strcspn(str, G.ifs)]
+ ) {
+ /* string has no special chars
+ * && string has no $IFS chars
+ */
+ if (dquoted) {
+ /* Prints 1 (quoted expansion is a "" word, not nothing):
+ * set -- "${notexist-}"; echo $#
+ */
+ output->has_quoted_part = 1;
+ }
+ return expand_vars_to_list(output, n, str);
+ }
+
+ setup_string_in_str(&input, str);
+
+ for (;;) {
+ int ch;
+
+ ch = i_getch(&input);
+ debug_printf_parse("%s: ch=%c (%d) escape=%x\n",
+ __func__, ch, ch, dest.o_expflags);
+
+ if (!dest.o_expflags) {
+ if (ch == EOF)
+ break;
+ if (!dquoted && !(output->o_expflags & EXP_FLAG_SINGLEWORD) && strchr(G.ifs, ch)) {
+ /* PREFIX${x:d${e}f ...} and we met space: expand "d${e}f" and start new word.
+ * do not assume we are at the start of the word (PREFIX above).
+ */
+ if (dest.data) {
+ n = expand_vars_to_list(output, n, dest.data);
+ o_free_and_set_NULL(&dest);
+ o_addchr(output, '\0');
+ n = o_save_ptr(output, n); /* create next word */
+ } else
+ if (output->length != o_get_last_ptr(output, n)
+ || output->has_quoted_part
+ ) {
+ /* For these cases:
+ * f() { for i; do echo "|$i|"; done; }; x=x
+ * f a${x:+ }b # 1st condition
+ * |a|
+ * |b|
+ * f ""${x:+ }b # 2nd condition
+ * ||
+ * |b|
+ */
+ o_addchr(output, '\0');
+ n = o_save_ptr(output, n); /* create next word */
+ }
+ continue;
+ }
+ if (!dquoted && ch == '\'') {
+ if (!add_till_single_quote_dquoted(&dest, &input))
+ goto ret; /* error */
+ o_addchr(&dest, SPECIAL_VAR_SYMBOL);
+ o_addchr(&dest, SPECIAL_VAR_SYMBOL);
+ continue;
+ }
+ }
+ if (ch == EOF) {
+ syntax_error_unterm_ch('"');
+ goto ret; /* error */
+ }
+ if (ch == '"') {
+ dest.o_expflags ^= EXP_FLAG_ESC_GLOB_CHARS;
+ if (dest.o_expflags) {
+ o_addchr(&dest, SPECIAL_VAR_SYMBOL);
+ o_addchr(&dest, SPECIAL_VAR_SYMBOL);
+ }
+ continue;
+ }
+ if (ch == '\\') {
+ ch = i_getch(&input);
+ if (ch == EOF) {
+//example? error message? syntax_error_unterm_ch('"');
+ debug_printf_parse("%s: error: \\<eof>\n", __func__);
+ goto ret;
+ }
+ o_addqchr(&dest, ch);
+ continue;
+ }
+ if (ch == '$') {
+ if (!parse_dollar(NULL, &dest, &input, /*quote_mask:*/ (dest.o_expflags || dquoted) ? 0x80 : 0)) {
+ debug_printf_parse("%s: error: parse_dollar returned 0 (error)\n", __func__);
+ goto ret;
+ }
+ continue;
+ }
+#if ENABLE_HUSH_TICK
+ if (ch == '`') {
+ //unsigned pos = dest->length;
+ o_addchr(&dest, SPECIAL_VAR_SYMBOL);
+ o_addchr(&dest, (dest.o_expflags || dquoted) ? 0x80 | '`' : '`');
+ if (!add_till_backquote(&dest, &input,
+ /*in_dquote:*/ dest.o_expflags /* nonzero if EXP_FLAG_ESC_GLOB_CHARS set */
+ )
+ ) {
+ goto ret; /* error */
+ }
+ o_addchr(&dest, SPECIAL_VAR_SYMBOL);
+ //debug_printf_subst("SUBST RES3 '%s'\n", dest->data + pos);
+ continue;
+ }
+#endif
+ if (dquoted) {
+ /* Always glob-protect if in dquotes:
+ * x=x; echo "${x:+/bin/c*}" - prints: /bin/c*
+ * x=x; echo "${x:+"/bin/c*"}" - prints: /bin/c*
+ */
+ o_addqchr(&dest, ch);
+ } else {
+ /* Glob-protect only if char is quoted:
+ * x=x; echo ${x:+/bin/c*} - prints many filenames
+ * x=x; echo ${x:+"/bin/c*"} - prints: /bin/c*
+ */
+ o_addQchr(&dest, ch);
+ }
+ } /* for (;;) */
+
+ if (dest.data) {
+ n = expand_vars_to_list(output, n, dest.data);
+ }
+ ret:
+ o_free(&dest);
+ return n;
+}
+#endif /* !__U_BOOT__ */
+
+#ifndef __U_BOOT__
+#if ENABLE_FEATURE_SH_MATH
+static arith_t expand_and_evaluate_arith(const char *arg, const char **errmsg_p)
+{
+ arith_state_t math_state;
+ arith_t res;
+ char *exp_str;
+
+ math_state.lookupvar = get_local_var_value;
+ math_state.setvar = set_local_var_from_halves;
+ //math_state.endofname = endofname;
+ exp_str = encode_then_expand_string(arg);
+ res = arith(&math_state, exp_str ? exp_str : arg);
+ free(exp_str);
+ if (errmsg_p)
+ *errmsg_p = math_state.errmsg;
+ if (math_state.errmsg)
+ msg_and_die_if_script(math_state.errmsg);
+ return res;
+}
+#endif
+#endif /* !__U_BOOT__ */
+
+#ifndef __U_BOOT__
+#if BASH_PATTERN_SUBST
+/* ${var/[/]pattern[/repl]} helpers */
+static char *strstr_pattern(char *val, const char *pattern, int *size)
+{
+ int first_escaped = (pattern[0] == '\\' && pattern[1]);
+ /* "first_escaped" trick allows to treat e.g. "\*no_glob_chars"
+ * as literal too (as it is semi-common, and easy to accomodate
+ * by just using str + 1).
+ */
+ int sz = strcspn(pattern + first_escaped * 2, "*?[\\");
+ if ((pattern + first_escaped * 2)[sz] == '\0') {
+ /* Optimization for trivial patterns.
+ * Testcase for very slow replace (performs about 22k replaces):
+ * x=::::::::::::::::::::::
+ * x=$x$x;x=$x$x;x=$x$x;x=$x$x;x=$x$x;x=$x$x;x=$x$x;x=$x$x;x=$x$x;x=$x$x;echo ${#x}
+ * echo "${x//:/|}"
+ */
+ *size = sz + first_escaped;
+ return strstr(val, pattern + first_escaped);
+ }
+
+ while (1) {
+ char *end = scan_and_match(val, pattern, SCAN_MOVE_FROM_RIGHT + SCAN_MATCH_LEFT_HALF);
+ debug_printf_varexp("val:'%s' pattern:'%s' end:'%s'\n", val, pattern, end);
+ if (end) {
+ *size = end - val;
+ return val;
+ }
+ if (*val == '\0')
+ return NULL;
+ /* Optimization: if "*pat" did not match the start of "string",
+ * we know that "tring", "ring" etc will not match too:
+ */
+ if (pattern[0] == '*')
+ return NULL;
+ val++;
+ }
+}
+static char *replace_pattern(char *val, const char *pattern, const char *repl, char exp_op)
+{
+ char *result = NULL;
+ unsigned res_len = 0;
+ unsigned repl_len = strlen(repl);
+
+ /* Null pattern never matches, including if "var" is empty */
+ if (!pattern[0])
+ return result; /* NULL, no replaces happened */
+
+ while (1) {
+ int size;
+ char *s = strstr_pattern(val, pattern, &size);
+ if (!s)
+ break;
+
+ result = xrealloc(result, res_len + (s - val) + repl_len + 1);
+ strcpy(mempcpy(result + res_len, val, s - val), repl);
+ res_len += (s - val) + repl_len;
+ debug_printf_varexp("val:'%s' s:'%s' result:'%s'\n", val, s, result);
+
+ val = s + size;
+ if (exp_op == '/')
+ break;
+ }
+ if (*val && result) {
+ result = xrealloc(result, res_len + strlen(val) + 1);
+ strcpy(result + res_len, val);
+ debug_printf_varexp("val:'%s' result:'%s'\n", val, result);
+ }
+ debug_printf_varexp("result:'%s'\n", result);
+ return result;
+}
+#endif /* BASH_PATTERN_SUBST */
+#endif /* !__U_BOOT__ */
+
+static int append_str_maybe_ifs_split(o_string *output, int n,
+ int first_ch, const char *val)
+{
+ if (!(first_ch & 0x80)) { /* unquoted $VAR */
+ debug_printf_expand("unquoted '%s', output->o_escape:%d\n", val,
+ !!(output->o_expflags & EXP_FLAG_ESC_GLOB_CHARS));
+ if (val && val[0])
+ n = expand_on_ifs(output, n, val);
+ } else { /* quoted "$VAR" */
+ output->has_quoted_part = 1;
+ debug_printf_expand("quoted '%s', output->o_escape:%d\n", val,
+ !!(output->o_expflags & EXP_FLAG_ESC_GLOB_CHARS));
+ if (val && val[0])
+ o_addQstr(output, val);
+ }
+ return n;
+}
+
+/* Handle <SPECIAL_VAR_SYMBOL>varname...<SPECIAL_VAR_SYMBOL> construct.
+ */
+static NOINLINE int expand_one_var(o_string *output, int n,
+ int first_ch, char *arg, char **pp)
+{
+ const char *val;
+ char *to_be_freed;
+ char *p;
+ char *var;
+ char exp_op;
+ char exp_save = exp_save; /* for compiler */
+ char *exp_saveptr; /* points to expansion operator */
+ char *exp_word = exp_word; /* for compiler */
+ char arg0;
+
+ val = NULL;
+ to_be_freed = NULL;
+ p = *pp;
+ *p = '\0'; /* replace trailing SPECIAL_VAR_SYMBOL */
+ var = arg;
+ exp_saveptr = arg[1] ? strchr(VAR_ENCODED_SUBST_OPS, arg[1]) : NULL;
+ arg0 = arg[0];
+ arg[0] = (arg0 & 0x7f);
+ exp_op = 0;
+
+ if (arg[0] == '#' && arg[1] /* ${#...} but not ${#} */
+ && (!exp_saveptr /* and ( not(${#<op_char>...}) */
+ || (arg[2] == '\0' && strchr(SPECIAL_VARS_STR, arg[1])) /* or ${#C} "len of $C" ) */
+ ) /* NB: skipping ^^^specvar check mishandles ${#::2} */
+ ) {
+ /* It must be length operator: ${#var} */
+ var++;
+ exp_op = 'L';
+ } else {
+ /* Maybe handle parameter expansion */
+ if (exp_saveptr /* if 2nd char is one of expansion operators */
+ && strchr(NUMERIC_SPECVARS_STR, arg[0]) /* 1st char is special variable */
+ ) {
+ /* ${?:0}, ${#[:]%0} etc */
+ exp_saveptr = var + 1;
+ } else {
+ /* ${?}, ${var}, ${var:0}, ${var[:]%0} etc */
+ exp_saveptr = var+1 + strcspn(var+1, VAR_ENCODED_SUBST_OPS);
+ }
+ exp_op = exp_save = *exp_saveptr;
+#ifndef __U_BOOT__
+ if (exp_op) {
+ exp_word = exp_saveptr + 1;
+ if (exp_op == ':') {
+ exp_op = *exp_word++;
+//TODO: try ${var:} and ${var:bogus} in non-bash config
+ if (BASH_SUBSTR
+ && (!exp_op || !strchr(MINUS_PLUS_EQUAL_QUESTION, exp_op))
+ ) {
+ /* oops... it's ${var:N[:M]}, not ${var:?xxx} or some such */
+ exp_op = ':';
+ exp_word--;
+ }
+ }
+ *exp_saveptr = '\0';
+ } /* else: it's not an expansion op, but bare ${var} */
+#endif /* !__U_BOOT__ */
+ }
+
+ /* Look up the variable in question */
+ if (isdigit(var[0])) {
+ /* parse_dollar should have vetted var for us */
+#ifndef __U_BOOT__
+ int nn = xatoi_positive(var);
+#else /* __U_BOOT__ */
+ int nn = simple_strtoul(var, NULL, 10);
+#endif /* __U_BOOT__ */
+ if (nn < G.global_argc)
+ val = G.global_argv[nn];
+ /* else val remains NULL: $N with too big N */
+ } else {
+ switch (var[0]) {
+#ifndef __U_BOOT__
+ case '$': /* pid */
+ val = utoa(G.root_pid);
+ break;
+ case '!': /* bg pid */
+ val = G.last_bg_pid ? utoa(G.last_bg_pid) : "";
+ break;
+#endif /* !__U_BOOT__ */
+ case '?': /* exitcode */
+ val = utoa(G.last_exitcode);
+ break;
+ case '#': /* argc */
+ val = utoa(G.global_argc ? G.global_argc-1 : 0);
+ break;
+#ifndef __U_BOOT__
+ case '-': { /* active options */
+ /* Check set_mode() to see what option chars we support */
+ char *cp;
+ val = cp = G.optstring_buf;
+ if (G.o_opt[OPT_O_ERREXIT])
+ *cp++ = 'e';
+ if (G_interactive_fd)
+ *cp++ = 'i';
+ if (G_x_mode)
+ *cp++ = 'x';
+ /* If G.o_opt[OPT_O_NOEXEC] is true,
+ * commands read but are not executed,
+ * so $- can not execute too, 'n' is never seen in $-.
+ */
+ if (G.opt_c)
+ *cp++ = 'c';
+ if (G.opt_s)
+ *cp++ = 's';
+ *cp = '\0';
+ break;
+ }
+#endif /* !__U_BOOT__ */
+ default:
+#ifndef __U_BOOT__
+ val = get_local_var_value(var);
+#else /* __U_BOOT__ */
+ /*
+ * Environment variable set with setenv* have to be
+ * expanded.
+ * So, we first search if the variable exists in
+ * environment, if this is not the case, we default to
+ * local value.
+ */
+ val = env_get(var);
+ if (!val)
+ val = get_local_var_value(var);
+#endif /* __U_BOOT__ */
+ }
+ }
+
+#ifndef __U_BOOT__
+ /* Handle any expansions */
+ if (exp_op == 'L') {
+ reinit_unicode_for_hush();
+ debug_printf_expand("expand: length(%s)=", val);
+ val = utoa(val ? unicode_strlen(val) : 0);
+ debug_printf_expand("%s\n", val);
+ } else if (exp_op) {
+ if (exp_op == '%' || exp_op == '#') {
+ /* Standard-mandated substring removal ops:
+ * ${parameter%word} - remove smallest suffix pattern
+ * ${parameter%%word} - remove largest suffix pattern
+ * ${parameter#word} - remove smallest prefix pattern
+ * ${parameter##word} - remove largest prefix pattern
+ *
+ * Word is expanded to produce a glob pattern.
+ * Then var's value is matched to it and matching part removed.
+ */
+ /* bash compat: if x is "" and no shrinking of it is possible,
+ * inner ${...} is not evaluated. Example:
+ * unset b; : ${a%${b=B}}; echo $b
+ * assignment b=B only happens if $a is not "".
+ */
+ if (val && val[0]) {
+ char *t;
+ char *exp_exp_word;
+ char *loc;
+ unsigned scan_flags = pick_scan(exp_op, *exp_word);
+ if (exp_op == *exp_word) /* ## or %% */
+ exp_word++;
+ debug_printf_expand("expand: exp_word:'%s'\n", exp_word);
+ exp_exp_word = encode_then_expand_vararg(exp_word, /*handle_squotes:*/ 1, /*unbackslash:*/ 0);
+ if (exp_exp_word)
+ exp_word = exp_exp_word;
+ debug_printf_expand("expand: exp_word:'%s'\n", exp_word);
+ /*
+ * HACK ALERT. We depend here on the fact that
+ * G.global_argv and results of utoa and get_local_var_value
+ * are actually in writable memory:
+ * scan_and_match momentarily stores NULs there.
+ */
+ t = (char*)val;
+ loc = scan_and_match(t, exp_word, scan_flags);
+ debug_printf_expand("op:%c str:'%s' pat:'%s' res:'%s'\n", exp_op, t, exp_word, loc);
+ free(exp_exp_word);
+ if (loc) { /* match was found */
+ if (scan_flags & SCAN_MATCH_LEFT_HALF) /* #[#] */
+ val = loc; /* take right part */
+ else /* %[%] */
+ val = to_be_freed = xstrndup(val, loc - val); /* left */
+ }
+ }
+ }
+#if BASH_PATTERN_SUBST
+ else if (exp_op == '/' || exp_op == '\\') {
+ /* It's ${var/[/]pattern[/repl]} thing.
+ * Note that in encoded form it has TWO parts:
+ * var/pattern<SPECIAL_VAR_SYMBOL>repl<SPECIAL_VAR_SYMBOL>
+ * and if // is used, it is encoded as \:
+ * var\pattern<SPECIAL_VAR_SYMBOL>repl<SPECIAL_VAR_SYMBOL>
+ */
+ /* bash compat: if var is "", both pattern and repl
+ * are still evaluated, if it is unset, then not:
+ * unset b; a=; : ${a/z/${b=3}}; echo $b # b=3
+ * unset b; unset a; : ${a/z/${b=3}}; echo $b # b not set
+ */
+ if (val /*&& val[0]*/) {
+ /* pattern uses non-standard expansion.
+ * repl should be unbackslashed and globbed
+ * by the usual expansion rules:
+ * >az >bz
+ * v='a bz'; echo "${v/a*z/a*z}" #prints "a*z"
+ * v='a bz'; echo "${v/a*z/\z}" #prints "z"
+ * v='a bz'; echo ${v/a*z/a*z} #prints "az"
+ * v='a bz'; echo ${v/a*z/\z} #prints "z"
+ * (note that a*z _pattern_ is never globbed!)
+ */
+ char *pattern, *repl, *t;
+ pattern = encode_then_expand_vararg(exp_word, /*handle_squotes:*/ 1, /*unbackslash:*/ 0);
+ if (!pattern)
+ pattern = xstrdup(exp_word);
+ debug_printf_varexp("pattern:'%s'->'%s'\n", exp_word, pattern);
+ *p++ = SPECIAL_VAR_SYMBOL;
+ exp_word = p;
+ p = strchr(p, SPECIAL_VAR_SYMBOL);
+ *p = '\0';
+ repl = encode_then_expand_vararg(exp_word, /*handle_squotes:*/ 1, /*unbackslash:*/ 1);
+ debug_printf_varexp("repl:'%s'->'%s'\n", exp_word, repl);
+ /* HACK ALERT. We depend here on the fact that
+ * G.global_argv and results of utoa and get_local_var_value
+ * are actually in writable memory:
+ * replace_pattern momentarily stores NULs there. */
+ t = (char*)val;
+ to_be_freed = replace_pattern(t,
+ pattern,
+ (repl ? repl : exp_word),
+ exp_op);
+ if (to_be_freed) /* at least one replace happened */
+ val = to_be_freed;
+ free(pattern);
+ free(repl);
+ } else {
+ /* Unset variable always gives nothing */
+ // a=; echo ${a/*/w} # "w"
+ // unset a; echo ${a/*/w} # ""
+ /* Just skip "replace" part */
+ *p++ = SPECIAL_VAR_SYMBOL;
+ p = strchr(p, SPECIAL_VAR_SYMBOL);
+ *p = '\0';
+ }
+ }
+#endif /* BASH_PATTERN_SUBST */
+ else if (exp_op == ':') {
+#if BASH_SUBSTR && ENABLE_FEATURE_SH_MATH
+ /* It's ${var:N[:M]} bashism.
+ * Note that in encoded form it has TWO parts:
+ * var:N<SPECIAL_VAR_SYMBOL>M<SPECIAL_VAR_SYMBOL>
+ */
+ arith_t beg, len;
+ unsigned vallen;
+ const char *errmsg;
+
+ beg = expand_and_evaluate_arith(exp_word, &errmsg);
+ if (errmsg)
+ goto empty_result;
+ debug_printf_varexp("beg:'%s'=%lld\n", exp_word, (long long)beg);
+ *p++ = SPECIAL_VAR_SYMBOL;
+ exp_word = p;
+ p = strchr(p, SPECIAL_VAR_SYMBOL);
+ *p = '\0';
+ vallen = val ? strlen(val) : 0;
+ if (beg < 0) {
+ /* negative beg counts from the end */
+ beg = (arith_t)vallen + beg;
+ }
+ /* If expansion will be empty, do not even evaluate len */
+ if (!val || beg < 0 || beg > vallen) {
+ /* Why > vallen, not >=? bash:
+ * unset b; a=ab; : ${a:2:${b=3}}; echo $b # "", b=3 (!!!)
+ * unset b; a=a; : ${a:2:${b=3}}; echo $b # "", b not set
+ */
+ goto empty_result;
+ }
+ len = expand_and_evaluate_arith(exp_word, &errmsg);
+ if (errmsg)
+ goto empty_result;
+ debug_printf_varexp("len:'%s'=%lld\n", exp_word, (long long)len);
+ debug_printf_varexp("from val:'%s'\n", val);
+ if (len < 0) {
+ /* in bash, len=-n means strlen()-n */
+ len = (arith_t)vallen - beg + len;
+ if (len < 0) /* bash compat */
+ msg_and_die_if_script("%s: substring expression < 0", var);
+ }
+ if (len <= 0 || !val /*|| beg >= vallen*/) {
+ empty_result:
+ val = NULL;
+ } else {
+ /* Paranoia. What if user entered 9999999999999
+ * which fits in arith_t but not int? */
+ if (len > INT_MAX)
+ len = INT_MAX;
+ val = to_be_freed = xstrndup(val + beg, len);
+ }
+ debug_printf_varexp("val:'%s'\n", val);
+#else /* not (HUSH_SUBSTR_EXPANSION && FEATURE_SH_MATH) */
+ msg_and_die_if_script("malformed ${%s:...}", var);
+ val = NULL;
+#endif
+ } else { /* one of "-=+?" */
+ /* Standard-mandated substitution ops:
+ * ${var?word} - indicate error if unset
+ * If var is unset, word (or a message indicating it is unset
+ * if word is null) is written to standard error
+ * and the shell exits with a non-zero exit status.
+ * Otherwise, the value of var is substituted.
+ * ${var-word} - use default value
+ * If var is unset, word is substituted.
+ * ${var=word} - assign and use default value
+ * If var is unset, word is assigned to var.
+ * In all cases, final value of var is substituted.
+ * ${var+word} - use alternative value
+ * If var is unset, null is substituted.
+ * Otherwise, word is substituted.
+ *
+ * Word is subjected to tilde expansion, parameter expansion,
+ * command substitution, and arithmetic expansion.
+ * If word is not needed, it is not expanded.
+ *
+ * Colon forms (${var:-word}, ${var:=word} etc) do the same,
+ * but also treat null var as if it is unset.
+ *
+ * Word-splitting and single quote behavior:
+ *
+ * $ f() { for i; do echo "|$i|"; done; }
+ *
+ * $ x=; f ${x:?'x y' z}; echo $?
+ * bash: x: x y z # neither f nor "echo $?" executes
+ * (if interactive, bash does not exit, but merely aborts to prompt. $? is set to 1)
+ * $ x=; f "${x:?'x y' z}"
+ * bash: x: x y z # dash prints: dash: x: 'x y' z
+ *
+ * $ x=; f ${x:='x y' z}
+ * |x|
+ * |y|
+ * |z|
+ * $ x=; f "${x:='x y' z}"
+ * |'x y' z|
+ *
+ * $ x=x; f ${x:+'x y' z}
+ * |x y|
+ * |z|
+ * $ x=x; f "${x:+'x y' z}"
+ * |'x y' z|
+ *
+ * $ x=; f ${x:-'x y' z}
+ * |x y|
+ * |z|
+ * $ x=; f "${x:-'x y' z}"
+ * |'x y' z|
+ */
+ int use_word = (!val || ((exp_save == ':') && !val[0]));
+ if (exp_op == '+')
+ use_word = !use_word;
+ debug_printf_expand("expand: op:%c (null:%s) test:%i\n", exp_op,
+ (exp_save == ':') ? "true" : "false", use_word);
+ if (use_word) {
+ if (exp_op == '+' || exp_op == '-') {
+ /* ${var+word} - use alternative value */
+ /* ${var-word} - use default value */
+ n = encode_then_append_var_plusminus(output, n, exp_word,
+ /*dquoted:*/ (arg0 & 0x80)
+ );
+ val = NULL;
+ } else {
+ /* ${var?word} - indicate error if unset */
+ /* ${var=word} - assign and use default value */
+ to_be_freed = encode_then_expand_vararg(exp_word,
+ /*handle_squotes:*/ !(arg0 & 0x80),
+ /*unbackslash:*/ 0
+ );
+ if (to_be_freed)
+ exp_word = to_be_freed;
+ if (exp_op == '?') {
+ /* mimic bash message */
+ msg_and_die_if_script("%s: %s",
+ var,
+ exp_word[0]
+ ? exp_word
+ : "parameter null or not set"
+ /* ash has more specific messages, a-la: */
+ /*: (exp_save == ':' ? "parameter null or not set" : "parameter not set")*/
+ );
+//TODO: how interactive bash aborts expansion mid-command?
+//It aborts the entire line, returns to prompt:
+// $ f() { for i; do echo "|$i|"; done; }; x=; f "${x:?'x y' z}"; echo YO
+// bash: x: x y z
+// $
+// ("echo YO" is not executed, neither the f function call)
+ } else {
+ val = exp_word;
+ }
+ if (exp_op == '=') {
+ /* ${var=[word]} or ${var:=[word]} */
+ if (isdigit(var[0]) || var[0] == '#') {
+ /* mimic bash message */
+ msg_and_die_if_script("$%s: cannot assign in this way", var);
+ val = NULL;
+ } else {
+ char *new_var = xasprintf("%s=%s", var, val);
+ set_local_var0(new_var);
+ }
+ }
+ }
+ }
+ } /* one of "-=+?" */
+
+ *exp_saveptr = exp_save;
+ } /* if (exp_op) */
+
+#endif /* !__U_BOOT__ */
+ arg[0] = arg0;
+ *pp = p;
+
+ n = append_str_maybe_ifs_split(output, n, first_ch, val);
+
+ free(to_be_freed);
+ return n;
+}
+
+/* Expand all variable references in given string, adding words to list[]
+ * at n, n+1,... positions. Return updated n (so that list[n] is next one
+ * to be filled). This routine is extremely tricky: has to deal with
+ * variables/parameters with whitespace, $* and $@, and constructs like
+ * 'echo -$*-'. If you play here, you must run testsuite afterwards! */
+static NOINLINE int expand_vars_to_list(o_string *output, int n, char *arg)
+{
+ /* output->o_expflags & EXP_FLAG_SINGLEWORD (0x80) if we are in
+ * expansion of right-hand side of assignment == 1-element expand.
+ */
+ char cant_be_null = 0; /* only bit 0x80 matters */
+ char *p;
+
+ debug_printf_expand("expand_vars_to_list: arg:'%s' singleword:%x\n", arg,
+ !!(output->o_expflags & EXP_FLAG_SINGLEWORD));
+ debug_print_list("expand_vars_to_list[0]", output, n);
+
+ while ((p = strchr(arg, SPECIAL_VAR_SYMBOL)) != NULL) {
+ char first_ch;
+#if ENABLE_FEATURE_SH_MATH
+ char arith_buf[sizeof(arith_t)*3 + 2];
+#endif
+
+ if (output->ended_in_ifs) {
+ o_addchr(output, '\0');
+ n = o_save_ptr(output, n);
+ output->ended_in_ifs = 0;
+ }
+
+ o_addblock(output, arg, p - arg);
+ debug_print_list("expand_vars_to_list[1]", output, n);
+ arg = ++p;
+ p = strchr(p, SPECIAL_VAR_SYMBOL);
+
+ /* Fetch special var name (if it is indeed one of them)
+ * and quote bit, force the bit on if singleword expansion -
+ * important for not getting v=$@ expand to many words. */
+ first_ch = arg[0] | (output->o_expflags & EXP_FLAG_SINGLEWORD);
+
+ /* Is this variable quoted and thus expansion can't be null?
+ * "$@" is special. Even if quoted, it can still
+ * expand to nothing (not even an empty string),
+ * thus it is excluded. */
+ if ((first_ch & 0x7f) != '@')
+ cant_be_null |= first_ch;
+
+ switch (first_ch & 0x7f) {
+ /* Highest bit in first_ch indicates that var is double-quoted */
+ case '*':
+ case '@': {
+ int i;
+#ifndef __U_BOOT__
+ if (!G.global_argv[1])
+#else /* __U_BOOT__ */
+ if (!G.global_argv || !G.global_argv[1])
+#endif /* __U_BOOT__ */
+ break;
+ i = 1;
+ cant_be_null |= first_ch; /* do it for "$@" _now_, when we know it's not empty */
+ if (!(first_ch & 0x80)) { /* unquoted $* or $@ */
+ while (G.global_argv[i]) {
+ n = expand_on_ifs(output, n, G.global_argv[i]);
+ debug_printf_expand("expand_vars_to_list: argv %d (last %d)\n", i, G.global_argc - 1);
+ if (G.global_argv[i++][0] && G.global_argv[i]) {
+ /* this argv[] is not empty and not last:
+ * put terminating NUL, start new word */
+ o_addchr(output, '\0');
+ debug_print_list("expand_vars_to_list[2]", output, n);
+ n = o_save_ptr(output, n);
+ debug_print_list("expand_vars_to_list[3]", output, n);
+ }
+ }
+ } else
+ /* If EXP_FLAG_SINGLEWORD, we handle assignment 'a=....$@.....'
+ * and in this case should treat it like '$*' - see 'else...' below */
+ if (first_ch == (char)('@'|0x80) /* quoted $@ */
+ && !(output->o_expflags & EXP_FLAG_SINGLEWORD) /* not v="$@" case */
+ ) {
+ while (1) {
+ o_addQstr(output, G.global_argv[i]);
+ if (++i >= G.global_argc)
+ break;
+ o_addchr(output, '\0');
+ debug_print_list("expand_vars_to_list[4]", output, n);
+ n = o_save_ptr(output, n);
+ }
+ } else { /* quoted $* (or v="$@" case): add as one word */
+ while (1) {
+ o_addQstr(output, G.global_argv[i]);
+ if (!G.global_argv[++i])
+ break;
+ if (G.ifs[0])
+ o_addchr(output, G.ifs[0]);
+ }
+ output->has_quoted_part = 1;
+ }
+ break;
+ }
+ case SPECIAL_VAR_SYMBOL: {
+ /* <SPECIAL_VAR_SYMBOL><SPECIAL_VAR_SYMBOL> */
+ /* "Empty variable", used to make "" etc to not disappear */
+ output->has_quoted_part = 1;
+ cant_be_null = 0x80;
+ arg++;
+ break;
+ }
+ case SPECIAL_VAR_QUOTED_SVS:
+ /* <SPECIAL_VAR_SYMBOL><SPECIAL_VAR_QUOTED_SVS><SPECIAL_VAR_SYMBOL> */
+ /* "^C variable", represents literal ^C char (possible in scripts) */
+ o_addchr(output, SPECIAL_VAR_SYMBOL);
+ arg++;
+ break;
+#if ENABLE_HUSH_TICK
+ case '`': {
+ /* <SPECIAL_VAR_SYMBOL>`cmd<SPECIAL_VAR_SYMBOL> */
+ o_string subst_result = NULL_O_STRING;
+
+ *p = '\0'; /* replace trailing <SPECIAL_VAR_SYMBOL> */
+ arg++;
+ /* Can't just stuff it into output o_string,
+ * expanded result may need to be globbed
+ * and $IFS-split */
+ debug_printf_subst("SUBST '%s' first_ch %x\n", arg, first_ch);
+ G.last_exitcode = process_command_subs(&subst_result, arg);
+ G.expand_exitcode = G.last_exitcode;
+ debug_printf_subst("SUBST RES:%d '%s'\n", G.last_exitcode, subst_result.data);
+ n = append_str_maybe_ifs_split(output, n, first_ch, subst_result.data);
+ o_free(&subst_result);
+ break;
+ }
+#endif
+#if ENABLE_FEATURE_SH_MATH
+ case '+': {
+ /* <SPECIAL_VAR_SYMBOL>+arith<SPECIAL_VAR_SYMBOL> */
+ arith_t res;
+
+ arg++; /* skip '+' */
+ *p = '\0'; /* replace trailing <SPECIAL_VAR_SYMBOL> */
+ debug_printf_subst("ARITH '%s' first_ch %x\n", arg, first_ch);
+ res = expand_and_evaluate_arith(arg, NULL);
+ debug_printf_subst("ARITH RES '"ARITH_FMT"'\n", res);
+ sprintf(arith_buf, ARITH_FMT, res);
+ if (res < 0
+ && first_ch == (char)('+'|0x80)
+ /* && (output->o_expflags & EXP_FLAG_ESC_GLOB_CHARS) */
+ ) {
+ /* Quoted negative ariths, like filename[0"$((-9))"],
+ * should not be interpreted as glob ranges.
+ * Convert leading '-' to '\-':
+ */
+ o_grow_by(output, 1);
+ output->data[output->length++] = '\\';
+ }
+ o_addstr(output, arith_buf);
+ break;
+ }
+#endif
+ default:
+ /* <SPECIAL_VAR_SYMBOL>varname[ops]<SPECIAL_VAR_SYMBOL> */
+ n = expand_one_var(output, n, first_ch, arg, &p);
+ break;
+ } /* switch (char after <SPECIAL_VAR_SYMBOL>) */
+
+ /* Restore NULL'ed SPECIAL_VAR_SYMBOL.
+ * Do the check to avoid writing to a const string. */
+ if (*p != SPECIAL_VAR_SYMBOL)
+ *p = SPECIAL_VAR_SYMBOL;
+ arg = ++p;
+ } /* end of "while (SPECIAL_VAR_SYMBOL is found) ..." */
+
+ if (*arg) {
+ /* handle trailing string */
+ if (output->ended_in_ifs) {
+ o_addchr(output, '\0');
+ n = o_save_ptr(output, n);
+ }
+ debug_print_list("expand_vars_to_list[a]", output, n);
+ /* this part is literal, and it was already pre-quoted
+ * if needed (much earlier), do not use o_addQstr here!
+ */
+ o_addstr(output, arg);
+ debug_print_list("expand_vars_to_list[b]", output, n);
+ } else
+ if (output->length == o_get_last_ptr(output, n) /* expansion is empty */
+ && !(cant_be_null & 0x80) /* and all vars were not quoted */
+ && !output->has_quoted_part
+ ) {
+ n--;
+ /* allow to reuse list[n] later without re-growth */
+ output->has_empty_slot = 1;
+ }
+
+ return n;
+}
+
+static char **expand_variables(char **argv, unsigned expflags)
+{
+ int n;
+ char **list;
+ o_string output = NULL_O_STRING;
+
+ output.o_expflags = expflags;
+
+ n = 0;
+ for (;;) {
+ /* go to next list[n] */
+ output.ended_in_ifs = 0;
+ n = o_save_ptr(&output, n);
+
+ if (!*argv)
+ break;
+
+ /* expand argv[i] */
+ n = expand_vars_to_list(&output, n, *argv++);
+ /* if (!output->has_empty_slot) -- need this?? */
+ o_addchr(&output, '\0');
+ }
+ debug_print_list("expand_variables", &output, n);
+
+ /* output.data (malloced in one block) gets returned in "list" */
+ list = o_finalize_list(&output, n);
+ debug_print_strings("expand_variables[1]", list);
+ return list;
+}
+
+static char **expand_strvec_to_strvec(char **argv)
+{
+ return expand_variables(argv, EXP_FLAG_GLOB | EXP_FLAG_ESC_GLOB_CHARS);
+}
+
+#if defined(CMD_SINGLEWORD_NOGLOB) || defined(CMD_TEST2_SINGLEWORD_NOGLOB)
+static char **expand_strvec_to_strvec_singleword_noglob(char **argv)
+{
+ return expand_variables(argv, EXP_FLAG_SINGLEWORD);
+}
+#endif
+
+/* Used for expansion of right hand of assignments,
+ * $((...)), heredocs, variable expansion parts.
+ *
+ * NB: should NOT do globbing!
+ * "export v=/bin/c*; env | grep ^v=" outputs "v=/bin/c*"
+ */
+static char *expand_string_to_string(const char *str, int EXP_flags, int do_unbackslash)
+{
+#if !BASH_PATTERN_SUBST && !ENABLE_HUSH_CASE
+ const int do_unbackslash = 1;
+ const int EXP_flags = EXP_FLAG_ESC_GLOB_CHARS;
+#endif
+ char *argv[2], **list;
+
+ debug_printf_expand("string_to_string<='%s'\n", str);
+ /* This is generally an optimization, but it also
+ * handles "", which otherwise trips over !list[0] check below.
+ * (is this ever happens that we actually get str="" here?)
+ */
+ if (!strchr(str, SPECIAL_VAR_SYMBOL) && !strchr(str, '\\')) {
+ //TODO: Can use on strings with \ too, just unbackslash() them?
+ debug_printf_expand("string_to_string(fast)=>'%s'\n", str);
+ return xstrdup(str);
+ }
+
+ argv[0] = (char*)str;
+ argv[1] = NULL;
+ list = expand_variables(argv, EXP_flags | EXP_FLAG_SINGLEWORD);
+ if (!list[0]) {
+ /* Example where it happens:
+ * x=; echo ${x:-"$@"}
+ */
+ ((char*)list)[0] = '\0';
+ } else {
+ if (HUSH_DEBUG)
+ if (list[1])
+ bb_simple_error_msg_and_die("BUG in varexp2");
+ /* actually, just move string 2*sizeof(char*) bytes back */
+ overlapping_strcpy((char*)list, list[0]);
+ if (do_unbackslash)
+ unbackslash((char*)list);
+ }
+ debug_printf_expand("string_to_string=>'%s'\n", (char*)list);
+ return (char*)list;
+}
+
+#if 0
+static char* expand_strvec_to_string(char **argv)
+{
+ char **list;
+
+ list = expand_variables(argv, EXP_FLAG_SINGLEWORD);
+ /* Convert all NULs to spaces */
+ if (list[0]) {
+ int n = 1;
+ while (list[n]) {
+ if (HUSH_DEBUG)
+ if (list[n-1] + strlen(list[n-1]) + 1 != list[n])
+ bb_error_msg_and_die("BUG in varexp3");
+ /* bash uses ' ' regardless of $IFS contents */
+ list[n][-1] = ' ';
+ n++;
+ }
+ }
+ overlapping_strcpy((char*)list, list[0] ? list[0] : "");
+ debug_printf_expand("strvec_to_string='%s'\n", (char*)list);
+ return (char*)list;
+}
+#endif
+
+#ifndef __U_BOOT__
+static char **expand_assignments(char **argv, int count)
+{
+ int i;
+ char **p;
+
+ G.expanded_assignments = p = NULL;
+ /* Expand assignments into one string each */
+ for (i = 0; i < count; i++) {
+ p = add_string_to_strings(p,
+ expand_string_to_string(argv[i],
+ EXP_FLAG_ESC_GLOB_CHARS,
+ /*unbackslash:*/ 1
+ )
+ );
+ G.expanded_assignments = p;
+ }
+ G.expanded_assignments = NULL;
+ return p;
+}
+
+
+static void switch_off_special_sigs(unsigned mask)
+{
+ unsigned sig = 0;
+ while ((mask >>= 1) != 0) {
+ sig++;
+ if (!(mask & 1))
+ continue;
+#if ENABLE_HUSH_TRAP
+ if (G_traps) {
+ if (G_traps[sig] && !G_traps[sig][0])
+ /* trap is '', has to remain SIG_IGN */
+ continue;
+ free(G_traps[sig]);
+ G_traps[sig] = NULL;
+ }
+#endif
+ /* We are here only if no trap or trap was not '' */
+ install_sighandler(sig, SIG_DFL);
+ }
+}
+#endif /* !__U_BOOT__ */
+
+#ifndef __U_BOOT__
+#if BB_MMU
+/* never called */
+void re_execute_shell(char ***to_free, const char *s,
+ char *g_argv0, char **g_argv,
+ char **builtin_argv) NORETURN;
+
+static void reset_traps_to_defaults(void)
+{
+ /* This function is always called in a child shell
+ * after fork (not vfork, NOMMU doesn't use this function).
+ */
+ IF_HUSH_TRAP(unsigned sig;)
+ unsigned mask;
+
+ /* Child shells are not interactive.
+ * SIGTTIN/SIGTTOU/SIGTSTP should not have special handling.
+ * Testcase: (while :; do :; done) + ^Z should background.
+ * Same goes for SIGTERM, SIGHUP, SIGINT.
+ */
+ mask = (G.special_sig_mask & SPECIAL_INTERACTIVE_SIGS) | G_fatal_sig_mask;
+ if (!G_traps && !mask)
+ return; /* already no traps and no special sigs */
+
+ /* Switch off special sigs */
+ switch_off_special_sigs(mask);
+# if ENABLE_HUSH_JOB
+ G_fatal_sig_mask = 0;
+# endif
+ G.special_sig_mask &= ~SPECIAL_INTERACTIVE_SIGS;
+ /* SIGQUIT,SIGCHLD and maybe SPECIAL_JOBSTOP_SIGS
+ * remain set in G.special_sig_mask */
+
+# if ENABLE_HUSH_TRAP
+ if (!G_traps)
+ return;
+
+ /* Reset all sigs to default except ones with empty traps */
+ for (sig = 0; sig < NSIG; sig++) {
+ if (!G_traps[sig])
+ continue; /* no trap: nothing to do */
+ if (!G_traps[sig][0])
+ continue; /* empty trap: has to remain SIG_IGN */
+ /* sig has non-empty trap, reset it: */
+ free(G_traps[sig]);
+ G_traps[sig] = NULL;
+ /* There is no signal for trap 0 (EXIT) */
+ if (sig == 0)
+ continue;
+ install_sighandler(sig, pick_sighandler(sig));
+ }
+# endif
+}
+
+#else /* !BB_MMU */
+
+static void re_execute_shell(char ***to_free, const char *s,
+ char *g_argv0, char **g_argv,
+ char **builtin_argv) NORETURN;
+static void re_execute_shell(char ***to_free, const char *s,
+ char *g_argv0, char **g_argv,
+ char **builtin_argv)
+{
+# define NOMMU_HACK_FMT ("-$%x:%x:%x:%x:%x:%llx" IF_HUSH_LOOPS(":%x"))
+ /* delims + 2 * (number of bytes in printed hex numbers) */
+ char param_buf[sizeof(NOMMU_HACK_FMT) + 2 * (sizeof(int)*6 + sizeof(long long)*1)];
+ char *heredoc_argv[4];
+ struct variable *cur;
+# if ENABLE_HUSH_FUNCTIONS
+ struct function *funcp;
+# endif
+ char **argv, **pp;
+ unsigned cnt;
+ unsigned long long empty_trap_mask;
+
+ if (!g_argv0) { /* heredoc */
+ argv = heredoc_argv;
+ argv[0] = (char *) G.argv0_for_re_execing;
+ argv[1] = (char *) "-<";
+ argv[2] = (char *) s;
+ argv[3] = NULL;
+ pp = &argv[3]; /* used as pointer to empty environment */
+ goto do_exec;
+ }
+
+ cnt = 0;
+ pp = builtin_argv;
+ if (pp) while (*pp++)
+ cnt++;
+
+ empty_trap_mask = 0;
+ if (G_traps) {
+ int sig;
+ for (sig = 1; sig < NSIG; sig++) {
+ if (G_traps[sig] && !G_traps[sig][0])
+ empty_trap_mask |= 1LL << sig;
+ }
+ }
+
+ sprintf(param_buf, NOMMU_HACK_FMT
+ , (unsigned) G.root_pid
+ , (unsigned) G.root_ppid
+ , (unsigned) G.last_bg_pid
+ , (unsigned) G.last_exitcode
+ , cnt
+ , empty_trap_mask
+ IF_HUSH_LOOPS(, G.depth_of_loop)
+ );
+# undef NOMMU_HACK_FMT
+ /* 1:hush 2:-$<pid>:<pid>:<exitcode>:<etc...> <vars...> <funcs...>
+ * 3:-c 4:<cmd> 5:<arg0> <argN...> 6:NULL
+ */
+ cnt += 6;
+ for (cur = G.top_var; cur; cur = cur->next) {
+ if (!cur->flg_export || cur->flg_read_only)
+ cnt += 2;
+ }
+# if ENABLE_HUSH_LINENO_VAR
+ cnt += 2;
+# endif
+# if ENABLE_HUSH_FUNCTIONS
+ for (funcp = G.top_func; funcp; funcp = funcp->next)
+ cnt += 3;
+# endif
+ pp = g_argv;
+ while (*pp++)
+ cnt++;
+ *to_free = argv = pp = xzalloc(sizeof(argv[0]) * cnt);
+ *pp++ = (char *) G.argv0_for_re_execing;
+ *pp++ = param_buf;
+ for (cur = G.top_var; cur; cur = cur->next) {
+ if (strcmp(cur->varstr, hush_version_str) == 0)
+ continue;
+ if (cur->flg_read_only) {
+ *pp++ = (char *) "-R";
+ *pp++ = cur->varstr;
+ } else if (!cur->flg_export) {
+ *pp++ = (char *) "-V";
+ *pp++ = cur->varstr;
+ }
+ }
+# if ENABLE_HUSH_LINENO_VAR
+ *pp++ = (char *) "-L";
+ *pp++ = utoa(G.execute_lineno);
+# endif
+# if ENABLE_HUSH_FUNCTIONS
+ for (funcp = G.top_func; funcp; funcp = funcp->next) {
+ *pp++ = (char *) "-F";
+ *pp++ = funcp->name;
+ *pp++ = funcp->body_as_string;
+ }
+# endif
+ /* We can pass activated traps here. Say, -Tnn:trap_string
+ *
+ * However, POSIX says that subshells reset signals with traps
+ * to SIG_DFL.
+ * I tested bash-3.2 and it not only does that with true subshells
+ * of the form ( list ), but with any forked children shells.
+ * I set trap "echo W" WINCH; and then tried:
+ *
+ * { echo 1; sleep 20; echo 2; } &
+ * while true; do echo 1; sleep 20; echo 2; break; done &
+ * true | { echo 1; sleep 20; echo 2; } | cat
+ *
+ * In all these cases sending SIGWINCH to the child shell
+ * did not run the trap. If I add trap "echo V" WINCH;
+ * _inside_ group (just before echo 1), it works.
+ *
+ * I conclude it means we don't need to pass active traps here.
+ */
+ *pp++ = (char *) "-c";
+ *pp++ = (char *) s;
+ if (builtin_argv) {
+ while (*++builtin_argv)
+ *pp++ = *builtin_argv;
+ *pp++ = (char *) "";
+ }
+ *pp++ = g_argv0;
+ while (*g_argv)
+ *pp++ = *g_argv++;
+ /* *pp = NULL; - is already there */
+ pp = environ;
+
+ do_exec:
+ debug_printf_exec("re_execute_shell pid:%d cmd:'%s'\n", getpid(), s);
+ /* Don't propagate SIG_IGN to the child */
+ if (SPECIAL_JOBSTOP_SIGS != 0)
+ switch_off_special_sigs(G.special_sig_mask & SPECIAL_JOBSTOP_SIGS);
+ execve(bb_busybox_exec_path, argv, pp);
+ /* Fallback. Useful for init=/bin/hush usage etc */
+ if (argv[0][0] == '/')
+ execve(argv[0], argv, pp);
+ xfunc_error_retval = 127;
+ bb_simple_error_msg_and_die("can't re-execute the shell");
+}
+#endif /* !BB_MMU */
+
+#endif /* !__U_BOOT__ */
+
+static int run_and_free_list(struct pipe *pi);
+
+/* Executing from string: eval, sh -c '...'
+ * or from file: /etc/profile, . file, sh <script>, sh (intereactive)
+ * end_trigger controls how often we stop parsing
+ * NUL: parse all, execute, return
+ * ';': parse till ';' or newline, execute, repeat till EOF
+ */
+#ifndef __U_BOOT__
+static void parse_and_run_stream(struct in_str *inp, int end_trigger)
+#else /* __U_BOOT__ */
+static int parse_and_run_stream(struct in_str *inp, int end_trigger)
+#endif /* __U_BOOT__ */
+{
+ /* Why we need empty flag?
+ * An obscure corner case "false; ``; echo $?":
+ * empty command in `` should still set $? to 0.
+ * But we can't just set $? to 0 at the start,
+ * this breaks "false; echo `echo $?`" case.
+ */
+ bool empty = 1;
+#ifndef __U_BOOT__
+ while (1) {
+#else /* __U_BOOT__ */
+ do {
+#endif /* __U_BOOT__ */
+ struct pipe *pipe_list;
+
+#if ENABLE_HUSH_INTERACTIVE
+ if (end_trigger == ';') {
+ G.promptmode = 0; /* PS1 */
+ debug_printf_prompt("%s promptmode=%d\n", __func__, G.promptmode);
+ }
+#endif
+ pipe_list = parse_stream(NULL, NULL, inp, end_trigger);
+ if (!pipe_list || pipe_list == ERR_PTR) { /* EOF/error */
+ /* If we are in "big" script
+ * (not in `cmd` or something similar)...
+ */
+ if (pipe_list == ERR_PTR && end_trigger == ';') {
+ /* Discard cached input (rest of line) */
+ int ch = inp->last_char;
+ while (ch != EOF && ch != '\n') {
+ //bb_error_msg("Discarded:'%c'", ch);
+ ch = i_getch(inp);
+ }
+ /* Force prompt */
+ inp->p = NULL;
+ /* This stream isn't empty */
+ empty = 0;
+ continue;
+ }
+ if (!pipe_list && empty)
+ G.last_exitcode = 0;
+ break;
+ }
+ debug_print_tree(pipe_list, 0);
+ debug_printf_exec("parse_and_run_stream: run_and_free_list\n");
+#ifndef __U_BOOT__
+ run_and_free_list(pipe_list);
+#else /* __U_BOOT__ */
+ int rcode = run_and_free_list(pipe_list);
+ /*
+ * We reset input string to not run the following command, so running
+ * 'exit; echo foo' does not print foo.
+ */
+ if (rcode <= EXIT_RET_CODE)
+ setup_file_in_str(inp);
+#endif /* __U_BOOT__ */
+ empty = 0;
+ if (G_flag_return_in_progress == 1)
+ break;
+#ifndef __U_BOOT__
+ }
+#else /* __U_BOOT__ */
+ /*
+ * This do/while is needed by run_command to avoid looping on a command
+ * with syntax error.
+ */
+ } while (!(G.run_command_flags & FLAG_EXIT_FROM_LOOP));
+
+ return G.last_exitcode;
+#endif /* __U_BOOT__ */
+}
+
+#ifndef __U_BOOT__
+static void parse_and_run_string(const char *s)
+#else /* __U_BOOT__ */
+static int parse_and_run_string(const char *s)
+#endif /* __U_BOOT__ */
+{
+ struct in_str input;
+#ifndef __U_BOOT__
+ IF_HUSH_LINENO_VAR(unsigned sv = G.parse_lineno;)
+#else /* __U_BOOT__ */
+ //IF_HUSH_LINENO_VAR(unsigned sv = G.parse_lineno;)
+#endif /* __U_BOOT__ */
+
+ setup_string_in_str(&input, s);
+#ifndef __U_BOOT__
+ parse_and_run_stream(&input, '\0');
+#else /* __U_BOOT__ */
+ return parse_and_run_stream(&input, '\0');
+#endif /* __U_BOOT__ */
+#ifndef __U_BOOT__
+ IF_HUSH_LINENO_VAR(unsigned sv = G.parse_lineno;)
+#else /* __U_BOOT__ */
+ //IF_HUSH_LINENO_VAR(unsigned sv = G.parse_lineno;)
+#endif /* __U_BOOT__ */
+}
+
+#ifdef __U_BOOT__
+int parse_string_outer_modern(const char *cmd, int flags)
+{
+ int ret;
+ int old_flags;
+
+ /*
+ * Keep old values of run_command to be able to restore them once
+ * command was executed.
+ */
+ old_flags = G.run_command_flags;
+ G.run_command_flags = flags;
+
+ ret = parse_and_run_string(cmd);
+
+ G.run_command_flags = old_flags;
+
+ return ret;
+}
+#endif /* __U_BOOT__ */
+#ifndef __U_BOOT__
+static void parse_and_run_file(HFILE *fp)
+#else /* __U_BOOT__ */
+void parse_and_run_file(void)
+#endif /* __U_BOOT__ */
+{
+ struct in_str input;
+#ifndef __U_BOOT__
+ IF_HUSH_LINENO_VAR(unsigned sv = G.parse_lineno;)
+
+ IF_HUSH_LINENO_VAR(G.parse_lineno = 1;)
+ setup_file_in_str(&input, fp);
+#else /* __U_BOOT__ */
+ setup_file_in_str(&input);
+#endif /* __U_BOOT__ */
+ parse_and_run_stream(&input, ';');
+#ifndef __U_BOOT__
+ IF_HUSH_LINENO_VAR(G.parse_lineno = sv;)
+#endif /* !__U_BOOT__ */
+}
+
+#ifndef __U_BOOT__
+#if ENABLE_HUSH_TICK
+static int generate_stream_from_string(const char *s, pid_t *pid_p)
+{
+ pid_t pid;
+ int channel[2];
+# if !BB_MMU
+ char **to_free = NULL;
+# endif
+
+ xpipe(channel);
+ pid = BB_MMU ? xfork() : xvfork();
+ if (pid == 0) { /* child */
+ disable_restore_tty_pgrp_on_exit();
+ /* Process substitution is not considered to be usual
+ * 'command execution'.
+ * SUSv3 says ctrl-Z should be ignored, ctrl-C should not.
+ */
+ bb_signals(0
+ + (1 << SIGTSTP)
+ + (1 << SIGTTIN)
+ + (1 << SIGTTOU)
+ , SIG_IGN);
+ close(channel[0]); /* NB: close _first_, then move fd! */
+ xmove_fd(channel[1], 1);
+# if ENABLE_HUSH_TRAP
+ /* Awful hack for `trap` or $(trap).
+ *
+ * http://www.opengroup.org/onlinepubs/009695399/utilities/trap.html
+ * contains an example where "trap" is executed in a subshell:
+ *
+ * save_traps=$(trap)
+ * ...
+ * eval "$save_traps"
+ *
+ * Standard does not say that "trap" in subshell shall print
+ * parent shell's traps. It only says that its output
+ * must have suitable form, but then, in the above example
+ * (which is not supposed to be normative), it implies that.
+ *
+ * bash (and probably other shell) does implement it
+ * (traps are reset to defaults, but "trap" still shows them),
+ * but as a result, "trap" logic is hopelessly messed up:
+ *
+ * # trap
+ * trap -- 'echo Ho' SIGWINCH <--- we have a handler
+ * # (trap) <--- trap is in subshell - no output (correct, traps are reset)
+ * # true | trap <--- trap is in subshell - no output (ditto)
+ * # echo `true | trap` <--- in subshell - output (but traps are reset!)
+ * trap -- 'echo Ho' SIGWINCH
+ * # echo `(trap)` <--- in subshell in subshell - output
+ * trap -- 'echo Ho' SIGWINCH
+ * # echo `true | (trap)` <--- in subshell in subshell in subshell - output!
+ * trap -- 'echo Ho' SIGWINCH
+ *
+ * The rules when to forget and when to not forget traps
+ * get really complex and nonsensical.
+ *
+ * Our solution: ONLY bare $(trap) or `trap` is special.
+ */
+ s = skip_whitespace(s);
+ if (is_prefixed_with(s, "trap")
+ && skip_whitespace(s + 4)[0] == '\0'
+ ) {
+ static const char *const argv[] ALIGN_PTR = { NULL, NULL };
+ builtin_trap((char**)argv);
+ fflush_all(); /* important */
+ _exit(0);
+ }
+# endif
+# if BB_MMU
+ /* Prevent it from trying to handle ctrl-z etc */
+ IF_HUSH_JOB(G.run_list_level = 1;)
+ CLEAR_RANDOM_T(&G.random_gen); /* or else $RANDOM repeats in child */
+ reset_traps_to_defaults();
+ IF_HUSH_MODE_X(G.x_mode_depth++;)
+ //bb_error_msg("%s: ++x_mode_depth=%d", __func__, G.x_mode_depth);
+ parse_and_run_string(s);
+ _exit(G.last_exitcode);
+# else
+ /* We re-execute after vfork on NOMMU. This makes this script safe:
+ * yes "0123456789012345678901234567890" | dd bs=32 count=64k >BIG
+ * huge=`cat BIG` # was blocking here forever
+ * echo OK
+ */
+ re_execute_shell(&to_free,
+ s,
+ G.global_argv[0],
+ G.global_argv + 1,
+ NULL);
+# endif
+ }
+
+ /* parent */
+ *pid_p = pid;
+# if ENABLE_HUSH_FAST
+ G.count_SIGCHLD++;
+//bb_error_msg("[%d] fork in generate_stream_from_string:"
+// " G.count_SIGCHLD:%d G.handled_SIGCHLD:%d",
+// getpid(), G.count_SIGCHLD, G.handled_SIGCHLD);
+# endif
+ enable_restore_tty_pgrp_on_exit();
+# if !BB_MMU
+ free(to_free);
+# endif
+ close(channel[1]);
+ return channel[0];
+}
+
+/* Return code is exit status of the process that is run. */
+static int process_command_subs(o_string *dest, const char *s)
+{
+ FILE *fp;
+ pid_t pid;
+ int status, ch, eol_cnt;
+
+ fp = xfdopen_for_read(generate_stream_from_string(s, &pid));
+
+ /* Now send results of command back into original context */
+ eol_cnt = 0;
+ while ((ch = getc(fp)) != EOF) {
+ if (ch == '\0')
+ continue;
+ if (ch == '\n') {
+ eol_cnt++;
+ continue;
+ }
+ while (eol_cnt) {
+ o_addchr(dest, '\n');
+ eol_cnt--;
+ }
+ o_addQchr(dest, ch);
+ }
+
+ debug_printf("done reading from `cmd` pipe, closing it\n");
+ fclose(fp);
+ /* We need to extract exitcode. Test case
+ * "true; echo `sleep 1; false` $?"
+ * should print 1 */
+ safe_waitpid(pid, &status, 0);
+ debug_printf("child exited. returning its exitcode:%d\n", WEXITSTATUS(status));
+ return WEXITSTATUS(status);
+}
+#endif /* ENABLE_HUSH_TICK */
+
+
+static void setup_heredoc(struct redir_struct *redir)
+{
+ struct fd_pair pair;
+ pid_t pid;
+ int len, written;
+ /* the _body_ of heredoc (misleading field name) */
+ const char *heredoc = redir->rd_filename;
+ char *expanded;
+#if !BB_MMU
+ char **to_free;
+#endif
+
+ expanded = NULL;
+ if (!(redir->rd_dup & HEREDOC_QUOTED)) {
+ expanded = encode_then_expand_string(heredoc);
+ if (expanded)
+ heredoc = expanded;
+ }
+ len = strlen(heredoc);
+
+ close(redir->rd_fd); /* often saves dup2+close in xmove_fd */
+ xpiped_pair(pair);
+ xmove_fd(pair.rd, redir->rd_fd);
+
+ /* Try writing without forking. Newer kernels have
+ * dynamically growing pipes. Must use non-blocking write! */
+ ndelay_on(pair.wr);
+ while (1) {
+ written = write(pair.wr, heredoc, len);
+ if (written <= 0)
+ break;
+ len -= written;
+ if (len == 0) {
+ close(pair.wr);
+ free(expanded);
+ return;
+ }
+ heredoc += written;
+ }
+ ndelay_off(pair.wr);
+
+ /* Okay, pipe buffer was not big enough */
+ /* Note: we must not create a stray child (bastard? :)
+ * for the unsuspecting parent process. Child creates a grandchild
+ * and exits before parent execs the process which consumes heredoc
+ * (that exec happens after we return from this function) */
+#if !BB_MMU
+ to_free = NULL;
+#endif
+ pid = xvfork();
+ if (pid == 0) {
+ /* child */
+ disable_restore_tty_pgrp_on_exit();
+ pid = BB_MMU ? xfork() : xvfork();
+ if (pid != 0)
+ _exit(0);
+ /* grandchild */
+ close(redir->rd_fd); /* read side of the pipe */
+#if BB_MMU
+ full_write(pair.wr, heredoc, len); /* may loop or block */
+ _exit(0);
+#else
+ /* Delegate blocking writes to another process */
+ xmove_fd(pair.wr, STDOUT_FILENO);
+ re_execute_shell(&to_free, heredoc, NULL, NULL, NULL);
+#endif
+ }
+ /* parent */
+#if ENABLE_HUSH_FAST
+ G.count_SIGCHLD++;
+//bb_error_msg("[%d] fork in setup_heredoc: G.count_SIGCHLD:%d G.handled_SIGCHLD:%d", getpid(), G.count_SIGCHLD, G.handled_SIGCHLD);
+#endif
+ enable_restore_tty_pgrp_on_exit();
+#if !BB_MMU
+ free(to_free);
+#endif
+ close(pair.wr);
+ free(expanded);
+ wait(NULL); /* wait till child has died */
+}
+
+struct squirrel {
+ int orig_fd;
+ int moved_to;
+ /* moved_to = n: fd was moved to n; restore back to orig_fd after redir */
+ /* moved_to = -1: fd was opened by redirect; close orig_fd after redir */
+};
+
+static struct squirrel *append_squirrel(struct squirrel *sq, int i, int orig, int moved)
+{
+ sq = xrealloc(sq, (i + 2) * sizeof(sq[0]));
+ sq[i].orig_fd = orig;
+ sq[i].moved_to = moved;
+ sq[i+1].orig_fd = -1; /* end marker */
+ return sq;
+}
+
+static struct squirrel *add_squirrel(struct squirrel *sq, int fd, int avoid_fd)
+{
+ int moved_to;
+ int i;
+
+ i = 0;
+ if (sq) for (; sq[i].orig_fd >= 0; i++) {
+ /* If we collide with an already moved fd... */
+ if (fd == sq[i].moved_to) {
+ sq[i].moved_to = dup_CLOEXEC(sq[i].moved_to, avoid_fd);
+ debug_printf_redir("redirect_fd %d: already busy, moving to %d\n", fd, sq[i].moved_to);
+ if (sq[i].moved_to < 0) /* what? */
+ xfunc_die();
+ return sq;
+ }
+ if (fd == sq[i].orig_fd) {
+ /* Example: echo Hello >/dev/null 1>&2 */
+ debug_printf_redir("redirect_fd %d: already moved\n", fd);
+ return sq;
+ }
+ }
+
+ /* If this fd is open, we move and remember it; if it's closed, moved_to = -1 */
+ moved_to = dup_CLOEXEC(fd, avoid_fd);
+ debug_printf_redir("redirect_fd %d: previous fd is moved to %d (-1 if it was closed)\n", fd, moved_to);
+ if (moved_to < 0 && errno != EBADF)
+ xfunc_die();
+ return append_squirrel(sq, i, fd, moved_to);
+}
+
+static struct squirrel *add_squirrel_closed(struct squirrel *sq, int fd)
+{
+ int i;
+
+ i = 0;
+ if (sq) for (; sq[i].orig_fd >= 0; i++) {
+ /* If we collide with an already moved fd... */
+ if (fd == sq[i].orig_fd) {
+ /* Examples:
+ * "echo 3>FILE 3>&- 3>FILE"
+ * "echo 3>&- 3>FILE"
+ * No need for last redirect to insert
+ * another "need to close 3" indicator.
+ */
+ debug_printf_redir("redirect_fd %d: already moved or closed\n", fd);
+ return sq;
+ }
+ }
+
+ debug_printf_redir("redirect_fd %d: previous fd was closed\n", fd);
+ return append_squirrel(sq, i, fd, -1);
+}
+
+/* fd: redirect wants this fd to be used (e.g. 3>file).
+ * Move all conflicting internally used fds,
+ * and remember them so that we can restore them later.
+ */
+static int save_fd_on_redirect(int fd, int avoid_fd, struct squirrel **sqp)
+{
+ if (avoid_fd < 9) /* the important case here is that it can be -1 */
+ avoid_fd = 9;
+
+#if ENABLE_HUSH_INTERACTIVE
+ if (fd != 0 /* don't trigger for G_interactive_fd == 0 (that's "not interactive" flag) */
+ && fd == G_interactive_fd
+ ) {
+ /* Testcase: "ls -l /proc/$$/fd 255>&-" should work */
+ G_interactive_fd = xdup_CLOEXEC_and_close(G_interactive_fd, avoid_fd);
+ debug_printf_redir("redirect_fd %d: matches interactive_fd, moving it to %d\n", fd, G_interactive_fd);
+ return 1; /* "we closed fd" */
+ }
+#endif
+ /* Are we called from setup_redirects(squirrel==NULL)
+ * in redirect in a [v]forked child?
+ */
+ if (sqp == NULL) {
+ /* No need to move script fds.
+ * For NOMMU case, it's actively wrong: we'd change ->fd
+ * fields in memory for the parent, but parent's fds
+ * aren't moved, it would use wrong fd!
+ * Reproducer: "cmd 3>FILE" in script.
+ * If we would call move_HFILEs_on_redirect(), child would:
+ * fcntl64(3, F_DUPFD_CLOEXEC, 10) = 10
+ * close(3) = 0
+ * and change ->fd to 10 if fd#3 is a script fd. WRONG.
+ */
+ //bb_error_msg("sqp == NULL: [v]forked child");
+ return 0;
+ }
+
+ /* If this one of script's fds? */
+ if (move_HFILEs_on_redirect(fd, avoid_fd))
+ return 1; /* yes. "we closed fd" (actually moved it) */
+
+ /* Are we called for "exec 3>FILE"? Came through
+ * redirect_and_varexp_helper(squirrel=ERR_PTR) -> setup_redirects(ERR_PTR)
+ * This case used to fail for this script:
+ * exec 3>FILE
+ * echo Ok
+ * ...100000 more lines...
+ * echo Ok
+ * as follows:
+ * read(3, "exec 3>FILE\necho Ok\necho Ok"..., 1024) = 1024
+ * open("FILE", O_WRONLY|O_CREAT|O_TRUNC|O_LARGEFILE, 0666) = 4
+ * dup2(4, 3) = 3
+ * ^^^^^^^^ oops, we lost fd#3 opened to our script!
+ * close(4) = 0
+ * write(1, "Ok\n", 3) = 3
+ * ... = 3
+ * write(1, "Ok\n", 3) = 3
+ * read(3, 0x94fbc08, 1024) = -1 EBADF (Bad file descriptor)
+ * ^^^^^^^^ oops, wrong fd!!!
+ * With this case separate from sqp == NULL and *after* move_HFILEs,
+ * it now works:
+ */
+ if (sqp == ERR_PTR) {
+ /* Don't preserve redirected fds: exec is _meant_ to change these */
+ //bb_error_msg("sqp == ERR_PTR: exec >FILE");
+ return 0;
+ }
+
+ /* Check whether it collides with any open fds (e.g. stdio), save fds as needed */
+ *sqp = add_squirrel(*sqp, fd, avoid_fd);
+ return 0; /* "we did not close fd" */
+}
+
+static void restore_redirects(struct squirrel *sq)
+{
+ if (sq) {
+ int i;
+ for (i = 0; sq[i].orig_fd >= 0; i++) {
+ if (sq[i].moved_to >= 0) {
+ /* We simply die on error */
+ debug_printf_redir("restoring redirected fd from %d to %d\n", sq[i].moved_to, sq[i].orig_fd);
+ xmove_fd(sq[i].moved_to, sq[i].orig_fd);
+ } else {
+ /* cmd1 9>FILE; cmd2_should_see_fd9_closed */
+ debug_printf_redir("restoring redirected fd %d: closing it\n", sq[i].orig_fd);
+ close(sq[i].orig_fd);
+ }
+ }
+ free(sq);
+ }
+ if (G.HFILE_stdin
+ && G.HFILE_stdin->fd > STDIN_FILENO
+ /* we compare > STDIN, not == STDIN, since hfgetc()
+ * closes fd and sets ->fd to -1 if EOF is reached.
+ * Testcase: echo 'pwd' | hush
+ */
+ ) {
+ /* Testcase: interactive "read r <FILE; echo $r; read r; echo $r".
+ * Redirect moves ->fd to e.g. 10,
+ * and it is not restored above (we do not restore script fds
+ * after redirects, we just use new, "moved" fds).
+ * However for stdin, get_user_input() -> read_line_input(),
+ * and read builtin, depend on fd == STDIN_FILENO.
+ */
+ debug_printf_redir("restoring %d to stdin\n", G.HFILE_stdin->fd);
+ xmove_fd(G.HFILE_stdin->fd, STDIN_FILENO);
+ G.HFILE_stdin->fd = STDIN_FILENO;
+ }
+
+ /* If moved, G_interactive_fd stays on new fd, not restoring it */
+}
+
+#if ENABLE_FEATURE_SH_STANDALONE && BB_MMU
+static void close_saved_fds_and_FILE_fds(void)
+{
+ if (G_interactive_fd)
+ close(G_interactive_fd);
+ close_all_HFILE_list();
+}
+#endif
+
+static int internally_opened_fd(int fd, struct squirrel *sq)
+{
+ int i;
+
+#if ENABLE_HUSH_INTERACTIVE
+ if (fd == G_interactive_fd)
+ return 1;
+#endif
+ /* If this one of script's fds? */
+ if (fd_in_HFILEs(fd))
+ return 1;
+
+ if (sq) for (i = 0; sq[i].orig_fd >= 0; i++) {
+ if (fd == sq[i].moved_to)
+ return 1;
+ }
+ return 0;
+}
+
+/* squirrel != NULL means we squirrel away copies of stdin, stdout,
+ * and stderr if they are redirected. */
+static int setup_redirects(struct command *prog, struct squirrel **sqp)
+{
+ struct redir_struct *redir;
+
+ for (redir = prog->redirects; redir; redir = redir->next) {
+ int newfd;
+ int closed;
+
+ if (redir->rd_type == REDIRECT_HEREDOC2) {
+ /* "rd_fd<<HERE" case */
+ save_fd_on_redirect(redir->rd_fd, /*avoid:*/ 0, sqp);
+ /* for REDIRECT_HEREDOC2, rd_filename holds _contents_
+ * of the heredoc */
+ debug_printf_redir("set heredoc '%s'\n",
+ redir->rd_filename);
+ setup_heredoc(redir);
+ continue;
+ }
+
+ if (redir->rd_dup == REDIRFD_TO_FILE) {
+ /* "rd_fd<*>file" case (<*> is <,>,>>,<>) */
+ char *p;
+ int mode;
+
+ if (redir->rd_filename == NULL) {
+ /* Examples:
+ * "cmd >" (no filename)
+ * "cmd > <file" (2nd redirect starts too early)
+ */
+ syntax_error("invalid redirect");
+ continue;
+ }
+ mode = redir_table[redir->rd_type].mode;
+ p = expand_string_to_string(redir->rd_filename,
+ EXP_FLAG_ESC_GLOB_CHARS, /*unbackslash:*/ 1);
+ newfd = open_or_warn(p, mode);
+ free(p);
+ if (newfd < 0) {
+ /* Error message from open_or_warn can be lost
+ * if stderr has been redirected, but bash
+ * and ash both lose it as well
+ * (though zsh doesn't!)
+ */
+ return 1;
+ }
+ if (newfd == redir->rd_fd && sqp) {
+ /* open() gave us precisely the fd we wanted.
+ * This means that this fd was not busy
+ * (not opened to anywhere).
+ * Remember to close it on restore:
+ */
+ *sqp = add_squirrel_closed(*sqp, newfd);
+ debug_printf_redir("redir to previously closed fd %d\n", newfd);
+ }
+ } else {
+ /* "rd_fd>&rd_dup" or "rd_fd>&-" case */
+ newfd = redir->rd_dup;
+ }
+
+ if (newfd == redir->rd_fd)
+ continue;
+
+ /* if "N>FILE": move newfd to redir->rd_fd */
+ /* if "N>&M": dup newfd to redir->rd_fd */
+ /* if "N>&-": close redir->rd_fd (newfd is REDIRFD_CLOSE) */
+
+ closed = save_fd_on_redirect(redir->rd_fd, /*avoid:*/ newfd, sqp);
+ if (newfd == REDIRFD_CLOSE) {
+ /* "N>&-" means "close me" */
+ if (!closed) {
+ /* ^^^ optimization: saving may already
+ * have closed it. If not... */
+ close(redir->rd_fd);
+ }
+ /* Sometimes we do another close on restore, getting EBADF.
+ * Consider "echo 3>FILE 3>&-"
+ * first redirect remembers "need to close 3",
+ * and second redirect closes 3! Restore code then closes 3 again.
+ */
+ } else {
+ /* if newfd is a script fd or saved fd, simulate EBADF */
+ if (internally_opened_fd(newfd, sqp && sqp != ERR_PTR ? *sqp : NULL)) {
+ //errno = EBADF;
+ //bb_perror_msg_and_die("can't duplicate file descriptor");
+ newfd = -1; /* same effect as code above */
+ }
+ xdup2(newfd, redir->rd_fd);
+ if (redir->rd_dup == REDIRFD_TO_FILE)
+ /* "rd_fd > FILE" */
+ close(newfd);
+ /* else: "rd_fd > rd_dup" */
+ }
+ }
+ return 0;
+}
+
+static char *find_in_path(const char *arg)
+{
+ char *ret = NULL;
+ const char *PATH = get_local_var_value("PATH");
+
+ if (!PATH)
+ return NULL;
+
+ while (1) {
+ const char *end = strchrnul(PATH, ':');
+ int sz = end - PATH; /* must be int! */
+
+ free(ret);
+ if (sz != 0) {
+ ret = xasprintf("%.*s/%s", sz, PATH, arg);
+ } else {
+ /* We have xxx::yyyy in $PATH,
+ * it means "use current dir" */
+ ret = xstrdup(arg);
+ }
+ if (access(ret, F_OK) == 0)
+ break;
+
+ if (*end == '\0') {
+ free(ret);
+ return NULL;
+ }
+ PATH = end + 1;
+ }
+
+ return ret;
+}
+
+static const struct built_in_command *find_builtin_helper(const char *name,
+ const struct built_in_command *x,
+ const struct built_in_command *end)
+{
+ while (x != end) {
+ if (strcmp(name, x->b_cmd) != 0) {
+ x++;
+ continue;
+ }
+ debug_printf_exec("found builtin '%s'\n", name);
+ return x;
+ }
+ return NULL;
+}
+static const struct built_in_command *find_builtin1(const char *name)
+{
+ return find_builtin_helper(name, bltins1, &bltins1[ARRAY_SIZE(bltins1)]);
+}
+static const struct built_in_command *find_builtin(const char *name)
+{
+ const struct built_in_command *x = find_builtin1(name);
+ if (x)
+ return x;
+ return find_builtin_helper(name, bltins2, &bltins2[ARRAY_SIZE(bltins2)]);
+}
+
+#if ENABLE_HUSH_JOB && ENABLE_FEATURE_TAB_COMPLETION
+static const char * FAST_FUNC hush_command_name(int i)
+{
+ if (/*i >= 0 && */ i < ARRAY_SIZE(bltins1)) {
+ return bltins1[i].b_cmd;
+ }
+ i -= ARRAY_SIZE(bltins1);
+ if (i < ARRAY_SIZE(bltins2)) {
+ return bltins2[i].b_cmd;
+ }
+# if ENABLE_HUSH_FUNCTIONS
+ {
+ struct function *funcp;
+ i -= ARRAY_SIZE(bltins2);
+ for (funcp = G.top_func; funcp; funcp = funcp->next) {
+ if (--i < 0)
+ return funcp->name;
+ }
+ }
+# endif
+ return NULL;
+}
+#endif
+#endif /* !__U_BOOT__ */
+
+#ifndef __U_BOOT__
+static void remove_nested_vars(void)
+{
+ struct variable *cur;
+ struct variable **cur_pp;
+
+ cur_pp = &G.top_var;
+ while ((cur = *cur_pp) != NULL) {
+ if (cur->var_nest_level <= G.var_nest_level) {
+ cur_pp = &cur->next;
+ continue;
+ }
+ /* Unexport */
+ if (cur->flg_export) {
+ debug_printf_env("unexporting nested '%s'/%u\n", cur->varstr, cur->var_nest_level);
+ bb_unsetenv(cur->varstr);
+ }
+ /* Remove from global list */
+ *cur_pp = cur->next;
+ /* Free */
+ if (!cur->max_len) {
+ debug_printf_env("freeing nested '%s'/%u\n", cur->varstr, cur->var_nest_level);
+ free(cur->varstr);
+ }
+ free(cur);
+ }
+}
+
+static void enter_var_nest_level(void)
+{
+ G.var_nest_level++;
+ debug_printf_env("var_nest_level++ %u\n", G.var_nest_level);
+
+ /* Try: f() { echo -n .; f; }; f
+ * struct variable::var_nest_level is uint16_t,
+ * thus limiting recursion to < 2^16.
+ * In any case, with 8 Mbyte stack SEGV happens
+ * not too long after 2^16 recursions anyway.
+ */
+ if (G.var_nest_level > 0xff00)
+ bb_error_msg_and_die("fatal recursion (depth %u)", G.var_nest_level);
+}
+
+static void leave_var_nest_level(void)
+{
+ G.var_nest_level--;
+ debug_printf_env("var_nest_level-- %u\n", G.var_nest_level);
+ if (HUSH_DEBUG && (int)G.var_nest_level < 0)
+ bb_simple_error_msg_and_die("BUG: nesting underflow");
+
+ remove_nested_vars();
+}
+#endif /* __U_BOOT__ */
+
+#if ENABLE_HUSH_FUNCTIONS
+static struct function **find_function_slot(const char *name)
+{
+ struct function *funcp;
+ struct function **funcpp = &G.top_func;
+
+ while ((funcp = *funcpp) != NULL) {
+ if (strcmp(name, funcp->name) == 0) {
+ debug_printf_exec("found function '%s'\n", name);
+ break;
+ }
+ funcpp = &funcp->next;
+ }
+ return funcpp;
+}
+
+static ALWAYS_INLINE const struct function *find_function(const char *name)
+{
+ const struct function *funcp = *find_function_slot(name);
+ return funcp;
+}
+
+/* Note: takes ownership on name ptr */
+static struct function *new_function(char *name)
+{
+ struct function **funcpp = find_function_slot(name);
+ struct function *funcp = *funcpp;
+
+ if (funcp != NULL) {
+ struct command *cmd = funcp->parent_cmd;
+ debug_printf_exec("func %p parent_cmd %p\n", funcp, cmd);
+ if (!cmd) {
+ debug_printf_exec("freeing & replacing function '%s'\n", funcp->name);
+ free(funcp->name);
+ /* Note: if !funcp->body, do not free body_as_string!
+ * This is a special case of "-F name body" function:
+ * body_as_string was not malloced! */
+ if (funcp->body) {
+ free_pipe_list(funcp->body);
+# if !BB_MMU
+ free(funcp->body_as_string);
+# endif
+ }
+ } else {
+ debug_printf_exec("reinserting in tree & replacing function '%s'\n", funcp->name);
+ cmd->argv[0] = funcp->name;
+ cmd->group = funcp->body;
+# if !BB_MMU
+ cmd->group_as_string = funcp->body_as_string;
+# endif
+ }
+ } else {
+ debug_printf_exec("remembering new function '%s'\n", name);
+ funcp = *funcpp = xzalloc(sizeof(*funcp));
+ /*funcp->next = NULL;*/
+ }
+
+ funcp->name = name;
+ return funcp;
+}
+
+# if ENABLE_HUSH_UNSET
+static void unset_func(const char *name)
+{
+ struct function **funcpp = find_function_slot(name);
+ struct function *funcp = *funcpp;
+
+ if (funcp != NULL) {
+ debug_printf_exec("freeing function '%s'\n", funcp->name);
+ *funcpp = funcp->next;
+ /* funcp is unlinked now, deleting it.
+ * Note: if !funcp->body, the function was created by
+ * "-F name body", do not free ->body_as_string
+ * and ->name as they were not malloced. */
+ if (funcp->body) {
+ free_pipe_list(funcp->body);
+ free(funcp->name);
+# if !BB_MMU
+ free(funcp->body_as_string);
+# endif
+ }
+ free(funcp);
+ }
+}
+# endif
+
+# if BB_MMU
+#define exec_function(to_free, funcp, argv) \
+ exec_function(funcp, argv)
+# endif
+static void exec_function(char ***to_free,
+ const struct function *funcp,
+ char **argv) NORETURN;
+static void exec_function(char ***to_free,
+ const struct function *funcp,
+ char **argv)
+{
+# if BB_MMU
+ int n;
+
+ argv[0] = G.global_argv[0];
+ G.global_argv = argv;
+ G.global_argc = n = 1 + string_array_len(argv + 1);
+
+// Example when we are here: "cmd | func"
+// func will run with saved-redirect fds open.
+// $ f() { echo /proc/self/fd/*; }
+// $ true | f
+// /proc/self/fd/0 /proc/self/fd/1 /proc/self/fd/2 /proc/self/fd/255 /proc/self/fd/3
+// stdio^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ G_interactive_fd^ DIR fd for glob
+// Same in script:
+// $ . ./SCRIPT
+// /proc/self/fd/0 /proc/self/fd/1 /proc/self/fd/2 /proc/self/fd/255 /proc/self/fd/3 /proc/self/fd/4
+// stdio^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ G_interactive_fd^ opened ./SCRIPT DIR fd for glob
+// They are CLOEXEC so external programs won't see them, but
+// for "more correctness" we might want to close those extra fds here:
+//? close_saved_fds_and_FILE_fds();
+
+ /* "we are in a function, ok to use return" */
+ G_flag_return_in_progress = -1;
+ enter_var_nest_level();
+ IF_HUSH_LOCAL(G.func_nest_level++;)
+
+ /* On MMU, funcp->body is always non-NULL */
+ n = run_list(funcp->body);
+ _exit(n);
+# else
+//? close_saved_fds_and_FILE_fds();
+
+//TODO: check whether "true | func_with_return" works
+
+ re_execute_shell(to_free,
+ funcp->body_as_string,
+ G.global_argv[0],
+ argv + 1,
+ NULL);
+# endif
+}
+
+static int run_function(const struct function *funcp, char **argv)
+{
+ int rc;
+ save_arg_t sv;
+ smallint sv_flg;
+
+ save_and_replace_G_args(&sv, argv);
+
+ /* "We are in function, ok to use return" */
+ sv_flg = G_flag_return_in_progress;
+ G_flag_return_in_progress = -1;
+
+ /* Make "local" variables properly shadow previous ones */
+ IF_HUSH_LOCAL(enter_var_nest_level();)
+ IF_HUSH_LOCAL(G.func_nest_level++;)
+
+ /* On MMU, funcp->body is always non-NULL */
+# if !BB_MMU
+ if (!funcp->body) {
+ /* Function defined by -F */
+ parse_and_run_string(funcp->body_as_string);
+ rc = G.last_exitcode;
+ } else
+# endif
+ {
+ rc = run_list(funcp->body);
+ }
+
+ IF_HUSH_LOCAL(G.func_nest_level--;)
+ IF_HUSH_LOCAL(leave_var_nest_level();)
+
+ G_flag_return_in_progress = sv_flg;
+# if ENABLE_HUSH_TRAP
+ debug_printf_exec("G.return_exitcode=-1\n");
+ G.return_exitcode = -1; /* invalidate stashed return value */
+# endif
+
+ restore_G_args(&sv, argv);
+
+ return rc;
+}
+#endif /* ENABLE_HUSH_FUNCTIONS */
+
+
+#ifndef __U_BOOT__
+#if BB_MMU
+#define exec_builtin(to_free, x, argv) \
+ exec_builtin(x, argv)
+#else
+#define exec_builtin(to_free, x, argv) \
+ exec_builtin(to_free, argv)
+#endif
+static void exec_builtin(char ***to_free,
+ const struct built_in_command *x,
+ char **argv) NORETURN;
+static void exec_builtin(char ***to_free,
+ const struct built_in_command *x,
+ char **argv)
+{
+#if BB_MMU
+ int rcode;
+//? close_saved_fds_and_FILE_fds();
+ rcode = x->b_function(argv);
+ fflush_all();
+ _exit(rcode);
+#else
+ fflush_all();
+ /* On NOMMU, we must never block!
+ * Example: { sleep 99 | read line; } & echo Ok
+ */
+ re_execute_shell(to_free,
+ argv[0],
+ G.global_argv[0],
+ G.global_argv + 1,
+ argv);
+#endif
+}
+#endif /* !__U_BOOT__ */
+
+
+#ifndef __U_BOOT__
+static void execvp_or_die(char **argv) NORETURN;
+static void execvp_or_die(char **argv)
+{
+ int e;
+ debug_printf_exec("execing '%s'\n", argv[0]);
+ /* Don't propagate SIG_IGN to the child */
+ if (SPECIAL_JOBSTOP_SIGS != 0)
+ switch_off_special_sigs(G.special_sig_mask & SPECIAL_JOBSTOP_SIGS);
+ execvp(argv[0], argv);
+ e = 2;
+ if (errno == EACCES) e = 126;
+ if (errno == ENOENT) e = 127;
+ bb_perror_msg("can't execute '%s'", argv[0]);
+ _exit(e);
+}
+
+#if ENABLE_HUSH_MODE_X
+static void x_mode_print_optionally_squoted(const char *str)
+{
+ unsigned len;
+ const char *cp;
+
+ cp = str;
+
+ /* the set of chars which-cause-string-to-be-squoted mimics bash */
+ /* test a char with: bash -c 'set -x; echo "CH"' */
+ if (str[strcspn(str, "\\\"'`$(){}[]<>;#&|~*?!^"
+ " " "\001\002\003\004\005\006\007"
+ "\010\011\012\013\014\015\016\017"
+ "\020\021\022\023\024\025\026\027"
+ "\030\031\032\033\034\035\036\037"
+ )
+ ] == '\0'
+ ) {
+ /* string has no special chars */
+ x_mode_addstr(str);
+ return;
+ }
+
+ cp = str;
+ for (;;) {
+ /* print '....' up to EOL or first squote */
+ len = (int)(strchrnul(cp, '\'') - cp);
+ if (len != 0) {
+ x_mode_addchr('\'');
+ x_mode_addblock(cp, len);
+ x_mode_addchr('\'');
+ cp += len;
+ }
+ if (*cp == '\0')
+ break;
+ /* string contains squote(s), print them as \' */
+ x_mode_addchr('\\');
+ x_mode_addchr('\'');
+ cp++;
+ }
+}
+static void dump_cmd_in_x_mode(char **argv)
+{
+ if (G_x_mode && argv) {
+ unsigned n;
+
+ /* "+[+++...][ cmd...]\n\0" */
+ x_mode_prefix();
+ n = 0;
+ while (argv[n]) {
+ x_mode_addchr(' ');
+ if (argv[n][0] == '\0') {
+ x_mode_addchr('\'');
+ x_mode_addchr('\'');
+ } else {
+ x_mode_print_optionally_squoted(argv[n]);
+ }
+ n++;
+ }
+ x_mode_flush();
+ }
+}
+#else
+# define dump_cmd_in_x_mode(argv) ((void)0)
+#endif
+#endif /* !__U_BOOT__ */
+
+#ifndef __U_BOOT__
+#if ENABLE_HUSH_COMMAND
+static void if_command_vV_print_and_exit(char opt_vV, char *cmd, const char *explanation)
+{
+ char *to_free;
+
+ if (!opt_vV)
+ return;
+
+ to_free = NULL;
+ if (!explanation) {
+ char *path = getenv("PATH");
+ explanation = to_free = find_executable(cmd, &path); /* path == NULL is ok */
+ if (!explanation)
+ _exit(1); /* PROG was not found */
+ if (opt_vV != 'V')
+ cmd = to_free; /* -v PROG prints "/path/to/PROG" */
+ }
+ printf((opt_vV == 'V') ? "%s is %s\n" : "%s\n", cmd, explanation);
+ free(to_free);
+ fflush_all();
+ _exit(0);
+}
+#else
+# define if_command_vV_print_and_exit(a,b,c) ((void)0)
+#endif
+#endif /* !__U_BOOT__ */
+
+#if BB_MMU
+#define pseudo_exec_argv(nommu_save, argv, assignment_cnt, argv_expanded) \
+ pseudo_exec_argv(argv, assignment_cnt, argv_expanded)
+#define pseudo_exec(nommu_save, command, argv_expanded) \
+ pseudo_exec(command, argv_expanded)
+#endif
+
+#ifndef __U_BOOT__
+/* Called after [v]fork() in run_pipe, or from builtin_exec.
+ * Never returns.
+ * Don't exit() here. If you don't exec, use _exit instead.
+ * The at_exit handlers apparently confuse the calling process,
+ * in particular stdin handling. Not sure why? -- because of vfork! (vda)
+ */
+static void pseudo_exec_argv(nommu_save_t *nommu_save,
+ char **argv, int assignment_cnt,
+ char **argv_expanded) NORETURN;
+static NOINLINE void pseudo_exec_argv(nommu_save_t *nommu_save,
+ char **argv, int assignment_cnt,
+ char **argv_expanded)
+{
+ const struct built_in_command *x;
+ struct variable **sv_shadowed;
+ char **new_env;
+ IF_HUSH_COMMAND(char opt_vV = 0;)
+ IF_HUSH_FUNCTIONS(const struct function *funcp;)
+
+ new_env = expand_assignments(argv, assignment_cnt);
+ dump_cmd_in_x_mode(new_env);
+
+ if (!argv[assignment_cnt]) {
+ /* Case when we are here: ... | var=val | ...
+ * (note that we do not exit early, i.e., do not optimize out
+ * expand_assignments(): think about ... | var=`sleep 1` | ...
+ */
+ free_strings(new_env);
+ _exit_SUCCESS();
+ }
+
+ sv_shadowed = G.shadowed_vars_pp;
+#if BB_MMU
+ G.shadowed_vars_pp = NULL; /* "don't save, free them instead" */
+#else
+ G.shadowed_vars_pp = &nommu_save->old_vars;
+ G.var_nest_level++;
+#endif
+ set_vars_and_save_old(new_env);
+ G.shadowed_vars_pp = sv_shadowed;
+
+ if (argv_expanded) {
+ argv = argv_expanded;
+ } else {
+ argv = expand_strvec_to_strvec(argv + assignment_cnt);
+#if !BB_MMU
+ nommu_save->argv = argv;
+#endif
+ }
+ dump_cmd_in_x_mode(argv);
+
+#if ENABLE_FEATURE_SH_STANDALONE || BB_MMU
+ if (strchr(argv[0], '/') != NULL)
+ goto skip;
+#endif
+
+#if ENABLE_HUSH_FUNCTIONS
+ /* Check if the command matches any functions (this goes before bltins) */
+ funcp = find_function(argv[0]);
+ if (funcp)
+ exec_function(&nommu_save->argv_from_re_execing, funcp, argv);
+#endif
+
+#if ENABLE_HUSH_COMMAND
+ /* "command BAR": run BAR without looking it up among functions
+ * "command -v BAR": print "BAR" or "/path/to/BAR"; or exit 1
+ * "command -V BAR": print "BAR is {a function,a shell builtin,/path/to/BAR}"
+ */
+ while (strcmp(argv[0], "command") == 0 && argv[1]) {
+ char *p;
+
+ argv++;
+ p = *argv;
+ if (p[0] != '-' || !p[1])
+ continue; /* bash allows "command command command [-OPT] BAR" */
+
+ for (;;) {
+ p++;
+ switch (*p) {
+ case '\0':
+ argv++;
+ p = *argv;
+ if (p[0] != '-' || !p[1])
+ goto after_opts;
+ continue; /* next arg is also -opts, process it too */
+ case 'v':
+ case 'V':
+ opt_vV = *p;
+ continue;
+ default:
+ bb_error_msg_and_die("%s: %s: invalid option", "command", argv[0]);
+ }
+ }
+ }
+ after_opts:
+# if ENABLE_HUSH_FUNCTIONS
+ if (opt_vV && find_function(argv[0]))
+ if_command_vV_print_and_exit(opt_vV, argv[0], "a function");
+# endif
+#endif
+
+ /* Check if the command matches any of the builtins.
+ * Depending on context, this might be redundant. But it's
+ * easier to waste a few CPU cycles than it is to figure out
+ * if this is one of those cases.
+ */
+ /* Why "BB_MMU ? :" difference in logic? -
+ * On NOMMU, it is more expensive to re-execute shell
+ * just in order to run echo or test builtin.
+ * It's better to skip it here and run corresponding
+ * non-builtin later. */
+ x = BB_MMU ? find_builtin(argv[0]) : find_builtin1(argv[0]);
+ if (x) {
+ if_command_vV_print_and_exit(opt_vV, argv[0], "a shell builtin");
+ exec_builtin(&nommu_save->argv_from_re_execing, x, argv);
+ }
+
+#if ENABLE_FEATURE_SH_STANDALONE
+ /* Check if the command matches any busybox applets */
+ {
+ int a = find_applet_by_name(argv[0]);
+ if (a >= 0) {
+ if_command_vV_print_and_exit(opt_vV, argv[0], "an applet");
+# if BB_MMU /* see above why on NOMMU it is not allowed */
+ if (APPLET_IS_NOEXEC(a)) {
+ /* Do not leak open fds from opened script files etc.
+ * Testcase: interactive "ls -l /proc/self/fd"
+ * should not show tty fd open.
+ */
+ close_saved_fds_and_FILE_fds();
+//FIXME: should also close saved redir fds
+//This casuses test failures in
+//redir_children_should_not_see_saved_fd_2.tests
+//redir_children_should_not_see_saved_fd_3.tests
+//if you replace "busybox find" with just "find" in them
+ /* Without this, "rm -i FILE" can't be ^C'ed: */
+ switch_off_special_sigs(G.special_sig_mask);
+ debug_printf_exec("running applet '%s'\n", argv[0]);
+ run_noexec_applet_and_exit(a, argv[0], argv);
+ }
+# endif
+ /* Re-exec ourselves */
+ debug_printf_exec("re-execing applet '%s'\n", argv[0]);
+ /* Don't propagate SIG_IGN to the child */
+ if (SPECIAL_JOBSTOP_SIGS != 0)
+ switch_off_special_sigs(G.special_sig_mask & SPECIAL_JOBSTOP_SIGS);
+ execv(bb_busybox_exec_path, argv);
+ /* If they called chroot or otherwise made the binary no longer
+ * executable, fall through */
+ }
+ }
+#endif
+
+#if ENABLE_FEATURE_SH_STANDALONE || BB_MMU
+ skip:
+#endif
+ if_command_vV_print_and_exit(opt_vV, argv[0], NULL);
+ execvp_or_die(argv);
+}
+
+/* Called after [v]fork() in run_pipe
+ */
+static void pseudo_exec(nommu_save_t *nommu_save,
+ struct command *command,
+ char **argv_expanded) NORETURN;
+static void pseudo_exec(nommu_save_t *nommu_save,
+ struct command *command,
+ char **argv_expanded)
+{
+#if ENABLE_HUSH_FUNCTIONS
+ if (command->cmd_type == CMD_FUNCDEF) {
+ /* Ignore funcdefs in pipes:
+ * true | f() { cmd }
+ */
+ _exit(0);
+ }
+#endif
+
+ if (command->argv) {
+ pseudo_exec_argv(nommu_save, command->argv,
+ command->assignment_cnt, argv_expanded);
+ }
+
+ if (command->group) {
+ /* Cases when we are here:
+ * ( list )
+ * { list } &
+ * ... | ( list ) | ...
+ * ... | { list } | ...
+ */
+#if BB_MMU
+ int rcode;
+ debug_printf_exec("pseudo_exec: run_list\n");
+ reset_traps_to_defaults();
+ rcode = run_list(command->group);
+ /* OK to leak memory by not calling free_pipe_list,
+ * since this process is about to exit */
+ _exit(rcode);
+#else
+ re_execute_shell(&nommu_save->argv_from_re_execing,
+ command->group_as_string,
+ G.global_argv[0],
+ G.global_argv + 1,
+ NULL);
+#endif
+ }
+
+ /* Case when we are here: ... | >file */
+ debug_printf_exec("pseudo_exec'ed null command\n");
+ _exit_SUCCESS();
+}
+
+#if ENABLE_HUSH_JOB
+static const char *get_cmdtext(struct pipe *pi)
+{
+ char **argv;
+ char *p;
+ int len;
+
+ /* This is subtle. ->cmdtext is created only on first backgrounding.
+ * (Think "cat, <ctrl-z>, fg, <ctrl-z>, fg, <ctrl-z>...." here...)
+ * On subsequent bg argv is trashed, but we won't use it */
+ if (pi->cmdtext)
+ return pi->cmdtext;
+
+ argv = pi->cmds[0].argv;
+ if (!argv) {
+ pi->cmdtext = xzalloc(1);
+ return pi->cmdtext;
+ }
+ len = 0;
+ do {
+ len += strlen(*argv) + 1;
+ } while (*++argv);
+ p = xmalloc(len);
+ pi->cmdtext = p;
+ argv = pi->cmds[0].argv;
+ do {
+ p = stpcpy(p, *argv);
+ *p++ = ' ';
+ } while (*++argv);
+ p[-1] = '\0';
+ return pi->cmdtext;
+}
+
+static void remove_job_from_table(struct pipe *pi)
+{
+ struct pipe *prev_pipe;
+
+ if (pi == G.job_list) {
+ G.job_list = pi->next;
+ } else {
+ prev_pipe = G.job_list;
+ while (prev_pipe->next != pi)
+ prev_pipe = prev_pipe->next;
+ prev_pipe->next = pi->next;
+ }
+ G.last_jobid = 0;
+ if (G.job_list)
+ G.last_jobid = G.job_list->jobid;
+}
+
+static void delete_finished_job(struct pipe *pi)
+{
+ remove_job_from_table(pi);
+ free_pipe(pi);
+}
+
+static void clean_up_last_dead_job(void)
+{
+ if (G.job_list && !G.job_list->alive_cmds)
+ delete_finished_job(G.job_list);
+}
+
+static void insert_job_into_table(struct pipe *pi)
+{
+ struct pipe *job, **jobp;
+ int i;
+
+ clean_up_last_dead_job();
+
+ /* Find the end of the list, and find next job ID to use */
+ i = 0;
+ jobp = &G.job_list;
+ while ((job = *jobp) != NULL) {
+ if (job->jobid > i)
+ i = job->jobid;
+ jobp = &job->next;
+ }
+ pi->jobid = i + 1;
+
+ /* Create a new job struct at the end */
+ job = *jobp = xmemdup(pi, sizeof(*pi));
+ job->next = NULL;
+ job->cmds = xzalloc(sizeof(pi->cmds[0]) * pi->num_cmds);
+ /* Cannot copy entire pi->cmds[] vector! This causes double frees */
+ for (i = 0; i < pi->num_cmds; i++) {
+ job->cmds[i].pid = pi->cmds[i].pid;
+ /* all other fields are not used and stay zero */
+ }
+ job->cmdtext = xstrdup(get_cmdtext(pi));
+
+ if (G_interactive_fd)
+ printf("[%u] %u %s\n", job->jobid, (unsigned)job->cmds[0].pid, job->cmdtext);
+ G.last_jobid = job->jobid;
+}
+#endif /* JOB */
+
+static int job_exited_or_stopped(struct pipe *pi)
+{
+ int rcode, i;
+
+ if (pi->alive_cmds != pi->stopped_cmds)
+ return -1;
+
+ /* All processes in fg pipe have exited or stopped */
+ rcode = 0;
+ i = pi->num_cmds;
+ while (--i >= 0) {
+ rcode = pi->cmds[i].cmd_exitcode;
+ /* usually last process gives overall exitstatus,
+ * but with "set -o pipefail", last *failed* process does */
+ if (G.o_opt[OPT_O_PIPEFAIL] == 0 || rcode != 0)
+ break;
+ }
+ IF_HAS_KEYWORDS(if (pi->pi_inverted) rcode = !rcode;)
+ return rcode;
+}
+
+static int process_wait_result(struct pipe *fg_pipe, pid_t childpid, int status)
+{
+#if ENABLE_HUSH_JOB
+ struct pipe *pi;
+#endif
+ int i, dead;
+
+ dead = WIFEXITED(status) || WIFSIGNALED(status);
+
+#if DEBUG_JOBS
+ if (WIFSTOPPED(status))
+ debug_printf_jobs("pid %d stopped by sig %d (exitcode %d)\n",
+ childpid, WSTOPSIG(status), WEXITSTATUS(status));
+ if (WIFSIGNALED(status))
+ debug_printf_jobs("pid %d killed by sig %d (exitcode %d)\n",
+ childpid, WTERMSIG(status), WEXITSTATUS(status));
+ if (WIFEXITED(status))
+ debug_printf_jobs("pid %d exited, exitcode %d\n",
+ childpid, WEXITSTATUS(status));
+#endif
+ /* Were we asked to wait for a fg pipe? */
+ if (fg_pipe) {
+ i = fg_pipe->num_cmds;
+
+ while (--i >= 0) {
+ int rcode;
+
+ debug_printf_jobs("check pid %d\n", fg_pipe->cmds[i].pid);
+ if (fg_pipe->cmds[i].pid != childpid)
+ continue;
+ if (dead) {
+ int ex;
+ fg_pipe->cmds[i].pid = 0;
+ fg_pipe->alive_cmds--;
+ ex = WEXITSTATUS(status);
+ /* bash prints killer signal's name for *last*
+ * process in pipe (prints just newline for SIGINT/SIGPIPE).
+ * Mimic this. Example: "sleep 5" + (^\ or kill -QUIT)
+ */
+ if (WIFSIGNALED(status)) {
+ int sig = WTERMSIG(status);
+#if ENABLE_HUSH_JOB
+ if (G.run_list_level == 1
+ /* ^^^^^ Do not print in nested contexts, example:
+ * echo `sleep 1; sh -c 'kill -9 $$'` - prints "137", NOT "Killed 137"
+ */
+ && i == fg_pipe->num_cmds-1
+ ) {
+ /* strsignal() is for bash compat. ~600 bloat versus bbox's get_signame() */
+ puts(sig == SIGINT || sig == SIGPIPE ? "" : strsignal(sig));
+ }
+#endif
+ /* TODO: if (WCOREDUMP(status)) + " (core dumped)"; */
+ /* MIPS has 128 sigs (1..128), if sig==128,
+ * 128 + sig would result in exitcode 256 -> 0!
+ */
+ ex = 128 | sig;
+ }
+ fg_pipe->cmds[i].cmd_exitcode = ex;
+ } else {
+ fg_pipe->stopped_cmds++;
+ }
+ debug_printf_jobs("fg_pipe: alive_cmds %d stopped_cmds %d\n",
+ fg_pipe->alive_cmds, fg_pipe->stopped_cmds);
+ rcode = job_exited_or_stopped(fg_pipe);
+ if (rcode >= 0) {
+/* Note: *non-interactive* bash does not continue if all processes in fg pipe
+ * are stopped. Testcase: "cat | cat" in a script (not on command line!)
+ * and "killall -STOP cat" */
+ if (G_interactive_fd) {
+#if ENABLE_HUSH_JOB
+ if (fg_pipe->alive_cmds != 0)
+ insert_job_into_table(fg_pipe);
+#endif
+ return rcode;
+ }
+ if (fg_pipe->alive_cmds == 0)
+ return rcode;
+ }
+ /* There are still running processes in the fg_pipe */
+ return -1;
+ }
+ /* It wasn't in fg_pipe, look for process in bg pipes */
+ }
+
+#if ENABLE_HUSH_JOB
+ /* We were asked to wait for bg or orphaned children */
+ /* No need to remember exitcode in this case */
+ for (pi = G.job_list; pi; pi = pi->next) {
+ for (i = 0; i < pi->num_cmds; i++) {
+ if (pi->cmds[i].pid == childpid)
+ goto found_pi_and_prognum;
+ }
+ }
+ /* Happens when shell is used as init process (init=/bin/sh) */
+ debug_printf("checkjobs: pid %d was not in our list!\n", childpid);
+ return -1; /* this wasn't a process from fg_pipe */
+
+ found_pi_and_prognum:
+ if (dead) {
+ /* child exited */
+ int rcode = WEXITSTATUS(status);
+ if (WIFSIGNALED(status))
+ /* NB: not 128 + sig, MIPS has sig 128 */
+ rcode = 128 | WTERMSIG(status);
+ pi->cmds[i].cmd_exitcode = rcode;
+ if (G.last_bg_pid == pi->cmds[i].pid)
+ G.last_bg_pid_exitcode = rcode;
+ pi->cmds[i].pid = 0;
+ pi->alive_cmds--;
+ if (!pi->alive_cmds) {
+# if ENABLE_HUSH_BASH_COMPAT
+ G.dead_job_exitcode = job_exited_or_stopped(pi);
+# endif
+ if (G_interactive_fd) {
+ printf(JOB_STATUS_FORMAT, pi->jobid,
+ "Done", pi->cmdtext);
+ delete_finished_job(pi);
+ } else {
+/*
+ * bash deletes finished jobs from job table only in interactive mode,
+ * after "jobs" cmd, or if pid of a new process matches one of the old ones
+ * (see cleanup_dead_jobs(), delete_old_job(), J_NOTIFIED in bash source).
+ * Testcase script: "(exit 3) & sleep 1; wait %1; echo $?" prints 3 in bash.
+ * We only retain one "dead" job, if it's the single job on the list.
+ * This covers most of real-world scenarios where this is useful.
+ */
+ if (pi != G.job_list)
+ delete_finished_job(pi);
+ }
+ }
+ } else {
+ /* child stopped */
+ pi->stopped_cmds++;
+ }
+#endif
+ return -1; /* this wasn't a process from fg_pipe */
+}
+
+/* Check to see if any processes have exited -- if they have,
+ * figure out why and see if a job has completed.
+ *
+ * If non-NULL fg_pipe: wait for its completion or stop.
+ * Return its exitcode or zero if stopped.
+ *
+ * Alternatively (fg_pipe == NULL, waitfor_pid != 0):
+ * waitpid(WNOHANG), if waitfor_pid exits or stops, return exitcode+1,
+ * else return <0 if waitpid errors out (e.g. ECHILD: nothing to wait for)
+ * or 0 if no children changed status.
+ *
+ * Alternatively (fg_pipe == NULL, waitfor_pid == 0),
+ * return <0 if waitpid errors out (e.g. ECHILD: nothing to wait for)
+ * or 0 if no children changed status.
+ */
+static int checkjobs(struct pipe *fg_pipe, pid_t waitfor_pid)
+{
+ int attributes;
+ int status;
+ int rcode = 0;
+
+ debug_printf_jobs("checkjobs %p\n", fg_pipe);
+
+ attributes = WUNTRACED;
+ if (fg_pipe == NULL)
+ attributes |= WNOHANG;
+
+ errno = 0;
+#if ENABLE_HUSH_FAST
+ if (G.handled_SIGCHLD == G.count_SIGCHLD) {
+//bb_error_msg("[%d] checkjobs: G.count_SIGCHLD:%d G.handled_SIGCHLD:%d children?:%d fg_pipe:%p",
+//getpid(), G.count_SIGCHLD, G.handled_SIGCHLD, G.we_have_children, fg_pipe);
+ /* There was neither fork nor SIGCHLD since last waitpid */
+ /* Avoid doing waitpid syscall if possible */
+ if (!G.we_have_children) {
+ errno = ECHILD;
+ return -1;
+ }
+ if (fg_pipe == NULL) { /* is WNOHANG set? */
+ /* We have children, but they did not exit
+ * or stop yet (we saw no SIGCHLD) */
+ return 0;
+ }
+ /* else: !WNOHANG, waitpid will block, can't short-circuit */
+ }
+#endif
+
+/* Do we do this right?
+ * bash-3.00# sleep 20 | false
+ * <ctrl-Z pressed>
+ * [3]+ Stopped sleep 20 | false
+ * bash-3.00# echo $?
+ * 1 <========== bg pipe is not fully done, but exitcode is already known!
+ * [hush 1.14.0: yes we do it right]
+ */
+ while (1) {
+ pid_t childpid;
+#if ENABLE_HUSH_FAST
+ int i;
+ i = G.count_SIGCHLD;
+#endif
+ childpid = waitpid(-1, &status, attributes);
+ if (childpid <= 0) {
+ if (childpid && errno != ECHILD)
+ bb_simple_perror_msg("waitpid");
+#if ENABLE_HUSH_FAST
+ else { /* Until next SIGCHLD, waitpid's are useless */
+ G.we_have_children = (childpid == 0);
+ G.handled_SIGCHLD = i;
+//bb_error_msg("[%d] checkjobs: waitpid returned <= 0, G.count_SIGCHLD:%d G.handled_SIGCHLD:%d", getpid(), G.count_SIGCHLD, G.handled_SIGCHLD);
+ }
+#endif
+ /* ECHILD (no children), or 0 (no change in children status) */
+ rcode = childpid;
+ break;
+ }
+ rcode = process_wait_result(fg_pipe, childpid, status);
+ if (rcode >= 0) {
+ /* fg_pipe exited or stopped */
+ break;
+ }
+ if (childpid == waitfor_pid) { /* "wait PID" */
+ debug_printf_exec("childpid==waitfor_pid:%d status:0x%08x\n", childpid, status);
+ rcode = WEXITSTATUS(status);
+ if (WIFSIGNALED(status))
+ rcode = 128 | WTERMSIG(status);
+ if (WIFSTOPPED(status))
+ /* bash: "cmd & wait $!" and cmd stops: $? = 128 | stopsig */
+ rcode = 128 | WSTOPSIG(status);
+ rcode++;
+ break; /* "wait PID" called us, give it exitcode+1 */
+ }
+#if ENABLE_HUSH_BASH_COMPAT
+ if (-1 == waitfor_pid /* "wait -n" (wait for any one job) */
+ && G.dead_job_exitcode >= 0 /* some job did finish */
+ ) {
+ debug_printf_exec("waitfor_pid:-1\n");
+ rcode = G.dead_job_exitcode + 1;
+ break;
+ }
+#endif
+ /* This wasn't one of our processes, or */
+ /* fg_pipe still has running processes, do waitpid again */
+ } /* while (waitpid succeeds)... */
+
+ return rcode;
+}
+
+#if ENABLE_HUSH_JOB
+static int checkjobs_and_fg_shell(struct pipe *fg_pipe)
+{
+ pid_t p;
+ int rcode = checkjobs(fg_pipe, 0 /*(no pid to wait for)*/);
+ if (G_saved_tty_pgrp) {
+ /* Job finished, move the shell to the foreground */
+ p = getpgrp(); /* our process group id */
+ debug_printf_jobs("fg'ing ourself: getpgrp()=%d\n", (int)p);
+ tcsetpgrp(G_interactive_fd, p);
+ }
+ return rcode;
+}
+#endif
+
+/* Start all the jobs, but don't wait for anything to finish.
+ * See checkjobs().
+ *
+ * Return code is normally -1, when the caller has to wait for children
+ * to finish to determine the exit status of the pipe. If the pipe
+ * is a simple builtin command, however, the action is done by the
+ * time run_pipe returns, and the exit code is provided as the
+ * return value.
+ *
+ * Returns -1 only if started some children. IOW: we have to
+ * mask out retvals of builtins etc with 0xff!
+ *
+ * The only case when we do not need to [v]fork is when the pipe
+ * is single, non-backgrounded, non-subshell command. Examples:
+ * cmd ; ... { list } ; ...
+ * cmd && ... { list } && ...
+ * cmd || ... { list } || ...
+ * If it is, then we can run cmd as a builtin, NOFORK,
+ * or (if SH_STANDALONE) an applet, and we can run the { list }
+ * with run_list. If it isn't one of these, we fork and exec cmd.
+ *
+ * Cases when we must fork:
+ * non-single: cmd | cmd
+ * backgrounded: cmd & { list } &
+ * subshell: ( list ) [&]
+ */
+#if !ENABLE_HUSH_MODE_X
+#define redirect_and_varexp_helper(command, sqp, argv_expanded) \
+ redirect_and_varexp_helper(command, sqp)
+#endif
+static int redirect_and_varexp_helper(
+ struct command *command,
+ struct squirrel **sqp,
+ char **argv_expanded)
+{
+ /* Assignments occur before redirects. Try:
+ * a=`sleep 1` sleep 2 3>/qwe/rty
+ */
+
+ char **new_env = expand_assignments(command->argv, command->assignment_cnt);
+ dump_cmd_in_x_mode(new_env);
+ dump_cmd_in_x_mode(argv_expanded);
+ /* this takes ownership of new_env[i] elements, and frees new_env: */
+ set_vars_and_save_old(new_env);
+
+ return setup_redirects(command, sqp);
+}
+#endif /* !__U_BOOT__ */
+
+static NOINLINE int run_pipe(struct pipe *pi)
+{
+ static const char *const null_ptr = NULL;
+
+ int cmd_no;
+#ifndef __U_BOOT__
+ int next_infd;
+#endif /* !__U_BOOT__ */
+ struct command *command;
+ char **argv_expanded;
+ char **argv;
+#ifndef __U_BOOT__
+ struct squirrel *squirrel = NULL;
+#endif /* !__U_BOOT__ */
+ int rcode;
+
+#ifdef __U_BOOT__
+ /*
+ * Set rcode here to avoid returning a garbage value in the middle of
+ * the function.
+ * Also, if an error occurs, rcode value would be changed and last
+ * return will signal the error.
+ */
+ rcode = 0;
+#endif /* __U_BOOT__ */
+
+ debug_printf_exec("run_pipe start: members:%d\n", pi->num_cmds);
+ debug_enter();
+
+ /* Testcase: set -- q w e; (IFS='' echo "$*"; IFS=''; echo "$*"); echo "$*"
+ * Result should be 3 lines: q w e, qwe, q w e
+ */
+ if (G.ifs_whitespace != G.ifs)
+ free(G.ifs_whitespace);
+ G.ifs = get_local_var_value("IFS");
+ if (G.ifs) {
+ char *p;
+ G.ifs_whitespace = (char*)G.ifs;
+ p = skip_whitespace(G.ifs);
+ if (*p) {
+ /* Not all $IFS is whitespace */
+ char *d;
+ int len = p - G.ifs;
+ p = skip_non_whitespace(p);
+ G.ifs_whitespace = xmalloc(len + strlen(p) + 1); /* can overestimate */
+ d = mempcpy(G.ifs_whitespace, G.ifs, len);
+ while (*p) {
+ if (isspace(*p))
+ *d++ = *p;
+ p++;
+ }
+ *d = '\0';
+ }
+ } else {
+ G.ifs = defifs;
+ G.ifs_whitespace = (char*)G.ifs;
+ }
+
+#ifndef __U_BOOT__
+ IF_HUSH_JOB(pi->pgrp = -1;)
+ pi->stopped_cmds = 0;
+#endif /* !__U_BOOT__ */
+ command = &pi->cmds[0];
+ argv_expanded = NULL;
+
+#ifndef __U_BOOT__
+ if (pi->num_cmds != 1
+ || pi->followup == PIPE_BG
+ || command->cmd_type == CMD_SUBSHELL
+ ) {
+ goto must_fork;
+ }
+
+ pi->alive_cmds = 1;
+#endif /* !__U_BOOT__ */
+
+ debug_printf_exec(": group:%p argv:'%s'\n",
+ command->group, command->argv ? command->argv[0] : "NONE");
+
+ if (command->group) {
+#if ENABLE_HUSH_FUNCTIONS
+ if (command->cmd_type == CMD_FUNCDEF) {
+ /* "executing" func () { list } */
+ struct function *funcp;
+
+ funcp = new_function(command->argv[0]);
+ /* funcp->name is already set to argv[0] */
+ funcp->body = command->group;
+# if !BB_MMU
+ funcp->body_as_string = command->group_as_string;
+ command->group_as_string = NULL;
+# endif
+ command->group = NULL;
+ command->argv[0] = NULL;
+ debug_printf_exec("cmd %p has child func at %p\n", command, funcp);
+ funcp->parent_cmd = command;
+ command->child_func = funcp;
+
+ debug_printf_exec("run_pipe: return EXIT_SUCCESS\n");
+ debug_leave();
+ return EXIT_SUCCESS;
+ }
+#endif
+ /* { list } */
+ debug_printf_exec("non-subshell group\n");
+ rcode = 1; /* exitcode if redir failed */
+#ifndef __U_BOOT__
+ if (setup_redirects(command, &squirrel) == 0) {
+#endif /* !__U_BOOT__ */
+ debug_printf_exec(": run_list\n");
+//FIXME: we need to pass squirrel down into run_list()
+//for SH_STANDALONE case, or else this construct:
+// { find /proc/self/fd; true; } >FILE; cmd2
+//has no way of closing saved fd#1 for "find",
+//and in SH_STANDALONE mode, "find" is not execed,
+//therefore CLOEXEC on saved fd does not help.
+ rcode = run_list(command->group) & 0xff;
+#ifndef __U_BOOT__
+ }
+ restore_redirects(squirrel);
+#endif /* !__U_BOOT__ */
+ IF_HAS_KEYWORDS(if (pi->pi_inverted) rcode = !rcode;)
+ debug_leave();
+ debug_printf_exec("run_pipe: return %d\n", rcode);
+ return rcode;
+ }
+
+ argv = command->argv ? command->argv : (char **) &null_ptr;
+ {
+#ifndef __U_BOOT__
+ const struct built_in_command *x;
+ IF_HUSH_FUNCTIONS(const struct function *funcp;)
+ IF_NOT_HUSH_FUNCTIONS(enum { funcp = 0 };)
+ struct variable **sv_shadowed;
+#endif /* !__U_BOOT__ */
+ struct variable *old_vars;
+
+#if ENABLE_HUSH_LINENO_VAR
+ G.execute_lineno = command->lineno;
+#endif
+
+ if (argv[command->assignment_cnt] == NULL) {
+ /* Assignments, but no command.
+ * Ensure redirects take effect (that is, create files).
+ * Try "a=t >file"
+ */
+ unsigned i;
+ G.expand_exitcode = 0;
+ only_assignments:
+#ifndef __U_BOOT__
+ rcode = setup_redirects(command, &squirrel);
+ restore_redirects(squirrel);
+#endif /* !__U_BOOT__ */
+
+ /* Set shell variables */
+ i = 0;
+ while (i < command->assignment_cnt) {
+ char *p = expand_string_to_string(argv[i],
+ EXP_FLAG_ESC_GLOB_CHARS,
+ /*unbackslash:*/ 1
+ );
+#if ENABLE_HUSH_MODE_X
+ if (G_x_mode) {
+ char *eq;
+ if (i == 0)
+ x_mode_prefix();
+ x_mode_addchr(' ');
+ eq = strchrnul(p, '=');
+ if (*eq) eq++;
+ x_mode_addblock(p, (eq - p));
+ x_mode_print_optionally_squoted(eq);
+ x_mode_flush();
+ }
+#endif
+ debug_printf_env("set shell var:'%s'->'%s'\n", *argv, p);
+#ifndef __U_BOOT__
+ if (set_local_var0(p)) {
+#else /* __U_BOOT__ */
+ if (set_local_var_modern(p, /*flag:*/ 0)) {
+#endif
+ /* assignment to readonly var / putenv error? */
+ rcode = 1;
+ }
+ i++;
+ }
+ /* Redirect error sets $? to 1. Otherwise,
+ * if evaluating assignment value set $?, retain it.
+ * Else, clear $?:
+ * false; q=`exit 2`; echo $? - should print 2
+ * false; x=1; echo $? - should print 0
+ * Because of the 2nd case, we can't just use G.last_exitcode.
+ */
+ if (rcode == 0)
+ rcode = G.expand_exitcode;
+ IF_HAS_KEYWORDS(if (pi->pi_inverted) rcode = !rcode;)
+ debug_leave();
+ debug_printf_exec("run_pipe: return %d\n", rcode);
+ return rcode;
+ }
+
+ /* Expand the rest into (possibly) many strings each */
+#if defined(CMD_TEST2_SINGLEWORD_NOGLOB)
+ if (command->cmd_type == CMD_TEST2_SINGLEWORD_NOGLOB)
+ argv_expanded = expand_strvec_to_strvec_singleword_noglob(argv + command->assignment_cnt);
+ else
+#endif
+#if defined(CMD_SINGLEWORD_NOGLOB)
+ if (command->cmd_type == CMD_SINGLEWORD_NOGLOB)
+ argv_expanded = expand_strvec_to_strvec_singleword_noglob(argv + command->assignment_cnt);
+ else
+#endif
+ argv_expanded = expand_strvec_to_strvec(argv + command->assignment_cnt);
+
+ /* If someone gives us an empty string: `cmd with empty output` */
+ if (!argv_expanded[0]) {
+ free(argv_expanded);
+ /* `false` still has to set exitcode 1 */
+ G.expand_exitcode = G.last_exitcode;
+ goto only_assignments;
+ }
+
+ old_vars = NULL;
+#ifndef __U_BOOT__
+ sv_shadowed = G.shadowed_vars_pp;
+
+ /* Check if argv[0] matches any functions (this goes before bltins) */
+ IF_HUSH_FUNCTIONS(funcp = find_function(argv_expanded[0]);)
+ IF_HUSH_FUNCTIONS(x = NULL;)
+ IF_HUSH_FUNCTIONS(if (!funcp))
+ x = find_builtin(argv_expanded[0]);
+ if (x || funcp) {
+ if (x && x->b_function == builtin_exec && argv_expanded[1] == NULL) {
+ debug_printf("exec with redirects only\n");
+ /*
+ * Variable assignments are executed, but then "forgotten":
+ * a=`sleep 1;echo A` exec 3>&-; echo $a
+ * sleeps, but prints nothing.
+ */
+ enter_var_nest_level();
+ G.shadowed_vars_pp = &old_vars;
+ rcode = redirect_and_varexp_helper(command,
+ /*squirrel:*/ ERR_PTR,
+ argv_expanded
+ );
+ G.shadowed_vars_pp = sv_shadowed;
+ /* rcode=1 can be if redir file can't be opened */
+
+ goto clean_up_and_ret1;
+ }
+
+ /* Bump var nesting, or this will leak exported $a:
+ * a=b true; env | grep ^a=
+ */
+ enter_var_nest_level();
+ /* Collect all variables "shadowed" by helper
+ * (IOW: old vars overridden by "var1=val1 var2=val2 cmd..." syntax)
+ * into old_vars list:
+ */
+ G.shadowed_vars_pp = &old_vars;
+ rcode = redirect_and_varexp_helper(command, &squirrel, argv_expanded);
+ if (rcode == 0) {
+ if (!funcp) {
+ /* Do not collect *to old_vars list* vars shadowed
+ * by e.g. "local VAR" builtin (collect them
+ * in the previously nested list instead):
+ * don't want them to be restored immediately
+ * after "local" completes.
+ */
+ G.shadowed_vars_pp = sv_shadowed;
+
+ debug_printf_exec(": builtin '%s' '%s'...\n",
+ x->b_cmd, argv_expanded[1]);
+ fflush_all();
+ rcode = x->b_function(argv_expanded) & 0xff;
+ fflush_all();
+ }
+#if ENABLE_HUSH_FUNCTIONS
+ else {
+ debug_printf_exec(": function '%s' '%s'...\n",
+ funcp->name, argv_expanded[1]);
+ rcode = run_function(funcp, argv_expanded) & 0xff;
+ /*
+ * But do collect *to old_vars list* vars shadowed
+ * within function execution. To that end, restore
+ * this pointer _after_ function run:
+ */
+ G.shadowed_vars_pp = sv_shadowed;
+ }
+#endif
+ }
+ } else
+ if (ENABLE_FEATURE_SH_NOFORK && NUM_APPLETS > 1) {
+ int n = find_applet_by_name(argv_expanded[0]);
+ if (n < 0 || !APPLET_IS_NOFORK(n))
+ goto must_fork;
+
+ enter_var_nest_level();
+ /* Collect all variables "shadowed" by helper into old_vars list */
+ G.shadowed_vars_pp = &old_vars;
+ rcode = redirect_and_varexp_helper(command, &squirrel, argv_expanded);
+ G.shadowed_vars_pp = sv_shadowed;
+
+ if (rcode == 0) {
+ debug_printf_exec(": run_nofork_applet '%s' '%s'...\n",
+ argv_expanded[0], argv_expanded[1]);
+ /*
+ * Note: signals (^C) can't interrupt here.
+ * We remember them and they will be acted upon
+ * after applet returns.
+ * This makes applets which can run for a long time
+ * and/or wait for user input ineligible for NOFORK:
+ * for example, "yes" or "rm" (rm -i waits for input).
+ */
+ rcode = run_nofork_applet(n, argv_expanded);
+ }
+ } else
+ goto must_fork;
+
+ restore_redirects(squirrel);
+ clean_up_and_ret1:
+ leave_var_nest_level();
+ add_vars(old_vars);
+
+ /*
+ * Try "usleep 99999999" + ^C + "echo $?"
+ * with FEATURE_SH_NOFORK=y.
+ */
+ if (!funcp) {
+ /* It was builtin or nofork.
+ * if this would be a real fork/execed program,
+ * it should have died if a fatal sig was received.
+ * But OTOH, there was no separate process,
+ * the sig was sent to _shell_, not to non-existing
+ * child.
+ * Let's just handle ^C only, this one is obvious:
+ * we aren't ok with exitcode 0 when ^C was pressed
+ * during builtin/nofork.
+ */
+ if (sigismember(&G.pending_set, SIGINT))
+ rcode = 128 | SIGINT;
+ }
+ free(argv_expanded);
+ IF_HAS_KEYWORDS(if (pi->pi_inverted) rcode = !rcode;)
+ debug_leave();
+ debug_printf_exec("run_pipe return %d\n", rcode);
+ return rcode;
+#endif /* !__U_BOOT__ */
+ }
+
+#ifndef __U_BOOT__
+ must_fork:
+ /* NB: argv_expanded may already be created, and that
+ * might include `cmd` runs! Do not rerun it! We *must*
+ * use argv_expanded if it's non-NULL */
+
+ /* Going to fork a child per each pipe member */
+ pi->alive_cmds = 0;
+ next_infd = 0;
+#endif /* !__U_BOOT__ */
+
+ cmd_no = 0;
+ while (cmd_no < pi->num_cmds) {
+#ifndef __U_BOOT__
+ struct fd_pair pipefds;
+#if !BB_MMU
+ int sv_var_nest_level = G.var_nest_level;
+ volatile nommu_save_t nommu_save;
+ nommu_save.old_vars = NULL;
+ nommu_save.argv = NULL;
+ nommu_save.argv_from_re_execing = NULL;
+#endif
+#endif /* !__U_BOOT__ */
+ command = &pi->cmds[cmd_no];
+ cmd_no++;
+
+#ifdef __U_BOOT__
+ /* Replace argv and argc by expanded if it exists. */
+ if (argv_expanded) {
+ /*
+ * We need to save a pointer to argv, we will restore it
+ * later, so it will be freed when pipe is freed.
+ */
+ argv = command->argv;
+
+ /*
+ * After expansion, there can be more or less argument, so we need to
+ * update argc, for example:
+ * - More arguments:
+ * foo='bar quuz'
+ * echo $foo
+ * - Less arguments:
+ * echo $foo (if foo was never set)
+ */
+ command->argc = list_size(argv_expanded);
+ command->argv = argv_expanded;
+ }
+#endif /* __U_BOOT__ */
+ if (command->argv) {
+ debug_printf_exec(": pipe member '%s' '%s'...\n",
+ command->argv[0], command->argv[1]);
+ } else {
+ debug_printf_exec(": pipe member with no argv\n");
+ }
+
+#ifndef __U_BOOT__
+ /* pipes are inserted between pairs of commands */
+ pipefds.rd = 0;
+ pipefds.wr = 1;
+ if (cmd_no < pi->num_cmds)
+ xpiped_pair(pipefds);
+
+#if ENABLE_HUSH_LINENO_VAR
+ G.execute_lineno = command->lineno;
+#endif
+
+ command->pid = BB_MMU ? fork() : vfork();
+ if (!command->pid) { /* child */
+#if ENABLE_HUSH_JOB
+ disable_restore_tty_pgrp_on_exit();
+ CLEAR_RANDOM_T(&G.random_gen); /* or else $RANDOM repeats in child */
+
+ /* Every child adds itself to new process group
+ * with pgid == pid_of_first_child_in_pipe */
+ if (G.run_list_level == 1 && G_interactive_fd) {
+ pid_t pgrp;
+ pgrp = pi->pgrp;
+ if (pgrp < 0) /* true for 1st process only */
+ pgrp = getpid();
+ if (setpgid(0, pgrp) == 0
+ && pi->followup != PIPE_BG
+ && G_saved_tty_pgrp /* we have ctty */
+ ) {
+ /* We do it in *every* child, not just first,
+ * to avoid races */
+ tcsetpgrp(G_interactive_fd, pgrp);
+ }
+ }
+#endif
+ if (pi->alive_cmds == 0 && pi->followup == PIPE_BG) {
+ /* 1st cmd in backgrounded pipe
+ * should have its stdin /dev/null'ed */
+ close(0);
+ if (open(bb_dev_null, O_RDONLY))
+ xopen("/", O_RDONLY);
+ } else {
+ xmove_fd(next_infd, 0);
+ }
+ xmove_fd(pipefds.wr, 1);
+ if (pipefds.rd > 1)
+ close(pipefds.rd);
+ /* Like bash, explicit redirects override pipes,
+ * and the pipe fd (fd#1) is available for dup'ing:
+ * "cmd1 2>&1 | cmd2": fd#1 is duped to fd#2, thus stderr
+ * of cmd1 goes into pipe.
+ */
+ if (setup_redirects(command, NULL)) {
+ /* Happens when redir file can't be opened:
+ * $ hush -c 'echo FOO >&2 | echo BAR 3>/qwe/rty; echo BAZ'
+ * FOO
+ * hush: can't open '/qwe/rty': No such file or directory
+ * BAZ
+ * (echo BAR is not executed, it hits _exit(1) below)
+ */
+ _exit(1);
+ }
+
+ /* Stores to nommu_save list of env vars putenv'ed
+ * (NOMMU, on MMU we don't need that) */
+ /* cast away volatility... */
+ pseudo_exec((nommu_save_t*) &nommu_save, command, argv_expanded);
+ /* pseudo_exec() does not return */
+ }
+
+ /* parent or error */
+#if ENABLE_HUSH_FAST
+ G.count_SIGCHLD++;
+//bb_error_msg("[%d] fork in run_pipe: G.count_SIGCHLD:%d G.handled_SIGCHLD:%d", getpid(), G.count_SIGCHLD, G.handled_SIGCHLD);
+#endif
+ enable_restore_tty_pgrp_on_exit();
+#if !BB_MMU
+ /* Clean up after vforked child */
+ free(nommu_save.argv);
+ free(nommu_save.argv_from_re_execing);
+ G.var_nest_level = sv_var_nest_level;
+ remove_nested_vars();
+ add_vars(nommu_save.old_vars);
+#endif
+ free(argv_expanded);
+ argv_expanded = NULL;
+ if (command->pid < 0) { /* [v]fork failed */
+ /* Clearly indicate, was it fork or vfork */
+ bb_simple_perror_msg(BB_MMU ? "vfork"+1 : "vfork");
+ } else {
+ pi->alive_cmds++;
+#if ENABLE_HUSH_JOB
+ /* Second and next children need to know pid of first one */
+ if (pi->pgrp < 0)
+ pi->pgrp = command->pid;
+#endif
+ }
+
+ if (cmd_no > 1)
+ close(next_infd);
+ if (cmd_no < pi->num_cmds)
+ close(pipefds.wr);
+ /* Pass read (output) pipe end to next iteration */
+ next_infd = pipefds.rd;
+#else /* __U_BOOT__ */
+ /* Process the command */
+ rcode = cmd_process(G.do_repeat ? CMD_FLAG_REPEAT : 0,
+ command->argc, command->argv,
+ &(G.flag_repeat), NULL);
+
+ if (argv_expanded) {
+ /*
+ * expand_strvec_to_strvec() allocates memory to expand
+ * argv, we need to free it.
+ */
+ free(argv_expanded);
+
+ /*
+ * We also restore command->argv to its original value
+ * so no memory leak happens.
+ */
+ command->argv = argv;
+
+ /*
+ * NOTE argc exists only in U-Boot, so argv freeing does
+ * not rely on it as this code exists in BusyBox.
+ */
+ }
+#endif /* __U_BOOT__ */
+ }
+
+#ifndef __U_BOOT__
+ if (!pi->alive_cmds) {
+ debug_leave();
+ debug_printf_exec("run_pipe return 1 (all forks failed, no children)\n");
+ return 1;
+ }
+#endif /* __U_BOOT__ */
+
+ debug_leave();
+#ifndef __U_BOOT__
+ debug_printf_exec("run_pipe return -1 (%u children started)\n", pi->alive_cmds);
+ return -1;
+#else /* __U_BOOT__ */
+ debug_printf_exec("run_pipe return %d\n", rcode);
+ return rcode;
+#endif /* __U_BOOT__ */
+}
+
+/* NB: called by pseudo_exec, and therefore must not modify any
+ * global data until exec/_exit (we can be a child after vfork!) */
+static int run_list(struct pipe *pi)
+{
+#if ENABLE_HUSH_CASE
+ char *case_word = NULL;
+#endif
+#if ENABLE_HUSH_LOOPS
+ struct pipe *loop_top = NULL;
+ char **for_lcur = NULL;
+ char **for_list = NULL;
+#endif
+ smallint last_followup;
+ smalluint rcode;
+#if ENABLE_HUSH_IF || ENABLE_HUSH_CASE
+ smalluint cond_code = 0;
+#else
+ enum { cond_code = 0 };
+#endif
+#if HAS_KEYWORDS
+ smallint rword; /* RES_foo */
+ smallint last_rword; /* ditto */
+#endif
+
+#ifndef __U_BOOT__
+ debug_printf_exec("run_list lvl %d start\n", G.run_list_level);
+ debug_enter();
+#endif /* !__U_BOOT__ */
+
+#if ENABLE_HUSH_LOOPS
+ /* Check syntax for "for" */
+ {
+ struct pipe *cpipe;
+ for (cpipe = pi; cpipe; cpipe = cpipe->next) {
+ if (cpipe->res_word != RES_FOR && cpipe->res_word != RES_IN)
+ continue;
+ /* current word is FOR or IN (BOLD in comments below) */
+ if (cpipe->next == NULL) {
+ syntax_error("malformed for");
+ debug_leave();
+ debug_printf_exec("run_list lvl %d return 1\n", G.run_list_level);
+ return 1;
+ }
+ /* "FOR v; do ..." and "for v IN a b; do..." are ok */
+ if (cpipe->next->res_word == RES_DO)
+ continue;
+ /* next word is not "do". It must be "in" then ("FOR v in ...") */
+ if (cpipe->res_word == RES_IN /* "for v IN a b; not_do..."? */
+ || cpipe->next->res_word != RES_IN /* FOR v not_do_and_not_in..."? */
+ ) {
+ syntax_error("malformed for");
+ debug_leave();
+ debug_printf_exec("run_list lvl %d return 1\n", G.run_list_level);
+ return 1;
+ }
+ }
+ }
+#endif
+
+ /* Past this point, all code paths should jump to ret: label
+ * in order to return, no direct "return" statements please.
+ * This helps to ensure that no memory is leaked. */
+
+#if ENABLE_HUSH_JOB
+ G.run_list_level++;
+#endif
+
+#if HAS_KEYWORDS
+ rword = RES_NONE;
+ last_rword = RES_XXXX;
+#endif
+ last_followup = PIPE_SEQ;
+ rcode = G.last_exitcode;
+
+ /* Go through list of pipes, (maybe) executing them. */
+#ifndef __U_BOOT__
+ for (; pi; pi = IF_HUSH_LOOPS(rword == RES_DONE ? loop_top : ) pi->next) {
+#else /* __U_BOOT__ */
+ for (; pi; pi = rword == RES_DONE ? loop_top : pi->next) {
+#endif /* __U_BOOT__ */
+ int r;
+ int sv_errexit_depth;
+
+#ifndef __U_BOOT__
+ if (G.flag_SIGINT)
+ break;
+ if (G_flag_return_in_progress == 1)
+ break;
+#endif /* !__U_BOOT__ */
+
+ IF_HAS_KEYWORDS(rword = pi->res_word;)
+ debug_printf_exec(": rword:%d cond_code:%d last_rword:%d\n",
+ rword, cond_code, last_rword);
+
+ sv_errexit_depth = G.errexit_depth;
+ if (
+#if ENABLE_HUSH_IF
+ rword == RES_IF || rword == RES_ELIF ||
+#endif
+ pi->followup != PIPE_SEQ
+ ) {
+ G.errexit_depth++;
+ }
+#if ENABLE_HUSH_LOOPS
+ if ((rword == RES_WHILE || rword == RES_UNTIL || rword == RES_FOR)
+ && loop_top == NULL /* avoid bumping G.depth_of_loop twice */
+ ) {
+ /* start of a loop: remember where loop starts */
+ loop_top = pi;
+ G.depth_of_loop++;
+ }
+#endif
+ /* Still in the same "if...", "then..." or "do..." branch? */
+ if (IF_HAS_KEYWORDS(rword == last_rword &&) 1) {
+ if ((rcode == 0 && last_followup == PIPE_OR)
+ || (rcode != 0 && last_followup == PIPE_AND)
+ ) {
+ /* It is "<true> || CMD" or "<false> && CMD"
+ * and we should not execute CMD */
+ debug_printf_exec("skipped cmd because of || or &&\n");
+ last_followup = pi->followup;
+ goto dont_check_jobs_but_continue;
+ }
+ }
+ last_followup = pi->followup;
+#if ENABLE_HUSH_IF
+ if (cond_code != 0) {
+ if (rword == RES_THEN) {
+ /* if false; then ... fi has exitcode 0! */
+ G.last_exitcode = rcode = EXIT_SUCCESS;
+ /* "if <false> THEN cmd": skip cmd */
+ debug_printf_exec("skipped THEN cmd because IF condition was false\n");
+ last_rword = rword;
+ continue;
+ }
+ } else {
+ if (rword == RES_ELSE
+ || (rword == RES_ELIF && last_rword != RES_ELIF)
+ ) {
+ /* "if <true> then ... ELSE/ELIF cmd":
+ * skip cmd and all following ones */
+ debug_printf_exec("skipped ELSE/ELIF branch because IF condition was true\n");
+ break;
+ }
+ //if (rword == RES_THEN): "if <true> THEN cmd", run cmd (fall through)
+ }
+#endif
+ IF_HAS_KEYWORDS(last_rword = rword;)
+#if ENABLE_HUSH_LOOPS
+ if (rword == RES_FOR) { /* && pi->num_cmds - always == 1 */
+ if (!for_lcur) {
+ /* first loop through for */
+
+ static const char encoded_dollar_at[] ALIGN1 = {
+ SPECIAL_VAR_SYMBOL, '@' | 0x80, SPECIAL_VAR_SYMBOL, '\0'
+ }; /* encoded representation of "$@" */
+ static const char *const encoded_dollar_at_argv[] ALIGN_PTR = {
+ encoded_dollar_at, NULL
+ }; /* argv list with one element: "$@" */
+ char **vals;
+
+ G.last_exitcode = rcode = EXIT_SUCCESS;
+ vals = (char**)encoded_dollar_at_argv;
+ if (pi->next->res_word == RES_IN) {
+ /* if no variable values after "in" we skip "for" */
+ if (!pi->next->cmds[0].argv) {
+ debug_printf_exec(": null FOR: exitcode EXIT_SUCCESS\n");
+ break;
+ }
+ vals = pi->next->cmds[0].argv;
+ } /* else: "for var; do..." -> assume "$@" list */
+ /* create list of variable values */
+ debug_print_strings("for_list made from", vals);
+ for_list = expand_strvec_to_strvec(vals);
+ for_lcur = for_list;
+ debug_print_strings("for_list", for_list);
+ }
+ if (!*for_lcur) {
+ /* "for" loop is over, clean up */
+ free(for_list);
+ for_list = NULL;
+ for_lcur = NULL;
+ break;
+ }
+ /* Insert next value from for_lcur */
+ /* note: *for_lcur already has quotes removed, $var expanded, etc */
+#ifndef __U_BOOT__
+ set_local_var_from_halves(pi->cmds[0].argv[0], *for_lcur++);
+#else /* __U_BOOT__ */
+ /* We cannot use xasprintf, so we emulate it. */
+ char *full_var;
+ char *var = pi->cmds[0].argv[0];
+ char *val = *for_lcur++;
+
+ /* + 1 to take into account =. */
+ full_var = xmalloc(strlen(var) + strlen(val) + 1);
+ sprintf(full_var, "%s=%s", var, val);
+
+ set_local_var_modern(full_var, /*flag:*/ 0);
+#endif /* __U_BOOT__ */
+ continue;
+ }
+ if (rword == RES_IN) {
+ continue; /* "for v IN list;..." - "in" has no cmds anyway */
+ }
+ if (rword == RES_DONE) {
+ continue; /* "done" has no cmds too */
+ }
+#endif
+#if ENABLE_HUSH_CASE
+ if (rword == RES_CASE) {
+ debug_printf_exec("CASE cond_code:%d\n", cond_code);
+ case_word = expand_string_to_string(pi->cmds->argv[0],
+ EXP_FLAG_ESC_GLOB_CHARS, /*unbackslash:*/ 1);
+ debug_printf_exec("CASE word1:'%s'\n", case_word);
+ //unbackslash(case_word);
+ //debug_printf_exec("CASE word2:'%s'\n", case_word);
+ continue;
+ }
+ if (rword == RES_MATCH) {
+ char **argv;
+
+ debug_printf_exec("MATCH cond_code:%d\n", cond_code);
+ if (!case_word) /* "case ... matched_word) ... WORD)": we executed selected branch, stop */
+ break;
+ /* all prev words didn't match, does this one match? */
+ argv = pi->cmds->argv;
+ while (*argv) {
+ char *pattern;
+ debug_printf_exec("expand_string_to_string('%s')\n", *argv);
+ pattern = expand_string_to_string(*argv,
+ EXP_FLAG_ESC_GLOB_CHARS,
+ /*unbackslash:*/ 0
+ );
+ /* TODO: which FNM_xxx flags to use? */
+ cond_code = (fnmatch(pattern, case_word, /*flags:*/ 0) != 0);
+ debug_printf_exec("cond_code=fnmatch(pattern:'%s',str:'%s'):%d\n",
+ pattern, case_word, cond_code);
+ free(pattern);
+ if (cond_code == 0) {
+ /* match! we will execute this branch */
+ free(case_word);
+ case_word = NULL; /* make future "word)" stop */
+ break;
+ }
+ argv++;
+ }
+ continue;
+ }
+ if (rword == RES_CASE_BODY) { /* inside of a case branch */
+ debug_printf_exec("CASE_BODY cond_code:%d\n", cond_code);
+ if (cond_code != 0)
+ continue; /* not matched yet, skip this pipe */
+ }
+ if (rword == RES_ESAC) {
+ debug_printf_exec("ESAC cond_code:%d\n", cond_code);
+ if (case_word) {
+ /* "case" did not match anything: still set $? (to 0) */
+ G.last_exitcode = rcode = EXIT_SUCCESS;
+ }
+ }
+#endif
+ /* Just pressing <enter> in shell should check for jobs.
+ * OTOH, in non-interactive shell this is useless
+ * and only leads to extra job checks */
+ if (pi->num_cmds == 0) {
+#ifndef __U_BOOT__
+ if (G_interactive_fd)
+ goto check_jobs_and_continue;
+#endif /* !__U_BOOT__ */
+ continue;
+ }
+
+ /* After analyzing all keywords and conditions, we decided
+ * to execute this pipe. NB: have to do checkjobs(NULL)
+ * after run_pipe to collect any background children,
+ * even if list execution is to be stopped. */
+ debug_printf_exec(": run_pipe with %d members\n", pi->num_cmds);
+#ifndef __U_BOOT__
+#if ENABLE_HUSH_LOOPS
+ G.flag_break_continue = 0;
+#endif
+#endif /* !__U_BOOT__ */
+#ifndef __U_BOOT__
+ rcode = r = G.o_opt[OPT_O_NOEXEC] ? 0 : run_pipe(pi);
+ /* NB: rcode is a smalluint, r is int */
+#else /* __U_BOOT__ */
+ rcode = r = run_pipe(pi); /* NB: rcode is a smalluint, r is int */
+ if (r <= EXIT_RET_CODE) {
+ int previous_rcode = G.last_exitcode;
+ /*
+ * This magic is to get the exit code given by the user.
+ * Contrary to old shell code, we use + EXIT_RET_CODE as EXIT_RET_CODE
+ * equals -2.
+ */
+ G.last_exitcode = -r + EXIT_RET_CODE;
+
+ /*
+ * This case deals with the following:
+ * => setenv inner 'echo entry inner; exit; echo inner done'
+ * => setenv outer 'echo entry outer; run inner; echo outer done'
+ * => run outer
+ * So, if we are in inner, we need to break and not run the other
+ * commands.
+ * Otherwise, we just continue in outer.
+ * As return code are propagated, we use the previous value to check if
+ * exit was just called or was propagated.
+ */
+ if (previous_rcode != r) {
+ /*
+ * If run from run_command, run_command_flags will be set, so we check
+ * this to know if we are in main input shell.
+ */
+ if (!G.run_command_flags)
+ printf("exit not allowed from main input shell.\n");
+
+ break;
+ }
+ continue;
+ }
+#endif /* __U_BOOT__ */
+ if (r != -1) {
+ /* We ran a builtin, function, or group.
+ * rcode is already known
+ * and we don't need to wait for anything. */
+ debug_printf_exec(": builtin/func exitcode %d\n", rcode);
+ G.last_exitcode = rcode;
+#ifndef __U_BOOT__
+ check_and_run_traps();
+#endif /* !__U_BOOT__ */
+#if ENABLE_HUSH_TRAP && ENABLE_HUSH_FUNCTIONS
+ rcode = G.last_exitcode; /* "return" in trap can change it, read back */
+#endif
+#ifndef __U_BOOT__
+#if ENABLE_HUSH_LOOPS
+ /* Was it "break" or "continue"? */
+ if (G.flag_break_continue) {
+ smallint fbc = G.flag_break_continue;
+ /* We might fall into outer *loop*,
+ * don't want to break it too */
+ if (loop_top) {
+ G.depth_break_continue--;
+ if (G.depth_break_continue == 0)
+ G.flag_break_continue = 0;
+ /* else: e.g. "continue 2" should *break* once, *then* continue */
+ } /* else: "while... do... { we are here (innermost list is not a loop!) };...done" */
+ if (G.depth_break_continue != 0 || fbc == BC_BREAK) {
+ checkjobs(NULL, 0 /*(no pid to wait for)*/);
+ break;
+ }
+ /* "continue": simulate end of loop */
+ rword = RES_DONE;
+ continue;
+ }
+#endif
+ if (G_flag_return_in_progress == 1) {
+ checkjobs(NULL, 0 /*(no pid to wait for)*/);
+ break;
+ }
+
+ } else if (pi->followup == PIPE_BG) {
+ /* What does bash do with attempts to background builtins? */
+ /* even bash 3.2 doesn't do that well with nested bg:
+ * try "{ { sleep 10; echo DEEP; } & echo HERE; } &".
+ * I'm NOT treating inner &'s as jobs */
+#if ENABLE_HUSH_JOB
+ if (G.run_list_level == 1)
+ insert_job_into_table(pi);
+#endif
+ /* Last command's pid goes to $! */
+ G.last_bg_pid = pi->cmds[pi->num_cmds - 1].pid;
+ G.last_bg_pid_exitcode = 0;
+ debug_printf_exec(": cmd&: exitcode EXIT_SUCCESS\n");
+/* Check pi->pi_inverted? "! sleep 1 & echo $?": bash says 1. dash and ash say 0 */
+ rcode = EXIT_SUCCESS;
+ goto check_traps;
+ } else {
+#if ENABLE_HUSH_JOB
+ if (G.run_list_level == 1 && G_interactive_fd) {
+ /* Waits for completion, then fg's main shell */
+ rcode = checkjobs_and_fg_shell(pi);
+ debug_printf_exec(": checkjobs_and_fg_shell exitcode %d\n", rcode);
+ goto check_traps;
+ }
+#endif
+ /* This one just waits for completion */
+ rcode = checkjobs(pi, 0 /*(no pid to wait for)*/);
+ debug_printf_exec(": checkjobs exitcode %d\n", rcode);
+ check_traps:
+ G.last_exitcode = rcode;
+ check_and_run_traps();
+#if ENABLE_HUSH_TRAP && ENABLE_HUSH_FUNCTIONS
+ rcode = G.last_exitcode; /* "return" in trap can change it, read back */
+#endif
+ }
+#endif /* !__U_BOOT__ */
+
+#ifndef __U_BOOT__
+ /* Handle "set -e" */
+ if (rcode != 0 && G.o_opt[OPT_O_ERREXIT]) {
+ debug_printf_exec("ERREXIT:1 errexit_depth:%d\n", G.errexit_depth);
+ if (G.errexit_depth == 0)
+ hush_exit(rcode);
+ }
+#else /* __U_BOOT__ */
+ } /* if (r != -1) */
+#endif /* __U_BOOT__ */
+ G.errexit_depth = sv_errexit_depth;
+
+ /* Analyze how result affects subsequent commands */
+#if ENABLE_HUSH_IF
+ if (rword == RES_IF || rword == RES_ELIF) {
+ debug_printf_exec("cond_code=rcode:%d\n", rcode);
+ cond_code = rcode;
+ }
+#endif
+#ifndef __U_BOOT__
+ check_jobs_and_continue:
+ checkjobs(NULL, 0 /*(no pid to wait for)*/);
+#endif /* !__U_BOOT__ */
+ dont_check_jobs_but_continue: ;
+#if ENABLE_HUSH_LOOPS
+ /* Beware of "while false; true; do ..."! */
+ if (pi->next
+ && (pi->next->res_word == RES_DO || pi->next->res_word == RES_DONE)
+ /* check for RES_DONE is needed for "while ...; do \n done" case */
+ ) {
+ if (rword == RES_WHILE) {
+ if (rcode) {
+ /* "while false; do...done" - exitcode 0 */
+ G.last_exitcode = rcode = EXIT_SUCCESS;
+ debug_printf_exec(": while expr is false: breaking (exitcode:EXIT_SUCCESS)\n");
+ break;
+ }
+ }
+ if (rword == RES_UNTIL) {
+ if (!rcode) {
+ debug_printf_exec(": until expr is true: breaking\n");
+ break;
+ }
+ }
+ }
+#endif
+ } /* for (pi) */
+
+#if ENABLE_HUSH_JOB
+ G.run_list_level--;
+#endif
+#if ENABLE_HUSH_LOOPS
+ if (loop_top)
+ G.depth_of_loop--;
+ free(for_list);
+#endif
+#if ENABLE_HUSH_CASE
+ free(case_word);
+#endif
+#ifndef __U_BOOT__
+ debug_leave();
+ debug_printf_exec("run_list lvl %d return %d\n", G.run_list_level, rcode);
+#endif /* !__U_BOOT__ */
+ return rcode;
+}
+
+/* Select which version we will use */
+static int run_and_free_list(struct pipe *pi)
+{
+ int rcode = 0;
+ debug_printf_exec("run_and_free_list entered\n");
+#ifndef __U_BOOT__
+ if (!G.o_opt[OPT_O_NOEXEC]) {
+#endif /* !__U_BOOT__ */
+ debug_printf_exec(": run_list: 1st pipe with %d cmds\n", pi->num_cmds);
+ rcode = run_list(pi);
+#ifndef __U_BOOT__
+ }
+#endif /* !__U_BOOT__ */
+ /* free_pipe_list has the side effect of clearing memory.
+ * In the long run that function can be merged with run_list,
+ * but doing that now would hobble the debugging effort. */
+ free_pipe_list(pi);
+ debug_printf_exec("run_and_free_list return %d\n", rcode);
+ return rcode;
+}
+
+
+#ifndef __U_BOOT__
+static void install_sighandlers(unsigned mask)
+{
+ sighandler_t old_handler;
+ unsigned sig = 0;
+ while ((mask >>= 1) != 0) {
+ sig++;
+ if (!(mask & 1))
+ continue;
+ old_handler = install_sighandler(sig, pick_sighandler(sig));
+ /* POSIX allows shell to re-enable SIGCHLD
+ * even if it was SIG_IGN on entry.
+ * Therefore we skip IGN check for it:
+ */
+ if (sig == SIGCHLD)
+ continue;
+ /* Interactive bash re-enables SIGHUP which is SIG_IGNed on entry.
+ * Try:
+ * trap '' hup; bash; echo RET # type "kill -hup $$", see SIGHUP having effect
+ * trap '' hup; bash -c 'kill -hup $$; echo ALIVE' # here SIGHUP is SIG_IGNed
+ */
+ if (sig == SIGHUP && G_interactive_fd)
+ continue;
+ /* Unless one of the above signals, is it SIG_IGN? */
+ if (old_handler == SIG_IGN) {
+ /* oops... restore back to IGN, and record this fact */
+ install_sighandler(sig, old_handler);
+#if ENABLE_HUSH_TRAP
+ if (!G_traps)
+ G_traps = xzalloc(sizeof(G_traps[0]) * NSIG);
+ free(G_traps[sig]);
+ G_traps[sig] = xzalloc(1); /* == xstrdup(""); */
+#endif
+ }
+ }
+}
+
+/* Called a few times only (or even once if "sh -c") */
+static void install_special_sighandlers(void)
+{
+ unsigned mask;
+
+ /* Which signals are shell-special? */
+ mask = (1 << SIGQUIT) | (1 << SIGCHLD);
+ if (G_interactive_fd) {
+ mask |= SPECIAL_INTERACTIVE_SIGS;
+ if (G_saved_tty_pgrp) /* we have ctty, job control sigs work */
+ mask |= SPECIAL_JOBSTOP_SIGS;
+ }
+ /* Careful, do not re-install handlers we already installed */
+ if (G.special_sig_mask != mask) {
+ unsigned diff = mask & ~G.special_sig_mask;
+ G.special_sig_mask = mask;
+ install_sighandlers(diff);
+ }
+}
+
+#if ENABLE_HUSH_JOB
+/* helper */
+/* Set handlers to restore tty pgrp and exit */
+static void install_fatal_sighandlers(void)
+{
+ unsigned mask;
+
+ /* We will restore tty pgrp on these signals */
+ mask = 0
+ /*+ (1 << SIGILL ) * HUSH_DEBUG*/
+ /*+ (1 << SIGFPE ) * HUSH_DEBUG*/
+ + (1 << SIGBUS ) * HUSH_DEBUG
+ + (1 << SIGSEGV) * HUSH_DEBUG
+ /*+ (1 << SIGTRAP) * HUSH_DEBUG*/
+ + (1 << SIGABRT)
+ /* bash 3.2 seems to handle these just like 'fatal' ones */
+ + (1 << SIGPIPE)
+ + (1 << SIGALRM)
+ /* if we are interactive, SIGHUP, SIGTERM and SIGINT are special sigs.
+ * if we aren't interactive... but in this case
+ * we never want to restore pgrp on exit, and this fn is not called
+ */
+ /*+ (1 << SIGHUP )*/
+ /*+ (1 << SIGTERM)*/
+ /*+ (1 << SIGINT )*/
+ ;
+ G_fatal_sig_mask = mask;
+
+ install_sighandlers(mask);
+}
+#endif
+
+static int set_mode(int state, char mode, const char *o_opt)
+{
+ int idx;
+ switch (mode) {
+ case 'n':
+ /* set -n has no effect in interactive shell */
+ /* Try: while set -n; do echo $-; done */
+ if (!G_interactive_fd)
+ G.o_opt[OPT_O_NOEXEC] = state;
+ break;
+ case 'x':
+ IF_HUSH_MODE_X(G_x_mode = state;)
+ IF_HUSH_MODE_X(if (G.x_mode_fd <= 0) G.x_mode_fd = dup_CLOEXEC(2, 10);)
+ break;
+ case 'e':
+ G.o_opt[OPT_O_ERREXIT] = state;
+ break;
+ case 'o':
+ if (!o_opt) {
+ /* "set -o" or "set +o" without parameter.
+ * in bash, set -o produces this output:
+ * pipefail off
+ * and set +o:
+ * set +o pipefail
+ * We always use the second form.
+ */
+ const char *p = o_opt_strings;
+ idx = 0;
+ while (*p) {
+ printf("set %co %s\n", (G.o_opt[idx] ? '-' : '+'), p);
+ idx++;
+ p += strlen(p) + 1;
+ }
+ break;
+ }
+ idx = index_in_strings(o_opt_strings, o_opt);
+ if (idx >= 0) {
+ G.o_opt[idx] = state;
+ break;
+ }
+ /* fall through to error */
+ default:
+ return EXIT_FAILURE;
+ }
+ return EXIT_SUCCESS;
+}
+
+int hush_main(int argc, char **argv) MAIN_EXTERNALLY_VISIBLE;
+int hush_main(int argc, char **argv)
+{
+ pid_t cached_getpid;
+ enum {
+ OPT_login = (1 << 0),
+ };
+ unsigned flags;
+#if !BB_MMU
+ unsigned builtin_argc = 0;
+#endif
+ char **e;
+ struct variable *cur_var;
+ struct variable *shell_ver;
+
+ INIT_G();
+ if (EXIT_SUCCESS != 0) /* if EXIT_SUCCESS == 0, it is already done */
+ G.last_exitcode = EXIT_SUCCESS;
+#if !BB_MMU
+ /* "Big heredoc" support via "sh -< STRING" invocation.
+ * Check it first (do not bother to run the usual init code,
+ * it is not needed for this case).
+ */
+ if (argv[1]
+ && argv[1][0] == '-' && argv[1][1] == '<' /*&& !argv[1][2]*/
+ /*&& argv[2] && !argv[3] - we don't check some conditions */
+ ) {
+ full_write1_str(argv[2]);
+ _exit(0);
+ }
+ G.argv0_for_re_execing = argv[0];
+#endif
+#if ENABLE_HUSH_TRAP
+# if ENABLE_HUSH_FUNCTIONS
+ G.return_exitcode = -1;
+# endif
+ G.pre_trap_exitcode = -1;
+#endif
+
+#if ENABLE_HUSH_FAST
+ G.count_SIGCHLD++; /* ensure it is != G.handled_SIGCHLD */
+#endif
+
+ cached_getpid = getpid(); /* for tcsetpgrp() during init */
+ G.root_pid = cached_getpid; /* for $PID (NOMMU can override via -$HEXPID:HEXPPID:...) */
+ G.root_ppid = getppid(); /* for $PPID (NOMMU can override) */
+
+ /* Deal with HUSH_VERSION */
+ debug_printf_env("unsetenv '%s'\n", "HUSH_VERSION");
+ unsetenv("HUSH_VERSION"); /* in case it exists in initial env */
+ shell_ver = xzalloc(sizeof(*shell_ver));
+ shell_ver->flg_export = 1;
+ shell_ver->flg_read_only = 1;
+ /* Code which handles ${var<op>...} needs writable values for all variables,
+ * therefore we xstrdup: */
+ shell_ver->varstr = xstrdup(hush_version_str);
+
+ /* Create shell local variables from the values
+ * currently living in the environment */
+ G.top_var = shell_ver;
+ cur_var = G.top_var;
+ e = environ;
+ if (e) while (*e) {
+ char *value = strchr(*e, '=');
+ if (value) { /* paranoia */
+ cur_var->next = xzalloc(sizeof(*cur_var));
+ cur_var = cur_var->next;
+ cur_var->varstr = *e;
+ cur_var->max_len = strlen(*e);
+ cur_var->flg_export = 1;
+ }
+ e++;
+ }
+ /* (Re)insert HUSH_VERSION into env (AFTER we scanned the env!) */
+ debug_printf_env("putenv '%s'\n", shell_ver->varstr);
+ putenv(shell_ver->varstr);
+
+ /* Export PWD */
+ set_pwd_var(SETFLAG_EXPORT);
+
+#if BASH_HOSTNAME_VAR
+ /* Set (but not export) HOSTNAME unless already set */
+ if (!get_local_var_value("HOSTNAME")) {
+ struct utsname uts;
+ uname(&uts);
+ set_local_var_from_halves("HOSTNAME", uts.nodename);
+ }
+#endif
+ /* IFS is not inherited from the parent environment */
+ set_local_var_from_halves("IFS", defifs);
+
+ if (!get_local_var_value("PATH"))
+ set_local_var_from_halves("PATH", bb_default_root_path);
+
+ /* PS1/PS2 are set later, if we determine that we are interactive */
+
+ /* bash also exports SHLVL and _,
+ * and sets (but doesn't export) the following variables:
+ * BASH=/bin/bash
+ * BASH_VERSINFO=([0]="3" [1]="2" [2]="0" [3]="1" [4]="release" [5]="i386-pc-linux-gnu")
+ * BASH_VERSION='3.2.0(1)-release'
+ * HOSTTYPE=i386
+ * MACHTYPE=i386-pc-linux-gnu
+ * OSTYPE=linux-gnu
+ * PPID=<NNNNN> - we also do it elsewhere
+ * EUID=<NNNNN>
+ * UID=<NNNNN>
+ * GROUPS=()
+ * LINES=<NNN>
+ * COLUMNS=<NNN>
+ * BASH_ARGC=()
+ * BASH_ARGV=()
+ * BASH_LINENO=()
+ * BASH_SOURCE=()
+ * DIRSTACK=()
+ * PIPESTATUS=([0]="0")
+ * HISTFILE=/<xxx>/.bash_history
+ * HISTFILESIZE=500
+ * HISTSIZE=500
+ * MAILCHECK=60
+ * PATH=/usr/gnu/bin:/usr/local/bin:/bin:/usr/bin:.
+ * SHELL=/bin/bash
+ * SHELLOPTS=braceexpand:emacs:hashall:histexpand:history:interactive-comments:monitor
+ * TERM=dumb
+ * OPTERR=1
+ * OPTIND=1
+ * PS4='+ '
+ */
+
+#if NUM_SCRIPTS > 0
+ if (argc < 0) {
+ char *script = get_script_content(-argc - 1);
+ G.global_argv = argv;
+ G.global_argc = string_array_len(argv);
+ //install_special_sighandlers(); - needed?
+ parse_and_run_string(script);
+ goto final_return;
+ }
+#endif
+
+ /* Initialize some more globals to non-zero values */
+ die_func = restore_ttypgrp_and__exit;
+
+ /* Shell is non-interactive at first. We need to call
+ * install_special_sighandlers() if we are going to execute "sh <script>",
+ * "sh -c <cmds>" or login shell's /etc/profile and friends.
+ * If we later decide that we are interactive, we run install_special_sighandlers()
+ * in order to intercept (more) signals.
+ */
+
+ /* Parse options */
+ /* http://www.opengroup.org/onlinepubs/9699919799/utilities/sh.html */
+ flags = (argv[0] && argv[0][0] == '-') ? OPT_login : 0;
+ while (1) {
+ int opt = getopt(argc, argv, "+" /* stop at 1st non-option */
+ "cexinsl"
+#if !BB_MMU
+ "$:R:V:"
+# if ENABLE_HUSH_LINENO_VAR
+ "L:"
+# endif
+# if ENABLE_HUSH_FUNCTIONS
+ "F:"
+# endif
+#endif
+ );
+ if (opt <= 0)
+ break;
+ switch (opt) {
+ case 'c':
+ /* Note: -c is not an option with param!
+ * "hush -c -l SCRIPT" is valid. "hush -cSCRIPT" is not.
+ */
+ G.opt_c = 1;
+ break;
+ case 'i':
+ /* Well, we cannot just declare interactiveness,
+ * we have to have some stuff (ctty, etc) */
+ /* G_interactive_fd++; */
+//There are a few cases where bash -i -c 'SCRIPT'
+//has visible effect (differs from bash -c 'SCRIPT'):
+//it ignores TERM:
+// bash -i -c 'kill $$; echo ALIVE'
+// ALIVE
+//it resets SIG_IGNed HUP to SIG_DFL:
+// trap '' hup; bash -i -c 'kill -hup $$; echo ALIVE'
+// Hangup [the message is not printed by bash, it's the shell which started it]
+//is talkative about jobs and exiting:
+// bash -i -c 'sleep 1 & exit'
+// [1] 16170
+// exit
+//includes $ENV file (only if run as "sh"):
+// echo last >/tmp/ENV; ENV=/tmp/ENV sh -i -c 'echo HERE'
+// last: cannot open /var/log/wtmp: No such file or directory
+// HERE
+//(under "bash", it's the opposite: it runs $BASH_ENV file only *without* -i).
+//
+//ash -i -c 'sleep 3; sleep 3', on ^C, drops into a prompt instead of exiting
+//(this may be a bug, bash does not do this).
+//(ash -i -c 'sleep 3' won't show this, the last command gets auto-"exec"ed)
+//
+//None of the above feel like useful features people would rely on.
+ break;
+ case 's':
+ G.opt_s = 1;
+ break;
+ case 'l':
+ flags |= OPT_login;
+ break;
+#if !BB_MMU
+ case '$': {
+ unsigned long long empty_trap_mask;
+
+ G.root_pid = bb_strtou(optarg, &optarg, 16);
+ optarg++;
+ G.root_ppid = bb_strtou(optarg, &optarg, 16);
+ optarg++;
+ G.last_bg_pid = bb_strtou(optarg, &optarg, 16);
+ optarg++;
+ G.last_exitcode = bb_strtou(optarg, &optarg, 16);
+ optarg++;
+ builtin_argc = bb_strtou(optarg, &optarg, 16);
+ optarg++;
+ empty_trap_mask = bb_strtoull(optarg, &optarg, 16);
+ if (empty_trap_mask != 0) {
+ IF_HUSH_TRAP(int sig;)
+ install_special_sighandlers();
+# if ENABLE_HUSH_TRAP
+ G_traps = xzalloc(sizeof(G_traps[0]) * NSIG);
+ for (sig = 1; sig < NSIG; sig++) {
+ if (empty_trap_mask & (1LL << sig)) {
+ G_traps[sig] = xzalloc(1); /* == xstrdup(""); */
+ install_sighandler(sig, SIG_IGN);
+ }
+ }
+# endif
+ }
+# if ENABLE_HUSH_LOOPS
+ optarg++;
+ G.depth_of_loop = bb_strtou(optarg, &optarg, 16);
+# endif
+ /* Suppress "killed by signal" message, -$ hack is used
+ * for subshells: echo `sh -c 'kill -9 $$'`
+ * should be silent.
+ */
+ IF_HUSH_JOB(G.run_list_level = 1;)
+# if ENABLE_HUSH_FUNCTIONS
+ /* nommu uses re-exec trick for "... | func | ...",
+ * should allow "return".
+ * This accidentally allows returns in subshells.
+ */
+ G_flag_return_in_progress = -1;
+# endif
+ break;
+ }
+ case 'R':
+ case 'V':
+ set_local_var(xstrdup(optarg), opt == 'R' ? SETFLAG_MAKE_RO : 0);
+ break;
+# if ENABLE_HUSH_LINENO_VAR
+ case 'L':
+ G.parse_lineno = xatou(optarg);
+ break;
+# endif
+# if ENABLE_HUSH_FUNCTIONS
+ case 'F': {
+ struct function *funcp = new_function(optarg);
+ /* funcp->name is already set to optarg */
+ /* funcp->body is set to NULL. It's a special case. */
+ funcp->body_as_string = argv[optind];
+ optind++;
+ break;
+ }
+# endif
+#endif
+ /*case '?': invalid option encountered (set_mode('?') will fail) */
+ /*case 'n':*/
+ /*case 'x':*/
+ /*case 'e':*/
+ default:
+ if (set_mode(1, opt, NULL) == 0) /* no error */
+ break;
+ bb_show_usage();
+ }
+ } /* option parsing loop */
+
+ /* Skip options. Try "hush -l": $1 should not be "-l"! */
+ G.global_argc = argc - (optind - 1);
+ G.global_argv = argv + (optind - 1);
+ G.global_argv[0] = argv[0];
+
+ /* If we are login shell... */
+ if (flags & OPT_login) {
+ const char *hp = NULL;
+ HFILE *input;
+
+ debug_printf("sourcing /etc/profile\n");
+ input = hfopen("/etc/profile");
+ run_profile:
+ if (input != NULL) {
+ install_special_sighandlers();
+ parse_and_run_file(input);
+ hfclose(input);
+ }
+ /* bash: after sourcing /etc/profile,
+ * tries to source (in the given order):
+ * ~/.bash_profile, ~/.bash_login, ~/.profile,
+ * stopping on first found. --noprofile turns this off.
+ * bash also sources ~/.bash_logout on exit.
+ * If called as sh, skips .bash_XXX files.
+ */
+ if (!hp) { /* unless we looped on the "goto" already */
+ hp = get_local_var_value("HOME");
+ if (hp && hp[0]) {
+ debug_printf("sourcing ~/.profile\n");
+ hp = concat_path_file(hp, ".profile");
+ input = hfopen(hp);
+ free((char*)hp);
+ goto run_profile;
+ }
+ }
+ }
+
+#ifndef __U_BOOT__
+ /* -c takes effect *after* -l */
+ if (G.opt_c) {
+ /* Possibilities:
+ * sh ... -c 'script'
+ * sh ... -c 'script' ARG0 [ARG1...]
+ * On NOMMU, if builtin_argc != 0,
+ * sh ... -c 'builtin' BARGV... "" ARG0 [ARG1...]
+ * "" needs to be replaced with NULL
+ * and BARGV vector fed to builtin function.
+ * Note: the form without ARG0 never happens:
+ * sh ... -c 'builtin' BARGV... ""
+ */
+ char *script;
+
+ install_special_sighandlers();
+
+ G.global_argc--;
+ G.global_argv++;
+#if !BB_MMU
+ if (builtin_argc) {
+ /* -c 'builtin' [BARGV...] "" ARG0 [ARG1...] */
+ const struct built_in_command *x;
+ x = find_builtin(G.global_argv[0]);
+ if (x) { /* paranoia */
+ argv = G.global_argv;
+ G.global_argc -= builtin_argc + 1; /* skip [BARGV...] "" */
+ G.global_argv += builtin_argc + 1;
+ G.global_argv[-1] = NULL; /* replace "" */
+ G.last_exitcode = x->b_function(argv);
+ }
+ goto final_return;
+ }
+#endif
+
+ script = G.global_argv[0];
+ if (!script)
+ bb_error_msg_and_die(bb_msg_requires_arg, "-c");
+ if (!G.global_argv[1]) {
+ /* -c 'script' (no params): prevent empty $0 */
+ G.global_argv[0] = argv[0];
+ } else { /* else -c 'script' ARG0 [ARG1...]: $0 is ARG0 */
+ G.global_argc--;
+ G.global_argv++;
+ }
+ parse_and_run_string(script);
+ goto final_return;
+ }
+
+ /* -s is: hush -s ARGV1 ARGV2 (no SCRIPT) */
+ if (!G.opt_s && G.global_argv[1]) {
+ HFILE *input;
+ /*
+ * "bash <script>" (which is never interactive (unless -i?))
+ * sources $BASH_ENV here (without scanning $PATH).
+ * If called as sh, does the same but with $ENV.
+ * Also NB, per POSIX, $ENV should undergo parameter expansion.
+ */
+ G.global_argc--;
+ G.global_argv++;
+ debug_printf("running script '%s'\n", G.global_argv[0]);
+ xfunc_error_retval = 127; /* for "hush /does/not/exist" case */
+ input = hfopen(G.global_argv[0]);
+ if (!input) {
+ bb_simple_perror_msg_and_die(G.global_argv[0]);
+ }
+ xfunc_error_retval = 1;
+ install_special_sighandlers();
+ parse_and_run_file(input);
+#if ENABLE_FEATURE_CLEAN_UP
+ hfclose(input);
+#endif
+ goto final_return;
+ }
+ /* "implicit" -s: bare interactive hush shows 's' in $- */
+ G.opt_s = 1;
+
+#endif /* __U_BOOT__ */
+ /* Up to here, shell was non-interactive. Now it may become one.
+ * NB: don't forget to (re)run install_special_sighandlers() as needed.
+ */
+
+ /* A shell is interactive if the '-i' flag was given,
+ * or if all of the following conditions are met:
+ * no -c command
+ * no arguments remaining or the -s flag given
+ * standard input is a terminal
+ * standard output is a terminal
+ * Refer to Posix.2, the description of the 'sh' utility.
+ */
+#if ENABLE_HUSH_JOB
+ if (isatty(STDIN_FILENO) && isatty(STDOUT_FILENO)) {
+ G_saved_tty_pgrp = tcgetpgrp(STDIN_FILENO);
+ debug_printf("saved_tty_pgrp:%d\n", G_saved_tty_pgrp);
+ if (G_saved_tty_pgrp < 0)
+ G_saved_tty_pgrp = 0;
+
+ /* try to dup stdin to high fd#, >= 255 */
+ G_interactive_fd = dup_CLOEXEC(STDIN_FILENO, 254);
+ if (G_interactive_fd < 0) {
+ /* try to dup to any fd */
+ G_interactive_fd = dup(STDIN_FILENO);
+ if (G_interactive_fd < 0) {
+ /* give up */
+ G_interactive_fd = 0;
+ G_saved_tty_pgrp = 0;
+ }
+ }
+ }
+ debug_printf("interactive_fd:%d\n", G_interactive_fd);
+ if (G_interactive_fd) {
+ close_on_exec_on(G_interactive_fd);
+
+ if (G_saved_tty_pgrp) {
+ /* If we were run as 'hush &', sleep until we are
+ * in the foreground (tty pgrp == our pgrp).
+ * If we get started under a job aware app (like bash),
+ * make sure we are now in charge so we don't fight over
+ * who gets the foreground */
+ while (1) {
+ pid_t shell_pgrp = getpgrp();
+ G_saved_tty_pgrp = tcgetpgrp(G_interactive_fd);
+ if (G_saved_tty_pgrp == shell_pgrp)
+ break;
+ /* send TTIN to ourself (should stop us) */
+ kill(- shell_pgrp, SIGTTIN);
+ }
+ }
+
+ /* Install more signal handlers */
+ install_special_sighandlers();
+
+ if (G_saved_tty_pgrp) {
+ /* Set other signals to restore saved_tty_pgrp */
+ install_fatal_sighandlers();
+ /* Put ourselves in our own process group
+ * (bash, too, does this only if ctty is available) */
+ bb_setpgrp(); /* is the same as setpgid(our_pid, our_pid); */
+ /* Grab control of the terminal */
+ tcsetpgrp(G_interactive_fd, cached_getpid);
+ }
+ enable_restore_tty_pgrp_on_exit();
+
+# if ENABLE_FEATURE_EDITING
+ G.line_input_state = new_line_input_t(FOR_SHELL);
+# if ENABLE_FEATURE_TAB_COMPLETION
+ G.line_input_state->get_exe_name = hush_command_name;
+# endif
+# if EDITING_HAS_sh_get_var
+ G.line_input_state->sh_get_var = get_local_var_value;
+# endif
+# endif
+# if ENABLE_HUSH_SAVEHISTORY && MAX_HISTORY > 0
+ {
+ const char *hp = get_local_var_value("HISTFILE");
+ if (!hp) {
+ hp = get_local_var_value("HOME");
+ if (hp)
+ hp = concat_path_file(hp, ".hush_history");
+ } else {
+ hp = xstrdup(hp);
+ }
+ if (hp) {
+ G.line_input_state->hist_file = hp;
+ //set_local_var(xasprintf("HISTFILE=%s", ...));
+ }
+# if ENABLE_FEATURE_SH_HISTFILESIZE
+ hp = get_local_var_value("HISTFILESIZE");
+ G.line_input_state->max_history = size_from_HISTFILESIZE(hp);
+# endif
+ }
+# endif
+ } else {
+ install_special_sighandlers();
+ }
+#elif ENABLE_HUSH_INTERACTIVE
+ /* No job control compiled in, only prompt/line editing */
+ if (isatty(STDIN_FILENO) && isatty(STDOUT_FILENO)) {
+ G_interactive_fd = dup_CLOEXEC(STDIN_FILENO, 254);
+ if (G_interactive_fd < 0) {
+ /* try to dup to any fd */
+ G_interactive_fd = dup_CLOEXEC(STDIN_FILENO, -1);
+ if (G_interactive_fd < 0)
+ /* give up */
+ G_interactive_fd = 0;
+ }
+ }
+ if (G_interactive_fd) {
+ close_on_exec_on(G_interactive_fd);
+ }
+ install_special_sighandlers();
+#else
+ /* We have interactiveness code disabled */
+ install_special_sighandlers();
+#endif
+ /* bash:
+ * if interactive but not a login shell, sources ~/.bashrc
+ * (--norc turns this off, --rcfile <file> overrides)
+ */
+
+ if (G_interactive_fd) {
+#if ENABLE_HUSH_INTERACTIVE && ENABLE_FEATURE_EDITING_FANCY_PROMPT
+ /* Set (but not export) PS1/2 unless already set */
+ if (!get_local_var_value("PS1"))
+ set_local_var_from_halves("PS1", "\\w \\$ ");
+ if (!get_local_var_value("PS2"))
+ set_local_var_from_halves("PS2", "> ");
+#endif
+ if (!ENABLE_FEATURE_SH_EXTRA_QUIET) {
+ /* note: ash and hush share this string */
+ printf("\n\n%s %s\n"
+ IF_HUSH_HELP("Enter 'help' for a list of built-in commands.\n")
+ "\n",
+ bb_banner,
+ "hush - the humble shell"
+ );
+ }
+ }
+
+ parse_and_run_file(hfopen(NULL)); /* stdin */
+
+ final_return:
+ hush_exit(G.last_exitcode);
+}
+
+
+
+/*
+ * Built-ins
+ */
+static int FAST_FUNC builtin_true(char **argv UNUSED_PARAM)
+{
+ return 0;
+}
+
+static int FAST_FUNC builtin_false(char **argv UNUSED_PARAM)
+{
+ return 1;
+}
+
+#if ENABLE_HUSH_TEST || ENABLE_HUSH_ECHO || ENABLE_HUSH_PRINTF || ENABLE_HUSH_KILL
+static NOINLINE int run_applet_main(char **argv, int (*applet_main_func)(int argc, char **argv))
+{
+ int argc = string_array_len(argv);
+ return applet_main_func(argc, argv);
+}
+#endif
+#if ENABLE_HUSH_TEST || BASH_TEST2
+static int FAST_FUNC builtin_test(char **argv)
+{
+ return run_applet_main(argv, test_main);
+}
+#endif
+#if ENABLE_HUSH_ECHO
+static int FAST_FUNC builtin_echo(char **argv)
+{
+ return run_applet_main(argv, echo_main);
+}
+#endif
+#if ENABLE_HUSH_PRINTF
+static int FAST_FUNC builtin_printf(char **argv)
+{
+ return run_applet_main(argv, printf_main);
+}
+#endif
+
+#if ENABLE_HUSH_HELP
+static int FAST_FUNC builtin_help(char **argv UNUSED_PARAM)
+{
+ const struct built_in_command *x;
+
+ printf(
+ "Built-in commands:\n"
+ "------------------\n");
+ for (x = bltins1; x != &bltins1[ARRAY_SIZE(bltins1)]; x++) {
+ if (x->b_descr)
+ printf("%-10s%s\n", x->b_cmd, x->b_descr);
+ }
+ return EXIT_SUCCESS;
+}
+#endif
+
+#if MAX_HISTORY && ENABLE_FEATURE_EDITING
+static int FAST_FUNC builtin_history(char **argv UNUSED_PARAM)
+{
+ show_history(G.line_input_state);
+ return EXIT_SUCCESS;
+}
+#endif
+
+static int FAST_FUNC builtin_cd(char **argv)
+{
+ const char *newdir;
+
+ argv = skip_dash_dash(argv);
+ newdir = argv[0];
+ if (newdir == NULL) {
+ /* bash does nothing (exitcode 0) if HOME is ""; if it's unset,
+ * bash says "bash: cd: HOME not set" and does nothing
+ * (exitcode 1)
+ */
+ const char *home = get_local_var_value("HOME");
+ newdir = home ? home : "/";
+ }
+ if (chdir(newdir)) {
+ /* Mimic bash message exactly */
+ bb_perror_msg("cd: %s", newdir);
+ return EXIT_FAILURE;
+ }
+ /* Read current dir (get_cwd(1) is inside) and set PWD.
+ * Note: do not enforce exporting. If PWD was unset or unexported,
+ * set it again, but do not export. bash does the same.
+ */
+ set_pwd_var(/*flag:*/ 0);
+ return EXIT_SUCCESS;
+}
+
+static int FAST_FUNC builtin_pwd(char **argv UNUSED_PARAM)
+{
+ puts(get_cwd(0));
+ return EXIT_SUCCESS;
+}
+
+static int FAST_FUNC builtin_eval(char **argv)
+{
+ argv = skip_dash_dash(argv);
+
+ if (!argv[0])
+ return EXIT_SUCCESS;
+
+ IF_HUSH_MODE_X(G.x_mode_depth++;)
+ //bb_error_msg("%s: ++x_mode_depth=%d", __func__, G.x_mode_depth);
+ if (!argv[1]) {
+ /* bash:
+ * eval "echo Hi; done" ("done" is syntax error):
+ * "echo Hi" will not execute too.
+ */
+ parse_and_run_string(argv[0]);
+ } else {
+ /* "The eval utility shall construct a command by
+ * concatenating arguments together, separating
+ * each with a <space> character."
+ */
+ char *str, *p;
+ unsigned len = 0;
+ char **pp = argv;
+ do
+ len += strlen(*pp) + 1;
+ while (*++pp);
+ str = p = xmalloc(len);
+ pp = argv;
+ for (;;) {
+ p = stpcpy(p, *pp);
+ pp++;
+ if (!*pp)
+ break;
+ *p++ = ' ';
+ }
+ parse_and_run_string(str);
+ free(str);
+ }
+ IF_HUSH_MODE_X(G.x_mode_depth--;)
+ //bb_error_msg("%s: --x_mode_depth=%d", __func__, G.x_mode_depth);
+ return G.last_exitcode;
+}
+
+static int FAST_FUNC builtin_exec(char **argv)
+{
+ argv = skip_dash_dash(argv);
+ if (argv[0] == NULL)
+ return EXIT_SUCCESS; /* bash does this */
+
+ /* Careful: we can end up here after [v]fork. Do not restore
+ * tty pgrp then, only top-level shell process does that */
+ if (G_saved_tty_pgrp && getpid() == G.root_pid)
+ tcsetpgrp(G_interactive_fd, G_saved_tty_pgrp);
+
+ /* Saved-redirect fds, script fds and G_interactive_fd are still
+ * open here. However, they are all CLOEXEC, and execv below
+ * closes them. Try interactive "exec ls -l /proc/self/fd",
+ * it should show no extra open fds in the "ls" process.
+ * If we'd try to run builtins/NOEXECs, this would need improving.
+ */
+ //close_saved_fds_and_FILE_fds();
+
+ /* TODO: if exec fails, bash does NOT exit! We do.
+ * We'll need to undo trap cleanup (it's inside execvp_or_die)
+ * and tcsetpgrp, and this is inherently racy.
+ */
+ execvp_or_die(argv);
+}
+
+static int FAST_FUNC builtin_exit(char **argv)
+{
+ debug_printf_exec("%s()\n", __func__);
+
+ /* interactive bash:
+ * # trap "echo EEE" EXIT
+ * # exit
+ * exit
+ * There are stopped jobs.
+ * (if there are _stopped_ jobs, running ones don't count)
+ * # exit
+ * exit
+ * EEE (then bash exits)
+ *
+ * TODO: we can use G.exiting = -1 as indicator "last cmd was exit"
+ */
+
+ /* note: EXIT trap is run by hush_exit */
+ argv = skip_dash_dash(argv);
+ if (argv[0] == NULL) {
+#if ENABLE_HUSH_TRAP
+ if (G.pre_trap_exitcode >= 0) /* "exit" in trap uses $? from before the trap */
+ hush_exit(G.pre_trap_exitcode);
+#endif
+ hush_exit(G.last_exitcode);
+ }
+ /* mimic bash: exit 123abc == exit 255 + error msg */
+ xfunc_error_retval = 255;
+ /* bash: exit -2 == exit 254, no error msg */
+ hush_exit(xatoi(argv[0]) & 0xff);
+}
+
+#if ENABLE_HUSH_TYPE
+/* http://www.opengroup.org/onlinepubs/9699919799/utilities/type.html */
+static int FAST_FUNC builtin_type(char **argv)
+{
+ int ret = EXIT_SUCCESS;
+
+ while (*++argv) {
+ const char *type;
+ char *path = NULL;
+
+ if (0) {} /* make conditional compile easier below */
+ /*else if (find_alias(*argv))
+ type = "an alias";*/
+# if ENABLE_HUSH_FUNCTIONS
+ else if (find_function(*argv))
+ type = "a function";
+# endif
+ else if (find_builtin(*argv))
+ type = "a shell builtin";
+ else if ((path = find_in_path(*argv)) != NULL)
+ type = path;
+ else {
+ bb_error_msg("type: %s: not found", *argv);
+ ret = EXIT_FAILURE;
+ continue;
+ }
+
+ printf("%s is %s\n", *argv, type);
+ free(path);
+ }
+
+ return ret;
+}
+#endif
+
+#if ENABLE_HUSH_READ
+/* Interruptibility of read builtin in bash
+ * (tested on bash-4.2.8 by sending signals (not by ^C)):
+ *
+ * Empty trap makes read ignore corresponding signal, for any signal.
+ *
+ * SIGINT:
+ * - terminates non-interactive shell;
+ * - interrupts read in interactive shell;
+ * if it has non-empty trap:
+ * - executes trap and returns to command prompt in interactive shell;
+ * - executes trap and returns to read in non-interactive shell;
+ * SIGTERM:
+ * - is ignored (does not interrupt) read in interactive shell;
+ * - terminates non-interactive shell;
+ * if it has non-empty trap:
+ * - executes trap and returns to read;
+ * SIGHUP:
+ * - terminates shell (regardless of interactivity);
+ * if it has non-empty trap:
+ * - executes trap and returns to read;
+ * SIGCHLD from children:
+ * - does not interrupt read regardless of interactivity:
+ * try: sleep 1 & read x; echo $x
+ */
+static int FAST_FUNC builtin_read(char **argv)
+{
+ const char *r;
+ struct builtin_read_params params;
+
+ memset(¶ms, 0, sizeof(params));
+
+ /* "!": do not abort on errors.
+ * Option string must start with "sr" to match BUILTIN_READ_xxx
+ */
+ params.read_flags = getopt32(argv,
+# if BASH_READ_D
+ IF_NOT_HUSH_BASH_COMPAT("^")
+ "!srn:p:t:u:d:" IF_NOT_HUSH_BASH_COMPAT("\0" "-1"/*min 1 arg*/),
+ ¶ms.opt_n, ¶ms.opt_p, ¶ms.opt_t, ¶ms.opt_u, ¶ms.opt_d
+# else
+ IF_NOT_HUSH_BASH_COMPAT("^")
+ "!srn:p:t:u:" IF_NOT_HUSH_BASH_COMPAT("\0" "-1"/*min 1 arg*/),
+ ¶ms.opt_n, ¶ms.opt_p, ¶ms.opt_t, ¶ms.opt_u
+# endif
+//TODO: print "read: need variable name"
+//for the case of !BASH "read" with no args (now it fails silently)
+//(or maybe extend getopt32() to emit a message if "-1" fails)
+ );
+ if ((uint32_t)params.read_flags == (uint32_t)-1)
+ return EXIT_FAILURE;
+ argv += optind;
+ params.argv = argv;
+ params.setvar = set_local_var_from_halves;
+ params.ifs = get_local_var_value("IFS"); /* can be NULL */
+
+ again:
+ r = shell_builtin_read(¶ms);
+
+ if ((uintptr_t)r == 1 && errno == EINTR) {
+ unsigned sig = check_and_run_traps();
+ if (sig != SIGINT)
+ goto again;
+ }
+
+ if ((uintptr_t)r > 1) {
+ bb_simple_error_msg(r);
+ r = (char*)(uintptr_t)1;
+ }
+
+ return (uintptr_t)r;
+}
+#endif
+
+#if ENABLE_HUSH_UMASK
+static int FAST_FUNC builtin_umask(char **argv)
+{
+ int rc;
+ mode_t mask;
+
+ rc = 1;
+ mask = umask(0);
+ argv = skip_dash_dash(argv);
+ if (argv[0]) {
+ mode_t old_mask = mask;
+
+ /* numeric umasks are taken as-is */
+ /* symbolic umasks are inverted: "umask a=rx" calls umask(222) */
+ if (!isdigit(argv[0][0]))
+ mask ^= 0777;
+ mask = bb_parse_mode(argv[0], mask);
+ if (!isdigit(argv[0][0]))
+ mask ^= 0777;
+ if ((unsigned)mask > 0777) {
+ mask = old_mask;
+ /* bash messages:
+ * bash: umask: 'q': invalid symbolic mode operator
+ * bash: umask: 999: octal number out of range
+ */
+ bb_error_msg("%s: invalid mode '%s'", "umask", argv[0]);
+ rc = 0;
+ }
+ } else {
+ /* Mimic bash */
+ printf("%04o\n", (unsigned) mask);
+ /* fall through and restore mask which we set to 0 */
+ }
+ umask(mask);
+
+ return !rc; /* rc != 0 - success */
+}
+#endif
+
+#if ENABLE_HUSH_EXPORT || ENABLE_HUSH_READONLY || ENABLE_HUSH_SET || ENABLE_HUSH_TRAP
+static void print_escaped(const char *s)
+{
+//TODO? bash "set" does not quote variables which contain only alnums and "%+,-./:=@_~",
+// (but "export" quotes all variables, even with only these chars).
+// I think quoting strings with %+,=~ looks better
+// (example: "set" printing var== instead of var='=' looks strange)
+// IOW: do not quote "-./:@_": / is used in pathnames, : in PATH, -._ often in file names, @ in emails
+
+ if (*s == '\'')
+ goto squote;
+ do {
+ const char *p = strchrnul(s, '\'');
+ /* print 'xxxx', possibly just '' */
+ printf("'%.*s'", (int)(p - s), s);
+ if (*p == '\0')
+ break;
+ s = p;
+ squote:
+ /* s points to '; print "'''...'''" */
+ putchar('"');
+ do putchar('\''); while (*++s == '\'');
+ putchar('"');
+ } while (*s);
+}
+#endif
+
+#if ENABLE_HUSH_EXPORT || ENABLE_HUSH_LOCAL || ENABLE_HUSH_READONLY
+static int helper_export_local(char **argv, unsigned flags)
+{
+ do {
+ char *name = *argv;
+ const char *name_end = endofname(name);
+
+ if (*name_end == '\0') {
+ struct variable *var, **vpp;
+
+ vpp = get_ptr_to_local_var(name);
+ var = vpp ? *vpp : NULL;
+
+ if (flags & SETFLAG_UNEXPORT) {
+ /* export -n NAME (without =VALUE) */
+ if (var) {
+ var->flg_export = 0;
+ debug_printf_env("%s: unsetenv '%s'\n", __func__, name);
+ unsetenv(name);
+ } /* else: export -n NOT_EXISTING_VAR: no-op */
+ continue;
+ }
+ if (flags & SETFLAG_EXPORT) {
+ /* export NAME (without =VALUE) */
+ if (var) {
+ var->flg_export = 1;
+ debug_printf_env("%s: putenv '%s'\n", __func__, var->varstr);
+ putenv(var->varstr);
+ continue;
+ }
+ }
+ if (flags & SETFLAG_MAKE_RO) {
+ /* readonly NAME (without =VALUE) */
+ if (var) {
+ var->flg_read_only = 1;
+ continue;
+ }
+ }
+# if ENABLE_HUSH_LOCAL
+ /* Is this "local" bltin? */
+ if (!(flags & (SETFLAG_EXPORT|SETFLAG_UNEXPORT|SETFLAG_MAKE_RO))) {
+ unsigned lvl = flags >> SETFLAG_VARLVL_SHIFT;
+ if (var && var->var_nest_level == lvl) {
+ /* "local x=abc; ...; local x" - ignore second local decl */
+ continue;
+ }
+ }
+# endif
+ /* Exporting non-existing variable.
+ * bash does not put it in environment,
+ * but remembers that it is exported,
+ * and does put it in env when it is set later.
+ * We just set it to "" and export.
+ */
+ /* Or, it's "local NAME" (without =VALUE).
+ * bash sets the value to "".
+ */
+ /* Or, it's "readonly NAME" (without =VALUE).
+ * bash remembers NAME and disallows its creation
+ * in the future.
+ */
+ name = xasprintf("%s=", name);
+ } else {
+ if (*name_end != '=') {
+ bb_error_msg("'%s': bad variable name", name);
+ /* do not parse following argv[]s: */
+ return 1;
+ }
+ /* (Un)exporting/making local NAME=VALUE */
+ name = xstrdup(name);
+ /* Testcase: export PS1='\w \$ ' */
+ unbackslash(name);
+ }
+ debug_printf_env("%s: set_local_var('%s')\n", __func__, name);
+ if (set_local_var(name, flags))
+ return EXIT_FAILURE;
+ } while (*++argv);
+ return EXIT_SUCCESS;
+}
+#endif
+
+#if ENABLE_HUSH_EXPORT
+static int FAST_FUNC builtin_export(char **argv)
+{
+ unsigned opt_unexport;
+
+# if ENABLE_HUSH_EXPORT_N
+ /* "!": do not abort on errors */
+ opt_unexport = getopt32(argv, "!n");
+ if (opt_unexport == (uint32_t)-1)
+ return EXIT_FAILURE;
+ argv += optind;
+# else
+ opt_unexport = 0;
+ argv++;
+# endif
+
+ if (argv[0] == NULL) {
+ char **e = environ;
+ if (e) {
+ while (*e) {
+# if 0
+ puts(*e++);
+# else
+ /* ash emits: export VAR='VAL'
+ * bash: declare -x VAR="VAL"
+ * we follow ash example */
+ const char *s = *e++;
+ const char *p = strchr(s, '=');
+
+ if (!p) /* wtf? take next variable */
+ continue;
+ /* "export VAR=" */
+ printf("%s %.*s", "export", (int)(p - s) + 1, s);
+ print_escaped(p + 1);
+ putchar('\n');
+# endif
+ }
+ /*fflush_all(); - done after each builtin anyway */
+ }
+ return EXIT_SUCCESS;
+ }
+
+ return helper_export_local(argv, opt_unexport ? SETFLAG_UNEXPORT : SETFLAG_EXPORT);
+}
+#endif
+
+#if ENABLE_HUSH_LOCAL
+static int FAST_FUNC builtin_local(char **argv)
+{
+ if (G.func_nest_level == 0) {
+ bb_error_msg("%s: not in a function", argv[0]);
+ return EXIT_FAILURE; /* bash compat */
+ }
+//TODO? ash and bash support "local -" special form,
+//which saves/restores $- around function call (including async returns, such as ^C)
+//(IOW: it makes "set +/-..." effects local)
+ argv++;
+ /* Since all builtins run in a nested variable level,
+ * need to use level - 1 here. Or else the variable will be removed at once
+ * after builtin returns.
+ */
+ return helper_export_local(argv, (G.var_nest_level - 1) << SETFLAG_VARLVL_SHIFT);
+}
+#endif
+
+#if ENABLE_HUSH_READONLY
+static int FAST_FUNC builtin_readonly(char **argv)
+{
+ argv++;
+ if (*argv == NULL) {
+ /* bash: readonly [-p]: list all readonly VARs
+ * (-p has no effect in bash)
+ */
+ struct variable *e;
+ for (e = G.top_var; e; e = e->next) {
+ if (e->flg_read_only) {
+ const char *s = e->varstr;
+ const char *p = strchr(s, '=');
+
+ if (!p) /* wtf? take next variable */
+ continue;
+ /* "readonly VAR=" */
+ printf("%s %.*s", "readonly", (int)(p - s) + 1, s);
+ print_escaped(p + 1);
+ putchar('\n');
+ }
+ }
+ return EXIT_SUCCESS;
+ }
+ return helper_export_local(argv, SETFLAG_MAKE_RO);
+}
+#endif
+
+#if ENABLE_HUSH_UNSET
+/* http://www.opengroup.org/onlinepubs/9699919799/utilities/V3_chap02.html#unset */
+static int FAST_FUNC builtin_unset(char **argv)
+{
+ int ret;
+ unsigned opts;
+
+ /* "!": do not abort on errors */
+ /* "+": stop at 1st non-option */
+ opts = getopt32(argv, "!+vf");
+ if (opts == (unsigned)-1)
+ return EXIT_FAILURE;
+ if (opts == 3) {
+ bb_simple_error_msg("unset: -v and -f are exclusive");
+ return EXIT_FAILURE;
+ }
+ argv += optind;
+
+ ret = EXIT_SUCCESS;
+ while (*argv) {
+ if (!(opts & 2)) { /* not -f */
+ if (unset_local_var(*argv)) {
+ /* unset <nonexistent_var> doesn't fail.
+ * Error is when one tries to unset RO var.
+ * Message was printed by unset_local_var. */
+ ret = EXIT_FAILURE;
+ }
+ }
+# if ENABLE_HUSH_FUNCTIONS
+ else {
+ unset_func(*argv);
+ }
+# endif
+ argv++;
+ }
+ return ret;
+}
+#endif
+
+#if ENABLE_HUSH_SET
+/* http://www.opengroup.org/onlinepubs/9699919799/utilities/V3_chap02.html#set
+ * built-in 'set' handler
+ * SUSv3 says:
+ * set [-abCefhmnuvx] [-o option] [argument...]
+ * set [+abCefhmnuvx] [+o option] [argument...]
+ * set -- [argument...]
+ * set -o
+ * set +o
+ * Implementations shall support the options in both their hyphen and
+ * plus-sign forms. These options can also be specified as options to sh.
+ * Examples:
+ * Write out all variables and their values: set
+ * Set $1, $2, and $3 and set "$#" to 3: set c a b
+ * Turn on the -x and -v options: set -xv
+ * Unset all positional parameters: set --
+ * Set $1 to the value of x, even if it begins with '-' or '+': set -- "$x"
+ * Set the positional parameters to the expansion of x, even if x expands
+ * with a leading '-' or '+': set -- $x
+ *
+ * So far, we only support "set -- [argument...]" and some of the short names.
+ */
+static int FAST_FUNC builtin_set(char **argv)
+{
+ int n;
+ char **pp, **g_argv;
+ char *arg = *++argv;
+
+ if (arg == NULL) {
+ struct variable *e;
+ for (e = G.top_var; e; e = e->next) {
+ const char *s = e->varstr;
+ const char *p = strchr(s, '=');
+
+ if (!p) /* wtf? take next variable */
+ continue;
+ /* var= */
+ printf("%.*s", (int)(p - s) + 1, s);
+ print_escaped(p + 1);
+ putchar('\n');
+ }
+ return EXIT_SUCCESS;
+ }
+
+ do {
+ if (strcmp(arg, "--") == 0) {
+ ++argv;
+ goto set_argv;
+ }
+ if (arg[0] != '+' && arg[0] != '-')
+ break;
+ for (n = 1; arg[n]; ++n) {
+ if (set_mode((arg[0] == '-'), arg[n], argv[1])) {
+ bb_error_msg("%s: %s: invalid option", "set", arg);
+ return EXIT_FAILURE;
+ }
+ if (arg[n] == 'o' && argv[1])
+ argv++;
+ }
+ } while ((arg = *++argv) != NULL);
+ /* Now argv[0] is 1st argument */
+
+ if (arg == NULL)
+ return EXIT_SUCCESS;
+ set_argv:
+
+ /* NB: G.global_argv[0] ($0) is never freed/changed */
+ g_argv = G.global_argv;
+ if (G.global_args_malloced) {
+ pp = g_argv;
+ while (*++pp)
+ free(*pp);
+ g_argv[1] = NULL;
+ } else {
+ G.global_args_malloced = 1;
+ pp = xzalloc(sizeof(pp[0]) * 2);
+ pp[0] = g_argv[0]; /* retain $0 */
+ g_argv = pp;
+ }
+ /* This realloc's G.global_argv */
+ G.global_argv = pp = add_strings_to_strings(g_argv, argv, /*dup:*/ 1);
+
+ G.global_argc = 1 + string_array_len(pp + 1);
+
+ return EXIT_SUCCESS;
+}
+#endif
+
+static int FAST_FUNC builtin_shift(char **argv)
+{
+ int n = 1;
+ argv = skip_dash_dash(argv);
+ if (argv[0]) {
+ n = bb_strtou(argv[0], NULL, 10);
+ if (errno || n < 0) {
+ /* shared string with ash.c */
+ bb_error_msg("Illegal number: %s", argv[0]);
+ /*
+ * ash aborts in this case.
+ * bash prints error message and set $? to 1.
+ * Interestingly, for "shift 99999" bash does not
+ * print error message, but does set $? to 1
+ * (and does no shifting at all).
+ */
+ }
+ }
+ if (n >= 0 && n < G.global_argc) {
+ if (G_global_args_malloced) {
+ int m = 1;
+ while (m <= n)
+ free(G.global_argv[m++]);
+ }
+ G.global_argc -= n;
+ memmove(&G.global_argv[1], &G.global_argv[n+1],
+ G.global_argc * sizeof(G.global_argv[0]));
+ return EXIT_SUCCESS;
+ }
+ return EXIT_FAILURE;
+}
+
+#if ENABLE_HUSH_GETOPTS
+static int FAST_FUNC builtin_getopts(char **argv)
+{
+/* http://pubs.opengroup.org/onlinepubs/9699919799/utilities/getopts.html
+
+TODO:
+If a required argument is not found, and getopts is not silent,
+a question mark (?) is placed in VAR, OPTARG is unset, and a
+diagnostic message is printed. If getopts is silent, then a
+colon (:) is placed in VAR and OPTARG is set to the option
+character found.
+
+Test that VAR is a valid variable name?
+
+"Whenever the shell is invoked, OPTIND shall be initialized to 1"
+*/
+ char cbuf[2];
+ const char *cp, *optstring, *var;
+ int c, n, exitcode, my_opterr;
+ unsigned count;
+
+ optstring = *++argv;
+ if (!optstring || !(var = *++argv)) {
+ bb_simple_error_msg("usage: getopts OPTSTRING VAR [ARGS]");
+ return EXIT_FAILURE;
+ }
+
+ if (argv[1])
+ argv[0] = G.global_argv[0]; /* for error messages in getopt() */
+ else
+ argv = G.global_argv;
+ cbuf[1] = '\0';
+
+ my_opterr = 0;
+ if (optstring[0] != ':') {
+ cp = get_local_var_value("OPTERR");
+ /* 0 if "OPTERR=0", 1 otherwise */
+ my_opterr = (!cp || NOT_LONE_CHAR(cp, '0'));
+ }
+
+ /* getopts stops on first non-option. Add "+" to force that */
+ /*if (optstring[0] != '+')*/ {
+ char *s = alloca(strlen(optstring) + 2);
+ sprintf(s, "+%s", optstring);
+ optstring = s;
+ }
+
+ /* Naively, now we should just
+ * cp = get_local_var_value("OPTIND");
+ * optind = cp ? atoi(cp) : 0;
+ * optarg = NULL;
+ * opterr = my_opterr;
+ * c = getopt(string_array_len(argv), argv, optstring);
+ * and be done? Not so fast...
+ * Unlike normal getopt() usage in C programs, here
+ * each successive call will (usually) have the same argv[] CONTENTS,
+ * but not the ADDRESSES. Worse yet, it's possible that between
+ * invocations of "getopts", there will be calls to shell builtins
+ * which use getopt() internally. Example:
+ * while getopts "abc" RES -a -bc -abc de; do
+ * unset -ff func
+ * done
+ * This would not work correctly: getopt() call inside "unset"
+ * modifies internal libc state which is tracking position in
+ * multi-option strings ("-abc"). At best, it can skip options
+ * or return the same option infinitely. With glibc implementation
+ * of getopt(), it would use outright invalid pointers and return
+ * garbage even _without_ "unset" mangling internal state.
+ *
+ * We resort to resetting getopt() state and calling it N times,
+ * until we get Nth result (or failure).
+ * (N == G.getopt_count is reset to 0 whenever OPTIND is [un]set).
+ */
+ GETOPT_RESET();
+ count = 0;
+ n = string_array_len(argv);
+ do {
+ optarg = NULL;
+ opterr = (count < G.getopt_count) ? 0 : my_opterr;
+ c = getopt(n, argv, optstring);
+ if (c < 0)
+ break;
+ count++;
+ } while (count <= G.getopt_count);
+
+ /* Set OPTIND. Prevent resetting of the magic counter! */
+ set_local_var_from_halves("OPTIND", utoa(optind));
+ G.getopt_count = count; /* "next time, give me N+1'th result" */
+ GETOPT_RESET(); /* just in case */
+
+ /* Set OPTARG */
+ /* Always set or unset, never left as-is, even on exit/error:
+ * "If no option was found, or if the option that was found
+ * does not have an option-argument, OPTARG shall be unset."
+ */
+ cp = optarg;
+ if (c == '?') {
+ /* If ":optstring" and unknown option is seen,
+ * it is stored to OPTARG.
+ */
+ if (optstring[1] == ':') {
+ cbuf[0] = optopt;
+ cp = cbuf;
+ }
+ }
+ if (cp)
+ set_local_var_from_halves("OPTARG", cp);
+ else
+ unset_local_var("OPTARG");
+
+ /* Convert -1 to "?" */
+ exitcode = EXIT_SUCCESS;
+ if (c < 0) { /* -1: end of options */
+ exitcode = EXIT_FAILURE;
+ c = '?';
+ }
+
+ /* Set VAR */
+ cbuf[0] = c;
+ set_local_var_from_halves(var, cbuf);
+
+ return exitcode;
+}
+#endif
+
+static int FAST_FUNC builtin_source(char **argv)
+{
+ char *arg_path, *filename;
+ HFILE *input;
+ save_arg_t sv;
+ char *args_need_save;
+#if ENABLE_HUSH_FUNCTIONS
+ smallint sv_flg;
+#endif
+
+ argv = skip_dash_dash(argv);
+ filename = argv[0];
+ if (!filename) {
+ /* bash says: "bash: .: filename argument required" */
+ return 2; /* bash compat */
+ }
+ arg_path = NULL;
+ if (!strchr(filename, '/')) {
+ arg_path = find_in_path(filename);
+ if (arg_path)
+ filename = arg_path;
+ else if (!ENABLE_HUSH_BASH_SOURCE_CURDIR) {
+ errno = ENOENT;
+ bb_simple_perror_msg(filename);
+ return EXIT_FAILURE;
+ }
+ }
+ input = hfopen(filename);
+ free(arg_path);
+ if (!input) {
+ bb_perror_msg("%s", filename);
+ /* POSIX: non-interactive shell should abort here,
+ * not merely fail. So far no one complained :)
+ */
+ return EXIT_FAILURE;
+ }
+
+#if ENABLE_HUSH_FUNCTIONS
+ sv_flg = G_flag_return_in_progress;
+ /* "we are inside sourced file, ok to use return" */
+ G_flag_return_in_progress = -1;
+#endif
+ args_need_save = argv[1]; /* used as a boolean variable */
+ if (args_need_save)
+ save_and_replace_G_args(&sv, argv);
+
+ /* "false; . ./empty_line; echo Zero:$?" should print 0 */
+ G.last_exitcode = 0;
+ parse_and_run_file(input);
+ hfclose(input);
+
+ if (args_need_save) /* can't use argv[1] instead: "shift" can mangle it */
+ restore_G_args(&sv, argv);
+#if ENABLE_HUSH_FUNCTIONS
+ G_flag_return_in_progress = sv_flg;
+#endif
+
+ return G.last_exitcode;
+}
+
+#if ENABLE_HUSH_TRAP
+static int FAST_FUNC builtin_trap(char **argv)
+{
+ int sig;
+ char *new_cmd;
+
+ if (!G_traps)
+ G_traps = xzalloc(sizeof(G_traps[0]) * NSIG);
+
+ argv++;
+ if (!*argv) {
+ int i;
+ /* No args: print all trapped */
+ for (i = 0; i < NSIG; ++i) {
+ if (G_traps[i]) {
+ printf("trap -- ");
+ print_escaped(G_traps[i]);
+ /* note: bash adds "SIG", but only if invoked
+ * as "bash". If called as "sh", or if set -o posix,
+ * then it prints short signal names.
+ * We are printing short names: */
+ printf(" %s\n", get_signame(i));
+ }
+ }
+ /*fflush_all(); - done after each builtin anyway */
+ return EXIT_SUCCESS;
+ }
+
+ new_cmd = NULL;
+ /* If first arg is a number: reset all specified signals */
+ sig = bb_strtou(*argv, NULL, 10);
+ if (errno == 0) {
+ int ret;
+ process_sig_list:
+ ret = EXIT_SUCCESS;
+ while (*argv) {
+ sighandler_t handler;
+
+ sig = get_signum(*argv++);
+ if (sig < 0) {
+ ret = EXIT_FAILURE;
+ /* Mimic bash message exactly */
+ bb_error_msg("trap: %s: invalid signal specification", argv[-1]);
+ continue;
+ }
+
+ free(G_traps[sig]);
+ G_traps[sig] = xstrdup(new_cmd);
+
+ debug_printf("trap: setting SIG%s (%i) to '%s'\n",
+ get_signame(sig), sig, G_traps[sig]);
+
+ /* There is no signal for 0 (EXIT) */
+ if (sig == 0)
+ continue;
+
+ if (new_cmd)
+ handler = (new_cmd[0] ? record_pending_signo : SIG_IGN);
+ else
+ /* We are removing trap handler */
+ handler = pick_sighandler(sig);
+ install_sighandler(sig, handler);
+ }
+ return ret;
+ }
+
+ if (!argv[1]) { /* no second arg */
+ bb_simple_error_msg("trap: invalid arguments");
+ return EXIT_FAILURE;
+ }
+
+ /* First arg is "-": reset all specified to default */
+ /* First arg is "--": skip it, the rest is "handler SIGs..." */
+ /* Everything else: set arg as signal handler
+ * (includes "" case, which ignores signal) */
+ if (argv[0][0] == '-') {
+ if (argv[0][1] == '\0') { /* "-" */
+ /* new_cmd remains NULL: "reset these sigs" */
+ goto reset_traps;
+ }
+ if (argv[0][1] == '-' && argv[0][2] == '\0') { /* "--" */
+ argv++;
+ }
+ /* else: "-something", no special meaning */
+ }
+ new_cmd = *argv;
+ reset_traps:
+ argv++;
+ goto process_sig_list;
+}
+#endif
+
+#if ENABLE_HUSH_JOB
+static struct pipe *parse_jobspec(const char *str)
+{
+ struct pipe *pi;
+ unsigned jobnum;
+
+ if (sscanf(str, "%%%u", &jobnum) != 1) {
+ if (str[0] != '%'
+ || (str[1] != '%' && str[1] != '+' && str[1] != '\0')
+ ) {
+ bb_error_msg("bad argument '%s'", str);
+ return NULL;
+ }
+ /* It is "%%", "%+" or "%" - current job */
+ jobnum = G.last_jobid;
+ if (jobnum == 0) {
+ bb_simple_error_msg("no current job");
+ return NULL;
+ }
+ }
+ for (pi = G.job_list; pi; pi = pi->next) {
+ if (pi->jobid == jobnum) {
+ return pi;
+ }
+ }
+ bb_error_msg("%u: no such job", jobnum);
+ return NULL;
+}
+
+static int FAST_FUNC builtin_jobs(char **argv UNUSED_PARAM)
+{
+ struct pipe *job;
+ const char *status_string;
+
+ checkjobs(NULL, 0 /*(no pid to wait for)*/);
+ for (job = G.job_list; job; job = job->next) {
+ if (job->alive_cmds == job->stopped_cmds)
+ status_string = "Stopped";
+ else
+ status_string = "Running";
+
+ printf(JOB_STATUS_FORMAT, job->jobid, status_string, job->cmdtext);
+ }
+
+ clean_up_last_dead_job();
+
+ return EXIT_SUCCESS;
+}
+
+/* built-in 'fg' and 'bg' handler */
+static int FAST_FUNC builtin_fg_bg(char **argv)
+{
+ int i;
+ struct pipe *pi;
+
+ if (!G_interactive_fd)
+ return EXIT_FAILURE;
+
+ /* If they gave us no args, assume they want the last backgrounded task */
+ if (!argv[1]) {
+ for (pi = G.job_list; pi; pi = pi->next) {
+ if (pi->jobid == G.last_jobid) {
+ goto found;
+ }
+ }
+ bb_error_msg("%s: no current job", argv[0]);
+ return EXIT_FAILURE;
+ }
+
+ pi = parse_jobspec(argv[1]);
+ if (!pi)
+ return EXIT_FAILURE;
+ found:
+ /* TODO: bash prints a string representation
+ * of job being foregrounded (like "sleep 1 | cat") */
+ if (argv[0][0] == 'f' && G_saved_tty_pgrp) {
+ /* Put the job into the foreground. */
+ tcsetpgrp(G_interactive_fd, pi->pgrp);
+ }
+
+ /* Restart the processes in the job */
+ debug_printf_jobs("reviving %d procs, pgrp %d\n", pi->num_cmds, pi->pgrp);
+ for (i = 0; i < pi->num_cmds; i++) {
+ debug_printf_jobs("reviving pid %d\n", pi->cmds[i].pid);
+ }
+ pi->stopped_cmds = 0;
+
+ i = kill(- pi->pgrp, SIGCONT);
+ if (i < 0) {
+ if (errno == ESRCH) {
+ delete_finished_job(pi);
+ return EXIT_SUCCESS;
+ }
+ bb_simple_perror_msg("kill (SIGCONT)");
+ }
+
+ if (argv[0][0] == 'f') {
+ remove_job_from_table(pi); /* FG job shouldn't be in job table */
+ return checkjobs_and_fg_shell(pi);
+ }
+ return EXIT_SUCCESS;
+}
+#endif
+
+#if ENABLE_HUSH_KILL
+static int FAST_FUNC builtin_kill(char **argv)
+{
+ int ret = 0;
+
+# if ENABLE_HUSH_JOB
+ if (argv[1] && strcmp(argv[1], "-l") != 0) {
+ int i = 1;
+
+ do {
+ struct pipe *pi;
+ char *dst;
+ int j, n;
+
+ if (argv[i][0] != '%')
+ continue;
+ /*
+ * "kill %N" - job kill
+ * Converting to pgrp / pid kill
+ */
+ pi = parse_jobspec(argv[i]);
+ if (!pi) {
+ /* Eat bad jobspec */
+ j = i;
+ do {
+ j++;
+ argv[j - 1] = argv[j];
+ } while (argv[j]);
+ ret = 1;
+ i--;
+ continue;
+ }
+ /*
+ * In jobs started under job control, we signal
+ * entire process group by kill -PGRP_ID.
+ * This happens, f.e., in interactive shell.
+ *
+ * Otherwise, we signal each child via
+ * kill PID1 PID2 PID3.
+ * Testcases:
+ * sh -c 'sleep 1|sleep 1 & kill %1'
+ * sh -c 'true|sleep 2 & sleep 1; kill %1'
+ * sh -c 'true|sleep 1 & sleep 2; kill %1'
+ */
+ n = G_interactive_fd ? 1 : pi->num_cmds;
+ dst = alloca(n * sizeof(int)*4);
+ argv[i] = dst;
+ if (G_interactive_fd)
+ dst += sprintf(dst, " -%u", (int)pi->pgrp);
+ else for (j = 0; j < n; j++) {
+ struct command *cmd = &pi->cmds[j];
+ /* Skip exited members of the job */
+ if (cmd->pid == 0)
+ continue;
+ /*
+ * kill_main has matching code to expect
+ * leading space. Needed to not confuse
+ * negative pids with "kill -SIGNAL_NO" syntax
+ */
+ dst += sprintf(dst, " %u", (int)cmd->pid);
+ }
+ *dst = '\0';
+ } while (argv[++i]);
+ }
+# endif
+
+ if (argv[1] || ret == 0) {
+ ret = run_applet_main(argv, kill_main);
+ }
+ /* else: ret = 1, "kill %bad_jobspec" case */
+ return ret;
+}
+#endif
+
+#if ENABLE_HUSH_WAIT
+/* http://www.opengroup.org/onlinepubs/9699919799/utilities/wait.html */
+# if !ENABLE_HUSH_JOB
+# define wait_for_child_or_signal(pipe,pid) wait_for_child_or_signal(pid)
+# endif
+static int wait_for_child_or_signal(struct pipe *waitfor_pipe, pid_t waitfor_pid)
+{
+ int ret = 0;
+ for (;;) {
+ int sig;
+ sigset_t oldset;
+
+ if (!sigisemptyset(&G.pending_set))
+ goto check_sig;
+
+ /* waitpid is not interruptible by SA_RESTARTed
+ * signals which we use. Thus, this ugly dance:
+ */
+
+ /* Make sure possible SIGCHLD is stored in kernel's
+ * pending signal mask before we call waitpid.
+ * Or else we may race with SIGCHLD, lose it,
+ * and get stuck in sigsuspend...
+ */
+ sigfillset(&oldset); /* block all signals, remember old set */
+ sigprocmask2(SIG_SETMASK, &oldset);
+
+ if (!sigisemptyset(&G.pending_set)) {
+ /* Crap! we raced with some signal! */
+ goto restore;
+ }
+
+ /*errno = 0; - checkjobs does this */
+/* Can't pass waitfor_pipe into checkjobs(): it won't be interruptible */
+ ret = checkjobs(NULL, waitfor_pid); /* waitpid(WNOHANG) inside */
+ debug_printf_exec("checkjobs:%d\n", ret);
+# if ENABLE_HUSH_JOB
+ if (waitfor_pipe) {
+ int rcode = job_exited_or_stopped(waitfor_pipe);
+ debug_printf_exec("job_exited_or_stopped:%d\n", rcode);
+ if (rcode >= 0) {
+ ret = rcode;
+ sigprocmask(SIG_SETMASK, &oldset, NULL);
+ break;
+ }
+ }
+# endif
+ /* if ECHILD, there are no children (ret is -1 or 0) */
+ /* if ret == 0, no children changed state */
+ /* if ret != 0, it's exitcode+1 of exited waitfor_pid child */
+ if (errno == ECHILD || ret) {
+ ret--;
+ if (ret < 0) /* if ECHILD, may need to fix "ret" */
+ ret = 0;
+# if ENABLE_HUSH_BASH_COMPAT
+ if (waitfor_pid == -1 && errno == ECHILD) {
+ /* exitcode of "wait -n" with no children is 127, not 0 */
+ ret = 127;
+ }
+# endif
+ sigprocmask(SIG_SETMASK, &oldset, NULL);
+ break;
+ }
+ /* Wait for SIGCHLD or any other signal */
+ /* It is vitally important for sigsuspend that SIGCHLD has non-DFL handler! */
+ /* Note: sigsuspend invokes signal handler */
+ sigsuspend(&oldset);
+ /* ^^^ add "sigdelset(&oldset, SIGCHLD)" before sigsuspend
+ * to make sure SIGCHLD is not masked off?
+ * It was reported that this:
+ * fn() { : | return; }
+ * shopt -s lastpipe
+ * fn
+ * exec hush SCRIPT
+ * under bash 4.4.23 runs SCRIPT with SIGCHLD masked,
+ * making "wait" commands in SCRIPT block forever.
+ */
+ restore:
+ sigprocmask(SIG_SETMASK, &oldset, NULL);
+ check_sig:
+ /* So, did we get a signal? */
+ sig = check_and_run_traps();
+ if (sig /*&& sig != SIGCHLD - always true */) {
+ /* Do this for any (non-ignored) signal, not only for ^C */
+ ret = 128 | sig;
+ break;
+ }
+ /* SIGCHLD, or no signal, or ignored one, such as SIGQUIT. Repeat */
+ }
+ return ret;
+}
+
+static int FAST_FUNC builtin_wait(char **argv)
+{
+ int ret;
+ int status;
+
+ argv = skip_dash_dash(argv);
+# if ENABLE_HUSH_BASH_COMPAT
+ if (argv[0] && strcmp(argv[0], "-n") == 0) {
+ /* wait -n */
+ /* (bash accepts "wait -n PID" too and ignores PID) */
+ G.dead_job_exitcode = -1;
+ return wait_for_child_or_signal(NULL, -1 /*no job, wait for one job*/);
+ }
+# endif
+ if (argv[0] == NULL) {
+ /* Don't care about wait results */
+ /* Note 1: must wait until there are no more children */
+ /* Note 2: must be interruptible */
+ /* Examples:
+ * $ sleep 3 & sleep 6 & wait
+ * [1] 30934 sleep 3
+ * [2] 30935 sleep 6
+ * [1] Done sleep 3
+ * [2] Done sleep 6
+ * $ sleep 3 & sleep 6 & wait
+ * [1] 30936 sleep 3
+ * [2] 30937 sleep 6
+ * [1] Done sleep 3
+ * ^C <-- after ~4 sec from keyboard
+ * $
+ */
+ return wait_for_child_or_signal(NULL, 0 /*no job and no pid to wait for*/);
+ }
+
+ do {
+ pid_t pid = bb_strtou(*argv, NULL, 10);
+ if (errno || pid <= 0) {
+# if ENABLE_HUSH_JOB
+ if (argv[0][0] == '%') {
+ struct pipe *wait_pipe;
+ ret = 127; /* bash compat for bad jobspecs */
+ wait_pipe = parse_jobspec(*argv);
+ if (wait_pipe) {
+ ret = job_exited_or_stopped(wait_pipe);
+ if (ret < 0) {
+ ret = wait_for_child_or_signal(wait_pipe, 0);
+ } else {
+ /* waiting on "last dead job" removes it */
+ clean_up_last_dead_job();
+ }
+ }
+ /* else: parse_jobspec() already emitted error msg */
+ continue;
+ }
+# endif
+ /* mimic bash message */
+ bb_error_msg("wait: '%s': not a pid or valid job spec", *argv);
+ ret = EXIT_FAILURE;
+ continue; /* bash checks all argv[] */
+ }
+
+ /* Do we have such child? */
+ ret = waitpid(pid, &status, WNOHANG);
+ if (ret < 0) {
+ /* No */
+ ret = 127;
+ if (errno == ECHILD) {
+ if (pid == G.last_bg_pid) {
+ /* "wait $!" but last bg task has already exited. Try:
+ * (sleep 1; exit 3) & sleep 2; echo $?; wait $!; echo $?
+ * In bash it prints exitcode 0, then 3.
+ * In dash, it is 127.
+ */
+ ret = G.last_bg_pid_exitcode;
+ } else {
+ /* Example: "wait 1". mimic bash message */
+ bb_error_msg("wait: pid %u is not a child of this shell", (unsigned)pid);
+ }
+ } else {
+ /* ??? */
+ bb_perror_msg("wait %s", *argv);
+ }
+ continue; /* bash checks all argv[] */
+ }
+ if (ret == 0) {
+ /* Yes, and it still runs */
+ ret = wait_for_child_or_signal(NULL, pid);
+ } else {
+ /* Yes, and it just exited */
+ process_wait_result(NULL, pid, status);
+ ret = WEXITSTATUS(status);
+ if (WIFSIGNALED(status))
+ ret = 128 | WTERMSIG(status);
+ }
+ } while (*++argv);
+
+ return ret;
+}
+#endif
+
+#if ENABLE_HUSH_LOOPS || ENABLE_HUSH_FUNCTIONS
+static unsigned parse_numeric_argv1(char **argv, unsigned def, unsigned def_min)
+{
+ if (argv[1]) {
+ def = bb_strtou(argv[1], NULL, 10);
+ if (errno || def < def_min || argv[2]) {
+ bb_error_msg("%s: bad arguments", argv[0]);
+ def = UINT_MAX;
+ }
+ }
+ return def;
+}
+#endif
+
+#if ENABLE_HUSH_LOOPS
+static int FAST_FUNC builtin_break(char **argv)
+{
+ unsigned depth;
+ if (G.depth_of_loop == 0) {
+ bb_error_msg("%s: only meaningful in a loop", argv[0]);
+ /* if we came from builtin_continue(), need to undo "= 1" */
+ G.flag_break_continue = 0;
+ return EXIT_SUCCESS; /* bash compat */
+ }
+ G.flag_break_continue++; /* BC_BREAK = 1, or BC_CONTINUE = 2 */
+
+ G.depth_break_continue = depth = parse_numeric_argv1(argv, 1, 1);
+ if (depth == UINT_MAX)
+ G.flag_break_continue = BC_BREAK;
+ if (G.depth_of_loop < depth)
+ G.depth_break_continue = G.depth_of_loop;
+
+ return EXIT_SUCCESS;
+}
+
+static int FAST_FUNC builtin_continue(char **argv)
+{
+ G.flag_break_continue = 1; /* BC_CONTINUE = 2 = 1+1 */
+ return builtin_break(argv);
+}
+#endif
+
+#if ENABLE_HUSH_FUNCTIONS
+static int FAST_FUNC builtin_return(char **argv)
+{
+ int rc;
+
+ if (G_flag_return_in_progress != -1) {
+ bb_error_msg("%s: not in a function or sourced script", argv[0]);
+ return EXIT_FAILURE; /* bash compat */
+ }
+
+ G_flag_return_in_progress = 1;
+
+ /* bash:
+ * out of range: wraps around at 256, does not error out
+ * non-numeric param:
+ * f() { false; return qwe; }; f; echo $?
+ * bash: return: qwe: numeric argument required <== we do this
+ * 255 <== we also do this
+ */
+ rc = parse_numeric_argv1(argv, G.last_exitcode, 0);
+# if ENABLE_HUSH_TRAP
+ if (argv[1]) { /* "return ARG" inside a running trap sets $? */
+ debug_printf_exec("G.return_exitcode=%d\n", rc);
+ G.return_exitcode = rc;
+ }
+# endif
+ return rc;
+}
+#endif
+
+#if ENABLE_HUSH_TIMES
+static int FAST_FUNC builtin_times(char **argv UNUSED_PARAM)
+{
+ static const uint8_t times_tbl[] ALIGN1 = {
+ ' ', offsetof(struct tms, tms_utime),
+ '\n', offsetof(struct tms, tms_stime),
+ ' ', offsetof(struct tms, tms_cutime),
+ '\n', offsetof(struct tms, tms_cstime),
+ 0
+ };
+ const uint8_t *p;
+ unsigned clk_tck;
+ struct tms buf;
+
+ clk_tck = bb_clk_tck();
+
+ times(&buf);
+ p = times_tbl;
+ do {
+ unsigned sec, frac;
+ unsigned long t;
+ t = *(clock_t *)(((char *) &buf) + p[1]);
+ sec = t / clk_tck;
+ frac = t % clk_tck;
+ printf("%um%u.%03us%c",
+ sec / 60, sec % 60,
+ (frac * 1000) / clk_tck,
+ p[0]);
+ p += 2;
+ } while (*p);
+
+ return EXIT_SUCCESS;
+}
+#endif
+
+#if ENABLE_HUSH_MEMLEAK
+static int FAST_FUNC builtin_memleak(char **argv UNUSED_PARAM)
+{
+ void *p;
+ unsigned long l;
+
+# ifdef M_TRIM_THRESHOLD
+ /* Optional. Reduces probability of false positives */
+ malloc_trim(0);
+# endif
+ /* Crude attempt to find where "free memory" starts,
+ * sans fragmentation. */
+ p = malloc(240);
+ l = (unsigned long)p;
+ free(p);
+ p = malloc(3400);
+ if (l < (unsigned long)p) l = (unsigned long)p;
+ free(p);
+
+
+# if 0 /* debug */
+ {
+ struct mallinfo mi = mallinfo();
+ printf("top alloc:0x%lx malloced:%d+%d=%d\n", l,
+ mi.arena, mi.hblkhd, mi.arena + mi.hblkhd);
+ }
+# endif
+
+ if (!G.memleak_value)
+ G.memleak_value = l;
+
+ l -= G.memleak_value;
+ if ((long)l < 0)
+ l = 0;
+ l /= 1024;
+ if (l > 127)
+ l = 127;
+
+ /* Exitcode is "how many kilobytes we leaked since 1st call" */
+ return l;
+}
+#endif
+#endif /* !__U_BOOT__ */
diff --git a/common/cli_readline.c b/common/cli_readline.c
index 06b8d46..2507be2 100644
--- a/common/cli_readline.c
+++ b/common/cli_readline.c
@@ -12,6 +12,8 @@
#include <bootretry.h>
#include <cli.h>
#include <command.h>
+#include <hang.h>
+#include <malloc.h>
#include <time.h>
#include <watchdog.h>
#include <asm/global_data.h>
@@ -85,7 +87,6 @@
static unsigned hist_num;
static char *hist_list[HIST_MAX];
-static char hist_lines[HIST_MAX][HIST_SIZE + 1]; /* Save room for NULL */
#define add_idx_minus_one() ((hist_add_idx == 0) ? hist_max : hist_add_idx-1)
@@ -97,8 +98,9 @@
getcmd_putch(ch);
}
-static void hist_init(void)
+static int hist_init(void)
{
+ unsigned char *hist;
int i;
hist_max = 0;
@@ -106,10 +108,14 @@
hist_cur = -1;
hist_num = 0;
- for (i = 0; i < HIST_MAX; i++) {
- hist_list[i] = hist_lines[i];
- hist_list[i][0] = '\0';
- }
+ hist = calloc(HIST_MAX, HIST_SIZE + 1);
+ if (!hist)
+ return -ENOMEM;
+
+ for (i = 0; i < HIST_MAX; i++)
+ hist_list[i] = hist + (i * (HIST_SIZE + 1));
+
+ return 0;
}
static void cread_add_to_hist(char *line)
@@ -493,8 +499,9 @@
#else /* !CONFIG_CMDLINE_EDITING */
-static inline void hist_init(void)
+static inline int hist_init(void)
{
+ return 0;
}
static int cread_line(const char *const prompt, char *buf, unsigned int *len,
@@ -533,7 +540,7 @@
int n = 0; /* buffer index */
int plen = 0; /* prompt length */
int col; /* output column cnt */
- char c;
+ int c;
/* print prompt */
if (prompt) {
@@ -643,8 +650,9 @@
*/
if (IS_ENABLED(CONFIG_CMDLINE_EDITING) && (gd->flags & GD_FLG_RELOC)) {
if (!initted) {
- hist_init();
- initted = 1;
+ rc = hist_init();
+ if (rc == 0)
+ initted = 1;
}
if (prompt)
diff --git a/common/command.c b/common/command.c
index 846e16e..af8ffdb 100644
--- a/common/command.c
+++ b/common/command.c
@@ -355,10 +355,9 @@
return len;
}
-static char tmp_buf[CONFIG_SYS_CBSIZE + 1]; /* copy of console I/O buffer */
-
int cmd_auto_complete(const char *const prompt, char *buf, int *np, int *colp)
{
+ char tmp_buf[CONFIG_SYS_CBSIZE + 1]; /* copy of console I/O buffer */
int n = *np, col = *colp;
char *argv[CONFIG_SYS_MAXARGS + 1]; /* NULL terminated */
char *cmdv[20];
@@ -466,12 +465,12 @@
#endif
#ifdef CMD_DATA_SIZE
-int cmd_get_data_size(char* arg, int default_size)
+int cmd_get_data_size(const char *arg, int default_size)
{
/* Check for a size specification .b, .w or .l.
*/
int len = strlen(arg);
- if (len > 2 && arg[len-2] == '.') {
+ if (len >= 2 && arg[len-2] == '.') {
switch (arg[len-1]) {
case 'b':
return 1;
diff --git a/common/console.c b/common/console.c
index 98c3ee6..aa3053b 100644
--- a/common/console.c
+++ b/common/console.c
@@ -19,12 +19,15 @@
#include <stdio_dev.h>
#include <exports.h>
#include <env_internal.h>
+#include <video_console.h>
#include <watchdog.h>
#include <asm/global_data.h>
#include <linux/delay.h>
DECLARE_GLOBAL_DATA_PTR;
+#define CSI "\x1b["
+
static int on_console(const char *name, const char *value, enum env_op op,
int flags)
{
@@ -818,6 +821,9 @@
ret = membuff_new((struct membuff *)&gd->console_in,
CONFIG_CONSOLE_RECORD_IN_SIZE);
+ /* Start recording from the beginning */
+ gd->flags |= GD_FLG_RECORD;
+
return ret;
}
@@ -842,7 +848,7 @@
return -ENOSPC;
return membuff_readline((struct membuff *)&gd->console_out, str,
- maxlen, '\0');
+ maxlen, '\0', false);
}
int console_record_avail(void)
@@ -850,6 +856,11 @@
return membuff_avail((struct membuff *)&gd->console_out);
}
+bool console_record_isempty(void)
+{
+ return membuff_isempty((struct membuff *)&gd->console_out);
+}
+
int console_in_puts(const char *str)
{
return membuff_put((struct membuff *)&gd->console_in, str, strlen(str));
@@ -1010,9 +1021,44 @@
return 0;
}
+int console_clear(void)
+{
+ /*
+ * Send clear screen and home
+ *
+ * FIXME(Heinrich Schuchardt <xypron.glpk@gmx.de>): This should go
+ * through an API and only be written to serial terminals, not video
+ * displays
+ */
+ printf(CSI "2J" CSI "1;1H");
+ if (IS_ENABLED(CONFIG_VIDEO_ANSI))
+ return 0;
+
+ if (IS_ENABLED(CONFIG_VIDEO)) {
+ struct udevice *dev;
+ int ret;
+
+ ret = uclass_first_device_err(UCLASS_VIDEO_CONSOLE, &dev);
+ if (ret)
+ return ret;
+ ret = vidconsole_clear_and_reset(dev);
+ if (ret)
+ return ret;
+ }
+
+ return 0;
+}
+
+static char *get_stdio(const u8 std)
+{
+ return stdio_devices[std] ? stdio_devices[std]->name : "No devices available!";
+}
+
static void stdio_print_current_devices(void)
{
- char *stdinname, *stdoutname, *stderrname;
+ char *stdinname = NULL;
+ char *stdoutname = NULL;
+ char *stderrname = NULL;
if (CONFIG_IS_ENABLED(CONSOLE_MUX) &&
CONFIG_IS_ENABLED(SYS_CONSOLE_IS_IN_ENV)) {
@@ -1020,22 +1066,12 @@
stdinname = env_get("stdin");
stdoutname = env_get("stdout");
stderrname = env_get("stderr");
-
- stdinname = stdinname ? : "No input devices available!";
- stdoutname = stdoutname ? : "No output devices available!";
- stderrname = stderrname ? : "No error devices available!";
- } else {
- stdinname = stdio_devices[stdin] ?
- stdio_devices[stdin]->name :
- "No input devices available!";
- stdoutname = stdio_devices[stdout] ?
- stdio_devices[stdout]->name :
- "No output devices available!";
- stderrname = stdio_devices[stderr] ?
- stdio_devices[stderr]->name :
- "No error devices available!";
}
+ stdinname = stdinname ? : get_stdio(stdin);
+ stdoutname = stdoutname ? : get_stdio(stdout);
+ stderrname = stderrname ? : get_stdio(stderr);
+
/* Print information */
puts("In: ");
printf("%s\n", stdinname);
diff --git a/common/main.c b/common/main.c
index 7c70de2..6dba6cb 100644
--- a/common/main.c
+++ b/common/main.c
@@ -9,6 +9,7 @@
#include <common.h>
#include <autoboot.h>
#include <bootstage.h>
+#include <bootstd.h>
#include <cli.h>
#include <command.h>
#include <console.h>
@@ -67,6 +68,16 @@
autoboot_command(s);
+ /* if standard boot if enabled, assume that it will be able to boot */
+ if (IS_ENABLED(CONFIG_BOOTSTD_PROG)) {
+ int ret;
+
+ ret = bootstd_prog_boot();
+ printf("Standard boot failed (err=%dE)\n", ret);
+ panic("Failed to boot");
+ }
+
cli_loop();
+
panic("No CLI available");
}
diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index fc284a5..6a4772e 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -97,8 +97,7 @@
default 0x31000 if ARCH_MX6 && MX6_OCRAM_256KB
default 0x11000 if ARCH_MX7 || (ARCH_MX6 && !MX6_OCRAM_256KB)
default 0x10000 if ARCH_KEYSTONE
- default 0x8000 if ARCH_SUNXI && !MACH_SUN50I_H616
- default 0x0 if ARCH_MTMIPS
+ default 0x0 if ARCH_MTMIPS || ARCH_SUNXI
default TPL_MAX_SIZE if TPL_MAX_SIZE > SPL_MAX_SIZE
default SPL_MAX_SIZE
help
@@ -207,7 +206,7 @@
config SPL_BINMAN_UBOOT_SYMBOLS
bool "Declare binman symbols for U-Boot phases in SPL"
depends on SPL_BINMAN_SYMBOLS
- default n if ARCH_IMX8M
+ default n if ARCH_IMX8M || ARCH_IMX9
default y
help
This enables use of symbols in SPL which refer to U-Boot phases,
@@ -378,7 +377,7 @@
default 0x93ffb8 if ARCH_MX6 && MX6_OCRAM_256KB
default 0x91ffb8 if ARCH_MX6 && !MX6_OCRAM_256KB
default 0x118000 if MACH_SUN50I_H6
- default 0x58000 if MACH_SUN50I_H616
+ default 0x52a00 if MACH_SUN50I_H616
default 0x40000 if MACH_SUN8I_R528
default 0x54000 if MACH_SUN50I || MACH_SUN50I_H5
default 0x18000 if MACH_SUN9I
@@ -585,8 +584,7 @@
config SPL_FIT_IMAGE_TINY
bool "Remove functionality from SPL FIT loading to reduce size"
depends on SPL_FIT
- default y if MACH_SUN50I || MACH_SUN50I_H5 || SUN50I_GEN_H6
- default y if ARCH_IMX8M || ARCH_IMX9
+ default y if ARCH_IMX8M || ARCH_IMX9 || ARCH_SUNXI
help
Enable this to reduce the size of the FIT image loading code
in SPL, if space for the SPL binary is very tight.
diff --git a/common/spl/Kconfig.tpl b/common/spl/Kconfig.tpl
index cc71578..4ee3b9b 100644
--- a/common/spl/Kconfig.tpl
+++ b/common/spl/Kconfig.tpl
@@ -23,7 +23,7 @@
config TPL_BINMAN_UBOOT_SYMBOLS
bool "Declare binman symbols for U-Boot phases in TPL"
depends on TPL_BINMAN_SYMBOLS
- default n if ARCH_IMX8M
+ default n if ARCH_IMX8M || ARCH_IMX9
default y
help
This enables use of symbols in TPL which refer to U-Boot phases,
diff --git a/common/spl/Kconfig.vpl b/common/spl/Kconfig.vpl
index ae1a3c7..f199302 100644
--- a/common/spl/Kconfig.vpl
+++ b/common/spl/Kconfig.vpl
@@ -243,7 +243,7 @@
config VPL_BINMAN_UBOOT_SYMBOLS
bool "Declare binman symbols for U-Boot phases in VPL"
depends on VPL_BINMAN_SYMBOLS
- default n if ARCH_IMX8M
+ default n if ARCH_IMX8M || ARCH_IMX9
default y
help
This enables use of symbols in VPL which refer to U-Boot phases,
diff --git a/common/stackprot.c b/common/stackprot.c
index d5b7061..6495951 100644
--- a/common/stackprot.c
+++ b/common/stackprot.c
@@ -18,3 +18,8 @@
panic("Stack smashing detected in function:\n%p relocated from %p",
ra, ra - gd->reloc_off);
}
+
+void __stack_chk_fail_local(void)
+{
+ __stack_chk_fail();
+}
diff --git a/common/usb_hub.c b/common/usb_hub.c
index 85c0822..3fb7e14 100644
--- a/common/usb_hub.c
+++ b/common/usb_hub.c
@@ -174,8 +174,10 @@
debug("enabling power on all ports\n");
for (i = 0; i < dev->maxchild; i++) {
+ usb_set_port_feature(dev, i + 1, USB_PORT_FEAT_RESET);
+ debug("Reset : port %d returns %lX\n", i + 1, dev->status);
usb_set_port_feature(dev, i + 1, USB_PORT_FEAT_POWER);
- debug("port %d returns %lX\n", i + 1, dev->status);
+ debug("PowerOn : port %d returns %lX\n", i + 1, dev->status);
}
#ifdef CONFIG_SANDBOX
@@ -395,6 +397,13 @@
break;
}
+ /*
+ * USB 2.0 7.1.7.5: devices must be able to accept a SetAddress()
+ * request (refer to Section 11.24.2 and Section 9.4 respectively)
+ * after the reset recovery time 10 ms
+ */
+ mdelay(10);
+
#if CONFIG_IS_ENABLED(DM_USB)
struct udevice *child;
diff --git a/common/usb_storage.c b/common/usb_storage.c
index 35c656d..774d5bd 100644
--- a/common/usb_storage.c
+++ b/common/usb_storage.c
@@ -102,6 +102,7 @@
trans_reset transport_reset; /* reset routine */
trans_cmnd transport; /* transport routine */
unsigned short max_xfer_blk; /* maximum transfer blocks */
+ bool cmd12; /* use 12-byte commands (RBC/UFI) */
};
#if !CONFIG_IS_ENABLED(BLK)
@@ -359,7 +360,7 @@
{
int i;
printf("SRB: len %d datalen 0x%lX\n ", pccb->cmdlen, pccb->datalen);
- for (i = 0; i < 12; i++)
+ for (i = 0; i < pccb->cmdlen; i++)
printf("%02X ", pccb->cmd[i]);
printf("\n");
}
@@ -898,7 +899,7 @@
psrb->cmd[4] = 18;
psrb->datalen = 18;
psrb->pdata = &srb->sense_buf[0];
- psrb->cmdlen = 12;
+ psrb->cmdlen = us->cmd12 ? 12 : 6;
/* issue the command */
result = usb_stor_CB_comdat(psrb, us);
debug("auto request returned %d\n", result);
@@ -999,7 +1000,7 @@
srb->cmd[1] = srb->lun << 5;
srb->cmd[4] = 36;
srb->datalen = 36;
- srb->cmdlen = 12;
+ srb->cmdlen = ss->cmd12 ? 12 : 6;
i = ss->transport(srb, ss);
debug("inquiry returns %d\n", i);
if (i == 0)
@@ -1024,7 +1025,7 @@
srb->cmd[4] = 18;
srb->datalen = 18;
srb->pdata = &srb->sense_buf[0];
- srb->cmdlen = 12;
+ srb->cmdlen = ss->cmd12 ? 12 : 6;
ss->transport(srb, ss);
debug("Request Sense returned %02X %02X %02X\n",
srb->sense_buf[2], srb->sense_buf[12],
@@ -1042,7 +1043,7 @@
srb->cmd[0] = SCSI_TST_U_RDY;
srb->cmd[1] = srb->lun << 5;
srb->datalen = 0;
- srb->cmdlen = 12;
+ srb->cmdlen = ss->cmd12 ? 12 : 6;
if (ss->transport(srb, ss) == USB_STOR_TRANSPORT_GOOD) {
ss->flags |= USB_READY;
return 0;
@@ -1074,7 +1075,7 @@
srb->cmd[0] = SCSI_RD_CAPAC;
srb->cmd[1] = srb->lun << 5;
srb->datalen = 8;
- srb->cmdlen = 12;
+ srb->cmdlen = ss->cmd12 ? 12 : 10;
if (ss->transport(srb, ss) == USB_STOR_TRANSPORT_GOOD)
return 0;
} while (retry--);
@@ -1094,7 +1095,7 @@
srb->cmd[5] = ((unsigned char) (start)) & 0xff;
srb->cmd[7] = ((unsigned char) (blocks >> 8)) & 0xff;
srb->cmd[8] = (unsigned char) blocks & 0xff;
- srb->cmdlen = 12;
+ srb->cmdlen = ss->cmd12 ? 12 : 10;
debug("read10: start %lx blocks %x\n", start, blocks);
return ss->transport(srb, ss);
}
@@ -1111,7 +1112,7 @@
srb->cmd[5] = ((unsigned char) (start)) & 0xff;
srb->cmd[7] = ((unsigned char) (blocks >> 8)) & 0xff;
srb->cmd[8] = (unsigned char) blocks & 0xff;
- srb->cmdlen = 12;
+ srb->cmdlen = ss->cmd12 ? 12 : 10;
debug("write10: start %lx blocks %x\n", start, blocks);
return ss->transport(srb, ss);
}
@@ -1417,6 +1418,11 @@
printf("Sorry, protocol %d not yet supported.\n", ss->subclass);
return 0;
}
+
+ /* UFI uses 12-byte commands (like RBC, unlike SCSI) */
+ if (ss->subclass == US_SC_UFI)
+ ss->cmd12 = true;
+
if (ss->ep_int) {
/* we had found an interrupt endpoint, prepare irq pipe
* set up the IRQ pipe and handler
diff --git a/configs/10m50_defconfig b/configs/10m50_defconfig
index 02f1249..c4b4dfe 100644
--- a/configs/10m50_defconfig
+++ b/configs/10m50_defconfig
@@ -14,11 +14,11 @@
CONFIG_SYS_MONITOR_BASE=0xCFF80000
CONFIG_FIT=y
# CONFIG_AUTOBOOT is not set
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_CPU=y
# CONFIG_CMD_BOOTD is not set
# CONFIG_CMD_XIMG is not set
diff --git a/configs/3c120_defconfig b/configs/3c120_defconfig
index 6bd5471..077506e 100644
--- a/configs/3c120_defconfig
+++ b/configs/3c120_defconfig
@@ -14,11 +14,11 @@
CONFIG_SYS_MONITOR_BASE=0xD7F80000
CONFIG_FIT=y
# CONFIG_AUTOBOOT is not set
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_CPU=y
# CONFIG_CMD_BOOTD is not set
# CONFIG_CMD_XIMG is not set
@@ -37,6 +37,7 @@
CONFIG_ALTERA_PIO=y
CONFIG_MISC=y
CONFIG_ALTERA_SYSID=y
+CONFIG_MTD=y
CONFIG_DM_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_SHOW_PROGRESS=0
diff --git a/configs/A20-OLinuXino-Lime2-eMMC_defconfig b/configs/A20-OLinuXino-Lime2-eMMC_defconfig
index 44770ff..22d80ca 100644
--- a/configs/A20-OLinuXino-Lime2-eMMC_defconfig
+++ b/configs/A20-OLinuXino-Lime2-eMMC_defconfig
@@ -21,6 +21,7 @@
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SYS_I2C_SLAVE=0x7f
CONFIG_SYS_I2C_SPEED=400000
+CONFIG_MTD=y
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_PHY_REALTEK=y
diff --git a/configs/CMPC885_defconfig b/configs/CMPC885_defconfig
index 0c33dad..bbe8d5b 100644
--- a/configs/CMPC885_defconfig
+++ b/configs/CMPC885_defconfig
@@ -22,6 +22,7 @@
CONFIG_SYS_SCCR_MASK=0x00000000
CONFIG_SYS_DER=0x2002000F
CONFIG_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_BOOTDELAY=5
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_FLUSH_STDIN=y
@@ -40,7 +41,6 @@
# CONFIG_BOOTM_PLAN9 is not set
# CONFIG_BOOTM_RTEMS is not set
# CONFIG_BOOTM_VXWORKS is not set
-CONFIG_SYS_BOOTM_LEN=0x2000000
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_GO is not set
# CONFIG_CMD_IMI is not set
diff --git a/configs/CMPCPRO_defconfig b/configs/CMPCPRO_defconfig
index 58b28f0..cefed63 100644
--- a/configs/CMPCPRO_defconfig
+++ b/configs/CMPCPRO_defconfig
@@ -101,6 +101,7 @@
CONFIG_LCRR_EADC_1=y
CONFIG_LCRR_CLKDIV_2=y
CONFIG_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x10000000
CONFIG_BOOTDELAY=5
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_FLUSH_STDIN=y
@@ -124,7 +125,6 @@
# CONFIG_BOOTM_PLAN9 is not set
# CONFIG_BOOTM_RTEMS is not set
# CONFIG_BOOTM_VXWORKS is not set
-CONFIG_SYS_BOOTM_LEN=0x10000000
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_GO is not set
# CONFIG_CMD_IMI is not set
diff --git a/configs/M5208EVBE_defconfig b/configs/M5208EVBE_defconfig
index aa054f7..ed14662 100644
--- a/configs/M5208EVBE_defconfig
+++ b/configs/M5208EVBE_defconfig
@@ -9,13 +9,13 @@
CONFIG_ENV_ADDR=0x2000
CONFIG_TARGET_M5208EVBE=y
CONFIG_SYS_MONITOR_BASE=0x00000400
+CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_BOOTDELAY=1
+CONFIG_SYS_PBSIZE=276
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_MALLOC_BOOTPARAMS=y
# CONFIG_CMDLINE_EDITING is not set
# CONFIG_AUTO_COMPLETE is not set
-CONFIG_SYS_PBSIZE=276
-CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_CMD_IMLS=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
@@ -39,6 +39,7 @@
CONFIG_SYS_RX_ETH_BUFFER=8
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_FSL=y
+CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y
diff --git a/configs/M5235EVB_Flash32_defconfig b/configs/M5235EVB_Flash32_defconfig
index 5fee415..45e0460 100644
--- a/configs/M5235EVB_Flash32_defconfig
+++ b/configs/M5235EVB_Flash32_defconfig
@@ -10,13 +10,13 @@
CONFIG_TARGET_M5235EVB=y
CONFIG_NORFLASH_PS32BIT=y
CONFIG_SYS_MONITOR_BASE=0xFFC00400
+CONFIG_SYS_BOOTM_LEN=0x1000000
CONFIG_BOOTDELAY=1
+CONFIG_SYS_PBSIZE=276
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_MALLOC_BOOTPARAMS=y
# CONFIG_CMDLINE_EDITING is not set
# CONFIG_AUTO_COMPLETE is not set
-CONFIG_SYS_PBSIZE=276
-CONFIG_SYS_BOOTM_LEN=0x1000000
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
# CONFIG_CMD_LOADB is not set
@@ -47,6 +47,7 @@
CONFIG_SYS_RX_ETH_BUFFER=8
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_FSL=y
+CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_CFI_WIDTH_32BIT=y
diff --git a/configs/M5235EVB_defconfig b/configs/M5235EVB_defconfig
index 7b06964..719a435 100644
--- a/configs/M5235EVB_defconfig
+++ b/configs/M5235EVB_defconfig
@@ -9,13 +9,13 @@
CONFIG_ENV_ADDR=0xFFE04000
CONFIG_TARGET_M5235EVB=y
CONFIG_SYS_MONITOR_BASE=0xFFE00400
+CONFIG_SYS_BOOTM_LEN=0x1000000
CONFIG_BOOTDELAY=1
+CONFIG_SYS_PBSIZE=276
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_MALLOC_BOOTPARAMS=y
# CONFIG_CMDLINE_EDITING is not set
# CONFIG_AUTO_COMPLETE is not set
-CONFIG_SYS_PBSIZE=276
-CONFIG_SYS_BOOTM_LEN=0x1000000
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
# CONFIG_CMD_LOADB is not set
@@ -46,6 +46,7 @@
CONFIG_SYS_RX_ETH_BUFFER=8
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_FSL=y
+CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y
diff --git a/configs/M5249EVB_defconfig b/configs/M5249EVB_defconfig
index 32e0534..eac85b9 100644
--- a/configs/M5249EVB_defconfig
+++ b/configs/M5249EVB_defconfig
@@ -10,12 +10,12 @@
CONFIG_TARGET_M5249EVB=y
CONFIG_SYS_MONITOR_BASE=0xFFE00400
# CONFIG_AUTOBOOT is not set
+CONFIG_SYS_PBSIZE=276
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_SYS_DEVICE_NULLDEV=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_MALLOC_BOOTPARAMS=y
# CONFIG_CMDLINE_EDITING is not set
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y
CONFIG_LOOPW=y
CONFIG_CMD_MX_CYCLIC=y
@@ -23,6 +23,7 @@
CONFIG_CMD_CACHE=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
# CONFIG_NET is not set
+CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y
diff --git a/configs/M5253DEMO_defconfig b/configs/M5253DEMO_defconfig
index 9870230..14a3d9d 100644
--- a/configs/M5253DEMO_defconfig
+++ b/configs/M5253DEMO_defconfig
@@ -9,13 +9,13 @@
CONFIG_ENV_ADDR=0xFF804000
CONFIG_TARGET_M5253DEMO=y
CONFIG_SYS_MONITOR_BASE=0xFF800400
+CONFIG_SYS_BOOTM_LEN=0x1000000
CONFIG_BOOTDELAY=5
+CONFIG_SYS_PBSIZE=276
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_MALLOC_BOOTPARAMS=y
# CONFIG_CMDLINE_EDITING is not set
# CONFIG_AUTO_COMPLETE is not set
-CONFIG_SYS_PBSIZE=276
-CONFIG_SYS_BOOTM_LEN=0x1000000
CONFIG_CMD_IMLS=y
CONFIG_CMD_IDE=y
# CONFIG_CMD_SETEXPR is not set
@@ -39,6 +39,7 @@
CONFIG_IDE_RESET=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_FSL=y
+CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_SYS_MAX_FLASH_SECT=2048
CONFIG_USE_SYS_MAX_FLASH_BANKS=y
diff --git a/configs/M5272C3_defconfig b/configs/M5272C3_defconfig
index 70d87fa..ccb756e 100644
--- a/configs/M5272C3_defconfig
+++ b/configs/M5272C3_defconfig
@@ -10,11 +10,11 @@
CONFIG_TARGET_M5272C3=y
CONFIG_SYS_MONITOR_BASE=0xFFE00400
CONFIG_BOOTDELAY=5
+CONFIG_SYS_PBSIZE=276
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_MALLOC_BOOTPARAMS=y
# CONFIG_CMDLINE_EDITING is not set
# CONFIG_AUTO_COMPLETE is not set
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
@@ -61,6 +61,7 @@
CONFIG_SYS_BR7_PRELIM_BOOL=y
CONFIG_SYS_BR7_PRELIM=0x701
CONFIG_SYS_OR7_PRELIM=0xFFC0007C
+CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y
diff --git a/configs/M5275EVB_defconfig b/configs/M5275EVB_defconfig
index 5fff6d7..4400075 100644
--- a/configs/M5275EVB_defconfig
+++ b/configs/M5275EVB_defconfig
@@ -9,15 +9,15 @@
CONFIG_ENV_ADDR=0xFFE04000
CONFIG_TARGET_M5275EVB=y
CONFIG_SYS_MONITOR_BASE=0xFFE00400
+CONFIG_SYS_BOOTM_LEN=0x1000000
CONFIG_BOOTDELAY=5
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="bootm ffe40000"
+CONFIG_SYS_PBSIZE=276
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_MALLOC_BOOTPARAMS=y
# CONFIG_CMDLINE_EDITING is not set
# CONFIG_AUTO_COMPLETE is not set
-CONFIG_SYS_PBSIZE=276
-CONFIG_SYS_BOOTM_LEN=0x1000000
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
# CONFIG_CMD_LOADB is not set
@@ -35,6 +35,7 @@
CONFIG_SYS_RX_ETH_BUFFER=8
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_FSL=y
+CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_FLASH_SHOW_PROGRESS=0
diff --git a/configs/M5282EVB_defconfig b/configs/M5282EVB_defconfig
index 6b309a0..2786c67 100644
--- a/configs/M5282EVB_defconfig
+++ b/configs/M5282EVB_defconfig
@@ -10,11 +10,11 @@
CONFIG_TARGET_M5282EVB=y
CONFIG_SYS_MONITOR_BASE=0xFFE00400
CONFIG_BOOTDELAY=5
+CONFIG_SYS_PBSIZE=276
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_MALLOC_BOOTPARAMS=y
# CONFIG_CMDLINE_EDITING is not set
# CONFIG_AUTO_COMPLETE is not set
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
@@ -37,6 +37,7 @@
CONFIG_USE_SERVERIP=y
CONFIG_SERVERIP="192.162.1.1"
CONFIG_SYS_RX_ETH_BUFFER=8
+CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y
diff --git a/configs/M53017EVB_defconfig b/configs/M53017EVB_defconfig
index 445f648..f0a7b1c 100644
--- a/configs/M53017EVB_defconfig
+++ b/configs/M53017EVB_defconfig
@@ -9,15 +9,15 @@
CONFIG_ENV_ADDR=0x40000
CONFIG_TARGET_M53017EVB=y
CONFIG_SYS_MONITOR_BASE=0x00000400
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_BOOTDELAY=1
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="root=/dev/mtdblock3 rw rootfstype=jffs2"
+CONFIG_SYS_PBSIZE=276
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_MALLOC_BOOTPARAMS=y
# CONFIG_CMDLINE_EDITING is not set
# CONFIG_AUTO_COMPLETE is not set
-CONFIG_SYS_PBSIZE=276
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_IMLS=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_MII=y
@@ -40,6 +40,7 @@
CONFIG_SYS_RX_ETH_BUFFER=8
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_FSL=y
+CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y
diff --git a/configs/M5329AFEE_defconfig b/configs/M5329AFEE_defconfig
index c9be923..bbb5a23 100644
--- a/configs/M5329AFEE_defconfig
+++ b/configs/M5329AFEE_defconfig
@@ -9,13 +9,13 @@
CONFIG_ENV_ADDR=0x4000
CONFIG_TARGET_M5329EVB=y
CONFIG_SYS_MONITOR_BASE=0x00000400
+CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_BOOTDELAY=1
+CONFIG_SYS_PBSIZE=276
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_MALLOC_BOOTPARAMS=y
# CONFIG_CMDLINE_EDITING is not set
# CONFIG_AUTO_COMPLETE is not set
-CONFIG_SYS_PBSIZE=276
-CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
# CONFIG_CMD_SETEXPR is not set
diff --git a/configs/M5329BFEE_defconfig b/configs/M5329BFEE_defconfig
index a491ca9..ff8522b 100644
--- a/configs/M5329BFEE_defconfig
+++ b/configs/M5329BFEE_defconfig
@@ -9,13 +9,13 @@
CONFIG_ENV_ADDR=0x4000
CONFIG_TARGET_M5329EVB=y
CONFIG_SYS_MONITOR_BASE=0x00000400
+CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_BOOTDELAY=1
+CONFIG_SYS_PBSIZE=276
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_MALLOC_BOOTPARAMS=y
# CONFIG_CMDLINE_EDITING is not set
# CONFIG_AUTO_COMPLETE is not set
-CONFIG_SYS_PBSIZE=276
-CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_NAND=y
diff --git a/configs/M5373EVB_defconfig b/configs/M5373EVB_defconfig
index 7ce219d..981542f 100644
--- a/configs/M5373EVB_defconfig
+++ b/configs/M5373EVB_defconfig
@@ -9,13 +9,13 @@
CONFIG_ENV_ADDR=0x4000
CONFIG_TARGET_M5373EVB=y
CONFIG_SYS_MONITOR_BASE=0x00000400
+CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_BOOTDELAY=1
+CONFIG_SYS_PBSIZE=276
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_MALLOC_BOOTPARAMS=y
# CONFIG_CMDLINE_EDITING is not set
# CONFIG_AUTO_COMPLETE is not set
-CONFIG_SYS_PBSIZE=276
-CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_CMD_NAND=y
diff --git a/configs/MCR3000_defconfig b/configs/MCR3000_defconfig
index 2061eda..8a88fb4 100644
--- a/configs/MCR3000_defconfig
+++ b/configs/MCR3000_defconfig
@@ -21,6 +21,7 @@
CONFIG_SYS_DER=0x2002000F
CONFIG_SYS_MONITOR_BASE=0x04000000
CONFIG_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_BOOTDELAY=5
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_FLUSH_STDIN=y
@@ -31,15 +32,14 @@
CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run flashboot"
+CONFIG_SYS_PBSIZE=278
# CONFIG_HWCONFIG is not set
CONFIG_MISC_INIT_R=y
CONFIG_HUSH_PARSER=y
# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="S3K> "
-CONFIG_SYS_PBSIZE=278
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
-CONFIG_SYS_BOOTM_LEN=0x2000000
# CONFIG_CMD_IMI is not set
CONFIG_CMD_ASKENV=y
# CONFIG_CMD_LOADB is not set
diff --git a/configs/MPC837XERDB_defconfig b/configs/MPC837XERDB_defconfig
index 33f0bab..9eac43a 100644
--- a/configs/MPC837XERDB_defconfig
+++ b/configs/MPC837XERDB_defconfig
@@ -122,11 +122,11 @@
CONFIG_BOOTDELAY=6
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_SYS_PBSIZE=276
CONFIG_BOARD_LATE_INIT=y
CONFIG_MISC_INIT_R=y
CONFIG_PCI_INIT_R=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
CONFIG_LOADS_ECHO=y
@@ -170,6 +170,7 @@
CONFIG_SYS_I2C_SPEED=400000
CONFIG_FSL_ESDHC=y
CONFIG_FSL_ESDHC_PIN_MUX=y
+CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_FLASH_SHOW_PROGRESS=0
diff --git a/configs/MPC8548CDS_36BIT_defconfig b/configs/MPC8548CDS_36BIT_defconfig
index 4d3d691..8670712 100644
--- a/configs/MPC8548CDS_36BIT_defconfig
+++ b/configs/MPC8548CDS_36BIT_defconfig
@@ -26,11 +26,11 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/nfs rw nfsroot=$serverip:$rootpath ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off console=$consoledev,$baudrate $othbootargs;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr - $fdtaddr"
+CONFIG_SYS_PBSIZE=276
# CONFIG_MISC_INIT_R is not set
CONFIG_ID_EEPROM=y
CONFIG_SYS_I2C_EEPROM_CCID=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y
CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
CONFIG_CMD_I2C=y
@@ -80,6 +80,7 @@
CONFIG_SYS_I2C_FSL=y
CONFIG_SYS_I2C_EEPROM_ADDR=0x57
# CONFIG_MMC is not set
+CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_FLASH_SHOW_PROGRESS=0
diff --git a/configs/MPC8548CDS_defconfig b/configs/MPC8548CDS_defconfig
index b7f7e7b..e10e61a 100644
--- a/configs/MPC8548CDS_defconfig
+++ b/configs/MPC8548CDS_defconfig
@@ -25,11 +25,11 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/nfs rw nfsroot=$serverip:$rootpath ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off console=$consoledev,$baudrate $othbootargs;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr - $fdtaddr"
+CONFIG_SYS_PBSIZE=276
# CONFIG_MISC_INIT_R is not set
CONFIG_ID_EEPROM=y
CONFIG_SYS_I2C_EEPROM_CCID=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y
CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
CONFIG_CMD_I2C=y
@@ -79,6 +79,7 @@
CONFIG_SYS_I2C_FSL=y
CONFIG_SYS_I2C_EEPROM_ADDR=0x57
# CONFIG_MMC is not set
+CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_FLASH_SHOW_PROGRESS=0
diff --git a/configs/MPC8548CDS_legacy_defconfig b/configs/MPC8548CDS_legacy_defconfig
index 9acc8bd..6fcc727 100644
--- a/configs/MPC8548CDS_legacy_defconfig
+++ b/configs/MPC8548CDS_legacy_defconfig
@@ -26,11 +26,11 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/nfs rw nfsroot=$serverip:$rootpath ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off console=$consoledev,$baudrate $othbootargs;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr - $fdtaddr"
+CONFIG_SYS_PBSIZE=276
# CONFIG_MISC_INIT_R is not set
CONFIG_ID_EEPROM=y
CONFIG_SYS_I2C_EEPROM_CCID=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y
CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
CONFIG_CMD_I2C=y
@@ -79,6 +79,7 @@
CONFIG_SYS_I2C_FSL=y
CONFIG_SYS_I2C_EEPROM_ADDR=0x57
# CONFIG_MMC is not set
+CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_FLASH_SHOW_PROGRESS=0
diff --git a/configs/P1010RDB-PA_36BIT_NAND_defconfig b/configs/P1010RDB-PA_36BIT_NAND_defconfig
index 37a1398..9587975 100644
--- a/configs/P1010RDB-PA_36BIT_NAND_defconfig
+++ b/configs/P1010RDB-PA_36BIT_NAND_defconfig
@@ -34,6 +34,7 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs ramdisk_size=$ramdisk_size;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr"
+CONFIG_SYS_PBSIZE=276
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
@@ -59,7 +60,6 @@
CONFIG_TPL_MPC8XXX_INIT_DDR=y
CONFIG_TPL_NAND_SUPPORT=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
diff --git a/configs/P1010RDB-PA_36BIT_NOR_defconfig b/configs/P1010RDB-PA_36BIT_NOR_defconfig
index caf1b34..f21d79e 100644
--- a/configs/P1010RDB-PA_36BIT_NOR_defconfig
+++ b/configs/P1010RDB-PA_36BIT_NOR_defconfig
@@ -25,11 +25,11 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs ramdisk_size=$ramdisk_size;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr"
+CONFIG_SYS_PBSIZE=276
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
diff --git a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig
index cc998a8..e703424 100644
--- a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig
+++ b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig
@@ -32,6 +32,7 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs ramdisk_size=$ramdisk_size;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr"
+CONFIG_SYS_PBSIZE=276
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
@@ -50,7 +51,6 @@
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
diff --git a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig
index bb263ab..374879e 100644
--- a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig
+++ b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig
@@ -34,6 +34,7 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs ramdisk_size=$ramdisk_size;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr"
+CONFIG_SYS_PBSIZE=276
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
@@ -52,7 +53,6 @@
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
diff --git a/configs/P1010RDB-PA_NAND_defconfig b/configs/P1010RDB-PA_NAND_defconfig
index 960229c..cd0117b 100644
--- a/configs/P1010RDB-PA_NAND_defconfig
+++ b/configs/P1010RDB-PA_NAND_defconfig
@@ -33,6 +33,7 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs ramdisk_size=$ramdisk_size;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr"
+CONFIG_SYS_PBSIZE=276
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
@@ -58,7 +59,6 @@
CONFIG_TPL_MPC8XXX_INIT_DDR=y
CONFIG_TPL_NAND_SUPPORT=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
diff --git a/configs/P1010RDB-PA_NOR_defconfig b/configs/P1010RDB-PA_NOR_defconfig
index 78be54e..e1dc334 100644
--- a/configs/P1010RDB-PA_NOR_defconfig
+++ b/configs/P1010RDB-PA_NOR_defconfig
@@ -24,11 +24,11 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs ramdisk_size=$ramdisk_size;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr"
+CONFIG_SYS_PBSIZE=276
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
diff --git a/configs/P1010RDB-PA_SDCARD_defconfig b/configs/P1010RDB-PA_SDCARD_defconfig
index c664a99..af0fe29 100644
--- a/configs/P1010RDB-PA_SDCARD_defconfig
+++ b/configs/P1010RDB-PA_SDCARD_defconfig
@@ -31,6 +31,7 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs ramdisk_size=$ramdisk_size;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr"
+CONFIG_SYS_PBSIZE=276
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
@@ -49,7 +50,6 @@
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
diff --git a/configs/P1010RDB-PA_SPIFLASH_defconfig b/configs/P1010RDB-PA_SPIFLASH_defconfig
index 2ffba7d..8ed9d1a 100644
--- a/configs/P1010RDB-PA_SPIFLASH_defconfig
+++ b/configs/P1010RDB-PA_SPIFLASH_defconfig
@@ -33,6 +33,7 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs ramdisk_size=$ramdisk_size;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr"
+CONFIG_SYS_PBSIZE=276
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
@@ -51,7 +52,6 @@
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
diff --git a/configs/P1010RDB-PB_36BIT_NAND_defconfig b/configs/P1010RDB-PB_36BIT_NAND_defconfig
index b9790cd..004ec92 100644
--- a/configs/P1010RDB-PB_36BIT_NAND_defconfig
+++ b/configs/P1010RDB-PB_36BIT_NAND_defconfig
@@ -34,6 +34,7 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs ramdisk_size=$ramdisk_size;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr"
+CONFIG_SYS_PBSIZE=276
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
@@ -60,7 +61,6 @@
CONFIG_TPL_MPC8XXX_INIT_DDR=y
CONFIG_TPL_NAND_SUPPORT=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
diff --git a/configs/P1010RDB-PB_36BIT_NOR_defconfig b/configs/P1010RDB-PB_36BIT_NOR_defconfig
index a76c91b..6237f63 100644
--- a/configs/P1010RDB-PB_36BIT_NOR_defconfig
+++ b/configs/P1010RDB-PB_36BIT_NOR_defconfig
@@ -25,12 +25,12 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs ramdisk_size=$ramdisk_size;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr"
+CONFIG_SYS_PBSIZE=276
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
diff --git a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig
index b6504a5..635045f 100644
--- a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig
+++ b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig
@@ -32,6 +32,7 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs ramdisk_size=$ramdisk_size;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr"
+CONFIG_SYS_PBSIZE=276
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
@@ -51,7 +52,6 @@
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
diff --git a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig
index 14bfd97..4b7c8d2 100644
--- a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig
+++ b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig
@@ -34,6 +34,7 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs ramdisk_size=$ramdisk_size;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr"
+CONFIG_SYS_PBSIZE=276
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
@@ -53,7 +54,6 @@
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
diff --git a/configs/P1010RDB-PB_NAND_defconfig b/configs/P1010RDB-PB_NAND_defconfig
index 589fd5d..3b29f1d 100644
--- a/configs/P1010RDB-PB_NAND_defconfig
+++ b/configs/P1010RDB-PB_NAND_defconfig
@@ -33,6 +33,7 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs ramdisk_size=$ramdisk_size;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr"
+CONFIG_SYS_PBSIZE=276
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
@@ -59,7 +60,6 @@
CONFIG_TPL_MPC8XXX_INIT_DDR=y
CONFIG_TPL_NAND_SUPPORT=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
diff --git a/configs/P1010RDB-PB_NOR_defconfig b/configs/P1010RDB-PB_NOR_defconfig
index d96b8fc..dc18115 100644
--- a/configs/P1010RDB-PB_NOR_defconfig
+++ b/configs/P1010RDB-PB_NOR_defconfig
@@ -24,12 +24,12 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs ramdisk_size=$ramdisk_size;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr"
+CONFIG_SYS_PBSIZE=276
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
diff --git a/configs/P1010RDB-PB_SDCARD_defconfig b/configs/P1010RDB-PB_SDCARD_defconfig
index c08089a..f12469d 100644
--- a/configs/P1010RDB-PB_SDCARD_defconfig
+++ b/configs/P1010RDB-PB_SDCARD_defconfig
@@ -31,6 +31,7 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs ramdisk_size=$ramdisk_size;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr"
+CONFIG_SYS_PBSIZE=276
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
@@ -50,7 +51,6 @@
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
diff --git a/configs/P1010RDB-PB_SPIFLASH_defconfig b/configs/P1010RDB-PB_SPIFLASH_defconfig
index 8d5b13b..8c377d3 100644
--- a/configs/P1010RDB-PB_SPIFLASH_defconfig
+++ b/configs/P1010RDB-PB_SPIFLASH_defconfig
@@ -33,6 +33,7 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs ramdisk_size=$ramdisk_size;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr"
+CONFIG_SYS_PBSIZE=276
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
@@ -52,7 +53,6 @@
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
diff --git a/configs/P1020RDB-PC_36BIT_NAND_defconfig b/configs/P1020RDB-PC_36BIT_NAND_defconfig
index bb459cd..36ef896 100644
--- a/configs/P1020RDB-PC_36BIT_NAND_defconfig
+++ b/configs/P1020RDB-PC_36BIT_NAND_defconfig
@@ -35,6 +35,7 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr"
+CONFIG_SYS_PBSIZE=276
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_MISC_INIT_R is not set
@@ -60,7 +61,6 @@
CONFIG_TPL_NAND_SUPPORT=y
CONFIG_HUSH_PARSER=y
# CONFIG_AUTO_COMPLETE is not set
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
diff --git a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig
index 55046af..b23add9 100644
--- a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig
+++ b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig
@@ -34,6 +34,7 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr"
+CONFIG_SYS_PBSIZE=276
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_MISC_INIT_R is not set
@@ -52,7 +53,6 @@
CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_HUSH_PARSER=y
# CONFIG_AUTO_COMPLETE is not set
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
diff --git a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
index 2b24877..98a48ef 100644
--- a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
+++ b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
@@ -36,6 +36,7 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr"
+CONFIG_SYS_PBSIZE=276
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_MISC_INIT_R is not set
@@ -54,7 +55,6 @@
CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_HUSH_PARSER=y
# CONFIG_AUTO_COMPLETE is not set
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
diff --git a/configs/P1020RDB-PC_36BIT_defconfig b/configs/P1020RDB-PC_36BIT_defconfig
index 9f5e46c..0391d36 100644
--- a/configs/P1020RDB-PC_36BIT_defconfig
+++ b/configs/P1020RDB-PC_36BIT_defconfig
@@ -27,12 +27,12 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr"
+CONFIG_SYS_PBSIZE=276
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_MISC_INIT_R is not set
CONFIG_HUSH_PARSER=y
# CONFIG_AUTO_COMPLETE is not set
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
diff --git a/configs/P1020RDB-PC_NAND_defconfig b/configs/P1020RDB-PC_NAND_defconfig
index e38cd0a..6f19aac 100644
--- a/configs/P1020RDB-PC_NAND_defconfig
+++ b/configs/P1020RDB-PC_NAND_defconfig
@@ -34,6 +34,7 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr"
+CONFIG_SYS_PBSIZE=276
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_MISC_INIT_R is not set
@@ -59,7 +60,6 @@
CONFIG_TPL_NAND_SUPPORT=y
CONFIG_HUSH_PARSER=y
# CONFIG_AUTO_COMPLETE is not set
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
diff --git a/configs/P1020RDB-PC_SDCARD_defconfig b/configs/P1020RDB-PC_SDCARD_defconfig
index 95df450..f439e56 100644
--- a/configs/P1020RDB-PC_SDCARD_defconfig
+++ b/configs/P1020RDB-PC_SDCARD_defconfig
@@ -33,6 +33,7 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr"
+CONFIG_SYS_PBSIZE=276
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_MISC_INIT_R is not set
@@ -51,7 +52,6 @@
CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_HUSH_PARSER=y
# CONFIG_AUTO_COMPLETE is not set
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
diff --git a/configs/P1020RDB-PC_SPIFLASH_defconfig b/configs/P1020RDB-PC_SPIFLASH_defconfig
index b519d6c..43aba38 100644
--- a/configs/P1020RDB-PC_SPIFLASH_defconfig
+++ b/configs/P1020RDB-PC_SPIFLASH_defconfig
@@ -35,6 +35,7 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr"
+CONFIG_SYS_PBSIZE=276
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_MISC_INIT_R is not set
@@ -53,7 +54,6 @@
CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_HUSH_PARSER=y
# CONFIG_AUTO_COMPLETE is not set
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
diff --git a/configs/P1020RDB-PC_defconfig b/configs/P1020RDB-PC_defconfig
index fd42057..6b7e2b5 100644
--- a/configs/P1020RDB-PC_defconfig
+++ b/configs/P1020RDB-PC_defconfig
@@ -26,12 +26,12 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr"
+CONFIG_SYS_PBSIZE=276
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_MISC_INIT_R is not set
CONFIG_HUSH_PARSER=y
# CONFIG_AUTO_COMPLETE is not set
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
diff --git a/configs/P1020RDB-PD_NAND_defconfig b/configs/P1020RDB-PD_NAND_defconfig
index c049927..7dd0048 100644
--- a/configs/P1020RDB-PD_NAND_defconfig
+++ b/configs/P1020RDB-PD_NAND_defconfig
@@ -34,6 +34,7 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr"
+CONFIG_SYS_PBSIZE=276
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_MISC_INIT_R is not set
@@ -59,7 +60,6 @@
CONFIG_TPL_NAND_SUPPORT=y
CONFIG_HUSH_PARSER=y
# CONFIG_AUTO_COMPLETE is not set
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
diff --git a/configs/P1020RDB-PD_SDCARD_defconfig b/configs/P1020RDB-PD_SDCARD_defconfig
index e833bb2..e7daa79 100644
--- a/configs/P1020RDB-PD_SDCARD_defconfig
+++ b/configs/P1020RDB-PD_SDCARD_defconfig
@@ -33,6 +33,7 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr"
+CONFIG_SYS_PBSIZE=276
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_MISC_INIT_R is not set
@@ -51,7 +52,6 @@
CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_HUSH_PARSER=y
# CONFIG_AUTO_COMPLETE is not set
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
diff --git a/configs/P1020RDB-PD_SPIFLASH_defconfig b/configs/P1020RDB-PD_SPIFLASH_defconfig
index 4e7c605..08d0951 100644
--- a/configs/P1020RDB-PD_SPIFLASH_defconfig
+++ b/configs/P1020RDB-PD_SPIFLASH_defconfig
@@ -35,6 +35,7 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr"
+CONFIG_SYS_PBSIZE=276
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_MISC_INIT_R is not set
@@ -53,7 +54,6 @@
CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_HUSH_PARSER=y
# CONFIG_AUTO_COMPLETE is not set
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
diff --git a/configs/P1020RDB-PD_defconfig b/configs/P1020RDB-PD_defconfig
index e3435da..f262fa7 100644
--- a/configs/P1020RDB-PD_defconfig
+++ b/configs/P1020RDB-PD_defconfig
@@ -26,12 +26,12 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr"
+CONFIG_SYS_PBSIZE=276
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_MISC_INIT_R is not set
CONFIG_HUSH_PARSER=y
# CONFIG_AUTO_COMPLETE is not set
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
diff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig b/configs/P2020RDB-PC_36BIT_NAND_defconfig
index ea17afb..d7fcab1 100644
--- a/configs/P2020RDB-PC_36BIT_NAND_defconfig
+++ b/configs/P2020RDB-PC_36BIT_NAND_defconfig
@@ -35,6 +35,7 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr"
+CONFIG_SYS_PBSIZE=276
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_MISC_INIT_R is not set
@@ -60,7 +61,6 @@
CONFIG_TPL_NAND_SUPPORT=y
CONFIG_HUSH_PARSER=y
# CONFIG_AUTO_COMPLETE is not set
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
diff --git a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
index 476b3d4..22243cc 100644
--- a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
+++ b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
@@ -34,6 +34,7 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr"
+CONFIG_SYS_PBSIZE=276
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_MISC_INIT_R is not set
@@ -52,7 +53,6 @@
CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_HUSH_PARSER=y
# CONFIG_AUTO_COMPLETE is not set
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
diff --git a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
index 8a31de0..d2bd375 100644
--- a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
+++ b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
@@ -36,6 +36,7 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr"
+CONFIG_SYS_PBSIZE=276
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_MISC_INIT_R is not set
@@ -54,7 +55,6 @@
CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_HUSH_PARSER=y
# CONFIG_AUTO_COMPLETE is not set
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
diff --git a/configs/P2020RDB-PC_36BIT_defconfig b/configs/P2020RDB-PC_36BIT_defconfig
index 93d22fb..8c0ce04 100644
--- a/configs/P2020RDB-PC_36BIT_defconfig
+++ b/configs/P2020RDB-PC_36BIT_defconfig
@@ -27,12 +27,12 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr"
+CONFIG_SYS_PBSIZE=276
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_MISC_INIT_R is not set
CONFIG_HUSH_PARSER=y
# CONFIG_AUTO_COMPLETE is not set
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
diff --git a/configs/P2020RDB-PC_NAND_defconfig b/configs/P2020RDB-PC_NAND_defconfig
index 46d60f3..b8543d9 100644
--- a/configs/P2020RDB-PC_NAND_defconfig
+++ b/configs/P2020RDB-PC_NAND_defconfig
@@ -34,6 +34,7 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr"
+CONFIG_SYS_PBSIZE=276
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_MISC_INIT_R is not set
@@ -59,7 +60,6 @@
CONFIG_TPL_NAND_SUPPORT=y
CONFIG_HUSH_PARSER=y
# CONFIG_AUTO_COMPLETE is not set
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
diff --git a/configs/P2020RDB-PC_SDCARD_defconfig b/configs/P2020RDB-PC_SDCARD_defconfig
index 6076b54..a62ecfe 100644
--- a/configs/P2020RDB-PC_SDCARD_defconfig
+++ b/configs/P2020RDB-PC_SDCARD_defconfig
@@ -33,6 +33,7 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr"
+CONFIG_SYS_PBSIZE=276
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_MISC_INIT_R is not set
@@ -51,7 +52,6 @@
CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_HUSH_PARSER=y
# CONFIG_AUTO_COMPLETE is not set
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
diff --git a/configs/P2020RDB-PC_SPIFLASH_defconfig b/configs/P2020RDB-PC_SPIFLASH_defconfig
index 46e8d1e..9e6e43d 100644
--- a/configs/P2020RDB-PC_SPIFLASH_defconfig
+++ b/configs/P2020RDB-PC_SPIFLASH_defconfig
@@ -35,6 +35,7 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr"
+CONFIG_SYS_PBSIZE=276
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_MISC_INIT_R is not set
@@ -53,7 +54,6 @@
CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_HUSH_PARSER=y
# CONFIG_AUTO_COMPLETE is not set
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
diff --git a/configs/P2020RDB-PC_defconfig b/configs/P2020RDB-PC_defconfig
index 5eaf70b..4928886 100644
--- a/configs/P2020RDB-PC_defconfig
+++ b/configs/P2020RDB-PC_defconfig
@@ -26,12 +26,12 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr"
+CONFIG_SYS_PBSIZE=276
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_MISC_INIT_R is not set
CONFIG_HUSH_PARSER=y
# CONFIG_AUTO_COMPLETE is not set
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
diff --git a/configs/P2041RDB_NAND_defconfig b/configs/P2041RDB_NAND_defconfig
index 786c826..4dde055 100644
--- a/configs/P2041RDB_NAND_defconfig
+++ b/configs/P2041RDB_NAND_defconfig
@@ -34,12 +34,12 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw console=$consoledev,$baudrate $othbootargs;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr - $fdtaddr"
+CONFIG_SYS_PBSIZE=276
CONFIG_ARCH_MISC_INIT=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
diff --git a/configs/P2041RDB_SDCARD_defconfig b/configs/P2041RDB_SDCARD_defconfig
index 7aa2634..9a4c72b 100644
--- a/configs/P2041RDB_SDCARD_defconfig
+++ b/configs/P2041RDB_SDCARD_defconfig
@@ -34,12 +34,12 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw console=$consoledev,$baudrate $othbootargs;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr - $fdtaddr"
+CONFIG_SYS_PBSIZE=276
CONFIG_ARCH_MISC_INIT=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
diff --git a/configs/P2041RDB_SPIFLASH_defconfig b/configs/P2041RDB_SPIFLASH_defconfig
index 6862875..f0d792b 100644
--- a/configs/P2041RDB_SPIFLASH_defconfig
+++ b/configs/P2041RDB_SPIFLASH_defconfig
@@ -36,12 +36,12 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw console=$consoledev,$baudrate $othbootargs;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr - $fdtaddr"
+CONFIG_SYS_PBSIZE=276
CONFIG_ARCH_MISC_INIT=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
diff --git a/configs/P2041RDB_defconfig b/configs/P2041RDB_defconfig
index 4ea2b47..2633425 100644
--- a/configs/P2041RDB_defconfig
+++ b/configs/P2041RDB_defconfig
@@ -32,12 +32,12 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw console=$consoledev,$baudrate $othbootargs;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr - $fdtaddr"
+CONFIG_SYS_PBSIZE=276
CONFIG_ARCH_MISC_INIT=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
diff --git a/configs/SBx81LIFKW_defconfig b/configs/SBx81LIFKW_defconfig
index d48524a..6a2d8fb 100644
--- a/configs/SBx81LIFKW_defconfig
+++ b/configs/SBx81LIFKW_defconfig
@@ -17,13 +17,13 @@
CONFIG_SYS_LOAD_ADDR=0x1000000
# CONFIG_SYS_MALLOC_F is not set
CONFIG_BOOTDELAY=3
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
CONFIG_SILENT_CONSOLE=y
CONFIG_SILENT_U_BOOT_ONLY=y
CONFIG_MISC_INIT_R=y
CONFIG_RESET_PHY_R=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_DM=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
diff --git a/configs/SBx81LIFXCAT_defconfig b/configs/SBx81LIFXCAT_defconfig
index 0ca53c7..b5c94b3 100644
--- a/configs/SBx81LIFXCAT_defconfig
+++ b/configs/SBx81LIFXCAT_defconfig
@@ -17,13 +17,13 @@
CONFIG_SYS_LOAD_ADDR=0x1000000
# CONFIG_SYS_MALLOC_F is not set
CONFIG_BOOTDELAY=3
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
CONFIG_SILENT_CONSOLE=y
CONFIG_SILENT_U_BOOT_ONLY=y
CONFIG_MISC_INIT_R=y
CONFIG_RESET_PHY_R=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_DM=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
diff --git a/configs/T1024RDB_NAND_defconfig b/configs/T1024RDB_NAND_defconfig
index 7c1345b..b2413a0 100644
--- a/configs/T1024RDB_NAND_defconfig
+++ b/configs/T1024RDB_NAND_defconfig
@@ -37,6 +37,7 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs;setenv ramdiskaddr 0x02000000;setenv fdtaddr 0x00c00000;setenv loadaddr 0x1000000;bootm $loadaddr $ramdiskaddr $fdtaddr"
+CONFIG_SYS_PBSIZE=276
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_ARCH_MISC_INIT=y
@@ -61,7 +62,6 @@
CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
diff --git a/configs/T1024RDB_SDCARD_defconfig b/configs/T1024RDB_SDCARD_defconfig
index cb398f7..2eb320a 100644
--- a/configs/T1024RDB_SDCARD_defconfig
+++ b/configs/T1024RDB_SDCARD_defconfig
@@ -37,6 +37,7 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs;setenv ramdiskaddr 0x02000000;setenv fdtaddr 0x00c00000;setenv loadaddr 0x1000000;bootm $loadaddr $ramdiskaddr $fdtaddr"
+CONFIG_SYS_PBSIZE=276
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_ARCH_MISC_INIT=y
@@ -60,7 +61,6 @@
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
diff --git a/configs/T1024RDB_SPIFLASH_defconfig b/configs/T1024RDB_SPIFLASH_defconfig
index 464b36b..7ca78ce 100644
--- a/configs/T1024RDB_SPIFLASH_defconfig
+++ b/configs/T1024RDB_SPIFLASH_defconfig
@@ -40,6 +40,7 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs;setenv ramdiskaddr 0x02000000;setenv fdtaddr 0x00c00000;setenv loadaddr 0x1000000;bootm $loadaddr $ramdiskaddr $fdtaddr"
+CONFIG_SYS_PBSIZE=276
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_ARCH_MISC_INIT=y
@@ -63,7 +64,6 @@
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
diff --git a/configs/T1024RDB_defconfig b/configs/T1024RDB_defconfig
index f632684..4be8322 100644
--- a/configs/T1024RDB_defconfig
+++ b/configs/T1024RDB_defconfig
@@ -28,6 +28,7 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs;setenv ramdiskaddr 0x02000000;setenv fdtaddr 0x00c00000;setenv loadaddr 0x1000000;bootm $loadaddr $ramdiskaddr $fdtaddr"
+CONFIG_SYS_PBSIZE=276
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_ARCH_MISC_INIT=y
@@ -35,7 +36,6 @@
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
diff --git a/configs/T1042D4RDB_NAND_defconfig b/configs/T1042D4RDB_NAND_defconfig
index a44c768..f8fabab 100644
--- a/configs/T1042D4RDB_NAND_defconfig
+++ b/configs/T1042D4RDB_NAND_defconfig
@@ -36,6 +36,7 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs;setenv ramdiskaddr 0x02000000;setenv fdtaddr 0x00c00000;setenv loadaddr 0x1000000;bootm $loadaddr $ramdiskaddr $fdtaddr"
+CONFIG_SYS_PBSIZE=276
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_ARCH_MISC_INIT=y
@@ -59,7 +60,6 @@
CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_DM=y
diff --git a/configs/T1042D4RDB_SDCARD_defconfig b/configs/T1042D4RDB_SDCARD_defconfig
index 800f063..df752ce 100644
--- a/configs/T1042D4RDB_SDCARD_defconfig
+++ b/configs/T1042D4RDB_SDCARD_defconfig
@@ -36,6 +36,7 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs;setenv ramdiskaddr 0x02000000;setenv fdtaddr 0x00c00000;setenv loadaddr 0x1000000;bootm $loadaddr $ramdiskaddr $fdtaddr"
+CONFIG_SYS_PBSIZE=276
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_ARCH_MISC_INIT=y
@@ -58,7 +59,6 @@
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_DM=y
diff --git a/configs/T1042D4RDB_SPIFLASH_defconfig b/configs/T1042D4RDB_SPIFLASH_defconfig
index 3fe25ec..4aff7a0 100644
--- a/configs/T1042D4RDB_SPIFLASH_defconfig
+++ b/configs/T1042D4RDB_SPIFLASH_defconfig
@@ -39,6 +39,7 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs;setenv ramdiskaddr 0x02000000;setenv fdtaddr 0x00c00000;setenv loadaddr 0x1000000;bootm $loadaddr $ramdiskaddr $fdtaddr"
+CONFIG_SYS_PBSIZE=276
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_ARCH_MISC_INIT=y
@@ -61,7 +62,6 @@
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_DM=y
diff --git a/configs/T1042D4RDB_defconfig b/configs/T1042D4RDB_defconfig
index 4ca833c..2e7285c 100644
--- a/configs/T1042D4RDB_defconfig
+++ b/configs/T1042D4RDB_defconfig
@@ -27,13 +27,13 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs;setenv ramdiskaddr 0x02000000;setenv fdtaddr 0x00c00000;setenv loadaddr 0x1000000;bootm $loadaddr $ramdiskaddr $fdtaddr"
+CONFIG_SYS_PBSIZE=276
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_DM=y
diff --git a/configs/T2080QDS_NAND_defconfig b/configs/T2080QDS_NAND_defconfig
index 431c485..232709f 100644
--- a/configs/T2080QDS_NAND_defconfig
+++ b/configs/T2080QDS_NAND_defconfig
@@ -48,6 +48,7 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs;setenv ramdiskaddr 0x02000000;setenv fdtaddr 0x00c00000;setenv loadaddr 0x1000000;bootm $loadaddr $ramdiskaddr $fdtaddr"
+CONFIG_SYS_PBSIZE=276
CONFIG_ARCH_MISC_INIT=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
@@ -68,7 +69,6 @@
CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_I2C=y
diff --git a/configs/T2080QDS_SDCARD_defconfig b/configs/T2080QDS_SDCARD_defconfig
index eb060f4..b131a5d 100644
--- a/configs/T2080QDS_SDCARD_defconfig
+++ b/configs/T2080QDS_SDCARD_defconfig
@@ -48,6 +48,7 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs;setenv ramdiskaddr 0x02000000;setenv fdtaddr 0x00c00000;setenv loadaddr 0x1000000;bootm $loadaddr $ramdiskaddr $fdtaddr"
+CONFIG_SYS_PBSIZE=276
CONFIG_ARCH_MISC_INIT=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
@@ -67,7 +68,6 @@
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_I2C=y
diff --git a/configs/T2080QDS_SECURE_BOOT_defconfig b/configs/T2080QDS_SECURE_BOOT_defconfig
index 64befc5..c1230f7 100644
--- a/configs/T2080QDS_SECURE_BOOT_defconfig
+++ b/configs/T2080QDS_SECURE_BOOT_defconfig
@@ -40,9 +40,9 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs;setenv ramdiskaddr 0x02000000;setenv fdtaddr 0x00c00000;setenv loadaddr 0x1000000;bootm $loadaddr $ramdiskaddr $fdtaddr"
+CONFIG_SYS_PBSIZE=276
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_I2C=y
diff --git a/configs/T2080QDS_SPIFLASH_defconfig b/configs/T2080QDS_SPIFLASH_defconfig
index 5f3997a..d2ec52f 100644
--- a/configs/T2080QDS_SPIFLASH_defconfig
+++ b/configs/T2080QDS_SPIFLASH_defconfig
@@ -51,6 +51,7 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs;setenv ramdiskaddr 0x02000000;setenv fdtaddr 0x00c00000;setenv loadaddr 0x1000000;bootm $loadaddr $ramdiskaddr $fdtaddr"
+CONFIG_SYS_PBSIZE=276
CONFIG_ARCH_MISC_INIT=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
@@ -70,7 +71,6 @@
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_I2C=y
diff --git a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig
index 3b09789..0a6ab6c 100644
--- a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig
+++ b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig
@@ -39,10 +39,10 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs;setenv ramdiskaddr 0x02000000;setenv fdtaddr 0x00c00000;setenv loadaddr 0x1000000;bootm $loadaddr $ramdiskaddr $fdtaddr"
+CONFIG_SYS_PBSIZE=276
CONFIG_ARCH_MISC_INIT=y
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_GREPENV=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_I2C=y
diff --git a/configs/T2080QDS_defconfig b/configs/T2080QDS_defconfig
index c8b0e40..525afa0 100644
--- a/configs/T2080QDS_defconfig
+++ b/configs/T2080QDS_defconfig
@@ -39,10 +39,10 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs;setenv ramdiskaddr 0x02000000;setenv fdtaddr 0x00c00000;setenv loadaddr 0x1000000;bootm $loadaddr $ramdiskaddr $fdtaddr"
+CONFIG_SYS_PBSIZE=276
CONFIG_ARCH_MISC_INIT=y
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_I2C=y
diff --git a/configs/T2080RDB_NAND_defconfig b/configs/T2080RDB_NAND_defconfig
index 89e8b95..1b7458a 100644
--- a/configs/T2080RDB_NAND_defconfig
+++ b/configs/T2080RDB_NAND_defconfig
@@ -42,6 +42,7 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs;setenv ramdiskaddr 0x02000000;setenv fdtaddr 0x00c00000;setenv loadaddr 0x1000000;bootm $loadaddr $ramdiskaddr $fdtaddr"
+CONFIG_SYS_PBSIZE=276
CONFIG_ARCH_MISC_INIT=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
@@ -62,7 +63,6 @@
CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y
CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
CONFIG_CMD_MEMTEST=y
diff --git a/configs/T2080RDB_SDCARD_defconfig b/configs/T2080RDB_SDCARD_defconfig
index 585daeb..3ed51a8 100644
--- a/configs/T2080RDB_SDCARD_defconfig
+++ b/configs/T2080RDB_SDCARD_defconfig
@@ -42,6 +42,7 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs;setenv ramdiskaddr 0x02000000;setenv fdtaddr 0x00c00000;setenv loadaddr 0x1000000;bootm $loadaddr $ramdiskaddr $fdtaddr"
+CONFIG_SYS_PBSIZE=276
CONFIG_ARCH_MISC_INIT=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
@@ -61,7 +62,6 @@
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y
CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
CONFIG_CMD_MEMTEST=y
diff --git a/configs/T2080RDB_SPIFLASH_defconfig b/configs/T2080RDB_SPIFLASH_defconfig
index 6c23831..0ea5567 100644
--- a/configs/T2080RDB_SPIFLASH_defconfig
+++ b/configs/T2080RDB_SPIFLASH_defconfig
@@ -45,6 +45,7 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs;setenv ramdiskaddr 0x02000000;setenv fdtaddr 0x00c00000;setenv loadaddr 0x1000000;bootm $loadaddr $ramdiskaddr $fdtaddr"
+CONFIG_SYS_PBSIZE=276
CONFIG_ARCH_MISC_INIT=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
@@ -64,7 +65,6 @@
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y
CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
CONFIG_CMD_MEMTEST=y
diff --git a/configs/T2080RDB_defconfig b/configs/T2080RDB_defconfig
index 370e8e8..362e661 100644
--- a/configs/T2080RDB_defconfig
+++ b/configs/T2080RDB_defconfig
@@ -33,10 +33,10 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs;setenv ramdiskaddr 0x02000000;setenv fdtaddr 0x00c00000;setenv loadaddr 0x1000000;bootm $loadaddr $ramdiskaddr $fdtaddr"
+CONFIG_SYS_PBSIZE=276
CONFIG_ARCH_MISC_INIT=y
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y
CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
CONFIG_CMD_MEMTEST=y
diff --git a/configs/T2080RDB_revD_NAND_defconfig b/configs/T2080RDB_revD_NAND_defconfig
index fcf9c9f..e205a5e 100644
--- a/configs/T2080RDB_revD_NAND_defconfig
+++ b/configs/T2080RDB_revD_NAND_defconfig
@@ -43,6 +43,7 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs;setenv ramdiskaddr 0x02000000;setenv fdtaddr 0x00c00000;setenv loadaddr 0x1000000;bootm $loadaddr $ramdiskaddr $fdtaddr"
+CONFIG_SYS_PBSIZE=276
CONFIG_ARCH_MISC_INIT=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
@@ -63,7 +64,6 @@
CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y
CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
CONFIG_CMD_MEMTEST=y
diff --git a/configs/T2080RDB_revD_SDCARD_defconfig b/configs/T2080RDB_revD_SDCARD_defconfig
index 530c5d9..2c79ec3 100644
--- a/configs/T2080RDB_revD_SDCARD_defconfig
+++ b/configs/T2080RDB_revD_SDCARD_defconfig
@@ -43,6 +43,7 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs;setenv ramdiskaddr 0x02000000;setenv fdtaddr 0x00c00000;setenv loadaddr 0x1000000;bootm $loadaddr $ramdiskaddr $fdtaddr"
+CONFIG_SYS_PBSIZE=276
CONFIG_ARCH_MISC_INIT=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
@@ -62,7 +63,6 @@
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y
CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
CONFIG_CMD_MEMTEST=y
diff --git a/configs/T2080RDB_revD_SPIFLASH_defconfig b/configs/T2080RDB_revD_SPIFLASH_defconfig
index 42babd4..1eea763 100644
--- a/configs/T2080RDB_revD_SPIFLASH_defconfig
+++ b/configs/T2080RDB_revD_SPIFLASH_defconfig
@@ -46,6 +46,7 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs;setenv ramdiskaddr 0x02000000;setenv fdtaddr 0x00c00000;setenv loadaddr 0x1000000;bootm $loadaddr $ramdiskaddr $fdtaddr"
+CONFIG_SYS_PBSIZE=276
CONFIG_ARCH_MISC_INIT=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
@@ -65,7 +66,6 @@
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y
CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
CONFIG_CMD_MEMTEST=y
diff --git a/configs/T2080RDB_revD_defconfig b/configs/T2080RDB_revD_defconfig
index 6874fb8..1a5251d 100644
--- a/configs/T2080RDB_revD_defconfig
+++ b/configs/T2080RDB_revD_defconfig
@@ -34,10 +34,10 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs;setenv ramdiskaddr 0x02000000;setenv fdtaddr 0x00c00000;setenv loadaddr 0x1000000;bootm $loadaddr $ramdiskaddr $fdtaddr"
+CONFIG_SYS_PBSIZE=276
CONFIG_ARCH_MISC_INIT=y
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y
CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
CONFIG_CMD_MEMTEST=y
diff --git a/configs/T4240RDB_SDCARD_defconfig b/configs/T4240RDB_SDCARD_defconfig
index 8bbba9f..f31a408 100644
--- a/configs/T4240RDB_SDCARD_defconfig
+++ b/configs/T4240RDB_SDCARD_defconfig
@@ -40,6 +40,7 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs;setenv ramdiskaddr 0x02000000;setenv fdtaddr 0x00c00000;setenv loadaddr 0x1000000;bootm $loadaddr $ramdiskaddr $fdtaddr"
+CONFIG_SYS_PBSIZE=276
CONFIG_ARCH_MISC_INIT=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_SPL_FRAMEWORK is not set
@@ -59,7 +60,6 @@
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_DM=y
diff --git a/configs/T4240RDB_defconfig b/configs/T4240RDB_defconfig
index b3affca..128e6d5 100644
--- a/configs/T4240RDB_defconfig
+++ b/configs/T4240RDB_defconfig
@@ -31,10 +31,10 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs;setenv ramdiskaddr 0x02000000;setenv fdtaddr 0x00c00000;setenv loadaddr 0x1000000;bootm $loadaddr $ramdiskaddr $fdtaddr"
+CONFIG_SYS_PBSIZE=276
CONFIG_ARCH_MISC_INIT=y
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_DM=y
diff --git a/configs/a3y17lte_defconfig b/configs/a3y17lte_defconfig
index 42fcd2a..5c15d51 100644
--- a/configs/a3y17lte_defconfig
+++ b/configs/a3y17lte_defconfig
@@ -1,5 +1,4 @@
CONFIG_ARM=y
-CONFIG_SYS_CONFIG_NAME="exynos78x0-common"
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=26000000
CONFIG_ARCH_EXYNOS=y
@@ -13,14 +12,14 @@
CONFIG_DEFAULT_DEVICE_TREE="exynos78x0-axy17lte"
CONFIG_SYS_LOAD_ADDR=0x40001000
CONFIG_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="echo Read pressed buttons status;KEY_VOLUMEUP=gpa20;KEY_HOME=gpa17;KEY_VOLUMEDOWN=gpa21;KEY_POWER=gpa00;PRESSED=0;RELEASED=1;if gpio input $KEY_VOLUMEUP; then setenv VOLUME_UP $PRESSED; else setenv VOLUME_UP $RELEASED; fi;if gpio input $KEY_VOLUMEDOWN; then setenv VOLUME_DOWN $PRESSED; else setenv VOLUME_DOWN $RELEASED; fi;if gpio input $KEY_HOME; then setenv HOME $PRESSED; else setenv HOME $RELEASED; fi;if gpio input $KEY_POWER; then setenv POWER $PRESSED; else setenv POWER $RELEASED; fi;"
CONFIG_SAVE_PREV_BL_FDT_ADDR=y
CONFIG_SAVE_PREV_BL_INITRAMFS_START_ADDR=y
+CONFIG_SYS_PBSIZE=1024
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PBSIZE=1024
-CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_DM_I2C_GPIO=y
diff --git a/configs/a5y17lte_defconfig b/configs/a5y17lte_defconfig
index 3b80536..7c9b6b2 100644
--- a/configs/a5y17lte_defconfig
+++ b/configs/a5y17lte_defconfig
@@ -1,5 +1,4 @@
CONFIG_ARM=y
-CONFIG_SYS_CONFIG_NAME="exynos78x0-common"
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=26000000
CONFIG_ARCH_EXYNOS=y
@@ -13,14 +12,14 @@
CONFIG_DEFAULT_DEVICE_TREE="exynos78x0-axy17lte"
CONFIG_SYS_LOAD_ADDR=0x40001000
CONFIG_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="echo Read pressed buttons status;KEY_VOLUMEUP=gpa20;KEY_HOME=gpa17;KEY_VOLUMEDOWN=gpa21;KEY_POWER=gpa00;PRESSED=0;RELEASED=1;if gpio input $KEY_VOLUMEUP; then setenv VOLUME_UP $PRESSED; else setenv VOLUME_UP $RELEASED; fi;if gpio input $KEY_VOLUMEDOWN; then setenv VOLUME_DOWN $PRESSED; else setenv VOLUME_DOWN $RELEASED; fi;if gpio input $KEY_HOME; then setenv HOME $PRESSED; else setenv HOME $RELEASED; fi;if gpio input $KEY_POWER; then setenv POWER $PRESSED; else setenv POWER $RELEASED; fi;"
CONFIG_SAVE_PREV_BL_FDT_ADDR=y
CONFIG_SAVE_PREV_BL_INITRAMFS_START_ADDR=y
+CONFIG_SYS_PBSIZE=1024
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PBSIZE=1024
-CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_DM_I2C_GPIO=y
diff --git a/configs/a7y17lte_defconfig b/configs/a7y17lte_defconfig
index 9390e35..c7297f7 100644
--- a/configs/a7y17lte_defconfig
+++ b/configs/a7y17lte_defconfig
@@ -1,5 +1,4 @@
CONFIG_ARM=y
-CONFIG_SYS_CONFIG_NAME="exynos78x0-common"
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=26000000
CONFIG_ARCH_EXYNOS=y
@@ -13,14 +12,14 @@
CONFIG_DEFAULT_DEVICE_TREE="exynos78x0-axy17lte"
CONFIG_SYS_LOAD_ADDR=0x40001000
CONFIG_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="echo Read pressed buttons status;KEY_VOLUMEUP=gpa20;KEY_HOME=gpa17;KEY_VOLUMEDOWN=gpa21;KEY_POWER=gpa00;PRESSED=0;RELEASED=1;if gpio input $KEY_VOLUMEUP; then setenv VOLUME_UP $PRESSED; else setenv VOLUME_UP $RELEASED; fi;if gpio input $KEY_VOLUMEDOWN; then setenv VOLUME_DOWN $PRESSED; else setenv VOLUME_DOWN $RELEASED; fi;if gpio input $KEY_HOME; then setenv HOME $PRESSED; else setenv HOME $RELEASED; fi;if gpio input $KEY_POWER; then setenv POWER $PRESSED; else setenv POWER $RELEASED; fi;"
CONFIG_SAVE_PREV_BL_FDT_ADDR=y
CONFIG_SAVE_PREV_BL_INITRAMFS_START_ADDR=y
+CONFIG_SYS_PBSIZE=1024
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PBSIZE=1024
-CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_DM_I2C_GPIO=y
diff --git a/configs/ae350_rv32_defconfig b/configs/ae350_rv32_defconfig
index 06cd972..3bfa3e9 100644
--- a/configs/ae350_rv32_defconfig
+++ b/configs/ae350_rv32_defconfig
@@ -11,14 +11,15 @@
CONFIG_TARGET_ANDES_AE350=y
CONFIG_SYS_MONITOR_BASE=0x88000000
CONFIG_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=3
+CONFIG_SYS_PBSIZE=1050
CONFIG_DISPLAY_CPUINFO=y
CONFIG_DISPLAY_BOARDINFO=y
CONFIG_BOARD_EARLY_INIT_F=y
+CONFIG_MISC_INIT_R=y
CONFIG_SYS_PROMPT="RISC-V # "
-CONFIG_SYS_PBSIZE=1050
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_IMLS=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF_TEST=y
diff --git a/configs/ae350_rv32_falcon_defconfig b/configs/ae350_rv32_falcon_defconfig
index 3f2993e..abf7dd4 100644
--- a/configs/ae350_rv32_falcon_defconfig
+++ b/configs/ae350_rv32_falcon_defconfig
@@ -17,8 +17,10 @@
CONFIG_SYS_MONITOR_BASE=0x88000000
CONFIG_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x10000000
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=3
+CONFIG_SYS_PBSIZE=1050
CONFIG_DISPLAY_CPUINFO=y
CONFIG_DISPLAY_BOARDINFO=y
CONFIG_BOARD_EARLY_INIT_F=y
@@ -28,8 +30,6 @@
CONFIG_SPL_CACHE=y
CONFIG_SPL_OPENSBI_SCRATCH_OPTIONS=0x0
CONFIG_SYS_PROMPT="RISC-V # "
-CONFIG_SYS_PBSIZE=1050
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_IMLS=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF_TEST=y
diff --git a/configs/ae350_rv32_falcon_xip_defconfig b/configs/ae350_rv32_falcon_xip_defconfig
index e4f4c78..5166ab7 100644
--- a/configs/ae350_rv32_falcon_xip_defconfig
+++ b/configs/ae350_rv32_falcon_xip_defconfig
@@ -18,8 +18,10 @@
CONFIG_SYS_MONITOR_BASE=0x88000000
CONFIG_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x80010000
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=3
+CONFIG_SYS_PBSIZE=1050
CONFIG_DISPLAY_CPUINFO=y
CONFIG_DISPLAY_BOARDINFO=y
CONFIG_BOARD_EARLY_INIT_F=y
@@ -29,8 +31,6 @@
CONFIG_SPL_CACHE=y
CONFIG_SPL_OPENSBI_SCRATCH_OPTIONS=0x0
CONFIG_SYS_PROMPT="RISC-V # "
-CONFIG_SYS_PBSIZE=1050
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_IMLS=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF_TEST=y
diff --git a/configs/ae350_rv32_spl_defconfig b/configs/ae350_rv32_spl_defconfig
index f469d5b..aeb5020 100644
--- a/configs/ae350_rv32_spl_defconfig
+++ b/configs/ae350_rv32_spl_defconfig
@@ -16,19 +16,20 @@
CONFIG_SYS_MONITOR_BASE=0x88000000
CONFIG_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x10000000
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=3
+CONFIG_SYS_PBSIZE=1050
CONFIG_DISPLAY_CPUINFO=y
CONFIG_DISPLAY_BOARDINFO=y
CONFIG_BOARD_EARLY_INIT_F=y
+CONFIG_MISC_INIT_R=y
CONFIG_SPL_MAX_SIZE=0x100000
CONFIG_SPL_BSS_START_ADDR=0x400000
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_CACHE=y
CONFIG_SPL_OPENSBI_SCRATCH_OPTIONS=0x0
CONFIG_SYS_PROMPT="RISC-V # "
-CONFIG_SYS_PBSIZE=1050
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_IMLS=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF_TEST=y
diff --git a/configs/ae350_rv32_spl_xip_defconfig b/configs/ae350_rv32_spl_xip_defconfig
index 9672a19..f15ec30 100644
--- a/configs/ae350_rv32_spl_xip_defconfig
+++ b/configs/ae350_rv32_spl_xip_defconfig
@@ -17,19 +17,20 @@
CONFIG_SYS_MONITOR_BASE=0x88000000
CONFIG_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x80010000
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=3
+CONFIG_SYS_PBSIZE=1050
CONFIG_DISPLAY_CPUINFO=y
CONFIG_DISPLAY_BOARDINFO=y
CONFIG_BOARD_EARLY_INIT_F=y
+CONFIG_MISC_INIT_R=y
CONFIG_SPL_MAX_SIZE=0x100000
CONFIG_SPL_BSS_START_ADDR=0x400000
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_CACHE=y
CONFIG_SPL_OPENSBI_SCRATCH_OPTIONS=0x0
CONFIG_SYS_PROMPT="RISC-V # "
-CONFIG_SYS_PBSIZE=1050
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_IMLS=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF_TEST=y
diff --git a/configs/ae350_rv32_xip_defconfig b/configs/ae350_rv32_xip_defconfig
index b90200a..c40eb04 100644
--- a/configs/ae350_rv32_xip_defconfig
+++ b/configs/ae350_rv32_xip_defconfig
@@ -12,14 +12,15 @@
CONFIG_XIP=y
CONFIG_SYS_MONITOR_BASE=0x88000000
CONFIG_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=3
+CONFIG_SYS_PBSIZE=1050
CONFIG_DISPLAY_CPUINFO=y
CONFIG_DISPLAY_BOARDINFO=y
CONFIG_BOARD_EARLY_INIT_F=y
+CONFIG_MISC_INIT_R=y
CONFIG_SYS_PROMPT="RISC-V # "
-CONFIG_SYS_PBSIZE=1050
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_IMLS=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF_TEST=y
diff --git a/configs/ae350_rv64_defconfig b/configs/ae350_rv64_defconfig
index a4b9ad6..7ae938a 100644
--- a/configs/ae350_rv64_defconfig
+++ b/configs/ae350_rv64_defconfig
@@ -11,14 +11,15 @@
CONFIG_ARCH_RV64I=y
CONFIG_SYS_MONITOR_BASE=0x88000000
CONFIG_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=3
+CONFIG_SYS_PBSIZE=1050
CONFIG_DISPLAY_CPUINFO=y
CONFIG_DISPLAY_BOARDINFO=y
CONFIG_BOARD_EARLY_INIT_F=y
+CONFIG_MISC_INIT_R=y
CONFIG_SYS_PROMPT="RISC-V # "
-CONFIG_SYS_PBSIZE=1050
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_IMLS=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF_TEST=y
diff --git a/configs/ae350_rv64_falcon_defconfig b/configs/ae350_rv64_falcon_defconfig
index 4fb83d8..1289238 100644
--- a/configs/ae350_rv64_falcon_defconfig
+++ b/configs/ae350_rv64_falcon_defconfig
@@ -17,8 +17,10 @@
CONFIG_SYS_MONITOR_BASE=0x88000000
CONFIG_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x10000000
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=3
+CONFIG_SYS_PBSIZE=1050
CONFIG_DISPLAY_CPUINFO=y
CONFIG_DISPLAY_BOARDINFO=y
CONFIG_BOARD_EARLY_INIT_F=y
@@ -28,8 +30,6 @@
CONFIG_SPL_CACHE=y
CONFIG_SPL_OPENSBI_SCRATCH_OPTIONS=0x0
CONFIG_SYS_PROMPT="RISC-V # "
-CONFIG_SYS_PBSIZE=1050
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_IMLS=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF_TEST=y
diff --git a/configs/ae350_rv64_falcon_xip_defconfig b/configs/ae350_rv64_falcon_xip_defconfig
index 4546426..18e2daf 100644
--- a/configs/ae350_rv64_falcon_xip_defconfig
+++ b/configs/ae350_rv64_falcon_xip_defconfig
@@ -18,8 +18,10 @@
CONFIG_SYS_MONITOR_BASE=0x88000000
CONFIG_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x80010000
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=3
+CONFIG_SYS_PBSIZE=1050
CONFIG_DISPLAY_CPUINFO=y
CONFIG_DISPLAY_BOARDINFO=y
CONFIG_BOARD_EARLY_INIT_F=y
@@ -29,8 +31,6 @@
CONFIG_SPL_CACHE=y
CONFIG_SPL_OPENSBI_SCRATCH_OPTIONS=0x0
CONFIG_SYS_PROMPT="RISC-V # "
-CONFIG_SYS_PBSIZE=1050
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_IMLS=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF_TEST=y
diff --git a/configs/ae350_rv64_spl_defconfig b/configs/ae350_rv64_spl_defconfig
index 834a0fb..68ac432 100644
--- a/configs/ae350_rv64_spl_defconfig
+++ b/configs/ae350_rv64_spl_defconfig
@@ -16,19 +16,20 @@
CONFIG_SYS_MONITOR_BASE=0x88000000
CONFIG_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x10000000
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=3
+CONFIG_SYS_PBSIZE=1050
CONFIG_DISPLAY_CPUINFO=y
CONFIG_DISPLAY_BOARDINFO=y
CONFIG_BOARD_EARLY_INIT_F=y
+CONFIG_MISC_INIT_R=y
CONFIG_SPL_MAX_SIZE=0x100000
CONFIG_SPL_BSS_START_ADDR=0x400000
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_CACHE=y
CONFIG_SPL_OPENSBI_SCRATCH_OPTIONS=0x0
CONFIG_SYS_PROMPT="RISC-V # "
-CONFIG_SYS_PBSIZE=1050
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_IMLS=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF_TEST=y
diff --git a/configs/ae350_rv64_spl_xip_defconfig b/configs/ae350_rv64_spl_xip_defconfig
index b52b8d7..839ca33 100644
--- a/configs/ae350_rv64_spl_xip_defconfig
+++ b/configs/ae350_rv64_spl_xip_defconfig
@@ -17,19 +17,20 @@
CONFIG_SYS_MONITOR_BASE=0x88000000
CONFIG_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x80010000
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=3
+CONFIG_SYS_PBSIZE=1050
CONFIG_DISPLAY_CPUINFO=y
CONFIG_DISPLAY_BOARDINFO=y
CONFIG_BOARD_EARLY_INIT_F=y
+CONFIG_MISC_INIT_R=y
CONFIG_SPL_MAX_SIZE=0x100000
CONFIG_SPL_BSS_START_ADDR=0x400000
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_CACHE=y
CONFIG_SPL_OPENSBI_SCRATCH_OPTIONS=0x0
CONFIG_SYS_PROMPT="RISC-V # "
-CONFIG_SYS_PBSIZE=1050
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_IMLS=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF_TEST=y
diff --git a/configs/ae350_rv64_xip_defconfig b/configs/ae350_rv64_xip_defconfig
index cc5e751..5432b6d 100644
--- a/configs/ae350_rv64_xip_defconfig
+++ b/configs/ae350_rv64_xip_defconfig
@@ -12,14 +12,15 @@
CONFIG_XIP=y
CONFIG_SYS_MONITOR_BASE=0x88000000
CONFIG_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=3
+CONFIG_SYS_PBSIZE=1050
CONFIG_DISPLAY_CPUINFO=y
CONFIG_DISPLAY_BOARDINFO=y
CONFIG_BOARD_EARLY_INIT_F=y
+CONFIG_MISC_INIT_R=y
CONFIG_SYS_PROMPT="RISC-V # "
-CONFIG_SYS_PBSIZE=1050
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_IMLS=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF_TEST=y
diff --git a/configs/alt_defconfig b/configs/alt_defconfig
index 6fdae50..31f38bd 100644
--- a/configs/alt_defconfig
+++ b/configs/alt_defconfig
@@ -33,6 +33,8 @@
CONFIG_PCI=y
CONFIG_FIT=y
CONFIG_BOOTDELAY=3
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=256
CONFIG_SPL_MAX_SIZE=0x4000
CONFIG_SPL_NO_BSS_LIMIT=y
CONFIG_SPL_BOARD_INIT=y
@@ -44,8 +46,6 @@
CONFIG_SYS_SPI_U_BOOT_OFFS=0x140000
CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=256
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_XIMG is not set
diff --git a/configs/am335x_baltos_defconfig b/configs/am335x_baltos_defconfig
index 0599ae2..a1eb87a 100644
--- a/configs/am335x_baltos_defconfig
+++ b/configs/am335x_baltos_defconfig
@@ -14,6 +14,7 @@
CONFIG_SPL_FS_FAT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_FIT_VERBOSE=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_BOOTCOMMAND="run findfdt; run usbboot;run mmcboot;setenv mmcdev 1; setenv bootpart 1:2; run mmcboot;run nandboot;"
@@ -30,7 +31,6 @@
CONFIG_SPL_WATCHDOG=y
CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_ASKENV=y
CONFIG_CMD_EEPROM=y
CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
diff --git a/configs/am335x_boneblack_vboot_defconfig b/configs/am335x_boneblack_vboot_defconfig
index 5317030..305a91f 100644
--- a/configs/am335x_boneblack_vboot_defconfig
+++ b/configs/am335x_boneblack_vboot_defconfig
@@ -15,6 +15,7 @@
CONFIG_TIMESTAMP=y
CONFIG_FIT_SIGNATURE=y
CONFIG_FIT_VERBOSE=y
+CONFIG_SYS_BOOTM_LEN=0x1000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n"
@@ -35,7 +36,6 @@
CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR=0x1500
CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS=0x200
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_BOOTM_LEN=0x1000000
CONFIG_CMD_SPL=y
CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
# CONFIG_CMD_FLASH is not set
diff --git a/configs/am335x_evm_defconfig b/configs/am335x_evm_defconfig
index 5d38dad..2d9cf46 100644
--- a/configs/am335x_evm_defconfig
+++ b/configs/am335x_evm_defconfig
@@ -14,6 +14,7 @@
CONFIG_SPL=y
CONFIG_TIMESTAMP=y
CONFIG_SPL_LOAD_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x1000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_BOOTCOMMAND="run findfdt; run init_console; run finduuid; run distro_bootcmd"
@@ -40,7 +41,6 @@
CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR=0x1500
CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS=0x200
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_BOOTM_LEN=0x1000000
CONFIG_CMD_EXTENSION=y
CONFIG_CMD_SPL=y
CONFIG_CMD_SPL_NAND_OFS=0x00080000
diff --git a/configs/am335x_evm_spiboot_defconfig b/configs/am335x_evm_spiboot_defconfig
index fff5265..2fd8f25 100644
--- a/configs/am335x_evm_spiboot_defconfig
+++ b/configs/am335x_evm_spiboot_defconfig
@@ -18,6 +18,7 @@
CONFIG_SPL_SPI=y
CONFIG_TIMESTAMP=y
CONFIG_SPL_LOAD_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x1000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_BOOTCOMMAND="run findfdt; run init_console; run finduuid; run distro_bootcmd"
@@ -34,7 +35,6 @@
CONFIG_SPL_SPI_LOAD=y
CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_BOOTM_LEN=0x1000000
CONFIG_CMD_SPL=y
CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
# CONFIG_CMD_FLASH is not set
diff --git a/configs/am335x_guardian_defconfig b/configs/am335x_guardian_defconfig
index 5369e46..d26b31a 100644
--- a/configs/am335x_guardian_defconfig
+++ b/configs/am335x_guardian_defconfig
@@ -22,6 +22,7 @@
CONFIG_SYS_MEMTEST_START=0x80000000
CONFIG_SYS_MEMTEST_END=0x81000000
CONFIG_TIMESTAMP=y
+CONFIG_SYS_BOOTM_LEN=0x1000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=0
CONFIG_AUTOBOOT_KEYED=y
@@ -45,7 +46,6 @@
CONFIG_SPL_NET_VCI_STRING="Guardian U-Boot SPL"
CONFIG_SPL_POWER=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_BOOTM_LEN=0x1000000
CONFIG_CMD_ASKENV=y
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEMTEST=y
diff --git a/configs/am335x_hs_evm_defconfig b/configs/am335x_hs_evm_defconfig
index ea46e58..2bfacd9 100644
--- a/configs/am335x_hs_evm_defconfig
+++ b/configs/am335x_hs_evm_defconfig
@@ -14,6 +14,7 @@
CONFIG_SPL=y
CONFIG_TIMESTAMP=y
CONFIG_SPL_LOAD_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x1000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_BOOTCOMMAND="run findfdt; run init_console; run finduuid; run distro_bootcmd"
@@ -33,7 +34,6 @@
CONFIG_SPL_NAND_ECC=y
# CONFIG_SPL_YMODEM_SUPPORT is not set
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_BOOTM_LEN=0x1000000
CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_NAND=y
diff --git a/configs/am335x_hs_evm_uart_defconfig b/configs/am335x_hs_evm_uart_defconfig
index 7886557..db74520 100644
--- a/configs/am335x_hs_evm_uart_defconfig
+++ b/configs/am335x_hs_evm_uart_defconfig
@@ -17,6 +17,7 @@
# CONFIG_SPL_LIBDISK_SUPPORT is not set
CONFIG_TIMESTAMP=y
CONFIG_SPL_LOAD_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x1000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_BOOTCOMMAND="run findfdt; run init_console; run finduuid; run distro_bootcmd"
@@ -34,7 +35,6 @@
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_BOOTM_LEN=0x1000000
CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_NAND=y
diff --git a/configs/am335x_shc_defconfig b/configs/am335x_shc_defconfig
index 24041e2..37370e6 100644
--- a/configs/am335x_shc_defconfig
+++ b/configs/am335x_shc_defconfig
@@ -19,6 +19,7 @@
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SERIES=y
CONFIG_TIMESTAMP=y
+CONFIG_SYS_BOOTM_LEN=0x1000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_SHOW_BOOT_PROGRESS=y
CONFIG_AUTOBOOT_KEYED=y
@@ -30,6 +31,7 @@
CONFIG_RESET_TO_RETRY=y
CONFIG_BOOTCOMMAND="if mmc dev 1; mmc rescan; then run emmc_setup; else echo ERROR: eMMC device not detected!; panic; fi; if run loaduimage; then run mmcboot; else echo ERROR Unable to load uImage from eMMC!; echo Performing Rollback!; setenv _active_ ${active_root}; setenv _inactive_ ${inactive_root}; setenv active_root ${_inactive_}; setenv inactive_root ${_active_}; saveenv; reset; fi; "
CONFIG_DEFAULT_FDT_FILE="am335x-shc"
+CONFIG_SYS_PBSIZE=1049
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_SYS_MALLOC=y
@@ -48,8 +50,6 @@
# CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC is not set
CONFIG_SYS_PROMPT="U-Boot# "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=1049
-CONFIG_SYS_BOOTM_LEN=0x1000000
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
diff --git a/configs/am335x_shc_ict_defconfig b/configs/am335x_shc_ict_defconfig
index ab06034..df03953 100644
--- a/configs/am335x_shc_ict_defconfig
+++ b/configs/am335x_shc_ict_defconfig
@@ -20,6 +20,7 @@
CONFIG_SHC_ICT=y
CONFIG_SERIES=y
CONFIG_TIMESTAMP=y
+CONFIG_SYS_BOOTM_LEN=0x1000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_SHOW_BOOT_PROGRESS=y
CONFIG_AUTOBOOT_KEYED=y
@@ -28,6 +29,7 @@
CONFIG_AUTOBOOT_STOP_STR="noautoboot"
CONFIG_BOOTCOMMAND="if mmc dev 0; mmc rescan; then run sd_setup; else echo ERROR: SD/MMC-Card not detected!; panic; fi; run fusecmd; "
CONFIG_DEFAULT_FDT_FILE="am335x-shc"
+CONFIG_SYS_PBSIZE=1049
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_SYS_MALLOC=y
@@ -46,8 +48,6 @@
# CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC is not set
CONFIG_SYS_PROMPT="U-Boot# "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=1049
-CONFIG_SYS_BOOTM_LEN=0x1000000
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
diff --git a/configs/am335x_shc_netboot_defconfig b/configs/am335x_shc_netboot_defconfig
index 995cbfc..5d50f25 100644
--- a/configs/am335x_shc_netboot_defconfig
+++ b/configs/am335x_shc_netboot_defconfig
@@ -20,6 +20,7 @@
CONFIG_SHC_NETBOOT=y
CONFIG_SERIES=y
CONFIG_TIMESTAMP=y
+CONFIG_SYS_BOOTM_LEN=0x1000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_SHOW_BOOT_PROGRESS=y
CONFIG_AUTOBOOT_KEYED=y
@@ -31,6 +32,7 @@
CONFIG_RESET_TO_RETRY=y
CONFIG_BOOTCOMMAND="run fusecmd; if run netboot; then echo Booting from network; else echo ERROR: Cannot boot from network!; panic; fi; "
CONFIG_DEFAULT_FDT_FILE="am335x-shc"
+CONFIG_SYS_PBSIZE=1049
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_SYS_MALLOC=y
@@ -50,8 +52,6 @@
# CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC is not set
CONFIG_SYS_PROMPT="U-Boot# "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=1049
-CONFIG_SYS_BOOTM_LEN=0x1000000
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
diff --git a/configs/am335x_shc_sdboot_defconfig b/configs/am335x_shc_sdboot_defconfig
index 03db57c..131f139 100644
--- a/configs/am335x_shc_sdboot_defconfig
+++ b/configs/am335x_shc_sdboot_defconfig
@@ -20,6 +20,7 @@
CONFIG_SHC_SDBOOT=y
CONFIG_SERIES=y
CONFIG_TIMESTAMP=y
+CONFIG_SYS_BOOTM_LEN=0x1000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_SHOW_BOOT_PROGRESS=y
CONFIG_AUTOBOOT_KEYED=y
@@ -31,6 +32,7 @@
CONFIG_RESET_TO_RETRY=y
CONFIG_BOOTCOMMAND="if mmc dev 0; mmc rescan; then run sd_setup; else echo ERROR: SD/MMC-Card not detected!; panic; fi; if run loaduimage; then echo Bootable SD/MMC-Card inserted, booting from it!; run mmcboot; else echo ERROR: Unable to load uImage from SD/MMC-Card!; panic; fi; "
CONFIG_DEFAULT_FDT_FILE="am335x-shc"
+CONFIG_SYS_PBSIZE=1049
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_SYS_MALLOC=y
@@ -49,8 +51,6 @@
# CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC is not set
CONFIG_SYS_PROMPT="U-Boot# "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=1049
-CONFIG_SYS_BOOTM_LEN=0x1000000
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
diff --git a/configs/am335x_sl50_defconfig b/configs/am335x_sl50_defconfig
index fb61dd7..af346b1 100644
--- a/configs/am335x_sl50_defconfig
+++ b/configs/am335x_sl50_defconfig
@@ -17,6 +17,7 @@
CONFIG_SPL_FS_FAT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_TIMESTAMP=y
+CONFIG_SYS_BOOTM_LEN=0x1000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n"
@@ -41,7 +42,6 @@
CONFIG_SPL_WATCHDOG=y
CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_BOOTM_LEN=0x1000000
CONFIG_CMD_SPL=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_EEPROM=y
diff --git a/configs/am3517_evm_defconfig b/configs/am3517_evm_defconfig
index a96936c..afeb6a9 100644
--- a/configs/am3517_evm_defconfig
+++ b/configs/am3517_evm_defconfig
@@ -19,6 +19,7 @@
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=10
CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then echo SD/MMC found on device $mmcdev; if run loadbootenv; then run importbootenv; fi; echo Checking if uenvcmd is set ...; if test -n $uenvcmd; then echo Running uenvcmd ...; run uenvcmd; fi; echo Running default loadimage ...; setenv bootfile zImage; if run loadimage; then run loadfdt; run mmcboot; fi; else run nandboot; fi"
+CONFIG_SYS_PBSIZE=1054
CONFIG_SPL_MAX_SIZE=0xec00
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_SYS_MALLOC=y
@@ -41,7 +42,6 @@
# CONFIG_SPL_POWER is not set
CONFIG_SYS_PROMPT="AM3517_EVM # "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=1054
# CONFIG_CMD_IMI is not set
CONFIG_CMD_SPL=y
CONFIG_CMD_SPL_NAND_OFS=0xaa0000
diff --git a/configs/am43xx_evm_defconfig b/configs/am43xx_evm_defconfig
index d5ce299..58e5f65 100644
--- a/configs/am43xx_evm_defconfig
+++ b/configs/am43xx_evm_defconfig
@@ -67,7 +67,6 @@
CONFIG_MISC=y
CONFIG_SYS_I2C_EEPROM_ADDR=0x50
CONFIG_MMC_OMAP_HS=y
-CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_OMAP_ECCSCHEME_BCH16_CODE_HW=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x40000
diff --git a/configs/am43xx_evm_rtconly_defconfig b/configs/am43xx_evm_rtconly_defconfig
index a0a9e8a..8f33fc2 100644
--- a/configs/am43xx_evm_rtconly_defconfig
+++ b/configs/am43xx_evm_rtconly_defconfig
@@ -57,7 +57,6 @@
CONFIG_DFU_SF=y
CONFIG_SYS_I2C_EEPROM_ADDR=0x50
CONFIG_MMC_OMAP_HS=y
-CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_OMAP_ECCSCHEME_BCH16_CODE_HW=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x40000
diff --git a/configs/am43xx_evm_usbhost_boot_defconfig b/configs/am43xx_evm_usbhost_boot_defconfig
index cd47806..d875560 100644
--- a/configs/am43xx_evm_usbhost_boot_defconfig
+++ b/configs/am43xx_evm_usbhost_boot_defconfig
@@ -70,7 +70,6 @@
CONFIG_DFU_SF=y
CONFIG_MISC=y
CONFIG_MMC_OMAP_HS=y
-CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_OMAP_ECCSCHEME_BCH16_CODE_HW=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x40000
diff --git a/configs/am43xx_hs_evm_defconfig b/configs/am43xx_hs_evm_defconfig
index d721664..fd1e0c8 100644
--- a/configs/am43xx_hs_evm_defconfig
+++ b/configs/am43xx_hs_evm_defconfig
@@ -63,7 +63,6 @@
CONFIG_MISC=y
CONFIG_SYS_I2C_EEPROM_ADDR=0x50
CONFIG_MMC_OMAP_HS=y
-CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_OMAP_ECCSCHEME_BCH16_CODE_HW=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x40000
diff --git a/configs/am57xx_evm_defconfig b/configs/am57xx_evm_defconfig
index b8aa6fe..e6c44dc 100644
--- a/configs/am57xx_evm_defconfig
+++ b/configs/am57xx_evm_defconfig
@@ -18,6 +18,7 @@
CONFIG_ARMV7_LPAE=y
CONFIG_AHCI=y
CONFIG_SPL_LOAD_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_BOOTARGS=y
@@ -45,7 +46,6 @@
CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_ADTIMG=y
CONFIG_CMD_ABOOTIMG=y
CONFIG_CMD_SPL=y
@@ -107,7 +107,6 @@
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_PALMAS=y
CONFIG_PALMAS_POWER=y
-CONFIG_DM_SCSI=y
CONFIG_DM_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
diff --git a/configs/am57xx_hs_evm_defconfig b/configs/am57xx_hs_evm_defconfig
index cc04390..1ea1315 100644
--- a/configs/am57xx_hs_evm_defconfig
+++ b/configs/am57xx_hs_evm_defconfig
@@ -21,6 +21,7 @@
CONFIG_ARMV7_LPAE=y
CONFIG_AHCI=y
CONFIG_SPL_LOAD_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_BOOTARGS=y
@@ -43,7 +44,6 @@
CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_ADTIMG=y
CONFIG_CMD_ABOOTIMG=y
CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
@@ -103,7 +103,6 @@
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_PALMAS=y
CONFIG_PALMAS_POWER=y
-CONFIG_DM_SCSI=y
CONFIG_DM_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
diff --git a/configs/am57xx_hs_evm_usb_defconfig b/configs/am57xx_hs_evm_usb_defconfig
index aa5d326..6004904 100644
--- a/configs/am57xx_hs_evm_usb_defconfig
+++ b/configs/am57xx_hs_evm_usb_defconfig
@@ -23,6 +23,7 @@
CONFIG_AHCI=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x80200000
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_BOOTARGS=y
@@ -46,7 +47,6 @@
CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_ADTIMG=y
CONFIG_CMD_ABOOTIMG=y
CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
@@ -101,7 +101,6 @@
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_PALMAS=y
CONFIG_PALMAS_POWER=y
-CONFIG_DM_SCSI=y
CONFIG_DM_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
diff --git a/configs/am62ax_evm_r5_defconfig b/configs/am62ax_evm_r5_defconfig
index 4070415..8dd8f08 100644
--- a/configs/am62ax_evm_r5_defconfig
+++ b/configs/am62ax_evm_r5_defconfig
@@ -89,6 +89,7 @@
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ADMA=y
CONFIG_MMC_SDHCI_AM654=y
+CONFIG_MTD=y
CONFIG_PINCTRL=y
# CONFIG_PINCTRL_GENERIC is not set
CONFIG_SPL_PINCTRL=y
diff --git a/configs/am62x_beagleplay_a53_defconfig b/configs/am62x_beagleplay_a53_defconfig
index 03ca3ac..0be2004 100644
--- a/configs/am62x_beagleplay_a53_defconfig
+++ b/configs/am62x_beagleplay_a53_defconfig
@@ -28,6 +28,7 @@
CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000
CONFIG_BOOTSTD_FULL=y
CONFIG_BOOTSTD_DEFAULTS=y
+CONFIG_SYS_BOOTM_LEN=0x800000
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n"
CONFIG_AUTOBOOT_DELAY_STR="d"
@@ -47,7 +48,6 @@
CONFIG_SPL_DM_MAILBOX=y
CONFIG_SPL_POWER_DOMAIN=y
CONFIG_SPL_YMODEM_SUPPORT=y
-CONFIG_SYS_BOOTM_LEN=0x800000
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPIO_READ=y
CONFIG_CMD_I2C=y
diff --git a/configs/am62x_evm_a53_defconfig b/configs/am62x_evm_a53_defconfig
index df25115..457931f 100644
--- a/configs/am62x_evm_a53_defconfig
+++ b/configs/am62x_evm_a53_defconfig
@@ -30,6 +30,7 @@
CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000
CONFIG_BOOTSTD_FULL=y
CONFIG_BOOTSTD_DEFAULTS=y
+CONFIG_SYS_BOOTM_LEN=0x800000
CONFIG_BOOTCOMMAND="run envboot; bootflow scan -lb"
CONFIG_SPL_MAX_SIZE=0x58000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
@@ -49,7 +50,6 @@
CONFIG_SPL_SPI_LOAD=y
CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000
CONFIG_SPL_YMODEM_SUPPORT=y
-CONFIG_SYS_BOOTM_LEN=0x800000
CONFIG_CMD_MMC=y
CONFIG_OF_CONTROL=y
CONFIG_SPL_OF_CONTROL=y
@@ -75,6 +75,7 @@
CONFIG_MMC_SDHCI_ADMA=y
CONFIG_SPL_MMC_SDHCI_ADMA=y
CONFIG_MMC_SDHCI_AM654=y
+CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_SFDP_SUPPORT=y
CONFIG_SPI_FLASH_SOFT_RESET=y
diff --git a/configs/am62x_evm_r5_defconfig b/configs/am62x_evm_r5_defconfig
index 9ec3d56..3e4d3a7 100644
--- a/configs/am62x_evm_r5_defconfig
+++ b/configs/am62x_evm_r5_defconfig
@@ -96,6 +96,7 @@
CONFIG_MMC_SDHCI_ADMA=y
CONFIG_SPL_MMC_SDHCI_ADMA=y
CONFIG_MMC_SDHCI_AM654=y
+CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_SFDP_SUPPORT=y
CONFIG_SPI_FLASH_SOFT_RESET=y
diff --git a/configs/am64x_evm_a53_defconfig b/configs/am64x_evm_a53_defconfig
index 20b101a..6711e69 100644
--- a/configs/am64x_evm_a53_defconfig
+++ b/configs/am64x_evm_a53_defconfig
@@ -63,7 +63,6 @@
CONFIG_SYS_MAXARGS=64
CONFIG_CMD_ASKENV=y
CONFIG_CMD_DFU=y
-CONFIG_CMD_DM=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
@@ -108,6 +107,7 @@
CONFIG_MMC_SDHCI_ADMA=y
CONFIG_SPL_MMC_SDHCI_ADMA=y
CONFIG_MMC_SDHCI_AM654=y
+CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y
diff --git a/configs/am64x_evm_r5_defconfig b/configs/am64x_evm_r5_defconfig
index 0f9757b..56df6a4 100644
--- a/configs/am64x_evm_r5_defconfig
+++ b/configs/am64x_evm_r5_defconfig
@@ -115,6 +115,7 @@
CONFIG_MMC_SDHCI_ADMA=y
CONFIG_SPL_MMC_SDHCI_ADMA=y
CONFIG_MMC_SDHCI_AM654=y
+CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y
diff --git a/configs/am65x_evm_a53_defconfig b/configs/am65x_evm_a53_defconfig
index 55289b9..529bda2 100644
--- a/configs/am65x_evm_a53_defconfig
+++ b/configs/am65x_evm_a53_defconfig
@@ -36,7 +36,6 @@
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_BOOTCOMMAND="run findfdt; run distro_bootcmd; run init_${boot}; run boot_rprocs; if test ${boot_fit} -eq 1; then run get_fit_${boot}; run get_overlaystring; run run_fit; else; run get_kern_${boot}; run get_fdt_${boot}; run get_overlay_${boot}; run run_kern; fi;"
CONFIG_LOGLEVEL=7
-CONFIG_CONSOLE_MUX=y
CONFIG_SPL_MAX_SIZE=0x58000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x80a00000
diff --git a/configs/am65x_evm_r5_defconfig b/configs/am65x_evm_r5_defconfig
index b2f1e72..194bd1f 100644
--- a/configs/am65x_evm_r5_defconfig
+++ b/configs/am65x_evm_r5_defconfig
@@ -29,6 +29,7 @@
CONFIG_SPL_SPI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_LOAD_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_USE_BOOTCOMMAND=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y
@@ -64,7 +65,6 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=64
CONFIG_CMD_BOOTZ=y
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
@@ -105,6 +105,7 @@
CONFIG_MMC_SDHCI=y
CONFIG_SPL_MMC_SDHCI_ADMA=y
CONFIG_MMC_SDHCI_AM654=y
+CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_SFDP_SUPPORT=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -118,6 +119,8 @@
CONFIG_TI_SCI_POWER_DOMAIN=y
CONFIG_DM_REGULATOR=y
CONFIG_SPL_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_SPL_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
CONFIG_SPL_DM_REGULATOR_GPIO=y
CONFIG_DM_REGULATOR_TPS62360=y
diff --git a/configs/am65x_evm_r5_usbdfu_defconfig b/configs/am65x_evm_r5_usbdfu_defconfig
index 6b0bb12..8b9c18b 100644
--- a/configs/am65x_evm_r5_usbdfu_defconfig
+++ b/configs/am65x_evm_r5_usbdfu_defconfig
@@ -25,6 +25,7 @@
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_USE_BOOTCOMMAND=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y
@@ -54,7 +55,6 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=64
CONFIG_CMD_BOOTZ=y
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_ASKENV=y
CONFIG_CMD_DFU=y
CONFIG_CMD_GPT=y
diff --git a/configs/am65x_evm_r5_usbmsc_defconfig b/configs/am65x_evm_r5_usbmsc_defconfig
index 57a0e72..9e508f6 100644
--- a/configs/am65x_evm_r5_usbmsc_defconfig
+++ b/configs/am65x_evm_r5_usbmsc_defconfig
@@ -25,6 +25,7 @@
CONFIG_SPL_LIBDISK_SUPPORT=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_LOAD_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_USE_BOOTCOMMAND=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y
@@ -54,7 +55,6 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=64
CONFIG_CMD_BOOTZ=y
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
diff --git a/configs/amcore_defconfig b/configs/amcore_defconfig
index ae7418d..f1f5201 100644
--- a/configs/amcore_defconfig
+++ b/configs/amcore_defconfig
@@ -13,6 +13,7 @@
CONFIG_BOOTDELAY=1
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="bootm ffc20000"
+CONFIG_SYS_PBSIZE=282
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_MALLOC_BOOTPARAMS=y
@@ -20,7 +21,6 @@
# CONFIG_CMDLINE_EDITING is not set
# CONFIG_SYS_LONGHELP is not set
CONFIG_SYS_PROMPT="amcore $ "
-CONFIG_SYS_PBSIZE=282
# CONFIG_CMD_BOOTD is not set
CONFIG_CMD_IMLS=y
# CONFIG_CMD_XIMG is not set
@@ -34,6 +34,7 @@
CONFIG_USE_HOSTNAME=y
CONFIG_HOSTNAME="AMCORE"
# CONFIG_NET is not set
+CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_FLASH_SHOW_PROGRESS=0
diff --git a/configs/ap121_defconfig b/configs/ap121_defconfig
index 50d2121..ee8ea93 100644
--- a/configs/ap121_defconfig
+++ b/configs/ap121_defconfig
@@ -21,12 +21,12 @@
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock2 rootfstype=squashfs"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="sf probe;mtdparts default;bootm 0x9f650000"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=281
CONFIG_DISPLAY_CPUINFO=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SYS_MALLOC_BOOTPARAMS=y
CONFIG_SYS_PROMPT="ap121 # "
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=281
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
# CONFIG_CMD_ELF is not set
diff --git a/configs/ap143_defconfig b/configs/ap143_defconfig
index f82e2c5..6366981 100644
--- a/configs/ap143_defconfig
+++ b/configs/ap143_defconfig
@@ -23,12 +23,12 @@
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock2 rootfstype=squashfs"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="sf probe;mtdparts default;bootm 0x9f680000"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=281
CONFIG_DISPLAY_CPUINFO=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SYS_MALLOC_BOOTPARAMS=y
CONFIG_SYS_PROMPT="ap143 # "
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=281
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
# CONFIG_CMD_ELF is not set
diff --git a/configs/ap152_defconfig b/configs/ap152_defconfig
index fc910ce..d4d36e8 100644
--- a/configs/ap152_defconfig
+++ b/configs/ap152_defconfig
@@ -23,12 +23,12 @@
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock2 rootfstype=squashfs"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="sf probe;mtdparts default;bootm 0x9f060000"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=281
CONFIG_DISPLAY_CPUINFO=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SYS_MALLOC_BOOTPARAMS=y
CONFIG_SYS_PROMPT="ap152 # "
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=281
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
# CONFIG_CMD_ELF is not set
diff --git a/configs/apalis-imx8_defconfig b/configs/apalis-imx8_defconfig
index 056c1fb..982098d 100644
--- a/configs/apalis-imx8_defconfig
+++ b/configs/apalis-imx8_defconfig
@@ -25,14 +25,14 @@
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="test -n ${fdtfile} || setenv fdtfile ${soc}-apalis${variant}-${fdt_board}.dtb"
+CONFIG_SYS_CBSIZE=2048
+CONFIG_SYS_PBSIZE=2068
CONFIG_LOG=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SYS_PROMPT="Apalis iMX8 # "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_CBSIZE=2048
-CONFIG_SYS_PBSIZE=2068
CONFIG_CMD_CPU=y
# CONFIG_BOOTM_NETBSD is not set
CONFIG_CMD_ASKENV=y
@@ -65,6 +65,7 @@
CONFIG_BOOTCOUNT_ENV=y
CONFIG_CLK_IMX8=y
CONFIG_CPU=y
+CONFIG_GPIO_HOG=y
CONFIG_MXC_GPIO=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_IMX_LPI2C=y
diff --git a/configs/apalis-tk1_defconfig b/configs/apalis-tk1_defconfig
index eca326c..6ed3898 100644
--- a/configs/apalis-tk1_defconfig
+++ b/configs/apalis-tk1_defconfig
@@ -20,6 +20,8 @@
CONFIG_BOOTDELAY=1
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_BOOTCOMMAND="setenv fdtfile ${soc}-${fdt_module}-${fdt_board}.dtb && run distro_bootcmd"
+CONFIG_SYS_CBSIZE=1024
+CONFIG_SYS_PBSIZE=1054
CONFIG_CONSOLE_MUX=y
CONFIG_SYS_STDIO_DEREGISTER=y
# CONFIG_DISPLAY_BOARDINFO is not set
@@ -34,8 +36,6 @@
CONFIG_SPL_SYS_MALLOC_SIZE=0x10000
CONFIG_SYS_PROMPT="Apalis TK1 # "
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_CBSIZE=1024
-CONFIG_SYS_PBSIZE=1054
# CONFIG_CMD_IMI is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
@@ -61,7 +61,6 @@
CONFIG_NETMASK="255.255.255.0"
CONFIG_USE_SERVERIP=y
CONFIG_SERVERIP="192.168.10.1"
-CONFIG_SPL_DM=y
CONFIG_SYS_I2C_TEGRA=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_TEGRA124_MMC_DISABLE_EXT_LOOPBACK=y
diff --git a/configs/apalis_imx6_defconfig b/configs/apalis_imx6_defconfig
index cf2af57..05ff6fa 100644
--- a/configs/apalis_imx6_defconfig
+++ b/configs/apalis_imx6_defconfig
@@ -34,6 +34,8 @@
CONFIG_BOOTCOMMAND="run distro_bootcmd; usb start; setenv stdout serial,vidconsole; setenv stdin serial,usbkbd"
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="test -n ${fdtfile} || setenv fdtfile imx6q-apalis-${fdt_board}.dtb"
+CONFIG_SYS_CBSIZE=1024
+CONFIG_SYS_PBSIZE=1055
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
@@ -44,8 +46,6 @@
CONFIG_SPL_I2C=y
CONFIG_SYS_PROMPT="Apalis iMX6 # "
CONFIG_SYS_MAXARGS=48
-CONFIG_SYS_CBSIZE=1024
-CONFIG_SYS_PBSIZE=1055
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_XIMG is not set
@@ -88,6 +88,9 @@
CONFIG_LBA48=y
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_BOOTCOUNT_ENV=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_FASTBOOT_BUF_ADDR=0x14420000
+CONFIG_FASTBOOT_UUU_SUPPORT=y
CONFIG_DM_I2C=y
CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_SYS_I2C_MXC=y
@@ -120,5 +123,4 @@
CONFIG_USB_GADGET_VENDOR_NUM=0x1b67
CONFIG_USB_GADGET_PRODUCT_NUM=0x4000
CONFIG_CI_UDC=y
-CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_SPL_USB_SDP_SUPPORT=y
diff --git a/configs/apalis_t30_defconfig b/configs/apalis_t30_defconfig
index b2d9254..0a27509 100644
--- a/configs/apalis_t30_defconfig
+++ b/configs/apalis_t30_defconfig
@@ -15,6 +15,8 @@
CONFIG_SYS_LOAD_ADDR=0x81000000
CONFIG_PCI=y
CONFIG_OF_SYSTEM_SETUP=y
+CONFIG_SYS_CBSIZE=1024
+CONFIG_SYS_PBSIZE=1054
CONFIG_CONSOLE_MUX=y
CONFIG_SYS_STDIO_DEREGISTER=y
# CONFIG_DISPLAY_BOARDINFO is not set
@@ -29,8 +31,6 @@
CONFIG_SPL_SYS_MALLOC_SIZE=0x10000
CONFIG_SYS_PROMPT="Apalis T30 # "
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_CBSIZE=1024
-CONFIG_SYS_PBSIZE=1054
# CONFIG_CMD_IMI is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
@@ -48,7 +48,6 @@
CONFIG_IP_DEFRAG=y
CONFIG_TFTP_BLOCKSIZE=16352
CONFIG_TFTP_TSIZE=y
-CONFIG_SPL_DM=y
CONFIG_SYS_I2C_TEGRA=y
CONFIG_E1000=y
CONFIG_E1000_NO_NVM=y
diff --git a/configs/apple_m1_defconfig b/configs/apple_m1_defconfig
index d58a903..e00d72e 100644
--- a/configs/apple_m1_defconfig
+++ b/configs/apple_m1_defconfig
@@ -2,13 +2,13 @@
CONFIG_ARCH_APPLE=y
CONFIG_DEFAULT_DEVICE_TREE="t8103-j274"
CONFIG_SYS_LOAD_ADDR=0x0
+CONFIG_SYS_BOOTM_LEN=0x800000
CONFIG_USE_PREBOOT=y
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_BOARD_LATE_INIT=y
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=276
-CONFIG_SYS_BOOTM_LEN=0x800000
# CONFIG_NET is not set
CONFIG_APPLE_SPI_KEYB=y
# CONFIG_MMC is not set
@@ -21,5 +21,5 @@
CONFIG_SYS_WHITE_ON_BLACK=y
CONFIG_NO_FB_CLEAR=y
CONFIG_VIDEO_SIMPLE=y
-# CONFIG_GENERATE_SMBIOS_TABLE is not set
+# CONFIG_SMBIOS is not set
CONFIG_LMB_MAX_REGIONS=64
diff --git a/configs/arbel_evb_defconfig b/configs/arbel_evb_defconfig
index 6cfb5a7..45fafe7 100644
--- a/configs/arbel_evb_defconfig
+++ b/configs/arbel_evb_defconfig
@@ -4,6 +4,8 @@
CONFIG_SYS_MALLOC_LEN=0x240000
CONFIG_SYS_MALLOC_F_LEN=0x1000
CONFIG_NR_DRAM_BANKS=2
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x06208000
CONFIG_ENV_SIZE=0x40000
CONFIG_ENV_OFFSET=0x3C0000
CONFIG_ENV_SECT_SIZE=0x1000
@@ -12,17 +14,20 @@
CONFIG_DM_RESET=y
# CONFIG_PSCI_RESET is not set
CONFIG_ARCH_NPCM8XX=y
+CONFIG_SYS_SKIP_UART_INIT=y
CONFIG_TARGET_ARBEL_EVB=y
CONFIG_SYS_LOAD_ADDR=0x06208000
CONFIG_ENV_ADDR=0x803C0000
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
+CONFIG_SYS_BOOTM_LEN=0x1400000
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run common_bootargs; run romboot"
+CONFIG_LAST_STAGE_INIT=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot>"
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_BOOTM_LEN=0x1400000
+CONFIG_CMD_MEMTEST=y
CONFIG_CMD_FUSE=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
@@ -31,6 +36,7 @@
CONFIG_CMD_PART=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
@@ -39,6 +45,7 @@
CONFIG_CMD_UUID=y
CONFIG_CMD_HASH=y
CONFIG_CMD_TPM=y
+CONFIG_CMD_EXT4=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
@@ -49,12 +56,14 @@
CONFIG_NPCM_SHA=y
CONFIG_NPCM_GPIO=y
CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_NPCM=y
# CONFIG_INPUT is not set
CONFIG_MISC=y
CONFIG_NPCM_HOST=y
CONFIG_SUPPORT_EMMC_RPMB=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_NPCM=y
+CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_WINBOND=y
@@ -87,11 +96,15 @@
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_NPCM=y
-CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_OHCI_HCD=y
-CONFIG_USB_OHCI_GENERIC=y
CONFIG_USB_OHCI_NPCM=y
CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Nuvoton"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0416
+CONFIG_USB_GADGET_PRODUCT_NUM=0xffff
+CONFIG_CI_UDC=y
+CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_LIB_HW_RAND=y
CONFIG_TPM=y
CONFIG_SHA_HW_ACCEL=y
diff --git a/configs/aristainetos2c_defconfig b/configs/aristainetos2c_defconfig
index d1eb2ab..0117881 100644
--- a/configs/aristainetos2c_defconfig
+++ b/configs/aristainetos2c_defconfig
@@ -19,13 +19,13 @@
CONFIG_AUTOBOOT_ENCRYPTION=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run ari_boot"
+CONFIG_SYS_PBSIZE=532
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_TYPES=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_BOOTZ=y
# CONFIG_BOOTM_NETBSD is not set
# CONFIG_BOOTM_PLAN9 is not set
diff --git a/configs/aristainetos2ccslb_defconfig b/configs/aristainetos2ccslb_defconfig
index 638976d..b96fbc3 100644
--- a/configs/aristainetos2ccslb_defconfig
+++ b/configs/aristainetos2ccslb_defconfig
@@ -19,13 +19,13 @@
CONFIG_AUTOBOOT_ENCRYPTION=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run ari_boot"
+CONFIG_SYS_PBSIZE=532
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_TYPES=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_BOOTZ=y
# CONFIG_BOOTM_NETBSD is not set
# CONFIG_BOOTM_PLAN9 is not set
diff --git a/configs/arndale_defconfig b/configs/arndale_defconfig
index d444ee9..b664ad5 100644
--- a/configs/arndale_defconfig
+++ b/configs/arndale_defconfig
@@ -22,13 +22,13 @@
CONFIG_FIT_BEST_MATCH=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_USE_PREBOOT=y
+CONFIG_SYS_PBSIZE=1024
CONFIG_SILENT_CONSOLE=y
CONFIG_CONSOLE_MUX=y
# CONFIG_SPL_FRAMEWORK is not set
CONFIG_SPL_FOOTPRINT_LIMIT=y
CONFIG_SPL_MAX_FOOTPRINT=0x3800
CONFIG_SYS_PROMPT="ARNDALE # "
-CONFIG_SYS_PBSIZE=1024
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
@@ -46,7 +46,6 @@
CONFIG_MMC_DW=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_S5P=y
-CONFIG_MTD=y
CONFIG_SMC911X=y
CONFIG_SOUND=y
CONFIG_I2S=y
diff --git a/configs/astro_mcf5373l_defconfig b/configs/astro_mcf5373l_defconfig
index 96441b0..d1942c2 100644
--- a/configs/astro_mcf5373l_defconfig
+++ b/configs/astro_mcf5373l_defconfig
@@ -14,13 +14,13 @@
CONFIG_BOOTARGS=" console=ttyS2,115200 rootfstype=romfs loaderversion=$loaderversion"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="protect off 0x80000 0x1ffffff;run env_check;run xilinxload&&run alteraload&&bootm 0x80000;update;reset"
+CONFIG_SYS_PBSIZE=281
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_MISC_INIT_R=y
CONFIG_SYS_MALLOC_BOOTPARAMS=y
CONFIG_HUSH_PARSER=y
# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="URMEL > "
-CONFIG_SYS_PBSIZE=281
CONFIG_CMD_IMLS=y
CONFIG_CMD_FPGA_LOADMK=y
CONFIG_CMD_I2C=y
@@ -35,6 +35,7 @@
CONFIG_SYS_FPGA_PROG_FEEDBACK=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_FSL=y
+CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_FLASH_SHOW_PROGRESS=0
diff --git a/configs/at91sam9260ek_dataflash_cs0_defconfig b/configs/at91sam9260ek_dataflash_cs0_defconfig
index 598a9d5..97c8e98 100644
--- a/configs/at91sam9260ek_dataflash_cs0_defconfig
+++ b/configs/at91sam9260ek_dataflash_cs0_defconfig
@@ -23,10 +23,10 @@
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock0 mtdparts=atmel_nand:-(root) rw rootfstype=jffs2"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="sf probe 0:0; sf read 0x22000000 0x84000 0x294000; bootm 0x22000000"
-# CONFIG_DISPLAY_BOARDINFO is not set
-CONFIG_SYS_PROMPT="U-Boot> "
CONFIG_SYS_CBSIZE=256
CONFIG_SYS_PBSIZE=281
+# CONFIG_DISPLAY_BOARDINFO is not set
+CONFIG_SYS_PROMPT="U-Boot> "
# CONFIG_CMD_BDI is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
diff --git a/configs/at91sam9260ek_dataflash_cs1_defconfig b/configs/at91sam9260ek_dataflash_cs1_defconfig
index 3573c81..6c60df2 100644
--- a/configs/at91sam9260ek_dataflash_cs1_defconfig
+++ b/configs/at91sam9260ek_dataflash_cs1_defconfig
@@ -23,10 +23,10 @@
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock0 mtdparts=atmel_nand:-(root) rw rootfstype=jffs2"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="sf probe 0:1; sf read 0x22000000 0x84000 0x294000; bootm 0x22000000"
-# CONFIG_DISPLAY_BOARDINFO is not set
-CONFIG_SYS_PROMPT="U-Boot> "
CONFIG_SYS_CBSIZE=256
CONFIG_SYS_PBSIZE=281
+# CONFIG_DISPLAY_BOARDINFO is not set
+CONFIG_SYS_PROMPT="U-Boot> "
# CONFIG_CMD_BDI is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
diff --git a/configs/at91sam9260ek_nandflash_defconfig b/configs/at91sam9260ek_nandflash_defconfig
index 51824f2..0f0aa28 100644
--- a/configs/at91sam9260ek_nandflash_defconfig
+++ b/configs/at91sam9260ek_nandflash_defconfig
@@ -22,10 +22,10 @@
CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) root=/dev/mtdblock7 rw rootfstype=jffs2"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="nand read 0x22000000 0x200000 0x300000; bootm"
-# CONFIG_DISPLAY_BOARDINFO is not set
-CONFIG_SYS_PROMPT="U-Boot> "
CONFIG_SYS_CBSIZE=256
CONFIG_SYS_PBSIZE=281
+# CONFIG_DISPLAY_BOARDINFO is not set
+CONFIG_SYS_PROMPT="U-Boot> "
# CONFIG_CMD_BDI is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
diff --git a/configs/at91sam9261ek_dataflash_cs0_defconfig b/configs/at91sam9261ek_dataflash_cs0_defconfig
index 92b5886..81a149d 100644
--- a/configs/at91sam9261ek_dataflash_cs0_defconfig
+++ b/configs/at91sam9261ek_dataflash_cs0_defconfig
@@ -22,12 +22,12 @@
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock0 mtdparts=atmel_nand:-(root) rw rootfstype=jffs2"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="sf probe 0; sf read 0x22000000 0x84000 0x294000; bootm 0x22000000"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=281
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_RESET_PHY_R=y
CONFIG_SYS_PROMPT="U-Boot> "
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=281
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_LOADS is not set
diff --git a/configs/at91sam9261ek_dataflash_cs3_defconfig b/configs/at91sam9261ek_dataflash_cs3_defconfig
index 4e61a67..b45bfa2 100644
--- a/configs/at91sam9261ek_dataflash_cs3_defconfig
+++ b/configs/at91sam9261ek_dataflash_cs3_defconfig
@@ -22,12 +22,12 @@
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock0 mtdparts=atmel_nand:-(root) rw rootfstype=jffs2"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="sf probe 0:3; sf read 0x22000000 0x84000 0x294000; bootm 0x22000000"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=281
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_RESET_PHY_R=y
CONFIG_SYS_PROMPT="U-Boot> "
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=281
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_LOADS is not set
diff --git a/configs/at91sam9261ek_nandflash_defconfig b/configs/at91sam9261ek_nandflash_defconfig
index 473e6ce..fe3ac58 100644
--- a/configs/at91sam9261ek_nandflash_defconfig
+++ b/configs/at91sam9261ek_nandflash_defconfig
@@ -21,12 +21,12 @@
CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) root=/dev/mtdblock7 rw rootfstype=jffs2"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="nand read 0x22000000 0x200000 0x300000; bootm"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=281
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_RESET_PHY_R=y
CONFIG_SYS_PROMPT="U-Boot> "
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=281
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_LOADS is not set
diff --git a/configs/at91sam9263ek_dataflash_cs0_defconfig b/configs/at91sam9263ek_dataflash_cs0_defconfig
index 1f016bc..de615d5 100644
--- a/configs/at91sam9263ek_dataflash_cs0_defconfig
+++ b/configs/at91sam9263ek_dataflash_cs0_defconfig
@@ -22,13 +22,13 @@
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock0 mtdparts=atmel_nand:-(root) rw rootfstype=jffs2"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="sf probe 0; sf read 0x22000000 0x84000 0x294000; bootm 0x22000000"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=281
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_RESET_PHY_R=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot> "
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=281
# CONFIG_CMD_BDI is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
diff --git a/configs/at91sam9263ek_dataflash_defconfig b/configs/at91sam9263ek_dataflash_defconfig
index 1f016bc..de615d5 100644
--- a/configs/at91sam9263ek_dataflash_defconfig
+++ b/configs/at91sam9263ek_dataflash_defconfig
@@ -22,13 +22,13 @@
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock0 mtdparts=atmel_nand:-(root) rw rootfstype=jffs2"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="sf probe 0; sf read 0x22000000 0x84000 0x294000; bootm 0x22000000"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=281
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_RESET_PHY_R=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot> "
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=281
# CONFIG_CMD_BDI is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
diff --git a/configs/at91sam9263ek_nandflash_defconfig b/configs/at91sam9263ek_nandflash_defconfig
index fa72c27..dcb41e3 100644
--- a/configs/at91sam9263ek_nandflash_defconfig
+++ b/configs/at91sam9263ek_nandflash_defconfig
@@ -21,13 +21,13 @@
CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) root=/dev/mtdblock7 rw rootfstype=jffs2"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="nand read 0x22000000 0x200000 0x300000; bootm"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=281
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_RESET_PHY_R=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot> "
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=281
# CONFIG_CMD_BDI is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
diff --git a/configs/at91sam9263ek_norflash_boot_defconfig b/configs/at91sam9263ek_norflash_boot_defconfig
index 3220812..74d3373 100644
--- a/configs/at91sam9263ek_norflash_boot_defconfig
+++ b/configs/at91sam9263ek_norflash_boot_defconfig
@@ -20,13 +20,13 @@
CONFIG_DEBUG_UART=y
CONFIG_SYS_MONITOR_BASE=0x10000000
CONFIG_BOOTDELAY=3
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=281
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_RESET_PHY_R=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot> "
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=281
# CONFIG_CMD_BDI is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
diff --git a/configs/at91sam9263ek_norflash_defconfig b/configs/at91sam9263ek_norflash_defconfig
index 657153f..9c0bf3d 100644
--- a/configs/at91sam9263ek_norflash_defconfig
+++ b/configs/at91sam9263ek_norflash_defconfig
@@ -21,13 +21,13 @@
CONFIG_DEBUG_UART=y
CONFIG_SYS_MONITOR_BASE=0x10000000
CONFIG_BOOTDELAY=3
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=281
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_RESET_PHY_R=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot> "
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=281
# CONFIG_CMD_BDI is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
diff --git a/configs/at91sam9g10ek_dataflash_cs0_defconfig b/configs/at91sam9g10ek_dataflash_cs0_defconfig
index f76d79e..8e6afbc 100644
--- a/configs/at91sam9g10ek_dataflash_cs0_defconfig
+++ b/configs/at91sam9g10ek_dataflash_cs0_defconfig
@@ -22,12 +22,12 @@
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock0 mtdparts=atmel_nand:-(root) rw rootfstype=jffs2"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="sf probe 0; sf read 0x22000000 0x84000 0x294000; bootm 0x22000000"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=281
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_RESET_PHY_R=y
CONFIG_SYS_PROMPT="U-Boot> "
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=281
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_LOADS is not set
diff --git a/configs/at91sam9g10ek_dataflash_cs3_defconfig b/configs/at91sam9g10ek_dataflash_cs3_defconfig
index 36c7683..8537d75 100644
--- a/configs/at91sam9g10ek_dataflash_cs3_defconfig
+++ b/configs/at91sam9g10ek_dataflash_cs3_defconfig
@@ -22,12 +22,12 @@
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock0 mtdparts=atmel_nand:-(root) rw rootfstype=jffs2"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="sf probe 0:3; sf read 0x22000000 0x84000 0x294000; bootm 0x22000000"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=281
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_RESET_PHY_R=y
CONFIG_SYS_PROMPT="U-Boot> "
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=281
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_LOADS is not set
diff --git a/configs/at91sam9g10ek_nandflash_defconfig b/configs/at91sam9g10ek_nandflash_defconfig
index 0cd803f..a8e5cee 100644
--- a/configs/at91sam9g10ek_nandflash_defconfig
+++ b/configs/at91sam9g10ek_nandflash_defconfig
@@ -21,12 +21,12 @@
CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) root=/dev/mtdblock7 rw rootfstype=jffs2"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="nand read 0x22000000 0x200000 0x300000; bootm"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=281
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_RESET_PHY_R=y
CONFIG_SYS_PROMPT="U-Boot> "
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=281
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_LOADS is not set
diff --git a/configs/at91sam9g20ek_2mmc_defconfig b/configs/at91sam9g20ek_2mmc_defconfig
index 1ef502f..a7f805f 100644
--- a/configs/at91sam9g20ek_2mmc_defconfig
+++ b/configs/at91sam9g20ek_2mmc_defconfig
@@ -24,10 +24,10 @@
CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="fatload mmc 0:1 0x22000000 uImage; bootm"
-# CONFIG_DISPLAY_BOARDINFO is not set
-CONFIG_SYS_PROMPT="U-Boot> "
CONFIG_SYS_CBSIZE=256
CONFIG_SYS_PBSIZE=281
+# CONFIG_DISPLAY_BOARDINFO is not set
+CONFIG_SYS_PROMPT="U-Boot> "
# CONFIG_CMD_BDI is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
diff --git a/configs/at91sam9g20ek_2mmc_nandflash_defconfig b/configs/at91sam9g20ek_2mmc_nandflash_defconfig
index b34512b..fafa35e 100644
--- a/configs/at91sam9g20ek_2mmc_nandflash_defconfig
+++ b/configs/at91sam9g20ek_2mmc_nandflash_defconfig
@@ -23,10 +23,10 @@
CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) root=/dev/mtdblock7 rw rootfstype=jffs2"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="nand read 0x22000000 0x200000 0x300000; bootm"
-# CONFIG_DISPLAY_BOARDINFO is not set
-CONFIG_SYS_PROMPT="U-Boot> "
CONFIG_SYS_CBSIZE=256
CONFIG_SYS_PBSIZE=281
+# CONFIG_DISPLAY_BOARDINFO is not set
+CONFIG_SYS_PROMPT="U-Boot> "
# CONFIG_CMD_BDI is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
diff --git a/configs/at91sam9g20ek_dataflash_cs0_defconfig b/configs/at91sam9g20ek_dataflash_cs0_defconfig
index 50d7d23..0b6e4c1 100644
--- a/configs/at91sam9g20ek_dataflash_cs0_defconfig
+++ b/configs/at91sam9g20ek_dataflash_cs0_defconfig
@@ -23,10 +23,10 @@
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock0 mtdparts=atmel_nand:-(root) rw rootfstype=jffs2"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="sf probe 0:0; sf read 0x22000000 0x84000 0x294000; bootm 0x22000000"
-# CONFIG_DISPLAY_BOARDINFO is not set
-CONFIG_SYS_PROMPT="U-Boot> "
CONFIG_SYS_CBSIZE=256
CONFIG_SYS_PBSIZE=281
+# CONFIG_DISPLAY_BOARDINFO is not set
+CONFIG_SYS_PROMPT="U-Boot> "
# CONFIG_CMD_BDI is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
diff --git a/configs/at91sam9g20ek_dataflash_cs1_defconfig b/configs/at91sam9g20ek_dataflash_cs1_defconfig
index 8577409..aa6b186 100644
--- a/configs/at91sam9g20ek_dataflash_cs1_defconfig
+++ b/configs/at91sam9g20ek_dataflash_cs1_defconfig
@@ -23,10 +23,10 @@
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock0 mtdparts=atmel_nand:-(root) rw rootfstype=jffs2"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="sf probe 0:1; sf read 0x22000000 0x84000 0x294000; bootm 0x22000000"
-# CONFIG_DISPLAY_BOARDINFO is not set
-CONFIG_SYS_PROMPT="U-Boot> "
CONFIG_SYS_CBSIZE=256
CONFIG_SYS_PBSIZE=281
+# CONFIG_DISPLAY_BOARDINFO is not set
+CONFIG_SYS_PROMPT="U-Boot> "
# CONFIG_CMD_BDI is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
diff --git a/configs/at91sam9g20ek_nandflash_defconfig b/configs/at91sam9g20ek_nandflash_defconfig
index 501f04b..299a9ed 100644
--- a/configs/at91sam9g20ek_nandflash_defconfig
+++ b/configs/at91sam9g20ek_nandflash_defconfig
@@ -22,10 +22,10 @@
CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) root=/dev/mtdblock7 rw rootfstype=jffs2"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="nand read 0x22000000 0x200000 0x300000; bootm"
-# CONFIG_DISPLAY_BOARDINFO is not set
-CONFIG_SYS_PROMPT="U-Boot> "
CONFIG_SYS_CBSIZE=256
CONFIG_SYS_PBSIZE=281
+# CONFIG_DISPLAY_BOARDINFO is not set
+CONFIG_SYS_PROMPT="U-Boot> "
# CONFIG_CMD_BDI is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
diff --git a/configs/at91sam9m10g45ek_mmc_defconfig b/configs/at91sam9m10g45ek_mmc_defconfig
index ab48506..c8d2e64 100644
--- a/configs/at91sam9m10g45ek_mmc_defconfig
+++ b/configs/at91sam9m10g45ek_mmc_defconfig
@@ -23,13 +23,13 @@
CONFIG_BOOTARGS="console=ttyS0,115200 mtdparts=atmel_nand:8M(bootstrap/uboot/kernel)ro,-(rootfs) root=/dev/mmcblk0p2 rw rootwait"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="fatload mmc 0:1 0x71000000 dtb; fatload mmc 0:1 0x72000000 zImage; bootz 0x72000000 - 0x71000000"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=281
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_RESET_PHY_R=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot> "
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=281
# CONFIG_CMD_BDI is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
diff --git a/configs/at91sam9m10g45ek_nandflash_defconfig b/configs/at91sam9m10g45ek_nandflash_defconfig
index ea695a2..5a196b2 100644
--- a/configs/at91sam9m10g45ek_nandflash_defconfig
+++ b/configs/at91sam9m10g45ek_nandflash_defconfig
@@ -23,13 +23,13 @@
CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) root=/dev/mtdblock7 rw rootfstype=jffs2"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="nand read 0x70000000 0x200000 0x300000;bootm 0x70000000"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=281
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_RESET_PHY_R=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot> "
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=281
# CONFIG_CMD_BDI is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
diff --git a/configs/at91sam9n12ek_mmc_defconfig b/configs/at91sam9n12ek_mmc_defconfig
index 81d620f..a67e528 100644
--- a/configs/at91sam9n12ek_mmc_defconfig
+++ b/configs/at91sam9n12ek_mmc_defconfig
@@ -20,12 +20,12 @@
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs ${console} ${mtdparts} ${bootargs_mmc};fatload mmc 0:1 0x21000000 dtb;fatload mmc 0:1 0x22000000 uImage;bootm 0x22000000 - 0x21000000"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=281
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot> "
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=281
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_MMC=y
diff --git a/configs/at91sam9n12ek_nandflash_defconfig b/configs/at91sam9n12ek_nandflash_defconfig
index a964c9a..c4f748e 100644
--- a/configs/at91sam9n12ek_nandflash_defconfig
+++ b/configs/at91sam9n12ek_nandflash_defconfig
@@ -20,12 +20,12 @@
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs ${console} ${mtdparts} ${bootargs_nand};nand read 0x21000000 0x180000 0x080000;nand read 0x22000000 0x200000 0x400000;bootm 0x22000000 - 0x21000000"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=281
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot> "
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=281
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_MMC=y
diff --git a/configs/at91sam9n12ek_spiflash_defconfig b/configs/at91sam9n12ek_spiflash_defconfig
index b7598ab..97f793d 100644
--- a/configs/at91sam9n12ek_spiflash_defconfig
+++ b/configs/at91sam9n12ek_spiflash_defconfig
@@ -22,12 +22,12 @@
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs ${console} ${mtdparts} ${bootargs_nand};sf probe 0; sf read 0x22000000 0x100000 0x300000; bootm 0x22000000"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=281
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot> "
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=281
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_MMC=y
diff --git a/configs/at91sam9rlek_dataflash_defconfig b/configs/at91sam9rlek_dataflash_defconfig
index 1c655f2..931af2b 100644
--- a/configs/at91sam9rlek_dataflash_defconfig
+++ b/configs/at91sam9rlek_dataflash_defconfig
@@ -22,12 +22,12 @@
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock0 mtdparts=atmel_nand:-(root) rw rootfstype=jffs2"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="sf probe 0; sf read 0x22000000 0x84000 0x294000; bootm 0x22000000"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=281
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot> "
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=281
# CONFIG_CMD_BDI is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
diff --git a/configs/at91sam9rlek_mmc_defconfig b/configs/at91sam9rlek_mmc_defconfig
index c66a9b7..70d431c 100644
--- a/configs/at91sam9rlek_mmc_defconfig
+++ b/configs/at91sam9rlek_mmc_defconfig
@@ -21,12 +21,12 @@
CONFIG_BOOTARGS="console=ttyS0,115200 mtdparts=atmel_nand:8M(bootstrap/uboot/kernel)ro,-(rootfs) root=/dev/mmcblk0p2 rw rootwait"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="fatload mmc 0:1 0x21000000 at91sam9rlek.dtb; fatload mmc 0:1 0x22000000 zImage; bootz 0x22000000 - 0x21000000"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=281
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot> "
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=281
# CONFIG_CMD_BDI is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
diff --git a/configs/at91sam9rlek_nandflash_defconfig b/configs/at91sam9rlek_nandflash_defconfig
index c3950cd..1277a35 100644
--- a/configs/at91sam9rlek_nandflash_defconfig
+++ b/configs/at91sam9rlek_nandflash_defconfig
@@ -21,12 +21,12 @@
CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256K(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="nand read 0x22000000 0x200000 0x600000; nand read 0x21000000 0x180000 0x80000; bootz 0x22000000 - 0x21000000"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=281
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot> "
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=281
# CONFIG_CMD_BDI is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
diff --git a/configs/at91sam9x5ek_dataflash_defconfig b/configs/at91sam9x5ek_dataflash_defconfig
index 50d775c..0a129bf 100644
--- a/configs/at91sam9x5ek_dataflash_defconfig
+++ b/configs/at91sam9x5ek_dataflash_defconfig
@@ -26,13 +26,13 @@
CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,768k(uboot)ro,256k(env_redundant),256k(env),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=6 root=ubi0:rootfs rw"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="sf probe 0; sf read 0x22000000 0x84000 0x294000; bootm 0x22000000"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=281
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot> "
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=281
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_MMC=y
diff --git a/configs/at91sam9x5ek_mmc_defconfig b/configs/at91sam9x5ek_mmc_defconfig
index 3b80e17..6aa9da7 100644
--- a/configs/at91sam9x5ek_mmc_defconfig
+++ b/configs/at91sam9x5ek_mmc_defconfig
@@ -23,13 +23,13 @@
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="mem=128M console=ttyS0,115200 mtdparts=atmel_nand:8M(bootstrap/uboot/kernel)ro,-(rootfs) root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=281
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot> "
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=281
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_MMC=y
diff --git a/configs/at91sam9x5ek_nandflash_defconfig b/configs/at91sam9x5ek_nandflash_defconfig
index 6e36e56..73e1734 100644
--- a/configs/at91sam9x5ek_nandflash_defconfig
+++ b/configs/at91sam9x5ek_nandflash_defconfig
@@ -25,13 +25,13 @@
CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,768k(uboot)ro,256k(env_redundant),256k(env),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=6 root=ubi0:rootfs rw"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="nand read 0x22000000 0x200000 0x600000; nand read 0x21000000 0x180000 0x20000; bootz 0x22000000 - 0x21000000"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=281
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot> "
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=281
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_MMC=y
diff --git a/configs/at91sam9x5ek_spiflash_defconfig b/configs/at91sam9x5ek_spiflash_defconfig
index 2256fa3..bec1861 100644
--- a/configs/at91sam9x5ek_spiflash_defconfig
+++ b/configs/at91sam9x5ek_spiflash_defconfig
@@ -27,13 +27,13 @@
CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,768k(uboot)ro,256k(env_redundant),256k(env),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=6 root=ubi0:rootfs rw"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="sf probe 0; sf read 0x22000000 0x100000 0x300000; bootm 0x22000000"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=281
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot> "
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=281
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_MMC=y
diff --git a/configs/at91sam9xeek_dataflash_cs0_defconfig b/configs/at91sam9xeek_dataflash_cs0_defconfig
index 598a9d5..97c8e98 100644
--- a/configs/at91sam9xeek_dataflash_cs0_defconfig
+++ b/configs/at91sam9xeek_dataflash_cs0_defconfig
@@ -23,10 +23,10 @@
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock0 mtdparts=atmel_nand:-(root) rw rootfstype=jffs2"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="sf probe 0:0; sf read 0x22000000 0x84000 0x294000; bootm 0x22000000"
-# CONFIG_DISPLAY_BOARDINFO is not set
-CONFIG_SYS_PROMPT="U-Boot> "
CONFIG_SYS_CBSIZE=256
CONFIG_SYS_PBSIZE=281
+# CONFIG_DISPLAY_BOARDINFO is not set
+CONFIG_SYS_PROMPT="U-Boot> "
# CONFIG_CMD_BDI is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
diff --git a/configs/at91sam9xeek_dataflash_cs1_defconfig b/configs/at91sam9xeek_dataflash_cs1_defconfig
index 3573c81..6c60df2 100644
--- a/configs/at91sam9xeek_dataflash_cs1_defconfig
+++ b/configs/at91sam9xeek_dataflash_cs1_defconfig
@@ -23,10 +23,10 @@
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock0 mtdparts=atmel_nand:-(root) rw rootfstype=jffs2"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="sf probe 0:1; sf read 0x22000000 0x84000 0x294000; bootm 0x22000000"
-# CONFIG_DISPLAY_BOARDINFO is not set
-CONFIG_SYS_PROMPT="U-Boot> "
CONFIG_SYS_CBSIZE=256
CONFIG_SYS_PBSIZE=281
+# CONFIG_DISPLAY_BOARDINFO is not set
+CONFIG_SYS_PROMPT="U-Boot> "
# CONFIG_CMD_BDI is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
diff --git a/configs/at91sam9xeek_nandflash_defconfig b/configs/at91sam9xeek_nandflash_defconfig
index 51824f2..0f0aa28 100644
--- a/configs/at91sam9xeek_nandflash_defconfig
+++ b/configs/at91sam9xeek_nandflash_defconfig
@@ -22,10 +22,10 @@
CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) root=/dev/mtdblock7 rw rootfstype=jffs2"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="nand read 0x22000000 0x200000 0x300000; bootm"
-# CONFIG_DISPLAY_BOARDINFO is not set
-CONFIG_SYS_PROMPT="U-Boot> "
CONFIG_SYS_CBSIZE=256
CONFIG_SYS_PBSIZE=281
+# CONFIG_DISPLAY_BOARDINFO is not set
+CONFIG_SYS_PROMPT="U-Boot> "
# CONFIG_CMD_BDI is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
diff --git a/configs/axm_defconfig b/configs/axm_defconfig
index e1a01b2..1a892a9 100644
--- a/configs/axm_defconfig
+++ b/configs/axm_defconfig
@@ -3,7 +3,6 @@
CONFIG_SPL_SKIP_LOWLEVEL_INIT_ONLY=y
CONFIG_SPL_SYS_DCACHE_OFF=y
CONFIG_ARCH_CPU_INIT=y
-CONFIG_SYS_THUMB_BUILD=y
# CONFIG_SPL_USE_ARCH_MEMCPY is not set
# CONFIG_SPL_USE_ARCH_MEMSET is not set
CONFIG_ARCH_AT91=y
@@ -34,6 +33,8 @@
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run flash_self"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=281
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_MAX_SIZE=0x3e00
@@ -57,8 +58,6 @@
CONFIG_SPL_DM_SPI_FLASH=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot> "
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=281
# CONFIG_CMD_BDI is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
@@ -82,7 +81,6 @@
CONFIG_CLK_AT91=y
CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
-CONFIG_MTD=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
diff --git a/configs/axs101_defconfig b/configs/axs101_defconfig
index 13d2706..84b04d2 100644
--- a/configs/axs101_defconfig
+++ b/configs/axs101_defconfig
@@ -12,16 +12,16 @@
CONFIG_SYS_CLK_FREQ=750000000
CONFIG_SYS_LOAD_ADDR=0x82000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_BOOTM_LEN=0x8000000
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS3,115200n8"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=278
CONFIG_BOARD_TYPES=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="AXS# "
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=278
-CONFIG_SYS_BOOTM_LEN=0x8000000
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_SPI=y
diff --git a/configs/axs103_defconfig b/configs/axs103_defconfig
index 4dd25b1..2db90f0 100644
--- a/configs/axs103_defconfig
+++ b/configs/axs103_defconfig
@@ -12,16 +12,16 @@
CONFIG_SYS_CLK_FREQ=100000000
CONFIG_SYS_LOAD_ADDR=0x82000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_BOOTM_LEN=0x8000000
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS3,115200n8"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=278
CONFIG_BOARD_TYPES=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="AXS# "
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=278
-CONFIG_SYS_BOOTM_LEN=0x8000000
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_SPI=y
diff --git a/configs/bananapi-m2-pro_defconfig b/configs/bananapi-m2-pro_defconfig
index 2a3958b..755bccb 100644
--- a/configs/bananapi-m2-pro_defconfig
+++ b/configs/bananapi-m2-pro_defconfig
@@ -56,6 +56,7 @@
CONFIG_DEBUG_UART_SKIP_INIT=y
CONFIG_MESON_SERIAL=y
CONFIG_USB=y
+CONFIG_DM_USB_GADGET=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_DWC3=y
diff --git a/configs/bananapi-m2s_defconfig b/configs/bananapi-m2s_defconfig
index 405ce3a..af8dace 100644
--- a/configs/bananapi-m2s_defconfig
+++ b/configs/bananapi-m2s_defconfig
@@ -61,6 +61,7 @@
CONFIG_DEBUG_UART_SKIP_INIT=y
CONFIG_MESON_SERIAL=y
CONFIG_USB=y
+CONFIG_DM_USB_GADGET=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_DWC3=y
diff --git a/configs/bayleybay_defconfig b/configs/bayleybay_defconfig
index f1dec69..4a893ed 100644
--- a/configs/bayleybay_defconfig
+++ b/configs/bayleybay_defconfig
@@ -23,10 +23,10 @@
CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="ext2load scsi 0:3 01000000 /boot/vmlinuz; zboot 01000000"
+CONFIG_SYS_PBSIZE=532
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_CPU=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
diff --git a/configs/bcm7260_defconfig b/configs/bcm7260_defconfig
index b1219b8..2bf3c0d 100644
--- a/configs/bcm7260_defconfig
+++ b/configs/bcm7260_defconfig
@@ -13,19 +13,18 @@
CONFIG_SYS_LOAD_ADDR=0x02000000
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_BOOTDELAY=1
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="fdt addr ${fdtcontroladdr};fdt move ${fdtcontroladdr} ${fdtsaveaddr};fdt addr ${fdtsaveaddr};"
+CONFIG_SYS_CBSIZE=512
+CONFIG_SYS_PBSIZE=536
CONFIG_BOARD_LATE_INIT=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot>"
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_CBSIZE=512
-CONFIG_SYS_PBSIZE=536
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GPT=y
-# CONFIG_RANDOM_UUID is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EXT2=y
@@ -42,4 +41,5 @@
CONFIG_MTD=y
CONFIG_DM_SERIAL=y
CONFIG_SYS_NS16550=y
+# CONFIG_RANDOM_UUID is not set
# CONFIG_EFI_LOADER is not set
diff --git a/configs/bcm7445_defconfig b/configs/bcm7445_defconfig
index 6013e51..07e3b57 100644
--- a/configs/bcm7445_defconfig
+++ b/configs/bcm7445_defconfig
@@ -14,16 +14,16 @@
CONFIG_SYS_LOAD_ADDR=0x02000000
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_BOOTDELAY=1
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="fdt addr ${fdtcontroladdr};fdt move ${fdtcontroladdr} ${fdtsaveaddr};fdt addr ${fdtsaveaddr};"
+CONFIG_SYS_CBSIZE=512
+CONFIG_SYS_PBSIZE=536
CONFIG_BOARD_LATE_INIT=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot>"
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_CBSIZE=512
-CONFIG_SYS_PBSIZE=536
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_ASKENV=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF_TEST=y
diff --git a/configs/bcm947622_defconfig b/configs/bcm947622_defconfig
index 38d35d4..b8abfcf 100644
--- a/configs/bcm947622_defconfig
+++ b/configs/bcm947622_defconfig
@@ -12,11 +12,11 @@
CONFIG_IDENT_STRING=" Broadcom BCM47622"
CONFIG_SYS_LOAD_ADDR=0x01000000
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_CMD_CACHE=y
CONFIG_OF_EMBED=y
CONFIG_CLK=y
diff --git a/configs/bcm963138_defconfig b/configs/bcm963138_defconfig
index 5a4b27d..40802bb 100644
--- a/configs/bcm963138_defconfig
+++ b/configs/bcm963138_defconfig
@@ -12,11 +12,11 @@
CONFIG_IDENT_STRING=" Broadcom BCM63138"
CONFIG_SYS_LOAD_ADDR=0x01000000
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_CACHE=y
CONFIG_OF_EMBED=y
CONFIG_CLK=y
diff --git a/configs/bcm963148_defconfig b/configs/bcm963148_defconfig
index 78e51dc..b568e82 100644
--- a/configs/bcm963148_defconfig
+++ b/configs/bcm963148_defconfig
@@ -13,11 +13,11 @@
CONFIG_IDENT_STRING=" Broadcom BCM63148"
CONFIG_SYS_LOAD_ADDR=0x01000000
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_CACHE=y
CONFIG_OF_EMBED=y
CONFIG_CLK=y
diff --git a/configs/bcm963178_defconfig b/configs/bcm963178_defconfig
index 8b378fd..4f4247e 100644
--- a/configs/bcm963178_defconfig
+++ b/configs/bcm963178_defconfig
@@ -13,11 +13,11 @@
CONFIG_IDENT_STRING=" Broadcom BCM63178"
CONFIG_SYS_LOAD_ADDR=0x01000000
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_CACHE=y
CONFIG_OF_EMBED=y
CONFIG_CLK=y
diff --git a/configs/bcm96756_defconfig b/configs/bcm96756_defconfig
index da24e26..556aa96 100644
--- a/configs/bcm96756_defconfig
+++ b/configs/bcm96756_defconfig
@@ -13,11 +13,11 @@
CONFIG_IDENT_STRING=" Broadcom BCM6756"
CONFIG_SYS_LOAD_ADDR=0x01000000
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_CACHE=y
CONFIG_OF_EMBED=y
CONFIG_CLK=y
diff --git a/configs/bcm968380gerg_ram_defconfig b/configs/bcm968380gerg_ram_defconfig
index 8d86066..8af569c 100644
--- a/configs/bcm968380gerg_ram_defconfig
+++ b/configs/bcm968380gerg_ram_defconfig
@@ -17,13 +17,13 @@
CONFIG_MIPS_BOOT_FDT=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_SYS_CBSIZE=512
+CONFIG_SYS_PBSIZE=545
CONFIG_DISPLAY_CPUINFO=y
CONFIG_SYS_MALLOC_BOOTPARAMS=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="bcm968380gerg # "
CONFIG_SYS_MAXARGS=24
-CONFIG_SYS_CBSIZE=512
-CONFIG_SYS_PBSIZE=545
CONFIG_CMD_CPU=y
CONFIG_CMD_LICENSE=y
# CONFIG_CMD_BOOTD is not set
diff --git a/configs/bcm96846_defconfig b/configs/bcm96846_defconfig
index 9a96747..b9337af 100644
--- a/configs/bcm96846_defconfig
+++ b/configs/bcm96846_defconfig
@@ -13,11 +13,11 @@
CONFIG_IDENT_STRING=" Broadcom BCM6846"
CONFIG_SYS_LOAD_ADDR=0x01000000
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_CACHE=y
CONFIG_OF_EMBED=y
CONFIG_CLK=y
diff --git a/configs/bcm96855_defconfig b/configs/bcm96855_defconfig
index 54c35ee..2108c1f 100644
--- a/configs/bcm96855_defconfig
+++ b/configs/bcm96855_defconfig
@@ -13,11 +13,11 @@
CONFIG_IDENT_STRING=" Broadcom BCM6855"
CONFIG_SYS_LOAD_ADDR=0x01000000
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_CACHE=y
CONFIG_OF_EMBED=y
CONFIG_CLK=y
diff --git a/configs/bcm96878_defconfig b/configs/bcm96878_defconfig
index ea0d02e..39414ba 100644
--- a/configs/bcm96878_defconfig
+++ b/configs/bcm96878_defconfig
@@ -13,11 +13,11 @@
CONFIG_IDENT_STRING=" Broadcom BCM6878"
CONFIG_SYS_LOAD_ADDR=0x01000000
CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_CACHE=y
CONFIG_OF_EMBED=y
CONFIG_CLK=y
diff --git a/configs/bcm_ns3_defconfig b/configs/bcm_ns3_defconfig
index d316012..f8a3b83 100644
--- a/configs/bcm_ns3_defconfig
+++ b/configs/bcm_ns3_defconfig
@@ -15,10 +15,12 @@
CONFIG_FIT_SIGNATURE_MAX_SIZE=0x20000000
CONFIG_FIT_VERBOSE=y
CONFIG_LEGACY_IMAGE_FORMAT=y
+CONFIG_SYS_BOOTM_LEN=0x1800000
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run flash_pending_rfs_imgs;run fastboot_nitro && run bootcmd_mmc_fits || run bootcmd_usb || run bootcmd_pxe"
+CONFIG_SYS_PBSIZE=1049
CONFIG_LOGLEVEL=7
CONFIG_SILENT_CONSOLE=y
CONFIG_SILENT_U_BOOT_ONLY=y
@@ -27,9 +29,7 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="u-boot> "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=1049
# CONFIG_SYS_XTRACE is not set
-CONFIG_SYS_BOOTM_LEN=0x1800000
CONFIG_CMD_GPT=y
CONFIG_CMD_GPT_RENAME=y
CONFIG_CMD_MMC=y
diff --git a/configs/beaver_defconfig b/configs/beaver_defconfig
index a4d299e..0d4e410 100644
--- a/configs/beaver_defconfig
+++ b/configs/beaver_defconfig
@@ -16,6 +16,7 @@
CONFIG_SYS_LOAD_ADDR=0x81000000
CONFIG_PCI=y
CONFIG_OF_SYSTEM_SETUP=y
+CONFIG_SYS_PBSIZE=2084
CONFIG_CONSOLE_MUX=y
CONFIG_SYS_STDIO_DEREGISTER=y
CONFIG_SPL_FOOTPRINT_LIMIT=y
@@ -27,7 +28,6 @@
CONFIG_SPL_SYS_MALLOC_SIZE=0x10000
CONFIG_SYS_PROMPT="Tegra30 (Beaver) # "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=2084
# CONFIG_CMD_IMI is not set
CONFIG_CMD_DFU=y
CONFIG_CMD_GPIO=y
@@ -45,7 +45,6 @@
CONFIG_ENV_OVERWRITE=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_MMC_ENV_PART=2
-CONFIG_SPL_DM=y
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
CONFIG_DFU_SF=y
diff --git a/configs/beelink-gt1-ultimate_defconfig b/configs/beelink-gt1-ultimate_defconfig
index 1313dde..00fdad8 100644
--- a/configs/beelink-gt1-ultimate_defconfig
+++ b/configs/beelink-gt1-ultimate_defconfig
@@ -46,7 +46,7 @@
CONFIG_DM_MDIO=y
CONFIG_DM_MDIO_MUX=y
CONFIG_ETH_DESIGNWARE_MESON8B=y
-CONFIG_MDIO_MUX_MMIOREG=y
+CONFIG_MDIO_MUX_MESON_GXL=y
CONFIG_MESON_GXL_USB_PHY=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_MESON_GXL=y
diff --git a/configs/bitmain_antminer_s9_defconfig b/configs/bitmain_antminer_s9_defconfig
index b8c9afd..fffa9cb 100644
--- a/configs/bitmain_antminer_s9_defconfig
+++ b/configs/bitmain_antminer_s9_defconfig
@@ -23,8 +23,10 @@
CONFIG_FIT_SIGNATURE=y
CONFIG_FIT_VERBOSE=y
CONFIG_LEGACY_IMAGE_FORMAT=y
+CONFIG_SYS_BOOTM_LEN=0x3c00000
CONFIG_BOOTDELAY=3
CONFIG_USE_PREBOOT=y
+CONFIG_SYS_PBSIZE=2075
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_CLOCKS=y
CONFIG_SPL_MAX_SIZE=0x30000
@@ -38,11 +40,8 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="antminer> "
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=2075
CONFIG_CMD_BOOTZ=y
-CONFIG_SYS_BOOTM_LEN=0x3c00000
# CONFIG_CMD_ELF is not set
-# CONFIG_CMD_DM is not set
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_FPGA_LOADBP=y
CONFIG_CMD_FPGA_LOADFS=y
@@ -50,6 +49,7 @@
CONFIG_CMD_FPGA_LOADP=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_MTD=y
CONFIG_CMD_NAND_LOCK_UNLOCK=y
CONFIG_CMD_PART=y
# CONFIG_CMD_SETEXPR is not set
@@ -60,11 +60,15 @@
CONFIG_CMD_PING=y
CONFIG_CMD_PXE=y
CONFIG_CMD_CACHE=y
+CONFIG_CMD_EFIDEBUG=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_MTDPARTS=y
+CONFIG_CMD_MTDPARTS_SPREAD=y
+CONFIG_CMD_MTDPARTS_SHOW_NET_SIZES=y
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_FAT=y
CONFIG_ENV_IS_IN_NAND=y
@@ -74,11 +78,12 @@
CONFIG_BOOTP_SERVERIP=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_DFU_TIMEOUT=y
+CONFIG_DFU_MMC=y
CONFIG_FPGA_XILINX=y
CONFIG_FPGA_ZYNQPL=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y
-CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_ZYNQ=y
CONFIG_NAND_ZYNQ_USE_BOOTLOADER1_TIMINGS=y
@@ -93,4 +98,6 @@
CONFIG_WDT=y
CONFIG_WDT_CDNS=y
CONFIG_SYS_TIMER_COUNTS_DOWN=y
-# CONFIG_EFI_LOADER is not set
+CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y
+CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y
+CONFIG_TOOLS_MKEFICAPSULE=y
diff --git a/configs/bk4r1_defconfig b/configs/bk4r1_defconfig
index 95f0c30..21fdcd3 100644
--- a/configs/bk4r1_defconfig
+++ b/configs/bk4r1_defconfig
@@ -29,10 +29,10 @@
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run set_gpio122; run set_gpio96; sf probe; run manage_userdata; run bootcmd_nand"
CONFIG_USE_PREBOOT=y
-CONFIG_BOARD_EARLY_INIT_F=y
-CONFIG_HUSH_PARSER=y
CONFIG_SYS_CBSIZE=256
CONFIG_SYS_PBSIZE=276
+CONFIG_BOARD_EARLY_INIT_F=y
+CONFIG_HUSH_PARSER=y
# CONFIG_CMD_ELF is not set
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_DM=y
diff --git a/configs/blanche_defconfig b/configs/blanche_defconfig
index a80e99e..59e9b3a 100644
--- a/configs/blanche_defconfig
+++ b/configs/blanche_defconfig
@@ -22,9 +22,9 @@
CONFIG_PCI=y
CONFIG_FIT=y
CONFIG_BOOTDELAY=3
-CONFIG_HUSH_PARSER=y
CONFIG_SYS_CBSIZE=256
CONFIG_SYS_PBSIZE=256
+CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_XIMG is not set
diff --git a/configs/boston32r2_defconfig b/configs/boston32r2_defconfig
index 82565bd..6f0024a 100644
--- a/configs/boston32r2_defconfig
+++ b/configs/boston32r2_defconfig
@@ -18,12 +18,12 @@
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_FIT_BEST_MATCH=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_PROMPT="boston # "
CONFIG_SYS_CBSIZE=256
CONFIG_SYS_PBSIZE=282
-CONFIG_SYS_BOOTM_LEN=0x4000000
+CONFIG_SYS_PROMPT="boston # "
# CONFIG_CMD_ELF is not set
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMTEST=y
diff --git a/configs/boston32r2el_defconfig b/configs/boston32r2el_defconfig
index a64b191..7192642 100644
--- a/configs/boston32r2el_defconfig
+++ b/configs/boston32r2el_defconfig
@@ -19,12 +19,12 @@
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_FIT_BEST_MATCH=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_PROMPT="boston # "
CONFIG_SYS_CBSIZE=256
CONFIG_SYS_PBSIZE=282
-CONFIG_SYS_BOOTM_LEN=0x4000000
+CONFIG_SYS_PROMPT="boston # "
# CONFIG_CMD_ELF is not set
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMTEST=y
diff --git a/configs/boston32r6_defconfig b/configs/boston32r6_defconfig
index e23726b..4335d04 100644
--- a/configs/boston32r6_defconfig
+++ b/configs/boston32r6_defconfig
@@ -19,12 +19,12 @@
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_FIT_BEST_MATCH=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_PROMPT="boston # "
CONFIG_SYS_CBSIZE=256
CONFIG_SYS_PBSIZE=282
-CONFIG_SYS_BOOTM_LEN=0x4000000
+CONFIG_SYS_PROMPT="boston # "
# CONFIG_CMD_ELF is not set
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMTEST=y
diff --git a/configs/boston32r6el_defconfig b/configs/boston32r6el_defconfig
index be8e4e4..b859a4f 100644
--- a/configs/boston32r6el_defconfig
+++ b/configs/boston32r6el_defconfig
@@ -20,12 +20,12 @@
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_FIT_BEST_MATCH=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_PROMPT="boston # "
CONFIG_SYS_CBSIZE=256
CONFIG_SYS_PBSIZE=282
-CONFIG_SYS_BOOTM_LEN=0x4000000
+CONFIG_SYS_PROMPT="boston # "
# CONFIG_CMD_ELF is not set
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMTEST=y
diff --git a/configs/boston64r2_defconfig b/configs/boston64r2_defconfig
index d4dcf0c..70354f1 100644
--- a/configs/boston64r2_defconfig
+++ b/configs/boston64r2_defconfig
@@ -19,12 +19,12 @@
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_FIT_BEST_MATCH=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_PROMPT="boston # "
CONFIG_SYS_CBSIZE=256
CONFIG_SYS_PBSIZE=282
-CONFIG_SYS_BOOTM_LEN=0x4000000
+CONFIG_SYS_PROMPT="boston # "
# CONFIG_CMD_ELF is not set
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMTEST=y
diff --git a/configs/boston64r2el_defconfig b/configs/boston64r2el_defconfig
index 731943a..eafb8c6 100644
--- a/configs/boston64r2el_defconfig
+++ b/configs/boston64r2el_defconfig
@@ -20,12 +20,12 @@
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_FIT_BEST_MATCH=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_PROMPT="boston # "
CONFIG_SYS_CBSIZE=256
CONFIG_SYS_PBSIZE=282
-CONFIG_SYS_BOOTM_LEN=0x4000000
+CONFIG_SYS_PROMPT="boston # "
# CONFIG_CMD_ELF is not set
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMTEST=y
diff --git a/configs/boston64r6_defconfig b/configs/boston64r6_defconfig
index 905a2fc..a6c8927 100644
--- a/configs/boston64r6_defconfig
+++ b/configs/boston64r6_defconfig
@@ -19,12 +19,12 @@
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_FIT_BEST_MATCH=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_PROMPT="boston # "
CONFIG_SYS_CBSIZE=256
CONFIG_SYS_PBSIZE=282
-CONFIG_SYS_BOOTM_LEN=0x4000000
+CONFIG_SYS_PROMPT="boston # "
# CONFIG_CMD_ELF is not set
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMTEST=y
diff --git a/configs/boston64r6el_defconfig b/configs/boston64r6el_defconfig
index a7bce2c..6cc2276 100644
--- a/configs/boston64r6el_defconfig
+++ b/configs/boston64r6el_defconfig
@@ -20,12 +20,12 @@
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_FIT_BEST_MATCH=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_PROMPT="boston # "
CONFIG_SYS_CBSIZE=256
CONFIG_SYS_PBSIZE=282
-CONFIG_SYS_BOOTM_LEN=0x4000000
+CONFIG_SYS_PROMPT="boston # "
# CONFIG_CMD_ELF is not set
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMTEST=y
diff --git a/configs/bpi-r2-pro-rk3568_defconfig b/configs/bpi-r2-pro-rk3568_defconfig
index c08ceba..e6e0e6f 100644
--- a/configs/bpi-r2-pro-rk3568_defconfig
+++ b/configs/bpi-r2-pro-rk3568_defconfig
@@ -77,7 +77,6 @@
CONFIG_PWM_ROCKCHIP=y
CONFIG_SPL_RAM=y
CONFIG_SCSI=y
-CONFIG_DM_SCSI=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550_MEM32=y
diff --git a/configs/brppt1_mmc_defconfig b/configs/brppt1_mmc_defconfig
index 640daa6..36d51e6 100644
--- a/configs/brppt1_mmc_defconfig
+++ b/configs/brppt1_mmc_defconfig
@@ -24,12 +24,15 @@
# CONFIG_LOCALVERSION_AUTO is not set
# CONFIG_EXPERT is not set
# CONFIG_FIT is not set
+CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_BOOTDELAY=0
CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run b_default"
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="mw ${cfgaddr} 0; mw ${dtbaddr} 0; run cfgscr; run brdefaultip"
+CONFIG_SYS_CBSIZE=512
+CONFIG_SYS_PBSIZE=532
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
@@ -46,10 +49,7 @@
CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_CBSIZE=512
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_BOOTZ=y
-CONFIG_SYS_BOOTM_LEN=0x2000000
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_EDITENV is not set
diff --git a/configs/brppt2_defconfig b/configs/brppt2_defconfig
index e17dad9..82abd4e 100644
--- a/configs/brppt2_defconfig
+++ b/configs/brppt2_defconfig
@@ -30,6 +30,7 @@
CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run b_default"
+CONFIG_SYS_PBSIZE=532
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_SYS_MALLOC=y
@@ -40,7 +41,6 @@
CONFIG_SYS_SPI_U_BOOT_OFFS=0x100000
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_IMI is not set
diff --git a/configs/brsmarc1_defconfig b/configs/brsmarc1_defconfig
index 3c3f6d5..0b43331 100644
--- a/configs/brsmarc1_defconfig
+++ b/configs/brsmarc1_defconfig
@@ -25,10 +25,13 @@
CONFIG_SYS_LOAD_ADDR=0x80000000
# CONFIG_EXPERT is not set
# CONFIG_FIT is not set
+CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_BOOTDELAY=0
CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run b_default"
+CONFIG_SYS_CBSIZE=512
+CONFIG_SYS_PBSIZE=532
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
@@ -50,14 +53,11 @@
CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_CBSIZE=512
-CONFIG_SYS_PBSIZE=532
# CONFIG_CMD_BOOTD is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_BOOTM_NETBSD is not set
# CONFIG_BOOTM_PLAN9 is not set
# CONFIG_BOOTM_RTEMS is not set
-CONFIG_SYS_BOOTM_LEN=0x2000000
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_EDITENV is not set
diff --git a/configs/brxre1_defconfig b/configs/brxre1_defconfig
index 91c2560..7e3b95e6 100644
--- a/configs/brxre1_defconfig
+++ b/configs/brxre1_defconfig
@@ -28,6 +28,8 @@
CONFIG_BOOTCOMMAND="mmc dev 1; run b_default"
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="run cfgscr; run brdefaultip"
+CONFIG_SYS_CBSIZE=512
+CONFIG_SYS_PBSIZE=532
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_CPUINFO is not set
@@ -42,8 +44,6 @@
CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_CBSIZE=512
-CONFIG_SYS_PBSIZE=532
# CONFIG_CMD_BOOTD is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_BOOTM_NETBSD is not set
@@ -53,7 +53,6 @@
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_EDITENV is not set
# CONFIG_CMD_CRC32 is not set
-CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
# CONFIG_CMD_LOADS is not set
diff --git a/configs/bubblegum_96_defconfig b/configs/bubblegum_96_defconfig
index 4ed956a..5e26ab7 100644
--- a/configs/bubblegum_96_defconfig
+++ b/configs/bubblegum_96_defconfig
@@ -9,16 +9,16 @@
CONFIG_MACH_S900=y
CONFIG_IDENT_STRING="\nBubblegum-96"
CONFIG_SYS_LOAD_ADDR=0x7ffc0
+CONFIG_SYS_BOOTM_LEN=0x800000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=5
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyOWL5,115200n8"
+CONFIG_SYS_PBSIZE=1051
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_PROMPT="U-Boot => "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=1051
-CONFIG_SYS_BOOTM_LEN=0x800000
CONFIG_CMD_MD5SUM=y
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_CACHE=y
diff --git a/configs/cardhu_defconfig b/configs/cardhu_defconfig
index 0cac763..90f3d92 100644
--- a/configs/cardhu_defconfig
+++ b/configs/cardhu_defconfig
@@ -15,6 +15,7 @@
CONFIG_SYS_LOAD_ADDR=0x81000000
CONFIG_PCI=y
CONFIG_OF_SYSTEM_SETUP=y
+CONFIG_SYS_PBSIZE=2084
CONFIG_CONSOLE_MUX=y
CONFIG_SYS_STDIO_DEREGISTER=y
CONFIG_SPL_FOOTPRINT_LIMIT=y
@@ -26,7 +27,6 @@
CONFIG_SPL_SYS_MALLOC_SIZE=0x10000
CONFIG_SYS_PROMPT="Tegra30 (Cardhu) # "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=2084
# CONFIG_CMD_IMI is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
@@ -41,7 +41,6 @@
CONFIG_ENV_OVERWRITE=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_MMC_ENV_PART=2
-CONFIG_SPL_DM=y
CONFIG_SYS_I2C_TEGRA=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_RTL8169=y
diff --git a/configs/cei-tk1-som_defconfig b/configs/cei-tk1-som_defconfig
index 628a9d1..f41cbce 100644
--- a/configs/cei-tk1-som_defconfig
+++ b/configs/cei-tk1-som_defconfig
@@ -19,6 +19,7 @@
CONFIG_SYS_LOAD_ADDR=0x81000000
CONFIG_PCI=y
CONFIG_OF_SYSTEM_SETUP=y
+CONFIG_SYS_PBSIZE=2086
CONFIG_CONSOLE_MUX=y
CONFIG_SYS_STDIO_DEREGISTER=y
CONFIG_SPL_FOOTPRINT_LIMIT=y
@@ -30,7 +31,6 @@
CONFIG_SPL_SYS_MALLOC_SIZE=0x10000
CONFIG_SYS_PROMPT="Tegra124 (TK1-SOM) # "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=2086
# CONFIG_CMD_IMI is not set
CONFIG_CMD_DFU=y
CONFIG_CMD_GPIO=y
@@ -47,7 +47,6 @@
CONFIG_ENV_OVERWRITE=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_MMC_ENV_PART=2
-CONFIG_SPL_DM=y
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
CONFIG_DFU_SF=y
diff --git a/configs/cgtqmx8_defconfig b/configs/cgtqmx8_defconfig
index aef7069..47f51e0 100644
--- a/configs/cgtqmx8_defconfig
+++ b/configs/cgtqmx8_defconfig
@@ -23,10 +23,13 @@
CONFIG_FIT=y
CONFIG_FIT_EXTERNAL_OFFSET=0x3000
CONFIG_SPL_LOAD_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x800000
CONFIG_BOOTDELAY=3
CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else booti ${loadaddr} - ${fdt_addr}; fi"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
CONFIG_LOG=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_MAX_SIZE=0x1f000
@@ -46,11 +49,8 @@
CONFIG_SPL_POWER_DOMAIN=y
CONFIG_SPL_WATCHDOG=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_CPU=y
# CONFIG_BOOTM_NETBSD is not set
-CONFIG_SYS_BOOTM_LEN=0x800000
# CONFIG_CMD_IMPORTENV is not set
CONFIG_CMD_CLK=y
CONFIG_CMD_DM=y
diff --git a/configs/cherryhill_defconfig b/configs/cherryhill_defconfig
index 4967be0..a84d4cc 100644
--- a/configs/cherryhill_defconfig
+++ b/configs/cherryhill_defconfig
@@ -16,10 +16,10 @@
CONFIG_SHOW_BOOT_PROGRESS=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="ext2load scsi 0:3 01000000 /boot/vmlinuz; zboot 01000000"
+CONFIG_SYS_PBSIZE=532
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_CPU=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SPI=y
diff --git a/configs/chromebit_mickey_defconfig b/configs/chromebit_mickey_defconfig
index 6a9b509..c413647 100644
--- a/configs/chromebit_mickey_defconfig
+++ b/configs/chromebit_mickey_defconfig
@@ -24,6 +24,7 @@
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_SPL_PAYLOAD="u-boot.img"
CONFIG_DEBUG_UART=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_USE_PREBOOT=y
CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-mickey.dtb"
CONFIG_SILENT_CONSOLE=y
@@ -40,7 +41,6 @@
# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
CONFIG_SPL_SPI_LOAD=y
CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
@@ -80,7 +80,6 @@
# CONFIG_SPL_DM_MMC is not set
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
-CONFIG_MTD=y
CONFIG_SF_DEFAULT_BUS=2
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_WINBOND=y
diff --git a/configs/chromebook_bob_defconfig b/configs/chromebook_bob_defconfig
index 1807e83..b5a5ae7 100644
--- a/configs/chromebook_bob_defconfig
+++ b/configs/chromebook_bob_defconfig
@@ -98,12 +98,12 @@
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_GENERIC=y
CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
CONFIG_USB_KEYBOARD=y
CONFIG_USB_HOST_ETHER=y
CONFIG_USB_ETHER_ASIX=y
diff --git a/configs/chromebook_coral_defconfig b/configs/chromebook_coral_defconfig
index 7d825c7..ebb3880 100644
--- a/configs/chromebook_coral_defconfig
+++ b/configs/chromebook_coral_defconfig
@@ -36,6 +36,8 @@
CONFIG_BOOTARGS_SUBST=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="tpm init; tpm startup TPM2_SU_CLEAR; bootflow scan -lb"
+CONFIG_SYS_CBSIZE=1024
+CONFIG_SYS_PBSIZE=1024
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_LOG=y
CONFIG_LOGF_FUNC=y
@@ -54,8 +56,6 @@
# CONFIG_SPL_SPI_FLASH_TINY is not set
CONFIG_TPL_SYS_MALLOC_SIMPLE=y
CONFIG_TPL_POWER=y
-CONFIG_SYS_CBSIZE=1024
-CONFIG_SYS_PBSIZE=1024
CONFIG_CMD_CPU=y
CONFIG_CMD_PMC=y
CONFIG_CMD_MEM_SEARCH=y
diff --git a/configs/chromebook_jerry_defconfig b/configs/chromebook_jerry_defconfig
index 9fdad32..4b80d6a 100644
--- a/configs/chromebook_jerry_defconfig
+++ b/configs/chromebook_jerry_defconfig
@@ -23,6 +23,7 @@
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_SPL_PAYLOAD="u-boot.img"
CONFIG_DEBUG_UART=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_USE_PREBOOT=y
CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-jerry.dtb"
CONFIG_SILENT_CONSOLE=y
@@ -39,7 +40,6 @@
# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
CONFIG_SPL_SPI_LOAD=y
CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
@@ -80,7 +80,6 @@
# CONFIG_SPL_DM_MMC is not set
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
-CONFIG_MTD=y
CONFIG_SF_DEFAULT_BUS=2
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_WINBOND=y
diff --git a/configs/chromebook_kevin_defconfig b/configs/chromebook_kevin_defconfig
index 638beee..20913d2 100644
--- a/configs/chromebook_kevin_defconfig
+++ b/configs/chromebook_kevin_defconfig
@@ -99,12 +99,12 @@
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_GENERIC=y
CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
CONFIG_USB_KEYBOARD=y
CONFIG_USB_HOST_ETHER=y
CONFIG_USB_ETHER_ASIX=y
diff --git a/configs/chromebook_link64_defconfig b/configs/chromebook_link64_defconfig
index eb8923c..7cf23b2 100644
--- a/configs/chromebook_link64_defconfig
+++ b/configs/chromebook_link64_defconfig
@@ -27,6 +27,7 @@
CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="ext2load scsi 0:3 01000000 /boot/vmlinuz; zboot 01000000"
+CONFIG_SYS_PBSIZE=532
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_MISC_INIT_R=y
@@ -41,7 +42,6 @@
CONFIG_SPL_PCH=y
CONFIG_SPL_RTC=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_CPU=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_SPI=y
diff --git a/configs/chromebook_link_defconfig b/configs/chromebook_link_defconfig
index 94ffb56..a9f91dd 100644
--- a/configs/chromebook_link_defconfig
+++ b/configs/chromebook_link_defconfig
@@ -23,11 +23,11 @@
CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="ext2load scsi 0:3 01000000 /boot/vmlinuz; zboot 01000000"
+CONFIG_SYS_PBSIZE=532
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_MISC_INIT_R=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_CPU=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_PART=y
diff --git a/configs/chromebook_minnie_defconfig b/configs/chromebook_minnie_defconfig
index 811d666..126b8ce 100644
--- a/configs/chromebook_minnie_defconfig
+++ b/configs/chromebook_minnie_defconfig
@@ -24,6 +24,7 @@
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_SPL_PAYLOAD="u-boot.img"
CONFIG_DEBUG_UART=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_USE_PREBOOT=y
CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-minnie.dtb"
CONFIG_SILENT_CONSOLE=y
@@ -40,7 +41,6 @@
# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
CONFIG_SPL_SPI_LOAD=y
CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
@@ -81,7 +81,6 @@
# CONFIG_SPL_DM_MMC is not set
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
-CONFIG_MTD=y
CONFIG_SF_DEFAULT_BUS=2
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_WINBOND=y
diff --git a/configs/chromebook_samus_defconfig b/configs/chromebook_samus_defconfig
index 611d649..40cc449 100644
--- a/configs/chromebook_samus_defconfig
+++ b/configs/chromebook_samus_defconfig
@@ -23,11 +23,11 @@
CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="ext2load scsi 0:3 01000000 /boot/vmlinuz; zboot 01000000"
+CONFIG_SYS_PBSIZE=532
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_MISC_INIT_R=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_CPU=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
diff --git a/configs/chromebook_samus_tpl_defconfig b/configs/chromebook_samus_tpl_defconfig
index 8b692bd..3e7298f 100644
--- a/configs/chromebook_samus_tpl_defconfig
+++ b/configs/chromebook_samus_tpl_defconfig
@@ -29,6 +29,7 @@
CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="ext2load scsi 0:3 01000000 /boot/vmlinuz; zboot 01000000"
+CONFIG_SYS_PBSIZE=532
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_MISC_INIT_R=y
@@ -46,7 +47,6 @@
CONFIG_TPL_DM_SPI=y
CONFIG_TPL_DM_SPI_FLASH=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_CPU=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
diff --git a/configs/chromebook_speedy_defconfig b/configs/chromebook_speedy_defconfig
index 8b6d995..2346c83 100644
--- a/configs/chromebook_speedy_defconfig
+++ b/configs/chromebook_speedy_defconfig
@@ -24,6 +24,7 @@
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_SPL_PAYLOAD="u-boot.img"
CONFIG_DEBUG_UART=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_USE_PREBOOT=y
CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-speedy.dtb"
CONFIG_SILENT_CONSOLE=y
@@ -40,7 +41,6 @@
# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
CONFIG_SPL_SPI_LOAD=y
CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
@@ -81,7 +81,6 @@
# CONFIG_SPL_DM_MMC is not set
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
-CONFIG_MTD=y
CONFIG_SF_DEFAULT_BUS=2
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_WINBOND=y
diff --git a/configs/chromebox_panther_defconfig b/configs/chromebox_panther_defconfig
index b6b12b4..b7396fa 100644
--- a/configs/chromebox_panther_defconfig
+++ b/configs/chromebox_panther_defconfig
@@ -19,11 +19,11 @@
CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="ext2load scsi 0:3 01000000 /boot/vmlinuz; zboot 01000000"
+CONFIG_SYS_PBSIZE=532
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_MISC_INIT_R=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_GPIO=y
CONFIG_CMD_PART=y
CONFIG_CMD_SPI=y
diff --git a/configs/ci20_mmc_defconfig b/configs/ci20_mmc_defconfig
index bf522e1..07c5a26 100644
--- a/configs/ci20_mmc_defconfig
+++ b/configs/ci20_mmc_defconfig
@@ -17,6 +17,7 @@
CONFIG_ARCH_JZ47XX=y
CONFIG_SYS_MIPS_TIMER_FREQ=1200000000
CONFIG_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS4,115200 rw rootwait root=/dev/mmcblk0p1"
CONFIG_USE_BOOTCOMMAND=y
@@ -36,7 +37,6 @@
CONFIG_SPL_MMC_TINY=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_DM=y
CONFIG_CMD_MMC=y
CONFIG_CMD_DHCP=y
diff --git a/configs/cl-som-imx7_defconfig b/configs/cl-som-imx7_defconfig
index 26f50a5..38177a7 100644
--- a/configs/cl-som-imx7_defconfig
+++ b/configs/cl-som-imx7_defconfig
@@ -26,6 +26,7 @@
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="echo SD boot attempt ...; run sdbootscript; run sdboot; echo eMMC boot attempt ...; run emmcbootscript; run emmcboot; echo USB boot attempt ...; run usbbootscript; "
+CONFIG_SYS_PBSIZE=543
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_MAX_SIZE=0xe000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
@@ -38,7 +39,6 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="CL-SOM-iMX7 # "
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=543
CONFIG_CMD_BOOTZ=y
# CONFIG_BOOTM_NETBSD is not set
# CONFIG_BOOTM_PLAN9 is not set
diff --git a/configs/clearfog_defconfig b/configs/clearfog_defconfig
index deb8c25..368c81c 100644
--- a/configs/clearfog_defconfig
+++ b/configs/clearfog_defconfig
@@ -62,7 +62,6 @@
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_MV=y
-CONFIG_MTD=y
CONFIG_SF_DEFAULT_BUS=1
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_SPI_FLASH_MTD=y
@@ -72,7 +71,6 @@
CONFIG_MII=y
CONFIG_MVMDIO=y
CONFIG_PCI_MVEBU=y
-CONFIG_SCSI=y
CONFIG_SPL_DEBUG_UART_BASE=0xd0012000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550=y
diff --git a/configs/clearfog_gt_8k_defconfig b/configs/clearfog_gt_8k_defconfig
index 7a49b44..df7e04a 100644
--- a/configs/clearfog_gt_8k_defconfig
+++ b/configs/clearfog_gt_8k_defconfig
@@ -18,6 +18,7 @@
CONFIG_DEBUG_UART=y
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SYS_BOOTM_LEN=0x800000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_USE_PREBOOT=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
@@ -26,7 +27,6 @@
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_BOOTM_LEN=0x800000
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
diff --git a/configs/clearfog_sata_defconfig b/configs/clearfog_sata_defconfig
index 32fecf1..c38d5cc 100644
--- a/configs/clearfog_sata_defconfig
+++ b/configs/clearfog_sata_defconfig
@@ -63,7 +63,6 @@
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_MV=y
-CONFIG_MTD=y
CONFIG_SF_DEFAULT_BUS=1
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_SPI_FLASH_MTD=y
@@ -73,7 +72,6 @@
CONFIG_MII=y
CONFIG_MVMDIO=y
CONFIG_PCI_MVEBU=y
-CONFIG_SCSI=y
CONFIG_SPL_DEBUG_UART_BASE=0xd0012000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550=y
diff --git a/configs/clearfog_spi_defconfig b/configs/clearfog_spi_defconfig
index 30510da..ccdcf09 100644
--- a/configs/clearfog_spi_defconfig
+++ b/configs/clearfog_spi_defconfig
@@ -63,7 +63,6 @@
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_MV=y
-CONFIG_MTD=y
CONFIG_SF_DEFAULT_BUS=1
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_SPI_FLASH_MTD=y
@@ -73,7 +72,6 @@
CONFIG_MII=y
CONFIG_MVMDIO=y
CONFIG_PCI_MVEBU=y
-CONFIG_SCSI=y
CONFIG_SPL_DEBUG_UART_BASE=0xd0012000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550=y
diff --git a/configs/cm_fx6_defconfig b/configs/cm_fx6_defconfig
index fab8351..b7590de 100644
--- a/configs/cm_fx6_defconfig
+++ b/configs/cm_fx6_defconfig
@@ -32,6 +32,7 @@
CONFIG_BOOTCOMMAND="run findfdt; run distro_bootcmd; run legacy_bootcmd"
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="usb start;sf probe"
+CONFIG_SYS_PBSIZE=538
CONFIG_MISC_INIT_R=y
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x80
@@ -41,7 +42,6 @@
CONFIG_SPL_WATCHDOG=y
CONFIG_SYS_PROMPT="CM-FX6 # "
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=538
# CONFIG_CMD_XIMG is not set
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
diff --git a/configs/cm_t43_defconfig b/configs/cm_t43_defconfig
index 1a558b0..2708033 100644
--- a/configs/cm_t43_defconfig
+++ b/configs/cm_t43_defconfig
@@ -27,6 +27,7 @@
CONFIG_SPL_SPI=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTCOMMAND="mmc dev 0; if mmc rescan; then if run loadbootscript; then run bootscript; fi; fi; mmc dev 1; if mmc rescan; then run emmcboot; fi;"
+CONFIG_SYS_PBSIZE=1050
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
@@ -47,7 +48,6 @@
CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
CONFIG_SYS_PROMPT="CM-T43 # "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=1050
CONFIG_CMD_ASKENV=y
CONFIG_CMD_EEPROM=y
CONFIG_CMD_EEPROM_LAYOUT=y
diff --git a/configs/cobra5272_defconfig b/configs/cobra5272_defconfig
index e28aae4..d7ce719 100644
--- a/configs/cobra5272_defconfig
+++ b/configs/cobra5272_defconfig
@@ -10,12 +10,12 @@
CONFIG_TARGET_COBRA5272=y
CONFIG_SYS_MONITOR_BASE=0xFFE00400
CONFIG_BOOTDELAY=5
+CONFIG_SYS_PBSIZE=281
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_MALLOC_BOOTPARAMS=y
# CONFIG_CMDLINE_EDITING is not set
# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="COBRA > "
-CONFIG_SYS_PBSIZE=281
CONFIG_CMD_IMLS=y
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
@@ -53,6 +53,7 @@
CONFIG_SYS_BR7_PRELIM_BOOL=y
CONFIG_SYS_BR7_PRELIM=0x701
CONFIG_SYS_OR7_PRELIM=0xFF00007C
+CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_SYS_MAX_FLASH_SECT=11
CONFIG_USE_SYS_MAX_FLASH_BANKS=y
diff --git a/configs/colibri-imx6ull-emmc_defconfig b/configs/colibri-imx6ull-emmc_defconfig
index 2fead59..285fed9 100644
--- a/configs/colibri-imx6ull-emmc_defconfig
+++ b/configs/colibri-imx6ull-emmc_defconfig
@@ -19,12 +19,12 @@
CONFIG_BOOTDELAY=1
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="test -n ${fdtfile} || setenv fdtfile imx6ull-colibri${variant}-${fdt_board}.dtb"
+CONFIG_SYS_PBSIZE=547
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SYS_PROMPT="Colibri iMX6ULL # "
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=547
# CONFIG_BOOTM_PLAN9 is not set
# CONFIG_BOOTM_RTEMS is not set
# CONFIG_CMD_ELF is not set
@@ -33,7 +33,6 @@
CONFIG_CMD_ASKENV=y
CONFIG_CRC32_VERIFY=y
CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
@@ -64,6 +63,9 @@
CONFIG_BOUNCE_BUFFER=y
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_BOOTCOUNT_ENV=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_FASTBOOT_BUF_ADDR=0x81100000
+CONFIG_FASTBOOT_UUU_SUPPORT=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_MXC=y
CONFIG_SUPPORT_EMMC_BOOT=y
@@ -86,4 +88,3 @@
CONFIG_USB_GADGET_VENDOR_NUM=0x1b67
CONFIG_USB_GADGET_PRODUCT_NUM=0x4000
CONFIG_CI_UDC=y
-CONFIG_USB_GADGET_DOWNLOAD=y
diff --git a/configs/colibri-imx6ull_defconfig b/configs/colibri-imx6ull_defconfig
index 5164374..a8a6330 100644
--- a/configs/colibri-imx6ull_defconfig
+++ b/configs/colibri-imx6ull_defconfig
@@ -21,12 +21,12 @@
CONFIG_BOOTCOMMAND="run ubiboot || run distro_bootcmd;"
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="test -n ${fdtfile} || setenv fdtfile imx6ull-colibri${variant}-${fdt_board}.dtb"
+CONFIG_SYS_PBSIZE=547
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SYS_PROMPT="Colibri iMX6ULL # "
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=547
# CONFIG_BOOTM_PLAN9 is not set
# CONFIG_BOOTM_RTEMS is not set
# CONFIG_CMD_ELF is not set
@@ -36,7 +36,6 @@
CONFIG_CRC32_VERIFY=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_DFU=y
-CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
@@ -75,6 +74,9 @@
CONFIG_BOOTCOUNT_ENV=y
CONFIG_DFU_NAND=y
CONFIG_SYS_DFU_DATA_BUF_SIZE=0x1000000
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_FASTBOOT_BUF_ADDR=0x81100000
+CONFIG_FASTBOOT_UUU_SUPPORT=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_MXC=y
CONFIG_FSL_USDHC=y
@@ -103,4 +105,3 @@
CONFIG_USB_GADGET_VENDOR_NUM=0x1b67
CONFIG_USB_GADGET_PRODUCT_NUM=0x4000
CONFIG_CI_UDC=y
-CONFIG_USB_GADGET_DOWNLOAD=y
diff --git a/configs/colibri-imx8x_defconfig b/configs/colibri-imx8x_defconfig
index 13c16bd..aa18d28 100644
--- a/configs/colibri-imx8x_defconfig
+++ b/configs/colibri-imx8x_defconfig
@@ -25,14 +25,14 @@
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="test -n ${fdtfile} || setenv fdtfile ${soc}-colibri-${fdt_board}.dtb"
+CONFIG_SYS_CBSIZE=2048
+CONFIG_SYS_PBSIZE=2068
CONFIG_LOG=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SYS_PROMPT="Colibri iMX8X # "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_CBSIZE=2048
-CONFIG_SYS_PBSIZE=2068
CONFIG_CMD_CPU=y
# CONFIG_BOOTM_NETBSD is not set
CONFIG_CMD_ASKENV=y
@@ -65,6 +65,7 @@
CONFIG_BOOTCOUNT_ENV=y
CONFIG_CLK_IMX8=y
CONFIG_CPU=y
+CONFIG_GPIO_HOG=y
CONFIG_FXL6408_GPIO=y
CONFIG_MXC_GPIO=y
CONFIG_DM_I2C=y
diff --git a/configs/colibri_imx6_defconfig b/configs/colibri_imx6_defconfig
index 51f3eec..70cb795 100644
--- a/configs/colibri_imx6_defconfig
+++ b/configs/colibri_imx6_defconfig
@@ -33,6 +33,8 @@
CONFIG_BOOTCOMMAND="run distro_bootcmd; usb start; setenv stdout serial,vidconsole; setenv stdin serial,usbkbd"
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="test -n ${fdtfile} || setenv fdtfile imx6dl-colibri-${fdt_board}.dtb"
+CONFIG_SYS_CBSIZE=1024
+CONFIG_SYS_PBSIZE=1056
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
@@ -43,8 +45,6 @@
CONFIG_SPL_I2C=y
CONFIG_SYS_PROMPT="Colibri iMX6 # "
CONFIG_SYS_MAXARGS=48
-CONFIG_SYS_CBSIZE=1024
-CONFIG_SYS_PBSIZE=1056
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_XIMG is not set
@@ -85,6 +85,9 @@
CONFIG_BOUNCE_BUFFER=y
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_BOOTCOUNT_ENV=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_FASTBOOT_BUF_ADDR=0x14420000
+CONFIG_FASTBOOT_UUU_SUPPORT=y
CONFIG_DM_I2C=y
CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_SYS_I2C_MXC=y
@@ -116,5 +119,4 @@
CONFIG_USB_GADGET_VENDOR_NUM=0x1b67
CONFIG_USB_GADGET_PRODUCT_NUM=0x4000
CONFIG_CI_UDC=y
-CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_SPL_USB_SDP_SUPPORT=y
diff --git a/configs/colibri_imx7_defconfig b/configs/colibri_imx7_defconfig
index eba2b41..d5c8604 100644
--- a/configs/colibri_imx7_defconfig
+++ b/configs/colibri_imx7_defconfig
@@ -22,13 +22,13 @@
CONFIG_BOOTCOMMAND="run ubiboot ; echo ; echo ubiboot failed ; run distro_bootcmd;"
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="test -n ${fdtfile} || setenv fdtfile ${soc}-colibri-${fdt_board}.dtb "
+CONFIG_SYS_PBSIZE=544
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_BOARD_LATE_INIT=y
CONFIG_SYS_PROMPT="Colibri iMX7 # "
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=544
# CONFIG_BOOTM_PLAN9 is not set
# CONFIG_BOOTM_RTEMS is not set
# CONFIG_CMD_IMI is not set
@@ -72,6 +72,9 @@
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_BOOTCOUNT_ENV=y
CONFIG_DFU_NAND=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_FASTBOOT_BUF_ADDR=0x81100000
+CONFIG_FASTBOOT_UUU_SUPPORT=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_MXC=y
CONFIG_FSL_USDHC=y
@@ -101,4 +104,3 @@
CONFIG_USB_GADGET_VENDOR_NUM=0x1b67
CONFIG_USB_GADGET_PRODUCT_NUM=0x4000
CONFIG_CI_UDC=y
-CONFIG_USB_GADGET_DOWNLOAD=y
diff --git a/configs/colibri_imx7_emmc_defconfig b/configs/colibri_imx7_emmc_defconfig
index 49a51e9..ae8406f 100644
--- a/configs/colibri_imx7_emmc_defconfig
+++ b/configs/colibri_imx7_emmc_defconfig
@@ -21,13 +21,13 @@
CONFIG_BOOTDELAY=1
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="test -n ${fdtfile} || setenv fdtfile ${soc}-colibri-emmc-${fdt_board}.dtb"
+CONFIG_SYS_PBSIZE=544
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_BOARD_LATE_INIT=y
CONFIG_SYS_PROMPT="Colibri iMX7 # "
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=544
# CONFIG_BOOTM_PLAN9 is not set
# CONFIG_BOOTM_RTEMS is not set
# CONFIG_CMD_IMI is not set
@@ -62,9 +62,9 @@
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_BOOTCOUNT_ENV=y
CONFIG_USB_FUNCTION_FASTBOOT=y
-CONFIG_FASTBOOT_BUF_ADDR=0x82000000
-CONFIG_FASTBOOT_BUF_SIZE=0x10000000
+CONFIG_FASTBOOT_BUF_ADDR=0x81100000
CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_UUU_SUPPORT=y
CONFIG_FASTBOOT_FLASH_MMC_DEV=0
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
CONFIG_DM_I2C=y
diff --git a/configs/colibri_t20_defconfig b/configs/colibri_t20_defconfig
index 62b7cc5..3c506ff 100644
--- a/configs/colibri_t20_defconfig
+++ b/configs/colibri_t20_defconfig
@@ -14,6 +14,8 @@
CONFIG_TARGET_COLIBRI_T20=y
CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_OF_SYSTEM_SETUP=y
+CONFIG_SYS_CBSIZE=1024
+CONFIG_SYS_PBSIZE=1055
CONFIG_SYS_STDIO_DEREGISTER=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
@@ -27,8 +29,6 @@
CONFIG_SPL_SYS_MALLOC_SIZE=0x10000
CONFIG_SYS_PROMPT="Colibri T20 # "
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_CBSIZE=1024
-CONFIG_SYS_PBSIZE=1055
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
@@ -53,9 +53,7 @@
CONFIG_IP_DEFRAG=y
CONFIG_TFTP_BLOCKSIZE=1536
CONFIG_TFTP_TSIZE=y
-CONFIG_SPL_DM=y
CONFIG_SYS_I2C_TEGRA=y
-CONFIG_MTD=y
CONFIG_DM_MTD=y
CONFIG_MTD_RAW_NAND=y
CONFIG_TEGRA_NAND=y
diff --git a/configs/colibri_t30_defconfig b/configs/colibri_t30_defconfig
index 43f9e21..c701203 100644
--- a/configs/colibri_t30_defconfig
+++ b/configs/colibri_t30_defconfig
@@ -14,6 +14,8 @@
CONFIG_TARGET_COLIBRI_T30=y
CONFIG_SYS_LOAD_ADDR=0x81000000
CONFIG_OF_SYSTEM_SETUP=y
+CONFIG_SYS_CBSIZE=1024
+CONFIG_SYS_PBSIZE=1055
CONFIG_CONSOLE_MUX=y
CONFIG_SYS_STDIO_DEREGISTER=y
# CONFIG_DISPLAY_BOARDINFO is not set
@@ -28,8 +30,6 @@
CONFIG_SPL_SYS_MALLOC_SIZE=0x10000
CONFIG_SYS_PROMPT="Colibri T30 # "
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_CBSIZE=1024
-CONFIG_SYS_PBSIZE=1055
# CONFIG_CMD_IMI is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
@@ -46,7 +46,6 @@
CONFIG_IP_DEFRAG=y
CONFIG_TFTP_BLOCKSIZE=16352
CONFIG_TFTP_TSIZE=y
-CONFIG_SPL_DM=y
CONFIG_SYS_I2C_TEGRA=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
diff --git a/configs/colibri_vf_defconfig b/configs/colibri_vf_defconfig
index 8b2324f..3d1319c 100644
--- a/configs/colibri_vf_defconfig
+++ b/configs/colibri_vf_defconfig
@@ -23,6 +23,7 @@
CONFIG_BOOTCOMMAND="run ubiboot || run distro_bootcmd;"
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="test -n ${fdtfile} || setenv fdtfile ${soc}-colibri-${fdt_board}.dtb"
+CONFIG_SYS_PBSIZE=1056
CONFIG_LOGLEVEL=3
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
@@ -31,7 +32,6 @@
CONFIG_HUSH_PARSER=y
# CONFIG_SYS_LONGHELP is not set
CONFIG_SYS_PROMPT="Colibri VFxx # "
-CONFIG_SYS_PBSIZE=1056
# CONFIG_CMD_BOOTD is not set
# CONFIG_CMD_BOOTM is not set
CONFIG_CMD_BOOTZ=y
@@ -40,7 +40,6 @@
CONFIG_CMD_ASKENV=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_DFU=y
-CONFIG_CMD_DM=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_FUSE=y
CONFIG_CMD_GPIO=y
diff --git a/configs/comtrend_ar5315u_ram_defconfig b/configs/comtrend_ar5315u_ram_defconfig
index 76f2f67..4d6e5a1 100644
--- a/configs/comtrend_ar5315u_ram_defconfig
+++ b/configs/comtrend_ar5315u_ram_defconfig
@@ -18,13 +18,13 @@
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_REMAKE_ELF=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_SYS_CBSIZE=512
+CONFIG_SYS_PBSIZE=541
CONFIG_DISPLAY_CPUINFO=y
CONFIG_SYS_MALLOC_BOOTPARAMS=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="AR-5315un # "
CONFIG_SYS_MAXARGS=24
-CONFIG_SYS_CBSIZE=512
-CONFIG_SYS_PBSIZE=541
CONFIG_CMD_CPU=y
CONFIG_CMD_LICENSE=y
# CONFIG_CMD_BOOTD is not set
diff --git a/configs/comtrend_ar5387un_ram_defconfig b/configs/comtrend_ar5387un_ram_defconfig
index fdbb23e..8d43885 100644
--- a/configs/comtrend_ar5387un_ram_defconfig
+++ b/configs/comtrend_ar5387un_ram_defconfig
@@ -18,13 +18,13 @@
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_REMAKE_ELF=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_SYS_CBSIZE=512
+CONFIG_SYS_PBSIZE=541
CONFIG_DISPLAY_CPUINFO=y
CONFIG_SYS_MALLOC_BOOTPARAMS=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="AR-5387un # "
CONFIG_SYS_MAXARGS=24
-CONFIG_SYS_CBSIZE=512
-CONFIG_SYS_PBSIZE=541
CONFIG_CMD_CPU=y
CONFIG_CMD_LICENSE=y
# CONFIG_CMD_BOOTD is not set
diff --git a/configs/comtrend_ct5361_ram_defconfig b/configs/comtrend_ct5361_ram_defconfig
index e0fdf31..49b3535 100644
--- a/configs/comtrend_ct5361_ram_defconfig
+++ b/configs/comtrend_ct5361_ram_defconfig
@@ -18,13 +18,13 @@
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_REMAKE_ELF=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_SYS_CBSIZE=512
+CONFIG_SYS_PBSIZE=539
CONFIG_DISPLAY_CPUINFO=y
CONFIG_SYS_MALLOC_BOOTPARAMS=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="CT-5361 # "
CONFIG_SYS_MAXARGS=24
-CONFIG_SYS_CBSIZE=512
-CONFIG_SYS_PBSIZE=539
CONFIG_CMD_CPU=y
CONFIG_CMD_LICENSE=y
# CONFIG_CMD_BOOTD is not set
@@ -50,6 +50,7 @@
CONFIG_BCM6345_GPIO=y
CONFIG_LED=y
CONFIG_LED_GPIO=y
+CONFIG_MTD=y
CONFIG_DM_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_SHOW_PROGRESS=0
diff --git a/configs/comtrend_vr3032u_ram_defconfig b/configs/comtrend_vr3032u_ram_defconfig
index c967490..aeb2d06 100644
--- a/configs/comtrend_vr3032u_ram_defconfig
+++ b/configs/comtrend_vr3032u_ram_defconfig
@@ -18,13 +18,13 @@
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_REMAKE_ELF=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_SYS_CBSIZE=512
+CONFIG_SYS_PBSIZE=540
CONFIG_DISPLAY_CPUINFO=y
CONFIG_SYS_MALLOC_BOOTPARAMS=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="VR-3032u # "
CONFIG_SYS_MAXARGS=24
-CONFIG_SYS_CBSIZE=512
-CONFIG_SYS_PBSIZE=540
CONFIG_CMD_CPU=y
CONFIG_CMD_LICENSE=y
# CONFIG_CMD_BOOTD is not set
diff --git a/configs/comtrend_wap5813n_ram_defconfig b/configs/comtrend_wap5813n_ram_defconfig
index 5c86c80..60f8f3f 100644
--- a/configs/comtrend_wap5813n_ram_defconfig
+++ b/configs/comtrend_wap5813n_ram_defconfig
@@ -18,13 +18,13 @@
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_REMAKE_ELF=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_SYS_CBSIZE=512
+CONFIG_SYS_PBSIZE=541
CONFIG_DISPLAY_CPUINFO=y
CONFIG_SYS_MALLOC_BOOTPARAMS=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="WAP-5813n # "
CONFIG_SYS_MAXARGS=24
-CONFIG_SYS_CBSIZE=512
-CONFIG_SYS_PBSIZE=541
CONFIG_CMD_CPU=y
CONFIG_CMD_LICENSE=y
# CONFIG_CMD_BOOTD is not set
@@ -50,6 +50,7 @@
CONFIG_BCM6345_GPIO=y
CONFIG_LED=y
CONFIG_LED_GPIO=y
+CONFIG_MTD=y
CONFIG_DM_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_SHOW_PROGRESS=0
diff --git a/configs/conga-qeval20-qa3-e3845-internal-uart_defconfig b/configs/conga-qeval20-qa3-e3845-internal-uart_defconfig
index e1e1afe..2512307 100644
--- a/configs/conga-qeval20-qa3-e3845-internal-uart_defconfig
+++ b/configs/conga-qeval20-qa3-e3845-internal-uart_defconfig
@@ -29,10 +29,10 @@
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="load scsi 0:2 03000000 /boot/vmlinuz-${kernel-ver}-generic;load scsi 0:2 04000000 /boot/initrd.img-${kernel-ver}-generic;run boot"
CONFIG_USE_PREBOOT=y
+CONFIG_SYS_PBSIZE=532
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_CPU=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
diff --git a/configs/conga-qeval20-qa3-e3845_defconfig b/configs/conga-qeval20-qa3-e3845_defconfig
index 27d6d4f..f511932 100644
--- a/configs/conga-qeval20-qa3-e3845_defconfig
+++ b/configs/conga-qeval20-qa3-e3845_defconfig
@@ -25,10 +25,10 @@
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="load scsi 0:2 03000000 /boot/vmlinuz-${kernel-ver}-generic;load scsi 0:2 04000000 /boot/initrd.img-${kernel-ver}-generic;run boot"
CONFIG_USE_PREBOOT=y
+CONFIG_SYS_PBSIZE=532
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_CPU=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
diff --git a/configs/controlcenterdc_defconfig b/configs/controlcenterdc_defconfig
index 50acfdf..351d392 100644
--- a/configs/controlcenterdc_defconfig
+++ b/configs/controlcenterdc_defconfig
@@ -73,7 +73,6 @@
CONFIG_NET_RETRY_COUNT=50
CONFIG_USE_ROOTPATH=y
CONFIG_SPL_OF_TRANSLATE=y
-CONFIG_SYS_SATA_MAX_PORTS=2
CONFIG_SCSI_AHCI=y
CONFIG_DM_PCA953X=y
CONFIG_DM_I2C=y
@@ -94,8 +93,6 @@
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCI_MVEBU=y
CONFIG_SCSI=y
-CONFIG_SCSI_AHCI_PLAT=y
-CONFIG_SYS_SCSI_MAX_SCSI_ID=2
CONFIG_SPL_DEBUG_UART_BASE=0xd0012000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550=y
diff --git a/configs/coreboot64_defconfig b/configs/coreboot64_defconfig
index 1f1327f..dec9b40 100644
--- a/configs/coreboot64_defconfig
+++ b/configs/coreboot64_defconfig
@@ -17,6 +17,7 @@
CONFIG_SHOW_BOOT_PROGRESS=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro"
+CONFIG_SYS_PBSIZE=532
CONFIG_PRE_CONSOLE_BUFFER=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_LOG=y
@@ -24,7 +25,6 @@
CONFIG_LOGF_FUNC=y
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SPL_NO_BSS_LIMIT=y
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_IDE=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SATA=y
diff --git a/configs/corstone1000_defconfig b/configs/corstone1000_defconfig
index 3cd6aa0..a86ac12 100644
--- a/configs/corstone1000_defconfig
+++ b/configs/corstone1000_defconfig
@@ -10,26 +10,25 @@
CONFIG_IDENT_STRING=" corstone1000 aarch64 "
CONFIG_SYS_LOAD_ADDR=0x82100000
CONFIG_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x800000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyAMA0 loglevel=9 ip=dhcp earlyprintk"
CONFIG_BOOTCOMMAND="echo Loading kernel from $kernel_addr to memory ... ; unzip $kernel_addr 0x90000000; loadm 0x90000000 $kernel_addr_r $filesize; usb start; usb reset; run distro_bootcmd; bootefi $kernel_addr_r $fdtcontroladdr;"
CONFIG_CONSOLE_RECORD=y
+CONFIG_SYS_CBSIZE=512
CONFIG_LOGLEVEL=7
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_BOARD_LATE_INIT=y
CONFIG_SYS_PROMPT="corstone1000# "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_CBSIZE=512
# CONFIG_CMD_CONSOLE is not set
CONFIG_CMD_FWU_METADATA=y
CONFIG_CMD_BOOTZ=y
-CONFIG_SYS_BOOTM_LEN=0x800000
# CONFIG_CMD_XIMG is not set
CONFIG_CMD_GPT=y
-# CONFIG_RANDOM_UUID is not set
CONFIG_CMD_LOADM=y
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_USB=y
@@ -45,6 +44,7 @@
CONFIG_ARM_FFA_TRANSPORT=y
CONFIG_MISC=y
# CONFIG_MMC is not set
+CONFIG_MTD=y
CONFIG_NVMXIP_QSPI=y
CONFIG_PHYLIB=y
CONFIG_PHY_SMSC=y
@@ -60,6 +60,7 @@
CONFIG_OPTEE=y
CONFIG_USB=y
CONFIG_USB_ISP1760=y
+# CONFIG_RANDOM_UUID is not set
CONFIG_ERRNO_STR=y
CONFIG_EFI_MM_COMM_TEE=y
CONFIG_FFA_SHARED_MM_BUF_SIZE=4096
diff --git a/configs/cortina_presidio-asic-base_defconfig b/configs/cortina_presidio-asic-base_defconfig
index ce967ce..82bfc0a 100644
--- a/configs/cortina_presidio-asic-base_defconfig
+++ b/configs/cortina_presidio-asic-base_defconfig
@@ -14,18 +14,18 @@
CONFIG_IDENT_STRING="Presidio-SoC"
CONFIG_SYS_LOAD_ADDR=0x10000000
CONFIG_REMAKE_ELF=y
+CONFIG_SYS_BOOTM_LEN=0xc00000
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_SHOW_BOOT_PROGRESS=y
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="earlycon=serial,0xf4329148 console=ttyS0,115200 root=/dev/ram0"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_LAST_STAGE_INIT=y
CONFIG_SYS_PROMPT="G3#"
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=276
-CONFIG_SYS_BOOTM_LEN=0xc00000
CONFIG_CMD_WDT=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIMER=y
diff --git a/configs/cortina_presidio-asic-emmc_defconfig b/configs/cortina_presidio-asic-emmc_defconfig
index c55fdd0..9bcb72d 100644
--- a/configs/cortina_presidio-asic-emmc_defconfig
+++ b/configs/cortina_presidio-asic-emmc_defconfig
@@ -14,15 +14,15 @@
CONFIG_IDENT_STRING="Presidio-SoC"
CONFIG_SYS_LOAD_ADDR=0x10000000
CONFIG_REMAKE_ELF=y
+CONFIG_SYS_BOOTM_LEN=0xc00000
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_SHOW_BOOT_PROGRESS=y
CONFIG_BOOTDELAY=3
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_SYS_PROMPT="G3#"
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=276
-CONFIG_SYS_BOOTM_LEN=0xc00000
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_WDT=y
diff --git a/configs/cortina_presidio-asic-pnand_defconfig b/configs/cortina_presidio-asic-pnand_defconfig
index af39a84..86bcbe6 100644
--- a/configs/cortina_presidio-asic-pnand_defconfig
+++ b/configs/cortina_presidio-asic-pnand_defconfig
@@ -14,18 +14,18 @@
CONFIG_IDENT_STRING="Presidio-SoC"
CONFIG_SYS_LOAD_ADDR=0x10000000
CONFIG_REMAKE_ELF=y
+CONFIG_SYS_BOOTM_LEN=0xc00000
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_SHOW_BOOT_PROGRESS=y
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="earlycon=serial,0xf4329148 console=ttyS0,115200 root=/dev/ram0"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_LAST_STAGE_INIT=y
CONFIG_SYS_PROMPT="G3#"
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=276
-CONFIG_SYS_BOOTM_LEN=0xc00000
CONFIG_CMD_MTD=y
CONFIG_CMD_WDT=y
CONFIG_CMD_CACHE=y
diff --git a/configs/corvus_defconfig b/configs/corvus_defconfig
index 5eaa6db..3f05730 100644
--- a/configs/corvus_defconfig
+++ b/configs/corvus_defconfig
@@ -1,7 +1,6 @@
CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT_ONLY=y
CONFIG_SPL_SKIP_LOWLEVEL_INIT_ONLY=y
-CONFIG_SYS_THUMB_BUILD=y
# CONFIG_SPL_USE_ARCH_MEMCPY is not set
# CONFIG_SPL_USE_ARCH_MEMSET is not set
CONFIG_ARCH_AT91=y
@@ -31,6 +30,8 @@
CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) root=/dev/mtdblock7 rw rootfstype=jffs2"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="nand read 0x70000000 0x200000 0x300000;bootm 0x70000000"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=281
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_MAX_SIZE=0x3000
@@ -48,8 +49,6 @@
CONFIG_SPL_NAND_BASE=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot> "
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=281
# CONFIG_CMD_BDI is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
diff --git a/configs/cougarcanyon2_defconfig b/configs/cougarcanyon2_defconfig
index dd9d912..b733a57 100644
--- a/configs/cougarcanyon2_defconfig
+++ b/configs/cougarcanyon2_defconfig
@@ -18,10 +18,10 @@
CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="ext2load scsi 0:3 01000000 /boot/vmlinuz; zboot 01000000"
+CONFIG_SYS_PBSIZE=532
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_CPU=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_PART=y
diff --git a/configs/crownbay_defconfig b/configs/crownbay_defconfig
index cef6f82..58c9770 100644
--- a/configs/crownbay_defconfig
+++ b/configs/crownbay_defconfig
@@ -19,10 +19,10 @@
CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="ext2load scsi 0:3 01000000 /boot/vmlinuz; zboot 01000000"
+CONFIG_SYS_PBSIZE=532
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_CPU=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
diff --git a/configs/crs305-1g-4s-bit_defconfig b/configs/crs305-1g-4s-bit_defconfig
index 7b4305d..b3eaec8 100644
--- a/configs/crs305-1g-4s-bit_defconfig
+++ b/configs/crs305-1g-4s-bit_defconfig
@@ -16,6 +16,7 @@
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_FIT_BEST_MATCH=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Autoboot in %d seconds, to stop use 's' key\n"
CONFIG_AUTOBOOT_STOP_STR="s"
@@ -25,7 +26,6 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=96
CONFIG_CMD_BOOTZ=y
-CONFIG_SYS_BOOTM_LEN=0x4000000
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_MTD=y
CONFIG_CMD_SPI=y
@@ -40,7 +40,6 @@
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_BOOTCOUNT_ENV=y
# CONFIG_MMC is not set
-CONFIG_MTD=y
CONFIG_DM_MTD=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_MACRONIX=y
diff --git a/configs/crs305-1g-4s_defconfig b/configs/crs305-1g-4s_defconfig
index 8a155b3..cc3dea6 100644
--- a/configs/crs305-1g-4s_defconfig
+++ b/configs/crs305-1g-4s_defconfig
@@ -16,6 +16,7 @@
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_FIT_BEST_MATCH=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Autoboot in %d seconds, to stop use 's' key\n"
CONFIG_AUTOBOOT_STOP_STR="s"
@@ -25,7 +26,6 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=96
CONFIG_CMD_BOOTZ=y
-CONFIG_SYS_BOOTM_LEN=0x4000000
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_MTD=y
CONFIG_CMD_SPI=y
@@ -41,7 +41,6 @@
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_BOOTCOUNT_ENV=y
# CONFIG_MMC is not set
-CONFIG_MTD=y
CONFIG_DM_MTD=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_WINBOND=y
diff --git a/configs/crs326-24g-2s-bit_defconfig b/configs/crs326-24g-2s-bit_defconfig
index 94fdd8b..5dad70d 100644
--- a/configs/crs326-24g-2s-bit_defconfig
+++ b/configs/crs326-24g-2s-bit_defconfig
@@ -16,6 +16,7 @@
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_FIT_BEST_MATCH=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Autoboot in %d seconds, to stop use 's' key\n"
CONFIG_AUTOBOOT_STOP_STR="s"
@@ -25,7 +26,6 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=96
CONFIG_CMD_BOOTZ=y
-CONFIG_SYS_BOOTM_LEN=0x4000000
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_MTD=y
CONFIG_CMD_SPI=y
@@ -40,7 +40,6 @@
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_BOOTCOUNT_ENV=y
# CONFIG_MMC is not set
-CONFIG_MTD=y
CONFIG_DM_MTD=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_MACRONIX=y
diff --git a/configs/crs326-24g-2s_defconfig b/configs/crs326-24g-2s_defconfig
index 90a4a96..462588a 100644
--- a/configs/crs326-24g-2s_defconfig
+++ b/configs/crs326-24g-2s_defconfig
@@ -16,6 +16,7 @@
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_FIT_BEST_MATCH=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Autoboot in %d seconds, to stop use 's' key\n"
CONFIG_AUTOBOOT_STOP_STR="s"
@@ -25,7 +26,6 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=96
CONFIG_CMD_BOOTZ=y
-CONFIG_SYS_BOOTM_LEN=0x4000000
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_MTD=y
CONFIG_CMD_SPI=y
@@ -40,7 +40,6 @@
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_BOOTCOUNT_ENV=y
# CONFIG_MMC is not set
-CONFIG_MTD=y
CONFIG_DM_MTD=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_WINBOND=y
diff --git a/configs/crs328-4c-20s-4s-bit_defconfig b/configs/crs328-4c-20s-4s-bit_defconfig
index 31058fd..9e1474a 100644
--- a/configs/crs328-4c-20s-4s-bit_defconfig
+++ b/configs/crs328-4c-20s-4s-bit_defconfig
@@ -16,6 +16,7 @@
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_FIT_BEST_MATCH=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Autoboot in %d seconds, to stop use 's' key\n"
CONFIG_AUTOBOOT_STOP_STR="s"
@@ -25,7 +26,6 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=96
CONFIG_CMD_BOOTZ=y
-CONFIG_SYS_BOOTM_LEN=0x4000000
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_MTD=y
CONFIG_CMD_SPI=y
@@ -40,7 +40,6 @@
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_BOOTCOUNT_ENV=y
# CONFIG_MMC is not set
-CONFIG_MTD=y
CONFIG_DM_MTD=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_MACRONIX=y
diff --git a/configs/crs328-4c-20s-4s_defconfig b/configs/crs328-4c-20s-4s_defconfig
index 567a4d2..afa4c52 100644
--- a/configs/crs328-4c-20s-4s_defconfig
+++ b/configs/crs328-4c-20s-4s_defconfig
@@ -16,6 +16,7 @@
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_FIT_BEST_MATCH=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Autoboot in %d seconds, to stop use 's' key\n"
CONFIG_AUTOBOOT_STOP_STR="s"
@@ -25,7 +26,6 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=96
CONFIG_CMD_BOOTZ=y
-CONFIG_SYS_BOOTM_LEN=0x4000000
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_MTD=y
CONFIG_CMD_SPI=y
@@ -40,7 +40,6 @@
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_BOOTCOUNT_ENV=y
# CONFIG_MMC is not set
-CONFIG_MTD=y
CONFIG_DM_MTD=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_WINBOND=y
diff --git a/configs/cubieboard7_defconfig b/configs/cubieboard7_defconfig
index 6654ae2..7f016de 100644
--- a/configs/cubieboard7_defconfig
+++ b/configs/cubieboard7_defconfig
@@ -8,16 +8,16 @@
CONFIG_MACH_S700=y
CONFIG_IDENT_STRING="\ncubieboard7"
CONFIG_SYS_LOAD_ADDR=0x7ffc0
+CONFIG_SYS_BOOTM_LEN=0x800000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=5
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyOWL3,115200n8"
+CONFIG_SYS_PBSIZE=1051
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_PROMPT="U-Boot => "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=1051
-CONFIG_SYS_BOOTM_LEN=0x800000
CONFIG_CMD_MMC=y
CONFIG_MMC_OWL=y
CONFIG_PHY_REALTEK=y
diff --git a/configs/d2net_v2_defconfig b/configs/d2net_v2_defconfig
index 0f2b1b8..bb1bcb0 100644
--- a/configs/d2net_v2_defconfig
+++ b/configs/d2net_v2_defconfig
@@ -22,6 +22,7 @@
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="dhcp && run netconsole; if run usbload || run diskload; then bootm; fi"
CONFIG_USE_PREBOOT=y
+CONFIG_SYS_PBSIZE=1047
CONFIG_CONSOLE_MUX=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_MISC_INIT_R=y
@@ -29,7 +30,6 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="d2v2> "
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=1047
CONFIG_CMD_EEPROM=y
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=4
CONFIG_CMD_I2C=y
@@ -61,6 +61,7 @@
CONFIG_SYS_I2C_SLAVE=0x0
CONFIG_SYS_I2C_EEPROM_ADDR=0x50
# CONFIG_MMC is not set
+CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_MVGBE=y
diff --git a/configs/da850evm_defconfig b/configs/da850evm_defconfig
index 8043ecf..c7aaa30 100644
--- a/configs/da850evm_defconfig
+++ b/configs/da850evm_defconfig
@@ -32,6 +32,7 @@
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run envboot; run mmcboot; "
CONFIG_DEFAULT_FDT_FILE="da850-evm.dtb"
+CONFIG_SYS_PBSIZE=1050
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
@@ -55,7 +56,6 @@
CONFIG_SYS_SPI_U_BOOT_OFFS=0x8000
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot > "
-CONFIG_SYS_PBSIZE=1050
CONFIG_CRC32_VERIFY=y
CONFIG_CMD_MX_CYCLIC=y
CONFIG_CMD_DM=y
diff --git a/configs/da850evm_direct_nor_defconfig b/configs/da850evm_direct_nor_defconfig
index 2de4484..4d6efbe 100644
--- a/configs/da850evm_direct_nor_defconfig
+++ b/configs/da850evm_direct_nor_defconfig
@@ -24,6 +24,7 @@
CONFIG_BOOTARGS="mem=32M console=ttyS2,115200n8 root=/dev/mtdblock2 rw noinitrd ip=dhcp"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run envboot; run mmcboot; "
+CONFIG_SYS_PBSIZE=1050
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
@@ -32,7 +33,6 @@
CONFIG_MISC_INIT_R=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot > "
-CONFIG_SYS_PBSIZE=1050
# CONFIG_CMD_BOOTZ is not set
CONFIG_CMD_IMLS=y
CONFIG_CRC32_VERIFY=y
diff --git a/configs/da850evm_nand_defconfig b/configs/da850evm_nand_defconfig
index 62b8edd..ee920ad 100644
--- a/configs/da850evm_nand_defconfig
+++ b/configs/da850evm_nand_defconfig
@@ -29,6 +29,7 @@
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run envboot; run mmcboot; "
CONFIG_DEFAULT_FDT_FILE="da850-evm.dtb"
+CONFIG_SYS_PBSIZE=1050
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
@@ -53,7 +54,6 @@
CONFIG_SPL_NAND_BASE=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot > "
-CONFIG_SYS_PBSIZE=1050
CONFIG_CRC32_VERIFY=y
CONFIG_CMD_MX_CYCLIC=y
CONFIG_CMD_DM=y
diff --git a/configs/dalmore_defconfig b/configs/dalmore_defconfig
index 85b349f..b2d373d 100644
--- a/configs/dalmore_defconfig
+++ b/configs/dalmore_defconfig
@@ -15,6 +15,7 @@
CONFIG_TEGRA_ENABLE_UARTD=y
CONFIG_SYS_LOAD_ADDR=0x81000000
CONFIG_OF_SYSTEM_SETUP=y
+CONFIG_SYS_PBSIZE=2086
CONFIG_CONSOLE_MUX=y
CONFIG_SYS_STDIO_DEREGISTER=y
CONFIG_SPL_FOOTPRINT_LIMIT=y
@@ -26,7 +27,6 @@
CONFIG_SPL_SYS_MALLOC_SIZE=0x10000
CONFIG_SYS_PROMPT="Tegra114 (Dalmore) # "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=2086
# CONFIG_CMD_IMI is not set
CONFIG_CMD_DFU=y
CONFIG_CMD_GPIO=y
@@ -43,7 +43,6 @@
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_MMC_ENV_PART=2
-CONFIG_SPL_DM=y
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
CONFIG_DFU_SF=y
diff --git a/configs/db-88f6820-amc_defconfig b/configs/db-88f6820-amc_defconfig
index 71af33c..8919f17 100644
--- a/configs/db-88f6820-amc_defconfig
+++ b/configs/db-88f6820-amc_defconfig
@@ -64,7 +64,6 @@
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_MVTWSI=y
# CONFIG_MMC is not set
-CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_USE_FLASH_BBT=y
CONFIG_NAND_PXA3XX=y
diff --git a/configs/db-88f6820-amc_nand_defconfig b/configs/db-88f6820-amc_nand_defconfig
index f565972..76d8d34 100644
--- a/configs/db-88f6820-amc_nand_defconfig
+++ b/configs/db-88f6820-amc_nand_defconfig
@@ -67,7 +67,6 @@
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_MVTWSI=y
# CONFIG_MMC is not set
-CONFIG_MTD=y
CONFIG_SYS_NAND_USE_FLASH_BBT=y
CONFIG_NAND_PXA3XX=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x40000
diff --git a/configs/db-88f6820-gp_defconfig b/configs/db-88f6820-gp_defconfig
index ab16a54..cc98e35 100644
--- a/configs/db-88f6820-gp_defconfig
+++ b/configs/db-88f6820-gp_defconfig
@@ -74,7 +74,6 @@
CONFIG_MII=y
CONFIG_MVMDIO=y
CONFIG_PCI_MVEBU=y
-CONFIG_SCSI=y
CONFIG_SPL_DEBUG_UART_BASE=0xd0012000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550=y
diff --git a/configs/db-mv784mp-gp_defconfig b/configs/db-mv784mp-gp_defconfig
index 6ebf412..ea72fb9 100644
--- a/configs/db-mv784mp-gp_defconfig
+++ b/configs/db-mv784mp-gp_defconfig
@@ -65,7 +65,6 @@
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_MVTWSI=y
# CONFIG_MMC is not set
-CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_USE_FLASH_BBT=y
CONFIG_NAND_PXA3XX=y
diff --git a/configs/db-xc3-24g4xg_defconfig b/configs/db-xc3-24g4xg_defconfig
index c5f60e4..61ce6e7 100644
--- a/configs/db-xc3-24g4xg_defconfig
+++ b/configs/db-xc3-24g4xg_defconfig
@@ -46,7 +46,6 @@
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_MVTWSI=y
# CONFIG_MMC is not set
-CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_USE_FLASH_BBT=y
CONFIG_NAND_PXA3XX=y
diff --git a/configs/deneb_defconfig b/configs/deneb_defconfig
index 65b9809..6288d90 100644
--- a/configs/deneb_defconfig
+++ b/configs/deneb_defconfig
@@ -26,6 +26,7 @@
CONFIG_REMAKE_ELF=y
CONFIG_FIT=y
CONFIG_FIT_EXTERNAL_OFFSET=0x3000
+CONFIG_SYS_BOOTM_LEN=0x800000
CONFIG_BOOTDELAY=3
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press \"<Esc><Esc>\" to stop\n"
@@ -35,6 +36,8 @@
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="if usrbutton; then run flash_self_test; reset; fi;run flash_self;reset;"
+CONFIG_SYS_CBSIZE=2048
+CONFIG_SYS_PBSIZE=2073
CONFIG_LOG=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_MAX_SIZE=0x1f000
@@ -59,11 +62,8 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot# "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_CBSIZE=2048
-CONFIG_SYS_PBSIZE=2073
CONFIG_CMD_CPU=y
# CONFIG_BOOTM_NETBSD is not set
-CONFIG_SYS_BOOTM_LEN=0x800000
# CONFIG_CMD_EXPORTENV is not set
# CONFIG_CMD_IMPORTENV is not set
# CONFIG_CMD_CRC32 is not set
diff --git a/configs/dfi-bt700-q7x-151_defconfig b/configs/dfi-bt700-q7x-151_defconfig
index 6b5bbc1..ea0d30e 100644
--- a/configs/dfi-bt700-q7x-151_defconfig
+++ b/configs/dfi-bt700-q7x-151_defconfig
@@ -24,10 +24,10 @@
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="load scsi 0:1 03000000 /boot/vmlinuz-${kernel-ver}-generic;load scsi 0:1 04000000 /boot/initrd.img-${kernel-ver}-generic;run boot"
CONFIG_USE_PREBOOT=y
+CONFIG_SYS_PBSIZE=532
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_CPU=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
diff --git a/configs/dh_imx6_defconfig b/configs/dh_imx6_defconfig
index 154131e..18bae3c 100644
--- a/configs/dh_imx6_defconfig
+++ b/configs/dh_imx6_defconfig
@@ -37,13 +37,13 @@
CONFIG_SPL_FIT=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=3
+CONFIG_SYS_PBSIZE=532
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_SPI_LOAD=y
CONFIG_SYS_SPI_U_BOOT_OFFS=0x11400
CONFIG_SPL_WATCHDOG=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_UNZIP=y
CONFIG_CMD_DFU=y
@@ -56,6 +56,9 @@
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_CMD_WDT=y
+CONFIG_CMD_DHCP6=y
+CONFIG_CMD_TFTPPUT=y
+CONFIG_CMD_WGET=y
CONFIG_CMD_BOOTCOUNT=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
@@ -72,6 +75,10 @@
CONFIG_ETHPRIME="FEC"
CONFIG_VERSION_VARIABLE=y
CONFIG_ARP_TIMEOUT=200
+CONFIG_IP_DEFRAG=y
+CONFIG_TFTP_TSIZE=y
+CONFIG_PROT_TCP_SACK=y
+CONFIG_IPV6=y
CONFIG_BOUNCE_BUFFER=y
CONFIG_DWC_AHSATA=y
CONFIG_LBA48=y
diff --git a/configs/display5_defconfig b/configs/display5_defconfig
index 24f22f0..7707b32 100644
--- a/configs/display5_defconfig
+++ b/configs/display5_defconfig
@@ -36,6 +36,8 @@
CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="if run check_em_pad; then run recovery;else if test ${BOOT_FROM} = FACTORY; then run factory_nfs;else run boot_mmc;fi;fi"
+CONFIG_SYS_CBSIZE=2048
+CONFIG_SYS_PBSIZE=2076
CONFIG_MISC_INIT_R=y
CONFIG_SPL_BOOTCOUNT_LIMIT=y
CONFIG_SPL_SYS_MALLOC=y
@@ -55,8 +57,6 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="display5 > "
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_CBSIZE=2048
-CONFIG_SYS_PBSIZE=2076
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_ELF is not set
CONFIG_CMD_SPL=y
@@ -106,7 +106,6 @@
CONFIG_SYS_I2C_EEPROM_ADDR=0x50
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_FSL_USDHC=y
-CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SF_DEFAULT_BUS=1
CONFIG_SPI_FLASH_SFDP_SUPPORT=y
diff --git a/configs/display5_factory_defconfig b/configs/display5_factory_defconfig
index 19b1898..58f4751 100644
--- a/configs/display5_factory_defconfig
+++ b/configs/display5_factory_defconfig
@@ -34,6 +34,8 @@
CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="echo SDP Display5 recovery"
+CONFIG_SYS_CBSIZE=2048
+CONFIG_SYS_PBSIZE=2084
CONFIG_MISC_INIT_R=y
CONFIG_SPL_SYS_MALLOC=y
# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
@@ -50,8 +52,6 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="display5 factory > "
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_CBSIZE=2048
-CONFIG_SYS_PBSIZE=2084
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_ELF is not set
CONFIG_CMD_SPL=y
@@ -105,7 +105,6 @@
CONFIG_SYS_I2C_EEPROM_ADDR=0x50
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_FSL_USDHC=y
-CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SF_DEFAULT_BUS=1
CONFIG_SPI_FLASH_SFDP_SUPPORT=y
diff --git a/configs/dockstar_defconfig b/configs/dockstar_defconfig
index 59c4345..728e9d9 100644
--- a/configs/dockstar_defconfig
+++ b/configs/dockstar_defconfig
@@ -20,11 +20,11 @@
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs ${console} ${mtdparts} ${bootargs_root}; ubi part root; ubifsmount ubi:root; ubifsload 0x800000 ${kernel}; ubifsload 0x1100000 ${initrd}; bootm 0x800000 0x1100000"
CONFIG_USE_PREBOOT=y
+CONFIG_SYS_PBSIZE=1051
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="DockStar> "
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=1051
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_NAND=y
CONFIG_CMD_USB=y
diff --git a/configs/dra7xx_evm_defconfig b/configs/dra7xx_evm_defconfig
index c3a3ec2..ca6fa57 100644
--- a/configs/dra7xx_evm_defconfig
+++ b/configs/dra7xx_evm_defconfig
@@ -126,7 +126,6 @@
CONFIG_DM_REGULATOR_PALMAS=y
CONFIG_DM_REGULATOR_LP873X=y
CONFIG_PALMAS_POWER=y
-CONFIG_DM_SCSI=y
CONFIG_DM_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
diff --git a/configs/dra7xx_hs_evm_defconfig b/configs/dra7xx_hs_evm_defconfig
index 0a53f62..96a2bce 100644
--- a/configs/dra7xx_hs_evm_defconfig
+++ b/configs/dra7xx_hs_evm_defconfig
@@ -120,7 +120,6 @@
CONFIG_DM_REGULATOR_PALMAS=y
CONFIG_DM_REGULATOR_LP873X=y
CONFIG_PALMAS_POWER=y
-CONFIG_DM_SCSI=y
CONFIG_DM_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
diff --git a/configs/dra7xx_hs_evm_usb_defconfig b/configs/dra7xx_hs_evm_usb_defconfig
index 3a1b48f..aca6a3e 100644
--- a/configs/dra7xx_hs_evm_usb_defconfig
+++ b/configs/dra7xx_hs_evm_usb_defconfig
@@ -109,7 +109,6 @@
CONFIG_DM_REGULATOR_PALMAS=y
CONFIG_DM_REGULATOR_LP873X=y
CONFIG_PALMAS_POWER=y
-CONFIG_DM_SCSI=y
CONFIG_DM_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
diff --git a/configs/etamin_defconfig b/configs/draco-etamin_defconfig
similarity index 92%
rename from configs/etamin_defconfig
rename to configs/draco-etamin_defconfig
index 4ac0abc..a89494f 100644
--- a/configs/etamin_defconfig
+++ b/configs/draco-etamin_defconfig
@@ -2,7 +2,6 @@
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_TEXT_BASE=0x80100000
CONFIG_SYS_MALLOC_LEN=0x1000000
-CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
@@ -10,7 +9,6 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x980000
-CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="am335x-draco"
CONFIG_AM33XX=y
CONFIG_SYS_MPUCLK=300
@@ -22,8 +20,6 @@
CONFIG_ENV_OFFSET_REDUND=0xB80000
CONFIG_SPL_FS_FAT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
-CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI=y
CONFIG_SYS_LOAD_ADDR=0x81000000
CONFIG_ENV_VARS_UBOOT_CONFIG=y
CONFIG_BOOTDELAY=3
@@ -34,9 +30,9 @@
CONFIG_BOOT_RETRY_TIME=60
CONFIG_RESET_TO_RETRY=y
CONFIG_USE_PREBOOT=y
+CONFIG_SYS_PBSIZE=1049
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
-CONFIG_ARCH_MISC_INIT=y
CONFIG_SPL_BSS_START_ADDR=0x80000000
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
@@ -45,16 +41,12 @@
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
CONFIG_SPL_NAND_BASE=y
-CONFIG_SPL_DM_SPI_FLASH=y
-CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
CONFIG_SPL_WATCHDOG=y
CONFIG_SPL_YMODEM_SUPPORT=y
# CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC is not set
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot# "
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=1049
CONFIG_CMD_ASKENV=y
CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
@@ -76,7 +68,6 @@
CONFIG_MTDPARTS_DEFAULT="mtdparts=omap2-nand_concat:512k(spl),512k(spl.backup1),512k(spl.backup2),512k(spl.backup3),7680k(u-boot),2048k(u-boot.env0),2048k(u-boot.env1),2048k(mtdoops),-(rootfs)"
CONFIG_CMD_UBI=y
CONFIG_OF_CONTROL=y
-CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_EMBED=y
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_NAND=y
@@ -91,6 +82,8 @@
# CONFIG_SPL_BLK is not set
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_BOOTCOUNT_ENV=y
+CONFIG_CLK=y
+CONFIG_CLK_TI_CTRL=y
CONFIG_DFU_NAND=y
CONFIG_SYS_DFU_DATA_BUF_SIZE=0x100000
CONFIG_SYS_I2C_LEGACY=y
@@ -108,8 +101,6 @@
CONFIG_SYS_NAND_OOBSIZE=0xe0
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
CONFIG_SYS_NAND_U_BOOT_OFFS=0x200000
-CONFIG_DM_SPI_FLASH=y
-CONFIG_SPI_FLASH_WINBOND=y
CONFIG_MTD_UBI_FASTMAP=y
CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1
CONFIG_PHY_SMSC=y
diff --git a/configs/rastaban_defconfig b/configs/draco-rastaban_defconfig
similarity index 89%
rename from configs/rastaban_defconfig
rename to configs/draco-rastaban_defconfig
index 2149534..f4a9b86 100644
--- a/configs/rastaban_defconfig
+++ b/configs/draco-rastaban_defconfig
@@ -2,27 +2,22 @@
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_TEXT_BASE=0x80100000
CONFIG_SYS_MALLOC_LEN=0x1000000
-CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00
CONFIG_ENV_SIZE=0x2000
-CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="am335x-draco"
CONFIG_AM33XX=y
CONFIG_SYS_MPUCLK=300
CONFIG_TARGET_RASTABAN=y
-CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_BOOTCOUNT_BOOTLIMIT=3
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x2E0000
CONFIG_SPL_FS_FAT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
-CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI=y
CONFIG_SYS_LOAD_ADDR=0x81000000
CONFIG_ENV_VARS_UBOOT_CONFIG=y
CONFIG_BOOTDELAY=3
@@ -33,33 +28,29 @@
CONFIG_BOOT_RETRY_TIME=60
CONFIG_RESET_TO_RETRY=y
CONFIG_USE_PREBOOT=y
+CONFIG_SYS_PBSIZE=1049
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
-CONFIG_ARCH_MISC_INIT=y
CONFIG_SPL_BSS_START_ADDR=0x80000000
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x80208000
+# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
CONFIG_SPL_I2C=y
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
CONFIG_SPL_NAND_BASE=y
-CONFIG_SPL_DM_SPI_FLASH=y
-CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
CONFIG_SPL_WATCHDOG=y
CONFIG_SPL_YMODEM_SUPPORT=y
# CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC is not set
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot# "
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=1049
CONFIG_CMD_ASKENV=y
CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
-CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
@@ -75,7 +66,6 @@
CONFIG_MTDPARTS_DEFAULT="mtdparts=omap2-nand.0:128k(spl),128k(spl.backup1),128k(spl.backup2),128k(spl.backup3),1920k(u-boot),512k(u-boot.env0),512k(u-boot.env1),300m(rootfs),512k(mtdoops),-(configuration)"
CONFIG_CMD_UBI=y
CONFIG_OF_CONTROL=y
-CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_EMBED=y
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_NAND=y
@@ -90,12 +80,13 @@
# CONFIG_SPL_BLK is not set
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_BOOTCOUNT_ENV=y
+CONFIG_CLK=y
+CONFIG_CLK_TI_CTRL=y
CONFIG_DFU_NAND=y
CONFIG_SYS_DFU_DATA_BUF_SIZE=0x100000
CONFIG_SYS_I2C_LEGACY=y
CONFIG_SPL_SYS_I2C_LEGACY=y
-# CONFIG_SPL_DM_MMC is not set
-CONFIG_MMC_OMAP_HS=y
+# CONFIG_MMC is not set
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
@@ -104,8 +95,6 @@
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
CONFIG_SYS_NAND_U_BOOT_OFFS=0x80000
-CONFIG_DM_SPI_FLASH=y
-CONFIG_SPI_FLASH_WINBOND=y
CONFIG_MTD_UBI_FASTMAP=y
CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1
CONFIG_PHY_SMSC=y
diff --git a/configs/thuban_defconfig b/configs/draco-thuban_defconfig
similarity index 89%
rename from configs/thuban_defconfig
rename to configs/draco-thuban_defconfig
index 1134624..cf2c46b 100644
--- a/configs/thuban_defconfig
+++ b/configs/draco-thuban_defconfig
@@ -2,27 +2,22 @@
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_TEXT_BASE=0x80100000
CONFIG_SYS_MALLOC_LEN=0x1000000
-CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00
CONFIG_ENV_SIZE=0x2000
-CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="am335x-draco"
CONFIG_AM33XX=y
CONFIG_SYS_MPUCLK=300
CONFIG_TARGET_THUBAN=y
-CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_BOOTCOUNT_BOOTLIMIT=3
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x2E0000
CONFIG_SPL_FS_FAT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
-CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI=y
CONFIG_SYS_LOAD_ADDR=0x81000000
CONFIG_ENV_VARS_UBOOT_CONFIG=y
CONFIG_BOOTDELAY=3
@@ -33,33 +28,29 @@
CONFIG_BOOT_RETRY_TIME=60
CONFIG_RESET_TO_RETRY=y
CONFIG_USE_PREBOOT=y
+CONFIG_SYS_PBSIZE=1049
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
-CONFIG_ARCH_MISC_INIT=y
CONFIG_SPL_BSS_START_ADDR=0x80000000
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x80208000
+# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
CONFIG_SPL_I2C=y
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_ECC=y
CONFIG_SPL_NAND_BASE=y
-CONFIG_SPL_DM_SPI_FLASH=y
-CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
CONFIG_SPL_WATCHDOG=y
CONFIG_SPL_YMODEM_SUPPORT=y
# CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC is not set
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot# "
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=1049
CONFIG_CMD_ASKENV=y
CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
-CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
@@ -75,7 +66,6 @@
CONFIG_MTDPARTS_DEFAULT="mtdparts=omap2-nand.0:128k(spl),128k(spl.backup1),128k(spl.backup2),128k(spl.backup3),1920k(u-boot),512k(u-boot.env0),512k(u-boot.env1),512k(mtdoops),-(rootfs)"
CONFIG_CMD_UBI=y
CONFIG_OF_CONTROL=y
-CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_EMBED=y
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_NAND=y
@@ -90,12 +80,13 @@
# CONFIG_SPL_BLK is not set
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_BOOTCOUNT_ENV=y
+CONFIG_CLK=y
+CONFIG_CLK_TI_CTRL=y
CONFIG_DFU_NAND=y
CONFIG_SYS_DFU_DATA_BUF_SIZE=0x100000
CONFIG_SYS_I2C_LEGACY=y
CONFIG_SPL_SYS_I2C_LEGACY=y
-# CONFIG_SPL_DM_MMC is not set
-CONFIG_MMC_OMAP_HS=y
+# CONFIG_MMC is not set
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
@@ -104,8 +95,6 @@
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
CONFIG_SYS_NAND_U_BOOT_OFFS=0x80000
-CONFIG_DM_SPI_FLASH=y
-CONFIG_SPI_FLASH_WINBOND=y
CONFIG_MTD_UBI_FASTMAP=y
CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1
CONFIG_PHY_SMSC=y
diff --git a/configs/draco_defconfig b/configs/draco_defconfig
deleted file mode 100644
index 2a82087..0000000
--- a/configs/draco_defconfig
+++ /dev/null
@@ -1,126 +0,0 @@
-CONFIG_ARM=y
-CONFIG_ARCH_OMAP2PLUS=y
-CONFIG_TEXT_BASE=0x80100000
-CONFIG_SYS_MALLOC_LEN=0x1000000
-CONFIG_SPL_GPIO=y
-CONFIG_SPL_LIBCOMMON_SUPPORT=y
-CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_NR_DRAM_BANKS=1
-CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
-CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00
-CONFIG_ENV_SIZE=0x2000
-CONFIG_SPL_DM_SPI=y
-CONFIG_DEFAULT_DEVICE_TREE="am335x-draco"
-CONFIG_AM33XX=y
-CONFIG_SYS_MPUCLK=300
-CONFIG_TARGET_DRACO=y
-CONFIG_SPL_MMC=y
-CONFIG_SPL_SERIAL=y
-CONFIG_BOOTCOUNT_BOOTLIMIT=3
-CONFIG_SPL=y
-CONFIG_ENV_OFFSET_REDUND=0x2E0000
-CONFIG_SPL_FS_FAT=y
-CONFIG_SPL_LIBDISK_SUPPORT=y
-CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI=y
-CONFIG_SYS_LOAD_ADDR=0x81000000
-CONFIG_ENV_VARS_UBOOT_CONFIG=y
-CONFIG_BOOTDELAY=3
-CONFIG_AUTOBOOT_KEYED=y
-CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press \"<Esc><Esc>\" to stop\n"
-CONFIG_AUTOBOOT_STOP_STR="\x1b\x1b"
-CONFIG_BOOT_RETRY=y
-CONFIG_BOOT_RETRY_TIME=60
-CONFIG_RESET_TO_RETRY=y
-CONFIG_USE_PREBOOT=y
-CONFIG_SYS_CONSOLE_INFO_QUIET=y
-# CONFIG_DISPLAY_BOARDINFO is not set
-CONFIG_ARCH_MISC_INIT=y
-CONFIG_SPL_BSS_START_ADDR=0x80000000
-CONFIG_SPL_SYS_MALLOC=y
-CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
-CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x80208000
-CONFIG_SPL_I2C=y
-CONFIG_SPL_NAND_DRIVERS=y
-CONFIG_SPL_NAND_ECC=y
-CONFIG_SPL_NAND_BASE=y
-CONFIG_SPL_DM_SPI_FLASH=y
-CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
-CONFIG_SPL_WATCHDOG=y
-CONFIG_SPL_YMODEM_SUPPORT=y
-# CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC is not set
-CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PROMPT="U-Boot# "
-CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=1049
-CONFIG_CMD_ASKENV=y
-CONFIG_CMD_DFU=y
-# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_NAND=y
-CONFIG_CMD_USB=y
-# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
-CONFIG_BOOTP_DNS2=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_CACHE=y
-CONFIG_CMD_TIME=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_MTDPARTS=y
-CONFIG_MTDIDS_DEFAULT="nand0=omap2-nand.0"
-CONFIG_MTDPARTS_DEFAULT="mtdparts=omap2-nand.0:128k(spl),128k(spl.backup1),128k(spl.backup2),128k(spl.backup3),1920k(u-boot),512k(u-boot.env0),512k(u-boot.env1),512k(mtdoops),-(rootfs)"
-CONFIG_CMD_UBI=y
-CONFIG_OF_CONTROL=y
-CONFIG_SPL_OF_CONTROL=y
-CONFIG_OF_EMBED=y
-CONFIG_ENV_OVERWRITE=y
-CONFIG_ENV_IS_IN_NAND=y
-CONFIG_ENV_RANGE=0x80000
-CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
-CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_NET_RETRY_COUNT=10
-CONFIG_BOOTP_SEND_HOSTNAME=y
-CONFIG_USE_ROOTPATH=y
-CONFIG_ROOTPATH="/opt/eldk"
-CONFIG_SPL_DM=y
-# CONFIG_SPL_BLK is not set
-CONFIG_BOOTCOUNT_LIMIT=y
-CONFIG_BOOTCOUNT_ENV=y
-CONFIG_DFU_NAND=y
-CONFIG_SYS_DFU_DATA_BUF_SIZE=0x100000
-CONFIG_SYS_I2C_LEGACY=y
-CONFIG_SPL_SYS_I2C_LEGACY=y
-# CONFIG_SPL_DM_MMC is not set
-CONFIG_MMC_OMAP_HS=y
-CONFIG_MTD=y
-CONFIG_MTD_RAW_NAND=y
-CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
-CONFIG_SYS_NAND_ONFI_DETECTION=y
-CONFIG_SYS_NAND_PAGE_SIZE=0x800
-CONFIG_SYS_NAND_OOBSIZE=0x40
-CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
-CONFIG_SYS_NAND_U_BOOT_OFFS=0x80000
-CONFIG_DM_SPI_FLASH=y
-CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_MTD_UBI_FASTMAP=y
-CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1
-CONFIG_PHY_SMSC=y
-CONFIG_DRIVER_TI_CPSW=y
-CONFIG_SPI=y
-CONFIG_DM_SPI=y
-CONFIG_OMAP3_SPI=y
-CONFIG_USB=y
-# CONFIG_SPL_DM_USB is not set
-CONFIG_USB_MUSB_HOST=y
-CONFIG_USB_MUSB_GADGET=y
-CONFIG_USB_MUSB_DSPS=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_MANUFACTURER="Siemens AG"
-CONFIG_USB_GADGET_VENDOR_NUM=0x0908
-CONFIG_USB_GADGET_PRODUCT_NUM=0x02d2
-CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_USB_ETHER=y
diff --git a/configs/dragonboard410c_defconfig b/configs/dragonboard410c_defconfig
index b338326..56a7389 100644
--- a/configs/dragonboard410c_defconfig
+++ b/configs/dragonboard410c_defconfig
@@ -18,13 +18,13 @@
CONFIG_DISTRO_DEFAULTS=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_PREBOOT=y
+CONFIG_SYS_CBSIZE=512
+CONFIG_SYS_PBSIZE=548
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_MISC_INIT_R=y
CONFIG_SYS_PROMPT="dragonboard410c => "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_CBSIZE=512
-CONFIG_SYS_PBSIZE=548
# CONFIG_CMD_IMI is not set
CONFIG_CMD_MD5SUM=y
CONFIG_CMD_MEMINFO=y
diff --git a/configs/dragonboard820c_defconfig b/configs/dragonboard820c_defconfig
index 15d12bb..7304ff9 100644
--- a/configs/dragonboard820c_defconfig
+++ b/configs/dragonboard820c_defconfig
@@ -15,13 +15,13 @@
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyMSM0,115200n8"
# CONFIG_USE_BOOTCOMMAND is not set
+CONFIG_SYS_CBSIZE=512
+CONFIG_SYS_PBSIZE=548
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_MISC_INIT_R=y
CONFIG_SYS_PROMPT="dragonboard820c => "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_CBSIZE=512
-CONFIG_SYS_PBSIZE=548
CONFIG_CMD_MD5SUM=y
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_GPIO=y
diff --git a/configs/dragonboard845c_defconfig b/configs/dragonboard845c_defconfig
index a69d827..f29f11e 100644
--- a/configs/dragonboard845c_defconfig
+++ b/configs/dragonboard845c_defconfig
@@ -12,10 +12,10 @@
CONFIG_BOOTDELAY=5
CONFIG_SAVE_PREV_BL_FDT_ADDR=y
CONFIG_SAVE_PREV_BL_INITRAMFS_START_ADDR=y
+CONFIG_SYS_CBSIZE=512
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_CBSIZE=512
CONFIG_CMD_GPIO=y
# CONFIG_NET is not set
CONFIG_CLK=y
diff --git a/configs/ds116_defconfig b/configs/ds116_defconfig
index 2437be7..02ddc0e 100644
--- a/configs/ds116_defconfig
+++ b/configs/ds116_defconfig
@@ -70,7 +70,6 @@
CONFIG_SYS_64BIT_LBA=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_MVTWSI=y
-CONFIG_MTD=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_PHY_MARVELL=y
@@ -83,7 +82,6 @@
CONFIG_PINCTRL_ARMADA_38X=y
CONFIG_DM_RTC=y
CONFIG_RTC_ARMADA38X=y
-CONFIG_SCSI=y
CONFIG_SPL_DEBUG_UART_BASE=0xd0012000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550=y
diff --git a/configs/ds414_defconfig b/configs/ds414_defconfig
index 3929ea9..07c7456 100644
--- a/configs/ds414_defconfig
+++ b/configs/ds414_defconfig
@@ -67,7 +67,6 @@
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_MVTWSI=y
# CONFIG_MMC is not set
-CONFIG_MTD=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_PHY_ADDR_ENABLE=y
CONFIG_PHY_MARVELL=y
diff --git a/configs/durian_defconfig b/configs/durian_defconfig
index 72214b1..f1d45ca 100644
--- a/configs/durian_defconfig
+++ b/configs/durian_defconfig
@@ -14,15 +14,15 @@
CONFIG_SYS_PCI_64BIT=y
CONFIG_PCI=y
CONFIG_AHCI=y
+CONFIG_SYS_BOOTM_LEN=0x3c00000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyAMA0,115200 earlycon=pl011,0x28001000 root=/dev/sda2 rw"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=280
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_PROMPT="durian#"
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=280
-CONFIG_SYS_BOOTM_LEN=0x3c00000
# CONFIG_CMD_LZMADEC is not set
# CONFIG_CMD_UNZIP is not set
CONFIG_CMD_PCI=y
@@ -34,6 +34,5 @@
# CONFIG_MMC is not set
CONFIG_PCI_PHYTIUM=y
CONFIG_SCSI=y
-CONFIG_DM_SCSI=y
CONFIG_DM_SERIAL=y
CONFIG_PL01X_SERIAL=y
diff --git a/configs/eDPU_defconfig b/configs/eDPU_defconfig
index 238f91c..c1f8505 100644
--- a/configs/eDPU_defconfig
+++ b/configs/eDPU_defconfig
@@ -17,14 +17,15 @@
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_PREBOOT=y
+CONFIG_SYS_PBSIZE=1048
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SYS_PROMPT="eDPU>> "
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=1048
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_XIMG is not set
@@ -60,7 +61,6 @@
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_XENON=y
-CONFIG_MTD=y
CONFIG_DM_MTD=y
CONFIG_SPI_FLASH_SFDP_SUPPORT=y
CONFIG_SPI_FLASH_MACRONIX=y
diff --git a/configs/ea-lpc3250devkitv2_defconfig b/configs/ea-lpc3250devkitv2_defconfig
index 5865ffb..af9fc5f 100644
--- a/configs/ea-lpc3250devkitv2_defconfig
+++ b/configs/ea-lpc3250devkitv2_defconfig
@@ -18,10 +18,10 @@
# CONFIG_AUTOBOOT is not set
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
# CONFIG_USE_BOOTCOMMAND is not set
-CONFIG_BOARD_EARLY_INIT_F=y
-CONFIG_SYS_PROMPT="EA-LPC3250v2=> "
CONFIG_SYS_CBSIZE=256
CONFIG_SYS_PBSIZE=288
+CONFIG_BOARD_EARLY_INIT_F=y
+CONFIG_SYS_PROMPT="EA-LPC3250v2=> "
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_OF_CONTROL=y
diff --git a/configs/eaidk-610-rk3399_defconfig b/configs/eaidk-610-rk3399_defconfig
index 77edbdb..22ad98b 100644
--- a/configs/eaidk-610-rk3399_defconfig
+++ b/configs/eaidk-610-rk3399_defconfig
@@ -40,6 +40,7 @@
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MISC=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MMC_SDHCI=y
@@ -56,8 +57,9 @@
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
CONFIG_SPL_TINY_MEMSET=y
CONFIG_ERRNO_STR=y
diff --git a/configs/eb_cpu5282_defconfig b/configs/eb_cpu5282_defconfig
index 1aa17c9..271dbdf 100644
--- a/configs/eb_cpu5282_defconfig
+++ b/configs/eb_cpu5282_defconfig
@@ -15,13 +15,13 @@
CONFIG_RESET_TO_RETRY=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="printenv"
+CONFIG_SYS_CBSIZE=1024
+CONFIG_SYS_PBSIZE=1054
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_MISC_INIT_R=y
CONFIG_SYS_MALLOC_BOOTPARAMS=y
# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="\nEB+CPU5282> "
-CONFIG_SYS_CBSIZE=1024
-CONFIG_SYS_PBSIZE=1054
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
# CONFIG_CMD_LOADB is not set
@@ -41,6 +41,7 @@
CONFIG_LED_STATUS_BOOT_ENABLE=y
CONFIG_LED_STATUS_BOOT=0
CONFIG_LED_STATUS_CMD=y
+CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y
diff --git a/configs/eb_cpu5282_internal_defconfig b/configs/eb_cpu5282_internal_defconfig
index bd78003..89a7925 100644
--- a/configs/eb_cpu5282_internal_defconfig
+++ b/configs/eb_cpu5282_internal_defconfig
@@ -15,11 +15,11 @@
CONFIG_RESET_TO_RETRY=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="printenv"
+CONFIG_SYS_CBSIZE=1024
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_MISC_INIT_R=y
CONFIG_SYS_MALLOC_BOOTPARAMS=y
# CONFIG_AUTO_COMPLETE is not set
-CONFIG_SYS_CBSIZE=1024
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
# CONFIG_CMD_LOADB is not set
@@ -39,6 +39,7 @@
CONFIG_LED_STATUS_BOOT_ENABLE=y
CONFIG_LED_STATUS_BOOT=0
CONFIG_LED_STATUS_CMD=y
+CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y
diff --git a/configs/edison_defconfig b/configs/edison_defconfig
index db2e35f..c549cd0 100644
--- a/configs/edison_defconfig
+++ b/configs/edison_defconfig
@@ -12,11 +12,11 @@
CONFIG_TARGET_EDISON=y
CONFIG_SMP=y
CONFIG_SYS_MONITOR_BASE=0x01101000
+CONFIG_SYS_CBSIZE=2048
+CONFIG_SYS_PBSIZE=2068
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=128
-CONFIG_SYS_CBSIZE=2048
-CONFIG_SYS_PBSIZE=2068
CONFIG_CMD_CPU=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
diff --git a/configs/efi-x86_app32_defconfig b/configs/efi-x86_app32_defconfig
index 682ba5b..53ec634 100644
--- a/configs/efi-x86_app32_defconfig
+++ b/configs/efi-x86_app32_defconfig
@@ -14,14 +14,13 @@
CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="ext2load scsi 0:3 01000000 /boot/vmlinuz; zboot 01000000"
+CONFIG_SYS_PBSIZE=532
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_PART=y
# CONFIG_CMD_SCSI is not set
-# CONFIG_CMD_NET is not set
CONFIG_CMD_TIME=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y
@@ -36,9 +35,8 @@
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_USE_BOOTFILE=y
CONFIG_BOOTFILE="bzImage"
-CONFIG_USE_ROOTPATH=y
+# CONFIG_NET is not set
CONFIG_REGMAP=y
CONFIG_SYSCON=y
-# CONFIG_REGEX is not set
# CONFIG_GZIP is not set
CONFIG_EFI=y
diff --git a/configs/efi-x86_app64_defconfig b/configs/efi-x86_app64_defconfig
index d6b6c3d..3d02148 100644
--- a/configs/efi-x86_app64_defconfig
+++ b/configs/efi-x86_app64_defconfig
@@ -15,14 +15,14 @@
CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="ext2load scsi 0:3 01000000 /boot/vmlinuz; zboot 01000000"
+CONFIG_SYS_PBSIZE=532
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_PART=y
# CONFIG_CMD_SCSI is not set
-# CONFIG_CMD_NET is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
CONFIG_CMD_EXT2=y
@@ -38,11 +38,10 @@
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_USE_BOOTFILE=y
CONFIG_BOOTFILE="bzImage"
-CONFIG_USE_ROOTPATH=y
+# CONFIG_NET is not set
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_CONSOLE_SCROLL_LINES=5
-# CONFIG_REGEX is not set
CONFIG_CMD_DHRYSTONE=y
# CONFIG_GZIP is not set
CONFIG_EFI=y
diff --git a/configs/efi-x86_payload32_defconfig b/configs/efi-x86_payload32_defconfig
index 194a7ab..a8aa1a6 100644
--- a/configs/efi-x86_payload32_defconfig
+++ b/configs/efi-x86_payload32_defconfig
@@ -12,11 +12,11 @@
CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="ext2load scsi 0:3 01000000 /boot/vmlinuz; zboot 01000000"
+CONFIG_SYS_PBSIZE=532
CONFIG_PRE_CONSOLE_BUFFER=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_IDE=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
diff --git a/configs/efi-x86_payload64_defconfig b/configs/efi-x86_payload64_defconfig
index a060080..ce308c4 100644
--- a/configs/efi-x86_payload64_defconfig
+++ b/configs/efi-x86_payload64_defconfig
@@ -13,10 +13,10 @@
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro"
CONFIG_USE_BOOTCOMMAND=y
+CONFIG_SYS_PBSIZE=532
CONFIG_PRE_CONSOLE_BUFFER=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_DISPLAY_BOARDINFO_LATE=y
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_IDE=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
diff --git a/configs/elgin-rv1108_defconfig b/configs/elgin-rv1108_defconfig
index 4542951..446c9c9b 100644
--- a/configs/elgin-rv1108_defconfig
+++ b/configs/elgin-rv1108_defconfig
@@ -22,7 +22,6 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_LATE_INIT=y
CONFIG_CMD_GPIO=y
-CONFIG_RANDOM_UUID=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
@@ -59,4 +58,5 @@
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_PRODUCT_NUM=0x110a
CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_RANDOM_UUID=y
CONFIG_ERRNO_STR=y
diff --git a/configs/emsdp_defconfig b/configs/emsdp_defconfig
index 12ebc76..07bed2b 100644
--- a/configs/emsdp_defconfig
+++ b/configs/emsdp_defconfig
@@ -12,11 +12,11 @@
CONFIG_SYS_CLK_FREQ=40000000
CONFIG_SYS_LOAD_ADDR=0x10000000
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=280
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="emsdp# "
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=280
# CONFIG_CMD_BOOTD is not set
# CONFIG_CMD_XIMG is not set
CONFIG_CMD_MMC=y
diff --git a/configs/endeavoru_defconfig b/configs/endeavoru_defconfig
index d605acd..f2c35e4 100644
--- a/configs/endeavoru_defconfig
+++ b/configs/endeavoru_defconfig
@@ -21,6 +21,7 @@
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_BOOTCOMMAND="if run check_button; then bootmenu; fi; run bootcmd_mmc0; poweroff;"
+CONFIG_SYS_PBSIZE=2084
CONFIG_SPL_FOOTPRINT_LIMIT=y
CONFIG_SPL_MAX_FOOTPRINT=0x8000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
@@ -30,7 +31,7 @@
CONFIG_SPL_SYS_MALLOC_SIZE=0x10000
CONFIG_SYS_PROMPT="Tegra30 (Endeavoru) # "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=2084
+# CONFIG_CMD_BOOTEFI_BOOTMGR is not set
CONFIG_CMD_BOOTMENU=y
# CONFIG_CMD_IMI is not set
CONFIG_CMD_GPIO=y
@@ -44,13 +45,13 @@
CONFIG_CMD_UMS_ABORT_KEYED=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_PAUSE=y
+CONFIG_CMD_REGULATOR=y
CONFIG_CMD_EXT4_WRITE=y
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_ENV_OVERWRITE=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_MMC_ENV_PART=2
-CONFIG_SPL_DM=y
CONFIG_BUTTON=y
CONFIG_USB_FUNCTION_FASTBOOT=y
CONFIG_FASTBOOT_BUF_ADDR=0x91000000
@@ -61,10 +62,13 @@
CONFIG_SYS_I2C_TEGRA=y
CONFIG_BUTTON_KEYBOARD=y
CONFIG_DM_PMIC=y
+CONFIG_DM_PMIC_TPS80031=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_REGULATOR_TPS80031=y
CONFIG_PWM_TEGRA=y
CONFIG_SYS_NS16550=y
+CONFIG_SYSRESET_TPS80031=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_TEGRA=y
@@ -79,4 +83,3 @@
CONFIG_VIDEO_LCD_ENDEAVORU=y
CONFIG_VIDEO_DSI_TEGRA30=y
CONFIG_TEGRA_BACKLIGHT_PWM=y
-# CONFIG_CMD_BOOTEFI_BOOTMGR is not set
diff --git a/configs/espresso7420_defconfig b/configs/espresso7420_defconfig
index cb7c94a..f176660 100644
--- a/configs/espresso7420_defconfig
+++ b/configs/espresso7420_defconfig
@@ -11,7 +11,9 @@
CONFIG_DEFAULT_DEVICE_TREE="exynos7420-espresso7420"
CONFIG_IDENT_STRING=" for ESPRESSO7420"
CONFIG_SYS_LOAD_ADDR=0x43e00000
+CONFIG_SYS_BOOTM_LEN=0x800000
# CONFIG_AUTOBOOT is not set
+CONFIG_SYS_PBSIZE=1024
CONFIG_SILENT_CONSOLE=y
CONFIG_CONSOLE_MUX=y
# CONFIG_DISPLAY_CPUINFO is not set
@@ -19,8 +21,6 @@
# CONFIG_AUTO_COMPLETE is not set
# CONFIG_SYS_LONGHELP is not set
CONFIG_SYS_PROMPT="ESPRESSO7420 # "
-CONFIG_SYS_PBSIZE=1024
-CONFIG_SYS_BOOTM_LEN=0x800000
# CONFIG_CMD_SETEXPR is not set
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
# CONFIG_MMC is not set
diff --git a/configs/ethernut5_defconfig b/configs/ethernut5_defconfig
index 666f103..bdd8f4d 100644
--- a/configs/ethernut5_defconfig
+++ b/configs/ethernut5_defconfig
@@ -19,12 +19,12 @@
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock0 mtdparts=atmel_nand:-(root) rw rootfstype=jffs2"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="sf probe 0:0; sf read 0x22000000 0xc6000 0x294000; bootm 0x22000000"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=281
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="U-Boot> "
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=281
# CONFIG_CMD_BDI is not set
CONFIG_CMD_IMLS=y
CONFIG_CMD_ASKENV=y
diff --git a/configs/ev-imx280-nano-x-mb_defconfig b/configs/ev-imx280-nano-x-mb_defconfig
index 0546cb7..b62fdad 100644
--- a/configs/ev-imx280-nano-x-mb_defconfig
+++ b/configs/ev-imx280-nano-x-mb_defconfig
@@ -8,9 +8,9 @@
CONFIG_EV_IMX280_NANO_X_MB=y
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_IMX_MODULE_FUSE=y
+CONFIG_SYS_PBSIZE=532
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEMTEST=y
diff --git a/configs/evb-ast2500_defconfig b/configs/evb-ast2500_defconfig
index f8d3543..6685f37 100644
--- a/configs/evb-ast2500_defconfig
+++ b/configs/evb-ast2500_defconfig
@@ -18,12 +18,12 @@
CONFIG_BOOTARGS="console=ttyS4,115200n8 root=/dev/ram rw"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="bootm 20080000"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
CONFIG_PRE_CONSOLE_BUFFER=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_HUSH_PARSER=y
# CONFIG_AUTO_COMPLETE is not set
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_EEPROM=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
@@ -42,6 +42,7 @@
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_ASPEED=y
# CONFIG_MMC is not set
+CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_SFDP_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
diff --git a/configs/evb-ast2600_defconfig b/configs/evb-ast2600_defconfig
index 9244654..314d5d3 100644
--- a/configs/evb-ast2600_defconfig
+++ b/configs/evb-ast2600_defconfig
@@ -35,6 +35,8 @@
CONFIG_BOOTARGS="console=ttyS4,115200n8 root=/dev/ram rw"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run bootspi"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y
CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y
@@ -50,8 +52,6 @@
CONFIG_SPL_RAM_SUPPORT=y
CONFIG_SPL_RAM_DEVICE=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_BOOTZ=y
# CONFIG_BOOTM_NETBSD is not set
# CONFIG_BOOTM_PLAN9 is not set
@@ -91,6 +91,7 @@
CONFIG_I2C_EEPROM=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ASPEED=y
+CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_SFDP_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
diff --git a/configs/evb-rk3036_defconfig b/configs/evb-rk3036_defconfig
index 21c657a..a5a4e36 100644
--- a/configs/evb-rk3036_defconfig
+++ b/configs/evb-rk3036_defconfig
@@ -48,7 +48,6 @@
CONFIG_LED=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
-CONFIG_MTD=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_PINCTRL=y
# CONFIG_SPL_DM_SERIAL is not set
diff --git a/configs/evb-rk3128_defconfig b/configs/evb-rk3128_defconfig
index bf3d2f4..ffff062 100644
--- a/configs/evb-rk3128_defconfig
+++ b/configs/evb-rk3128_defconfig
@@ -17,10 +17,10 @@
CONFIG_SYS_LOAD_ADDR=0x60800800
CONFIG_DEBUG_UART=y
CONFIG_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_DEFAULT_FDT_FILE="rk3128-evb.dtb"
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
@@ -39,7 +39,6 @@
CONFIG_SYS_I2C_ROCKCHIP=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
-CONFIG_MTD=y
CONFIG_PHY=y
CONFIG_PINCTRL=y
CONFIG_REGULATOR_PWM=y
diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig
index 7469f3f..d632fd7 100644
--- a/configs/evb-rk3229_defconfig
+++ b/configs/evb-rk3229_defconfig
@@ -21,6 +21,7 @@
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_SPL_LOAD_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_USE_PREBOOT=y
CONFIG_DEFAULT_FDT_FILE="rk3229-evb.dtb"
# CONFIG_DISPLAY_CPUINFO is not set
@@ -30,7 +31,6 @@
CONFIG_SPL_NO_BSS_LIMIT=y
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
CONFIG_SPL_STACK_R=y
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB_MASS_STORAGE=y
@@ -57,7 +57,6 @@
CONFIG_SYS_I2C_ROCKCHIP=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
-CONFIG_MTD=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_GMAC_ROCKCHIP=y
CONFIG_PHY=y
diff --git a/configs/evb-rk3288_defconfig b/configs/evb-rk3288_defconfig
index 5effb17..31dad12 100644
--- a/configs/evb-rk3288_defconfig
+++ b/configs/evb-rk3288_defconfig
@@ -25,6 +25,7 @@
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_SPL_LOAD_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_USE_PREBOOT=y
CONFIG_DEFAULT_FDT_FILE="rk3288-evb-rk808.dtb"
CONFIG_SILENT_CONSOLE=y
@@ -36,7 +37,6 @@
CONFIG_SPL_STACK_R=y
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
CONFIG_SPL_OPTEE_IMAGE=y
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
@@ -69,7 +69,6 @@
CONFIG_LED_GPIO=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
-CONFIG_MTD=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_GMAC_ROCKCHIP=y
CONFIG_PINCTRL=y
diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig
index 5740ffc..d614052 100644
--- a/configs/evb-rk3399_defconfig
+++ b/configs/evb-rk3399_defconfig
@@ -66,7 +66,6 @@
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_DWC3=y
diff --git a/configs/evb-rv1108_defconfig b/configs/evb-rv1108_defconfig
index 7c6f9b5..1c62149 100644
--- a/configs/evb-rv1108_defconfig
+++ b/configs/evb-rv1108_defconfig
@@ -17,7 +17,6 @@
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_BOARD_EARLY_INIT_F=y
-CONFIG_RANDOM_UUID=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
@@ -32,7 +31,6 @@
CONFIG_FASTBOOT_FLASH_MMC_DEV=1
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
-CONFIG_MTD=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_SPI_FLASH_MTD=y
@@ -53,4 +51,5 @@
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_PRODUCT_NUM=0x110a
CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_RANDOM_UUID=y
CONFIG_ERRNO_STR=y
diff --git a/configs/firefly-rk3288_defconfig b/configs/firefly-rk3288_defconfig
index dc0fda2..4860298 100644
--- a/configs/firefly-rk3288_defconfig
+++ b/configs/firefly-rk3288_defconfig
@@ -22,6 +22,7 @@
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEBUG_UART=y
# CONFIG_ANDROID_BOOT_IMAGE is not set
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_USE_PREBOOT=y
CONFIG_DEFAULT_FDT_FILE="rk3288-firefly.dtb"
CONFIG_SILENT_CONSOLE=y
@@ -31,7 +32,6 @@
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_STACK_R=y
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
@@ -65,7 +65,6 @@
CONFIG_LED_GPIO=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
-CONFIG_MTD=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_GMAC_ROCKCHIP=y
CONFIG_PINCTRL=y
diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig
index b4660a0..b7c8e95 100644
--- a/configs/firefly-rk3399_defconfig
+++ b/configs/firefly-rk3399_defconfig
@@ -66,7 +66,6 @@
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_DWC3=y
diff --git a/configs/galileo_defconfig b/configs/galileo_defconfig
index 35f7fb7..63df818 100644
--- a/configs/galileo_defconfig
+++ b/configs/galileo_defconfig
@@ -15,10 +15,10 @@
CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="ext2load scsi 0:3 01000000 /boot/vmlinuz; zboot 01000000"
+CONFIG_SYS_PBSIZE=532
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_CPU=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
diff --git a/configs/gardena-smart-gateway-at91sam_defconfig b/configs/gardena-smart-gateway-at91sam_defconfig
index 0fb92ff..39fa2c5 100644
--- a/configs/gardena-smart-gateway-at91sam_defconfig
+++ b/configs/gardena-smart-gateway-at91sam_defconfig
@@ -1,7 +1,6 @@
CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SPL_SKIP_LOWLEVEL_INIT_ONLY=y
-CONFIG_SYS_THUMB_BUILD=y
CONFIG_ARCH_AT91=y
CONFIG_TEXT_BASE=0x22900000
CONFIG_SYS_MALLOC_LEN=0x1000000
@@ -34,6 +33,8 @@
CONFIG_AUTOBOOT_STOP_STR="x"
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,768k(uboot)ro,256k(env_redundant),256k(env),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=6 root=ubi0:rootfs rw"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_SPL_MAX_SIZE=0x7000
@@ -51,8 +52,6 @@
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_BASE=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_LICENSE=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_MEMINFO=y
diff --git a/configs/gardena-smart-gateway-mt7688_defconfig b/configs/gardena-smart-gateway-mt7688_defconfig
index bedc596..3b2d27b 100644
--- a/configs/gardena-smart-gateway-mt7688_defconfig
+++ b/configs/gardena-smart-gateway-mt7688_defconfig
@@ -35,6 +35,8 @@
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="cp.b 83000000 84000000 10000 && dhcp uEnv.txt && env import -t ${fileaddr} ${filesize} && run do_u_boot_init; reset"
CONFIG_USE_PREBOOT=y
+CONFIG_SYS_CBSIZE=512
+CONFIG_SYS_PBSIZE=532
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SYS_MALLOC_BOOTPARAMS=y
@@ -45,8 +47,6 @@
CONFIG_SPL_NOR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_CBSIZE=512
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_LICENSE=y
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_XIMG is not set
@@ -83,7 +83,6 @@
CONFIG_LED=y
CONFIG_LED_BLINK=y
CONFIG_LED_GPIO=y
-CONFIG_MTD=y
CONFIG_DM_MTD=y
CONFIG_MTD_SPI_NAND=y
CONFIG_SPI_FLASH_GIGADEVICE=y
diff --git a/configs/gazerbeam_defconfig b/configs/gazerbeam_defconfig
index 3c212c7..9765c43 100644
--- a/configs/gazerbeam_defconfig
+++ b/configs/gazerbeam_defconfig
@@ -94,6 +94,7 @@
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_FIT_VERBOSE=y
+CONFIG_SYS_BOOTM_LEN=0x800000
CONFIG_BOOTDELAY=5
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_STOP_STR=" "
@@ -101,6 +102,7 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/mmcblk0p3 rw rootwait console=$consoledev,$baudrate $othbootargs;ext2load mmc 0:2 ${kernel_addr} $bootfile;ext2load mmc 0:2 ${fdt_addr} $fdtfile;bootm ${kernel_addr} - ${fdt_addr}"
+CONFIG_SYS_CBSIZE=1024
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_DISPLAY_CPUINFO=y
@@ -110,9 +112,7 @@
# CONFIG_HWCONFIG is not set
CONFIG_LAST_STAGE_INIT=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_CBSIZE=1024
CONFIG_CMD_CPU=y
-CONFIG_SYS_BOOTM_LEN=0x800000
CONFIG_CMD_BINOP=y
CONFIG_CMD_MEMTEST=y
CONFIG_SYS_ALT_MEMTEST=y
@@ -168,6 +168,7 @@
CONFIG_GDSYS_SOC=y
CONFIG_IHS_FPGA=y
CONFIG_FSL_ESDHC=y
+CONFIG_MTD=y
CONFIG_DM_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_SHOW_PROGRESS=0
diff --git a/configs/ge_b1x5v2_defconfig b/configs/ge_b1x5v2_defconfig
index 278a5a1..20384bc 100644
--- a/configs/ge_b1x5v2_defconfig
+++ b/configs/ge_b1x5v2_defconfig
@@ -34,6 +34,7 @@
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run tryboot;"
CONFIG_DEFAULT_FDT_FILE="imx6dl-b1x5v2.dtb"
+CONFIG_SYS_PBSIZE=532
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
CONFIG_LOG_MAX_LEVEL=8
CONFIG_LOG_DEFAULT_LEVEL=4
@@ -44,11 +45,9 @@
CONFIG_SYS_SPI_U_BOOT_OFFS=0x11400
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMINFO=y
-CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
@@ -88,6 +87,7 @@
CONFIG_LED=y
CONFIG_LED_GPIO=y
CONFIG_FSL_USDHC=y
+CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
CONFIG_SPI_FLASH_WINBOND=y
diff --git a/configs/ge_bx50v3_defconfig b/configs/ge_bx50v3_defconfig
index 61f338f..409554e 100644
--- a/configs/ge_bx50v3_defconfig
+++ b/configs/ge_bx50v3_defconfig
@@ -19,6 +19,7 @@
CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run doquiet; run tryboot"
+CONFIG_SYS_PBSIZE=532
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
@@ -26,7 +27,6 @@
CONFIG_LAST_STAGE_INIT=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_DM=y
# CONFIG_CMD_FLASH is not set
diff --git a/configs/giedi_defconfig b/configs/giedi_defconfig
index 3c3c7fb..e23d35b 100644
--- a/configs/giedi_defconfig
+++ b/configs/giedi_defconfig
@@ -26,6 +26,7 @@
CONFIG_REMAKE_ELF=y
CONFIG_FIT=y
CONFIG_FIT_EXTERNAL_OFFSET=0x3000
+CONFIG_SYS_BOOTM_LEN=0x800000
CONFIG_BOOTDELAY=3
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press \"<Esc><Esc>\" to stop\n"
@@ -35,6 +36,8 @@
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="if usrbutton; then run flash_self_test; reset; fi;run flash_self;reset;"
+CONFIG_SYS_CBSIZE=2048
+CONFIG_SYS_PBSIZE=2073
CONFIG_LOG=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_MAX_SIZE=0x1f000
@@ -59,11 +62,8 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot# "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_CBSIZE=2048
-CONFIG_SYS_PBSIZE=2073
CONFIG_CMD_CPU=y
# CONFIG_BOOTM_NETBSD is not set
-CONFIG_SYS_BOOTM_LEN=0x800000
# CONFIG_CMD_EXPORTENV is not set
# CONFIG_CMD_IMPORTENV is not set
# CONFIG_CMD_CRC32 is not set
diff --git a/configs/goflexhome_defconfig b/configs/goflexhome_defconfig
index 5c3b81c..fe3ee2d 100644
--- a/configs/goflexhome_defconfig
+++ b/configs/goflexhome_defconfig
@@ -20,11 +20,11 @@
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs ${console} ${mtdparts} ${bootargs_root}; ubi part root; ubifsmount ubi:root; ubifsload 0x800000 ${kernel}; bootm 0x800000"
CONFIG_USE_PREBOOT=y
+CONFIG_SYS_PBSIZE=1053
CONFIG_CONSOLE_MUX=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_PROMPT="GoFlexHome> "
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=1053
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_NAND=y
CONFIG_CMD_SATA=y
diff --git a/configs/gose_defconfig b/configs/gose_defconfig
index 2f0e5cc..4220b93 100644
--- a/configs/gose_defconfig
+++ b/configs/gose_defconfig
@@ -33,6 +33,8 @@
CONFIG_PCI=y
CONFIG_FIT=y
CONFIG_BOOTDELAY=3
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=256
CONFIG_SPL_MAX_SIZE=0x4000
CONFIG_SPL_NO_BSS_LIMIT=y
CONFIG_SPL_BOARD_INIT=y
@@ -44,8 +46,6 @@
CONFIG_SYS_SPI_U_BOOT_OFFS=0x140000
CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=256
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_XIMG is not set
diff --git a/configs/grouper_common_defconfig b/configs/grouper_common_defconfig
index 258d7b1..02ed8db 100644
--- a/configs/grouper_common_defconfig
+++ b/configs/grouper_common_defconfig
@@ -21,6 +21,7 @@
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_BOOTCOMMAND="if run check_button; then bootmenu; fi; run bootcmd_mmc0; poweroff;"
+CONFIG_SYS_PBSIZE=2084
CONFIG_SPL_FOOTPRINT_LIMIT=y
CONFIG_SPL_MAX_FOOTPRINT=0x8000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
@@ -30,7 +31,7 @@
CONFIG_SPL_SYS_MALLOC_SIZE=0x10000
CONFIG_SYS_PROMPT="Tegra30 (Grouper) # "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=2084
+# CONFIG_CMD_BOOTEFI_BOOTMGR is not set
CONFIG_CMD_BOOTMENU=y
# CONFIG_CMD_IMI is not set
CONFIG_CMD_GPIO=y
@@ -43,13 +44,13 @@
CONFIG_CMD_UMS_ABORT_KEYED=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_PAUSE=y
+CONFIG_CMD_REGULATOR=y
CONFIG_CMD_EXT4_WRITE=y
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_ENV_OVERWRITE=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_MMC_ENV_PART=2
-CONFIG_SPL_DM=y
CONFIG_BUTTON=y
CONFIG_USB_FUNCTION_FASTBOOT=y
CONFIG_FASTBOOT_BUF_ADDR=0x91000000
@@ -77,4 +78,3 @@
CONFIG_VIDEO=y
# CONFIG_VIDEO_LOGO is not set
CONFIG_VIDEO_TEGRA20=y
-# CONFIG_CMD_BOOTEFI_BOOTMGR is not set
diff --git a/configs/grpeach_defconfig b/configs/grpeach_defconfig
index ed38d6e..6738424 100644
--- a/configs/grpeach_defconfig
+++ b/configs/grpeach_defconfig
@@ -20,11 +20,11 @@
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="ignore_loglevel"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=256
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_BOARD_EARLY_INIT_F is not set
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=256
# CONFIG_CMD_ELF is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_USB=y
diff --git a/configs/gurnard_defconfig b/configs/gurnard_defconfig
index 60bd11a..a649bda 100644
--- a/configs/gurnard_defconfig
+++ b/configs/gurnard_defconfig
@@ -14,12 +14,12 @@
CONFIG_SYS_LOAD_ADDR=0x23000000
CONFIG_FIT=y
CONFIG_BOOTDELAY=3
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_RESET_PHY_R=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=276
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_FLASH is not set
@@ -47,7 +47,6 @@
CONFIG_TFTP_TSIZE=y
CONFIG_AT91_GPIO=y
CONFIG_GENERIC_ATMEL_MCI=y
-CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
diff --git a/configs/gwventana_emmc_defconfig b/configs/gwventana_emmc_defconfig
index 08afc7f..ea7a23a 100644
--- a/configs/gwventana_emmc_defconfig
+++ b/configs/gwventana_emmc_defconfig
@@ -29,6 +29,7 @@
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_SPL_LOAD_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_BOOTDELAY=3
CONFIG_OF_BOARD_SETUP=y
@@ -36,6 +37,7 @@
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="for btype in ${bootdevs}; do echo; echo Attempting ${btype} boot...; if run ${btype}_boot; then; fi; done"
CONFIG_USE_PREBOOT=y
+CONFIG_SYS_PBSIZE=539
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_BOARD_EARLY_INIT_F=y
@@ -58,9 +60,7 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Ventana > "
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=539
CONFIG_CMD_BOOTZ=y
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_SPL_WRITE_SIZE=0x20000
CONFIG_CMD_UNZIP=y
# CONFIG_CMD_FLASH is not set
diff --git a/configs/gwventana_nand_defconfig b/configs/gwventana_nand_defconfig
index 3f0cb19..0b2b955 100644
--- a/configs/gwventana_nand_defconfig
+++ b/configs/gwventana_nand_defconfig
@@ -29,6 +29,7 @@
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_SPL_LOAD_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_BOOTDELAY=3
CONFIG_OF_BOARD_SETUP=y
@@ -36,6 +37,7 @@
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="for btype in ${bootdevs}; do echo; echo Attempting ${btype} boot...; if run ${btype}_boot; then; fi; done"
CONFIG_USE_PREBOOT=y
+CONFIG_SYS_PBSIZE=539
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_BOARD_EARLY_INIT_F=y
@@ -60,9 +62,7 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Ventana > "
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=539
CONFIG_CMD_BOOTZ=y
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_SPL_NAND_OFS=0x1100000
CONFIG_CMD_SPL_WRITE_SIZE=0x20000
CONFIG_CMD_UNZIP=y
diff --git a/configs/gxp_defconfig b/configs/gxp_defconfig
index 8a18c29..00a9211 100644
--- a/configs/gxp_defconfig
+++ b/configs/gxp_defconfig
@@ -34,7 +34,6 @@
# CONFIG_BOOTM_RTEMS is not set
# CONFIG_BOOTM_VXWORKS is not set
CONFIG_CMD_GPT=y
-# CONFIG_RANDOM_UUID is not set
CONFIG_CMD_MISC=y
CONFIG_CMD_FAT=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
@@ -42,6 +41,7 @@
CONFIG_NETCONSOLE=y
CONFIG_MISC=y
# CONFIG_MMC is not set
+CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_SPANSION=y
@@ -57,4 +57,5 @@
CONFIG_GXP_SPI=y
CONFIG_TIMER=y
CONFIG_GXP_TIMER=y
+# CONFIG_RANDOM_UUID is not set
CONFIG_SHA512=y
diff --git a/configs/harmony_defconfig b/configs/harmony_defconfig
index ba58e23..70bd454 100644
--- a/configs/harmony_defconfig
+++ b/configs/harmony_defconfig
@@ -14,6 +14,7 @@
CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_PCI=y
CONFIG_OF_SYSTEM_SETUP=y
+CONFIG_SYS_PBSIZE=2085
CONFIG_SYS_STDIO_DEREGISTER=y
CONFIG_SPL_FOOTPRINT_LIMIT=y
CONFIG_SPL_MAX_FOOTPRINT=0x8000
@@ -24,7 +25,6 @@
CONFIG_SPL_SYS_MALLOC_SIZE=0x10000
CONFIG_SYS_PROMPT="Tegra20 (Harmony) # "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=2085
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
@@ -44,8 +44,6 @@
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_SPL_DM=y
-CONFIG_MTD=y
CONFIG_DM_MTD=y
CONFIG_MTD_RAW_NAND=y
CONFIG_TEGRA_NAND=y
diff --git a/configs/hc2910_2aghd05_defconfig b/configs/hc2910_2aghd05_defconfig
index 0e7ba7a..29c190e 100644
--- a/configs/hc2910_2aghd05_defconfig
+++ b/configs/hc2910_2aghd05_defconfig
@@ -13,11 +13,11 @@
# CONFIG_EXPERT is not set
CONFIG_ANDROID_BOOT_IMAGE=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_CBSIZE=512
+CONFIG_SYS_PBSIZE=537
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_SYS_PROMPT="HC2910# "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_CBSIZE=512
-CONFIG_SYS_PBSIZE=537
CONFIG_CMD_BOOTDEV=y
# CONFIG_BOOTM_PLAN9 is not set
# CONFIG_BOOTM_RTEMS is not set
diff --git a/configs/helios4_defconfig b/configs/helios4_defconfig
index d74bf72..0419400 100644
--- a/configs/helios4_defconfig
+++ b/configs/helios4_defconfig
@@ -63,7 +63,6 @@
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_MV=y
-CONFIG_MTD=y
CONFIG_SF_DEFAULT_BUS=1
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_SPI_FLASH_MTD=y
@@ -73,7 +72,6 @@
CONFIG_MII=y
CONFIG_MVMDIO=y
CONFIG_PCI_MVEBU=y
-CONFIG_SCSI=y
CONFIG_SPL_DEBUG_UART_BASE=0xd0012000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550=y
diff --git a/configs/highbank_defconfig b/configs/highbank_defconfig
index e4764c3..cc72738 100644
--- a/configs/highbank_defconfig
+++ b/configs/highbank_defconfig
@@ -30,12 +30,9 @@
CONFIG_MISC_INIT_R=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_ENV_IS_IN_NVRAM=y
-CONFIG_SYS_SATA_MAX_PORTS=5
CONFIG_SCSI_AHCI=y
CONFIG_SYS_64BIT_LBA=y
CONFIG_BOOTCOUNT_LIMIT=y
# CONFIG_MMC is not set
CONFIG_CALXEDA_XGMAC=y
CONFIG_SCSI=y
-CONFIG_SCSI_AHCI_PLAT=y
-CONFIG_SYS_SCSI_MAX_SCSI_ID=5
diff --git a/configs/hihope_rzg2_defconfig b/configs/hihope_rzg2_defconfig
index f78f91c..cad490e 100644
--- a/configs/hihope_rzg2_defconfig
+++ b/configs/hihope_rzg2_defconfig
@@ -20,11 +20,11 @@
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a774a1-hihope-rzg2m.dtb; booti 0x48080000 - 0x48000000"
CONFIG_DEFAULT_FDT_FILE="r8a774a1-hihope-rzg2m.dtb"
+CONFIG_SYS_PBSIZE=2068
# CONFIG_BOARD_EARLY_INIT_F is not set
CONFIG_SYS_MALLOC_BOOTPARAMS=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=2068
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
@@ -64,6 +64,7 @@
CONFIG_MMC_UHS_SUPPORT=y
CONFIG_MMC_HS400_SUPPORT=y
CONFIG_RENESAS_SDHI=y
+CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_BITBANGMII=y
diff --git a/configs/hikey960_defconfig b/configs/hikey960_defconfig
index 4274e6a..3c532a1 100644
--- a/configs/hikey960_defconfig
+++ b/configs/hikey960_defconfig
@@ -15,13 +15,13 @@
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyAMA6,115200n8 root=/dev/mmcblk0p2 rw"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=283
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_MISC_INIT_R=y
CONFIG_SYS_PROMPT="U-Boot => "
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=283
CONFIG_CMD_MD5SUM=y
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_GPT=y
diff --git a/configs/hikey_defconfig b/configs/hikey_defconfig
index e50a2ca..ad01ec7 100644
--- a/configs/hikey_defconfig
+++ b/configs/hikey_defconfig
@@ -16,13 +16,13 @@
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyAMA0,115200n8 root=/dev/mmcblk0p9 rw"
+CONFIG_SYS_CBSIZE=512
+CONFIG_SYS_PBSIZE=532
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_MISC_INIT_R=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_CBSIZE=512
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
diff --git a/configs/hsdk_4xd_defconfig b/configs/hsdk_4xd_defconfig
index 5caf75f..306afbe 100644
--- a/configs/hsdk_4xd_defconfig
+++ b/configs/hsdk_4xd_defconfig
@@ -15,16 +15,16 @@
CONFIG_SYS_CLK_FREQ=500000000
CONFIG_SYS_LOAD_ADDR=0x82000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_BOOTM_LEN=0x8000000
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200n8"
+CONFIG_SYS_CBSIZE=2048
+CONFIG_SYS_PBSIZE=2075
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_BOARD_LATE_INIT=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="hsdk-4xd# "
-CONFIG_SYS_CBSIZE=2048
-CONFIG_SYS_PBSIZE=2075
-CONFIG_SYS_BOOTM_LEN=0x8000000
CONFIG_CMD_ENV_FLAGS=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_MMC=y
diff --git a/configs/hsdk_defconfig b/configs/hsdk_defconfig
index 5a027f4..8cd63d3 100644
--- a/configs/hsdk_defconfig
+++ b/configs/hsdk_defconfig
@@ -14,16 +14,16 @@
CONFIG_SYS_CLK_FREQ=500000000
CONFIG_SYS_LOAD_ADDR=0x82000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_BOOTM_LEN=0x8000000
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200n8"
+CONFIG_SYS_CBSIZE=2048
+CONFIG_SYS_PBSIZE=2071
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_BOARD_LATE_INIT=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="hsdk# "
-CONFIG_SYS_CBSIZE=2048
-CONFIG_SYS_PBSIZE=2071
-CONFIG_SYS_BOOTM_LEN=0x8000000
CONFIG_CMD_ENV_FLAGS=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_MMC=y
diff --git a/configs/huawei_hg556a_ram_defconfig b/configs/huawei_hg556a_ram_defconfig
index 0208ed6..17d1c10 100644
--- a/configs/huawei_hg556a_ram_defconfig
+++ b/configs/huawei_hg556a_ram_defconfig
@@ -18,13 +18,13 @@
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_REMAKE_ELF=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_SYS_CBSIZE=512
+CONFIG_SYS_PBSIZE=538
CONFIG_DISPLAY_CPUINFO=y
CONFIG_SYS_MALLOC_BOOTPARAMS=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="HG556a # "
CONFIG_SYS_MAXARGS=24
-CONFIG_SYS_CBSIZE=512
-CONFIG_SYS_PBSIZE=538
CONFIG_CMD_CPU=y
CONFIG_CMD_LICENSE=y
# CONFIG_CMD_BOOTD is not set
@@ -50,6 +50,7 @@
CONFIG_BCM6345_GPIO=y
CONFIG_LED=y
CONFIG_LED_GPIO=y
+CONFIG_MTD=y
CONFIG_DM_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_SHOW_PROGRESS=0
diff --git a/configs/ib62x0_defconfig b/configs/ib62x0_defconfig
index d58a3df..7678175 100644
--- a/configs/ib62x0_defconfig
+++ b/configs/ib62x0_defconfig
@@ -18,11 +18,11 @@
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs ${console} ${mtdparts} ${bootargs_root}; ubi part root; ubifsmount ubi:rootfs; ubifsload 0x800000 ${kernel}; ubifsload 0x700000 ${fdt}; ubifsumount; fdt addr 0x700000; fdt resize; fdt chosen; bootz 0x800000 - 0x700000"
CONFIG_USE_PREBOOT=y
+CONFIG_SYS_PBSIZE=1051
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="ib62x0 => "
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=1051
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_IDE=y
diff --git a/configs/iconnect_defconfig b/configs/iconnect_defconfig
index 69864bd..2ceb4fa 100644
--- a/configs/iconnect_defconfig
+++ b/configs/iconnect_defconfig
@@ -21,12 +21,12 @@
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs ${console} ${mtdparts} ${bootargs_root}; ubi part rootfs; ubifsmount ubi:rootfs; ubifsload 0x800000 ${kernel}; bootm 0x800000"
CONFIG_USE_PREBOOT=y
+CONFIG_SYS_PBSIZE=1051
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_BOARD_LATE_INIT=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="iConnect> "
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=1051
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_NAND=y
CONFIG_CMD_PCI=y
diff --git a/configs/imgtec_xilfpga_defconfig b/configs/imgtec_xilfpga_defconfig
index 7842774..914e293 100644
--- a/configs/imgtec_xilfpga_defconfig
+++ b/configs/imgtec_xilfpga_defconfig
@@ -15,12 +15,12 @@
CONFIG_MIPS_BOOT_FDT=y
CONFIG_TIMESTAMP=y
CONFIG_BOOTDELAY=5
+CONFIG_SYS_PBSIZE=1052
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
# CONFIG_CMDLINE_EDITING is not set
# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="MIPSfpga # "
-CONFIG_SYS_PBSIZE=1052
# CONFIG_CMD_SAVEENV is not set
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_DHCP=y
diff --git a/configs/imx28_xea_defconfig b/configs/imx28_xea_defconfig
index c1b0487..64a0561 100644
--- a/configs/imx28_xea_defconfig
+++ b/configs/imx28_xea_defconfig
@@ -123,4 +123,5 @@
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_MXS_SPI=y
+CONFIG_SPL_CRC8=y
# CONFIG_SPL_OF_LIBFDT is not set
diff --git a/configs/imx28_xea_sb_defconfig b/configs/imx28_xea_sb_defconfig
index 0b32598..9872d35 100644
--- a/configs/imx28_xea_sb_defconfig
+++ b/configs/imx28_xea_sb_defconfig
@@ -74,7 +74,7 @@
CONFIG_MTD=y
CONFIG_DM_MTD=y
CONFIG_DM_SPI_FLASH=y
-CONFIG_SF_DEFAULT_BUS=3
+CONFIG_SF_DEFAULT_BUS=2
CONFIG_SPI_FLASH_SFDP_SUPPORT=y
CONFIG_SPI_FLASH_ISSI=y
CONFIG_SPI_FLASH_SPANSION=y
diff --git a/configs/imx6dl_icore_nand_defconfig b/configs/imx6dl_icore_nand_defconfig
index da62af9..3a20b7a 100644
--- a/configs/imx6dl_icore_nand_defconfig
+++ b/configs/imx6dl_icore_nand_defconfig
@@ -24,6 +24,7 @@
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run $modeboot"
+CONFIG_SYS_PBSIZE=541
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_DMA=y
CONFIG_SPL_NAND_SUPPORT=y
@@ -31,7 +32,6 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="icorem6qdl> "
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=541
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
diff --git a/configs/imx6dl_mamoj_defconfig b/configs/imx6dl_mamoj_defconfig
index 35ded27..0e4ac2f 100644
--- a/configs/imx6dl_mamoj_defconfig
+++ b/configs/imx6dl_mamoj_defconfig
@@ -10,7 +10,6 @@
CONFIG_DEFAULT_DEVICE_TREE="imx6dl-mamoj"
CONFIG_SPL_TEXT_BASE=0x00908000
CONFIG_SYS_MONITOR_LEN=409600
-CONFIG_SPL_DRIVERS_MISC=y
CONFIG_IMX_HAB=y
# CONFIG_CMD_BMODE is not set
CONFIG_SYS_MEMTEST_START=0x80000000
@@ -18,6 +17,7 @@
CONFIG_LTO=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=3
+CONFIG_SYS_PBSIZE=532
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_OS_BOOT=y
CONFIG_SPL_PAYLOAD_ARGS_ADDR=0x13000000
@@ -26,7 +26,6 @@
CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR=0x800
CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS=0x10
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_SPL=y
CONFIG_CRC32_VERIFY=y
CONFIG_CMD_MEMTEST=y
diff --git a/configs/imx6q_bosch_acc_defconfig b/configs/imx6q_bosch_acc_defconfig
index 05bab03..73ae4ac 100644
--- a/configs/imx6q_bosch_acc_defconfig
+++ b/configs/imx6q_bosch_acc_defconfig
@@ -17,7 +17,6 @@
CONFIG_SYS_MONITOR_LEN=409600
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
-CONFIG_SPL_DRIVERS_MISC=y
CONFIG_BOOTCOUNT_BOOTLIMIT=8
CONFIG_SPL_SIZE_LIMIT=69632
CONFIG_SPL=y
@@ -63,7 +62,6 @@
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
-# CONFIG_CMD_NET is not set
# CONFIG_CMD_BLOCK_CACHE is not set
# CONFIG_CMD_SLEEP is not set
# CONFIG_CMD_MP is not set
@@ -82,7 +80,7 @@
CONFIG_ENV_WRITEABLE_LIST=y
CONFIG_ENV_ACCESS_IGNORE_FORCE=y
CONFIG_VERSION_VARIABLE=y
-CONFIG_TFTP_BLOCKSIZE=512
+# CONFIG_NET is not set
CONFIG_SPL_DM=y
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_DM_BOOTCOUNT=y
@@ -90,7 +88,6 @@
CONFIG_SYS_I2C_MXC=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_FSL_USDHC=y
-CONFIG_PHYLIB=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX6=y
CONFIG_DM_PMIC=y
diff --git a/configs/imx6q_icore_nand_defconfig b/configs/imx6q_icore_nand_defconfig
index ffad04f..48d08d3 100644
--- a/configs/imx6q_icore_nand_defconfig
+++ b/configs/imx6q_icore_nand_defconfig
@@ -25,6 +25,7 @@
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run $modeboot"
+CONFIG_SYS_PBSIZE=541
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_DMA=y
CONFIG_SPL_NAND_SUPPORT=y
@@ -32,7 +33,6 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="icorem6qdl> "
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=541
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
diff --git a/configs/imx6q_logic_defconfig b/configs/imx6q_logic_defconfig
index 5ee1f5d..d331d01 100644
--- a/configs/imx6q_logic_defconfig
+++ b/configs/imx6q_logic_defconfig
@@ -25,6 +25,7 @@
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=3
CONFIG_BOOTCOMMAND="run autoboot"
+CONFIG_SYS_PBSIZE=543
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
CONFIG_SPL_RAW_IMAGE_SUPPORT=y
@@ -44,7 +45,6 @@
CONFIG_SPL_WATCHDOG=y
CONFIG_SYS_PROMPT="i.MX6 Logic # "
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=543
CONFIG_CMD_SPL=y
CONFIG_CMD_SPL_NAND_OFS=0x1500000
CONFIG_CMD_SPL_WRITE_SIZE=0x00100000
diff --git a/configs/imx6qdl_icore_mipi_defconfig b/configs/imx6qdl_icore_mipi_defconfig
index 46be3b6..77a1212 100644
--- a/configs/imx6qdl_icore_mipi_defconfig
+++ b/configs/imx6qdl_icore_mipi_defconfig
@@ -32,6 +32,7 @@
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run $modeboot"
+CONFIG_SYS_PBSIZE=546
CONFIG_SPL_RAW_IMAGE_SUPPORT=y
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_OS_BOOT=y
@@ -44,7 +45,6 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="icorem6qdl-mipi> "
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=546
CONFIG_CMD_SPL=y
CONFIG_CRC32_VERIFY=y
CONFIG_CMD_MEMTEST=y
diff --git a/configs/imx6qdl_icore_mmc_defconfig b/configs/imx6qdl_icore_mmc_defconfig
index c71e87e..1e79c4f 100644
--- a/configs/imx6qdl_icore_mmc_defconfig
+++ b/configs/imx6qdl_icore_mmc_defconfig
@@ -35,6 +35,7 @@
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run $modeboot"
+CONFIG_SYS_PBSIZE=541
CONFIG_SPL_RAW_IMAGE_SUPPORT=y
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_OS_BOOT=y
@@ -47,7 +48,6 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="icorem6qdl> "
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=541
CONFIG_CMD_SPL=y
CONFIG_CRC32_VERIFY=y
CONFIG_CMD_MEMTEST=y
diff --git a/configs/imx6qdl_icore_nand_defconfig b/configs/imx6qdl_icore_nand_defconfig
index ffad04f..48d08d3 100644
--- a/configs/imx6qdl_icore_nand_defconfig
+++ b/configs/imx6qdl_icore_nand_defconfig
@@ -25,6 +25,7 @@
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run $modeboot"
+CONFIG_SYS_PBSIZE=541
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_DMA=y
CONFIG_SPL_NAND_SUPPORT=y
@@ -32,7 +33,6 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="icorem6qdl> "
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=541
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
diff --git a/configs/imx6qdl_icore_rqs_defconfig b/configs/imx6qdl_icore_rqs_defconfig
index 83d5e19..69ba60f 100644
--- a/configs/imx6qdl_icore_rqs_defconfig
+++ b/configs/imx6qdl_icore_rqs_defconfig
@@ -29,6 +29,7 @@
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run $modeboot"
+CONFIG_SYS_PBSIZE=545
CONFIG_SPL_RAW_IMAGE_SUPPORT=y
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_OS_BOOT=y
@@ -41,7 +42,6 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="icorem6qdl-rqs> "
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=545
CONFIG_CMD_SPL=y
CONFIG_CRC32_VERIFY=y
CONFIG_CMD_MEMTEST=y
diff --git a/configs/imx6ul_geam_mmc_defconfig b/configs/imx6ul_geam_mmc_defconfig
index a7f913c..6a84c0a 100644
--- a/configs/imx6ul_geam_mmc_defconfig
+++ b/configs/imx6ul_geam_mmc_defconfig
@@ -28,13 +28,13 @@
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run $modeboot"
+CONFIG_SYS_PBSIZE=538
CONFIG_SPL_RAW_IMAGE_SUPPORT=y
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_WATCHDOG=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="geam6ul> "
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=538
CONFIG_CRC32_VERIFY=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPIO=y
diff --git a/configs/imx6ul_geam_nand_defconfig b/configs/imx6ul_geam_nand_defconfig
index 05cac0b..32e18bd 100644
--- a/configs/imx6ul_geam_nand_defconfig
+++ b/configs/imx6ul_geam_nand_defconfig
@@ -25,6 +25,7 @@
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run $modeboot"
+CONFIG_SYS_PBSIZE=538
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_DMA=y
CONFIG_SPL_NAND_SUPPORT=y
@@ -32,7 +33,6 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="geam6ul> "
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=538
CONFIG_CRC32_VERIFY=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPIO=y
diff --git a/configs/imx6ul_isiot_emmc_defconfig b/configs/imx6ul_isiot_emmc_defconfig
index 3a3ac3a..a65659e 100644
--- a/configs/imx6ul_isiot_emmc_defconfig
+++ b/configs/imx6ul_isiot_emmc_defconfig
@@ -28,13 +28,13 @@
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run $modeboot"
+CONFIG_SYS_PBSIZE=541
CONFIG_SPL_RAW_IMAGE_SUPPORT=y
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_WATCHDOG=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="isiotmx6ul> "
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=541
CONFIG_CRC32_VERIFY=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPIO=y
diff --git a/configs/imx6ul_isiot_nand_defconfig b/configs/imx6ul_isiot_nand_defconfig
index afd2790..acd49fb 100644
--- a/configs/imx6ul_isiot_nand_defconfig
+++ b/configs/imx6ul_isiot_nand_defconfig
@@ -25,6 +25,7 @@
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run $modeboot"
+CONFIG_SYS_PBSIZE=541
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_DMA=y
CONFIG_SPL_NAND_SUPPORT=y
@@ -32,7 +33,6 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="isiotmx6ul> "
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=541
CONFIG_CRC32_VERIFY=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPIO=y
diff --git a/configs/imx6ulz_smm_m2_defconfig b/configs/imx6ulz_smm_m2_defconfig
index c471e04..ce957d9 100644
--- a/configs/imx6ulz_smm_m2_defconfig
+++ b/configs/imx6ulz_smm_m2_defconfig
@@ -28,7 +28,6 @@
CONFIG_SPL_MTD=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_SPL_WATCHDOG=y
-CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
diff --git a/configs/imx7_cm_defconfig b/configs/imx7_cm_defconfig
index 30bf4eb..62dda1a 100644
--- a/configs/imx7_cm_defconfig
+++ b/configs/imx7_cm_defconfig
@@ -24,6 +24,7 @@
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTCOMMAND="run boot${boot-mode}"
CONFIG_DEFAULT_FDT_FILE="ask"
+CONFIG_SYS_PBSIZE=532
# CONFIG_BOARD_EARLY_INIT_F is not set
CONFIG_SPL_MAX_SIZE=0xe000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
@@ -31,7 +32,6 @@
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_I2C=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=532
# CONFIG_CMD_BOOTD is not set
CONFIG_CMD_BOOTMENU=y
# CONFIG_CMD_IMI is not set
diff --git a/configs/imx8mm-cl-iot-gate-optee_defconfig b/configs/imx8mm-cl-iot-gate-optee_defconfig
index 22bc964..4568c9c 100644
--- a/configs/imx8mm-cl-iot-gate-optee_defconfig
+++ b/configs/imx8mm-cl-iot-gate-optee_defconfig
@@ -22,8 +22,11 @@
CONFIG_FIT_EXTERNAL_OFFSET=0x3000
CONFIG_FIT_SIGNATURE=y
CONFIG_SPL_LOAD_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_OF_SYSTEM_SETUP=y
+CONFIG_SYS_CBSIZE=2048
+CONFIG_SYS_PBSIZE=2074
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x910000
@@ -41,15 +44,11 @@
CONFIG_SPL_WATCHDOG=y
CONFIG_SYS_PROMPT="u-boot=> "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_CBSIZE=2048
-CONFIG_SYS_PBSIZE=2074
-CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_CMD_BOOTEFI_SELFTEST=y
CONFIG_CMD_EXTENSION=y
CONFIG_CMD_NVEDIT_EFI=y
CONFIG_CMD_EEPROM=y
CONFIG_CMD_SHA1SUM=y
-CONFIG_CMD_BIND=y
CONFIG_CMD_CLK=y
CONFIG_CMD_DFU=y
CONFIG_CMD_FUSE=y
@@ -102,6 +101,7 @@
CONFIG_SUPPORT_EMMC_RPMB=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_FSL_USDHC=y
+CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
CONFIG_PHYLIB=y
CONFIG_PHY_ATHEROS=y
diff --git a/configs/imx8mm-cl-iot-gate_defconfig b/configs/imx8mm-cl-iot-gate_defconfig
index fdec2f8..54ad656 100644
--- a/configs/imx8mm-cl-iot-gate_defconfig
+++ b/configs/imx8mm-cl-iot-gate_defconfig
@@ -24,8 +24,11 @@
CONFIG_FIT_EXTERNAL_OFFSET=0x3000
CONFIG_FIT_SIGNATURE=y
CONFIG_SPL_LOAD_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_OF_SYSTEM_SETUP=y
+CONFIG_SYS_CBSIZE=2048
+CONFIG_SYS_PBSIZE=2074
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x910000
@@ -43,15 +46,11 @@
CONFIG_SPL_WATCHDOG=y
CONFIG_SYS_PROMPT="u-boot=> "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_CBSIZE=2048
-CONFIG_SYS_PBSIZE=2074
-CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_CMD_BOOTEFI_SELFTEST=y
CONFIG_CMD_EXTENSION=y
CONFIG_CMD_NVEDIT_EFI=y
CONFIG_CMD_EEPROM=y
CONFIG_CMD_SHA1SUM=y
-CONFIG_CMD_BIND=y
CONFIG_CMD_CLK=y
CONFIG_CMD_DFU=y
CONFIG_CMD_FUSE=y
@@ -105,6 +104,7 @@
CONFIG_SUPPORT_EMMC_RPMB=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_FSL_USDHC=y
+CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
CONFIG_PHYLIB=y
CONFIG_PHY_ATHEROS=y
diff --git a/configs/imx8mm-icore-mx8mm-ctouch2_defconfig b/configs/imx8mm-icore-mx8mm-ctouch2_defconfig
index 1f1a5b0..caa06d9 100644
--- a/configs/imx8mm-icore-mx8mm-ctouch2_defconfig
+++ b/configs/imx8mm-icore-mx8mm-ctouch2_defconfig
@@ -21,9 +21,12 @@
CONFIG_FIT=y
CONFIG_FIT_EXTERNAL_OFFSET=0x3000
CONFIG_SPL_LOAD_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x10000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_DEFAULT_FDT_FILE="imx8mm-icore-mx8mm-ctouch2.dtb"
+CONFIG_SYS_CBSIZE=2048
+CONFIG_SYS_PBSIZE=2074
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x910000
CONFIG_SPL_BSS_MAX_SIZE=0x2000
@@ -38,9 +41,6 @@
CONFIG_SPL_POWER=y
CONFIG_SYS_PROMPT="u-boot=> "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_CBSIZE=2048
-CONFIG_SYS_PBSIZE=2074
-CONFIG_SYS_BOOTM_LEN=0x10000000
# CONFIG_CMD_EXPORTENV is not set
# CONFIG_CMD_IMPORTENV is not set
# CONFIG_CMD_CRC32 is not set
diff --git a/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig b/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig
index a582004..a168d4c 100644
--- a/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig
+++ b/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig
@@ -21,9 +21,12 @@
CONFIG_FIT=y
CONFIG_FIT_EXTERNAL_OFFSET=0x3000
CONFIG_SPL_LOAD_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x10000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_DEFAULT_FDT_FILE="imx8mm-icore-mx8mm-edimm2.2.dtb"
+CONFIG_SYS_CBSIZE=2048
+CONFIG_SYS_PBSIZE=2074
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x910000
CONFIG_SPL_BSS_MAX_SIZE=0x2000
@@ -38,9 +41,6 @@
CONFIG_SPL_POWER=y
CONFIG_SYS_PROMPT="u-boot=> "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_CBSIZE=2048
-CONFIG_SYS_PBSIZE=2074
-CONFIG_SYS_BOOTM_LEN=0x10000000
# CONFIG_CMD_EXPORTENV is not set
# CONFIG_CMD_IMPORTENV is not set
# CONFIG_CMD_CRC32 is not set
diff --git a/configs/imx8mm-mx8menlo_defconfig b/configs/imx8mm-mx8menlo_defconfig
index 30719a37..9f80eca 100644
--- a/configs/imx8mm-mx8menlo_defconfig
+++ b/configs/imx8mm-mx8menlo_defconfig
@@ -32,6 +32,8 @@
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_BOOTCOMMAND="mmc partconf 0 distro_bootpart && load ${devtype} ${devnum}:${distro_bootpart} ${loadaddr} boot/fitImage && source ${loadaddr}:bootscr-boot.cmd ; reset"
CONFIG_DEFAULT_FDT_FILE="imx8mm-mx8menlo.dtb"
+CONFIG_SYS_CBSIZE=2048
+CONFIG_SYS_PBSIZE=2081
CONFIG_LOG=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
@@ -53,8 +55,6 @@
CONFIG_SPL_WATCHDOG=y
CONFIG_SYS_PROMPT="Verdin iMX8MM # "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_CBSIZE=2048
-CONFIG_SYS_PBSIZE=2081
# CONFIG_BOOTM_NETBSD is not set
CONFIG_CMD_ASKENV=y
# CONFIG_CMD_EXPORTENV is not set
diff --git a/configs/imx8mm-phygate-tauri-l_defconfig b/configs/imx8mm-phygate-tauri-l_defconfig
new file mode 100644
index 0000000..0db3ff8
--- /dev/null
+++ b/configs/imx8mm-phygate-tauri-l_defconfig
@@ -0,0 +1,115 @@
+CONFIG_ARM=y
+CONFIG_ARCH_IMX8M=y
+CONFIG_TEXT_BASE=0x40200000
+CONFIG_SYS_MALLOC_LEN=0x2000000
+CONFIG_SPL_GPIO=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_ENV_SIZE=0x10000
+CONFIG_ENV_OFFSET=0x3C0000
+CONFIG_DM_GPIO=y
+CONFIG_DEFAULT_DEVICE_TREE="imx8mm-phygate-tauri-l"
+CONFIG_SPL_TEXT_BASE=0x7E1000
+CONFIG_TARGET_PHYCORE_IMX8MM=y
+CONFIG_SYS_MONITOR_LEN=524288
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
+CONFIG_SPL_DRIVERS_MISC=y
+CONFIG_SPL_STACK=0x920000
+CONFIG_SPL=y
+CONFIG_ENV_OFFSET_REDUND=0x3E0000
+CONFIG_SYS_LOAD_ADDR=0x40480000
+CONFIG_LTO=y
+CONFIG_FIT=y
+CONFIG_FIT_EXTERNAL_OFFSET=0x3000
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_OF_SYSTEM_SETUP=y
+CONFIG_USE_BOOTCOMMAND=y
+CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadimage; then run mmcboot; else run netboot; fi; fi;"
+CONFIG_DEFAULT_FDT_FILE="oftree"
+CONFIG_SYS_CBSIZE=2048
+CONFIG_SYS_PBSIZE=2074
+CONFIG_BOARD_LATE_INIT=y
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x910000
+CONFIG_SPL_BSS_MAX_SIZE=0x2000
+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
+CONFIG_SPL_SYS_MALLOC=y
+CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
+CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x42200000
+CONFIG_SPL_SYS_MALLOC_SIZE=0x80000
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300
+CONFIG_SPL_I2C=y
+CONFIG_SPL_POWER=y
+CONFIG_SPL_WATCHDOG=y
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_PROMPT="u-boot=> "
+CONFIG_SYS_MAXARGS=64
+# CONFIG_CMD_EXPORTENV is not set
+# CONFIG_CMD_IMPORTENV is not set
+# CONFIG_CMD_CRC32 is not set
+CONFIG_CMD_EEPROM=y
+CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
+CONFIG_SYS_EEPROM_SIZE=4096
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=5
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
+CONFIG_CMD_CLK=y
+CONFIG_CMD_FUSE=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_REGULATOR=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_FAT=y
+CONFIG_OF_CONTROL=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_ENV_OVERWRITE=y
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_SYS_MMC_ENV_DEV=2
+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+CONFIG_SPL_DM=y
+CONFIG_SPL_CLK_COMPOSITE_CCF=y
+CONFIG_CLK_COMPOSITE_CCF=y
+CONFIG_SPL_CLK_IMX8MM=y
+CONFIG_CLK_IMX8MM=y
+CONFIG_MXC_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_MISC=y
+CONFIG_I2C_EEPROM=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x51
+CONFIG_SUPPORT_EMMC_BOOT=y
+CONFIG_MMC_IO_VOLTAGE=y
+CONFIG_MMC_UHS_SUPPORT=y
+CONFIG_MMC_HS400_ES_SUPPORT=y
+CONFIG_MMC_HS400_SUPPORT=y
+CONFIG_FSL_USDHC=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_TI_DP83867=y
+CONFIG_PHY_GIGE=y
+CONFIG_FEC_MXC=y
+CONFIG_MII=y
+CONFIG_PINCTRL=y
+CONFIG_SPL_PINCTRL=y
+CONFIG_PINCTRL_IMX8M=y
+CONFIG_POWER_DOMAIN=y
+CONFIG_IMX8M_POWER_DOMAIN=y
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_DM_SERIAL=y
+CONFIG_MXC_UART=y
+CONFIG_SYSRESET=y
+CONFIG_SPL_SYSRESET=y
+CONFIG_SYSRESET_PSCI=y
+CONFIG_SYSRESET_WATCHDOG=y
+CONFIG_DM_THERMAL=y
+CONFIG_IMX_WATCHDOG=y
diff --git a/configs/imx8mm_beacon_defconfig b/configs/imx8mm_beacon_defconfig
index 031470c..f110771 100644
--- a/configs/imx8mm_beacon_defconfig
+++ b/configs/imx8mm_beacon_defconfig
@@ -24,10 +24,13 @@
CONFIG_FIT=y
CONFIG_FIT_EXTERNAL_OFFSET=0x3000
CONFIG_SPL_LOAD_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x800000
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; fi;"
CONFIG_DEFAULT_FDT_FILE="imx8mm-beacon-kit.dtb"
+CONFIG_SYS_CBSIZE=2048
+CONFIG_SYS_PBSIZE=2074
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x910000
CONFIG_SPL_BSS_MAX_SIZE=0x2000
@@ -44,9 +47,6 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="u-boot=> "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_CBSIZE=2048
-CONFIG_SYS_PBSIZE=2074
-CONFIG_SYS_BOOTM_LEN=0x800000
# CONFIG_CMD_EXPORTENV is not set
# CONFIG_CMD_IMPORTENV is not set
# CONFIG_CMD_CRC32 is not set
@@ -86,6 +86,11 @@
CONFIG_CLK_COMPOSITE_CCF=y
CONFIG_SPL_CLK_IMX8MM=y
CONFIG_CLK_IMX8MM=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_FASTBOOT_BUF_ADDR=0x42800000
+CONFIG_FASTBOOT_BUF_SIZE=0x20000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=2
CONFIG_MXC_GPIO=y
CONFIG_DM_PCA953X=y
CONFIG_DM_I2C=y
@@ -142,6 +147,6 @@
CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
CONFIG_CI_UDC=y
CONFIG_SDP_LOADADDR=0x40400000
-CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_SPL_USB_SDP_SUPPORT=y
+# CONFIG_WATCHDOG_AUTOSTART is not set
CONFIG_IMX_WATCHDOG=y
diff --git a/configs/imx8mm_beacon_fspi_defconfig b/configs/imx8mm_beacon_fspi_defconfig
index cb9e6e7..aa7cb9b 100644
--- a/configs/imx8mm_beacon_fspi_defconfig
+++ b/configs/imx8mm_beacon_fspi_defconfig
@@ -24,10 +24,13 @@
CONFIG_FIT=y
CONFIG_FIT_EXTERNAL_OFFSET=0x3000
CONFIG_SPL_LOAD_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x800000
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; fi;"
CONFIG_DEFAULT_FDT_FILE="imx8mm-beacon-kit.dtb"
+CONFIG_SYS_CBSIZE=2048
+CONFIG_SYS_PBSIZE=2074
CONFIG_SPL_MAX_SIZE=0x25000
CONFIG_SPL_PAD_TO=0x0
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
@@ -48,9 +51,6 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="u-boot=> "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_CBSIZE=2048
-CONFIG_SYS_PBSIZE=2074
-CONFIG_SYS_BOOTM_LEN=0x800000
# CONFIG_CMD_EXPORTENV is not set
# CONFIG_CMD_IMPORTENV is not set
# CONFIG_CMD_CRC32 is not set
diff --git a/configs/imx8mm_data_modul_edm_sbc_defconfig b/configs/imx8mm_data_modul_edm_sbc_defconfig
index e724607..7e9c48e 100644
--- a/configs/imx8mm_data_modul_edm_sbc_defconfig
+++ b/configs/imx8mm_data_modul_edm_sbc_defconfig
@@ -34,6 +34,7 @@
CONFIG_FIT_EXTERNAL_OFFSET=0x3000
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x44000000
+CONFIG_SYS_BOOTM_LEN=0x8000000
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_USE_BOOTARGS=y
@@ -42,6 +43,8 @@
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="run dmo_preboot"
CONFIG_DEFAULT_FDT_FILE="imx8mm-data-modul-edm-sbc.dtb"
+CONFIG_SYS_CBSIZE=2048
+CONFIG_SYS_PBSIZE=2074
CONFIG_CONSOLE_MUX=y
CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y
CONFIG_ARCH_MISC_INIT=y
@@ -68,13 +71,10 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="u-boot=> "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_CBSIZE=2048
-CONFIG_SYS_PBSIZE=2074
# CONFIG_BOOTM_NETBSD is not set
# CONFIG_BOOTM_PLAN9 is not set
# CONFIG_BOOTM_RTEMS is not set
# CONFIG_BOOTM_VXWORKS is not set
-CONFIG_SYS_BOOTM_LEN=0x8000000
CONFIG_CMD_ASKENV=y
# CONFIG_CMD_EXPORTENV is not set
CONFIG_CMD_ERASEENV=y
@@ -108,6 +108,9 @@
CONFIG_CMD_USB_SDP=y
CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_CMD_DHCP=y
+CONFIG_CMD_DHCP6=y
+CONFIG_CMD_TFTPPUT=y
+CONFIG_CMD_WGET=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_PXE=y
@@ -119,7 +122,6 @@
CONFIG_CMD_UUID=y
CONFIG_CMD_PMIC=y
CONFIG_CMD_REGULATOR=y
-CONFIG_CMD_HASH=y
CONFIG_CMD_SMC=y
CONFIG_HASH_VERIFY=y
CONFIG_CMD_BTRFS=y
@@ -148,6 +150,8 @@
CONFIG_NETCONSOLE=y
CONFIG_IP_DEFRAG=y
CONFIG_TFTP_TSIZE=y
+CONFIG_PROT_TCP_SACK=y
+CONFIG_IPV6=y
CONFIG_SPL_DM=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
@@ -157,6 +161,7 @@
CONFIG_CLK_COMPOSITE_CCF=y
CONFIG_SPL_CLK_IMX8MM=y
CONFIG_CLK_IMX8MM=y
+CONFIG_FSL_CAAM=y
CONFIG_DFU_TFTP=y
CONFIG_DFU_TIMEOUT=y
CONFIG_DFU_MMC=y
@@ -171,7 +176,6 @@
CONFIG_MXC_GPIO=y
CONFIG_DM_I2C=y
# CONFIG_INPUT is not set
-CONFIG_MISC=y
CONFIG_USB_HUB_USB251XB=y
CONFIG_I2C_EEPROM=y
CONFIG_SYS_I2C_EEPROM_ADDR=0x50
@@ -191,6 +195,7 @@
CONFIG_SPI_FLASH_MTD=y
CONFIG_PHYLIB=y
CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
CONFIG_DM_MDIO=y
CONFIG_DM_ETH_PHY=y
CONFIG_FEC_MXC=y
diff --git a/configs/imx8mm_evk_defconfig b/configs/imx8mm_evk_defconfig
index f1067d7..2351aee 100644
--- a/configs/imx8mm_evk_defconfig
+++ b/configs/imx8mm_evk_defconfig
@@ -24,6 +24,8 @@
CONFIG_SPL_LOAD_FIT=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_OF_SYSTEM_SETUP=y
+CONFIG_SYS_CBSIZE=2048
+CONFIG_SYS_PBSIZE=2074
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x910000
@@ -41,8 +43,6 @@
CONFIG_SPL_WATCHDOG=y
CONFIG_SYS_PROMPT="u-boot=> "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_CBSIZE=2048
-CONFIG_SYS_PBSIZE=2074
# CONFIG_CMD_EXPORTENV is not set
# CONFIG_CMD_IMPORTENV is not set
# CONFIG_CMD_CRC32 is not set
diff --git a/configs/imx8mm_evk_fspi_defconfig b/configs/imx8mm_evk_fspi_defconfig
index 93611a8..b689c7a 100644
--- a/configs/imx8mm_evk_fspi_defconfig
+++ b/configs/imx8mm_evk_fspi_defconfig
@@ -26,6 +26,8 @@
CONFIG_SPL_LOAD_FIT=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_OF_SYSTEM_SETUP=y
+CONFIG_SYS_CBSIZE=2048
+CONFIG_SYS_PBSIZE=2074
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_MAX_SIZE=0x25000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
@@ -45,8 +47,6 @@
CONFIG_SPL_WATCHDOG=y
CONFIG_SYS_PROMPT="u-boot=> "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_CBSIZE=2048
-CONFIG_SYS_PBSIZE=2074
# CONFIG_CMD_EXPORTENV is not set
# CONFIG_CMD_IMPORTENV is not set
# CONFIG_CMD_CRC32 is not set
@@ -80,6 +80,7 @@
CONFIG_MMC_HS400_ES_SUPPORT=y
CONFIG_MMC_HS400_SUPPORT=y
CONFIG_FSL_USDHC=y
+CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_STMICRO=y
diff --git a/configs/imx8mm_phg_defconfig b/configs/imx8mm_phg_defconfig
index 67db255..ac80e4d 100644
--- a/configs/imx8mm_phg_defconfig
+++ b/configs/imx8mm_phg_defconfig
@@ -24,6 +24,8 @@
CONFIG_SPL_LOAD_FIT=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_OF_SYSTEM_SETUP=y
+CONFIG_SYS_CBSIZE=2048
+CONFIG_SYS_PBSIZE=2074
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x910000
@@ -41,8 +43,6 @@
CONFIG_SPL_WATCHDOG=y
CONFIG_SYS_PROMPT="u-boot=> "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_CBSIZE=2048
-CONFIG_SYS_PBSIZE=2074
# CONFIG_CMD_EXPORTENV is not set
# CONFIG_CMD_IMPORTENV is not set
# CONFIG_CMD_CRC32 is not set
diff --git a/configs/imx8mm_venice_defconfig b/configs/imx8mm_venice_defconfig
index 01cfb96..4482abc 100644
--- a/configs/imx8mm_venice_defconfig
+++ b/configs/imx8mm_venice_defconfig
@@ -26,11 +26,14 @@
CONFIG_FIT=y
CONFIG_FIT_EXTERNAL_OFFSET=0x3000
CONFIG_SPL_LOAD_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x10000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="gsc wd-disable"
+CONFIG_SYS_CBSIZE=2048
+CONFIG_SYS_PBSIZE=2074
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x910000
@@ -47,9 +50,6 @@
CONFIG_SPL_WATCHDOG=y
CONFIG_SYS_PROMPT="u-boot=> "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_CBSIZE=2048
-CONFIG_SYS_PBSIZE=2074
-CONFIG_SYS_BOOTM_LEN=0x10000000
# CONFIG_CMD_EXPORTENV is not set
# CONFIG_CMD_IMPORTENV is not set
CONFIG_CMD_ERASEENV=y
diff --git a/configs/imx8mn_beacon_2g_defconfig b/configs/imx8mn_beacon_2g_defconfig
index c0d7e3c..0c63192 100644
--- a/configs/imx8mn_beacon_2g_defconfig
+++ b/configs/imx8mn_beacon_2g_defconfig
@@ -31,10 +31,13 @@
CONFIG_FIT=y
CONFIG_FIT_EXTERNAL_OFFSET=0x3000
CONFIG_SPL_LOAD_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x800000
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else booti ${loadaddr} - ${fdt_addr}; fi"
CONFIG_DEFAULT_FDT_FILE="imx8mn-beacon-kit.dtb"
+CONFIG_SYS_CBSIZE=2048
+CONFIG_SYS_PBSIZE=2074
CONFIG_SPL_MAX_SIZE=0x25000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x950000
@@ -53,10 +56,7 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="u-boot=> "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_CBSIZE=2048
-CONFIG_SYS_PBSIZE=2074
# CONFIG_BOOTM_NETBSD is not set
-CONFIG_SYS_BOOTM_LEN=0x800000
# CONFIG_CMD_EXPORTENV is not set
# CONFIG_CMD_IMPORTENV is not set
CONFIG_CMD_ERASEENV=y
@@ -109,6 +109,7 @@
CONFIG_MMC_HS400_ES_SUPPORT=y
CONFIG_MMC_HS400_SUPPORT=y
CONFIG_FSL_USDHC=y
+CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_STMICRO=y
diff --git a/configs/imx8mn_beacon_defconfig b/configs/imx8mn_beacon_defconfig
index 9409d51..eecafd6 100644
--- a/configs/imx8mn_beacon_defconfig
+++ b/configs/imx8mn_beacon_defconfig
@@ -30,10 +30,13 @@
CONFIG_FIT=y
CONFIG_FIT_EXTERNAL_OFFSET=0x3000
CONFIG_SPL_LOAD_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x800000
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else booti ${loadaddr} - ${fdt_addr}; fi"
CONFIG_DEFAULT_FDT_FILE="imx8mn-beacon-kit.dtb"
+CONFIG_SYS_CBSIZE=2048
+CONFIG_SYS_PBSIZE=2074
CONFIG_SPL_MAX_SIZE=0x25000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x950000
@@ -53,10 +56,7 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="u-boot=> "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_CBSIZE=2048
-CONFIG_SYS_PBSIZE=2074
# CONFIG_BOOTM_NETBSD is not set
-CONFIG_SYS_BOOTM_LEN=0x800000
# CONFIG_CMD_EXPORTENV is not set
# CONFIG_CMD_IMPORTENV is not set
CONFIG_CMD_ERASEENV=y
@@ -149,4 +149,5 @@
CONFIG_USB_GADGET_VENDOR_NUM=0x0525
CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
CONFIG_CI_UDC=y
+# CONFIG_WATCHDOG_AUTOSTART is not set
CONFIG_IMX_WATCHDOG=y
diff --git a/configs/imx8mn_beacon_fspi_defconfig b/configs/imx8mn_beacon_fspi_defconfig
index 2456803..f77d7d7 100644
--- a/configs/imx8mn_beacon_fspi_defconfig
+++ b/configs/imx8mn_beacon_fspi_defconfig
@@ -30,10 +30,13 @@
CONFIG_FIT=y
CONFIG_FIT_EXTERNAL_OFFSET=0x3000
CONFIG_SPL_LOAD_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x800000
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else booti ${loadaddr} - ${fdt_addr}; fi"
CONFIG_DEFAULT_FDT_FILE="imx8mn-beacon-kit.dtb"
+CONFIG_SYS_CBSIZE=2048
+CONFIG_SYS_PBSIZE=2074
CONFIG_SPL_MAX_SIZE=0x25000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x950000
@@ -53,10 +56,7 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="u-boot=> "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_CBSIZE=2048
-CONFIG_SYS_PBSIZE=2074
# CONFIG_BOOTM_NETBSD is not set
-CONFIG_SYS_BOOTM_LEN=0x800000
# CONFIG_CMD_EXPORTENV is not set
# CONFIG_CMD_IMPORTENV is not set
CONFIG_CMD_ERASEENV=y
diff --git a/configs/imx8mn_bsh_smm_s2_defconfig b/configs/imx8mn_bsh_smm_s2_defconfig
index a9c0297..fc6720a 100644
--- a/configs/imx8mn_bsh_smm_s2_defconfig
+++ b/configs/imx8mn_bsh_smm_s2_defconfig
@@ -23,9 +23,12 @@
CONFIG_FIT=y
CONFIG_FIT_EXTERNAL_OFFSET=0x3000
CONFIG_SPL_LOAD_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_DEFAULT_FDT_FILE="freescale/imx8mn-bsh-smm-s2.dtb"
+CONFIG_SYS_CBSIZE=2048
+CONFIG_SYS_PBSIZE=2067
CONFIG_ARCH_MISC_INIT=y
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_MAX_SIZE=0x25000
@@ -51,9 +54,6 @@
CONFIG_SPL_WATCHDOG=y
CONFIG_SYS_PROMPT="> "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_CBSIZE=2048
-CONFIG_SYS_PBSIZE=2067
-CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_CMD_FUSE=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
diff --git a/configs/imx8mn_bsh_smm_s2pro_defconfig b/configs/imx8mn_bsh_smm_s2pro_defconfig
index 52d9972..77fab1e 100644
--- a/configs/imx8mn_bsh_smm_s2pro_defconfig
+++ b/configs/imx8mn_bsh_smm_s2pro_defconfig
@@ -24,9 +24,12 @@
CONFIG_FIT=y
CONFIG_FIT_EXTERNAL_OFFSET=0x3000
CONFIG_SPL_LOAD_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_DEFAULT_FDT_FILE="freescale/imx8mn-bsh-smm-s2pro.dtb"
+CONFIG_SYS_CBSIZE=2048
+CONFIG_SYS_PBSIZE=2067
CONFIG_ARCH_MISC_INIT=y
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_MAX_SIZE=0x25000
@@ -47,9 +50,6 @@
CONFIG_SPL_WATCHDOG=y
CONFIG_SYS_PROMPT="> "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_CBSIZE=2048
-CONFIG_SYS_PBSIZE=2067
-CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_CMD_FUSE=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
diff --git a/configs/imx8mn_ddr4_evk_defconfig b/configs/imx8mn_ddr4_evk_defconfig
index ac5f9fc..4a0da7e 100644
--- a/configs/imx8mn_ddr4_evk_defconfig
+++ b/configs/imx8mn_ddr4_evk_defconfig
@@ -22,9 +22,12 @@
CONFIG_FIT=y
CONFIG_FIT_EXTERNAL_OFFSET=0x3000
CONFIG_SPL_LOAD_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_DEFAULT_FDT_FILE="imx8mn-ddr4-evk.dtb"
+CONFIG_SYS_CBSIZE=2048
+CONFIG_SYS_PBSIZE=2074
CONFIG_ARCH_MISC_INIT=y
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_MAX_SIZE=0x25000
@@ -44,9 +47,6 @@
CONFIG_SPL_WATCHDOG=y
CONFIG_SYS_PROMPT="u-boot=> "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_CBSIZE=2048
-CONFIG_SYS_PBSIZE=2074
-CONFIG_SYS_BOOTM_LEN=0x2000000
# CONFIG_CMD_EXPORTENV is not set
# CONFIG_CMD_IMPORTENV is not set
CONFIG_CMD_ERASEENV=y
diff --git a/configs/imx8mn_evk_defconfig b/configs/imx8mn_evk_defconfig
index 0fce798..e6a99a3 100644
--- a/configs/imx8mn_evk_defconfig
+++ b/configs/imx8mn_evk_defconfig
@@ -22,9 +22,12 @@
CONFIG_FIT=y
CONFIG_FIT_EXTERNAL_OFFSET=0x3000
CONFIG_SPL_LOAD_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_DEFAULT_FDT_FILE="imx8mn-evk.dtb"
+CONFIG_SYS_CBSIZE=2048
+CONFIG_SYS_PBSIZE=2074
CONFIG_ARCH_MISC_INIT=y
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_MAX_SIZE=0x25000
@@ -48,9 +51,6 @@
CONFIG_SPL_WATCHDOG=y
CONFIG_SYS_PROMPT="u-boot=> "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_CBSIZE=2048
-CONFIG_SYS_PBSIZE=2074
-CONFIG_SYS_BOOTM_LEN=0x2000000
# CONFIG_CMD_EXPORTENV is not set
# CONFIG_CMD_IMPORTENV is not set
CONFIG_CMD_ERASEENV=y
diff --git a/configs/imx8mn_var_som_defconfig b/configs/imx8mn_var_som_defconfig
index fa2f43b..517bf23 100644
--- a/configs/imx8mn_var_som_defconfig
+++ b/configs/imx8mn_var_som_defconfig
@@ -26,10 +26,13 @@
CONFIG_FIT=y
CONFIG_FIT_EXTERNAL_OFFSET=0x3000
CONFIG_SPL_LOAD_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_DEFAULT_FDT_FILE="freescale/imx8mn-var-som-symphony.dtb"
+CONFIG_SYS_CBSIZE=2048
+CONFIG_SYS_PBSIZE=2067
CONFIG_BOARD_TYPES=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_SPL_MAX_SIZE=0x25000
@@ -50,9 +53,6 @@
CONFIG_SPL_WATCHDOG=y
CONFIG_SYS_PROMPT="> "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_CBSIZE=2048
-CONFIG_SYS_PBSIZE=2067
-CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_CMD_FUSE=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
diff --git a/configs/imx8mn_venice_defconfig b/configs/imx8mn_venice_defconfig
index 5d2e5a4..aea79af 100644
--- a/configs/imx8mn_venice_defconfig
+++ b/configs/imx8mn_venice_defconfig
@@ -27,11 +27,14 @@
CONFIG_FIT=y
CONFIG_FIT_EXTERNAL_OFFSET=0x3000
CONFIG_SPL_LOAD_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x10000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="gsc wd-disable"
+CONFIG_SYS_CBSIZE=2048
+CONFIG_SYS_PBSIZE=2074
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_MAX_SIZE=0x25000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
@@ -50,9 +53,6 @@
CONFIG_SPL_WATCHDOG=y
CONFIG_SYS_PROMPT="u-boot=> "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_CBSIZE=2048
-CONFIG_SYS_PBSIZE=2074
-CONFIG_SYS_BOOTM_LEN=0x10000000
# CONFIG_CMD_EXPORTENV is not set
# CONFIG_CMD_IMPORTENV is not set
CONFIG_CMD_ERASEENV=y
diff --git a/configs/imx8mp-icore-mx8mp-edimm2.2_defconfig b/configs/imx8mp-icore-mx8mp-edimm2.2_defconfig
index ff27d99..10b2c88 100644
--- a/configs/imx8mp-icore-mx8mp-edimm2.2_defconfig
+++ b/configs/imx8mp-icore-mx8mp-edimm2.2_defconfig
@@ -25,9 +25,12 @@
CONFIG_FIT=y
CONFIG_FIT_EXTERNAL_OFFSET=0x3000
CONFIG_SPL_LOAD_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_DEFAULT_FDT_FILE="imx8mp-icore-mx8mp-edimm2.2.dtb"
+CONFIG_SYS_CBSIZE=2048
+CONFIG_SYS_PBSIZE=2074
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_MAX_SIZE=0x26000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
@@ -48,9 +51,6 @@
CONFIG_SPL_WATCHDOG=y
CONFIG_SYS_PROMPT="u-boot=> "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_CBSIZE=2048
-CONFIG_SYS_PBSIZE=2074
-CONFIG_SYS_BOOTM_LEN=0x2000000
# CONFIG_CMD_EXPORTENV is not set
# CONFIG_CMD_IMPORTENV is not set
# CONFIG_CMD_CRC32 is not set
diff --git a/configs/imx8mp_beacon_defconfig b/configs/imx8mp_beacon_defconfig
index b686af8..1e45d7c 100644
--- a/configs/imx8mp_beacon_defconfig
+++ b/configs/imx8mp_beacon_defconfig
@@ -38,10 +38,13 @@
CONFIG_FIT=y
CONFIG_FIT_EXTERNAL_OFFSET=0x3000
CONFIG_SPL_LOAD_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else booti ${loadaddr} - ${fdt_addr}; fi"
CONFIG_DEFAULT_FDT_FILE="imx8mp-beacon-kit.dtb"
+CONFIG_SYS_CBSIZE=2048
+CONFIG_SYS_PBSIZE=2074
# CONFIG_SYS_DEVICE_NULLDEV is not set
CONFIG_SPL_MAX_SIZE=0x26000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
@@ -62,9 +65,6 @@
CONFIG_SPL_WATCHDOG=y
CONFIG_SYS_PROMPT="u-boot=> "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_CBSIZE=2048
-CONFIG_SYS_PBSIZE=2074
-CONFIG_SYS_BOOTM_LEN=0x2000000
# CONFIG_CMD_EXPORTENV is not set
# CONFIG_CMD_IMPORTENV is not set
# CONFIG_CMD_CRC32 is not set
diff --git a/configs/imx8mp_data_modul_edm_sbc_defconfig b/configs/imx8mp_data_modul_edm_sbc_defconfig
index ae1a48c..fb4fb67 100644
--- a/configs/imx8mp_data_modul_edm_sbc_defconfig
+++ b/configs/imx8mp_data_modul_edm_sbc_defconfig
@@ -41,6 +41,7 @@
CONFIG_FIT_EXTERNAL_OFFSET=0x3000
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x44000000
+CONFIG_SYS_BOOTM_LEN=0x8000000
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_USE_BOOTARGS=y
@@ -48,6 +49,8 @@
CONFIG_BOOTCOMMAND="run dmo_update_env ; load ${devtype} ${devnum}:${devpart} ${loadaddr} boot/fitImage && source ${loadaddr}:bootscr-boot.cmd ; reset"
CONFIG_USE_PREBOOT=y
CONFIG_DEFAULT_FDT_FILE="imx8mp-data-modul-edm-sbc.dtb"
+CONFIG_SYS_CBSIZE=2048
+CONFIG_SYS_PBSIZE=2081
CONFIG_CONSOLE_MUX=y
CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y
CONFIG_ARCH_MISC_INIT=y
@@ -56,6 +59,7 @@
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x96fc00
CONFIG_SPL_BSS_MAX_SIZE=0x400
+CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_BOOTROM_SUPPORT=y
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
@@ -74,13 +78,10 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="u-boot=> "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_CBSIZE=2048
-CONFIG_SYS_PBSIZE=2081
# CONFIG_BOOTM_NETBSD is not set
# CONFIG_BOOTM_PLAN9 is not set
# CONFIG_BOOTM_RTEMS is not set
# CONFIG_BOOTM_VXWORKS is not set
-CONFIG_SYS_BOOTM_LEN=0x8000000
CONFIG_CMD_ASKENV=y
# CONFIG_CMD_EXPORTENV is not set
CONFIG_CMD_ERASEENV=y
@@ -114,6 +115,9 @@
CONFIG_CMD_USB_SDP=y
CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_CMD_DHCP=y
+CONFIG_CMD_DHCP6=y
+CONFIG_CMD_TFTPPUT=y
+CONFIG_CMD_WGET=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_PXE=y
@@ -125,7 +129,6 @@
CONFIG_CMD_UUID=y
CONFIG_CMD_PMIC=y
CONFIG_CMD_REGULATOR=y
-CONFIG_CMD_HASH=y
CONFIG_CMD_SMC=y
CONFIG_HASH_VERIFY=y
CONFIG_CMD_BTRFS=y
@@ -155,6 +158,8 @@
CONFIG_NETCONSOLE=y
CONFIG_IP_DEFRAG=y
CONFIG_TFTP_TSIZE=y
+CONFIG_PROT_TCP_SACK=y
+CONFIG_IPV6=y
CONFIG_SPL_DM=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
@@ -164,6 +169,8 @@
CONFIG_CLK_COMPOSITE_CCF=y
CONFIG_SPL_CLK_IMX8MP=y
CONFIG_CLK_IMX8MP=y
+CONFIG_FSL_CAAM=y
+CONFIG_IMX8M_DRAM_INLINE_ECC=y
CONFIG_DFU_TFTP=y
CONFIG_DFU_TIMEOUT=y
CONFIG_DFU_MMC=y
@@ -182,7 +189,6 @@
CONFIG_LED=y
CONFIG_LED_BLINK=y
CONFIG_LED_GPIO=y
-CONFIG_MISC=y
CONFIG_USB_HUB_USB251XB=y
CONFIG_I2C_EEPROM=y
CONFIG_SYS_I2C_EEPROM_ADDR=0x50
@@ -202,6 +208,7 @@
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_SPI_FLASH_MTD=y
CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_DM_MDIO=y
diff --git a/configs/imx8mp_debix_model_a_defconfig b/configs/imx8mp_debix_model_a_defconfig
new file mode 100644
index 0000000..8a960ae
--- /dev/null
+++ b/configs/imx8mp_debix_model_a_defconfig
@@ -0,0 +1,105 @@
+CONFIG_ARM=y
+CONFIG_ARCH_IMX8M=y
+CONFIG_TEXT_BASE=0x40200000
+CONFIG_SYS_MALLOC_LEN=0x2000000
+CONFIG_SPL_GPIO=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_ENV_SIZE=0x1000
+CONFIG_ENV_OFFSET=0x400000
+CONFIG_DM_GPIO=y
+CONFIG_DEFAULT_DEVICE_TREE="imx8mp-debix-model-a"
+CONFIG_SPL_TEXT_BASE=0x920000
+CONFIG_TARGET_IMX8MP_DEBIX_MODEL_A=y
+CONFIG_SYS_MONITOR_LEN=524288
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
+CONFIG_SPL_DRIVERS_MISC=y
+CONFIG_SPL_STACK=0x960000
+CONFIG_SPL=y
+CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000
+CONFIG_SYS_LOAD_ADDR=0x40480000
+CONFIG_FIT=y
+CONFIG_FIT_EXTERNAL_OFFSET=0x3000
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x2000000
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_OF_SYSTEM_SETUP=y
+CONFIG_DEFAULT_FDT_FILE="imx8mp-debix-model-a.dtb"
+CONFIG_SYS_CBSIZE=2048
+CONFIG_SYS_PBSIZE=2074
+CONFIG_BOARD_LATE_INIT=y
+CONFIG_SPL_MAX_SIZE=0x26000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x98fc00
+CONFIG_SPL_BSS_MAX_SIZE=0x400
+CONFIG_SPL_BOARD_INIT=y
+CONFIG_SPL_BOOTROM_SUPPORT=y
+CONFIG_SPL_SYS_MALLOC_SIMPLE=y
+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300
+CONFIG_SPL_I2C=y
+CONFIG_SPL_POWER=y
+CONFIG_SPL_WATCHDOG=y
+CONFIG_SYS_PROMPT="u-boot=> "
+CONFIG_SYS_MAXARGS=64
+# CONFIG_CMD_EXPORTENV is not set
+# CONFIG_CMD_IMPORTENV is not set
+# CONFIG_CMD_CRC32 is not set
+CONFIG_CMD_CLK=y
+CONFIG_CMD_FUSE=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_REGULATOR=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_OF_CONTROL=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_ENV_OVERWRITE=y
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_SYS_MMC_ENV_DEV=1
+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+CONFIG_USE_ETHPRIME=y
+CONFIG_ETHPRIME="eth1"
+CONFIG_SPL_DM=y
+CONFIG_CLK_COMPOSITE_CCF=y
+CONFIG_CLK_IMX8MP=y
+CONFIG_MXC_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_LED=y
+CONFIG_LED_GPIO=y
+CONFIG_SUPPORT_EMMC_BOOT=y
+CONFIG_MMC_IO_VOLTAGE=y
+CONFIG_MMC_UHS_SUPPORT=y
+CONFIG_MMC_HS400_ES_SUPPORT=y
+CONFIG_MMC_HS400_SUPPORT=y
+CONFIG_FSL_USDHC=y
+CONFIG_PHY_REALTEK=y
+CONFIG_DM_ETH_PHY=y
+CONFIG_PHY_GIGE=y
+CONFIG_DWC_ETH_QOS=y
+CONFIG_DWC_ETH_QOS_IMX=y
+CONFIG_FEC_MXC=y
+CONFIG_MII=y
+CONFIG_PINCTRL=y
+CONFIG_SPL_PINCTRL=y
+CONFIG_PINCTRL_IMX8M=y
+CONFIG_DM_PMIC=y
+CONFIG_DM_PMIC_PCA9450=y
+CONFIG_SPL_DM_PMIC_PCA9450=y
+CONFIG_DM_REGULATOR=y
+CONFIG_SPL_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_PCA9450=y
+CONFIG_SPL_DM_REGULATOR_PCA9450=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_DM_SERIAL=y
+CONFIG_MXC_UART=y
+CONFIG_SYSRESET=y
+CONFIG_SPL_SYSRESET=y
+CONFIG_SYSRESET_PSCI=y
+CONFIG_SYSRESET_WATCHDOG=y
+CONFIG_IMX_WATCHDOG=y
diff --git a/configs/imx8mp_dhcom_pdk2_defconfig b/configs/imx8mp_dhcom_pdk2_defconfig
index a77139a..af5ed56 100644
--- a/configs/imx8mp_dhcom_pdk2_defconfig
+++ b/configs/imx8mp_dhcom_pdk2_defconfig
@@ -39,6 +39,7 @@
CONFIG_FIT_EXTERNAL_OFFSET=0x3000
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x44000000
+CONFIG_SYS_BOOTM_LEN=0x8000000
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_USE_BOOTARGS=y
@@ -46,14 +47,17 @@
CONFIG_BOOTCOMMAND="run dh_update_env distro_bootcmd ; reset"
CONFIG_USE_PREBOOT=y
CONFIG_DEFAULT_FDT_FILE="imx8mp-dhcom-pdk2.dtb"
+CONFIG_SYS_CBSIZE=2048
+CONFIG_SYS_PBSIZE=2081
CONFIG_CONSOLE_MUX=y
CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_BOARD_LATE_INIT=y
-CONFIG_SPL_MAX_SIZE=0x25000
+CONFIG_SPL_MAX_SIZE=0x26000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x96fc00
CONFIG_SPL_BSS_MAX_SIZE=0x400
+CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_BOOTROM_SUPPORT=y
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
@@ -69,13 +73,10 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="u-boot=> "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_CBSIZE=2048
-CONFIG_SYS_PBSIZE=2081
# CONFIG_BOOTM_NETBSD is not set
# CONFIG_BOOTM_PLAN9 is not set
# CONFIG_BOOTM_RTEMS is not set
# CONFIG_BOOTM_VXWORKS is not set
-CONFIG_SYS_BOOTM_LEN=0x8000000
CONFIG_CMD_ASKENV=y
# CONFIG_CMD_EXPORTENV is not set
CONFIG_CMD_ERASEENV=y
@@ -109,6 +110,9 @@
CONFIG_CMD_USB_SDP=y
CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_CMD_DHCP=y
+CONFIG_CMD_DHCP6=y
+CONFIG_CMD_TFTPPUT=y
+CONFIG_CMD_WGET=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_PXE=y
@@ -116,11 +120,11 @@
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
CONFIG_CMD_GETTIME=y
+CONFIG_CMD_KASLRSEED=y
CONFIG_CMD_SYSBOOT=y
CONFIG_CMD_UUID=y
CONFIG_CMD_PMIC=y
CONFIG_CMD_REGULATOR=y
-CONFIG_CMD_HASH=y
CONFIG_CMD_SMC=y
CONFIG_HASH_VERIFY=y
CONFIG_CMD_BTRFS=y
@@ -151,6 +155,8 @@
CONFIG_NETCONSOLE=y
CONFIG_IP_DEFRAG=y
CONFIG_TFTP_TSIZE=y
+CONFIG_PROT_TCP_SACK=y
+CONFIG_IPV6=y
CONFIG_SPL_DM=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
@@ -160,6 +166,8 @@
CONFIG_CLK_COMPOSITE_CCF=y
CONFIG_SPL_CLK_IMX8MP=y
CONFIG_CLK_IMX8MP=y
+CONFIG_FSL_CAAM=y
+CONFIG_IMX8M_DRAM_INLINE_ECC=y
CONFIG_DFU_TFTP=y
CONFIG_DFU_TIMEOUT=y
CONFIG_DFU_MMC=y
@@ -178,7 +186,6 @@
CONFIG_LED=y
CONFIG_LED_BLINK=y
CONFIG_LED_GPIO=y
-CONFIG_MISC=y
CONFIG_I2C_EEPROM=y
CONFIG_SYS_I2C_EEPROM_ADDR=0x50
CONFIG_SUPPORT_EMMC_BOOT=y
@@ -222,6 +229,7 @@
CONFIG_SPL_DM_REGULATOR_PCA9450=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_DM_RNG=y
CONFIG_DM_RTC=y
CONFIG_RTC_M41T62=y
CONFIG_CONS_INDEX=2
diff --git a/configs/imx8mp_dhcom_pdk3_defconfig b/configs/imx8mp_dhcom_pdk3_defconfig
index c1f8fbd..3a03469 100644
--- a/configs/imx8mp_dhcom_pdk3_defconfig
+++ b/configs/imx8mp_dhcom_pdk3_defconfig
@@ -39,6 +39,7 @@
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x44000000
CONFIG_SPL_LOAD_FIT_APPLY_OVERLAY=y
+CONFIG_SYS_BOOTM_LEN=0x8000000
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_USE_BOOTARGS=y
@@ -47,14 +48,17 @@
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="gpio clear GPIO1_11 ; sleep 0.1 ; gpio set GPIO1_11 ; sleep 0.1 ; i2c dev 4 && i2c mw 0x70 0 4 && i2c probe 0x2d && i2c mw 0x2d 0xaa55.2 0"
CONFIG_DEFAULT_FDT_FILE="imx8mp-dhcom-pdk3.dtb"
+CONFIG_SYS_CBSIZE=2048
+CONFIG_SYS_PBSIZE=2081
CONFIG_CONSOLE_MUX=y
CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_BOARD_LATE_INIT=y
-CONFIG_SPL_MAX_SIZE=0x25000
+CONFIG_SPL_MAX_SIZE=0x26000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x96fc00
CONFIG_SPL_BSS_MAX_SIZE=0x400
+CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_BOOTROM_SUPPORT=y
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
@@ -71,13 +75,10 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="u-boot=> "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_CBSIZE=2048
-CONFIG_SYS_PBSIZE=2081
# CONFIG_BOOTM_NETBSD is not set
# CONFIG_BOOTM_PLAN9 is not set
# CONFIG_BOOTM_RTEMS is not set
# CONFIG_BOOTM_VXWORKS is not set
-CONFIG_SYS_BOOTM_LEN=0x8000000
CONFIG_CMD_ASKENV=y
# CONFIG_CMD_EXPORTENV is not set
CONFIG_CMD_ERASEENV=y
@@ -111,6 +112,9 @@
CONFIG_CMD_USB_SDP=y
CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_CMD_DHCP=y
+CONFIG_CMD_DHCP6=y
+CONFIG_CMD_TFTPPUT=y
+CONFIG_CMD_WGET=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_PXE=y
@@ -118,11 +122,11 @@
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
CONFIG_CMD_GETTIME=y
+CONFIG_CMD_KASLRSEED=y
CONFIG_CMD_SYSBOOT=y
CONFIG_CMD_UUID=y
CONFIG_CMD_PMIC=y
CONFIG_CMD_REGULATOR=y
-CONFIG_CMD_HASH=y
CONFIG_CMD_SMC=y
CONFIG_HASH_VERIFY=y
CONFIG_CMD_BTRFS=y
@@ -153,6 +157,8 @@
CONFIG_NETCONSOLE=y
CONFIG_IP_DEFRAG=y
CONFIG_TFTP_TSIZE=y
+CONFIG_PROT_TCP_SACK=y
+CONFIG_IPV6=y
CONFIG_SPL_DM=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
@@ -162,6 +168,8 @@
CONFIG_CLK_COMPOSITE_CCF=y
CONFIG_SPL_CLK_IMX8MP=y
CONFIG_CLK_IMX8MP=y
+CONFIG_FSL_CAAM=y
+CONFIG_IMX8M_DRAM_INLINE_ECC=y
CONFIG_DFU_TFTP=y
CONFIG_DFU_TIMEOUT=y
CONFIG_DFU_MMC=y
@@ -183,7 +191,6 @@
CONFIG_LED=y
CONFIG_LED_BLINK=y
CONFIG_LED_GPIO=y
-CONFIG_MISC=y
CONFIG_I2C_EEPROM=y
CONFIG_SYS_I2C_EEPROM_ADDR=0x50
CONFIG_SUPPORT_EMMC_BOOT=y
@@ -227,6 +234,7 @@
CONFIG_SPL_DM_REGULATOR_PCA9450=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_DM_RNG=y
CONFIG_DM_RTC=y
CONFIG_RTC_M41T62=y
CONFIG_CONS_INDEX=2
diff --git a/configs/imx8mp_evk_defconfig b/configs/imx8mp_evk_defconfig
index d538b85..2350d2f 100644
--- a/configs/imx8mp_evk_defconfig
+++ b/configs/imx8mp_evk_defconfig
@@ -7,9 +7,6 @@
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_OFFSET=0x400000
-CONFIG_SYS_I2C_MXC_I2C1=y
-CONFIG_SYS_I2C_MXC_I2C2=y
-CONFIG_SYS_I2C_MXC_I2C3=y
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx8mp-evk"
CONFIG_SPL_TEXT_BASE=0x920000
@@ -25,9 +22,12 @@
CONFIG_FIT=y
CONFIG_FIT_EXTERNAL_OFFSET=0x3000
CONFIG_SPL_LOAD_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_DEFAULT_FDT_FILE="imx8mp-evk.dtb"
+CONFIG_SYS_CBSIZE=2048
+CONFIG_SYS_PBSIZE=2074
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_MAX_SIZE=0x26000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
@@ -48,9 +48,6 @@
CONFIG_SPL_WATCHDOG=y
CONFIG_SYS_PROMPT="u-boot=> "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_CBSIZE=2048
-CONFIG_SYS_PBSIZE=2074
-CONFIG_SYS_BOOTM_LEN=0x2000000
# CONFIG_CMD_EXPORTENV is not set
# CONFIG_CMD_IMPORTENV is not set
# CONFIG_CMD_CRC32 is not set
@@ -74,6 +71,7 @@
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_USE_ETHPRIME=y
CONFIG_ETHPRIME="eth1"
+CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM=y
CONFIG_CLK_COMPOSITE_CCF=y
CONFIG_CLK_IMX8MP=y
@@ -88,8 +86,6 @@
CONFIG_MXC_GPIO=y
CONFIG_DM_PCA953X=y
CONFIG_DM_I2C=y
-# CONFIG_SPL_DM_I2C is not set
-CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_LED=y
CONFIG_LED_GPIO=y
CONFIG_SUPPORT_EMMC_BOOT=y
@@ -110,15 +106,16 @@
CONFIG_PINCTRL=y
CONFIG_SPL_PINCTRL=y
CONFIG_PINCTRL_IMX8M=y
-CONFIG_SPL_POWER_LEGACY=y
CONFIG_POWER_DOMAIN=y
CONFIG_IMX8M_POWER_DOMAIN=y
CONFIG_IMX8MP_HSIOMIX_BLKCTRL=y
-CONFIG_POWER_PCA9450=y
+CONFIG_DM_PMIC=y
+CONFIG_DM_PMIC_PCA9450=y
+CONFIG_SPL_DM_PMIC_PCA9450=y
CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_PCA9450=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
-CONFIG_SPL_POWER_I2C=y
CONFIG_DM_SERIAL=y
CONFIG_MXC_UART=y
CONFIG_SYSRESET=y
diff --git a/configs/imx8mp_rsb3720a1_4G_defconfig b/configs/imx8mp_rsb3720a1_4G_defconfig
index ca3c3ef..019bbcc 100644
--- a/configs/imx8mp_rsb3720a1_4G_defconfig
+++ b/configs/imx8mp_rsb3720a1_4G_defconfig
@@ -31,10 +31,13 @@
CONFIG_FIT_EXTERNAL_OFFSET=0x3000
CONFIG_FIT_SIGNATURE=y
CONFIG_SPL_LOAD_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_DEFAULT_FDT_FILE="imx8mp-rsb3720-a1.dtb"
+CONFIG_SYS_CBSIZE=2048
+CONFIG_SYS_PBSIZE=2074
CONFIG_ARCH_MISC_INIT=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_LATE_INIT=y
@@ -57,9 +60,6 @@
CONFIG_SPL_WATCHDOG=y
CONFIG_SYS_PROMPT="u-boot=> "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_CBSIZE=2048
-CONFIG_SYS_PBSIZE=2074
-CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_CMD_BOOTEFI_SELFTEST=y
CONFIG_CMD_ERASEENV=y
CONFIG_CMD_NVEDIT_EFI=y
@@ -123,6 +123,7 @@
CONFIG_MMC_HS400_ES_SUPPORT=y
CONFIG_MMC_HS400_SUPPORT=y
CONFIG_FSL_USDHC=y
+CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_STMICRO=y
diff --git a/configs/imx8mp_rsb3720a1_6G_defconfig b/configs/imx8mp_rsb3720a1_6G_defconfig
index 61d539f..efd69f2 100644
--- a/configs/imx8mp_rsb3720a1_6G_defconfig
+++ b/configs/imx8mp_rsb3720a1_6G_defconfig
@@ -31,10 +31,13 @@
CONFIG_FIT_EXTERNAL_OFFSET=0x3000
CONFIG_FIT_SIGNATURE=y
CONFIG_SPL_LOAD_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_DEFAULT_FDT_FILE="imx8mp-rsb3720-a1.dtb"
+CONFIG_SYS_CBSIZE=2048
+CONFIG_SYS_PBSIZE=2074
CONFIG_ARCH_MISC_INIT=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_LATE_INIT=y
@@ -57,9 +60,6 @@
CONFIG_SPL_WATCHDOG=y
CONFIG_SYS_PROMPT="u-boot=> "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_CBSIZE=2048
-CONFIG_SYS_PBSIZE=2074
-CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_CMD_BOOTEFI_SELFTEST=y
CONFIG_CMD_ERASEENV=y
CONFIG_CMD_NVEDIT_EFI=y
@@ -123,6 +123,7 @@
CONFIG_MMC_HS400_ES_SUPPORT=y
CONFIG_MMC_HS400_SUPPORT=y
CONFIG_FSL_USDHC=y
+CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_STMICRO=y
diff --git a/configs/imx8mp_venice_defconfig b/configs/imx8mp_venice_defconfig
index 730c359..11b356b 100644
--- a/configs/imx8mp_venice_defconfig
+++ b/configs/imx8mp_venice_defconfig
@@ -27,11 +27,14 @@
CONFIG_FIT=y
CONFIG_FIT_EXTERNAL_OFFSET=0x3000
CONFIG_SPL_LOAD_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x10000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="gsc wd-disable"
+CONFIG_SYS_CBSIZE=2048
+CONFIG_SYS_PBSIZE=2074
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_MAX_SIZE=0x26000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
@@ -50,9 +53,6 @@
CONFIG_SPL_WATCHDOG=y
CONFIG_SYS_PROMPT="u-boot=> "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_CBSIZE=2048
-CONFIG_SYS_PBSIZE=2074
-CONFIG_SYS_BOOTM_LEN=0x10000000
# CONFIG_CMD_EXPORTENV is not set
# CONFIG_CMD_IMPORTENV is not set
CONFIG_CMD_ERASEENV=y
diff --git a/configs/imx8mq_cm_defconfig b/configs/imx8mq_cm_defconfig
index c703671..470e410 100644
--- a/configs/imx8mq_cm_defconfig
+++ b/configs/imx8mq_cm_defconfig
@@ -25,8 +25,10 @@
CONFIG_FIT=y
CONFIG_SPL_FIT_PRINT=y
CONFIG_SPL_LOAD_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_OF_SYSTEM_SETUP=y
+CONFIG_SYS_PBSIZE=1050
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_MAX_SIZE=0x1f000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
@@ -43,8 +45,6 @@
CONFIG_SPL_I2C=y
CONFIG_SYS_PROMPT="u-boot=> "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=1050
-CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_CMD_FUSE=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
diff --git a/configs/imx8mq_evk_defconfig b/configs/imx8mq_evk_defconfig
index 72e1757..ab73a07 100644
--- a/configs/imx8mq_evk_defconfig
+++ b/configs/imx8mq_evk_defconfig
@@ -29,6 +29,7 @@
CONFIG_SPL_LOAD_FIT=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_OF_SYSTEM_SETUP=y
+CONFIG_SYS_PBSIZE=1050
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_MAX_SIZE=0x1f000
@@ -48,7 +49,6 @@
CONFIG_SPL_WATCHDOG=y
CONFIG_SYS_PROMPT="u-boot=> "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=1050
# CONFIG_BOOTM_NETBSD is not set
# CONFIG_CMD_EXPORTENV is not set
# CONFIG_CMD_IMPORTENV is not set
diff --git a/configs/imx8mq_phanbell_defconfig b/configs/imx8mq_phanbell_defconfig
index 35f429f..06a5a5a 100644
--- a/configs/imx8mq_phanbell_defconfig
+++ b/configs/imx8mq_phanbell_defconfig
@@ -27,6 +27,7 @@
CONFIG_FIT=y
CONFIG_FIT_EXTERNAL_OFFSET=0x3000
CONFIG_SPL_LOAD_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x800000
CONFIG_SD_BOOT=y
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_USE_BOOTCOMMAND=y
@@ -49,7 +50,6 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=64
# CONFIG_BOOTM_NETBSD is not set
-CONFIG_SYS_BOOTM_LEN=0x800000
# CONFIG_CMD_EXPORTENV is not set
# CONFIG_CMD_IMPORTENV is not set
# CONFIG_CMD_CRC32 is not set
diff --git a/configs/imx8mq_reform2_defconfig b/configs/imx8mq_reform2_defconfig
index e503175..02a7eee 100644
--- a/configs/imx8mq_reform2_defconfig
+++ b/configs/imx8mq_reform2_defconfig
@@ -31,6 +31,7 @@
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_USE_PREBOOT=y
CONFIG_DEFAULT_FDT_FILE="freescale/imx8mq-mnt-reform2.dtb"
+CONFIG_SYS_PBSIZE=1050
CONFIG_CONSOLE_MUX=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_LATE_INIT=y
@@ -51,7 +52,6 @@
CONFIG_SPL_WATCHDOG=y
CONFIG_SYS_PROMPT="u-boot=> "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=1050
# CONFIG_BOOTM_NETBSD is not set
# CONFIG_CMD_EXPORTENV is not set
# CONFIG_CMD_IMPORTENV is not set
diff --git a/configs/imx8qm_dmsse20a1_defconfig b/configs/imx8qm_dmsse20a1_defconfig
index 01eabc4..333115d 100644
--- a/configs/imx8qm_dmsse20a1_defconfig
+++ b/configs/imx8qm_dmsse20a1_defconfig
@@ -20,12 +20,14 @@
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
+CONFIG_SPL_STACK=0x13e000
CONFIG_SPL=y
CONFIG_SYS_LOAD_ADDR=0x80280000
CONFIG_REMAKE_ELF=y
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_SPL_LOAD_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x04000000
CONFIG_BOOTDELAY=3
CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_BOOTCOMMAND=y
@@ -34,12 +36,19 @@
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_MAX_SIZE=0x1f000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x128000
CONFIG_SPL_BSS_MAX_SIZE=0x1000
CONFIG_SPL_BOARD_INIT=y
+CONFIG_SPL_SYS_MALLOC_SIMPLE=y
+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
+CONFIG_SPL_SYS_MALLOC=y
+CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
+CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x120000
+CONFIG_SPL_SYS_MALLOC_SIZE=0x3000
CONFIG_SPL_POWER_DOMAIN=y
CONFIG_HUSH_PARSER=y
# CONFIG_BOOTM_NETBSD is not set
-CONFIG_SYS_BOOTM_LEN=0x04000000
CONFIG_CMD_FUSE=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
diff --git a/configs/imx8qm_mek_defconfig b/configs/imx8qm_mek_defconfig
index d7cf869..f353c16 100644
--- a/configs/imx8qm_mek_defconfig
+++ b/configs/imx8qm_mek_defconfig
@@ -29,6 +29,8 @@
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if test ${sec_boot} = yes; then if run loadcntr; then run mmcboot; else run netboot; fi; else if run loadimage; then run mmcboot; else run netboot; fi; fi; fi; else booti ${loadaddr} - ${fdt_addr}; fi"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
CONFIG_LOG=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_MAX_SIZE=0x1f000
@@ -51,8 +53,6 @@
CONFIG_SPL_POWER_DOMAIN=y
CONFIG_SPL_WATCHDOG=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_CPU=y
# CONFIG_BOOTM_NETBSD is not set
# CONFIG_CMD_EXPORTENV is not set
diff --git a/configs/imx8qm_rom7720_a1_4G_defconfig b/configs/imx8qm_rom7720_a1_4G_defconfig
index 83f0776..f0b109b 100644
--- a/configs/imx8qm_rom7720_a1_4G_defconfig
+++ b/configs/imx8qm_rom7720_a1_4G_defconfig
@@ -25,6 +25,8 @@
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else booti ${loadaddr} - ${fdt_addr}; fi"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
CONFIG_LOG=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_MAX_SIZE=0x1f000
@@ -35,8 +37,6 @@
CONFIG_SPL_POWER_DOMAIN=y
CONFIG_SPL_WATCHDOG=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_CPU=y
# CONFIG_BOOTM_NETBSD is not set
# CONFIG_CMD_IMPORTENV is not set
diff --git a/configs/imx8qxp_mek_defconfig b/configs/imx8qxp_mek_defconfig
index 37c5147..442572b 100644
--- a/configs/imx8qxp_mek_defconfig
+++ b/configs/imx8qxp_mek_defconfig
@@ -24,11 +24,14 @@
CONFIG_REMAKE_ELF=y
CONFIG_FIT=y
CONFIG_FIT_EXTERNAL_OFFSET=0x3000
+CONFIG_SYS_BOOTM_LEN=0x800000
CONFIG_BOOTDELAY=3
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if test ${sec_boot} = yes; then if run loadcntr; then run mmcboot; else run netboot; fi; else if run loadimage; then run mmcboot; else run netboot; fi; fi; fi; else booti ${loadaddr} - ${fdt_addr}; fi"
+CONFIG_SYS_CBSIZE=2048
+CONFIG_SYS_PBSIZE=2068
CONFIG_LOG=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_MAX_SIZE=0x1f000
@@ -51,11 +54,8 @@
CONFIG_SPL_POWER_DOMAIN=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_CBSIZE=2048
-CONFIG_SYS_PBSIZE=2068
CONFIG_CMD_CPU=y
# CONFIG_BOOTM_NETBSD is not set
-CONFIG_SYS_BOOTM_LEN=0x800000
# CONFIG_CMD_EXPORTENV is not set
# CONFIG_CMD_IMPORTENV is not set
# CONFIG_CMD_CRC32 is not set
diff --git a/configs/imx8ulp_evk_defconfig b/configs/imx8ulp_evk_defconfig
index 7a5147a..836a797 100644
--- a/configs/imx8ulp_evk_defconfig
+++ b/configs/imx8ulp_evk_defconfig
@@ -27,6 +27,8 @@
CONFIG_BOOTDELAY=0
CONFIG_BOOTCOMMAND="run distro_bootcmd;run bsp_bootcmd"
CONFIG_DEFAULT_FDT_FILE="imx8ulp-evk"
+CONFIG_SYS_CBSIZE=2048
+CONFIG_SYS_PBSIZE=2068
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_MAX_SIZE=0x25000
@@ -45,8 +47,6 @@
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300
CONFIG_SPL_WATCHDOG=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_CBSIZE=2048
-CONFIG_SYS_PBSIZE=2068
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_FUSE=y
CONFIG_CMD_GPIO=y
@@ -71,6 +71,7 @@
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_MMC_IO_VOLTAGE=y
CONFIG_FSL_USDHC=y
+CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_PHYLIB=y
diff --git a/configs/imx93_11x11_evk_defconfig b/configs/imx93_11x11_evk_defconfig
index 9ced5ed..7f6cf78 100644
--- a/configs/imx93_11x11_evk_defconfig
+++ b/configs/imx93_11x11_evk_defconfig
@@ -8,6 +8,7 @@
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x4000
CONFIG_ENV_OFFSET=0x700000
+CONFIG_IMX_CONFIG="arch/arm/mach-imx/imx9/imximage.cfg"
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx93-11x11-evk"
CONFIG_SPL_TEXT_BASE=0x2049A000
@@ -24,6 +25,8 @@
CONFIG_REMAKE_ELF=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_DEFAULT_FDT_FILE="imx93-11x11-evk.dtb"
+CONFIG_SYS_CBSIZE=2048
+CONFIG_SYS_PBSIZE=2074
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_MAX_SIZE=0x26000
@@ -33,6 +36,7 @@
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_BOOTROM_SUPPORT=y
CONFIG_SPL_LOAD_IMX_CONTAINER=y
+CONFIG_IMX_CONTAINER_CFG="arch/arm/mach-imx/imx9/container.cfg"
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
@@ -45,8 +49,6 @@
CONFIG_SPL_WATCHDOG=y
CONFIG_SYS_PROMPT="u-boot=> "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_CBSIZE=2048
-CONFIG_SYS_PBSIZE=2074
CONFIG_CMD_ERASEENV=y
# CONFIG_CMD_CRC32 is not set
CONFIG_CMD_MEMTEST=y
diff --git a/configs/imx93_11x11_evk_ld_defconfig b/configs/imx93_11x11_evk_ld_defconfig
index abd646b..958f825 100644
--- a/configs/imx93_11x11_evk_ld_defconfig
+++ b/configs/imx93_11x11_evk_ld_defconfig
@@ -8,6 +8,7 @@
CONFIG_NR_DRAM_BANKS=2
CONFIG_ENV_SIZE=0x4000
CONFIG_ENV_OFFSET=0x400000
+CONFIG_IMX_CONFIG="arch/arm/mach-imx/imx9/imximage.cfg"
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="imx93-11x11-evk"
CONFIG_SPL_TEXT_BASE=0x2049A000
@@ -25,6 +26,8 @@
CONFIG_REMAKE_ELF=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_DEFAULT_FDT_FILE="imx93-11x11-evk.dtb"
+CONFIG_SYS_CBSIZE=2048
+CONFIG_SYS_PBSIZE=2074
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_MAX_SIZE=0x26000
@@ -34,6 +37,7 @@
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_BOOTROM_SUPPORT=y
CONFIG_SPL_LOAD_IMX_CONTAINER=y
+CONFIG_IMX_CONTAINER_CFG="arch/arm/mach-imx/imx9/container.cfg"
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
@@ -46,8 +50,6 @@
CONFIG_SPL_WATCHDOG=y
CONFIG_SYS_PROMPT="u-boot=> "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_CBSIZE=2048
-CONFIG_SYS_PBSIZE=2074
CONFIG_CMD_ERASEENV=y
# CONFIG_CMD_CRC32 is not set
CONFIG_CMD_MEMTEST=y
diff --git a/configs/imx93_var_som_defconfig b/configs/imx93_var_som_defconfig
new file mode 100644
index 0000000..cc0c5a7
--- /dev/null
+++ b/configs/imx93_var_som_defconfig
@@ -0,0 +1,136 @@
+CONFIG_ARM=y
+CONFIG_ARCH_IMX9=y
+CONFIG_TEXT_BASE=0x80200000
+CONFIG_SYS_MALLOC_LEN=0x2000000
+CONFIG_SYS_MALLOC_F_LEN=0x18000
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_NR_DRAM_BANKS=2
+CONFIG_ENV_SIZE=0x4000
+CONFIG_ENV_OFFSET=0x700000
+CONFIG_IMX_CONFIG="arch/arm/mach-imx/imx9/imximage.cfg"
+CONFIG_DM_GPIO=y
+CONFIG_DEFAULT_DEVICE_TREE="imx93-var-som-symphony"
+CONFIG_SPL_TEXT_BASE=0x2049A000
+CONFIG_TARGET_IMX93_VAR_SOM=y
+CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_SPL_SERIAL=y
+CONFIG_SPL_DRIVERS_MISC=y
+CONFIG_SPL_STACK=0x20519dd0
+CONFIG_SPL=y
+CONFIG_CMD_DEKBLOB=y
+CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x88000000
+CONFIG_SYS_LOAD_ADDR=0x80400000
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x90000000
+CONFIG_REMAKE_ELF=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_BOOTDELAY=1
+CONFIG_OF_SYSTEM_SETUP=y
+CONFIG_BOOTCOMMAND="run bsp_bootcmd"
+CONFIG_DEFAULT_FDT_FILE="imx93-var-som-symphony.dtb"
+CONFIG_SYS_CBSIZE=2048
+CONFIG_SYS_PBSIZE=2074
+CONFIG_BOARD_EARLY_INIT_F=y
+CONFIG_BOARD_LATE_INIT=y
+CONFIG_SPL_MAX_SIZE=0x26000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x2051a000
+CONFIG_SPL_BSS_MAX_SIZE=0x2000
+CONFIG_SPL_BOARD_INIT=y
+CONFIG_SPL_BOOTROM_SUPPORT=y
+CONFIG_SPL_LOAD_IMX_CONTAINER=y
+CONFIG_IMX_CONTAINER_CFG="arch/arm/mach-imx/imx9/container.cfg"
+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1040
+CONFIG_SPL_I2C=y
+CONFIG_SPL_POWER=y
+CONFIG_SPL_WATCHDOG=y
+CONFIG_SYS_PROMPT="u-boot=> "
+CONFIG_SYS_MAXARGS=64
+CONFIG_CMD_ERASEENV=y
+CONFIG_CMD_NVEDIT_EFI=y
+CONFIG_CRC32_VERIFY=y
+CONFIG_CMD_EEPROM=y
+CONFIG_SYS_I2C_EEPROM_BUS=3
+CONFIG_SYS_EEPROM_SIZE=512
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=4
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=100
+CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_CLK=y
+CONFIG_CMD_DFU=y
+CONFIG_CMD_FUSE=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_POWEROFF=y
+CONFIG_CMD_READ=y
+CONFIG_CMD_WDT=y
+CONFIG_BOOTP_PREFER_SERVERIP=y
+CONFIG_CMD_SNTP=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_EFIDEBUG=y
+CONFIG_CMD_RTC=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_GETTIME=y
+CONFIG_CMD_TIMER=y
+CONFIG_CMD_REGULATOR=y
+CONFIG_CMD_HASH=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_OF_CONTROL=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_ENV_OVERWRITE=y
+CONFIG_ENV_IS_NOWHERE=y
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_SYS_MMC_ENV_DEV=1
+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_SPL_DM=y
+CONFIG_SPL_CLK_IMX93=y
+CONFIG_CLK_IMX93=y
+CONFIG_DFU_MMC=y
+CONFIG_DFU_RAM=y
+CONFIG_GPIO_HOG=y
+CONFIG_IMX_RGPIO2P=y
+CONFIG_DM_PCA953X=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_IMX_LPI2C=y
+CONFIG_SUPPORT_EMMC_BOOT=y
+CONFIG_MMC_IO_VOLTAGE=y
+CONFIG_MMC_UHS_SUPPORT=y
+CONFIG_MMC_HS400_ES_SUPPORT=y
+CONFIG_MMC_HS400_SUPPORT=y
+CONFIG_FSL_USDHC=y
+CONFIG_PHY_ADIN=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_REALTEK=y
+CONFIG_DM_ETH_PHY=y
+CONFIG_PHY_GIGE=y
+CONFIG_DWC_ETH_QOS=y
+CONFIG_DWC_ETH_QOS_IMX=y
+CONFIG_FEC_MXC=y
+CONFIG_MII=y
+CONFIG_MIPI_DPHY_HELPERS=y
+CONFIG_PINCTRL=y
+CONFIG_SPL_PINCTRL=y
+CONFIG_PINCTRL_IMX93=y
+CONFIG_POWER_DOMAIN=y
+CONFIG_DM_PMIC=y
+CONFIG_SPL_DM_PMIC_PCA9450=y
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_DM_RTC=y
+CONFIG_RTC_EMULATION=y
+CONFIG_DM_SERIAL=y
+CONFIG_FSL_LPUART=y
+CONFIG_DM_THERMAL=y
+CONFIG_IMX_TMU=y
+CONFIG_ULP_WATCHDOG=y
+CONFIG_WDT=y
+CONFIG_LZO=y
+CONFIG_BZIP2=y
diff --git a/configs/imxrt1020-evk_defconfig b/configs/imxrt1020-evk_defconfig
index 6b63b80..80c8769 100644
--- a/configs/imxrt1020-evk_defconfig
+++ b/configs/imxrt1020-evk_defconfig
@@ -24,6 +24,8 @@
CONFIG_DISTRO_DEFAULTS=y
CONFIG_SD_BOOT=y
# CONFIG_USE_BOOTCOMMAND is not set
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_SPL_NO_BSS_LIMIT=y
CONFIG_SPL_BOARD_INIT=y
@@ -31,8 +33,6 @@
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x100
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=276
# CONFIG_BOOTM_NETBSD is not set
# CONFIG_BOOTM_PLAN9 is not set
# CONFIG_BOOTM_RTEMS is not set
diff --git a/configs/imxrt1050-evk_defconfig b/configs/imxrt1050-evk_defconfig
index cbf9469..8b5ce4e 100644
--- a/configs/imxrt1050-evk_defconfig
+++ b/configs/imxrt1050-evk_defconfig
@@ -26,6 +26,8 @@
CONFIG_DISTRO_DEFAULTS=y
CONFIG_SD_BOOT=y
# CONFIG_USE_BOOTCOMMAND is not set
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_SPL_NO_BSS_LIMIT=y
@@ -34,8 +36,6 @@
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x100
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=276
# CONFIG_BOOTM_NETBSD is not set
# CONFIG_BOOTM_PLAN9 is not set
# CONFIG_BOOTM_RTEMS is not set
diff --git a/configs/inetspace_v2_defconfig b/configs/inetspace_v2_defconfig
index aa58356..2e8e3f3 100644
--- a/configs/inetspace_v2_defconfig
+++ b/configs/inetspace_v2_defconfig
@@ -22,6 +22,7 @@
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="dhcp && run netconsole; if run usbload || run diskload; then bootm; fi"
CONFIG_USE_PREBOOT=y
+CONFIG_SYS_PBSIZE=1046
CONFIG_CONSOLE_MUX=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_MISC_INIT_R=y
@@ -29,7 +30,6 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="ns2> "
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=1046
CONFIG_CMD_EEPROM=y
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=4
CONFIG_CMD_I2C=y
@@ -61,6 +61,7 @@
CONFIG_SYS_I2C_SLAVE=0x0
CONFIG_SYS_I2C_EEPROM_ADDR=0x50
# CONFIG_MMC is not set
+CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_MVGBE=y
diff --git a/configs/integratorap_cm720t_defconfig b/configs/integratorap_cm720t_defconfig
index 360c143..bd0a7bf 100644
--- a/configs/integratorap_cm720t_defconfig
+++ b/configs/integratorap_cm720t_defconfig
@@ -12,6 +12,8 @@
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="root=/dev/mtdblock0 console=ttyAM0 console=tty"
CONFIG_USE_BOOTCOMMAND=y
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=289
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_MISC_INIT_R=y
@@ -19,8 +21,6 @@
# CONFIG_CMDLINE_EDITING is not set
# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="Integrator-AP # "
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=289
CONFIG_CMD_IMLS=y
CONFIG_CMD_ARMFLASH=y
# CONFIG_CMD_SETEXPR is not set
@@ -28,6 +28,7 @@
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_RX_ETH_BUFFER=8
# CONFIG_MMC is not set
+CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_FLASH_SHOW_PROGRESS=0
diff --git a/configs/integratorap_cm920t_defconfig b/configs/integratorap_cm920t_defconfig
index dedd9e6..aae5512 100644
--- a/configs/integratorap_cm920t_defconfig
+++ b/configs/integratorap_cm920t_defconfig
@@ -12,6 +12,8 @@
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="root=/dev/mtdblock0 console=ttyAM0 console=tty"
CONFIG_USE_BOOTCOMMAND=y
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=289
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_MISC_INIT_R=y
@@ -19,8 +21,6 @@
# CONFIG_CMDLINE_EDITING is not set
# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="Integrator-AP # "
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=289
CONFIG_CMD_IMLS=y
CONFIG_CMD_ARMFLASH=y
# CONFIG_CMD_SETEXPR is not set
@@ -28,6 +28,7 @@
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_RX_ETH_BUFFER=8
# CONFIG_MMC is not set
+CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_FLASH_SHOW_PROGRESS=0
diff --git a/configs/integratorap_cm926ejs_defconfig b/configs/integratorap_cm926ejs_defconfig
index 0849b25..7aaec71 100644
--- a/configs/integratorap_cm926ejs_defconfig
+++ b/configs/integratorap_cm926ejs_defconfig
@@ -12,6 +12,8 @@
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="root=/dev/mtdblock0 console=ttyAM0 console=tty"
CONFIG_USE_BOOTCOMMAND=y
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=289
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_MISC_INIT_R=y
@@ -19,8 +21,6 @@
# CONFIG_CMDLINE_EDITING is not set
# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="Integrator-AP # "
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=289
CONFIG_CMD_IMLS=y
CONFIG_CMD_ARMFLASH=y
# CONFIG_CMD_SETEXPR is not set
@@ -28,6 +28,7 @@
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_RX_ETH_BUFFER=8
# CONFIG_MMC is not set
+CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_FLASH_SHOW_PROGRESS=0
diff --git a/configs/integratorap_cm946es_defconfig b/configs/integratorap_cm946es_defconfig
index 26c15b5..05fa604 100644
--- a/configs/integratorap_cm946es_defconfig
+++ b/configs/integratorap_cm946es_defconfig
@@ -12,6 +12,8 @@
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="root=/dev/mtdblock0 console=ttyAM0 console=tty"
CONFIG_USE_BOOTCOMMAND=y
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=289
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_MISC_INIT_R=y
@@ -19,8 +21,6 @@
# CONFIG_CMDLINE_EDITING is not set
# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="Integrator-AP # "
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=289
CONFIG_CMD_IMLS=y
CONFIG_CMD_ARMFLASH=y
# CONFIG_CMD_SETEXPR is not set
@@ -28,6 +28,7 @@
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_RX_ETH_BUFFER=8
# CONFIG_MMC is not set
+CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_FLASH_SHOW_PROGRESS=0
diff --git a/configs/integratorcp_cm1136_defconfig b/configs/integratorcp_cm1136_defconfig
index a29536a..f3e640b 100644
--- a/configs/integratorcp_cm1136_defconfig
+++ b/configs/integratorcp_cm1136_defconfig
@@ -17,6 +17,8 @@
CONFIG_BOOTARGS="root=/dev/mtdblock0 console=ttyAMA0 console=tty ip=dhcp netdev=27,0,0xfc800000,0xfc800010,eth0 video=clcdfb:0"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="tftpboot ; bootm"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=289
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_MISC_INIT_R=y
@@ -24,8 +26,6 @@
# CONFIG_CMDLINE_EDITING is not set
# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="Integrator-CP # "
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=289
CONFIG_CMD_IMLS=y
CONFIG_CMD_ARMFLASH=y
# CONFIG_CMD_SETEXPR is not set
@@ -36,6 +36,7 @@
CONFIG_USE_SERVERIP=y
CONFIG_SERVERIP="192.168.1.100"
# CONFIG_MMC is not set
+CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_FLASH_SHOW_PROGRESS=0
diff --git a/configs/integratorcp_cm920t_defconfig b/configs/integratorcp_cm920t_defconfig
index 00e3dd8..1a03b57 100644
--- a/configs/integratorcp_cm920t_defconfig
+++ b/configs/integratorcp_cm920t_defconfig
@@ -17,6 +17,8 @@
CONFIG_BOOTARGS="root=/dev/mtdblock0 console=ttyAMA0 console=tty ip=dhcp netdev=27,0,0xfc800000,0xfc800010,eth0 video=clcdfb:0"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="tftpboot ; bootm"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=289
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_MISC_INIT_R=y
@@ -24,8 +26,6 @@
# CONFIG_CMDLINE_EDITING is not set
# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="Integrator-CP # "
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=289
CONFIG_CMD_IMLS=y
CONFIG_CMD_ARMFLASH=y
# CONFIG_CMD_SETEXPR is not set
@@ -36,6 +36,7 @@
CONFIG_USE_SERVERIP=y
CONFIG_SERVERIP="192.168.1.100"
# CONFIG_MMC is not set
+CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_FLASH_SHOW_PROGRESS=0
diff --git a/configs/integratorcp_cm926ejs_defconfig b/configs/integratorcp_cm926ejs_defconfig
index ccc054e..1eb1c1a 100644
--- a/configs/integratorcp_cm926ejs_defconfig
+++ b/configs/integratorcp_cm926ejs_defconfig
@@ -17,6 +17,8 @@
CONFIG_BOOTARGS="root=/dev/mtdblock0 console=ttyAMA0 console=tty ip=dhcp netdev=27,0,0xfc800000,0xfc800010,eth0 video=clcdfb:0"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="tftpboot ; bootm"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=289
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_MISC_INIT_R=y
@@ -24,8 +26,6 @@
# CONFIG_CMDLINE_EDITING is not set
# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="Integrator-CP # "
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=289
CONFIG_CMD_IMLS=y
CONFIG_CMD_ARMFLASH=y
# CONFIG_CMD_SETEXPR is not set
@@ -36,6 +36,7 @@
CONFIG_USE_SERVERIP=y
CONFIG_SERVERIP="192.168.1.100"
# CONFIG_MMC is not set
+CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_FLASH_SHOW_PROGRESS=0
diff --git a/configs/integratorcp_cm946es_defconfig b/configs/integratorcp_cm946es_defconfig
index dabfe29..ee1191a 100644
--- a/configs/integratorcp_cm946es_defconfig
+++ b/configs/integratorcp_cm946es_defconfig
@@ -17,6 +17,8 @@
CONFIG_BOOTARGS="root=/dev/mtdblock0 console=ttyAMA0 console=tty ip=dhcp netdev=27,0,0xfc800000,0xfc800010,eth0 video=clcdfb:0"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="tftpboot ; bootm"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=289
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_MISC_INIT_R=y
@@ -24,8 +26,6 @@
# CONFIG_CMDLINE_EDITING is not set
# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="Integrator-CP # "
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=289
CONFIG_CMD_IMLS=y
CONFIG_CMD_ARMFLASH=y
# CONFIG_CMD_SETEXPR is not set
@@ -36,6 +36,7 @@
CONFIG_USE_SERVERIP=y
CONFIG_SERVERIP="192.168.1.100"
# CONFIG_MMC is not set
+CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_FLASH_SHOW_PROGRESS=0
diff --git a/configs/inteno_xg6846_ram_defconfig b/configs/inteno_xg6846_ram_defconfig
index 00fe36d..cb3a763 100644
--- a/configs/inteno_xg6846_ram_defconfig
+++ b/configs/inteno_xg6846_ram_defconfig
@@ -18,23 +18,23 @@
CONFIG_MIPS_BOOT_FDT=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_REMAKE_ELF=y
+CONFIG_SYS_BOOTM_LEN=0x1000000
CONFIG_BOOTDELAY=1
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Boot XG6846 in %d seconds\n"
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="sf probe; sf read 0x81000000 0x40000 0x500000; bootm 0x81000000"
+CONFIG_SYS_CBSIZE=512
+CONFIG_SYS_PBSIZE=541
CONFIG_DISPLAY_CPUINFO=y
CONFIG_SYS_MALLOC_BOOTPARAMS=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="XG6846 # "
CONFIG_SYS_MAXARGS=24
-CONFIG_SYS_CBSIZE=512
-CONFIG_SYS_PBSIZE=541
CONFIG_CMD_CPU=y
CONFIG_CMD_LICENSE=y
# CONFIG_CMD_BOOTD is not set
-CONFIG_SYS_BOOTM_LEN=0x1000000
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_EXPORTENV is not set
diff --git a/configs/iot2050_defconfig b/configs/iot2050_defconfig
index c2def97..576105a 100644
--- a/configs/iot2050_defconfig
+++ b/configs/iot2050_defconfig
@@ -41,6 +41,7 @@
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_BOOTCOMMAND="run start_watchdog; run distro_bootcmd"
+CONFIG_SYS_PBSIZE=1050
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_SPL_MAX_SIZE=0x58000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
@@ -63,7 +64,6 @@
CONFIG_SYS_SPI_U_BOOT_OFFS=0x380000
CONFIG_SYS_PROMPT="IOT2050> "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=1050
CONFIG_CMD_ASKENV=y
CONFIG_CMD_DFU=y
CONFIG_CMD_GPT=y
@@ -111,6 +111,7 @@
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ADMA=y
CONFIG_MMC_SDHCI_AM654=y
+CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_SFDP_SUPPORT=y
CONFIG_SPI_FLASH_STMICRO=y
diff --git a/configs/iot_devkit_defconfig b/configs/iot_devkit_defconfig
index 55ced6b..c492005 100644
--- a/configs/iot_devkit_defconfig
+++ b/configs/iot_devkit_defconfig
@@ -15,9 +15,9 @@
CONFIG_SYS_LOAD_ADDR=0x30000000
CONFIG_LOCALVERSION="-iotdk-1.0"
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
-CONFIG_SYS_PROMPT="IoTDK# "
CONFIG_SYS_CBSIZE=256
CONFIG_SYS_PBSIZE=280
+CONFIG_SYS_PROMPT="IoTDK# "
# CONFIG_CMD_BOOTD is not set
# CONFIG_CMD_BOOTM is not set
# CONFIG_CMD_ELF is not set
diff --git a/configs/j7200_evm_a72_defconfig b/configs/j7200_evm_a72_defconfig
index c0f31f5..2863472 100644
--- a/configs/j7200_evm_a72_defconfig
+++ b/configs/j7200_evm_a72_defconfig
@@ -29,10 +29,10 @@
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000
-CONFIG_OF_BOARD_SETUP=y
-CONFIG_OF_SYSTEM_SETUP=y
CONFIG_BOOTSTD_FULL=y
CONFIG_BOOTSTD_DEFAULTS=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_SYSTEM_SETUP=y
CONFIG_BOOTCOMMAND="run envboot; bootflow scan -lb"
CONFIG_LOGLEVEL=7
CONFIG_SPL_MAX_SIZE=0xc0000
@@ -168,7 +168,6 @@
CONFIG_REMOTEPROC_TI_K3_R5F=y
CONFIG_RESET_TI_SCI=y
CONFIG_SCSI=y
-CONFIG_DM_SCSI=y
CONFIG_DM_SERIAL=y
CONFIG_SOC_DEVICE=y
CONFIG_SOC_DEVICE_TI_K3=y
diff --git a/configs/j7200_evm_r5_defconfig b/configs/j7200_evm_r5_defconfig
index 069b2ac..05eea55 100644
--- a/configs/j7200_evm_r5_defconfig
+++ b/configs/j7200_evm_r5_defconfig
@@ -27,6 +27,7 @@
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_USE_BOOTCOMMAND=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_SPL_MAX_SIZE=0xc0000
@@ -63,7 +64,6 @@
CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPT=y
diff --git a/configs/j721e_beagleboneai64_a72_defconfig b/configs/j721e_beagleboneai64_a72_defconfig
index 9e16c98..4b019fa 100644
--- a/configs/j721e_beagleboneai64_a72_defconfig
+++ b/configs/j721e_beagleboneai64_a72_defconfig
@@ -51,13 +51,11 @@
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img"
CONFIG_SPL_I2C=y
CONFIG_SPL_DM_MAILBOX=y
-CONFIG_SPL_MTD_SUPPORT=y
CONFIG_SPL_NOR_SUPPORT=y
CONFIG_SPL_DM_RESET=y
CONFIG_SPL_POWER_DOMAIN=y
CONFIG_SPL_RAM_SUPPORT=y
CONFIG_SPL_RAM_DEVICE=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000
CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_SYS_MAXARGS=64
CONFIG_CMD_ASKENV=y
@@ -122,13 +120,14 @@
CONFIG_MMC_SDHCI_ADMA=y
CONFIG_SPL_MMC_SDHCI_ADMA=y
CONFIG_MMC_SDHCI_AM654=y
-CONFIG_MTD_UBI=y
CONFIG_MULTIPLEXER=y
CONFIG_MUX_MMIO=y
CONFIG_PHY_TI_DP83867=y
CONFIG_PHY_FIXED=y
CONFIG_TI_AM65_CPSW_NUSS=y
CONFIG_PHY=y
+CONFIG_PHY_J721E_WIZ=y
+CONFIG_PHY_CADENCE_SIERRA=y
CONFIG_SPL_PHY=y
CONFIG_PINCTRL=y
# CONFIG_PINCTRL_GENERIC is not set
@@ -146,7 +145,6 @@
CONFIG_REMOTEPROC_TI_K3_R5F=y
CONFIG_RESET_TI_SCI=y
CONFIG_SCSI=y
-CONFIG_DM_SCSI=y
CONFIG_DM_SERIAL=y
CONFIG_SOC_DEVICE=y
CONFIG_SOC_DEVICE_TI_K3=y
diff --git a/configs/j721e_beagleboneai64_r5_defconfig b/configs/j721e_beagleboneai64_r5_defconfig
index 5e6ad7b..9892caf 100644
--- a/configs/j721e_beagleboneai64_r5_defconfig
+++ b/configs/j721e_beagleboneai64_r5_defconfig
@@ -26,6 +26,7 @@
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_USE_BOOTCOMMAND=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y
@@ -56,7 +57,6 @@
CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_DFU=y
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
diff --git a/configs/j721e_evm_a72_defconfig b/configs/j721e_evm_a72_defconfig
index 82fa1b1..74af5be 100644
--- a/configs/j721e_evm_a72_defconfig
+++ b/configs/j721e_evm_a72_defconfig
@@ -29,10 +29,10 @@
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000
-CONFIG_OF_BOARD_SETUP=y
-CONFIG_OF_SYSTEM_SETUP=y
CONFIG_BOOTSTD_FULL=y
CONFIG_BOOTSTD_DEFAULTS=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_SYSTEM_SETUP=y
CONFIG_BOOTCOMMAND="run envboot; bootflow scan -lb"
CONFIG_LOGLEVEL=7
CONFIG_SPL_MAX_SIZE=0xc0000
@@ -170,7 +170,6 @@
CONFIG_REMOTEPROC_TI_K3_R5F=y
CONFIG_RESET_TI_SCI=y
CONFIG_SCSI=y
-CONFIG_DM_SCSI=y
CONFIG_DM_SERIAL=y
CONFIG_SOC_DEVICE=y
CONFIG_SOC_DEVICE_TI_K3=y
diff --git a/configs/j721e_evm_r5_defconfig b/configs/j721e_evm_r5_defconfig
index 55169bb..bc4f35c 100644
--- a/configs/j721e_evm_r5_defconfig
+++ b/configs/j721e_evm_r5_defconfig
@@ -29,6 +29,7 @@
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_BOOTCOMMAND=y
# CONFIG_DISPLAY_CPUINFO is not set
@@ -68,7 +69,6 @@
CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPT=y
diff --git a/configs/j721s2_evm_a72_defconfig b/configs/j721s2_evm_a72_defconfig
index a7adb92..6470d3d 100644
--- a/configs/j721s2_evm_a72_defconfig
+++ b/configs/j721s2_evm_a72_defconfig
@@ -174,7 +174,6 @@
CONFIG_REMOTEPROC_TI_K3_R5F=y
CONFIG_RESET_TI_SCI=y
CONFIG_SCSI=y
-CONFIG_DM_SCSI=y
CONFIG_DM_SERIAL=y
CONFIG_SOC_DEVICE=y
CONFIG_SOC_DEVICE_TI_K3=y
diff --git a/configs/j721s2_evm_r5_defconfig b/configs/j721s2_evm_r5_defconfig
index c0fdd86..b180f6c 100644
--- a/configs/j721s2_evm_r5_defconfig
+++ b/configs/j721s2_evm_r5_defconfig
@@ -29,6 +29,7 @@
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_USE_BOOTCOMMAND=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y
@@ -71,7 +72,6 @@
CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPT=y
diff --git a/configs/jethub_j100_defconfig b/configs/jethub_j100_defconfig
index 1e6d5c7..8632454 100644
--- a/configs/jethub_j100_defconfig
+++ b/configs/jethub_j100_defconfig
@@ -32,7 +32,6 @@
CONFIG_CMD_ADC=y
CONFIG_CMD_DFU=y
CONFIG_CMD_GPIO=y
-CONFIG_RANDOM_UUID=y
CONFIG_CMD_I2C=y
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
@@ -48,7 +47,6 @@
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_MESON=y
CONFIG_MMC_MESON_GX=y
-CONFIG_MTD_UBI=y
CONFIG_PHY_REALTEK=y
CONFIG_ETH_DESIGNWARE_MESON8B=y
CONFIG_MESON_GXL_USB_PHY=y
@@ -74,3 +72,4 @@
CONFIG_USB_GADGET_PRODUCT_NUM=0xfada
CONFIG_USB_GADGET_DWC2_OTG=y
CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_RANDOM_UUID=y
diff --git a/configs/jethub_j80_defconfig b/configs/jethub_j80_defconfig
index b370e5d..ca0808f 100644
--- a/configs/jethub_j80_defconfig
+++ b/configs/jethub_j80_defconfig
@@ -33,7 +33,6 @@
CONFIG_CMD_ADC=y
CONFIG_CMD_DFU=y
CONFIG_CMD_GPIO=y
-CONFIG_RANDOM_UUID=y
CONFIG_CMD_I2C=y
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
@@ -49,12 +48,11 @@
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_MESON=y
CONFIG_MMC_MESON_GX=y
-CONFIG_MTD_UBI=y
CONFIG_PHY_MESON_GXL=y
CONFIG_DM_MDIO=y
CONFIG_DM_MDIO_MUX=y
CONFIG_ETH_DESIGNWARE_MESON8B=y
-CONFIG_MDIO_MUX_MMIOREG=y
+CONFIG_MDIO_MUX_MESON_GXL=y
CONFIG_MESON_GXL_USB_PHY=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_MESON_GXL=y
@@ -78,3 +76,4 @@
CONFIG_USB_GADGET_PRODUCT_NUM=0xfada
CONFIG_USB_GADGET_DWC2_OTG=y
CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_RANDOM_UUID=y
diff --git a/configs/jetson-tk1_defconfig b/configs/jetson-tk1_defconfig
index 77af459..92ff93a 100644
--- a/configs/jetson-tk1_defconfig
+++ b/configs/jetson-tk1_defconfig
@@ -18,6 +18,7 @@
CONFIG_SYS_LOAD_ADDR=0x81000000
CONFIG_PCI=y
CONFIG_OF_SYSTEM_SETUP=y
+CONFIG_SYS_PBSIZE=2089
CONFIG_CONSOLE_MUX=y
CONFIG_SYS_STDIO_DEREGISTER=y
CONFIG_SPL_FOOTPRINT_LIMIT=y
@@ -29,7 +30,6 @@
CONFIG_SPL_SYS_MALLOC_SIZE=0x10000
CONFIG_SYS_PROMPT="Tegra124 (Jetson TK1) # "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=2089
# CONFIG_CMD_IMI is not set
CONFIG_CMD_DFU=y
CONFIG_CMD_GPIO=y
@@ -47,7 +47,6 @@
CONFIG_ENV_OVERWRITE=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_MMC_ENV_PART=2
-CONFIG_SPL_DM=y
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
CONFIG_DFU_SF=y
diff --git a/configs/khadas-edge-captain-rk3399_defconfig b/configs/khadas-edge-captain-rk3399_defconfig
index ed06fe7..7f4e48a 100644
--- a/configs/khadas-edge-captain-rk3399_defconfig
+++ b/configs/khadas-edge-captain-rk3399_defconfig
@@ -16,6 +16,7 @@
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEBUG_UART=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-khadas-edge-captain.dtb"
+CONFIG_SYS_PBSIZE=1048
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SPL_MAX_SIZE=0x2e000
CONFIG_SPL_PAD_TO=0x7f8000
@@ -29,7 +30,6 @@
CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
CONFIG_TPL=y
CONFIG_SYS_PROMPT="kedge# "
-CONFIG_SYS_PBSIZE=1048
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
@@ -43,6 +43,7 @@
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MISC=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MMC_SDHCI=y
@@ -61,11 +62,12 @@
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_GENERIC=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
CONFIG_USB_HOST_ETHER=y
CONFIG_USB_ETHER_ASIX=y
CONFIG_USB_ETHER_ASIX88179=y
diff --git a/configs/khadas-edge-rk3399_defconfig b/configs/khadas-edge-rk3399_defconfig
index 9df945e..9de8a53 100644
--- a/configs/khadas-edge-rk3399_defconfig
+++ b/configs/khadas-edge-rk3399_defconfig
@@ -16,6 +16,7 @@
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEBUG_UART=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-khadas-edge.dtb"
+CONFIG_SYS_PBSIZE=1048
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SPL_MAX_SIZE=0x2e000
CONFIG_SPL_PAD_TO=0x7f8000
@@ -29,7 +30,6 @@
CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
CONFIG_TPL=y
CONFIG_SYS_PROMPT="kedge# "
-CONFIG_SYS_PBSIZE=1048
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
@@ -42,6 +42,7 @@
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MISC=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MMC_SDHCI=y
@@ -60,11 +61,12 @@
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_GENERIC=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
CONFIG_USB_HOST_ETHER=y
CONFIG_USB_ETHER_ASIX=y
CONFIG_USB_ETHER_ASIX88179=y
diff --git a/configs/khadas-edge-v-rk3399_defconfig b/configs/khadas-edge-v-rk3399_defconfig
index e216c0e..f31b8ec 100644
--- a/configs/khadas-edge-v-rk3399_defconfig
+++ b/configs/khadas-edge-v-rk3399_defconfig
@@ -16,6 +16,7 @@
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEBUG_UART=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-khadas-edge-v.dtb"
+CONFIG_SYS_PBSIZE=1048
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SPL_MAX_SIZE=0x2e000
CONFIG_SPL_PAD_TO=0x7f8000
@@ -29,7 +30,6 @@
CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
CONFIG_TPL=y
CONFIG_SYS_PROMPT="kedge# "
-CONFIG_SYS_PBSIZE=1048
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
@@ -43,6 +43,7 @@
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MISC=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MMC_SDHCI=y
@@ -61,11 +62,12 @@
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_GENERIC=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
CONFIG_USB_HOST_ETHER=y
CONFIG_USB_ETHER_ASIX=y
CONFIG_USB_ETHER_ASIX88179=y
diff --git a/configs/khadas-vim2_defconfig b/configs/khadas-vim2_defconfig
index 28e9052..59ef337 100644
--- a/configs/khadas-vim2_defconfig
+++ b/configs/khadas-vim2_defconfig
@@ -51,7 +51,7 @@
CONFIG_DM_MDIO=y
CONFIG_DM_MDIO_MUX=y
CONFIG_ETH_DESIGNWARE_MESON8B=y
-CONFIG_MDIO_MUX_MMIOREG=y
+CONFIG_MDIO_MUX_MESON_GXL=y
CONFIG_MESON_GXL_USB_PHY=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_MESON_GXL=y
diff --git a/configs/khadas-vim_defconfig b/configs/khadas-vim_defconfig
index d27ab6f..5ed7c1a 100644
--- a/configs/khadas-vim_defconfig
+++ b/configs/khadas-vim_defconfig
@@ -45,7 +45,7 @@
CONFIG_DM_MDIO=y
CONFIG_DM_MDIO_MUX=y
CONFIG_ETH_DESIGNWARE_MESON8B=y
-CONFIG_MDIO_MUX_MMIOREG=y
+CONFIG_MDIO_MUX_MESON_GXL=y
CONFIG_MESON_GXL_USB_PHY=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_MESON_GXL=y
diff --git a/configs/kmcent2_defconfig b/configs/kmcent2_defconfig
index 2cf9565..4ddb30e 100644
--- a/configs/kmcent2_defconfig
+++ b/configs/kmcent2_defconfig
@@ -26,13 +26,14 @@
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_SYS_CBSIZE=512
+CONFIG_SYS_PBSIZE=532
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_LAST_STAGE_INIT=y
CONFIG_HUSH_PARSER=y
+CONFIG_HUSH_OLD_PARSER=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_CBSIZE=512
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_DM=y
CONFIG_CMD_I2C=y
CONFIG_LOADS_ECHO=y
diff --git a/configs/kmcoge5ne_defconfig b/configs/kmcoge5ne_defconfig
index 257ceec..2de670e 100644
--- a/configs/kmcoge5ne_defconfig
+++ b/configs/kmcoge5ne_defconfig
@@ -122,20 +122,21 @@
CONFIG_LCRR_CLKDIV_4=y
CONFIG_83XX_PCICLK=0x3ef1480
# CONFIG_PCI is not set
+CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Hit <SPACE> key to stop autoboot in %2ds\n"
CONFIG_AUTOBOOT_STOP_STR=" "
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_SYS_CBSIZE=512
+CONFIG_SYS_PBSIZE=532
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_HWCONFIG is not set
CONFIG_LAST_STAGE_INIT=y
CONFIG_MISC_INIT_R=y
CONFIG_HUSH_PARSER=y
+CONFIG_HUSH_OLD_PARSER=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_CBSIZE=512
-CONFIG_SYS_PBSIZE=532
-CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_CMD_IMLS=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
diff --git a/configs/kmeter1_defconfig b/configs/kmeter1_defconfig
index 46e0370..7384525 100644
--- a/configs/kmeter1_defconfig
+++ b/configs/kmeter1_defconfig
@@ -102,20 +102,21 @@
CONFIG_LCRR_EADC_2=y
CONFIG_LCRR_CLKDIV_4=y
# CONFIG_PCI is not set
+CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Hit <SPACE> key to stop autoboot in %2ds\n"
CONFIG_AUTOBOOT_STOP_STR=" "
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_SYS_CBSIZE=512
+CONFIG_SYS_PBSIZE=532
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_HWCONFIG is not set
CONFIG_LAST_STAGE_INIT=y
CONFIG_MISC_INIT_R=y
CONFIG_HUSH_PARSER=y
+CONFIG_HUSH_OLD_PARSER=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_CBSIZE=512
-CONFIG_SYS_PBSIZE=532
-CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_CMD_IMLS=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
diff --git a/configs/kmopti2_defconfig b/configs/kmopti2_defconfig
index c6c021a..695df39 100644
--- a/configs/kmopti2_defconfig
+++ b/configs/kmopti2_defconfig
@@ -110,20 +110,21 @@
CONFIG_LCRR_CLKDIV_2=y
CONFIG_83XX_PCICLK=0x3ef1480
# CONFIG_PCI is not set
+CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Hit <SPACE> key to stop autoboot in %2ds\n"
CONFIG_AUTOBOOT_STOP_STR=" "
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_SYS_CBSIZE=512
+CONFIG_SYS_PBSIZE=532
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_HWCONFIG is not set
CONFIG_LAST_STAGE_INIT=y
CONFIG_MISC_INIT_R=y
CONFIG_HUSH_PARSER=y
+CONFIG_HUSH_OLD_PARSER=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_CBSIZE=512
-CONFIG_SYS_PBSIZE=532
-CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_CMD_IMLS=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
diff --git a/configs/kmsupx5_defconfig b/configs/kmsupx5_defconfig
index 25642e7..fa7af71 100644
--- a/configs/kmsupx5_defconfig
+++ b/configs/kmsupx5_defconfig
@@ -96,20 +96,21 @@
CONFIG_LCRR_CLKDIV_2=y
CONFIG_83XX_PCICLK=0x3ef1480
# CONFIG_PCI is not set
+CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Hit <SPACE> key to stop autoboot in %2ds\n"
CONFIG_AUTOBOOT_STOP_STR=" "
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_SYS_CBSIZE=512
+CONFIG_SYS_PBSIZE=532
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_HWCONFIG is not set
CONFIG_LAST_STAGE_INIT=y
CONFIG_MISC_INIT_R=y
CONFIG_HUSH_PARSER=y
+CONFIG_HUSH_OLD_PARSER=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_CBSIZE=512
-CONFIG_SYS_PBSIZE=532
-CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_CMD_IMLS=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
diff --git a/configs/kmtepr2_defconfig b/configs/kmtepr2_defconfig
index ea37a29..085a283 100644
--- a/configs/kmtepr2_defconfig
+++ b/configs/kmtepr2_defconfig
@@ -110,20 +110,21 @@
CONFIG_LCRR_CLKDIV_2=y
CONFIG_83XX_PCICLK=0x3ef1480
# CONFIG_PCI is not set
+CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Hit <SPACE> key to stop autoboot in %2ds\n"
CONFIG_AUTOBOOT_STOP_STR=" "
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_SYS_CBSIZE=512
+CONFIG_SYS_PBSIZE=532
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_HWCONFIG is not set
CONFIG_LAST_STAGE_INIT=y
CONFIG_MISC_INIT_R=y
CONFIG_HUSH_PARSER=y
+CONFIG_HUSH_OLD_PARSER=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_CBSIZE=512
-CONFIG_SYS_PBSIZE=532
-CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_CMD_IMLS=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
diff --git a/configs/koelsch_defconfig b/configs/koelsch_defconfig
index b3e0e14..d39533c 100644
--- a/configs/koelsch_defconfig
+++ b/configs/koelsch_defconfig
@@ -33,6 +33,8 @@
CONFIG_PCI=y
CONFIG_FIT=y
CONFIG_BOOTDELAY=3
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=256
CONFIG_SPL_MAX_SIZE=0x4000
CONFIG_SPL_NO_BSS_LIMIT=y
CONFIG_SPL_BOARD_INIT=y
@@ -44,8 +46,6 @@
CONFIG_SYS_SPI_U_BOOT_OFFS=0x140000
CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=256
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_XIMG is not set
diff --git a/configs/kontron-sl-mx6ul_defconfig b/configs/kontron-sl-mx6ul_defconfig
index 1e3a6b5..12d96b6 100644
--- a/configs/kontron-sl-mx6ul_defconfig
+++ b/configs/kontron-sl-mx6ul_defconfig
@@ -28,6 +28,7 @@
CONFIG_DISTRO_DEFAULTS=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_FDT_FIXUP_PARTITIONS=y
+CONFIG_SYS_PBSIZE=532
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_TYPES=y
CONFIG_BOARD_EARLY_INIT_F=y
@@ -39,7 +40,6 @@
CONFIG_SYS_SPI_U_BOOT_OFFS=0x11400
CONFIG_SPL_WATCHDOG=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
diff --git a/configs/kontron-sl-mx8mm_defconfig b/configs/kontron-sl-mx8mm_defconfig
index 78e44ab..50c5590 100644
--- a/configs/kontron-sl-mx8mm_defconfig
+++ b/configs/kontron-sl-mx8mm_defconfig
@@ -31,6 +31,8 @@
CONFIG_SPL_LOAD_FIT=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_OF_BOARD_SETUP=y
+CONFIG_SYS_CBSIZE=2048
+CONFIG_SYS_PBSIZE=276
CONFIG_BOARD_TYPES=y
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
@@ -50,8 +52,6 @@
CONFIG_SPL_SPI_LOAD=y
CONFIG_SYS_SPI_U_BOOT_OFFS=0x58000
CONFIG_SPL_WATCHDOG=y
-CONFIG_SYS_CBSIZE=2048
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_NVEDIT_EFI=y
# CONFIG_CMD_LZMADEC is not set
CONFIG_CMD_CLK=y
diff --git a/configs/kontron_pitx_imx8m_defconfig b/configs/kontron_pitx_imx8m_defconfig
index 6e9b289..02fc696 100644
--- a/configs/kontron_pitx_imx8m_defconfig
+++ b/configs/kontron_pitx_imx8m_defconfig
@@ -27,8 +27,11 @@
CONFIG_FIT=y
CONFIG_SPL_FIT_PRINT=y
CONFIG_SPL_LOAD_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_OF_SYSTEM_SETUP=y
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_LATE_INIT=y
CONFIG_MISC_INIT_R=y
@@ -46,10 +49,7 @@
CONFIG_SPL_I2C=y
CONFIG_SPL_POWER=y
CONFIG_SPL_WATCHDOG=y
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=276
# CONFIG_BOOTM_NETBSD is not set
-CONFIG_SYS_BOOTM_LEN=0x2000000
# CONFIG_CMD_EXPORTENV is not set
# CONFIG_CMD_IMPORTENV is not set
CONFIG_CMD_NVEDIT_EFI=y
@@ -58,7 +58,6 @@
CONFIG_CMD_FUSE=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
-# CONFIG_RANDOM_UUID is not set
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
@@ -109,6 +108,7 @@
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_DWC3=y
+# CONFIG_RANDOM_UUID is not set
CONFIG_EFI_SET_TIME=y
CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y
CONFIG_EFI_CAPSULE_FIRMWARE_FIT=y
diff --git a/configs/kontron_sl28_defconfig b/configs/kontron_sl28_defconfig
index ef01452..639c5c6 100644
--- a/configs/kontron_sl28_defconfig
+++ b/configs/kontron_sl28_defconfig
@@ -33,11 +33,14 @@
CONFIG_MP=y
CONFIG_FIT=y
CONFIG_SPL_LOAD_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x800000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=10
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTARGS=y
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
CONFIG_BOARD_LATE_INIT=y
# CONFIG_HWCONFIG is not set
CONFIG_PCI_INIT_R=y
@@ -53,14 +56,10 @@
CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_SPL_SPI_LOAD=y
CONFIG_CMDLINE_PS_SUPPORT=y
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=276
-CONFIG_SYS_BOOTM_LEN=0x800000
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_NVEDIT_EFI=y
CONFIG_CMD_DFU=y
-CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
@@ -110,7 +109,6 @@
CONFIG_PCIE_ECAM_GENERIC=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_RTC_RV8803=y
-CONFIG_SCSI=y
CONFIG_SYS_NS16550=y
CONFIG_SPI=y
CONFIG_FSL_DSPI=y
diff --git a/configs/kp_imx53_defconfig b/configs/kp_imx53_defconfig
index 14cb69d..49ad9d4 100644
--- a/configs/kp_imx53_defconfig
+++ b/configs/kp_imx53_defconfig
@@ -17,12 +17,12 @@
CONFIG_AUTOBOOT_STOP_STR="."
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run usbupd; run distro_bootcmd"
+CONFIG_SYS_PBSIZE=532
CONFIG_SILENT_CONSOLE=y
# CONFIG_SILENT_CONSOLE_UPDATE_ON_SET is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
diff --git a/configs/kp_imx6q_tpc_defconfig b/configs/kp_imx6q_tpc_defconfig
index 3a7763c..cc57ab0 100644
--- a/configs/kp_imx6q_tpc_defconfig
+++ b/configs/kp_imx6q_tpc_defconfig
@@ -26,13 +26,13 @@
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_STOP_STR="."
# CONFIG_USE_BOOTCOMMAND is not set
+CONFIG_SYS_PBSIZE=532
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
CONFIG_SPL_RAW_IMAGE_SUPPORT=y
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_POWER=y
CONFIG_SPL_WATCHDOG=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=532
# CONFIG_CMD_ELF is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
diff --git a/configs/kstr_sama5d27_defconfig b/configs/kstr_sama5d27_defconfig
index fa7a549..9577d73 100644
--- a/configs/kstr_sama5d27_defconfig
+++ b/configs/kstr_sama5d27_defconfig
@@ -23,7 +23,6 @@
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_MISC_INIT_R=y
CONFIG_CMD_TLV_EEPROM=y
-CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
diff --git a/configs/kylin-rk3036_defconfig b/configs/kylin-rk3036_defconfig
index 8d3f1a7..cb313a1 100644
--- a/configs/kylin-rk3036_defconfig
+++ b/configs/kylin-rk3036_defconfig
@@ -52,7 +52,6 @@
CONFIG_LED=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
-CONFIG_MTD=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_PINCTRL=y
CONFIG_DM_REGULATOR_FIXED=y
diff --git a/configs/lager_defconfig b/configs/lager_defconfig
index c567241..da2ba58 100644
--- a/configs/lager_defconfig
+++ b/configs/lager_defconfig
@@ -33,6 +33,8 @@
CONFIG_PCI=y
CONFIG_FIT=y
CONFIG_BOOTDELAY=3
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=256
CONFIG_SPL_MAX_SIZE=0x4000
CONFIG_SPL_NO_BSS_LIMIT=y
CONFIG_SPL_BOARD_INIT=y
@@ -44,8 +46,6 @@
CONFIG_SYS_SPI_U_BOOT_OFFS=0x140000
CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=256
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_XIMG is not set
diff --git a/configs/lctech_pi_f1c200s_defconfig b/configs/lctech_pi_f1c200s_defconfig
index 310719c..e1e8d3a 100644
--- a/configs/lctech_pi_f1c200s_defconfig
+++ b/configs/lctech_pi_f1c200s_defconfig
@@ -7,5 +7,6 @@
CONFIG_DRAM_ZQ=0
CONFIG_SUNXI_MINIMUM_DRAM_MB=64
# CONFIG_VIDEO_SUNXI is not set
+CONFIG_MTD=y
CONFIG_CONS_INDEX=2
CONFIG_SPI=y
diff --git a/configs/leez-rk3399_defconfig b/configs/leez-rk3399_defconfig
index fa93660..76dd919 100644
--- a/configs/leez-rk3399_defconfig
+++ b/configs/leez-rk3399_defconfig
@@ -39,6 +39,7 @@
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MISC=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MMC_SDHCI=y
@@ -56,9 +57,10 @@
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
CONFIG_USB_HOST_ETHER=y
CONFIG_USB_ETHER_ASIX=y
CONFIG_USB_ETHER_ASIX88179=y
diff --git a/configs/librem5_defconfig b/configs/librem5_defconfig
index 7f630ed..91ead3f 100644
--- a/configs/librem5_defconfig
+++ b/configs/librem5_defconfig
@@ -30,6 +30,7 @@
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=0
CONFIG_OF_SYSTEM_SETUP=y
+CONFIG_SYS_PBSIZE=1050
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_SYS_DEVICE_NULLDEV is not set
CONFIG_ARCH_MISC_INIT=y
@@ -52,7 +53,6 @@
CONFIG_SPL_WATCHDOG=y
CONFIG_SYS_PROMPT="u-boot=> "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=1050
CONFIG_CMD_MEMTEST=y
CONFIG_SYS_ALT_MEMTEST=y
CONFIG_CMD_CLK=y
@@ -115,6 +115,7 @@
CONFIG_MMC_HS400_ES_SUPPORT=y
CONFIG_MMC_HS400_SUPPORT=y
CONFIG_FSL_USDHC=y
+CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_WINBOND=y
diff --git a/configs/libretech-ac_defconfig b/configs/libretech-ac_defconfig
index bc17b42..f0ab195 100644
--- a/configs/libretech-ac_defconfig
+++ b/configs/libretech-ac_defconfig
@@ -57,7 +57,7 @@
CONFIG_DM_MDIO=y
CONFIG_DM_MDIO_MUX=y
CONFIG_ETH_DESIGNWARE_MESON8B=y
-CONFIG_MDIO_MUX_MMIOREG=y
+CONFIG_MDIO_MUX_MESON_GXL=y
CONFIG_MESON_GXL_USB_PHY=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_MESON_GXL=y
diff --git a/configs/libretech-cc_defconfig b/configs/libretech-cc_defconfig
index baa9b1b..bb1a37a 100644
--- a/configs/libretech-cc_defconfig
+++ b/configs/libretech-cc_defconfig
@@ -44,7 +44,7 @@
CONFIG_DM_MDIO=y
CONFIG_DM_MDIO_MUX=y
CONFIG_ETH_DESIGNWARE_MESON8B=y
-CONFIG_MDIO_MUX_MMIOREG=y
+CONFIG_MDIO_MUX_MESON_GXL=y
CONFIG_MESON_GXL_USB_PHY=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_MESON_GXL=y
diff --git a/configs/libretech-cc_v2_defconfig b/configs/libretech-cc_v2_defconfig
index ba74b24..8949e24 100644
--- a/configs/libretech-cc_v2_defconfig
+++ b/configs/libretech-cc_v2_defconfig
@@ -52,7 +52,7 @@
CONFIG_DM_MDIO=y
CONFIG_DM_MDIO_MUX=y
CONFIG_ETH_DESIGNWARE_MESON8B=y
-CONFIG_MDIO_MUX_MMIOREG=y
+CONFIG_MDIO_MUX_MESON_GXL=y
CONFIG_PHY=y
CONFIG_MESON_GXL_USB_PHY=y
CONFIG_PINCTRL=y
@@ -66,6 +66,7 @@
CONFIG_DM_SPI=y
CONFIG_MESON_SPIFC=y
CONFIG_USB=y
+CONFIG_DM_USB_GADGET=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_XHCI_DWC3_OF_SIMPLE=y
diff --git a/configs/libretech-s905d-pc_defconfig b/configs/libretech-s905d-pc_defconfig
index cd138d6..a5dc311 100644
--- a/configs/libretech-s905d-pc_defconfig
+++ b/configs/libretech-s905d-pc_defconfig
@@ -53,7 +53,7 @@
CONFIG_DM_MDIO=y
CONFIG_DM_MDIO_MUX=y
CONFIG_ETH_DESIGNWARE_MESON8B=y
-CONFIG_MDIO_MUX_MMIOREG=y
+CONFIG_MDIO_MUX_MESON_GXL=y
CONFIG_MESON_GXL_USB_PHY=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_MESON_GXL=y
diff --git a/configs/libretech-s912-pc_defconfig b/configs/libretech-s912-pc_defconfig
index dabb4ca..68f462e 100644
--- a/configs/libretech-s912-pc_defconfig
+++ b/configs/libretech-s912-pc_defconfig
@@ -52,7 +52,7 @@
CONFIG_DM_MDIO=y
CONFIG_DM_MDIO_MUX=y
CONFIG_ETH_DESIGNWARE_MESON8B=y
-CONFIG_MDIO_MUX_MMIOREG=y
+CONFIG_MDIO_MUX_MESON_GXL=y
CONFIG_MESON_GXL_USB_PHY=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_MESON_GXL=y
diff --git a/configs/libretech_all_h3_it_h5_defconfig b/configs/libretech_all_h3_it_h5_defconfig
index cb7ffb4..f751c4f 100644
--- a/configs/libretech_all_h3_it_h5_defconfig
+++ b/configs/libretech_all_h3_it_h5_defconfig
@@ -7,6 +7,7 @@
CONFIG_MMC_SUNXI_SLOT_EXTRA=2
CONFIG_SPL_SPI_SUNXI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_MTD=y
CONFIG_SPI_FLASH_XMC=y
CONFIG_SPI=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/libretech_all_h5_cc_h5_defconfig b/configs/libretech_all_h5_cc_h5_defconfig
index c3aa4b1..c1761b4 100644
--- a/configs/libretech_all_h5_cc_h5_defconfig
+++ b/configs/libretech_all_h5_cc_h5_defconfig
@@ -7,6 +7,7 @@
CONFIG_MMC_SUNXI_SLOT_EXTRA=2
CONFIG_SPL_SPI_SUNXI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_MTD=y
CONFIG_SPI_FLASH_XMC=y
CONFIG_SUN8I_EMAC=y
CONFIG_SPI=y
diff --git a/configs/licheepi_nano_defconfig b/configs/licheepi_nano_defconfig
index b25c9ba..d59affb 100644
--- a/configs/licheepi_nano_defconfig
+++ b/configs/licheepi_nano_defconfig
@@ -7,6 +7,7 @@
CONFIG_DRAM_ZQ=0
# CONFIG_VIDEO_SUNXI is not set
CONFIG_SPL_SPI_SUNXI=y
+CONFIG_MTD=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_SPI_FLASH_XTX=y
CONFIG_SPI=y
diff --git a/configs/linkit-smart-7688_defconfig b/configs/linkit-smart-7688_defconfig
index 0bdb4e6..fd11f08 100644
--- a/configs/linkit-smart-7688_defconfig
+++ b/configs/linkit-smart-7688_defconfig
@@ -27,6 +27,8 @@
CONFIG_FIT_SIGNATURE=y
CONFIG_LEGACY_IMAGE_FORMAT=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_SYS_CBSIZE=512
+CONFIG_SYS_PBSIZE=532
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SYS_MALLOC_BOOTPARAMS=y
@@ -37,8 +39,6 @@
CONFIG_SPL_NOR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_CBSIZE=512
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_LICENSE=y
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_XIMG is not set
@@ -65,7 +65,6 @@
CONFIG_LED=y
CONFIG_LED_BLINK=y
CONFIG_LED_GPIO=y
-CONFIG_MTD=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_SPANSION=y
diff --git a/configs/lion-rk3368_defconfig b/configs/lion-rk3368_defconfig
index 9c29eb6..32d34bc 100644
--- a/configs/lion-rk3368_defconfig
+++ b/configs/lion-rk3368_defconfig
@@ -75,7 +75,6 @@
CONFIG_SYS_I2C_ROCKCHIP=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
-CONFIG_MTD=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_PHY_MSCC=y
diff --git a/configs/liteboard_defconfig b/configs/liteboard_defconfig
index 1ff5b3c..941a1cf 100644
--- a/configs/liteboard_defconfig
+++ b/configs/liteboard_defconfig
@@ -24,12 +24,12 @@
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="mmc dev ${mmcdev};if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi"
CONFIG_DEFAULT_FDT_FILE="imx6ul-liteboard.dtb"
+CONFIG_SYS_PBSIZE=532
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_WATCHDOG=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPIO=y
diff --git a/configs/ls1012a2g5rdb_tfa_defconfig b/configs/ls1012a2g5rdb_tfa_defconfig
index 199f36a..fbe8b73 100644
--- a/configs/ls1012a2g5rdb_tfa_defconfig
+++ b/configs/ls1012a2g5rdb_tfa_defconfig
@@ -25,10 +25,10 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 quiet lpj=250000"
+CONFIG_SYS_PBSIZE=532
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEMTEST=y
@@ -57,7 +57,6 @@
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
CONFIG_FSL_PFE=y
CONFIG_DM_RTC=y
-CONFIG_DM_SCSI=y
CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
diff --git a/configs/ls1012afrdm_tfa_defconfig b/configs/ls1012afrdm_tfa_defconfig
index ec900bd..03244da 100644
--- a/configs/ls1012afrdm_tfa_defconfig
+++ b/configs/ls1012afrdm_tfa_defconfig
@@ -25,10 +25,10 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 quiet lpj=250000"
+CONFIG_SYS_PBSIZE=532
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEMTEST=y
diff --git a/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig b/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig
index 5e95c6e..d04f383 100644
--- a/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig
@@ -25,10 +25,10 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 quiet lpj=250000"
+CONFIG_SYS_PBSIZE=532
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEMTEST=y
@@ -58,7 +58,6 @@
CONFIG_NVME_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_DM_RTC=y
-CONFIG_DM_SCSI=y
CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
diff --git a/configs/ls1012afrwy_tfa_defconfig b/configs/ls1012afrwy_tfa_defconfig
index d10886f..b7e3792 100644
--- a/configs/ls1012afrwy_tfa_defconfig
+++ b/configs/ls1012afrwy_tfa_defconfig
@@ -26,10 +26,10 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 quiet lpj=250000"
+CONFIG_SYS_PBSIZE=532
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEMTEST=y
@@ -61,7 +61,6 @@
CONFIG_NVME_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_DM_RTC=y
-CONFIG_DM_SCSI=y
CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
diff --git a/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig
index 06aaa42..1062244 100644
--- a/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig
@@ -28,12 +28,12 @@
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 quiet lpj=250000"
# CONFIG_USE_BOOTCOMMAND is not set
+CONFIG_SYS_PBSIZE=532
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_MISC_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
@@ -74,7 +74,6 @@
CONFIG_DM_RTC=y
CONFIG_RTC_PCF8563=y
CONFIG_SCSI=y
-CONFIG_DM_SCSI=y
CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
diff --git a/configs/ls1012aqds_tfa_defconfig b/configs/ls1012aqds_tfa_defconfig
index 594ad12..612e80d 100644
--- a/configs/ls1012aqds_tfa_defconfig
+++ b/configs/ls1012aqds_tfa_defconfig
@@ -30,12 +30,12 @@
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 quiet lpj=250000"
# CONFIG_USE_BOOTCOMMAND is not set
+CONFIG_SYS_PBSIZE=532
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_MISC_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
@@ -83,7 +83,6 @@
CONFIG_DM_RTC=y
CONFIG_RTC_PCF8563=y
CONFIG_SCSI=y
-CONFIG_DM_SCSI=y
CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
diff --git a/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig
index ac2c9cc..0828770 100644
--- a/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig
@@ -27,10 +27,10 @@
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 quiet lpj=250000"
# CONFIG_USE_BOOTCOMMAND is not set
+CONFIG_SYS_PBSIZE=532
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEMTEST=y
@@ -62,7 +62,6 @@
CONFIG_NVME_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_DM_RTC=y
-CONFIG_DM_SCSI=y
CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
diff --git a/configs/ls1012ardb_tfa_defconfig b/configs/ls1012ardb_tfa_defconfig
index cc0f046..700828d 100644
--- a/configs/ls1012ardb_tfa_defconfig
+++ b/configs/ls1012ardb_tfa_defconfig
@@ -27,10 +27,10 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 quiet lpj=250000"
+CONFIG_SYS_PBSIZE=532
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEMTEST=y
@@ -63,7 +63,6 @@
CONFIG_NVME_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_DM_RTC=y
-CONFIG_DM_SCSI=y
CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
diff --git a/configs/ls1021aiot_qspi_defconfig b/configs/ls1021aiot_qspi_defconfig
index c705345..c91d8c7 100644
--- a/configs/ls1021aiot_qspi_defconfig
+++ b/configs/ls1021aiot_qspi_defconfig
@@ -22,12 +22,12 @@
CONFIG_QSPI_BOOT=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
CONFIG_ARCH_MISC_INIT=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_MISC_INIT_R=y
CONFIG_ID_EEPROM=y
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GREPENV=y
CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
@@ -67,7 +67,6 @@
CONFIG_NVME_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
-CONFIG_DM_SCSI=y
CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
diff --git a/configs/ls1021aiot_sdcard_defconfig b/configs/ls1021aiot_sdcard_defconfig
index 5927d3e..7ea28bb 100644
--- a/configs/ls1021aiot_sdcard_defconfig
+++ b/configs/ls1021aiot_sdcard_defconfig
@@ -33,6 +33,8 @@
CONFIG_SD_BOOT_QSPI=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
CONFIG_ARCH_MISC_INIT=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_MISC_INIT_R=y
@@ -53,8 +55,6 @@
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_SPL_WATCHDOG=y
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GREPENV=y
CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
@@ -97,7 +97,6 @@
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_U_QE=y
CONFIG_SYS_QE_FW_ADDR=0xf40000
-CONFIG_DM_SCSI=y
CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
diff --git a/configs/ls1021aqds_ddr4_nor_defconfig b/configs/ls1021aqds_ddr4_nor_defconfig
index 5a4c364..f372cc4 100644
--- a/configs/ls1021aqds_ddr4_nor_defconfig
+++ b/configs/ls1021aqds_ddr4_nor_defconfig
@@ -27,19 +27,19 @@
CONFIG_DYNAMIC_SYS_CLK_FREQ=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_BOOTDELAY=3
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_MISC_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_BOOTZ=y
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
@@ -96,7 +96,6 @@
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_SYS_QE_FW_ADDR=0x60940000
-CONFIG_DM_SCSI=y
CONFIG_SPECIFY_CONSOLE_INDEX=y
CONFIG_DM_SERIAL=y
CONFIG_SYS_NS16550=y
diff --git a/configs/ls1021aqds_ddr4_nor_lpuart_defconfig b/configs/ls1021aqds_ddr4_nor_lpuart_defconfig
index 094a7b1..87cb398 100644
--- a/configs/ls1021aqds_ddr4_nor_lpuart_defconfig
+++ b/configs/ls1021aqds_ddr4_nor_lpuart_defconfig
@@ -27,19 +27,19 @@
CONFIG_DYNAMIC_SYS_CLK_FREQ=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_BOOTDELAY=3
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_MISC_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_BOOTZ=y
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
@@ -96,7 +96,6 @@
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_SYS_QE_FW_ADDR=0x60940000
-CONFIG_DM_SCSI=y
CONFIG_DM_SERIAL=y
CONFIG_FSL_LPUART=y
CONFIG_LPUART=y
diff --git a/configs/ls1021aqds_nand_defconfig b/configs/ls1021aqds_nand_defconfig
index 2279544..a45b4d9 100644
--- a/configs/ls1021aqds_nand_defconfig
+++ b/configs/ls1021aqds_nand_defconfig
@@ -35,6 +35,7 @@
CONFIG_DYNAMIC_SYS_CLK_FREQ=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_RAMBOOT_PBL=y
CONFIG_SYS_FSL_PBL_PBI="board/freescale/ls1021aqds/ls102xa_pbi.cfg"
CONFIG_SYS_FSL_PBL_RCW="board/freescale/ls1021aqds/ls102xa_rcw_nand.cfg"
@@ -42,6 +43,8 @@
CONFIG_BOOTDELAY=3
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_ARCH_MISC_INIT=y
@@ -65,10 +68,7 @@
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_SPL_WATCHDOG=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_BOOTZ=y
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
@@ -129,7 +129,6 @@
CONFIG_NVME_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
-CONFIG_DM_SCSI=y
CONFIG_SYS_NS16550_SERIAL=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
diff --git a/configs/ls1021aqds_nor_SECURE_BOOT_defconfig b/configs/ls1021aqds_nor_SECURE_BOOT_defconfig
index a3ed4cf..2b9679d 100644
--- a/configs/ls1021aqds_nor_SECURE_BOOT_defconfig
+++ b/configs/ls1021aqds_nor_SECURE_BOOT_defconfig
@@ -27,18 +27,18 @@
CONFIG_DYNAMIC_SYS_CLK_FREQ=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_BOOTDELAY=3
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_MISC_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_BOOTZ=y
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
@@ -95,7 +95,6 @@
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_SYS_QE_FW_ADDR=0x60940000
-CONFIG_DM_SCSI=y
CONFIG_SYS_NS16550_SERIAL=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
diff --git a/configs/ls1021aqds_nor_defconfig b/configs/ls1021aqds_nor_defconfig
index 07f47fa..ec1c6dd 100644
--- a/configs/ls1021aqds_nor_defconfig
+++ b/configs/ls1021aqds_nor_defconfig
@@ -27,19 +27,19 @@
CONFIG_DYNAMIC_SYS_CLK_FREQ=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_BOOTDELAY=3
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_MISC_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_BOOTZ=y
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
@@ -98,7 +98,6 @@
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_SYS_QE_FW_ADDR=0x60940000
-CONFIG_DM_SCSI=y
CONFIG_SPECIFY_CONSOLE_INDEX=y
CONFIG_DM_SERIAL=y
CONFIG_SYS_NS16550=y
diff --git a/configs/ls1021aqds_nor_lpuart_defconfig b/configs/ls1021aqds_nor_lpuart_defconfig
index c6b0fc4..9f3e5f2 100644
--- a/configs/ls1021aqds_nor_lpuart_defconfig
+++ b/configs/ls1021aqds_nor_lpuart_defconfig
@@ -27,19 +27,19 @@
CONFIG_DYNAMIC_SYS_CLK_FREQ=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_BOOTDELAY=3
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_MISC_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_BOOTZ=y
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
@@ -98,7 +98,6 @@
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_SYS_QE_FW_ADDR=0x60940000
-CONFIG_DM_SCSI=y
CONFIG_DM_SERIAL=y
CONFIG_FSL_LPUART=y
CONFIG_LPUART=y
diff --git a/configs/ls1021aqds_qspi_defconfig b/configs/ls1021aqds_qspi_defconfig
index 008c49b..83f0743 100644
--- a/configs/ls1021aqds_qspi_defconfig
+++ b/configs/ls1021aqds_qspi_defconfig
@@ -25,20 +25,20 @@
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_QSPI_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_MISC_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_BOOTZ=y
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_GREPENV=y
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_MEMINFO=y
@@ -83,7 +83,6 @@
CONFIG_NVME_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
-CONFIG_DM_SCSI=y
CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
diff --git a/configs/ls1021aqds_sdcard_ifc_defconfig b/configs/ls1021aqds_sdcard_ifc_defconfig
index c639eb2..9ab19f1 100644
--- a/configs/ls1021aqds_sdcard_ifc_defconfig
+++ b/configs/ls1021aqds_sdcard_ifc_defconfig
@@ -36,11 +36,14 @@
CONFIG_DYNAMIC_SYS_CLK_FREQ=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_RAMBOOT_PBL=y
CONFIG_SYS_FSL_PBL_PBI="board/freescale/ls1021aqds/ls102xa_pbi.cfg"
CONFIG_SYS_FSL_PBL_RCW="board/freescale/ls1021aqds/ls102xa_rcw_sd_ifc.cfg"
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=3
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_ARCH_MISC_INIT=y
@@ -63,10 +66,7 @@
CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_SPL_WATCHDOG=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_BOOTZ=y
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
@@ -126,7 +126,6 @@
CONFIG_NVME_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
-CONFIG_DM_SCSI=y
CONFIG_SYS_NS16550_SERIAL=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
diff --git a/configs/ls1021aqds_sdcard_qspi_defconfig b/configs/ls1021aqds_sdcard_qspi_defconfig
index 8e4b218..31496ee 100644
--- a/configs/ls1021aqds_sdcard_qspi_defconfig
+++ b/configs/ls1021aqds_sdcard_qspi_defconfig
@@ -34,12 +34,15 @@
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_RAMBOOT_PBL=y
CONFIG_SYS_FSL_PBL_PBI="board/freescale/ls1021aqds/ls102xa_pbi.cfg"
CONFIG_SYS_FSL_PBL_RCW="board/freescale/ls1021aqds/ls102xa_rcw_sd_qspi.cfg"
CONFIG_SD_BOOT=y
CONFIG_SD_BOOT_QSPI=y
CONFIG_BOOTDELAY=3
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_ARCH_MISC_INIT=y
@@ -62,10 +65,7 @@
CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_SPL_WATCHDOG=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_BOOTZ=y
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_GREPENV=y
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_MEMINFO=y
@@ -111,7 +111,6 @@
CONFIG_NVME_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
-CONFIG_DM_SCSI=y
CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
diff --git a/configs/ls1021atsn_qspi_defconfig b/configs/ls1021atsn_qspi_defconfig
index a1faabd..14bc9c8 100644
--- a/configs/ls1021atsn_qspi_defconfig
+++ b/configs/ls1021atsn_qspi_defconfig
@@ -19,18 +19,18 @@
CONFIG_PCIE1=y
CONFIG_PCIE2=y
CONFIG_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x8000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_QSPI_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
CONFIG_SILENT_CONSOLE=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_MISC_INIT_R=y
CONFIG_ID_EEPROM=y
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=276
-CONFIG_SYS_BOOTM_LEN=0x8000000
CONFIG_CMD_GREPENV=y
CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
CONFIG_CMD_MEMINFO=y
@@ -68,7 +68,6 @@
CONFIG_TSEC_ENET=y
CONFIG_NVME_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
-CONFIG_SCSI_AHCI_PLAT=y
CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
diff --git a/configs/ls1021atsn_sdcard_defconfig b/configs/ls1021atsn_sdcard_defconfig
index e78f27e..e4b72d3 100644
--- a/configs/ls1021atsn_sdcard_defconfig
+++ b/configs/ls1021atsn_sdcard_defconfig
@@ -26,6 +26,7 @@
CONFIG_PCIE1=y
CONFIG_PCIE2=y
CONFIG_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x8000000
CONFIG_RAMBOOT_PBL=y
CONFIG_SYS_FSL_PBL_PBI="board/freescale/ls1021atsn/ls102xa_pbi.cfg"
CONFIG_SYS_FSL_PBL_RCW="board/freescale/ls1021atsn/ls102xa_rcw_sd.cfg"
@@ -35,6 +36,8 @@
CONFIG_BOOTDELAY=3
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
CONFIG_SILENT_CONSOLE=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_MISC_INIT_R=y
@@ -55,9 +58,6 @@
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_SPL_WATCHDOG=y
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=276
-CONFIG_SYS_BOOTM_LEN=0x8000000
CONFIG_CMD_GREPENV=y
CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
CONFIG_CMD_MEMINFO=y
@@ -95,7 +95,6 @@
CONFIG_TSEC_ENET=y
CONFIG_NVME_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
-CONFIG_SCSI_AHCI_PLAT=y
CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
diff --git a/configs/ls1021atwr_nor_SECURE_BOOT_defconfig b/configs/ls1021atwr_nor_SECURE_BOOT_defconfig
index 9afa09b..a9c82d1 100644
--- a/configs/ls1021atwr_nor_SECURE_BOOT_defconfig
+++ b/configs/ls1021atwr_nor_SECURE_BOOT_defconfig
@@ -23,6 +23,7 @@
# CONFIG_SYS_MALLOC_F is not set
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=3
CONFIG_OF_BOARD_SETUP=y
@@ -30,14 +31,13 @@
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0"
CONFIG_BOOTCOMMAND="run distro_bootcmd; run nor_bootcmd;env exists secureboot && esbc_halt;"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_MISC_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_SYS_EEPROM_BUS_NUM=1
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=276
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
@@ -79,7 +79,6 @@
CONFIG_NVME_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_SYS_QE_FW_ADDR=0x60940000
-CONFIG_DM_SCSI=y
CONFIG_SYS_NS16550_SERIAL=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
diff --git a/configs/ls1021atwr_nor_defconfig b/configs/ls1021atwr_nor_defconfig
index d476f2b..e4b53d3 100644
--- a/configs/ls1021atwr_nor_defconfig
+++ b/configs/ls1021atwr_nor_defconfig
@@ -23,6 +23,7 @@
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=3
CONFIG_OF_BOARD_SETUP=y
@@ -30,15 +31,14 @@
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0"
CONFIG_BOOTCOMMAND="run distro_bootcmd; run nor_bootcmd;env exists secureboot && esbc_halt;"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_MISC_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_SYS_EEPROM_BUS_NUM=1
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=276
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
@@ -82,7 +82,6 @@
CONFIG_NVME_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_SYS_QE_FW_ADDR=0x60940000
-CONFIG_DM_SCSI=y
CONFIG_SPECIFY_CONSOLE_INDEX=y
CONFIG_DM_SERIAL=y
CONFIG_SYS_NS16550=y
diff --git a/configs/ls1021atwr_nor_lpuart_defconfig b/configs/ls1021atwr_nor_lpuart_defconfig
index f6a2def..6d33ffd 100644
--- a/configs/ls1021atwr_nor_lpuart_defconfig
+++ b/configs/ls1021atwr_nor_lpuart_defconfig
@@ -23,6 +23,7 @@
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=3
CONFIG_OF_BOARD_SETUP=y
@@ -30,15 +31,14 @@
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0"
CONFIG_BOOTCOMMAND="run distro_bootcmd; run nor_bootcmd;env exists secureboot && esbc_halt;"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_MISC_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_SYS_EEPROM_BUS_NUM=1
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=276
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
@@ -82,7 +82,6 @@
CONFIG_NVME_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_SYS_QE_FW_ADDR=0x60940000
-CONFIG_DM_SCSI=y
CONFIG_DM_SERIAL=y
CONFIG_FSL_LPUART=y
CONFIG_LPUART=y
diff --git a/configs/ls1021atwr_qspi_defconfig b/configs/ls1021atwr_qspi_defconfig
index c654320..444fdae 100644
--- a/configs/ls1021atwr_qspi_defconfig
+++ b/configs/ls1021atwr_qspi_defconfig
@@ -23,6 +23,7 @@
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_QSPI_BOOT=y
CONFIG_BOOTDELAY=3
@@ -31,15 +32,14 @@
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0"
CONFIG_BOOTCOMMAND="run distro_bootcmd; run qspi_bootcmd; env exists secureboot && esbc_halt"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_MISC_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_SYS_EEPROM_BUS_NUM=1
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=276
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_GREPENV=y
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_MEMINFO=y
@@ -76,7 +76,6 @@
CONFIG_TSEC_ENET=y
CONFIG_NVME_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
-CONFIG_DM_SCSI=y
CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
diff --git a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig
index 376a3e4..148d030 100644
--- a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig
+++ b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig
@@ -31,6 +31,7 @@
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_RAMBOOT_PBL=y
CONFIG_SYS_FSL_PBL_PBI="board/freescale/ls1021atwr/ls102xa_pbi.cfg"
CONFIG_SYS_FSL_PBL_RCW="board/freescale/ls1021atwr/ls102xa_rcw_sd_ifc.cfg"
@@ -42,6 +43,8 @@
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0"
CONFIG_BOOTCOMMAND="run distro_bootcmd; run sd_bootcmd; env exists secureboot && esbc_halt;"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_MISC_INIT_R=y
@@ -63,9 +66,6 @@
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_SPL_WATCHDOG=y
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=276
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
@@ -111,7 +111,6 @@
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_U_QE=y
CONFIG_SYS_QE_FW_ADDR=0x940000
-CONFIG_SCSI_AHCI_PLAT=y
CONFIG_SYS_NS16550_SERIAL=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
diff --git a/configs/ls1021atwr_sdcard_ifc_defconfig b/configs/ls1021atwr_sdcard_ifc_defconfig
index 0a84595..b5a6ca5 100644
--- a/configs/ls1021atwr_sdcard_ifc_defconfig
+++ b/configs/ls1021atwr_sdcard_ifc_defconfig
@@ -31,6 +31,7 @@
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_RAMBOOT_PBL=y
CONFIG_SYS_FSL_PBL_PBI="board/freescale/ls1021atwr/ls102xa_pbi.cfg"
CONFIG_SYS_FSL_PBL_RCW="board/freescale/ls1021atwr/ls102xa_rcw_sd_ifc.cfg"
@@ -42,6 +43,8 @@
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0"
CONFIG_BOOTCOMMAND="run distro_bootcmd; run sd_bootcmd; env exists secureboot && esbc_halt;"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_ARCH_MISC_INIT=y
@@ -64,9 +67,6 @@
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_SPL_WATCHDOG=y
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=276
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
@@ -110,7 +110,6 @@
CONFIG_TSEC_ENET=y
CONFIG_NVME_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
-CONFIG_DM_SCSI=y
CONFIG_SYS_NS16550_SERIAL=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
diff --git a/configs/ls1021atwr_sdcard_qspi_defconfig b/configs/ls1021atwr_sdcard_qspi_defconfig
index 26d302c..41f7a0d 100644
--- a/configs/ls1021atwr_sdcard_qspi_defconfig
+++ b/configs/ls1021atwr_sdcard_qspi_defconfig
@@ -31,6 +31,7 @@
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_RAMBOOT_PBL=y
CONFIG_SYS_FSL_PBL_PBI="board/freescale/ls1021atwr/ls102xa_pbi.cfg"
CONFIG_SYS_FSL_PBL_RCW="board/freescale/ls1021atwr/ls102xa_rcw_sd_qspi.cfg"
@@ -43,6 +44,8 @@
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0"
CONFIG_BOOTCOMMAND="run distro_bootcmd; run qspi_bootcmd; env exists secureboot && esbc_halt"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_ARCH_MISC_INIT=y
@@ -65,9 +68,6 @@
CONFIG_SPL_I2C=y
CONFIG_SPL_MPC8XXX_INIT_DDR=y
CONFIG_SPL_WATCHDOG=y
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=276
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_GREPENV=y
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_MEMINFO=y
@@ -104,7 +104,6 @@
CONFIG_TSEC_ENET=y
CONFIG_NVME_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
-CONFIG_DM_SCSI=y
CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
diff --git a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
index 5bf649a..d5bb8e8 100644
--- a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
@@ -30,10 +30,10 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256 video=1920x1080-32@60 cma=256M"
+CONFIG_SYS_PBSIZE=532
CONFIG_MISC_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_GREPENV=y
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_MEMTEST=y
@@ -86,7 +86,6 @@
CONFIG_DM_RTC=y
CONFIG_RTC_PCF2127=y
CONFIG_SCSI=y
-CONFIG_DM_SCSI=y
CONFIG_DM_SERIAL=y
CONFIG_SYS_NS16550=y
CONFIG_SPI=y
diff --git a/configs/ls1028aqds_tfa_defconfig b/configs/ls1028aqds_tfa_defconfig
index c36e116..bd2aa1b 100644
--- a/configs/ls1028aqds_tfa_defconfig
+++ b/configs/ls1028aqds_tfa_defconfig
@@ -32,10 +32,10 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256 video=1920x1080-32@60 cma=256M"
+CONFIG_SYS_PBSIZE=532
CONFIG_MISC_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_GREPENV=y
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_MEMTEST=y
@@ -92,7 +92,6 @@
CONFIG_DM_RTC=y
CONFIG_RTC_PCF2127=y
CONFIG_SCSI=y
-CONFIG_DM_SCSI=y
CONFIG_DM_SERIAL=y
CONFIG_SYS_NS16550=y
CONFIG_SPI=y
diff --git a/configs/ls1028aqds_tfa_lpuart_defconfig b/configs/ls1028aqds_tfa_lpuart_defconfig
index 0691c01..470ae91 100644
--- a/configs/ls1028aqds_tfa_lpuart_defconfig
+++ b/configs/ls1028aqds_tfa_lpuart_defconfig
@@ -31,10 +31,10 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256 video=1920x1080-32@60 cma=256M"
+CONFIG_SYS_PBSIZE=532
CONFIG_MISC_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_GREPENV=y
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_MEMTEST=y
@@ -90,7 +90,6 @@
CONFIG_DM_RTC=y
CONFIG_RTC_PCF2127=y
CONFIG_SCSI=y
-CONFIG_DM_SCSI=y
CONFIG_SPECIFY_CONSOLE_INDEX=y
CONFIG_DM_SERIAL=y
CONFIG_FSL_LPUART=y
diff --git a/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig
index a3d936b..dafbe04 100644
--- a/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig
@@ -30,9 +30,9 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256 video=1920x1080-32@60 cma=256M"
+CONFIG_SYS_PBSIZE=532
CONFIG_ID_EEPROM=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_GREPENV=y
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_MEMTEST=y
@@ -80,7 +80,6 @@
CONFIG_DM_RTC=y
CONFIG_RTC_PCF2127=y
CONFIG_SCSI=y
-CONFIG_DM_SCSI=y
CONFIG_DM_SERIAL=y
CONFIG_SYS_NS16550=y
CONFIG_SPI=y
diff --git a/configs/ls1028ardb_tfa_defconfig b/configs/ls1028ardb_tfa_defconfig
index de893ff..c3367ad 100644
--- a/configs/ls1028ardb_tfa_defconfig
+++ b/configs/ls1028ardb_tfa_defconfig
@@ -32,9 +32,9 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256 video=1920x1080-32@60 cma=256M"
+CONFIG_SYS_PBSIZE=532
CONFIG_ID_EEPROM=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_GREPENV=y
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_MEMTEST=y
@@ -86,7 +86,6 @@
CONFIG_DM_RTC=y
CONFIG_RTC_PCF2127=y
CONFIG_SCSI=y
-CONFIG_DM_SCSI=y
CONFIG_DM_SERIAL=y
CONFIG_SYS_NS16550=y
CONFIG_SPI=y
diff --git a/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig
index 8bb93d5..f16f1ea 100644
--- a/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig
@@ -39,9 +39,9 @@
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)"
# CONFIG_USE_BOOTCOMMAND is not set
+CONFIG_SYS_PBSIZE=532
CONFIG_MISC_INIT_R=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
@@ -97,7 +97,6 @@
CONFIG_NVME_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
-CONFIG_DM_SCSI=y
CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
diff --git a/configs/ls1043aqds_tfa_defconfig b/configs/ls1043aqds_tfa_defconfig
index 59ee11e..278cc1a 100644
--- a/configs/ls1043aqds_tfa_defconfig
+++ b/configs/ls1043aqds_tfa_defconfig
@@ -41,10 +41,10 @@
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)"
# CONFIG_USE_BOOTCOMMAND is not set
+CONFIG_SYS_PBSIZE=532
CONFIG_ARCH_MISC_INIT=y
CONFIG_MISC_INIT_R=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
@@ -106,7 +106,6 @@
CONFIG_NVME_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
-CONFIG_DM_SCSI=y
CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
diff --git a/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig
index 72685a2..65d3ecc 100644
--- a/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig
@@ -29,9 +29,9 @@
CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)"
+CONFIG_SYS_PBSIZE=532
CONFIG_MISC_INIT_R=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_IMLS=y
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_DM=y
diff --git a/configs/ls1043ardb_tfa_defconfig b/configs/ls1043ardb_tfa_defconfig
index 21518d2..5dd0a7f 100644
--- a/configs/ls1043ardb_tfa_defconfig
+++ b/configs/ls1043ardb_tfa_defconfig
@@ -31,10 +31,10 @@
CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)"
+CONFIG_SYS_PBSIZE=532
CONFIG_ARCH_MISC_INIT=y
CONFIG_MISC_INIT_R=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_IMLS=y
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_DM=y
diff --git a/configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig b/configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig
index 6f1d71b..df92e52 100644
--- a/configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig
@@ -26,9 +26,9 @@
CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.spi:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)"
+CONFIG_SYS_PBSIZE=532
CONFIG_MISC_INIT_R=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=532
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_DM=y
CONFIG_CMD_GPT=y
@@ -68,7 +68,6 @@
CONFIG_FMAN_ENET=y
CONFIG_SYS_FMAN_FW_ADDR=0x900000
CONFIG_DM_PCI_COMPAT=y
-CONFIG_DM_SCSI=y
CONFIG_SPECIFY_CONSOLE_INDEX=y
CONFIG_DM_SERIAL=y
CONFIG_SYS_NS16550=y
diff --git a/configs/ls1046afrwy_tfa_defconfig b/configs/ls1046afrwy_tfa_defconfig
index b58d989..602f0a5 100644
--- a/configs/ls1046afrwy_tfa_defconfig
+++ b/configs/ls1046afrwy_tfa_defconfig
@@ -29,10 +29,10 @@
CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.spi:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)"
+CONFIG_SYS_PBSIZE=532
CONFIG_ARCH_MISC_INIT=y
CONFIG_MISC_INIT_R=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=532
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_DM=y
CONFIG_CMD_GPT=y
@@ -77,7 +77,6 @@
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_PCIE_LAYERSCAPE_EP=y
-CONFIG_DM_SCSI=y
CONFIG_SPECIFY_CONSOLE_INDEX=y
CONFIG_DM_SERIAL=y
CONFIG_SYS_NS16550=y
diff --git a/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig
index 9f4e2bf..f518dae 100644
--- a/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig
@@ -39,9 +39,9 @@
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)"
# CONFIG_USE_BOOTCOMMAND is not set
+CONFIG_SYS_PBSIZE=532
CONFIG_MISC_INIT_R=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
@@ -98,7 +98,6 @@
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_PCIE_LAYERSCAPE_EP=y
-CONFIG_DM_SCSI=y
CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
diff --git a/configs/ls1046aqds_tfa_defconfig b/configs/ls1046aqds_tfa_defconfig
index fb87379..be7d35b 100644
--- a/configs/ls1046aqds_tfa_defconfig
+++ b/configs/ls1046aqds_tfa_defconfig
@@ -41,10 +41,10 @@
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)"
# CONFIG_USE_BOOTCOMMAND is not set
+CONFIG_SYS_PBSIZE=532
CONFIG_ARCH_MISC_INIT=y
CONFIG_MISC_INIT_R=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
@@ -108,7 +108,6 @@
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_PCIE_LAYERSCAPE_EP=y
-CONFIG_DM_SCSI=y
CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
diff --git a/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig
index 0c73b3b..e6751bb 100644
--- a/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig
@@ -30,9 +30,9 @@
CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.spi-0:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)"
+CONFIG_SYS_PBSIZE=532
CONFIG_MISC_INIT_R=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=532
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
@@ -78,7 +78,6 @@
CONFIG_PCIE_LAYERSCAPE_EP=y
CONFIG_POWER_LEGACY=y
CONFIG_POWER_I2C=y
-CONFIG_DM_SCSI=y
CONFIG_SPECIFY_CONSOLE_INDEX=y
CONFIG_DM_SERIAL=y
CONFIG_SYS_NS16550=y
diff --git a/configs/ls1046ardb_tfa_defconfig b/configs/ls1046ardb_tfa_defconfig
index dffb052..1610bad 100644
--- a/configs/ls1046ardb_tfa_defconfig
+++ b/configs/ls1046ardb_tfa_defconfig
@@ -32,10 +32,10 @@
CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.spi-0:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)"
+CONFIG_SYS_PBSIZE=532
CONFIG_ARCH_MISC_INIT=y
CONFIG_MISC_INIT_R=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=532
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
@@ -84,7 +84,6 @@
CONFIG_PCIE_LAYERSCAPE_EP=y
CONFIG_POWER_LEGACY=y
CONFIG_POWER_I2C=y
-CONFIG_DM_SCSI=y
CONFIG_SPECIFY_CONSOLE_INDEX=y
CONFIG_DM_SERIAL=y
CONFIG_SYS_NS16550=y
diff --git a/configs/ls1088aqds_tfa_defconfig b/configs/ls1088aqds_tfa_defconfig
index f074430..c528fd6 100644
--- a/configs/ls1088aqds_tfa_defconfig
+++ b/configs/ls1088aqds_tfa_defconfig
@@ -35,17 +35,16 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x3000000 default_hugepagesz=2m hugepagesz=2m hugepages=256"
+CONFIG_SYS_PBSIZE=532
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_MISC_INIT_R=y
CONFIG_RESET_PHY_R=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_GREPENV=y
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
@@ -117,7 +116,6 @@
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_DM_RTC=y
CONFIG_RTC_PCF2127=y
-CONFIG_DM_SCSI=y
CONFIG_SPECIFY_CONSOLE_INDEX=y
CONFIG_DM_SERIAL=y
CONFIG_SYS_NS16550=y
diff --git a/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig
index 1ebba60..73332a5 100644
--- a/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig
@@ -33,17 +33,16 @@
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x3000000 default_hugepagesz=2m hugepagesz=2m hugepages=256"
# CONFIG_USE_BOOTCOMMAND is not set
+CONFIG_SYS_PBSIZE=532
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_MISC_INIT_R=y
CONFIG_RESET_PHY_R=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_GREPENV=y
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
@@ -89,7 +88,6 @@
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_DM_RTC=y
CONFIG_RTC_PCF2127=y
-CONFIG_DM_SCSI=y
CONFIG_SPECIFY_CONSOLE_INDEX=y
CONFIG_DM_SERIAL=y
CONFIG_SYS_NS16550=y
diff --git a/configs/ls1088ardb_tfa_defconfig b/configs/ls1088ardb_tfa_defconfig
index c651c04..8c95308 100644
--- a/configs/ls1088ardb_tfa_defconfig
+++ b/configs/ls1088ardb_tfa_defconfig
@@ -35,17 +35,16 @@
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x3000000 default_hugepagesz=2m hugepagesz=2m hugepages=256"
# CONFIG_USE_BOOTCOMMAND is not set
+CONFIG_SYS_PBSIZE=532
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_MISC_INIT_R=y
CONFIG_RESET_PHY_R=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_GREPENV=y
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
@@ -95,7 +94,6 @@
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_DM_RTC=y
CONFIG_RTC_PCF2127=y
-CONFIG_DM_SCSI=y
CONFIG_SPECIFY_CONSOLE_INDEX=y
CONFIG_DM_SERIAL=y
CONFIG_SYS_NS16550=y
diff --git a/configs/ls2080aqds_nand_defconfig b/configs/ls2080aqds_nand_defconfig
index d796d9f..a40d799 100644
--- a/configs/ls2080aqds_nand_defconfig
+++ b/configs/ls2080aqds_nand_defconfig
@@ -35,6 +35,7 @@
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256"
CONFIG_BOOTCOMMAND="fsl_mc apply dpl 0x580d00000 && cp.b $kernel_start $kernel_load $kernel_size && bootm $kernel_load"
+CONFIG_SYS_PBSIZE=532
CONFIG_RESET_PHY_R=y
CONFIG_SPL_MAX_SIZE=0x16000
CONFIG_SPL_PAD_TO=0x20000
@@ -49,7 +50,6 @@
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_SPL_TARGET="u-boot-with-spl.bin"
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
@@ -112,7 +112,6 @@
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_RTC_ENABLE_32KHZ_OUTPUT=y
CONFIG_RTC_DS3231=y
-CONFIG_DM_SCSI=y
CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
diff --git a/configs/ls2080aqds_qspi_defconfig b/configs/ls2080aqds_qspi_defconfig
index e0a5508..5e0cece 100644
--- a/configs/ls2080aqds_qspi_defconfig
+++ b/configs/ls2080aqds_qspi_defconfig
@@ -29,9 +29,9 @@
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256"
CONFIG_BOOTCOMMAND="fsl_mc apply dpl 0x580d00000 && cp.b $kernel_start $kernel_load $kernel_size && bootm $kernel_load"
+CONFIG_SYS_PBSIZE=532
CONFIG_RESET_PHY_R=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
@@ -92,7 +92,6 @@
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_RTC_ENABLE_32KHZ_OUTPUT=y
CONFIG_RTC_DS3231=y
-CONFIG_DM_SCSI=y
CONFIG_SYS_NS16550_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
diff --git a/configs/ls2080ardb_nand_defconfig b/configs/ls2080ardb_nand_defconfig
index efe5080..fa2b6d0 100644
--- a/configs/ls2080ardb_nand_defconfig
+++ b/configs/ls2080ardb_nand_defconfig
@@ -40,6 +40,7 @@
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS1,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0600 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256"
CONFIG_BOOTCOMMAND="env exists mcinitcmd && env exists secureboot && esbc_validate 0x5806C0000; env exists mcinitcmd && fsl_mc lazyapply dpl 0x580d00000;run distro_bootcmd;run nor_bootcmd; env exists secureboot && esbc_halt;"
+CONFIG_SYS_PBSIZE=532
CONFIG_MISC_INIT_R=y
CONFIG_RESET_PHY_R=y
CONFIG_SPL_MAX_SIZE=0x16000
@@ -55,7 +56,6 @@
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_SPL_TARGET="u-boot-with-spl.bin"
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
@@ -115,7 +115,6 @@
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_RTC_DS3231=y
-CONFIG_DM_SCSI=y
CONFIG_CONS_INDEX=2
CONFIG_SYS_NS16550_SERIAL=y
CONFIG_USB=y
diff --git a/configs/ls2088aqds_tfa_defconfig b/configs/ls2088aqds_tfa_defconfig
index 2ac4384..0bc19ba 100644
--- a/configs/ls2088aqds_tfa_defconfig
+++ b/configs/ls2088aqds_tfa_defconfig
@@ -29,9 +29,9 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256"
+CONFIG_SYS_PBSIZE=532
CONFIG_RESET_PHY_R=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
@@ -111,7 +111,6 @@
CONFIG_DM_RTC=y
CONFIG_RTC_ENABLE_32KHZ_OUTPUT=y
CONFIG_RTC_DS3231=y
-CONFIG_DM_SCSI=y
CONFIG_SPECIFY_CONSOLE_INDEX=y
CONFIG_DM_SERIAL=y
CONFIG_SYS_NS16550=y
diff --git a/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig b/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig
index 61e97b9..0bf78db 100644
--- a/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig
@@ -33,10 +33,10 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS1,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0600 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256"
+CONFIG_SYS_PBSIZE=532
CONFIG_MISC_INIT_R=y
CONFIG_RESET_PHY_R=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
@@ -99,7 +99,6 @@
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_DM_RTC=y
CONFIG_RTC_DS3231=y
-CONFIG_DM_SCSI=y
CONFIG_SPECIFY_CONSOLE_INDEX=y
CONFIG_CONS_INDEX=2
CONFIG_DM_SERIAL=y
diff --git a/configs/ls2088ardb_tfa_defconfig b/configs/ls2088ardb_tfa_defconfig
index 4d69db1..6c87aeb 100644
--- a/configs/ls2088ardb_tfa_defconfig
+++ b/configs/ls2088ardb_tfa_defconfig
@@ -35,10 +35,10 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS1,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0600 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256"
+CONFIG_SYS_PBSIZE=532
CONFIG_MISC_INIT_R=y
CONFIG_RESET_PHY_R=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
@@ -107,7 +107,6 @@
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_DM_RTC=y
CONFIG_RTC_DS3231=y
-CONFIG_DM_SCSI=y
CONFIG_SPECIFY_CONSOLE_INDEX=y
CONFIG_CONS_INDEX=2
CONFIG_DM_SERIAL=y
diff --git a/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig b/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig
index 875b56b..105f0db 100644
--- a/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig
+++ b/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig
@@ -33,11 +33,11 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0 earlycon=pl011,mmio32,0x21c0000 ramdisk_size=0x2000000 default_hugepagesz=1024m hugepagesz=1024m hugepages=2 pci=pcie_bus_perf"
+CONFIG_SYS_PBSIZE=532
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_MISC_INIT_R=y
CONFIG_RESET_PHY_R=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
@@ -96,7 +96,6 @@
CONFIG_PCIE_LAYERSCAPE_GEN4=y
CONFIG_DM_RTC=y
CONFIG_RTC_PCF2127=y
-CONFIG_DM_SCSI=y
CONFIG_DM_SERIAL=y
CONFIG_PL01X_SERIAL=y
CONFIG_SPI=y
diff --git a/configs/lx2160aqds_tfa_defconfig b/configs/lx2160aqds_tfa_defconfig
index 56b9260..3f45987 100644
--- a/configs/lx2160aqds_tfa_defconfig
+++ b/configs/lx2160aqds_tfa_defconfig
@@ -36,11 +36,11 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0 earlycon=pl011,mmio32,0x21c0000 ramdisk_size=0x2000000 default_hugepagesz=1024m hugepagesz=1024m hugepages=2 pci=pcie_bus_perf"
+CONFIG_SYS_PBSIZE=532
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_MISC_INIT_R=y
CONFIG_RESET_PHY_R=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
@@ -103,7 +103,6 @@
CONFIG_PCIE_LAYERSCAPE_GEN4=y
CONFIG_DM_RTC=y
CONFIG_RTC_PCF2127=y
-CONFIG_DM_SCSI=y
CONFIG_DM_SERIAL=y
CONFIG_PL01X_SERIAL=y
CONFIG_SPI=y
diff --git a/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig b/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig
index 8cb89ff..679d5e4 100644
--- a/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig
+++ b/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig
@@ -34,10 +34,10 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0 earlycon=pl011,mmio32,0x21c0000 ramdisk_size=0x2000000 default_hugepagesz=1024m hugepagesz=1024m hugepages=2 pci=pcie_bus_perf"
+CONFIG_SYS_PBSIZE=532
CONFIG_MISC_INIT_R=y
CONFIG_RESET_PHY_R=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
@@ -87,7 +87,6 @@
CONFIG_PCIE_LAYERSCAPE_GEN4=y
CONFIG_DM_RTC=y
CONFIG_RTC_PCF2127=y
-CONFIG_DM_SCSI=y
CONFIG_DM_SERIAL=y
CONFIG_PL01X_SERIAL=y
CONFIG_SPI=y
diff --git a/configs/lx2160ardb_tfa_defconfig b/configs/lx2160ardb_tfa_defconfig
index 83e3259..355b5b2 100644
--- a/configs/lx2160ardb_tfa_defconfig
+++ b/configs/lx2160ardb_tfa_defconfig
@@ -37,10 +37,10 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0 earlycon=pl011,mmio32,0x21c0000 ramdisk_size=0x2000000 default_hugepagesz=1024m hugepagesz=1024m hugepages=2 pci=pcie_bus_perf"
+CONFIG_SYS_PBSIZE=532
CONFIG_MISC_INIT_R=y
CONFIG_RESET_PHY_R=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
@@ -96,7 +96,6 @@
CONFIG_PCIE_LAYERSCAPE_GEN4=y
CONFIG_DM_RTC=y
CONFIG_RTC_PCF2127=y
-CONFIG_DM_SCSI=y
CONFIG_DM_SERIAL=y
CONFIG_PL01X_SERIAL=y
CONFIG_SPI=y
diff --git a/configs/lx2160ardb_tfa_stmm_defconfig b/configs/lx2160ardb_tfa_stmm_defconfig
index fc584d6..1eb7486 100644
--- a/configs/lx2160ardb_tfa_stmm_defconfig
+++ b/configs/lx2160ardb_tfa_stmm_defconfig
@@ -37,10 +37,10 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0 earlycon=pl011,mmio32,0x21c0000 ramdisk_size=0x2000000 default_hugepagesz=1024m hugepagesz=1024m hugepages=2 pci=pcie_bus_perf"
+CONFIG_SYS_PBSIZE=532
CONFIG_MISC_INIT_R=y
CONFIG_RESET_PHY_R=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_GREPENV=y
CONFIG_CMD_NVEDIT_EFI=y
CONFIG_CMD_EEPROM=y
@@ -96,7 +96,6 @@
CONFIG_PCIE_LAYERSCAPE_GEN4=y
CONFIG_DM_RTC=y
CONFIG_RTC_PCF2127=y
-CONFIG_DM_SCSI=y
CONFIG_DM_SERIAL=y
CONFIG_PL01X_SERIAL=y
CONFIG_SPI=y
diff --git a/configs/lx2162aqds_tfa_SECURE_BOOT_defconfig b/configs/lx2162aqds_tfa_SECURE_BOOT_defconfig
index 942cdb7..0473b16 100644
--- a/configs/lx2162aqds_tfa_SECURE_BOOT_defconfig
+++ b/configs/lx2162aqds_tfa_SECURE_BOOT_defconfig
@@ -33,12 +33,12 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0 earlycon=pl011,mmio32,0x21c0000 ramdisk_size=0x2000000 default_hugepagesz=1024m hugepagesz=1024m hugepages=2 pci=pcie_bus_perf"
+CONFIG_SYS_PBSIZE=532
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_MISC_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_RESET_PHY_R=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
@@ -96,7 +96,6 @@
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_DM_RTC=y
CONFIG_RTC_PCF2127=y
-CONFIG_DM_SCSI=y
CONFIG_DM_SERIAL=y
CONFIG_PL01X_SERIAL=y
CONFIG_SPI=y
diff --git a/configs/lx2162aqds_tfa_defconfig b/configs/lx2162aqds_tfa_defconfig
index e91fccf..2159c0c 100644
--- a/configs/lx2162aqds_tfa_defconfig
+++ b/configs/lx2162aqds_tfa_defconfig
@@ -36,12 +36,12 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0 earlycon=pl011,mmio32,0x21c0000 ramdisk_size=0x2000000 default_hugepagesz=1024m hugepagesz=1024m hugepages=2 pci=pcie_bus_perf"
+CONFIG_SYS_PBSIZE=532
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_MISC_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_RESET_PHY_R=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
@@ -104,7 +104,6 @@
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_DM_RTC=y
CONFIG_RTC_PCF2127=y
-CONFIG_DM_SCSI=y
CONFIG_DM_SERIAL=y
CONFIG_PL01X_SERIAL=y
CONFIG_SPI=y
diff --git a/configs/lx2162aqds_tfa_verified_boot_defconfig b/configs/lx2162aqds_tfa_verified_boot_defconfig
index 4bd7ef3..0ad92dd 100644
--- a/configs/lx2162aqds_tfa_verified_boot_defconfig
+++ b/configs/lx2162aqds_tfa_verified_boot_defconfig
@@ -37,12 +37,12 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0 earlycon=pl011,mmio32,0x21c0000 ramdisk_size=0x2000000 default_hugepagesz=1024m hugepagesz=1024m hugepages=2 pci=pcie_bus_perf"
+CONFIG_SYS_PBSIZE=532
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_MISC_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_RESET_PHY_R=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
@@ -105,7 +105,6 @@
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_DM_RTC=y
CONFIG_RTC_PCF2127=y
-CONFIG_DM_SCSI=y
CONFIG_DM_SERIAL=y
CONFIG_PL01X_SERIAL=y
CONFIG_SPI=y
diff --git a/configs/m53menlo_defconfig b/configs/m53menlo_defconfig
index e1ddc0a..156a318 100644
--- a/configs/m53menlo_defconfig
+++ b/configs/m53menlo_defconfig
@@ -31,6 +31,7 @@
CONFIG_BOOTCOMMAND="run mmc_mmc"
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="run try_bootscript"
+CONFIG_SYS_CBSIZE=1024
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_PAD_TO=0x8000
CONFIG_SPL_NO_BSS_LIMIT=y
@@ -40,7 +41,6 @@
CONFIG_SPL_TARGET="u-boot-with-nand-spl.imx"
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_CBSIZE=1024
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_DM=y
diff --git a/configs/malta64_defconfig b/configs/malta64_defconfig
index 62e759c..ff371da 100644
--- a/configs/malta64_defconfig
+++ b/configs/malta64_defconfig
@@ -10,15 +10,15 @@
CONFIG_TARGET_MALTA=y
CONFIG_CPU_MIPS64_R2=y
CONFIG_SYS_MIPS_TIMER_FREQ=250000000
+CONFIG_SYS_BOOTM_LEN=0x4000000
# CONFIG_AUTOBOOT is not set
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=281
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_MISC_INIT_R=y
CONFIG_SYS_MALLOC_BOOTPARAMS=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="malta # "
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=281
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_IMLS=y
CONFIG_CMD_IDE=y
# CONFIG_CMD_LOADB is not set
@@ -34,6 +34,7 @@
CONFIG_SYS_ATA_DATA_OFFSET=0
CONFIG_SYS_ATA_REG_OFFSET=0
CONFIG_SYS_ATA_IDE0_OFFSET=0x01f0
+CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_FLASH_SHOW_PROGRESS=0
diff --git a/configs/malta64el_defconfig b/configs/malta64el_defconfig
index 12153a6..5b130bc 100644
--- a/configs/malta64el_defconfig
+++ b/configs/malta64el_defconfig
@@ -12,15 +12,15 @@
CONFIG_CPU_MIPS64_R2=y
CONFIG_SYS_MIPS_TIMER_FREQ=250000000
CONFIG_SYS_LITTLE_ENDIAN=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
# CONFIG_AUTOBOOT is not set
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=283
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_MISC_INIT_R=y
CONFIG_SYS_MALLOC_BOOTPARAMS=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="maltael # "
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=283
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_IMLS=y
CONFIG_CMD_IDE=y
# CONFIG_CMD_LOADB is not set
@@ -36,6 +36,7 @@
CONFIG_SYS_ATA_DATA_OFFSET=0
CONFIG_SYS_ATA_REG_OFFSET=0
CONFIG_SYS_ATA_IDE0_OFFSET=0x01f0
+CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_FLASH_SHOW_PROGRESS=0
diff --git a/configs/malta_defconfig b/configs/malta_defconfig
index 5686003..ce917a6 100644
--- a/configs/malta_defconfig
+++ b/configs/malta_defconfig
@@ -9,15 +9,15 @@
CONFIG_ENV_ADDR=0xBE3E0000
CONFIG_TARGET_MALTA=y
CONFIG_SYS_MIPS_TIMER_FREQ=250000000
+CONFIG_SYS_BOOTM_LEN=0x4000000
# CONFIG_AUTOBOOT is not set
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=281
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_MISC_INIT_R=y
CONFIG_SYS_MALLOC_BOOTPARAMS=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="malta # "
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=281
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_IMLS=y
CONFIG_CMD_IDE=y
# CONFIG_CMD_LOADB is not set
@@ -33,6 +33,7 @@
CONFIG_SYS_ATA_DATA_OFFSET=0
CONFIG_SYS_ATA_REG_OFFSET=0
CONFIG_SYS_ATA_IDE0_OFFSET=0x01f0
+CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_FLASH_SHOW_PROGRESS=0
diff --git a/configs/maltael_defconfig b/configs/maltael_defconfig
index ac2dcc2..de29a7a 100644
--- a/configs/maltael_defconfig
+++ b/configs/maltael_defconfig
@@ -11,15 +11,15 @@
CONFIG_BUILD_TARGET="u-boot-swap.bin"
CONFIG_SYS_MIPS_TIMER_FREQ=250000000
CONFIG_SYS_LITTLE_ENDIAN=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
# CONFIG_AUTOBOOT is not set
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=283
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_MISC_INIT_R=y
CONFIG_SYS_MALLOC_BOOTPARAMS=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="maltael # "
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=283
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_IMLS=y
CONFIG_CMD_IDE=y
# CONFIG_CMD_LOADB is not set
@@ -35,6 +35,7 @@
CONFIG_SYS_ATA_DATA_OFFSET=0
CONFIG_SYS_ATA_REG_OFFSET=0
CONFIG_SYS_ATA_IDE0_OFFSET=0x01f0
+CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_FLASH_SHOW_PROGRESS=0
diff --git a/configs/marsboard_defconfig b/configs/marsboard_defconfig
index e3fd682..8325aaa 100644
--- a/configs/marsboard_defconfig
+++ b/configs/marsboard_defconfig
@@ -17,12 +17,12 @@
CONFIG_DEFAULT_DEVICE_TREE="imx6q-marsboard"
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTCOMMAND="run finduuid; run distro_bootcmd"
+CONFIG_SYS_PBSIZE=532
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
@@ -41,6 +41,7 @@
CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_SYS_I2C_MXC=y
CONFIG_FSL_USDHC=y
+CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
CONFIG_PHYLIB=y
diff --git a/configs/mccmon6_nor_defconfig b/configs/mccmon6_nor_defconfig
index 5e8fbd0..8edc461 100644
--- a/configs/mccmon6_nor_defconfig
+++ b/configs/mccmon6_nor_defconfig
@@ -22,6 +22,7 @@
CONFIG_SPL_LOAD_FIT=y
CONFIG_DISTRO_DEFAULTS=y
# CONFIG_USE_BOOTCOMMAND is not set
+CONFIG_SYS_PBSIZE=532
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_SYS_MALLOC=y
@@ -32,7 +33,6 @@
CONFIG_SPL_PAYLOAD_ARGS_ADDR=0x18000000
CONFIG_SYS_OS_BASE=0x8180000
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_SPL=y
CONFIG_CMD_SPL_NOR_OFS=0x09600000
CONFIG_CMD_SPL_WRITE_SIZE=0x20000
@@ -58,7 +58,6 @@
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
CONFIG_SYS_I2C_MXC=y
CONFIG_FSL_USDHC=y
-CONFIG_MTD=y
CONFIG_DM_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
diff --git a/configs/mccmon6_sd_defconfig b/configs/mccmon6_sd_defconfig
index 83f2b1a..6088d08 100644
--- a/configs/mccmon6_sd_defconfig
+++ b/configs/mccmon6_sd_defconfig
@@ -24,13 +24,13 @@
CONFIG_SPL_LOAD_FIT=y
CONFIG_DISTRO_DEFAULTS=y
# CONFIG_USE_BOOTCOMMAND is not set
+CONFIG_SYS_PBSIZE=532
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_NOR_SUPPORT=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_SPL=y
CONFIG_CMD_SPL_NOR_OFS=0x09600000
CONFIG_CMD_SPL_WRITE_SIZE=0x20000
@@ -56,7 +56,6 @@
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
CONFIG_SYS_I2C_MXC=y
CONFIG_FSL_USDHC=y
-CONFIG_MTD=y
CONFIG_DM_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
diff --git a/configs/medcom-wide_defconfig b/configs/medcom-wide_defconfig
index df568ff..9ed75ba 100644
--- a/configs/medcom-wide_defconfig
+++ b/configs/medcom-wide_defconfig
@@ -14,6 +14,7 @@
CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_FIT=y
CONFIG_OF_SYSTEM_SETUP=y
+CONFIG_SYS_PBSIZE=2089
CONFIG_SYS_STDIO_DEREGISTER=y
CONFIG_SPL_FOOTPRINT_LIMIT=y
CONFIG_SPL_MAX_FOOTPRINT=0x8000
@@ -24,7 +25,6 @@
CONFIG_SPL_SYS_MALLOC_SIZE=0x10000
CONFIG_SYS_PROMPT="Tegra20 (Medcom-Wide) # "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=2089
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
@@ -39,8 +39,6 @@
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_SPL_DM=y
-CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
CONFIG_TEGRA_NAND=y
CONFIG_SYS_NAND_ONFI_DETECTION=y
diff --git a/configs/meerkat96_defconfig b/configs/meerkat96_defconfig
index 4fdcdaf..72beb07 100644
--- a/configs/meerkat96_defconfig
+++ b/configs/meerkat96_defconfig
@@ -14,9 +14,9 @@
CONFIG_IMX_BOOTAUX=y
CONFIG_SYS_MEMTEST_START=0x80000000
CONFIG_SYS_MEMTEST_END=0xa0000000
+CONFIG_SYS_PBSIZE=532
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=532
# CONFIG_CMD_BOOTD is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
diff --git a/configs/meesc_dataflash_defconfig b/configs/meesc_dataflash_defconfig
index 3ddb49e..5d79565 100644
--- a/configs/meesc_dataflash_defconfig
+++ b/configs/meesc_dataflash_defconfig
@@ -15,11 +15,11 @@
CONFIG_FIT=y
CONFIG_BOOTDELAY=3
CONFIG_USE_PREBOOT=y
+CONFIG_SYS_CBSIZE=512
+CONFIG_SYS_PBSIZE=532
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_MISC_INIT_R=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_CBSIZE=512
-CONFIG_SYS_PBSIZE=532
# CONFIG_CMD_BDI is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_LOADS is not set
diff --git a/configs/meesc_defconfig b/configs/meesc_defconfig
index 9908a13..bab87e6 100644
--- a/configs/meesc_defconfig
+++ b/configs/meesc_defconfig
@@ -14,11 +14,11 @@
CONFIG_NAND_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_USE_PREBOOT=y
+CONFIG_SYS_CBSIZE=512
+CONFIG_SYS_PBSIZE=532
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_MISC_INIT_R=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_CBSIZE=512
-CONFIG_SYS_PBSIZE=532
# CONFIG_CMD_BDI is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_LOADS is not set
diff --git a/configs/microblaze-generic_defconfig b/configs/microblaze-generic_defconfig
index 785c71e..34e914e 100644
--- a/configs/microblaze-generic_defconfig
+++ b/configs/microblaze-generic_defconfig
@@ -18,12 +18,15 @@
CONFIG_REMAKE_ELF=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=-1
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="root=romfs"
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="echo U-BOOT for ${hostname};setenv preboot;echo"
+CONFIG_SYS_CBSIZE=512
+CONFIG_SYS_PBSIZE=544
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_DISPLAY_BOARDINFO=y
CONFIG_DISPLAY_BOARDINFO_LATE=y
@@ -35,9 +38,6 @@
CONFIG_SPL_NOR_SUPPORT=y
CONFIG_SYS_PROMPT="U-Boot-mONStR> "
CONFIG_SYS_MAXARGS=15
-CONFIG_SYS_CBSIZE=512
-CONFIG_SYS_PBSIZE=544
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_IMLS=y
CONFIG_CMD_SPL=y
CONFIG_CMD_ASKENV=y
@@ -61,7 +61,6 @@
CONFIG_DM_I2C=y
CONFIG_LED=y
CONFIG_LED_GPIO=y
-CONFIG_MTD=y
CONFIG_DM_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_SHOW_PROGRESS=0
diff --git a/configs/microchip_mpfs_icicle_defconfig b/configs/microchip_mpfs_icicle_defconfig
index fef7b13..05adfcd 100644
--- a/configs/microchip_mpfs_icicle_defconfig
+++ b/configs/microchip_mpfs_icicle_defconfig
@@ -11,13 +11,13 @@
CONFIG_ARCH_RV64I=y
CONFIG_RISCV_SMODE=y
CONFIG_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=282
CONFIG_DISPLAY_CPUINFO=y
CONFIG_DISPLAY_BOARDINFO=y
CONFIG_SYS_PROMPT="RISC-V # "
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=282
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_BOOTP_SEND_HOSTNAME=y
CONFIG_DM_MTD=y
diff --git a/configs/minnowmax_defconfig b/configs/minnowmax_defconfig
index 9c03dc8..48577c5 100644
--- a/configs/minnowmax_defconfig
+++ b/configs/minnowmax_defconfig
@@ -28,11 +28,11 @@
CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="ext2load scsi 0:3 01000000 /boot/vmlinuz; zboot 01000000"
+CONFIG_SYS_PBSIZE=532
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_MISC_INIT_R=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_CPU=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
diff --git a/configs/miqi-rk3288_defconfig b/configs/miqi-rk3288_defconfig
index 1f58902..374d21e 100644
--- a/configs/miqi-rk3288_defconfig
+++ b/configs/miqi-rk3288_defconfig
@@ -22,6 +22,7 @@
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEBUG_UART=y
# CONFIG_ANDROID_BOOT_IMAGE is not set
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_USE_PREBOOT=y
CONFIG_DEFAULT_FDT_FILE="rk3288-miqi.dtb"
CONFIG_SILENT_CONSOLE=y
@@ -31,7 +32,6 @@
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_STACK_R=y
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
@@ -63,7 +63,6 @@
CONFIG_SYS_I2C_ROCKCHIP=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
-CONFIG_MTD=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_GMAC_ROCKCHIP=y
CONFIG_PINCTRL=y
diff --git a/configs/mk808_defconfig b/configs/mk808_defconfig
index 70b1032..cc3906f 100644
--- a/configs/mk808_defconfig
+++ b/configs/mk808_defconfig
@@ -34,6 +34,8 @@
CONFIG_SD_BOOT=y
CONFIG_USE_PREBOOT=y
CONFIG_DEFAULT_FDT_FILE="rk3066a-mk808.dtb"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_BOARD_LATE_INIT=y
@@ -47,8 +49,6 @@
CONFIG_SPL_FS_EXT4=y
CONFIG_SYS_MMCSD_FS_BOOT_PARTITION=2
CONFIG_TPL_NEEDS_SEPARATE_STACK=y
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=276
# CONFIG_BOOTM_PLAN9 is not set
# CONFIG_BOOTM_RTEMS is not set
# CONFIG_BOOTM_VXWORKS is not set
diff --git a/configs/msc_sm2s_imx8mp_defconfig b/configs/msc_sm2s_imx8mp_defconfig
index 75b4966..bf1052d 100644
--- a/configs/msc_sm2s_imx8mp_defconfig
+++ b/configs/msc_sm2s_imx8mp_defconfig
@@ -23,9 +23,12 @@
CONFIG_FIT=y
CONFIG_FIT_EXTERNAL_OFFSET=0x3000
CONFIG_SPL_LOAD_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_DEFAULT_FDT_FILE="imx8mp-msc-sm2s.dtb"
+CONFIG_SYS_CBSIZE=2048
+CONFIG_SYS_PBSIZE=2074
CONFIG_SPL_MAX_SIZE=0x26000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x0098FC00
@@ -45,9 +48,6 @@
CONFIG_SPL_WATCHDOG=y
CONFIG_SYS_PROMPT="u-boot=> "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_CBSIZE=2048
-CONFIG_SYS_PBSIZE=2074
-CONFIG_SYS_BOOTM_LEN=0x2000000
# CONFIG_CMD_EXPORTENV is not set
# CONFIG_CMD_IMPORTENV is not set
# CONFIG_CMD_CRC32 is not set
diff --git a/configs/mscc_jr2_defconfig b/configs/mscc_jr2_defconfig
index ad0c42e..16e7617 100644
--- a/configs/mscc_jr2_defconfig
+++ b/configs/mscc_jr2_defconfig
@@ -19,19 +19,19 @@
CONFIG_SYS_MEMTEST_END=0x9fc00000
CONFIG_SYS_LITTLE_ENDIAN=y
CONFIG_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x1000000
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=279
CONFIG_LOGLEVEL=7
CONFIG_BOARD_TYPES=y
CONFIG_DISPLAY_CPUINFO=y
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_SYS_PROMPT="jr2 # "
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=279
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
-CONFIG_SYS_BOOTM_LEN=0x1000000
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_EXPORTENV is not set
# CONFIG_CMD_IMPORTENV is not set
diff --git a/configs/mscc_luton_defconfig b/configs/mscc_luton_defconfig
index 9468d03..178721d 100644
--- a/configs/mscc_luton_defconfig
+++ b/configs/mscc_luton_defconfig
@@ -21,19 +21,19 @@
CONFIG_SYS_MEMTEST_END=0x87c00000
CONFIG_SYS_LITTLE_ENDIAN=y
CONFIG_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x1000000
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=281
CONFIG_LOGLEVEL=7
CONFIG_BOARD_TYPES=y
CONFIG_DISPLAY_CPUINFO=y
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_SYS_PROMPT="luton # "
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=281
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
-CONFIG_SYS_BOOTM_LEN=0x1000000
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_EXPORTENV is not set
# CONFIG_CMD_IMPORTENV is not set
diff --git a/configs/mscc_ocelot_defconfig b/configs/mscc_ocelot_defconfig
index aa05b79..b7143d3 100644
--- a/configs/mscc_ocelot_defconfig
+++ b/configs/mscc_ocelot_defconfig
@@ -18,19 +18,19 @@
CONFIG_SYS_MEMTEST_END=0x9fc00000
CONFIG_SYS_LITTLE_ENDIAN=y
CONFIG_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x1000000
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=282
CONFIG_LOGLEVEL=7
CONFIG_BOARD_TYPES=y
CONFIG_DISPLAY_CPUINFO=y
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_SYS_PROMPT="ocelot # "
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=282
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
-CONFIG_SYS_BOOTM_LEN=0x1000000
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_EXPORTENV is not set
# CONFIG_CMD_IMPORTENV is not set
diff --git a/configs/mscc_serval_defconfig b/configs/mscc_serval_defconfig
index eccb315..e1a044c 100644
--- a/configs/mscc_serval_defconfig
+++ b/configs/mscc_serval_defconfig
@@ -16,19 +16,19 @@
CONFIG_SYS_MEMTEST_END=0x87c00000
CONFIG_SYS_LITTLE_ENDIAN=y
CONFIG_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x1000000
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=282
CONFIG_LOGLEVEL=7
CONFIG_BOARD_TYPES=y
CONFIG_DISPLAY_CPUINFO=y
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_SYS_PROMPT="serval # "
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=282
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
-CONFIG_SYS_BOOTM_LEN=0x1000000
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_EXPORTENV is not set
# CONFIG_CMD_IMPORTENV is not set
diff --git a/configs/mscc_servalt_defconfig b/configs/mscc_servalt_defconfig
index 116be14..e7da070 100644
--- a/configs/mscc_servalt_defconfig
+++ b/configs/mscc_servalt_defconfig
@@ -15,19 +15,19 @@
CONFIG_SYS_MEMTEST_END=0x9fc00000
CONFIG_SYS_LITTLE_ENDIAN=y
CONFIG_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x1000000
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=283
CONFIG_LOGLEVEL=7
CONFIG_BOARD_TYPES=y
CONFIG_DISPLAY_CPUINFO=y
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_SYS_PROMPT="servalt # "
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=283
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
-CONFIG_SYS_BOOTM_LEN=0x1000000
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_EXPORTENV is not set
# CONFIG_CMD_IMPORTENV is not set
diff --git a/configs/mt7620_mt7530_rfb_defconfig b/configs/mt7620_mt7530_rfb_defconfig
index af9df54..6dc7c22 100644
--- a/configs/mt7620_mt7530_rfb_defconfig
+++ b/configs/mt7620_mt7530_rfb_defconfig
@@ -23,6 +23,7 @@
CONFIG_MIPS_BOOT_FDT=y
CONFIG_DEBUG_UART=y
CONFIG_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x1000000
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
CONFIG_SYS_MALLOC_BOOTPARAMS=y
CONFIG_SPL_MAX_SIZE=0x10000
@@ -30,7 +31,6 @@
CONFIG_SPL_BSS_MAX_SIZE=0x10000
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_NOR_SUPPORT=y
-CONFIG_SYS_BOOTM_LEN=0x1000000
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_CRC32 is not set
diff --git a/configs/mt7620_rfb_defconfig b/configs/mt7620_rfb_defconfig
index 954870b..b17b2cd 100644
--- a/configs/mt7620_rfb_defconfig
+++ b/configs/mt7620_rfb_defconfig
@@ -22,6 +22,7 @@
CONFIG_MIPS_BOOT_FDT=y
CONFIG_DEBUG_UART=y
CONFIG_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x1000000
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
CONFIG_SYS_MALLOC_BOOTPARAMS=y
CONFIG_SPL_MAX_SIZE=0x10000
@@ -29,7 +30,6 @@
CONFIG_SPL_BSS_MAX_SIZE=0x10000
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_NOR_SUPPORT=y
-CONFIG_SYS_BOOTM_LEN=0x1000000
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_CRC32 is not set
diff --git a/configs/mt7621_nand_rfb_defconfig b/configs/mt7621_nand_rfb_defconfig
index 368bf80..1acd9e5 100644
--- a/configs/mt7621_nand_rfb_defconfig
+++ b/configs/mt7621_nand_rfb_defconfig
@@ -23,6 +23,7 @@
CONFIG_MIPS_BOOT_FDT=y
CONFIG_DEBUG_UART=y
CONFIG_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x2000000
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_SPL_MAX_SIZE=0x30000
@@ -36,7 +37,6 @@
# CONFIG_BOOTM_PLAN9 is not set
# CONFIG_BOOTM_RTEMS is not set
# CONFIG_BOOTM_VXWORKS is not set
-CONFIG_SYS_BOOTM_LEN=0x2000000
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_CRC32 is not set
@@ -64,7 +64,6 @@
# CONFIG_MMC_QUIRKS is not set
# CONFIG_MMC_HW_PARTITIONING is not set
CONFIG_MMC_MTK=y
-CONFIG_MTD=y
CONFIG_DM_MTD=y
CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_MT7621=y
diff --git a/configs/mt7621_rfb_defconfig b/configs/mt7621_rfb_defconfig
index 49c9e74..43d00d3 100644
--- a/configs/mt7621_rfb_defconfig
+++ b/configs/mt7621_rfb_defconfig
@@ -23,6 +23,7 @@
CONFIG_MIPS_BOOT_FDT=y
CONFIG_DEBUG_UART=y
CONFIG_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x2000000
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_SPL_MAX_SIZE=0x30000
@@ -36,7 +37,6 @@
# CONFIG_BOOTM_PLAN9 is not set
# CONFIG_BOOTM_RTEMS is not set
# CONFIG_BOOTM_VXWORKS is not set
-CONFIG_SYS_BOOTM_LEN=0x2000000
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_CRC32 is not set
diff --git a/configs/mt7622_rfb_defconfig b/configs/mt7622_rfb_defconfig
index 0dca752..0bda8cd 100644
--- a/configs/mt7622_rfb_defconfig
+++ b/configs/mt7622_rfb_defconfig
@@ -13,11 +13,11 @@
CONFIG_DEBUG_UART=y
CONFIG_FIT=y
CONFIG_DEFAULT_FDT_FILE="mt7622-rfb"
+CONFIG_SYS_PBSIZE=1049
CONFIG_LOGLEVEL=7
CONFIG_LOG=y
CONFIG_SYS_PROMPT="MT7622> "
CONFIG_SYS_MAXARGS=8
-CONFIG_SYS_PBSIZE=1049
CONFIG_CMD_BOOTMENU=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PCI=y
@@ -36,6 +36,7 @@
CONFIG_CLK=y
CONFIG_MMC_HS200_SUPPORT=y
CONFIG_MMC_MTK=y
+CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_EON=y
CONFIG_SPI_FLASH_GIGADEVICE=y
diff --git a/configs/mt7623a_unielec_u7623_02_defconfig b/configs/mt7623a_unielec_u7623_02_defconfig
index bc50b2d..7f5eab4 100644
--- a/configs/mt7623a_unielec_u7623_02_defconfig
+++ b/configs/mt7623a_unielec_u7623_02_defconfig
@@ -14,15 +14,15 @@
CONFIG_SYS_LOAD_ADDR=0x84000000
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=3
CONFIG_DEFAULT_FDT_FILE="mt7623a-unielec-u7623-02-emmc.dtb"
+CONFIG_SYS_PBSIZE=1049
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_PROMPT="U-Boot> "
CONFIG_SYS_MAXARGS=8
-CONFIG_SYS_PBSIZE=1049
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_BOOTMENU=y
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_XIMG is not set
diff --git a/configs/mt7623n_bpir2_defconfig b/configs/mt7623n_bpir2_defconfig
index 0d35bda..4c3d90a 100644
--- a/configs/mt7623n_bpir2_defconfig
+++ b/configs/mt7623n_bpir2_defconfig
@@ -14,15 +14,15 @@
CONFIG_SYS_LOAD_ADDR=0x84000000
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=3
CONFIG_DEFAULT_FDT_FILE="mt7623n-bananapi-bpi-r2.dtb"
+CONFIG_SYS_PBSIZE=1049
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_PROMPT="U-Boot> "
CONFIG_SYS_MAXARGS=8
-CONFIG_SYS_PBSIZE=1049
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_BOOTMENU=y
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_XIMG is not set
diff --git a/configs/mt7628_rfb_defconfig b/configs/mt7628_rfb_defconfig
index 7e5b76c..85b32a7 100644
--- a/configs/mt7628_rfb_defconfig
+++ b/configs/mt7628_rfb_defconfig
@@ -21,6 +21,7 @@
CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y
CONFIG_MIPS_BOOT_FDT=y
CONFIG_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x1000000
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_SYS_MALLOC_BOOTPARAMS=y
@@ -29,7 +30,6 @@
CONFIG_SPL_BSS_MAX_SIZE=0x10000
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_NOR_SUPPORT=y
-CONFIG_SYS_BOOTM_LEN=0x1000000
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_CRC32 is not set
diff --git a/configs/mt7629_rfb_defconfig b/configs/mt7629_rfb_defconfig
index 1b66447..fb78d54 100644
--- a/configs/mt7629_rfb_defconfig
+++ b/configs/mt7629_rfb_defconfig
@@ -22,8 +22,10 @@
CONFIG_SPL_IMAGE="spl/u-boot-spl-mtk.bin"
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_BOOTDELAY=3
CONFIG_DEFAULT_FDT_FILE="mt7629-rfb"
+CONFIG_SYS_PBSIZE=1049
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SPL_MAX_SIZE=0x10000
@@ -37,8 +39,6 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot> "
CONFIG_SYS_MAXARGS=8
-CONFIG_SYS_PBSIZE=1049
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_BOOTMENU=y
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_XIMG is not set
diff --git a/configs/mt7981_emmc_rfb_defconfig b/configs/mt7981_emmc_rfb_defconfig
index 3620777..76ee2aa 100644
--- a/configs/mt7981_emmc_rfb_defconfig
+++ b/configs/mt7981_emmc_rfb_defconfig
@@ -15,11 +15,11 @@
CONFIG_DEBUG_UART=y
# CONFIG_AUTOBOOT is not set
CONFIG_DEFAULT_FDT_FILE="mt7981-emmc-rfb"
+CONFIG_SYS_CBSIZE=512
+CONFIG_SYS_PBSIZE=1049
CONFIG_LOGLEVEL=7
CONFIG_LOG=y
CONFIG_SYS_PROMPT="MT7981> "
-CONFIG_SYS_CBSIZE=512
-CONFIG_SYS_PBSIZE=1049
# CONFIG_BOOTM_NETBSD is not set
# CONFIG_BOOTM_PLAN9 is not set
# CONFIG_BOOTM_RTEMS is not set
diff --git a/configs/mt7981_rfb_defconfig b/configs/mt7981_rfb_defconfig
index b7c794e..817e4b3 100644
--- a/configs/mt7981_rfb_defconfig
+++ b/configs/mt7981_rfb_defconfig
@@ -13,11 +13,11 @@
CONFIG_DEBUG_UART=y
# CONFIG_AUTOBOOT is not set
CONFIG_DEFAULT_FDT_FILE="mt7981-rfb"
+CONFIG_SYS_CBSIZE=512
+CONFIG_SYS_PBSIZE=1049
CONFIG_LOGLEVEL=7
CONFIG_LOG=y
CONFIG_SYS_PROMPT="MT7981> "
-CONFIG_SYS_CBSIZE=512
-CONFIG_SYS_PBSIZE=1049
# CONFIG_BOOTM_NETBSD is not set
# CONFIG_BOOTM_PLAN9 is not set
# CONFIG_BOOTM_RTEMS is not set
diff --git a/configs/mt7981_sd_rfb_defconfig b/configs/mt7981_sd_rfb_defconfig
index 71560a8..9b33245 100644
--- a/configs/mt7981_sd_rfb_defconfig
+++ b/configs/mt7981_sd_rfb_defconfig
@@ -15,11 +15,11 @@
CONFIG_DEBUG_UART=y
# CONFIG_AUTOBOOT is not set
CONFIG_DEFAULT_FDT_FILE="mt7981-sd-rfb"
+CONFIG_SYS_CBSIZE=512
+CONFIG_SYS_PBSIZE=1049
CONFIG_LOGLEVEL=7
CONFIG_LOG=y
CONFIG_SYS_PROMPT="MT7981> "
-CONFIG_SYS_CBSIZE=512
-CONFIG_SYS_PBSIZE=1049
# CONFIG_BOOTM_NETBSD is not set
# CONFIG_BOOTM_PLAN9 is not set
# CONFIG_BOOTM_RTEMS is not set
diff --git a/configs/mt7986_rfb_defconfig b/configs/mt7986_rfb_defconfig
index 5523ca3..35227eb 100644
--- a/configs/mt7986_rfb_defconfig
+++ b/configs/mt7986_rfb_defconfig
@@ -13,11 +13,11 @@
CONFIG_DEBUG_UART=y
# CONFIG_AUTOBOOT is not set
CONFIG_DEFAULT_FDT_FILE="mt7986a-rfb"
+CONFIG_SYS_CBSIZE=512
+CONFIG_SYS_PBSIZE=1049
CONFIG_LOGLEVEL=7
CONFIG_LOG=y
CONFIG_SYS_PROMPT="MT7986> "
-CONFIG_SYS_CBSIZE=512
-CONFIG_SYS_PBSIZE=1049
# CONFIG_BOOTM_NETBSD is not set
# CONFIG_BOOTM_PLAN9 is not set
# CONFIG_BOOTM_RTEMS is not set
diff --git a/configs/mt7986a_bpir3_emmc_defconfig b/configs/mt7986a_bpir3_emmc_defconfig
index 6571801..3c296ab 100644
--- a/configs/mt7986a_bpir3_emmc_defconfig
+++ b/configs/mt7986a_bpir3_emmc_defconfig
@@ -15,11 +15,11 @@
CONFIG_DEBUG_UART=y
# CONFIG_AUTOBOOT is not set
CONFIG_DEFAULT_FDT_FILE="mt7986a-bpi-r3-emmc"
+CONFIG_SYS_CBSIZE=512
+CONFIG_SYS_PBSIZE=1049
CONFIG_LOGLEVEL=7
CONFIG_LOG=y
CONFIG_SYS_PROMPT="BPI-R3> "
-CONFIG_SYS_CBSIZE=512
-CONFIG_SYS_PBSIZE=1049
# CONFIG_BOOTM_NETBSD is not set
# CONFIG_BOOTM_PLAN9 is not set
# CONFIG_BOOTM_RTEMS is not set
diff --git a/configs/mt7986a_bpir3_sd_defconfig b/configs/mt7986a_bpir3_sd_defconfig
index 2da81cd..f644070 100644
--- a/configs/mt7986a_bpir3_sd_defconfig
+++ b/configs/mt7986a_bpir3_sd_defconfig
@@ -15,11 +15,11 @@
CONFIG_DEBUG_UART=y
# CONFIG_AUTOBOOT is not set
CONFIG_DEFAULT_FDT_FILE="mt7986a-bpi-r3-sd"
+CONFIG_SYS_CBSIZE=512
+CONFIG_SYS_PBSIZE=1049
CONFIG_LOGLEVEL=7
CONFIG_LOG=y
CONFIG_SYS_PROMPT="BPI-R3> "
-CONFIG_SYS_CBSIZE=512
-CONFIG_SYS_PBSIZE=1049
# CONFIG_BOOTM_NETBSD is not set
# CONFIG_BOOTM_PLAN9 is not set
# CONFIG_BOOTM_RTEMS is not set
diff --git a/configs/mt7988_rfb_defconfig b/configs/mt7988_rfb_defconfig
index 4424abb..d0ed2cc 100644
--- a/configs/mt7988_rfb_defconfig
+++ b/configs/mt7988_rfb_defconfig
@@ -13,11 +13,11 @@
CONFIG_DEBUG_UART=y
# CONFIG_AUTOBOOT is not set
CONFIG_DEFAULT_FDT_FILE="mt7988-rfb"
+CONFIG_SYS_CBSIZE=512
+CONFIG_SYS_PBSIZE=1049
CONFIG_LOGLEVEL=7
CONFIG_LOG=y
CONFIG_SYS_PROMPT="MT7988> "
-CONFIG_SYS_CBSIZE=512
-CONFIG_SYS_PBSIZE=1049
# CONFIG_BOOTM_NETBSD is not set
# CONFIG_BOOTM_PLAN9 is not set
# CONFIG_BOOTM_RTEMS is not set
diff --git a/configs/mt7988_sd_rfb_defconfig b/configs/mt7988_sd_rfb_defconfig
index de6aca4..5631eaa 100644
--- a/configs/mt7988_sd_rfb_defconfig
+++ b/configs/mt7988_sd_rfb_defconfig
@@ -13,11 +13,11 @@
CONFIG_DEBUG_UART=y
# CONFIG_AUTOBOOT is not set
CONFIG_DEFAULT_FDT_FILE="mt7988-sd-rfb"
+CONFIG_SYS_CBSIZE=512
+CONFIG_SYS_PBSIZE=1049
CONFIG_LOGLEVEL=7
CONFIG_LOG=y
CONFIG_SYS_PROMPT="MT7988> "
-CONFIG_SYS_CBSIZE=512
-CONFIG_SYS_PBSIZE=1049
# CONFIG_BOOTM_NETBSD is not set
# CONFIG_BOOTM_PLAN9 is not set
# CONFIG_BOOTM_RTEMS is not set
diff --git a/configs/mt8183_pumpkin_defconfig b/configs/mt8183_pumpkin_defconfig
index fdfe2a1..92537cd 100644
--- a/configs/mt8183_pumpkin_defconfig
+++ b/configs/mt8183_pumpkin_defconfig
@@ -22,10 +22,10 @@
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run distro_bootcmd"
CONFIG_DEFAULT_FDT_FILE="mt8183-pumpkin"
-# CONFIG_DISPLAY_BOARDINFO is not set
-CONFIG_HUSH_PARSER=y
CONFIG_SYS_CBSIZE=256
CONFIG_SYS_PBSIZE=276
+# CONFIG_DISPLAY_BOARDINFO is not set
+CONFIG_HUSH_PARSER=y
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
# CONFIG_CMD_BOOTD is not set
@@ -41,7 +41,6 @@
# CONFIG_CMD_MEMORY is not set
CONFIG_CMD_CLK=y
CONFIG_CMD_GPT=y
-# CONFIG_RANDOM_UUID is not set
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
@@ -83,5 +82,6 @@
CONFIG_USB_ETHER=y
CONFIG_WDT=y
CONFIG_WDT_MTK=y
+# CONFIG_RANDOM_UUID is not set
# CONFIG_REGEX is not set
# CONFIG_EFI_LOADER is not set
diff --git a/configs/mt8365_evk_defconfig b/configs/mt8365_evk_defconfig
new file mode 100644
index 0000000..94b1f02
--- /dev/null
+++ b/configs/mt8365_evk_defconfig
@@ -0,0 +1,19 @@
+CONFIG_ARM=y
+CONFIG_SYS_BOARD="mt8365_evk"
+CONFIG_COUNTER_FREQUENCY=13000000
+CONFIG_POSITION_INDEPENDENT=y
+CONFIG_ARCH_MEDIATEK=y
+CONFIG_TEXT_BASE=0x4c000000
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_DEFAULT_DEVICE_TREE="mt8365-evk"
+CONFIG_TARGET_MT8365=y
+CONFIG_IDENT_STRING=" mt8365-evk"
+CONFIG_SYS_LOAD_ADDR=0x4c000000
+CONFIG_DEFAULT_FDT_FILE="mt8365-evk"
+CONFIG_CLK=y
+CONFIG_MMC_MTK=y
+CONFIG_BAUDRATE=921600
+CONFIG_DM_SERIAL=y
+CONFIG_MTK_SERIAL=y
+CONFIG_WDT=y
+CONFIG_WDT_MTK=y
diff --git a/configs/mt8512_bm1_emmc_defconfig b/configs/mt8512_bm1_emmc_defconfig
index 9a653f1..2a285a5 100644
--- a/configs/mt8512_bm1_emmc_defconfig
+++ b/configs/mt8512_bm1_emmc_defconfig
@@ -14,9 +14,9 @@
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_DEFAULT_FDT_FILE="mt8512-bm1-emmc.dtb"
-CONFIG_SYS_PROMPT="MT8512> "
CONFIG_SYS_CBSIZE=256
CONFIG_SYS_PBSIZE=281
+CONFIG_SYS_PROMPT="MT8512> "
CONFIG_CMD_BOOTMENU=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
diff --git a/configs/mt8516_pumpkin_defconfig b/configs/mt8516_pumpkin_defconfig
index 10d8214..48eff41 100644
--- a/configs/mt8516_pumpkin_defconfig
+++ b/configs/mt8516_pumpkin_defconfig
@@ -20,11 +20,11 @@
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run distro_bootcmd"
CONFIG_DEFAULT_FDT_FILE="mt8516-pumpkin"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_BOARD_LATE_INIT=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=276
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
# CONFIG_CMD_BOOTD is not set
@@ -40,7 +40,6 @@
# CONFIG_CMD_CRC32 is not set
# CONFIG_CMD_MEMORY is not set
CONFIG_CMD_GPT=y
-# CONFIG_RANDOM_UUID is not set
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
@@ -85,4 +84,5 @@
CONFIG_USB_GADGET_PRODUCT_NUM=0x201c
CONFIG_WDT=y
CONFIG_WDT_MTK=y
+# CONFIG_RANDOM_UUID is not set
# CONFIG_SHA256 is not set
diff --git a/configs/mt8518_ap1_emmc_defconfig b/configs/mt8518_ap1_emmc_defconfig
index dbe767a..566897f 100644
--- a/configs/mt8518_ap1_emmc_defconfig
+++ b/configs/mt8518_ap1_emmc_defconfig
@@ -13,10 +13,10 @@
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_DEFAULT_FDT_FILE="mt8518-ap1-emmc.dtb"
-CONFIG_BOARD_LATE_INIT=y
-CONFIG_SYS_PROMPT="MT8518> "
CONFIG_SYS_CBSIZE=256
CONFIG_SYS_PBSIZE=281
+CONFIG_BOARD_LATE_INIT=y
+CONFIG_SYS_PROMPT="MT8518> "
CONFIG_CMD_BOOTMENU=y
CONFIG_CMD_MMC=y
CONFIG_EFI_PARTITION=y
diff --git a/configs/mvebu_ac5_rd_defconfig b/configs/mvebu_ac5_rd_defconfig
index 0a9adcc..677b211 100644
--- a/configs/mvebu_ac5_rd_defconfig
+++ b/configs/mvebu_ac5_rd_defconfig
@@ -58,7 +58,6 @@
CONFIG_MISC=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_XENON=y
-CONFIG_MTD=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_SPANSION=y
diff --git a/configs/mvebu_crb_cn9130_defconfig b/configs/mvebu_crb_cn9130_defconfig
index ce9dcf8..4d5f575 100644
--- a/configs/mvebu_crb_cn9130_defconfig
+++ b/configs/mvebu_crb_cn9130_defconfig
@@ -16,8 +16,10 @@
CONFIG_DEBUG_UART=y
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SYS_BOOTM_LEN=0x800000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_USE_PREBOOT=y
+CONFIG_SYS_PBSIZE=1051
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
@@ -25,8 +27,6 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SYS_PROMPT="Marvell>> "
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=1051
-CONFIG_SYS_BOOTM_LEN=0x800000
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_MTD=y
@@ -56,7 +56,6 @@
CONFIG_MMC_HS200_SUPPORT=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_XENON=y
-CONFIG_MTD=y
CONFIG_DM_MTD=y
CONFIG_SPI_FLASH_SFDP_SUPPORT=y
CONFIG_SPI_FLASH_MACRONIX=y
diff --git a/configs/mvebu_db-88f3720_defconfig b/configs/mvebu_db-88f3720_defconfig
index 51518cf..372a660 100644
--- a/configs/mvebu_db-88f3720_defconfig
+++ b/configs/mvebu_db-88f3720_defconfig
@@ -56,7 +56,6 @@
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_XENON=y
-CONFIG_MTD=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y
diff --git a/configs/mvebu_db_armada8k_defconfig b/configs/mvebu_db_armada8k_defconfig
index e611990..6913796 100644
--- a/configs/mvebu_db_armada8k_defconfig
+++ b/configs/mvebu_db_armada8k_defconfig
@@ -17,6 +17,7 @@
CONFIG_DEBUG_UART=y
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SYS_BOOTM_LEN=0x800000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_USE_PREBOOT=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
@@ -25,7 +26,6 @@
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_BOOTM_LEN=0x800000
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PCI=y
diff --git a/configs/mvebu_db_cn9130_defconfig b/configs/mvebu_db_cn9130_defconfig
index 35a3af4..9133e25 100644
--- a/configs/mvebu_db_cn9130_defconfig
+++ b/configs/mvebu_db_cn9130_defconfig
@@ -18,8 +18,10 @@
CONFIG_DEBUG_UART=y
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SYS_BOOTM_LEN=0x800000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_USE_PREBOOT=y
+CONFIG_SYS_PBSIZE=1051
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
@@ -27,8 +29,6 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SYS_PROMPT="Marvell>> "
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=1051
-CONFIG_SYS_BOOTM_LEN=0x800000
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_MTD=y
@@ -58,7 +58,6 @@
CONFIG_MMC_HS200_SUPPORT=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_XENON=y
-CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_USE_FLASH_BBT=y
CONFIG_NAND_PXA3XX=y
diff --git a/configs/mvebu_espressobin-88f3720_defconfig b/configs/mvebu_espressobin-88f3720_defconfig
index 227607a..0cebebc 100644
--- a/configs/mvebu_espressobin-88f3720_defconfig
+++ b/configs/mvebu_espressobin-88f3720_defconfig
@@ -66,7 +66,6 @@
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_XENON=y
-CONFIG_MTD=y
CONFIG_DM_MTD=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_ISSI=y
diff --git a/configs/mvebu_mcbin-88f8040_defconfig b/configs/mvebu_mcbin-88f8040_defconfig
index 3839d7d..eef612a 100644
--- a/configs/mvebu_mcbin-88f8040_defconfig
+++ b/configs/mvebu_mcbin-88f8040_defconfig
@@ -18,6 +18,7 @@
CONFIG_DEBUG_UART=y
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SYS_BOOTM_LEN=0x800000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_USE_PREBOOT=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
@@ -26,7 +27,6 @@
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_BOOTM_LEN=0x800000
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
diff --git a/configs/mvebu_puzzle-m801-88f8040_defconfig b/configs/mvebu_puzzle-m801-88f8040_defconfig
index 4576335..b00e929 100644
--- a/configs/mvebu_puzzle-m801-88f8040_defconfig
+++ b/configs/mvebu_puzzle-m801-88f8040_defconfig
@@ -18,6 +18,7 @@
CONFIG_DEBUG_UART=y
CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SYS_BOOTM_LEN=0x800000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Autoboot in %d seconds, to stop use 's' key\n"
@@ -30,7 +31,6 @@
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_BOOTM_LEN=0x800000
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
diff --git a/configs/mx28evk_defconfig b/configs/mx28evk_defconfig
index 905766b..87e549b 100644
--- a/configs/mx28evk_defconfig
+++ b/configs/mx28evk_defconfig
@@ -27,7 +27,6 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=32
CONFIG_CMD_BOOTZ=y
-CONFIG_CMD_DM=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
diff --git a/configs/mx51evk_defconfig b/configs/mx51evk_defconfig
index 832f718..e5178fb 100644
--- a/configs/mx51evk_defconfig
+++ b/configs/mx51evk_defconfig
@@ -15,11 +15,11 @@
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi"
CONFIG_USE_PREBOOT=y
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_DM=y
CONFIG_CMD_FUSE=y
diff --git a/configs/mx53loco_defconfig b/configs/mx53loco_defconfig
index 0e68b79..d4de8df 100644
--- a/configs/mx53loco_defconfig
+++ b/configs/mx53loco_defconfig
@@ -17,10 +17,10 @@
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi"
CONFIG_USE_PREBOOT=y
+CONFIG_SYS_PBSIZE=532
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_DM=y
CONFIG_CMD_MMC=y
diff --git a/configs/mx53ppd_defconfig b/configs/mx53ppd_defconfig
index 0dd1bac..659de71 100644
--- a/configs/mx53ppd_defconfig
+++ b/configs/mx53ppd_defconfig
@@ -16,6 +16,7 @@
CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run doquiet; run tryboot"
+CONFIG_SYS_CBSIZE=1024
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
@@ -23,7 +24,6 @@
CONFIG_MISC_INIT_R=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=48
-CONFIG_SYS_CBSIZE=1024
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_DM=y
CONFIG_CMD_FUSE=y
diff --git a/configs/mx6cuboxi_defconfig b/configs/mx6cuboxi_defconfig
index 8b19096..66d4aae 100644
--- a/configs/mx6cuboxi_defconfig
+++ b/configs/mx6cuboxi_defconfig
@@ -27,6 +27,7 @@
CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd"
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="if hdmidet; then usb start; setenv stdin serial,usbkbd; setenv stdout serial,vidconsole; setenv stderr serial,vidconsole; else setenv stdin serial; setenv stdout serial; setenv stderr serial; fi;"
+CONFIG_SYS_PBSIZE=532
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_FS_EXT4=y
@@ -34,7 +35,6 @@
CONFIG_SPL_I2C=y
CONFIG_SPL_WATCHDOG=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
# CONFIG_CMD_PINMUX is not set
diff --git a/configs/mx6memcal_defconfig b/configs/mx6memcal_defconfig
index 6dd64b6..7f11e6f 100644
--- a/configs/mx6memcal_defconfig
+++ b/configs/mx6memcal_defconfig
@@ -15,11 +15,11 @@
CONFIG_SYS_MEMTEST_START=0x10000000
CONFIG_SYS_MEMTEST_END=0x20000000
CONFIG_SUPPORT_RAW_INITRD=y
+CONFIG_SYS_PBSIZE=528
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_WATCHDOG=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=528
# CONFIG_CMD_BOOTD is not set
# CONFIG_CMD_BOOTM is not set
# CONFIG_CMD_ELF is not set
diff --git a/configs/mx6qsabrelite_defconfig b/configs/mx6qsabrelite_defconfig
index 82082c9..0191f03 100644
--- a/configs/mx6qsabrelite_defconfig
+++ b/configs/mx6qsabrelite_defconfig
@@ -23,17 +23,16 @@
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=3
CONFIG_USE_PREBOOT=y
+CONFIG_SYS_PBSIZE=532
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_MISC_INIT_R=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_MEMTEST=y
CONFIG_SYS_ALT_MEMTEST=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
-# CONFIG_RANDOM_UUID is not set
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
# CONFIG_CMD_PINMUX is not set
@@ -97,3 +96,4 @@
CONFIG_VIDEO_LOGO_MAX_SIZE=0x600000
CONFIG_VIDEO_BMP_RLE8=y
CONFIG_BMP_16BPP=y
+# CONFIG_RANDOM_UUID is not set
diff --git a/configs/mx6sabreauto_defconfig b/configs/mx6sabreauto_defconfig
index deb0b65..c7d1309 100644
--- a/configs/mx6sabreauto_defconfig
+++ b/configs/mx6sabreauto_defconfig
@@ -27,6 +27,7 @@
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run findfdt;mmc dev ${mmcdev};if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi"
+CONFIG_SYS_PBSIZE=532
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
@@ -38,7 +39,6 @@
CONFIG_SPL_WATCHDOG=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
diff --git a/configs/mx6sabresd_defconfig b/configs/mx6sabresd_defconfig
index edc92f8..a90efe4 100644
--- a/configs/mx6sabresd_defconfig
+++ b/configs/mx6sabresd_defconfig
@@ -27,6 +27,7 @@
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run findfdt;mmc dev ${mmcdev};if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi"
+CONFIG_SYS_PBSIZE=532
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
@@ -36,7 +37,6 @@
CONFIG_SPL_WATCHDOG=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_SPL=y
CONFIG_CMD_SPL_WRITE_SIZE=0x20000
diff --git a/configs/mx6slevk_defconfig b/configs/mx6slevk_defconfig
index 1748f9f..bf3d0fd 100644
--- a/configs/mx6slevk_defconfig
+++ b/configs/mx6slevk_defconfig
@@ -14,10 +14,10 @@
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi"
+CONFIG_SYS_PBSIZE=532
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
diff --git a/configs/mx6slevk_spinor_defconfig b/configs/mx6slevk_spinor_defconfig
index 4d477f9..12912bc 100644
--- a/configs/mx6slevk_spinor_defconfig
+++ b/configs/mx6slevk_spinor_defconfig
@@ -16,10 +16,10 @@
CONFIG_SPI_BOOT=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi"
+CONFIG_SYS_PBSIZE=532
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
diff --git a/configs/mx6slevk_spl_defconfig b/configs/mx6slevk_spl_defconfig
index 8db4576..9c92360 100644
--- a/configs/mx6slevk_spl_defconfig
+++ b/configs/mx6slevk_spl_defconfig
@@ -26,6 +26,7 @@
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi"
+CONFIG_SYS_PBSIZE=532
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_FS_EXT4=y
@@ -34,7 +35,6 @@
CONFIG_SPL_WATCHDOG=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
diff --git a/configs/mx6sllevk_defconfig b/configs/mx6sllevk_defconfig
index ea46071..d529f9b 100644
--- a/configs/mx6sllevk_defconfig
+++ b/configs/mx6sllevk_defconfig
@@ -15,10 +15,10 @@
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi"
+CONFIG_SYS_PBSIZE=532
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPIO=y
diff --git a/configs/mx6sllevk_plugin_defconfig b/configs/mx6sllevk_plugin_defconfig
index 885dda7..1e61b42 100644
--- a/configs/mx6sllevk_plugin_defconfig
+++ b/configs/mx6sllevk_plugin_defconfig
@@ -16,10 +16,10 @@
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi"
+CONFIG_SYS_PBSIZE=532
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPIO=y
diff --git a/configs/mx6sxsabreauto_defconfig b/configs/mx6sxsabreauto_defconfig
index d41cbfe..2e84150 100644
--- a/configs/mx6sxsabreauto_defconfig
+++ b/configs/mx6sxsabreauto_defconfig
@@ -14,9 +14,9 @@
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="mmc dev ${mmcdev};mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi"
+CONFIG_SYS_PBSIZE=532
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
diff --git a/configs/mx6sxsabresd_defconfig b/configs/mx6sxsabresd_defconfig
index d5c6821..5bc3394 100644
--- a/configs/mx6sxsabresd_defconfig
+++ b/configs/mx6sxsabresd_defconfig
@@ -16,10 +16,10 @@
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run findfdt; mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi"
+CONFIG_SYS_PBSIZE=532
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
diff --git a/configs/mx6ul_14x14_evk_defconfig b/configs/mx6ul_14x14_evk_defconfig
index f727423..bbeb364 100644
--- a/configs/mx6ul_14x14_evk_defconfig
+++ b/configs/mx6ul_14x14_evk_defconfig
@@ -26,6 +26,7 @@
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run findfdt;mmc dev ${mmcdev};mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi"
+CONFIG_SYS_PBSIZE=532
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
@@ -36,7 +37,6 @@
CONFIG_SPL_WATCHDOG=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPIO=y
diff --git a/configs/mx6ul_9x9_evk_defconfig b/configs/mx6ul_9x9_evk_defconfig
index 1e4ec0b..101653a 100644
--- a/configs/mx6ul_9x9_evk_defconfig
+++ b/configs/mx6ul_9x9_evk_defconfig
@@ -26,6 +26,7 @@
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run findfdt;mmc dev ${mmcdev};mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi"
+CONFIG_SYS_PBSIZE=532
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
@@ -36,7 +37,6 @@
CONFIG_SPL_WATCHDOG=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPIO=y
diff --git a/configs/mx6ull_14x14_evk_defconfig b/configs/mx6ull_14x14_evk_defconfig
index 8b8a804..316f74c 100644
--- a/configs/mx6ull_14x14_evk_defconfig
+++ b/configs/mx6ull_14x14_evk_defconfig
@@ -15,11 +15,11 @@
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run findfdt;mmc dev ${mmcdev};mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi"
+CONFIG_SYS_PBSIZE=532
CONFIG_ARCH_MISC_INIT=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPIO=y
diff --git a/configs/mx6ull_14x14_evk_plugin_defconfig b/configs/mx6ull_14x14_evk_plugin_defconfig
index 4bed72d..8be5963 100644
--- a/configs/mx6ull_14x14_evk_plugin_defconfig
+++ b/configs/mx6ull_14x14_evk_plugin_defconfig
@@ -16,11 +16,11 @@
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run findfdt;mmc dev ${mmcdev};mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi"
+CONFIG_SYS_PBSIZE=532
CONFIG_ARCH_MISC_INIT=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPIO=y
diff --git a/configs/mx6ulz_14x14_evk_defconfig b/configs/mx6ulz_14x14_evk_defconfig
index 4abb575..d57b47e 100644
--- a/configs/mx6ulz_14x14_evk_defconfig
+++ b/configs/mx6ulz_14x14_evk_defconfig
@@ -15,10 +15,10 @@
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run findfdt;mmc dev ${mmcdev};mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi"
+CONFIG_SYS_PBSIZE=532
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPIO=y
diff --git a/configs/mx7dsabresd_defconfig b/configs/mx7dsabresd_defconfig
index 1c8105f..7811b17 100644
--- a/configs/mx7dsabresd_defconfig
+++ b/configs/mx7dsabresd_defconfig
@@ -15,9 +15,9 @@
CONFIG_SYS_MEMTEST_END=0xa0000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTCOMMAND="run finduuid; run distro_bootcmd"
+CONFIG_SYS_PBSIZE=532
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=532
# CONFIG_CMD_BOOTD is not set
# CONFIG_BOOTM_NETBSD is not set
# CONFIG_BOOTM_PLAN9 is not set
diff --git a/configs/mx7dsabresd_qspi_defconfig b/configs/mx7dsabresd_qspi_defconfig
index 333d933..2ee8bd3 100644
--- a/configs/mx7dsabresd_qspi_defconfig
+++ b/configs/mx7dsabresd_qspi_defconfig
@@ -15,9 +15,9 @@
CONFIG_SYS_MEMTEST_END=0xa0000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTCOMMAND="run finduuid; run distro_bootcmd"
+CONFIG_SYS_PBSIZE=532
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=532
# CONFIG_CMD_BOOTD is not set
# CONFIG_BOOTM_NETBSD is not set
# CONFIG_BOOTM_PLAN9 is not set
diff --git a/configs/mx7ulp_com_defconfig b/configs/mx7ulp_com_defconfig
index 00fd6aa..f8dcc0a 100644
--- a/configs/mx7ulp_com_defconfig
+++ b/configs/mx7ulp_com_defconfig
@@ -13,15 +13,15 @@
CONFIG_SYS_LOAD_ADDR=0x60800000
CONFIG_HAS_BOARD_SIZE_LIMIT=y
CONFIG_BOARD_SIZE_LIMIT=785408
+CONFIG_SYS_BOOTM_LEN=0x1000000
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="if run loadimage; then run mmcboot; fi"
CONFIG_DEFAULT_FDT_FILE="imx7ulp-com"
-CONFIG_BOARD_EARLY_INIT_F=y
-CONFIG_HUSH_PARSER=y
CONFIG_SYS_CBSIZE=256
CONFIG_SYS_PBSIZE=276
+CONFIG_BOARD_EARLY_INIT_F=y
+CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
-CONFIG_SYS_BOOTM_LEN=0x1000000
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
@@ -40,6 +40,7 @@
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_IMX_LPI2C=y
CONFIG_FSL_USDHC=y
+CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y
CONFIG_PINCTRL=y
diff --git a/configs/mx7ulp_evk_defconfig b/configs/mx7ulp_evk_defconfig
index ecc4251..38e6b62 100644
--- a/configs/mx7ulp_evk_defconfig
+++ b/configs/mx7ulp_evk_defconfig
@@ -12,16 +12,16 @@
CONFIG_SYS_LOAD_ADDR=0x60800000
CONFIG_SYS_MEMTEST_START=0x60000000
CONFIG_SYS_MEMTEST_END=0x9e000000
+CONFIG_SYS_BOOTM_LEN=0x1000000
CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; fi; fi; fi"
+CONFIG_SYS_CBSIZE=512
+CONFIG_SYS_PBSIZE=532
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=256
-CONFIG_SYS_CBSIZE=512
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_BOOTZ=y
-CONFIG_SYS_BOOTM_LEN=0x1000000
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_FUSE=y
CONFIG_CMD_GPIO=y
diff --git a/configs/mx7ulp_evk_plugin_defconfig b/configs/mx7ulp_evk_plugin_defconfig
index d31633e..d007d18 100644
--- a/configs/mx7ulp_evk_plugin_defconfig
+++ b/configs/mx7ulp_evk_plugin_defconfig
@@ -12,14 +12,14 @@
CONFIG_SYS_LOAD_ADDR=0x60800000
CONFIG_SYS_MEMTEST_START=0x60000000
CONFIG_SYS_MEMTEST_END=0x9e000000
+CONFIG_SYS_BOOTM_LEN=0x1000000
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; fi; fi; fi"
+CONFIG_SYS_CBSIZE=512
+CONFIG_SYS_PBSIZE=532
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=256
-CONFIG_SYS_CBSIZE=512
-CONFIG_SYS_PBSIZE=532
-CONFIG_SYS_BOOTM_LEN=0x1000000
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_FUSE=y
CONFIG_CMD_GPIO=y
diff --git a/configs/myir_mys_6ulx_defconfig b/configs/myir_mys_6ulx_defconfig
index 456d1b8..b165dd4 100644
--- a/configs/myir_mys_6ulx_defconfig
+++ b/configs/myir_mys_6ulx_defconfig
@@ -19,18 +19,16 @@
CONFIG_FIT=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=3
+CONFIG_SYS_PBSIZE=532
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_DMA=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_SPL_WATCHDOG=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
-# CONFIG_RANDOM_UUID is not set
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_MTD=y
@@ -71,3 +69,4 @@
CONFIG_SPL_USB_HOST=y
CONFIG_USB_GADGET=y
CONFIG_SPL_USB_GADGET=y
+# CONFIG_RANDOM_UUID is not set
diff --git a/configs/n2350_defconfig b/configs/n2350_defconfig
index 0713574..26895e9 100644
--- a/configs/n2350_defconfig
+++ b/configs/n2350_defconfig
@@ -71,7 +71,6 @@
CONFIG_SYS_64BIT_LBA=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_MVTWSI=y
-CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_PXA3XX=y
CONFIG_SYS_NAND_ONFI_DETECTION=y
@@ -87,7 +86,6 @@
CONFIG_PINCTRL_ARMADA_38X=y
CONFIG_DM_RTC=y
CONFIG_RTC_ARMADA38X=y
-CONFIG_SCSI=y
CONFIG_SPL_DEBUG_UART_BASE=0xd0012000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550=y
diff --git a/configs/nanopc-t4-rk3399_defconfig b/configs/nanopc-t4-rk3399_defconfig
index 82e86ca..c18e7b1 100644
--- a/configs/nanopc-t4-rk3399_defconfig
+++ b/configs/nanopc-t4-rk3399_defconfig
@@ -43,6 +43,7 @@
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MISC=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MMC_SDHCI=y
@@ -60,10 +61,10 @@
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
CONFIG_USB_KEYBOARD=y
CONFIG_USB_HOST_ETHER=y
CONFIG_USB_ETHER_ASIX=y
diff --git a/configs/nanopc-t6-rk3588_defconfig b/configs/nanopc-t6-rk3588_defconfig
index 070399c..7609932 100644
--- a/configs/nanopc-t6-rk3588_defconfig
+++ b/configs/nanopc-t6-rk3588_defconfig
@@ -14,6 +14,7 @@
CONFIG_DEFAULT_DEVICE_TREE="rk3588-nanopc-t6"
CONFIG_ROCKCHIP_RK3588=y
CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y
+CONFIG_ROCKCHIP_SPI_IMAGE=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK_R_ADDR=0x600000
CONFIG_TARGET_NANOPCT6_RK3588=y
@@ -91,7 +92,6 @@
CONFIG_ROCKCHIP_SFC=y
CONFIG_SYSRESET=y
CONFIG_USB=y
-CONFIG_DM_USB_GADGET=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
diff --git a/configs/nanopi-m4-2gb-rk3399_defconfig b/configs/nanopi-m4-2gb-rk3399_defconfig
index dd71551..e3bdbcc 100644
--- a/configs/nanopi-m4-2gb-rk3399_defconfig
+++ b/configs/nanopi-m4-2gb-rk3399_defconfig
@@ -40,6 +40,7 @@
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MISC=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MMC_SDHCI=y
@@ -56,9 +57,10 @@
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
CONFIG_USB_KEYBOARD=y
CONFIG_USB_HOST_ETHER=y
CONFIG_USB_ETHER_ASIX=y
diff --git a/configs/nanopi-m4-rk3399_defconfig b/configs/nanopi-m4-rk3399_defconfig
index 3da93db..e51e51c 100644
--- a/configs/nanopi-m4-rk3399_defconfig
+++ b/configs/nanopi-m4-rk3399_defconfig
@@ -40,6 +40,7 @@
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MISC=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MMC_SDHCI=y
@@ -56,9 +57,10 @@
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
CONFIG_USB_KEYBOARD=y
CONFIG_USB_HOST_ETHER=y
CONFIG_USB_ETHER_ASIX=y
diff --git a/configs/nanopi-m4b-rk3399_defconfig b/configs/nanopi-m4b-rk3399_defconfig
index 701dde1..ca57c7f 100644
--- a/configs/nanopi-m4b-rk3399_defconfig
+++ b/configs/nanopi-m4b-rk3399_defconfig
@@ -40,6 +40,7 @@
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MISC=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MMC_SDHCI=y
@@ -56,9 +57,10 @@
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
CONFIG_USB_KEYBOARD=y
CONFIG_USB_HOST_ETHER=y
CONFIG_USB_ETHER_ASIX=y
diff --git a/configs/nanopi-neo4-rk3399_defconfig b/configs/nanopi-neo4-rk3399_defconfig
index 3f9d034..02e7f4e 100644
--- a/configs/nanopi-neo4-rk3399_defconfig
+++ b/configs/nanopi-neo4-rk3399_defconfig
@@ -40,6 +40,7 @@
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MISC=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MMC_SDHCI=y
@@ -56,9 +57,10 @@
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
CONFIG_USB_KEYBOARD=y
CONFIG_USB_HOST_ETHER=y
CONFIG_USB_ETHER_ASIX=y
diff --git a/configs/nanopi-r2c-plus-rk3328_defconfig b/configs/nanopi-r2c-plus-rk3328_defconfig
new file mode 100644
index 0000000..320ed8b
--- /dev/null
+++ b/configs/nanopi-r2c-plus-rk3328_defconfig
@@ -0,0 +1,114 @@
+CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_COUNTER_FREQUENCY=24000000
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_TEXT_BASE=0x00200000
+CONFIG_SPL_GPIO=y
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
+CONFIG_SF_DEFAULT_SPEED=20000000
+CONFIG_ENV_OFFSET=0x3F8000
+CONFIG_DEFAULT_DEVICE_TREE="rk3328-nanopi-r2c-plus"
+CONFIG_DM_RESET=y
+CONFIG_ROCKCHIP_RK3328=y
+CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y
+CONFIG_TPL_LIBCOMMON_SUPPORT=y
+CONFIG_TPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC=y
+CONFIG_SPL_STACK_R_ADDR=0x600000
+CONFIG_SPL_STACK=0x400000
+CONFIG_TPL_SYS_MALLOC_F_LEN=0x800
+CONFIG_DEBUG_UART_BASE=0xFF130000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_SYS_LOAD_ADDR=0x800800
+CONFIG_DEBUG_UART=y
+# CONFIG_ANDROID_BOOT_IMAGE is not set
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-nanopi-r2c-plus.dtb"
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_MISC_INIT_R=y
+CONFIG_SPL_MAX_SIZE=0x40000
+CONFIG_SPL_PAD_TO=0x7f8000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x2000000
+CONFIG_SPL_BSS_MAX_SIZE=0x2000
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_I2C=y
+CONFIG_SPL_POWER=y
+CONFIG_SPL_ATF=y
+CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
+CONFIG_TPL_SYS_MALLOC_SIMPLE=y
+CONFIG_CMD_BOOTZ=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_TIME=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_TPL_OF_CONTROL=y
+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_TPL_OF_PLATDATA=y
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_SYS_MMC_ENV_DEV=1
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_TPL_DM=y
+CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_TPL_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
+CONFIG_TPL_SYSCON=y
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_FASTBOOT_BUF_ADDR=0x800800
+CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MISC=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PINCTRL=y
+CONFIG_SPL_PINCTRL=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_SPL_PMIC_RK8XX=y
+CONFIG_SPL_DM_REGULATOR=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_SPL_DM_REGULATOR_FIXED=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM=y
+CONFIG_SPL_RAM=y
+CONFIG_TPL_RAM=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
+CONFIG_SYSINFO=y
+CONFIG_SYSRESET=y
+# CONFIG_TPL_SYSRESET is not set
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_GENERIC=y
+CONFIG_USB_DWC2=y
+CONFIG_USB_DWC3=y
+# CONFIG_USB_DWC3_GADGET is not set
+CONFIG_USB_DWC3_GENERIC=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_SPL_TINY_MEMSET=y
+CONFIG_TPL_TINY_MEMSET=y
+CONFIG_ERRNO_STR=y
diff --git a/configs/nanopi-r4s-rk3399_defconfig b/configs/nanopi-r4s-rk3399_defconfig
index 4f4363c..cacaab1 100644
--- a/configs/nanopi-r4s-rk3399_defconfig
+++ b/configs/nanopi-r4s-rk3399_defconfig
@@ -63,9 +63,10 @@
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
CONFIG_USB_KEYBOARD=y
CONFIG_USB_HOST_ETHER=y
CONFIG_USB_ETHER_ASIX=y
diff --git a/configs/nanopi_duo2_defconfig b/configs/nanopi_duo2_defconfig
new file mode 100644
index 0000000..beb2f92
--- /dev/null
+++ b/configs/nanopi_duo2_defconfig
@@ -0,0 +1,12 @@
+CONFIG_ARM=y
+CONFIG_ARCH_SUNXI=y
+CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-nanopi-duo2"
+CONFIG_SPL=y
+CONFIG_MACH_SUN8I_H3=y
+CONFIG_DRAM_CLK=408
+# CONFIG_VIDEO_DE2 is not set
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_CONSOLE_MUX=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_MUSB_GADGET=y
diff --git a/configs/nas220_defconfig b/configs/nas220_defconfig
index 4dbd462..0542528 100644
--- a/configs/nas220_defconfig
+++ b/configs/nas220_defconfig
@@ -17,12 +17,12 @@
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTCOMMAND=y
CONFIG_USE_PREBOOT=y
+CONFIG_SYS_PBSIZE=1049
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_RESET_PHY_R=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="nas220> "
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=1049
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_IDE=y
CONFIG_CMD_NAND=y
diff --git a/configs/net2big_v2_defconfig b/configs/net2big_v2_defconfig
index ab06f54..dda627a 100644
--- a/configs/net2big_v2_defconfig
+++ b/configs/net2big_v2_defconfig
@@ -23,6 +23,7 @@
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="dhcp && run netconsole; if run usbload || run diskload; then bootm; fi"
CONFIG_USE_PREBOOT=y
+CONFIG_SYS_PBSIZE=1048
CONFIG_CONSOLE_MUX=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_MISC_INIT_R=y
@@ -30,7 +31,6 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="2big2> "
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=1048
CONFIG_CMD_EEPROM=y
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=4
CONFIG_CMD_I2C=y
@@ -62,6 +62,7 @@
CONFIG_SYS_I2C_SLAVE=0x0
CONFIG_SYS_I2C_EEPROM_ADDR=0x50
# CONFIG_MMC is not set
+CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_MVGBE=y
diff --git a/configs/netgear_cg3100d_ram_defconfig b/configs/netgear_cg3100d_ram_defconfig
index 867c0ec..d299714 100644
--- a/configs/netgear_cg3100d_ram_defconfig
+++ b/configs/netgear_cg3100d_ram_defconfig
@@ -16,13 +16,13 @@
CONFIG_MIPS_BOOT_FDT=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_SYS_CBSIZE=512
+CONFIG_SYS_PBSIZE=539
CONFIG_DISPLAY_CPUINFO=y
CONFIG_SYS_MALLOC_BOOTPARAMS=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="CG3100D # "
CONFIG_SYS_MAXARGS=24
-CONFIG_SYS_CBSIZE=512
-CONFIG_SYS_PBSIZE=539
CONFIG_CMD_CPU=y
CONFIG_CMD_LICENSE=y
# CONFIG_CMD_BOOTD is not set
diff --git a/configs/netgear_dgnd3700v2_ram_defconfig b/configs/netgear_dgnd3700v2_ram_defconfig
index 5768e66..e4211a8 100644
--- a/configs/netgear_dgnd3700v2_ram_defconfig
+++ b/configs/netgear_dgnd3700v2_ram_defconfig
@@ -18,14 +18,14 @@
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_REMAKE_ELF=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_SYS_CBSIZE=512
+CONFIG_SYS_PBSIZE=542
CONFIG_DISPLAY_CPUINFO=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SYS_MALLOC_BOOTPARAMS=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="DGND3700v2 # "
CONFIG_SYS_MAXARGS=24
-CONFIG_SYS_CBSIZE=512
-CONFIG_SYS_PBSIZE=542
CONFIG_CMD_CPU=y
CONFIG_CMD_LICENSE=y
# CONFIG_CMD_BOOTD is not set
diff --git a/configs/netspace_lite_v2_defconfig b/configs/netspace_lite_v2_defconfig
index b06f5c0..742e620 100644
--- a/configs/netspace_lite_v2_defconfig
+++ b/configs/netspace_lite_v2_defconfig
@@ -23,6 +23,7 @@
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="dhcp && run netconsole; if run usbload || run diskload; then bootm; fi"
CONFIG_USE_PREBOOT=y
+CONFIG_SYS_PBSIZE=1046
CONFIG_CONSOLE_MUX=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_MISC_INIT_R=y
@@ -30,7 +31,6 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="ns2> "
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=1046
CONFIG_CMD_EEPROM=y
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=4
CONFIG_CMD_I2C=y
@@ -62,6 +62,7 @@
CONFIG_SYS_I2C_SLAVE=0x0
CONFIG_SYS_I2C_EEPROM_ADDR=0x50
# CONFIG_MMC is not set
+CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_MVGBE=y
diff --git a/configs/netspace_max_v2_defconfig b/configs/netspace_max_v2_defconfig
index 73d2faf..7779e68 100644
--- a/configs/netspace_max_v2_defconfig
+++ b/configs/netspace_max_v2_defconfig
@@ -23,6 +23,7 @@
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="dhcp && run netconsole; if run usbload || run diskload; then bootm; fi"
CONFIG_USE_PREBOOT=y
+CONFIG_SYS_PBSIZE=1046
CONFIG_CONSOLE_MUX=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_MISC_INIT_R=y
@@ -30,7 +31,6 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="ns2> "
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=1046
CONFIG_CMD_EEPROM=y
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=4
CONFIG_CMD_I2C=y
@@ -62,6 +62,7 @@
CONFIG_SYS_I2C_SLAVE=0x0
CONFIG_SYS_I2C_EEPROM_ADDR=0x50
# CONFIG_MMC is not set
+CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_MVGBE=y
diff --git a/configs/netspace_mini_v2_defconfig b/configs/netspace_mini_v2_defconfig
index 3281ce8..9e3614b 100644
--- a/configs/netspace_mini_v2_defconfig
+++ b/configs/netspace_mini_v2_defconfig
@@ -23,6 +23,7 @@
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="dhcp && run netconsole; if run usbload || run diskload; then bootm; fi"
CONFIG_USE_PREBOOT=y
+CONFIG_SYS_PBSIZE=1046
CONFIG_CONSOLE_MUX=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_MISC_INIT_R=y
@@ -30,7 +31,6 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="ns2> "
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=1046
CONFIG_CMD_EEPROM=y
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=4
CONFIG_CMD_I2C=y
@@ -60,6 +60,7 @@
CONFIG_SYS_I2C_SLAVE=0x0
CONFIG_SYS_I2C_EEPROM_ADDR=0x50
# CONFIG_MMC is not set
+CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_MVGBE=y
diff --git a/configs/netspace_v2_defconfig b/configs/netspace_v2_defconfig
index bc81e94..1583a0a 100644
--- a/configs/netspace_v2_defconfig
+++ b/configs/netspace_v2_defconfig
@@ -23,6 +23,7 @@
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="dhcp && run netconsole; if run usbload || run diskload; then bootm; fi"
CONFIG_USE_PREBOOT=y
+CONFIG_SYS_PBSIZE=1046
CONFIG_CONSOLE_MUX=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_MISC_INIT_R=y
@@ -30,7 +31,6 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="ns2> "
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=1046
CONFIG_CMD_EEPROM=y
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=4
CONFIG_CMD_I2C=y
@@ -62,6 +62,7 @@
CONFIG_SYS_I2C_SLAVE=0x0
CONFIG_SYS_I2C_EEPROM_ADDR=0x50
# CONFIG_MMC is not set
+CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_MVGBE=y
diff --git a/configs/neu2-io-rv1126_defconfig b/configs/neu2-io-rv1126_defconfig
index 2fb5a84..dc27b9e 100644
--- a/configs/neu2-io-rv1126_defconfig
+++ b/configs/neu2-io-rv1126_defconfig
@@ -14,6 +14,7 @@
CONFIG_SYS_LOAD_ADDR=0xe00800
CONFIG_DEBUG_UART=y
CONFIG_FIT_VERBOSE=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_DEFAULT_FDT_FILE="rv1126-edgeble-neu2-io.dtb"
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
@@ -22,7 +23,6 @@
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
# CONFIG_CMD_BOOTD is not set
-CONFIG_SYS_BOOTM_LEN=0x4000000
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_XIMG is not set
diff --git a/configs/nitrogen6dl2g_defconfig b/configs/nitrogen6dl2g_defconfig
index 9d2bad4..4a69435 100644
--- a/configs/nitrogen6dl2g_defconfig
+++ b/configs/nitrogen6dl2g_defconfig
@@ -26,12 +26,12 @@
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run distro_bootcmd"
CONFIG_USE_PREBOOT=y
+CONFIG_SYS_PBSIZE=532
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_MISC_INIT_R=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_MEMTEST=y
CONFIG_SYS_ALT_MEMTEST=y
diff --git a/configs/nitrogen6dl_defconfig b/configs/nitrogen6dl_defconfig
index 3911aba..c7398a9 100644
--- a/configs/nitrogen6dl_defconfig
+++ b/configs/nitrogen6dl_defconfig
@@ -26,12 +26,12 @@
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run distro_bootcmd"
CONFIG_USE_PREBOOT=y
+CONFIG_SYS_PBSIZE=532
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_MISC_INIT_R=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_MEMTEST=y
CONFIG_SYS_ALT_MEMTEST=y
diff --git a/configs/nitrogen6q2g_defconfig b/configs/nitrogen6q2g_defconfig
index 9a88b34..8ea9736 100644
--- a/configs/nitrogen6q2g_defconfig
+++ b/configs/nitrogen6q2g_defconfig
@@ -26,12 +26,12 @@
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run distro_bootcmd"
CONFIG_USE_PREBOOT=y
+CONFIG_SYS_PBSIZE=532
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_MISC_INIT_R=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_MEMTEST=y
CONFIG_SYS_ALT_MEMTEST=y
diff --git a/configs/nitrogen6q_defconfig b/configs/nitrogen6q_defconfig
index d6c3cf0..a40f671 100644
--- a/configs/nitrogen6q_defconfig
+++ b/configs/nitrogen6q_defconfig
@@ -26,12 +26,12 @@
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run distro_bootcmd"
CONFIG_USE_PREBOOT=y
+CONFIG_SYS_PBSIZE=532
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_MISC_INIT_R=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_MEMTEST=y
CONFIG_SYS_ALT_MEMTEST=y
diff --git a/configs/nitrogen6s1g_defconfig b/configs/nitrogen6s1g_defconfig
index 821d428..a22ef93 100644
--- a/configs/nitrogen6s1g_defconfig
+++ b/configs/nitrogen6s1g_defconfig
@@ -26,12 +26,12 @@
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run distro_bootcmd"
CONFIG_USE_PREBOOT=y
+CONFIG_SYS_PBSIZE=532
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_MISC_INIT_R=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_MEMTEST=y
CONFIG_SYS_ALT_MEMTEST=y
diff --git a/configs/nitrogen6s_defconfig b/configs/nitrogen6s_defconfig
index 2e4db46..d30e6c5 100644
--- a/configs/nitrogen6s_defconfig
+++ b/configs/nitrogen6s_defconfig
@@ -26,12 +26,12 @@
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run distro_bootcmd"
CONFIG_USE_PREBOOT=y
+CONFIG_SYS_PBSIZE=532
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_MISC_INIT_R=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_MEMTEST=y
CONFIG_SYS_ALT_MEMTEST=y
diff --git a/configs/novena_defconfig b/configs/novena_defconfig
index 2389991..322689e 100644
--- a/configs/novena_defconfig
+++ b/configs/novena_defconfig
@@ -30,6 +30,7 @@
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttymxc1,115200 "
CONFIG_BOOTCOMMAND="run distro_bootcmd ; run net_nfs"
+CONFIG_SYS_PBSIZE=532
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_MISC_INIT_R=y
CONFIG_SPL_SYS_MALLOC=y
@@ -38,7 +39,6 @@
CONFIG_SPL_I2C=y
CONFIG_SPL_WATCHDOG=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_ASKENV=y
CONFIG_CMD_EEPROM=y
CONFIG_SYS_I2C_EEPROM_BUS=2
diff --git a/configs/nsa310s_defconfig b/configs/nsa310s_defconfig
index 038ef42..d252290 100644
--- a/configs/nsa310s_defconfig
+++ b/configs/nsa310s_defconfig
@@ -23,10 +23,10 @@
CONFIG_BOOTSTD_DEFAULTS=y
CONFIG_BOOTDELAY=3
CONFIG_USE_PREBOOT=y
+CONFIG_SYS_PBSIZE=1050
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_PROMPT="NSA310s> "
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=1050
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_NAND=y
CONFIG_CMD_SATA=y
diff --git a/configs/nsim_700_defconfig b/configs/nsim_700_defconfig
index e8782a1..be2539e 100644
--- a/configs/nsim_700_defconfig
+++ b/configs/nsim_700_defconfig
@@ -12,13 +12,13 @@
CONFIG_SYS_CLK_FREQ=70000000
CONFIG_SYS_LOAD_ADDR=0x82000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200n8"
-CONFIG_SYS_PROMPT="nsim# "
CONFIG_SYS_CBSIZE=256
CONFIG_SYS_PBSIZE=279
-CONFIG_SYS_BOOTM_LEN=0x2000000
+CONFIG_SYS_PROMPT="nsim# "
# CONFIG_CMD_SETEXPR is not set
CONFIG_OF_CONTROL=y
CONFIG_OF_EMBED=y
diff --git a/configs/nsim_700be_defconfig b/configs/nsim_700be_defconfig
index d04bf66..1fcf36a 100644
--- a/configs/nsim_700be_defconfig
+++ b/configs/nsim_700be_defconfig
@@ -13,13 +13,13 @@
CONFIG_SYS_CLK_FREQ=70000000
CONFIG_SYS_LOAD_ADDR=0x82000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200n8"
-CONFIG_SYS_PROMPT="nsim# "
CONFIG_SYS_CBSIZE=256
CONFIG_SYS_PBSIZE=279
-CONFIG_SYS_BOOTM_LEN=0x2000000
+CONFIG_SYS_PROMPT="nsim# "
# CONFIG_CMD_SETEXPR is not set
CONFIG_OF_CONTROL=y
CONFIG_OF_EMBED=y
diff --git a/configs/nsim_hs38_defconfig b/configs/nsim_hs38_defconfig
index 70a84ca..58819e0 100644
--- a/configs/nsim_hs38_defconfig
+++ b/configs/nsim_hs38_defconfig
@@ -13,14 +13,14 @@
CONFIG_SYS_CLK_FREQ=70000000
CONFIG_SYS_LOAD_ADDR=0x82000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200n8"
-CONFIG_BOARD_EARLY_INIT_R=y
-CONFIG_SYS_PROMPT="nsim# "
CONFIG_SYS_CBSIZE=256
CONFIG_SYS_PBSIZE=279
-CONFIG_SYS_BOOTM_LEN=0x2000000
+CONFIG_BOARD_EARLY_INIT_R=y
+CONFIG_SYS_PROMPT="nsim# "
CONFIG_CMD_DM=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
diff --git a/configs/nsim_hs38be_defconfig b/configs/nsim_hs38be_defconfig
index f94c66d..9c26e4d 100644
--- a/configs/nsim_hs38be_defconfig
+++ b/configs/nsim_hs38be_defconfig
@@ -14,13 +14,13 @@
CONFIG_SYS_CLK_FREQ=70000000
CONFIG_SYS_LOAD_ADDR=0x82000000
CONFIG_DEBUG_UART=y
+CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200n8"
-CONFIG_SYS_PROMPT="nsim# "
CONFIG_SYS_CBSIZE=256
CONFIG_SYS_PBSIZE=279
-CONFIG_SYS_BOOTM_LEN=0x2000000
+CONFIG_SYS_PROMPT="nsim# "
# CONFIG_CMD_SETEXPR is not set
CONFIG_OF_CONTROL=y
CONFIG_OF_EMBED=y
diff --git a/configs/nyan-big_defconfig b/configs/nyan-big_defconfig
index c144a08..2cf600b 100644
--- a/configs/nyan-big_defconfig
+++ b/configs/nyan-big_defconfig
@@ -24,6 +24,7 @@
CONFIG_SPL_BOOTSTAGE=y
CONFIG_BOOTSTAGE_STASH=y
CONFIG_OF_SYSTEM_SETUP=y
+CONFIG_SYS_PBSIZE=2087
CONFIG_SYS_STDIO_DEREGISTER=y
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SPL_FOOTPRINT_LIMIT=y
@@ -35,7 +36,6 @@
CONFIG_SPL_SYS_MALLOC_SIZE=0x10000
CONFIG_SYS_PROMPT="Tegra124 (Nyan-big) # "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=2087
# CONFIG_CMD_IMI is not set
CONFIG_CMD_DFU=y
CONFIG_CMD_GPIO=y
@@ -61,7 +61,6 @@
CONFIG_ENV_OVERWRITE=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_MMC_ENV_PART=2
-CONFIG_SPL_DM=y
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
CONFIG_DFU_SF=y
diff --git a/configs/o4-imx6ull-nano_defconfig b/configs/o4-imx6ull-nano_defconfig
index a94828b..f939326 100644
--- a/configs/o4-imx6ull-nano_defconfig
+++ b/configs/o4-imx6ull-nano_defconfig
@@ -8,9 +8,9 @@
CONFIG_MT41K256M16HA_125E=y
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_IMX_MODULE_FUSE=y
+CONFIG_SYS_PBSIZE=532
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEMTEST=y
diff --git a/configs/oceanic_5205_5inmfd_defconfig b/configs/oceanic_5205_5inmfd_defconfig
index 6cdcf78..2e62f8e 100644
--- a/configs/oceanic_5205_5inmfd_defconfig
+++ b/configs/oceanic_5205_5inmfd_defconfig
@@ -8,6 +8,7 @@
CONFIG_DRAM_ZQ=3881949
CONFIG_SPL_SPI_SUNXI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_MTD=y
CONFIG_SUN8I_EMAC=y
CONFIG_SPI=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/octeon_ebb7304_defconfig b/configs/octeon_ebb7304_defconfig
index 24f4038..00fcd57 100644
--- a/configs/octeon_ebb7304_defconfig
+++ b/configs/octeon_ebb7304_defconfig
@@ -16,12 +16,12 @@
CONFIG_PCI=y
CONFIG_DEBUG_UART=y
CONFIG_OF_BOARD_FIXUP=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_BOARD_LATE_INIT=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=276
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
@@ -48,7 +48,6 @@
CONFIG_MISC=y
CONFIG_MMC=y
CONFIG_MMC_OCTEONTX=y
-CONFIG_MTD=y
CONFIG_DM_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_SHOW_PROGRESS=0
diff --git a/configs/octeon_nic23_defconfig b/configs/octeon_nic23_defconfig
index 455c3b2..8bf2520 100644
--- a/configs/octeon_nic23_defconfig
+++ b/configs/octeon_nic23_defconfig
@@ -19,6 +19,9 @@
CONFIG_DEBUG_UART=y
CONFIG_AHCI=y
CONFIG_OF_BOARD_FIXUP=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y
# CONFIG_SYS_DEVICE_NULLDEV is not set
CONFIG_CYCLIC=y
@@ -28,9 +31,6 @@
CONFIG_BOARD_LATE_INIT=y
CONFIG_LAST_STAGE_INIT=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=276
-CONFIG_SYS_BOOTM_LEN=0x4000000
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
@@ -56,7 +56,6 @@
CONFIG_MISC=y
CONFIG_MMC=y
CONFIG_MMC_OCTEONTX=y
-CONFIG_MTD=y
CONFIG_DM_MTD=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y
@@ -72,7 +71,6 @@
CONFIG_RAM=y
CONFIG_RAM_OCTEON=y
CONFIG_RAM_OCTEON_DDR4=y
-CONFIG_SCSI=y
CONFIG_DEBUG_UART_SHIFT=3
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_SYS_NS16550=y
diff --git a/configs/octeontx2_95xx_defconfig b/configs/octeontx2_95xx_defconfig
index 1dc7a49..ed0b678 100644
--- a/configs/octeontx2_95xx_defconfig
+++ b/configs/octeontx2_95xx_defconfig
@@ -23,6 +23,7 @@
CONFIG_SYS_MEMTEST_END=0x040f0000
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
+CONFIG_SYS_BOOTM_LEN=0x10000000
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_BOOTDELAY=5
CONFIG_BOOT_RETRY=y
@@ -32,13 +33,12 @@
CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyAMA0,115200n8 earlycon=pl011,0x87e028000000 maxcpus=6 rootwait rw root=/dev/mmcblk0p2 coherent_pool=16M"
+CONFIG_SYS_PBSIZE=1050
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Marvell> "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=1050
-CONFIG_SYS_BOOTM_LEN=0x10000000
# CONFIG_CMD_BOOTEFI_HELLO_COMPILE is not set
CONFIG_CMD_MD5SUM=y
CONFIG_MD5SUM_VERIFY=y
diff --git a/configs/octeontx2_96xx_defconfig b/configs/octeontx2_96xx_defconfig
index e14370b..d09e948 100644
--- a/configs/octeontx2_96xx_defconfig
+++ b/configs/octeontx2_96xx_defconfig
@@ -23,6 +23,7 @@
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
+CONFIG_SYS_BOOTM_LEN=0x10000000
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_BOOTDELAY=5
CONFIG_BOOT_RETRY=y
@@ -32,13 +33,12 @@
CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyAMA0,115200n8 earlycon=pl011,0x87e028000000 maxcpus=24 rootwait rw root=/dev/mmcblk0p2 coherent_pool=16M"
+CONFIG_SYS_PBSIZE=1050
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Marvell> "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=1050
-CONFIG_SYS_BOOTM_LEN=0x10000000
# CONFIG_CMD_BOOTEFI_HELLO_COMPILE is not set
CONFIG_CMD_MD5SUM=y
CONFIG_MD5SUM_VERIFY=y
@@ -120,7 +120,6 @@
CONFIG_DM_REGULATOR_GPIO=y
CONFIG_DM_RTC=y
CONFIG_SCSI=y
-CONFIG_DM_SCSI=y
CONFIG_DM_SERIAL=y
CONFIG_DEBUG_UART_SKIP_INIT=y
CONFIG_PL01X_SERIAL=y
diff --git a/configs/octeontx_81xx_defconfig b/configs/octeontx_81xx_defconfig
index 3d092f2..3113d37 100644
--- a/configs/octeontx_81xx_defconfig
+++ b/configs/octeontx_81xx_defconfig
@@ -24,6 +24,7 @@
CONFIG_SYS_MEMTEST_END=0x28f0000
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
+CONFIG_SYS_BOOTM_LEN=0x10000000
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_BOOTDELAY=5
CONFIG_BOOT_RETRY=y
@@ -33,13 +34,12 @@
CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyAMA0,115200n8 earlycon=pl011,0x87e028000000 maxcpus=4 rootwait rw root=/dev/sda2 coherent_pool=16M"
+CONFIG_SYS_PBSIZE=1050
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Marvell> "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=1050
-CONFIG_SYS_BOOTM_LEN=0x10000000
# CONFIG_CMD_BOOTEFI_HELLO_COMPILE is not set
CONFIG_CMD_MD5SUM=y
CONFIG_MD5SUM_VERIFY=y
@@ -122,7 +122,6 @@
CONFIG_DM_REGULATOR_GPIO=y
CONFIG_DM_RTC=y
CONFIG_SCSI=y
-CONFIG_DM_SCSI=y
CONFIG_DM_SERIAL=y
CONFIG_DEBUG_UART_SKIP_INIT=y
CONFIG_PL01X_SERIAL=y
diff --git a/configs/octeontx_83xx_defconfig b/configs/octeontx_83xx_defconfig
index d54cb6b..d0d6edb 100644
--- a/configs/octeontx_83xx_defconfig
+++ b/configs/octeontx_83xx_defconfig
@@ -22,6 +22,7 @@
CONFIG_AHCI=y
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
+CONFIG_SYS_BOOTM_LEN=0x10000000
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_BOOTDELAY=5
CONFIG_BOOT_RETRY=y
@@ -31,13 +32,12 @@
CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyAMA0,115200n8 earlycon=pl011,0x87e028000000 maxcpus=24 rootwait rw root=/dev/sda2 coherent_pool=16M"
+CONFIG_SYS_PBSIZE=1050
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Marvell> "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=1050
-CONFIG_SYS_BOOTM_LEN=0x10000000
# CONFIG_CMD_BOOTEFI_HELLO_COMPILE is not set
CONFIG_CMD_MD5SUM=y
CONFIG_MD5SUM_VERIFY=y
@@ -119,7 +119,6 @@
CONFIG_DM_REGULATOR_GPIO=y
CONFIG_DM_RTC=y
CONFIG_SCSI=y
-CONFIG_DM_SCSI=y
CONFIG_DM_SERIAL=y
CONFIG_DEBUG_UART_SKIP_INIT=y
CONFIG_PL01X_SERIAL=y
diff --git a/configs/odroid-go-ultra_defconfig b/configs/odroid-go-ultra_defconfig
index bc0bf9b..49d628b 100644
--- a/configs/odroid-go-ultra_defconfig
+++ b/configs/odroid-go-ultra_defconfig
@@ -63,6 +63,7 @@
CONFIG_SYSINFO=y
CONFIG_SYSINFO_SMBIOS=y
CONFIG_USB=y
+CONFIG_DM_USB_GADGET=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_DWC3=y
diff --git a/configs/odroid-hc4_defconfig b/configs/odroid-hc4_defconfig
index 4316811..7720ab5 100644
--- a/configs/odroid-hc4_defconfig
+++ b/configs/odroid-hc4_defconfig
@@ -67,7 +67,6 @@
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
CONFIG_SCSI=y
-CONFIG_DM_SCSI=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_DEBUG_UART_SKIP_INIT=y
CONFIG_MESON_SERIAL=y
diff --git a/configs/odroid-m1-rk3568_defconfig b/configs/odroid-m1-rk3568_defconfig
index 96b4e9e..3130e34 100644
--- a/configs/odroid-m1-rk3568_defconfig
+++ b/configs/odroid-m1-rk3568_defconfig
@@ -77,7 +77,6 @@
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_ROCKCHIP=y
-CONFIG_MTD=y
CONFIG_SF_DEFAULT_BUS=4
CONFIG_SPI_FLASH_SFDP_SUPPORT=y
CONFIG_SPI_FLASH_MACRONIX=y
@@ -96,7 +95,6 @@
CONFIG_PWM_ROCKCHIP=y
CONFIG_SPL_RAM=y
CONFIG_SCSI=y
-CONFIG_DM_SCSI=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550_MEM32=y
diff --git a/configs/odroid-xu3_defconfig b/configs/odroid-xu3_defconfig
index 718ec96..c80900e 100644
--- a/configs/odroid-xu3_defconfig
+++ b/configs/odroid-xu3_defconfig
@@ -20,6 +20,7 @@
CONFIG_FIT=y
CONFIG_FIT_BEST_MATCH=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_PBSIZE=1024
CONFIG_SILENT_CONSOLE=y
CONFIG_CONSOLE_MUX=y
CONFIG_BOARD_TYPES=y
@@ -28,7 +29,6 @@
CONFIG_BOARD_LATE_INIT=y
CONFIG_MISC_INIT_R=y
CONFIG_SYS_PROMPT="ODROID-XU3 # "
-CONFIG_SYS_PBSIZE=1024
CONFIG_CMD_THOR_DOWNLOAD=y
CONFIG_CMD_DFU=y
CONFIG_CMD_GPIO=y
@@ -54,7 +54,6 @@
CONFIG_SYS_I2C_S3C24X0=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_MMC_DW=y
-CONFIG_MTD=y
CONFIG_SMC911X=y
CONFIG_DM_PMIC=y
CONFIG_PMIC_S2MPS11=y
diff --git a/configs/odroid_defconfig b/configs/odroid_defconfig
index 031c6f9..fab41bd 100644
--- a/configs/odroid_defconfig
+++ b/configs/odroid_defconfig
@@ -25,13 +25,13 @@
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="Please use defined boot"
CONFIG_BOOTCOMMAND="run distro_bootcmd ; run autoboot"
+CONFIG_SYS_PBSIZE=1024
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_BOARD_TYPES=y
CONFIG_BOARD_LATE_INIT=y
CONFIG_MISC_INIT_R=y
CONFIG_SYS_PROMPT="Odroid # "
-CONFIG_SYS_PBSIZE=1024
# CONFIG_CMD_XIMG is not set
CONFIG_CMD_THOR_DOWNLOAD=y
CONFIG_CMD_DFU=y
@@ -58,7 +58,6 @@
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_S5P=y
-CONFIG_MTD=y
CONFIG_DM_PMIC=y
CONFIG_DM_PMIC_MAX77686=y
CONFIG_DM_REGULATOR=y
diff --git a/configs/omap35_logic_defconfig b/configs/omap35_logic_defconfig
index 5040af0..358a8ee 100644
--- a/configs/omap35_logic_defconfig
+++ b/configs/omap35_logic_defconfig
@@ -22,6 +22,7 @@
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="setenv preboot;saveenv;"
CONFIG_DEFAULT_FDT_FILE="logicpd-torpedo-35xx-devkit.dtb"
+CONFIG_SYS_PBSIZE=1054
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_SPL_MAX_SIZE=0xec00
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
@@ -44,7 +45,6 @@
CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS=0x200
CONFIG_SYS_PROMPT="OMAP Logic # "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=1054
# CONFIG_CMD_IMI is not set
CONFIG_CMD_SPL=y
CONFIG_CMD_SPL_NAND_OFS=0x240000
diff --git a/configs/omap35_logic_somlv_defconfig b/configs/omap35_logic_somlv_defconfig
index 1ea35c7..c11bfd1 100644
--- a/configs/omap35_logic_somlv_defconfig
+++ b/configs/omap35_logic_somlv_defconfig
@@ -23,6 +23,7 @@
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="setenv preboot;saveenv;"
CONFIG_DEFAULT_FDT_FILE="logicpd-som-lv-35xx-devkit.dtb"
+CONFIG_SYS_PBSIZE=1054
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_SPL_MAX_SIZE=0xec00
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
@@ -46,7 +47,6 @@
# CONFIG_SPL_POWER is not set
CONFIG_SYS_PROMPT="OMAP Logic # "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=1054
# CONFIG_CMD_IMI is not set
CONFIG_CMD_SPL=y
CONFIG_CMD_SPL_NAND_OFS=0x240000
diff --git a/configs/omap3_beagle_defconfig b/configs/omap3_beagle_defconfig
index c8c9ae0..a19a49a 100644
--- a/configs/omap3_beagle_defconfig
+++ b/configs/omap3_beagle_defconfig
@@ -16,6 +16,7 @@
CONFIG_BOOTCOMMAND="run findfdt; run distro_bootcmd"
CONFIG_USE_PREBOOT=y
CONFIG_DEFAULT_FDT_FILE="omap3-beagle.dtb"
+CONFIG_SYS_PBSIZE=1055
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_SPL_MAX_SIZE=0xec00
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
@@ -29,7 +30,6 @@
CONFIG_SPL_NAND_BASE=y
CONFIG_SYS_PROMPT="BeagleBoard # "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=1055
CONFIG_CMD_SPL=y
CONFIG_CMD_SPL_NAND_OFS=0x280000
CONFIG_CMD_SPL_WRITE_SIZE=0x20000
diff --git a/configs/omap3_evm_defconfig b/configs/omap3_evm_defconfig
index 93427f3..c1a2a4f 100644
--- a/configs/omap3_evm_defconfig
+++ b/configs/omap3_evm_defconfig
@@ -16,6 +16,7 @@
CONFIG_BOOTCOMMAND="if test ${boot_fit} -eq 1; then setenv boot mmc; setenv addr_fit 0x8b000000; run update_to_fit; run mmcboot; fi; run envboot; run distro_bootcmd"
CONFIG_USE_PREBOOT=y
CONFIG_DEFAULT_FDT_FILE="omap3-evm.dtb"
+CONFIG_SYS_PBSIZE=1053
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_SPL_MAX_SIZE=0xec00
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
@@ -29,7 +30,6 @@
CONFIG_SPL_NAND_BASE=y
CONFIG_SYS_PROMPT="OMAP3_EVM # "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=1053
CONFIG_CMD_SPL=y
CONFIG_CMD_SPL_NAND_OFS=0x280000
CONFIG_CMD_SPL_WRITE_SIZE=0x20000
diff --git a/configs/omap3_logic_defconfig b/configs/omap3_logic_defconfig
index 729586b..489bd2c 100644
--- a/configs/omap3_logic_defconfig
+++ b/configs/omap3_logic_defconfig
@@ -21,6 +21,7 @@
CONFIG_BOOTCOMMAND="run autoboot"
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="setenv preboot;saveenv;"
+CONFIG_SYS_PBSIZE=1054
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_SPL_MAX_SIZE=0xec00
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
@@ -43,7 +44,6 @@
CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS=0x200
CONFIG_SYS_PROMPT="OMAP Logic # "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=1054
# CONFIG_CMD_IMI is not set
CONFIG_CMD_SPL=y
CONFIG_CMD_SPL_NAND_OFS=0x240000
diff --git a/configs/omap3_logic_somlv_defconfig b/configs/omap3_logic_somlv_defconfig
index f0f326d..a292230 100644
--- a/configs/omap3_logic_somlv_defconfig
+++ b/configs/omap3_logic_somlv_defconfig
@@ -23,6 +23,7 @@
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="setenv preboot;saveenv;"
CONFIG_DEFAULT_FDT_FILE="logicpd-som-lv-37xx-devkit.dtb"
+CONFIG_SYS_PBSIZE=1054
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_SPL_MAX_SIZE=0xec00
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
@@ -46,7 +47,6 @@
# CONFIG_SPL_POWER is not set
CONFIG_SYS_PROMPT="OMAP Logic # "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=1054
# CONFIG_CMD_IMI is not set
CONFIG_CMD_SPL=y
CONFIG_CMD_SPL_NAND_OFS=0x240000
diff --git a/configs/openpiton_riscv64_defconfig b/configs/openpiton_riscv64_defconfig
index 2b335ae..3a8e2d9 100644
--- a/configs/openpiton_riscv64_defconfig
+++ b/configs/openpiton_riscv64_defconfig
@@ -16,19 +16,19 @@
CONFIG_ENV_VARS_UBOOT_CONFIG=y
# CONFIG_EXPERT is not set
# CONFIG_LEGACY_IMAGE_FORMAT is not set
+CONFIG_SYS_BOOTM_LEN=0x10000000
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="fdt addr ${fdtcontroladdr}; fdt move ${fdtcontroladdr} ${fdt_addr_r}; load mmc ${mmcdev}:${mmcpart} ${kernel_addr_r} ${image}; booti ${kernel_addr_r} - ${fdt_addr_r}; "
-CONFIG_SYS_PROMPT="openpiton$ "
CONFIG_SYS_CBSIZE=256
CONFIG_SYS_PBSIZE=284
+CONFIG_SYS_PROMPT="openpiton$ "
# CONFIG_CMD_CPU is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_BOOTM_NETBSD is not set
# CONFIG_BOOTM_PLAN9 is not set
# CONFIG_BOOTM_RTEMS is not set
# CONFIG_BOOTM_VXWORKS is not set
-CONFIG_SYS_BOOTM_LEN=0x10000000
# CONFIG_CMD_RUN is not set
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_XIMG is not set
@@ -43,7 +43,6 @@
# CONFIG_CMD_UNZIP is not set
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPT=y
-# CONFIG_RANDOM_UUID is not set
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_LSBLK=y
@@ -75,6 +74,7 @@
CONFIG_DM_RTC=y
CONFIG_SYS_NS16550=y
CONFIG_FS_SQUASHFS=y
+# CONFIG_RANDOM_UUID is not set
CONFIG_SHA1=y
CONFIG_SHA256=y
CONFIG_MD5=y
diff --git a/configs/openpiton_riscv64_spl_defconfig b/configs/openpiton_riscv64_spl_defconfig
index c0ec9ed..622295c 100644
--- a/configs/openpiton_riscv64_spl_defconfig
+++ b/configs/openpiton_riscv64_spl_defconfig
@@ -21,9 +21,12 @@
CONFIG_ENV_VARS_UBOOT_CONFIG=y
# CONFIG_EXPERT is not set
# CONFIG_LEGACY_IMAGE_FORMAT is not set
+CONFIG_SYS_BOOTM_LEN=0x10000000
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="fdt addr ${fdtcontroladdr}; fdt move ${fdtcontroladdr} ${fdt_addr_r}; load mmc ${mmcdev}:${mmcpart} ${kernel_addr_r} ${image}; booti ${kernel_addr_r} - ${fdt_addr_r}; "
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=284
CONFIG_SPL_MAX_SIZE=0x100000
CONFIG_SPL_BSS_START_ADDR=0x82000000
# CONFIG_SPL_LEGACY_IMAGE_FORMAT is not set
@@ -36,15 +39,12 @@
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="boot/fw_payload.bin"
CONFIG_SPL_RTC=y
CONFIG_SYS_PROMPT="openpiton$ "
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=284
# CONFIG_CMD_CPU is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_BOOTM_NETBSD is not set
# CONFIG_BOOTM_PLAN9 is not set
# CONFIG_BOOTM_RTEMS is not set
# CONFIG_BOOTM_VXWORKS is not set
-CONFIG_SYS_BOOTM_LEN=0x10000000
# CONFIG_CMD_RUN is not set
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_XIMG is not set
@@ -59,7 +59,6 @@
# CONFIG_CMD_UNZIP is not set
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPT=y
-# CONFIG_RANDOM_UUID is not set
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_LSBLK=y
@@ -91,6 +90,7 @@
CONFIG_DM_RTC=y
CONFIG_SYS_NS16550=y
CONFIG_FS_SQUASHFS=y
+# CONFIG_RANDOM_UUID is not set
CONFIG_SPL_TINY_MEMSET=y
CONFIG_SHA1=y
CONFIG_SHA256=y
diff --git a/configs/opos6uldev_defconfig b/configs/opos6uldev_defconfig
index 6a91b12..ac4170d 100644
--- a/configs/opos6uldev_defconfig
+++ b/configs/opos6uldev_defconfig
@@ -30,6 +30,7 @@
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="run check_env"
CONFIG_DEFAULT_FDT_FILE="imx6ul-opos6uldev.dtb"
+CONFIG_SYS_PBSIZE=535
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SPL_BOARD_INIT=y
@@ -40,7 +41,6 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="BIOS> "
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=535
CONFIG_CMD_CONFIG=y
CONFIG_CMD_LICENSE=y
CONFIG_CMD_BOOTZ=y
diff --git a/configs/orangepi-5-plus-rk3588_defconfig b/configs/orangepi-5-plus-rk3588_defconfig
index 0473699..a58f96d 100644
--- a/configs/orangepi-5-plus-rk3588_defconfig
+++ b/configs/orangepi-5-plus-rk3588_defconfig
@@ -14,6 +14,7 @@
CONFIG_DEFAULT_DEVICE_TREE="rk3588-orangepi-5-plus"
CONFIG_ROCKCHIP_RK3588=y
CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y
+CONFIG_ROCKCHIP_SPI_IMAGE=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK_R_ADDR=0x600000
CONFIG_TARGET_EVB_RK3588=y
@@ -87,14 +88,12 @@
CONFIG_PWM_ROCKCHIP=y
CONFIG_SPL_RAM=y
CONFIG_SCSI=y
-CONFIG_DM_SCSI=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550_MEM32=y
CONFIG_ROCKCHIP_SFC=y
CONFIG_SYSRESET=y
CONFIG_USB=y
-CONFIG_DM_USB_GADGET=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
diff --git a/configs/orangepi-5-rk3588s_defconfig b/configs/orangepi-5-rk3588s_defconfig
index feb45a5..a9404c9 100644
--- a/configs/orangepi-5-rk3588s_defconfig
+++ b/configs/orangepi-5-rk3588s_defconfig
@@ -13,6 +13,7 @@
CONFIG_DEFAULT_DEVICE_TREE="rk3588s-orangepi-5"
CONFIG_ROCKCHIP_RK3588=y
CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y
+CONFIG_ROCKCHIP_SPI_IMAGE=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK_R_ADDR=0x600000
CONFIG_TARGET_EVB_RK3588=y
@@ -84,14 +85,12 @@
CONFIG_PWM_ROCKCHIP=y
CONFIG_SPL_RAM=y
CONFIG_SCSI=y
-CONFIG_DM_SCSI=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550_MEM32=y
CONFIG_ROCKCHIP_SFC=y
CONFIG_SYSRESET=y
CONFIG_USB=y
-CONFIG_DM_USB_GADGET=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
diff --git a/configs/orangepi-r1-plus-lts-rk3328_defconfig b/configs/orangepi-r1-plus-lts-rk3328_defconfig
index 0ea45df..d3d9417 100644
--- a/configs/orangepi-r1-plus-lts-rk3328_defconfig
+++ b/configs/orangepi-r1-plus-lts-rk3328_defconfig
@@ -71,6 +71,7 @@
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MISC=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_SPI_FLASH_GIGADEVICE=y
@@ -99,7 +100,6 @@
# CONFIG_TPL_SYSRESET is not set
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_OHCI_HCD=y
@@ -107,6 +107,7 @@
CONFIG_USB_DWC2=y
CONFIG_USB_DWC3=y
# CONFIG_USB_DWC3_GADGET is not set
+CONFIG_USB_DWC3_GENERIC=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_DWC2_OTG=y
CONFIG_SPL_TINY_MEMSET=y
diff --git a/configs/orangepi-r1-plus-rk3328_defconfig b/configs/orangepi-r1-plus-rk3328_defconfig
index e3d7f0b..9356e87 100644
--- a/configs/orangepi-r1-plus-rk3328_defconfig
+++ b/configs/orangepi-r1-plus-rk3328_defconfig
@@ -71,6 +71,7 @@
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MISC=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_SPI_FLASH_GIGADEVICE=y
@@ -99,7 +100,6 @@
# CONFIG_TPL_SYSRESET is not set
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_OHCI_HCD=y
@@ -107,6 +107,7 @@
CONFIG_USB_DWC2=y
CONFIG_USB_DWC3=y
# CONFIG_USB_DWC3_GADGET is not set
+CONFIG_USB_DWC3_GENERIC=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_DWC2_OTG=y
CONFIG_SPL_TINY_MEMSET=y
diff --git a/configs/orangepi-rk3399_defconfig b/configs/orangepi-rk3399_defconfig
index ba6d91e..27add8a 100644
--- a/configs/orangepi-rk3399_defconfig
+++ b/configs/orangepi-rk3399_defconfig
@@ -40,6 +40,7 @@
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MISC=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MMC_SDHCI=y
@@ -56,9 +57,10 @@
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
CONFIG_USB_HOST_ETHER=y
CONFIG_USB_ETHER_ASIX=y
CONFIG_USB_ETHER_ASIX88179=y
diff --git a/configs/orangepi_pc2_defconfig b/configs/orangepi_pc2_defconfig
index fb6fbaf..24ab0a0 100644
--- a/configs/orangepi_pc2_defconfig
+++ b/configs/orangepi_pc2_defconfig
@@ -10,6 +10,7 @@
CONFIG_SPL_I2C=y
CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_MTD=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SUN8I_EMAC=y
CONFIG_SY8106A_POWER=y
diff --git a/configs/orangepi_r1_defconfig b/configs/orangepi_r1_defconfig
index 4496aa4..2d8a525 100644
--- a/configs/orangepi_r1_defconfig
+++ b/configs/orangepi_r1_defconfig
@@ -8,6 +8,7 @@
CONFIG_SPL_SPI_SUNXI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_CONSOLE_MUX=y
+CONFIG_MTD=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_SUN8I_EMAC=y
CONFIG_SPI=y
diff --git a/configs/orangepi_win_defconfig b/configs/orangepi_win_defconfig
index 3ddaf05..4ce36cb 100644
--- a/configs/orangepi_win_defconfig
+++ b/configs/orangepi_win_defconfig
@@ -5,6 +5,7 @@
CONFIG_MACH_SUN50I=y
CONFIG_SPL_SPI_SUNXI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_MTD=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_PHY_REALTEK=y
CONFIG_SUN8I_EMAC=y
diff --git a/configs/orangepi_zero2_defconfig b/configs/orangepi_zero2_defconfig
index f13735e..c4e4f8b 100644
--- a/configs/orangepi_zero2_defconfig
+++ b/configs/orangepi_zero2_defconfig
@@ -8,6 +8,7 @@
CONFIG_DRAM_SUN50I_H616_TPR10=0xf83438
CONFIG_MACH_SUN50I_H616=y
CONFIG_SUNXI_DRAM_H616_DDR3_1333=y
+CONFIG_USB1_VBUS_PIN="PC16"
CONFIG_R_I2C_ENABLE=y
CONFIG_SPL_SPI_SUNXI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
@@ -16,9 +17,11 @@
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SYS_I2C_SLAVE=0x7f
CONFIG_SYS_I2C_SPEED=400000
+CONFIG_MTD=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_PHY_REALTEK=y
CONFIG_SUN8I_EMAC=y
+CONFIG_AXP305_POWER=y
CONFIG_SPI=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
diff --git a/configs/orangepi_zero3_defconfig b/configs/orangepi_zero3_defconfig
new file mode 100644
index 0000000..44b7ec7
--- /dev/null
+++ b/configs/orangepi_zero3_defconfig
@@ -0,0 +1,33 @@
+CONFIG_ARM=y
+CONFIG_ARCH_SUNXI=y
+CONFIG_DEFAULT_DEVICE_TREE="sun50i-h618-orangepi-zero3"
+CONFIG_SPL=y
+CONFIG_DRAM_SUN50I_H616_DX_ODT=0x07070707
+CONFIG_DRAM_SUN50I_H616_DX_DRI=0x0e0e0e0e
+CONFIG_DRAM_SUN50I_H616_CA_DRI=0x0e0e
+CONFIG_DRAM_SUN50I_H616_ODT_EN=0xaaaaeeee
+CONFIG_DRAM_SUN50I_H616_TPR6=0x44000000
+CONFIG_DRAM_SUN50I_H616_TPR10=0x402f6663
+CONFIG_DRAM_SUN50I_H616_TPR11=0x24242624
+CONFIG_DRAM_SUN50I_H616_TPR12=0x0f0f100f
+CONFIG_MACH_SUN50I_H616=y
+CONFIG_SUNXI_DRAM_H616_LPDDR4=y
+CONFIG_DRAM_CLK=792
+CONFIG_USB1_VBUS_PIN="PC16"
+CONFIG_R_I2C_ENABLE=y
+CONFIG_SPL_SPI_SUNXI=y
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SPL_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
+CONFIG_MTD=y
+CONFIG_SPI_FLASH_ZBIT=y
+CONFIG_PHY_MOTORCOMM=y
+CONFIG_SUN8I_EMAC=y
+CONFIG_AXP313_POWER=y
+CONFIG_SPI=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_MUSB_GADGET=y
diff --git a/configs/orangepi_zero_defconfig b/configs/orangepi_zero_defconfig
index f7f3bfb..abdf9a9 100644
--- a/configs/orangepi_zero_defconfig
+++ b/configs/orangepi_zero_defconfig
@@ -8,6 +8,7 @@
CONFIG_SPL_SPI_SUNXI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_CONSOLE_MUX=y
+CONFIG_MTD=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_SUN8I_EMAC=y
diff --git a/configs/origen_defconfig b/configs/origen_defconfig
index 3a71d6e..dc9285d 100644
--- a/configs/origen_defconfig
+++ b/configs/origen_defconfig
@@ -22,33 +22,32 @@
CONFIG_SYS_LOAD_ADDR=0x43e00000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTCOMMAND="if mmc rescan; then echo SD/MMC found on device ${mmcdev};if run loadbootenv; then echo Loaded environment from ${bootenv};run importbootenv;fi;if test -n $uenvcmd; then echo Running uenvcmd ...;run uenvcmd;fi;if run loadbootscript; then run bootscript; fi; fi;load mmc ${mmcdev} ${loadaddr} uImage; bootm ${loadaddr} "
+CONFIG_SYS_PBSIZE=1024
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_SPL_FRAMEWORK is not set
CONFIG_SPL_FOOTPRINT_LIMIT=y
CONFIG_SPL_MAX_FOOTPRINT=0x3800
CONFIG_SYS_PROMPT="ORIGEN # "
-CONFIG_SYS_PBSIZE=1024
# CONFIG_CMD_XIMG is not set
CONFIG_CMD_THOR_DOWNLOAD=y
CONFIG_CMD_DFU=y
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB_MASS_STORAGE=y
-# CONFIG_CMD_NET is not set
CONFIG_CMD_CACHE=y
# CONFIG_CMD_SLEEP is not set
CONFIG_CMD_EXT4_WRITE=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_OVERWRITE=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+# CONFIG_NET is not set
CONFIG_DFU_MMC=y
CONFIG_SYS_DFU_DATA_BUF_SIZE=0x2000000
CONFIG_MMC_DW=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_S5P=y
-CONFIG_MTD=y
CONFIG_USB=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_MANUFACTURER="Samsung"
diff --git a/configs/p212_defconfig b/configs/p212_defconfig
index b90391d..6b73607 100644
--- a/configs/p212_defconfig
+++ b/configs/p212_defconfig
@@ -40,7 +40,7 @@
CONFIG_DM_MDIO=y
CONFIG_DM_MDIO_MUX=y
CONFIG_ETH_DESIGNWARE_MESON8B=y
-CONFIG_MDIO_MUX_MMIOREG=y
+CONFIG_MDIO_MUX_MESON_GXL=y
CONFIG_MESON_GXL_USB_PHY=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_MESON_GXL=y
diff --git a/configs/p2371-0000_defconfig b/configs/p2371-0000_defconfig
index 188c236..6404868 100644
--- a/configs/p2371-0000_defconfig
+++ b/configs/p2371-0000_defconfig
@@ -11,13 +11,13 @@
CONFIG_TEGRA210=y
CONFIG_TEGRA_GPU=y
CONFIG_SYS_LOAD_ADDR=0x80080000
+CONFIG_SYS_BOOTM_LEN=0x800000
CONFIG_OF_SYSTEM_SETUP=y
+CONFIG_SYS_PBSIZE=2089
CONFIG_CONSOLE_MUX=y
CONFIG_SYS_STDIO_DEREGISTER=y
CONFIG_SYS_PROMPT="Tegra210 (P2371-0000) # "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=2089
-CONFIG_SYS_BOOTM_LEN=0x800000
# CONFIG_CMD_IMI is not set
CONFIG_CMD_DFU=y
CONFIG_CMD_GPIO=y
diff --git a/configs/p2371-2180_defconfig b/configs/p2371-2180_defconfig
index 027e1be..75dc076 100644
--- a/configs/p2371-2180_defconfig
+++ b/configs/p2371-2180_defconfig
@@ -15,14 +15,14 @@
CONFIG_TEGRA_GPU=y
CONFIG_SYS_LOAD_ADDR=0x80080000
CONFIG_PCI=y
+CONFIG_SYS_BOOTM_LEN=0x800000
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_SYSTEM_SETUP=y
+CONFIG_SYS_PBSIZE=2089
CONFIG_CONSOLE_MUX=y
CONFIG_SYS_STDIO_DEREGISTER=y
CONFIG_SYS_PROMPT="Tegra210 (P2371-2180) # "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=2089
-CONFIG_SYS_BOOTM_LEN=0x800000
# CONFIG_CMD_IMI is not set
CONFIG_CMD_DFU=y
CONFIG_CMD_GPIO=y
diff --git a/configs/p2571_defconfig b/configs/p2571_defconfig
index dc955cc..b2f1da6 100644
--- a/configs/p2571_defconfig
+++ b/configs/p2571_defconfig
@@ -12,13 +12,13 @@
CONFIG_TARGET_P2571=y
CONFIG_TEGRA_GPU=y
CONFIG_SYS_LOAD_ADDR=0x80080000
+CONFIG_SYS_BOOTM_LEN=0x800000
CONFIG_OF_SYSTEM_SETUP=y
+CONFIG_SYS_PBSIZE=2084
CONFIG_CONSOLE_MUX=y
CONFIG_SYS_STDIO_DEREGISTER=y
CONFIG_SYS_PROMPT="Tegra210 (P2571) # "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=2084
-CONFIG_SYS_BOOTM_LEN=0x800000
# CONFIG_CMD_IMI is not set
CONFIG_CMD_DFU=y
CONFIG_CMD_GPIO=y
diff --git a/configs/p2771-0000-000_defconfig b/configs/p2771-0000-000_defconfig
index a0fdbcc..4249240 100644
--- a/configs/p2771-0000-000_defconfig
+++ b/configs/p2771-0000-000_defconfig
@@ -11,14 +11,14 @@
CONFIG_TEGRA186=y
CONFIG_SYS_LOAD_ADDR=0x80080000
CONFIG_PCI=y
+CONFIG_SYS_BOOTM_LEN=0x800000
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_SYSTEM_SETUP=y
+CONFIG_SYS_PBSIZE=2093
CONFIG_CONSOLE_MUX=y
CONFIG_SYS_STDIO_DEREGISTER=y
CONFIG_SYS_PROMPT="Tegra186 (P2771-0000-000) # "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=2093
-CONFIG_SYS_BOOTM_LEN=0x800000
# CONFIG_CMD_IMI is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
diff --git a/configs/p2771-0000-500_defconfig b/configs/p2771-0000-500_defconfig
index 0081d89..9380c77 100644
--- a/configs/p2771-0000-500_defconfig
+++ b/configs/p2771-0000-500_defconfig
@@ -11,14 +11,14 @@
CONFIG_TEGRA186=y
CONFIG_SYS_LOAD_ADDR=0x80080000
CONFIG_PCI=y
+CONFIG_SYS_BOOTM_LEN=0x800000
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_SYSTEM_SETUP=y
+CONFIG_SYS_PBSIZE=2093
CONFIG_CONSOLE_MUX=y
CONFIG_SYS_STDIO_DEREGISTER=y
CONFIG_SYS_PROMPT="Tegra186 (P2771-0000-500) # "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=2093
-CONFIG_SYS_BOOTM_LEN=0x800000
# CONFIG_CMD_IMI is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
diff --git a/configs/p3450-0000_defconfig b/configs/p3450-0000_defconfig
index aaaf7c9..cf6f570 100644
--- a/configs/p3450-0000_defconfig
+++ b/configs/p3450-0000_defconfig
@@ -16,14 +16,14 @@
CONFIG_TEGRA_GPU=y
CONFIG_SYS_LOAD_ADDR=0x80080000
CONFIG_PCI=y
+CONFIG_SYS_BOOTM_LEN=0x800000
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_SYSTEM_SETUP=y
+CONFIG_SYS_PBSIZE=2089
CONFIG_CONSOLE_MUX=y
CONFIG_SYS_STDIO_DEREGISTER=y
CONFIG_SYS_PROMPT="Tegra210 (P3450-0000) # "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=2089
-CONFIG_SYS_BOOTM_LEN=0x800000
# CONFIG_CMD_IMI is not set
CONFIG_CMD_DFU=y
CONFIG_CMD_GPIO=y
diff --git a/configs/paz00_defconfig b/configs/paz00_defconfig
index 9f3893d..97ff49d 100644
--- a/configs/paz00_defconfig
+++ b/configs/paz00_defconfig
@@ -12,7 +12,7 @@
CONFIG_TARGET_PAZ00=y
CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_OF_SYSTEM_SETUP=y
-CONFIG_SYS_STDIO_DEREGISTER=y
+CONFIG_SYS_PBSIZE=2087
CONFIG_SPL_FOOTPRINT_LIMIT=y
CONFIG_SPL_MAX_FOOTPRINT=0x8000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
@@ -22,7 +22,6 @@
CONFIG_SPL_SYS_MALLOC_SIZE=0x10000
CONFIG_SYS_PROMPT="Tegra20 (Paz00) MOD # "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=2087
# CONFIG_CMD_IMI is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
@@ -37,7 +36,6 @@
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_MMC_ENV_PART=2
-CONFIG_SPL_DM=y
CONFIG_DM_PMIC=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
@@ -46,6 +44,9 @@
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_TEGRA=y
+CONFIG_USB_ULPI_VIEWPORT=y
+CONFIG_USB_ULPI=y
+CONFIG_USB_KEYBOARD=y
CONFIG_USB_HOST_ETHER=y
CONFIG_USB_ETHER_ASIX=y
CONFIG_VIDEO=y
diff --git a/configs/pcm051_rev3_defconfig b/configs/pcm051_rev3_defconfig
index 831a146..7846981 100644
--- a/configs/pcm051_rev3_defconfig
+++ b/configs/pcm051_rev3_defconfig
@@ -50,6 +50,7 @@
CONFIG_DM_I2C=y
CONFIG_MISC=y
CONFIG_MMC_OMAP_HS=y
+CONFIG_MTD=y
CONFIG_DM_MTD=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
diff --git a/configs/pcm052_defconfig b/configs/pcm052_defconfig
index e0c7709..46a04bb 100644
--- a/configs/pcm052_defconfig
+++ b/configs/pcm052_defconfig
@@ -20,10 +20,10 @@
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run bootcmd_nand"
-CONFIG_BOARD_EARLY_INIT_F=y
-CONFIG_HUSH_PARSER=y
CONFIG_SYS_CBSIZE=256
CONFIG_SYS_PBSIZE=276
+CONFIG_BOARD_EARLY_INIT_F=y
+CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPIO=y
diff --git a/configs/pcm058_defconfig b/configs/pcm058_defconfig
index 15ae95e..8d4d0d9 100644
--- a/configs/pcm058_defconfig
+++ b/configs/pcm058_defconfig
@@ -30,6 +30,7 @@
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=3
CONFIG_BOOTCOMMAND="run mmcboot;run nandboot"
+CONFIG_SYS_PBSIZE=532
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_SYS_MALLOC=y
@@ -43,7 +44,6 @@
CONFIG_SPL_WATCHDOG=y
CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=532
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
diff --git a/configs/pe2201_defconfig b/configs/pe2201_defconfig
new file mode 100644
index 0000000..e6b9cef
--- /dev/null
+++ b/configs/pe2201_defconfig
@@ -0,0 +1,42 @@
+CONFIG_ARM=y
+CONFIG_ARM_SMCCC=y
+CONFIG_TARGET_PE2201=y
+CONFIG_TEXT_BASE=0x38180000
+CONFIG_SYS_MALLOC_LEN=0x101000
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x30c1a000
+CONFIG_ENV_SIZE=0x1000
+CONFIG_DEFAULT_DEVICE_TREE="phytium-pe2201"
+CONFIG_BOARD_EARLY_INIT_F=y
+# CONFIG_PSCI_RESET is not set
+CONFIG_AHCI=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x90000000
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="earlycon=pl011,0x2800c000 root=/dev/sda2 rw"
+# CONFIG_DISPLAY_CPUINFO is not set
+# CONFIG_DISPLAY_BOARDINFO is not set
+CONFIG_LAST_STAGE_INIT=y
+CONFIG_SYS_PROMPT="pe2201#"
+# CONFIG_CMD_LZMADEC is not set
+# CONFIG_CMD_UNZIP is not set
+CONFIG_CMD_PCI=y
+CONFIG_CMD_DM=y
+CONFIG_OF_CONTROL=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+# CONFIG_NET is not set
+CONFIG_DM=y
+CONFIG_SCSI_AHCI=y
+CONFIG_AHCI_PCI=y
+CONFIG_BLK=y
+# CONFIG_MMC is not set
+CONFIG_PCI=y
+CONFIG_DM_PCI=y
+CONFIG_PCI_PHYTIUM=y
+CONFIG_SCSI=y
+CONFIG_DM_SCSI=y
+CONFIG_DM_SERIAL=y
+CONFIG_PL01X_SERIAL=y
+CONFIG_BOOTSTD_DEFAULTS=y
+CONFIG_CMD_BOOTMETH=y
diff --git a/configs/peach-pi_defconfig b/configs/peach-pi_defconfig
index c863867..27d438e 100644
--- a/configs/peach-pi_defconfig
+++ b/configs/peach-pi_defconfig
@@ -23,12 +23,12 @@
CONFIG_FIT=y
CONFIG_FIT_BEST_MATCH=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_PBSIZE=1024
CONFIG_SILENT_CONSOLE=y
# CONFIG_SPL_FRAMEWORK is not set
CONFIG_SPL_FOOTPRINT_LIMIT=y
CONFIG_SPL_MAX_FOOTPRINT=0x7800
CONFIG_SYS_PROMPT="Peach-Pi # "
-CONFIG_SYS_PBSIZE=1024
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
@@ -58,7 +58,6 @@
CONFIG_MMC_DW=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_S5P=y
-CONFIG_MTD=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_SMC911X=y
diff --git a/configs/peach-pit_defconfig b/configs/peach-pit_defconfig
index 7989310..1c7e011 100644
--- a/configs/peach-pit_defconfig
+++ b/configs/peach-pit_defconfig
@@ -22,12 +22,12 @@
CONFIG_FIT=y
CONFIG_FIT_BEST_MATCH=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_PBSIZE=1024
CONFIG_SILENT_CONSOLE=y
# CONFIG_SPL_FRAMEWORK is not set
CONFIG_SPL_FOOTPRINT_LIMIT=y
CONFIG_SPL_MAX_FOOTPRINT=0x7800
CONFIG_SYS_PROMPT="Peach-Pit # "
-CONFIG_SYS_PBSIZE=1024
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
@@ -57,7 +57,6 @@
CONFIG_MMC_DW=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_S5P=y
-CONFIG_MTD=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_SMC911X=y
diff --git a/configs/pg_wcom_expu1_defconfig b/configs/pg_wcom_expu1_defconfig
index 455b439..3eff6ef 100644
--- a/configs/pg_wcom_expu1_defconfig
+++ b/configs/pg_wcom_expu1_defconfig
@@ -30,6 +30,7 @@
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=3
CONFIG_AUTOBOOT_KEYED=y
@@ -39,13 +40,13 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0"
+CONFIG_SYS_CBSIZE=512
+CONFIG_SYS_PBSIZE=532
CONFIG_SILENT_CONSOLE=y
CONFIG_LAST_STAGE_INIT=y
CONFIG_MISC_INIT_R=y
+CONFIG_HUSH_OLD_PARSER=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_CBSIZE=512
-CONFIG_SYS_PBSIZE=532
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMINFO=y
diff --git a/configs/pg_wcom_expu1_update_defconfig b/configs/pg_wcom_expu1_update_defconfig
index 269116c..c4899e5 100644
--- a/configs/pg_wcom_expu1_update_defconfig
+++ b/configs/pg_wcom_expu1_update_defconfig
@@ -28,6 +28,7 @@
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=3
CONFIG_AUTOBOOT_KEYED=y
@@ -37,13 +38,13 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0"
+CONFIG_SYS_CBSIZE=512
+CONFIG_SYS_PBSIZE=532
CONFIG_SILENT_CONSOLE=y
CONFIG_LAST_STAGE_INIT=y
CONFIG_MISC_INIT_R=y
+CONFIG_HUSH_OLD_PARSER=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_CBSIZE=512
-CONFIG_SYS_PBSIZE=532
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMINFO=y
diff --git a/configs/pg_wcom_seli8_defconfig b/configs/pg_wcom_seli8_defconfig
index 678bc10..4900a5e 100644
--- a/configs/pg_wcom_seli8_defconfig
+++ b/configs/pg_wcom_seli8_defconfig
@@ -30,6 +30,7 @@
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=3
CONFIG_AUTOBOOT_KEYED=y
@@ -39,13 +40,13 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0"
+CONFIG_SYS_CBSIZE=512
+CONFIG_SYS_PBSIZE=532
CONFIG_SILENT_CONSOLE=y
CONFIG_LAST_STAGE_INIT=y
CONFIG_MISC_INIT_R=y
+CONFIG_HUSH_OLD_PARSER=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_CBSIZE=512
-CONFIG_SYS_PBSIZE=532
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMINFO=y
diff --git a/configs/pg_wcom_seli8_update_defconfig b/configs/pg_wcom_seli8_update_defconfig
index 7c7b001..a2f947d 100644
--- a/configs/pg_wcom_seli8_update_defconfig
+++ b/configs/pg_wcom_seli8_update_defconfig
@@ -28,6 +28,7 @@
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=3
CONFIG_AUTOBOOT_KEYED=y
@@ -37,13 +38,13 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0"
+CONFIG_SYS_CBSIZE=512
+CONFIG_SYS_PBSIZE=532
CONFIG_SILENT_CONSOLE=y
CONFIG_LAST_STAGE_INIT=y
CONFIG_MISC_INIT_R=y
+CONFIG_HUSH_OLD_PARSER=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_CBSIZE=512
-CONFIG_SYS_PBSIZE=532
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMINFO=y
diff --git a/configs/phycore-imx8mm_defconfig b/configs/phycore-imx8mm_defconfig
index bff35e7..bcc38d5 100644
--- a/configs/phycore-imx8mm_defconfig
+++ b/configs/phycore-imx8mm_defconfig
@@ -9,7 +9,7 @@
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0x3C0000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="phycore-imx8mm"
+CONFIG_DEFAULT_DEVICE_TREE="imx8mm-phyboard-polis-rdk"
CONFIG_SPL_TEXT_BASE=0x7E1000
CONFIG_TARGET_PHYCORE_IMX8MM=y
CONFIG_SYS_MONITOR_LEN=524288
@@ -28,6 +28,8 @@
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadimage; then run mmcboot; else run netboot; fi; fi;"
CONFIG_DEFAULT_FDT_FILE="oftree"
+CONFIG_SYS_CBSIZE=2048
+CONFIG_SYS_PBSIZE=2074
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x910000
@@ -46,8 +48,6 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="u-boot=> "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_CBSIZE=2048
-CONFIG_SYS_PBSIZE=2074
# CONFIG_CMD_EXPORTENV is not set
# CONFIG_CMD_IMPORTENV is not set
# CONFIG_CMD_CRC32 is not set
diff --git a/configs/phycore-imx8mp_defconfig b/configs/phycore-imx8mp_defconfig
index 46efe18..519e0cf 100644
--- a/configs/phycore-imx8mp_defconfig
+++ b/configs/phycore-imx8mp_defconfig
@@ -29,6 +29,8 @@
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadimage; then run mmcboot; else run netboot; fi; fi;"
CONFIG_DEFAULT_FDT_FILE="oftree"
+CONFIG_SYS_CBSIZE=2048
+CONFIG_SYS_PBSIZE=2074
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_MAX_SIZE=0x26000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
@@ -50,8 +52,6 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="u-boot=> "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_CBSIZE=2048
-CONFIG_SYS_PBSIZE=2074
# CONFIG_CMD_EXPORTENV is not set
# CONFIG_CMD_IMPORTENV is not set
# CONFIG_CMD_CRC32 is not set
diff --git a/configs/phycore-rk3288_defconfig b/configs/phycore-rk3288_defconfig
index 0bd137c..ce999e4 100644
--- a/configs/phycore-rk3288_defconfig
+++ b/configs/phycore-rk3288_defconfig
@@ -22,6 +22,7 @@
CONFIG_DEBUG_UART=y
CONFIG_LTO=y
# CONFIG_ANDROID_BOOT_IMAGE is not set
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_USE_PREBOOT=y
CONFIG_DEFAULT_FDT_FILE="rk3288-phycore-rdk.dtb"
CONFIG_SILENT_CONSOLE=y
@@ -32,7 +33,6 @@
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_STACK_R=y
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
@@ -66,7 +66,6 @@
CONFIG_I2C_EEPROM=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
-CONFIG_MTD=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_GMAC_ROCKCHIP=y
CONFIG_PINCTRL=y
diff --git a/configs/phycore_am62x_a53_defconfig b/configs/phycore_am62x_a53_defconfig
new file mode 100644
index 0000000..2d5d906
--- /dev/null
+++ b/configs/phycore_am62x_a53_defconfig
@@ -0,0 +1,116 @@
+CONFIG_ARM=y
+CONFIG_ARCH_K3=y
+CONFIG_SYS_MALLOC_F_LEN=0x8000
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_NR_DRAM_BANKS=2
+CONFIG_SOC_K3_AM625=y
+CONFIG_K3_ATF_LOAD_ADDR=0x9e780000
+CONFIG_TARGET_PHYCORE_AM62X_A53=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80b80000
+CONFIG_SF_DEFAULT_SPEED=25000000
+CONFIG_ENV_SIZE=0x2000
+CONFIG_ENV_OFFSET=0xFFFFD000
+CONFIG_SPL_DM_SPI=y
+CONFIG_DEFAULT_DEVICE_TREE="k3-am625-phyboard-lyra-rdk"
+CONFIG_SPL_TEXT_BASE=0x80080000
+CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_DM_RESET=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
+CONFIG_SPL_STACK_R_ADDR=0x82000000
+CONFIG_SPL_SIZE_LIMIT=0x40000
+CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x800
+CONFIG_SPL_FS_FAT=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI=y
+# CONFIG_PSCI_RESET is not set
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000
+CONFIG_BOOTSTD_FULL=y
+CONFIG_BOOTSTD_DEFAULTS=y
+CONFIG_SYS_BOOTM_LEN=0x800000
+CONFIG_BOOTCOMMAND="run mmcboot; bootflow scan -lb"
+CONFIG_DEFAULT_FDT_FILE="oftree"
+CONFIG_SPL_MAX_SIZE=0x58000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x80c80000
+CONFIG_SPL_BSS_MAX_SIZE=0x80000
+CONFIG_SPL_SYS_REPORT_STACK_F_USAGE=y
+CONFIG_SPL_SYS_MALLOC_SIMPLE=y
+CONFIG_SPL_STACK_R=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1400
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img"
+CONFIG_SPL_DM_MAILBOX=y
+CONFIG_SPL_DM_SPI_FLASH=y
+CONFIG_SPL_POWER_DOMAIN=y
+# CONFIG_SPL_SPI_FLASH_TINY is not set
+CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y
+CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000
+CONFIG_SPL_YMODEM_SUPPORT=y
+CONFIG_CMD_MMC=y
+CONFIG_OF_CONTROL=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_MULTI_DTB_FIT=y
+CONFIG_SPL_MULTI_DTB_FIT=y
+CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_SYS_MMC_ENV_DEV=1
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_SPL_DM=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SPL_OF_TRANSLATE=y
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_CLK_TI_SCI=y
+CONFIG_DMA_CHANNELS=y
+CONFIG_TI_K3_NAVSS_UDMA=y
+CONFIG_TI_SCI_PROTOCOL=y
+CONFIG_DM_MAILBOX=y
+CONFIG_K3_SEC_PROXY=y
+CONFIG_SUPPORT_EMMC_BOOT=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_ADMA=y
+CONFIG_SPL_MMC_SDHCI_ADMA=y
+CONFIG_MMC_SDHCI_AM654=y
+CONFIG_MTD=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH_SFDP_SUPPORT=y
+# CONFIG_SPI_FLASH_SMART_HWCAPS is not set
+CONFIG_SPI_FLASH_SOFT_RESET=y
+CONFIG_SPI_FLASH_SOFT_RESET_ON_BOOT=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_S28HX_T=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_MT35XU=y
+CONFIG_PHY_TI_DP83867=y
+CONFIG_PHY_FIXED=y
+CONFIG_TI_AM65_CPSW_NUSS=y
+CONFIG_PHY=y
+CONFIG_PINCTRL=y
+CONFIG_SPL_PINCTRL=y
+CONFIG_PINCTRL_SINGLE=y
+CONFIG_POWER_DOMAIN=y
+CONFIG_TI_SCI_POWER_DOMAIN=y
+CONFIG_K3_SYSTEM_CONTROLLER=y
+CONFIG_REMOTEPROC_TI_K3_ARM64=y
+CONFIG_RESET_TI_SCI=y
+CONFIG_DM_SERIAL=y
+CONFIG_SOC_DEVICE=y
+CONFIG_SOC_DEVICE_TI_K3=y
+CONFIG_SOC_TI=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_CADENCE_QSPI=y
+CONFIG_SYSRESET=y
+CONFIG_SPL_SYSRESET=y
+CONFIG_SYSRESET_TI_SCI=y
+CONFIG_FS_FAT_MAX_CLUSTSIZE=16384
diff --git a/configs/phycore_am62x_r5_defconfig b/configs/phycore_am62x_r5_defconfig
new file mode 100644
index 0000000..bd28e14
--- /dev/null
+++ b/configs/phycore_am62x_r5_defconfig
@@ -0,0 +1,131 @@
+CONFIG_ARM=y
+CONFIG_ARCH_K3=y
+CONFIG_SYS_MALLOC_LEN=0x08000000
+CONFIG_SYS_MALLOC_F_LEN=0x9000
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_NR_DRAM_BANKS=2
+CONFIG_SOC_K3_AM625=y
+CONFIG_TARGET_PHYCORE_AM62X_R5=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x43c3a7f0
+CONFIG_SF_DEFAULT_SPEED=25000000
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_ENV_SIZE=0x20000
+CONFIG_DM_GPIO=y
+CONFIG_SPL_DM_SPI=y
+CONFIG_DEFAULT_DEVICE_TREE="k3-am625-r5-phycore-som-2gb"
+CONFIG_SPL_TEXT_BASE=0x43c00000
+CONFIG_DM_RESET=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
+CONFIG_SPL_DRIVERS_MISC=y
+CONFIG_SPL_STACK_R_ADDR=0x82000000
+CONFIG_SPL_SYS_MALLOC_F_LEN=0x7000
+CONFIG_SPL_SIZE_LIMIT=0x3A7F0
+CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x3500
+CONFIG_SPL_FS_FAT=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y
+CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y
+CONFIG_SPL_MAX_SIZE=0x3B000
+CONFIG_SPL_PAD_TO=0x0
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x43c3b000
+CONFIG_SPL_BSS_MAX_SIZE=0x3000
+CONFIG_SPL_SYS_REPORT_STACK_F_USAGE=y
+CONFIG_SPL_SYS_MALLOC_SIMPLE=y
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x200000
+CONFIG_SPL_SEPARATE_BSS=y
+CONFIG_SPL_SYS_MALLOC=y
+CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
+CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x84000000
+CONFIG_SPL_SYS_MALLOC_SIZE=0x1000000
+CONFIG_SPL_EARLY_BSS=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x400
+CONFIG_SPL_DM_MAILBOX=y
+CONFIG_SPL_DM_SPI_FLASH=y
+CONFIG_SPL_DM_RESET=y
+CONFIG_SPL_POWER_DOMAIN=y
+CONFIG_SPL_RAM_SUPPORT=y
+CONFIG_SPL_RAM_DEVICE=y
+CONFIG_SPL_REMOTEPROC=y
+# CONFIG_SPL_SPI_FLASH_TINY is not set
+CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y
+CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000
+CONFIG_SPL_YMODEM_SUPPORT=y
+CONFIG_HUSH_PARSER=y
+CONFIG_CMD_ASKENV=y
+CONFIG_CMD_DFU=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_REMOTEPROC=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_TIME=y
+CONFIG_CMD_FAT=y
+CONFIG_OF_CONTROL=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_SPL_MULTI_DTB_FIT=y
+CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_SPL_DM=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SPL_OF_TRANSLATE=y
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_SPL_CLK_CCF=y
+CONFIG_SPL_CLK_K3_PLL=y
+CONFIG_SPL_CLK_K3=y
+CONFIG_TI_SCI_PROTOCOL=y
+CONFIG_DA8XX_GPIO=y
+CONFIG_DM_MAILBOX=y
+CONFIG_K3_SEC_PROXY=y
+CONFIG_SPL_MISC=y
+CONFIG_ESM_K3=y
+CONFIG_SUPPORT_EMMC_BOOT=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_ADMA=y
+CONFIG_SPL_MMC_SDHCI_ADMA=y
+CONFIG_MMC_SDHCI_AM654=y
+CONFIG_MTD=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH_SFDP_SUPPORT=y
+# CONFIG_SPI_FLASH_SMART_HWCAPS is not set
+CONFIG_SPI_FLASH_SOFT_RESET=y
+CONFIG_SPI_FLASH_SOFT_RESET_ON_BOOT=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_MT35XU=y
+CONFIG_PINCTRL=y
+# CONFIG_PINCTRL_GENERIC is not set
+CONFIG_SPL_PINCTRL=y
+# CONFIG_SPL_PINCTRL_GENERIC is not set
+CONFIG_PINCTRL_SINGLE=y
+CONFIG_POWER_DOMAIN=y
+CONFIG_TI_POWER_DOMAIN=y
+CONFIG_K3_SYSTEM_CONTROLLER=y
+CONFIG_REMOTEPROC_TI_K3_ARM64=y
+CONFIG_RESET_TI_SCI=y
+CONFIG_SPECIFY_CONSOLE_INDEX=y
+CONFIG_DM_SERIAL=y
+CONFIG_SOC_DEVICE=y
+CONFIG_SOC_DEVICE_TI_K3=y
+CONFIG_SOC_TI=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_CADENCE_QSPI=y
+CONFIG_TIMER=y
+CONFIG_SPL_TIMER=y
+CONFIG_OMAP_TIMER=y
+CONFIG_LIB_RATIONAL=y
+CONFIG_SPL_LIB_RATIONAL=y
diff --git a/configs/phycore_pcl063_defconfig b/configs/phycore_pcl063_defconfig
index 11db968..6b00df1 100644
--- a/configs/phycore_pcl063_defconfig
+++ b/configs/phycore_pcl063_defconfig
@@ -18,16 +18,14 @@
CONFIG_SYS_MEMTEST_END=0x90000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=3
+CONFIG_SYS_PBSIZE=532
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_WATCHDOG=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
-# CONFIG_RANDOM_UUID is not set
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_MTD=y
@@ -69,3 +67,4 @@
CONFIG_USB_GADGET_PRODUCT_NUM=0x4fff
CONFIG_CI_UDC=y
CONFIG_USB_GADGET_DOWNLOAD=y
+# CONFIG_RANDOM_UUID is not set
diff --git a/configs/phycore_pcl063_ull_defconfig b/configs/phycore_pcl063_ull_defconfig
index f0a2398..6195fcf 100644
--- a/configs/phycore_pcl063_ull_defconfig
+++ b/configs/phycore_pcl063_ull_defconfig
@@ -18,15 +18,13 @@
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=3
CONFIG_BOOTCOMMAND="run mmc_mmc_fit"
+CONFIG_SYS_PBSIZE=532
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_WATCHDOG=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=532
-CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
-# CONFIG_RANDOM_UUID is not set
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
@@ -60,4 +58,5 @@
CONFIG_USB_GADGET_PRODUCT_NUM=0x4fff
CONFIG_CI_UDC=y
CONFIG_USB_GADGET_DOWNLOAD=y
+# CONFIG_RANDOM_UUID is not set
CONFIG_LZO=y
diff --git a/configs/pic32mzdask_defconfig b/configs/pic32mzdask_defconfig
index 8e93c03..348ea43 100644
--- a/configs/pic32mzdask_defconfig
+++ b/configs/pic32mzdask_defconfig
@@ -19,10 +19,10 @@
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=5
CONFIG_BOOTCOMMAND="run distro_bootcmd || run legacy_bootcmd"
+CONFIG_SYS_PBSIZE=1048
CONFIG_SYS_MALLOC_BOOTPARAMS=y
CONFIG_SYS_BOOTPARAMS_LEN=0x1000
CONFIG_SYS_PROMPT="dask # "
-CONFIG_SYS_PBSIZE=1048
# CONFIG_CMD_SAVEENV is not set
CONFIG_LOOPW=y
CONFIG_CMD_MEMINFO=y
diff --git a/configs/pico-dwarf-imx6ul_defconfig b/configs/pico-dwarf-imx6ul_defconfig
index e9a5302..8b90285 100644
--- a/configs/pico-dwarf-imx6ul_defconfig
+++ b/configs/pico-dwarf-imx6ul_defconfig
@@ -25,10 +25,10 @@
CONFIG_BOOTDELAY=3
CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd"
CONFIG_DEFAULT_FDT_FILE="imx6ul-pico-dwarf.dtb"
+CONFIG_SYS_PBSIZE=532
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_BOOTMENU=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_DFU=y
@@ -67,6 +67,7 @@
CONFIG_DM_REGULATOR_PFUZE100=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_DM_SERIAL=y
CONFIG_MXC_UART=y
CONFIG_USB=y
CONFIG_SPL_USB_HOST=y
diff --git a/configs/pico-dwarf-imx7d_defconfig b/configs/pico-dwarf-imx7d_defconfig
index b598d8a..2e32a7e 100644
--- a/configs/pico-dwarf-imx7d_defconfig
+++ b/configs/pico-dwarf-imx7d_defconfig
@@ -22,13 +22,13 @@
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd"
CONFIG_DEFAULT_FDT_FILE="imx7d-pico-dwarf.dtb"
+CONFIG_SYS_PBSIZE=532
# CONFIG_CONSOLE_MUX is not set
CONFIG_SPL_MAX_SIZE=0xe000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_MAX_SIZE=0x100000
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=532
# CONFIG_CMD_BOOTD is not set
CONFIG_CMD_BOOTMENU=y
# CONFIG_CMD_IMI is not set
diff --git a/configs/pico-hobbit-imx6ul_defconfig b/configs/pico-hobbit-imx6ul_defconfig
index b3a1023..e3aca6e 100644
--- a/configs/pico-hobbit-imx6ul_defconfig
+++ b/configs/pico-hobbit-imx6ul_defconfig
@@ -26,10 +26,10 @@
CONFIG_BOOTDELAY=3
CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd"
CONFIG_DEFAULT_FDT_FILE="imx6ul-pico-hobbit.dtb"
+CONFIG_SYS_PBSIZE=532
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_BOOTMENU=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_DFU=y
@@ -70,6 +70,7 @@
CONFIG_DM_REGULATOR_PFUZE100=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_DM_SERIAL=y
CONFIG_MXC_UART=y
CONFIG_USB=y
CONFIG_SPL_USB_HOST=y
diff --git a/configs/pico-hobbit-imx7d_defconfig b/configs/pico-hobbit-imx7d_defconfig
index 93ef6b5..42abda0 100644
--- a/configs/pico-hobbit-imx7d_defconfig
+++ b/configs/pico-hobbit-imx7d_defconfig
@@ -22,13 +22,13 @@
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd"
CONFIG_DEFAULT_FDT_FILE="imx7d-pico-hobbit.dtb"
+CONFIG_SYS_PBSIZE=532
# CONFIG_CONSOLE_MUX is not set
CONFIG_SPL_MAX_SIZE=0xe000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_MAX_SIZE=0x100000
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=532
# CONFIG_CMD_BOOTD is not set
CONFIG_CMD_BOOTMENU=y
# CONFIG_CMD_IMI is not set
diff --git a/configs/pico-imx6_defconfig b/configs/pico-imx6_defconfig
index 39aa63c..9b2496e 100644
--- a/configs/pico-imx6_defconfig
+++ b/configs/pico-imx6_defconfig
@@ -26,6 +26,7 @@
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTCOMMAND="run default_boot"
CONFIG_DEFAULT_FDT_FILE="ask"
+CONFIG_SYS_PBSIZE=532
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_FIT_IMAGE_TINY=y
@@ -33,7 +34,6 @@
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot-dtb.img"
CONFIG_SPL_WATCHDOG=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_BOOTMENU=y
CONFIG_CMD_SPL=y
CONFIG_CMD_SPL_WRITE_SIZE=0x20000
diff --git a/configs/pico-imx6ul_defconfig b/configs/pico-imx6ul_defconfig
index 6f84b6a..ce29718 100644
--- a/configs/pico-imx6ul_defconfig
+++ b/configs/pico-imx6ul_defconfig
@@ -26,10 +26,10 @@
CONFIG_BOOTDELAY=3
CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd"
CONFIG_DEFAULT_FDT_FILE="ask"
+CONFIG_SYS_PBSIZE=532
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_BOOTMENU=y
CONFIG_CMD_SPL=y
CONFIG_CMD_SPL_WRITE_SIZE=0x20000
diff --git a/configs/pico-imx7d_bl33_defconfig b/configs/pico-imx7d_bl33_defconfig
index 18fb5d2..154c2db 100644
--- a/configs/pico-imx7d_bl33_defconfig
+++ b/configs/pico-imx7d_bl33_defconfig
@@ -24,6 +24,7 @@
CONFIG_FIT_VERBOSE=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run distro_bootcmd"
+CONFIG_SYS_PBSIZE=532
# CONFIG_CONSOLE_MUX is not set
CONFIG_SPL_MAX_SIZE=0xe000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
@@ -31,7 +32,6 @@
CONFIG_SPL_SYS_MALLOC=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=532
# CONFIG_CMD_BOOTD is not set
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_SPL=y
diff --git a/configs/pico-imx7d_defconfig b/configs/pico-imx7d_defconfig
index 44caa8e..3202894 100644
--- a/configs/pico-imx7d_defconfig
+++ b/configs/pico-imx7d_defconfig
@@ -22,13 +22,13 @@
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd"
CONFIG_DEFAULT_FDT_FILE="ask"
+CONFIG_SYS_PBSIZE=532
# CONFIG_CONSOLE_MUX is not set
CONFIG_SPL_MAX_SIZE=0xe000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_MAX_SIZE=0x100000
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=532
# CONFIG_CMD_BOOTD is not set
CONFIG_CMD_BOOTMENU=y
# CONFIG_CMD_IMI is not set
diff --git a/configs/pico-imx8mq_defconfig b/configs/pico-imx8mq_defconfig
index f2c342e..0f4a7f0 100644
--- a/configs/pico-imx8mq_defconfig
+++ b/configs/pico-imx8mq_defconfig
@@ -27,6 +27,7 @@
CONFIG_FIT=y
CONFIG_FIT_EXTERNAL_OFFSET=0x3000
CONFIG_SPL_LOAD_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x8000000
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else booti ${loadaddr} - ${fdt_addr}; fi"
@@ -50,7 +51,6 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=64
# CONFIG_BOOTM_NETBSD is not set
-CONFIG_SYS_BOOTM_LEN=0x8000000
# CONFIG_CMD_EXPORTENV is not set
# CONFIG_CMD_IMPORTENV is not set
# CONFIG_CMD_CRC32 is not set
diff --git a/configs/pico-nymph-imx7d_defconfig b/configs/pico-nymph-imx7d_defconfig
index b598d8a..2e32a7e 100644
--- a/configs/pico-nymph-imx7d_defconfig
+++ b/configs/pico-nymph-imx7d_defconfig
@@ -22,13 +22,13 @@
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd"
CONFIG_DEFAULT_FDT_FILE="imx7d-pico-dwarf.dtb"
+CONFIG_SYS_PBSIZE=532
# CONFIG_CONSOLE_MUX is not set
CONFIG_SPL_MAX_SIZE=0xe000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_MAX_SIZE=0x100000
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=532
# CONFIG_CMD_BOOTD is not set
CONFIG_CMD_BOOTMENU=y
# CONFIG_CMD_IMI is not set
diff --git a/configs/pico-pi-imx6ul_defconfig b/configs/pico-pi-imx6ul_defconfig
index 1eee1e6..81f3e9b 100644
--- a/configs/pico-pi-imx6ul_defconfig
+++ b/configs/pico-pi-imx6ul_defconfig
@@ -26,10 +26,10 @@
CONFIG_BOOTDELAY=3
CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd"
CONFIG_DEFAULT_FDT_FILE="imx6ul-pico-pi.dtb"
+CONFIG_SYS_PBSIZE=532
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_BOOTMENU=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_DFU=y
@@ -70,6 +70,7 @@
CONFIG_DM_REGULATOR_PFUZE100=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_DM_SERIAL=y
CONFIG_MXC_UART=y
CONFIG_USB=y
CONFIG_SPL_USB_HOST=y
diff --git a/configs/pico-pi-imx7d_defconfig b/configs/pico-pi-imx7d_defconfig
index 48364c7..1c2ba26 100644
--- a/configs/pico-pi-imx7d_defconfig
+++ b/configs/pico-pi-imx7d_defconfig
@@ -22,13 +22,13 @@
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd"
CONFIG_DEFAULT_FDT_FILE="imx7d-pico-pi.dtb"
+CONFIG_SYS_PBSIZE=532
# CONFIG_CONSOLE_MUX is not set
CONFIG_SPL_MAX_SIZE=0xe000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_MAX_SIZE=0x100000
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=532
# CONFIG_CMD_BOOTD is not set
CONFIG_CMD_BOOTMENU=y
# CONFIG_CMD_IMI is not set
@@ -76,6 +76,8 @@
CONFIG_DM_PMIC_PFUZE100=y
CONFIG_DM_SERIAL=y
CONFIG_MXC_UART=y
+CONFIG_SYSRESET=y
+CONFIG_SYSRESET_WATCHDOG=y
CONFIG_IMX_THERMAL=y
CONFIG_USB=y
CONFIG_SPL_USB_HOST=y
@@ -95,3 +97,4 @@
CONFIG_SPLASH_SCREEN=y
CONFIG_SPLASH_SCREEN_ALIGN=y
CONFIG_BMP_16BPP=y
+CONFIG_IMX_WATCHDOG=y
diff --git a/configs/pine64-lts_defconfig b/configs/pine64-lts_defconfig
index 9583d29..78f65c5 100644
--- a/configs/pine64-lts_defconfig
+++ b/configs/pine64-lts_defconfig
@@ -10,6 +10,7 @@
CONFIG_SPL_SPI_SUNXI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SUPPORT_EMMC_BOOT=y
+CONFIG_MTD=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_SUN8I_EMAC=y
CONFIG_SPI=y
diff --git a/configs/pine_h64_defconfig b/configs/pine_h64_defconfig
index 4712b8e..20a4a0a 100644
--- a/configs/pine_h64_defconfig
+++ b/configs/pine_h64_defconfig
@@ -10,6 +10,7 @@
# CONFIG_PSCI_RESET is not set
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SUPPORT_EMMC_BOOT=y
+CONFIG_MTD=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_SUN8I_EMAC=y
CONFIG_PHY_SUN50I_USB3=y
diff --git a/configs/pinebook-pro-rk3399_defconfig b/configs/pinebook-pro-rk3399_defconfig
index ae3211b..de35741 100644
--- a/configs/pinebook-pro-rk3399_defconfig
+++ b/configs/pinebook-pro-rk3399_defconfig
@@ -96,7 +96,6 @@
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_OHCI_HCD=y
diff --git a/configs/pinecube_defconfig b/configs/pinecube_defconfig
index 1551cf1..7cc0a86 100644
--- a/configs/pinecube_defconfig
+++ b/configs/pinecube_defconfig
@@ -14,6 +14,7 @@
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_SYS_I2C_SLAVE=0x7f
CONFIG_SYS_I2C_SPEED=400000
+CONFIG_MTD=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_AXP209_POWER=y
CONFIG_AXP_DCDC2_VOLT=1250
diff --git a/configs/pinephone-pro-rk3399_defconfig b/configs/pinephone-pro-rk3399_defconfig
index 11243bc..d08224f 100644
--- a/configs/pinephone-pro-rk3399_defconfig
+++ b/configs/pinephone-pro-rk3399_defconfig
@@ -85,7 +85,6 @@
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_OHCI_HCD=y
diff --git a/configs/plutux_defconfig b/configs/plutux_defconfig
index 92f433d..13543b3 100644
--- a/configs/plutux_defconfig
+++ b/configs/plutux_defconfig
@@ -14,6 +14,7 @@
CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_FIT=y
CONFIG_OF_SYSTEM_SETUP=y
+CONFIG_SYS_PBSIZE=2084
CONFIG_CONSOLE_MUX=y
CONFIG_SYS_STDIO_DEREGISTER=y
CONFIG_SPL_FOOTPRINT_LIMIT=y
@@ -25,7 +26,6 @@
CONFIG_SPL_SYS_MALLOC_SIZE=0x10000
CONFIG_SYS_PROMPT="Tegra20 (Plutux) # "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=2084
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
@@ -38,8 +38,6 @@
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_SPL_DM=y
-CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
CONFIG_TEGRA_NAND=y
CONFIG_SYS_NAND_ONFI_DETECTION=y
diff --git a/configs/pm9261_defconfig b/configs/pm9261_defconfig
index 4126286..9f4d434 100644
--- a/configs/pm9261_defconfig
+++ b/configs/pm9261_defconfig
@@ -18,14 +18,14 @@
CONFIG_BOOTARGS="root=/dev/mtdblock4 rootfstype=jffs2 fbcon=rotate:3 "
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run flashboot"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=281
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="pm9261> "
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=281
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_LOADS is not set
diff --git a/configs/pm9263_defconfig b/configs/pm9263_defconfig
index 2a283e3..811801b 100644
--- a/configs/pm9263_defconfig
+++ b/configs/pm9263_defconfig
@@ -18,13 +18,13 @@
CONFIG_BOOTARGS="root=/dev/mtdblock4 rootfstype=jffs2 fbcon=rotate:3 "
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run flashboot"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=288
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="u-boot-pm9263> "
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=288
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_LOADS is not set
diff --git a/configs/pm9g45_defconfig b/configs/pm9g45_defconfig
index 3b2bf6c..c94c7c9 100644
--- a/configs/pm9g45_defconfig
+++ b/configs/pm9g45_defconfig
@@ -22,13 +22,13 @@
CONFIG_BOOTARGS="console=ttyS0,115200 mtdparts=atmel_nand:128k(bootstrap)ro,640k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),8M(kernel)ro,-(rootfs) root=/dev/mtdblock7 rw rootfstype=jffs2"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="nand read 0x70000000 0x180000 0x880000; nand read 0x70080000 0x200000 0x800000; bootz 0x70080000 - 0x70000000"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=281
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_RESET_PHY_R=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot> "
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=281
# CONFIG_CMD_BDI is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
diff --git a/configs/pogo_e02_defconfig b/configs/pogo_e02_defconfig
index d653ee4..b9a7610 100644
--- a/configs/pogo_e02_defconfig
+++ b/configs/pogo_e02_defconfig
@@ -20,10 +20,10 @@
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs $(bootargs_console); run bootcmd_usb; bootm 0x00800000 0x01100000"
CONFIG_USE_PREBOOT=y
+CONFIG_SYS_PBSIZE=1050
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_PROMPT="PogoE02> "
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=1050
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_NAND=y
CONFIG_CMD_USB=y
diff --git a/configs/pogo_v4_defconfig b/configs/pogo_v4_defconfig
index 101f20f..ce6be71 100644
--- a/configs/pogo_v4_defconfig
+++ b/configs/pogo_v4_defconfig
@@ -23,10 +23,10 @@
CONFIG_SHOW_BOOT_PROGRESS=y
CONFIG_BOOTDELAY=10
CONFIG_USE_PREBOOT=y
+CONFIG_SYS_PBSIZE=1050
CONFIG_BOARD_LATE_INIT=y
CONFIG_SYS_PROMPT="Pogo_V4> "
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=1050
# CONFIG_BOOTM_PLAN9 is not set
# CONFIG_BOOTM_RTEMS is not set
# CONFIG_BOOTM_VXWORKS is not set
diff --git a/configs/poleg_evb_defconfig b/configs/poleg_evb_defconfig
index 29b1297..99c6d69 100644
--- a/configs/poleg_evb_defconfig
+++ b/configs/poleg_evb_defconfig
@@ -20,10 +20,10 @@
CONFIG_FIT=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run common_bootargs; run romboot"
-CONFIG_SYS_PROMPT="U-Boot>"
-CONFIG_SYS_MAXARGS=32
CONFIG_SYS_CBSIZE=256
CONFIG_SYS_PBSIZE=280
+CONFIG_SYS_PROMPT="U-Boot>"
+CONFIG_SYS_MAXARGS=32
CONFIG_CMD_FUSE=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
@@ -60,6 +60,7 @@
CONFIG_NPCM_HOST=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_NPCM=y
+CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_WINBOND=y
diff --git a/configs/pomelo_defconfig b/configs/pomelo_defconfig
index 2f93365..2dbf4e6 100644
--- a/configs/pomelo_defconfig
+++ b/configs/pomelo_defconfig
@@ -9,15 +9,15 @@
CONFIG_DEFAULT_DEVICE_TREE="phytium-pomelo"
CONFIG_SYS_LOAD_ADDR=0x90000000
CONFIG_SYS_PCI_64BIT=y
+CONFIG_SYS_BOOTM_LEN=0x3c00000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyAMA0,115200 earlycon=pl011,0x28001000 root=/dev/sda2 rw"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=280
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SYS_PROMPT="pomelo#"
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=280
-CONFIG_SYS_BOOTM_LEN=0x3c00000
CONFIG_OF_CONTROL=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM_PCI_COMPAT=y
diff --git a/configs/poplar_defconfig b/configs/poplar_defconfig
index b6e0c31..fc98871 100644
--- a/configs/poplar_defconfig
+++ b/configs/poplar_defconfig
@@ -12,11 +12,11 @@
CONFIG_IDENT_STRING="poplar"
CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_CBSIZE=512
+CONFIG_SYS_PBSIZE=537
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_SYS_PROMPT="poplar# "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_CBSIZE=512
-CONFIG_SYS_PBSIZE=537
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
# CONFIG_ISO_PARTITION is not set
diff --git a/configs/popmetal-rk3288_defconfig b/configs/popmetal-rk3288_defconfig
index 2eee9ef..09af09e 100644
--- a/configs/popmetal-rk3288_defconfig
+++ b/configs/popmetal-rk3288_defconfig
@@ -21,6 +21,7 @@
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEBUG_UART=y
# CONFIG_ANDROID_BOOT_IMAGE is not set
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_USE_PREBOOT=y
CONFIG_DEFAULT_FDT_FILE="rk3288-popmetal.dtb"
CONFIG_SILENT_CONSOLE=y
@@ -31,7 +32,6 @@
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_STACK_R=y
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
@@ -62,7 +62,6 @@
CONFIG_SYS_I2C_ROCKCHIP=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
-CONFIG_MTD=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_GMAC_ROCKCHIP=y
CONFIG_PINCTRL=y
diff --git a/configs/porter_defconfig b/configs/porter_defconfig
index 5c172d5..0a805de 100644
--- a/configs/porter_defconfig
+++ b/configs/porter_defconfig
@@ -33,6 +33,8 @@
CONFIG_PCI=y
CONFIG_FIT=y
CONFIG_BOOTDELAY=3
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=256
CONFIG_SPL_MAX_SIZE=0x4000
CONFIG_SPL_NO_BSS_LIMIT=y
CONFIG_SPL_BOARD_INIT=y
@@ -44,8 +46,6 @@
CONFIG_SYS_SPI_U_BOOT_OFFS=0x140000
CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=256
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_XIMG is not set
diff --git a/configs/puma-rk3399_defconfig b/configs/puma-rk3399_defconfig
index b632fa3..c2aa02e 100644
--- a/configs/puma-rk3399_defconfig
+++ b/configs/puma-rk3399_defconfig
@@ -97,7 +97,6 @@
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_DWC3=y
diff --git a/configs/pxm2_defconfig b/configs/pxm2_defconfig
index e1d1066..bb9d0df 100644
--- a/configs/pxm2_defconfig
+++ b/configs/pxm2_defconfig
@@ -32,6 +32,7 @@
CONFIG_BOOT_RETRY_TIME=60
CONFIG_RESET_TO_RETRY=y
CONFIG_USE_PREBOOT=y
+CONFIG_SYS_PBSIZE=1049
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
@@ -52,7 +53,6 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot# "
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=1049
CONFIG_CMD_ASKENV=y
CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
diff --git a/configs/qcs404evb_defconfig b/configs/qcs404evb_defconfig
index 9e72f64..700c024 100644
--- a/configs/qcs404evb_defconfig
+++ b/configs/qcs404evb_defconfig
@@ -15,10 +15,10 @@
CONFIG_BOOTARGS="earlycon ignore_loglevel root= clk_ignore_unused"
CONFIG_SAVE_PREV_BL_FDT_ADDR=y
CONFIG_SAVE_PREV_BL_INITRAMFS_START_ADDR=y
+CONFIG_SYS_CBSIZE=512
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_CBSIZE=512
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
diff --git a/configs/qemu-riscv32_defconfig b/configs/qemu-riscv32_defconfig
index cf74a48..80d7246 100644
--- a/configs/qemu-riscv32_defconfig
+++ b/configs/qemu-riscv32_defconfig
@@ -9,10 +9,10 @@
CONFIG_SYS_LOAD_ADDR=0x80200000
CONFIG_TARGET_QEMU_VIRT=y
CONFIG_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_DISPLAY_CPUINFO=y
CONFIG_DISPLAY_BOARDINFO=y
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_BOOTEFI_SELFTEST=y
CONFIG_CMD_NVEDIT_EFI=y
# CONFIG_CMD_MII is not set
diff --git a/configs/qemu-riscv32_smode_defconfig b/configs/qemu-riscv32_smode_defconfig
index aeef2f3..ad349fc 100644
--- a/configs/qemu-riscv32_smode_defconfig
+++ b/configs/qemu-riscv32_smode_defconfig
@@ -10,10 +10,10 @@
CONFIG_TARGET_QEMU_VIRT=y
CONFIG_RISCV_SMODE=y
CONFIG_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_DISPLAY_CPUINFO=y
CONFIG_DISPLAY_BOARDINFO=y
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_BOOTEFI_SELFTEST=y
CONFIG_CMD_NVEDIT_EFI=y
# CONFIG_CMD_MII is not set
diff --git a/configs/qemu-riscv32_spl_defconfig b/configs/qemu-riscv32_spl_defconfig
index db9c971..4ff8ec8 100644
--- a/configs/qemu-riscv32_spl_defconfig
+++ b/configs/qemu-riscv32_spl_defconfig
@@ -13,13 +13,13 @@
# CONFIG_OF_BOARD_FIXUP is not set
CONFIG_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x80200000
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_DISPLAY_CPUINFO=y
CONFIG_DISPLAY_BOARDINFO=y
CONFIG_SPL_MAX_SIZE=0x100000
CONFIG_SPL_BSS_START_ADDR=0x84000000
CONFIG_SPL_SYS_MALLOC=y
-CONFIG_SYS_BOOTM_LEN=0x4000000
# CONFIG_CMD_MII is not set
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM_MTD=y
diff --git a/configs/qemu-riscv64_defconfig b/configs/qemu-riscv64_defconfig
index 9fb40b2..b8ccf8f 100644
--- a/configs/qemu-riscv64_defconfig
+++ b/configs/qemu-riscv64_defconfig
@@ -9,10 +9,10 @@
CONFIG_TARGET_QEMU_VIRT=y
CONFIG_ARCH_RV64I=y
CONFIG_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_DISPLAY_CPUINFO=y
CONFIG_DISPLAY_BOARDINFO=y
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_BOOTEFI_SELFTEST=y
CONFIG_CMD_NVEDIT_EFI=y
# CONFIG_CMD_MII is not set
diff --git a/configs/qemu-riscv64_smode_defconfig b/configs/qemu-riscv64_smode_defconfig
index e3b123c..6baad1d 100644
--- a/configs/qemu-riscv64_smode_defconfig
+++ b/configs/qemu-riscv64_smode_defconfig
@@ -10,12 +10,12 @@
CONFIG_ARCH_RV64I=y
CONFIG_RISCV_SMODE=y
CONFIG_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="setenv fdt_addr ${fdtcontroladdr}; fdt addr ${fdtcontroladdr};"
CONFIG_DISPLAY_CPUINFO=y
CONFIG_DISPLAY_BOARDINFO=y
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_BOOTEFI_SELFTEST=y
CONFIG_CMD_NVEDIT_EFI=y
# CONFIG_CMD_MII is not set
diff --git a/configs/qemu-riscv64_spl_defconfig b/configs/qemu-riscv64_spl_defconfig
index d6bf313..f663a13 100644
--- a/configs/qemu-riscv64_spl_defconfig
+++ b/configs/qemu-riscv64_spl_defconfig
@@ -12,13 +12,13 @@
CONFIG_RISCV_SMODE=y
CONFIG_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x80200000
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_DISPLAY_CPUINFO=y
CONFIG_DISPLAY_BOARDINFO=y
CONFIG_SPL_MAX_SIZE=0x100000
CONFIG_SPL_BSS_START_ADDR=0x84000000
CONFIG_SPL_SYS_MALLOC=y
-CONFIG_SYS_BOOTM_LEN=0x4000000
# CONFIG_CMD_MII is not set
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM_MTD=y
diff --git a/configs/qemu-x86_64_defconfig b/configs/qemu-x86_64_defconfig
index 2ff49fb..8b4c5af 100644
--- a/configs/qemu-x86_64_defconfig
+++ b/configs/qemu-x86_64_defconfig
@@ -57,7 +57,6 @@
CONFIG_BOOTP_BOOTFILESIZE=y
CONFIG_CMD_EFIDEBUG=y
CONFIG_CMD_TIME=y
-CONFIG_CMD_QFW=y
CONFIG_CMD_BOOTSTAGE=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_ENV_OVERWRITE=y
diff --git a/configs/qemu-x86_defconfig b/configs/qemu-x86_defconfig
index 246ac6b..9bcf06c 100644
--- a/configs/qemu-x86_defconfig
+++ b/configs/qemu-x86_defconfig
@@ -35,7 +35,6 @@
CONFIG_BOOTP_BOOTFILESIZE=y
CONFIG_CMD_EFIDEBUG=y
CONFIG_CMD_TIME=y
-CONFIG_CMD_QFW=y
CONFIG_CMD_BOOTSTAGE=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_MAC_PARTITION=y
diff --git a/configs/qemu_arm64_defconfig b/configs/qemu_arm64_defconfig
index c010c25..631d886 100644
--- a/configs/qemu_arm64_defconfig
+++ b/configs/qemu_arm64_defconfig
@@ -27,6 +27,7 @@
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_PCI_INIT_R=y
+CONFIG_CMD_SMBIOS=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_BOOTEFI_SELFTEST=y
CONFIG_CMD_NVEDIT_EFI=y
@@ -58,7 +59,6 @@
CONFIG_NVME_PCI=y
CONFIG_PCIE_ECAM_GENERIC=y
CONFIG_SCSI=y
-CONFIG_DM_SCSI=y
CONFIG_DEBUG_UART_PL011=y
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYSRESET=y
diff --git a/configs/qemu_arm_defconfig b/configs/qemu_arm_defconfig
index 9cc1f5f..9b74fb4 100644
--- a/configs/qemu_arm_defconfig
+++ b/configs/qemu_arm_defconfig
@@ -24,11 +24,11 @@
CONFIG_BOOTSTD_FULL=y
CONFIG_BOOTSTD_DEFAULTS=y
CONFIG_LEGACY_IMAGE_FORMAT=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_USE_PREBOOT=y
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_PCI_INIT_R=y
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_BOOTEFI_SELFTEST=y
CONFIG_CMD_NVEDIT_EFI=y
CONFIG_CMD_DFU=y
@@ -59,7 +59,6 @@
CONFIG_NVME_PCI=y
CONFIG_PCIE_ECAM_GENERIC=y
CONFIG_SCSI=y
-CONFIG_DM_SCSI=y
CONFIG_DEBUG_UART_PL011=y
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYSRESET=y
diff --git a/configs/quartz64-a-rk3566_defconfig b/configs/quartz64-a-rk3566_defconfig
index bf4d4cd..ade0886 100644
--- a/configs/quartz64-a-rk3566_defconfig
+++ b/configs/quartz64-a-rk3566_defconfig
@@ -97,7 +97,6 @@
CONFIG_PWM_ROCKCHIP=y
CONFIG_SPL_RAM=y
CONFIG_SCSI=y
-CONFIG_DM_SCSI=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550_MEM32=y
diff --git a/configs/quartz64-b-rk3566_defconfig b/configs/quartz64-b-rk3566_defconfig
index 358687a..8d01db5 100644
--- a/configs/quartz64-b-rk3566_defconfig
+++ b/configs/quartz64-b-rk3566_defconfig
@@ -93,7 +93,6 @@
CONFIG_PWM_ROCKCHIP=y
CONFIG_SPL_RAM=y
CONFIG_SCSI=y
-CONFIG_DM_SCSI=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550_MEM32=y
diff --git a/configs/r2dplus_defconfig b/configs/r2dplus_defconfig
index b9eaecb..1c87613 100644
--- a/configs/r2dplus_defconfig
+++ b/configs/r2dplus_defconfig
@@ -17,10 +17,10 @@
CONFIG_BOOTARGS="console=ttySC0,115200"
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="pci enum"
-CONFIG_DISPLAY_BOARDINFO=y
-CONFIG_HUSH_PARSER=y
CONFIG_SYS_CBSIZE=256
CONFIG_SYS_PBSIZE=256
+CONFIG_DISPLAY_BOARDINFO=y
+CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_DM=y
CONFIG_CMD_IDE=y
@@ -43,6 +43,7 @@
CONFIG_SYS_ATA_ALT_OFFSET=0x800
CONFIG_IDE_RESET=y
CONFIG_CLK=y
+CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_FLASH_SHOW_PROGRESS=0
diff --git a/configs/r8a77970_eagle_defconfig b/configs/r8a77970_eagle_defconfig
index 4d40dbf..5af9d09 100644
--- a/configs/r8a77970_eagle_defconfig
+++ b/configs/r8a77970_eagle_defconfig
@@ -24,6 +24,7 @@
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a77970-eagle.dtb; booti 0x48080000 - 0x48000000"
CONFIG_DEFAULT_FDT_FILE="r8a77970-eagle.dtb"
+CONFIG_SYS_PBSIZE=2068
CONFIG_SYS_MALLOC_BOOTPARAMS=y
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0xe631f000
@@ -31,7 +32,6 @@
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=2068
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_DFU=y
CONFIG_CMD_GPIO=y
diff --git a/configs/r8a77970_v3msk_defconfig b/configs/r8a77970_v3msk_defconfig
index 61e2618..458e4cb 100644
--- a/configs/r8a77970_v3msk_defconfig
+++ b/configs/r8a77970_v3msk_defconfig
@@ -24,6 +24,7 @@
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
CONFIG_USE_BOOTARGS=y
CONFIG_DEFAULT_FDT_FILE="r8a77970-v3msk.dtb"
+CONFIG_SYS_PBSIZE=2068
CONFIG_SYS_MALLOC_BOOTPARAMS=y
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0xe631f000
@@ -31,7 +32,6 @@
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=2068
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_DFU=y
diff --git a/configs/r8a77980_condor_defconfig b/configs/r8a77980_condor_defconfig
index b73129f..8d30392 100644
--- a/configs/r8a77980_condor_defconfig
+++ b/configs/r8a77980_condor_defconfig
@@ -23,6 +23,7 @@
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a77980-condor.dtb; booti 0x48080000 - 0x48000000"
CONFIG_DEFAULT_FDT_FILE="r8a77980-condor.dtb"
+CONFIG_SYS_PBSIZE=2068
# CONFIG_BOARD_EARLY_INIT_F is not set
CONFIG_SYS_MALLOC_BOOTPARAMS=y
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
@@ -31,7 +32,6 @@
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=2068
CONFIG_CMD_BOOTZ=y
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10
CONFIG_CMD_DFU=y
diff --git a/configs/r8a77980_v3hsk_defconfig b/configs/r8a77980_v3hsk_defconfig
index f48ed6c..cb6800e 100644
--- a/configs/r8a77980_v3hsk_defconfig
+++ b/configs/r8a77980_v3hsk_defconfig
@@ -22,6 +22,7 @@
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_USE_BOOTARGS=y
CONFIG_DEFAULT_FDT_FILE="r8a77980-v3hsk.dtb"
+CONFIG_SYS_PBSIZE=2068
# CONFIG_BOARD_EARLY_INIT_F is not set
CONFIG_SYS_MALLOC_BOOTPARAMS=y
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
@@ -30,7 +31,6 @@
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=2068
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_DFU=y
diff --git a/configs/r8a77990_ebisu_defconfig b/configs/r8a77990_ebisu_defconfig
index 1f7aa03..41a789d 100644
--- a/configs/r8a77990_ebisu_defconfig
+++ b/configs/r8a77990_ebisu_defconfig
@@ -24,6 +24,7 @@
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a77990-ebisu.dtb; booti 0x48080000 - 0x48000000"
CONFIG_DEFAULT_FDT_FILE="r8a77990-ebisu.dtb"
+CONFIG_SYS_PBSIZE=2068
# CONFIG_BOARD_EARLY_INIT_F is not set
CONFIG_SYS_MALLOC_BOOTPARAMS=y
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
@@ -32,7 +33,6 @@
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=2068
CONFIG_CMD_BOOTZ=y
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10
CONFIG_CMD_DFU=y
diff --git a/configs/r8a77995_draak_defconfig b/configs/r8a77995_draak_defconfig
index 22a8042..f7446b9 100644
--- a/configs/r8a77995_draak_defconfig
+++ b/configs/r8a77995_draak_defconfig
@@ -24,6 +24,7 @@
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a77995-draak.dtb; booti 0x48080000 - 0x48000000"
CONFIG_DEFAULT_FDT_FILE="r8a77995-draak.dtb"
+CONFIG_SYS_PBSIZE=2068
CONFIG_SYS_MALLOC_BOOTPARAMS=y
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0xe631f000
@@ -31,7 +32,6 @@
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=2068
CONFIG_CMD_BOOTZ=y
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10
CONFIG_CMD_DFU=y
diff --git a/configs/r8a779a0_falcon_defconfig b/configs/r8a779a0_falcon_defconfig
index 93f1055..f124dea 100644
--- a/configs/r8a779a0_falcon_defconfig
+++ b/configs/r8a779a0_falcon_defconfig
@@ -25,10 +25,10 @@
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a779a0-falcon.dtb; booti 0x48080000 - 0x48000000"
CONFIG_DEFAULT_FDT_FILE="r8a779a0-falcon.dtb"
+CONFIG_SYS_PBSIZE=2068
CONFIG_SYS_MALLOC_BOOTPARAMS=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=2068
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
diff --git a/configs/r8a779f0_spider_defconfig b/configs/r8a779f0_spider_defconfig
index f250d1a..2d27dfe 100644
--- a/configs/r8a779f0_spider_defconfig
+++ b/configs/r8a779f0_spider_defconfig
@@ -23,10 +23,10 @@
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="tftp 0x48080000 Image && tftp 0x48000000 Image-r8a779f0-spider.dtb && booti 0x48080000 - 0x48000000"
CONFIG_DEFAULT_FDT_FILE="r8a779f0-spider.dtb"
+CONFIG_SYS_CBSIZE=2048
CONFIG_SYS_MALLOC_BOOTPARAMS=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_CBSIZE=2048
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
@@ -74,7 +74,6 @@
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
CONFIG_SCSI=y
-CONFIG_DM_SCSI=y
CONFIG_BAUDRATE=1843200
CONFIG_SCIF_CONSOLE=y
CONFIG_SPI=y
diff --git a/configs/r8a779g0_whitehawk_defconfig b/configs/r8a779g0_whitehawk_defconfig
index 1d0805c..727c339 100644
--- a/configs/r8a779g0_whitehawk_defconfig
+++ b/configs/r8a779g0_whitehawk_defconfig
@@ -22,10 +22,10 @@
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="tftp 0x48080000 Image && tftp 0x48000000 Image-r8a779g0-white-hawk.dtb && booti 0x48080000 - 0x48000000"
CONFIG_DEFAULT_FDT_FILE="r8a779g0-white-hawk.dtb"
+CONFIG_SYS_CBSIZE=2048
CONFIG_SYS_MALLOC_BOOTPARAMS=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_CBSIZE=2048
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
diff --git a/configs/radxa-e25-rk3568_defconfig b/configs/radxa-e25-rk3568_defconfig
index 2dfff6a..5a613ab 100644
--- a/configs/radxa-e25-rk3568_defconfig
+++ b/configs/radxa-e25-rk3568_defconfig
@@ -78,7 +78,6 @@
CONFIG_PWM_ROCKCHIP=y
CONFIG_SPL_RAM=y
CONFIG_SCSI=y
-CONFIG_DM_SCSI=y
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSRESET=y
diff --git a/configs/radxa-zero2_defconfig b/configs/radxa-zero2_defconfig
index e941576..b795681 100644
--- a/configs/radxa-zero2_defconfig
+++ b/configs/radxa-zero2_defconfig
@@ -52,6 +52,7 @@
CONFIG_DEBUG_UART_SKIP_INIT=y
CONFIG_MESON_SERIAL=y
CONFIG_USB=y
+CONFIG_DM_USB_GADGET=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_DWC3=y
diff --git a/configs/rcar3_salvator-x_defconfig b/configs/rcar3_salvator-x_defconfig
index e045cf2..bc03bbc 100644
--- a/configs/rcar3_salvator-x_defconfig
+++ b/configs/rcar3_salvator-x_defconfig
@@ -24,6 +24,7 @@
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a77950-salvator-x.dtb; booti 0x48080000 - 0x48000000"
CONFIG_DEFAULT_FDT_FILE="r8a77950-salvator-x.dtb"
+CONFIG_SYS_PBSIZE=2068
CONFIG_SYS_MALLOC_BOOTPARAMS=y
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0xe633f000
@@ -31,7 +32,6 @@
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=2068
CONFIG_CMD_BOOTZ=y
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10
CONFIG_CMD_DFU=y
diff --git a/configs/rcar3_ulcb_defconfig b/configs/rcar3_ulcb_defconfig
index acbc314..d9f696b 100644
--- a/configs/rcar3_ulcb_defconfig
+++ b/configs/rcar3_ulcb_defconfig
@@ -23,6 +23,7 @@
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a77950-ulcb.dtb; booti 0x48080000 - 0x48000000"
CONFIG_DEFAULT_FDT_FILE="r8a77950-ulcb.dtb"
+CONFIG_SYS_PBSIZE=2068
CONFIG_SYS_MALLOC_BOOTPARAMS=y
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0xe633f000
@@ -30,7 +31,6 @@
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=2068
CONFIG_CMD_BOOTZ=y
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10
CONFIG_CMD_DFU=y
diff --git a/configs/renesas_rzg2l_smarc_defconfig b/configs/renesas_rzg2l_smarc_defconfig
index e17d226..e45579a 100644
--- a/configs/renesas_rzg2l_smarc_defconfig
+++ b/configs/renesas_rzg2l_smarc_defconfig
@@ -17,11 +17,11 @@
CONFIG_FIT=y
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_USE_BOOTARGS=y
+CONFIG_SYS_PBSIZE=2068
# CONFIG_BOARD_EARLY_INIT_F is not set
CONFIG_SYS_MALLOC_BOOTPARAMS=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=2068
CONFIG_CMD_CLK=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
diff --git a/configs/riotboard_defconfig b/configs/riotboard_defconfig
index 6ab405d..1b303e7 100644
--- a/configs/riotboard_defconfig
+++ b/configs/riotboard_defconfig
@@ -25,6 +25,7 @@
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTCOMMAND="run finduuid; run distro_bootcmd"
+CONFIG_SYS_PBSIZE=532
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
@@ -37,7 +38,6 @@
CONFIG_SPL_OS_BOOT=y
CONFIG_SPL_PAYLOAD_ARGS_ADDR=0x13000000
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
@@ -58,6 +58,7 @@
CONFIG_SYS_I2C_MXC=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_FSL_USDHC=y
+CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_SST=y
CONFIG_PHYLIB=y
diff --git a/configs/roc-pc-mezzanine-rk3399_defconfig b/configs/roc-pc-mezzanine-rk3399_defconfig
index 06d97c3..de6539b 100644
--- a/configs/roc-pc-mezzanine-rk3399_defconfig
+++ b/configs/roc-pc-mezzanine-rk3399_defconfig
@@ -81,7 +81,6 @@
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_DWC3=y
diff --git a/configs/roc-pc-rk3399_defconfig b/configs/roc-pc-rk3399_defconfig
index c53e862..7123a7a 100644
--- a/configs/roc-pc-rk3399_defconfig
+++ b/configs/roc-pc-rk3399_defconfig
@@ -82,7 +82,6 @@
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_OHCI_HCD=y
diff --git a/configs/rock-3a-rk3568_defconfig b/configs/rock-3a-rk3568_defconfig
index 28d157d..18372a5 100644
--- a/configs/rock-3a-rk3568_defconfig
+++ b/configs/rock-3a-rk3568_defconfig
@@ -91,7 +91,6 @@
CONFIG_PWM_ROCKCHIP=y
CONFIG_SPL_RAM=y
CONFIG_SCSI=y
-CONFIG_DM_SCSI=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550_MEM32=y
diff --git a/configs/rock-4c-plus-rk3399_defconfig b/configs/rock-4c-plus-rk3399_defconfig
index 3028a86..18525c8 100644
--- a/configs/rock-4c-plus-rk3399_defconfig
+++ b/configs/rock-4c-plus-rk3399_defconfig
@@ -74,7 +74,6 @@
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_DWC3=y
diff --git a/configs/rock-4se-rk3399_defconfig b/configs/rock-4se-rk3399_defconfig
index 9abe8bf..171de23 100644
--- a/configs/rock-4se-rk3399_defconfig
+++ b/configs/rock-4se-rk3399_defconfig
@@ -76,7 +76,6 @@
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_DWC3=y
diff --git a/configs/rock-pi-4-rk3399_defconfig b/configs/rock-pi-4-rk3399_defconfig
index 84e0dcf..83fc4ad 100644
--- a/configs/rock-pi-4-rk3399_defconfig
+++ b/configs/rock-pi-4-rk3399_defconfig
@@ -77,7 +77,6 @@
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_DWC3=y
diff --git a/configs/rock-pi-4c-rk3399_defconfig b/configs/rock-pi-4c-rk3399_defconfig
index 5c9fb14..0893440 100644
--- a/configs/rock-pi-4c-rk3399_defconfig
+++ b/configs/rock-pi-4c-rk3399_defconfig
@@ -74,7 +74,6 @@
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_DWC3=y
diff --git a/configs/rock-pi-n10-rk3399pro_defconfig b/configs/rock-pi-n10-rk3399pro_defconfig
index 1978fd5..dc4b3b4 100644
--- a/configs/rock-pi-n10-rk3399pro_defconfig
+++ b/configs/rock-pi-n10-rk3399pro_defconfig
@@ -68,7 +68,6 @@
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_DWC3=y
diff --git a/configs/rock-pi-n8-rk3288_defconfig b/configs/rock-pi-n8-rk3288_defconfig
index 2d83ba3..695effc 100644
--- a/configs/rock-pi-n8-rk3288_defconfig
+++ b/configs/rock-pi-n8-rk3288_defconfig
@@ -22,6 +22,7 @@
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEBUG_UART=y
# CONFIG_ANDROID_BOOT_IMAGE is not set
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_USE_PREBOOT=y
CONFIG_SILENT_CONSOLE=y
CONFIG_DISPLAY_BOARDINFO_LATE=y
@@ -30,7 +31,6 @@
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_STACK_R=y
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_SPL=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
diff --git a/configs/rock2_defconfig b/configs/rock2_defconfig
index ae9c5eb..3ebfb4e 100644
--- a/configs/rock2_defconfig
+++ b/configs/rock2_defconfig
@@ -21,6 +21,7 @@
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEBUG_UART=y
# CONFIG_ANDROID_BOOT_IMAGE is not set
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_USE_PREBOOT=y
CONFIG_DEFAULT_FDT_FILE="rk3288-rock2-square.dtb"
CONFIG_SILENT_CONSOLE=y
@@ -31,7 +32,6 @@
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_STACK_R=y
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
@@ -63,7 +63,6 @@
CONFIG_SYS_I2C_ROCKCHIP=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
-CONFIG_MTD=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_GMAC_ROCKCHIP=y
CONFIG_PINCTRL=y
diff --git a/configs/rock5a-rk3588s_defconfig b/configs/rock5a-rk3588s_defconfig
index a6471a5..efa7bcb 100644
--- a/configs/rock5a-rk3588s_defconfig
+++ b/configs/rock5a-rk3588s_defconfig
@@ -75,7 +75,6 @@
CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSRESET=y
CONFIG_USB=y
-CONFIG_DM_USB_GADGET=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
diff --git a/configs/rock5b-rk3588_defconfig b/configs/rock5b-rk3588_defconfig
index 0595325..a0678ff 100644
--- a/configs/rock5b-rk3588_defconfig
+++ b/configs/rock5b-rk3588_defconfig
@@ -92,14 +92,12 @@
CONFIG_PWM_ROCKCHIP=y
CONFIG_SPL_RAM=y
CONFIG_SCSI=y
-CONFIG_DM_SCSI=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550_MEM32=y
CONFIG_ROCKCHIP_SFC=y
CONFIG_SYSRESET=y
CONFIG_USB=y
-CONFIG_DM_USB_GADGET=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
diff --git a/configs/rock960-rk3399_defconfig b/configs/rock960-rk3399_defconfig
index fee10c4..b93dda5 100644
--- a/configs/rock960-rk3399_defconfig
+++ b/configs/rock960-rk3399_defconfig
@@ -18,6 +18,7 @@
CONFIG_DEBUG_UART=y
CONFIG_USE_PREBOOT=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock960.dtb"
+CONFIG_SYS_PBSIZE=1052
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_MISC_INIT_R=y
CONFIG_SPL_MAX_SIZE=0x2e000
@@ -32,7 +33,6 @@
CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
CONFIG_TPL=y
CONFIG_SYS_PROMPT="rock960 => "
-CONFIG_SYS_PBSIZE=1052
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
@@ -50,6 +50,7 @@
CONFIG_SYS_MMC_ENV_DEV=1
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MISC=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MMC_SDHCI=y
@@ -70,12 +71,12 @@
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_GENERIC=y
CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
CONFIG_USB_KEYBOARD=y
CONFIG_USB_HOST_ETHER=y
CONFIG_USB_ETHER_ASIX=y
diff --git a/configs/rock_defconfig b/configs/rock_defconfig
index e62e3f0..b3fa76f 100644
--- a/configs/rock_defconfig
+++ b/configs/rock_defconfig
@@ -32,7 +32,6 @@
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_STACK_R=y
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
-CONFIG_RANDOM_UUID=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SPI=y
@@ -54,7 +53,6 @@
CONFIG_LED=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
-CONFIG_MTD=y
CONFIG_PINCTRL=y
CONFIG_DM_PMIC=y
# CONFIG_SPL_PMIC_CHILDREN is not set
@@ -71,6 +69,7 @@
CONFIG_ROCKCHIP_TIMER=y
CONFIG_USB=y
CONFIG_ROCKCHIP_USB2_PHY=y
+CONFIG_RANDOM_UUID=y
CONFIG_SPL_TINY_MEMSET=y
CONFIG_CMD_DHRYSTONE=y
CONFIG_ERRNO_STR=y
diff --git a/configs/rockpro64-rk3399_defconfig b/configs/rockpro64-rk3399_defconfig
index 4cd6b76..fdc4b3d 100644
--- a/configs/rockpro64-rk3399_defconfig
+++ b/configs/rockpro64-rk3399_defconfig
@@ -85,7 +85,6 @@
CONFIG_DM_RNG=y
CONFIG_RNG_ROCKCHIP=y
CONFIG_SCSI=y
-CONFIG_DM_SCSI=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550_MEM32=y
@@ -93,7 +92,6 @@
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_OHCI_HCD=y
diff --git a/configs/rpi_0_w_defconfig b/configs/rpi_0_w_defconfig
index ac3b40c..bed143d 100644
--- a/configs/rpi_0_w_defconfig
+++ b/configs/rpi_0_w_defconfig
@@ -15,11 +15,11 @@
CONFIG_OF_BOARD_SETUP=y
CONFIG_FDT_SIMPLEFB=y
CONFIG_USE_PREBOOT=y
+CONFIG_SYS_PBSIZE=1049
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_MISC_INIT_R=y
CONFIG_SYS_PROMPT="U-Boot> "
-CONFIG_SYS_PBSIZE=1049
CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
diff --git a/configs/rpi_2_defconfig b/configs/rpi_2_defconfig
index b6e06cf..e4e4843 100644
--- a/configs/rpi_2_defconfig
+++ b/configs/rpi_2_defconfig
@@ -16,11 +16,11 @@
CONFIG_OF_BOARD_SETUP=y
CONFIG_FDT_SIMPLEFB=y
CONFIG_USE_PREBOOT=y
+CONFIG_SYS_PBSIZE=1049
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_MISC_INIT_R=y
CONFIG_SYS_PROMPT="U-Boot> "
-CONFIG_SYS_PBSIZE=1049
CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
diff --git a/configs/rpi_3_32b_defconfig b/configs/rpi_3_32b_defconfig
index eadc418..2153965 100644
--- a/configs/rpi_3_32b_defconfig
+++ b/configs/rpi_3_32b_defconfig
@@ -15,11 +15,11 @@
CONFIG_OF_BOARD_SETUP=y
CONFIG_FDT_SIMPLEFB=y
CONFIG_USE_PREBOOT=y
+CONFIG_SYS_PBSIZE=1049
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_MISC_INIT_R=y
CONFIG_SYS_PROMPT="U-Boot> "
-CONFIG_SYS_PBSIZE=1049
CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
diff --git a/configs/rpi_3_b_plus_defconfig b/configs/rpi_3_b_plus_defconfig
index 0e2faee..d1ec55e 100644
--- a/configs/rpi_3_b_plus_defconfig
+++ b/configs/rpi_3_b_plus_defconfig
@@ -14,11 +14,11 @@
CONFIG_OF_BOARD_SETUP=y
CONFIG_FDT_SIMPLEFB=y
CONFIG_USE_PREBOOT=y
+CONFIG_SYS_PBSIZE=1049
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_MISC_INIT_R=y
CONFIG_SYS_PROMPT="U-Boot> "
-CONFIG_SYS_PBSIZE=1049
CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
diff --git a/configs/rpi_3_defconfig b/configs/rpi_3_defconfig
index 6890af4..8e9c35b 100644
--- a/configs/rpi_3_defconfig
+++ b/configs/rpi_3_defconfig
@@ -14,11 +14,11 @@
CONFIG_OF_BOARD_SETUP=y
CONFIG_FDT_SIMPLEFB=y
CONFIG_USE_PREBOOT=y
+CONFIG_SYS_PBSIZE=1049
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_MISC_INIT_R=y
CONFIG_SYS_PROMPT="U-Boot> "
-CONFIG_SYS_PBSIZE=1049
CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
diff --git a/configs/rpi_4_32b_defconfig b/configs/rpi_4_32b_defconfig
index 734335c..fc58ea1 100644
--- a/configs/rpi_4_32b_defconfig
+++ b/configs/rpi_4_32b_defconfig
@@ -15,11 +15,11 @@
CONFIG_FDT_SIMPLEFB=y
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="pci enum; usb start;"
+CONFIG_SYS_PBSIZE=1049
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_MISC_INIT_R=y
CONFIG_SYS_PROMPT="U-Boot> "
-CONFIG_SYS_PBSIZE=1049
CONFIG_CMD_DFU=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
diff --git a/configs/rpi_4_defconfig b/configs/rpi_4_defconfig
index 2541b83..f5fb322 100644
--- a/configs/rpi_4_defconfig
+++ b/configs/rpi_4_defconfig
@@ -15,11 +15,11 @@
CONFIG_FDT_SIMPLEFB=y
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="pci enum; usb start;"
+CONFIG_SYS_PBSIZE=1049
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_MISC_INIT_R=y
CONFIG_SYS_PROMPT="U-Boot> "
-CONFIG_SYS_PBSIZE=1049
CONFIG_CMD_DFU=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
diff --git a/configs/rpi_arm64_defconfig b/configs/rpi_arm64_defconfig
index f9dade1..08bb30b 100644
--- a/configs/rpi_arm64_defconfig
+++ b/configs/rpi_arm64_defconfig
@@ -15,11 +15,11 @@
CONFIG_FDT_SIMPLEFB=y
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="pci enum; usb start;"
+CONFIG_SYS_PBSIZE=1049
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_MISC_INIT_R=y
CONFIG_SYS_PROMPT="U-Boot> "
-CONFIG_SYS_PBSIZE=1049
CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PCI=y
diff --git a/configs/rpi_defconfig b/configs/rpi_defconfig
index 29c1006..89d6372 100644
--- a/configs/rpi_defconfig
+++ b/configs/rpi_defconfig
@@ -15,11 +15,11 @@
CONFIG_OF_BOARD_SETUP=y
CONFIG_FDT_SIMPLEFB=y
CONFIG_USE_PREBOOT=y
+CONFIG_SYS_PBSIZE=1049
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_MISC_INIT_R=y
CONFIG_SYS_PROMPT="U-Boot> "
-CONFIG_SYS_PBSIZE=1049
CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
diff --git a/configs/rut_defconfig b/configs/rut_defconfig
index 248073b..5587683 100644
--- a/configs/rut_defconfig
+++ b/configs/rut_defconfig
@@ -32,6 +32,7 @@
CONFIG_BOOT_RETRY_TIME=60
CONFIG_RESET_TO_RETRY=y
CONFIG_USE_PREBOOT=y
+CONFIG_SYS_PBSIZE=1049
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
@@ -52,7 +53,6 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot# "
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=1049
CONFIG_CMD_ASKENV=y
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10
CONFIG_CMD_DFU=y
diff --git a/configs/rzg2_beacon_defconfig b/configs/rzg2_beacon_defconfig
index 73abe96..c7cefb9 100644
--- a/configs/rzg2_beacon_defconfig
+++ b/configs/rzg2_beacon_defconfig
@@ -19,11 +19,11 @@
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else booti ${loadaddr} - ${fdt_addr}; fi"
CONFIG_DEFAULT_FDT_FILE="r8a774a1-beacon-rzg2m-kit.dtb"
+CONFIG_SYS_PBSIZE=2068
# CONFIG_BOARD_EARLY_INIT_F is not set
CONFIG_SYS_MALLOC_BOOTPARAMS=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=2068
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
diff --git a/configs/s5p4418_nanopi2_defconfig b/configs/s5p4418_nanopi2_defconfig
index fe2475f..ee72778 100644
--- a/configs/s5p4418_nanopi2_defconfig
+++ b/configs/s5p4418_nanopi2_defconfig
@@ -28,10 +28,10 @@
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_BOOTDELAY=1
CONFIG_OF_BOARD_SETUP=y
+CONFIG_SYS_PBSIZE=1050
CONFIG_BOARD_LATE_INIT=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="nanopi2# "
-CONFIG_SYS_PBSIZE=1050
CONFIG_CMD_BOOTZ=y
# CONFIG_BOOTM_NETBSD is not set
# CONFIG_BOOTM_RTEMS is not set
diff --git a/configs/s5p_goni_defconfig b/configs/s5p_goni_defconfig
index c364f0c..297b57d 100644
--- a/configs/s5p_goni_defconfig
+++ b/configs/s5p_goni_defconfig
@@ -19,13 +19,13 @@
CONFIG_BOOTARGS="root=/dev/mtdblock8 rootfstype=ext4 ${console} ${meminfo} ${mtdparts}"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run mmcboot"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=384
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_MISC_INIT_R=y
CONFIG_HUSH_PARSER=y
# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="Goni # "
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=384
# CONFIG_CMD_XIMG is not set
CONFIG_CMD_THOR_DOWNLOAD=y
CONFIG_CMD_DFU=y
diff --git a/configs/s5pc210_universal_defconfig b/configs/s5pc210_universal_defconfig
index f585c51..67959ad 100644
--- a/configs/s5pc210_universal_defconfig
+++ b/configs/s5pc210_universal_defconfig
@@ -21,11 +21,11 @@
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="Please use defined boot"
CONFIG_BOOTCOMMAND="run mmcboot"
+CONFIG_SYS_PBSIZE=1024
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_MISC_INIT_R=y
CONFIG_SYS_PROMPT="Universal # "
-CONFIG_SYS_PBSIZE=1024
# CONFIG_CMD_XIMG is not set
CONFIG_CMD_THOR_DOWNLOAD=y
CONFIG_CMD_DFU=y
@@ -33,7 +33,6 @@
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB_MASS_STORAGE=y
-# CONFIG_CMD_NET is not set
CONFIG_CMD_CACHE=y
# CONFIG_CMD_SLEEP is not set
CONFIG_CMD_EXT4_WRITE=y
@@ -42,6 +41,7 @@
CONFIG_ENV_OVERWRITE=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+# CONFIG_NET is not set
CONFIG_DFU_MMC=y
CONFIG_SYS_DFU_DATA_BUF_SIZE=0x2000000
CONFIG_SYS_I2C_S3C24X0=y
@@ -49,7 +49,6 @@
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_S5P=y
-CONFIG_MTD=y
CONFIG_SAMSUNG_ONENAND=y
CONFIG_DM_PMIC=y
CONFIG_DM_PMIC_MAX8998=y
diff --git a/configs/sagem_f@st1704_ram_defconfig b/configs/sagem_f@st1704_ram_defconfig
index 789cd17..3028d49 100644
--- a/configs/sagem_f@st1704_ram_defconfig
+++ b/configs/sagem_f@st1704_ram_defconfig
@@ -17,13 +17,13 @@
CONFIG_MIPS_BOOT_FDT=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_SYS_CBSIZE=512
+CONFIG_SYS_PBSIZE=540
CONFIG_DISPLAY_CPUINFO=y
CONFIG_SYS_MALLOC_BOOTPARAMS=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="F@ST1704 # "
CONFIG_SYS_MAXARGS=24
-CONFIG_SYS_CBSIZE=512
-CONFIG_SYS_PBSIZE=540
CONFIG_CMD_CPU=y
CONFIG_CMD_LICENSE=y
# CONFIG_CMD_BOOTD is not set
diff --git a/configs/sam9x60_curiosity_mmc1_defconfig b/configs/sam9x60_curiosity_mmc1_defconfig
index a2453701..26e2823 100644
--- a/configs/sam9x60_curiosity_mmc1_defconfig
+++ b/configs/sam9x60_curiosity_mmc1_defconfig
@@ -26,13 +26,13 @@
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mmcblk1p2 rw rootwait"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="fatload mmc 1:1 0x21000000 at91-sam9x60_curiosity.dtb; fatload mmc 1:1 0x22000000 zImage; bootz 0x22000000 - 0x21000000"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=281
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_MISC_INIT_R=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot> "
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=281
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_CLK=y
CONFIG_CMD_DM=y
diff --git a/configs/sam9x60_curiosity_mmc_defconfig b/configs/sam9x60_curiosity_mmc_defconfig
index 38ec241..5ad90af 100644
--- a/configs/sam9x60_curiosity_mmc_defconfig
+++ b/configs/sam9x60_curiosity_mmc_defconfig
@@ -26,13 +26,13 @@
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mmcblk0p2 rw rootwait"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="fatload mmc 0:1 0x21000000 at91-sam9x60_curiosity.dtb; fatload mmc 0:1 0x22000000 zImage; bootz 0x22000000 - 0x21000000"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=281
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_MISC_INIT_R=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot> "
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=281
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_CLK=y
CONFIG_CMD_DM=y
diff --git a/configs/sam9x60ek_mmc_defconfig b/configs/sam9x60ek_mmc_defconfig
index 7cb4ab1..0fd4264 100644
--- a/configs/sam9x60ek_mmc_defconfig
+++ b/configs/sam9x60ek_mmc_defconfig
@@ -27,13 +27,13 @@
CONFIG_BOOTARGS="mem=256M console=ttyS0,115200 root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="fatload mmc 0:1 0x21000000 at91-sam9x60ek.dtb;fatload mmc 0:1 0x22000000 zImage;bootz 0x22000000 - 0x21000000"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=281
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_MISC_INIT_R=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot> "
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=281
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_CLK=y
CONFIG_CMD_DM=y
diff --git a/configs/sam9x60ek_nandflash_defconfig b/configs/sam9x60ek_nandflash_defconfig
index 4bfd0e8..2c464d7 100644
--- a/configs/sam9x60ek_nandflash_defconfig
+++ b/configs/sam9x60ek_nandflash_defconfig
@@ -27,13 +27,13 @@
CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,768k(uboot)ro,256k(env_redundant),256k(env),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=12 root=ubi0:rootfs rw"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="nand read 0x22000000 0x200000 0x600000; nand read 0x21000000 0x180000 0x20000; bootz 0x22000000 - 0x21000000"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=281
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_MISC_INIT_R=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot> "
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=281
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_CLK=y
CONFIG_CMD_DM=y
diff --git a/configs/sam9x60ek_qspiflash_defconfig b/configs/sam9x60ek_qspiflash_defconfig
index c7224da..14e116b 100644
--- a/configs/sam9x60ek_qspiflash_defconfig
+++ b/configs/sam9x60ek_qspiflash_defconfig
@@ -27,13 +27,13 @@
CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,768k(uboot)ro,256k(env_redundant),256k(env),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=12 root=ubi0:rootfs rw"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="sf probe 0; sf read 0x21000000 0x180000 0x80000; sf read 0x22000000 0x200000 0x600000; bootz 0x22000000 - 0x21000000"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=281
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_MISC_INIT_R=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot> "
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=281
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_CLK=y
CONFIG_CMD_DM=y
diff --git a/configs/sama5d27_giantboard_defconfig b/configs/sama5d27_giantboard_defconfig
index 677658d..6637d15 100644
--- a/configs/sama5d27_giantboard_defconfig
+++ b/configs/sama5d27_giantboard_defconfig
@@ -39,6 +39,8 @@
CONFIG_USE_BOOTARGS=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="fatload mmc 0 0x22000000 at91-sama5d27_giantboard.dtb; fatload mmc 0 0x23000000 zImage; bootz 0x23000000 - 0x22000000"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_MISC_INIT_R=y
CONFIG_SPL_MAX_SIZE=0x10000
@@ -49,8 +51,6 @@
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_SYS_MALLOC_SIZE=0x80000
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_I2C=y
# CONFIG_CMD_LOADS is not set
@@ -78,6 +78,7 @@
CONFIG_SYS_I2C_AT91=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ATMEL=y
+CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
CONFIG_PINCTRL=y
CONFIG_SPL_PINCTRL=y
diff --git a/configs/sama5d27_som1_ek_mmc1_defconfig b/configs/sama5d27_som1_ek_mmc1_defconfig
index ec82311..699361a 100644
--- a/configs/sama5d27_som1_ek_mmc1_defconfig
+++ b/configs/sama5d27_som1_ek_mmc1_defconfig
@@ -36,6 +36,8 @@
CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk root=/dev/mmcblk1p2 rw rootwait"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="fatload mmc 1 0x22000000 at91-sama5d27_som1_ek.dtb; fatload mmc 1 0x23000000 zImage; bootz 0x23000000 - 0x22000000"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_MISC_INIT_R=y
CONFIG_SPL_MAX_SIZE=0x10000
@@ -46,10 +48,7 @@
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_SYS_MALLOC_SIZE=0x80000
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_BOOTZ=y
-CONFIG_CMD_DM=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
diff --git a/configs/sama5d27_som1_ek_mmc_defconfig b/configs/sama5d27_som1_ek_mmc_defconfig
index f303744..3a5bba8 100644
--- a/configs/sama5d27_som1_ek_mmc_defconfig
+++ b/configs/sama5d27_som1_ek_mmc_defconfig
@@ -37,6 +37,8 @@
CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk root=/dev/mmcblk0p2 rw rootwait"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="fatload mmc 0 0x22000000 at91-sama5d27_som1_ek.dtb; fatload mmc 0 0x23000000 zImage; bootz 0x23000000 - 0x22000000"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_MISC_INIT_R=y
CONFIG_SPL_MAX_SIZE=0x10000
@@ -47,10 +49,7 @@
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_SYS_MALLOC_SIZE=0x80000
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_BOOTZ=y
-CONFIG_CMD_DM=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
diff --git a/configs/sama5d27_som1_ek_qspiflash_defconfig b/configs/sama5d27_som1_ek_qspiflash_defconfig
index eed190d..6835d6f 100644
--- a/configs/sama5d27_som1_ek_qspiflash_defconfig
+++ b/configs/sama5d27_som1_ek_qspiflash_defconfig
@@ -35,6 +35,8 @@
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk root=/dev/mmcblk0p2 rw rootwait"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_MISC_INIT_R=y
CONFIG_SPL_MAX_SIZE=0x10000
@@ -45,10 +47,7 @@
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_SYS_MALLOC_SIZE=0x80000
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_BOOTZ=y
-CONFIG_CMD_DM=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
diff --git a/configs/sama5d27_wlsom1_ek_mmc_defconfig b/configs/sama5d27_wlsom1_ek_mmc_defconfig
index 2b8461d..1246b76 100644
--- a/configs/sama5d27_wlsom1_ek_mmc_defconfig
+++ b/configs/sama5d27_wlsom1_ek_mmc_defconfig
@@ -35,6 +35,8 @@
CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk root=/dev/mmcblk0p2 rw rootwait"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="if test ! -n ${dtb_name}; then setenv dtb_name at91-${board_name}.dtb; fi; fatload mmc 0:1 0x21000000 ${dtb_name}; fatload mmc 0:1 0x22000000 zImage; bootz 0x22000000 - 0x21000000"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_MISC_INIT_R=y
@@ -49,10 +51,7 @@
# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
CONFIG_SPL_AT91_MCK_BYPASS=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_BOOTZ=y
-CONFIG_CMD_DM=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
diff --git a/configs/sama5d27_wlsom1_ek_qspiflash_defconfig b/configs/sama5d27_wlsom1_ek_qspiflash_defconfig
index f47183a..b734046 100644
--- a/configs/sama5d27_wlsom1_ek_qspiflash_defconfig
+++ b/configs/sama5d27_wlsom1_ek_qspiflash_defconfig
@@ -35,6 +35,8 @@
CONFIG_USE_BOOTARGS=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="sf probe 0; sf read 0x21000000 0x60000 0xc000; sf read 0x22000000 0x6c000 0x394000; bootz 0x22000000 - 0x21000000"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_MISC_INIT_R=y
@@ -52,10 +54,7 @@
CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
CONFIG_SPL_AT91_MCK_BYPASS=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_BOOTZ=y
-CONFIG_CMD_DM=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
diff --git a/configs/sama5d29_curiosity_mmc1_defconfig b/configs/sama5d29_curiosity_mmc1_defconfig
index bef7dbe..fedccb4 100644
--- a/configs/sama5d29_curiosity_mmc1_defconfig
+++ b/configs/sama5d29_curiosity_mmc1_defconfig
@@ -25,6 +25,7 @@
CONFIG_ENV_VARS_UBOOT_CONFIG=y
CONFIG_FIT=y
# CONFIG_BOOTSTD is not set
+CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_QSPI_BOOT=y
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=3
@@ -36,13 +37,11 @@
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
-CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEM_SEARCH=y
CONFIG_CMD_MX_CYCLIC=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_STRINGS=y
-CONFIG_CMD_DM=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_LSBLK=y
diff --git a/configs/sama5d29_curiosity_mmc_defconfig b/configs/sama5d29_curiosity_mmc_defconfig
index c3ccea3..204b248 100644
--- a/configs/sama5d29_curiosity_mmc_defconfig
+++ b/configs/sama5d29_curiosity_mmc_defconfig
@@ -25,6 +25,7 @@
CONFIG_ENV_VARS_UBOOT_CONFIG=y
CONFIG_FIT=y
# CONFIG_BOOTSTD is not set
+CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_QSPI_BOOT=y
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=3
@@ -36,13 +37,11 @@
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
-CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEM_SEARCH=y
CONFIG_CMD_MX_CYCLIC=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_STRINGS=y
-CONFIG_CMD_DM=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_LSBLK=y
diff --git a/configs/sama5d29_curiosity_qspiflash_defconfig b/configs/sama5d29_curiosity_qspiflash_defconfig
index 952cc0e..e4ccbd1 100644
--- a/configs/sama5d29_curiosity_qspiflash_defconfig
+++ b/configs/sama5d29_curiosity_qspiflash_defconfig
@@ -25,6 +25,7 @@
CONFIG_ENV_VARS_UBOOT_CONFIG=y
CONFIG_FIT=y
# CONFIG_BOOTSTD is not set
+CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_QSPI_BOOT=y
CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=3
@@ -36,13 +37,11 @@
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
-CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEM_SEARCH=y
CONFIG_CMD_MX_CYCLIC=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_STRINGS=y
-CONFIG_CMD_DM=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_LSBLK=y
diff --git a/configs/sama5d2_icp_mmc_defconfig b/configs/sama5d2_icp_mmc_defconfig
index 7ad94ec..faf1f43 100644
--- a/configs/sama5d2_icp_mmc_defconfig
+++ b/configs/sama5d2_icp_mmc_defconfig
@@ -36,6 +36,8 @@
CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk root=/dev/mmcblk0p2 rw rootwait"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="fatload mmc 0:1 0x21000000 at91-sama5d2_icp.dtb; fatload mmc 0:1 0x22000000 zImage; bootz 0x22000000 - 0x21000000"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_MISC_INIT_R=y
CONFIG_SPL_MAX_SIZE=0x10000
@@ -52,8 +54,6 @@
CONFIG_SPL_RAM_DEVICE=y
CONFIG_SPL_AT91_MCK_BYPASS=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
CONFIG_CMD_DM=y
@@ -88,6 +88,7 @@
CONFIG_I2C_EEPROM=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ATMEL=y
+CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SF_DEFAULT_BUS=2
CONFIG_SPI_FLASH_SFDP_SUPPORT=y
diff --git a/configs/sama5d2_icp_qspiflash_defconfig b/configs/sama5d2_icp_qspiflash_defconfig
index c5f78d5..09c5f00 100644
--- a/configs/sama5d2_icp_qspiflash_defconfig
+++ b/configs/sama5d2_icp_qspiflash_defconfig
@@ -29,11 +29,11 @@
CONFIG_BOOTARGS="console=ttyS0,115200 earlycon earlyprintk=serial,ttyS0, ignore_loglevel root=/dev/mmcblk0p2 memtest=0 rootfstype=ext4 rw rootwait"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="fatload mmc 0:1 0x21000000 at91-sama5d2_icp.dtb; fatload mmc 0:1 0x22000000 zImage; bootz 0x22000000 - 0x21000000"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_MISC_INIT_R=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_CONFIG=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
@@ -42,7 +42,6 @@
CONFIG_CMD_MEMTEST=y
CONFIG_SYS_ALT_MEMTEST=y
CONFIG_CMD_CLK=y
-CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
# CONFIG_CMD_LOADS is not set
diff --git a/configs/sama5d2_ptc_ek_mmc_defconfig b/configs/sama5d2_ptc_ek_mmc_defconfig
index 70f6102..39adab3 100644
--- a/configs/sama5d2_ptc_ek_mmc_defconfig
+++ b/configs/sama5d2_ptc_ek_mmc_defconfig
@@ -24,12 +24,12 @@
CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk root=/dev/mmcblk0p2 rw rootwait"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="if test ! -n ${dtb_name}; then setenv dtb_name at91-${board_name}.dtb; fi; fatload mmc 0:1 0x21000000 ${dtb_name}; fatload mmc 0:1 0x22000000 zImage; bootz 0x22000000 - 0x21000000"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
CONFIG_CONSOLE_MUX=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_MISC_INIT_R=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_DM=y
# CONFIG_CMD_FLASH is not set
diff --git a/configs/sama5d2_ptc_ek_nandflash_defconfig b/configs/sama5d2_ptc_ek_nandflash_defconfig
index e55b140..06546e7 100644
--- a/configs/sama5d2_ptc_ek_nandflash_defconfig
+++ b/configs/sama5d2_ptc_ek_nandflash_defconfig
@@ -24,12 +24,12 @@
CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,768k(uboot)ro,256K(env_redundant),256k(env),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=6 root=ubi0:rootfs"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="nand read 0x21000000 0x180000 0x80000;nand read 0x22000000 0x200000 0x600000;bootz 0x22000000 - 0x21000000"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
CONFIG_CONSOLE_MUX=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_MISC_INIT_R=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_DM=y
# CONFIG_CMD_FLASH is not set
diff --git a/configs/sama5d2_xplained_emmc_defconfig b/configs/sama5d2_xplained_emmc_defconfig
index 7c37336..57cdc48 100644
--- a/configs/sama5d2_xplained_emmc_defconfig
+++ b/configs/sama5d2_xplained_emmc_defconfig
@@ -37,6 +37,8 @@
CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk root=/dev/mmcblk0p2 rw rootwait"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="fatload mmc 0:1 0x22000000 at91-sama5d2_xplained.dtb; fatload mmc 0:1 0x23000000 zImage; bootz 0x23000000 - 0x22000000"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SPL_MAX_SIZE=0x10000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
@@ -46,10 +48,7 @@
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_SYS_MALLOC_SIZE=0x80000
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_BOOTZ=y
-CONFIG_CMD_DM=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
diff --git a/configs/sama5d2_xplained_mmc_defconfig b/configs/sama5d2_xplained_mmc_defconfig
index 26b281f..47f67a4 100644
--- a/configs/sama5d2_xplained_mmc_defconfig
+++ b/configs/sama5d2_xplained_mmc_defconfig
@@ -38,6 +38,8 @@
CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk root=/dev/mmcblk1p2 rw rootwait"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="fatload mmc 1:1 0x22000000 at91-sama5d2_xplained.dtb; fatload mmc 1:1 0x23000000 zImage; bootz 0x23000000 - 0x22000000"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_MISC_INIT_R=y
CONFIG_SPL_MAX_SIZE=0x10000
@@ -48,10 +50,7 @@
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_SYS_MALLOC_SIZE=0x80000
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_BOOTZ=y
-CONFIG_CMD_DM=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
diff --git a/configs/sama5d2_xplained_qspiflash_defconfig b/configs/sama5d2_xplained_qspiflash_defconfig
index 9ed35e3..f9d9e83 100644
--- a/configs/sama5d2_xplained_qspiflash_defconfig
+++ b/configs/sama5d2_xplained_qspiflash_defconfig
@@ -39,6 +39,8 @@
CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk root=/dev/mmcblk0p1 rw rootwait"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="sf probe 1:0; sf read 0x22000000 0x180000 0x80000; sf read 0x23000000 0x200000 0x600000; bootz 0x23000000 - 0x22000000"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_MISC_INIT_R=y
CONFIG_SPL_MAX_SIZE=0x10000
@@ -49,10 +51,7 @@
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_SYS_MALLOC_SIZE=0x80000
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_BOOTZ=y
-CONFIG_CMD_DM=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
diff --git a/configs/sama5d2_xplained_spiflash_defconfig b/configs/sama5d2_xplained_spiflash_defconfig
index b87a63f..740abb1 100644
--- a/configs/sama5d2_xplained_spiflash_defconfig
+++ b/configs/sama5d2_xplained_spiflash_defconfig
@@ -40,6 +40,8 @@
CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk root=/dev/mmcblk0p1 rw rootwait"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="ext4load mmc 0:1 0x22000000 /boot/at91-sama5d2_xplained.dtb; ext4load mmc 0:1 0x23000000 /boot/zImage; bootz 0x23000000 - 0x22000000"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_MISC_INIT_R=y
CONFIG_SPL_MAX_SIZE=0x10000
@@ -53,10 +55,7 @@
CONFIG_SPL_SPI_LOAD=y
CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_BOOTZ=y
-CONFIG_CMD_DM=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
diff --git a/configs/sama5d36ek_cmp_mmc_defconfig b/configs/sama5d36ek_cmp_mmc_defconfig
index 8504019..5736c5a 100644
--- a/configs/sama5d36ek_cmp_mmc_defconfig
+++ b/configs/sama5d36ek_cmp_mmc_defconfig
@@ -25,12 +25,12 @@
CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk root=/dev/mmcblk0p2 rw rootwait"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="if test ! -n ${dtb_name}; then setenv dtb_name at91-${board_name}.dtb; fi; fatload mmc 0:1 0x21000000 ${dtb_name}; fatload mmc 0:1 0x22000000 zImage; bootz 0x22000000 - 0x21000000"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_LOADS is not set
diff --git a/configs/sama5d36ek_cmp_nandflash_defconfig b/configs/sama5d36ek_cmp_nandflash_defconfig
index e0f4fe5..f3cb280 100644
--- a/configs/sama5d36ek_cmp_nandflash_defconfig
+++ b/configs/sama5d36ek_cmp_nandflash_defconfig
@@ -25,12 +25,12 @@
CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,768k(uboot)ro,256K(env_redundant),256k(env),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=6 root=ubi0:rootfs"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="nand read 0x21000000 0x180000 0x80000;nand read 0x22000000 0x200000 0x600000;bootz 0x22000000 - 0x21000000"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_LOADS is not set
diff --git a/configs/sama5d36ek_cmp_spiflash_defconfig b/configs/sama5d36ek_cmp_spiflash_defconfig
index 9fc511d..704e783 100644
--- a/configs/sama5d36ek_cmp_spiflash_defconfig
+++ b/configs/sama5d36ek_cmp_spiflash_defconfig
@@ -27,12 +27,12 @@
CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,768k(uboot)ro,256K(env_redundant),256k(env),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=6 root=ubi0:rootfs"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="sf probe 0; sf read 0x21000000 0x60000 0xc000; sf read 0x22000000 0x6c000 0x394000; bootz 0x22000000 - 0x21000000"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_LOADS is not set
diff --git a/configs/sama5d3_xplained_mmc_defconfig b/configs/sama5d3_xplained_mmc_defconfig
index fc0de8c..851d01b 100644
--- a/configs/sama5d3_xplained_mmc_defconfig
+++ b/configs/sama5d3_xplained_mmc_defconfig
@@ -36,6 +36,8 @@
CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk root=/dev/mmcblk0p2 rw rootwait"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="if test ! -n ${dtb_name}; then setenv dtb_name at91-${board_name}.dtb; fi; fatload mmc 0:1 0x21000000 ${dtb_name}; fatload mmc 0:1 0x22000000 zImage; bootz 0x22000000 - 0x21000000"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SPL_MAX_SIZE=0x18000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
@@ -45,8 +47,6 @@
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_SYS_MALLOC_SIZE=0x80000
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_LOADS is not set
diff --git a/configs/sama5d3_xplained_nandflash_defconfig b/configs/sama5d3_xplained_nandflash_defconfig
index a0802f9..7372c37 100644
--- a/configs/sama5d3_xplained_nandflash_defconfig
+++ b/configs/sama5d3_xplained_nandflash_defconfig
@@ -33,6 +33,8 @@
CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,768k(uboot)ro,256K(env_redundant),256k(env),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=6 root=ubi0:rootfs"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="nand read 0x21000000 0x180000 0x80000;nand read 0x22000000 0x200000 0x600000;bootz 0x22000000 - 0x21000000"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SPL_MAX_SIZE=0x18000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
@@ -45,8 +47,6 @@
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_BASE=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_LOADS is not set
diff --git a/configs/sama5d3xek_mmc_defconfig b/configs/sama5d3xek_mmc_defconfig
index 631e85e..82541c2 100644
--- a/configs/sama5d3xek_mmc_defconfig
+++ b/configs/sama5d3xek_mmc_defconfig
@@ -36,6 +36,8 @@
CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk root=/dev/mmcblk0p2 rw rootwait"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="if test ! -n ${dtb_name}; then setenv dtb_name at91-${board_name}.dtb; fi; fatload mmc 0:1 0x21000000 ${dtb_name}; fatload mmc 0:1 0x22000000 zImage; bootz 0x22000000 - 0x21000000"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
@@ -47,8 +49,6 @@
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_SYS_MALLOC_SIZE=0x80000
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
CONFIG_CMD_IMLS=y
diff --git a/configs/sama5d3xek_nandflash_defconfig b/configs/sama5d3xek_nandflash_defconfig
index d96bb91..a886664 100644
--- a/configs/sama5d3xek_nandflash_defconfig
+++ b/configs/sama5d3xek_nandflash_defconfig
@@ -33,6 +33,8 @@
CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,768k(uboot)ro,256K(env_redundant),256k(env),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=6 root=ubi0:rootfs"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="nand read 0x21000000 0x180000 0x80000;nand read 0x22000000 0x200000 0x600000;bootz 0x22000000 - 0x21000000"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
@@ -47,8 +49,6 @@
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_BASE=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
CONFIG_CMD_IMLS=y
diff --git a/configs/sama5d3xek_spiflash_defconfig b/configs/sama5d3xek_spiflash_defconfig
index 5f47f8b..25a330a 100644
--- a/configs/sama5d3xek_spiflash_defconfig
+++ b/configs/sama5d3xek_spiflash_defconfig
@@ -38,6 +38,8 @@
CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,768k(uboot)ro,256K(env_redundant),256k(env),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=6 root=ubi0:rootfs"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="sf probe 0; sf read 0x21000000 0x60000 0xc000; sf read 0x22000000 0x6c000 0x394000; bootz 0x22000000 - 0x21000000"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SPL_MAX_SIZE=0x18000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
@@ -50,8 +52,6 @@
CONFIG_SPL_SPI_LOAD=y
CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_FLASH is not set
diff --git a/configs/sama5d4_xplained_mmc_defconfig b/configs/sama5d4_xplained_mmc_defconfig
index 9f0349e..c980535 100644
--- a/configs/sama5d4_xplained_mmc_defconfig
+++ b/configs/sama5d4_xplained_mmc_defconfig
@@ -37,6 +37,8 @@
CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk root=/dev/mmcblk0p2 rw rootwait"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="if test ! -n ${dtb_name}; then setenv dtb_name at91-${board_name}.dtb; fi; fatload mmc 0:1 0x21000000 ${dtb_name}; fatload mmc 0:1 0x22000000 zImage; bootz 0x22000000 - 0x21000000"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_MISC_INIT_R=y
CONFIG_SPL_MAX_SIZE=0x18000
@@ -47,8 +49,6 @@
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_SYS_MALLOC_SIZE=0x80000
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_LOADS is not set
diff --git a/configs/sama5d4_xplained_nandflash_defconfig b/configs/sama5d4_xplained_nandflash_defconfig
index 68101a1..64f098a 100644
--- a/configs/sama5d4_xplained_nandflash_defconfig
+++ b/configs/sama5d4_xplained_nandflash_defconfig
@@ -34,6 +34,8 @@
CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,768k(uboot)ro,256K(env_redundant),256k(env),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=6 root=ubi0:rootfs"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="nand read 0x21000000 0x180000 0x80000;nand read 0x22000000 0x200000 0x600000;bootz 0x22000000 - 0x21000000"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_MISC_INIT_R=y
CONFIG_SPL_MAX_SIZE=0x18000
@@ -47,8 +49,6 @@
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_BASE=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_LOADS is not set
diff --git a/configs/sama5d4_xplained_spiflash_defconfig b/configs/sama5d4_xplained_spiflash_defconfig
index 0d239ef..e1ac045 100644
--- a/configs/sama5d4_xplained_spiflash_defconfig
+++ b/configs/sama5d4_xplained_spiflash_defconfig
@@ -39,6 +39,8 @@
CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,768k(uboot)ro,256K(env_redundant),256k(env),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=6 root=ubi0:rootfs"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="sf probe 0; sf read 0x21000000 0x60000 0xc000; sf read 0x22000000 0x6c000 0x394000; bootz 0x22000000 - 0x21000000"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_MISC_INIT_R=y
CONFIG_SPL_MAX_SIZE=0x18000
@@ -52,8 +54,6 @@
CONFIG_SPL_SPI_LOAD=y
CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_LOADS is not set
diff --git a/configs/sama5d4ek_mmc_defconfig b/configs/sama5d4ek_mmc_defconfig
index 4139fcf..3434fc0 100644
--- a/configs/sama5d4ek_mmc_defconfig
+++ b/configs/sama5d4ek_mmc_defconfig
@@ -36,6 +36,8 @@
CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk root=/dev/mmcblk0p2 rw rootwait"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="if test ! -n ${dtb_name}; then setenv dtb_name at91-${board_name}.dtb; fi; fatload mmc 0:1 0x21000000 ${dtb_name}; fatload mmc 0:1 0x22000000 zImage; bootz 0x22000000 - 0x21000000"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
@@ -47,8 +49,6 @@
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_SYS_MALLOC_SIZE=0x80000
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_FLASH is not set
diff --git a/configs/sama5d4ek_nandflash_defconfig b/configs/sama5d4ek_nandflash_defconfig
index b8062db..8b8e04e 100644
--- a/configs/sama5d4ek_nandflash_defconfig
+++ b/configs/sama5d4ek_nandflash_defconfig
@@ -33,6 +33,8 @@
CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,768k(uboot)ro,256K(env_redundant),256k(env),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=6 root=ubi0:rootfs"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="nand read 0x21000000 0x180000 0x80000;nand read 0x22000000 0x200000 0x600000;bootz 0x22000000 - 0x21000000"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
@@ -47,8 +49,6 @@
CONFIG_SPL_NAND_DRIVERS=y
CONFIG_SPL_NAND_BASE=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_FLASH is not set
diff --git a/configs/sama5d4ek_spiflash_defconfig b/configs/sama5d4ek_spiflash_defconfig
index f41c4e9..53c86ca 100644
--- a/configs/sama5d4ek_spiflash_defconfig
+++ b/configs/sama5d4ek_spiflash_defconfig
@@ -38,6 +38,8 @@
CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,768k(uboot)ro,256K(env_redundant),256k(env),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=6 root=ubi0:rootfs"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="sf probe 0; sf read 0x21000000 0x60000 0xc000; sf read 0x22000000 0x6c000 0x394000; bootz 0x22000000 - 0x21000000"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SPL_MAX_SIZE=0x18000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
@@ -50,8 +52,6 @@
CONFIG_SPL_SPI_LOAD=y
CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_FLASH is not set
diff --git a/configs/sama7g5ek_mmc1_defconfig b/configs/sama7g5ek_mmc1_defconfig
index 2f3ccb3..4e400d3 100644
--- a/configs/sama7g5ek_mmc1_defconfig
+++ b/configs/sama7g5ek_mmc1_defconfig
@@ -19,17 +19,17 @@
CONFIG_SYS_MEMTEST_END=0x70000000
CONFIG_ENV_VARS_UBOOT_CONFIG=y
CONFIG_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_SD_BOOT=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mmcblk1p2 rw rootwait"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="fatload mmc 1:1 0x61000000 at91-sama7g5ek.dtb; fatload mmc 1:1 0x62000000 zImage; bootz 0x62000000 - 0x61000000"
-CONFIG_MISC_INIT_R=y
-CONFIG_HUSH_PARSER=y
CONFIG_SYS_CBSIZE=256
CONFIG_SYS_PBSIZE=276
+CONFIG_MISC_INIT_R=y
+CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
-CONFIG_SYS_BOOTM_LEN=0x2000000
# CONFIG_CMD_IMI is not set
CONFIG_CMD_MD5SUM=y
CONFIG_CMD_MEMTEST=y
diff --git a/configs/sama7g5ek_mmc_defconfig b/configs/sama7g5ek_mmc_defconfig
index c5cbd89..b31be99 100644
--- a/configs/sama7g5ek_mmc_defconfig
+++ b/configs/sama7g5ek_mmc_defconfig
@@ -19,17 +19,17 @@
CONFIG_SYS_MEMTEST_END=0x70000000
CONFIG_ENV_VARS_UBOOT_CONFIG=y
CONFIG_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_SD_BOOT=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mmcblk0p2 rw rootwait"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="fatload mmc 0:1 0x61000000 at91-sama7g5ek.dtb; fatload mmc 0:1 0x62000000 zImage; bootz 0x62000000 - 0x61000000"
-CONFIG_MISC_INIT_R=y
-CONFIG_HUSH_PARSER=y
CONFIG_SYS_CBSIZE=256
CONFIG_SYS_PBSIZE=276
+CONFIG_MISC_INIT_R=y
+CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
-CONFIG_SYS_BOOTM_LEN=0x2000000
# CONFIG_CMD_IMI is not set
CONFIG_CMD_MD5SUM=y
CONFIG_CMD_MEMTEST=y
diff --git a/configs/sandbox64_defconfig b/configs/sandbox64_defconfig
index e3f7f11..d101cca 100644
--- a/configs/sandbox64_defconfig
+++ b/configs/sandbox64_defconfig
@@ -167,7 +167,6 @@
CONFIG_PWRSEQ=y
CONFIG_I2C_EEPROM=y
CONFIG_MMC_SANDBOX=y
-CONFIG_MTD=y
CONFIG_DM_MTD=y
CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_MAX_NAND_DEVICE=8
@@ -226,7 +225,6 @@
CONFIG_DM_RTC=y
CONFIG_RTC_RV8803=y
CONFIG_SCSI=y
-CONFIG_DM_SCSI=y
CONFIG_SANDBOX_SERIAL=y
CONFIG_SMEM=y
CONFIG_SANDBOX_SMEM=y
@@ -268,8 +266,8 @@
CONFIG_FS_CRAMFS=y
CONFIG_CMD_DHRYSTONE=y
CONFIG_TPM=y
-CONFIG_LZ4=y
CONFIG_ERRNO_STR=y
+CONFIG_GETOPT=y
CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y
CONFIG_EFI_CAPSULE_ON_DISK=y
CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y
diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index b7ae1f0..a8df5e6 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -42,12 +42,14 @@
CONFIG_ANDROID_AB=y
CONFIG_CMD_CPU=y
CONFIG_CMD_LICENSE=y
+CONFIG_CMD_SMBIOS=y
CONFIG_CMD_BOOTM_PRE_LOAD=y
CONFIG_CMD_BOOTZ=y
+CONFIG_BOOTM_OPENRTOS=y
+CONFIG_BOOTM_OSE=y
CONFIG_CMD_BOOTEFI_HELLO=y
CONFIG_CMD_BOOTMENU=y
CONFIG_CMD_ABOOTIMG=y
-# CONFIG_CMD_ELF is not set
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_ERASEENV=y
@@ -63,7 +65,6 @@
CONFIG_CMD_MEM_SEARCH=y
CONFIG_CMD_MX_CYCLIC=y
CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_UNZIP=y
CONFIG_CMD_DEMO=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPIO_READ=y
@@ -122,6 +123,7 @@
CONFIG_CMD_AES=y
CONFIG_CMD_TPM=y
CONFIG_CMD_TPM_TEST=y
+CONFIG_CMD_SCMI=y
CONFIG_CMD_BTRFS=y
CONFIG_CMD_CBFS=y
CONFIG_CMD_CRAMFS=y
@@ -216,7 +218,6 @@
CONFIG_MMC_PCI=y
CONFIG_MMC_SANDBOX=y
CONFIG_MMC_SDHCI=y
-CONFIG_MTD=y
CONFIG_DM_MTD=y
CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_MAX_NAND_DEVICE=8
@@ -287,7 +288,6 @@
CONFIG_RTC_RV8803=y
CONFIG_RTC_HT1380=y
CONFIG_SCSI=y
-CONFIG_DM_SCSI=y
CONFIG_SANDBOX_SERIAL=y
CONFIG_SM=y
CONFIG_SMEM=y
@@ -347,6 +347,7 @@
CONFIG_ECDSA_VERIFY=y
CONFIG_TPM=y
CONFIG_ERRNO_STR=y
+CONFIG_GETOPT=y
CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y
CONFIG_EFI_CAPSULE_ON_DISK=y
CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y
diff --git a/configs/sandbox_flattree_defconfig b/configs/sandbox_flattree_defconfig
index 9c774bb..36f384b 100644
--- a/configs/sandbox_flattree_defconfig
+++ b/configs/sandbox_flattree_defconfig
@@ -23,6 +23,7 @@
CONFIG_CMD_CPU=y
CONFIG_CMD_LICENSE=y
CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_BOOTEFI_BOOTMGR is not set
CONFIG_CMD_BOOTEFI_HELLO=y
# CONFIG_CMD_ELF is not set
CONFIG_CMD_ASKENV=y
@@ -100,6 +101,9 @@
CONFIG_SYS_ATA_REG_OFFSET=1
CONFIG_SYS_ATA_ALT_OFFSET=2
CONFIG_SYS_ATA_IDE0_OFFSET=0
+CONFIG_BUTTON=y
+CONFIG_BUTTON_ADC=y
+CONFIG_BUTTON_GPIO=y
CONFIG_CLK=y
CONFIG_CLK_COMPOSITE_CCF=y
CONFIG_CLK_K210=y
@@ -185,7 +189,6 @@
CONFIG_SANDBOX_RESET=y
CONFIG_DM_RTC=y
CONFIG_SCSI=y
-CONFIG_DM_SCSI=y
CONFIG_SANDBOX_SERIAL=y
CONFIG_SOUND=y
CONFIG_SOUND_SANDBOX=y
@@ -218,10 +221,8 @@
CONFIG_BMP_24BPP=y
CONFIG_CMD_DHRYSTONE=y
CONFIG_TPM=y
-CONFIG_LZ4=y
CONFIG_ZSTD=y
CONFIG_ERRNO_STR=y
-# CONFIG_CMD_BOOTEFI_BOOTMGR is not set
CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y
CONFIG_EFI_CAPSULE_ON_DISK=y
CONFIG_EFI_CAPSULE_FIRMWARE_FIT=y
diff --git a/configs/sandbox_noinst_defconfig b/configs/sandbox_noinst_defconfig
index 8cfe30b..137b3c6 100644
--- a/configs/sandbox_noinst_defconfig
+++ b/configs/sandbox_noinst_defconfig
@@ -187,7 +187,6 @@
CONFIG_SPL_PWRSEQ=y
CONFIG_FS_LOADER=y
CONFIG_MMC_SANDBOX=y
-CONFIG_MTD=y
CONFIG_DM_MTD=y
CONFIG_MTD_CONCAT=y
CONFIG_MTD_RAW_NAND=y
@@ -244,7 +243,6 @@
CONFIG_DM_RTC=y
CONFIG_SPL_DM_RTC=y
CONFIG_SCSI=y
-CONFIG_DM_SCSI=y
CONFIG_SANDBOX_SERIAL=y
CONFIG_SOUND=y
CONFIG_SOUND_SANDBOX=y
@@ -280,7 +278,6 @@
CONFIG_CMD_DHRYSTONE=y
CONFIG_RSA_VERIFY_WITH_PKEY=y
CONFIG_TPM=y
-CONFIG_LZ4=y
CONFIG_ZSTD=y
CONFIG_SPL_LZMA=y
CONFIG_ERRNO_STR=y
diff --git a/configs/sandbox_spl_defconfig b/configs/sandbox_spl_defconfig
index f1cca13..d0cd91e 100644
--- a/configs/sandbox_spl_defconfig
+++ b/configs/sandbox_spl_defconfig
@@ -210,7 +210,6 @@
CONFIG_DM_RTC=y
CONFIG_SPL_DM_RTC=y
CONFIG_SCSI=y
-CONFIG_DM_SCSI=y
CONFIG_SANDBOX_SERIAL=y
CONFIG_SOUND=y
CONFIG_SOUND_SANDBOX=y
@@ -246,7 +245,6 @@
CONFIG_RSA_VERIFY_WITH_PKEY=y
CONFIG_TPM=y
CONFIG_SPL_CRC8=y
-CONFIG_LZ4=y
CONFIG_ZSTD=y
CONFIG_SPL_LZMA=y
CONFIG_ERRNO_STR=y
diff --git a/configs/sandbox_vpl_defconfig b/configs/sandbox_vpl_defconfig
index 62df03e..b138b35 100644
--- a/configs/sandbox_vpl_defconfig
+++ b/configs/sandbox_vpl_defconfig
@@ -213,7 +213,6 @@
CONFIG_SPL_DM_RTC=y
CONFIG_TPL_DM_RTC=y
CONFIG_SCSI=y
-CONFIG_DM_SCSI=y
CONFIG_SANDBOX_SERIAL=y
CONFIG_SOUND=y
CONFIG_SOUND_SANDBOX=y
@@ -250,7 +249,6 @@
CONFIG_CMD_DHRYSTONE=y
CONFIG_RSA_VERIFY_WITH_PKEY=y
CONFIG_TPM=y
-CONFIG_LZ4=y
CONFIG_ZSTD=y
# CONFIG_VPL_LZMA is not set
CONFIG_ERRNO_STR=y
diff --git a/configs/seaboard_defconfig b/configs/seaboard_defconfig
index 5a332b1..bb5a4f0 100644
--- a/configs/seaboard_defconfig
+++ b/configs/seaboard_defconfig
@@ -14,6 +14,7 @@
CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_USE_PREBOOT=y
+CONFIG_SYS_PBSIZE=2086
CONFIG_SPL_FOOTPRINT_LIMIT=y
CONFIG_SPL_MAX_FOOTPRINT=0x8000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
@@ -23,7 +24,6 @@
CONFIG_SPL_SYS_MALLOC_SIZE=0x10000
CONFIG_SYS_PROMPT="Tegra20 (SeaBoard) # "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=2086
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
@@ -40,10 +40,8 @@
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_MMC_ENV_PART=2
-CONFIG_SPL_DM=y
CONFIG_SYS_I2C_TEGRA=y
CONFIG_TEGRA_KEYBOARD=y
-CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
CONFIG_TEGRA_NAND=y
CONFIG_SYS_NAND_ONFI_DETECTION=y
diff --git a/configs/seeed_npi_imx6ull_defconfig b/configs/seeed_npi_imx6ull_defconfig
index d4f2a88..e755702 100644
--- a/configs/seeed_npi_imx6ull_defconfig
+++ b/configs/seeed_npi_imx6ull_defconfig
@@ -20,18 +20,16 @@
CONFIG_FIT=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=3
+CONFIG_SYS_PBSIZE=532
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_DMA=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_SPL_WATCHDOG=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
-# CONFIG_RANDOM_UUID is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_MTD=y
CONFIG_CMD_USB=y
@@ -76,3 +74,4 @@
CONFIG_SPL_USB_HOST=y
CONFIG_USB_GADGET=y
CONFIG_SPL_USB_GADGET=y
+# CONFIG_RANDOM_UUID is not set
diff --git a/configs/sfr_nb4-ser_ram_defconfig b/configs/sfr_nb4-ser_ram_defconfig
index 74ebf6c..7125d49 100644
--- a/configs/sfr_nb4-ser_ram_defconfig
+++ b/configs/sfr_nb4-ser_ram_defconfig
@@ -19,13 +19,13 @@
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_REMAKE_ELF=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_SYS_CBSIZE=512
+CONFIG_SYS_PBSIZE=539
CONFIG_DISPLAY_CPUINFO=y
CONFIG_SYS_MALLOC_BOOTPARAMS=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="NB4-SER # "
CONFIG_SYS_MAXARGS=24
-CONFIG_SYS_CBSIZE=512
-CONFIG_SYS_PBSIZE=539
CONFIG_CMD_CPU=y
CONFIG_CMD_LICENSE=y
# CONFIG_CMD_BOOTD is not set
@@ -52,6 +52,7 @@
CONFIG_LED=y
CONFIG_LED_BCM6358=y
CONFIG_LED_GPIO=y
+CONFIG_MTD=y
CONFIG_DM_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_SHOW_PROGRESS=0
diff --git a/configs/sifive_unleashed_defconfig b/configs/sifive_unleashed_defconfig
index f99ce30..f68171c 100644
--- a/configs/sifive_unleashed_defconfig
+++ b/configs/sifive_unleashed_defconfig
@@ -19,10 +19,13 @@
CONFIG_RISCV_SMODE=y
CONFIG_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x84000000
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="setenv fdt_addr ${fdtcontroladdr};fdt addr ${fdtcontroladdr};"
CONFIG_DEFAULT_FDT_FILE="sifive/hifive-unleashed-a00.dtb"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
CONFIG_DISPLAY_CPUINFO=y
CONFIG_DISPLAY_BOARDINFO=y
CONFIG_MISC_INIT_R=y
@@ -33,9 +36,6 @@
CONFIG_SPL_DM_SPI_FLASH=y
CONFIG_SPL_DM_RESET=y
CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=276
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SPL_CLK=y
diff --git a/configs/sifive_unmatched_defconfig b/configs/sifive_unmatched_defconfig
index 6a95ab3..7c6c5b4 100644
--- a/configs/sifive_unmatched_defconfig
+++ b/configs/sifive_unmatched_defconfig
@@ -23,10 +23,13 @@
CONFIG_RISCV_SMODE=y
CONFIG_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x84000000
-CONFIG_DISTRO_DEFAULTS=y
+CONFIG_BOOTSTD_DEFAULTS=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="setenv fdt_addr ${fdtcontroladdr};fdt addr ${fdtcontroladdr};"
CONFIG_DEFAULT_FDT_FILE="sifive/hifive-unmatched-a00.dtb"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
CONFIG_DISPLAY_CPUINFO=y
CONFIG_DISPLAY_BOARDINFO=y
CONFIG_DISPLAY_BOARDINFO_LATE=y
@@ -39,9 +42,6 @@
CONFIG_SPL_DM_SPI_FLASH=y
CONFIG_SPL_DM_RESET=y
CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=276
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_EEPROM=y
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_PWM=y
@@ -60,7 +60,6 @@
CONFIG_NVME_PCI=y
CONFIG_PCIE_DW_SIFIVE=y
CONFIG_SCSI=y
-CONFIG_DM_SCSI=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_PCI=y
diff --git a/configs/silinux_ek874_defconfig b/configs/silinux_ek874_defconfig
index 1316f06..e74fbb8 100644
--- a/configs/silinux_ek874_defconfig
+++ b/configs/silinux_ek874_defconfig
@@ -24,6 +24,7 @@
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a774c0-ek874.dtb; booti 0x48080000 - 0x48000000"
CONFIG_DEFAULT_FDT_FILE="r8a774c0-ek874.dtb"
+CONFIG_SYS_PBSIZE=2068
# CONFIG_BOARD_EARLY_INIT_F is not set
CONFIG_SYS_MALLOC_BOOTPARAMS=y
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
@@ -32,7 +33,6 @@
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=2068
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
@@ -64,6 +64,7 @@
CONFIG_MMC_IO_VOLTAGE=y
CONFIG_MMC_UHS_SUPPORT=y
CONFIG_RENESAS_SDHI=y
+CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_BITBANGMII=y
diff --git a/configs/silk_defconfig b/configs/silk_defconfig
index e1cbf7d..7c6b5b5 100644
--- a/configs/silk_defconfig
+++ b/configs/silk_defconfig
@@ -33,6 +33,8 @@
CONFIG_PCI=y
CONFIG_FIT=y
CONFIG_BOOTDELAY=3
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=256
CONFIG_SPL_MAX_SIZE=0x4000
CONFIG_SPL_NO_BSS_LIMIT=y
CONFIG_SPL_BOARD_INIT=y
@@ -44,8 +46,6 @@
CONFIG_SYS_SPI_U_BOOT_OFFS=0x140000
CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=256
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_XIMG is not set
diff --git a/configs/sipeed_maix_bitm_defconfig b/configs/sipeed_maix_bitm_defconfig
index 289d9fd..67d5a00 100644
--- a/configs/sipeed_maix_bitm_defconfig
+++ b/configs/sipeed_maix_bitm_defconfig
@@ -11,10 +11,10 @@
CONFIG_STACK_SIZE=0x100000
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run k210_bootcmd"
-CONFIG_BOARD_EARLY_INIT_F=y
-CONFIG_HUSH_PARSER=y
CONFIG_SYS_CBSIZE=256
CONFIG_SYS_PBSIZE=276
+CONFIG_BOARD_EARLY_INIT_F=y
+CONFIG_HUSH_PARSER=y
CONFIG_MTDIDS_DEFAULT="nor0=spi3:0"
CONFIG_MTDPARTS_DEFAULT="nor0:1M(u-boot),0x1000@0xfff000(env)"
# CONFIG_NET is not set
diff --git a/configs/sipeed_maix_smode_defconfig b/configs/sipeed_maix_smode_defconfig
index a656f59..049fac0 100644
--- a/configs/sipeed_maix_smode_defconfig
+++ b/configs/sipeed_maix_smode_defconfig
@@ -13,9 +13,9 @@
CONFIG_STACK_SIZE=0x100000
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run k210_bootcmd"
-CONFIG_HUSH_PARSER=y
CONFIG_SYS_CBSIZE=256
CONFIG_SYS_PBSIZE=276
+CONFIG_HUSH_PARSER=y
CONFIG_MTDIDS_DEFAULT="nor0=spi3:0"
CONFIG_MTDPARTS_DEFAULT="nor0:1M(u-boot),0x1000@0xfff000(env)"
# CONFIG_NET is not set
diff --git a/configs/slimbootloader_defconfig b/configs/slimbootloader_defconfig
index 759fa7d..8d24a8d 100644
--- a/configs/slimbootloader_defconfig
+++ b/configs/slimbootloader_defconfig
@@ -9,10 +9,10 @@
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="if test ${bootdev} = 'usb'; then ${bootdev} start; fi; if test ${bootdev} = 'scsi'; then ${bootdev} scan; fi; ${bootdev} info; ${bootfsload} ${bootdev} ${bootdevnum}:${bootdevpart} ${loadaddr} ${bootfile}; ${bootfsload} ${bootdev} ${bootdevnum}:${bootdevpart} ${ramdiskaddr} ${ramdiskfile}; zboot ${loadaddr} 0 ${ramdiskaddr} ${filesize}"
+CONFIG_SYS_PBSIZE=532
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
CONFIG_BOOTP_BOOTFILESIZE=y
diff --git a/configs/smartweb_defconfig b/configs/smartweb_defconfig
index 80d2c0f..6668523 100644
--- a/configs/smartweb_defconfig
+++ b/configs/smartweb_defconfig
@@ -3,7 +3,6 @@
CONFIG_SPL_SKIP_LOWLEVEL_INIT_ONLY=y
CONFIG_SPL_SYS_ICACHE_OFF=y
CONFIG_SPL_SYS_DCACHE_OFF=y
-CONFIG_SPL_SYS_THUMB_BUILD=y
# CONFIG_SPL_USE_ARCH_MEMCPY is not set
# CONFIG_SPL_USE_ARCH_MEMSET is not set
CONFIG_ARCH_AT91=y
@@ -32,6 +31,8 @@
CONFIG_AUTOBOOT_STOP_STR="\x1b\x1b"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run flashboot"
+CONFIG_SYS_CBSIZE=512
+CONFIG_SYS_PBSIZE=537
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_MAX_SIZE=0x1000
@@ -51,8 +52,6 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot# "
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_CBSIZE=512
-CONFIG_SYS_PBSIZE=537
# CONFIG_CMD_IMI is not set
CONFIG_CMD_DFU=y
# CONFIG_CMD_LOADS is not set
diff --git a/configs/smdk5250_defconfig b/configs/smdk5250_defconfig
index a4a071d..8b42c8b 100644
--- a/configs/smdk5250_defconfig
+++ b/configs/smdk5250_defconfig
@@ -25,13 +25,13 @@
CONFIG_FIT=y
CONFIG_FIT_BEST_MATCH=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_PBSIZE=1024
CONFIG_SILENT_CONSOLE=y
CONFIG_CONSOLE_MUX=y
# CONFIG_SPL_FRAMEWORK is not set
CONFIG_SPL_FOOTPRINT_LIMIT=y
CONFIG_SPL_MAX_FOOTPRINT=0x3800
CONFIG_SYS_PROMPT="SMDK5250 # "
-CONFIG_SYS_PBSIZE=1024
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
@@ -53,7 +53,6 @@
CONFIG_MMC_DW=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_S5P=y
-CONFIG_MTD=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_SMC911X=y
diff --git a/configs/smdk5420_defconfig b/configs/smdk5420_defconfig
index f5907f9..55a5317 100644
--- a/configs/smdk5420_defconfig
+++ b/configs/smdk5420_defconfig
@@ -23,13 +23,13 @@
CONFIG_FIT=y
CONFIG_FIT_BEST_MATCH=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_PBSIZE=1024
CONFIG_SILENT_CONSOLE=y
CONFIG_CONSOLE_MUX=y
# CONFIG_SPL_FRAMEWORK is not set
CONFIG_SPL_FOOTPRINT_LIMIT=y
CONFIG_SPL_MAX_FOOTPRINT=0x7800
CONFIG_SYS_PROMPT="SMDK5420 # "
-CONFIG_SYS_PBSIZE=1024
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
@@ -48,7 +48,6 @@
CONFIG_MMC_DW=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_S5P=y
-CONFIG_MTD=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_SMC911X=y
diff --git a/configs/smdkc100_defconfig b/configs/smdkc100_defconfig
index dbd82f0..38207fe 100644
--- a/configs/smdkc100_defconfig
+++ b/configs/smdkc100_defconfig
@@ -20,11 +20,11 @@
CONFIG_BOOTARGS="root=/dev/mtdblock5 ubi.mtd=4 rootfstype=cramfs console=ttySAC0,115200n8 mem=128M mtdparts=s3c-onenand:256k(bootloader),128k@0x40000(params),3m@0x60000(kernel),16m@0x360000(test),-(UBI)"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run ubifsboot"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=384
CONFIG_HUSH_PARSER=y
# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="SMDKC100 # "
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=384
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_ONENAND=y
CONFIG_USE_ONENAND_BOARD_INIT=y
diff --git a/configs/smdkv310_defconfig b/configs/smdkv310_defconfig
index cf73f90..7a0f6f8 100644
--- a/configs/smdkv310_defconfig
+++ b/configs/smdkv310_defconfig
@@ -19,11 +19,11 @@
CONFIG_SYS_LOAD_ADDR=0x43e00000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTCOMMAND="fatload mmc 0 40007000 uImage; bootm 40007000"
+CONFIG_SYS_PBSIZE=1024
# CONFIG_SPL_FRAMEWORK is not set
CONFIG_SPL_FOOTPRINT_LIMIT=y
CONFIG_SPL_MAX_FOOTPRINT=0x3800
CONFIG_SYS_PROMPT="SMDKV310 # "
-CONFIG_SYS_PBSIZE=1024
# CONFIG_CMD_XIMG is not set
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
@@ -36,6 +36,5 @@
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_S5P=y
-CONFIG_MTD=y
CONFIG_SMC911X=y
CONFIG_USB=y
diff --git a/configs/smegw01_defconfig b/configs/smegw01_defconfig
index 9f2cac7..7f188e3 100644
--- a/configs/smegw01_defconfig
+++ b/configs/smegw01_defconfig
@@ -23,11 +23,12 @@
CONFIG_BOOTMENU_DISABLE_UBOOT_CONSOLE=y
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="run setup_boot_menu;"
+CONFIG_SYS_PBSIZE=532
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=532
# CONFIG_CMD_BOOTD is not set
CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_BOOTEFI_BOOTMGR is not set
CONFIG_CMD_BOOTMENU=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_XIMG is not set
@@ -85,4 +86,3 @@
CONFIG_SYSRESET_WATCHDOG=y
CONFIG_IMX_THERMAL=y
CONFIG_IMX_WATCHDOG=y
-# CONFIG_CMD_BOOTEFI_BOOTMGR is not set
diff --git a/configs/sniper_defconfig b/configs/sniper_defconfig
index 3e96daf..1afc6da 100644
--- a/configs/sniper_defconfig
+++ b/configs/sniper_defconfig
@@ -13,6 +13,8 @@
CONFIG_SPL=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTCOMMAND="setenv boot_mmc_part ${kernel_mmc_part}; if test reboot-${reboot-mode} = reboot-r; then echo recovery; setenv boot_mmc_part ${recovery_mmc_part}; fi; if test reboot-${reboot-mode} = reboot-b; then echo fastboot; fastboot 0; fi; part start mmc ${boot_mmc_dev} ${boot_mmc_part} boot_mmc_start; part size mmc ${boot_mmc_dev} ${boot_mmc_part} boot_mmc_size; mmc dev ${boot_mmc_dev}; mmc read ${kernel_addr_r} ${boot_mmc_start} ${boot_mmc_size} && bootm ${kernel_addr_r};"
+CONFIG_SYS_CBSIZE=512
+CONFIG_SYS_PBSIZE=538
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SPL_MAX_SIZE=0xec00
CONFIG_SPL_BSS_START_ADDR=0x80000000
@@ -26,8 +28,6 @@
# CONFIG_SPL_FS_EXT4 is not set
# CONFIG_SPL_NAND_SUPPORT is not set
CONFIG_SYS_PROMPT="sniper # "
-CONFIG_SYS_CBSIZE=512
-CONFIG_SYS_PBSIZE=538
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
diff --git a/configs/snow_defconfig b/configs/snow_defconfig
index 32195cf..3a617c6 100644
--- a/configs/snow_defconfig
+++ b/configs/snow_defconfig
@@ -30,6 +30,7 @@
CONFIG_BOOTSTD_FULL=y
CONFIG_BOOTMETH_CROS=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_PBSIZE=1024
CONFIG_SILENT_CONSOLE=y
CONFIG_BLOBLIST=y
# CONFIG_SPL_BLOBLIST is not set
@@ -38,7 +39,6 @@
CONFIG_SPL_FOOTPRINT_LIMIT=y
CONFIG_SPL_MAX_FOOTPRINT=0x3800
CONFIG_SYS_PROMPT="snow # "
-CONFIG_SYS_PBSIZE=1024
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
@@ -68,7 +68,6 @@
CONFIG_MMC_DW=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_S5P=y
-CONFIG_MTD=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_SMC911X=y
@@ -108,4 +107,3 @@
CONFIG_TPM=y
CONFIG_ERRNO_STR=y
CONFIG_UNIT_TEST=y
-# CONFIG_UT_LIB_ASN1 is not set
diff --git a/configs/socfpga_agilex_atf_defconfig b/configs/socfpga_agilex_atf_defconfig
index 7d8b0cc..704a9aa 100644
--- a/configs/socfpga_agilex_atf_defconfig
+++ b/configs/socfpga_agilex_atf_defconfig
@@ -24,11 +24,13 @@
CONFIG_SPL_FIT_SIGNATURE=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x02000000
+CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_BOOTDELAY=5
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="earlycon"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run fatscript; run mmcfitload; run mmcfitboot"
+CONFIG_SYS_PBSIZE=2082
CONFIG_SPL_MAX_SIZE=0x40000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x3ff00000
@@ -47,8 +49,6 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="SOCFPGA_AGILEX # "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=2082
-CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
@@ -73,7 +73,6 @@
CONFIG_SYS_I2C_DW=y
CONFIG_SYS_MMC_MAX_BLK_COUNT=256
CONFIG_MMC_DW=y
-CONFIG_MTD=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_PHY_MICREL=y
diff --git a/configs/socfpga_agilex_defconfig b/configs/socfpga_agilex_defconfig
index 554b2f9..67a4669 100644
--- a/configs/socfpga_agilex_defconfig
+++ b/configs/socfpga_agilex_defconfig
@@ -22,11 +22,13 @@
CONFIG_SYS_MEMTEST_START=0x00000000
CONFIG_SYS_MEMTEST_END=0x3fe00000
CONFIG_REMAKE_ELF=y
+CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_BOOTDELAY=5
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="earlycon"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run fatscript; run mmcload; run linux_qspi_enable; run mmcboot"
+CONFIG_SYS_PBSIZE=2082
CONFIG_SPL_MAX_SIZE=0x40000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x3ff00000
@@ -43,8 +45,6 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="SOCFPGA_AGILEX # "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=2082
-CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
@@ -58,6 +58,7 @@
CONFIG_CMD_EXT4=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
+# CONFIG_CMD_MTDPARTS is not set
CONFIG_ENV_IS_IN_MMC=y
CONFIG_USE_BOOTFILE=y
CONFIG_BOOTFILE="Image"
diff --git a/configs/socfpga_agilex_vab_defconfig b/configs/socfpga_agilex_vab_defconfig
index 2309441..a907fe5 100644
--- a/configs/socfpga_agilex_vab_defconfig
+++ b/configs/socfpga_agilex_vab_defconfig
@@ -25,11 +25,13 @@
CONFIG_SPL_FIT_SIGNATURE=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x02000000
+CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_BOOTDELAY=5
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="earlycon"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run fatscript; run mmcfitload; run mmcfitboot"
+CONFIG_SYS_PBSIZE=2082
CONFIG_SPL_MAX_SIZE=0x40000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x3ff00000
@@ -48,8 +50,6 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="SOCFPGA_AGILEX # "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=2082
-CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
@@ -74,7 +74,6 @@
CONFIG_SYS_I2C_DW=y
CONFIG_SYS_MMC_MAX_BLK_COUNT=256
CONFIG_MMC_DW=y
-CONFIG_MTD=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_PHY_MICREL=y
diff --git a/configs/socfpga_arria10_defconfig b/configs/socfpga_arria10_defconfig
index c35a360..5c7ef4f 100644
--- a/configs/socfpga_arria10_defconfig
+++ b/configs/socfpga_arria10_defconfig
@@ -56,7 +56,6 @@
CONFIG_SPL_FS_LOADER=y
CONFIG_SYS_MMC_MAX_BLK_COUNT=256
CONFIG_MMC_DW=y
-CONFIG_MTD=y
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_ETH_DESIGNWARE=y
diff --git a/configs/socfpga_arria5_defconfig b/configs/socfpga_arria5_defconfig
index 8980a65..eb7d3d2 100644
--- a/configs/socfpga_arria5_defconfig
+++ b/configs/socfpga_arria5_defconfig
@@ -57,7 +57,6 @@
CONFIG_SYS_I2C_DW=y
CONFIG_SYS_MMC_MAX_BLK_COUNT=256
CONFIG_MMC_DW=y
-CONFIG_MTD=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
diff --git a/configs/socfpga_chameleonv3_defconfig b/configs/socfpga_chameleonv3_defconfig
index 457ad4b..6ea61ca 100644
--- a/configs/socfpga_chameleonv3_defconfig
+++ b/configs/socfpga_chameleonv3_defconfig
@@ -10,6 +10,7 @@
CONFIG_SPL_FS_FAT=y
CONFIG_FIT=y
CONFIG_SPL_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_MISC_INIT_R=y
CONFIG_SPL_MAX_SIZE=0x40000
@@ -21,7 +22,7 @@
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_FS_EXT4=y
CONFIG_SPL_FPGA=y
-CONFIG_SYS_BOOTM_LEN=0x2000000
+# CONFIG_CMD_MTDPARTS is not set
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_I2C_DW=y
CONFIG_MISC=y
diff --git a/configs/socfpga_cyclone5_defconfig b/configs/socfpga_cyclone5_defconfig
index 0d744f4..cdf3308 100644
--- a/configs/socfpga_cyclone5_defconfig
+++ b/configs/socfpga_cyclone5_defconfig
@@ -57,7 +57,6 @@
CONFIG_SYS_I2C_DW=y
CONFIG_SYS_MMC_MAX_BLK_COUNT=256
CONFIG_MMC_DW=y
-CONFIG_MTD=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y
diff --git a/configs/socfpga_dbm_soc1_defconfig b/configs/socfpga_dbm_soc1_defconfig
index 2087b6e..342cfba 100644
--- a/configs/socfpga_dbm_soc1_defconfig
+++ b/configs/socfpga_dbm_soc1_defconfig
@@ -66,7 +66,6 @@
CONFIG_SYS_I2C_DW=y
CONFIG_SYS_MMC_MAX_BLK_COUNT=256
CONFIG_MMC_DW=y
-CONFIG_MTD=y
CONFIG_SPI_FLASH_MTD=y
CONFIG_PHY_GIGE=y
CONFIG_ETH_DESIGNWARE=y
diff --git a/configs/socfpga_de0_nano_soc_defconfig b/configs/socfpga_de0_nano_soc_defconfig
index 646552c..aada30d 100644
--- a/configs/socfpga_de0_nano_soc_defconfig
+++ b/configs/socfpga_de0_nano_soc_defconfig
@@ -57,7 +57,6 @@
CONFIG_SYS_I2C_DW=y
CONFIG_SYS_MMC_MAX_BLK_COUNT=256
CONFIG_MMC_DW=y
-CONFIG_MTD=y
CONFIG_SPI_FLASH_MTD=y
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
diff --git a/configs/socfpga_de10_nano_defconfig b/configs/socfpga_de10_nano_defconfig
index 3ae28e7..d71074e 100644
--- a/configs/socfpga_de10_nano_defconfig
+++ b/configs/socfpga_de10_nano_defconfig
@@ -54,7 +54,6 @@
CONFIG_SYS_I2C_DW=y
CONFIG_SYS_MMC_MAX_BLK_COUNT=256
CONFIG_MMC_DW=y
-CONFIG_MTD=y
CONFIG_SPI_FLASH_MTD=y
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
diff --git a/configs/socfpga_de10_standard_defconfig b/configs/socfpga_de10_standard_defconfig
index f3d86bc..9c5780e 100644
--- a/configs/socfpga_de10_standard_defconfig
+++ b/configs/socfpga_de10_standard_defconfig
@@ -54,7 +54,6 @@
CONFIG_SYS_I2C_DW=y
CONFIG_SYS_MMC_MAX_BLK_COUNT=256
CONFIG_MMC_DW=y
-CONFIG_MTD=y
CONFIG_SPI_FLASH_MTD=y
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
diff --git a/configs/socfpga_de1_soc_defconfig b/configs/socfpga_de1_soc_defconfig
index cc3038e..a7e5276 100644
--- a/configs/socfpga_de1_soc_defconfig
+++ b/configs/socfpga_de1_soc_defconfig
@@ -51,7 +51,6 @@
CONFIG_SYS_I2C_DW=y
CONFIG_SYS_MMC_MAX_BLK_COUNT=256
CONFIG_MMC_DW=y
-CONFIG_MTD=y
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_ETH_DESIGNWARE=y
diff --git a/configs/socfpga_is1_defconfig b/configs/socfpga_is1_defconfig
index 0551852..844f660 100644
--- a/configs/socfpga_is1_defconfig
+++ b/configs/socfpga_is1_defconfig
@@ -59,7 +59,6 @@
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_DW=y
# CONFIG_MMC is not set
-CONFIG_MTD=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_MTD=y
CONFIG_PHY_MICREL=y
diff --git a/configs/socfpga_mcvevk_defconfig b/configs/socfpga_mcvevk_defconfig
index 23ea23d..e5e1936 100644
--- a/configs/socfpga_mcvevk_defconfig
+++ b/configs/socfpga_mcvevk_defconfig
@@ -57,7 +57,6 @@
CONFIG_SYS_I2C_DW=y
CONFIG_SYS_MMC_MAX_BLK_COUNT=256
CONFIG_MMC_DW=y
-CONFIG_MTD=y
CONFIG_SPI_FLASH_MTD=y
CONFIG_PHY_GIGE=y
CONFIG_ETH_DESIGNWARE=y
diff --git a/configs/socfpga_n5x_atf_defconfig b/configs/socfpga_n5x_atf_defconfig
index 8868595..05b7604 100644
--- a/configs/socfpga_n5x_atf_defconfig
+++ b/configs/socfpga_n5x_atf_defconfig
@@ -23,11 +23,13 @@
CONFIG_SPL_FIT_SIGNATURE=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x02000000
+CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_BOOTDELAY=5
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="earlycon panic=-1 earlyprintk=ttyS0,115200"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run fatscript; run mmcfitload; run mmcfitboot"
+CONFIG_SYS_PBSIZE=2079
CONFIG_SPL_MAX_SIZE=0x40000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x3ff00000
@@ -46,8 +48,6 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="SOCFPGA_N5X # "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=2079
-CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
@@ -72,7 +72,6 @@
CONFIG_SYS_I2C_DW=y
CONFIG_SYS_MMC_MAX_BLK_COUNT=256
CONFIG_MMC_DW=y
-CONFIG_MTD=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_PHY_MICREL=y
diff --git a/configs/socfpga_n5x_defconfig b/configs/socfpga_n5x_defconfig
index ee05c1b..0cb8592 100644
--- a/configs/socfpga_n5x_defconfig
+++ b/configs/socfpga_n5x_defconfig
@@ -19,11 +19,13 @@
CONFIG_SPL_FS_FAT=y
# CONFIG_PSCI_RESET is not set
CONFIG_REMAKE_ELF=y
+CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_BOOTDELAY=5
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="earlycon panic=-1 earlyprintk=ttyS0,115200"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run fatscript; run mmcload; run linux_qspi_enable; run mmcboot"
+CONFIG_SYS_PBSIZE=2079
CONFIG_SPL_MAX_SIZE=0x40000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x3ff00000
@@ -40,8 +42,6 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="SOCFPGA_N5X # "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=2079
-CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
@@ -56,6 +56,7 @@
CONFIG_CMD_EXT4=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
+# CONFIG_CMD_MTDPARTS is not set
CONFIG_ENV_IS_IN_MMC=y
CONFIG_USE_BOOTFILE=y
CONFIG_BOOTFILE="Image"
diff --git a/configs/socfpga_n5x_vab_defconfig b/configs/socfpga_n5x_vab_defconfig
index 0af212e..dd33210 100644
--- a/configs/socfpga_n5x_vab_defconfig
+++ b/configs/socfpga_n5x_vab_defconfig
@@ -24,11 +24,13 @@
CONFIG_SPL_FIT_SIGNATURE=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x02000000
+CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_BOOTDELAY=5
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="earlycon panic=-1 earlyprintk=ttyS0,115200"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run fatscript; run mmcfitload; run mmcfitboot"
+CONFIG_SYS_PBSIZE=2079
CONFIG_SPL_MAX_SIZE=0x40000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x3ff00000
@@ -47,8 +49,6 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="SOCFPGA_N5X # "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=2079
-CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
@@ -73,7 +73,6 @@
CONFIG_SYS_I2C_DW=y
CONFIG_SYS_MMC_MAX_BLK_COUNT=256
CONFIG_MMC_DW=y
-CONFIG_MTD=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_PHY_MICREL=y
diff --git a/configs/socfpga_secu1_defconfig b/configs/socfpga_secu1_defconfig
index 6a4106a..d9ac720 100644
--- a/configs/socfpga_secu1_defconfig
+++ b/configs/socfpga_secu1_defconfig
@@ -22,6 +22,7 @@
CONFIG_SYS_LOAD_ADDR=0x02000000
CONFIG_BUILD_TARGET="u-boot-with-nand-spl.sfp"
CONFIG_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOT_RETRY=y
CONFIG_BOOT_RETRY_TIME=45
@@ -45,8 +46,8 @@
# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE is not set
CONFIG_SPL_MTD=y
CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_HUSH_OLD_PARSER=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
@@ -85,7 +86,6 @@
CONFIG_SYS_I2C_EEPROM_ADDR=0x50
CONFIG_SYS_MMC_MAX_BLK_COUNT=256
CONFIG_MMC_DW=y
-CONFIG_MTD=y
CONFIG_DM_MTD=y
CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_USE_FLASH_BBT=y
diff --git a/configs/socfpga_sockit_defconfig b/configs/socfpga_sockit_defconfig
index 33b0c79..26547cb 100644
--- a/configs/socfpga_sockit_defconfig
+++ b/configs/socfpga_sockit_defconfig
@@ -57,7 +57,6 @@
CONFIG_SYS_I2C_DW=y
CONFIG_SYS_MMC_MAX_BLK_COUNT=256
CONFIG_MMC_DW=y
-CONFIG_MTD=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y
diff --git a/configs/socfpga_socrates_defconfig b/configs/socfpga_socrates_defconfig
index 9f5dc70..24d56cb 100644
--- a/configs/socfpga_socrates_defconfig
+++ b/configs/socfpga_socrates_defconfig
@@ -57,7 +57,6 @@
CONFIG_SYS_I2C_DW=y
CONFIG_SYS_MMC_MAX_BLK_COUNT=256
CONFIG_MMC_DW=y
-CONFIG_MTD=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y
diff --git a/configs/socfpga_sr1500_defconfig b/configs/socfpga_sr1500_defconfig
index dc88606..325dfc5 100644
--- a/configs/socfpga_sr1500_defconfig
+++ b/configs/socfpga_sr1500_defconfig
@@ -65,7 +65,6 @@
CONFIG_SYS_I2C_DW=y
CONFIG_SYS_MMC_MAX_BLK_COUNT=256
CONFIG_MMC_DW=y
-CONFIG_MTD=y
CONFIG_SPI_FLASH_STMICRO=y
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
CONFIG_SPI_FLASH_MTD=y
diff --git a/configs/socfpga_stratix10_atf_defconfig b/configs/socfpga_stratix10_atf_defconfig
index 2806b06..6166a5d 100644
--- a/configs/socfpga_stratix10_atf_defconfig
+++ b/configs/socfpga_stratix10_atf_defconfig
@@ -24,11 +24,13 @@
CONFIG_SPL_FIT_SIGNATURE=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x02000000
+CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_BOOTDELAY=5
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="earlycon"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run fatscript; run mmcfitload; run mmcfitboot"
+CONFIG_SYS_PBSIZE=2085
CONFIG_SPL_MAX_SIZE=0x40000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x3ff00000
@@ -46,8 +48,6 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="SOCFPGA_STRATIX10 # "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=2085
-CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_CMD_MEMTEST=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
@@ -74,7 +74,6 @@
CONFIG_SYS_I2C_DW=y
CONFIG_SYS_MMC_MAX_BLK_COUNT=256
CONFIG_MMC_DW=y
-CONFIG_MTD=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_PHY_MICREL=y
diff --git a/configs/socfpga_stratix10_defconfig b/configs/socfpga_stratix10_defconfig
index c782c81..2c38006 100644
--- a/configs/socfpga_stratix10_defconfig
+++ b/configs/socfpga_stratix10_defconfig
@@ -24,11 +24,13 @@
CONFIG_OPTIMIZE_INLINING=y
CONFIG_SPL_OPTIMIZE_INLINING=y
CONFIG_REMAKE_ELF=y
+CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_BOOTDELAY=5
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="earlycon"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run fatscript; run mmcload; run linux_qspi_enable; run mmcboot"
+CONFIG_SYS_PBSIZE=2085
CONFIG_SPL_MAX_SIZE=0x40000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x3ff00000
@@ -44,8 +46,6 @@
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="SOCFPGA_STRATIX10 # "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=2085
-CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_CMD_MEMTEST=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
@@ -73,7 +73,6 @@
CONFIG_SYS_I2C_DW=y
CONFIG_SYS_MMC_MAX_BLK_COUNT=256
CONFIG_MMC_DW=y
-CONFIG_MTD=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_PHY_MICREL=y
diff --git a/configs/socfpga_vining_fpga_defconfig b/configs/socfpga_vining_fpga_defconfig
index 0b9c2a6..e5f7283 100644
--- a/configs/socfpga_vining_fpga_defconfig
+++ b/configs/socfpga_vining_fpga_defconfig
@@ -17,6 +17,7 @@
CONFIG_ENV_OFFSET_REDUND=0x110000
CONFIG_TIMESTAMP=y
CONFIG_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=5
CONFIG_USE_BOOTARGS=y
@@ -38,7 +39,6 @@
CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
CONFIG_CMDLINE_PS_SUPPORT=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
@@ -94,7 +94,6 @@
CONFIG_SYS_I2C_EEPROM_ADDR=0x50
CONFIG_SYS_MMC_MAX_BLK_COUNT=256
CONFIG_MMC_DW=y
-CONFIG_MTD=y
CONFIG_SPI_FLASH_SFDP_SUPPORT=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y
diff --git a/configs/socrates_defconfig b/configs/socrates_defconfig
index 71c03d2..15db06b 100644
--- a/configs/socrates_defconfig
+++ b/configs/socrates_defconfig
@@ -18,6 +18,7 @@
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_FIT_VERBOSE=y
+CONFIG_SYS_BOOTM_LEN=0x800000
CONFIG_BOOTDELAY=1
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Enter password to abort autoboot in %d seconds!\n"
@@ -32,17 +33,16 @@
CONFIG_BOOTCOMMAND="run boot_usb;run boot_nor"
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="echo;echo Welcome on the ABB Socrates Board;echo"
+CONFIG_SYS_PBSIZE=276
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_HWCONFIG is not set
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_REGINFO=y
# CONFIG_BOOTM_NETBSD is not set
# CONFIG_BOOTM_PLAN9 is not set
# CONFIG_BOOTM_RTEMS is not set
# CONFIG_BOOTM_VXWORKS is not set
-CONFIG_SYS_BOOTM_LEN=0x800000
CONFIG_CMD_IMLS=y
CONFIG_CMD_EEPROM=y
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=4
diff --git a/configs/som-db5800-som-6867_defconfig b/configs/som-db5800-som-6867_defconfig
index c190235..c5de56a 100644
--- a/configs/som-db5800-som-6867_defconfig
+++ b/configs/som-db5800-som-6867_defconfig
@@ -25,10 +25,10 @@
CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="ext2load scsi 0:3 01000000 /boot/vmlinuz; zboot 01000000"
+CONFIG_SYS_PBSIZE=532
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_CPU=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_PART=y
diff --git a/configs/somlabs_visionsom_6ull_defconfig b/configs/somlabs_visionsom_6ull_defconfig
index 0968e6d..b48ef03 100644
--- a/configs/somlabs_visionsom_6ull_defconfig
+++ b/configs/somlabs_visionsom_6ull_defconfig
@@ -14,10 +14,10 @@
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run setfdtfile; run checkbootdev; run loadfdt;if run loadbootscript; then run bootscript; else if run loadimage; then run setbootargs; bootz ${loadaddr} - ${fdt_addr}; fi; fi"
+CONFIG_SYS_PBSIZE=532
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPIO=y
diff --git a/configs/sopine_baseboard_defconfig b/configs/sopine_baseboard_defconfig
index d9b0eb3..6d9d71f 100644
--- a/configs/sopine_baseboard_defconfig
+++ b/configs/sopine_baseboard_defconfig
@@ -10,6 +10,7 @@
CONFIG_SPL_SPI_SUNXI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SUPPORT_EMMC_BOOT=y
+CONFIG_MTD=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_SUN8I_EMAC=y
CONFIG_SPI=y
diff --git a/configs/soquartz-blade-rk3566_defconfig b/configs/soquartz-blade-rk3566_defconfig
index 1d993a5..9693cc2 100644
--- a/configs/soquartz-blade-rk3566_defconfig
+++ b/configs/soquartz-blade-rk3566_defconfig
@@ -81,7 +81,6 @@
CONFIG_PWM_ROCKCHIP=y
CONFIG_SPL_RAM=y
CONFIG_SCSI=y
-CONFIG_DM_SCSI=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550_MEM32=y
diff --git a/configs/soquartz-cm4-rk3566_defconfig b/configs/soquartz-cm4-rk3566_defconfig
index f01aa72..9c6b12d 100644
--- a/configs/soquartz-cm4-rk3566_defconfig
+++ b/configs/soquartz-cm4-rk3566_defconfig
@@ -81,7 +81,6 @@
CONFIG_PWM_ROCKCHIP=y
CONFIG_SPL_RAM=y
CONFIG_SCSI=y
-CONFIG_DM_SCSI=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550_MEM32=y
diff --git a/configs/soquartz-model-a-rk3566_defconfig b/configs/soquartz-model-a-rk3566_defconfig
index 2f31457..fd72d78 100644
--- a/configs/soquartz-model-a-rk3566_defconfig
+++ b/configs/soquartz-model-a-rk3566_defconfig
@@ -82,7 +82,6 @@
CONFIG_PWM_ROCKCHIP=y
CONFIG_SPL_RAM=y
CONFIG_SCSI=y
-CONFIG_DM_SCSI=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550_MEM32=y
diff --git a/configs/spring_defconfig b/configs/spring_defconfig
index 2152596..2bd45cb 100644
--- a/configs/spring_defconfig
+++ b/configs/spring_defconfig
@@ -28,12 +28,12 @@
CONFIG_FIT=y
CONFIG_FIT_BEST_MATCH=y
CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_PBSIZE=1024
CONFIG_SILENT_CONSOLE=y
# CONFIG_SPL_FRAMEWORK is not set
CONFIG_SPL_FOOTPRINT_LIMIT=y
CONFIG_SPL_MAX_FOOTPRINT=0x3800
CONFIG_SYS_PROMPT="spring # "
-CONFIG_SYS_PBSIZE=1024
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
@@ -63,7 +63,6 @@
CONFIG_MMC_DW=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_S5P=y
-CONFIG_MTD=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_SMC911X=y
diff --git a/configs/starfive_visionfive2_defconfig b/configs/starfive_visionfive2_defconfig
index b15e7d2..1b7d57b 100644
--- a/configs/starfive_visionfive2_defconfig
+++ b/configs/starfive_visionfive2_defconfig
@@ -30,6 +30,7 @@
# CONFIG_OF_BOARD_FIXUP is not set
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTSTAGE=y
CONFIG_QSPI_BOOT=y
@@ -40,6 +41,8 @@
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="nvme scan; usb start; setenv fdt_addr ${fdtcontroladdr}; fdt addr ${fdtcontroladdr};"
CONFIG_DEFAULT_FDT_FILE="starfive/jh7110-starfive-visionfive-2.dtb"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
CONFIG_DISPLAY_CPUINFO=y
CONFIG_DISPLAY_BOARDINFO=y
CONFIG_ID_EEPROM=y
@@ -61,9 +64,6 @@
CONFIG_SPL_DM_RESET=y
CONFIG_SPL_SPI_LOAD=y
CONFIG_SYS_PROMPT="StarFive # "
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=276
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_EEPROM=y
CONFIG_SYS_EEPROM_SIZE=512
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=4
@@ -72,6 +72,7 @@
CONFIG_CMD_I2C=y
CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
+CONFIG_CMD_WDT=y
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_BOOTSTAGE=y
CONFIG_OF_BOARD=y
@@ -124,6 +125,7 @@
CONFIG_RNG_JH7110=y
CONFIG_SYS_NS16550=y
CONFIG_CADENCE_QSPI=y
+CONFIG_SYSRESET=y
CONFIG_TIMER_EARLY=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
@@ -133,3 +135,7 @@
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_PCI=y
CONFIG_USB_KEYBOARD=y
+# CONFIG_WATCHDOG is not set
+# CONFIG_WATCHDOG_AUTOSTART is not set
+CONFIG_WDT=y
+CONFIG_WDT_STARFIVE=y
diff --git a/configs/starqltechn_defconfig b/configs/starqltechn_defconfig
index 5b85ce5..6980a82 100644
--- a/configs/starqltechn_defconfig
+++ b/configs/starqltechn_defconfig
@@ -12,11 +12,11 @@
CONFIG_BOOTDELAY=0
CONFIG_SAVE_PREV_BL_FDT_ADDR=y
CONFIG_SAVE_PREV_BL_INITRAMFS_START_ADDR=y
+CONFIG_SYS_CBSIZE=512
+CONFIG_SYS_PBSIZE=532
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_CBSIZE=512
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_BOOTMENU=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_BMP=y
diff --git a/configs/stemmy_defconfig b/configs/stemmy_defconfig
index 9b78ab3..ee8e6be 100644
--- a/configs/stemmy_defconfig
+++ b/configs/stemmy_defconfig
@@ -13,17 +13,16 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000
CONFIG_DEFAULT_DEVICE_TREE="ste-ux500-samsung-stemmy"
CONFIG_SYS_LOAD_ADDR=0x100000
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run fastbootcmd"
-CONFIG_SYS_CONSOLE_INFO_QUIET=y
-CONFIG_HUSH_PARSER=y
CONFIG_SYS_CBSIZE=256
CONFIG_SYS_PBSIZE=276
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
+CONFIG_HUSH_PARSER=y
CONFIG_CMD_CONFIG=y
CONFIG_CMD_LICENSE=y
-CONFIG_SYS_BOOTM_LEN=0x4000000
-CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
diff --git a/configs/stih410-b2260_defconfig b/configs/stih410-b2260_defconfig
index 3160a9b..0c2ec3e 100644
--- a/configs/stih410-b2260_defconfig
+++ b/configs/stih410-b2260_defconfig
@@ -14,13 +14,13 @@
CONFIG_SYS_LOAD_ADDR=0x40000000
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
+CONFIG_SYS_BOOTM_LEN=0x1000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyAS1,115200 CONSOLE=/dev/ttyAS1 consoleblank=0 root=/dev/mmcblk0p2 rootfstype=ext4 rw rootwait mem=992M@0x40000000 vmalloc=256m"
+CONFIG_SYS_PBSIZE=1058
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_SYS_PROMPT="stih410-b2260 => "
-CONFIG_SYS_PBSIZE=1058
-CONFIG_SYS_BOOTM_LEN=0x1000000
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
diff --git a/configs/stm32746g-eval_defconfig b/configs/stm32746g-eval_defconfig
index b2c30b8..ce00f0d 100644
--- a/configs/stm32746g-eval_defconfig
+++ b/configs/stm32746g-eval_defconfig
@@ -19,12 +19,11 @@
CONFIG_AUTOBOOT_STOP_STR=" "
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel"
+CONFIG_SYS_PBSIZE=1050
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_BOARD_LATE_INIT=y
CONFIG_SYS_PROMPT="U-Boot > "
-CONFIG_SYS_PBSIZE=1050
CONFIG_CMD_GPT=y
-# CONFIG_RANDOM_UUID is not set
CONFIG_CMD_MMC=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_SNTP=y
@@ -66,3 +65,4 @@
CONFIG_BMP_16BPP=y
CONFIG_BMP_24BPP=y
CONFIG_BMP_32BPP=y
+# CONFIG_RANDOM_UUID is not set
diff --git a/configs/stm32746g-eval_spl_defconfig b/configs/stm32746g-eval_spl_defconfig
index f9711be..f6b82cc 100644
--- a/configs/stm32746g-eval_spl_defconfig
+++ b/configs/stm32746g-eval_spl_defconfig
@@ -28,6 +28,7 @@
CONFIG_AUTOBOOT_STOP_STR=" "
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel"
+CONFIG_SYS_PBSIZE=1050
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_PAD_TO=0x9000
@@ -39,9 +40,7 @@
CONFIG_SPL_PAYLOAD_ARGS_ADDR=0x80c0000
CONFIG_SPL_DM_RESET=y
CONFIG_SYS_PROMPT="U-Boot > "
-CONFIG_SYS_PBSIZE=1050
CONFIG_CMD_GPT=y
-# CONFIG_RANDOM_UUID is not set
CONFIG_CMD_MMC=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_SNTP=y
@@ -92,3 +91,4 @@
CONFIG_BMP_16BPP=y
CONFIG_BMP_24BPP=y
CONFIG_BMP_32BPP=y
+# CONFIG_RANDOM_UUID is not set
diff --git a/configs/stm32f429-discovery_defconfig b/configs/stm32f429-discovery_defconfig
index 682d297..5d59edb 100644
--- a/configs/stm32f429-discovery_defconfig
+++ b/configs/stm32f429-discovery_defconfig
@@ -16,12 +16,12 @@
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel"
+CONFIG_SYS_PBSIZE=1050
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_MISC_INIT_R=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot > "
-CONFIG_SYS_PBSIZE=1050
CONFIG_CMD_IMLS=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TIMER=y
@@ -29,6 +29,7 @@
CONFIG_ENV_IS_IN_FLASH=y
# CONFIG_NET is not set
# CONFIG_MMC is not set
+CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_STM32_FLASH=y
CONFIG_SYS_MAX_FLASH_SECT=12
diff --git a/configs/stm32f429-evaluation_defconfig b/configs/stm32f429-evaluation_defconfig
index f460c6f..3e220d7 100644
--- a/configs/stm32f429-evaluation_defconfig
+++ b/configs/stm32f429-evaluation_defconfig
@@ -12,13 +12,12 @@
CONFIG_SYS_LOAD_ADDR=0x400000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=3
+CONFIG_SYS_PBSIZE=1050
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_MISC_INIT_R=y
CONFIG_SYS_PROMPT="U-Boot > "
-CONFIG_SYS_PBSIZE=1050
CONFIG_CMD_IMLS=y
CONFIG_CMD_GPT=y
-# CONFIG_RANDOM_UUID is not set
CONFIG_CMD_MMC=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
@@ -28,7 +27,9 @@
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
# CONFIG_NET is not set
CONFIG_ARM_PL180_MMCI=y
+CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_STM32_FLASH=y
CONFIG_SYS_MAX_FLASH_SECT=12
CONFIG_SYS_MAX_FLASH_BANKS=2
+# CONFIG_RANDOM_UUID is not set
diff --git a/configs/stm32f469-discovery_defconfig b/configs/stm32f469-discovery_defconfig
index 21c5498..9b5f38b 100644
--- a/configs/stm32f469-discovery_defconfig
+++ b/configs/stm32f469-discovery_defconfig
@@ -12,15 +12,15 @@
CONFIG_SYS_LOAD_ADDR=0x400000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=3
+CONFIG_SYS_PBSIZE=1050
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_MISC_INIT_R=y
CONFIG_SYS_PROMPT="U-Boot > "
-CONFIG_SYS_PBSIZE=1050
CONFIG_CMD_IMLS=y
CONFIG_CMD_GPT=y
-# CONFIG_RANDOM_UUID is not set
CONFIG_CMD_MMC=y
# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIMER=y
# CONFIG_ISO_PARTITION is not set
@@ -37,6 +37,21 @@
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
# CONFIG_PINCTRL_FULL is not set
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_FIXED=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_STM32_QSPI=y
+CONFIG_VIDEO=y
+CONFIG_VIDEO_LOGO=y
+CONFIG_BACKLIGHT_GPIO=y
+CONFIG_VIDEO_LCD_ORISETECH_OTM8009A=y
+CONFIG_VIDEO_STM32=y
+CONFIG_VIDEO_STM32_DSI=y
+CONFIG_VIDEO_STM32_MAX_XRES=480
+CONFIG_VIDEO_STM32_MAX_YRES=800
+CONFIG_SPLASH_SCREEN=y
+CONFIG_SPLASH_SCREEN_ALIGN=y
+CONFIG_BMP_16BPP=y
+CONFIG_BMP_24BPP=y
+CONFIG_BMP_32BPP=y
diff --git a/configs/stm32f746-disco_defconfig b/configs/stm32f746-disco_defconfig
index 3c3a0d2..7a23875 100644
--- a/configs/stm32f746-disco_defconfig
+++ b/configs/stm32f746-disco_defconfig
@@ -19,12 +19,11 @@
CONFIG_AUTOBOOT_STOP_STR=" "
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel"
+CONFIG_SYS_PBSIZE=1050
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_BOARD_LATE_INIT=y
CONFIG_SYS_PROMPT="U-Boot > "
-CONFIG_SYS_PBSIZE=1050
CONFIG_CMD_GPT=y
-# CONFIG_RANDOM_UUID is not set
CONFIG_CMD_MMC=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_SNTP=y
@@ -66,3 +65,4 @@
CONFIG_BMP_16BPP=y
CONFIG_BMP_24BPP=y
CONFIG_BMP_32BPP=y
+# CONFIG_RANDOM_UUID is not set
diff --git a/configs/stm32f746-disco_spl_defconfig b/configs/stm32f746-disco_spl_defconfig
index a2b740c..d456a42 100644
--- a/configs/stm32f746-disco_spl_defconfig
+++ b/configs/stm32f746-disco_spl_defconfig
@@ -28,6 +28,7 @@
CONFIG_AUTOBOOT_STOP_STR=" "
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel"
+CONFIG_SYS_PBSIZE=1050
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_PAD_TO=0x9000
@@ -39,9 +40,7 @@
CONFIG_SPL_PAYLOAD_ARGS_ADDR=0x80c0000
CONFIG_SPL_DM_RESET=y
CONFIG_SYS_PROMPT="U-Boot > "
-CONFIG_SYS_PBSIZE=1050
CONFIG_CMD_GPT=y
-# CONFIG_RANDOM_UUID is not set
CONFIG_CMD_MMC=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_SNTP=y
@@ -92,3 +91,4 @@
CONFIG_BMP_16BPP=y
CONFIG_BMP_24BPP=y
CONFIG_BMP_32BPP=y
+# CONFIG_RANDOM_UUID is not set
diff --git a/configs/stm32f769-disco_defconfig b/configs/stm32f769-disco_defconfig
index 3514a78..a0d2aa0 100644
--- a/configs/stm32f769-disco_defconfig
+++ b/configs/stm32f769-disco_defconfig
@@ -19,11 +19,10 @@
CONFIG_AUTOBOOT_STOP_STR=" "
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel"
+CONFIG_SYS_PBSIZE=1050
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_SYS_PROMPT="U-Boot > "
-CONFIG_SYS_PBSIZE=1050
CONFIG_CMD_GPT=y
-# CONFIG_RANDOM_UUID is not set
CONFIG_CMD_MMC=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_SNTP=y
@@ -68,3 +67,4 @@
CONFIG_BMP_16BPP=y
CONFIG_BMP_24BPP=y
CONFIG_BMP_32BPP=y
+# CONFIG_RANDOM_UUID is not set
diff --git a/configs/stm32f769-disco_spl_defconfig b/configs/stm32f769-disco_spl_defconfig
index 37d22f8..ce4077b 100644
--- a/configs/stm32f769-disco_spl_defconfig
+++ b/configs/stm32f769-disco_spl_defconfig
@@ -28,6 +28,7 @@
CONFIG_AUTOBOOT_STOP_STR=" "
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel"
+CONFIG_SYS_PBSIZE=1050
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_SPL_PAD_TO=0x9000
CONFIG_SPL_NO_BSS_LIMIT=y
@@ -38,9 +39,7 @@
CONFIG_SPL_PAYLOAD_ARGS_ADDR=0x81c0000
CONFIG_SPL_DM_RESET=y
CONFIG_SYS_PROMPT="U-Boot > "
-CONFIG_SYS_PBSIZE=1050
CONFIG_CMD_GPT=y
-# CONFIG_RANDOM_UUID is not set
CONFIG_CMD_MMC=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_SNTP=y
@@ -94,3 +93,4 @@
CONFIG_BMP_16BPP=y
CONFIG_BMP_24BPP=y
CONFIG_BMP_32BPP=y
+# CONFIG_RANDOM_UUID is not set
diff --git a/configs/stm32h743-disco_defconfig b/configs/stm32h743-disco_defconfig
index a8bf332..89d79e9 100644
--- a/configs/stm32h743-disco_defconfig
+++ b/configs/stm32h743-disco_defconfig
@@ -17,10 +17,10 @@
CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n"
CONFIG_AUTOBOOT_STOP_STR=" "
CONFIG_DEFAULT_FDT_FILE="stm32h743i-disco"
-# CONFIG_DISPLAY_CPUINFO is not set
-CONFIG_SYS_PROMPT="U-Boot > "
CONFIG_SYS_CBSIZE=256
CONFIG_SYS_PBSIZE=282
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_SYS_PROMPT="U-Boot > "
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
# CONFIG_CMD_SETEXPR is not set
diff --git a/configs/stm32h743-eval_defconfig b/configs/stm32h743-eval_defconfig
index 2f47041..6b4ebd1 100644
--- a/configs/stm32h743-eval_defconfig
+++ b/configs/stm32h743-eval_defconfig
@@ -17,10 +17,10 @@
CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n"
CONFIG_AUTOBOOT_STOP_STR=" "
CONFIG_DEFAULT_FDT_FILE="stm32h743i-eval"
-# CONFIG_DISPLAY_CPUINFO is not set
-CONFIG_SYS_PROMPT="U-Boot > "
CONFIG_SYS_CBSIZE=256
CONFIG_SYS_PBSIZE=282
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_SYS_PROMPT="U-Boot > "
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
# CONFIG_CMD_SETEXPR is not set
diff --git a/configs/stm32h750-art-pi_defconfig b/configs/stm32h750-art-pi_defconfig
index 80ed852..319b303 100644
--- a/configs/stm32h750-art-pi_defconfig
+++ b/configs/stm32h750-art-pi_defconfig
@@ -21,12 +21,12 @@
CONFIG_BOOTARGS="console=ttySTM0,2000000 root=/dev/ram loglevel=8"
CONFIG_BOOTCOMMAND="bootm 90080000"
CONFIG_DEFAULT_FDT_FILE="stm32h750i-art-pi"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=282
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_LATE_INIT=y
CONFIG_SYS_PROMPT="U-Boot > "
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=282
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
# CONFIG_CMD_SETEXPR is not set
diff --git a/configs/stm32mp13_defconfig b/configs/stm32mp13_defconfig
index 387dc6a..c893e27 100644
--- a/configs/stm32mp13_defconfig
+++ b/configs/stm32mp13_defconfig
@@ -5,10 +5,10 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0400000
CONFIG_ENV_OFFSET=0x900000
CONFIG_DEFAULT_DEVICE_TREE="stm32mp135f-dk"
-CONFIG_STM32MP13x=y
+CONFIG_STM32MP13X=y
CONFIG_DDR_CACHEABLE_SIZE=0x8000000
CONFIG_CMD_STM32KEY=y
-CONFIG_TARGET_ST_STM32MP13x=y
+CONFIG_TARGET_ST_STM32MP13X=y
CONFIG_ENV_OFFSET_REDUND=0x940000
CONFIG_CMD_STM32PROG=y
# CONFIG_ARMV7_NONSEC is not set
@@ -16,11 +16,11 @@
CONFIG_SYS_MEMTEST_START=0xc0000000
CONFIG_SYS_MEMTEST_END=0xc4000000
CONFIG_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=1
CONFIG_BOOTCOMMAND="run bootcmd_stm32mp"
CONFIG_SYS_PROMPT="STM32MP> "
-CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_CMD_ADTIMG=y
CONFIG_CMD_ERASEENV=y
CONFIG_CMD_NVEDIT_EFI=y
diff --git a/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig b/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig
index 20e4cc3..1f35786 100644
--- a/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig
+++ b/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig
@@ -16,8 +16,10 @@
CONFIG_SYS_MEMTEST_START=0xc0000000
CONFIG_SYS_MEMTEST_END=0xc4000000
CONFIG_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTCOMMAND="run bootcmd_stm32mp"
+CONFIG_SYS_PBSIZE=1050
CONFIG_SPL_FOOTPRINT_LIMIT=y
CONFIG_SPL_MAX_FOOTPRINT=0x3db00
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
@@ -31,8 +33,6 @@
CONFIG_SPL_I2C=y
CONFIG_SPL_POWER=y
CONFIG_SYS_PROMPT="STM32MP> "
-CONFIG_SYS_PBSIZE=1050
-CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_CMD_ADTIMG=y
CONFIG_CMD_ERASEENV=y
CONFIG_CMD_MEMINFO=y
diff --git a/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig b/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig
index ad4355b..2fe0f77 100644
--- a/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig
+++ b/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig
@@ -16,8 +16,10 @@
CONFIG_SYS_MEMTEST_START=0xc0000000
CONFIG_SYS_MEMTEST_END=0xc4000000
CONFIG_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTCOMMAND="run bootcmd_stm32mp"
+CONFIG_SYS_PBSIZE=1050
CONFIG_SPL_FOOTPRINT_LIMIT=y
CONFIG_SPL_MAX_FOOTPRINT=0x3db00
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
@@ -31,8 +33,6 @@
CONFIG_SPL_I2C=y
CONFIG_SPL_POWER=y
CONFIG_SYS_PROMPT="STM32MP> "
-CONFIG_SYS_PBSIZE=1050
-CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_CMD_ADTIMG=y
CONFIG_CMD_ERASEENV=y
CONFIG_CMD_MEMINFO=y
diff --git a/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig b/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig
index 1f2ec0c..052294b 100644
--- a/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig
+++ b/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig
@@ -16,8 +16,10 @@
CONFIG_SYS_MEMTEST_START=0xc0000000
CONFIG_SYS_MEMTEST_END=0xc4000000
CONFIG_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTCOMMAND="run bootcmd_stm32mp"
+CONFIG_SYS_PBSIZE=1050
CONFIG_SPL_FOOTPRINT_LIMIT=y
CONFIG_SPL_MAX_FOOTPRINT=0x3db00
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
@@ -31,8 +33,6 @@
CONFIG_SPL_I2C=y
CONFIG_SPL_POWER=y
CONFIG_SYS_PROMPT="STM32MP> "
-CONFIG_SYS_PBSIZE=1050
-CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_CMD_ADTIMG=y
CONFIG_CMD_ERASEENV=y
CONFIG_CMD_MEMINFO=y
diff --git a/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig b/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig
index 8b33fd6..22336e8 100644
--- a/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig
+++ b/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig
@@ -16,8 +16,10 @@
CONFIG_SYS_MEMTEST_START=0xc0000000
CONFIG_SYS_MEMTEST_END=0xc4000000
CONFIG_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTCOMMAND="run bootcmd_stm32mp"
+CONFIG_SYS_PBSIZE=1050
CONFIG_SPL_FOOTPRINT_LIMIT=y
CONFIG_SPL_MAX_FOOTPRINT=0x3db00
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
@@ -31,8 +33,6 @@
CONFIG_SPL_I2C=y
CONFIG_SPL_POWER=y
CONFIG_SYS_PROMPT="STM32MP> "
-CONFIG_SYS_PBSIZE=1050
-CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_CMD_ADTIMG=y
CONFIG_CMD_ERASEENV=y
CONFIG_CMD_MEMINFO=y
diff --git a/configs/stm32mp15_basic_defconfig b/configs/stm32mp15_basic_defconfig
index be553ad..005f1d5 100644
--- a/configs/stm32mp15_basic_defconfig
+++ b/configs/stm32mp15_basic_defconfig
@@ -13,7 +13,7 @@
CONFIG_SPL=y
CONFIG_CMD_STM32KEY=y
CONFIG_TYPEC_STUSB160X=y
-CONFIG_TARGET_ST_STM32MP15x=y
+CONFIG_TARGET_ST_STM32MP15X=y
CONFIG_ENV_OFFSET_REDUND=0x2C0000
CONFIG_CMD_STM32PROG=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
@@ -23,10 +23,12 @@
CONFIG_SYS_MEMTEST_START=0xc0000000
CONFIG_SYS_MEMTEST_END=0xc4000000
CONFIG_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=1
CONFIG_FDT_SIMPLEFB=y
CONFIG_BOOTCOMMAND="run bootcmd_stm32mp"
+CONFIG_SYS_PBSIZE=1050
CONFIG_SPL_LOG=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_FOOTPRINT_LIMIT=y
@@ -46,8 +48,6 @@
CONFIG_SPL_SPI_FLASH_MTD=y
CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000
CONFIG_SYS_PROMPT="STM32MP> "
-CONFIG_SYS_PBSIZE=1050
-CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_CMD_ADTIMG=y
CONFIG_CMD_ERASEENV=y
CONFIG_CMD_NVEDIT_EFI=y
diff --git a/configs/stm32mp15_defconfig b/configs/stm32mp15_defconfig
index 261557b..3302b30 100644
--- a/configs/stm32mp15_defconfig
+++ b/configs/stm32mp15_defconfig
@@ -9,7 +9,7 @@
CONFIG_DDR_CACHEABLE_SIZE=0x8000000
CONFIG_CMD_STM32KEY=y
CONFIG_TYPEC_STUSB160X=y
-CONFIG_TARGET_ST_STM32MP15x=y
+CONFIG_TARGET_ST_STM32MP15X=y
CONFIG_ENV_OFFSET_REDUND=0x940000
CONFIG_CMD_STM32PROG=y
# CONFIG_ARMV7_NONSEC is not set
@@ -17,13 +17,13 @@
CONFIG_SYS_MEMTEST_START=0xc0000000
CONFIG_SYS_MEMTEST_END=0xc4000000
CONFIG_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=1
CONFIG_FDT_SIMPLEFB=y
CONFIG_BOOTCOMMAND="run bootcmd_stm32mp"
-CONFIG_SYS_PROMPT="STM32MP> "
CONFIG_SYS_PBSIZE=1050
-CONFIG_SYS_BOOTM_LEN=0x2000000
+CONFIG_SYS_PROMPT="STM32MP> "
CONFIG_CMD_ADTIMG=y
CONFIG_CMD_ERASEENV=y
CONFIG_CMD_NVEDIT_EFI=y
diff --git a/configs/stm32mp15_dhcom_basic_defconfig b/configs/stm32mp15_dhcom_basic_defconfig
index f4dbbf3..eb6e367 100644
--- a/configs/stm32mp15_dhcom_basic_defconfig
+++ b/configs/stm32mp15_dhcom_basic_defconfig
@@ -31,9 +31,11 @@
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0xc1000000
CONFIG_SPL_FIT_SOURCE="board/dhelectronics/dh_stm32mp1/u-boot-dhcom.its"
+CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=1
CONFIG_BOOTCOMMAND="run bootcmd_stm32mp"
+CONFIG_SYS_PBSIZE=1050
CONFIG_CONSOLE_MUX=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_FOOTPRINT_LIMIT=y
@@ -58,8 +60,6 @@
CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000
CONFIG_SPL_TARGET="u-boot.itb"
CONFIG_SYS_PROMPT="STM32MP> "
-CONFIG_SYS_PBSIZE=1050
-CONFIG_SYS_BOOTM_LEN=0x2000000
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_EXPORTENV is not set
CONFIG_CMD_EEPROM=y
diff --git a/configs/stm32mp15_dhcor_basic_defconfig b/configs/stm32mp15_dhcor_basic_defconfig
index d4ead98..ab92924 100644
--- a/configs/stm32mp15_dhcor_basic_defconfig
+++ b/configs/stm32mp15_dhcor_basic_defconfig
@@ -29,9 +29,11 @@
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0xc1000000
CONFIG_SPL_FIT_SOURCE="board/dhelectronics/dh_stm32mp1/u-boot-dhcor.its"
+CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=1
CONFIG_BOOTCOMMAND="run bootcmd_stm32mp"
+CONFIG_SYS_PBSIZE=1050
CONFIG_CONSOLE_MUX=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_FOOTPRINT_LIMIT=y
@@ -56,8 +58,6 @@
CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000
CONFIG_SPL_TARGET="u-boot.itb"
CONFIG_SYS_PROMPT="STM32MP> "
-CONFIG_SYS_PBSIZE=1050
-CONFIG_SYS_BOOTM_LEN=0x2000000
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_EXPORTENV is not set
CONFIG_CMD_EEPROM=y
diff --git a/configs/stm32mp15_trusted_defconfig b/configs/stm32mp15_trusted_defconfig
index 5a031e7..84b0854 100644
--- a/configs/stm32mp15_trusted_defconfig
+++ b/configs/stm32mp15_trusted_defconfig
@@ -9,8 +9,8 @@
CONFIG_DDR_CACHEABLE_SIZE=0x10000000
CONFIG_CMD_STM32KEY=y
CONFIG_TYPEC_STUSB160X=y
-CONFIG_STM32MP15x_STM32IMAGE=y
-CONFIG_TARGET_ST_STM32MP15x=y
+CONFIG_STM32MP15X_STM32IMAGE=y
+CONFIG_TARGET_ST_STM32MP15X=y
CONFIG_ENV_OFFSET_REDUND=0x2C0000
CONFIG_CMD_STM32PROG=y
# CONFIG_ARMV7_NONSEC is not set
@@ -18,13 +18,13 @@
CONFIG_SYS_MEMTEST_START=0xc0000000
CONFIG_SYS_MEMTEST_END=0xc4000000
CONFIG_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=1
CONFIG_FDT_SIMPLEFB=y
CONFIG_BOOTCOMMAND="run bootcmd_stm32mp"
-CONFIG_SYS_PROMPT="STM32MP> "
CONFIG_SYS_PBSIZE=1050
-CONFIG_SYS_BOOTM_LEN=0x2000000
+CONFIG_SYS_PROMPT="STM32MP> "
CONFIG_CMD_ADTIMG=y
CONFIG_CMD_ERASEENV=y
CONFIG_CMD_NVEDIT_EFI=y
diff --git a/configs/stm32mp25_defconfig b/configs/stm32mp25_defconfig
index 8423943..9fbd7eb 100644
--- a/configs/stm32mp25_defconfig
+++ b/configs/stm32mp25_defconfig
@@ -21,9 +21,9 @@
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_CLK=y
+CONFIG_CMD_FUSE=y
CONFIG_CMD_GPIO=y
# CONFIG_CMD_LOADB is not set
-# CONFIG_CMD_NET is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
CONFIG_CMD_RNG=y
@@ -31,6 +31,7 @@
CONFIG_CMD_REGULATOR=y
CONFIG_CMD_LOG=y
CONFIG_OF_LIVE=y
+# CONFIG_NET is not set
CONFIG_GPIO_HOG=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_STM32F7=y
diff --git a/configs/stmark2_defconfig b/configs/stmark2_defconfig
index f0faeda..92d96c9 100644
--- a/configs/stmark2_defconfig
+++ b/configs/stmark2_defconfig
@@ -16,12 +16,12 @@
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 rw rootfstype=ramfs rdinit=/bin/init devtmpfs.mount=1"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="sf probe 0:1 50000000; sf read ${loadaddr} 0x100000 ${kern_size}; bootm ${loadaddr}"
+CONFIG_SYS_PBSIZE=283
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_MALLOC_BOOTPARAMS=y
CONFIG_HUSH_PARSER=y
# CONFIG_CMDLINE_EDITING is not set
CONFIG_SYS_PROMPT="stmark2 $ "
-CONFIG_SYS_PBSIZE=283
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
# CONFIG_CMD_EXPORTENV is not set
diff --git a/configs/stout_defconfig b/configs/stout_defconfig
index e34e525..8fad272 100644
--- a/configs/stout_defconfig
+++ b/configs/stout_defconfig
@@ -33,6 +33,8 @@
CONFIG_PCI=y
CONFIG_FIT=y
CONFIG_BOOTDELAY=3
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=256
CONFIG_SPL_MAX_SIZE=0x4000
CONFIG_SPL_NO_BSS_LIMIT=y
CONFIG_SPL_BOARD_INIT=y
@@ -44,8 +46,6 @@
CONFIG_SYS_SPI_U_BOOT_OFFS=0x140000
CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=256
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_XIMG is not set
diff --git a/configs/stv0991_defconfig b/configs/stv0991_defconfig
index e6da8bb..e70db42 100644
--- a/configs/stv0991_defconfig
+++ b/configs/stv0991_defconfig
@@ -18,12 +18,12 @@
CONFIG_AUTOBOOT_STOP_STR=" "
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="go 0x40040000"
+CONFIG_SYS_PBSIZE=1050
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="STV0991> "
-CONFIG_SYS_PBSIZE=1050
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_SPI=y
# CONFIG_CMD_SETEXPR is not set
diff --git a/configs/synquacer_developerbox_defconfig b/configs/synquacer_developerbox_defconfig
index b0b6868..2a0407d 100644
--- a/configs/synquacer_developerbox_defconfig
+++ b/configs/synquacer_developerbox_defconfig
@@ -14,11 +14,11 @@
CONFIG_FWU_NUM_IMAGES_PER_BANK=1
CONFIG_AHCI=y
CONFIG_FIT=y
+CONFIG_SYS_BOOTM_LEN=0x800000
CONFIG_BOOTSTAGE_STASH_SIZE=4096
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=128
CONFIG_CMD_FWU_METADATA=y
-CONFIG_SYS_BOOTM_LEN=0x800000
CONFIG_CMD_IMLS=y
CONFIG_CMD_ERASEENV=y
CONFIG_CMD_NVEDIT_EFI=y
@@ -79,7 +79,6 @@
CONFIG_DM_RTC=y
CONFIG_RTC_PCF8563=y
CONFIG_SCSI=y
-CONFIG_DM_SCSI=y
CONFIG_SPECIFY_CONSOLE_INDEX=y
CONFIG_CONS_INDEX=0
CONFIG_DM_SERIAL=y
diff --git a/configs/syzygy_hub_defconfig b/configs/syzygy_hub_defconfig
index 78cbaa7..0d547d1 100644
--- a/configs/syzygy_hub_defconfig
+++ b/configs/syzygy_hub_defconfig
@@ -19,8 +19,10 @@
CONFIG_FIT_SIGNATURE=y
CONFIG_FIT_VERBOSE=y
CONFIG_LEGACY_IMAGE_FORMAT=y
+CONFIG_SYS_BOOTM_LEN=0x3c00000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_USE_PREBOOT=y
+CONFIG_SYS_PBSIZE=2071
CONFIG_CLOCKS=y
CONFIG_SPL_MAX_SIZE=0x30000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
@@ -34,8 +36,6 @@
CONFIG_SPL_OS_BOOT=y
CONFIG_SPL_PAYLOAD_ARGS_ADDR=0x10000000
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=2071
-CONFIG_SYS_BOOTM_LEN=0x3c00000
CONFIG_CMD_FPGA_LOADBP=y
CONFIG_CMD_FPGA_LOADFS=y
CONFIG_CMD_FPGA_LOADMK=y
diff --git a/configs/taurus_defconfig b/configs/taurus_defconfig
index 9be30c8..8679b90 100644
--- a/configs/taurus_defconfig
+++ b/configs/taurus_defconfig
@@ -4,7 +4,6 @@
CONFIG_SPL_SYS_ICACHE_OFF=y
CONFIG_SPL_SYS_DCACHE_OFF=y
CONFIG_ARCH_CPU_INIT=y
-CONFIG_SYS_THUMB_BUILD=y
# CONFIG_SPL_USE_ARCH_MEMCPY is not set
# CONFIG_SPL_USE_ARCH_MEMSET is not set
CONFIG_ARCH_AT91=y
@@ -38,6 +37,8 @@
CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) root=/dev/mtdblock7 rw rootfstype=jffs2"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="nand read 0x22000000 0x200000 0x300000; bootm"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=281
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_MAX_SIZE=0x3e00
@@ -61,8 +62,6 @@
CONFIG_SPL_DM_SPI_FLASH=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot> "
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=281
# CONFIG_SYS_XTRACE is not set
# CONFIG_CMD_BDI is not set
CONFIG_CMD_BOOTZ=y
@@ -90,7 +89,6 @@
CONFIG_SYS_DFU_DATA_BUF_SIZE=0x100000
CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
-CONFIG_MTD=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
diff --git a/configs/tb100_defconfig b/configs/tb100_defconfig
index 70d3ad0..03f625e 100644
--- a/configs/tb100_defconfig
+++ b/configs/tb100_defconfig
@@ -9,13 +9,13 @@
CONFIG_DEFAULT_DEVICE_TREE="abilis_tb100"
CONFIG_SYS_CLK_FREQ=500000000
CONFIG_SYS_LOAD_ADDR=0x82000000
+CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200n8"
-CONFIG_SYS_PROMPT="[tb100]:~# "
CONFIG_SYS_CBSIZE=256
CONFIG_SYS_PBSIZE=284
-CONFIG_SYS_BOOTM_LEN=0x2000000
+CONFIG_SYS_PROMPT="[tb100]:~# "
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
diff --git a/configs/tbs2910_defconfig b/configs/tbs2910_defconfig
index 8fbe84f..e05969d 100644
--- a/configs/tbs2910_defconfig
+++ b/configs/tbs2910_defconfig
@@ -26,11 +26,11 @@
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="echo PCI:; pci enum; pci 1; usb start"
CONFIG_DEFAULT_FDT_FILE="imx6q-tbs2910.dtb"
+CONFIG_SYS_PBSIZE=544
CONFIG_PRE_CONSOLE_BUFFER=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Matrix U-Boot> "
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=544
# CONFIG_CMD_BDI is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_BOOTM_PLAN9 is not set
diff --git a/configs/tec-ng_defconfig b/configs/tec-ng_defconfig
index fdda5e4..5a857cf 100644
--- a/configs/tec-ng_defconfig
+++ b/configs/tec-ng_defconfig
@@ -15,6 +15,7 @@
CONFIG_SYS_LOAD_ADDR=0x81000000
CONFIG_FIT=y
CONFIG_OF_SYSTEM_SETUP=y
+CONFIG_SYS_PBSIZE=2084
CONFIG_CONSOLE_MUX=y
CONFIG_SYS_STDIO_DEREGISTER=y
CONFIG_SPL_FOOTPRINT_LIMIT=y
@@ -26,7 +27,6 @@
CONFIG_SPL_SYS_MALLOC_SIZE=0x10000
CONFIG_SYS_PROMPT="Tegra30 (TEC-NG) # "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=2084
# CONFIG_CMD_IMI is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
@@ -40,7 +40,6 @@
CONFIG_ENV_OVERWRITE=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_MMC_ENV_PART=2
-CONFIG_SPL_DM=y
CONFIG_SYS_I2C_TEGRA=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_SYS_NS16550=y
diff --git a/configs/tec_defconfig b/configs/tec_defconfig
index cc2256b..4dba106 100644
--- a/configs/tec_defconfig
+++ b/configs/tec_defconfig
@@ -14,6 +14,7 @@
CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_FIT=y
CONFIG_OF_SYSTEM_SETUP=y
+CONFIG_SYS_PBSIZE=2081
CONFIG_SYS_STDIO_DEREGISTER=y
CONFIG_SPL_FOOTPRINT_LIMIT=y
CONFIG_SPL_MAX_FOOTPRINT=0x8000
@@ -24,7 +25,6 @@
CONFIG_SPL_SYS_MALLOC_SIZE=0x10000
CONFIG_SYS_PROMPT="Tegra20 (TEC) # "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=2081
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
@@ -39,8 +39,6 @@
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_SPL_DM=y
-CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
CONFIG_TEGRA_NAND=y
CONFIG_SYS_NAND_ONFI_DETECTION=y
diff --git a/configs/ten64_tfa_defconfig b/configs/ten64_tfa_defconfig
index 2ac5758..5c5d45f 100644
--- a/configs/ten64_tfa_defconfig
+++ b/configs/ten64_tfa_defconfig
@@ -25,6 +25,7 @@
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x3000000 default_hugepagesz=2m hugepagesz=2m hugepages=256"
+CONFIG_SYS_PBSIZE=532
CONFIG_LOGLEVEL=7
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
@@ -32,13 +33,11 @@
CONFIG_PCI_INIT_R=y
CONFIG_RESET_PHY_R=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_BOOTEFI_SELFTEST=y
CONFIG_CMD_BOOTMENU=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_NVEDIT_EFI=y
CONFIG_CMD_MEMTEST=y
-CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
@@ -82,7 +81,6 @@
CONFIG_PCIE_LAYERSCAPE_RC=y
CONFIG_DM_RTC=y
CONFIG_RTC_RX8025=y
-CONFIG_DM_SCSI=y
CONFIG_SPECIFY_CONSOLE_INDEX=y
CONFIG_DM_SERIAL=y
CONFIG_SYS_NS16550=y
diff --git a/configs/th1520_lpi4a_defconfig b/configs/th1520_lpi4a_defconfig
index 944078b..49ff92f 100644
--- a/configs/th1520_lpi4a_defconfig
+++ b/configs/th1520_lpi4a_defconfig
@@ -17,17 +17,18 @@
# CONFIG_FIT_PRINT is not set
# CONFIG_BOOTSTD is not set
# CONFIG_LEGACY_IMAGE_FORMAT is not set
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTARGS_SUBST=y
CONFIG_BOOTCOMMAND=""
CONFIG_DEFAULT_FDT_FILE="thead/th1520-lichee-pi-4a.dtb"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
CONFIG_LOG=y
CONFIG_DISPLAY_CPUINFO=y
CONFIG_DISPLAY_BOARDINFO=y
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SYS_PROMPT="LPI4A=> "
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_CONFIG=y
CONFIG_CMD_LICENSE=y
CONFIG_CMD_BOOTZ=y
@@ -35,7 +36,6 @@
# CONFIG_BOOTM_PLAN9 is not set
# CONFIG_BOOTM_RTEMS is not set
# CONFIG_BOOTM_VXWORKS is not set
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_BOOTMENU=y
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_IMI is not set
diff --git a/configs/theadorable-x86-conga-qa3-e3845-pcie-x4_defconfig b/configs/theadorable-x86-conga-qa3-e3845-pcie-x4_defconfig
index 5dc9904..bd5dd98 100644
--- a/configs/theadorable-x86-conga-qa3-e3845-pcie-x4_defconfig
+++ b/configs/theadorable-x86-conga-qa3-e3845-pcie-x4_defconfig
@@ -24,10 +24,10 @@
CONFIG_BOOTSTAGE_REPORT=y
CONFIG_SHOW_BOOT_PROGRESS=y
CONFIG_USE_PREBOOT=y
+CONFIG_SYS_PBSIZE=532
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_CPU=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
diff --git a/configs/theadorable-x86-conga-qa3-e3845_defconfig b/configs/theadorable-x86-conga-qa3-e3845_defconfig
index d7b6264..e93178a 100644
--- a/configs/theadorable-x86-conga-qa3-e3845_defconfig
+++ b/configs/theadorable-x86-conga-qa3-e3845_defconfig
@@ -23,10 +23,10 @@
CONFIG_BOOTSTAGE_REPORT=y
CONFIG_SHOW_BOOT_PROGRESS=y
CONFIG_USE_PREBOOT=y
+CONFIG_SYS_PBSIZE=532
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_CPU=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
diff --git a/configs/theadorable-x86-dfi-bt700_defconfig b/configs/theadorable-x86-dfi-bt700_defconfig
index 861b59f..4905ba6 100644
--- a/configs/theadorable-x86-dfi-bt700_defconfig
+++ b/configs/theadorable-x86-dfi-bt700_defconfig
@@ -22,10 +22,10 @@
CONFIG_BOOTSTAGE_REPORT=y
CONFIG_SHOW_BOOT_PROGRESS=y
CONFIG_USE_PREBOOT=y
+CONFIG_SYS_PBSIZE=532
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_CPU=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
diff --git a/configs/thunderx_88xx_defconfig b/configs/thunderx_88xx_defconfig
index 5c24b38..6743515 100644
--- a/configs/thunderx_88xx_defconfig
+++ b/configs/thunderx_88xx_defconfig
@@ -15,25 +15,25 @@
CONFIG_SYS_LOAD_ADDR=0x500000
CONFIG_DEBUG_UART=y
CONFIG_REMAKE_ELF=y
+CONFIG_SYS_BOOTM_LEN=0x800000
CONFIG_BOOTDELAY=5
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyAMA0,115200n8 earlycon=pl011,0x87e024000000 debug maxcpus=48 rootwait rw root=/dev/sda2 coherent_pool=16M"
+CONFIG_SYS_CBSIZE=512
+CONFIG_SYS_PBSIZE=544
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_PROMPT="ThunderX_88XX> "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_CBSIZE=512
-CONFIG_SYS_PBSIZE=544
-CONFIG_SYS_BOOTM_LEN=0x800000
# CONFIG_CMD_EXPORTENV is not set
# CONFIG_CMD_IMPORTENV is not set
# CONFIG_CMD_EDITENV is not set
# CONFIG_CMD_SAVEENV is not set
# CONFIG_CMD_ENV_EXISTS is not set
-# CONFIG_CMD_NET is not set
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+# CONFIG_NET is not set
# CONFIG_MMC is not set
CONFIG_DM_SERIAL=y
CONFIG_DEBUG_UART_SKIP_INIT=y
diff --git a/configs/tinker-rk3288_defconfig b/configs/tinker-rk3288_defconfig
index 303c329..edb6294 100644
--- a/configs/tinker-rk3288_defconfig
+++ b/configs/tinker-rk3288_defconfig
@@ -23,6 +23,7 @@
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEBUG_UART=y
# CONFIG_ANDROID_BOOT_IMAGE is not set
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_USE_PREBOOT=y
CONFIG_DEFAULT_FDT_FILE="rk3288-tinker.dtb"
CONFIG_SILENT_CONSOLE=y
@@ -34,7 +35,6 @@
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
CONFIG_SPL_I2C=y
CONFIG_SPL_POWER=y
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
@@ -68,7 +68,6 @@
CONFIG_I2C_EEPROM=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
-CONFIG_MTD=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_GMAC_ROCKCHIP=y
CONFIG_PINCTRL=y
diff --git a/configs/tinker-s-rk3288_defconfig b/configs/tinker-s-rk3288_defconfig
index 3267fdc..499094b 100644
--- a/configs/tinker-s-rk3288_defconfig
+++ b/configs/tinker-s-rk3288_defconfig
@@ -23,6 +23,7 @@
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEBUG_UART=y
# CONFIG_ANDROID_BOOT_IMAGE is not set
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_USE_PREBOOT=y
CONFIG_DEFAULT_FDT_FILE="rk3288-tinker-s.dtb"
CONFIG_SILENT_CONSOLE=y
@@ -34,7 +35,6 @@
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x300000
CONFIG_SPL_I2C=y
CONFIG_SPL_POWER=y
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
diff --git a/configs/tools-only_defconfig b/configs/tools-only_defconfig
index fa1ff4a..b54d2ce 100644
--- a/configs/tools-only_defconfig
+++ b/configs/tools-only_defconfig
@@ -16,6 +16,7 @@
CONFIG_BOOTCOMMAND="run distro_bootcmd"
# CONFIG_CMD_BOOTD is not set
# CONFIG_CMD_BOOTM is not set
+# CONFIG_CMD_BOOTI is not set
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_EXTENSION is not set
# CONFIG_CMD_DATE is not set
diff --git a/configs/topic_miami_defconfig b/configs/topic_miami_defconfig
index 8ba29d7..79e107f 100644
--- a/configs/topic_miami_defconfig
+++ b/configs/topic_miami_defconfig
@@ -21,10 +21,12 @@
CONFIG_REMAKE_ELF=y
CONFIG_SYS_CUSTOM_LDSCRIPT=y
CONFIG_SYS_LDSCRIPT="arch/arm/mach-zynq/u-boot.lds"
+CONFIG_SYS_BOOTM_LEN=0x3c00000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=0
CONFIG_BOOTCOMMAND="if mmcinfo; then if fatload mmc 0 0x1900000 ${bootscript}; then source 0x1900000; fi; fi; run $modeboot"
CONFIG_USE_PREBOOT=y
+CONFIG_SYS_PBSIZE=2077
CONFIG_CLOCKS=y
CONFIG_SPL_MAX_SIZE=0x30000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
@@ -38,8 +40,6 @@
CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
CONFIG_SYS_PROMPT="zynq-uboot> "
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=2077
-CONFIG_SYS_BOOTM_LEN=0x3c00000
CONFIG_CMD_THOR_DOWNLOAD=y
CONFIG_THOR_RESET_OFF=y
CONFIG_CMD_MEMTEST=y
diff --git a/configs/topic_miamilite_defconfig b/configs/topic_miamilite_defconfig
index 8d37d05..0168cf8 100644
--- a/configs/topic_miamilite_defconfig
+++ b/configs/topic_miamilite_defconfig
@@ -21,10 +21,12 @@
CONFIG_REMAKE_ELF=y
CONFIG_SYS_CUSTOM_LDSCRIPT=y
CONFIG_SYS_LDSCRIPT="arch/arm/mach-zynq/u-boot.lds"
+CONFIG_SYS_BOOTM_LEN=0x3c00000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=0
CONFIG_BOOTCOMMAND="if mmcinfo; then if fatload mmc 0 0x1900000 ${bootscript}; then source 0x1900000; fi; fi; run $modeboot"
CONFIG_USE_PREBOOT=y
+CONFIG_SYS_PBSIZE=2077
CONFIG_CLOCKS=y
CONFIG_SPL_MAX_SIZE=0x30000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
@@ -38,8 +40,6 @@
CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
CONFIG_SYS_PROMPT="zynq-uboot> "
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=2077
-CONFIG_SYS_BOOTM_LEN=0x3c00000
CONFIG_CMD_THOR_DOWNLOAD=y
CONFIG_THOR_RESET_OFF=y
CONFIG_CMD_MEMTEST=y
diff --git a/configs/topic_miamiplus_defconfig b/configs/topic_miamiplus_defconfig
index fd89c25..3030963 100644
--- a/configs/topic_miamiplus_defconfig
+++ b/configs/topic_miamiplus_defconfig
@@ -21,10 +21,12 @@
CONFIG_REMAKE_ELF=y
CONFIG_SYS_CUSTOM_LDSCRIPT=y
CONFIG_SYS_LDSCRIPT="arch/arm/mach-zynq/u-boot.lds"
+CONFIG_SYS_BOOTM_LEN=0x3c00000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=0
CONFIG_BOOTCOMMAND="if mmcinfo; then if fatload mmc 0 0x1900000 ${bootscript}; then source 0x1900000; fi; fi; run $modeboot"
CONFIG_USE_PREBOOT=y
+CONFIG_SYS_PBSIZE=2077
CONFIG_CLOCKS=y
CONFIG_SPL_MAX_SIZE=0x30000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
@@ -38,8 +40,6 @@
CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
CONFIG_SYS_PROMPT="zynq-uboot> "
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=2077
-CONFIG_SYS_BOOTM_LEN=0x3c00000
CONFIG_CMD_THOR_DOWNLOAD=y
CONFIG_THOR_RESET_OFF=y
CONFIG_CMD_MEMTEST=y
diff --git a/configs/total_compute_defconfig b/configs/total_compute_defconfig
index 4bb55e1..0124932 100644
--- a/configs/total_compute_defconfig
+++ b/configs/total_compute_defconfig
@@ -19,6 +19,8 @@
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=5
CONFIG_BOOTCOMMAND="if part number mmc 0 vbmeta is_avb; then echo MMC with vbmeta partition detected.; echo starting Android Verified boot.; avb init 0; if avb verify; then set bootargs $bootargs $avb_bootargs; part start mmc 0 boot boot_start; part size mmc 0 boot boot_size; mmc read ${load_addr} ${boot_start} ${boot_size}; bootm ${load_addr} ${load_addr} ${fdt_addr_r}; else; echo AVB verification failed.; exit; fi; elif part number mmc 0 system is_non_avb_android; then booti ${kernel_addr_r} ${initrd_addr_r} ${fdt_addr_r};else; echo Booting FIT image.; bootm ${load_addr} ${load_addr} ${fdt_addr_r}; fi;"
+CONFIG_SYS_CBSIZE=512
+CONFIG_SYS_PBSIZE=544
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_AVB_VERIFY=y
@@ -26,15 +28,12 @@
CONFIG_AVB_BUF_SIZE=0x10000000
CONFIG_SYS_PROMPT="TOTAL_COMPUTE# "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_CBSIZE=512
-CONFIG_SYS_PBSIZE=544
# CONFIG_CMD_CONSOLE is not set
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_EDITENV is not set
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_ARMFLASH=y
CONFIG_CMD_GPT=y
-# CONFIG_RANDOM_UUID is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
# CONFIG_CMD_ITEST is not set
@@ -60,4 +59,5 @@
CONFIG_SYS_FLASH_PROTECTION=y
CONFIG_SYS_FLASH_CFI=y
CONFIG_SYS_MAX_FLASH_SECT=256
+# CONFIG_RANDOM_UUID is not set
CONFIG_LIBAVB=y
diff --git a/configs/tqma6dl_mba6_mmc_defconfig b/configs/tqma6dl_mba6_mmc_defconfig
index ce30194..1a1d253 100644
--- a/configs/tqma6dl_mba6_mmc_defconfig
+++ b/configs/tqma6dl_mba6_mmc_defconfig
@@ -16,9 +16,9 @@
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run mmcboot; run netboot; run panicboot"
CONFIG_DEFAULT_FDT_FILE="imx6dl-mba6x.dtb"
+CONFIG_SYS_PBSIZE=532
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_EEPROM=y
CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
diff --git a/configs/tqma6dl_mba6_spi_defconfig b/configs/tqma6dl_mba6_spi_defconfig
index 919cec1..c6a1c7c 100644
--- a/configs/tqma6dl_mba6_spi_defconfig
+++ b/configs/tqma6dl_mba6_spi_defconfig
@@ -19,9 +19,9 @@
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="sf probe; run mmcboot; run netboot; run panicboot"
CONFIG_DEFAULT_FDT_FILE="imx6dl-mba6x.dtb"
+CONFIG_SYS_PBSIZE=532
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_EEPROM=y
CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
diff --git a/configs/tqma6q_mba6_mmc_defconfig b/configs/tqma6q_mba6_mmc_defconfig
index 2910b85..27f949c 100644
--- a/configs/tqma6q_mba6_mmc_defconfig
+++ b/configs/tqma6q_mba6_mmc_defconfig
@@ -16,9 +16,9 @@
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run mmcboot; run netboot; run panicboot"
CONFIG_DEFAULT_FDT_FILE="imx6q-mba6x.dtb"
+CONFIG_SYS_PBSIZE=532
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_EEPROM=y
CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
diff --git a/configs/tqma6q_mba6_spi_defconfig b/configs/tqma6q_mba6_spi_defconfig
index 556e6d6..5d3ce79 100644
--- a/configs/tqma6q_mba6_spi_defconfig
+++ b/configs/tqma6q_mba6_spi_defconfig
@@ -19,9 +19,9 @@
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="sf probe; run mmcboot; run netboot; run panicboot"
CONFIG_DEFAULT_FDT_FILE="imx6q-mba6x.dtb"
+CONFIG_SYS_PBSIZE=532
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_EEPROM=y
CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
diff --git a/configs/tqma6s_mba6_mmc_defconfig b/configs/tqma6s_mba6_mmc_defconfig
index 853b083..a9ed0d3 100644
--- a/configs/tqma6s_mba6_mmc_defconfig
+++ b/configs/tqma6s_mba6_mmc_defconfig
@@ -16,9 +16,9 @@
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run mmcboot; run netboot; run panicboot"
CONFIG_DEFAULT_FDT_FILE="imx6dl-mba6x.dtb"
+CONFIG_SYS_PBSIZE=532
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_EEPROM=y
CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
diff --git a/configs/tqma6s_mba6_spi_defconfig b/configs/tqma6s_mba6_spi_defconfig
index 7316056..9cd8c3d 100644
--- a/configs/tqma6s_mba6_spi_defconfig
+++ b/configs/tqma6s_mba6_spi_defconfig
@@ -19,9 +19,9 @@
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="sf probe; run mmcboot; run netboot; run panicboot"
CONFIG_DEFAULT_FDT_FILE="imx6dl-mba6x.dtb"
+CONFIG_SYS_PBSIZE=532
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_EEPROM=y
CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
diff --git a/configs/transformer_t30_defconfig b/configs/transformer_t30_defconfig
index 092c0aa..e4f7697 100644
--- a/configs/transformer_t30_defconfig
+++ b/configs/transformer_t30_defconfig
@@ -21,6 +21,7 @@
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_BOOTCOMMAND="setenv skip_boot 0; setenv gpio_button 150; if run check_button; then poweroff; fi; setenv gpio_button 131; if run check_button; then bootmenu; fi; if test ${skip_boot} -eq 1; then; else run bootcmd_usb0; run bootcmd_mmc1; run bootcmd_mmc0; poweroff; fi"
+CONFIG_SYS_PBSIZE=2084
CONFIG_SPL_FOOTPRINT_LIMIT=y
CONFIG_SPL_MAX_FOOTPRINT=0x8000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
@@ -30,7 +31,7 @@
CONFIG_SPL_SYS_MALLOC_SIZE=0x10000
CONFIG_SYS_PROMPT="Tegra30 (Transformer) # "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=2084
+# CONFIG_CMD_BOOTEFI_BOOTMGR is not set
CONFIG_CMD_BOOTMENU=y
# CONFIG_CMD_IMI is not set
CONFIG_CMD_GPIO=y
@@ -45,13 +46,13 @@
CONFIG_CMD_UMS_ABORT_KEYED=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_PAUSE=y
+CONFIG_CMD_REGULATOR=y
CONFIG_CMD_EXT4_WRITE=y
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_ENV_OVERWRITE=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_MMC_ENV_PART=2
-CONFIG_SPL_DM=y
CONFIG_BUTTON=y
CONFIG_USB_FUNCTION_FASTBOOT=y
CONFIG_FASTBOOT_BUF_ADDR=0x91000000
@@ -65,10 +66,14 @@
CONFIG_I2C_MUX_GPIO=y
CONFIG_BUTTON_KEYBOARD=y
CONFIG_DM_PMIC=y
+CONFIG_DM_PMIC_TPS65910=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_REGULATOR_TPS65911=y
CONFIG_PWM_TEGRA=y
CONFIG_SYS_NS16550=y
+CONFIG_TEGRA20_SLINK=y
+CONFIG_SYSRESET_TPS65910=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_TEGRA=y
@@ -80,4 +85,3 @@
CONFIG_VIDEO=y
# CONFIG_VIDEO_LOGO is not set
CONFIG_VIDEO_TEGRA20=y
-# CONFIG_CMD_BOOTEFI_BOOTMGR is not set
diff --git a/configs/transpeed-8k618-t_defconfig b/configs/transpeed-8k618-t_defconfig
new file mode 100644
index 0000000..020d397
--- /dev/null
+++ b/configs/transpeed-8k618-t_defconfig
@@ -0,0 +1,27 @@
+CONFIG_ARM=y
+CONFIG_ARCH_SUNXI=y
+CONFIG_DEFAULT_DEVICE_TREE="sun50i-h618-transpeed-8k618-t"
+CONFIG_SPL=y
+CONFIG_DRAM_SUN50I_H616_DX_ODT=0x03030303
+CONFIG_DRAM_SUN50I_H616_DX_DRI=0x0e0e0e0e
+CONFIG_DRAM_SUN50I_H616_CA_DRI=0x1f12
+CONFIG_DRAM_SUN50I_H616_TPR0=0xc0001002
+CONFIG_DRAM_SUN50I_H616_TPR10=0x2f1107
+CONFIG_DRAM_SUN50I_H616_TPR11=0xddddcccc
+CONFIG_DRAM_SUN50I_H616_TPR12=0xeddc7665
+CONFIG_MACH_SUN50I_H616=y
+CONFIG_SUNXI_DRAM_H616_DDR3_1333=y
+CONFIG_DRAM_CLK=648
+CONFIG_MMC_SUNXI_SLOT_EXTRA=2
+CONFIG_R_I2C_ENABLE=y
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SPL_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
+CONFIG_SUPPORT_EMMC_BOOT=y
+CONFIG_AXP313_POWER=y
+CONFIG_AXP_DCDC3_VOLT=1360
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_OHCI_HCD=y
diff --git a/configs/trats2_defconfig b/configs/trats2_defconfig
index 6c4909f..6756136 100644
--- a/configs/trats2_defconfig
+++ b/configs/trats2_defconfig
@@ -24,11 +24,11 @@
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="Please use defined boot"
CONFIG_BOOTCOMMAND="run autoboot"
+CONFIG_SYS_PBSIZE=1024
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_MISC_INIT_R=y
CONFIG_SYS_PROMPT="Trats2 # "
-CONFIG_SYS_PBSIZE=1024
# CONFIG_CMD_XIMG is not set
CONFIG_CMD_THOR_DOWNLOAD=y
CONFIG_CMD_DFU=y
@@ -36,7 +36,6 @@
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB_MASS_STORAGE=y
-# CONFIG_CMD_NET is not set
CONFIG_CMD_CACHE=y
# CONFIG_CMD_SLEEP is not set
CONFIG_CMD_EXT4_WRITE=y
@@ -44,6 +43,7 @@
CONFIG_ENV_OVERWRITE=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+# CONFIG_NET is not set
CONFIG_DFU_MMC=y
CONFIG_SYS_DFU_DATA_BUF_SIZE=0x2000000
CONFIG_DM_I2C_GPIO=y
@@ -52,7 +52,6 @@
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_S5P=y
-CONFIG_MTD=y
CONFIG_DM_PMIC=y
CONFIG_DM_PMIC_MAX77686=y
CONFIG_DM_REGULATOR=y
diff --git a/configs/trats_defconfig b/configs/trats_defconfig
index 78484c0..9892524 100644
--- a/configs/trats_defconfig
+++ b/configs/trats_defconfig
@@ -23,11 +23,11 @@
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="Please use defined boot"
CONFIG_BOOTCOMMAND="run autoboot"
+CONFIG_SYS_PBSIZE=1024
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_MISC_INIT_R=y
CONFIG_SYS_PROMPT="Trats # "
-CONFIG_SYS_PBSIZE=1024
# CONFIG_CMD_XIMG is not set
CONFIG_CMD_THOR_DOWNLOAD=y
CONFIG_CMD_DFU=y
@@ -35,7 +35,6 @@
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB_MASS_STORAGE=y
-# CONFIG_CMD_NET is not set
CONFIG_CMD_CACHE=y
# CONFIG_CMD_SLEEP is not set
CONFIG_CMD_EXT4_WRITE=y
@@ -43,6 +42,7 @@
CONFIG_ENV_OVERWRITE=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+# CONFIG_NET is not set
CONFIG_DFU_MMC=y
CONFIG_SYS_DFU_DATA_BUF_SIZE=0x2000000
CONFIG_DM_I2C_GPIO=y
@@ -51,7 +51,6 @@
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_S5P=y
-CONFIG_MTD=y
CONFIG_DM_PMIC=y
CONFIG_PMIC_MAX8997=y
CONFIG_USB=y
diff --git a/configs/trimslice_defconfig b/configs/trimslice_defconfig
index b84a78b..29d7279 100644
--- a/configs/trimslice_defconfig
+++ b/configs/trimslice_defconfig
@@ -15,6 +15,7 @@
CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_PCI=y
CONFIG_OF_SYSTEM_SETUP=y
+CONFIG_SYS_PBSIZE=2087
CONFIG_CONSOLE_MUX=y
CONFIG_SYS_STDIO_DEREGISTER=y
CONFIG_SPL_FOOTPRINT_LIMIT=y
@@ -26,7 +27,6 @@
CONFIG_SPL_SYS_MALLOC_SIZE=0x10000
CONFIG_SYS_PROMPT="Tegra20 (TrimSlice) # "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=2087
# CONFIG_CMD_IMI is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
@@ -42,7 +42,6 @@
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_ENV_SPI_MAX_HZ=48000000
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_SPL_DM=y
CONFIG_SYS_I2C_TEGRA=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_RTL8169=y
diff --git a/configs/tuge1_defconfig b/configs/tuge1_defconfig
index 9ff5d15..a6890b8 100644
--- a/configs/tuge1_defconfig
+++ b/configs/tuge1_defconfig
@@ -96,20 +96,21 @@
CONFIG_LCRR_CLKDIV_2=y
CONFIG_83XX_PCICLK=0x3ef1480
# CONFIG_PCI is not set
+CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Hit <SPACE> key to stop autoboot in %2ds\n"
CONFIG_AUTOBOOT_STOP_STR=" "
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_SYS_CBSIZE=512
+CONFIG_SYS_PBSIZE=532
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_HWCONFIG is not set
CONFIG_LAST_STAGE_INIT=y
CONFIG_MISC_INIT_R=y
CONFIG_HUSH_PARSER=y
+CONFIG_HUSH_OLD_PARSER=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_CBSIZE=512
-CONFIG_SYS_PBSIZE=532
-CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_CMD_IMLS=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
diff --git a/configs/turing-rk1-rk3588_defconfig b/configs/turing-rk1-rk3588_defconfig
new file mode 100644
index 0000000..289f2da
--- /dev/null
+++ b/configs/turing-rk1-rk3588_defconfig
@@ -0,0 +1,133 @@
+CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_SYS_HAS_NONCACHED_MEMORY=y
+CONFIG_COUNTER_FREQUENCY=24000000
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_TEXT_BASE=0x00a00000
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_NR_DRAM_BANKS=2
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000
+CONFIG_SF_DEFAULT_SPEED=24000000
+CONFIG_SF_DEFAULT_MODE=0x2000
+CONFIG_DEFAULT_DEVICE_TREE="rk3588-turing-rk1"
+CONFIG_ROCKCHIP_RK3588=y
+CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y
+CONFIG_ROCKCHIP_SPI_IMAGE=y
+CONFIG_SPL_SERIAL=y
+CONFIG_SPL_STACK_R_ADDR=0x600000
+CONFIG_TARGET_TURINGRK1_RK3588=y
+CONFIG_SPL_STACK=0x400000
+CONFIG_DEBUG_UART_BASE=0xFEBC0000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI=y
+CONFIG_SYS_LOAD_ADDR=0xc00800
+CONFIG_PCI=y
+CONFIG_DEBUG_UART=y
+CONFIG_AHCI=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_FIT_SIGNATURE=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_LEGACY_IMAGE_FORMAT=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-turing-rk1.dtb"
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_SPL_MAX_SIZE=0x40000
+CONFIG_SPL_PAD_TO=0x7f8000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x4000000
+CONFIG_SPL_BSS_MAX_SIZE=0x4000
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x60000
+CONFIG_SPL_ATF=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_SCSI=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_ROCKUSB=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_REGULATOR=y
+CONFIG_CMD_TFTPPUT=y
+CONFIG_CMD_TFTPSRV=y
+# CONFIG_SPL_DOS_PARTITION is not set
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SPL_SYSCON=y
+CONFIG_SATA=y
+CONFIG_SCSI_AHCI=y
+CONFIG_AHCI_PCI=y
+CONFIG_SPL_CLK=y
+# CONFIG_USB_FUNCTION_FASTBOOT is not set
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MISC=y
+CONFIG_SUPPORT_EMMC_RPMB=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
+CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_SF_DEFAULT_BUS=5
+CONFIG_SPI_FLASH_SFDP_SUPPORT=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_XTX=y
+CONFIG_SPI_FLASH_XMC=y
+CONFIG_PHYLIB=y
+CONFIG_RTL8169=y
+CONFIG_NVME_PCI=y
+CONFIG_PCIE_DW_ROCKCHIP=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
+CONFIG_PHY_ROCKCHIP_USBDP=y
+CONFIG_SPL_PINCTRL=y
+CONFIG_PHY_REALTEK=y
+CONFIG_DWC_ETH_QOS=y
+CONFIG_DWC_ETH_QOS_ROCKCHIP=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_SPL_RAM=y
+CONFIG_SCSI=y
+CONFIG_DM_SCSI=y
+CONFIG_BAUDRATE=115200
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
+CONFIG_ROCKCHIP_SFC=y
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_DM_USB_GADGET=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_GENERIC=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
+CONFIG_USB_XHCI_PCI=y
+CONFIG_SPL_USB_DWC3_GENERIC=y
+CONFIG_USB_HOST_ETHER=y
+CONFIG_USB_ETHER_ASIX=y
+CONFIG_USB_ETHER_ASIX88179=y
+CONFIG_USB_ETHER_LAN75XX=y
+CONFIG_USB_ETHER_LAN78XX=y
+CONFIG_USB_ETHER_MCS7830=y
+CONFIG_USB_ETHER_RTL8152=y
+CONFIG_USB_ETHER_SMSC95XX=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_PRODUCT_NUM=0x350b
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_USB_FUNCTION_ROCKUSB=y
+CONFIG_ERRNO_STR=y
diff --git a/configs/turris_mox_defconfig b/configs/turris_mox_defconfig
index c9815b6..a6f3fc9 100644
--- a/configs/turris_mox_defconfig
+++ b/configs/turris_mox_defconfig
@@ -74,7 +74,6 @@
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_XENON=y
-CONFIG_MTD=y
CONFIG_DM_MTD=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_SPANSION=y
@@ -95,7 +94,6 @@
CONFIG_DM_RTC=y
CONFIG_RTC_DS1307=y
CONFIG_SCSI=y
-CONFIG_DM_SCSI=y
CONFIG_MVEBU_A3700_UART=y
CONFIG_MVEBU_A3700_SPI=y
CONFIG_USB=y
diff --git a/configs/turris_omnia_defconfig b/configs/turris_omnia_defconfig
index 65d4a29..f045dd7 100644
--- a/configs/turris_omnia_defconfig
+++ b/configs/turris_omnia_defconfig
@@ -88,7 +88,6 @@
CONFIG_DM_PCA953X=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_MV=y
-CONFIG_MTD=y
CONFIG_DM_MTD=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_SPANSION=y
@@ -106,7 +105,6 @@
CONFIG_PINCTRL_ARMADA_38X=y
CONFIG_DM_RTC=y
CONFIG_RTC_ARMADA38X=y
-CONFIG_SCSI=y
CONFIG_SERIAL_PROBE_ALL=y
CONFIG_SPL_DEBUG_UART_BASE=0xd0012000
CONFIG_DEBUG_UART_SHIFT=2
diff --git a/configs/tuxx1_defconfig b/configs/tuxx1_defconfig
index 5b33e8f..7e43337 100644
--- a/configs/tuxx1_defconfig
+++ b/configs/tuxx1_defconfig
@@ -110,20 +110,21 @@
CONFIG_LCRR_CLKDIV_2=y
CONFIG_83XX_PCICLK=0x3ef1480
# CONFIG_PCI is not set
+CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Hit <SPACE> key to stop autoboot in %2ds\n"
CONFIG_AUTOBOOT_STOP_STR=" "
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_SYS_CBSIZE=512
+CONFIG_SYS_PBSIZE=532
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_HWCONFIG is not set
CONFIG_LAST_STAGE_INIT=y
CONFIG_MISC_INIT_R=y
CONFIG_HUSH_PARSER=y
+CONFIG_HUSH_OLD_PARSER=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_CBSIZE=512
-CONFIG_SYS_PBSIZE=532
-CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_CMD_IMLS=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
diff --git a/configs/uDPU_defconfig b/configs/uDPU_defconfig
index d3f1466..bb1c6ef 100644
--- a/configs/uDPU_defconfig
+++ b/configs/uDPU_defconfig
@@ -18,13 +18,13 @@
CONFIG_FIT_VERBOSE=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_USE_PREBOOT=y
+CONFIG_SYS_PBSIZE=1048
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SYS_PROMPT="uDPU>> "
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=1048
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_XIMG is not set
@@ -60,7 +60,6 @@
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_XENON=y
-CONFIG_MTD=y
CONFIG_DM_MTD=y
CONFIG_SPI_FLASH_SFDP_SUPPORT=y
CONFIG_SPI_FLASH_MACRONIX=y
diff --git a/configs/udoo_defconfig b/configs/udoo_defconfig
index f89b163..00b732b 100644
--- a/configs/udoo_defconfig
+++ b/configs/udoo_defconfig
@@ -22,6 +22,7 @@
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=3
CONFIG_BOOTCOMMAND="run findfdt; run distro_bootcmd"
+CONFIG_SYS_PBSIZE=532
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_FS_EXT4=y
@@ -29,7 +30,6 @@
CONFIG_SPL_I2C=y
CONFIG_SPL_WATCHDOG=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
# CONFIG_CMD_PINMUX is not set
diff --git a/configs/udoo_neo_defconfig b/configs/udoo_neo_defconfig
index 853472f..4986b4c 100644
--- a/configs/udoo_neo_defconfig
+++ b/configs/udoo_neo_defconfig
@@ -21,13 +21,13 @@
# CONFIG_CMD_BMODE is not set
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTCOMMAND="run findfdt; run distro_bootcmd"
+CONFIG_SYS_PBSIZE=532
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_FS_EXT4=y
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot-dtb.img"
CONFIG_SPL_WATCHDOG=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
# CONFIG_CMD_PINMUX is not set
diff --git a/configs/uniphier_ld4_sld8_defconfig b/configs/uniphier_ld4_sld8_defconfig
index a716c05..1e74d83 100644
--- a/configs/uniphier_ld4_sld8_defconfig
+++ b/configs/uniphier_ld4_sld8_defconfig
@@ -15,6 +15,7 @@
CONFIG_MICRO_SUPPORT_CARD=y
CONFIG_SYS_LOAD_ADDR=0x85000000
CONFIG_TIMESTAMP=y
+CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_FDT_FIXUP_PARTITIONS=y
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
CONFIG_BOOTCOMMAND="run ${bootdev}script; run ${bootdev}boot"
@@ -29,7 +30,6 @@
CONFIG_SPL_NOR_SUPPORT=y
CONFIG_SPL_TARGET="u-boot-with-spl.bin"
CONFIG_CMD_CONFIG=y
-CONFIG_SYS_BOOTM_LEN=0x2000000
# CONFIG_CMD_XIMG is not set
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10
CONFIG_CMD_GPIO=y
diff --git a/configs/uniphier_v7_defconfig b/configs/uniphier_v7_defconfig
index 1e030fc..0c83824 100644
--- a/configs/uniphier_v7_defconfig
+++ b/configs/uniphier_v7_defconfig
@@ -15,6 +15,7 @@
CONFIG_MICRO_SUPPORT_CARD=y
CONFIG_SYS_LOAD_ADDR=0x85000000
CONFIG_TIMESTAMP=y
+CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_FDT_FIXUP_PARTITIONS=y
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
CONFIG_BOOTCOMMAND="run ${bootdev}script; run ${bootdev}boot"
@@ -29,7 +30,6 @@
CONFIG_SPL_NOR_SUPPORT=y
CONFIG_SPL_TARGET="u-boot-with-spl.bin"
CONFIG_CMD_CONFIG=y
-CONFIG_SYS_BOOTM_LEN=0x2000000
# CONFIG_CMD_XIMG is not set
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10
CONFIG_CMD_GPIO=y
diff --git a/configs/uniphier_v8_defconfig b/configs/uniphier_v8_defconfig
index 674b781..25ad67c 100644
--- a/configs/uniphier_v8_defconfig
+++ b/configs/uniphier_v8_defconfig
@@ -11,6 +11,7 @@
CONFIG_MICRO_SUPPORT_CARD=y
CONFIG_SYS_LOAD_ADDR=0x85000000
CONFIG_TIMESTAMP=y
+CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_FDT_FIXUP_PARTITIONS=y
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
CONFIG_BOOTCOMMAND="run ${bootdev}script; run ${bootdev}boot"
@@ -18,7 +19,6 @@
CONFIG_PREBOOT="env exist ${bootdev}preboot && run ${bootdev}preboot"
CONFIG_LOGLEVEL=6
CONFIG_CMD_CONFIG=y
-CONFIG_SYS_BOOTM_LEN=0x2000000
# CONFIG_CMD_XIMG is not set
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10
CONFIG_CMD_GPIO=y
diff --git a/configs/usb_a9263_dataflash_defconfig b/configs/usb_a9263_dataflash_defconfig
index 0becbf6..b23e273 100644
--- a/configs/usb_a9263_dataflash_defconfig
+++ b/configs/usb_a9263_dataflash_defconfig
@@ -17,11 +17,11 @@
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock1 mtdparts=mtdparts=atmel_nand:16m(kernel)ro,120m(root1),-(root2) rw rootfstype=jffs2"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="nboot 21000000 0"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=281
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot> "
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=281
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_LOADB is not set
diff --git a/configs/variscite_dart6ul_defconfig b/configs/variscite_dart6ul_defconfig
index 1cf4a8f..0b96484 100644
--- a/configs/variscite_dart6ul_defconfig
+++ b/configs/variscite_dart6ul_defconfig
@@ -19,14 +19,12 @@
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=3
CONFIG_BOOTCOMMAND="run mmc_mmc_fit"
+CONFIG_SYS_PBSIZE=532
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_WATCHDOG=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=532
-CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
-# CONFIG_RANDOM_UUID is not set
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
@@ -66,4 +64,5 @@
CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
CONFIG_CI_UDC=y
CONFIG_USB_GADGET_DOWNLOAD=y
+# CONFIG_RANDOM_UUID is not set
CONFIG_LZO=y
diff --git a/configs/venice2_defconfig b/configs/venice2_defconfig
index f01bd7a..7959e73 100644
--- a/configs/venice2_defconfig
+++ b/configs/venice2_defconfig
@@ -15,6 +15,7 @@
CONFIG_TEGRA_GPU=y
CONFIG_SYS_LOAD_ADDR=0x81000000
CONFIG_OF_SYSTEM_SETUP=y
+CONFIG_SYS_PBSIZE=2086
CONFIG_CONSOLE_MUX=y
CONFIG_SYS_STDIO_DEREGISTER=y
CONFIG_SPL_FOOTPRINT_LIMIT=y
@@ -26,7 +27,6 @@
CONFIG_SPL_SYS_MALLOC_SIZE=0x10000
CONFIG_SYS_PROMPT="Tegra124 (Venice2) # "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=2086
# CONFIG_CMD_IMI is not set
CONFIG_CMD_DFU=y
CONFIG_CMD_GPIO=y
@@ -42,7 +42,6 @@
CONFIG_ENV_OVERWRITE=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_MMC_ENV_PART=2
-CONFIG_SPL_DM=y
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
CONFIG_DFU_SF=y
diff --git a/configs/ventana_defconfig b/configs/ventana_defconfig
index 6f40400..c6720c6 100644
--- a/configs/ventana_defconfig
+++ b/configs/ventana_defconfig
@@ -14,6 +14,7 @@
CONFIG_SYS_LOAD_ADDR=0x1000000
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_USE_PREBOOT=y
+CONFIG_SYS_PBSIZE=2085
CONFIG_SPL_FOOTPRINT_LIMIT=y
CONFIG_SPL_MAX_FOOTPRINT=0x8000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
@@ -23,7 +24,6 @@
CONFIG_SPL_SYS_MALLOC_SIZE=0x10000
CONFIG_SYS_PROMPT="Tegra20 (Ventana) # "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=2085
# CONFIG_CMD_IMI is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_MMC=y
@@ -38,7 +38,6 @@
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_MMC_ENV_PART=2
-CONFIG_SPL_DM=y
CONFIG_DM_PMIC=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
diff --git a/configs/verdin-am62_a53_defconfig b/configs/verdin-am62_a53_defconfig
index 7808601..956e3a1 100644
--- a/configs/verdin-am62_a53_defconfig
+++ b/configs/verdin-am62_a53_defconfig
@@ -17,6 +17,7 @@
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="k3-am625-verdin-wifi-dev"
CONFIG_SPL_TEXT_BASE=0x80080000
+CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
@@ -33,8 +34,8 @@
CONFIG_FIT_VERBOSE=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000
-CONFIG_SPL_LOAD_FIT_APPLY_OVERLAY=y
CONFIG_LEGACY_IMAGE_FORMAT=y
+CONFIG_SYS_BOOTM_LEN=0x40000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=1
CONFIG_OF_SYSTEM_SETUP=y
@@ -66,7 +67,6 @@
CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_SYS_PROMPT="Verdin AM62 # "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_BOOTM_LEN=0x40000000
CONFIG_CMD_ADTIMG=y
CONFIG_CMD_ASKENV=y
# CONFIG_CMD_EXPORTENV is not set
diff --git a/configs/verdin-imx8mm_defconfig b/configs/verdin-imx8mm_defconfig
index 7644471..0c88982 100644
--- a/configs/verdin-imx8mm_defconfig
+++ b/configs/verdin-imx8mm_defconfig
@@ -32,6 +32,8 @@
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="test -n ${fdtfile} || setenv fdtfile imx8mm-verdin-${variant}-${fdt_board}.dtb"
+CONFIG_SYS_CBSIZE=2048
+CONFIG_SYS_PBSIZE=2081
CONFIG_LOG=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
@@ -53,8 +55,6 @@
CONFIG_SPL_WATCHDOG=y
CONFIG_SYS_PROMPT="Verdin iMX8MM # "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_CBSIZE=2048
-CONFIG_SYS_PBSIZE=2081
# CONFIG_BOOTM_NETBSD is not set
CONFIG_CMD_ASKENV=y
# CONFIG_CMD_EXPORTENV is not set
diff --git a/configs/verdin-imx8mp_defconfig b/configs/verdin-imx8mp_defconfig
index eec1d96..22b8a33 100644
--- a/configs/verdin-imx8mp_defconfig
+++ b/configs/verdin-imx8mp_defconfig
@@ -38,6 +38,8 @@
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="test -n ${fdtfile} || setenv fdtfile imx8mp-verdin-${variant}-${fdt_board}.dtb"
+CONFIG_SYS_CBSIZE=2048
+CONFIG_SYS_PBSIZE=2081
CONFIG_LOG=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
@@ -63,8 +65,6 @@
CONFIG_SPL_WATCHDOG=y
CONFIG_SYS_PROMPT="Verdin iMX8MP # "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_CBSIZE=2048
-CONFIG_SYS_PBSIZE=2081
# CONFIG_BOOTM_NETBSD is not set
CONFIG_CMD_ASKENV=y
# CONFIG_CMD_EXPORTENV is not set
diff --git a/configs/vexpress_aemv8a_juno_defconfig b/configs/vexpress_aemv8a_juno_defconfig
index db5463c..568eb2b 100644
--- a/configs/vexpress_aemv8a_juno_defconfig
+++ b/configs/vexpress_aemv8a_juno_defconfig
@@ -14,12 +14,12 @@
CONFIG_BOOTDELAY=1
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyAMA0,115200n8 root=/dev/sda2 rw rootwait earlycon=pl011,0x7ff80000 debug user_debug=31 androidboot.hardware=juno loglevel=9"
+CONFIG_SYS_CBSIZE=512
+CONFIG_SYS_PBSIZE=541
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_PROMPT="VExpress64# "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_CBSIZE=512
-CONFIG_SYS_PBSIZE=541
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_ARMFLASH=y
CONFIG_CMD_PCI=y
diff --git a/configs/vexpress_aemv8a_semi_defconfig b/configs/vexpress_aemv8a_semi_defconfig
index 0e23b43..caf30b6 100644
--- a/configs/vexpress_aemv8a_semi_defconfig
+++ b/configs/vexpress_aemv8a_semi_defconfig
@@ -12,11 +12,11 @@
CONFIG_BOOTDELAY=1
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyAMA0 earlycon=pl011,0x1c090000 debug user_debug=31 loglevel=9"
+CONFIG_SYS_CBSIZE=512
+CONFIG_SYS_PBSIZE=541
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_SYS_PROMPT="VExpress64# "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_CBSIZE=512
-CONFIG_SYS_PBSIZE=541
CONFIG_CMD_ABOOTIMG=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_ARMFLASH=y
diff --git a/configs/vexpress_aemv8r_defconfig b/configs/vexpress_aemv8r_defconfig
index b5842b3..2e4f95c 100644
--- a/configs/vexpress_aemv8r_defconfig
+++ b/configs/vexpress_aemv8r_defconfig
@@ -9,9 +9,9 @@
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyAMA0 earlycon=pl011,0x9c090000 rootfstype=ext4 root=/dev/vda2 rw rootwait"
+CONFIG_SYS_CBSIZE=512
+CONFIG_SYS_PBSIZE=541
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_SYS_PROMPT="VExpress64# "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_CBSIZE=512
-CONFIG_SYS_PBSIZE=541
# CONFIG_MMC is not set
diff --git a/configs/vexpress_ca9x4_defconfig b/configs/vexpress_ca9x4_defconfig
index 195b8ad..2601e55 100644
--- a/configs/vexpress_ca9x4_defconfig
+++ b/configs/vexpress_ca9x4_defconfig
@@ -16,10 +16,10 @@
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTCOMMAND="run distro_bootcmd; run bootflash"
CONFIG_DEFAULT_FDT_FILE="vexpress-v2p-ca9.dtb"
-# CONFIG_DISPLAY_CPUINFO is not set
-# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_CBSIZE=512
CONFIG_SYS_PBSIZE=532
+# CONFIG_DISPLAY_CPUINFO is not set
+# CONFIG_DISPLAY_BOARDINFO is not set
# CONFIG_CMD_CONSOLE is not set
# CONFIG_CMD_BOOTD is not set
# CONFIG_CMD_XIMG is not set
diff --git a/configs/vf610twr_defconfig b/configs/vf610twr_defconfig
index 75cc68e..af889ec 100644
--- a/configs/vf610twr_defconfig
+++ b/configs/vf610twr_defconfig
@@ -20,13 +20,13 @@
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
CONFIG_LOGLEVEL=3
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
# CONFIG_CMDLINE_EDITING is not set
# CONFIG_AUTO_COMPLETE is not set
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_FUSE=y
diff --git a/configs/vf610twr_nand_defconfig b/configs/vf610twr_nand_defconfig
index b3ccf49..c50afc4 100644
--- a/configs/vf610twr_nand_defconfig
+++ b/configs/vf610twr_nand_defconfig
@@ -20,13 +20,13 @@
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
CONFIG_LOGLEVEL=3
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
# CONFIG_CMDLINE_EDITING is not set
# CONFIG_AUTO_COMPLETE is not set
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_FUSE=y
diff --git a/configs/vinco_defconfig b/configs/vinco_defconfig
index c3d4e9f..ea1d7c9 100644
--- a/configs/vinco_defconfig
+++ b/configs/vinco_defconfig
@@ -21,12 +21,12 @@
CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk rw root=/dev/mmcblk0p2 rootfstype=ext4 rootwait quiet lpj=1990656"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="mmc dev 0 0;mmc read ${loadaddr} ${k_offset} ${k_blksize};mmc read ${oftaddr} ${dtb_offset} ${dtb_blksize};bootz ${loadaddr} - ${oftaddr}"
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=282
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="vinco => "
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=282
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
CONFIG_CMD_GPT=y
diff --git a/configs/vining_2000_defconfig b/configs/vining_2000_defconfig
index e5d3495..c39597c 100644
--- a/configs/vining_2000_defconfig
+++ b/configs/vining_2000_defconfig
@@ -31,6 +31,7 @@
CONFIG_BOOTDELAY=0
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run distro_bootcmd"
+CONFIG_SYS_PBSIZE=532
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_SYS_MALLOC=y
@@ -40,7 +41,6 @@
CONFIG_SPL_WATCHDOG=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
diff --git a/configs/vocore2_defconfig b/configs/vocore2_defconfig
index 98429a6..0e07d04 100644
--- a/configs/vocore2_defconfig
+++ b/configs/vocore2_defconfig
@@ -28,6 +28,8 @@
CONFIG_FIT_SIGNATURE=y
CONFIG_LEGACY_IMAGE_FORMAT=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_SYS_CBSIZE=512
+CONFIG_SYS_PBSIZE=532
CONFIG_LOGLEVEL=8
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
@@ -39,8 +41,6 @@
CONFIG_SPL_NOR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_CBSIZE=512
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_LICENSE=y
# CONFIG_BOOTM_NETBSD is not set
# CONFIG_BOOTM_PLAN9 is not set
@@ -85,7 +85,6 @@
CONFIG_MMC=y
# CONFIG_MMC_HW_PARTITIONING is not set
CONFIG_MMC_MTK=y
-CONFIG_MTD=y
CONFIG_SPI_FLASH_SFDP_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_MACRONIX=y
diff --git a/configs/vyasa-rk3288_defconfig b/configs/vyasa-rk3288_defconfig
index 0ae901a..02f2d74 100644
--- a/configs/vyasa-rk3288_defconfig
+++ b/configs/vyasa-rk3288_defconfig
@@ -22,6 +22,7 @@
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEBUG_UART=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_USE_PREBOOT=y
CONFIG_DEFAULT_FDT_FILE="rk3288-vyasa.dtb"
CONFIG_SILENT_CONSOLE=y
@@ -37,7 +38,6 @@
CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR=0x8800
CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR=0x8000
CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS=0x10
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_SPL=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
@@ -70,7 +70,6 @@
CONFIG_LED_GPIO=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
-CONFIG_MTD=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_GMAC_ROCKCHIP=y
CONFIG_PINCTRL=y
diff --git a/configs/wandboard_defconfig b/configs/wandboard_defconfig
index c9ec962..e9deab3 100644
--- a/configs/wandboard_defconfig
+++ b/configs/wandboard_defconfig
@@ -28,6 +28,7 @@
CONFIG_SPL_LOAD_FIT=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd"
+CONFIG_SYS_PBSIZE=532
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
@@ -40,7 +41,6 @@
CONFIG_SPL_I2C=y
CONFIG_SPL_WATCHDOG=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
@@ -75,6 +75,8 @@
CONFIG_SCSI=y
CONFIG_DM_SERIAL=y
CONFIG_MXC_UART=y
+CONFIG_SYSRESET=y
+CONFIG_SYSRESET_WATCHDOG=y
CONFIG_DM_THERMAL=y
CONFIG_USB=y
CONFIG_VIDEO=y
@@ -88,3 +90,4 @@
CONFIG_SPLASH_SCREEN=y
CONFIG_SPLASH_SCREEN_ALIGN=y
CONFIG_BMP_16BPP=y
+CONFIG_IMX_WATCHDOG=y
diff --git a/configs/warp7_bl33_defconfig b/configs/warp7_bl33_defconfig
index bb699cf..51e5200 100644
--- a/configs/warp7_bl33_defconfig
+++ b/configs/warp7_bl33_defconfig
@@ -18,10 +18,10 @@
CONFIG_FIT_VERBOSE=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then run do_bootscript_hab;if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; fi; fi; fi"
+CONFIG_SYS_PBSIZE=532
# CONFIG_BOARD_EARLY_INIT_F is not set
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=532
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_DFU=y
diff --git a/configs/warp7_defconfig b/configs/warp7_defconfig
index 26d992d..9b518a1 100644
--- a/configs/warp7_defconfig
+++ b/configs/warp7_defconfig
@@ -20,10 +20,10 @@
CONFIG_FIT_VERBOSE=y
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then run do_bootscript_hab;if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; fi; fi; fi"
+CONFIG_SYS_PBSIZE=532
# CONFIG_BOARD_EARLY_INIT_F is not set
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=532
# CONFIG_CMD_BOOTD is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
diff --git a/configs/wetek-core2_defconfig b/configs/wetek-core2_defconfig
index 9bf3de9..01ffb8b 100644
--- a/configs/wetek-core2_defconfig
+++ b/configs/wetek-core2_defconfig
@@ -46,7 +46,7 @@
CONFIG_DM_MDIO=y
CONFIG_DM_MDIO_MUX=y
CONFIG_ETH_DESIGNWARE_MESON8B=y
-CONFIG_MDIO_MUX_MMIOREG=y
+CONFIG_MDIO_MUX_MESON_GXL=y
CONFIG_MESON_GXL_USB_PHY=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_MESON_GXL=y
diff --git a/configs/x240_defconfig b/configs/x240_defconfig
index 152413d..fc0c9a7 100644
--- a/configs/x240_defconfig
+++ b/configs/x240_defconfig
@@ -50,7 +50,6 @@
CONFIG_LED_GPIO=y
CONFIG_MISC=y
# CONFIG_MMC is not set
-CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_PXA3XX=y
CONFIG_SYS_NAND_ONFI_DETECTION=y
diff --git a/configs/x3_t30_defconfig b/configs/x3_t30_defconfig
index a151f58..094a7d0 100644
--- a/configs/x3_t30_defconfig
+++ b/configs/x3_t30_defconfig
@@ -22,6 +22,7 @@
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_BOOTCOMMAND="if run check_button; then bootmenu; fi; run bootcmd_mmc1; run bootcmd_mmc0; poweroff;"
+CONFIG_SYS_PBSIZE=2084
CONFIG_SPL_FOOTPRINT_LIMIT=y
CONFIG_SPL_MAX_FOOTPRINT=0x8000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
@@ -31,7 +32,7 @@
CONFIG_SPL_SYS_MALLOC_SIZE=0x10000
CONFIG_SYS_PROMPT="Tegra30 (x3) # "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=2084
+# CONFIG_CMD_BOOTEFI_BOOTMGR is not set
CONFIG_CMD_BOOTMENU=y
# CONFIG_CMD_IMI is not set
CONFIG_CMD_GPIO=y
@@ -45,13 +46,13 @@
CONFIG_CMD_UMS_ABORT_KEYED=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_PAUSE=y
+CONFIG_CMD_REGULATOR=y
CONFIG_CMD_EXT4_WRITE=y
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_ENV_OVERWRITE=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_MMC_ENV_PART=2
-CONFIG_SPL_DM=y
CONFIG_BUTTON=y
CONFIG_EXTCON=y
CONFIG_EXTCON_MAX14526=y
@@ -64,11 +65,14 @@
CONFIG_SYS_I2C_TEGRA=y
CONFIG_BUTTON_KEYBOARD=y
CONFIG_DM_PMIC=y
+CONFIG_DM_PMIC_MAX77663=y
CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_MAX77663=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_PWM_TEGRA=y
CONFIG_SYS_NS16550=y
CONFIG_TEGRA20_SLINK=y
+CONFIG_SYSRESET_MAX77663=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_TEGRA=y
@@ -83,4 +87,3 @@
CONFIG_BACKLIGHT_LM3533=y
CONFIG_VIDEO_BRIDGE_SOLOMON_SSD2825=y
CONFIG_VIDEO_TEGRA20=y
-# CONFIG_CMD_BOOTEFI_BOOTMGR is not set
diff --git a/configs/x530_defconfig b/configs/x530_defconfig
index 6e4f755..207748e 100644
--- a/configs/x530_defconfig
+++ b/configs/x530_defconfig
@@ -25,6 +25,8 @@
CONFIG_DEBUG_UART=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=276
CONFIG_SILENT_CONSOLE=y
CONFIG_SILENT_U_BOOT_ONLY=y
CONFIG_SILENT_CONSOLE_UPDATE_ON_RELOC=y
@@ -38,8 +40,6 @@
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_WATCHDOG=y
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=276
CONFIG_CMD_MEMINFO=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
@@ -71,7 +71,6 @@
CONFIG_I2C_MUX=y
CONFIG_I2C_MUX_PCA954x=y
# CONFIG_MMC is not set
-CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_USE_FLASH_BBT=y
CONFIG_NAND_PXA3XX=y
diff --git a/configs/x96_mate_defconfig b/configs/x96_mate_defconfig
index 318951e..42a3b8c 100644
--- a/configs/x96_mate_defconfig
+++ b/configs/x96_mate_defconfig
@@ -19,5 +19,6 @@
CONFIG_SYS_I2C_SLAVE=0x7f
CONFIG_SYS_I2C_SPEED=400000
CONFIG_SUPPORT_EMMC_BOOT=y
+CONFIG_AXP305_POWER=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
diff --git a/configs/xenguest_arm64_defconfig b/configs/xenguest_arm64_defconfig
index aab1e7f..4a1c401 100644
--- a/configs/xenguest_arm64_defconfig
+++ b/configs/xenguest_arm64_defconfig
@@ -8,14 +8,14 @@
CONFIG_DEFAULT_DEVICE_TREE="xenguest-arm64"
CONFIG_IDENT_STRING=" xenguest"
CONFIG_SYS_LOAD_ADDR=0x40000000
+CONFIG_SYS_BOOTM_LEN=0x800000
CONFIG_BOOTDELAY=10
CONFIG_OF_SYSTEM_SETUP=y
+CONFIG_SYS_PBSIZE=1051
CONFIG_SYS_PROMPT="xenguest# "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=1051
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_BOOTD is not set
-CONFIG_SYS_BOOTM_LEN=0x800000
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_GO is not set
# CONFIG_CMD_IMI is not set
diff --git a/configs/xenguest_arm64_virtio_defconfig b/configs/xenguest_arm64_virtio_defconfig
index d76b2c1..95e90b9 100644
--- a/configs/xenguest_arm64_virtio_defconfig
+++ b/configs/xenguest_arm64_virtio_defconfig
@@ -10,15 +10,15 @@
CONFIG_SYS_LOAD_ADDR=0x40000000
CONFIG_SYS_PCI_64BIT=y
CONFIG_PCI=y
+CONFIG_SYS_BOOTM_LEN=0x800000
CONFIG_BOOTDELAY=10
CONFIG_OF_SYSTEM_SETUP=y
+CONFIG_SYS_PBSIZE=1051
CONFIG_PCI_INIT_R=y
CONFIG_SYS_PROMPT="xenguest# "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=1051
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_BOOTD is not set
-CONFIG_SYS_BOOTM_LEN=0x800000
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_GO is not set
# CONFIG_CMD_IMI is not set
diff --git a/configs/xilinx_mbv32_defconfig b/configs/xilinx_mbv32_defconfig
new file mode 100644
index 0000000..2689495
--- /dev/null
+++ b/configs/xilinx_mbv32_defconfig
@@ -0,0 +1,30 @@
+CONFIG_RISCV=y
+CONFIG_TEXT_BASE=0x21200000
+CONFIG_SYS_MALLOC_LEN=0x800000
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20200000
+CONFIG_ENV_SIZE=0x20000
+CONFIG_DEFAULT_DEVICE_TREE="xilinx-mbv32"
+CONFIG_DEBUG_UART_BASE=0x40600000
+CONFIG_DEBUG_UART_CLOCK=1000000
+CONFIG_SYS_CLK_FREQ=100000000
+CONFIG_BOOT_SCRIPT_OFFSET=0x0
+CONFIG_SYS_LOAD_ADDR=0x80200000
+CONFIG_DEBUG_UART=y
+CONFIG_TARGET_XILINX_MBV=y
+CONFIG_FIT=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_DISPLAY_CPUINFO=y
+CONFIG_DISPLAY_BOARDINFO=y
+# CONFIG_BOARD_LATE_INIT is not set
+# CONFIG_CMD_MII is not set
+CONFIG_CMD_TIMER=y
+CONFIG_OF_EMBED=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_DM_MTD=y
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_DEBUG_UART_SKIP_INIT=y
+CONFIG_XILINX_UARTLITE=y
+CONFIG_XILINX_TIMER=y
+CONFIG_PANIC_HANG=y
diff --git a/configs/xilinx_mbv32_smode_defconfig b/configs/xilinx_mbv32_smode_defconfig
new file mode 100644
index 0000000..c724d1b
--- /dev/null
+++ b/configs/xilinx_mbv32_smode_defconfig
@@ -0,0 +1,32 @@
+CONFIG_RISCV=y
+CONFIG_TEXT_BASE=0x21200000
+CONFIG_SYS_MALLOC_LEN=0x800000
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20200000
+CONFIG_ENV_SIZE=0x20000
+CONFIG_DEFAULT_DEVICE_TREE="xilinx-mbv32"
+CONFIG_DEBUG_UART_BASE=0x40600000
+CONFIG_DEBUG_UART_CLOCK=1000000
+CONFIG_SYS_CLK_FREQ=100000000
+CONFIG_BOOT_SCRIPT_OFFSET=0x0
+CONFIG_SYS_LOAD_ADDR=0x80200000
+CONFIG_TARGET_XILINX_MBV=y
+CONFIG_RISCV_SMODE=y
+CONFIG_FIT=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_DISPLAY_CPUINFO=y
+CONFIG_DISPLAY_BOARDINFO=y
+# CONFIG_BOARD_LATE_INIT is not set
+# CONFIG_CMD_MII is not set
+CONFIG_CMD_TIMER=y
+CONFIG_OF_EMBED=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_DM_MTD=y
+CONFIG_DEBUG_UART_UARTLITE=y
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_DEBUG_UART_SKIP_INIT=y
+CONFIG_XILINX_UARTLITE=y
+# CONFIG_RISCV_TIMER is not set
+CONFIG_XILINX_TIMER=y
+CONFIG_PANIC_HANG=y
diff --git a/configs/xilinx_versal_mini_defconfig b/configs/xilinx_versal_mini_defconfig
index 222da5a..9059a46 100644
--- a/configs/xilinx_versal_mini_defconfig
+++ b/configs/xilinx_versal_mini_defconfig
@@ -20,6 +20,8 @@
CONFIG_REMAKE_ELF=y
# CONFIG_LEGACY_IMAGE_FORMAT is not set
# CONFIG_AUTOBOOT is not set
+CONFIG_SYS_CBSIZE=1024
+CONFIG_SYS_PBSIZE=1049
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_BOARD_EARLY_INIT_R=y
@@ -30,8 +32,6 @@
# CONFIG_SYS_LONGHELP is not set
CONFIG_SYS_PROMPT="Versal> "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_CBSIZE=1024
-CONFIG_SYS_PBSIZE=1049
# CONFIG_CMD_CONSOLE is not set
# CONFIG_CMD_BOOTD is not set
# CONFIG_CMD_BOOTM is not set
diff --git a/configs/xilinx_versal_mini_emmc0_defconfig b/configs/xilinx_versal_mini_emmc0_defconfig
index 1d73790..fbe06ad 100644
--- a/configs/xilinx_versal_mini_emmc0_defconfig
+++ b/configs/xilinx_versal_mini_emmc0_defconfig
@@ -16,6 +16,8 @@
# CONFIG_EXPERT is not set
CONFIG_REMAKE_ELF=y
# CONFIG_AUTOBOOT is not set
+CONFIG_SYS_CBSIZE=1024
+CONFIG_SYS_PBSIZE=1049
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_BOARD_EARLY_INIT_R=y
@@ -26,8 +28,6 @@
# CONFIG_SYS_LONGHELP is not set
CONFIG_SYS_PROMPT="Versal> "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_CBSIZE=1024
-CONFIG_SYS_PBSIZE=1049
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
# CONFIG_CMD_BOOTD is not set
diff --git a/configs/xilinx_versal_mini_emmc1_defconfig b/configs/xilinx_versal_mini_emmc1_defconfig
index 747f20d..8c046d9 100644
--- a/configs/xilinx_versal_mini_emmc1_defconfig
+++ b/configs/xilinx_versal_mini_emmc1_defconfig
@@ -16,6 +16,8 @@
# CONFIG_EXPERT is not set
CONFIG_REMAKE_ELF=y
# CONFIG_AUTOBOOT is not set
+CONFIG_SYS_CBSIZE=1024
+CONFIG_SYS_PBSIZE=1049
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_BOARD_EARLY_INIT_R=y
@@ -26,8 +28,6 @@
# CONFIG_SYS_LONGHELP is not set
CONFIG_SYS_PROMPT="Versal> "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_CBSIZE=1024
-CONFIG_SYS_PBSIZE=1049
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
# CONFIG_CMD_BOOTD is not set
diff --git a/configs/xilinx_versal_mini_ospi_defconfig b/configs/xilinx_versal_mini_ospi_defconfig
index 96be5b9..72a123d 100644
--- a/configs/xilinx_versal_mini_ospi_defconfig
+++ b/configs/xilinx_versal_mini_ospi_defconfig
@@ -53,6 +53,7 @@
# CONFIG_NET is not set
# CONFIG_DM_DEVICE_REMOVE is not set
# CONFIG_MMC is not set
+CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_SOFT_RESET=y
CONFIG_SPI_FLASH_SOFT_RESET_ON_BOOT=y
diff --git a/configs/xilinx_versal_mini_qspi_defconfig b/configs/xilinx_versal_mini_qspi_defconfig
index 7181b89..d9fbac9 100644
--- a/configs/xilinx_versal_mini_qspi_defconfig
+++ b/configs/xilinx_versal_mini_qspi_defconfig
@@ -58,6 +58,7 @@
# CONFIG_I2C is not set
# CONFIG_INPUT is not set
# CONFIG_MMC is not set
+CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
# CONFIG_SPI_FLASH_SMART_HWCAPS is not set
# CONFIG_SPI_FLASH_LOCK is not set
diff --git a/configs/xilinx_versal_net_mini_ospi_defconfig b/configs/xilinx_versal_net_mini_ospi_defconfig
index 1ba6e08..5f42243 100644
--- a/configs/xilinx_versal_net_mini_ospi_defconfig
+++ b/configs/xilinx_versal_net_mini_ospi_defconfig
@@ -52,6 +52,7 @@
# CONFIG_NET is not set
# CONFIG_DM_DEVICE_REMOVE is not set
# CONFIG_MMC is not set
+CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_SOFT_RESET=y
CONFIG_SPI_FLASH_SOFT_RESET_ON_BOOT=y
diff --git a/configs/xilinx_versal_net_mini_qspi_defconfig b/configs/xilinx_versal_net_mini_qspi_defconfig
index c9497bb..4fa83fa 100644
--- a/configs/xilinx_versal_net_mini_qspi_defconfig
+++ b/configs/xilinx_versal_net_mini_qspi_defconfig
@@ -57,6 +57,7 @@
# CONFIG_I2C is not set
# CONFIG_INPUT is not set
# CONFIG_MMC is not set
+CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
# CONFIG_SPI_FLASH_SMART_HWCAPS is not set
# CONFIG_SPI_FLASH_LOCK is not set
diff --git a/configs/xilinx_versal_net_virt_defconfig b/configs/xilinx_versal_net_virt_defconfig
index 0553ac6..371d14e 100644
--- a/configs/xilinx_versal_net_virt_defconfig
+++ b/configs/xilinx_versal_net_virt_defconfig
@@ -15,18 +15,18 @@
CONFIG_REMAKE_ELF=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
+CONFIG_SYS_BOOTM_LEN=0x6400000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=5
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
CONFIG_USE_PREBOOT=y
+CONFIG_SYS_PBSIZE=2073
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_CLOCKS=y
CONFIG_SYS_PROMPT="Versal NET> "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=2073
-CONFIG_SYS_BOOTM_LEN=0x6400000
CONFIG_CMD_BOOTMENU=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_NVEDIT_EFI=y
@@ -35,7 +35,6 @@
CONFIG_CMD_SHA1SUM=y
CONFIG_CMD_CLK=y
CONFIG_CMD_DFU=y
-CONFIG_CMD_DM=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
@@ -46,6 +45,9 @@
CONFIG_BOOTP_MAY_FAIL=y
CONFIG_BOOTP_BOOTFILESIZE=y
CONFIG_CMD_TFTPPUT=y
+CONFIG_CMD_NFS=y
+CONFIG_CMD_WGET=y
+CONFIG_CMD_DNS=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EFIDEBUG=y
CONFIG_CMD_TIME=y
@@ -69,6 +71,7 @@
CONFIG_IP_DEFRAG=y
CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y
CONFIG_TFTP_BLOCKSIZE=4096
+CONFIG_BLKMAP=y
CONFIG_CLK_VERSAL=y
CONFIG_DFU_RAM=y
CONFIG_ZYNQ_GPIO=y
diff --git a/configs/xilinx_versal_virt_defconfig b/configs/xilinx_versal_virt_defconfig
index 6a2c03c..5f76a30 100644
--- a/configs/xilinx_versal_virt_defconfig
+++ b/configs/xilinx_versal_virt_defconfig
@@ -19,16 +19,16 @@
CONFIG_REMAKE_ELF=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
+CONFIG_SYS_BOOTM_LEN=0x6400000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=5
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
CONFIG_USE_PREBOOT=y
+CONFIG_SYS_PBSIZE=2073
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_CLOCKS=y
CONFIG_SYS_PROMPT="Versal> "
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=2073
-CONFIG_SYS_BOOTM_LEN=0x6400000
CONFIG_CMD_BOOTMENU=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_NVEDIT_EFI=y
@@ -37,7 +37,6 @@
CONFIG_CMD_SHA1SUM=y
CONFIG_CMD_CLK=y
CONFIG_CMD_DFU=y
-CONFIG_CMD_DM=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
@@ -48,6 +47,9 @@
CONFIG_BOOTP_MAY_FAIL=y
CONFIG_BOOTP_BOOTFILESIZE=y
CONFIG_CMD_TFTPPUT=y
+CONFIG_CMD_NFS=y
+CONFIG_CMD_WGET=y
+CONFIG_CMD_DNS=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EFIDEBUG=y
CONFIG_CMD_TIME=y
@@ -72,6 +74,7 @@
CONFIG_IP_DEFRAG=y
CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y
CONFIG_TFTP_BLOCKSIZE=4096
+CONFIG_BLKMAP=y
CONFIG_CLK_VERSAL=y
CONFIG_DFU_TIMEOUT=y
CONFIG_DFU_RAM=y
diff --git a/configs/xilinx_zynq_virt_defconfig b/configs/xilinx_zynq_virt_defconfig
index c3ee9be..708cfe9 100644
--- a/configs/xilinx_zynq_virt_defconfig
+++ b/configs/xilinx_zynq_virt_defconfig
@@ -27,9 +27,11 @@
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x10000000
CONFIG_LEGACY_IMAGE_FORMAT=y
+CONFIG_SYS_BOOTM_LEN=0x3c00000
CONFIG_DISTRO_DEFAULTS=y
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
CONFIG_USE_PREBOOT=y
+CONFIG_SYS_PBSIZE=2071
CONFIG_CLOCKS=y
CONFIG_SPL_MAX_SIZE=0x30000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
@@ -47,9 +49,7 @@
CONFIG_SPL_SPI_LOAD=y
CONFIG_SYS_SPI_U_BOOT_OFFS=0x100000
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_PBSIZE=2071
# CONFIG_BOOTM_NETBSD is not set
-CONFIG_SYS_BOOTM_LEN=0x3c00000
CONFIG_CMD_IMLS=y
CONFIG_CMD_THOR_DOWNLOAD=y
CONFIG_THOR_RESET_OFF=y
@@ -70,6 +70,7 @@
CONFIG_CMD_USB=y
CONFIG_BOOTP_MAY_FAIL=y
CONFIG_CMD_TFTPPUT=y
+CONFIG_CMD_NFS=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EFIDEBUG=y
CONFIG_CMD_TIME=y
@@ -109,7 +110,6 @@
CONFIG_I2C_EEPROM=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y
-CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_SHOW_PROGRESS=10
CONFIG_CFI_FLASH=y
diff --git a/configs/xilinx_zynqmp_kria_defconfig b/configs/xilinx_zynqmp_kria_defconfig
new file mode 100644
index 0000000..0dc6c5b
--- /dev/null
+++ b/configs/xilinx_zynqmp_kria_defconfig
@@ -0,0 +1,226 @@
+CONFIG_ARM=y
+CONFIG_POSITION_INDEPENDENT=y
+CONFIG_ARCH_ZYNQMP=y
+CONFIG_TEXT_BASE=0x8000000
+CONFIG_SYS_MALLOC_LEN=0x4040000
+CONFIG_SYS_MALLOC_F_LEN=0x8000
+CONFIG_ENV_SOURCE_FILE="zynqmp_kria"
+CONFIG_SF_DEFAULT_SPEED=30000000
+CONFIG_ENV_SIZE=0x20000
+CONFIG_ENV_OFFSET=0x2200000
+CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_DM_GPIO=y
+CONFIG_DEFAULT_DEVICE_TREE="zynqmp-smk-k26-revA"
+CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_DM_RESET=y
+CONFIG_SPL_STACK_R_ADDR=0x18000000
+CONFIG_SPL_STACK=0xfffffffc
+CONFIG_SPL_SIZE_LIMIT=0x2a000
+CONFIG_SPL=y
+CONFIG_ENV_OFFSET_REDUND=0x2220000
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI=y
+CONFIG_CMD_FRU=y
+CONFIG_SYS_LOAD_ADDR=0x8000000
+CONFIG_ENV_ADDR=0x2200000
+CONFIG_AHCI=y
+CONFIG_SYS_MEMTEST_START=0x00000000
+CONFIG_SYS_MEMTEST_END=0x00001000
+CONFIG_REMAKE_ELF=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_LOAD_FIT_ADDRESS=0x10000000
+CONFIG_SYS_BOOTM_LEN=0x6400000
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_OF_BOARD_SETUP=y
+# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
+CONFIG_USE_PREBOOT=y
+CONFIG_SYS_PBSIZE=2073
+CONFIG_BOARD_EARLY_INIT_R=y
+CONFIG_CLOCKS=y
+CONFIG_SPL_MAX_SIZE=0x40000
+CONFIG_SPL_BSS_MAX_SIZE=0x80000
+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_FS_LOAD_KERNEL_NAME=""
+CONFIG_SPL_FS_LOAD_ARGS_NAME=""
+CONFIG_SPL_FPGA=y
+CONFIG_SPL_OS_BOOT=y
+CONFIG_SPL_PAYLOAD_ARGS_ADDR=0x8000000
+CONFIG_SPL_RAM_SUPPORT=y
+CONFIG_SPL_RAM_DEVICE=y
+CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000
+CONFIG_SPL_ATF=y
+CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
+CONFIG_SYS_MAXARGS=64
+CONFIG_CMD_BOOTMENU=y
+CONFIG_CMD_GREPENV=y
+CONFIG_CMD_NVEDIT_EFI=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_ALT_MEMTEST=y
+CONFIG_CMD_SHA1SUM=y
+CONFIG_CMD_CLK=y
+CONFIG_CMD_DFU=y
+CONFIG_CMD_FPGA_LOADBP=y
+CONFIG_CMD_FPGA_LOADP=y
+CONFIG_CMD_FPGA_LOAD_SECURE=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_PWM=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_MTD=y
+CONFIG_CMD_POWEROFF=y
+CONFIG_CMD_SDRAM=y
+CONFIG_CMD_SF_TEST=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+CONFIG_BOOTP_MAY_FAIL=y
+CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_TFTPPUT=y
+CONFIG_CMD_BMP=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_EFIDEBUG=y
+CONFIG_CMD_RTC=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_GETTIME=y
+CONFIG_CMD_RNG=y
+CONFIG_CMD_KASLRSEED=y
+CONFIG_CMD_TIMER=y
+CONFIG_CMD_REGULATOR=y
+CONFIG_CMD_SMC=y
+CONFIG_CMD_TPM=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_SQUASHFS=y
+CONFIG_CMD_MTDPARTS=y
+CONFIG_CMD_MTDPARTS_SPREAD=y
+CONFIG_CMD_MTDPARTS_SHOW_NET_SIZES=y
+CONFIG_CMD_UBI=y
+CONFIG_PARTITION_TYPE_GUID=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_BOARD=y
+CONFIG_OF_LIST=""
+CONFIG_DTB_RESELECT=y
+CONFIG_MULTI_DTB_FIT=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent interrupts iommus power-domains"
+CONFIG_ENV_IS_NOWHERE=y
+CONFIG_ENV_IS_IN_FAT=y
+CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
+CONFIG_ENV_FAT_DEVICE_AND_PART=":auto"
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_NETCONSOLE=y
+CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_SATA=y
+CONFIG_SCSI_AHCI=y
+CONFIG_SATA_CEVA=y
+CONFIG_BUTTON=y
+CONFIG_BUTTON_GPIO=y
+CONFIG_CLK_ZYNQMP=y
+CONFIG_DFU_TFTP=y
+CONFIG_DFU_TIMEOUT=y
+CONFIG_DFU_MMC=y
+CONFIG_DFU_MTD=y
+CONFIG_DFU_RAM=y
+CONFIG_DFU_SF=y
+CONFIG_SYS_DFU_DATA_BUF_SIZE=0x1800000
+CONFIG_DMA=y
+CONFIG_XILINX_DPDMA=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
+CONFIG_FPGA_XILINX=y
+CONFIG_FPGA_ZYNQMPPL=y
+CONFIG_GPIO_HOG=y
+CONFIG_XILINX_GPIO=y
+CONFIG_DM_PCA953X=y
+CONFIG_SLG7XL45106_I2C_GPO=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_CADENCE=y
+CONFIG_I2C_MUX=y
+CONFIG_I2C_MUX_PCA954x=y
+CONFIG_LED=y
+CONFIG_LED_GPIO=y
+CONFIG_MISC=y
+CONFIG_I2C_EEPROM=y
+CONFIG_SUPPORT_EMMC_BOOT=y
+CONFIG_MMC_IO_VOLTAGE=y
+CONFIG_MMC_UHS_SUPPORT=y
+CONFIG_MMC_HS200_SUPPORT=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_ZYNQ=y
+CONFIG_DM_MTD=y
+CONFIG_SPI_FLASH_BAR=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
+CONFIG_SPI_FLASH_MTD=y
+CONFIG_PHY_ADIN=y
+CONFIG_PHY_TI_DP83867=y
+CONFIG_PHY_XILINX_GMII2RGMII=y
+CONFIG_PHY_FIXED=y
+CONFIG_DM_ETH_PHY=y
+CONFIG_PHY_GIGE=y
+CONFIG_XILINX_AXIEMAC=y
+CONFIG_ZYNQ_GEM=y
+CONFIG_PHY=y
+CONFIG_PHY_XILINX_ZYNQMP=y
+CONFIG_PINCTRL=y
+CONFIG_PINCONF=y
+CONFIG_POWER_DOMAIN=y
+CONFIG_ZYNQMP_POWER_DOMAIN=y
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_PWM=y
+CONFIG_PWM_CADENCE_TTC=y
+CONFIG_RESET_ZYNQMP=y
+CONFIG_DM_RTC=y
+CONFIG_RTC_EMULATION=y
+CONFIG_RTC_ZYNQMP=y
+CONFIG_SCSI=y
+CONFIG_ARM_DCC=y
+CONFIG_XILINX_UARTLITE=y
+CONFIG_ZYNQ_SERIAL=y
+CONFIG_SOC_XILINX_ZYNQMP=y
+CONFIG_SPI=y
+CONFIG_ZYNQ_SPI=y
+CONFIG_ZYNQMP_GQSPI=y
+CONFIG_SYSRESET=y
+CONFIG_SYSRESET_CMD_POWEROFF=y
+CONFIG_SYSRESET_PSCI=y
+CONFIG_TPM2_TIS_SPI=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
+CONFIG_USB_ULPI_VIEWPORT=y
+CONFIG_USB_ULPI=y
+CONFIG_USB_HOST_ETHER=y
+CONFIG_USB_ETHER_ASIX=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Xilinx"
+CONFIG_USB_GADGET_VENDOR_NUM=0x03FD
+CONFIG_USB_GADGET_PRODUCT_NUM=0x0300
+CONFIG_USB_ETHER=y
+CONFIG_USB_ETH_CDC=y
+CONFIG_VIDEO=y
+# CONFIG_VIDEO_LOGO is not set
+CONFIG_VIDEO_COPY=y
+CONFIG_I2C_EDID=y
+CONFIG_VIDEO_ZYNQMP_DPSUB=y
+CONFIG_VIRTIO_MMIO=y
+CONFIG_VIRTIO_NET=y
+CONFIG_VIRTIO_BLK=y
+CONFIG_PANIC_HANG=y
+CONFIG_TPM=y
+CONFIG_SPL_GZIP=y
+CONFIG_EFI_SET_TIME=y
+CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y
+CONFIG_EFI_CAPSULE_ON_DISK=y
+CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y
diff --git a/configs/xilinx_zynqmp_mini_defconfig b/configs/xilinx_zynqmp_mini_defconfig
index 694fa11..aa5f227 100644
--- a/configs/xilinx_zynqmp_mini_defconfig
+++ b/configs/xilinx_zynqmp_mini_defconfig
@@ -15,6 +15,8 @@
CONFIG_REMAKE_ELF=y
# CONFIG_LEGACY_IMAGE_FORMAT is not set
# CONFIG_AUTOBOOT is not set
+CONFIG_SYS_CBSIZE=1024
+CONFIG_SYS_PBSIZE=1049
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_BOARD_LATE_INIT is not set
CONFIG_CLOCKS=y
@@ -22,8 +24,6 @@
# CONFIG_AUTO_COMPLETE is not set
# CONFIG_SYS_LONGHELP is not set
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_CBSIZE=1024
-CONFIG_SYS_PBSIZE=1049
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
# CONFIG_CMD_BOOTD is not set
diff --git a/configs/xilinx_zynqmp_mini_emmc0_defconfig b/configs/xilinx_zynqmp_mini_emmc0_defconfig
index f81b772..07c1842 100644
--- a/configs/xilinx_zynqmp_mini_emmc0_defconfig
+++ b/configs/xilinx_zynqmp_mini_emmc0_defconfig
@@ -19,6 +19,8 @@
CONFIG_FIT=y
CONFIG_SUPPORT_RAW_INITRD=y
# CONFIG_AUTOBOOT is not set
+CONFIG_SYS_CBSIZE=1024
+CONFIG_SYS_PBSIZE=1049
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_BOARD_LATE_INIT is not set
@@ -33,8 +35,6 @@
# CONFIG_CMDLINE_EDITING is not set
# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_CBSIZE=1024
-CONFIG_SYS_PBSIZE=1049
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
# CONFIG_CMD_BOOTD is not set
diff --git a/configs/xilinx_zynqmp_mini_emmc1_defconfig b/configs/xilinx_zynqmp_mini_emmc1_defconfig
index 6501ec3..0a2a167 100644
--- a/configs/xilinx_zynqmp_mini_emmc1_defconfig
+++ b/configs/xilinx_zynqmp_mini_emmc1_defconfig
@@ -19,6 +19,8 @@
CONFIG_FIT=y
CONFIG_SUPPORT_RAW_INITRD=y
# CONFIG_AUTOBOOT is not set
+CONFIG_SYS_CBSIZE=1024
+CONFIG_SYS_PBSIZE=1049
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_BOARD_LATE_INIT is not set
@@ -33,8 +35,6 @@
# CONFIG_CMDLINE_EDITING is not set
# CONFIG_AUTO_COMPLETE is not set
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_CBSIZE=1024
-CONFIG_SYS_PBSIZE=1049
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
# CONFIG_CMD_BOOTD is not set
diff --git a/configs/xilinx_zynqmp_mini_nand_defconfig b/configs/xilinx_zynqmp_mini_nand_defconfig
index bfe93dc..670add9 100644
--- a/configs/xilinx_zynqmp_mini_nand_defconfig
+++ b/configs/xilinx_zynqmp_mini_nand_defconfig
@@ -15,6 +15,8 @@
CONFIG_FIT=y
CONFIG_SUPPORT_RAW_INITRD=y
# CONFIG_AUTOBOOT is not set
+CONFIG_SYS_CBSIZE=1024
+CONFIG_SYS_PBSIZE=1049
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_BOARD_LATE_INIT is not set
@@ -23,8 +25,6 @@
# CONFIG_AUTO_COMPLETE is not set
# CONFIG_SYS_LONGHELP is not set
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_CBSIZE=1024
-CONFIG_SYS_PBSIZE=1049
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
# CONFIG_CMD_BOOTD is not set
@@ -54,7 +54,6 @@
# CONFIG_DM_DEVICE_REMOVE is not set
# CONFIG_DM_MAILBOX is not set
# CONFIG_MMC is not set
-CONFIG_MTD=y
CONFIG_DM_MTD=y
CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_ARASAN=y
diff --git a/configs/xilinx_zynqmp_mini_nand_single_defconfig b/configs/xilinx_zynqmp_mini_nand_single_defconfig
index 91f5aa2..7763050 100644
--- a/configs/xilinx_zynqmp_mini_nand_single_defconfig
+++ b/configs/xilinx_zynqmp_mini_nand_single_defconfig
@@ -15,6 +15,8 @@
CONFIG_FIT=y
CONFIG_SUPPORT_RAW_INITRD=y
# CONFIG_AUTOBOOT is not set
+CONFIG_SYS_CBSIZE=1024
+CONFIG_SYS_PBSIZE=1049
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_BOARD_LATE_INIT is not set
@@ -23,8 +25,6 @@
# CONFIG_AUTO_COMPLETE is not set
# CONFIG_SYS_LONGHELP is not set
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_CBSIZE=1024
-CONFIG_SYS_PBSIZE=1049
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
# CONFIG_CMD_BOOTD is not set
@@ -54,7 +54,6 @@
# CONFIG_DM_DEVICE_REMOVE is not set
# CONFIG_DM_MAILBOX is not set
# CONFIG_MMC is not set
-CONFIG_MTD=y
CONFIG_DM_MTD=y
CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_ARASAN=y
diff --git a/configs/xilinx_zynqmp_mini_qspi_defconfig b/configs/xilinx_zynqmp_mini_qspi_defconfig
index afbf6f6..45b54b4 100644
--- a/configs/xilinx_zynqmp_mini_qspi_defconfig
+++ b/configs/xilinx_zynqmp_mini_qspi_defconfig
@@ -22,6 +22,8 @@
# CONFIG_LEGACY_IMAGE_FORMAT is not set
# CONFIG_AUTOBOOT is not set
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
+CONFIG_SYS_CBSIZE=1024
+CONFIG_SYS_PBSIZE=1049
CONFIG_LOGLEVEL=0
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_BOARD_LATE_INIT is not set
@@ -37,8 +39,6 @@
# CONFIG_AUTO_COMPLETE is not set
# CONFIG_SYS_LONGHELP is not set
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_CBSIZE=1024
-CONFIG_SYS_PBSIZE=1049
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
# CONFIG_CMD_BOOTD is not set
diff --git a/configs/xilinx_zynqmp_r5_defconfig b/configs/xilinx_zynqmp_r5_defconfig
index 006c536..bbffc11 100644
--- a/configs/xilinx_zynqmp_r5_defconfig
+++ b/configs/xilinx_zynqmp_r5_defconfig
@@ -12,13 +12,13 @@
CONFIG_CPU_FREQ_HZ=500000000
CONFIG_SYS_LOAD_ADDR=0x0
CONFIG_DEBUG_UART=y
+CONFIG_SYS_BOOTM_LEN=0x3c00000
CONFIG_BOOTSTAGE=y
+CONFIG_SYS_CBSIZE=256
+CONFIG_SYS_PBSIZE=284
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_SYS_PROMPT="ZynqMP r5> "
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_CBSIZE=256
-CONFIG_SYS_PBSIZE=284
-CONFIG_SYS_BOOTM_LEN=0x3c00000
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_BOOTSTAGE=y
CONFIG_OF_EMBED=y
diff --git a/configs/xilinx_zynqmp_virt_defconfig b/configs/xilinx_zynqmp_virt_defconfig
index 239bb1f..2742e38 100644
--- a/configs/xilinx_zynqmp_virt_defconfig
+++ b/configs/xilinx_zynqmp_virt_defconfig
@@ -25,10 +25,12 @@
CONFIG_FIT_VERBOSE=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x10000000
+CONFIG_SYS_BOOTM_LEN=0x6400000
CONFIG_DISTRO_DEFAULTS=y
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="run scsi_init;usb start"
+CONFIG_SYS_PBSIZE=2073
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_CLOCKS=y
CONFIG_SPL_MAX_SIZE=0x40000
@@ -51,8 +53,6 @@
CONFIG_SPL_ATF=y
CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_PBSIZE=2073
-CONFIG_SYS_BOOTM_LEN=0x6400000
CONFIG_CMD_BOOTMENU=y
CONFIG_CMD_THOR_DOWNLOAD=y
CONFIG_THOR_RESET_OFF=y
@@ -82,6 +82,9 @@
CONFIG_BOOTP_MAY_FAIL=y
CONFIG_BOOTP_BOOTFILESIZE=y
CONFIG_CMD_TFTPPUT=y
+CONFIG_CMD_NFS=y
+CONFIG_CMD_WGET=y
+CONFIG_CMD_DNS=y
CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EFIDEBUG=y
@@ -119,6 +122,8 @@
CONFIG_SATA=y
CONFIG_SCSI_AHCI=y
CONFIG_SATA_CEVA=y
+# CONFIG_SPL_BLK is not set
+CONFIG_BLKMAP=y
CONFIG_BUTTON=y
CONFIG_BUTTON_GPIO=y
CONFIG_CLK_ZYNQMP=y
@@ -154,7 +159,6 @@
CONFIG_MMC_HS200_SUPPORT=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y
-CONFIG_MTD=y
CONFIG_DM_MTD=y
CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_ARASAN=y
@@ -194,7 +198,6 @@
CONFIG_RTC_EMULATION=y
CONFIG_RTC_ZYNQMP=y
CONFIG_SCSI=y
-CONFIG_DM_SCSI=y
CONFIG_ARM_DCC=y
CONFIG_XILINX_UARTLITE=y
CONFIG_ZYNQ_SERIAL=y
diff --git a/configs/xtfpga_defconfig b/configs/xtfpga_defconfig
index fc5b666..b96dc10 100644
--- a/configs/xtfpga_defconfig
+++ b/configs/xtfpga_defconfig
@@ -15,11 +15,11 @@
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press <SPACE> to stop\n"
CONFIG_AUTOBOOT_STOP_STR=" "
+CONFIG_SYS_PBSIZE=1049
CONFIG_MISC_INIT_R=y
CONFIG_SYS_MALLOC_BOOTPARAMS=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot> "
-CONFIG_SYS_PBSIZE=1049
CONFIG_CMD_IMLS=y
CONFIG_CMD_ASKENV=y
CONFIG_CRC32_VERIFY=y
@@ -35,6 +35,7 @@
# CONFIG_DM_DEVICE_REMOVE is not set
# CONFIG_DM_STDIO is not set
# CONFIG_DM_SEQ_ALIAS is not set
+CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y
diff --git a/configs/zynq_cse_nand_defconfig b/configs/zynq_cse_nand_defconfig
index f7b7581..b6b12e3 100644
--- a/configs/zynq_cse_nand_defconfig
+++ b/configs/zynq_cse_nand_defconfig
@@ -21,6 +21,8 @@
CONFIG_SYS_LDSCRIPT="arch/arm/mach-zynq/u-boot.lds"
# CONFIG_AUTOBOOT is not set
CONFIG_USE_PREBOOT=y
+CONFIG_SYS_CBSIZE=1024
+CONFIG_SYS_PBSIZE=1047
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_BOARD_LATE_INIT is not set
CONFIG_CLOCKS=y
@@ -38,8 +40,6 @@
# CONFIG_AUTO_COMPLETE is not set
# CONFIG_SYS_LONGHELP is not set
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_CBSIZE=1024
-CONFIG_SYS_PBSIZE=1047
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
# CONFIG_CMD_BOOTD is not set
@@ -74,7 +74,6 @@
# CONFIG_DM_DEVICE_REMOVE is not set
CONFIG_SPL_DM_SEQ_ALIAS=y
# CONFIG_MMC is not set
-CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_ZYNQ=y
CONFIG_SYS_NAND_ONFI_DETECTION=y
diff --git a/configs/zynq_cse_nor_defconfig b/configs/zynq_cse_nor_defconfig
index 2a50f38..d95f760 100644
--- a/configs/zynq_cse_nor_defconfig
+++ b/configs/zynq_cse_nor_defconfig
@@ -21,6 +21,8 @@
CONFIG_SYS_LDSCRIPT="arch/arm/mach-zynq/u-boot.lds"
# CONFIG_AUTOBOOT is not set
CONFIG_USE_PREBOOT=y
+CONFIG_SYS_CBSIZE=1024
+CONFIG_SYS_PBSIZE=1047
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_BOARD_LATE_INIT is not set
CONFIG_CLOCKS=y
@@ -38,8 +40,6 @@
# CONFIG_AUTO_COMPLETE is not set
# CONFIG_SYS_LONGHELP is not set
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_CBSIZE=1024
-CONFIG_SYS_PBSIZE=1047
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
# CONFIG_CMD_BOOTD is not set
@@ -73,7 +73,6 @@
# CONFIG_DM_DEVICE_REMOVE is not set
CONFIG_SPL_DM_SEQ_ALIAS=y
# CONFIG_MMC is not set
-CONFIG_MTD=y
CONFIG_DM_MTD=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_SHOW_PROGRESS=10
diff --git a/configs/zynq_cse_qspi_defconfig b/configs/zynq_cse_qspi_defconfig
index db1fc53..dd7f978 100644
--- a/configs/zynq_cse_qspi_defconfig
+++ b/configs/zynq_cse_qspi_defconfig
@@ -28,6 +28,8 @@
# CONFIG_AUTOBOOT is not set
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
CONFIG_USE_PREBOOT=y
+CONFIG_SYS_CBSIZE=1024
+CONFIG_SYS_PBSIZE=1047
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_BOARD_LATE_INIT is not set
CONFIG_CLOCKS=y
@@ -47,8 +49,6 @@
# CONFIG_AUTO_COMPLETE is not set
# CONFIG_SYS_LONGHELP is not set
CONFIG_SYS_MAXARGS=32
-CONFIG_SYS_CBSIZE=1024
-CONFIG_SYS_PBSIZE=1047
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
# CONFIG_CMD_BOOTD is not set
diff --git a/disk/part_amiga.h b/disk/part_amiga.h
index 42f5eb0..dfa70bd 100644
--- a/disk/part_amiga.h
+++ b/disk/part_amiga.h
@@ -7,7 +7,6 @@
#ifndef _DISK_PART_AMIGA_H
#define _DISK_PART_AMIGA_H
-#include <common.h>
#if CONFIG_IS_ENABLED(ISO_PARTITION)
/* Make the buffers bigger if ISO partition support is enabled -- CD-ROMS
diff --git a/doc/README.sha1 b/doc/README.sha1
deleted file mode 100644
index f178f37..0000000
--- a/doc/README.sha1
+++ /dev/null
@@ -1,58 +0,0 @@
-SHA1 usage:
------------
-
-In the U-Boot Image for the pcs440ep board is a SHA1 checksum integrated.
-This SHA1 sum is used, to check, if the U-Boot Image in Flash is not
-corrupted.
-
-The following command is available:
-
-=> help sha1
-sha1 address len [addr] calculate the SHA1 sum [save at addr]
- -p calculate the SHA1 sum from the U-Boot image in flash and print
- -c check the U-Boot image in flash
-
-"sha1 -p"
- calculates and prints the SHA1 sum, from the Image stored in Flash
-
-"sha1 -c"
- check, if the SHA1 sum from the Image stored in Flash is correct
-
-
-It is possible to calculate a SHA1 checksum from a memoryrange with:
-
-"sha1 address len"
-
-If you want to store a new Image in Flash for the pcs440ep board,
-which has no SHA1 sum, you can do the following:
-
-a) cp the new Image on a position in RAM (here 0x300000)
- (for this example we use the Image from Flash, stored at 0xfffa0000 and
- 0x60000 Bytes long)
-
-"cp.b fffa0000 300000 60000"
-
-b) Initialize the SHA1 sum in the Image with 0x00
- The SHA1 sum is stored in Flash at:
- CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN + SHA1_SUM_POS
- for the pcs440ep Flash: 0xfffa0000 + 0x60000 + -0x20
- = 0xffffffe0
- for the example in RAM: 0x300000 + 0x60000 + -0x20
- = 0x35ffe0
-
- note: a SHA1 checksum is 20 bytes long.
-
-"mw.b 35ffe0 0 14"
-
-c) now calculate the SHA1 sum from the memoryrange and write
- the calculated checksum at the right place:
-
-"sha1 300000 60000 35ffe0"
-
-Now you have a U-Boot-Image for the pcs440ep board with the correct SHA1 sum.
-
-If you do a "buildman -k pcs440ep" or a "make all" to get the U-Boot image,
-which will be found in ../current/ipam390/ - the correct SHA1 sum will be
-automagically included in the U-Boot image.
-
-Heiko Schocher, 11 Jul 2007
diff --git a/doc/android/fastboot-protocol.rst b/doc/android/fastboot-protocol.rst
index e8cbd7f..8bd6d71 100644
--- a/doc/android/fastboot-protocol.rst
+++ b/doc/android/fastboot-protocol.rst
@@ -173,6 +173,9 @@
bootloader requiring a signature before
it will install or boot images.
+ all Provides all info from commands above as
+ they were called one by one
+
Names starting with a lowercase character are reserved by this
specification. OEM-specific names should not start with lowercase
characters.
diff --git a/doc/android/fastboot.rst b/doc/android/fastboot.rst
index 1ad8a89..05d8f77 100644
--- a/doc/android/fastboot.rst
+++ b/doc/android/fastboot.rst
@@ -29,6 +29,7 @@
with <arg> = boot_ack boot_partition
- ``oem bootbus`` - this executes ``mmc bootbus %x %s`` to configure eMMC
- ``oem run`` - this executes an arbitrary U-Boot command
+- ``oem console`` - this dumps U-Boot console record buffer
Support for both eMMC and NAND devices is included.
diff --git a/doc/arch/sandbox/sandbox.rst b/doc/arch/sandbox/sandbox.rst
index 23902de..5f8db12 100644
--- a/doc/arch/sandbox/sandbox.rst
+++ b/doc/arch/sandbox/sandbox.rst
@@ -424,15 +424,59 @@
VPL (Verifying Program Loader)
------------------------------
-Sandbox provides an example build of vpl called `sandbox_vpl`. This can be run
-using::
+Sandbox provides an example build of vpl called `sandbox_vpl`. To build it:
- /path/to/sandbox_vpl/tpl/u-boot-tpl -D
+.. code-block:: bash
+
+ make sandbox_vpl_defconfig all
+
+This can be run using:
+
+.. code-block:: bash
+
+ ./tpl/u-boot-tpl -d u-boot.dtb
It starts up TPL (first-stage init), then VPL, then runs SPL and finally U-Boot
proper, following the normal flow for a verified boot. At present, no
verification is actually implemented.
+Here is an example trace::
+
+ U-Boot TPL 2024.01-rc2-00129 (Nov 19 2023 - 08:10:12 -0700)
+ Trying to boot from sandbox_image
+ Trying to boot from sandbox_file
+
+ U-Boot VPL 2024.01-rc2-00129 (Nov 19 2023 - 08:10:12 -0700)
+ Trying to boot from vbe_simple
+ Trying to boot from sandbox_image
+ Trying to boot from sandbox_file
+
+ U-Boot SPL 2024.01-rc2-00129 (Nov 19 2023 - 08:10:12 -0700)
+ Trying to boot from vbe_simple
+ Trying to boot from sandbox_image
+ Trying to boot from sandbox_file
+
+
+ U-Boot 2024.01-rc2-00129 (Nov 19 2023 - 08:10:12 -0700)
+
+ Reset Status: COLD
+ Model: sandbox
+ DRAM: 256 MiB
+ using memory 0x1b576000-0x1f578000 for malloc()
+
+ Warning: host_lo MAC addresses don't match:
+ Address in ROM is 96:cd:ef:82:78:51
+ Address in environment is 02:00:11:22:33:44
+ Core: 103 devices, 51 uclasses, devicetree: board
+ MMC:
+ Loading Environment from nowhere... OK
+ In: serial,cros-ec-keyb,usbkbd
+ Out: serial,vidconsole
+ Err: serial,vidconsole
+ Model: sandbox
+ Net: eth0: host_lo, eth1: host_enp14s0, eth2: host_eth6, eth3: host_wlp15s0, eth4: host_virbr0, eth5: host_docker0, eth6: eth@10002000
+ Hit any key to stop autoboot: 1
+
Debugging the init sequence
---------------------------
diff --git a/doc/board/allwinner/sunxi.rst b/doc/board/allwinner/sunxi.rst
index 797222d..d0c89b9 100644
--- a/doc/board/allwinner/sunxi.rst
+++ b/doc/board/allwinner/sunxi.rst
@@ -251,8 +251,7 @@
# apt-get install mtd-utils
# mtdinfo
- # mtd_debug erase /dev/mtdX 0 0xf0000
- # mtd_debug write /dev/mtdX 0 0xf0000 u-boot-sunxi-with-spl.bin
+ # flashcp -v u-boot-sunxi-with-spl.bin /dev/mtdX
``/dev/mtdX`` needs to be replaced with the respective device name, as listed
in the output of ``mtdinfo``.
diff --git a/doc/board/anbernic/rgxx3.rst b/doc/board/anbernic/rgxx3.rst
index 7d1beb4..d159ed2 100644
--- a/doc/board/anbernic/rgxx3.rst
+++ b/doc/board/anbernic/rgxx3.rst
@@ -5,6 +5,8 @@
This allows U-Boot to boot the following Anbernic devices:
+ - Anbernic RG-ARC-D
+ - Anbernic RG-ARC-S
- Anbernic RG353M
- Anbernic RG353P
- Anbernic RG353PS
@@ -12,18 +14,24 @@
- Anbernic RG353VS
- Anbernic RG503
+Additionally, the following very similar non-Anbernic devices are also
+supported:
+
+ - Powkiddy RGB30
+ - Powkiddy RK2023
+
The correct device is detected automatically by comparing ADC values
from ADC channel 1. In the event of an RG353V or RG353P, an attempt
is then made to probe for an eMMC and if it fails the device is assumed
to be an RG353VS or RG353PS. Based on the detected device, the
environment variables "board", "board_name", and "fdtfile" are set to
the correct values corresponding to the board which can be read by a
-boot script to boot with the correct device tree. If the board detected
-is not of type RG503 (which currently has only 1 panel revision) a
-panel detect is then performed by probing a "dummy" display on the DSI
-bus and then querying the display ID. The display ID is then compared
-to a table to get the known compatible string for use in Linux, and
-this string is saved as an environment variable of "panel".
+boot script to boot with the correct device tree. If a board is defined
+as requiring panel detection, a panel detect is then performed by
+probing a "dummy" display on the DSI bus and then querying the display
+ID. The display ID is then compared to a table to get the known
+compatible string for use in Linux, and this string is saved as an
+environment variable of "panel".
FDT fixups are performed in the event of an RG353M to change the device
name, or in the event the panel detected does not match the devicetree.
diff --git a/doc/board/asus/grouper_common.rst b/doc/board/asus/grouper_common.rst
index 2e4450b..47a854e 100644
--- a/doc/board/asus/grouper_common.rst
+++ b/doc/board/asus/grouper_common.rst
@@ -3,26 +3,25 @@
U-Boot for the ASUS/Google Nexus 7 (2012)
=========================================
-``DISCLAMER!`` Moving your ASUS/Google Nexus 7 (2012) to use
-U-Boot assumes replacement of the vendor ASUS bootloader. Vendor
-android firmwares will no longer be able to run on the device.
-This replacement IS reversible.
+``DISCLAMER!`` Moving your ASUS/Google Nexus 7 (2012) to use U-Boot assumes
+replacement of the vendor ASUS bootloader. Vendor android firmwares will no
+longer be able to run on the device. This replacement IS reversible.
Quick Start
-----------
- Build U-Boot
-- Pack U-Boot into repart-block
-- Flash repart-block into the eMMC
+- Process U-Boot
+- Flashing U-Boot into the eMMC
- Boot
- Self Upgrading
Build U-Boot
------------
-Device support is implemented by applying config fragment to a generic
-board defconfig. Valid fragments are ``grouper_E1565.config``,
-``grouper_PM269.config`` and ``tilapia.config``.
+Device support is implemented by applying config fragment to a generic board
+defconfig. Valid fragments are ``tilapia.config``, ``grouper_E1565.config``
+and ``grouper_PM269.config``.
.. code-block:: bash
@@ -31,64 +30,103 @@
$ make
After the build succeeds, you will obtain the final ``u-boot-dtb-tegra.bin``
-image, ready for flashing (but check the next section for additional
-adjustments).
+image, ready for further processing.
-Pack U-Boot into repar-block
-----------------------------
+Process U-Boot
+--------------
-``DISCLAMER!`` All questions related to re-crypt work should be asked
+``DISCLAMER!`` All questions related to the re-crypt work should be asked
in re-crypt repo issues. NOT HERE!
-re-crypt is a small script which packs ``u-boot-dtb-tegra.bin`` in
-form usable by device. This process is required only on the first
-installation or to recover the device in case of a failed update.
-You need to know your tablet's individual SBK to continue.
+re-crypt is a tool that processes the ``u-boot-dtb-tegra.bin`` binary into form
+usable by device. This process is required only on the first installation or
+to recover the device in case of a failed update. You need to know your
+tablet's individual SBK to continue.
+
+Permanent installation can be performed either by using the nv3p protocol or by
+pre-loading just built U-Boot into RAM.
+
+Processing for the NV3P protocol
+********************************
.. code-block:: bash
- $ git clone https://github.com/clamor-s/re-crypt.git
- $ cd re-crypt # place your u-boot-dtb-regra.bin here
- $ ./re-crypt.sh -d grouper -k deadbeefdeadc0dedeadd00dfee1dead
+ $ git clone https://gitlab.com/grate-driver/re-crypt.git
+ $ cd re-crypt # place your u-boot-dtb-tegra.bin here
+ $ ./re-crypt.py --dev grouper --sbk <your sbk>
-Script will produce you a ``repart-block.bin`` ready to flash.
+where SBK has next form ``0xXXXXXXXX`` ``0xXXXXXXXX`` ``0xXXXXXXXX`` ``0xXXXXXXXX``
-Flash repart-block into the eMMC
---------------------------------
+The script will produce a ``repart-block.bin`` ready to flash.
-``DISCLAMER!`` All questions related to NvFlash should be asked
-in the proper place. NOT HERE! Flashing repart-block will erase
-all your eMMC, so make a backup before!
+Processing for pre-loaded U-Boot
+********************************
-``repart-block.bin`` contains BCT and bootloader in encrypted state
-in form which can just be written RAW at the start of eMMC.
+The procedure is the same, but the ``--split`` argument is used with the
+``re-crypt.py``. The script will produce ``bct.img`` and ``ebt.img`` ready
+to flash.
+
+Flashing U-Boot into the eMMC
+-----------------------------
+
+``DISCLAMER!`` All questions related to NvFlash should be asked in the proper
+place. NOT HERE! Flashing U-Boot will erase all eMMC, so make a backup before!
+
+Permanent installation can be performed either by using the nv3p protocol or by
+pre-loading just built U-Boot into RAM.
+
+Flashing with the NV3P protocol
+*******************************
+
+Nv3p is a custom Nvidia protocol used to recover bricked devices. Devices can
+enter it either by using ``wheelie`` with the correct ``blob.bin`` file or by
+pre-loading vendor bootloader with the Fusée Gelée.
+
+With nv3p, ``repart-block.bin`` is used. It contains BCT and a bootloader in
+encrypted state in form, which can just be written RAW at the start of eMMC.
.. code-block:: bash
$ wheelie --blob blob.bin
$ nvflash --resume --rawdevicewrite 0 1024 repart-block.bin
+When flashing is done, reboot the device.
+
+Flashing with a pre-loaded U-Boot
+*********************************
+
+U-Boot pre-loaded into RAM acts the same as when it was booted "cold". Currently
+U-Boot supports bootmenu entry fastboot, which allows to write a processed copy
+of U-Boot permanently into eMMC.
+
+While pre-loading U-Boot, hold the ``volume down`` button which will trigger
+the bootmenu. There, select ``fastboot`` using the volume and power buttons.
+After, on host PC, do:
+
+.. code-block:: bash
+
+ $ fastboot flash 0.1 bct.img
+ $ fastboot flash 0.2 ebt.img
+ $ fastboot reboot
+
+Device will reboot.
+
Boot
----
-After flashing ``repart-block.bin`` the device should reboot and turn
-itself off. This is normal behavior if no boot configuration is
-found.
+To boot Linux, U-Boot will look for an ``extlinux.conf`` on eMMC. Additionally,
+if the Volume Down button is pressed while booting, the device will enter
+bootmenu. Bootmenu contains entries to mount eMMC as mass storage, fastboot,
+reboot, reboot RCM, poweroff, enter U-Boot console and update bootloader (check
+the next chapter).
-To boot Linux, U-Boot will look for an ``extlinux.conf`` configuration
-on eMMC. Additionally if Volume Down button is pressed while booting
-device will enter bootmenu. Bootmenu contains entries to mount eMMC as
-mass storage, fastboot, reboot, reboot RCM, poweroff, enter U-Boot
-console and update bootloader (check next chapter).
-
-Flashing ``repart-block.bin`` eliminates vendor restriction on eMMC
-and allows the user to use/partition it in any way the user desires.
+Flashing ``repart-block.bin`` eliminates vendor restrictions on eMMC and allows
+the user to use/partition it in any way the user desires.
Self Upgrading
--------------
-Place your ``u-boot-dtb-tegra.bin`` on the first partition of the
-eMMC (using ability of u-boot to mount it). Enter bootmenu, choose
-update bootloader option with Power button and U-Boot should update
-itself. Once the process is completed, U-Boot will ask to press any
-button to reboot.
+Place your ``u-boot-dtb-tegra.bin`` on the first partition of the eMMC (using
+ability of u-boot to mount it). Enter bootmenu, choose update bootloader option
+with Power button and U-Boot should update itself. Once the process is
+completed, U-Boot will ask to press any button to reboot.
diff --git a/doc/board/asus/transformer_t30.rst b/doc/board/asus/transformer_t30.rst
index b6b6101..ff9792d 100644
--- a/doc/board/asus/transformer_t30.rst
+++ b/doc/board/asus/transformer_t30.rst
@@ -3,28 +3,27 @@
U-Boot for the ASUS Transformer device family
=============================================
-``DISCLAMER!`` Moving your ASUS Transformer to use U-Boot
-assumes replacement of the vendor ASUS bootloader. Vendor
-android firmwares will no longer be able to run on the device.
-This replacement IS reversible.
+``DISCLAMER!`` Moving your ASUS Transformer to use U-Boot assumes replacement
+of the vendor ASUS bootloader. Vendor Android firmwares will no longer be
+able to run on the device. This replacement IS reversible.
Quick Start
-----------
- Build U-Boot
-- Pack U-Boot into repart-block
-- Flash repart-block into the eMMC
-- Flash repart-block into TF600T SPI flash
+- Process U-Boot
+- Flashing U-Boot into the eMMC
+- Flashing U-Boot into the SPI flash
- Boot
- Self Upgrading
Build U-Boot
------------
-Device support is implemented by applying config fragment
-to a generic board defconfig. Valid fragments are ``tf201.config``,
-``tf300t.config``, ``tf300tg.config``, ``tf300tl.config``,
-``tf700t.config``, ``tf600t.config`` and ``p1801-t.config``.
+Device support is implemented by applying a config fragment to a generic board
+defconfig. Valid fragments are ``tf201.config``, ``tf300t.config``,
+``tf300tg.config``, ``tf300tl.config``, ``tf700t.config``, ``tf600t.config`` and
+``p1801-t.config``.
.. code-block:: bash
@@ -33,84 +32,124 @@
$ make
After the build succeeds, you will obtain the final ``u-boot-dtb-tegra.bin``
-image, ready for flashing (but check the next section for additional
-adjustments).
+image, ready for further processing.
-Pack U-Boot into repar-block
-----------------------------
+Process U-Boot
+--------------
-``DISCLAMER!`` All questions related to re-crypt work should be asked
+``DISCLAMER!`` All questions related to the re-crypt work should be asked
in re-crypt repo issues. NOT HERE!
-re-crypt is a small script which packs ``u-boot-dtb-tegra.bin`` in
-form usable by device. This process is required only on the first
-installation or to recover the device in case of a failed update.
-You need to know your tablet's individual SBK to continue.
+re-crypt is a tool that processes the ``u-boot-dtb-tegra.bin`` binary into form
+usable by device. This process is required only on the first installation or
+to recover the device in case of a failed update. You need to know your
+tablet's individual SBK to continue.
+
+Permanent installation can be performed either by using the nv3p protocol or by
+pre-loading just built U-Boot into RAM.
+
+Processing for the NV3P protocol
+********************************
.. code-block:: bash
- $ git clone https://github.com/clamor-s/re-crypt.git
- $ cd re-crypt # place your u-boot-dtb-regra.bin here
- $ ./re-crypt.sh -d tf201 -k deadbeefdeadc0dedeadd00dfee1dead
+ $ git clone https://gitlab.com/grate-driver/re-crypt.git
+ $ cd re-crypt # place your u-boot-dtb-tegra.bin here
+ $ ./re-crypt.py --dev tf201 --sbk <your sbk>
-Script will produce you a `repart-block.bin` ready to flash.
+where SBK has next form ``0xXXXXXXXX`` ``0xXXXXXXXX`` ``0xXXXXXXXX`` ``0xXXXXXXXX``
-Flash repart-block into the eMMC
---------------------------------
+The script will produce a ``repart-block.bin`` ready to flash.
-``DISCLAMER!`` All questions related to NvFlash should be asked
-in the proper place. NOT HERE! Flashing repart-block will erase
-all your eMMC, so make a backup before!
+Processing for pre-loaded U-Boot
+********************************
-``repart-block.bin`` contains BCT and bootloader in encrypted state
-in form which can just be written RAW at the start of eMMC.
+The procedure is the same, but the ``--split`` argument is used with the
+``re-crypt.py``. The script will produce ``bct.img`` and ``ebt.img`` ready
+to flash.
+
+Flashing U-Boot into the eMMC
+-----------------------------
+
+``DISCLAMER!`` All questions related to NvFlash should be asked in the proper
+place. NOT HERE! Flashing U-Boot will erase all eMMC, so make a backup before!
+
+Permanent installation can be performed either by using the nv3p protocol or by
+pre-loading just built U-Boot into RAM.
+
+Flashing with the NV3P protocol
+*******************************
+
+Nv3p is a custom Nvidia protocol used to recover bricked devices. Devices can
+enter it either by using ``wheelie`` with the correct ``blob.bin`` file or by
+pre-loading vendor bootloader with the Fusée Gelée.
+
+With nv3p, ``repart-block.bin`` is used. It contains BCT and a bootloader in
+encrypted state in form, which can just be written RAW at the start of eMMC.
.. code-block:: bash
$ wheelie --blob blob.bin
$ nvflash --resume --rawdevicewrite 0 1024 repart-block.bin
-Flash repart-block into TF600T SPI flash
-----------------------------------------
+When flashing is done, reboot the device.
-Unlike other transformers TF600T uses separate 4 MB SPI flash which
-contains all data required for boot. It is flashed from within u-boot
-itself preloaded into RAM using fusee gelee. After creating your
-``repart-block.bin`` you have to place it on a 1st partition of microSD
-card formated in fat. Then insert this microSD card into your tablet
-and boot it using fusee gelee and u-boot which was included into
-repart-block.bin, while booting you must hold volume down button.
-Process should take less then a minute, if everything goes correct,
-on microSD will appear ``spi-flash-backup.bin`` file, which is dump of
-your spi flash content and can be used to restore UEFI, do not loose it,
-tablet will power itself off.
+Flashing with a pre-loaded U-Boot
+*********************************
-Self-updating of u-boot is performed by placing ``u-boot-dtb-tegra.bin``
-on 1st partition of microSD, inserting it into tablet and booting with
-pressed volume down button.
+U-Boot pre-loaded into RAM acts the same as when it was booted "cold". Currently
+U-Boot supports bootmenu entry fastboot, which allows to write a processed copy
+of U-Boot permanently into eMMC.
+
+While pre-loading U-Boot, hold the ``volume down`` button which will trigger
+the bootmenu. There, select ``fastboot`` using the volume and power buttons.
+After, on host PC, do:
+
+.. code-block:: bash
+
+ $ fastboot flash 0.1 bct.img
+ $ fastboot flash 0.2 ebt.img
+ $ fastboot reboot
+
+Device will reboot.
+
+Flashing U-Boot into the SPI Flash
+----------------------------------
+
+Some of Transformers use a separate 4 MB SPI flash, which contains all data
+required for boot. It is flashed from within U-Boot itself, preloaded into RAM
+using Fusée Gelée.
+
+After creating your ``repart-block.bin`` you have to place it on a 1st partition
+of microSD card formated in fat. Then insert this microSD card into your tablet
+and boot it using Fusée Gelée and U-Boot, which was included into
+``repart-block.bin``, while booting you must hold the ``volume down`` button.
+
+The process should take less than a minute, if everything goes correctly,
+on microSD will appear ``spi-flash-backup.bin`` file, which is the dump of your
+SPI Flash content and can be used to restore UEFI, do not lose it, tablet will
+power itself off.
+
+Self-updating of U-Boot is performed by placing ``u-boot-dtb-tegra.bin`` on 1st
+partition of microSD, inserting it into the tablet and booting with a pressed
+``volume down`` button.
Boot
----
-After flashing ``repart-block.bin`` the device should reboot and turn
-itself off. This is normal behavior if no boot configuration is
-found.
+To boot Linux, U-Boot will look for an ``extlinux.conf`` on MicroSD and then on
+eMMC. Additionally, if the Volume Down button is pressed while booting, the
+device will enter bootmenu. Bootmenu contains entries to mount MicroSD and eMMC
+as mass storage, fastboot, reboot, reboot RCM, poweroff, enter U-Boot console
+and update bootloader (check the next chapter).
-To boot Linux, U-Boot will look for an ``extlinux.conf`` on MicroSD
-and then on eMMC. Additionally if Volume Down button is pressed
-while booting device will enter bootmenu. Bootmenu contains entries
-to mount MicroSD and eMMC as mass storage, fastboot, reboot, reboot
-RCM, poweroff, enter U-Boot console and update bootloader (check next
-chapter).
-
-Flashing ``repart-block.bin`` eliminates vendor restriction on eMMC
-and allows the user to use/partition it in any way the user desires.
+Flashing ``repart-block.bin`` eliminates vendor restrictions on eMMC and allows
+the user to use/partition it in any way the user desires.
Self Upgrading
--------------
-Place your ``u-boot-dtb-tegra.bin`` on the first partition of the
-MicroSD card and insert it into the tablet. Enter bootmenu, choose
-update bootloader option with Power button and U-Boot should update
-itself. Once the process is completed, U-Boot will ask to press any
-button to reboot.
+Place your ``u-boot-dtb-tegra.bin`` on the first partition of the MicroSD card
+and insert it into the tablet. Enter bootmenu, choose update the bootloader
+option with the Power button and U-Boot should update itself. Once the process
+is completed, U-Boot will ask to press any button to reboot.
diff --git a/doc/board/coreboot/coreboot.rst b/doc/board/coreboot/coreboot.rst
index 10a251c..7154f59 100644
--- a/doc/board/coreboot/coreboot.rst
+++ b/doc/board/coreboot/coreboot.rst
@@ -32,10 +32,9 @@
If you want to use ELF as the coreboot payload, change U-Boot configuration to
use CONFIG_OF_EMBED instead of CONFIG_OF_SEPARATE.
-To enable video you must enable these options in coreboot:
+To enable video you must enable CONFIG_GENERIC_LINEAR_FRAMEBUFFER in coreboot:
- - Set framebuffer graphics resolution (1280x1024 32k-color (1:5:5))
- - Keep VESA framebuffer
+ - Devices->Display->Framebuffer mode->Linear "high resolution" framebuffer
At present it seems that for Minnowboard Max, coreboot does not pass through
the video information correctly (it always says the resolution is 0x0). This
@@ -184,13 +183,13 @@
To update the `coreboot.rom` file which is used:
-#. Build coreboot with `CONFIG_LINEAR_FRAMEBUFFER=y`. If using `make menuconfig`
- this is under
- `Devices ->Display->Framebuffer mode->Linear "high resolution" framebuffer`.
+#. Build coreboot with `CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y`. If using
+ `make menuconfig`, this is under
+ `Devices->Display->Framebuffer mode->Linear "high resolution" framebuffer`.
#. Compress the resulting `coreboot.rom`::
- xz -c /path/to/coreboot/build/coreboot.rom >coreboot.rom.xz
+ xz -c /path/to/coreboot/build/coreboot.rom > coreboot.rom.xz
#. Upload the file to Google drive
diff --git a/doc/board/emulation/acpi.rst b/doc/board/emulation/acpi.rst
new file mode 100644
index 0000000..17b68e1
--- /dev/null
+++ b/doc/board/emulation/acpi.rst
@@ -0,0 +1,23 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+ACPI on QEMU
+============
+
+QEMU can provide ACPI tables on ARM, RISC-V (since QEMU v8.0.0), and x86.
+
+The following U-Boot settings are needed for ACPI support::
+
+ CONFIG_CMD_QFW=y
+ CONFIG_ACPI=y
+ CONFIG_GENERATE_ACPI_TABLE=y
+
+On x86 these settings are already included in the defconfig files. ARM and
+RISC-V default to use device-trees.
+
+Instead of updating the configuration manually you can add the configuration
+fragment `acpi.config` to the make command for initializing the configuration.
+E.g.
+
+.. code-block:: bash
+
+ make qemu-riscv64_smode_defconfig acpi.config
diff --git a/doc/board/emulation/index.rst b/doc/board/emulation/index.rst
index 932c65a..d3d6b8f 100644
--- a/doc/board/emulation/index.rst
+++ b/doc/board/emulation/index.rst
@@ -6,6 +6,7 @@
.. toctree::
:maxdepth: 1
+ acpi
blkdev
../../usage/semihosting
qemu-arm
diff --git a/doc/board/emulation/qemu-riscv.rst b/doc/board/emulation/qemu-riscv.rst
index 61137bc..8a5eb1e 100644
--- a/doc/board/emulation/qemu-riscv.rst
+++ b/doc/board/emulation/qemu-riscv.rst
@@ -131,7 +131,13 @@
-drive if=none,file=riscv64.img,format=raw,id=mydisk \
-device ide-hd,drive=mydisk,bus=ahci.0
-You will have to run 'scsi scan' to use it.
+or alternatively attach an emulated UFS::
+
+ -device ufs,id=ufs0 \
+ -drive if=none,file=test.img,format=raw,id=lun0 \
+ -device ufs-lu,drive=lun0,bus=ufs0
+
+You will have to run 'scsi scan' to use them.
A video console can be emulated in RISC-V virt machine by removing "-nographic"
and adding::
diff --git a/doc/board/hisilicon/hikey.rst b/doc/board/hisilicon/hikey.rst
new file mode 100644
index 0000000..8038a24
--- /dev/null
+++ b/doc/board/hisilicon/hikey.rst
@@ -0,0 +1,261 @@
+.. SPDX-License-Identifier: GPL-2.0-or-later
+
+HiKey board
+###########
+
+Introduction
+============
+
+HiKey is the first certified 96Boards Consumer Edition board. The board/SoC has:
+
+* HiSilicon Kirin 6220 eight-core ARM Cortex-A53 64-bit SoC running at 1.2GHz.
+* ARM Mali 450-MP4 GPU
+* 1GB 800MHz LPDDR3 DRAM
+* 4GB eMMC Flash Storage
+* microSD
+* 802.11a/b/g/n WiFi, Bluetooth
+
+The HiKey schematic can be found here:
+https://github.com/96boards/documentation/blob/master/consumer/hikey/hikey620/hardware-docs/HiKey_schematics_LeMaker_version_Rev_A1.pdf
+
+The SoC datasheet can be found here:
+https://github.com/96boards/documentation/blob/master/consumer/hikey/hikey620/hardware-docs/Hi6220V100_Multi-Mode_Application_Processor_Function_Description.pdf
+
+Currently the u-boot port supports:
+
+* USB
+* eMMC
+* SD card
+* GPIO
+
+The HiKey U-Boot port has been tested with l-loader, booting ATF, which then
+boots U-Boot as the bl33.bin executable.
+
+Compile from source
+===================
+
+First get all the sources
+
+.. code-block:: bash
+
+ mkdir -p ~/hikey/src ~/hikey/bin
+ cd ~/hikey/src
+ git clone https://github.com/96boards-hikey/edk2 -b testing/hikey960_v2.5
+ git clone https://github.com/ARM-software/arm-trusted-firmware
+ git clone https://github.com/96boards-hikey/l-loader -b testing/hikey960_v1.2
+ git clone https://github.com/96boards-hikey/OpenPlatformPkg -b testing/hikey960_v1.3.4
+ git clone https://github.com/96boards-hikey/atf-fastboot
+ wget https://snapshots.linaro.org/96boards/reference-platform/components/uefi-staging/latest/hikey/release/hisi-idt.py
+
+Get the BL30 mcuimage.bin binary. It is shipped as part of the UEFI source.
+The latest version can be obtained from the OpenPlatformPkg repo.
+
+.. code-block:: bash
+
+ cp OpenPlatformPkg/Platforms/Hisilicon/HiKey/Binary/mcuimage.bin ~/hikey/bin/
+
+Get nvme.img binary
+
+.. code-block:: bash
+
+ wget -P ~/hikey/bin https://snapshots.linaro.org/96boards/reference-platform/components/uefi-staging/latest/hikey/release/nvme.img
+
+Compile U-Boot
+==============
+
+.. code-block:: bash
+
+ cd ~/hikey/src/u-boot
+ make CROSS_COMPILE=aarch64-linux-gnu- hikey_config
+ make CROSS_COMPILE=aarch64-linux-gnu-
+ cp u-boot.bin ~/hikey/bin
+
+Compile ARM Trusted Firmware (ATF)
+==================================
+
+.. code-block:: bash
+
+ cd ~/hikey/src/arm-trusted-firmware
+ make CROSS_COMPILE=aarch64-linux-gnu- all fip \
+ SCP_BL2=~/hikey/bin/mcuimage.bin \
+ BL33=~/hikey/bin/u-boot.bin DEBUG=1 PLAT=hikey
+
+Copy the resulting FIP binary
+
+.. code-block:: bash
+
+ cp build/hikey/debug/fip.bin ~/hikey/bin
+
+Compile ATF Fastboot
+====================
+
+.. code-block:: bash
+
+ cd ~/hikey/src/atf-fastboot
+ make CROSS_COMPILE=aarch64-linux-gnu- PLAT=hikey DEBUG=1
+
+Compile l-loader
+================
+
+.. code-block:: bash
+
+ cd ~/hikey/src/l-loader
+ ln -sf ~/hikey/src/arm-trusted-firmware/build/hikey/debug/bl1.bin
+ ln -sf ~/hikey/src/arm-trusted-firmware/build/hikey/debug/bl2.bin
+ ln -sf ~/hikey/src/atf-fastboot/build/hikey/debug/bl1.bin fastboot.bin
+ make hikey PTABLE_LST=aosp-8g
+
+Copy the resulting binaries
+
+.. code-block:: bash
+
+ cp *.img ~/hikey/bin
+ cp l-loader.bin ~/hikey/bin
+ cp recovery.bin ~/hikey/bin
+
+These instructions are adapted from
+https://github.com/ARM-software/arm-trusted-firmware/blob/master/docs/plat/hikey.rst
+
+Flashing
+========
+
+1. Connect the second jumper on J15 BOOT SEL, to go into recovery mode and flash l-loader.bin with
+the hisi-idt.py utility. Then connect a USB A to B mini cable from your PC to the USB OTG port of HiKey and execute the below command.
+
+The command below assumes HiKey enumerated as the first USB serial port
+
+.. code-block:: bash
+
+ sudo python ~/hikey/src/hisi-idt.py -d /dev/ttyUSB0 --img1 ~/hikey/bin/recovery.bin
+
+2. Once LED 0 comes on solid, HiKey board should be detected as a fastboot device.
+
+.. code-block::
+
+ sudo fastboot devices
+
+ 0123456789ABCDEF fastboot
+
+3. Flash the images
+
+.. code-block::
+
+ sudo fastboot flash ptable ~/hikey/bin/prm_ptable.img
+ sudo fastboot flash loader ~/hikey/bin/l-loader.bin
+ sudo fastboot flash fastboot ~/hikey/bin/fip.bin
+ sudo fastboot flash nvme ~/hikey/bin/nvme.img
+
+4. Disconnect second jumper on J15 BOOT SEL, and reset the board and you will now (hopefully)
+ have ATF, booting u-boot from eMMC.
+
+ Note: To get USB host working, also disconnect the USB OTG cable used for flashing. Otherwise you
+ will get 'dwc_otg_core_host_init: Timeout!' errors.
+
+See working boot trace below on UART3 available at Low Speed Expansion header::
+
+ NOTICE: BL2: v1.5(debug):v1.5-694-g6d4f6aea
+ NOTICE: BL2: Built : 09:21:42, Aug 29 2018
+ INFO: BL2: Doing platform setup
+ INFO: ddr3 rank1 init pass
+ INFO: succeed to set ddrc 150mhz
+ INFO: ddr3 rank1 init pass
+ INFO: succeed to set ddrc 266mhz
+ INFO: ddr3 rank1 init pass
+ INFO: succeed to set ddrc 400mhz
+ INFO: ddr3 rank1 init pass
+ INFO: succeed to set ddrc 533mhz
+ INFO: ddr3 rank1 init pass
+ INFO: succeed to set ddrc 800mhz
+ INFO: Samsung DDR
+ INFO: ddr test value:0xa5a55a5a
+ INFO: BL2: TrustZone: protecting 16777216 bytes of memory at 0x3f000000
+ INFO: BL2: TrustZone: protecting 4194304 bytes of memory at 0x3e800000
+ INFO: [BDID] [fff91c18] midr: 0x410fd033
+ INFO: init_acpu_dvfs: pmic version 17
+ INFO: init_acpu_dvfs: ACPU_CHIP_MAX_FREQ=0x186a00.
+ INFO: acpu_dvfs_volt_init: success!
+ INFO: acpu_dvfs_set_freq: support freq num is 5
+ INFO: acpu_dvfs_set_freq: start prof is 0x4
+ INFO: acpu_dvfs_set_freq: magic is 0x5a5ac5c5
+ INFO: acpu_dvfs_set_freq: voltage:
+ INFO: - 0: 0x49
+ INFO: - 1: 0x49
+ INFO: - 2: 0x50
+ INFO: - 3: 0x60
+ INFO: - 4: 0x78
+ NOTICE: acpu_dvfs_set_freq: set acpu freq success!INFO: BL2: Loading image id 2
+ INFO: Loading image id=2 at address 0x1000000
+ INFO: Image id=2 loaded: 0x1000000 - 0x1023d00
+ INFO: hisi_mcu_load_image: mcu sections 0:
+ INFO: hisi_mcu_load_image: src = 0x1000200
+ INFO: hisi_mcu_load_image: dst = 0xf6000000
+ INFO: hisi_mcu_load_image: size = 31184
+ INFO: hisi_mcu_load_image: [SRC 0x1000200] 0x8000 0x3701 0x7695 0x7689
+ INFO: hisi_mcu_load_image: [DST 0xf6000000] 0x8000 0x3701 0x7695 0x7689
+ INFO: hisi_mcu_load_image: mcu sections 1:
+ INFO: hisi_mcu_load_image: src = 0x1007bd0
+ INFO: hisi_mcu_load_image: dst = 0x5e00000
+ INFO: hisi_mcu_load_image: size = 93828
+ INFO: hisi_mcu_load_image: [SRC 0x1007bd0] 0xf000b510 0x2103fb3d 0xf0004604 0xf003fb57
+ INFO: hisi_mcu_load_image: [DST 0x5e00000] 0xf000b510 0x2103fb3d 0xf0004604 0xf003fb57
+ INFO: hisi_mcu_load_image: mcu sections 2:
+ INFO: hisi_mcu_load_image: src = 0x101ea54
+ INFO: hisi_mcu_load_image: dst = 0x5e16e84
+ INFO: hisi_mcu_load_image: size = 15428
+ INFO: hisi_mcu_load_image: [SRC 0x101ea54] 0x9 0x1020640 0x10001 0x8f0d180
+ INFO: hisi_mcu_load_image: [DST 0x5e16e84] 0x9 0x1020640 0x10001 0x8f0d180
+ INFO: hisi_mcu_load_image: mcu sections 3:
+ INFO: hisi_mcu_load_image: src = 0x1022698
+ INFO: hisi_mcu_load_image: dst = 0x5e22a10
+ INFO: hisi_mcu_load_image: size = 3060
+ INFO: hisi_mcu_load_image: [SRC 0x1022698] 0x0 0x0 0x0 0x0
+ INFO: hisi_mcu_load_image: [DST 0x5e22a10] 0x0 0x0 0x0 0x0
+ INFO: hisi_mcu_load_image: mcu sections 4:
+ INFO: hisi_mcu_load_image: src = 0x102328c
+ INFO: hisi_mcu_load_image: dst = 0x5e23604
+ INFO: hisi_mcu_load_image: size = 2616
+ INFO: hisi_mcu_load_image: [SRC 0x102328c] 0xf80000a0 0x0 0xf80000ac 0x0
+ INFO: hisi_mcu_load_image: [DST 0x5e23604] 0xf80000a0 0x0 0xf80000ac 0x0
+ INFO: hisi_mcu_start_run: AO_SC_SYS_CTRL2=0
+ INFO: plat_hikey_bl2_handle_scp_bl2: MCU PC is at 0x42933301
+ INFO: plat_hikey_bl2_handle_scp_bl2: AO_SC_PERIPH_CLKSTAT4 is 0x3b018f09
+ WARNING: BL2: Platform setup already done!!
+ INFO: BL2: Loading image id 3
+ INFO: Loading image id=3 at address 0xf9858000
+ INFO: Image id=3 loaded: 0xf9858000 - 0xf9860058
+ INFO: BL2: Loading image id 5
+ INFO: Loading image id=5 at address 0x35000000
+ INFO: Image id=5 loaded: 0x35000000 - 0x35061cd2
+ NOTICE: BL2: Booting BL31
+ INFO: Entry point address = 0xf9858000
+ INFO: SPSR = 0x3cd
+ NOTICE: BL31: v1.5(debug):v1.5-694-g6d4f6aea
+ NOTICE: BL31: Built : 09:21:44, Aug 29 2018
+ WARNING: Using deprecated integer interrupt array in gicv2_driver_data_t
+ WARNING: Please migrate to using an interrupt_prop_t array
+ INFO: ARM GICv2 driver initialized
+ INFO: BL31: Initializing runtime services
+ INFO: BL31: cortex_a53: CPU workaround for disable_non_temporal_hint was applied
+ INFO: BL31: cortex_a53: CPU workaround for 843419 was applied
+ INFO: BL31: cortex_a53: CPU workaround for 855873 was applied
+ INFO: BL31: Preparing for EL3 exit to normal world
+ INFO: Entry point address = 0x35000000
+ INFO: SPSR = 0x3c9
+
+ U-Boot 2018.09-rc1 (Aug 22 2018 - 14:55:49 +0530)hikey
+
+ DRAM: 990 MiB
+ HI6553 PMIC init
+ MMC: config_sd_carddetect: SD card present
+ Hisilicon DWMMC: 0, Hisilicon DWMMC: 1
+ Loading Environment from FAT... Unable to use mmc 1:1... Failed (-5)
+ In: uart@f7113000
+ Out: uart@f7113000
+ Err: uart@f7113000
+ Net: Net Initialization Skipped
+ No ethernet found.
+ Hit any key to stop autoboot: 0
+ starting USB...
+ USB0: scanning bus 0 for devices... 2 USB Device(s) found
+ scanning usb for storage devices... 0 Storage Device(s) found
+ scanning usb for ethernet devices... 0 Ethernet Device(s) found
diff --git a/doc/board/hisilicon/hikey960.rst b/doc/board/hisilicon/hikey960.rst
new file mode 100644
index 0000000..93e983b
--- /dev/null
+++ b/doc/board/hisilicon/hikey960.rst
@@ -0,0 +1,284 @@
+.. SPDX-License-Identifier: GPL-2.0-or-later
+
+HiKey960 board
+##############
+
+Introduction
+============
+
+HiKey960 is one of the 96Boards Consumer Edition board from HiSilicon.
+The board/SoC has:
+
+* HiSilicon Kirin960 (HI3660) SoC with 4xCortex-A73 and 4xCortex-A53
+* ARM Mali G71 MP8 GPU
+* 3GB LPDDR4 SDRAM
+* 32GB UFS Flash Storage
+* microSD
+* 802.11a/b/g/n WiFi, Bluetooth
+
+More information about this board can be found in 96Boards website:
+https://www.96boards.org/product/hikey960/
+
+Currently the u-boot port supports:
+
+* SD card
+
+Compile from source
+===================
+
+First get all the sources
+
+.. code-block:: bash
+
+ mkdir -p ~/hikey960/src ~/hikey960/bin
+ cd ~/hikey960/src
+ git clone https://github.com/ARM-software/arm-trusted-firmware
+ git clone https://github.com/96boards-hikey/OpenPlatformPkg -b testing/hikey960_v1.3.4
+ git clone https://github.com/96boards-hikey/l-loader -b testing/hikey960_v1.2
+ wget http://snapshots.linaro.org/reference-platform/components/uefi-staging/123/hikey960/release/config
+ wget http://snapshots.linaro.org/reference-platform/components/uefi-staging/123/hikey960/release/hisi-sec_usb_xloader.img
+ wget http://snapshots.linaro.org/reference-platform/components/uefi-staging/123/hikey960/release/hisi-sec_uce_boot.img
+ wget http://snapshots.linaro.org/reference-platform/components/uefi-staging/123/hikey960/release/hisi-sec_xloader.img
+ wget http://snapshots.linaro.org/reference-platform/components/uefi-staging/123/hikey960/release/recovery.bin
+ wget http://snapshots.linaro.org/reference-platform/components/uefi-staging/123/hikey960/release/hikey_idt
+
+Get the SCP_BL2 lpm3.img binary. It is shipped as part of the UEFI source.
+The latest version can be obtained from the OpenPlatformPkg repo.
+
+.. code-block:: bash
+
+ cp OpenPlatformPkg/Platforms/Hisilicon/HiKey960/Binary/lpm3.img ~/hikey960/bin/
+
+Compile U-Boot
+==============
+
+.. code-block:: bash
+
+ cd ~/hikey960/src/u-boot
+ make CROSS_COMPILE=aarch64-linux-gnu- hikey960_defconfig
+ make CROSS_COMPILE=aarch64-linux-gnu-
+ cp u-boot.bin ~/hikey960/bin/
+
+Compile ARM Trusted Firmware (ATF)
+==================================
+
+.. code-block:: bash
+
+ cd ~/hikey960/src/arm-trusted-firmware
+ make CROSS_COMPILE=aarch64-linux-gnu- all fip \
+ SCP_BL2=~/hikey960/bin/lpm3.img \
+ BL33=~/hikey960/bin/u-boot.bin DEBUG=1 PLAT=hikey960
+
+Copy the resulting FIP binary
+
+.. code-block:: bash
+
+ cp build/hikey960/debug/fip.bin ~/hikey960/bin
+
+Compile l-loader
+================
+
+.. code-block:: bash
+
+ cd ~/hikey960/src/l-loader
+ ln -sf ~/hikey960/src/arm-trusted-firmware/build/hikey960/debug/bl1.bin
+ ln -sf ~/hikey960/src/arm-trusted-firmware/build/hikey960/debug/bl2.bin
+ ln -sf ~/hikey960/src/arm-trusted-firmware/build/hikey960/debug/fip.bin
+ ln -sf ~/hikey960/bin/u-boot.bin
+ make hikey960 PTABLE_LST=linux-32g NS_BL1U=u-boot.bin
+
+Copy the resulting binaries
+
+.. code-block:: bash
+
+ cp *.img ~/hikey960/bin
+ cp l-loader.bin ~/hikey960/bin
+
+These instructions are adapted from
+https://github.com/ARM-software/arm-trusted-firmware/blob/master/docs/plat/hikey960.rst
+
+Setup console
+=============
+
+Install ser2net. Use telnet as the console since UEFI in recovery mode
+output window fails to display in minicom.
+
+.. code-block:: bash
+
+ sudo apt-get install ser2net
+
+Configure ser2net
+
+.. code-block:: bash
+
+ sudo vi /etc/ser2net.conf
+
+Append one line for serial-over-USB in #ser2net.conf
+
+ 2004:telnet:0:/dev/ttyUSB0:115200 8DATABITS NONE 1STOPBIT banner
+
+Start ser2net
+
+.. code-block:: bash
+
+ sudo killall ser2net
+ sudo ser2net -u
+
+Open the console.
+
+.. code-block:: bash
+
+ telnet localhost 2004
+
+And you could open the console remotely, too.
+
+Flashing
+========
+
+1. Boot Hikey960 into recovery mode as per the below document:
+https://github.com/96boards/documentation/blob/master/consumer/hikey/hikey960/installation/board-recovery.md
+
+Once Hikey960 is in recovery mode, flash the recovery binary:
+
+.. code-block:: bash
+
+ cd ~/hikey960/src
+ chmod +x ./hikey_idt
+ sudo ./hikey_idt -c config -p /dev/ttyUSB1
+
+Now move to the Hikey960 console and press `f` during UEFI boot. This
+will allow the board to boot into fastboot mode. Once the board is in
+fastboot mode, you should see the ID of the HiKey960 board using the
+following command
+
+.. code-block:: bash
+
+ sudo fastboot devices
+
+ 1ED3822A018E3372 fastboot
+
+3. Flash the images
+
+Now, the images can be flashed using fastboot:
+
+.. code-block:: bash
+
+ sudo fastboot flash ptable ~/hikey960/bin/prm_ptable.img
+ sudo fastboot flash xloader ~/hikey960/bin/hisi-sec_xloader.img
+ sudo fastboot flash fastboot ~/hikey960/bin/l-loader.bin
+ sudo fastboot flash fip ~/hikey960/bin/fip.bin
+
+4. Set the "Boot Mode" switch to OFF position for normal boot mode.
+Then power on HiKey960
+
+Observe the console traces using UART6 on the Low Speed Expansion header::
+
+ NOTICE: BL2: v2.1(debug):v2.1-531-g3ee48f40
+ NOTICE: BL2: Built : 18:15:58, Aug 2 2019
+ INFO: BL2: Doing platform setup
+ INFO: UFS LUN0 contains 1024 blocks with 4096-byte size
+ INFO: UFS LUN1 contains 1024 blocks with 4096-byte size
+ INFO: UFS LUN2 contains 2048 blocks with 4096-byte size
+ INFO: UFS LUN3 contains 7805952 blocks with 4096-byte size
+ INFO: ufs: change power mode success
+ INFO: BL2: Loading image id 2
+ INFO: Loading image id=2 at address 0x89c80000
+ INFO: Image id=2 loaded: 0x89c80000 - 0x89cb5088
+ INFO: BL2: Initiating SCP_BL2 transfer to SCP
+ INFO: BL2: SCP_BL2: 0x89c80000@0x35088
+ INFO: BL2: SCP_BL2 HEAD:
+ INFO: BL2: SCP_BL2 0x7000 0x179 0x159 0x149
+ INFO: BL2: SCP_BL2 0x189 0x18b 0x18d 0x0
+ INFO: BL2: SCP_BL2 0x0 0x0 0x0 0x18f
+ INFO: BL2: SCP_BL2 0x191 0x0 0x193 0x195
+ INFO: BL2: SCP_BL2 0x18fd 0x18fd 0x18fd 0x18fd
+ INFO: BL2: SCP_BL2 0x18fd 0x18fd 0x18fd 0x18fd
+ INFO: BL2: SCP_BL2 0x18fd 0x18fd 0x18fd 0x18fd
+ INFO: BL2: SCP_BL2 0x4d454355 0x43494741 0x424d554e 0x21215245
+ INFO: BL2: SCP_BL2 0x4a054904 0x42912000 0xf841bfbc 0xe7fa0b04
+ INFO: BL2: SCP_BL2 0xb88cf000 0x3b18 0x3d1c 0x6809493e
+ INFO: BL2: SCP_BL2 0x4613680a 0x201f102 0xf0002a04 0x600a804c
+ INFO: BL2: SCP_BL2 0x204f04f 0xf203fb02 0xf102440a 0x60100204
+ INFO: BL2: SCP_BL2 0x160f04f 0xf103fb01 0x68004834 0x61044408
+ INFO: BL2: SCP_BL2 0x61866145 0xf8c061c7 0xf8c08020 0xf8c09024
+ INFO: BL2: SCP_BL2 0xf8c0a028 0xf3efb02c 0xf3ef8208 0x68118309
+ INFO: BL2: SCP_BL2 0xf1026401 0xf0110204 0xbf070f04 0x46113220
+ INFO: BL2: SCP_BL2 TAIL:
+ INFO: BL2: SCP_BL2 0x0 0x0 0x0 0x0
+ INFO: BL2: SCP_BL2 0x0 0x0 0x0 0x0
+ INFO: BL2: SCP_BL2 0x0 0x0 0x0 0x0
+ INFO: BL2: SCP_BL2 0x0 0x0 0x0 0x0
+ INFO: BL2: SCP_BL2 0x0 0x0 0x0 0x0
+ INFO: BL2: SCP_BL2 0x0 0x0 0x0 0x0
+ INFO: BL2: SCP_BL2 0x0 0x0 0x0 0x0
+ INFO: BL2: SCP_BL2 0x0 0x0 0x0 0x0
+ INFO: BL2: SCP_BL2 0x0 0x0 0x0 0x0
+ INFO: BL2: SCP_BL2 0x0 0x0 0x0 0x0
+ INFO: BL2: SCP_BL2 0x0 0x19cad151 0x19b80040 0x0
+ INFO: BL2: SCP_BL2 0x0 0x0 0x0 0x0
+ INFO: BL2: SCP_BL2 0x0 0x0 0x0 0x0
+ INFO: BL2: SCP_BL2 0x0 0x0 0x0 0x0
+ INFO: BL2: SCP_BL2 0x0 0x0 0x0 0x0
+ INFO: BL2: SCP_BL2 0x0 0x0 0x0 0x0
+ INFO: BL2: SCP_BL2 transferred to SCP
+ INFO: start fw loading
+ INFO: fw load success
+ WARNING: BL2: Platform setup already done!!
+ INFO: BL2: Loading image id 3
+ INFO: Loading image id=3 at address 0x1ac58000
+ INFO: Image id=3 loaded: 0x1ac58000 - 0x1ac63024
+ INFO: BL2: Loading image id 5
+ INFO: Loading image id=5 at address 0x1ac98000
+ INFO: Image id=5 loaded: 0x1ac98000 - 0x1ad0819c
+ NOTICE: BL2: Booting BL31
+ INFO: Entry point address = 0x1ac58000
+ INFO: SPSR = 0x3cd
+ NOTICE: BL31: v2.1(debug):v2.1-531-g3ee48f40
+ NOTICE: BL31: Built : 18:16:01, Aug 2 2019
+ INFO: ARM GICv2 driver initialized
+ INFO: BL31: Initializing runtime services
+ INFO: BL31: cortex_a53: CPU workaround for 855873 was applied
+ INFO: plat_setup_psci_ops: sec_entrypoint=0x1ac580fc
+ INFO: BL31: Preparing for EL3 exit to normal world
+ INFO: Entry point address = 0x1ac98000
+ INFO: SPSR = 0x3c9
+
+ U-Boot 2019.07-00628-g286f05a6fc-dirty (Aug 02 2019 - 17:14:05 +0530)
+ Hikey960
+
+ DRAM: 3 GiB
+ PSCI: v1.1
+ MMC: dwmmc1@ff37f000: 0
+ Loading Environment from EXT4... ** File not found /uboot.env **
+
+ ** Unable to read "/uboot.env" from mmc0:2 **
+ In: serial@fff32000
+ Out: serial@fff32000
+ Err: serial@fff32000
+ Net: Net Initialization Skipped
+ No ethernet found.
+ Hit any key to stop autoboot: 0
+ switch to partitions #0, OK
+ mmc0 is current device
+ Scanning mmc 0:1...
+ Found /extlinux/extlinux.conf
+ Retrieving file: /extlinux/extlinux.conf
+ 201 bytes read in 12 ms (15.6 KiB/s)
+ 1: hikey960-kernel
+ Retrieving file: /Image
+ 24689152 bytes read in 4377 ms (5.4 MiB/s)
+ append: earlycon=pl011,mmio32,0xfff32000 console=ttyAMA6,115200 rw root=/dev/mmcblk0p2 rot
+ Retrieving file: /hi3660-hikey960.dtb
+ 35047 bytes read in 14 ms (2.4 MiB/s)
+ ## Flattened Device Tree blob at 10000000
+ Booting using the fdt blob at 0x10000000
+ Using Device Tree in place at 0000000010000000, end 000000001000b8e6
+
+ Starting kernel ...
+
+ [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
+ [ 0.000000] Linux version 5.2.0-03138-gd75da80dce39 (mani@Mani-XPS-13-9360) (gcc versi9
+ [ 0.000000] Machine model: HiKey960
+ [ 0.000000] earlycon: pl11 at MMIO32 0x00000000fff32000 (options '')
+ [ 0.000000] printk: bootconsole [pl11] enabled
+ [ 0.000000] efi: Getting EFI parameters from FDT:
diff --git a/doc/board/hisilicon/index.rst b/doc/board/hisilicon/index.rst
new file mode 100644
index 0000000..5455b76
--- /dev/null
+++ b/doc/board/hisilicon/index.rst
@@ -0,0 +1,11 @@
+.. SPDX-License-Identifier: GPL-2.0-or-later
+
+HiSilicon
+=========
+
+.. toctree::
+ :maxdepth: 2
+
+ hikey
+ hikey960
+ poplar
diff --git a/doc/board/hisilicon/poplar.rst b/doc/board/hisilicon/poplar.rst
new file mode 100644
index 0000000..0fccc14
--- /dev/null
+++ b/doc/board/hisilicon/poplar.rst
@@ -0,0 +1,302 @@
+.. SPDX-License-Identifier: GPL-2.0-or-later
+
+Poplar board
+############
+
+Board Information
+=================
+
+Developed by HiSilicon, the board features the Hi3798C V200 with an
+integrated quad-core 64-bit ARM Cortex A53 processor and high
+performance Mali T720 GPU, making it capable of running any commercial
+set-top solution based on Linux or Android. Its high performance
+specification also supports a premium user experience with up to H.265
+HEVC decoding of 4K video at 60 frames per second.
+
+* SOC Hisilicon Hi3798CV200
+* CPU Quad-core ARM Cortex-A53 64 bit
+* DRAM DDR3/3L/4 SDRAM interface, maximum 32-bit data width 2 GB
+* USB Two USB 2.0 ports One USB 3.0 ports
+* CONSOLE USB-micro port for console support
+* ETHERNET 1 GBe Ethernet
+* PCIE One PCIe 2.0 interfaces
+* JTAG 8-Pin JTAG
+* EXPANSION INTERFACE Linaro 96Boards Low Speed Expansion slot
+* DIMENSION Standard 160×120 mm 96Boards Enterprice Edition form factor
+* WIFI 802.11AC 2*2 with Bluetooth
+* CONNECTORS One connector for Smart Card One connector for TSI
+
+Build instructions
+==================
+
+.. note::
+
+ U-Boot has a **strong** dependency with the l-loader and the ARM trusted
+ firmware repositories.
+
+The boot sequence is::
+
+ l-loader --> arm_trusted_firmware --> U-Boot
+
+U-Boot needs to be aware of the BL31 runtime location and size to avoid writing
+over it. Currently, BL31 is being placed below the kernel text offset (check
+poplar.c) but this could change in the future.
+
+The current version of U-Boot has been tested with
+
+- https://github.com/Linaro/poplar-l-loader.git::
+
+ commit f0988698dcc5c08bd0a8f50aa0457e138a5f438c
+ Author: Alex Elder <elder@linaro.org>
+ Date: Fri Jun 16 08:57:59 2017 -0500
+
+ l-loader: use external memory region definitions
+
+ The ARM Trusted Firmware code now has a header file that collects
+ all the definitions for the memory regions used for its boot stages.
+ Include that file where needed, and use the definitions found therein
+
+ Signed-off-by: Alex Elder <elder@linaro.org>
+
+- https://github.com/Linaro/poplar-arm-trusted-firmware.git::
+
+ commit 6ac42dd3be13c99aa8ce29a15073e2f19d935f68
+ Author: Alex Elder <elder@linaro.org>
+ Date: Fri Jun 16 09:24:50 2017 -0500
+
+ poplar: define memory regions in a separate file
+
+ Separate the definitions for memory regions used for the BL stage
+ images and FIP into a new file. The "l-loader" image uses knowledge
+ of the sizes and locations of these memory regions, and it can now
+ include this (external) header to get these definitions, rather than
+ having to make coordinated changes to both code bases.
+
+ The new file has a complete set of definitions (more than may be
+ required by one or the other user). It also includes a summary of
+ how the boot process works, and how it uses these regions.
+
+ It should now be relatively easy to adjust the sizes and locations
+ of these memory regions, or to add to them (e.g. for TEE).
+
+ Signed-off-by: Alex Elder <elder@linaro.org>
+
+
+Compile from source
+-------------------
+
+Get all the sources
+
+.. code-block:: bash
+
+ mkdir -p ~/poplar/src ~/poplar/bin
+ cd ~/poplar/src
+ git clone https://github.com/Linaro/poplar-l-loader.git l-loader
+ git clone https://github.com/Linaro/poplar-arm-trusted-firmware.git atf
+ git clone https://github.com/Linaro/poplar-U-Boot.git U-Boot
+
+Make sure you are using the correct branch on each one of these repositories.
+The definition of "correct" might change over time (at this moment in time this
+would be the "latest" branch).
+
+Compile U-Boot
+~~~~~~~~~~~~~~
+
+Prerequisite:
+
+.. code-block:: bash
+
+ sudo apt-get install device-tree-compiler
+
+.. code-block:: bash
+
+ cd ~/poplar/src/U-Boot
+ make CROSS_COMPILE=aarch64-linux-gnu- poplar_defconfig
+ make CROSS_COMPILE=aarch64-linux-gnu-
+ cp U-Boot.bin ~/poplar/bin
+
+Compile ARM Trusted Firmware (ATF)
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+.. code-block:: bash
+
+ cd ~/poplar/src/atf
+ make CROSS_COMPILE=aarch64-linux-gnu- all fip \
+ SPD=none BL33=~/poplar/bin/U-Boot.bin DEBUG=1 PLAT=poplar
+
+Copy resulting binaries
+
+.. code-block:: bash
+
+ cp build/hi3798cv200/debug/bl1.bin ~/poplar/src/l-loader/atf/
+ cp build/hi3798cv200/debug/fip.bin ~/poplar/src/l-loader/atf/
+
+Compile l-loader
+~~~~~~~~~~~~~~~~
+
+.. code-block:: bash
+
+ cd ~/poplar/src/l-loader
+ make clean
+ make CROSS_COMPILE=arm-linux-gnueabi-
+
+Due to BootROM requiremets, rename l-loader.bin to fastboot.bin:
+
+.. code-block:: bash
+
+ cp l-loader.bin ~/poplar/bin/fastboot.bin
+
+Flash instructions
+==================
+
+Two methods:
+
+Using USB debrick support
+ Copy fastboot.bin to a FAT partition on the USB drive and reboot the
+ poplar board while pressing S3(usb_boot).
+
+ The system will execute the new U-Boot and boot into a shell which you
+ can then use to write to eMMC.
+
+Using U-BOOT from shell
+ 1) using AXIS usb ethernet dongle and tftp
+ 2) using FAT formated USB drive
+
+Flash using TFTP (USB ethernet dongle)
+--------------------------------------
+
+Plug a USB AXIS ethernet dongle on any of the USB2 ports on the Poplar board.
+Copy fastboot.bin to your tftp server.
+In U-Boot make sure your network is properly setup.
+
+Then::
+
+ => tftp 0x30000000 fastboot.bin
+ starting USB...
+ USB0: USB EHCI 1.00
+ scanning bus 0 for devices... 1 USB Device(s) found
+ USB1: USB EHCI 1.00
+ scanning bus 1 for devices... 3 USB Device(s) found
+ scanning usb for storage devices... 0 Storage Device(s) found
+ scanning usb for ethernet devices... 1 Ethernet Device(s) found
+ Waiting for Ethernet connection... done.
+ Using asx0 device
+ TFTP from server 192.168.1.4; our IP address is 192.168.1.10
+ Filename 'poplar/fastboot.bin'.
+ Load address: 0x30000000
+ Loading: #################################################################
+ #################################################################
+ ###############################################################
+ 2 MiB/s
+ done
+ Bytes transferred = 983040 (f0000 hex)
+
+ => mmc write 0x30000000 0 0x780
+
+ MMC write: dev # 0, block # 0, count 1920 ... 1920 blocks written: OK
+ => reset
+
+Flash using USB FAT drive
+-------------------------
+
+Copy fastboot.bin to any partition on a FAT32 formated usb flash drive.
+Enter the uboot prompt::
+
+ => fatls usb 0:2
+ 983040 fastboot.bin
+
+ 1 file(s), 0 dir(s)
+
+ => fatload usb 0:2 0x30000000 fastboot.bin
+ reading fastboot.bin
+ 983040 bytes read in 44 ms (21.3 MiB/s)
+
+ => mmc write 0x30000000 0 0x780
+
+ MMC write: dev # 0, block # 0, count 1920 ... 1920 blocks written: OK
+
+Boot trace
+==========
+
+::
+
+ Bootrom start
+ Boot Media: eMMC
+ Decrypt auxiliary code ...OK
+
+ lsadc voltage min: 000000FE, max: 000000FF, aver: 000000FE, index: 00000000
+
+ Entry boot auxiliary code
+
+ Auxiliary code - v1.00
+ DDR code - V1.1.2 20160205
+ Build: Mar 24 2016 - 17:09:44
+ Reg Version: v134
+ Reg Time: 2016/03/18 09:44:55
+ Reg Name: hi3798cv2dmb_hi3798cv200_ddr3_2gbyte_8bitx4_4layers.reg
+
+ Boot auxiliary code success
+ Bootrom success
+
+ LOADER: Switched to aarch64 mode
+ LOADER: Entering ARM TRUSTED FIRMWARE
+ LOADER: CPU0 executes at 0x000ce000
+
+ INFO: BL1: 0xe1000 - 0xe7000 [size = 24576]
+ NOTICE: Booting Trusted Firmware
+ NOTICE: BL1: v1.3(debug):v1.3-372-g1ba9c60
+ NOTICE: BL1: Built : 17:51:33, Apr 30 2017
+ INFO: BL1: RAM 0xe1000 - 0xe7000
+ INFO: BL1: Loading BL2
+ INFO: Loading image id=1 at address 0xe9000
+ INFO: Image id=1 loaded at address 0xe9000, size = 0x5008
+ NOTICE: BL1: Booting BL2
+ INFO: Entry point address = 0xe9000
+ INFO: SPSR = 0x3c5
+ NOTICE: BL2: v1.3(debug):v1.3-372-g1ba9c60
+ NOTICE: BL2: Built : 17:51:33, Apr 30 2017
+ INFO: BL2: Loading BL31
+ INFO: Loading image id=3 at address 0x129000
+ INFO: Image id=3 loaded at address 0x129000, size = 0x8038
+ INFO: BL2: Loading BL33
+ INFO: Loading image id=5 at address 0x37000000
+ INFO: Image id=5 loaded at address 0x37000000, size = 0x58f17
+ NOTICE: BL1: Booting BL31
+ INFO: Entry point address = 0x129000
+ INFO: SPSR = 0x3cd
+ INFO: Boot bl33 from 0x37000000 for 364311 Bytes
+ NOTICE: BL31: v1.3(debug):v1.3-372-g1ba9c60
+ NOTICE: BL31: Built : 17:51:33, Apr 30 2017
+ INFO: BL31: Initializing runtime services
+ INFO: BL31: Preparing for EL3 exit to normal world
+ INFO: Entry point address = 0x37000000
+ INFO: SPSR = 0x3c9
+
+ U-Boot 2017.05-rc2-00130-gd2255b0 (Apr 30 2017 - 17:51:28 +0200)poplar
+
+ Model: HiSilicon Poplar Development Board
+ BOARD: Hisilicon HI3798cv200 Poplar
+ DRAM: 1 GiB
+ MMC: Hisilicon DWMMC: 0
+ In: serial@f8b00000
+ Out: serial@f8b00000
+ Err: serial@f8b00000
+ Net: Net Initialization Skipped
+ No ethernet found.
+
+ Hit any key to stop autoboot: 0
+ starting USB...
+ USB0: USB EHCI 1.00
+ scanning bus 0 for devices... 1 USB Device(s) found
+ USB1: USB EHCI 1.00
+ scanning bus 1 for devices... 4 USB Device(s) found
+ scanning usb for storage devices... 1 Storage Device(s) found
+ scanning usb for ethernet devices... 1 Ethernet Device(s) found
+
+ USB device 0:
+ Device 0: Vendor: SanDisk Rev: 1.00 Prod: Cruzer Blade
+ Type: Removable Hard Disk
+ Capacity: 7632.0 MB = 7.4 GB (15630336 x 512)
+ ... is now current device
+ Scanning usb 0:1...
+ =>
diff --git a/doc/board/htc/endeavoru.rst b/doc/board/htc/endeavoru.rst
index 950c713..e0edefe 100644
--- a/doc/board/htc/endeavoru.rst
+++ b/doc/board/htc/endeavoru.rst
@@ -3,17 +3,16 @@
U-Boot for the HTC One X (endeavoru)
====================================
-``DISCLAMER!`` Moving your HTC ONe X to use U-Boot assumes
-replacement of the vendor hboot. Vendor android firmwares
-will no longer be able to run on the device.
-This replacement IS reversible.
+``DISCLAMER!`` Moving your HTC ONe X to use U-Boot assumes replacement of the
+vendor hboot. Vendor android firmwares will no longer be able to run on the
+device. This replacement IS reversible.
Quick Start
-----------
- Build U-Boot
-- Pack U-Boot into repart-block
-- Flash repart-block into the eMMC
+- Process U-Boot
+- Flashing U-Boot into the eMMC
- Boot
- Self Upgrading
@@ -27,63 +26,100 @@
$ make
After the build succeeds, you will obtain the final ``u-boot-dtb-tegra.bin``
-image, ready for flashing (but check the next section for additional
-adjustments).
+image, ready for further processing.
-Pack U-Boot into repar-block
-----------------------------
+Process U-Boot
+--------------
-``DISCLAMER!`` All questions related to re-crypt work should be
-asked in re-crypt repo issues. NOT HERE!
+``DISCLAMER!`` All questions related to the re-crypt work should be asked
+in re-crypt repo issues. NOT HERE!
-re-crypt is a small script which packs ``u-boot-dtb-tegra.bin`` in
-form usable by device. This process is required only on the first
-installation or to recover the device in case of a failed update.
+re-crypt is a tool that processes the ``u-boot-dtb-tegra.bin`` binary into form
+usable by device. This process is required only on the first installation or
+to recover the device in case of a failed update.
+
+Permanent installation can be performed either by using the nv3p protocol or by
+pre-loading just built U-Boot into RAM.
+
+Processing for the NV3P protocol
+********************************
.. code-block:: bash
- $ git clone https://github.com/clamor-s/re-crypt.git
- $ cd re-crypt # place your u-boot-dtb-regra.bin here
- $ ./re-crypt.sh -d endeavoru
+ $ git clone https://gitlab.com/grate-driver/re-crypt.git
+ $ cd re-crypt # place your u-boot-dtb-tegra.bin here
+ $ ./re-crypt.py --dev endeavoru
-Script will produce you a ``repart-block.bin`` ready to flash.
+The script will produce a ``repart-block.bin`` ready to flash.
-Flash repart-block into the eMMC
---------------------------------
+Processing for pre-loaded U-Boot
+********************************
-``DISCLAMER!`` All questions related to NvFlash should be asked
-in the proper place. NOT HERE! Flashing repart-block will erase
-all your eMMC, so make a backup before!
+The procedure is the same, but the ``--split`` argument is used with the
+``re-crypt.py``. The script will produce ``bct.img`` and ``ebt.img`` ready
+to flash.
-``repart-block.bin`` contains BCT and bootloader in encrypted state
-in form which can just be written RAW at the start of eMMC.
+Flashing U-Boot into the eMMC
+-----------------------------
+
+``DISCLAMER!`` All questions related to NvFlash should be asked in the proper
+place. NOT HERE! Flashing U-Boot will erase all eMMC, so make a backup before!
+
+Permanent installation can be performed either by using the nv3p protocol or by
+pre-loading just built U-Boot into RAM.
+
+Flashing with the NV3P protocol
+*******************************
+
+Nv3p is a custom Nvidia protocol used to recover bricked devices. Devices can
+enter it either by using ``wheelie`` with the correct ``blob.bin`` file or by
+pre-loading vendor bootloader with the Fusée Gelée.
+
+With nv3p, ``repart-block.bin`` is used. It contains BCT and a bootloader in
+encrypted state in form, which can just be written RAW at the start of eMMC.
.. code-block:: bash
$ wheelie --blob blob.bin
$ nvflash --resume --rawdevicewrite 0 1024 repart-block.bin
+When flashing is done, reboot the device.
+
+Flashing with a pre-loaded U-Boot
+*********************************
+
+U-Boot pre-loaded into RAM acts the same as when it was booted "cold". Currently
+U-Boot supports bootmenu entry fastboot, which allows to write a processed copy
+of U-Boot permanently into eMMC.
+
+While pre-loading U-Boot, hold the ``volume down`` button which will trigger
+the bootmenu. There, select ``fastboot`` using the volume and power buttons.
+After, on host PC, do:
+
+.. code-block:: bash
+
+ $ fastboot flash 0.1 bct.img
+ $ fastboot flash 0.2 ebt.img
+ $ fastboot reboot
+
+Device will reboot.
+
Boot
----
-After flashing ``repart-block.bin`` the device should reboot and turn
-itself off. This is normal behavior if no boot configuration is
-found.
+To boot Linux, U-Boot will look for an ``extlinux.conf`` on eMMC. Additionally,
+if the Volume Down button is pressed while booting, the device will enter
+bootmenu. Bootmenu contains entries to mount eMMC as mass storage, fastboot,
+reboot, reboot RCM, poweroff, enter U-Boot console and update bootloader (check
+the next chapter).
-To boot Linux, U-Boot will look for an ``extlinux.conf`` configuration
-on eMMC. Additionally if Volume Down button is pressed while booting
-device will enter bootmenu. Bootmenu contains entries to mount eMMC as
-mass storage, fastboot, reboot, reboot RCM, poweroff, enter U-Boot
-console and update bootloader (check next chapter).
-
-Flashing ``repart-block.bin`` eliminates vendor restriction on eMMC
-and allows the user to use/partition it in any way the user desires.
+Flashing ``repart-block.bin`` eliminates vendor restrictions on eMMC and allows
+the user to use/partition it in any way the user desires.
Self Upgrading
--------------
-Place your ``u-boot-dtb-tegra.bin`` on the first partition of the
-eMMC (using ability of u-boot to mount it). Enter bootmenu, choose
-update bootloader option with Power button and U-Boot should update
-itself. Once the process is completed, U-Boot will ask to press any
-button to reboot.
+Place your ``u-boot-dtb-tegra.bin`` on the first partition of the eMMC (using
+ability of u-boot to mount it). Enter bootmenu, choose update bootloader option
+with Power button and U-Boot should update itself. Once the process is
+completed, U-Boot will ask to press any button to reboot.
diff --git a/doc/board/index.rst b/doc/board/index.rst
index 9e4cecc..c96e5fd 100644
--- a/doc/board/index.rst
+++ b/doc/board/index.rst
@@ -27,6 +27,7 @@
gateworks/index
google/index
highbank/index
+ hisilicon/index
htc/index
intel/index
kontron/index
diff --git a/doc/board/lg/x3_t30.rst b/doc/board/lg/x3_t30.rst
index 5c564aa..618b00d 100644
--- a/doc/board/lg/x3_t30.rst
+++ b/doc/board/lg/x3_t30.rst
@@ -3,17 +3,16 @@
U-Boot for the LG X3 T30 device family
======================================
-``DISCLAMER!`` Moving your LG P880 or P895 to use U-Boot
-assumes replacement of the vendor LG bootloader. Vendor
-android firmwares will no longer be able to run on the
-device. This replacement IS reversible.
+``DISCLAMER!`` Moving your LG P880 or P895 to use U-Boot assumes replacement
+of the vendor LG bootloader. Vendor android firmwares will no longer be able
+to run on the device. This replacement IS reversible.
Quick Start
-----------
- Build U-Boot
-- Pack U-Boot into repart-block
-- Flash repart-block into the eMMC
+- Process U-Boot
+- Flashing U-Boot into the eMMC
- Boot
- Self Upgrading
@@ -30,64 +29,100 @@
$ make
After the build succeeds, you will obtain the final ``u-boot-dtb-tegra.bin``
-image, ready for flashing (but check the next section for additional
-adjustments).
+image, ready for further processing.
-Pack U-Boot into repar-block
-----------------------------
+Process U-Boot
+--------------
-``DISCLAMER!`` All questions related to re-crypt work should be
-asked in re-crypt repo issues. NOT HERE!
+``DISCLAMER!`` All questions related to the re-crypt work should be asked
+in re-crypt repo issues. NOT HERE!
-re-crypt is a small script which packs ``u-boot-dtb-tegra.bin`` in
-form usable by device. This process is required only on the first
-installation or to recover the device in case of a failed update.
+re-crypt is a tool that processes the ``u-boot-dtb-tegra.bin`` binary into form
+usable by device. This process is required only on the first installation or
+to recover the device in case of a failed update.
+
+Permanent installation can be performed either by using the nv3p protocol or by
+pre-loading just built U-Boot into RAM.
+
+Processing for the NV3P protocol
+********************************
.. code-block:: bash
- $ git clone https://github.com/clamor-s/re-crypt.git
- $ cd re-crypt # place your u-boot-dtb-regra.bin here
- $ ./re-crypt.sh -d p895
+ $ git clone https://gitlab.com/grate-driver/re-crypt.git
+ $ cd re-crypt # place your u-boot-dtb-tegra.bin here
+ $ ./re-crypt.py --dev p895
-Script will produce you a ``repart-block.bin`` ready to flash.
+The script will produce a ``repart-block.bin`` ready to flash.
-Flash repart-block into the eMMC
---------------------------------
+Processing for pre-loaded U-Boot
+********************************
-``DISCLAMER!`` All questions related to NvFlash should be asked
-in the proper place. NOT HERE! Flashing repart-block will erase
-all your eMMC, so make a backup before!
+The procedure is the same, but the ``--split`` argument is used with the
+``re-crypt.py``. The script will produce ``bct.img`` and ``ebt.img`` ready
+to flash.
-``repart-block.bin`` contains BCT and bootloader in encrypted state
-in form which can just be written RAW at the start of eMMC.
+Flashing U-Boot into the eMMC
+-----------------------------
+
+``DISCLAMER!`` All questions related to NvFlash should be asked in the proper
+place. NOT HERE! Flashing U-Boot will erase all eMMC, so make a backup before!
+
+Permanent installation can be performed either by using the nv3p protocol or by
+pre-loading just built U-Boot into RAM.
+
+Flashing with the NV3P protocol
+*******************************
+
+Nv3p is a custom Nvidia protocol used to recover bricked devices. Devices can
+enter it either by using ``wheelie`` with the correct ``blob.bin`` file or by
+pre-loading vendor bootloader with the Fusée Gelée.
+
+With nv3p, ``repart-block.bin`` is used. It contains BCT and a bootloader in
+encrypted state in form, which can just be written RAW at the start of eMMC.
.. code-block:: bash
$ wheelie --blob blob.bin
$ nvflash --resume --rawdevicewrite 0 1024 repart-block.bin
+When flashing is done, reboot the device.
+
+Flashing with a pre-loaded U-Boot
+*********************************
+
+U-Boot pre-loaded into RAM acts the same as when it was booted "cold". Currently
+U-Boot supports bootmenu entry fastboot, which allows to write a processed copy
+of U-Boot permanently into eMMC.
+
+While pre-loading U-Boot, hold the ``volume down`` button which will trigger
+the bootmenu. There, select ``fastboot`` using the volume and power buttons.
+After, on host PC, do:
+
+.. code-block:: bash
+
+ $ fastboot flash 0.1 bct.img
+ $ fastboot flash 0.2 ebt.img
+ $ fastboot reboot
+
+Device will reboot.
+
Boot
----
-After flashing ``repart-block.bin`` the device should reboot and turn
-itself off. This is normal behavior if no boot configuration is
-found.
+To boot Linux, U-Boot will look for an ``extlinux.conf`` on eMMC. Additionally,
+if the Volume Down button is pressed while booting, the device will enter
+bootmenu. Bootmenu contains entries to mount eMMC as mass storage, fastboot,
+reboot, reboot RCM, poweroff, enter U-Boot console and update bootloader (check
+the next chapter).
-To boot Linux, U-Boot will look for an ``extlinux.conf`` on MicroSD
-and then on eMMC. Additionally if Volume Down button is pressed
-while booting device will enter bootmenu. Bootmenu contains entries
-to mount MicroSD and eMMC as mass storage, fastboot, reboot, reboot
-RCM, poweroff, enter U-Boot console and update bootloader (check next
-chapter).
-
-Flashing ``repart-block.bin`` eliminates vendor restriction on eMMC
-and allows the user to use/partition it in any way the user desires.
+Flashing ``repart-block.bin`` eliminates vendor restrictions on eMMC and allows
+the user to use/partition it in any way the user desires.
Self Upgrading
--------------
-Place your ``u-boot-dtb-tegra.bin`` on the first partition of the
-eMMC (using ability of u-boot to mount it). Enter bootmenu, choose
-update bootloader option with Power button and U-Boot should update
-itself. Once the process is completed, U-Boot will ask to press any
-button to reboot.
+Place your ``u-boot-dtb-tegra.bin`` on the first partition of the eMMC (using
+ability of u-boot to mount it). Enter bootmenu, choose update bootloader option
+with Power button and U-Boot should update itself. Once the process is
+completed, U-Boot will ask to press any button to reboot.
diff --git a/doc/board/nxp/imx93_11x11_evk.rst b/doc/board/nxp/imx93_11x11_evk.rst
new file mode 100644
index 0000000..fb0ecf8
--- /dev/null
+++ b/doc/board/nxp/imx93_11x11_evk.rst
@@ -0,0 +1,68 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+imx93_11x11_evk
+=======================
+
+U-Boot for the NXP i.MX93 EVK on the 11x11mm board
+
+Quick Start
+-----------
+
+- Get and Build the ARM Trusted firmware
+- Get the DDR firmware
+- Get ahab-container.img
+- Build U-Boot
+- Boot
+
+Get and Build the ARM Trusted firmware
+--------------------------------------
+
+Note: srctree is U-Boot source directory
+Get ATF from: https://github.com/nxp-imx/imx-atf/
+branch: lf_v2.8
+
+.. code-block:: bash
+
+ $ unset LDFLAGS
+ $ make PLAT=imx93 bl31
+ $ cp build/imx93/release/bl31.bin $(srctree)
+
+Get the DDR firmware
+--------------------
+
+.. code-block:: bash
+
+ $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.21.bin
+ $ chmod +x firmware-imx-8.21.bin
+ $ ./firmware-imx-8.21.bin
+ $ cp firmware-imx-8.21/firmware/ddr/synopsys/lpddr4*.bin $(srctree)
+
+Get ahab-container.img
+---------------------------------------
+
+.. code-block:: bash
+
+ $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-sentinel-0.10.bin
+ $ chmod +x firmware-sentinel-0.10.bin
+ $ ./firmware-sentinel-0.10.bin
+ $ cp firmware-sentinel-0.10/mx93a0-ahab-container.img $(srctree)
+
+Build U-Boot
+------------
+
+.. code-block:: bash
+
+ $ export CROSS_COMPILE=aarch64-poky-linux-
+ $ make imx93_11x11_evk_defconfig
+ $ make
+
+Burn the flash.bin to MicroSD card offset 32KB:
+
+.. code-block:: bash
+
+ $ dd if=flash.bin of=/dev/sd[x] bs=1024 seek=32 conv=notrunc
+
+Boot
+----
+
+Set Boot switch to SD boot
diff --git a/doc/board/nxp/index.rst b/doc/board/nxp/index.rst
index 4514b89..3bd9ed3 100644
--- a/doc/board/nxp/index.rst
+++ b/doc/board/nxp/index.rst
@@ -11,6 +11,7 @@
imx8mp_evk
imx8mq_evk
imx8qxp_mek
+ imx93_11x11_evk
imxrt1020-evk
imxrt1050-evk
ls1046ardb
diff --git a/doc/board/phytec/imx8mm-phygate-tauri-l.rst b/doc/board/phytec/imx8mm-phygate-tauri-l.rst
new file mode 100644
index 0000000..28b614f
--- /dev/null
+++ b/doc/board/phytec/imx8mm-phygate-tauri-l.rst
@@ -0,0 +1,60 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+phyGATE-Tauri-L-i.MX 8M Mini
+============================
+
+The phyGATE-Tauri-L-i.MX 8M Mini with 2GB of main memory is supported.
+
+Quick Start
+-----------
+
+- Build the ARM Trusted firmware binary
+- Get ddr firmware
+- Build U-Boot
+- Boot
+
+Build the ARM Trusted firmware binary
+-------------------------------------
+
+.. code-block:: bash
+
+ $ git clone https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git
+ $ cd trusted-firmware-a
+ $ export CROSS_COMPILE=aarch64-linux-gnu
+ $ export IMX_BOOT_UART_BASE=0x30880000
+ $ make PLAT=imx8mm bl31
+
+Get the ddr firmware
+--------------------
+
+.. code-block:: bash
+
+ $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.23.bin
+ $ chmod +x firmware-imx-8.23.bin
+ $ ./firmware-imx-8.23.bin
+
+Build U-Boot for SD card
+------------------------
+
+Copy binaries
+^^^^^^^^^^^^^
+
+.. code-block:: bash
+
+ $ cp <TF-A dir>/build/imx8mm/release/bl31.bin .
+ $ cp firmware-imx-8.23/firmware/ddr/synopsys/lpddr4*.bin .
+
+Build U-Boot
+^^^^^^^^^^^^
+
+.. code-block:: bash
+
+ $ make imx8mm-phygate-tauri-l_defconfig
+ $ make flash.bin
+
+Flash SD card
+^^^^^^^^^^^^^
+
+.. code-block:: bash
+
+ $ sudo dd if=flash.bin of=/dev/sd[x] bs=1024 seek=33 conv=sync
diff --git a/doc/board/phytec/index.rst b/doc/board/phytec/index.rst
index a5b4420..965d40d 100644
--- a/doc/board/phytec/index.rst
+++ b/doc/board/phytec/index.rst
@@ -6,5 +6,7 @@
.. toctree::
:maxdepth: 2
+ imx8mm-phygate-tauri-l
+ phycore-am62x
phycore-imx8mm
phycore-imx8mp
diff --git a/doc/board/phytec/phycore-am62x.rst b/doc/board/phytec/phycore-am62x.rst
new file mode 100644
index 0000000..1d641a7
--- /dev/null
+++ b/doc/board/phytec/phycore-am62x.rst
@@ -0,0 +1,158 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. sectionauthor:: Wadim Egorov <w.egorov@phytec.de>
+
+phyCORE-AM62x
+=============
+
+The `phyCORE-AM62x <https://www.phytec.com/product/phycore-am62x>`_ is a
+SoM (System on Module) featuring TI's AM62x SoC. It can be used in combination
+with different carrier boards. This module can come with different sizes and
+models for DDR, eMMC, SPI NOR Flash and various SoCs from the AM62x family.
+
+A development Kit, called `phyBOARD-Lyra <https://www.phytec.com/product/phyboard-am62x>`_
+is used as a carrier board reference design around the AM62x SoM.
+
+Quickstart
+----------
+
+* Download sources and TI firmware blobs
+* Build Trusted Firmware-A
+* Build OP-TEE
+* Build U-Boot for the R5
+* Build U-Boot for the A53
+* Create bootable uSD Card
+* Boot
+
+Sources
+-------
+
+.. include:: ../ti/k3.rst
+ :start-after: .. k3_rst_include_start_boot_sources
+ :end-before: .. k3_rst_include_end_boot_sources
+
+Build procedure
+---------------
+
+Setup the environment variables:
+
+.. include:: ../ti/k3.rst
+ :start-after: .. k3_rst_include_start_common_env_vars_desc
+ :end-before: .. k3_rst_include_end_common_env_vars_desc
+
+.. include:: ../ti/k3.rst
+ :start-after: .. k3_rst_include_start_board_env_vars_desc
+ :end-before: .. k3_rst_include_end_board_env_vars_desc
+
+Set the variables corresponding to this platform:
+
+.. include:: ../ti/k3.rst
+ :start-after: .. k3_rst_include_start_common_env_vars_defn
+ :end-before: .. k3_rst_include_end_common_env_vars_defn
+.. code-block:: bash
+
+ $ export UBOOT_CFG_CORTEXR=phycore_am62x_r5_defconfig
+ $ export UBOOT_CFG_CORTEXA=phycore_am62x_a53_defconfig
+ $ export TFA_BOARD=lite
+ $ # we don't use any extra TFA parameters
+ $ unset TFA_EXTRA_ARGS
+ $ export OPTEE_PLATFORM=k3-am62x
+ $ export OPTEE_EXTRA_ARGS="CFG_WITH_SOFTWARE_PRNG=y"
+
+.. include:: ../ti/am62x_sk.rst
+ :start-after: .. am62x_evm_rst_include_start_build_steps
+ :end-before: .. am62x_evm_rst_include_end_build_steps
+
+uSD Card creation
+-----------------
+
+Use fdisk to partition the uSD card. The layout should look similar to:
+
+.. code-block:: bash
+
+ $ sudo fdisk -l /dev/mmcblk0
+ Disk /dev/mmcblk0: 7.56 GiB, 8120172544 bytes, 15859712 sectors
+ Units: sectors of 1 * 512 = 512 bytes
+ Sector size (logical/physical): 512 bytes / 512 bytes
+ I/O size (minimum/optimal): 512 bytes / 512 bytes
+ Disklabel type: dos
+ Disk identifier: 0x6583d9a3
+
+ Device Boot Start End Sectors Size Id Type
+ /dev/mmcblk0p1 * 2048 264191 262144 128M c W95 FAT32 (LBA)
+ /dev/mmcblk0p2 264192 1934953 1670762 815.8M 83 Linux
+
+
+Once partitioned, the boot partition has to be formatted with a FAT filesystem.
+Assuming the uSD card is `/dev/mmcblk0`:
+
+.. code-block:: bash
+
+ $ mkfs.vfat /dev/mmcblk0p1
+
+To boot from a micro SD card on a HSFS device simply copy the following
+artifacts to the FAT partition:
+
+* tiboot3.bin from R5 build as tiboot3.bin
+* tispl.bin_unsigned from Cortex-A build as tispl.bin
+* u-boot.img_unsigned from Cortex-A build as u-boot.img
+
+Boot
+----
+
+Put the uSD card in the slot on the board and apply power. Check the serial
+console for output.
+
+Flash to SPI NOR
+----------------
+
+Below commands can be used to flash the SPI NOR flash; assuming
+tiboot3.bin, tispl.bin and u-boot.img are stored on the uSD card.
+
+.. code-block:: bash
+
+ sf probe
+ fatload mmc 1 ${loadaddr} tiboot3.bin
+ sf update $loadaddr 0x0 $filesize
+ fatload mmc 1 ${loadaddr} tispl.bin
+ sf update $loadaddr 0x80000 $filesize
+ fatload mmc 1 ${loadaddr} u-boot.img
+ sf update $loadaddr 0x280000 $filesize
+
+
+Boot Modes
+----------
+
+The phyCORE-AM62x development kit supports booting from many different
+interfaces. By default, the development kit is set to boot from the micro-SD
+card. To change the boot device, DIP switches S5 and S6 can be used.
+Boot switches should be changed with power off.
+
+.. list-table:: Boot Modes
+ :widths: 16 16 16
+ :header-rows: 1
+
+ * - Switch Label
+ - SW5: 12345678
+ - SW6: 12345678
+
+ * - uSD
+ - 11000010
+ - 01000000
+
+ * - eMMC
+ - 11010010
+ - 00000000
+
+ * - OSPI
+ - 11010000
+ - 10000000
+
+ * - UART
+ - 11011100
+ - 00000000
+
+Further Information
+-------------------
+
+Please see :doc:`../ti/am62x_sk` chapter for further AM62 SoC related documentation
+and https://docs.phytec.com/phycore-am62x for vendor documentation.
diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst
index 18d0b6f..9fe69fc 100644
--- a/doc/board/rockchip/rockchip.rst
+++ b/doc/board/rockchip/rockchip.rst
@@ -117,6 +117,7 @@
- Edgeble Neural Compute Module 6B SoM - Neu6b (neu6b-io-rk3588)
- FriendlyElec NanoPC-T6 (nanopc-t6-rk3588)
- Pine64 QuartzPro64 (quartzpro64-rk3588)
+ - Turing Machines RK1 (turing-rk1-rk3588)
- Radxa ROCK 5A (rock5a-rk3588s)
- Radxa ROCK 5B (rock5b-rk3588)
- Xunlong Orange Pi 5 (orangepi-5-rk3588s)
diff --git a/doc/board/ti/k3.rst b/doc/board/ti/k3.rst
index a127215..3c33efd 100644
--- a/doc/board/ti/k3.rst
+++ b/doc/board/ti/k3.rst
@@ -33,6 +33,7 @@
am62ax_sk
am62x_sk
../beagle/am62x_beagleplay
+ ../phytec/phycore-am62x
../toradex/verdin-am62
am64x_evm
am65x_evm
@@ -104,6 +105,49 @@
For more information on the bootup process of your SoC, consult the
device specific boot flow documentation.
+Secure Boot
+-----------
+
+K3 HS-SE (High Security - Security Enforced) devices enforce an
+authenticated boot flow for secure boot. HS-FS (High Security - Field
+Securable) is the state of a K3 device before it has been eFused with
+customer security keys. In the HS-FS state the authentication still can
+function as in HS-SE but as there are no customer keys to verify the
+signatures against the authentication will pass for certificates signed
+with any key.
+
+Chain of trust
+^^^^^^^^^^^^^^
+
+1) Public ROM loads the tiboot3.bin (R5 SPL, TIFS)
+2) R5 SPL loads tispl.bin (ATF, OP-TEE, DM, SPL)
+3) SPL loads u-boot.img (U-Boot)
+4) U-Boot loads fitImage (Linux and DTBs)
+
+Steps 1-3 are all authenticated by either the Secure ROM or TIFS as the
+authenticating entity and step 4 uses U-boot standard mechanism for
+authenticating.
+
+All the authentication that are done for ROM/TIFS are done through x509
+certificates that are signed.
+
+Firewalls
+^^^^^^^^^
+
+1) Secure ROM comes up and sets up firewalls that are needed by itself
+2) TIFS will setup it's own firewalls to protect core system resources
+3) R5 SPL will remove any firewalls that are leftover from the Secure ROM stage
+ that are no longer required.
+4) Each stage beyond this: such as tispl.bin containing TFA/OPTEE uses OIDs to
+ set up firewalls to protect themselves (enforced by TIFS)
+5) TFA/OP-TEE can configure other firewalls at runtime if required as they
+ are already authenticated and firewalled off from illegal access.
+6) All later stages can setup or remove firewalls that have not been already
+ configured by previous stages, such as those created by TIFS, TFA, and OP-TEE.
+
+Futhur, firewalls have a lockdown bit in hardware that enforces the setting
+(and cannot be over-ridden) until the full system is reset.
+
Software Sources
----------------
@@ -248,6 +292,8 @@
the final `tiboot3.bin` binary. (or the `sysfw.itb` if your device
uses the split binary flow)
+.. _k3_rst_include_start_build_steps_spl_r5:
+
.. k3_rst_include_start_build_steps_spl_r5
.. prompt:: bash $
@@ -312,6 +358,8 @@
finished, we can jump back into U-Boot again, this time running on a
64bit core in the main domain.
+.. _k3_rst_include_start_build_steps_uboot:
+
.. k3_rst_include_start_build_steps_uboot
.. prompt:: bash $
@@ -320,6 +368,13 @@
make CROSS_COMPILE=$CC64 BINMAN_INDIRS=$LNX_FW_PATH \
BL31=$TFA_PATH/build/k3/$TFA_BOARD/release/bl31.bin \
TEE=$OPTEE_PATH/out/arm-plat-k3/core/tee-raw.bin
+
+.. note::
+ It is also possible to pick up a custom DM binary by adding TI_DM argument
+ pointing to the file. If not provided, it defaults to picking up the DM
+ binary from BINMAN_INDIRS. This is only applicable to devices that utilize
+ split firmware.
+
.. k3_rst_include_end_build_steps_uboot
At this point you should have every binary needed initialize both the
@@ -330,144 +385,212 @@
| `tispl.bin` for HS devices or `tispl.bin_unsigned` for GP devices
| `u-boot.img` for HS devices or `u-boot.img_unsigned` for GP devices
-Fit Signature Signing
+FIT signature signing
---------------------
-K3 Platforms have fit signature signing enabled by default on their primary
-platforms. Here we'll take an example for creating fit image for J721e platform
+K3 platforms have FIT signature signing enabled by default on their primary
+platforms. Here we'll take an example for creating FIT Image for J721E platform
and the same can be extended to other platforms
-1. Describing FIT source
+Pre-requisites:
- .. code-block:: bash
+* U-boot build (:ref:`U-boot build <k3_rst_include_start_build_steps_spl_r5>`)
+* Linux Image and Linux DTB prebuilt
+
+Describing FIT source
+^^^^^^^^^^^^^^^^^^^^^
+
+FIT Image is a packed structure containing binary blobs and configurations.
+The Kernel FIT Image that we have has Kernel Image, DTB and the DTBOs. It
+supports packing multiple images and configurations that allow you to
+choose any configuration at runtime to boot from.
+
+.. code-block::
/dts-v1/;
/ {
- description = "Kernel fitImage for j721e-hs-evm";
- #address-cells = <1>;
+ description = "FIT Image description";
+ #address-cells = <1>;
- images {
- kernel-1 {
- description = "Linux kernel";
- data = /incbin/("Image");
- type = "kernel";
- arch = "arm64";
- os = "linux";
- compression = "none";
- load = <0x80080000>;
- entry = <0x80080000>;
- hash-1 {
- algo = "sha512";
- };
+ images {
+ [image-1]
+ [image-2]
+ [fdt-1]
+ [fdt-2]
+ }
- };
- fdt-ti_k3-j721e-common-proc-board.dtb {
- description = "Flattened Device Tree blob";
- data = /incbin/("k3-j721e-common-proc-board.dtb");
- type = "flat_dt";
- arch = "arm64";
- compression = "none";
- load = <0x83000000>;
- hash-1 {
- algo = "sha512";
- };
+ configurations {
+ default = <conf-1>
+ [conf-1: image-1,fdt-1]
+ [conf-2: image-2,fdt-1]
+ }
+ }
- };
+* Sample Images
+
+.. code-block::
+
+ kernel-1 {
+ description = "Linux kernel";
+ data = /incbin/("linux.bin");
+ type = "kernel";
+ arch = "arm64";
+ os = "linux";
+ compression = "gzip";
+ load = <0x81000000>;
+ entry = <0x81000000>;
+ hash-1 {
+ algo = "sha512";
};
-
- configurations {
- default = "conf-ti_k3-j721e-common-proc-board.dtb";
- conf-ti_k3-j721e-common-proc-board.dtb {
- description = "Linux kernel, FDT blob";
- fdt = "fdt-ti_k3-j721e-common-proc-board.dtb";
- kernel = "kernel-1";
- signature-1 {
- algo = "sha512,rsa4096";
- key-name-hint = "custMpk";
- sign-images = "kernel", "fdt";
- };
- };
+ };
+ fdt-ti_k3-j721e-common-proc-board.dtb {
+ description = "Flattened Device Tree blob";
+ data = /incbin/("arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dtb");
+ type = "flat_dt";
+ arch = "arm64";
+ compression = "none";
+ load = <0x83000000>;
+ hash-1 {
+ algo = "sha512";
+ };
+ };
+ # Optional images
+ fdt-ti_k3-j721e-evm-virt-mac-client.dtbo {
+ description = "Flattened Device Tree blob";
+ data = /incbin/("arch/arm64/boot/dts/ti/k3-j721e-evm-virt-mac-client.dtbo");
+ type = "flat_dt";
+ arch = "arm64";
+ compression = "none";
+ load = <0x83080000>;
+ hash-1 {
+ algo = "sha512";
};
};
- You would require to change the '/incbin/' lines to point to the respective
- files in your local machine and the key-name-hint also needs to be changed
- if you are using some other key other than the TI dummy key that we are
- using for this example.
+.. note::
-2. Compile U-boot for the respective board
+ Change the path in data variables to point to the respective files in your
+ local machine. For e.g change "linux.bin" to "<path-to-kernel-image>".
-.. include:: k3.rst
- :start-after: .. k3_rst_include_start_build_steps_uboot
- :end-before: .. k3_rst_include_end_build_steps_uboot
+For enabling usage of FIT signature, add the signature node to the
+corresponding configuration node as follows.
+
+* Sample Configurations
+
+.. code-block::
+
+ conf-ti_k3-j721e-common-proc-board.dtb {
+ description = "Linux kernel, FDT blob";
+ fdt = "fdt-ti_k3-j721e-common-proc-board.dtb";
+ kernel = "kernel-1";
+ signature-1 {
+ algo = "sha512,rsa4096";
+ key-name-hint = "custMpk";
+ sign-images = "kernel", "fdt";
+ };
+ };
+ # Optional configurations
+ conf-ti_k3-j721e-evm-virt-mac-client.dtbo {
+ description = "FDTO blob";
+ fdt = "fdt-ti_k3-j721e-evm-virt-mac-client.dtbo";
+
+ signature-1 {
+ algo = "sha512,rsa4096";
+ key-name-hint = "custMpk";
+ sign-images = "fdt";
+ };
+ };
+
+Specify all images you need the signature to authenticate as a part of
+sign-images. The key-name-hint needs to be changed if you are using some
+other key other than the TI dummy key that we are using for this example.
+It should be the name of the file containing the keys.
.. note::
- The changes only affect a72 binaries so the example just builds that
+ Generating new set of keys:
-3. Sign the fit image and embed the dtb in uboot
+ .. prompt:: bash $
- Now once the build is done, you'll have a dtb for your board that you'll
- be passing to mkimage for signing the fitImage and embedding the key in
- the u-boot dtb.
+ mkdir keys
+ openssl genpkey -algorithm RSA -out keys/dev.key \
+ -pkeyopt rsa_keygen_bits:4096 -pkeyopt rsa_keygen_pubexp:65537
+ openssl req -batch -new -x509 -key keys/dev.key -out keys/dev.crt
- .. prompt:: bash $
-
- mkimage -r -f fitImage.its -k $UBOOT_PATH/board/ti/keys -K
- $UBOOT_PATH/build/a72/dts/dt.dtb
-
- For signing a secondary platform, pass the -K parameter to that DTB
-
- .. prompt:: bash $
-
- mkimage -f fitImage.its -k $UBOOT_PATH/board/ti/keys -K
- $UBOOT_PATH/build/a72/arch/arm/dts/k3-j721e-sk.dtb
-
- .. note::
-
- If changing `CONFIG_DEFAULT_DEVICE_TREE` to the secondary platform,
- binman changes would also be required so that correct dtb gets packaged.
-
- .. code-block:: bash
-
- diff --git a/arch/arm/dts/k3-j721e-binman.dtsi b/arch/arm/dts/k3-j721e-binman.dtsi
- index 673be646b1e3..752fa805fe8d 100644
- --- a/arch/arm/dts/k3-j721e-binman.dtsi
- +++ b/arch/arm/dts/k3-j721e-binman.dtsi
- @@ -299,8 +299,8 @@
- #define SPL_J721E_SK_DTB "spl/dts/k3-j721e-sk.dtb"
-
- #define UBOOT_NODTB "u-boot-nodtb.bin"
- -#define J721E_EVM_DTB "u-boot.dtb"
- -#define J721E_SK_DTB "arch/arm/dts/k3-j721e-sk.dtb"
- +#define J721E_EVM_DTB "arch/arm/dts/k3-j721e-common-proc-board.dtb"
- +#define J721E_SK_DTB "u-boot.dtb"
-
-5. Rebuilt u-boot
-
- This is required so that the modified dtb gets updated in u-boot.img
-
-.. include:: k3.rst
- :start-after: .. k3_rst_include_start_build_steps_uboot
- :end-before: .. k3_rst_include_end_build_steps_uboot
-
-6. (Optional) Enabled FIT_SIGNATURE_ENFORCED
-
- By default u-boot will boot up the fit image without any authentication as
- such if the public key is not embedded properly, to check if the public key
- nodes are proper you can enable FIT_SIGNATURE_ENFORCED that would not rely
- on the dtb for anything else then the signature node for checking the fit
- image, rest other things will be enforced such as the property of
- required-keys. This is not an extensive check so do manual checks also
-
- This is by default enabled for devices with TI_SECURE_DEVICE enabled.
+Generating the fitImage
+^^^^^^^^^^^^^^^^^^^^^^^
.. note::
- The devices now also have distroboot enabled so if the fit image doesn't
- work then the fallback to normal distroboot will be there on hs devices,
- this will need to be explicitly disabled by changing the boot_targets.
+ For signing a secondary platform like SK boards, you'll require
+ additional steps
+
+ - Change the CONFIG_DEFAULT_DEVICE_TREE
+
+ For e.g
+
+ .. code-block::
+
+ diff --git a/configs/j721e_evm_a72_defconfig b/configs/j721e_evm_a72_defconfig
+ index a5c1df7e0054..6d0126d955ef 100644
+ --- a/configs/j721e_evm_a72_defconfig
+ +++ b/configs/j721e_evm_a72_defconfig
+ @@ -13,7 +13,7 @@ CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80480000
+ CONFIG_ENV_SIZE=0x20000
+ CONFIG_DM_GPIO=y
+ CONFIG_SPL_DM_SPI=y
+ -CONFIG_DEFAULT_DEVICE_TREE="k3-j721e-common-proc-board"
+ +CONFIG_DEFAULT_DEVICE_TREE="k3-j721e-sk"
+ CONFIG_SPL_TEXT_BASE=0x80080000
+ CONFIG_DM_RESET=y
+ CONFIG_SPL_MMC=y
+
+ - Change the binman nodes to package u-boot.dtb for the correct set of platform
+
+ For e.g
+
+ .. code-block::
+
+ diff --git a/arch/arm/dts/k3-j721e-binman.dtsi b/arch/arm/dts/k3-j721e-binman.dtsi
+ index 673be646b1e3..752fa805fe8d 100644
+ --- a/arch/arm/dts/k3-j721e-binman.dtsi
+ +++ b/arch/arm/dts/k3-j721e-binman.dtsi
+ @@ -299,8 +299,8 @@
+ #define SPL_J721E_SK_DTB "spl/dts/k3-j721e-sk.dtb"
+
+ #define UBOOT_NODTB "u-boot-nodtb.bin"
+ -#define J721E_EVM_DTB "u-boot.dtb"
+ -#define J721E_SK_DTB "arch/arm/dts/k3-j721e-sk.dtb"
+ +#define J721E_EVM_DTB "arch/arm/dts/k3-j721e-common-proc-board.dtb"
+ +#define J721E_SK_DTB "u-boot.dtb"
+
+This step will embed the public key in the u-boot.dtb file that was already
+built during the initial u-boot build.
+
+.. prompt:: bash $
+
+ mkimage -r -f fitImage.its -k $UBOOT_PATH/board/ti/keys -K $UBOOT_PATH/build/$ARMV8/dts/dt.dtb fitImage
+
+.. note::
+
+ If you have another set of keys then change the -k argument to point to
+ the folder where your keys are present, the build requires the presence
+ of both .key and .crt file.
+
+Build u-boot again
+^^^^^^^^^^^^^^^^^^
+
+The updated u-boot.dtb needs to be packed in u-boot.img for authentication
+so rebuild U-boot ARMV8 without changing any parameters.
+Refer (:ref:`U-boot ARMV8 build <k3_rst_include_start_build_steps_uboot>`)
+
+.. note::
+
+ The devices now also have distroboot enabled so if the FIT image doesn't
+ work then the fallback to normal distroboot will be there on HS devices.
+ This will need to be explicitly disabled by changing the boot_targets to
+ disallow fallback during testing.
Saving environment
------------------
diff --git a/doc/board/variscite/imx93_var_som.rst b/doc/board/variscite/imx93_var_som.rst
new file mode 100644
index 0000000..4951afd
--- /dev/null
+++ b/doc/board/variscite/imx93_var_som.rst
@@ -0,0 +1,68 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+imx93_var_som
+=============
+
+U-Boot for the Variscite VAR-SOM-MX93 Symphony evaluation board
+
+Quick Start
+-----------
+
+- Get and Build the ARM Trusted firmware
+- Get the DDR firmware
+- Get ahab-container.img
+- Build U-Boot
+- Boot
+
+Get and Build the ARM Trusted firmware
+--------------------------------------
+
+Note: srctree is U-Boot source directory
+Get ATF from: https://github.com/nxp-imx/imx-atf/
+branch: lf_v2.8
+
+.. code-block:: bash
+
+ $ unset LDFLAGS
+ $ make PLAT=imx93 bl31
+ $ cp build/imx93/release/bl31.bin $(srctree)
+
+Get the DDR firmware
+--------------------
+
+.. code-block:: bash
+
+ $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.21.bin
+ $ chmod +x firmware-imx-8.21.bin
+ $ ./firmware-imx-8.21.bin
+ $ cp firmware-imx-8.21/firmware/ddr/synopsys/lpddr4*.bin $(srctree)
+
+Get ahab-container.img
+----------------------
+
+.. code-block:: bash
+
+ $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-sentinel-0.10.bin
+ $ chmod +x firmware-sentinel-0.10.bin
+ $ ./firmware-sentinel-0.10.bin
+ $ cp firmware-sentinel-0.10/mx93a0-ahab-container.img $(srctree)
+
+Build U-Boot
+------------
+
+.. code-block:: bash
+
+ $ export CROSS_COMPILE=aarch64-poky-linux-
+ $ make imx93_var_som_defconfig
+ $ make
+
+Burn the flash.bin to MicroSD card offset 32KB:
+
+.. code-block:: bash
+
+ $ dd if=flash.bin of=/dev/sd[x] bs=1024 seek=32 conv=notrunc
+
+Boot
+----
+
+Set Boot switch to SD boot
diff --git a/doc/board/variscite/index.rst b/doc/board/variscite/index.rst
index 4186896..f84ebe7 100644
--- a/doc/board/variscite/index.rst
+++ b/doc/board/variscite/index.rst
@@ -7,3 +7,4 @@
:maxdepth: 2
imx8mn_var_som
+ imx93_var_som
diff --git a/doc/build/clang.rst b/doc/build/clang.rst
index cc26550..09bb988 100644
--- a/doc/build/clang.rst
+++ b/doc/build/clang.rst
@@ -11,14 +11,6 @@
supported inline assembly is needed to get and set the r9 or x18 value. This
leads to larger code then strictly necessary, but at least works.
-**NOTE:** target compilation only work for _some_ ARM boards at the moment.
-Also AArch64 is not supported currently due to a lack of private libgcc
-support. Boards which reassign gd in c will also fail to compile, but there is
-in no strict reason to do so in the ARM world, since crt0.S takes care of this.
-These assignments can be avoided by changing the init calls but this is not in
-mainline yet.
-
-
Debian based
------------
@@ -28,14 +20,20 @@
sudo apt-get install clang
-Note that we still use binutils for some tools so we must continue to set
-CROSS_COMPILE. To compile U-Boot with Clang on Linux without IAS use e.g.
+We make use of the CROSS_COMPILE variable to derive the build target which is
+passed as the --target parameter to clang.
+
+The CROSS_COMPILE variable further determines the paths to other build
+tools. As assembler we use the binary pointed to by '$(CROSS_COMPILE)as'
+instead of the LLVM integrated assembler (IAS).
+
+Here is an example demonstrating building U-Boot for the Raspberry Pi 2
+using clang:
.. code-block:: bash
make HOSTCC=clang rpi_2_defconfig
- make HOSTCC=clang CROSS_COMPILE=arm-linux-gnueabi- \
- CC="clang -target arm-linux-gnueabi" -j8
+ make HOSTCC=clang CROSS_COMPILE=arm-linux-gnueabi- CC=clang -j8
It can also be used to compile sandbox:
diff --git a/doc/build/documentation.rst b/doc/build/documentation.rst
index 20b0fef..098c96a 100644
--- a/doc/build/documentation.rst
+++ b/doc/build/documentation.rst
@@ -37,7 +37,7 @@
# Display the documentation in a graphical web browser
x-www-browser doc/output/index.html
-The HTML documentation is published at https://u-boot.readthedocs.io. The build
+The HTML documentation is published at https://docs.u-boot.org. The build
process for that site is controlled by the file *.readthedocs.yml*.
Infodoc documentation
diff --git a/doc/chromium/files/chromebook_jerry.its b/doc/chromium/files/chromebook_jerry.its
index 7505a20..02e5e13 100644
--- a/doc/chromium/files/chromebook_jerry.its
+++ b/doc/chromium/files/chromebook_jerry.its
@@ -15,7 +15,7 @@
load = <0>;
entry = <0>;
hash-2 {
- algo = "sha1";
+ algo = "sha256";
};
};
@@ -26,7 +26,7 @@
arch = "arm";
compression = "none";
hash-1{
- algo = "sha1";
+ algo = "sha256";
};
};
};
diff --git a/doc/chromium/files/nyan-big.its b/doc/chromium/files/nyan-big.its
index bd41291..60bdffb 100644
--- a/doc/chromium/files/nyan-big.its
+++ b/doc/chromium/files/nyan-big.its
@@ -15,7 +15,7 @@
load = <0>;
entry = <0>;
hash-2 {
- algo = "sha1";
+ algo = "sha256";
};
};
@@ -26,7 +26,7 @@
arch = "arm";
compression = "none";
hash-1{
- algo = "sha1";
+ algo = "sha256";
};
};
};
diff --git a/doc/conf.py b/doc/conf.py
index 5e2ff1c..c9138a5 100644
--- a/doc/conf.py
+++ b/doc/conf.py
@@ -228,7 +228,7 @@
try:
import sphinx_rtd_theme
html_theme = 'sphinx_rtd_theme'
- html_theme_path = [sphinx_rtd_theme.get_html_theme_path()]
+ extensions.append('sphinx_rtd_theme')
except ImportError:
sys.stderr.write('Warning: The Sphinx \'sphinx_rtd_theme\' HTML theme was not found. Make sure you have the theme installed to produce pretty HTML output. Falling back to the default theme.\n')
diff --git a/doc/develop/bloblist.rst b/doc/develop/bloblist.rst
index 81643c7..2843103 100644
--- a/doc/develop/bloblist.rst
+++ b/doc/develop/bloblist.rst
@@ -14,6 +14,8 @@
For the design goals of bloblist, please see the comments at the top of the
`bloblist.h` header file.
+Bloblist is an implementation with the `Firmware Handoff`_ protocol.
+
Passing state through the boot process
--------------------------------------
@@ -99,7 +101,7 @@
-----------------
.. kernel-doc:: include/bloblist.h
-
+.. _`Firmware Handoff`: https://github.com/FirmwareHandoff/firmware_handoff
Simon Glass
sjg@chromium.org
diff --git a/doc/develop/bootstd.rst b/doc/develop/bootstd.rst
index 51cd573..496e24b 100644
--- a/doc/develop/bootstd.rst
+++ b/doc/develop/bootstd.rst
@@ -247,7 +247,7 @@
Name of the flattened device tree (FDT) file to load, e.g.
"rockchip/rk3399-rockpro64.dtb"
-fdtaddr_addr_r
+fdt_addr_r
Address at which to load the FDT, e.g. 0x01f00000
fdtoverlay_addr_r (needed if overlays are used)
diff --git a/doc/develop/devicetree/control.rst b/doc/develop/devicetree/control.rst
index cbb65c9..11c92d4 100644
--- a/doc/develop/devicetree/control.rst
+++ b/doc/develop/devicetree/control.rst
@@ -108,6 +108,9 @@
devicetree at runtime, for example if an earlier bootloader stage creates
it and passes it to U-Boot.
+If CONFIG_BLOBLIST is defined, the devicetree may come from a bloblist passed
+from a previous stage, if present.
+
If CONFIG_SANDBOX is defined, then it will be read from a file on
startup. Use the -d flag to U-Boot to specify the file to read, -D for the
default and -T for the test devicetree, used to run sandbox unit tests.
diff --git a/doc/develop/release_cycle.rst b/doc/develop/release_cycle.rst
index 600bf62..2773313 100644
--- a/doc/develop/release_cycle.rst
+++ b/doc/develop/release_cycle.rst
@@ -48,13 +48,14 @@
Current Status
--------------
-* U-Boot v2023.10 was released on Mon 02 October 2023.
+* U-Boot v2024.01 was released on Mon 08 January 2024.
-* The Merge Window for the next release (v2024.01) is **closed**.
+* The Merge Window for the next release (v2024.04) is **open** until the -rc1
+ release on Mon 29 January 2024.
* The next branch is now **closed**.
-* Release "v2024.01" is scheduled for 08 January 2024.
+* Release "v2024.04" is scheduled for 02 April 2024.
Future Releases
---------------
@@ -62,31 +63,29 @@
.. The following commented out dates are for when release candidates are
planned to be tagged.
-For the next scheduled release, release candidates were made on::
+.. For the next scheduled release, release candidates were made on::
-* U-Boot v2024.01-rc1 was released on Mon 23 October 2023.
+.. * U-Boot v2024.01-rc1 was released on Mon 29 January 2024.
-* U-Boot v2024.01-rc2 was released on Mon 06 November 2023.
+.. * U-Boot v2024.01-rc2 was released on Mon 12 February 2024.
-* U-Boot v2024.01-rc3 was released on Mon 20 November 2023.
+.. * U-Boot v2024.01-rc3 was released on Mon 26 February 2024.
-.. * U-Boot v2024.01-rc4 was released on Mon 04 December 2023.
+.. * U-Boot v2024.01-rc4 was released on Mon 11 March 2024.
-.. * U-Boot v2024.01-rc5 was released on Mon 18 December 2023.
-
-.. * U-Boot v2024.01-rc6 was released on Tue 02 January 2024.
+.. * U-Boot v2024.01-rc5 was released on Mon 25 March 2024.
Please note that the following dates are planned only and may be deviated from
as needed.
-* "v2024.01": end of MW = Mon, Oct 23, 2023; release = Mon, Jan 08, 2024
-
* "v2024.04": end of MW = Mon, Jan 29, 2024; release = Tue, Apr 02, 2024
* "v2024.07": end of MW = Mon, Apr 22, 2024; release = Mon, Jul 01, 2024
* "v2024.10": end of MW = Mon, Jul 22, 2024; release = Mon, Oct 07, 2024
+* "v2025.01": end of MW = Mon, Oct 21, 2024; release = Mon, Jan 06, 2025
+
Previous Releases
-----------------
@@ -94,6 +93,8 @@
<https://source.denx.de/u-boot/gitdm>`_, which was originally created by
Jonathan Corbet.
+* :doc:`statistics/u-boot-stats-v2024.01` which was released on 08 January 2024.
+
* :doc:`statistics/u-boot-stats-v2023.10` which was released on 02 October 2023.
* :doc:`statistics/u-boot-stats-v2023.07` which was released on 10 July 2023.
diff --git a/doc/develop/sending_patches.rst b/doc/develop/sending_patches.rst
index ba73d0d..3f25b1d 100644
--- a/doc/develop/sending_patches.rst
+++ b/doc/develop/sending_patches.rst
@@ -121,7 +121,7 @@
* For new features: a description of the feature and your implementation.
* Additional comments which you don't want included in U-Boot's history can be
- included below the first "---" in the message body.
+ included below the first "``---``" in the message body.
* If your description gets too long, that's a strong indication that you should
split up your patch.
@@ -253,7 +253,7 @@
* Please make sure to keep a "change log", i.e. a description of what you have
changed compared to previous versions of this patch. This change log should
- be added below the "---" line in the patch, which starts the "comment
+ be added below the "``---``" line in the patch, which starts the "comment
section", i.e. which contains text that does not get included into the
actual commit message.
Note: it is *not* sufficient to provide a change log in some cover letter
@@ -363,7 +363,7 @@
* Awaiting Upstream
- * Superseeded
+ * Superseded
* Deferred
@@ -399,7 +399,7 @@
and has not merged yet to master, or has queued the patch up to be submitted
to be merged, but has not yet.
-* Superseeded: Patches are marked as 'superseeded' when the poster submits a
+* Superseded: Patches are marked as 'superseded' when the poster submits a
new version of these patches.
* Deferred: Deferred usually means the patch depends on something else that
diff --git a/doc/develop/statistics/u-boot-stats-v2024.01.rst b/doc/develop/statistics/u-boot-stats-v2024.01.rst
new file mode 100644
index 0000000..4beb21f
--- /dev/null
+++ b/doc/develop/statistics/u-boot-stats-v2024.01.rst
@@ -0,0 +1,844 @@
+:orphan:
+
+Release Statistics for U-Boot v2024.01
+======================================
+
+* Processed 1564 changesets from 191 developers
+
+* 25 employers found
+
+* A total of 100266 lines added, 38766 removed (delta 61500)
+
+.. table:: Developers with the most changesets
+ :widths: auto
+
+ ==================================== =====
+ Name Count
+ ==================================== =====
+ Simon Glass 273 (17.5%)
+ Marek Vasut 194 (12.4%)
+ Michal Simek 64 (4.1%)
+ Heinrich Schuchardt 51 (3.3%)
+ Tom Rini 50 (3.2%)
+ Jonas Karlman 46 (2.9%)
+ Sean Anderson 38 (2.4%)
+ Svyatoslav Ryhel 36 (2.3%)
+ Nishanth Menon 35 (2.2%)
+ Andre Przywara 33 (2.1%)
+ Paul Barker 32 (2.0%)
+ Venkatesh Yadav Abbarapu 28 (1.8%)
+ Bryan Brattlof 26 (1.7%)
+ Sughosh Ganu 21 (1.3%)
+ AKASHI Takahiro 20 (1.3%)
+ Bin Meng 19 (1.2%)
+ Alexey Romanov 19 (1.2%)
+ Chanho Park 18 (1.2%)
+ Dario Binacchi 16 (1.0%)
+ Sam Protsenko 15 (1.0%)
+ Dan Carpenter 15 (1.0%)
+ Tim Harvey 14 (0.9%)
+ Fabio Estevam 14 (0.9%)
+ Roger Quadros 13 (0.8%)
+ Rasmus Villemoes 13 (0.8%)
+ Randolph 11 (0.7%)
+ Tony Dinh 11 (0.7%)
+ Alexander Dahl 11 (0.7%)
+ Igor Prusov 9 (0.6%)
+ Ilias Apalodimas 9 (0.6%)
+ Hector Martin 9 (0.6%)
+ Samuel Holland 9 (0.6%)
+ Johan Jonker 9 (0.6%)
+ Matthias Schiffer 9 (0.6%)
+ Neha Malcom Francis 8 (0.5%)
+ Chris Packham 8 (0.5%)
+ Joao Marcos Costa 8 (0.5%)
+ Jan Kiszka 7 (0.4%)
+ Jim Liu 7 (0.4%)
+ Yang Xiwen 7 (0.4%)
+ Marcel Ziswiler 7 (0.4%)
+ Siddharth Vadapalli 7 (0.4%)
+ Gatien Chevallier 7 (0.4%)
+ Neil Armstrong 6 (0.4%)
+ Masahisa Kojima 6 (0.4%)
+ Udit Kumar 6 (0.4%)
+ Eddie James 6 (0.4%)
+ Sam Edwards 6 (0.4%)
+ Teresa Remmet 6 (0.4%)
+ Manorit Chawdhry 6 (0.4%)
+ Laurentiu Tudor 6 (0.4%)
+ Joshua Watt 6 (0.4%)
+ Mattijs Korpershoek 5 (0.3%)
+ Shantur Rathore 5 (0.3%)
+ Patrick Delaunay 5 (0.3%)
+ Artur Rojek 5 (0.3%)
+ Mikhail Kshevetskiy 5 (0.3%)
+ FUKAUMI Naoki 5 (0.3%)
+ Ashok Reddy Soma 5 (0.3%)
+ Mark Kettenis 4 (0.3%)
+ John Clark 4 (0.3%)
+ Philip Oberfichtner 4 (0.3%)
+ Milan P. Stanić 4 (0.3%)
+ Tom Fitzhenry 4 (0.3%)
+ Josua Mayer 4 (0.3%)
+ Elaine Zhang 4 (0.3%)
+ Sébastien Szymanski 4 (0.3%)
+ Andrew Davis 4 (0.3%)
+ Manoj Sai 4 (0.3%)
+ Alper Nebi Yasak 4 (0.3%)
+ Emanuele Ghidoli 3 (0.2%)
+ Alexander Gendin 3 (0.2%)
+ Hiago De Franco 3 (0.2%)
+ Andrejs Cainikovs 3 (0.2%)
+ Yu Chien Peter Lin 3 (0.2%)
+ Quentin Schulz 3 (0.2%)
+ Tim Lunn 3 (0.2%)
+ Patrice Chotard 3 (0.2%)
+ Algapally Santosh Sagar 3 (0.2%)
+ Abdellatif El Khlifi 3 (0.2%)
+ Fedor Ross 3 (0.2%)
+ Reid Tonking 3 (0.2%)
+ Massimo Pegorer 3 (0.2%)
+ Frank Wunderlich 3 (0.2%)
+ Fabrice Gasnier 3 (0.2%)
+ Thomas Mittelstaedt 3 (0.2%)
+ Baruch Siach 2 (0.1%)
+ Peter Robinson 2 (0.1%)
+ Hugo Villeneuve 2 (0.1%)
+ Janne Grunau 2 (0.1%)
+ Simon Holesch 2 (0.1%)
+ Dylan Corrales 2 (0.1%)
+ Oleksandr Suvorov 2 (0.1%)
+ Tejas Bhumkar 2 (0.1%)
+ Amit Kumar Mahapatra 2 (0.1%)
+ Robert Marko 2 (0.1%)
+ Sean Edmond 2 (0.1%)
+ Maksim Kiselev 2 (0.1%)
+ Wei Chen 2 (0.1%)
+ Francois Berder 2 (0.1%)
+ Lukas Funke 2 (0.1%)
+ Lars Feyaerts 2 (0.1%)
+ Love Kumar 2 (0.1%)
+ Suman Anna 2 (0.1%)
+ Laurent Pinchart 2 (0.1%)
+ Harald Seiler 2 (0.1%)
+ Neal Frager 2 (0.1%)
+ Shiji Yang 2 (0.1%)
+ Anthony Loiseau 1 (0.1%)
+ Moritz Fischer 1 (0.1%)
+ Miquel Raynal 1 (0.1%)
+ Mikhail Kalashnikov 1 (0.1%)
+ Stephen Graf 1 (0.1%)
+ Chukun Pan 1 (0.1%)
+ Weizhao Ouyang 1 (0.1%)
+ Stefan Roese 1 (0.1%)
+ Cong Dang 1 (0.1%)
+ Jonathan Corbet 1 (0.1%)
+ Nikita Yushchenko 1 (0.1%)
+ John Keeping 1 (0.1%)
+ Ludwig Kormann 1 (0.1%)
+ Igor Opaniuk 1 (0.1%)
+ Bhupesh Sharma 1 (0.1%)
+ Ibai Erkiaga 1 (0.1%)
+ Piyush Mehta 1 (0.1%)
+ Linus Walleij 1 (0.1%)
+ Dmitry Rokosov 1 (0.1%)
+ Frank de Brabander 1 (0.1%)
+ Dylan Hung 1 (0.1%)
+ Ley Foon Tan 1 (0.1%)
+ Caleb Connolly 1 (0.1%)
+ Maxim Cournoyer 1 (0.1%)
+ Yong-Xuan Wang 1 (0.1%)
+ Eugen Hristev 1 (0.1%)
+ Nathan Barrett-Morrison 1 (0.1%)
+ Emekcan Aras 1 (0.1%)
+ Vishal Mahaveer 1 (0.1%)
+ Wojciech Nizinski 1 (0.1%)
+ Michel Alex 1 (0.1%)
+ Martin Fäcknitz 1 (0.1%)
+ Marek Behún 1 (0.1%)
+ Andrey Skvortsov 1 (0.1%)
+ Yurii Monakov 1 (0.1%)
+ Ricardo Pardini 1 (0.1%)
+ Matwey V. Kornilov 1 (0.1%)
+ Guochun Huang 1 (0.1%)
+ Okhunjon Sobirjonov 1 (0.1%)
+ Mayuresh Chitale 1 (0.1%)
+ Guillaume La Roque 1 (0.1%)
+ Ye Li 1 (0.1%)
+ Alice Guo 1 (0.1%)
+ Joao Paulo Goncalves 1 (0.1%)
+ Eduard Strehlau 1 (0.1%)
+ Andrej Rosano 1 (0.1%)
+ Ricardo Salveti 1 (0.1%)
+ Michael Scott 1 (0.1%)
+ Dominik Haller 1 (0.1%)
+ Nikhil M Jain 1 (0.1%)
+ Roman Azarenko 1 (0.1%)
+ Nicolò Veronese 1 (0.1%)
+ Andrii Chepurnyi 1 (0.1%)
+ Han Xu 1 (0.1%)
+ Patryk Biel 1 (0.1%)
+ Polak, Leszek 1 (0.1%)
+ Tanmay Shah 1 (0.1%)
+ shengfei Xu 1 (0.1%)
+ Joseph Chen 1 (0.1%)
+ Anatolij Gustschin 1 (0.1%)
+ Kuan Lim Lee 1 (0.1%)
+ Roger Knecht 1 (0.1%)
+ Jesse Taube 1 (0.1%)
+ Rong Tao 1 (0.1%)
+ Andy Shevchenko 1 (0.1%)
+ Troy Kisky 1 (0.1%)
+ Thippeswamy Havalige 1 (0.1%)
+ Srinivas Neeli 1 (0.1%)
+ Saeed Nowshadi 1 (0.1%)
+ Maxim Kochetkov 1 (0.1%)
+ Christian Taedcke 1 (0.1%)
+ Trevor Woerner 1 (0.1%)
+ Nicolas Frattaroli 1 (0.1%)
+ Li Hua Qian 1 (0.1%)
+ Robert Nelson 1 (0.1%)
+ Łukasz Stelmach 1 (0.1%)
+ Elena Popa 1 (0.1%)
+ Naveen Kumar Chaudhary 1 (0.1%)
+ Kevin Chen 1 (0.1%)
+ Sergei Antonov 1 (0.1%)
+ Jason Kacines 1 (0.1%)
+ Ilya Lukin 1 (0.1%)
+ Mihai Sain 1 (0.1%)
+ ==================================== =====
+
+
+.. table:: Developers with the most changed lines
+ :widths: auto
+
+ ==================================== =====
+ Name Count
+ ==================================== =====
+ Simon Glass 11496 (9.8%)
+ Marek Vasut 8067 (6.8%)
+ Michal Simek 7518 (6.4%)
+ Laurentiu Tudor 6213 (5.3%)
+ Paul Barker 5361 (4.5%)
+ Andre Przywara 4529 (3.8%)
+ Tim Harvey 4234 (3.6%)
+ Nishanth Menon 3762 (3.2%)
+ Jonas Karlman 3755 (3.2%)
+ Dario Binacchi 3615 (3.1%)
+ AKASHI Takahiro 3492 (3.0%)
+ Robert Nelson 3243 (2.8%)
+ FUKAUMI Naoki 2908 (2.5%)
+ Roger Quadros 2836 (2.4%)
+ Neha Malcom Francis 2822 (2.4%)
+ Svyatoslav Ryhel 2768 (2.3%)
+ Manorit Chawdhry 2699 (2.3%)
+ Tom Rini 2320 (2.0%)
+ Sean Anderson 2224 (1.9%)
+ Johan Jonker 1984 (1.7%)
+ Heinrich Schuchardt 1886 (1.6%)
+ Sughosh Ganu 1824 (1.5%)
+ Igor Prusov 1710 (1.5%)
+ Eddie James 1481 (1.3%)
+ Bryan Brattlof 1357 (1.2%)
+ Tom Fitzhenry 1323 (1.1%)
+ Reid Tonking 1209 (1.0%)
+ John Clark 1202 (1.0%)
+ Tony Dinh 1163 (1.0%)
+ Alexey Romanov 1159 (1.0%)
+ Sébastien Szymanski 1129 (1.0%)
+ Frank Wunderlich 1035 (0.9%)
+ Mikhail Kshevetskiy 926 (0.8%)
+ Chanho Park 880 (0.7%)
+ Teresa Remmet 781 (0.7%)
+ Mihai Sain 781 (0.7%)
+ Yang Xiwen 652 (0.6%)
+ Patrice Chotard 605 (0.5%)
+ Artur Rojek 595 (0.5%)
+ Alexander Gendin 516 (0.4%)
+ Yu Chien Peter Lin 421 (0.4%)
+ Randolph 379 (0.3%)
+ Andrew Davis 354 (0.3%)
+ Joshua Watt 343 (0.3%)
+ Joao Marcos Costa 334 (0.3%)
+ Alexander Dahl 305 (0.3%)
+ Mikhail Kalashnikov 294 (0.2%)
+ Sam Edwards 288 (0.2%)
+ Neil Armstrong 282 (0.2%)
+ Venkatesh Yadav Abbarapu 277 (0.2%)
+ Samuel Holland 266 (0.2%)
+ Philip Oberfichtner 266 (0.2%)
+ Gatien Chevallier 264 (0.2%)
+ Janne Grunau 231 (0.2%)
+ Matthias Schiffer 230 (0.2%)
+ Bin Meng 201 (0.2%)
+ Andrii Chepurnyi 181 (0.2%)
+ Marek Behún 180 (0.2%)
+ Jan Kiszka 179 (0.2%)
+ Algapally Santosh Sagar 174 (0.1%)
+ Linus Walleij 170 (0.1%)
+ Udit Kumar 165 (0.1%)
+ Patrick Delaunay 142 (0.1%)
+ Rasmus Villemoes 128 (0.1%)
+ Fabio Estevam 126 (0.1%)
+ Shiji Yang 123 (0.1%)
+ Elaine Zhang 111 (0.1%)
+ Oleksandr Suvorov 108 (0.1%)
+ Siddharth Vadapalli 107 (0.1%)
+ Fabrice Gasnier 103 (0.1%)
+ Sergei Antonov 103 (0.1%)
+ Kuan Lim Lee 102 (0.1%)
+ Alper Nebi Yasak 99 (0.1%)
+ Marcel Ziswiler 97 (0.1%)
+ Christian Taedcke 95 (0.1%)
+ Tim Lunn 93 (0.1%)
+ Hector Martin 90 (0.1%)
+ Emanuele Ghidoli 89 (0.1%)
+ Nicolas Frattaroli 89 (0.1%)
+ Mark Kettenis 88 (0.1%)
+ Fedor Ross 86 (0.1%)
+ Chris Packham 84 (0.1%)
+ Love Kumar 84 (0.1%)
+ Robert Marko 80 (0.1%)
+ Sam Protsenko 78 (0.1%)
+ Vishal Mahaveer 75 (0.1%)
+ Ilias Apalodimas 70 (0.1%)
+ Ashok Reddy Soma 64 (0.1%)
+ Andrejs Cainikovs 59 (0.1%)
+ Peter Robinson 58 (0.0%)
+ Jesse Taube 57 (0.0%)
+ Quentin Schulz 55 (0.0%)
+ Tejas Bhumkar 54 (0.0%)
+ Suman Anna 51 (0.0%)
+ Ibai Erkiaga 49 (0.0%)
+ Masahisa Kojima 45 (0.0%)
+ Sean Edmond 45 (0.0%)
+ Maxim Cournoyer 45 (0.0%)
+ Laurent Pinchart 44 (0.0%)
+ Jim Liu 43 (0.0%)
+ Lars Feyaerts 42 (0.0%)
+ Massimo Pegorer 41 (0.0%)
+ Manoj Sai 40 (0.0%)
+ Joseph Chen 40 (0.0%)
+ Simon Holesch 39 (0.0%)
+ Josua Mayer 35 (0.0%)
+ Hiago De Franco 35 (0.0%)
+ Tanmay Shah 33 (0.0%)
+ Frank de Brabander 32 (0.0%)
+ Shantur Rathore 31 (0.0%)
+ Igor Opaniuk 30 (0.0%)
+ Dan Carpenter 28 (0.0%)
+ Ludwig Kormann 27 (0.0%)
+ Maxim Kochetkov 26 (0.0%)
+ Neal Frager 23 (0.0%)
+ Mattijs Korpershoek 22 (0.0%)
+ Baruch Siach 22 (0.0%)
+ Ley Foon Tan 20 (0.0%)
+ Andy Shevchenko 20 (0.0%)
+ shengfei Xu 19 (0.0%)
+ Eduard Strehlau 16 (0.0%)
+ Yurii Monakov 14 (0.0%)
+ Ye Li 13 (0.0%)
+ Dylan Hung 12 (0.0%)
+ Michel Alex 12 (0.0%)
+ Matwey V. Kornilov 12 (0.0%)
+ Milan P. Stanić 11 (0.0%)
+ Li Hua Qian 11 (0.0%)
+ Wei Chen 10 (0.0%)
+ Mayuresh Chitale 10 (0.0%)
+ Polak, Leszek 9 (0.0%)
+ Dylan Corrales 8 (0.0%)
+ Andrey Skvortsov 8 (0.0%)
+ Troy Kisky 8 (0.0%)
+ Naveen Kumar Chaudhary 8 (0.0%)
+ Okhunjon Sobirjonov 7 (0.0%)
+ Roman Azarenko 7 (0.0%)
+ Han Xu 7 (0.0%)
+ Anatolij Gustschin 7 (0.0%)
+ Thomas Mittelstaedt 6 (0.0%)
+ Amit Kumar Mahapatra 6 (0.0%)
+ Eugen Hristev 6 (0.0%)
+ Abdellatif El Khlifi 5 (0.0%)
+ Harald Seiler 5 (0.0%)
+ Anthony Loiseau 5 (0.0%)
+ Chukun Pan 5 (0.0%)
+ Weizhao Ouyang 5 (0.0%)
+ Roger Knecht 5 (0.0%)
+ Trevor Woerner 5 (0.0%)
+ Ilya Lukin 5 (0.0%)
+ Hugo Villeneuve 4 (0.0%)
+ Lukas Funke 4 (0.0%)
+ Jonathan Corbet 4 (0.0%)
+ Ricardo Salveti 4 (0.0%)
+ Nicolò Veronese 4 (0.0%)
+ Saeed Nowshadi 4 (0.0%)
+ Maksim Kiselev 3 (0.0%)
+ Caleb Connolly 3 (0.0%)
+ Guillaume La Roque 3 (0.0%)
+ Jason Kacines 3 (0.0%)
+ Francois Berder 2 (0.0%)
+ Stephen Graf 2 (0.0%)
+ Nikita Yushchenko 2 (0.0%)
+ Bhupesh Sharma 2 (0.0%)
+ Piyush Mehta 2 (0.0%)
+ Wojciech Nizinski 2 (0.0%)
+ Alice Guo 2 (0.0%)
+ Joao Paulo Goncalves 2 (0.0%)
+ Andrej Rosano 2 (0.0%)
+ Srinivas Neeli 2 (0.0%)
+ Łukasz Stelmach 2 (0.0%)
+ Moritz Fischer 1 (0.0%)
+ Miquel Raynal 1 (0.0%)
+ Stefan Roese 1 (0.0%)
+ Cong Dang 1 (0.0%)
+ John Keeping 1 (0.0%)
+ Dmitry Rokosov 1 (0.0%)
+ Yong-Xuan Wang 1 (0.0%)
+ Nathan Barrett-Morrison 1 (0.0%)
+ Emekcan Aras 1 (0.0%)
+ Martin Fäcknitz 1 (0.0%)
+ Ricardo Pardini 1 (0.0%)
+ Guochun Huang 1 (0.0%)
+ Michael Scott 1 (0.0%)
+ Dominik Haller 1 (0.0%)
+ Nikhil M Jain 1 (0.0%)
+ Patryk Biel 1 (0.0%)
+ Rong Tao 1 (0.0%)
+ Thippeswamy Havalige 1 (0.0%)
+ Elena Popa 1 (0.0%)
+ Kevin Chen 1 (0.0%)
+ ==================================== =====
+
+
+.. table:: Developers with the most lines removed
+ :widths: auto
+
+ ==================================== =====
+ Name Count
+ ==================================== =====
+ Laurentiu Tudor 5975 (15.4%)
+ Dario Binacchi 3012 (7.8%)
+ Tom Rini 1059 (2.7%)
+ Andrew Davis 346 (0.9%)
+ Tim Harvey 83 (0.2%)
+ Chris Packham 58 (0.1%)
+ Peter Robinson 58 (0.1%)
+ Ilias Apalodimas 21 (0.1%)
+ Jesse Taube 21 (0.1%)
+ Ibai Erkiaga 16 (0.0%)
+ Eduard Strehlau 16 (0.0%)
+ Bin Meng 12 (0.0%)
+ Matwey V. Kornilov 10 (0.0%)
+ Andy Shevchenko 9 (0.0%)
+ Ilya Lukin 5 (0.0%)
+ Trevor Woerner 4 (0.0%)
+ Maxim Kochetkov 2 (0.0%)
+ Piyush Mehta 2 (0.0%)
+ Joao Paulo Goncalves 2 (0.0%)
+ Abdellatif El Khlifi 1 (0.0%)
+ Stephen Graf 1 (0.0%)
+ ==================================== =====
+
+
+.. table:: Developers with the most signoffs (total 215)
+ :widths: auto
+
+ ==================================== =====
+ Name Count
+ ==================================== =====
+ Michal Simek 55 (25.6%)
+ Neil Armstrong 29 (13.5%)
+ Minkyu Kang 13 (6.0%)
+ Heinrich Schuchardt 9 (4.2%)
+ Peng Fan 7 (3.3%)
+ Ilias Apalodimas 6 (2.8%)
+ Dario Binacchi 5 (2.3%)
+ Bin Meng 5 (2.3%)
+ Frieder Schrempf 5 (2.3%)
+ Marc Kleine-Budde 5 (2.3%)
+ Alexandre Torgue 5 (2.3%)
+ Mattijs Korpershoek 4 (1.9%)
+ Ashok Reddy Soma 4 (1.9%)
+ Patrice Chotard 4 (1.9%)
+ Marek Vasut 4 (1.9%)
+ Simon Glass 4 (1.9%)
+ Tom Rini 3 (1.4%)
+ Oleksandr Suvorov 3 (1.4%)
+ Venkatesh Yadav Abbarapu 3 (1.4%)
+ Jonas Karlman 3 (1.4%)
+ Andre Przywara 3 (1.4%)
+ Miquel Raynal 2 (0.9%)
+ Francesco Dolcini 2 (0.9%)
+ Rui Miguel Silva 2 (0.9%)
+ Qi Feng 2 (0.9%)
+ Suniel Mahesh 2 (0.9%)
+ Siddharth Vadapalli 2 (0.9%)
+ Neha Malcom Francis 2 (0.9%)
+ Alexey Romanov 2 (0.9%)
+ Sébastien Szymanski 2 (0.9%)
+ Roger Quadros 2 (0.9%)
+ Nishanth Menon 2 (0.9%)
+ Andy Shevchenko 1 (0.5%)
+ Abdellatif El Khlifi 1 (0.5%)
+ Jon Mason 1 (0.5%)
+ Martin Kurbanov 1 (0.5%)
+ Jakub Klama 1 (0.5%)
+ Marcin Jabrzyk 1 (0.5%)
+ Valerio 'ftp21' Mancini 1 (0.5%)
+ Lee Jones 1 (0.5%)
+ Geert Uytterhoeven 1 (0.5%)
+ Hiago De Franco 1 (0.5%)
+ Patrick Delaunay 1 (0.5%)
+ Elaine Zhang 1 (0.5%)
+ Fabio Estevam 1 (0.5%)
+ Manorit Chawdhry 1 (0.5%)
+ ==================================== =====
+
+
+.. table:: Developers with the most reviews (total 990)
+ :widths: auto
+
+ ==================================== =====
+ Name Count
+ ==================================== =====
+ Simon Glass 251 (25.4%)
+ Kever Yang 67 (6.8%)
+ Tom Rini 66 (6.7%)
+ Nishanth Menon 55 (5.6%)
+ Marek Vasut 50 (5.1%)
+ Mattijs Korpershoek 47 (4.7%)
+ Bin Meng 38 (3.8%)
+ Patrice Chotard 33 (3.3%)
+ Fabio Estevam 33 (3.3%)
+ Leo Yu-Chi Liang 33 (3.3%)
+ Heinrich Schuchardt 24 (2.4%)
+ Stefan Roese 23 (2.3%)
+ Patrick Delaunay 20 (2.0%)
+ Biju Das 17 (1.7%)
+ Neil Armstrong 16 (1.6%)
+ Lad Prabhakar 16 (1.6%)
+ Sean Anderson 16 (1.6%)
+ Ilias Apalodimas 15 (1.5%)
+ Etienne Carriere 14 (1.4%)
+ Jaehoon Chung 12 (1.2%)
+ Andre Przywara 11 (1.1%)
+ Neha Malcom Francis 9 (0.9%)
+ Ramon Fried 9 (0.9%)
+ Bhupesh Sharma 7 (0.7%)
+ Jernej Skrabec 6 (0.6%)
+ Yannic Moog 6 (0.6%)
+ Samuel Holland 6 (0.6%)
+ Heiko Schocher 5 (0.5%)
+ Sam Edwards 5 (0.5%)
+ Manorit Chawdhry 4 (0.4%)
+ Mark Kettenis 4 (0.4%)
+ Peng Fan 3 (0.3%)
+ Roger Quadros 3 (0.3%)
+ Yoshihiro Shimoda 3 (0.3%)
+ Heiko Stuebner 3 (0.3%)
+ Michael Trimarchi 3 (0.3%)
+ Marcel Ziswiler 3 (0.3%)
+ Paul Barker 3 (0.3%)
+ Frieder Schrempf 2 (0.2%)
+ Weizhao Ouyang 2 (0.2%)
+ Xavier Drudis Ferran 2 (0.2%)
+ Angelo Dureghello 2 (0.2%)
+ Christopher Obbard 2 (0.2%)
+ Mike Frysinger 2 (0.2%)
+ Dhruva Gole 2 (0.2%)
+ Qu Wenruo 2 (0.2%)
+ Linus Walleij 2 (0.2%)
+ Svyatoslav Ryhel 2 (0.2%)
+ Jonas Karlman 1 (0.1%)
+ Andrew Davis 1 (0.1%)
+ Nikhil M Jain 1 (0.1%)
+ Eric Curtin 1 (0.1%)
+ Neal Gompa 1 (0.1%)
+ Dragan Simic 1 (0.1%)
+ Daniel Schwierzeck 1 (0.1%)
+ Ryan Chen 1 (0.1%)
+ Lukasz Majewski 1 (0.1%)
+ Rick Chen 1 (0.1%)
+ Anup Patel 1 (0.1%)
+ Kristian Amlie 1 (0.1%)
+ Sebastian Reichel 1 (0.1%)
+ Martyn Welch 1 (0.1%)
+ Grzegorz Szymaszek 1 (0.1%)
+ Raphaël Gallais-Pou 1 (0.1%)
+ Wei Liang Lim 1 (0.1%)
+ Adam Ford 1 (0.1%)
+ Alexander Graf 1 (0.1%)
+ Devarsh Thakkar 1 (0.1%)
+ Michal Suchánek 1 (0.1%)
+ Rafał Miłecki 1 (0.1%)
+ Weijie Gao 1 (0.1%)
+ Jan Kiszka 1 (0.1%)
+ Sam Protsenko 1 (0.1%)
+ Ye Li 1 (0.1%)
+ Marek Behún 1 (0.1%)
+ Bryan Brattlof 1 (0.1%)
+ Mikhail Kalashnikov 1 (0.1%)
+ Randolph 1 (0.1%)
+ Tony Dinh 1 (0.1%)
+ ==================================== =====
+
+
+.. table:: Developers with the most test credits (total 131)
+ :widths: auto
+
+ ==================================== =====
+ Name Count
+ ==================================== =====
+ Tom Rini 29 (22.1%)
+ Mattijs Korpershoek 22 (16.8%)
+ Joao Paulo Goncalves 8 (6.1%)
+ Bhupesh Sharma 6 (4.6%)
+ Yannic Moog 6 (4.6%)
+ Samuel Holland 5 (3.8%)
+ Svyatoslav Ryhel 5 (3.8%)
+ Simon Glass 4 (3.1%)
+ Nishanth Menon 4 (3.1%)
+ Ivan T.Ivanov 4 (3.1%)
+ Milan P. Stanić 4 (3.1%)
+ Thuan Nguyen Hong 3 (2.3%)
+ Marek Vasut 2 (1.5%)
+ Ilias Apalodimas 2 (1.5%)
+ Sam Edwards 2 (1.5%)
+ Michal Simek 2 (1.5%)
+ Andreas Westman Dorcsak 2 (1.5%)
+ Sean Anderson 1 (0.8%)
+ Jaehoon Chung 1 (0.8%)
+ Neha Malcom Francis 1 (0.8%)
+ Marcel Ziswiler 1 (0.8%)
+ Paul Barker 1 (0.8%)
+ Christopher Obbard 1 (0.8%)
+ Mikhail Kalashnikov 1 (0.8%)
+ Andy Shevchenko 1 (0.8%)
+ Stephen Graf 1 (0.8%)
+ Bob McChesney 1 (0.8%)
+ Piotr Oniszczuk 1 (0.8%)
+ Maksim Kurnosenko 1 (0.8%)
+ Henrik Grimler 1 (0.8%)
+ Bao Cheng Su 1 (0.8%)
+ Kevin Amadiva 1 (0.8%)
+ Chris Paterson 1 (0.8%)
+ Masahisa Kojima 1 (0.8%)
+ Maksim Kiselev 1 (0.8%)
+ Shantur Rathore 1 (0.8%)
+ Chanho Park 1 (0.8%)
+ FUKAUMI Naoki 1 (0.8%)
+ ==================================== =====
+
+
+.. table:: Developers who gave the most tested-by credits (total 131)
+ :widths: auto
+
+ ==================================== =====
+ Name Count
+ ==================================== =====
+ Bryan Brattlof 26 (19.8%)
+ Nishanth Menon 18 (13.7%)
+ Marek Vasut 17 (13.0%)
+ Andre Przywara 10 (7.6%)
+ Joao Marcos Costa 8 (6.1%)
+ Svyatoslav Ryhel 7 (5.3%)
+ Simon Glass 6 (4.6%)
+ Teresa Remmet 6 (4.6%)
+ Roger Quadros 5 (3.8%)
+ Jonas Karlman 5 (3.8%)
+ Heinrich Schuchardt 4 (3.1%)
+ Paul Barker 3 (2.3%)
+ Tom Rini 2 (1.5%)
+ Sam Edwards 2 (1.5%)
+ Andrew Davis 2 (1.5%)
+ Ilias Apalodimas 1 (0.8%)
+ Sean Anderson 1 (0.8%)
+ Mikhail Kalashnikov 1 (0.8%)
+ Jan Kiszka 1 (0.8%)
+ Lukas Funke 1 (0.8%)
+ Guillaume La Roque 1 (0.8%)
+ Wojciech Nizinski 1 (0.8%)
+ Massimo Pegorer 1 (0.8%)
+ Eddie James 1 (0.8%)
+ Robert Nelson 1 (0.8%)
+ ==================================== =====
+
+
+.. table:: Developers with the most report credits (total 25)
+ :widths: auto
+
+ ==================================== =====
+ Name Count
+ ==================================== =====
+ Nishanth Menon 3 (12.0%)
+ Tom Rini 2 (8.0%)
+ Sean Anderson 2 (8.0%)
+ Date Huang 2 (8.0%)
+ Vincent Stehlé 2 (8.0%)
+ Andre Przywara 1 (4.0%)
+ Roger Quadros 1 (4.0%)
+ Jonas Karlman 1 (4.0%)
+ Heinrich Schuchardt 1 (4.0%)
+ Mikhail Kalashnikov 1 (4.0%)
+ Bao Cheng Su 1 (4.0%)
+ Fabio Estevam 1 (4.0%)
+ Weizhao Ouyang 1 (4.0%)
+ Martin Liška 1 (4.0%)
+ Peter Hoyes 1 (4.0%)
+ Madushan Nishantha 1 (4.0%)
+ Ivan Ivanov 1 (4.0%)
+ Jayantajit Gogoi 1 (4.0%)
+ Suman Anna 1 (4.0%)
+ ==================================== =====
+
+
+.. table:: Developers who gave the most report credits (total 25)
+ :widths: auto
+
+ ==================================== =====
+ Name Count
+ ==================================== =====
+ Simon Glass 6 (24.0%)
+ Nishanth Menon 3 (12.0%)
+ Marek Vasut 3 (12.0%)
+ Andre Przywara 2 (8.0%)
+ Heinrich Schuchardt 2 (8.0%)
+ Siddharth Vadapalli 2 (8.0%)
+ Roger Quadros 1 (4.0%)
+ Jan Kiszka 1 (4.0%)
+ Massimo Pegorer 1 (4.0%)
+ Samuel Holland 1 (4.0%)
+ Jonathan Corbet 1 (4.0%)
+ Rasmus Villemoes 1 (4.0%)
+ Udit Kumar 1 (4.0%)
+ ==================================== =====
+
+
+.. table:: Top changeset contributors by employer
+ :widths: auto
+
+ ==================================== =====
+ Name Count
+ ==================================== =====
+ (Unknown) 515 (32.9%)
+ Google LLC 274 (17.5%)
+ Renesas Electronics 177 (11.3%)
+ AMD 114 (7.3%)
+ Texas Instruments 100 (6.4%)
+ Linaro 95 (6.1%)
+ DENX Software Engineering 72 (4.6%)
+ Konsulko Group 50 (3.2%)
+ ARM 39 (2.5%)
+ Amarula Solutions 20 (1.3%)
+ Samsung 19 (1.2%)
+ ST Microelectronics 18 (1.2%)
+ Toradex 17 (1.1%)
+ NXP 10 (0.6%)
+ Siemens 8 (0.5%)
+ Phytec 7 (0.4%)
+ Rockchip 7 (0.4%)
+ BayLibre SAS 6 (0.4%)
+ IBM 6 (0.4%)
+ Bosch 3 (0.2%)
+ Weidmüller Interface GmbH & Co. KG 3 (0.2%)
+ Bootlin 1 (0.1%)
+ Collabora Ltd. 1 (0.1%)
+ Intel 1 (0.1%)
+ LWN.net 1 (0.1%)
+ ==================================== =====
+
+
+.. table:: Top lines changed by employer
+ :widths: auto
+
+ ==================================== =====
+ Name Count
+ ==================================== =====
+ (Unknown) 43854 (37.2%)
+ Texas Instruments 12605 (10.7%)
+ Renesas Electronics 11595 (9.8%)
+ Google LLC 11497 (9.8%)
+ AMD 8291 (7.0%)
+ NXP 6236 (5.3%)
+ Linaro 5994 (5.1%)
+ ARM 4545 (3.9%)
+ Amarula Solutions 3655 (3.1%)
+ Konsulko Group 2320 (2.0%)
+ DENX Software Engineering 2239 (1.9%)
+ IBM 1481 (1.3%)
+ ST Microelectronics 1114 (0.9%)
+ Samsung 882 (0.7%)
+ Phytec 782 (0.7%)
+ Toradex 282 (0.2%)
+ Siemens 190 (0.2%)
+ Rockchip 171 (0.1%)
+ Weidmüller Interface GmbH & Co. KG 99 (0.1%)
+ BayLibre SAS 25 (0.0%)
+ Intel 20 (0.0%)
+ Bosch 6 (0.0%)
+ Collabora Ltd. 6 (0.0%)
+ LWN.net 4 (0.0%)
+ Bootlin 1 (0.0%)
+ ==================================== =====
+
+
+.. table:: Employers with the most signoffs (total 215)
+ :widths: auto
+
+ ==================================== =====
+ Name Count
+ ==================================== =====
+ AMD 62 (28.8%)
+ Linaro 37 (17.2%)
+ (Unknown) 28 (13.0%)
+ Samsung 13 (6.0%)
+ ST Microelectronics 10 (4.7%)
+ Canonical 9 (4.2%)
+ Texas Instruments 7 (3.3%)
+ NXP 7 (3.3%)
+ ARM 7 (3.3%)
+ Amarula Solutions 7 (3.3%)
+ Pengutronix 5 (2.3%)
+ Google LLC 4 (1.9%)
+ DENX Software Engineering 4 (1.9%)
+ BayLibre SAS 4 (1.9%)
+ Konsulko Group 3 (1.4%)
+ Toradex 3 (1.4%)
+ Bootlin 2 (0.9%)
+ Renesas Electronics 1 (0.5%)
+ Rockchip 1 (0.5%)
+ Intel 1 (0.5%)
+ ==================================== =====
+
+
+.. table:: Employers with the most hackers (total 192)
+ :widths: auto
+
+ ==================================== =====
+ Name Count
+ ==================================== =====
+ (Unknown) 104 (54.2%)
+ AMD 14 (7.3%)
+ Texas Instruments 12 (6.2%)
+ Linaro 10 (5.2%)
+ DENX Software Engineering 6 (3.1%)
+ NXP 5 (2.6%)
+ Toradex 5 (2.6%)
+ ST Microelectronics 4 (2.1%)
+ ARM 4 (2.1%)
+ Rockchip 4 (2.1%)
+ Renesas Electronics 3 (1.6%)
+ Samsung 2 (1.0%)
+ Amarula Solutions 2 (1.0%)
+ Google LLC 2 (1.0%)
+ BayLibre SAS 2 (1.0%)
+ Phytec 2 (1.0%)
+ Siemens 2 (1.0%)
+ Weidmüller Interface GmbH & Co. KG 2 (1.0%)
+ Konsulko Group 1 (0.5%)
+ Bootlin 1 (0.5%)
+ Intel 1 (0.5%)
+ IBM 1 (0.5%)
+ Bosch 1 (0.5%)
+ Collabora Ltd. 1 (0.5%)
+ LWN.net 1 (0.5%)
+ ==================================== =====
diff --git a/doc/develop/uefi/uefi.rst b/doc/develop/uefi/uefi.rst
index 6bc9d92..c739242 100644
--- a/doc/develop/uefi/uefi.rst
+++ b/doc/develop/uefi/uefi.rst
@@ -830,7 +830,7 @@
controller refers to the device for which the driver is installed.
The relevant drivers are identified using the EFI_DRIVER_BINDING_PROTOCOL. This
-protocol has has three functions:
+protocol has three functions:
* supported - determines if the driver is compatible with the device
* start - installs the driver by opening the relevant protocol with
diff --git a/doc/device-tree-bindings/gpio/pm8916_gpio.txt b/doc/device-tree-bindings/gpio/pm8916_gpio.txt
deleted file mode 100644
index 58185b8..0000000
--- a/doc/device-tree-bindings/gpio/pm8916_gpio.txt
+++ /dev/null
@@ -1,48 +0,0 @@
-Driver for part of pm8916 PMIC - gpio and power/reset keys
-
-This device should be child of SPMI pmic.
-
-1) GPIO driver
-
-Required properties:
-- compatible: "qcom,pm8916-gpio"
-- reg: peripheral ID, size of register block
-- gpio-controller
-- gpio-count: number of GPIOs
-- #gpio-cells: 2
-
-Optional properties:
-- gpio-bank-name: name of bank (as default "pm8916" is used)
-
-Example:
-
-pmic_gpios: gpios@c000 {
- compatible = "qcom,pm8916-gpio";
- reg = <0xc000 0x400>;
- gpio-controller;
- gpio-count = <4>;
- #gpio-cells = <2>;
- gpio-bank-name="pmic";
-};
-
-
-2) Power/Reset key driver
-
-Required properties:
-- compatible: "qcom,pm8916-pwrkey"
-- reg: peripheral ID, size of register block
-- gpio-controller
-- #gpio-cells: 2
-
-Optional properties:
-- gpio-bank-name: name of bank (as default "pm8916_key" is used)
-
-
-Example:
-
-pmic_pon: pon@800 {
- compatible = "qcom,pm8916-pwrkey";
- reg = <0x800 0x96>;
- #gpio-cells = <2>;
- gpio-controller;
-};
diff --git a/doc/device-tree-bindings/leds/leds-lp5562.txt b/doc/device-tree-bindings/leds/leds-lp5562.txt
new file mode 100644
index 0000000..4e0c742
--- /dev/null
+++ b/doc/device-tree-bindings/leds/leds-lp5562.txt
@@ -0,0 +1,63 @@
+LEDs connected to TI LP5562 controller
+
+This driver works with a TI LP5562 4-channel LED controller.
+CONFIG_LED_BLINK is supported using the controller engines. However
+there are only 3 engines available for the 4 channels. This means
+that the blue and white channels share the same engine. When both
+blue and white LEDs are set to blink, they will share the same blink
+rate. Changing the blink rate of the blue LED will affect the white
+LED and vice-versa. Manual on/off is handled independently for all 4
+channels.
+
+Required properties:
+ - compatible : should be "ti,lp5562".
+ - #address-cells : must be 1.
+ - #size-cells : must be 0.
+ - reg : LP5562 LED controller I2C address.
+
+Optional properties:
+ - enable-gpios : Enable GPIO
+ - clock-mode : u8, configures the clock mode:
+ - 0 # automode
+ - 1 # internal
+ - 2 # external
+
+Each LED is represented as a sub-node of the ti,lp5562 device.
+
+LED sub-node required properties:
+ - reg : Zero-based channel identifier:
+ - 0 red
+ - 1 green
+ - 2 blue
+ - 3 white
+
+LED sub-node optional properties:
+ - chan-name : name of LED
+ - max-cur : LED current at max brightness in 100uA steps (0x00 - 0xFF)
+ Default : 100 (10 mA)
+
+Example:
+ leds0: lp5562@30 {
+ compatible = "ti,lp5562";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ enable-gpios = <&gpio3 9 GPIO_ACTIVE_HIGH>;
+ reg = <0x30>;
+ clock-mode = /bits/8 <1>;
+
+ led@0 {
+ reg = <0>;
+ chan-name = "red";
+ max-cur = /bits/ 8 <200>; /* 20mA */
+ };
+ led@1 {
+ reg = <1>;
+ chan-name = "green";
+ max-cur = /bits/ 8 <200>; /* 20mA */
+ };
+ led@2 {
+ reg = <2>;
+ chan-name = "blue";
+ max-cur = /bits/ 8 <200>; /* 20mA */
+ };
+ };
diff --git a/doc/device-tree-bindings/phy/phy-mtk-tphy.txt b/doc/device-tree-bindings/phy/phy-mtk-tphy.txt
index 3042c39..300e236 100644
--- a/doc/device-tree-bindings/phy/phy-mtk-tphy.txt
+++ b/doc/device-tree-bindings/phy/phy-mtk-tphy.txt
@@ -52,6 +52,15 @@
"da_ref": the reference clock of analog phy, used if the clocks
of analog and digital phys are separated, otherwise uses
"ref" clock only if needed.
+- mediatek,eye-vrt : The selection of VRT reference voltage (U2 phy),
+ the value is [1, 7]
+- mediatek,eye-term : The selection of HS_TX TERM reference voltage (U2 phy),
+ the value is [1, 7]
+- mediatek,discth : The selection of disconnect threshold (U2 phy),
+ the value is [1, 15]
+- mediatek,pre-emphasis : The level of pre-emphasis which used to widen
+ the eye opening and boost eye swing,
+ the value is [1, 3]
Example:
diff --git a/doc/device-tree-bindings/pmic/qcom,spmi-pmic.txt b/doc/device-tree-bindings/pmic/qcom,spmi-pmic.txt
deleted file mode 100644
index eb78e3a..0000000
--- a/doc/device-tree-bindings/pmic/qcom,spmi-pmic.txt
+++ /dev/null
@@ -1,94 +0,0 @@
- Qualcomm SPMI PMICs multi-function device bindings
-
-The Qualcomm SPMI series presently includes PM8941, PM8841 and PMA8084
-PMICs. These PMICs use a QPNP scheme through SPMI interface.
-QPNP is effectively a partitioning scheme for dividing the SPMI extended
-register space up into logical pieces, and set of fixed register
-locations/definitions within these regions, with some of these regions
-specifically used for interrupt handling.
-
-The QPNP PMICs are used with the Qualcomm Snapdragon series SoCs, and are
-interfaced to the chip via the SPMI (System Power Management Interface) bus.
-Support for multiple independent functions are implemented by splitting the
-16-bit SPMI slave address space into 256 smaller fixed-size regions, 256 bytes
-each. A function can consume one or more of these fixed-size register regions.
-
-Required properties:
-- compatible: Should contain one of:
- "qcom,pm660",
- "qcom,pm660l",
- "qcom,pm7325",
- "qcom,pm8004",
- "qcom,pm8005",
- "qcom,pm8019",
- "qcom,pm8028",
- "qcom,pm8110",
- "qcom,pm8150",
- "qcom,pm8150b",
- "qcom,pm8150c",
- "qcom,pm8150l",
- "qcom,pm8226",
- "qcom,pm8350c",
- "qcom,pm8841",
- "qcom,pm8901",
- "qcom,pm8909",
- "qcom,pm8916",
- "qcom,pm8941",
- "qcom,pm8950",
- "qcom,pm8953",
- "qcom,pm8994",
- "qcom,pm8998",
- "qcom,pma8084",
- "qcom,pmd9635",
- "qcom,pmi8950",
- "qcom,pmi8962",
- "qcom,pmi8994",
- "qcom,pmi8998",
- "qcom,pmk8002",
- "qcom,pmk8350",
- "qcom,pmr735a",
- "qcom,smb2351",
- or generalized "qcom,spmi-pmic".
-- reg: Specifies the SPMI USID slave address for this device.
- For more information see:
- Documentation/devicetree/bindings/spmi/spmi.yaml
-
-Required properties for peripheral child nodes:
-- compatible: Should contain "qcom,xxx", where "xxx" is a peripheral name.
-
-Optional properties for peripheral child nodes:
-- interrupts: Interrupts are specified as a 4-tuple. For more information
- see:
- Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb.yaml
-- interrupt-names: Corresponding interrupt name to the interrupts property
-
-Each child node of SPMI slave id represents a function of the PMIC. In the
-example below the rtc device node represents a peripheral of pm8941
-SID = 0. The regulator device node represents a peripheral of pm8941 SID = 1.
-
-Example:
-
- spmi {
- compatible = "qcom,spmi-pmic-arb";
-
- pm8941@0 {
- compatible = "qcom,pm8941", "qcom,spmi-pmic";
- reg = <0x0 SPMI_USID>;
-
- rtc {
- compatible = "qcom,rtc";
- interrupts = <0x0 0x61 0x1 IRQ_TYPE_EDGE_RISING>;
- interrupt-names = "alarm";
- };
- };
-
- pm8941@1 {
- compatible = "qcom,pm8941", "qcom,spmi-pmic";
- reg = <0x1 SPMI_USID>;
-
- regulator {
- compatible = "qcom,regulator";
- regulator-name = "8941_boost";
- };
- };
- };
diff --git a/doc/device-tree-bindings/spmi/spmi-msm.txt b/doc/device-tree-bindings/spmi/spmi-msm.txt
deleted file mode 100644
index ae47673..0000000
--- a/doc/device-tree-bindings/spmi/spmi-msm.txt
+++ /dev/null
@@ -1,26 +0,0 @@
-Qualcomm SPMI arbiter/bus driver
-
-This is bus driver for Qualcomm chips that use SPMI to communicate with PMICs.
-
-Required properties:
-- compatible: "qcom,spmi-pmic-arb"
-- reg: Register block adresses and sizes for various parts of device:
- 1) PMIC arbiter channel mapping base (PMIC_ARB_REG_CHNLn)
- 2) SPMI write command (master) registers (PMIC_ARB_CORE_SW_DEC_CHANNELS)
- 3) SPMI read command (observer) registers (PMIC_ARB_CORE_REGISTERS_OBS)
-
-Optional properties (if not set by parent):
-- #address-cells: 0x1 - childs slave ID address
-- #size-cells: 0x1
-
-All PMICs should be placed as a child nodes of bus arbiter.
-Automatic detection of childs is currently not supported.
-
-Example:
-
-spmi@200f000 {
- compatible = "qcom,spmi-pmic-arb";
- reg = <0x200f800 0x200 0x2400000 0x400000 0x2c00000 0x400000>;
- #address-cells = <0x1>;
- #size-cells = <0x1>;
-};
diff --git a/doc/genindex.rst b/doc/genindex.rst
new file mode 100644
index 0000000..2e452cb
--- /dev/null
+++ b/doc/genindex.rst
@@ -0,0 +1,4 @@
+.. SPDX-License-Identifier: GPL-2.0-or-later
+
+Index
+=====
diff --git a/doc/index.rst b/doc/index.rst
index 57b42c6..4339862 100644
--- a/doc/index.rst
+++ b/doc/index.rst
@@ -99,4 +99,7 @@
Indices and tables
==================
-* :ref:`genindex`
+.. toctree::
+ :maxdepth: 1
+
+ genindex
diff --git a/doc/sphinx-static/theme_overrides.css b/doc/sphinx-static/theme_overrides.css
index 522b6d4..02e1151 100644
--- a/doc/sphinx-static/theme_overrides.css
+++ b/doc/sphinx-static/theme_overrides.css
@@ -1,9 +1,41 @@
/* -*- coding: utf-8; mode: css -*-
*
* Sphinx HTML theme customization: read the doc
- *
+ * Please don't add any color definition here, as the theme should
+ * work for both normal and dark modes.
*/
+@import 'css/theme.css';
+@import 'pygments.css';
+
+/* Improve contrast and increase size for easier reading. */
+
+body {
+ font-family: sans-serif;
+ font-size: 100%;
+}
+
+h1, h2, .rst-content .toctree-wrapper p.caption, h3, h4, h5, h6, legend {
+ font-family: sans-serif;
+}
+
+div[class^="highlight"] pre {
+ font-family: monospace;
+ font-size: 100%;
+}
+
+.wy-menu-vertical {
+ font-family: sans-serif;
+}
+
+.c {
+ font-style: normal;
+}
+
+p {
+ font-size: 100%;
+}
+
/* Interim: Code-blocks with line nos - lines and line numbers don't line up.
* see: https://github.com/rtfd/sphinx_rtd_theme/issues/419
*/
@@ -15,6 +47,16 @@
line-height: normal;
}
+/* Keep fields from being strangely far apart due to inheirited table CSS. */
+.rst-content table.field-list th.field-name {
+ padding-top: 1px;
+ padding-bottom: 1px;
+}
+.rst-content table.field-list td.field-body {
+ padding-top: 1px;
+ padding-bottom: 1px;
+}
+
@media screen {
/* content column
@@ -56,13 +98,10 @@
/* Menu selection and keystrokes */
span.menuselection {
- color: blue;
font-family: "Courier New", Courier, monospace
}
code.kbd, code.kbd span {
- color: white;
- background-color: darkblue;
font-weight: bold;
font-family: "Courier New", Courier, monospace
}
diff --git a/doc/sphinx/kerneldoc.py b/doc/sphinx/kerneldoc.py
index 8189c33..01a5542 100644
--- a/doc/sphinx/kerneldoc.py
+++ b/doc/sphinx/kerneldoc.py
@@ -138,7 +138,7 @@
lineoffset = int(match.group(1)) - 1
# we must eat our comments since the upset the markup
else:
- doc = env.srcdir + "/" + env.docname + ":" + str(self.lineno)
+ doc = str(env.srcdir) + "/" + env.docname + ":" + str(self.lineno)
result.append(line, doc + ": " + filename, lineoffset)
lineoffset += 1
diff --git a/doc/sphinx/kfigure.py b/doc/sphinx/kfigure.py
index 7887048..dea7f91 100644
--- a/doc/sphinx/kfigure.py
+++ b/doc/sphinx/kfigure.py
@@ -266,7 +266,7 @@
if dst_fname:
# the builder needs not to copy one more time, so pop it if exists.
translator.builder.images.pop(img_node['uri'], None)
- _name = dst_fname[len(translator.builder.outdir) + 1:]
+ _name = dst_fname[len(str(translator.builder.outdir)) + 1:]
if isNewer(dst_fname, src_fname):
kernellog.verbose(app,
diff --git a/doc/sphinx/load_config.py b/doc/sphinx/load_config.py
index eeb394b..8b416bf 100644
--- a/doc/sphinx/load_config.py
+++ b/doc/sphinx/load_config.py
@@ -3,7 +3,7 @@
import os
import sys
-from sphinx.util.pycompat import execfile_
+from sphinx.util.osutil import fs_encoding
# ------------------------------------------------------------------------------
def loadConfig(namespace):
@@ -48,7 +48,9 @@
sys.stdout.write("load additional sphinx-config: %s\n" % config_file)
config = namespace.copy()
config['__file__'] = config_file
- execfile_(config_file, config)
+ with open(config_file, 'rb') as f:
+ code = compile(f.read(), fs_encoding, 'exec')
+ exec(code, config)
del config['__file__']
namespace.update(config)
else:
diff --git a/doc/sphinx/requirements.txt b/doc/sphinx/requirements.txt
index 39ececb..840c6ce 100644
--- a/doc/sphinx/requirements.txt
+++ b/doc/sphinx/requirements.txt
@@ -1,26 +1,25 @@
-alabaster==0.7.12
-Babel==2.9.1
-certifi==2023.07.22
-charset-normalizer==2.0.12
-docutils==0.16
-idna==3.3
-imagesize==1.3.0
-Jinja2==3.0.3
-MarkupSafe==2.1.1
-packaging==21.3
-Pygments==2.15.1
-pyparsing==3.0.7
-pytz==2023.3
+alabaster==0.7.16
+Babel==2.14.0
+certifi==2023.11.17
+charset-normalizer==3.3.2
+docutils==0.20.1
+idna==3.6
+imagesize==1.4.1
+Jinja2==3.1.3
+MarkupSafe==2.1.3
+packaging==23.2
+Pygments==2.17.2
requests==2.31.0
six==1.16.0
snowballstemmer==2.2.0
-Sphinx==3.4.3
-sphinx-prompt==1.5.0
-sphinx-rtd-theme==1.0.0
-sphinxcontrib-applehelp==1.0.2
-sphinxcontrib-devhelp==1.0.2
-sphinxcontrib-htmlhelp==2.0.0
+Sphinx==7.2.6
+sphinx-prompt==1.8.0
+sphinx-rtd-theme==2.0.0
+sphinxcontrib-applehelp==1.0.8
+sphinxcontrib-devhelp==1.0.6
+sphinxcontrib-htmlhelp==2.0.5
+sphinxcontrib-jquery==4.1
sphinxcontrib-jsmath==1.0.1
-sphinxcontrib-qthelp==1.0.3
-sphinxcontrib-serializinghtml==1.1.5
-urllib3==2.0.7
+sphinxcontrib-qthelp==1.0.7
+sphinxcontrib-serializinghtml==1.1.10
+urllib3==2.1.0
diff --git a/doc/usage/cmd/acpi.rst b/doc/usage/cmd/acpi.rst
index 6b9b894..a630f1e 100644
--- a/doc/usage/cmd/acpi.rst
+++ b/doc/usage/cmd/acpi.rst
@@ -1,5 +1,8 @@
.. SPDX-License-Identifier: GPL-2.0+:
+.. index::
+ single: acpi (command)
+
acpi command
============
diff --git a/doc/usage/cmd/addrmap.rst b/doc/usage/cmd/addrmap.rst
index 472fd54..6d0dbce 100644
--- a/doc/usage/cmd/addrmap.rst
+++ b/doc/usage/cmd/addrmap.rst
@@ -1,5 +1,8 @@
.. SPDX-License-Identifier: GPL-2.0+
+.. index::
+ single: addrmap (command)
+
addrmap command
===============
diff --git a/doc/usage/cmd/armffa.rst b/doc/usage/cmd/armffa.rst
index 13fa90c..4f41e33 100644
--- a/doc/usage/cmd/armffa.rst
+++ b/doc/usage/cmd/armffa.rst
@@ -1,6 +1,9 @@
.. SPDX-License-Identifier: GPL-2.0+
.. Copyright 2022-2023 Arm Limited and/or its affiliates <open-source-office@arm.com>
+.. index::
+ single: armffa (command)
+
armffa command
==============
diff --git a/doc/usage/cmd/askenv.rst b/doc/usage/cmd/askenv.rst
index b85cefa..e2b3c53 100644
--- a/doc/usage/cmd/askenv.rst
+++ b/doc/usage/cmd/askenv.rst
@@ -1,5 +1,8 @@
.. SPDX-License-Identifier: GPL-2.0+:
+.. index::
+ single: askenv (command)
+
askenv command
==============
diff --git a/doc/usage/cmd/base.rst b/doc/usage/cmd/base.rst
index db9cd4d..0d030a1 100644
--- a/doc/usage/cmd/base.rst
+++ b/doc/usage/cmd/base.rst
@@ -1,5 +1,8 @@
.. SPDX-License-Identifier: GPL-2.0+
+.. index::
+ single: base (command)
+
base command
============
diff --git a/doc/usage/cmd/bdinfo.rst b/doc/usage/cmd/bdinfo.rst
index 5261085..a21fbc8 100644
--- a/doc/usage/cmd/bdinfo.rst
+++ b/doc/usage/cmd/bdinfo.rst
@@ -1,6 +1,9 @@
.. SPDX-License-Identifier: GPL-2.0+
.. Copyright 2023, Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
+.. index::
+ single: bdinfo (command)
+
bdinfo command
==============
diff --git a/doc/usage/cmd/bind.rst b/doc/usage/cmd/bind.rst
index 1a5cffc..2345778 100644
--- a/doc/usage/cmd/bind.rst
+++ b/doc/usage/cmd/bind.rst
@@ -1,5 +1,8 @@
.. SPDX-License-Identifier: GPL-2.0+:
+.. index::
+ single: bind (command)
+
bind command
============
diff --git a/doc/usage/cmd/blkcache.rst b/doc/usage/cmd/blkcache.rst
index d3b2254..0329261 100644
--- a/doc/usage/cmd/blkcache.rst
+++ b/doc/usage/cmd/blkcache.rst
@@ -1,6 +1,9 @@
.. SPDX-License-Identifier: GPL-2.0+
.. Copyright 2023, Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
+.. index::
+ single: blkcache (command)
+
blkcache command
================
diff --git a/doc/usage/cmd/bootd.rst b/doc/usage/cmd/bootd.rst
index 380ef15..619cfb6 100644
--- a/doc/usage/cmd/bootd.rst
+++ b/doc/usage/cmd/bootd.rst
@@ -1,5 +1,8 @@
.. SPDX-License-Identifier: GPL-2.0+:
+.. index::
+ single: bootd (command)
+
bootd command
=============
diff --git a/doc/usage/cmd/bootdev.rst b/doc/usage/cmd/bootdev.rst
index fb638b5..658020e 100644
--- a/doc/usage/cmd/bootdev.rst
+++ b/doc/usage/cmd/bootdev.rst
@@ -1,5 +1,8 @@
.. SPDX-License-Identifier: GPL-2.0+:
+.. index::
+ single: bootdev (command)
+
bootdev command
===============
diff --git a/doc/usage/cmd/bootefi.rst b/doc/usage/cmd/bootefi.rst
index cb03df4..3efe9e9 100644
--- a/doc/usage/cmd/bootefi.rst
+++ b/doc/usage/cmd/bootefi.rst
@@ -1,6 +1,9 @@
.. SPDX-License-Identifier: GPL-2.0+
.. Copyright 2020, Heinrich Schuchardt <xypron.glpk@gmx.de>
+.. index::
+ single: bootefi (command)
+
bootefi command
===============
diff --git a/doc/usage/cmd/bootflow.rst b/doc/usage/cmd/bootflow.rst
index 2198ff6..16ba986 100644
--- a/doc/usage/cmd/bootflow.rst
+++ b/doc/usage/cmd/bootflow.rst
@@ -1,5 +1,8 @@
.. SPDX-License-Identifier: GPL-2.0+:
+.. index::
+ single: bootflow (command)
+
bootflow command
================
@@ -52,6 +55,8 @@
matters, since by then the system boots in the OS and U-Boot is no-longer
running. `bootflow scan -b` is a quick way to boot the first available OS.
A valid bootflow is one that made it all the way to the `loaded` state.
+ Note that if `-m` is provided as well, booting is delayed until the user
+ selects a bootflow.
-e
Used with -l to also show errors for each bootflow. The shows detailed error
@@ -71,6 +76,9 @@
priority or label is tried, to see if more bootdevs can be discovered, but
this flag disables that process.
+-m
+ Show a menu of available bootflows for the user to select. When used with
+ -b it then boots the one that was selected, if any.
The optional argument specifies a particular bootdev to scan. This can either be
the name of a bootdev or its sequence number (both shown with `bootdev list`).
diff --git a/doc/usage/cmd/booti.rst b/doc/usage/cmd/booti.rst
index d631fb5..313efb8 100644
--- a/doc/usage/cmd/booti.rst
+++ b/doc/usage/cmd/booti.rst
@@ -1,5 +1,8 @@
.. SPDX-License-Identifier: GPL-2.0+:
+.. index::
+ single: booti (command)
+
booti command
=============
diff --git a/doc/usage/cmd/bootm.rst b/doc/usage/cmd/bootm.rst
index a7e5f6c..e409ebc 100644
--- a/doc/usage/cmd/bootm.rst
+++ b/doc/usage/cmd/bootm.rst
@@ -1,5 +1,8 @@
.. SPDX-License-Identifier: GPL-2.0+
+.. index::
+ single: bootm (command)
+
bootm command
=============
diff --git a/doc/usage/cmd/bootmenu.rst b/doc/usage/cmd/bootmenu.rst
index 684a18d..294cc02 100644
--- a/doc/usage/cmd/bootmenu.rst
+++ b/doc/usage/cmd/bootmenu.rst
@@ -1,6 +1,9 @@
.. SPDX-License-Identifier: GPL-2.0+
.. (C) Copyright 2011-2012 Pali Rohár <pali@kernel.org>
+.. index::
+ single: bootmenu (command)
+
bootmenu command
================
diff --git a/doc/usage/cmd/bootmeth.rst b/doc/usage/cmd/bootmeth.rst
index f632d74..95651fd 100644
--- a/doc/usage/cmd/bootmeth.rst
+++ b/doc/usage/cmd/bootmeth.rst
@@ -1,5 +1,8 @@
.. SPDX-License-Identifier: GPL-2.0+:
+.. index::
+ single: bootmeth (command)
+
bootmeth command
================
diff --git a/doc/usage/cmd/bootz.rst b/doc/usage/cmd/bootz.rst
index 78953e9..b85875a 100644
--- a/doc/usage/cmd/bootz.rst
+++ b/doc/usage/cmd/bootz.rst
@@ -1,5 +1,8 @@
.. SPDX-License-Identifier: GPL-2.0+:
+.. index::
+ single: bootz (command)
+
bootz command
=============
diff --git a/doc/usage/cmd/button.rst b/doc/usage/cmd/button.rst
index ea41762..6c6794f 100644
--- a/doc/usage/cmd/button.rst
+++ b/doc/usage/cmd/button.rst
@@ -1,5 +1,8 @@
.. SPDX-License-Identifier: GPL-2.0+
+.. index::
+ single: button (command)
+
button command
==============
diff --git a/doc/usage/cmd/cat.rst b/doc/usage/cmd/cat.rst
index 5aaf497..b22dc61 100644
--- a/doc/usage/cmd/cat.rst
+++ b/doc/usage/cmd/cat.rst
@@ -1,5 +1,8 @@
.. SPDX-License-Identifier: GPL-2.0+:
+.. index::
+ single: cat (command)
+
cat command
===========
diff --git a/doc/usage/cmd/cedit.rst b/doc/usage/cmd/cedit.rst
index f415b48..b39d708 100644
--- a/doc/usage/cmd/cedit.rst
+++ b/doc/usage/cmd/cedit.rst
@@ -1,5 +1,8 @@
.. SPDX-License-Identifier: GPL-2.0+:
+.. index::
+ single: cedit (command)
+
cedit command
=============
diff --git a/doc/usage/cmd/cli.rst b/doc/usage/cmd/cli.rst
new file mode 100644
index 0000000..8148772
--- /dev/null
+++ b/doc/usage/cmd/cli.rst
@@ -0,0 +1,77 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+.. index::
+ single: cli (command)
+
+cli command
+===========
+
+Synopis
+-------
+
+::
+
+ cli get
+ cli set cli_flavor
+
+Description
+-----------
+
+The cli command permits getting and changing the current parser at runtime.
+
+cli get
+~~~~~~~
+
+It shows the current value of the parser used by the CLI.
+
+cli set
+~~~~~~~
+
+It permits setting the value of the parser used by the CLI.
+
+Possible values are old and modern.
+Note that, to use a specific parser its code should have been compiled, that
+is to say you need to enable the corresponding CONFIG_HUSH*.
+Otherwise, an error message is printed.
+
+Examples
+--------
+
+Get the current parser::
+
+ => cli get
+ old
+
+Change the current parser::
+
+ => cli get
+ old
+ => cli set modern
+ => cli get
+ modern
+ => cli set old
+ => cli get
+ old
+
+Trying to set the current parser to an unknown value::
+
+ => cli set foo
+ Bad value for parser name: foo
+ cli - cli
+
+ Usage:
+ cli get - print current cli
+ set - set the current cli, possible values are: old, modern
+
+Trying to set the current parser to a correct value but its code was not
+compiled::
+
+ => cli get
+ modern
+ => cli set old
+ Want to set current parser to old, but its code was not compiled!
+
+Return value
+------------
+
+The return value $? indicates whether the command succeeded.
diff --git a/doc/usage/cmd/cls.rst b/doc/usage/cmd/cls.rst
index b5c43e0..8282767 100644
--- a/doc/usage/cmd/cls.rst
+++ b/doc/usage/cmd/cls.rst
@@ -1,5 +1,8 @@
.. SPDX-License-Identifier: GPL-2.0+
+.. index::
+ single: cls (command)
+
cls command
===========
diff --git a/doc/usage/cmd/cmp.rst b/doc/usage/cmd/cmp.rst
index 8d196ee..a383074 100644
--- a/doc/usage/cmd/cmp.rst
+++ b/doc/usage/cmd/cmp.rst
@@ -1,5 +1,8 @@
.. SPDX-License-Identifier: GPL-2.0+:
+.. index::
+ single: cmp (command)
+
cmp command
===========
@@ -96,7 +99,7 @@
-------------
The cmp command is only available if CONFIG_CMD_MEMORY=y. The cmp.q command is
-only available if additionally CONFIG_MEM_SUPPORT_64BIT_DATA=y.
+only available on 64-bit targets.
Return value
------------
diff --git a/doc/usage/cmd/coninfo.rst b/doc/usage/cmd/coninfo.rst
index 76cb6c3..a66cf90 100644
--- a/doc/usage/cmd/coninfo.rst
+++ b/doc/usage/cmd/coninfo.rst
@@ -1,5 +1,8 @@
.. SPDX-License-Identifier: GPL-2.0+:
+.. index::
+ single: coninfo (command)
+
coninfo command
===============
diff --git a/doc/usage/cmd/conitrace.rst b/doc/usage/cmd/conitrace.rst
index d9916c8..38ec66a 100644
--- a/doc/usage/cmd/conitrace.rst
+++ b/doc/usage/cmd/conitrace.rst
@@ -1,3 +1,6 @@
+.. index::
+ single: conitrace (command)
+
conitrace command
=================
diff --git a/doc/usage/cmd/cp.rst b/doc/usage/cmd/cp.rst
index 12a24e1..434dfed 100644
--- a/doc/usage/cmd/cp.rst
+++ b/doc/usage/cmd/cp.rst
@@ -1,5 +1,8 @@
.. SPDX-License-Identifier: GPL-2.0+:
+.. index::
+ single: cp (command)
+
cp command
==========
@@ -19,7 +22,8 @@
The cp command is used to copy *count* chunks of memory from the *source*
address to the *target* address. If the *target* address points to NOR flash,
-the flash is programmed.
+the flash is programmed. When the *target* address points at ordinary memory,
+memmove() is used, so the two regions may overlap.
The number bytes in one chunk is defined by the suffix defaulting to 4 bytes:
@@ -73,7 +77,7 @@
-------------
The cp command is available if CONFIG_CMD_MEMORY=y. Support for 64 bit words
-(cp.q) depends on CONFIG_MEM_SUPPORT_64BIT_DATA=y. Copying to flash depends on
+(cp.q) is only available on 64-bit targets. Copying to flash depends on
CONFIG_MTD_NOR_FLASH=y.
Return value
diff --git a/doc/usage/cmd/cyclic.rst b/doc/usage/cmd/cyclic.rst
index 3085cc7..ac1e4c6 100644
--- a/doc/usage/cmd/cyclic.rst
+++ b/doc/usage/cmd/cyclic.rst
@@ -1,5 +1,8 @@
.. SPDX-License-Identifier: GPL-2.0+
+.. index::
+ single: cyclic (command)
+
cyclic command
==============
diff --git a/doc/usage/cmd/dm.rst b/doc/usage/cmd/dm.rst
index 12b7ede..9bef2ee 100644
--- a/doc/usage/cmd/dm.rst
+++ b/doc/usage/cmd/dm.rst
@@ -1,5 +1,8 @@
.. SPDX-License-Identifier: GPL-2.0+:
+.. index::
+ single: dm (command)
+
dm command
==========
diff --git a/doc/usage/cmd/ebtupdate.rst b/doc/usage/cmd/ebtupdate.rst
index d90474c..22415ee 100644
--- a/doc/usage/cmd/ebtupdate.rst
+++ b/doc/usage/cmd/ebtupdate.rst
@@ -1,5 +1,8 @@
.. SPDX-License-Identifier: GPL-2.0+:
+.. index::
+ single: ebtupdate (command)
+
ebtupdate command
=================
diff --git a/doc/usage/cmd/echo.rst b/doc/usage/cmd/echo.rst
index 861abdf..ebc9ff5 100644
--- a/doc/usage/cmd/echo.rst
+++ b/doc/usage/cmd/echo.rst
@@ -1,3 +1,6 @@
+.. index::
+ single: echo (command)
+
echo command
============
diff --git a/doc/usage/cmd/efi.rst b/doc/usage/cmd/efi.rst
index ef37ff2..b19d361 100644
--- a/doc/usage/cmd/efi.rst
+++ b/doc/usage/cmd/efi.rst
@@ -1,6 +1,9 @@
.. SPDX-License-Identifier: GPL-2.0+
.. Copyright 2020, Heinrich Schuchardt <xypron.glpk@gmx.de>
+.. index::
+ single: efi (command)
+
efi command
===========
diff --git a/doc/usage/cmd/eficonfig.rst b/doc/usage/cmd/eficonfig.rst
index 30eb72b..83a3ebf 100644
--- a/doc/usage/cmd/eficonfig.rst
+++ b/doc/usage/cmd/eficonfig.rst
@@ -1,6 +1,9 @@
.. SPDX-License-Identifier: GPL-2.0+
.. (C) Copyright 2022, Masahisa Kojima <masahisa.kojima@linaro.org>
+.. index::
+ single: eficonfig (command)
+
eficonfig command
=================
diff --git a/doc/usage/cmd/env.rst b/doc/usage/cmd/env.rst
index 1bebfa4..a859e32 100644
--- a/doc/usage/cmd/env.rst
+++ b/doc/usage/cmd/env.rst
@@ -1,5 +1,8 @@
.. SPDX-License-Identifier: GPL-2.0-or-later:
+.. index::
+ single: env (command)
+
env command
===========
diff --git a/doc/usage/cmd/event.rst b/doc/usage/cmd/event.rst
index 47c900d..5c5e304 100644
--- a/doc/usage/cmd/event.rst
+++ b/doc/usage/cmd/event.rst
@@ -1,5 +1,8 @@
.. SPDX-License-Identifier: GPL-2.0+
+.. index::
+ single: event (command)
+
event command
=============
diff --git a/doc/usage/cmd/exception.rst b/doc/usage/cmd/exception.rst
index 27df88b..9cb492d 100644
--- a/doc/usage/cmd/exception.rst
+++ b/doc/usage/cmd/exception.rst
@@ -1,3 +1,6 @@
+.. index::
+ single: exception (command)
+
exception command
=================
diff --git a/doc/usage/cmd/exit.rst b/doc/usage/cmd/exit.rst
index 3edb128..2f250bf 100644
--- a/doc/usage/cmd/exit.rst
+++ b/doc/usage/cmd/exit.rst
@@ -1,3 +1,6 @@
+.. index::
+ single: exit (command)
+
exit command
============
diff --git a/doc/usage/cmd/extension.rst b/doc/usage/cmd/extension.rst
index 6366cf5..4c261e7 100644
--- a/doc/usage/cmd/extension.rst
+++ b/doc/usage/cmd/extension.rst
@@ -1,6 +1,9 @@
.. SPDX-License-Identifier: GPL-2.0+
.. Copyright 2021, Kory Maincent <kory.maincent@bootlin.com>
+.. index::
+ single: extension (command)
+
extension command
=================
diff --git a/doc/usage/cmd/false.rst b/doc/usage/cmd/false.rst
index a17fe86..510377e 100644
--- a/doc/usage/cmd/false.rst
+++ b/doc/usage/cmd/false.rst
@@ -1,3 +1,6 @@
+.. index::
+ single: false (command)
+
false command
=============
diff --git a/doc/usage/cmd/fatinfo.rst b/doc/usage/cmd/fatinfo.rst
index af2eba4..2e05ab8 100644
--- a/doc/usage/cmd/fatinfo.rst
+++ b/doc/usage/cmd/fatinfo.rst
@@ -1,5 +1,8 @@
.. SPDX-License-Identifier: GPL-2.0+:
+.. index::
+ single: fatinfo (command)
+
fatinfo command
===============
diff --git a/doc/usage/cmd/fatload.rst b/doc/usage/cmd/fatload.rst
index 93acb27..6c048b7 100644
--- a/doc/usage/cmd/fatload.rst
+++ b/doc/usage/cmd/fatload.rst
@@ -1,5 +1,8 @@
.. SPDX-License-Identifier: GPL-2.0+:
+.. index::
+ single: fatload (command)
+
fatload command
===============
diff --git a/doc/usage/cmd/fdt.rst b/doc/usage/cmd/fdt.rst
index 36b8230..3e8c32c 100644
--- a/doc/usage/cmd/fdt.rst
+++ b/doc/usage/cmd/fdt.rst
@@ -1,5 +1,8 @@
.. SPDX-License-Identifier: GPL-2.0+
+.. index::
+ single: fdt (command)
+
fdt command
===========
diff --git a/doc/usage/cmd/font.rst b/doc/usage/cmd/font.rst
index 8ba149d..adcd512 100644
--- a/doc/usage/cmd/font.rst
+++ b/doc/usage/cmd/font.rst
@@ -1,5 +1,8 @@
.. SPDX-License-Identifier: GPL-2.0+:
+.. index::
+ single: font (command)
+
font command
============
diff --git a/doc/usage/cmd/for.rst b/doc/usage/cmd/for.rst
index f9e5049..4c98419 100644
--- a/doc/usage/cmd/for.rst
+++ b/doc/usage/cmd/for.rst
@@ -1,3 +1,6 @@
+.. index::
+ single: for (command)
+
for command
===========
diff --git a/doc/usage/cmd/fwu_mdata.rst b/doc/usage/cmd/fwu_mdata.rst
index ea3c227..f1bf08f 100644
--- a/doc/usage/cmd/fwu_mdata.rst
+++ b/doc/usage/cmd/fwu_mdata.rst
@@ -1,5 +1,8 @@
.. SPDX-License-Identifier: GPL-2.0+
+.. index::
+ single: fwu_mdata_read (command)
+
fwu_mdata_read command
======================
diff --git a/doc/usage/cmd/gpio.rst b/doc/usage/cmd/gpio.rst
index ee90213..4b0dc27 100644
--- a/doc/usage/cmd/gpio.rst
+++ b/doc/usage/cmd/gpio.rst
@@ -1,5 +1,8 @@
.. SPDX-License-Identifier: GPL-2.0+:
+.. index::
+ single: gpio (command)
+
gpio command
============
diff --git a/doc/usage/cmd/gpt.rst b/doc/usage/cmd/gpt.rst
index cbbe44a..8534f78 100644
--- a/doc/usage/cmd/gpt.rst
+++ b/doc/usage/cmd/gpt.rst
@@ -1,5 +1,8 @@
.. SPDX-License-Identifier: GPL-2.0+
+.. index::
+ single: gpt (command)
+
gpt command
===========
diff --git a/doc/usage/cmd/history.rst b/doc/usage/cmd/history.rst
index 33d3fcd..564a159 100644
--- a/doc/usage/cmd/history.rst
+++ b/doc/usage/cmd/history.rst
@@ -1,5 +1,8 @@
.. SPDX-License-Identifier: GPL-2.0+:
+.. index::
+ single: history (command)
+
history command
===============
diff --git a/doc/usage/cmd/host.rst b/doc/usage/cmd/host.rst
index e145089..072497d 100644
--- a/doc/usage/cmd/host.rst
+++ b/doc/usage/cmd/host.rst
@@ -1,5 +1,8 @@
.. SPDX-License-Identifier: GPL-2.0+
+.. index::
+ single: host (command)
+
host command
============
diff --git a/doc/usage/cmd/imxtract.rst b/doc/usage/cmd/imxtract.rst
index eb64b1c..235d15e 100644
--- a/doc/usage/cmd/imxtract.rst
+++ b/doc/usage/cmd/imxtract.rst
@@ -1,5 +1,8 @@
.. SPDX-License-Identifier: GPL-2.0+:
+.. index::
+ single: imxtract (command)
+
imxtract command
================
@@ -45,14 +48,14 @@
With verify=no incorrect hashes, signatures, or check sums don't stop the
extraction. But correct hashes are still indicated in the output
-(here: md5, sha1).
+(here: sha256, sha512).
.. code-block:: console
=> setenv verify no
=> imxtract $loadaddr kernel-1 $kernel_addr_r
## Copying 'kernel-1' subimage from FIT image at 40200000 ...
- md5+ sha1+ Loading part 0 ... OK
+ sha256+ sha512+ Loading part 0 ... OK
=>
With verify=yes incorrect hashes, signatures, or check sums stop the extraction.
@@ -62,7 +65,7 @@
=> setenv verify yes
=> imxtract $loadaddr kernel-1 $kernel_addr_r
## Copying 'kernel-1' subimage from FIT image at 40200000 ...
- md5 error!
+ sha256 error!
Bad hash value for 'hash-1' hash node in 'kernel-1' image node
Bad Data Hash
=>
diff --git a/doc/usage/cmd/load.rst b/doc/usage/cmd/load.rst
index 2c892ee..bfa45c6 100644
--- a/doc/usage/cmd/load.rst
+++ b/doc/usage/cmd/load.rst
@@ -1,5 +1,8 @@
.. SPDX-License-Identifier: GPL-2.0+:
+.. index::
+ single: load (command)
+
load command
============
diff --git a/doc/usage/cmd/loadb.rst b/doc/usage/cmd/loadb.rst
index 0464b1f..4f9a52c 100644
--- a/doc/usage/cmd/loadb.rst
+++ b/doc/usage/cmd/loadb.rst
@@ -1,5 +1,8 @@
.. SPDX-License-Identifier: GPL-2.0+:
+.. index::
+ single: loadb (command)
+
loadb command
=============
diff --git a/doc/usage/cmd/loadm.rst b/doc/usage/cmd/loadm.rst
index b657114..005840a 100644
--- a/doc/usage/cmd/loadm.rst
+++ b/doc/usage/cmd/loadm.rst
@@ -1,5 +1,8 @@
.. SPDX-License-Identifier: GPL-2.0+:
+.. index::
+ single: loadm (command)
+
loadm command
=============
diff --git a/doc/usage/cmd/loads.rst b/doc/usage/cmd/loads.rst
index e4cb063..0a2ac14 100644
--- a/doc/usage/cmd/loads.rst
+++ b/doc/usage/cmd/loads.rst
@@ -1,5 +1,8 @@
.. SPDX-License-Identifier: GPL-2.0+:
+.. index::
+ single: loads (command)
+
loads command
=============
diff --git a/doc/usage/cmd/loadx.rst b/doc/usage/cmd/loadx.rst
index facca9b..661b367 100644
--- a/doc/usage/cmd/loadx.rst
+++ b/doc/usage/cmd/loadx.rst
@@ -1,5 +1,8 @@
.. SPDX-License-Identifier: GPL-2.0+:
+.. index::
+ single: loadx (command)
+
loadx command
=============
diff --git a/doc/usage/cmd/loady.rst b/doc/usage/cmd/loady.rst
index 3f8227e..8367759 100644
--- a/doc/usage/cmd/loady.rst
+++ b/doc/usage/cmd/loady.rst
@@ -1,5 +1,8 @@
.. SPDX-License-Identifier: GPL-2.0+:
+.. index::
+ single: loady (command)
+
loady command
=============
diff --git a/doc/usage/cmd/mbr.rst b/doc/usage/cmd/mbr.rst
index bddf2f6..925a118 100644
--- a/doc/usage/cmd/mbr.rst
+++ b/doc/usage/cmd/mbr.rst
@@ -1,5 +1,8 @@
.. SPDX-License-Identifier: GPL-2.0+
+.. index::
+ single: mbr (command)
+
mbr command
===========
diff --git a/doc/usage/cmd/md.rst b/doc/usage/cmd/md.rst
index 7e9944e..9ea148a 100644
--- a/doc/usage/cmd/md.rst
+++ b/doc/usage/cmd/md.rst
@@ -1,5 +1,8 @@
.. SPDX-License-Identifier: GPL-2.0+:
+.. index::
+ single: md (command)
+
md command
==========
diff --git a/doc/usage/cmd/mmc.rst b/doc/usage/cmd/mmc.rst
index 8394f64..5a64400 100644
--- a/doc/usage/cmd/mmc.rst
+++ b/doc/usage/cmd/mmc.rst
@@ -1,5 +1,8 @@
.. SPDX-License-Identifier: GPL-2.0+:
+.. index::
+ single: mmc (command)
+
mmc command
===========
diff --git a/doc/usage/cmd/mtest.rst b/doc/usage/cmd/mtest.rst
index 81d1f8f..e01f2a6 100644
--- a/doc/usage/cmd/mtest.rst
+++ b/doc/usage/cmd/mtest.rst
@@ -1,6 +1,9 @@
.. SPDX-License-Identifier: GPL-2.0+
.. Copyright 2022, Heinrich Schuchardt <xypron.glpk@gmx.de>
+.. index::
+ single: mtest (command)
+
mtest command
=============
diff --git a/doc/usage/cmd/mtrr.rst b/doc/usage/cmd/mtrr.rst
index 531153b..c656189 100644
--- a/doc/usage/cmd/mtrr.rst
+++ b/doc/usage/cmd/mtrr.rst
@@ -1,5 +1,8 @@
.. SPDX-License-Identifier: GPL-2.0+:
+.. index::
+ single: mtrr (command)
+
mtrr command
============
diff --git a/doc/usage/cmd/panic.rst b/doc/usage/cmd/panic.rst
index 115eba5..ba5ea62 100644
--- a/doc/usage/cmd/panic.rst
+++ b/doc/usage/cmd/panic.rst
@@ -1,5 +1,8 @@
.. SPDX-License-Identifier: GPL-2.0+:
+.. index::
+ single: panic (command)
+
panic command
=============
diff --git a/doc/usage/cmd/part.rst b/doc/usage/cmd/part.rst
index eee5225..58be387 100644
--- a/doc/usage/cmd/part.rst
+++ b/doc/usage/cmd/part.rst
@@ -1,5 +1,8 @@
.. SPDX-License-Identifier: GPL-2.0+:
+.. index::
+ single: part (command)
+
part command
============
diff --git a/doc/usage/cmd/pause.rst b/doc/usage/cmd/pause.rst
index c79e399..6cdd83d 100644
--- a/doc/usage/cmd/pause.rst
+++ b/doc/usage/cmd/pause.rst
@@ -1,5 +1,8 @@
.. SPDX-License-Identifier: GPL-2.0-or-later:
+.. index::
+ single: pause (command)
+
pause command
=============
diff --git a/doc/usage/cmd/pinmux.rst b/doc/usage/cmd/pinmux.rst
index 9f4392c..30c5eb1 100644
--- a/doc/usage/cmd/pinmux.rst
+++ b/doc/usage/cmd/pinmux.rst
@@ -1,5 +1,8 @@
.. SPDX-License-Identifier: GPL-2.0+:
+.. index::
+ single: pinmux (command)
+
pinmux command
==============
diff --git a/doc/usage/cmd/printenv.rst b/doc/usage/cmd/printenv.rst
index d4184fd..dfdb362 100644
--- a/doc/usage/cmd/printenv.rst
+++ b/doc/usage/cmd/printenv.rst
@@ -1,5 +1,8 @@
.. SPDX-License-Identifier: GPL-2.0+:
+.. index::
+ single: printenv (command)
+
printenv command
================
diff --git a/doc/usage/cmd/pstore.rst b/doc/usage/cmd/pstore.rst
index 1c83745..63a4371 100644
--- a/doc/usage/cmd/pstore.rst
+++ b/doc/usage/cmd/pstore.rst
@@ -1,5 +1,8 @@
.. SPDX-License-Identifier: GPL-2.0+
+.. index::
+ single: pstore (command)
+
pstore command
==============
diff --git a/doc/usage/cmd/qfw.rst b/doc/usage/cmd/qfw.rst
index e734b26..40770ac 100644
--- a/doc/usage/cmd/qfw.rst
+++ b/doc/usage/cmd/qfw.rst
@@ -1,5 +1,8 @@
.. SPDX-License-Identifier: GPL-2.0+
+.. index::
+ single: qfw (command)
+
qfw command
===========
diff --git a/doc/usage/cmd/reset.rst b/doc/usage/cmd/reset.rst
index 384d5d6..126db21 100644
--- a/doc/usage/cmd/reset.rst
+++ b/doc/usage/cmd/reset.rst
@@ -1,5 +1,8 @@
.. SPDX-License-Identifier: GPL-2.0+
+.. index::
+ single: reset (command)
+
reset command
=============
diff --git a/doc/usage/cmd/rng.rst b/doc/usage/cmd/rng.rst
index 1a352da..274e4d8 100644
--- a/doc/usage/cmd/rng.rst
+++ b/doc/usage/cmd/rng.rst
@@ -1,5 +1,8 @@
.. SPDX-License-Identifier: GPL-2.0+
+.. index::
+ single: rng (command)
+
rng command
===========
diff --git a/doc/usage/cmd/saves.rst b/doc/usage/cmd/saves.rst
index 5823f88..b380a4f 100644
--- a/doc/usage/cmd/saves.rst
+++ b/doc/usage/cmd/saves.rst
@@ -1,5 +1,8 @@
.. SPDX-License-Identifier: GPL-2.0+:
+.. index::
+ single: saves (command)
+
saves command
=============
diff --git a/doc/usage/cmd/sbi.rst b/doc/usage/cmd/sbi.rst
index 713e0b9..5492925 100644
--- a/doc/usage/cmd/sbi.rst
+++ b/doc/usage/cmd/sbi.rst
@@ -1,5 +1,8 @@
.. SPDX-License-Identifier: GPL-2.0+
+.. index::
+ single: sbi (command)
+
sbi command
===========
diff --git a/doc/usage/cmd/scmi.rst b/doc/usage/cmd/scmi.rst
new file mode 100644
index 0000000..9591cdc
--- /dev/null
+++ b/doc/usage/cmd/scmi.rst
@@ -0,0 +1,129 @@
+.. SPDX-License-Identifier: GPL-2.0+:
+
+.. index::
+ single: scmi (command)
+
+scmi command
+============
+
+Synopsis
+--------
+
+::
+
+ scmi info
+ scmi perm_dev <agent id> <device id> <flags>
+ scmi perm_proto <agent id> <device id> <protocol id> <flags>
+ scmi reset <agent id> <flags>
+
+Description
+-----------
+
+Arm System Control and Management Interface (SCMI hereafter) is a set of
+standardised interfaces to manage system resources, like clocks, power
+domains, pin controls, reset and so on, in a system-wide manner.
+
+An entity which provides those services is called a SCMI firmware (or
+SCMI server if you like) may be placed/implemented by EL3 software or
+by a dedicated system control processor (SCP) or else.
+
+A user of SCMI interfaces, including U-Boot, is called a SCMI agent and
+may issues commands, which are defined in each protocol for specific system
+resources, to SCMI server via a communication channel, called a transport.
+Those interfaces are independent from the server's implementation thanks to
+a transport layer.
+
+For more details, see the `SCMI specification`_.
+
+While most of system resources managed under SCMI protocols are implemented
+and handled as standard U-Boot devices, for example clk_scmi, scmi command
+provides additional management functionality against SCMI server.
+
+scmi info
+~~~~~~~~~
+ Show base information about SCMI server and supported protocols
+
+scmi perm_dev
+~~~~~~~~~~~~~
+ Allow or deny access permission to the device
+
+scmi perm_proto
+~~~~~~~~~~~~~~~
+ Allow or deny access to the protocol on the device
+
+scmi reset
+~~~~~~~~~~
+ Reset the already-configured permissions against the device
+
+Parameters are used as follows:
+
+<agent id>
+ SCMI Agent ID, hex value
+
+<device id>
+ SCMI Device ID, hex value
+
+ Please note that what a device means is not defined
+ in the specification.
+
+<protocol id>
+ SCMI Protocol ID, hex value
+
+ It must not be 0x10 (base protocol)
+
+<flags>
+ Flags to control the action, hex value
+
+ 0 to deny, 1 to allow. The other values are reserved and allowed
+ values may depend on the implemented version of SCMI server in
+ the future. See SCMI specification for more details.
+
+Example
+-------
+
+Obtain basic information about SCMI server:
+
+::
+
+ => scmi info
+ SCMI device: scmi
+ protocol version: 0x20000
+ # of agents: 3
+ 0: platform
+ > 1: OSPM
+ 2: PSCI
+ # of protocols: 4
+ Power domain management
+ Performance domain management
+ Clock management
+ Sensor management
+ vendor: Linaro
+ sub vendor: PMWG
+ impl version: 0x20b0000
+
+Ask for access permission to device#0:
+
+::
+
+ => scmi perm_dev 1 0 1
+
+Reset configurations with all access permission settings retained:
+
+::
+
+ => scmi reset 1 0
+
+Configuration
+-------------
+
+The scmi command is only available if CONFIG_CMD_SCMI=y.
+Default n because this command is mainly for debug purpose.
+
+Return value
+------------
+
+The return value ($?) is set to 0 if the operation succeeded,
+1 if the operation failed or -1 if the operation failed due to
+a syntax error.
+
+.. _`SCMI specification`: https://developer.arm.com/documentation/den0056/e/?lang=en
diff --git a/doc/usage/cmd/scp03.rst b/doc/usage/cmd/scp03.rst
index 7ff87ed..5fdddb3 100644
--- a/doc/usage/cmd/scp03.rst
+++ b/doc/usage/cmd/scp03.rst
@@ -1,5 +1,8 @@
.. SPDX-License-Identifier: GPL-2.0+
+.. index::
+ single: scp03 (command)
+
scp03 command
=============
diff --git a/doc/usage/cmd/seama.rst b/doc/usage/cmd/seama.rst
index 356c00a..17fd559 100644
--- a/doc/usage/cmd/seama.rst
+++ b/doc/usage/cmd/seama.rst
@@ -1,5 +1,8 @@
.. SPDX-License-Identifier: GPL-2.0+:
+.. index::
+ single: seama (command)
+
seama command
=============
diff --git a/doc/usage/cmd/setexpr.rst b/doc/usage/cmd/setexpr.rst
index 4d19fa3..d245a13 100644
--- a/doc/usage/cmd/setexpr.rst
+++ b/doc/usage/cmd/setexpr.rst
@@ -1,5 +1,8 @@
.. SPDX-License-Identifier: GPL-2.0+
+.. index::
+ single: setexpr (command)
+
setexpr command
===============
diff --git a/doc/usage/cmd/sf.rst b/doc/usage/cmd/sf.rst
index 71bd1be..24d5dc6 100644
--- a/doc/usage/cmd/sf.rst
+++ b/doc/usage/cmd/sf.rst
@@ -1,5 +1,8 @@
.. SPDX-License-Identifier: GPL-2.0+:
+.. index::
+ single: sf (command)
+
sf command
==========
diff --git a/doc/usage/cmd/size.rst b/doc/usage/cmd/size.rst
index f0c35e4..306fcba 100644
--- a/doc/usage/cmd/size.rst
+++ b/doc/usage/cmd/size.rst
@@ -1,5 +1,8 @@
.. SPDX-License-Identifier: GPL-2.0+
+.. index::
+ single: size (command)
+
size command
============
diff --git a/doc/usage/cmd/sleep.rst b/doc/usage/cmd/sleep.rst
index d19e5b3..a372e4d 100644
--- a/doc/usage/cmd/sleep.rst
+++ b/doc/usage/cmd/sleep.rst
@@ -1,6 +1,9 @@
.. SPDX-License-Identifier: GPL-2.0+
.. Copyright 2023, Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
+.. index::
+ single: sleep (command)
+
sleep command
=============
diff --git a/doc/usage/cmd/sm.rst b/doc/usage/cmd/sm.rst
index f6524a1..b767647 100644
--- a/doc/usage/cmd/sm.rst
+++ b/doc/usage/cmd/sm.rst
@@ -1,5 +1,8 @@
.. SPDX-License-Identifier: GPL-2.0+:
+.. index::
+ single: sm (command)
+
sm command
==========
diff --git a/doc/usage/cmd/smbios.rst b/doc/usage/cmd/smbios.rst
new file mode 100644
index 0000000..1ffd706
--- /dev/null
+++ b/doc/usage/cmd/smbios.rst
@@ -0,0 +1,93 @@
+.. SPDX-License-Identifier: GPL-2.0-or-later:
+
+smbios command
+==============
+
+Synopsis
+--------
+
+::
+
+ smbios
+
+Description
+-----------
+
+The smbios command displays information from the SMBIOS tables.
+
+Examples
+--------
+
+The example below shows an example output of the smbios command.
+
+::
+
+ => smbios
+ SMBIOS 2.8.0 present.
+ 8 structures occupying 81 bytes
+ Table at 0x6d35018
+
+ Handle 0x0100, DMI type 1, 27 bytes at 0x6d35018
+ System Information
+ Manufacturer: QEMU
+ Product Name: Standard PC (i440FX + PIIX, 1996)
+ Version: pc-i440fx-2.5
+ Serial Number:
+ UUID 00000000-0000-0000-0000-000000000000
+ Wake Up Type:
+ Serial Number:
+ SKU Number:
+
+ Handle 0x0300, DMI type 3, 22 bytes at 0x6d35069
+ Header and Data:
+ 00000000: 03 16 00 03 01 01 02 00 00 03 03 03 02 00 00 00
+ 00000010: 00 00 00 00 00 00
+ Strings:
+ String 1: QEMU
+ String 2: pc-i440fx-2.5
+
+ Handle 0x0400, DMI type 4, 42 bytes at 0x6d35093
+ Header and Data:
+ 00000000: 04 2a 00 04 01 03 01 02 63 06 00 00 fd ab 81 07
+ 00000010: 03 00 00 00 d0 07 d0 07 41 01 ff ff ff ff ff ff
+ 00000020: 00 00 00 01 01 01 02 00 01 00
+ Strings:
+ String 1: CPU 0
+ String 2: QEMU
+ String 3: pc-i440fx-2.5
+
+ Handle 0x1000, DMI type 16, 23 bytes at 0x6d350d7
+ Header and Data:
+ 00000000: 10 17 00 10 01 03 06 00 00 02 00 fe ff 01 00 00
+ 00000010: 00 00 00 00 00 00 00
+
+ Handle 0x1100, DMI type 17, 40 bytes at 0x6d350f0
+ Header and Data:
+ 00000000: 11 28 00 11 00 10 fe ff ff ff ff ff 80 00 09 00
+ 00000010: 01 00 07 02 00 00 00 02 00 00 00 00 00 00 00 00
+ 00000020: 00 00 00 00 00 00 00 00
+ Strings:
+ String 1: DIMM 0
+ String 2: QEMU
+
+ Handle 0x1300, DMI type 19, 31 bytes at 0x6d35125
+ Header and Data:
+ 00000000: 13 1f 00 13 00 00 00 00 ff ff 01 00 00 10 01 00
+ 00000010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+
+ Handle 0x2000, DMI type 32, 11 bytes at 0x6d35146
+ Header and Data:
+ 00000000: 20 0b 00 20 00 00 00 00 00 00 00
+
+ Handle 0x7f00, DMI type 127, 4 bytes at 0x6d35153
+ End Of Table
+
+Configuration
+-------------
+
+The command is only available if CONFIG_CMD_SMBIOS=y.
+
+Return value
+------------
+
+The return value $? is 0 (true) on success, 1 (false) otherwise.
diff --git a/doc/usage/cmd/sound.rst b/doc/usage/cmd/sound.rst
index 2cfe9b7..97d610f 100644
--- a/doc/usage/cmd/sound.rst
+++ b/doc/usage/cmd/sound.rst
@@ -1,6 +1,9 @@
.. SPDX-License-Identifier: GPL-2.0+
.. Copyright 2022, Heinrich Schuchardt <xypron.glpk@gmx.de>
+.. index::
+ single: sound (command)
+
sound command
=============
diff --git a/doc/usage/cmd/source.rst b/doc/usage/cmd/source.rst
index 697f644..0de5f33 100644
--- a/doc/usage/cmd/source.rst
+++ b/doc/usage/cmd/source.rst
@@ -1,6 +1,9 @@
.. SPDX-License-Identifier: GPL-2.0+
.. Copyright 2022, Heinrich Schuchardt <xypron.glpk@gmx.de>
+.. index::
+ single: source (command)
+
source command
==============
diff --git a/doc/usage/cmd/temperature.rst b/doc/usage/cmd/temperature.rst
index a5144ec..945bc82 100644
--- a/doc/usage/cmd/temperature.rst
+++ b/doc/usage/cmd/temperature.rst
@@ -1,5 +1,8 @@
.. SPDX-License-Identifier: GPL-2.0-or-later
+.. index::
+ single: temperature (command)
+
temperature command
===================
diff --git a/doc/usage/cmd/tftpput.rst b/doc/usage/cmd/tftpput.rst
index 52ba7b1..351c9fa 100644
--- a/doc/usage/cmd/tftpput.rst
+++ b/doc/usage/cmd/tftpput.rst
@@ -1,5 +1,8 @@
.. SPDX-License-Identifier: GPL-2.0+:
+.. index::
+ single: tftpput (command)
+
tftpput command
===============
diff --git a/doc/usage/cmd/trace.rst b/doc/usage/cmd/trace.rst
index 3bdf4f0..ad6db12 100644
--- a/doc/usage/cmd/trace.rst
+++ b/doc/usage/cmd/trace.rst
@@ -1,5 +1,8 @@
.. SPDX-License-Identifier: GPL-2.0+:
+.. index::
+ single: trace (command)
+
trace command
=============
diff --git a/doc/usage/cmd/true.rst b/doc/usage/cmd/true.rst
index f9ef71b..adf6413 100644
--- a/doc/usage/cmd/true.rst
+++ b/doc/usage/cmd/true.rst
@@ -1,3 +1,6 @@
+.. index::
+ single: true (command)
+
true command
============
diff --git a/doc/usage/cmd/ums.rst b/doc/usage/cmd/ums.rst
index 3cde5fa..9d379e3 100644
--- a/doc/usage/cmd/ums.rst
+++ b/doc/usage/cmd/ums.rst
@@ -1,5 +1,8 @@
.. SPDX-License-Identifier: GPL-2.0+
+.. index::
+ single: ums (command)
+
ums command
===========
diff --git a/doc/usage/cmd/unbind.rst b/doc/usage/cmd/unbind.rst
index 594e4f0..0309e90 100644
--- a/doc/usage/cmd/unbind.rst
+++ b/doc/usage/cmd/unbind.rst
@@ -1,5 +1,8 @@
.. SPDX-License-Identifier: GPL-2.0+:
+.. index::
+ single: unbind (command)
+
unbind command
==============
diff --git a/doc/usage/cmd/ut.rst b/doc/usage/cmd/ut.rst
index a303963..ddc48ec 100644
--- a/doc/usage/cmd/ut.rst
+++ b/doc/usage/cmd/ut.rst
@@ -1,5 +1,8 @@
.. SPDX-License-Identifier: GPL-2.0+:
+.. index::
+ single: ut (command)
+
ut command
==========
diff --git a/doc/usage/cmd/wdt.rst b/doc/usage/cmd/wdt.rst
index 8bb8b36..f48b884 100644
--- a/doc/usage/cmd/wdt.rst
+++ b/doc/usage/cmd/wdt.rst
@@ -1,5 +1,8 @@
.. SPDX-License-Identifier: GPL-2.0+:
+.. index::
+ single: wdt (command)
+
wdt command
===========
diff --git a/doc/usage/cmd/wget.rst b/doc/usage/cmd/wget.rst
index e1e7f8d..b8ca35b 100644
--- a/doc/usage/cmd/wget.rst
+++ b/doc/usage/cmd/wget.rst
@@ -1,5 +1,8 @@
.. SPDX-License-Identifier: GPL-2.0+:
+.. index::
+ single: wget (command)
+
wget command
============
@@ -16,7 +19,8 @@
The wget command is used to download a file from an HTTP server.
wget command will use HTTP over TCP to download files from an HTTP server.
-Currently it can only download image from an HTTP server hosted on port 80.
+By default the destination port is 80 and the source port is pseudo-random.
+The environment variable *httpdstp* can be used to set the destination port.
address
memory address for the data downloaded
diff --git a/doc/usage/cmd/write.rst b/doc/usage/cmd/write.rst
index c16870d..f42dc00 100644
--- a/doc/usage/cmd/write.rst
+++ b/doc/usage/cmd/write.rst
@@ -1,5 +1,8 @@
.. SPDX-License-Identifier: GPL-2.0-or-later:
+.. index::
+ single: write (command)
+
write command
=============
diff --git a/doc/usage/cmd/xxd.rst b/doc/usage/cmd/xxd.rst
index 13bb438..f010a9d 100644
--- a/doc/usage/cmd/xxd.rst
+++ b/doc/usage/cmd/xxd.rst
@@ -1,5 +1,8 @@
.. SPDX-License-Identifier: GPL-2.0+:
+.. index::
+ single: xxd (command)
+
xxd command
===========
diff --git a/doc/usage/dfu.rst b/doc/usage/dfu.rst
index 8845a71..8cc09c3 100644
--- a/doc/usage/dfu.rst
+++ b/doc/usage/dfu.rst
@@ -6,11 +6,11 @@
Overview
--------
-The Device Firmware Upgrade (DFU) allows to download and upload firmware
-to/from U-Boot connected over USB.
+Device Firmware Upgrade (DFU) enables the download and upload of firmware
+to/from U-Boot while connected over USB.
U-Boot follows the Universal Serial Bus Device Class Specification for
-Device Firmware Upgrade Version 1.1 the USB forum (DFU v1.1 in www.usb.org).
+Device Firmware Upgrade Version 1.1 from the USB forum (DFU v1.1 in www.usb.org).
U-Boot implements this DFU capability (CONFIG_DFU) with the command dfu
(cmd/dfu.c / CONFIG_CMD_DFU) based on:
@@ -43,7 +43,7 @@
Configuration Options
---------------------
-The following configuration option are relevant for device firmware upgrade:
+The following configuration options are relevant to device firmware upgrade:
* CONFIG_DFU
* CONFIG_DFU_OVER_USB
@@ -60,7 +60,7 @@
Environment variables
---------------------
-The dfu command uses 3 environments variables:
+The dfu command uses 3 environment variables:
dfu_alt_info
The DFU setting for the USB download gadget with a semicolon separated
@@ -90,17 +90,17 @@
--------
dfu <USB_controller> [<interface> <dev>] list
- list the alternate device defined in *dfu_alt_info*
+ List the alternate device defined in *dfu_alt_info*.
dfu <USB_controller> [<interface> <dev>] [<timeout>]
- start the dfu stack on the USB instance with the selected medium
+ Start the dfu stack on the USB instance with the selected medium
backend and use the *dfu_alt_info* variable to configure the
- alternate setting and link each one with the medium
- The dfu command continue until receive a ^C in console or
- a DFU detach transaction from HOST. If CONFIG_DFU_TIMEOUT option
- is enabled and <timeout> parameter is present in the command line,
+ alternate setting and link each one with the medium.
+ The dfu command continues until it receives a ^C in the console or
+ a DFU detach transaction from the HOST. If the CONFIG_DFU_TIMEOUT option
+ is enabled and a <timeout> parameter is present in the command line,
the DFU operation will be aborted automatically after <timeout>
- seconds of waiting remote to initiate DFU session.
+ seconds of waiting for the remote to initiate a DFU session.
The possible values of <interface> are (with <USB controller> = 0 in the dfu
command example)
@@ -139,11 +139,11 @@
u-boot raw 0x80 0x800;uImage ext4 0 2
- If don't want to flash given image file to storage, use "skip" type
- entity.
+ If you don't want to flash the given image file to storage, use the "skip"
+ type entity.
- - It can be used to protect flashing wrong image for the specific board.
- - Especailly, this layout will be useful when thor protocol is used,
+ - It can be used to protect from flashing the wrong image for the specific board.
+ - Especially, this layout will be useful when the thor protocol is used,
which performs flashing in batch mode, where more than one file is
processed.
@@ -153,18 +153,18 @@
u-boot-<board1>.bin raw 0x80 0x800; u-boot-<board2>.bin skip 0 0
- When flashing new system image requires do some more complex things
- than just writing data to the storage medium, one can use 'script'
- type. Data written to such entity will be executed as a command list
- in the u-boot's shell. This for example allows to re-create partition
- layout and even set new *dfu_alt_info* for the newly created paritions.
- Such script would look like::
+ When flashing a new system image requires you to do some more complex
+ things than just writing data to the storage medium, one can use 'script'
+ type. Data written to such an entity will be executed as a command list
+ in the u-boot's shell. This for example allows you to re-create a partition
+ layout and even set a new *dfu_alt_info* for the newly created partitions.
+ Such a script would look like::
setenv dfu_alt_info ...
setenv mbr_parts ...
mbr write ...
- Please note that this means that user will be able to execute any
+ Please note that this means the user will be able to execute any
arbitrary commands just like in the u-boot's shell.
nand
@@ -216,8 +216,8 @@
each element in *dfu_alt_info* being either of:
* <name> raw <offset> <size> raw access to sf device
- * <name> part <dev_id> <part_id> raw acces to partition
- * <name> partubi <dev_id> <part_id> raw acces to ubi partition
+ * <name> part <dev_id> <part_id> raw access to partition
+ * <name> partubi <dev_id> <part_id> raw access to ubi partition
with
@@ -288,17 +288,17 @@
The weak callback functions can be implemented to manage specific behavior
dfu_initiated_callback
- called when the DFU transaction is started, used to initiase the device
+ called when the DFU transaction is started, used to initialize the device
dfu_flush_callback
called at the end of the DFU write after DFU manifestation, used to manage
- the device when DFU transaction is closed
+ the device when the DFU transaction is closed
Host tools
----------
When U-Boot runs the dfu stack, the DFU host tools can be used
-to send/receive firmwares on each configurated alternate.
+to send/receive firmware images on each configured alternate.
For example dfu-util is a host side implementation of the DFU 1.1
specifications(http://dfu-util.sourceforge.net/) which works with U-Boot.
@@ -409,8 +409,8 @@
Example 3
-firmware located in SD Card (mmc) and virtual partition on OTP and PMIC not
-volatile memory
+firmware located in SD Card (mmc) and virtual partition on OTP and PMIC
+non-volatile memory
- alternate 1 (alt=1) for scard
- alternate 2 (alt=2) for OTP (virtual)
diff --git a/doc/usage/environment.rst b/doc/usage/environment.rst
index c57b717..82b6ea7 100644
--- a/doc/usage/environment.rst
+++ b/doc/usage/environment.rst
@@ -306,6 +306,10 @@
anything other than "no", U-Boot does go through all
available network interfaces.
+httpdstp
+ If this is set, the value is used for HTTP's TCP
+ destination port instead of the default port 80.
+
netretry
When set to "no" each network operation will
either succeed or fail without retrying.
diff --git a/doc/usage/fit/beaglebone_vboot.rst b/doc/usage/fit/beaglebone_vboot.rst
index a102be1..cd6bb14 100644
--- a/doc/usage/fit/beaglebone_vboot.rst
+++ b/doc/usage/fit/beaglebone_vboot.rst
@@ -145,7 +145,7 @@
load = <0x80008000>;
entry = <0x80008000>;
hash-1 {
- algo = "sha1";
+ algo = "sha256";
};
};
fdt-1 {
@@ -155,7 +155,7 @@
arch = "arm";
compression = "none";
hash-1 {
- algo = "sha1";
+ algo = "sha256";
};
};
};
@@ -165,7 +165,7 @@
kernel = "kernel";
fdt = "fdt-1";
signature-1 {
- algo = "sha1,rsa2048";
+ algo = "sha256,rsa2048";
key-name-hint = "dev";
sign-images = "fdt", "kernel";
};
@@ -227,8 +227,8 @@
OS: Linux
Load Address: 0x80008000
Entry Point: 0x80008000
- Hash algo: sha1
- Hash value: c94364646427e10f423837e559898ef02c97b988
+ Hash algo: sha256
+ Hash value: 51b2adf9c1016ed46f424d85dcc6c34c46a20b9bee7227e06a6b6320ca5d35c1
Image 1 (fdt-1)
Description: beaglebone-black
Created: Sun Jun 1 12:50:30 2014
@@ -236,8 +236,8 @@
Compression: uncompressed
Data Size: 31547 Bytes = 30.81 kB = 0.03 MB
Architecture: ARM
- Hash algo: sha1
- Hash value: cb09202f889d824f23b8e4404b781be5ad38a68d
+ Hash algo: sha256
+ Hash value: 807d5842a04132261ba092373bd40c78991bc7ce173d1175cd976ec37858e7cd
Default Configuration: 'conf-1'
Configuration 0 (conf-1)
Description: unavailable
@@ -255,11 +255,11 @@
which results in::
- Verifying Hash Integrity ... sha1,rsa2048:dev+
+ Verifying Hash Integrity ... sha256,rsa2048:dev+
## Loading kernel from FIT Image at 7fc6ee469000 ...
Using 'conf-1' configuration
Verifying Hash Integrity ...
- sha1,rsa2048:dev+
+ sha256,rsa2048:dev+
OK
Trying 'kernel' kernel subimage
@@ -272,10 +272,10 @@
OS: Linux
Load Address: 0x80008000
Entry Point: 0x80008000
- Hash algo: sha1
- Hash value: c94364646427e10f423837e559898ef02c97b988
+ Hash algo: sha256
+ Hash value: 51b2adf9c1016ed46f424d85dcc6c34c46a20b9bee7227e06a6b6320ca5d35c1
Verifying Hash Integrity ...
- sha1+
+ sha256+
OK
Unimplemented compression type 4
@@ -288,10 +288,10 @@
Compression: uncompressed
Data Size: 31547 Bytes = 30.81 kB = 0.03 MB
Architecture: ARM
- Hash algo: sha1
- Hash value: cb09202f889d824f23b8e4404b781be5ad38a68d
+ Hash algo: sha256
+ Hash value: 807d5842a04132261ba092373bd40c78991bc7ce173d1175cd976ec37858e7cd
Verifying Hash Integrity ...
- sha1+
+ sha256+
OK
Loading Flat Device Tree ... OK
@@ -303,14 +303,14 @@
Signature check OK
-At the top, you see "sha1,rsa2048:dev+". This means that it checked an RSA key
-of size 2048 bits using SHA1 as the hash algorithm. The key name checked was
+At the top, you see "sha256,rsa2048:dev+". This means that it checked an RSA key
+of size 2048 bits using SHA256 as the hash algorithm. The key name checked was
'dev' and the '+' means that it verified. If it showed '-' that would be bad.
Once the configuration is verified it is then possible to rely on the hashes
in each image referenced by that configuration. So fit_check_sign goes on to
load each of the images. We have a kernel and an FDT but no ramkdisk. In each
-case fit_check_sign checks the hash and prints sha1+ meaning that the SHA1
+case fit_check_sign checks the hash and prints sha256+ meaning that the SHA256
hash verified. This means that none of the images has been tampered with.
There is a test in test/vboot which uses U-Boot's sandbox build to verify that
@@ -328,11 +328,11 @@
and extends for about 7MB. Try changing a byte at 0x2000 (say) and run
fit_check_sign again. You should see something like::
- Verifying Hash Integrity ... sha1,rsa2048:dev+
+ Verifying Hash Integrity ... sha256,rsa2048:dev+
## Loading kernel from FIT Image at 7f5a39571000 ...
Using 'conf-1' configuration
Verifying Hash Integrity ...
- sha1,rsa2048:dev+
+ sha256,rsa2048:dev+
OK
Trying 'kernel' kernel subimage
@@ -345,10 +345,10 @@
OS: Linux
Load Address: 0x80008000
Entry Point: 0x80008000
- Hash algo: sha1
- Hash value: c94364646427e10f423837e559898ef02c97b988
+ Hash algo: sha256
+ Hash value: 51b2adf9c1016ed46f424d85dcc6c34c46a20b9bee7227e06a6b6320ca5d35c1
Verifying Hash Integrity ...
- sha1 error
+ sha256 error
Bad hash value for 'hash-1' hash node in 'kernel' image node
Bad Data Hash
@@ -361,10 +361,10 @@
Compression: uncompressed
Data Size: 31547 Bytes = 30.81 kB = 0.03 MB
Architecture: ARM
- Hash algo: sha1
- Hash value: cb09202f889d824f23b8e4404b781be5ad38a68d
+ Hash algo: sha256
+ Hash value: 807d5842a04132261ba092373bd40c78991bc7ce173d1175cd976ec37858e7cd
Verifying Hash Integrity ...
- sha1+
+ sha256+
OK
Loading Flat Device Tree ... OK
@@ -419,13 +419,13 @@
the hash::
fdtget -tx image.fit /images/kernel/hash-1 value
- c9436464 6427e10f 423837e5 59898ef0 2c97b988
- fdtput -tx image.fit /images/kernel/hash-1 value c9436464 6427e10f 423837e5 59898ef0 2c97b981
+ 51b2adf9 c1016ed4 6f424d85 dcc6c34c 46a20b9b ee7227e0 6a6b6320 ca5d35c1
+ fdtput -tx image.fit /images/kernel/hash-1 value 51b2adf9 c1016ed4 6f424d85 dcc6c34c 46a20b9b ee7227e0 6a6b6320 ca5d35c8
Now check it again::
$UOUT/tools/fit_check_sign -f image.fit -k am335x-boneblack-pubkey.dtb
- Verifying Hash Integrity ... sha1,rsa2048:devrsa_verify_with_keynode: RSA failed to verify: -13
+ Verifying Hash Integrity ... sha256,rsa2048:devrsa_verify_with_keynode: RSA failed to verify: -13
rsa_verify_with_keynode: RSA failed to verify: -13
-
Failed to verify required signature 'key-dev'
@@ -446,7 +446,7 @@
fdtput -p image.fit /configurations/conf-1/signature-1 value fred
$UOUT/tools/fit_check_sign -f image.fit -k am335x-boneblack-pubkey.dtb
Verifying Hash Integrity ... -
- sha1,rsa2048:devrsa_verify_with_keynode: RSA failed to verify: -13
+ sha256,rsa2048:devrsa_verify_with_keynode: RSA failed to verify: -13
rsa_verify_with_keynode: RSA failed to verify: -13
-
Failed to verify required signature 'key-dev'
@@ -528,7 +528,7 @@
U-Boot# bootm 82000000
## Loading kernel from FIT Image at 82000000 ...
Using 'conf-1' configuration
- Verifying Hash Integrity ... sha1,rsa2048:dev+ OK
+ Verifying Hash Integrity ... sha256,rsa2048:dev+ OK
Trying 'kernel' kernel subimage
Description: unavailable
Created: 2014-06-01 19:32:54 UTC
@@ -540,9 +540,9 @@
OS: Linux
Load Address: 0x80008000
Entry Point: 0x80008000
- Hash algo: sha1
- Hash value: c94364646427e10f423837e559898ef02c97b988
- Verifying Hash Integrity ... sha1+ OK
+ Hash algo: sha256
+ Hash value: 51b2adf9c1016ed46f424d85dcc6c34c46a20b9bee7227e06a6b6320ca5d35c1
+ Verifying Hash Integrity ... sha256+ OK
## Loading fdt from FIT Image at 82000000 ...
Using 'conf-1' configuration
Trying 'fdt-1' fdt subimage
@@ -553,9 +553,9 @@
Data Start: 0x8276e2ec
Data Size: 31547 Bytes = 30.8 KiB
Architecture: ARM
- Hash algo: sha1
- Hash value: cb09202f889d824f23b8e4404b781be5ad38a68d
- Verifying Hash Integrity ... sha1+ OK
+ Hash algo: sha256
+ Hash value: 807d5842a04132261ba092373bd40c78991bc7ce173d1175cd976ec37858e7cd
+ Verifying Hash Integrity ... sha256+ OK
Booting using the fdt blob at 0x8276e2ec
Uncompressing Kernel Image ... OK
Loading Device Tree to 8fff5000, end 8ffffb3a ... OK
diff --git a/doc/usage/fit/howto.rst b/doc/usage/fit/howto.rst
index def12a7..b5097d4 100644
--- a/doc/usage/fit/howto.rst
+++ b/doc/usage/fit/howto.rst
@@ -8,7 +8,7 @@
The new uImage format allows more flexibility in handling images of various
types (kernel, ramdisk, etc.), it also enhances integrity protection of images
-with sha1 and md5 checksums.
+with cryptographic checksums.
Two auxiliary tools are needed on the development host system in order to
create an uImage in the new format: mkimage and dtc, although only one
@@ -99,7 +99,7 @@
load = <0x8 0x8000000>;
entry = <0x8 0x8000000>;
hash {
- algo = "md5";
+ algo = "sha256";
};
};
atf {
@@ -112,7 +112,7 @@
load = <0xfffea000>;
entry = <0xfffea000>;
hash {
- algo = "md5";
+ algo = "sha256";
};
};
fdt_1 {
@@ -123,7 +123,7 @@
compression = "none";
load = <0x100000>;
hash {
- algo = "md5";
+ algo = "sha256";
};
};
};
@@ -190,8 +190,8 @@
Entry Point: 0x00000000
Hash algo: crc32
Hash value: 2ae2bb40
- Hash algo: sha1
- Hash value: 3c200f34e2c226ddc789240cca0c59fc54a67cf4
+ Hash algo: sha256
+ Hash value: c22f6bb5a3f96942507a37e7d6a9333ebdc7da57971bc4c082113fe082fdc40f
Default Configuration: 'config-1'
Configuration 0 (config-1)
Description: Boot Linux kernel
@@ -236,8 +236,8 @@
Entry Point: 0x00000000
Hash algo: crc32
Hash value: 2ae2bb40
- Hash algo: sha1
- Hash value: 3c200f34e2c226ddc789240cca0c59fc54a67cf4
+ Hash algo: sha256
+ Hash value: c22f6bb5a3f96942507a37e7d6a9333ebdc7da57971bc4c082113fe082fdc40f
Default Configuration: 'config-1'
Configuration 0 (config-1)
Description: Boot Linux kernel
@@ -258,8 +258,8 @@
Entry Point: 0x00000000
Hash algo: crc32
Hash value: 2ae2bb40
- Hash algo: sha1
- Hash value: 3c200f34e2c226ddc789240cca0c59fc54a67cf4
+ Hash algo: sha256
+ Hash value: c22f6bb5a3f96942507a37e7d6a9333ebdc7da57971bc4c082113fe082fdc40f
Verifying Hash Integrity ... crc32+ sha1+ OK
Uncompressing Kernel Image ... OK
Memory BAT mapping: BAT2=256Mb, BAT3=0Mb, residual: 0Mb
@@ -302,8 +302,8 @@
Entry Point: 0x00000000
Hash algo: crc32
Hash value: 2c0cc807
- Hash algo: sha1
- Hash value: 264b59935470e42c418744f83935d44cdf59a3bb
+ Hash algo: sha256
+ Hash value: a3e9e18b793873827d27c97edfbca67c404a1972d9f36cf48e73ff85d69a422c
Image 1 (fdt-1)
Description: Flattened Device Tree blob
Type: Flat Device Tree
@@ -312,8 +312,8 @@
Architecture: PowerPC
Hash algo: crc32
Hash value: 0d655d71
- Hash algo: sha1
- Hash value: 25ab4e15cd4b8a5144610394560d9c318ce52def
+ Hash algo: sha256
+ Hash value: e9b9a40c5e2e12213ac819e7ccad7271ef43eb5edf9b421f0fa0b4b51bfdb214
Default Configuration: 'conf-1'
Configuration 0 (conf-1)
Description: Boot Linux kernel with FDT blob
@@ -353,8 +353,8 @@
Entry Point: 0x00000000
Hash algo: crc32
Hash value: 2c0cc807
- Hash algo: sha1
- Hash value: 264b59935470e42c418744f83935d44cdf59a3bb
+ Hash algo: sha256
+ Hash value: a3e9e18b793873827d27c97edfbca67c404a1972d9f36cf48e73ff85d69a422c
Image 1 (fdt-1)
Description: Flattened Device Tree blob
Type: Flat Device Tree
@@ -364,8 +364,8 @@
Architecture: PowerPC
Hash algo: crc32
Hash value: 0d655d71
- Hash algo: sha1
- Hash value: 25ab4e15cd4b8a5144610394560d9c318ce52def
+ Hash algo: sha256
+ Hash value: e9b9a40c5e2e12213ac819e7ccad7271ef43eb5edf9b421f0fa0b4b51bfdb214
Default Configuration: 'conf-1'
Configuration 0 (conf-1)
Description: Boot Linux kernel with FDT blob
@@ -387,7 +387,7 @@
Hash algo: crc32
Hash value: 2c0cc807
Hash algo: sha1
- Hash value: 264b59935470e42c418744f83935d44cdf59a3bb
+ Hash value: a3e9e18b793873827d27c97edfbca67c404a1972d9f36cf48e73ff85d69a422c
Verifying Hash Integrity ... crc32+ sha1+ OK
Uncompressing Kernel Image ... OK
## Flattened Device Tree from FIT Image at 00900000
@@ -402,7 +402,7 @@
Hash algo: crc32
Hash value: 0d655d71
Hash algo: sha1
- Hash value: 25ab4e15cd4b8a5144610394560d9c318ce52def
+ Hash value: e9b9a40c5e2e12213ac819e7ccad7271ef43eb5edf9b421f0fa0b4b51bfdb214
Verifying Hash Integrity ... crc32+ sha1+ OK
Booting using the fdt blob at 0xa0abdc
Loading Device Tree to 007fc000, end 007fffff ... OK
diff --git a/doc/usage/fit/kernel.rst b/doc/usage/fit/kernel.rst
index 012a81e..e560179 100644
--- a/doc/usage/fit/kernel.rst
+++ b/doc/usage/fit/kernel.rst
@@ -25,7 +25,7 @@
algo = "crc32";
};
hash-2 {
- algo = "sha1";
+ algo = "sha256";
};
};
};
@@ -59,7 +59,7 @@
load = <0x01000000>;
entry = <0x00000000>;
hash-2 {
- algo = "sha1";
+ algo = "sha256";
};
};
@@ -73,7 +73,7 @@
load = <0x00090000>;
entry = <0x00090000>;
hash-2 {
- algo = "sha1";
+ algo = "sha256";
};
};
};
diff --git a/doc/usage/fit/kernel_fdt.rst b/doc/usage/fit/kernel_fdt.rst
index 8eee13a..9cc26fb 100644
--- a/doc/usage/fit/kernel_fdt.rst
+++ b/doc/usage/fit/kernel_fdt.rst
@@ -25,7 +25,7 @@
algo = "crc32";
};
hash-2 {
- algo = "sha1";
+ algo = "sha256";
};
};
fdt-1 {
@@ -38,7 +38,7 @@
algo = "crc32";
};
hash-2 {
- algo = "sha1";
+ algo = "sha256";
};
};
};
diff --git a/doc/usage/fit/kernel_fdts_compressed.rst b/doc/usage/fit/kernel_fdts_compressed.rst
index 0b169c7..b57871d 100644
--- a/doc/usage/fit/kernel_fdts_compressed.rst
+++ b/doc/usage/fit/kernel_fdts_compressed.rst
@@ -28,7 +28,7 @@
algo = "crc32";
};
hash-2 {
- algo = "sha1";
+ algo = "sha256";
};
};
fdt@1 {
@@ -41,7 +41,7 @@
algo = "crc32";
};
hash-2 {
- algo = "sha1";
+ algo = "sha256";
};
};
fdt@2 {
@@ -54,7 +54,7 @@
algo = "crc32";
};
hash-2 {
- algo = "sha1";
+ algo = "sha256";
};
};
};
diff --git a/doc/usage/fit/multi-with-fpga.rst b/doc/usage/fit/multi-with-fpga.rst
index 28d7d5d..4c7f1be 100644
--- a/doc/usage/fit/multi-with-fpga.rst
+++ b/doc/usage/fit/multi-with-fpga.rst
@@ -20,7 +20,7 @@
compression = "none";
load = <0x10000000>;
hash-1 {
- algo = "md5";
+ algo = "sha256";
};
};
@@ -33,7 +33,7 @@
load = <0x30000000>;
compatible = "u-boot,fpga-legacy"
hash-1 {
- algo = "md5";
+ algo = "sha256";
};
};
@@ -47,7 +47,7 @@
load = <0x8000>;
entry = <0x8000>;
hash-1 {
- algo = "md5";
+ algo = "sha256";
};
};
};
diff --git a/doc/usage/fit/multi-with-loadables.rst b/doc/usage/fit/multi-with-loadables.rst
index a0241df..7849cb5 100644
--- a/doc/usage/fit/multi-with-loadables.rst
+++ b/doc/usage/fit/multi-with-loadables.rst
@@ -22,7 +22,7 @@
load = <0xa0000000>;
entry = <0xa0000000>;
hash-1 {
- algo = "md5";
+ algo = "sha256";
};
};
@@ -34,7 +34,7 @@
compression = "none";
load = <0xb0000000>;
hash-1 {
- algo = "md5";
+ algo = "sha256";
};
};
@@ -46,7 +46,7 @@
compression = "none";
load = <0xb0400000>;
hash-1 {
- algo = "md5";
+ algo = "sha256";
};
};
@@ -60,7 +60,7 @@
load = <0xa0000000>;
entry = <0xa0000000>;
hash-1 {
- algo = "md5";
+ algo = "sha256";
};
};
};
diff --git a/doc/usage/fit/multi.rst b/doc/usage/fit/multi.rst
index 2e6ae58..e68752b 100644
--- a/doc/usage/fit/multi.rst
+++ b/doc/usage/fit/multi.rst
@@ -22,10 +22,10 @@
load = <00000000>;
entry = <00000000>;
hash-1 {
- algo = "md5";
+ algo = "sha256";
};
hash-2 {
- algo = "sha1";
+ algo = "sha512";
};
};
@@ -39,7 +39,7 @@
load = <00000000>;
entry = <00000000>;
hash-1 {
- algo = "sha1";
+ algo = "sha256";
};
};
@@ -53,7 +53,7 @@
load = <00000000>;
entry = <00000000>;
hash-1 {
- algo = "md5";
+ algo = "sha256";
};
};
@@ -67,7 +67,7 @@
load = <00000000>;
entry = <00000000>;
hash-1 {
- algo = "sha1";
+ algo = "sha256";
};
};
@@ -104,7 +104,7 @@
compression = "none";
load = <00700000>;
hash-1 {
- algo = "sha1";
+ algo = "sha256";
};
};
diff --git a/doc/usage/fit/sign-configs.rst b/doc/usage/fit/sign-configs.rst
index 6a3df8f..6d98d44 100644
--- a/doc/usage/fit/sign-configs.rst
+++ b/doc/usage/fit/sign-configs.rst
@@ -22,7 +22,7 @@
entry = <0x8>;
kernel-version = <1>;
hash-1 {
- algo = "sha1";
+ algo = "sha256";
};
};
fdt-1 {
@@ -33,7 +33,7 @@
compression = "none";
fdt-version = <1>;
hash-1 {
- algo = "sha1";
+ algo = "sha256";
};
};
};
@@ -43,7 +43,7 @@
kernel = "kernel";
fdt = "fdt-1";
signature {
- algo = "sha1,rsa2048";
+ algo = "sha256,rsa2048";
key-name-hint = "dev";
sign-images = "fdt", "kernel";
};
diff --git a/doc/usage/fit/sign-images.rst b/doc/usage/fit/sign-images.rst
index 7d54d70..ca7d10f 100644
--- a/doc/usage/fit/sign-images.rst
+++ b/doc/usage/fit/sign-images.rst
@@ -22,7 +22,7 @@
entry = <0x8>;
kernel-version = <1>;
signature {
- algo = "sha1,rsa2048";
+ algo = "sha256,rsa2048";
key-name-hint = "dev";
};
};
@@ -34,7 +34,7 @@
compression = "none";
fdt-version = <1>;
signature {
- algo = "sha1,rsa2048";
+ algo = "sha256,rsa2048";
key-name-hint = "dev";
};
};
diff --git a/doc/usage/fit/signature.rst b/doc/usage/fit/signature.rst
index 0804bff..03a71b5 100644
--- a/doc/usage/fit/signature.rst
+++ b/doc/usage/fit/signature.rst
@@ -93,7 +93,7 @@
properties are:
algo
- Algorithm name (e.g. "sha1,rsa2048" or "sha256,ecdsa256")
+ Algorithm name (e.g. "sha256,rsa2048" or "sha512,ecdsa256")
Optional properties are:
@@ -219,28 +219,28 @@
kernel-1 {
data = <data for kernel1>
signature-1 {
- algo = "sha1,rsa2048";
+ algo = "sha256,rsa2048";
value = <...kernel signature 1...>
};
};
kernel-2 {
data = <data for kernel2>
signature-1 {
- algo = "sha1,rsa2048";
+ algo = "sha256,rsa2048";
value = <...kernel signature 2...>
};
};
fdt-1 {
data = <data for fdt1>;
signature-1 {
- algo = "sha1,rsa2048";
+ algo = "sha256,rsa2048";
value = <...fdt signature 1...>
};
};
fdt-2 {
data = <data for fdt2>;
signature-1 {
- algo = "sha1,rsa2048";
+ algo = "sha256,rsa2048";
value = <...fdt signature 2...>
};
};
@@ -291,28 +291,28 @@
kernel-1 {
data = <data for kernel1>
hash-1 {
- algo = "sha1";
+ algo = "sha256";
value = <...kernel hash 1...>
};
};
kernel-2 {
data = <data for kernel2>
hash-1 {
- algo = "sha1";
+ algo = "sha256";
value = <...kernel hash 2...>
};
};
fdt-1 {
data = <data for fdt1>;
hash-1 {
- algo = "sha1";
+ algo = "sha256";
value = <...fdt hash 1...>
};
};
fdt-2 {
data = <data for fdt2>;
hash-1 {
- algo = "sha1";
+ algo = "sha256";
value = <...fdt hash 2...>
};
};
@@ -323,7 +323,7 @@
kernel = "kernel-1";
fdt = "fdt-1";
signature-1 {
- algo = "sha1,rsa2048";
+ algo = "sha256,rsa2048";
value = <...conf 1 signature...>;
};
};
@@ -331,7 +331,7 @@
kernel = "kernel-2";
fdt = "fdt-2";
signature-1 {
- algo = "sha1,rsa2048";
+ algo = "sha256,rsa2048";
value = <...conf 1 signature...>;
};
};
@@ -671,7 +671,7 @@
Sign the fitImage with the hardware key::
$ ./tools/mkimage -F -k \
- "model=PKCS%2315%20emulated;manufacturer=ZeitControl;serial=000xxxxxxxxx;token=OpenPGP%20card%20%28User%20PIN%20%28sig%29%29" \
+ "pkcs11:model=PKCS%2315%20emulated;manufacturer=ZeitControl;serial=000xxxxxxxxx;token=OpenPGP%20card%20%28User%20PIN%20%28sig%29%29" \
-K u-boot.dtb -N pkcs11 -r fitImage
diff --git a/doc/usage/fit/update3.rst b/doc/usage/fit/update3.rst
index 4ff3950..2423580 100644
--- a/doc/usage/fit/update3.rst
+++ b/doc/usage/fit/update3.rst
@@ -19,7 +19,7 @@
type = "firmware";
load = <FF700000>;
hash-1 {
- algo = "sha1";
+ algo = "sha256";
};
};
update-2 {
@@ -29,7 +29,7 @@
type = "firmware";
load = <FF8E0000>;
hash-1 {
- algo = "sha1";
+ algo = "sha256";
};
};
@@ -40,7 +40,7 @@
type = "firmware";
load = <FFAC0000>;
hash-1 {
- algo = "sha1";
+ algo = "sha256";
};
};
};
diff --git a/doc/usage/fit/update_uboot.rst b/doc/usage/fit/update_uboot.rst
index a9288ee..811d008 100644
--- a/doc/usage/fit/update_uboot.rst
+++ b/doc/usage/fit/update_uboot.rst
@@ -21,7 +21,7 @@
type = "firmware";
load = <0xFFFC0000>;
hash-1 {
- algo = "sha1";
+ algo = "sha256";
};
};
};
diff --git a/doc/usage/fit/x86-fit-boot.rst b/doc/usage/fit/x86-fit-boot.rst
index 93b73bb..9e3e322 100644
--- a/doc/usage/fit/x86-fit-boot.rst
+++ b/doc/usage/fit/x86-fit-boot.rst
@@ -207,16 +207,16 @@
OS: Linux
Load Address: 0x01000000
Entry Point: 0x00000000
- Hash algo: sha1
- Hash value: 446b5163ebfe0fb6ee20cbb7a8501b263cd92392
+ Hash algo: sha256
+ Hash value: 4bbf49981ade163ed089f8525236fedfe44508e9b02a21a48294a96a1518107b
Image 1 (setup)
Description: Linux setup.bin
Created: Tue Oct 7 10:57:24 2014
Type: x86 setup.bin
Compression: uncompressed
Data Size: 12912 Bytes = 12.61 kB = 0.01 MB
- Hash algo: sha1
- Hash value: a1f2099cf47ff9816236cd534c77af86e713faad
+ Hash algo: sha256
+ Hash value: 6aa50c2e0392cb119cdf0971dce8339f100608ed3757c8200b0e39e889e432d2
Default Configuration: 'config-1'
Configuration 0 (config-1)
Description: Boot Linux kernel
diff --git a/doc/usage/index.rst b/doc/usage/index.rst
index d8e23fc..0d174ee 100644
--- a/doc/usage/index.rst
+++ b/doc/usage/index.rst
@@ -43,6 +43,7 @@
cmd/cat
cmd/cbsysinfo
cmd/cedit
+ cmd/cli
cmd/cls
cmd/cmp
cmd/coninfo
@@ -94,6 +95,7 @@
cmd/rng
cmd/saves
cmd/sbi
+ cmd/scmi
cmd/scp03
cmd/seama
cmd/setexpr
@@ -101,6 +103,7 @@
cmd/size
cmd/sleep
cmd/sm
+ cmd/smbios
cmd/sound
cmd/source
cmd/temperature
diff --git a/drivers/bios_emulator/include/x86emu.h b/drivers/bios_emulator/include/x86emu.h
index b28cdc6..d2650a8 100644
--- a/drivers/bios_emulator/include/x86emu.h
+++ b/drivers/bios_emulator/include/x86emu.h
@@ -42,7 +42,6 @@
#define __X86EMU_X86EMU_H
#include <asm/types.h>
-#include <common.h>
#include <pci.h>
#include <asm/io.h>
#define X86API
diff --git a/drivers/button/Kconfig b/drivers/button/Kconfig
index 8ce2de3..097b05f 100644
--- a/drivers/button/Kconfig
+++ b/drivers/button/Kconfig
@@ -27,4 +27,13 @@
The GPIO driver must used driver model. Buttons are configured using
the device tree.
+config BUTTON_QCOM_PMIC
+ bool "Qualcomm power button"
+ depends on BUTTON
+ depends on PMIC_QCOM
+ help
+ Enable support for the power and "resin" (usually volume down) buttons
+ on Qualcomm SoCs. These will be configured as the Enter and Down keys
+ respectively, allowing navigation of bootmenu with buttons on device.
+
endmenu
diff --git a/drivers/button/Makefile b/drivers/button/Makefile
index bbd18af..6855508 100644
--- a/drivers/button/Makefile
+++ b/drivers/button/Makefile
@@ -5,3 +5,4 @@
obj-$(CONFIG_BUTTON) += button-uclass.o
obj-$(CONFIG_BUTTON_ADC) += button-adc.o
obj-$(CONFIG_BUTTON_GPIO) += button-gpio.o
+obj-$(CONFIG_BUTTON_QCOM_PMIC) += button-qcom-pmic.o
\ No newline at end of file
diff --git a/drivers/button/button-qcom-pmic.c b/drivers/button/button-qcom-pmic.c
new file mode 100644
index 0000000..34a976d
--- /dev/null
+++ b/drivers/button/button-qcom-pmic.c
@@ -0,0 +1,165 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Qualcomm generic pmic gpio driver
+ *
+ * (C) Copyright 2015 Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
+ * (C) Copyright 2023 Linaro Ltd.
+ */
+
+#include <button.h>
+#include <dt-bindings/input/linux-event-codes.h>
+#include <dm.h>
+#include <dm/device-internal.h>
+#include <dm/lists.h>
+#include <log.h>
+#include <power/pmic.h>
+#include <spmi/spmi.h>
+#include <linux/bitops.h>
+
+#define REG_TYPE 0x4
+#define REG_SUBTYPE 0x5
+
+struct qcom_pmic_btn_priv {
+ u32 base;
+ u32 status_bit;
+ int code;
+ struct udevice *pmic;
+};
+
+#define PON_INT_RT_STS 0x10
+#define KPDPWR_ON_INT_BIT 0
+#define RESIN_ON_INT_BIT 1
+
+#define NODE_IS_PWRKEY(node) (!strncmp(ofnode_get_name(node), "pwrkey", strlen("pwrkey")))
+#define NODE_IS_RESIN(node) (!strncmp(ofnode_get_name(node), "resin", strlen("resin")))
+
+static enum button_state_t qcom_pwrkey_get_state(struct udevice *dev)
+{
+ struct qcom_pmic_btn_priv *priv = dev_get_priv(dev);
+
+ int reg = pmic_reg_read(priv->pmic, priv->base + PON_INT_RT_STS);
+
+ if (reg < 0)
+ return 0;
+
+ return (reg & BIT(priv->status_bit)) != 0;
+}
+
+static int qcom_pwrkey_get_code(struct udevice *dev)
+{
+ struct qcom_pmic_btn_priv *priv = dev_get_priv(dev);
+
+ return priv->code;
+}
+
+static int qcom_pwrkey_probe(struct udevice *dev)
+{
+ struct button_uc_plat *uc_plat = dev_get_uclass_plat(dev);
+ struct qcom_pmic_btn_priv *priv = dev_get_priv(dev);
+ ofnode node = dev_ofnode(dev);
+ int ret;
+ u64 base;
+
+ /* Ignore the top-level pon node */
+ if (!uc_plat->label)
+ return 0;
+
+ /* the pwrkey and resin nodes are children of the "pon" node, get the
+ * PMIC device to use in pmic_reg_* calls.
+ */
+ priv->pmic = dev->parent->parent;
+
+ /* Get the address of the parent pon node */
+ base = dev_read_addr(dev->parent);
+ if (base == FDT_ADDR_T_NONE) {
+ printf("%s: Can't find address\n", dev->name);
+ return -EINVAL;
+ }
+
+ priv->base = base;
+
+ /* Do a sanity check */
+ ret = pmic_reg_read(priv->pmic, priv->base + REG_TYPE);
+ if (ret != 0x1 && ret != 0xb) {
+ printf("%s: unexpected PMIC function type %d\n", dev->name, ret);
+ return -ENXIO;
+ }
+
+ ret = pmic_reg_read(priv->pmic, priv->base + REG_SUBTYPE);
+ if ((ret & 0x7) == 0) {
+ printf("%s: unexpected PMCI function subtype %d\n", dev->name, ret);
+ return -ENXIO;
+ }
+
+ if (NODE_IS_PWRKEY(node)) {
+ priv->status_bit = 0;
+ priv->code = KEY_ENTER;
+ } else if (NODE_IS_RESIN(node)) {
+ priv->status_bit = 1;
+ priv->code = KEY_DOWN;
+ } else {
+ /* Should not get here! */
+ printf("Invalid pon node '%s' should be 'pwrkey' or 'resin'\n",
+ ofnode_get_name(node));
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static int button_qcom_pmic_bind(struct udevice *parent)
+{
+ struct udevice *dev;
+ ofnode node;
+ int ret;
+
+ dev_for_each_subnode(node, parent) {
+ struct button_uc_plat *uc_plat;
+ const char *label;
+
+ if (!ofnode_is_enabled(node))
+ continue;
+
+ ret = device_bind_driver_to_node(parent, "qcom_pwrkey",
+ ofnode_get_name(node),
+ node, &dev);
+ if (ret) {
+ printf("Failed to bind %s! %d\n", label, ret);
+ return ret;
+ }
+ uc_plat = dev_get_uclass_plat(dev);
+ if (NODE_IS_PWRKEY(node)) {
+ uc_plat->label = "pwrkey";
+ } else if (NODE_IS_RESIN(node)) {
+ uc_plat->label = "vol_down";
+ } else {
+ printf("Unknown button node '%s' should be 'pwrkey' or 'resin'\n",
+ ofnode_get_name(node));
+ device_unbind(dev);
+ }
+ }
+
+ return 0;
+}
+
+static const struct button_ops button_qcom_pmic_ops = {
+ .get_state = qcom_pwrkey_get_state,
+ .get_code = qcom_pwrkey_get_code,
+};
+
+static const struct udevice_id qcom_pwrkey_ids[] = {
+ { .compatible = "qcom,pm8916-pon" },
+ { .compatible = "qcom,pm8941-pon" },
+ { .compatible = "qcom,pm8998-pon" },
+ { }
+};
+
+U_BOOT_DRIVER(qcom_pwrkey) = {
+ .name = "qcom_pwrkey",
+ .id = UCLASS_BUTTON,
+ .of_match = qcom_pwrkey_ids,
+ .bind = button_qcom_pmic_bind,
+ .probe = qcom_pwrkey_probe,
+ .ops = &button_qcom_pmic_ops,
+ .priv_auto = sizeof(struct qcom_pmic_btn_priv),
+};
diff --git a/drivers/cache/Kconfig b/drivers/cache/Kconfig
index 6cb8c3e..26c2d80 100644
--- a/drivers/cache/Kconfig
+++ b/drivers/cache/Kconfig
@@ -45,4 +45,11 @@
This driver is for SiFive Composable L2/L3 cache. It enables cache
ways of composable cache.
+config SIFIVE_PL2
+ bool "SiFive private L2 cache"
+ select CACHE
+ help
+ This driver is for SiFive Private L2 cache. It configures registers
+ to enable the clock gating feature.
+
endmenu
diff --git a/drivers/cache/Makefile b/drivers/cache/Makefile
index ad76577..78e673d 100644
--- a/drivers/cache/Makefile
+++ b/drivers/cache/Makefile
@@ -5,3 +5,4 @@
obj-$(CONFIG_NCORE_CACHE) += cache-ncore.o
obj-$(CONFIG_V5L2_CACHE) += cache-v5l2.o
obj-$(CONFIG_SIFIVE_CCACHE) += cache-sifive-ccache.o
+obj-$(CONFIG_SIFIVE_PL2) += cache-sifive-pl2.o
diff --git a/drivers/cache/cache-sifive-pl2.c b/drivers/cache/cache-sifive-pl2.c
new file mode 100644
index 0000000..ae689e1
--- /dev/null
+++ b/drivers/cache/cache-sifive-pl2.c
@@ -0,0 +1,44 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2023 SiFive
+ */
+
+#include <cache.h>
+#include <dm.h>
+#include <malloc.h>
+#include <asm/io.h>
+#include <dm/device.h>
+#include <dm/device-internal.h>
+
+#define SIFIVE_PL2CHICKENBIT_OFFSET 0x1000
+#define SIFIVE_PL2CHICKENBIT_REGIONCLOCKDISABLE_MASK BIT(3)
+
+static int sifive_pl2_probe(struct udevice *dev)
+{
+ fdt_addr_t base;
+ u32 val;
+
+ base = dev_read_addr(dev);
+ if (base == FDT_ADDR_T_NONE)
+ return -EINVAL;
+
+ /* Enable regionClockDisable bit */
+ val = readl((void __iomem *)(base + SIFIVE_PL2CHICKENBIT_OFFSET));
+ writel(val & ~SIFIVE_PL2CHICKENBIT_REGIONCLOCKDISABLE_MASK,
+ (void __iomem *)(base + SIFIVE_PL2CHICKENBIT_OFFSET));
+
+ return 0;
+}
+
+static const struct udevice_id sifive_pl2_ids[] = {
+ { .compatible = "sifive,pl2cache0" },
+ { .compatible = "sifive,pl2cache1" },
+ {}
+};
+
+U_BOOT_DRIVER(sifive_pl2) = {
+ .name = "sifive_pl2",
+ .id = UCLASS_CACHE,
+ .of_match = sifive_pl2_ids,
+ .probe = sifive_pl2_probe,
+};
diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
index bfd23a9..017dd26 100644
--- a/drivers/clk/Kconfig
+++ b/drivers/clk/Kconfig
@@ -254,6 +254,7 @@
source "drivers/clk/microchip/Kconfig"
source "drivers/clk/mvebu/Kconfig"
source "drivers/clk/owl/Kconfig"
+source "drivers/clk/qcom/Kconfig"
source "drivers/clk/renesas/Kconfig"
source "drivers/clk/sunxi/Kconfig"
source "drivers/clk/sifive/Kconfig"
diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index af27ceb..638ad04 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -39,6 +39,7 @@
obj-$(CONFIG_CLK_MVEBU) += mvebu/
obj-$(CONFIG_CLK_OCTEON) += clk_octeon.o
obj-$(CONFIG_CLK_OWL) += owl/
+obj-$(CONFIG_CLK_QCOM) += qcom/
obj-$(CONFIG_CLK_RENESAS) += renesas/
obj-$(CONFIG_$(SPL_TPL_)CLK_SCMI) += clk_scmi.o
obj-$(CONFIG_CLK_SIFIVE) += sifive/
diff --git a/drivers/clk/altera/clk-mem-n5x.h b/drivers/clk/altera/clk-mem-n5x.h
index 7b68701..c6bc44b 100644
--- a/drivers/clk/altera/clk-mem-n5x.h
+++ b/drivers/clk/altera/clk-mem-n5x.h
@@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/*
- * Copyright (C) 2020-2022 Intel Corporation <www.intel.com>
+ * Copyright (C) 2020-2023 Intel Corporation <www.intel.com>
*/
#ifndef _CLK_MEM_N5X_
@@ -77,7 +77,7 @@
#define MEMCLKMGR_PLLOUTDIV_C0CNT_MASK GENMASK(4, 0)
#define MEMCLKMGR_PLLOUTDIV_C0CNT_OFFSET 0
-#define MEMCLKMGR_EXTCNTRST_C0CNTRST BIT(7)
+#define MEMCLKMGR_EXTCNTRST_C0CNTRST BIT(0)
#define MEMCLKMGR_EXTCNTRST_ALLCNTRST \
(MEMCLKMGR_EXTCNTRST_C0CNTRST)
diff --git a/drivers/clk/aspeed/clk_ast2600.c b/drivers/clk/aspeed/clk_ast2600.c
index e5ada5b..eecfacd 100644
--- a/drivers/clk/aspeed/clk_ast2600.c
+++ b/drivers/clk/aspeed/clk_ast2600.c
@@ -1104,46 +1104,12 @@
return 0;
}
-struct clk_ops ast2600_clk_ops = {
- .get_rate = ast2600_clk_get_rate,
- .set_rate = ast2600_clk_set_rate,
- .enable = ast2600_clk_enable,
-};
-
-static int ast2600_clk_probe(struct udevice *dev)
-{
- struct ast2600_clk_priv *priv = dev_get_priv(dev);
-
- priv->scu = devfdt_get_addr_ptr(dev);
- if (IS_ERR(priv->scu))
- return PTR_ERR(priv->scu);
-
- ast2600_init_rgmii_clk(priv->scu, &rgmii_clk_defconfig);
- ast2600_init_rmii_clk(priv->scu, &rmii_clk_defconfig);
- ast2600_configure_mac12_clk(priv->scu);
- ast2600_configure_mac34_clk(priv->scu);
- ast2600_configure_rsa_ecc_clk(priv->scu);
-
- return 0;
-}
-
-static int ast2600_clk_bind(struct udevice *dev)
-{
- int ret;
-
- /* The reset driver does not have a device node, so bind it here */
- ret = device_bind_driver(gd->dm_root, "ast_sysreset", "reset", &dev);
- if (ret)
- debug("Warning: No reset driver: ret=%d\n", ret);
-
- return 0;
-}
-
struct aspeed_clks {
ulong id;
const char *name;
};
+#if IS_ENABLED(CONFIG_CMD_CLK)
static struct aspeed_clks aspeed_clk_names[] = {
{ ASPEED_CLK_HPLL, "hpll" },
{ ASPEED_CLK_MPLL, "mpll" },
@@ -1158,18 +1124,12 @@
{ ASPEED_CLK_HUARTX, "huxclk" },
};
-int soc_clk_dump(void)
+static void ast2600_clk_dump(struct udevice *dev)
{
- struct udevice *dev;
struct clk clk;
unsigned long rate;
int i, ret;
- ret = uclass_get_device_by_driver(UCLASS_CLK, DM_DRIVER_GET(aspeed_scu),
- &dev);
- if (ret)
- return ret;
-
printf("Clk\t\tHz\n");
for (i = 0; i < ARRAY_SIZE(aspeed_clk_names); i++) {
@@ -1202,6 +1162,45 @@
return 0;
}
+#endif
+
+struct clk_ops ast2600_clk_ops = {
+ .get_rate = ast2600_clk_get_rate,
+ .set_rate = ast2600_clk_set_rate,
+ .enable = ast2600_clk_enable,
+#if IS_ENABLED(CONFIG_CMD_CLK)
+ .dump = ast2600_clk_dump,
+#endif
+};
+
+static int ast2600_clk_probe(struct udevice *dev)
+{
+ struct ast2600_clk_priv *priv = dev_get_priv(dev);
+
+ priv->scu = devfdt_get_addr_ptr(dev);
+ if (IS_ERR(priv->scu))
+ return PTR_ERR(priv->scu);
+
+ ast2600_init_rgmii_clk(priv->scu, &rgmii_clk_defconfig);
+ ast2600_init_rmii_clk(priv->scu, &rmii_clk_defconfig);
+ ast2600_configure_mac12_clk(priv->scu);
+ ast2600_configure_mac34_clk(priv->scu);
+ ast2600_configure_rsa_ecc_clk(priv->scu);
+
+ return 0;
+}
+
+static int ast2600_clk_bind(struct udevice *dev)
+{
+ int ret;
+
+ /* The reset driver does not have a device node, so bind it here */
+ ret = device_bind_driver(gd->dm_root, "ast_sysreset", "reset", &dev);
+ if (ret)
+ debug("Warning: No reset driver: ret=%d\n", ret);
+
+ return 0;
+}
static const struct udevice_id ast2600_clk_ids[] = {
{ .compatible = "aspeed,ast2600-scu", },
diff --git a/drivers/clk/clk-composite.c b/drivers/clk/clk-composite.c
index 6eb2b81..d2e5a1a 100644
--- a/drivers/clk/clk-composite.c
+++ b/drivers/clk/clk-composite.c
@@ -66,7 +66,7 @@
const struct clk_ops *rate_ops = composite->rate_ops;
struct clk *clk_rate = composite->rate;
- if (rate && rate_ops)
+ if (rate && rate_ops && rate_ops->set_rate)
return rate_ops->set_rate(clk_rate, rate);
else
return clk_get_rate(clk);
diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c
index 3b5e3f9..3e9d68f 100644
--- a/drivers/clk/clk-uclass.c
+++ b/drivers/clk/clk-uclass.c
@@ -640,6 +640,7 @@
if (CONFIG_IS_ENABLED(CLK_CCF)) {
/* Take id 0 as a non-valid clk, such as dummy */
if (clk->id && !clk_get_by_id(clk->id, &clkp)) {
+ ops = clk_dev_ops(clkp->dev);
if (clkp->enable_count) {
clkp->enable_count++;
return 0;
@@ -699,6 +700,7 @@
if (CONFIG_IS_ENABLED(CLK_CCF)) {
if (clk->id && !clk_get_by_id(clk->id, &clkp)) {
+ ops = clk_dev_ops(clkp->dev);
if (clkp->flags & CLK_IS_CRITICAL)
return 0;
diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
index a5a3461..6ede1b4 100644
--- a/drivers/clk/clk.c
+++ b/drivers/clk/clk.c
@@ -18,17 +18,19 @@
int clk_register(struct clk *clk, const char *drv_name,
const char *name, const char *parent_name)
{
- struct udevice *parent;
+ struct udevice *parent = NULL;
struct driver *drv;
int ret;
- ret = uclass_get_device_by_name(UCLASS_CLK, parent_name, &parent);
- if (ret) {
- log_err("%s: failed to get %s device (parent of %s)\n",
- __func__, parent_name, name);
- } else {
- log_debug("%s: name: %s parent: %s [0x%p]\n", __func__, name,
- parent->name, parent);
+ if (parent_name) {
+ ret = uclass_get_device_by_name(UCLASS_CLK, parent_name, &parent);
+ if (ret) {
+ log_err("%s: failed to get %s device (parent of %s)\n",
+ __func__, parent_name, name);
+ } else {
+ log_debug("%s: name: %s parent: %s [0x%p]\n", __func__, name,
+ parent->name, parent);
+ }
}
drv = lists_driver_lookup_name(drv_name);
diff --git a/drivers/clk/clk_k210.c b/drivers/clk/clk_k210.c
index b9469b9..7432ae8 100644
--- a/drivers/clk/clk_k210.c
+++ b/drivers/clk/clk_k210.c
@@ -1239,52 +1239,6 @@
return 0;
}
-static const struct clk_ops k210_clk_ops = {
- .request = k210_clk_request,
- .set_rate = k210_clk_set_rate,
- .get_rate = k210_clk_get_rate,
- .set_parent = k210_clk_set_parent,
- .enable = k210_clk_enable,
- .disable = k210_clk_disable,
-};
-
-static int k210_clk_probe(struct udevice *dev)
-{
- int ret;
- struct k210_clk_priv *priv = dev_get_priv(dev);
-
- priv->base = dev_read_addr_ptr(dev_get_parent(dev));
- if (!priv->base)
- return -EINVAL;
-
- ret = clk_get_by_index(dev, 0, &priv->in0);
- if (ret)
- return ret;
-
- /*
- * Force setting defaults, even before relocation. This is so we can
- * set the clock rate for PLL1 before we relocate into aisram.
- */
- if (!(gd->flags & GD_FLG_RELOC))
- clk_set_defaults(dev, CLK_DEFAULTS_POST_FORCE);
-
- return 0;
-}
-
-static const struct udevice_id k210_clk_ids[] = {
- { .compatible = "canaan,k210-clk" },
- { },
-};
-
-U_BOOT_DRIVER(k210_clk) = {
- .name = "k210_clk",
- .id = UCLASS_CLK,
- .of_match = k210_clk_ids,
- .ops = &k210_clk_ops,
- .probe = k210_clk_probe,
- .priv_auto = sizeof(struct k210_clk_priv),
-};
-
#if IS_ENABLED(CONFIG_CMD_CLK)
static char show_enabled(struct k210_clk_priv *priv, int id)
{
@@ -1323,16 +1277,10 @@
}
}
-int soc_clk_dump(void)
+static void k210_clk_dump(struct udevice *dev)
{
- int ret;
- struct udevice *dev;
struct k210_clk_priv *priv;
- ret = uclass_get_device_by_driver(UCLASS_CLK, DM_DRIVER_GET(k210_clk),
- &dev);
- if (ret)
- return ret;
priv = dev_get_priv(dev);
puts(" Rate Enabled Name\n");
@@ -1340,6 +1288,54 @@
printf(" %-9lu %-7c %*s%s\n", clk_get_rate(&priv->in0), 'y', 0, "",
priv->in0.dev->name);
show_clks(priv, K210_CLK_IN0, 1);
- return 0;
}
#endif
+
+static const struct clk_ops k210_clk_ops = {
+ .request = k210_clk_request,
+ .set_rate = k210_clk_set_rate,
+ .get_rate = k210_clk_get_rate,
+ .set_parent = k210_clk_set_parent,
+ .enable = k210_clk_enable,
+ .disable = k210_clk_disable,
+#if IS_ENABLED(CONFIG_CMD_CLK)
+ .dump = k210_clk_dump,
+#endif
+};
+
+static int k210_clk_probe(struct udevice *dev)
+{
+ int ret;
+ struct k210_clk_priv *priv = dev_get_priv(dev);
+
+ priv->base = dev_read_addr_ptr(dev_get_parent(dev));
+ if (!priv->base)
+ return -EINVAL;
+
+ ret = clk_get_by_index(dev, 0, &priv->in0);
+ if (ret)
+ return ret;
+
+ /*
+ * Force setting defaults, even before relocation. This is so we can
+ * set the clock rate for PLL1 before we relocate into aisram.
+ */
+ if (!(gd->flags & GD_FLG_RELOC))
+ clk_set_defaults(dev, CLK_DEFAULTS_POST_FORCE);
+
+ return 0;
+}
+
+static const struct udevice_id k210_clk_ids[] = {
+ { .compatible = "canaan,k210-clk" },
+ { },
+};
+
+U_BOOT_DRIVER(k210_clk) = {
+ .name = "k210_clk",
+ .id = UCLASS_CLK,
+ .of_match = k210_clk_ids,
+ .ops = &k210_clk_ops,
+ .probe = k210_clk_probe,
+ .priv_auto = sizeof(struct k210_clk_priv),
+};
diff --git a/drivers/clk/clk_pic32.c b/drivers/clk/clk_pic32.c
index ef06a7f..a77d0e7 100644
--- a/drivers/clk/clk_pic32.c
+++ b/drivers/clk/clk_pic32.c
@@ -20,6 +20,8 @@
DECLARE_GLOBAL_DATA_PTR;
+#define CLK_MHZ(x) ((x) / 1000000)
+
/* Primary oscillator */
#define SYS_POSC_CLK_HZ 24000000
@@ -385,9 +387,44 @@
return rate;
}
+#if IS_ENABLED(CONFIG_CMD_CLK)
+static void pic32_dump(struct udevice *dev)
+{
+ int i;
+ struct clk clk;
+
+ clk.dev = dev;
+
+ clk.id = PLLCLK;
+ printf("PLL Speed: %lu MHz\n",
+ CLK_MHZ(pic32_get_rate(&clk)));
+
+ clk.id = PB7CLK;
+ printf("CPU Speed: %lu MHz\n", CLK_MHZ(pic32_get_rate(&clk)));
+
+ clk.id = MPLL;
+ printf("MPLL Speed: %lu MHz\n", CLK_MHZ(pic32_get_rate(&clk)));
+
+ for (i = PB1CLK; i <= PB7CLK; i++) {
+ clk.id = i;
+ printf("PB%d Clock Speed: %lu MHz\n", i - PB1CLK + 1,
+ CLK_MHZ(pic32_get_rate(&clk)));
+ }
+
+ for (i = REF1CLK; i <= REF5CLK; i++) {
+ clk.id = i;
+ printf("REFO%d Clock Speed: %lu MHz\n", i - REF1CLK + 1,
+ CLK_MHZ(pic32_get_rate(&clk)));
+ }
+}
+#endif
+
static struct clk_ops pic32_pic32_clk_ops = {
.set_rate = pic32_set_rate,
.get_rate = pic32_get_rate,
+#if IS_ENABLED(CONFIG_CMD_CLK)
+ .dump = pic32_dump,
+#endif
};
static int pic32_clk_probe(struct udevice *dev)
diff --git a/drivers/clk/clk_sandbox_ccf.c b/drivers/clk/clk_sandbox_ccf.c
index fedcdd4..38184e2 100644
--- a/drivers/clk/clk_sandbox_ccf.c
+++ b/drivers/clk/clk_sandbox_ccf.c
@@ -284,6 +284,7 @@
U_BOOT_DRIVER(sandbox_clk_ccf) = {
.name = "sandbox_clk_ccf",
.id = UCLASS_CLK,
+ .ops = &ccf_clk_ops,
.probe = sandbox_clk_ccf_probe,
.of_match = sandbox_clk_ccf_test_ids,
};
diff --git a/drivers/clk/clk_sandbox_test.c b/drivers/clk/clk_sandbox_test.c
index 5807a45..c695b69 100644
--- a/drivers/clk/clk_sandbox_test.c
+++ b/drivers/clk/clk_sandbox_test.c
@@ -15,6 +15,7 @@
[SANDBOX_CLK_TEST_ID_FIXED] = "fixed",
[SANDBOX_CLK_TEST_ID_SPI] = "spi",
[SANDBOX_CLK_TEST_ID_I2C] = "i2c",
+ [SANDBOX_CLK_TEST_ID_I2C_ROOT] = "i2c_root",
};
int sandbox_clk_test_get(struct udevice *dev)
diff --git a/drivers/clk/clk_versal.c b/drivers/clk/clk_versal.c
index c473643..42ab032 100644
--- a/drivers/clk/clk_versal.c
+++ b/drivers/clk/clk_versal.c
@@ -555,7 +555,8 @@
return 0;
}
-int soc_clk_dump(void)
+#if IS_ENABLED(CONFIG_CMD_CLK)
+static void versal_clk_dump(struct udevice __always_unused *dev)
{
u64 clk_rate = 0;
u32 type, ret, i = 0;
@@ -575,9 +576,8 @@
printf("clk: %s freq:%lld\n",
clock[i].clk_name, clk_rate);
}
-
- return 0;
}
+#endif
static void versal_get_clock_info(void)
{
@@ -769,6 +769,9 @@
.set_rate = versal_clk_set_rate,
.get_rate = versal_clk_get_rate,
.enable = versal_clk_enable,
+#if IS_ENABLED(CONFIG_CMD_CLK)
+ .dump = versal_clk_dump,
+#endif
};
static const struct udevice_id versal_clk_ids[] = {
diff --git a/drivers/clk/clk_zynq.c b/drivers/clk/clk_zynq.c
index e80500e..34f964d 100644
--- a/drivers/clk/clk_zynq.c
+++ b/drivers/clk/clk_zynq.c
@@ -454,12 +454,64 @@
return 0;
}
+#if IS_ENABLED(CONFIG_CMD_CLK)
+static const char * const clk_names[clk_max] = {
+ "armpll", "ddrpll", "iopll",
+ "cpu_6or4x", "cpu_3or2x", "cpu_2x", "cpu_1x",
+ "ddr2x", "ddr3x", "dci",
+ "lqspi", "smc", "pcap", "gem0", "gem1",
+ "fclk0", "fclk1", "fclk2", "fclk3", "can0", "can1",
+ "sdio0", "sdio1", "uart0", "uart1", "spi0", "spi1", "dma",
+ "usb0_aper", "usb1_aper", "gem0_aper", "gem1_aper",
+ "sdio0_aper", "sdio1_aper", "spi0_aper", "spi1_aper",
+ "can0_aper", "can1_aper", "i2c0_aper", "i2c1_aper",
+ "uart0_aper", "uart1_aper", "gpio_aper", "lqspi_aper",
+ "smc_aper", "swdt", "dbg_trc", "dbg_apb"
+};
+
+static void zynq_clk_dump(struct udevice *dev)
+{
+ int i, ret;
+
+ printf("clk\t\tfrequency\n");
+ for (i = 0; i < clk_max; i++) {
+ const char *name = clk_names[i];
+
+ if (name) {
+ struct clk clk;
+ unsigned long rate;
+
+ clk.id = i;
+ ret = clk_request(dev, &clk);
+ if (ret < 0) {
+ printf("%s clk_request() failed: %d\n",
+ __func__, ret);
+ break;
+ }
+
+ rate = clk_get_rate(&clk);
+
+ clk_free(&clk);
+
+ if ((rate == (unsigned long)-ENOSYS) ||
+ (rate == (unsigned long)-ENXIO))
+ printf("%10s%20s\n", name, "unknown");
+ else
+ printf("%10s%20lu\n", name, rate);
+ }
+ }
+}
+#endif
+
static struct clk_ops zynq_clk_ops = {
.get_rate = zynq_clk_get_rate,
#ifndef CONFIG_SPL_BUILD
.set_rate = zynq_clk_set_rate,
#endif
.enable = dummy_enable,
+#if IS_ENABLED(CONFIG_CMD_CLK)
+ .dump = zynq_clk_dump,
+#endif
};
static int zynq_clk_probe(struct udevice *dev)
diff --git a/drivers/clk/clk_zynqmp.c b/drivers/clk/clk_zynqmp.c
index 1cfe0e2..0ffac19 100644
--- a/drivers/clk/clk_zynqmp.c
+++ b/drivers/clk/clk_zynqmp.c
@@ -735,16 +735,11 @@
}
}
-int soc_clk_dump(void)
+#if IS_ENABLED(CONFIG_CMD_CLK)
+static void zynqmp_clk_dump(struct udevice *dev)
{
- struct udevice *dev;
int i, ret;
- ret = uclass_get_device_by_driver(UCLASS_CLK,
- DM_DRIVER_GET(zynqmp_clk), &dev);
- if (ret)
- return ret;
-
printf("clk\t\tfrequency\n");
for (i = 0; i < clk_max; i++) {
const char *name = clk_names[i];
@@ -754,8 +749,11 @@
clk.id = i;
ret = clk_request(dev, &clk);
- if (ret < 0)
- return ret;
+ if (ret < 0) {
+ printf("%s clk_request() failed: %d\n",
+ __func__, ret);
+ break;
+ }
rate = clk_get_rate(&clk);
@@ -769,9 +767,8 @@
printf("%10s%20lu\n", name, rate);
}
}
-
- return 0;
}
+#endif
static int zynqmp_get_freq_by_name(char *name, struct udevice *dev, ulong *freq)
{
@@ -844,6 +841,7 @@
break;
case qspi_ref ... can1_ref:
case lpd_lsbus:
+ case topsw_lsbus:
clkact_shift = 24;
mask = 0x1;
break;
@@ -871,6 +869,9 @@
.set_rate = zynqmp_clk_set_rate,
.get_rate = zynqmp_clk_get_rate,
.enable = zynqmp_clk_enable,
+#if IS_ENABLED(CONFIG_CMD_CLK)
+ .dump = zynqmp_clk_dump,
+#endif
};
static const struct udevice_id zynqmp_clk_ids[] = {
diff --git a/drivers/clk/exynos/clk-pll.h b/drivers/clk/exynos/clk-pll.h
index c79aac4..7b7af5e 100644
--- a/drivers/clk/exynos/clk-pll.h
+++ b/drivers/clk/exynos/clk-pll.h
@@ -5,4 +5,9 @@
* Thomas Abraham <thomas.ab@samsung.com>
*/
+#ifndef __EXYNOS_CLK_PLL_H
+#define __EXYNOS_CLK_PLL_H
+
unsigned long pll145x_get_rate(unsigned int *con1, unsigned long fin_freq);
+
+#endif /* __EXYNOS_CLK_PLL_H */
diff --git a/drivers/clk/imx/clk-imx8.c b/drivers/clk/imx/clk-imx8.c
index ceeead3..9600672 100644
--- a/drivers/clk/imx/clk-imx8.c
+++ b/drivers/clk/imx/clk-imx8.c
@@ -43,18 +43,12 @@
}
#if IS_ENABLED(CONFIG_CMD_CLK)
-int soc_clk_dump(void)
+static void imx8_clk_dump(struct udevice *dev)
{
- struct udevice *dev;
struct clk clk;
unsigned long rate;
int i, ret;
- ret = uclass_get_device_by_driver(UCLASS_CLK,
- DM_DRIVER_GET(imx8_clk), &dev);
- if (ret)
- return ret;
-
printf("Clk\t\tHz\n");
for (i = 0; i < num_clks; i++) {
@@ -84,8 +78,6 @@
printf("%s(%3lu):\t%lu\n",
imx8_clk_names[i].name, imx8_clk_names[i].id, rate);
}
-
- return 0;
}
#endif
@@ -94,6 +86,9 @@
.get_rate = imx8_clk_get_rate,
.enable = imx8_clk_enable,
.disable = imx8_clk_disable,
+#if IS_ENABLED(CONFIG_CMD_CLK)
+ .dump = imx8_clk_dump,
+#endif
};
static int imx8_clk_probe(struct udevice *dev)
diff --git a/drivers/clk/imx/clk-imx8mn.c b/drivers/clk/imx/clk-imx8mn.c
index 692823e..457acb8 100644
--- a/drivers/clk/imx/clk-imx8mn.c
+++ b/drivers/clk/imx/clk-imx8mn.c
@@ -83,6 +83,20 @@
static const char *imx8mn_i2c4_sels[] = {"clock-osc-24m", "sys_pll1_160m", "sys_pll2_50m", "sys_pll3_out", "audio_pll1_out",
"video_pll_out", "audio_pll2_out", "sys_pll1_133m", };
+#ifndef CONFIG_SPL_BUILD
+static const char *imx8mn_pwm1_sels[] = {"clock-osc-24m", "sys_pll2_100m", "sys_pll1_160m", "sys_pll1_40m",
+ "sys_pll3_out", "clk_ext1", "sys_pll1_80m", "video_pll_out", };
+
+static const char *imx8mn_pwm2_sels[] = {"clock-osc-24m", "sys_pll2_100m", "sys_pll1_160m", "sys_pll1_40m",
+ "sys_pll3_out", "clk_ext1", "sys_pll1_80m", "video_pll_out", };
+
+static const char *imx8mn_pwm3_sels[] = {"clock-osc-24m", "sys_pll2_100m", "sys_pll1_160m", "sys_pll1_40m",
+ "sys_pll3_out", "clk_ext2", "sys_pll1_80m", "video_pll_out", };
+
+static const char *imx8mn_pwm4_sels[] = {"clock-osc-24m", "sys_pll2_100m", "sys_pll1_160m", "sys_pll1_40m",
+ "sys_pll3_out", "clk_ext2", "sys_pll1_80m", "video_pll_out", };
+#endif
+
static const char *imx8mn_wdog_sels[] = {"clock-osc-24m", "sys_pll1_133m", "sys_pll1_160m", "m7_alt_pll",
"sys_pll2_125m", "sys_pll3_out", "sys_pll1_80m", "sys_pll2_166m", };
@@ -330,6 +344,22 @@
clk_dm(IMX8MN_CLK_ENET1_ROOT,
imx_clk_gate4("enet1_root_clk", "enet_axi",
base + 0x40a0, 0));
+ clk_dm(IMX8MN_CLK_PWM1,
+ imx8m_clk_composite("pwm1", imx8mn_pwm1_sels, base + 0xb380));
+ clk_dm(IMX8MN_CLK_PWM2,
+ imx8m_clk_composite("pwm2", imx8mn_pwm2_sels, base + 0xb400));
+ clk_dm(IMX8MN_CLK_PWM3,
+ imx8m_clk_composite("pwm3", imx8mn_pwm3_sels, base + 0xb480));
+ clk_dm(IMX8MN_CLK_PWM4,
+ imx8m_clk_composite("pwm4", imx8mn_pwm4_sels, base + 0xb500));
+ clk_dm(IMX8MN_CLK_PWM1_ROOT,
+ imx_clk_gate4("pwm1_root_clk", "pwm1", base + 0x4280, 0));
+ clk_dm(IMX8MN_CLK_PWM2_ROOT,
+ imx_clk_gate4("pwm2_root_clk", "pwm2", base + 0x4290, 0));
+ clk_dm(IMX8MN_CLK_PWM3_ROOT,
+ imx_clk_gate4("pwm3_root_clk", "pwm3", base + 0x42a0, 0));
+ clk_dm(IMX8MN_CLK_PWM4_ROOT,
+ imx_clk_gate4("pwm4_root_clk", "pwm4", base + 0x42b0, 0));
#endif
#if CONFIG_IS_ENABLED(DM_SPI)
diff --git a/drivers/clk/mediatek/Makefile b/drivers/clk/mediatek/Makefile
index e74c6f9..e631f79 100644
--- a/drivers/clk/mediatek/Makefile
+++ b/drivers/clk/mediatek/Makefile
@@ -11,5 +11,6 @@
obj-$(CONFIG_TARGET_MT7981) += clk-mt7981.o
obj-$(CONFIG_TARGET_MT7988) += clk-mt7988.o
obj-$(CONFIG_TARGET_MT8183) += clk-mt8183.o
+obj-$(CONFIG_TARGET_MT8365) += clk-mt8365.o
obj-$(CONFIG_TARGET_MT8516) += clk-mt8516.o
obj-$(CONFIG_TARGET_MT8518) += clk-mt8518.o
diff --git a/drivers/clk/mediatek/clk-mt8365.c b/drivers/clk/mediatek/clk-mt8365.c
new file mode 100644
index 0000000..61ccd4a
--- /dev/null
+++ b/drivers/clk/mediatek/clk-mt8365.c
@@ -0,0 +1,766 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * MediaTek clock driver for MT8365 SoC
+ *
+ * Copyright (C) 2023 BayLibre, SAS
+ * Copyright (c) 2023 MediaTek Inc.
+ * Author: Julien Masson <jmasson@baylibre.com>
+ * Author: Fabien Parent <fparent@baylibre.com>
+ * Author: Weiyi Lu <weiyi.lu@mediatek.com>
+ */
+
+#include <dm.h>
+#include <dt-bindings/clock/mediatek,mt8365-clk.h>
+#include "clk-mtk.h"
+
+/* apmixedsys */
+#define MT8365_PLL_FMAX (3800UL * MHZ)
+#define MT8365_PLL_FMIN (1500UL * MHZ)
+#define CON0_MT8365_RST_BAR BIT(23)
+#define PLL_AO BIT(1)
+
+#define PLL(_id, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, _pd_reg, \
+ _pd_shift, _pcw_reg, _pcw_shift, _rst_bar_mask, _pcw_chg_reg) { \
+ .id = _id, \
+ .reg = _reg, \
+ .pwr_reg = _pwr_reg, \
+ .en_mask = _en_mask, \
+ .pd_reg = _pd_reg, \
+ .pd_shift = _pd_shift, \
+ .flags = _flags, \
+ .rst_bar_mask = _rst_bar_mask, \
+ .fmax = MT8365_PLL_FMAX, \
+ .fmin = MT8365_PLL_FMIN, \
+ .pcwbits = _pcwbits, \
+ .pcwibits = 8, \
+ .pcw_reg = _pcw_reg, \
+ .pcw_shift = _pcw_shift, \
+ .pcw_chg_reg = _pcw_chg_reg, \
+ }
+
+static const struct mtk_pll_data apmixed_plls[] = {
+ PLL(CLK_APMIXED_ARMPLL, 0x030C, 0x0318, 0x00000001, PLL_AO, 22, 0x0310,
+ 24, 0x0310, 0, 0, 0),
+ PLL(CLK_APMIXED_MAINPLL, 0x0228, 0x0234, 0xFF000001, HAVE_RST_BAR, 22,
+ 0x022C, 24, 0x022C, 0, CON0_MT8365_RST_BAR, 0),
+ PLL(CLK_APMIXED_UNIVPLL, 0x0208, 0x0214, 0xFF000001, HAVE_RST_BAR, 22,
+ 0x020C, 24, 0x020C, 0, CON0_MT8365_RST_BAR, 0),
+ PLL(CLK_APMIXED_MFGPLL, 0x0218, 0x0224, 0x00000001, 0, 22, 0x021C, 24,
+ 0x021C, 0, 0, 0),
+ PLL(CLK_APMIXED_MSDCPLL, 0x0350, 0x035C, 0x00000001, 0, 22, 0x0354, 24,
+ 0x0354, 0, 0, 0),
+ PLL(CLK_APMIXED_MMPLL, 0x0330, 0x033C, 0x00000001, 0, 22, 0x0334, 24,
+ 0x0334, 0, 0, 0),
+ PLL(CLK_APMIXED_APLL1, 0x031C, 0x032C, 0x00000001, 0, 32, 0x0320, 24,
+ 0x0324, 0, 0, 0x0320),
+ PLL(CLK_APMIXED_APLL2, 0x0360, 0x0370, 0x00000001, 0, 32, 0x0364, 24,
+ 0x0368, 0, 0, 0x0364),
+ PLL(CLK_APMIXED_LVDSPLL, 0x0374, 0x0380, 0x00000001, 0, 22, 0x0378, 24,
+ 0x0378, 0, 0, 0),
+ PLL(CLK_APMIXED_DSPPLL, 0x0390, 0x039C, 0x00000001, 0, 22, 0x0394, 24,
+ 0x0394, 0, 0, 0),
+ PLL(CLK_APMIXED_APUPLL, 0x03A0, 0x03AC, 0x00000001, 0, 22, 0x03A4, 24,
+ 0x03A4, 0, 0, 0),
+};
+
+/* topckgen */
+static const struct mtk_fixed_clk top_fixed_clks[] = {
+ FIXED_CLK(CLK_TOP_CLK_NULL, CLK_XTAL, 0),
+ FIXED_CLK(CLK_TOP_I2S0_BCK, CLK_XTAL, 26000000),
+ FIXED_CLK(CLK_TOP_DSI0_LNTC_DSICK, CLK_TOP_CLK26M, 75000000),
+ FIXED_CLK(CLK_TOP_VPLL_DPIX, CLK_TOP_CLK26M, 75000000),
+ FIXED_CLK(CLK_TOP_LVDSTX_CLKDIG_CTS, CLK_TOP_CLK26M, 52500000),
+};
+
+#define PLL_FACTOR(_id, _name, _parent, _mult, _div) \
+ FACTOR(_id, _parent, _mult, _div, CLK_PARENT_APMIXED)
+
+static const struct mtk_fixed_factor top_divs[] = {
+ PLL_FACTOR(CLK_TOP_SYS_26M_D2, "sys_26m_d2", CLK_XTAL, 1, 2),
+ PLL_FACTOR(CLK_TOP_SYSPLL_D2, "syspll_d2", CLK_APMIXED_MAINPLL, 1, 2),
+ PLL_FACTOR(CLK_TOP_SYSPLL1_D2, "syspll1_d2", CLK_APMIXED_MAINPLL, 1, 4),
+ PLL_FACTOR(CLK_TOP_SYSPLL1_D4, "syspll1_d4", CLK_APMIXED_MAINPLL, 1, 8),
+ PLL_FACTOR(CLK_TOP_SYSPLL1_D8, "syspll1_d8", CLK_APMIXED_MAINPLL, 1, 16),
+ PLL_FACTOR(CLK_TOP_SYSPLL1_D16, "syspll1_d16", CLK_APMIXED_MAINPLL, 1, 32),
+ PLL_FACTOR(CLK_TOP_SYSPLL_D3, "syspll_d3", CLK_APMIXED_MAINPLL, 1, 3),
+ PLL_FACTOR(CLK_TOP_SYSPLL2_D2, "syspll2_d2", CLK_APMIXED_MAINPLL, 1, 6),
+ PLL_FACTOR(CLK_TOP_SYSPLL2_D4, "syspll2_d4", CLK_APMIXED_MAINPLL, 1, 12),
+ PLL_FACTOR(CLK_TOP_SYSPLL2_D8, "syspll2_d8", CLK_APMIXED_MAINPLL, 1, 24),
+ PLL_FACTOR(CLK_TOP_SYSPLL_D5, "syspll_d5", CLK_APMIXED_MAINPLL, 1, 5),
+ PLL_FACTOR(CLK_TOP_SYSPLL3_D2, "syspll3_d2", CLK_APMIXED_MAINPLL, 1, 10),
+ PLL_FACTOR(CLK_TOP_SYSPLL3_D4, "syspll3_d4", CLK_APMIXED_MAINPLL, 1, 20),
+ PLL_FACTOR(CLK_TOP_SYSPLL_D7, "syspll_d7", CLK_APMIXED_MAINPLL, 1, 7),
+ PLL_FACTOR(CLK_TOP_SYSPLL4_D2, "syspll4_d2", CLK_APMIXED_MAINPLL, 1, 14),
+ PLL_FACTOR(CLK_TOP_SYSPLL4_D4, "syspll4_d4", CLK_APMIXED_MAINPLL, 1, 28),
+ PLL_FACTOR(CLK_TOP_UNIVPLL, "univpll", CLK_APMIXED_UNIV_EN, 1, 2),
+ PLL_FACTOR(CLK_TOP_UNIVPLL_D2, "univpll_d2", CLK_APMIXED_UNIVPLL, 1, 2),
+ PLL_FACTOR(CLK_TOP_UNIVPLL1_D2, "univpll1_d2", CLK_APMIXED_UNIVPLL, 1, 4),
+ PLL_FACTOR(CLK_TOP_UNIVPLL1_D4, "univpll1_d4", CLK_APMIXED_UNIVPLL, 1, 8),
+ PLL_FACTOR(CLK_TOP_UNIVPLL_D3, "univpll_d3", CLK_APMIXED_UNIVPLL, 1, 3),
+ PLL_FACTOR(CLK_TOP_UNIVPLL2_D2, "univpll2_d2", CLK_APMIXED_UNIVPLL, 1, 6),
+ PLL_FACTOR(CLK_TOP_UNIVPLL2_D4, "univpll2_d4", CLK_APMIXED_UNIVPLL, 1, 12),
+ PLL_FACTOR(CLK_TOP_UNIVPLL2_D8, "univpll2_d8", CLK_APMIXED_UNIVPLL, 1, 24),
+ PLL_FACTOR(CLK_TOP_UNIVPLL2_D32, "univpll2_d32", CLK_APMIXED_UNIVPLL, 1, 96),
+ PLL_FACTOR(CLK_TOP_UNIVPLL_D5, "univpll_d5", CLK_APMIXED_UNIVPLL, 1, 5),
+ PLL_FACTOR(CLK_TOP_UNIVPLL3_D2, "univpll3_d2", CLK_APMIXED_UNIVPLL, 1, 10),
+ PLL_FACTOR(CLK_TOP_UNIVPLL3_D4, "univpll3_d4", CLK_APMIXED_UNIVPLL, 1, 20),
+ PLL_FACTOR(CLK_TOP_MMPLL, "mmpll_ck", CLK_APMIXED_MMPLL, 1, 1),
+ PLL_FACTOR(CLK_TOP_MMPLL_D2, "mmpll_d2", CLK_APMIXED_MMPLL, 1, 2),
+ PLL_FACTOR(CLK_TOP_MFGPLL, "mfgpll_ck", CLK_APMIXED_MFGPLL, 1, 1),
+ PLL_FACTOR(CLK_TOP_LVDSPLL_D2, "lvdspll_d2", CLK_APMIXED_LVDSPLL, 1, 2),
+ PLL_FACTOR(CLK_TOP_LVDSPLL_D4, "lvdspll_d4", CLK_APMIXED_LVDSPLL, 1, 4),
+ PLL_FACTOR(CLK_TOP_LVDSPLL_D8, "lvdspll_d8", CLK_APMIXED_LVDSPLL, 1, 8),
+ PLL_FACTOR(CLK_TOP_LVDSPLL_D16, "lvdspll_d16", CLK_APMIXED_LVDSPLL, 1, 16),
+ PLL_FACTOR(CLK_TOP_USB20_192M, "usb20_192m_ck", CLK_APMIXED_USB20_EN, 1, 13),
+ PLL_FACTOR(CLK_TOP_USB20_192M_D4, "usb20_192m_d4", CLK_TOP_USB20_192M, 1, 4),
+ PLL_FACTOR(CLK_TOP_USB20_192M_D8, "usb20_192m_d8", CLK_TOP_USB20_192M, 1, 8),
+ PLL_FACTOR(CLK_TOP_USB20_192M_D16, "usb20_192m_d16", CLK_TOP_USB20_192M, 1, 16),
+ PLL_FACTOR(CLK_TOP_USB20_192M_D32, "usb20_192m_d32", CLK_TOP_USB20_192M, 1, 32),
+ PLL_FACTOR(CLK_TOP_APLL1, "apll1_ck", CLK_APMIXED_APLL1, 1, 1),
+ PLL_FACTOR(CLK_TOP_APLL1_D2, "apll1_d2", CLK_APMIXED_APLL1, 1, 2),
+ PLL_FACTOR(CLK_TOP_APLL1_D4, "apll1_d4", CLK_APMIXED_APLL1, 1, 4),
+ PLL_FACTOR(CLK_TOP_APLL1_D8, "apll1_d8", CLK_APMIXED_APLL1, 1, 8),
+ PLL_FACTOR(CLK_TOP_APLL2, "apll2_ck", CLK_APMIXED_APLL2, 1, 1),
+ PLL_FACTOR(CLK_TOP_APLL2_D2, "apll2_d2", CLK_APMIXED_APLL2, 1, 2),
+ PLL_FACTOR(CLK_TOP_APLL2_D4, "apll2_d4", CLK_APMIXED_APLL2, 1, 4),
+ PLL_FACTOR(CLK_TOP_APLL2_D8, "apll2_d8", CLK_APMIXED_APLL2, 1, 8),
+ PLL_FACTOR(CLK_TOP_MSDCPLL, "msdcpll_ck", CLK_APMIXED_MSDCPLL, 1, 1),
+ PLL_FACTOR(CLK_TOP_MSDCPLL_D2, "msdcpll_d2", CLK_APMIXED_MSDCPLL, 1, 2),
+ PLL_FACTOR(CLK_TOP_DSPPLL, "dsppll_ck", CLK_APMIXED_DSPPLL, 1, 1),
+ PLL_FACTOR(CLK_TOP_DSPPLL_D2, "dsppll_d2", CLK_APMIXED_DSPPLL, 1, 2),
+ PLL_FACTOR(CLK_TOP_DSPPLL_D4, "dsppll_d4", CLK_APMIXED_DSPPLL, 1, 4),
+ PLL_FACTOR(CLK_TOP_DSPPLL_D8, "dsppll_d8", CLK_APMIXED_DSPPLL, 1, 8),
+ PLL_FACTOR(CLK_TOP_APUPLL, "apupll_ck", CLK_APMIXED_APUPLL, 1, 1),
+ PLL_FACTOR(CLK_TOP_CLK26M_D52, "clk26m_d52", CLK_XTAL, 1, 52),
+};
+
+static const int axi_parents[] = {
+ CLK_TOP_CLK26M,
+ CLK_TOP_SYSPLL_D7,
+ CLK_TOP_SYSPLL1_D4,
+ CLK_TOP_SYSPLL3_D2
+};
+
+static const int mem_parents[] = {
+ CLK_TOP_CLK26M,
+ CLK_TOP_MMPLL,
+ CLK_TOP_SYSPLL_D3,
+ CLK_TOP_SYSPLL1_D2
+};
+
+static const int mm_parents[] = {
+ CLK_TOP_CLK26M,
+ CLK_TOP_MMPLL,
+ CLK_TOP_SYSPLL1_D2,
+ CLK_TOP_SYSPLL_D5,
+ CLK_TOP_SYSPLL1_D4,
+ CLK_TOP_UNIVPLL_D5,
+ CLK_TOP_UNIVPLL1_D2,
+ CLK_TOP_MMPLL_D2,
+};
+
+static const int scp_parents[] = {
+ CLK_TOP_CLK26M,
+ CLK_TOP_SYSPLL4_D2,
+ CLK_TOP_UNIVPLL2_D2,
+ CLK_TOP_SYSPLL1_D2,
+ CLK_TOP_UNIVPLL1_D2,
+ CLK_TOP_SYSPLL_D3,
+ CLK_TOP_UNIVPLL_D3
+};
+
+static const int mfg_parents[] = {
+ CLK_TOP_CLK26M,
+ CLK_TOP_MFGPLL,
+ CLK_TOP_SYSPLL_D3,
+ CLK_TOP_UNIVPLL_D3
+};
+
+static const int atb_parents[] = {
+ CLK_TOP_CLK26M,
+ CLK_TOP_SYSPLL1_D4,
+ CLK_TOP_SYSPLL1_D2
+};
+
+static const int camtg_parents[] = {
+ CLK_TOP_CLK26M,
+ CLK_TOP_USB20_192M_D8,
+ CLK_TOP_UNIVPLL2_D8,
+ CLK_TOP_USB20_192M_D4,
+ CLK_TOP_UNIVPLL2_D32,
+ CLK_TOP_USB20_192M_D16,
+ CLK_TOP_USB20_192M_D32,
+};
+
+static const int uart_parents[] = {
+ CLK_TOP_CLK26M,
+ CLK_TOP_UNIVPLL2_D8
+};
+
+static const int spi_parents[] = {
+ CLK_TOP_CLK26M,
+ CLK_TOP_UNIVPLL2_D2,
+ CLK_TOP_UNIVPLL2_D4,
+ CLK_TOP_UNIVPLL2_D8
+};
+
+static const int msdc50_0_hc_parents[] = {
+ CLK_TOP_CLK26M,
+ CLK_TOP_SYSPLL1_D2,
+ CLK_TOP_UNIVPLL1_D4,
+ CLK_TOP_SYSPLL2_D2
+};
+
+static const int msdc50_0_parents[] = {
+ CLK_TOP_CLK26M,
+ CLK_TOP_MSDCPLL,
+ CLK_TOP_UNIVPLL1_D2,
+ CLK_TOP_SYSPLL1_D2,
+ CLK_TOP_UNIVPLL_D5,
+ CLK_TOP_SYSPLL2_D2,
+ CLK_TOP_UNIVPLL1_D4,
+ CLK_TOP_SYSPLL4_D2
+};
+
+static const int msdc50_2_parents[] = {
+ CLK_TOP_CLK26M,
+ CLK_TOP_MSDCPLL,
+ CLK_TOP_UNIVPLL_D3,
+ CLK_TOP_UNIVPLL1_D2,
+ CLK_TOP_SYSPLL1_D2,
+ CLK_TOP_UNIVPLL2_D2,
+ CLK_TOP_SYSPLL2_D2,
+ CLK_TOP_UNIVPLL1_D4
+};
+
+static const int msdc30_1_parents[] = {
+ CLK_TOP_CLK26M,
+ CLK_TOP_MSDCPLL_D2,
+ CLK_TOP_UNIVPLL2_D2,
+ CLK_TOP_SYSPLL2_D2,
+ CLK_TOP_UNIVPLL1_D4,
+ CLK_TOP_SYSPLL1_D4,
+ CLK_TOP_SYSPLL2_D4,
+ CLK_TOP_UNIVPLL2_D8
+};
+
+static const int audio_parents[] = {
+ CLK_TOP_CLK26M,
+ CLK_TOP_SYSPLL3_D4,
+ CLK_TOP_SYSPLL4_D4,
+ CLK_TOP_SYSPLL1_D16
+};
+
+static const int aud_intbus_parents[] = {
+ CLK_TOP_CLK26M,
+ CLK_TOP_SYSPLL1_D4,
+ CLK_TOP_SYSPLL4_D2
+};
+
+static const int aud_1_parents[] = {
+ CLK_TOP_CLK26M,
+ CLK_TOP_APLL1
+};
+
+static const int aud_2_parents[] = {
+ CLK_TOP_CLK26M,
+ CLK_TOP_APLL2
+};
+
+static const int aud_engen1_parents[] = {
+ CLK_TOP_CLK26M,
+ CLK_TOP_APLL1_D2,
+ CLK_TOP_APLL1_D4,
+ CLK_TOP_APLL1_D8
+};
+
+static const int aud_engen2_parents[] = {
+ CLK_TOP_CLK26M,
+ CLK_TOP_APLL2_D2,
+ CLK_TOP_APLL2_D4,
+ CLK_TOP_APLL2_D8,
+};
+
+static const int aud_spdif_parents[] = {
+ CLK_TOP_CLK26M,
+ CLK_TOP_UNIVPLL_D2
+};
+
+static const int disp_pwm_parents[] = {
+ CLK_TOP_CLK26M,
+ CLK_TOP_UNIVPLL2_D4
+};
+
+static const int dxcc_parents[] = {
+ CLK_TOP_CLK26M,
+ CLK_TOP_SYSPLL1_D2,
+ CLK_TOP_SYSPLL1_D4,
+ CLK_TOP_SYSPLL1_D8
+};
+
+static const int ssusb_sys_parents[] = {
+ CLK_TOP_CLK26M,
+ CLK_TOP_UNIVPLL3_D4,
+ CLK_TOP_UNIVPLL2_D4,
+ CLK_TOP_UNIVPLL3_D2
+};
+
+static const int spm_parents[] = {
+ CLK_TOP_CLK26M,
+ CLK_TOP_SYSPLL1_D8
+};
+
+static const int i2c_parents[] = {
+ CLK_TOP_CLK26M,
+ CLK_TOP_UNIVPLL3_D4,
+ CLK_TOP_UNIVPLL3_D2,
+ CLK_TOP_SYSPLL1_D8,
+ CLK_TOP_SYSPLL2_D8
+};
+
+static const int pwm_parents[] = {
+ CLK_TOP_CLK26M,
+ CLK_TOP_UNIVPLL3_D4,
+ CLK_TOP_SYSPLL1_D8
+};
+
+static const int senif_parents[] = {
+ CLK_TOP_CLK26M,
+ CLK_TOP_UNIVPLL1_D4,
+ CLK_TOP_UNIVPLL1_D2,
+ CLK_TOP_UNIVPLL2_D2
+};
+
+static const int aes_fde_parents[] = {
+ CLK_TOP_CLK26M,
+ CLK_TOP_MSDCPLL,
+ CLK_TOP_UNIVPLL_D3,
+ CLK_TOP_UNIVPLL2_D2,
+ CLK_TOP_UNIVPLL1_D2,
+ CLK_TOP_SYSPLL1_D2
+};
+
+static const int dpi0_parents[] = {
+ CLK_TOP_CLK26M,
+ CLK_TOP_LVDSPLL_D2,
+ CLK_TOP_LVDSPLL_D4,
+ CLK_TOP_LVDSPLL_D8,
+ CLK_TOP_LVDSPLL_D16
+};
+
+static const int dsp_parents[] = {
+ CLK_TOP_CLK26M,
+ CLK_TOP_SYS_26M_D2,
+ CLK_TOP_DSPPLL,
+ CLK_TOP_DSPPLL_D2,
+ CLK_TOP_DSPPLL_D4,
+ CLK_TOP_DSPPLL_D8
+};
+
+static const int nfi2x_parents[] = {
+ CLK_TOP_CLK26M,
+ CLK_TOP_SYSPLL2_D2,
+ CLK_TOP_SYSPLL_D7,
+ CLK_TOP_SYSPLL_D3,
+ CLK_TOP_SYSPLL2_D4,
+ CLK_TOP_MSDCPLL_D2,
+ CLK_TOP_UNIVPLL1_D2,
+ CLK_TOP_UNIVPLL_D5
+};
+
+static const int nfiecc_parents[] = {
+ CLK_TOP_CLK26M,
+ CLK_TOP_SYSPLL4_D2,
+ CLK_TOP_UNIVPLL2_D4,
+ CLK_TOP_SYSPLL_D7,
+ CLK_TOP_UNIVPLL1_D2,
+ CLK_TOP_SYSPLL1_D2,
+ CLK_TOP_UNIVPLL2_D2,
+ CLK_TOP_SYSPLL_D5
+};
+
+static const int ecc_parents[] = {
+ CLK_TOP_CLK26M,
+ CLK_TOP_UNIVPLL2_D2,
+ CLK_TOP_UNIVPLL1_D2,
+ CLK_TOP_UNIVPLL_D3,
+ CLK_TOP_SYSPLL_D2
+};
+
+static const int eth_parents[] = {
+ CLK_TOP_CLK26M,
+ CLK_TOP_UNIVPLL2_D8,
+ CLK_TOP_SYSPLL4_D4,
+ CLK_TOP_SYSPLL1_D8,
+ CLK_TOP_SYSPLL4_D2
+};
+
+static const int gcpu_parents[] = {
+ CLK_TOP_CLK26M,
+ CLK_TOP_UNIVPLL_D3,
+ CLK_TOP_UNIVPLL2_D2,
+ CLK_TOP_SYSPLL_D3,
+ CLK_TOP_SYSPLL2_D2
+};
+
+static const int gcpu_cpm_parents[] = {
+ CLK_TOP_CLK26M,
+ CLK_TOP_UNIVPLL2_D2,
+ CLK_TOP_SYSPLL2_D2
+};
+
+static const int apu_parents[] = {
+ CLK_TOP_CLK26M,
+ CLK_TOP_UNIVPLL_D2,
+ CLK_APMIXED_APUPLL,
+ CLK_TOP_MMPLL,
+ CLK_TOP_SYSPLL_D3,
+ CLK_TOP_UNIVPLL1_D2,
+ CLK_TOP_SYSPLL1_D2,
+ CLK_TOP_SYSPLL1_D4
+};
+
+static const struct mtk_composite top_muxes[] = {
+ /* CLK_CFG_0 */
+ MUX_GATE(CLK_TOP_AXI_SEL, axi_parents, 0x040, 0, 2, 7),
+ MUX_GATE(CLK_TOP_MEM_SEL, mem_parents, 0x040, 8, 2, 15),
+ MUX_GATE(CLK_TOP_MM_SEL, mm_parents, 0x040, 16, 3, 23),
+ MUX_GATE(CLK_TOP_SCP_SEL, scp_parents, 0x040, 24, 3, 31),
+ /* CLK_CFG_1 */
+ MUX_GATE(CLK_TOP_MFG_SEL, mfg_parents, 0x050, 0, 2, 7),
+ MUX_GATE(CLK_TOP_ATB_SEL, atb_parents, 0x050, 8, 2, 15),
+ MUX_GATE(CLK_TOP_CAMTG_SEL, camtg_parents, 0x050, 16, 3, 23),
+ MUX_GATE(CLK_TOP_CAMTG1_SEL, camtg_parents, 0x050, 24, 3, 31),
+ /* CLK_CFG_2 */
+ MUX_GATE(CLK_TOP_UART_SEL, uart_parents, 0x060, 0, 1, 7),
+ MUX_GATE(CLK_TOP_SPI_SEL, spi_parents, 0x060, 8, 2, 15),
+ MUX_GATE(CLK_TOP_MSDC50_0_HC_SEL, msdc50_0_hc_parents, 0x060, 16, 2, 23),
+ MUX_GATE(CLK_TOP_MSDC2_2_HC_SEL, msdc50_0_hc_parents, 0x060, 24, 2, 31),
+ /* CLK_CFG_3 */
+ MUX_GATE(CLK_TOP_MSDC50_0_SEL, msdc50_0_parents, 0x070, 0, 3, 7),
+ MUX_GATE(CLK_TOP_MSDC50_2_SEL, msdc50_2_parents, 0x070, 8, 3, 15),
+ MUX_GATE(CLK_TOP_MSDC30_1_SEL, msdc30_1_parents, 0x070, 16, 3, 23),
+ MUX_GATE(CLK_TOP_AUDIO_SEL, audio_parents, 0x070, 24, 2, 31),
+ /* CLK_CFG_4 */
+ MUX_GATE(CLK_TOP_AUD_INTBUS_SEL, aud_intbus_parents, 0x080, 0, 2, 7),
+ MUX_GATE(CLK_TOP_AUD_1_SEL, aud_1_parents, 0x080, 8, 1, 15),
+ MUX_GATE(CLK_TOP_AUD_2_SEL, aud_2_parents, 0x080, 16, 1, 23),
+ MUX_GATE(CLK_TOP_AUD_ENGEN1_SEL, aud_engen1_parents, 0x080, 24, 2, 31),
+ /* CLK_CFG_5 */
+ MUX_GATE(CLK_TOP_AUD_ENGEN2_SEL, aud_engen2_parents, 0x090, 0, 2, 7),
+ MUX_GATE(CLK_TOP_AUD_SPDIF_SEL, aud_spdif_parents, 0x090, 8, 1, 15),
+ MUX_GATE(CLK_TOP_DISP_PWM_SEL, disp_pwm_parents, 0x090, 16, 2, 23),
+ /* CLK_CFG_6 */
+ MUX_GATE(CLK_TOP_DXCC_SEL, dxcc_parents, 0x0a0, 0, 2, 7),
+ MUX_GATE(CLK_TOP_SSUSB_SYS_SEL, ssusb_sys_parents, 0x0a0, 8, 2, 15),
+ MUX_GATE(CLK_TOP_SSUSB_XHCI_SEL, ssusb_sys_parents, 0x0a0, 16, 2, 23),
+ MUX_GATE(CLK_TOP_SPM_SEL, spm_parents, 0x0a0, 24, 1, 31),
+ /* CLK_CFG_7 */
+ MUX_GATE(CLK_TOP_I2C_SEL, i2c_parents, 0x0b0, 0, 3, 7),
+ MUX_GATE(CLK_TOP_PWM_SEL, pwm_parents, 0x0b0, 8, 2, 15),
+ MUX_GATE(CLK_TOP_SENIF_SEL, senif_parents, 0x0b0, 16, 2, 23),
+ MUX_GATE(CLK_TOP_AES_FDE_SEL, aes_fde_parents, 0x0b0, 24, 3, 31),
+ /* CLK_CFG_8 */
+ MUX_GATE(CLK_TOP_CAMTM_SEL, senif_parents, 0x0c0, 0, 2, 7),
+ MUX_GATE(CLK_TOP_DPI0_SEL, dpi0_parents, 0x0c0, 8, 3, 15),
+ MUX_GATE(CLK_TOP_DPI1_SEL, dpi0_parents, 0x0c0, 16, 3, 23),
+ MUX_GATE(CLK_TOP_DSP_SEL, dsp_parents, 0x0c0, 24, 3, 31),
+ /* CLK_CFG_9 */
+ MUX_GATE(CLK_TOP_NFI2X_SEL, nfi2x_parents, 0x0d0, 0, 3, 7),
+ MUX_GATE(CLK_TOP_NFIECC_SEL, nfiecc_parents, 0x0d0, 8, 3, 15),
+ MUX_GATE(CLK_TOP_ECC_SEL, ecc_parents, 0x0d0, 16, 3, 23),
+ MUX_GATE(CLK_TOP_ETH_SEL, eth_parents, 0x0d0, 24, 3, 31),
+ /* CLK_CFG_10 */
+ MUX_GATE(CLK_TOP_GCPU_SEL, gcpu_parents, 0x0e0, 0, 3, 7),
+ MUX_GATE(CLK_TOP_GCPU_CPM_SEL, gcpu_cpm_parents, 0x0e0, 8, 2, 15),
+ MUX_GATE(CLK_TOP_APU_SEL, apu_parents, 0x0e0, 16, 3, 23),
+ MUX_GATE(CLK_TOP_APU_IF_SEL, apu_parents, 0x0e0, 24, 3, 31),
+};
+
+static const struct mtk_clk_tree mt8365_clk_tree = {
+ .xtal_rate = 26 * MHZ,
+ .xtal2_rate = 26 * MHZ,
+ .fdivs_offs = CLK_TOP_SYSPLL_D2,
+ .muxes_offs = CLK_TOP_AXI_SEL,
+ .plls = apmixed_plls,
+ .fclks = top_fixed_clks,
+ .fdivs = top_divs,
+ .muxes = top_muxes,
+};
+
+/* topckgen cg */
+static const struct mtk_gate_regs top0_cg_regs = {
+ .set_ofs = 0,
+ .clr_ofs = 0,
+ .sta_ofs = 0,
+};
+
+static const struct mtk_gate_regs top1_cg_regs = {
+ .set_ofs = 0x104,
+ .clr_ofs = 0x104,
+ .sta_ofs = 0x104,
+};
+
+static const struct mtk_gate_regs top2_cg_regs = {
+ .set_ofs = 0x320,
+ .clr_ofs = 0x320,
+ .sta_ofs = 0x320,
+};
+
+#define GATE_TOP0(_id, _parent, _shift) { \
+ .id = _id, \
+ .parent = _parent, \
+ .regs = &top0_cg_regs, \
+ .shift = _shift, \
+ .flags = CLK_GATE_NO_SETCLR | CLK_PARENT_TOPCKGEN, \
+ }
+
+#define GATE_TOP1(_id, _parent, _shift) { \
+ .id = _id, \
+ .parent = _parent, \
+ .regs = &top1_cg_regs, \
+ .shift = _shift, \
+ .flags = CLK_GATE_NO_SETCLR_INV | CLK_PARENT_TOPCKGEN, \
+ }
+
+#define GATE_TOP2(_id, _parent, _shift) { \
+ .id = _id, \
+ .parent = _parent, \
+ .regs = &top2_cg_regs, \
+ .shift = _shift, \
+ .flags = CLK_GATE_NO_SETCLR_INV | CLK_PARENT_TOPCKGEN, \
+ }
+
+static const struct mtk_gate top_clk_gates[] = {
+ GATE_TOP0(CLK_TOP_CONN_32K, CLK_TOP_CLK32K, 10),
+ GATE_TOP0(CLK_TOP_CONN_26M, CLK_TOP_CLK26M, 11),
+ GATE_TOP0(CLK_TOP_DSP_32K, CLK_TOP_CLK32K, 16),
+ GATE_TOP0(CLK_TOP_DSP_26M, CLK_TOP_CLK26M, 17),
+ GATE_TOP1(CLK_TOP_USB20_48M_EN, CLK_TOP_USB20_192M_D4, 8),
+ GATE_TOP1(CLK_TOP_UNIVPLL_48M_EN, CLK_TOP_USB20_192M_D4, 9),
+ GATE_TOP1(CLK_TOP_LVDSTX_CLKDIG_EN, CLK_TOP_LVDSTX_CLKDIG_CTS, 20),
+ GATE_TOP1(CLK_TOP_VPLL_DPIX_EN, CLK_TOP_VPLL_DPIX, 21),
+ GATE_TOP1(CLK_TOP_SSUSB_TOP_CK_EN, CLK_TOP_CLK_NULL, 22),
+ GATE_TOP1(CLK_TOP_SSUSB_PHY_CK_EN, CLK_TOP_CLK_NULL, 23),
+ GATE_TOP2(CLK_TOP_AUD_I2S0_M, CLK_TOP_APLL12_CK_DIV0, 0),
+ GATE_TOP2(CLK_TOP_AUD_I2S1_M, CLK_TOP_APLL12_CK_DIV1, 1),
+ GATE_TOP2(CLK_TOP_AUD_I2S2_M, CLK_TOP_APLL12_CK_DIV2, 2),
+ GATE_TOP2(CLK_TOP_AUD_I2S3_M, CLK_TOP_APLL12_CK_DIV3, 3),
+ GATE_TOP2(CLK_TOP_AUD_TDMOUT_M, CLK_TOP_APLL12_CK_DIV4, 4),
+ GATE_TOP2(CLK_TOP_AUD_TDMOUT_B, CLK_TOP_APLL12_CK_DIV4B, 5),
+ GATE_TOP2(CLK_TOP_AUD_TDMIN_M, CLK_TOP_APLL12_CK_DIV5, 6),
+ GATE_TOP2(CLK_TOP_AUD_TDMIN_B, CLK_TOP_APLL12_CK_DIV5B, 7),
+ GATE_TOP2(CLK_TOP_AUD_SPDIF_M, CLK_TOP_APLL12_CK_DIV6, 8),
+};
+
+/* infracfg */
+static const struct mtk_gate_regs ifr2_cg_regs = {
+ .set_ofs = 0x80,
+ .clr_ofs = 0x84,
+ .sta_ofs = 0x90,
+};
+
+static const struct mtk_gate_regs ifr3_cg_regs = {
+ .set_ofs = 0x88,
+ .clr_ofs = 0x8c,
+ .sta_ofs = 0x94,
+};
+
+static const struct mtk_gate_regs ifr4_cg_regs = {
+ .set_ofs = 0xa4,
+ .clr_ofs = 0xa8,
+ .sta_ofs = 0xac,
+};
+
+static const struct mtk_gate_regs ifr5_cg_regs = {
+ .set_ofs = 0xc0,
+ .clr_ofs = 0xc4,
+ .sta_ofs = 0xc8,
+};
+
+static const struct mtk_gate_regs ifr6_cg_regs = {
+ .set_ofs = 0xd0,
+ .clr_ofs = 0xd4,
+ .sta_ofs = 0xd8,
+};
+
+#define GATE_IFRX(_id, _parent, _shift, _regs) \
+ { \
+ .id = _id, \
+ .parent = _parent, \
+ .regs = _regs, \
+ .shift = _shift, \
+ .flags = CLK_GATE_SETCLR | CLK_PARENT_TOPCKGEN, \
+ }
+
+#define GATE_IFR2(_id, _parent, _shift) \
+ GATE_IFRX(_id, _parent, _shift, &ifr2_cg_regs)
+
+#define GATE_IFR3(_id, _parent, _shift) \
+ GATE_IFRX(_id, _parent, _shift, &ifr3_cg_regs)
+
+#define GATE_IFR4(_id, _parent, _shift) \
+ GATE_IFRX(_id, _parent, _shift, &ifr4_cg_regs)
+
+#define GATE_IFR5(_id, _parent, _shift) \
+ GATE_IFRX(_id, _parent, _shift, &ifr5_cg_regs)
+
+#define GATE_IFR6(_id, _parent, _shift) \
+ GATE_IFRX(_id, _parent, _shift, &ifr6_cg_regs)
+
+static const struct mtk_gate ifr_clks[] = {
+ /* IFR2 */
+ GATE_IFR2(CLK_IFR_PMIC_TMR, CLK_TOP_CLK26M, 0),
+ GATE_IFR2(CLK_IFR_PMIC_AP, CLK_TOP_CLK26M, 1),
+ GATE_IFR2(CLK_IFR_PMIC_MD, CLK_TOP_CLK26M, 2),
+ GATE_IFR2(CLK_IFR_PMIC_CONN, CLK_TOP_CLK26M, 3),
+ GATE_IFR2(CLK_IFR_ICUSB, CLK_TOP_AXI_SEL, 8),
+ GATE_IFR2(CLK_IFR_GCE, CLK_TOP_AXI_SEL, 9),
+ GATE_IFR2(CLK_IFR_THERM, CLK_TOP_AXI_SEL, 10),
+ GATE_IFR2(CLK_IFR_PWM_HCLK, CLK_TOP_AXI_SEL, 15),
+ GATE_IFR2(CLK_IFR_PWM1, CLK_TOP_PWM_SEL, 16),
+ GATE_IFR2(CLK_IFR_PWM2, CLK_TOP_PWM_SEL, 17),
+ GATE_IFR2(CLK_IFR_PWM3, CLK_TOP_PWM_SEL, 18),
+ GATE_IFR2(CLK_IFR_PWM4, CLK_TOP_PWM_SEL, 19),
+ GATE_IFR2(CLK_IFR_PWM5, CLK_TOP_PWM_SEL, 20),
+ GATE_IFR2(CLK_IFR_PWM, CLK_TOP_PWM_SEL, 21),
+ GATE_IFR2(CLK_IFR_UART0, CLK_TOP_UART_SEL, 22),
+ GATE_IFR2(CLK_IFR_UART1, CLK_TOP_UART_SEL, 23),
+ GATE_IFR2(CLK_IFR_UART2, CLK_TOP_UART_SEL, 24),
+ GATE_IFR2(CLK_IFR_DSP_UART, CLK_TOP_UART_SEL, 26),
+ GATE_IFR2(CLK_IFR_GCE_26M, CLK_TOP_CLK26M, 27),
+ GATE_IFR2(CLK_IFR_CQ_DMA_FPC, CLK_TOP_AXI_SEL, 28),
+ GATE_IFR2(CLK_IFR_BTIF, CLK_TOP_AXI_SEL, 31),
+ /* IFR3 */
+ GATE_IFR3(CLK_IFR_SPI0, CLK_TOP_SPI_SEL, 1),
+ GATE_IFR3(CLK_IFR_MSDC0_HCLK, CLK_TOP_MSDC50_0_HC_SEL, 2),
+ GATE_IFR3(CLK_IFR_MSDC2_HCLK, CLK_TOP_MSDC2_2_HC_SEL, 3),
+ GATE_IFR3(CLK_IFR_MSDC1_HCLK, CLK_TOP_AXI_SEL, 4),
+ GATE_IFR3(CLK_IFR_DVFSRC, CLK_TOP_CLK26M, 7),
+ GATE_IFR3(CLK_IFR_GCPU, CLK_TOP_AXI_SEL, 8),
+ GATE_IFR3(CLK_IFR_TRNG, CLK_TOP_AXI_SEL, 9),
+ GATE_IFR3(CLK_IFR_AUXADC, CLK_TOP_CLK26M, 10),
+ GATE_IFR3(CLK_IFR_AUXADC_MD, CLK_TOP_CLK26M, 14),
+ GATE_IFR3(CLK_IFR_AP_DMA, CLK_TOP_AXI_SEL, 18),
+ GATE_IFR3(CLK_IFR_DEBUGSYS, CLK_TOP_AXI_SEL, 24),
+ GATE_IFR3(CLK_IFR_AUDIO, CLK_TOP_AXI_SEL, 25),
+ /* IFR4 */
+ GATE_IFR4(CLK_IFR_PWM_FBCLK6, CLK_TOP_PWM_SEL, 0),
+ GATE_IFR4(CLK_IFR_DISP_PWM, CLK_TOP_DISP_PWM_SEL, 2),
+ GATE_IFR4(CLK_IFR_AUD_26M_BK, CLK_TOP_CLK26M, 4),
+ GATE_IFR4(CLK_IFR_CQ_DMA, CLK_TOP_AXI_SEL, 27),
+ /* IFR5 */
+ GATE_IFR5(CLK_IFR_MSDC0_SF, CLK_TOP_MSDC50_0_SEL, 0),
+ GATE_IFR5(CLK_IFR_MSDC1_SF, CLK_TOP_MSDC50_0_SEL, 1),
+ GATE_IFR5(CLK_IFR_MSDC2_SF, CLK_TOP_MSDC50_0_SEL, 2),
+ GATE_IFR5(CLK_IFR_AP_MSDC0, CLK_TOP_MSDC50_0_SEL, 7),
+ GATE_IFR5(CLK_IFR_MD_MSDC0, CLK_TOP_MSDC50_0_SEL, 8),
+ GATE_IFR5(CLK_IFR_MSDC0_SRC, CLK_TOP_MSDC50_0_SEL, 9),
+ GATE_IFR5(CLK_IFR_MSDC1_SRC, CLK_TOP_MSDC30_1_SEL, 10),
+ GATE_IFR5(CLK_IFR_MSDC2_SRC, CLK_TOP_MSDC50_2_SEL, 11),
+ GATE_IFR5(CLK_IFR_PWRAP_TMR, CLK_TOP_CLK26M, 12),
+ GATE_IFR5(CLK_IFR_PWRAP_SPI, CLK_TOP_CLK26M, 13),
+ GATE_IFR5(CLK_IFR_PWRAP_SYS, CLK_TOP_CLK26M, 14),
+ GATE_IFR5(CLK_IFR_IRRX_26M, CLK_TOP_CLK26M, 22),
+ GATE_IFR5(CLK_IFR_IRRX_32K, CLK_TOP_CLK32K, 23),
+ GATE_IFR5(CLK_IFR_I2C0_AXI, CLK_TOP_I2C_SEL, 24),
+ GATE_IFR5(CLK_IFR_I2C1_AXI, CLK_TOP_I2C_SEL, 25),
+ GATE_IFR5(CLK_IFR_I2C2_AXI, CLK_TOP_I2C_SEL, 26),
+ GATE_IFR5(CLK_IFR_I2C3_AXI, CLK_TOP_I2C_SEL, 27),
+ GATE_IFR5(CLK_IFR_NIC_AXI, CLK_TOP_AXI_SEL, 28),
+ GATE_IFR5(CLK_IFR_NIC_SLV_AXI, CLK_TOP_AXI_SEL, 29),
+ GATE_IFR5(CLK_IFR_APU_AXI, CLK_TOP_AXI_SEL, 30),
+ /* IFR6 */
+ GATE_IFR6(CLK_IFR_NFIECC, CLK_TOP_NFIECC_SEL, 0),
+ GATE_IFR6(CLK_IFR_NFI1X_BK, CLK_TOP_NFI2X_SEL, 1),
+ GATE_IFR6(CLK_IFR_NFIECC_BK, CLK_TOP_NFI2X_SEL, 2),
+ GATE_IFR6(CLK_IFR_NFI_BK, CLK_TOP_AXI_SEL, 3),
+ GATE_IFR6(CLK_IFR_MSDC2_AP_BK, CLK_TOP_AXI_SEL, 4),
+ GATE_IFR6(CLK_IFR_MSDC2_MD_BK, CLK_TOP_AXI_SEL, 5),
+ GATE_IFR6(CLK_IFR_MSDC2_BK, CLK_TOP_AXI_SEL, 6),
+ GATE_IFR6(CLK_IFR_SUSB_133_BK, CLK_TOP_AXI_SEL, 7),
+ GATE_IFR6(CLK_IFR_SUSB_66_BK, CLK_TOP_AXI_SEL, 8),
+ GATE_IFR6(CLK_IFR_SSUSB_SYS, CLK_TOP_SSUSB_SYS_SEL, 9),
+ GATE_IFR6(CLK_IFR_SSUSB_REF, CLK_TOP_SSUSB_SYS_SEL, 10),
+ GATE_IFR6(CLK_IFR_SSUSB_XHCI, CLK_TOP_SSUSB_XHCI_SEL, 11),
+};
+
+static int mt8365_apmixedsys_probe(struct udevice *dev)
+{
+ return mtk_common_clk_init(dev, &mt8365_clk_tree);
+}
+
+static int mt8365_topckgen_probe(struct udevice *dev)
+{
+ return mtk_common_clk_init(dev, &mt8365_clk_tree);
+}
+
+static int mt8365_topckgen_cg_probe(struct udevice *dev)
+{
+ return mtk_common_clk_gate_init(dev, &mt8365_clk_tree, top_clk_gates);
+}
+
+static int mt8365_infracfg_probe(struct udevice *dev)
+{
+ return mtk_common_clk_gate_init(dev, &mt8365_clk_tree, ifr_clks);
+}
+
+static const struct udevice_id mt8365_apmixed_compat[] = {
+ { .compatible = "mediatek,mt8365-apmixedsys", },
+ { }
+};
+
+static const struct udevice_id mt8365_topckgen_compat[] = {
+ { .compatible = "mediatek,mt8365-topckgen", },
+ { }
+};
+
+static const struct udevice_id mt8365_topckgen_cg_compat[] = {
+ { .compatible = "mediatek,mt8365-topckgen-cg", },
+ { }
+};
+
+static const struct udevice_id mt8365_infracfg_compat[] = {
+ { .compatible = "mediatek,mt8365-infracfg", },
+ { }
+};
+
+U_BOOT_DRIVER(mtk_clk_apmixedsys) = {
+ .name = "mt8365-apmixedsys",
+ .id = UCLASS_CLK,
+ .of_match = mt8365_apmixed_compat,
+ .probe = mt8365_apmixedsys_probe,
+ .priv_auto = sizeof(struct mtk_clk_priv),
+ .ops = &mtk_clk_apmixedsys_ops,
+ .flags = DM_FLAG_PRE_RELOC,
+};
+
+U_BOOT_DRIVER(mtk_clk_topckgen) = {
+ .name = "mt8365-topckgen",
+ .id = UCLASS_CLK,
+ .of_match = mt8365_topckgen_compat,
+ .probe = mt8365_topckgen_probe,
+ .priv_auto = sizeof(struct mtk_clk_priv),
+ .ops = &mtk_clk_topckgen_ops,
+ .flags = DM_FLAG_PRE_RELOC,
+};
+
+U_BOOT_DRIVER(mtk_clk_topckgen_cg) = {
+ .name = "mt8365-topckgen-cg",
+ .id = UCLASS_CLK,
+ .of_match = mt8365_topckgen_cg_compat,
+ .probe = mt8365_topckgen_cg_probe,
+ .priv_auto = sizeof(struct mtk_cg_priv),
+ .ops = &mtk_clk_gate_ops,
+ .flags = DM_FLAG_PRE_RELOC,
+};
+
+U_BOOT_DRIVER(mtk_clk_infracfg) = {
+ .name = "mt8365-infracfg",
+ .id = UCLASS_CLK,
+ .of_match = mt8365_infracfg_compat,
+ .probe = mt8365_infracfg_probe,
+ .priv_auto = sizeof(struct mtk_cg_priv),
+ .ops = &mtk_clk_gate_ops,
+ .flags = DM_FLAG_PRE_RELOC,
+};
diff --git a/drivers/clk/meson/a1.c b/drivers/clk/meson/a1.c
index d0f5bb3..5220a33 100644
--- a/drivers/clk/meson/a1.c
+++ b/drivers/clk/meson/a1.c
@@ -607,14 +607,6 @@
return meson_mux_set_parent_by_id(clk, parent_clk->id);
}
-static struct clk_ops meson_clk_ops = {
- .disable = meson_clk_disable,
- .enable = meson_clk_enable,
- .get_rate = meson_clk_get_rate,
- .set_rate = meson_clk_set_rate,
- .set_parent = meson_clk_set_parent,
-};
-
static int meson_clk_probe(struct udevice *dev)
{
struct meson_clk *priv = dev_get_priv(dev);
@@ -644,15 +636,7 @@
{ }
};
-U_BOOT_DRIVER(meson_clk) = {
- .name = "meson-clk-a1",
- .id = UCLASS_CLK,
- .of_match = meson_clk_ids,
- .priv_auto = sizeof(struct meson_clk),
- .ops = &meson_clk_ops,
- .probe = meson_clk_probe,
-};
-
+#if IS_ENABLED(CONFIG_CMD_CLK)
static const char *meson_clk_get_name(struct clk *clk, int id)
{
const struct meson_clk_info *info;
@@ -662,7 +646,7 @@
return IS_ERR(info) ? "unknown" : info->name;
}
-static int meson_clk_dump(struct clk *clk)
+static int meson_clk_dump_single(struct clk *clk)
{
const struct meson_clk_info *info;
struct meson_clk *priv;
@@ -697,7 +681,7 @@
return 0;
}
-static int meson_clk_dump_dev(struct udevice *dev)
+static void meson_clk_dump(struct udevice *dev)
{
int i;
struct meson_clk_data *data;
@@ -710,26 +694,30 @@
data = (struct meson_clk_data *)dev_get_driver_data(dev);
for (i = 0; i < data->num_clocks; i++) {
- meson_clk_dump(&(struct clk){
+ meson_clk_dump_single(&(struct clk){
.dev = dev,
.id = i
});
}
-
- return 0;
}
+#endif
-int soc_clk_dump(void)
-{
- struct udevice *dev;
- int i = 0;
+static struct clk_ops meson_clk_ops = {
+ .disable = meson_clk_disable,
+ .enable = meson_clk_enable,
+ .get_rate = meson_clk_get_rate,
+ .set_rate = meson_clk_set_rate,
+ .set_parent = meson_clk_set_parent,
+#if IS_ENABLED(CONFIG_CMD_CLK)
+ .dump = meson_clk_dump,
+#endif
+};
- while (!uclass_get_device(UCLASS_CLK, i++, &dev)) {
- if (dev->driver == DM_DRIVER_GET(meson_clk)) {
- meson_clk_dump_dev(dev);
- printf("\n");
- }
- }
-
- return 0;
-}
+U_BOOT_DRIVER(meson_clk) = {
+ .name = "meson-clk-a1",
+ .id = UCLASS_CLK,
+ .of_match = meson_clk_ids,
+ .priv_auto = sizeof(struct meson_clk),
+ .ops = &meson_clk_ops,
+ .probe = meson_clk_probe,
+};
diff --git a/drivers/clk/mvebu/armada-37xx-periph.c b/drivers/clk/mvebu/armada-37xx-periph.c
index e75052f..1a70970 100644
--- a/drivers/clk/mvebu/armada-37xx-periph.c
+++ b/drivers/clk/mvebu/armada-37xx-periph.c
@@ -488,33 +488,36 @@
static int clk_dump(const char *name, int (*func)(struct udevice *))
{
struct udevice *dev;
+ int ret;
if (uclass_get_device_by_name(UCLASS_CLK, name, &dev)) {
printf("Cannot find device %s\n", name);
return -ENODEV;
}
- return func(dev);
+ ret = func(dev);
+ if (ret)
+ printf("Dump failed for %s: %d\n", name, ret);
+
+ return ret;
}
int armada_37xx_tbg_clk_dump(struct udevice *);
-int soc_clk_dump(void)
+static void armada37xx_clk_dump(struct udevice __always_unused *dev)
{
printf(" xtal at %u000000 Hz\n\n", get_ref_clk());
if (clk_dump("tbg@13200", armada_37xx_tbg_clk_dump))
- return 1;
+ return;
if (clk_dump("nb-periph-clk@13000",
armada_37xx_periph_clk_dump))
- return 1;
+ return;
if (clk_dump("sb-periph-clk@18000",
armada_37xx_periph_clk_dump))
- return 1;
-
- return 0;
+ return;
}
#endif
@@ -605,6 +608,9 @@
.set_parent = armada_37xx_periph_clk_set_parent,
.enable = armada_37xx_periph_clk_enable,
.disable = armada_37xx_periph_clk_disable,
+#if IS_ENABLED(CONFIG_CMD_CLK)
+ .dump = armada37xx_clk_dump,
+#endif
};
static const struct udevice_id armada_37xx_periph_clk_ids[] = {
diff --git a/drivers/clk/nuvoton/clk_npcm.c b/drivers/clk/nuvoton/clk_npcm.c
index 8d71f2a..18cb9cd 100644
--- a/drivers/clk/nuvoton/clk_npcm.c
+++ b/drivers/clk/nuvoton/clk_npcm.c
@@ -135,7 +135,7 @@
return div;
}
-static u32 npcm_clk_set_div(struct clk *clk, u32 div)
+static int npcm_clk_set_div(struct clk *clk, u32 div)
{
struct npcm_clk_priv *priv = dev_get_priv(clk->dev);
struct npcm_clk_div *divider;
@@ -145,6 +145,9 @@
if (!divider)
return -EINVAL;
+ if (divider->flags & DIV_RO)
+ return 0;
+
if (divider->flags & PRE_DIV2)
div = div >> 1;
@@ -153,6 +156,12 @@
else
clkdiv = ilog2(div);
+ if (clkdiv > (divider->mask >> (ffs(divider->mask) - 1))) {
+ printf("clkdiv(%d) for clk(%ld) is over limit\n",
+ clkdiv, clk->id);
+ return -EINVAL;
+ }
+
val = readl(priv->base + divider->reg);
val &= ~divider->mask;
val |= (clkdiv << (ffs(divider->mask) - 1)) & divider->mask;
@@ -253,8 +262,8 @@
if (ret)
return ret;
- debug("%s: rate %lu, new rate (%lu / %u)\n", __func__, rate, parent_rate, div);
- return (parent_rate / div);
+ debug("%s: rate %lu, new rate %lu\n", __func__, rate, npcm_clk_get_rate(clk));
+ return npcm_clk_get_rate(clk);
}
static int npcm_clk_set_parent(struct clk *clk, struct clk *parent)
diff --git a/drivers/clk/nuvoton/clk_npcm.h b/drivers/clk/nuvoton/clk_npcm.h
index 06b60dc..b4726d8 100644
--- a/drivers/clk/nuvoton/clk_npcm.h
+++ b/drivers/clk/nuvoton/clk_npcm.h
@@ -50,6 +50,7 @@
#define PRE_DIV2 BIT(2) /* Pre divisor = 2 */
#define POST_DIV2 BIT(3) /* Post divisor = 2 */
#define FIXED_PARENT BIT(4) /* clock source is fixed */
+#define DIV_RO BIT(5) /* divider is read-only */
/* Parameters of PLL configuration */
struct npcm_clk_pll {
diff --git a/drivers/clk/nuvoton/clk_npcm8xx.c b/drivers/clk/nuvoton/clk_npcm8xx.c
index 27e3cfc..d1b32e3 100644
--- a/drivers/clk/nuvoton/clk_npcm8xx.c
+++ b/drivers/clk/nuvoton/clk_npcm8xx.c
@@ -45,12 +45,12 @@
};
static struct npcm_clk_div npcm8xx_clk_dividers[] = {
- {NPCM8XX_CLK_AHB, CLKDIV1, CLK4DIV, DIV_TYPE1 | PRE_DIV2},
- {NPCM8XX_CLK_APB2, CLKDIV2, APB2CKDIV, DIV_TYPE2},
- {NPCM8XX_CLK_APB5, CLKDIV2, APB5CKDIV, DIV_TYPE2},
- {NPCM8XX_CLK_SPI0, CLKDIV3, SPI0CKDIV, DIV_TYPE1},
- {NPCM8XX_CLK_SPI1, CLKDIV3, SPI1CKDIV, DIV_TYPE1},
- {NPCM8XX_CLK_SPI3, CLKDIV1, SPI3CKDIV, DIV_TYPE1},
+ {NPCM8XX_CLK_AHB, CLKDIV1, CLK4DIV, DIV_TYPE1 | PRE_DIV2 | DIV_RO},
+ {NPCM8XX_CLK_APB2, CLKDIV2, APB2CKDIV, DIV_TYPE2 | DIV_RO},
+ {NPCM8XX_CLK_APB5, CLKDIV2, APB5CKDIV, DIV_TYPE2 | DIV_RO},
+ {NPCM8XX_CLK_SPI0, CLKDIV3, SPI0CKDIV, DIV_TYPE1 | DIV_RO},
+ {NPCM8XX_CLK_SPI1, CLKDIV3, SPI1CKDIV, DIV_TYPE1 | DIV_RO},
+ {NPCM8XX_CLK_SPI3, CLKDIV1, SPI3CKDIV, DIV_TYPE1 | DIV_RO},
{NPCM8XX_CLK_SPIX, CLKDIV3, SPIXCKDIV, DIV_TYPE1},
{NPCM8XX_CLK_UART, CLKDIV1, UARTDIV1, DIV_TYPE1},
{NPCM8XX_CLK_UART2, CLKDIV3, UARTDIV2, DIV_TYPE1},
diff --git a/drivers/clk/qcom/Kconfig b/drivers/clk/qcom/Kconfig
new file mode 100644
index 0000000..0df0d18
--- /dev/null
+++ b/drivers/clk/qcom/Kconfig
@@ -0,0 +1,52 @@
+if ARCH_SNAPDRAGON || ARCH_IPQ40XX
+
+config CLK_QCOM
+ bool
+ depends on CLK && DM_RESET
+ def_bool n
+
+menu "Qualcomm clock drivers"
+
+config CLK_QCOM_APQ8016
+ bool "Qualcomm APQ8016 GCC"
+ select CLK_QCOM
+ help
+ Say Y here to enable support for the Global Clock Controller
+ on the Snapdragon APQ8016 SoC. This driver supports the clocks
+ and resets exposed by the GCC hardware block.
+
+config CLK_QCOM_APQ8096
+ bool "Qualcomm APQ8096 GCC"
+ select CLK_QCOM
+ help
+ Say Y here to enable support for the Global Clock Controller
+ on the Snapdragon APQ8096 SoC. This driver supports the clocks
+ and resets exposed by the GCC hardware block.
+
+config CLK_QCOM_IPQ4019
+ bool "Qualcomm IPQ4019 GCC"
+ select CLK_QCOM
+ help
+ Say Y here to enable support for the Global Clock Controller
+ on the Snapdragon IPQ4019 SoC. This driver supports the clocks
+ and resets exposed by the GCC hardware block.
+
+config CLK_QCOM_QCS404
+ bool "Qualcomm QCS404 GCC"
+ select CLK_QCOM
+ help
+ Say Y here to enable support for the Global Clock Controller
+ on the Snapdragon QCS404 SoC. This driver supports the clocks
+ and resets exposed by the GCC hardware block.
+
+config CLK_QCOM_SDM845
+ bool "Qualcomm SDM845 GCC"
+ select CLK_QCOM
+ help
+ Say Y here to enable support for the Global Clock Controller
+ on the Snapdragon 845 SoC. This driver supports the clocks
+ and resets exposed by the GCC hardware block.
+
+endmenu
+
+endif
diff --git a/drivers/clk/qcom/Makefile b/drivers/clk/qcom/Makefile
new file mode 100644
index 0000000..cb179fd
--- /dev/null
+++ b/drivers/clk/qcom/Makefile
@@ -0,0 +1,10 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# (C) Copyright 2023 Linaro
+
+obj-y += clock-qcom.o
+obj-$(CONFIG_CLK_QCOM_SDM845) += clock-sdm845.o
+obj-$(CONFIG_CLK_QCOM_APQ8016) += clock-apq8016.o
+obj-$(CONFIG_CLK_QCOM_APQ8096) += clock-apq8096.o
+obj-$(CONFIG_CLK_QCOM_IPQ4019) += clock-ipq4019.o
+obj-$(CONFIG_CLK_QCOM_QCS404) += clock-qcs404.o
diff --git a/arch/arm/mach-snapdragon/clock-apq8016.c b/drivers/clk/qcom/clock-apq8016.c
similarity index 60%
rename from arch/arm/mach-snapdragon/clock-apq8016.c
rename to drivers/clk/qcom/clock-apq8016.c
index 23a37a1..c0ce570 100644
--- a/arch/arm/mach-snapdragon/clock-apq8016.c
+++ b/drivers/clk/qcom/clock-apq8016.c
@@ -13,7 +13,34 @@
#include <errno.h>
#include <asm/io.h>
#include <linux/bitops.h>
-#include "clock-snapdragon.h"
+
+#include "clock-qcom.h"
+
+/* Clocks: (from CLK_CTL_BASE) */
+#define GPLL0_STATUS (0x2101C)
+#define APCS_GPLL_ENA_VOTE (0x45000)
+#define APCS_CLOCK_BRANCH_ENA_VOTE (0x45004)
+
+#define SDCC_BCR(n) ((n * 0x1000) + 0x41000)
+#define SDCC_CMD_RCGR(n) ((n * 0x1000) + 0x41004)
+#define SDCC_CFG_RCGR(n) ((n * 0x1000) + 0x41008)
+#define SDCC_M(n) ((n * 0x1000) + 0x4100C)
+#define SDCC_N(n) ((n * 0x1000) + 0x41010)
+#define SDCC_D(n) ((n * 0x1000) + 0x41014)
+#define SDCC_APPS_CBCR(n) ((n * 0x1000) + 0x41018)
+#define SDCC_AHB_CBCR(n) ((n * 0x1000) + 0x4101C)
+
+/* BLSP1 AHB clock (root clock for BLSP) */
+#define BLSP1_AHB_CBCR 0x1008
+
+/* Uart clock control registers */
+#define BLSP1_UART2_BCR (0x3028)
+#define BLSP1_UART2_APPS_CBCR (0x302C)
+#define BLSP1_UART2_APPS_CMD_RCGR (0x3034)
+#define BLSP1_UART2_APPS_CFG_RCGR (0x3038)
+#define BLSP1_UART2_APPS_M (0x303C)
+#define BLSP1_UART2_APPS_N (0x3040)
+#define BLSP1_UART2_APPS_D (0x3044)
/* GPLL0 clock control registers */
#define GPLL0_STATUS_ACTIVE BIT(17)
@@ -51,7 +78,7 @@
/* SDHCI */
static int clk_init_sdc(struct msm_clk_priv *priv, int slot, uint rate)
{
- int div = 8; /* 100MHz default */
+ int div = 15; /* 100MHz default */
if (rate == 200000000)
div = 4;
@@ -59,7 +86,7 @@
clk_enable_cbc(priv->base + SDCC_AHB_CBCR(slot));
/* 800Mhz/div, gpll0 */
clk_rcg_set_rate_mnd(priv->base, &sdc_regs[slot], div, 0, 0,
- CFG_CLK_SRC_GPLL0);
+ CFG_CLK_SRC_GPLL0, 8);
clk_enable_gpll0(priv->base, &gpll0_vote_clk);
clk_enable_cbc(priv->base + SDCC_APPS_CBCR(slot));
@@ -82,7 +109,7 @@
/* 7372800 uart block clock @ GPLL0 */
clk_rcg_set_rate_mnd(priv->base, &uart2_regs, 1, 144, 15625,
- CFG_CLK_SRC_GPLL0);
+ CFG_CLK_SRC_GPLL0, 16);
/* Vote for gpll0 clock */
clk_enable_gpll0(priv->base, &gpll0_vote_clk);
@@ -93,7 +120,7 @@
return 0;
}
-ulong msm_set_rate(struct clk *clk, ulong rate)
+static ulong apq8016_clk_set_rate(struct clk *clk, ulong rate)
{
struct msm_clk_priv *priv = dev_get_priv(clk->dev);
@@ -112,7 +139,22 @@
}
}
-int msm_enable(struct clk *clk)
-{
- return 0;
-}
+static struct msm_clk_data apq8016_clk_data = {
+ .set_rate = apq8016_clk_set_rate,
+};
+
+static const struct udevice_id gcc_apq8016_of_match[] = {
+ {
+ .compatible = "qcom,gcc-apq8016",
+ .data = (ulong)&apq8016_clk_data,
+ },
+ { }
+};
+
+U_BOOT_DRIVER(gcc_apq8016) = {
+ .name = "gcc_apq8016",
+ .id = UCLASS_NOP,
+ .of_match = gcc_apq8016_of_match,
+ .bind = qcom_cc_bind,
+ .flags = DM_FLAG_PRE_RELOC,
+};
diff --git a/arch/arm/mach-snapdragon/clock-apq8096.c b/drivers/clk/qcom/clock-apq8096.c
similarity index 61%
rename from arch/arm/mach-snapdragon/clock-apq8096.c
rename to drivers/clk/qcom/clock-apq8096.c
index 6618459..cf1a347 100644
--- a/arch/arm/mach-snapdragon/clock-apq8096.c
+++ b/drivers/clk/qcom/clock-apq8096.c
@@ -13,7 +13,30 @@
#include <errno.h>
#include <asm/io.h>
#include <linux/bitops.h>
-#include "clock-snapdragon.h"
+
+#include "clock-qcom.h"
+
+/* Clocks: (from CLK_CTL_BASE) */
+#define GPLL0_STATUS (0x0000)
+#define APCS_GPLL_ENA_VOTE (0x52000)
+#define APCS_CLOCK_BRANCH_ENA_VOTE (0x52004)
+
+#define SDCC2_BCR (0x14000) /* block reset */
+#define SDCC2_APPS_CBCR (0x14004) /* branch control */
+#define SDCC2_AHB_CBCR (0x14008)
+#define SDCC2_CMD_RCGR (0x14010)
+#define SDCC2_CFG_RCGR (0x14014)
+#define SDCC2_M (0x14018)
+#define SDCC2_N (0x1401C)
+#define SDCC2_D (0x14020)
+
+#define BLSP2_AHB_CBCR (0x25004)
+#define BLSP2_UART2_APPS_CBCR (0x29004)
+#define BLSP2_UART2_APPS_CMD_RCGR (0x2900C)
+#define BLSP2_UART2_APPS_CFG_RCGR (0x29010)
+#define BLSP2_UART2_APPS_M (0x29014)
+#define BLSP2_UART2_APPS_N (0x29018)
+#define BLSP2_UART2_APPS_D (0x2901C)
/* GPLL0 clock control registers */
#define GPLL0_STATUS_ACTIVE BIT(30)
@@ -42,11 +65,11 @@
static int clk_init_sdc(struct msm_clk_priv *priv, uint rate)
{
- int div = 3;
+ int div = 5;
clk_enable_cbc(priv->base + SDCC2_AHB_CBCR);
clk_rcg_set_rate_mnd(priv->base, &sdc_regs, div, 0, 0,
- CFG_CLK_SRC_GPLL0);
+ CFG_CLK_SRC_GPLL0, 8);
clk_enable_gpll0(priv->base, &gpll0_vote_clk);
clk_enable_cbc(priv->base + SDCC2_APPS_CBCR);
@@ -68,7 +91,7 @@
/* 7372800 uart block clock @ GPLL0 */
clk_rcg_set_rate_mnd(priv->base, &uart2_regs, 1, 192, 15625,
- CFG_CLK_SRC_GPLL0);
+ CFG_CLK_SRC_GPLL0, 16);
/* Vote for gpll0 clock */
clk_enable_gpll0(priv->base, &gpll0_vote_clk);
@@ -79,7 +102,7 @@
return 0;
}
-ulong msm_set_rate(struct clk *clk, ulong rate)
+static ulong apq8096_clk_set_rate(struct clk *clk, ulong rate)
{
struct msm_clk_priv *priv = dev_get_priv(clk->dev);
@@ -94,7 +117,22 @@
}
}
-int msm_enable(struct clk *clk)
-{
- return 0;
-}
+static struct msm_clk_data apq8096_clk_data = {
+ .set_rate = apq8096_clk_set_rate,
+};
+
+static const struct udevice_id gcc_apq8096_of_match[] = {
+ {
+ .compatible = "qcom,gcc-apq8096",
+ .data = (ulong)&apq8096_clk_data,
+ },
+ { }
+};
+
+U_BOOT_DRIVER(gcc_apq8096) = {
+ .name = "gcc_apq8096",
+ .id = UCLASS_NOP,
+ .of_match = gcc_apq8096_of_match,
+ .bind = qcom_cc_bind,
+ .flags = DM_FLAG_PRE_RELOC,
+};
diff --git a/drivers/clk/qcom/clock-ipq4019.c b/drivers/clk/qcom/clock-ipq4019.c
new file mode 100644
index 0000000..d693776
--- /dev/null
+++ b/drivers/clk/qcom/clock-ipq4019.c
@@ -0,0 +1,147 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Clock drivers for Qualcomm IPQ40xx
+ *
+ * Copyright (c) 2020 Sartura Ltd.
+ *
+ * Author: Robert Marko <robert.marko@sartura.hr>
+ *
+ */
+
+#include <clk-uclass.h>
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <dt-bindings/clock/qcom,gcc-ipq4019.h>
+
+#include "clock-qcom.h"
+
+static ulong ipq4019_clk_set_rate(struct clk *clk, ulong rate)
+{
+ switch (clk->id) {
+ case GCC_BLSP1_UART1_APPS_CLK: /*UART1*/
+ /* This clock is already initialized by SBL1 */
+ return 0;
+ default:
+ return -EINVAL;
+ }
+}
+
+static int ipq4019_clk_enable(struct clk *clk)
+{
+ switch (clk->id) {
+ case GCC_BLSP1_QUP1_SPI_APPS_CLK: /*SPI1*/
+ /* This clock is already initialized by SBL1 */
+ return 0;
+ case GCC_PRNG_AHB_CLK: /*PRNG*/
+ /* This clock is already initialized by SBL1 */
+ return 0;
+ case GCC_USB3_MASTER_CLK:
+ case GCC_USB3_SLEEP_CLK:
+ case GCC_USB3_MOCK_UTMI_CLK:
+ case GCC_USB2_MASTER_CLK:
+ case GCC_USB2_SLEEP_CLK:
+ case GCC_USB2_MOCK_UTMI_CLK:
+ /* These clocks is already initialized by SBL1 */
+ return 0;
+ default:
+ return -EINVAL;
+ }
+}
+
+static const struct qcom_reset_map gcc_ipq4019_resets[] = {
+ [WIFI0_CPU_INIT_RESET] = { 0x1f008, 5 },
+ [WIFI0_RADIO_SRIF_RESET] = { 0x1f008, 4 },
+ [WIFI0_RADIO_WARM_RESET] = { 0x1f008, 3 },
+ [WIFI0_RADIO_COLD_RESET] = { 0x1f008, 2 },
+ [WIFI0_CORE_WARM_RESET] = { 0x1f008, 1 },
+ [WIFI0_CORE_COLD_RESET] = { 0x1f008, 0 },
+ [WIFI1_CPU_INIT_RESET] = { 0x20008, 5 },
+ [WIFI1_RADIO_SRIF_RESET] = { 0x20008, 4 },
+ [WIFI1_RADIO_WARM_RESET] = { 0x20008, 3 },
+ [WIFI1_RADIO_COLD_RESET] = { 0x20008, 2 },
+ [WIFI1_CORE_WARM_RESET] = { 0x20008, 1 },
+ [WIFI1_CORE_COLD_RESET] = { 0x20008, 0 },
+ [USB3_UNIPHY_PHY_ARES] = { 0x1e038, 5 },
+ [USB3_HSPHY_POR_ARES] = { 0x1e038, 4 },
+ [USB3_HSPHY_S_ARES] = { 0x1e038, 2 },
+ [USB2_HSPHY_POR_ARES] = { 0x1e01c, 4 },
+ [USB2_HSPHY_S_ARES] = { 0x1e01c, 2 },
+ [PCIE_PHY_AHB_ARES] = { 0x1d010, 11 },
+ [PCIE_AHB_ARES] = { 0x1d010, 10 },
+ [PCIE_PWR_ARES] = { 0x1d010, 9 },
+ [PCIE_PIPE_STICKY_ARES] = { 0x1d010, 8 },
+ [PCIE_AXI_M_STICKY_ARES] = { 0x1d010, 7 },
+ [PCIE_PHY_ARES] = { 0x1d010, 6 },
+ [PCIE_PARF_XPU_ARES] = { 0x1d010, 5 },
+ [PCIE_AXI_S_XPU_ARES] = { 0x1d010, 4 },
+ [PCIE_AXI_M_VMIDMT_ARES] = { 0x1d010, 3 },
+ [PCIE_PIPE_ARES] = { 0x1d010, 2 },
+ [PCIE_AXI_S_ARES] = { 0x1d010, 1 },
+ [PCIE_AXI_M_ARES] = { 0x1d010, 0 },
+ [ESS_RESET] = { 0x12008, 0},
+ [GCC_BLSP1_BCR] = {0x01000, 0},
+ [GCC_BLSP1_QUP1_BCR] = {0x02000, 0},
+ [GCC_BLSP1_UART1_BCR] = {0x02038, 0},
+ [GCC_BLSP1_QUP2_BCR] = {0x03008, 0},
+ [GCC_BLSP1_UART2_BCR] = {0x03028, 0},
+ [GCC_BIMC_BCR] = {0x04000, 0},
+ [GCC_TLMM_BCR] = {0x05000, 0},
+ [GCC_IMEM_BCR] = {0x0E000, 0},
+ [GCC_ESS_BCR] = {0x12008, 0},
+ [GCC_PRNG_BCR] = {0x13000, 0},
+ [GCC_BOOT_ROM_BCR] = {0x13008, 0},
+ [GCC_CRYPTO_BCR] = {0x16000, 0},
+ [GCC_SDCC1_BCR] = {0x18000, 0},
+ [GCC_SEC_CTRL_BCR] = {0x1A000, 0},
+ [GCC_AUDIO_BCR] = {0x1B008, 0},
+ [GCC_QPIC_BCR] = {0x1C000, 0},
+ [GCC_PCIE_BCR] = {0x1D000, 0},
+ [GCC_USB2_BCR] = {0x1E008, 0},
+ [GCC_USB2_PHY_BCR] = {0x1E018, 0},
+ [GCC_USB3_BCR] = {0x1E024, 0},
+ [GCC_USB3_PHY_BCR] = {0x1E034, 0},
+ [GCC_SYSTEM_NOC_BCR] = {0x21000, 0},
+ [GCC_PCNOC_BCR] = {0x2102C, 0},
+ [GCC_DCD_BCR] = {0x21038, 0},
+ [GCC_SNOC_BUS_TIMEOUT0_BCR] = {0x21064, 0},
+ [GCC_SNOC_BUS_TIMEOUT1_BCR] = {0x2106C, 0},
+ [GCC_SNOC_BUS_TIMEOUT2_BCR] = {0x21074, 0},
+ [GCC_SNOC_BUS_TIMEOUT3_BCR] = {0x2107C, 0},
+ [GCC_PCNOC_BUS_TIMEOUT0_BCR] = {0x21084, 0},
+ [GCC_PCNOC_BUS_TIMEOUT1_BCR] = {0x2108C, 0},
+ [GCC_PCNOC_BUS_TIMEOUT2_BCR] = {0x21094, 0},
+ [GCC_PCNOC_BUS_TIMEOUT3_BCR] = {0x2109C, 0},
+ [GCC_PCNOC_BUS_TIMEOUT4_BCR] = {0x210A4, 0},
+ [GCC_PCNOC_BUS_TIMEOUT5_BCR] = {0x210AC, 0},
+ [GCC_PCNOC_BUS_TIMEOUT6_BCR] = {0x210B4, 0},
+ [GCC_PCNOC_BUS_TIMEOUT7_BCR] = {0x210BC, 0},
+ [GCC_PCNOC_BUS_TIMEOUT8_BCR] = {0x210C4, 0},
+ [GCC_PCNOC_BUS_TIMEOUT9_BCR] = {0x210CC, 0},
+ [GCC_TCSR_BCR] = {0x22000, 0},
+ [GCC_MPM_BCR] = {0x24000, 0},
+ [GCC_SPDM_BCR] = {0x25000, 0},
+};
+
+static struct msm_clk_data ipq4019_clk_data = {
+ .enable = ipq4019_clk_enable,
+ .set_rate = ipq4019_clk_set_rate,
+ .resets = gcc_ipq4019_resets,
+ .num_resets = ARRAY_SIZE(gcc_ipq4019_resets),
+};
+
+static const struct udevice_id gcc_ipq4019_of_match[] = {
+ {
+ .compatible = "qcom,gcc-ipq4019",
+ .data = (ulong)&ipq4019_clk_data,
+ },
+ { }
+};
+
+U_BOOT_DRIVER(gcc_ipq4019) = {
+ .name = "gcc_ipq4019",
+ .id = UCLASS_NOP,
+ .of_match = gcc_ipq4019_of_match,
+ .bind = qcom_cc_bind,
+ .flags = DM_FLAG_PRE_RELOC,
+};
diff --git a/drivers/clk/qcom/clock-qcom.c b/drivers/clk/qcom/clock-qcom.c
new file mode 100644
index 0000000..7c683e5
--- /dev/null
+++ b/drivers/clk/qcom/clock-qcom.c
@@ -0,0 +1,307 @@
+// SPDX-License-Identifier: BSD-3-Clause AND GPL-2.0
+/*
+ * Clock and reset drivers for Qualcomm platforms Global Clock
+ * Controller (GCC).
+ *
+ * (C) Copyright 2015 Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
+ * (C) Copyright 2020 Sartura Ltd. (reset driver)
+ * Author: Robert Marko <robert.marko@sartura.hr>
+ * (C) Copyright 2022 Linaro Ltd. (reset driver)
+ * Author: Sumit Garg <sumit.garg@linaro.org>
+ *
+ * Based on Little Kernel driver, simplified
+ */
+
+#include <common.h>
+#include <clk-uclass.h>
+#include <dm.h>
+#include <dm/device-internal.h>
+#include <dm/lists.h>
+#include <errno.h>
+#include <asm/io.h>
+#include <linux/bug.h>
+#include <linux/delay.h>
+#include <linux/bitops.h>
+#include <reset-uclass.h>
+
+#include "clock-qcom.h"
+
+/* CBCR register fields */
+#define CBCR_BRANCH_ENABLE_BIT BIT(0)
+#define CBCR_BRANCH_OFF_BIT BIT(31)
+
+/* Enable clock controlled by CBC soft macro */
+void clk_enable_cbc(phys_addr_t cbcr)
+{
+ setbits_le32(cbcr, CBCR_BRANCH_ENABLE_BIT);
+
+ while (readl(cbcr) & CBCR_BRANCH_OFF_BIT)
+ ;
+}
+
+void clk_enable_gpll0(phys_addr_t base, const struct pll_vote_clk *gpll0)
+{
+ if (readl(base + gpll0->status) & gpll0->status_bit)
+ return; /* clock already enabled */
+
+ setbits_le32(base + gpll0->ena_vote, gpll0->vote_bit);
+
+ while ((readl(base + gpll0->status) & gpll0->status_bit) == 0)
+ ;
+}
+
+#define BRANCH_ON_VAL (0)
+#define BRANCH_NOC_FSM_ON_VAL BIT(29)
+#define BRANCH_CHECK_MASK GENMASK(31, 28)
+
+void clk_enable_vote_clk(phys_addr_t base, const struct vote_clk *vclk)
+{
+ u32 val;
+
+ setbits_le32(base + vclk->ena_vote, vclk->vote_bit);
+ do {
+ val = readl(base + vclk->cbcr_reg);
+ val &= BRANCH_CHECK_MASK;
+ } while ((val != BRANCH_ON_VAL) && (val != BRANCH_NOC_FSM_ON_VAL));
+}
+
+#define APPS_CMD_RCGR_UPDATE BIT(0)
+
+/* Update clock command via CMD_RCGR */
+void clk_bcr_update(phys_addr_t apps_cmd_rcgr)
+{
+ u32 count;
+ setbits_le32(apps_cmd_rcgr, APPS_CMD_RCGR_UPDATE);
+
+ /* Wait for frequency to be updated. */
+ for (count = 0; count < 50000; count++) {
+ if (!(readl(apps_cmd_rcgr) & APPS_CMD_RCGR_UPDATE))
+ break;
+ udelay(1);
+ }
+ WARN(count == 50000, "WARNING: RCG @ %#llx [%#010x] stuck at off\n",
+ apps_cmd_rcgr, readl(apps_cmd_rcgr));
+}
+
+#define CFG_SRC_DIV_MASK 0b11111
+#define CFG_SRC_SEL_SHIFT 8
+#define CFG_SRC_SEL_MASK (0x7 << CFG_SRC_SEL_SHIFT)
+#define CFG_MODE_SHIFT 12
+#define CFG_MODE_MASK (0x3 << CFG_MODE_SHIFT)
+#define CFG_MODE_DUAL_EDGE (0x2 << CFG_MODE_SHIFT)
+#define CFG_HW_CLK_CTRL_MASK BIT(20)
+
+/*
+ * root set rate for clocks with half integer and MND divider
+ * div should be pre-calculated ((div * 2) - 1)
+ */
+void clk_rcg_set_rate_mnd(phys_addr_t base, const struct bcr_regs *regs,
+ int div, int m, int n, int source, u8 mnd_width)
+{
+ u32 cfg;
+ /* M value for MND divider. */
+ u32 m_val = m;
+ u32 n_minus_m = n - m;
+ /* NOT(N-M) value for MND divider. */
+ u32 n_val = ~n_minus_m * !!(n);
+ /* NOT 2D value for MND divider. */
+ u32 d_val = ~(clamp_t(u32, n, m, n_minus_m));
+ u32 mask = BIT(mnd_width) - 1;
+
+ debug("m %#x n %#x d %#x div %#x mask %#x\n", m_val, n_val, d_val, div, mask);
+
+ /* Program MND values */
+ writel(m_val & mask, base + regs->M);
+ writel(n_val & mask, base + regs->N);
+ writel(d_val & mask, base + regs->D);
+
+ /* setup src select and divider */
+ cfg = readl(base + regs->cfg_rcgr);
+ cfg &= ~(CFG_SRC_SEL_MASK | CFG_MODE_MASK | CFG_HW_CLK_CTRL_MASK);
+ cfg |= source & CFG_SRC_SEL_MASK; /* Select clock source */
+
+ if (div)
+ cfg |= div & CFG_SRC_DIV_MASK;
+
+ if (n && n != m)
+ cfg |= CFG_MODE_DUAL_EDGE;
+
+ writel(cfg, base + regs->cfg_rcgr); /* Write new clock configuration */
+
+ /* Inform h/w to start using the new config. */
+ clk_bcr_update(base + regs->cmd_rcgr);
+}
+
+/* root set rate for clocks with half integer and mnd_width=0 */
+void clk_rcg_set_rate(phys_addr_t base, const struct bcr_regs *regs, int div,
+ int source)
+{
+ u32 cfg;
+
+ /* setup src select and divider */
+ cfg = readl(base + regs->cfg_rcgr);
+ cfg &= ~(CFG_SRC_SEL_MASK | CFG_MODE_MASK | CFG_HW_CLK_CTRL_MASK);
+ cfg |= source & CFG_CLK_SRC_MASK; /* Select clock source */
+
+ /*
+ * Set the divider; HW permits fraction dividers (+0.5), but
+ * for simplicity, we will support integers only
+ */
+ if (div)
+ cfg |= (2 * div - 1) & CFG_SRC_DIV_MASK;
+
+ writel(cfg, base + regs->cfg_rcgr); /* Write new clock configuration */
+
+ /* Inform h/w to start using the new config. */
+ clk_bcr_update(base + regs->cmd_rcgr);
+}
+
+const struct freq_tbl *qcom_find_freq(const struct freq_tbl *f, uint rate)
+{
+ if (!f)
+ return NULL;
+
+ if (!f->freq)
+ return f;
+
+ for (; f->freq; f++)
+ if (rate <= f->freq)
+ return f;
+
+ /* Default to our fastest rate */
+ return f - 1;
+}
+
+static int msm_clk_probe(struct udevice *dev)
+{
+ struct msm_clk_data *data = (struct msm_clk_data *)dev_get_driver_data(dev);
+ struct msm_clk_priv *priv = dev_get_priv(dev);
+
+ priv->base = dev_read_addr(dev);
+ if (priv->base == FDT_ADDR_T_NONE)
+ return -EINVAL;
+
+ priv->data = data;
+
+ return 0;
+}
+
+static ulong msm_clk_set_rate(struct clk *clk, ulong rate)
+{
+ struct msm_clk_data *data = (struct msm_clk_data *)dev_get_driver_data(clk->dev);
+
+ if (data->set_rate)
+ return data->set_rate(clk, rate);
+
+ return 0;
+}
+
+static int msm_clk_enable(struct clk *clk)
+{
+ struct msm_clk_data *data = (struct msm_clk_data *)dev_get_driver_data(clk->dev);
+
+ if (data->enable)
+ return data->enable(clk);
+
+ return 0;
+}
+
+static struct clk_ops msm_clk_ops = {
+ .set_rate = msm_clk_set_rate,
+ .enable = msm_clk_enable,
+};
+
+U_BOOT_DRIVER(qcom_clk) = {
+ .name = "qcom_clk",
+ .id = UCLASS_CLK,
+ .ops = &msm_clk_ops,
+ .priv_auto = sizeof(struct msm_clk_priv),
+ .probe = msm_clk_probe,
+};
+
+int qcom_cc_bind(struct udevice *parent)
+{
+ struct msm_clk_data *data = (struct msm_clk_data *)dev_get_driver_data(parent);
+ struct udevice *clkdev, *rstdev;
+ struct driver *drv;
+ int ret;
+
+ /* Get a handle to the common clk handler */
+ drv = lists_driver_lookup_name("qcom_clk");
+ if (!drv)
+ return -ENOENT;
+
+ /* Register the clock controller */
+ ret = device_bind_with_driver_data(parent, drv, "qcom_clk", (ulong)data,
+ dev_ofnode(parent), &clkdev);
+ if (ret)
+ return ret;
+
+ /* Bail out early if resets are not specified for this platform */
+ if (!data->resets)
+ return ret;
+
+ /* Get a handle to the common reset handler */
+ drv = lists_driver_lookup_name("qcom_reset");
+ if (!drv)
+ return -ENOENT;
+
+ /* Register the reset controller */
+ ret = device_bind_with_driver_data(parent, drv, "qcom_reset", (ulong)data,
+ dev_ofnode(parent), &rstdev);
+ if (ret)
+ device_unbind(clkdev);
+
+ return ret;
+}
+
+static int qcom_reset_set(struct reset_ctl *rst, bool assert)
+{
+ struct msm_clk_data *data = (struct msm_clk_data *)dev_get_driver_data(rst->dev);
+ void __iomem *base = dev_get_priv(rst->dev);
+ const struct qcom_reset_map *map;
+ u32 value;
+
+ map = &data->resets[rst->id];
+
+ value = readl(base + map->reg);
+
+ if (assert)
+ value |= BIT(map->bit);
+ else
+ value &= ~BIT(map->bit);
+
+ writel(value, base + map->reg);
+
+ return 0;
+}
+
+static int qcom_reset_assert(struct reset_ctl *rst)
+{
+ return qcom_reset_set(rst, true);
+}
+
+static int qcom_reset_deassert(struct reset_ctl *rst)
+{
+ return qcom_reset_set(rst, false);
+}
+
+static const struct reset_ops qcom_reset_ops = {
+ .rst_assert = qcom_reset_assert,
+ .rst_deassert = qcom_reset_deassert,
+};
+
+static int qcom_reset_probe(struct udevice *dev)
+{
+ /* Set our priv pointer to the base address */
+ dev_set_priv(dev, (void *)dev_read_addr(dev));
+
+ return 0;
+}
+
+U_BOOT_DRIVER(qcom_reset) = {
+ .name = "qcom_reset",
+ .id = UCLASS_RESET,
+ .ops = &qcom_reset_ops,
+ .probe = qcom_reset_probe,
+};
diff --git a/drivers/clk/qcom/clock-qcom.h b/drivers/clk/qcom/clock-qcom.h
new file mode 100644
index 0000000..01088c1
--- /dev/null
+++ b/drivers/clk/qcom/clock-qcom.h
@@ -0,0 +1,100 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * (C) Copyright 2017 Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
+ */
+#ifndef _CLOCK_QCOM_H
+#define _CLOCK_QCOM_H
+
+#include <asm/io.h>
+
+#define CFG_CLK_SRC_CXO (0 << 8)
+#define CFG_CLK_SRC_GPLL0 (1 << 8)
+#define CFG_CLK_SRC_GPLL0_EVEN (6 << 8)
+#define CFG_CLK_SRC_MASK (7 << 8)
+
+struct pll_vote_clk {
+ uintptr_t status;
+ int status_bit;
+ uintptr_t ena_vote;
+ int vote_bit;
+};
+
+struct vote_clk {
+ uintptr_t cbcr_reg;
+ uintptr_t ena_vote;
+ int vote_bit;
+};
+struct bcr_regs {
+ uintptr_t cfg_rcgr;
+ uintptr_t cmd_rcgr;
+ uintptr_t M;
+ uintptr_t N;
+ uintptr_t D;
+};
+
+struct freq_tbl {
+ uint freq;
+ uint src;
+ u8 pre_div;
+ u16 m;
+ u16 n;
+};
+
+#define F(f, s, h, m, n) { (f), (s), (2 * (h) - 1), (m), (n) }
+
+struct gate_clk {
+ uintptr_t reg;
+ u32 en_val;
+ const char *name;
+};
+
+#ifdef DEBUG
+#define GATE_CLK(clk, reg, val) [clk] = { reg, val, #clk }
+#else
+#define GATE_CLK(clk, reg, val) [clk] = { reg, val, NULL }
+#endif
+
+struct qcom_reset_map {
+ unsigned int reg;
+ u8 bit;
+};
+
+struct clk;
+
+struct msm_clk_data {
+ const struct qcom_reset_map *resets;
+ unsigned long num_resets;
+ const struct gate_clk *clks;
+ unsigned long num_clks;
+
+ int (*enable)(struct clk *clk);
+ unsigned long (*set_rate)(struct clk *clk, unsigned long rate);
+};
+
+struct msm_clk_priv {
+ phys_addr_t base;
+ struct msm_clk_data *data;
+};
+
+int qcom_cc_bind(struct udevice *parent);
+void clk_enable_gpll0(phys_addr_t base, const struct pll_vote_clk *gpll0);
+void clk_bcr_update(phys_addr_t apps_cmd_rgcr);
+void clk_enable_cbc(phys_addr_t cbcr);
+void clk_enable_vote_clk(phys_addr_t base, const struct vote_clk *vclk);
+const struct freq_tbl *qcom_find_freq(const struct freq_tbl *f, uint rate);
+void clk_rcg_set_rate_mnd(phys_addr_t base, const struct bcr_regs *regs,
+ int div, int m, int n, int source, u8 mnd_width);
+void clk_rcg_set_rate(phys_addr_t base, const struct bcr_regs *regs, int div,
+ int source);
+
+static inline void qcom_gate_clk_en(const struct msm_clk_priv *priv, unsigned long id)
+{
+ u32 val;
+ if (id >= priv->data->num_clks || priv->data->clks[id].reg == 0)
+ return;
+
+ val = readl(priv->base + priv->data->clks[id].reg);
+ writel(val | priv->data->clks[id].en_val, priv->base + priv->data->clks[id].reg);
+}
+
+#endif
diff --git a/drivers/clk/qcom/clock-qcs404.c b/drivers/clk/qcom/clock-qcs404.c
new file mode 100644
index 0000000..f5b3528
--- /dev/null
+++ b/drivers/clk/qcom/clock-qcs404.c
@@ -0,0 +1,362 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Clock drivers for Qualcomm QCS404
+ *
+ * (C) Copyright 2022 Sumit Garg <sumit.garg@linaro.org>
+ */
+
+#include <common.h>
+#include <clk-uclass.h>
+#include <dm.h>
+#include <errno.h>
+#include <asm/io.h>
+#include <linux/bitops.h>
+#include <dt-bindings/clock/qcom,gcc-qcs404.h>
+
+#include "clock-qcom.h"
+
+/* Clocks: (from CLK_CTL_BASE) */
+#define GPLL0_STATUS (0x21000)
+#define GPLL1_STATUS (0x20000)
+#define APCS_GPLL_ENA_VOTE (0x45000)
+#define APCS_CLOCK_BRANCH_ENA_VOTE (0x45004)
+
+/* BLSP1 AHB clock (root clock for BLSP) */
+#define BLSP1_AHB_CBCR 0x1008
+
+/* Uart clock control registers */
+#define BLSP1_UART2_BCR (0x3028)
+#define BLSP1_UART2_APPS_CBCR (0x302C)
+#define BLSP1_UART2_APPS_CMD_RCGR (0x3034)
+#define BLSP1_UART2_APPS_CFG_RCGR (0x3038)
+#define BLSP1_UART2_APPS_M (0x303C)
+#define BLSP1_UART2_APPS_N (0x3040)
+#define BLSP1_UART2_APPS_D (0x3044)
+
+/* I2C controller clock control registerss */
+#define BLSP1_QUP0_I2C_APPS_CBCR (0x6028)
+#define BLSP1_QUP0_I2C_APPS_CMD_RCGR (0x602C)
+#define BLSP1_QUP0_I2C_APPS_CFG_RCGR (0x6030)
+#define BLSP1_QUP1_I2C_APPS_CBCR (0x2008)
+#define BLSP1_QUP1_I2C_APPS_CMD_RCGR (0x200C)
+#define BLSP1_QUP1_I2C_APPS_CFG_RCGR (0x2010)
+#define BLSP1_QUP2_I2C_APPS_CBCR (0x3010)
+#define BLSP1_QUP2_I2C_APPS_CMD_RCGR (0x3000)
+#define BLSP1_QUP2_I2C_APPS_CFG_RCGR (0x3004)
+#define BLSP1_QUP3_I2C_APPS_CBCR (0x4020)
+#define BLSP1_QUP3_I2C_APPS_CMD_RCGR (0x4000)
+#define BLSP1_QUP3_I2C_APPS_CFG_RCGR (0x4004)
+#define BLSP1_QUP4_I2C_APPS_CBCR (0x5020)
+#define BLSP1_QUP4_I2C_APPS_CMD_RCGR (0x5000)
+#define BLSP1_QUP4_I2C_APPS_CFG_RCGR (0x5004)
+
+/* SD controller clock control registers */
+#define SDCC_BCR(n) (((n) * 0x1000) + 0x41000)
+#define SDCC_CMD_RCGR(n) (((n) * 0x1000) + 0x41004)
+#define SDCC_CFG_RCGR(n) (((n) * 0x1000) + 0x41008)
+#define SDCC_M(n) (((n) * 0x1000) + 0x4100C)
+#define SDCC_N(n) (((n) * 0x1000) + 0x41010)
+#define SDCC_D(n) (((n) * 0x1000) + 0x41014)
+#define SDCC_APPS_CBCR(n) (((n) * 0x1000) + 0x41018)
+#define SDCC_AHB_CBCR(n) (((n) * 0x1000) + 0x4101C)
+
+/* USB-3.0 controller clock control registers */
+#define SYS_NOC_USB3_CBCR (0x26014)
+#define USB30_BCR (0x39000)
+#define USB3PHY_BCR (0x39008)
+#define USB30_MASTER_CBCR (0x3900C)
+#define USB30_SLEEP_CBCR (0x39010)
+#define USB30_MOCK_UTMI_CBCR (0x39014)
+#define USB30_MOCK_UTMI_CMD_RCGR (0x3901C)
+#define USB30_MOCK_UTMI_CFG_RCGR (0x39020)
+#define USB30_MASTER_CMD_RCGR (0x39028)
+#define USB30_MASTER_CFG_RCGR (0x3902C)
+#define USB30_MASTER_M (0x39030)
+#define USB30_MASTER_N (0x39034)
+#define USB30_MASTER_D (0x39038)
+#define USB2A_PHY_SLEEP_CBCR (0x4102C)
+#define USB_HS_PHY_CFG_AHB_CBCR (0x41030)
+
+/* ETH controller clock control registers */
+#define ETH_PTP_CBCR (0x4e004)
+#define ETH_RGMII_CBCR (0x4e008)
+#define ETH_SLAVE_AHB_CBCR (0x4e00c)
+#define ETH_AXI_CBCR (0x4e010)
+#define EMAC_PTP_CMD_RCGR (0x4e014)
+#define EMAC_PTP_CFG_RCGR (0x4e018)
+#define EMAC_CMD_RCGR (0x4e01c)
+#define EMAC_CFG_RCGR (0x4e020)
+#define EMAC_M (0x4e024)
+#define EMAC_N (0x4e028)
+#define EMAC_D (0x4e02c)
+
+
+/* GPLL0 clock control registers */
+#define GPLL0_STATUS_ACTIVE BIT(31)
+
+#define CFG_CLK_SRC_GPLL1 BIT(8)
+#define GPLL1_STATUS_ACTIVE BIT(31)
+
+static struct vote_clk gcc_blsp1_ahb_clk = {
+ .cbcr_reg = BLSP1_AHB_CBCR,
+ .ena_vote = APCS_CLOCK_BRANCH_ENA_VOTE,
+ .vote_bit = BIT(10) | BIT(5) | BIT(4),
+};
+
+static const struct bcr_regs uart2_regs = {
+ .cfg_rcgr = BLSP1_UART2_APPS_CFG_RCGR,
+ .cmd_rcgr = BLSP1_UART2_APPS_CMD_RCGR,
+ .M = BLSP1_UART2_APPS_M,
+ .N = BLSP1_UART2_APPS_N,
+ .D = BLSP1_UART2_APPS_D,
+};
+
+static const struct bcr_regs sdc_regs = {
+ .cfg_rcgr = SDCC_CFG_RCGR(1),
+ .cmd_rcgr = SDCC_CMD_RCGR(1),
+ .M = SDCC_M(1),
+ .N = SDCC_N(1),
+ .D = SDCC_D(1),
+};
+
+static struct pll_vote_clk gpll0_vote_clk = {
+ .status = GPLL0_STATUS,
+ .status_bit = GPLL0_STATUS_ACTIVE,
+ .ena_vote = APCS_GPLL_ENA_VOTE,
+ .vote_bit = BIT(0),
+};
+
+static struct pll_vote_clk gpll1_vote_clk = {
+ .status = GPLL1_STATUS,
+ .status_bit = GPLL1_STATUS_ACTIVE,
+ .ena_vote = APCS_GPLL_ENA_VOTE,
+ .vote_bit = BIT(1),
+};
+
+static const struct bcr_regs usb30_master_regs = {
+ .cfg_rcgr = USB30_MASTER_CFG_RCGR,
+ .cmd_rcgr = USB30_MASTER_CMD_RCGR,
+ .M = USB30_MASTER_M,
+ .N = USB30_MASTER_N,
+ .D = USB30_MASTER_D,
+};
+
+static const struct bcr_regs emac_regs = {
+ .cfg_rcgr = EMAC_CFG_RCGR,
+ .cmd_rcgr = EMAC_CMD_RCGR,
+ .M = EMAC_M,
+ .N = EMAC_N,
+ .D = EMAC_D,
+};
+
+static const struct bcr_regs emac_ptp_regs = {
+ .cfg_rcgr = EMAC_PTP_CFG_RCGR,
+ .cmd_rcgr = EMAC_PTP_CMD_RCGR,
+ .M = EMAC_M,
+ .N = EMAC_N,
+ .D = EMAC_D,
+};
+
+static const struct bcr_regs blsp1_qup0_i2c_apps_regs = {
+ .cmd_rcgr = BLSP1_QUP0_I2C_APPS_CMD_RCGR,
+ .cfg_rcgr = BLSP1_QUP0_I2C_APPS_CFG_RCGR,
+ /* mnd_width = 0 */
+};
+
+static const struct bcr_regs blsp1_qup1_i2c_apps_regs = {
+ .cmd_rcgr = BLSP1_QUP1_I2C_APPS_CMD_RCGR,
+ .cfg_rcgr = BLSP1_QUP1_I2C_APPS_CFG_RCGR,
+ /* mnd_width = 0 */
+};
+
+static const struct bcr_regs blsp1_qup2_i2c_apps_regs = {
+ .cmd_rcgr = BLSP1_QUP2_I2C_APPS_CMD_RCGR,
+ .cfg_rcgr = BLSP1_QUP2_I2C_APPS_CFG_RCGR,
+ /* mnd_width = 0 */
+};
+
+static const struct bcr_regs blsp1_qup3_i2c_apps_regs = {
+ .cmd_rcgr = BLSP1_QUP3_I2C_APPS_CMD_RCGR,
+ .cfg_rcgr = BLSP1_QUP3_I2C_APPS_CFG_RCGR,
+ /* mnd_width = 0 */
+};
+
+static const struct bcr_regs blsp1_qup4_i2c_apps_regs = {
+ .cmd_rcgr = BLSP1_QUP4_I2C_APPS_CMD_RCGR,
+ .cfg_rcgr = BLSP1_QUP4_I2C_APPS_CFG_RCGR,
+ /* mnd_width = 0 */
+};
+
+static ulong qcs404_clk_set_rate(struct clk *clk, ulong rate)
+{
+ struct msm_clk_priv *priv = dev_get_priv(clk->dev);
+
+ switch (clk->id) {
+ case GCC_BLSP1_UART2_APPS_CLK:
+ /* UART: 115200 */
+ clk_rcg_set_rate_mnd(priv->base, &uart2_regs, 0, 12, 125,
+ CFG_CLK_SRC_CXO, 16);
+ clk_enable_cbc(priv->base + BLSP1_UART2_APPS_CBCR);
+ break;
+ case GCC_BLSP1_AHB_CLK:
+ clk_enable_vote_clk(priv->base, &gcc_blsp1_ahb_clk);
+ break;
+ case GCC_SDCC1_APPS_CLK:
+ /* SDCC1: 200MHz */
+ clk_rcg_set_rate_mnd(priv->base, &sdc_regs, 7, 0, 0,
+ CFG_CLK_SRC_GPLL0, 8);
+ clk_enable_gpll0(priv->base, &gpll0_vote_clk);
+ clk_enable_cbc(priv->base + SDCC_APPS_CBCR(1));
+ break;
+ case GCC_SDCC1_AHB_CLK:
+ clk_enable_cbc(priv->base + SDCC_AHB_CBCR(1));
+ break;
+ case GCC_ETH_RGMII_CLK:
+ if (rate == 250000000)
+ clk_rcg_set_rate_mnd(priv->base, &emac_regs, 3, 0, 0,
+ CFG_CLK_SRC_GPLL1, 8);
+ else if (rate == 125000000)
+ clk_rcg_set_rate_mnd(priv->base, &emac_regs, 7, 0, 0,
+ CFG_CLK_SRC_GPLL1, 8);
+ else if (rate == 50000000)
+ clk_rcg_set_rate_mnd(priv->base, &emac_regs, 19, 0, 0,
+ CFG_CLK_SRC_GPLL1, 8);
+ else if (rate == 5000000)
+ clk_rcg_set_rate_mnd(priv->base, &emac_regs, 3, 1, 50,
+ CFG_CLK_SRC_GPLL1, 8);
+ break;
+ default:
+ return 0;
+ }
+
+ return 0;
+}
+
+static int qcs404_clk_enable(struct clk *clk)
+{
+ struct msm_clk_priv *priv = dev_get_priv(clk->dev);
+
+ switch (clk->id) {
+ case GCC_USB30_MASTER_CLK:
+ clk_enable_cbc(priv->base + USB30_MASTER_CBCR);
+ clk_rcg_set_rate_mnd(priv->base, &usb30_master_regs, 7, 0, 0,
+ CFG_CLK_SRC_GPLL0, 8);
+ break;
+ case GCC_SYS_NOC_USB3_CLK:
+ clk_enable_cbc(priv->base + SYS_NOC_USB3_CBCR);
+ break;
+ case GCC_USB30_SLEEP_CLK:
+ clk_enable_cbc(priv->base + USB30_SLEEP_CBCR);
+ break;
+ case GCC_USB30_MOCK_UTMI_CLK:
+ clk_enable_cbc(priv->base + USB30_MOCK_UTMI_CBCR);
+ break;
+ case GCC_USB_HS_PHY_CFG_AHB_CLK:
+ clk_enable_cbc(priv->base + USB_HS_PHY_CFG_AHB_CBCR);
+ break;
+ case GCC_USB2A_PHY_SLEEP_CLK:
+ clk_enable_cbc(priv->base + USB_HS_PHY_CFG_AHB_CBCR);
+ break;
+ case GCC_ETH_PTP_CLK:
+ /* SPEED_1000: freq -> 250MHz */
+ clk_enable_cbc(priv->base + ETH_PTP_CBCR);
+ clk_enable_gpll0(priv->base, &gpll1_vote_clk);
+ clk_rcg_set_rate_mnd(priv->base, &emac_ptp_regs, 3, 0, 0,
+ CFG_CLK_SRC_GPLL1, 8);
+ break;
+ case GCC_ETH_RGMII_CLK:
+ /* SPEED_1000: freq -> 250MHz */
+ clk_enable_cbc(priv->base + ETH_RGMII_CBCR);
+ clk_enable_gpll0(priv->base, &gpll1_vote_clk);
+ clk_rcg_set_rate_mnd(priv->base, &emac_regs, 3, 0, 0,
+ CFG_CLK_SRC_GPLL1, 8);
+ break;
+ case GCC_ETH_SLAVE_AHB_CLK:
+ clk_enable_cbc(priv->base + ETH_SLAVE_AHB_CBCR);
+ break;
+ case GCC_ETH_AXI_CLK:
+ clk_enable_cbc(priv->base + ETH_AXI_CBCR);
+ break;
+ case GCC_BLSP1_AHB_CLK:
+ clk_enable_vote_clk(priv->base, &gcc_blsp1_ahb_clk);
+ break;
+ case GCC_BLSP1_QUP0_I2C_APPS_CLK:
+ clk_enable_cbc(priv->base + BLSP1_QUP0_I2C_APPS_CBCR);
+ clk_rcg_set_rate(priv->base, &blsp1_qup0_i2c_apps_regs, 0,
+ CFG_CLK_SRC_CXO);
+ break;
+ case GCC_BLSP1_QUP1_I2C_APPS_CLK:
+ clk_enable_cbc(priv->base + BLSP1_QUP1_I2C_APPS_CBCR);
+ clk_rcg_set_rate(priv->base, &blsp1_qup1_i2c_apps_regs, 0,
+ CFG_CLK_SRC_CXO);
+ break;
+ case GCC_BLSP1_QUP2_I2C_APPS_CLK:
+ clk_enable_cbc(priv->base + BLSP1_QUP2_I2C_APPS_CBCR);
+ clk_rcg_set_rate(priv->base, &blsp1_qup2_i2c_apps_regs, 0,
+ CFG_CLK_SRC_CXO);
+ break;
+ case GCC_BLSP1_QUP3_I2C_APPS_CLK:
+ clk_enable_cbc(priv->base + BLSP1_QUP3_I2C_APPS_CBCR);
+ clk_rcg_set_rate(priv->base, &blsp1_qup3_i2c_apps_regs, 0,
+ CFG_CLK_SRC_CXO);
+ break;
+ case GCC_BLSP1_QUP4_I2C_APPS_CLK:
+ clk_enable_cbc(priv->base + BLSP1_QUP4_I2C_APPS_CBCR);
+ clk_rcg_set_rate(priv->base, &blsp1_qup4_i2c_apps_regs, 0,
+ CFG_CLK_SRC_CXO);
+ break;
+ default:
+ return 0;
+ }
+
+ return 0;
+}
+
+static const struct qcom_reset_map qcs404_gcc_resets[] = {
+ [GCC_GENI_IR_BCR] = { 0x0F000 },
+ [GCC_CDSP_RESTART] = { 0x18000 },
+ [GCC_USB_HS_BCR] = { 0x41000 },
+ [GCC_USB2_HS_PHY_ONLY_BCR] = { 0x41034 },
+ [GCC_QUSB2_PHY_BCR] = { 0x4103c },
+ [GCC_USB_HS_PHY_CFG_AHB_BCR] = { 0x0000c, 1 },
+ [GCC_USB2A_PHY_BCR] = { 0x0000c, 0 },
+ [GCC_USB3_PHY_BCR] = { 0x39004 },
+ [GCC_USB_30_BCR] = { 0x39000 },
+ [GCC_USB3PHY_PHY_BCR] = { 0x39008 },
+ [GCC_PCIE_0_BCR] = { 0x3e000 },
+ [GCC_PCIE_0_PHY_BCR] = { 0x3e004 },
+ [GCC_PCIE_0_LINK_DOWN_BCR] = { 0x3e038 },
+ [GCC_PCIEPHY_0_PHY_BCR] = { 0x3e03c },
+ [GCC_PCIE_0_AXI_MASTER_STICKY_ARES] = { 0x3e040, 6},
+ [GCC_PCIE_0_AHB_ARES] = { 0x3e040, 5 },
+ [GCC_PCIE_0_AXI_SLAVE_ARES] = { 0x3e040, 4 },
+ [GCC_PCIE_0_AXI_MASTER_ARES] = { 0x3e040, 3 },
+ [GCC_PCIE_0_CORE_STICKY_ARES] = { 0x3e040, 2 },
+ [GCC_PCIE_0_SLEEP_ARES] = { 0x3e040, 1 },
+ [GCC_PCIE_0_PIPE_ARES] = { 0x3e040, 0 },
+ [GCC_EMAC_BCR] = { 0x4e000 },
+ [GCC_WDSP_RESTART] = {0x19000},
+};
+
+static const struct msm_clk_data qcs404_clk_gcc_data = {
+ .resets = qcs404_gcc_resets,
+ .num_resets = ARRAY_SIZE(qcs404_gcc_resets),
+ .enable = qcs404_clk_enable,
+ .set_rate = qcs404_clk_set_rate,
+};
+
+static const struct udevice_id gcc_qcs404_of_match[] = {
+ {
+ .compatible = "qcom,gcc-qcs404",
+ .data = (ulong)&qcs404_clk_gcc_data
+ },
+ { }
+};
+
+U_BOOT_DRIVER(gcc_qcs404) = {
+ .name = "gcc_qcs404",
+ .id = UCLASS_NOP,
+ .of_match = gcc_qcs404_of_match,
+ .bind = qcom_cc_bind,
+ .flags = DM_FLAG_PRE_RELOC,
+};
diff --git a/drivers/clk/qcom/clock-sdm845.c b/drivers/clk/qcom/clock-sdm845.c
new file mode 100644
index 0000000..36ffee7
--- /dev/null
+++ b/drivers/clk/qcom/clock-sdm845.c
@@ -0,0 +1,187 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Clock drivers for Qualcomm SDM845
+ *
+ * (C) Copyright 2017 Jorge Ramirez Ortiz <jorge.ramirez-ortiz@linaro.org>
+ * (C) Copyright 2021 Dzmitry Sankouski <dsankouski@gmail.com>
+ *
+ * Based on Little Kernel driver, simplified
+ */
+
+#include <common.h>
+#include <clk-uclass.h>
+#include <dm.h>
+#include <linux/delay.h>
+#include <errno.h>
+#include <asm/io.h>
+#include <linux/bitops.h>
+#include <dt-bindings/clock/qcom,gcc-sdm845.h>
+
+#include "clock-qcom.h"
+
+#define SE9_AHB_CBCR 0x25004
+#define SE9_UART_APPS_CBCR 0x29004
+#define SE9_UART_APPS_CMD_RCGR 0x18148
+#define SE9_UART_APPS_CFG_RCGR 0x1814C
+#define SE9_UART_APPS_M 0x18150
+#define SE9_UART_APPS_N 0x18154
+#define SE9_UART_APPS_D 0x18158
+
+static const struct freq_tbl ftbl_gcc_qupv3_wrap0_s0_clk_src[] = {
+ F(7372800, CFG_CLK_SRC_GPLL0_EVEN, 1, 384, 15625),
+ F(14745600, CFG_CLK_SRC_GPLL0_EVEN, 1, 768, 15625),
+ F(19200000, CFG_CLK_SRC_CXO, 1, 0, 0),
+ F(29491200, CFG_CLK_SRC_GPLL0_EVEN, 1, 1536, 15625),
+ F(32000000, CFG_CLK_SRC_GPLL0_EVEN, 1, 8, 75),
+ F(48000000, CFG_CLK_SRC_GPLL0_EVEN, 1, 4, 25),
+ F(64000000, CFG_CLK_SRC_GPLL0_EVEN, 1, 16, 75),
+ F(80000000, CFG_CLK_SRC_GPLL0_EVEN, 1, 4, 15),
+ F(96000000, CFG_CLK_SRC_GPLL0_EVEN, 1, 8, 25),
+ F(100000000, CFG_CLK_SRC_GPLL0_EVEN, 3, 0, 0),
+ F(102400000, CFG_CLK_SRC_GPLL0_EVEN, 1, 128, 375),
+ F(112000000, CFG_CLK_SRC_GPLL0_EVEN, 1, 28, 75),
+ F(117964800, CFG_CLK_SRC_GPLL0_EVEN, 1, 6144, 15625),
+ F(120000000, CFG_CLK_SRC_GPLL0_EVEN, 2.5, 0, 0),
+ F(128000000, CFG_CLK_SRC_GPLL0, 1, 16, 75),
+ { }
+};
+
+static const struct bcr_regs uart2_regs = {
+ .cfg_rcgr = SE9_UART_APPS_CFG_RCGR,
+ .cmd_rcgr = SE9_UART_APPS_CMD_RCGR,
+ .M = SE9_UART_APPS_M,
+ .N = SE9_UART_APPS_N,
+ .D = SE9_UART_APPS_D,
+};
+
+static ulong sdm845_clk_set_rate(struct clk *clk, ulong rate)
+{
+ struct msm_clk_priv *priv = dev_get_priv(clk->dev);
+ const struct freq_tbl *freq;
+
+ switch (clk->id) {
+ case GCC_QUPV3_WRAP1_S1_CLK: /* UART9 */
+ freq = qcom_find_freq(ftbl_gcc_qupv3_wrap0_s0_clk_src, rate);
+ clk_rcg_set_rate_mnd(priv->base, &uart2_regs,
+ freq->pre_div, freq->m, freq->n, freq->src, 16);
+ return freq->freq;
+ default:
+ return 0;
+ }
+}
+
+static const struct gate_clk sdm845_clks[] = {
+ GATE_CLK(GCC_QUPV3_WRAP0_S0_CLK, 0x5200c, 0x00000400),
+ GATE_CLK(GCC_QUPV3_WRAP0_S1_CLK, 0x5200c, 0x00000800),
+ GATE_CLK(GCC_QUPV3_WRAP0_S2_CLK, 0x5200c, 0x00001000),
+ GATE_CLK(GCC_QUPV3_WRAP0_S3_CLK, 0x5200c, 0x00002000),
+ GATE_CLK(GCC_QUPV3_WRAP0_S4_CLK, 0x5200c, 0x00004000),
+ GATE_CLK(GCC_QUPV3_WRAP0_S5_CLK, 0x5200c, 0x00008000),
+ GATE_CLK(GCC_QUPV3_WRAP0_S6_CLK, 0x5200c, 0x00010000),
+ GATE_CLK(GCC_QUPV3_WRAP0_S7_CLK, 0x5200c, 0x00020000),
+ GATE_CLK(GCC_QUPV3_WRAP1_S0_CLK, 0x5200c, 0x00400000),
+ GATE_CLK(GCC_QUPV3_WRAP1_S1_CLK, 0x5200c, 0x00800000),
+ GATE_CLK(GCC_QUPV3_WRAP1_S3_CLK, 0x5200c, 0x02000000),
+ GATE_CLK(GCC_QUPV3_WRAP1_S4_CLK, 0x5200c, 0x04000000),
+ GATE_CLK(GCC_QUPV3_WRAP1_S5_CLK, 0x5200c, 0x08000000),
+ GATE_CLK(GCC_QUPV3_WRAP1_S6_CLK, 0x5200c, 0x10000000),
+ GATE_CLK(GCC_QUPV3_WRAP1_S7_CLK, 0x5200c, 0x20000000),
+ GATE_CLK(GCC_QUPV3_WRAP_0_M_AHB_CLK, 0x5200c, 0x00000040),
+ GATE_CLK(GCC_QUPV3_WRAP_0_S_AHB_CLK, 0x5200c, 0x00000080),
+ GATE_CLK(GCC_QUPV3_WRAP_1_M_AHB_CLK, 0x5200c, 0x00100000),
+ GATE_CLK(GCC_QUPV3_WRAP_1_S_AHB_CLK, 0x5200c, 0x00200000),
+ GATE_CLK(GCC_SDCC2_AHB_CLK, 0x14008, 0x00000001),
+ GATE_CLK(GCC_SDCC2_APPS_CLK, 0x14004, 0x00000001),
+ GATE_CLK(GCC_SDCC4_AHB_CLK, 0x16008, 0x00000001),
+ GATE_CLK(GCC_SDCC4_APPS_CLK, 0x16004, 0x00000001),
+ GATE_CLK(GCC_UFS_CARD_AHB_CLK, 0x75010, 0x00000001),
+ GATE_CLK(GCC_UFS_CARD_AXI_CLK, 0x7500c, 0x00000001),
+ GATE_CLK(GCC_UFS_CARD_CLKREF_CLK, 0x8c004, 0x00000001),
+ GATE_CLK(GCC_UFS_CARD_ICE_CORE_CLK, 0x75058, 0x00000001),
+ GATE_CLK(GCC_UFS_CARD_PHY_AUX_CLK, 0x7508c, 0x00000001),
+ GATE_CLK(GCC_UFS_CARD_RX_SYMBOL_0_CLK, 0x75018, 0x00000001),
+ GATE_CLK(GCC_UFS_CARD_RX_SYMBOL_1_CLK, 0x750a8, 0x00000001),
+ GATE_CLK(GCC_UFS_CARD_TX_SYMBOL_0_CLK, 0x75014, 0x00000001),
+ GATE_CLK(GCC_UFS_CARD_UNIPRO_CORE_CLK, 0x75054, 0x00000001),
+ GATE_CLK(GCC_UFS_MEM_CLKREF_CLK, 0x8c000, 0x00000001),
+ GATE_CLK(GCC_UFS_PHY_AHB_CLK, 0x77010, 0x00000001),
+ GATE_CLK(GCC_UFS_PHY_AXI_CLK, 0x7700c, 0x00000001),
+ GATE_CLK(GCC_UFS_PHY_ICE_CORE_CLK, 0x77058, 0x00000001),
+ GATE_CLK(GCC_UFS_PHY_PHY_AUX_CLK, 0x7708c, 0x00000001),
+ GATE_CLK(GCC_UFS_PHY_RX_SYMBOL_0_CLK, 0x77018, 0x00000001),
+ GATE_CLK(GCC_UFS_PHY_RX_SYMBOL_1_CLK, 0x770a8, 0x00000001),
+ GATE_CLK(GCC_UFS_PHY_TX_SYMBOL_0_CLK, 0x77014, 0x00000001),
+ GATE_CLK(GCC_UFS_PHY_UNIPRO_CORE_CLK, 0x77054, 0x00000001),
+ GATE_CLK(GCC_USB30_PRIM_MASTER_CLK, 0x0f00c, 0x00000001),
+ GATE_CLK(GCC_USB30_PRIM_MOCK_UTMI_CLK, 0x0f014, 0x00000001),
+ GATE_CLK(GCC_USB30_PRIM_SLEEP_CLK, 0x0f010, 0x00000001),
+ GATE_CLK(GCC_USB30_SEC_MASTER_CLK, 0x1000c, 0x00000001),
+ GATE_CLK(GCC_USB30_SEC_MOCK_UTMI_CLK, 0x10014, 0x00000001),
+ GATE_CLK(GCC_USB30_SEC_SLEEP_CLK, 0x10010, 0x00000001),
+ GATE_CLK(GCC_USB3_PRIM_CLKREF_CLK, 0x8c008, 0x00000001),
+ GATE_CLK(GCC_USB3_PRIM_PHY_AUX_CLK, 0x0f04c, 0x00000001),
+ GATE_CLK(GCC_USB3_PRIM_PHY_COM_AUX_CLK, 0x0f050, 0x00000001),
+ GATE_CLK(GCC_USB3_PRIM_PHY_PIPE_CLK, 0x0f054, 0x00000001),
+ GATE_CLK(GCC_USB3_SEC_CLKREF_CLK, 0x8c028, 0x00000001),
+ GATE_CLK(GCC_USB3_SEC_PHY_AUX_CLK, 0x1004c, 0x00000001),
+ GATE_CLK(GCC_USB3_SEC_PHY_PIPE_CLK, 0x10054, 0x00000001),
+ GATE_CLK(GCC_USB3_SEC_PHY_COM_AUX_CLK, 0x10050, 0x00000001),
+ GATE_CLK(GCC_USB_PHY_CFG_AHB2PHY_CLK, 0x6a004, 0x00000001),
+};
+
+static int sdm845_clk_enable(struct clk *clk)
+{
+ struct msm_clk_priv *priv = dev_get_priv(clk->dev);
+
+ debug("%s: clk %s\n", __func__, sdm845_clks[clk->id].name);
+
+ qcom_gate_clk_en(priv, clk->id);
+
+ return 0;
+}
+
+static const struct qcom_reset_map sdm845_gcc_resets[] = {
+ [GCC_QUPV3_WRAPPER_0_BCR] = { 0x17000 },
+ [GCC_QUPV3_WRAPPER_1_BCR] = { 0x18000 },
+ [GCC_QUSB2PHY_PRIM_BCR] = { 0x12000 },
+ [GCC_QUSB2PHY_SEC_BCR] = { 0x12004 },
+ [GCC_SDCC2_BCR] = { 0x14000 },
+ [GCC_SDCC4_BCR] = { 0x16000 },
+ [GCC_UFS_CARD_BCR] = { 0x75000 },
+ [GCC_UFS_PHY_BCR] = { 0x77000 },
+ [GCC_USB30_PRIM_BCR] = { 0xf000 },
+ [GCC_USB30_SEC_BCR] = { 0x10000 },
+ [GCC_USB3_PHY_PRIM_BCR] = { 0x50000 },
+ [GCC_USB3PHY_PHY_PRIM_BCR] = { 0x50004 },
+ [GCC_USB3_DP_PHY_PRIM_BCR] = { 0x50008 },
+ [GCC_USB3_PHY_SEC_BCR] = { 0x5000c },
+ [GCC_USB3PHY_PHY_SEC_BCR] = { 0x50010 },
+ [GCC_USB3_DP_PHY_SEC_BCR] = { 0x50014 },
+ [GCC_USB_PHY_CFG_AHB2PHY_BCR] = { 0x6a000 },
+};
+
+static struct msm_clk_data sdm845_clk_data = {
+ .resets = sdm845_gcc_resets,
+ .num_resets = ARRAY_SIZE(sdm845_gcc_resets),
+ .clks = sdm845_clks,
+ .num_clks = ARRAY_SIZE(sdm845_clks),
+
+ .enable = sdm845_clk_enable,
+ .set_rate = sdm845_clk_set_rate,
+};
+
+static const struct udevice_id gcc_sdm845_of_match[] = {
+ {
+ .compatible = "qcom,gcc-sdm845",
+ .data = (ulong)&sdm845_clk_data,
+ },
+ { }
+};
+
+U_BOOT_DRIVER(gcc_sdm845) = {
+ .name = "gcc_sdm845",
+ .id = UCLASS_NOP,
+ .of_match = gcc_sdm845_of_match,
+ .bind = qcom_cc_bind,
+ .flags = DM_FLAG_PRE_RELOC,
+};
diff --git a/drivers/clk/renesas/clk-rcar-gen2.c b/drivers/clk/renesas/clk-rcar-gen2.c
index 850d641..66ffef9 100644
--- a/drivers/clk/renesas/clk-rcar-gen2.c
+++ b/drivers/clk/renesas/clk-rcar-gen2.c
@@ -10,7 +10,6 @@
* Copyright (C) 2016 Glider bvba
*/
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <errno.h>
diff --git a/drivers/clk/renesas/clk-rcar-gen3.c b/drivers/clk/renesas/clk-rcar-gen3.c
index 0d274bb..196903e 100644
--- a/drivers/clk/renesas/clk-rcar-gen3.c
+++ b/drivers/clk/renesas/clk-rcar-gen3.c
@@ -10,7 +10,6 @@
* Copyright (C) 2016 Glider bvba
*/
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <dm/device-internal.h>
diff --git a/drivers/clk/renesas/r8a774a1-cpg-mssr.c b/drivers/clk/renesas/r8a774a1-cpg-mssr.c
index 6280061..d23041a 100644
--- a/drivers/clk/renesas/r8a774a1-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a774a1-cpg-mssr.c
@@ -9,7 +9,6 @@
* Copyright (C) 2016 Glider bvba
*/
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
@@ -75,6 +74,7 @@
/* Core Clock Outputs */
DEF_GEN3_Z("z", R8A774A1_CLK_Z, CLK_TYPE_GEN3_Z, CLK_PLL0, 2, 8),
DEF_GEN3_Z("z2", R8A774A1_CLK_Z2, CLK_TYPE_GEN3_Z, CLK_PLL2, 2, 0),
+ DEF_GEN3_Z("zg", R8A774A1_CLK_ZG, CLK_TYPE_GEN3_ZG, CLK_PLL4, 4, 24),
DEF_FIXED("ztr", R8A774A1_CLK_ZTR, CLK_PLL1_DIV2, 6, 1),
DEF_FIXED("ztrd2", R8A774A1_CLK_ZTRD2, CLK_PLL1_DIV2, 12, 1),
DEF_FIXED("zt", R8A774A1_CLK_ZT, CLK_PLL1_DIV2, 4, 1),
@@ -122,6 +122,7 @@
};
static const struct mssr_mod_clk r8a774a1_mod_clks[] __initconst = {
+ DEF_MOD("3dge", 112, R8A774A1_CLK_ZG),
DEF_MOD("tmu4", 121, R8A774A1_CLK_S0D6),
DEF_MOD("tmu3", 122, R8A774A1_CLK_S3D2),
DEF_MOD("tmu2", 123, R8A774A1_CLK_S3D2),
@@ -212,6 +213,7 @@
DEF_MOD("rpc-if", 917, R8A774A1_CLK_RPCD2),
DEF_MOD("i2c6", 918, R8A774A1_CLK_S0D6),
DEF_MOD("i2c5", 919, R8A774A1_CLK_S0D6),
+ DEF_MOD("adg", 922, R8A774A1_CLK_S0D4),
DEF_MOD("iic-pmic", 926, R8A774A1_CLK_CP),
DEF_MOD("i2c4", 927, R8A774A1_CLK_S0D6),
DEF_MOD("i2c3", 928, R8A774A1_CLK_S0D6),
diff --git a/drivers/clk/renesas/r8a774b1-cpg-mssr.c b/drivers/clk/renesas/r8a774b1-cpg-mssr.c
index 60f4f1d..81d7dfe 100644
--- a/drivers/clk/renesas/r8a774b1-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a774b1-cpg-mssr.c
@@ -9,7 +9,6 @@
* Copyright (C) 2016 Glider bvba
*/
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
@@ -72,6 +71,7 @@
/* Core Clock Outputs */
DEF_GEN3_Z("z", R8A774B1_CLK_Z, CLK_TYPE_GEN3_Z, CLK_PLL0, 2, 8),
+ DEF_GEN3_Z("zg", R8A774B1_CLK_ZG, CLK_TYPE_GEN3_ZG, CLK_PLL4, 4, 24),
DEF_FIXED("ztr", R8A774B1_CLK_ZTR, CLK_PLL1_DIV2, 6, 1),
DEF_FIXED("ztrd2", R8A774B1_CLK_ZTRD2, CLK_PLL1_DIV2, 12, 1),
DEF_FIXED("zt", R8A774B1_CLK_ZT, CLK_PLL1_DIV2, 4, 1),
@@ -119,6 +119,7 @@
};
static const struct mssr_mod_clk r8a774b1_mod_clks[] __initconst = {
+ DEF_MOD("3dge", 112, R8A774B1_CLK_ZG),
DEF_MOD("tmu4", 121, R8A774B1_CLK_S0D6),
DEF_MOD("tmu3", 122, R8A774B1_CLK_S3D2),
DEF_MOD("tmu2", 123, R8A774B1_CLK_S3D2),
@@ -208,6 +209,7 @@
DEF_MOD("rpc-if", 917, R8A774B1_CLK_RPCD2),
DEF_MOD("i2c6", 918, R8A774B1_CLK_S0D6),
DEF_MOD("i2c5", 919, R8A774B1_CLK_S0D6),
+ DEF_MOD("adg", 922, R8A774B1_CLK_S0D4),
DEF_MOD("iic-pmic", 926, R8A774B1_CLK_CP),
DEF_MOD("i2c4", 927, R8A774B1_CLK_S0D6),
DEF_MOD("i2c3", 928, R8A774B1_CLK_S0D6),
diff --git a/drivers/clk/renesas/r8a774c0-cpg-mssr.c b/drivers/clk/renesas/r8a774c0-cpg-mssr.c
index 4768ceb..f92fd25 100644
--- a/drivers/clk/renesas/r8a774c0-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a774c0-cpg-mssr.c
@@ -10,7 +10,6 @@
* Copyright (C) 2015 Renesas Electronics Corp.
*/
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <linux/bitops.h>
@@ -211,6 +210,7 @@
DEF_MOD("rpc-if", 917, R8A774C0_CLK_RPCD2),
DEF_MOD("i2c6", 918, R8A774C0_CLK_S3D2),
DEF_MOD("i2c5", 919, R8A774C0_CLK_S3D2),
+ DEF_MOD("adg", 922, R8A774C0_CLK_ZA2),
DEF_MOD("iic-pmic", 926, R8A774C0_CLK_CP),
DEF_MOD("i2c4", 927, R8A774C0_CLK_S3D2),
DEF_MOD("i2c3", 928, R8A774C0_CLK_S3D2),
diff --git a/drivers/clk/renesas/r8a774e1-cpg-mssr.c b/drivers/clk/renesas/r8a774e1-cpg-mssr.c
index 28d8a88..7c7cb7b 100644
--- a/drivers/clk/renesas/r8a774e1-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a774e1-cpg-mssr.c
@@ -9,7 +9,6 @@
* Copyright (C) 2015 Glider bvba
*/
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <linux/bitops.h>
@@ -76,6 +75,7 @@
/* Core Clock Outputs */
DEF_GEN3_Z("z", R8A774E1_CLK_Z, CLK_TYPE_GEN3_Z, CLK_PLL0, 2, 8),
DEF_GEN3_Z("z2", R8A774E1_CLK_Z2, CLK_TYPE_GEN3_Z, CLK_PLL2, 2, 0),
+ DEF_GEN3_Z("zg", R8A774E1_CLK_ZG, CLK_TYPE_GEN3_ZG, CLK_PLL4, 4, 24),
DEF_FIXED("ztr", R8A774E1_CLK_ZTR, CLK_PLL1_DIV2, 6, 1),
DEF_FIXED("ztrd2", R8A774E1_CLK_ZTRD2, CLK_PLL1_DIV2, 12, 1),
DEF_FIXED("zt", R8A774E1_CLK_ZT, CLK_PLL1_DIV2, 4, 1),
@@ -124,6 +124,7 @@
};
static const struct mssr_mod_clk r8a774e1_mod_clks[] __initconst = {
+ DEF_MOD("3dge", 112, R8A774E1_CLK_ZG),
DEF_MOD("fdp1-1", 118, R8A774E1_CLK_S0D1),
DEF_MOD("fdp1-0", 119, R8A774E1_CLK_S0D1),
DEF_MOD("tmu4", 121, R8A774E1_CLK_S0D6),
@@ -221,7 +222,7 @@
DEF_MOD("rpc-if", 917, R8A774E1_CLK_RPCD2),
DEF_MOD("i2c6", 918, R8A774E1_CLK_S0D6),
DEF_MOD("i2c5", 919, R8A774E1_CLK_S0D6),
- DEF_MOD("adg", 922, R8A774E1_CLK_S0D1),
+ DEF_MOD("adg", 922, R8A774E1_CLK_S0D4),
DEF_MOD("iic-pmic", 926, R8A774E1_CLK_CP),
DEF_MOD("i2c4", 927, R8A774E1_CLK_S0D6),
DEF_MOD("i2c3", 928, R8A774E1_CLK_S0D6),
diff --git a/drivers/clk/renesas/r8a7790-cpg-mssr.c b/drivers/clk/renesas/r8a7790-cpg-mssr.c
index 686f2af..190b68e 100644
--- a/drivers/clk/renesas/r8a7790-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a7790-cpg-mssr.c
@@ -9,7 +9,6 @@
* Copyright (C) 2013 Ideas On Board SPRL
*/
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <linux/bitops.h>
diff --git a/drivers/clk/renesas/r8a7791-cpg-mssr.c b/drivers/clk/renesas/r8a7791-cpg-mssr.c
index dcb0fd8..30711bf 100644
--- a/drivers/clk/renesas/r8a7791-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a7791-cpg-mssr.c
@@ -9,7 +9,6 @@
* Copyright (C) 2013 Ideas On Board SPRL
*/
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <linux/bitops.h>
diff --git a/drivers/clk/renesas/r8a7792-cpg-mssr.c b/drivers/clk/renesas/r8a7792-cpg-mssr.c
index 496e51a..623981e 100644
--- a/drivers/clk/renesas/r8a7792-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a7792-cpg-mssr.c
@@ -9,7 +9,6 @@
* Copyright (C) 2013 Ideas On Board SPRL
*/
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <linux/bitops.h>
diff --git a/drivers/clk/renesas/r8a7794-cpg-mssr.c b/drivers/clk/renesas/r8a7794-cpg-mssr.c
index f1828a6..c412491 100644
--- a/drivers/clk/renesas/r8a7794-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a7794-cpg-mssr.c
@@ -9,7 +9,6 @@
* Copyright (C) 2013 Ideas On Board SPRL
*/
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <linux/bitops.h>
diff --git a/drivers/clk/renesas/r8a7795-cpg-mssr.c b/drivers/clk/renesas/r8a7795-cpg-mssr.c
index 0e9b9cc..e511f74 100644
--- a/drivers/clk/renesas/r8a7795-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a7795-cpg-mssr.c
@@ -10,7 +10,6 @@
* Copyright (C) 2015 Renesas Electronics Corp.
*/
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <linux/bitops.h>
diff --git a/drivers/clk/renesas/r8a7796-cpg-mssr.c b/drivers/clk/renesas/r8a7796-cpg-mssr.c
index ea1f6d6..02b078a 100644
--- a/drivers/clk/renesas/r8a7796-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c
@@ -12,7 +12,6 @@
* Copyright (C) 2015 Renesas Electronics Corp.
*/
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <linux/bitops.h>
@@ -80,6 +79,7 @@
/* Core Clock Outputs */
DEF_GEN3_Z("z", R8A7796_CLK_Z, CLK_TYPE_GEN3_Z, CLK_PLL0, 2, 8),
DEF_GEN3_Z("z2", R8A7796_CLK_Z2, CLK_TYPE_GEN3_Z, CLK_PLL2, 2, 0),
+ DEF_GEN3_Z("zg", R8A7796_CLK_ZG, CLK_TYPE_GEN3_ZG, CLK_PLL4, 4, 24),
DEF_FIXED("ztr", R8A7796_CLK_ZTR, CLK_PLL1_DIV2, 6, 1),
DEF_FIXED("ztrd2", R8A7796_CLK_ZTRD2, CLK_PLL1_DIV2, 12, 1),
DEF_FIXED("zt", R8A7796_CLK_ZT, CLK_PLL1_DIV2, 4, 1),
@@ -129,6 +129,7 @@
};
static struct mssr_mod_clk r8a7796_mod_clks[] __initdata = {
+ DEF_MOD("3dge", 112, R8A7796_CLK_ZG),
DEF_MOD("fdp1-0", 119, R8A7796_CLK_S0D1),
DEF_MOD("tmu4", 121, R8A7796_CLK_S0D6),
DEF_MOD("tmu3", 122, R8A7796_CLK_S3D2),
@@ -235,6 +236,7 @@
DEF_MOD("rpc-if", 917, R8A7796_CLK_RPCD2),
DEF_MOD("i2c6", 918, R8A7796_CLK_S0D6),
DEF_MOD("i2c5", 919, R8A7796_CLK_S0D6),
+ DEF_MOD("adg", 922, R8A7796_CLK_S0D4),
DEF_MOD("i2c-dvfs", 926, R8A7796_CLK_CP),
DEF_MOD("i2c4", 927, R8A7796_CLK_S0D6),
DEF_MOD("i2c3", 928, R8A7796_CLK_S0D6),
diff --git a/drivers/clk/renesas/r8a77965-cpg-mssr.c b/drivers/clk/renesas/r8a77965-cpg-mssr.c
index 8a5c152..037861e 100644
--- a/drivers/clk/renesas/r8a77965-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a77965-cpg-mssr.c
@@ -11,7 +11,6 @@
* Copyright (C) 2015 Renesas Electronics Corp.
*/
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <linux/bitops.h>
@@ -76,6 +75,7 @@
/* Core Clock Outputs */
DEF_GEN3_Z("z", R8A77965_CLK_Z, CLK_TYPE_GEN3_Z, CLK_PLL0, 2, 8),
+ DEF_GEN3_Z("zg", R8A77965_CLK_ZG, CLK_TYPE_GEN3_ZG, CLK_PLL4, 4, 24),
DEF_FIXED("ztr", R8A77965_CLK_ZTR, CLK_PLL1_DIV2, 6, 1),
DEF_FIXED("ztrd2", R8A77965_CLK_ZTRD2, CLK_PLL1_DIV2, 12, 1),
DEF_FIXED("zt", R8A77965_CLK_ZT, CLK_PLL1_DIV2, 4, 1),
@@ -125,6 +125,7 @@
};
static const struct mssr_mod_clk r8a77965_mod_clks[] __initconst = {
+ DEF_MOD("3dge", 112, R8A77965_CLK_ZG),
DEF_MOD("fdp1-0", 119, R8A77965_CLK_S0D1),
DEF_MOD("tmu4", 121, R8A77965_CLK_S0D6),
DEF_MOD("tmu3", 122, R8A77965_CLK_S3D2),
@@ -236,6 +237,7 @@
DEF_MOD("rpc-if", 917, R8A77965_CLK_RPCD2),
DEF_MOD("i2c6", 918, R8A77965_CLK_S0D6),
DEF_MOD("i2c5", 919, R8A77965_CLK_S0D6),
+ DEF_MOD("adg", 922, R8A77965_CLK_S0D4),
DEF_MOD("i2c-dvfs", 926, R8A77965_CLK_CP),
DEF_MOD("i2c4", 927, R8A77965_CLK_S0D6),
DEF_MOD("i2c3", 928, R8A77965_CLK_S0D6),
diff --git a/drivers/clk/renesas/r8a77970-cpg-mssr.c b/drivers/clk/renesas/r8a77970-cpg-mssr.c
index 32923b4..d8bb5aa 100644
--- a/drivers/clk/renesas/r8a77970-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a77970-cpg-mssr.c
@@ -9,7 +9,6 @@
* Copyright (C) 2015 Glider bvba
*/
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <linux/bitops.h>
diff --git a/drivers/clk/renesas/r8a77980-cpg-mssr.c b/drivers/clk/renesas/r8a77980-cpg-mssr.c
index f35032b..9d8335a 100644
--- a/drivers/clk/renesas/r8a77980-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a77980-cpg-mssr.c
@@ -10,7 +10,6 @@
* Copyright (C) 2015 Glider bvba
*/
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <linux/bitops.h>
diff --git a/drivers/clk/renesas/r8a77990-cpg-mssr.c b/drivers/clk/renesas/r8a77990-cpg-mssr.c
index e5710b0..4c9acd7 100644
--- a/drivers/clk/renesas/r8a77990-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a77990-cpg-mssr.c
@@ -10,7 +10,6 @@
* Copyright (C) 2015 Renesas Electronics Corp.
*/
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <linux/bitops.h>
@@ -224,6 +223,7 @@
DEF_MOD("rpc-if", 917, R8A77990_CLK_RPCD2),
DEF_MOD("i2c6", 918, R8A77990_CLK_S3D2),
DEF_MOD("i2c5", 919, R8A77990_CLK_S3D2),
+ DEF_MOD("adg", 922, R8A77990_CLK_ZA2),
DEF_MOD("i2c-dvfs", 926, R8A77990_CLK_CP),
DEF_MOD("i2c4", 927, R8A77990_CLK_S3D2),
DEF_MOD("i2c3", 928, R8A77990_CLK_S3D2),
diff --git a/drivers/clk/renesas/r8a77995-cpg-mssr.c b/drivers/clk/renesas/r8a77995-cpg-mssr.c
index 0ef1c1d..f49faa4 100644
--- a/drivers/clk/renesas/r8a77995-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a77995-cpg-mssr.c
@@ -10,7 +10,6 @@
* Copyright (C) 2015 Renesas Electronics Corp.
*/
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <linux/bitops.h>
@@ -181,6 +180,7 @@
DEF_MOD("can-if1", 915, R8A77995_CLK_S3D4),
DEF_MOD("can-if0", 916, R8A77995_CLK_S3D4),
DEF_MOD("rpc-if", 917, R8A77995_CLK_RPCD2),
+ DEF_MOD("adg", 922, R8A77995_CLK_ZA2),
DEF_MOD("i2c3", 928, R8A77995_CLK_S3D2),
DEF_MOD("i2c2", 929, R8A77995_CLK_S3D2),
DEF_MOD("i2c1", 930, R8A77995_CLK_S3D2),
diff --git a/drivers/clk/renesas/r8a779a0-cpg-mssr.c b/drivers/clk/renesas/r8a779a0-cpg-mssr.c
index 652bfe4..ba086be 100644
--- a/drivers/clk/renesas/r8a779a0-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a779a0-cpg-mssr.c
@@ -10,7 +10,6 @@
* Copyright (C) 2015 Renesas Electronics Corp.
*/
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
diff --git a/drivers/clk/renesas/r8a779f0-cpg-mssr.c b/drivers/clk/renesas/r8a779f0-cpg-mssr.c
index 643e8b8..108655f 100644
--- a/drivers/clk/renesas/r8a779f0-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a779f0-cpg-mssr.c
@@ -7,7 +7,6 @@
* Based on r8a779a0-cpg-mssr.c
*/
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
diff --git a/drivers/clk/renesas/r8a779g0-cpg-mssr.c b/drivers/clk/renesas/r8a779g0-cpg-mssr.c
index 219024a..781806e 100644
--- a/drivers/clk/renesas/r8a779g0-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a779g0-cpg-mssr.c
@@ -7,7 +7,6 @@
* Based on r8a779f0-cpg-mssr.c
*/
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
diff --git a/drivers/clk/renesas/r9a06g032-clocks.c b/drivers/clk/renesas/r9a06g032-clocks.c
index d2f6123..d207bf6 100644
--- a/drivers/clk/renesas/r9a06g032-clocks.c
+++ b/drivers/clk/renesas/r9a06g032-clocks.c
@@ -7,7 +7,6 @@
* Michel Pollet <michel.pollet@bp.renesas.com>, <buserror@gmail.com>
*/
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <dm/device_compat.h>
diff --git a/drivers/clk/renesas/rcar-cpg-lib.c b/drivers/clk/renesas/rcar-cpg-lib.c
index a2fca66..8862fbc 100644
--- a/drivers/clk/renesas/rcar-cpg-lib.c
+++ b/drivers/clk/renesas/rcar-cpg-lib.c
@@ -10,7 +10,6 @@
* Copyright (C) 2016 Glider bvba
*/
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <errno.h>
diff --git a/drivers/clk/renesas/rcar-gen3-cpg.h b/drivers/clk/renesas/rcar-gen3-cpg.h
index 06318c8..370f26c 100644
--- a/drivers/clk/renesas/rcar-gen3-cpg.h
+++ b/drivers/clk/renesas/rcar-gen3-cpg.h
@@ -24,6 +24,7 @@
CLK_TYPE_GEN3_R,
CLK_TYPE_GEN3_MDSEL, /* Select parent/divider using mode pin */
CLK_TYPE_GEN3_Z,
+ CLK_TYPE_GEN3_ZG,
CLK_TYPE_GEN3_OSC, /* OSC EXTAL predivider and fixed divider */
CLK_TYPE_GEN3_RCKSEL, /* Select parent/divider using RCKCR.CKSEL */
CLK_TYPE_GEN3_RPCSRC,
diff --git a/drivers/clk/renesas/renesas-cpg-mssr.c b/drivers/clk/renesas/renesas-cpg-mssr.c
index 10bd54d..35bad7f 100644
--- a/drivers/clk/renesas/renesas-cpg-mssr.c
+++ b/drivers/clk/renesas/renesas-cpg-mssr.c
@@ -9,7 +9,6 @@
*
* Copyright (C) 2016 Glider bvba
*/
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <errno.h>
diff --git a/drivers/clk/starfive/clk-jh7110.c b/drivers/clk/starfive/clk-jh7110.c
index a835541..a386948 100644
--- a/drivers/clk/starfive/clk-jh7110.c
+++ b/drivers/clk/starfive/clk-jh7110.c
@@ -434,6 +434,15 @@
starfive_clk_gate(priv->reg,
"i2c5_apb", "apb0",
OFFSET(JH7110_SYSCLK_I2C5_APB)));
+ /* Watchdog clocks */
+ clk_dm(JH7110_SYS_ID_TRANS(JH7110_SYSCLK_WDT_APB),
+ starfive_clk_gate(priv->reg,
+ "wdt_apb", "apb0",
+ OFFSET(JH7110_SYSCLK_WDT_APB)));
+ clk_dm(JH7110_SYS_ID_TRANS(JH7110_SYSCLK_WDT_CORE),
+ starfive_clk_gate(priv->reg,
+ "wdt_core", "oscillator",
+ OFFSET(JH7110_SYSCLK_WDT_CORE)));
/* enable noc_bus_stg_axi clock */
if (!clk_get_by_id(JH7110_SYSCLK_NOC_BUS_STG_AXI, &pclk))
diff --git a/drivers/clk/stm32/Kconfig b/drivers/clk/stm32/Kconfig
index 7a34ea2..c05015e 100644
--- a/drivers/clk/stm32/Kconfig
+++ b/drivers/clk/stm32/Kconfig
@@ -23,7 +23,7 @@
config CLK_STM32MP1
bool "Enable RCC clock driver for STM32MP15"
depends on ARCH_STM32MP && CLK
- default y if STM32MP15x
+ default y if STM32MP15X
help
Enable the STM32 clock (RCC) driver. Enable support for
manipulating STM32MP15's on-SoC clocks.
@@ -31,7 +31,7 @@
config CLK_STM32MP13
bool "Enable RCC clock driver for STM32MP13"
depends on ARCH_STM32MP && CLK
- default y if STM32MP13x
+ default y if STM32MP13X
select CLK_STM32_CORE
help
Enable the STM32 clock (RCC) driver. Enable support for
diff --git a/drivers/clk/stm32/clk-stm32f.c b/drivers/clk/stm32/clk-stm32f.c
index ed76601..d68c75e 100644
--- a/drivers/clk/stm32/clk-stm32f.c
+++ b/drivers/clk/stm32/clk-stm32f.c
@@ -522,17 +522,20 @@
/* get the current PLLSAIR output freq */
pllsair_rate = stm32_clk_get_pllsai_rate(priv, PLLSAIR);
- best_div = pllsair_rate / rate;
+ if ((pllsair_rate % rate) == 0) {
+ best_div = pllsair_rate / rate;
- /* look into pllsaidivr_table if this divider is available*/
- for (i = 0 ; i < sizeof(pllsaidivr_table); i++)
- if (best_div == pllsaidivr_table[i]) {
- /* set pll_saidivr with found value */
- clrsetbits_le32(®s->dckcfgr,
- RCC_DCKCFGR_PLLSAIDIVR_MASK,
- pllsaidivr_table[i]);
- return rate;
- }
+ /* look into pllsaidivr_table if this divider is available */
+ for (i = 0 ; i < sizeof(pllsaidivr_table); i++)
+ if (best_div == pllsaidivr_table[i]) {
+ /* set pll_saidivr with found value */
+ clrsetbits_le32(®s->dckcfgr,
+ RCC_DCKCFGR_PLLSAIDIVR_MASK,
+ pllsaidivr_table[i] <<
+ RCC_DCKCFGR_PLLSAIDIVR_SHIFT);
+ return rate;
+ }
+ }
/*
* As no pllsaidivr value is suitable to obtain requested freq,
diff --git a/drivers/clk/stm32/clk-stm32mp1.c b/drivers/clk/stm32/clk-stm32mp1.c
index f3ac8c7..6f000c8 100644
--- a/drivers/clk/stm32/clk-stm32mp1.c
+++ b/drivers/clk/stm32/clk-stm32mp1.c
@@ -2225,10 +2225,13 @@
}
}
-static void __maybe_unused stm32mp1_clk_dump(struct stm32mp1_clk_priv *priv)
+static void __maybe_unused stm32mp1_clk_dump(struct udevice *dev)
{
char buf[32];
int i, s, p;
+ struct stm32mp1_clk_priv *priv;
+
+ priv = dev_get_priv(dev);
printf("Clocks:\n");
for (i = 0; i < _PARENT_NB; i++) {
@@ -2252,27 +2255,6 @@
}
}
-#ifdef CONFIG_CMD_CLK
-int soc_clk_dump(void)
-{
- struct udevice *dev;
- struct stm32mp1_clk_priv *priv;
- int ret;
-
- ret = uclass_get_device_by_driver(UCLASS_CLK,
- DM_DRIVER_GET(stm32mp1_clock),
- &dev);
- if (ret)
- return ret;
-
- priv = dev_get_priv(dev);
-
- stm32mp1_clk_dump(priv);
-
- return 0;
-}
-#endif
-
static int stm32mp1_clk_probe(struct udevice *dev)
{
int result = 0;
@@ -2302,7 +2284,7 @@
#if defined(VERBOSE_DEBUG)
/* display debug information for probe after relocation */
if (gd->flags & GD_FLG_RELOC)
- stm32mp1_clk_dump(priv);
+ stm32mp1_clk_dump(dev);
#endif
gd->cpu_clk = stm32mp1_clk_get(priv, _CK_MPU);
@@ -2333,6 +2315,9 @@
.disable = stm32mp1_clk_disable,
.get_rate = stm32mp1_clk_get_rate,
.set_rate = stm32mp1_clk_set_rate,
+#if IS_ENABLED(CONFIG_CMD_CLK) && !IS_ENABLED(CONFIG_SPL_BUILD)
+ .dump = stm32mp1_clk_dump,
+#endif
};
U_BOOT_DRIVER(stm32mp1_clock) = {
diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c
index f72ea41..21a233f 100644
--- a/drivers/core/ofnode.c
+++ b/drivers/core/ofnode.c
@@ -83,6 +83,11 @@
if (check_tree_count())
return oftree_null();
+ if (fdt_check_header(fdt)) {
+ log_err("Invalid device tree blob header\n");
+ return oftree_null();
+ }
+
/* register the new tree */
i = oftree_count++;
oftree_list[i] = fdt;
diff --git a/drivers/cpu/riscv_cpu.c b/drivers/cpu/riscv_cpu.c
index d6484d7..034b9b4 100644
--- a/drivers/cpu/riscv_cpu.c
+++ b/drivers/cpu/riscv_cpu.c
@@ -98,6 +98,10 @@
/* save the hart id */
plat->cpu_id = dev_read_addr(dev);
+ if (IS_ENABLED(CONFIG_64BIT))
+ plat->family = 0x201;
+ else
+ plat->family = 0x200;
/* first examine the property in current cpu node */
ret = dev_read_u32(dev, "timebase-frequency", &plat->timebase_freq);
/* if not found, then look at the parent /cpus node */
diff --git a/drivers/crypto/fsl/jobdesc.h b/drivers/crypto/fsl/jobdesc.h
index c4501ab..69adfdc 100644
--- a/drivers/crypto/fsl/jobdesc.h
+++ b/drivers/crypto/fsl/jobdesc.h
@@ -7,7 +7,6 @@
#ifndef __JOBDESC_H
#define __JOBDESC_H
-#include <common.h>
#include <asm/io.h>
#include "rsa_caam.h"
diff --git a/drivers/crypto/fsl/rsa_caam.h b/drivers/crypto/fsl/rsa_caam.h
index 9a6a8af..fb132a3 100644
--- a/drivers/crypto/fsl/rsa_caam.h
+++ b/drivers/crypto/fsl/rsa_caam.h
@@ -6,8 +6,6 @@
#ifndef __RSA_CAAM_H
#define __RSA_CAAM_H
-#include <common.h>
-
/**
* struct pk_in_params - holder for input to PKHA block in CAAM
* These parameters are required to perform Modular Exponentiation
diff --git a/drivers/ddr/altera/sdram_soc64.h b/drivers/ddr/altera/sdram_soc64.h
index 07a0f9f..87a70a8 100644
--- a/drivers/ddr/altera/sdram_soc64.h
+++ b/drivers/ddr/altera/sdram_soc64.h
@@ -6,7 +6,6 @@
#ifndef _SDRAM_SOC64_H_
#define _SDRAM_SOC64_H_
-#include <common.h>
#include <linux/sizes.h>
struct altera_sdram_priv {
diff --git a/drivers/ddr/imx/phy/ddrphy_utils.c b/drivers/ddr/imx/phy/ddrphy_utils.c
index fd8b411..45e1a70 100644
--- a/drivers/ddr/imx/phy/ddrphy_utils.c
+++ b/drivers/ddr/imx/phy/ddrphy_utils.c
@@ -111,11 +111,16 @@
dram_pll_init(MHZ(1000));
dram_disable_bypass();
break;
+ case 3734:
case 3733:
case 3732:
dram_pll_init(MHZ(933));
dram_disable_bypass();
break;
+ case 3600:
+ dram_pll_init(MHZ(900));
+ dram_disable_bypass();
+ break;
case 3200:
dram_pll_init(MHZ(800));
dram_disable_bypass();
diff --git a/drivers/ddr/imx/phy/helper.c b/drivers/ddr/imx/phy/helper.c
index 855a874..b9b2403 100644
--- a/drivers/ddr/imx/phy/helper.c
+++ b/drivers/ddr/imx/phy/helper.c
@@ -49,6 +49,13 @@
unsigned long imem_start = (unsigned long)_end + fw_offset;
unsigned long dmem_start;
unsigned long imem_len = IMEM_LEN, dmem_len = DMEM_LEN;
+ static enum fw_type last_type = -1;
+
+ /* If FW doesn't change, we can save the loading. */
+ if (last_type == type)
+ return;
+
+ last_type = type;
#ifdef CONFIG_SPL_OF_CONTROL
if (gd->fdt_blob && !fdt_check_header(gd->fdt_blob)) {
diff --git a/drivers/ddr/marvell/a38x/ddr_ml_wrapper.h b/drivers/ddr/marvell/a38x/ddr_ml_wrapper.h
index 7357311..dff5633 100644
--- a/drivers/ddr/marvell/a38x/ddr_ml_wrapper.h
+++ b/drivers/ddr/marvell/a38x/ddr_ml_wrapper.h
@@ -6,7 +6,6 @@
#ifndef _DDR_ML_WRAPPER_H
#define _DDR_ML_WRAPPER_H
-#include <common.h>
#include <i2c.h>
#include <spl.h>
#include <asm/io.h>
diff --git a/drivers/ddr/marvell/axp/ddr3_axp.h b/drivers/ddr/marvell/axp/ddr3_axp.h
index c40cd76..c3d2824 100644
--- a/drivers/ddr/marvell/axp/ddr3_axp.h
+++ b/drivers/ddr/marvell/axp/ddr3_axp.h
@@ -6,6 +6,8 @@
#ifndef __DDR3_AXP_H
#define __DDR3_AXP_H
+#include <config.h>
+
#define MV_78XX0_Z1_REV 0x0
#define MV_78XX0_A0_REV 0x1
#define MV_78XX0_B0_REV 0x2
diff --git a/drivers/dfu/Kconfig b/drivers/dfu/Kconfig
index 8771678..0360d9d 100644
--- a/drivers/dfu/Kconfig
+++ b/drivers/dfu/Kconfig
@@ -112,5 +112,14 @@
the buffer once we've been given the whole file. Define
this to the maximum filesize (in bytes) for the buffer.
If undefined it defaults to the CONFIG_SYS_DFU_DATA_BUF_SIZE.
+
+config DFU_NAME_MAX_SIZE
+ int "Size of the name to be added in dfu entity"
+ default 32
+ depends on DFU
+ help
+ This value is used to maximum size. If name is longer than default size,
+ we need to change the proper maximum size.
+
endif
endmenu
diff --git a/drivers/fastboot/Kconfig b/drivers/fastboot/Kconfig
index 11fc0fe..5e5855a 100644
--- a/drivers/fastboot/Kconfig
+++ b/drivers/fastboot/Kconfig
@@ -242,6 +242,13 @@
this feature if you are using verified boot, as it will allow an
attacker to bypass any restrictions you have in place.
+config FASTBOOT_CMD_OEM_CONSOLE
+ bool "Enable the 'oem console' command"
+ depends on CONSOLE_RECORD
+ help
+ Add support for the "oem console" command to input and read console
+ record buffer.
+
endif # FASTBOOT
endmenu
diff --git a/drivers/fastboot/fb_command.c b/drivers/fastboot/fb_command.c
index 5fcadcd..f95f4e4 100644
--- a/drivers/fastboot/fb_command.c
+++ b/drivers/fastboot/fb_command.c
@@ -5,6 +5,7 @@
#include <common.h>
#include <command.h>
+#include <console.h>
#include <env.h>
#include <fastboot.h>
#include <fastboot-internal.h>
@@ -40,6 +41,7 @@
static void oem_format(char *, char *);
static void oem_partconf(char *, char *);
static void oem_bootbus(char *, char *);
+static void oem_console(char *, char *);
static void run_ucmd(char *, char *);
static void run_acmd(char *, char *);
@@ -107,6 +109,10 @@
.command = "oem run",
.dispatch = CONFIG_IS_ENABLED(FASTBOOT_OEM_RUN, (run_ucmd), (NULL))
},
+ [FASTBOOT_COMMAND_OEM_CONSOLE] = {
+ .command = "oem console",
+ .dispatch = CONFIG_IS_ENABLED(FASTBOOT_CMD_OEM_CONSOLE, (oem_console), (NULL))
+ },
[FASTBOOT_COMMAND_UCMD] = {
.command = "UCmd",
.dispatch = CONFIG_IS_ENABLED(FASTBOOT_UUU_SUPPORT, (run_ucmd), (NULL))
@@ -152,6 +158,35 @@
return -1;
}
+void fastboot_multiresponse(int cmd, char *response)
+{
+ switch (cmd) {
+ case FASTBOOT_COMMAND_GETVAR:
+ fastboot_getvar_all(response);
+ break;
+ case FASTBOOT_COMMAND_OEM_CONSOLE:
+ if (CONFIG_IS_ENABLED(FASTBOOT_CMD_OEM_CONSOLE)) {
+ char buf[FASTBOOT_RESPONSE_LEN] = { 0 };
+
+ if (console_record_isempty()) {
+ console_record_reset();
+ fastboot_okay(NULL, response);
+ } else {
+ int ret = console_record_readline(buf, sizeof(buf) - 5);
+
+ if (ret < 0)
+ fastboot_fail("Error reading console", response);
+ else
+ fastboot_response("INFO", response, "%s", buf);
+ }
+ break;
+ }
+ default:
+ fastboot_fail("Unknown multiresponse command", response);
+ break;
+ }
+}
+
/**
* okay() - Send bare OKAY response
*
@@ -490,3 +525,20 @@
else
fastboot_okay(NULL, response);
}
+
+/**
+ * oem_console() - Execute the OEM console command
+ *
+ * @cmd_parameter: Pointer to command parameter
+ * @response: Pointer to fastboot response buffer
+ */
+static void __maybe_unused oem_console(char *cmd_parameter, char *response)
+{
+ if (cmd_parameter)
+ console_in_puts(cmd_parameter);
+
+ if (console_record_isempty())
+ fastboot_fail("Empty console", response);
+ else
+ fastboot_response(FASTBOOT_MULTIRESPONSE_START, response, NULL);
+}
diff --git a/drivers/fastboot/fb_getvar.c b/drivers/fastboot/fb_getvar.c
index 8cb8ffa..f65519c 100644
--- a/drivers/fastboot/fb_getvar.c
+++ b/drivers/fastboot/fb_getvar.c
@@ -29,53 +29,67 @@
static const struct {
const char *variable;
+ bool list;
void (*dispatch)(char *var_parameter, char *response);
} getvar_dispatch[] = {
{
.variable = "version",
- .dispatch = getvar_version
+ .dispatch = getvar_version,
+ .list = true,
}, {
.variable = "version-bootloader",
- .dispatch = getvar_version_bootloader
+ .dispatch = getvar_version_bootloader,
+ .list = true
}, {
.variable = "downloadsize",
- .dispatch = getvar_downloadsize
+ .dispatch = getvar_downloadsize,
+ .list = true
}, {
.variable = "max-download-size",
- .dispatch = getvar_downloadsize
+ .dispatch = getvar_downloadsize,
+ .list = true
}, {
.variable = "serialno",
- .dispatch = getvar_serialno
+ .dispatch = getvar_serialno,
+ .list = true
}, {
.variable = "version-baseband",
- .dispatch = getvar_version_baseband
+ .dispatch = getvar_version_baseband,
+ .list = true
}, {
.variable = "product",
- .dispatch = getvar_product
+ .dispatch = getvar_product,
+ .list = true
}, {
.variable = "platform",
- .dispatch = getvar_platform
+ .dispatch = getvar_platform,
+ .list = true
}, {
.variable = "current-slot",
- .dispatch = getvar_current_slot
+ .dispatch = getvar_current_slot,
+ .list = true
#if IS_ENABLED(CONFIG_FASTBOOT_FLASH)
}, {
.variable = "has-slot",
- .dispatch = getvar_has_slot
+ .dispatch = getvar_has_slot,
+ .list = false
#endif
#if IS_ENABLED(CONFIG_FASTBOOT_FLASH_MMC)
}, {
.variable = "partition-type",
- .dispatch = getvar_partition_type
+ .dispatch = getvar_partition_type,
+ .list = false
#endif
#if IS_ENABLED(CONFIG_FASTBOOT_FLASH)
}, {
.variable = "partition-size",
- .dispatch = getvar_partition_size
+ .dispatch = getvar_partition_size,
+ .list = false
#endif
}, {
.variable = "is-userspace",
- .dispatch = getvar_is_userspace
+ .dispatch = getvar_is_userspace,
+ .list = true
}
};
@@ -237,6 +251,40 @@
fastboot_okay("no", response);
}
+static int current_all_dispatch;
+void fastboot_getvar_all(char *response)
+{
+ /*
+ * Find a dispatch getvar that can be listed and send
+ * it as INFO until we reach the end.
+ */
+ while (current_all_dispatch < ARRAY_SIZE(getvar_dispatch)) {
+ if (!getvar_dispatch[current_all_dispatch].list) {
+ current_all_dispatch++;
+ continue;
+ }
+
+ char envstr[FASTBOOT_RESPONSE_LEN] = { 0 };
+
+ getvar_dispatch[current_all_dispatch].dispatch(NULL, envstr);
+
+ char *envstr_start = envstr;
+
+ if (!strncmp("OKAY", envstr, 4) || !strncmp("FAIL", envstr, 4))
+ envstr_start += 4;
+
+ fastboot_response("INFO", response, "%s: %s",
+ getvar_dispatch[current_all_dispatch].variable,
+ envstr_start);
+
+ current_all_dispatch++;
+ return;
+ }
+
+ fastboot_response("OKAY", response, NULL);
+ current_all_dispatch = 0;
+}
+
/**
* fastboot_getvar() - Writes variable indicated by cmd_parameter to response.
*
@@ -254,6 +302,9 @@
{
if (!cmd_parameter) {
fastboot_fail("missing var", response);
+ } else if (!strncmp("all", cmd_parameter, 3) && strlen(cmd_parameter) == 3) {
+ current_all_dispatch = 0;
+ fastboot_response(FASTBOOT_MULTIRESPONSE_START, response, NULL);
} else {
#define FASTBOOT_ENV_PREFIX "fastboot."
int i;
diff --git a/drivers/firmware/firmware-zynqmp.c b/drivers/firmware/firmware-zynqmp.c
index 8ea15c7..dfad798 100644
--- a/drivers/firmware/firmware-zynqmp.c
+++ b/drivers/firmware/firmware-zynqmp.c
@@ -8,6 +8,7 @@
#include <common.h>
#include <cpu_func.h>
#include <dm.h>
+#include <dm/device_compat.h>
#include <dm/lists.h>
#include <log.h>
#include <zynqmp_firmware.h>
@@ -290,10 +291,31 @@
static int zynqmp_power_probe(struct udevice *dev)
{
+ struct udevice *ipi_dev;
+ ofnode ipi_node;
int ret;
debug("%s, (dev=%p)\n", __func__, dev);
+ /*
+ * Probe all IPI parent node driver. It is important to have IPI
+ * devices available when requested by mbox_get_by* API.
+ * If IPI device isn't available, then mailbox request fails and
+ * that causes system boot failure.
+ * To avoid this make sure all IPI parent drivers are probed here,
+ * and IPI parent driver binds each child node to mailbox driver.
+ * This way mbox_get_by_* API will have correct mailbox device
+ * driver probed.
+ */
+ ofnode_for_each_compatible_node(ipi_node, "xlnx,zynqmp-ipi-mailbox") {
+ ret = uclass_get_device_by_ofnode(UCLASS_NOP, ipi_node, &ipi_dev);
+ if (ret) {
+ dev_err(dev, "failed to get IPI device from node %s\n",
+ ofnode_get_name(ipi_node));
+ return ret;
+ }
+ }
+
ret = mbox_get_by_name(dev, "tx", &zynqmp_power.tx_chan);
if (ret) {
debug("%s: Cannot find tx mailbox\n", __func__);
diff --git a/drivers/firmware/scmi/sandbox-scmi_agent.c b/drivers/firmware/scmi/sandbox-scmi_agent.c
index d131809..cc9011c 100644
--- a/drivers/firmware/scmi/sandbox-scmi_agent.c
+++ b/drivers/firmware/scmi/sandbox-scmi_agent.c
@@ -66,10 +66,10 @@
};
static u8 protocols[] = {
- SCMI_PROTOCOL_ID_POWER_DOMAIN,
- SCMI_PROTOCOL_ID_CLOCK,
- SCMI_PROTOCOL_ID_RESET_DOMAIN,
- SCMI_PROTOCOL_ID_VOLTAGE_DOMAIN,
+ CONFIG_IS_ENABLED(SCMI_POWER_DOMAIN, (SCMI_PROTOCOL_ID_POWER_DOMAIN,))
+ CONFIG_IS_ENABLED(CLK_SCMI, (SCMI_PROTOCOL_ID_CLOCK,))
+ CONFIG_IS_ENABLED(RESET_SCMI, (SCMI_PROTOCOL_ID_RESET_DOMAIN,))
+ CONFIG_IS_ENABLED(DM_REGULATOR_SCMI, (SCMI_PROTOCOL_ID_VOLTAGE_DOMAIN,))
};
#define NUM_PROTOCOLS ARRAY_SIZE(protocols)
@@ -1124,6 +1124,13 @@
return chan->channel_id;
}
+static int sandbox_proto_not_supported(struct scmi_msg *msg)
+{
+ *(u32 *)msg->out_msg = SCMI_NOT_SUPPORTED;
+
+ return 0;
+}
+
static int sandbox_scmi_test_process_msg(struct udevice *dev,
struct scmi_channel *channel,
struct scmi_msg *msg)
@@ -1160,6 +1167,9 @@
}
break;
case SCMI_PROTOCOL_ID_POWER_DOMAIN:
+ if (!CONFIG_IS_ENABLED(SCMI_POWER_DOMAIN))
+ return sandbox_proto_not_supported(msg);
+
switch (msg->message_id) {
case SCMI_PROTOCOL_VERSION:
return sandbox_scmi_pwd_protocol_version(dev, msg);
@@ -1180,6 +1190,9 @@
}
break;
case SCMI_PROTOCOL_ID_CLOCK:
+ if (!CONFIG_IS_ENABLED(CLK_SCMI))
+ return sandbox_proto_not_supported(msg);
+
switch (msg->message_id) {
case SCMI_PROTOCOL_ATTRIBUTES:
return sandbox_scmi_clock_protocol_attribs(dev, msg);
@@ -1196,6 +1209,9 @@
}
break;
case SCMI_PROTOCOL_ID_RESET_DOMAIN:
+ if (!CONFIG_IS_ENABLED(RESET_SCMI))
+ return sandbox_proto_not_supported(msg);
+
switch (msg->message_id) {
case SCMI_RESET_DOMAIN_ATTRIBUTES:
return sandbox_scmi_rd_attribs(dev, msg);
@@ -1206,6 +1222,9 @@
}
break;
case SCMI_PROTOCOL_ID_VOLTAGE_DOMAIN:
+ if (!CONFIG_IS_ENABLED(DM_REGULATOR_SCMI))
+ return sandbox_proto_not_supported(msg);
+
switch (msg->message_id) {
case SCMI_VOLTAGE_DOMAIN_ATTRIBUTES:
return sandbox_scmi_voltd_attribs(dev, msg);
@@ -1224,8 +1243,7 @@
case SCMI_PROTOCOL_ID_SYSTEM:
case SCMI_PROTOCOL_ID_PERF:
case SCMI_PROTOCOL_ID_SENSOR:
- *(u32 *)msg->out_msg = SCMI_NOT_SUPPORTED;
- return 0;
+ return sandbox_proto_not_supported(msg);
default:
break;
}
diff --git a/drivers/firmware/scmi/sandbox-scmi_devices.c b/drivers/firmware/scmi/sandbox-scmi_devices.c
index facb5b0..603e2bb 100644
--- a/drivers/firmware/scmi/sandbox-scmi_devices.c
+++ b/drivers/firmware/scmi/sandbox-scmi_devices.c
@@ -62,12 +62,13 @@
if (!devices)
return 0;
- for (n = 0; n < SCMI_TEST_DEVICES_RD_COUNT; n++) {
- int ret2 = reset_free(devices->reset + n);
+ if (CONFIG_IS_ENABLED(RESET_SCMI))
+ for (n = 0; n < SCMI_TEST_DEVICES_RD_COUNT; n++) {
+ int ret2 = reset_free(devices->reset + n);
- if (ret2 && !ret)
- ret = ret2;
- }
+ if (ret2 && !ret)
+ ret = ret2;
+ }
return ret;
}
@@ -89,39 +90,53 @@
.regul_count = SCMI_TEST_DEVICES_VOLTD_COUNT,
};
- ret = power_domain_get_by_index(dev, priv->devices.pwdom, 0);
- if (ret) {
- dev_err(dev, "%s: Failed on power domain\n", __func__);
- return ret;
- }
-
- for (n = 0; n < SCMI_TEST_DEVICES_CLK_COUNT; n++) {
- ret = clk_get_by_index(dev, n, priv->devices.clk + n);
+ if (CONFIG_IS_ENABLED(SCMI_POWER_DOMAIN)) {
+ ret = power_domain_get_by_index(dev, priv->devices.pwdom, 0);
if (ret) {
- dev_err(dev, "%s: Failed on clk %zu\n", __func__, n);
+ dev_err(dev, "%s: Failed on power domain\n", __func__);
return ret;
}
}
- for (n = 0; n < SCMI_TEST_DEVICES_RD_COUNT; n++) {
- ret = reset_get_by_index(dev, n, priv->devices.reset + n);
- if (ret) {
- dev_err(dev, "%s: Failed on reset %zu\n", __func__, n);
- goto err_reset;
+ if (CONFIG_IS_ENABLED(CLK_SCMI)) {
+ for (n = 0; n < SCMI_TEST_DEVICES_CLK_COUNT; n++) {
+ ret = clk_get_by_index(dev, n, priv->devices.clk + n);
+ if (ret) {
+ dev_err(dev, "%s: Failed on clk %zu\n",
+ __func__, n);
+ return ret;
+ }
}
}
- for (n = 0; n < SCMI_TEST_DEVICES_VOLTD_COUNT; n++) {
- char name[32];
+ if (CONFIG_IS_ENABLED(RESET_SCMI)) {
+ for (n = 0; n < SCMI_TEST_DEVICES_RD_COUNT; n++) {
+ ret = reset_get_by_index(dev, n,
+ priv->devices.reset + n);
+ if (ret) {
+ dev_err(dev, "%s: Failed on reset %zu\n",
+ __func__, n);
+ goto err_reset;
+ }
+ }
+ }
- ret = snprintf(name, sizeof(name), "regul%zu-supply", n);
- assert(ret >= 0 && ret < sizeof(name));
+ if (CONFIG_IS_ENABLED(DM_REGULATOR_SCMI)) {
+ for (n = 0; n < SCMI_TEST_DEVICES_VOLTD_COUNT; n++) {
+ char name[32];
- ret = device_get_supply_regulator(dev, name,
- priv->devices.regul + n);
- if (ret) {
- dev_err(dev, "%s: Failed on voltd %zu\n", __func__, n);
- goto err_regul;
+ ret = snprintf(name, sizeof(name), "regul%zu-supply",
+ n);
+ assert(ret >= 0 && ret < sizeof(name));
+
+ ret = device_get_supply_regulator(dev, name,
+ priv->devices.regul
+ + n);
+ if (ret) {
+ dev_err(dev, "%s: Failed on voltd %zu\n",
+ __func__, n);
+ goto err_regul;
+ }
}
}
@@ -130,8 +145,9 @@
err_regul:
n = SCMI_TEST_DEVICES_RD_COUNT;
err_reset:
- for (; n > 0; n--)
- reset_free(priv->devices.reset + n - 1);
+ if (CONFIG_IS_ENABLED(RESET_SCMI))
+ for (; n > 0; n--)
+ reset_free(priv->devices.reset + n - 1);
return ret;
}
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index ba42b07..27df5d8 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -238,6 +238,15 @@
original maxim device has 8 push/pull outputs,
some clones offers 16bit.
+config MAX77663_GPIO
+ bool "MAX77663 GPIO cell of PMIC driver"
+ depends on DM_GPIO && DM_PMIC_MAX77663
+ help
+ GPIO driver for MAX77663 PMIC from Maxim Semiconductor.
+ MAX77663 PMIC has 8 pins that can be configured as GPIOs
+ and 3 GPIO-like pins dedicated for power/reset buttons
+ and LID sensor.
+
config MCP230XX_GPIO
bool "MCP230XX GPIO driver"
depends on DM
@@ -309,12 +318,11 @@
config QCOM_PMIC_GPIO
bool "Qualcomm generic PMIC GPIO/keypad driver"
depends on DM_GPIO && PMIC_QCOM
+ select BUTTON
help
Support for GPIO pins and power/reset buttons found on
Qualcomm SoCs PMIC.
- Default name for GPIO bank is "pm8916".
- Power and reset buttons are placed in "pwkey_qcom" bank and
- have gpio numbers 0 and 1 respectively.
+ The GPIO bank is called "pmic"
config PCF8575_GPIO
bool "PCF8575 I2C GPIO Expander driver"
@@ -426,6 +434,13 @@
help
Say yes here to support Vybrid vf610 GPIOs.
+config PALMAS_GPIO
+ bool "TI PALMAS series PMICs GPIO"
+ depends on DM_GPIO && PMIC_PALMAS
+ help
+ Select this option to enable GPIO driver for the TI PALMAS
+ series chip family.
+
config PIC32_GPIO
bool "Microchip PIC32 GPIO driver"
depends on DM_GPIO && MACH_PIC32
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index c8b3fd7..da3da5d 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -55,6 +55,7 @@
obj-$(CONFIG_HIKEY_GPIO) += hi6220_gpio.o
obj-$(CONFIG_HSDK_CREG_GPIO) += hsdk-creg-gpio.o
obj-$(CONFIG_IMX_RGPIO2P) += imx_rgpio2p.o
+obj-$(CONFIG_$(SPL_)PALMAS_GPIO) += palmas_gpio.o
obj-$(CONFIG_PIC32_GPIO) += pic32_gpio.o
obj-$(CONFIG_OCTEON_GPIO) += octeon_gpio.o
obj-$(CONFIG_MVEBU_GPIO) += mvebu_gpio.o
@@ -68,6 +69,7 @@
obj-$(CONFIG_SIFIVE_GPIO) += sifive-gpio.o
obj-$(CONFIG_NOMADIK_GPIO) += nmk_gpio.o
obj-$(CONFIG_MAX7320_GPIO) += max7320_gpio.o
+obj-$(CONFIG_$(SPL_)MAX77663_GPIO) += max77663_gpio.o
obj-$(CONFIG_SL28CPLD_GPIO) += sl28cpld-gpio.o
obj-$(CONFIG_ZYNQMP_GPIO_MODEPIN) += zynqmp_gpio_modepin.o
obj-$(CONFIG_SLG7XL45106_I2C_GPO) += gpio_slg7xl45106.o
diff --git a/drivers/gpio/dwapb_gpio.c b/drivers/gpio/dwapb_gpio.c
index e6e9194..7a6eae9 100644
--- a/drivers/gpio/dwapb_gpio.c
+++ b/drivers/gpio/dwapb_gpio.c
@@ -5,21 +5,15 @@
* DesignWare APB GPIO driver
*/
-#include <common.h>
-#include <log.h>
-#include <malloc.h>
-#include <asm/arch/gpio.h>
#include <asm/gpio.h>
#include <asm/io.h>
-#include <dm.h>
+#include <dm/device.h>
#include <dm/device-internal.h>
#include <dm/device_compat.h>
#include <dm/devres.h>
-#include <dm/lists.h>
-#include <dm/root.h>
+#include <dm/read.h>
#include <errno.h>
#include <reset.h>
-#include <linux/bitops.h>
#define GPIO_SWPORT_DR(p) (0x00 + (p) * 0xc)
#define GPIO_SWPORT_DDR(p) (0x04 + (p) * 0xc)
diff --git a/drivers/gpio/gpio-aspeed.c b/drivers/gpio/gpio-aspeed.c
index 2c5415c..1c3d187 100644
--- a/drivers/gpio/gpio-aspeed.c
+++ b/drivers/gpio/gpio-aspeed.c
@@ -11,7 +11,6 @@
#include <asm/gpio.h>
#include <config.h>
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <asm/io.h>
diff --git a/drivers/gpio/gpio-uclass.c b/drivers/gpio/gpio-uclass.c
index 7aece85..4234cd9 100644
--- a/drivers/gpio/gpio-uclass.c
+++ b/drivers/gpio/gpio-uclass.c
@@ -1143,9 +1143,29 @@
ret = uclass_get_device_by_ofnode(UCLASS_GPIO, args->node,
&desc->dev);
if (ret) {
+#if CONFIG_IS_ENABLED(MAX77663_GPIO) || CONFIG_IS_ENABLED(PALMAS_GPIO)
+ struct udevice *pmic;
+ ret = uclass_get_device_by_ofnode(UCLASS_PMIC, args->node,
+ &pmic);
+ if (ret) {
+ log_debug("%s: PMIC device get failed, err %d\n",
+ __func__, ret);
+ goto err;
+ }
+
+ device_foreach_child(desc->dev, pmic) {
+ if (device_get_uclass_id(desc->dev) == UCLASS_GPIO)
+ break;
+ }
+
+ /* if loop exits without GPIO device return error */
+ if (device_get_uclass_id(desc->dev) != UCLASS_GPIO)
+ goto err;
+#else
debug("%s: uclass_get_device_by_ofnode failed\n",
__func__);
goto err;
+#endif
}
}
ret = gpio_find_and_xlate(desc, args);
diff --git a/drivers/gpio/max77663_gpio.c b/drivers/gpio/max77663_gpio.c
new file mode 100644
index 0000000..ecb6047
--- /dev/null
+++ b/drivers/gpio/max77663_gpio.c
@@ -0,0 +1,178 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright(C) 2023 Svyatoslav Ryhel <clamor95@gmail.com>
+ */
+
+#include <dm.h>
+#include <asm/gpio.h>
+#include <power/max77663.h>
+#include <power/pmic.h>
+
+#define NUM_ENTRIES 11 /* 8 GPIOs + 3 KEYs */
+#define NUM_GPIOS 8
+
+#define MAX77663_CNFG1_GPIO 0x36
+#define GPIO_REG_ADDR(offset) (MAX77663_CNFG1_GPIO + (offset))
+
+#define MAX77663_CNFG_GPIO_DIR_MASK BIT(1)
+#define MAX77663_CNFG_GPIO_DIR_INPUT BIT(1)
+#define MAX77663_CNFG_GPIO_DIR_OUTPUT 0
+#define MAX77663_CNFG_GPIO_INPUT_VAL_MASK BIT(2)
+#define MAX77663_CNFG_GPIO_OUTPUT_VAL_MASK BIT(3)
+#define MAX77663_CNFG_GPIO_OUTPUT_VAL_HIGH BIT(3)
+#define MAX77663_CNFG_GPIO_OUTPUT_VAL_LOW 0
+#define MAX77663_CNFG_IRQ GENMASK(5, 4)
+
+#define MAX77663_ONOFFSTAT_REG 0x15
+#define EN0 BIT(2) /* KEY 2 */
+#define ACOK BIT(1) /* KEY 1 */
+#define LID BIT(0) /* KEY 0 */
+
+static int max77663_gpio_direction_input(struct udevice *dev, unsigned int offset)
+{
+ int ret;
+
+ if (offset >= NUM_GPIOS)
+ return 0;
+
+ ret = pmic_clrsetbits(dev->parent, GPIO_REG_ADDR(offset),
+ MAX77663_CNFG_GPIO_DIR_MASK,
+ MAX77663_CNFG_GPIO_DIR_INPUT);
+ if (ret < 0)
+ log_debug("%s: CNFG_GPIOx dir update failed: %d\n", __func__, ret);
+
+ return ret;
+}
+
+static int max77663_gpio_direction_output(struct udevice *dev, unsigned int offset,
+ int value)
+{
+ u8 val;
+ int ret;
+
+ if (offset >= NUM_GPIOS)
+ return -EINVAL;
+
+ val = (value) ? MAX77663_CNFG_GPIO_OUTPUT_VAL_HIGH :
+ MAX77663_CNFG_GPIO_OUTPUT_VAL_LOW;
+
+ ret = pmic_clrsetbits(dev->parent, GPIO_REG_ADDR(offset),
+ MAX77663_CNFG_GPIO_OUTPUT_VAL_MASK, val);
+ if (ret < 0) {
+ log_debug("%s: CNFG_GPIOx val update failed: %d\n", __func__, ret);
+ return ret;
+ }
+
+ ret = pmic_clrsetbits(dev->parent, GPIO_REG_ADDR(offset),
+ MAX77663_CNFG_GPIO_DIR_MASK,
+ MAX77663_CNFG_GPIO_DIR_OUTPUT);
+ if (ret < 0)
+ log_debug("%s: CNFG_GPIOx dir update failed: %d\n", __func__, ret);
+
+ return ret;
+}
+
+static int max77663_gpio_get_value(struct udevice *dev, unsigned int offset)
+{
+ int ret;
+
+ if (offset >= NUM_GPIOS) {
+ ret = pmic_reg_read(dev->parent, MAX77663_ONOFFSTAT_REG);
+ if (ret < 0) {
+ log_debug("%s: ONOFFSTAT_REG read failed: %d\n", __func__, ret);
+ return ret;
+ }
+
+ return !!(ret & BIT(offset - NUM_GPIOS));
+ }
+
+ ret = pmic_reg_read(dev->parent, GPIO_REG_ADDR(offset));
+ if (ret < 0) {
+ log_debug("%s: CNFG_GPIOx read failed: %d\n", __func__, ret);
+ return ret;
+ }
+
+ if (ret & MAX77663_CNFG_GPIO_DIR_MASK)
+ return !!(ret & MAX77663_CNFG_GPIO_INPUT_VAL_MASK);
+ else
+ return !!(ret & MAX77663_CNFG_GPIO_OUTPUT_VAL_MASK);
+}
+
+static int max77663_gpio_set_value(struct udevice *dev, unsigned int offset,
+ int value)
+{
+ u8 val;
+ int ret;
+
+ if (offset >= NUM_GPIOS)
+ return -EINVAL;
+
+ val = (value) ? MAX77663_CNFG_GPIO_OUTPUT_VAL_HIGH :
+ MAX77663_CNFG_GPIO_OUTPUT_VAL_LOW;
+
+ ret = pmic_clrsetbits(dev->parent, GPIO_REG_ADDR(offset),
+ MAX77663_CNFG_GPIO_OUTPUT_VAL_MASK, val);
+ if (ret < 0)
+ log_debug("%s: CNFG_GPIO_OUT update failed: %d\n", __func__, ret);
+
+ return ret;
+}
+
+static int max77663_gpio_get_function(struct udevice *dev, unsigned int offset)
+{
+ int ret;
+
+ if (offset >= NUM_GPIOS)
+ return GPIOF_INPUT;
+
+ ret = pmic_reg_read(dev->parent, GPIO_REG_ADDR(offset));
+ if (ret < 0) {
+ log_debug("%s: CNFG_GPIOx read failed: %d\n", __func__, ret);
+ return ret;
+ }
+
+ if (ret & MAX77663_CNFG_GPIO_DIR_MASK)
+ return GPIOF_INPUT;
+ else
+ return GPIOF_OUTPUT;
+}
+
+static const struct dm_gpio_ops max77663_gpio_ops = {
+ .direction_input = max77663_gpio_direction_input,
+ .direction_output = max77663_gpio_direction_output,
+ .get_value = max77663_gpio_get_value,
+ .set_value = max77663_gpio_set_value,
+ .get_function = max77663_gpio_get_function,
+};
+
+static int max77663_gpio_probe(struct udevice *dev)
+{
+ struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
+ int i, ret;
+
+ uc_priv->gpio_count = NUM_ENTRIES;
+ uc_priv->bank_name = "GPIO";
+
+ /*
+ * GPIO interrupts may be left ON after bootloader, hence let's
+ * pre-initialize hardware to the expected state by disabling all
+ * the interrupts.
+ */
+ for (i = 0; i < NUM_GPIOS; i++) {
+ ret = pmic_clrsetbits(dev->parent, GPIO_REG_ADDR(i),
+ MAX77663_CNFG_IRQ, 0);
+ if (ret < 0) {
+ log_debug("%s: failed to disable interrupt: %d\n", __func__, ret);
+ return ret;
+ }
+ }
+
+ return 0;
+}
+
+U_BOOT_DRIVER(max77663_gpio) = {
+ .name = MAX77663_GPIO_DRIVER,
+ .id = UCLASS_GPIO,
+ .probe = max77663_gpio_probe,
+ .ops = &max77663_gpio_ops,
+};
diff --git a/drivers/gpio/msm_gpio.c b/drivers/gpio/msm_gpio.c
index 51670f2..80cd28b 100644
--- a/drivers/gpio/msm_gpio.c
+++ b/drivers/gpio/msm_gpio.c
@@ -11,13 +11,10 @@
#include <asm/global_data.h>
#include <asm/gpio.h>
#include <asm/io.h>
+#include <mach/gpio.h>
DECLARE_GLOBAL_DATA_PTR;
-/* Register offsets */
-#define GPIO_CONFIG_OFF(no) ((no) * 0x1000)
-#define GPIO_IN_OUT_OFF(no) ((no) * 0x1000 + 0x4)
-
/* OE */
#define GPIO_OE_DISABLE (0x0 << 9)
#define GPIO_OE_ENABLE (0x1 << 9)
@@ -29,57 +26,64 @@
struct msm_gpio_bank {
phys_addr_t base;
+ const struct msm_pin_data *pin_data;
};
+#define GPIO_CONFIG_REG(dev, x) \
+ (qcom_pin_offset(((struct msm_gpio_bank *)dev_get_priv(dev))->pin_data->pin_offsets, x))
+
+#define GPIO_IN_OUT_REG(dev, x) \
+ (GPIO_CONFIG_REG(dev, x) + 0x4)
+
static int msm_gpio_direction_input(struct udevice *dev, unsigned int gpio)
{
struct msm_gpio_bank *priv = dev_get_priv(dev);
- phys_addr_t reg = priv->base + GPIO_CONFIG_OFF(gpio);
/* Disable OE bit */
- clrsetbits_le32(reg, GPIO_OE_MASK, GPIO_OE_DISABLE);
+ clrsetbits_le32(priv->base + GPIO_CONFIG_REG(dev, gpio),
+ GPIO_OE_MASK, GPIO_OE_DISABLE);
return 0;
}
-static int msm_gpio_set_value(struct udevice *dev, unsigned gpio, int value)
+static int msm_gpio_set_value(struct udevice *dev, unsigned int gpio, int value)
{
struct msm_gpio_bank *priv = dev_get_priv(dev);
value = !!value;
/* set value */
- writel(value << GPIO_OUT, priv->base + GPIO_IN_OUT_OFF(gpio));
+ writel(value << GPIO_OUT, priv->base + GPIO_IN_OUT_REG(dev, gpio));
return 0;
}
-static int msm_gpio_direction_output(struct udevice *dev, unsigned gpio,
+static int msm_gpio_direction_output(struct udevice *dev, unsigned int gpio,
int value)
{
struct msm_gpio_bank *priv = dev_get_priv(dev);
- phys_addr_t reg = priv->base + GPIO_CONFIG_OFF(gpio);
value = !!value;
/* set value */
- writel(value << GPIO_OUT, priv->base + GPIO_IN_OUT_OFF(gpio));
+ writel(value << GPIO_OUT, priv->base + GPIO_IN_OUT_REG(dev, gpio));
/* switch direction */
- clrsetbits_le32(reg, GPIO_OE_MASK, GPIO_OE_ENABLE);
+ clrsetbits_le32(priv->base + GPIO_CONFIG_REG(dev, gpio),
+ GPIO_OE_MASK, GPIO_OE_ENABLE);
return 0;
}
-static int msm_gpio_get_value(struct udevice *dev, unsigned gpio)
+static int msm_gpio_get_value(struct udevice *dev, unsigned int gpio)
{
struct msm_gpio_bank *priv = dev_get_priv(dev);
- return !!(readl(priv->base + GPIO_IN_OUT_OFF(gpio)) >> GPIO_IN);
+ return !!(readl(priv->base + GPIO_IN_OUT_REG(dev, gpio)) >> GPIO_IN);
}
-static int msm_gpio_get_function(struct udevice *dev, unsigned offset)
+static int msm_gpio_get_function(struct udevice *dev, unsigned int gpio)
{
struct msm_gpio_bank *priv = dev_get_priv(dev);
- if (readl(priv->base + GPIO_CONFIG_OFF(offset)) & GPIO_OE_ENABLE)
+ if (readl(priv->base + GPIO_CONFIG_REG(dev, gpio)) & GPIO_OE_ENABLE)
return GPIOF_OUTPUT;
return GPIOF_INPUT;
@@ -98,6 +102,7 @@
struct msm_gpio_bank *priv = dev_get_priv(dev);
priv->base = dev_read_addr(dev);
+ priv->pin_data = (struct msm_pin_data *)dev_get_driver_data(dev);
return priv->base == FDT_ADDR_T_NONE ? -EINVAL : 0;
}
@@ -105,9 +110,10 @@
static int msm_gpio_of_to_plat(struct udevice *dev)
{
struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
+ const struct msm_pin_data *pin_data = (struct msm_pin_data *)dev_get_driver_data(dev);
- uc_priv->gpio_count = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
- "gpio-count", 0);
+ /* Get the pin count from the pinctrl driver */
+ uc_priv->gpio_count = pin_data->pin_count;
uc_priv->bank_name = fdt_getprop(gd->fdt_blob, dev_of_offset(dev),
"gpio-bank-name", NULL);
if (uc_priv->bank_name == NULL)
diff --git a/drivers/gpio/palmas_gpio.c b/drivers/gpio/palmas_gpio.c
new file mode 100644
index 0000000..1503935
--- /dev/null
+++ b/drivers/gpio/palmas_gpio.c
@@ -0,0 +1,132 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Based on mainline Linux palmas GPIO driver
+ * Copyright(C) 2023 Svyatoslav Ryhel <clamor95@gmail.com>
+ */
+
+#include <dm.h>
+#include <i2c.h>
+#include <asm/gpio.h>
+#include <power/palmas.h>
+
+#define NUM_GPIOS 8
+
+static int palmas_gpio_set_value(struct udevice *dev, unsigned int offset,
+ int value)
+{
+ struct palmas_priv *priv = dev_get_priv(dev->parent);
+ u32 reg;
+ int ret;
+
+ reg = (value) ? PALMAS_GPIO_SET_DATA_OUT : PALMAS_GPIO_CLEAR_DATA_OUT;
+
+ ret = dm_i2c_reg_write(priv->chip2, reg, BIT(offset));
+ if (ret < 0)
+ log_debug("%s: Reg 0x%02x write failed, %d\n", __func__, reg, ret);
+
+ return ret;
+}
+
+static int palmas_gpio_get_value(struct udevice *dev, unsigned int offset)
+{
+ struct palmas_priv *priv = dev_get_priv(dev->parent);
+ u32 reg;
+ int ret;
+
+ ret = dm_i2c_reg_read(priv->chip2, PALMAS_GPIO_DATA_DIR);
+ if (ret < 0) {
+ log_debug("%s: GPIO_DATA_DIR read failed, %d\n", __func__, ret);
+ return ret;
+ }
+
+ if (ret & BIT(offset))
+ reg = PALMAS_GPIO_DATA_OUT;
+ else
+ reg = PALMAS_GPIO_DATA_IN;
+
+ ret = dm_i2c_reg_read(priv->chip2, reg);
+ if (ret < 0) {
+ log_debug("%s: Reg 0x%02x read failed, %d\n", __func__, reg, ret);
+ return ret;
+ }
+
+ return !!(ret & BIT(offset));
+}
+
+static int palmas_gpio_direction_input(struct udevice *dev, unsigned int offset)
+{
+ struct palmas_priv *priv = dev_get_priv(dev->parent);
+ int ret;
+
+ ret = dm_i2c_reg_clrset(priv->chip2, PALMAS_GPIO_DATA_DIR,
+ BIT(offset), 0);
+ if (ret < 0)
+ log_debug("%s: GPIO_DATA_DIR val update failed: %d\n", __func__, ret);
+
+ return ret;
+}
+
+static int palmas_gpio_direction_output(struct udevice *dev, unsigned int offset,
+ int value)
+{
+ struct palmas_priv *priv = dev_get_priv(dev->parent);
+ int ret;
+
+ /* Set the initial value */
+ palmas_gpio_set_value(dev, offset, value);
+
+ ret = dm_i2c_reg_clrset(priv->chip2, PALMAS_GPIO_DATA_DIR,
+ BIT(offset), BIT(offset));
+ if (ret < 0)
+ log_debug("%s: GPIO_DATA_DIR val update failed: %d\n", __func__, ret);
+
+ return ret;
+}
+
+static int palmas_gpio_get_function(struct udevice *dev, unsigned int offset)
+{
+ struct palmas_priv *priv = dev_get_priv(dev->parent);
+ int ret;
+
+ ret = dm_i2c_reg_read(priv->chip2, PALMAS_GPIO_DATA_DIR);
+ if (ret < 0) {
+ log_debug("%s: GPIO_DATA_DIR read failed, %d\n", __func__, ret);
+ return ret;
+ }
+
+ if (ret & BIT(offset))
+ return GPIOF_OUTPUT;
+ else
+ return GPIOF_INPUT;
+}
+
+static const struct dm_gpio_ops palmas_gpio_ops = {
+ .direction_input = palmas_gpio_direction_input,
+ .direction_output = palmas_gpio_direction_output,
+ .get_value = palmas_gpio_get_value,
+ .set_value = palmas_gpio_set_value,
+ .get_function = palmas_gpio_get_function,
+};
+
+static int palmas_gpio_probe(struct udevice *dev)
+{
+ struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
+
+ uc_priv->gpio_count = NUM_GPIOS;
+ uc_priv->bank_name = "GPIO";
+
+ return 0;
+}
+
+static const struct udevice_id palmas_ids[] = {
+ { .compatible = "ti,palmas-gpio" },
+ { }
+};
+
+U_BOOT_DRIVER(palmas_gpio) = {
+ .name = PALMAS_GPIO_DRIVER,
+ .id = UCLASS_GPIO,
+ .of_match = palmas_ids,
+ .probe = palmas_gpio_probe,
+ .ops = &palmas_gpio_ops,
+};
diff --git a/drivers/gpio/qcom_pmic_gpio.c b/drivers/gpio/qcom_pmic_gpio.c
index 65feb45..6167c84 100644
--- a/drivers/gpio/qcom_pmic_gpio.c
+++ b/drivers/gpio/qcom_pmic_gpio.c
@@ -221,11 +221,14 @@
{
struct qcom_gpio_bank *priv = dev_get_priv(dev);
int reg;
+ u64 pid;
- priv->pid = dev_read_addr(dev);
- if (priv->pid == FDT_ADDR_T_NONE)
+ pid = dev_read_addr(dev);
+ if (pid == FDT_ADDR_T_NONE)
return log_msg_ret("bad address", -EINVAL);
+ priv->pid = pid;
+
/* Do a sanity check */
reg = pmic_reg_read(dev->parent, priv->pid + REG_TYPE);
if (reg != REG_TYPE_VAL)
@@ -242,14 +245,36 @@
return 0;
}
+/*
+ * Parse basic GPIO count specified via the gpio-ranges property
+ * as specified in Linux devicetrees
+ * Returns < 0 on error, otherwise gpio count
+ */
+static int qcom_gpio_of_parse_ranges(struct udevice *dev)
+{
+ int ret;
+ struct ofnode_phandle_args args;
+
+ ret = ofnode_parse_phandle_with_args(dev_ofnode(dev), "gpio-ranges",
+ NULL, 3, 0, &args);
+ if (ret)
+ return log_msg_ret("gpio-ranges", ret);
+
+ return args.args[2];
+}
+
static int qcom_gpio_of_to_plat(struct udevice *dev)
{
struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
+ int ret;
- uc_priv->gpio_count = dev_read_u32_default(dev, "gpio-count", 0);
- uc_priv->bank_name = dev_read_string(dev, "gpio-bank-name");
- if (uc_priv->bank_name == NULL)
- uc_priv->bank_name = "qcom_pmic";
+ ret = qcom_gpio_of_parse_ranges(dev);
+ if (ret > 0)
+ uc_priv->gpio_count = ret;
+ else
+ return ret;
+
+ uc_priv->bank_name = "pmic";
return 0;
}
@@ -272,104 +297,3 @@
.priv_auto = sizeof(struct qcom_gpio_bank),
};
-
-/* Add pmic buttons as GPIO as well - there is no generic way for now */
-#define PON_INT_RT_STS 0x10
-#define KPDPWR_ON_INT_BIT 0
-#define RESIN_ON_INT_BIT 1
-
-static int qcom_pwrkey_get_function(struct udevice *dev, unsigned offset)
-{
- return GPIOF_INPUT;
-}
-
-static int qcom_pwrkey_get_value(struct udevice *dev, unsigned offset)
-{
- struct qcom_gpio_bank *priv = dev_get_priv(dev);
-
- int reg = pmic_reg_read(dev->parent, priv->pid + PON_INT_RT_STS);
-
- if (reg < 0)
- return 0;
-
- switch (offset) {
- case 0: /* Power button */
- return (reg & BIT(KPDPWR_ON_INT_BIT)) != 0;
- break;
- case 1: /* Reset button */
- default:
- return (reg & BIT(RESIN_ON_INT_BIT)) != 0;
- break;
- }
-}
-
-/*
- * Since pmic buttons modelled as GPIO, we need empty direction functions
- * to trick u-boot button driver
- */
-static int qcom_pwrkey_direction_input(struct udevice *dev, unsigned int offset)
-{
- return 0;
-}
-
-static int qcom_pwrkey_direction_output(struct udevice *dev, unsigned int offset, int value)
-{
- return -EOPNOTSUPP;
-}
-
-static const struct dm_gpio_ops qcom_pwrkey_ops = {
- .get_value = qcom_pwrkey_get_value,
- .get_function = qcom_pwrkey_get_function,
- .direction_input = qcom_pwrkey_direction_input,
- .direction_output = qcom_pwrkey_direction_output,
-};
-
-static int qcom_pwrkey_probe(struct udevice *dev)
-{
- struct qcom_gpio_bank *priv = dev_get_priv(dev);
- int reg;
-
- priv->pid = dev_read_addr(dev);
- if (priv->pid == FDT_ADDR_T_NONE)
- return log_msg_ret("bad address", -EINVAL);
-
- /* Do a sanity check */
- reg = pmic_reg_read(dev->parent, priv->pid + REG_TYPE);
- if (reg != 0x1)
- return log_msg_ret("bad type", -ENXIO);
-
- reg = pmic_reg_read(dev->parent, priv->pid + REG_SUBTYPE);
- if ((reg & 0x5) == 0)
- return log_msg_ret("bad subtype", -ENXIO);
-
- return 0;
-}
-
-static int qcom_pwrkey_of_to_plat(struct udevice *dev)
-{
- struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
-
- uc_priv->gpio_count = 2;
- uc_priv->bank_name = dev_read_string(dev, "gpio-bank-name");
- if (uc_priv->bank_name == NULL)
- uc_priv->bank_name = "pwkey_qcom";
-
- return 0;
-}
-
-static const struct udevice_id qcom_pwrkey_ids[] = {
- { .compatible = "qcom,pm8916-pwrkey" },
- { .compatible = "qcom,pm8994-pwrkey" },
- { .compatible = "qcom,pm8998-pwrkey" },
- { }
-};
-
-U_BOOT_DRIVER(pwrkey_qcom) = {
- .name = "pwrkey_qcom",
- .id = UCLASS_GPIO,
- .of_match = qcom_pwrkey_ids,
- .of_to_plat = qcom_pwrkey_of_to_plat,
- .probe = qcom_pwrkey_probe,
- .ops = &qcom_pwrkey_ops,
- .priv_auto = sizeof(struct qcom_gpio_bank),
-};
diff --git a/drivers/i2c/i2c-uclass.c b/drivers/i2c/i2c-uclass.c
index 5405067..98f9585 100644
--- a/drivers/i2c/i2c-uclass.c
+++ b/drivers/i2c/i2c-uclass.c
@@ -427,7 +427,7 @@
goto err_exit;
}
- ret = dev_read_u32(parent, "i2cbcdev", &phandle);
+ ret = dev_read_u32(parent, prop_name, &phandle);
if (ret)
goto err_exit;
diff --git a/drivers/iommu/Kconfig b/drivers/iommu/Kconfig
index dabc1f9..2ba6d9c 100644
--- a/drivers/iommu/Kconfig
+++ b/drivers/iommu/Kconfig
@@ -24,4 +24,20 @@
configuration to put the DART into bypass mode such that it can
be used transparently by U-Boot.
+config QCOM_HYP_SMMU
+ bool "Qualcomm quirky SMMU support"
+ depends on IOMMU && ARCH_SNAPDRAGON
+ help
+ Enable support for the Qualcomm variant of the Arm System MMU-500.
+ Qualcomm boards have a non-standard SMMU where some registers are
+ emulated by the hypervisor. It is initialised early in the boot
+ process and can't be turned off.
+
+ The main caveat with this hardware is that it doesn't support BYPASS
+ streams, attempting to configure once will instead wind up with a
+ FAULT stream, and the device will crash when DMA is attempted.
+
+ Say Y here to enable support for non-boot peripherals like USB by
+ configuring identity mapped streams for them.
+
endmenu
diff --git a/drivers/iommu/Makefile b/drivers/iommu/Makefile
index e3e0900..438cab8 100644
--- a/drivers/iommu/Makefile
+++ b/drivers/iommu/Makefile
@@ -4,3 +4,4 @@
obj-$(CONFIG_APPLE_DART) += apple_dart.o
obj-$(CONFIG_SANDBOX) += sandbox_iommu.o
+obj-$(CONFIG_QCOM_HYP_SMMU) += qcom-hyp-smmu.o
diff --git a/drivers/iommu/iommu-uclass.c b/drivers/iommu/iommu-uclass.c
index 72f123d..dff3239 100644
--- a/drivers/iommu/iommu-uclass.c
+++ b/drivers/iommu/iommu-uclass.c
@@ -77,6 +77,7 @@
{
struct ofnode_phandle_args args;
struct udevice *dev_iommu;
+ const struct iommu_ops *ops;
int i, count, ret = 0;
count = dev_count_phandle_with_args(dev, "iommus",
@@ -85,24 +86,38 @@
ret = dev_read_phandle_with_args(dev, "iommus",
"#iommu-cells", 0, i, &args);
if (ret) {
- debug("%s: dev_read_phandle_with_args failed: %d\n",
- __func__, ret);
+ log_err("%s: Failed to parse 'iommus' property for '%s': %d\n",
+ __func__, dev->name, ret);
return ret;
}
ret = uclass_get_device_by_ofnode(UCLASS_IOMMU, args.node,
&dev_iommu);
if (ret) {
- debug("%s: uclass_get_device_by_ofnode failed: %d\n",
- __func__, ret);
+ log_err("%s: Failed to find IOMMU device for '%s': %d\n",
+ __func__, dev->name, ret);
return ret;
}
dev->iommu = dev_iommu;
+
+ if (dev->parent && dev->parent->iommu == dev_iommu)
+ continue;
+
+ ops = device_get_ops(dev->iommu);
+ if (ops && ops->connect) {
+ ret = ops->connect(dev);
+ if (ret) {
+ log_err("%s: Failed to connect '%s' to IOMMU '%s': %d\n",
+ __func__, dev->name, dev->iommu->name, ret);
+ return ret;
+ }
+ }
}
- if (CONFIG_IS_ENABLED(PCI) && count < 0 &&
- device_is_on_pci_bus(dev))
+#if CONFIG_IS_ENABLED(PCI)
+ if (count < 0 && device_is_on_pci_bus(dev))
return dev_pci_iommu_enable(dev);
+#endif
return 0;
}
diff --git a/drivers/iommu/qcom-hyp-smmu.c b/drivers/iommu/qcom-hyp-smmu.c
new file mode 100644
index 0000000..8e5cdb5
--- /dev/null
+++ b/drivers/iommu/qcom-hyp-smmu.c
@@ -0,0 +1,396 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2023 Linaro Ltd.
+ * Basic ARM SMMU-500 driver, assuming a pre-initialised SMMU and only IDENTITY domains
+ * this driver only implements the bare minimum to configure stream mappings for periphals
+ * used by u-boot on platforms where the SMMU can't be disabled.
+ */
+
+#include <log.h>
+#include <cpu_func.h>
+#include <dm.h>
+#include <iommu.h>
+#include <linux/bitfield.h>
+#include <linux/list.h>
+#include <linux/err.h>
+#include <lmb.h>
+#include <memalign.h>
+#include <asm/io.h>
+
+#define ARM_SMMU_GR0 0
+#define ARM_SMMU_GR1 1
+
+#define ARM_SMMU_GR0_ID0 0x20
+#define ARM_SMMU_ID0_NUMSMRG GENMASK(7, 0) /* Number of stream mapping groups */
+#define ARM_SMMU_GR0_ID1 0x24
+#define ARM_SMMU_ID1_PAGESIZE \
+ BIT(31) /* Page shift is 16 bits when set, otherwise 23 */
+#define ARM_SMMU_ID1_NUMPAGENDXB \
+ GENMASK(30, 28) /* Number of pages before context banks */
+#define ARM_SMMU_ID1_NUMCB GENMASK(7, 0) /* Number of context banks supported */
+
+#define ARM_SMMU_GR1_CBAR(n) (0x0 + ((n) << 2))
+#define ARM_SMMU_CBAR_TYPE GENMASK(17, 16)
+#define ARM_SMMU_CBAR_VMID GENMASK(7, 0)
+enum arm_smmu_cbar_type {
+ CBAR_TYPE_S2_TRANS,
+ CBAR_TYPE_S1_TRANS_S2_BYPASS,
+ CBAR_TYPE_S1_TRANS_S2_FAULT,
+ CBAR_TYPE_S1_TRANS_S2_TRANS,
+};
+
+#define ARM_SMMU_GR1_CBA2R(n) (0x800 + ((n) << 2))
+#define ARM_SMMU_CBA2R_VA64 BIT(0)
+
+/* Per-CB system control register */
+#define ARM_SMMU_CB_SCTLR 0x0
+#define ARM_SMMU_SCTLR_CFCFG BIT(7) /* Stall on context fault */
+#define ARM_SMMU_SCTLR_CFIE BIT(6) /* Context fault interrupt enable */
+#define ARM_SMMU_SCTLR_CFRE BIT(5) /* Abort on context fault */
+
+/* Translation Table Base, holds address of translation table in memory to be used
+ * for this context bank. Or 0 for bypass
+ */
+#define ARM_SMMU_CB_TTBR0 0x20
+#define ARM_SMMU_CB_TTBR1 0x28
+/* Translation Control Register, configured TTBR/TLB behaviour (0 for bypass) */
+#define ARM_SMMU_CB_TCR 0x30
+/* Memory Attribute Indirection, also 0 for bypass */
+#define ARM_SMMU_CB_S1_MAIR0 0x38
+#define ARM_SMMU_CB_S1_MAIR1 0x3c
+
+#define ARM_SMMU_GR0_SMR(n) (0x800 + ((n) << 2))
+#define ARM_SMMU_SMR_VALID BIT(31)
+#define ARM_SMMU_SMR_MASK GENMASK(31, 16) // Always 0 for now??
+#define ARM_SMMU_SMR_ID GENMASK(15, 0)
+
+#define ARM_SMMU_GR0_S2CR(n) (0xc00 + ((n) << 2))
+#define ARM_SMMU_S2CR_PRIVCFG GENMASK(25, 24)
+
+enum arm_smmu_s2cr_privcfg {
+ S2CR_PRIVCFG_DEFAULT,
+ S2CR_PRIVCFG_DIPAN,
+ S2CR_PRIVCFG_UNPRIV,
+ S2CR_PRIVCFG_PRIV,
+};
+
+#define ARM_SMMU_S2CR_TYPE GENMASK(17, 16)
+
+enum arm_smmu_s2cr_type {
+ S2CR_TYPE_TRANS,
+ S2CR_TYPE_BYPASS,
+ S2CR_TYPE_FAULT,
+};
+
+#define ARM_SMMU_S2CR_EXIDVALID BIT(10)
+#define ARM_SMMU_S2CR_CBNDX GENMASK(7, 0)
+
+#define VMID_UNUSED 0xff
+
+struct qcom_smmu_priv {
+ phys_addr_t base;
+ struct list_head devices;
+ struct udevice *dev;
+
+ /* Read-once config */
+ int num_cb;
+ int num_smr;
+ u32 pgshift;
+ u32 cb_pg_offset;
+};
+
+struct mmu_dev {
+ struct list_head li;
+ struct udevice *dev;
+ u16 sid;
+ u16 cbx;
+ u16 smr;
+};
+
+#define page_addr(priv, page) ((priv)->base + ((page) << (priv)->pgshift))
+
+#define smmu_readl(priv, page, offset) readl(page_addr(priv, page) + offset)
+#define gr0_readl(priv, offset) smmu_readl(priv, ARM_SMMU_GR0, offset)
+#define gr1_readl(priv, offset) smmu_readl(priv, ARM_SMMU_GR1, offset)
+#define cbx_readl(priv, cbx, offset) \
+ smmu_readl(priv, (priv->cb_pg_offset) + cbx, offset)
+
+#define smmu_writel(priv, page, offset, value) \
+ writel((value), page_addr(priv, page) + offset)
+#define gr0_writel(priv, offset, value) \
+ smmu_writel(priv, ARM_SMMU_GR0, offset, (value))
+#define gr1_writel(priv, offset, value) \
+ smmu_writel(priv, ARM_SMMU_GR1, offset, (value))
+#define cbx_writel(priv, cbx, offset, value) \
+ smmu_writel(priv, (priv->cb_pg_offset) + cbx, offset, value)
+
+#define gr1_setbits(priv, offset, value) \
+ gr1_writel(priv, offset, gr1_readl(priv, offset) | (value))
+
+static int get_stream_id(struct udevice *dev)
+{
+ ofnode node = dev_ofnode(dev);
+ struct ofnode_phandle_args args;
+ int count = ofnode_parse_phandle_with_args(node, "iommus",
+ "#iommu-cells", 0, 0, &args);
+
+ if (count < 0 || args.args[0] == 0) {
+ printf("Error: %s: iommus property not found or wrong number of cells\n",
+ __func__);
+ return -EINVAL;
+ }
+
+ return args.args[0]; // Some mask from bit 16 onward?
+}
+
+static struct mmu_dev *alloc_dev(struct udevice *dev)
+{
+ struct qcom_smmu_priv *priv = dev_get_priv(dev->iommu);
+ struct mmu_dev *mmu_dev;
+ int sid;
+
+ sid = get_stream_id(dev);
+ debug("%s %s has SID %#x\n", dev->iommu->name, dev->name, sid);
+ if (sid < 0 || sid > 0xffff) {
+ printf("\tSMMU: Invalid stream ID for %s\n", dev->name);
+ return ERR_PTR(-EINVAL);
+ }
+
+ /* We only support a single SID per device for now */
+ list_for_each_entry(mmu_dev, &priv->devices, li) {
+ if (mmu_dev->sid == sid)
+ return ERR_PTR(-EEXIST);
+ }
+
+ mmu_dev = calloc(sizeof(*mmu_dev), 1);
+ if (!mmu_dev)
+ return ERR_PTR(-ENOMEM);
+
+ mmu_dev->dev = dev;
+ mmu_dev->sid = sid;
+
+ list_add_tail(&mmu_dev->li, &priv->devices);
+
+ return mmu_dev;
+}
+
+/* Find and init the first free context bank */
+static int alloc_cb(struct qcom_smmu_priv *priv)
+{
+ u32 cbar, type, vmid, val;
+
+ for (int i = 0; i < priv->num_cb; i++) {
+ cbar = gr1_readl(priv, ARM_SMMU_GR1_CBAR(i));
+ type = FIELD_GET(ARM_SMMU_CBAR_TYPE, cbar);
+ vmid = FIELD_GET(ARM_SMMU_CBAR_VMID, cbar);
+
+ /* Check that the context bank is available. We haven't reset the SMMU so
+ * we just make a best guess.
+ */
+ if (type != CBAR_TYPE_S2_TRANS &&
+ (type != CBAR_TYPE_S1_TRANS_S2_BYPASS ||
+ vmid != VMID_UNUSED))
+ continue;
+
+ debug("%s: Found free context bank %d (cbar %#x)\n",
+ priv->dev->name, i, cbar);
+ type = CBAR_TYPE_S1_TRANS_S2_BYPASS;
+ vmid = 0;
+ cbar &= ~ARM_SMMU_CBAR_TYPE & ~ARM_SMMU_CBAR_VMID;
+ cbar |= FIELD_PREP(ARM_SMMU_CBAR_TYPE, type) |
+ FIELD_PREP(ARM_SMMU_CBAR_VMID, vmid);
+ gr1_writel(priv, ARM_SMMU_GR1_CBAR(i), cbar);
+
+ val = IS_ENABLED(CONFIG_ARM64) == 1 ? ARM_SMMU_CBA2R_VA64 : 0;
+ gr1_setbits(priv, ARM_SMMU_GR1_CBA2R(i), val);
+ return i;
+ }
+
+ return -1;
+}
+
+/* Search for a context bank that is already configured for this stream
+ * returns the context bank index or -ENOENT
+ */
+static int find_smr(struct qcom_smmu_priv *priv, u16 stream_id)
+{
+ u32 val;
+ int i;
+
+ for (i = 0; i < priv->num_smr; i++) {
+ val = gr0_readl(priv, ARM_SMMU_GR0_SMR(i));
+ if (!(val & ARM_SMMU_SMR_VALID) ||
+ FIELD_GET(ARM_SMMU_SMR_ID, val) != stream_id)
+ continue;
+
+ return i;
+ }
+
+ return -ENOENT;
+}
+
+static int configure_smr_s2cr(struct qcom_smmu_priv *priv, struct mmu_dev *mdev)
+{
+ u32 val;
+ int i;
+
+ for (i = 0; i < priv->num_smr; i++) {
+ /* Configure SMR */
+ val = gr0_readl(priv, ARM_SMMU_GR0_SMR(i));
+ if (val & ARM_SMMU_SMR_VALID)
+ continue;
+
+ val = mdev->sid | ARM_SMMU_SMR_VALID;
+ gr0_writel(priv, ARM_SMMU_GR0_SMR(i), val);
+
+ /*
+ * WARNING: Don't change this to use S2CR_TYPE_BYPASS!
+ * Some Qualcomm boards have angry hypervisor firmware
+ * that converts S2CR type BYPASS to type FAULT on write.
+ * We don't use virtual addressing for these boards in
+ * u-boot so we can get away with using S2CR_TYPE_TRANS
+ * instead
+ */
+ val = FIELD_PREP(ARM_SMMU_S2CR_TYPE, S2CR_TYPE_TRANS) |
+ FIELD_PREP(ARM_SMMU_S2CR_CBNDX, mdev->cbx);
+ gr0_writel(priv, ARM_SMMU_GR0_S2CR(i), val);
+
+ mdev->smr = i;
+ break;
+ }
+
+ /* Make sure our writes went through */
+ mb();
+
+ return 0;
+}
+
+static int qcom_smmu_connect(struct udevice *dev)
+{
+ struct mmu_dev *mdev;
+ struct qcom_smmu_priv *priv;
+ int ret;
+
+ debug("%s: %s -> %s\n", __func__, dev->name, dev->iommu->name);
+
+ priv = dev_get_priv(dev->iommu);
+ if (WARN_ON(!priv))
+ return -EINVAL;
+
+ mdev = alloc_dev(dev);
+ if (IS_ERR(mdev) && PTR_ERR(mdev) != -EEXIST) {
+ printf("%s: %s Couldn't create mmu context\n", __func__,
+ dev->name);
+ return PTR_ERR(mdev);
+ } else if (IS_ERR(mdev)) { // -EEXIST
+ return 0;
+ }
+
+ if (find_smr(priv, mdev->sid) >= 0) {
+ debug("Found existing context bank for %s, skipping init\n",
+ dev->name);
+ return 0;
+ }
+
+ ret = alloc_cb(priv);
+ if (ret < 0 || ret > 0xff) {
+ printf("Error: %s: failed to allocate context bank for %s\n",
+ __func__, dev->name);
+ return 0;
+ }
+ mdev->cbx = ret;
+
+ /* Configure context bank registers */
+ cbx_writel(priv, mdev->cbx, ARM_SMMU_CB_TTBR0, 0x0);
+ cbx_writel(priv, mdev->cbx, ARM_SMMU_CB_TTBR1, 0x0);
+ cbx_writel(priv, mdev->cbx, ARM_SMMU_CB_S1_MAIR0, 0x0);
+ cbx_writel(priv, mdev->cbx, ARM_SMMU_CB_S1_MAIR1, 0x0);
+ cbx_writel(priv, mdev->cbx, ARM_SMMU_CB_SCTLR,
+ ARM_SMMU_SCTLR_CFIE | ARM_SMMU_SCTLR_CFRE |
+ ARM_SMMU_SCTLR_CFCFG);
+ cbx_writel(priv, mdev->cbx, ARM_SMMU_CB_TCR, 0x0);
+
+ /* Ensure that our writes went through */
+ mb();
+
+ configure_smr_s2cr(priv, mdev);
+
+ return 0;
+}
+
+#ifdef DEBUG
+static inline void dump_boot_mappings(struct arm_smmu_priv *priv)
+{
+ u32 val;
+ int i;
+
+ debug(" SMMU dump boot mappings:\n");
+ for (i = 0; i < priv->num_smr; i++) {
+ val = gr0_readl(priv, ARM_SMMU_GR0_SMR(i));
+ if (val & ARM_SMMU_SMR_VALID)
+ debug("\tSMR %3d: SID: %#lx\n", i,
+ FIELD_GET(ARM_SMMU_SMR_ID, val));
+ }
+}
+#else
+#define dump_boot_mappings(priv) \
+ do { \
+ } while (0)
+#endif
+
+static int qcom_smmu_probe(struct udevice *dev)
+{
+ struct qcom_smmu_priv *priv;
+ u32 val;
+
+ priv = dev_get_priv(dev);
+ priv->dev = dev;
+ priv->base = dev_read_addr(dev);
+ INIT_LIST_HEAD(&priv->devices);
+
+ /* Read SMMU config */
+ val = gr0_readl(priv, ARM_SMMU_GR0_ID0);
+ priv->num_smr = FIELD_GET(ARM_SMMU_ID0_NUMSMRG, val);
+
+ val = gr0_readl(priv, ARM_SMMU_GR0_ID1);
+ priv->num_cb = FIELD_GET(ARM_SMMU_ID1_NUMCB, val);
+ priv->pgshift = FIELD_GET(ARM_SMMU_ID1_PAGESIZE, val) ? 16 : 12;
+ priv->cb_pg_offset = 1
+ << (FIELD_GET(ARM_SMMU_ID1_NUMPAGENDXB, val) + 1);
+
+ dump_boot_mappings(priv);
+
+ return 0;
+}
+
+static int qcom_smmu_remove(struct udevice *dev)
+{
+ (void)dev;
+ /*
+ * We should probably try and de-configure things here,
+ * however I'm yet to find a way to do it without crashing
+ * and it seems like Linux doesn't care at all anyway.
+ */
+
+ return 0;
+}
+
+static struct iommu_ops qcom_smmu_ops = {
+ .connect = qcom_smmu_connect,
+};
+
+static const struct udevice_id qcom_smmu500_ids[] = {
+ { .compatible = "qcom,sdm845-smmu-500" },
+ { /* sentinel */ }
+};
+
+U_BOOT_DRIVER(qcom_smmu500) = {
+ .name = "qcom_smmu500",
+ .id = UCLASS_IOMMU,
+ .of_match = qcom_smmu500_ids,
+ .priv_auto = sizeof(struct qcom_smmu_priv),
+ .ops = &qcom_smmu_ops,
+ .probe = qcom_smmu_probe,
+ .remove = qcom_smmu_remove,
+ .flags = DM_FLAG_OS_PREPARE,
+};
diff --git a/drivers/led/Kconfig b/drivers/led/Kconfig
index 996b757..9837960 100644
--- a/drivers/led/Kconfig
+++ b/drivers/led/Kconfig
@@ -49,6 +49,14 @@
This option enables support for LEDs connected to the Cortina
Access CAxxxx SOCs.
+config LED_LP5562
+ bool "LED Support for LP5562"
+ depends on LED && DM_I2C
+ help
+ This option enables support for LEDs connected to the TI LP5562
+ 4 channel I2C LED controller. Driver fully supports blink on the
+ B/G/R LEDs. White LED can blink, but re-uses the period from blue.
+
config LED_PWM
bool "LED PWM"
depends on LED && DM_PWM
diff --git a/drivers/led/Makefile b/drivers/led/Makefile
index 49ae919..2bcb858 100644
--- a/drivers/led/Makefile
+++ b/drivers/led/Makefile
@@ -11,3 +11,4 @@
obj-$(CONFIG_LED_PWM) += led_pwm.o
obj-$(CONFIG_$(SPL_)LED_GPIO) += led_gpio.o
obj-$(CONFIG_LED_CORTINA) += led_cortina.o
+obj-$(CONFIG_LED_LP5562) += led_lp5562.o
diff --git a/drivers/led/led-uclass.c b/drivers/led/led-uclass.c
index 68ca3c2..a4be56f 100644
--- a/drivers/led/led-uclass.c
+++ b/drivers/led/led-uclass.c
@@ -11,9 +11,27 @@
#include <errno.h>
#include <led.h>
#include <dm/device-internal.h>
+#include <dm/lists.h>
#include <dm/root.h>
#include <dm/uclass-internal.h>
+int led_bind_generic(struct udevice *parent, const char *driver_name)
+{
+ struct udevice *dev;
+ ofnode node;
+ int ret;
+
+ dev_for_each_subnode(node, parent) {
+ ret = device_bind_driver_to_node(parent, driver_name,
+ ofnode_get_name(node),
+ node, &dev);
+ if (ret)
+ return ret;
+ }
+
+ return 0;
+}
+
int led_get_by_label(const char *label, struct udevice **devp)
{
struct udevice *dev;
@@ -71,8 +89,10 @@
struct led_uc_plat *uc_plat = dev_get_uclass_plat(dev);
const char *default_state;
- uc_plat->label = dev_read_string(dev, "label");
if (!uc_plat->label)
+ uc_plat->label = dev_read_string(dev, "label");
+
+ if (!uc_plat->label && !dev_read_string(dev, "compatible"))
uc_plat->label = ofnode_get_name(dev_ofnode(dev));
uc_plat->default_state = LEDST_COUNT;
diff --git a/drivers/led/led_gpio.c b/drivers/led/led_gpio.c
index fbed151..71421de 100644
--- a/drivers/led/led_gpio.c
+++ b/drivers/led/led_gpio.c
@@ -11,7 +11,6 @@
#include <log.h>
#include <malloc.h>
#include <asm/gpio.h>
-#include <dm/lists.h>
struct led_gpio_priv {
struct gpio_desc gpio;
@@ -80,19 +79,7 @@
static int led_gpio_bind(struct udevice *parent)
{
- struct udevice *dev;
- ofnode node;
- int ret;
-
- dev_for_each_subnode(node, parent) {
- ret = device_bind_driver_to_node(parent, "gpio_led",
- ofnode_get_name(node),
- node, &dev);
- if (ret)
- return ret;
- }
-
- return 0;
+ return led_bind_generic(parent, "gpio_led");
}
static const struct led_ops gpio_led_ops = {
diff --git a/drivers/led/led_lp5562.c b/drivers/led/led_lp5562.c
new file mode 100644
index 0000000..431d7e1
--- /dev/null
+++ b/drivers/led/led_lp5562.c
@@ -0,0 +1,577 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018 Doug Zobel <douglas.zobel@climate.com>
+ *
+ * Driver for TI lp5562 4 channel LED driver. There are only 3
+ * engines available for the 4 LEDs, so white and blue LEDs share
+ * the same engine. This means that the blink period is shared
+ * between them. Changing the period of blue blink will affect
+ * the white period (and vice-versa). Blue and white On/Off
+ * states remain independent (as would PWM brightness if that's
+ * ever added to the LED core).
+ */
+
+#include <dm.h>
+#include <errno.h>
+#include <led.h>
+#include <i2c.h>
+#include <asm/gpio.h>
+#include <linux/delay.h>
+
+#define DEFAULT_CURRENT 100 /* 10 mA */
+#define MIN_BLINK_PERIOD 32 /* ms */
+#define MAX_BLINK_PERIOD 2248 /* ms */
+
+/* Register Map */
+#define REG_ENABLE 0x00
+#define REG_OP_MODE 0x01
+#define REG_B_PWM 0x02
+#define REG_G_PWM 0x03
+#define REG_R_PWM 0x04
+#define REG_B_CUR 0x05
+#define REG_G_CUR 0x06
+#define REG_R_CUR 0x07
+#define REG_CONFIG 0x08
+#define REG_ENG1_PC 0x09
+#define REG_ENG2_PC 0x0A
+#define REG_ENG3_PC 0x0B
+#define REG_STATUS 0x0C
+#define REG_RESET 0x0D
+#define REG_W_PWM 0x0E
+#define REG_W_CUR 0x0F
+#define REG_ENG1_MEM_BEGIN 0x10
+#define REG_ENG2_MEM_BEGIN 0x30
+#define REG_ENG3_MEM_BEGIN 0x50
+#define REG_LED_MAP 0x70
+
+/* LED Register Values */
+/* 0x00 ENABLE */
+#define REG_ENABLE_CHIP_ENABLE (0x1 << 6)
+#define REG_ENABLE_ENG_EXEC_HOLD 0x0
+#define REG_ENABLE_ENG_EXEC_RUN 0x2
+#define REG_ENABLE_ENG_EXEC_MASK 0x3
+
+/* 0x01 OP MODE */
+#define REG_OP_MODE_DISABLED 0x0
+#define REG_OP_MODE_LOAD_SRAM 0x1
+#define REG_OP_MODE_RUN 0x2
+#define REG_OP_MODE_MASK 0x3
+
+/* 0x02, 0x03, 0x04, 0x0E PWM */
+#define REG_PWM_MIN_VALUE 0
+#define REG_PWM_MAX_VALUE 0xFF
+
+/* 0x08 CONFIG */
+#define REG_CONFIG_EXT_CLK 0x0
+#define REG_CONFIG_INT_CLK 0x1
+#define REG_CONFIG_AUTO_CLK 0x2
+#define REG_CONFIG_CLK_MASK 0x3
+
+/* 0x0D RESET */
+#define REG_RESET_RESET 0xFF
+
+/* 0x70 LED MAP */
+#define REG_LED_MAP_ENG_MASK 0x03
+#define REG_LED_MAP_W_ENG_SHIFT 6
+#define REG_LED_MAP_R_ENG_SHIFT 4
+#define REG_LED_MAP_G_ENG_SHIFT 2
+#define REG_LED_MAP_B_ENG_SHIFT 0
+
+/* Engine program related */
+#define REG_ENGINE_MEM_SIZE 0x20
+#define LED_PGRM_RAMP_INCREMENT_SHIFT 0
+#define LED_PGRM_RAMP_SIGN_SHIFT 7
+#define LED_PGRM_RAMP_STEP_SHIFT 8
+#define LED_PGRM_RAMP_PRESCALE_SHIFT 14
+
+struct lp5562_led_wrap_priv {
+ struct gpio_desc enable_gpio;
+};
+
+struct lp5562_led_priv {
+ u8 reg_pwm;
+ u8 reg_current;
+ u8 map_shift;
+ u8 enginenum;
+};
+
+/* enum values map to LED_MAP (0x70) values */
+enum lp5562_led_ctl_mode {
+ I2C = 0x0,
+#ifdef CONFIG_LED_BLINK
+ ENGINE1 = 0x1,
+ ENGINE2 = 0x2,
+ ENGINE3 = 0x3
+#endif
+};
+
+/*
+ * Update a register value
+ * dev - I2C udevice (parent of led)
+ * regnum - register number to update
+ * value - value to write to register
+ * mask - mask of bits that should be changed
+ */
+static int lp5562_led_reg_update(struct udevice *dev, int regnum,
+ u8 value, u8 mask)
+{
+ int ret;
+
+ if (mask == 0xFF)
+ ret = dm_i2c_reg_write(dev, regnum, value);
+ else
+ ret = dm_i2c_reg_clrset(dev, regnum, mask, value);
+
+
+ /*
+ * Data sheet says "Delay between consecutive I2C writes to
+ * ENABLE register (00h) need to be longer than 488 μs
+ * (typical)." and "Delay between consecutive I2C writes to
+ * OP_MODE register need to be longer than 153 μs (typ)."
+ *
+ * The linux driver does usleep_range(500, 600) and
+ * usleep_range(200, 300), respectively.
+ */
+ switch (regnum) {
+ case REG_ENABLE:
+ udelay(600);
+ break;
+ case REG_OP_MODE:
+ udelay(300);
+ break;
+ }
+
+ return ret;
+}
+
+#ifdef CONFIG_LED_BLINK
+/*
+ * Program the lp5562 engine
+ * dev - I2C udevice (parent of led)
+ * program - array of commands
+ * size - number of commands in program array (1-16)
+ * engine - engine number (1-3)
+ */
+static int lp5562_led_program_engine(struct udevice *dev, u16 *program,
+ u8 size, u8 engine)
+{
+ int ret, cmd;
+ u8 engine_reg = REG_ENG1_MEM_BEGIN +
+ ((engine - 1) * REG_ENGINE_MEM_SIZE);
+ u8 shift = (3 - engine) * 2;
+ __be16 prog_be[16];
+
+ if (size < 1 || size > 16 || engine < 1 || engine > 3)
+ return -EINVAL;
+
+ for (cmd = 0; cmd < size; cmd++)
+ prog_be[cmd] = cpu_to_be16(program[cmd]);
+
+ /* set engine mode to 'disabled' */
+ ret = lp5562_led_reg_update(dev, REG_OP_MODE,
+ REG_OP_MODE_DISABLED << shift,
+ REG_OP_MODE_MASK << shift);
+ if (ret != 0)
+ goto done;
+
+ /* set exec mode to 'hold' */
+ ret = lp5562_led_reg_update(dev, REG_ENABLE,
+ REG_ENABLE_ENG_EXEC_HOLD << shift,
+ REG_ENABLE_ENG_EXEC_MASK << shift);
+ if (ret != 0)
+ goto done;
+
+ /* set engine mode to 'load SRAM' */
+ ret = lp5562_led_reg_update(dev, REG_OP_MODE,
+ REG_OP_MODE_LOAD_SRAM << shift,
+ REG_OP_MODE_MASK << shift);
+ if (ret != 0)
+ goto done;
+
+ /* send the re-ordered program sequence */
+ ret = dm_i2c_write(dev, engine_reg, (uchar *)prog_be, sizeof(u16) * size);
+ if (ret != 0)
+ goto done;
+
+ /* set engine mode to 'run' */
+ ret = lp5562_led_reg_update(dev, REG_OP_MODE,
+ REG_OP_MODE_RUN << shift,
+ REG_OP_MODE_MASK << shift);
+ if (ret != 0)
+ goto done;
+
+ /* set engine exec to 'run' */
+ ret = lp5562_led_reg_update(dev, REG_ENABLE,
+ REG_ENABLE_ENG_EXEC_RUN << shift,
+ REG_ENABLE_ENG_EXEC_MASK << shift);
+
+done:
+ return ret;
+}
+
+/*
+ * Get the LED's current control mode (I2C or ENGINE[1-3])
+ * dev - led udevice (child udevice)
+ */
+static enum lp5562_led_ctl_mode lp5562_led_get_control_mode(struct udevice *dev)
+{
+ struct lp5562_led_priv *priv = dev_get_priv(dev);
+ u8 data;
+ enum lp5562_led_ctl_mode mode = I2C;
+
+ if (dm_i2c_read(dev_get_parent(dev), REG_LED_MAP, &data, 1) == 0)
+ mode = (data & (REG_LED_MAP_ENG_MASK << priv->map_shift))
+ >> priv->map_shift;
+
+ return mode;
+}
+#endif
+
+/*
+ * Set the LED's control mode to I2C or ENGINE[1-3]
+ * dev - led udevice (child udevice)
+ * mode - mode to change to
+ */
+static int lp5562_led_set_control_mode(struct udevice *dev,
+ enum lp5562_led_ctl_mode mode)
+{
+ struct lp5562_led_priv *priv = dev_get_priv(dev);
+
+ return (lp5562_led_reg_update(dev_get_parent(dev), REG_LED_MAP,
+ mode << priv->map_shift,
+ REG_LED_MAP_ENG_MASK << priv->map_shift));
+}
+
+/*
+ * Return the LED's PWM value; If LED is in BLINK state, then it is
+ * under engine control mode which doesn't use this PWM value.
+ * dev - led udevice (child udevice)
+ */
+static int lp5562_led_get_pwm(struct udevice *dev)
+{
+ struct lp5562_led_priv *priv = dev_get_priv(dev);
+ u8 data;
+
+ if (dm_i2c_read(dev_get_parent(dev), priv->reg_pwm, &data, 1) != 0)
+ return -EINVAL;
+
+ return data;
+}
+
+/*
+ * Set the LED's PWM value and configure it to use this (I2C mode).
+ * dev - led udevice (child udevice)
+ * value - PWM value (0 - 255)
+ */
+static int lp5562_led_set_pwm(struct udevice *dev, u8 value)
+{
+ struct lp5562_led_priv *priv = dev_get_priv(dev);
+
+ if (lp5562_led_reg_update(dev_get_parent(dev), priv->reg_pwm,
+ value, 0xff) != 0)
+ return -EINVAL;
+
+ /* set LED to I2C register mode */
+ return lp5562_led_set_control_mode(dev, I2C);
+}
+
+/*
+ * Return the led's current state
+ * dev - led udevice (child udevice)
+ *
+ */
+static enum led_state_t lp5562_led_get_state(struct udevice *dev)
+{
+ enum led_state_t state = LEDST_ON;
+
+ if (lp5562_led_get_pwm(dev) == REG_PWM_MIN_VALUE)
+ state = LEDST_OFF;
+
+#ifdef CONFIG_LED_BLINK
+ if (lp5562_led_get_control_mode(dev) != I2C)
+ state = LEDST_BLINK;
+#endif
+
+ return state;
+}
+
+/*
+ * Set the led state
+ * dev - led udevice (child udevice)
+ * state - State to set the LED to
+ */
+static int lp5562_led_set_state(struct udevice *dev, enum led_state_t state)
+{
+#ifdef CONFIG_LED_BLINK
+ struct lp5562_led_priv *priv = dev_get_priv(dev);
+#endif
+
+ switch (state) {
+ case LEDST_OFF:
+ return lp5562_led_set_pwm(dev, REG_PWM_MIN_VALUE);
+ case LEDST_ON:
+ return lp5562_led_set_pwm(dev, REG_PWM_MAX_VALUE);
+#ifdef CONFIG_LED_BLINK
+ case LEDST_BLINK:
+ return lp5562_led_set_control_mode(dev, priv->enginenum);
+#endif
+ case LEDST_TOGGLE:
+ if (lp5562_led_get_state(dev) == LEDST_OFF)
+ return lp5562_led_set_state(dev, LEDST_ON);
+ else
+ return lp5562_led_set_state(dev, LEDST_OFF);
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+#ifdef CONFIG_LED_BLINK
+/*
+ * Set the blink period of an LED; note blue and white share the same
+ * engine so changing the period of one affects the other.
+ * dev - led udevice (child udevice)
+ * period_ms - blink period in ms
+ */
+static int lp5562_led_set_period(struct udevice *dev, int period_ms)
+{
+ struct lp5562_led_priv *priv = dev_get_priv(dev);
+ u8 opcode = 0;
+ u16 program[7];
+ u16 wait_time;
+
+ /* Blink is implemented as an engine program. Simple on/off
+ * for short periods, or fade in/fade out for longer periods:
+ *
+ * if (period_ms < 500):
+ * set PWM to 100%
+ * pause for period / 2
+ * set PWM to 0%
+ * pause for period / 2
+ * goto start
+ *
+ * else
+ * raise PWM 0% -> 50% in 62.7 ms
+ * raise PWM 50% -> 100% in 62.7 ms
+ * pause for (period - 4 * 62.7) / 2
+ * lower PWM 100% -> 50% in 62.7 ms
+ * lower PWM 50% -> 0% in 62.7 ms
+ * pause for (period - 4 * 62.7) / 2
+ * goto start
+ */
+
+ if (period_ms < MIN_BLINK_PERIOD)
+ period_ms = MIN_BLINK_PERIOD;
+ else if (period_ms > MAX_BLINK_PERIOD)
+ period_ms = MAX_BLINK_PERIOD;
+
+ if (period_ms < 500) {
+ /* Simple on/off blink */
+ wait_time = period_ms / 2;
+
+ /* 1st command is full brightness */
+ program[opcode++] =
+ (1 << LED_PGRM_RAMP_PRESCALE_SHIFT) |
+ REG_PWM_MAX_VALUE;
+
+ /* 2nd command is wait (period / 2) using 15.6ms steps */
+ program[opcode++] =
+ (1 << LED_PGRM_RAMP_PRESCALE_SHIFT) |
+ (((wait_time * 10) / 156) << LED_PGRM_RAMP_STEP_SHIFT) |
+ (0 << LED_PGRM_RAMP_INCREMENT_SHIFT);
+
+ /* 3rd command is 0% brightness */
+ program[opcode++] =
+ (1 << LED_PGRM_RAMP_PRESCALE_SHIFT);
+
+ /* 4th command is wait (period / 2) using 15.6ms steps */
+ program[opcode++] =
+ (1 << LED_PGRM_RAMP_PRESCALE_SHIFT) |
+ (((wait_time * 10) / 156) << LED_PGRM_RAMP_STEP_SHIFT) |
+ (0 << LED_PGRM_RAMP_INCREMENT_SHIFT);
+
+ /* 5th command: repeat */
+ program[opcode++] = 0x00;
+ } else {
+ /* fade-in / fade-out blink */
+ wait_time = ((period_ms - 251) / 2);
+
+ /* ramp up time is 256 * 0.49ms (125.4ms) done in 2 steps */
+ /* 1st command is ramp up 1/2 way */
+ program[opcode++] =
+ (0 << LED_PGRM_RAMP_PRESCALE_SHIFT) |
+ (1 << LED_PGRM_RAMP_STEP_SHIFT) |
+ (127 << LED_PGRM_RAMP_INCREMENT_SHIFT);
+
+ /* 2nd command is ramp up rest of the way */
+ program[opcode++] =
+ (0 << LED_PGRM_RAMP_PRESCALE_SHIFT) |
+ (1 << LED_PGRM_RAMP_STEP_SHIFT) |
+ (127 << LED_PGRM_RAMP_INCREMENT_SHIFT);
+
+ /* 3rd: wait ((period - 2 * ramp_time) / 2) (15.6ms steps) */
+ program[opcode++] =
+ (1 << LED_PGRM_RAMP_PRESCALE_SHIFT) |
+ (((wait_time * 10) / 156) << LED_PGRM_RAMP_STEP_SHIFT) |
+ (0 << LED_PGRM_RAMP_INCREMENT_SHIFT);
+
+ /* ramp down is same as ramp up with sign bit set */
+ /* 4th command is ramp down 1/2 way */
+ program[opcode++] =
+ (0 << LED_PGRM_RAMP_PRESCALE_SHIFT) |
+ (1 << LED_PGRM_RAMP_STEP_SHIFT) |
+ (1 << LED_PGRM_RAMP_SIGN_SHIFT) |
+ (127 << LED_PGRM_RAMP_INCREMENT_SHIFT);
+
+ /* 5th command is ramp down rest of the way */
+ program[opcode++] =
+ (0 << LED_PGRM_RAMP_PRESCALE_SHIFT) |
+ (1 << LED_PGRM_RAMP_STEP_SHIFT) |
+ (1 << LED_PGRM_RAMP_SIGN_SHIFT) |
+ (127 << LED_PGRM_RAMP_INCREMENT_SHIFT);
+
+ /* 6th: wait ((period - 2 * ramp_time) / 2) (15.6ms steps) */
+ program[opcode++] =
+ (1 << LED_PGRM_RAMP_PRESCALE_SHIFT) |
+ (((wait_time * 10) / 156) << LED_PGRM_RAMP_STEP_SHIFT) |
+ (0 << LED_PGRM_RAMP_INCREMENT_SHIFT);
+
+ /* 7th command: repeat */
+ program[opcode++] = 0x00;
+ }
+
+ return lp5562_led_program_engine(dev_get_parent(dev), program,
+ opcode, priv->enginenum);
+}
+#endif
+
+static const struct led_ops lp5562_led_ops = {
+ .get_state = lp5562_led_get_state,
+ .set_state = lp5562_led_set_state,
+#ifdef CONFIG_LED_BLINK
+ .set_period = lp5562_led_set_period,
+#endif
+};
+
+static int lp5562_led_probe(struct udevice *dev)
+{
+ struct lp5562_led_priv *priv = dev_get_priv(dev);
+ u8 current;
+ int ret = 0;
+
+ /* Child LED nodes */
+ switch (dev_read_addr(dev)) {
+ case 0:
+ priv->reg_current = REG_R_CUR;
+ priv->reg_pwm = REG_R_PWM;
+ priv->map_shift = REG_LED_MAP_R_ENG_SHIFT;
+ priv->enginenum = 1;
+ break;
+ case 1:
+ priv->reg_current = REG_G_CUR;
+ priv->reg_pwm = REG_G_PWM;
+ priv->map_shift = REG_LED_MAP_G_ENG_SHIFT;
+ priv->enginenum = 2;
+ break;
+ case 2:
+ priv->reg_current = REG_B_CUR;
+ priv->reg_pwm = REG_B_PWM;
+ priv->map_shift = REG_LED_MAP_B_ENG_SHIFT;
+ priv->enginenum = 3; /* shared with white */
+ break;
+ case 3:
+ priv->reg_current = REG_W_CUR;
+ priv->map_shift = REG_LED_MAP_W_ENG_SHIFT;
+ priv->enginenum = 3; /* shared with blue */
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ current = dev_read_u8_default(dev, "max-cur", DEFAULT_CURRENT);
+
+ ret = lp5562_led_reg_update(dev_get_parent(dev), priv->reg_current,
+ current, 0xff);
+
+ return ret;
+}
+
+static int lp5562_led_bind(struct udevice *dev)
+{
+ struct led_uc_plat *uc_plat = dev_get_uclass_plat(dev);
+
+ /*
+ * For the child nodes, parse a "chan-name" property, since
+ * the DT bindings for this device use that instead of
+ * "label".
+ */
+ uc_plat->label = dev_read_string(dev, "chan-name");
+
+ return 0;
+}
+
+U_BOOT_DRIVER(lp5562_led) = {
+ .name = "lp5562-led",
+ .id = UCLASS_LED,
+ .bind = lp5562_led_bind,
+ .probe = lp5562_led_probe,
+ .priv_auto = sizeof(struct lp5562_led_priv),
+ .ops = &lp5562_led_ops,
+};
+
+
+static int lp5562_led_wrap_probe(struct udevice *dev)
+{
+ struct lp5562_led_wrap_priv *priv = dev_get_priv(dev);
+ u8 clock_mode;
+ int ret;
+
+ /* Enable gpio if needed */
+ if (gpio_request_by_name(dev, "enabled-gpios", 0,
+ &priv->enable_gpio, GPIOD_IS_OUT) == 0) {
+ dm_gpio_set_value(&priv->enable_gpio, 1);
+ udelay(1000);
+ }
+
+ /* Ensure all registers have default values. */
+ ret = lp5562_led_reg_update(dev, REG_RESET, REG_RESET_RESET, 0xff);
+ if (ret)
+ return ret;
+ udelay(10000);
+
+ /* Enable the chip */
+ ret = lp5562_led_reg_update(dev, REG_ENABLE, REG_ENABLE_CHIP_ENABLE, 0xff);
+ if (ret)
+ return ret;
+
+ /*
+ * The DT bindings say 0=auto, 1=internal, 2=external, while
+ * the register[0:1] values are 0=external, 1=internal,
+ * 2=auto.
+ */
+ clock_mode = dev_read_u8_default(dev, "clock-mode", 0);
+ ret = lp5562_led_reg_update(dev, REG_CONFIG, 2 - clock_mode, REG_CONFIG_CLK_MASK);
+
+ return ret;
+}
+
+static int lp5562_led_wrap_bind(struct udevice *dev)
+{
+ return led_bind_generic(dev, "lp5562-led");
+}
+
+static const struct udevice_id lp5562_led_ids[] = {
+ { .compatible = "ti,lp5562" },
+ { /* sentinel */ }
+};
+
+U_BOOT_DRIVER(lp5562_led_wrap) = {
+ .name = "lp5562-led-wrap",
+ .id = UCLASS_NOP,
+ .of_match = lp5562_led_ids,
+ .bind = lp5562_led_wrap_bind,
+ .probe = lp5562_led_wrap_probe,
+ .priv_auto = sizeof(struct lp5562_led_wrap_priv),
+};
diff --git a/drivers/led/led_pwm.c b/drivers/led/led_pwm.c
index 7c8eae9..ae6de30 100644
--- a/drivers/led/led_pwm.c
+++ b/drivers/led/led_pwm.c
@@ -9,7 +9,6 @@
#include <errno.h>
#include <led.h>
#include <malloc.h>
-#include <dm/lists.h>
#include <pwm.h>
#define LEDS_PWM_DRIVER_NAME "led_pwm"
@@ -136,18 +135,7 @@
static int led_pwm_bind(struct udevice *parent)
{
- struct udevice *dev;
- ofnode node;
- int ret;
-
- dev_for_each_subnode(node, parent) {
- ret = device_bind_driver_to_node(parent, LEDS_PWM_DRIVER_NAME,
- ofnode_get_name(node),
- node, &dev);
- if (ret)
- return ret;
- }
- return 0;
+ return led_bind_generic(parent, LEDS_PWM_DRIVER_NAME);
}
static const struct led_ops led_pwm_ops = {
diff --git a/drivers/mailbox/zynqmp-ipi.c b/drivers/mailbox/zynqmp-ipi.c
index 3e4ec47..eb86847 100644
--- a/drivers/mailbox/zynqmp-ipi.c
+++ b/drivers/mailbox/zynqmp-ipi.c
@@ -8,9 +8,13 @@
#include <common.h>
#include <log.h>
#include <asm/io.h>
+#include <asm/system.h>
#include <dm.h>
#include <mailbox-uclass.h>
#include <dm/device_compat.h>
+#include <dm/lists.h>
+#include <dm/of_access.h>
+#include <linux/arm-smccc.h>
#include <linux/ioport.h>
#include <linux/io.h>
#include <wait_bit.h>
@@ -21,6 +25,43 @@
#define IPI_BIT_MASK_PMU0 0x10000
#define IPI_INT_REG_BASE_APU 0xFF300000
+/* IPI agent ID any */
+#define IPI_ID_ANY 0xFFUL
+
+/* indicate if ZynqMP IPI mailbox driver uses SMC calls or HVC calls */
+#define USE_SMC 0
+
+/* Default IPI SMC function IDs */
+#define SMC_IPI_MAILBOX_OPEN 0x82001000U
+#define SMC_IPI_MAILBOX_RELEASE 0x82001001U
+#define SMC_IPI_MAILBOX_STATUS_ENQUIRY 0x82001002U
+#define SMC_IPI_MAILBOX_NOTIFY 0x82001003U
+#define SMC_IPI_MAILBOX_ACK 0x82001004U
+#define SMC_IPI_MAILBOX_ENABLE_IRQ 0x82001005U
+#define SMC_IPI_MAILBOX_DISABLE_IRQ 0x82001006U
+
+/* IPI SMC Macros */
+
+/*
+ * Flag to indicate if notification interrupt
+ * to be disabled.
+ */
+#define IPI_SMC_ENQUIRY_DIRQ_MASK BIT(0)
+
+/*
+ * Flag to indicate if notification interrupt
+ * to be enabled.
+ */
+#define IPI_SMC_ACK_EIRQ_MASK BIT(0)
+
+/* IPI mailbox status */
+#define IPI_MB_STATUS_IDLE 0
+#define IPI_MB_STATUS_SEND_PENDING 1
+#define IPI_MB_STATUS_RECV_PENDING 2
+
+#define IPI_MB_CHNL_TX 0 /* IPI mailbox TX channel */
+#define IPI_MB_CHNL_RX 1 /* IPI mailbox RX channel */
+
struct ipi_int_regs {
u32 trig; /* 0x0 */
u32 obs; /* 0x4 */
@@ -39,8 +80,24 @@
void __iomem *local_res_regs;
void __iomem *remote_req_regs;
void __iomem *remote_res_regs;
+ u32 remote_id;
+ u32 local_id;
+ bool el3_supported;
};
+static int zynqmp_ipi_fw_call(struct zynqmp_ipi *ipi_mbox,
+ unsigned long a0, unsigned long a3)
+{
+ struct arm_smccc_res res = {0};
+ unsigned long a1, a2;
+
+ a1 = ipi_mbox->local_id;
+ a2 = ipi_mbox->remote_id;
+ arm_smccc_smc(a0, a1, a2, a3, 0, 0, 0, 0, &res);
+
+ return (int)res.a0;
+}
+
static int zynqmp_ipi_send(struct mbox_chan *chan, const void *data)
{
const struct zynqmp_ipi_msg *msg = (struct zynqmp_ipi_msg *)data;
@@ -51,6 +108,21 @@
for (size_t i = 0; i < msg->len; i++)
writel(msg->buf[i], &mbx[i]);
+ /* Use SMC calls for Exception Level less than 3 where TF-A is available */
+ if (!IS_ENABLED(CONFIG_SPL_BUILD) && current_el() < 3) {
+ ret = zynqmp_ipi_fw_call(zynqmp, SMC_IPI_MAILBOX_NOTIFY, 0);
+
+ debug("%s, send %ld bytes\n", __func__, msg->len);
+
+ return ret;
+ }
+
+ /* Return if EL3 is not supported */
+ if (!zynqmp->el3_supported) {
+ dev_err(chan->dev, "mailbox in EL3 only supported for zynqmp");
+ return -EOPNOTSUPP;
+ }
+
/* Write trigger interrupt */
writel(IPI_BIT_MASK_PMU0, &ipi_int_apu->trig);
@@ -67,29 +139,50 @@
struct zynqmp_ipi_msg *msg = (struct zynqmp_ipi_msg *)data;
struct zynqmp_ipi *zynqmp = dev_get_priv(chan->dev);
u32 *mbx = (u32 *)zynqmp->local_res_regs;
+ int ret = 0;
/*
* PMU Firmware does not trigger IPI interrupt for API call responses so
- * there is no need to check ISR flags
+ * there is no need to check ISR flags for EL3.
*/
for (size_t i = 0; i < msg->len; i++)
msg->buf[i] = readl(&mbx[i]);
+ /* Ack to remote if EL is not 3 */
+ if (!IS_ENABLED(CONFIG_SPL_BUILD) && current_el() < 3) {
+ ret = zynqmp_ipi_fw_call(zynqmp, SMC_IPI_MAILBOX_ACK,
+ IPI_SMC_ACK_EIRQ_MASK);
+ }
+
debug("%s, recv %ld bytes\n", __func__, msg->len);
- return 0;
+ return ret;
};
-static int zynqmp_ipi_probe(struct udevice *dev)
+static int zynqmp_ipi_dest_probe(struct udevice *dev)
{
struct zynqmp_ipi *zynqmp = dev_get_priv(dev);
struct resource res;
ofnode node;
+ int ret;
debug("%s(dev=%p)\n", __func__, dev);
- /* Get subnode where the regs are defined */
- /* Note IPI mailbox node needs to be the first one in DT */
- node = ofnode_first_subnode(dev_ofnode(dev));
+ node = dev_ofnode(dev);
+
+ if (IS_ENABLED(CONFIG_SPL_BUILD) || of_machine_is_compatible("xlnx,zynqmp"))
+ zynqmp->el3_supported = true;
+
+ ret = dev_read_u32(dev->parent, "xlnx,ipi-id", &zynqmp->local_id);
+ if (ret) {
+ dev_err(dev, "can't get local ipi id\n");
+ return ret;
+ }
+
+ ret = ofnode_read_u32(node, "xlnx,ipi-id", &zynqmp->remote_id);
+ if (ret) {
+ dev_err(dev, "can't get remote ipi id\n");
+ return ret;
+ }
if (ofnode_read_resource_byname(node, "local_request_region", &res)) {
dev_err(dev, "No reg property for local_request_region\n");
@@ -97,6 +190,8 @@
};
zynqmp->local_req_regs = devm_ioremap(dev, res.start,
(res.start - res.end));
+ if (!zynqmp->local_req_regs)
+ return -EINVAL;
if (ofnode_read_resource_byname(node, "local_response_region", &res)) {
dev_err(dev, "No reg property for local_response_region\n");
@@ -104,6 +199,8 @@
};
zynqmp->local_res_regs = devm_ioremap(dev, res.start,
(res.start - res.end));
+ if (!zynqmp->local_res_regs)
+ return -EINVAL;
if (ofnode_read_resource_byname(node, "remote_request_region", &res)) {
dev_err(dev, "No reg property for remote_request_region\n");
@@ -111,6 +208,8 @@
};
zynqmp->remote_req_regs = devm_ioremap(dev, res.start,
(res.start - res.end));
+ if (!zynqmp->remote_req_regs)
+ return -EINVAL;
if (ofnode_read_resource_byname(node, "remote_response_region", &res)) {
dev_err(dev, "No reg property for remote_response_region\n");
@@ -118,25 +217,59 @@
};
zynqmp->remote_res_regs = devm_ioremap(dev, res.start,
(res.start - res.end));
+ if (!zynqmp->remote_res_regs)
+ return -EINVAL;
return 0;
};
+static int zynqmp_ipi_probe(struct udevice *dev)
+{
+ struct udevice *cdev;
+ ofnode cnode;
+ int ret;
+
+ debug("%s(dev=%p)\n", __func__, dev);
+
+ dev_for_each_subnode(cnode, dev) {
+ ret = device_bind_driver_to_node(dev, "zynqmp_ipi_dest",
+ ofnode_get_name(cnode),
+ cnode, &cdev);
+ if (ret)
+ return ret;
+ }
+
+ return 0;
+};
+
+struct mbox_ops zynqmp_ipi_dest_mbox_ops = {
+ .send = zynqmp_ipi_send,
+ .recv = zynqmp_ipi_recv,
+};
+
+static const struct udevice_id zynqmp_ipi_dest_ids[] = {
+ { .compatible = "xlnx,zynqmp-ipi-dest-mailbox" },
+ { }
+};
+
+U_BOOT_DRIVER(zynqmp_ipi_dest) = {
+ .name = "zynqmp_ipi_dest",
+ .id = UCLASS_MAILBOX,
+ .of_match = zynqmp_ipi_dest_ids,
+ .probe = zynqmp_ipi_dest_probe,
+ .priv_auto = sizeof(struct zynqmp_ipi),
+ .ops = &zynqmp_ipi_dest_mbox_ops,
+};
+
static const struct udevice_id zynqmp_ipi_ids[] = {
{ .compatible = "xlnx,zynqmp-ipi-mailbox" },
{ }
};
-struct mbox_ops zynqmp_ipi_mbox_ops = {
- .send = zynqmp_ipi_send,
- .recv = zynqmp_ipi_recv,
-};
-
U_BOOT_DRIVER(zynqmp_ipi) = {
.name = "zynqmp_ipi",
- .id = UCLASS_MAILBOX,
+ .id = UCLASS_NOP,
.of_match = zynqmp_ipi_ids,
.probe = zynqmp_ipi_probe,
- .priv_auto = sizeof(struct zynqmp_ipi),
- .ops = &zynqmp_ipi_mbox_ops,
+ .flags = DM_FLAG_PROBE_AFTER_BIND,
};
diff --git a/drivers/memory/ti-aemif.c b/drivers/memory/ti-aemif.c
index c4bc88c..41325eb 100644
--- a/drivers/memory/ti-aemif.c
+++ b/drivers/memory/ti-aemif.c
@@ -7,6 +7,7 @@
*/
#include <common.h>
+#include <asm/arch/hardware.h>
#include <asm/ti-common/ti-aemif.h>
#define AEMIF_WAITCYCLE_CONFIG (KS2_AEMIF_CNTRL_BASE + 0x4)
diff --git a/drivers/memory/ti-gpmc.c b/drivers/memory/ti-gpmc.c
index 775e78c..0b86743 100644
--- a/drivers/memory/ti-gpmc.c
+++ b/drivers/memory/ti-gpmc.c
@@ -6,7 +6,6 @@
*/
#include <asm/io.h>
-#include <asm/arch/sys_proto.h>
#include <clk.h>
#include <common.h>
#include <dm.h>
@@ -17,6 +16,7 @@
#include <linux/mtd/omap_gpmc.h>
#include <linux/ioport.h>
#include <linux/io.h>
+#include <linux/sizes.h>
#include "ti-gpmc.h"
enum gpmc_clk_domain {
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index 97057de..f11ce72 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -527,19 +527,19 @@
legacy UART or other devices in the Winbond Super IO chips
on X86 platforms.
-config QCOM_GENI_SE
- bool "Qualcomm GENI Serial Engine Driver"
- depends on ARCH_SNAPDRAGON
- help
- The driver manages Generic Interface (GENI) firmware based
- Qualcomm Technologies, Inc. Universal Peripheral (QUP) Wrapper.
-
config QFW
bool
help
Hidden option to enable QEMU fw_cfg interface and uclass. This will
be selected by either CONFIG_CMD_QFW or CONFIG_GENERATE_ACPI_TABLE.
+config QFW_ACPI
+ bool
+ default y
+ depends on QFW && GENERATE_ACPI_TABLE && !SANDBOX
+ help
+ Hidden option to read ACPI tables from QEMU.
+
config QFW_PIO
bool
depends on QFW
@@ -554,6 +554,13 @@
Hidden option to enable MMIO QEMU fw_cfg interface. This will be
selected by the appropriate QEMU board.
+config QFW_SMBIOS
+ bool
+ default y
+ depends on QFW && SMBIOS && !SANDBOX
+ help
+ Hidden option to read SMBIOS tables from QEMU.
+
config I2C_EEPROM
bool "Enable driver for generic I2C-attached EEPROMs"
depends on MISC
@@ -615,7 +622,7 @@
ie. the FPGA device.
config SPL_FS_LOADER
- bool "Enable loader driver for file system"
+ bool "Enable loader driver for file system in SPL"
depends on SPL
help
This is file system generic loader which can be used to load
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index b67b823..0432db6 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -60,11 +60,12 @@
obj-$(CONFIG_P2SB) += p2sb-uclass.o
obj-$(CONFIG_PCA9551_LED) += pca9551_led.o
obj-$(CONFIG_$(SPL_)PWRSEQ) += pwrseq-uclass.o
-obj-$(CONFIG_QCOM_GENI_SE) += qcom-geni-se.o
ifdef CONFIG_QFW
obj-y += qfw.o
+obj-$(CONFIG_QFW_ACPI) += qfw_acpi.o
obj-$(CONFIG_QFW_PIO) += qfw_pio.o
obj-$(CONFIG_QFW_MMIO) += qfw_mmio.o
+obj-$(CONFIG_QFW_SMBIOS) += qfw_smbios.o
obj-$(CONFIG_SANDBOX) += qfw_sandbox.o
endif
obj-$(CONFIG_ROCKCHIP_EFUSE) += rockchip-efuse.o
diff --git a/drivers/misc/gsc.c b/drivers/misc/gsc.c
index 65c9c2c..feb02f9 100644
--- a/drivers/misc/gsc.c
+++ b/drivers/misc/gsc.c
@@ -531,10 +531,10 @@
if (!gsc_wd_disable(dev))
return CMD_RET_SUCCESS;
} else if (strcasecmp(argv[1], "thermal") == 0) {
- char *cmd, *val;
+ const char *cmd, *val;
- cmd = (argc > 2) ? argv[2] : NULL;
- val = (argc > 3) ? argv[3] : NULL;
+ cmd = cmd_arg2(argc, argv);
+ val = cmd_arg3(argc, argv);
if (!gsc_thermal(dev, cmd, val))
return CMD_RET_SUCCESS;
}
diff --git a/drivers/misc/qcom-geni-se.c b/drivers/misc/qcom-geni-se.c
deleted file mode 100644
index 281a5ec..0000000
--- a/drivers/misc/qcom-geni-se.c
+++ /dev/null
@@ -1,41 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Qualcomm Generic Interface (GENI) Serial Engine (SE) Wrapper
- *
- * Copyright (C) 2023 Linaro Ltd. <vladimir.zapolskiy@linaro.org>
- */
-
-#include <common.h>
-#include <dm.h>
-#include <misc.h>
-#include <asm/io.h>
-
-static int geni_se_qup_read(struct udevice *dev, int offset,
- void *buf, int size)
-{
- fdt_addr_t base = dev_read_addr(dev);
-
- if (size != sizeof(u32))
- return -EINVAL;
-
- *(u32 *)buf = readl(base + offset);
-
- return size;
-}
-
-static struct misc_ops geni_se_qup_ops = {
- .read = geni_se_qup_read,
-};
-
-static const struct udevice_id geni_se_qup_ids[] = {
- { .compatible = "qcom,geni-se-qup" },
- {}
-};
-
-U_BOOT_DRIVER(geni_se_qup) = {
- .name = "geni_se_qup",
- .id = UCLASS_MISC,
- .of_match = geni_se_qup_ids,
- .ops = &geni_se_qup_ops,
- .flags = DM_FLAG_PRE_RELOC,
-};
diff --git a/drivers/misc/qfw.c b/drivers/misc/qfw.c
index 7c01bf2..db98619 100644
--- a/drivers/misc/qfw.c
+++ b/drivers/misc/qfw.c
@@ -7,6 +7,7 @@
#define LOG_CATEGORY UCLASS_QFW
#include <common.h>
+#include <acpi/acpi_table.h>
#include <bootdev.h>
#include <bootflow.h>
#include <bootmeth.h>
@@ -20,246 +21,6 @@
#include <tables_csum.h>
#include <asm/acpi_table.h>
-#if defined(CONFIG_GENERATE_ACPI_TABLE) && !defined(CONFIG_SANDBOX)
-/*
- * This function allocates memory for ACPI tables
- *
- * @entry : BIOS linker command entry which tells where to allocate memory
- * (either high memory or low memory)
- * @addr : The address that should be used for low memory allcation. If the
- * memory allocation request is 'ZONE_HIGH' then this parameter will
- * be ignored.
- * @return: 0 on success, or negative value on failure
- */
-static int bios_linker_allocate(struct udevice *dev,
- struct bios_linker_entry *entry, ulong *addr)
-{
- uint32_t size, align;
- struct fw_file *file;
- unsigned long aligned_addr;
-
- align = le32_to_cpu(entry->alloc.align);
- /* align must be power of 2 */
- if (align & (align - 1)) {
- printf("error: wrong alignment %u\n", align);
- return -EINVAL;
- }
-
- file = qfw_find_file(dev, entry->alloc.file);
- if (!file) {
- printf("error: can't find file %s\n", entry->alloc.file);
- return -ENOENT;
- }
-
- size = be32_to_cpu(file->cfg.size);
-
- /*
- * ZONE_HIGH means we need to allocate from high memory, since
- * malloc space is already at the end of RAM, so we directly use it.
- * If allocation zone is ZONE_FSEG, then we use the 'addr' passed
- * in which is low memory
- */
- if (entry->alloc.zone == BIOS_LINKER_LOADER_ALLOC_ZONE_HIGH) {
- aligned_addr = (unsigned long)memalign(align, size);
- if (!aligned_addr) {
- printf("error: allocating resource\n");
- return -ENOMEM;
- }
- if (aligned_addr < gd->arch.table_start_high)
- gd->arch.table_start_high = aligned_addr;
- if (aligned_addr + size > gd->arch.table_end_high)
- gd->arch.table_end_high = aligned_addr + size;
-
- } else if (entry->alloc.zone == BIOS_LINKER_LOADER_ALLOC_ZONE_FSEG) {
- aligned_addr = ALIGN(*addr, align);
- } else {
- printf("error: invalid allocation zone\n");
- return -EINVAL;
- }
-
- debug("bios_linker_allocate: allocate file %s, size %u, zone %d, align %u, addr 0x%lx\n",
- file->cfg.name, size, entry->alloc.zone, align, aligned_addr);
-
- qfw_read_entry(dev, be16_to_cpu(file->cfg.select), size,
- (void *)aligned_addr);
- file->addr = aligned_addr;
-
- /* adjust address for low memory allocation */
- if (entry->alloc.zone == BIOS_LINKER_LOADER_ALLOC_ZONE_FSEG)
- *addr = (aligned_addr + size);
-
- return 0;
-}
-
-/*
- * This function patches ACPI tables previously loaded
- * by bios_linker_allocate()
- *
- * @entry : BIOS linker command entry which tells how to patch
- * ACPI tables
- * @return: 0 on success, or negative value on failure
- */
-static int bios_linker_add_pointer(struct udevice *dev,
- struct bios_linker_entry *entry)
-{
- struct fw_file *dest, *src;
- uint32_t offset = le32_to_cpu(entry->pointer.offset);
- uint64_t pointer = 0;
-
- dest = qfw_find_file(dev, entry->pointer.dest_file);
- if (!dest || !dest->addr)
- return -ENOENT;
- src = qfw_find_file(dev, entry->pointer.src_file);
- if (!src || !src->addr)
- return -ENOENT;
-
- debug("bios_linker_add_pointer: dest->addr 0x%lx, src->addr 0x%lx, offset 0x%x size %u, 0x%llx\n",
- dest->addr, src->addr, offset, entry->pointer.size, pointer);
-
- memcpy(&pointer, (char *)dest->addr + offset, entry->pointer.size);
- pointer = le64_to_cpu(pointer);
- pointer += (unsigned long)src->addr;
- pointer = cpu_to_le64(pointer);
- memcpy((char *)dest->addr + offset, &pointer, entry->pointer.size);
-
- return 0;
-}
-
-/*
- * This function updates checksum fields of ACPI tables previously loaded
- * by bios_linker_allocate()
- *
- * @entry : BIOS linker command entry which tells where to update ACPI table
- * checksums
- * @return: 0 on success, or negative value on failure
- */
-static int bios_linker_add_checksum(struct udevice *dev,
- struct bios_linker_entry *entry)
-{
- struct fw_file *file;
- uint8_t *data, cksum = 0;
- uint8_t *cksum_start;
-
- file = qfw_find_file(dev, entry->cksum.file);
- if (!file || !file->addr)
- return -ENOENT;
-
- data = (uint8_t *)(file->addr + le32_to_cpu(entry->cksum.offset));
- cksum_start = (uint8_t *)(file->addr + le32_to_cpu(entry->cksum.start));
- cksum = table_compute_checksum(cksum_start,
- le32_to_cpu(entry->cksum.length));
- *data = cksum;
-
- return 0;
-}
-
-/* This function loads and patches ACPI tables provided by QEMU */
-ulong write_acpi_tables(ulong addr)
-{
- int i, ret;
- struct fw_file *file;
- struct bios_linker_entry *table_loader;
- struct bios_linker_entry *entry;
- uint32_t size;
- struct udevice *dev;
-
- ret = qfw_get_dev(&dev);
- if (ret) {
- printf("error: no qfw\n");
- return addr;
- }
-
- /* make sure fw_list is loaded */
- ret = qfw_read_firmware_list(dev);
- if (ret) {
- printf("error: can't read firmware file list\n");
- return addr;
- }
-
- file = qfw_find_file(dev, "etc/table-loader");
- if (!file) {
- printf("error: can't find etc/table-loader\n");
- return addr;
- }
-
- size = be32_to_cpu(file->cfg.size);
- if ((size % sizeof(*entry)) != 0) {
- printf("error: table-loader maybe corrupted\n");
- return addr;
- }
-
- table_loader = malloc(size);
- if (!table_loader) {
- printf("error: no memory for table-loader\n");
- return addr;
- }
-
- /* QFW always puts tables at high addresses */
- gd->arch.table_start_high = (ulong)table_loader;
- gd->arch.table_end_high = (ulong)table_loader;
-
- qfw_read_entry(dev, be16_to_cpu(file->cfg.select), size, table_loader);
-
- for (i = 0; i < (size / sizeof(*entry)); i++) {
- entry = table_loader + i;
- switch (le32_to_cpu(entry->command)) {
- case BIOS_LINKER_LOADER_COMMAND_ALLOCATE:
- ret = bios_linker_allocate(dev, entry, &addr);
- if (ret)
- goto out;
- break;
- case BIOS_LINKER_LOADER_COMMAND_ADD_POINTER:
- ret = bios_linker_add_pointer(dev, entry);
- if (ret)
- goto out;
- break;
- case BIOS_LINKER_LOADER_COMMAND_ADD_CHECKSUM:
- ret = bios_linker_add_checksum(dev, entry);
- if (ret)
- goto out;
- break;
- default:
- break;
- }
- }
-
-out:
- if (ret) {
- struct fw_cfg_file_iter iter;
- for (file = qfw_file_iter_init(dev, &iter);
- !qfw_file_iter_end(&iter);
- file = qfw_file_iter_next(&iter)) {
- if (file->addr) {
- free((void *)file->addr);
- file->addr = 0;
- }
- }
- }
-
- free(table_loader);
-
- gd_set_acpi_start(acpi_get_rsdp_addr());
-
- return addr;
-}
-
-ulong acpi_get_rsdp_addr(void)
-{
- int ret;
- struct fw_file *file;
- struct udevice *dev;
-
- ret = qfw_get_dev(&dev);
- if (ret) {
- printf("error: no qfw\n");
- return 0;
- }
-
- file = qfw_find_file(dev, "etc/acpi/rsdp");
- return file->addr;
-}
-#endif
-
static void qfw_read_entry_io(struct qfw_dev *qdev, u16 entry, u32 size,
void *address)
{
diff --git a/drivers/misc/qfw_acpi.c b/drivers/misc/qfw_acpi.c
new file mode 100644
index 0000000..7ffed1e
--- /dev/null
+++ b/drivers/misc/qfw_acpi.c
@@ -0,0 +1,281 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2015 Miao Yan <yanmiaobest@gmail.com>
+ * (C) Copyright 2021 Asherah Connor <ashe@kivikakk.ee>
+ */
+
+#define LOG_CATEGORY UCLASS_QFW
+
+#include <acpi/acpi_table.h>
+#include <errno.h>
+#include <malloc.h>
+#include <mapmem.h>
+#include <qfw.h>
+#include <tables_csum.h>
+#include <stdio.h>
+#include <linux/sizes.h>
+#include <asm/byteorder.h>
+#include <asm/global_data.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/*
+ * This function allocates memory for ACPI tables
+ *
+ * @entry : BIOS linker command entry which tells where to allocate memory
+ * (either high memory or low memory)
+ * @addr : The address that should be used for low memory allcation. If the
+ * memory allocation request is 'ZONE_HIGH' then this parameter will
+ * be ignored.
+ * @return: 0 on success, or negative value on failure
+ */
+static int bios_linker_allocate(struct udevice *dev,
+ struct bios_linker_entry *entry, ulong *addr)
+{
+ uint32_t size, align;
+ struct fw_file *file;
+ unsigned long aligned_addr;
+
+ align = le32_to_cpu(entry->alloc.align);
+ /* align must be power of 2 */
+ if (align & (align - 1)) {
+ printf("error: wrong alignment %u\n", align);
+ return -EINVAL;
+ }
+
+ file = qfw_find_file(dev, entry->alloc.file);
+ if (!file) {
+ printf("error: can't find file %s\n", entry->alloc.file);
+ return -ENOENT;
+ }
+
+ size = be32_to_cpu(file->cfg.size);
+
+ /*
+ * ZONE_HIGH means we need to allocate from high memory, since
+ * malloc space is already at the end of RAM, so we directly use it.
+ * If allocation zone is ZONE_FSEG, then we use the 'addr' passed
+ * in which is low memory
+ */
+ if (entry->alloc.zone == BIOS_LINKER_LOADER_ALLOC_ZONE_HIGH) {
+ aligned_addr = (unsigned long)memalign(align, size);
+ if (!aligned_addr) {
+ printf("error: allocating resource\n");
+ return -ENOMEM;
+ }
+ if (aligned_addr < gd->arch.table_start_high)
+ gd->arch.table_start_high = aligned_addr;
+ if (aligned_addr + size > gd->arch.table_end_high)
+ gd->arch.table_end_high = aligned_addr + size;
+
+ } else if (entry->alloc.zone == BIOS_LINKER_LOADER_ALLOC_ZONE_FSEG) {
+ aligned_addr = ALIGN(*addr, align);
+ } else {
+ printf("error: invalid allocation zone\n");
+ return -EINVAL;
+ }
+
+ debug("bios_linker_allocate: allocate file %s, size %u, zone %d, align %u, addr 0x%lx\n",
+ file->cfg.name, size, entry->alloc.zone, align, aligned_addr);
+
+ qfw_read_entry(dev, be16_to_cpu(file->cfg.select), size,
+ (void *)aligned_addr);
+ file->addr = aligned_addr;
+
+ /* adjust address for low memory allocation */
+ if (entry->alloc.zone == BIOS_LINKER_LOADER_ALLOC_ZONE_FSEG)
+ *addr = (aligned_addr + size);
+
+ return 0;
+}
+
+/*
+ * This function patches ACPI tables previously loaded
+ * by bios_linker_allocate()
+ *
+ * @entry : BIOS linker command entry which tells how to patch
+ * ACPI tables
+ * @return: 0 on success, or negative value on failure
+ */
+static int bios_linker_add_pointer(struct udevice *dev,
+ struct bios_linker_entry *entry)
+{
+ struct fw_file *dest, *src;
+ uint32_t offset = le32_to_cpu(entry->pointer.offset);
+ uint64_t pointer = 0;
+
+ dest = qfw_find_file(dev, entry->pointer.dest_file);
+ if (!dest || !dest->addr)
+ return -ENOENT;
+ src = qfw_find_file(dev, entry->pointer.src_file);
+ if (!src || !src->addr)
+ return -ENOENT;
+
+ debug("bios_linker_add_pointer: dest->addr 0x%lx, src->addr 0x%lx, offset 0x%x size %u, 0x%llx\n",
+ dest->addr, src->addr, offset, entry->pointer.size, pointer);
+
+ memcpy(&pointer, (char *)dest->addr + offset, entry->pointer.size);
+ pointer = le64_to_cpu(pointer);
+ pointer += (unsigned long)src->addr;
+ pointer = cpu_to_le64(pointer);
+ memcpy((char *)dest->addr + offset, &pointer, entry->pointer.size);
+
+ return 0;
+}
+
+/*
+ * This function updates checksum fields of ACPI tables previously loaded
+ * by bios_linker_allocate()
+ *
+ * @entry : BIOS linker command entry which tells where to update ACPI table
+ * checksums
+ * @return: 0 on success, or negative value on failure
+ */
+static int bios_linker_add_checksum(struct udevice *dev,
+ struct bios_linker_entry *entry)
+{
+ struct fw_file *file;
+ uint8_t *data, cksum = 0;
+ uint8_t *cksum_start;
+
+ file = qfw_find_file(dev, entry->cksum.file);
+ if (!file || !file->addr)
+ return -ENOENT;
+
+ data = (uint8_t *)(file->addr + le32_to_cpu(entry->cksum.offset));
+ cksum_start = (uint8_t *)(file->addr + le32_to_cpu(entry->cksum.start));
+ cksum = table_compute_checksum(cksum_start,
+ le32_to_cpu(entry->cksum.length));
+ *data = cksum;
+
+ return 0;
+}
+
+/* This function loads and patches ACPI tables provided by QEMU */
+ulong write_acpi_tables(ulong addr)
+{
+ int i, ret;
+ struct fw_file *file;
+ struct bios_linker_entry *table_loader;
+ struct bios_linker_entry *entry;
+ uint32_t size;
+ struct udevice *dev;
+
+ ret = qfw_get_dev(&dev);
+ if (ret) {
+ printf("error: no qfw\n");
+ return addr;
+ }
+
+ /* make sure fw_list is loaded */
+ ret = qfw_read_firmware_list(dev);
+ if (ret) {
+ printf("error: can't read firmware file list\n");
+ return addr;
+ }
+
+ file = qfw_find_file(dev, "etc/table-loader");
+ if (!file) {
+ printf("error: can't find etc/table-loader\n");
+ return addr;
+ }
+
+ size = be32_to_cpu(file->cfg.size);
+ if ((size % sizeof(*entry)) != 0) {
+ printf("error: table-loader maybe corrupted\n");
+ return addr;
+ }
+
+ table_loader = malloc(size);
+ if (!table_loader) {
+ printf("error: no memory for table-loader\n");
+ return addr;
+ }
+
+ /* QFW always puts tables at high addresses */
+ gd->arch.table_start_high = (ulong)table_loader;
+ gd->arch.table_end_high = (ulong)table_loader;
+
+ qfw_read_entry(dev, be16_to_cpu(file->cfg.select), size, table_loader);
+
+ for (i = 0; i < (size / sizeof(*entry)); i++) {
+ entry = table_loader + i;
+ switch (le32_to_cpu(entry->command)) {
+ case BIOS_LINKER_LOADER_COMMAND_ALLOCATE:
+ ret = bios_linker_allocate(dev, entry, &addr);
+ if (ret)
+ goto out;
+ break;
+ case BIOS_LINKER_LOADER_COMMAND_ADD_POINTER:
+ ret = bios_linker_add_pointer(dev, entry);
+ if (ret)
+ goto out;
+ break;
+ case BIOS_LINKER_LOADER_COMMAND_ADD_CHECKSUM:
+ ret = bios_linker_add_checksum(dev, entry);
+ if (ret)
+ goto out;
+ break;
+ default:
+ break;
+ }
+ }
+
+out:
+ if (ret) {
+ struct fw_cfg_file_iter iter;
+ for (file = qfw_file_iter_init(dev, &iter);
+ !qfw_file_iter_end(&iter);
+ file = qfw_file_iter_next(&iter)) {
+ if (file->addr) {
+ free((void *)file->addr);
+ file->addr = 0;
+ }
+ }
+ }
+
+ free(table_loader);
+
+ gd_set_acpi_start(acpi_get_rsdp_addr());
+
+ return addr;
+}
+
+ulong acpi_get_rsdp_addr(void)
+{
+ int ret;
+ struct fw_file *file;
+ struct udevice *dev;
+
+ ret = qfw_get_dev(&dev);
+ if (ret) {
+ printf("error: no qfw\n");
+ return 0;
+ }
+
+ file = qfw_find_file(dev, "etc/acpi/rsdp");
+ return file->addr;
+}
+
+#ifndef CONFIG_X86
+static int evt_write_acpi_tables(void)
+{
+ ulong addr, end;
+ void *ptr;
+
+ /* Reserve 64K for ACPI tables, aligned to a 4K boundary */
+ ptr = memalign(SZ_4K, SZ_64K);
+ if (!ptr)
+ return -ENOMEM;
+ addr = map_to_sysmem(ptr);
+
+ /* Generate ACPI tables */
+ end = write_acpi_tables(addr);
+ gd->arch.table_start = addr;
+ gd->arch.table_end = addr;
+
+ return 0;
+}
+
+EVENT_SPY_SIMPLE(EVT_LAST_STAGE_INIT, evt_write_acpi_tables);
+#endif
diff --git a/drivers/misc/qfw_smbios.c b/drivers/misc/qfw_smbios.c
new file mode 100644
index 0000000..a898cb4
--- /dev/null
+++ b/drivers/misc/qfw_smbios.c
@@ -0,0 +1,197 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * (C) Copyright 2023 Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
+ */
+
+#define LOG_CATEGORY UCLASS_QFW
+
+#include <efi_loader.h>
+#include <errno.h>
+#include <log.h>
+#include <malloc.h>
+#include <mapmem.h>
+#include <qfw.h>
+#include <smbios.h>
+#include <tables_csum.h>
+#include <linux/sizes.h>
+#include <asm/global_data.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/**
+ * qfw_load_smbios_table() - load a QEMU firmware file
+ *
+ * @dev: QEMU firmware device
+ * @size: parameter to return the size of the loaded table
+ * @name: name of the table to load
+ * Return: address of the loaded table, NULL on error
+ */
+static void *qfw_load_smbios_table(struct udevice *dev, uint32_t *size,
+ char *name)
+{
+ struct fw_file *file;
+ struct bios_linker_entry *table;
+
+ file = qfw_find_file(dev, name);
+ if (!file) {
+ log_debug("Can't find %s\n", name);
+ return NULL;
+ }
+
+ *size = be32_to_cpu(file->cfg.size);
+
+ table = malloc(*size);
+ if (!table) {
+ log_err("Out of memory\n");
+ return NULL;
+ }
+
+ qfw_read_entry(dev, be16_to_cpu(file->cfg.select), *size, table);
+
+ return table;
+}
+
+/**
+ * qfw_parse_smbios_anchor() - parse QEMU's SMBIOS anchor
+ *
+ * @dev: QEMU firmware device
+ * @entry: SMBIOS 3 structure to be filled from QEMU's anchor
+ * Return: 0 for success, -ve on error
+ */
+static int qfw_parse_smbios_anchor(struct udevice *dev,
+ struct smbios3_entry *entry)
+{
+ void *table;
+ uint32_t size;
+ struct smbios_entry *entry2;
+ struct smbios3_entry *entry3;
+ const char smbios_sig[] = "_SM_";
+ const char smbios3_sig[] = "_SM3_";
+ int ret = 0;
+
+ table = qfw_load_smbios_table(dev, &size, "etc/smbios/smbios-anchor");
+ if (!table)
+ return -ENOMEM;
+ if (!memcmp(table, smbios3_sig, sizeof(smbios3_sig) - 1)) {
+ entry3 = table;
+ if (entry3->length != sizeof(struct smbios3_entry)) {
+ ret = -ENOENT;
+ goto out;
+ }
+ memcpy(entry, entry3, sizeof(struct smbios3_entry));
+ } else if (!memcmp(table, smbios_sig, sizeof(smbios_sig) - 1)) {
+ entry2 = table;
+ if (entry2->length != sizeof(struct smbios_entry)) {
+ ret = -ENOENT;
+ goto out;
+ }
+ memset(entry, 0, sizeof(struct smbios3_entry));
+ memcpy(entry, smbios3_sig, sizeof(smbios3_sig));
+ entry->length = sizeof(struct smbios3_entry);
+ entry->major_ver = entry2->major_ver;
+ entry->minor_ver = entry2->minor_ver;
+ entry->max_struct_size = entry2->struct_table_length;
+ } else {
+ ret = -ENOENT;
+ goto out;
+ }
+ ret = 0;
+out:
+ free(table);
+
+ return ret;
+}
+
+/**
+ * qfw_write_smbios_tables() - copy SMBIOS tables from QEMU
+ *
+ * @addr: target buffer
+ * @size: size of target buffer
+ * Return: 0 for success, -ve on error
+ */
+static int qfw_write_smbios_tables(u8 *addr, uint32_t size)
+{
+ int ret;
+ struct udevice *dev;
+ struct smbios3_entry *entry = (void *)addr;
+ void *table;
+ uint32_t table_size;
+
+ ret = qfw_get_dev(&dev);
+ if (ret) {
+ log_err("No QEMU firmware device\n");
+ return ret;
+ }
+
+ ret = qfw_read_firmware_list(dev);
+ if (ret) {
+ log_err("Can't read firmware file list\n");
+ return ret;
+ }
+
+ ret = qfw_parse_smbios_anchor(dev, entry);
+ if (ret) {
+ log_debug("Can't parse anchor\n");
+ return ret;
+ }
+
+ addr += entry->length;
+ entry->struct_table_address = (uintptr_t)addr;
+ entry->checksum = 0;
+ entry->checksum = table_compute_checksum(entry,
+ sizeof(struct smbios3_entry));
+
+ table = qfw_load_smbios_table(dev, &table_size,
+ "etc/smbios/smbios-tables");
+ if (table_size + sizeof(struct smbios3_entry) > size) {
+ free(table);
+ return -ENOMEM;
+ }
+ memcpy(addr, table, table_size);
+ free(table);
+
+ return 0;
+}
+
+/**
+ * qfw_evt_write_smbios_tables() - event handler for copying QEMU SMBIOS tables
+ *
+ * Return: 0 on success, -ve on error (only out of memory)
+ */
+static int qfw_evt_write_smbios_tables(void)
+{
+ phys_addr_t addr;
+ void *ptr;
+ int ret;
+ /*
+ * TODO:
+ * This size is currently hard coded in lib/efi_loader/efi_smbios.c.
+ * We need a field in global data for the size.
+ */
+ uint32_t size = SZ_4K;
+
+ /* Reserve 64K for SMBIOS tables, aligned to a 4K boundary */
+ ptr = memalign(SZ_4K, size);
+ if (!ptr) {
+ log_err("Out of memory\n");
+ return -ENOMEM;
+ }
+ addr = map_to_sysmem(ptr);
+
+ /* Generate SMBIOS tables */
+ ret = qfw_write_smbios_tables(ptr, size);
+ if (ret) {
+ if (CONFIG_IS_ENABLED(GENERATE_SMBIOS_TABLE)) {
+ log_info("Falling back to U-Boot generated SMBIOS tables\n");
+ write_smbios_table(addr);
+ }
+ } else {
+ log_debug("SMBIOS tables copied from QEMU\n");
+ }
+
+ gd_set_smbios_start(addr);
+
+ return 0;
+}
+
+EVENT_SPY_SIMPLE(EVT_LAST_STAGE_INIT, qfw_evt_write_smbios_tables);
diff --git a/drivers/mmc/mtk-sd.c b/drivers/mmc/mtk-sd.c
index d21a30c..5a0c61d 100644
--- a/drivers/mmc/mtk-sd.c
+++ b/drivers/mmc/mtk-sd.c
@@ -1665,7 +1665,7 @@
if (cfg->f_max < cfg->f_min || cfg->f_max > host->src_clk_freq)
cfg->f_max = host->src_clk_freq;
- cfg->b_max = 1024;
+ cfg->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
cfg->voltages = MMC_VDD_32_33 | MMC_VDD_33_34;
host->mmc = &plat->mmc;
diff --git a/drivers/mmc/tegra_mmc.c b/drivers/mmc/tegra_mmc.c
index d507adb..c01fb3d 100644
--- a/drivers/mmc/tegra_mmc.c
+++ b/drivers/mmc/tegra_mmc.c
@@ -698,7 +698,7 @@
* (actually 52MHz)
*/
cfg->f_min = 375000;
- cfg->f_max = 48000000;
+ cfg->f_max = dev_read_u32_default(dev, "max-frequency", 48000000);
cfg->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
diff --git a/drivers/mtd/Kconfig b/drivers/mtd/Kconfig
index c56840c..4fdc964 100644
--- a/drivers/mtd/Kconfig
+++ b/drivers/mtd/Kconfig
@@ -9,6 +9,8 @@
Enable the MTD stack, necessary to interact with NAND, NOR,
SPI-NOR, SPI-NAND, OneNAND, etc.
+if MTD
+
config DM_MTD
bool "Enable Driver Model for MTD drivers"
depends on DM
@@ -24,7 +26,6 @@
config MTD_CONCAT
bool "Enable MTD device concatenation"
- depends on MTD
help
Enable support for concatenating multiple physical MTD devices
into a single logical device. The larger logical device can then
@@ -32,7 +33,6 @@
config SYS_MTDPARTS_RUNTIME
bool "Allow MTDPARTS to be configured at runtime"
- depends on MTD
help
This option allows to call the function board_mtdparts_default to
dynamically build the variables mtdids and mtdparts at runtime.
@@ -272,4 +272,6 @@
source "drivers/mtd/nvmxip/Kconfig"
+endif
+
endmenu
diff --git a/drivers/mtd/nand/raw/atmel/nand-controller.c b/drivers/mtd/nand/raw/atmel/nand-controller.c
index 5c0265c..a2151f9 100644
--- a/drivers/mtd/nand/raw/atmel/nand-controller.c
+++ b/drivers/mtd/nand/raw/atmel/nand-controller.c
@@ -351,40 +351,6 @@
return ret;
}
-static void iowrite8_rep(void *addr, const uint8_t *buf, int len)
-{
- int i;
-
- for (i = 0; i < len; i++)
- writeb(buf[i], addr);
-}
-
-static void ioread8_rep(void *addr, uint8_t *buf, int len)
-{
- int i;
-
- for (i = 0; i < len; i++)
- buf[i] = readb(addr);
-}
-
-static void ioread16_rep(void *addr, void *buf, int len)
-{
- int i;
- u16 *p = (u16 *)buf;
-
- for (i = 0; i < len; i++)
- p[i] = readw(addr);
-}
-
-static void iowrite16_rep(void *addr, const void *buf, int len)
-{
- int i;
- u16 *p = (u16 *)buf;
-
- for (i = 0; i < len; i++)
- writew(p[i], addr);
-}
-
static u8 atmel_nand_read_byte(struct mtd_info *mtd)
{
struct nand_chip *chip = mtd_to_nand(mtd);
diff --git a/drivers/mtd/nand/raw/nand.c b/drivers/mtd/nand/raw/nand.c
index 4c18861..b591170 100644
--- a/drivers/mtd/nand/raw/nand.c
+++ b/drivers/mtd/nand/raw/nand.c
@@ -41,8 +41,11 @@
{
int i;
+ if (!mtd)
+ return -ENODEV;
+
for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++) {
- if (mtd && get_nand_dev_by_index(i) == mtd)
+ if (get_nand_dev_by_index(i) == mtd)
return i;
}
@@ -52,7 +55,7 @@
/* Register an initialized NAND mtd device with the U-Boot NAND command. */
int nand_register(int devnum, struct mtd_info *mtd)
{
- if (devnum >= CONFIG_SYS_MAX_NAND_DEVICE)
+ if (!mtd || devnum >= CONFIG_SYS_MAX_NAND_DEVICE)
return -EINVAL;
nand_info[devnum] = mtd;
diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c
index 44b6cb6..c40a0f2 100644
--- a/drivers/mtd/nand/raw/nand_base.c
+++ b/drivers/mtd/nand/raw/nand_base.c
@@ -245,39 +245,6 @@
chip->write_buf(mtd, (uint8_t *)&word, 2);
}
-static void iowrite8_rep(void *addr, const uint8_t *buf, int len)
-{
- int i;
-
- for (i = 0; i < len; i++)
- writeb(buf[i], addr);
-}
-static void ioread8_rep(void *addr, uint8_t *buf, int len)
-{
- int i;
-
- for (i = 0; i < len; i++)
- buf[i] = readb(addr);
-}
-
-static void ioread16_rep(void *addr, void *buf, int len)
-{
- int i;
- u16 *p = (u16 *) buf;
-
- for (i = 0; i < len; i++)
- p[i] = readw(addr);
-}
-
-static void iowrite16_rep(void *addr, void *buf, int len)
-{
- int i;
- u16 *p = (u16 *) buf;
-
- for (i = 0; i < len; i++)
- writew(p[i], addr);
-}
-
/**
* nand_write_buf - [DEFAULT] write buffer to chip
* @mtd: MTD device structure
diff --git a/drivers/mtd/nand/raw/omap_elm.c b/drivers/mtd/nand/raw/omap_elm.c
index 56a2c39..015ec9b 100644
--- a/drivers/mtd/nand/raw/omap_elm.c
+++ b/drivers/mtd/nand/raw/omap_elm.c
@@ -185,7 +185,6 @@
;
}
-#ifdef ELM_BASE
/**
* elm_init - Initialize ELM module
*
@@ -194,10 +193,11 @@
*/
void elm_init(void)
{
+#ifdef ELM_BASE
elm_cfg = (struct elm *)ELM_BASE;
elm_reset();
-}
#endif
+}
#if CONFIG_IS_ENABLED(SYS_NAND_SELF_INIT)
diff --git a/drivers/mtd/nand/raw/omap_elm.h b/drivers/mtd/nand/raw/omap_elm.h
index a7f7bac..f3db00d 100644
--- a/drivers/mtd/nand/raw/omap_elm.h
+++ b/drivers/mtd/nand/raw/omap_elm.h
@@ -74,12 +74,6 @@
u32 *error_locations);
int elm_config(enum bch_level level);
void elm_reset(void);
-#ifdef ELM_BASE
void elm_init(void);
-#else
-static inline void elm_init(void)
-{
-}
-#endif
#endif /* __ASSEMBLY__ */
#endif /* __ASM_ARCH_ELM_H */
diff --git a/drivers/mtd/nand/raw/omap_gpmc.c b/drivers/mtd/nand/raw/omap_gpmc.c
index 0e25bd5..2f8fa7d 100644
--- a/drivers/mtd/nand/raw/omap_gpmc.c
+++ b/drivers/mtd/nand/raw/omap_gpmc.c
@@ -8,13 +8,15 @@
#include <log.h>
#include <system-constants.h>
#include <asm/io.h>
-#include <dm/uclass.h>
+#include <dm.h>
#include <linux/errno.h>
#ifdef CONFIG_ARCH_OMAP2PLUS
#include <asm/arch/mem.h>
#endif
+#include <linux/io.h>
+#include <linux/ioport.h>
#include <linux/mtd/omap_gpmc.h>
#include <linux/mtd/nand_ecc.h>
#include <linux/mtd/rawnand.h>
@@ -294,7 +296,7 @@
break;
case OMAP_ECC_BCH8_CODE_HW:
bch_type = 1;
- nsectors = chip->ecc.steps;
+ nsectors = 1;
if (mode == NAND_ECC_READ) {
wr_mode = BCH_WRAPMODE_1;
ecc_size0 = BCH8R_ECC_SIZE0;
@@ -307,7 +309,7 @@
break;
case OMAP_ECC_BCH16_CODE_HW:
bch_type = 0x2;
- nsectors = chip->ecc.steps;
+ nsectors = 1;
if (mode == NAND_ECC_READ) {
wr_mode = 0x01;
ecc_size0 = 52; /* ECC bits in nibbles per sector */
@@ -346,17 +348,16 @@
}
/**
- * _omap_calculate_ecc_bch - Generate BCH ECC bytes for one sector
+ * omap_calculate_ecc_bch - Generate BCH ECC bytes for one sector
* @mtd: MTD device structure
* @dat: The pointer to data on which ecc is computed
* @ecc_code: The ecc_code buffer
- * @sector: The sector number (for a multi sector page)
*
* Support calculating of BCH4/8/16 ECC vectors for one sector
* within a page. Sector number is in @sector.
*/
-static int _omap_calculate_ecc_bch(struct mtd_info *mtd, const u8 *dat,
- u8 *ecc_code, int sector)
+static int __maybe_unused omap_calculate_ecc_bch(struct mtd_info *mtd, const u8 *dat,
+ u8 *ecc_code)
{
struct nand_chip *chip = mtd_to_nand(mtd);
struct omap_nand_info *info = nand_get_controller_data(chip);
@@ -369,7 +370,7 @@
case OMAP_ECC_BCH8_CODE_HW_DETECTION_SW:
#endif
case OMAP_ECC_BCH8_CODE_HW:
- ptr = &gpmc_cfg->bch_result_0_3[sector].bch_result_x[3];
+ ptr = &gpmc_cfg->bch_result_0_3[0].bch_result_x[3];
val = readl(ptr);
ecc_code[i++] = (val >> 0) & 0xFF;
ptr--;
@@ -384,21 +385,21 @@
break;
case OMAP_ECC_BCH16_CODE_HW:
- val = readl(&gpmc_cfg->bch_result_4_6[sector].bch_result_x[2]);
+ val = readl(&gpmc_cfg->bch_result_4_6[0].bch_result_x[2]);
ecc_code[i++] = (val >> 8) & 0xFF;
ecc_code[i++] = (val >> 0) & 0xFF;
- val = readl(&gpmc_cfg->bch_result_4_6[sector].bch_result_x[1]);
+ val = readl(&gpmc_cfg->bch_result_4_6[0].bch_result_x[1]);
ecc_code[i++] = (val >> 24) & 0xFF;
ecc_code[i++] = (val >> 16) & 0xFF;
ecc_code[i++] = (val >> 8) & 0xFF;
ecc_code[i++] = (val >> 0) & 0xFF;
- val = readl(&gpmc_cfg->bch_result_4_6[sector].bch_result_x[0]);
+ val = readl(&gpmc_cfg->bch_result_4_6[0].bch_result_x[0]);
ecc_code[i++] = (val >> 24) & 0xFF;
ecc_code[i++] = (val >> 16) & 0xFF;
ecc_code[i++] = (val >> 8) & 0xFF;
ecc_code[i++] = (val >> 0) & 0xFF;
for (j = 3; j >= 0; j--) {
- val = readl(&gpmc_cfg->bch_result_0_3[sector].bch_result_x[j]
+ val = readl(&gpmc_cfg->bch_result_0_3[0].bch_result_x[j]
);
ecc_code[i++] = (val >> 24) & 0xFF;
ecc_code[i++] = (val >> 16) & 0xFF;
@@ -432,22 +433,6 @@
return 0;
}
-/**
- * omap_calculate_ecc_bch - ECC generator for 1 sector
- * @mtd: MTD device structure
- * @dat: The pointer to data on which ecc is computed
- * @ecc_code: The ecc_code buffer
- *
- * Support calculating of BCH4/8/16 ECC vectors for one sector. This is used
- * when SW based correction is required as ECC is required for one sector
- * at a time.
- */
-static int __maybe_unused omap_calculate_ecc_bch(struct mtd_info *mtd,
- const u_char *dat, u_char *ecc_calc)
-{
- return _omap_calculate_ecc_bch(mtd, dat, ecc_calc, 0);
-}
-
static inline void omap_nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
{
struct nand_chip *chip = mtd_to_nand(mtd);
@@ -573,34 +558,6 @@
#ifdef CONFIG_NAND_OMAP_ELM
-/**
- * omap_calculate_ecc_bch_multi - Generate ECC for multiple sectors
- * @mtd: MTD device structure
- * @dat: The pointer to data on which ecc is computed
- * @ecc_code: The ecc_code buffer
- *
- * Support calculating of BCH4/8/16 ecc vectors for the entire page in one go.
- */
-static int omap_calculate_ecc_bch_multi(struct mtd_info *mtd,
- const u_char *dat, u_char *ecc_calc)
-{
- struct nand_chip *chip = mtd_to_nand(mtd);
- int eccbytes = chip->ecc.bytes;
- unsigned long nsectors;
- int i, ret;
-
- nsectors = ((readl(&gpmc_cfg->ecc_config) >> 4) & 0x7) + 1;
- for (i = 0; i < nsectors; i++) {
- ret = _omap_calculate_ecc_bch(mtd, dat, ecc_calc, i);
- if (ret)
- return ret;
-
- ecc_calc += eccbytes;
- }
-
- return 0;
-}
-
/*
* omap_reverse_list - re-orders list elements in reverse order [internal]
* @list: pointer to start of list
@@ -753,7 +710,6 @@
{
int i, eccsize = chip->ecc.size;
int eccbytes = chip->ecc.bytes;
- int ecctotal = chip->ecc.total;
int eccsteps = chip->ecc.steps;
uint8_t *p = buf;
uint8_t *ecc_calc = chip->buffers->ecccalc;
@@ -761,24 +717,30 @@
uint32_t *eccpos = chip->ecc.layout->eccpos;
uint8_t *oob = chip->oob_poi;
uint32_t oob_pos;
+ u32 data_pos = 0;
/* oob area start */
oob_pos = (eccsize * eccsteps) + chip->ecc.layout->eccpos[0];
oob += chip->ecc.layout->eccpos[0];
- /* Enable ECC engine */
- chip->ecc.hwctl(mtd, NAND_ECC_READ);
+ for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize,
+ oob += eccbytes) {
+ /* Enable ECC engine */
+ chip->ecc.hwctl(mtd, NAND_ECC_READ);
- /* read entire page */
- chip->cmdfunc(mtd, NAND_CMD_RNDOUT, 0, -1);
- chip->read_buf(mtd, buf, mtd->writesize);
+ /* read data */
+ chip->cmdfunc(mtd, NAND_CMD_RNDOUT, data_pos, -1);
+ chip->read_buf(mtd, p, eccsize);
- /* read all ecc bytes from oob area */
- chip->cmdfunc(mtd, NAND_CMD_RNDOUT, oob_pos, -1);
- chip->read_buf(mtd, oob, ecctotal);
+ /* read respective ecc from oob area */
+ chip->cmdfunc(mtd, NAND_CMD_RNDOUT, oob_pos, -1);
+ chip->read_buf(mtd, oob, eccbytes);
+ /* read syndrome */
+ chip->ecc.calculate(mtd, p, &ecc_calc[i]);
- /* Calculate ecc bytes */
- omap_calculate_ecc_bch_multi(mtd, buf, ecc_calc);
+ data_pos += eccsize;
+ oob_pos += eccbytes;
+ }
for (i = 0; i < chip->ecc.total; i++)
ecc_code[i] = chip->oob_poi[eccpos[i]];
@@ -946,6 +908,7 @@
nand->ecc.hwctl = omap_enable_hwecc_bch;
nand->ecc.correct = omap_correct_data_bch_sw;
nand->ecc.calculate = omap_calculate_ecc_bch;
+ nand->ecc.steps = eccsteps;
/* define ecc-layout */
ecclayout->eccbytes = nand->ecc.bytes * eccsteps;
ecclayout->eccpos[0] = BADBLOCK_MARKER_LENGTH;
@@ -988,6 +951,7 @@
nand->ecc.correct = omap_correct_data_bch;
nand->ecc.calculate = omap_calculate_ecc_bch;
nand->ecc.read_page = omap_read_page_bch;
+ nand->ecc.steps = eccsteps;
/* define ecc-layout */
ecclayout->eccbytes = nand->ecc.bytes * eccsteps;
for (i = 0; i < ecclayout->eccbytes; i++)
@@ -1021,6 +985,7 @@
nand->ecc.correct = omap_correct_data_bch;
nand->ecc.calculate = omap_calculate_ecc_bch;
nand->ecc.read_page = omap_read_page_bch;
+ nand->ecc.steps = eccsteps;
/* define ecc-layout */
ecclayout->eccbytes = nand->ecc.bytes * eccsteps;
for (i = 0; i < ecclayout->eccbytes; i++)
@@ -1124,7 +1089,7 @@
* nand_scan about special functionality. See the defines for further
* explanation
*/
-int gpmc_nand_init(struct nand_chip *nand)
+int gpmc_nand_init(struct nand_chip *nand, void __iomem *nand_base)
{
int32_t gpmc_config = 0;
int cs = cs_next++;
@@ -1164,7 +1129,7 @@
info->control = NULL;
info->cs = cs;
info->ws = wscfg[cs];
- info->fifo = (void __iomem *)CFG_SYS_NAND_BASE;
+ info->fifo = nand_base;
nand_set_controller_data(nand, &omap_nand_info[cs]);
nand->cmd_ctrl = omap_nand_hwcontrol;
nand->options |= NAND_NO_PADDING | NAND_CACHEPRG;
@@ -1214,9 +1179,18 @@
{
struct nand_chip *nand = dev_get_priv(dev);
struct mtd_info *mtd = nand_to_mtd(nand);
+ struct resource res;
+ void __iomem *base;
int ret;
- gpmc_nand_init(nand);
+ ret = dev_read_resource(dev, 0, &res);
+ if (ret)
+ return ret;
+
+ base = devm_ioremap(dev, res.start, resource_size(&res));
+ gpmc_nand_init(nand, base);
+ mtd->dev = dev;
+ nand_set_flash_node(nand, dev_ofnode(dev));
ret = nand_scan(mtd, CONFIG_SYS_NAND_MAX_CHIPS);
if (ret)
@@ -1270,7 +1244,7 @@
int board_nand_init(struct nand_chip *nand)
{
- return gpmc_nand_init(nand);
+ return gpmc_nand_init(nand, (void __iomem *)CFG_SYS_NAND_BASE);
}
#endif /* CONFIG_SYS_NAND_SELF_INIT */
diff --git a/drivers/mtd/nand/spi/Makefile b/drivers/mtd/nand/spi/Makefile
index 3051de4..f172f47 100644
--- a/drivers/mtd/nand/spi/Makefile
+++ b/drivers/mtd/nand/spi/Makefile
@@ -1,4 +1,5 @@
# SPDX-License-Identifier: GPL-2.0
-spinand-objs := core.o gigadevice.o macronix.o micron.o paragon.o toshiba.o winbond.o
+spinand-objs := core.o esmt.o gigadevice.o macronix.o micron.o paragon.o
+spinand-objs += toshiba.o winbond.o
obj-$(CONFIG_MTD_SPI_NAND) += spinand.o
diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c
index 597b088..8ca3345 100644
--- a/drivers/mtd/nand/spi/core.c
+++ b/drivers/mtd/nand/spi/core.c
@@ -828,6 +828,7 @@
¶gon_spinand_manufacturer,
&toshiba_spinand_manufacturer,
&winbond_spinand_manufacturer,
+ &esmt_c8_spinand_manufacturer,
};
static int spinand_manufacturer_match(struct spinand_device *spinand,
diff --git a/drivers/mtd/nand/spi/esmt.c b/drivers/mtd/nand/spi/esmt.c
new file mode 100644
index 0000000..7e07b26
--- /dev/null
+++ b/drivers/mtd/nand/spi/esmt.c
@@ -0,0 +1,137 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Author:
+ * Chuanhong Guo <gch981213@gmail.com> - the main driver logic
+ * Martin Kurbanov <mmkurbanov@sberdevices.ru> - OOB layout
+ */
+
+#ifndef __UBOOT__
+#include <linux/device.h>
+#include <linux/kernel.h>
+#endif
+#include <linux/mtd/spinand.h>
+
+/* ESMT uses GigaDevice 0xc8 JECDEC ID on some SPI NANDs */
+#define SPINAND_MFR_ESMT_C8 0xc8
+
+static SPINAND_OP_VARIANTS(read_cache_variants,
+ SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
+ SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
+ SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
+ SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
+
+static SPINAND_OP_VARIANTS(write_cache_variants,
+ SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
+ SPINAND_PROG_LOAD(true, 0, NULL, 0));
+
+static SPINAND_OP_VARIANTS(update_cache_variants,
+ SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
+ SPINAND_PROG_LOAD(false, 0, NULL, 0));
+
+/*
+ * OOB spare area map (64 bytes)
+ *
+ * Bad Block Markers
+ * filled by HW and kernel Reserved
+ * | +-----------------------+-----------------------+
+ * | | | |
+ * | | OOB free data Area |non ECC protected |
+ * | +-------------|-----+-----------------|-----+-----------------|-----+
+ * | | | | | | | |
+ * +-|---|----------+--|-----|--------------+--|-----|--------------+--|-----|--------------+
+ * | | | section0 | | | section1 | | | section2 | | | section3 |
+ * +-v-+-v-+---+----+--v--+--v--+-----+-----+--v--+--v--+-----+-----+--v--+--v--+-----+-----+
+ * | | | | | | | | | | | | | | | | |
+ * |0:1|2:3|4:7|8:15|16:17|18:19|20:23|24:31|32:33|34:35|36:39|40:47|48:49|50:51|52:55|56:63|
+ * | | | | | | | | | | | | | | | | |
+ * +---+---+-^-+--^-+-----+-----+--^--+--^--+-----+-----+--^--+--^--+-----+-----+--^--+--^--+
+ * | | | | | | | |
+ * | +----------------|-----+-----------------|-----+-----------------|-----+
+ * | ECC Area|(Main + Spare) - filled|by ESMT NAND HW |
+ * | | | |
+ * +---------------------+-----------------------+-----------------------+
+ * OOB ECC protected Area - not used due to
+ * partial programming from some filesystems
+ * (like JFFS2 with cleanmarkers)
+ */
+
+#define ESMT_OOB_SECTION_COUNT 4
+#define ESMT_OOB_SECTION_SIZE(nand) \
+ (nanddev_per_page_oobsize(nand) / ESMT_OOB_SECTION_COUNT)
+#define ESMT_OOB_FREE_SIZE(nand) \
+ (ESMT_OOB_SECTION_SIZE(nand) / 2)
+#define ESMT_OOB_ECC_SIZE(nand) \
+ (ESMT_OOB_SECTION_SIZE(nand) - ESMT_OOB_FREE_SIZE(nand))
+#define ESMT_OOB_BBM_SIZE 2
+
+static int f50l1g41lb_ooblayout_ecc(struct mtd_info *mtd, int section,
+ struct mtd_oob_region *region)
+{
+ struct nand_device *nand = mtd_to_nanddev(mtd);
+
+ if (section >= ESMT_OOB_SECTION_COUNT)
+ return -ERANGE;
+
+ region->offset = section * ESMT_OOB_SECTION_SIZE(nand) +
+ ESMT_OOB_FREE_SIZE(nand);
+ region->length = ESMT_OOB_ECC_SIZE(nand);
+
+ return 0;
+}
+
+static int f50l1g41lb_ooblayout_free(struct mtd_info *mtd, int section,
+ struct mtd_oob_region *region)
+{
+ struct nand_device *nand = mtd_to_nanddev(mtd);
+
+ if (section >= ESMT_OOB_SECTION_COUNT)
+ return -ERANGE;
+
+ /*
+ * Reserve space for bad blocks markers (section0) and
+ * reserved bytes (sections 1-3)
+ */
+ region->offset = section * ESMT_OOB_SECTION_SIZE(nand) + 2;
+
+ /* Use only 2 non-protected ECC bytes per each OOB section */
+ region->length = 2;
+
+ return 0;
+}
+
+static const struct mtd_ooblayout_ops f50l1g41lb_ooblayout = {
+ .ecc = f50l1g41lb_ooblayout_ecc,
+ .rfree = f50l1g41lb_ooblayout_free,
+};
+
+static const struct spinand_info esmt_c8_spinand_table[] = {
+ SPINAND_INFO("F50L1G41LB",
+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x01),
+ NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
+ NAND_ECCREQ(1, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ 0,
+ SPINAND_ECCINFO(&f50l1g41lb_ooblayout, NULL)),
+ SPINAND_INFO("F50D1G41LB",
+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x11),
+ NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
+ NAND_ECCREQ(1, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ 0,
+ SPINAND_ECCINFO(&f50l1g41lb_ooblayout, NULL)),
+};
+
+static const struct spinand_manufacturer_ops esmt_spinand_manuf_ops = {
+};
+
+const struct spinand_manufacturer esmt_c8_spinand_manufacturer = {
+ .id = SPINAND_MFR_ESMT_C8,
+ .name = "ESMT",
+ .chips = esmt_c8_spinand_table,
+ .nchips = ARRAY_SIZE(esmt_c8_spinand_table),
+ .ops = &esmt_spinand_manuf_ops,
+};
diff --git a/drivers/mtd/spi/Kconfig b/drivers/mtd/spi/Kconfig
index 732b076..d068b78 100644
--- a/drivers/mtd/spi/Kconfig
+++ b/drivers/mtd/spi/Kconfig
@@ -176,6 +176,11 @@
help
Add support for various Macronix SPI flash chips (MX25Lxxx)
+config SPI_FLASH_SILICONKAISER
+ bool "Silicon Kaiser SPI flash support"
+ help
+ Add support for various Silicon Kaiser SPI flash chips (SK25Lxxx)
+
config SPI_FLASH_SPANSION
bool "Spansion SPI flash support"
help
@@ -224,6 +229,11 @@
Add support for various XTX (XTX Technology Limited)
SPI flash chips (XT25xxx).
+config SPI_FLASH_ZBIT
+ bool "ZBIT SPI flash support"
+ help
+ Add support for Zbit Semiconductor Inc. SPI flash chips (ZB25xxx).
+
endif
config SPI_FLASH_USE_4K_SECTORS
diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
index 9a1801b..f86003c 100644
--- a/drivers/mtd/spi/spi-nor-core.c
+++ b/drivers/mtd/spi/spi-nor-core.c
@@ -331,18 +331,42 @@
u8 *val)
{
struct spi_mem_op op =
- SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RDAR, 1),
- SPI_MEM_OP_ADDR(nor->addr_mode_nbytes, addr, 1),
- SPI_MEM_OP_DUMMY(dummy / 8, 1),
- SPI_MEM_OP_DATA_IN(1, NULL, 1));
+ SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RD_ANY_REG, 0),
+ SPI_MEM_OP_ADDR(nor->addr_mode_nbytes, addr, 0),
+ SPI_MEM_OP_DUMMY(dummy, 0),
+ SPI_MEM_OP_DATA_IN(1, NULL, 0));
+ u8 buf[2];
+ int ret;
- return spi_nor_read_write_reg(nor, &op, val);
+ spi_nor_setup_op(nor, &op, nor->reg_proto);
+
+ /*
+ * In Octal DTR mode, the number of address bytes is always 4 regardless
+ * of addressing mode setting.
+ */
+ if (nor->reg_proto == SNOR_PROTO_8_8_8_DTR)
+ op.addr.nbytes = 4;
+
+ /*
+ * We don't want to read only one byte in DTR mode. So, read 2 and then
+ * discard the second byte.
+ */
+ if (spi_nor_protocol_is_dtr(nor->reg_proto))
+ op.data.nbytes = 2;
+
+ ret = spi_nor_read_write_reg(nor, &op, buf);
+ if (ret)
+ return ret;
+
+ *val = buf[0];
+
+ return 0;
}
static int spansion_write_any_reg(struct spi_nor *nor, u32 addr, u8 val)
{
struct spi_mem_op op =
- SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_WRAR, 1),
+ SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_WR_ANY_REG, 1),
SPI_MEM_OP_ADDR(nor->addr_mode_nbytes, addr, 1),
SPI_MEM_OP_NO_DUMMY,
SPI_MEM_OP_DATA_OUT(1, NULL, 1));
@@ -714,7 +738,7 @@
*/
static int spansion_sr_ready(struct spi_nor *nor, u32 addr_base, u8 dummy)
{
- u32 reg_addr = addr_base + SPINOR_REG_ADDR_STR1V;
+ u32 reg_addr = addr_base + SPINOR_REG_CYPRESS_STR1V;
u8 sr;
int ret;
@@ -728,7 +752,7 @@
else
dev_dbg(nor->dev, "Programming Error occurred\n");
- nor->write_reg(nor, SPINOR_OP_CLSR, NULL, 0);
+ nor->write_reg(nor, SPINOR_OP_CYPRESS_CLPEF, NULL, 0);
return -EIO;
}
@@ -1856,7 +1880,7 @@
static int spansion_quad_enable_volatile(struct spi_nor *nor, u32 addr_base,
u8 dummy)
{
- u32 addr = addr_base + SPINOR_REG_ADDR_CFR1V;
+ u32 addr = addr_base + SPINOR_REG_CYPRESS_CFR1V;
u8 cr;
int ret;
@@ -2089,6 +2113,36 @@
return ret;
}
+/**
+ * spi_nor_read_sfdp_dma_unsafe() - read Serial Flash Discoverable Parameters.
+ * @nor: pointer to a 'struct spi_nor'
+ * @addr: offset in the SFDP area to start reading data from
+ * @len: number of bytes to read
+ * @buf: buffer where the SFDP data are copied into
+ *
+ * Wrap spi_nor_read_sfdp() using a kmalloc'ed bounce buffer as @buf is now not
+ * guaranteed to be dma-safe.
+ *
+ * Return: -ENOMEM if kmalloc() fails, the return code of spi_nor_read_sfdp()
+ * otherwise.
+ */
+static int spi_nor_read_sfdp_dma_unsafe(struct spi_nor *nor, u32 addr,
+ size_t len, void *buf)
+{
+ void *dma_safe_buf;
+ int ret;
+
+ dma_safe_buf = kmalloc(len, GFP_KERNEL);
+ if (!dma_safe_buf)
+ return -ENOMEM;
+
+ ret = spi_nor_read_sfdp(nor, addr, len, dma_safe_buf);
+ memcpy(buf, dma_safe_buf, len);
+ kfree(dma_safe_buf);
+
+ return ret;
+}
+
/* Fast Read settings. */
static void
@@ -2262,7 +2316,7 @@
bfpt_header->length * sizeof(u32));
addr = SFDP_PARAM_HEADER_PTP(bfpt_header);
memset(&bfpt, 0, sizeof(bfpt));
- err = spi_nor_read_sfdp(nor, addr, len, &bfpt);
+ err = spi_nor_read_sfdp_dma_unsafe(nor, addr, len, &bfpt);
if (err < 0)
return err;
@@ -2588,7 +2642,7 @@
int i, err;
/* Get the SFDP header. */
- err = spi_nor_read_sfdp(nor, 0, sizeof(header), &header);
+ err = spi_nor_read_sfdp_dma_unsafe(nor, 0, sizeof(header), &header);
if (err < 0)
return err;
@@ -3263,11 +3317,11 @@
* Read CR3V to check if uniform sector is selected. If not, assign an
* erase hook that supports non-uniform erase.
*/
- ret = spansion_read_any_reg(nor, SPINOR_REG_ADDR_CFR3V,
+ ret = spansion_read_any_reg(nor, SPINOR_REG_CYPRESS_CFR3V,
S25FS_S_RDAR_DUMMY, &cfr3v);
if (ret)
return ret;
- if (!(cfr3v & CFR3V_UNHYSA))
+ if (!(cfr3v & SPINOR_REG_CYPRESS_CFR3_UNISECT))
nor->erase = s25fs_s_erase_non_uniform;
return spi_nor_default_setup(nor, info, params);
@@ -3316,13 +3370,13 @@
.post_sfdp = s25fs_s_post_sfdp_fixup,
};
-static int s25_mdp_ready(struct spi_nor *nor)
+static int s25_s28_mdp_ready(struct spi_nor *nor)
{
u32 addr;
int ret;
for (addr = 0; addr < nor->mtd.size; addr += SZ_128M) {
- ret = spansion_sr_ready(nor, addr, 0);
+ ret = spansion_sr_ready(nor, addr, nor->rdsr_dummy);
if (!ret)
return ret;
}
@@ -3344,15 +3398,15 @@
return 0;
}
-static int s25_erase_non_uniform(struct spi_nor *nor, loff_t addr)
+static int s25_s28_erase_non_uniform(struct spi_nor *nor, loff_t addr)
{
/* Support 32 x 4KB sectors at bottom */
return spansion_erase_non_uniform(nor, addr, SPINOR_OP_BE_4K_4B, 0,
SZ_128K);
}
-static int s25_setup(struct spi_nor *nor, const struct flash_info *info,
- const struct spi_nor_flash_parameter *params)
+static int s25_s28_setup(struct spi_nor *nor, const struct flash_info *info,
+ const struct spi_nor_flash_parameter *params)
{
int ret;
u8 cr;
@@ -3366,7 +3420,8 @@
* uniform 128KB only due to complexity of non-uniform layout.
*/
if (nor->info->id[4] == S25FS256T_ID4) {
- ret = spansion_read_any_reg(nor, SPINOR_REG_ADDR_ARCFN, 8, &cr);
+ ret = spansion_read_any_reg(nor, SPINOR_REG_CYPRESS_ARCFN, 8,
+ &cr);
if (ret)
return ret;
@@ -3380,31 +3435,31 @@
* Read CFR3V to check if uniform sector is selected. If not, assign an
* erase hook that supports non-uniform erase.
*/
- ret = spansion_read_any_reg(nor, SPINOR_REG_ADDR_CFR3V, 0, &cr);
+ ret = spansion_read_any_reg(nor, SPINOR_REG_CYPRESS_CFR3V, 0, &cr);
if (ret)
return ret;
- if (!(cr & CFR3V_UNHYSA))
- nor->erase = s25_erase_non_uniform;
+ if (!(cr & SPINOR_REG_CYPRESS_CFR3_UNISECT))
+ nor->erase = s25_s28_erase_non_uniform;
/*
* For the multi-die package parts, the ready() hook is needed to check
* all dies' status via read any register.
*/
if (nor->mtd.size > SZ_128M)
- nor->ready = s25_mdp_ready;
+ nor->ready = s25_s28_mdp_ready;
return spi_nor_default_setup(nor, info, params);
}
static void s25_default_init(struct spi_nor *nor)
{
- nor->setup = s25_setup;
+ nor->setup = s25_s28_setup;
}
-static int s25_post_bfpt_fixup(struct spi_nor *nor,
- const struct sfdp_parameter_header *header,
- const struct sfdp_bfpt *bfpt,
- struct spi_nor_flash_parameter *params)
+static int s25_s28_post_bfpt_fixup(struct spi_nor *nor,
+ const struct sfdp_parameter_header *header,
+ const struct sfdp_bfpt *bfpt,
+ struct spi_nor_flash_parameter *params)
{
int ret;
u32 addr;
@@ -3444,12 +3499,13 @@
* dies are configured to 512B buffer.
*/
for (addr = 0; addr < params->size; addr += SZ_128M) {
- ret = spansion_read_any_reg(nor, addr + SPINOR_REG_ADDR_CFR3V,
- 0, &cfr3v);
+ ret = spansion_read_any_reg(nor,
+ addr + SPINOR_REG_CYPRESS_CFR3V, 0,
+ &cfr3v);
if (ret)
return ret;
- if (!(cfr3v & CFR3V_PGMBUF)) {
+ if (!(cfr3v & SPINOR_REG_CYPRESS_CFR3_PGSZ)) {
params->page_size = 256;
return 0;
}
@@ -3477,7 +3533,7 @@
static struct spi_nor_fixups s25_fixups = {
.default_init = s25_default_init,
- .post_bfpt = s25_post_bfpt_fixup,
+ .post_bfpt = s25_s28_post_bfpt_fixup,
.post_sfdp = s25_post_sfdp_fixup,
};
@@ -3509,97 +3565,57 @@
*/
static int spi_nor_cypress_octal_dtr_enable(struct spi_nor *nor)
{
- struct spi_mem_op op;
+ u32 addr;
u8 buf;
- u8 addr_width = 3;
int ret;
- /* Use 24 dummy cycles for memory array reads. */
ret = write_enable(nor);
if (ret)
return ret;
- buf = SPINOR_REG_CYPRESS_CFR2_MEMLAT_11_24;
- op = (struct spi_mem_op)SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_WR_ANY_REG, 1),
- SPI_MEM_OP_ADDR(addr_width, SPINOR_REG_CYPRESS_CFR2V, 1),
- SPI_MEM_OP_NO_DUMMY,
- SPI_MEM_OP_DATA_OUT(1, &buf, 1));
- ret = spi_mem_exec_op(nor->spi, &op);
- if (ret) {
- dev_warn(nor->dev,
- "failed to set default memory latency value: %d\n",
- ret);
- return ret;
- }
- ret = spi_nor_wait_till_ready(nor);
- if (ret)
- return ret;
+ /* Use 24 dummy cycles for memory array reads. */
+ for (addr = 0; addr < nor->mtd.size; addr += SZ_128M) {
+ ret = spansion_read_any_reg(nor,
+ addr + SPINOR_REG_CYPRESS_CFR2V, 0,
+ &buf);
+ if (ret)
+ return ret;
+ buf &= ~SPINOR_REG_CYPRESS_CFR2_MEMLAT_MASK;
+ buf |= SPINOR_REG_CYPRESS_CFR2_MEMLAT_11_24;
+ ret = spansion_write_any_reg(nor,
+ addr + SPINOR_REG_CYPRESS_CFR2V,
+ buf);
+ if (ret) {
+ dev_warn(nor->dev, "failed to set default memory latency value: %d\n", ret);
+ return ret;
+ }
+ }
nor->read_dummy = 24;
- /* Set the octal and DTR enable bits. */
ret = write_enable(nor);
if (ret)
return ret;
+ /* Set the octal and DTR enable bits. */
buf = SPINOR_REG_CYPRESS_CFR5_OCT_DTR_EN;
- op = (struct spi_mem_op)SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_WR_ANY_REG, 1),
- SPI_MEM_OP_ADDR(addr_width, SPINOR_REG_CYPRESS_CFR5V, 1),
- SPI_MEM_OP_NO_DUMMY,
- SPI_MEM_OP_DATA_OUT(1, &buf, 1));
- ret = spi_mem_exec_op(nor->spi, &op);
- if (ret) {
- dev_warn(nor->dev, "Failed to enable octal DTR mode\n");
- return ret;
+ for (addr = 0; addr < nor->mtd.size; addr += SZ_128M) {
+ ret = spansion_write_any_reg(nor,
+ addr + SPINOR_REG_CYPRESS_CFR5V,
+ buf);
+ if (ret) {
+ dev_warn(nor->dev, "Failed to enable octal DTR mode\n");
+ return ret;
+ }
}
return 0;
}
-static int s28hx_t_erase_non_uniform(struct spi_nor *nor, loff_t addr)
-{
- /* Factory default configuration: 32 x 4 KiB sectors at bottom. */
- return spansion_erase_non_uniform(nor, addr, SPINOR_OP_S28_SE_4K,
- 0, SZ_128K);
-}
-
-static int s28hx_t_setup(struct spi_nor *nor, const struct flash_info *info,
- const struct spi_nor_flash_parameter *params)
-{
- struct spi_mem_op op;
- u8 buf;
- u8 addr_width = 3;
- int ret;
-
- ret = spi_nor_wait_till_ready(nor);
- if (ret)
- return ret;
-
- /*
- * Check CFR3V to check if non-uniform sector mode is selected. If it
- * is, set the erase hook to the non-uniform erase procedure.
- */
- op = (struct spi_mem_op)
- SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RD_ANY_REG, 1),
- SPI_MEM_OP_ADDR(addr_width,
- SPINOR_REG_CYPRESS_CFR3V, 1),
- SPI_MEM_OP_NO_DUMMY,
- SPI_MEM_OP_DATA_IN(1, &buf, 1));
-
- ret = spi_mem_exec_op(nor->spi, &op);
- if (ret)
- return ret;
-
- if (!(buf & SPINOR_REG_CYPRESS_CFR3_UNISECT))
- nor->erase = s28hx_t_erase_non_uniform;
-
- return spi_nor_default_setup(nor, info, params);
-}
-
static void s28hx_t_default_init(struct spi_nor *nor)
{
nor->octal_dtr_enable = spi_nor_cypress_octal_dtr_enable;
- nor->setup = s28hx_t_setup;
+ nor->setup = s25_s28_setup;
}
static void s28hx_t_post_sfdp_fixup(struct spi_nor *nor,
@@ -3633,50 +3649,10 @@
params->rdsr_addr_nbytes = 4;
}
-static int s28hx_t_post_bfpt_fixup(struct spi_nor *nor,
- const struct sfdp_parameter_header *bfpt_header,
- const struct sfdp_bfpt *bfpt,
- struct spi_nor_flash_parameter *params)
-{
- struct spi_mem_op op;
- u8 buf;
- u8 addr_width = 3;
- int ret;
-
- /*
- * The BFPT table advertises a 512B page size but the page size is
- * actually configurable (with the default being 256B). Read from
- * CFR3V[4] and set the correct size.
- */
- op = (struct spi_mem_op)
- SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RD_ANY_REG, 1),
- SPI_MEM_OP_ADDR(addr_width, SPINOR_REG_CYPRESS_CFR3V, 1),
- SPI_MEM_OP_NO_DUMMY,
- SPI_MEM_OP_DATA_IN(1, &buf, 1));
- ret = spi_mem_exec_op(nor->spi, &op);
- if (ret)
- return ret;
-
- if (buf & SPINOR_REG_CYPRESS_CFR3_PGSZ)
- params->page_size = 512;
- else
- params->page_size = 256;
-
- /*
- * The BFPT advertises that it supports 4k erases, and the datasheet
- * says the same. But 4k erases did not work when testing. So, use 256k
- * erases for now.
- */
- nor->erase_opcode = SPINOR_OP_SE_4B;
- nor->mtd.erasesize = 0x40000;
-
- return 0;
-}
-
static struct spi_nor_fixups s28hx_t_fixups = {
.default_init = s28hx_t_default_init,
.post_sfdp = s28hx_t_post_sfdp_fixup,
- .post_bfpt = s28hx_t_post_bfpt_fixup,
+ .post_bfpt = s25_s28_post_bfpt_fixup,
};
#endif /* CONFIG_SPI_FLASH_S28HX_T */
diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
index 3cb132d..38a2874 100644
--- a/drivers/mtd/spi/spi-nor-ids.c
+++ b/drivers/mtd/spi/spi-nor-ids.c
@@ -200,6 +200,11 @@
SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES)},
{INFO("gd55lx02g", 0xc8681C, 0, 64 * 1024, 4096, SECT_4K |
SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES)},
+ {
+ INFO("gd55lb02ge", 0xc8671c, 0, 64 * 1024, 4096,
+ SECT_4K | SPI_NOR_QUAD_READ |
+ SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
+ },
#endif
#ifdef CONFIG_SPI_FLASH_ISSI /* ISSI */
/* ISSI */
@@ -234,6 +239,8 @@
SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
{ INFO("is25wx256", 0x9d5b19, 0, 128 * 1024, 256,
SECT_4K | USE_FSR | SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES) },
+ { INFO("is25lx512", 0x9d5a1a, 0, 64 * 1024, 1024,
+ SECT_4K | USE_FSR | SPI_NOR_4B_OPCODES | SPI_NOR_HAS_TB) },
#endif
#ifdef CONFIG_SPI_FLASH_MACRONIX /* MACRONIX */
/* Macronix */
@@ -287,6 +294,10 @@
{ INFO("mx25uw6345g", 0xc28437, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_OCTAL_DTR_READ | SPI_NOR_4B_OPCODES) },
#endif
+#ifdef CONFIG_SPI_FLASH_SILICONKAISER
+ { INFO("sk25lp128", 0x257018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+#endif
+
#ifdef CONFIG_SPI_FLASH_STMICRO /* STMICRO */
/* Micron */
{ INFO("n25q016a", 0x20bb15, 0, 64 * 1024, 32, SECT_4K | SPI_NOR_QUAD_READ) },
@@ -300,6 +311,7 @@
{ INFO("n25q256a", 0x20ba19, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | USE_FSR) },
{ INFO6("mt25qu256a", 0x20bb19, 0x104400, 64 * 1024, 512, SECT_4K | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES | USE_FSR) },
{ INFO("n25q256ax1", 0x20bb19, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_QUAD_READ | USE_FSR) },
+ { INFO("mt25qu128ab", 0x20bb18, 0, 64 * 1024, 256, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) },
{ INFO6("mt25qu512a", 0x20bb20, 0x104400, 64 * 1024, 1024,
SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES |
USE_FSR) },
@@ -309,6 +321,7 @@
{ INFO("n25q00", 0x20ba21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
{ INFO("n25q00a", 0x20bb21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
{ INFO("mt25ql01g", 0x21ba20, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
+ { INFO6("mt25qu01g", 0x20bb21, 0x104400, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE | SPI_NOR_4B_OPCODES) },
{ INFO("mt25qu02g", 0x20bb22, 0, 64 * 1024, 4096, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
{ INFO("mt25ql02g", 0x20ba22, 0, 64 * 1024, 4096, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE | SPI_NOR_4B_OPCODES) },
#ifdef CONFIG_SPI_FLASH_MT35XU
@@ -370,6 +383,7 @@
{ INFO("s28hl01gt", 0x345a1b, 0, 256 * 1024, 512, SPI_NOR_OCTAL_DTR_READ) },
{ INFO("s28hs512t", 0x345b1a, 0, 256 * 1024, 256, SPI_NOR_OCTAL_DTR_READ) },
{ INFO("s28hs01gt", 0x345b1b, 0, 256 * 1024, 512, SPI_NOR_OCTAL_DTR_READ) },
+ { INFO("s28hs02gt", 0x345b1c, 0, 256 * 1024, 1024, SPI_NOR_OCTAL_DTR_READ) },
#endif
#endif
#ifdef CONFIG_SPI_FLASH_SST /* SST */
@@ -513,6 +527,16 @@
SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
},
+ {
+ INFO("w25q01jvfim", 0xef7021, 0, 64 * 1024, 2048,
+ SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
+ SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
+ },
+ {
+ INFO("w25q02jv", 0xef7022, 0, 64 * 1024, 4096,
+ SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
+ SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
+ },
{ INFO("w25q80", 0xef5014, 0, 64 * 1024, 16, SECT_4K) },
{ INFO("w25q80bl", 0xef4014, 0, 64 * 1024, 16, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
{ INFO("w25q16cl", 0xef4015, 0, 64 * 1024, 32, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
@@ -533,6 +557,10 @@
{ INFO("XM25QH64C", 0x204017, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
{ INFO("XM25QH128A", 0x207018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
{ INFO("XM25QU128C", 0x204118, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+ { INFO("XM25QH256C", 0x204019, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
+ { INFO("XM25QU256C", 0x204119, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
+ { INFO("XM25QH512C", 0x204020, 0, 64 * 1024, 1024, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
+ { INFO("XM25QU512C", 0x204120, 0, 64 * 1024, 1024, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
#endif
#ifdef CONFIG_SPI_FLASH_XTX
/* XTX Technology Limited */
@@ -566,11 +594,18 @@
SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
{ INFO("xt25q01g", 0x0b601B, 0, 64 * 1024, 2048,
SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
+ { INFO("xt55q02g", 0x0b601C, 0, 64 * 1024, 4096,
+ SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
/* adding these wide voltage QSPI flash parts */
{ INFO("xt25w512", 0x0b651A, 0, 64 * 1024, 1024,
SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
{ INFO("xt25w01g", 0x0b651B, 0, 64 * 1024, 2048,
SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
#endif
+#ifdef CONFIG_SPI_FLASH_ZBIT
+ /* Zbit Semiconductor Inc. */
+ { INFO("zb25vq128", 0x5e4018, 0, 64 * 1024, 256,
+ SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+#endif
{ },
};
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 23ad2c2..b2d7b49 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -980,4 +980,11 @@
This driver is used for the MDIO mux found on the Amlogic G12A & compatible
SoCs.
+config MDIO_MUX_MESON_GXL
+ bool "MDIO MUX for Amlogic Meson GXL SoCs"
+ depends on DM_MDIO_MUX
+ help
+ This driver is used for the MDIO mux found on the Amlogic GXL & compatible
+ SoCs.
+
endif # NETDEVICES
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index f9aed16..6677366 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -57,6 +57,7 @@
obj-$(CONFIG_MDIO_IPQ4019) += mdio-ipq4019.o
obj-$(CONFIG_MDIO_MUX_I2CREG) += mdio_mux_i2creg.o
obj-$(CONFIG_MDIO_MUX_MESON_G12A) += mdio_mux_meson_g12a.o
+obj-$(CONFIG_MDIO_MUX_MESON_GXL) += mdio_mux_meson_gxl.o
obj-$(CONFIG_MDIO_MUX_MMIOREG) += mdio_mux_mmioreg.o
obj-$(CONFIG_MDIO_MUX_SANDBOX) += mdio_mux_sandbox.o
obj-$(CONFIG_MDIO_SANDBOX) += mdio_sandbox.o
diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c
index a4e3698..e40e399 100644
--- a/drivers/net/dwc_eth_qos.c
+++ b/drivers/net/dwc_eth_qos.c
@@ -1711,6 +1711,10 @@
.compatible = "nxp,imx8mp-dwmac-eqos",
.data = (ulong)&eqos_imx_config
},
+ {
+ .compatible = "nxp,imx93-dwmac-eqos",
+ .data = (ulong)&eqos_imx_config
+ },
#endif
#if IS_ENABLED(CONFIG_DWC_ETH_QOS_ROCKCHIP)
{
diff --git a/drivers/net/dwc_eth_qos_imx.c b/drivers/net/dwc_eth_qos_imx.c
index 60f3f3f..e3f55dd 100644
--- a/drivers/net/dwc_eth_qos_imx.c
+++ b/drivers/net/dwc_eth_qos_imx.c
@@ -181,6 +181,9 @@
ulong rate;
int ret;
+ if (device_is_compatible(dev, "nxp,imx93-dwmac-eqos"))
+ return 0;
+
debug("%s(dev=%p):\n", __func__, dev);
if (eqos->phy->interface == PHY_INTERFACE_MODE_RMII)
diff --git a/drivers/net/fm/fm.h b/drivers/net/fm/fm.h
index a2d5b03..5c45ad5 100644
--- a/drivers/net/fm/fm.h
+++ b/drivers/net/fm/fm.h
@@ -6,7 +6,6 @@
#ifndef __FM_H__
#define __FM_H__
-#include <common.h>
#include <phy.h>
#include <fm_eth.h>
#include <fsl_fman.h>
diff --git a/drivers/net/fsl-mc/dpio/qbman_private.h b/drivers/net/fsl-mc/dpio/qbman_private.h
index 53f1300..f9dad17 100644
--- a/drivers/net/fsl-mc/dpio/qbman_private.h
+++ b/drivers/net/fsl-mc/dpio/qbman_private.h
@@ -4,7 +4,6 @@
*/
/* Perform extra checking */
-#include <common.h>
#include <errno.h>
#include <asm/io.h>
#include <linux/bug.h>
diff --git a/drivers/net/fsl-mc/dpio/qbman_sys.h b/drivers/net/fsl-mc/dpio/qbman_sys.h
index 1c6e489..cac70a1 100644
--- a/drivers/net/fsl-mc/dpio/qbman_sys.h
+++ b/drivers/net/fsl-mc/dpio/qbman_sys.h
@@ -20,6 +20,7 @@
/* Trace the 3 different classes of read/write access to QBMan. #undef as
* required. */
+#include <config.h>
#include <linux/bug.h>
#include <linux/printk.h>
#undef QBMAN_CCSR_TRACE
diff --git a/drivers/net/mdio_mux_meson_gxl.c b/drivers/net/mdio_mux_meson_gxl.c
new file mode 100644
index 0000000..8ef3ae5
--- /dev/null
+++ b/drivers/net/mdio_mux_meson_gxl.c
@@ -0,0 +1,138 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2022 Baylibre, SAS.
+ * Author: Jerome Brunet <jbrunet@baylibre.com>
+ * Copyright (c) 2023 Neil Armstrong <neil.armstrong@linaro.org>
+ */
+
+#include <dm.h>
+#include <errno.h>
+#include <log.h>
+#include <miiphy.h>
+#include <asm/io.h>
+#include <linux/bitfield.h>
+#include <linux/delay.h>
+
+#define ETH_REG2 0x0
+#define REG2_PHYID GENMASK(21, 0)
+#define EPHY_GXL_ID 0x110181
+#define REG2_LEDACT GENMASK(23, 22)
+#define REG2_LEDLINK GENMASK(25, 24)
+#define REG2_DIV4SEL BIT(27)
+#define REG2_ADCBYPASS BIT(30)
+#define REG2_CLKINSEL BIT(31)
+#define ETH_REG3 0x4
+#define REG3_ENH BIT(3)
+#define REG3_CFGMODE GENMASK(6, 4)
+#define REG3_AUTOMDIX BIT(7)
+#define REG3_PHYADDR GENMASK(12, 8)
+#define REG3_PWRUPRST BIT(21)
+#define REG3_PWRDOWN BIT(22)
+#define REG3_LEDPOL BIT(23)
+#define REG3_PHYMDI BIT(26)
+#define REG3_CLKINEN BIT(29)
+#define REG3_PHYIP BIT(30)
+#define REG3_PHYEN BIT(31)
+#define ETH_REG4 0x8
+#define REG4_PWRUPRSTSIG BIT(0)
+
+#define MESON_GXL_MDIO_EXTERNAL_ID 0
+#define MESON_GXL_MDIO_INTERNAL_ID 1
+
+struct mdio_mux_meson_gxl_priv {
+ phys_addr_t regs;
+};
+
+static int meson_gxl_enable_internal_mdio(struct mdio_mux_meson_gxl_priv *priv)
+{
+ u32 val;
+
+ /* Setup the internal phy */
+ val = (REG3_ENH |
+ FIELD_PREP(REG3_CFGMODE, 0x7) |
+ REG3_AUTOMDIX |
+ FIELD_PREP(REG3_PHYADDR, 8) |
+ REG3_LEDPOL |
+ REG3_PHYMDI |
+ REG3_CLKINEN |
+ REG3_PHYIP);
+
+ writel(REG4_PWRUPRSTSIG, priv->regs + ETH_REG4);
+ writel(val, priv->regs + ETH_REG3);
+ mdelay(10);
+
+ /* NOTE: The HW kept the phy id configurable at runtime.
+ * The id below is arbitrary. It is the one used in the vendor code.
+ * The only constraint is that it must match the one in
+ * drivers/net/phy/meson-gxl.c to properly match the PHY.
+ */
+ writel(FIELD_PREP(REG2_PHYID, EPHY_GXL_ID),
+ priv->regs + ETH_REG2);
+
+ /* Enable the internal phy */
+ val |= REG3_PHYEN;
+ writel(val, priv->regs + ETH_REG3);
+ writel(0, priv->regs + ETH_REG4);
+
+ /* The phy needs a bit of time to power up */
+ mdelay(10);
+
+ return 0;
+}
+
+static int meson_gxl_enable_external_mdio(struct mdio_mux_meson_gxl_priv *priv)
+{
+ /* Reset the mdio bus mux to the external phy */
+ writel(0, priv->regs + ETH_REG3);
+
+ return 0;
+}
+
+static int mdio_mux_meson_gxl_select(struct udevice *mux, int cur, int sel)
+{
+ struct mdio_mux_meson_gxl_priv *priv = dev_get_priv(mux);
+
+ debug("%s: %x -> %x\n", __func__, (u32)cur, (u32)sel);
+
+ /* if last selection didn't change we're good to go */
+ if (cur == sel)
+ return 0;
+
+ switch (sel) {
+ case MESON_GXL_MDIO_EXTERNAL_ID:
+ return meson_gxl_enable_external_mdio(priv);
+ case MESON_GXL_MDIO_INTERNAL_ID:
+ return meson_gxl_enable_internal_mdio(priv);
+ default:
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static const struct mdio_mux_ops mdio_mux_meson_gxl_ops = {
+ .select = mdio_mux_meson_gxl_select,
+};
+
+static int mdio_mux_meson_gxl_probe(struct udevice *dev)
+{
+ struct mdio_mux_meson_gxl_priv *priv = dev_get_priv(dev);
+
+ priv->regs = dev_read_addr(dev);
+
+ return 0;
+}
+
+static const struct udevice_id mdio_mux_meson_gxl_ids[] = {
+ { .compatible = "amlogic,gxl-mdio-mux" },
+ { }
+};
+
+U_BOOT_DRIVER(mdio_mux_meson_gxl) = {
+ .name = "mdio_mux_meson_gxl",
+ .id = UCLASS_MDIO_MUX,
+ .of_match = mdio_mux_meson_gxl_ids,
+ .probe = mdio_mux_meson_gxl_probe,
+ .ops = &mdio_mux_meson_gxl_ops,
+ .priv_auto = sizeof(struct mdio_mux_meson_gxl_priv),
+};
diff --git a/drivers/net/mscc_eswitch/mscc_mac_table.c b/drivers/net/mscc_eswitch/mscc_mac_table.c
index 25b9cad..06e1f62 100644
--- a/drivers/net/mscc_eswitch/mscc_mac_table.c
+++ b/drivers/net/mscc_eswitch/mscc_mac_table.c
@@ -3,6 +3,7 @@
* Copyright (c) 2018 Microsemi Corporation
*/
+#include <errno.h>
#include <linux/bitops.h>
#include <linux/io.h>
#include "mscc_mac_table.h"
diff --git a/drivers/net/mscc_eswitch/mscc_mac_table.h b/drivers/net/mscc_eswitch/mscc_mac_table.h
index 17fed2e..5ec8db2 100644
--- a/drivers/net/mscc_eswitch/mscc_mac_table.h
+++ b/drivers/net/mscc_eswitch/mscc_mac_table.h
@@ -3,8 +3,6 @@
* Copyright (c) 2018 Microsemi Corporation
*/
-#include <common.h>
-
#define ETH_LEN 6
#define MAC_VID 1
diff --git a/drivers/net/mscc_eswitch/mscc_xfer.c b/drivers/net/mscc_eswitch/mscc_xfer.c
index 6f74746..ee6bf06 100644
--- a/drivers/net/mscc_eswitch/mscc_xfer.c
+++ b/drivers/net/mscc_eswitch/mscc_xfer.c
@@ -3,6 +3,7 @@
* Copyright (c) 2018 Microsemi Corporation
*/
+#include <errno.h>
#include <log.h>
#include <linux/bitops.h>
#include <linux/delay.h>
diff --git a/drivers/net/mscc_eswitch/mscc_xfer.h b/drivers/net/mscc_eswitch/mscc_xfer.h
index c880a4e..70f2794 100644
--- a/drivers/net/mscc_eswitch/mscc_xfer.h
+++ b/drivers/net/mscc_eswitch/mscc_xfer.h
@@ -3,8 +3,6 @@
* Copyright (c) 2018 Microsemi Corporation
*/
-#include <common.h>
-
enum mscc_regs_qs {
MSCC_QS_XTR_RD,
MSCC_QS_XTR_FLUSH,
diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c
index 396cac7..7e1036b 100644
--- a/drivers/net/phy/realtek.c
+++ b/drivers/net/phy/realtek.c
@@ -446,6 +446,20 @@
.writeext = &rtl8211f_phy_extwrite,
};
+/* Support for RTL8211F-VD PHY */
+U_BOOT_PHY_DRIVER(rtl8211fvd) = {
+ .name = "RealTek RTL8211F-VD",
+ .uid = 0x1cc878,
+ .mask = 0xffffff,
+ .features = PHY_GBIT_FEATURES,
+ .probe = &rtl8211f_probe,
+ .config = &rtl8211f_config,
+ .startup = &rtl8211f_startup,
+ .shutdown = &genphy_shutdown,
+ .readext = &rtl8211f_phy_extread,
+ .writeext = &rtl8211f_phy_extwrite,
+};
+
/* Support for RTL8201F PHY */
U_BOOT_PHY_DRIVER(rtl8201f) = {
.name = "RealTek RTL8201F 10/100Mbps Ethernet",
diff --git a/drivers/net/rtl8139.c b/drivers/net/rtl8139.c
index 106bc1c..d8f24ec 100644
--- a/drivers/net/rtl8139.c
+++ b/drivers/net/rtl8139.c
@@ -453,7 +453,7 @@
RTL_STS_RXBADALIGN)) ||
(rx_size < ETH_ZLEN) ||
(rx_size > ETH_FRAME_LEN + 4)) {
- printf("rx error %hX\n", rx_status);
+ debug("rx error %hX\n", rx_status);
/* this clears all interrupts still pending */
rtl8139_reset(priv);
return 0;
diff --git a/drivers/net/smc911x.c b/drivers/net/smc911x.c
index 5c5ad8b..616b7ce 100644
--- a/drivers/net/smc911x.c
+++ b/drivers/net/smc911x.c
@@ -403,7 +403,7 @@
ret = smc911x_send_common(priv, packet, length);
- return ret ? 0 : -ETIMEDOUT;
+ return ret ? -ETIMEDOUT : 0;
}
static int smc911x_recv(struct udevice *dev, int flags, uchar **packetp)
diff --git a/drivers/net/sun8i_emac.c b/drivers/net/sun8i_emac.c
index a12f7e3..8bff4fe 100644
--- a/drivers/net/sun8i_emac.c
+++ b/drivers/net/sun8i_emac.c
@@ -833,11 +833,8 @@
priv->use_internal_phy = false;
offset = fdtdec_lookup_phandle(gd->fdt_blob, node, "phy-handle");
- if (offset < 0) {
- debug("%s: Cannot find PHY address\n", __func__);
- return -EINVAL;
- }
- priv->phyaddr = fdtdec_get_int(gd->fdt_blob, offset, "reg", -1);
+ if (offset >= 0)
+ priv->phyaddr = fdtdec_get_int(gd->fdt_blob, offset, "reg", -1);
pdata->phy_interface = dev_read_phy_mode(dev);
debug("phy interface %d\n", pdata->phy_interface);
diff --git a/drivers/net/xilinx_axi_emac.c b/drivers/net/xilinx_axi_emac.c
index 54f2232..ef151ee 100644
--- a/drivers/net/xilinx_axi_emac.c
+++ b/drivers/net/xilinx_axi_emac.c
@@ -903,12 +903,11 @@
ret = dev_read_phandle_with_args(dev, "axistream-connected", NULL, 0, 0,
&axistream_node);
- if (ret) {
- printf("%s: axistream is not found\n", __func__);
- return -EINVAL;
- }
+ if (!ret)
+ plat->dmatx = (struct axidma_reg *)ofnode_get_addr(axistream_node.node);
+ else
+ plat->dmatx = (struct axidma_reg *)dev_read_addr_index(dev, 1);
- plat->dmatx = (struct axidma_reg *)ofnode_get_addr(axistream_node.node);
if (!plat->dmatx) {
printf("%s: axi_dma register space not found\n", __func__);
return -EINVAL;
diff --git a/drivers/nvme/nvme.c b/drivers/nvme/nvme.c
index c39cd41..59a139b 100644
--- a/drivers/nvme/nvme.c
+++ b/drivers/nvme/nvme.c
@@ -695,7 +695,9 @@
if (ret) {
log_err("Failed to probe '%s': err=%dE\n", dev->name,
ret);
- return ret;
+ /* Bail if we ran out of memory, else keep trying */
+ if (ret != -EBUSY)
+ return ret;
}
}
@@ -835,8 +837,8 @@
ndev->udev = udev;
INIT_LIST_HEAD(&ndev->namespaces);
if (readl(&ndev->bar->csts) == -1) {
- ret = -ENODEV;
- printf("Error: %s: Out of memory!\n", udev->name);
+ ret = -EBUSY;
+ printf("Error: %s: Controller not ready!\n", udev->name);
goto free_nvme;
}
diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c
index e0d01f6..1a48256 100644
--- a/drivers/pci/pci-uclass.c
+++ b/drivers/pci/pci-uclass.c
@@ -1611,6 +1611,17 @@
dm_pci_read_config32(udev, bar, &bar_response);
pci_bus_addr = (pci_addr_t)(bar_response & ~0xf);
+ /* This has a lot of baked in assumptions, but essentially tries
+ * to mirror the behavior of BAR assignment for 64 Bit enabled
+ * hosts and 64 bit placeable BARs in the auto assign code.
+ */
+#if defined(CONFIG_SYS_PCI_64BIT)
+ if (bar_response & PCI_BASE_ADDRESS_MEM_TYPE_64) {
+ dm_pci_read_config32(udev, bar + 4, &bar_response);
+ pci_bus_addr |= (pci_addr_t)bar_response << 32;
+ }
+#endif /* CONFIG_SYS_PCI_64BIT */
+
if (~((pci_addr_t)0) - pci_bus_addr < offset)
return NULL;
diff --git a/drivers/pci/pcie_layerscape_fixup_common.h b/drivers/pci/pcie_layerscape_fixup_common.h
index 70bd3f0..3255b76 100644
--- a/drivers/pci/pcie_layerscape_fixup_common.h
+++ b/drivers/pci/pcie_layerscape_fixup_common.h
@@ -9,8 +9,6 @@
#ifndef _PCIE_LAYERSCAPE_FIXUP_COMMON_H_
#define _PCIE_LAYERSCAPE_FIXUP_COMMON_H_
-#include <common.h>
-
void ft_pci_setup_ls(void *blob, struct bd_info *bd);
#ifdef CONFIG_PCIE_LAYERSCAPE_GEN4
diff --git a/drivers/pci/pcie_xilinx.c b/drivers/pci/pcie_xilinx.c
index 53fd121..3db460b 100644
--- a/drivers/pci/pcie_xilinx.c
+++ b/drivers/pci/pcie_xilinx.c
@@ -8,11 +8,10 @@
#include <common.h>
#include <dm.h>
#include <pci.h>
-#include <asm/global_data.h>
#include <linux/bitops.h>
#include <linux/printk.h>
-
-#include <asm/io.h>
+#include <linux/io.h>
+#include <linux/err.h>
/**
* struct xilinx_pcie - Xilinx PCIe controller state
@@ -25,6 +24,8 @@
/* Register definitions */
#define XILINX_PCIE_REG_PSCR 0x144
#define XILINX_PCIE_REG_PSCR_LNKUP BIT(11)
+#define XILINX_PCIE_REG_RPSC 0x148
+#define XILINX_PCIE_REG_RPSC_BEN BIT(0)
/**
* pcie_xilinx_link_up() - Check whether the PCIe link is up
@@ -140,20 +141,22 @@
static int pcie_xilinx_of_to_plat(struct udevice *dev)
{
struct xilinx_pcie *pcie = dev_get_priv(dev);
- struct fdt_resource reg_res;
- DECLARE_GLOBAL_DATA_PTR;
- int err;
+ fdt_addr_t addr;
+ fdt_size_t size;
+ u32 rpsc;
- err = fdt_get_resource(gd->fdt_blob, dev_of_offset(dev), "reg",
- 0, ®_res);
- if (err < 0) {
- pr_err("\"reg\" resource not found\n");
- return err;
- }
+ addr = dev_read_addr_size(dev, &size);
+ if (addr == FDT_ADDR_T_NONE)
+ return -EINVAL;
- pcie->cfg_base = map_physmem(reg_res.start,
- fdt_resource_size(®_res),
- MAP_NOCACHE);
+ pcie->cfg_base = devm_ioremap(dev, addr, size);
+ if (IS_ERR(pcie->cfg_base))
+ return PTR_ERR(pcie->cfg_base);
+
+ /* Enable the Bridge enable bit */
+ rpsc = __raw_readl(pcie->cfg_base + XILINX_PCIE_REG_RPSC);
+ rpsc |= XILINX_PCIE_REG_RPSC_BEN;
+ __raw_writel(rpsc, pcie->cfg_base + XILINX_PCIE_REG_RPSC);
return 0;
}
diff --git a/drivers/pci_endpoint/pcie-cadence.h b/drivers/pci_endpoint/pcie-cadence.h
index 8a659c3..dd0101a 100644
--- a/drivers/pci_endpoint/pcie-cadence.h
+++ b/drivers/pci_endpoint/pcie-cadence.h
@@ -11,7 +11,6 @@
#ifndef PCIE_CADENCE_H
#define PCIE_CADENCE_H
-#include <common.h>
#include <pci_ep.h>
#include <asm/io.h>
#include <linux/bitops.h>
diff --git a/drivers/phy/phy-imx8mq-usb.c b/drivers/phy/phy-imx8mq-usb.c
index b660ead..e5e96e7 100644
--- a/drivers/phy/phy-imx8mq-usb.c
+++ b/drivers/phy/phy-imx8mq-usb.c
@@ -231,16 +231,10 @@
return 0;
}
-static int imx8mq_usb_phy_exit(struct phy *usb_phy)
-{
- return imx8mq_usb_phy_power_off(usb_phy);
-}
-
struct phy_ops imx8mq_usb_phy_ops = {
.init = imx8mpq_usb_phy_init,
.power_on = imx8mq_usb_phy_power_on,
.power_off = imx8mq_usb_phy_power_off,
- .exit = imx8mq_usb_phy_exit,
};
int imx8mq_usb_phy_probe(struct udevice *dev)
diff --git a/drivers/phy/phy-mtk-tphy.c b/drivers/phy/phy-mtk-tphy.c
index 1883f9f..ea9edf2 100644
--- a/drivers/phy/phy-mtk-tphy.c
+++ b/drivers/phy/phy-mtk-tphy.c
@@ -47,6 +47,11 @@
#define PA0_USB20_PLL_PREDIV GENMASK(7, 6)
#define PA0_RG_USB20_INTR_EN BIT(5)
+#define U3P_USBPHYACR1 0x004
+#define PA1_RG_INTR_CAL GENMASK(23, 19)
+#define PA1_RG_VRT_SEL GENMASK(14, 12)
+#define PA1_RG_TERM_SEL GENMASK(10, 8)
+
#define U3P_USBPHYACR2 0x008
#define PA2_RG_U2PLL_BW GENMASK(21, 19)
@@ -56,8 +61,10 @@
#define PA5_RG_U2_HS_100U_U3_EN BIT(11)
#define U3P_USBPHYACR6 0x018
+#define PA6_RG_U2_PRE_EMP GENMASK(31, 30)
#define PA6_RG_U2_BC11_SW_EN BIT(23)
#define PA6_RG_U2_OTG_VBUSCMP_EN BIT(20)
+#define PA6_RG_U2_DISCTH GENMASK(7, 4)
#define PA6_RG_U2_SQTH GENMASK(3, 0)
#define U3P_U2PHYACR4 0x020
@@ -240,7 +247,7 @@
struct mtk_phy_instance {
void __iomem *port_base;
- const struct device_node *np;
+ struct device_node *np;
union {
struct u2phy_banks u2_banks;
struct u3phy_banks u3_banks;
@@ -250,6 +257,11 @@
struct clk da_ref_clk; /* reference clock of analog phy */
u32 index;
u32 type;
+
+ u32 eye_vrt;
+ u32 eye_term;
+ u32 discth;
+ u32 pre_emphasis;
};
struct mtk_tphy {
@@ -564,6 +576,47 @@
}
}
+static void phy_parse_property(struct mtk_tphy *tphy,
+ struct mtk_phy_instance *instance)
+{
+ ofnode node = np_to_ofnode(instance->np);
+
+ if (instance->type != PHY_TYPE_USB2)
+ return;
+
+ ofnode_read_u32(node, "mediatek,eye-vrt", &instance->eye_vrt);
+ ofnode_read_u32(node, "mediatek,eye-term", &instance->eye_term);
+ ofnode_read_u32(node, "mediatek,discth", &instance->discth);
+ ofnode_read_u32(node, "mediatek,pre-emphasis", &instance->pre_emphasis);
+
+ dev_dbg(tphy->dev, "vrt:%d, term:%d, disc:%d, emp:%d\n",
+ instance->eye_vrt, instance->eye_term,
+ instance->discth, instance->pre_emphasis);
+}
+
+static void u2_phy_props_set(struct mtk_tphy *tphy,
+ struct mtk_phy_instance *instance)
+{
+ struct u2phy_banks *u2_banks = &instance->u2_banks;
+ void __iomem *com = u2_banks->com;
+
+ if (instance->eye_vrt)
+ clrsetbits_le32(com + U3P_USBPHYACR1, PA1_RG_VRT_SEL,
+ FIELD_PREP(PA1_RG_VRT_SEL, instance->eye_vrt));
+
+ if (instance->eye_term)
+ clrsetbits_le32(com + U3P_USBPHYACR1, PA1_RG_TERM_SEL,
+ FIELD_PREP(PA1_RG_TERM_SEL, instance->eye_term));
+
+ if (instance->discth)
+ clrsetbits_le32(com + U3P_USBPHYACR6, PA6_RG_U2_DISCTH,
+ FIELD_PREP(PA6_RG_U2_DISCTH, instance->discth));
+
+ if (instance->pre_emphasis)
+ clrsetbits_le32(com + U3P_USBPHYACR6, PA6_RG_U2_PRE_EMP,
+ FIELD_PREP(PA6_RG_U2_PRE_EMP, instance->pre_emphasis));
+}
+
static int mtk_phy_init(struct phy *phy)
{
struct mtk_tphy *tphy = dev_get_priv(phy->dev);
@@ -586,6 +639,7 @@
switch (instance->type) {
case PHY_TYPE_USB2:
u2_phy_instance_init(tphy, instance);
+ u2_phy_props_set(tphy, instance);
break;
case PHY_TYPE_USB3:
u3_phy_instance_init(tphy, instance);
@@ -692,6 +746,8 @@
return -EINVAL;
}
+ phy_parse_property(tphy, instance);
+
return 0;
}
diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
index 75b3ff4..a1d53cf 100644
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -355,9 +355,11 @@
source "drivers/pinctrl/nexell/Kconfig"
source "drivers/pinctrl/nuvoton/Kconfig"
source "drivers/pinctrl/nxp/Kconfig"
+source "drivers/pinctrl/qcom/Kconfig"
source "drivers/pinctrl/renesas/Kconfig"
source "drivers/pinctrl/rockchip/Kconfig"
source "drivers/pinctrl/sunxi/Kconfig"
+source "drivers/pinctrl/tegra/Kconfig"
source "drivers/pinctrl/uniphier/Kconfig"
source "drivers/pinctrl/starfive/Kconfig"
diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile
index fc1f01a..0e929d8 100644
--- a/drivers/pinctrl/Makefile
+++ b/drivers/pinctrl/Makefile
@@ -13,10 +13,12 @@
obj-$(CONFIG_PINCTRL_INTEL) += intel/
obj-$(CONFIG_ARCH_MTMIPS) += mtmips/
obj-$(CONFIG_ARCH_NPCM) += nuvoton/
+obj-$(CONFIG_PINCTRL_QCOM) += qcom/
obj-$(CONFIG_ARCH_RMOBILE) += renesas/
obj-$(CONFIG_ARCH_RZN1) += renesas/
obj-$(CONFIG_PINCTRL_SANDBOX) += pinctrl-sandbox.o
obj-$(CONFIG_PINCTRL_SUNXI) += sunxi/
+obj-$(CONFIG_$(SPL_)PINCTRL_TEGRA) += tegra/
obj-$(CONFIG_PINCTRL_UNIPHIER) += uniphier/
obj-$(CONFIG_PINCTRL_PIC32) += pinctrl_pic32.o
obj-$(CONFIG_PINCTRL_EXYNOS) += exynos/
diff --git a/drivers/pinctrl/exynos/pinctrl-exynos.c b/drivers/pinctrl/exynos/pinctrl-exynos.c
index 8981854..8a045cd 100644
--- a/drivers/pinctrl/exynos/pinctrl-exynos.c
+++ b/drivers/pinctrl/exynos/pinctrl-exynos.c
@@ -9,11 +9,21 @@
#include <common.h>
#include <dm.h>
#include <errno.h>
-#include <asm/global_data.h>
#include <asm/io.h>
#include "pinctrl-exynos.h"
-DECLARE_GLOBAL_DATA_PTR;
+/* CON, DAT, PUD, DRV */
+const struct samsung_pin_bank_type bank_type_alive = {
+ .fld_width = { 4, 1, 2, 2, },
+ .reg_offset = { 0x00, 0x04, 0x08, 0x0c, },
+};
+
+static const char * const exynos_pinctrl_props[PINCFG_TYPE_NUM] = {
+ [PINCFG_TYPE_FUNC] = "samsung,pin-function",
+ [PINCFG_TYPE_DAT] = "samsung,pin-val",
+ [PINCFG_TYPE_PUD] = "samsung,pin-pud",
+ [PINCFG_TYPE_DRV] = "samsung,pin-drv",
+};
/**
* exynos_pinctrl_setup_peri: setup pinctrl for a peripheral.
@@ -34,30 +44,35 @@
}
}
-/* given a pin-name, return the address of pin config registers */
-static unsigned long pin_to_bank_base(struct udevice *dev, const char *pin_name,
- u32 *pin)
+static void parse_pin(const char *pin_name, u32 *pin, char *bank_name)
+{
+ u32 idx = 0;
+
+ /*
+ * The format of the pin name is <bank_name name>-<pin_number>.
+ * Example: gpa0-4 (gpa0 is the bank_name name and 4 is the pin number.
+ */
+ while (pin_name[idx] != '-') {
+ bank_name[idx] = pin_name[idx];
+ idx++;
+ }
+ bank_name[idx] = '\0';
+ *pin = pin_name[++idx] - '0';
+}
+
+/* given a bank name, find out the pin bank structure */
+static const struct samsung_pin_bank_data *get_bank(struct udevice *dev,
+ const char *bank_name)
{
struct exynos_pinctrl_priv *priv = dev_get_priv(dev);
const struct samsung_pin_ctrl *pin_ctrl_array = priv->pin_ctrl;
const struct samsung_pin_bank_data *bank_data;
- u32 nr_banks, pin_ctrl_idx = 0, idx = 0, bank_base;
- char bank[10];
-
- /*
- * The format of the pin name is <bank name>-<pin_number>.
- * Example: gpa0-4 (gpa0 is the bank name and 4 is the pin number.
- */
- while (pin_name[idx] != '-') {
- bank[idx] = pin_name[idx];
- idx++;
- }
- bank[idx] = '\0';
- *pin = pin_name[++idx] - '0';
+ u32 nr_banks, pin_ctrl_idx = 0, idx = 0;
/* lookup the pin bank data using the pin bank name */
while (true) {
- const struct samsung_pin_ctrl *pin_ctrl = &pin_ctrl_array[pin_ctrl_idx];
+ const struct samsung_pin_ctrl *pin_ctrl =
+ &pin_ctrl_array[pin_ctrl_idx];
nr_banks = pin_ctrl->nr_banks;
if (!nr_banks)
@@ -67,15 +82,29 @@
for (idx = 0; idx < nr_banks; idx++) {
debug("pinctrl[%d] bank_data[%d] name is: %s\n",
pin_ctrl_idx, idx, bank_data[idx].name);
- if (!strcmp(bank, bank_data[idx].name)) {
- bank_base = priv->base + bank_data[idx].offset;
- break;
- }
+ if (!strcmp(bank_name, bank_data[idx].name))
+ return &bank_data[idx];
}
pin_ctrl_idx++;
}
- return bank_base;
+ return NULL;
+}
+
+static void exynos_pinctrl_set_pincfg(unsigned long reg_base, u32 pin_num,
+ u32 val, enum pincfg_type pincfg,
+ const struct samsung_pin_bank_type *type)
+{
+ u32 width = type->fld_width[pincfg];
+ u32 reg_offset = type->reg_offset[pincfg];
+ u32 mask = (1 << width) - 1;
+ u32 shift = pin_num * width;
+ u32 data;
+
+ data = readl(reg_base + reg_offset);
+ data &= ~(mask << shift);
+ data |= val << shift;
+ writel(data, reg_base + reg_offset);
}
/**
@@ -85,50 +114,46 @@
*/
int exynos_pinctrl_set_state(struct udevice *dev, struct udevice *config)
{
- const void *fdt = gd->fdt_blob;
- int node = dev_of_offset(config);
- unsigned int count, idx, pin_num;
- unsigned int pinfunc, pinpud, pindrv;
- unsigned long reg, value;
- const char *name;
+ struct exynos_pinctrl_priv *priv = dev_get_priv(dev);
+ unsigned int count, idx;
+ unsigned int pinvals[PINCFG_TYPE_NUM];
/*
* refer to the following document for the pinctrl bindings
* linux/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
*/
- count = fdt_stringlist_count(fdt, node, "samsung,pins");
+ count = dev_read_string_count(config, "samsung,pins");
if (count <= 0)
return -EINVAL;
- pinfunc = fdtdec_get_int(fdt, node, "samsung,pin-function", -1);
- pinpud = fdtdec_get_int(fdt, node, "samsung,pin-pud", -1);
- pindrv = fdtdec_get_int(fdt, node, "samsung,pin-drv", -1);
+ for (idx = 0; idx < PINCFG_TYPE_NUM; ++idx) {
+ pinvals[idx] = dev_read_u32_default(config,
+ exynos_pinctrl_props[idx], -1);
+ }
+ pinvals[PINCFG_TYPE_DAT] = -1; /* ignore GPIO data register */
for (idx = 0; idx < count; idx++) {
- name = fdt_stringlist_get(fdt, node, "samsung,pins", idx, NULL);
- if (!name)
+ const struct samsung_pin_bank_data *bank;
+ unsigned int pin_num;
+ char bank_name[10];
+ unsigned long reg;
+ const char *name = NULL;
+ int pincfg, err;
+
+ err = dev_read_string_index(config, "samsung,pins", idx, &name);
+ if (err || !name)
continue;
- reg = pin_to_bank_base(dev, name, &pin_num);
- if (pinfunc != -1) {
- value = readl(reg + PIN_CON);
- value &= ~(0xf << (pin_num << 2));
- value |= (pinfunc << (pin_num << 2));
- writel(value, reg + PIN_CON);
- }
+ parse_pin(name, &pin_num, bank_name);
+ bank = get_bank(dev, bank_name);
+ reg = priv->base + bank->offset;
- if (pinpud != -1) {
- value = readl(reg + PIN_PUD);
- value &= ~(0x3 << (pin_num << 1));
- value |= (pinpud << (pin_num << 1));
- writel(value, reg + PIN_PUD);
- }
+ for (pincfg = 0; pincfg < PINCFG_TYPE_NUM; ++pincfg) {
+ unsigned int val = pinvals[pincfg];
- if (pindrv != -1) {
- value = readl(reg + PIN_DRV);
- value &= ~(0x3 << (pin_num << 1));
- value |= (pindrv << (pin_num << 1));
- writel(value, reg + PIN_DRV);
+ if (val != -1)
+ exynos_pinctrl_set_pincfg(reg, pin_num, val,
+ pincfg, bank->type);
}
}
diff --git a/drivers/pinctrl/exynos/pinctrl-exynos.h b/drivers/pinctrl/exynos/pinctrl-exynos.h
index cbc5174..743bb55 100644
--- a/drivers/pinctrl/exynos/pinctrl-exynos.h
+++ b/drivers/pinctrl/exynos/pinctrl-exynos.h
@@ -8,26 +8,52 @@
#ifndef __PINCTRL_EXYNOS_H_
#define __PINCTRL_EXYNOS_H_
-#define PIN_CON 0x00 /* Offset of pin function register */
-#define PIN_DAT 0x04 /* Offset of pin data register */
-#define PIN_PUD 0x08 /* Offset of pin pull up/down config register */
-#define PIN_DRV 0x0C /* Offset of pin drive strength register */
+/**
+ * enum pincfg_type - possible pin configuration types supported.
+ * @PINCFG_TYPE_FUNC: Function configuration.
+ * @PINCFG_TYPE_DAT: Pin value configuration.
+ * @PINCFG_TYPE_PUD: Pull up/down configuration.
+ * @PINCFG_TYPE_DRV: Drive strength configuration.
+ */
+enum pincfg_type {
+ PINCFG_TYPE_FUNC,
+ PINCFG_TYPE_DAT,
+ PINCFG_TYPE_PUD,
+ PINCFG_TYPE_DRV,
+
+ PINCFG_TYPE_NUM
+};
+
+/**
+ * struct samsung_pin_bank_type: pin bank type description
+ * @fld_width: widths of configuration bitfields (0 if unavailable)
+ * @reg_offset: offsets of configuration registers (don't care of width is 0)
+ */
+struct samsung_pin_bank_type {
+ u8 fld_width[PINCFG_TYPE_NUM];
+ u8 reg_offset[PINCFG_TYPE_NUM];
+};
/**
* struct samsung_pin_bank_data: represent a controller pin-bank data.
+ * @type: type of the bank (register offsets and bitfield widths)
* @offset: starting offset of the pin-bank registers.
* @nr_pins: number of pins included in this bank.
* @name: name to be prefixed for each pin in this pin bank.
*/
struct samsung_pin_bank_data {
+ const struct samsung_pin_bank_type *type;
u32 offset;
u8 nr_pins;
const char *name;
};
+extern const struct samsung_pin_bank_type bank_type_alive;
+
#define EXYNOS_PIN_BANK(pins, reg, id) \
{ \
- .offset = reg, \
+ .type = &bank_type_alive, \
+ .offset = reg, \
.nr_pins = pins, \
.name = id \
}
diff --git a/drivers/pinctrl/exynos/pinctrl-exynos7420.c b/drivers/pinctrl/exynos/pinctrl-exynos7420.c
index 07870b7..77d510d 100644
--- a/drivers/pinctrl/exynos/pinctrl-exynos7420.c
+++ b/drivers/pinctrl/exynos/pinctrl-exynos7420.c
@@ -16,6 +16,8 @@
#include "pinctrl-exynos.h"
#define GPD1_OFFSET 0xc0
+#define PIN_CON 0x00 /* Offset of pin function register */
+#define PIN_PUD 0x08 /* Offset of pin pull up/down config register */
static struct exynos_pinctrl_config_data serial2_conf[] = {
{
diff --git a/drivers/pinctrl/mtmips/pinctrl-mtmips-common.h b/drivers/pinctrl/mtmips/pinctrl-mtmips-common.h
index 1f1023e..7a38f8d 100644
--- a/drivers/pinctrl/mtmips/pinctrl-mtmips-common.h
+++ b/drivers/pinctrl/mtmips/pinctrl-mtmips-common.h
@@ -8,8 +8,6 @@
#ifndef _PINCTRL_MTMIPS_COMMON_H_
#define _PINCTRL_MTMIPS_COMMON_H_
-#include <common.h>
-
struct mtmips_pmx_func {
const char *name;
int value;
diff --git a/drivers/pinctrl/qcom/Kconfig b/drivers/pinctrl/qcom/Kconfig
new file mode 100644
index 0000000..2fe6398
--- /dev/null
+++ b/drivers/pinctrl/qcom/Kconfig
@@ -0,0 +1,46 @@
+if ARCH_SNAPDRAGON
+
+config PINCTRL_QCOM
+ depends on PINCTRL_GENERIC
+ def_bool n
+
+menu "Qualcomm pinctrl drivers"
+
+config PINCTRL_QCOM_APQ8016
+ bool "Qualcomm APQ8016 GCC"
+ select PINCTRL_QCOM
+ help
+ Say Y here to enable support for pinctrl on the MSM8916 / APQ8016
+ Snapdragon 410 SoC, as well as the associated GPIO driver.
+
+config PINCTRL_QCOM_APQ8096
+ bool "Qualcomm APQ8096 GCC"
+ select PINCTRL_QCOM
+ help
+ Say Y here to enable support for pinctrl on the MSM8996 / APQ8096
+ Snapdragon 820 SoC, as well as the associated GPIO driver.
+
+config PINCTRL_QCOM_IPQ4019
+ bool "Qualcomm IPQ4019 GCC"
+ select PINCTRL_QCOM
+ help
+ Say Y here to enable support for pinctrl on the IPQ4019 SoC,
+ as well as the associated GPIO driver.
+
+config PINCTRL_QCOM_QCS404
+ bool "Qualcomm QCS404 GCC"
+ select PINCTRL_QCOM
+ help
+ Say Y here to enable support for pinctrl on the Snapdragon QCS404 SoC,
+ as well as the associated GPIO driver.
+
+config PINCTRL_QCOM_SDM845
+ bool "Qualcomm SDM845 GCC"
+ select PINCTRL_QCOM
+ help
+ Say Y here to enable support for pinctrl on the Snapdragon 845 SoC,
+ as well as the associated GPIO driver.
+
+endmenu
+
+endif
diff --git a/drivers/pinctrl/qcom/Makefile b/drivers/pinctrl/qcom/Makefile
new file mode 100644
index 0000000..6d9aca6
--- /dev/null
+++ b/drivers/pinctrl/qcom/Makefile
@@ -0,0 +1,10 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (c) 2023 Linaro Ltd.
+
+obj-$(CONFIG_PINCTRL_QCOM) += pinctrl-qcom.o
+obj-$(CONFIG_PINCTRL_QCOM_APQ8016) += pinctrl-apq8016.o
+obj-$(CONFIG_PINCTRL_QCOM_IPQ4019) += pinctrl-ipq4019.o
+obj-$(CONFIG_PINCTRL_QCOM_APQ8096) += pinctrl-apq8096.o
+obj-$(CONFIG_PINCTRL_QCOM_QCS404) += pinctrl-qcs404.o
+obj-$(CONFIG_PINCTRL_QCOM_SDM845) += pinctrl-sdm845.o
diff --git a/arch/arm/mach-snapdragon/pinctrl-apq8016.c b/drivers/pinctrl/qcom/pinctrl-apq8016.c
similarity index 73%
rename from arch/arm/mach-snapdragon/pinctrl-apq8016.c
rename to drivers/pinctrl/qcom/pinctrl-apq8016.c
index 70c0be0..8149ffd 100644
--- a/arch/arm/mach-snapdragon/pinctrl-apq8016.c
+++ b/drivers/pinctrl/qcom/pinctrl-apq8016.c
@@ -6,8 +6,10 @@
*
*/
-#include "pinctrl-snapdragon.h"
#include <common.h>
+#include <dm.h>
+
+#include "pinctrl-qcom.h"
#define MAX_PIN_NAME_LEN 32
static char pin_name[MAX_PIN_NAME_LEN] __section(".data");
@@ -52,10 +54,23 @@
return msm_pinctrl_functions[selector].val;
}
-struct msm_pinctrl_data apq8016_data = {
- .pin_count = 133,
+static const struct msm_pinctrl_data apq8016_data = {
+ .pin_data = { .pin_count = 133, },
.functions_count = ARRAY_SIZE(msm_pinctrl_functions),
.get_function_name = apq8016_get_function_name,
.get_function_mux = apq8016_get_function_mux,
.get_pin_name = apq8016_get_pin_name,
};
+
+static const struct udevice_id msm_pinctrl_ids[] = {
+ { .compatible = "qcom,msm8916-pinctrl", .data = (ulong)&apq8016_data },
+ { /* Sentinal */ }
+};
+
+U_BOOT_DRIVER(pinctrl_apq8016) = {
+ .name = "pinctrl_apq8016",
+ .id = UCLASS_NOP,
+ .of_match = msm_pinctrl_ids,
+ .ops = &msm_pinctrl_ops,
+ .bind = msm_pinctrl_bind,
+};
diff --git a/arch/arm/mach-snapdragon/pinctrl-apq8096.c b/drivers/pinctrl/qcom/pinctrl-apq8096.c
similarity index 72%
rename from arch/arm/mach-snapdragon/pinctrl-apq8096.c
rename to drivers/pinctrl/qcom/pinctrl-apq8096.c
index 45462f0..d64ab1f 100644
--- a/arch/arm/mach-snapdragon/pinctrl-apq8096.c
+++ b/drivers/pinctrl/qcom/pinctrl-apq8096.c
@@ -6,8 +6,10 @@
*
*/
-#include "pinctrl-snapdragon.h"
#include <common.h>
+#include <dm.h>
+
+#include "pinctrl-qcom.h"
#define MAX_PIN_NAME_LEN 32
static char pin_name[MAX_PIN_NAME_LEN] __section(".data");
@@ -47,10 +49,23 @@
return msm_pinctrl_functions[selector].val;
}
-struct msm_pinctrl_data apq8096_data = {
- .pin_count = 157,
+static const struct msm_pinctrl_data apq8096_data = {
+ .pin_data = { .pin_count = 157, },
.functions_count = ARRAY_SIZE(msm_pinctrl_functions),
.get_function_name = apq8096_get_function_name,
.get_function_mux = apq8096_get_function_mux,
.get_pin_name = apq8096_get_pin_name,
};
+
+static const struct udevice_id msm_pinctrl_ids[] = {
+ { .compatible = "qcom,msm8996-pinctrl", .data = (ulong)&apq8096_data },
+ { /* Sentinal */ }
+};
+
+U_BOOT_DRIVER(pinctrl_apq8096) = {
+ .name = "pinctrl_apq8096",
+ .id = UCLASS_NOP,
+ .of_match = msm_pinctrl_ids,
+ .ops = &msm_pinctrl_ops,
+ .bind = msm_pinctrl_bind,
+};
diff --git a/arch/arm/mach-ipq40xx/pinctrl-ipq4019.c b/drivers/pinctrl/qcom/pinctrl-ipq4019.c
similarity index 71%
rename from arch/arm/mach-ipq40xx/pinctrl-ipq4019.c
rename to drivers/pinctrl/qcom/pinctrl-ipq4019.c
index 3e365f8..2d99f99 100644
--- a/arch/arm/mach-ipq40xx/pinctrl-ipq4019.c
+++ b/drivers/pinctrl/qcom/pinctrl-ipq4019.c
@@ -7,12 +7,13 @@
* Author: Robert Marko <robert.marko@sartura.hr>
*/
-#include "pinctrl-snapdragon.h"
#include <common.h>
+#include <dm.h>
+
+#include "pinctrl-qcom.h"
#define MAX_PIN_NAME_LEN 32
-static char pin_name[MAX_PIN_NAME_LEN];
-
+static char pin_name[MAX_PIN_NAME_LEN] __section(".data");
static const struct pinctrl_function msm_pinctrl_functions[] = {
{"gpio", 0},
{"blsp_uart0_0", 1}, /* Only for GPIO:16,17 */
@@ -26,7 +27,6 @@
{"mdc_0", 1}, /* Only for GPIO7 */
{"mdc_1", 2}, /* Only for GPIO52 */
};
-
static const char *ipq4019_get_function_name(struct udevice *dev,
unsigned int selector)
{
@@ -45,10 +45,23 @@
return msm_pinctrl_functions[selector].val;
}
-struct msm_pinctrl_data ipq4019_data = {
- .pin_count = 100,
+static const struct msm_pinctrl_data ipq4019_data = {
+ .pin_data = { .pin_count = 100, },
.functions_count = ARRAY_SIZE(msm_pinctrl_functions),
.get_function_name = ipq4019_get_function_name,
.get_function_mux = ipq4019_get_function_mux,
.get_pin_name = ipq4019_get_pin_name,
};
+
+static const struct udevice_id msm_pinctrl_ids[] = {
+ { .compatible = "qcom,ipq4019-pinctrl", .data = (ulong)&ipq4019_data },
+ { /* Sentinal */ }
+};
+
+U_BOOT_DRIVER(pinctrl_ipq4019) = {
+ .name = "pinctrl_ipq4019",
+ .id = UCLASS_NOP,
+ .of_match = msm_pinctrl_ids,
+ .ops = &msm_pinctrl_ops,
+ .bind = msm_pinctrl_bind,
+};
diff --git a/arch/arm/mach-snapdragon/pinctrl-snapdragon.c b/drivers/pinctrl/qcom/pinctrl-qcom.c
similarity index 68%
rename from arch/arm/mach-snapdragon/pinctrl-snapdragon.c
rename to drivers/pinctrl/qcom/pinctrl-qcom.c
index 826dc51..dc3d8c4 100644
--- a/arch/arm/mach-snapdragon/pinctrl-snapdragon.c
+++ b/drivers/pinctrl/qcom/pinctrl-qcom.c
@@ -11,17 +11,23 @@
#include <errno.h>
#include <asm/io.h>
#include <dm/device_compat.h>
+#include <dm/device-internal.h>
#include <dm/lists.h>
+#include <asm/gpio.h>
#include <dm/pinctrl.h>
#include <linux/bitops.h>
-#include "pinctrl-snapdragon.h"
+#include <mach/gpio.h>
+
+#include "pinctrl-qcom.h"
struct msm_pinctrl_priv {
phys_addr_t base;
struct msm_pinctrl_data *data;
};
-#define GPIO_CONFIG_OFFSET(x) ((x) * 0x1000)
+#define GPIO_CONFIG_REG(priv, x) \
+ (qcom_pin_offset((priv)->data->pin_data.pin_offsets, x))
+
#define TLMM_GPIO_PULL_MASK GENMASK(1, 0)
#define TLMM_FUNC_SEL_MASK GENMASK(5, 2)
#define TLMM_DRV_STRENGTH_MASK GENMASK(8, 6)
@@ -44,7 +50,7 @@
{
struct msm_pinctrl_priv *priv = dev_get_priv(dev);
- return priv->data->pin_count;
+ return priv->data->pin_data.pin_count;
}
static const char *msm_get_function_name(struct udevice *dev,
@@ -60,7 +66,7 @@
struct msm_pinctrl_priv *priv = dev_get_priv(dev);
priv->base = dev_read_addr(dev);
- priv->data = (struct msm_pinctrl_data *)dev->driver_data;
+ priv->data = (struct msm_pinctrl_data *)dev_get_driver_data(dev);
return priv->base == FDT_ADDR_T_NONE ? -EINVAL : 0;
}
@@ -77,7 +83,7 @@
{
struct msm_pinctrl_priv *priv = dev_get_priv(dev);
- clrsetbits_le32(priv->base + GPIO_CONFIG_OFFSET(pin_selector),
+ clrsetbits_le32(priv->base + GPIO_CONFIG_REG(priv, pin_selector),
TLMM_FUNC_SEL_MASK | TLMM_GPIO_DISABLE,
priv->data->get_function_mux(func_selector) << 2);
return 0;
@@ -91,15 +97,15 @@
switch (param) {
case PIN_CONFIG_DRIVE_STRENGTH:
argument = (argument / 2) - 1;
- clrsetbits_le32(priv->base + GPIO_CONFIG_OFFSET(pin_selector),
+ clrsetbits_le32(priv->base + GPIO_CONFIG_REG(priv, pin_selector),
TLMM_DRV_STRENGTH_MASK, argument << 6);
break;
case PIN_CONFIG_BIAS_DISABLE:
- clrbits_le32(priv->base + GPIO_CONFIG_OFFSET(pin_selector),
+ clrbits_le32(priv->base + GPIO_CONFIG_REG(priv, pin_selector),
TLMM_GPIO_PULL_MASK);
break;
case PIN_CONFIG_BIAS_PULL_UP:
- clrsetbits_le32(priv->base + GPIO_CONFIG_OFFSET(pin_selector),
+ clrsetbits_le32(priv->base + GPIO_CONFIG_REG(priv, pin_selector),
TLMM_GPIO_PULL_MASK, argument);
break;
default:
@@ -109,7 +115,7 @@
return 0;
}
-static struct pinctrl_ops msm_pinctrl_ops = {
+struct pinctrl_ops msm_pinctrl_ops = {
.get_pins_count = msm_get_pins_count,
.get_pin_name = msm_get_pin_name,
.set_state = pinctrl_generic_set_state,
@@ -121,12 +127,24 @@
.get_function_name = msm_get_function_name,
};
-static int msm_pinctrl_bind(struct udevice *dev)
+int msm_pinctrl_bind(struct udevice *dev)
{
ofnode node = dev_ofnode(dev);
+ struct msm_pinctrl_data *data = (struct msm_pinctrl_data *)dev_get_driver_data(dev);
+ struct driver *drv;
+ struct udevice *pinctrl_dev;
const char *name;
int ret;
+ drv = lists_driver_lookup_name("pinctrl_qcom");
+ if (!drv)
+ return -ENOENT;
+
+ ret = device_bind_with_driver_data(dev_get_parent(dev), drv, ofnode_get_name(node), (ulong)data,
+ dev_ofnode(dev), &pinctrl_dev);
+ if (ret)
+ return ret;
+
ofnode_get_property(node, "gpio-controller", &ret);
if (ret < 0)
return 0;
@@ -136,31 +154,27 @@
if (!name)
return -EINVAL;
- /* Bind gpio node */
- ret = device_bind_driver_to_node(dev, "gpio_msm",
- name, node, NULL);
- if (ret)
- return ret;
+ drv = lists_driver_lookup_name("gpio_msm");
+ if (!drv) {
+ printf("Can't find gpio_msm driver\n");
+ return -ENODEV;
+ }
- dev_dbg(dev, "bind %s\n", name);
+ /* Bind gpio device as a child of the pinctrl device */
+ ret = device_bind_with_driver_data(pinctrl_dev, drv,
+ name, (ulong)&data->pin_data, node, NULL);
+ if (ret) {
+ device_unbind(pinctrl_dev);
+ return ret;
+ }
return 0;
}
-static const struct udevice_id msm_pinctrl_ids[] = {
- { .compatible = "qcom,msm8916-pinctrl", .data = (ulong)&apq8016_data },
- { .compatible = "qcom,msm8996-pinctrl", .data = (ulong)&apq8096_data },
- { .compatible = "qcom,sdm845-pinctrl", .data = (ulong)&sdm845_data },
- { .compatible = "qcom,qcs404-pinctrl", .data = (ulong)&qcs404_data },
- { }
-};
-
-U_BOOT_DRIVER(pinctrl_snapdraon) = {
- .name = "pinctrl_msm",
+U_BOOT_DRIVER(pinctrl_qcom) = {
+ .name = "pinctrl_qcom",
.id = UCLASS_PINCTRL,
- .of_match = msm_pinctrl_ids,
.priv_auto = sizeof(struct msm_pinctrl_priv),
.ops = &msm_pinctrl_ops,
.probe = msm_pinctrl_probe,
- .bind = msm_pinctrl_bind,
};
diff --git a/arch/arm/mach-ipq40xx/pinctrl-snapdragon.h b/drivers/pinctrl/qcom/pinctrl-qcom.h
similarity index 66%
rename from arch/arm/mach-ipq40xx/pinctrl-snapdragon.h
rename to drivers/pinctrl/qcom/pinctrl-qcom.h
index b4823a3..07f2eae 100644
--- a/arch/arm/mach-ipq40xx/pinctrl-snapdragon.h
+++ b/drivers/pinctrl/qcom/pinctrl-qcom.h
@@ -5,11 +5,16 @@
* (C) Copyright 2018 Ramon Fried <ramon.fried@gmail.com>
*
*/
-#ifndef _PINCTRL_SNAPDRAGON_H
-#define _PINCTRL_SNAPDRAGON_H
+#ifndef _PINCTRL_QCOM_H
+#define _PINCTRL_QCOM_H
+
+#include <asm/types.h>
+#include <mach/gpio.h>
+
+struct udevice;
struct msm_pinctrl_data {
- int pin_count;
+ struct msm_pin_data pin_data;
int functions_count;
const char *(*get_function_name)(struct udevice *dev,
unsigned int selector);
@@ -23,6 +28,8 @@
int val;
};
-extern struct msm_pinctrl_data ipq4019_data;
+extern struct pinctrl_ops msm_pinctrl_ops;
+
+int msm_pinctrl_bind(struct udevice *dev);
#endif
diff --git a/arch/arm/mach-snapdragon/pinctrl-qcs404.c b/drivers/pinctrl/qcom/pinctrl-qcs404.c
similarity index 76%
rename from arch/arm/mach-snapdragon/pinctrl-qcs404.c
rename to drivers/pinctrl/qcom/pinctrl-qcs404.c
index a6e53c4..ac00afa 100644
--- a/arch/arm/mach-snapdragon/pinctrl-qcs404.c
+++ b/drivers/pinctrl/qcom/pinctrl-qcs404.c
@@ -5,8 +5,10 @@
* (C) Copyright 2022 Sumit Garg <sumit.garg@linaro.org>
*/
-#include "pinctrl-snapdragon.h"
#include <common.h>
+#include <dm.h>
+
+#include "pinctrl-qcom.h"
#define MAX_PIN_NAME_LEN 32
static char pin_name[MAX_PIN_NAME_LEN] __section(".data");
@@ -59,10 +61,23 @@
return msm_pinctrl_functions[selector].val;
}
-struct msm_pinctrl_data qcs404_data = {
- .pin_count = 126,
+static struct msm_pinctrl_data qcs404_data = {
+ .pin_data = { .pin_count = 126, },
.functions_count = ARRAY_SIZE(msm_pinctrl_functions),
.get_function_name = qcs404_get_function_name,
.get_function_mux = qcs404_get_function_mux,
.get_pin_name = qcs404_get_pin_name,
};
+
+static const struct udevice_id msm_pinctrl_ids[] = {
+ { .compatible = "qcom,qcs404-pinctrl", .data = (ulong)&qcs404_data },
+ { /* Sentinal */ }
+};
+
+U_BOOT_DRIVER(pinctrl_qcs404) = {
+ .name = "pinctrl_qcs404",
+ .id = UCLASS_NOP,
+ .of_match = msm_pinctrl_ids,
+ .ops = &msm_pinctrl_ops,
+ .bind = msm_pinctrl_bind,
+};
diff --git a/drivers/pinctrl/qcom/pinctrl-sdm845.c b/drivers/pinctrl/qcom/pinctrl-sdm845.c
new file mode 100644
index 0000000..9f0f408
--- /dev/null
+++ b/drivers/pinctrl/qcom/pinctrl-sdm845.c
@@ -0,0 +1,100 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Qualcomm SDM845 pinctrl
+ *
+ * (C) Copyright 2021 Dzmitry Sankouski <dsankouski@gmail.com>
+ * (C) Copyright 2023 Linaro Ltd.
+ *
+ */
+
+#include <common.h>
+#include <dm.h>
+
+#include "pinctrl-qcom.h"
+
+#define NORTH 0x00500000
+#define SOUTH 0x00900000
+#define EAST 0x00100000
+
+#define MAX_PIN_NAME_LEN 32
+static char pin_name[MAX_PIN_NAME_LEN] __section(".data");
+
+static const struct pinctrl_function msm_pinctrl_functions[] = {
+ {"qup9", 1},
+ {"gpio", 0},
+};
+
+static const unsigned int sdm845_pin_offsets[] = {
+ [0] = EAST, [1] = EAST, [2] = EAST, [3] = EAST, [4] = NORTH,
+ [5] = NORTH, [6] = NORTH, [7] = NORTH, [8] = EAST, [9] = EAST,
+ [10] = EAST, [11] = EAST, [12] = SOUTH, [13] = SOUTH, [14] = SOUTH,
+ [15] = SOUTH, [16] = SOUTH, [17] = SOUTH, [18] = SOUTH, [19] = SOUTH,
+ [20] = SOUTH, [21] = SOUTH, [22] = SOUTH, [23] = SOUTH, [24] = SOUTH,
+ [25] = SOUTH, [26] = SOUTH, [27] = EAST, [28] = EAST, [29] = EAST,
+ [30] = EAST, [31] = NORTH, [32] = NORTH, [33] = NORTH, [34] = NORTH,
+ [35] = SOUTH, [36] = SOUTH, [37] = SOUTH, [38] = NORTH, [39] = EAST,
+ [40] = SOUTH, [41] = EAST, [42] = EAST, [43] = EAST, [44] = EAST,
+ [45] = EAST, [46] = EAST, [47] = EAST, [48] = EAST, [49] = NORTH,
+ [50] = NORTH, [51] = NORTH, [52] = NORTH, [53] = NORTH, [54] = NORTH,
+ [55] = NORTH, [56] = NORTH, [57] = NORTH, [58] = NORTH, [59] = NORTH,
+ [60] = NORTH, [61] = NORTH, [62] = NORTH, [63] = NORTH, [64] = NORTH,
+ [65] = NORTH, [66] = NORTH, [67] = NORTH, [68] = NORTH, [69] = EAST,
+ [70] = EAST, [71] = EAST, [72] = EAST, [73] = EAST, [74] = EAST,
+ [75] = EAST, [76] = EAST, [77] = EAST, [78] = EAST, [79] = NORTH,
+ [80] = NORTH, [81] = NORTH, [82] = NORTH, [83] = NORTH, [84] = NORTH,
+ [85] = EAST, [86] = EAST, [87] = EAST, [88] = EAST, [89] = SOUTH,
+ [90] = SOUTH, [91] = SOUTH, [92] = SOUTH, [93] = SOUTH, [94] = SOUTH,
+ [95] = SOUTH, [96] = SOUTH, [97] = NORTH, [98] = NORTH, [99] = NORTH,
+ [100] = NORTH, [101] = NORTH, [102] = NORTH, [103] = NORTH, [104] = NORTH,
+ [105] = NORTH, [106] = NORTH, [107] = NORTH, [108] = NORTH, [109] = NORTH,
+ [110] = NORTH, [111] = NORTH, [112] = NORTH, [113] = NORTH, [114] = NORTH,
+ [115] = NORTH, [116] = NORTH, [117] = NORTH, [118] = NORTH, [119] = NORTH,
+ [120] = NORTH, [121] = NORTH, [122] = EAST, [123] = EAST, [124] = EAST,
+ [125] = EAST, [126] = EAST, [127] = NORTH, [128] = NORTH, [129] = NORTH,
+ [130] = NORTH, [131] = NORTH, [132] = NORTH, [133] = NORTH, [134] = NORTH,
+ [135] = NORTH, [136] = NORTH, [137] = NORTH, [138] = NORTH, [139] = NORTH,
+ [140] = NORTH, [141] = NORTH, [142] = NORTH, [143] = NORTH, [144] = NORTH,
+ [145] = NORTH, [146] = NORTH, [147] = NORTH, [148] = NORTH, [149] = NORTH,
+};
+
+static const char *sdm845_get_function_name(struct udevice *dev,
+ unsigned int selector)
+{
+ return msm_pinctrl_functions[selector].name;
+}
+
+static const char *sdm845_get_pin_name(struct udevice *dev,
+ unsigned int selector)
+{
+ snprintf(pin_name, MAX_PIN_NAME_LEN, "gpio%u", selector);
+ return pin_name;
+}
+
+static unsigned int sdm845_get_function_mux(unsigned int selector)
+{
+ return msm_pinctrl_functions[selector].val;
+}
+
+static struct msm_pinctrl_data sdm845_data = {
+ .pin_data = {
+ .pin_offsets = sdm845_pin_offsets,
+ .pin_count = ARRAY_SIZE(sdm845_pin_offsets),
+ },
+ .functions_count = ARRAY_SIZE(msm_pinctrl_functions),
+ .get_function_name = sdm845_get_function_name,
+ .get_function_mux = sdm845_get_function_mux,
+ .get_pin_name = sdm845_get_pin_name,
+};
+
+static const struct udevice_id msm_pinctrl_ids[] = {
+ { .compatible = "qcom,sdm845-pinctrl", .data = (ulong)&sdm845_data },
+ { /* Sentinal */ }
+};
+
+U_BOOT_DRIVER(pinctrl_sdm845) = {
+ .name = "pinctrl_sdm845",
+ .id = UCLASS_NOP,
+ .of_match = msm_pinctrl_ids,
+ .ops = &msm_pinctrl_ops,
+ .bind = msm_pinctrl_bind,
+};
diff --git a/drivers/pinctrl/renesas/pfc-r8a7790.c b/drivers/pinctrl/renesas/pfc-r8a7790.c
index 7203648..e1811c4 100644
--- a/drivers/pinctrl/renesas/pfc-r8a7790.c
+++ b/drivers/pinctrl/renesas/pfc-r8a7790.c
@@ -8,7 +8,6 @@
* Copyright (C) 2012 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <dm/pinctrl.h>
diff --git a/drivers/pinctrl/renesas/pfc-r8a7791.c b/drivers/pinctrl/renesas/pfc-r8a7791.c
index b25453e..fa94a51 100644
--- a/drivers/pinctrl/renesas/pfc-r8a7791.c
+++ b/drivers/pinctrl/renesas/pfc-r8a7791.c
@@ -6,7 +6,6 @@
* Copyright (C) 2014-2017 Cogent Embedded, Inc.
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <dm/pinctrl.h>
diff --git a/drivers/pinctrl/renesas/pfc-r8a7792.c b/drivers/pinctrl/renesas/pfc-r8a7792.c
index 08f1f97..7c1e6d4 100644
--- a/drivers/pinctrl/renesas/pfc-r8a7792.c
+++ b/drivers/pinctrl/renesas/pfc-r8a7792.c
@@ -6,7 +6,6 @@
* Copyright (C) 2016 Cogent Embedded, Inc., <source@cogentembedded.com>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <dm/pinctrl.h>
diff --git a/drivers/pinctrl/renesas/pfc-r8a7794.c b/drivers/pinctrl/renesas/pfc-r8a7794.c
index e5d125c..29eab26 100644
--- a/drivers/pinctrl/renesas/pfc-r8a7794.c
+++ b/drivers/pinctrl/renesas/pfc-r8a7794.c
@@ -7,7 +7,6 @@
* Copyright (C) 2015-2017 Cogent Embedded, Inc. <source@cogentembedded.com>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <dm/pinctrl.h>
diff --git a/drivers/pinctrl/renesas/pfc-r8a77951.c b/drivers/pinctrl/renesas/pfc-r8a77951.c
index 5d1c81c..81568ae 100644
--- a/drivers/pinctrl/renesas/pfc-r8a77951.c
+++ b/drivers/pinctrl/renesas/pfc-r8a77951.c
@@ -5,7 +5,6 @@
* Copyright (C) 2015-2019 Renesas Electronics Corporation
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <dm/pinctrl.h>
diff --git a/drivers/pinctrl/renesas/pfc-r8a7796.c b/drivers/pinctrl/renesas/pfc-r8a7796.c
index 163d180..3de43fe 100644
--- a/drivers/pinctrl/renesas/pfc-r8a7796.c
+++ b/drivers/pinctrl/renesas/pfc-r8a7796.c
@@ -11,7 +11,6 @@
* Copyright (C) 2015 Renesas Electronics Corporation
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <dm/pinctrl.h>
diff --git a/drivers/pinctrl/renesas/pfc-r8a77965.c b/drivers/pinctrl/renesas/pfc-r8a77965.c
index 377143d..3a6813c 100644
--- a/drivers/pinctrl/renesas/pfc-r8a77965.c
+++ b/drivers/pinctrl/renesas/pfc-r8a77965.c
@@ -12,7 +12,6 @@
* Copyright (C) 2015 Renesas Electronics Corporation
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <dm/pinctrl.h>
diff --git a/drivers/pinctrl/renesas/pfc-r8a77970.c b/drivers/pinctrl/renesas/pfc-r8a77970.c
index 1cc6fa4..3c9c060 100644
--- a/drivers/pinctrl/renesas/pfc-r8a77970.c
+++ b/drivers/pinctrl/renesas/pfc-r8a77970.c
@@ -12,7 +12,6 @@
* Copyright (C) 2015 Renesas Electronics Corporation
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <dm/pinctrl.h>
diff --git a/drivers/pinctrl/renesas/pfc-r8a77980.c b/drivers/pinctrl/renesas/pfc-r8a77980.c
index 523faa0..14a4b4d 100644
--- a/drivers/pinctrl/renesas/pfc-r8a77980.c
+++ b/drivers/pinctrl/renesas/pfc-r8a77980.c
@@ -12,7 +12,6 @@
* Copyright (C) 2015 Renesas Electronics Corporation
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <dm/pinctrl.h>
diff --git a/drivers/pinctrl/renesas/pfc-r8a77990.c b/drivers/pinctrl/renesas/pfc-r8a77990.c
index 215a19e..e3a9c5e 100644
--- a/drivers/pinctrl/renesas/pfc-r8a77990.c
+++ b/drivers/pinctrl/renesas/pfc-r8a77990.c
@@ -11,7 +11,6 @@
* Copyright (C) 2016-2017 Renesas Electronics Corp.
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <dm/pinctrl.h>
diff --git a/drivers/pinctrl/renesas/pfc-r8a77995.c b/drivers/pinctrl/renesas/pfc-r8a77995.c
index c0d6993..eccf5c1 100644
--- a/drivers/pinctrl/renesas/pfc-r8a77995.c
+++ b/drivers/pinctrl/renesas/pfc-r8a77995.c
@@ -11,7 +11,6 @@
* Copyright (C) 2015 Renesas Electronics Corporation
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <dm/pinctrl.h>
diff --git a/drivers/pinctrl/renesas/pfc-r8a779a0.c b/drivers/pinctrl/renesas/pfc-r8a779a0.c
index 3c4b03b..6f89838 100644
--- a/drivers/pinctrl/renesas/pfc-r8a779a0.c
+++ b/drivers/pinctrl/renesas/pfc-r8a779a0.c
@@ -7,7 +7,6 @@
* This file is based on the drivers/pinctrl/renesas/pfc-r8a7795.c
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <dm/pinctrl.h>
diff --git a/drivers/pinctrl/renesas/pfc-r8a779f0.c b/drivers/pinctrl/renesas/pfc-r8a779f0.c
index 5123e26..de5ec6c 100644
--- a/drivers/pinctrl/renesas/pfc-r8a779f0.c
+++ b/drivers/pinctrl/renesas/pfc-r8a779f0.c
@@ -7,7 +7,6 @@
* This file is based on the drivers/pinctrl/renesas/pfc-r8a779a0.c
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <dm/pinctrl.h>
diff --git a/drivers/pinctrl/renesas/pfc-r8a779g0.c b/drivers/pinctrl/renesas/pfc-r8a779g0.c
index 20498a1..6749c15 100644
--- a/drivers/pinctrl/renesas/pfc-r8a779g0.c
+++ b/drivers/pinctrl/renesas/pfc-r8a779g0.c
@@ -7,7 +7,6 @@
* This file is based on the drivers/pinctrl/renesas/pfc-r8a779a0.c
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <dm/pinctrl.h>
diff --git a/drivers/pinctrl/renesas/pfc.c b/drivers/pinctrl/renesas/pfc.c
index 3ac25cb..4ceb5db 100644
--- a/drivers/pinctrl/renesas/pfc.c
+++ b/drivers/pinctrl/renesas/pfc.c
@@ -11,7 +11,6 @@
#define DRV_NAME "sh-pfc"
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <dm/device_compat.h>
diff --git a/drivers/pinctrl/renesas/pinctrl-rza1.c b/drivers/pinctrl/renesas/pinctrl-rza1.c
index a445cdb..2d993be 100644
--- a/drivers/pinctrl/renesas/pinctrl-rza1.c
+++ b/drivers/pinctrl/renesas/pinctrl-rza1.c
@@ -5,7 +5,6 @@
* Copyright (C) 2019 Marek Vasut <marek.vasut@gmail.com>
*/
-#include <common.h>
#include <dm.h>
#include <asm/global_data.h>
#include <dm/lists.h>
diff --git a/drivers/pinctrl/tegra/Kconfig b/drivers/pinctrl/tegra/Kconfig
new file mode 100644
index 0000000..669d8e2
--- /dev/null
+++ b/drivers/pinctrl/tegra/Kconfig
@@ -0,0 +1,18 @@
+# SPDX-License-Identifier: GPL-2.0
+
+config PINCTRL_TEGRA
+ bool "Nvidia Tegra pinctrl driver"
+ depends on DM
+ help
+ Support pin multiplexing control on Nvidia Tegra SoCs.
+ The driver is an overlay to existing driver and allows
+ the usage of dedicated device tree node which contains
+ full description of each pin.
+
+config SPL_PINCTRL_TEGRA
+ bool "Nvidia Tegra SPL pinctrl driver"
+ depends on SPL_PINCTRL
+ help
+ Enables support of pre-DM version of pin multiplexing
+ control driver used on SPL stage for board setup and
+ available for backwards compatibility purpose.
diff --git a/drivers/pinctrl/tegra/Makefile b/drivers/pinctrl/tegra/Makefile
new file mode 100644
index 0000000..75d3cab
--- /dev/null
+++ b/drivers/pinctrl/tegra/Makefile
@@ -0,0 +1,16 @@
+# SPDX-License-Identifier: GPL-2.0
+ifndef CONFIG_SPL_BUILD
+ifdef CONFIG_TEGRA20
+obj-y += pinctrl-tegra20.o
+else
+obj-y += pinctrl-tegra.o
+endif
+endif
+
+obj-y += pinmux-common.o
+
+obj-$(CONFIG_TEGRA20) += pinmux-tegra20.o funcmux-tegra20.o
+obj-$(CONFIG_TEGRA30) += pinmux-tegra30.o funcmux-tegra30.o
+obj-$(CONFIG_TEGRA114) += pinmux-tegra114.o funcmux-tegra114.o
+obj-$(CONFIG_TEGRA124) += pinmux-tegra124.o funcmux-tegra124.o
+obj-$(CONFIG_TEGRA210) += pinmux-tegra210.o funcmux-tegra210.o
diff --git a/arch/arm/mach-tegra/tegra114/funcmux.c b/drivers/pinctrl/tegra/funcmux-tegra114.c
similarity index 100%
rename from arch/arm/mach-tegra/tegra114/funcmux.c
rename to drivers/pinctrl/tegra/funcmux-tegra114.c
diff --git a/arch/arm/mach-tegra/tegra124/funcmux.c b/drivers/pinctrl/tegra/funcmux-tegra124.c
similarity index 100%
rename from arch/arm/mach-tegra/tegra124/funcmux.c
rename to drivers/pinctrl/tegra/funcmux-tegra124.c
diff --git a/arch/arm/mach-tegra/tegra20/funcmux.c b/drivers/pinctrl/tegra/funcmux-tegra20.c
similarity index 100%
rename from arch/arm/mach-tegra/tegra20/funcmux.c
rename to drivers/pinctrl/tegra/funcmux-tegra20.c
diff --git a/arch/arm/mach-tegra/tegra210/funcmux.c b/drivers/pinctrl/tegra/funcmux-tegra210.c
similarity index 100%
rename from arch/arm/mach-tegra/tegra210/funcmux.c
rename to drivers/pinctrl/tegra/funcmux-tegra210.c
diff --git a/arch/arm/mach-tegra/tegra30/funcmux.c b/drivers/pinctrl/tegra/funcmux-tegra30.c
similarity index 100%
rename from arch/arm/mach-tegra/tegra30/funcmux.c
rename to drivers/pinctrl/tegra/funcmux-tegra30.c
diff --git a/drivers/pinctrl/tegra/pinctrl-tegra.c b/drivers/pinctrl/tegra/pinctrl-tegra.c
new file mode 100644
index 0000000..ad7112a
--- /dev/null
+++ b/drivers/pinctrl/tegra/pinctrl-tegra.c
@@ -0,0 +1,248 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2023
+ * Svyatoslav Ryhel <clamor95@gmail.com>
+ */
+
+#include <dm.h>
+#include <dm/device_compat.h>
+#include <dm/pinctrl.h>
+#include <stdlib.h>
+
+#include <asm/arch/pinmux.h>
+
+static void tegra_pinctrl_set_drive(struct udevice *config, int drvcnt)
+{
+ struct pmux_drvgrp_config *drive_group;
+ int i, ret, pad_id;
+ const char **pads;
+
+ drive_group = kmalloc_array(drvcnt, sizeof(*drive_group), GFP_KERNEL);
+ if (!drive_group) {
+ log_debug("%s: cannot allocate drive group array\n", __func__);
+ return;
+ }
+
+ drive_group[0].slwf = dev_read_u32_default(config, "nvidia,slew-rate-falling", 0);
+ drive_group[0].slwr = dev_read_u32_default(config, "nvidia,slew-rate-rising", 0);
+ drive_group[0].drvup = dev_read_u32_default(config, "nvidia,pull-up-strength", 0);
+ drive_group[0].drvdn = dev_read_u32_default(config, "nvidia,pull-down-strength", 0);
+#ifdef TEGRA_PMX_GRPS_HAVE_LPMD
+ drive_group[0].lpmd = dev_read_u32_default(config, "nvidia,low-power-mode", 0);
+#endif
+#ifdef TEGRA_PMX_GRPS_HAVE_SCHMT
+ drive_group[0].schmt = dev_read_u32_default(config, "nvidia,schmitt", 0);
+#endif
+#ifdef TEGRA_PMX_GRPS_HAVE_HSM
+ drive_group[0].hsm = dev_read_u32_default(config, "nvidia,high-speed-mode", 0);
+#endif
+
+ for (i = 1; i < drvcnt; i++)
+ memcpy(&drive_group[i], &drive_group[0], sizeof(drive_group[0]));
+
+ ret = dev_read_string_list(config, "nvidia,pins", &pads);
+ if (ret < 0) {
+ log_debug("%s: could not parse property nvidia,pins\n", __func__);
+ goto exit;
+ }
+
+ for (i = 0; i < drvcnt; i++) {
+ for (pad_id = 0; pad_id < PMUX_DRVGRP_COUNT; pad_id++)
+ if (tegra_pinctrl_to_drvgrp[pad_id])
+ if (!strcmp(pads[i], tegra_pinctrl_to_drvgrp[pad_id])) {
+ drive_group[i].drvgrp = pad_id;
+ break;
+ }
+
+ debug("%s drvmap: %d, %d, %d, %d, %d\n", pads[i],
+ drive_group[i].drvgrp, drive_group[i].slwf,
+ drive_group[i].slwr, drive_group[i].drvup,
+ drive_group[i].drvdn);
+ }
+
+ pinmux_config_drvgrp_table(drive_group, drvcnt);
+
+ free(pads);
+exit:
+ kfree(drive_group);
+}
+
+static void tegra_pinctrl_set_pin(struct udevice *config, int pincnt)
+{
+ struct pmux_pingrp_config *pinmux_group;
+ int i, ret, pin_id;
+ const char *function;
+ const char **pins;
+
+ pinmux_group = kmalloc_array(pincnt, sizeof(*pinmux_group), GFP_KERNEL);
+ if (!pinmux_group) {
+ log_debug("%s: cannot allocate pinmux group array\n", __func__);
+ return;
+ }
+
+ /* decode function id and fill the first copy of pmux_pingrp_config */
+ function = dev_read_string(config, "nvidia,function");
+ if (function)
+ for (i = 0; i < PMUX_FUNC_COUNT; i++)
+ if (tegra_pinctrl_to_func[i])
+ if (!strcmp(function, tegra_pinctrl_to_func[i]))
+ break;
+
+ pinmux_group[0].func = i;
+
+ pinmux_group[0].pull = dev_read_u32_default(config, "nvidia,pull", 0);
+ pinmux_group[0].tristate = dev_read_u32_default(config, "nvidia,tristate", 0);
+#ifdef TEGRA_PMX_PINS_HAVE_E_INPUT
+ pinmux_group[0].io = dev_read_u32_default(config, "nvidia,enable-input", 0);
+#endif
+#ifdef TEGRA_PMX_PINS_HAVE_LOCK
+ pinmux_group[0].lock = dev_read_u32_default(config, "nvidia,lock", 0);
+#endif
+#ifdef TEGRA_PMX_PINS_HAVE_OD
+ pinmux_group[0].od = dev_read_u32_default(config, "nvidia,open-drain", 0);
+#endif
+#ifdef TEGRA_PMX_PINS_HAVE_IO_RESET
+ pinmux_group[0].ioreset = dev_read_u32_default(config, "nvidia,io-reset", 0);
+#endif
+#ifdef TEGRA_PMX_PINS_HAVE_RCV_SEL
+ pinmux_group[0].rcv_sel = dev_read_u32_default(config, "nvidia,rcv-sel", 0);
+#endif
+#ifdef TEGRA_PMX_PINS_HAVE_E_IO_HV
+ pinmux_group[0].e_io_hv = dev_read_u32_default(config, "nvidia,io-hv", 0);
+#endif
+#ifdef TEGRA_PMX_PINS_HAVE_SCHMT
+ pinmux_group[0].schmt = dev_read_u32_default(config, "nvidia,schmitt", 0);
+#endif
+#ifdef TEGRA_PMX_PINS_HAVE_HSM
+ pinmux_group[0].hsm = dev_read_u32_default(config, "nvidia,high-speed-mode", 0);
+#endif
+
+ for (i = 1; i < pincnt; i++)
+ memcpy(&pinmux_group[i], &pinmux_group[0], sizeof(pinmux_group[0]));
+
+ ret = dev_read_string_list(config, "nvidia,pins", &pins);
+ if (ret < 0) {
+ log_debug("%s: could not parse property nvidia,pins\n", __func__);
+ goto exit;
+ }
+
+ for (i = 0; i < pincnt; i++) {
+ for (pin_id = 0; pin_id < PMUX_PINGRP_COUNT; pin_id++)
+ if (tegra_pinctrl_to_pingrp[pin_id])
+ if (!strcmp(pins[i], tegra_pinctrl_to_pingrp[pin_id])) {
+ pinmux_group[i].pingrp = pin_id;
+ break;
+ }
+
+ debug("%s pinmap: %d, %d, %d, %d\n", pins[i],
+ pinmux_group[i].pingrp, pinmux_group[i].func,
+ pinmux_group[i].pull, pinmux_group[i].tristate);
+ }
+
+ pinmux_config_pingrp_table(pinmux_group, pincnt);
+
+ free(pins);
+exit:
+ kfree(pinmux_group);
+}
+
+static int tegra_pinctrl_set_state(struct udevice *dev, struct udevice *config)
+{
+ struct udevice *child;
+ int ret;
+ const char *name;
+
+ device_foreach_child(child, config) {
+ /* Pinmux node can contain pins and drives */
+ ret = dev_read_string_index(child, "nvidia,pins", 0,
+ &name);
+ if (ret < 0) {
+ log_debug("%s: could not parse property nvidia,pins\n", __func__);
+ return ret;
+ }
+
+ ret = dev_read_string_count(child, "nvidia,pins");
+ if (ret < 0) {
+ log_debug("%s: could not count nvidia,pins\n", __func__);
+ return ret;
+ }
+
+ if (!strncmp(name, "drive_", 6))
+ /* Drive node is detected */
+ tegra_pinctrl_set_drive(child, ret);
+ else
+ /* Pin node is detected */
+ tegra_pinctrl_set_pin(child, ret);
+ }
+
+ return 0;
+}
+
+static int tegra_pinctrl_get_pins_count(struct udevice *dev)
+{
+ return PMUX_PINGRP_COUNT;
+}
+
+static const char *tegra_pinctrl_get_pin_name(struct udevice *dev,
+ unsigned int selector)
+{
+ return tegra_pinctrl_to_pingrp[selector];
+}
+
+static int tegra_pinctrl_get_groups_count(struct udevice *dev)
+{
+ return PMUX_DRVGRP_COUNT;
+}
+
+static const char *tegra_pinctrl_get_group_name(struct udevice *dev,
+ unsigned int selector)
+{
+ return tegra_pinctrl_to_drvgrp[selector];
+}
+
+static int tegra_pinctrl_get_functions_count(struct udevice *dev)
+{
+ return PMUX_FUNC_COUNT;
+}
+
+static const char *tegra_pinctrl_get_function_name(struct udevice *dev,
+ unsigned int selector)
+{
+ return tegra_pinctrl_to_func[selector];
+}
+
+const struct pinctrl_ops tegra_pinctrl_ops = {
+ .get_pins_count = tegra_pinctrl_get_pins_count,
+ .get_pin_name = tegra_pinctrl_get_pin_name,
+ .get_groups_count = tegra_pinctrl_get_groups_count,
+ .get_group_name = tegra_pinctrl_get_group_name,
+ .get_functions_count = tegra_pinctrl_get_functions_count,
+ .get_function_name = tegra_pinctrl_get_function_name,
+ .set_state = tegra_pinctrl_set_state,
+};
+
+static int tegra_pinctrl_bind(struct udevice *dev)
+{
+ /*
+ * Make sure that the pinctrl driver gets probed after binding
+ * to provide initial configuration and assure that further
+ * probed devices are working correctly.
+ */
+ dev_or_flags(dev, DM_FLAG_PROBE_AFTER_BIND);
+
+ return 0;
+}
+
+static const struct udevice_id tegra_pinctrl_ids[] = {
+ { .compatible = "nvidia,tegra30-pinmux" },
+ { .compatible = "nvidia,tegra114-pinmux" },
+ { },
+};
+
+U_BOOT_DRIVER(tegra_pinctrl) = {
+ .name = "tegra_pinctrl",
+ .id = UCLASS_PINCTRL,
+ .of_match = tegra_pinctrl_ids,
+ .bind = tegra_pinctrl_bind,
+ .ops = &tegra_pinctrl_ops,
+};
diff --git a/drivers/pinctrl/tegra/pinctrl-tegra20.c b/drivers/pinctrl/tegra/pinctrl-tegra20.c
new file mode 100644
index 0000000..d5171b8
--- /dev/null
+++ b/drivers/pinctrl/tegra/pinctrl-tegra20.c
@@ -0,0 +1,177 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2023
+ * Svyatoslav Ryhel <clamor95@gmail.com>
+ */
+
+#include <dm.h>
+#include <dm/device_compat.h>
+#include <dm/pinctrl.h>
+#include <stdlib.h>
+
+#include <asm/arch/pinmux.h>
+
+static void tegra_pinctrl_set_pin(struct udevice *config)
+{
+ int i, count, pin_id, ret;
+ int pull, tristate;
+ const char **pins;
+
+ ret = dev_read_u32(config, "nvidia,pull", &pull);
+ if (ret)
+ pull = ret;
+
+ ret = dev_read_u32(config, "nvidia,tristate", &tristate);
+ if (ret)
+ tristate = ret;
+
+ count = dev_read_string_list(config, "nvidia,pins", &pins);
+ if (count < 0) {
+ log_debug("%s: could not parse property nvidia,pins\n", __func__);
+ return;
+ }
+
+ for (i = 0; i < count; i++) {
+ for (pin_id = 0; pin_id < PMUX_PINGRP_COUNT; pin_id++)
+ if (tegra_pinctrl_to_pingrp[pin_id])
+ if (!strcmp(pins[i], tegra_pinctrl_to_pingrp[pin_id]))
+ break;
+
+ if (pull >= 0)
+ pinmux_set_pullupdown(pin_id, pull);
+
+ if (tristate >= 0) {
+ if (!tristate)
+ pinmux_tristate_disable(pin_id);
+ else
+ pinmux_tristate_enable(pin_id);
+ }
+ }
+
+ free(pins);
+}
+
+static void tegra_pinctrl_set_func(struct udevice *config)
+{
+ int i, count, func_id, pin_id;
+ const char *function;
+ const char **pins;
+
+ function = dev_read_string(config, "nvidia,function");
+ if (function)
+ for (i = 0; i < PMUX_FUNC_COUNT; i++)
+ if (tegra_pinctrl_to_func[i])
+ if (!strcmp(function, tegra_pinctrl_to_func[i]))
+ break;
+
+ func_id = i;
+
+ count = dev_read_string_list(config, "nvidia,pins", &pins);
+ if (count < 0) {
+ log_debug("%s: could not parse property nvidia,pins\n", __func__);
+ return;
+ }
+
+ for (i = 0; i < count; i++) {
+ for (pin_id = 0; pin_id < PMUX_PINGRP_COUNT; pin_id++)
+ if (tegra_pinctrl_to_pingrp[pin_id])
+ if (!strcmp(pins[i], tegra_pinctrl_to_pingrp[pin_id]))
+ break;
+
+ debug("%s(%d) muxed to %s(%d)\n", pins[i], pin_id, function, func_id);
+
+ pinmux_set_func(pin_id, func_id);
+ }
+
+ free(pins);
+}
+
+static int tegra_pinctrl_set_state(struct udevice *dev, struct udevice *config)
+{
+ struct udevice *child;
+
+ device_foreach_child(child, config) {
+ /*
+ * Tegra20 pinmux is set differently then any other
+ * Tegra SOC. Nodes are arranged by function muxing,
+ * then actual pins setup (with node name prefix
+ * conf_*) and then drive setup.
+ */
+ if (!strncmp(child->name, "conf_", 5))
+ tegra_pinctrl_set_pin(child);
+ else if (!strncmp(child->name, "drive_", 6))
+ debug("%s: drive configuration is not supported\n", __func__);
+ else
+ tegra_pinctrl_set_func(child);
+ }
+
+ return 0;
+}
+
+static int tegra_pinctrl_get_pins_count(struct udevice *dev)
+{
+ return PMUX_PINGRP_COUNT;
+}
+
+static const char *tegra_pinctrl_get_pin_name(struct udevice *dev,
+ unsigned int selector)
+{
+ return tegra_pinctrl_to_pingrp[selector];
+}
+
+static int tegra_pinctrl_get_groups_count(struct udevice *dev)
+{
+ return PMUX_DRVGRP_COUNT;
+}
+
+static const char *tegra_pinctrl_get_group_name(struct udevice *dev,
+ unsigned int selector)
+{
+ return tegra_pinctrl_to_drvgrp[selector];
+}
+
+static int tegra_pinctrl_get_functions_count(struct udevice *dev)
+{
+ return PMUX_FUNC_COUNT;
+}
+
+static const char *tegra_pinctrl_get_function_name(struct udevice *dev,
+ unsigned int selector)
+{
+ return tegra_pinctrl_to_func[selector];
+}
+
+const struct pinctrl_ops tegra_pinctrl_ops = {
+ .get_pins_count = tegra_pinctrl_get_pins_count,
+ .get_pin_name = tegra_pinctrl_get_pin_name,
+ .get_groups_count = tegra_pinctrl_get_groups_count,
+ .get_group_name = tegra_pinctrl_get_group_name,
+ .get_functions_count = tegra_pinctrl_get_functions_count,
+ .get_function_name = tegra_pinctrl_get_function_name,
+ .set_state = tegra_pinctrl_set_state,
+};
+
+static int tegra_pinctrl_bind(struct udevice *dev)
+{
+ /*
+ * Make sure that the pinctrl driver gets probed after binding
+ * to provide initial configuration and assure that further
+ * probed devices are working correctly.
+ */
+ dev_or_flags(dev, DM_FLAG_PROBE_AFTER_BIND);
+
+ return 0;
+}
+
+static const struct udevice_id tegra_pinctrl_ids[] = {
+ { .compatible = "nvidia,tegra20-pinmux" },
+ { },
+};
+
+U_BOOT_DRIVER(tegra_pinctrl) = {
+ .name = "tegra_pinctrl",
+ .id = UCLASS_PINCTRL,
+ .of_match = tegra_pinctrl_ids,
+ .bind = tegra_pinctrl_bind,
+ .ops = &tegra_pinctrl_ops,
+};
diff --git a/arch/arm/mach-tegra/pinmux-common.c b/drivers/pinctrl/tegra/pinmux-common.c
similarity index 100%
rename from arch/arm/mach-tegra/pinmux-common.c
rename to drivers/pinctrl/tegra/pinmux-common.c
diff --git a/arch/arm/mach-tegra/tegra114/pinmux.c b/drivers/pinctrl/tegra/pinmux-tegra114.c
similarity index 100%
rename from arch/arm/mach-tegra/tegra114/pinmux.c
rename to drivers/pinctrl/tegra/pinmux-tegra114.c
diff --git a/arch/arm/mach-tegra/tegra124/pinmux.c b/drivers/pinctrl/tegra/pinmux-tegra124.c
similarity index 100%
rename from arch/arm/mach-tegra/tegra124/pinmux.c
rename to drivers/pinctrl/tegra/pinmux-tegra124.c
diff --git a/arch/arm/mach-tegra/tegra20/pinmux.c b/drivers/pinctrl/tegra/pinmux-tegra20.c
similarity index 100%
rename from arch/arm/mach-tegra/tegra20/pinmux.c
rename to drivers/pinctrl/tegra/pinmux-tegra20.c
diff --git a/drivers/pinctrl/tegra/pinmux-tegra210.c b/drivers/pinctrl/tegra/pinmux-tegra210.c
new file mode 100644
index 0000000..27abec2
--- /dev/null
+++ b/drivers/pinctrl/tegra/pinmux-tegra210.c
@@ -0,0 +1,190 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2013-2014, NVIDIA CORPORATION. All rights reserved.
+ */
+
+#include <asm/io.h>
+#include <asm/arch/pinmux.h>
+
+#define PIN(pin, f0, f1, f2, f3) \
+ { \
+ .funcs = { \
+ PMUX_FUNC_##f0, \
+ PMUX_FUNC_##f1, \
+ PMUX_FUNC_##f2, \
+ PMUX_FUNC_##f3, \
+ }, \
+ }
+
+#define PIN_RESERVED {}
+
+static const struct pmux_pingrp_desc tegra210_pingroups[] = {
+ /* pin, f0, f1, f2, f3 */
+ /* Offset 0x3000 */
+ PIN(SDMMC1_CLK_PM0, SDMMC1, RSVD1, RSVD2, RSVD3),
+ PIN(SDMMC1_CMD_PM1, SDMMC1, SPI3, RSVD2, RSVD3),
+ PIN(SDMMC1_DAT3_PM2, SDMMC1, SPI3, RSVD2, RSVD3),
+ PIN(SDMMC1_DAT2_PM3, SDMMC1, SPI3, RSVD2, RSVD3),
+ PIN(SDMMC1_DAT1_PM4, SDMMC1, SPI3, RSVD2, RSVD3),
+ PIN(SDMMC1_DAT0_PM5, SDMMC1, RSVD1, RSVD2, RSVD3),
+ PIN_RESERVED,
+ PIN(SDMMC3_CLK_PP0, SDMMC3, RSVD1, RSVD2, RSVD3),
+ PIN(SDMMC3_CMD_PP1, SDMMC3, RSVD1, RSVD2, RSVD3),
+ PIN(SDMMC3_DAT0_PP5, SDMMC3, RSVD1, RSVD2, RSVD3),
+ PIN(SDMMC3_DAT1_PP4, SDMMC3, RSVD1, RSVD2, RSVD3),
+ PIN(SDMMC3_DAT2_PP3, SDMMC3, RSVD1, RSVD2, RSVD3),
+ PIN(SDMMC3_DAT3_PP2, SDMMC3, RSVD1, RSVD2, RSVD3),
+ PIN_RESERVED,
+ PIN(PEX_L0_RST_N_PA0, PE0, RSVD1, RSVD2, RSVD3),
+ PIN(PEX_L0_CLKREQ_N_PA1, PE0, RSVD1, RSVD2, RSVD3),
+ PIN(PEX_WAKE_N_PA2, PE, RSVD1, RSVD2, RSVD3),
+ PIN(PEX_L1_RST_N_PA3, PE1, RSVD1, RSVD2, RSVD3),
+ PIN(PEX_L1_CLKREQ_N_PA4, PE1, RSVD1, RSVD2, RSVD3),
+ PIN(SATA_LED_ACTIVE_PA5, SATA, RSVD1, RSVD2, RSVD3),
+ PIN(SPI1_MOSI_PC0, SPI1, RSVD1, RSVD2, RSVD3),
+ PIN(SPI1_MISO_PC1, SPI1, RSVD1, RSVD2, RSVD3),
+ PIN(SPI1_SCK_PC2, SPI1, RSVD1, RSVD2, RSVD3),
+ PIN(SPI1_CS0_PC3, SPI1, RSVD1, RSVD2, RSVD3),
+ PIN(SPI1_CS1_PC4, SPI1, RSVD1, RSVD2, RSVD3),
+ PIN(SPI2_MOSI_PB4, SPI2, DTV, RSVD2, RSVD3),
+ PIN(SPI2_MISO_PB5, SPI2, DTV, RSVD2, RSVD3),
+ PIN(SPI2_SCK_PB6, SPI2, DTV, RSVD2, RSVD3),
+ PIN(SPI2_CS0_PB7, SPI2, DTV, RSVD2, RSVD3),
+ PIN(SPI2_CS1_PDD0, SPI2, RSVD1, RSVD2, RSVD3),
+ PIN(SPI4_MOSI_PC7, SPI4, RSVD1, RSVD2, RSVD3),
+ PIN(SPI4_MISO_PD0, SPI4, RSVD1, RSVD2, RSVD3),
+ PIN(SPI4_SCK_PC5, SPI4, RSVD1, RSVD2, RSVD3),
+ PIN(SPI4_CS0_PC6, SPI4, RSVD1, RSVD2, RSVD3),
+ PIN(QSPI_SCK_PEE0, QSPI, RSVD1, RSVD2, RSVD3),
+ PIN(QSPI_CS_N_PEE1, QSPI, RSVD1, RSVD2, RSVD3),
+ PIN(QSPI_IO0_PEE2, QSPI, RSVD1, RSVD2, RSVD3),
+ PIN(QSPI_IO1_PEE3, QSPI, RSVD1, RSVD2, RSVD3),
+ PIN(QSPI_IO2_PEE4, QSPI, RSVD1, RSVD2, RSVD3),
+ PIN(QSPI_IO3_PEE5, QSPI, RSVD1, RSVD2, RSVD3),
+ PIN_RESERVED,
+ PIN(DMIC1_CLK_PE0, DMIC1, I2S3, RSVD2, RSVD3),
+ PIN(DMIC1_DAT_PE1, DMIC1, I2S3, RSVD2, RSVD3),
+ PIN(DMIC2_CLK_PE2, DMIC2, I2S3, RSVD2, RSVD3),
+ PIN(DMIC2_DAT_PE3, DMIC2, I2S3, RSVD2, RSVD3),
+ PIN(DMIC3_CLK_PE4, DMIC3, I2S5A, RSVD2, RSVD3),
+ PIN(DMIC3_DAT_PE5, DMIC3, I2S5A, RSVD2, RSVD3),
+ PIN(GEN1_I2C_SCL_PJ1, I2C1, RSVD1, RSVD2, RSVD3),
+ PIN(GEN1_I2C_SDA_PJ0, I2C1, RSVD1, RSVD2, RSVD3),
+ PIN(GEN2_I2C_SCL_PJ2, I2C2, RSVD1, RSVD2, RSVD3),
+ PIN(GEN2_I2C_SDA_PJ3, I2C2, RSVD1, RSVD2, RSVD3),
+ PIN(GEN3_I2C_SCL_PF0, I2C3, RSVD1, RSVD2, RSVD3),
+ PIN(GEN3_I2C_SDA_PF1, I2C3, RSVD1, RSVD2, RSVD3),
+ PIN(CAM_I2C_SCL_PS2, I2C3, I2CVI, RSVD2, RSVD3),
+ PIN(CAM_I2C_SDA_PS3, I2C3, I2CVI, RSVD2, RSVD3),
+ PIN(PWR_I2C_SCL_PY3, I2CPMU, RSVD1, RSVD2, RSVD3),
+ PIN(PWR_I2C_SDA_PY4, I2CPMU, RSVD1, RSVD2, RSVD3),
+ PIN(UART1_TX_PU0, UARTA, RSVD1, RSVD2, RSVD3),
+ PIN(UART1_RX_PU1, UARTA, RSVD1, RSVD2, RSVD3),
+ PIN(UART1_RTS_PU2, UARTA, RSVD1, RSVD2, RSVD3),
+ PIN(UART1_CTS_PU3, UARTA, RSVD1, RSVD2, RSVD3),
+ PIN(UART2_TX_PG0, UARTB, I2S4A, SPDIF, UART),
+ PIN(UART2_RX_PG1, UARTB, I2S4A, SPDIF, UART),
+ PIN(UART2_RTS_PG2, UARTB, I2S4A, RSVD2, UART),
+ PIN(UART2_CTS_PG3, UARTB, I2S4A, RSVD2, UART),
+ PIN(UART3_TX_PD1, UARTC, SPI4, RSVD2, RSVD3),
+ PIN(UART3_RX_PD2, UARTC, SPI4, RSVD2, RSVD3),
+ PIN(UART3_RTS_PD3, UARTC, SPI4, RSVD2, RSVD3),
+ PIN(UART3_CTS_PD4, UARTC, SPI4, RSVD2, RSVD3),
+ PIN(UART4_TX_PI4, UARTD, UART, RSVD2, RSVD3),
+ PIN(UART4_RX_PI5, UARTD, UART, RSVD2, RSVD3),
+ PIN(UART4_RTS_PI6, UARTD, UART, RSVD2, RSVD3),
+ PIN(UART4_CTS_PI7, UARTD, UART, RSVD2, RSVD3),
+ PIN(DAP1_FS_PB0, I2S1, RSVD1, RSVD2, RSVD3),
+ PIN(DAP1_DIN_PB1, I2S1, RSVD1, RSVD2, RSVD3),
+ PIN(DAP1_DOUT_PB2, I2S1, RSVD1, RSVD2, RSVD3),
+ PIN(DAP1_SCLK_PB3, I2S1, RSVD1, RSVD2, RSVD3),
+ PIN(DAP2_FS_PAA0, I2S2, RSVD1, RSVD2, RSVD3),
+ PIN(DAP2_DIN_PAA2, I2S2, RSVD1, RSVD2, RSVD3),
+ PIN(DAP2_DOUT_PAA3, I2S2, RSVD1, RSVD2, RSVD3),
+ PIN(DAP2_SCLK_PAA1, I2S2, RSVD1, RSVD2, RSVD3),
+ PIN(DAP4_FS_PJ4, I2S4B, RSVD1, RSVD2, RSVD3),
+ PIN(DAP4_DIN_PJ5, I2S4B, RSVD1, RSVD2, RSVD3),
+ PIN(DAP4_DOUT_PJ6, I2S4B, RSVD1, RSVD2, RSVD3),
+ PIN(DAP4_SCLK_PJ7, I2S4B, RSVD1, RSVD2, RSVD3),
+ PIN(CAM1_MCLK_PS0, EXTPERIPH3, RSVD1, RSVD2, RSVD3),
+ PIN(CAM2_MCLK_PS1, EXTPERIPH3, RSVD1, RSVD2, RSVD3),
+ PIN(JTAG_RTCK, JTAG, RSVD1, RSVD2, RSVD3),
+ PIN(CLK_32K_IN, CLK, RSVD1, RSVD2, RSVD3),
+ PIN(CLK_32K_OUT_PY5, SOC, BLINK, RSVD2, RSVD3),
+ PIN(BATT_BCL, BCL, RSVD1, RSVD2, RSVD3),
+ PIN(CLK_REQ, SYS, RSVD1, RSVD2, RSVD3),
+ PIN(CPU_PWR_REQ, CPU, RSVD1, RSVD2, RSVD3),
+ PIN(PWR_INT_N, PMI, RSVD1, RSVD2, RSVD3),
+ PIN(SHUTDOWN, SHUTDOWN, RSVD1, RSVD2, RSVD3),
+ PIN(CORE_PWR_REQ, CORE, RSVD1, RSVD2, RSVD3),
+ PIN(AUD_MCLK_PBB0, AUD, RSVD1, RSVD2, RSVD3),
+ PIN(DVFS_PWM_PBB1, RSVD0, CLDVFS, SPI3, RSVD3),
+ PIN(DVFS_CLK_PBB2, RSVD0, CLDVFS, SPI3, RSVD3),
+ PIN(GPIO_X1_AUD_PBB3, RSVD0, RSVD1, SPI3, RSVD3),
+ PIN(GPIO_X3_AUD_PBB4, RSVD0, RSVD1, SPI3, RSVD3),
+ PIN(PCC7, RSVD0, RSVD1, RSVD2, RSVD3),
+ PIN(HDMI_CEC_PCC0, CEC, RSVD1, RSVD2, RSVD3),
+ PIN(HDMI_INT_DP_HPD_PCC1, DP, RSVD1, RSVD2, RSVD3),
+ PIN(SPDIF_OUT_PCC2, SPDIF, RSVD1, RSVD2, RSVD3),
+ PIN(SPDIF_IN_PCC3, SPDIF, RSVD1, RSVD2, RSVD3),
+ PIN(USB_VBUS_EN0_PCC4, USB, RSVD1, RSVD2, RSVD3),
+ PIN(USB_VBUS_EN1_PCC5, USB, RSVD1, RSVD2, RSVD3),
+ PIN(DP_HPD0_PCC6, DP, RSVD1, RSVD2, RSVD3),
+ PIN(WIFI_EN_PH0, RSVD0, RSVD1, RSVD2, RSVD3),
+ PIN(WIFI_RST_PH1, RSVD0, RSVD1, RSVD2, RSVD3),
+ PIN(WIFI_WAKE_AP_PH2, RSVD0, RSVD1, RSVD2, RSVD3),
+ PIN(AP_WAKE_BT_PH3, RSVD0, UARTB, SPDIF, RSVD3),
+ PIN(BT_RST_PH4, RSVD0, UARTB, SPDIF, RSVD3),
+ PIN(BT_WAKE_AP_PH5, RSVD0, RSVD1, RSVD2, RSVD3),
+ PIN(AP_WAKE_NFC_PH7, RSVD0, RSVD1, RSVD2, RSVD3),
+ PIN(NFC_EN_PI0, RSVD0, RSVD1, RSVD2, RSVD3),
+ PIN(NFC_INT_PI1, RSVD0, RSVD1, RSVD2, RSVD3),
+ PIN(GPS_EN_PI2, RSVD0, RSVD1, RSVD2, RSVD3),
+ PIN(GPS_RST_PI3, RSVD0, RSVD1, RSVD2, RSVD3),
+ PIN(CAM_RST_PS4, VGP1, RSVD1, RSVD2, RSVD3),
+ PIN(CAM_AF_EN_PS5, VIMCLK, VGP2, RSVD2, RSVD3),
+ PIN(CAM_FLASH_EN_PS6, VIMCLK, VGP3, RSVD2, RSVD3),
+ PIN(CAM1_PWDN_PS7, VGP4, RSVD1, RSVD2, RSVD3),
+ PIN(CAM2_PWDN_PT0, VGP5, RSVD1, RSVD2, RSVD3),
+ PIN(CAM1_STROBE_PT1, VGP6, RSVD1, RSVD2, RSVD3),
+ PIN(LCD_TE_PY2, DISPLAYA, RSVD1, RSVD2, RSVD3),
+ PIN(LCD_BL_PWM_PV0, DISPLAYA, PWM0, SOR0, RSVD3),
+ PIN(LCD_BL_EN_PV1, RSVD0, RSVD1, RSVD2, RSVD3),
+ PIN(LCD_RST_PV2, RSVD0, RSVD1, RSVD2, RSVD3),
+ PIN(LCD_GPIO1_PV3, DISPLAYB, RSVD1, RSVD2, RSVD3),
+ PIN(LCD_GPIO2_PV4, DISPLAYB, PWM1, RSVD2, SOR1),
+ PIN(AP_READY_PV5, RSVD0, RSVD1, RSVD2, RSVD3),
+ PIN(TOUCH_RST_PV6, RSVD0, RSVD1, RSVD2, RSVD3),
+ PIN(TOUCH_CLK_PV7, TOUCH, RSVD1, RSVD2, RSVD3),
+ PIN(MODEM_WAKE_AP_PX0, RSVD0, RSVD1, RSVD2, RSVD3),
+ PIN(TOUCH_INT_PX1, RSVD0, RSVD1, RSVD2, RSVD3),
+ PIN(MOTION_INT_PX2, RSVD0, RSVD1, RSVD2, RSVD3),
+ PIN(ALS_PROX_INT_PX3, RSVD0, RSVD1, RSVD2, RSVD3),
+ PIN(TEMP_ALERT_PX4, RSVD0, RSVD1, RSVD2, RSVD3),
+ PIN(BUTTON_POWER_ON_PX5, RSVD0, RSVD1, RSVD2, RSVD3),
+ PIN(BUTTON_VOL_UP_PX6, RSVD0, RSVD1, RSVD2, RSVD3),
+ PIN(BUTTON_VOL_DOWN_PX7, RSVD0, RSVD1, RSVD2, RSVD3),
+ PIN(BUTTON_SLIDE_SW_PY0, RSVD0, RSVD1, RSVD2, RSVD3),
+ PIN(BUTTON_HOME_PY1, RSVD0, RSVD1, RSVD2, RSVD3),
+ PIN(PA6, SATA, RSVD1, RSVD2, RSVD3),
+ PIN(PE6, RSVD0, I2S5A, PWM2, RSVD3),
+ PIN(PE7, RSVD0, I2S5A, PWM3, RSVD3),
+ PIN(PH6, RSVD0, RSVD1, RSVD2, RSVD3),
+ PIN(PK0, IQC0, I2S5B, RSVD2, RSVD3),
+ PIN(PK1, IQC0, I2S5B, RSVD2, RSVD3),
+ PIN(PK2, IQC0, I2S5B, RSVD2, RSVD3),
+ PIN(PK3, IQC0, I2S5B, RSVD2, RSVD3),
+ PIN(PK4, IQC1, RSVD1, RSVD2, RSVD3),
+ PIN(PK5, IQC1, RSVD1, RSVD2, RSVD3),
+ PIN(PK6, IQC1, RSVD1, RSVD2, RSVD3),
+ PIN(PK7, IQC1, RSVD1, RSVD2, RSVD3),
+ PIN(PL0, RSVD0, RSVD1, RSVD2, RSVD3),
+ PIN(PL1, SOC, RSVD1, RSVD2, RSVD3),
+ PIN(PZ0, VIMCLK2, RSVD1, RSVD2, RSVD3),
+ PIN(PZ1, VIMCLK2, SDMMC1, RSVD2, RSVD3),
+ PIN(PZ2, SDMMC3, CCLA, RSVD2, RSVD3),
+ PIN(PZ3, SDMMC3, RSVD1, RSVD2, RSVD3),
+ PIN(PZ4, SDMMC1, RSVD1, RSVD2, RSVD3),
+ PIN(PZ5, SOC, RSVD1, RSVD2, RSVD3),
+};
+const struct pmux_pingrp_desc *tegra_soc_pingroups = tegra210_pingroups;
diff --git a/arch/arm/mach-tegra/tegra30/pinmux.c b/drivers/pinctrl/tegra/pinmux-tegra30.c
similarity index 100%
rename from arch/arm/mach-tegra/tegra30/pinmux.c
rename to drivers/pinctrl/tegra/pinmux-tegra30.c
diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig
index 2395720..33b8bc1 100644
--- a/drivers/power/Kconfig
+++ b/drivers/power/Kconfig
@@ -56,7 +56,6 @@
depends on ARCH_SUNXI
default AXP209_POWER if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
default AXP221_POWER if MACH_SUN6I || MACH_SUN8I_A23 || MACH_SUN8I_A33 || MACH_SUN8I_R40
- default AXP305_POWER if MACH_SUN50I_H616
default AXP818_POWER if MACH_SUN8I_A83T
default SUNXI_NO_PMIC if MACH_SUNXI_H3_H5 || MACH_SUN50I || MACH_SUN8I_V3S
diff --git a/drivers/power/pmic/max77663.c b/drivers/power/pmic/max77663.c
index 68c3cbb..cf08b6a 100644
--- a/drivers/power/pmic/max77663.c
+++ b/drivers/power/pmic/max77663.c
@@ -55,6 +55,15 @@
}
}
+ if (IS_ENABLED(CONFIG_MAX77663_GPIO)) {
+ ret = device_bind_driver(dev, MAX77663_GPIO_DRIVER,
+ "gpio", NULL);
+ if (ret) {
+ log_err("cannot bind GPIOs (ret = %d)\n", ret);
+ return ret;
+ }
+ }
+
regulators_node = dev_read_subnode(dev, "regulators");
if (!ofnode_valid(regulators_node)) {
log_err("%s regulators subnode not found!\n", dev->name);
diff --git a/drivers/power/pmic/palmas.c b/drivers/power/pmic/palmas.c
index 32f2a93..e340a32 100644
--- a/drivers/power/pmic/palmas.c
+++ b/drivers/power/pmic/palmas.c
@@ -46,7 +46,7 @@
static int palmas_bind(struct udevice *dev)
{
ofnode pmic_node = ofnode_null(), regulators_node;
- ofnode subnode;
+ ofnode subnode, gpio_node;
int children, ret;
if (IS_ENABLED(CONFIG_SYSRESET_PALMAS)) {
@@ -58,6 +58,14 @@
}
}
+ gpio_node = ofnode_find_subnode(dev_ofnode(dev), "gpio");
+ if (ofnode_valid(gpio_node)) {
+ ret = device_bind_driver_to_node(dev, PALMAS_GPIO_DRIVER,
+ "gpio", gpio_node, NULL);
+ if (ret)
+ log_err("cannot bind GPIOs (ret = %d)\n", ret);
+ }
+
dev_for_each_subnode(subnode, dev) {
const char *name;
char *temp;
diff --git a/drivers/power/pmic/pmic_qcom.c b/drivers/power/pmic/pmic_qcom.c
index ad8daf4..f2ac649 100644
--- a/drivers/power/pmic/pmic_qcom.c
+++ b/drivers/power/pmic/pmic_qcom.c
@@ -66,12 +66,19 @@
static int pmic_qcom_probe(struct udevice *dev)
{
struct pmic_qcom_priv *priv = dev_get_priv(dev);
+ int ret;
- priv->usid = dev_read_addr(dev);
-
- if (priv->usid == FDT_ADDR_T_NONE)
+ /*
+ * dev_read_addr() can't be used here because the reg property actually
+ * contains two discrete values, not a single 64-bit address.
+ * The address is the first value.
+ */
+ ret = ofnode_read_u32_index(dev_ofnode(dev), "reg", 0, &priv->usid);
+ if (ret < 0)
return -EINVAL;
+ debug("usid: %d\n", priv->usid);
+
return 0;
}
diff --git a/drivers/remoteproc/ti_k3_dsp_rproc.c b/drivers/remoteproc/ti_k3_dsp_rproc.c
index 576de4b..1c6515f 100644
--- a/drivers/remoteproc/ti_k3_dsp_rproc.c
+++ b/drivers/remoteproc/ti_k3_dsp_rproc.c
@@ -56,6 +56,7 @@
* @data: Pointer to DSP specific boot data structure
* @mem: Array of available memories
* @num_mem: Number of available memories
+ * @in_use: flag to tell if the core is already in use.
*/
struct k3_dsp_privdata {
struct reset_ctl dsp_rst;
@@ -63,6 +64,7 @@
struct k3_dsp_boot_data *data;
struct k3_dsp_mem *mem;
int num_mems;
+ bool in_use;
};
/*
@@ -128,6 +130,13 @@
u32 boot_vector;
int ret;
+ if (dsp->in_use) {
+ dev_err(dev,
+ "Invalid op: Trying to load/start on already running core %d\n",
+ dsp->tsp.proc_id);
+ return -EINVAL;
+ }
+
dev_dbg(dev, "%s addr = 0x%lx, size = 0x%lx\n", __func__, addr, size);
ret = ti_sci_proc_request(&dsp->tsp);
if (ret)
@@ -195,6 +204,7 @@
ti_sci_proc_power_domain_off(&dsp->tsp);
}
+ dsp->in_use = true;
proc_release:
ti_sci_proc_release(&dsp->tsp);
@@ -207,6 +217,7 @@
dev_dbg(dev, "%s\n", __func__);
+ dsp->in_use = false;
ti_sci_proc_request(&dsp->tsp);
reset_assert(&dsp->dsp_rst);
ti_sci_proc_power_domain_off(&dsp->tsp);
diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
index 73bbd30..fe5c121 100644
--- a/drivers/reset/Kconfig
+++ b/drivers/reset/Kconfig
@@ -135,6 +135,13 @@
help
Support for reset controller on MediaTek MIPS platform.
+config RESET_NPCM
+ bool "Reset controller driver for Nuvoton BMCs"
+ depends on DM_RESET && ARCH_NPCM
+ default y
+ help
+ Support for reset controller on Nuvotom BMCs.
+
config RESET_SUNXI
bool "RESET support for Allwinner SoCs"
depends on DM_RESET && ARCH_SUNXI
@@ -156,13 +163,6 @@
help
Support for reset controller on i.MX7/8 SoCs.
-config RESET_QCOM
- bool "Reset driver for Qualcomm SoCs"
- depends on DM_RESET && (ARCH_SNAPDRAGON || ARCH_IPQ40XX)
- default y
- help
- Support for reset controller on Qualcomm SoCs.
-
config RESET_SIFIVE
bool "Reset Driver for SiFive SoC's"
depends on DM_RESET && CLK_SIFIVE_PRCI && (TARGET_SIFIVE_UNLEASHED || TARGET_SIFIVE_UNMATCHED)
diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
index e2239a2..2eb639e 100644
--- a/drivers/reset/Makefile
+++ b/drivers/reset/Makefile
@@ -21,10 +21,10 @@
obj-$(CONFIG_RESET_SOCFPGA) += reset-socfpga.o
obj-$(CONFIG_RESET_MEDIATEK) += reset-mediatek.o
obj-$(CONFIG_RESET_MTMIPS) += reset-mtmips.o
+obj-$(CONFIG_RESET_NPCM) += reset-npcm.o
obj-$(CONFIG_RESET_SUNXI) += reset-sunxi.o
obj-$(CONFIG_RESET_HISILICON) += reset-hisilicon.o
obj-$(CONFIG_RESET_IMX7) += reset-imx7.o
-obj-$(CONFIG_RESET_QCOM) += reset-qcom.o
obj-$(CONFIG_RESET_SIFIVE) += reset-sifive.o
obj-$(CONFIG_RESET_SYSCON) += reset-syscon.o
obj-$(CONFIG_RESET_RASPBERRYPI) += reset-raspberrypi.o
diff --git a/drivers/reset/reset-hisilicon.c b/drivers/reset/reset-hisilicon.c
index 8152cec..85e02b2 100644
--- a/drivers/reset/reset-hisilicon.c
+++ b/drivers/reset/reset-hisilicon.c
@@ -49,7 +49,18 @@
static int hisi_reset_of_xlate(struct reset_ctl *rst,
struct ofnode_phandle_args *args)
{
- if (args->args_count != 3) {
+ unsigned long polarity;
+
+ switch (args->args_count) {
+ case 2:
+ polarity = ASSERT_SET;
+ break;
+
+ case 3:
+ polarity = args->args[2];
+ break;
+
+ default:
debug("Invalid args_count: %d\n", args->args_count);
return -EINVAL;
}
@@ -57,7 +68,7 @@
/* Use .data field as register offset and .id field as bit shift */
rst->data = args->args[0];
rst->id = args->args[1];
- rst->polarity = args->args[2];
+ rst->polarity = polarity;
return 0;
}
diff --git a/drivers/reset/reset-npcm.c b/drivers/reset/reset-npcm.c
new file mode 100644
index 0000000..a3b85a4
--- /dev/null
+++ b/drivers/reset/reset-npcm.c
@@ -0,0 +1,145 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright 2023 Nuvoton Technology Corp.
+ */
+
+#include <dm.h>
+#include <reset-uclass.h>
+#include <asm/io.h>
+#include <dm/device_compat.h>
+
+struct npcm_reset_priv {
+ void __iomem *base;
+};
+
+static int npcm_reset_request(struct reset_ctl *rst)
+{
+ return 0;
+}
+
+static int npcm_reset_free(struct reset_ctl *rst)
+{
+ return 0;
+}
+
+static int npcm_reset_assert(struct reset_ctl *rst)
+{
+ struct npcm_reset_priv *priv = dev_get_priv(rst->dev);
+ u32 val;
+
+ debug("%s: id 0x%lx, data %ld\n", __func__, rst->id, rst->data);
+ val = readl(priv->base + rst->id);
+ val |= BIT(rst->data);
+ writel(val, priv->base + rst->id);
+
+ return 0;
+}
+
+static int npcm_reset_deassert(struct reset_ctl *rst)
+{
+ struct npcm_reset_priv *priv = dev_get_priv(rst->dev);
+ u32 val;
+
+ debug("%s: id 0x%lx, data %ld\n", __func__, rst->id, rst->data);
+ val = readl(priv->base + rst->id);
+ val &= ~BIT(rst->data);
+ writel(val, priv->base + rst->id);
+
+ return 0;
+}
+
+static int npcm_reset_xlate(struct reset_ctl *rst,
+ struct ofnode_phandle_args *args)
+{
+ if (args->args_count != 2) {
+ dev_err(rst->dev, "Invalid args_count: %d\n", args->args_count);
+ return -EINVAL;
+ }
+
+ /* Use id field as register offset and data field as reset bit positiion */
+ rst->id = args->args[0];
+ rst->data = args->args[1];
+
+ return 0;
+}
+
+static int npcm_reset_probe(struct udevice *dev)
+{
+ struct npcm_reset_priv *priv = dev_get_priv(dev);
+
+ priv->base = dev_remap_addr(dev);
+ if (!priv->base)
+ return -EINVAL;
+
+ return 0;
+}
+
+static int npcm_reset_bind(struct udevice *dev)
+{
+ void __iomem *reg_base;
+ u32 *rcr_values;
+ int num_fields;
+ u32 reg, val;
+ int ret, i;
+
+ reg_base = dev_remap_addr(dev);
+ if (!reg_base)
+ return -EINVAL;
+
+ /*
+ * Set RCR initial value
+ * The rcr-initial-values cell is <reg_offset val>
+ */
+ num_fields = dev_read_size(dev, "rcr-initial-values");
+ if (num_fields < 2)
+ return 0;
+
+ num_fields /= sizeof(u32);
+ if (num_fields % 2)
+ return -EINVAL;
+
+ num_fields = num_fields / 2;
+ rcr_values = malloc(num_fields * 2 * sizeof(u32));
+ if (!rcr_values)
+ return -ENOMEM;
+
+ ret = dev_read_u32_array(dev, "rcr-initial-values", rcr_values,
+ num_fields * 2);
+ if (ret < 0) {
+ free(rcr_values);
+ return -EINVAL;
+ }
+
+ for (i = 0; i < num_fields; i++) {
+ reg = rcr_values[2 * i];
+ val = rcr_values[2 * i + 1];
+ writel(val, reg_base + reg);
+ }
+ free(rcr_values);
+
+ return 0;
+}
+
+static const struct udevice_id npcm_reset_ids[] = {
+ { .compatible = "nuvoton,npcm845-reset" },
+ { .compatible = "nuvoton,npcm750-reset" },
+ { }
+};
+
+struct reset_ops npcm_reset_ops = {
+ .request = npcm_reset_request,
+ .rfree = npcm_reset_free,
+ .rst_assert = npcm_reset_assert,
+ .rst_deassert = npcm_reset_deassert,
+ .of_xlate = npcm_reset_xlate,
+};
+
+U_BOOT_DRIVER(npcm_reset) = {
+ .name = "npcm_reset",
+ .id = UCLASS_RESET,
+ .of_match = npcm_reset_ids,
+ .bind = npcm_reset_bind,
+ .probe = npcm_reset_probe,
+ .ops = &npcm_reset_ops,
+ .priv_auto = sizeof(struct npcm_reset_priv),
+};
diff --git a/drivers/reset/reset-qcom.c b/drivers/reset/reset-qcom.c
deleted file mode 100644
index 94315e7..0000000
--- a/drivers/reset/reset-qcom.c
+++ /dev/null
@@ -1,195 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Copyright (c) 2020 Sartura Ltd.
- * Copyright (c) 2022 Linaro Ltd.
- *
- * Author: Robert Marko <robert.marko@sartura.hr>
- * Sumit Garg <sumit.garg@linaro.org>
- *
- * Based on Linux driver
- */
-
-#include <asm/io.h>
-#include <common.h>
-#include <dm.h>
-#include <reset-uclass.h>
-#include <linux/bitops.h>
-#include <malloc.h>
-
-struct qcom_reset_priv {
- phys_addr_t base;
-};
-
-struct qcom_reset_map {
- unsigned int reg;
- u8 bit;
-};
-
-#ifdef CONFIG_ARCH_IPQ40XX
-#include <dt-bindings/reset/qcom,ipq4019-reset.h>
-static const struct qcom_reset_map gcc_qcom_resets[] = {
- [WIFI0_CPU_INIT_RESET] = { 0x1f008, 5 },
- [WIFI0_RADIO_SRIF_RESET] = { 0x1f008, 4 },
- [WIFI0_RADIO_WARM_RESET] = { 0x1f008, 3 },
- [WIFI0_RADIO_COLD_RESET] = { 0x1f008, 2 },
- [WIFI0_CORE_WARM_RESET] = { 0x1f008, 1 },
- [WIFI0_CORE_COLD_RESET] = { 0x1f008, 0 },
- [WIFI1_CPU_INIT_RESET] = { 0x20008, 5 },
- [WIFI1_RADIO_SRIF_RESET] = { 0x20008, 4 },
- [WIFI1_RADIO_WARM_RESET] = { 0x20008, 3 },
- [WIFI1_RADIO_COLD_RESET] = { 0x20008, 2 },
- [WIFI1_CORE_WARM_RESET] = { 0x20008, 1 },
- [WIFI1_CORE_COLD_RESET] = { 0x20008, 0 },
- [USB3_UNIPHY_PHY_ARES] = { 0x1e038, 5 },
- [USB3_HSPHY_POR_ARES] = { 0x1e038, 4 },
- [USB3_HSPHY_S_ARES] = { 0x1e038, 2 },
- [USB2_HSPHY_POR_ARES] = { 0x1e01c, 4 },
- [USB2_HSPHY_S_ARES] = { 0x1e01c, 2 },
- [PCIE_PHY_AHB_ARES] = { 0x1d010, 11 },
- [PCIE_AHB_ARES] = { 0x1d010, 10 },
- [PCIE_PWR_ARES] = { 0x1d010, 9 },
- [PCIE_PIPE_STICKY_ARES] = { 0x1d010, 8 },
- [PCIE_AXI_M_STICKY_ARES] = { 0x1d010, 7 },
- [PCIE_PHY_ARES] = { 0x1d010, 6 },
- [PCIE_PARF_XPU_ARES] = { 0x1d010, 5 },
- [PCIE_AXI_S_XPU_ARES] = { 0x1d010, 4 },
- [PCIE_AXI_M_VMIDMT_ARES] = { 0x1d010, 3 },
- [PCIE_PIPE_ARES] = { 0x1d010, 2 },
- [PCIE_AXI_S_ARES] = { 0x1d010, 1 },
- [PCIE_AXI_M_ARES] = { 0x1d010, 0 },
- [ESS_RESET] = { 0x12008, 0},
- [GCC_BLSP1_BCR] = {0x01000, 0},
- [GCC_BLSP1_QUP1_BCR] = {0x02000, 0},
- [GCC_BLSP1_UART1_BCR] = {0x02038, 0},
- [GCC_BLSP1_QUP2_BCR] = {0x03008, 0},
- [GCC_BLSP1_UART2_BCR] = {0x03028, 0},
- [GCC_BIMC_BCR] = {0x04000, 0},
- [GCC_TLMM_BCR] = {0x05000, 0},
- [GCC_IMEM_BCR] = {0x0E000, 0},
- [GCC_ESS_BCR] = {0x12008, 0},
- [GCC_PRNG_BCR] = {0x13000, 0},
- [GCC_BOOT_ROM_BCR] = {0x13008, 0},
- [GCC_CRYPTO_BCR] = {0x16000, 0},
- [GCC_SDCC1_BCR] = {0x18000, 0},
- [GCC_SEC_CTRL_BCR] = {0x1A000, 0},
- [GCC_AUDIO_BCR] = {0x1B008, 0},
- [GCC_QPIC_BCR] = {0x1C000, 0},
- [GCC_PCIE_BCR] = {0x1D000, 0},
- [GCC_USB2_BCR] = {0x1E008, 0},
- [GCC_USB2_PHY_BCR] = {0x1E018, 0},
- [GCC_USB3_BCR] = {0x1E024, 0},
- [GCC_USB3_PHY_BCR] = {0x1E034, 0},
- [GCC_SYSTEM_NOC_BCR] = {0x21000, 0},
- [GCC_PCNOC_BCR] = {0x2102C, 0},
- [GCC_DCD_BCR] = {0x21038, 0},
- [GCC_SNOC_BUS_TIMEOUT0_BCR] = {0x21064, 0},
- [GCC_SNOC_BUS_TIMEOUT1_BCR] = {0x2106C, 0},
- [GCC_SNOC_BUS_TIMEOUT2_BCR] = {0x21074, 0},
- [GCC_SNOC_BUS_TIMEOUT3_BCR] = {0x2107C, 0},
- [GCC_PCNOC_BUS_TIMEOUT0_BCR] = {0x21084, 0},
- [GCC_PCNOC_BUS_TIMEOUT1_BCR] = {0x2108C, 0},
- [GCC_PCNOC_BUS_TIMEOUT2_BCR] = {0x21094, 0},
- [GCC_PCNOC_BUS_TIMEOUT3_BCR] = {0x2109C, 0},
- [GCC_PCNOC_BUS_TIMEOUT4_BCR] = {0x210A4, 0},
- [GCC_PCNOC_BUS_TIMEOUT5_BCR] = {0x210AC, 0},
- [GCC_PCNOC_BUS_TIMEOUT6_BCR] = {0x210B4, 0},
- [GCC_PCNOC_BUS_TIMEOUT7_BCR] = {0x210BC, 0},
- [GCC_PCNOC_BUS_TIMEOUT8_BCR] = {0x210C4, 0},
- [GCC_PCNOC_BUS_TIMEOUT9_BCR] = {0x210CC, 0},
- [GCC_TCSR_BCR] = {0x22000, 0},
- [GCC_MPM_BCR] = {0x24000, 0},
- [GCC_SPDM_BCR] = {0x25000, 0},
-};
-#endif
-
-#ifdef CONFIG_TARGET_QCS404EVB
-#include <dt-bindings/clock/qcom,gcc-qcs404.h>
-static const struct qcom_reset_map gcc_qcom_resets[] = {
- [GCC_GENI_IR_BCR] = { 0x0F000 },
- [GCC_CDSP_RESTART] = { 0x18000 },
- [GCC_USB_HS_BCR] = { 0x41000 },
- [GCC_USB2_HS_PHY_ONLY_BCR] = { 0x41034 },
- [GCC_QUSB2_PHY_BCR] = { 0x4103c },
- [GCC_USB_HS_PHY_CFG_AHB_BCR] = { 0x0000c, 1 },
- [GCC_USB2A_PHY_BCR] = { 0x0000c, 0 },
- [GCC_USB3_PHY_BCR] = { 0x39004 },
- [GCC_USB_30_BCR] = { 0x39000 },
- [GCC_USB3PHY_PHY_BCR] = { 0x39008 },
- [GCC_PCIE_0_BCR] = { 0x3e000 },
- [GCC_PCIE_0_PHY_BCR] = { 0x3e004 },
- [GCC_PCIE_0_LINK_DOWN_BCR] = { 0x3e038 },
- [GCC_PCIEPHY_0_PHY_BCR] = { 0x3e03c },
- [GCC_PCIE_0_AXI_MASTER_STICKY_ARES] = { 0x3e040, 6},
- [GCC_PCIE_0_AHB_ARES] = { 0x3e040, 5 },
- [GCC_PCIE_0_AXI_SLAVE_ARES] = { 0x3e040, 4 },
- [GCC_PCIE_0_AXI_MASTER_ARES] = { 0x3e040, 3 },
- [GCC_PCIE_0_CORE_STICKY_ARES] = { 0x3e040, 2 },
- [GCC_PCIE_0_SLEEP_ARES] = { 0x3e040, 1 },
- [GCC_PCIE_0_PIPE_ARES] = { 0x3e040, 0 },
- [GCC_EMAC_BCR] = { 0x4e000 },
- [GCC_WDSP_RESTART] = {0x19000},
-};
-#endif
-
-static int qcom_reset_assert(struct reset_ctl *rst)
-{
- struct qcom_reset_priv *priv = dev_get_priv(rst->dev);
- const struct qcom_reset_map *reset_map = gcc_qcom_resets;
- const struct qcom_reset_map *map;
- u32 value;
-
- map = &reset_map[rst->id];
-
- value = readl(priv->base + map->reg);
- value |= BIT(map->bit);
- writel(value, priv->base + map->reg);
-
- return 0;
-}
-
-static int qcom_reset_deassert(struct reset_ctl *rst)
-{
- struct qcom_reset_priv *priv = dev_get_priv(rst->dev);
- const struct qcom_reset_map *reset_map = gcc_qcom_resets;
- const struct qcom_reset_map *map;
- u32 value;
-
- map = &reset_map[rst->id];
-
- value = readl(priv->base + map->reg);
- value &= ~BIT(map->bit);
- writel(value, priv->base + map->reg);
-
- return 0;
-}
-
-static const struct reset_ops qcom_reset_ops = {
- .rst_assert = qcom_reset_assert,
- .rst_deassert = qcom_reset_deassert,
-};
-
-static const struct udevice_id qcom_reset_ids[] = {
- { .compatible = "qcom,gcc-reset-ipq4019" },
- { .compatible = "qcom,gcc-reset-qcs404" },
- { }
-};
-
-static int qcom_reset_probe(struct udevice *dev)
-{
- struct qcom_reset_priv *priv = dev_get_priv(dev);
-
- priv->base = dev_read_addr(dev);
- if (priv->base == FDT_ADDR_T_NONE)
- return -EINVAL;
-
- return 0;
-}
-
-U_BOOT_DRIVER(qcom_reset) = {
- .name = "qcom_reset",
- .id = UCLASS_RESET,
- .of_match = qcom_reset_ids,
- .ops = &qcom_reset_ops,
- .probe = qcom_reset_probe,
- .priv_auto = sizeof(struct qcom_reset_priv),
-};
diff --git a/drivers/rng/arm_rndr.c b/drivers/rng/arm_rndr.c
index 5598974..4512330 100644
--- a/drivers/rng/arm_rndr.c
+++ b/drivers/rng/arm_rndr.c
@@ -62,10 +62,10 @@
.read = arm_rndr_read,
};
-static int arm_rndr_probe(struct udevice *dev)
+static int arm_rndr_bind(struct udevice *dev)
{
if (!cpu_has_rndr())
- return -ENODEV;
+ return -ENOENT;
return 0;
}
@@ -74,7 +74,7 @@
.name = DRIVER_NAME,
.id = UCLASS_RNG,
.ops = &arm_rndr_ops,
- .probe = arm_rndr_probe,
+ .bind = arm_rndr_bind,
};
U_BOOT_DRVINFO(cpu_arm_rndr) = {
diff --git a/drivers/rng/riscv_zkr_rng.c b/drivers/rng/riscv_zkr_rng.c
index 8c9e111..48a5251 100644
--- a/drivers/rng/riscv_zkr_rng.c
+++ b/drivers/rng/riscv_zkr_rng.c
@@ -55,7 +55,7 @@
}
break;
case DEAD:
- return -ENODEV;
+ return -ENOENT;
}
}
@@ -63,16 +63,16 @@
}
/**
- * riscv_zkr_probe() - check if the seed register is available
+ * riscv_zkr_bind() - check if the seed register is available
*
- * If the SBI software has not set mseccfg.sseed=1 or the Zkr
- * extension is not available this probe function will result
- * in an exception. Currently we cannot recover from this.
+ * If the SBI software has not set mseccfg.sseed=1 or the Zkr extension is not
+ * available, reading the seed register will result in an exception from which
+ * this function safely resumes.
*
* @dev: RNG device
* Return: 0 if successfully probed
*/
-static int riscv_zkr_probe(struct udevice *dev)
+static int riscv_zkr_bind(struct udevice *dev)
{
struct resume_data resume;
int ret;
@@ -87,7 +87,24 @@
val = read_seed();
set_resume(NULL);
if (ret)
- return -ENODEV;
+ return -ENOENT;
+
+ return 0;
+}
+
+/**
+ * riscv_zkr_probe() - check if entropy is available
+ *
+ * The bind method already checked that the seed register can be read without
+ * excpetiong. Here we wait for the self test to finish and entropy becoming
+ * available.
+ *
+ * @dev: RNG device
+ * Return: 0 if successfully probed
+ */
+static int riscv_zkr_probe(struct udevice *dev)
+{
+ u32 val;
do {
val = read_seed();
@@ -95,7 +112,7 @@
} while (val == BIST || val == WAIT);
if (val == DEAD)
- return -ENODEV;
+ return -ENOENT;
return 0;
}
@@ -108,6 +125,7 @@
.name = DRIVER_NAME,
.id = UCLASS_RNG,
.ops = &riscv_zkr_ops,
+ .bind = riscv_zkr_bind,
.probe = riscv_zkr_probe,
};
diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
index 2317313..7fc53a6 100644
--- a/drivers/rtc/Kconfig
+++ b/drivers/rtc/Kconfig
@@ -122,6 +122,13 @@
CONFIG_BOOTP_NTPSERVER. The RTC time is advanced according to CPU
ticks.
+config RTC_GOLDFISH
+ bool "Enable Goldfish driver"
+ depends on DM_RTC
+ help
+ The Goldfish RTC is a virtual device which may be supplied by QEMU.
+ It is enabled by default on QEMU's RISC-V virt machine.
+
config RTC_ISL1208
bool "Enable ISL1208 driver"
depends on DM_RTC
diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile
index 308fab8..03a424c 100644
--- a/drivers/rtc/Makefile
+++ b/drivers/rtc/Makefile
@@ -15,6 +15,7 @@
obj-$(CONFIG_RTC_DS3231) += ds3231.o
obj-$(CONFIG_RTC_DS3232) += ds3232.o
obj-$(CONFIG_RTC_EMULATION) += emul_rtc.o
+obj-$(CONFIG_RTC_GOLDFISH) += goldfish_rtc.o
obj-$(CONFIG_RTC_HT1380) += ht1380.o
obj-$(CONFIG_$(SPL_TPL_)RTC_SANDBOX) += i2c_rtc_emul.o
obj-$(CONFIG_RTC_ISL1208) += isl1208.o
diff --git a/drivers/rtc/goldfish_rtc.c b/drivers/rtc/goldfish_rtc.c
new file mode 100644
index 0000000..1ace990
--- /dev/null
+++ b/drivers/rtc/goldfish_rtc.c
@@ -0,0 +1,105 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Copyright 2023, Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
+ *
+ * This driver emulates a real time clock based on timer ticks.
+ */
+
+#include <div64.h>
+#include <dm.h>
+#include <mapmem.h>
+#include <rtc.h>
+#include <linux/io.h>
+
+/**
+ * struct goldfish_rtc - private data for RTC driver
+ */
+struct goldfish_rtc {
+ /**
+ * @base: base address for register file
+ */
+ void __iomem *base;
+ /**
+ * @isdst: daylight saving time
+ */
+ int isdst;
+};
+
+/* Register offsets */
+#define GOLDFISH_TIME_LOW 0x00
+#define GOLDFISH_TIME_HIGH 0x04
+
+static int goldfish_rtc_get(struct udevice *dev, struct rtc_time *time)
+{
+ struct goldfish_rtc *priv = dev_get_priv(dev);
+ void __iomem *base = priv->base;
+ u64 time_high;
+ u64 time_low;
+ u64 now;
+
+ time_low = ioread32(base + GOLDFISH_TIME_LOW);
+ time_high = ioread32(base + GOLDFISH_TIME_HIGH);
+ now = (time_high << 32) | time_low;
+
+ do_div(now, 1000000000U);
+
+ rtc_to_tm(now, time);
+ time->tm_isdst = priv->isdst;
+
+ return 0;
+}
+
+static int goldfish_rtc_set(struct udevice *dev, const struct rtc_time *time)
+{
+ struct goldfish_rtc *priv = dev_get_priv(dev);
+ void __iomem *base = priv->base;
+ u64 now;
+
+ if (time->tm_year < 1970)
+ return -EINVAL;
+
+ now = rtc_mktime(time) * 1000000000ULL;
+ iowrite32(now >> 32, base + GOLDFISH_TIME_HIGH);
+ iowrite32(now, base + GOLDFISH_TIME_LOW);
+
+ if (time->tm_isdst > 0)
+ priv->isdst = 1;
+ else if (time->tm_isdst < 0)
+ priv->isdst = -1;
+ else
+ priv->isdst = 0;
+
+ return 0;
+}
+
+int goldfish_rtc_probe(struct udevice *dev)
+{
+ struct goldfish_rtc *priv = dev_get_priv(dev);
+ fdt_addr_t addr;
+
+ addr = dev_read_addr(dev);
+ if (addr == FDT_ADDR_T_NONE)
+ return -EINVAL;
+ priv->base = map_sysmem(addr, 0x20);
+
+ return 0;
+}
+
+static const struct rtc_ops goldfish_rtc_ops = {
+ .get = goldfish_rtc_get,
+ .set = goldfish_rtc_set,
+};
+
+static const struct udevice_id goldfish_rtc_of_match[] = {
+ { .compatible = "google,goldfish-rtc", },
+ {},
+};
+
+U_BOOT_DRIVER(rtc_goldfish) = {
+ .name = "rtc_goldfish",
+ .id = UCLASS_RTC,
+ .ops = &goldfish_rtc_ops,
+ .probe = goldfish_rtc_probe,
+ .of_match = goldfish_rtc_of_match,
+ .priv_auto = sizeof(struct goldfish_rtc),
+};
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index 6628a88..26460c4 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -972,8 +972,6 @@
config MSM_GENI_SERIAL
bool "Qualcomm on-chip GENI UART"
- select MISC
- imply QCOM_GENI_SE
help
Support UART based on Generic Interface (GENI) Serial Engine (SE),
used on Qualcomm Snapdragon SoCs. Should support all qualcomm SOCs
diff --git a/drivers/serial/serial_msm_geni.c b/drivers/serial/serial_msm_geni.c
index b8bc614..e5c3dcf 100644
--- a/drivers/serial/serial_msm_geni.c
+++ b/drivers/serial/serial_msm_geni.c
@@ -188,8 +188,8 @@
int ret;
clk = devm_clk_get(dev, NULL);
- if (!clk)
- return -EINVAL;
+ if (IS_ERR(clk))
+ return PTR_ERR(clk);
ret = clk_set_rate(clk, rate);
return ret;
@@ -248,11 +248,16 @@
struct msm_serial_data *priv = dev_get_priv(dev);
u64 clk_rate;
u32 clk_div;
+ int ret;
priv->baud = baud;
clk_rate = get_clk_div_rate(baud, priv->oversampling, &clk_div);
- geni_serial_set_clock_rate(dev, clk_rate);
+ ret = geni_serial_set_clock_rate(dev, clk_rate);
+ if (ret < 0) {
+ pr_err("%s: Couldn't set clock rate: %d\n", __func__, ret);
+ return ret;
+ }
geni_serial_baud(priv->base, clk_div, baud);
return 0;
@@ -485,12 +490,12 @@
.setbrg = msm_serial_setbrg,
};
-static void geni_set_oversampling(struct udevice *dev)
+static int geni_set_oversampling(struct udevice *dev)
{
struct msm_serial_data *priv = dev_get_priv(dev);
- struct udevice *parent_dev = dev_get_parent(dev);
+ ofnode parent_node = ofnode_get_parent(dev_ofnode(dev));
u32 geni_se_version;
- int ret;
+ fdt_addr_t addr;
priv->oversampling = UART_OVERSAMPLING;
@@ -498,16 +503,20 @@
* It could happen that GENI SE IP is missing in the board's device
* tree or GENI UART node is a direct child of SoC device tree node.
*/
- if (device_get_uclass_id(parent_dev) != UCLASS_MISC)
- return;
+ if (!ofnode_device_is_compatible(parent_node, "qcom,geni-se-qup")) {
+ pr_err("%s: UART node must be a child of geniqup node\n",
+ __func__);
+ return -ENODEV;
+ }
- ret = misc_read(parent_dev, QUP_HW_VER_REG,
- &geni_se_version, sizeof(geni_se_version));
- if (ret != sizeof(geni_se_version))
- return;
+ /* Read the HW_VER register relative to the parents address space */
+ addr = ofnode_get_addr(parent_node);
+ geni_se_version = readl(addr + QUP_HW_VER_REG);
if (geni_se_version >= QUP_SE_VERSION_2_5)
priv->oversampling /= 2;
+
+ return 0;
}
static inline void geni_serial_init(struct udevice *dev)
@@ -552,8 +561,11 @@
static int msm_serial_probe(struct udevice *dev)
{
struct msm_serial_data *priv = dev_get_priv(dev);
+ int ret;
- geni_set_oversampling(dev);
+ ret = geni_set_oversampling(dev);
+ if (ret < 0)
+ return ret;
/* No need to reinitialize the UART after relocation */
if (gd->flags & GD_FLG_RELOC)
diff --git a/drivers/serial/serial_npcm.c b/drivers/serial/serial_npcm.c
index 76ac7cb..6bf3a94 100644
--- a/drivers/serial/serial_npcm.c
+++ b/drivers/serial/serial_npcm.c
@@ -83,8 +83,11 @@
struct npcm_uart *uart = plat->reg;
u16 divisor;
+ if (IS_ENABLED(CONFIG_SYS_SKIP_UART_INIT))
+ return 0;
+
/* BaudOut = UART Clock / (16 * [Divisor + 2]) */
- divisor = DIV_ROUND_CLOSEST(plat->uart_clk, 16 * baudrate + 2) - 2;
+ divisor = DIV_ROUND_CLOSEST(plat->uart_clk, 16 * baudrate) - 2;
setbits_8(&uart->lcr, LCR_DLAB);
writeb(divisor & 0xff, &uart->dll);
@@ -97,29 +100,35 @@
static int npcm_serial_probe(struct udevice *dev)
{
struct npcm_serial_plat *plat = dev_get_plat(dev);
- struct npcm_uart *uart = plat->reg;
+ struct npcm_uart *uart;
struct clk clk, parent;
u32 freq;
int ret;
plat->reg = dev_read_addr_ptr(dev);
- freq = dev_read_u32_default(dev, "clock-frequency", 0);
+ uart = plat->reg;
- ret = clk_get_by_index(dev, 0, &clk);
- if (ret < 0)
- return ret;
+ if (!IS_ENABLED(CONFIG_SYS_SKIP_UART_INIT)) {
+ freq = dev_read_u32_default(dev, "clock-frequency", 24000000);
- ret = clk_get_by_index(dev, 1, &parent);
- if (!ret) {
- ret = clk_set_parent(&clk, &parent);
- if (ret)
+ ret = clk_get_by_index(dev, 0, &clk);
+ if (ret < 0)
return ret;
- }
- ret = clk_set_rate(&clk, freq);
- if (ret < 0)
- return ret;
- plat->uart_clk = ret;
+ ret = clk_get_by_index(dev, 1, &parent);
+ if (!ret) {
+ ret = clk_set_parent(&clk, &parent);
+ if (ret)
+ return ret;
+ }
+
+ if (freq) {
+ ret = clk_set_rate(&clk, freq);
+ if (ret < 0)
+ return ret;
+ }
+ plat->uart_clk = clk_get_rate(&clk);
+ }
/* Disable all interrupt */
writeb(0, &uart->ier);
diff --git a/drivers/serial/serial_s5p.c b/drivers/serial/serial_s5p.c
index 7aeb8c0..7d04dcf 100644
--- a/drivers/serial/serial_s5p.c
+++ b/drivers/serial/serial_s5p.c
@@ -7,7 +7,6 @@
* based on drivers/serial/s3c64xx.c
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <fdtdec.h>
@@ -21,32 +20,39 @@
#include <serial.h>
#include <clk.h>
-DECLARE_GLOBAL_DATA_PTR;
-
enum {
PORT_S5P = 0,
PORT_S5L
};
+#define UFCON_FIFO_EN BIT(0)
+#define UFCON_RX_FIFO_RESET BIT(1)
+#define UMCON_RESET_VAL 0x0
+#define ULCON_WORD_8_BIT 0x3
+#define UCON_RX_IRQ_OR_POLLING BIT(0)
+#define UCON_TX_IRQ_OR_POLLING BIT(2)
+#define UCON_RX_ERR_IRQ_EN BIT(6)
+#define UCON_TX_IRQ_LEVEL BIT(9)
+
#define S5L_RX_FIFO_COUNT_SHIFT 0
#define S5L_RX_FIFO_COUNT_MASK (0xf << S5L_RX_FIFO_COUNT_SHIFT)
-#define S5L_RX_FIFO_FULL (1 << 8)
+#define S5L_RX_FIFO_FULL BIT(8)
#define S5L_TX_FIFO_COUNT_SHIFT 4
#define S5L_TX_FIFO_COUNT_MASK (0xf << S5L_TX_FIFO_COUNT_SHIFT)
-#define S5L_TX_FIFO_FULL (1 << 9)
+#define S5L_TX_FIFO_FULL BIT(9)
#define S5P_RX_FIFO_COUNT_SHIFT 0
#define S5P_RX_FIFO_COUNT_MASK (0xff << S5P_RX_FIFO_COUNT_SHIFT)
-#define S5P_RX_FIFO_FULL (1 << 8)
+#define S5P_RX_FIFO_FULL BIT(8)
#define S5P_TX_FIFO_COUNT_SHIFT 16
#define S5P_TX_FIFO_COUNT_MASK (0xff << S5P_TX_FIFO_COUNT_SHIFT)
-#define S5P_TX_FIFO_FULL (1 << 24)
+#define S5P_TX_FIFO_FULL BIT(24)
/* Information about a serial port */
struct s5p_serial_plat {
- struct s5p_uart *reg; /* address of registers in physical memory */
- u8 reg_width; /* register width */
- u8 port_id; /* uart port number */
+ struct s5p_uart *reg; /* address of registers in physical memory */
+ u8 reg_width; /* register width */
+ u8 port_id; /* uart port number */
u8 rx_fifo_count_shift;
u8 tx_fifo_count_shift;
u32 rx_fifo_count_mask;
@@ -59,7 +65,7 @@
* The coefficient, used to calculate the baudrate on S5P UARTs is
* calculated as
* C = UBRDIV * 16 + number_of_set_bits_in_UDIVSLOT
- * however, section 31.6.11 of the datasheet doesn't recomment using 1 for 1,
+ * however, section 31.6.11 of the datasheet doesn't recommend using 1 for 1,
* 3 for 2, ... (2^n - 1) for n, instead, they suggest using these constants:
*/
static const int udivslot[] = {
@@ -83,13 +89,15 @@
static void __maybe_unused s5p_serial_init(struct s5p_uart *uart)
{
- /* enable FIFOs, auto clear Rx FIFO */
- writel(0x3, &uart->ufcon);
- writel(0, &uart->umcon);
- /* 8N1 */
- writel(0x3, &uart->ulcon);
+ /* Enable FIFOs, auto clear Rx FIFO */
+ writel(UFCON_FIFO_EN | UFCON_RX_FIFO_RESET, &uart->ufcon);
+ /* No auto flow control, disable nRTS signal */
+ writel(UMCON_RESET_VAL, &uart->umcon);
+ /* 8N1, no parity bit */
+ writel(ULCON_WORD_8_BIT, &uart->ulcon);
/* No interrupts, no DMA, pure polling */
- writel(0x245, &uart->ucon);
+ writel(UCON_RX_IRQ_OR_POLLING | UCON_TX_IRQ_OR_POLLING |
+ UCON_RX_ERR_IRQ_EN | UCON_TX_IRQ_LEVEL, &uart->ucon);
}
static void __maybe_unused s5p_serial_baud(struct s5p_uart *uart, u8 reg_width,
@@ -118,7 +126,7 @@
#if IS_ENABLED(CONFIG_CLK_EXYNOS) || IS_ENABLED(CONFIG_ARCH_APPLE)
struct clk clk;
- u32 ret;
+ int ret;
ret = clk_get_by_index(dev, 1, &clk);
if (ret < 0)
@@ -213,16 +221,13 @@
{
struct s5p_serial_plat *plat = dev_get_plat(dev);
const ulong port_type = dev_get_driver_data(dev);
- fdt_addr_t addr;
- addr = dev_read_addr(dev);
- if (addr == FDT_ADDR_T_NONE)
+ plat->reg = dev_read_addr_ptr(dev);
+ if (!plat->reg)
return -EINVAL;
- plat->reg = (struct s5p_uart *)addr;
plat->reg_width = dev_read_u32_default(dev, "reg-io-width", 1);
- plat->port_id = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
- "id", dev_seq(dev));
+ plat->port_id = dev_read_u8_default(dev, "id", dev_seq(dev));
if (port_type == PORT_S5L) {
plat->rx_fifo_count_shift = S5L_RX_FIFO_COUNT_SHIFT;
@@ -244,10 +249,10 @@
}
static const struct dm_serial_ops s5p_serial_ops = {
- .putc = s5p_serial_putc,
- .pending = s5p_serial_pending,
- .getc = s5p_serial_getc,
- .setbrg = s5p_serial_setbrg,
+ .putc = s5p_serial_putc,
+ .pending = s5p_serial_pending,
+ .getc = s5p_serial_getc,
+ .setbrg = s5p_serial_setbrg,
};
static const struct udevice_id s5p_serial_ids[] = {
@@ -257,13 +262,13 @@
};
U_BOOT_DRIVER(serial_s5p) = {
- .name = "serial_s5p",
- .id = UCLASS_SERIAL,
- .of_match = s5p_serial_ids,
- .of_to_plat = s5p_serial_of_to_plat,
+ .name = "serial_s5p",
+ .id = UCLASS_SERIAL,
+ .of_match = s5p_serial_ids,
+ .of_to_plat = s5p_serial_of_to_plat,
.plat_auto = sizeof(struct s5p_serial_plat),
- .probe = s5p_serial_probe,
- .ops = &s5p_serial_ops,
+ .probe = s5p_serial_probe,
+ .ops = &s5p_serial_ops,
};
#endif
@@ -291,10 +296,12 @@
struct s5p_uart *uart = (struct s5p_uart *)CONFIG_VAL(DEBUG_UART_BASE);
#if IS_ENABLED(CONFIG_ARCH_APPLE)
- while (readl(&uart->ufstat) & S5L_TX_FIFO_FULL);
+ while (readl(&uart->ufstat) & S5L_TX_FIFO_FULL)
+ ;
writel(ch, &uart->utxh);
#else
- while (readl(&uart->ufstat) & S5P_TX_FIFO_FULL);
+ while (readl(&uart->ufstat) & S5P_TX_FIFO_FULL)
+ ;
writeb(ch, &uart->utxh);
#endif
}
diff --git a/drivers/soc/ti/keystone_serdes.c b/drivers/soc/ti/keystone_serdes.c
index 2ece1a8..0e1bf8f 100644
--- a/drivers/soc/ti/keystone_serdes.c
+++ b/drivers/soc/ti/keystone_serdes.c
@@ -8,6 +8,7 @@
#include <errno.h>
#include <common.h>
+#include <asm/io.h>
#include <asm/ti-common/keystone_serdes.h>
#include <linux/bitops.h>
diff --git a/drivers/spi/bcm63xx_hsspi.c b/drivers/spi/bcm63xx_hsspi.c
index a24bb43..19d9a5a 100644
--- a/drivers/spi/bcm63xx_hsspi.c
+++ b/drivers/spi/bcm63xx_hsspi.c
@@ -295,7 +295,7 @@
/* transfer loop */
while (data_bytes > 0) {
- size_t curr_step = min(step_size, data_bytes);
+ size_t curr_step = min(step_size, (size_t)data_bytes);
int ret;
/* copy tx data */
diff --git a/drivers/spi/cadence_ospi_versal.c b/drivers/spi/cadence_ospi_versal.c
index e02a3b3..c2be307 100644
--- a/drivers/spi/cadence_ospi_versal.c
+++ b/drivers/spi/cadence_ospi_versal.c
@@ -18,9 +18,6 @@
#include "cadence_qspi.h"
#include <dt-bindings/power/xlnx-versal-power.h>
-#define CMD_4BYTE_READ 0x13
-#define CMD_4BYTE_FAST_READ 0x0C
-
int cadence_qspi_apb_dma_read(struct cadence_spi_priv *priv,
const struct spi_mem_op *op)
{
diff --git a/drivers/spi/cadence_qspi.c b/drivers/spi/cadence_qspi.c
index b0c656d..dfc74c8 100644
--- a/drivers/spi/cadence_qspi.c
+++ b/drivers/spi/cadence_qspi.c
@@ -7,7 +7,6 @@
#include <common.h>
#include <clk.h>
#include <log.h>
-#include <asm-generic/io.h>
#include <dm.h>
#include <fdtdec.h>
#include <malloc.h>
@@ -17,6 +16,7 @@
#include <dm/device_compat.h>
#include <linux/err.h>
#include <linux/errno.h>
+#include <linux/io.h>
#include <linux/sizes.h>
#include <linux/time.h>
#include <zynqmp_firmware.h>
@@ -39,6 +39,11 @@
return 0;
}
+__weak ofnode cadence_qspi_get_subnode(struct udevice *dev)
+{
+ return dev_read_first_subnode(dev);
+}
+
static int cadence_spi_write_speed(struct udevice *bus, uint hz)
{
struct cadence_spi_priv *priv = dev_get_priv(bus);
@@ -400,7 +405,7 @@
plat->is_dma = dev_read_bool(bus, "cdns,is-dma");
/* All other parameters are embedded in the child node */
- subnode = dev_read_first_subnode(bus);
+ subnode = cadence_qspi_get_subnode(bus);
if (!ofnode_valid(subnode)) {
printf("Error: subnode with SPI flash config missing!\n");
return -ENODEV;
diff --git a/drivers/spi/cadence_qspi.h b/drivers/spi/cadence_qspi.h
index 1c59d1a..693474a 100644
--- a/drivers/spi/cadence_qspi.h
+++ b/drivers/spi/cadence_qspi.h
@@ -33,6 +33,10 @@
#define CQSPI_DUMMY_BYTES_MAX 4
#define CQSPI_DUMMY_CLKS_MAX 31
+#define CMD_4BYTE_FAST_READ 0x0C
+#define CMD_4BYTE_OCTAL_READ 0x7c
+#define CMD_4BYTE_READ 0x13
+
/****************************************************************************
* Controller's configuration and status register (offset from QSPI_BASE)
****************************************************************************/
@@ -304,6 +308,7 @@
int cadence_qspi_apb_wait_for_dma_cmplt(struct cadence_spi_priv *priv);
int cadence_qspi_apb_exec_flash_cmd(void *reg_base, unsigned int reg);
int cadence_qspi_versal_flash_reset(struct udevice *dev);
+ofnode cadence_qspi_get_subnode(struct udevice *dev);
void cadence_qspi_apb_enable_linear_mode(bool enable);
#endif /* __CADENCE_QSPI_H__ */
diff --git a/drivers/spi/cadence_qspi_apb.c b/drivers/spi/cadence_qspi_apb.c
index 9ce2c0f..fb90532 100644
--- a/drivers/spi/cadence_qspi_apb.c
+++ b/drivers/spi/cadence_qspi_apb.c
@@ -171,8 +171,7 @@
}
/* Timeout, still in busy mode. */
- printf("QSPI: QSPI is still busy after poll for %d times.\n",
- CQSPI_REG_RETRY);
+ printf("QSPI: QSPI is still busy after poll for %d ms.\n", timeout);
return 0;
}
@@ -470,6 +469,9 @@
else
opcode = op->cmd.opcode;
+ if (opcode == CMD_4BYTE_OCTAL_READ && !priv->dtr)
+ opcode = CMD_4BYTE_FAST_READ;
+
reg = opcode << CQSPI_REG_CMDCTRL_OPCODE_LSB;
/* Set up dummy cycles. */
diff --git a/drivers/spi/designware_spi.c b/drivers/spi/designware_spi.c
index 1c7d0ca..98908c5 100644
--- a/drivers/spi/designware_spi.c
+++ b/drivers/spi/designware_spi.c
@@ -111,6 +111,9 @@
#define SR_TX_ERR BIT(5)
#define SR_DCOL BIT(6)
+/* Bit field in RISR */
+#define RISR_INT_RXOI BIT(3)
+
#define RX_TIMEOUT 1000 /* timeout in ms */
struct dw_spi_plat {
@@ -588,7 +591,7 @@
struct dw_spi_priv *priv = dev_get_priv(bus);
u8 op_len = op->cmd.nbytes + op->addr.nbytes + op->dummy.nbytes;
u8 op_buf[op_len];
- u32 cr0;
+ u32 cr0, sts;
if (read)
priv->tmode = CTRLR0_TMOD_EPROMREAD;
@@ -632,12 +635,21 @@
* them to fail because we are not reading/writing the fifo fast enough.
*/
if (read) {
- priv->rx = op->data.buf.in;
+ void *prev_rx = priv->rx = op->data.buf.in;
priv->rx_end = priv->rx + op->data.nbytes;
dw_write(priv, DW_SPI_SER, 1 << spi_chip_select(slave->dev));
- while (priv->rx != priv->rx_end)
+ while (priv->rx != priv->rx_end) {
dw_reader(priv);
+ if (prev_rx == priv->rx) {
+ sts = dw_read(priv, DW_SPI_RISR);
+ if (sts & RISR_INT_RXOI) {
+ dev_err(bus, "FIFO overflow on Rx\n");
+ return -EIO;
+ }
+ }
+ prev_rx = priv->rx;
+ }
} else {
u32 val;
diff --git a/drivers/spi/fsl_dspi.c b/drivers/spi/fsl_dspi.c
index 89907cb..9b3d5a9 100644
--- a/drivers/spi/fsl_dspi.c
+++ b/drivers/spi/fsl_dspi.c
@@ -14,7 +14,6 @@
#include <common.h>
#include <dm.h>
#include <errno.h>
-#include <common.h>
#include <log.h>
#include <spi.h>
#include <malloc.h>
diff --git a/drivers/spi/meson_spifc_a1.c b/drivers/spi/meson_spifc_a1.c
index 418d4d5..cca4deb 100644
--- a/drivers/spi/meson_spifc_a1.c
+++ b/drivers/spi/meson_spifc_a1.c
@@ -130,7 +130,7 @@
writel(SPIFC_A1_DBUF_AUTO_UPDATE_ADDR,
spifc->base + SPIFC_A1_DBUF_CTRL_REG);
- readsl(spifc->base + SPIFC_A1_DBUF_DATA_REG, buf, count);
+ ioread32_rep(spifc->base + SPIFC_A1_DBUF_DATA_REG, buf, count);
if (pad) {
data = readl(spifc->base + SPIFC_A1_DBUF_DATA_REG);
@@ -147,7 +147,7 @@
writel(SPIFC_A1_DBUF_DIR | SPIFC_A1_DBUF_AUTO_UPDATE_ADDR,
spifc->base + SPIFC_A1_DBUF_CTRL_REG);
- writesl(spifc->base + SPIFC_A1_DBUF_DATA_REG, buf, count);
+ iowrite32_rep(spifc->base + SPIFC_A1_DBUF_DATA_REG, buf, count);
if (pad) {
memcpy(&data, buf + len - pad, pad);
diff --git a/drivers/spi/npcm_pspi.c b/drivers/spi/npcm_pspi.c
index 37bab70..eb14185 100644
--- a/drivers/spi/npcm_pspi.c
+++ b/drivers/spi/npcm_pspi.c
@@ -144,7 +144,7 @@
if (speed > priv->max_hz)
speed = priv->max_hz;
- divisor = DIV_ROUND_CLOSEST(apb_clock, (2 * speed) - 1);
+ divisor = DIV_ROUND_CLOSEST(apb_clock, (2 * speed)) - 1;
if (divisor > MAX_DIV)
divisor = MAX_DIV;
diff --git a/drivers/spi/xilinx_spi.c b/drivers/spi/xilinx_spi.c
index b58a3f6..94ddf49 100644
--- a/drivers/spi/xilinx_spi.c
+++ b/drivers/spi/xilinx_spi.c
@@ -67,7 +67,7 @@
/* SPI Slave Select Register (spissr), [1] p13, [2] p13 */
#define SPISSR_MASK(cs) (1 << (cs))
#define SPISSR_ACT(cs) ~SPISSR_MASK(cs)
-#define SPISSR_OFF ~0UL
+#define SPISSR_OFF (~0U)
/* SPI Software Reset Register (ssr) */
#define SPISSR_RESET_VALUE 0x0a
@@ -109,6 +109,27 @@
u8 startup;
};
+static int xilinx_spi_find_buffer_size(struct xilinx_spi_regs *regs)
+{
+ u8 sr;
+ int n_words = 0;
+
+ /*
+ * Before the buffer_size detection reset the core
+ * to make sure to start with a clean state.
+ */
+ writel(SPISSR_RESET_VALUE, ®s->srr);
+
+ /* Fill the Tx FIFO with as many words as possible */
+ do {
+ writel(0, ®s->spidtr);
+ sr = readl(®s->spisr);
+ n_words++;
+ } while (!(sr & SPISR_TX_FULL));
+
+ return n_words;
+}
+
static int xilinx_spi_probe(struct udevice *bus)
{
struct xilinx_spi_priv *priv = dev_get_priv(bus);
@@ -116,6 +137,8 @@
regs = priv->regs = dev_read_addr_ptr(bus);
priv->fifo_depth = dev_read_u32_default(bus, "fifo-size", 0);
+ if (!priv->fifo_depth)
+ priv->fifo_depth = xilinx_spi_find_buffer_size(regs);
writel(SPISSR_RESET_VALUE, ®s->srr);
@@ -217,9 +240,9 @@
return i;
}
-static int start_transfer(struct spi_slave *spi, const void *dout, void *din, u32 len)
+static int start_transfer(struct udevice *dev, const void *dout, void *din, u32 len)
{
- struct udevice *bus = spi->dev->parent;
+ struct udevice *bus = dev->parent;
struct xilinx_spi_priv *priv = dev_get_priv(bus);
struct xilinx_spi_regs *regs = priv->regs;
u32 count, txbytes, rxbytes;
@@ -259,10 +282,9 @@
return 0;
}
-static void xilinx_spi_startup_block(struct spi_slave *spi)
+static void xilinx_spi_startup_block(struct udevice *dev)
{
- struct dm_spi_slave_plat *slave_plat =
- dev_get_parent_plat(spi->dev);
+ struct dm_spi_slave_plat *slave_plat = dev_get_parent_plat(dev);
unsigned char txp;
unsigned char rxp[8];
@@ -270,13 +292,25 @@
* Perform a dummy read as a work around for
* the startup block issue.
*/
- spi_cs_activate(spi->dev, slave_plat->cs);
+ spi_cs_activate(dev, slave_plat->cs);
txp = 0x9f;
- start_transfer(spi, (void *)&txp, NULL, 1);
+ start_transfer(dev, (void *)&txp, NULL, 1);
- start_transfer(spi, NULL, (void *)rxp, 6);
+ start_transfer(dev, NULL, (void *)rxp, 6);
- spi_cs_deactivate(spi->dev);
+ spi_cs_deactivate(dev);
+}
+
+static int xilinx_spi_xfer(struct udevice *dev, unsigned int bitlen,
+ const void *dout, void *din, unsigned long flags)
+{
+ struct dm_spi_slave_plat *slave_plat = dev_get_parent_plat(dev);
+ int ret;
+
+ spi_cs_activate(dev, slave_plat->cs);
+ ret = start_transfer(dev, dout, din, bitlen / 8);
+ spi_cs_deactivate(dev);
+ return ret;
}
static int xilinx_spi_mem_exec_op(struct spi_slave *spi,
@@ -294,14 +328,15 @@
* as QSPI provides command. So first command fails.
*/
if (!startup) {
- xilinx_spi_startup_block(spi);
+ xilinx_spi_startup_block(spi->dev);
startup++;
}
spi_cs_activate(spi->dev, slave_plat->cs);
if (op->cmd.opcode) {
- ret = start_transfer(spi, (void *)&op->cmd.opcode, NULL, 1);
+ ret = start_transfer(spi->dev, (void *)&op->cmd.opcode,
+ NULL, 1);
if (ret)
goto done;
}
@@ -313,7 +348,7 @@
addr_buf[i] = op->addr.val >>
(8 * (op->addr.nbytes - i - 1));
- ret = start_transfer(spi, (void *)addr_buf, NULL,
+ ret = start_transfer(spi->dev, (void *)addr_buf, NULL,
op->addr.nbytes);
if (ret)
goto done;
@@ -322,16 +357,16 @@
dummy_len = (op->dummy.nbytes * op->data.buswidth) /
op->dummy.buswidth;
- ret = start_transfer(spi, NULL, NULL, dummy_len);
+ ret = start_transfer(spi->dev, NULL, NULL, dummy_len);
if (ret)
goto done;
}
if (op->data.nbytes) {
if (op->data.dir == SPI_MEM_DATA_IN) {
- ret = start_transfer(spi, NULL,
+ ret = start_transfer(spi->dev, NULL,
op->data.buf.in, op->data.nbytes);
} else {
- ret = start_transfer(spi, op->data.buf.out,
+ ret = start_transfer(spi->dev, op->data.buf.out,
NULL, op->data.nbytes);
}
if (ret)
@@ -427,6 +462,7 @@
static const struct dm_spi_ops xilinx_spi_ops = {
.claim_bus = xilinx_spi_claim_bus,
.release_bus = xilinx_spi_release_bus,
+ .xfer = xilinx_spi_xfer,
.set_speed = xilinx_spi_set_speed,
.set_mode = xilinx_spi_set_mode,
.mem_ops = &xilinx_spi_mem_ops,
diff --git a/drivers/spmi/spmi-msm.c b/drivers/spmi/spmi-msm.c
index 27a035c..5fe8a70 100644
--- a/drivers/spmi/spmi-msm.c
+++ b/drivers/spmi/spmi-msm.c
@@ -70,7 +70,7 @@
struct msm_spmi_priv {
phys_addr_t arb_chnl; /* ARB channel mapping base */
- phys_addr_t spmi_core; /* SPMI core */
+ phys_addr_t spmi_chnls; /* SPMI channels */
phys_addr_t spmi_obs; /* SPMI observer */
/* SPMI channel map */
uint8_t channel_map[SPMI_MAX_SLAVES][SPMI_MAX_PERIPH];
@@ -95,10 +95,10 @@
/* Disable IRQ mode for the current channel*/
writel(0x0,
- priv->spmi_core + SPMI_CH_OFFSET(channel) + SPMI_REG_CONFIG);
+ priv->spmi_chnls + SPMI_CH_OFFSET(channel) + SPMI_REG_CONFIG);
/* Write single byte */
- writel(val, priv->spmi_core + SPMI_CH_OFFSET(channel) + SPMI_REG_WDATA);
+ writel(val, priv->spmi_chnls + SPMI_CH_OFFSET(channel) + SPMI_REG_WDATA);
/* Prepare write command */
reg |= SPMI_CMD_EXT_REG_WRITE_LONG << SPMI_CMD_OPCODE_SHIFT;
@@ -113,12 +113,12 @@
ch_offset = SPMI_CH_OFFSET(channel);
/* Send write command */
- writel(reg, priv->spmi_core + SPMI_CH_OFFSET(channel) + SPMI_REG_CMD0);
+ writel(reg, priv->spmi_chnls + SPMI_CH_OFFSET(channel) + SPMI_REG_CMD0);
/* Wait till CMD DONE status */
reg = 0;
while (!reg) {
- reg = readl(priv->spmi_core + SPMI_CH_OFFSET(channel) +
+ reg = readl(priv->spmi_chnls + SPMI_CH_OFFSET(channel) +
SPMI_REG_STATUS);
}
@@ -186,47 +186,37 @@
static int msm_spmi_probe(struct udevice *dev)
{
struct msm_spmi_priv *priv = dev_get_priv(dev);
- phys_addr_t config_addr;
+ phys_addr_t core_addr;
u32 hw_ver;
- u32 version;
int i;
- int err;
- config_addr = dev_read_addr_index(dev, 0);
- priv->spmi_core = dev_read_addr_index(dev, 1);
- priv->spmi_obs = dev_read_addr_index(dev, 2);
+ core_addr = dev_read_addr_name(dev, "core");
+ priv->spmi_chnls = dev_read_addr_name(dev, "chnls");
+ priv->spmi_obs = dev_read_addr_name(dev, "obsrvr");
- hw_ver = readl(config_addr + PMIC_ARB_VERSION);
+ hw_ver = readl(core_addr + PMIC_ARB_VERSION);
if (hw_ver < PMIC_ARB_VERSION_V3_MIN) {
priv->arb_ver = V2;
- version = 2;
- priv->arb_chnl = config_addr + APID_MAP_OFFSET_V1_V2_V3;
+ priv->arb_chnl = core_addr + APID_MAP_OFFSET_V1_V2_V3;
} else if (hw_ver < PMIC_ARB_VERSION_V5_MIN) {
priv->arb_ver = V3;
- version = 3;
- priv->arb_chnl = config_addr + APID_MAP_OFFSET_V1_V2_V3;
+ priv->arb_chnl = core_addr + APID_MAP_OFFSET_V1_V2_V3;
} else {
priv->arb_ver = V5;
- version = 5;
- priv->arb_chnl = config_addr + APID_MAP_OFFSET_V5;
-
- if (err) {
- dev_err(dev, "could not read APID->PPID mapping table, rc= %d\n", err);
- return -1;
- }
+ priv->arb_chnl = core_addr + APID_MAP_OFFSET_V5;
}
- dev_dbg(dev, "PMIC Arb Version-%d (0x%x)\n", version, hw_ver);
+ dev_dbg(dev, "PMIC Arb Version-%d (%#x)\n", hw_ver >> 28, hw_ver);
if (priv->arb_chnl == FDT_ADDR_T_NONE ||
- priv->spmi_core == FDT_ADDR_T_NONE ||
+ priv->spmi_chnls == FDT_ADDR_T_NONE ||
priv->spmi_obs == FDT_ADDR_T_NONE)
return -EINVAL;
- dev_dbg(dev, "priv->arb_chnl address (%llu)\n", priv->arb_chnl);
- dev_dbg(dev, "priv->spmi_core address (%llu)\n", priv->spmi_core);
- dev_dbg(dev, "priv->spmi_obs address (%llu)\n", priv->spmi_obs);
+ dev_dbg(dev, "priv->arb_chnl address (%#08llx)\n", priv->arb_chnl);
+ dev_dbg(dev, "priv->spmi_chnls address (%#08llx)\n", priv->spmi_chnls);
+ dev_dbg(dev, "priv->spmi_obs address (%#08llx)\n", priv->spmi_obs);
/* Scan peripherals connected to each SPMI channel */
for (i = 0; i < SPMI_MAX_PERIPH; i++) {
uint32_t periph = readl(priv->arb_chnl + ARB_CHANNEL_OFFSET(i));
diff --git a/drivers/sysinfo/Kconfig b/drivers/sysinfo/Kconfig
index e35f7cb..2030e4b 100644
--- a/drivers/sysinfo/Kconfig
+++ b/drivers/sysinfo/Kconfig
@@ -8,6 +8,13 @@
if SYSINFO
+config SYSINFO_EXTRA
+ bool "Show extra information on startup"
+ help
+ Enable this to see extra information on startup. Normally only the
+ model is shown, but with this option the vendor and any prior-stage
+ firmware's version and date are shown as well.
+
config SPL_SYSINFO
depends on SPL_DM
bool "Enable board driver support in SPL"
diff --git a/drivers/tee/optee/core.c b/drivers/tee/optee/core.c
index 9a9b697..47f845c 100644
--- a/drivers/tee/optee/core.c
+++ b/drivers/tee/optee/core.c
@@ -139,6 +139,11 @@
if (ret)
return ret;
+ if (!shm_size) {
+ *count = 0;
+ return 0;
+ }
+
ret = tee_shm_alloc(dev, shm_size, 0, shm);
if (ret) {
dev_err(dev, "Failed to allocated shared memory: %d\n", ret);
@@ -185,14 +190,15 @@
ret = enum_services(dev, &service_list, &service_count, tee_sess,
PTA_CMD_GET_DEVICES);
- if (!ret)
+ if (!ret && service_count)
ret = bind_service_list(dev, service_list, service_count);
tee_shm_free(service_list);
+ service_list = NULL;
ret2 = enum_services(dev, &service_list, &service_count, tee_sess,
PTA_CMD_GET_DEVICES_SUPP);
- if (!ret2)
+ if (!ret2 && service_count)
ret2 = bind_service_list(dev, service_list, service_count);
tee_shm_free(service_list);
@@ -841,7 +847,7 @@
if (IS_ENABLED(CONFIG_OPTEE_SERVICE_DISCOVERY)) {
ret = bind_service_drivers(dev);
if (ret)
- return ret;
+ dev_warn(dev, "optee service enumeration failed: %d\n", ret);
} else if (IS_ENABLED(CONFIG_RNG_OPTEE)) {
/*
* Discovery of TAs on the TEE bus is not supported in U-Boot:
diff --git a/drivers/timer/dw-apb-timer.c b/drivers/timer/dw-apb-timer.c
index b171232..6cd2525 100644
--- a/drivers/timer/dw-apb-timer.c
+++ b/drivers/timer/dw-apb-timer.c
@@ -13,7 +13,6 @@
#include <reset.h>
#include <timer.h>
#include <dm/device_compat.h>
-#include <linux/kconfig.h>
#include <asm/io.h>
#include <asm/arch/timer.h>
diff --git a/drivers/timer/starfive-timer.c b/drivers/timer/starfive-timer.c
index 816402f..6ac7d7f 100644
--- a/drivers/timer/starfive-timer.c
+++ b/drivers/timer/starfive-timer.c
@@ -1,7 +1,7 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright 2022 StarFive, Inc. All rights reserved.
- * Author: Lee Kuan Lim <kuanlim.lee@starfivetech.com>
+ * Author: Kuan Lim Lee <kuanlim.lee@starfivetech.com>
*/
#include <common.h>
@@ -48,8 +48,8 @@
int ret;
priv->base = dev_read_addr_ptr(dev);
- if (IS_ERR(priv->base))
- return PTR_ERR(priv->base);
+ if (!priv->base)
+ return -EINVAL;
timer_channel = dev_read_u32_default(dev, "channel", 0);
priv->base = priv->base + (0x40 * timer_channel);
@@ -64,14 +64,16 @@
return ret;
uc_priv->clock_rate = clk_get_rate(&clk);
- /* Initiate timer, channel 0 */
- /* Unmask Interrupt Mask */
+ /*
+ * Initiate timer, channel 0
+ * Unmask Interrupt Mask
+ */
writel(0, priv->base + STF_TIMER_INT_MASK);
/* Single run mode Setting */
if (dev_read_bool(dev, "single-run"))
writel(1, priv->base + STF_TIMER_CTL);
/* Set Reload value */
- priv->timer_size = dev_read_u32_default(dev, "timer-size", 0xffffffff);
+ priv->timer_size = dev_read_u32_default(dev, "timer-size", -1U);
writel(priv->timer_size, priv->base + STF_TIMER_LOAD);
/* Enable to start timer */
writel(1, priv->base + STF_TIMER_ENABLE);
@@ -85,7 +87,7 @@
};
U_BOOT_DRIVER(jh8100_starfive_timer) = {
- .name = "jh8100_starfive_timer",
+ .name = "starfive_timer",
.id = UCLASS_TIMER,
.of_match = starfive_ids,
.probe = starfive_probe,
diff --git a/drivers/timer/timer-uclass.c b/drivers/timer/timer-uclass.c
index 0c2018b..60ff655 100644
--- a/drivers/timer/timer-uclass.c
+++ b/drivers/timer/timer-uclass.c
@@ -66,13 +66,13 @@
err = clk_get_by_index(dev, 0, &timer_clk);
if (!err) {
ret = clk_get_rate(&timer_clk);
- if (IS_ERR_VALUE(ret))
- return ret;
- uc_priv->clock_rate = ret;
- } else {
- uc_priv->clock_rate =
- dev_read_u32_default(dev, "clock-frequency", 0);
+ if (!IS_ERR_VALUE(ret)) {
+ uc_priv->clock_rate = ret;
+ return 0;
+ }
}
+
+ uc_priv->clock_rate = dev_read_u32_default(dev, "clock-frequency", 0);
}
return 0;
diff --git a/drivers/ufs/Kconfig b/drivers/ufs/Kconfig
index ee021c7..7da46fa 100644
--- a/drivers/ufs/Kconfig
+++ b/drivers/ufs/Kconfig
@@ -15,6 +15,17 @@
This selects the platform driver for the Cadence UFS host
controller present on present TI's J721e devices.
+config UFS_PCI
+ bool "PCI bus based UFS Controller support"
+ depends on PCI && UFS
+ help
+ This selects the PCI UFS Host Controller Interface. Select this if
+ you have UFS Host Controller with PCI Interface.
+
+ If you have a controller with this interface, say Y here.
+
+ If unsure, say N.
+
config TI_J721E_UFS
bool "Glue Layer driver for UFS on TI J721E devices"
help
diff --git a/drivers/ufs/Makefile b/drivers/ufs/Makefile
index 56a4b07..67c4262 100644
--- a/drivers/ufs/Makefile
+++ b/drivers/ufs/Makefile
@@ -6,4 +6,5 @@
obj-$(CONFIG_UFS) += ufs.o ufs-uclass.o
obj-$(CONFIG_CADENCE_UFS) += cdns-platform.o
obj-$(CONFIG_TI_J721E_UFS) += ti-j721e-ufs.o
+obj-$(CONFIG_UFS_PCI) += ufs-pci.o
obj-$(CONFIG_UFS_RENESAS) += ufs-renesas.o
diff --git a/drivers/ufs/ufs-pci.c b/drivers/ufs/ufs-pci.c
new file mode 100644
index 0000000..ad41358
--- /dev/null
+++ b/drivers/ufs/ufs-pci.c
@@ -0,0 +1,45 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2023 tinylab.org
+ * Author: Bin Meng <bmeng@tinylab.org>
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <pci.h>
+#include <ufs.h>
+#include <dm/device_compat.h>
+#include "ufs.h"
+
+static int ufs_pci_bind(struct udevice *dev)
+{
+ struct udevice *scsi_dev;
+
+ return ufs_scsi_bind(dev, &scsi_dev);
+}
+
+static int ufs_pci_probe(struct udevice *dev)
+{
+ int err;
+
+ err = ufshcd_probe(dev, NULL);
+ if (err)
+ dev_err(dev, "%s failed (ret=%d)\n", __func__, err);
+
+ return err;
+}
+
+U_BOOT_DRIVER(ufs_pci) = {
+ .name = "ufs_pci",
+ .id = UCLASS_UFS,
+ .bind = ufs_pci_bind,
+ .probe = ufs_pci_probe,
+};
+
+static struct pci_device_id ufs_supported[] = {
+ { PCI_DEVICE(PCI_VENDOR_ID_REDHAT, PCI_DEVICE_ID_REDHAT_UFS) },
+ {},
+};
+
+U_BOOT_PCI_DEVICE(ufs_pci, ufs_supported);
diff --git a/drivers/ufs/ufs-uclass.c b/drivers/ufs/ufs-uclass.c
index e6478a9..92fcdf4 100644
--- a/drivers/ufs/ufs-uclass.c
+++ b/drivers/ufs/ufs-uclass.c
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
/**
- * ufs-uclass.c - Universal Flash Subsystem (UFS) Uclass driver
+ * ufs-uclass.c - Universal Flash Storage (UFS) Uclass driver
*
* Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com
*/
diff --git a/drivers/ufs/ufs.c b/drivers/ufs/ufs.c
index 346f0fd..e4400f3 100644
--- a/drivers/ufs/ufs.c
+++ b/drivers/ufs/ufs.c
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+
/**
- * ufs.c - Universal Flash Subsystem (UFS) driver
+ * ufs.c - Universal Flash Storage (UFS) driver
*
* Taken from Linux Kernel v5.2 (drivers/scsi/ufs/ufshcd.c) and ported
* to u-boot.
@@ -320,7 +320,7 @@
UIC_ARG_MPHY_TX_GEN_SEL_INDEX(i)),
0);
if (err) {
- dev_err(hba->dev, "%s: TX LCC Disable failed, peer = %d, lane = %d, err = %d",
+ dev_err(hba->dev, "%s: TX LCC Disable failed, peer = %d, lane = %d, err = %d\n",
__func__, peer, i, err);
break;
}
@@ -441,7 +441,7 @@
ufshcd_enable_run_stop_reg(hba);
} else {
dev_err(hba->dev,
- "Host controller not ready to process requests");
+ "Host controller not ready to process requests\n");
err = -EIO;
goto out;
}
@@ -930,7 +930,7 @@
memcpy(hba->dev_cmd.query.descriptor, descp, resp_len);
} else {
dev_warn(hba->dev,
- "%s: Response size is bigger than buffer",
+ "%s: Response size is bigger than buffer\n",
__func__);
return -EINVAL;
}
@@ -1179,11 +1179,11 @@
&header_len);
if (ret) {
- dev_err(hba->dev, "%s: Failed to get descriptor header id %d",
+ dev_err(hba->dev, "%s: Failed to get descriptor header id %d\n",
__func__, desc_id);
return ret;
} else if (desc_id != header[QUERY_DESC_DESC_TYPE_OFFSET]) {
- dev_warn(hba->dev, "%s: descriptor header id %d and desc_id %d mismatch",
+ dev_warn(hba->dev, "%s: descriptor header id %d and desc_id %d mismatch\n",
__func__, header[QUERY_DESC_DESC_TYPE_OFFSET],
desc_id);
ret = -EINVAL;
@@ -1302,7 +1302,7 @@
/* Sanity checks */
if (ret || !buff_len) {
- dev_err(hba->dev, "%s: Failed to get full descriptor length",
+ dev_err(hba->dev, "%s: Failed to get full descriptor length\n",
__func__);
return ret;
}
@@ -1323,14 +1323,14 @@
&buff_len);
if (ret) {
- dev_err(hba->dev, "%s: Failed reading descriptor. desc_id %d, desc_index %d, param_offset %d, ret %d",
+ dev_err(hba->dev, "%s: Failed reading descriptor. desc_id %d, desc_index %d, param_offset %d, ret %d\n",
__func__, desc_id, desc_index, param_offset, ret);
goto out;
}
/* Sanity check */
if (desc_buf[QUERY_DESC_DESC_TYPE_OFFSET] != desc_id) {
- dev_err(hba->dev, "%s: invalid desc_id %d in descriptor header",
+ dev_err(hba->dev, "%s: invalid desc_id %d in descriptor header\n",
__func__, desc_buf[QUERY_DESC_DESC_TYPE_OFFSET]);
ret = -EINVAL;
goto out;
@@ -1914,6 +1914,7 @@
struct ufs_hba *hba = dev_get_uclass_priv(ufs_dev);
struct scsi_plat *scsi_plat;
struct udevice *scsi_dev;
+ void __iomem *mmio_base;
int err;
device_find_first_child(ufs_dev, &scsi_dev);
@@ -1927,7 +1928,14 @@
hba->dev = ufs_dev;
hba->ops = hba_ops;
- hba->mmio_base = dev_read_addr_ptr(ufs_dev);
+
+ if (device_is_on_pci_bus(ufs_dev)) {
+ mmio_base = dm_pci_map_bar(ufs_dev, PCI_BASE_ADDRESS_0, 0, 0,
+ PCI_REGION_TYPE, PCI_REGION_MEM);
+ } else {
+ mmio_base = dev_read_addr_ptr(ufs_dev);
+ }
+ hba->mmio_base = mmio_base;
/* Set descriptor lengths to specification defaults */
ufshcd_def_desc_sizes(hba);
@@ -1945,7 +1953,8 @@
hba->version != UFSHCI_VERSION_11 &&
hba->version != UFSHCI_VERSION_20 &&
hba->version != UFSHCI_VERSION_21 &&
- hba->version != UFSHCI_VERSION_30)
+ hba->version != UFSHCI_VERSION_30 &&
+ hba->version != UFSHCI_VERSION_31)
dev_err(hba->dev, "invalid UFS version 0x%x\n",
hba->version);
diff --git a/drivers/ufs/ufs.h b/drivers/ufs/ufs.h
index 9daaf03..816a5ce 100644
--- a/drivers/ufs/ufs.h
+++ b/drivers/ufs/ufs.h
@@ -782,6 +782,7 @@
UFSHCI_VERSION_20 = 0x00000200, /* 2.0 */
UFSHCI_VERSION_21 = 0x00000210, /* 2.1 */
UFSHCI_VERSION_30 = 0x00000300, /* 3.0 */
+ UFSHCI_VERSION_31 = 0x00000310, /* 3.1 */
};
/* Interrupt disable masks */
diff --git a/drivers/usb/cdns3/cdns3-ti.c b/drivers/usb/cdns3/cdns3-ti.c
index 92a7941..2e44aad 100644
--- a/drivers/usb/cdns3/cdns3-ti.c
+++ b/drivers/usb/cdns3/cdns3-ti.c
@@ -6,7 +6,6 @@
*/
#include <common.h>
-#include <asm-generic/io.h>
#include <clk.h>
#include <dm.h>
#include <dm/device_compat.h>
diff --git a/drivers/usb/cdns3/core.c b/drivers/usb/cdns3/core.c
index 644a979..12a741c 100644
--- a/drivers/usb/cdns3/core.c
+++ b/drivers/usb/cdns3/core.c
@@ -333,20 +333,28 @@
mutex_init(&cdns->mutex);
ret = generic_phy_get_by_name(dev, "cdns3,usb2-phy", &cdns->usb2_phy);
- if (ret)
- dev_warn(dev, "Unable to get USB2 phy (ret %d)\n", ret);
-
- ret = generic_phy_init(&cdns->usb2_phy);
- if (ret)
+ if (!ret) {
+ ret = generic_phy_init(&cdns->usb2_phy);
+ if (ret) {
+ dev_err(dev, "USB2 PHY init failed: %d\n", ret);
+ return ret;
+ }
+ } else if (ret != -ENOENT && ret != -ENODATA) {
+ dev_err(dev, "Couldn't get USB2 PHY: %d\n", ret);
return ret;
+ }
ret = generic_phy_get_by_name(dev, "cdns3,usb3-phy", &cdns->usb3_phy);
- if (ret)
- dev_warn(dev, "Unable to get USB3 phy (ret %d)\n", ret);
-
- ret = generic_phy_init(&cdns->usb3_phy);
- if (ret)
+ if (!ret) {
+ ret = generic_phy_init(&cdns->usb3_phy);
+ if (ret) {
+ dev_err(dev, "USB3 PHY init failed: %d\n", ret);
+ return ret;
+ }
+ } else if (ret != -ENOENT && ret != -ENODATA) {
+ dev_err(dev, "Couldn't get USB3 PHY: %d\n", ret);
return ret;
+ }
ret = generic_phy_power_on(&cdns->usb2_phy);
if (ret)
diff --git a/drivers/usb/dwc3/dwc3-generic.c b/drivers/usb/dwc3/dwc3-generic.c
index 744fde8..6fb2de8 100644
--- a/drivers/usb/dwc3/dwc3-generic.c
+++ b/drivers/usb/dwc3/dwc3-generic.c
@@ -610,6 +610,7 @@
{ .compatible = "rockchip,rk3328-dwc3", .data = (ulong)&rk_ops },
{ .compatible = "rockchip,rk3399-dwc3" },
{ .compatible = "rockchip,rk3568-dwc3", .data = (ulong)&rk_ops },
+ { .compatible = "rockchip,rk3588-dwc3", .data = (ulong)&rk_ops },
{ .compatible = "qcom,dwc3" },
{ .compatible = "fsl,imx8mp-dwc3", .data = (ulong)&imx8mp_ops },
{ .compatible = "fsl,imx8mq-dwc3" },
diff --git a/drivers/usb/dwc3/dwc3-meson-g12a.c b/drivers/usb/dwc3/dwc3-meson-g12a.c
index e0356e6..1960352 100644
--- a/drivers/usb/dwc3/dwc3-meson-g12a.c
+++ b/drivers/usb/dwc3/dwc3-meson-g12a.c
@@ -8,13 +8,13 @@
#include <common.h>
#include <log.h>
-#include <asm-generic/io.h>
#include <dm.h>
#include <dm/device-internal.h>
#include <dm/lists.h>
#include <dwc3-uboot.h>
#include <generic-phy.h>
#include <linux/delay.h>
+#include <linux/io.h>
#include <linux/printk.h>
#include <linux/usb/ch9.h>
#include <linux/usb/gadget.h>
diff --git a/drivers/usb/dwc3/dwc3-meson-gxl.c b/drivers/usb/dwc3/dwc3-meson-gxl.c
index d56f274..cbe8aaa 100644
--- a/drivers/usb/dwc3/dwc3-meson-gxl.c
+++ b/drivers/usb/dwc3/dwc3-meson-gxl.c
@@ -8,12 +8,12 @@
#define DEBUG
#include <common.h>
-#include <asm-generic/io.h>
#include <dm.h>
#include <dm/device-internal.h>
#include <dm/lists.h>
#include <dwc3-uboot.h>
#include <generic-phy.h>
+#include <linux/io.h>
#include <linux/usb/ch9.h>
#include <linux/usb/gadget.h>
#include <malloc.h>
diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig
index 4eccc5e..c72a804 100644
--- a/drivers/usb/gadget/Kconfig
+++ b/drivers/usb/gadget/Kconfig
@@ -17,6 +17,7 @@
bool "USB Gadget Support"
depends on DM
select DM_USB
+ imply CMD_BIND
help
USB is a master/slave protocol, organized with one master
host (such as a PC) controlling up to 127 peripheral devices.
diff --git a/drivers/usb/gadget/bcm_udc_otg.h b/drivers/usb/gadget/bcm_udc_otg.h
index 24cc936..48370f3 100644
--- a/drivers/usb/gadget/bcm_udc_otg.h
+++ b/drivers/usb/gadget/bcm_udc_otg.h
@@ -6,8 +6,6 @@
#ifndef __BCM_UDC_OTG_H
#define __BCM_UDC_OTG_H
-#include <common.h>
-
static inline void wfld_set(uintptr_t addr, uint32_t fld_val, uint32_t fld_mask)
{
writel(((readl(addr) & ~(fld_mask)) | (fld_val)), (addr));
diff --git a/drivers/usb/gadget/ci_udc.c b/drivers/usb/gadget/ci_udc.c
index 2bfacfe..750d471 100644
--- a/drivers/usb/gadget/ci_udc.c
+++ b/drivers/usb/gadget/ci_udc.c
@@ -13,6 +13,7 @@
#include <cpu_func.h>
#include <net.h>
#include <malloc.h>
+#include <wait_bit.h>
#include <asm/byteorder.h>
#include <asm/cache.h>
#include <linux/delay.h>
@@ -354,12 +355,49 @@
return 0;
}
+static int ep_disable(int num, int in)
+{
+ struct ci_udc *udc = (struct ci_udc *)controller.ctrl->hcor;
+ unsigned int ep_bit, enable_bit;
+ int err;
+
+ if (in) {
+ ep_bit = EPT_TX(num);
+ enable_bit = CTRL_TXE;
+ } else {
+ ep_bit = EPT_RX(num);
+ enable_bit = CTRL_RXE;
+ }
+
+ /* clear primed buffers */
+ do {
+ writel(ep_bit, &udc->epflush);
+ err = wait_for_bit_le32(&udc->epflush, ep_bit, false, 1000, false);
+ if (err)
+ return err;
+ } while (readl(&udc->epstat) & ep_bit);
+
+ /* clear enable bit */
+ clrbits_le32(&udc->epctrl[num], enable_bit);
+
+ return 0;
+}
+
static int ci_ep_disable(struct usb_ep *ep)
{
struct ci_ep *ci_ep = container_of(ep, struct ci_ep, ep);
+ int num, in, err;
+
+ num = ci_ep->desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK;
+ in = (ci_ep->desc->bEndpointAddress & USB_DIR_IN) != 0;
+
+ err = ep_disable(num, in);
+ if (err)
+ return err;
ci_ep->desc = NULL;
ep->desc = NULL;
+ ci_ep->req_primed = false;
return 0;
}
diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c
index 741775a..09e740c 100644
--- a/drivers/usb/gadget/f_fastboot.c
+++ b/drivers/usb/gadget/f_fastboot.c
@@ -497,6 +497,25 @@
do_exit_on_complete(ep, req);
}
+static int multiresponse_cmd = -1;
+static void multiresponse_on_complete(struct usb_ep *ep, struct usb_request *req)
+{
+ char response[FASTBOOT_RESPONSE_LEN] = {0};
+
+ if (multiresponse_cmd == -1)
+ return;
+
+ /* Call handler to obtain next response */
+ fastboot_multiresponse(multiresponse_cmd, response);
+ fastboot_tx_write_str(response);
+
+ /* If response is final OKAY/FAIL response disconnect this handler and unset cmd */
+ if (!strncmp("OKAY", response, 4) || !strncmp("FAIL", response, 4)) {
+ multiresponse_cmd = -1;
+ fastboot_func->in_req->complete = fastboot_complete;
+ }
+}
+
static void do_acmd_complete(struct usb_ep *ep, struct usb_request *req)
{
/* When usb dequeue complete will be called
@@ -520,10 +539,20 @@
cmdbuf[req->actual] = '\0';
cmd = fastboot_handle_command(cmdbuf, response);
} else {
- pr_err("buffer overflow");
+ pr_err("buffer overflow\n");
fastboot_fail("buffer overflow", response);
}
+ if (!strncmp(FASTBOOT_MULTIRESPONSE_START, response, 4)) {
+ multiresponse_cmd = cmd;
+ fastboot_multiresponse(multiresponse_cmd, response);
+
+ /* Only add complete callback if first is not a final OKAY/FAIL response */
+ if (strncmp("OKAY", response, 4) && strncmp("FAIL", response, 4)) {
+ fastboot_func->in_req->complete = multiresponse_on_complete;
+ }
+ }
+
if (!strncmp("DATA", response, 4)) {
req->complete = rx_handler_dl_image;
req->length = rx_bytes_expected(ep);
diff --git a/drivers/usb/gadget/f_mass_storage.c b/drivers/usb/gadget/f_mass_storage.c
index 1d17331..c725aed 100644
--- a/drivers/usb/gadget/f_mass_storage.c
+++ b/drivers/usb/gadget/f_mass_storage.c
@@ -327,6 +327,7 @@
unsigned int short_packet_received:1;
unsigned int bad_lun_okay:1;
unsigned int running:1;
+ unsigned int eject:1;
int thread_wakeup_needed;
struct completion thread_notifier;
@@ -669,6 +670,10 @@
}
if (k == 10) {
+ /* Handle START-STOP UNIT */
+ if (common->eject)
+ return -EPIPE;
+
/* Handle CTRL+C */
if (ctrlc())
return -EPIPE;
@@ -1325,6 +1330,8 @@
return -EINVAL;
}
+ common->eject = 1;
+
return 0;
}
diff --git a/drivers/usb/gadget/udc/udc-core.c b/drivers/usb/gadget/udc/udc-core.c
index eb0b359..ba658d9 100644
--- a/drivers/usb/gadget/udc/udc-core.c
+++ b/drivers/usb/gadget/udc/udc-core.c
@@ -323,6 +323,7 @@
int usb_gadget_probe_driver(struct usb_gadget_driver *driver)
{
struct usb_udc *udc = NULL;
+ unsigned int udc_count = 0;
int ret;
if (!driver || !driver->bind || !driver->setup)
@@ -330,12 +331,22 @@
mutex_lock(&udc_lock);
list_for_each_entry(udc, &udc_list, list) {
+ udc_count++;
+
/* For now we take the first one */
if (!udc->driver)
goto found;
}
- printf("couldn't find an available UDC\n");
+ if (!udc_count)
+ printf("No UDC available in the system\n");
+ else
+ /* When this happens, users should 'unbind <class> <index>'
+ * using the output of 'dm tree' and looking at the line right
+ * after the USB peripheral/device controller.
+ */
+ printf("All UDCs in use (%d available), use the unbind command\n",
+ udc_count);
mutex_unlock(&udc_lock);
return -ENODEV;
found:
diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index b501ea5..0dd5736 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -39,7 +39,6 @@
config USB_XHCI_DWC3_OF_SIMPLE
bool "DesignWare USB3 DRD Generic OF Simple Glue Layer"
depends on DM_USB
- default y if ARCH_ROCKCHIP
default y if DRA7XX
help
Support USB2/3 functionality in simple SoC integrations with
@@ -90,7 +89,7 @@
config USB_XHCI_PCI
bool "Support for PCI-based xHCI USB controller"
- depends on DM_USB
+ depends on DM_USB && PCI
default y if X86
help
Enables support for the PCI-based xHCI controller.
diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c
index c8260cb..b60661f 100644
--- a/drivers/usb/host/xhci-ring.c
+++ b/drivers/usb/host/xhci-ring.c
@@ -202,6 +202,7 @@
bool more_trbs_coming, unsigned int *trb_fields)
{
struct xhci_generic_trb *trb;
+ dma_addr_t addr;
int i;
trb = &ring->enqueue->generic;
@@ -211,9 +212,11 @@
xhci_flush_cache((uintptr_t)trb, sizeof(struct xhci_generic_trb));
+ addr = xhci_trb_virt_to_dma(ring->enq_seg, (union xhci_trb *)trb);
+
inc_enq(ctrl, ring, more_trbs_coming);
- return xhci_trb_virt_to_dma(ring->enq_seg, (union xhci_trb *)trb);
+ return addr;
}
/**
@@ -243,7 +246,8 @@
puts("WARN waiting for error on ep to be cleared\n");
return -EINVAL;
case EP_STATE_HALTED:
- puts("WARN halted endpoint, queueing URB anyway.\n");
+ puts("WARN endpoint is halted\n");
+ return -EINVAL;
case EP_STATE_STOPPED:
case EP_STATE_RUNNING:
debug("EP STATE RUNNING.\n");
@@ -466,7 +470,8 @@
continue;
type = TRB_FIELD_TO_TYPE(le32_to_cpu(event->event_cmd.flags));
- if (type == expected)
+ if (type == expected ||
+ (expected == TRB_NONE && type != TRB_PORT_STATUS))
return event;
if (type == TRB_PORT_STATUS)
@@ -492,8 +497,9 @@
if (expected == TRB_TRANSFER)
return NULL;
- printf("XHCI timeout on event type %d... cannot recover.\n", expected);
- BUG();
+ printf("XHCI timeout on event type %d...\n", expected);
+
+ return NULL;
}
/*
@@ -511,6 +517,9 @@
printf("Resetting EP %d...\n", ep_index);
xhci_queue_command(ctrl, 0, udev->slot_id, ep_index, TRB_RESET_EP);
event = xhci_wait_for_event(ctrl, TRB_COMPLETION);
+ if (!event)
+ return;
+
field = le32_to_cpu(event->trans_event.flags);
BUG_ON(TRB_TO_SLOT_ID(field) != udev->slot_id);
xhci_acknowledge_event(ctrl);
@@ -519,6 +528,9 @@
(void *)((uintptr_t)ring->enqueue | ring->cycle_state));
xhci_queue_command(ctrl, addr, udev->slot_id, ep_index, TRB_SET_DEQ);
event = xhci_wait_for_event(ctrl, TRB_COMPLETION);
+ if (!event)
+ return;
+
BUG_ON(TRB_TO_SLOT_ID(le32_to_cpu(event->event_cmd.flags))
!= udev->slot_id || GET_COMP_CODE(le32_to_cpu(
event->event_cmd.status)) != COMP_SUCCESS);
@@ -538,29 +550,49 @@
struct xhci_ctrl *ctrl = xhci_get_ctrl(udev);
struct xhci_ring *ring = ctrl->devs[udev->slot_id]->eps[ep_index].ring;
union xhci_trb *event;
+ xhci_comp_code comp;
+ trb_type type;
u64 addr;
u32 field;
xhci_queue_command(ctrl, 0, udev->slot_id, ep_index, TRB_STOP_RING);
- event = xhci_wait_for_event(ctrl, TRB_TRANSFER);
- field = le32_to_cpu(event->trans_event.flags);
- BUG_ON(TRB_TO_SLOT_ID(field) != udev->slot_id);
- BUG_ON(TRB_TO_EP_INDEX(field) != ep_index);
- BUG_ON(GET_COMP_CODE(le32_to_cpu(event->trans_event.transfer_len
- != COMP_STOP)));
- xhci_acknowledge_event(ctrl);
+ event = xhci_wait_for_event(ctrl, TRB_NONE);
+ if (!event)
+ return;
- event = xhci_wait_for_event(ctrl, TRB_COMPLETION);
- BUG_ON(TRB_TO_SLOT_ID(le32_to_cpu(event->event_cmd.flags))
- != udev->slot_id || GET_COMP_CODE(le32_to_cpu(
- event->event_cmd.status)) != COMP_SUCCESS);
+ type = TRB_FIELD_TO_TYPE(le32_to_cpu(event->event_cmd.flags));
+ if (type == TRB_TRANSFER) {
+ field = le32_to_cpu(event->trans_event.flags);
+ BUG_ON(TRB_TO_SLOT_ID(field) != udev->slot_id);
+ BUG_ON(TRB_TO_EP_INDEX(field) != ep_index);
+ BUG_ON(GET_COMP_CODE(le32_to_cpu(event->trans_event.transfer_len
+ != COMP_STOP)));
+ xhci_acknowledge_event(ctrl);
+
+ event = xhci_wait_for_event(ctrl, TRB_COMPLETION);
+ if (!event)
+ return;
+ type = TRB_FIELD_TO_TYPE(le32_to_cpu(event->event_cmd.flags));
+
+ } else {
+ printf("abort_td: Expected a TRB_TRANSFER TRB first\n");
+ }
+
+ comp = GET_COMP_CODE(le32_to_cpu(event->event_cmd.status));
+ BUG_ON(type != TRB_COMPLETION ||
+ TRB_TO_SLOT_ID(le32_to_cpu(event->event_cmd.flags))
+ != udev->slot_id || (comp != COMP_SUCCESS && comp
+ != COMP_CTX_STATE));
xhci_acknowledge_event(ctrl);
addr = xhci_trb_virt_to_dma(ring->enq_seg,
(void *)((uintptr_t)ring->enqueue | ring->cycle_state));
xhci_queue_command(ctrl, addr, udev->slot_id, ep_index, TRB_SET_DEQ);
event = xhci_wait_for_event(ctrl, TRB_COMPLETION);
+ if (!event)
+ return;
+
BUG_ON(TRB_TO_SLOT_ID(le32_to_cpu(event->event_cmd.flags))
!= udev->slot_id || GET_COMP_CODE(le32_to_cpu(
event->event_cmd.status)) != COMP_SUCCESS);
@@ -644,6 +676,14 @@
ep_ctx = xhci_get_ep_ctx(ctrl, virt_dev->out_ctx, ep_index);
+ /*
+ * If the endpoint was halted due to a prior error, resume it before
+ * the next transfer. It is the responsibility of the upper layer to
+ * have dealt with whatever caused the error.
+ */
+ if ((le32_to_cpu(ep_ctx->ep_info) & EP_STATE_MASK) == EP_STATE_HALTED)
+ reset_ep(udev, ep_index);
+
ring = virt_dev->eps[ep_index].ring;
/*
* How much data is (potentially) left before the 64KB boundary?
diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
index 5cacf07..d13cbff 100644
--- a/drivers/usb/host/xhci.c
+++ b/drivers/usb/host/xhci.c
@@ -451,6 +451,9 @@
xhci_queue_command(ctrl, in_ctx->dma, udev->slot_id, 0,
ctx_change ? TRB_EVAL_CONTEXT : TRB_CONFIG_EP);
event = xhci_wait_for_event(ctrl, TRB_COMPLETION);
+ if (!event)
+ return -ETIMEDOUT;
+
BUG_ON(TRB_TO_SLOT_ID(le32_to_cpu(event->event_cmd.flags))
!= udev->slot_id);
@@ -647,6 +650,9 @@
xhci_queue_command(ctrl, virt_dev->in_ctx->dma,
slot_id, 0, TRB_ADDR_DEV);
event = xhci_wait_for_event(ctrl, TRB_COMPLETION);
+ if (!event)
+ return -ETIMEDOUT;
+
BUG_ON(TRB_TO_SLOT_ID(le32_to_cpu(event->event_cmd.flags)) != slot_id);
switch (GET_COMP_CODE(le32_to_cpu(event->event_cmd.status))) {
@@ -722,6 +728,9 @@
xhci_queue_command(ctrl, 0, 0, 0, TRB_ENABLE_SLOT);
event = xhci_wait_for_event(ctrl, TRB_COMPLETION);
+ if (!event)
+ return -ETIMEDOUT;
+
BUG_ON(GET_COMP_CODE(le32_to_cpu(event->event_cmd.status))
!= COMP_SUCCESS);
diff --git a/drivers/usb/musb-new/musb_io.h b/drivers/usb/musb-new/musb_io.h
index 72a5365..19b12f3 100644
--- a/drivers/usb/musb-new/musb_io.h
+++ b/drivers/usb/musb-new/musb_io.h
@@ -14,31 +14,7 @@
#ifndef __MUSB_LINUX_PLATFORM_ARCH_H__
#define __MUSB_LINUX_PLATFORM_ARCH_H__
-#ifndef __UBOOT__
#include <linux/io.h>
-#else
-#include <asm/io.h>
-#endif
-
-#if !defined(CONFIG_ARM) && !defined(CONFIG_SUPERH) \
- && !defined(CONFIG_PPC32) \
- && !defined(CONFIG_PPC64) && !defined(CONFIG_MIPS) \
- && !defined(CONFIG_M68K)
-static inline void readsl(const void __iomem *addr, void *buf, int len)
- { insl((unsigned long)addr, buf, len); }
-static inline void readsw(const void __iomem *addr, void *buf, int len)
- { insw((unsigned long)addr, buf, len); }
-static inline void readsb(const void __iomem *addr, void *buf, int len)
- { insb((unsigned long)addr, buf, len); }
-
-static inline void writesl(const void __iomem *addr, const void *buf, int len)
- { outsl((unsigned long)addr, buf, len); }
-static inline void writesw(const void __iomem *addr, const void *buf, int len)
- { outsw((unsigned long)addr, buf, len); }
-static inline void writesb(const void __iomem *addr, const void *buf, int len)
- { outsb((unsigned long)addr, buf, len); }
-
-#endif
/* NOTE: these offsets are all in bytes */
diff --git a/drivers/video/exynos/exynos_dp.c b/drivers/video/exynos/exynos_dp.c
index a532d5a..59838da 100644
--- a/drivers/video/exynos/exynos_dp.c
+++ b/drivers/video/exynos/exynos_dp.c
@@ -7,7 +7,6 @@
#include <common.h>
#include <dm.h>
-#include <common.h>
#include <display.h>
#include <fdtdec.h>
#include <log.h>
diff --git a/drivers/video/stm32/stm32_ltdc.c b/drivers/video/stm32/stm32_ltdc.c
index 6fd90e3..4f60ba8 100644
--- a/drivers/video/stm32/stm32_ltdc.c
+++ b/drivers/video/stm32/stm32_ltdc.c
@@ -495,6 +495,33 @@
setbits_le32(priv->regs + LTDC_L1CR, LXCR_LEN);
}
+#if IS_ENABLED(CONFIG_TARGET_STM32F469_DISCOVERY)
+static int stm32_ltdc_alloc_fb(struct udevice *dev)
+{
+ u32 sdram_size = gd->ram_size;
+ struct video_uc_plat *uc_plat = dev_get_uclass_plat(dev);
+ phys_addr_t cpu;
+ dma_addr_t bus;
+ u64 dma_size;
+ int ret;
+
+ ret = dev_get_dma_range(dev, &cpu, &bus, &dma_size);
+ if (ret) {
+ dev_err(dev, "failed to get dma address\n");
+ return ret;
+ }
+
+ uc_plat->base = bus + sdram_size - ALIGN(uc_plat->size, uc_plat->align);
+ return 0;
+}
+#else
+static inline int stm32_ltdc_alloc_fb(struct udevice *dev)
+{
+ /* Delegate framebuffer allocation to video-uclass */
+ return 0;
+}
+#endif
+
static int stm32_ltdc_probe(struct udevice *dev)
{
struct video_uc_plat *uc_plat = dev_get_uclass_plat(dev);
@@ -605,6 +632,10 @@
priv->crop_h = timings.vactive.typ;
priv->alpha = 0xFF;
+ ret = stm32_ltdc_alloc_fb(dev);
+ if (ret)
+ return ret;
+
dev_dbg(dev, "%dx%d %dbpp frame buffer at 0x%lx\n",
timings.hactive.typ, timings.vactive.typ,
VNBITS(priv->l2bpp), uc_plat->base);
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index 07fc494..5697261 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -344,6 +344,13 @@
Enable the STM32 watchdog (IWDG) driver. Enable support to
configure STM32's on-SoC watchdog.
+config WDT_STARFIVE
+ bool "StarFive watchdog timer support"
+ depends on WDT
+ imply WATCHDOG
+ help
+ Enable support for the watchdog timer of StarFive JH7110 SoC.
+
config WDT_SUNXI
bool "Allwinner sunxi watchdog timer support"
depends on WDT && ARCH_SUNXI
diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile
index eef786f..5520d3d 100644
--- a/drivers/watchdog/Makefile
+++ b/drivers/watchdog/Makefile
@@ -44,6 +44,7 @@
obj-$(CONFIG_WDT_K3_RTI) += rti_wdt.o
obj-$(CONFIG_WDT_SL28CPLD) += sl28cpld-wdt.o
obj-$(CONFIG_WDT_SP805) += sp805_wdt.o
+obj-$(CONFIG_WDT_STARFIVE) += starfive_wdt.o
obj-$(CONFIG_WDT_STM32MP) += stm32mp_wdt.o
obj-$(CONFIG_WDT_SUNXI) += sunxi_wdt.o
obj-$(CONFIG_WDT_TANGIER) += tangier_wdt.o
diff --git a/drivers/watchdog/s5p_wdt.c b/drivers/watchdog/s5p_wdt.c
index 5ad7d26..80524a0 100644
--- a/drivers/watchdog/s5p_wdt.c
+++ b/drivers/watchdog/s5p_wdt.c
@@ -6,6 +6,7 @@
#include <common.h>
#include <asm/io.h>
+#include <asm/arch/cpu.h>
#include <asm/arch/watchdog.h>
#define PRESCALER_VAL 255
diff --git a/drivers/watchdog/starfive_wdt.c b/drivers/watchdog/starfive_wdt.c
new file mode 100644
index 0000000..ee9ec4c
--- /dev/null
+++ b/drivers/watchdog/starfive_wdt.c
@@ -0,0 +1,329 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Starfive Watchdog driver
+ *
+ * Copyright (C) 2022 StarFive Technology Co., Ltd.
+ */
+
+#include <clk.h>
+#include <dm.h>
+#include <reset.h>
+#include <wdt.h>
+#include <linux/iopoll.h>
+
+/* JH7110 Watchdog register define */
+#define STARFIVE_WDT_JH7110_LOAD 0x000
+#define STARFIVE_WDT_JH7110_VALUE 0x004
+#define STARFIVE_WDT_JH7110_CONTROL 0x008 /*
+ * [0]: reset enable;
+ * [1]: interrupt enable && watchdog enable
+ * [31:2]: reserved.
+ */
+#define STARFIVE_WDT_JH7110_INTCLR 0x00c /* clear intterupt and reload the counter */
+#define STARFIVE_WDT_JH7110_IMS 0x014
+#define STARFIVE_WDT_JH7110_LOCK 0xc00 /* write 0x1ACCE551 to unlock */
+
+/* WDOGCONTROL */
+#define STARFIVE_WDT_ENABLE 0x1
+#define STARFIVE_WDT_EN_SHIFT 0
+#define STARFIVE_WDT_RESET_EN 0x1
+#define STARFIVE_WDT_JH7110_RST_EN_SHIFT 1
+
+/* WDOGLOCK */
+#define STARFIVE_WDT_JH7110_UNLOCK_KEY 0x1acce551
+
+/* WDOGINTCLR */
+#define STARFIVE_WDT_INTCLR 0x1
+#define STARFIVE_WDT_JH7100_INTCLR_AVA_SHIFT 1 /* Watchdog can clear interrupt when 0 */
+
+#define STARFIVE_WDT_MAXCNT 0xffffffff
+#define STARFIVE_WDT_DEFAULT_TIME (15)
+#define STARFIVE_WDT_DELAY_US 0
+#define STARFIVE_WDT_TIMEOUT_US 10000
+
+/* module parameter */
+#define STARFIVE_WDT_EARLY_ENA 0
+
+struct starfive_wdt_variant {
+ unsigned int control; /* Watchdog Control Resgister for reset enable */
+ unsigned int load; /* Watchdog Load register */
+ unsigned int reload; /* Watchdog Reload Control register */
+ unsigned int enable; /* Watchdog Enable Register */
+ unsigned int value; /* Watchdog Counter Value Register */
+ unsigned int int_clr; /* Watchdog Interrupt Clear Register */
+ unsigned int unlock; /* Watchdog Lock Register */
+ unsigned int int_status; /* Watchdog Interrupt Status Register */
+
+ u32 unlock_key;
+ char enrst_shift;
+ char en_shift;
+ bool intclr_check; /* whether need to check it before clearing interrupt */
+ char intclr_ava_shift;
+ bool double_timeout; /* The watchdog need twice timeout to reboot */
+};
+
+struct starfive_wdt_priv {
+ void __iomem *base;
+ struct clk *core_clk;
+ struct clk *apb_clk;
+ struct reset_ctl_bulk *rst;
+ const struct starfive_wdt_variant *variant;
+ unsigned long freq;
+ u32 count; /* count of timeout */
+ u32 reload; /* restore the count */
+};
+
+/* Register layout and configuration for the JH7110 */
+static const struct starfive_wdt_variant starfive_wdt_jh7110_variant = {
+ .control = STARFIVE_WDT_JH7110_CONTROL,
+ .load = STARFIVE_WDT_JH7110_LOAD,
+ .enable = STARFIVE_WDT_JH7110_CONTROL,
+ .value = STARFIVE_WDT_JH7110_VALUE,
+ .int_clr = STARFIVE_WDT_JH7110_INTCLR,
+ .unlock = STARFIVE_WDT_JH7110_LOCK,
+ .unlock_key = STARFIVE_WDT_JH7110_UNLOCK_KEY,
+ .int_status = STARFIVE_WDT_JH7110_IMS,
+ .enrst_shift = STARFIVE_WDT_JH7110_RST_EN_SHIFT,
+ .en_shift = STARFIVE_WDT_EN_SHIFT,
+ .intclr_check = false,
+ .double_timeout = true,
+};
+
+static int starfive_wdt_enable_clock(struct starfive_wdt_priv *wdt)
+{
+ int ret;
+
+ ret = clk_enable(wdt->apb_clk);
+ if (ret)
+ return ret;
+
+ ret = clk_enable(wdt->core_clk);
+ if (ret) {
+ clk_disable(wdt->apb_clk);
+ return ret;
+ }
+
+ return 0;
+}
+
+static void starfive_wdt_disable_clock(struct starfive_wdt_priv *wdt)
+{
+ clk_disable(wdt->core_clk);
+ clk_disable(wdt->apb_clk);
+}
+
+/* Write unlock-key to unlock. Write other value to lock. */
+static void starfive_wdt_unlock(struct starfive_wdt_priv *wdt)
+{
+ writel(wdt->variant->unlock_key, wdt->base + wdt->variant->unlock);
+}
+
+static void starfive_wdt_lock(struct starfive_wdt_priv *wdt)
+{
+ writel(~wdt->variant->unlock_key, wdt->base + wdt->variant->unlock);
+}
+
+/* enable watchdog interrupt to reset/reboot */
+static void starfive_wdt_enable_reset(struct starfive_wdt_priv *wdt)
+{
+ u32 val;
+
+ val = readl(wdt->base + wdt->variant->control);
+ val |= STARFIVE_WDT_RESET_EN << wdt->variant->enrst_shift;
+ writel(val, wdt->base + wdt->variant->control);
+}
+
+/* waiting interrupt can be free to clear */
+static int starfive_wdt_wait_int_free(struct starfive_wdt_priv *wdt)
+{
+ u32 value;
+
+ return readl_poll_timeout(wdt->base + wdt->variant->int_clr, value,
+ !(value & BIT(wdt->variant->intclr_ava_shift)),
+ STARFIVE_WDT_TIMEOUT_US);
+}
+
+/* clear interrupt signal before initialization or reload */
+static int starfive_wdt_int_clr(struct starfive_wdt_priv *wdt)
+{
+ int ret;
+
+ if (wdt->variant->intclr_check) {
+ ret = starfive_wdt_wait_int_free(wdt);
+ if (ret)
+ return ret;
+ }
+ writel(STARFIVE_WDT_INTCLR, wdt->base + wdt->variant->int_clr);
+
+ return 0;
+}
+
+static inline void starfive_wdt_set_count(struct starfive_wdt_priv *wdt,
+ u32 val)
+{
+ writel(val, wdt->base + wdt->variant->load);
+}
+
+/* enable watchdog */
+static inline void starfive_wdt_enable(struct starfive_wdt_priv *wdt)
+{
+ u32 val;
+
+ val = readl(wdt->base + wdt->variant->enable);
+ val |= STARFIVE_WDT_ENABLE << wdt->variant->en_shift;
+ writel(val, wdt->base + wdt->variant->enable);
+}
+
+/* disable watchdog */
+static inline void starfive_wdt_disable(struct starfive_wdt_priv *wdt)
+{
+ u32 val;
+
+ val = readl(wdt->base + wdt->variant->enable);
+ val &= ~(STARFIVE_WDT_ENABLE << wdt->variant->en_shift);
+ writel(val, wdt->base + wdt->variant->enable);
+}
+
+static inline void starfive_wdt_set_reload_count(struct starfive_wdt_priv *wdt,
+ u32 count)
+{
+ starfive_wdt_set_count(wdt, count);
+
+ /* 7100 need set any value to reload register and could reload value to counter */
+ if (wdt->variant->reload)
+ writel(0x1, wdt->base + wdt->variant->reload);
+}
+
+static int starfive_wdt_start(struct udevice *dev, u64 timeout_ms, ulong flags)
+{
+ int ret;
+ struct starfive_wdt_priv *wdt = dev_get_priv(dev);
+
+ starfive_wdt_unlock(wdt);
+ /* disable watchdog, to be safe */
+ starfive_wdt_disable(wdt);
+
+ starfive_wdt_enable_reset(wdt);
+ ret = starfive_wdt_int_clr(wdt);
+ if (ret)
+ goto exit;
+
+ wdt->count = (timeout_ms / 1000) * wdt->freq;
+ if (wdt->variant->double_timeout)
+ wdt->count /= 2;
+
+ starfive_wdt_set_count(wdt, wdt->count);
+ starfive_wdt_enable(wdt);
+
+exit:
+ starfive_wdt_lock(wdt);
+ return ret;
+}
+
+static int starfive_wdt_stop(struct udevice *dev)
+{
+ struct starfive_wdt_priv *wdt = dev_get_priv(dev);
+
+ starfive_wdt_unlock(wdt);
+ starfive_wdt_disable(wdt);
+ starfive_wdt_lock(wdt);
+
+ return 0;
+}
+
+static int starfive_wdt_reset(struct udevice *dev)
+{
+ int ret;
+ struct starfive_wdt_priv *wdt = dev_get_priv(dev);
+
+ starfive_wdt_unlock(wdt);
+ ret = starfive_wdt_int_clr(wdt);
+ if (ret)
+ goto exit;
+
+ starfive_wdt_set_reload_count(wdt, wdt->count);
+
+exit:
+ starfive_wdt_lock(wdt);
+
+ return ret;
+}
+
+static const struct wdt_ops starfive_wdt_ops = {
+ .start = starfive_wdt_start,
+ .stop = starfive_wdt_stop,
+ .reset = starfive_wdt_reset,
+};
+
+static int starfive_wdt_probe(struct udevice *dev)
+{
+ struct starfive_wdt_priv *wdt = dev_get_priv(dev);
+ int ret;
+
+ ret = starfive_wdt_enable_clock(wdt);
+ if (ret)
+ return ret;
+
+ ret = reset_deassert_bulk(wdt->rst);
+ if (ret)
+ goto err_reset;
+
+ wdt->variant = (const struct starfive_wdt_variant *)dev_get_driver_data(dev);
+
+ wdt->freq = clk_get_rate(wdt->core_clk);
+ if (!wdt->freq) {
+ ret = -EINVAL;
+ goto err_get_freq;
+ }
+
+ return 0;
+
+err_get_freq:
+ reset_assert_bulk(wdt->rst);
+err_reset:
+ starfive_wdt_disable_clock(wdt);
+
+ return ret;
+}
+
+static int starfive_wdt_of_to_plat(struct udevice *dev)
+{
+ struct starfive_wdt_priv *wdt = dev_get_priv(dev);
+
+ wdt->base = (void *)dev_read_addr(dev);
+ if (!wdt->base)
+ return -ENODEV;
+
+ wdt->apb_clk = devm_clk_get(dev, "apb");
+ if (IS_ERR(wdt->apb_clk))
+ return -ENODEV;
+
+ wdt->core_clk = devm_clk_get(dev, "core");
+ if (IS_ERR(wdt->core_clk))
+ return -ENODEV;
+
+ wdt->rst = devm_reset_bulk_get(dev);
+ if (IS_ERR(wdt->rst))
+ return -ENODEV;
+
+ return 0;
+}
+
+static const struct udevice_id starfive_wdt_ids[] = {
+ {
+ .compatible = "starfive,jh7110-wdt",
+ .data = (ulong)&starfive_wdt_jh7110_variant
+ }, {
+ /* sentinel */
+ }
+};
+
+U_BOOT_DRIVER(starfive_wdt) = {
+ .name = "starfive_wdt",
+ .id = UCLASS_WDT,
+ .of_match = starfive_wdt_ids,
+ .priv_auto = sizeof(struct starfive_wdt_priv),
+ .probe = starfive_wdt_probe,
+ .of_to_plat = starfive_wdt_of_to_plat,
+ .ops = &starfive_wdt_ops,
+};
diff --git a/drivers/watchdog/wdt-uclass.c b/drivers/watchdog/wdt-uclass.c
index ed32928..417e8d7 100644
--- a/drivers/watchdog/wdt-uclass.c
+++ b/drivers/watchdog/wdt-uclass.c
@@ -7,6 +7,7 @@
#include <common.h>
#include <cyclic.h>
+#include <div64.h>
#include <dm.h>
#include <errno.h>
#include <hang.h>
@@ -141,7 +142,7 @@
printf("WDT: Started %s with%s servicing %s (%ds timeout)\n",
dev->name, IS_ENABLED(CONFIG_WATCHDOG) ? "" : "out",
- str, priv->timeout);
+ str, (u32)lldiv(timeout_ms, 1000));
}
return ret;
diff --git a/drivers/xen/pvblock.c b/drivers/xen/pvblock.c
index 4ad548d..1df04e2 100644
--- a/drivers/xen/pvblock.c
+++ b/drivers/xen/pvblock.c
@@ -632,7 +632,8 @@
memcpy(blk_dev->bounce_buffer, buffer, desc->blksz);
aiocb.aio_nbytes = unaligned ? desc->blksz :
- min((size_t)(BLKIF_MAX_SEGMENTS_PER_REQUEST * PAGE_SIZE),
+ min((size_t)((BLKIF_MAX_SEGMENTS_PER_REQUEST - 1)
+ * PAGE_SIZE),
(size_t)(blocks_todo * desc->blksz));
blkfront_io(&aiocb, write);
diff --git a/env/Kconfig b/env/Kconfig
index f5f0969..7885c8b 100644
--- a/env/Kconfig
+++ b/env/Kconfig
@@ -342,7 +342,7 @@
config ENV_IS_IN_SPI_FLASH
bool "Environment is in SPI flash"
- depends on !CHAIN_OF_TRUST && SPI
+ depends on !CHAIN_OF_TRUST && (SPI_FLASH || DM_SPI_FLASH)
default y if ARMADA_XP
default y if INTEL_BAYTRAIL
default y if INTEL_BRASWELL
diff --git a/env/common.c b/env/common.c
index 656748c..48a5651 100644
--- a/env/common.c
+++ b/env/common.c
@@ -85,7 +85,7 @@
name = argv[1];
if (strchr(name, '=')) {
- printf("## Error: illegal character '='"
+ printf("## Error: illegal character '=' "
"in variable name \"%s\"\n", name);
return 1;
}
@@ -351,14 +351,24 @@
*/
char *env_get_default(const char *name)
{
- if (env_get_from_linear(default_environment, name,
- (char *)(gd->env_buf),
- sizeof(gd->env_buf)) >= 0)
+ int ret;
+
+ ret = env_get_default_into(name, (char *)(gd->env_buf),
+ sizeof(gd->env_buf));
+ if (ret >= 0)
return (char *)(gd->env_buf);
return NULL;
}
+/*
+ * Look up the variable from the default environment and store its value in buf
+ */
+int env_get_default_into(const char *name, char *buf, unsigned int len)
+{
+ return env_get_from_linear(default_environment, name, buf, len);
+}
+
void env_set_default(const char *s, int flags)
{
if (s) {
diff --git a/env/embedded.c b/env/embedded.c
index 7cbe54c..5b488ef 100644
--- a/env/embedded.c
+++ b/env/embedded.c
@@ -4,7 +4,9 @@
* Erik Theisen, Wave 7 Optics, etheisen@mindspring.com.
*/
+#ifdef USE_HOSTCC
#include <linux/kconfig.h>
+#endif
#ifndef __ASSEMBLY__
#define __ASSEMBLY__ /* Dirty trick to get only #defines */
diff --git a/env/mmc.c b/env/mmc.c
index cb14bbb..da84cdd 100644
--- a/env/mmc.c
+++ b/env/mmc.c
@@ -495,7 +495,7 @@
.location = ENVL_MMC,
ENV_NAME("MMC")
.load = env_mmc_load,
-#ifndef CONFIG_SPL_BUILD
+#if defined(CONFIG_CMD_SAVEENV) && !defined(CONFIG_SPL_BUILD)
.save = env_save_ptr(env_mmc_save),
.erase = ENV_ERASE_PTR(env_mmc_erase)
#endif
diff --git a/fs/btrfs/ctree.h b/fs/btrfs/ctree.h
index ffd095f..5943955 100644
--- a/fs/btrfs/ctree.h
+++ b/fs/btrfs/ctree.h
@@ -9,7 +9,6 @@
#ifndef __BTRFS_CTREE_H__
#define __BTRFS_CTREE_H__
-#include <common.h>
#include <compiler.h>
#include <linux/rbtree.h>
#include <linux/bug.h>
diff --git a/fs/fat/fat.c b/fs/fat/fat.c
index 8ff1fd0..14e53cf 100644
--- a/fs/fat/fat.c
+++ b/fs/fat/fat.c
@@ -18,12 +18,17 @@
#include <fs.h>
#include <log.h>
#include <asm/byteorder.h>
+#include <asm/unaligned.h>
#include <part.h>
#include <malloc.h>
#include <memalign.h>
#include <asm/cache.h>
#include <linux/compiler.h>
#include <linux/ctype.h>
+#include <linux/log2.h>
+
+/* maximum number of clusters for FAT12 */
+#define MAX_FAT12 0xFF4
/*
* Convert a string to lowercase. Converts at most 'len' characters,
@@ -484,6 +489,73 @@
}
/*
+ * Determine if the FAT type is FAT12 or FAT16
+ *
+ * Based on fat_fill_super() from the Linux kernel's fs/fat/inode.c
+ */
+static int determine_legacy_fat_bits(const boot_sector *bs)
+{
+ u16 fat_start = bs->reserved;
+ u32 dir_start = fat_start + bs->fats * bs->fat_length;
+ u32 rootdir_sectors = get_unaligned_le16(bs->dir_entries) *
+ sizeof(dir_entry) /
+ get_unaligned_le16(bs->sector_size);
+ u32 data_start = dir_start + rootdir_sectors;
+ u16 sectors = get_unaligned_le16(bs->sectors);
+ u32 total_sectors = sectors ? sectors : bs->total_sect;
+ u32 total_clusters = (total_sectors - data_start) /
+ bs->cluster_size;
+
+ return (total_clusters > MAX_FAT12) ? 16 : 12;
+}
+
+/*
+ * Determines if the boot sector's media field is valid
+ *
+ * Based on fat_valid_media() from Linux kernel's include/linux/msdos_fs.h
+ */
+static int fat_valid_media(u8 media)
+{
+ return media >= 0xf8 || media == 0xf0;
+}
+
+/*
+ * Determines if the given boot sector is valid
+ *
+ * Based on fat_read_bpb() from the Linux kernel's fs/fat/inode.c
+ */
+static int is_bootsector_valid(const boot_sector *bs)
+{
+ u16 sector_size = get_unaligned_le16(bs->sector_size);
+ u16 dir_per_block = sector_size / sizeof(dir_entry);
+
+ if (!bs->reserved)
+ return 0;
+
+ if (!bs->fats)
+ return 0;
+
+ if (!fat_valid_media(bs->media))
+ return 0;
+
+ if (!is_power_of_2(sector_size) ||
+ sector_size < 512 ||
+ sector_size > 4096)
+ return 0;
+
+ if (!is_power_of_2(bs->cluster_size))
+ return 0;
+
+ if (!bs->fat_length && !bs->fat32_length)
+ return 0;
+
+ if (get_unaligned_le16(bs->dir_entries) & (dir_per_block - 1))
+ return 0;
+
+ return 1;
+}
+
+/*
* Read boot sector and volume info from a FAT filesystem
*/
static int
@@ -506,7 +578,8 @@
if (disk_read(0, 1, block) < 0) {
debug("Error: reading block\n");
- goto fail;
+ ret = -1;
+ goto out_free;
}
memcpy(bs, block, sizeof(boot_sector));
@@ -516,8 +589,14 @@
bs->heads = FAT2CPU16(bs->heads);
bs->total_sect = FAT2CPU32(bs->total_sect);
+ if (!is_bootsector_valid(bs)) {
+ debug("Error: bootsector is invalid\n");
+ ret = -1;
+ goto out_free;
+ }
+
/* FAT32 entries */
- if (bs->fat_length == 0) {
+ if (!bs->fat_length && bs->fat32_length) {
/* Assume FAT32 */
bs->fat32_length = FAT2CPU32(bs->fat32_length);
bs->flags = FAT2CPU16(bs->flags);
@@ -528,28 +607,11 @@
*fatsize = 32;
} else {
vistart = (volume_info *)&(bs->fat32_length);
- *fatsize = 0;
+ *fatsize = determine_legacy_fat_bits(bs);
}
memcpy(volinfo, vistart, sizeof(volume_info));
- if (*fatsize == 32) {
- if (strncmp(FAT32_SIGN, vistart->fs_type, SIGNLEN) == 0)
- goto exit;
- } else {
- if (strncmp(FAT12_SIGN, vistart->fs_type, SIGNLEN) == 0) {
- *fatsize = 12;
- goto exit;
- }
- if (strncmp(FAT16_SIGN, vistart->fs_type, SIGNLEN) == 0) {
- *fatsize = 16;
- goto exit;
- }
- }
-
- debug("Error: broken fs_type sign\n");
-fail:
- ret = -1;
-exit:
+out_free:
free(block);
return ret;
}
@@ -571,7 +633,7 @@
mydata->total_sect = bs.total_sect;
} else {
mydata->fatlength = bs.fat_length;
- mydata->total_sect = (bs.sectors[1] << 8) + bs.sectors[0];
+ mydata->total_sect = get_unaligned_le16(bs.sectors);
if (!mydata->total_sect)
mydata->total_sect = bs.total_sect;
}
@@ -583,7 +645,7 @@
mydata->rootdir_sect = mydata->fat_sect + mydata->fatlength * bs.fats;
- mydata->sect_size = (bs.sector_size[1] << 8) + bs.sector_size[0];
+ mydata->sect_size = get_unaligned_le16(bs.sector_size);
mydata->clust_size = bs.cluster_size;
if (mydata->sect_size != cur_part_info.blksz) {
log_err("FAT sector size mismatch (fs=%u, dev=%lu)\n",
@@ -607,8 +669,7 @@
(mydata->clust_size * 2);
mydata->root_cluster = bs.root_cluster;
} else {
- mydata->rootdir_size = ((bs.dir_entries[1] * (int)256 +
- bs.dir_entries[0]) *
+ mydata->rootdir_size = (get_unaligned_le16(bs.dir_entries) *
sizeof(dir_entry)) /
mydata->sect_size;
mydata->data_begin = mydata->rootdir_sect +
@@ -1157,9 +1218,8 @@
memcpy(vol_label, volinfo.volume_label, 11);
vol_label[11] = '\0';
- volinfo.fs_type[5] = '\0';
- printf("Filesystem: %s \"%s\"\n", volinfo.fs_type, vol_label);
+ printf("Filesystem: FAT%d \"%s\"\n", fatsize, vol_label);
return 0;
}
diff --git a/fs/fs.c b/fs/fs.c
index 4cb4310..acf465b 100644
--- a/fs/fs.c
+++ b/fs/fs.c
@@ -256,7 +256,7 @@
.ln = fs_ln_unsupported,
},
#endif
-#ifdef CONFIG_SEMIHOSTING
+#if CONFIG_IS_ENABLED(SEMIHOSTING)
{
.fstype = FS_TYPE_SEMIHOSTING,
.name = "semihosting",
@@ -749,7 +749,7 @@
if (argc > 7)
return CMD_RET_USAGE;
- if (fs_set_blk_dev(argv[1], (argc >= 3) ? argv[2] : NULL, fstype)) {
+ if (fs_set_blk_dev(argv[1], cmd_arg2(argc, argv), fstype)) {
log_err("Can't set block device\n");
return 1;
}
@@ -791,10 +791,9 @@
return 1;
}
- if (IS_ENABLED(CONFIG_CMD_BOOTEFI))
- efi_set_bootdev(argv[1], (argc > 2) ? argv[2] : "",
- (argc > 4) ? argv[4] : "", map_sysmem(addr, 0),
- len_read);
+ efi_set_bootdev(argv[1], (argc > 2) ? argv[2] : "",
+ (argc > 4) ? argv[4] : "", map_sysmem(addr, 0),
+ len_read);
printf("%llu bytes read in %lu ms", len_read, time);
if (time > 0) {
@@ -818,7 +817,7 @@
if (argc > 4)
return CMD_RET_USAGE;
- if (fs_set_blk_dev(argv[1], (argc >= 3) ? argv[2] : NULL, fstype))
+ if (fs_set_blk_dev(argv[1], cmd_arg2(argc, argv), fstype))
return 1;
if (fs_ls(argc >= 4 ? argv[3] : "/"))
diff --git a/fs/yaffs2/ydirectenv.h b/fs/yaffs2/ydirectenv.h
index d274f22..790f851 100644
--- a/fs/yaffs2/ydirectenv.h
+++ b/fs/yaffs2/ydirectenv.h
@@ -20,7 +20,6 @@
#ifndef __YDIRECTENV_H__
#define __YDIRECTENV_H__
-#include <common.h>
#include <malloc.h>
#include <linux/compat.h>
diff --git a/include/acpi/acpi_table.h b/include/acpi/acpi_table.h
index 1f85de0..e67562e 100644
--- a/include/acpi/acpi_table.h
+++ b/include/acpi/acpi_table.h
@@ -80,7 +80,7 @@
};
/* XSDT (Extended System Description Table) */
-struct acpi_xsdt {
+struct __packed acpi_xsdt {
struct acpi_table_header header;
u64 entry[MAX_ACPI_TABLES];
};
@@ -228,10 +228,8 @@
u8 reset_value;
u16 arm_boot_arch;
u8 minor_revision;
- u32 x_firmware_ctl_l;
- u32 x_firmware_ctl_h;
- u32 x_dsdt_l;
- u32 x_dsdt_h;
+ u64 x_firmware_ctrl;
+ u64 x_dsdt;
struct acpi_gen_regaddr x_pm1a_evt_blk;
struct acpi_gen_regaddr x_pm1b_evt_blk;
struct acpi_gen_regaddr x_pm1a_cnt_blk;
@@ -921,6 +919,15 @@
int acpi_fill_csrt(struct acpi_ctx *ctx);
/**
+ * acpi_get_rsdp_addr() - get ACPI RSDP table address
+ *
+ * This routine returns the ACPI RSDP table address in the system memory.
+ *
+ * @return: ACPI RSDP table address
+ */
+ulong acpi_get_rsdp_addr(void);
+
+/**
* write_acpi_tables() - Write out the ACPI tables
*
* This writes all ACPI tables to the given address
diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h
index e8c6412..fcc3c6e 100644
--- a/include/asm-generic/global_data.h
+++ b/include/asm-generic/global_data.h
@@ -553,7 +553,7 @@
#endif
#ifdef CONFIG_SMBIOS
-#define gd_smbios_start() gd->smbios_start
+#define gd_smbios_start() gd->arch.smbios_start
#define gd_set_smbios_start(addr) gd->arch.smbios_start = addr
#else
#define gd_smbios_start() 0UL
@@ -697,6 +697,14 @@
* @GD_FLG_BLOBLIST_READY: bloblist is ready for use
*/
GD_FLG_BLOBLIST_READY = 0x800000,
+ /**
+ * @GD_FLG_HUSH_OLD_PARSER: Use hush old parser.
+ */
+ GD_FLG_HUSH_OLD_PARSER = 0x1000000,
+ /**
+ * @GD_FLG_HUSH_MODERN_PARSER: Use hush 2021 parser.
+ */
+ GD_FLG_HUSH_MODERN_PARSER = 0x2000000,
};
#endif /* __ASSEMBLY__ */
diff --git a/include/asm-generic/io.h b/include/asm-generic/io.h
index 7a2f0db..13d99cf 100644
--- a/include/asm-generic/io.h
+++ b/include/asm-generic/io.h
@@ -105,5 +105,353 @@
}
#endif
+/*
+ * __raw_{read,write}{b,w,l,q}() access memory in native endianness.
+ *
+ * On some architectures memory mapped IO needs to be accessed differently.
+ * On the simple architectures, we just read/write the memory location
+ * directly.
+ */
+
+#ifndef __raw_readb
+#define __raw_readb __raw_readb
+static inline u8 __raw_readb(const volatile void __iomem *addr)
+{
+ return *(const volatile u8 __force *)addr;
+}
+#endif
+
+#ifndef __raw_readw
+#define __raw_readw __raw_readw
+static inline u16 __raw_readw(const volatile void __iomem *addr)
+{
+ return *(const volatile u16 __force *)addr;
+}
+#endif
+
+#ifndef __raw_readl
+#define __raw_readl __raw_readl
+static inline u32 __raw_readl(const volatile void __iomem *addr)
+{
+ return *(const volatile u32 __force *)addr;
+}
+#endif
+
+#ifdef CONFIG_64BIT
+#ifndef __raw_readq
+#define __raw_readq __raw_readq
+static inline u64 __raw_readq(const volatile void __iomem *addr)
+{
+ return *(const volatile u64 __force *)addr;
+}
+#endif
+#endif /* CONFIG_64BIT */
+
+#ifndef __raw_writeb
+#define __raw_writeb __raw_writeb
+static inline void __raw_writeb(u8 value, volatile void __iomem *addr)
+{
+ *(volatile u8 __force *)addr = value;
+}
+#endif
+
+#ifndef __raw_writew
+#define __raw_writew __raw_writew
+static inline void __raw_writew(u16 value, volatile void __iomem *addr)
+{
+ *(volatile u16 __force *)addr = value;
+}
+#endif
+
+#ifndef __raw_writel
+#define __raw_writel __raw_writel
+static inline void __raw_writel(u32 value, volatile void __iomem *addr)
+{
+ *(volatile u32 __force *)addr = value;
+}
+#endif
+
+#ifdef CONFIG_64BIT
+#ifndef __raw_writeq
+#define __raw_writeq __raw_writeq
+static inline void __raw_writeq(u64 value, volatile void __iomem *addr)
+{
+ *(volatile u64 __force *)addr = value;
+}
+#endif
+#endif /* CONFIG_64BIT */
+
+/*
+ * {read,write}s{b,w,l,q}() repeatedly access the same memory address in
+ * native endianness in 8-, 16-, 32- or 64-bit chunks (@count times).
+ */
+#ifndef readsb
+#define readsb readsb
+static inline void readsb(const volatile void __iomem *addr, void *buffer,
+ unsigned int count)
+{
+ if (count) {
+ u8 *buf = buffer;
+
+ do {
+ u8 x = __raw_readb(addr);
+ *buf++ = x;
+ } while (--count);
+ }
+}
+#endif
+
+#ifndef readsw
+#define readsw readsw
+static inline void readsw(const volatile void __iomem *addr, void *buffer,
+ unsigned int count)
+{
+ if (count) {
+ u16 *buf = buffer;
+
+ do {
+ u16 x = __raw_readw(addr);
+ *buf++ = x;
+ } while (--count);
+ }
+}
+#endif
+
+#ifndef readsl
+#define readsl readsl
+static inline void readsl(const volatile void __iomem *addr, void *buffer,
+ unsigned int count)
+{
+ if (count) {
+ u32 *buf = buffer;
+
+ do {
+ u32 x = __raw_readl(addr);
+ *buf++ = x;
+ } while (--count);
+ }
+}
+#endif
+
+#ifdef CONFIG_64BIT
+#ifndef readsq
+#define readsq readsq
+static inline void readsq(const volatile void __iomem *addr, void *buffer,
+ unsigned int count)
+{
+ if (count) {
+ u64 *buf = buffer;
+
+ do {
+ u64 x = __raw_readq(addr);
+ *buf++ = x;
+ } while (--count);
+ }
+}
+#endif
+#endif /* CONFIG_64BIT */
+
+#ifndef writesb
+#define writesb writesb
+static inline void writesb(volatile void __iomem *addr, const void *buffer,
+ unsigned int count)
+{
+ if (count) {
+ const u8 *buf = buffer;
+
+ do {
+ __raw_writeb(*buf++, addr);
+ } while (--count);
+ }
+}
+#endif
+
+#ifndef writesw
+#define writesw writesw
+static inline void writesw(volatile void __iomem *addr, const void *buffer,
+ unsigned int count)
+{
+ if (count) {
+ const u16 *buf = buffer;
+
+ do {
+ __raw_writew(*buf++, addr);
+ } while (--count);
+ }
+}
+#endif
+
+#ifndef writesl
+#define writesl writesl
+static inline void writesl(volatile void __iomem *addr, const void *buffer,
+ unsigned int count)
+{
+ if (count) {
+ const u32 *buf = buffer;
+
+ do {
+ __raw_writel(*buf++, addr);
+ } while (--count);
+ }
+}
+#endif
+
+#ifdef CONFIG_64BIT
+#ifndef writesq
+#define writesq writesq
+static inline void writesq(volatile void __iomem *addr, const void *buffer,
+ unsigned int count)
+{
+ if (count) {
+ const u64 *buf = buffer;
+
+ do {
+ __raw_writeq(*buf++, addr);
+ } while (--count);
+ }
+}
+#endif
+#endif /* CONFIG_64BIT */
+
+#ifndef PCI_IOBASE
+#define PCI_IOBASE ((void __iomem *)0)
+#endif
+
+/*
+ * {in,out}s{b,w,l}{,_p}() are variants of the above that repeatedly access a
+ * single I/O port multiple times.
+ */
+
+#ifndef insb
+#define insb insb
+static inline void insb(unsigned long addr, void *buffer, unsigned int count)
+{
+ readsb(PCI_IOBASE + addr, buffer, count);
+}
+#endif
+
+#ifndef insw
+#define insw insw
+static inline void insw(unsigned long addr, void *buffer, unsigned int count)
+{
+ readsw(PCI_IOBASE + addr, buffer, count);
+}
+#endif
+
+#ifndef insl
+#define insl insl
+static inline void insl(unsigned long addr, void *buffer, unsigned int count)
+{
+ readsl(PCI_IOBASE + addr, buffer, count);
+}
+#endif
+
+#ifndef outsb
+#define outsb outsb
+static inline void outsb(unsigned long addr, const void *buffer,
+ unsigned int count)
+{
+ writesb(PCI_IOBASE + addr, buffer, count);
+}
+#endif
+
+#ifndef outsw
+#define outsw outsw
+static inline void outsw(unsigned long addr, const void *buffer,
+ unsigned int count)
+{
+ writesw(PCI_IOBASE + addr, buffer, count);
+}
+#endif
+
+#ifndef outsl
+#define outsl outsl
+static inline void outsl(unsigned long addr, const void *buffer,
+ unsigned int count)
+{
+ writesl(PCI_IOBASE + addr, buffer, count);
+}
+#endif
+
+#ifndef ioread8_rep
+#define ioread8_rep ioread8_rep
+static inline void ioread8_rep(const volatile void __iomem *addr, void *buffer,
+ unsigned int count)
+{
+ readsb(addr, buffer, count);
+}
+#endif
+
+#ifndef ioread16_rep
+#define ioread16_rep ioread16_rep
+static inline void ioread16_rep(const volatile void __iomem *addr,
+ void *buffer, unsigned int count)
+{
+ readsw(addr, buffer, count);
+}
+#endif
+
+#ifndef ioread32_rep
+#define ioread32_rep ioread32_rep
+static inline void ioread32_rep(const volatile void __iomem *addr,
+ void *buffer, unsigned int count)
+{
+ readsl(addr, buffer, count);
+}
+#endif
+
+#ifdef CONFIG_64BIT
+#ifndef ioread64_rep
+#define ioread64_rep ioread64_rep
+static inline void ioread64_rep(const volatile void __iomem *addr,
+ void *buffer, unsigned int count)
+{
+ readsq(addr, buffer, count);
+}
+#endif
+#endif /* CONFIG_64BIT */
+
+#ifndef iowrite8_rep
+#define iowrite8_rep iowrite8_rep
+static inline void iowrite8_rep(volatile void __iomem *addr,
+ const void *buffer,
+ unsigned int count)
+{
+ writesb(addr, buffer, count);
+}
+#endif
+
+#ifndef iowrite16_rep
+#define iowrite16_rep iowrite16_rep
+static inline void iowrite16_rep(volatile void __iomem *addr,
+ const void *buffer,
+ unsigned int count)
+{
+ writesw(addr, buffer, count);
+}
+#endif
+
+#ifndef iowrite32_rep
+#define iowrite32_rep iowrite32_rep
+static inline void iowrite32_rep(volatile void __iomem *addr,
+ const void *buffer,
+ unsigned int count)
+{
+ writesl(addr, buffer, count);
+}
+#endif
+
+#ifdef CONFIG_64BIT
+#ifndef iowrite64_rep
+#define iowrite64_rep iowrite64_rep
+static inline void iowrite64_rep(volatile void __iomem *addr,
+ const void *buffer,
+ unsigned int count)
+{
+ writesq(addr, buffer, count);
+}
+#endif
+#endif /* CONFIG_64BIT */
+
#endif /* !__ASSEMBLY__ */
#endif /* __ASM_GENERIC_IO_H__ */
diff --git a/include/atmel_lcd.h b/include/atmel_lcd.h
index 66436b9..a115d6c 100644
--- a/include/atmel_lcd.h
+++ b/include/atmel_lcd.h
@@ -9,6 +9,8 @@
#ifndef _ATMEL_LCD_H_
#define _ATMEL_LCD_H_
+#include <linux/types.h>
+
/**
* struct atmel_lcd_plat - platform data for Atmel LCDs with driver model
*
diff --git a/include/bloblist.h b/include/bloblist.h
index 080cc46..84fc943 100644
--- a/include/bloblist.h
+++ b/include/bloblist.h
@@ -24,11 +24,11 @@
* which would add to code size. For Thumb-2 the code size needed in SPL is
* approximately 940 bytes (e.g. for chromebook_bob).
*
- * 5. Bloblist uses 16-byte alignment internally and is designed to start on a
- * 16-byte boundary. Its headers are multiples of 16 bytes. This makes it easier
- * to deal with data structures which need this level of alignment, such as ACPI
- * tables. For use in SPL and TPL the alignment can be relaxed, since it can be
- * relocated to an aligned address in U-Boot proper.
+ * 5. Bloblist uses 8-byte alignment internally and is designed to start on a
+ * 8-byte boundary. Its headers are 8 bytes long. It is possible to achieve
+ * larger alignment (e.g. 16 bytes) by adding a dummy header, For use in SPL and
+ * TPL the alignment can be relaxed, since it can be relocated to an aligned
+ * address in U-Boot proper.
*
* 6. Bloblist is designed to be passed to Linux as reserved memory. While linux
* doesn't understand the bloblist header, it can be passed the indivdual blobs.
@@ -66,6 +66,7 @@
*
* Copyright 2018 Google, Inc
* Written by Simon Glass <sjg@chromium.org>
+ * Adjusted July 2023 to match Firmware handoff specification, Release 0.9
*/
#ifndef __BLOBLIST_H
@@ -74,14 +75,19 @@
#include <mapmem.h>
enum {
- BLOBLIST_VERSION = 0,
- BLOBLIST_MAGIC = 0xb00757a3,
- BLOBLIST_ALIGN = 16,
+ BLOBLIST_VERSION = 1,
+ BLOBLIST_MAGIC = 0x4a0fb10b,
+
+ BLOBLIST_BLOB_ALIGN_LOG2 = 3,
+ BLOBLIST_BLOB_ALIGN = 1 << BLOBLIST_BLOB_ALIGN_LOG2,
+
+ BLOBLIST_ALIGN_LOG2 = 3,
+ BLOBLIST_ALIGN = 1 << BLOBLIST_ALIGN_LOG2,
};
/* Supported tags - add new ones to tag_name in bloblist.c */
enum bloblist_tag_t {
- BLOBLISTT_NONE = 0,
+ BLOBLISTT_VOID = 0,
/*
* Standard area to allocate blobs used across firmware components, for
@@ -89,42 +95,36 @@
* projects.
*/
BLOBLISTT_AREA_FIRMWARE_TOP = 0x1,
+ /*
+ * Devicetree for use by firmware. On some platforms this is passed to
+ * the OS also
+ */
+ BLOBLISTT_CONTROL_FDT = 1,
+ BLOBLISTT_HOB_BLOCK = 2,
+ BLOBLISTT_HOB_LIST = 3,
+ BLOBLISTT_ACPI_TABLES = 4,
+ BLOBLISTT_TPM_EVLOG = 5,
+ BLOBLISTT_TPM_CRB_BASE = 6,
/* Standard area to allocate blobs used across firmware components */
- BLOBLISTT_AREA_FIRMWARE = 0x100,
+ BLOBLISTT_AREA_FIRMWARE = 0x10,
+ BLOBLISTT_TPM2_TCG_LOG = 0x10, /* TPM v2 log space */
+ BLOBLISTT_TCPA_LOG = 0x11, /* TPM log space */
/*
* Advanced Configuration and Power Interface Global Non-Volatile
* Sleeping table. This forms part of the ACPI tables passed to Linux.
*/
- BLOBLISTT_ACPI_GNVS = 0x100,
- BLOBLISTT_INTEL_VBT = 0x101, /* Intel Video-BIOS table */
- BLOBLISTT_TPM2_TCG_LOG = 0x102, /* TPM v2 log space */
- BLOBLISTT_TCPA_LOG = 0x103, /* TPM log space */
- BLOBLISTT_ACPI_TABLES = 0x104, /* ACPI tables for x86 */
- BLOBLISTT_SMBIOS_TABLES = 0x105, /* SMBIOS tables for x86 */
- BLOBLISTT_VBOOT_CTX = 0x106, /* Chromium OS verified boot context */
+ BLOBLISTT_ACPI_GNVS = 0x12,
- /*
- * Project-specific tags are permitted here. Projects can be open source
- * or not, but the format of the data must be fuily documented in an
- * open source project, including all fields, bits, etc. Naming should
- * be: BLOBLISTT_<project>_<purpose_here>
- */
- BLOBLISTT_PROJECT_AREA = 0x8000,
- BLOBLISTT_U_BOOT_SPL_HANDOFF = 0x8000, /* Hand-off info from SPL */
- BLOBLISTT_VBE = 0x8001, /* VBE per-phase state */
- BLOBLISTT_U_BOOT_VIDEO = 0x8002, /* Video information from SPL */
+ /* Standard area to allocate blobs used for Trusted Firmware */
+ BLOBLISTT_AREA_TF = 0x100,
+ BLOBLISTT_OPTEE_PAGABLE_PART = 0x100,
- /*
- * Vendor-specific tags are permitted here. Projects can be open source
- * or not, but the format of the data must be fuily documented in an
- * open source project, including all fields, bits, etc. Naming should
- * be BLOBLISTT_<vendor>_<purpose_here>
- */
- BLOBLISTT_VENDOR_AREA = 0xc000,
-
- /* Tags after this are not allocated for now */
- BLOBLISTT_EXPANSION = 0x10000,
+ /* Other standard area to allocate blobs */
+ BLOBLISTT_AREA_OTHER = 0x200,
+ BLOBLISTT_INTEL_VBT = 0x200, /* Intel Video-BIOS table */
+ BLOBLISTT_SMBIOS_TABLES = 0x201, /* SMBIOS tables for x86 */
+ BLOBLISTT_VBOOT_CTX = 0x202, /* Chromium OS verified boot context */
/*
* Tags from here are on reserved for private use within a single
@@ -133,9 +133,20 @@
* implementation, but cannot be used in upstream code. Allocate a
* tag in one of the areas above if you want that.
*
- * This area may move in future.
+ * Project-specific tags are permitted here. Projects can be open source
+ * or not, but the format of the data must be fuily documented in an
+ * open source project, including all fields, bits, etc. Naming should
+ * be: BLOBLISTT_<project>_<purpose_here>
+ *
+ * Vendor-specific tags are also permitted. Projects can be open source
+ * or not, but the format of the data must be fuily documented in an
+ * open source project, including all fields, bits, etc. Naming should
+ * be BLOBLISTT_<vendor>_<purpose_here>
*/
- BLOBLISTT_PRIVATE_AREA = 0xffff0000,
+ BLOBLISTT_PRIVATE_AREA = 0xfff000,
+ BLOBLISTT_U_BOOT_SPL_HANDOFF = 0xfff000, /* Hand-off info from SPL */
+ BLOBLISTT_VBE = 0xfff001, /* VBE per-phase state */
+ BLOBLISTT_U_BOOT_VIDEO = 0xfff002, /* Video info from SPL */
};
/**
@@ -156,33 +167,33 @@
* from the last.
*
* @magic: BLOBLIST_MAGIC
+ * @chksum: checksum for the entire bloblist allocated area. Since any of the
+ * blobs can be altered after being created, this checksum is only valid
+ * when the bloblist is finalized before jumping to the next stage of boot.
+ * This is the value needed to make all checksummed bytes sum to 0
* @version: BLOBLIST_VERSION
* @hdr_size: Size of this header, normally sizeof(struct bloblist_hdr). The
* first bloblist_rec starts at this offset from the start of the header
- * @flags: Space for BLOBLISTF... flags (none yet)
- * @size: Total size of the bloblist (non-zero if valid) including this header.
- * The bloblist extends for this many bytes from the start of this header.
- * When adding new records, the bloblist can grow up to this size.
- * @alloced: Total size allocated so far for this bloblist. This starts out as
+ * @align_log2: Power of two of the maximum alignment required by this list
+ * @used_size: Size allocated so far for this bloblist. This starts out as
* sizeof(bloblist_hdr) since we need at least that much space to store a
* valid bloblist
+ * @total_size: The number of total bytes that the bloblist can occupy.
+ * Any blob producer must check if there is sufficient space before adding
+ * a record to the bloblist.
+ * @flags: Space for BLOBLISTF... flags (none yet)
* @spare: Spare space (for future use)
- * @chksum: CRC32 for the entire bloblist allocated area. Since any of the
- * blobs can be altered after being created, this checksum is only valid
- * when the bloblist is finalised before jumping to the next stage of boot.
- * Note that chksum is last to make it easier to exclude it from the
- * checksum calculation.
*/
struct bloblist_hdr {
u32 magic;
- u32 version;
- u32 hdr_size;
+ u8 chksum;
+ u8 version;
+ u8 hdr_size;
+ u8 align_log2;
+ u32 used_size;
+ u32 total_size;
u32 flags;
-
- u32 size;
- u32 alloced;
u32 spare;
- u32 chksum;
};
/**
@@ -193,18 +204,25 @@
*
* NOTE: Only exported for testing purposes. Do not use this struct.
*
- * @tag: Tag indicating what the record contains
- * @hdr_size: Size of this header, normally sizeof(struct bloblist_rec). The
- * record's data starts at this offset from the start of the record
+ * @tag_and_hdr_size: Tag indicating what the record contains (bottom 24 bits), and
+ * size of this header (top 8 bits), normally sizeof(struct bloblist_rec).
+ * The record's data starts at this offset from the start of the record
* @size: Size of record in bytes, excluding the header size. This does not
* need to be aligned (e.g. 3 is OK).
- * @spare: Spare space for other things
*/
struct bloblist_rec {
- u32 tag;
- u32 hdr_size;
+ u32 tag_and_hdr_size;
u32 size;
- u32 spare;
+};
+
+enum {
+ BLOBLISTR_TAG_SHIFT = 0,
+ BLOBLISTR_TAG_MASK = 0xffffffU << BLOBLISTR_TAG_SHIFT,
+ BLOBLISTR_HDR_SIZE_SHIFT = 24,
+ BLOBLISTR_HDR_SIZE_MASK = 0xffU << BLOBLISTR_HDR_SIZE_SHIFT,
+
+ BLOBLIST_HDR_SIZE = sizeof(struct bloblist_hdr),
+ BLOBLIST_REC_HDR_SIZE = sizeof(struct bloblist_rec),
};
/**
@@ -249,11 +267,11 @@
*
* @tag: Tag to add (enum bloblist_tag_t)
* @size: Size of the blob
- * @align: Alignment of the blob (in bytes), 0 for default
+ * @align_log2: Alignment of the blob (in bytes log2), 0 for default
* Return: pointer to the newly added block, or NULL if there is not enough
* space for the blob
*/
-void *bloblist_add(uint tag, int size, int align);
+void *bloblist_add(uint tag, int size, int align_log2);
/**
* bloblist_ensure_size() - Find or add a blob
@@ -263,11 +281,11 @@
* @tag: Tag to add (enum bloblist_tag_t)
* @size: Size of the blob
* @blobp: Returns a pointer to blob on success
- * @align: Alignment of the blob (in bytes), 0 for default
+ * @align_log2: Alignment of the blob (in bytes log2), 0 for default
* Return: 0 if OK, -ENOSPC if it is missing and could not be added due to lack
* of space, or -ESPIPE it exists but has the wrong size
*/
-int bloblist_ensure_size(uint tag, int size, int align, void **blobp);
+int bloblist_ensure_size(uint tag, int size, int align_log2, void **blobp);
/**
* bloblist_ensure() - Find or add a blob
@@ -313,10 +331,11 @@
* @addr: Address of bloblist
* @size: Initial size for bloblist
* @flags: Flags to use for bloblist
+ * @align_log2: Log base 2 of maximum alignment provided by this bloblist
* Return: 0 if OK, -EFAULT if addr is not aligned correctly, -ENOSPC is the
* area is not large enough
*/
-int bloblist_new(ulong addr, uint size, uint flags);
+int bloblist_new(ulong addr, uint size, uint flags, uint align_log2);
/**
* bloblist_check() - Check if a bloblist exists
@@ -347,10 +366,10 @@
* This returns useful information about the bloblist
*
* @basep: Returns base address of bloblist
- * @sizep: Returns the number of bytes used in the bloblist
- * @allocedp: Returns the total space allocated to the bloblist
+ * @tsizep: Returns the total number of bytes of the bloblist
+ * @usizep: Returns the number of used bytes of the bloblist
*/
-void bloblist_get_stats(ulong *basep, ulong *sizep, ulong *allocedp);
+void bloblist_get_stats(ulong *basep, ulong *tsizep, ulong *usizep);
/**
* bloblist_get_base() - Get the base address of the bloblist
@@ -367,6 +386,13 @@
ulong bloblist_get_size(void);
/**
+ * bloblist_get_total_size() - Get the total size of the bloblist
+ *
+ * Return: the size in bytes
+ */
+ulong bloblist_get_total_size(void);
+
+/**
* bloblist_show_stats() - Show information about the bloblist
*
* This shows useful information about the bloblist on the console
diff --git a/include/bootdev.h b/include/bootdev.h
index 35fa25a..2cee883 100644
--- a/include/bootdev.h
+++ b/include/bootdev.h
@@ -7,6 +7,7 @@
#ifndef __bootdev_h
#define __bootdev_h
+#include <dm/uclass-id.h>
#include <linux/list.h>
struct bootflow;
diff --git a/include/bootflow.h b/include/bootflow.h
index fede8f2..4211287 100644
--- a/include/bootflow.h
+++ b/include/bootflow.h
@@ -45,10 +45,12 @@
* CONFIG_OF_HAS_PRIOR_STAGE is enabled
* @BOOTFLOWF_STATIC_BUF: Indicates that @bflow->buf is statically set, rather
* than being allocated by malloc().
+ * @BOOTFLOWF_USE_BUILTIN_FDT : Indicates that current bootflow uses built-in FDT
*/
enum bootflow_flags_t {
BOOTFLOWF_USE_PRIOR_FDT = 1 << 0,
BOOTFLOWF_STATIC_BUF = 1 << 1,
+ BOOTFLOWF_USE_BUILTIN_FDT = 1 << 2,
};
/**
diff --git a/include/bootm.h b/include/bootm.h
index 10a1bd6..9e0f8d6 100644
--- a/include/bootm.h
+++ b/include/bootm.h
@@ -16,6 +16,55 @@
#define BOOTM_ERR_OVERLAP (-2)
#define BOOTM_ERR_UNIMPLEMENTED (-3)
+/**
+ * struct bootm_info() - information used when processing images to boot
+ *
+ * These mirror the first three arguments of the bootm command. They are
+ * designed to handle any type of image, but typically it is a FIT.
+ *
+ * @addr_img: Address of image to bootm, as passed to
+ * genimg_get_kernel_addr_fit() for processing:
+ *
+ * NULL: Usees default load address, i.e. image_load_addr
+ * <addr>: Uses hex address
+ *
+ * For FIT:
+ * "[<addr>]#<conf>": Uses address (or image_load_addr) and also specifies
+ * the FIT configuration to use
+ * "[<addr>]:<subimage>": Uses address (or image_load_addr) and also
+ * specifies the subimage name containing the OS
+ *
+ * @conf_ramdisk: Address (or with FIT, the name) of the ramdisk image, as
+ * passed to boot_get_ramdisk() for processing, or NULL for none
+ * @conf_fdt: Address (or with FIT, the name) of the FDT image, as passed to
+ * boot_get_fdt() for processing, or NULL for none
+ * @boot_progress: true to show boot progress
+ * @images: images information
+ * @cmd_name: command which invoked this operation, e.g. "bootm"
+ * @argc: Number of arguments to the command (excluding the actual command).
+ * This is 0 if there are no arguments
+ * @argv: NULL-terminated list of arguments, or NULL if there are no arguments
+ */
+struct bootm_info {
+ const char *addr_img;
+ const char *conf_ramdisk;
+ const char *conf_fdt;
+ bool boot_progress;
+ struct bootm_headers *images;
+ const char *cmd_name;
+ int argc;
+ char *const *argv;
+};
+
+/**
+ * bootm_init() - Set up a bootm_info struct with useful defaults
+ *
+ * Set up the struct with default values for all members:
+ * @boot_progress is set to true and @images is set to the global images
+ * variable. Everything else is set to NULL except @argc which is 0
+ */
+void bootm_init(struct bootm_info *bmi);
+
/*
* Continue booting an OS image; caller already has:
* - copied image header to global variable `header'
@@ -25,21 +74,16 @@
* - disabled interrupts.
*
* @flag: Flags indicating what to do (BOOTM_STATE_...)
- * @argc: Number of arguments. Note that the arguments are shifted down
- * so that 0 is the first argument not processed by U-Boot, and
- * argc is adjusted accordingly. This avoids confusion as to how
- * many arguments are available for the OS.
- * @images: Pointers to os/initrd/fdt
+ * bmi: Bootm information
* Return: 1 on error. On success the OS boots so this function does
* not return.
*/
-typedef int boot_os_fn(int flag, int argc, char *const argv[],
- struct bootm_headers *images);
+typedef int boot_os_fn(int flag, struct bootm_info *bmi);
extern boot_os_fn do_bootm_linux;
extern boot_os_fn do_bootm_vxworks;
-int do_bootelf(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]);
+int do_bootelf(struct cmd_tbl *cmdtp, int fglag, int argc, char *const argv[]);
boot_os_fn *bootm_os_get_boot_func(int os);
@@ -47,14 +91,33 @@
int bootm_host_load_images(const void *fit, int cfg_noffset);
#endif
-int boot_selected_os(int argc, char *const argv[], int state,
- struct bootm_headers *images, boot_os_fn *boot_fn);
+int boot_selected_os(int state, struct bootm_info *bmi, boot_os_fn *boot_fn);
ulong bootm_disable_interrupts(void);
-/* This is a special function used by booti/bootz */
-int bootm_find_images(int flag, int argc, char *const argv[], ulong start,
- ulong size);
+/**
+ * bootm_find_images() - find and locate various images
+ *
+ * @img_addr: Address of image being loaded
+ * @conf_ramdisk: Indicates the ramdisk to use (typically second arg of bootm)
+ * @conf_fdt: Indicates the FDT to use (typically third arg of bootm)
+ * @start: OS image start address
+ * @size: OS image size
+ *
+ * boot_find_images() will attempt to load an available ramdisk,
+ * flattened device tree, as well as specifically marked
+ * "loadable" images (loadables are FIT only)
+ *
+ * Note: bootm_find_images will skip an image if it is not found
+ *
+ * This is a special function used by booti/bootz
+ *
+ * Return:
+ * 0, if all existing images were loaded correctly
+ * 1, if an image is found but corrupted, or invalid
+ */
+int bootm_find_images(ulong img_addr, const char *conf_ramdisk,
+ const char *conf_fdt, ulong start, ulong size);
/*
* Measure the boot images. Measurement is the process of hashing some binary
@@ -67,9 +130,82 @@
*/
int bootm_measure(struct bootm_headers *images);
-int do_bootm_states(struct cmd_tbl *cmdtp, int flag, int argc,
- char *const argv[], int states, struct bootm_headers *images,
- int boot_progress);
+/**
+ * bootm_run_states() - Execute selected states of the bootm command.
+ *
+ * Note that if states contains more than one flag it MUST contain
+ * BOOTM_STATE_START, since this handles the addr_fit, conf_ramdisk and conf_fit
+ * members of @bmi
+ *
+ * Also note that aside from boot_os_fn functions and bootm_load_os, no other
+ * functions store the return value of in 'ret' may use a negative return
+ * value, without special handling.
+ *
+ * @bmi: bootm information
+ * @states Mask containing states to run (BOOTM_STATE_...)
+ * Return: 0 if ok, something else on error. Some errors will cause this
+ * function to perform a reboot! If states contains BOOTM_STATE_OS_GO
+ * then the intent is to boot an OS, so this function will not return
+ * unless the image type is standalone.
+ */
+int bootm_run_states(struct bootm_info *bmi, int states);
+
+/**
+ * boot_run() - Run the entire bootm/booti/bootz process
+ *
+ * This runs through the boot process from start to finish, with a base set of
+ * states, along with the extra ones supplied.
+ *
+ * This uses bootm_run_states().
+ *
+ * Note that it is normally easier to use bootm_run(), etc. since they handle
+ * the extra states correctly.
+ *
+ * @bmi: bootm information
+ * @cmd: command being run, NULL if none
+ * @extra_states: Mask of extra states to use for the boot
+ * Return: 0 if ok, something else on error
+ */
+int boot_run(struct bootm_info *bmi, const char *cmd, int extra_states);
+
+/**
+ * bootm_run() - Run the entire bootm process
+ *
+ * This runs through the bootm process from start to finish, using the default
+ * set of states.
+ *
+ * This uses bootm_run_states().
+ *
+ * @bmi: bootm information
+ * Return: 0 if ok, something else on error
+ */
+int bootm_run(struct bootm_info *bmi);
+
+/**
+ * bootz_run() - Run the entire bootz process
+ *
+ * This runs through the bootz process from start to finish, using the default
+ * set of states.
+ *
+ * This uses bootm_run_states().
+ *
+ * @bmi: bootm information
+ * Return: 0 if ok, something else on error
+ */
+int bootz_run(struct bootm_info *bmi);
+
+/**
+ * booti_run() - Run the entire booti process
+ *
+ * This runs through the booti process from start to finish, using the default
+ * set of states.
+ *
+ * This uses bootm_run_states().
+ *
+ * @bmi: bootm information
+ * Return: 0 if ok, something else on error
+ */
+int booti_run(struct bootm_info *bmi);
void arch_preboot_os(void);
diff --git a/include/bootstage.h b/include/bootstage.h
index affb0e5..f4e77b0 100644
--- a/include/bootstage.h
+++ b/include/bootstage.h
@@ -12,7 +12,9 @@
#define _BOOTSTAGE_H
#include <linux/types.h>
+#ifdef USE_HOSTCC
#include <linux/kconfig.h>
+#endif
/* Flags for each bootstage record */
enum bootstage_flags {
@@ -147,7 +149,6 @@
BOOTSTAGE_ID_FIT_CONFIG = 110,
BOOTSTAGE_ID_FIT_TYPE,
- BOOTSTAGE_ID_FIT_KERNEL_INFO,
BOOTSTAGE_ID_FIT_COMPRESSION,
BOOTSTAGE_ID_FIT_OS,
diff --git a/include/bootstd.h b/include/bootstd.h
index 7802564..99ce7b6 100644
--- a/include/bootstd.h
+++ b/include/bootstd.h
@@ -94,4 +94,13 @@
*/
void bootstd_clear_glob(void);
+/**
+ * bootstd_prog_boot() - Run standard boot in a fully programmatic mode
+ *
+ * Attempts to boot without making any use of U-Boot commands
+ *
+ * Returns: -ve error value (does not return except on failure to boot)
+ */
+int bootstd_prog_boot(void);
+
#endif
diff --git a/include/cli_hush.h b/include/cli_hush.h
index 2bd3567..007b8d6 100644
--- a/include/cli_hush.h
+++ b/include/cli_hush.h
@@ -12,11 +12,58 @@
#define FLAG_REPARSING (1 << 2) /* >=2nd pass */
#define FLAG_CONT_ON_NEWLINE (1 << 3) /* continue when we see \n */
+#if CONFIG_IS_ENABLED(HUSH_OLD_PARSER)
extern int u_boot_hush_start(void);
-extern int parse_string_outer(const char *, int);
+extern int parse_string_outer(const char *str, int flag);
extern int parse_file_outer(void);
-
int set_local_var(const char *s, int flg_export);
+#else
+static inline int u_boot_hush_start(void)
+{
+ return 0;
+}
+
+static inline int parse_string_outer(const char *str, int flag)
+{
+ return 1;
+}
+
+static inline int parse_file_outer(void)
+{
+ return 0;
+}
+
+static inline int set_local_var(const char *s, int flg_export)
+{
+ return 0;
+}
+#endif
+#if CONFIG_IS_ENABLED(HUSH_MODERN_PARSER)
+extern int u_boot_hush_start_modern(void);
+extern int parse_string_outer_modern(const char *str, int flag);
+extern void parse_and_run_file(void);
+int set_local_var_modern(char *s, int flg_export);
+#else
+static inline int u_boot_hush_start_modern(void)
+{
+ return 0;
+}
+
+static inline int parse_string_outer_modern(const char *str, int flag)
+{
+ return 1;
+}
+
+static inline void parse_and_run_file(void)
+{
+}
+
+static inline int set_local_var_modern(char *s, int flg_export)
+{
+ return 0;
+}
+#endif
+
void unset_local_var(const char *name);
char *get_local_var(const char *s);
diff --git a/include/clk-uclass.h b/include/clk-uclass.h
index a22f1a5..cd62848 100644
--- a/include/clk-uclass.h
+++ b/include/clk-uclass.h
@@ -25,6 +25,7 @@
* @set_parent: Set current clock parent
* @enable: Enable a clock.
* @disable: Disable a clock.
+ * @dump: Print clock information.
*
* The individual methods are described more fully below.
*/
@@ -39,6 +40,9 @@
int (*set_parent)(struct clk *clk, struct clk *parent);
int (*enable)(struct clk *clk);
int (*disable)(struct clk *clk);
+#if IS_ENABLED(CONFIG_CMD_CLK)
+ void (*dump)(struct udevice *dev);
+#endif
};
#if 0 /* For documentation only */
@@ -135,6 +139,15 @@
* Return: zero on success, or -ve error code.
*/
int disable(struct clk *clk);
+
+/**
+ * dump() - Print clock information.
+ * @dev: The clock device to dump.
+ *
+ * If present, this function is called by "clk dump" command for each
+ * bound device.
+ */
+void dump(struct udevice *dev);
#endif
#endif
diff --git a/include/clk.h b/include/clk.h
index 249c0e0..3d63944 100644
--- a/include/clk.h
+++ b/include/clk.h
@@ -676,8 +676,6 @@
return clk && !!clk->dev;
}
-int soc_clk_dump(void);
-
#endif
#define clk_prepare_enable(clk) clk_enable(clk)
diff --git a/include/command.h b/include/command.h
index 6262365..4158ca1 100644
--- a/include/command.h
+++ b/include/command.h
@@ -60,6 +60,39 @@
#endif
};
+/**
+ * cmd_arg_get() - Get a particular argument
+ *
+ * @argc: Number of arguments
+ * @argv: Argument vector of length @argc
+ * @argnum: Argument to get (0=first)
+ * Return: Pointer to argument @argnum if it exists, else NULL
+ */
+static inline const char *cmd_arg_get(int argc, char *const argv[], int argnum)
+{
+ return argc > argnum ? argv[argnum] : NULL;
+}
+
+static inline const char *cmd_arg0(int argc, char *const argv[])
+{
+ return cmd_arg_get(argc, argv, 0);
+}
+
+static inline const char *cmd_arg1(int argc, char *const argv[])
+{
+ return cmd_arg_get(argc, argv, 1);
+}
+
+static inline const char *cmd_arg2(int argc, char *const argv[])
+{
+ return cmd_arg_get(argc, argv, 2);
+}
+
+static inline const char *cmd_arg3(int argc, char *const argv[])
+{
+ return cmd_arg_get(argc, argv, 3);
+}
+
#if defined(CONFIG_CMD_RUN)
int do_run(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[]);
@@ -153,7 +186,7 @@
* Return: data size in bytes (1, 2, 4, 8) or CMD_DATA_SIZE_ERR for an invalid
* character, or CMD_DATA_SIZE_STR for a string
*/
-int cmd_get_data_size(char *arg, int default_size);
+int cmd_get_data_size(const char *arg, int default_size);
#endif
#ifdef CONFIG_CMD_BOOTD
@@ -390,7 +423,7 @@
#define U_BOOT_CMD_COMPLETE(_name, _maxargs, _rep, _cmd, _usage, _help, _comp) \
ll_entry_declare(struct cmd_tbl, _name, cmd) = \
U_BOOT_CMD_MKENT_COMPLETE(_name, _maxargs, _rep, _cmd, \
- _usage, _help, _comp);
+ _usage, _help, _comp)
#define U_BOOT_CMDREP_COMPLETE(_name, _maxargs, _cmd_rep, _usage, \
_help, _comp) \
diff --git a/include/configs/am62ax_evm.h b/include/configs/am62ax_evm.h
index 57003f1..496d1c2 100644
--- a/include/configs/am62ax_evm.h
+++ b/include/configs/am62ax_evm.h
@@ -12,10 +12,6 @@
#include <env/ti/mmc.h>
#include <env/ti/k3_dfu.h>
-/* DDR Configuration */
-#define CFG_SYS_SDRAM_BASE1 0x880000000
-
-
/* Now for the remaining common defines */
#include <configs/ti_armv7_common.h>
diff --git a/include/configs/am65x_evm.h b/include/configs/am65x_evm.h
index 811dc0f..64458eb 100644
--- a/include/configs/am65x_evm.h
+++ b/include/configs/am65x_evm.h
@@ -14,9 +14,6 @@
#include <env/ti/k3_rproc.h>
#include <env/ti/k3_dfu.h>
-/* DDR Configuration */
-#define CFG_SYS_SDRAM_BASE1 0x880000000
-
/* Now for the remaining common defines */
#include <configs/ti_armv7_common.h>
diff --git a/include/configs/at91-sama5_common.h b/include/configs/at91-sama5_common.h
index 4aa876a..81c76ef 100644
--- a/include/configs/at91-sama5_common.h
+++ b/include/configs/at91-sama5_common.h
@@ -9,8 +9,6 @@
#ifndef __AT91_SAMA5_COMMON_H
#define __AT91_SAMA5_COMMON_H
-#include <linux/kconfig.h>
-
/* ARM asynchronous clock */
#define CFG_SYS_AT91_SLOW_CLOCK 32768
#define CFG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */
diff --git a/include/configs/bcm_ns3.h b/include/configs/bcm_ns3.h
index 47de4bc..7c6e072 100644
--- a/include/configs/bcm_ns3.h
+++ b/include/configs/bcm_ns3.h
@@ -45,11 +45,11 @@
#define PCIE_ARGS "pcie_args=pci=pcie_bus_safe pcie_ports=native vfio_pci.disable_idle_d3=1\0"
#ifdef CONFIG_BCM_SF2_ETH
-#define ETH_ADDR "ethaddr=00:0A:F7:95:65:A4\0"
+#define BCM_ETH_ADDR "ethaddr=00:0A:F7:95:65:A4\0"
#define NET_ARGS "bgmac_platform.ethaddr=${ethaddr} " \
"ip=${ipaddr}::${gatewayip}:${netmask}::${ethif}:off"
#else
-#define ETH_ADDR
+#define BMC_ETH_ADDR
#define NET_ARGS
#endif
@@ -749,7 +749,7 @@
OS_LOG_LEVEL \
EXTRA_ARGS \
PCIE_ARGS \
- ETH_ADDR \
+ BMC_ETH_ADDR \
RESERVED_MEM \
SETBOOTARGS \
UPDATEME_FLASH_PARAMS \
diff --git a/include/configs/colibri_imx7.h b/include/configs/colibri_imx7.h
index 03f8ed1..7a9f4af 100644
--- a/include/configs/colibri_imx7.h
+++ b/include/configs/colibri_imx7.h
@@ -101,7 +101,6 @@
UBI_BOOTCMD
#elif defined(CONFIG_TARGET_COLIBRI_IMX7_EMMC)
#define MODULE_EXTRA_ENV_SETTINGS \
- "variant=-emmc\0" \
EMMC_ANDROID_BOOTCMD
#endif
diff --git a/include/configs/etamin.h b/include/configs/draco-etamin.h
similarity index 100%
rename from include/configs/etamin.h
rename to include/configs/draco-etamin.h
diff --git a/include/configs/rastaban.h b/include/configs/draco-rastaban.h
similarity index 100%
rename from include/configs/rastaban.h
rename to include/configs/draco-rastaban.h
diff --git a/include/configs/thuban.h b/include/configs/draco-thuban.h
similarity index 100%
rename from include/configs/thuban.h
rename to include/configs/draco-thuban.h
diff --git a/include/configs/draco.h b/include/configs/draco.h
deleted file mode 100644
index 8f993ce..0000000
--- a/include/configs/draco.h
+++ /dev/null
@@ -1,41 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * (C) Copyright 2013 Siemens Schweiz AG
- * (C) Heiko Schocher, DENX Software Engineering, hs@denx.de.
- *
- * Based on:
- * U-Boot file:/include/configs/am335x_evm.h
- *
- * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/
- */
-
-#ifndef __CONFIG_DRACO_H
-#define __CONFIG_DRACO_H
-
-#include "siemens-am33x-common.h"
-
-#define DDR_PLL_FREQ 303
-
-#define BOARD_DFU_BUTTON_GPIO 27 /* Use as default */
-#define GPIO_LAN9303_NRST 88 /* GPIO2_24 = gpio88 */
-
-#define CFG_ENV_SETTINGS_BUTTONS_AND_LEDS \
- "button_dfu0=27\0" \
- "led0=103,1,0\0" \
- "led1=64,0,1\0"
-
- /* Physical Memory Map */
-#define CFG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */
-
-/* Default env settings */
-#define CFG_EXTRA_ENV_SETTINGS \
- "hostname=draco\0" \
- "ubi_off=2048\0"\
- "nand_img_size=0x400000\0" \
- "optargs=\0" \
- "preboot=draco_led 0\0" \
- CFG_ENV_SETTINGS_BUTTONS_AND_LEDS \
- CFG_ENV_SETTINGS_V2 \
- CFG_ENV_SETTINGS_NAND_V2
-
-#endif /* ! __CONFIG_DRACO_H */
diff --git a/include/configs/dragonboard410c.h b/include/configs/dragonboard410c.h
index 73aec34..00102cd 100644
--- a/include/configs/dragonboard410c.h
+++ b/include/configs/dragonboard410c.h
@@ -9,7 +9,6 @@
#define __CONFIGS_DRAGONBOARD410C_H
#include <linux/sizes.h>
-#include <asm/arch/sysmap-apq8016.h>
/* Build new ELF image from u-boot.bin (U-Boot + appended DTB) */
diff --git a/include/configs/dragonboard820c.h b/include/configs/dragonboard820c.h
index 4997083..c6d9182 100644
--- a/include/configs/dragonboard820c.h
+++ b/include/configs/dragonboard820c.h
@@ -9,7 +9,6 @@
#define __CONFIGS_DRAGONBOARD820C_H
#include <linux/sizes.h>
-#include <asm/arch/sysmap-apq8096.h>
/* Physical Memory Map */
diff --git a/include/configs/dragonboard845c.h b/include/configs/dragonboard845c.h
index c1e590f..14a8a2c 100644
--- a/include/configs/dragonboard845c.h
+++ b/include/configs/dragonboard845c.h
@@ -9,7 +9,6 @@
#define __CONFIGS_SDM845_H
#include <linux/sizes.h>
-#include <asm/arch/sysmap-sdm845.h>
#define CFG_SYS_BAUDRATE_TABLE { 115200, 230400, 460800, 921600 }
diff --git a/include/configs/imx8mm_data_modul_edm_sbc.h b/include/configs/imx8mm_data_modul_edm_sbc.h
index f7d2b66..b777fe6 100644
--- a/include/configs/imx8mm_data_modul_edm_sbc.h
+++ b/include/configs/imx8mm_data_modul_edm_sbc.h
@@ -34,13 +34,11 @@
#define CFG_SYS_FSL_USDHC_NUM 2
#define CFG_SYS_FSL_ESDHC_ADDR 0
-#define CFG_EXTRA_ENV_SETTINGS \
+#define CFG_EXTRA_ENV_SETTINGS \
"altbootcmd=setenv devpart 2 && run bootcmd ; reset\0" \
"bootlimit=3\0" \
"devtype=mmc\0" \
"devpart=1\0" \
- /* Give slow devices beyond USB HUB chance to come up. */ \
- "usb_pgood_delay=2000\0" \
"dfu_alt_info=" \
/* RAM block at DRAM offset 256..768 MiB */ \
"ram ram0=ram ram 0x50000000 0x20000000&" \
@@ -76,6 +74,11 @@
"setenv stderr ${stderr},nc && " \
"setenv stdout ${stdout},nc && " \
"setenv stdin ${stdin},nc ; " \
- "fi"
+ "fi\0" \
+ "stdin=serial\0" \
+ "stdout=serial\0" \
+ "stderr=serial\0" \
+ /* Give slow devices beyond USB HUB chance to come up. */ \
+ "usb_pgood_delay=2000\0"
#endif
diff --git a/include/configs/imx8mp_data_modul_edm_sbc.h b/include/configs/imx8mp_data_modul_edm_sbc.h
index 11ac3c0..8d79540 100644
--- a/include/configs/imx8mp_data_modul_edm_sbc.h
+++ b/include/configs/imx8mp_data_modul_edm_sbc.h
@@ -29,8 +29,6 @@
"bootlimit=3\0" \
"devtype=mmc\0" \
"devpart=1\0" \
- /* Give slow devices beyond USB HUB chance to come up. */ \
- "usb_pgood_delay=2000\0" \
"dmo_update_env=" \
"setenv dmo_update_env true ; saveenv ; saveenv\0" \
"dmo_update_sf_write_data=" \
@@ -40,6 +38,11 @@
"run dmo_update_sf_write_data\0" \
"dmo_update_sd_to_sf=" \
"load mmc 1:1 ${loadaddr} boot/flash.bin && " \
- "run dmo_update_sf_write_data\0"
+ "run dmo_update_sf_write_data\0" \
+ "stdin=serial\0" \
+ "stdout=serial\0" \
+ "stderr=serial\0" \
+ /* Give slow devices beyond USB HUB chance to come up. */ \
+ "usb_pgood_delay=2000\0"
#endif
diff --git a/include/configs/imx8mp_debix_model_a.h b/include/configs/imx8mp_debix_model_a.h
new file mode 100644
index 0000000..e82e8b1
--- /dev/null
+++ b/include/configs/imx8mp_debix_model_a.h
@@ -0,0 +1,54 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2019 NXP
+ * Copyright 2023 Gilles Talis <gilles.talis@gmail.com>
+ */
+
+#ifndef __IMX8MP_DEBIX_MODEL_A_H
+#define __IMX8MP_DEBIX_MODEL_A_H
+
+#include <linux/sizes.h>
+#include <linux/stringify.h>
+#include <asm/arch/imx-regs.h>
+
+#define CFG_SYS_UBOOT_BASE (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
+
+#if defined(CONFIG_CMD_NET)
+#define CFG_FEC_MXC_PHYADDR 1
+
+#define PHY_ANEG_TIMEOUT 20000
+
+#endif
+
+#define BOOT_TARGET_DEVICES(func) \
+ func(MMC, mmc, 1) \
+ func(MMC, mmc, 2)
+
+#include <config_distro_bootcmd.h>
+
+/* Initial environment variables */
+#define CFG_EXTRA_ENV_SETTINGS \
+ BOOTENV \
+ "scriptaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
+ "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
+ "image=Image\0" \
+ "console=ttymxc1,115200 earlycon=ec_imx6q,0x30890000,115200\0" \
+ "fdt_addr_r=0x43000000\0" \
+ "boot_fdt=try\0" \
+ "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
+ "initrd_addr=0x43800000\0" \
+ "bootm_size=0x10000000\0" \
+ "mmcpart=1\0" \
+ "mmcroot=/dev/mmcblk1p2 rootwait rw\0" \
+
+/* Link Definitions */
+
+#define CFG_SYS_INIT_RAM_ADDR 0x40000000
+#define CFG_SYS_INIT_RAM_SIZE 0x80000
+
+/* 2GB DDR */
+#define CFG_SYS_SDRAM_BASE 0x40000000
+#define PHYS_SDRAM 0x40000000
+#define PHYS_SDRAM_SIZE 0x80000000 /* 2 GB */
+
+#endif
diff --git a/include/configs/imx8mp_dhcom_pdk2.h b/include/configs/imx8mp_dhcom_pdk2.h
index d022faa..ea32fe1 100644
--- a/include/configs/imx8mp_dhcom_pdk2.h
+++ b/include/configs/imx8mp_dhcom_pdk2.h
@@ -28,15 +28,9 @@
#define CFG_SYS_FSL_USDHC_NUM 2
#define CFG_SYS_FSL_ESDHC_ADDR 0
-#define CFG_EXTRA_ENV_SETTINGS \
+#define CFG_EXTRA_ENV_SETTINGS \
"altbootcmd=run bootcmd ; reset\0" \
"bootlimit=3\0" \
- "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
- "pxefile_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
- "ramdisk_addr_r=0x58000000\0" \
- "scriptaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
- /* Give slow devices beyond USB HUB chance to come up. */ \
- "usb_pgood_delay=2000\0" \
"dfu_alt_info=" \
/* RAM block at DRAM offset 256..768 MiB */ \
"ram ram0=ram ram 0x50000000 0x20000000&" \
@@ -68,6 +62,15 @@
"dh_update_emmc_to_sf=" \
"load mmc 1:1 ${loadaddr} boot/flash.bin && " \
"run dh_update_sf_gen_fcfb dh_update_sf_write_data\0" \
+ "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
+ "pxefile_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
+ "ramdisk_addr_r=0x58000000\0" \
+ "scriptaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
+ "stdin=serial\0" \
+ "stdout=serial\0" \
+ "stderr=serial\0" \
+ /* Give slow devices beyond USB HUB chance to come up. */ \
+ "usb_pgood_delay=2000\0" \
BOOTENV
#define BOOT_TARGET_DEVICES(func) \
diff --git a/include/configs/imx93_var_som.h b/include/configs/imx93_var_som.h
new file mode 100644
index 0000000..18a8ee5
--- /dev/null
+++ b/include/configs/imx93_var_som.h
@@ -0,0 +1,48 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2022 NXP
+ * Copyright 2023 Variscite Ltd.
+ */
+
+#ifndef __IMX93_VAR_SOM_H
+#define __IMX93_VAR_SOM_H
+
+#include <linux/sizes.h>
+#include <linux/stringify.h>
+#include <asm/arch/imx-regs.h>
+
+#define CFG_SYS_SDRAM_BASE 0x80000000
+#define CFG_SYS_UBOOT_BASE \
+ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
+
+#define BOOT_TARGET_DEVICES(func) \
+ func(MMC, mmc, 0) \
+ func(MMC, mmc, 1)
+
+#include <config_distro_bootcmd.h>
+
+/* Initial environment variables */
+#define CFG_EXTRA_ENV_SETTINGS BOOTENV
+
+#define CFG_SYS_INIT_RAM_ADDR 0x80000000
+#define CFG_SYS_INIT_RAM_SIZE 0x200000
+
+#define CFG_SYS_SDRAM_BASE 0x80000000
+#define PHYS_SDRAM 0x80000000
+#define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */
+
+#define DEFAULT_SDRAM_SIZE (512 * SZ_1M) /* 512MB Minimum DDR4, see get_dram_size */
+#define VAR_EEPROM_DRAM_START (PHYS_SDRAM + (DEFAULT_SDRAM_SIZE >> 1))
+#define VAR_SOM_EEPROM_I2C_NAME "i2c@42530000"
+#define VAR_CARRIER_EEPROM_I2C_NAME "i2c@44340000"
+
+#define CFG_SYS_FSL_USDHC_NUM 2
+
+/* Using ULP WDOG for reset */
+#define WDOG_BASE_ADDR WDG3_BASE_ADDR
+
+#if defined(CONFIG_CMD_NET)
+#define PHY_ANEG_TIMEOUT 20000
+#endif
+
+#endif
diff --git a/include/configs/j721e_evm.h b/include/configs/j721e_evm.h
index ea39d1b..c26438c 100644
--- a/include/configs/j721e_evm.h
+++ b/include/configs/j721e_evm.h
@@ -11,8 +11,6 @@
#include <linux/sizes.h>
-/* DDR Configuration */
-#define CFG_SYS_SDRAM_BASE1 0x880000000
/* FLASH Configuration */
#define CFG_SYS_FLASH_BASE 0x000000000
diff --git a/include/configs/j721s2_evm.h b/include/configs/j721s2_evm.h
index 692c6bb..846cfa7 100644
--- a/include/configs/j721s2_evm.h
+++ b/include/configs/j721s2_evm.h
@@ -12,9 +12,6 @@
#include <linux/sizes.h>
#include <config_distro_bootcmd.h>
-/* DDR Configuration */
-#define CFG_SYS_SDRAM_BASE1 0x880000000
-
/* SPL Loader Configuration */
#if defined(CONFIG_TARGET_J721S2_A72_EVM)
#define CFG_SYS_UBOOT_BASE 0x50280000
diff --git a/include/configs/librem5.h b/include/configs/librem5.h
index ce0a340..876b02f 100644
--- a/include/configs/librem5.h
+++ b/include/configs/librem5.h
@@ -56,6 +56,8 @@
"scriptaddr=0x80000000\0" \
"pxefile_addr_r=0x80100000\0" \
"kernel_addr_r=0x80800000\0" \
+ "kernel_comp_addr_r=0x90000000\0" \
+ "kernel_comp_size=0x08000000\0" \
"fdt_addr_r=0x84800000\0" \
"ramdisk_addr_r=0x85000000\0" \
"console=" CONSOLE ",115200\0" \
diff --git a/include/configs/mt8365.h b/include/configs/mt8365.h
new file mode 100644
index 0000000..e8aacf8
--- /dev/null
+++ b/include/configs/mt8365.h
@@ -0,0 +1,12 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Configuration for MT8365 based boards
+ *
+ * Copyright (C) 2023 BayLibre, SAS
+ * Author: Julien Masson <jmasson@baylibre.com>
+ */
+
+#ifndef __MT8365_H
+#define __MT8365_H
+
+#endif
diff --git a/include/configs/pe2201.h b/include/configs/pe2201.h
new file mode 100644
index 0000000..80f8f17
--- /dev/null
+++ b/include/configs/pe2201.h
@@ -0,0 +1,16 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2023, Phytium Technology Co., Ltd.
+ * lixinde <lixinde@phytium.com.cn>
+ * weichangzheng <weichangzheng@phytium.com.cn>
+ */
+
+#ifndef __PE2201_CONFIG_H
+#define __PE2201_CONFIG_H
+
+/* SDRAM Bank #1 start address */
+#define PHYS_SDRAM_1 0x80000000
+#define PHYS_SDRAM_1_SIZE 0x74000000
+#define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1
+
+#endif
diff --git a/include/configs/phycore_am62x.h b/include/configs/phycore_am62x.h
new file mode 100644
index 0000000..10b78b6
--- /dev/null
+++ b/include/configs/phycore_am62x.h
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Configuration header file for PHYTEC phyCORE-AM62x
+ *
+ * Copyright (C) 2023 PHYTEC Messtechnik GmbH
+ * Author: Wadim Egorov <w.egorov@phytec.de>
+ */
+
+#ifndef __PHYCORE_AM62X_H
+#define __PHYCORE_AM62X_H
+
+/* DDR Configuration */
+#define CFG_SYS_SDRAM_BASE 0x80000000
+
+#endif /* __PHYCORE_AM62X_H */
diff --git a/include/configs/pico-imx7d.h b/include/configs/pico-imx7d.h
index 096e5bb..e7a8cb2 100644
--- a/include/configs/pico-imx7d.h
+++ b/include/configs/pico-imx7d.h
@@ -13,7 +13,7 @@
#define CFG_MXC_UART_BASE UART5_IPS_BASE_ADDR
/* MMC Config */
-#define CFG_SYS_FSL_ESDHC_ADDR 0
+#define CFG_SYS_FSL_ESDHC_ADDR USDHC3_BASE_ADDR
#define CFG_DFU_ENV_SETTINGS \
"dfu_alt_info=" \
@@ -79,9 +79,11 @@
"name=rootfs,size=0,uuid=${uuid_gpt_rootfs}\0" \
"fastboot_partition_alias_system=rootfs\0" \
"setup_emmc=mmc dev 0; gpt write mmc 0 $partitions; reset;\0" \
+ "mmcautodetect=yes\0" \
PICO_BOOT_ENV
#define BOOT_TARGET_DEVICES(func) \
+ func(MMC, mmc, 1) \
func(MMC, mmc, 0) \
func(USB, usb, 0) \
func(PXE, pxe, na) \
diff --git a/include/configs/qcs404-evb.h b/include/configs/qcs404-evb.h
index 8ea59aa..9501d43 100644
--- a/include/configs/qcs404-evb.h
+++ b/include/configs/qcs404-evb.h
@@ -9,7 +9,6 @@
#define __CONFIGS_QCS404EVB_H
#include <linux/sizes.h>
-#include <asm/arch/sysmap-qcs404.h>
#define CFG_SYS_BAUDRATE_TABLE { 115200, 230400, 460800, 921600 }
diff --git a/include/configs/rk3568_common.h b/include/configs/rk3568_common.h
index 1b7d343..48f9308 100644
--- a/include/configs/rk3568_common.h
+++ b/include/configs/rk3568_common.h
@@ -20,12 +20,12 @@
"script_offset_f=0xffe000\0" \
"script_size_f=0x2000\0" \
"pxefile_addr_r=0x00e00000\0" \
- "fdt_addr_r=0x0a100000\0" \
- "fdtoverlay_addr_r=0x02000000\0" \
- "kernel_addr_r=0x02080000\0" \
- "ramdisk_addr_r=0x0a200000\0" \
- "kernel_comp_addr_r=0x08000000\0" \
- "kernel_comp_size=0x2000000\0"
+ "kernel_addr_r=0x02000000\0" \
+ "kernel_comp_addr_r=0x0a000000\0" \
+ "fdt_addr_r=0x12000000\0" \
+ "fdtoverlay_addr_r=0x12100000\0" \
+ "ramdisk_addr_r=0x12180000\0" \
+ "kernel_comp_size=0x8000000\0"
#define CFG_EXTRA_ENV_SETTINGS \
ENV_MEM_LAYOUT_SETTINGS \
diff --git a/include/configs/rk3588_common.h b/include/configs/rk3588_common.h
index 46389d0..7043061 100644
--- a/include/configs/rk3588_common.h
+++ b/include/configs/rk3588_common.h
@@ -19,12 +19,12 @@
"script_offset_f=0xffe000\0" \
"script_size_f=0x2000\0" \
"pxefile_addr_r=0x00e00000\0" \
- "fdt_addr_r=0x0a100000\0" \
- "fdtoverlay_addr_r=0x02000000\0" \
- "kernel_addr_r=0x02080000\0" \
- "ramdisk_addr_r=0x0a200000\0" \
- "kernel_comp_addr_r=0x08000000\0" \
- "kernel_comp_size=0x2000000\0"
+ "kernel_addr_r=0x02000000\0" \
+ "kernel_comp_addr_r=0x0a000000\0" \
+ "fdt_addr_r=0x12000000\0" \
+ "fdtoverlay_addr_r=0x12100000\0" \
+ "ramdisk_addr_r=0x12180000\0" \
+ "kernel_comp_size=0x8000000\0"
#define CFG_EXTRA_ENV_SETTINGS \
"fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
diff --git a/include/configs/sdm845.h b/include/configs/sdm845.h
index 673268d..5ad8569 100644
--- a/include/configs/sdm845.h
+++ b/include/configs/sdm845.h
@@ -9,7 +9,6 @@
#define __CONFIGS_SDM845_H
#include <linux/sizes.h>
-#include <asm/arch/sysmap-sdm845.h>
#define CFG_SYS_BAUDRATE_TABLE { 115200, 230400, 460800, 921600 }
diff --git a/include/configs/sifive-unmatched.h b/include/configs/sifive-unmatched.h
index de8bfc1..27e0912 100644
--- a/include/configs/sifive-unmatched.h
+++ b/include/configs/sifive-unmatched.h
@@ -13,41 +13,4 @@
#define CFG_SYS_SDRAM_BASE 0x80000000
-/* Environment options */
-
-#define BOOT_TARGET_DEVICES(func) \
- func(NVME, nvme, 0) \
- func(NVME, nvme, 1) \
- func(USB, usb, 0) \
- func(MMC, mmc, 0) \
- func(SCSI, scsi, 0) \
- func(PXE, pxe, na) \
- func(DHCP, dhcp, na)
-
-#include <config_distro_bootcmd.h>
-
-#define TYPE_GUID_LOADER1 "5B193300-FC78-40CD-8002-E86C45580B47"
-#define TYPE_GUID_LOADER2 "2E54B353-1271-4842-806F-E436D6AF6985"
-#define TYPE_GUID_SYSTEM "0FC63DAF-8483-4772-8E79-3D69D8477DE4"
-
-#define PARTS_DEFAULT \
- "name=loader1,start=17K,size=1M,type=${type_guid_gpt_loader1};" \
- "name=loader2,size=4MB,type=${type_guid_gpt_loader2};" \
- "name=system,size=-,bootable,type=${type_guid_gpt_system};"
-
-#define CFG_EXTRA_ENV_SETTINGS \
- "kernel_addr_r=0x80200000\0" \
- "kernel_comp_addr_r=0x88000000\0" \
- "kernel_comp_size=0x4000000\0" \
- "fdt_addr_r=0x8c000000\0" \
- "scriptaddr=0x8c100000\0" \
- "pxefile_addr_r=0x8c200000\0" \
- "ramdisk_addr_r=0x8c300000\0" \
- "type_guid_gpt_loader1=" TYPE_GUID_LOADER1 "\0" \
- "type_guid_gpt_loader2=" TYPE_GUID_LOADER2 "\0" \
- "type_guid_gpt_system=" TYPE_GUID_SYSTEM "\0" \
- "partitions=" PARTS_DEFAULT "\0" \
- "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
- BOOTENV
-
#endif /* __SIFIVE_UNMATCHED_H */
diff --git a/include/configs/starfive-visionfive2.h b/include/configs/starfive-visionfive2.h
index ff43113..29c7447 100644
--- a/include/configs/starfive-visionfive2.h
+++ b/include/configs/starfive-visionfive2.h
@@ -40,6 +40,7 @@
"kernel_comp_addr_r=0x88000000\0" \
"kernel_comp_size=0x4000000\0" \
"fdt_addr_r=0x46000000\0" \
+ "fdtoverlay_addr_r=0x45800000\0" \
"scriptaddr=0x43900000\0" \
"pxefile_addr_r=0x45900000\0" \
"ramdisk_addr_r=0x46100000\0" \
diff --git a/include/configs/stm32f469-discovery.h b/include/configs/stm32f469-discovery.h
index 62a7e9a..75bb9cd 100644
--- a/include/configs/stm32f469-discovery.h
+++ b/include/configs/stm32f469-discovery.h
@@ -31,6 +31,8 @@
"scriptaddr=0x00418000\0" \
"pxefile_addr_r=0x00428000\0" \
"ramdisk_addr_r=0x00438000\0" \
+ "splashimage=0x00448000\0" \
+ "splashpos=m,m\0" \
BOOTENV
#endif /* __CONFIG_H */
diff --git a/include/configs/stm32mp15_dh_dhsom.h b/include/configs/stm32mp15_dh_dhsom.h
index 8ff8822..de39b19 100644
--- a/include/configs/stm32mp15_dh_dhsom.h
+++ b/include/configs/stm32mp15_dh_dhsom.h
@@ -12,14 +12,13 @@
#define PHY_ANEG_TIMEOUT 20000
#ifdef CONFIG_SPL_BUILD
-#define CFG_EXTRA_ENV_SETTINGS \
+#define CFG_EXTRA_ENV_SETTINGS \
"dfu_alt_info_ram=u-boot.itb ram " \
__stringify(CONFIG_SPL_LOAD_FIT_ADDRESS) \
" 0x800000\0"
#endif
-#define STM32MP_BOARD_EXTRA_ENV \
- "usb_pgood_delay=1000\0" \
+#define STM32MP_BOARD_EXTRA_ENV \
"dh_update_sd_to_emmc=" /* Install U-Boot from SD to eMMC */ \
"setexpr loadaddr1 ${loadaddr} + 0x1000000 && " \
"load mmc 0:4 ${loadaddr1} boot/u-boot-spl.stm32 && " \
@@ -49,7 +48,11 @@
"sf update ${loadaddr1} 0x40000 ${filesize1} && " \
"sf update ${loadaddr} 0x80000 ${filesize} && " \
"env set filesize1 && env set loadaddr1\0" \
- "update_sf=run dh_update_sd_to_sf\0"
+ "stdin=serial\0" \
+ "stdout=serial\0" \
+ "stderr=serial\0" \
+ "update_sf=run dh_update_sd_to_sf\0" \
+ "usb_pgood_delay=1000\0"
#include <configs/stm32mp15_common.h>
diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h
index b8ca77d..b29a25d 100644
--- a/include/configs/sunxi-common.h
+++ b/include/configs/sunxi-common.h
@@ -14,8 +14,9 @@
#include <linux/stringify.h>
-/* Serial & console */
-/* ns16550 reg in the low bits of cpu reg */
+/****************************************************************************
+ * base addresses for the SPL UART driver *
+ ****************************************************************************/
#ifdef CONFIG_MACH_SUNIV
/* suniv doesn't have apb2 and uart is connected to apb1 */
#define CFG_SYS_NS16550_CLK 100000000
@@ -31,8 +32,9 @@
# define CFG_SYS_NS16550_COM5 SUNXI_R_UART_BASE
#endif
-/* CPU */
-
+/****************************************************************************
+ * DRAM base address *
+ ****************************************************************************/
/*
* The DRAM Base differs between some models. We cannot use macros for the
* CONFIG_FOO defines which contain the DRAM base address since they end
@@ -52,16 +54,6 @@
/* V3s do not have enough memory to place code at 0x4a000000 */
#endif
-/*
- * The A80's A1 sram starts at 0x00010000 rather then at 0x00000000 and is
- * slightly bigger. Note that it is possible to map the first 32 KiB of the
- * A1 at 0x00000000 like with older SoCs by writing 0x16aa0001 to the
- * undocumented 0x008000e0 SYS_CTRL register. Where the 16aa is a key and
- * the 1 actually activates the mapping of the first 32 KiB to 0x00000000.
- * A64 and H5 also has SRAM A1 at 0x00010000, but no magic remap register
- * is known yet.
- * H6 has SRAM A1 at 0x00020000.
- */
#define CFG_SYS_INIT_RAM_ADDR CONFIG_SUNXI_SRAM_ADDRESS
/* FIXME: this may be larger on some SoCs */
#define CFG_SYS_INIT_RAM_SIZE 0x8000 /* 32 KiB */
@@ -69,36 +61,13 @@
#define PHYS_SDRAM_0 CFG_SYS_SDRAM_BASE
#define PHYS_SDRAM_0_SIZE 0x80000000 /* 2 GiB */
-/*
- * Miscellaneous configurable options
- */
-
-/* FLASH and environment organization */
-
+/****************************************************************************
+ * environment variables holding default load addresses *
+ ****************************************************************************/
/*
* We cannot use expressions here, because expressions won't be evaluated in
* autoconf.mk.
*/
-#if CONFIG_SUNXI_SRAM_ADDRESS == 0x10000
-#ifdef CONFIG_ARM64
-/* end of SRAM A2 for now, as SRAM A1 is pretty tight for an ARM64 build */
-#define LOW_LEVEL_SRAM_STACK 0x00054000
-#else
-#define LOW_LEVEL_SRAM_STACK 0x00018000
-#endif /* !CONFIG_ARM64 */
-#elif CONFIG_SUNXI_SRAM_ADDRESS == 0x20000
-#ifdef CONFIG_MACH_SUN50I_H616
-#define LOW_LEVEL_SRAM_STACK 0x52a00 /* below FEL buffers */
-#else
-/* end of SRAM A2 on H6 for now */
-#define LOW_LEVEL_SRAM_STACK 0x00118000
-#endif
-#else
-#define LOW_LEVEL_SRAM_STACK 0x00008000 /* End of sram */
-#endif
-
-/* Ethernet support */
-
#ifdef CONFIG_ARM64
/*
* Boards seem to come with at least 512MB of DRAM.
@@ -174,15 +143,11 @@
"ramdisk_addr_r=" RAMDISK_ADDR_R "\0"
#ifdef CONFIG_ARM64
-
#define MEM_LAYOUT_ENV_EXTRA_SETTINGS \
"kernel_comp_addr_r=" KERNEL_COMP_ADDR_R "\0" \
"kernel_comp_size=" KERNEL_COMP_SIZE "\0"
-
#else
-
#define MEM_LAYOUT_ENV_EXTRA_SETTINGS ""
-
#endif
#define DFU_ALT_INFO_RAM \
@@ -191,6 +156,9 @@
"fdt ram " FDT_ADDR_R " 0x100000;" \
"ramdisk ram " RAMDISK_ADDR_R " 0x4000000\0"
+/****************************************************************************
+ * definitions for the distro boot system *
+ ****************************************************************************/
#ifdef CONFIG_MMC
#if CONFIG_MMC_SUNXI_SLOT_EXTRA != -1
#define BOOTENV_DEV_MMC_AUTO(devtypeu, devtypel, instance) \
diff --git a/include/configs/tb100.h b/include/configs/tb100.h
index 1318f5e..08b6f32 100644
--- a/include/configs/tb100.h
+++ b/include/configs/tb100.h
@@ -21,25 +21,4 @@
*/
#define CFG_SYS_NS16550_CLK 166666666
-/*
- * Even though the board houses Realtek RTL8211E PHY
- * corresponding PHY driver (drivers/net/phy/realtek.c) behaves unexpectedly.
- * In particular "parse_status" reports link is down.
- *
- * Until Realtek PHY driver is fixed fall back to generic PHY driver
- * which implements all required functionality and behaves much more stable.
- *
- *
- */
-
-/*
- * Ethernet configuration
- */
-#define ETH0_BASE_ADDRESS 0xFE100000
-#define ETH1_BASE_ADDRESS 0xFE110000
-
-/*
- * Console configuration
- */
-
#endif /* _CONFIG_TB100_H_ */
diff --git a/include/configs/ti_armv7_keystone2.h b/include/configs/ti_armv7_keystone2.h
index 72c04d8..b36207c 100644
--- a/include/configs/ti_armv7_keystone2.h
+++ b/include/configs/ti_armv7_keystone2.h
@@ -9,23 +9,10 @@
#ifndef __CONFIG_KS2_EVM_H
#define __CONFIG_KS2_EVM_H
-/* U-Boot Build Configuration */
-
-/* SoC Configuration */
-
/* Memory Configuration */
#define CFG_SYS_LPAE_SDRAM_BASE 0x800000000
#define CFG_MAX_RAM_BANK_SIZE (2 << 30) /* 2GB */
-#ifdef CONFIG_SYS_MALLOC_F_LEN
-#define SPL_MALLOC_F_SIZE CONFIG_SYS_MALLOC_F_LEN
-#else
-#define SPL_MALLOC_F_SIZE 0
-#endif
-
-/* SPL SPI Loader Configuration */
-#define KEYSTONE_SPL_STACK_SIZE (8 * 1024)
-
/* SRAM scratch space entries */
#define SRAM_SCRATCH_SPACE_ADDR 0xc0c23fc
@@ -53,8 +40,6 @@
#define CFG_KSNET_SERDES_SGMII2_BASE KS2_SGMII_SERDES2_BASE
#define CFG_KSNET_SERDES_LANES_PER_SGMII KS2_LANES_PER_SGMII_SERDES
-/* EEPROM definitions */
-
/* NAND Configuration */
#define CFG_SYS_NAND_MASK_CLE 0x4000
#define CFG_SYS_NAND_MASK_ALE 0x2000
@@ -63,18 +48,10 @@
#define CFG_SYS_NAND_LARGEPAGE
#define CFG_SYS_NAND_BASE_LIST { 0x30000000, }
-
-
-/* U-Boot general configuration */
-
-/* EDMA3 */
-
-
/* Now for the remaining common defines */
#include <configs/ti_armv7_common.h>
/* we may include files below only after all above definitions */
-#include <asm/arch/hardware.h>
#include <asm/arch/clock.h>
#ifndef CONFIG_SOC_K2G
#define CFG_SYS_HZ_CLOCK ks_clk_get_rate(KS2_CLK1_6)
diff --git a/include/configs/tqma6.h b/include/configs/tqma6.h
index 8c75a75..2da76f1 100644
--- a/include/configs/tqma6.h
+++ b/include/configs/tqma6.h
@@ -8,7 +8,6 @@
#ifndef __CONFIG_H
#define __CONFIG_H
-#include <linux/kconfig.h>
#include <linux/stringify.h>
/* place code in last 4 MiB of RAM */
diff --git a/include/configs/turing-rk1-rk3588.h b/include/configs/turing-rk1-rk3588.h
new file mode 100644
index 0000000..760f3c6
--- /dev/null
+++ b/include/configs/turing-rk1-rk3588.h
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (c) 2023 Rockchip Electronics Co., Ltd.
+ */
+
+#ifndef __TURINGRK1_RK3588_H
+#define __TURINGRK1_RK3588_H
+
+#define ROCKCHIP_DEVICE_SETTINGS \
+ "stdout=serial,vidconsole\0" \
+ "stderr=serial,vidconsole\0"
+
+#include <configs/rk3588_common.h>
+
+#endif /* __TURINGRK1_RK3588_H */
diff --git a/include/configs/verdin-imx8mm.h b/include/configs/verdin-imx8mm.h
index 8072d5d..a7ea028 100644
--- a/include/configs/verdin-imx8mm.h
+++ b/include/configs/verdin-imx8mm.h
@@ -40,7 +40,6 @@
"boot_file=Image\0" \
"boot_script_dhcp=boot.scr\0" \
"console=ttymxc0\0" \
- "fdt_addr=0x43000000\0" \
"fdt_board=dev\0" \
"initrd_addr=0x43800000\0" \
"initrd_high=0xffffffffffffffff\0" \
diff --git a/include/configs/vexpress_aemv8.h b/include/configs/vexpress_aemv8.h
index 24d8ca0..8020689 100644
--- a/include/configs/vexpress_aemv8.h
+++ b/include/configs/vexpress_aemv8.h
@@ -187,6 +187,7 @@
func(USB, usb, 0) \
func(SATA, sata, 0) \
func(SATA, sata, 1) \
+ FUNC_VIRTIO(func) \
func(PXE, pxe, na) \
func(DHCP, dhcp, na) \
func(AFS, afs, na)
diff --git a/include/configs/x3-t30.h b/include/configs/x3-t30.h
index d29ea70..1453254 100644
--- a/include/configs/x3-t30.h
+++ b/include/configs/x3-t30.h
@@ -14,20 +14,9 @@
#include "tegra30-common.h"
+/* High-level configuration options */
#define CFG_TEGRA_BOARD_STRING "LG X3 Board"
-#ifdef CONFIG_DEVICE_P880
-/* High-level configuration options */
-#undef CFG_TEGRA_BOARD_STRING
-#define CFG_TEGRA_BOARD_STRING "LG Optimus 4X HD"
-#endif
-
-#ifdef CONFIG_DEVICE_P895
-/* High-level configuration options */
-#undef CFG_TEGRA_BOARD_STRING
-#define CFG_TEGRA_BOARD_STRING "LG Optimus Vu"
-#endif
-
#define X3_FLASH_UBOOT \
"flash_uboot=echo Preparing RAM;" \
"mw ${kernel_addr_r} 0 ${boot_block_size_r};" \
diff --git a/include/configs/xea.h b/include/configs/xea.h
index 04ca5aa..00d6274 100644
--- a/include/configs/xea.h
+++ b/include/configs/xea.h
@@ -25,146 +25,6 @@
#define PHYS_SDRAM_1_SIZE 0x10000000 /* Max 256 MB RAM */
#define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1
-/* Extra Environment */
-
-#define CFG_EXTRA_ENV_SETTINGS \
- "bootmode=update\0" \
- "bootpri=mmc_mmc\0" \
- "bootsec=sf_swu\0" \
- "consdev=ttyAMA0\0" \
- "baudrate=115200\0" \
- "dtbaddr=0x44000000\0" \
- "dtbfile=imx28-xea.dtb\0" \
- "rootdev=/dev/mmcblk0p2\0" \
- "netdev=eth0\0" \
- "rdaddr=0x43000000\0" \
- "swufile=swupdate.img\0" \
- "sf_kernel_offset=0x100000\0" \
- "sf_kernel_size=0x400000\0" \
- "sf_swu_offset=0x500000\0" \
- "sf_swu_size=0x800000\0" \
- "rootpath=/opt/eldk-5.5/armv5te/rootfs-qte-sdk\0" \
- "do_update_mmc=" \
- "if mmc rescan ; then " \
- "mmc dev 0 ${update_mmc_part} ; " \
- "if dhcp ${hostname}/${update_filename} ; then " \
- "setexpr fw_sz ${filesize} / 0x200 ; " /* SD block size */ \
- "setexpr fw_sz ${fw_sz} + 1 ; " \
- "mmc write ${loadaddr} ${update_offset} ${fw_sz} ; " \
- "fi ; " \
- "fi\0" \
- "do_update_sf=" \
- "if sf probe ; then " \
- "if dhcp ${hostname}/${update_filename} ; then " \
- "sf erase ${update_offset} +${filesize} ; " \
- "sf write ${loadaddr} ${update_offset} ${filesize} ; " \
- "fi ; " \
- "fi\0" \
- "update_spl_filename=u-boot.sb\0" \
- "update_spl=" \
- "setenv update_filename ${update_spl_filename} ; " \
- "setenv update_offset 0 ; " \
- "run do_update_sf\0" \
- "update_uboot_filename=u-boot.img\0" \
- "update_uboot=" \
- "setenv update_filename ${update_uboot_filename} ; " \
- "setenv update_offset 0x10000 ; " \
- "run do_update_sf ; " \
- "setenv update_mmc_part 1 ; " \
- "setenv update_offset 0 ; " \
- "run do_update_mmc\0" \
- "update_kernel_filename=uImage\0" \
- "update_kernel=" \
- "setenv update_mmc_part 1 ; " \
- "setenv update_filename ${update_kernel_filename} ; " \
- "setenv update_offset 0x800 ; " \
- "run do_update_mmc ; " \
- "setenv update_filename ${dtbfile} ; " \
- "setenv update_offset 0x400 ; " \
- "run do_update_mmc\0" \
- "update_sfkernel=" \
- "setenv update_filename fitImage ; " \
- "setenv update_offset ${sf_kernel_offset} ; " \
- "run do_update_sf\0" \
- "update_swu=" \
- "setenv update_filename ${swufile} ; " \
- "setenv update_offset ${sf_swu_offset} ; " \
- "run do_update_sf\0" \
- "addcons=" \
- "setenv bootargs ${bootargs} " \
- "console=${consdev},${baudrate}\0" \
- "addip=" \
- "setenv bootargs ${bootargs} " \
- "ip=${ipaddr}:${serverip}:${gatewayip}:" \
- "${netmask}:${hostname}:${netdev}:off\0" \
- "addmisc=" \
- "setenv bootargs ${bootargs} ${miscargs}\0" \
- "addargs=run addcons addmisc\0" \
- "mmcload=" \
- "mmc rescan ; " \
- "mmc dev 0 1 ; " \
- "mmc read ${loadaddr} 0x800 0x2000 ; " \
- "mmc read ${dtbaddr} 0x400 0x80\0" \
- "netload=" \
- "dhcp ${loadaddr} ${hostname}/${bootfile} ; " \
- "tftp ${dtbaddr} ${hostname}/${dtbfile}\0" \
- "sfload=" \
- "sf probe ; " \
- "sf read ${loadaddr} ${sf_kernel_offset} ${sf_kernel_size}\0" \
- "usbload=" \
- "usb start ; " \
- "load usb 0:1 ${loadaddr} ${bootfile}\0" \
- "miscargs=panic=1\0" \
- "mmcargs=setenv bootargs root=${rootdev} rw rootwait\0" \
- "nfsargs=" \
- "setenv bootargs root=/dev/nfs rw " \
- "nfsroot=${serverip}:${rootpath},v3,tcp\0" \
- "mmc_mmc=" \
- "if run mmcload mmcargs addargs ; then " \
- "bootm ${loadaddr} - ${dtbaddr} ; " \
- "fi\0" \
- "mmc_nfs=" \
- "if run mmcload nfsargs addip addargs ; then " \
- "bootm ${loadaddr} - ${dtbaddr} ; " \
- "fi\0" \
- "sf_mmc=" \
- "if run sfload mmcargs addargs ; then " \
- "bootm ${loadaddr} - ${dtbaddr} ; " \
- "fi\0" \
- "sf_swu=" \
- "if run sfload ; then " \
- "sf read ${rdaddr} ${sf_swu_offset} ${sf_swu_size} ; " \
- "setenv bootargs root=/dev/ram0 rw ; " \
- "run addargs ; " \
- "bootm ${loadaddr} ${rdaddr} ; " \
- "fi\0" \
- "net_mmc=" \
- "if run netload mmcargs addargs ; then " \
- "bootm ${loadaddr} - ${dtbaddr} ; " \
- "fi\0" \
- "net_nfs=" \
- "if run netload nfsargs addip addargs ; then " \
- "bootm ${loadaddr} - ${dtbaddr} ; " \
- "fi\0" \
- "prebootcmd=" \
- "if test \"${envsaved}\" != y ; then ; " \
- "setenv envsaved y ; " \
- "saveenv ; " \
- "fi ; " \
- "if test \"${bootmode}\" = normal ; then " \
- "setenv bootdelay 0 ; " \
- "setenv bootpri mmc_mmc ; " \
- "elif test \"${bootmode}\" = devel ; then " \
- "setenv bootdelay 3 ; " \
- "setenv bootpri net_mmc ; " \
- "else " \
- "if test \"${bootmode}\" != update ; then " \
- "echo Warning: unknown bootmode \"${bootmode}\" ; " \
- "fi ; " \
- "setenv bootdelay 1 ; " \
- "setenv bootpri sf_swu ; " \
- "fi\0"
-
/* The rest of the configuration is shared */
#include <configs/mxs.h>
diff --git a/include/configs/xilinx_mbv.h b/include/configs/xilinx_mbv.h
new file mode 100644
index 0000000..dba398a
--- /dev/null
+++ b/include/configs/xilinx_mbv.h
@@ -0,0 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * (C) Copyright 2023, Advanced Micro Devices, Inc.
+ *
+ * Michal Simek <michal.simek@amd.com>
+ */
diff --git a/include/console.h b/include/console.h
index ceb733b..2617e16 100644
--- a/include/console.h
+++ b/include/console.h
@@ -85,6 +85,13 @@
int console_record_avail(void);
/**
+ * console_record_isempty() - Returns if console output is empty
+ *
+ * Return: true if empty
+ */
+bool console_record_isempty(void);
+
+/**
* console_in_puts() - Write a string to the console input buffer
*
* This writes the given string to the console_in buffer which will then be
@@ -131,6 +138,12 @@
return 0;
}
+static inline bool console_record_isempty(void)
+{
+ /* Always empty */
+ return true;
+}
+
#endif /* !CONFIG_CONSOLE_RECORD */
/**
@@ -156,6 +169,16 @@
*/
void console_puts_select_stderr(bool serial_only, const char *s);
+/**
+ * console_clear() - Clear the console
+ *
+ * Uses an ANSI sequence to clear the display, failing back to clearing the
+ * video display directly if !CONFIG_VIDEO_ANSI
+ *
+ * Return: 0 if OK, -ve on error
+ */
+int console_clear(void);
+
/*
* CONSOLE multiplexing.
*/
diff --git a/include/dfu.h b/include/dfu.h
index 68b5ca4..fa1918c 100644
--- a/include/dfu.h
+++ b/include/dfu.h
@@ -10,6 +10,7 @@
#ifndef __DFU_ENTITY_H_
#define __DFU_ENTITY_H_
+#include <linux/errno.h>
#include <linux/list.h>
#include <mmc.h>
#include <spi_flash.h>
@@ -98,7 +99,12 @@
int dev_num;
};
+
+#if defined(CONFIG_DFU_NAME_MAX_SIZE)
+#define DFU_NAME_SIZE CONFIG_DFU_NAME_MAX_SIZE
+#else
#define DFU_NAME_SIZE 32
+#endif
#ifndef DFU_DEFAULT_POLL_TIMEOUT
#define DFU_DEFAULT_POLL_TIMEOUT 0
#endif
diff --git a/include/dm/pinctrl.h b/include/dm/pinctrl.h
index 70d8cc5..e41baea 100644
--- a/include/dm/pinctrl.h
+++ b/include/dm/pinctrl.h
@@ -6,6 +6,8 @@
#ifndef __PINCTRL_H
#define __PINCTRL_H
+#include <linux/errno.h>
+
#define PINNAME_SIZE 10
#define PINMUX_SIZE 90
diff --git a/include/dt-bindings/clock/imx8mp-clock.h b/include/dt-bindings/clock/imx8mp-clock.h
index 3f28ce6..7da4243 100644
--- a/include/dt-bindings/clock/imx8mp-clock.h
+++ b/include/dt-bindings/clock/imx8mp-clock.h
@@ -130,7 +130,7 @@
#define IMX8MP_CLK_SAI1 123
#define IMX8MP_CLK_SAI2 124
#define IMX8MP_CLK_SAI3 125
-#define IMX8MP_CLK_SAI4 126
+/* #define IMX8MP_CLK_SAI4 126 */
#define IMX8MP_CLK_SAI5 127
#define IMX8MP_CLK_SAI6 128
#define IMX8MP_CLK_ENET_QOS 129
@@ -376,7 +376,6 @@
#define IMX8MP_CLK_AUDIOMIX_MU2_ROOT 36
#define IMX8MP_CLK_AUDIOMIX_MU3_ROOT 37
#define IMX8MP_CLK_AUDIOMIX_EARC_PHY 38
-#define IMX8MP_CLK_AUDIOMIX_PDM_ROOT 39
#define IMX8MP_CLK_AUDIOMIX_SAI1_MCLK1_SEL 40
#define IMX8MP_CLK_AUDIOMIX_SAI1_MCLK2_SEL 41
#define IMX8MP_CLK_AUDIOMIX_SAI2_MCLK1_SEL 42
diff --git a/include/dt-bindings/clock/mediatek,mt8365-clk.h b/include/dt-bindings/clock/mediatek,mt8365-clk.h
new file mode 100644
index 0000000..e5cb8a1
--- /dev/null
+++ b/include/dt-bindings/clock/mediatek,mt8365-clk.h
@@ -0,0 +1,375 @@
+/* SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+ *
+ * Copyright (c) 2022 MediaTek Inc.
+ */
+
+#ifndef _DT_BINDINGS_CLK_MT8365_H
+#define _DT_BINDINGS_CLK_MT8365_H
+
+/* TOPCKGEN */
+#define CLK_TOP_CLK_NULL 0
+#define CLK_TOP_I2S0_BCK 1
+#define CLK_TOP_DSI0_LNTC_DSICK 2
+#define CLK_TOP_VPLL_DPIX 3
+#define CLK_TOP_LVDSTX_CLKDIG_CTS 4
+#define CLK_TOP_MFGPLL 5
+#define CLK_TOP_SYSPLL_D2 6
+#define CLK_TOP_SYSPLL1_D2 7
+#define CLK_TOP_SYSPLL1_D4 8
+#define CLK_TOP_SYSPLL1_D8 9
+#define CLK_TOP_SYSPLL1_D16 10
+#define CLK_TOP_SYSPLL_D3 11
+#define CLK_TOP_SYSPLL2_D2 12
+#define CLK_TOP_SYSPLL2_D4 13
+#define CLK_TOP_SYSPLL2_D8 14
+#define CLK_TOP_SYSPLL_D5 15
+#define CLK_TOP_SYSPLL3_D2 16
+#define CLK_TOP_SYSPLL3_D4 17
+#define CLK_TOP_SYSPLL_D7 18
+#define CLK_TOP_SYSPLL4_D2 19
+#define CLK_TOP_SYSPLL4_D4 20
+#define CLK_TOP_UNIVPLL 21
+#define CLK_TOP_UNIVPLL_D2 22
+#define CLK_TOP_UNIVPLL1_D2 23
+#define CLK_TOP_UNIVPLL1_D4 24
+#define CLK_TOP_UNIVPLL_D3 25
+#define CLK_TOP_UNIVPLL2_D2 26
+#define CLK_TOP_UNIVPLL2_D4 27
+#define CLK_TOP_UNIVPLL2_D8 28
+#define CLK_TOP_UNIVPLL2_D32 29
+#define CLK_TOP_UNIVPLL_D5 30
+#define CLK_TOP_UNIVPLL3_D2 31
+#define CLK_TOP_UNIVPLL3_D4 32
+#define CLK_TOP_MMPLL 33
+#define CLK_TOP_MMPLL_D2 34
+#define CLK_TOP_LVDSPLL_D2 35
+#define CLK_TOP_LVDSPLL_D4 36
+#define CLK_TOP_LVDSPLL_D8 37
+#define CLK_TOP_LVDSPLL_D16 38
+#define CLK_TOP_USB20_192M 39
+#define CLK_TOP_USB20_192M_D4 40
+#define CLK_TOP_USB20_192M_D8 41
+#define CLK_TOP_USB20_192M_D16 42
+#define CLK_TOP_USB20_192M_D32 43
+#define CLK_TOP_APLL1 44
+#define CLK_TOP_APLL1_D2 45
+#define CLK_TOP_APLL1_D4 46
+#define CLK_TOP_APLL1_D8 47
+#define CLK_TOP_APLL2 48
+#define CLK_TOP_APLL2_D2 49
+#define CLK_TOP_APLL2_D4 50
+#define CLK_TOP_APLL2_D8 51
+#define CLK_TOP_SYS_26M_D2 52
+#define CLK_TOP_MSDCPLL 53
+#define CLK_TOP_MSDCPLL_D2 54
+#define CLK_TOP_DSPPLL 55
+#define CLK_TOP_DSPPLL_D2 56
+#define CLK_TOP_DSPPLL_D4 57
+#define CLK_TOP_DSPPLL_D8 58
+#define CLK_TOP_APUPLL 59
+#define CLK_TOP_CLK26M_D52 60
+#define CLK_TOP_AXI_SEL 61
+#define CLK_TOP_MEM_SEL 62
+#define CLK_TOP_MM_SEL 63
+#define CLK_TOP_SCP_SEL 64
+#define CLK_TOP_MFG_SEL 65
+#define CLK_TOP_ATB_SEL 66
+#define CLK_TOP_CAMTG_SEL 67
+#define CLK_TOP_CAMTG1_SEL 68
+#define CLK_TOP_UART_SEL 69
+#define CLK_TOP_SPI_SEL 70
+#define CLK_TOP_MSDC50_0_HC_SEL 71
+#define CLK_TOP_MSDC2_2_HC_SEL 72
+#define CLK_TOP_MSDC50_0_SEL 73
+#define CLK_TOP_MSDC50_2_SEL 74
+#define CLK_TOP_MSDC30_1_SEL 75
+#define CLK_TOP_AUDIO_SEL 76
+#define CLK_TOP_AUD_INTBUS_SEL 77
+#define CLK_TOP_AUD_1_SEL 78
+#define CLK_TOP_AUD_2_SEL 79
+#define CLK_TOP_AUD_ENGEN1_SEL 80
+#define CLK_TOP_AUD_ENGEN2_SEL 81
+#define CLK_TOP_AUD_SPDIF_SEL 82
+#define CLK_TOP_DISP_PWM_SEL 83
+#define CLK_TOP_DXCC_SEL 84
+#define CLK_TOP_SSUSB_SYS_SEL 85
+#define CLK_TOP_SSUSB_XHCI_SEL 86
+#define CLK_TOP_SPM_SEL 87
+#define CLK_TOP_I2C_SEL 88
+#define CLK_TOP_PWM_SEL 89
+#define CLK_TOP_SENIF_SEL 90
+#define CLK_TOP_AES_FDE_SEL 91
+#define CLK_TOP_CAMTM_SEL 92
+#define CLK_TOP_DPI0_SEL 93
+#define CLK_TOP_DPI1_SEL 94
+#define CLK_TOP_DSP_SEL 95
+#define CLK_TOP_NFI2X_SEL 96
+#define CLK_TOP_NFIECC_SEL 97
+#define CLK_TOP_ECC_SEL 98
+#define CLK_TOP_ETH_SEL 99
+#define CLK_TOP_GCPU_SEL 100
+#define CLK_TOP_GCPU_CPM_SEL 101
+#define CLK_TOP_APU_SEL 102
+#define CLK_TOP_APU_IF_SEL 103
+#define CLK_TOP_MBIST_DIAG_SEL 104
+#define CLK_TOP_APLL_I2S0_SEL 105
+#define CLK_TOP_APLL_I2S1_SEL 106
+#define CLK_TOP_APLL_I2S2_SEL 107
+#define CLK_TOP_APLL_I2S3_SEL 108
+#define CLK_TOP_APLL_TDMOUT_SEL 109
+#define CLK_TOP_APLL_TDMIN_SEL 110
+#define CLK_TOP_APLL_SPDIF_SEL 111
+#define CLK_TOP_APLL12_CK_DIV0 112
+#define CLK_TOP_APLL12_CK_DIV1 113
+#define CLK_TOP_APLL12_CK_DIV2 114
+#define CLK_TOP_APLL12_CK_DIV3 115
+#define CLK_TOP_APLL12_CK_DIV4 116
+#define CLK_TOP_APLL12_CK_DIV4B 117
+#define CLK_TOP_APLL12_CK_DIV5 118
+#define CLK_TOP_APLL12_CK_DIV5B 119
+#define CLK_TOP_APLL12_CK_DIV6 120
+#define CLK_TOP_AUD_I2S0_M 121
+#define CLK_TOP_AUD_I2S1_M 122
+#define CLK_TOP_AUD_I2S2_M 123
+#define CLK_TOP_AUD_I2S3_M 124
+#define CLK_TOP_AUD_TDMOUT_M 125
+#define CLK_TOP_AUD_TDMOUT_B 126
+#define CLK_TOP_AUD_TDMIN_M 127
+#define CLK_TOP_AUD_TDMIN_B 128
+#define CLK_TOP_AUD_SPDIF_M 129
+#define CLK_TOP_USB20_48M_EN 130
+#define CLK_TOP_UNIVPLL_48M_EN 131
+#define CLK_TOP_LVDSTX_CLKDIG_EN 132
+#define CLK_TOP_VPLL_DPIX_EN 133
+#define CLK_TOP_SSUSB_TOP_CK_EN 134
+#define CLK_TOP_SSUSB_PHY_CK_EN 135
+#define CLK_TOP_CONN_32K 136
+#define CLK_TOP_CONN_26M 137
+#define CLK_TOP_DSP_32K 138
+#define CLK_TOP_DSP_26M 139
+#define CLK_TOP_NR_CLK 140
+#define CLK_TOP_CLK26M 141
+#define CLK_TOP_CLK32K 142
+
+/* INFRACFG */
+#define CLK_IFR_PMIC_TMR 0
+#define CLK_IFR_PMIC_AP 1
+#define CLK_IFR_PMIC_MD 2
+#define CLK_IFR_PMIC_CONN 3
+#define CLK_IFR_ICUSB 4
+#define CLK_IFR_GCE 5
+#define CLK_IFR_THERM 6
+#define CLK_IFR_PWM_HCLK 7
+#define CLK_IFR_PWM1 8
+#define CLK_IFR_PWM2 9
+#define CLK_IFR_PWM3 10
+#define CLK_IFR_PWM4 11
+#define CLK_IFR_PWM5 12
+#define CLK_IFR_PWM 13
+#define CLK_IFR_UART0 14
+#define CLK_IFR_UART1 15
+#define CLK_IFR_UART2 16
+#define CLK_IFR_DSP_UART 17
+#define CLK_IFR_GCE_26M 18
+#define CLK_IFR_CQ_DMA_FPC 19
+#define CLK_IFR_BTIF 20
+#define CLK_IFR_SPI0 21
+#define CLK_IFR_MSDC0_HCLK 22
+#define CLK_IFR_MSDC2_HCLK 23
+#define CLK_IFR_MSDC1_HCLK 24
+#define CLK_IFR_DVFSRC 25
+#define CLK_IFR_GCPU 26
+#define CLK_IFR_TRNG 27
+#define CLK_IFR_AUXADC 28
+#define CLK_IFR_CPUM 29
+#define CLK_IFR_AUXADC_MD 30
+#define CLK_IFR_AP_DMA 31
+#define CLK_IFR_DEBUGSYS 32
+#define CLK_IFR_AUDIO 33
+#define CLK_IFR_PWM_FBCLK6 34
+#define CLK_IFR_DISP_PWM 35
+#define CLK_IFR_AUD_26M_BK 36
+#define CLK_IFR_CQ_DMA 37
+#define CLK_IFR_MSDC0_SF 38
+#define CLK_IFR_MSDC1_SF 39
+#define CLK_IFR_MSDC2_SF 40
+#define CLK_IFR_AP_MSDC0 41
+#define CLK_IFR_MD_MSDC0 42
+#define CLK_IFR_MSDC0_SRC 43
+#define CLK_IFR_MSDC1_SRC 44
+#define CLK_IFR_MSDC2_SRC 45
+#define CLK_IFR_PWRAP_TMR 46
+#define CLK_IFR_PWRAP_SPI 47
+#define CLK_IFR_PWRAP_SYS 48
+#define CLK_IFR_MCU_PM_BK 49
+#define CLK_IFR_IRRX_26M 50
+#define CLK_IFR_IRRX_32K 51
+#define CLK_IFR_I2C0_AXI 52
+#define CLK_IFR_I2C1_AXI 53
+#define CLK_IFR_I2C2_AXI 54
+#define CLK_IFR_I2C3_AXI 55
+#define CLK_IFR_NIC_AXI 56
+#define CLK_IFR_NIC_SLV_AXI 57
+#define CLK_IFR_APU_AXI 58
+#define CLK_IFR_NFIECC 59
+#define CLK_IFR_NFIECC_BK 60
+#define CLK_IFR_NFI1X_BK 61
+#define CLK_IFR_NFI_BK 62
+#define CLK_IFR_MSDC2_AP_BK 63
+#define CLK_IFR_MSDC2_MD_BK 64
+#define CLK_IFR_MSDC2_BK 65
+#define CLK_IFR_SUSB_133_BK 66
+#define CLK_IFR_SUSB_66_BK 67
+#define CLK_IFR_SSUSB_SYS 68
+#define CLK_IFR_SSUSB_REF 69
+#define CLK_IFR_SSUSB_XHCI 70
+#define CLK_IFR_NR_CLK 71
+
+/* PERICFG */
+#define CLK_PERIAXI 0
+#define CLK_PERI_NR_CLK 1
+
+/* APMIXEDSYS */
+#define CLK_APMIXED_ARMPLL 0
+#define CLK_APMIXED_MAINPLL 1
+#define CLK_APMIXED_UNIVPLL 2
+#define CLK_APMIXED_MFGPLL 3
+#define CLK_APMIXED_MSDCPLL 4
+#define CLK_APMIXED_MMPLL 5
+#define CLK_APMIXED_APLL1 6
+#define CLK_APMIXED_APLL2 7
+#define CLK_APMIXED_LVDSPLL 8
+#define CLK_APMIXED_DSPPLL 9
+#define CLK_APMIXED_APUPLL 10
+#define CLK_APMIXED_UNIV_EN 11
+#define CLK_APMIXED_USB20_EN 12
+#define CLK_APMIXED_NR_CLK 13
+
+/* GCE */
+#define CLK_GCE_FAXI 0
+#define CLK_GCE_NR_CLK 1
+
+/* AUDIOTOP */
+#define CLK_AUD_AFE 0
+#define CLK_AUD_I2S 1
+#define CLK_AUD_22M 2
+#define CLK_AUD_24M 3
+#define CLK_AUD_INTDIR 4
+#define CLK_AUD_APLL2_TUNER 5
+#define CLK_AUD_APLL_TUNER 6
+#define CLK_AUD_SPDF 7
+#define CLK_AUD_HDMI 8
+#define CLK_AUD_HDMI_IN 9
+#define CLK_AUD_ADC 10
+#define CLK_AUD_DAC 11
+#define CLK_AUD_DAC_PREDIS 12
+#define CLK_AUD_TML 13
+#define CLK_AUD_I2S1_BK 14
+#define CLK_AUD_I2S2_BK 15
+#define CLK_AUD_I2S3_BK 16
+#define CLK_AUD_I2S4_BK 17
+#define CLK_AUD_NR_CLK 18
+
+/* MIPI_CSI0A */
+#define CLK_MIPI0A_CSR_CSI_EN_0A 0
+#define CLK_MIPI_RX_ANA_CSI0A_NR_CLK 1
+
+/* MIPI_CSI0B */
+#define CLK_MIPI0B_CSR_CSI_EN_0B 0
+#define CLK_MIPI_RX_ANA_CSI0B_NR_CLK 1
+
+/* MIPI_CSI1A */
+#define CLK_MIPI1A_CSR_CSI_EN_1A 0
+#define CLK_MIPI_RX_ANA_CSI1A_NR_CLK 1
+
+/* MIPI_CSI1B */
+#define CLK_MIPI1B_CSR_CSI_EN_1B 0
+#define CLK_MIPI_RX_ANA_CSI1B_NR_CLK 1
+
+/* MIPI_CSI2A */
+#define CLK_MIPI2A_CSR_CSI_EN_2A 0
+#define CLK_MIPI_RX_ANA_CSI2A_NR_CLK 1
+
+/* MIPI_CSI2B */
+#define CLK_MIPI2B_CSR_CSI_EN_2B 0
+#define CLK_MIPI_RX_ANA_CSI2B_NR_CLK 1
+
+/* MCUCFG */
+#define CLK_MCU_BUS_SEL 0
+#define CLK_MCU_NR_CLK 1
+
+/* MFGCFG */
+#define CLK_MFG_BG3D 0
+#define CLK_MFG_MBIST_DIAG 1
+#define CLK_MFG_NR_CLK 2
+
+/* MMSYS */
+#define CLK_MM_MM_MDP_RDMA0 0
+#define CLK_MM_MM_MDP_CCORR0 1
+#define CLK_MM_MM_MDP_RSZ0 2
+#define CLK_MM_MM_MDP_RSZ1 3
+#define CLK_MM_MM_MDP_TDSHP0 4
+#define CLK_MM_MM_MDP_WROT0 5
+#define CLK_MM_MM_MDP_WDMA0 6
+#define CLK_MM_MM_DISP_OVL0 7
+#define CLK_MM_MM_DISP_OVL0_2L 8
+#define CLK_MM_MM_DISP_RSZ0 9
+#define CLK_MM_MM_DISP_RDMA0 10
+#define CLK_MM_MM_DISP_WDMA0 11
+#define CLK_MM_MM_DISP_COLOR0 12
+#define CLK_MM_MM_DISP_CCORR0 13
+#define CLK_MM_MM_DISP_AAL0 14
+#define CLK_MM_MM_DISP_GAMMA0 15
+#define CLK_MM_MM_DISP_DITHER0 16
+#define CLK_MM_MM_DSI0 17
+#define CLK_MM_MM_DISP_RDMA1 18
+#define CLK_MM_MM_MDP_RDMA1 19
+#define CLK_MM_DPI0_DPI0 20
+#define CLK_MM_MM_FAKE 21
+#define CLK_MM_MM_SMI_COMMON 22
+#define CLK_MM_MM_SMI_LARB0 23
+#define CLK_MM_MM_SMI_COMM0 24
+#define CLK_MM_MM_SMI_COMM1 25
+#define CLK_MM_MM_CAM_MDP 26
+#define CLK_MM_MM_SMI_IMG 27
+#define CLK_MM_MM_SMI_CAM 28
+#define CLK_MM_IMG_IMG_DL_RELAY 29
+#define CLK_MM_IMG_IMG_DL_ASYNC_TOP 30
+#define CLK_MM_DSI0_DIG_DSI 31
+#define CLK_MM_26M_HRTWT 32
+#define CLK_MM_MM_DPI0 33
+#define CLK_MM_LVDSTX_PXL 34
+#define CLK_MM_LVDSTX_CTS 35
+#define CLK_MM_NR_CLK 36
+
+/* IMGSYS */
+#define CLK_CAM_LARB2 0
+#define CLK_CAM 1
+#define CLK_CAMTG 2
+#define CLK_CAM_SENIF 3
+#define CLK_CAMSV0 4
+#define CLK_CAMSV1 5
+#define CLK_CAM_FDVT 6
+#define CLK_CAM_WPE 7
+#define CLK_CAM_NR_CLK 8
+
+/* VDECSYS */
+#define CLK_VDEC_VDEC 0
+#define CLK_VDEC_LARB1 1
+#define CLK_VDEC_NR_CLK 2
+
+/* VENCSYS */
+#define CLK_VENC 0
+#define CLK_VENC_JPGENC 1
+#define CLK_VENC_NR_CLK 2
+
+/* APUSYS */
+#define CLK_APU_IPU_CK 0
+#define CLK_APU_AXI 1
+#define CLK_APU_JTAG 2
+#define CLK_APU_IF_CK 3
+#define CLK_APU_EDMA 4
+#define CLK_APU_AHB 5
+#define CLK_APU_NR_CLK 6
+
+#endif /* _DT_BINDINGS_CLK_MT8365_H */
diff --git a/include/dt-bindings/clock/qcom,gcc-ipq4019.h b/include/dt-bindings/clock/qcom,gcc-ipq4019.h
new file mode 100644
index 0000000..7e8a7be
--- /dev/null
+++ b/include/dt-bindings/clock/qcom,gcc-ipq4019.h
@@ -0,0 +1,169 @@
+/* Copyright (c) 2015 The Linux Foundation. All rights reserved.
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ *
+ */
+#ifndef __QCOM_CLK_IPQ4019_H__
+#define __QCOM_CLK_IPQ4019_H__
+
+#define GCC_DUMMY_CLK 0
+#define AUDIO_CLK_SRC 1
+#define BLSP1_QUP1_I2C_APPS_CLK_SRC 2
+#define BLSP1_QUP1_SPI_APPS_CLK_SRC 3
+#define BLSP1_QUP2_I2C_APPS_CLK_SRC 4
+#define BLSP1_QUP2_SPI_APPS_CLK_SRC 5
+#define BLSP1_UART1_APPS_CLK_SRC 6
+#define BLSP1_UART2_APPS_CLK_SRC 7
+#define GCC_USB3_MOCK_UTMI_CLK_SRC 8
+#define GCC_APPS_CLK_SRC 9
+#define GCC_APPS_AHB_CLK_SRC 10
+#define GP1_CLK_SRC 11
+#define GP2_CLK_SRC 12
+#define GP3_CLK_SRC 13
+#define SDCC1_APPS_CLK_SRC 14
+#define FEPHY_125M_DLY_CLK_SRC 15
+#define WCSS2G_CLK_SRC 16
+#define WCSS5G_CLK_SRC 17
+#define GCC_APSS_AHB_CLK 18
+#define GCC_AUDIO_AHB_CLK 19
+#define GCC_AUDIO_PWM_CLK 20
+#define GCC_BLSP1_AHB_CLK 21
+#define GCC_BLSP1_QUP1_I2C_APPS_CLK 22
+#define GCC_BLSP1_QUP1_SPI_APPS_CLK 23
+#define GCC_BLSP1_QUP2_I2C_APPS_CLK 24
+#define GCC_BLSP1_QUP2_SPI_APPS_CLK 25
+#define GCC_BLSP1_UART1_APPS_CLK 26
+#define GCC_BLSP1_UART2_APPS_CLK 27
+#define GCC_DCD_XO_CLK 28
+#define GCC_GP1_CLK 29
+#define GCC_GP2_CLK 30
+#define GCC_GP3_CLK 31
+#define GCC_BOOT_ROM_AHB_CLK 32
+#define GCC_CRYPTO_AHB_CLK 33
+#define GCC_CRYPTO_AXI_CLK 34
+#define GCC_CRYPTO_CLK 35
+#define GCC_ESS_CLK 36
+#define GCC_IMEM_AXI_CLK 37
+#define GCC_IMEM_CFG_AHB_CLK 38
+#define GCC_PCIE_AHB_CLK 39
+#define GCC_PCIE_AXI_M_CLK 40
+#define GCC_PCIE_AXI_S_CLK 41
+#define GCC_PCNOC_AHB_CLK 42
+#define GCC_PRNG_AHB_CLK 43
+#define GCC_QPIC_AHB_CLK 44
+#define GCC_QPIC_CLK 45
+#define GCC_SDCC1_AHB_CLK 46
+#define GCC_SDCC1_APPS_CLK 47
+#define GCC_SNOC_PCNOC_AHB_CLK 48
+#define GCC_SYS_NOC_125M_CLK 49
+#define GCC_SYS_NOC_AXI_CLK 50
+#define GCC_TCSR_AHB_CLK 51
+#define GCC_TLMM_AHB_CLK 52
+#define GCC_USB2_MASTER_CLK 53
+#define GCC_USB2_SLEEP_CLK 54
+#define GCC_USB2_MOCK_UTMI_CLK 55
+#define GCC_USB3_MASTER_CLK 56
+#define GCC_USB3_SLEEP_CLK 57
+#define GCC_USB3_MOCK_UTMI_CLK 58
+#define GCC_WCSS2G_CLK 59
+#define GCC_WCSS2G_REF_CLK 60
+#define GCC_WCSS2G_RTC_CLK 61
+#define GCC_WCSS5G_CLK 62
+#define GCC_WCSS5G_REF_CLK 63
+#define GCC_WCSS5G_RTC_CLK 64
+#define GCC_APSS_DDRPLL_VCO 65
+#define GCC_SDCC_PLLDIV_CLK 66
+#define GCC_FEPLL_VCO 67
+#define GCC_FEPLL125_CLK 68
+#define GCC_FEPLL125DLY_CLK 69
+#define GCC_FEPLL200_CLK 70
+#define GCC_FEPLL500_CLK 71
+#define GCC_FEPLL_WCSS2G_CLK 72
+#define GCC_FEPLL_WCSS5G_CLK 73
+#define GCC_APSS_CPU_PLLDIV_CLK 74
+#define GCC_PCNOC_AHB_CLK_SRC 75
+
+#define WIFI0_CPU_INIT_RESET 0
+#define WIFI0_RADIO_SRIF_RESET 1
+#define WIFI0_RADIO_WARM_RESET 2
+#define WIFI0_RADIO_COLD_RESET 3
+#define WIFI0_CORE_WARM_RESET 4
+#define WIFI0_CORE_COLD_RESET 5
+#define WIFI1_CPU_INIT_RESET 6
+#define WIFI1_RADIO_SRIF_RESET 7
+#define WIFI1_RADIO_WARM_RESET 8
+#define WIFI1_RADIO_COLD_RESET 9
+#define WIFI1_CORE_WARM_RESET 10
+#define WIFI1_CORE_COLD_RESET 11
+#define USB3_UNIPHY_PHY_ARES 12
+#define USB3_HSPHY_POR_ARES 13
+#define USB3_HSPHY_S_ARES 14
+#define USB2_HSPHY_POR_ARES 15
+#define USB2_HSPHY_S_ARES 16
+#define PCIE_PHY_AHB_ARES 17
+#define PCIE_AHB_ARES 18
+#define PCIE_PWR_ARES 19
+#define PCIE_PIPE_STICKY_ARES 20
+#define PCIE_AXI_M_STICKY_ARES 21
+#define PCIE_PHY_ARES 22
+#define PCIE_PARF_XPU_ARES 23
+#define PCIE_AXI_S_XPU_ARES 24
+#define PCIE_AXI_M_VMIDMT_ARES 25
+#define PCIE_PIPE_ARES 26
+#define PCIE_AXI_S_ARES 27
+#define PCIE_AXI_M_ARES 28
+#define ESS_RESET 29
+#define GCC_BLSP1_BCR 30
+#define GCC_BLSP1_QUP1_BCR 31
+#define GCC_BLSP1_UART1_BCR 32
+#define GCC_BLSP1_QUP2_BCR 33
+#define GCC_BLSP1_UART2_BCR 34
+#define GCC_BIMC_BCR 35
+#define GCC_TLMM_BCR 36
+#define GCC_IMEM_BCR 37
+#define GCC_ESS_BCR 38
+#define GCC_PRNG_BCR 39
+#define GCC_BOOT_ROM_BCR 40
+#define GCC_CRYPTO_BCR 41
+#define GCC_SDCC1_BCR 42
+#define GCC_SEC_CTRL_BCR 43
+#define GCC_AUDIO_BCR 44
+#define GCC_QPIC_BCR 45
+#define GCC_PCIE_BCR 46
+#define GCC_USB2_BCR 47
+#define GCC_USB2_PHY_BCR 48
+#define GCC_USB3_BCR 49
+#define GCC_USB3_PHY_BCR 50
+#define GCC_SYSTEM_NOC_BCR 51
+#define GCC_PCNOC_BCR 52
+#define GCC_DCD_BCR 53
+#define GCC_SNOC_BUS_TIMEOUT0_BCR 54
+#define GCC_SNOC_BUS_TIMEOUT1_BCR 55
+#define GCC_SNOC_BUS_TIMEOUT2_BCR 56
+#define GCC_SNOC_BUS_TIMEOUT3_BCR 57
+#define GCC_PCNOC_BUS_TIMEOUT0_BCR 58
+#define GCC_PCNOC_BUS_TIMEOUT1_BCR 59
+#define GCC_PCNOC_BUS_TIMEOUT2_BCR 60
+#define GCC_PCNOC_BUS_TIMEOUT3_BCR 61
+#define GCC_PCNOC_BUS_TIMEOUT4_BCR 62
+#define GCC_PCNOC_BUS_TIMEOUT5_BCR 63
+#define GCC_PCNOC_BUS_TIMEOUT6_BCR 64
+#define GCC_PCNOC_BUS_TIMEOUT7_BCR 65
+#define GCC_PCNOC_BUS_TIMEOUT8_BCR 66
+#define GCC_PCNOC_BUS_TIMEOUT9_BCR 67
+#define GCC_TCSR_BCR 68
+#define GCC_QDSS_BCR 69
+#define GCC_MPM_BCR 70
+#define GCC_SPDM_BCR 71
+
+#endif
diff --git a/include/dt-bindings/clock/qcom,ipq4019-gcc.h b/include/dt-bindings/clock/qcom,ipq4019-gcc.h
deleted file mode 100644
index 7130e22..0000000
--- a/include/dt-bindings/clock/qcom,ipq4019-gcc.h
+++ /dev/null
@@ -1,96 +0,0 @@
-/* Copyright (c) 2015 The Linux Foundation. All rights reserved.
- *
- * Permission to use, copy, modify, and/or distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- *
- */
-#ifndef __QCOM_CLK_IPQ4019_H__
-#define __QCOM_CLK_IPQ4019_H__
-
-#define GCC_DUMMY_CLK 0
-#define AUDIO_CLK_SRC 1
-#define BLSP1_QUP1_I2C_APPS_CLK_SRC 2
-#define BLSP1_QUP1_SPI_APPS_CLK_SRC 3
-#define BLSP1_QUP2_I2C_APPS_CLK_SRC 4
-#define BLSP1_QUP2_SPI_APPS_CLK_SRC 5
-#define BLSP1_UART1_APPS_CLK_SRC 6
-#define BLSP1_UART2_APPS_CLK_SRC 7
-#define GCC_USB3_MOCK_UTMI_CLK_SRC 8
-#define GCC_APPS_CLK_SRC 9
-#define GCC_APPS_AHB_CLK_SRC 10
-#define GP1_CLK_SRC 11
-#define GP2_CLK_SRC 12
-#define GP3_CLK_SRC 13
-#define SDCC1_APPS_CLK_SRC 14
-#define FEPHY_125M_DLY_CLK_SRC 15
-#define WCSS2G_CLK_SRC 16
-#define WCSS5G_CLK_SRC 17
-#define GCC_APSS_AHB_CLK 18
-#define GCC_AUDIO_AHB_CLK 19
-#define GCC_AUDIO_PWM_CLK 20
-#define GCC_BLSP1_AHB_CLK 21
-#define GCC_BLSP1_QUP1_I2C_APPS_CLK 22
-#define GCC_BLSP1_QUP1_SPI_APPS_CLK 23
-#define GCC_BLSP1_QUP2_I2C_APPS_CLK 24
-#define GCC_BLSP1_QUP2_SPI_APPS_CLK 25
-#define GCC_BLSP1_UART1_APPS_CLK 26
-#define GCC_BLSP1_UART2_APPS_CLK 27
-#define GCC_DCD_XO_CLK 28
-#define GCC_GP1_CLK 29
-#define GCC_GP2_CLK 30
-#define GCC_GP3_CLK 31
-#define GCC_BOOT_ROM_AHB_CLK 32
-#define GCC_CRYPTO_AHB_CLK 33
-#define GCC_CRYPTO_AXI_CLK 34
-#define GCC_CRYPTO_CLK 35
-#define GCC_ESS_CLK 36
-#define GCC_IMEM_AXI_CLK 37
-#define GCC_IMEM_CFG_AHB_CLK 38
-#define GCC_PCIE_AHB_CLK 39
-#define GCC_PCIE_AXI_M_CLK 40
-#define GCC_PCIE_AXI_S_CLK 41
-#define GCC_PCNOC_AHB_CLK 42
-#define GCC_PRNG_AHB_CLK 43
-#define GCC_QPIC_AHB_CLK 44
-#define GCC_QPIC_CLK 45
-#define GCC_SDCC1_AHB_CLK 46
-#define GCC_SDCC1_APPS_CLK 47
-#define GCC_SNOC_PCNOC_AHB_CLK 48
-#define GCC_SYS_NOC_125M_CLK 49
-#define GCC_SYS_NOC_AXI_CLK 50
-#define GCC_TCSR_AHB_CLK 51
-#define GCC_TLMM_AHB_CLK 52
-#define GCC_USB2_MASTER_CLK 53
-#define GCC_USB2_SLEEP_CLK 54
-#define GCC_USB2_MOCK_UTMI_CLK 55
-#define GCC_USB3_MASTER_CLK 56
-#define GCC_USB3_SLEEP_CLK 57
-#define GCC_USB3_MOCK_UTMI_CLK 58
-#define GCC_WCSS2G_CLK 59
-#define GCC_WCSS2G_REF_CLK 60
-#define GCC_WCSS2G_RTC_CLK 61
-#define GCC_WCSS5G_CLK 62
-#define GCC_WCSS5G_REF_CLK 63
-#define GCC_WCSS5G_RTC_CLK 64
-#define GCC_APSS_DDRPLL_VCO 65
-#define GCC_SDCC_PLLDIV_CLK 66
-#define GCC_FEPLL_VCO 67
-#define GCC_FEPLL125_CLK 68
-#define GCC_FEPLL125DLY_CLK 69
-#define GCC_FEPLL200_CLK 70
-#define GCC_FEPLL500_CLK 71
-#define GCC_FEPLL_WCSS2G_CLK 72
-#define GCC_FEPLL_WCSS5G_CLK 73
-#define GCC_APSS_CPU_PLLDIV_CLK 74
-#define GCC_PCNOC_AHB_CLK_SRC 75
-
-#endif
diff --git a/include/dt-bindings/phy/nuvoton,npcm-usbphy.h b/include/dt-bindings/phy/nuvoton,npcm-usbphy.h
new file mode 100644
index 0000000..46946d3
--- /dev/null
+++ b/include/dt-bindings/phy/nuvoton,npcm-usbphy.h
@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+// Copyright (c) 2023 Nuvoton Technology corporation.
+
+#ifndef _DT_BINDINGS_NPCM_USBPHY_H
+#define _DT_BINDINGS_NPCM_USBPHY_H
+
+#define NPCM_UDC0_7 0
+#define NPCM_UDC8 1
+#define NPCM_UDC9 2
+#define NPCM_USBH1 3
+#define NPCM_USBH2 4
+#define NPCM_MAX_USB_CTRL_ID 4
+
+#endif
diff --git a/include/dt-bindings/pinctrl/mt8365-pinfunc.h b/include/dt-bindings/pinctrl/mt8365-pinfunc.h
new file mode 100644
index 0000000..e2ec8af
--- /dev/null
+++ b/include/dt-bindings/pinctrl/mt8365-pinfunc.h
@@ -0,0 +1,858 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021 MediaTek Inc.
+ */
+#ifndef __MT8365_PINFUNC_H
+#define __MT8365_PINFUNC_H
+
+#include <dt-bindings/pinctrl/mt65xx.h>
+
+#define MT8365_PIN_0_GPIO0__FUNC_GPIO0 (MTK_PIN_NO(0) | 0)
+#define MT8365_PIN_0_GPIO0__FUNC_DPI_D0 (MTK_PIN_NO(0) | 1)
+#define MT8365_PIN_0_GPIO0__FUNC_PWM_A (MTK_PIN_NO(0) | 2)
+#define MT8365_PIN_0_GPIO0__FUNC_I2S2_BCK (MTK_PIN_NO(0) | 3)
+#define MT8365_PIN_0_GPIO0__FUNC_EXT_TXD0 (MTK_PIN_NO(0) | 4)
+#define MT8365_PIN_0_GPIO0__FUNC_CONN_MCU_TDO (MTK_PIN_NO(0) | 5)
+#define MT8365_PIN_0_GPIO0__FUNC_DBG_MON_A0 (MTK_PIN_NO(0) | 7)
+
+#define MT8365_PIN_1_GPIO1__FUNC_GPIO1 (MTK_PIN_NO(1) | 0)
+#define MT8365_PIN_1_GPIO1__FUNC_DPI_D1 (MTK_PIN_NO(1) | 1)
+#define MT8365_PIN_1_GPIO1__FUNC_PWM_B (MTK_PIN_NO(1) | 2)
+#define MT8365_PIN_1_GPIO1__FUNC_I2S2_LRCK (MTK_PIN_NO(1) | 3)
+#define MT8365_PIN_1_GPIO1__FUNC_EXT_TXD1 (MTK_PIN_NO(1) | 4)
+#define MT8365_PIN_1_GPIO1__FUNC_CONN_MCU_DBGACK_N (MTK_PIN_NO(1) | 5)
+#define MT8365_PIN_1_GPIO1__FUNC_DBG_MON_A1 (MTK_PIN_NO(1) | 7)
+
+#define MT8365_PIN_2_GPIO2__FUNC_GPIO2 (MTK_PIN_NO(2) | 0)
+#define MT8365_PIN_2_GPIO2__FUNC_DPI_D2 (MTK_PIN_NO(2) | 1)
+#define MT8365_PIN_2_GPIO2__FUNC_PWM_C (MTK_PIN_NO(2) | 2)
+#define MT8365_PIN_2_GPIO2__FUNC_I2S2_MCK (MTK_PIN_NO(2) | 3)
+#define MT8365_PIN_2_GPIO2__FUNC_EXT_TXD2 (MTK_PIN_NO(2) | 4)
+#define MT8365_PIN_2_GPIO2__FUNC_CONN_MCU_DBGI_N (MTK_PIN_NO(2) | 5)
+#define MT8365_PIN_2_GPIO2__FUNC_DBG_MON_A2 (MTK_PIN_NO(2) | 7)
+
+#define MT8365_PIN_3_GPIO3__FUNC_GPIO3 (MTK_PIN_NO(3) | 0)
+#define MT8365_PIN_3_GPIO3__FUNC_DPI_D3 (MTK_PIN_NO(3) | 1)
+#define MT8365_PIN_3_GPIO3__FUNC_CLKM0 (MTK_PIN_NO(3) | 2)
+#define MT8365_PIN_3_GPIO3__FUNC_I2S2_DI (MTK_PIN_NO(3) | 3)
+#define MT8365_PIN_3_GPIO3__FUNC_EXT_TXD3 (MTK_PIN_NO(3) | 4)
+#define MT8365_PIN_3_GPIO3__FUNC_CONN_MCU_TCK (MTK_PIN_NO(3) | 5)
+#define MT8365_PIN_3_GPIO3__FUNC_CONN_MCU_AICE_TCKC (MTK_PIN_NO(3) | 6)
+#define MT8365_PIN_3_GPIO3__FUNC_DBG_MON_A3 (MTK_PIN_NO(3) | 7)
+
+#define MT8365_PIN_4_GPIO4__FUNC_GPIO4 (MTK_PIN_NO(4) | 0)
+#define MT8365_PIN_4_GPIO4__FUNC_DPI_D4 (MTK_PIN_NO(4) | 1)
+#define MT8365_PIN_4_GPIO4__FUNC_CLKM1 (MTK_PIN_NO(4) | 2)
+#define MT8365_PIN_4_GPIO4__FUNC_I2S1_BCK (MTK_PIN_NO(4) | 3)
+#define MT8365_PIN_4_GPIO4__FUNC_EXT_TXC (MTK_PIN_NO(4) | 4)
+#define MT8365_PIN_4_GPIO4__FUNC_CONN_MCU_TDI (MTK_PIN_NO(4) | 5)
+#define MT8365_PIN_4_GPIO4__FUNC_VDEC_TEST_CK (MTK_PIN_NO(4) | 6)
+#define MT8365_PIN_4_GPIO4__FUNC_DBG_MON_A4 (MTK_PIN_NO(4) | 7)
+
+#define MT8365_PIN_5_GPIO5__FUNC_GPIO5 (MTK_PIN_NO(5) | 0)
+#define MT8365_PIN_5_GPIO5__FUNC_DPI_D5 (MTK_PIN_NO(5) | 1)
+#define MT8365_PIN_5_GPIO5__FUNC_CLKM2 (MTK_PIN_NO(5) | 2)
+#define MT8365_PIN_5_GPIO5__FUNC_I2S1_LRCK (MTK_PIN_NO(5) | 3)
+#define MT8365_PIN_5_GPIO5__FUNC_EXT_RXER (MTK_PIN_NO(5) | 4)
+#define MT8365_PIN_5_GPIO5__FUNC_CONN_MCU_TRST_B (MTK_PIN_NO(5) | 5)
+#define MT8365_PIN_5_GPIO5__FUNC_MM_TEST_CK (MTK_PIN_NO(5) | 6)
+#define MT8365_PIN_5_GPIO5__FUNC_DBG_MON_A5 (MTK_PIN_NO(5) | 7)
+
+#define MT8365_PIN_6_GPIO6__FUNC_GPIO6 (MTK_PIN_NO(6) | 0)
+#define MT8365_PIN_6_GPIO6__FUNC_DPI_D6 (MTK_PIN_NO(6) | 1)
+#define MT8365_PIN_6_GPIO6__FUNC_CLKM3 (MTK_PIN_NO(6) | 2)
+#define MT8365_PIN_6_GPIO6__FUNC_I2S1_MCK (MTK_PIN_NO(6) | 3)
+#define MT8365_PIN_6_GPIO6__FUNC_EXT_RXC (MTK_PIN_NO(6) | 4)
+#define MT8365_PIN_6_GPIO6__FUNC_CONN_MCU_TMS (MTK_PIN_NO(6) | 5)
+#define MT8365_PIN_6_GPIO6__FUNC_CONN_MCU_AICE_TMSC (MTK_PIN_NO(6) | 6)
+#define MT8365_PIN_6_GPIO6__FUNC_DBG_MON_A6 (MTK_PIN_NO(6) | 7)
+
+#define MT8365_PIN_7_GPIO7__FUNC_GPIO7 (MTK_PIN_NO(7) | 0)
+#define MT8365_PIN_7_GPIO7__FUNC_DPI_D7 (MTK_PIN_NO(7) | 1)
+#define MT8365_PIN_7_GPIO7__FUNC_I2S1_DO (MTK_PIN_NO(7) | 3)
+#define MT8365_PIN_7_GPIO7__FUNC_EXT_RXDV (MTK_PIN_NO(7) | 4)
+#define MT8365_PIN_7_GPIO7__FUNC_CONN_DSP_JCK (MTK_PIN_NO(7) | 5)
+#define MT8365_PIN_7_GPIO7__FUNC_DBG_MON_A7 (MTK_PIN_NO(7) | 7)
+
+#define MT8365_PIN_8_GPIO8__FUNC_GPIO8 (MTK_PIN_NO(8) | 0)
+#define MT8365_PIN_8_GPIO8__FUNC_DPI_D8 (MTK_PIN_NO(8) | 1)
+#define MT8365_PIN_8_GPIO8__FUNC_SPI_CLK (MTK_PIN_NO(8) | 2)
+#define MT8365_PIN_8_GPIO8__FUNC_I2S0_BCK (MTK_PIN_NO(8) | 3)
+#define MT8365_PIN_8_GPIO8__FUNC_EXT_RXD0 (MTK_PIN_NO(8) | 4)
+#define MT8365_PIN_8_GPIO8__FUNC_CONN_DSP_JINTP (MTK_PIN_NO(8) | 5)
+#define MT8365_PIN_8_GPIO8__FUNC_DBG_MON_A8 (MTK_PIN_NO(8) | 7)
+
+#define MT8365_PIN_9_GPIO9__FUNC_GPIO9 (MTK_PIN_NO(9) | 0)
+#define MT8365_PIN_9_GPIO9__FUNC_DPI_D9 (MTK_PIN_NO(9) | 1)
+#define MT8365_PIN_9_GPIO9__FUNC_SPI_CSB (MTK_PIN_NO(9) | 2)
+#define MT8365_PIN_9_GPIO9__FUNC_I2S0_LRCK (MTK_PIN_NO(9) | 3)
+#define MT8365_PIN_9_GPIO9__FUNC_EXT_RXD1 (MTK_PIN_NO(9) | 4)
+#define MT8365_PIN_9_GPIO9__FUNC_CONN_DSP_JDI (MTK_PIN_NO(9) | 5)
+#define MT8365_PIN_9_GPIO9__FUNC_DBG_MON_A9 (MTK_PIN_NO(9) | 7)
+
+#define MT8365_PIN_10_GPIO10__FUNC_GPIO10 (MTK_PIN_NO(10) | 0)
+#define MT8365_PIN_10_GPIO10__FUNC_DPI_D10 (MTK_PIN_NO(10) | 1)
+#define MT8365_PIN_10_GPIO10__FUNC_SPI_MI (MTK_PIN_NO(10) | 2)
+#define MT8365_PIN_10_GPIO10__FUNC_I2S0_MCK (MTK_PIN_NO(10) | 3)
+#define MT8365_PIN_10_GPIO10__FUNC_EXT_RXD2 (MTK_PIN_NO(10) | 4)
+#define MT8365_PIN_10_GPIO10__FUNC_CONN_DSP_JMS (MTK_PIN_NO(10) | 5)
+#define MT8365_PIN_10_GPIO10__FUNC_DBG_MON_A10 (MTK_PIN_NO(10) | 7)
+
+#define MT8365_PIN_11_GPIO11__FUNC_GPIO11 (MTK_PIN_NO(11) | 0)
+#define MT8365_PIN_11_GPIO11__FUNC_DPI_D11 (MTK_PIN_NO(11) | 1)
+#define MT8365_PIN_11_GPIO11__FUNC_SPI_MO (MTK_PIN_NO(11) | 2)
+#define MT8365_PIN_11_GPIO11__FUNC_I2S0_DI (MTK_PIN_NO(11) | 3)
+#define MT8365_PIN_11_GPIO11__FUNC_EXT_RXD3 (MTK_PIN_NO(11) | 4)
+#define MT8365_PIN_11_GPIO11__FUNC_CONN_DSP_JDO (MTK_PIN_NO(11) | 5)
+#define MT8365_PIN_11_GPIO11__FUNC_DBG_MON_A11 (MTK_PIN_NO(11) | 7)
+
+#define MT8365_PIN_12_GPIO12__FUNC_GPIO12 (MTK_PIN_NO(12) | 0)
+#define MT8365_PIN_12_GPIO12__FUNC_DPI_DE (MTK_PIN_NO(12) | 1)
+#define MT8365_PIN_12_GPIO12__FUNC_UCTS1 (MTK_PIN_NO(12) | 2)
+#define MT8365_PIN_12_GPIO12__FUNC_I2S3_BCK (MTK_PIN_NO(12) | 3)
+#define MT8365_PIN_12_GPIO12__FUNC_EXT_TXEN (MTK_PIN_NO(12) | 4)
+#define MT8365_PIN_12_GPIO12__FUNC_O_WIFI_TXD (MTK_PIN_NO(12) | 5)
+#define MT8365_PIN_12_GPIO12__FUNC_DBG_MON_A12 (MTK_PIN_NO(12) | 7)
+
+#define MT8365_PIN_13_GPIO13__FUNC_GPIO13 (MTK_PIN_NO(13) | 0)
+#define MT8365_PIN_13_GPIO13__FUNC_DPI_VSYNC (MTK_PIN_NO(13) | 1)
+#define MT8365_PIN_13_GPIO13__FUNC_URTS1 (MTK_PIN_NO(13) | 2)
+#define MT8365_PIN_13_GPIO13__FUNC_I2S3_LRCK (MTK_PIN_NO(13) | 3)
+#define MT8365_PIN_13_GPIO13__FUNC_EXT_COL (MTK_PIN_NO(13) | 4)
+#define MT8365_PIN_13_GPIO13__FUNC_SPDIF_IN (MTK_PIN_NO(13) | 5)
+#define MT8365_PIN_13_GPIO13__FUNC_DBG_MON_A13 (MTK_PIN_NO(13) | 7)
+
+#define MT8365_PIN_14_GPIO14__FUNC_GPIO14 (MTK_PIN_NO(14) | 0)
+#define MT8365_PIN_14_GPIO14__FUNC_DPI_CK (MTK_PIN_NO(14) | 1)
+#define MT8365_PIN_14_GPIO14__FUNC_UCTS2 (MTK_PIN_NO(14) | 2)
+#define MT8365_PIN_14_GPIO14__FUNC_I2S3_MCK (MTK_PIN_NO(14) | 3)
+#define MT8365_PIN_14_GPIO14__FUNC_EXT_MDIO (MTK_PIN_NO(14) | 4)
+#define MT8365_PIN_14_GPIO14__FUNC_SPDIF_OUT (MTK_PIN_NO(14) | 5)
+#define MT8365_PIN_14_GPIO14__FUNC_DVFSRC_EXT_REQ (MTK_PIN_NO(14) | 6)
+#define MT8365_PIN_14_GPIO14__FUNC_DBG_MON_A14 (MTK_PIN_NO(14) | 7)
+
+#define MT8365_PIN_15_GPIO15__FUNC_GPIO15 (MTK_PIN_NO(15) | 0)
+#define MT8365_PIN_15_GPIO15__FUNC_DPI_HSYNC (MTK_PIN_NO(15) | 1)
+#define MT8365_PIN_15_GPIO15__FUNC_URTS2 (MTK_PIN_NO(15) | 2)
+#define MT8365_PIN_15_GPIO15__FUNC_I2S3_DO (MTK_PIN_NO(15) | 3)
+#define MT8365_PIN_15_GPIO15__FUNC_EXT_MDC (MTK_PIN_NO(15) | 4)
+#define MT8365_PIN_15_GPIO15__FUNC_IRRX (MTK_PIN_NO(15) | 5)
+#define MT8365_PIN_15_GPIO15__FUNC_EXT_FRAME_SYNC (MTK_PIN_NO(15) | 6)
+#define MT8365_PIN_15_GPIO15__FUNC_DBG_MON_A15 (MTK_PIN_NO(15) | 7)
+
+#define MT8365_PIN_16_GPIO16__FUNC_GPIO16 (MTK_PIN_NO(16) | 0)
+#define MT8365_PIN_16_GPIO16__FUNC_DPI_D12 (MTK_PIN_NO(16) | 1)
+#define MT8365_PIN_16_GPIO16__FUNC_USB_DRVVBUS (MTK_PIN_NO(16) | 2)
+#define MT8365_PIN_16_GPIO16__FUNC_PWM_A (MTK_PIN_NO(16) | 3)
+#define MT8365_PIN_16_GPIO16__FUNC_CLKM0 (MTK_PIN_NO(16) | 4)
+#define MT8365_PIN_16_GPIO16__FUNC_ANT_SEL0 (MTK_PIN_NO(16) | 5)
+#define MT8365_PIN_16_GPIO16__FUNC_TSF_IN (MTK_PIN_NO(16) | 6)
+#define MT8365_PIN_16_GPIO16__FUNC_DBG_MON_A16 (MTK_PIN_NO(16) | 7)
+
+#define MT8365_PIN_17_GPIO17__FUNC_GPIO17 (MTK_PIN_NO(17) | 0)
+#define MT8365_PIN_17_GPIO17__FUNC_DPI_D13 (MTK_PIN_NO(17) | 1)
+#define MT8365_PIN_17_GPIO17__FUNC_IDDIG (MTK_PIN_NO(17) | 2)
+#define MT8365_PIN_17_GPIO17__FUNC_PWM_B (MTK_PIN_NO(17) | 3)
+#define MT8365_PIN_17_GPIO17__FUNC_CLKM1 (MTK_PIN_NO(17) | 4)
+#define MT8365_PIN_17_GPIO17__FUNC_ANT_SEL1 (MTK_PIN_NO(17) | 5)
+#define MT8365_PIN_17_GPIO17__FUNC_DVFSRC_EXT_REQ (MTK_PIN_NO(17) | 6)
+#define MT8365_PIN_17_GPIO17__FUNC_DBG_MON_A17 (MTK_PIN_NO(17) | 7)
+
+#define MT8365_PIN_18_GPIO18__FUNC_GPIO18 (MTK_PIN_NO(18) | 0)
+#define MT8365_PIN_18_GPIO18__FUNC_DPI_D14 (MTK_PIN_NO(18) | 1)
+#define MT8365_PIN_18_GPIO18__FUNC_EXT_FRAME_SYNC (MTK_PIN_NO(18) | 2)
+#define MT8365_PIN_18_GPIO18__FUNC_PWM_C (MTK_PIN_NO(18) | 3)
+#define MT8365_PIN_18_GPIO18__FUNC_CLKM2 (MTK_PIN_NO(18) | 4)
+#define MT8365_PIN_18_GPIO18__FUNC_ANT_SEL2 (MTK_PIN_NO(18) | 5)
+#define MT8365_PIN_18_GPIO18__FUNC_MFG_TEST_CK (MTK_PIN_NO(18) | 6)
+#define MT8365_PIN_18_GPIO18__FUNC_DBG_MON_A18 (MTK_PIN_NO(18) | 7)
+
+#define MT8365_PIN_19_DISP_PWM__FUNC_GPIO19 (MTK_PIN_NO(19) | 0)
+#define MT8365_PIN_19_DISP_PWM__FUNC_DISP_PWM (MTK_PIN_NO(19) | 1)
+#define MT8365_PIN_19_DISP_PWM__FUNC_PWM_A (MTK_PIN_NO(19) | 2)
+#define MT8365_PIN_19_DISP_PWM__FUNC_DBG_MON_A19 (MTK_PIN_NO(19) | 7)
+
+#define MT8365_PIN_20_LCM_RST__FUNC_GPIO20 (MTK_PIN_NO(20) | 0)
+#define MT8365_PIN_20_LCM_RST__FUNC_LCM_RST (MTK_PIN_NO(20) | 1)
+#define MT8365_PIN_20_LCM_RST__FUNC_PWM_B (MTK_PIN_NO(20) | 2)
+#define MT8365_PIN_20_LCM_RST__FUNC_DBG_MON_A20 (MTK_PIN_NO(20) | 7)
+
+#define MT8365_PIN_21_DSI_TE__FUNC_GPIO21 (MTK_PIN_NO(21) | 0)
+#define MT8365_PIN_21_DSI_TE__FUNC_DSI_TE (MTK_PIN_NO(21) | 1)
+#define MT8365_PIN_21_DSI_TE__FUNC_PWM_C (MTK_PIN_NO(21) | 2)
+#define MT8365_PIN_21_DSI_TE__FUNC_ANT_SEL0 (MTK_PIN_NO(21) | 3)
+#define MT8365_PIN_21_DSI_TE__FUNC_DVFSRC_EXT_REQ (MTK_PIN_NO(21) | 4)
+#define MT8365_PIN_21_DSI_TE__FUNC_DBG_MON_A21 (MTK_PIN_NO(21) | 7)
+
+#define MT8365_PIN_22_KPROW0__FUNC_GPIO22 (MTK_PIN_NO(22) | 0)
+#define MT8365_PIN_22_KPROW0__FUNC_KPROW0 (MTK_PIN_NO(22) | 1)
+#define MT8365_PIN_22_KPROW0__FUNC_DBG_MON_A22 (MTK_PIN_NO(22) | 7)
+
+#define MT8365_PIN_23_KPROW1__FUNC_GPIO23 (MTK_PIN_NO(23) | 0)
+#define MT8365_PIN_23_KPROW1__FUNC_KPROW1 (MTK_PIN_NO(23) | 1)
+#define MT8365_PIN_23_KPROW1__FUNC_IDDIG (MTK_PIN_NO(23) | 2)
+#define MT8365_PIN_23_KPROW1__FUNC_WIFI_TXD (MTK_PIN_NO(23) | 3)
+#define MT8365_PIN_23_KPROW1__FUNC_CLKM3 (MTK_PIN_NO(23) | 4)
+#define MT8365_PIN_23_KPROW1__FUNC_ANT_SEL1 (MTK_PIN_NO(23) | 5)
+#define MT8365_PIN_23_KPROW1__FUNC_EXT_FRAME_SYNC (MTK_PIN_NO(23) | 6)
+#define MT8365_PIN_23_KPROW1__FUNC_DBG_MON_B0 (MTK_PIN_NO(23) | 7)
+
+#define MT8365_PIN_24_KPCOL0__FUNC_GPIO24 (MTK_PIN_NO(24) | 0)
+#define MT8365_PIN_24_KPCOL0__FUNC_KPCOL0 (MTK_PIN_NO(24) | 1)
+#define MT8365_PIN_24_KPCOL0__FUNC_DBG_MON_A23 (MTK_PIN_NO(24) | 7)
+
+#define MT8365_PIN_25_KPCOL1__FUNC_GPIO25 (MTK_PIN_NO(25) | 0)
+#define MT8365_PIN_25_KPCOL1__FUNC_KPCOL1 (MTK_PIN_NO(25) | 1)
+#define MT8365_PIN_25_KPCOL1__FUNC_USB_DRVVBUS (MTK_PIN_NO(25) | 2)
+#define MT8365_PIN_25_KPCOL1__FUNC_APU_JTAG_TRST (MTK_PIN_NO(25) | 3)
+#define MT8365_PIN_25_KPCOL1__FUNC_UDI_NTRST_XI (MTK_PIN_NO(25) | 4)
+#define MT8365_PIN_25_KPCOL1__FUNC_DFD_NTRST_XI (MTK_PIN_NO(25) | 5)
+#define MT8365_PIN_25_KPCOL1__FUNC_CONN_TEST_CK (MTK_PIN_NO(25) | 6)
+#define MT8365_PIN_25_KPCOL1__FUNC_DBG_MON_B1 (MTK_PIN_NO(25) | 7)
+
+#define MT8365_PIN_26_SPI_CS__FUNC_GPIO26 (MTK_PIN_NO(26) | 0)
+#define MT8365_PIN_26_SPI_CS__FUNC_SPI_CSB (MTK_PIN_NO(26) | 1)
+#define MT8365_PIN_26_SPI_CS__FUNC_APU_JTAG_TMS (MTK_PIN_NO(26) | 3)
+#define MT8365_PIN_26_SPI_CS__FUNC_UDI_TMS_XI (MTK_PIN_NO(26) | 4)
+#define MT8365_PIN_26_SPI_CS__FUNC_DFD_TMS_XI (MTK_PIN_NO(26) | 5)
+#define MT8365_PIN_26_SPI_CS__FUNC_CONN_TEST_CK (MTK_PIN_NO(26) | 6)
+#define MT8365_PIN_26_SPI_CS__FUNC_DBG_MON_A24 (MTK_PIN_NO(26) | 7)
+
+#define MT8365_PIN_27_SPI_CK__FUNC_GPIO27 (MTK_PIN_NO(27) | 0)
+#define MT8365_PIN_27_SPI_CK__FUNC_SPI_CLK (MTK_PIN_NO(27) | 1)
+#define MT8365_PIN_27_SPI_CK__FUNC_APU_JTAG_TCK (MTK_PIN_NO(27) | 3)
+#define MT8365_PIN_27_SPI_CK__FUNC_UDI_TCK_XI (MTK_PIN_NO(27) | 4)
+#define MT8365_PIN_27_SPI_CK__FUNC_DFD_TCK_XI (MTK_PIN_NO(27) | 5)
+#define MT8365_PIN_27_SPI_CK__FUNC_APU_TEST_CK (MTK_PIN_NO(27) | 6)
+#define MT8365_PIN_27_SPI_CK__FUNC_DBG_MON_A25 (MTK_PIN_NO(27) | 7)
+
+#define MT8365_PIN_28_SPI_MI__FUNC_GPIO28 (MTK_PIN_NO(28) | 0)
+#define MT8365_PIN_28_SPI_MI__FUNC_SPI_MI (MTK_PIN_NO(28) | 1)
+#define MT8365_PIN_28_SPI_MI__FUNC_SPI_MO (MTK_PIN_NO(28) | 2)
+#define MT8365_PIN_28_SPI_MI__FUNC_APU_JTAG_TDI (MTK_PIN_NO(28) | 3)
+#define MT8365_PIN_28_SPI_MI__FUNC_UDI_TDI_XI (MTK_PIN_NO(28) | 4)
+#define MT8365_PIN_28_SPI_MI__FUNC_DFD_TDI_XI (MTK_PIN_NO(28) | 5)
+#define MT8365_PIN_28_SPI_MI__FUNC_DSP_TEST_CK (MTK_PIN_NO(28) | 6)
+#define MT8365_PIN_28_SPI_MI__FUNC_DBG_MON_A26 (MTK_PIN_NO(28) | 7)
+
+#define MT8365_PIN_29_SPI_MO__FUNC_GPIO29 (MTK_PIN_NO(29) | 0)
+#define MT8365_PIN_29_SPI_MO__FUNC_SPI_MO (MTK_PIN_NO(29) | 1)
+#define MT8365_PIN_29_SPI_MO__FUNC_SPI_MI (MTK_PIN_NO(29) | 2)
+#define MT8365_PIN_29_SPI_MO__FUNC_APU_JTAG_TDO (MTK_PIN_NO(29) | 3)
+#define MT8365_PIN_29_SPI_MO__FUNC_UDI_TDO (MTK_PIN_NO(29) | 4)
+#define MT8365_PIN_29_SPI_MO__FUNC_DFD_TDO (MTK_PIN_NO(29) | 5)
+#define MT8365_PIN_29_SPI_MO__FUNC_DVFSRC_EXT_REQ (MTK_PIN_NO(29) | 6)
+#define MT8365_PIN_29_SPI_MO__FUNC_DBG_MON_A27 (MTK_PIN_NO(29) | 7)
+
+#define MT8365_PIN_30_JTMS__FUNC_GPIO30 (MTK_PIN_NO(30) | 0)
+#define MT8365_PIN_30_JTMS__FUNC_JTMS (MTK_PIN_NO(30) | 1)
+#define MT8365_PIN_30_JTMS__FUNC_DFD_TMS_XI (MTK_PIN_NO(30) | 2)
+#define MT8365_PIN_30_JTMS__FUNC_UDI_TMS_XI (MTK_PIN_NO(30) | 3)
+#define MT8365_PIN_30_JTMS__FUNC_MCU_SPM_TMS (MTK_PIN_NO(30) | 4)
+#define MT8365_PIN_30_JTMS__FUNC_CONN_MCU_TMS (MTK_PIN_NO(30) | 5)
+#define MT8365_PIN_30_JTMS__FUNC_CONN_MCU_AICE_TMSC (MTK_PIN_NO(30) | 6)
+
+#define MT8365_PIN_31_JTCK__FUNC_GPIO31 (MTK_PIN_NO(31) | 0)
+#define MT8365_PIN_31_JTCK__FUNC_JTCK (MTK_PIN_NO(31) | 1)
+#define MT8365_PIN_31_JTCK__FUNC_DFD_TCK_XI (MTK_PIN_NO(31) | 2)
+#define MT8365_PIN_31_JTCK__FUNC_UDI_TCK_XI (MTK_PIN_NO(31) | 3)
+#define MT8365_PIN_31_JTCK__FUNC_MCU_SPM_TCK (MTK_PIN_NO(31) | 4)
+#define MT8365_PIN_31_JTCK__FUNC_CONN_MCU_TCK (MTK_PIN_NO(31) | 5)
+#define MT8365_PIN_31_JTCK__FUNC_CONN_MCU_AICE_TCKC (MTK_PIN_NO(31) | 6)
+
+#define MT8365_PIN_32_JTDI__FUNC_GPIO32 (MTK_PIN_NO(32) | 0)
+#define MT8365_PIN_32_JTDI__FUNC_JTDI (MTK_PIN_NO(32) | 1)
+#define MT8365_PIN_32_JTDI__FUNC_DFD_TDI_XI (MTK_PIN_NO(32) | 2)
+#define MT8365_PIN_32_JTDI__FUNC_UDI_TDI_XI (MTK_PIN_NO(32) | 3)
+#define MT8365_PIN_32_JTDI__FUNC_MCU_SPM_TDI (MTK_PIN_NO(32) | 4)
+#define MT8365_PIN_32_JTDI__FUNC_CONN_MCU_TDI (MTK_PIN_NO(32) | 5)
+
+#define MT8365_PIN_33_JTDO__FUNC_GPIO33 (MTK_PIN_NO(33) | 0)
+#define MT8365_PIN_33_JTDO__FUNC_JTDO (MTK_PIN_NO(33) | 1)
+#define MT8365_PIN_33_JTDO__FUNC_DFD_TDO (MTK_PIN_NO(33) | 2)
+#define MT8365_PIN_33_JTDO__FUNC_UDI_TDO (MTK_PIN_NO(33) | 3)
+#define MT8365_PIN_33_JTDO__FUNC_MCU_SPM_TDO (MTK_PIN_NO(33) | 4)
+#define MT8365_PIN_33_JTDO__FUNC_CONN_MCU_TDO (MTK_PIN_NO(33) | 5)
+
+#define MT8365_PIN_34_JTRST__FUNC_GPIO34 (MTK_PIN_NO(34) | 0)
+#define MT8365_PIN_34_JTRST__FUNC_JTRST (MTK_PIN_NO(34) | 1)
+#define MT8365_PIN_34_JTRST__FUNC_DFD_NTRST_XI (MTK_PIN_NO(34) | 2)
+#define MT8365_PIN_34_JTRST__FUNC_UDI_NTRST_XI (MTK_PIN_NO(34) | 3)
+#define MT8365_PIN_34_JTRST__FUNC_MCU_SPM_NTRST (MTK_PIN_NO(34) | 4)
+#define MT8365_PIN_34_JTRST__FUNC_CONN_MCU_TRST_B (MTK_PIN_NO(34) | 5)
+
+#define MT8365_PIN_35_URXD0__FUNC_GPIO35 (MTK_PIN_NO(35) | 0)
+#define MT8365_PIN_35_URXD0__FUNC_URXD0 (MTK_PIN_NO(35) | 1)
+#define MT8365_PIN_35_URXD0__FUNC_UTXD0 (MTK_PIN_NO(35) | 2)
+#define MT8365_PIN_35_URXD0__FUNC_DSP_URXD0 (MTK_PIN_NO(35) | 7)
+
+#define MT8365_PIN_36_UTXD0__FUNC_GPIO36 (MTK_PIN_NO(36) | 0)
+#define MT8365_PIN_36_UTXD0__FUNC_UTXD0 (MTK_PIN_NO(36) | 1)
+#define MT8365_PIN_36_UTXD0__FUNC_URXD0 (MTK_PIN_NO(36) | 2)
+#define MT8365_PIN_36_UTXD0__FUNC_DSP_UTXD0 (MTK_PIN_NO(36) | 7)
+
+#define MT8365_PIN_37_URXD1__FUNC_GPIO37 (MTK_PIN_NO(37) | 0)
+#define MT8365_PIN_37_URXD1__FUNC_URXD1 (MTK_PIN_NO(37) | 1)
+#define MT8365_PIN_37_URXD1__FUNC_UTXD1 (MTK_PIN_NO(37) | 2)
+#define MT8365_PIN_37_URXD1__FUNC_UCTS2 (MTK_PIN_NO(37) | 3)
+#define MT8365_PIN_37_URXD1__FUNC_DVFSRC_EXT_REQ (MTK_PIN_NO(37) | 4)
+#define MT8365_PIN_37_URXD1__FUNC_CONN_UART0_RXD (MTK_PIN_NO(37) | 5)
+#define MT8365_PIN_37_URXD1__FUNC_I2S0_MCK (MTK_PIN_NO(37) | 6)
+#define MT8365_PIN_37_URXD1__FUNC_DSP_URXD0 (MTK_PIN_NO(37) | 7)
+
+#define MT8365_PIN_38_UTXD1__FUNC_GPIO38 (MTK_PIN_NO(38) | 0)
+#define MT8365_PIN_38_UTXD1__FUNC_UTXD1 (MTK_PIN_NO(38) | 1)
+#define MT8365_PIN_38_UTXD1__FUNC_URXD1 (MTK_PIN_NO(38) | 2)
+#define MT8365_PIN_38_UTXD1__FUNC_URTS2 (MTK_PIN_NO(38) | 3)
+#define MT8365_PIN_38_UTXD1__FUNC_ANT_SEL2 (MTK_PIN_NO(38) | 4)
+#define MT8365_PIN_38_UTXD1__FUNC_CONN_UART0_TXD (MTK_PIN_NO(38) | 5)
+#define MT8365_PIN_38_UTXD1__FUNC_I2S1_MCK (MTK_PIN_NO(38) | 6)
+#define MT8365_PIN_38_UTXD1__FUNC_DSP_UTXD0 (MTK_PIN_NO(38) | 7)
+
+#define MT8365_PIN_39_URXD2__FUNC_GPIO39 (MTK_PIN_NO(39) | 0)
+#define MT8365_PIN_39_URXD2__FUNC_URXD2 (MTK_PIN_NO(39) | 1)
+#define MT8365_PIN_39_URXD2__FUNC_UTXD2 (MTK_PIN_NO(39) | 2)
+#define MT8365_PIN_39_URXD2__FUNC_UCTS1 (MTK_PIN_NO(39) | 3)
+#define MT8365_PIN_39_URXD2__FUNC_IDDIG (MTK_PIN_NO(39) | 4)
+#define MT8365_PIN_39_URXD2__FUNC_CONN_MCU_DBGACK_N (MTK_PIN_NO(39) | 5)
+#define MT8365_PIN_39_URXD2__FUNC_I2S2_MCK (MTK_PIN_NO(39) | 6)
+#define MT8365_PIN_39_URXD2__FUNC_DSP_URXD0 (MTK_PIN_NO(39) | 7)
+
+#define MT8365_PIN_40_UTXD2__FUNC_GPIO40 (MTK_PIN_NO(40) | 0)
+#define MT8365_PIN_40_UTXD2__FUNC_UTXD2 (MTK_PIN_NO(40) | 1)
+#define MT8365_PIN_40_UTXD2__FUNC_URXD2 (MTK_PIN_NO(40) | 2)
+#define MT8365_PIN_40_UTXD2__FUNC_URTS1 (MTK_PIN_NO(40) | 3)
+#define MT8365_PIN_40_UTXD2__FUNC_USB_DRVVBUS (MTK_PIN_NO(40) | 4)
+#define MT8365_PIN_40_UTXD2__FUNC_CONN_MCU_DBGI_N (MTK_PIN_NO(40) | 5)
+#define MT8365_PIN_40_UTXD2__FUNC_I2S3_MCK (MTK_PIN_NO(40) | 6)
+#define MT8365_PIN_40_UTXD2__FUNC_DSP_UTXD0 (MTK_PIN_NO(40) | 7)
+
+#define MT8365_PIN_41_PWRAP_SPI0_MI__FUNC_GPIO41 (MTK_PIN_NO(41) | 0)
+#define MT8365_PIN_41_PWRAP_SPI0_MI__FUNC_PWRAP_SPI0_MI (MTK_PIN_NO(41) | 1)
+#define MT8365_PIN_41_PWRAP_SPI0_MI__FUNC_PWRAP_SPI0_MO (MTK_PIN_NO(41) | 2)
+
+#define MT8365_PIN_42_PWRAP_SPI0_MO__FUNC_GPIO42 (MTK_PIN_NO(42) | 0)
+#define MT8365_PIN_42_PWRAP_SPI0_MO__FUNC_PWRAP_SPI0_MO (MTK_PIN_NO(42) | 1)
+#define MT8365_PIN_42_PWRAP_SPI0_MO__FUNC_PWRAP_SPI0_MI (MTK_PIN_NO(42) | 2)
+
+#define MT8365_PIN_43_PWRAP_SPI0_CK__FUNC_GPIO43 (MTK_PIN_NO(43) | 0)
+#define MT8365_PIN_43_PWRAP_SPI0_CK__FUNC_PWRAP_SPI0_CK (MTK_PIN_NO(43) | 1)
+
+#define MT8365_PIN_44_PWRAP_SPI0_CSN__FUNC_GPIO44 (MTK_PIN_NO(44) | 0)
+#define MT8365_PIN_44_PWRAP_SPI0_CSN__FUNC_PWRAP_SPI0_CSN (MTK_PIN_NO(44) | 1)
+
+#define MT8365_PIN_45_RTC32K_CK__FUNC_GPIO45 (MTK_PIN_NO(45) | 0)
+#define MT8365_PIN_45_RTC32K_CK__FUNC_RTC32K_CK (MTK_PIN_NO(45) | 1)
+
+#define MT8365_PIN_46_WATCHDOG__FUNC_GPIO46 (MTK_PIN_NO(46) | 0)
+#define MT8365_PIN_46_WATCHDOG__FUNC_WATCHDOG (MTK_PIN_NO(46) | 1)
+
+#define MT8365_PIN_47_SRCLKENA0__FUNC_GPIO47 (MTK_PIN_NO(47) | 0)
+#define MT8365_PIN_47_SRCLKENA0__FUNC_SRCLKENA0 (MTK_PIN_NO(47) | 1)
+#define MT8365_PIN_47_SRCLKENA0__FUNC_SRCLKENA1 (MTK_PIN_NO(47) | 2)
+
+#define MT8365_PIN_48_SRCLKENA1__FUNC_GPIO48 (MTK_PIN_NO(48) | 0)
+#define MT8365_PIN_48_SRCLKENA1__FUNC_SRCLKENA1 (MTK_PIN_NO(48) | 1)
+
+#define MT8365_PIN_49_AUD_CLK_MOSI__FUNC_GPIO49 (MTK_PIN_NO(49) | 0)
+#define MT8365_PIN_49_AUD_CLK_MOSI__FUNC_AUD_CLK_MOSI (MTK_PIN_NO(49) | 1)
+#define MT8365_PIN_49_AUD_CLK_MOSI__FUNC_AUD_CLK_MISO (MTK_PIN_NO(49) | 2)
+#define MT8365_PIN_49_AUD_CLK_MOSI__FUNC_I2S1_MCK (MTK_PIN_NO(49) | 3)
+
+#define MT8365_PIN_50_AUD_SYNC_MOSI__FUNC_GPIO50 (MTK_PIN_NO(50) | 0)
+#define MT8365_PIN_50_AUD_SYNC_MOSI__FUNC_AUD_SYNC_MOSI (MTK_PIN_NO(50) | 1)
+#define MT8365_PIN_50_AUD_SYNC_MOSI__FUNC_AUD_SYNC_MISO (MTK_PIN_NO(50) | 2)
+#define MT8365_PIN_50_AUD_SYNC_MOSI__FUNC_I2S1_BCK (MTK_PIN_NO(50) | 3)
+
+#define MT8365_PIN_51_AUD_DAT_MOSI0__FUNC_GPIO51 (MTK_PIN_NO(51) | 0)
+#define MT8365_PIN_51_AUD_DAT_MOSI0__FUNC_AUD_DAT_MOSI0 (MTK_PIN_NO(51) | 1)
+#define MT8365_PIN_51_AUD_DAT_MOSI0__FUNC_AUD_DAT_MISO0 (MTK_PIN_NO(51) | 2)
+#define MT8365_PIN_51_AUD_DAT_MOSI0__FUNC_I2S1_LRCK (MTK_PIN_NO(51) | 3)
+
+#define MT8365_PIN_52_AUD_DAT_MOSI1__FUNC_GPIO52 (MTK_PIN_NO(52) | 0)
+#define MT8365_PIN_52_AUD_DAT_MOSI1__FUNC_AUD_DAT_MOSI1 (MTK_PIN_NO(52) | 1)
+#define MT8365_PIN_52_AUD_DAT_MOSI1__FUNC_AUD_DAT_MISO1 (MTK_PIN_NO(52) | 2)
+#define MT8365_PIN_52_AUD_DAT_MOSI1__FUNC_I2S1_DO (MTK_PIN_NO(52) | 3)
+
+#define MT8365_PIN_53_AUD_CLK_MISO__FUNC_GPIO53 (MTK_PIN_NO(53) | 0)
+#define MT8365_PIN_53_AUD_CLK_MISO__FUNC_AUD_CLK_MISO (MTK_PIN_NO(53) | 1)
+#define MT8365_PIN_53_AUD_CLK_MISO__FUNC_AUD_CLK_MOSI (MTK_PIN_NO(53) | 2)
+#define MT8365_PIN_53_AUD_CLK_MISO__FUNC_I2S2_MCK (MTK_PIN_NO(53) | 3)
+
+#define MT8365_PIN_54_AUD_SYNC_MISO__FUNC_GPIO54 (MTK_PIN_NO(54) | 0)
+#define MT8365_PIN_54_AUD_SYNC_MISO__FUNC_AUD_SYNC_MISO (MTK_PIN_NO(54) | 1)
+#define MT8365_PIN_54_AUD_SYNC_MISO__FUNC_AUD_SYNC_MOSI (MTK_PIN_NO(54) | 2)
+#define MT8365_PIN_54_AUD_SYNC_MISO__FUNC_I2S2_BCK (MTK_PIN_NO(54) | 3)
+
+#define MT8365_PIN_55_AUD_DAT_MISO0__FUNC_GPIO55 (MTK_PIN_NO(55) | 0)
+#define MT8365_PIN_55_AUD_DAT_MISO0__FUNC_AUD_DAT_MISO0 (MTK_PIN_NO(55) | 1)
+#define MT8365_PIN_55_AUD_DAT_MISO0__FUNC_AUD_DAT_MOSI0 (MTK_PIN_NO(55) | 2)
+#define MT8365_PIN_55_AUD_DAT_MISO0__FUNC_I2S2_LRCK (MTK_PIN_NO(55) | 3)
+
+#define MT8365_PIN_56_AUD_DAT_MISO1__FUNC_GPIO56 (MTK_PIN_NO(56) | 0)
+#define MT8365_PIN_56_AUD_DAT_MISO1__FUNC_AUD_DAT_MISO1 (MTK_PIN_NO(56) | 1)
+#define MT8365_PIN_56_AUD_DAT_MISO1__FUNC_AUD_DAT_MOSI1 (MTK_PIN_NO(56) | 2)
+#define MT8365_PIN_56_AUD_DAT_MISO1__FUNC_I2S2_DI (MTK_PIN_NO(56) | 3)
+
+#define MT8365_PIN_57_SDA0__FUNC_GPIO57 (MTK_PIN_NO(57) | 0)
+#define MT8365_PIN_57_SDA0__FUNC_SDA0_0 (MTK_PIN_NO(57) | 1)
+
+#define MT8365_PIN_58_SCL0__FUNC_GPIO58 (MTK_PIN_NO(58) | 0)
+#define MT8365_PIN_58_SCL0__FUNC_SCL0_0 (MTK_PIN_NO(58) | 1)
+
+#define MT8365_PIN_59_SDA1__FUNC_GPIO59 (MTK_PIN_NO(59) | 0)
+#define MT8365_PIN_59_SDA1__FUNC_SDA1_0 (MTK_PIN_NO(59) | 1)
+#define MT8365_PIN_59_SDA1__FUNC_USB_SDA (MTK_PIN_NO(59) | 6)
+#define MT8365_PIN_59_SDA1__FUNC_DBG_SDA (MTK_PIN_NO(59) | 7)
+
+#define MT8365_PIN_60_SCL1__FUNC_GPIO60 (MTK_PIN_NO(60) | 0)
+#define MT8365_PIN_60_SCL1__FUNC_SCL1_0 (MTK_PIN_NO(60) | 1)
+#define MT8365_PIN_60_SCL1__FUNC_USB_SCL (MTK_PIN_NO(60) | 6)
+#define MT8365_PIN_60_SCL1__FUNC_DBG_SCL (MTK_PIN_NO(60) | 7)
+
+#define MT8365_PIN_61_SDA2__FUNC_GPIO61 (MTK_PIN_NO(61) | 0)
+#define MT8365_PIN_61_SDA2__FUNC_SDA2_0 (MTK_PIN_NO(61) | 1)
+
+#define MT8365_PIN_62_SCL2__FUNC_GPIO62 (MTK_PIN_NO(62) | 0)
+#define MT8365_PIN_62_SCL2__FUNC_SCL2_0 (MTK_PIN_NO(62) | 1)
+
+#define MT8365_PIN_63_SDA3__FUNC_GPIO63 (MTK_PIN_NO(63) | 0)
+#define MT8365_PIN_63_SDA3__FUNC_SDA3_0 (MTK_PIN_NO(63) | 1)
+
+#define MT8365_PIN_64_SCL3__FUNC_GPIO64 (MTK_PIN_NO(64) | 0)
+#define MT8365_PIN_64_SCL3__FUNC_SCL3_0 (MTK_PIN_NO(64) | 1)
+
+#define MT8365_PIN_65_CMMCLK0__FUNC_GPIO65 (MTK_PIN_NO(65) | 0)
+#define MT8365_PIN_65_CMMCLK0__FUNC_CMMCLK0 (MTK_PIN_NO(65) | 1)
+#define MT8365_PIN_65_CMMCLK0__FUNC_CMMCLK1 (MTK_PIN_NO(65) | 2)
+#define MT8365_PIN_65_CMMCLK0__FUNC_DBG_MON_A28 (MTK_PIN_NO(65) | 7)
+
+#define MT8365_PIN_66_CMMCLK1__FUNC_GPIO66 (MTK_PIN_NO(66) | 0)
+#define MT8365_PIN_66_CMMCLK1__FUNC_CMMCLK1 (MTK_PIN_NO(66) | 1)
+#define MT8365_PIN_66_CMMCLK1__FUNC_CMMCLK0 (MTK_PIN_NO(66) | 2)
+#define MT8365_PIN_66_CMMCLK1__FUNC_DBG_MON_B2 (MTK_PIN_NO(66) | 7)
+
+#define MT8365_PIN_67_CMPCLK__FUNC_GPIO67 (MTK_PIN_NO(67) | 0)
+#define MT8365_PIN_67_CMPCLK__FUNC_CMPCLK (MTK_PIN_NO(67) | 1)
+#define MT8365_PIN_67_CMPCLK__FUNC_ANT_SEL0 (MTK_PIN_NO(67) | 2)
+#define MT8365_PIN_67_CMPCLK__FUNC_TDM_RX_BCK (MTK_PIN_NO(67) | 4)
+#define MT8365_PIN_67_CMPCLK__FUNC_I2S0_BCK (MTK_PIN_NO(67) | 5)
+#define MT8365_PIN_67_CMPCLK__FUNC_DBG_MON_B3 (MTK_PIN_NO(67) | 7)
+
+#define MT8365_PIN_68_CMDAT0__FUNC_GPIO68 (MTK_PIN_NO(68) | 0)
+#define MT8365_PIN_68_CMDAT0__FUNC_CMDAT0 (MTK_PIN_NO(68) | 1)
+#define MT8365_PIN_68_CMDAT0__FUNC_ANT_SEL1 (MTK_PIN_NO(68) | 2)
+#define MT8365_PIN_68_CMDAT0__FUNC_TDM_RX_LRCK (MTK_PIN_NO(68) | 4)
+#define MT8365_PIN_68_CMDAT0__FUNC_I2S0_LRCK (MTK_PIN_NO(68) | 5)
+#define MT8365_PIN_68_CMDAT0__FUNC_DBG_MON_B4 (MTK_PIN_NO(68) | 7)
+
+#define MT8365_PIN_69_CMDAT1__FUNC_GPIO69 (MTK_PIN_NO(69) | 0)
+#define MT8365_PIN_69_CMDAT1__FUNC_CMDAT1 (MTK_PIN_NO(69) | 1)
+#define MT8365_PIN_69_CMDAT1__FUNC_ANT_SEL2 (MTK_PIN_NO(69) | 2)
+#define MT8365_PIN_69_CMDAT1__FUNC_DVFSRC_EXT_REQ (MTK_PIN_NO(69) | 3)
+#define MT8365_PIN_69_CMDAT1__FUNC_TDM_RX_MCK (MTK_PIN_NO(69) | 4)
+#define MT8365_PIN_69_CMDAT1__FUNC_I2S0_MCK (MTK_PIN_NO(69) | 5)
+#define MT8365_PIN_69_CMDAT1__FUNC_DBG_MON_B5 (MTK_PIN_NO(69) | 7)
+
+#define MT8365_PIN_70_CMDAT2__FUNC_GPIO70 (MTK_PIN_NO(70) | 0)
+#define MT8365_PIN_70_CMDAT2__FUNC_CMDAT2 (MTK_PIN_NO(70) | 1)
+#define MT8365_PIN_70_CMDAT2__FUNC_ANT_SEL3 (MTK_PIN_NO(70) | 2)
+#define MT8365_PIN_70_CMDAT2__FUNC_TDM_RX_DI (MTK_PIN_NO(70) | 4)
+#define MT8365_PIN_70_CMDAT2__FUNC_I2S0_DI (MTK_PIN_NO(70) | 5)
+#define MT8365_PIN_70_CMDAT2__FUNC_DBG_MON_B6 (MTK_PIN_NO(70) | 7)
+
+#define MT8365_PIN_71_CMDAT3__FUNC_GPIO71 (MTK_PIN_NO(71) | 0)
+#define MT8365_PIN_71_CMDAT3__FUNC_CMDAT3 (MTK_PIN_NO(71) | 1)
+#define MT8365_PIN_71_CMDAT3__FUNC_ANT_SEL4 (MTK_PIN_NO(71) | 2)
+#define MT8365_PIN_71_CMDAT3__FUNC_DBG_MON_B7 (MTK_PIN_NO(71) | 7)
+
+#define MT8365_PIN_72_CMDAT4__FUNC_GPIO72 (MTK_PIN_NO(72) | 0)
+#define MT8365_PIN_72_CMDAT4__FUNC_CMDAT4 (MTK_PIN_NO(72) | 1)
+#define MT8365_PIN_72_CMDAT4__FUNC_ANT_SEL5 (MTK_PIN_NO(72) | 2)
+#define MT8365_PIN_72_CMDAT4__FUNC_I2S3_BCK (MTK_PIN_NO(72) | 5)
+#define MT8365_PIN_72_CMDAT4__FUNC_DBG_MON_B8 (MTK_PIN_NO(72) | 7)
+
+#define MT8365_PIN_73_CMDAT5__FUNC_GPIO73 (MTK_PIN_NO(73) | 0)
+#define MT8365_PIN_73_CMDAT5__FUNC_CMDAT5 (MTK_PIN_NO(73) | 1)
+#define MT8365_PIN_73_CMDAT5__FUNC_ANT_SEL6 (MTK_PIN_NO(73) | 2)
+#define MT8365_PIN_73_CMDAT5__FUNC_I2S3_LRCK (MTK_PIN_NO(73) | 5)
+#define MT8365_PIN_73_CMDAT5__FUNC_DBG_MON_B9 (MTK_PIN_NO(73) | 7)
+
+#define MT8365_PIN_74_CMDAT6__FUNC_GPIO74 (MTK_PIN_NO(74) | 0)
+#define MT8365_PIN_74_CMDAT6__FUNC_CMDAT6 (MTK_PIN_NO(74) | 1)
+#define MT8365_PIN_74_CMDAT6__FUNC_ANT_SEL7 (MTK_PIN_NO(74) | 2)
+#define MT8365_PIN_74_CMDAT6__FUNC_I2S3_MCK (MTK_PIN_NO(74) | 5)
+#define MT8365_PIN_74_CMDAT6__FUNC_DBG_MON_B10 (MTK_PIN_NO(74) | 7)
+
+#define MT8365_PIN_75_CMDAT7__FUNC_GPIO75 (MTK_PIN_NO(75) | 0)
+#define MT8365_PIN_75_CMDAT7__FUNC_CMDAT7 (MTK_PIN_NO(75) | 1)
+#define MT8365_PIN_75_CMDAT7__FUNC_I2S3_DO (MTK_PIN_NO(75) | 5)
+#define MT8365_PIN_75_CMDAT7__FUNC_DBG_MON_B11 (MTK_PIN_NO(75) | 7)
+
+#define MT8365_PIN_76_CMDAT8__FUNC_GPIO76 (MTK_PIN_NO(76) | 0)
+#define MT8365_PIN_76_CMDAT8__FUNC_CMDAT8 (MTK_PIN_NO(76) | 1)
+#define MT8365_PIN_76_CMDAT8__FUNC_PCM_CLK (MTK_PIN_NO(76) | 5)
+#define MT8365_PIN_76_CMDAT8__FUNC_DBG_MON_A29 (MTK_PIN_NO(76) | 7)
+
+#define MT8365_PIN_77_CMDAT9__FUNC_GPIO77 (MTK_PIN_NO(77) | 0)
+#define MT8365_PIN_77_CMDAT9__FUNC_CMDAT9 (MTK_PIN_NO(77) | 1)
+#define MT8365_PIN_77_CMDAT9__FUNC_PCM_SYNC (MTK_PIN_NO(77) | 5)
+#define MT8365_PIN_77_CMDAT9__FUNC_DBG_MON_A30 (MTK_PIN_NO(77) | 7)
+
+#define MT8365_PIN_78_CMHSYNC__FUNC_GPIO78 (MTK_PIN_NO(78) | 0)
+#define MT8365_PIN_78_CMHSYNC__FUNC_CMHSYNC (MTK_PIN_NO(78) | 1)
+#define MT8365_PIN_78_CMHSYNC__FUNC_PCM_RX (MTK_PIN_NO(78) | 5)
+#define MT8365_PIN_78_CMHSYNC__FUNC_DBG_MON_A31 (MTK_PIN_NO(78) | 7)
+
+#define MT8365_PIN_79_CMVSYNC__FUNC_GPIO79 (MTK_PIN_NO(79) | 0)
+#define MT8365_PIN_79_CMVSYNC__FUNC_CMVSYNC (MTK_PIN_NO(79) | 1)
+#define MT8365_PIN_79_CMVSYNC__FUNC_PCM_TX (MTK_PIN_NO(79) | 5)
+#define MT8365_PIN_79_CMVSYNC__FUNC_DBG_MON_A32 (MTK_PIN_NO(79) | 7)
+
+#define MT8365_PIN_80_MSDC2_CMD__FUNC_GPIO80 (MTK_PIN_NO(80) | 0)
+#define MT8365_PIN_80_MSDC2_CMD__FUNC_MSDC2_CMD (MTK_PIN_NO(80) | 1)
+#define MT8365_PIN_80_MSDC2_CMD__FUNC_TDM_TX_LRCK (MTK_PIN_NO(80) | 2)
+#define MT8365_PIN_80_MSDC2_CMD__FUNC_UTXD1 (MTK_PIN_NO(80) | 3)
+#define MT8365_PIN_80_MSDC2_CMD__FUNC_DPI_D19 (MTK_PIN_NO(80) | 4)
+#define MT8365_PIN_80_MSDC2_CMD__FUNC_UDI_TMS_XI (MTK_PIN_NO(80) | 5)
+#define MT8365_PIN_80_MSDC2_CMD__FUNC_ADSP_JTAG_TMS (MTK_PIN_NO(80) | 6)
+
+#define MT8365_PIN_81_MSDC2_CLK__FUNC_GPIO81 (MTK_PIN_NO(81) | 0)
+#define MT8365_PIN_81_MSDC2_CLK__FUNC_MSDC2_CLK (MTK_PIN_NO(81) | 1)
+#define MT8365_PIN_81_MSDC2_CLK__FUNC_TDM_TX_BCK (MTK_PIN_NO(81) | 2)
+#define MT8365_PIN_81_MSDC2_CLK__FUNC_URXD1 (MTK_PIN_NO(81) | 3)
+#define MT8365_PIN_81_MSDC2_CLK__FUNC_DPI_D20 (MTK_PIN_NO(81) | 4)
+#define MT8365_PIN_81_MSDC2_CLK__FUNC_UDI_TCK_XI (MTK_PIN_NO(81) | 5)
+#define MT8365_PIN_81_MSDC2_CLK__FUNC_ADSP_JTAG_TCK (MTK_PIN_NO(81) | 6)
+
+#define MT8365_PIN_82_MSDC2_DAT0__FUNC_GPIO82 (MTK_PIN_NO(82) | 0)
+#define MT8365_PIN_82_MSDC2_DAT0__FUNC_MSDC2_DAT0 (MTK_PIN_NO(82) | 1)
+#define MT8365_PIN_82_MSDC2_DAT0__FUNC_TDM_TX_DATA0 (MTK_PIN_NO(82) | 2)
+#define MT8365_PIN_82_MSDC2_DAT0__FUNC_UTXD2 (MTK_PIN_NO(82) | 3)
+#define MT8365_PIN_82_MSDC2_DAT0__FUNC_DPI_D21 (MTK_PIN_NO(82) | 4)
+#define MT8365_PIN_82_MSDC2_DAT0__FUNC_UDI_TDI_XI (MTK_PIN_NO(82) | 5)
+#define MT8365_PIN_82_MSDC2_DAT0__FUNC_ADSP_JTAG_TDI (MTK_PIN_NO(82) | 6)
+
+#define MT8365_PIN_83_MSDC2_DAT1__FUNC_GPIO83 (MTK_PIN_NO(83) | 0)
+#define MT8365_PIN_83_MSDC2_DAT1__FUNC_MSDC2_DAT1 (MTK_PIN_NO(83) | 1)
+#define MT8365_PIN_83_MSDC2_DAT1__FUNC_TDM_TX_DATA1 (MTK_PIN_NO(83) | 2)
+#define MT8365_PIN_83_MSDC2_DAT1__FUNC_URXD2 (MTK_PIN_NO(83) | 3)
+#define MT8365_PIN_83_MSDC2_DAT1__FUNC_DPI_D22 (MTK_PIN_NO(83) | 4)
+#define MT8365_PIN_83_MSDC2_DAT1__FUNC_UDI_TDO (MTK_PIN_NO(83) | 5)
+#define MT8365_PIN_83_MSDC2_DAT1__FUNC_ADSP_JTAG_TDO (MTK_PIN_NO(83) | 6)
+
+#define MT8365_PIN_84_MSDC2_DAT2__FUNC_GPIO84 (MTK_PIN_NO(84) | 0)
+#define MT8365_PIN_84_MSDC2_DAT2__FUNC_MSDC2_DAT2 (MTK_PIN_NO(84) | 1)
+#define MT8365_PIN_84_MSDC2_DAT2__FUNC_TDM_TX_DATA2 (MTK_PIN_NO(84) | 2)
+#define MT8365_PIN_84_MSDC2_DAT2__FUNC_PWM_A (MTK_PIN_NO(84) | 3)
+#define MT8365_PIN_84_MSDC2_DAT2__FUNC_DPI_D23 (MTK_PIN_NO(84) | 4)
+#define MT8365_PIN_84_MSDC2_DAT2__FUNC_UDI_NTRST_XI (MTK_PIN_NO(84) | 5)
+#define MT8365_PIN_84_MSDC2_DAT2__FUNC_ADSP_JTAG_TRST (MTK_PIN_NO(84) | 6)
+
+#define MT8365_PIN_85_MSDC2_DAT3__FUNC_GPIO85 (MTK_PIN_NO(85) | 0)
+#define MT8365_PIN_85_MSDC2_DAT3__FUNC_MSDC2_DAT3 (MTK_PIN_NO(85) | 1)
+#define MT8365_PIN_85_MSDC2_DAT3__FUNC_TDM_TX_DATA3 (MTK_PIN_NO(85) | 2)
+#define MT8365_PIN_85_MSDC2_DAT3__FUNC_PWM_B (MTK_PIN_NO(85) | 3)
+#define MT8365_PIN_85_MSDC2_DAT3__FUNC_EXT_FRAME_SYNC (MTK_PIN_NO(85) | 5)
+
+#define MT8365_PIN_86_MSDC2_DSL__FUNC_GPIO86 (MTK_PIN_NO(86) | 0)
+#define MT8365_PIN_86_MSDC2_DSL__FUNC_MSDC2_DSL (MTK_PIN_NO(86) | 1)
+#define MT8365_PIN_86_MSDC2_DSL__FUNC_TDM_TX_MCK (MTK_PIN_NO(86) | 2)
+#define MT8365_PIN_86_MSDC2_DSL__FUNC_PWM_C (MTK_PIN_NO(86) | 3)
+
+#define MT8365_PIN_87_MSDC1_CMD__FUNC_GPIO87 (MTK_PIN_NO(87) | 0)
+#define MT8365_PIN_87_MSDC1_CMD__FUNC_MSDC1_CMD (MTK_PIN_NO(87) | 1)
+#define MT8365_PIN_87_MSDC1_CMD__FUNC_CONN_MCU_AICE_TMSC (MTK_PIN_NO(87) | 2)
+#define MT8365_PIN_87_MSDC1_CMD__FUNC_DFD_TMS_XI (MTK_PIN_NO(87) | 3)
+#define MT8365_PIN_87_MSDC1_CMD__FUNC_APU_JTAG_TMS (MTK_PIN_NO(87) | 4)
+#define MT8365_PIN_87_MSDC1_CMD__FUNC_MCU_SPM_TMS (MTK_PIN_NO(87) | 5)
+#define MT8365_PIN_87_MSDC1_CMD__FUNC_CONN_DSP_JMS (MTK_PIN_NO(87) | 6)
+#define MT8365_PIN_87_MSDC1_CMD__FUNC_ADSP_JTAG_TMS (MTK_PIN_NO(87) | 7)
+
+#define MT8365_PIN_88_MSDC1_CLK__FUNC_GPIO88 (MTK_PIN_NO(88) | 0)
+#define MT8365_PIN_88_MSDC1_CLK__FUNC_MSDC1_CLK (MTK_PIN_NO(88) | 1)
+#define MT8365_PIN_88_MSDC1_CLK__FUNC_CONN_MCU_AICE_TCKC (MTK_PIN_NO(88) | 2)
+#define MT8365_PIN_88_MSDC1_CLK__FUNC_DFD_TCK_XI (MTK_PIN_NO(88) | 3)
+#define MT8365_PIN_88_MSDC1_CLK__FUNC_APU_JTAG_TCK (MTK_PIN_NO(88) | 4)
+#define MT8365_PIN_88_MSDC1_CLK__FUNC_MCU_SPM_TCK (MTK_PIN_NO(88) | 5)
+#define MT8365_PIN_88_MSDC1_CLK__FUNC_CONN_DSP_JCK (MTK_PIN_NO(88) | 6)
+#define MT8365_PIN_88_MSDC1_CLK__FUNC_ADSP_JTAG_TCK (MTK_PIN_NO(88) | 7)
+
+#define MT8365_PIN_89_MSDC1_DAT0__FUNC_GPIO89 (MTK_PIN_NO(89) | 0)
+#define MT8365_PIN_89_MSDC1_DAT0__FUNC_MSDC1_DAT0 (MTK_PIN_NO(89) | 1)
+#define MT8365_PIN_89_MSDC1_DAT0__FUNC_PWM_C (MTK_PIN_NO(89) | 2)
+#define MT8365_PIN_89_MSDC1_DAT0__FUNC_DFD_TDI_XI (MTK_PIN_NO(89) | 3)
+#define MT8365_PIN_89_MSDC1_DAT0__FUNC_APU_JTAG_TDI (MTK_PIN_NO(89) | 4)
+#define MT8365_PIN_89_MSDC1_DAT0__FUNC_MCU_SPM_TDI (MTK_PIN_NO(89) | 5)
+#define MT8365_PIN_89_MSDC1_DAT0__FUNC_CONN_DSP_JDI (MTK_PIN_NO(89) | 6)
+#define MT8365_PIN_89_MSDC1_DAT0__FUNC_ADSP_JTAG_TDI (MTK_PIN_NO(89) | 7)
+
+#define MT8365_PIN_90_MSDC1_DAT1__FUNC_GPIO90 (MTK_PIN_NO(90) | 0)
+#define MT8365_PIN_90_MSDC1_DAT1__FUNC_MSDC1_DAT1 (MTK_PIN_NO(90) | 1)
+#define MT8365_PIN_90_MSDC1_DAT1__FUNC_SPDIF_IN (MTK_PIN_NO(90) | 2)
+#define MT8365_PIN_90_MSDC1_DAT1__FUNC_DFD_TDO (MTK_PIN_NO(90) | 3)
+#define MT8365_PIN_90_MSDC1_DAT1__FUNC_APU_JTAG_TDO (MTK_PIN_NO(90) | 4)
+#define MT8365_PIN_90_MSDC1_DAT1__FUNC_MCU_SPM_TDO (MTK_PIN_NO(90) | 5)
+#define MT8365_PIN_90_MSDC1_DAT1__FUNC_CONN_DSP_JDO (MTK_PIN_NO(90) | 6)
+#define MT8365_PIN_90_MSDC1_DAT1__FUNC_ADSP_JTAG_TDO (MTK_PIN_NO(90) | 7)
+
+#define MT8365_PIN_91_MSDC1_DAT2__FUNC_GPIO91 (MTK_PIN_NO(91) | 0)
+#define MT8365_PIN_91_MSDC1_DAT2__FUNC_MSDC1_DAT2 (MTK_PIN_NO(91) | 1)
+#define MT8365_PIN_91_MSDC1_DAT2__FUNC_SPDIF_OUT (MTK_PIN_NO(91) | 2)
+#define MT8365_PIN_91_MSDC1_DAT2__FUNC_DFD_NTRST_XI (MTK_PIN_NO(91) | 3)
+#define MT8365_PIN_91_MSDC1_DAT2__FUNC_APU_JTAG_TRST (MTK_PIN_NO(91) | 4)
+#define MT8365_PIN_91_MSDC1_DAT2__FUNC_MCU_SPM_NTRST (MTK_PIN_NO(91) | 5)
+#define MT8365_PIN_91_MSDC1_DAT2__FUNC_CONN_DSP_JINTP (MTK_PIN_NO(91) | 6)
+#define MT8365_PIN_91_MSDC1_DAT2__FUNC_ADSP_JTAG_TRST (MTK_PIN_NO(91) | 7)
+
+#define MT8365_PIN_92_MSDC1_DAT3__FUNC_GPIO92 (MTK_PIN_NO(92) | 0)
+#define MT8365_PIN_92_MSDC1_DAT3__FUNC_MSDC1_DAT3 (MTK_PIN_NO(92) | 1)
+#define MT8365_PIN_92_MSDC1_DAT3__FUNC_IRRX (MTK_PIN_NO(92) | 2)
+#define MT8365_PIN_92_MSDC1_DAT3__FUNC_PWM_A (MTK_PIN_NO(92) | 3)
+
+#define MT8365_PIN_93_MSDC0_DAT7__FUNC_GPIO93 (MTK_PIN_NO(93) | 0)
+#define MT8365_PIN_93_MSDC0_DAT7__FUNC_MSDC0_DAT7 (MTK_PIN_NO(93) | 1)
+#define MT8365_PIN_93_MSDC0_DAT7__FUNC_NLD7 (MTK_PIN_NO(93) | 2)
+
+#define MT8365_PIN_94_MSDC0_DAT6__FUNC_GPIO94 (MTK_PIN_NO(94) | 0)
+#define MT8365_PIN_94_MSDC0_DAT6__FUNC_MSDC0_DAT6 (MTK_PIN_NO(94) | 1)
+#define MT8365_PIN_94_MSDC0_DAT6__FUNC_NLD6 (MTK_PIN_NO(94) | 2)
+
+#define MT8365_PIN_95_MSDC0_DAT5__FUNC_GPIO95 (MTK_PIN_NO(95) | 0)
+#define MT8365_PIN_95_MSDC0_DAT5__FUNC_MSDC0_DAT5 (MTK_PIN_NO(95) | 1)
+#define MT8365_PIN_95_MSDC0_DAT5__FUNC_NLD4 (MTK_PIN_NO(95) | 2)
+
+#define MT8365_PIN_96_MSDC0_DAT4__FUNC_GPIO96 (MTK_PIN_NO(96) | 0)
+#define MT8365_PIN_96_MSDC0_DAT4__FUNC_MSDC0_DAT4 (MTK_PIN_NO(96) | 1)
+#define MT8365_PIN_96_MSDC0_DAT4__FUNC_NLD3 (MTK_PIN_NO(96) | 2)
+
+#define MT8365_PIN_97_MSDC0_RSTB__FUNC_GPIO97 (MTK_PIN_NO(97) | 0)
+#define MT8365_PIN_97_MSDC0_RSTB__FUNC_MSDC0_RSTB (MTK_PIN_NO(97) | 1)
+#define MT8365_PIN_97_MSDC0_RSTB__FUNC_NLD0 (MTK_PIN_NO(97) | 2)
+
+#define MT8365_PIN_98_MSDC0_CMD__FUNC_GPIO98 (MTK_PIN_NO(98) | 0)
+#define MT8365_PIN_98_MSDC0_CMD__FUNC_MSDC0_CMD (MTK_PIN_NO(98) | 1)
+#define MT8365_PIN_98_MSDC0_CMD__FUNC_NALE (MTK_PIN_NO(98) | 2)
+
+#define MT8365_PIN_99_MSDC0_CLK__FUNC_GPIO99 (MTK_PIN_NO(99) | 0)
+#define MT8365_PIN_99_MSDC0_CLK__FUNC_MSDC0_CLK (MTK_PIN_NO(99) | 1)
+#define MT8365_PIN_99_MSDC0_CLK__FUNC_NWEB (MTK_PIN_NO(99) | 2)
+
+#define MT8365_PIN_100_MSDC0_DAT3__FUNC_GPIO100 (MTK_PIN_NO(100) | 0)
+#define MT8365_PIN_100_MSDC0_DAT3__FUNC_MSDC0_DAT3 (MTK_PIN_NO(100) | 1)
+#define MT8365_PIN_100_MSDC0_DAT3__FUNC_NLD1 (MTK_PIN_NO(100) | 2)
+
+#define MT8365_PIN_101_MSDC0_DAT2__FUNC_GPIO101 (MTK_PIN_NO(101) | 0)
+#define MT8365_PIN_101_MSDC0_DAT2__FUNC_MSDC0_DAT2 (MTK_PIN_NO(101) | 1)
+#define MT8365_PIN_101_MSDC0_DAT2__FUNC_NLD5 (MTK_PIN_NO(101) | 2)
+
+#define MT8365_PIN_102_MSDC0_DAT1__FUNC_GPIO102 (MTK_PIN_NO(102) | 0)
+#define MT8365_PIN_102_MSDC0_DAT1__FUNC_MSDC0_DAT1 (MTK_PIN_NO(102) | 1)
+#define MT8365_PIN_102_MSDC0_DAT1__FUNC_NDQS (MTK_PIN_NO(102) | 2)
+
+#define MT8365_PIN_103_MSDC0_DAT0__FUNC_GPIO103 (MTK_PIN_NO(103) | 0)
+#define MT8365_PIN_103_MSDC0_DAT0__FUNC_MSDC0_DAT0 (MTK_PIN_NO(103) | 1)
+#define MT8365_PIN_103_MSDC0_DAT0__FUNC_NLD2 (MTK_PIN_NO(103) | 2)
+
+#define MT8365_PIN_104_MSDC0_DSL__FUNC_GPIO104 (MTK_PIN_NO(104) | 0)
+#define MT8365_PIN_104_MSDC0_DSL__FUNC_MSDC0_DSL (MTK_PIN_NO(104) | 1)
+
+#define MT8365_PIN_105_NCLE__FUNC_GPIO105 (MTK_PIN_NO(105) | 0)
+#define MT8365_PIN_105_NCLE__FUNC_NCLE (MTK_PIN_NO(105) | 1)
+#define MT8365_PIN_105_NCLE__FUNC_TDM_RX_MCK (MTK_PIN_NO(105) | 2)
+#define MT8365_PIN_105_NCLE__FUNC_DBG_MON_B12 (MTK_PIN_NO(105) | 7)
+
+#define MT8365_PIN_106_NCEB1__FUNC_GPIO106 (MTK_PIN_NO(106) | 0)
+#define MT8365_PIN_106_NCEB1__FUNC_NCEB1 (MTK_PIN_NO(106) | 1)
+#define MT8365_PIN_106_NCEB1__FUNC_TDM_RX_BCK (MTK_PIN_NO(106) | 2)
+#define MT8365_PIN_106_NCEB1__FUNC_DBG_MON_B13 (MTK_PIN_NO(106) | 7)
+
+#define MT8365_PIN_107_NCEB0__FUNC_GPIO107 (MTK_PIN_NO(107) | 0)
+#define MT8365_PIN_107_NCEB0__FUNC_NCEB0 (MTK_PIN_NO(107) | 1)
+#define MT8365_PIN_107_NCEB0__FUNC_TDM_RX_LRCK (MTK_PIN_NO(107) | 2)
+#define MT8365_PIN_107_NCEB0__FUNC_DBG_MON_B14 (MTK_PIN_NO(107) | 7)
+
+#define MT8365_PIN_108_NREB__FUNC_GPIO108 (MTK_PIN_NO(108) | 0)
+#define MT8365_PIN_108_NREB__FUNC_NREB (MTK_PIN_NO(108) | 1)
+#define MT8365_PIN_108_NREB__FUNC_TDM_RX_DI (MTK_PIN_NO(108) | 2)
+#define MT8365_PIN_108_NREB__FUNC_DBG_MON_B15 (MTK_PIN_NO(108) | 7)
+
+#define MT8365_PIN_109_NRNB__FUNC_GPIO109 (MTK_PIN_NO(109) | 0)
+#define MT8365_PIN_109_NRNB__FUNC_NRNB (MTK_PIN_NO(109) | 1)
+#define MT8365_PIN_109_NRNB__FUNC_TSF_IN (MTK_PIN_NO(109) | 2)
+#define MT8365_PIN_109_NRNB__FUNC_DBG_MON_B16 (MTK_PIN_NO(109) | 7)
+
+#define MT8365_PIN_110_PCM_CLK__FUNC_GPIO110 (MTK_PIN_NO(110) | 0)
+#define MT8365_PIN_110_PCM_CLK__FUNC_PCM_CLK (MTK_PIN_NO(110) | 1)
+#define MT8365_PIN_110_PCM_CLK__FUNC_I2S0_BCK (MTK_PIN_NO(110) | 2)
+#define MT8365_PIN_110_PCM_CLK__FUNC_I2S3_BCK (MTK_PIN_NO(110) | 3)
+#define MT8365_PIN_110_PCM_CLK__FUNC_SPDIF_IN (MTK_PIN_NO(110) | 4)
+#define MT8365_PIN_110_PCM_CLK__FUNC_DPI_D15 (MTK_PIN_NO(110) | 5)
+
+#define MT8365_PIN_111_PCM_SYNC__FUNC_GPIO111 (MTK_PIN_NO(111) | 0)
+#define MT8365_PIN_111_PCM_SYNC__FUNC_PCM_SYNC (MTK_PIN_NO(111) | 1)
+#define MT8365_PIN_111_PCM_SYNC__FUNC_I2S0_LRCK (MTK_PIN_NO(111) | 2)
+#define MT8365_PIN_111_PCM_SYNC__FUNC_I2S3_LRCK (MTK_PIN_NO(111) | 3)
+#define MT8365_PIN_111_PCM_SYNC__FUNC_SPDIF_OUT (MTK_PIN_NO(111) | 4)
+#define MT8365_PIN_111_PCM_SYNC__FUNC_DPI_D16 (MTK_PIN_NO(111) | 5)
+
+#define MT8365_PIN_112_PCM_RX__FUNC_GPIO112 (MTK_PIN_NO(112) | 0)
+#define MT8365_PIN_112_PCM_RX__FUNC_PCM_RX (MTK_PIN_NO(112) | 1)
+#define MT8365_PIN_112_PCM_RX__FUNC_I2S0_DI (MTK_PIN_NO(112) | 2)
+#define MT8365_PIN_112_PCM_RX__FUNC_I2S3_MCK (MTK_PIN_NO(112) | 3)
+#define MT8365_PIN_112_PCM_RX__FUNC_IRRX (MTK_PIN_NO(112) | 4)
+#define MT8365_PIN_112_PCM_RX__FUNC_DPI_D17 (MTK_PIN_NO(112) | 5)
+
+#define MT8365_PIN_113_PCM_TX__FUNC_GPIO113 (MTK_PIN_NO(113) | 0)
+#define MT8365_PIN_113_PCM_TX__FUNC_PCM_TX (MTK_PIN_NO(113) | 1)
+#define MT8365_PIN_113_PCM_TX__FUNC_I2S0_MCK (MTK_PIN_NO(113) | 2)
+#define MT8365_PIN_113_PCM_TX__FUNC_I2S3_DO (MTK_PIN_NO(113) | 3)
+#define MT8365_PIN_113_PCM_TX__FUNC_PWM_B (MTK_PIN_NO(113) | 4)
+#define MT8365_PIN_113_PCM_TX__FUNC_DPI_D18 (MTK_PIN_NO(113) | 5)
+
+#define MT8365_PIN_114_I2S_DATA_IN__FUNC_GPIO114 (MTK_PIN_NO(114) | 0)
+#define MT8365_PIN_114_I2S_DATA_IN__FUNC_I2S0_DI (MTK_PIN_NO(114) | 1)
+#define MT8365_PIN_114_I2S_DATA_IN__FUNC_I2S1_DO (MTK_PIN_NO(114) | 2)
+#define MT8365_PIN_114_I2S_DATA_IN__FUNC_I2S2_DI (MTK_PIN_NO(114) | 3)
+#define MT8365_PIN_114_I2S_DATA_IN__FUNC_I2S3_DO (MTK_PIN_NO(114) | 4)
+#define MT8365_PIN_114_I2S_DATA_IN__FUNC_PWM_A (MTK_PIN_NO(114) | 5)
+#define MT8365_PIN_114_I2S_DATA_IN__FUNC_SPDIF_IN (MTK_PIN_NO(114) | 6)
+#define MT8365_PIN_114_I2S_DATA_IN__FUNC_DBG_MON_B17 (MTK_PIN_NO(114) | 7)
+
+#define MT8365_PIN_115_I2S_LRCK__FUNC_GPIO115 (MTK_PIN_NO(115) | 0)
+#define MT8365_PIN_115_I2S_LRCK__FUNC_I2S0_LRCK (MTK_PIN_NO(115) | 1)
+#define MT8365_PIN_115_I2S_LRCK__FUNC_I2S1_LRCK (MTK_PIN_NO(115) | 2)
+#define MT8365_PIN_115_I2S_LRCK__FUNC_I2S2_LRCK (MTK_PIN_NO(115) | 3)
+#define MT8365_PIN_115_I2S_LRCK__FUNC_I2S3_LRCK (MTK_PIN_NO(115) | 4)
+#define MT8365_PIN_115_I2S_LRCK__FUNC_PWM_B (MTK_PIN_NO(115) | 5)
+#define MT8365_PIN_115_I2S_LRCK__FUNC_SPDIF_OUT (MTK_PIN_NO(115) | 6)
+#define MT8365_PIN_115_I2S_LRCK__FUNC_DBG_MON_B18 (MTK_PIN_NO(115) | 7)
+
+#define MT8365_PIN_116_I2S_BCK__FUNC_GPIO116 (MTK_PIN_NO(116) | 0)
+#define MT8365_PIN_116_I2S_BCK__FUNC_I2S0_BCK (MTK_PIN_NO(116) | 1)
+#define MT8365_PIN_116_I2S_BCK__FUNC_I2S1_BCK (MTK_PIN_NO(116) | 2)
+#define MT8365_PIN_116_I2S_BCK__FUNC_I2S2_BCK (MTK_PIN_NO(116) | 3)
+#define MT8365_PIN_116_I2S_BCK__FUNC_I2S3_BCK (MTK_PIN_NO(116) | 4)
+#define MT8365_PIN_116_I2S_BCK__FUNC_PWM_C (MTK_PIN_NO(116) | 5)
+#define MT8365_PIN_116_I2S_BCK__FUNC_IRRX (MTK_PIN_NO(116) | 6)
+#define MT8365_PIN_116_I2S_BCK__FUNC_DBG_MON_B19 (MTK_PIN_NO(116) | 7)
+
+#define MT8365_PIN_117_DMIC0_CLK__FUNC_GPIO117 (MTK_PIN_NO(117) | 0)
+#define MT8365_PIN_117_DMIC0_CLK__FUNC_DMIC0_CLK (MTK_PIN_NO(117) | 1)
+#define MT8365_PIN_117_DMIC0_CLK__FUNC_I2S2_BCK (MTK_PIN_NO(117) | 2)
+#define MT8365_PIN_117_DMIC0_CLK__FUNC_DBG_MON_B20 (MTK_PIN_NO(117) | 7)
+
+#define MT8365_PIN_118_DMIC0_DAT0__FUNC_GPIO118 (MTK_PIN_NO(118) | 0)
+#define MT8365_PIN_118_DMIC0_DAT0__FUNC_DMIC0_DAT0 (MTK_PIN_NO(118) | 1)
+#define MT8365_PIN_118_DMIC0_DAT0__FUNC_I2S2_DI (MTK_PIN_NO(118) | 2)
+#define MT8365_PIN_118_DMIC0_DAT0__FUNC_DBG_MON_B21 (MTK_PIN_NO(118) | 7)
+
+#define MT8365_PIN_119_DMIC0_DAT1__FUNC_GPIO119 (MTK_PIN_NO(119) | 0)
+#define MT8365_PIN_119_DMIC0_DAT1__FUNC_DMIC0_DAT1 (MTK_PIN_NO(119) | 1)
+#define MT8365_PIN_119_DMIC0_DAT1__FUNC_I2S2_LRCK (MTK_PIN_NO(119) | 2)
+#define MT8365_PIN_119_DMIC0_DAT1__FUNC_DBG_MON_B22 (MTK_PIN_NO(119) | 7)
+
+#define MT8365_PIN_120_DMIC1_CLK__FUNC_GPIO120 (MTK_PIN_NO(120) | 0)
+#define MT8365_PIN_120_DMIC1_CLK__FUNC_DMIC1_CLK (MTK_PIN_NO(120) | 1)
+#define MT8365_PIN_120_DMIC1_CLK__FUNC_I2S2_MCK (MTK_PIN_NO(120) | 2)
+#define MT8365_PIN_120_DMIC1_CLK__FUNC_DBG_MON_B23 (MTK_PIN_NO(120) | 7)
+
+#define MT8365_PIN_121_DMIC1_DAT0__FUNC_GPIO121 (MTK_PIN_NO(121) | 0)
+#define MT8365_PIN_121_DMIC1_DAT0__FUNC_DMIC1_DAT0 (MTK_PIN_NO(121) | 1)
+#define MT8365_PIN_121_DMIC1_DAT0__FUNC_I2S1_BCK (MTK_PIN_NO(121) | 2)
+#define MT8365_PIN_121_DMIC1_DAT0__FUNC_DBG_MON_B24 (MTK_PIN_NO(121) | 7)
+
+#define MT8365_PIN_122_DMIC1_DAT1__FUNC_GPIO122 (MTK_PIN_NO(122) | 0)
+#define MT8365_PIN_122_DMIC1_DAT1__FUNC_DMIC1_DAT1 (MTK_PIN_NO(122) | 1)
+#define MT8365_PIN_122_DMIC1_DAT1__FUNC_I2S1_LRCK (MTK_PIN_NO(122) | 2)
+#define MT8365_PIN_122_DMIC1_DAT1__FUNC_DBG_MON_B25 (MTK_PIN_NO(122) | 7)
+
+#define MT8365_PIN_123_DMIC2_CLK__FUNC_GPIO123 (MTK_PIN_NO(123) | 0)
+#define MT8365_PIN_123_DMIC2_CLK__FUNC_DMIC2_CLK (MTK_PIN_NO(123) | 1)
+#define MT8365_PIN_123_DMIC2_CLK__FUNC_I2S1_MCK (MTK_PIN_NO(123) | 2)
+#define MT8365_PIN_123_DMIC2_CLK__FUNC_DBG_MON_B26 (MTK_PIN_NO(123) | 7)
+
+#define MT8365_PIN_124_DMIC2_DAT0__FUNC_GPIO124 (MTK_PIN_NO(124) | 0)
+#define MT8365_PIN_124_DMIC2_DAT0__FUNC_DMIC2_DAT0 (MTK_PIN_NO(124) | 1)
+#define MT8365_PIN_124_DMIC2_DAT0__FUNC_I2S1_DO (MTK_PIN_NO(124) | 2)
+#define MT8365_PIN_124_DMIC2_DAT0__FUNC_DBG_MON_B27 (MTK_PIN_NO(124) | 7)
+
+#define MT8365_PIN_125_DMIC2_DAT1__FUNC_GPIO125 (MTK_PIN_NO(125) | 0)
+#define MT8365_PIN_125_DMIC2_DAT1__FUNC_DMIC2_DAT1 (MTK_PIN_NO(125) | 1)
+#define MT8365_PIN_125_DMIC2_DAT1__FUNC_TDM_RX_BCK (MTK_PIN_NO(125) | 2)
+#define MT8365_PIN_125_DMIC2_DAT1__FUNC_DBG_MON_B28 (MTK_PIN_NO(125) | 7)
+
+#define MT8365_PIN_126_DMIC3_CLK__FUNC_GPIO126 (MTK_PIN_NO(126) | 0)
+#define MT8365_PIN_126_DMIC3_CLK__FUNC_DMIC3_CLK (MTK_PIN_NO(126) | 1)
+#define MT8365_PIN_126_DMIC3_CLK__FUNC_TDM_RX_LRCK (MTK_PIN_NO(126) | 2)
+
+#define MT8365_PIN_127_DMIC3_DAT0__FUNC_GPIO127 (MTK_PIN_NO(127) | 0)
+#define MT8365_PIN_127_DMIC3_DAT0__FUNC_DMIC3_DAT0 (MTK_PIN_NO(127) | 1)
+#define MT8365_PIN_127_DMIC3_DAT0__FUNC_TDM_RX_DI (MTK_PIN_NO(127) | 2)
+
+#define MT8365_PIN_128_DMIC3_DAT1__FUNC_GPIO128 (MTK_PIN_NO(128) | 0)
+#define MT8365_PIN_128_DMIC3_DAT1__FUNC_DMIC3_DAT1 (MTK_PIN_NO(128) | 1)
+#define MT8365_PIN_128_DMIC3_DAT1__FUNC_TDM_RX_MCK (MTK_PIN_NO(128) | 2)
+#define MT8365_PIN_128_DMIC3_DAT1__FUNC_VAD_CLK (MTK_PIN_NO(128) | 3)
+
+#define MT8365_PIN_129_TDM_TX_BCK__FUNC_GPIO129 (MTK_PIN_NO(129) | 0)
+#define MT8365_PIN_129_TDM_TX_BCK__FUNC_TDM_TX_BCK (MTK_PIN_NO(129) | 1)
+#define MT8365_PIN_129_TDM_TX_BCK__FUNC_I2S3_BCK (MTK_PIN_NO(129) | 2)
+#define MT8365_PIN_129_TDM_TX_BCK__FUNC_ckmon1_ck (MTK_PIN_NO(129) | 3)
+
+#define MT8365_PIN_130_TDM_TX_LRCK__FUNC_GPIO130 (MTK_PIN_NO(130) | 0)
+#define MT8365_PIN_130_TDM_TX_LRCK__FUNC_TDM_TX_LRCK (MTK_PIN_NO(130) | 1)
+#define MT8365_PIN_130_TDM_TX_LRCK__FUNC_I2S3_LRCK (MTK_PIN_NO(130) | 2)
+#define MT8365_PIN_130_TDM_TX_LRCK__FUNC_ckmon2_ck (MTK_PIN_NO(130) | 3)
+
+#define MT8365_PIN_131_TDM_TX_MCK__FUNC_GPIO131 (MTK_PIN_NO(131) | 0)
+#define MT8365_PIN_131_TDM_TX_MCK__FUNC_TDM_TX_MCK (MTK_PIN_NO(131) | 1)
+#define MT8365_PIN_131_TDM_TX_MCK__FUNC_I2S3_MCK (MTK_PIN_NO(131) | 2)
+#define MT8365_PIN_131_TDM_TX_MCK__FUNC_ckmon3_ck (MTK_PIN_NO(131) | 3)
+
+#define MT8365_PIN_132_TDM_TX_DATA0__FUNC_GPIO132 (MTK_PIN_NO(132) | 0)
+#define MT8365_PIN_132_TDM_TX_DATA0__FUNC_TDM_TX_DATA0 (MTK_PIN_NO(132) | 1)
+#define MT8365_PIN_132_TDM_TX_DATA0__FUNC_I2S3_DO (MTK_PIN_NO(132) | 2)
+#define MT8365_PIN_132_TDM_TX_DATA0__FUNC_ckmon4_ck (MTK_PIN_NO(132) | 3)
+#define MT8365_PIN_132_TDM_TX_DATA0__FUNC_DBG_MON_B29 (MTK_PIN_NO(132) | 7)
+
+#define MT8365_PIN_133_TDM_TX_DATA1__FUNC_GPIO133 (MTK_PIN_NO(133) | 0)
+#define MT8365_PIN_133_TDM_TX_DATA1__FUNC_TDM_TX_DATA1 (MTK_PIN_NO(133) | 1)
+#define MT8365_PIN_133_TDM_TX_DATA1__FUNC_DBG_MON_B30 (MTK_PIN_NO(133) | 7)
+
+#define MT8365_PIN_134_TDM_TX_DATA2__FUNC_GPIO134 (MTK_PIN_NO(134) | 0)
+#define MT8365_PIN_134_TDM_TX_DATA2__FUNC_TDM_TX_DATA2 (MTK_PIN_NO(134) | 1)
+#define MT8365_PIN_134_TDM_TX_DATA2__FUNC_DBG_MON_B31 (MTK_PIN_NO(134) | 7)
+
+#define MT8365_PIN_135_TDM_TX_DATA3__FUNC_GPIO135 (MTK_PIN_NO(135) | 0)
+#define MT8365_PIN_135_TDM_TX_DATA3__FUNC_TDM_TX_DATA3 (MTK_PIN_NO(135) | 1)
+#define MT8365_PIN_135_TDM_TX_DATA3__FUNC_DBG_MON_B32 (MTK_PIN_NO(135) | 7)
+
+#define MT8365_PIN_136_CONN_TOP_CLK__FUNC_GPIO136 (MTK_PIN_NO(136) | 0)
+#define MT8365_PIN_136_CONN_TOP_CLK__FUNC_CONN_TOP_CLK (MTK_PIN_NO(136) | 1)
+
+#define MT8365_PIN_137_CONN_TOP_DATA__FUNC_GPIO137 (MTK_PIN_NO(137) | 0)
+#define MT8365_PIN_137_CONN_TOP_DATA__FUNC_CONN_TOP_DATA (MTK_PIN_NO(137) | 1)
+
+#define MT8365_PIN_138_CONN_HRST_B__FUNC_GPIO138 (MTK_PIN_NO(138) | 0)
+#define MT8365_PIN_138_CONN_HRST_B__FUNC_CONN_HRST_B (MTK_PIN_NO(138) | 1)
+
+#define MT8365_PIN_139_CONN_WB_PTA__FUNC_GPIO139 (MTK_PIN_NO(139) | 0)
+#define MT8365_PIN_139_CONN_WB_PTA__FUNC_CONN_WB_PTA (MTK_PIN_NO(139) | 1)
+
+#define MT8365_PIN_140_CONN_BT_CLK__FUNC_GPIO140 (MTK_PIN_NO(140) | 0)
+#define MT8365_PIN_140_CONN_BT_CLK__FUNC_CONN_BT_CLK (MTK_PIN_NO(140) | 1)
+
+#define MT8365_PIN_141_CONN_BT_DATA__FUNC_GPIO141 (MTK_PIN_NO(141) | 0)
+#define MT8365_PIN_141_CONN_BT_DATA__FUNC_CONN_BT_DATA (MTK_PIN_NO(141) | 1)
+
+#define MT8365_PIN_142_CONN_WF_CTRL0__FUNC_GPIO142 (MTK_PIN_NO(142) | 0)
+#define MT8365_PIN_142_CONN_WF_CTRL0__FUNC_CONN_WF_CTRL0 (MTK_PIN_NO(142) | 1)
+
+#define MT8365_PIN_143_CONN_WF_CTRL1__FUNC_GPIO143 (MTK_PIN_NO(143) | 0)
+#define MT8365_PIN_143_CONN_WF_CTRL1__FUNC_CONN_WF_CTRL1 (MTK_PIN_NO(143) | 1)
+
+#define MT8365_PIN_144_CONN_WF_CTRL2__FUNC_GPIO144 (MTK_PIN_NO(144) | 0)
+#define MT8365_PIN_144_CONN_WF_CTRL2__FUNC_CONN_WF_CTRL2 (MTK_PIN_NO(144) | 1)
+
+#endif /* __MT8365_PINFUNC_H */
diff --git a/include/dt-bindings/pmic/max77663.h b/include/dt-bindings/pmic/max77663.h
new file mode 100644
index 0000000..ee169a8
--- /dev/null
+++ b/include/dt-bindings/pmic/max77663.h
@@ -0,0 +1,18 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright(C) 2023 Svyatoslav Ryhel <clamor95@gmail.com>
+ */
+
+#ifndef _DT_BINDINGS_MAX77663_H_
+#define _DT_BINDINGS_MAX77663_H_
+
+/*
+ * MAX77663 has 8 GPIO (0 to 7) and 3 KEYS
+ * KEYS are appended after GPIOs
+ */
+
+#define EN0 10
+#define ACOK 9
+#define LID 8
+
+#endif
diff --git a/include/dt-bindings/power/mediatek,mt8365-power.h b/include/dt-bindings/power/mediatek,mt8365-power.h
new file mode 100644
index 0000000..e6cfd0e
--- /dev/null
+++ b/include/dt-bindings/power/mediatek,mt8365-power.h
@@ -0,0 +1,19 @@
+/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
+/*
+ * Copyright (c) 2022 MediaTek Inc.
+ */
+
+#ifndef _DT_BINDINGS_POWER_MT8365_POWER_H
+#define _DT_BINDINGS_POWER_MT8365_POWER_H
+
+#define MT8365_POWER_DOMAIN_MM 0
+#define MT8365_POWER_DOMAIN_CONN 1
+#define MT8365_POWER_DOMAIN_MFG 2
+#define MT8365_POWER_DOMAIN_AUDIO 3
+#define MT8365_POWER_DOMAIN_CAM 4
+#define MT8365_POWER_DOMAIN_DSP 5
+#define MT8365_POWER_DOMAIN_VDEC 6
+#define MT8365_POWER_DOMAIN_VENC 7
+#define MT8365_POWER_DOMAIN_APU 8
+
+#endif /* _DT_BINDINGS_POWER_MT8365_POWER_H */
diff --git a/include/dt-bindings/reset/qcom,ipq4019-reset.h b/include/dt-bindings/reset/qcom,ipq4019-reset.h
deleted file mode 100644
index ed047d7..0000000
--- a/include/dt-bindings/reset/qcom,ipq4019-reset.h
+++ /dev/null
@@ -1,92 +0,0 @@
-/* Copyright (c) 2015 The Linux Foundation. All rights reserved.
- *
- * Permission to use, copy, modify, and/or distribute this software for any
- * purpose with or without fee is hereby granted, provided that the above
- * copyright notice and this permission notice appear in all copies.
- *
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
- *
- */
-#ifndef __QCOM_RESET_IPQ4019_H__
-#define __QCOM_RESET_IPQ4019_H__
-
-#define WIFI0_CPU_INIT_RESET 0
-#define WIFI0_RADIO_SRIF_RESET 1
-#define WIFI0_RADIO_WARM_RESET 2
-#define WIFI0_RADIO_COLD_RESET 3
-#define WIFI0_CORE_WARM_RESET 4
-#define WIFI0_CORE_COLD_RESET 5
-#define WIFI1_CPU_INIT_RESET 6
-#define WIFI1_RADIO_SRIF_RESET 7
-#define WIFI1_RADIO_WARM_RESET 8
-#define WIFI1_RADIO_COLD_RESET 9
-#define WIFI1_CORE_WARM_RESET 10
-#define WIFI1_CORE_COLD_RESET 11
-#define USB3_UNIPHY_PHY_ARES 12
-#define USB3_HSPHY_POR_ARES 13
-#define USB3_HSPHY_S_ARES 14
-#define USB2_HSPHY_POR_ARES 15
-#define USB2_HSPHY_S_ARES 16
-#define PCIE_PHY_AHB_ARES 17
-#define PCIE_AHB_ARES 18
-#define PCIE_PWR_ARES 19
-#define PCIE_PIPE_STICKY_ARES 20
-#define PCIE_AXI_M_STICKY_ARES 21
-#define PCIE_PHY_ARES 22
-#define PCIE_PARF_XPU_ARES 23
-#define PCIE_AXI_S_XPU_ARES 24
-#define PCIE_AXI_M_VMIDMT_ARES 25
-#define PCIE_PIPE_ARES 26
-#define PCIE_AXI_S_ARES 27
-#define PCIE_AXI_M_ARES 28
-#define ESS_RESET 29
-#define GCC_BLSP1_BCR 30
-#define GCC_BLSP1_QUP1_BCR 31
-#define GCC_BLSP1_UART1_BCR 32
-#define GCC_BLSP1_QUP2_BCR 33
-#define GCC_BLSP1_UART2_BCR 34
-#define GCC_BIMC_BCR 35
-#define GCC_TLMM_BCR 36
-#define GCC_IMEM_BCR 37
-#define GCC_ESS_BCR 38
-#define GCC_PRNG_BCR 39
-#define GCC_BOOT_ROM_BCR 40
-#define GCC_CRYPTO_BCR 41
-#define GCC_SDCC1_BCR 42
-#define GCC_SEC_CTRL_BCR 43
-#define GCC_AUDIO_BCR 44
-#define GCC_QPIC_BCR 45
-#define GCC_PCIE_BCR 46
-#define GCC_USB2_BCR 47
-#define GCC_USB2_PHY_BCR 48
-#define GCC_USB3_BCR 49
-#define GCC_USB3_PHY_BCR 50
-#define GCC_SYSTEM_NOC_BCR 51
-#define GCC_PCNOC_BCR 52
-#define GCC_DCD_BCR 53
-#define GCC_SNOC_BUS_TIMEOUT0_BCR 54
-#define GCC_SNOC_BUS_TIMEOUT1_BCR 55
-#define GCC_SNOC_BUS_TIMEOUT2_BCR 56
-#define GCC_SNOC_BUS_TIMEOUT3_BCR 57
-#define GCC_PCNOC_BUS_TIMEOUT0_BCR 58
-#define GCC_PCNOC_BUS_TIMEOUT1_BCR 59
-#define GCC_PCNOC_BUS_TIMEOUT2_BCR 60
-#define GCC_PCNOC_BUS_TIMEOUT3_BCR 61
-#define GCC_PCNOC_BUS_TIMEOUT4_BCR 62
-#define GCC_PCNOC_BUS_TIMEOUT5_BCR 63
-#define GCC_PCNOC_BUS_TIMEOUT6_BCR 64
-#define GCC_PCNOC_BUS_TIMEOUT7_BCR 65
-#define GCC_PCNOC_BUS_TIMEOUT8_BCR 66
-#define GCC_PCNOC_BUS_TIMEOUT9_BCR 67
-#define GCC_TCSR_BCR 68
-#define GCC_QDSS_BCR 69
-#define GCC_MPM_BCR 70
-#define GCC_SPDM_BCR 71
-
-#endif
diff --git a/include/efi_api.h b/include/efi_api.h
index 0e92cb8..ab40b1b 100644
--- a/include/efi_api.h
+++ b/include/efi_api.h
@@ -433,6 +433,10 @@
EFI_GUID(0xeb9d2d31, 0x2d88, 0x11d3, \
0x9a, 0x16, 0x00, 0x90, 0x27, 0x3f, 0xc1, 0x4d)
+#define SMBIOS3_TABLE_GUID \
+ EFI_GUID(0xf2fd1544, 0x9794, 0x4a2c, \
+ 0x99, 0x2e, 0xe5, 0xbb, 0xcf, 0x20, 0xe3, 0x94)
+
#define EFI_LOAD_FILE_PROTOCOL_GUID \
EFI_GUID(0x56ec3091, 0x954c, 0x11d2, \
0x8e, 0x3f, 0x00, 0xa0, 0xc9, 0x69, 0x72, 0x3b)
diff --git a/include/efi_loader.h b/include/efi_loader.h
index 664dae2..5c5af4f 100644
--- a/include/efi_loader.h
+++ b/include/efi_loader.h
@@ -90,9 +90,7 @@
* back to u-boot world
*/
void efi_restore_gd(void);
-/* Call this to set the current device name */
-void efi_set_bootdev(const char *dev, const char *devnr, const char *path,
- void *buffer, size_t buffer_size);
+
/* Called by networking code to memorize the dhcp ack package */
void efi_net_set_dhcp_ack(void *pkt, int len);
/* Print information about all loaded images */
@@ -114,9 +112,6 @@
/* No loader configured, stub out EFI_ENTRY */
static inline void efi_restore_gd(void) { }
-static inline void efi_set_bootdev(const char *dev, const char *devnr,
- const char *path, void *buffer,
- size_t buffer_size) { }
static inline void efi_net_set_dhcp_ack(void *pkt, int len) { }
static inline void efi_print_image_infos(void *pc) { }
static inline efi_status_t efi_launch_capsules(void)
@@ -126,6 +121,20 @@
#endif /* CONFIG_IS_ENABLED(EFI_LOADER) */
+#if CONFIG_IS_ENABLED(EFI_BINARY_EXEC)
+/* Call this to unset the current device name */
+void efi_clear_bootdev(void);
+/* Call this to set the current device name */
+void efi_set_bootdev(const char *dev, const char *devnr, const char *path,
+ void *buffer, size_t buffer_size);
+#else
+static inline void efi_clear_bootdev(void) { }
+
+static inline void efi_set_bootdev(const char *dev, const char *devnr,
+ const char *path, void *buffer,
+ size_t buffer_size) { }
+#endif
+
/* Maximum number of configuration tables */
#define EFI_MAX_CONFIGURATION_TABLES 16
@@ -331,6 +340,7 @@
extern const efi_guid_t efi_esrt_guid;
/* GUID of the SMBIOS table */
extern const efi_guid_t smbios_guid;
+extern const efi_guid_t smbios3_guid;
/*GUID of console */
extern const efi_guid_t efi_guid_text_input_protocol;
extern const efi_guid_t efi_guid_text_output_protocol;
@@ -527,14 +537,21 @@
efi_status_t efi_bootmgr_update_media_device_boot_option(void);
/* Delete selected boot option */
efi_status_t efi_bootmgr_delete_boot_option(u16 boot_index);
+/* Invoke EFI boot manager */
+efi_status_t efi_bootmgr_run(void *fdt);
/* search the boot option index in BootOrder */
bool efi_search_bootorder(u16 *bootorder, efi_uintn_t num, u32 target, u32 *index);
/* Set up console modes */
void efi_setup_console_size(void);
+/* Set up load options from environment variable */
+efi_status_t efi_env_set_load_options(efi_handle_t handle, const char *env_var,
+ u16 **load_options);
/* Install device tree */
efi_status_t efi_install_fdt(void *fdt);
-/* Run loaded UEFI image */
-efi_status_t efi_run_image(void *source_buffer, efi_uintn_t source_size);
+/* Execute loaded UEFI image */
+efi_status_t do_bootefi_exec(efi_handle_t handle, void *load_options);
+/* Run loaded UEFI image with given fdt */
+efi_status_t efi_binary_run(void *image, size_t size, void *fdt);
/* Initialize variable services */
efi_status_t efi_init_variables(void);
/* Notify ExitBootServices() is called */
@@ -809,8 +826,6 @@
/* size of multi-instance device path excluding end node */
efi_uintn_t efi_dp_size(const struct efi_device_path *dp);
struct efi_device_path *efi_dp_dup(const struct efi_device_path *dp);
-struct efi_device_path *efi_dp_append(const struct efi_device_path *dp1,
- const struct efi_device_path *dp2);
struct efi_device_path *efi_dp_append_node(const struct efi_device_path *dp,
const struct efi_device_path *node);
/* Create a device path node of given type, sub-type, length */
@@ -879,14 +894,12 @@
efi_status_t __efi_runtime EFIAPI efi_set_time(struct efi_time *time);
-#ifdef CONFIG_CMD_BOOTEFI_SELFTEST
/*
* Entry point for the tests of the EFI API.
* It is called by 'bootefi selftest'
*/
efi_status_t EFIAPI efi_selftest(efi_handle_t image_handle,
struct efi_system_table *systab);
-#endif
efi_status_t EFIAPI efi_get_variable(u16 *variable_name,
const efi_guid_t *vendor, u32 *attributes,
@@ -929,7 +942,8 @@
struct efi_device_path *efi_dp_from_lo(struct efi_load_option *lo,
const efi_guid_t *guid);
struct efi_device_path *efi_dp_concat(const struct efi_device_path *dp1,
- const struct efi_device_path *dp2);
+ const struct efi_device_path *dp2,
+ bool split_end_node);
struct efi_device_path *search_gpt_dp_node(struct efi_device_path *device_path);
efi_status_t efi_deserialize_load_option(struct efi_load_option *lo, u8 *data,
efi_uintn_t *size);
diff --git a/include/env.h b/include/env.h
index 9778e3e..d2a5954 100644
--- a/include/env.h
+++ b/include/env.h
@@ -356,6 +356,16 @@
*/
char *env_get_default(const char *name);
+/**
+ * env_get_default_into() - Look up a variable from the default environment and
+ * copy its value in buf.
+ *
+ * @name: Variable to look up
+ * Return: actual length of the variable value excluding the terminating
+ * NULL-byte, or -1 if the variable is not found
+ */
+int env_get_default_into(const char *name, char *buf, unsigned int len);
+
/* [re]set to the default environment */
void env_set_default(const char *s, int flags);
diff --git a/include/env/ti/ti_common.env b/include/env/ti/ti_common.env
index f5d8421..02b410c 100644
--- a/include/env/ti/ti_common.env
+++ b/include/env/ti/ti_common.env
@@ -22,10 +22,14 @@
done;
get_fit_config=setexpr name_fit_config gsub / _ conf-${fdtfile}
run_fit=run get_fit_config; bootm ${addr_fit}#${name_fit_config}${overlaystring}
+do_main_cpsw0_qsgmii_phyinit=0
bootcmd_ti_mmc=
run findfdt; run init_${boot};
#if CONFIG_CMD_REMOTEPROC
- run main_cpsw0_qsgmii_phyinit; run boot_rprocs;
+ if test ${do_main_cpsw0_qsgmii_phyinit} -eq 1;
+ then run main_cpsw0_qsgmii_phyinit;
+ fi;
+ run boot_rprocs;
#endif
if test ${boot_fit} -eq 1;
then run get_fit_${boot}; run get_fit_overlaystring; run run_fit;
diff --git a/include/env_internal.h b/include/env_internal.h
index 5c289d6..cbd1ef3 100644
--- a/include/env_internal.h
+++ b/include/env_internal.h
@@ -15,7 +15,6 @@
#ifndef _ENV_INTERNAL_H_
#define _ENV_INTERNAL_H_
-#include <linux/kconfig.h>
/**************************************************************************
*
diff --git a/include/fastboot-internal.h b/include/fastboot-internal.h
index bf2f2b3..610d4f9 100644
--- a/include/fastboot-internal.h
+++ b/include/fastboot-internal.h
@@ -19,6 +19,13 @@
extern void (*fastboot_progress_callback)(const char *msg);
/**
+ * fastboot_getvar_all() - Writes current variable being listed from "all" to response.
+ *
+ * @response: Pointer to fastboot response buffer
+ */
+void fastboot_getvar_all(char *response);
+
+/**
* fastboot_getvar() - Writes variable indicated by cmd_parameter to response.
*
* @cmd_parameter: Pointer to command parameter
diff --git a/include/fastboot.h b/include/fastboot.h
index 296451f..1e7920e 100644
--- a/include/fastboot.h
+++ b/include/fastboot.h
@@ -14,6 +14,16 @@
#define FASTBOOT_VERSION "0.4"
+/*
+ * Signals u-boot fastboot code to send multiple responses by
+ * calling response generating function repeatedly until a OKAY/FAIL
+ * is generated as final response.
+ *
+ * This status code is only used internally to signal, must NOT
+ * be sent to host.
+ */
+#define FASTBOOT_MULTIRESPONSE_START ("MORE")
+
/* The 64 defined bytes plus \0 */
#define FASTBOOT_COMMAND_LEN (64 + 1)
#define FASTBOOT_RESPONSE_LEN (64 + 1)
@@ -37,6 +47,7 @@
FASTBOOT_COMMAND_OEM_PARTCONF,
FASTBOOT_COMMAND_OEM_BOOTBUS,
FASTBOOT_COMMAND_OEM_RUN,
+ FASTBOOT_COMMAND_OEM_CONSOLE,
FASTBOOT_COMMAND_ACMD,
FASTBOOT_COMMAND_UCMD,
FASTBOOT_COMMAND_COUNT
@@ -172,5 +183,13 @@
*/
void fastboot_data_complete(char *response);
+/**
+ * fastboot_handle_multiresponse() - Called for each response to send
+ *
+ * @cmd: Command id that requested multiresponse
+ * @response: Pointer to fastboot response buffer
+ */
+void fastboot_multiresponse(int cmd, char *response);
+
void fastboot_acmd_complete(void);
#endif /* _FASTBOOT_H_ */
diff --git a/include/fat.h b/include/fat.h
index a9756fb..3dce99a 100644
--- a/include/fat.h
+++ b/include/fat.h
@@ -34,12 +34,6 @@
/* Maximum number of entry for long file name according to spec */
#define MAX_LFN_SLOT 20
-/* Filesystem identifiers */
-#define FAT12_SIGN "FAT12 "
-#define FAT16_SIGN "FAT16 "
-#define FAT32_SIGN "FAT32 "
-#define SIGNLEN 8
-
/* File attributes */
#define ATTR_RO 1
#define ATTR_HIDDEN 2
diff --git a/include/fdt_support.h b/include/fdt_support.h
index 2cd8366..25600d6 100644
--- a/include/fdt_support.h
+++ b/include/fdt_support.h
@@ -7,8 +7,7 @@
#ifndef __FDT_SUPPORT_H
#define __FDT_SUPPORT_H
-#if (defined(CONFIG_OF_LIBFDT) || defined(CONFIG_OF_CONTROL)) && \
- !defined(USE_HOSTCC)
+#if !defined(USE_HOSTCC)
#include <asm/u-boot.h>
#include <linux/libfdt.h>
@@ -56,7 +55,17 @@
/**
* Add initrd information to the FDT before booting the OS.
*
- * @param fdt FDT address in memory
+ * Adds linux,initrd-start and linux,initrd-end properties to the /chosen node,
+ * creating it if necessary.
+ *
+ * A memory reservation for the ramdisk is added to the FDT, or an existing one
+ * (with matching @initrd_start) updated.
+ *
+ * If @initrd_start == @initrd_end this function does nothing and returns 0.
+ *
+ * @fdt: Pointer to FDT in memory
+ * @initrd_start: Start of ramdisk
+ * @initrd_end: End of ramdisk
* Return: 0 if ok, or -FDT_ERR_... on error
*/
int fdt_initrd(void *fdt, ulong initrd_start, ulong initrd_end);
@@ -233,13 +242,23 @@
void set_working_fdt_addr(ulong addr);
/**
- * shrink down the given blob to minimum size + some extrasize if required
+ * fdt_shrink_to_minimum() - shrink FDT while allowing for some margin
+ *
+ * Shrink down the given blob to 'minimum' size + some extrasize.
+ *
+ * The new size is enough to hold the existing contents plus @extrasize bytes,
+ * plus 5 memory reservations. Also, the end of the FDT is aligned to a 4KB
+ * boundary, so it might end up up to 4KB larger than needed.
+ *
+ * If there is an existing memory reservation for @blob in the FDT, it is
+ * updated for the new size.
*
* @param blob FDT blob to update
* @param extrasize additional bytes needed
* Return: 0 if ok, or -FDT_ERR_... on error
*/
int fdt_shrink_to_minimum(void *blob, uint extrasize);
+
int fdt_increase_size(void *fdt, int add_len);
int fdt_delete_disabled_nodes(void *blob);
@@ -418,7 +437,7 @@
*/
int fdt_get_cells_len(const void *blob, char *nr_cells_name);
-#endif /* ifdef CONFIG_OF_LIBFDT */
+#endif /* !USE_HOSTCC */
#ifdef USE_HOSTCC
int fdtdec_get_int(const void *blob, int node, const char *prop_name,
diff --git a/include/fdtdec.h b/include/fdtdec.h
index bd1149f..e80de24 100644
--- a/include/fdtdec.h
+++ b/include/fdtdec.h
@@ -72,7 +72,7 @@
* U-Boot is packaged as an ELF file, e.g. for debugging purposes
* @FDTSRC_ENV: Provided by the fdtcontroladdr environment variable. This should
* be used for debugging/development only
- * @FDTSRC_NONE: No devicetree at all
+ * @FDTSRC_BLOBLIST: Provided by a bloblist from an earlier phase
*/
enum fdt_source_t {
FDTSRC_SEPARATE,
@@ -80,6 +80,7 @@
FDTSRC_BOARD,
FDTSRC_EMBED,
FDTSRC_ENV,
+ FDTSRC_BLOBLIST,
};
/*
@@ -1190,7 +1191,8 @@
*
* The existing devicetree is available at gd->fdt_blob
*
- * @err internal error code if we fail to setup a DTB
+ * @err: 0 on success, -EEXIST if the devicetree is already correct, or other
+ * internal error code if we fail to setup a DTB
* @returns new devicetree blob pointer
*/
void *board_fdt_blob_setup(int *err);
diff --git a/include/fwu.h b/include/fwu.h
index ac5c5de..eb5638f 100644
--- a/include/fwu.h
+++ b/include/fwu.h
@@ -122,21 +122,18 @@
int fwu_set_active_index(uint active_idx);
/**
- * fwu_get_image_index() - Get the Image Index to be used for capsule update
- * @image_index: The Image Index for the image
- *
- * The FWU multi bank update feature computes the value of image_index at
- * runtime, based on the bank to which the image needs to be written to.
- * Derive the image_index value for the image.
+ * fwu_get_dfu_alt_num() - Get the dfu_alt_num to be used for capsule update
+ * @image_index: The Image Index for the image
+ * @alt_num: pointer to store dfu_alt_num
*
* Currently, the capsule update driver uses the DFU framework for
* the updates. This function gets the DFU alt number which is to
- * be used as the Image Index
+ * be used for capsule update.
*
* Return: 0 if OK, -ve on error
*
*/
-int fwu_get_image_index(u8 *image_index);
+int fwu_get_dfu_alt_num(u8 image_index, u8 *alt_num);
/**
* fwu_revert_boot_index() - Revert the active index in the FWU metadata
diff --git a/include/getopt.h b/include/getopt.h
index 6f5811e..8645082 100644
--- a/include/getopt.h
+++ b/include/getopt.h
@@ -9,6 +9,8 @@
#ifndef __GETOPT_H
#define __GETOPT_H
+#include <stdbool.h>
+
/**
* struct getopt_state - Saved state across getopt() calls
*/
diff --git a/include/hwspinlock.h b/include/hwspinlock.h
index d8556c0..dd51354 100644
--- a/include/hwspinlock.h
+++ b/include/hwspinlock.h
@@ -6,6 +6,8 @@
#ifndef _HWSPINLOCK_H_
#define _HWSPINLOCK_H_
+#include <linux/errno.h>
+
/**
* Implement a hwspinlock uclass.
* Hardware spinlocks are used to perform hardware protection of
diff --git a/include/i2c_eeprom.h b/include/i2c_eeprom.h
index 32dcb03..cba991e 100644
--- a/include/i2c_eeprom.h
+++ b/include/i2c_eeprom.h
@@ -6,6 +6,8 @@
#ifndef __I2C_EEPROM
#define __I2C_EEPROM
+#include <linux/errno.h>
+
struct udevice;
struct i2c_eeprom_ops {
diff --git a/include/image.h b/include/image.h
index 2e3cf83..21de70f 100644
--- a/include/image.h
+++ b/include/image.h
@@ -612,41 +612,86 @@
#define IMAGE_FORMAT_FIT 0x02 /* new, libfdt based format */
#define IMAGE_FORMAT_ANDROID 0x03 /* Android boot image */
-ulong genimg_get_kernel_addr_fit(char * const img_addr,
- const char **fit_uname_config,
- const char **fit_uname_kernel);
+/**
+ * genimg_get_kernel_addr_fit() - Parse FIT specifier
+ *
+ * Get the real kernel start address from a string which is normally the first
+ * argv of bootm/bootz
+ *
+ * These cases are dealt with, based on the value of @img_addr:
+ * NULL: Returns image_load_addr, does not set last two args
+ * "<addr>": Returns address
+ *
+ * For FIT:
+ * "[<addr>]#<conf>": Returns address (or image_load_addr),
+ * sets fit_uname_config to config name
+ * "[<addr>]:<subimage>": Returns address (or image_load_addr) and sets
+ * fit_uname_kernel to the subimage name
+ *
+ * @img_addr: a string might contain real image address (or NULL)
+ * @fit_uname_config: Returns configuration unit name
+ * @fit_uname_kernel: Returns subimage name
+ *
+ * Returns: kernel start address
+ */
+ulong genimg_get_kernel_addr_fit(const char *const img_addr,
+ const char **fit_uname_config,
+ const char **fit_uname_kernel);
+
ulong genimg_get_kernel_addr(char * const img_addr);
int genimg_get_format(const void *img_addr);
int genimg_has_config(struct bootm_headers *images);
-int boot_get_fpga(int argc, char *const argv[], struct bootm_headers *images,
- uint8_t arch, const ulong *ld_start, ulong * const ld_len);
-int boot_get_ramdisk(int argc, char *const argv[], struct bootm_headers *images,
- uint8_t arch, ulong *rd_start, ulong *rd_end);
+/**
+ * boot_get_fpga() - Locate the FPGA image
+ *
+ * @images: Information about images being loaded
+ * Return 0 if OK, non-zero on failure
+ */
+int boot_get_fpga(struct bootm_headers *images);
/**
- * boot_get_loadable - routine to load a list of binaries to memory
- * @argc: Ignored Argument
- * @argv: Ignored Argument
+ * boot_get_ramdisk() - Locate the ramdisk
+ *
+ * @select: address or name of ramdisk to use, or NULL for default
* @images: pointer to the bootm images structure
- * @arch: expected architecture for the image
- * @ld_start: Ignored Argument
- * @ld_len: Ignored Argument
+ * @arch: expected ramdisk architecture
+ * @rd_start: pointer to a ulong variable, will hold ramdisk start address
+ * @rd_end: pointer to a ulong variable, will hold ramdisk end
*
- * boot_get_loadable() will take the given FIT configuration, and look
- * for a field named "loadables". Loadables, is a list of elements in
- * the FIT given as strings. exe:
+ * boot_get_ramdisk() is responsible for finding a valid ramdisk image.
+ * Currently supported are the following ramdisk sources:
+ * - multicomponent kernel/ramdisk image,
+ * - commandline provided address of decicated ramdisk image.
+ *
+ * returns:
+ * 0, if ramdisk image was found and valid, or skiped
+ * rd_start and rd_end are set to ramdisk start/end addresses if
+ * ramdisk image is found and valid
+ *
+ * 1, if ramdisk image is found but corrupted, or invalid
+ * rd_start and rd_end are set to 0 if no ramdisk exists
+ */
+int boot_get_ramdisk(char const *select, struct bootm_headers *images,
+ uint arch, ulong *rd_start, ulong *rd_end);
+
+/**
+ * boot_get_loadable() - load a list of binaries to memory
+ *
+ * @images: pointer to the bootm images structure
+ *
+ * Takes the given FIT configuration, then looks for a field named
+ * "loadables", a list of elements in the FIT given as strings, e.g.:
* loadables = "linux_kernel", "fdt-2";
- * this function will attempt to parse each string, and load the
- * corresponding element from the FIT into memory. Once placed,
- * no aditional actions are taken.
*
- * @return:
+ * Each string is parsed, loading the corresponding element from the FIT into
+ * memory. Once placed, no additional actions are taken.
+ *
+ * Return:
* 0, if only valid images or no images are found
* error code, if an error occurs during fit_image_load
*/
-int boot_get_loadable(int argc, char *const argv[], struct bootm_headers *images,
- uint8_t arch, const ulong *ld_start, ulong *const ld_len);
+int boot_get_loadable(struct bootm_headers *images);
int boot_get_setup_fit(struct bootm_headers *images, uint8_t arch,
ulong *setup_start, ulong *setup_len);
@@ -705,7 +750,13 @@
* @param load_op Decribes what to do with the load address
* @param datap Returns address of loaded image
* @param lenp Returns length of loaded image
- * Return: node offset of image, or -ve error code on error
+ * Return: node offset of image, or -ve error code on error:
+ * -ENOEXEC - unsupported architecture
+ * -ENOENT - could not find image / subimage
+ * -EACCES - hash, signature or decryptions failure
+ * -EBADF - invalid OS or image type, or cannot get image load-address
+ * -EXDEV - memory overwritten / overlap
+ * -NOEXEC - image decompression error, or invalid FDT
*/
int fit_image_load(struct bootm_headers *images, ulong addr,
const char **fit_unamep, const char **fit_uname_configp,
@@ -756,9 +807,33 @@
int fit_get_node_from_config(struct bootm_headers *images,
const char *prop_name, ulong addr);
-int boot_get_fdt(int flag, int argc, char *const argv[], uint8_t arch,
- struct bootm_headers *images,
- char **of_flat_tree, ulong *of_size);
+/**
+ * boot_get_fdt() - locate FDT devicetree to use for booting
+ *
+ * @buf: Pointer to image
+ * @select: FDT to select (this is normally argv[2] of the bootm command)
+ * @arch: architecture (IH_ARCH_...)
+ * @images: pointer to the bootm images structure
+ * @of_flat_tree: pointer to a char* variable, will hold fdt start address
+ * @of_size: pointer to a ulong variable, will hold fdt length
+ *
+ * boot_get_fdt() is responsible for finding a valid flat device tree image.
+ * Currently supported are the following FDT sources:
+ * - multicomponent kernel/ramdisk/FDT image,
+ * - commandline provided address of decicated FDT image.
+ *
+ * Return:
+ * 0, if fdt image was found and valid, or skipped
+ * of_flat_tree and of_size are set to fdt start address and length if
+ * fdt image is found and valid
+ *
+ * 1, if fdt image is found but corrupted
+ * of_flat_tree and of_size are set to 0 if no fdt exists
+ */
+int boot_get_fdt(void *buf, const char *select, uint arch,
+ struct bootm_headers *images, char **of_flat_tree,
+ ulong *of_size);
+
void boot_fdt_add_mem_rsv_regions(struct lmb *lmb, void *fdt_blob);
int boot_relocate_fdt(struct lmb *lmb, char **of_flat_tree, ulong *of_size);
@@ -936,7 +1011,7 @@
* @load: Destination load address in U-Boot memory
* @image_start Image start address (where we are decompressing from)
* @type: OS type (IH_OS_...)
- * @load_bug: Place to decompress to
+ * @load_buf: Place to decompress to
* @image_buf: Address to decompress from
* @image_len: Number of bytes in @image_buf to decompress
* @unc_len: Available space for decompression
@@ -953,12 +1028,11 @@
*
* @images: Images information
* @blob: FDT to update
- * @of_size: Size of the FDT
* @lmb: Points to logical memory block structure
* Return: 0 if ok, <0 on failure
*/
int image_setup_libfdt(struct bootm_headers *images, void *blob,
- int of_size, struct lmb *lmb);
+ struct lmb *lmb);
/**
* Set up the FDT to use for booting a kernel
@@ -1391,7 +1465,7 @@
* device
*/
#if defined(USE_HOSTCC)
-# if defined(CONFIG_FIT_SIGNATURE)
+# if CONFIG_IS_ENABLED(FIT_SIGNATURE)
# define IMAGE_ENABLE_SIGN 1
# define FIT_IMAGE_ENABLE_VERIFY 1
# include <openssl/evp.h>
diff --git a/include/init.h b/include/init.h
index d57a24f..9a1951d 100644
--- a/include/init.h
+++ b/include/init.h
@@ -292,6 +292,17 @@
/* common/board_info.c */
int checkboard(void);
+
+/**
+ * show_board_info() - Show board information
+ *
+ * Check sysinfo for board information. Failing that if the root node of the DTB
+ * has a "model" property, show it.
+ *
+ * Then call checkboard().
+ *
+ * Return 0 if OK, -ve on error
+ */
int show_board_info(void);
/**
diff --git a/include/iommu.h b/include/iommu.h
index cf9719c..b8ba0b8 100644
--- a/include/iommu.h
+++ b/include/iommu.h
@@ -5,6 +5,15 @@
struct iommu_ops {
/**
+ * init() - Connect a device to it's IOMMU, called before probe()
+ * The iommu device can be fetched through dev->iommu
+ *
+ * @iommu_dev: IOMMU device
+ * @dev: Device to connect
+ * @return 0 if OK, -errno on error
+ */
+ int (*connect)(struct udevice *dev);
+ /**
* map() - map DMA memory
*
* @dev: device for which to map DMA memory
diff --git a/include/led.h b/include/led.h
index 3290410..a635316 100644
--- a/include/led.h
+++ b/include/led.h
@@ -110,4 +110,12 @@
*/
int led_set_period(struct udevice *dev, int period_ms);
+/**
+ * led_bind_generic() - bind children of parent to given driver
+ *
+ * @parent: Top-level LED device
+ * @driver_name: Driver for handling individual child nodes
+ */
+int led_bind_generic(struct udevice *parent, const char *driver_name);
+
#endif
diff --git a/include/linux/immap_qe.h b/include/linux/immap_qe.h
index 45307f5..a692f5d 100644
--- a/include/linux/immap_qe.h
+++ b/include/linux/immap_qe.h
@@ -11,6 +11,8 @@
#ifndef __IMMAP_QE_H__
#define __IMMAP_QE_H__
+#include <config.h>
+
#ifdef CONFIG_MPC83xx
#if defined(CONFIG_ARCH_MPC8360)
#define QE_MURAM_SIZE 0xc000UL
diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h
index 2861b73..d1dbf3e 100644
--- a/include/linux/mtd/spi-nor.h
+++ b/include/linux/mtd/spi-nor.h
@@ -136,14 +136,6 @@
#define SPINOR_OP_BRRD 0x16 /* Bank register read */
#define SPINOR_OP_CLSR 0x30 /* Clear status register 1 */
#define SPINOR_OP_EX4B_CYPRESS 0xB8 /* Exit 4-byte mode */
-#define SPINOR_OP_RDAR 0x65 /* Read any register */
-#define SPINOR_OP_WRAR 0x71 /* Write any register */
-#define SPINOR_REG_ADDR_STR1V 0x00800000
-#define SPINOR_REG_ADDR_CFR1V 0x00800002
-#define SPINOR_REG_ADDR_CFR3V 0x00800004
-#define SPINOR_REG_ADDR_ARCFN 0x00000006
-#define CFR3V_UNHYSA BIT(3) /* Uniform sectors or not */
-#define CFR3V_PGMBUF BIT(4) /* Program buffer size */
/* Used for Micron flashes only. */
#define SPINOR_OP_RD_EVCR 0x65 /* Read EVCR register */
@@ -188,8 +180,12 @@
/* For Cypress flash. */
#define SPINOR_OP_RD_ANY_REG 0x65 /* Read any register */
#define SPINOR_OP_WR_ANY_REG 0x71 /* Write any register */
-#define SPINOR_OP_S28_SE_4K 0x21
+#define SPINOR_OP_CYPRESS_CLPEF 0x82 /* Clear P/E err flag */
+#define SPINOR_REG_CYPRESS_ARCFN 0x00000006
+#define SPINOR_REG_CYPRESS_STR1V 0x00800000
+#define SPINOR_REG_CYPRESS_CFR1V 0x00800002
#define SPINOR_REG_CYPRESS_CFR2V 0x00800003
+#define SPINOR_REG_CYPRESS_CFR2_MEMLAT_MASK GENMASK(3, 0)
#define SPINOR_REG_CYPRESS_CFR2_MEMLAT_11_24 0xb
#define SPINOR_REG_CYPRESS_CFR3V 0x00800004
#define SPINOR_REG_CYPRESS_CFR3_PGSZ BIT(4) /* Page size. */
diff --git a/include/linux/mtd/spinand.h b/include/linux/mtd/spinand.h
index 6d68514..6f479fa 100644
--- a/include/linux/mtd/spinand.h
+++ b/include/linux/mtd/spinand.h
@@ -250,6 +250,7 @@
extern const struct spinand_manufacturer paragon_spinand_manufacturer;
extern const struct spinand_manufacturer toshiba_spinand_manufacturer;
extern const struct spinand_manufacturer winbond_spinand_manufacturer;
+extern const struct spinand_manufacturer esmt_c8_spinand_manufacturer;
/**
* struct spinand_op_variants - SPI NAND operation variants
diff --git a/include/mapmem.h b/include/mapmem.h
index 2134c80..f496c96 100644
--- a/include/mapmem.h
+++ b/include/mapmem.h
@@ -13,6 +13,8 @@
# ifdef CONFIG_ARCH_MAP_SYSMEM
#include <asm/io.h>
# else
+#include <linux/types.h>
+
static inline void *map_sysmem(phys_addr_t paddr, unsigned long len)
{
return (void *)(uintptr_t)paddr;
@@ -26,6 +28,24 @@
{
return (phys_addr_t)(uintptr_t)ptr;
}
+
+/**
+ * nomap_sysmem() - pass through an address unchanged
+ *
+ * This is used to indicate an address which should NOT be mapped, e.g. in
+ * SMBIOS tables. Using this function instead of a case shows that the sandbox
+ * conversion has been done
+ */
+static inline void *nomap_sysmem(phys_addr_t paddr, unsigned long len)
+{
+ return (void *)(uintptr_t)paddr;
+}
+
+static inline phys_addr_t nomap_to_sysmem(const void *ptr)
+{
+ return (phys_addr_t)(uintptr_t)ptr;
+}
+
# endif
#endif /* __MAPMEM_H */
diff --git a/include/memalign.h b/include/memalign.h
index f67f0a7..eaa9f6b 100644
--- a/include/memalign.h
+++ b/include/memalign.h
@@ -11,6 +11,7 @@
* is used to align DMA buffers.
*/
#ifndef __ASSEMBLY__
+#include <linux/kernel.h>
#include <asm/cache.h>
#include <malloc.h>
diff --git a/include/membuff.h b/include/membuff.h
index 21051b0..4eba626 100644
--- a/include/membuff.h
+++ b/include/membuff.h
@@ -192,10 +192,11 @@
* @mb: membuff to adjust
* @str: Place to put the line
* @maxlen: Maximum line length (excluding terminator)
+ * @must_fit: If true then str is empty if line doesn't fit
* Return: number of bytes read (including terminator) if a line has been
- * read, 0 if nothing was there
+ * read, 0 if nothing was there or line didn't fit when must_fit is set
*/
-int membuff_readline(struct membuff *mb, char *str, int maxlen, int minch);
+int membuff_readline(struct membuff *mb, char *str, int maxlen, int minch, bool must_fit);
/**
* membuff_extend_by() - expand a membuff
diff --git a/include/net/wget.h b/include/net/wget.h
index da0920d..6714f7e 100644
--- a/include/net/wget.h
+++ b/include/net/wget.h
@@ -17,6 +17,5 @@
};
#define DEBUG_WGET 0 /* Set to 1 for debug messages */
-#define SERVER_PORT 80
#define WGET_RETRY_COUNT 30
#define WGET_TIMEOUT 2000UL
diff --git a/include/net6.h b/include/net6.h
index 1e766aa..1ed989e 100644
--- a/include/net6.h
+++ b/include/net6.h
@@ -12,6 +12,7 @@
#include <net.h>
#include <linux/ctype.h>
+#include <linux/errno.h>
/* struct in6_addr - 128 bits long IPv6 address */
struct in6_addr {
diff --git a/include/nvmem.h b/include/nvmem.h
index 822e698..e6a8a98 100644
--- a/include/nvmem.h
+++ b/include/nvmem.h
@@ -6,6 +6,8 @@
#ifndef NVMEM_H
#define NVMEM_H
+#include <linux/errno.h>
+
/**
* DOC: Design
*
diff --git a/include/part.h b/include/part.h
index db34bc6..32ee404 100644
--- a/include/part.h
+++ b/include/part.h
@@ -685,8 +685,8 @@
/**
* part_get_bootable() - Find the first bootable partition
*
- * @desc: Block-device descriptor
- * @return first bootable partition, or 0 if there is none
+ * @desc: Block-device descriptor
+ * Return: first bootable partition, or 0 if there is none
*/
int part_get_bootable(struct blk_desc *desc);
diff --git a/include/pci.h b/include/pci.h
index 2f5eb30..aad2337 100644
--- a/include/pci.h
+++ b/include/pci.h
@@ -1354,6 +1354,7 @@
* type 1 functions.
* Can also be used on type 0 functions that support Enhanced Allocation for
* 32b/64b BARs. Note that duplicate BEI entries are not supported.
+ * Can also be used on 64b bars on type 0 functions.
*
* @dev: Device to check
* @bar: Bar register offset (PCI_BASE_ADDRESS_...)
diff --git a/include/pci_ids.h b/include/pci_ids.h
index 88b0a64..b63bf45 100644
--- a/include/pci_ids.h
+++ b/include/pci_ids.h
@@ -1363,6 +1363,13 @@
#define PCI_DEVICE_ID_XILINX_HAMMERFALL_DSP 0x3fc5
#define PCI_DEVICE_ID_XILINX_HAMMERFALL_DSP_MADI 0x3fc6
+/* Per https://www.qemu.org/docs/master/specs/pci-ids.html */
+#define PCI_VENDOR_ID_REDHAT 0x1b36
+#define PCI_DEVICE_ID_REDHAT_SDHCI 0x0007
+#define PCI_DEVICE_ID_REDHAT_XHCI 0x000d
+#define PCI_DEVICE_ID_REDHAT_NVME 0x0010
+#define PCI_DEVICE_ID_REDHAT_UFS 0x0013
+
#define PCI_VENDOR_ID_INIT 0x1101
#define PCI_VENDOR_ID_CREATIVE 0x1102 /* duplicate: ECTIVA */
diff --git a/include/power-domain.h b/include/power-domain.h
index 2ff6c77..1852507 100644
--- a/include/power-domain.h
+++ b/include/power-domain.h
@@ -6,6 +6,8 @@
#ifndef _POWER_DOMAIN_H
#define _POWER_DOMAIN_H
+#include <linux/errno.h>
+
/**
* A power domain is a portion of an SoC or chip that is powered by a
* switchable source of power. In many cases, software has control over the
diff --git a/include/power/max77663.h b/include/power/max77663.h
index b3ae3da..fcb5916 100644
--- a/include/power/max77663.h
+++ b/include/power/max77663.h
@@ -13,6 +13,7 @@
#define MAX77663_LDO_DRIVER "max77663_ldo"
#define MAX77663_SD_DRIVER "max77663_sd"
#define MAX77663_RST_DRIVER "max77663_rst"
+#define MAX77663_GPIO_DRIVER "max77663_gpio"
/* Step-Down (SD) Regulator calculations */
#define SD_STATUS_MASK 0x30
diff --git a/include/power/palmas.h b/include/power/palmas.h
index 0a61205..94c99dd 100644
--- a/include/power/palmas.h
+++ b/include/power/palmas.h
@@ -15,6 +15,7 @@
#define PALMAS_LDO_DRIVER "palmas_ldo"
#define PALMAS_SMPS_DRIVER "palmas_smps"
#define PALMAS_RST_DRIVER "palmas_rst"
+#define PALMAS_GPIO_DRIVER "palmas_gpio"
#define PALMAS_SMPS_VOLT_MASK 0x7F
#define PALMAS_SMPS_RANGE_MASK 0x80
@@ -35,3 +36,14 @@
#define DEV_OFF 0x00
#define PALMAS_INT3_MASK 0x1B
#define MASK_VBUS BIT(7)
+
+/* second chip */
+#define PALMAS_GPIO_DATA_IN 0x80
+#define PALMAS_GPIO_DATA_DIR 0x81
+#define PALMAS_GPIO_DATA_OUT 0x82
+#define PALMAS_GPIO_DEBOUNCE_EN 0x83
+#define PALMAS_GPIO_CLEAR_DATA_OUT 0x84
+#define PALMAS_GPIO_SET_DATA_OUT 0x85
+#define PALMAS_PU_PD_GPIO_CTRL1 0x86
+#define PALMAS_PU_PD_GPIO_CTRL2 0x87
+#define PALMAS_OD_OUTPUT_GPIO_CTRL 0x88
diff --git a/include/power/regulator.h b/include/power/regulator.h
index 200652c..bb07a81 100644
--- a/include/power/regulator.h
+++ b/include/power/regulator.h
@@ -7,6 +7,8 @@
#ifndef _INCLUDE_REGULATOR_H_
#define _INCLUDE_REGULATOR_H_
+#include <linux/errno.h>
+
struct udevice;
/**
diff --git a/include/remoteproc.h b/include/remoteproc.h
index a11dc8a..91a8879 100644
--- a/include/remoteproc.h
+++ b/include/remoteproc.h
@@ -14,6 +14,7 @@
* platforms have moved to dm/fdt.
*/
#include <dm/platdata.h> /* For platform data support - non dt world */
+#include <linux/errno.h>
/**
* struct fw_rsc_hdr - firmware resource entry header
diff --git a/include/rtc.h b/include/rtc.h
index b6fdbb6..22f6d37 100644
--- a/include/rtc.h
+++ b/include/rtc.h
@@ -16,6 +16,7 @@
#include <bcd.h>
#include <rtc_def.h>
#include <linux/errno.h>
+#include <linux/types.h>
typedef int64_t time64_t;
struct udevice;
diff --git a/include/smbios.h b/include/smbios.h
index c9df270..e2b7f69 100644
--- a/include/smbios.h
+++ b/include/smbios.h
@@ -8,11 +8,11 @@
#ifndef _SMBIOS_H_
#define _SMBIOS_H_
-#include <dm/ofnode.h>
+#include <linux/types.h>
/* SMBIOS spec version implemented */
#define SMBIOS_MAJOR_VER 3
-#define SMBIOS_MINOR_VER 0
+#define SMBIOS_MINOR_VER 7
enum {
SMBIOS_STR_MAX = 64, /* Maximum length allowed for a string */
@@ -54,6 +54,32 @@
u8 bcd_rev;
};
+/**
+ * struct smbios3_entry - SMBIOS 3.0 (64-bit) Entry Point structure
+ */
+struct __packed smbios3_entry {
+ /** @anchor: anchor string */
+ u8 anchor[5];
+ /** @checksum: checksum of the entry point structure */
+ u8 checksum;
+ /** @length: length of the entry point structure */
+ u8 length;
+ /** @major_ver: major version of the SMBIOS specification */
+ u8 major_ver;
+ /** @minor_ver: minor version of the SMBIOS specification */
+ u8 minor_ver;
+ /** @docrev: revision of the SMBIOS specification */
+ u8 doc_rev;
+ /** @entry_point_rev: revision of the entry point structure */
+ u8 entry_point_rev;
+ /** @reserved: reserved */
+ u8 reserved;
+ /** maximum size of SMBIOS table */
+ u32 max_struct_size;
+ /** @struct_table_address: 64-bit physical starting address */
+ u64 struct_table_address;
+};
+
/* BIOS characteristics */
#define BIOS_CHARACTERISTICS_PCI_SUPPORTED (1 << 7)
#define BIOS_CHARACTERISTICS_UPGRADEABLE (1 << 11)
@@ -113,6 +139,7 @@
u8 chassis_location;
u16 chassis_handle;
u8 board_type;
+ u8 number_contained_objects;
char eos[SMBIOS_STRUCT_EOS_BYTES];
};
@@ -228,12 +255,13 @@
*
* This writes SMBIOS table at a given address.
*
- * @addr: start address to write SMBIOS table. If this is not
- * 16-byte-aligned then it will be aligned before the table is
- * written.
+ * @addr: start address to write SMBIOS table, 16-byte-alignment
+ * recommended. Note that while the SMBIOS tables themself have no alignment
+ * requirement, some systems may requires alignment. For example x86 systems
+ * which put tables at f0000 require 16-byte alignment
+ *
* Return: end address of SMBIOS table (and start address for next entry)
* or NULL in case of an error
- *
*/
ulong write_smbios_table(ulong addr);
@@ -299,10 +327,10 @@
* This function clear the device dependent parameters such as
* serial number for the measurement.
*
- * @entry: pointer to a struct smbios_entry
+ * @entry: pointer to a struct smbios3_entry
* @header: pointer to a struct smbios_header
*/
-void smbios_prepare_measurement(const struct smbios_entry *entry,
+void smbios_prepare_measurement(const struct smbios3_entry *entry,
struct smbios_header *header);
#endif /* _SMBIOS_H_ */
diff --git a/include/soc.h b/include/soc.h
index 850db28..b8cfc50 100644
--- a/include/soc.h
+++ b/include/soc.h
@@ -7,6 +7,8 @@
#ifndef __SOC_H
#define __SOC_H
+#include <linux/errno.h>
+
#define SOC_MAX_STR_SIZE 128
struct udevice;
diff --git a/include/spi-mem.h b/include/spi-mem.h
index b07cf2e..3c8e95b 100644
--- a/include/spi-mem.h
+++ b/include/spi-mem.h
@@ -11,6 +11,8 @@
#ifndef __UBOOT_SPI_MEM_H
#define __UBOOT_SPI_MEM_H
+#include <linux/errno.h>
+
struct udevice;
#define SPI_MEM_OP_CMD(__opcode, __buswidth) \
diff --git a/include/sysinfo.h b/include/sysinfo.h
index b140d74..524c7d6 100644
--- a/include/sysinfo.h
+++ b/include/sysinfo.h
@@ -7,6 +7,8 @@
#ifndef __SYSINFO_H__
#define __SYSINFO_H__
+#include <linux/errno.h>
+
struct udevice;
/*
@@ -46,6 +48,9 @@
/* For show_board_info() */
SYSINFO_ID_BOARD_MODEL,
+ SYSINFO_ID_BOARD_MANUFACTURER,
+ SYSINFO_ID_PRIOR_STAGE_VERSION,
+ SYSINFO_ID_PRIOR_STAGE_DATE,
/* First value available for downstream/board used */
SYSINFO_ID_USER = 0x1000,
diff --git a/include/system-constants.h b/include/system-constants.h
index d688629..e09fc41 100644
--- a/include/system-constants.h
+++ b/include/system-constants.h
@@ -3,6 +3,8 @@
#ifndef __SYSTEM_CONSTANTS_H__
#define __SYSTEM_CONSTANTS_H__
+#include <config.h>
+
/*
* The most common case for our initial stack pointer address is to
* say that we have defined a static intiial ram address location and
diff --git a/include/tables_csum.h b/include/tables_csum.h
index 4812333..9207e85 100644
--- a/include/tables_csum.h
+++ b/include/tables_csum.h
@@ -17,6 +17,6 @@
* @len: configuration table size
* @return: the 8-bit checksum
*/
-u8 table_compute_checksum(void *v, int len);
+u8 table_compute_checksum(const void *v, const int len);
#endif
diff --git a/include/test/cmd.h b/include/test/cmd.h
new file mode 100644
index 0000000..c200570
--- /dev/null
+++ b/include/test/cmd.h
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright 2023 Google LLC
+ * Written by Simon Glass <sjg@chromium.org>
+ */
+
+#ifndef __TEST_CMD_H__
+#define __TEST_CMD_H__
+
+#include <test/test.h>
+
+/* Declare a new command test */
+#define CMD_TEST(_name, _flags) UNIT_TEST(_name, _flags, cmd_test)
+
+#endif /* __TEST_CMD_H__ */
diff --git a/include/test/hush.h b/include/test/hush.h
new file mode 100644
index 0000000..cca6654
--- /dev/null
+++ b/include/test/hush.h
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * (C) Copyright 2021
+ * Francis Laniel, Amarula Solutions, francis.laniel@amarulasolutions.com
+ */
+
+#ifndef __TEST_HUSH_H__
+#define __TEST_HUSH_H__
+
+#include <test/test.h>
+
+/* Declare a new environment test */
+#define HUSH_TEST(_name, _flags) UNIT_TEST(_name, _flags, hush_test)
+
+#endif /* __TEST_HUSH_H__ */
diff --git a/include/test/suites.h b/include/test/suites.h
index ad4fc92..365d5f2 100644
--- a/include/test/suites.h
+++ b/include/test/suites.h
@@ -34,6 +34,7 @@
char *const argv[]);
int do_ut_bloblist(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[]);
+int do_ut_cmd(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]);
int do_ut_common(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]);
int do_ut_compression(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[]);
@@ -42,6 +43,7 @@
int do_ut_exit(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]);
int do_ut_fdt(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]);
int do_ut_font(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]);
+int do_ut_hush(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]);
int do_ut_lib(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]);
int do_ut_loadm(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]);
int do_ut_log(struct cmd_tbl *cmdtp, int flag, int argc, char * const argv[]);
diff --git a/include/test/ut.h b/include/test/ut.h
index ea6ee95..d3172af 100644
--- a/include/test/ut.h
+++ b/include/test/ut.h
@@ -98,6 +98,23 @@
int ut_check_skip_to_line(struct unit_test_state *uts, const char *fmt, ...);
/**
+ * ut_check_skip_to_linen() - skip output until a partial line is found
+ *
+ * This creates a string and then checks it against the following lines of
+ * console output obtained with console_record_readline() until it is found.
+ * Only the characters up to the length of the string are checked, so the line
+ * may extend further
+ *
+ * After the function returns, uts->expect_str holds the expected string and
+ * uts->actual_str holds the actual string read from the console.
+ *
+ * @uts: Test state
+ * @fmt: printf() format string to look for, followed by args
+ * Return: 0 if OK, -ENOENT if not found, other value on error
+ */
+int ut_check_skip_to_linen(struct unit_test_state *uts, const char *fmt, ...);
+
+/**
* ut_check_console_end() - Check there is no more console output
*
* After the function returns, uts->actual_str holds the actual string read
@@ -359,6 +376,19 @@
__ret; \
})
+/* Assert that a following console output line matches */
+#define ut_assert_skip_to_linen(fmt, args...) ({ \
+ int __ret = 0; \
+ \
+ if (ut_check_skip_to_linen(uts, fmt, ##args)) { \
+ ut_failf(uts, __FILE__, __LINE__, __func__, \
+ "console", "\nExpected '%s',\n got to '%s'", \
+ uts->expect_str, uts->actual_str); \
+ return CMD_RET_FAILURE; \
+ } \
+ __ret; \
+})
+
/* Assert that there is no more console output */
#define ut_assert_console_end() ({ \
int __ret = 0; \
diff --git a/include/tlv_eeprom.h b/include/tlv_eeprom.h
index fd45e5f..2b1e19b 100644
--- a/include/tlv_eeprom.h
+++ b/include/tlv_eeprom.h
@@ -7,6 +7,8 @@
#ifndef __TLV_EEPROM_H_
#define __TLV_EEPROM_H_
+#include <linux/errno.h>
+
/*
* The Definition of the TlvInfo EEPROM format can be found at onie.org or
* github.com/onie
diff --git a/include/u-boot/ecdsa.h b/include/u-boot/ecdsa.h
index 6e0269e..53490c6 100644
--- a/include/u-boot/ecdsa.h
+++ b/include/u-boot/ecdsa.h
@@ -8,7 +8,6 @@
#include <errno.h>
#include <image.h>
-#include <linux/kconfig.h>
/**
* crypto_algo API impementation for ECDSA;
diff --git a/include/usb/xhci.h b/include/usb/xhci.h
index 4a4ac10..04d16a2 100644
--- a/include/usb/xhci.h
+++ b/include/usb/xhci.h
@@ -901,6 +901,8 @@
/* TRB type IDs */
typedef enum {
+ /* reserved, used as a software sentinel */
+ TRB_NONE = 0,
/* bulk, interrupt, isoc scatter/gather, and control data stage */
TRB_NORMAL = 1,
/* setup stage for control transfers */
diff --git a/lib/Kconfig b/lib/Kconfig
index 9ae846e..37ac14f 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -1002,7 +1002,7 @@
Check http://www.dmtf.org/standards/smbios for details.
- See also SMBIOS_SYSINFO which allows SMBIOS values to be provided in
+ See also SYSINFO_SMBIOS which allows SMBIOS values to be provided in
the devicetree.
endmenu
diff --git a/lib/abuf.c b/lib/abuf.c
index ce2cff5..937c3df 100644
--- a/lib/abuf.c
+++ b/lib/abuf.c
@@ -7,7 +7,6 @@
*/
#ifndef USE_HOSTCC
-#include <common.h>
#include <malloc.h>
#include <mapmem.h>
#include <string.h>
diff --git a/lib/acpi/Makefile b/lib/acpi/Makefile
index c1c9675..cc28684 100644
--- a/lib/acpi/Makefile
+++ b/lib/acpi/Makefile
@@ -12,7 +12,7 @@
obj-y += acpi_writer.o
# With QEMU the ACPI tables come from there, not from U-Boot
-ifndef CONFIG_QEMU
+ifndef CONFIG_QFW_ACPI
obj-y += base.o
obj-y += csrt.o
obj-y += mcfg.o
diff --git a/lib/acpi/acpi.c b/lib/acpi/acpi.c
index 14b1575..f4d5c1e 100644
--- a/lib/acpi/acpi.c
+++ b/lib/acpi/acpi.c
@@ -5,7 +5,6 @@
* Copyright 2023 Google LLC
*/
-#include <common.h>
#include <mapmem.h>
#include <acpi/acpi_table.h>
#include <asm/global_data.h>
@@ -16,28 +15,59 @@
{
struct acpi_rsdp *rsdp;
struct acpi_rsdt *rsdt;
+ struct acpi_xsdt *xsdt;
int len, i, count;
rsdp = map_sysmem(gd_acpi_start(), 0);
if (!rsdp)
return NULL;
- rsdt = map_sysmem(rsdp->rsdt_address, 0);
- len = rsdt->header.length - sizeof(rsdt->header);
- count = len / sizeof(u32);
+ if (rsdp->xsdt_address) {
+ xsdt = nomap_sysmem(rsdp->xsdt_address, 0);
+ len = xsdt->header.length - sizeof(xsdt->header);
+ count = len / sizeof(u64);
+ } else {
+ if (!rsdp->rsdt_address)
+ return NULL;
+ rsdt = nomap_sysmem(rsdp->rsdt_address, 0);
+ len = rsdt->header.length - sizeof(rsdt->header);
+ count = len / sizeof(u32);
+ }
for (i = 0; i < count; i++) {
struct acpi_table_header *hdr;
- hdr = map_sysmem(rsdt->entry[i], 0);
+ if (rsdp->xsdt_address)
+ hdr = nomap_sysmem(xsdt->entry[i], 0);
+ else
+ hdr = nomap_sysmem(rsdt->entry[i], 0);
if (!memcmp(hdr->signature, sig, ACPI_NAME_LEN))
return hdr;
if (!memcmp(hdr->signature, "FACP", ACPI_NAME_LEN)) {
struct acpi_fadt *fadt = (struct acpi_fadt *)hdr;
- if (!memcmp(sig, "DSDT", ACPI_NAME_LEN) && fadt->dsdt)
- return map_sysmem(fadt->dsdt, 0);
- if (!memcmp(sig, "FACS", ACPI_NAME_LEN) &&
- fadt->firmware_ctrl)
- return map_sysmem(fadt->firmware_ctrl, 0);
+ if (!memcmp(sig, "DSDT", ACPI_NAME_LEN)) {
+ void *dsdt;
+
+ if (fadt->header.revision >= 3 && fadt->x_dsdt)
+ dsdt = nomap_sysmem(fadt->x_dsdt, 0);
+ else if (fadt->dsdt)
+ dsdt = nomap_sysmem(fadt->dsdt, 0);
+ else
+ dsdt = NULL;
+ return dsdt;
+ }
+
+ if (!memcmp(sig, "FACS", ACPI_NAME_LEN)) {
+ void *facs;
+
+ if (fadt->header.revision >= 3 &&
+ fadt->x_firmware_ctrl)
+ facs = nomap_sysmem(fadt->x_firmware_ctrl, 0);
+ else if (fadt->firmware_ctrl)
+ facs = nomap_sysmem(fadt->firmware_ctrl, 0);
+ else
+ facs = NULL;
+ return facs;
+ }
}
}
diff --git a/lib/acpi/acpi_device.c b/lib/acpi/acpi_device.c
index 1b838fd..ed94194 100644
--- a/lib/acpi/acpi_device.c
+++ b/lib/acpi/acpi_device.c
@@ -6,7 +6,6 @@
* Mostly taken from coreboot file of the same name
*/
-#include <common.h>
#include <dm.h>
#include <irq.h>
#include <log.h>
diff --git a/lib/acpi/acpi_dp.c b/lib/acpi/acpi_dp.c
index 7e3e325..6733809 100644
--- a/lib/acpi/acpi_dp.c
+++ b/lib/acpi/acpi_dp.c
@@ -6,7 +6,6 @@
* Mostly taken from coreboot file acpi_device.c
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <malloc.h>
diff --git a/lib/acpi/acpi_table.c b/lib/acpi/acpi_table.c
index a8d4b47..39dd53e 100644
--- a/lib/acpi/acpi_table.c
+++ b/lib/acpi/acpi_table.c
@@ -5,7 +5,6 @@
* Copyright 2019 Google LLC
*/
-#include <common.h>
#include <dm.h>
#include <cpu.h>
#include <log.h>
@@ -168,7 +167,7 @@
}
/* Add table to the RSDT */
- rsdt->entry[i] = map_to_sysmem(table);
+ rsdt->entry[i] = nomap_to_sysmem(table);
/* Fix RSDT length or the kernel will assume invalid entries */
rsdt->header.length = sizeof(struct acpi_table_header) +
@@ -186,7 +185,7 @@
xsdt = ctx->xsdt;
/* Add table to the XSDT */
- xsdt->entry[i] = map_to_sysmem(table);
+ xsdt->entry[i] = nomap_to_sysmem(table);
/* Fix XSDT length */
xsdt->header.length = sizeof(struct acpi_table_header) +
diff --git a/lib/acpi/acpi_writer.c b/lib/acpi/acpi_writer.c
index 946f90e..bbb9b54 100644
--- a/lib/acpi/acpi_writer.c
+++ b/lib/acpi/acpi_writer.c
@@ -7,13 +7,13 @@
#define LOG_CATEGORY LOGC_ACPI
-#include <common.h>
#include <log.h>
#include <malloc.h>
#include <mapmem.h>
#include <acpi/acpi_table.h>
#include <asm/global_data.h>
#include <dm/acpi.h>
+#include <linux/errno.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -48,7 +48,7 @@
return 0;
}
-#ifndef CONFIG_QEMU
+#ifndef CONFIG_QFW_ACPI
static int acpi_write_all(struct acpi_ctx *ctx)
{
const struct acpi_writer *writer =
@@ -115,7 +115,7 @@
return map_to_sysmem(gd->acpi_ctx->rsdp);
}
-#endif /* QEMU */
+#endif /* QFW_ACPI */
void acpi_setup_ctx(struct acpi_ctx *ctx, ulong start)
{
diff --git a/lib/acpi/acpigen.c b/lib/acpi/acpigen.c
index e395226..b95cabb 100644
--- a/lib/acpi/acpigen.c
+++ b/lib/acpi/acpigen.c
@@ -8,7 +8,6 @@
#define LOG_CATEGORY LOGC_ACPI
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <uuid.h>
diff --git a/lib/acpi/base.c b/lib/acpi/base.c
index 2057bd2..8b6af2b 100644
--- a/lib/acpi/base.c
+++ b/lib/acpi/base.c
@@ -7,11 +7,13 @@
#define LOG_CATEGORY LOGC_ACPI
-#include <common.h>
#include <acpi/acpi_table.h>
#include <dm/acpi.h>
#include <mapmem.h>
#include <tables_csum.h>
+#include <linux/sizes.h>
+#include <linux/errno.h>
+#include <linux/string.h>
void acpi_write_rsdp(struct acpi_rsdp *rsdp, struct acpi_rsdt *rsdt,
struct acpi_xsdt *xsdt)
@@ -21,10 +23,13 @@
memcpy(rsdp->signature, RSDP_SIG, 8);
memcpy(rsdp->oem_id, OEM_ID, 6);
- rsdp->length = sizeof(struct acpi_rsdp);
- rsdp->rsdt_address = map_to_sysmem(rsdt);
+ if (rsdt)
+ rsdp->rsdt_address = nomap_to_sysmem(rsdt);
- rsdp->xsdt_address = map_to_sysmem(xsdt);
+ if (xsdt)
+ rsdp->xsdt_address = nomap_to_sysmem(xsdt);
+
+ rsdp->length = sizeof(struct acpi_rsdp);
rsdp->revision = ACPI_RSDP_REV_ACPI_2_0;
/* Calculate checksums */
@@ -68,11 +73,15 @@
static int acpi_write_base(struct acpi_ctx *ctx,
const struct acpi_writer *entry)
{
- /* We need at least an RSDP and an RSDT Table */
+ /* We need at least an RSDP and an XSDT Table */
ctx->rsdp = ctx->current;
acpi_inc_align(ctx, sizeof(struct acpi_rsdp));
- ctx->rsdt = ctx->current;
- acpi_inc_align(ctx, sizeof(struct acpi_rsdt));
+ if (map_to_sysmem(ctx->current) < SZ_4G - SZ_64K) {
+ ctx->rsdt = ctx->current;
+ acpi_inc_align(ctx, sizeof(struct acpi_rsdt));
+ } else {
+ ctx->rsdt = 0;
+ }
ctx->xsdt = ctx->current;
acpi_inc_align(ctx, sizeof(struct acpi_xsdt));
@@ -80,7 +89,8 @@
memset(ctx->base, '\0', ctx->current - ctx->base);
acpi_write_rsdp(ctx->rsdp, ctx->rsdt, ctx->xsdt);
- acpi_write_rsdt(ctx->rsdt);
+ if (ctx->rsdt)
+ acpi_write_rsdt(ctx->rsdt);
acpi_write_xsdt(ctx->xsdt);
return 0;
diff --git a/lib/acpi/csrt.c b/lib/acpi/csrt.c
index 2ba86f2..00927e5 100644
--- a/lib/acpi/csrt.c
+++ b/lib/acpi/csrt.c
@@ -7,11 +7,11 @@
#define LOG_CATEGORY LOGC_ACPI
-#include <common.h>
#include <mapmem.h>
#include <tables_csum.h>
#include <acpi/acpi_table.h>
#include <dm/acpi.h>
+#include <linux/string.h>
__weak int acpi_fill_csrt(struct acpi_ctx *ctx)
{
diff --git a/lib/acpi/dsdt.c b/lib/acpi/dsdt.c
index db98cc2..206e1e2 100644
--- a/lib/acpi/dsdt.c
+++ b/lib/acpi/dsdt.c
@@ -7,10 +7,10 @@
#define LOG_CATEGORY LOGC_ACPI
-#include <common.h>
#include <acpi/acpi_table.h>
#include <dm/acpi.h>
#include <tables_csum.h>
+#include <linux/string.h>
/*
* IASL compiles the dsdt entries and writes the hex values
diff --git a/lib/acpi/facs.c b/lib/acpi/facs.c
index e89f43c..86c2812 100644
--- a/lib/acpi/facs.c
+++ b/lib/acpi/facs.c
@@ -7,9 +7,9 @@
#define LOG_CATEGORY LOGC_ACPI
-#include <common.h>
#include <acpi/acpi_table.h>
#include <dm/acpi.h>
+#include <linux/string.h>
int acpi_write_facs(struct acpi_ctx *ctx, const struct acpi_writer *entry)
{
diff --git a/lib/acpi/mcfg.c b/lib/acpi/mcfg.c
index 7404ae58..8b8a5bf 100644
--- a/lib/acpi/mcfg.c
+++ b/lib/acpi/mcfg.c
@@ -7,11 +7,13 @@
#define LOG_CATEGORY LOGC_ACPI
-#include <common.h>
#include <mapmem.h>
#include <tables_csum.h>
#include <acpi/acpi_table.h>
#include <dm/acpi.h>
+#include <linux/errno.h>
+#include <linux/string.h>
+#include <linux/types.h>
int acpi_create_mcfg_mmconfig(struct acpi_mcfg_mmconfig *mmconfig, u32 base,
u16 seg_nr, u8 start, u8 end)
diff --git a/lib/acpi/ssdt.c b/lib/acpi/ssdt.c
index 659c1aa..b0a96f8 100644
--- a/lib/acpi/ssdt.c
+++ b/lib/acpi/ssdt.c
@@ -7,10 +7,11 @@
#define LOG_CATEGORY LOGC_ACPI
-#include <common.h>
#include <acpi/acpi_table.h>
#include <dm/acpi.h>
#include <tables_csum.h>
+#include <linux/errno.h>
+#include <linux/string.h>
int acpi_write_ssdt(struct acpi_ctx *ctx, const struct acpi_writer *entry)
{
@@ -18,10 +19,9 @@
int ret;
ssdt = ctx->current;
- memset((void *)ssdt, '\0', sizeof(struct acpi_table_header));
+ memset(ssdt, '\0', sizeof(struct acpi_table_header));
acpi_fill_header(ssdt, "SSDT");
- memcpy(ssdt->oem_table_id, OEM_TABLE_ID, sizeof(ssdt->oem_table_id));
ssdt->revision = acpi_get_table_revision(ACPITAB_SSDT);
ssdt->aslc_revision = 1;
ssdt->length = sizeof(struct acpi_table_header);
diff --git a/lib/addr_map.c b/lib/addr_map.c
index 86e932e..f85fb0c 100644
--- a/lib/addr_map.c
+++ b/lib/addr_map.c
@@ -3,7 +3,6 @@
* Copyright 2008 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <addr_map.h>
#include <mapmem.h>
diff --git a/lib/aes.c b/lib/aes.c
index 4fca85e..39ad4a9 100644
--- a/lib/aes.c
+++ b/lib/aes.c
@@ -22,9 +22,9 @@
*/
#ifndef USE_HOSTCC
-#include <common.h>
#include <display_options.h>
#include <log.h>
+#include <linux/string.h>
#else
#include <string.h>
#endif
diff --git a/lib/aes/aes-decrypt.c b/lib/aes/aes-decrypt.c
index 345029f..741102a 100644
--- a/lib/aes/aes-decrypt.c
+++ b/lib/aes/aes-decrypt.c
@@ -4,7 +4,6 @@
*/
#ifndef USE_HOSTCC
-#include <common.h>
#include <malloc.h>
#endif
#include <image.h>
diff --git a/lib/asm-offsets.c b/lib/asm-offsets.c
index 216d971..4e2dbda 100644
--- a/lib/asm-offsets.c
+++ b/lib/asm-offsets.c
@@ -11,9 +11,9 @@
* #defines from the assembly-language output.
*/
-#include <common.h>
#include <asm-offsets.h>
#include <asm/global_data.h>
+#include <asm/u-boot.h>
#include <linux/kbuild.h>
diff --git a/lib/at91/at91.c b/lib/at91/at91.c
index 0485976..bd31e9e 100644
--- a/lib/at91/at91.c
+++ b/lib/at91/at91.c
@@ -4,7 +4,6 @@
* Wenyou.Yang <wenyou.yang@microchip.com>
*/
-#include <common.h>
#include <atmel_lcd.h>
#include "atmel_logo_8bpp.h"
diff --git a/lib/bch.c b/lib/bch.c
index 72b4fdc..a309a8d 100644
--- a/lib/bch.c
+++ b/lib/bch.c
@@ -54,7 +54,6 @@
*/
#ifndef USE_HOSTCC
-#include <common.h>
#include <log.h>
#include <malloc.h>
#include <ubi_uboot.h>
diff --git a/lib/binman.c b/lib/binman.c
index cfe1e5f..9047f52 100644
--- a/lib/binman.c
+++ b/lib/binman.c
@@ -6,7 +6,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <binman.h>
#include <dm.h>
#include <log.h>
diff --git a/lib/bzip2/bzlib.c b/lib/bzip2/bzlib.c
index bd589aa..f7318b7 100644
--- a/lib/bzip2/bzlib.c
+++ b/lib/bzip2/bzlib.c
@@ -1,7 +1,6 @@
-#include <config.h>
-#include <common.h>
#include <malloc.h>
#include <watchdog.h>
+#include <stdio.h>
/*
* This file is a modified version of bzlib.c from the bzip2-1.0.2
diff --git a/lib/bzip2/bzlib_decompress.c b/lib/bzip2/bzlib_decompress.c
index 3b417d5..e56ab66 100644
--- a/lib/bzip2/bzlib_decompress.c
+++ b/lib/bzip2/bzlib_decompress.c
@@ -1,5 +1,4 @@
#include <config.h>
-#include <common.h>
#include <watchdog.h>
/*-------------------------------------------------------------*/
diff --git a/lib/charset.c b/lib/charset.c
index 5e4c4f9..2b43175 100644
--- a/lib/charset.c
+++ b/lib/charset.c
@@ -5,7 +5,6 @@
* Copyright (c) 2017 Rob Clark
*/
-#include <common.h>
#include <charset.h>
#include <capitalization.h>
#include <cp437.h>
@@ -571,6 +570,10 @@
}
if (pos == end)
return 0;
+ /*
+ * Appending the byte lead to an invalid UTF-8 byte sequence.
+ * Consider it as the start of a new code sequence.
+ */
*buffer = 0;
}
}
diff --git a/lib/circbuf.c b/lib/circbuf.c
index fa79c14..2e161ae 100644
--- a/lib/circbuf.c
+++ b/lib/circbuf.c
@@ -4,7 +4,6 @@
* Gerry Hamel, geh@ti.com, Texas Instruments
*/
-#include <common.h>
#include <log.h>
#include <malloc.h>
diff --git a/lib/crc16-ccitt.c b/lib/crc16-ccitt.c
index 6cadbc1..6fa4e93 100644
--- a/lib/crc16-ccitt.c
+++ b/lib/crc16-ccitt.c
@@ -24,8 +24,6 @@
#ifdef USE_HOSTCC
#include <arpa/inet.h>
-#else
-#include <common.h>
#endif
#include <u-boot/crc.h>
diff --git a/lib/crc32.c b/lib/crc32.c
index f6fad8c..f36f176 100644
--- a/lib/crc32.c
+++ b/lib/crc32.c
@@ -11,7 +11,6 @@
#ifdef USE_HOSTCC
#include <arpa/inet.h>
#else
-#include <common.h>
#include <efi_loader.h>
#endif
#include <compiler.h>
diff --git a/lib/crc32c.c b/lib/crc32c.c
index 016b34a..7026ac4 100644
--- a/lib/crc32c.c
+++ b/lib/crc32c.c
@@ -10,7 +10,6 @@
* any later version.
*/
-#include <common.h>
#include <compiler.h>
uint32_t crc32c_cal(uint32_t crc, const char *data, int length,
diff --git a/lib/crc8.c b/lib/crc8.c
index 87b87b6..20d46d1 100644
--- a/lib/crc8.c
+++ b/lib/crc8.c
@@ -5,8 +5,6 @@
#ifdef USE_HOSTCC
#include <arpa/inet.h>
-#else
-#include <common.h>
#endif
#include <u-boot/crc.h>
diff --git a/lib/crypt/crypt-port.h b/lib/crypt/crypt-port.h
index 6b9542d..50dde68 100644
--- a/lib/crypt/crypt-port.h
+++ b/lib/crypt/crypt-port.h
@@ -1,6 +1,9 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/* Copyright (C) 2020 Steffen Jaeckel <jaeckel-floss@eyet-services.de> */
+#include <linux/errno.h>
+#include <linux/kernel.h>
+#include <linux/string.h>
#include <linux/types.h>
#include <vsprintf.h>
diff --git a/lib/crypt/crypt.c b/lib/crypt/crypt.c
index 247c34b..8f5fadb 100644
--- a/lib/crypt/crypt.c
+++ b/lib/crypt/crypt.c
@@ -1,7 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+
/* Copyright (C) 2020 Steffen Jaeckel <jaeckel-floss@eyet-services.de> */
-#include <common.h>
#include <crypt.h>
#include "crypt-port.h"
diff --git a/lib/crypto/x509_public_key.c b/lib/crypto/x509_public_key.c
index 3007123..a10145a 100644
--- a/lib/crypto/x509_public_key.c
+++ b/lib/crypto/x509_public_key.c
@@ -7,7 +7,6 @@
#define pr_fmt(fmt) "X.509: "fmt
#ifdef __UBOOT__
-#include <common.h>
#include <image.h>
#include <dm/devres.h>
#include <linux/compat.h>
diff --git a/lib/date.c b/lib/date.c
index e3d2245..0deac8a 100644
--- a/lib/date.c
+++ b/lib/date.c
@@ -4,7 +4,6 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
#include <command.h>
#include <errno.h>
#include <rtc.h>
diff --git a/lib/dhry/cmd_dhry.c b/lib/dhry/cmd_dhry.c
index 77b52a2..e52beae 100644
--- a/lib/dhry/cmd_dhry.c
+++ b/lib/dhry/cmd_dhry.c
@@ -3,9 +3,10 @@
* (C) Copyright 2015 Google, Inc
*/
-#include <common.h>
#include <command.h>
#include <div64.h>
+#include <time.h>
+#include <vsprintf.h>
#include "dhry.h"
static int do_dhry(struct cmd_tbl *cmdtp, int flag, int argc,
diff --git a/lib/dhry/dhry_1.c b/lib/dhry/dhry_1.c
index dcc224f..252cd14 100644
--- a/lib/dhry/dhry_1.c
+++ b/lib/dhry/dhry_1.c
@@ -42,8 +42,8 @@
***************************************************************************/
char SCCSid[] = "@(#) @(#)dhry_1.c:3.4 -- 5/15/91 19:30:21";
-#include <common.h>
#include <malloc.h>
+#include <stdio.h>
#include "dhry.h"
diff --git a/lib/dhry/dhry_2.c b/lib/dhry/dhry_2.c
index 1ba8796..a74197d 100644
--- a/lib/dhry/dhry_2.c
+++ b/lib/dhry/dhry_2.c
@@ -39,7 +39,7 @@
****************************************************************************/
/* SCCSid is defined in dhry_1.c */
-#include <common.h>
+#include <linux/string.h>
#include "dhry.h"
#ifndef REG
diff --git a/lib/display_options.c b/lib/display_options.c
index 80def52..d6b9355 100644
--- a/lib/display_options.c
+++ b/lib/display_options.c
@@ -4,14 +4,15 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
#include <compiler.h>
#include <console.h>
#include <display_options.h>
#include <div64.h>
#include <version_string.h>
#include <linux/ctype.h>
+#include <linux/kernel.h>
#include <asm/io.h>
+#include <vsprintf.h>
char *display_options_get_banner_priv(bool newlines, const char *build_tag,
char *buf, int size)
diff --git a/lib/efi/Makefile b/lib/efi/Makefile
index a790d2d..232fa68 100644
--- a/lib/efi/Makefile
+++ b/lib/efi/Makefile
@@ -2,7 +2,7 @@
#
# (C) Copyright 2015 Google, Inc
-obj-$(CONFIG_EFI_APP) += efi_app.o efi.o
+obj-$(CONFIG_EFI_APP) += efi_app.o efi.o efi_app_init.o
obj-$(CONFIG_EFI_STUB) += efi_info.o
CFLAGS_REMOVE_efi_stub.o := -mregparm=3 \
diff --git a/lib/efi/efi.c b/lib/efi/efi.c
index aa42f18..bcb34d6 100644
--- a/lib/efi/efi.c
+++ b/lib/efi/efi.c
@@ -10,7 +10,6 @@
* Common EFI functions
*/
-#include <common.h>
#include <debug_uart.h>
#include <errno.h>
#include <malloc.h>
diff --git a/lib/efi/efi_app.c b/lib/efi/efi_app.c
index 2209410..88332c3 100644
--- a/lib/efi/efi_app.c
+++ b/lib/efi/efi_app.c
@@ -8,22 +8,24 @@
* This file implements U-Boot running as an EFI application.
*/
-#include <common.h>
#include <cpu_func.h>
#include <debug_uart.h>
#include <dm.h>
+#include <efi.h>
+#include <efi_api.h>
#include <errno.h>
#include <init.h>
#include <malloc.h>
+#include <sysreset.h>
+#include <uuid.h>
#include <asm/global_data.h>
#include <linux/err.h>
#include <linux/types.h>
-#include <efi.h>
-#include <efi_api.h>
-#include <sysreset.h>
+#include <asm/global_data.h>
#include <dm/device-internal.h>
#include <dm/lists.h>
#include <dm/root.h>
+#include <mapmem.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -65,49 +67,6 @@
return 0;
}
-/**
- * efi_bind_block() - bind a new block device to an EFI device
- *
- * Binds a new top-level EFI_MEDIA device as well as a child block device so
- * that the block device can be accessed in U-Boot.
- *
- * The device can then be accessed using 'part list efi 0', 'fat ls efi 0:1',
- * for example, just like any other interface type.
- *
- * @handle: handle of the controller on which this driver is installed
- * @blkio: block io protocol proxied by this driver
- * @device_path: EFI device path structure for this
- * @len: Length of @device_path in bytes
- * @devp: Returns the bound device
- * Return: 0 if OK, -ve on error
- */
-int efi_bind_block(efi_handle_t handle, struct efi_block_io *blkio,
- struct efi_device_path *device_path, int len,
- struct udevice **devp)
-{
- struct efi_media_plat plat;
- struct udevice *dev;
- char name[18];
- int ret;
-
- plat.handle = handle;
- plat.blkio = blkio;
- plat.device_path = malloc(device_path->length);
- if (!plat.device_path)
- return log_msg_ret("path", -ENOMEM);
- memcpy(plat.device_path, device_path, device_path->length);
- ret = device_bind(dm_root(), DM_DRIVER_GET(efi_media), "efi_media",
- &plat, ofnode_null(), &dev);
- if (ret)
- return log_msg_ret("bind", ret);
-
- snprintf(name, sizeof(name), "efi_media_%x", dev_seq(dev));
- device_set_name(dev, name);
- *devp = dev;
-
- return 0;
-}
-
static efi_status_t setup_memory(struct efi_priv *priv)
{
struct efi_boot_services *boot = priv->boot;
@@ -176,148 +135,17 @@
global_data_ptr = NULL;
}
-/**
- * devpath_is_partition() - Figure out if a device path is a partition
- *
- * Checks if a device path refers to a partition on some media device. This
- * works by checking for a valid partition number in a hard-driver media device
- * as the final component of the device path.
- *
- * @path: device path
- * Return: true if a partition, false if not
- * (e.g. it might be media which contains partitions)
- */
-static bool devpath_is_partition(const struct efi_device_path *path)
+static void scan_tables(struct efi_system_table *sys_table)
{
- const struct efi_device_path *p;
- bool was_part = false;
+ efi_guid_t acpi = EFI_ACPI_TABLE_GUID;
+ uint i;
- for (p = path; p->type != DEVICE_PATH_TYPE_END;
- p = (void *)p + p->length) {
- was_part = false;
- if (p->type == DEVICE_PATH_TYPE_MEDIA_DEVICE &&
- p->sub_type == DEVICE_PATH_SUB_TYPE_HARD_DRIVE_PATH) {
- struct efi_device_path_hard_drive_path *hd =
- (void *)path;
+ for (i = 0; i < sys_table->nr_tables; i++) {
+ struct efi_configuration_table *tab = &sys_table->tables[i];
- if (hd->partition_number)
- was_part = true;
- }
+ if (!memcmp(&tab->guid, &acpi, sizeof(efi_guid_t)))
+ gd_set_acpi_start(map_to_sysmem(tab->table));
}
-
- return was_part;
-}
-
-/**
- * setup_block() - Find all block devices and setup EFI devices for them
- *
- * Partitions are ignored, since U-Boot has partition handling. Errors with
- * particular devices produce a warning but execution continues to try to
- * find others.
- *
- * Return: 0 if found, -ENOSYS if there is no boot-services table, -ENOTSUPP
- * if a required protocol is not supported
- */
-static int setup_block(void)
-{
- efi_guid_t efi_blkio_guid = EFI_BLOCK_IO_PROTOCOL_GUID;
- efi_guid_t efi_devpath_guid = EFI_DEVICE_PATH_PROTOCOL_GUID;
- efi_guid_t efi_pathutil_guid = EFI_DEVICE_PATH_UTILITIES_PROTOCOL_GUID;
- efi_guid_t efi_pathtext_guid = EFI_DEVICE_PATH_TO_TEXT_PROTOCOL_GUID;
- struct efi_boot_services *boot = efi_get_boot();
- struct efi_device_path_utilities_protocol *util;
- struct efi_device_path_to_text_protocol *text;
- struct efi_device_path *path;
- struct efi_block_io *blkio;
- efi_uintn_t num_handles;
- efi_handle_t *handle;
- int ret, i;
-
- if (!boot)
- return log_msg_ret("sys", -ENOSYS);
-
- /* Find all devices which support the block I/O protocol */
- ret = boot->locate_handle_buffer(BY_PROTOCOL, &efi_blkio_guid, NULL,
- &num_handles, &handle);
- if (ret)
- return log_msg_ret("loc", -ENOTSUPP);
- log_debug("Found %d handles:\n", (int)num_handles);
-
- /* We need to look up the path size and convert it to text */
- ret = boot->locate_protocol(&efi_pathutil_guid, NULL, (void **)&util);
- if (ret)
- return log_msg_ret("util", -ENOTSUPP);
- ret = boot->locate_protocol(&efi_pathtext_guid, NULL, (void **)&text);
- if (ret)
- return log_msg_ret("text", -ENOTSUPP);
-
- for (i = 0; i < num_handles; i++) {
- struct udevice *dev;
- const u16 *name;
- bool is_part;
- int len;
-
- ret = boot->handle_protocol(handle[i], &efi_devpath_guid,
- (void **)&path);
- if (ret) {
- log_warning("- devpath %d failed (ret=%d)\n", i, ret);
- continue;
- }
-
- ret = boot->handle_protocol(handle[i], &efi_blkio_guid,
- (void **)&blkio);
- if (ret) {
- log_warning("- blkio %d failed (ret=%d)\n", i, ret);
- continue;
- }
-
- name = text->convert_device_path_to_text(path, true, false);
- is_part = devpath_is_partition(path);
-
- if (!is_part) {
- len = util->get_device_path_size(path);
- ret = efi_bind_block(handle[i], blkio, path, len, &dev);
- if (ret) {
- log_warning("- blkio bind %d failed (ret=%d)\n",
- i, ret);
- continue;
- }
- } else {
- dev = NULL;
- }
-
- /*
- * Show the device name if we created one. Otherwise indicate
- * that it is a partition.
- */
- printf("%2d: %-12s %ls\n", i, dev ? dev->name : "<partition>",
- name);
- }
- boot->free_pool(handle);
-
- return 0;
-}
-
-/**
- * dm_scan_other() - Scan for UEFI devices that should be available to U-Boot
- *
- * This sets up block devices within U-Boot for those found in UEFI. With this,
- * U-Boot can access those devices
- *
- * @pre_reloc_only: true to only bind pre-relocation devices (ignored)
- * Returns: 0 on success, -ve on error
- */
-int dm_scan_other(bool pre_reloc_only)
-{
- if (gd->flags & GD_FLG_RELOC) {
- int ret;
-
- ret = setup_block();
- if (ret)
- return ret;
- }
-
- return 0;
}
/**
@@ -354,6 +182,8 @@
return ret;
}
+ scan_tables(priv->sys_table);
+
/*
* We could store the EFI memory map here, but it changes all the time,
* so this is only useful for debugging.
diff --git a/lib/efi/efi_app_init.c b/lib/efi/efi_app_init.c
new file mode 100644
index 0000000..c5e4192
--- /dev/null
+++ b/lib/efi/efi_app_init.c
@@ -0,0 +1,205 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * EFI-app board implementation
+ *
+ * Copyright 2023 Google LLC
+ * Written by Simon Glass <sjg@chromium.org>
+ */
+
+#include <dm.h>
+#include <efi.h>
+#include <efi_api.h>
+#include <errno.h>
+#include <malloc.h>
+#include <asm/global_data.h>
+#include <dm/device-internal.h>
+#include <dm/root.h>
+#include <linux/types.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/**
+ * efi_bind_block() - bind a new block device to an EFI device
+ *
+ * Binds a new top-level EFI_MEDIA device as well as a child block device so
+ * that the block device can be accessed in U-Boot.
+ *
+ * The device can then be accessed using 'part list efi 0', 'fat ls efi 0:1',
+ * for example, just like any other interface type.
+ *
+ * @handle: handle of the controller on which this driver is installed
+ * @blkio: block io protocol proxied by this driver
+ * @device_path: EFI device path structure for this
+ * @len: Length of @device_path in bytes
+ * @devp: Returns the bound device
+ * Return: 0 if OK, -ve on error
+ */
+int efi_bind_block(efi_handle_t handle, struct efi_block_io *blkio,
+ struct efi_device_path *device_path, int len,
+ struct udevice **devp)
+{
+ struct efi_media_plat plat;
+ struct udevice *dev;
+ char name[18];
+ int ret;
+
+ plat.handle = handle;
+ plat.blkio = blkio;
+ plat.device_path = malloc(device_path->length);
+ if (!plat.device_path)
+ return log_msg_ret("path", -ENOMEM);
+ memcpy(plat.device_path, device_path, device_path->length);
+ ret = device_bind(dm_root(), DM_DRIVER_GET(efi_media), "efi_media",
+ &plat, ofnode_null(), &dev);
+ if (ret)
+ return log_msg_ret("bind", ret);
+
+ snprintf(name, sizeof(name), "efi_media_%x", dev_seq(dev));
+ device_set_name(dev, name);
+ *devp = dev;
+
+ return 0;
+}
+
+/**
+ * devpath_is_partition() - Figure out if a device path is a partition
+ *
+ * Checks if a device path refers to a partition on some media device. This
+ * works by checking for a valid partition number in a hard-driver media device
+ * as the final component of the device path.
+ *
+ * @path: device path
+ * Return: true if a partition, false if not
+ * (e.g. it might be media which contains partitions)
+ */
+static bool devpath_is_partition(const struct efi_device_path *path)
+{
+ const struct efi_device_path *p;
+ bool was_part = false;
+
+ for (p = path; p->type != DEVICE_PATH_TYPE_END;
+ p = (void *)p + p->length) {
+ was_part = false;
+ if (p->type == DEVICE_PATH_TYPE_MEDIA_DEVICE &&
+ p->sub_type == DEVICE_PATH_SUB_TYPE_HARD_DRIVE_PATH) {
+ struct efi_device_path_hard_drive_path *hd =
+ (void *)path;
+
+ if (hd->partition_number)
+ was_part = true;
+ }
+ }
+
+ return was_part;
+}
+
+/**
+ * setup_block() - Find all block devices and setup EFI devices for them
+ *
+ * Partitions are ignored, since U-Boot has partition handling. Errors with
+ * particular devices produce a warning but execution continues to try to
+ * find others.
+ *
+ * Return: 0 if found, -ENOSYS if there is no boot-services table, -ENOTSUPP
+ * if a required protocol is not supported
+ */
+static int setup_block(void)
+{
+ efi_guid_t efi_blkio_guid = EFI_BLOCK_IO_PROTOCOL_GUID;
+ efi_guid_t efi_devpath_guid = EFI_DEVICE_PATH_PROTOCOL_GUID;
+ efi_guid_t efi_pathutil_guid = EFI_DEVICE_PATH_UTILITIES_PROTOCOL_GUID;
+ efi_guid_t efi_pathtext_guid = EFI_DEVICE_PATH_TO_TEXT_PROTOCOL_GUID;
+ struct efi_boot_services *boot = efi_get_boot();
+ struct efi_device_path_utilities_protocol *util;
+ struct efi_device_path_to_text_protocol *text;
+ struct efi_device_path *path;
+ struct efi_block_io *blkio;
+ efi_uintn_t num_handles;
+ efi_handle_t *handle;
+ int ret, i;
+
+ if (!boot)
+ return log_msg_ret("sys", -ENOSYS);
+
+ /* Find all devices which support the block I/O protocol */
+ ret = boot->locate_handle_buffer(BY_PROTOCOL, &efi_blkio_guid, NULL,
+ &num_handles, &handle);
+ if (ret)
+ return log_msg_ret("loc", -ENOTSUPP);
+ log_debug("Found %d handles:\n", (int)num_handles);
+
+ /* We need to look up the path size and convert it to text */
+ ret = boot->locate_protocol(&efi_pathutil_guid, NULL, (void **)&util);
+ if (ret)
+ return log_msg_ret("util", -ENOTSUPP);
+ ret = boot->locate_protocol(&efi_pathtext_guid, NULL, (void **)&text);
+ if (ret)
+ return log_msg_ret("text", -ENOTSUPP);
+
+ for (i = 0; i < num_handles; i++) {
+ struct udevice *dev;
+ const u16 *name;
+ bool is_part;
+ int len;
+
+ ret = boot->handle_protocol(handle[i], &efi_devpath_guid,
+ (void **)&path);
+ if (ret) {
+ log_warning("- devpath %d failed (ret=%d)\n", i, ret);
+ continue;
+ }
+
+ ret = boot->handle_protocol(handle[i], &efi_blkio_guid,
+ (void **)&blkio);
+ if (ret) {
+ log_warning("- blkio %d failed (ret=%d)\n", i, ret);
+ continue;
+ }
+
+ name = text->convert_device_path_to_text(path, true, false);
+ is_part = devpath_is_partition(path);
+
+ if (!is_part) {
+ len = util->get_device_path_size(path);
+ ret = efi_bind_block(handle[i], blkio, path, len, &dev);
+ if (ret) {
+ log_warning("- blkio bind %d failed (ret=%d)\n",
+ i, ret);
+ continue;
+ }
+ } else {
+ dev = NULL;
+ }
+
+ /*
+ * Show the device name if we created one. Otherwise indicate
+ * that it is a partition.
+ */
+ printf("%2d: %-12s %ls\n", i, dev ? dev->name : "<partition>",
+ name);
+ }
+ boot->free_pool(handle);
+
+ return 0;
+}
+
+/**
+ * board_early_init_r() - Scan for UEFI devices that should be available
+ *
+ * This sets up block devices within U-Boot for those found in UEFI. With this,
+ * U-Boot can access those devices
+ *
+ * Returns: 0 on success, -ve on error
+ */
+int board_early_init_r(void)
+{
+ if (gd->flags & GD_FLG_RELOC) {
+ int ret;
+
+ ret = setup_block();
+ if (ret)
+ return ret;
+ }
+
+ return 0;
+}
diff --git a/lib/efi/efi_info.c b/lib/efi/efi_info.c
index 4d78923..5b564c5 100644
--- a/lib/efi/efi_info.c
+++ b/lib/efi/efi_info.c
@@ -5,7 +5,6 @@
* Access to the EFI information table
*/
-#include <common.h>
#include <efi.h>
#include <errno.h>
#include <mapmem.h>
diff --git a/lib/efi/efi_stub.c b/lib/efi/efi_stub.c
index c9eb32e..40fc29d 100644
--- a/lib/efi/efi_stub.c
+++ b/lib/efi/efi_stub.c
@@ -9,7 +9,6 @@
* EFI application. It can be built either in 32-bit or 64-bit mode.
*/
-#include <common.h>
#include <debug_uart.h>
#include <efi.h>
#include <efi_api.h>
diff --git a/lib/efi_driver/efi_block_device.c b/lib/efi_driver/efi_block_device.c
index e3abd90..34a0365 100644
--- a/lib/efi_driver/efi_block_device.c
+++ b/lib/efi_driver/efi_block_device.c
@@ -28,7 +28,6 @@
* iPXE uses the simple file protocol to load Grub or the Linux Kernel.
*/
-#include <common.h>
#include <blk.h>
#include <dm.h>
#include <efi_driver.h>
diff --git a/lib/efi_driver/efi_uclass.c b/lib/efi_driver/efi_uclass.c
index 66a45e1..e1e28df 100644
--- a/lib/efi_driver/efi_uclass.c
+++ b/lib/efi_driver/efi_uclass.c
@@ -17,7 +17,6 @@
* controllers.
*/
-#include <common.h>
#include <dm.h>
#include <efi_driver.h>
#include <log.h>
diff --git a/lib/efi_loader/Kconfig b/lib/efi_loader/Kconfig
index 2913d1c..db5571d 100644
--- a/lib/efi_loader/Kconfig
+++ b/lib/efi_loader/Kconfig
@@ -32,7 +32,16 @@
if EFI_LOADER
-config BOOTEFI_BOOTMGR
+config EFI_BINARY_EXEC
+ bool "Execute UEFI binary"
+ default y
+ help
+ Select this option if you want to execute the UEFI binary after
+ loading it with U-Boot load commands or other methods.
+ You may enable CMD_BOOTEFI_BINARY so that you can use bootefi
+ command to do that.
+
+config EFI_BOOTMGR
bool "UEFI Boot Manager"
default y
select BOOTMETH_GLOBAL if BOOTSTD
@@ -133,18 +142,20 @@
config EFI_VAR_BUF_SIZE
int "Memory size of the UEFI variable store"
- default 16384 if EFI_MM_COMM_TEE
- default 65536
+ default 131072
range 4096 2147483647
help
This defines the size in bytes of the memory area reserved for keeping
UEFI variables.
- When using StandAloneMM (CONFIG_EFI_MM_COMM_TEE=y) this value should
- match the value of PcdFlashNvStorageVariableSize used to compile the
- StandAloneMM module.
+ When using StandAloneMM (CONFIG_EFI_MM_COMM_TEE=y) is used the
+ available size for storing variables is defined in
+ PcdFlashNvStorageVariableSize.
+ That value is probed at runtime from U-Boot. In that case,
+ EFI_VAR_BUF_SIZE represents the memory U-Boot reserves to present
+ runtime variables to the OS.
- Minimum 4096, default 65536, or 16384 when using StandAloneMM.
+ Minimum 4096, default 131072
config EFI_GET_TIME
bool "GetTime() runtime service"
diff --git a/lib/efi_loader/Makefile b/lib/efi_loader/Makefile
index 0a2cb6e..fcb0af7 100644
--- a/lib/efi_loader/Makefile
+++ b/lib/efi_loader/Makefile
@@ -16,6 +16,8 @@
CFLAGS_REMOVE_boothart.o := $(CFLAGS_NON_EFI)
CFLAGS_helloworld.o := $(CFLAGS_EFI) -Os -ffreestanding
CFLAGS_REMOVE_helloworld.o := $(CFLAGS_NON_EFI)
+CFLAGS_smbiosdump.o := $(CFLAGS_EFI) -Os -ffreestanding
+CFLAGS_REMOVE_smbiosdump.o := $(CFLAGS_NON_EFI)
CFLAGS_dtbdump.o := $(CFLAGS_EFI) -Os -ffreestanding
CFLAGS_REMOVE_dtbdump.o := $(CFLAGS_NON_EFI)
CFLAGS_initrddump.o := $(CFLAGS_EFI) -Os -ffreestanding
@@ -31,6 +33,11 @@
targets += helloworld.o
endif
+ifneq ($(CONFIG_GENERATE_SMBIOS_TABLE),)
+always += smbiosdump.efi
+targets += smbiosdump.o
+endif
+
ifeq ($(CONFIG_GENERATE_ACPI_TABLE),)
always += dtbdump.efi
targets += dtbdump.o
@@ -42,7 +49,8 @@
endif
obj-$(CONFIG_CMD_BOOTEFI_HELLO) += helloworld_efi.o
-obj-$(CONFIG_BOOTEFI_BOOTMGR) += efi_bootmgr.o
+obj-$(CONFIG_EFI_BOOTMGR) += efi_bootmgr.o
+obj-$(CONFIG_EFI_BINARY_EXEC) += efi_bootbin.o
obj-y += efi_boottime.o
obj-y += efi_helper.o
obj-$(CONFIG_EFI_HAVE_CAPSULE_SUPPORT) += efi_capsule.o
@@ -51,9 +59,7 @@
obj-y += efi_device_path.o
obj-$(CONFIG_EFI_DEVICE_PATH_TO_TEXT) += efi_device_path_to_text.o
obj-$(CONFIG_EFI_DEVICE_PATH_UTIL) += efi_device_path_utilities.o
-ifeq ($(CONFIG_GENERATE_ACPI_TABLE),)
obj-y += efi_dt_fixup.o
-endif
obj-y += efi_file.o
obj-$(CONFIG_EFI_LOADER_HII) += efi_hii.o
obj-y += efi_image_loader.o
diff --git a/lib/efi_loader/dtbdump.c b/lib/efi_loader/dtbdump.c
index 3ce2a07..5f39cf2 100644
--- a/lib/efi_loader/dtbdump.c
+++ b/lib/efi_loader/dtbdump.c
@@ -6,7 +6,6 @@
* to a file.
*/
-#include <common.h>
#include <efi_api.h>
#include <efi_dt_fixup.h>
#include <part.h>
diff --git a/lib/efi_loader/efi_acpi.c b/lib/efi_loader/efi_acpi.c
index f755af7..67bbd2a 100644
--- a/lib/efi_loader/efi_acpi.c
+++ b/lib/efi_loader/efi_acpi.c
@@ -5,7 +5,6 @@
* Copyright (C) 2018, Bin Meng <bmeng.cn@gmail.com>
*/
-#include <common.h>
#include <efi_loader.h>
#include <log.h>
#include <mapmem.h>
diff --git a/lib/efi_loader/efi_bootbin.c b/lib/efi_loader/efi_bootbin.c
new file mode 100644
index 0000000..733cc1a
--- /dev/null
+++ b/lib/efi_loader/efi_bootbin.c
@@ -0,0 +1,211 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * For the code moved from cmd/bootefi.c
+ * Copyright (c) 2016 Alexander Graf
+ */
+
+#define LOG_CATEGORY LOGC_EFI
+
+#include <charset.h>
+#include <efi.h>
+#include <efi_loader.h>
+#include <env.h>
+#include <image.h>
+#include <log.h>
+#include <malloc.h>
+
+static struct efi_device_path *bootefi_image_path;
+static struct efi_device_path *bootefi_device_path;
+static void *image_addr;
+static size_t image_size;
+
+/**
+ * efi_get_image_parameters() - return image parameters
+ *
+ * @img_addr: address of loaded image in memory
+ * @img_size: size of loaded image
+ */
+void efi_get_image_parameters(void **img_addr, size_t *img_size)
+{
+ *img_addr = image_addr;
+ *img_size = image_size;
+}
+
+/**
+ * efi_clear_bootdev() - clear boot device
+ */
+void efi_clear_bootdev(void)
+{
+ efi_free_pool(bootefi_device_path);
+ efi_free_pool(bootefi_image_path);
+ bootefi_device_path = NULL;
+ bootefi_image_path = NULL;
+ image_addr = NULL;
+ image_size = 0;
+}
+
+/**
+ * efi_set_bootdev() - set boot device
+ *
+ * This function is called when a file is loaded, e.g. via the 'load' command.
+ * We use the path to this file to inform the UEFI binary about the boot device.
+ *
+ * @dev: device, e.g. "MMC"
+ * @devnr: number of the device, e.g. "1:2"
+ * @path: path to file loaded
+ * @buffer: buffer with file loaded
+ * @buffer_size: size of file loaded
+ */
+void efi_set_bootdev(const char *dev, const char *devnr, const char *path,
+ void *buffer, size_t buffer_size)
+{
+ struct efi_device_path *device, *image;
+ efi_status_t ret;
+
+ log_debug("dev=%s, devnr=%s, path=%s, buffer=%p, size=%zx\n", dev,
+ devnr, path, buffer, buffer_size);
+
+ /* Forget overwritten image */
+ if (buffer + buffer_size >= image_addr &&
+ image_addr + image_size >= buffer)
+ efi_clear_bootdev();
+
+ /* Remember only PE-COFF and FIT images */
+ if (efi_check_pe(buffer, buffer_size, NULL) != EFI_SUCCESS) {
+ if (IS_ENABLED(CONFIG_FIT) &&
+ !fit_check_format(buffer, IMAGE_SIZE_INVAL)) {
+ /*
+ * FIT images of type EFI_OS are started via command
+ * bootm. We should not use their boot device with the
+ * bootefi command.
+ */
+ buffer = 0;
+ buffer_size = 0;
+ } else {
+ log_debug("- not remembering image\n");
+ return;
+ }
+ }
+
+ /* efi_set_bootdev() is typically called repeatedly, recover memory */
+ efi_clear_bootdev();
+
+ image_addr = buffer;
+ image_size = buffer_size;
+
+ ret = efi_dp_from_name(dev, devnr, path, &device, &image);
+ if (ret == EFI_SUCCESS) {
+ bootefi_device_path = device;
+ if (image) {
+ /* FIXME: image should not contain device */
+ struct efi_device_path *image_tmp = image;
+
+ efi_dp_split_file_path(image, &device, &image);
+ efi_free_pool(image_tmp);
+ }
+ bootefi_image_path = image;
+ log_debug("- boot device %pD\n", device);
+ if (image)
+ log_debug("- image %pD\n", image);
+ } else {
+ log_debug("- efi_dp_from_name() failed, err=%lx\n", ret);
+ efi_clear_bootdev();
+ }
+}
+
+/**
+ * efi_run_image() - run loaded UEFI image
+ *
+ * @source_buffer: memory address of the UEFI image
+ * @source_size: size of the UEFI image
+ * Return: status code
+ */
+efi_status_t efi_run_image(void *source_buffer, efi_uintn_t source_size)
+{
+ efi_handle_t mem_handle = NULL, handle;
+ struct efi_device_path *file_path = NULL;
+ struct efi_device_path *msg_path;
+ efi_status_t ret, ret2;
+ u16 *load_options;
+
+ if (!bootefi_device_path || !bootefi_image_path) {
+ log_debug("Not loaded from disk\n");
+ /*
+ * Special case for efi payload not loaded from disk,
+ * such as 'bootefi hello' or for example payload
+ * loaded directly into memory via JTAG, etc:
+ */
+ file_path = efi_dp_from_mem(EFI_RESERVED_MEMORY_TYPE,
+ (uintptr_t)source_buffer,
+ source_size);
+ /*
+ * Make sure that device for device_path exist
+ * in load_image(). Otherwise, shell and grub will fail.
+ */
+ ret = efi_install_multiple_protocol_interfaces(&mem_handle,
+ &efi_guid_device_path,
+ file_path, NULL);
+ if (ret != EFI_SUCCESS)
+ goto out;
+ msg_path = file_path;
+ } else {
+ file_path = efi_dp_concat(bootefi_device_path,
+ bootefi_image_path, false);
+ msg_path = bootefi_image_path;
+ log_debug("Loaded from disk\n");
+ }
+
+ log_info("Booting %pD\n", msg_path);
+
+ ret = EFI_CALL(efi_load_image(false, efi_root, file_path, source_buffer,
+ source_size, &handle));
+ if (ret != EFI_SUCCESS) {
+ log_err("Loading image failed\n");
+ goto out;
+ }
+
+ /* Transfer environment variable as load options */
+ ret = efi_env_set_load_options(handle, "bootargs", &load_options);
+ if (ret != EFI_SUCCESS)
+ goto out;
+
+ ret = do_bootefi_exec(handle, load_options);
+
+out:
+ ret2 = efi_uninstall_multiple_protocol_interfaces(mem_handle,
+ &efi_guid_device_path,
+ file_path, NULL);
+ efi_free_pool(file_path);
+ return (ret != EFI_SUCCESS) ? ret : ret2;
+}
+
+/**
+ * efi_binary_run() - run loaded UEFI image
+ *
+ * @image: memory address of the UEFI image
+ * @size: size of the UEFI image
+ * @fdt: device-tree
+ *
+ * Execute an EFI binary image loaded at @image.
+ * @size may be zero if the binary is loaded with U-Boot load command.
+ *
+ * Return: status code
+ */
+efi_status_t efi_binary_run(void *image, size_t size, void *fdt)
+{
+ efi_status_t ret;
+
+ /* Initialize EFI drivers */
+ ret = efi_init_obj_list();
+ if (ret != EFI_SUCCESS) {
+ log_err("Error: Cannot initialize UEFI sub-system, r = %lu\n",
+ ret & ~EFI_ERROR_MASK);
+ return -1;
+ }
+
+ ret = efi_install_fdt(fdt);
+ if (ret != EFI_SUCCESS)
+ return ret;
+
+ return efi_run_image(image, size);
+}
diff --git a/lib/efi_loader/efi_bootmgr.c b/lib/efi_loader/efi_bootmgr.c
index 48153bd..4ac5192 100644
--- a/lib/efi_loader/efi_bootmgr.c
+++ b/lib/efi_loader/efi_bootmgr.c
@@ -9,7 +9,6 @@
#include <blk.h>
#include <blkmap.h>
-#include <common.h>
#include <charset.h>
#include <dm.h>
#include <log.h>
@@ -131,7 +130,7 @@
if (!dp)
continue;
- dp = efi_dp_append(dp, fp);
+ dp = efi_dp_concat(dp, fp, false);
if (!dp)
continue;
@@ -295,14 +294,17 @@
}
/**
- * check_disk_has_default_file() - load the default file
+ * fill_default_file_path() - get fallback boot device path for block device
+ *
+ * Provide the device path to the fallback UEFI boot file, e.g.
+ * EFI/BOOT/BOOTAA64.EFI if that file exists on the block device @blk.
*
* @blk: pointer to the UCLASS_BLK udevice
- * @dp: pointer to default file device path
+ * @dp: pointer to store the fallback boot device path
* Return: status code
*/
-static efi_status_t check_disk_has_default_file(struct udevice *blk,
- struct efi_device_path **dp)
+static efi_status_t fill_default_file_path(struct udevice *blk,
+ struct efi_device_path **dp)
{
efi_status_t ret;
struct udevice *partition;
@@ -349,7 +351,7 @@
if (!ramdisk_blk)
return EFI_LOAD_ERROR;
- ret = check_disk_has_default_file(ramdisk_blk, dp);
+ ret = fill_default_file_path(ramdisk_blk, dp);
if (ret != EFI_SUCCESS) {
log_info("Cannot boot from downloaded image\n");
goto err;
@@ -548,6 +550,50 @@
}
/**
+ * try_load_from_media() - load file from media
+ *
+ * @file_path: file path
+ * @handle_img: on return handle for the newly installed image
+ *
+ * If @file_path contains a file name, load the file.
+ * If @file_path does not have a file name, search the architecture-specific
+ * fallback boot file and load it.
+ * TODO: If the FilePathList[0] device does not support
+ * EFI_SIMPLE_FILE_SYSTEM_PROTOCOL but supports EFI_BLOCK_IO_PROTOCOL,
+ * call EFI_BOOT_SERVICES.ConnectController()
+ * TODO: FilePathList[0] device supports the EFI_SIMPLE_FILE_SYSTEM_PROTOCOL
+ * not based on EFI_BLOCK_IO_PROTOCOL
+ *
+ * Return: status code
+ */
+static efi_status_t try_load_from_media(struct efi_device_path *file_path,
+ efi_handle_t *handle_img)
+{
+ efi_handle_t handle_blkdev;
+ efi_status_t ret = EFI_SUCCESS;
+ struct efi_device_path *rem, *dp = NULL;
+ struct efi_device_path *final_dp = file_path;
+
+ handle_blkdev = efi_dp_find_obj(file_path, &efi_block_io_guid, &rem);
+ if (handle_blkdev) {
+ if (rem->type == DEVICE_PATH_TYPE_END) {
+ /* no file name present, try default file */
+ ret = fill_default_file_path(handle_blkdev->dev, &dp);
+ if (ret != EFI_SUCCESS)
+ return ret;
+
+ final_dp = dp;
+ }
+ }
+
+ ret = EFI_CALL(efi_load_image(true, efi_root, final_dp, NULL, 0, handle_img));
+
+ efi_free_pool(dp);
+
+ return ret;
+}
+
+/**
* try_load_entry() - try to load image for boot option
*
* Attempt to load load-option number 'n', returning device_path and file_path
@@ -581,7 +627,6 @@
}
if (lo.attributes & LOAD_OPTION_ACTIVE) {
- struct efi_device_path *file_path;
u32 attributes;
log_debug("trying to load \"%ls\" from %pD\n", lo.label,
@@ -598,10 +643,7 @@
else
ret = EFI_LOAD_ERROR;
} else {
- file_path = expand_media_path(lo.file_path);
- ret = EFI_CALL(efi_load_image(true, efi_root, file_path,
- NULL, 0, handle));
- efi_free_pool(file_path);
+ ret = try_load_from_media(lo.file_path, handle);
}
if (ret != EFI_SUCCESS) {
log_warning("Loading %ls '%ls' failed\n",
@@ -732,22 +774,26 @@
}
/**
- * efi_bootmgr_enumerate_boot_option() - enumerate the possible bootable media
+ * efi_bootmgr_enumerate_boot_options() - enumerate the possible bootable media
*
* @opt: pointer to the media boot option structure
- * @volume_handles: pointer to the efi handles
- * @count: number of efi handle
+ * @index: index of the opt array to store the boot option
+ * @handles: pointer to block device handles
+ * @count: On entry number of handles to block devices.
+ * On exit number of boot options.
+ * @removable: flag to parse removable only
* Return: status code
*/
-static efi_status_t efi_bootmgr_enumerate_boot_option(struct eficonfig_media_boot_option *opt,
- efi_handle_t *volume_handles,
- efi_status_t count)
+static efi_status_t
+efi_bootmgr_enumerate_boot_options(struct eficonfig_media_boot_option *opt,
+ efi_uintn_t index, efi_handle_t *handles,
+ efi_uintn_t *count, bool removable)
{
- u32 i;
+ u32 i, num = index;
struct efi_handler *handler;
efi_status_t ret = EFI_SUCCESS;
- for (i = 0; i < count; i++) {
+ for (i = 0; i < *count; i++) {
u16 *p;
u16 dev_name[BOOTMENU_DEVICE_NAME_MAX];
char *optional_data;
@@ -755,8 +801,18 @@
char buf[BOOTMENU_DEVICE_NAME_MAX];
struct efi_device_path *device_path;
struct efi_device_path *short_dp;
+ struct efi_block_io *blkio;
- ret = efi_search_protocol(volume_handles[i], &efi_guid_device_path, &handler);
+ ret = efi_search_protocol(handles[i], &efi_block_io_guid, &handler);
+ blkio = handler->protocol_interface;
+
+ if (blkio->media->logical_partition)
+ continue;
+
+ if (removable != (blkio->media->removable_media != 0))
+ continue;
+
+ ret = efi_search_protocol(handles[i], &efi_guid_device_path, &handler);
if (ret != EFI_SUCCESS)
continue;
ret = efi_protocol_open(handler, (void **)&device_path,
@@ -764,7 +820,7 @@
if (ret != EFI_SUCCESS)
continue;
- ret = efi_disk_get_device_name(volume_handles[i], buf, BOOTMENU_DEVICE_NAME_MAX);
+ ret = efi_disk_get_device_name(handles[i], buf, BOOTMENU_DEVICE_NAME_MAX);
if (ret != EFI_SUCCESS)
continue;
@@ -788,17 +844,23 @@
* to store guid, instead of realloc the load_option.
*/
lo.optional_data = "1234567";
- opt[i].size = efi_serialize_load_option(&lo, (u8 **)&opt[i].lo);
- if (!opt[i].size) {
+ opt[num].size = efi_serialize_load_option(&lo, (u8 **)&opt[num].lo);
+ if (!opt[num].size) {
ret = EFI_OUT_OF_RESOURCES;
goto out;
}
/* set the guid */
- optional_data = (char *)opt[i].lo + (opt[i].size - u16_strsize(u"1234567"));
+ optional_data = (char *)opt[num].lo + (opt[num].size - u16_strsize(u"1234567"));
memcpy(optional_data, &efi_guid_bootmenu_auto_generated, sizeof(efi_guid_t));
+ num++;
+
+ if (num >= *count)
+ break;
}
out:
+ *count = num;
+
return ret;
}
@@ -1027,8 +1089,7 @@
/**
* efi_bootmgr_update_media_device_boot_option() - generate the media device boot option
*
- * This function enumerates all devices supporting EFI_SIMPLE_FILE_SYSTEM_PROTOCOL
- * and generate the bootmenu entries.
+ * This function enumerates all BlockIo devices and add the boot option for it.
* This function also provide the BOOT#### variable maintenance for
* the media device entries.
* - Automatically create the BOOT#### variable for the newly detected device,
@@ -1043,14 +1104,14 @@
{
u32 i;
efi_status_t ret;
- efi_uintn_t count;
- efi_handle_t *volume_handles = NULL;
+ efi_uintn_t count, num, total;
+ efi_handle_t *handles = NULL;
struct eficonfig_media_boot_option *opt = NULL;
ret = efi_locate_handle_buffer_int(BY_PROTOCOL,
- &efi_simple_file_system_protocol_guid,
+ &efi_block_io_guid,
NULL, &count,
- (efi_handle_t **)&volume_handles);
+ (efi_handle_t **)&handles);
if (ret != EFI_SUCCESS)
goto out;
@@ -1060,23 +1121,32 @@
goto out;
}
- /* enumerate all devices supporting EFI_SIMPLE_FILE_SYSTEM_PROTOCOL */
- ret = efi_bootmgr_enumerate_boot_option(opt, volume_handles, count);
+ /* parse removable block io followed by fixed block io */
+ num = count;
+ ret = efi_bootmgr_enumerate_boot_options(opt, 0, handles, &num, true);
if (ret != EFI_SUCCESS)
goto out;
+ total = num;
+ num = count;
+ ret = efi_bootmgr_enumerate_boot_options(opt, total, handles, &num, false);
+ if (ret != EFI_SUCCESS)
+ goto out;
+
+ total = num;
+
/*
* System hardware configuration may vary depending on the user setup.
* The boot option is automatically added by the bootmenu.
* If the device is not attached to the system, the boot option needs
* to be deleted.
*/
- ret = efi_bootmgr_delete_invalid_boot_option(opt, count);
+ ret = efi_bootmgr_delete_invalid_boot_option(opt, total);
if (ret != EFI_SUCCESS)
goto out;
/* add non-existent boot option */
- for (i = 0; i < count; i++) {
+ for (i = 0; i < total; i++) {
u32 boot_index;
u16 var_name[9];
@@ -1105,13 +1175,50 @@
out:
if (opt) {
- for (i = 0; i < count; i++)
+ for (i = 0; i < total; i++)
free(opt[i].lo);
}
free(opt);
- efi_free_pool(volume_handles);
+ efi_free_pool(handles);
if (ret == EFI_NOT_FOUND)
return EFI_SUCCESS;
return ret;
}
+
+/**
+ * efi_bootmgr_run() - execute EFI boot manager
+ * @fdt: Flat device tree
+ *
+ * Invoke EFI boot manager and execute a binary depending on
+ * boot options. If @fdt is not NULL, it will be passed to
+ * the executed binary.
+ *
+ * Return: status code
+ */
+efi_status_t efi_bootmgr_run(void *fdt)
+{
+ efi_handle_t handle;
+ void *load_options;
+ efi_status_t ret;
+
+ /* Initialize EFI drivers */
+ ret = efi_init_obj_list();
+ if (ret != EFI_SUCCESS) {
+ log_err("Error: Cannot initialize UEFI sub-system, r = %lu\n",
+ ret & ~EFI_ERROR_MASK);
+ return CMD_RET_FAILURE;
+ }
+
+ ret = efi_install_fdt(fdt);
+ if (ret != EFI_SUCCESS)
+ return ret;
+
+ ret = efi_bootmgr_load(&handle, &load_options);
+ if (ret != EFI_SUCCESS) {
+ log_notice("EFI boot manager: Cannot load any image\n");
+ return ret;
+ }
+
+ return do_bootefi_exec(handle, load_options);
+}
diff --git a/lib/efi_loader/efi_boottime.c b/lib/efi_loader/efi_boottime.c
index 3767fa2..1951291 100644
--- a/lib/efi_loader/efi_boottime.c
+++ b/lib/efi_loader/efi_boottime.c
@@ -5,7 +5,6 @@
* Copyright (c) 2016 Alexander Graf
*/
-#include <common.h>
#include <bootm.h>
#include <div64.h>
#include <dm/device.h>
@@ -1342,7 +1341,7 @@
const efi_guid_t *protocol,
efi_handle_t child_handle)
{
- efi_uintn_t number_of_drivers, tmp;
+ efi_uintn_t number_of_drivers;
efi_handle_t *driver_handle_buffer;
efi_status_t r, ret;
@@ -1353,27 +1352,13 @@
if (!number_of_drivers)
return EFI_SUCCESS;
- tmp = number_of_drivers;
while (number_of_drivers) {
- ret = EFI_CALL(efi_disconnect_controller(
+ r = EFI_CALL(efi_disconnect_controller(
handle,
driver_handle_buffer[--number_of_drivers],
child_handle));
- if (ret != EFI_SUCCESS)
- goto reconnect;
- }
-
- free(driver_handle_buffer);
- return ret;
-
-reconnect:
- /* Reconnect all disconnected drivers */
- for (; number_of_drivers < tmp; number_of_drivers++) {
- r = EFI_CALL(efi_connect_controller(handle,
- &driver_handle_buffer[number_of_drivers],
- NULL, true));
if (r != EFI_SUCCESS)
- EFI_PRINT("Failed to reconnect controller\n");
+ ret = r;
}
free(driver_handle_buffer);
@@ -1412,6 +1397,13 @@
r = efi_disconnect_all_drivers(handle, protocol, NULL);
if (r != EFI_SUCCESS) {
r = EFI_ACCESS_DENIED;
+ /*
+ * This will reconnect all controllers of the handle, even ones
+ * that were not connected before. This can be done better
+ * but we are following the EDKII implementation on this for
+ * now
+ */
+ EFI_CALL(efi_connect_controller(handle, NULL, NULL, true));
goto out;
}
/* Close protocol */
@@ -1824,7 +1816,7 @@
if (device_path) {
info->device_handle = efi_dp_find_obj(device_path, NULL, NULL);
- dp = efi_dp_append(device_path, file_path);
+ dp = efi_dp_concat(device_path, file_path, false);
if (!dp) {
ret = EFI_OUT_OF_RESOURCES;
goto failure;
diff --git a/lib/efi_loader/efi_capsule.c b/lib/efi_loader/efi_capsule.c
index af8a2ee..de0d49e 100644
--- a/lib/efi_loader/efi_capsule.c
+++ b/lib/efi_loader/efi_capsule.c
@@ -8,7 +8,6 @@
#define LOG_CATEGORY LOGC_EFI
-#include <common.h>
#include <efi_loader.h>
#include <efi_variable.h>
#include <env.h>
diff --git a/lib/efi_loader/efi_conformance.c b/lib/efi_loader/efi_conformance.c
index 0ca26f5..167067e 100644
--- a/lib/efi_loader/efi_conformance.c
+++ b/lib/efi_loader/efi_conformance.c
@@ -5,7 +5,6 @@
* Copyright (C) 2022 Arm Ltd.
*/
-#include <common.h>
#include <efi_loader.h>
#include <log.h>
#include <efi_api.h>
diff --git a/lib/efi_loader/efi_console.c b/lib/efi_loader/efi_console.c
index a2d137d..03dece5 100644
--- a/lib/efi_loader/efi_console.c
+++ b/lib/efi_loader/efi_console.c
@@ -8,7 +8,6 @@
#define LOG_CATEGORY LOGC_EFI
#include <ansi.h>
-#include <common.h>
#include <charset.h>
#include <malloc.h>
#include <time.h>
diff --git a/lib/efi_loader/efi_device_path.c b/lib/efi_loader/efi_device_path.c
index ed7214f..46aa59b 100644
--- a/lib/efi_loader/efi_device_path.c
+++ b/lib/efi_loader/efi_device_path.c
@@ -7,7 +7,6 @@
#define LOG_CATEGORY LOGC_EFI
-#include <common.h>
#include <blk.h>
#include <dm.h>
#include <dm/root.h>
@@ -272,30 +271,27 @@
}
/**
- * efi_dp_append_or_concatenate() - Append or concatenate two device paths.
- * Concatenated device path will be separated
- * by a sub-type 0xff end node
+ * efi_dp_concat() - Concatenate two device paths and add and terminate them
+ * with an end node.
*
- * @dp1: First device path
- * @dp2: Second device path
- * @concat: If true the two device paths will be concatenated and separated
- * by an end of entrire device path sub-type 0xff end node.
- * If true the second device path will be appended to the first and
- * terminated by an end node
+ * @dp1: First device path
+ * @dp2: Second device path
+ * @split_end_node: If true the two device paths will be concatenated and
+ * separated by an end node (DEVICE_PATH_SUB_TYPE_END).
+ * If false the second device path will be concatenated to the
+ * first one as-is.
*
* Return:
* concatenated device path or NULL. Caller must free the returned value
*/
-static struct
-efi_device_path *efi_dp_append_or_concatenate(const struct efi_device_path *dp1,
- const struct efi_device_path *dp2,
- bool concat)
+struct
+efi_device_path *efi_dp_concat(const struct efi_device_path *dp1,
+ const struct efi_device_path *dp2,
+ bool split_end_node)
{
struct efi_device_path *ret;
- size_t end_size = sizeof(END);
+ size_t end_size;
- if (concat)
- end_size = 2 * sizeof(END);
if (!dp1 && !dp2) {
/* return an end node */
ret = efi_dp_dup(&END);
@@ -307,14 +303,20 @@
/* both dp1 and dp2 are non-null */
unsigned sz1 = efi_dp_size(dp1);
unsigned sz2 = efi_dp_size(dp2);
- void *p = efi_alloc(sz1 + sz2 + end_size);
+ void *p;
+
+ if (split_end_node)
+ end_size = 2 * sizeof(END);
+ else
+ end_size = sizeof(END);
+ p = efi_alloc(sz1 + sz2 + end_size);
if (!p)
return NULL;
ret = p;
memcpy(p, dp1, sz1);
p += sz1;
- if (concat) {
+ if (split_end_node) {
memcpy(p, &END, sizeof(END));
p += sizeof(END);
}
@@ -328,37 +330,6 @@
return ret;
}
-/**
- * efi_dp_append() - Append a device to an existing device path.
- *
- * @dp1: First device path
- * @dp2: Second device path
- *
- * Return:
- * concatenated device path or NULL. Caller must free the returned value
- */
-struct efi_device_path *efi_dp_append(const struct efi_device_path *dp1,
- const struct efi_device_path *dp2)
-{
- return efi_dp_append_or_concatenate(dp1, dp2, false);
-}
-
-/**
- * efi_dp_concat() - Concatenate 2 device paths. The final device path will
- * contain two device paths separated by and end node (0xff).
- *
- * @dp1: First device path
- * @dp2: Second device path
- *
- * Return:
- * concatenated device path or NULL. Caller must free the returned value
- */
-struct efi_device_path *efi_dp_concat(const struct efi_device_path *dp1,
- const struct efi_device_path *dp2)
-{
- return efi_dp_append_or_concatenate(dp1, dp2, true);
-}
-
struct efi_device_path *efi_dp_append_node(const struct efi_device_path *dp,
const struct efi_device_path *node)
{
@@ -1090,7 +1061,8 @@
if (path && !file)
return EFI_INVALID_PARAMETER;
- if (!strcmp(dev, "Mem") || !strcmp(dev, "hostfs")) {
+ if (IS_ENABLED(CONFIG_EFI_BINARY_EXEC) &&
+ (!strcmp(dev, "Mem") || !strcmp(dev, "hostfs"))) {
/* loadm command and semihosting */
efi_get_image_parameters(&image_addr, &image_size);
diff --git a/lib/efi_loader/efi_device_path_to_text.c b/lib/efi_loader/efi_device_path_to_text.c
index 8c76d8b..0c7b30a 100644
--- a/lib/efi_loader/efi_device_path_to_text.c
+++ b/lib/efi_loader/efi_device_path_to_text.c
@@ -5,7 +5,6 @@
* Copyright (c) 2017 Heinrich Schuchardt
*/
-#include <common.h>
#include <blk.h>
#include <efi_loader.h>
#include <malloc.h>
diff --git a/lib/efi_loader/efi_device_path_utilities.c b/lib/efi_loader/efi_device_path_utilities.c
index a07d9ba..c95dbfa 100644
--- a/lib/efi_loader/efi_device_path_utilities.c
+++ b/lib/efi_loader/efi_device_path_utilities.c
@@ -5,7 +5,6 @@
* Copyright (c) 2017 Leif Lindholm
*/
-#include <common.h>
#include <efi_loader.h>
const efi_guid_t efi_guid_device_path_utilities_protocol =
@@ -77,7 +76,7 @@
const struct efi_device_path *src2)
{
EFI_ENTRY("%pD, %pD", src1, src2);
- return EFI_EXIT(efi_dp_append(src1, src2));
+ return EFI_EXIT(efi_dp_concat(src1, src2, false));
}
/*
diff --git a/lib/efi_loader/efi_disk.c b/lib/efi_loader/efi_disk.c
index b808a7f..b1739d9 100644
--- a/lib/efi_loader/efi_disk.c
+++ b/lib/efi_loader/efi_disk.c
@@ -7,7 +7,6 @@
#define LOG_CATEGORY LOGC_EFI
-#include <common.h>
#include <blk.h>
#include <dm.h>
#include <dm/device-internal.h>
@@ -32,20 +31,15 @@
*
* @header: EFI object header
* @ops: EFI disk I/O protocol interface
- * @dev_index: device index of block device
* @media: block I/O media information
* @dp: device path to the block device
- * @part: partition
* @volume: simple file system protocol of the partition
- * @dev: associated DM device
*/
struct efi_disk_obj {
struct efi_object header;
struct efi_block_io ops;
- int dev_index;
struct efi_block_io_media media;
struct efi_device_path *dp;
- unsigned int part;
struct efi_simple_file_system_protocol *volume;
};
@@ -377,13 +371,26 @@
return 1;
}
+static void efi_disk_free_diskobj(struct efi_disk_obj *diskobj)
+{
+ struct efi_device_path *dp = diskobj->dp;
+ struct efi_simple_file_system_protocol *volume = diskobj->volume;
+
+ /*
+ * ignore error of efi_delete_handle() since this function
+ * is expected to be called in error path.
+ */
+ efi_delete_handle(&diskobj->header);
+ efi_free_pool(dp);
+ free(volume);
+}
+
/**
* efi_disk_add_dev() - create a handle for a partition or disk
*
* @parent: parent handle
* @dp_parent: parent device path
* @desc: internal block device
- * @dev_index: device index for block device
* @part_info: partition info
* @part: partition
* @disk: pointer to receive the created handle
@@ -394,7 +401,6 @@
efi_handle_t parent,
struct efi_device_path *dp_parent,
struct blk_desc *desc,
- int dev_index,
struct disk_partition *part_info,
unsigned int part,
struct efi_disk_obj **disk,
@@ -456,7 +462,6 @@
diskobj->dp = efi_dp_from_part(desc, part);
diskobj->media.last_block = desc->lba - 1;
}
- diskobj->part = part;
/*
* Install the device path and the block IO protocol.
@@ -499,7 +504,6 @@
goto error;
}
diskobj->ops = block_io_disk_template;
- diskobj->dev_index = dev_index;
/* Fill in EFI IO Media info (for read/write callbacks) */
diskobj->media.removable_media = desc->removable;
@@ -519,7 +523,7 @@
EFI_PRINT("BlockIO: part %u, present %d, logical %d, removable %d"
", last_block %llu\n",
- diskobj->part,
+ part,
diskobj->media.media_present,
diskobj->media.logical_partition,
diskobj->media.removable_media,
@@ -538,9 +542,7 @@
}
return EFI_SUCCESS;
error:
- efi_delete_handle(&diskobj->header);
- free(diskobj->volume);
- free(diskobj);
+ efi_disk_free_diskobj(diskobj);
return ret;
}
@@ -566,7 +568,7 @@
diskid = desc->devnum;
ret = efi_disk_add_dev(NULL, NULL, desc,
- diskid, NULL, 0, &disk, agent_handle);
+ NULL, 0, &disk, agent_handle);
if (ret != EFI_SUCCESS) {
if (ret == EFI_NOT_READY) {
log_notice("Disk %s not ready\n", dev->name);
@@ -579,8 +581,7 @@
return ret;
}
if (efi_link_dev(&disk->header, dev)) {
- efi_free_pool(disk->dp);
- efi_delete_handle(&disk->header);
+ efi_disk_free_diskobj(disk);
return -EINVAL;
}
@@ -627,15 +628,16 @@
return -1;
dp_parent = (struct efi_device_path *)handler->protocol_interface;
- ret = efi_disk_add_dev(parent, dp_parent, desc, diskid,
+ ret = efi_disk_add_dev(parent, dp_parent, desc,
info, part, &disk, agent_handle);
if (ret != EFI_SUCCESS) {
log_err("Adding partition for %s failed\n", dev->name);
return -1;
}
if (efi_link_dev(&disk->header, dev)) {
- efi_free_pool(disk->dp);
- efi_delete_handle(&disk->header);
+ efi_disk_free_diskobj(disk);
+
+ /* TODO: closing the parent EFI_BLOCK_IO_PROTOCOL is missing. */
return -1;
}
@@ -717,7 +719,9 @@
struct udevice *dev = event->data.dm.dev;
efi_handle_t handle;
struct blk_desc *desc;
+ struct efi_device_path *dp = NULL;
struct efi_disk_obj *diskobj = NULL;
+ struct efi_simple_file_system_protocol *volume = NULL;
efi_status_t ret;
if (dev_tag_get_ptr(dev, DM_TAG_EFI, (void **)&handle))
@@ -727,25 +731,35 @@
switch (id) {
case UCLASS_BLK:
desc = dev_get_uclass_plat(dev);
- if (desc && desc->uclass_id != UCLASS_EFI_LOADER)
- diskobj = container_of(handle, struct efi_disk_obj,
- header);
+ if (desc && desc->uclass_id == UCLASS_EFI_LOADER)
+ /*
+ * EFI application/driver manages the EFI handle,
+ * no need to delete EFI handle.
+ */
+ return 0;
+
+ diskobj = (struct efi_disk_obj *)handle;
break;
case UCLASS_PARTITION:
- diskobj = container_of(handle, struct efi_disk_obj, header);
+ diskobj = (struct efi_disk_obj *)handle;
+
+ /* TODO: closing the parent EFI_BLOCK_IO_PROTOCOL is missing. */
+
break;
default:
return 0;
}
+ dp = diskobj->dp;
+ volume = diskobj->volume;
+
ret = efi_delete_handle(handle);
/* Do not delete DM device if there are still EFI drivers attached. */
if (ret != EFI_SUCCESS)
return -1;
- if (diskobj)
- efi_free_pool(diskobj->dp);
-
+ efi_free_pool(dp);
+ free(volume);
dev_tag_del(dev, DM_TAG_EFI);
return 0;
diff --git a/lib/efi_loader/efi_dt_fixup.c b/lib/efi_loader/efi_dt_fixup.c
index 838023c..9886e68 100644
--- a/lib/efi_loader/efi_dt_fixup.c
+++ b/lib/efi_loader/efi_dt_fixup.c
@@ -5,7 +5,6 @@
* Copyright (c) 2020 Heinrich Schuchardt
*/
-#include <common.h>
#include <efi_dt_fixup.h>
#include <efi_loader.h>
#include <efi_rng.h>
@@ -173,7 +172,7 @@
}
fdt_set_totalsize(dtb, *buffer_size);
- if (image_setup_libfdt(&img, dtb, 0, NULL)) {
+ if (image_setup_libfdt(&img, dtb, NULL)) {
log_err("failed to process device tree\n");
ret = EFI_INVALID_PARAMETER;
goto out;
diff --git a/lib/efi_loader/efi_esrt.c b/lib/efi_loader/efi_esrt.c
index 7f46d65..443bd99 100644
--- a/lib/efi_loader/efi_esrt.c
+++ b/lib/efi_loader/efi_esrt.c
@@ -5,7 +5,6 @@
* Copyright (C) 2021 Arm Ltd.
*/
-#include <common.h>
#include <efi_loader.h>
#include <log.h>
#include <efi_api.h>
@@ -365,7 +364,7 @@
if (ret != EFI_SUCCESS) {
EFI_PRINT("ESRT Unable to find FMP handle (%u)\n",
idx);
- goto out;
+ continue;
}
fmp = handler->protocol_interface;
@@ -380,15 +379,14 @@
* fmp->get_image_info to return BUFFER_TO_SMALL.
*/
EFI_PRINT("ESRT erroneous FMP implementation\n");
- ret = EFI_INVALID_PARAMETER;
- goto out;
+ continue;
}
ret = efi_allocate_pool(EFI_BOOT_SERVICES_DATA, info_size,
(void **)&img_info);
if (ret != EFI_SUCCESS) {
EFI_PRINT("ESRT failed to allocate memory for image info\n");
- goto out;
+ continue;
}
/*
@@ -406,7 +404,7 @@
if (ret != EFI_SUCCESS) {
EFI_PRINT("ESRT failed to obtain image info from FMP\n");
efi_free_pool(img_info);
- goto out;
+ continue;
}
num_entries += desc_count;
@@ -414,6 +412,13 @@
efi_free_pool(img_info);
}
+ /* error occurs in fmp->get_image_info() if num_entries is 0 here */
+ if (!num_entries) {
+ EFI_PRINT("Error occurs, num_entries should not be 0\n");
+ ret = EFI_INVALID_PARAMETER;
+ goto out;
+ }
+
EFI_PRINT("ESRT create table with %u entries\n", num_entries);
/*
* Allocate an ESRT with the sufficient number of entries to accommodate
@@ -437,7 +442,7 @@
if (ret != EFI_SUCCESS) {
EFI_PRINT("ESRT unable to find FMP handle (%u)\n",
idx);
- break;
+ continue;
}
fmp = handler->protocol_interface;
diff --git a/lib/efi_loader/efi_file.c b/lib/efi_loader/efi_file.c
index 3c56ceb..222001d 100644
--- a/lib/efi_loader/efi_file.c
+++ b/lib/efi_loader/efi_file.c
@@ -5,7 +5,6 @@
* Copyright (c) 2017 Rob Clark
*/
-#include <common.h>
#include <charset.h>
#include <efi_loader.h>
#include <log.h>
diff --git a/lib/efi_loader/efi_firmware.c b/lib/efi_loader/efi_firmware.c
index 9abb29f..9fd1329 100644
--- a/lib/efi_loader/efi_firmware.c
+++ b/lib/efi_loader/efi_firmware.c
@@ -6,7 +6,6 @@
* Author: AKASHI Takahiro
*/
-#include <common.h>
#include <charset.h>
#include <dfu.h>
#include <efi_loader.h>
@@ -207,18 +206,10 @@
{
u16 varname[13]; /* u"FmpStateXXXX" */
efi_status_t ret;
- efi_uintn_t size;
- struct fmp_state var_state = { 0 };
-
- efi_create_indexed_name(varname, sizeof(varname), "FmpState",
- fw_array->image_index);
- size = sizeof(var_state);
- ret = efi_get_variable_int(varname, &fw_array->image_type_id,
- NULL, &size, &var_state, NULL);
- if (ret == EFI_SUCCESS)
- image_info->version = var_state.fw_version;
- else
- image_info->version = 0;
+ efi_uintn_t size, expected_size;
+ uint num_banks = 1;
+ uint active_index = 0;
+ struct fmp_state *var_state;
efi_firmware_get_lsv_from_dtb(fw_array->image_index,
&fw_array->image_type_id,
@@ -227,6 +218,31 @@
image_info->version_name = NULL; /* not supported */
image_info->last_attempt_version = 0;
image_info->last_attempt_status = LAST_ATTEMPT_STATUS_SUCCESS;
+ image_info->version = 0;
+
+ /* get the fw_version */
+ efi_create_indexed_name(varname, sizeof(varname), "FmpState",
+ fw_array->image_index);
+ if (IS_ENABLED(CONFIG_FWU_MULTI_BANK_UPDATE)) {
+ ret = fwu_get_active_index(&active_index);
+ if (ret)
+ return;
+
+ num_banks = CONFIG_FWU_NUM_BANKS;
+ }
+
+ size = num_banks * sizeof(*var_state);
+ expected_size = size;
+ var_state = calloc(1, size);
+ if (!var_state)
+ return;
+
+ ret = efi_get_variable_int(varname, &fw_array->image_type_id,
+ NULL, &size, var_state, NULL);
+ if (ret == EFI_SUCCESS && expected_size == size)
+ image_info->version = var_state[active_index].fw_version;
+
+ free(var_state);
}
/**
@@ -362,8 +378,11 @@
{
u16 varname[13]; /* u"FmpStateXXXX" */
efi_status_t ret;
+ uint num_banks = 1;
+ uint update_bank = 0;
+ efi_uintn_t size;
efi_guid_t *image_type_id;
- struct fmp_state var_state = { 0 };
+ struct fmp_state *var_state;
image_type_id = efi_firmware_get_image_type_id(image_index);
if (!image_type_id)
@@ -372,19 +391,44 @@
efi_create_indexed_name(varname, sizeof(varname), "FmpState",
image_index);
+ if (IS_ENABLED(CONFIG_FWU_MULTI_BANK_UPDATE)) {
+ ret = fwu_plat_get_update_index(&update_bank);
+ if (ret)
+ return EFI_INVALID_PARAMETER;
+
+ num_banks = CONFIG_FWU_NUM_BANKS;
+ }
+
+ size = num_banks * sizeof(*var_state);
+ var_state = calloc(1, size);
+ if (!var_state)
+ return EFI_OUT_OF_RESOURCES;
+
+ /*
+ * GetVariable may fail, EFI_NOT_FOUND is returned if FmpState
+ * variable has not been set yet.
+ * Ignore the error here since the correct FmpState variable
+ * is set later.
+ */
+ efi_get_variable_int(varname, image_type_id, NULL, &size, var_state,
+ NULL);
+
/*
* Only the fw_version is set here.
* lowest_supported_version in FmpState variable is ignored since
* it can be tampered if the file based EFI variable storage is used.
*/
- var_state.fw_version = state->fw_version;
+ var_state[update_bank].fw_version = state->fw_version;
+ size = num_banks * sizeof(*var_state);
ret = efi_set_variable_int(varname, image_type_id,
EFI_VARIABLE_READ_ONLY |
EFI_VARIABLE_NON_VOLATILE |
EFI_VARIABLE_BOOTSERVICE_ACCESS |
EFI_VARIABLE_RUNTIME_ACCESS,
- sizeof(var_state), &var_state, false);
+ size, var_state, false);
+
+ free(var_state);
return ret;
}
@@ -611,6 +655,7 @@
u16 **abort_reason)
{
int ret;
+ u8 dfu_alt_num;
efi_status_t status;
struct fmp_state state = { 0 };
@@ -625,19 +670,25 @@
if (status != EFI_SUCCESS)
return EFI_EXIT(status);
+ /*
+ * dfu_alt_num is assigned from 0 while image_index starts from 1.
+ * dfu_alt_num is calculated by (image_index - 1) when multi bank update
+ * is not used.
+ */
+ dfu_alt_num = image_index - 1;
if (IS_ENABLED(CONFIG_FWU_MULTI_BANK_UPDATE)) {
/*
* Based on the value of update bank, derive the
* image index value.
*/
- ret = fwu_get_image_index(&image_index);
+ ret = fwu_get_dfu_alt_num(image_index, &dfu_alt_num);
if (ret) {
log_debug("Unable to get FWU image_index\n");
return EFI_EXIT(EFI_DEVICE_ERROR);
}
}
- if (dfu_write_by_alt(image_index - 1, (void *)image, image_size,
+ if (dfu_write_by_alt(dfu_alt_num, (void *)image, image_size,
NULL, NULL))
return EFI_EXIT(EFI_DEVICE_ERROR);
diff --git a/lib/efi_loader/efi_freestanding.c b/lib/efi_loader/efi_freestanding.c
index 4b65fc6..b278609 100644
--- a/lib/efi_loader/efi_freestanding.c
+++ b/lib/efi_loader/efi_freestanding.c
@@ -8,7 +8,7 @@
* memset(), and memcmp().
*/
-#include <common.h>
+#include <linux/types.h>
/**
* memcmp() - compare memory areas
diff --git a/lib/efi_loader/efi_gop.c b/lib/efi_loader/efi_gop.c
index a09db31..41e12fa 100644
--- a/lib/efi_loader/efi_gop.c
+++ b/lib/efi_loader/efi_gop.c
@@ -5,7 +5,6 @@
* Copyright (c) 2016 Alexander Graf
*/
-#include <common.h>
#include <dm.h>
#include <efi_loader.h>
#include <log.h>
diff --git a/lib/efi_loader/efi_helper.c b/lib/efi_loader/efi_helper.c
index cdfd16e..11066eb 100644
--- a/lib/efi_loader/efi_helper.c
+++ b/lib/efi_loader/efi_helper.c
@@ -4,14 +4,20 @@
*/
#define LOG_CATEGORY LOGC_EFI
-#include <common.h>
+#include <bootm.h>
#include <env.h>
+#include <image.h>
+#include <log.h>
#include <malloc.h>
+#include <mapmem.h>
#include <dm.h>
#include <fs.h>
+#include <efi_api.h>
#include <efi_load_initrd.h>
#include <efi_loader.h>
#include <efi_variable.h>
+#include <linux/libfdt.h>
+#include <linux/list.h>
#if defined(CONFIG_CMD_EFIDEBUG) || defined(CONFIG_EFI_LOAD_FILE2_INITRD)
/* GUID used by Linux to identify the LoadFile2 protocol with the initrd */
@@ -282,3 +288,282 @@
return false;
}
+
+/**
+ * efi_env_set_load_options() - set load options from environment variable
+ *
+ * @handle: the image handle
+ * @env_var: name of the environment variable
+ * @load_options: pointer to load options (output)
+ * Return: status code
+ */
+efi_status_t efi_env_set_load_options(efi_handle_t handle,
+ const char *env_var,
+ u16 **load_options)
+{
+ const char *env = env_get(env_var);
+ size_t size;
+ u16 *pos;
+ efi_status_t ret;
+
+ *load_options = NULL;
+ if (!env)
+ return EFI_SUCCESS;
+ size = sizeof(u16) * (utf8_utf16_strlen(env) + 1);
+ pos = calloc(size, 1);
+ if (!pos)
+ return EFI_OUT_OF_RESOURCES;
+ *load_options = pos;
+ utf8_utf16_strcpy(&pos, env);
+ ret = efi_set_load_options(handle, size, *load_options);
+ if (ret != EFI_SUCCESS) {
+ free(*load_options);
+ *load_options = NULL;
+ }
+ return ret;
+}
+
+/**
+ * copy_fdt() - Copy the device tree to a new location available to EFI
+ *
+ * The FDT is copied to a suitable location within the EFI memory map.
+ * Additional 12 KiB are added to the space in case the device tree needs to be
+ * expanded later with fdt_open_into().
+ *
+ * @fdtp: On entry a pointer to the flattened device tree.
+ * On exit a pointer to the copy of the flattened device tree.
+ * FDT start
+ * Return: status code
+ */
+static efi_status_t copy_fdt(void **fdtp)
+{
+ unsigned long fdt_ram_start = -1L, fdt_pages;
+ efi_status_t ret = 0;
+ void *fdt, *new_fdt;
+ u64 new_fdt_addr;
+ uint fdt_size;
+ int i;
+
+ for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
+ u64 ram_start = gd->bd->bi_dram[i].start;
+ u64 ram_size = gd->bd->bi_dram[i].size;
+
+ if (!ram_size)
+ continue;
+
+ if (ram_start < fdt_ram_start)
+ fdt_ram_start = ram_start;
+ }
+
+ /*
+ * Give us at least 12 KiB of breathing room in case the device tree
+ * needs to be expanded later.
+ */
+ fdt = *fdtp;
+ fdt_pages = efi_size_in_pages(fdt_totalsize(fdt) + 0x3000);
+ fdt_size = fdt_pages << EFI_PAGE_SHIFT;
+
+ ret = efi_allocate_pages(EFI_ALLOCATE_ANY_PAGES,
+ EFI_ACPI_RECLAIM_MEMORY, fdt_pages,
+ &new_fdt_addr);
+ if (ret != EFI_SUCCESS) {
+ log_err("ERROR: Failed to reserve space for FDT\n");
+ goto done;
+ }
+ new_fdt = (void *)(uintptr_t)new_fdt_addr;
+ memcpy(new_fdt, fdt, fdt_totalsize(fdt));
+ fdt_set_totalsize(new_fdt, fdt_size);
+
+ *fdtp = (void *)(uintptr_t)new_fdt_addr;
+done:
+ return ret;
+}
+
+/**
+ * get_config_table() - get configuration table
+ *
+ * @guid: GUID of the configuration table
+ * Return: pointer to configuration table or NULL
+ */
+static void *get_config_table(const efi_guid_t *guid)
+{
+ size_t i;
+
+ for (i = 0; i < systab.nr_tables; i++) {
+ if (!guidcmp(guid, &systab.tables[i].guid))
+ return systab.tables[i].table;
+ }
+ return NULL;
+}
+
+/**
+ * efi_install_fdt() - install device tree
+ *
+ * If fdt is not EFI_FDT_USE_INTERNAL, the device tree located at that memory
+ * address will be installed as configuration table, otherwise the device
+ * tree located at the address indicated by environment variable fdt_addr or as
+ * fallback fdtcontroladdr will be used.
+ *
+ * On architectures using ACPI tables device trees shall not be installed as
+ * configuration table.
+ *
+ * @fdt: address of device tree or EFI_FDT_USE_INTERNAL to use
+ * the hardware device tree as indicated by environment variable
+ * fdt_addr or as fallback the internal device tree as indicated by
+ * the environment variable fdtcontroladdr
+ * Return: status code
+ */
+efi_status_t efi_install_fdt(void *fdt)
+{
+ struct bootm_headers img = { 0 };
+ efi_status_t ret;
+
+ /*
+ * The EBBR spec requires that we have either an FDT or an ACPI table
+ * but not both.
+ */
+ if (CONFIG_IS_ENABLED(GENERATE_ACPI_TABLE) && fdt)
+ log_warning("WARNING: Can't have ACPI table and device tree - ignoring DT.\n");
+
+ if (fdt == EFI_FDT_USE_INTERNAL) {
+ const char *fdt_opt;
+ uintptr_t fdt_addr;
+
+ /* Look for device tree that is already installed */
+ if (get_config_table(&efi_guid_fdt))
+ return EFI_SUCCESS;
+ /* Check if there is a hardware device tree */
+ fdt_opt = env_get("fdt_addr");
+ /* Use our own device tree as fallback */
+ if (!fdt_opt) {
+ fdt_opt = env_get("fdtcontroladdr");
+ if (!fdt_opt) {
+ log_err("ERROR: need device tree\n");
+ return EFI_NOT_FOUND;
+ }
+ }
+ fdt_addr = hextoul(fdt_opt, NULL);
+ if (!fdt_addr) {
+ log_err("ERROR: invalid $fdt_addr or $fdtcontroladdr\n");
+ return EFI_LOAD_ERROR;
+ }
+ fdt = map_sysmem(fdt_addr, 0);
+ }
+
+ /* Install device tree */
+ if (fdt_check_header(fdt)) {
+ log_err("ERROR: invalid device tree\n");
+ return EFI_LOAD_ERROR;
+ }
+
+ /* Create memory reservations as indicated by the device tree */
+ efi_carve_out_dt_rsv(fdt);
+
+ if (CONFIG_IS_ENABLED(GENERATE_ACPI_TABLE))
+ return EFI_SUCCESS;
+
+ /* Prepare device tree for payload */
+ ret = copy_fdt(&fdt);
+ if (ret) {
+ log_err("ERROR: out of memory\n");
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ if (image_setup_libfdt(&img, fdt, NULL)) {
+ log_err("ERROR: failed to process device tree\n");
+ return EFI_LOAD_ERROR;
+ }
+
+ efi_try_purge_kaslr_seed(fdt);
+
+ if (CONFIG_IS_ENABLED(EFI_TCG2_PROTOCOL_MEASURE_DTB)) {
+ ret = efi_tcg2_measure_dtb(fdt);
+ if (ret == EFI_SECURITY_VIOLATION) {
+ log_err("ERROR: failed to measure DTB\n");
+ return ret;
+ }
+ }
+
+ /* Install device tree as UEFI table */
+ ret = efi_install_configuration_table(&efi_guid_fdt, fdt);
+ if (ret != EFI_SUCCESS) {
+ log_err("ERROR: failed to install device tree\n");
+ return ret;
+ }
+
+ return EFI_SUCCESS;
+}
+
+/**
+ * do_bootefi_exec() - execute EFI binary
+ *
+ * The image indicated by @handle is started. When it returns the allocated
+ * memory for the @load_options is freed.
+ *
+ * @handle: handle of loaded image
+ * @load_options: load options
+ * Return: status code
+ *
+ * Load the EFI binary into a newly assigned memory unwinding the relocation
+ * information, install the loaded image protocol, and call the binary.
+ */
+efi_status_t do_bootefi_exec(efi_handle_t handle, void *load_options)
+{
+ efi_status_t ret;
+ efi_uintn_t exit_data_size = 0;
+ u16 *exit_data = NULL;
+ struct efi_event *evt;
+
+ /* On ARM switch from EL3 or secure mode to EL2 or non-secure mode */
+ switch_to_non_secure_mode();
+
+ /*
+ * The UEFI standard requires that the watchdog timer is set to five
+ * minutes when invoking an EFI boot option.
+ *
+ * Unified Extensible Firmware Interface (UEFI), version 2.7 Errata A
+ * 7.5. Miscellaneous Boot Services - EFI_BOOT_SERVICES.SetWatchdogTimer
+ */
+ ret = efi_set_watchdog(300);
+ if (ret != EFI_SUCCESS) {
+ log_err("ERROR: Failed to set watchdog timer\n");
+ goto out;
+ }
+
+ /* Call our payload! */
+ ret = EFI_CALL(efi_start_image(handle, &exit_data_size, &exit_data));
+ if (ret != EFI_SUCCESS) {
+ log_err("## Application failed, r = %lu\n",
+ ret & ~EFI_ERROR_MASK);
+ if (exit_data) {
+ log_err("## %ls\n", exit_data);
+ efi_free_pool(exit_data);
+ }
+ }
+
+ efi_restore_gd();
+
+out:
+ free(load_options);
+
+ if (IS_ENABLED(CONFIG_EFI_LOAD_FILE2_INITRD)) {
+ if (efi_initrd_deregister() != EFI_SUCCESS)
+ log_err("Failed to remove loadfile2 for initrd\n");
+ }
+
+ /* Notify EFI_EVENT_GROUP_RETURN_TO_EFIBOOTMGR event group. */
+ list_for_each_entry(evt, &efi_events, link) {
+ if (evt->group &&
+ !guidcmp(evt->group,
+ &efi_guid_event_group_return_to_efibootmgr)) {
+ efi_signal_event(evt);
+ EFI_CALL(systab.boottime->close_event(evt));
+ break;
+ }
+ }
+
+ /* Control is returned to U-Boot, disable EFI watchdog */
+ efi_set_watchdog(0);
+
+ return ret;
+}
diff --git a/lib/efi_loader/efi_hii.c b/lib/efi_loader/efi_hii.c
index 3b54ecb1..74e402d 100644
--- a/lib/efi_loader/efi_hii.c
+++ b/lib/efi_loader/efi_hii.c
@@ -6,7 +6,6 @@
* Copyright (c) 2018 AKASHI Takahiro, Linaro Limited
*/
-#include <common.h>
#include <efi_loader.h>
#include <malloc.h>
#include <asm/unaligned.h>
diff --git a/lib/efi_loader/efi_hii_config.c b/lib/efi_loader/efi_hii_config.c
index 31b0c97..ae0f3ec 100644
--- a/lib/efi_loader/efi_hii_config.c
+++ b/lib/efi_loader/efi_hii_config.c
@@ -10,7 +10,6 @@
* the Makefile.
*/
-#include <common.h>
#include <efi_loader.h>
const efi_guid_t efi_guid_hii_config_routing_protocol
diff --git a/lib/efi_loader/efi_image_loader.c b/lib/efi_loader/efi_image_loader.c
index 9754757..6042436 100644
--- a/lib/efi_loader/efi_image_loader.c
+++ b/lib/efi_loader/efi_image_loader.c
@@ -9,7 +9,6 @@
#define LOG_CATEGORY LOGC_EFI
-#include <common.h>
#include <cpu_func.h>
#include <efi_loader.h>
#include <log.h>
diff --git a/lib/efi_loader/efi_load_initrd.c b/lib/efi_loader/efi_load_initrd.c
index 1934337..2b467b5 100644
--- a/lib/efi_loader/efi_load_initrd.c
+++ b/lib/efi_loader/efi_load_initrd.c
@@ -4,7 +4,6 @@
*/
#define LOG_CATEGORY LOGC_EFI
-#include <common.h>
#include <efi_loader.h>
#include <efi_load_initrd.h>
#include <efi_variable.h>
diff --git a/lib/efi_loader/efi_load_options.c b/lib/efi_loader/efi_load_options.c
index 5f62184..0198423 100644
--- a/lib/efi_loader/efi_load_options.c
+++ b/lib/efi_loader/efi_load_options.c
@@ -7,7 +7,6 @@
#define LOG_CATEGORY LOGC_EFI
-#include <common.h>
#include <charset.h>
#include <log.h>
#include <malloc.h>
diff --git a/lib/efi_loader/efi_memory.c b/lib/efi_loader/efi_memory.c
index f752703..edfad2d 100644
--- a/lib/efi_loader/efi_memory.c
+++ b/lib/efi_loader/efi_memory.c
@@ -7,7 +7,6 @@
#define LOG_CATEGORY LOGC_EFI
-#include <common.h>
#include <efi_loader.h>
#include <init.h>
#include <log.h>
diff --git a/lib/efi_loader/efi_net.c b/lib/efi_loader/efi_net.c
index 96a5bcc..7cd5367 100644
--- a/lib/efi_loader/efi_net.c
+++ b/lib/efi_loader/efi_net.c
@@ -15,7 +15,6 @@
* Reset(): EfiSimpleNetworkInitialized -> EfiSimpleNetworkInitialized
*/
-#include <common.h>
#include <efi_loader.h>
#include <malloc.h>
#include <net.h>
diff --git a/lib/efi_loader/efi_riscv.c b/lib/efi_loader/efi_riscv.c
index 0641727..4d398c5 100644
--- a/lib/efi_loader/efi_riscv.c
+++ b/lib/efi_loader/efi_riscv.c
@@ -7,7 +7,6 @@
*/
#define LOG_CATEGORY LOGC_EFI
-#include <common.h>
#include <efi_loader.h>
#include <efi_variable.h>
#include <log.h>
diff --git a/lib/efi_loader/efi_rng.c b/lib/efi_loader/efi_rng.c
index bb11d8d..9bad7ed 100644
--- a/lib/efi_loader/efi_rng.c
+++ b/lib/efi_loader/efi_rng.c
@@ -5,7 +5,6 @@
#define LOG_CATEGORY LOGC_EFI
-#include <common.h>
#include <dm.h>
#include <efi_loader.h>
#include <efi_rng.h>
diff --git a/lib/efi_loader/efi_root_node.c b/lib/efi_loader/efi_root_node.c
index 108c14b..4d7fb74 100644
--- a/lib/efi_loader/efi_root_node.c
+++ b/lib/efi_loader/efi_root_node.c
@@ -5,7 +5,6 @@
* Copyright (c) 2018 Heinrich Schuchardt
*/
-#include <common.h>
#include <malloc.h>
#include <efi_dt_fixup.h>
#include <efi_loader.h>
diff --git a/lib/efi_loader/efi_runtime.c b/lib/efi_loader/efi_runtime.c
index bf54d6a..18da689 100644
--- a/lib/efi_loader/efi_runtime.c
+++ b/lib/efi_loader/efi_runtime.c
@@ -5,7 +5,6 @@
* Copyright (c) 2016 Alexander Graf
*/
-#include <common.h>
#include <command.h>
#include <cpu_func.h>
#include <dm.h>
diff --git a/lib/efi_loader/efi_setup.c b/lib/efi_loader/efi_setup.c
index 37359a7..a610e03 100644
--- a/lib/efi_loader/efi_setup.c
+++ b/lib/efi_loader/efi_setup.c
@@ -7,7 +7,6 @@
#define LOG_CATEGORY LOGC_EFI
-#include <common.h>
#include <efi_loader.h>
#include <efi_variable.h>
#include <log.h>
diff --git a/lib/efi_loader/efi_signature.c b/lib/efi_loader/efi_signature.c
index 742d891..f338e73 100644
--- a/lib/efi_loader/efi_signature.c
+++ b/lib/efi_loader/efi_signature.c
@@ -4,7 +4,6 @@
* Copyright (c) 2019 Linaro Limited, Author: AKASHI Takahiro
*/
-#include <common.h>
#include <charset.h>
#include <efi_loader.h>
#include <efi_variable.h>
diff --git a/lib/efi_loader/efi_smbios.c b/lib/efi_loader/efi_smbios.c
index 48446f6..8d2ef6d 100644
--- a/lib/efi_loader/efi_smbios.c
+++ b/lib/efi_loader/efi_smbios.c
@@ -7,13 +7,17 @@
#define LOG_CATEGORY LOGC_EFI
-#include <common.h>
#include <efi_loader.h>
#include <log.h>
#include <malloc.h>
#include <mapmem.h>
#include <smbios.h>
#include <linux/sizes.h>
+#include <asm/global_data.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+const efi_guid_t smbios3_guid = SMBIOS3_TABLE_GUID;
enum {
TABLE_SIZE = SZ_4K,
@@ -28,8 +32,9 @@
{
ulong addr;
efi_status_t ret;
+ void *buf;
- addr = gd->arch.smbios_start;
+ addr = gd_smbios_start();
if (!addr) {
log_err("No SMBIOS tables to install\n");
return EFI_NOT_FOUND;
@@ -43,8 +48,11 @@
log_debug("EFI using SMBIOS tables at %lx\n", addr);
/* Install SMBIOS information as configuration table */
- return efi_install_configuration_table(&smbios_guid,
- map_sysmem(addr, 0));
+ buf = map_sysmem(addr, 0);
+ ret = efi_install_configuration_table(&smbios3_guid, buf);
+ unmap_sysmem(buf);
+
+ return ret;
}
static int install_smbios_table(void)
@@ -52,7 +60,9 @@
ulong addr;
void *buf;
- if (!IS_ENABLED(CONFIG_GENERATE_SMBIOS_TABLE) || IS_ENABLED(CONFIG_X86))
+ if (!IS_ENABLED(CONFIG_GENERATE_SMBIOS_TABLE) ||
+ IS_ENABLED(CONFIG_X86) ||
+ IS_ENABLED(CONFIG_QFW_SMBIOS))
return 0;
/* Align the table to a 4KB boundary to keep EFI happy */
diff --git a/lib/efi_loader/efi_string.c b/lib/efi_loader/efi_string.c
index e21e09c..413e329 100644
--- a/lib/efi_loader/efi_string.c
+++ b/lib/efi_loader/efi_string.c
@@ -5,7 +5,6 @@
* Copyright (c) 2020 AKASHI Takahiro, Linaro Limited
*/
-#include <common.h>
#include <charset.h>
#include <efi_loader.h>
#include <malloc.h>
diff --git a/lib/efi_loader/efi_tcg2.c b/lib/efi_loader/efi_tcg2.c
index 2eaa12b..85562c5 100644
--- a/lib/efi_loader/efi_tcg2.c
+++ b/lib/efi_loader/efi_tcg2.c
@@ -8,7 +8,6 @@
*/
#define LOG_CATEGORY LOGC_EFI
-#include <common.h>
#include <dm.h>
#include <efi_loader.h>
#include <efi_variable.h>
@@ -944,8 +943,11 @@
* Add SCRTM version to the log if previous firmmware
* doesn't pass an eventlog.
*/
- if (!elog.found)
+ if (!elog.found) {
ret = efi_append_scrtm_version(dev);
+ if (ret != EFI_SUCCESS)
+ goto free_pool;
+ }
ret = create_final_event();
if (ret != EFI_SUCCESS)
@@ -1073,12 +1075,17 @@
*/
static efi_status_t
tcg2_measure_smbios(struct udevice *dev,
- const struct smbios_entry *entry)
+ const struct smbios3_entry *entry)
{
efi_status_t ret;
struct smbios_header *smbios_copy;
struct smbios_handoff_table_pointers2 *event = NULL;
u32 event_size;
+ const char smbios3_anchor[] = "_SM3_";
+
+ /* We only support SMBIOS 3.0 Entry Point structure */
+ if (memcmp(entry->anchor, smbios3_anchor, sizeof(smbios3_anchor) - 1))
+ return EFI_UNSUPPORTED;
/*
* TCG PC Client PFP Spec says
@@ -1091,7 +1098,7 @@
*/
event_size = sizeof(struct smbios_handoff_table_pointers2) +
FIELD_SIZEOF(struct efi_configuration_table, guid) +
- entry->struct_table_length;
+ entry->max_struct_size;
event = calloc(1, event_size);
if (!event) {
ret = EFI_OUT_OF_RESOURCES;
@@ -1102,11 +1109,11 @@
memcpy(event->table_description, SMBIOS_HANDOFF_TABLE_DESC,
sizeof(SMBIOS_HANDOFF_TABLE_DESC));
put_unaligned_le64(1, &event->number_of_tables);
- guidcpy(&event->table_entry[0].guid, &smbios_guid);
+ guidcpy(&event->table_entry[0].guid, &smbios3_guid);
smbios_copy = (struct smbios_header *)((uintptr_t)&event->table_entry[0].table);
memcpy(&event->table_entry[0].table,
(void *)((uintptr_t)entry->struct_table_address),
- entry->struct_table_length);
+ entry->max_struct_size);
smbios_prepare_measurement(entry, smbios_copy);
@@ -1131,7 +1138,7 @@
u32 i;
for (i = 0; i < systab.nr_tables; i++) {
- if (!guidcmp(&smbios_guid, &systab.tables[i].guid))
+ if (!guidcmp(&smbios3_guid, &systab.tables[i].guid))
return systab.tables[i].table;
}
@@ -1358,7 +1365,7 @@
u32 pcr_index;
struct udevice *dev;
u32 event = 0;
- struct smbios_entry *entry;
+ struct smbios3_entry *entry;
if (!is_tcg2_protocol_installed())
return EFI_SUCCESS;
@@ -1380,7 +1387,7 @@
if (ret != EFI_SUCCESS)
goto out;
- entry = (struct smbios_entry *)find_smbios_table();
+ entry = (struct smbios3_entry *)find_smbios_table();
if (entry) {
ret = tcg2_measure_smbios(dev, entry);
if (ret != EFI_SUCCESS)
diff --git a/lib/efi_loader/efi_unicode_collation.c b/lib/efi_loader/efi_unicode_collation.c
index c4c7572..2b6912c 100644
--- a/lib/efi_loader/efi_unicode_collation.c
+++ b/lib/efi_loader/efi_unicode_collation.c
@@ -5,7 +5,6 @@
* Copyright (c) 2018 Heinrich Schuchardt <xypron.glpk@gmx.de>
*/
-#include <common.h>
#include <charset.h>
#include <cp1250.h>
#include <cp437.h>
diff --git a/lib/efi_loader/efi_var_common.c b/lib/efi_loader/efi_var_common.c
index ad50bff..d528747 100644
--- a/lib/efi_loader/efi_var_common.c
+++ b/lib/efi_loader/efi_var_common.c
@@ -6,7 +6,6 @@
* Copyright (c) 2020 Linaro Limited, Author: AKASHI Takahiro
*/
-#include <common.h>
#include <efi_loader.h>
#include <efi_variable.h>
#include <stdlib.h>
diff --git a/lib/efi_loader/efi_var_file.c b/lib/efi_loader/efi_var_file.c
index 62e071b..532b6b4 100644
--- a/lib/efi_loader/efi_var_file.c
+++ b/lib/efi_loader/efi_var_file.c
@@ -7,7 +7,6 @@
#define LOG_CATEGORY LOGC_EFI
-#include <common.h>
#include <charset.h>
#include <fs.h>
#include <log.h>
@@ -204,8 +203,11 @@
* File ubootefi.var is read from the EFI system partitions and the variables
* stored in the file are created.
*
- * In case the file does not exist yet or a variable cannot be set EFI_SUCCESS
- * is returned.
+ * On first boot the file ubootefi.var does not exist yet. This is why we must
+ * return EFI_SUCCESS in this case.
+ *
+ * If the variable file is corrupted, e.g. incorrect CRC32, we do not want to
+ * stop the boot process. We deliberately return EFI_SUCCESS in this case, too.
*
* Return: status code
*/
diff --git a/lib/efi_loader/efi_var_mem.c b/lib/efi_loader/efi_var_mem.c
index 5fa7dcb..6c21cec 100644
--- a/lib/efi_loader/efi_var_mem.c
+++ b/lib/efi_loader/efi_var_mem.c
@@ -5,7 +5,6 @@
* Copyright (c) 2020, Heinrich Schuchardt
*/
-#include <common.h>
#include <efi_loader.h>
#include <efi_variable.h>
#include <u-boot/crc.h>
diff --git a/lib/efi_loader/efi_variable.c b/lib/efi_loader/efi_variable.c
index be95ed4..40f7a0f 100644
--- a/lib/efi_loader/efi_variable.c
+++ b/lib/efi_loader/efi_variable.c
@@ -7,7 +7,6 @@
#define LOG_CATEGORY LOGC_EFI
-#include <common.h>
#include <efi_loader.h>
#include <efi_variable.h>
#include <env.h>
diff --git a/lib/efi_loader/efi_variable_tee.c b/lib/efi_loader/efi_variable_tee.c
index 09d03c0..dde135f 100644
--- a/lib/efi_loader/efi_variable_tee.c
+++ b/lib/efi_loader/efi_variable_tee.c
@@ -10,7 +10,6 @@
* Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
*/
-#include <common.h>
#if CONFIG_IS_ENABLED(ARM_FFA_TRANSPORT)
#include <arm_ffa.h>
#endif
diff --git a/lib/efi_loader/efi_watchdog.c b/lib/efi_loader/efi_watchdog.c
index d741076..f5fb911 100644
--- a/lib/efi_loader/efi_watchdog.c
+++ b/lib/efi_loader/efi_watchdog.c
@@ -5,7 +5,6 @@
* Copyright (c) 2017 Heinrich Schuchardt
*/
-#include <common.h>
#include <efi_loader.h>
/* Conversion factor from seconds to multiples of 100ns */
diff --git a/lib/efi_loader/initrddump.c b/lib/efi_loader/initrddump.c
index 5b470f4..0004b6b 100644
--- a/lib/efi_loader/initrddump.c
+++ b/lib/efi_loader/initrddump.c
@@ -9,7 +9,6 @@
* clearing of the screen.
*/
-#include <common.h>
#include <efi_api.h>
#include <efi_load_initrd.h>
diff --git a/lib/efi_loader/smbiosdump.c b/lib/efi_loader/smbiosdump.c
new file mode 100644
index 0000000..f0b9018
--- /dev/null
+++ b/lib/efi_loader/smbiosdump.c
@@ -0,0 +1,622 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Copyright 2023, Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
+ *
+ * smbiosdump.efi saves the SMBIOS table as file.
+ *
+ * Specifying 'nocolor' as load option data suppresses colored output and
+ * clearing of the screen.
+ */
+
+#include <efi_api.h>
+#include <part.h>
+#include <smbios.h>
+#include <string.h>
+
+#define BUFFER_SIZE 64
+
+static struct efi_simple_text_output_protocol *cerr;
+static struct efi_simple_text_output_protocol *cout;
+static struct efi_simple_text_input_protocol *cin;
+static struct efi_boot_services *bs;
+static efi_handle_t handle;
+static struct efi_system_table *systable;
+static const efi_guid_t smbios_guid = SMBIOS_TABLE_GUID;
+static const efi_guid_t smbios3_guid = SMBIOS3_TABLE_GUID;
+static const efi_guid_t loaded_image_guid = EFI_LOADED_IMAGE_PROTOCOL_GUID;
+static const efi_guid_t guid_simple_file_system_protocol =
+ EFI_SIMPLE_FILE_SYSTEM_PROTOCOL_GUID;
+static const efi_guid_t efi_system_partition_guid = PARTITION_SYSTEM_GUID;
+static bool nocolor;
+
+/**
+ * color() - set foreground color
+ *
+ * @color: foreground color
+ */
+static void color(u8 color)
+{
+ if (!nocolor)
+ cout->set_attribute(cout, color | EFI_BACKGROUND_BLACK);
+}
+
+/**
+ * print() - print string
+ *
+ * @string: text
+ */
+static void print(u16 *string)
+{
+ cout->output_string(cout, string);
+}
+
+/**
+ * cls() - clear screen
+ */
+static void cls(void)
+{
+ if (nocolor)
+ print(u"\r\n");
+ else
+ cout->clear_screen(cout);
+}
+
+/**
+ * error() - print error string
+ *
+ * @string: error text
+ */
+static void error(u16 *string)
+{
+ color(EFI_LIGHTRED);
+ print(string);
+ color(EFI_LIGHTBLUE);
+}
+
+/**
+ * efi_input_yn() - get answer to yes/no question
+ *
+ * Return:
+ * y or Y
+ * EFI_SUCCESS
+ * n or N
+ * EFI_ACCESS_DENIED
+ * ESC
+ * EFI_ABORTED
+ */
+static efi_status_t efi_input_yn(void)
+{
+ struct efi_input_key key = {0};
+ efi_uintn_t index;
+ efi_status_t ret;
+
+ /* Drain the console input */
+ ret = cin->reset(cin, true);
+ for (;;) {
+ ret = bs->wait_for_event(1, &cin->wait_for_key, &index);
+ if (ret != EFI_SUCCESS)
+ continue;
+ ret = cin->read_key_stroke(cin, &key);
+ if (ret != EFI_SUCCESS)
+ continue;
+ switch (key.scan_code) {
+ case 0x17: /* Escape */
+ return EFI_ABORTED;
+ default:
+ break;
+ }
+ /* Convert to lower case */
+ switch (key.unicode_char | 0x20) {
+ case 'y':
+ return EFI_SUCCESS;
+ case 'n':
+ return EFI_ACCESS_DENIED;
+ default:
+ break;
+ }
+ }
+}
+
+/**
+ * efi_input() - read string from console
+ *
+ * @buffer: input buffer
+ * @buffer_size: buffer size
+ * Return: status code
+ */
+static efi_status_t efi_input(u16 *buffer, efi_uintn_t buffer_size)
+{
+ struct efi_input_key key = {0};
+ efi_uintn_t index;
+ efi_uintn_t pos = 0;
+ u16 outbuf[2] = u" ";
+ efi_status_t ret;
+
+ /* Drain the console input */
+ ret = cin->reset(cin, true);
+ *buffer = 0;
+ for (;;) {
+ ret = bs->wait_for_event(1, &cin->wait_for_key, &index);
+ if (ret != EFI_SUCCESS)
+ continue;
+ ret = cin->read_key_stroke(cin, &key);
+ if (ret != EFI_SUCCESS)
+ continue;
+ switch (key.scan_code) {
+ case 0x17: /* Escape */
+ print(u"\r\nAborted\r\n");
+ return EFI_ABORTED;
+ default:
+ break;
+ }
+ switch (key.unicode_char) {
+ case 0x08: /* Backspace */
+ if (pos) {
+ buffer[pos--] = 0;
+ print(u"\b \b");
+ }
+ break;
+ case 0x0a: /* Linefeed */
+ case 0x0d: /* Carriage return */
+ print(u"\r\n");
+ return EFI_SUCCESS;
+ default:
+ break;
+ }
+ /* Ignore surrogate codes */
+ if (key.unicode_char >= 0xD800 && key.unicode_char <= 0xDBFF)
+ continue;
+ if (key.unicode_char >= 0x20 &&
+ pos < buffer_size - 1) {
+ *outbuf = key.unicode_char;
+ buffer[pos++] = key.unicode_char;
+ buffer[pos] = 0;
+ print(outbuf);
+ }
+ }
+}
+
+/**
+ * skip_whitespace() - skip over leading whitespace
+ *
+ * @pos: UTF-16 string
+ * Return: pointer to first non-whitespace
+ */
+static u16 *skip_whitespace(u16 *pos)
+{
+ for (; *pos && *pos <= 0x20; ++pos)
+ ;
+ return pos;
+}
+
+/**
+ * starts_with() - check if @string starts with @keyword
+ *
+ * @string: string to search for keyword
+ * @keyword: keyword to be searched
+ * Return: true fi @string starts with the keyword
+ */
+static bool starts_with(u16 *string, u16 *keyword)
+{
+ if (!string || !keyword)
+ return NULL;
+
+ for (; *keyword; ++string, ++keyword) {
+ if (*string != *keyword)
+ return false;
+ }
+ return true;
+}
+
+/**
+ * open_file_system() - open simple file system protocol
+ *
+ * file_system: interface of the simple file system protocol
+ * Return: status code
+ */
+static efi_status_t
+open_file_system(struct efi_simple_file_system_protocol **file_system)
+{
+ struct efi_loaded_image *loaded_image;
+ efi_status_t ret;
+ efi_handle_t *handle_buffer = NULL;
+ efi_uintn_t count;
+
+ ret = bs->open_protocol(handle, &loaded_image_guid,
+ (void **)&loaded_image, NULL, NULL,
+ EFI_OPEN_PROTOCOL_GET_PROTOCOL);
+ if (ret != EFI_SUCCESS) {
+ error(u"Loaded image protocol not found\r\n");
+ return ret;
+ }
+
+ /* Open the simple file system protocol on the same partition */
+ ret = bs->open_protocol(loaded_image->device_handle,
+ &guid_simple_file_system_protocol,
+ (void **)file_system, NULL, NULL,
+ EFI_OPEN_PROTOCOL_GET_PROTOCOL);
+ if (ret == EFI_SUCCESS)
+ return ret;
+
+ /* Open the simple file system protocol on the UEFI system partition */
+ ret = bs->locate_handle_buffer(BY_PROTOCOL, &efi_system_partition_guid,
+ NULL, &count, &handle_buffer);
+ if (ret == EFI_SUCCESS && handle_buffer)
+ ret = bs->open_protocol(handle_buffer[0],
+ &guid_simple_file_system_protocol,
+ (void **)file_system, NULL, NULL,
+ EFI_OPEN_PROTOCOL_GET_PROTOCOL);
+ if (ret != EFI_SUCCESS)
+ error(u"Failed to open simple file system protocol\r\n");
+ if (handle)
+ bs->free_pool(handle_buffer);
+
+ return ret;
+}
+
+/**
+ * do_help() - print help
+ */
+static void do_help(void)
+{
+ error(u"check - check SMBIOS table\r\n");
+ error(u"save <file> - save SMBIOS table to file\r\n");
+ error(u"exit - exit the shell\r\n");
+}
+
+/**
+ * get_config_table() - get configuration table
+ *
+ * @guid: GUID of the configuration table
+ * Return: pointer to configuration table or NULL
+ */
+static void *get_config_table(const efi_guid_t *guid)
+{
+ size_t i;
+
+ for (i = 0; i < systable->nr_tables; ++i) {
+ if (!memcmp(guid, &systable->tables[i].guid, 16))
+ return systable->tables[i].table;
+ }
+
+ return NULL;
+}
+
+/**
+ * checksum() - calculate checksum
+ *
+ * @buf: buffer to checksum
+ * @len: length of buffer
+ * Return: checksum
+ */
+u8 checksum(void *buf, int len)
+{
+ u8 ret = 0;
+
+ for (u8 *ptr = buf; len; --len, ++ptr)
+ ret -= *ptr;
+
+ return ret;
+}
+
+/**
+ * do_check() - check SMBIOS table
+ *
+ * Return: status code
+ */
+efi_status_t do_check(void)
+{
+ struct smbios3_entry *smbios3_anchor;
+ void *table, *table_end;
+ u32 len;
+
+ smbios3_anchor = get_config_table(&smbios3_guid);
+ if (smbios3_anchor) {
+ int r;
+
+ r = memcmp(smbios3_anchor->anchor, "_SM3_", 5);
+ if (r) {
+ error(u"Invalid anchor string\n");
+ return EFI_LOAD_ERROR;
+ }
+ print(u"Found SMBIOS 3 entry point\n");
+ if (smbios3_anchor->length != 0x18) {
+ error(u"Invalid anchor length\n");
+ return EFI_LOAD_ERROR;
+ }
+ if (checksum(smbios3_anchor, smbios3_anchor->length)) {
+ error(u"Invalid anchor checksum\n");
+ return EFI_LOAD_ERROR;
+ }
+ table = (void *)(uintptr_t)smbios3_anchor->struct_table_address;
+ len = smbios3_anchor->max_struct_size;
+ } else {
+ struct smbios_entry *smbios_anchor;
+ int r;
+
+ smbios_anchor = get_config_table(&smbios_guid);
+ if (!smbios_anchor) {
+ error(u"No SMBIOS table\n");
+ return EFI_NOT_FOUND;
+ }
+ r = memcmp(smbios_anchor->anchor, "_SM_", 4);
+ if (r) {
+ error(u"Invalid anchor string\n");
+ return EFI_LOAD_ERROR;
+ }
+ print(u"Found SMBIOS 2.1 entry point\n");
+ if (smbios_anchor->length != 0x1f) {
+ error(u"Invalid anchor length\n");
+ return EFI_LOAD_ERROR;
+ }
+ if (checksum(smbios_anchor, smbios_anchor->length)) {
+ error(u"Invalid anchor checksum\n");
+ return EFI_LOAD_ERROR;
+ }
+ r = memcmp(smbios_anchor->intermediate_anchor, "_DMI_", 5);
+ if (r) {
+ error(u"Invalid intermediate anchor string\n");
+ return EFI_LOAD_ERROR;
+ }
+ if (checksum(&smbios_anchor->intermediate_anchor, 0xf)) {
+ error(u"Invalid intermediate anchor checksum\n");
+ return EFI_LOAD_ERROR;
+ }
+ table = (void *)(uintptr_t)smbios_anchor->struct_table_address;
+ len = smbios_anchor->struct_table_length;
+ }
+
+ table_end = (void *)((u8 *)table + len);
+ for (struct smbios_header *pos = table; ;) {
+ u8 *str = (u8 *)pos + pos->length;
+
+ if (!*str)
+ ++str;
+ while (*str) {
+ for (; *str; ++str) {
+ if ((void *)str >= table_end) {
+ error(u"Structure table length exceeded\n");
+ return EFI_LOAD_ERROR;
+ }
+ }
+ ++str;
+ }
+ ++str;
+ if ((void *)str > table_end) {
+ error(u"Structure table length exceeded\n");
+ return EFI_LOAD_ERROR;
+ }
+ if (pos->type == 0x7f) /* End of table */
+ break;
+ pos = (struct smbios_header *)str;
+ }
+
+ return EFI_SUCCESS;
+}
+
+/**
+ * save_file() - save file to EFI system partition
+ *
+ * @filename: file name
+ * @buf: buffer to write
+ * @size: size of the buffer
+ */
+efi_status_t save_file(u16 *filename, void *buf, efi_uintn_t size)
+{
+ efi_uintn_t ret;
+ struct efi_simple_file_system_protocol *file_system;
+ struct efi_file_handle *root, *file;
+
+ ret = open_file_system(&file_system);
+ if (ret != EFI_SUCCESS)
+ return ret;
+
+ /* Open volume */
+ ret = file_system->open_volume(file_system, &root);
+ if (ret != EFI_SUCCESS) {
+ error(u"Failed to open volume\r\n");
+ return ret;
+ }
+ /* Check if file already exists */
+ ret = root->open(root, &file, filename, EFI_FILE_MODE_READ, 0);
+ if (ret == EFI_SUCCESS) {
+ file->close(file);
+ print(u"Overwrite existing file (y/n)? ");
+ ret = efi_input_yn();
+ print(u"\r\n");
+ if (ret != EFI_SUCCESS) {
+ root->close(root);
+ error(u"Aborted by user\r\n");
+ bs->free_pool(buf);
+ return ret;
+ }
+ }
+
+ /* Create file */
+ ret = root->open(root, &file, filename,
+ EFI_FILE_MODE_READ | EFI_FILE_MODE_WRITE |
+ EFI_FILE_MODE_CREATE, EFI_FILE_ARCHIVE);
+ if (ret == EFI_SUCCESS) {
+ /* Write file */
+ ret = file->write(file, &size, buf);
+ if (ret != EFI_SUCCESS)
+ error(u"Failed to write file\r\n");
+ file->close(file);
+ } else {
+ error(u"Failed to open file\r\n");
+ }
+ root->close(root);
+
+ return ret;
+}
+
+/**
+ * do_save() - save SMBIOS table
+ *
+ * @filename: file name
+ * Return: status code
+ */
+static efi_status_t do_save(u16 *filename)
+{
+ struct smbios3_entry *smbios3_anchor;
+ u8 *buf;
+ efi_uintn_t size;
+ efi_uintn_t ret;
+
+ ret = do_check();
+ if (ret != EFI_SUCCESS)
+ return ret;
+
+ smbios3_anchor = get_config_table(&smbios3_guid);
+ if (smbios3_anchor) {
+ size = 0x20 + smbios3_anchor->max_struct_size;
+ ret = bs->allocate_pool(EFI_LOADER_DATA, size, (void **)&buf);
+ if (ret != EFI_SUCCESS) {
+ error(u"Out of memory\n");
+ return ret;
+ }
+
+ memset(buf, 0, size);
+ memcpy(buf, smbios3_anchor, smbios3_anchor->length);
+ memcpy(buf + 0x20,
+ (void *)(uintptr_t)smbios3_anchor->struct_table_address,
+ smbios3_anchor->max_struct_size);
+
+ smbios3_anchor = (struct smbios3_entry *)buf;
+ smbios3_anchor->struct_table_address = 0x20;
+ smbios3_anchor->checksum +=
+ checksum(smbios3_anchor, smbios3_anchor->length);
+ } else {
+ struct smbios_entry *smbios_anchor;
+
+ smbios_anchor = get_config_table(&smbios_guid);
+ if (!smbios_anchor) {
+ /* Should not be reached after successful do_check() */
+ error(u"No SMBIOS table\n");
+ return EFI_NOT_FOUND;
+ }
+
+ size = 0x20 + smbios_anchor->struct_table_length;
+
+ ret = bs->allocate_pool(EFI_LOADER_DATA, size, (void **)&buf);
+ if (ret != EFI_SUCCESS) {
+ error(u"Out of memory\n");
+ return ret;
+ }
+
+ memset(buf, 0, size);
+ memcpy(buf, smbios_anchor, smbios_anchor->length);
+ memcpy(buf + 0x20,
+ (void *)(uintptr_t)smbios_anchor->struct_table_address,
+ smbios_anchor->struct_table_length);
+
+ smbios_anchor = (struct smbios_entry *)buf;
+ smbios_anchor->struct_table_address = 0x20;
+ smbios_anchor->intermediate_checksum +=
+ checksum(&smbios_anchor->intermediate_anchor, 0xf);
+ smbios_anchor->checksum +=
+ checksum(smbios_anchor, smbios_anchor->length);
+ }
+
+ filename = skip_whitespace(filename);
+
+ ret = save_file(filename, buf, size);
+
+ if (ret == EFI_SUCCESS) {
+ print(filename);
+ print(u" written\r\n");
+ }
+
+ bs->free_pool(buf);
+
+ return ret;
+}
+
+/**
+ * get_load_options() - get load options
+ *
+ * Return: load options or NULL
+ */
+static u16 *get_load_options(void)
+{
+ efi_status_t ret;
+ struct efi_loaded_image *loaded_image;
+
+ ret = bs->open_protocol(handle, &loaded_image_guid,
+ (void **)&loaded_image, NULL, NULL,
+ EFI_OPEN_PROTOCOL_GET_PROTOCOL);
+ if (ret != EFI_SUCCESS) {
+ error(u"Loaded image protocol not found\r\n");
+ return NULL;
+ }
+
+ if (!loaded_image->load_options_size || !loaded_image->load_options)
+ return NULL;
+
+ return loaded_image->load_options;
+}
+
+/**
+ * command_loop - process user commands
+ */
+static void command_loop(void)
+{
+ for (;;) {
+ u16 command[BUFFER_SIZE];
+ u16 *pos;
+ efi_uintn_t ret;
+
+ print(u"=> ");
+ ret = efi_input(command, sizeof(command));
+ if (ret == EFI_ABORTED)
+ break;
+ pos = skip_whitespace(command);
+ if (starts_with(pos, u"exit")) {
+ break;
+ } else if (starts_with(pos, u"check")) {
+ ret = do_check();
+ if (ret == EFI_SUCCESS)
+ print(u"OK\n");
+ } else if (starts_with(pos, u"save ")) {
+ do_save(pos + 5);
+ } else {
+ do_help();
+ }
+ }
+}
+
+/**
+ * efi_main() - entry point of the EFI application.
+ *
+ * @handle: handle of the loaded image
+ * @systab: system table
+ * Return: status code
+ */
+efi_status_t EFIAPI efi_main(efi_handle_t image_handle,
+ struct efi_system_table *systab)
+{
+ u16 *load_options;
+
+ handle = image_handle;
+ systable = systab;
+ cerr = systable->std_err;
+ cout = systable->con_out;
+ cin = systable->con_in;
+ bs = systable->boottime;
+ load_options = get_load_options();
+
+ if (starts_with(load_options, u"nocolor"))
+ nocolor = true;
+
+ color(EFI_WHITE);
+ cls();
+ print(u"SMBIOS Dump\r\n===========\r\n\r\n");
+ color(EFI_LIGHTBLUE);
+
+ command_loop();
+
+ color(EFI_LIGHTGRAY);
+ cls();
+
+ return EFI_SUCCESS;
+}
diff --git a/lib/efi_selftest/efi_selftest_esrt.c b/lib/efi_selftest/efi_selftest_esrt.c
index 922ff25..b7688de 100644
--- a/lib/efi_selftest/efi_selftest_esrt.c
+++ b/lib/efi_selftest/efi_selftest_esrt.c
@@ -4,7 +4,6 @@
*
* Copyright (C) 2021 Arm Ltd.
*/
-#include <common.h>
#include <efi_loader.h>
#include <efi_selftest.h>
diff --git a/lib/efi_selftest/efi_selftest_miniapp_exception.c b/lib/efi_selftest/efi_selftest_miniapp_exception.c
index a9ad381..f668cda 100644
--- a/lib/efi_selftest/efi_selftest_miniapp_exception.c
+++ b/lib/efi_selftest/efi_selftest_miniapp_exception.c
@@ -7,7 +7,6 @@
* This EFI application triggers an exception.
*/
-#include <common.h>
#include <efi_api.h>
#include <host_arch.h>
diff --git a/lib/efi_selftest/efi_selftest_miniapp_exit.c b/lib/efi_selftest/efi_selftest_miniapp_exit.c
index 1c42d6d..8b2e60c 100644
--- a/lib/efi_selftest/efi_selftest_miniapp_exit.c
+++ b/lib/efi_selftest/efi_selftest_miniapp_exit.c
@@ -8,7 +8,6 @@
* It uses the Exit boot service to return.
*/
-#include <common.h>
#include <efi_selftest.h>
static efi_guid_t loaded_image_protocol_guid = EFI_LOADED_IMAGE_PROTOCOL_GUID;
diff --git a/lib/efi_selftest/efi_selftest_miniapp_return.c b/lib/efi_selftest/efi_selftest_miniapp_return.c
index 45366aa..8792d78 100644
--- a/lib/efi_selftest/efi_selftest_miniapp_return.c
+++ b/lib/efi_selftest/efi_selftest_miniapp_return.c
@@ -8,7 +8,6 @@
* It returns directly without calling the Exit boot service.
*/
-#include <common.h>
#include <efi_api.h>
/*
diff --git a/lib/efi_selftest/efi_selftest_tcg2.c b/lib/efi_selftest/efi_selftest_tcg2.c
index 67a886e..fb8b997 100644
--- a/lib/efi_selftest/efi_selftest_tcg2.c
+++ b/lib/efi_selftest/efi_selftest_tcg2.c
@@ -126,41 +126,40 @@
static void *orig_smbios_table;
static u64 dmi_addr = U32_MAX;
-#define SMBIOS_ENTRY_HEADER_SIZE 0x20
+#define SMBIOS3_ENTRY_HEADER_SIZE 0x18
/* smbios table for the measurement test */
-static u8 smbios_table_test[] = {
-0x5f, 0x53, 0x4d, 0x5f, 0x2c, 0x1f, 0x03, 0x00, 0x54, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x5f, 0x44, 0x4d, 0x49, 0x5f, 0xe4, 0x5c, 0x01,
-0x20, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0x00,
-0x01, 0x02, 0x00, 0x00, 0x03, 0x00, 0x80, 0x08, 0x01, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x0c, 0x15, 0x0a, 0xff, 0xff, 0x55, 0x2d, 0x42, 0x6f,
-0x6f, 0x74, 0x00, 0x32, 0x30, 0x32, 0x31, 0x2e, 0x31, 0x30, 0x2d, 0x72,
-0x63, 0x34, 0x2d, 0x30, 0x30, 0x30, 0x30, 0x35, 0x2d, 0x67, 0x37, 0x32,
-0x37, 0x63, 0x33, 0x66, 0x33, 0x32, 0x35, 0x39, 0x2d, 0x64, 0x69, 0x72,
-0x74, 0x79, 0x00, 0x31, 0x30, 0x2f, 0x30, 0x31, 0x2f, 0x32, 0x30, 0x32,
-0x31, 0x00, 0x00, 0x01, 0x1b, 0x01, 0x00, 0x01, 0x02, 0x00, 0x03, 0x31,
-0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x55, 0x6e, 0x6b, 0x6e, 0x6f, 0x77,
-0x6e, 0x00, 0x55, 0x6e, 0x6b, 0x6e, 0x6f, 0x77, 0x6e, 0x20, 0x50, 0x72,
-0x6f, 0x64, 0x75, 0x63, 0x74, 0x00, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36,
-0x37, 0x38, 0x00, 0x00, 0x02, 0x0e, 0x02, 0x00, 0x01, 0x02, 0x00, 0x04,
-0x03, 0x01, 0x01, 0x01, 0x00, 0x0a, 0x55, 0x6e, 0x6b, 0x6e, 0x6f, 0x77,
-0x6e, 0x00, 0x55, 0x6e, 0x6b, 0x6e, 0x6f, 0x77, 0x6e, 0x20, 0x50, 0x72,
-0x6f, 0x64, 0x75, 0x63, 0x74, 0x00, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33,
-0x33, 0x33, 0x00, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x00,
-0x00, 0x03, 0x15, 0x03, 0x00, 0x01, 0x03, 0x00, 0x02, 0x03, 0x03, 0x03,
-0x03, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x6e,
-0x6b, 0x6e, 0x6f, 0x77, 0x6e, 0x00, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36,
-0x37, 0x38, 0x00, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x00,
-0x00, 0x04, 0x30, 0x04, 0x00, 0x00, 0x03, 0x02, 0x01, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x0c, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x01, 0x06, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x02, 0x03, 0x04,
-0x04, 0x04, 0x08, 0x00, 0x00, 0x02, 0x00, 0x08, 0x00, 0x08, 0x00, 0x01,
-0x00, 0x55, 0x6e, 0x6b, 0x6e, 0x6f, 0x77, 0x6e, 0x00, 0x31, 0x32, 0x33,
-0x34, 0x35, 0x36, 0x37, 0x38, 0x00, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33,
-0x33, 0x33, 0x00, 0x35, 0x35, 0x35, 0x35, 0x35, 0x35, 0x35, 0x35, 0x00,
-0x00, 0x20, 0x0b, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x7f, 0x04, 0x06, 0x00, 0x00, 0x00
+static u8 smbios3_table_test[] = {
+0x5f, 0x53, 0x4d, 0x33, 0x5f, 0x00, 0x18, 0x03, 0x07, 0x00, 0x01, 0x00,
+0x5c, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x18, 0x00, 0x00, 0x01, 0x02, 0x00, 0x00, 0x03, 0x00, 0x80, 0x08,
+0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0c, 0x15, 0x0a, 0xff, 0xff,
+0x55, 0x2d, 0x42, 0x6f, 0x6f, 0x74, 0x00, 0x32, 0x30, 0x32, 0x31, 0x2e,
+0x31, 0x30, 0x2d, 0x72, 0x63, 0x34, 0x2d, 0x30, 0x30, 0x30, 0x30, 0x35,
+0x2d, 0x67, 0x37, 0x32, 0x37, 0x63, 0x33, 0x66, 0x33, 0x32, 0x35, 0x39,
+0x2d, 0x64, 0x69, 0x72, 0x74, 0x79, 0x00, 0x31, 0x30, 0x2f, 0x30, 0x31,
+0x2f, 0x32, 0x30, 0x32, 0x31, 0x00, 0x00, 0x01, 0x1b, 0x01, 0x00, 0x01,
+0x02, 0x00, 0x03, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x55, 0x6e,
+0x6b, 0x6e, 0x6f, 0x77, 0x6e, 0x00, 0x55, 0x6e, 0x6b, 0x6e, 0x6f, 0x77,
+0x6e, 0x20, 0x50, 0x72, 0x6f, 0x64, 0x75, 0x63, 0x74, 0x00, 0x31, 0x32,
+0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x00, 0x00, 0x02, 0x0e, 0x02, 0x00,
+0x01, 0x02, 0x00, 0x04, 0x03, 0x01, 0x01, 0x01, 0x00, 0x0a, 0x55, 0x6e,
+0x6b, 0x6e, 0x6f, 0x77, 0x6e, 0x00, 0x55, 0x6e, 0x6b, 0x6e, 0x6f, 0x77,
+0x6e, 0x20, 0x50, 0x72, 0x6f, 0x64, 0x75, 0x63, 0x74, 0x00, 0x33, 0x33,
+0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x00, 0x31, 0x32, 0x33, 0x34, 0x35,
+0x36, 0x37, 0x38, 0x00, 0x00, 0x03, 0x15, 0x03, 0x00, 0x01, 0x03, 0x00,
+0x02, 0x03, 0x03, 0x03, 0x03, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x55, 0x6e, 0x6b, 0x6e, 0x6f, 0x77, 0x6e, 0x00, 0x31, 0x32,
+0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x00, 0x33, 0x33, 0x33, 0x33, 0x33,
+0x33, 0x33, 0x33, 0x00, 0x00, 0x04, 0x30, 0x04, 0x00, 0x00, 0x03, 0x02,
+0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x0c, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x06, 0xff, 0xff, 0xff, 0xff, 0xff,
+0xff, 0x02, 0x03, 0x04, 0x04, 0x04, 0x08, 0x00, 0x00, 0x02, 0x00, 0x08,
+0x00, 0x08, 0x00, 0x01, 0x00, 0x55, 0x6e, 0x6b, 0x6e, 0x6f, 0x77, 0x6e,
+0x00, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x00, 0x33, 0x33,
+0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x00, 0x35, 0x35, 0x35, 0x35, 0x35,
+0x35, 0x35, 0x35, 0x00, 0x00, 0x20, 0x0b, 0x05, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7f, 0x04, 0x06, 0x00, 0x00, 0x00
};
#define IDX_ARRAY_SZ 3 /* support 24 PCRs */
@@ -179,10 +178,10 @@
0x7b, 0xb9, 0xfe, 0xa1, 0xcd, 0x64, 0x49, 0xdd,
0xed, 0xe2, 0x65, 0x82, 0xc5, 0x3e, 0xf4, 0xc4},
- {0xf5, 0x79, 0xf3, 0x20, 0x62, 0x6e, 0x8b, 0x58,
- 0x62, 0xa3, 0x4e, 0x2f, 0xb7, 0x10, 0xac, 0x34,
- 0x4e, 0x68, 0x94, 0x37, 0x87, 0x29, 0xc4, 0xbe,
- 0xa3, 0xc4, 0xd9, 0x14, 0x2b, 0x66, 0x79, 0x9b},
+ {0x75, 0xb5, 0x91, 0x54, 0x12, 0xa8, 0xa4, 0x25,
+ 0x73, 0x79, 0xa7, 0x47, 0xd9, 0x32, 0x54, 0x78,
+ 0x9a, 0x80, 0x3f, 0xa8, 0x34, 0xfe, 0xd2, 0xae,
+ 0x76, 0xd3, 0x16, 0x4a, 0xb2, 0x03, 0xac, 0xe6},
{0x3d, 0x45, 0x8c, 0xfe, 0x55, 0xcc, 0x03, 0xea,
0x1f, 0x44, 0x3f, 0x15, 0x62, 0xbe, 0xec, 0x8d,
@@ -543,7 +542,7 @@
u32 i;
for (i = 0; i < systable->nr_tables; i++) {
- if (!guidcmp(&smbios_guid, &systable->tables[i].guid))
+ if (!guidcmp(&smbios3_guid, &systable->tables[i].guid))
return systable->tables[i].table;
}
@@ -558,14 +557,12 @@
*/
static efi_status_t setup_smbios_table(const struct efi_system_table *systable)
{
- struct smbios_entry *se;
+ struct smbios3_entry *se;
efi_status_t ret;
/* Map within the low 32 bits, to allow for 32bit SMBIOS tables */
void *dmi;
- char *istart;
- int isize;
- if (sizeof(smbios_table_test) > EFI_PAGE_SIZE)
+ if (sizeof(smbios3_table_test) > EFI_PAGE_SIZE)
return EFI_OUT_OF_RESOURCES;
orig_smbios_table = find_smbios_table(systable);
@@ -586,19 +583,15 @@
dmi = (void *)(uintptr_t)dmi_addr;
se = dmi;
- boottime->copy_mem(se, smbios_table_test, sizeof(smbios_table_test));
+ boottime->copy_mem(se, smbios3_table_test, sizeof(smbios3_table_test));
/* update smbios table start address */
- se->struct_table_address = (uintptr_t)((u8 *)dmi + SMBIOS_ENTRY_HEADER_SIZE);
+ se->struct_table_address = (uintptr_t)((u8 *)dmi + SMBIOS3_ENTRY_HEADER_SIZE);
- /* calculate checksums */
- istart = (char *)se + SMBIOS_INTERMEDIATE_OFFSET;
- isize = sizeof(struct smbios_entry) - SMBIOS_INTERMEDIATE_OFFSET;
- se->intermediate_checksum = table_compute_checksum(istart, isize);
- se->checksum = table_compute_checksum(se, sizeof(struct smbios_entry));
+ se->checksum = table_compute_checksum(se, sizeof(struct smbios3_entry));
/* Install SMBIOS information as configuration table */
- ret = boottime->install_configuration_table(&smbios_guid, dmi);
+ ret = boottime->install_configuration_table(&smbios3_guid, dmi);
if (ret != EFI_SUCCESS) {
efi_st_error("Cannot install SMBIOS table\n");
boottime->free_pages(dmi_addr, 1);
@@ -992,7 +985,7 @@
* If orig_smbios_table is NULL, calling install_configuration_table()
* removes dummy SMBIOS table form systab.
*/
- r = boottime->install_configuration_table(&smbios_guid, orig_smbios_table);
+ r = boottime->install_configuration_table(&smbios3_guid, orig_smbios_table);
if (r != EFI_SUCCESS) {
efi_st_error("Failed to restore SMBOIS table\n");
return EFI_ST_FAILURE;
diff --git a/lib/elf.c b/lib/elf.c
index 0476b26..9a794f9 100644
--- a/lib/elf.c
+++ b/lib/elf.c
@@ -3,7 +3,6 @@
Copyright (c) 2001 William L. Pitts
*/
-#include <common.h>
#include <command.h>
#include <cpu_func.h>
#include <elf.h>
diff --git a/lib/errno_str.c b/lib/errno_str.c
index 2e5f4a8..752d4eb 100644
--- a/lib/errno_str.c
+++ b/lib/errno_str.c
@@ -4,8 +4,8 @@
*
* SDPX-License-Identifier: GPL-2.0+
*/
-#include <common.h>
#include <errno.h>
+#include <linux/kernel.h>
#define ERRNO_MSG(errno, msg) msg
#define SAME_AS(x) (const char *)&errno_message[x]
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index 7a69167..b2c59ab 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -7,7 +7,10 @@
*/
#ifndef USE_HOSTCC
-#include <common.h>
+
+#define LOG_CATEGORY LOGC_DT
+
+#include <bloblist.h>
#include <boot_fit.h>
#include <display_options.h>
#include <dm.h>
@@ -87,6 +90,7 @@
[FDTSRC_BOARD] = "board",
[FDTSRC_EMBED] = "embed",
[FDTSRC_ENV] = "env",
+ [FDTSRC_BLOBLIST] = "bloblist",
};
const char *fdtdec_get_srcname(void)
@@ -1663,23 +1667,42 @@
int fdtdec_setup(void)
{
- int ret;
+ int ret = -ENOENT;
- /* The devicetree is typically appended to U-Boot */
- if (IS_ENABLED(CONFIG_OF_SEPARATE)) {
- gd->fdt_blob = fdt_find_separate();
- gd->fdt_src = FDTSRC_SEPARATE;
- } else { /* embed dtb in ELF file for testing / development */
- gd->fdt_blob = dtb_dt_embedded();
- gd->fdt_src = FDTSRC_EMBED;
+ /* If allowing a bloblist, check that first */
+ if (CONFIG_IS_ENABLED(BLOBLIST)) {
+ ret = bloblist_maybe_init();
+ if (!ret) {
+ gd->fdt_blob = bloblist_find(BLOBLISTT_CONTROL_FDT, 0);
+ if (gd->fdt_blob) {
+ gd->fdt_src = FDTSRC_BLOBLIST;
+ log_debug("Devicetree is in bloblist at %p\n",
+ gd->fdt_blob);
+ } else {
+ log_debug("No FDT found in bloblist\n");
+ ret = -ENOENT;
+ }
+ }
+ }
+
+ /* Otherwise, the devicetree is typically appended to U-Boot */
+ if (ret) {
+ if (IS_ENABLED(CONFIG_OF_SEPARATE)) {
+ gd->fdt_blob = fdt_find_separate();
+ gd->fdt_src = FDTSRC_SEPARATE;
+ } else { /* embed dtb in ELF file for testing / development */
+ gd->fdt_blob = dtb_dt_embedded();
+ gd->fdt_src = FDTSRC_EMBED;
+ }
}
/* Allow the board to override the fdt address. */
if (IS_ENABLED(CONFIG_OF_BOARD)) {
gd->fdt_blob = board_fdt_blob_setup(&ret);
- if (ret)
+ if (!ret)
+ gd->fdt_src = FDTSRC_BOARD;
+ else if (ret != -EEXIST)
return ret;
- gd->fdt_src = FDTSRC_BOARD;
}
/* Allow the early environment to override the fdt address */
diff --git a/lib/fdtdec_common.c b/lib/fdtdec_common.c
index ddaca00..ca36ff1 100644
--- a/lib/fdtdec_common.c
+++ b/lib/fdtdec_common.c
@@ -8,7 +8,6 @@
*/
#ifndef USE_HOSTCC
-#include <common.h>
#include <log.h>
#include <linux/libfdt.h>
#include <fdtdec.h>
diff --git a/lib/fdtdec_test.c b/lib/fdtdec_test.c
index 85351c7..1e4d5fc 100644
--- a/lib/fdtdec_test.c
+++ b/lib/fdtdec_test.c
@@ -6,7 +6,6 @@
* Copyright (c) 2011 The Chromium OS Authors.
*/
-#include <common.h>
#include <command.h>
#include <fdtdec.h>
#include <linux/libfdt.h>
diff --git a/lib/fwu_updates/fwu.c b/lib/fwu_updates/fwu.c
index b580574..8651810 100644
--- a/lib/fwu_updates/fwu.c
+++ b/lib/fwu_updates/fwu.c
@@ -125,16 +125,14 @@
return 0;
}
-static int fwu_get_image_type_id(u8 *image_index, efi_guid_t *image_type_id)
+static int fwu_get_image_type_id(u8 image_index, efi_guid_t *image_type_id)
{
- u8 index;
int i;
struct efi_fw_image *image;
- index = *image_index;
image = update_info.images;
for (i = 0; i < update_info.num_images; i++) {
- if (index == image[i].image_index) {
+ if (image_index == image[i].image_index) {
guidcpy(image_type_id, &image[i].image_type_id);
return 0;
}
@@ -332,24 +330,20 @@
}
/**
- * fwu_get_image_index() - Get the Image Index to be used for capsule update
- * @image_index: The Image Index for the image
- *
- * The FWU multi bank update feature computes the value of image_index at
- * runtime, based on the bank to which the image needs to be written to.
- * Derive the image_index value for the image.
+ * fwu_get_dfu_alt_num() - Get the dfu_alt_num to be used for capsule update
+ * @image_index: The Image Index for the image
+ * @alt_num: pointer to store dfu_alt_num
*
* Currently, the capsule update driver uses the DFU framework for
* the updates. This function gets the DFU alt number which is to
- * be used as the Image Index
+ * be used for capsule update.
*
* Return: 0 if OK, -ve on error
*
*/
-int fwu_get_image_index(u8 *image_index)
+int fwu_get_dfu_alt_num(u8 image_index, u8 *alt_num)
{
int ret, i;
- u8 alt_num;
uint update_bank;
efi_guid_t *image_guid, image_type_id;
struct fwu_mdata *mdata = &g_mdata;
@@ -365,7 +359,7 @@
ret = fwu_get_image_type_id(image_index, &image_type_id);
if (ret) {
log_debug("Unable to get image_type_id for image_index %u\n",
- *image_index);
+ image_index);
goto out;
}
@@ -380,15 +374,13 @@
img_entry = &mdata->img_entry[i];
img_bank_info = &img_entry->img_bank_info[update_bank];
image_guid = &img_bank_info->image_uuid;
- ret = fwu_plat_get_alt_num(g_dev, image_guid, &alt_num);
- if (ret) {
+ ret = fwu_plat_get_alt_num(g_dev, image_guid, alt_num);
+ if (ret)
log_debug("alt_num not found for partition with GUID %pUs\n",
image_guid);
- } else {
+ else
log_debug("alt_num %d for partition %pUs\n",
- alt_num, image_guid);
- *image_index = alt_num + 1;
- }
+ *alt_num, image_guid);
goto out;
}
diff --git a/lib/getopt.c b/lib/getopt.c
index 8b4515d..e9175e2 100644
--- a/lib/getopt.c
+++ b/lib/getopt.c
@@ -8,9 +8,9 @@
#define LOG_CATEGORY LOGC_CORE
-#include <common.h>
#include <getopt.h>
#include <log.h>
+#include <linux/string.h>
void getopt_init_state(struct getopt_state *gs)
{
diff --git a/lib/gunzip.c b/lib/gunzip.c
index 932e3e8..e71d8d0 100644
--- a/lib/gunzip.c
+++ b/lib/gunzip.c
@@ -4,7 +4,6 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
#include <blk.h>
#include <command.h>
#include <console.h>
diff --git a/lib/gzip.c b/lib/gzip.c
index 2595b2d..5d9c195 100644
--- a/lib/gzip.c
+++ b/lib/gzip.c
@@ -4,7 +4,6 @@
* Lei Wen <leiwen@marvell.com>, Marvell Inc.
*/
-#include <common.h>
#include <watchdog.h>
#include <command.h>
#include <gzip.h>
diff --git a/lib/hang.c b/lib/hang.c
index 2735774..3cfb06e 100644
--- a/lib/hang.c
+++ b/lib/hang.c
@@ -7,9 +7,9 @@
* u-boot.
*/
-#include <common.h>
#include <bootstage.h>
#include <hang.h>
+#include <stdio.h>
#include <os.h>
/**
diff --git a/lib/hash-checksum.c b/lib/hash-checksum.c
index 68c290d..1970a74 100644
--- a/lib/hash-checksum.c
+++ b/lib/hash-checksum.c
@@ -4,7 +4,6 @@
*/
#ifndef USE_HOSTCC
-#include <common.h>
#include <fdtdec.h>
#include <asm/byteorder.h>
#include <linux/errno.h>
diff --git a/lib/hashtable.c b/lib/hashtable.c
index f2d36bd..a0060f6 100644
--- a/lib/hashtable.c
+++ b/lib/hashtable.c
@@ -30,7 +30,6 @@
# endif
# endif
#else /* U-Boot build */
-# include <common.h>
# include <linux/string.h>
# include <linux/ctype.h>
#endif
diff --git a/lib/hexdump.c b/lib/hexdump.c
index 149c93e..33e3e6e 100644
--- a/lib/hexdump.c
+++ b/lib/hexdump.c
@@ -8,9 +8,9 @@
* more details.
*/
-#include <common.h>
#include <hexdump.h>
#include <mapmem.h>
+#include <vsprintf.h>
#include <linux/ctype.h>
#include <linux/compat.h>
#include <linux/log2.h>
diff --git a/lib/image-sparse.c b/lib/image-sparse.c
index 323aad9..f828906 100644
--- a/lib/image-sparse.c
+++ b/lib/image-sparse.c
@@ -35,7 +35,6 @@
*/
#include <config.h>
-#include <common.h>
#include <blk.h>
#include <image-sparse.h>
#include <div64.h>
diff --git a/lib/initcall.c b/lib/initcall.c
index 33b7d76..ce317af 100644
--- a/lib/initcall.c
+++ b/lib/initcall.c
@@ -3,7 +3,6 @@
* Copyright (c) 2013 The Chromium OS Authors.
*/
-#include <common.h>
#include <efi.h>
#include <initcall.h>
#include <log.h>
diff --git a/lib/libavb/avb_sysdeps.h b/lib/libavb/avb_sysdeps.h
index f52428c..aece8e0 100644
--- a/lib/libavb/avb_sysdeps.h
+++ b/lib/libavb/avb_sysdeps.h
@@ -19,7 +19,9 @@
* like uint8_t, uint64_t, and bool (with |false|, |true| keywords)
* must be present.
*/
-#include <common.h>
+#include <stdio.h>
+#include <stdbool.h>
+#include <linux/types.h>
/* If you don't have gcc or clang, these attribute macros may need to
* be adjusted.
diff --git a/lib/linux_compat.c b/lib/linux_compat.c
index c83426f..985e88e 100644
--- a/lib/linux_compat.c
+++ b/lib/linux_compat.c
@@ -1,5 +1,4 @@
-#include <common.h>
#include <malloc.h>
#include <memalign.h>
#include <asm/cache.h>
diff --git a/lib/list_sort.c b/lib/list_sort.c
index 1c9e061..a6e54d5 100644
--- a/lib/list_sort.c
+++ b/lib/list_sort.c
@@ -6,7 +6,6 @@
#include <linux/slab.h>
#else
#include <linux/compat.h>
-#include <common.h>
#include <malloc.h>
#include <linux/printk.h>
#endif
diff --git a/lib/lmb.c b/lib/lmb.c
index da924c6..44f9820 100644
--- a/lib/lmb.c
+++ b/lib/lmb.c
@@ -6,7 +6,6 @@
* Copyright (C) 2001 Peter Bergner.
*/
-#include <common.h>
#include <efi_loader.h>
#include <image.h>
#include <mapmem.h>
diff --git a/lib/lz4.c b/lib/lz4.c
index 5337842..d365dc7 100644
--- a/lib/lz4.c
+++ b/lib/lz4.c
@@ -27,7 +27,6 @@
* - LZ4 homepage : http://www.lz4.org
* - LZ4 source repository : https://github.com/lz4/lz4
*/
-#include <common.h>
#include <compiler.h>
#include <linux/kernel.h>
#include <linux/types.h>
diff --git a/lib/lz4_wrapper.c b/lib/lz4_wrapper.c
index 67dea2f..4d48e7b 100644
--- a/lib/lz4_wrapper.c
+++ b/lib/lz4_wrapper.c
@@ -3,7 +3,6 @@
* Copyright 2015 Google Inc.
*/
-#include <common.h>
#include <compiler.h>
#include <image.h>
#include <linux/kernel.h>
diff --git a/lib/lzma/LzmaDec.c b/lib/lzma/LzmaDec.c
index a90b35c..1da3f0a 100644
--- a/lib/lzma/LzmaDec.c
+++ b/lib/lzma/LzmaDec.c
@@ -2,7 +2,6 @@
2009-09-20 : Igor Pavlov : Public domain */
#include <config.h>
-#include <common.h>
#include <watchdog.h>
#include "LzmaDec.h"
diff --git a/lib/lzma/LzmaTools.c b/lib/lzma/LzmaTools.c
index 55f64cd..400d606 100644
--- a/lib/lzma/LzmaTools.c
+++ b/lib/lzma/LzmaTools.c
@@ -18,7 +18,6 @@
*/
#include <config.h>
-#include <common.h>
#include <log.h>
#include <watchdog.h>
diff --git a/lib/lzo/lzo1x_decompress.c b/lib/lzo/lzo1x_decompress.c
index 65fef0b..5d70fa4 100644
--- a/lib/lzo/lzo1x_decompress.c
+++ b/lib/lzo/lzo1x_decompress.c
@@ -11,8 +11,9 @@
* Richard Purdie <rpurdie@openedhand.com>
*/
-#include <common.h>
+#include <linux/kernel.h>
#include <linux/lzo.h>
+#include <linux/string.h>
#include <asm/byteorder.h>
#include <asm/unaligned.h>
#include "lzodefs.h"
diff --git a/lib/md5.c b/lib/md5.c
index 1636ab9..faf3f78 100644
--- a/lib/md5.c
+++ b/lib/md5.c
@@ -28,7 +28,6 @@
#include "compiler.h"
#ifndef USE_HOSTCC
-#include <common.h>
#include <watchdog.h>
#endif /* USE_HOSTCC */
#include <u-boot/md5.h>
diff --git a/lib/membuff.c b/lib/membuff.c
index 36dc43a..b242a38 100644
--- a/lib/membuff.c
+++ b/lib/membuff.c
@@ -6,7 +6,6 @@
* Copyright (c) 1992 Simon Glass
*/
-#include <common.h>
#include <errno.h>
#include <log.h>
#include <malloc.h>
@@ -288,7 +287,7 @@
(mb->end - mb->start) - 1 - membuff_avail(mb);
}
-int membuff_readline(struct membuff *mb, char *str, int maxlen, int minch)
+int membuff_readline(struct membuff *mb, char *str, int maxlen, int minch, bool must_fit)
{
int len; /* number of bytes read (!= string length) */
char *s, *end;
@@ -310,7 +309,7 @@
}
/* couldn't get the whole string */
- if (!ok) {
+ if (!ok && must_fit) {
if (maxlen)
*orig = '\0';
return 0;
diff --git a/lib/net_utils.c b/lib/net_utils.c
index 4283c13..c70fef0 100644
--- a/lib/net_utils.c
+++ b/lib/net_utils.c
@@ -9,9 +9,9 @@
* Copyright 2009 Dirk Behme, dirk.behme@googlemail.com
*/
-#include <common.h>
#include <net.h>
#include <net6.h>
+#include <vsprintf.h>
struct in_addr string_to_ip(const char *s)
{
diff --git a/lib/of_live.c b/lib/of_live.c
index 812c488..90b9459 100644
--- a/lib/of_live.c
+++ b/lib/of_live.c
@@ -10,7 +10,6 @@
#define LOG_CATEGORY LOGC_DT
-#include <common.h>
#include <abuf.h>
#include <log.h>
#include <linux/libfdt.h>
diff --git a/lib/optee/optee.c b/lib/optee/optee.c
index b036224..393f271 100644
--- a/lib/optee/optee.c
+++ b/lib/optee/optee.c
@@ -4,7 +4,6 @@
* Bryan O'Donoghue <bryan.odonoghue@linaro.org>
*/
-#include <common.h>
#include <fdtdec.h>
#include <image.h>
#include <log.h>
diff --git a/lib/panic.c b/lib/panic.c
index 66ae17f..0f578b5 100644
--- a/lib/panic.c
+++ b/lib/panic.c
@@ -9,7 +9,6 @@
* Wirzenius wrote this portably, Torvalds fucked it up :-)
*/
-#include <common.h>
#include <hang.h>
#if !defined(CONFIG_PANIC_HANG)
#include <command.h>
diff --git a/lib/physmem.c b/lib/physmem.c
index fc90ce4..562c74d 100644
--- a/lib/physmem.c
+++ b/lib/physmem.c
@@ -8,11 +8,11 @@
* Software Foundation.
*/
-#include <common.h>
#include <log.h>
#include <mapmem.h>
#include <physmem.h>
#include <linux/compiler.h>
+#include <linux/string.h>
phys_addr_t __weak arch_phys_memset(phys_addr_t s, int c, phys_size_t n)
{
diff --git a/lib/qsort.c b/lib/qsort.c
index 2f18588..a2562c4 100644
--- a/lib/qsort.c
+++ b/lib/qsort.c
@@ -17,7 +17,6 @@
#include <log.h>
#include <linux/types.h>
-#include <common.h>
#include <exports.h>
#include <sort.h>
diff --git a/lib/rand.c b/lib/rand.c
index d256baf..d6f2977 100644
--- a/lib/rand.c
+++ b/lib/rand.c
@@ -7,7 +7,6 @@
* Michael Walle <michael@walle.cc>
*/
-#include <common.h>
#include <rand.h>
static unsigned int y = 1U;
diff --git a/lib/rc4.c b/lib/rc4.c
index 720112d..3839924 100644
--- a/lib/rc4.c
+++ b/lib/rc4.c
@@ -7,9 +7,6 @@
* Rivest Cipher 4 (RC4) implementation
*/
-#ifndef USE_HOSTCC
-#include <common.h>
-#endif
#include <rc4.h>
void rc4_encode(unsigned char *buf, unsigned int len, const unsigned char key[16])
diff --git a/lib/rsa/rsa-keyprop.c b/lib/rsa/rsa-keyprop.c
index 98855f6..80d0594 100644
--- a/lib/rsa/rsa-keyprop.c
+++ b/lib/rsa/rsa-keyprop.c
@@ -9,7 +9,6 @@
* Copyright (c) 2016 Thomas Pornin <pornin@bolet.org>
*/
-#include <common.h>
#include <image.h>
#include <malloc.h>
#include <crypto/internal/rsa.h>
diff --git a/lib/rsa/rsa-mod-exp.c b/lib/rsa/rsa-mod-exp.c
index d259b2a..5b3ea02 100644
--- a/lib/rsa/rsa-mod-exp.c
+++ b/lib/rsa/rsa-mod-exp.c
@@ -4,7 +4,6 @@
*/
#ifndef USE_HOSTCC
-#include <common.h>
#include <fdtdec.h>
#include <log.h>
#include <asm/types.h>
diff --git a/lib/rsa/rsa-sign.c b/lib/rsa/rsa-sign.c
index d20bdb5..2304030 100644
--- a/lib/rsa/rsa-sign.c
+++ b/lib/rsa/rsa-sign.c
@@ -104,6 +104,8 @@
const char *engine_id;
char key_id[1024];
EVP_PKEY *key = NULL;
+ const char *const pkcs11_schema = "pkcs11:";
+ const char *pkcs11_uri_prepend = "";
if (!evpp)
return -EINVAL;
@@ -113,19 +115,26 @@
engine_id = ENGINE_get_id(engine);
if (engine_id && !strcmp(engine_id, "pkcs11")) {
- if (keydir)
+ if (keydir) {
+ // Check for legacy keydir spec and prepend
+ if (strncmp(pkcs11_schema, keydir, strlen(pkcs11_schema))) {
+ pkcs11_uri_prepend = pkcs11_schema;
+ fprintf(stderr, "WARNING: Legacy URI specified. Please add '%s'.\n", pkcs11_schema);
+ }
+
if (strstr(keydir, "object="))
snprintf(key_id, sizeof(key_id),
- "pkcs11:%s;type=public",
- keydir);
+ "%s%s;type=public",
+ pkcs11_uri_prepend, keydir);
else
snprintf(key_id, sizeof(key_id),
- "pkcs11:%s;object=%s;type=public",
- keydir, name);
- else
+ "%s%s;object=%s;type=public",
+ pkcs11_uri_prepend, keydir, name);
+ } else {
snprintf(key_id, sizeof(key_id),
"pkcs11:object=%s;type=public",
name);
+ }
} else if (engine_id) {
if (keydir)
snprintf(key_id, sizeof(key_id),
@@ -224,6 +233,8 @@
const char *engine_id;
char key_id[1024];
EVP_PKEY *key = NULL;
+ const char *const pkcs11_schema = "pkcs11:";
+ const char *pkcs11_uri_prepend = "";
if (!evpp)
return -EINVAL;
@@ -235,19 +246,26 @@
fprintf(stderr, "Please use 'keydir' with PKCS11\n");
return -EINVAL;
}
- if (keydir)
+ if (keydir) {
+ // Check for legacy keydir spec and prepend
+ if (strncmp(pkcs11_schema, keydir, strlen(pkcs11_schema))) {
+ pkcs11_uri_prepend = pkcs11_schema;
+ fprintf(stderr, "WARNING: Legacy URI specified. Please add '%s'.\n", pkcs11_schema);
+ }
+
if (strstr(keydir, "object="))
snprintf(key_id, sizeof(key_id),
- "pkcs11:%s;type=private",
- keydir);
+ "%s%s;type=private",
+ pkcs11_uri_prepend, keydir);
else
snprintf(key_id, sizeof(key_id),
- "pkcs11:%s;object=%s;type=private",
- keydir, name);
- else
+ "%s%s;object=%s;type=private",
+ pkcs11_uri_prepend, keydir, name);
+ } else {
snprintf(key_id, sizeof(key_id),
"pkcs11:object=%s;type=private",
name);
+ }
} else if (engine_id) {
if (keydir && name)
snprintf(key_id, sizeof(key_id),
@@ -317,7 +335,8 @@
e = ENGINE_by_id(engine_id);
if (!e) {
- fprintf(stderr, "Engine isn't available\n");
+ fprintf(stderr, "Engine '%s' isn't available\n", engine_id);
+ ERR_print_errors_fp(stderr);
return -1;
}
diff --git a/lib/rsa/rsa-verify.c b/lib/rsa/rsa-verify.c
index 2f3b344..1007b69 100644
--- a/lib/rsa/rsa-verify.c
+++ b/lib/rsa/rsa-verify.c
@@ -4,7 +4,6 @@
*/
#ifndef USE_HOSTCC
-#include <common.h>
#include <fdtdec.h>
#include <log.h>
#include <malloc.h>
@@ -17,9 +16,9 @@
#else
#include "fdt_host.h"
#include "mkimage.h"
+#include <linux/kconfig.h>
#include <fdt_support.h>
#endif
-#include <linux/kconfig.h>
#include <u-boot/rsa-mod-exp.h>
#include <u-boot/rsa.h>
diff --git a/lib/rtc-lib.c b/lib/rtc-lib.c
index 1f7bdad..46dcfba 100644
--- a/lib/rtc-lib.c
+++ b/lib/rtc-lib.c
@@ -10,7 +10,6 @@
* - January is month 1.
*/
-#include <common.h>
#include <rtc.h>
#include <linux/math64.h>
diff --git a/lib/semihosting.c b/lib/semihosting.c
index 831774e..9be5bff 100644
--- a/lib/semihosting.c
+++ b/lib/semihosting.c
@@ -4,9 +4,10 @@
* Copyright 2014 Broadcom Corporation
*/
-#include <common.h>
#include <log.h>
#include <semihosting.h>
+#include <linux/errno.h>
+#include <linux/string.h>
#define SYSOPEN 0x01
#define SYSCLOSE 0x02
diff --git a/lib/sha1.c b/lib/sha1.c
index 8d07407..7ef536f 100644
--- a/lib/sha1.c
+++ b/lib/sha1.c
@@ -17,12 +17,9 @@
#endif
#ifndef USE_HOSTCC
-#include <common.h>
-#include <linux/string.h>
-#else
-#include <string.h>
+#include <cyclic.h>
#endif /* USE_HOSTCC */
-#include <watchdog.h>
+#include <string.h>
#include <u-boot/sha1.h>
#include <linux/compiler_attributes.h>
diff --git a/lib/sha256.c b/lib/sha256.c
index 4d26aea..665ba6f 100644
--- a/lib/sha256.c
+++ b/lib/sha256.c
@@ -6,12 +6,9 @@
*/
#ifndef USE_HOSTCC
-#include <common.h>
-#include <linux/string.h>
-#else
-#include <string.h>
+#include <cyclic.h>
#endif /* USE_HOSTCC */
-#include <watchdog.h>
+#include <string.h>
#include <u-boot/sha256.h>
#include <linux/compiler_attributes.h>
diff --git a/lib/sha512.c b/lib/sha512.c
index fbe8d5f..ffe2c5c 100644
--- a/lib/sha512.c
+++ b/lib/sha512.c
@@ -11,13 +11,9 @@
*/
#ifndef USE_HOSTCC
-#include <common.h>
-#include <linux/string.h>
-#else
-#include <string.h>
+#include <cyclic.h>
#endif /* USE_HOSTCC */
#include <compiler.h>
-#include <watchdog.h>
#include <u-boot/sha512.h>
const uint8_t sha384_der_prefix[SHA384_DER_LEN] = {
diff --git a/lib/slre.c b/lib/slre.c
index e82a9e7..277a59a 100644
--- a/lib/slre.c
+++ b/lib/slre.c
@@ -21,8 +21,8 @@
#include <string.h>
#else
#include <log.h>
-#include <common.h>
#include <linux/ctype.h>
+#include <linux/string.h>
#endif /* SLRE_TEST */
#include <errno.h>
@@ -686,6 +686,7 @@
}
if (!slre_compile(&slre, argv[1])) {
+ (void) fclose(fp);
fprintf(stderr, "Error compiling slre: %s\n", slre.err_str);
return 1;
}
diff --git a/lib/smbios-parser.c b/lib/smbios-parser.c
index 2b93929..f48d743 100644
--- a/lib/smbios-parser.c
+++ b/lib/smbios-parser.c
@@ -5,23 +5,11 @@
#define LOG_CATEGORY LOGC_BOOT
-#include <common.h>
+#include <errno.h>
#include <smbios.h>
-
-static inline int verify_checksum(const struct smbios_entry *e)
-{
- /*
- * Checksums for SMBIOS tables are calculated to have a value, so that
- * the sum over all bytes yields zero (using unsigned 8 bit arithmetic).
- */
- u8 *byte = (u8 *)e;
- u8 sum = 0;
-
- for (int i = 0; i < e->length; i++)
- sum += byte[i];
-
- return sum;
-}
+#include <string.h>
+#include <tables_csum.h>
+#include <linux/kernel.h>
const struct smbios_entry *smbios_entry(u64 address, u32 size)
{
@@ -33,7 +21,7 @@
if (memcmp(entry->anchor, "_SM_", 4))
return NULL;
- if (verify_checksum(entry))
+ if (table_compute_checksum(entry, entry->length))
return NULL;
return entry;
@@ -51,14 +39,7 @@
return pos;
}
-static struct smbios_header *get_next_header(struct smbios_header *curr)
-{
- u8 *pos = ((u8 *)curr) + curr->length;
-
- return (struct smbios_header *)find_next_header(pos);
-}
-
-static const struct smbios_header *next_header(const struct smbios_header *curr)
+static struct smbios_header *get_next_header(const struct smbios_header *curr)
{
u8 *pos = ((u8 *)curr) + curr->length;
@@ -74,7 +55,7 @@
if (header->type == type)
return header;
- header = next_header(header);
+ header = get_next_header(header);
}
return NULL;
@@ -242,21 +223,24 @@
}
}
-void smbios_prepare_measurement(const struct smbios_entry *entry,
+void smbios_prepare_measurement(const struct smbios3_entry *entry,
struct smbios_header *smbios_copy)
{
u32 i, j;
+ void *table_end;
struct smbios_header *header;
+ table_end = (void *)((u8 *)smbios_copy + entry->max_struct_size);
+
for (i = 0; i < ARRAY_SIZE(smbios_filter_tables); i++) {
header = smbios_copy;
- for (j = 0; j < entry->struct_count; j++) {
+ for (j = 0; (void *)header < table_end; j++) {
if (header->type == smbios_filter_tables[i].type)
break;
header = get_next_header(header);
}
- if (j >= entry->struct_count)
+ if ((void *)header >= table_end)
continue;
clear_smbios_table(header,
diff --git a/lib/smbios.c b/lib/smbios.c
index d7f4999..7bd9805 100644
--- a/lib/smbios.c
+++ b/lib/smbios.c
@@ -5,15 +5,17 @@
* Adapted from coreboot src/arch/x86/smbios.c
*/
-#include <common.h>
#include <dm.h>
#include <env.h>
#include <linux/stringify.h>
+#include <linux/string.h>
#include <mapmem.h>
#include <smbios.h>
#include <sysinfo.h>
#include <tables_csum.h>
#include <version.h>
+#include <malloc.h>
+#include <dm/ofnode.h>
#ifdef CONFIG_CPU
#include <cpu.h>
#include <dm/uclass-internal.h>
@@ -44,21 +46,46 @@
DECLARE_GLOBAL_DATA_PTR;
/**
+ * struct map_sysinfo - Mapping of sysinfo strings to DT
+ *
+ * @si_str: sysinfo string
+ * @dt_str: DT string
+ * @max: Max index of the tokenized string to pick. Counting starts from 0
+ *
+ */
+struct map_sysinfo {
+ const char *si_node;
+ const char *si_str;
+ const char *dt_str;
+ int max;
+};
+
+static const struct map_sysinfo sysinfo_to_dt[] = {
+ { .si_node = "system", .si_str = "product", .dt_str = "model", 2 },
+ { .si_node = "system", .si_str = "manufacturer", .dt_str = "compatible", 1 },
+ { .si_node = "baseboard", .si_str = "product", .dt_str = "model", 2 },
+ { .si_node = "baseboard", .si_str = "manufacturer", .dt_str = "compatible", 1 },
+};
+
+/**
* struct smbios_ctx - context for writing SMBIOS tables
*
- * @node: node containing the information to write (ofnode_null() if none)
- * @dev: sysinfo device to use (NULL if none)
- * @eos: end-of-string pointer for the table being processed. This is set
- * up when we start processing a table
- * @next_ptr: pointer to the start of the next string to be added. When the
- * table is nopt empty, this points to the byte after the \0 of the
- * previous string.
- * @last_str: points to the last string that was written to the table, or NULL
- * if none
+ * @node: node containing the information to write (ofnode_null()
+ * if none)
+ * @dev: sysinfo device to use (NULL if none)
+ * @subnode_name: sysinfo subnode_name. Used for DT fallback
+ * @eos: end-of-string pointer for the table being processed.
+ * This is set up when we start processing a table
+ * @next_ptr: pointer to the start of the next string to be added.
+ * When the table is not empty, this points to the byte
+ * after the \0 of the previous string.
+ * @last_str: points to the last string that was written to the table,
+ * or NULL if none
*/
struct smbios_ctx {
ofnode node;
struct udevice *dev;
+ const char *subnode_name;
char *eos;
char *next_ptr;
char *last_str;
@@ -87,6 +114,19 @@
const char *subnode_name;
};
+static const struct map_sysinfo *convert_sysinfo_to_dt(const char *node, const char *si)
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(sysinfo_to_dt); i++) {
+ if (node && !strcmp(node, sysinfo_to_dt[i].si_node) &&
+ !strcmp(si, sysinfo_to_dt[i].si_str))
+ return &sysinfo_to_dt[i];
+ }
+
+ return NULL;
+}
+
/**
* smbios_add_string() - add a string to the string area
*
@@ -102,9 +142,6 @@
int i = 1;
char *p = ctx->eos;
- if (!*str)
- str = "Unknown";
-
for (;;) {
if (!*p) {
ctx->last_str = p;
@@ -128,31 +165,88 @@
}
/**
+ * get_str_from_dt - Get a substring from a DT property.
+ * After finding the property in the DT, the function
+ * will parse comma-separated values and return the value.
+ * If nprop->max exceeds the number of comma-separated
+ * elements, the last non NULL value will be returned.
+ * Counting starts from zero.
+ *
+ * @nprop: sysinfo property to use
+ * @str: pointer to fill with data
+ * @size: str buffer length
+ */
+static
+void get_str_from_dt(const struct map_sysinfo *nprop, char *str, size_t size)
+{
+ const char *dt_str;
+ int cnt = 0;
+ char *token;
+
+ memset(str, 0, size);
+ if (!nprop || !nprop->max)
+ return;
+
+ dt_str = ofnode_read_string(ofnode_root(), nprop->dt_str);
+ if (!dt_str)
+ return;
+
+ memcpy(str, dt_str, size);
+ token = strtok(str, ",");
+ while (token && cnt < nprop->max) {
+ strlcpy(str, token, strlen(token) + 1);
+ token = strtok(NULL, ",");
+ cnt++;
+ }
+}
+
+/**
* smbios_add_prop_si() - Add a property from the devicetree or sysinfo
*
* Sysinfo is used if available, with a fallback to devicetree
*
* @ctx: context for writing the tables
* @prop: property to write
+ * @dval: Default value to use if the string is not found or is empty
* Return: 0 if not found, else SMBIOS string number (1 or more)
*/
static int smbios_add_prop_si(struct smbios_ctx *ctx, const char *prop,
- int sysinfo_id)
+ int sysinfo_id, const char *dval)
{
+ int ret;
+
+ if (!dval || !*dval)
+ dval = "Unknown";
+
+ if (!prop)
+ return smbios_add_string(ctx, dval);
+
if (sysinfo_id && ctx->dev) {
char val[SMBIOS_STR_MAX];
- int ret;
ret = sysinfo_get_str(ctx->dev, sysinfo_id, sizeof(val), val);
if (!ret)
return smbios_add_string(ctx, val);
}
if (IS_ENABLED(CONFIG_OF_CONTROL)) {
- const char *str;
+ const char *str = NULL;
+ char str_dt[128] = { 0 };
+ /*
+ * If the node is not valid fallback and try the entire DT
+ * so we can at least fill in manufacturer and board type
+ */
+ if (ofnode_valid(ctx->node)) {
+ str = ofnode_read_string(ctx->node, prop);
+ } else {
+ const struct map_sysinfo *nprop;
- str = ofnode_read_string(ctx->node, prop);
- if (str)
- return smbios_add_string(ctx, str);
+ nprop = convert_sysinfo_to_dt(ctx->subnode_name, prop);
+ get_str_from_dt(nprop, str_dt, sizeof(str_dt));
+ str = (const char *)str_dt;
+ }
+
+ ret = smbios_add_string(ctx, str && *str ? str : dval);
+ return ret;
}
return 0;
@@ -161,12 +255,15 @@
/**
* smbios_add_prop() - Add a property from the devicetree
*
- * @prop: property to write
+ * @prop: property to write. The default string will be written if
+ * prop is NULL
+ * @dval: Default value to use if the string is not found or is empty
* Return: 0 if not found, else SMBIOS string number (1 or more)
*/
-static int smbios_add_prop(struct smbios_ctx *ctx, const char *prop)
+static int smbios_add_prop(struct smbios_ctx *ctx, const char *prop,
+ const char *dval)
{
- return smbios_add_prop_si(ctx, prop, SYSINFO_ID_NONE);
+ return smbios_add_prop_si(ctx, prop, SYSINFO_ID_NONE, dval);
}
static void smbios_set_eos(struct smbios_ctx *ctx, char *eos)
@@ -228,11 +325,9 @@
memset(t, 0, sizeof(struct smbios_type0));
fill_smbios_header(t, SMBIOS_BIOS_INFORMATION, len, handle);
smbios_set_eos(ctx, t->eos);
- t->vendor = smbios_add_string(ctx, "U-Boot");
+ t->vendor = smbios_add_prop(ctx, NULL, "U-Boot");
- t->bios_ver = smbios_add_prop(ctx, "version");
- if (!t->bios_ver)
- t->bios_ver = smbios_add_string(ctx, PLAIN_VERSION);
+ t->bios_ver = smbios_add_prop(ctx, "version", PLAIN_VERSION);
if (t->bios_ver)
gd->smbios_version = ctx->last_str;
log_debug("smbios_version = %p: '%s'\n", gd->smbios_version,
@@ -241,7 +336,7 @@
print_buffer((ulong)gd->smbios_version, gd->smbios_version,
1, strlen(gd->smbios_version) + 1, 0);
#endif
- t->bios_release_date = smbios_add_string(ctx, U_BOOT_DMI_DATE);
+ t->bios_release_date = smbios_add_prop(ctx, NULL, U_BOOT_DMI_DATE);
#ifdef CONFIG_ROM_SIZE
t->bios_rom_size = (CONFIG_ROM_SIZE / 65536) - 1;
#endif
@@ -280,22 +375,19 @@
memset(t, 0, sizeof(struct smbios_type1));
fill_smbios_header(t, SMBIOS_SYSTEM_INFORMATION, len, handle);
smbios_set_eos(ctx, t->eos);
- t->manufacturer = smbios_add_prop(ctx, "manufacturer");
- if (!t->manufacturer)
- t->manufacturer = smbios_add_string(ctx, "Unknown");
- t->product_name = smbios_add_prop(ctx, "product");
- if (!t->product_name)
- t->product_name = smbios_add_string(ctx, "Unknown Product");
+ t->manufacturer = smbios_add_prop(ctx, "manufacturer", "Unknown");
+ t->product_name = smbios_add_prop(ctx, "product", "Unknown");
t->version = smbios_add_prop_si(ctx, "version",
- SYSINFO_ID_SMBIOS_SYSTEM_VERSION);
+ SYSINFO_ID_SMBIOS_SYSTEM_VERSION,
+ "Unknown");
if (serial_str) {
- t->serial_number = smbios_add_string(ctx, serial_str);
+ t->serial_number = smbios_add_prop(ctx, NULL, serial_str);
strncpy((char *)t->uuid, serial_str, sizeof(t->uuid));
} else {
- t->serial_number = smbios_add_prop(ctx, "serial");
+ t->serial_number = smbios_add_prop(ctx, "serial", "Unknown");
}
- t->sku_number = smbios_add_prop(ctx, "sku");
- t->family = smbios_add_prop(ctx, "family");
+ t->sku_number = smbios_add_prop(ctx, "sku", "Unknown");
+ t->family = smbios_add_prop(ctx, "family", "Unknown");
len = t->length + smbios_string_table_len(ctx);
*current += len;
@@ -314,15 +406,12 @@
memset(t, 0, sizeof(struct smbios_type2));
fill_smbios_header(t, SMBIOS_BOARD_INFORMATION, len, handle);
smbios_set_eos(ctx, t->eos);
- t->manufacturer = smbios_add_prop(ctx, "manufacturer");
- if (!t->manufacturer)
- t->manufacturer = smbios_add_string(ctx, "Unknown");
- t->product_name = smbios_add_prop(ctx, "product");
- if (!t->product_name)
- t->product_name = smbios_add_string(ctx, "Unknown Product");
+ t->manufacturer = smbios_add_prop(ctx, "manufacturer", "Unknown");
+ t->product_name = smbios_add_prop(ctx, "product", "Unknown");
t->version = smbios_add_prop_si(ctx, "version",
- SYSINFO_ID_SMBIOS_BASEBOARD_VERSION);
- t->asset_tag_number = smbios_add_prop(ctx, "asset-tag");
+ SYSINFO_ID_SMBIOS_BASEBOARD_VERSION,
+ "Unknown");
+ t->asset_tag_number = smbios_add_prop(ctx, "asset-tag", "Unknown");
t->feature_flags = SMBIOS_BOARD_FEATURE_HOSTING;
t->board_type = SMBIOS_BOARD_MOTHERBOARD;
@@ -343,9 +432,7 @@
memset(t, 0, sizeof(struct smbios_type3));
fill_smbios_header(t, SMBIOS_SYSTEM_ENCLOSURE, len, handle);
smbios_set_eos(ctx, t->eos);
- t->manufacturer = smbios_add_prop(ctx, "manufacturer");
- if (!t->manufacturer)
- t->manufacturer = smbios_add_string(ctx, "Unknown");
+ t->manufacturer = smbios_add_prop(ctx, "manufacturer", "Unknown");
t->chassis_type = SMBIOS_ENCLOSURE_DESKTOP;
t->bootup_state = SMBIOS_STATE_SAFE;
t->power_supply_state = SMBIOS_STATE_SAFE;
@@ -387,9 +474,10 @@
}
#endif
- t->processor_family = processor_family;
- t->processor_manufacturer = smbios_add_string(ctx, vendor);
- t->processor_version = smbios_add_string(ctx, name);
+ t->processor_family = 0xfe;
+ t->processor_family2 = processor_family;
+ t->processor_manufacturer = smbios_add_prop(ctx, NULL, vendor);
+ t->processor_version = smbios_add_prop(ctx, NULL, name);
}
static int smbios_write_type4(ulong *current, int handle,
@@ -409,7 +497,6 @@
t->l1_cache_handle = 0xffff;
t->l2_cache_handle = 0xffff;
t->l3_cache_handle = 0xffff;
- t->processor_family2 = t->processor_family;
len = t->length + smbios_string_table_len(ctx);
*current += len;
@@ -464,15 +551,13 @@
ulong write_smbios_table(ulong addr)
{
ofnode parent_node = ofnode_null();
- struct smbios_entry *se;
+ ulong table_addr, start_addr;
+ struct smbios3_entry *se;
struct smbios_ctx ctx;
- ulong table_addr;
ulong tables;
int len = 0;
int max_struct_size = 0;
int handle = 0;
- char *istart;
- int isize;
int i;
ctx.node = ofnode_null();
@@ -484,14 +569,10 @@
ctx.dev = NULL;
}
- /* 16 byte align the table address */
- addr = ALIGN(addr, 16);
+ start_addr = addr;
- se = map_sysmem(addr, sizeof(struct smbios_entry));
- memset(se, 0, sizeof(struct smbios_entry));
-
- addr += sizeof(struct smbios_entry);
- addr = ALIGN(addr, 16);
+ /* move past the (so-far-unwritten) header to start writing structs */
+ addr = ALIGN(addr + sizeof(struct smbios3_entry), 16);
tables = addr;
/* populate minimum required tables */
@@ -500,49 +581,38 @@
int tmp;
method = &smbios_write_funcs[i];
- if (IS_ENABLED(CONFIG_OF_CONTROL) && method->subnode_name)
- ctx.node = ofnode_find_subnode(parent_node,
- method->subnode_name);
+ ctx.subnode_name = NULL;
+ if (method->subnode_name) {
+ ctx.subnode_name = method->subnode_name;
+ if (IS_ENABLED(CONFIG_OF_CONTROL))
+ ctx.node = ofnode_find_subnode(parent_node,
+ method->subnode_name);
+ }
tmp = method->write((ulong *)&addr, handle++, &ctx);
max_struct_size = max(max_struct_size, tmp);
len += tmp;
}
- memcpy(se->anchor, "_SM_", 4);
- se->length = sizeof(struct smbios_entry);
- se->major_ver = SMBIOS_MAJOR_VER;
- se->minor_ver = SMBIOS_MINOR_VER;
- se->max_struct_size = max_struct_size;
- memcpy(se->intermediate_anchor, "_DMI_", 5);
- se->struct_table_length = len;
-
/*
* We must use a pointer here so things work correctly on sandbox. The
* user of this table is not aware of the mapping of addresses to
* sandbox's DRAM buffer.
*/
table_addr = (ulong)map_sysmem(tables, 0);
- if (sizeof(table_addr) > sizeof(u32) && table_addr > (ulong)UINT_MAX) {
- /*
- * We need to put this >32-bit pointer into the table but the
- * field is only 32 bits wide.
- */
- printf("WARNING: SMBIOS table_address overflow %llx\n",
- (unsigned long long)table_addr);
- addr = 0;
- goto out;
- }
+
+ /* now go back and write the SMBIOS3 header */
+ se = map_sysmem(start_addr, sizeof(struct smbios3_entry));
+ memset(se, '\0', sizeof(struct smbios3_entry));
+ memcpy(se->anchor, "_SM3_", 5);
+ se->length = sizeof(struct smbios3_entry);
+ se->major_ver = SMBIOS_MAJOR_VER;
+ se->minor_ver = SMBIOS_MINOR_VER;
+ se->doc_rev = 0;
+ se->entry_point_rev = 1;
+ se->max_struct_size = len;
se->struct_table_address = table_addr;
-
- se->struct_count = handle;
-
- /* calculate checksums */
- istart = (char *)se + SMBIOS_INTERMEDIATE_OFFSET;
- isize = sizeof(struct smbios_entry) - SMBIOS_INTERMEDIATE_OFFSET;
- se->intermediate_checksum = table_compute_checksum(istart, isize);
- se->checksum = table_compute_checksum(se, sizeof(struct smbios_entry));
-out:
+ se->checksum = table_compute_checksum(se, sizeof(struct smbios3_entry));
unmap_sysmem(se);
return addr;
diff --git a/lib/strto.c b/lib/strto.c
index 1549211..5157332 100644
--- a/lib/strto.c
+++ b/lib/strto.c
@@ -9,9 +9,9 @@
* Wirzenius wrote this portably, Torvalds fucked it up :-)
*/
-#include <common.h>
#include <errno.h>
#include <malloc.h>
+#include <vsprintf.h>
#include <linux/ctype.h>
/* from lib/kstrtox.c */
diff --git a/lib/tables_csum.c b/lib/tables_csum.c
index e2630d5..305b1ec 100644
--- a/lib/tables_csum.c
+++ b/lib/tables_csum.c
@@ -3,12 +3,11 @@
* Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
*/
-#include <common.h>
-#include <linux/ctype.h>
+#include <linux/types.h>
-u8 table_compute_checksum(void *v, int len)
+u8 table_compute_checksum(const void *v, const int len)
{
- u8 *bytes = v;
+ const u8 *bytes = v;
u8 checksum = 0;
int i;
diff --git a/lib/time.c b/lib/time.c
index 00f4a1a..872f73d 100644
--- a/lib/time.c
+++ b/lib/time.c
@@ -4,7 +4,6 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
#include <clock_legacy.h>
#include <bootstage.h>
#include <dm.h>
diff --git a/lib/tiny-printf.c b/lib/tiny-printf.c
index f661fc6..9a70c60 100644
--- a/lib/tiny-printf.c
+++ b/lib/tiny-printf.c
@@ -8,7 +8,6 @@
* Copyright (C) 2004,2008 Kustaa Nyholm
*/
-#include <common.h>
#include <log.h>
#include <serial.h>
#include <stdarg.h>
diff --git a/lib/tpm-common.c b/lib/tpm-common.c
index 82ffdc5..b592c22 100644
--- a/lib/tpm-common.c
+++ b/lib/tpm-common.c
@@ -6,7 +6,6 @@
#define LOG_CATEGORY UCLASS_TPM
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <asm/unaligned.h>
diff --git a/lib/tpm-v1.c b/lib/tpm-v1.c
index 60a18ca..e66023d 100644
--- a/lib/tpm-v1.c
+++ b/lib/tpm-v1.c
@@ -6,7 +6,6 @@
#define LOG_CATEGORY UCLASS_TPM
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <asm/unaligned.h>
diff --git a/lib/tpm-v2.c b/lib/tpm-v2.c
index bd0fb07..68eaaa6 100644
--- a/lib/tpm-v2.c
+++ b/lib/tpm-v2.c
@@ -5,7 +5,6 @@
* Author: Miquel Raynal <miquel.raynal@bootlin.com>
*/
-#include <common.h>
#include <dm.h>
#include <dm/of_access.h>
#include <tpm_api.h>
diff --git a/lib/tpm_api.c b/lib/tpm_api.c
index 3ef5e81..39a5121 100644
--- a/lib/tpm_api.c
+++ b/lib/tpm_api.c
@@ -3,7 +3,6 @@
* Copyright 2019 Google LLC
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <tpm_api.h>
diff --git a/lib/trace.c b/lib/trace.c
index 4874bef..cabbe47 100644
--- a/lib/trace.c
+++ b/lib/trace.c
@@ -3,10 +3,10 @@
* Copyright (c) 2012 The Chromium OS Authors.
*/
-#include <common.h>
#include <mapmem.h>
#include <time.h>
#include <trace.h>
+#include <linux/errno.h>
#include <asm/global_data.h>
#include <asm/io.h>
#include <asm/sections.h>
diff --git a/lib/uuid.c b/lib/uuid.c
index afb40bf..2d7d995 100644
--- a/lib/uuid.c
+++ b/lib/uuid.c
@@ -9,7 +9,6 @@
#define LOG_CATEGOT LOGC_CORE
-#include <common.h>
#include <command.h>
#include <efi_api.h>
#include <env.h>
@@ -18,7 +17,6 @@
#include <uuid.h>
#include <linux/ctype.h>
#include <errno.h>
-#include <common.h>
#include <asm/io.h>
#include <part_efi.h>
#include <malloc.h>
@@ -179,6 +177,10 @@
SMBIOS_TABLE_GUID,
},
{
+ "SMBIOS3 table",
+ SMBIOS3_TABLE_GUID,
+ },
+ {
"Runtime properties",
EFI_RT_PROPERTIES_TABLE_GUID,
},
diff --git a/lib/vsprintf.c b/lib/vsprintf.c
index e14c6ca..27ea9c9 100644
--- a/lib/vsprintf.c
+++ b/lib/vsprintf.c
@@ -13,7 +13,6 @@
* from hush: simple_itoa() was lifted from boa-0.93.15
*/
-#include <common.h>
#include <charset.h>
#include <efi_loader.h>
#include <div64.h>
diff --git a/lib/zlib/zlib.h b/lib/zlib/zlib.h
index af3703e..560e7be 100644
--- a/lib/zlib/zlib.h
+++ b/lib/zlib/zlib.h
@@ -2,7 +2,6 @@
#ifndef __GLUE_ZLIB_H__
#define __GLUE_ZLIB_H__
-#include <common.h>
#include <linux/compiler.h>
#include <asm/unaligned.h>
#include <watchdog.h>
diff --git a/lib/zstd/zstd.c b/lib/zstd/zstd.c
index 3a2abc8..14bde36 100644
--- a/lib/zstd/zstd.c
+++ b/lib/zstd/zstd.c
@@ -5,10 +5,10 @@
#define LOG_CATEGORY LOGC_BOOT
-#include <common.h>
#include <abuf.h>
#include <log.h>
#include <malloc.h>
+#include <linux/errno.h>
#include <linux/zstd.h>
int zstd_decompress(struct abuf *in, struct abuf *out)
diff --git a/net/Kconfig b/net/Kconfig
index 4215889..5dff633 100644
--- a/net/Kconfig
+++ b/net/Kconfig
@@ -5,6 +5,7 @@
menuconfig NET
bool "Networking support"
default y
+ imply NETDEVICES
if NET
@@ -57,7 +58,7 @@
bool "NetConsole support"
help
Support the 'nc' input/output device for networked console.
- See README.NetConsole for details.
+ See doc/usage/netconsole.rst for details.
config IP_DEFRAG
bool "Support IP datagram reassembly"
diff --git a/net/arp.h b/net/arp.h
index 25b3c00..c50885f 100644
--- a/net/arp.h
+++ b/net/arp.h
@@ -12,8 +12,6 @@
#ifndef __ARP_H__
#define __ARP_H__
-#include <common.h>
-
extern struct in_addr net_arp_wait_packet_ip;
/* MAC address of waiting packet's destination */
extern uchar *arp_wait_packet_ethaddr;
diff --git a/net/fastboot_udp.c b/net/fastboot_udp.c
index d690787..6fee441 100644
--- a/net/fastboot_udp.c
+++ b/net/fastboot_udp.c
@@ -42,16 +42,15 @@
static int fastboot_our_port;
/**
- * fastboot_udp_send_info() - Send an INFO packet during long commands.
+ * fastboot_udp_send_response() - Send an response into UDP
*
- * @msg: String describing the reason for waiting
+ * @response: Response to send
*/
-static void fastboot_udp_send_info(const char *msg)
+static void fastboot_udp_send_response(const char *response)
{
uchar *packet;
uchar *packet_base;
int len = 0;
- char response[FASTBOOT_RESPONSE_LEN] = {0};
struct fastboot_header response_header = {
.id = FASTBOOT_FASTBOOT,
@@ -66,7 +65,6 @@
memcpy(packet, &response_header, sizeof(response_header));
packet += sizeof(response_header);
/* Write response */
- fastboot_response("INFO", response, "%s", msg);
memcpy(packet, response, strlen(response));
packet += strlen(response);
@@ -91,6 +89,7 @@
static void fastboot_timed_send_info(const char *msg)
{
static ulong start;
+ char response[FASTBOOT_RESPONSE_LEN] = {0};
/* Initialize timer */
if (start == 0)
@@ -99,7 +98,8 @@
/* Send INFO packet to host every 30 seconds */
if (time >= 30000) {
start = get_timer(0);
- fastboot_udp_send_info(msg);
+ fastboot_response("INFO", response, "%s", msg);
+ fastboot_udp_send_response(response);
}
}
@@ -180,6 +180,23 @@
} else {
cmd = fastboot_handle_command(command, response);
pending_command = false;
+
+ if (!strncmp(FASTBOOT_MULTIRESPONSE_START, response, 4)) {
+ while (1) {
+ /* Call handler to obtain next response */
+ fastboot_multiresponse(cmd, response);
+
+ /*
+ * Send more responses or break to send
+ * final OKAY/FAIL response
+ */
+ if (strncmp("OKAY", response, 4) &&
+ strncmp("FAIL", response, 4))
+ fastboot_udp_send_response(response);
+ else
+ break;
+ }
+ }
}
/*
* Sent some INFO packets, need to update sequence number in
diff --git a/net/link_local.h b/net/link_local.h
index bb99816..d870125 100644
--- a/net/link_local.h
+++ b/net/link_local.h
@@ -10,15 +10,12 @@
* Licensed under the GPL v2 or later
*/
-#if defined(CONFIG_CMD_LINK_LOCAL)
-
#ifndef __LINK_LOCAL_H__
#define __LINK_LOCAL_H__
-#include <common.h>
+struct arp_hdr;
void link_local_receive_arp(struct arp_hdr *arp, int len);
void link_local_start(void);
#endif /* __LINK_LOCAL_H__ */
-#endif
diff --git a/net/net_rand.h b/net/net_rand.h
index 6a52cda..d3c5559 100644
--- a/net/net_rand.h
+++ b/net/net_rand.h
@@ -9,7 +9,6 @@
#ifndef __NET_RAND_H__
#define __NET_RAND_H__
-#include <common.h>
#include <dm/uclass.h>
#include <rng.h>
diff --git a/net/ping.h b/net/ping.h
index 7b6f4e5..76ac225 100644
--- a/net/ping.h
+++ b/net/ping.h
@@ -12,7 +12,6 @@
#ifndef __PING_H__
#define __PING_H__
-#include <common.h>
#include <net.h>
/*
diff --git a/net/tftp.c b/net/tftp.c
index 88e71e6..2e33541 100644
--- a/net/tftp.c
+++ b/net/tftp.c
@@ -302,12 +302,10 @@
time_start * 1000, "/s");
}
puts("\ndone\n");
- if (IS_ENABLED(CONFIG_CMD_BOOTEFI)) {
- if (!tftp_put_active)
- efi_set_bootdev("Net", "", tftp_filename,
- map_sysmem(tftp_load_addr, 0),
- net_boot_file_size);
- }
+ if (!tftp_put_active)
+ efi_set_bootdev("Net", "", tftp_filename,
+ map_sysmem(tftp_load_addr, 0),
+ net_boot_file_size);
net_set_state(NETLOOP_SUCCESS);
}
diff --git a/net/wget.c b/net/wget.c
index 6ae2237..817c5eb 100644
--- a/net/wget.c
+++ b/net/wget.c
@@ -19,6 +19,9 @@
DECLARE_GLOBAL_DATA_PTR;
+/* The default, change with environment variable 'httpdstp' */
+#define SERVER_PORT 80
+
static const char bootfile1[] = "GET ";
static const char bootfile3[] = " HTTP/1.0\r\n\r\n";
static const char http_eom[] = "\r\n\r\n";
@@ -134,19 +137,22 @@
int len = retry_len;
unsigned int tcp_ack_num = retry_tcp_seq_num + (len == 0 ? 1 : len);
unsigned int tcp_seq_num = retry_tcp_ack_num;
+ unsigned int server_port;
uchar *ptr, *offset;
+ server_port = env_get_ulong("httpdstp", 10, SERVER_PORT) & 0xffff;
+
switch (current_wget_state) {
case WGET_CLOSED:
debug_cond(DEBUG_WGET, "wget: send SYN\n");
current_wget_state = WGET_CONNECTING;
- net_send_tcp_packet(0, SERVER_PORT, our_port, action,
+ net_send_tcp_packet(0, server_port, our_port, action,
tcp_seq_num, tcp_ack_num);
packets = 0;
break;
case WGET_CONNECTING:
pkt_q_idx = 0;
- net_send_tcp_packet(0, SERVER_PORT, our_port, action,
+ net_send_tcp_packet(0, server_port, our_port, action,
tcp_seq_num, tcp_ack_num);
ptr = net_tx_packet + net_eth_hdr_size() +
@@ -161,14 +167,14 @@
memcpy(offset, &bootfile3, strlen(bootfile3));
offset += strlen(bootfile3);
- net_send_tcp_packet((offset - ptr), SERVER_PORT, our_port,
+ net_send_tcp_packet((offset - ptr), server_port, our_port,
TCP_PUSH, tcp_seq_num, tcp_ack_num);
current_wget_state = WGET_CONNECTED;
break;
case WGET_CONNECTED:
case WGET_TRANSFERRING:
case WGET_TRANSFERRED:
- net_send_tcp_packet(0, SERVER_PORT, our_port, action,
+ net_send_tcp_packet(0, server_port, our_port, action,
tcp_seq_num, tcp_ack_num);
break;
}
diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib
index 8dc6ec8..1ca8419 100644
--- a/scripts/Makefile.lib
+++ b/scripts/Makefile.lib
@@ -339,7 +339,12 @@
$(shell sed "s:ESL_BIN_FILE:$(capsule_esl_path):" $(capsule_esl_input_file) > $@)
$(obj)/.capsule_esl.dtsi: FORCE
+ifeq ($(CONFIG_EFI_CAPSULE_ESL_FILE),"")
+ $(error "CONFIG_EFI_CAPSULE_ESL_FILE is empty, EFI capsule authentication \
+ public key must be specified when CONFIG_EFI_CAPSULE_AUTHENTICATE is enabled")
+else
$(call cmd_capsule_esl_gen)
+endif
capsule_esl_input_file=$(srctree)/lib/efi_loader/capsule_esl.dtsi.in
capsule_esl_dtsi = .capsule_esl.dtsi
@@ -630,8 +635,19 @@
fdtgrep_props := -b bootph-all -b bootph-pre-ram $(migrate_spl)
endif
endif
+
+# This rule produces the .dtb for an SPL build.
+#
+# The first fdtgrep keeps nodes with the above properties (with -u ensuring that
+# the properties are implied in all parents of a matching node). The root node
+# is always included, along with /chosen and /config nodes. Referenced aliases
+# (i.e. properties in /aliases which point to an incldued node) are also
+# included.
+#
+# The second fdtgrep removes all bootph properties along with unused strings
+# and any properties in CONFIG_OF_SPL_REMOVE_PROPS
quiet_cmd_fdtgrep = FDTGREP $@
- cmd_fdtgrep = $(objtree)/tools/fdtgrep $(fdtgrep_props) -RT $< \
+ cmd_fdtgrep = $(objtree)/tools/fdtgrep $(fdtgrep_props) -u -RT $< \
-n /chosen -n /config -O dtb | \
$(objtree)/tools/fdtgrep -r -O dtb - -o $@ \
-P bootph-all -P bootph-pre-ram -P bootph-pre-sram \
diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl
index e450ffd..407fc52 100644
--- a/scripts/Makefile.spl
+++ b/scripts/Makefile.spl
@@ -314,7 +314,7 @@
# - we have either OF_SEPARATE or OF_HOSTFILE
build_dtb :=
ifneq ($(CONFIG_$(SPL_TPL_)OF_REAL),)
-ifeq ($(CONFIG_OF_SEPARATE)$(CONFIG_SANDBOX),y)
+ifneq ($(CONFIG_OF_SEPARATE)$(CONFIG_SANDBOX),)
build_dtb := y
endif
endif
diff --git a/scripts/get_maintainer.pl b/scripts/get_maintainer.pl
index 6c58578..71cf18c 100755
--- a/scripts/get_maintainer.pl
+++ b/scripts/get_maintainer.pl
@@ -80,7 +80,7 @@
my %commit_signer_hash;
my @penguin_chief = ();
-push(@penguin_chief, "Tom Rini:trini\@konsulko.com");
+push(@penguin_chief, "Tom RINI:trini\@konsulko.com");
my @penguin_chief_names = ();
foreach my $chief (@penguin_chief) {
diff --git a/scripts/kconfig/Makefile b/scripts/kconfig/Makefile
index 2d97aab..5ce5845 100644
--- a/scripts/kconfig/Makefile
+++ b/scripts/kconfig/Makefile
@@ -93,7 +93,8 @@
endif
%_defconfig: $(obj)/conf
- $(Q)$< $(silent) --defconfig=arch/$(SRCARCH)/configs/$@ $(Kconfig)
+ $(Q)$(CPP) -nostdinc -I $(srctree) -undef -x assembler-with-cpp $(srctree)/arch/$(SRCARCH)/configs/$@ -o generated_defconfig
+ $(Q)$< $(silent) --defconfig=generated_defconfig $(Kconfig)
# Added for U-Boot (backward compatibility)
%_config: %_defconfig
diff --git a/scripts/make_pip.sh b/scripts/make_pip.sh
index 4602dcf..d2639ff 100755
--- a/scripts/make_pip.sh
+++ b/scripts/make_pip.sh
@@ -29,6 +29,9 @@
# Non-empty to do the actual upload
upload=1
+# Non-empty to delete files used for testing
+delete_testfiles=1
+
tool="$1"
shift
flags="$*"
@@ -36,7 +39,7 @@
if [[ "${tool}" =~ ^(patman|buildman|dtoc|binman|u_boot_pylib)$ ]]; then
echo "Building dist package for tool ${tool}"
else
- echo "Unknown tool ${tool}: use patman, buildman, dtoc or binman"
+ echo "Unknown tool ${tool}: use u_boot_pylib, patman, buildman, dtoc or binman"
exit 1
fi
@@ -58,6 +61,11 @@
fi
fi
+if [[ "${tool}" =~ ^(patman|u_boot_pylib)$ ]]; then
+ # Leave test_util.py and patman test files alone
+ delete_testfiles=
+fi
+
# Create a temp dir to work in
dir=$(mktemp -d)
@@ -91,7 +99,9 @@
find ${dest} -depth -name __pycache__ -exec rmdir 112 \;
# Remove test files
-rm -rf ${dest}/*test*
+if [ -n "${delete_testfiles}" ]; then
+ rm -rfv ${dest}/*test*
+fi
mkdir ${dir}/tests
cd ${dir}
diff --git a/test/Kconfig b/test/Kconfig
index c3db727..e2ec099 100644
--- a/test/Kconfig
+++ b/test/Kconfig
@@ -32,6 +32,7 @@
config UT_LIB_ASN1
bool "Unit test for asn1 compiler and decoder function"
+ depends on SANDBOX
default y
imply ASYMMETRIC_KEY_TYPE
imply ASYMMETRIC_PUBLIC_KEY_SUBTYPE
@@ -64,6 +65,11 @@
endif
+config UT_BOOTSTD
+ bool "Unit tests for standard boot"
+ depends on UNIT_TEST && BOOTSTD && SANDBOX
+ default y
+
config UT_COMPRESSION
bool "Unit test for compression"
depends on UNIT_TEST
diff --git a/test/Makefile b/test/Makefile
index 8e1fed2..ed312cd 100644
--- a/test/Makefile
+++ b/test/Makefile
@@ -17,13 +17,16 @@
ifndef CONFIG_SANDBOX_VPL
obj-$(CONFIG_UNIT_TEST) += lib/
endif
+ifneq ($(CONFIG_HUSH_PARSER),)
+obj-$(CONFIG_$(SPL_)CMDLINE) += hush/
+endif
obj-$(CONFIG_$(SPL_)CMDLINE) += print_ut.o
obj-$(CONFIG_$(SPL_)CMDLINE) += str_ut.o
obj-$(CONFIG_UT_TIME) += time_ut.o
obj-y += ut.o
ifeq ($(CONFIG_SPL_BUILD),)
-obj-$(CONFIG_UNIT_TEST) += boot/
+obj-y += boot/
obj-$(CONFIG_UNIT_TEST) += common/
obj-y += log/
obj-$(CONFIG_$(SPL_)UT_UNICODE) += unicode_ut.o
diff --git a/test/bloblist.c b/test/bloblist.c
index 720be7e..17d9dd0 100644
--- a/test/bloblist.c
+++ b/test/bloblist.c
@@ -72,15 +72,15 @@
hdr = clear_bloblist();
ut_asserteq(-ENOENT, bloblist_check(TEST_ADDR, TEST_BLOBLIST_SIZE));
ut_asserteq_ptr(NULL, bloblist_check_magic(TEST_ADDR));
- ut_assertok(bloblist_new(TEST_ADDR, TEST_BLOBLIST_SIZE, 0));
+ ut_assertok(bloblist_new(TEST_ADDR, TEST_BLOBLIST_SIZE, 0, 0));
ut_asserteq_ptr(hdr, bloblist_check_magic(TEST_ADDR));
hdr->version++;
ut_asserteq(-EPROTONOSUPPORT, bloblist_check(TEST_ADDR,
TEST_BLOBLIST_SIZE));
- ut_asserteq(-ENOSPC, bloblist_new(TEST_ADDR, 0x10, 0));
- ut_asserteq(-EFAULT, bloblist_new(1, TEST_BLOBLIST_SIZE, 0));
- ut_assertok(bloblist_new(TEST_ADDR, TEST_BLOBLIST_SIZE, 0));
+ ut_asserteq(-ENOSPC, bloblist_new(TEST_ADDR, 0xc, 0, 0));
+ ut_asserteq(-EFAULT, bloblist_new(1, TEST_BLOBLIST_SIZE, 0, 0));
+ ut_assertok(bloblist_new(TEST_ADDR, TEST_BLOBLIST_SIZE, 0, 0));
ut_asserteq(-EIO, bloblist_check(TEST_ADDR, TEST_BLOBLIST_SIZE));
ut_assertok(bloblist_finish());
@@ -106,8 +106,9 @@
/* At the start there should be no records */
hdr = clear_bloblist();
ut_assertnull(bloblist_find(TEST_TAG, TEST_BLOBLIST_SIZE));
- ut_assertok(bloblist_new(TEST_ADDR, TEST_BLOBLIST_SIZE, 0));
- ut_asserteq(TEST_BLOBLIST_SIZE, bloblist_get_size());
+ ut_assertok(bloblist_new(TEST_ADDR, TEST_BLOBLIST_SIZE, 0, 0));
+ ut_asserteq(sizeof(struct bloblist_hdr), bloblist_get_size());
+ ut_asserteq(TEST_BLOBLIST_SIZE, bloblist_get_total_size());
ut_asserteq(TEST_ADDR, bloblist_get_base());
ut_asserteq(map_to_sysmem(hdr), TEST_ADDR);
@@ -144,7 +145,7 @@
/* At the start there should be no records */
clear_bloblist();
- ut_assertok(bloblist_new(TEST_ADDR, TEST_BLOBLIST_SIZE, 0));
+ ut_assertok(bloblist_new(TEST_ADDR, TEST_BLOBLIST_SIZE, 0, 0));
/* Test with an empty bloblist */
size = TEST_SIZE;
@@ -176,7 +177,7 @@
void *data;
hdr = clear_bloblist();
- ut_assertok(bloblist_new(TEST_ADDR, TEST_BLOBLIST_SIZE, 0));
+ ut_assertok(bloblist_new(TEST_ADDR, TEST_BLOBLIST_SIZE, 0, 0));
data = hdr + 1;
data += sizeof(struct bloblist_rec);
ut_asserteq_addr(data, bloblist_ensure(TEST_TAG, TEST_SIZE));
@@ -192,7 +193,7 @@
char *data, *data2;
hdr = clear_bloblist();
- ut_assertok(bloblist_new(TEST_ADDR, TEST_BLOBLIST_SIZE, 0));
+ ut_assertok(bloblist_new(TEST_ADDR, TEST_BLOBLIST_SIZE, 0, 0));
ut_assertok(bloblist_finish());
ut_assertok(bloblist_check(TEST_ADDR, TEST_BLOBLIST_SIZE));
@@ -205,9 +206,9 @@
ut_asserteq(-EIO, bloblist_check(TEST_ADDR, TEST_BLOBLIST_SIZE));
hdr->flags++;
- hdr->size--;
+ hdr->total_size--;
ut_asserteq(-EFBIG, bloblist_check(TEST_ADDR, TEST_BLOBLIST_SIZE));
- hdr->size++;
+ hdr->total_size++;
hdr->spare++;
ut_asserteq(-EIO, bloblist_check(TEST_ADDR, TEST_BLOBLIST_SIZE));
@@ -217,6 +218,10 @@
ut_asserteq(-EIO, bloblist_check(TEST_ADDR, TEST_BLOBLIST_SIZE));
hdr->chksum--;
+ hdr->align_log2++;
+ ut_asserteq(-EIO, bloblist_check(TEST_ADDR, TEST_BLOBLIST_SIZE));
+ hdr->align_log2--;
+
/* Make sure the checksum changes when we add blobs */
data = bloblist_add(TEST_TAG, TEST_SIZE, 0);
ut_asserteq(-EIO, bloblist_check(TEST_ADDR, TEST_BLOBLIST_SIZE));
@@ -237,12 +242,18 @@
*data2 -= 1;
/*
- * Changing data outside the range of valid data should not affect
- * the checksum.
+ * Changing data outside the range of valid data should affect the
+ * checksum.
*/
ut_assertok(bloblist_check(TEST_ADDR, TEST_BLOBLIST_SIZE));
data[TEST_SIZE]++;
+ ut_asserteq(-EIO, bloblist_check(TEST_ADDR, TEST_BLOBLIST_SIZE));
+ data[TEST_SIZE]--;
+ ut_assertok(bloblist_check(TEST_ADDR, TEST_BLOBLIST_SIZE));
+
data2[TEST_SIZE2]++;
+ ut_asserteq(-EIO, bloblist_check(TEST_ADDR, TEST_BLOBLIST_SIZE));
+ data[TEST_SIZE]--;
ut_assertok(bloblist_check(TEST_ADDR, TEST_BLOBLIST_SIZE));
return 0;
@@ -256,7 +267,7 @@
char *data, *data2;
hdr = clear_bloblist();
- ut_assertok(bloblist_new(TEST_ADDR, TEST_BLOBLIST_SIZE, 0));
+ ut_assertok(bloblist_new(TEST_ADDR, TEST_BLOBLIST_SIZE, 0, 0));
data = bloblist_ensure(TEST_TAG, TEST_SIZE);
data2 = bloblist_ensure(TEST_TAG2, TEST_SIZE2);
@@ -264,10 +275,10 @@
ut_silence_console(uts);
console_record_reset();
run_command("bloblist info", 0);
- ut_assert_nextline("base: %lx", (ulong)map_to_sysmem(hdr));
- ut_assert_nextline("size: 400 1 KiB");
- ut_assert_nextline("alloced: 70 112 Bytes");
- ut_assert_nextline("free: 390 912 Bytes");
+ ut_assert_nextline("base: %lx", (ulong)map_to_sysmem(hdr));
+ ut_assert_nextline("total size: 400 1 KiB");
+ ut_assert_nextline("used size: 50 80 Bytes");
+ ut_assert_nextline("free: 3b0 944 Bytes");
ut_assert_console_end();
ut_unsilence_console(uts);
@@ -282,7 +293,7 @@
char *data, *data2;
hdr = clear_bloblist();
- ut_assertok(bloblist_new(TEST_ADDR, TEST_BLOBLIST_SIZE, 0));
+ ut_assertok(bloblist_new(TEST_ADDR, TEST_BLOBLIST_SIZE, 0, 0));
data = bloblist_ensure(TEST_TAG, TEST_SIZE);
data2 = bloblist_ensure(TEST_TAG2, TEST_SIZE2);
@@ -291,9 +302,9 @@
console_record_reset();
run_command("bloblist list", 0);
ut_assert_nextline("Address Size Tag Name");
- ut_assert_nextline("%08lx %8x 8000 SPL hand-off",
+ ut_assert_nextline("%08lx %8x fff000 SPL hand-off",
(ulong)map_to_sysmem(data), TEST_SIZE);
- ut_assert_nextline("%08lx %8x 106 Chrome OS vboot context",
+ ut_assert_nextline("%08lx %8x 202 Chrome OS vboot context",
(ulong)map_to_sysmem(data2), TEST_SIZE2);
ut_assert_console_end();
ut_unsilence_console(uts);
@@ -312,7 +323,7 @@
/* At the start there should be no records */
hdr = clear_bloblist();
- ut_assertok(bloblist_new(TEST_ADDR, TEST_BLOBLIST_SIZE, 0));
+ ut_assertok(bloblist_new(TEST_ADDR, TEST_BLOBLIST_SIZE, 0, 0));
ut_assertnull(bloblist_find(TEST_TAG, TEST_BLOBLIST_SIZE));
/* Check the default alignment */
@@ -325,18 +336,18 @@
data = bloblist_add(i, size, 0);
ut_assertnonnull(data);
addr = map_to_sysmem(data);
- ut_asserteq(0, addr & (BLOBLIST_ALIGN - 1));
+ ut_asserteq(0, addr & (BLOBLIST_BLOB_ALIGN - 1));
/* Only the bytes in the blob data should be zeroed */
for (j = 0; j < size; j++)
ut_asserteq(0, data[j]);
- for (; j < BLOBLIST_ALIGN; j++)
+ for (; j < BLOBLIST_BLOB_ALIGN; j++)
ut_asserteq(ERASE_BYTE, data[j]);
}
/* Check larger alignment */
for (i = 0; i < 3; i++) {
- int align = 32 << i;
+ int align = 5 - i;
data = bloblist_add(3 + i, i * 4, align);
ut_assertnonnull(data);
@@ -345,16 +356,16 @@
}
/* Check alignment with an bloblist starting on a smaller alignment */
- hdr = map_sysmem(TEST_ADDR + BLOBLIST_ALIGN, TEST_BLOBLIST_SIZE);
+ hdr = map_sysmem(TEST_ADDR + BLOBLIST_BLOB_ALIGN, TEST_BLOBLIST_SIZE);
memset(hdr, ERASE_BYTE, TEST_BLOBLIST_SIZE);
memset(hdr, '\0', sizeof(*hdr));
ut_assertok(bloblist_new(TEST_ADDR + BLOBLIST_ALIGN, TEST_BLOBLIST_SIZE,
- 0));
+ 0, 0));
- data = bloblist_add(1, 5, BLOBLIST_ALIGN * 2);
+ data = bloblist_add(1, 5, BLOBLIST_ALIGN_LOG2 + 1);
ut_assertnonnull(data);
addr = map_to_sysmem(data);
- ut_asserteq(0, addr & (BLOBLIST_ALIGN * 2 - 1));
+ ut_asserteq(0, addr & (BLOBLIST_BLOB_ALIGN * 2 - 1));
return 0;
}
@@ -370,7 +381,7 @@
ulong new_addr;
ulong new_size;
- ut_assertok(bloblist_new(TEST_ADDR, TEST_BLOBLIST_SIZE, 0));
+ ut_assertok(bloblist_new(TEST_ADDR, TEST_BLOBLIST_SIZE, 0, 0));
old_ptr = map_sysmem(TEST_ADDR, TEST_BLOBLIST_SIZE);
/* Add one blob and then one that won't fit */
@@ -409,7 +420,7 @@
memset(hdr, ERASE_BYTE, TEST_BLOBLIST_SIZE);
/* Create two blobs */
- ut_assertok(bloblist_new(TEST_ADDR, TEST_BLOBLIST_SIZE, 0));
+ ut_assertok(bloblist_new(TEST_ADDR, TEST_BLOBLIST_SIZE, 0, 0));
blob1 = bloblist_add(TEST_TAG, small_size, 0);
ut_assertnonnull(blob1);
ut_assertok(check_zero(blob1, small_size));
@@ -421,7 +432,7 @@
ut_asserteq(sizeof(struct bloblist_hdr) +
sizeof(struct bloblist_rec) * 2 + small_size * 2,
- hdr->alloced);
+ hdr->used_size);
/* Resize the first one */
ut_assertok(bloblist_resize(TEST_TAG, small_size + 4));
@@ -442,8 +453,8 @@
hdr = ptr;
ut_asserteq(sizeof(struct bloblist_hdr) +
sizeof(struct bloblist_rec) * 2 + small_size * 2 +
- BLOBLIST_ALIGN,
- hdr->alloced);
+ BLOBLIST_BLOB_ALIGN,
+ hdr->used_size);
return 0;
}
@@ -461,7 +472,7 @@
ptr = map_sysmem(TEST_ADDR, TEST_BLOBLIST_SIZE);
/* Create two blobs */
- ut_assertok(bloblist_new(TEST_ADDR, TEST_BLOBLIST_SIZE, 0));
+ ut_assertok(bloblist_new(TEST_ADDR, TEST_BLOBLIST_SIZE, 0, 0));
blob1 = bloblist_add(TEST_TAG, small_size, 0);
ut_assertnonnull(blob1);
strcpy(blob1, test1_str);
@@ -473,7 +484,7 @@
hdr = ptr;
ut_asserteq(sizeof(struct bloblist_hdr) +
sizeof(struct bloblist_rec) * 2 + small_size * 2,
- hdr->alloced);
+ hdr->used_size);
/* Resize the first one */
new_size = small_size - BLOBLIST_ALIGN - 4;
@@ -493,7 +504,7 @@
ut_asserteq(sizeof(struct bloblist_hdr) +
sizeof(struct bloblist_rec) * 2 + small_size * 2 -
BLOBLIST_ALIGN,
- hdr->alloced);
+ hdr->used_size);
return 0;
}
@@ -511,7 +522,7 @@
ptr = map_sysmem(TEST_ADDR, TEST_BLOBLIST_SIZE);
/* Create two blobs */
- ut_assertok(bloblist_new(TEST_ADDR, TEST_BLOBLIST_SIZE, 0));
+ ut_assertok(bloblist_new(TEST_ADDR, TEST_BLOBLIST_SIZE, 0, 0));
blob1 = bloblist_add(TEST_TAG, small_size, 0);
ut_assertnonnull(blob1);
@@ -521,12 +532,12 @@
hdr = ptr;
ut_asserteq(sizeof(struct bloblist_hdr) +
sizeof(struct bloblist_rec) * 2 + small_size * 2,
- hdr->alloced);
+ hdr->used_size);
/* Resize the first one, to check the boundary conditions */
ut_asserteq(-EINVAL, bloblist_resize(TEST_TAG, -1));
- new_size = small_size + (hdr->size - hdr->alloced);
+ new_size = small_size + (hdr->total_size - hdr->used_size);
ut_asserteq(-ENOSPC, bloblist_resize(TEST_TAG, new_size + 1));
ut_assertok(bloblist_resize(TEST_TAG, new_size));
@@ -548,7 +559,7 @@
hdr = ptr;
/* Create two blobs */
- ut_assertok(bloblist_new(TEST_ADDR, TEST_BLOBLIST_SIZE, 0));
+ ut_assertok(bloblist_new(TEST_ADDR, TEST_BLOBLIST_SIZE, 0, 0));
blob1 = bloblist_add(TEST_TAG, small_size, 0);
ut_assertnonnull(blob1);
@@ -558,9 +569,9 @@
/* Check the byte after the last blob */
alloced_val = sizeof(struct bloblist_hdr) +
sizeof(struct bloblist_rec) * 2 + small_size * 2;
- ut_asserteq(alloced_val, hdr->alloced);
+ ut_asserteq(alloced_val, hdr->used_size);
ut_asserteq_ptr((void *)hdr + alloced_val, blob2 + small_size);
- ut_asserteq((u8)ERASE_BYTE, *((u8 *)hdr + hdr->alloced));
+ ut_asserteq((u8)ERASE_BYTE, *((u8 *)hdr + hdr->used_size));
/* Resize the second one, checking nothing changes */
ut_asserteq(0, bloblist_resize(TEST_TAG2, small_size + 4));
@@ -577,9 +588,9 @@
ut_asserteq((u8)ERASE_BYTE, *((u8 *)hdr + alloced_val + 4));
/* Check that the new top of the allocated blobs has not been touched */
- alloced_val += BLOBLIST_ALIGN;
- ut_asserteq(alloced_val, hdr->alloced);
- ut_asserteq((u8)ERASE_BYTE, *((u8 *)hdr + hdr->alloced));
+ alloced_val += BLOBLIST_BLOB_ALIGN;
+ ut_asserteq(alloced_val, hdr->used_size);
+ ut_asserteq((u8)ERASE_BYTE, *((u8 *)hdr + hdr->used_size));
return 0;
}
@@ -593,7 +604,7 @@
/* At the start there should be no records */
clear_bloblist();
- ut_assertok(bloblist_new(TEST_ADDR, TEST_BLOBLIST_SIZE, 0));
+ ut_assertok(bloblist_new(TEST_ADDR, TEST_BLOBLIST_SIZE, 0, 0));
/* Add a blob that takes up all space */
size = TEST_BLOBLIST_SIZE - sizeof(struct bloblist_hdr) -
diff --git a/test/boot/bootflow.c b/test/boot/bootflow.c
index b97c566..fa54dde 100644
--- a/test/boot/bootflow.c
+++ b/test/boot/bootflow.c
@@ -374,7 +374,7 @@
{
struct udevice *bootstd, *dev;
- if (!IS_ENABLED(CONFIG_CMD_BOOTEFI_BOOTMGR))
+ if (!IS_ENABLED(CONFIG_EFI_BOOTMGR))
return -EAGAIN;
ut_assertok(uclass_first_device_err(UCLASS_BOOTSTD, &bootstd));
ut_assertok(device_bind(bootstd, DM_DRIVER_GET(bootmeth_efi_mgr),
@@ -637,6 +637,102 @@
}
BOOTSTD_TEST(bootflow_cmd_menu, UT_TESTF_DM | UT_TESTF_SCAN_FDT);
+/* Check 'bootflow scan -m' to select a bootflow using a menu */
+static int bootflow_scan_menu(struct unit_test_state *uts)
+{
+ struct bootstd_priv *std;
+ const char **old_order, **new_order;
+ char prev[3];
+
+ /* get access to the current bootflow */
+ ut_assertok(bootstd_get_priv(&std));
+
+ ut_assertok(prep_mmc_bootdev(uts, "mmc4", false, &old_order));
+
+ /* Add keypresses to move to and select the second one in the list */
+ prev[0] = CTL_CH('n');
+ prev[1] = '\r';
+ prev[2] = '\0';
+ ut_asserteq(2, console_in_puts(prev));
+
+ ut_assertok(run_command("bootflow scan -lm", 0));
+ new_order = std->bootdev_order;
+ std->bootdev_order = old_order;
+
+ ut_assert_skip_to_line("No more bootdevs");
+ ut_assert_nextlinen("--");
+ ut_assert_nextline("(2 bootflows, 2 valid)");
+
+ ut_assert_nextline("Selected: Armbian");
+ ut_assertnonnull(std->cur_bootflow);
+ ut_assert_console_end();
+
+ /* Check not selecting anything */
+ prev[0] = '\e';
+ prev[1] = '\0';
+ ut_asserteq(1, console_in_puts(prev));
+
+ std->bootdev_order = new_order; /* Blue Monday */
+ ut_assertok(run_command("bootflow scan -lm", 0));
+ std->bootdev_order = old_order;
+
+ ut_assertnull(std->cur_bootflow);
+ ut_assert_skip_to_line("(2 bootflows, 2 valid)");
+ ut_assert_nextline("Nothing chosen");
+ ut_assert_console_end();
+
+ return 0;
+}
+BOOTSTD_TEST(bootflow_scan_menu,
+ UT_TESTF_DM | UT_TESTF_SCAN_FDT | UT_TESTF_CONSOLE_REC);
+
+/* Check 'bootflow scan -mb' to select and boot a bootflow using a menu */
+static int bootflow_scan_menu_boot(struct unit_test_state *uts)
+{
+ struct bootstd_priv *std;
+ const char **old_order;
+ char prev[3];
+
+ /* get access to the current bootflow */
+ ut_assertok(bootstd_get_priv(&std));
+
+ ut_assertok(prep_mmc_bootdev(uts, "mmc4", false, &old_order));
+
+ /* Add keypresses to move to and select the second one in the list */
+ prev[0] = CTL_CH('n');
+ prev[1] = '\r';
+ prev[2] = '\0';
+ ut_asserteq(2, console_in_puts(prev));
+
+ ut_assertok(run_command("bootflow scan -lmb", 0));
+ std->bootdev_order = old_order;
+
+ ut_assert_skip_to_line("(2 bootflows, 2 valid)");
+
+ ut_assert_nextline("Selected: Armbian");
+
+ if (gd->flags & GD_FLG_HUSH_OLD_PARSER) {
+ /*
+ * With old hush, despite booti failing to boot, i.e. returning
+ * CMD_RET_FAILURE, run_command() returns 0 which leads bootflow_boot(), as
+ * we are using bootmeth_script here, to return -EFAULT.
+ */
+ ut_assert_skip_to_line("Boot failed (err=-14)");
+ } else if (gd->flags & GD_FLG_HUSH_MODERN_PARSER) {
+ /*
+ * While with modern one, run_command() propagates CMD_RET_FAILURE returned
+ * by booti, so we get 1 here.
+ */
+ ut_assert_skip_to_line("Boot failed (err=1)");
+ }
+ ut_assertnonnull(std->cur_bootflow);
+ ut_assert_console_end();
+
+ return 0;
+}
+BOOTSTD_TEST(bootflow_scan_menu_boot,
+ UT_TESTF_DM | UT_TESTF_SCAN_FDT | UT_TESTF_CONSOLE_REC);
+
/* Check searching for a single bootdev using the hunters */
static int bootflow_cmd_hunt_single(struct unit_test_state *uts)
{
@@ -1013,6 +1109,10 @@
ut_asserteq(0, run_command("bootflow cmdline get mary", 0));
ut_assert_nextline_empty();
+ ut_asserteq(0, run_command("bootflow cmdline set mary abc", 0));
+ ut_asserteq(0, run_command("bootflow cmdline set mary", 0));
+ ut_assert_nextline_empty();
+
ut_assert_console_end();
return 0;
diff --git a/test/cmd/Makefile b/test/cmd/Makefile
index e296ba1..478ef4c 100644
--- a/test/cmd/Makefile
+++ b/test/cmd/Makefile
@@ -3,6 +3,8 @@
# Copyright (c) 2013 Google, Inc
# Copyright 2022-2023 Arm Limited and/or its affiliates <open-source-office@arm.com>
+obj-y += cmd_ut_cmd.o
+
ifdef CONFIG_HUSH_PARSER
obj-$(CONFIG_CONSOLE_RECORD) += test_echo.o
endif
@@ -17,6 +19,7 @@
obj-$(CONFIG_CMD_HISTORY) += history.o
obj-$(CONFIG_CMD_LOADM) += loadm.o
obj-$(CONFIG_CMD_MEM_SEARCH) += mem_search.o
+obj-$(CONFIG_CMD_MEMORY) += mem_copy.o
ifdef CONFIG_CMD_PCI
obj-$(CONFIG_CMD_PCI_MPS) += pci_mps.o
endif
diff --git a/test/cmd/bdinfo.c b/test/cmd/bdinfo.c
index 8c09281..4977d01 100644
--- a/test/cmd/bdinfo.c
+++ b/test/cmd/bdinfo.c
@@ -114,6 +114,18 @@
end = base + size - 1;
flags = rgn->region[i].flags;
+ /*
+ * this entry includes the stack (get_sp()) on many platforms
+ * so will different each time lmb_init_and_reserve() is called.
+ * We could instead have the bdinfo command put its lmb region
+ * in a known location, so we can check it directly, rather than
+ * calling lmb_init_and_reserve() to create a new (and hopefully
+ * identical one). But for now this seems good enough.
+ */
+ if (!IS_ENABLED(CONFIG_SANDBOX) && i == 3) {
+ ut_assert_nextlinen(" %s[%d]\t[", name, i);
+ continue;
+ }
ut_assert_nextline(" %s[%d]\t[0x%llx-0x%llx], 0x%08llx bytes flags: %x",
name, i, base, end, size, flags);
}
@@ -124,23 +136,17 @@
static int lmb_test_dump_all(struct unit_test_state *uts, struct lmb *lmb)
{
ut_assert_nextline("lmb_dump_all:");
- lmb_test_dump_region(uts, &lmb->memory, "memory");
- lmb_test_dump_region(uts, &lmb->reserved, "reserved");
+ ut_assertok(lmb_test_dump_region(uts, &lmb->memory, "memory"));
+ ut_assertok(lmb_test_dump_region(uts, &lmb->reserved, "reserved"));
return 0;
}
-static int bdinfo_test_move(struct unit_test_state *uts)
+static int bdinfo_check_mem(struct unit_test_state *uts)
{
struct bd_info *bd = gd->bd;
int i;
- /* Test moving the working BDINFO to a new location */
- ut_assertok(console_record_reset_enable());
- ut_assertok(run_commandf("bdinfo"));
-
- ut_assertok(test_num_l(uts, "boot_params", 0));
-
for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) {
if (bd->bi_dram[i].size) {
ut_assertok(test_num_l(uts, "DRAM bank", i));
@@ -151,6 +157,15 @@
}
}
+ return 0;
+}
+
+static int bdinfo_test_all(struct unit_test_state *uts)
+{
+ ut_assertok(test_num_l(uts, "boot_params", 0));
+
+ ut_assertok(bdinfo_check_mem(uts));
+
/* CONFIG_SYS_HAS_SRAM testing not supported */
ut_assertok(test_num_l(uts, "flashstart", 0));
ut_assertok(test_num_l(uts, "flashsize", 0));
@@ -176,7 +191,7 @@
ut_assertok(test_num_l(uts, "fdt_size", (ulong)gd->fdt_size));
if (IS_ENABLED(CONFIG_VIDEO))
- test_video_info(uts);
+ ut_assertok(test_video_info(uts));
/* The gd->multi_dtb_fit may not be available, hence, #if below. */
#if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
@@ -187,7 +202,7 @@
struct lmb lmb;
lmb_init_and_reserve(&lmb, gd->bd, (void *)gd->fdt_blob);
- lmb_test_dump_all(uts, &lmb);
+ ut_assertok(lmb_test_dump_all(uts, &lmb));
if (IS_ENABLED(CONFIG_OF_REAL))
ut_assert_nextline("devicetree = %s", fdtdec_get_srcname());
}
@@ -212,12 +227,80 @@
ut_assertok(test_num_l(uts, "malloc base", gd_malloc_start()));
}
+ if (IS_ENABLED(CONFIG_X86))
+ ut_check_skip_to_linen(uts, " high end =");
+
+ return 0;
+}
+
+static int bdinfo_test_full(struct unit_test_state *uts)
+{
+ /* Test BDINFO full print */
+ ut_assertok(console_record_reset_enable());
+ ut_assertok(run_commandf("bdinfo"));
+ ut_assertok(bdinfo_test_all(uts));
+ ut_assertok(run_commandf("bdinfo -a"));
+ ut_assertok(bdinfo_test_all(uts));
ut_assertok(ut_check_console_end(uts));
return 0;
}
-BDINFO_TEST(bdinfo_test_move, UT_TESTF_CONSOLE_REC);
+BDINFO_TEST(bdinfo_test_full, UT_TESTF_CONSOLE_REC);
+
+static int bdinfo_test_help(struct unit_test_state *uts)
+{
+ /* Test BDINFO unknown option help text print */
+ ut_assertok(console_record_reset_enable());
+ if (!CONFIG_IS_ENABLED(GETOPT)) {
+ ut_asserteq(0, run_commandf("bdinfo -h"));
+ ut_assertok(bdinfo_test_all(uts));
+ } else {
+ ut_asserteq(1, run_commandf("bdinfo -h"));
+ ut_assert_nextlinen("bdinfo: invalid option -- h");
+ ut_assert_nextlinen("bdinfo - print Board Info structure");
+ ut_assert_nextline_empty();
+ ut_assert_nextlinen("Usage:");
+ ut_assert_nextlinen("bdinfo");
+ }
+ ut_assertok(ut_check_console_end(uts));
+
+ return 0;
+}
+
+BDINFO_TEST(bdinfo_test_help, UT_TESTF_CONSOLE_REC);
+
+static int bdinfo_test_memory(struct unit_test_state *uts)
+{
+ /* Test BDINFO memory layout only print */
+ ut_assertok(console_record_reset_enable());
+ ut_assertok(run_commandf("bdinfo -m"));
+ if (!CONFIG_IS_ENABLED(GETOPT))
+ ut_assertok(bdinfo_test_all(uts));
+ else
+ ut_assertok(bdinfo_check_mem(uts));
+ ut_assertok(ut_check_console_end(uts));
+
+ return 0;
+}
+
+BDINFO_TEST(bdinfo_test_memory, UT_TESTF_CONSOLE_REC);
+
+static int bdinfo_test_eth(struct unit_test_state *uts)
+{
+ /* Test BDINFO ethernet settings only print */
+ ut_assertok(console_record_reset_enable());
+ ut_assertok(run_commandf("bdinfo -e"));
+ if (!CONFIG_IS_ENABLED(GETOPT))
+ ut_assertok(bdinfo_test_all(uts));
+ else if (IS_ENABLED(CONFIG_CMD_NET))
+ ut_assertok(test_eth(uts));
+ ut_assertok(ut_check_console_end(uts));
+
+ return 0;
+}
+
+BDINFO_TEST(bdinfo_test_eth, UT_TESTF_CONSOLE_REC);
int do_ut_bdinfo(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
{
diff --git a/test/cmd/cmd_ut_cmd.c b/test/cmd/cmd_ut_cmd.c
new file mode 100644
index 0000000..e77fa1c
--- /dev/null
+++ b/test/cmd/cmd_ut_cmd.c
@@ -0,0 +1,20 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright 2023 Google LLC
+ * Written by Simon Glass <sjg@chromium.org>
+ *
+ * Unit tests for command functions
+ */
+
+#include <command.h>
+#include <test/cmd.h>
+#include <test/suites.h>
+#include <test/ut.h>
+
+int do_ut_cmd(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
+{
+ struct unit_test *tests = UNIT_TEST_SUITE_START(cmd_test);
+ const int n_ents = UNIT_TEST_SUITE_COUNT(cmd_test);
+
+ return cmd_ut_category("cmd", "cmd_test_", tests, n_ents, argc, argv);
+}
diff --git a/test/cmd/fdt.c b/test/cmd/fdt.c
index 1f103a1..5470855 100644
--- a/test/cmd/fdt.c
+++ b/test/cmd/fdt.c
@@ -160,7 +160,13 @@
set_working_fdt_addr(0);
ut_assert_nextline("Working FDT set to 0");
ut_asserteq(CMD_RET_FAILURE, run_command("fdt addr", 0));
- ut_assert_nextline("libfdt fdt_check_header(): FDT_ERR_BADMAGIC");
+
+ /*
+ * sandbox fails the check for !blob since the 0 pointer is mapped to
+ * memory somewhere other than at 0x0
+ */
+ if (IS_ENABLED(CONFIG_SANDBOX))
+ ut_assert_nextline("libfdt fdt_check_header(): FDT_ERR_BADMAGIC");
ut_assertok(ut_check_console_end(uts));
/* Set up a working FDT and try again */
diff --git a/test/cmd/font.c b/test/cmd/font.c
index 40682e5..1fe05c1 100644
--- a/test/cmd/font.c
+++ b/test/cmd/font.c
@@ -30,13 +30,17 @@
ut_assertok(console_record_reset_enable());
ut_assertok(run_command("font list", 0));
ut_assert_nextline("nimbus_sans_l_regular");
- ut_assert_nextline("cantoraone_regular");
+ if (IS_ENABLED(CONFIG_CONSOLE_TRUETYPE_CANTORAONE))
+ ut_assert_nextline("cantoraone_regular");
ut_assertok(ut_check_console_end(uts));
ut_assertok(vidconsole_get_font_size(dev, &name, &size));
ut_asserteq_str("nimbus_sans_l_regular", name);
ut_asserteq(18, size);
+ if (!IS_ENABLED(CONFIG_CONSOLE_TRUETYPE_CANTORAONE))
+ return 0;
+
max_metrics = 1;
if (IS_ENABLED(CONFIG_CONSOLE_TRUETYPE))
max_metrics = IF_ENABLED_INT(CONFIG_CONSOLE_TRUETYPE,
diff --git a/test/cmd/mem_copy.c b/test/cmd/mem_copy.c
new file mode 100644
index 0000000..1ba0ceb
--- /dev/null
+++ b/test/cmd/mem_copy.c
@@ -0,0 +1,168 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Tests for memory 'cp' command
+ */
+
+#include <command.h>
+#include <console.h>
+#include <mapmem.h>
+#include <dm/test.h>
+#include <test/ut.h>
+
+#define BUF_SIZE 256
+
+/* Declare a new mem test */
+#define MEM_TEST(_name) UNIT_TEST(_name, 0, mem_test)
+
+struct param {
+ int d, s, count;
+};
+
+static int do_test(struct unit_test_state *uts,
+ const char *suffix, int d, int s, int count)
+{
+ const long addr = 0x1000;
+ u8 shadow[BUF_SIZE];
+ u8 *buf;
+ int i, w, bytes;
+
+ buf = map_sysmem(addr, BUF_SIZE);
+
+ /* Fill with distinct bytes. */
+ for (i = 0; i < BUF_SIZE; ++i)
+ buf[i] = shadow[i] = i;
+
+ /* Parameter sanity checking. */
+ w = cmd_get_data_size(suffix, 4);
+ ut_assert(w == 1 || w == 2 || w == 4 || (MEM_SUPPORT_64BIT_DATA && w == 8));
+
+ bytes = count * w;
+ ut_assert(d < BUF_SIZE);
+ ut_assert(d + bytes <= BUF_SIZE);
+ ut_assert(s < BUF_SIZE);
+ ut_assert(s + bytes <= BUF_SIZE);
+
+ /* This is exactly what we expect to happen to "buf" */
+ memmove(shadow + d, shadow + s, bytes);
+
+ run_commandf("cp%s 0x%lx 0x%lx 0x%x", suffix, addr + s, addr + d, count);
+
+ ut_asserteq(0, memcmp(buf, shadow, BUF_SIZE));
+
+ unmap_sysmem(buf);
+
+ return 0;
+}
+
+static int mem_test_cp_b(struct unit_test_state *uts)
+{
+ static const struct param tests[] = {
+ { 0, 128, 128 },
+ { 128, 0, 128 },
+ { 0, 16, 32 },
+ { 16, 0, 32 },
+ { 60, 100, 100 },
+ { 100, 60, 100 },
+ { 123, 54, 96 },
+ { 54, 123, 96 },
+ };
+ const struct param *p;
+ int ret, i;
+
+ for (i = 0; i < ARRAY_SIZE(tests); ++i) {
+ p = &tests[i];
+ ret = do_test(uts, ".b", p->d, p->s, p->count);
+ if (ret)
+ return ret;
+ }
+
+ return 0;
+}
+MEM_TEST(mem_test_cp_b);
+
+static int mem_test_cp_w(struct unit_test_state *uts)
+{
+ static const struct param tests[] = {
+ { 0, 128, 64 },
+ { 128, 0, 64 },
+ { 0, 16, 16 },
+ { 16, 0, 16 },
+ { 60, 100, 50 },
+ { 100, 60, 50 },
+ { 123, 54, 48 },
+ { 54, 123, 48 },
+ };
+ const struct param *p;
+ int ret, i;
+
+ for (i = 0; i < ARRAY_SIZE(tests); ++i) {
+ p = &tests[i];
+ ret = do_test(uts, ".w", p->d, p->s, p->count);
+ if (ret)
+ return ret;
+ }
+
+ return 0;
+}
+MEM_TEST(mem_test_cp_w);
+
+static int mem_test_cp_l(struct unit_test_state *uts)
+{
+ static const struct param tests[] = {
+ { 0, 128, 32 },
+ { 128, 0, 32 },
+ { 0, 16, 8 },
+ { 16, 0, 8 },
+ { 60, 100, 25 },
+ { 100, 60, 25 },
+ { 123, 54, 24 },
+ { 54, 123, 24 },
+ };
+ const struct param *p;
+ int ret, i;
+
+ for (i = 0; i < ARRAY_SIZE(tests); ++i) {
+ p = &tests[i];
+ ret = do_test(uts, ".l", p->d, p->s, p->count);
+ if (ret)
+ return ret;
+ }
+
+ for (i = 0; i < ARRAY_SIZE(tests); ++i) {
+ p = &tests[i];
+ ret = do_test(uts, "", p->d, p->s, p->count);
+ if (ret)
+ return ret;
+ }
+
+ return 0;
+}
+MEM_TEST(mem_test_cp_l);
+
+#if MEM_SUPPORT_64BIT_DATA
+static int mem_test_cp_q(struct unit_test_state *uts)
+{
+ static const struct param tests[] = {
+ { 0, 128, 16 },
+ { 128, 0, 16 },
+ { 0, 16, 8 },
+ { 16, 0, 8 },
+ { 60, 100, 15 },
+ { 100, 60, 15 },
+ { 123, 54, 12 },
+ { 54, 123, 12 },
+ };
+ const struct param *p;
+ int ret, i;
+
+ for (i = 0; i < ARRAY_SIZE(tests); ++i) {
+ p = &tests[i];
+ ret = do_test(uts, ".q", p->d, p->s, p->count);
+ if (ret)
+ return ret;
+ }
+
+ return 0;
+}
+MEM_TEST(mem_test_cp_q);
+#endif
diff --git a/test/cmd_ut.c b/test/cmd_ut.c
index 2d5b80f..0677ce0 100644
--- a/test/cmd_ut.c
+++ b/test/cmd_ut.c
@@ -45,7 +45,7 @@
}
ret = ut_run_list(name, prefix, tests, n_ents,
- argc > 1 ? argv[1] : NULL, runs_per_text, force_run,
+ cmd_arg1(argc, argv), runs_per_text, force_run,
test_insert);
return ret ? CMD_RET_FAILURE : 0;
@@ -57,10 +57,13 @@
#ifdef CONFIG_CMD_BDI
U_BOOT_CMD_MKENT(bdinfo, CONFIG_SYS_MAXARGS, 1, do_ut_bdinfo, "", ""),
#endif
-#ifdef CONFIG_BOOTSTD
+#ifdef CONFIG_UT_BOOTSTD
U_BOOT_CMD_MKENT(bootstd, CONFIG_SYS_MAXARGS, 1, do_ut_bootstd,
"", ""),
#endif
+#ifdef CONFIG_CMDLINE
+ U_BOOT_CMD_MKENT(cmd, CONFIG_SYS_MAXARGS, 1, do_ut_cmd, "", ""),
+#endif
U_BOOT_CMD_MKENT(common, CONFIG_SYS_MAXARGS, 1, do_ut_common, "", ""),
#if defined(CONFIG_UT_DM)
U_BOOT_CMD_MKENT(dm, CONFIG_SYS_MAXARGS, 1, do_ut_dm, "", ""),
@@ -118,6 +121,9 @@
#ifdef CONFIG_CMD_ADDRMAP
U_BOOT_CMD_MKENT(addrmap, CONFIG_SYS_MAXARGS, 1, do_ut_addrmap, "", ""),
#endif
+#if CONFIG_IS_ENABLED(HUSH_PARSER)
+ U_BOOT_CMD_MKENT(hush, CONFIG_SYS_MAXARGS, 1, do_ut_hush, "", ""),
+#endif
#ifdef CONFIG_CMD_LOADM
U_BOOT_CMD_MKENT(loadm, CONFIG_SYS_MAXARGS, 1, do_ut_loadm, "", ""),
#endif
@@ -195,6 +201,9 @@
#ifdef CONFIG_BOOTSTD
"\nbootstd - standard boot implementation"
#endif
+#ifdef CONFIG_CMDLINE
+ "\ncmd - test various commands"
+#endif
#ifdef CONFIG_SANDBOX
"\ncompression - compressors and bootm decompression"
#endif
@@ -210,6 +219,9 @@
#ifdef CONFIG_CONSOLE_TRUETYPE
"\nfont - font command"
#endif
+#if CONFIG_IS_ENABLED(HUSH_PARSER)
+ "\nhush - Test hush behavior"
+#endif
#ifdef CONFIG_CMD_LOADM
"\nloadm - loadm command parameters and loading memory blob"
#endif
diff --git a/test/common/event.c b/test/common/event.c
index c0912a3..b462694 100644
--- a/test/common/event.c
+++ b/test/common/event.c
@@ -92,6 +92,9 @@
struct test_state state;
struct udevice *dev;
+ if (!IS_ENABLED(SANDBOX))
+ return -EAGAIN;
+
state.val = 0;
ut_assertok(event_register("pre", EVT_DM_PRE_PROBE, h_probe, &state));
ut_assertok(event_register("post", EVT_DM_POST_PROBE, h_probe, &state));
diff --git a/test/dm/acpi.c b/test/dm/acpi.c
index 5997bda..c53ebcd 100644
--- a/test/dm/acpi.c
+++ b/test/dm/acpi.c
@@ -291,8 +291,8 @@
/* Check that the pointers were added correctly */
for (i = 0; i < 3; i++) {
- ut_asserteq(map_to_sysmem(dmar + i), ctx.rsdt->entry[i]);
- ut_asserteq(map_to_sysmem(dmar + i), ctx.xsdt->entry[i]);
+ ut_asserteq(nomap_to_sysmem(dmar + i), ctx.rsdt->entry[i]);
+ ut_asserteq(nomap_to_sysmem(dmar + i), ctx.xsdt->entry[i]);
}
ut_asserteq(0, ctx.rsdt->entry[3]);
ut_asserteq(0, ctx.xsdt->entry[3]);
@@ -330,7 +330,7 @@
DM_TEST(dm_test_acpi_basic, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
/* Test setup_ctx_and_base_tables */
-static int dm_test_setup_ctx_and_base_tables(struct unit_test_state *uts)
+static int dm_test_acpi_ctx_and_base_tables(struct unit_test_state *uts)
{
struct acpi_rsdp *rsdp;
struct acpi_rsdt *rsdt;
@@ -371,12 +371,12 @@
end = PTR_ALIGN((void *)xsdt + sizeof(*xsdt), 64);
ut_asserteq_ptr(end, ctx.current);
- ut_asserteq(map_to_sysmem(rsdt), rsdp->rsdt_address);
- ut_asserteq(map_to_sysmem(xsdt), rsdp->xsdt_address);
+ ut_asserteq(nomap_to_sysmem(rsdt), rsdp->rsdt_address);
+ ut_asserteq(nomap_to_sysmem(xsdt), rsdp->xsdt_address);
return 0;
}
-DM_TEST(dm_test_setup_ctx_and_base_tables,
+DM_TEST(dm_test_acpi_ctx_and_base_tables,
UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
/* Test 'acpi list' command */
@@ -395,26 +395,26 @@
console_record_reset();
run_command("acpi list", 0);
- ut_assert_nextline("Name Base Size Detail");
- ut_assert_nextline("---- -------- ----- ------");
- ut_assert_nextline("RSDP %08lx %5zx v02 U-BOOT", addr,
+ ut_assert_nextline("Name Base Size Detail");
+ ut_assert_nextline("---- ---------------- ----- ----------------------------");
+ ut_assert_nextline("RSDP %16lx %5zx v02 U-BOOT", addr,
sizeof(struct acpi_rsdp));
addr = ALIGN(addr + sizeof(struct acpi_rsdp), 16);
- ut_assert_nextline("RSDT %08lx %5zx v01 U-BOOT U-BOOTBL %x INTL 0",
+ ut_assert_nextline("RSDT %16lx %5zx v01 U-BOOT U-BOOTBL %x INTL 0",
addr, sizeof(struct acpi_table_header) +
3 * sizeof(u32), OEM_REVISION);
addr = ALIGN(addr + sizeof(struct acpi_rsdt), 16);
- ut_assert_nextline("XSDT %08lx %5zx v01 U-BOOT U-BOOTBL %x INTL 0",
+ ut_assert_nextline("XSDT %16lx %5zx v01 U-BOOT U-BOOTBL %x INTL 0",
addr, sizeof(struct acpi_table_header) +
3 * sizeof(u64), OEM_REVISION);
addr = ALIGN(addr + sizeof(struct acpi_xsdt), 64);
- ut_assert_nextline("DMAR %08lx %5zx v01 U-BOOT U-BOOTBL %x INTL 0",
+ ut_assert_nextline("DMAR %16lx %5zx v01 U-BOOT U-BOOTBL %x INTL 0",
addr, sizeof(struct acpi_dmar), OEM_REVISION);
addr = ALIGN(addr + sizeof(struct acpi_dmar), 16);
- ut_assert_nextline("DMAR %08lx %5zx v01 U-BOOT U-BOOTBL %x INTL 0",
+ ut_assert_nextline("DMAR %16lx %5zx v01 U-BOOT U-BOOTBL %x INTL 0",
addr, sizeof(struct acpi_dmar), OEM_REVISION);
addr = ALIGN(addr + sizeof(struct acpi_dmar), 16);
- ut_assert_nextline("DMAR %08lx %5zx v01 U-BOOT U-BOOTBL %x INTL 0",
+ ut_assert_nextline("DMAR %16lx %5zx v01 U-BOOT U-BOOTBL %x INTL 0",
addr, sizeof(struct acpi_dmar), OEM_REVISION);
ut_assert_console_end();
@@ -445,8 +445,8 @@
/* Now a real table */
console_record_reset();
run_command("acpi dump dmar", 0);
- addr = ALIGN(map_to_sysmem(ctx.xsdt) + sizeof(struct acpi_xsdt), 64);
- ut_assert_nextline("DMAR @ %08lx", addr);
+ addr = ALIGN(nomap_to_sysmem(ctx.xsdt) + sizeof(struct acpi_xsdt), 64);
+ ut_assert_nextline("DMAR @ %16lx", addr);
ut_assert_nextlines_are_dump(0x30);
ut_assert_console_end();
@@ -651,3 +651,109 @@
return 0;
}
DM_TEST(dm_test_acpi_cmd_set, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+
+/**
+ * dm_test_write_test_table() - create test ACPI table
+ *
+ * Create an ACPI table TSTn, where n is given by @index.
+ *
+ * @ctx: ACPI table writing context
+ * @index: table index
+ * Return: generated table
+ */
+static struct acpi_table_header
+*dm_test_write_test_table(struct acpi_ctx *ctx, int index)
+{
+ struct acpi_table_header *tbl = ctx->current;
+ char signature[5];
+
+ snprintf(signature, sizeof(signature), "TST%1d", index);
+ memset(tbl, 0, sizeof(*tbl));
+ acpi_fill_header(tbl, signature);
+ acpi_inc(ctx, sizeof(struct acpi_table_header));
+ tbl->length = (u8 *)ctx->current - (u8 *)tbl;
+ tbl->checksum = table_compute_checksum(tbl, tbl->length);
+ acpi_add_table(ctx, tbl);
+
+ return tbl;
+}
+
+/* Test acpi_find_table() */
+static int dm_test_acpi_find_table(struct unit_test_state *uts)
+{
+ struct acpi_ctx ctx;
+ ulong acpi_start, addr;
+ void *buf;
+ struct acpi_table_header *table, *table1, *table2, *table3;
+ struct acpi_rsdp *rsdp;
+ ulong rsdt;
+ ulong xsdt;
+
+ /* Keep reference to original ACPI tables */
+ acpi_start = gd_acpi_start();
+
+ /* Setup new ACPI tables */
+ buf = memalign(16, BUF_SIZE);
+ ut_assertnonnull(buf);
+ addr = map_to_sysmem(buf);
+ ut_assertok(setup_ctx_and_base_tables(uts, &ctx, addr));
+ table3 = dm_test_write_test_table(&ctx, 3);
+ table1 = dm_test_write_test_table(&ctx, 1);
+ table2 = dm_test_write_test_table(&ctx, 2);
+
+ /* Retrieve RSDP, RSDT, XSDT */
+ rsdp = map_sysmem(gd_acpi_start(), 0);
+ ut_assertnonnull(rsdp);
+ rsdt = rsdp->rsdt_address;
+ ut_assert(rsdt);
+ xsdt = rsdp->xsdt_address;
+ ut_assert(xsdt);
+
+ /* Find with both RSDT and XSDT */
+ table = acpi_find_table("TST1");
+ ut_asserteq_ptr(table1, table);
+ ut_asserteq_strn("TST1", table->signature);
+ table = acpi_find_table("TST2");
+ ut_asserteq_ptr(table2, table);
+ ut_asserteq_strn("TST2", table->signature);
+ table = acpi_find_table("TST3");
+ ut_asserteq_ptr(table3, table);
+ ut_asserteq_strn("TST3", table->signature);
+
+ /* Find with XSDT only */
+ rsdp->rsdt_address = 0;
+ table = acpi_find_table("TST1");
+ ut_asserteq_ptr(table1, table);
+ table = acpi_find_table("TST2");
+ ut_asserteq_ptr(table2, table);
+ table = acpi_find_table("TST3");
+ ut_asserteq_ptr(table3, table);
+ rsdp->rsdt_address = rsdt;
+
+ /* Find with RSDT only */
+ rsdp->xsdt_address = 0;
+ table = acpi_find_table("TST1");
+ ut_asserteq_ptr(table1, table);
+ table = acpi_find_table("TST2");
+ ut_asserteq_ptr(table2, table);
+ table = acpi_find_table("TST3");
+ ut_asserteq_ptr(table3, table);
+ rsdp->xsdt_address = xsdt;
+
+ /* Restore previous ACPI tables */
+ gd_set_acpi_start(acpi_start);
+ free(buf);
+
+ return 0;
+}
+DM_TEST(dm_test_acpi_find_table, 0);
+
+/* Test offsets in RSDT, XSDT */
+static int dm_test_acpi_offsets(struct unit_test_state *uts)
+{
+ ut_asserteq(36, offsetof(struct acpi_rsdt, entry));
+ ut_asserteq(36, offsetof(struct acpi_xsdt, entry));
+
+ return 0;
+}
+DM_TEST(dm_test_acpi_offsets, 0);
diff --git a/test/dm/clk_ccf.c b/test/dm/clk_ccf.c
index e4ebb93..61dad8d 100644
--- a/test/dm/clk_ccf.c
+++ b/test/dm/clk_ccf.c
@@ -19,16 +19,18 @@
static int dm_test_clk_ccf(struct unit_test_state *uts)
{
struct clk *clk, *pclk;
- struct udevice *dev;
+ struct udevice *dev, *test_dev;
long long rate;
int ret;
#if CONFIG_IS_ENABLED(CLK_CCF)
+ struct clk clk_ccf;
const char *clkname;
int clkid, i;
#endif
/* Get the device using the clk device */
ut_assertok(uclass_get_device_by_name(UCLASS_CLK, "clk-ccf", &dev));
+ ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "clk-test", &test_dev));
/* Test for clk_get_by_id() */
ret = clk_get_by_id(SANDBOX_CLK_ECSPI_ROOT, &clk);
@@ -63,6 +65,9 @@
rate = clk_get_parent_rate(clk);
ut_asserteq(rate, 60000000);
+ rate = clk_set_rate(clk, 60000000);
+ ut_asserteq(rate, -ENOSYS);
+
rate = clk_get_rate(clk);
ut_asserteq(rate, 60000000);
@@ -87,6 +92,9 @@
ut_asserteq_str("pll3_80m", pclk->dev->name);
ut_asserteq(CLK_SET_RATE_PARENT, pclk->flags);
+ rate = clk_set_rate(clk, 80000000);
+ ut_asserteq(rate, -ENOSYS);
+
rate = clk_get_rate(clk);
ut_asserteq(rate, 80000000);
@@ -108,13 +116,23 @@
rate = clk_get_rate(clk);
ut_asserteq(rate, 60000000);
+ rate = clk_set_rate(clk, 60000000);
+ ut_asserteq(rate, 60000000);
+
#if CONFIG_IS_ENABLED(CLK_CCF)
/* Test clk tree enable/disable */
+
+ ret = clk_get_by_index(test_dev, SANDBOX_CLK_TEST_ID_I2C_ROOT, &clk_ccf);
+ ut_assertok(ret);
+ ut_asserteq_str("clk-ccf", clk_ccf.dev->name);
+ ut_asserteq(clk_ccf.id, SANDBOX_CLK_I2C_ROOT);
+
ret = clk_get_by_id(SANDBOX_CLK_I2C_ROOT, &clk);
ut_assertok(ret);
ut_asserteq_str("i2c_root", clk->dev->name);
+ ut_asserteq(clk->id, SANDBOX_CLK_I2C_ROOT);
- ret = clk_enable(clk);
+ ret = clk_enable(&clk_ccf);
ut_assertok(ret);
ret = sandbox_clk_enable_count(clk);
diff --git a/test/dm/scmi.c b/test/dm/scmi.c
index da45314..adf36ff 100644
--- a/test/dm/scmi.c
+++ b/test/dm/scmi.c
@@ -19,10 +19,10 @@
#include <scmi_agent.h>
#include <scmi_agent-uclass.h>
#include <scmi_protocols.h>
+#include <vsprintf.h>
#include <asm/scmi_test.h>
#include <dm/device-internal.h>
#include <dm/test.h>
-#include <linux/kconfig.h>
#include <power/regulator.h>
#include <test/ut.h>
@@ -206,6 +206,86 @@
DM_TEST(dm_test_scmi_base, UT_TESTF_SCAN_FDT);
+static int dm_test_scmi_cmd(struct unit_test_state *uts)
+{
+ struct udevice *agent_dev;
+ int num_proto = 0;
+ char cmd_out[30];
+
+ if (!CONFIG_IS_ENABLED(CMD_SCMI))
+ return -EAGAIN;
+
+ /* preparation */
+ ut_assertok(uclass_get_device_by_name(UCLASS_SCMI_AGENT, "scmi",
+ &agent_dev));
+ ut_assertnonnull(agent_dev);
+
+ /*
+ * Estimate the number of provided protocols.
+ * This estimation is correct as far as a corresponding
+ * protocol support is added to sandbox fake serer.
+ */
+ if (CONFIG_IS_ENABLED(POWER_DOMAIN))
+ num_proto++;
+ if (CONFIG_IS_ENABLED(CLK_SCMI))
+ num_proto++;
+ if (CONFIG_IS_ENABLED(RESET_SCMI))
+ num_proto++;
+ if (CONFIG_IS_ENABLED(DM_REGULATOR_SCMI))
+ num_proto++;
+
+ /* scmi info */
+ ut_assertok(run_command("scmi info", 0));
+
+ ut_assert_nextline("SCMI device: scmi");
+ snprintf(cmd_out, 30, " protocol version: 0x%x",
+ SCMI_BASE_PROTOCOL_VERSION);
+ ut_assert_nextline(cmd_out);
+ ut_assert_nextline(" # of agents: 2");
+ ut_assert_nextline(" 0: platform");
+ ut_assert_nextline(" > 1: OSPM");
+ snprintf(cmd_out, 30, " # of protocols: %d", num_proto);
+ ut_assert_nextline(cmd_out);
+ if (CONFIG_IS_ENABLED(SCMI_POWER_DOMAIN))
+ ut_assert_nextline(" Power domain management");
+ if (CONFIG_IS_ENABLED(CLK_SCMI))
+ ut_assert_nextline(" Clock management");
+ if (CONFIG_IS_ENABLED(RESET_SCMI))
+ ut_assert_nextline(" Reset domain management");
+ if (CONFIG_IS_ENABLED(DM_REGULATOR_SCMI))
+ ut_assert_nextline(" Voltage domain management");
+ ut_assert_nextline(" vendor: U-Boot");
+ ut_assert_nextline(" sub vendor: Sandbox");
+ ut_assert_nextline(" impl version: 0x1");
+
+ ut_assert_console_end();
+
+ /* scmi perm_dev */
+ ut_assertok(run_command("scmi perm_dev 1 0 1", 0));
+ ut_assert_console_end();
+
+ ut_assert(run_command("scmi perm_dev 1 0 0", 0));
+ ut_assert_nextline("Denying access to device:0 failed (-13)");
+ ut_assert_console_end();
+
+ /* scmi perm_proto */
+ ut_assertok(run_command("scmi perm_proto 1 0 14 1", 0));
+ ut_assert_console_end();
+
+ ut_assert(run_command("scmi perm_proto 1 0 14 0", 0));
+ ut_assert_nextline("Denying access to protocol:0x14 on device:0 failed (-13)");
+ ut_assert_console_end();
+
+ /* scmi reset */
+ ut_assert(run_command("scmi reset 1 1", 0));
+ ut_assert_nextline("Reset failed (-13)");
+ ut_assert_console_end();
+
+ return 0;
+}
+
+DM_TEST(dm_test_scmi_cmd, UT_TESTF_SCAN_FDT);
+
static int dm_test_scmi_power_domains(struct unit_test_state *uts)
{
struct sandbox_scmi_agent *agent;
@@ -217,6 +297,9 @@
u8 *name;
int ret;
+ if (!CONFIG_IS_ENABLED(SCMI_POWER_DOMAIN))
+ return -EAGAIN;
+
/* preparation */
ut_assertok(load_sandbox_scmi_test_devices(uts, &agent, &dev));
ut_assertnonnull(agent);
@@ -317,6 +400,9 @@
int ret_dev;
int ret;
+ if (!CONFIG_IS_ENABLED(CLK_SCMI))
+ return -EAGAIN;
+
ret = load_sandbox_scmi_test_devices(uts, &agent, &dev);
if (ret)
return ret;
@@ -382,6 +468,9 @@
struct udevice *agent_dev, *reset_dev, *dev = NULL;
int ret;
+ if (!CONFIG_IS_ENABLED(RESET_SCMI))
+ return -EAGAIN;
+
ret = load_sandbox_scmi_test_devices(uts, &agent, &dev);
if (ret)
return ret;
@@ -418,6 +507,9 @@
struct udevice *dev;
struct udevice *regul0_dev;
+ if (!CONFIG_IS_ENABLED(DM_REGULATOR_SCMI))
+ return -EAGAIN;
+
ut_assertok(load_sandbox_scmi_test_devices(uts, &agent, &dev));
scmi_devices = sandbox_scmi_devices_ctx(dev);
diff --git a/test/dm/spmi.c b/test/dm/spmi.c
index 9cc284b..97bb0eb 100644
--- a/test/dm/spmi.c
+++ b/test/dm/spmi.c
@@ -81,7 +81,7 @@
int offset_count;
/* Get second pin of PMIC GPIO */
- ut_assertok(gpio_lookup_name("spmi1", &dev, &offset, &gpio));
+ ut_assertok(gpio_lookup_name("pmic1", &dev, &offset, &gpio));
/* Check if PMIC is parent */
ut_asserteq(device_get_uclass_id(dev->parent), UCLASS_PMIC);
@@ -92,7 +92,7 @@
name = gpio_get_bank_info(dev, &offset_count);
/* Check bank name */
- ut_asserteq_str("spmi", name);
+ ut_asserteq_str("pmic", name);
/* Check pin count */
ut_asserteq(4, offset_count);
diff --git a/test/fs/fs-test.sh b/test/fs/fs-test.sh
index dec2634..257b50f 100755
--- a/test/fs/fs-test.sh
+++ b/test/fs/fs-test.sh
@@ -23,7 +23,7 @@
# --------------------------------------------
# pre-requisite binaries list.
-PREREQ_BINS="md5sum mkfs mount umount dd fallocate mkdir"
+PREREQ_BINS="sha256sum mkfs mount umount dd fallocate mkdir"
# All generated output files from this test will be in $OUT_DIR
# Hence everything is sandboxed.
@@ -44,9 +44,9 @@
# $BIG_FILE is the name of the 2.5GB file in the file system image
BIG_FILE="2.5GB.file"
-# $MD5_FILE will have the expected md5s when we do the test
+# $HASH_FILE will have the expected hashes when we do the test
# They shall have a suffix which represents their file system (ext4/fat16/...)
-MD5_FILE="${OUT_DIR}/md5s.list"
+HASH_FILE="${OUT_DIR}/hash.list"
# $OUT shall be the prefix of the test output. Their suffix will be .out
OUT="${OUT_DIR}/fs-test"
@@ -103,7 +103,7 @@
# Clean out all generated files other than the file system images
# We save time by not deleting and recreating the file system images
function prepare_env() {
- rm -f ${MD5_FILE}.* ${OUT}.*
+ rm -f ${HASH_FILE}.* ${OUT}.*
mkdir -p ${OUT_DIR}
}
@@ -254,14 +254,14 @@
${PREFIX}load host${SUFFIX} $addr ${FPATH}$FILE_SMALL
printenv filesize
# Test Case 4b - Read full 1MB of small file
-md5sum $addr \$filesize
+hash sha256 $addr \$filesize
setenv filesize
# Test Case 5a - First 1MB of big file
${PREFIX}load host${SUFFIX} $addr ${FPATH}$FILE_BIG $length 0x0
printenv filesize
# Test Case 5b - First 1MB of big file
-md5sum $addr \$filesize
+hash sha256 $addr \$filesize
setenv filesize
# fails for ext as no offset support
@@ -269,7 +269,7 @@
${PREFIX}load host${SUFFIX} $addr ${FPATH}$FILE_BIG $length 0x9C300000
printenv filesize
# Test Case 6b - Last 1MB of big file
-md5sum $addr \$filesize
+hash sha256 $addr \$filesize
setenv filesize
# fails for ext as no offset support
@@ -277,7 +277,7 @@
${PREFIX}load host${SUFFIX} $addr ${FPATH}$FILE_BIG $length 0x7FF00000
printenv filesize
# Test Case 7b - One from the last 1MB chunk of 2GB
-md5sum $addr \$filesize
+hash sha256 $addr \$filesize
setenv filesize
# fails for ext as no offset support
@@ -285,7 +285,7 @@
${PREFIX}load host${SUFFIX} $addr ${FPATH}$FILE_BIG $length 0x80000000
printenv filesize
# Test Case 8b - One from the start 1MB chunk from 2GB
-md5sum $addr \$filesize
+hash sha256 $addr \$filesize
setenv filesize
# fails for ext as no offset support
@@ -293,7 +293,7 @@
${PREFIX}load host${SUFFIX} $addr ${FPATH}$FILE_BIG $length 0x7FF80000
printenv filesize
# Test Case 9b - One 1MB chunk crossing the 2GB boundary
-md5sum $addr \$filesize
+hash sha256 $addr \$filesize
setenv filesize
# Generic failure case
@@ -309,8 +309,8 @@
${PREFIX}${WRITE} host${SUFFIX} $addr ${FPATH}$FILE_WRITE \$filesize
mw.b $addr 00 100
${PREFIX}load host${SUFFIX} $addr ${FPATH}$FILE_WRITE
-# Test Case 11b - Check md5 of written to is same as the one read from
-md5sum $addr \$filesize
+# Test Case 11b - Check hash of written to is same as the one read from
+hash sha256 $addr \$filesize
setenv filesize
#
@@ -327,13 +327,13 @@
${PREFIX}${WRITE} host${SUFFIX} $addr ${FPATH}./${FILE_WRITE}2 \$filesize
mw.b $addr 00 100
${PREFIX}load host${SUFFIX} $addr ${FPATH}./${FILE_WRITE}2
-# Test Case 13b - Check md5 of written to is same as the one read from
-md5sum $addr \$filesize
+# Test Case 13b - Check hash of written to is same as the one read from
+hash sha256 $addr \$filesize
setenv filesize
mw.b $addr 00 100
${PREFIX}load host${SUFFIX} $addr ${FPATH}${FILE_WRITE}2
-# Test Case 13c - Check md5 of written to is same as the one read from
-md5sum $addr \$filesize
+# Test Case 13c - Check hash of written to is same as the one read from
+ hasheshash sha256 $addr \$filesize
setenv filesize
#
reset
@@ -342,7 +342,7 @@
}
# 1st argument is the name of the image file.
-# 2nd argument is the file where we generate the md5s of the files
+# 2nd argument is the file where we generate the hashes of the files
# generated with the appropriate start and length that we use to test.
# It creates the necessary files in the image to test.
# $GB2p5 is the path of the big file (2.5 GB)
@@ -380,29 +380,29 @@
sudo rm -f "${MB1}.w"
sudo rm -f "${MB1}.w2"
- # Generate the md5sums of reads that we will test against small file
- dd if="${MB1}" bs=1M skip=0 count=1 2> /dev/null | md5sum > "$2"
+ # Generate the hashes of reads that we will test against small file
+ dd if="${MB1}" bs=1M skip=0 count=1 2> /dev/null | sha256sum > "$2"
- # Generate the md5sums of reads that we will test against big file
+ # Generate the hashes of reads that we will test against big file
# One from beginning of file.
dd if="${GB2p5}" bs=1M skip=0 count=1 \
- 2> /dev/null | md5sum >> "$2"
+ 2> /dev/null | sha256sum >> "$2"
# One from end of file.
dd if="${GB2p5}" bs=1M skip=2499 count=1 \
- 2> /dev/null | md5sum >> "$2"
+ 2> /dev/null | sha256sum >> "$2"
# One from the last 1MB chunk of 2GB
dd if="${GB2p5}" bs=1M skip=2047 count=1 \
- 2> /dev/null | md5sum >> "$2"
+ 2> /dev/null | sha256sum >> "$2"
# One from the start 1MB chunk from 2GB
dd if="${GB2p5}" bs=1M skip=2048 count=1 \
- 2> /dev/null | md5sum >> "$2"
+ 2> /dev/null | sha256sum >> "$2"
# One 1MB chunk crossing the 2GB boundary
dd if="${GB2p5}" bs=512K skip=4095 count=2 \
- 2> /dev/null | md5sum >> "$2"
+ 2> /dev/null | sha256sum >> "$2"
sync
sudo umount "$MOUNT_DIR"
@@ -422,35 +422,35 @@
fi
}
-# 1st parameter is the string which leads to an md5 generation
+# 1st parameter is the string which leads to an hash generation
# 2nd parameter is the file we grep, for that string
-# 3rd parameter is the name of the file which has md5s in it
-# 4th parameter is the line # in the md5 file that we match it against
-# This function checks if the md5 of the file in the sandbox matches
+# 3rd parameter is the name of the file which has hashes in it
+# 4th parameter is the line # in the hash file that we match against
+# This function checks if the hash of the file in the sandbox matches
# that calculated while generating the file
# 5th parameter is the string to print with the result
-check_md5() {
- # md5sum in u-boot has output of form:
- # md5 for 01000008 ... 01100007 ==> <md5>
- # the 7th field is the actual md5
- md5_src=`grep -A2 "$1" "$2" | grep "md5 for" | tr -d '\r'`
- md5_src=($md5_src)
- md5_src=${md5_src[6]}
+check_hash() {
+ # hash cmd output in u-boot has output of form:
+ # sha256 for 01000008 ... 01100007 ==> <hash>
+ # the 7th field is the actual hash
+ hash_src=`grep -A2 "$1" "$2" | grep "sha256 for" | tr -d '\r'`
+ hash_src=($hash_src)
+ hash_src=${hash_src[6]}
- # The md5 list, each line is of the form:
- # - <md5>
- # the 2nd field is the actual md5
- md5_dst=`sed -n $4p $3`
- md5_dst=($md5_dst)
- md5_dst=${md5_dst[0]}
+ # The hash list, each line is of the form:
+ # - <hash>
+ # the 2nd field is the actual hash
+ hash_dst=`sed -n $4p $3`
+ hash_dst=($hash_dst)
+ hash_dst=${hash_dst[0]}
# For a pass they should match.
- [ "$md5_src" = "$md5_dst" ]
+ [ "$hash_src" = "$hash_dst" ]
pass_fail "$5"
}
# 1st parameter is the name of the output file to check
-# 2nd parameter is the name of the file containing the md5 expected
+# 2nd parameter is the name of the file containing the expected hash
# 3rd parameter is the name of the small file
# 4th parameter is the name of the big file
# 5th paramter is the name of the written file
@@ -483,34 +483,34 @@
# Check read full mb of 1MB.file
grep -A4 "Test Case 4a " "$1" | grep -q "filesize=100000"
pass_fail "TC4: load of $3 size"
- check_md5 "Test Case 4b " "$1" "$2" 1 "TC4: load from $3"
+ check_hash "Test Case 4b " "$1" "$2" 1 "TC4: load from $3"
# Check first mb of 2.5GB.file
grep -A4 "Test Case 5a " "$1" | grep -q "filesize=100000"
pass_fail "TC5: load of 1st MB from $4 size"
- check_md5 "Test Case 5b " "$1" "$2" 2 "TC5: load of 1st MB from $4"
+ check_hash "Test Case 5b " "$1" "$2" 2 "TC5: load of 1st MB from $4"
# Check last mb of 2.5GB.file
grep -A4 "Test Case 6a " "$1" | grep -q "filesize=100000"
pass_fail "TC6: load of last MB from $4 size"
- check_md5 "Test Case 6b " "$1" "$2" 3 "TC6: load of last MB from $4"
+ check_hash "Test Case 6b " "$1" "$2" 3 "TC6: load of last MB from $4"
# Check last 1mb chunk of 2gb from 2.5GB file
grep -A4 "Test Case 7a " "$1" | grep -q "filesize=100000"
pass_fail "TC7: load of last 1mb chunk of 2GB from $4 size"
- check_md5 "Test Case 7b " "$1" "$2" 4 \
+ check_hash "Test Case 7b " "$1" "$2" 4 \
"TC7: load of last 1mb chunk of 2GB from $4"
# Check first 1mb chunk after 2gb from 2.5GB file
grep -A4 "Test Case 8a " "$1" | grep -q "filesize=100000"
pass_fail "TC8: load 1st MB chunk after 2GB from $4 size"
- check_md5 "Test Case 8b " "$1" "$2" 5 \
+ check_hash "Test Case 8b " "$1" "$2" 5 \
"TC8: load 1st MB chunk after 2GB from $4"
# Check 1mb chunk crossing the 2gb boundary from 2.5GB file
grep -A4 "Test Case 9a " "$1" | grep -q "filesize=100000"
pass_fail "TC9: load 1MB chunk crossing 2GB boundary from $4 size"
- check_md5 "Test Case 9b " "$1" "$2" 6 \
+ check_hash "Test Case 9b " "$1" "$2" 6 \
"TC9: load 1MB chunk crossing 2GB boundary from $4"
# Check 2mb chunk from the last 1MB of 2.5GB file loads 1MB
@@ -520,7 +520,7 @@
# Check 1mb chunk write
grep -A2 "Test Case 11a " "$1" | grep -q '1048576 bytes written'
pass_fail "TC11: 1MB write to $3.w - write succeeded"
- check_md5 "Test Case 11b " "$1" "$2" 1 \
+ check_hash "Test Case 11b " "$1" "$2" 1 \
"TC11: 1MB write to $3.w - content verified"
# Check lookup of 'dot' directory
@@ -530,9 +530,9 @@
# Check directory traversal
grep -A2 "Test Case 13a " "$1" | grep -q '1048576 bytes written'
pass_fail "TC13: 1MB write to ./$3.w2 - write succeeded"
- check_md5 "Test Case 13b " "$1" "$2" 1 \
+ check_hash "Test Case 13b " "$1" "$2" 1 \
"TC13: 1MB read from ./$3.w2 - content verified"
- check_md5 "Test Case 13c " "$1" "$2" 1 \
+ check_hash "Test Case 13c " "$1" "$2" 1 \
"TC13: 1MB read from $3.w2 - content verified"
echo "** End $1"
@@ -543,7 +543,7 @@
# be performed.
function test_fs_nonfs() {
echo "Creating files in $fs image if not already present."
- create_files $IMAGE $MD5_FILE_FS
+ create_files $IMAGE $HASH_FILE_FS
OUT_FILE="${OUT}.$1.${fs}.out"
test_image $IMAGE $fs $SMALL_FILE $BIG_FILE $1 "" \
@@ -552,7 +552,7 @@
grep -v -e "File System is consistent\|update journal finished" \
-e "reading .*\.file\|writing .*\.file.w" \
< ${OUT_FILE} > ${OUT_FILE}_clean
- check_results ${OUT_FILE}_clean $MD5_FILE_FS $SMALL_FILE \
+ check_results ${OUT_FILE}_clean $HASH_FILE_FS $SMALL_FILE \
$BIG_FILE
TOTAL_FAIL=$((TOTAL_FAIL + FAIL))
TOTAL_PASS=$((TOTAL_PASS + PASS))
@@ -580,12 +580,12 @@
echo "Creating $fs image if not already present."
IMAGE=${IMG}.${fs}.img
- MD5_FILE_FS="${MD5_FILE}.${fs}"
+ HASH_FILE_FS="${HASH_FILE}.${fs}"
create_image $IMAGE $fs
# host commands test
echo "Creating files in $fs image if not already present."
- create_files $IMAGE $MD5_FILE_FS
+ create_files $IMAGE $HASH_FILE_FS
# Lets mount the image and test host hostfs commands
mkdir -p "$MOUNT_DIR"
@@ -606,7 +606,7 @@
sudo umount "$MOUNT_DIR"
rmdir "$MOUNT_DIR"
- check_results $OUT_FILE $MD5_FILE_FS $SMALL_FILE $BIG_FILE
+ check_results $OUT_FILE $HASH_FILE_FS $SMALL_FILE $BIG_FILE
TOTAL_FAIL=$((TOTAL_FAIL + FAIL))
TOTAL_PASS=$((TOTAL_PASS + PASS))
echo "Summary: PASS: $PASS FAIL: $FAIL"
diff --git a/test/hush/Makefile b/test/hush/Makefile
new file mode 100644
index 0000000..a2d9881
--- /dev/null
+++ b/test/hush/Makefile
@@ -0,0 +1,10 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# (C) Copyright 2021
+# Francis Laniel, Amarula Solutions, francis.laniel@amarulasolutions.com
+
+obj-y += cmd_ut_hush.o
+obj-y += if.o
+obj-y += dollar.o
+obj-y += list.o
+obj-y += loop.o
diff --git a/test/hush/cmd_ut_hush.c b/test/hush/cmd_ut_hush.c
new file mode 100644
index 0000000..abad44f
--- /dev/null
+++ b/test/hush/cmd_ut_hush.c
@@ -0,0 +1,19 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * (C) Copyright 2021
+ * Francis Laniel, Amarula Solutions, francis.laniel@amarulasolutions.com
+ */
+
+#include <command.h>
+#include <test/hush.h>
+#include <test/suites.h>
+#include <test/ut.h>
+
+int do_ut_hush(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
+{
+ struct unit_test *tests = UNIT_TEST_SUITE_START(hush_test);
+ const int n_ents = UNIT_TEST_SUITE_COUNT(hush_test);
+
+ return cmd_ut_category("hush", "hush_test_",
+ tests, n_ents, argc, argv);
+}
diff --git a/test/hush/dollar.c b/test/hush/dollar.c
new file mode 100644
index 0000000..4caa07c
--- /dev/null
+++ b/test/hush/dollar.c
@@ -0,0 +1,225 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * (C) Copyright 2021
+ * Francis Laniel, Amarula Solutions, francis.laniel@amarulasolutions.com
+ */
+
+#include <command.h>
+#include <env_attr.h>
+#include <test/hush.h>
+#include <test/ut.h>
+#include <asm/global_data.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static int hush_test_simple_dollar(struct unit_test_state *uts)
+{
+ console_record_reset_enable();
+ ut_assertok(run_command("echo $dollar_foo", 0));
+ ut_assert_nextline_empty();
+ ut_assert_console_end();
+
+ ut_assertok(run_command("echo ${dollar_foo}", 0));
+ ut_assert_nextline_empty();
+ ut_assert_console_end();
+
+ ut_assertok(run_command("dollar_foo=bar", 0));
+
+ ut_assertok(run_command("echo $dollar_foo", 0));
+ ut_assert_nextline("bar");
+ ut_assert_console_end();
+
+ ut_assertok(run_command("echo ${dollar_foo}", 0));
+ ut_assert_nextline("bar");
+ ut_assert_console_end();
+
+ ut_assertok(run_command("dollar_foo=\\$bar", 0));
+
+ ut_assertok(run_command("echo $dollar_foo", 0));
+ ut_assert_nextline("$bar");
+ ut_assert_console_end();
+
+ ut_assertok(run_command("dollar_foo='$bar'", 0));
+
+ ut_assertok(run_command("echo $dollar_foo", 0));
+ ut_assert_nextline("$bar");
+ ut_assert_console_end();
+
+ ut_asserteq(1, run_command("dollar_foo=bar quux", 0));
+ /* Next line contains error message */
+ ut_assert_skipline();
+ ut_assert_console_end();
+
+ ut_asserteq(1, run_command("dollar_foo='bar quux", 0));
+ /* Next line contains error message */
+ ut_assert_skipline();
+
+ if (gd->flags & GD_FLG_HUSH_MODERN_PARSER) {
+ /*
+ * For some strange reasons, the console is not empty after
+ * running above command.
+ * So, we reset it to not have side effects for other tests.
+ */
+ console_record_reset_enable();
+ } else if (gd->flags & GD_FLG_HUSH_OLD_PARSER) {
+ ut_assert_console_end();
+ }
+
+ ut_asserteq(1, run_command("dollar_foo=bar quux\"", 0));
+ /* Two next lines contain error message */
+ ut_assert_skipline();
+ ut_assert_skipline();
+
+ if (gd->flags & GD_FLG_HUSH_MODERN_PARSER) {
+ /* See above comments. */
+ console_record_reset_enable();
+ } else if (gd->flags & GD_FLG_HUSH_OLD_PARSER) {
+ ut_assert_console_end();
+ }
+
+ ut_assertok(run_command("dollar_foo='bar \"quux'", 0));
+
+ ut_assertok(run_command("echo $dollar_foo", 0));
+ /*
+ * This one is buggy.
+ * ut_assert_nextline("bar \"quux");
+ * ut_assert_console_end();
+ *
+ * So, let's reset output:
+ */
+ console_record_reset_enable();
+
+ if (gd->flags & GD_FLG_HUSH_MODERN_PARSER) {
+ /*
+ * Old parser returns an error because it waits for closing
+ * '\'', but this behavior is wrong as the '\'' is surrounded by
+ * '"', so no need to wait for a closing one.
+ */
+ ut_assertok(run_command("dollar_foo=\"bar 'quux\"", 0));
+
+ ut_assertok(run_command("echo $dollar_foo", 0));
+ ut_assert_nextline("bar 'quux");
+ ut_assert_console_end();
+ } else if (gd->flags & GD_FLG_HUSH_OLD_PARSER) {
+ ut_asserteq(1, run_command("dollar_foo=\"bar 'quux\"", 0));
+ /* Next line contains error message */
+ ut_assert_skipline();
+ ut_assert_console_end();
+ }
+
+ ut_assertok(run_command("dollar_foo='bar quux'", 0));
+ ut_assertok(run_command("echo $dollar_foo", 0));
+ ut_assert_nextline("bar quux");
+ ut_assert_console_end();
+
+ if (gd->flags & GD_FLG_HUSH_MODERN_PARSER) {
+ /* Reset local variable. */
+ ut_assertok(run_command("dollar_foo=", 0));
+ } else if (gd->flags & GD_FLG_HUSH_OLD_PARSER) {
+ puts("Beware: this test set local variable dollar_foo and it cannot be unset!");
+ }
+
+ return 0;
+}
+HUSH_TEST(hush_test_simple_dollar, 0);
+
+static int hush_test_env_dollar(struct unit_test_state *uts)
+{
+ env_set("env_foo", "bar");
+ console_record_reset_enable();
+
+ ut_assertok(run_command("echo $env_foo", 0));
+ ut_assert_nextline("bar");
+ ut_assert_console_end();
+
+ ut_assertok(run_command("echo ${env_foo}", 0));
+ ut_assert_nextline("bar");
+ ut_assert_console_end();
+
+ /* Environment variables have priority over local variable */
+ ut_assertok(run_command("env_foo=quux", 0));
+ ut_assertok(run_command("echo ${env_foo}", 0));
+ ut_assert_nextline("bar");
+ ut_assert_console_end();
+
+ /* Clean up setting the variable */
+ env_set("env_foo", NULL);
+
+ if (gd->flags & GD_FLG_HUSH_MODERN_PARSER) {
+ /* Reset local variable. */
+ ut_assertok(run_command("env_foo=", 0));
+ } else if (gd->flags & GD_FLG_HUSH_OLD_PARSER) {
+ puts("Beware: this test set local variable env_foo and it cannot be unset!");
+ }
+
+ return 0;
+}
+HUSH_TEST(hush_test_env_dollar, 0);
+
+static int hush_test_command_dollar(struct unit_test_state *uts)
+{
+ console_record_reset_enable();
+
+ ut_assertok(run_command("dollar_bar=\"echo bar\"", 0));
+
+ ut_assertok(run_command("$dollar_bar", 0));
+ ut_assert_nextline("bar");
+ ut_assert_console_end();
+
+ ut_assertok(run_command("${dollar_bar}", 0));
+ ut_assert_nextline("bar");
+ ut_assert_console_end();
+
+ ut_assertok(run_command("dollar_bar=\"echo\nbar\"", 0));
+
+ ut_assertok(run_command("$dollar_bar", 0));
+ ut_assert_nextline("bar");
+ ut_assert_console_end();
+
+ ut_assertok(run_command("dollar_bar='echo bar\n'", 0));
+
+ ut_assertok(run_command("$dollar_bar", 0));
+ ut_assert_nextline("bar");
+ ut_assert_console_end();
+
+ ut_assertok(run_command("dollar_bar='echo bar\\n'", 0));
+
+ ut_assertok(run_command("$dollar_bar", 0));
+
+ if (gd->flags & GD_FLG_HUSH_MODERN_PARSER) {
+ /*
+ * This difference seems to come from a bug solved in Busybox
+ * hush.
+ * Behavior of hush 2021 is coherent with bash and other shells.
+ */
+ ut_assert_nextline("bar\\n");
+ } else if (gd->flags & GD_FLG_HUSH_OLD_PARSER) {
+ ut_assert_nextline("barn");
+ }
+
+ ut_assert_console_end();
+
+ ut_assertok(run_command("dollar_bar='echo $bar'", 0));
+
+ ut_assertok(run_command("$dollar_bar", 0));
+ ut_assert_nextline("$bar");
+ ut_assert_console_end();
+
+ ut_assertok(run_command("dollar_quux=quux", 0));
+ ut_assertok(run_command("dollar_bar=\"echo $dollar_quux\"", 0));
+
+ ut_assertok(run_command("$dollar_bar", 0));
+ ut_assert_nextline("quux");
+ ut_assert_console_end();
+
+ if (gd->flags & GD_FLG_HUSH_MODERN_PARSER) {
+ /* Reset local variables. */
+ ut_assertok(run_command("dollar_bar=", 0));
+ ut_assertok(run_command("dollar_quux=", 0));
+ } else if (gd->flags & GD_FLG_HUSH_OLD_PARSER) {
+ puts("Beware: this test sets local variable dollar_bar and dollar_quux and they cannot be unset!");
+ }
+
+ return 0;
+}
+HUSH_TEST(hush_test_command_dollar, 0);
diff --git a/test/hush/if.c b/test/hush/if.c
new file mode 100644
index 0000000..8939b7a
--- /dev/null
+++ b/test/hush/if.c
@@ -0,0 +1,316 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * (C) Copyright 2021
+ * Francis Laniel, Amarula Solutions, francis.laniel@amarulasolutions.com
+ */
+
+#include <command.h>
+#include <env_attr.h>
+#include <vsprintf.h>
+#include <test/hush.h>
+#include <test/ut.h>
+
+/*
+ * All tests will execute the following:
+ * if condition_to_test; then
+ * true
+ * else
+ * false
+ * fi
+ * If condition is true, command returns 1, 0 otherwise.
+ */
+const char *if_format = "if %s; then true; else false; fi";
+
+static int hush_test_if_base(struct unit_test_state *uts)
+{
+ char if_formatted[128];
+
+ sprintf(if_formatted, if_format, "true");
+ ut_assertok(run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "false");
+ ut_asserteq(1, run_command(if_formatted, 0));
+
+ return 0;
+}
+HUSH_TEST(hush_test_if_base, 0);
+
+static int hush_test_if_basic_operators(struct unit_test_state *uts)
+{
+ char if_formatted[128];
+
+ sprintf(if_formatted, if_format, "test aaa = aaa");
+ ut_assertok(run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "test aaa = bbb");
+ ut_asserteq(1, run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "test aaa != bbb");
+ ut_assertok(run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "test aaa != aaa");
+ ut_asserteq(1, run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "test aaa < bbb");
+ ut_assertok(run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "test bbb < aaa");
+ ut_asserteq(1, run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "test bbb > aaa");
+ ut_assertok(run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "test aaa > bbb");
+ ut_asserteq(1, run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "test 123 -eq 123");
+ ut_assertok(run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "test 123 -eq 456");
+ ut_asserteq(1, run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "test 123 -ne 456");
+ ut_assertok(run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "test 123 -ne 123");
+ ut_asserteq(1, run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "test 123 -lt 456");
+ ut_assertok(run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "test 123 -lt 123");
+ ut_asserteq(1, run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "test 456 -lt 123");
+ ut_asserteq(1, run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "test 123 -le 456");
+ ut_assertok(run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "test 123 -le 123");
+ ut_assertok(run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "test 456 -le 123");
+ ut_asserteq(1, run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "test 456 -gt 123");
+ ut_assertok(run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "test 123 -gt 123");
+ ut_asserteq(1, run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "test 123 -gt 456");
+ ut_asserteq(1, run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "test 456 -ge 123");
+ ut_assertok(run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "test 123 -ge 123");
+ ut_assertok(run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "test 123 -ge 456");
+ ut_asserteq(1, run_command(if_formatted, 0));
+
+ return 0;
+}
+HUSH_TEST(hush_test_if_basic_operators, 0);
+
+static int hush_test_if_octal(struct unit_test_state *uts)
+{
+ char if_formatted[128];
+
+ sprintf(if_formatted, if_format, "test 010 -eq 010");
+ ut_assertok(run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "test 010 -eq 011");
+ ut_asserteq(1, run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "test 010 -ne 011");
+ ut_assertok(run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "test 010 -ne 010");
+ ut_asserteq(1, run_command(if_formatted, 0));
+
+ return 0;
+}
+HUSH_TEST(hush_test_if_octal, 0);
+
+static int hush_test_if_hexadecimal(struct unit_test_state *uts)
+{
+ char if_formatted[128];
+
+ sprintf(if_formatted, if_format, "test 0x2000000 -gt 0x2000001");
+ ut_asserteq(1, run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "test 0x2000000 -gt 0x2000000");
+ ut_asserteq(1, run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "test 0x2000000 -gt 0x1ffffff");
+ ut_assertok(run_command(if_formatted, 0));
+
+ return 0;
+}
+HUSH_TEST(hush_test_if_hexadecimal, 0);
+
+static int hush_test_if_mixed(struct unit_test_state *uts)
+{
+ char if_formatted[128];
+
+ sprintf(if_formatted, if_format, "test 010 -eq 10");
+ ut_asserteq(1, run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "test 010 -ne 10");
+ ut_assertok(run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "test 0xa -eq 10");
+ ut_assertok(run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "test 0xa -eq 012");
+ ut_assertok(run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "test 2000000 -gt 0x1ffffff");
+ ut_asserteq(1, run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "test 0x2000000 -gt 1ffffff");
+ ut_assertok(run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "test 0x2000000 -lt 1ffffff");
+ ut_asserteq(1, run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "test 0x2000000 -eq 2000000");
+ ut_asserteq(1, run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "test 0x2000000 -ne 2000000");
+ ut_assertok(run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "test -z \"\"");
+ ut_assertok(run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "test -z \"aaa\"");
+ ut_asserteq(1, run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "test -n \"aaa\"");
+ ut_assertok(run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "test -n \"\"");
+ ut_asserteq(1, run_command(if_formatted, 0));
+
+ return 0;
+}
+HUSH_TEST(hush_test_if_mixed, 0);
+
+static int hush_test_if_inverted(struct unit_test_state *uts)
+{
+ char if_formatted[128];
+
+ sprintf(if_formatted, if_format, "test ! aaa = aaa");
+ ut_asserteq(1, run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "test ! aaa = bbb");
+ ut_assertok(run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "test ! ! aaa = aaa");
+ ut_assertok(run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "test ! ! aaa = bbb");
+ ut_asserteq(1, run_command(if_formatted, 0));
+
+ return 0;
+}
+HUSH_TEST(hush_test_if_inverted, 0);
+
+static int hush_test_if_binary(struct unit_test_state *uts)
+{
+ char if_formatted[128];
+
+ sprintf(if_formatted, if_format, "test aaa != aaa -o bbb != bbb");
+ ut_asserteq(1, run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "test aaa != aaa -o bbb = bbb");
+ ut_assertok(run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "test aaa = aaa -o bbb != bbb");
+ ut_assertok(run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "test aaa = aaa -o bbb = bbb");
+ ut_assertok(run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "test aaa != aaa -a bbb != bbb");
+ ut_asserteq(1, run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "test aaa != aaa -a bbb = bbb");
+ ut_asserteq(1, run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "test aaa = aaa -a bbb != bbb");
+ ut_asserteq(1, run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "test aaa = aaa -a bbb = bbb");
+ ut_assertok(run_command(if_formatted, 0));
+
+ return 0;
+}
+HUSH_TEST(hush_test_if_binary, 0);
+
+static int hush_test_if_inverted_binary(struct unit_test_state *uts)
+{
+ char if_formatted[128];
+
+ sprintf(if_formatted, if_format, "test ! aaa != aaa -o ! bbb != bbb");
+ ut_assertok(run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "test ! aaa != aaa -o ! bbb = bbb");
+ ut_assertok(run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "test ! aaa = aaa -o ! bbb != bbb");
+ ut_assertok(run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "test ! aaa = aaa -o ! bbb = bbb");
+ ut_asserteq(1, run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format,
+ "test ! ! aaa != aaa -o ! ! bbb != bbb");
+ ut_asserteq(1, run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format,
+ "test ! ! aaa != aaa -o ! ! bbb = bbb");
+ ut_assertok(run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format,
+ "test ! ! aaa = aaa -o ! ! bbb != bbb");
+ ut_assertok(run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "test ! ! aaa = aaa -o ! ! bbb = bbb");
+ ut_assertok(run_command(if_formatted, 0));
+
+ return 0;
+}
+HUSH_TEST(hush_test_if_inverted_binary, 0);
+
+static int hush_test_if_z_operator(struct unit_test_state *uts)
+{
+ char if_formatted[128];
+
+ /* Deal with environment variable used during test. */
+ env_set("ut_var_nonexistent", NULL);
+ env_set("ut_var_exists", "1");
+ env_set("ut_var_unset", "1");
+
+ sprintf(if_formatted, if_format, "test -z \"$ut_var_nonexistent\"");
+ ut_assertok(run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "test -z \"$ut_var_exists\"");
+ ut_asserteq(1, run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "test -z \"$ut_var_unset\"");
+ ut_asserteq(1, run_command(if_formatted, 0));
+
+ env_set("ut_var_unset", NULL);
+ sprintf(if_formatted, if_format, "test -z \"$ut_var_unset\"");
+ ut_assertok(run_command(if_formatted, 0));
+
+ /* Clear the set environment variable. */
+ env_set("ut_var_exists", NULL);
+
+ return 0;
+}
+HUSH_TEST(hush_test_if_z_operator, 0);
diff --git a/test/hush/list.c b/test/hush/list.c
new file mode 100644
index 0000000..210823d
--- /dev/null
+++ b/test/hush/list.c
@@ -0,0 +1,139 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * (C) Copyright 2021
+ * Francis Laniel, Amarula Solutions, francis.laniel@amarulasolutions.com
+ */
+
+#include <command.h>
+#include <env_attr.h>
+#include <test/hush.h>
+#include <test/ut.h>
+#include <asm/global_data.h>
+
+static int hush_test_semicolon(struct unit_test_state *uts)
+{
+ /* A; B = B truth table. */
+ ut_asserteq(1, run_command("false; false", 0));
+ ut_assertok(run_command("false; true", 0));
+ ut_assertok(run_command("true; true", 0));
+ ut_asserteq(1, run_command("true; false", 0));
+
+ return 0;
+}
+HUSH_TEST(hush_test_semicolon, 0);
+
+static int hush_test_and(struct unit_test_state *uts)
+{
+ /* A && B truth table. */
+ ut_asserteq(1, run_command("false && false", 0));
+ ut_asserteq(1, run_command("false && true", 0));
+ ut_assertok(run_command("true && true", 0));
+ ut_asserteq(1, run_command("true && false", 0));
+
+ return 0;
+}
+HUSH_TEST(hush_test_and, 0);
+
+static int hush_test_or(struct unit_test_state *uts)
+{
+ /* A || B truth table. */
+ ut_asserteq(1, run_command("false || false", 0));
+ ut_assertok(run_command("false || true", 0));
+ ut_assertok(run_command("true || true", 0));
+ ut_assertok(run_command("true || false", 0));
+
+ return 0;
+}
+HUSH_TEST(hush_test_or, 0);
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static int hush_test_and_or(struct unit_test_state *uts)
+{
+ /* A && B || C truth table. */
+ ut_asserteq(1, run_command("false && false || false", 0));
+
+ if (gd->flags & GD_FLG_HUSH_OLD_PARSER) {
+ ut_asserteq(1, run_command("false && false || true", 0));
+ } else if (gd->flags & GD_FLG_HUSH_MODERN_PARSER) {
+ /*
+ * This difference seems to come from a bug solved in Busybox
+ * hush.
+ *
+ * Indeed, the following expression can be seen like this:
+ * (false && false) || true
+ * So, (false && false) returns 1, the second false is not
+ * executed, and true is executed because of ||.
+ */
+ ut_assertok(run_command("false && false || true", 0));
+ }
+
+ if (gd->flags & GD_FLG_HUSH_OLD_PARSER) {
+ ut_asserteq(1, run_command("false && true || true", 0));
+ } else if (gd->flags & GD_FLG_HUSH_MODERN_PARSER) {
+ /*
+ * This difference seems to come from a bug solved in Busybox
+ * hush.
+ *
+ * Indeed, the following expression can be seen like this:
+ * (false && true) || true
+ * So, (false && true) returns 1, the true is not executed, and
+ * true is executed because of ||.
+ */
+ ut_assertok(run_command("false && true || true", 0));
+ }
+
+ ut_asserteq(1, run_command("false && true || false", 0));
+ ut_assertok(run_command("true && true || false", 0));
+ ut_asserteq(1, run_command("true && false || false", 0));
+ ut_assertok(run_command("true && false || true", 0));
+ ut_assertok(run_command("true && true || true", 0));
+
+ return 0;
+}
+HUSH_TEST(hush_test_and_or, 0);
+
+static int hush_test_or_and(struct unit_test_state *uts)
+{
+ /* A || B && C truth table. */
+ ut_asserteq(1, run_command("false || false && false", 0));
+ ut_asserteq(1, run_command("false || false && true", 0));
+ ut_assertok(run_command("false || true && true", 0));
+ ut_asserteq(1, run_command("false || true && false", 0));
+
+ if (gd->flags & GD_FLG_HUSH_OLD_PARSER) {
+ ut_assertok(run_command("true || true && false", 0));
+ } else if (gd->flags & GD_FLG_HUSH_MODERN_PARSER) {
+ /*
+ * This difference seems to come from a bug solved in Busybox
+ * hush.
+ *
+ * Indeed, the following expression can be seen like this:
+ * (true || true) && false
+ * So, (true || true) returns 0, the second true is not
+ * executed, and then false is executed because of &&.
+ */
+ ut_asserteq(1, run_command("true || true && false", 0));
+ }
+
+ if (gd->flags & GD_FLG_HUSH_OLD_PARSER) {
+ ut_assertok(run_command("true || false && false", 0));
+ } else if (gd->flags & GD_FLG_HUSH_MODERN_PARSER) {
+ /*
+ * This difference seems to come from a bug solved in Busybox
+ * hush.
+ *
+ * Indeed, the following expression can be seen like this:
+ * (true || false) && false
+ * So, (true || false) returns 0, the false is not executed, and
+ * then false is executed because of &&.
+ */
+ ut_asserteq(1, run_command("true || false && false", 0));
+ }
+
+ ut_assertok(run_command("true || false && true", 0));
+ ut_assertok(run_command("true || true && true", 0));
+
+ return 0;
+}
+HUSH_TEST(hush_test_or_and, 0);
diff --git a/test/hush/loop.c b/test/hush/loop.c
new file mode 100644
index 0000000..d734abf
--- /dev/null
+++ b/test/hush/loop.c
@@ -0,0 +1,90 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * (C) Copyright 2021
+ * Francis Laniel, Amarula Solutions, francis.laniel@amarulasolutions.com
+ */
+
+#include <command.h>
+#include <env_attr.h>
+#include <test/hush.h>
+#include <test/ut.h>
+#include <asm/global_data.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static int hush_test_for(struct unit_test_state *uts)
+{
+ console_record_reset_enable();
+
+ ut_assertok(run_command("for loop_i in foo bar quux quux; do echo $loop_i; done", 0));
+ ut_assert_nextline("foo");
+ ut_assert_nextline("bar");
+ ut_assert_nextline("quux");
+ ut_assert_nextline("quux");
+ ut_assert_console_end();
+
+ if (gd->flags & GD_FLG_HUSH_MODERN_PARSER) {
+ /* Reset local variable. */
+ ut_assertok(run_command("loop_i=", 0));
+ } else if (gd->flags & GD_FLG_HUSH_OLD_PARSER) {
+ puts("Beware: this test set local variable loop_i and it cannot be unset!");
+ }
+
+ return 0;
+}
+HUSH_TEST(hush_test_for, 0);
+
+static int hush_test_while(struct unit_test_state *uts)
+{
+ console_record_reset_enable();
+
+ if (gd->flags & GD_FLG_HUSH_MODERN_PARSER) {
+ /*
+ * Hush 2021 always returns 0 from while loop...
+ * You can see code snippet near this line to have a better
+ * understanding:
+ * debug_printf_exec(": while expr is false: breaking (exitcode:EXIT_SUCCESS)\n");
+ */
+ ut_assertok(run_command("while test -z \"$loop_foo\"; do echo bar; loop_foo=quux; done", 0));
+ } else if (gd->flags & GD_FLG_HUSH_OLD_PARSER) {
+ /*
+ * Exit status is that of test, so 1 since test is false to quit
+ * the loop.
+ */
+ ut_asserteq(1, run_command("while test -z \"$loop_foo\"; do echo bar; loop_foo=quux; done", 0));
+ }
+ ut_assert_nextline("bar");
+ ut_assert_console_end();
+
+ if (gd->flags & GD_FLG_HUSH_MODERN_PARSER) {
+ /* Reset local variable. */
+ ut_assertok(run_command("loop_foo=", 0));
+ } else if (gd->flags & GD_FLG_HUSH_OLD_PARSER) {
+ puts("Beware: this test set local variable loop_foo and it cannot be unset!");
+ }
+
+ return 0;
+}
+HUSH_TEST(hush_test_while, 0);
+
+static int hush_test_until(struct unit_test_state *uts)
+{
+ console_record_reset_enable();
+ env_set("loop_bar", "bar");
+
+ /*
+ * WARNING We have to use environment variable because it is not possible
+ * resetting local variable.
+ */
+ ut_assertok(run_command("until test -z \"$loop_bar\"; do echo quux; setenv loop_bar; done", 0));
+ ut_assert_nextline("quux");
+ ut_assert_console_end();
+
+ /*
+ * Loop normally resets foo environment variable, but we reset it here in
+ * case the test failed.
+ */
+ env_set("loop_bar", NULL);
+ return 0;
+}
+HUSH_TEST(hush_test_until, 0);
diff --git a/test/image/spl_load_fs.c b/test/image/spl_load_fs.c
index 5f1de54..a89189e 100644
--- a/test/image/spl_load_fs.c
+++ b/test/image/spl_load_fs.c
@@ -220,7 +220,7 @@
bs->root_cluster = cpu_to_le32(root_sector);
vi->ext_boot_sign = 0x29;
- memcpy(vi->fs_type, FAT32_SIGN, sizeof(vi->fs_type));
+ memcpy(vi->fs_type, "FAT32 ", sizeof(vi->fs_type));
memcpy(dst + 0x1fe, "\x55\xAA", 2);
diff --git a/test/lib/lmb.c b/test/lib/lmb.c
index 15c68ce..7e4368d 100644
--- a/test/lib/lmb.c
+++ b/test/lib/lmb.c
@@ -9,6 +9,7 @@
#include <log.h>
#include <malloc.h>
#include <dm/test.h>
+#include <test/lib.h>
#include <test/test.h>
#include <test/ut.h>
@@ -205,8 +206,7 @@
/* simulate 512 MiB RAM beginning at 1.5GiB */
return test_multi_alloc_512mb(uts, 0xE0000000);
}
-
-DM_TEST(lib_test_lmb_simple, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+LIB_TEST(lib_test_lmb_simple, 0);
/* Create two memory regions with one reserved region and allocate */
static int lib_test_lmb_simple_x2(struct unit_test_state *uts)
@@ -221,8 +221,7 @@
/* simulate 512 MiB RAM beginning at 3.5GiB and 1 GiB */
return test_multi_alloc_512mb_x2(uts, 0xE0000000, 0x40000000);
}
-
-DM_TEST(lib_test_lmb_simple_x2, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+LIB_TEST(lib_test_lmb_simple_x2, 0);
/* Simulate 512 MiB RAM, allocate some blocks that fit/don't fit */
static int test_bigblock(struct unit_test_state *uts, const phys_addr_t ram)
@@ -288,8 +287,7 @@
/* simulate 512 MiB RAM beginning at 1.5GiB */
return test_bigblock(uts, 0xE0000000);
}
-
-DM_TEST(lib_test_lmb_big, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+LIB_TEST(lib_test_lmb_big, 0);
/* Simulate 512 MiB RAM, allocate a block without previous reservation */
static int test_noreserved(struct unit_test_state *uts, const phys_addr_t ram,
@@ -364,7 +362,7 @@
return test_noreserved(uts, 0xE0000000, 4, 1);
}
-DM_TEST(lib_test_lmb_noreserved, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+LIB_TEST(lib_test_lmb_noreserved, 0);
static int lib_test_lmb_unaligned_size(struct unit_test_state *uts)
{
@@ -378,8 +376,8 @@
/* simulate 512 MiB RAM beginning at 1.5GiB */
return test_noreserved(uts, 0xE0000000, 5, 8);
}
+LIB_TEST(lib_test_lmb_unaligned_size, 0);
-DM_TEST(lib_test_lmb_unaligned_size, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
/*
* Simulate a RAM that starts at 0 and allocate down to address 0, which must
* fail as '0' means failure for the lmb_alloc functions.
@@ -421,8 +419,7 @@
return 0;
}
-
-DM_TEST(lib_test_lmb_at_0, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+LIB_TEST(lib_test_lmb_at_0, 0);
/* Check that calling lmb_reserve with overlapping regions fails. */
static int lib_test_lmb_overlapping_reserve(struct unit_test_state *uts)
@@ -470,9 +467,7 @@
0, 0, 0, 0);
return 0;
}
-
-DM_TEST(lib_test_lmb_overlapping_reserve,
- UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+LIB_TEST(lib_test_lmb_overlapping_reserve, 0);
/*
* Simulate 512 MiB RAM, reserve 3 blocks, allocate addresses in between.
@@ -601,8 +596,7 @@
/* simulate 512 MiB RAM beginning at 1.5GiB */
return test_alloc_addr(uts, 0xE0000000);
}
-
-DM_TEST(lib_test_lmb_alloc_addr, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+LIB_TEST(lib_test_lmb_alloc_addr, 0);
/* Simulate 512 MiB RAM, reserve 3 blocks, check addresses in between */
static int test_get_unreserved_size(struct unit_test_state *uts,
@@ -672,9 +666,7 @@
/* simulate 512 MiB RAM beginning at 1.5GiB */
return test_get_unreserved_size(uts, 0xE0000000);
}
-
-DM_TEST(lib_test_lmb_get_free_size,
- UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+LIB_TEST(lib_test_lmb_get_free_size, 0);
#ifdef CONFIG_LMB_USE_MAX_REGIONS
static int lib_test_lmb_max_regions(struct unit_test_state *uts)
@@ -743,11 +735,9 @@
return 0;
}
+LIB_TEST(lib_test_lmb_max_regions, 0);
#endif
-DM_TEST(lib_test_lmb_max_regions,
- UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
-
static int lib_test_lmb_flags(struct unit_test_state *uts)
{
const phys_addr_t ram = 0x40000000;
@@ -833,6 +823,4 @@
return 0;
}
-
-DM_TEST(lib_test_lmb_flags,
- UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+LIB_TEST(lib_test_lmb_flags, 0);
diff --git a/test/print_ut.c b/test/print_ut.c
index b26f628..bb844d2 100644
--- a/test/print_ut.c
+++ b/test/print_ut.c
@@ -170,6 +170,10 @@
u8 *buf;
int i;
+ /* This test requires writable memory at zero */
+ if (IS_ENABLED(CONFIG_X86))
+ return -EAGAIN;
+
buf = map_sysmem(0, BUF_SIZE);
memset(buf, '\0', BUF_SIZE);
for (i = 0; i < 0x11; i++)
@@ -275,6 +279,10 @@
u8 *buf;
int i;
+ /* This test requires writable memory at zero */
+ if (IS_ENABLED(CONFIG_X86))
+ return -EAGAIN;
+
buf = map_sysmem(0, BUF_SIZE);
memset(buf, '\0', BUF_SIZE);
for (i = 0; i < 0x11; i++)
diff --git a/test/py/requirements.txt b/test/py/requirements.txt
index f7e76bd..0f67c3c 100644
--- a/test/py/requirements.txt
+++ b/test/py/requirements.txt
@@ -8,13 +8,13 @@
importlib-metadata==0.23
linecache2==1.0.0
more-itertools==7.2.0
-packaging==21.3
+packaging==23.2
pbr==5.4.3
pluggy==0.13.0
-py==1.10.0
-pycryptodomex==3.9.8
+py==1.11.0
+pycryptodomex==3.19.1
pyelftools==0.27
-pygit2==1.9.2
+pygit2==1.13.3
pyparsing==3.0.7
pytest==6.2.5
pytest-xdist==2.5.0
diff --git a/test/py/tests/fs_helper.py b/test/py/tests/fs_helper.py
index 9882ddb..380f4c4 100644
--- a/test/py/tests/fs_helper.py
+++ b/test/py/tests/fs_helper.py
@@ -9,7 +9,7 @@
import os
from subprocess import call, check_call, check_output, CalledProcessError
-def mk_fs(config, fs_type, size, prefix):
+def mk_fs(config, fs_type, size, prefix, size_gran = 0x100000):
"""Create a file system volume
Args:
@@ -17,6 +17,7 @@
fs_type (str): File system type, e.g. 'ext4'
size (int): Size of file system in bytes
prefix (str): Prefix string of volume's file name
+ size_gran (int): Size granularity of file system image in bytes
Raises:
CalledProcessError: if any error occurs when creating the filesystem
@@ -24,7 +25,9 @@
fs_img = f'{prefix}.{fs_type}.img'
fs_img = os.path.join(config.persistent_data_dir, fs_img)
- if fs_type == 'fat16':
+ if fs_type == 'fat12':
+ mkfs_opt = '-F 12'
+ elif fs_type == 'fat16':
mkfs_opt = '-F 16'
elif fs_type == 'fat32':
mkfs_opt = '-F 32'
@@ -36,7 +39,7 @@
else:
fs_lnxtype = fs_type
- count = (size + 0x100000 - 1) // 0x100000
+ count = (size + size_gran - 1) // size_gran
# Some distributions do not add /sbin to the default PATH, where mkfs lives
if '/sbin' not in os.environ["PATH"].split(os.pathsep):
@@ -44,7 +47,7 @@
try:
check_call(f'rm -f {fs_img}', shell=True)
- check_call(f'dd if=/dev/zero of={fs_img} bs=1M count={count}',
+ check_call(f'dd if=/dev/zero of={fs_img} bs={size_gran} count={count}',
shell=True)
check_call(f'mkfs.{fs_lnxtype} {mkfs_opt} {fs_img}', shell=True)
if fs_type == 'ext4':
diff --git a/test/py/tests/test_bootstage.py b/test/py/tests/test_bootstage.py
new file mode 100644
index 0000000..a9eb9f0
--- /dev/null
+++ b/test/py/tests/test_bootstage.py
@@ -0,0 +1,67 @@
+# SPDX-License-Identifier: GPL-2.0
+# (C) Copyright 2023, Advanced Micro Devices, Inc.
+
+import pytest
+
+"""
+Test the bootstage command.
+
+It is used for checking the boot progress and timing by printing the bootstage
+report, stashes the data into memory and unstashes the data from memory.
+
+Note: This test relies on boardenv_* containing configuration values to define
+the data size, memory address, and bootstage magic address (defined in
+common/bootstage.c). Without this, bootstage stash and unstash tests will be
+automatically skipped.
+
+For example:
+env__bootstage_cmd_file = {
+ 'addr': 0x200000,
+ 'size': 0x1000,
+ 'bootstage_magic_addr': 0xb00757a3,
+}
+"""
+
+@pytest.mark.buildconfigspec('bootstage')
+@pytest.mark.buildconfigspec('cmd_bootstage')
+def test_bootstage_report(u_boot_console):
+ output = u_boot_console.run_command('bootstage report')
+ assert 'Timer summary in microseconds' in output
+ assert 'Accumulated time:' in output
+ assert 'dm_r' in output
+
+@pytest.mark.buildconfigspec('bootstage')
+@pytest.mark.buildconfigspec('cmd_bootstage')
+@pytest.mark.buildconfigspec('bootstage_stash')
+def test_bootstage_stash(u_boot_console):
+ f = u_boot_console.config.env.get('env__bootstage_cmd_file', None)
+ if not f:
+ pytest.skip('No bootstage environment file is defined')
+
+ addr = f.get('addr')
+ size = f.get('size')
+ bootstage_magic = f.get('bootstage_magic_addr')
+ expected_text = 'dm_r'
+
+ u_boot_console.run_command('bootstage stash %x %x' % (addr, size))
+ output = u_boot_console.run_command('echo $?')
+ assert output.endswith('0')
+
+ output = u_boot_console.run_command('md %x 100' % addr)
+
+ # Check BOOTSTAGE_MAGIC address at 4th byte address
+ assert '0x' + output.split('\n')[0].split()[4] == hex(bootstage_magic)
+
+ # Check expected string in last column of output
+ output_last_col = ''.join([i.split()[-1] for i in output.split('\n')])
+ assert expected_text in output_last_col
+ return addr, size
+
+@pytest.mark.buildconfigspec('bootstage')
+@pytest.mark.buildconfigspec('cmd_bootstage')
+@pytest.mark.buildconfigspec('bootstage_stash')
+def test_bootstage_unstash(u_boot_console):
+ addr, size = test_bootstage_stash(u_boot_console)
+ u_boot_console.run_command('bootstage unstash %x %x' % (addr, size))
+ output = u_boot_console.run_command('echo $?')
+ assert output.endswith('0')
diff --git a/test/py/tests/test_cleanup_build.py b/test/py/tests/test_cleanup_build.py
index 5206ff7..aca90cb 100644
--- a/test/py/tests/test_cleanup_build.py
+++ b/test/py/tests/test_cleanup_build.py
@@ -17,6 +17,11 @@
@pytest.fixture
def tmp_copy_of_builddir(u_boot_config, tmp_path):
"""For each test, provide a temporary copy of the initial build directory."""
+ if os.path.realpath(u_boot_config.source_dir) == os.path.realpath(
+ u_boot_config.build_dir
+ ):
+ pytest.skip("Leftover detection requires out of tree build.")
+ return None
shutil.copytree(
u_boot_config.build_dir,
tmp_path,
diff --git a/test/py/tests/test_fit.py b/test/py/tests/test_fit.py
index f458484..8f9c4b2 100755
--- a/test/py/tests/test_fit.py
+++ b/test/py/tests/test_fit.py
@@ -339,6 +339,14 @@
'U-Boot loaded FDT from offset %#x, FDT is actually at %#x' %
(fit_offset, real_fit_offset))
+ # Check if bootargs strings substitution works
+ output = cons.run_command_list([
+ 'env set bootargs \\\"\'my_boot_var=${foo}\'\\\"',
+ 'env set foo bar',
+ 'bootm prep',
+ 'env print bootargs'])
+ assert 'bootargs="my_boot_var=bar"' in output, "Bootargs strings not substituted"
+
# Now a kernel and an FDT
with cons.log.section('Kernel + FDT load'):
params['fdt_load'] = 'load = <%#x>;' % params['fdt_addr']
@@ -390,10 +398,10 @@
cons = u_boot_console
+ # We need to use our own device tree file. Remember to restore it
+ # afterwards.
+ old_dtb = cons.config.dtb
try:
- # We need to use our own device tree file. Remember to restore it
- # afterwards.
- old_dtb = cons.config.dtb
mkimage = cons.config.build_dir + '/tools/mkimage'
run_fit_test(mkimage)
finally:
diff --git a/test/py/tests/test_fs/conftest.py b/test/py/tests/test_fs/conftest.py
index 0d87d18..fca5448 100644
--- a/test/py/tests/test_fs/conftest.py
+++ b/test/py/tests/test_fs/conftest.py
@@ -9,12 +9,14 @@
from subprocess import call, check_call, check_output, CalledProcessError
from fstest_defs import *
import u_boot_utils as util
+# pylint: disable=E0611
from tests import fs_helper
supported_fs_basic = ['fat16', 'fat32', 'ext4']
-supported_fs_ext = ['fat16', 'fat32']
-supported_fs_mkdir = ['fat16', 'fat32']
-supported_fs_unlink = ['fat16', 'fat32']
+supported_fs_ext = ['fat12', 'fat16', 'fat32']
+supported_fs_fat = ['fat12', 'fat16']
+supported_fs_mkdir = ['fat12', 'fat16', 'fat32']
+supported_fs_unlink = ['fat12', 'fat16', 'fat32']
supported_fs_symlink = ['ext4']
#
@@ -49,6 +51,7 @@
"""
global supported_fs_basic
global supported_fs_ext
+ global supported_fs_fat
global supported_fs_mkdir
global supported_fs_unlink
global supported_fs_symlink
@@ -61,6 +64,7 @@
print('*** FS TYPE modified: %s' % supported_fs)
supported_fs_basic = intersect(supported_fs, supported_fs_basic)
supported_fs_ext = intersect(supported_fs, supported_fs_ext)
+ supported_fs_fat = intersect(supported_fs, supported_fs_fat)
supported_fs_mkdir = intersect(supported_fs, supported_fs_mkdir)
supported_fs_unlink = intersect(supported_fs, supported_fs_unlink)
supported_fs_symlink = intersect(supported_fs, supported_fs_symlink)
@@ -83,6 +87,9 @@
if 'fs_obj_ext' in metafunc.fixturenames:
metafunc.parametrize('fs_obj_ext', supported_fs_ext,
indirect=True, scope='module')
+ if 'fs_obj_fat' in metafunc.fixturenames:
+ metafunc.parametrize('fs_obj_fat', supported_fs_fat,
+ indirect=True, scope='module')
if 'fs_obj_mkdir' in metafunc.fixturenames:
metafunc.parametrize('fs_obj_mkdir', supported_fs_mkdir,
indirect=True, scope='module')
@@ -624,3 +631,44 @@
finally:
call('rmdir %s' % mount_dir, shell=True)
call('rm -f %s' % fs_img, shell=True)
+
+#
+# Fixture for fat test
+#
+@pytest.fixture()
+def fs_obj_fat(request, u_boot_config):
+ """Set up a file system to be used in fat test.
+
+ Args:
+ request: Pytest request object.
+ u_boot_config: U-Boot configuration.
+
+ Return:
+ A fixture for fat test, i.e. a duplet of file system type and
+ volume file name.
+ """
+
+ # the maximum size of a FAT12 filesystem resulting in 4084 clusters
+ MAX_FAT12_SIZE = 261695 * 1024
+
+ # the minimum size of a FAT16 filesystem that can be created with
+ # mkfs.vfat resulting in 4087 clusters
+ MIN_FAT16_SIZE = 8208 * 1024
+
+ fs_type = request.param
+ fs_img = ''
+
+ fs_ubtype = fstype_to_ubname(fs_type)
+ check_ubconfig(u_boot_config, fs_ubtype)
+
+ fs_size = MAX_FAT12_SIZE if fs_type == 'fat12' else MIN_FAT16_SIZE
+
+ try:
+ # the volume size depends on the filesystem
+ fs_img = fs_helper.mk_fs(u_boot_config, fs_type, fs_size, f'{fs_size}', 1024)
+ except:
+ pytest.skip('Setup failed for filesystem: ' + fs_type)
+ return
+ else:
+ yield [fs_ubtype, fs_img]
+ call('rm -f %s' % fs_img, shell=True)
diff --git a/test/py/tests/test_fs/test_fs_fat.py b/test/py/tests/test_fs/test_fs_fat.py
new file mode 100644
index 0000000..4009d0b
--- /dev/null
+++ b/test/py/tests/test_fs/test_fs_fat.py
@@ -0,0 +1,25 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (c) 2023 Weidmüller Interface GmbH & Co. KG
+# Author: Christian Taedcke <christian.taedcke@weidmueller.com>
+#
+# U-Boot File System: FAT Test
+
+"""
+This test verifies fat specific file system behaviour.
+"""
+
+import pytest
+import re
+
+@pytest.mark.boardspec('sandbox')
+@pytest.mark.slow
+class TestFsFat(object):
+ def test_fs_fat1(self, u_boot_console, fs_obj_fat):
+ """Test that `fstypes` prints a result which includes `sandbox`."""
+ fs_type,fs_img = fs_obj_fat
+ with u_boot_console.log.section('Test Case 1 - fatinfo'):
+ # Test Case 1 - ls
+ output = u_boot_console.run_command_list([
+ 'host bind 0 %s' % fs_img,
+ 'fatinfo host 0:0'])
+ assert(re.search('Filesystem: %s' % fs_type.upper(), ''.join(output)))
diff --git a/test/py/tests/test_gpio.py b/test/py/tests/test_gpio.py
index 0af186f..3e16e63 100644
--- a/test/py/tests/test_gpio.py
+++ b/test/py/tests/test_gpio.py
@@ -85,6 +85,13 @@
'gpio_ip_pin_clear':'66',
'gpio_clear_value': 'value is 0',
'gpio_set_value': 'value is 1',
+ # GPIO pin list to test gpio functionality for each pins, pin should be
+ # pin names (str)
+ 'gpio_pin_list': ['gpio@1000031', 'gpio@1000032', 'gpio@20000033'],
+ # GPIO input output list for shorted gpio pins to test gpio
+ # functionality for each of pairs, where the first element is
+ # configured as input and second as output
+ 'gpio_ip_op_list': [['gpio0', 'gpio1'], ['gpio2', 'gpio3']],
}
"""
@@ -223,3 +230,86 @@
response = u_boot_console.run_command(cmd)
good_response = gpio_set_value
assert good_response in response
+
+@pytest.mark.buildconfigspec('cmd_gpio')
+def test_gpio_pins_generic(u_boot_console):
+ """Test various gpio related functionality, such as the input, set, clear,
+ and toggle for the set of gpio pin list.
+
+ Specific set of gpio pins (by mentioning gpio pin name) configured as
+ input (mentioned as 'gpio_pin_list') to be tested for multiple gpio
+ commands.
+ """
+
+ f = u_boot_console.config.env.get('env__gpio_dev_config', False)
+ if not f:
+ pytest.skip('gpio not configured')
+
+ gpio_pins = f.get('gpio_pin_list', None)
+ if not gpio_pins:
+ pytest.skip('gpio pin list are not configured')
+
+ for gpin in gpio_pins:
+ # gpio input
+ u_boot_console.run_command(f'gpio input {gpin}')
+ expected_response = f'{gpin}: input:'
+ response = u_boot_console.run_command(f'gpio status -a {gpin}')
+ assert expected_response in response
+
+ # gpio set
+ u_boot_console.run_command(f'gpio set {gpin}')
+ expected_response = f'{gpin}: output: 1'
+ response = u_boot_console.run_command(f'gpio status -a {gpin}')
+ assert expected_response in response
+
+ # gpio clear
+ u_boot_console.run_command(f'gpio clear {gpin}')
+ expected_response = f'{gpin}: output: 0'
+ response = u_boot_console.run_command(f'gpio status -a {gpin}')
+ assert expected_response in response
+
+ # gpio toggle
+ u_boot_console.run_command(f'gpio toggle {gpin}')
+ expected_response = f'{gpin}: output: 1'
+ response = u_boot_console.run_command(f'gpio status -a {gpin}')
+ assert expected_response in response
+
+@pytest.mark.buildconfigspec('cmd_gpio')
+def test_gpio_pins_input_output_generic(u_boot_console):
+ """Test gpio related functionality such as input and output for the list of
+ shorted gpio pins provided as a pair of input and output pins. This test
+ will fail, if the gpio pins are not shorted properly.
+
+ Specific set of shorted gpio pins (by mentioning gpio pin name)
+ configured as input and output (mentioned as 'gpio_ip_op_list') as a
+ pair to be tested for gpio input output case.
+ """
+
+ f = u_boot_console.config.env.get('env__gpio_dev_config', False)
+ if not f:
+ pytest.skip('gpio not configured')
+
+ gpio_pins = f.get('gpio_ip_op_list', None)
+ if not gpio_pins:
+ pytest.skip('gpio pin list for input and output are not configured')
+
+ for gpins in gpio_pins:
+ u_boot_console.run_command(f'gpio input {gpins[0]}')
+ expected_response = f'{gpins[0]}: input:'
+ response = u_boot_console.run_command(f'gpio status -a {gpins[0]}')
+ assert expected_response in response
+
+ u_boot_console.run_command(f'gpio set {gpins[1]}')
+ expected_response = f'{gpins[1]}: output:'
+ response = u_boot_console.run_command(f'gpio status -a {gpins[1]}')
+ assert expected_response in response
+
+ u_boot_console.run_command(f'gpio clear {gpins[1]}')
+ expected_response = f'{gpins[0]}: input: 0'
+ response = u_boot_console.run_command(f'gpio status -a {gpins[0]}')
+ assert expected_response in response
+
+ u_boot_console.run_command(f'gpio set {gpins[1]}')
+ expected_response = f'{gpins[0]}: input: 1'
+ response = u_boot_console.run_command(f'gpio status -a {gpins[0]}')
+ assert expected_response in response
diff --git a/test/py/tests/test_hush_if_test.py b/test/py/tests/test_hush_if_test.py
deleted file mode 100644
index 3b4b6fc..0000000
--- a/test/py/tests/test_hush_if_test.py
+++ /dev/null
@@ -1,197 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0
-# Copyright (c) 2015-2016, NVIDIA CORPORATION. All rights reserved.
-
-# Test operation of the "if" shell command.
-
-import os
-import os.path
-import pytest
-
-# TODO: These tests should be converted to a C test.
-# For more information please take a look at the thread
-# https://lists.denx.de/pipermail/u-boot/2019-October/388732.html
-
-pytestmark = pytest.mark.buildconfigspec('hush_parser')
-
-# The list of "if test" conditions to test.
-subtests = (
- # Base if functionality.
-
- ('true', True),
- ('false', False),
-
- # Basic operators.
-
- ('test aaa = aaa', True),
- ('test aaa = bbb', False),
-
- ('test aaa != bbb', True),
- ('test aaa != aaa', False),
-
- ('test aaa < bbb', True),
- ('test bbb < aaa', False),
-
- ('test bbb > aaa', True),
- ('test aaa > bbb', False),
-
- ('test 123 -eq 123', True),
- ('test 123 -eq 456', False),
-
- ('test 123 -ne 456', True),
- ('test 123 -ne 123', False),
-
- ('test 123 -lt 456', True),
- ('test 123 -lt 123', False),
- ('test 456 -lt 123', False),
-
- ('test 123 -le 456', True),
- ('test 123 -le 123', True),
- ('test 456 -le 123', False),
-
- ('test 456 -gt 123', True),
- ('test 123 -gt 123', False),
- ('test 123 -gt 456', False),
-
- ('test 456 -ge 123', True),
- ('test 123 -ge 123', True),
- ('test 123 -ge 456', False),
-
- # Octal tests
-
- ('test 010 -eq 010', True),
- ('test 010 -eq 011', False),
-
- ('test 010 -ne 011', True),
- ('test 010 -ne 010', False),
-
- # Hexadecimal tests
-
- ('test 0x2000000 -gt 0x2000001', False),
- ('test 0x2000000 -gt 0x2000000', False),
- ('test 0x2000000 -gt 0x1ffffff', True),
-
- # Mixed tests
-
- ('test 010 -eq 10', False),
- ('test 010 -ne 10', True),
- ('test 0xa -eq 10', True),
- ('test 0xa -eq 012', True),
-
- ('test 2000000 -gt 0x1ffffff', False),
- ('test 0x2000000 -gt 1ffffff', True),
- ('test 0x2000000 -lt 1ffffff', False),
- ('test 0x2000000 -eq 2000000', False),
- ('test 0x2000000 -ne 2000000', True),
-
- ('test -z ""', True),
- ('test -z "aaa"', False),
-
- ('test -n "aaa"', True),
- ('test -n ""', False),
-
- # Inversion of simple tests.
-
- ('test ! aaa = aaa', False),
- ('test ! aaa = bbb', True),
- ('test ! ! aaa = aaa', True),
- ('test ! ! aaa = bbb', False),
-
- # Binary operators.
-
- ('test aaa != aaa -o bbb != bbb', False),
- ('test aaa != aaa -o bbb = bbb', True),
- ('test aaa = aaa -o bbb != bbb', True),
- ('test aaa = aaa -o bbb = bbb', True),
-
- ('test aaa != aaa -a bbb != bbb', False),
- ('test aaa != aaa -a bbb = bbb', False),
- ('test aaa = aaa -a bbb != bbb', False),
- ('test aaa = aaa -a bbb = bbb', True),
-
- # Inversion within binary operators.
-
- ('test ! aaa != aaa -o ! bbb != bbb', True),
- ('test ! aaa != aaa -o ! bbb = bbb', True),
- ('test ! aaa = aaa -o ! bbb != bbb', True),
- ('test ! aaa = aaa -o ! bbb = bbb', False),
-
- ('test ! ! aaa != aaa -o ! ! bbb != bbb', False),
- ('test ! ! aaa != aaa -o ! ! bbb = bbb', True),
- ('test ! ! aaa = aaa -o ! ! bbb != bbb', True),
- ('test ! ! aaa = aaa -o ! ! bbb = bbb', True),
-)
-
-def exec_hush_if(u_boot_console, expr, result):
- """Execute a shell "if" command, and validate its result."""
-
- config = u_boot_console.config.buildconfig
- maxargs = int(config.get('config_sys_maxargs', '0'))
- args = len(expr.split(' ')) - 1
- if args > maxargs:
- u_boot_console.log.warning('CONFIG_SYS_MAXARGS too low; need ' +
- str(args))
- pytest.skip()
-
- cmd = 'if ' + expr + '; then echo true; else echo false; fi'
- response = u_boot_console.run_command(cmd)
- assert response.strip() == str(result).lower()
-
-@pytest.mark.buildconfigspec('cmd_echo')
-@pytest.mark.parametrize('expr,result', subtests)
-def test_hush_if_test(u_boot_console, expr, result):
- """Test a single "if test" condition."""
-
- exec_hush_if(u_boot_console, expr, result)
-
-def test_hush_z(u_boot_console):
- """Test the -z operator"""
- u_boot_console.run_command('setenv ut_var_nonexistent')
- u_boot_console.run_command('setenv ut_var_exists 1')
- exec_hush_if(u_boot_console, 'test -z "$ut_var_nonexistent"', True)
- exec_hush_if(u_boot_console, 'test -z "$ut_var_exists"', False)
- u_boot_console.run_command('setenv ut_var_exists')
-
-# We might test this on real filesystems via UMS, DFU, 'save', etc.
-# Of those, only UMS currently allows file removal though.
-@pytest.mark.buildconfigspec('cmd_echo')
-@pytest.mark.boardspec('sandbox')
-def test_hush_if_test_host_file_exists(u_boot_console):
- """Test the "if test -e" shell command."""
-
- test_file = u_boot_console.config.result_dir + \
- '/creating_this_file_breaks_u_boot_tests'
-
- try:
- os.unlink(test_file)
- except:
- pass
- assert not os.path.exists(test_file)
-
- expr = 'test -e hostfs - ' + test_file
- exec_hush_if(u_boot_console, expr, False)
-
- try:
- with open(test_file, 'wb'):
- pass
- assert os.path.exists(test_file)
-
- expr = 'test -e hostfs - ' + test_file
- exec_hush_if(u_boot_console, expr, True)
- finally:
- os.unlink(test_file)
-
- expr = 'test -e hostfs - ' + test_file
- exec_hush_if(u_boot_console, expr, False)
-
-def test_hush_var(u_boot_console):
- """Test the set and unset of variables"""
- u_boot_console.run_command('ut_var_nonexistent=')
- u_boot_console.run_command('ut_var_exists=1')
- u_boot_console.run_command('ut_var_unset=1')
- exec_hush_if(u_boot_console, 'test -z "$ut_var_nonexistent"', True)
- exec_hush_if(u_boot_console, 'test -z "$ut_var_exists"', False)
- exec_hush_if(u_boot_console, 'test -z "$ut_var_unset"', False)
- exec_hush_if(u_boot_console, 'ut_var_unset=', True)
- exec_hush_if(u_boot_console, 'test -z "$ut_var_unset"', True)
- u_boot_console.run_command('ut_var_exists=')
- u_boot_console.run_command('ut_var_unset=')
diff --git a/test/py/tests/test_i2c.py b/test/py/tests/test_i2c.py
new file mode 100644
index 0000000..825d0c2
--- /dev/null
+++ b/test/py/tests/test_i2c.py
@@ -0,0 +1,116 @@
+# SPDX-License-Identifier: GPL-2.0
+# (C) Copyright 2023, Advanced Micro Devices, Inc.
+
+import pytest
+import random
+import re
+
+"""
+Note: This test relies on boardenv_* containing configuration values to define
+the i2c device info including the bus list and eeprom address/value. This test
+will be automatically skipped without this.
+
+For example:
+
+# Setup env__i2c_device_test to set the i2c bus list and probe_all boolean
+# parameter. For i2c_probe_all_buses case, if probe_all parameter is set to
+# False then it probes all the buses listed in bus_list instead of probing all
+# the buses available.
+env__i2c_device_test = {
+ 'bus_list': [0, 2, 5, 12, 16, 18],
+ 'probe_all': False,
+}
+
+# Setup env__i2c_eeprom_device_test to set the i2c bus number, eeprom address
+# and configured value for i2c_eeprom test case. Test will be skipped if
+# env__i2c_eeprom_device_test is not set
+env__i2c_eeprom_device_test = {
+ 'bus': 3,
+ 'eeprom_addr': 0x54,
+ 'eeprom_val': '30 31',
+}
+"""
+
+def get_i2c_test_env(u_boot_console):
+ f = u_boot_console.config.env.get("env__i2c_device_test", None)
+ if not f:
+ pytest.skip("No I2C device to test!")
+ else:
+ bus_list = f.get("bus_list", None)
+ if not bus_list:
+ pytest.skip("I2C bus list is not provided!")
+ probe_all = f.get("probe_all", False)
+ return bus_list, probe_all
+
+@pytest.mark.buildconfigspec("cmd_i2c")
+def test_i2c_bus(u_boot_console):
+ bus_list, probe = get_i2c_test_env(u_boot_console)
+ bus = random.choice(bus_list)
+ expected_response = f"Bus {bus}:"
+ response = u_boot_console.run_command("i2c bus")
+ assert expected_response in response
+
+@pytest.mark.buildconfigspec("cmd_i2c")
+def test_i2c_dev(u_boot_console):
+ bus_list, probe = get_i2c_test_env(u_boot_console)
+ expected_response = "Current bus is"
+ response = u_boot_console.run_command("i2c dev")
+ assert expected_response in response
+
+@pytest.mark.buildconfigspec("cmd_i2c")
+def test_i2c_probe(u_boot_console):
+ bus_list, probe = get_i2c_test_env(u_boot_console)
+ bus = random.choice(bus_list)
+ expected_response = f"Setting bus to {bus}"
+ response = u_boot_console.run_command(f"i2c dev {bus}")
+ assert expected_response in response
+ expected_response = "Valid chip addresses:"
+ response = u_boot_console.run_command("i2c probe")
+ assert expected_response in response
+
+@pytest.mark.buildconfigspec("cmd_i2c")
+def test_i2c_eeprom(u_boot_console):
+ f = u_boot_console.config.env.get("env__i2c_eeprom_device_test", None)
+ if not f:
+ pytest.skip("No I2C eeprom to test!")
+
+ bus = f.get("bus", 0)
+ if bus < 0:
+ pytest.fail("No bus specified via env__i2c_eeprom_device_test!")
+
+ addr = f.get("eeprom_addr", -1)
+ if addr < 0:
+ pytest.fail("No eeprom address specified via env__i2c_eeprom_device_test!")
+
+ value = f.get("eeprom_val")
+ if not value:
+ pytest.fail(
+ "No eeprom configured value provided via env__i2c_eeprom_device_test!"
+ )
+
+ # Enable i2c mux bridge
+ u_boot_console.run_command("i2c dev %x" % bus)
+ u_boot_console.run_command("i2c probe")
+ output = u_boot_console.run_command("i2c md %x 0 5" % addr)
+ assert value in output
+
+@pytest.mark.buildconfigspec("cmd_i2c")
+def test_i2c_probe_all_buses(u_boot_console):
+ bus_list, probe = get_i2c_test_env(u_boot_console)
+ bus = random.choice(bus_list)
+ expected_response = f"Bus {bus}:"
+ response = u_boot_console.run_command("i2c bus")
+ assert expected_response in response
+
+ # Get all the bus list
+ if probe:
+ buses = re.findall("Bus (.+?):", response)
+ bus_list = [int(x) for x in buses]
+
+ for dev in bus_list:
+ expected_response = f"Setting bus to {dev}"
+ response = u_boot_console.run_command(f"i2c dev {dev}")
+ assert expected_response in response
+ expected_response = "Valid chip addresses:"
+ response = u_boot_console.run_command("i2c probe")
+ assert expected_response in response
diff --git a/test/py/tests/test_mdio.py b/test/py/tests/test_mdio.py
new file mode 100644
index 0000000..89711e7
--- /dev/null
+++ b/test/py/tests/test_mdio.py
@@ -0,0 +1,79 @@
+# SPDX-License-Identifier: GPL-2.0
+# (C) Copyright 2023, Advanced Micro Devices, Inc.
+
+import pytest
+import re
+
+"""
+Note: This test relies on boardenv_* containing configuration values to define
+the PHY device info including the device name, address, register address/value
+and write data value. This test will be automatically skipped without this.
+
+For example:
+
+# Setup env__mdio_util_test to set the PHY address, device names, register
+# address, register address value, and write data value to test mdio commands.
+# Test will be skipped if env_mdio_util_test is not set
+env__mdio_util_test = {
+ "eth0": {"phy_addr": 0xc, "device_name": "TI DP83867", "reg": 0,
+ "reg_val": 0x1000, "write_val": 0x100},
+ "eth1": {"phy_addr": 0xa0, "device_name": "TI DP83867", "reg": 1,
+ "reg_val": 0x2000, "write_val": 0x100},
+}
+"""
+
+def get_mdio_test_env(u_boot_console):
+ f = u_boot_console.config.env.get("env__mdio_util_test", None)
+ if not f or len(f) == 0:
+ pytest.skip("No PHY device to test!")
+ else:
+ return f
+
+@pytest.mark.buildconfigspec("cmd_mii")
+@pytest.mark.buildconfigspec("phylib")
+def test_mdio_list(u_boot_console):
+ f = get_mdio_test_env(u_boot_console)
+ output = u_boot_console.run_command("mdio list")
+ for dev, val in f.items():
+ phy_addr = val.get("phy_addr")
+ dev_name = val.get("device_name")
+
+ assert f"{phy_addr:x} -" in output
+ assert dev_name in output
+
+@pytest.mark.buildconfigspec("cmd_mii")
+@pytest.mark.buildconfigspec("phylib")
+def test_mdio_read(u_boot_console):
+ f = get_mdio_test_env(u_boot_console)
+ output = u_boot_console.run_command("mdio list")
+ for dev, val in f.items():
+ phy_addr = hex(val.get("phy_addr"))
+ dev_name = val.get("device_name")
+ reg = hex(val.get("reg"))
+ reg_val = hex(val.get("reg_val"))
+
+ output = u_boot_console.run_command(f"mdio read {phy_addr} {reg}")
+ assert f"PHY at address {int(phy_addr, 16):x}:" in output
+ assert f"{int(reg, 16):x} - {reg_val}" in output
+
+@pytest.mark.buildconfigspec("cmd_mii")
+@pytest.mark.buildconfigspec("phylib")
+def test_mdio_write(u_boot_console):
+ f = get_mdio_test_env(u_boot_console)
+ output = u_boot_console.run_command("mdio list")
+ for dev, val in f.items():
+ phy_addr = hex(val.get("phy_addr"))
+ dev_name = val.get("device_name")
+ reg = hex(val.get("reg"))
+ reg_val = hex(val.get("reg_val"))
+ wr_val = hex(val.get("write_val"))
+
+ u_boot_console.run_command(f"mdio write {phy_addr} {reg} {wr_val}")
+ output = u_boot_console.run_command(f"mdio read {phy_addr} {reg}")
+ assert f"PHY at address {int(phy_addr, 16):x}:" in output
+ assert f"{int(reg, 16):x} - {wr_val}" in output
+
+ u_boot_console.run_command(f"mdio write {phy_addr} {reg} {reg_val}")
+ output = u_boot_console.run_command(f"mdio read {phy_addr} {reg}")
+ assert f"PHY at address {int(phy_addr, 16):x}:" in output
+ assert f"{int(reg, 16):x} - {reg_val}" in output
diff --git a/test/py/tests/test_memtest.py b/test/py/tests/test_memtest.py
new file mode 100644
index 0000000..0618d96
--- /dev/null
+++ b/test/py/tests/test_memtest.py
@@ -0,0 +1,68 @@
+# SPDX-License-Identifier: GPL-2.0
+# (C) Copyright 2023, Advanced Micro Devices, Inc.
+
+import pytest
+
+"""
+Note: This test relies on boardenv_* containing configuration values to define
+the memory test parameters such as start address, memory size, pattern,
+iterations and timeout. This test will be automatically skipped without this.
+
+For example:
+
+# Setup env__memtest to set the start address of the memory range, size of the
+# memory range to test from starting address, pattern to be written to memory,
+# number of test iterations, and expected time to complete the test of mtest
+# command. start address, size, and pattern parameters value should be in hex
+# and rest of the params value should be integer.
+env__memtest = {
+ 'start_addr': 0x0,
+ 'size': 0x1000,
+ 'pattern': 0x0,
+ 'iteration': 16,
+ 'timeout': 50000,
+}
+"""
+
+def get_memtest_env(u_boot_console):
+ f = u_boot_console.config.env.get("env__memtest", None)
+ if not f:
+ pytest.skip("memtest is not enabled!")
+ else:
+ start = f.get("start_addr", 0x0)
+ size = f.get("size", 0x1000)
+ pattern = f.get("pattern", 0x0)
+ iteration = f.get("iteration", 2)
+ timeout = f.get("timeout", 50000)
+ end = hex(int(start) + int(size))
+ return start, end, pattern, iteration, timeout
+
+@pytest.mark.buildconfigspec("cmd_memtest")
+def test_memtest_negative(u_boot_console):
+ """Negative testcase where end address is smaller than starting address and
+ pattern is invalid."""
+ start, end, pattern, iteration, timeout = get_memtest_env(u_boot_console)
+ expected_response = "Refusing to do empty test"
+ response = u_boot_console.run_command(
+ f"mtest 2000 1000 {pattern} {hex(iteration)}"
+ )
+ assert expected_response in response
+ output = u_boot_console.run_command("echo $?")
+ assert not output.endswith("0")
+ u_boot_console.run_command(f"mtest {start} {end} 'xyz' {hex(iteration)}")
+ output = u_boot_console.run_command("echo $?")
+ assert not output.endswith("0")
+
+@pytest.mark.buildconfigspec("cmd_memtest")
+def test_memtest_ddr(u_boot_console):
+ """Test that md reads memory as expected, and that memory can be modified
+ using the mw command."""
+ start, end, pattern, iteration, timeout = get_memtest_env(u_boot_console)
+ expected_response = f"Tested {str(iteration)} iteration(s) with 0 errors."
+ with u_boot_console.temporary_timeout(timeout):
+ response = u_boot_console.run_command(
+ f"mtest {start} {end} {pattern} {hex(iteration)}"
+ )
+ assert expected_response in response
+ output = u_boot_console.run_command("echo $?")
+ assert output.endswith("0")
diff --git a/test/py/tests/test_mii.py b/test/py/tests/test_mii.py
new file mode 100644
index 0000000..7b6816d
--- /dev/null
+++ b/test/py/tests/test_mii.py
@@ -0,0 +1,92 @@
+# SPDX-License-Identifier: GPL-2.0
+# (C) Copyright 2023, Advanced Micro Devices, Inc.
+
+import pytest
+import re
+
+"""
+Note: This test doesn't rely on boardenv_* configuration value but they can
+change test behavior.
+
+For example:
+
+# Setup env__mii_deive_test_skip to True if tests with ethernet PHY devices
+# should be skipped. For example: Missing PHY device
+env__mii_device_test_skip = True
+
+# Setup env__mii_device_test to set the MII device names. Test will be skipped
+# if env_mii_device_test is not set
+env__mii_device_test = {
+ 'device_list': ['eth0', 'eth1'],
+}
+"""
+
+@pytest.mark.buildconfigspec("cmd_mii")
+def test_mii_info(u_boot_console):
+ if u_boot_console.config.env.get("env__mii_device_test_skip", False):
+ pytest.skip("MII device test is not enabled!")
+ expected_output = "PHY"
+ output = u_boot_console.run_command("mii info")
+ if not re.search(r"PHY (.+?):", output):
+ pytest.skip("PHY device does not exist!")
+ assert expected_output in output
+
+@pytest.mark.buildconfigspec("cmd_mii")
+def test_mii_list(u_boot_console):
+ if u_boot_console.config.env.get("env__mii_device_test_skip", False):
+ pytest.skip("MII device test is not enabled!")
+
+ f = u_boot_console.config.env.get("env__mii_device_test", None)
+ if not f:
+ pytest.skip("No MII device to test!")
+
+ dev_list = f.get("device_list")
+ if not dev_list:
+ pytest.fail("No MII device list provided via env__mii_device_test!")
+
+ expected_output = "Current device"
+ output = u_boot_console.run_command("mii device")
+ mii_devices = (
+ re.search(r"MII devices: '(.+)'", output).groups()[0].replace("'", "").split()
+ )
+
+ assert len([x for x in dev_list if x in mii_devices]) == len(dev_list)
+ assert expected_output in output
+
+@pytest.mark.buildconfigspec("cmd_mii")
+def test_mii_set_device(u_boot_console):
+ test_mii_list(u_boot_console)
+ f = u_boot_console.config.env.get("env__mii_device_test", None)
+ dev_list = f.get("device_list")
+ output = u_boot_console.run_command("mii device")
+ current_dev = re.search(r"Current device: '(.+?)'", output).groups()[0]
+
+ for dev in dev_list:
+ u_boot_console.run_command(f"mii device {dev}")
+ output = u_boot_console.run_command("echo $?")
+ assert output.endswith("0")
+
+ u_boot_console.run_command(f"mii device {current_dev}")
+ output = u_boot_console.run_command("mii device")
+ dev = re.search(r"Current device: '(.+?)'", output).groups()[0]
+ assert current_dev == dev
+
+@pytest.mark.buildconfigspec("cmd_mii")
+def test_mii_read(u_boot_console):
+ test_mii_list(u_boot_console)
+ output = u_boot_console.run_command("mii info")
+ eth_addr = hex(int(re.search(r"PHY (.+?):", output).groups()[0], 16))
+ u_boot_console.run_command(f"mii read {eth_addr} 0")
+ output = u_boot_console.run_command("echo $?")
+ assert output.endswith("0")
+
+@pytest.mark.buildconfigspec("cmd_mii")
+def test_mii_dump(u_boot_console):
+ test_mii_list(u_boot_console)
+ expected_response = "PHY control register"
+ output = u_boot_console.run_command("mii info")
+ eth_addr = hex(int(re.search(r"PHY (.+?):", output).groups()[0], 16))
+ response = u_boot_console.run_command(f"mii dump {eth_addr} 0")
+ assert expected_response in response
+ output = u_boot_console.run_command("echo $?")
+ assert output.endswith("0")
diff --git a/test/py/tests/test_mmc.py b/test/py/tests/test_mmc.py
new file mode 100644
index 0000000..a96c4e8
--- /dev/null
+++ b/test/py/tests/test_mmc.py
@@ -0,0 +1,671 @@
+# SPDX-License-Identifier: GPL-2.0
+# (C) Copyright 2023, Advanced Micro Devices, Inc.
+
+import pytest
+import random
+import re
+import u_boot_utils
+
+"""
+Note: This test doesn't rely on boardenv_* configuration values but it can
+change the test behavior. To test MMC file system cases (fat32, ext2, ext4),
+MMC device should be formatted and valid partitions should be created for
+different file system, otherwise it may leads to failure. This test will be
+skipped if the MMC device is not detected.
+
+For example:
+
+# Setup env__mmc_device_test_skip to not skipping the test. By default, its
+# value is set to True. Set it to False to run all tests for MMC device.
+env__mmc_device_test_skip = False
+"""
+
+mmc_set_up = False
+controllers = 0
+devices = {}
+
+def setup_mmc(u_boot_console):
+ if u_boot_console.config.env.get('env__mmc_device_test_skip', True):
+ pytest.skip('MMC device test is not enabled')
+
+@pytest.mark.buildconfigspec('cmd_mmc')
+def test_mmc_list(u_boot_console):
+ setup_mmc(u_boot_console)
+ output = u_boot_console.run_command('mmc list')
+ if 'No MMC device available' in output:
+ pytest.skip('No SD/MMC/eMMC controller available')
+
+ if 'Card did not respond to voltage select' in output:
+ pytest.skip('No SD/MMC card present')
+
+ array = output.split()
+ global devices
+ global controllers
+ controllers = int(len(array) / 2)
+ for x in range(0, controllers):
+ y = x * 2
+ devices[x] = {}
+ devices[x]['name'] = array[y]
+
+ global mmc_set_up
+ mmc_set_up = True
+
+@pytest.mark.buildconfigspec('cmd_mmc')
+def test_mmc_dev(u_boot_console):
+ if not mmc_set_up:
+ pytest.skip('No SD/MMC/eMMC controller available')
+
+ fail = 0
+ for x in range(0, controllers):
+ devices[x]['detected'] = 'yes'
+ output = u_boot_console.run_command('mmc dev %d' % x)
+
+ # Some sort of switch here
+ if 'Card did not respond to voltage select' in output:
+ fail = 1
+ devices[x]['detected'] = 'no'
+
+ if 'no mmc device at slot' in output:
+ devices[x]['detected'] = 'no'
+
+ if 'MMC: no card present' in output:
+ devices[x]['detected'] = 'no'
+
+ if fail:
+ pytest.fail('Card not present')
+
+@pytest.mark.buildconfigspec('cmd_mmc')
+def test_mmcinfo(u_boot_console):
+ if not mmc_set_up:
+ pytest.skip('No SD/MMC/eMMC controller available')
+
+ for x in range(0, controllers):
+ if devices[x]['detected'] == 'yes':
+ u_boot_console.run_command('mmc dev %d' % x)
+ output = u_boot_console.run_command('mmcinfo')
+ if 'busy timeout' in output:
+ pytest.skip('No SD/MMC/eMMC device present')
+
+ obj = re.search(r'Capacity: (\d+|\d+[\.]?\d)', output)
+ try:
+ capacity = float(obj.groups()[0])
+ print(capacity)
+ devices[x]['capacity'] = capacity
+ print('Capacity of dev %d is: %g GiB' % (x, capacity))
+ except ValueError:
+ pytest.fail('MMC capacity not recognized')
+
+@pytest.mark.buildconfigspec('cmd_mmc')
+def test_mmc_info(u_boot_console):
+ if not mmc_set_up:
+ pytest.skip('No SD/MMC/eMMC controller available')
+
+ for x in range(0, controllers):
+ if devices[x]['detected'] == 'yes':
+ u_boot_console.run_command('mmc dev %d' % x)
+
+ output = u_boot_console.run_command('mmc info')
+
+ obj = re.search(r'Capacity: (\d+|\d+[\.]?\d)', output)
+ try:
+ capacity = float(obj.groups()[0])
+ print(capacity)
+ if devices[x]['capacity'] != capacity:
+ pytest.fail("MMC capacity doesn't match mmcinfo")
+
+ except ValueError:
+ pytest.fail('MMC capacity not recognized')
+
+@pytest.mark.buildconfigspec('cmd_mmc')
+def test_mmc_rescan(u_boot_console):
+ if not mmc_set_up:
+ pytest.skip('No SD/MMC/eMMC controller available')
+
+ if not devices:
+ pytest.skip('No devices detected')
+
+ for x in range(0, controllers):
+ if devices[x]['detected'] == 'yes':
+ u_boot_console.run_command('mmc dev %d' % x)
+ output = u_boot_console.run_command('mmc rescan')
+ if output:
+ pytest.fail('mmc rescan has something to check')
+ output = u_boot_console.run_command('echo $?')
+ assert output.endswith('0')
+
+@pytest.mark.buildconfigspec('cmd_mmc')
+def test_mmc_part(u_boot_console):
+ if not mmc_set_up:
+ pytest.skip('No SD/MMC/eMMC controller available')
+
+ if not devices:
+ pytest.skip('No devices detected')
+
+ for x in range(0, controllers):
+ if devices[x]['detected'] == 'yes':
+ u_boot_console.run_command('mmc dev %d' % x)
+ output = u_boot_console.run_command('mmc part')
+
+ lines = output.split('\n')
+ part_fat = []
+ part_ext = []
+ for line in lines:
+ obj = re.search(
+ r'(\d)\s+\d+\s+\d+\s+\w+\d+\w+-\d+\s+(\d+\w+)', line)
+ if obj:
+ part_id = int(obj.groups()[0])
+ part_type = obj.groups()[1]
+ print('part_id:%d, part_type:%s' % (part_id, part_type))
+
+ if part_type in ['0c', '0b', '0e']:
+ print('Fat detected')
+ part_fat.append(part_id)
+ elif part_type == '83':
+ print('ext detected')
+ part_ext.append(part_id)
+ else:
+ pytest.fail('Unsupported Filesystem on device %d' % x)
+ devices[x]['ext4'] = part_ext
+ devices[x]['ext2'] = part_ext
+ devices[x]['fat'] = part_fat
+
+ if not part_ext and not part_fat:
+ pytest.fail('No partition detected on device %d' % x)
+
+@pytest.mark.buildconfigspec('cmd_mmc')
+@pytest.mark.buildconfigspec('cmd_fat')
+def test_mmc_fatls_fatinfo(u_boot_console):
+ if not mmc_set_up:
+ pytest.skip('No SD/MMC/eMMC controller available')
+
+ if not devices:
+ pytest.skip('No devices detected')
+
+ part_detect = 0
+ fs = 'fat'
+ for x in range(0, controllers):
+ if devices[x]['detected'] == 'yes':
+ u_boot_console.run_command('mmc dev %d' % x)
+ try:
+ partitions = devices[x][fs]
+ except:
+ print('No %s table on this device' % fs.upper())
+ continue
+
+ for part in partitions:
+ output = u_boot_console.run_command(
+ 'fatls mmc %d:%s' % (x, part))
+ if 'Unrecognized filesystem type' in output:
+ partitions.remove(part)
+ pytest.fail('Unrecognized filesystem')
+
+ if not re.search(r'\d file\(s\), \d dir\(s\)', output):
+ pytest.fail('%s read failed on device %d' % (fs.upper, x))
+ output = u_boot_console.run_command(
+ 'fatinfo mmc %d:%s' % (x, part))
+ string = 'Filesystem: %s' % fs.upper
+ if re.search(string, output):
+ pytest.fail('%s FS failed on device %d' % (fs.upper(), x))
+ part_detect = 1
+
+ if not part_detect:
+ pytest.skip('No %s partition detected' % fs.upper())
+
+
+@pytest.mark.buildconfigspec('cmd_mmc')
+@pytest.mark.buildconfigspec('cmd_fat')
+@pytest.mark.buildconfigspec('cmd_memory')
+def test_mmc_fatload_fatwrite(u_boot_console):
+ if not mmc_set_up:
+ pytest.skip('No SD/MMC/eMMC controller available')
+
+ if not devices:
+ pytest.skip('No devices detected')
+
+ part_detect = 0
+ fs = 'fat'
+ for x in range(0, controllers):
+ if devices[x]['detected'] == 'yes':
+ u_boot_console.run_command('mmc dev %d' % x)
+ try:
+ partitions = devices[x][fs]
+ except:
+ print('No %s table on this device' % fs.upper())
+ continue
+
+ for part in partitions:
+ part_detect = 1
+ addr = u_boot_utils.find_ram_base(u_boot_console)
+ devices[x]['addr_%d' % part] = addr
+ size = random.randint(4, 1 * 1024 * 1024)
+ devices[x]['size_%d' % part] = size
+ # count CRC32
+ output = u_boot_console.run_command('crc32 %x %x' % (addr, size))
+ m = re.search('==> (.+?)', output)
+ if not m:
+ pytest.fail('CRC32 failed')
+ expected_crc32 = m.group(1)
+ devices[x]['expected_crc32_%d' % part] = expected_crc32
+ # do write
+ file = '%s_%d' % ('uboot_test', size)
+ devices[x]['file_%d' % part] = file
+ output = u_boot_console.run_command(
+ '%swrite mmc %d:%s %x %s %x' % (fs, x, part, addr, file, size)
+ )
+ assert 'Unable to write' not in output
+ assert 'Error' not in output
+ assert 'overflow' not in output
+ expected_text = '%d bytes written' % size
+ assert expected_text in output
+
+ alignment = int(
+ u_boot_console.config.buildconfig.get(
+ 'config_sys_cacheline_size', 128
+ )
+ )
+ offset = random.randrange(alignment, 1024, alignment)
+ output = u_boot_console.run_command(
+ '%sload mmc %d:%s %x %s' % (fs, x, part, addr + offset, file)
+ )
+ assert 'Invalid FAT entry' not in output
+ assert 'Unable to read file' not in output
+ assert 'Misaligned buffer address' not in output
+ expected_text = '%d bytes read' % size
+ assert expected_text in output
+
+ output = u_boot_console.run_command(
+ 'crc32 %x $filesize' % (addr + offset)
+ )
+ assert expected_crc32 in output
+
+ if not part_detect:
+ pytest.skip('No %s partition detected' % fs.upper())
+
+@pytest.mark.buildconfigspec('cmd_mmc')
+@pytest.mark.buildconfigspec('cmd_ext4')
+def test_mmc_ext4ls(u_boot_console):
+ if not mmc_set_up:
+ pytest.skip('No SD/MMC/eMMC controller available')
+
+ if not devices:
+ pytest.skip('No devices detected')
+
+ part_detect = 0
+ fs = 'ext4'
+ for x in range(0, controllers):
+ if devices[x]['detected'] == 'yes':
+ try:
+ partitions = devices[x][fs]
+ except:
+ print('No %s table on this device' % fs.upper())
+ continue
+
+ u_boot_console.run_command('mmc dev %d' % x)
+ for part in partitions:
+ output = u_boot_console.run_command('%sls mmc %d:%s' % (fs, x, part))
+ if 'Unrecognized filesystem type' in output:
+ partitions.remove(part)
+ pytest.fail('Unrecognized filesystem')
+ part_detect = 1
+
+ if not part_detect:
+ pytest.skip('No %s partition detected' % fs.upper())
+
+@pytest.mark.buildconfigspec('cmd_mmc')
+@pytest.mark.buildconfigspec('cmd_ext4')
+@pytest.mark.buildconfigspec('ext4_write')
+@pytest.mark.buildconfigspec('cmd_memory')
+def test_mmc_ext4load_ext4write(u_boot_console):
+ if not mmc_set_up:
+ pytest.skip('No SD/MMC/eMMC controller available')
+
+ if not devices:
+ pytest.skip('No devices detected')
+
+ part_detect = 0
+ fs = 'ext4'
+ for x in range(0, controllers):
+ if devices[x]['detected'] == 'yes':
+ u_boot_console.run_command('mmc dev %d' % x)
+ try:
+ partitions = devices[x][fs]
+ except:
+ print('No %s table on this device' % fs.upper())
+ continue
+
+ for part in partitions:
+ part_detect = 1
+ addr = u_boot_utils.find_ram_base(u_boot_console)
+ devices[x]['addr_%d' % part] = addr
+ size = random.randint(4, 1 * 1024 * 1024)
+ devices[x]['size_%d' % part] = size
+ # count CRC32
+ output = u_boot_console.run_command('crc32 %x %x' % (addr, size))
+ m = re.search('==> (.+?)', output)
+ if not m:
+ pytest.fail('CRC32 failed')
+ expected_crc32 = m.group(1)
+ devices[x]['expected_crc32_%d' % part] = expected_crc32
+ # do write
+
+ file = '%s_%d' % ('uboot_test', size)
+ devices[x]['file_%d' % part] = file
+ output = u_boot_console.run_command(
+ '%swrite mmc %d:%s %x /%s %x' % (fs, x, part, addr, file, size)
+ )
+ assert 'Unable to write' not in output
+ assert 'Error' not in output
+ assert 'overflow' not in output
+ expected_text = '%d bytes written' % size
+ assert expected_text in output
+
+ offset = random.randrange(128, 1024, 128)
+ output = u_boot_console.run_command(
+ '%sload mmc %d:%s %x /%s' % (fs, x, part, addr + offset, file)
+ )
+ expected_text = '%d bytes read' % size
+ assert expected_text in output
+
+ output = u_boot_console.run_command(
+ 'crc32 %x $filesize' % (addr + offset)
+ )
+ assert expected_crc32 in output
+
+ if not part_detect:
+ pytest.skip('No %s partition detected' % fs.upper())
+
+@pytest.mark.buildconfigspec('cmd_mmc')
+@pytest.mark.buildconfigspec('cmd_ext2')
+def test_mmc_ext2ls(u_boot_console):
+ if not mmc_set_up:
+ pytest.skip('No SD/MMC/eMMC controller available')
+
+ if not devices:
+ pytest.skip('No devices detected')
+
+ part_detect = 0
+ fs = 'ext2'
+ for x in range(0, controllers):
+ if devices[x]['detected'] == 'yes':
+ u_boot_console.run_command('mmc dev %d' % x)
+ try:
+ partitions = devices[x][fs]
+ except:
+ print('No %s table on this device' % fs.upper())
+ continue
+
+ for part in partitions:
+ part_detect = 1
+ output = u_boot_console.run_command('%sls mmc %d:%s' % (fs, x, part))
+ if 'Unrecognized filesystem type' in output:
+ partitions.remove(part)
+ pytest.fail('Unrecognized filesystem')
+ part_detect = 1
+
+ if not part_detect:
+ pytest.skip('No %s partition detected' % fs.upper())
+
+@pytest.mark.buildconfigspec('cmd_mmc')
+@pytest.mark.buildconfigspec('cmd_ext2')
+@pytest.mark.buildconfigspec('cmd_ext4')
+@pytest.mark.buildconfigspec('ext4_write')
+@pytest.mark.buildconfigspec('cmd_memory')
+def test_mmc_ext2load(u_boot_console):
+ if not mmc_set_up:
+ pytest.skip('No SD/MMC/eMMC controller available')
+
+ if not devices:
+ pytest.skip('No devices detected')
+
+ part_detect = 0
+ fs = 'ext2'
+ for x in range(0, controllers):
+ if devices[x]['detected'] == 'yes':
+ u_boot_console.run_command('mmc dev %d' % x)
+ try:
+ partitions = devices[x][fs]
+ except:
+ print('No %s table on this device' % fs.upper())
+ continue
+
+ for part in partitions:
+ part_detect = 1
+ addr = devices[x]['addr_%d' % part]
+ size = devices[x]['size_%d' % part]
+ expected_crc32 = devices[x]['expected_crc32_%d' % part]
+ file = devices[x]['file_%d' % part]
+
+ offset = random.randrange(128, 1024, 128)
+ output = u_boot_console.run_command(
+ '%sload mmc %d:%s %x /%s' % (fs, x, part, addr + offset, file)
+ )
+ expected_text = '%d bytes read' % size
+ assert expected_text in output
+
+ output = u_boot_console.run_command(
+ 'crc32 %x $filesize' % (addr + offset)
+ )
+ assert expected_crc32 in output
+
+ if not part_detect:
+ pytest.skip('No %s partition detected' % fs.upper())
+
+@pytest.mark.buildconfigspec('cmd_mmc')
+@pytest.mark.buildconfigspec('cmd_fs_generic')
+def test_mmc_ls(u_boot_console):
+ if not mmc_set_up:
+ pytest.skip('No SD/MMC/eMMC controller available')
+
+ if not devices:
+ pytest.skip('No devices detected')
+
+ part_detect = 0
+ for x in range(0, controllers):
+ if devices[x]['detected'] == 'yes':
+ u_boot_console.run_command('mmc dev %d' % x)
+ for fs in ['fat', 'ext4']:
+ try:
+ partitions = devices[x][fs]
+ except:
+ print('No %s table on this device' % fs.upper())
+ continue
+
+ for part in partitions:
+ part_detect = 1
+ output = u_boot_console.run_command('ls mmc %d:%s' % (x, part))
+ if re.search(r'No \w+ table on this device', output):
+ pytest.fail(
+ '%s: Partition table not found %d' % (fs.upper(), x)
+ )
+
+ if not part_detect:
+ pytest.skip('No partition detected')
+
+@pytest.mark.buildconfigspec('cmd_mmc')
+@pytest.mark.buildconfigspec('cmd_fs_generic')
+def test_mmc_load(u_boot_console):
+ if not mmc_set_up:
+ pytest.skip('No SD/MMC/eMMC controller available')
+
+ if not devices:
+ pytest.skip('No devices detected')
+
+ part_detect = 0
+ for x in range(0, controllers):
+ if devices[x]['detected'] == 'yes':
+ u_boot_console.run_command('mmc dev %d' % x)
+ for fs in ['fat', 'ext4']:
+ try:
+ partitions = devices[x][fs]
+ except:
+ print('No %s table on this device' % fs.upper())
+ continue
+
+ for part in partitions:
+ part_detect = 1
+ addr = devices[x]['addr_%d' % part]
+ size = devices[x]['size_%d' % part]
+ expected_crc32 = devices[x]['expected_crc32_%d' % part]
+ file = devices[x]['file_%d' % part]
+
+ offset = random.randrange(128, 1024, 128)
+ output = u_boot_console.run_command(
+ 'load mmc %d:%s %x /%s' % (x, part, addr + offset, file)
+ )
+ expected_text = '%d bytes read' % size
+ assert expected_text in output
+
+ output = u_boot_console.run_command(
+ 'crc32 %x $filesize' % (addr + offset)
+ )
+ assert expected_crc32 in output
+
+ if not part_detect:
+ pytest.skip('No partition detected')
+
+@pytest.mark.buildconfigspec('cmd_mmc')
+@pytest.mark.buildconfigspec('cmd_fs_generic')
+def test_mmc_save(u_boot_console):
+ if not mmc_set_up:
+ pytest.skip('No SD/MMC/eMMC controller available')
+
+ if not devices:
+ pytest.skip('No devices detected')
+
+ part_detect = 0
+ for x in range(0, controllers):
+ if devices[x]['detected'] == 'yes':
+ u_boot_console.run_command('mmc dev %d' % x)
+ for fs in ['fat', 'ext4']:
+ try:
+ partitions = devices[x][fs]
+ except:
+ print('No %s table on this device' % fs.upper())
+ continue
+
+ for part in partitions:
+ part_detect = 1
+ addr = devices[x]['addr_%d' % part]
+ size = 0
+ file = devices[x]['file_%d' % part]
+
+ offset = random.randrange(128, 1024, 128)
+ output = u_boot_console.run_command(
+ 'save mmc %d:%s %x /%s %d'
+ % (x, part, addr + offset, file, size)
+ )
+ expected_text = '%d bytes written' % size
+ assert expected_text in output
+
+ if not part_detect:
+ pytest.skip('No partition detected')
+
+@pytest.mark.buildconfigspec('cmd_mmc')
+@pytest.mark.buildconfigspec('cmd_fat')
+@pytest.mark.buildconfigspec('cmd_memory')
+def test_mmc_fat_read_write_files(u_boot_console):
+ test_mmc_list(u_boot_console)
+ test_mmc_dev(u_boot_console)
+ test_mmcinfo(u_boot_console)
+ test_mmc_part(u_boot_console)
+ if not mmc_set_up:
+ pytest.skip('No SD/MMC/eMMC controller available')
+
+ if not devices:
+ pytest.skip('No devices detected')
+
+ part_detect = 0
+ fs = 'fat'
+
+ # Number of files to be written/read in MMC card
+ num_files = 100
+
+ for x in range(0, controllers):
+ if devices[x]['detected'] == 'yes':
+ u_boot_console.run_command('mmc dev %d' % x)
+ try:
+ partitions = devices[x][fs]
+ except:
+ print('No %s table on this device' % fs.upper())
+ continue
+
+ for part in partitions:
+ part_detect = 1
+ addr = u_boot_utils.find_ram_base(u_boot_console)
+ count_f = 0
+ addr_l = []
+ size_l = []
+ file_l = []
+ crc32_l = []
+ offset_l = []
+ addr_l.append(addr)
+
+ while count_f < num_files:
+ size_l.append(random.randint(4, 1 * 1024 * 1024))
+
+ # CRC32 count
+ output = u_boot_console.run_command(
+ 'crc32 %x %x' % (addr_l[count_f], size_l[count_f])
+ )
+ m = re.search('==> (.+?)', output)
+ if not m:
+ pytest.fail('CRC32 failed')
+ crc32_l.append(m.group(1))
+
+ # Write operation
+ file_l.append('%s_%d_%d' % ('uboot_test', count_f, size_l[count_f]))
+ output = u_boot_console.run_command(
+ '%swrite mmc %d:%s %x %s %x'
+ % (
+ fs,
+ x,
+ part,
+ addr_l[count_f],
+ file_l[count_f],
+ size_l[count_f],
+ )
+ )
+ assert 'Unable to write' not in output
+ assert 'Error' not in output
+ assert 'overflow' not in output
+ expected_text = '%d bytes written' % size_l[count_f]
+ assert expected_text in output
+
+ addr_l.append(addr_l[count_f] + size_l[count_f] + 1048576)
+ count_f += 1
+
+ count_f = 0
+ while count_f < num_files:
+ alignment = int(
+ u_boot_console.config.buildconfig.get(
+ 'config_sys_cacheline_size', 128
+ )
+ )
+ offset_l.append(random.randrange(alignment, 1024, alignment))
+
+ # Read operation
+ output = u_boot_console.run_command(
+ '%sload mmc %d:%s %x %s'
+ % (
+ fs,
+ x,
+ part,
+ addr_l[count_f] + offset_l[count_f],
+ file_l[count_f],
+ )
+ )
+ assert 'Invalid FAT entry' not in output
+ assert 'Unable to read file' not in output
+ assert 'Misaligned buffer address' not in output
+ expected_text = '%d bytes read' % size_l[count_f]
+ assert expected_text in output
+
+ output = u_boot_console.run_command(
+ 'crc32 %x $filesize' % (addr_l[count_f] + offset_l[count_f])
+ )
+ assert crc32_l[count_f] in output
+
+ count_f += 1
+
+ if not part_detect:
+ pytest.skip('No %s partition detected' % fs.upper())
diff --git a/test/py/tests/test_net.py b/test/py/tests/test_net.py
index b2241ae..4ff3daf 100644
--- a/test/py/tests/test_net.py
+++ b/test/py/tests/test_net.py
@@ -7,6 +7,7 @@
import pytest
import u_boot_utils
import uuid
+import datetime
"""
Note: This test relies on boardenv_* containing configuration values to define
@@ -51,6 +52,8 @@
'addr': 0x10000000,
'size': 5058624,
'crc32': 'c2244b26',
+ 'timeout': 50000,
+ 'fnu': 'ubtest-upload.bin',
}
# Details regarding a file that may be read from a NFS server. This variable
@@ -96,6 +99,8 @@
if init_pci:
u_boot_console.run_command('pci enum')
+ u_boot_console.run_command('net list')
+
@pytest.mark.buildconfigspec('cmd_dhcp')
def test_net_dhcp(u_boot_console):
"""Test the dhcp command.
@@ -326,3 +331,71 @@
assert expected_text_default in output
assert "Config file 'default.boot' found" in output
+
+@pytest.mark.buildconfigspec("cmd_crc32")
+@pytest.mark.buildconfigspec("cmd_net")
+@pytest.mark.buildconfigspec("cmd_tftpput")
+def test_net_tftpput(u_boot_console):
+ """Test the tftpput command.
+
+ A file is downloaded from the TFTP server and then uploaded to the TFTP
+ server, its size and its CRC32 are validated.
+
+ The details of the file to download are provided by the boardenv_* file;
+ see the comment at the beginning of this file.
+ """
+
+ if not net_set_up:
+ pytest.skip("Network not initialized")
+
+ f = u_boot_console.config.env.get("env__net_tftp_readable_file", None)
+ if not f:
+ pytest.skip("No TFTP readable file to read")
+
+ addr = f.get("addr", None)
+ if not addr:
+ addr = u_boot_utils.find_ram_base(u_boot_console)
+
+ sz = f.get("size", None)
+ timeout = f.get("timeout", u_boot_console.p.timeout)
+ fn = f["fn"]
+ fnu = f.get("fnu", "_".join([datetime.datetime.now().strftime("%y%m%d%H%M%S"), fn]))
+ expected_text = "Bytes transferred = "
+ if sz:
+ expected_text += "%d" % sz
+
+ with u_boot_console.temporary_timeout(timeout):
+ output = u_boot_console.run_command("tftpboot %x %s" % (addr, fn))
+
+ assert "TIMEOUT" not in output
+ assert expected_text in output
+
+ expected_tftpb_crc = f.get("crc32", None)
+
+ output = u_boot_console.run_command("crc32 $fileaddr $filesize")
+ assert expected_tftpb_crc in output
+
+ with u_boot_console.temporary_timeout(timeout):
+ output = u_boot_console.run_command(
+ "tftpput $fileaddr $filesize $serverip:%s" % (fnu)
+ )
+
+ expected_text = "Bytes transferred = "
+ if sz:
+ expected_text += "%d" % sz
+ addr = addr + sz
+ assert "TIMEOUT" not in output
+ assert "Access violation" not in output
+ assert expected_text in output
+
+ with u_boot_console.temporary_timeout(timeout):
+ output = u_boot_console.run_command("tftpboot %x %s" % (addr, fnu))
+
+ expected_text = "Bytes transferred = "
+ if sz:
+ expected_text += "%d" % sz
+ assert "TIMEOUT" not in output
+ assert expected_text in output
+
+ output = u_boot_console.run_command("crc32 $fileaddr $filesize")
+ assert expected_tftpb_crc in output
diff --git a/test/py/tests/test_scsi.py b/test/py/tests/test_scsi.py
new file mode 100644
index 0000000..be2e283
--- /dev/null
+++ b/test/py/tests/test_scsi.py
@@ -0,0 +1,92 @@
+# SPDX-License-Identifier: GPL-2.0
+# (C) Copyright 2023, Advanced Micro Devices, Inc.
+
+import pytest
+
+"""
+Note: This test relies on boardenv_* containing configuration values to define
+the SCSI device number, type and capacity. This test will be automatically
+skipped without this.
+
+For example:
+
+# Setup env__scsi_device_test to set the SCSI device number/slot, the type of
+device, and the device capacity in MB.
+env__scsi_device_test = {
+ 'dev_num': 0,
+ 'device_type': 'Hard Disk',
+ 'device_capacity': '476940.0 MB',
+}
+"""
+
+def scsi_setup(u_boot_console):
+ f = u_boot_console.config.env.get('env__scsi_device_test', None)
+ if not f:
+ pytest.skip('No SCSI device to test')
+
+ dev_num = f.get('dev_num', None)
+ if not isinstance(dev_num, int):
+ pytest.skip('No device number specified in env file to read')
+
+ dev_type = f.get('device_type')
+ if not dev_type:
+ pytest.skip('No device type specified in env file to read')
+
+ dev_size = f.get('device_capacity')
+ if not dev_size:
+ pytest.skip('No device capacity specified in env file to read')
+
+ return dev_num, dev_type, dev_size
+
+@pytest.mark.buildconfigspec('cmd_scsi')
+def test_scsi_reset(u_boot_console):
+ dev_num, dev_type, dev_size = scsi_setup(u_boot_console)
+ output = u_boot_console.run_command('scsi reset')
+ assert f'Device {dev_num}:' in output
+ assert f'Type: {dev_type}' in output
+ assert f'Capacity: {dev_size}' in output
+ output = u_boot_console.run_command('echo $?')
+ assert output.endswith('0')
+
+@pytest.mark.buildconfigspec('cmd_scsi')
+def test_scsi_info(u_boot_console):
+ dev_num, dev_type, dev_size = scsi_setup(u_boot_console)
+ output = u_boot_console.run_command('scsi info')
+ assert f'Device {dev_num}:' in output
+ assert f'Type: {dev_type}' in output
+ assert f'Capacity: {dev_size}' in output
+ output = u_boot_console.run_command('echo $?')
+ assert output.endswith('0')
+
+@pytest.mark.buildconfigspec('cmd_scsi')
+def test_scsi_scan(u_boot_console):
+ dev_num, dev_type, dev_size = scsi_setup(u_boot_console)
+ output = u_boot_console.run_command('scsi scan')
+ assert f'Device {dev_num}:' in output
+ assert f'Type: {dev_type}' in output
+ assert f'Capacity: {dev_size}' in output
+ output = u_boot_console.run_command('echo $?')
+ assert output.endswith('0')
+
+@pytest.mark.buildconfigspec('cmd_scsi')
+def test_scsi_dev(u_boot_console):
+ dev_num, dev_type, dev_size = scsi_setup(u_boot_console)
+ output = u_boot_console.run_command('scsi device')
+ assert 'no scsi devices available' not in output
+ assert f'device {dev_num}:' in output
+ assert f'Type: {dev_type}' in output
+ assert f'Capacity: {dev_size}' in output
+ output = u_boot_console.run_command('echo $?')
+ assert output.endswith('0')
+ output = u_boot_console.run_command('scsi device %d' % dev_num)
+ assert 'is now current device' in output
+ output = u_boot_console.run_command('echo $?')
+ assert output.endswith('0')
+
+@pytest.mark.buildconfigspec('cmd_scsi')
+def test_scsi_part(u_boot_console):
+ test_scsi_dev(u_boot_console)
+ output = u_boot_console.run_command('scsi part')
+ assert 'Partition Map for SCSI device' in output
+ output = u_boot_console.run_command('echo $?')
+ assert output.endswith('0')
diff --git a/test/py/tests/test_smbios.py b/test/py/tests/test_smbios.py
new file mode 100644
index 0000000..82b0b68
--- /dev/null
+++ b/test/py/tests/test_smbios.py
@@ -0,0 +1,41 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+"""Test smbios command"""
+
+import pytest
+
+@pytest.mark.buildconfigspec('cmd_smbios')
+@pytest.mark.notbuildconfigspec('qfw_smbios')
+@pytest.mark.notbuildconfigspec('sandbox')
+def test_cmd_smbios(u_boot_console):
+ """Run the smbios command"""
+ output = u_boot_console.run_command('smbios')
+ assert 'DMI type 127,' in output
+
+@pytest.mark.buildconfigspec('cmd_smbios')
+@pytest.mark.buildconfigspec('qfw_smbios')
+@pytest.mark.notbuildconfigspec('sandbox')
+# TODO:
+# QEMU v8.2.0 lacks SMBIOS support for RISC-V
+# Once support is available in our Docker image we can remove the constraint.
+@pytest.mark.notbuildconfigspec('riscv')
+def test_cmd_smbios_qemu(u_boot_console):
+ """Run the smbios command on QEMU"""
+ output = u_boot_console.run_command('smbios')
+ assert 'DMI type 1,' in output
+ assert 'Manufacturer: QEMU' in output
+ assert 'DMI type 127,' in output
+
+@pytest.mark.buildconfigspec('cmd_smbios')
+@pytest.mark.buildconfigspec('sandbox')
+def test_cmd_smbios_sandbox(u_boot_console):
+ """Run the smbios command on the sandbox"""
+ output = u_boot_console.run_command('smbios')
+ assert 'DMI type 0,' in output
+ assert 'String 1: U-Boot' in output
+ assert 'DMI type 1,' in output
+ assert 'Manufacturer: sandbox' in output
+ assert 'DMI type 2,' in output
+ assert 'DMI type 3,' in output
+ assert 'DMI type 4,' in output
+ assert 'DMI type 127,' in output
diff --git a/test/py/tests/test_trace.py b/test/py/tests/test_trace.py
index 28a6e72..7c5696c 100644
--- a/test/py/tests/test_trace.py
+++ b/test/py/tests/test_trace.py
@@ -12,7 +12,7 @@
TMPDIR = '/tmp/test_trace'
# Decode a function-graph line
-RE_LINE = re.compile(r'.*\[000\]\s*([0-9.]*): func.*[|](\s*)(\S.*)?([{};])$')
+RE_LINE = re.compile(r'.*0\.\.\.\.\. \s*([0-9.]*): func.*[|](\s*)(\S.*)?([{};])$')
def collect_trace(cons):
@@ -113,15 +113,15 @@
assert val > 50000 # Should be at least 50KB of symbols
# Check that the trace has something useful
- cmd = f"trace-cmd report {trace_dat} |grep -E '(initf_|initr_)'"
+ cmd = f"trace-cmd report -l {trace_dat} |grep -E '(initf_|initr_)'"
out = util.run_and_log(cons, ['sh', '-c', cmd])
# Format:
- # unknown option 14
- # u-boot-1 [000] 60.805596: function: initf_malloc
- # u-boot-1 [000] 60.805597: function: initf_malloc
- # u-boot-1 [000] 60.805601: function: initf_bootstage
- # u-boot-1 [000] 60.805607: function: initf_bootstage
+ # u-boot-1 0..... 60.805596: function: initf_malloc
+ # u-boot-1 0..... 60.805597: function: initf_malloc
+ # u-boot-1 0..... 60.805601: function: initf_bootstage
+ # u-boot-1 0..... 60.805607: function: initf_bootstage
+
lines = [line.replace(':', '').split() for line in out.splitlines()]
vals = {items[4]: float(items[2]) for items in lines if len(items) == 5}
base = None
@@ -161,21 +161,21 @@
'dump-ftrace', '-f', 'funcgraph'])
# Check that the trace has what we expect
- cmd = f'trace-cmd report {trace_dat} |head -n 70'
+ cmd = f'trace-cmd report -l {trace_dat} |head -n 70'
out = util.run_and_log(cons, ['sh', '-c', cmd])
# First look for this:
- # u-boot-1 [000] 282.101360: funcgraph_entry: 0.004 us | initf_malloc();
+ # u-boot-1 0..... 282.101360: funcgraph_entry: 0.004 us | initf_malloc();
# ...
- # u-boot-1 [000] 282.101369: funcgraph_entry: | initf_bootstage() {
- # u-boot-1 [000] 282.101369: funcgraph_entry: | bootstage_init() {
- # u-boot-1 [000] 282.101369: funcgraph_entry: | dlmalloc() {
+ # u-boot-1 0..... 282.101369: funcgraph_entry: | initf_bootstage() {
+ # u-boot-1 0..... 282.101369: funcgraph_entry: | bootstage_init() {
+ # u-boot-1 0..... 282.101369: funcgraph_entry: | dlmalloc() {
# ...
- # u-boot-1 [000] 282.101375: funcgraph_exit: 0.001 us | }
+ # u-boot-1 0..... 282.101375: funcgraph_exit: 0.001 us | }
# Then look for this:
- # u-boot-1 [000] 282.101375: funcgraph_exit: 0.006 us | }
+ # u-boot-1 0..... 282.101375: funcgraph_exit: 0.006 us | }
# Then check for this:
- # u-boot-1 [000] 282.101375: funcgraph_entry: 0.000 us | initcall_is_event();
+ # u-boot-1 0..... 282.101375: funcgraph_entry: 0.000 us | initcall_is_event();
expected_indent = None
found_start = False
@@ -203,7 +203,7 @@
# Now look for initf_dm() and dm_timer_init() so we can check the bootstage
# time
- cmd = f"trace-cmd report {trace_dat} |grep -E '(initf_dm|dm_timer_init)'"
+ cmd = f"trace-cmd report -l {trace_dat} |grep -E '(initf_dm|dm_timer_init)'"
out = util.run_and_log(cons, ['sh', '-c', cmd])
start_timestamp = None
diff --git a/test/py/tests/test_usb.py b/test/py/tests/test_usb.py
new file mode 100644
index 0000000..fb3d20f
--- /dev/null
+++ b/test/py/tests/test_usb.py
@@ -0,0 +1,626 @@
+# SPDX-License-Identifier: GPL-2.0
+# (C) Copyright 2023, Advanced Micro Devices, Inc.
+
+import pytest
+import random
+import re
+import u_boot_utils
+
+"""
+Note: This test doesn't rely on boardenv_* configuration values but it can
+change the test behavior. To test USB file system cases (fat32, ext2, ext4),
+USB device should be formatted and valid partitions should be created for
+different file system, otherwise it may leads to failure. This test will be
+skipped if the USB device is not detected.
+
+For example:
+
+# Setup env__usb_device_test_skip to not skipping the test. By default, its
+# value is set to True. Set it to False to run all tests for USB device.
+env__usb_device_test_skip = False
+"""
+
+def setup_usb(u_boot_console):
+ if u_boot_console.config.env.get('env__usb_device_test_skip', True):
+ pytest.skip('USB device test is not enabled')
+
+@pytest.mark.buildconfigspec('cmd_usb')
+def test_usb_start(u_boot_console):
+ setup_usb(u_boot_console)
+ output = u_boot_console.run_command('usb start')
+
+ # if output is empty, usb start may already run as part of preboot command
+ # re-start the usb, in that case
+ if not output:
+ u_boot_console.run_command('usb stop')
+ output = u_boot_console.run_command('usb start')
+
+ if 'No USB device found' in output:
+ pytest.skip('No USB controller available')
+
+ if 'Card did not respond to voltage select' in output:
+ pytest.skip('No USB device present')
+
+ controllers = 0
+ storage_device = 0
+ obj = re.search(r'\d USB Device\(s\) found', output)
+ controllers = int(obj.group()[0])
+
+ if not controllers:
+ pytest.skip('No USB device present')
+
+ obj = re.search(r'\d Storage Device\(s\) found', output)
+ storage_device = int(obj.group()[0])
+
+ if not storage_device:
+ pytest.skip('No USB storage device present')
+
+ assert 'USB init failed' not in output
+ assert 'starting USB...' in output
+
+ if 'Starting the controller' in output:
+ assert 'USB XHCI' in output
+
+ output = u_boot_console.run_command('echo $?')
+ assert output.endswith('0')
+ return controllers, storage_device
+
+@pytest.mark.buildconfigspec('cmd_usb')
+def test_usb_stop(u_boot_console):
+ setup_usb(u_boot_console)
+ output = u_boot_console.run_command('usb stop')
+ assert 'stopping USB..' in output
+
+ output = u_boot_console.run_command('echo $?')
+ assert output.endswith('0')
+
+ output = u_boot_console.run_command('usb dev')
+ assert "USB is stopped. Please issue 'usb start' first." in output
+
+@pytest.mark.buildconfigspec('cmd_usb')
+def test_usb_reset(u_boot_console):
+ setup_usb(u_boot_console)
+ output = u_boot_console.run_command('usb reset')
+
+ if 'No USB device found' in output:
+ pytest.skip('No USB controller available')
+
+ if 'Card did not respond to voltage select' in output:
+ pytest.skip('No USB device present')
+
+ obj = re.search(r'\d USB Device\(s\) found', output)
+ usb_dev_num = int(obj.group()[0])
+
+ if not usb_dev_num:
+ pytest.skip('No USB device present')
+
+ obj = re.search(r'\d Storage Device\(s\) found', output)
+ usb_stor_num = int(obj.group()[0])
+
+ if not usb_stor_num:
+ pytest.skip('No USB storage device present')
+
+ assert 'BUG' not in output
+ assert 'USB init failed' not in output
+ assert 'resetting USB...' in output
+
+ if 'Starting the controller' in output:
+ assert 'USB XHCI' in output
+
+ output = u_boot_console.run_command('echo $?')
+ assert output.endswith('0')
+
+@pytest.mark.buildconfigspec('cmd_usb')
+def test_usb_info(u_boot_console):
+ controllers, storage_device = test_usb_start(u_boot_console)
+ output = u_boot_console.run_command('usb info')
+
+ num_controller = len(re.findall(': Hub,', output))
+ num_mass_storage = len(re.findall(': Mass Storage,', output))
+
+ assert num_controller == controllers - 1
+ assert num_mass_storage == storage_device
+
+ output = u_boot_console.run_command('echo $?')
+ assert output.endswith('0')
+
+ for i in range(0, storage_device + controllers - 1):
+ output = u_boot_console.run_command('usb info %d' % i)
+ num_controller = len(re.findall(': Hub,', output))
+ num_mass_storage = len(re.findall(': Mass Storage,', output))
+ assert num_controller + num_mass_storage == 1
+ assert 'No device available' not in output
+ output = u_boot_console.run_command('echo $?')
+ assert output.endswith('0')
+
+@pytest.mark.buildconfigspec('cmd_usb')
+def test_usb_tree(u_boot_console):
+ controllers, storage_device = test_usb_start(u_boot_console)
+ output = u_boot_console.run_command('usb tree')
+
+ num_controller = len(re.findall('Hub', output))
+ num_mass_storage = len(re.findall('Mass Storage', output))
+
+ assert num_controller == controllers - 1
+ assert num_mass_storage == storage_device
+
+ output = u_boot_console.run_command('echo $?')
+ assert output.endswith('0')
+
+@pytest.mark.buildconfigspec('cmd_usb')
+@pytest.mark.buildconfigspec('usb_storage')
+def test_usb_storage(u_boot_console):
+ controllers, storage_device = test_usb_start(u_boot_console)
+ output = u_boot_console.run_command('usb storage')
+
+ obj = re.findall(r'Capacity: (\d+|\d+[\.]?\d)', output)
+ devices = {}
+
+ for key in range(int(storage_device)):
+ devices[key] = {}
+
+ for x in range(int(storage_device)):
+ try:
+ capacity = float(obj[x].split()[0])
+ devices[x]['capacity'] = capacity
+ print('USB storage device %d capacity is: %g MB' % (x, capacity))
+ except ValueError:
+ pytest.fail('USB storage device capacity not recognized')
+
+ output = u_boot_console.run_command('echo $?')
+ assert output.endswith('0')
+
+@pytest.mark.buildconfigspec('cmd_usb')
+def test_usb_dev(u_boot_console):
+ controllers, storage_device = test_usb_start(u_boot_console)
+ output = u_boot_console.run_command('usb dev')
+
+ assert 'no usb devices available' not in output
+
+ output = u_boot_console.run_command('echo $?')
+ assert output.endswith('0')
+
+ devices = {}
+
+ for key in range(int(storage_device)):
+ devices[key] = {}
+
+ fail = 0
+ for x in range(0, storage_device):
+ devices[x]['detected'] = 'yes'
+ output = u_boot_console.run_command('usb dev %d' % x)
+
+ if 'Card did not respond to voltage select' in output:
+ fail = 1
+ devices[x]['detected'] = 'no'
+
+ if 'No USB device found' in output:
+ devices[x]['detected'] = 'no'
+
+ if 'unknown device' in output:
+ devices[x]['detected'] = 'no'
+
+ assert 'is now current device' in output
+ output = u_boot_console.run_command('echo $?')
+ assert output.endswith('0')
+
+ if fail:
+ pytest.fail('USB device not present')
+
+ return devices, controllers, storage_device
+
+@pytest.mark.buildconfigspec('cmd_usb')
+def test_usb_part(u_boot_console):
+ devices, controllers, storage_device = test_usb_dev(u_boot_console)
+ if not devices:
+ pytest.skip('No devices detected')
+
+ u_boot_console.run_command('usb part')
+
+ output = u_boot_console.run_command('echo $?')
+ assert output.endswith('0')
+
+ for i in range(0, storage_device):
+ if devices[i]['detected'] == 'yes':
+ u_boot_console.run_command('usb dev %d' % i)
+ output = u_boot_console.run_command('usb part')
+
+ lines = output.split('\n')
+ part_fat = []
+ part_ext = []
+ for line in lines:
+ obj = re.search(r'(\d)\s+\d+\s+\d+\s+\w+\d+\w+-\d+\s+(\d+\w+)', line)
+ if obj:
+ part_id = int(obj.groups()[0])
+ part_type = obj.groups()[1]
+ print('part_id:%d, part_type:%s' % (part_id, part_type))
+
+ if part_type == '0c' or part_type == '0b' or part_type == '0e':
+ print('Fat detected')
+ part_fat.append(part_id)
+ elif part_type == '83':
+ print('ext detected')
+ part_ext.append(part_id)
+ else:
+ pytest.fail('Unsupported Filesystem on device %d' % i)
+ devices[i]['ext4'] = part_ext
+ devices[i]['ext2'] = part_ext
+ devices[i]['fat'] = part_fat
+
+ if not part_ext and not part_fat:
+ pytest.fail('No partition detected on device %d' % i)
+
+ return devices, controllers, storage_device
+
+@pytest.mark.buildconfigspec('cmd_usb')
+@pytest.mark.buildconfigspec('cmd_fat')
+def test_usb_fatls_fatinfo(u_boot_console):
+ devices, controllers, storage_device = test_usb_part(u_boot_console)
+ if not devices:
+ pytest.skip('No devices detected')
+
+ part_detect = 0
+ fs = 'fat'
+ for x in range(0, int(storage_device)):
+ if devices[x]['detected'] == 'yes':
+ u_boot_console.run_command('usb dev %d' % x)
+ try:
+ partitions = devices[x][fs]
+ except:
+ print('No %s table on this device' % fs.upper())
+ continue
+
+ for part in partitions:
+ output = u_boot_console.run_command('fatls usb %d:%s' % (x, part))
+ if 'Unrecognized filesystem type' in output:
+ partitions.remove(part)
+ pytest.fail('Unrecognized filesystem')
+
+ if not re.search(r'\d file\(s\), \d dir\(s\)', output):
+ pytest.fail('%s read failed on device %d' % (fs.upper, x))
+
+ output = u_boot_console.run_command('fatinfo usb %d:%s' % (x, part))
+ string = 'Filesystem: %s' % fs.upper
+ if re.search(string, output):
+ pytest.fail('%s FS failed on device %d' % (fs.upper(), x))
+ part_detect = 1
+
+ if not part_detect:
+ pytest.skip('No %s partition detected' % fs.upper())
+
+@pytest.mark.buildconfigspec('cmd_usb')
+@pytest.mark.buildconfigspec('cmd_fat')
+@pytest.mark.buildconfigspec('cmd_memory')
+def test_usb_fatload_fatwrite(u_boot_console):
+ devices, controllers, storage_device = test_usb_part(u_boot_console)
+ if not devices:
+ pytest.skip('No devices detected')
+
+ part_detect = 0
+ fs = 'fat'
+ for x in range(0, int(storage_device)):
+ if devices[x]['detected'] == 'yes':
+ u_boot_console.run_command('usb dev %d' % x)
+ try:
+ partitions = devices[x][fs]
+ except:
+ print('No %s table on this device' % fs.upper())
+ continue
+
+ for part in partitions:
+ part_detect = 1
+ addr = u_boot_utils.find_ram_base(u_boot_console)
+ size = random.randint(4, 1 * 1024 * 1024)
+ output = u_boot_console.run_command('crc32 %x %x' % (addr, size))
+ m = re.search('==> (.+?)', output)
+ if not m:
+ pytest.fail('CRC32 failed')
+ expected_crc32 = m.group(1)
+
+ file = '%s_%d' % ('uboot_test', size)
+ output = u_boot_console.run_command(
+ '%swrite usb %d:%s %x %s %x' % (fs, x, part, addr, file, size)
+ )
+ assert 'Unable to write' not in output
+ assert 'Error' not in output
+ assert 'overflow' not in output
+ expected_text = '%d bytes written' % size
+ assert expected_text in output
+
+ alignment = int(
+ u_boot_console.config.buildconfig.get(
+ 'config_sys_cacheline_size', 128
+ )
+ )
+ offset = random.randrange(alignment, 1024, alignment)
+ output = u_boot_console.run_command(
+ '%sload usb %d:%s %x %s' % (fs, x, part, addr + offset, file)
+ )
+ assert 'Invalid FAT entry' not in output
+ assert 'Unable to read file' not in output
+ assert 'Misaligned buffer address' not in output
+ expected_text = '%d bytes read' % size
+ assert expected_text in output
+
+ output = u_boot_console.run_command(
+ 'crc32 %x $filesize' % (addr + offset)
+ )
+ assert expected_crc32 in output
+
+ if not part_detect:
+ pytest.skip('No %s partition detected' % fs.upper())
+
+ return file, size
+
+@pytest.mark.buildconfigspec('cmd_usb')
+@pytest.mark.buildconfigspec('cmd_ext4')
+def test_usb_ext4ls(u_boot_console):
+ devices, controllers, storage_device = test_usb_part(u_boot_console)
+ if not devices:
+ pytest.skip('No devices detected')
+
+ part_detect = 0
+ fs = 'ext4'
+ for x in range(0, int(storage_device)):
+ if devices[x]['detected'] == 'yes':
+ try:
+ partitions = devices[x][fs]
+ except:
+ print('No %s table on this device' % fs.upper())
+ continue
+
+ u_boot_console.run_command('usb dev %d' % x)
+ for part in partitions:
+ output = u_boot_console.run_command('%sls usb %d:%s' % (fs, x, part))
+ if 'Unrecognized filesystem type' in output:
+ partitions.remove(part)
+ pytest.fail('Unrecognized filesystem')
+ part_detect = 1
+
+ if not part_detect:
+ pytest.skip('No %s partition detected' % fs.upper())
+
+@pytest.mark.buildconfigspec('cmd_usb')
+@pytest.mark.buildconfigspec('cmd_ext4')
+@pytest.mark.buildconfigspec('ext4_write')
+@pytest.mark.buildconfigspec('cmd_memory')
+def test_usb_ext4load_ext4write(u_boot_console):
+ devices, controllers, storage_device = test_usb_part(u_boot_console)
+ if not devices:
+ pytest.skip('No devices detected')
+
+ part_detect = 0
+ fs = 'ext4'
+ for x in range(0, int(storage_device)):
+ if devices[x]['detected'] == 'yes':
+ u_boot_console.run_command('usb dev %d' % x)
+ try:
+ partitions = devices[x][fs]
+ except:
+ print('No %s table on this device' % fs.upper())
+ continue
+
+ for part in partitions:
+ part_detect = 1
+ addr = u_boot_utils.find_ram_base(u_boot_console)
+ size = random.randint(4, 1 * 1024 * 1024)
+ output = u_boot_console.run_command('crc32 %x %x' % (addr, size))
+ m = re.search('==> (.+?)', output)
+ if not m:
+ pytest.fail('CRC32 failed')
+ expected_crc32 = m.group(1)
+ file = '%s_%d' % ('uboot_test', size)
+
+ output = u_boot_console.run_command(
+ '%swrite usb %d:%s %x /%s %x' % (fs, x, part, addr, file, size)
+ )
+ assert 'Unable to write' not in output
+ assert 'Error' not in output
+ assert 'overflow' not in output
+ expected_text = '%d bytes written' % size
+ assert expected_text in output
+
+ offset = random.randrange(128, 1024, 128)
+ output = u_boot_console.run_command(
+ '%sload usb %d:%s %x /%s' % (fs, x, part, addr + offset, file)
+ )
+ expected_text = '%d bytes read' % size
+ assert expected_text in output
+
+ output = u_boot_console.run_command(
+ 'crc32 %x $filesize' % (addr + offset)
+ )
+ assert expected_crc32 in output
+
+ if not part_detect:
+ pytest.skip('No %s partition detected' % fs.upper())
+
+ return file, size
+
+@pytest.mark.buildconfigspec('cmd_usb')
+@pytest.mark.buildconfigspec('cmd_ext2')
+def test_usb_ext2ls(u_boot_console):
+ devices, controllers, storage_device = test_usb_part(u_boot_console)
+ if not devices:
+ pytest.skip('No devices detected')
+
+ part_detect = 0
+ fs = 'ext2'
+ for x in range(0, int(storage_device)):
+ if devices[x]['detected'] == 'yes':
+ u_boot_console.run_command('usb dev %d' % x)
+ try:
+ partitions = devices[x][fs]
+ except:
+ print('No %s table on this device' % fs.upper())
+ continue
+
+ for part in partitions:
+ part_detect = 1
+ output = u_boot_console.run_command('%sls usb %d:%s' % (fs, x, part))
+ if 'Unrecognized filesystem type' in output:
+ partitions.remove(part)
+ pytest.fail('Unrecognized filesystem')
+ part_detect = 1
+
+ if not part_detect:
+ pytest.skip('No %s partition detected' % fs.upper())
+
+@pytest.mark.buildconfigspec('cmd_usb')
+@pytest.mark.buildconfigspec('cmd_ext2')
+@pytest.mark.buildconfigspec('cmd_ext4')
+@pytest.mark.buildconfigspec('ext4_write')
+@pytest.mark.buildconfigspec('cmd_memory')
+def test_usb_ext2load(u_boot_console):
+ devices, controllers, storage_device = test_usb_part(u_boot_console)
+ file, size = test_usb_ext4load_ext4write(u_boot_console)
+
+ if not devices:
+ pytest.skip('No devices detected')
+
+ part_detect = 0
+ fs = 'ext2'
+ for x in range(0, int(storage_device)):
+ if devices[x]['detected'] == 'yes':
+ u_boot_console.run_command('usb dev %d' % x)
+ try:
+ partitions = devices[x][fs]
+ except:
+ print('No %s table on this device' % fs.upper())
+ continue
+
+ for part in partitions:
+ part_detect = 1
+ addr = u_boot_utils.find_ram_base(u_boot_console)
+ output = u_boot_console.run_command('crc32 %x %x' % (addr, size))
+ m = re.search('==> (.+?)', output)
+ if not m:
+ pytest.fail('CRC32 failed')
+ expected_crc32 = m.group(1)
+
+ offset = random.randrange(128, 1024, 128)
+ output = u_boot_console.run_command(
+ '%sload usb %d:%s %x /%s' % (fs, x, part, addr + offset, file)
+ )
+ expected_text = '%d bytes read' % size
+ assert expected_text in output
+
+ output = u_boot_console.run_command(
+ 'crc32 %x $filesize' % (addr + offset)
+ )
+ assert expected_crc32 in output
+
+ if not part_detect:
+ pytest.skip('No %s partition detected' % fs.upper())
+
+@pytest.mark.buildconfigspec('cmd_usb')
+@pytest.mark.buildconfigspec('cmd_fs_generic')
+def test_usb_ls(u_boot_console):
+ devices, controllers, storage_device = test_usb_part(u_boot_console)
+ if not devices:
+ pytest.skip('No devices detected')
+
+ part_detect = 0
+ for x in range(0, int(storage_device)):
+ if devices[x]['detected'] == 'yes':
+ u_boot_console.run_command('usb dev %d' % x)
+ for fs in ['fat', 'ext4']:
+ try:
+ partitions = devices[x][fs]
+ except:
+ print('No %s table on this device' % fs.upper())
+ continue
+
+ for part in partitions:
+ part_detect = 1
+ output = u_boot_console.run_command('ls usb %d:%s' % (x, part))
+ if re.search(r'No \w+ table on this device', output):
+ pytest.fail(
+ '%s: Partition table not found %d' % (fs.upper(), x)
+ )
+
+ if not part_detect:
+ pytest.skip('No partition detected')
+
+@pytest.mark.buildconfigspec('cmd_usb')
+@pytest.mark.buildconfigspec('cmd_fs_generic')
+def test_usb_load(u_boot_console):
+ devices, controllers, storage_device = test_usb_part(u_boot_console)
+ if not devices:
+ pytest.skip('No devices detected')
+
+ part_detect = 0
+ for x in range(0, int(storage_device)):
+ if devices[x]['detected'] == 'yes':
+ u_boot_console.run_command('usb dev %d' % x)
+ for fs in ['fat', 'ext4']:
+ try:
+ partitions = devices[x][fs]
+ except:
+ print('No %s table on this device' % fs.upper())
+ continue
+
+ for part in partitions:
+ part_detect = 1
+ addr = u_boot_utils.find_ram_base(u_boot_console)
+
+ if fs == 'fat':
+ file, size = test_usb_fatload_fatwrite(u_boot_console)
+ elif fs == 'ext4':
+ file, size = test_usb_ext4load_ext4write(u_boot_console)
+
+ output = u_boot_console.run_command('crc32 %x %x' % (addr, size))
+ m = re.search('==> (.+?)', output)
+ if not m:
+ pytest.fail('CRC32 failed')
+ expected_crc32 = m.group(1)
+
+ offset = random.randrange(128, 1024, 128)
+ output = u_boot_console.run_command(
+ 'load usb %d:%s %x /%s' % (x, part, addr + offset, file)
+ )
+ expected_text = '%d bytes read' % size
+ assert expected_text in output
+
+ output = u_boot_console.run_command(
+ 'crc32 %x $filesize' % (addr + offset)
+ )
+ assert expected_crc32 in output
+
+ if not part_detect:
+ pytest.skip('No partition detected')
+
+@pytest.mark.buildconfigspec('cmd_usb')
+@pytest.mark.buildconfigspec('cmd_fs_generic')
+def test_usb_save(u_boot_console):
+ devices, controllers, storage_device = test_usb_part(u_boot_console)
+ if not devices:
+ pytest.skip('No devices detected')
+
+ part_detect = 0
+ for x in range(0, int(storage_device)):
+ if devices[x]['detected'] == 'yes':
+ u_boot_console.run_command('usb dev %d' % x)
+ for fs in ['fat', 'ext4']:
+ try:
+ partitions = devices[x][fs]
+ except:
+ print('No %s table on this device' % fs.upper())
+ continue
+
+ for part in partitions:
+ part_detect = 1
+ addr = u_boot_utils.find_ram_base(u_boot_console)
+ size = random.randint(4, 1 * 1024 * 1024)
+ file = '%s_%d' % ('uboot_test', size)
+
+ offset = random.randrange(128, 1024, 128)
+ output = u_boot_console.run_command(
+ 'save usb %d:%s %x /%s %x'
+ % (x, part, addr + offset, file, size)
+ )
+ expected_text = '%d bytes written' % size
+ assert expected_text in output
+
+ if not part_detect:
+ pytest.skip('No partition detected')
diff --git a/test/py/tests/test_ut.py b/test/py/tests/test_ut.py
index 1d9149a..c169c83 100644
--- a/test/py/tests/test_ut.py
+++ b/test/py/tests/test_ut.py
@@ -9,6 +9,7 @@
import pytest
import u_boot_utils
+# pylint: disable=E0611
from tests import fs_helper
def mkdir_cond(dirname):
@@ -499,5 +500,11 @@
execute command 'ut foo bar'
"""
- output = u_boot_console.run_command('ut ' + ut_subtest)
+ if ut_subtest == 'hush hush_test_simple_dollar':
+ # ut hush hush_test_simple_dollar prints "Unknown command" on purpose.
+ with u_boot_console.disable_check('unknown_command'):
+ output = u_boot_console.run_command('ut ' + ut_subtest)
+ assert('Unknown command \'quux\' - try \'help\'' in output)
+ else:
+ output = u_boot_console.run_command('ut ' + ut_subtest)
assert output.endswith('Failures: 0')
diff --git a/test/py/tests/test_vboot.py b/test/py/tests/test_vboot.py
index 04fa59f..7e0e8e4 100644
--- a/test/py/tests/test_vboot.py
+++ b/test/py/tests/test_vboot.py
@@ -533,10 +533,10 @@
with open(evil_kernel, 'wb') as fd:
fd.write(500 * b'\x01')
+ # We need to use our own device tree file. Remember to restore it
+ # afterwards.
+ old_dtb = cons.config.dtb
try:
- # We need to use our own device tree file. Remember to restore it
- # afterwards.
- old_dtb = cons.config.dtb
cons.config.dtb = dtb
if global_sign:
test_global_sign(sha_algo, padding, sign_options)
diff --git a/test/py/tests/test_zynq_secure.py b/test/py/tests/test_zynq_secure.py
new file mode 100644
index 0000000..0ee5aeb
--- /dev/null
+++ b/test/py/tests/test_zynq_secure.py
@@ -0,0 +1,190 @@
+# SPDX-License-Identifier: GPL-2.0
+# (C) Copyright 2023, Advanced Micro Devices, Inc.
+
+import pytest
+import re
+import u_boot_utils
+import test_net
+
+"""
+This test verifies different type of secure boot images to authentication and
+decryption using AES and RSA features for AMD's Zynq SoC.
+
+Note: This test relies on boardenv_* containing configuration values to define
+the network available and files to be used for testing. Without this, this test
+will be automatically skipped. It also relies on dhcp or setup_static net test
+to support tftp to load files from a TFTP server.
+
+For example:
+
+# Details regarding the files that may be read from a TFTP server and addresses
+# and size for aes and rsa cases respectively. This variable may be omitted or
+# set to None if zynqmp secure testing is not possible or desired.
+env__zynq_aes_readable_file = {
+ 'fn': 'zynq_aes_image.bin',
+ 'fnbit': 'zynq_aes_bit.bin',
+ 'fnpbit': 'zynq_aes_par_bit.bin',
+ 'srcaddr': 0x1000000,
+ 'dstaddr': 0x2000000,
+ 'dstlen': 0x1000000,
+}
+
+env__zynq_rsa_readable_file = {
+ 'fn': 'zynq_rsa_image.bin',
+ 'fninvalid': 'zynq_rsa_image_invalid.bin',
+ 'srcaddr': 0x1000000,
+}
+"""
+
+def zynq_secure_pre_commands(u_boot_console):
+ output = u_boot_console.run_command('print modeboot')
+ if not 'modeboot=' in output:
+ pytest.skip('bootmode cannnot be determined')
+ m = re.search('modeboot=(.+?)boot', output)
+ if not m:
+ pytest.skip('bootmode cannnot be determined')
+ bootmode = m.group(1)
+ if bootmode == 'jtag':
+ pytest.skip('skipping due to jtag bootmode')
+
+@pytest.mark.buildconfigspec('cmd_zynq_aes')
+def test_zynq_aes_image(u_boot_console):
+ f = u_boot_console.config.env.get('env__zynq_aes_readable_file', None)
+ if not f:
+ pytest.skip('No TFTP readable file for zynq secure aes case to read')
+
+ dstaddr = f.get('dstaddr', None)
+ if not dstaddr:
+ pytest.skip('No dstaddr specified in env file to read')
+
+ dstsize = f.get('dstlen', None)
+ if not dstsize:
+ pytest.skip('No dstlen specified in env file to read')
+
+ zynq_secure_pre_commands(u_boot_console)
+ test_net.test_net_dhcp(u_boot_console)
+ if not test_net.net_set_up:
+ test_net.test_net_setup_static(u_boot_console)
+
+ srcaddr = f.get('srcaddr', None)
+ if not srcaddr:
+ addr = u_boot_utils.find_ram_base(u_boot_console)
+
+ expected_tftp = 'Bytes transferred = '
+ fn = f['fn']
+ output = u_boot_console.run_command('tftpboot %x %s' % (srcaddr, fn))
+ assert expected_tftp in output
+
+ expected_op = 'zynq aes [operation type] <srcaddr>'
+ output = u_boot_console.run_command(
+ 'zynq aes %x $filesize %x %x' % (srcaddr, dstaddr, dstsize)
+ )
+ assert expected_op not in output
+ output = u_boot_console.run_command('echo $?')
+ assert output.endswith('0')
+
+@pytest.mark.buildconfigspec('cmd_zynq_aes')
+def test_zynq_aes_bitstream(u_boot_console):
+ f = u_boot_console.config.env.get('env__zynq_aes_readable_file', None)
+ if not f:
+ pytest.skip('No TFTP readable file for zynq secure aes case to read')
+
+ zynq_secure_pre_commands(u_boot_console)
+ test_net.test_net_dhcp(u_boot_console)
+ if not test_net.net_set_up:
+ test_net.test_net_setup_static(u_boot_console)
+
+ srcaddr = f.get('srcaddr', None)
+ if not srcaddr:
+ addr = u_boot_utils.find_ram_base(u_boot_console)
+
+ expected_tftp = 'Bytes transferred = '
+ fn = f['fnbit']
+ output = u_boot_console.run_command('tftpboot %x %s' % (srcaddr, fn))
+ assert expected_tftp in output
+
+ expected_op = 'zynq aes [operation type] <srcaddr>'
+ output = u_boot_console.run_command(
+ 'zynq aes load %x $filesize' % (srcaddr)
+ )
+ assert expected_op not in output
+ output = u_boot_console.run_command('echo $?')
+ assert output.endswith('0')
+
+@pytest.mark.buildconfigspec('cmd_zynq_aes')
+def test_zynq_aes_partial_bitstream(u_boot_console):
+ f = u_boot_console.config.env.get('env__zynq_aes_readable_file', None)
+ if not f:
+ pytest.skip('No TFTP readable file for zynq secure aes case to read')
+
+ zynq_secure_pre_commands(u_boot_console)
+ test_net.test_net_dhcp(u_boot_console)
+ if not test_net.net_set_up:
+ test_net.test_net_setup_static(u_boot_console)
+
+ srcaddr = f.get('srcaddr', None)
+ if not srcaddr:
+ addr = u_boot_utils.find_ram_base(u_boot_console)
+
+ expected_tftp = 'Bytes transferred = '
+ fn = f['fnpbit']
+ output = u_boot_console.run_command('tftpboot %x %s' % (srcaddr, fn))
+ assert expected_tftp in output
+
+ expected_op = 'zynq aes [operation type] <srcaddr>'
+ output = u_boot_console.run_command('zynq aes loadp %x $filesize' % (srcaddr))
+ assert expected_op not in output
+ output = u_boot_console.run_command('echo $?')
+ assert output.endswith('0')
+
+@pytest.mark.buildconfigspec('cmd_zynq_rsa')
+def test_zynq_rsa_image(u_boot_console):
+ f = u_boot_console.config.env.get('env__zynq_rsa_readable_file', None)
+ if not f:
+ pytest.skip('No TFTP readable file for zynq secure rsa case to read')
+
+ zynq_secure_pre_commands(u_boot_console)
+ test_net.test_net_dhcp(u_boot_console)
+ if not test_net.net_set_up:
+ test_net.test_net_setup_static(u_boot_console)
+
+ srcaddr = f.get('srcaddr', None)
+ if not srcaddr:
+ addr = u_boot_utils.find_ram_base(u_boot_console)
+
+ expected_tftp = 'Bytes transferred = '
+ fn = f['fn']
+ output = u_boot_console.run_command('tftpboot %x %s' % (srcaddr, fn))
+ assert expected_tftp in output
+
+ expected_op = 'zynq rsa <baseaddr>'
+ output = u_boot_console.run_command('zynq rsa %x ' % (srcaddr))
+ assert expected_op not in output
+ output = u_boot_console.run_command('echo $?')
+ assert output.endswith('0')
+
+@pytest.mark.buildconfigspec('cmd_zynq_rsa')
+def test_zynq_rsa_image_invalid(u_boot_console):
+ f = u_boot_console.config.env.get('env__zynq_rsa_readable_file', None)
+ if not f:
+ pytest.skip('No TFTP readable file for zynq secure rsa case to read')
+
+ zynq_secure_pre_commands(u_boot_console)
+ test_net.test_net_dhcp(u_boot_console)
+ if not test_net.net_set_up:
+ test_net.test_net_setup_static(u_boot_console)
+
+ srcaddr = f.get('srcaddr', None)
+ if not srcaddr:
+ addr = u_boot_utils.find_ram_base(u_boot_console)
+
+ expected_tftp = 'Bytes transferred = '
+ fninvalid = f['fninvalid']
+ output = u_boot_console.run_command('tftpboot %x %s' % (srcaddr, fninvalid))
+ assert expected_tftp in output
+
+ expected_op = 'zynq rsa <baseaddr>'
+ output = u_boot_console.run_command('zynq rsa %x ' % (srcaddr))
+ assert expected_op in output
+ output = u_boot_console.run_command('echo $?')
+ assert not output.endswith('0')
diff --git a/test/py/tests/test_zynqmp_rpu.py b/test/py/tests/test_zynqmp_rpu.py
new file mode 100644
index 0000000..479a612
--- /dev/null
+++ b/test/py/tests/test_zynqmp_rpu.py
@@ -0,0 +1,208 @@
+# SPDX-License-Identifier: GPL-2.0
+# (C) Copyright 2023, Advanced Micro Devices, Inc.
+
+import pytest
+import random
+import string
+import test_net
+
+"""
+Note: This test relies on boardenv_* containing configuration values to define
+RPU applications information for AMD's ZynqMP SoC which contains, application
+names, processors, address where it is built, expected output and the tftp load
+addresses. This test will be automatically skipped without this.
+
+It also relies on dhcp or setup_static net test to support tftp to load
+application on DDR. All the environment parameters are stored sequentially.
+The length of all parameters values should be same. For example, if 2 app_names
+are defined in a list as a value of parameter 'app_name' then the other
+parameters value also should have a list with 2 items.
+It will run RPU cases for all the applications defined in boardenv_*
+configuration file.
+
+Example:
+env__zynqmp_rpu_apps = {
+ 'app_name': ['hello_world_r5_0_ddr.elf', 'hello_world_r5_1_ddr.elf'],
+ 'proc': ['rpu0', 'rpu1'],
+ 'cpu_num': [4, 5],
+ 'addr': [0xA00000, 0xB00000],
+ 'output': ['Successfully ran Hello World application on DDR from RPU0',
+ 'Successfully ran Hello World application on DDR from RPU1'],
+ 'tftp_addr': [0x100000, 0x200000],
+}
+"""
+
+# Get rpu apps params from env
+def get_rpu_apps_env(u_boot_console):
+ rpu_apps = u_boot_console.config.env.get('env__zynqmp_rpu_apps', False)
+ if not rpu_apps:
+ pytest.skip('ZynqMP RPU application info not defined!')
+
+ apps = rpu_apps.get('app_name', None)
+ if not apps:
+ pytest.skip('No RPU application found!')
+
+ procs = rpu_apps.get('proc', None)
+ if not procs:
+ pytest.skip('No RPU application processor provided!')
+
+ cpu_nums = rpu_apps.get('cpu_num', None)
+ if not cpu_nums:
+ pytest.skip('No CPU number for respective processor provided!')
+
+ addrs = rpu_apps.get('addr', None)
+ if not addrs:
+ pytest.skip('No RPU application build address found!')
+
+ outputs = rpu_apps.get('output', None)
+ if not outputs:
+ pytest.skip('Expected output not found!')
+
+ tftp_addrs = rpu_apps.get('tftp_addr', None)
+ if not tftp_addrs:
+ pytest.skip('TFTP address to load application not found!')
+
+ return apps, procs, cpu_nums, addrs, outputs, tftp_addrs
+
+# Check return code
+def ret_code(u_boot_console):
+ return u_boot_console.run_command('echo $?')
+
+# Initialize tcm
+def tcminit(u_boot_console, rpu_mode):
+ output = u_boot_console.run_command('zynqmp tcminit %s' % rpu_mode)
+ assert 'Initializing TCM overwrites TCM content' in output
+ return ret_code(u_boot_console)
+
+# Load application in DDR
+def load_app_ddr(u_boot_console, tftp_addr, app):
+ output = u_boot_console.run_command('tftpboot %x %s' % (tftp_addr, app))
+ assert 'TIMEOUT' not in output
+ assert 'Bytes transferred = ' in output
+
+ # Load elf
+ u_boot_console.run_command('bootelf -p %x' % tftp_addr)
+ assert ret_code(u_boot_console).endswith('0')
+
+# Disable cpus
+def disable_cpus(u_boot_console, cpu_nums):
+ for num in cpu_nums:
+ u_boot_console.run_command(f'cpu {num} disable')
+
+# Load apps on RPU cores
+def rpu_apps_load(u_boot_console, rpu_mode):
+ apps, procs, cpu_nums, addrs, outputs, tftp_addrs = get_rpu_apps_env(
+ u_boot_console)
+ test_net.test_net_dhcp(u_boot_console)
+ if not test_net.net_set_up:
+ test_net.test_net_setup_static(u_boot_console)
+
+ try:
+ assert tcminit(u_boot_console, rpu_mode).endswith('0')
+
+ for i in range(len(apps)):
+ if rpu_mode == 'lockstep' and procs[i] != 'rpu0':
+ continue
+
+ load_app_ddr(u_boot_console, tftp_addrs[i], apps[i])
+ rel_addr = int(addrs[i] + 0x3C)
+
+ # Release cpu at app load address
+ cpu_num = cpu_nums[i]
+ cmd = 'cpu %d release %x %s' % (cpu_num, rel_addr, rpu_mode)
+ output = u_boot_console.run_command(cmd)
+ exp_op = f'Using TCM jump trampoline for address {hex(rel_addr)}'
+ assert exp_op in output
+ assert f'R5 {rpu_mode} mode' in output
+ u_boot_console.wait_for(outputs[i])
+ assert ret_code(u_boot_console).endswith('0')
+ finally:
+ disable_cpus(u_boot_console, cpu_nums)
+
+@pytest.mark.buildconfigspec('cmd_zynqmp')
+def test_zynqmp_rpu_app_load_split(u_boot_console):
+ rpu_apps_load(u_boot_console, 'split')
+
+@pytest.mark.buildconfigspec('cmd_zynqmp')
+def test_zynqmp_rpu_app_load_lockstep(u_boot_console):
+ rpu_apps_load(u_boot_console, 'lockstep')
+
+@pytest.mark.buildconfigspec('cmd_zynqmp')
+def test_zynqmp_rpu_app_load_negative(u_boot_console):
+ apps, procs, cpu_nums, addrs, outputs, tftp_addrs = get_rpu_apps_env(
+ u_boot_console)
+
+ # Invalid commands
+ u_boot_console.run_command('zynqmp tcminit mode')
+ assert ret_code(u_boot_console).endswith('1')
+
+ rand_str = ''.join(random.choices(string.ascii_lowercase, k=4))
+ u_boot_console.run_command('zynqmp tcminit %s' % rand_str)
+ assert ret_code(u_boot_console).endswith('1')
+
+ rand_num = random.randint(2, 100)
+ u_boot_console.run_command('zynqmp tcminit %d' % rand_num)
+ assert ret_code(u_boot_console).endswith('1')
+
+ test_net.test_net_dhcp(u_boot_console)
+ if not test_net.net_set_up:
+ test_net.test_net_setup_static(u_boot_console)
+
+ try:
+ rpu_mode = 'split'
+ assert tcminit(u_boot_console, rpu_mode).endswith('0')
+
+ for i in range(len(apps)):
+ load_app_ddr(u_boot_console, tftp_addrs[i], apps[i])
+
+ # Run in split mode at different load address
+ rel_addr = int(addrs[i]) + random.randint(200, 1000)
+ cpu_num = cpu_nums[i]
+ cmd = 'cpu %d release %x %s' % (cpu_num, rel_addr, rpu_mode)
+ output = u_boot_console.run_command(cmd)
+ exp_op = f'Using TCM jump trampoline for address {hex(rel_addr)}'
+ assert exp_op in output
+ assert f'R5 {rpu_mode} mode' in output
+ assert not outputs[i] in output
+
+ # Invalid rpu mode
+ rand_str = ''.join(random.choices(string.ascii_lowercase, k=4))
+ cmd = 'cpu %d release %x %s' % (cpu_num, rel_addr, rand_str)
+ output = u_boot_console.run_command(cmd)
+ assert exp_op in output
+ assert f'Unsupported mode' in output
+ assert not ret_code(u_boot_console).endswith('0')
+
+ # Switch to lockstep mode, without disabling CPUs
+ rpu_mode = 'lockstep'
+ u_boot_console.run_command('zynqmp tcminit %s' % rpu_mode)
+ assert not ret_code(u_boot_console).endswith('0')
+
+ # Disable cpus
+ disable_cpus(u_boot_console, cpu_nums)
+
+ # Switch to lockstep mode, after disabling CPUs
+ output = u_boot_console.run_command('zynqmp tcminit %s' % rpu_mode)
+ assert 'Initializing TCM overwrites TCM content' in output
+ assert ret_code(u_boot_console).endswith('0')
+
+ # Run lockstep mode for RPU1
+ for i in range(len(apps)):
+ if procs[i] == 'rpu0':
+ continue
+
+ load_app_ddr(u_boot_console, tftp_addrs[i], apps[i])
+ rel_addr = int(addrs[i] + 0x3C)
+ cpu_num = cpu_nums[i]
+ cmd = 'cpu %d release %x %s' % (cpu_num, rel_addr, rpu_mode)
+ output = u_boot_console.run_command(cmd)
+ exp_op = f'Using TCM jump trampoline for address {hex(rel_addr)}'
+ assert exp_op in output
+ assert f'R5 {rpu_mode} mode' in output
+ assert u_boot_console.p.expect([outputs[i]])
+ finally:
+ disable_cpus(u_boot_console, cpu_nums)
+ # This forces the console object to be shutdown, so any subsequent test
+ # will reset the board back into U-Boot.
+ u_boot_console.drain_console()
+ u_boot_console.cleanup_spawn()
diff --git a/test/py/tests/test_zynqmp_secure.py b/test/py/tests/test_zynqmp_secure.py
new file mode 100644
index 0000000..570bd24
--- /dev/null
+++ b/test/py/tests/test_zynqmp_secure.py
@@ -0,0 +1,104 @@
+# SPDX-License-Identifier: GPL-2.0
+# (C) Copyright 2023, Advanced Micro Devices, Inc.
+
+import pytest
+import re
+import u_boot_utils
+import test_net
+
+"""
+This test verifies different type of secure boot images loaded at the DDR for
+AMD's ZynqMP SoC.
+
+Note: This test relies on boardenv_* containing configuration values to define
+the files to be used for testing. Without this, this test will be automatically
+skipped. It also relies on dhcp or setup_static net test to support tftp to
+load files from a TFTP server.
+
+For example:
+
+# Details regarding the files that may be read from a TFTP server. This
+# variable may be omitted or set to None if zynqmp secure testing is not
+# possible or desired.
+env__zynqmp_secure_readable_file = {
+ 'fn': 'auth_bhdr_ppk1.bin',
+ 'enckupfn': 'auth_bhdr_enc_kup_load.bin',
+ 'addr': 0x1000000,
+ 'keyaddr': 0x100000,
+ 'keyfn': 'aes.txt',
+}
+"""
+
+@pytest.mark.buildconfigspec('cmd_zynqmp')
+def test_zynqmp_secure_boot_image(u_boot_console):
+ """This test verifies secure boot image at the DDR address for
+ authentication only case.
+ """
+
+ f = u_boot_console.config.env.get('env__zynqmp_secure_readable_file', None)
+ if not f:
+ pytest.skip('No TFTP readable file for zynqmp secure cases to read')
+
+ test_net.test_net_dhcp(u_boot_console)
+ if not test_net.net_set_up:
+ test_net.test_net_setup_static(u_boot_console)
+
+ addr = f.get('addr', None)
+ if not addr:
+ addr = u_boot_utils.find_ram_base(u_boot_console)
+
+ expected_tftp = 'Bytes transferred = '
+ fn = f['fn']
+ output = u_boot_console.run_command('tftpboot %x %s' % (addr, fn))
+ assert expected_tftp in output
+
+ output = u_boot_console.run_command('zynqmp secure %x $filesize' % (addr))
+ assert 'Verified image at' in output
+ ver_addr = re.search(r'Verified image at 0x(.+)', output).group(1)
+ output = u_boot_console.run_command('echo $?')
+ assert output.endswith('0')
+ output = u_boot_console.run_command('print zynqmp_verified_img_addr')
+ assert f'zynqmp_verified_img_addr={ver_addr}' in output
+ assert 'Error' not in output
+
+
+@pytest.mark.buildconfigspec('cmd_zynqmp')
+def test_zynqmp_secure_boot_img_kup(u_boot_console):
+ """This test verifies secure boot image at the DDR address for encryption
+ with kup key case.
+ """
+
+ f = u_boot_console.config.env.get('env__zynqmp_secure_readable_file', None)
+ if not f:
+ pytest.skip('No TFTP readable file for zynqmp secure cases to read')
+
+ test_net.test_net_dhcp(u_boot_console)
+ if not test_net.net_set_up:
+ test_net.test_net_setup_static(u_boot_console)
+
+ keyaddr = f.get('keyaddr', None)
+ if not keyaddr:
+ addr = u_boot_utils.find_ram_base(u_boot_console)
+ expected_tftp = 'Bytes transferred = '
+ keyfn = f['keyfn']
+ output = u_boot_console.run_command('tftpboot %x %s' % (keyaddr, keyfn))
+ assert expected_tftp in output
+
+ addr = f.get('addr', None)
+ if not addr:
+ addr = u_boot_utils.find_ram_base(u_boot_console)
+ expected_tftp = 'Bytes transferred = '
+ fn = f['enckupfn']
+ output = u_boot_console.run_command('tftpboot %x %s' % (addr, fn))
+ assert expected_tftp in output
+
+ output = u_boot_console.run_command(
+ 'zynqmp secure %x $filesize %x' % (addr, keyaddr)
+ )
+ assert 'Verified image at' in output
+ ver_addr = re.search(r'Verified image at 0x(.+)', output).group(1)
+ output = u_boot_console.run_command('echo $?')
+ assert output.endswith('0')
+ output = u_boot_console.run_command('print zynqmp_verified_img_addr')
+ assert f'zynqmp_verified_img_addr={ver_addr}' in output
+ assert 'Error' not in output
diff --git a/test/unicode_ut.c b/test/unicode_ut.c
index 1d0d90c..47c3f52 100644
--- a/test/unicode_ut.c
+++ b/test/unicode_ut.c
@@ -752,9 +752,10 @@
const u32 u1[] = {0x55, 0x2D, 0x42, 0x6F, 0x6F, 0x74, 0x0000};
const u32 u2[] = {0x6B, 0x61, 0x66, 0x62, 0xE1, 0x74, 0x75, 0x72, 0x00};
- const u32 u3[] = {0x0392, 0x20, 0x69, 0x73, 0x20, 0x6E, 0x6F, 0x74,
- 0x20, 0x42, 0x00};
+ const u32 u3[] = {0x6f5c, 0x6c34, 0x8266};
const u32 u4[] = {0x6A, 0x32, 0x6C, 0x00};
+ const u32 u5[] = {0x0392, 0x20, 0x69, 0x73, 0x20, 0x6E, 0x6F, 0x74,
+ 0x20, 0x42, 0x00};
memset(buf, 0, sizeof(buf));
utf8_to_utf32_stream_helper(d1, buf);
@@ -765,10 +766,14 @@
ut_asserteq_mem(u2, buf, sizeof(u2));
memset(buf, 0, sizeof(buf));
- utf8_to_utf32_stream_helper(d5, buf);
+ utf8_to_utf32_stream_helper(d3, buf);
ut_asserteq_mem(u3, buf, sizeof(u3));
memset(buf, 0, sizeof(buf));
+ utf8_to_utf32_stream_helper(d5, buf);
+ ut_asserteq_mem(u5, buf, sizeof(u5));
+
+ memset(buf, 0, sizeof(buf));
utf8_to_utf32_stream_helper(j2, buf);
ut_asserteq_mem(u4, buf, sizeof(u4));
diff --git a/test/ut.c b/test/ut.c
index 28da417..628e9dc 100644
--- a/test/ut.c
+++ b/test/ut.c
@@ -121,6 +121,33 @@
return 0;
}
+int ut_check_skip_to_linen(struct unit_test_state *uts, const char *fmt, ...)
+{
+ va_list args;
+ int len;
+ int ret;
+
+ va_start(args, fmt);
+ len = vsnprintf(uts->expect_str, sizeof(uts->expect_str), fmt, args);
+ va_end(args);
+ if (len >= sizeof(uts->expect_str)) {
+ ut_fail(uts, __FILE__, __LINE__, __func__,
+ "unit_test_state->expect_str too small");
+ return -EOVERFLOW;
+ }
+ while (1) {
+ if (!console_record_avail())
+ return -ENOENT;
+ ret = readline_check(uts);
+ if (ret < 0)
+ return ret;
+
+ if (!strncmp(uts->expect_str, uts->actual_str,
+ strlen(uts->expect_str)))
+ return 0;
+ }
+}
+
int ut_check_skip_to_line(struct unit_test_state *uts, const char *fmt, ...)
{
va_list args;
diff --git a/tools/Kconfig b/tools/Kconfig
index 6e23f44..f01ed78 100644
--- a/tools/Kconfig
+++ b/tools/Kconfig
@@ -25,6 +25,11 @@
This selection does not affect target features, such as runtime FIT
signature verification.
+config TOOLS_KWBIMAGE
+ bool "Enable kwbimage support in host tools"
+ default y
+ select TOOLS_LIBCRYPTO
+
config TOOLS_FIT
def_bool y
help
@@ -46,6 +51,7 @@
Support the rsassa-pss signature scheme in the tools builds
config TOOLS_FIT_SIGNATURE
+ depends on TOOLS_LIBCRYPTO
def_bool y
help
Enable signature verification of FIT uImages in the tools builds
diff --git a/tools/Makefile b/tools/Makefile
index 1aa1e36..6a4280e 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -94,6 +94,8 @@
generated/lib/fdt-libcrypto.o \
sunxi_toc0.o
+KWB_IMAGE_OBJS-$(CONFIG_TOOLS_LIBCRYPTO) := kwbimage.o
+
ROCKCHIP_OBS = generated/lib/rc4.o rkcommon.o rkimage.o rksd.o rkspi.o
# common objs for dumpimage and mkimage
@@ -114,7 +116,7 @@
imximage.o \
imx8image.o \
imx8mimage.o \
- kwbimage.o \
+ $(KWB_IMAGE_OBJS-y) \
generated/lib/md5.o \
lpc32xximage.o \
mxsimage.o \
diff --git a/tools/binman/binman.rst b/tools/binman/binman.rst
index 020988d..230e055 100644
--- a/tools/binman/binman.rst
+++ b/tools/binman/binman.rst
@@ -2060,7 +2060,7 @@
If the blobs are in a different directory, you can specify this with the `-I`
option.
-For U-Boot, you can use set the BINMAN_INDIRS environment variable to provide a
+For U-Boot, you can set the BINMAN_INDIRS environment variable to provide a
space-separated list of directories to search for binary blobs::
BINMAN_INDIRS="odroid-c4/fip/g12a \
diff --git a/tools/binman/btool/openssl.py b/tools/binman/btool/openssl.py
index 7ee2683..fe81a1f 100644
--- a/tools/binman/btool/openssl.py
+++ b/tools/binman/btool/openssl.py
@@ -82,7 +82,7 @@
return self.run_cmd(*args)
def x509_cert_sysfw(self, cert_fname, input_fname, key_fname, sw_rev,
- config_fname, req_dist_name_dict):
+ config_fname, req_dist_name_dict, firewall_cert_data):
"""Create a certificate to be booted by system firmware
Args:
@@ -94,6 +94,13 @@
req_dist_name_dict (dict): Dictionary containing key-value pairs of
req_distinguished_name section extensions, must contain extensions for
C, ST, L, O, OU, CN and emailAddress
+ firewall_cert_data (dict):
+ - auth_in_place (int): The Priv ID for copying as the
+ specific host in firewall protected region
+ - num_firewalls (int): The number of firewalls in the
+ extended certificate
+ - certificate (str): Extended firewall certificate with
+ the information for the firewall configurations.
Returns:
str: Tool output
@@ -121,6 +128,7 @@
1.3.6.1.4.1.294.1.3 = ASN1:SEQUENCE:swrv
1.3.6.1.4.1.294.1.34 = ASN1:SEQUENCE:sysfw_image_integrity
1.3.6.1.4.1.294.1.35 = ASN1:SEQUENCE:sysfw_image_load
+1.3.6.1.4.1.294.1.37 = ASN1:SEQUENCE:firewall
[ swrv ]
swrv = INTEGER:{sw_rev}
@@ -132,7 +140,11 @@
[ sysfw_image_load ]
destAddr = FORMAT:HEX,OCT:00000000
-authInPlace = INTEGER:2
+authInPlace = INTEGER:{hex(firewall_cert_data['auth_in_place'])}
+
+[ firewall ]
+numFirewallRegions = INTEGER:{firewall_cert_data['num_firewalls']}
+{firewall_cert_data['certificate']}
''', file=outf)
args = ['req', '-new', '-x509', '-key', key_fname, '-nodes',
'-outform', 'DER', '-out', cert_fname, '-config', config_fname,
diff --git a/tools/binman/elf_test.py b/tools/binman/elf_test.py
index e3dee79..b641341 100644
--- a/tools/binman/elf_test.py
+++ b/tools/binman/elf_test.py
@@ -249,8 +249,8 @@
def testEmbedFail(self):
"""Test calling GetSymbolFileOffset() without elftools"""
+ old_val = elf.ELF_TOOLS
try:
- old_val = elf.ELF_TOOLS
elf.ELF_TOOLS = False
fname = self.ElfTestFile('embed_data')
with self.assertRaises(ValueError) as e:
@@ -290,8 +290,8 @@
def test_read_segments_fail(self):
"""Test for read_loadable_segments() without elftools"""
+ old_val = elf.ELF_TOOLS
try:
- old_val = elf.ELF_TOOLS
elf.ELF_TOOLS = False
fname = self.ElfTestFile('embed_data')
with self.assertRaises(ValueError) as e:
@@ -327,8 +327,8 @@
def test_get_file_offset_fail(self):
"""Test calling GetFileOffset() without elftools"""
+ old_val = elf.ELF_TOOLS
try:
- old_val = elf.ELF_TOOLS
elf.ELF_TOOLS = False
fname = self.ElfTestFile('embed_data')
with self.assertRaises(ValueError) as e:
@@ -351,8 +351,8 @@
def test_get_symbol_from_address_fail(self):
"""Test calling GetSymbolFromAddress() without elftools"""
+ old_val = elf.ELF_TOOLS
try:
- old_val = elf.ELF_TOOLS
elf.ELF_TOOLS = False
fname = self.ElfTestFile('embed_data')
with self.assertRaises(ValueError) as e:
diff --git a/tools/binman/entries.rst b/tools/binman/entries.rst
index 61de7f1..254afe7 100644
--- a/tools/binman/entries.rst
+++ b/tools/binman/entries.rst
@@ -1906,6 +1906,20 @@
+.. _etype_ti_dm:
+
+Entry: ti-dm: TI Device Manager (DM) blob
+-----------------------------------------
+
+Properties / Entry arguments:
+ - ti-dm-path: Filename of file to read into the entry, typically ti-dm.bin
+
+This entry holds the device manager responsible for resource and power management
+in K3 devices. See https://software-dl.ti.com/tisci/esd/latest/ for more information
+about TI DM.
+
+
+
.. _etype_ti_secure:
Entry: ti-secure: Entry containing a TI x509 certificate binary
diff --git a/tools/binman/etype/ti_board_config.py b/tools/binman/etype/ti_board_config.py
index 94f894c..2c3bb8f 100644
--- a/tools/binman/etype/ti_board_config.py
+++ b/tools/binman/etype/ti_board_config.py
@@ -9,6 +9,7 @@
import os
import struct
import yaml
+import yamllint
from collections import OrderedDict
from jsonschema import validate
@@ -18,6 +19,7 @@
from binman.etype.section import Entry_section
from dtoc import fdt_util
from u_boot_pylib import tools
+from yamllint import config
BOARDCFG = 0xB
BOARDCFG_SEC = 0xD
@@ -244,6 +246,9 @@
with open(self._schema_file, 'r') as sch:
self.schema_yaml = yaml.safe_load(sch)
+ yaml_config = config.YamlLintConfig("extends: default")
+ for p in yamllint.linter.run(open(self._config_file, "r"), yaml_config):
+ self.Raise(f"Yamllint error: {p.line}: {p.rule}")
try:
validate(self.file_yaml, self.schema_yaml)
except Exception as e:
diff --git a/tools/binman/etype/ti_dm.py b/tools/binman/etype/ti_dm.py
new file mode 100644
index 0000000..0faa0bf
--- /dev/null
+++ b/tools/binman/etype/ti_dm.py
@@ -0,0 +1,22 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
+# Written by Neha Malcom Francis <n-francis@ti.com>
+#
+# Entry-type module for TI Device Manager (DM)
+#
+
+from binman.etype.blob_named_by_arg import Entry_blob_named_by_arg
+
+class Entry_ti_dm(Entry_blob_named_by_arg):
+ """TI Device Manager (DM) blob
+
+ Properties / Entry arguments:
+ - ti-dm-path: Filename of file to read into the entry, typically ti-dm.bin
+
+ This entry holds the device manager responsible for resource and power management
+ in K3 devices. See https://software-dl.ti.com/tisci/esd/latest/ for more information
+ about TI DM.
+ """
+ def __init__(self, section, etype, node):
+ super().__init__(section, etype, node, 'ti-dm')
+ self.external = True
diff --git a/tools/binman/etype/ti_secure.py b/tools/binman/etype/ti_secure.py
index d939dce..704dcf8 100644
--- a/tools/binman/etype/ti_secure.py
+++ b/tools/binman/etype/ti_secure.py
@@ -7,9 +7,44 @@
from binman.entry import EntryArg
from binman.etype.x509_cert import Entry_x509_cert
+from dataclasses import dataclass
from dtoc import fdt_util
+@dataclass
+class Firewall():
+ id: int
+ region: int
+ control : int
+ permissions: list
+ start_address: str
+ end_address: str
+
+ def ensure_props(self, etype, name):
+ missing_props = []
+ for key, val in self.__dict__.items():
+ if val is None:
+ missing_props += [key]
+
+ if len(missing_props):
+ etype.Raise(f"Subnode '{name}' is missing properties: {','.join(missing_props)}")
+
+ def get_certificate(self) -> str:
+ unique_identifier = f"{self.id}{self.region}"
+ cert = f"""
+firewallID{unique_identifier} = INTEGER:{self.id}
+region{unique_identifier} = INTEGER:{self.region}
+control{unique_identifier} = INTEGER:{hex(self.control)}
+nPermissionRegs{unique_identifier} = INTEGER:{len(self.permissions)}
+"""
+ for index, permission in enumerate(self.permissions):
+ cert += f"""permissions{unique_identifier}{index} = INTEGER:{hex(permission)}
+"""
+ cert += f"""startAddress{unique_identifier} = FORMAT:HEX,OCT:{self.start_address:02x}
+endAddress{unique_identifier} = FORMAT:HEX,OCT:{self.end_address:02x}
+"""
+ return cert
+
class Entry_ti_secure(Entry_x509_cert):
"""Entry containing a TI x509 certificate binary
@@ -17,6 +52,11 @@
- content: List of phandles to entries to sign
- keyfile: Filename of file containing key to sign binary with
- sha: Hash function to be used for signing
+ - auth-in-place: This is an integer field that contains two pieces
+ of information
+ Lower Byte - Remains 0x02 as per our use case
+ ( 0x02: Move the authenticated binary back to the header )
+ Upper Byte - The Host ID of the core owning the firewall
Output files:
- input.<unique_name> - input file passed to openssl
@@ -25,6 +65,35 @@
- cert.<unique_name> - output file generated by openssl (which is
used as the entry contents)
+ Depending on auth-in-place information in the inputs, we read the
+ firewall nodes that describe the configurations of firewall that TIFS
+ will be doing after reading the certificate.
+
+ The syntax of the firewall nodes are as such:
+
+ firewall-257-0 {
+ id = <257>; /* The ID of the firewall being configured */
+ region = <0>; /* Region number to configure */
+
+ control = /* The control register */
+ <(FWCTRL_EN | FWCTRL_LOCK | FWCTRL_BG | FWCTRL_CACHE)>;
+
+ permissions = /* The permission registers */
+ <((FWPRIVID_ALL << FWPRIVID_SHIFT) |
+ FWPERM_SECURE_PRIV_RWCD |
+ FWPERM_SECURE_USER_RWCD |
+ FWPERM_NON_SECURE_PRIV_RWCD |
+ FWPERM_NON_SECURE_USER_RWCD)>;
+
+ /* More defines can be found in k3-security.h */
+
+ start_address = /* The Start Address of the firewall */
+ <0x0 0x0>;
+ end_address = /* The End Address of the firewall */
+ <0xff 0xffffffff>;
+ };
+
+
openssl signs the provided data, using the TI templated config file and
writes the signature in this entry. This allows verification that the
data is genuine.
@@ -32,11 +101,20 @@
def __init__(self, section, etype, node):
super().__init__(section, etype, node)
self.openssl = None
+ self.firewall_cert_data: dict = {
+ 'auth_in_place': 0x02,
+ 'num_firewalls': 0,
+ 'certificate': '',
+ }
def ReadNode(self):
super().ReadNode()
self.key_fname = self.GetEntryArgsOrProps([
EntryArg('keyfile', str)], required=True)[0]
+ auth_in_place = fdt_util.GetInt(self._node, 'auth-in-place')
+ if auth_in_place:
+ self.firewall_cert_data['auth_in_place'] = auth_in_place
+ self.ReadFirewallNode()
self.sha = fdt_util.GetInt(self._node, 'sha', 512)
self.req_dist_name = {'C': 'US',
'ST': 'TX',
@@ -46,6 +124,23 @@
'CN': 'TI Support',
'emailAddress': 'support@ti.com'}
+ def ReadFirewallNode(self):
+ self.firewall_cert_data['certificate'] = ""
+ self.firewall_cert_data['num_firewalls'] = 0
+ for node in self._node.subnodes:
+ if 'firewall' in node.name:
+ firewall = Firewall(
+ fdt_util.GetInt(node, 'id'),
+ fdt_util.GetInt(node, 'region'),
+ fdt_util.GetInt(node, 'control'),
+ fdt_util.GetPhandleList(node, 'permissions'),
+ fdt_util.GetInt64(node, 'start_address'),
+ fdt_util.GetInt64(node, 'end_address'),
+ )
+ firewall.ensure_props(self, node.name)
+ self.firewall_cert_data['num_firewalls'] += 1
+ self.firewall_cert_data['certificate'] += firewall.get_certificate()
+
def GetCertificate(self, required):
"""Get the contents of this entry
diff --git a/tools/binman/etype/x509_cert.py b/tools/binman/etype/x509_cert.py
index fc0bb12..29630d1 100644
--- a/tools/binman/etype/x509_cert.py
+++ b/tools/binman/etype/x509_cert.py
@@ -51,6 +51,7 @@
self.hashval_sysfw_data = None
self.sysfw_inner_cert_ext_boot_block = None
self.dm_data_ext_boot_block = None
+ self.firewall_cert_data = None
def ReadNode(self):
super().ReadNode()
@@ -98,7 +99,8 @@
key_fname=self.key_fname,
config_fname=config_fname,
sw_rev=self.sw_rev,
- req_dist_name_dict=self.req_dist_name)
+ req_dist_name_dict=self.req_dist_name,
+ firewall_cert_data=self.firewall_cert_data)
elif type == 'rom':
stdout = self.openssl.x509_cert_rom(
cert_fname=output_fname,
diff --git a/tools/binman/ftest.py b/tools/binman/ftest.py
index 5ace2a8..8a44bc0 100644
--- a/tools/binman/ftest.py
+++ b/tools/binman/ftest.py
@@ -88,6 +88,7 @@
FSP_T_DATA = b'fsp_t'
ATF_BL31_DATA = b'bl31'
TEE_OS_DATA = b'this is some tee OS data'
+TI_DM_DATA = b'tidmtidm'
ATF_BL2U_DATA = b'bl2u'
OPENSBI_DATA = b'opensbi'
SCP_DATA = b'scp'
@@ -221,6 +222,7 @@
TestFunctional._MakeInputFile('compress_big', COMPRESS_DATA_BIG)
TestFunctional._MakeInputFile('bl31.bin', ATF_BL31_DATA)
TestFunctional._MakeInputFile('tee-pager.bin', TEE_OS_DATA)
+ TestFunctional._MakeInputFile('dm.bin', TI_DM_DATA)
TestFunctional._MakeInputFile('bl2u.bin', ATF_BL2U_DATA)
TestFunctional._MakeInputFile('fw_dynamic.bin', OPENSBI_DATA)
TestFunctional._MakeInputFile('scp.bin', SCP_DATA)
@@ -2840,12 +2842,14 @@
fdt_size = entries['section'].GetEntries()['u-boot-dtb'].size
fdtmap_offset = entries['fdtmap'].offset
+ tmpdir = None
try:
tmpdir, updated_fname = self._SetupImageInTmpdir()
with test_util.capture_sys_output() as (stdout, stderr):
self._DoBinman('ls', '-i', updated_fname)
finally:
- shutil.rmtree(tmpdir)
+ if tmpdir:
+ shutil.rmtree(tmpdir)
lines = stdout.getvalue().splitlines()
expected = [
'Name Image-pos Size Entry-type Offset Uncomp-size',
@@ -2866,12 +2870,14 @@
def testListCmdFail(self):
"""Test failing to list an image"""
self._DoReadFile('005_simple.dts')
+ tmpdir = None
try:
tmpdir, updated_fname = self._SetupImageInTmpdir()
with self.assertRaises(ValueError) as e:
self._DoBinman('ls', '-i', updated_fname)
finally:
- shutil.rmtree(tmpdir)
+ if tmpdir:
+ shutil.rmtree(tmpdir)
self.assertIn("Cannot find FDT map in image", str(e.exception))
def _RunListCmd(self, paths, expected):
@@ -3000,13 +3006,15 @@
self._CheckLz4()
self._DoReadFileRealDtb('130_list_fdtmap.dts')
fname = os.path.join(self._indir, 'output.extact')
+ tmpdir = None
try:
tmpdir, updated_fname = self._SetupImageInTmpdir()
with test_util.capture_sys_output() as (stdout, stderr):
self._DoBinman('extract', '-i', updated_fname, 'u-boot',
'-f', fname)
finally:
- shutil.rmtree(tmpdir)
+ if tmpdir:
+ shutil.rmtree(tmpdir)
data = tools.read_file(fname)
self.assertEqual(U_BOOT_DATA, data)
@@ -5183,12 +5191,14 @@
data = self._DoReadFileRealDtb('207_fip_ls.dts')
hdr, fents = fip_util.decode_fip(data)
+ tmpdir = None
try:
tmpdir, updated_fname = self._SetupImageInTmpdir()
with test_util.capture_sys_output() as (stdout, stderr):
self._DoBinman('ls', '-i', updated_fname)
finally:
- shutil.rmtree(tmpdir)
+ if tmpdir:
+ shutil.rmtree(tmpdir)
lines = stdout.getvalue().splitlines()
expected = [
'Name Image-pos Size Entry-type Offset Uncomp-size',
@@ -5393,12 +5403,14 @@
use_real_dtb=True,
extra_indirs=[os.path.join(self._indir, TEST_FDT_SUBDIR)])
+ tmpdir = None
try:
tmpdir, updated_fname = self._SetupImageInTmpdir()
with test_util.capture_sys_output() as (stdout, stderr):
self._RunBinman('ls', '-i', updated_fname)
finally:
- shutil.rmtree(tmpdir)
+ if tmpdir:
+ shutil.rmtree(tmpdir)
def testFitSubentryUsesBintool(self):
"""Test that binman FIT subentries can use bintools"""
@@ -5455,6 +5467,11 @@
data = self._DoReadFile('222_tee_os.dts')
self.assertEqual(TEE_OS_DATA, data[:len(TEE_OS_DATA)])
+ def testPackTiDm(self):
+ """Test that an image with a TI DM binary can be created"""
+ data = self._DoReadFile('225_ti_dm.dts')
+ self.assertEqual(TI_DM_DATA, data[:len(TI_DM_DATA)])
+
def testFitFdtOper(self):
"""Check handling of a specified FIT operation"""
entry_args = {
@@ -7013,6 +7030,12 @@
data = self._DoReadFile('293_ti_board_cfg.dts')
self.assertEqual(TI_BOARD_CONFIG_DATA, data)
+ def testTIBoardConfigLint(self):
+ """Test that an incorrectly linted config file would generate error"""
+ with self.assertRaises(ValueError) as e:
+ data = self._DoReadFile('323_ti_board_cfg_phony.dts')
+ self.assertIn("Yamllint error", str(e.exception))
+
def testTIBoardConfigCombined(self):
"""Test that a schema validated combined board config file can be generated"""
data = self._DoReadFile('294_ti_board_cfg_combined.dts')
@@ -7035,6 +7058,29 @@
entry_args=entry_args)[0]
self.assertGreater(len(data), len(TI_UNSECURE_DATA))
+ def testPackTiSecureFirewall(self):
+ """Test that an image with a TI secured binary can be created"""
+ keyfile = self.TestFile('key.key')
+ entry_args = {
+ 'keyfile': keyfile,
+ }
+ data_no_firewall = self._DoReadFileDtb('296_ti_secure.dts',
+ entry_args=entry_args)[0]
+ data_firewall = self._DoReadFileDtb('324_ti_secure_firewall.dts',
+ entry_args=entry_args)[0]
+ self.assertGreater(len(data_firewall),len(data_no_firewall))
+
+ def testPackTiSecureFirewallMissingProperty(self):
+ """Test that an image with a TI secured binary can be created"""
+ keyfile = self.TestFile('key.key')
+ entry_args = {
+ 'keyfile': keyfile,
+ }
+ with self.assertRaises(ValueError) as e:
+ data_firewall = self._DoReadFileDtb('325_ti_secure_firewall_missing_property.dts',
+ entry_args=entry_args)[0]
+ self.assertRegex(str(e.exception), "Node '/binman/ti-secure': Subnode 'firewall-0-2' is missing properties: id,region")
+
def testPackTiSecureMissingTool(self):
"""Test that an image with a TI secured binary (non-functional) can be created
when openssl is missing"""
diff --git a/tools/binman/pyproject.toml b/tools/binman/pyproject.toml
index b4b54fb..ba34437 100644
--- a/tools/binman/pyproject.toml
+++ b/tools/binman/pyproject.toml
@@ -4,11 +4,11 @@
[project]
name = "binary-manager"
-version = "0.0.2"
+version = "0.0.6"
authors = [
{ name="Simon Glass", email="sjg@chromium.org" },
]
-dependencies = ["pylibfdt", "u_boot_pylib", "dtoc"]
+dependencies = ["pylibfdt", "u_boot_pylib >= 0.0.6", "dtoc >= 0.0.6"]
description = "Binman firmware-packaging tool"
readme = "README.rst"
requires-python = ">=3.7"
@@ -19,7 +19,7 @@
]
[project.urls]
-"Homepage" = "https://u-boot.readthedocs.io/en/latest/develop/package/index.html"
+"Homepage" = "https://docs.u-boot.org/en/latest/develop/package/index.html"
"Bug Tracker" = "https://source.denx.de/groups/u-boot/-/issues"
[project.scripts]
diff --git a/tools/binman/test/225_ti_dm.dts b/tools/binman/test/225_ti_dm.dts
new file mode 100644
index 0000000..3ab7541
--- /dev/null
+++ b/tools/binman/test/225_ti_dm.dts
@@ -0,0 +1,13 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+/dts-v1/;
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ binman {
+ ti-dm {
+ filename = "dm.bin";
+ };
+ };
+};
diff --git a/tools/binman/test/323_ti_board_cfg_phony.dts b/tools/binman/test/323_ti_board_cfg_phony.dts
new file mode 100644
index 0000000..441296d
--- /dev/null
+++ b/tools/binman/test/323_ti_board_cfg_phony.dts
@@ -0,0 +1,14 @@
+// SPDX-License-Identifier: GPL-2.0+
+/dts-v1/;
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ binman {
+ ti-board-config {
+ config = "yaml/config_phony.yaml";
+ schema = "yaml/schema.yaml";
+ };
+ };
+};
diff --git a/tools/binman/test/324_ti_secure_firewall.dts b/tools/binman/test/324_ti_secure_firewall.dts
new file mode 100644
index 0000000..7ec407f
--- /dev/null
+++ b/tools/binman/test/324_ti_secure_firewall.dts
@@ -0,0 +1,28 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+/dts-v1/;
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ binman {
+ ti-secure {
+ content = <&unsecure_binary>;
+ auth-in-place = <0xa02>;
+
+ firewall-0-2 {
+ id = <0>;
+ region = <2>;
+ control = <0x31a>;
+ permissions = <0xc3ffff>;
+ start_address = <0x0 0x9e800000>;
+ end_address = <0x0 0x9fffffff>;
+ };
+
+ };
+ unsecure_binary: blob-ext {
+ filename = "ti_unsecure.bin";
+ };
+ };
+};
diff --git a/tools/binman/test/325_ti_secure_firewall_missing_property.dts b/tools/binman/test/325_ti_secure_firewall_missing_property.dts
new file mode 100644
index 0000000..24a0a99
--- /dev/null
+++ b/tools/binman/test/325_ti_secure_firewall_missing_property.dts
@@ -0,0 +1,28 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+/dts-v1/;
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ binman {
+ ti-secure {
+ content = <&unsecure_binary>;
+ auth-in-place = <0xa02>;
+
+ firewall-0-2 {
+ // id = <0>;
+ // region = <2>;
+ control = <0x31a>;
+ permissions = <0xc3ffff>;
+ start_address = <0x0 0x9e800000>;
+ end_address = <0x0 0x9fffffff>;
+ };
+
+ };
+ unsecure_binary: blob-ext {
+ filename = "ti_unsecure.bin";
+ };
+ };
+};
diff --git a/tools/binman/test/yaml/config.yaml b/tools/binman/test/yaml/config.yaml
index 5f799a6..c2be321 100644
--- a/tools/binman/test/yaml/config.yaml
+++ b/tools/binman/test/yaml/config.yaml
@@ -10,9 +10,9 @@
b: 0
arr: [0, 0, 0, 0]
another-arr:
- - #1
+ - # 1
c: 0
d: 0
- - #2
+ - # 2
c: 0
d: 0
diff --git a/tools/binman/test/yaml/config_phony.yaml b/tools/binman/test/yaml/config_phony.yaml
new file mode 100644
index 0000000..d76fcb3
--- /dev/null
+++ b/tools/binman/test/yaml/config_phony.yaml
@@ -0,0 +1,18 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Test config
+#
+---
+
+main-branch :
+ obj :
+ a : 0x0
+ b: 0
+ arr: [0, 0, 0, 0]
+ another-arr:
+ - # 1
+ c: 0
+ d: 0
+ - # 2
+ c: 0
+ d: 0
diff --git a/tools/buildman/boards.py b/tools/buildman/boards.py
index 341a505..3c28227 100644
--- a/tools/buildman/boards.py
+++ b/tools/buildman/boards.py
@@ -119,7 +119,7 @@
"""Set up a new Expr object.
Args:
- expr (str): String cotaining regular expression to store
+ expr (str): String containing regular expression to store
"""
self._expr = expr
self._re = re.compile(expr)
diff --git a/tools/buildman/pyproject.toml b/tools/buildman/pyproject.toml
index 4d75e77..fe0f642 100644
--- a/tools/buildman/pyproject.toml
+++ b/tools/buildman/pyproject.toml
@@ -4,11 +4,11 @@
[project]
name = "buildman"
-version = "0.0.2"
+version = "0.0.6"
authors = [
{ name="Simon Glass", email="sjg@chromium.org" },
]
-dependencies = ["u_boot_pylib", "patch-manager"]
+dependencies = ["u_boot_pylib >= 0.0.6", "patch-manager >= 0.0.6"]
description = "Buildman build tool for U-Boot"
readme = "README.rst"
requires-python = ">=3.7"
@@ -19,7 +19,7 @@
]
[project.urls]
-"Homepage" = "https://u-boot.readthedocs.io/en/latest/build/buildman.html"
+"Homepage" = "https://docs.u-boot.org/en/latest/build/buildman.html"
"Bug Tracker" = "https://source.denx.de/groups/u-boot/-/issues"
[project.scripts]
diff --git a/tools/buildman/requirements.txt b/tools/buildman/requirements.txt
index a1efcb9..4a31e69 100644
--- a/tools/buildman/requirements.txt
+++ b/tools/buildman/requirements.txt
@@ -1,2 +1,3 @@
jsonschema==4.17.3
pyyaml==6.0
+yamllint==1.26.3
diff --git a/tools/docker/Dockerfile b/tools/docker/Dockerfile
index c4a2596..6122776 100644
--- a/tools/docker/Dockerfile
+++ b/tools/docker/Dockerfile
@@ -2,7 +2,7 @@
# This Dockerfile is used to build an image containing basic stuff to be used
# to build U-Boot and run our test suites.
-FROM ubuntu:jammy-20230804
+FROM ubuntu:jammy-20240111
MAINTAINER Tom Rini <trini@konsulko.com>
LABEL Description=" This image is for building U-Boot inside a container"
@@ -178,10 +178,12 @@
RUN git clone https://gitlab.com/qemu-project/qemu.git /tmp/qemu && \
cd /tmp/qemu && \
- git checkout v8.0.3 && \
+ git checkout v8.2.0 && \
# config user.name and user.email to make 'git am' happy
git config user.name u-boot && \
git config user.email u-boot@denx.de && \
+ git format-patch 0c7ffc977195~..0c7ffc977195 && \
+ git am 0001-hw-net-cadence_gem-Fix-MDIO_OP_xxx-values.patch && \
./configure --prefix=/opt/qemu --target-list="aarch64-softmmu,arm-softmmu,i386-softmmu,m68k-softmmu,mips-softmmu,mips64-softmmu,mips64el-softmmu,mipsel-softmmu,ppc-softmmu,riscv32-softmmu,riscv64-softmmu,sh4-softmmu,x86_64-softmmu,xtensa-softmmu" && \
make -j$(nproc) all install && \
rm -rf /tmp/qemu
@@ -238,12 +240,14 @@
# COPY / ADD directives don't work as we need them to.
RUN wget -O /tmp/pytest-requirements.txt https://source.denx.de/u-boot/u-boot/-/raw/master/test/py/requirements.txt
RUN wget -O /tmp/sphinx-requirements.txt https://source.denx.de/u-boot/u-boot/-/raw/master/doc/sphinx/requirements.txt
+RUN wget -O /tmp/buildman-requirements.txt https://source.denx.de/u-boot/u-boot/-/raw/master/tools/buildman/requirements.txt
RUN virtualenv -p /usr/bin/python3 /tmp/venv && \
. /tmp/venv/bin/activate && \
pip install -r /tmp/pytest-requirements.txt \
- -r /tmp/sphinx-requirements.txt && \
+ -r /tmp/sphinx-requirements.txt \
+ -r /tmp/buildman-requirements.txt && \
deactivate && \
- rm -rf /tmp/venv /tmp/pytest-requirements.txt /tmp/sphinx-requirements.txt
+ rm -rf /tmp/venv /tmp/*-requirements.txt
# Create the buildman config file
RUN /bin/echo -e "[toolchain]\nroot = /usr" > ~/.buildman
diff --git a/tools/dtoc/fdt.py b/tools/dtoc/fdt.py
index 5963925..991a36b 100644
--- a/tools/dtoc/fdt.py
+++ b/tools/dtoc/fdt.py
@@ -782,7 +782,7 @@
for node in parent.subnodes.__reversed__():
dst = self.copy_node(node)
- tout.debug(f'merge props from {parent.path} to {dst.path}')
+ tout.debug(f'merge props from {parent.path} to {self.path}')
self.merge_props(parent, False)
diff --git a/tools/dtoc/pyproject.toml b/tools/dtoc/pyproject.toml
index 77fe4da..9f59788 100644
--- a/tools/dtoc/pyproject.toml
+++ b/tools/dtoc/pyproject.toml
@@ -4,11 +4,11 @@
[project]
name = "dtoc"
-version = "0.0.2"
+version = "0.0.6"
authors = [
{ name="Simon Glass", email="sjg@chromium.org" },
]
-dependencies = ["pylibfdt", "u_boot_pylib"]
+dependencies = ["pylibfdt", "u_boot_pylib >= 0.0.6"]
description = "Devicetree-to-C generator"
readme = "README.rst"
requires-python = ">=3.7"
@@ -19,7 +19,7 @@
]
[project.urls]
-"Homepage" = "https://u-boot.readthedocs.io/en/latest/develop/driver-model/of-plat.html"
+"Homepage" = "https://docs.u-boot.org/en/latest/develop/driver-model/of-plat.html"
"Bug Tracker" = "https://source.denx.de/groups/u-boot/-/issues"
[project.scripts]
diff --git a/tools/env/README b/tools/env/README
index 480a893..b8c6a7e 100644
--- a/tools/env/README
+++ b/tools/env/README
@@ -58,6 +58,9 @@
this environment instance. On NAND this is used to limit the range
within which bad blocks are skipped, on NOR it is not used.
+If DEVICEx_ESIZE and DEVICEx_ENVSECTORS are both zero, then a runtime
+detection is attempted for NOR and NAND mtd types.
+
To prevent losing changes to the environment and to prevent confusing the MTD
drivers, a lock file at /run/fw_printenv.lock is used to serialize access
to the environment.
diff --git a/tools/env/fw_env.c b/tools/env/fw_env.c
index c9a8774..74451ec 100644
--- a/tools/env/fw_env.c
+++ b/tools/env/fw_env.c
@@ -948,29 +948,25 @@
*/
lseek(fd, blockstart + block_seek, SEEK_SET);
- rc = read(fd, buf + processed, readlen);
- if (rc == -1) {
- fprintf(stderr, "Read error on %s: %s\n",
- DEVNAME(dev), strerror(errno));
- return -1;
- }
+ while (readlen) {
+ rc = read(fd, buf + processed, readlen);
+ if (rc == -1) {
+ fprintf(stderr, "Read error on %s: %s\n",
+ DEVNAME(dev), strerror(errno));
+ return -1;
+ }
#ifdef DEBUG
- fprintf(stderr, "Read 0x%x bytes at 0x%llx on %s\n",
- rc, (unsigned long long)blockstart + block_seek,
- DEVNAME(dev));
+ fprintf(stderr, "Read 0x%x bytes at 0x%llx on %s\n",
+ rc, (unsigned long long)blockstart + block_seek,
+ DEVNAME(dev));
#endif
- processed += rc;
- if (rc != readlen) {
- fprintf(stderr,
- "Warning on %s: Attempted to read %zd bytes but got %d\n",
- DEVNAME(dev), readlen, rc);
+ processed += rc;
readlen -= rc;
- block_seek += rc;
- } else {
- blockstart += blocklen;
- readlen = min(blocklen, count - processed);
- block_seek = 0;
}
+
+ blockstart += blocklen;
+ readlen = min(blocklen, count - processed);
+ block_seek = 0;
}
return processed;
@@ -1416,11 +1412,11 @@
{
int crc0, crc0_ok;
unsigned char flag0;
- void *addr0 = NULL;
+ void *buf0 = NULL;
int crc1, crc1_ok;
unsigned char flag1;
- void *addr1 = NULL;
+ void *buf1 = NULL;
int ret;
@@ -1430,8 +1426,8 @@
if (parse_config(opts)) /* should fill envdevices */
return -EINVAL;
- addr0 = calloc(1, CUR_ENVSIZE);
- if (addr0 == NULL) {
+ buf0 = calloc(1, CUR_ENVSIZE);
+ if (buf0 == NULL) {
fprintf(stderr,
"Not enough memory for environment (%ld bytes)\n",
CUR_ENVSIZE);
@@ -1440,13 +1436,13 @@
}
dev_current = 0;
- if (flash_io(O_RDONLY, addr0, CUR_ENVSIZE)) {
+ if (flash_io(O_RDONLY, buf0, CUR_ENVSIZE)) {
ret = -EIO;
goto open_cleanup;
}
if (!have_redund_env) {
- struct env_image_single *single = addr0;
+ struct env_image_single *single = buf0;
crc0 = crc32(0, (uint8_t *)single->data, ENV_SIZE);
crc0_ok = (crc0 == single->crc);
@@ -1458,12 +1454,12 @@
environment.dirty = 1;
}
- environment.image = addr0;
+ environment.image = buf0;
environment.crc = &single->crc;
environment.flags = NULL;
environment.data = single->data;
} else {
- struct env_image_redundant *redundant0 = addr0;
+ struct env_image_redundant *redundant0 = buf0;
struct env_image_redundant *redundant1;
crc0 = crc32(0, (uint8_t *)redundant0->data, ENV_SIZE);
@@ -1472,17 +1468,17 @@
flag0 = redundant0->flags;
dev_current = 1;
- addr1 = calloc(1, CUR_ENVSIZE);
- if (addr1 == NULL) {
+ buf1 = calloc(1, CUR_ENVSIZE);
+ if (buf1 == NULL) {
fprintf(stderr,
"Not enough memory for environment (%ld bytes)\n",
CUR_ENVSIZE);
ret = -ENOMEM;
goto open_cleanup;
}
- redundant1 = addr1;
+ redundant1 = buf1;
- if (flash_io(O_RDONLY, addr1, CUR_ENVSIZE)) {
+ if (flash_io(O_RDONLY, buf1, CUR_ENVSIZE)) {
ret = -EIO;
goto open_cleanup;
}
@@ -1571,17 +1567,17 @@
* flags before writing out
*/
if (dev_current) {
- environment.image = addr1;
+ environment.image = buf1;
environment.crc = &redundant1->crc;
environment.flags = &redundant1->flags;
environment.data = redundant1->data;
- free(addr0);
+ free(buf0);
} else {
- environment.image = addr0;
+ environment.image = buf0;
environment.crc = &redundant0->crc;
environment.flags = &redundant0->flags;
environment.data = redundant0->data;
- free(addr1);
+ free(buf1);
}
#ifdef DEBUG
fprintf(stderr, "Selected env in %s\n", DEVNAME(dev_current));
@@ -1590,11 +1586,8 @@
return 0;
open_cleanup:
- if (addr0)
- free(addr0);
-
- if (addr1)
- free(addr1);
+ free(buf0);
+ free(buf1);
return ret;
}
@@ -1659,8 +1652,15 @@
}
DEVTYPE(dev) = mtdinfo.type;
if (DEVESIZE(dev) == 0 && ENVSECTORS(dev) == 0 &&
- mtdinfo.type == MTD_NORFLASH)
- DEVESIZE(dev) = mtdinfo.erasesize;
+ mtdinfo.erasesize > 0) {
+ if (mtdinfo.type == MTD_NORFLASH)
+ DEVESIZE(dev) = mtdinfo.erasesize;
+ else if (mtdinfo.type == MTD_NANDFLASH) {
+ DEVESIZE(dev) = mtdinfo.erasesize;
+ ENVSECTORS(dev) =
+ mtdinfo.size / mtdinfo.erasesize;
+ }
+ }
if (DEVESIZE(dev) == 0)
/* Assume the erase size is the same as the env-size */
DEVESIZE(dev) = ENVSIZE(dev);
@@ -1732,6 +1732,7 @@
}
while (!nvmem && (dent = readdir(dir))) {
+ struct stat s;
FILE *fp;
size_t size;
@@ -1749,14 +1750,22 @@
continue;
}
- size = fread(buf, sizeof(buf), 1, fp);
+ if (fstat(fileno(fp), &s)) {
+ fprintf(stderr, "Failed to fstat %s\n", comp);
+ goto next;
+ }
+
+ if (s.st_size >= sizeof(buf)) {
+ goto next;
+ }
+
+ size = fread(buf, s.st_size, 1, fp);
if (size != 1) {
fprintf(stderr,
"read failed about %s\n", comp);
- fclose(fp);
- return -EIO;
+ goto next;
}
-
+ buf[s.st_size] = '\0';
if (!strcmp(buf, "u-boot,env")) {
bytes = asprintf(&nvmem, "%s/%s/nvmem", path, dent->d_name);
@@ -1765,6 +1774,7 @@
}
}
+next:
fclose(fp);
}
diff --git a/tools/fdtgrep.c b/tools/fdtgrep.c
index 7eabcab..f1ff194 100644
--- a/tools/fdtgrep.c
+++ b/tools/fdtgrep.c
@@ -63,6 +63,7 @@
int types_inc; /* Mask of types that we include (FDT_IS...) */
int types_exc; /* Mask of types that we exclude (FDT_IS...) */
int invert; /* Invert polarity of match */
+ int props_up; /* Imply properties up to supernodes */
struct value_node *value_head; /* List of values to match */
const char *output_fname; /* Output filename */
FILE *fout; /* File to write dts/dtb output */
@@ -375,8 +376,9 @@
const char *str;
int str_base = fdt_off_dt_strings(blob);
- for (offset = 0; offset < fdt_size_dt_strings(blob);
- offset += strlen(str) + 1) {
+ for (offset = 0;
+ offset < (int)fdt_size_dt_strings(blob);
+ offset += strlen(str) + 1) {
str = fdt_string(blob, offset);
int len = strlen(str) + 1;
int show;
@@ -431,7 +433,7 @@
{
struct fdt_header *fdt;
int size, struct_start;
- int ptr;
+ unsigned int ptr;
int i;
/* Set up a basic header (even if we don't actually write it) */
@@ -575,15 +577,65 @@
}
/**
- * h_include() - Include handler function for fdt_find_regions()
+ * check_props() - Check if a node has properties that we want to include
+ *
+ * Calls check_type_include() for each property in the nodn, returning 1 if
+ * that function returns 1 for any of them
+ *
+ * @disp: Display structure, holding info about our options
+ * @fdt: Devicetree blob to check
+ * @node: Node offset to check
+ * @inc: Current value of the 'include' variable (see h_include())
+ * Return: 0 to exclude, 1 to include, -1 if no information is available
+ */
+static int check_props(struct display_info *disp, const void *fdt, int node,
+ int inc)
+{
+ int offset;
+
+ for (offset = fdt_first_property_offset(fdt, node);
+ offset > 0 && inc != 1;
+ offset = fdt_next_property_offset(fdt, offset)) {
+ const struct fdt_property *prop;
+ const char *str;
+
+ prop = fdt_get_property_by_offset(fdt, offset, NULL);
+ if (!prop)
+ continue;
+ str = fdt_string(fdt, fdt32_to_cpu(prop->nameoff));
+ inc = check_type_include(disp, FDT_NODE_HAS_PROP, str,
+ strlen(str));
+ }
+
+ /* if requested, check all subnodes for this property too */
+ if (inc != 1 && disp->props_up) {
+ int subnode;
+
+ for (subnode = fdt_first_subnode(fdt, node);
+ subnode > 0 && inc != 1;
+ subnode = fdt_next_subnode(fdt, subnode))
+ inc = check_props(disp, fdt, subnode, inc);
+ }
+
+ return inc;
+}
+
+/**
+ * h_include() - Include handler function for fdt_first_region()
*
* This function decides whether to include or exclude a node, property or
- * compatible string. The function is defined by fdt_find_regions().
+ * compatible string. The function is defined by fdt_first_region().
*
* The algorithm is documented in the code - disp->invert is 0 for normal
* operation, and 1 to invert the sense of all matches.
*
- * See
+ * @priv: Private pointer as passed to fdtgrep_find_regions()
+ * @fdt: Pointer to FDT blob
+ * @offset: Offset of this node / property
+ * @type: Type of this part, FDT_IS_...
+ * @data: Pointer to data (node name, property name, compatible string)
+ * @size: Size of data, or 0 if none
+ * Return: 0 to exclude, 1 to include, -1 if no information is available
*/
static int h_include(void *priv, const void *fdt, int offset, int type,
const char *data, int size)
@@ -610,31 +662,13 @@
(disp->types_inc & FDT_NODE_HAS_PROP)) {
debug(" - checking node '%s'\n",
fdt_get_name(fdt, offset, NULL));
- for (offset = fdt_first_property_offset(fdt, offset);
- offset > 0 && inc != 1;
- offset = fdt_next_property_offset(fdt, offset)) {
- const struct fdt_property *prop;
- const char *str;
-
- prop = fdt_get_property_by_offset(fdt, offset, NULL);
- if (!prop)
- continue;
- str = fdt_string(fdt, fdt32_to_cpu(prop->nameoff));
- inc = check_type_include(priv, FDT_NODE_HAS_PROP, str,
- strlen(str));
- }
+ inc = check_props(disp, fdt, offset, inc);
if (inc == -1)
inc = 0;
}
- switch (inc) {
- case 1:
- inc = !disp->invert;
- break;
- case 0:
- inc = disp->invert;
- break;
- }
+ if (inc != -1 && disp->invert)
+ inc = !inc;
debug(" - returning %d\n", inc);
return inc;
@@ -683,10 +717,10 @@
return new_count;
} else if (new_count <= max_regions) {
/*
- * The alias regions will now be at the end of the list.
- * Sort the regions by offset to get things into the
- * right order
- */
+ * The alias regions will now be at the end of the list.
+ * Sort the regions by offset to get things into the
+ * right order
+ */
count = new_count;
qsort(region, count, sizeof(struct fdt_region),
h_cmp_region);
@@ -821,7 +855,7 @@
region, max_regions, path, sizeof(path),
disp->flags);
if (count < 0) {
- report_error("fdt_find_regions", count);
+ report_error("fdtgrep_find_regions", count);
free(region);
return -1;
}
@@ -880,7 +914,7 @@
size = fdt_totalsize(fdt);
}
- if (size != fwrite(fdt, 1, size, disp->fout)) {
+ if ((size_t)size != fwrite(fdt, 1, size, disp->fout)) {
fprintf(stderr, "Write failure, %d bytes\n", size);
free(fdt);
ret = 1;
@@ -932,9 +966,9 @@
case '?': usage("unknown option");
static const char usage_short_opts[] =
- "haAc:b:C:defg:G:HIlLmn:N:o:O:p:P:rRsStTv"
+ "haAc:b:C:defg:G:HIlLmn:N:o:O:p:P:rRsStTuv"
USAGE_COMMON_SHORT_OPTS;
-static struct option const usage_long_opts[] = {
+static const struct option usage_long_opts[] = {
{"show-address", no_argument, NULL, 'a'},
{"colour", no_argument, NULL, 'A'},
{"include-node-with-prop", a_argument, NULL, 'b'},
@@ -952,6 +986,8 @@
{"include-mem", no_argument, NULL, 'm'},
{"include-node", a_argument, NULL, 'n'},
{"exclude-node", a_argument, NULL, 'N'},
+ {"out", a_argument, NULL, 'o'},
+ {"out-format", a_argument, NULL, 'O'},
{"include-prop", a_argument, NULL, 'p'},
{"exclude-prop", a_argument, NULL, 'P'},
{"remove-strings", no_argument, NULL, 'r'},
@@ -960,8 +996,7 @@
{"skip-supernodes", no_argument, NULL, 'S'},
{"show-stringtab", no_argument, NULL, 't'},
{"show-aliases", no_argument, NULL, 'T'},
- {"out", a_argument, NULL, 'o'},
- {"out-format", a_argument, NULL, 'O'},
+ {"props-up-to-supernode", no_argument, NULL, 'u'},
{"invert-match", no_argument, NULL, 'v'},
USAGE_COMMON_LONG_OPTS,
};
@@ -983,6 +1018,8 @@
"Include mem_rsvmap section in binary output",
"Node to include in grep",
"Node to exclude in grep",
+ "-o <output file>",
+ "-O <output format>",
"Property to include in grep",
"Property to exclude in grep",
"Remove unused strings from string table",
@@ -991,8 +1028,7 @@
"Don't include supernodes of matching nodes",
"Include string table in binary output",
"Include matching aliases in output",
- "-o <output file>",
- "-O <output format>",
+ "Add -p properties to supernodes too",
"Invert the sense of matching (select non-matching lines)",
USAGE_COMMON_OPTS_HELP
};
@@ -1124,6 +1160,9 @@
case 'H':
disp->header = 1;
break;
+ case 'I':
+ disp->show_dts_version = 1;
+ break;
case 'l':
disp->region_list = 1;
break;
@@ -1176,12 +1215,12 @@
case 'T':
disp->add_aliases = 1;
break;
+ case 'u':
+ disp->props_up = 1;
+ break;
case 'v':
disp->invert = 1;
break;
- case 'I':
- disp->show_dts_version = 1;
- break;
}
if (type && value_add(disp, &disp->value_head, type, inc,
diff --git a/tools/fit_image.c b/tools/fit_image.c
index 71e031c..beef1fa 100644
--- a/tools/fit_image.c
+++ b/tools/fit_image.c
@@ -61,7 +61,7 @@
ret = fit_set_timestamp(ptr, 0, time);
}
- if (!ret)
+ if (CONFIG_IS_ENABLED(FIT_SIGNATURE) && !ret)
ret = fit_pre_load_data(params->keydir, dest_blob, ptr);
if (!ret) {
diff --git a/tools/image-host.c b/tools/image-host.c
index ca49503..b2a0f2e 100644
--- a/tools/image-host.c
+++ b/tools/image-host.c
@@ -14,8 +14,10 @@
#include <image.h>
#include <version.h>
+#if CONFIG_IS_ENABLED(FIT_SIGNATURE)
#include <openssl/pem.h>
#include <openssl/evp.h>
+#endif
/**
* fit_set_hash_value - set hash value in requested has node
@@ -340,6 +342,28 @@
return ret;
}
+static int fit_image_read_key_iv_data(const char *keydir, const char *key_iv_name,
+ unsigned char *key_iv_data, int expected_size)
+{
+ char filename[PATH_MAX];
+ int ret = -1;
+
+ ret = snprintf(filename, sizeof(filename), "%s/%s%s",
+ keydir, key_iv_name, ".bin");
+ if (ret >= sizeof(filename)) {
+ printf("Can't format the key or IV filename when setting up the cipher: insufficient buffer space\n");
+ ret = -1;
+ }
+ if (ret < 0) {
+ printf("Can't format the key or IV filename when setting up the cipher: snprintf error\n");
+ ret = -1;
+ }
+
+ ret = fit_image_read_data(filename, key_iv_data, expected_size);
+
+ return ret;
+}
+
static int get_random_data(void *data, int size)
{
unsigned char *tmp = data;
@@ -376,7 +400,6 @@
int noffset)
{
char *algo_name;
- char filename[128];
int ret = -1;
if (fit_image_cipher_get_algo(fit, noffset, &algo_name)) {
@@ -413,17 +436,17 @@
goto out;
}
- /* Read the key in the file */
- snprintf(filename, sizeof(filename), "%s/%s%s",
- info->keydir, info->keyname, ".bin");
info->key = malloc(info->cipher->key_len);
if (!info->key) {
fprintf(stderr, "Can't allocate memory for key\n");
ret = -1;
goto out;
}
- ret = fit_image_read_data(filename, (unsigned char *)info->key,
- info->cipher->key_len);
+
+ /* Read the key in the file */
+ ret = fit_image_read_key_iv_data(info->keydir, info->keyname,
+ (unsigned char *)info->key,
+ info->cipher->key_len);
if (ret < 0)
goto out;
@@ -436,10 +459,11 @@
if (info->ivname) {
/* Read the IV in the file */
- snprintf(filename, sizeof(filename), "%s/%s%s",
- info->keydir, info->ivname, ".bin");
- ret = fit_image_read_data(filename, (unsigned char *)info->iv,
- info->cipher->iv_len);
+ ret = fit_image_read_key_iv_data(info->keydir, info->ivname,
+ (unsigned char *)info->iv,
+ info->cipher->iv_len);
+ if (ret < 0)
+ goto out;
} else {
/* Generate an ramdom IV */
ret = get_random_data((void *)info->iv, info->cipher->iv_len);
@@ -1131,6 +1155,7 @@
return 0;
}
+#if CONFIG_IS_ENABLED(FIT_SIGNATURE)
/*
* 0) open file (open)
* 1) read certificate (PEM_read_X509)
@@ -1239,6 +1264,7 @@
out:
return ret;
}
+#endif
int fit_cipher_data(const char *keydir, void *keydest, void *fit,
const char *comment, int require_keys,
diff --git a/tools/imx9_image.sh b/tools/imx9_image.sh
new file mode 100755
index 0000000..88dfcfe
--- /dev/null
+++ b/tools/imx9_image.sh
@@ -0,0 +1,31 @@
+#!/bin/sh
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Script to check whether the file exists in mkimage cfg files for the i.MX9.
+#
+# usage: $0 <file.cfg>
+
+file=$1
+
+blobs=`awk '/^APPEND/ {print $2} /^IMAGE/ || /^DATA/ {print $3}' $file`
+for f in $blobs; do
+ tmp=$srctree/$f
+ if [ $f = "u-boot-spl-ddr.bin" ]; then
+ continue
+ fi
+
+ if [ -f $f ]; then
+ continue
+ fi
+
+ if [ ! -f $tmp ]; then
+ echo "WARNING '$tmp' not found, resulting binary is not-functional" >&2
+
+ # Comment-out the lines for un-existing files. This way,
+ # mkimage can keep working. This allows CI tests to pass even
+ # if the resulting binary won't boot.
+ sed -in "/$f/ s/./#&/" $file
+ fi
+done
+
+exit 0
diff --git a/tools/logos/stm32f469-discovery.bmp b/tools/logos/stm32f469-discovery.bmp
new file mode 100644
index 0000000..ecc8d98
--- /dev/null
+++ b/tools/logos/stm32f469-discovery.bmp
Binary files differ
diff --git a/tools/mkeficapsule.c b/tools/mkeficapsule.c
index b8fc606..6a261ff 100644
--- a/tools/mkeficapsule.c
+++ b/tools/mkeficapsule.c
@@ -16,7 +16,6 @@
#include <sys/stat.h>
#include <sys/types.h>
#include <uuid/uuid.h>
-#include <linux/kconfig.h>
#include <gnutls/gnutls.h>
#include <gnutls/pkcs7.h>
diff --git a/tools/mkimage.c b/tools/mkimage.c
index 6dfe3e1..ac62ebb 100644
--- a/tools/mkimage.c
+++ b/tools/mkimage.c
@@ -115,7 +115,7 @@
" -B => align size in hex for FIT structure and header\n"
" -b => append the device tree binary to the FIT\n"
" -t => update the timestamp in the FIT\n");
-#ifdef CONFIG_FIT_SIGNATURE
+#if CONFIG_IS_ENABLED(FIT_SIGNATURE)
fprintf(stderr,
"Signing / verified boot options: [-k keydir] [-K dtb] [ -c <comment>] [-p addr] [-r] [-N engine]\n"
" -k => set directory containing private keys\n"
@@ -130,8 +130,9 @@
" -o => algorithm to use for signing\n");
#else
fprintf(stderr,
- "Signing / verified boot not supported (CONFIG_FIT_SIGNATURE undefined)\n");
+ "Signing / verified boot not supported (CONFIG_TOOLS_FIT_SIGNATURE undefined)\n");
#endif
+
fprintf(stderr, " %s -V ==> print version information and exit\n",
params.cmdname);
fprintf(stderr, "Use '-T list' to see a list of available image types\n");
diff --git a/tools/mxsboot.c b/tools/mxsboot.c
index 04d86f8..8f4018a 100644
--- a/tools/mxsboot.c
+++ b/tools/mxsboot.c
@@ -478,7 +478,7 @@
goto err0;
}
- memset(buf, 0, size);
+ memset(buf, 0xff, size);
fcb = mx28_nand_get_fcb(MAX_BOOTSTREAM_SIZE);
if (!fcb) {
diff --git a/tools/patman/patman.rst b/tools/patman/patman.rst
index a8b317e..e013558 100644
--- a/tools/patman/patman.rst
+++ b/tools/patman/patman.rst
@@ -280,7 +280,7 @@
Commit-notes:
Similar, but for a single commit (patch). These notes will appear
- immediately below the --- cut in the patch file::
+ immediately below the ``---`` cut in the patch file::
Commit-notes:
blah blah
diff --git a/tools/patman/pyproject.toml b/tools/patman/pyproject.toml
index a54211f..fcefcf6 100644
--- a/tools/patman/pyproject.toml
+++ b/tools/patman/pyproject.toml
@@ -4,11 +4,11 @@
[project]
name = "patch-manager"
-version = "0.0.2"
+version = "0.0.6"
authors = [
{ name="Simon Glass", email="sjg@chromium.org" },
]
-dependencies = ["u_boot_pylib"]
+dependencies = ["u_boot_pylib >= 0.0.6"]
description = "Patman patch manager"
readme = "README.rst"
requires-python = ">=3.7"
@@ -19,11 +19,11 @@
]
[project.urls]
-"Homepage" = "https://u-boot.readthedocs.io/en/latest/develop/patman.html"
+"Homepage" = "https://docs.u-boot.org/en/latest/develop/patman.html"
"Bug Tracker" = "https://source.denx.de/groups/u-boot/-/issues"
[project.scripts]
-patman = "patman.__main__"
+patman = "patman.__main__:run_patman"
[tool.setuptools.package-data]
patman = ["*.rst"]
diff --git a/tools/renesas_spkgimage.c b/tools/renesas_spkgimage.c
index 5cd81dd..ce3b2b2 100644
--- a/tools/renesas_spkgimage.c
+++ b/tools/renesas_spkgimage.c
@@ -147,7 +147,8 @@
/* Check the marker bytes */
if (memcmp(header->marker, marker, 4)) {
- fprintf(stderr, "Error: invalid marker bytes\n");
+ if (param->type == IH_TYPE_RENESAS_SPKG)
+ fprintf(stderr, "Error: invalid marker bytes\n");
return -EINVAL;
}
diff --git a/tools/u_boot_pylib/README.rst b/tools/u_boot_pylib/README.rst
index 93858f5..36a1825 100644
--- a/tools/u_boot_pylib/README.rst
+++ b/tools/u_boot_pylib/README.rst
@@ -1,7 +1,7 @@
.. SPDX-License-Identifier: GPL-2.0+
# U-Boot Python Library
-=====================
+=======================
This is a Python library used by various U-Boot tools, including patman,
buildman and binman.
diff --git a/tools/u_boot_pylib/pyproject.toml b/tools/u_boot_pylib/pyproject.toml
index 037c5d6..ce23550 100644
--- a/tools/u_boot_pylib/pyproject.toml
+++ b/tools/u_boot_pylib/pyproject.toml
@@ -4,7 +4,7 @@
[project]
name = "u_boot_pylib"
-version = "0.0.2"
+version = "0.0.6"
authors = [
{ name="Simon Glass", email="sjg@chromium.org" },
]
@@ -18,9 +18,8 @@
]
[project.urls]
-"Homepage" = "https://u-boot.readthedocs.io"
+"Homepage" = "https://docs.u-boot.org"
"Bug Tracker" = "https://source.denx.de/groups/u-boot/-/issues"
-[tool.setuptools.packages.find]
-where = [".."]
-include = ["u_boot_pylib*"]
+[tool.setuptools.package-data]
+u_boot_pylib = ["*.rst"]
diff --git a/tools/zynqmpimage.c b/tools/zynqmpimage.c
index bb54f41..4db9877 100644
--- a/tools/zynqmpimage.c
+++ b/tools/zynqmpimage.c
@@ -135,10 +135,59 @@
return 0;
}
+static struct image_header *
+find_partition_image(const struct zynqmp_header *zynqhdr,
+ const struct partition_header *ph)
+{
+ struct partition_header *ph_walk;
+ struct image_header *ih;
+ int i;
+
+ for_each_zynqmp_image(zynqhdr, ih) {
+ for_each_zynqmp_part_in_image(zynqhdr, i, ph_walk, ih) {
+ if (ph == ph_walk)
+ return ih;
+ }
+ }
+
+ return NULL;
+}
+
+static void print_partition_name(const struct zynqmp_header *zynqhdr,
+ const struct partition_header *ph)
+{
+ const struct image_header *ih;
+ size_t word_len;
+ char *name;
+ int i;
+
+ ih = find_partition_image(zynqhdr, ph);
+ if (!ih)
+ return;
+
+ /* Name is stored in big-endian words, find the terminating word and
+ * byte-swap into a new buffer
+ */
+ word_len = strlen((char *)ih->image_name);
+ word_len = ALIGN(word_len + 1, 4);
+
+ name = calloc(1, word_len);
+ if (!name)
+ return;
+
+ for (i = 0; i < word_len / 4; i++)
+ ((uint32_t *)name)[i] = uswap_32(ih->image_name[i]);
+
+ printf(" Image name : %s\n", name);
+ free(name);
+}
+
static void print_partition(const void *ptr, const struct partition_header *ph)
{
uint32_t attr = le32_to_cpu(ph->attributes);
unsigned long len = le32_to_cpu(ph->len) * 4;
+ unsigned long len_enc = le32_to_cpu(ph->len_enc) * 4;
+ unsigned long len_unenc = le32_to_cpu(ph->len_unenc) * 4;
const char *part_owner;
const char *dest_devs[0x8] = {
"none", "PS", "PL", "PMU", "unknown", "unknown", "unknown",
@@ -161,8 +210,13 @@
dest_cpus[(attr & PART_ATTR_DEST_CPU_MASK) >> 8],
dest_devs[(attr & PART_ATTR_DEST_DEVICE_MASK) >> 4]);
+ print_partition_name(ptr, ph);
printf(" Offset : 0x%08x\n", le32_to_cpu(ph->offset) * 4);
printf(" Size : %lu (0x%lx) bytes\n", len, len);
+ if (len != len_unenc)
+ printf(" Size Data : %lu (0x%lx) bytes\n", len_unenc, len_unenc);
+ if (len_unenc != len_enc)
+ printf(" Size Enc : %lu (0x%lx) bytes\n", len_unenc, len_unenc);
printf(" Load : 0x%08llx",
(unsigned long long)le64_to_cpu(ph->load_address));
if (ph->load_address != ph->entry_point)
@@ -212,6 +266,7 @@
void zynqmpimage_print_header(const void *ptr, struct image_tool_params *params)
{
struct zynqmp_header *zynqhdr = (struct zynqmp_header *)ptr;
+ struct partition_header *ph;
int i;
printf("Image Type : Xilinx ZynqMP Boot Image support\n");
@@ -249,25 +304,8 @@
le32_to_cpu(zynqhdr->register_init[i].data));
}
- if (zynqhdr->image_header_table_offset) {
- struct image_header_table *iht = (void *)ptr +
- zynqhdr->image_header_table_offset;
- struct partition_header *ph;
- uint32_t ph_offset;
- uint32_t next;
- int i;
-
- ph_offset = le32_to_cpu(iht->partition_header_offset) * 4;
- ph = (void *)ptr + ph_offset;
- for (i = 0; i < le32_to_cpu(iht->nr_parts); i++) {
- next = le32_to_cpu(ph->next_partition_offset) * 4;
-
- /* Partition 0 is the base image itself */
- if (i)
- print_partition(ptr, ph);
-
- ph = (void *)ptr + next;
- }
+ for_each_zynqmp_part(zynqhdr, i, ph) {
+ print_partition(ptr, ph);
}
free(dynamic_header);
@@ -292,7 +330,7 @@
return -1;
}
- return !(params->lflag || params->dflag);
+ return !(params->lflag || params->dflag || params->outfile);
}
static int zynqmpimage_check_image_types(uint8_t type)
@@ -427,6 +465,39 @@
zynqhdr->checksum = zynqmpimage_checksum(zynqhdr);
}
+static int zynqmpimage_partition_extract(struct zynqmp_header *zynqhdr,
+ const struct partition_header *ph,
+ const char *filename)
+{
+ ulong data = (ulong)zynqmp_get_offset(zynqhdr, ph->offset);
+ unsigned long len = le32_to_cpu(ph->len_enc) * 4;
+
+ return imagetool_save_subimage(filename, data, len);
+}
+
+/**
+ * zynqmpimage_extract_contents - retrieve a sub-image component from the image
+ * @ptr: pointer to the image header
+ * @params: command line parameters
+ *
+ * returns:
+ * zero in case of success or a negative value if fail.
+ */
+static int zynqmpimage_extract_contents(void *ptr, struct image_tool_params *params)
+{
+ struct zynqmp_header *zynqhdr = (struct zynqmp_header *)ptr;
+ struct partition_header *ph;
+ int i;
+
+ for_each_zynqmp_part(zynqhdr, i, ph) {
+ if (i == params->pflag)
+ return zynqmpimage_partition_extract(ptr, ph, params->outfile);
+ }
+
+ printf("No partition found\n");
+ return -1;
+}
+
static int zynqmpimage_vrec_header(struct image_tool_params *params,
struct image_type_params *tparams)
{
@@ -480,7 +551,7 @@
zynqmpimage_verify_header,
zynqmpimage_print_header,
zynqmpimage_set_header,
- NULL,
+ zynqmpimage_extract_contents,
zynqmpimage_check_image_types,
NULL,
zynqmpimage_vrec_header
diff --git a/tools/zynqmpimage.h b/tools/zynqmpimage.h
index ca74898..7c47dc0 100644
--- a/tools/zynqmpimage.h
+++ b/tools/zynqmpimage.h
@@ -51,6 +51,14 @@
uint32_t checksum; /* 0x3c */
};
+struct image_header {
+ uint32_t next_image_header_offset; /* 0x00 */
+ uint32_t corresponding_partition_header; /* 0x04 */
+ uint32_t __reserved1; /* 0x08 */
+ uint32_t partition_count; /* 0x0c */
+ uint32_t image_name[]; /* 0x10 */
+};
+
#define PART_ATTR_VEC_LOCATION 0x800000
#define PART_ATTR_BS_BLOCK_SIZE_MASK 0x700000
#define PART_ATTR_BS_BLOCK_SIZE_DEFAULT 0x000000
@@ -135,4 +143,103 @@
void zynqmpimage_default_header(struct zynqmp_header *ptr);
void zynqmpimage_print_header(const void *ptr, struct image_tool_params *params);
+static inline struct image_header_table *
+zynqmp_get_iht(const struct zynqmp_header *zynqhdr)
+{
+ if (!zynqhdr->image_header_table_offset)
+ return NULL;
+ return (struct image_header_table *)((void *)zynqhdr + zynqhdr->image_header_table_offset);
+}
+
+static inline void *zynqmp_get_offset(const struct zynqmp_header *zynqhdr,
+ uint32_t offset)
+{
+ uint32_t offset_cpu = le32_to_cpu(offset);
+
+ if (!offset_cpu)
+ return NULL;
+ return (void *)zynqhdr + offset_cpu * 4;
+}
+
+static inline struct partition_header *
+zynqmp_part_first(const struct zynqmp_header *zynqhdr)
+{
+ struct image_header_table *iht;
+
+ iht = zynqmp_get_iht(zynqhdr);
+ if (!iht)
+ return NULL;
+
+ return zynqmp_get_offset(zynqhdr, iht->partition_header_offset);
+}
+
+static inline struct partition_header *
+zynqmp_part_next(const struct zynqmp_header *zynqhdr,
+ const struct partition_header *ph)
+{
+ return zynqmp_get_offset(zynqhdr, ph->next_partition_offset);
+}
+
+static inline size_t zynqmp_part_count(const struct zynqmp_header *zynqhdr)
+{
+ struct image_header_table *iht;
+
+ iht = zynqmp_get_iht(zynqhdr);
+ if (!iht)
+ return 0;
+
+ return le32_to_cpu(iht->nr_parts);
+}
+
+#define _for_each_zynqmp_part(_zynqhdr, _iter, _ph, _start, _count) \
+ for (_iter = 0, _ph = _start; \
+ _iter < (_count) && _ph; \
+ _iter++, _ph = zynqmp_part_next(_zynqhdr, _ph))
+
+#define for_each_zynqmp_part(_zynqhdr, _iter, _ph) \
+ _for_each_zynqmp_part(_zynqhdr, _iter, _ph, \
+ zynqmp_part_first(_zynqhdr), \
+ zynqmp_part_count(_zynqhdr))
+
+static inline struct partition_header *
+zynqmp_part_in_image_first(const struct zynqmp_header *zynqhdr,
+ const struct image_header *ih)
+{
+ return zynqmp_get_offset(zynqhdr, ih->corresponding_partition_header);
+}
+
+static inline size_t zynqmp_part_in_image_count(const struct image_header *ih)
+{
+ return le32_to_cpu(ih->partition_count);
+}
+
+#define for_each_zynqmp_part_in_image(_zynqhdr, _iter, _ph, _ih) \
+ _for_each_zynqmp_part(_zynqhdr, _iter, _ph, \
+ zynqmp_part_in_image_first(_zynqhdr, _ih), \
+ zynqmp_part_in_image_count(_ih))
+
+static inline struct image_header *
+zynqmp_image_first(const struct zynqmp_header *zynqhdr)
+{
+ struct image_header_table *iht;
+
+ iht = zynqmp_get_iht(zynqhdr);
+ if (!iht)
+ return NULL;
+
+ return zynqmp_get_offset(zynqhdr, iht->image_header_offset);
+}
+
+static inline struct image_header *
+zynqmp_image_next(const struct zynqmp_header *zynqhdr,
+ const struct image_header *ih)
+{
+ return zynqmp_get_offset(zynqhdr, ih->next_image_header_offset);
+}
+
+#define for_each_zynqmp_image(_zynqhdr, _ih) \
+ for (_ih = zynqmp_image_first(_zynqhdr); \
+ _ih; \
+ _ih = zynqmp_image_next(_zynqhdr, _ih))
+
#endif /* _ZYNQMPIMAGE_H_ */
