Merge https://source.denx.de/u-boot/custodians/u-boot-usb
- Singular quirk DT property rename.
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index d972503..b102ffb 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -839,6 +839,7 @@
sun50i-h6-tanix-tx6-mini.dtb
dtb-$(CONFIG_MACH_SUN50I_H616) += \
sun50i-h616-orangepi-zero2.dtb \
+ sun50i-h618-orangepi-zero2w.dtb \
sun50i-h618-orangepi-zero3.dtb \
sun50i-h618-transpeed-8k618-t.dtb \
sun50i-h616-x96-mate.dtb
diff --git a/arch/arm/dts/armada-385-turris-omnia-u-boot.dtsi b/arch/arm/dts/armada-385-turris-omnia-u-boot.dtsi
index 509d6ca..c63a331 100644
--- a/arch/arm/dts/armada-385-turris-omnia-u-boot.dtsi
+++ b/arch/arm/dts/armada-385-turris-omnia-u-boot.dtsi
@@ -35,6 +35,57 @@
};
};
+&mdio {
+ switch@10 {
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ sw_phy0: ethernet-phy@0 {
+ reg = <0x0>;
+ };
+
+ sw_phy1: ethernet-phy@1 {
+ reg = <0x1>;
+ };
+
+ sw_phy2: ethernet-phy@2 {
+ reg = <0x2>;
+ };
+
+ sw_phy3: ethernet-phy@3 {
+ reg = <0x3>;
+ };
+
+ sw_phy4: ethernet-phy@4 {
+ reg = <0x4>;
+ };
+ };
+ ports {
+ ports@0 {
+ phy-handle = <&sw_phy0>;
+ phy-mode = "internal";
+ };
+ ports@1 {
+ phy-handle = <&sw_phy1>;
+ phy-mode = "internal";
+ };
+ ports@2 {
+ phy-handle = <&sw_phy2>;
+ phy-mode = "internal";
+ };
+ ports@3 {
+ phy-handle = <&sw_phy3>;
+ phy-mode = "internal";
+ };
+ ports@4 {
+ phy-handle = <&sw_phy4>;
+ phy-mode = "internal";
+ };
+ };
+ };
+};
+
#ifdef CONFIG_ENV_IS_IN_SPI_FLASH
&spi0 {
flash@0 {
diff --git a/arch/arm/dts/armada-38x-solidrun-microsom.dtsi b/arch/arm/dts/armada-38x-solidrun-microsom.dtsi
index f6ae784..1540162 100644
--- a/arch/arm/dts/armada-38x-solidrun-microsom.dtsi
+++ b/arch/arm/dts/armada-38x-solidrun-microsom.dtsi
@@ -99,6 +99,11 @@
};
&i2c0 {
+ clock-frequency = <400000>;
+ pinctrl-0 = <&i2c0_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+
eeprom@53 {
compatible = "atmel,24c02";
reg = <0x53>;
diff --git a/arch/arm/dts/imx6ul-opos6uldev-u-boot.dtsi b/arch/arm/dts/imx6ul-opos6uldev-u-boot.dtsi
index aa88964..3b52d6b 100644
--- a/arch/arm/dts/imx6ul-opos6uldev-u-boot.dtsi
+++ b/arch/arm/dts/imx6ul-opos6uldev-u-boot.dtsi
@@ -7,12 +7,6 @@
#include "imx6ul-opos6ul-u-boot.dtsi"
-/ {
- aliases {
- display0 = &lcdif;
- };
-};
-
&aips1 {
bootph-pre-ram;
@@ -22,7 +16,29 @@
};
&lcdif {
+ display = <&display0>;
bootph-some-ram;
+
+ display0: display0 {
+ bits-per-pixel = <18>;
+ bus-width = <18>;
+
+ display-timings {
+ timing0 {
+ clock-frequency = <33300000>;
+ hactive = <800>;
+ vactive = <480>;
+ hback-porch = <36>;
+ hfront-porch = <210>;
+ vback-porch = <13>;
+ vfront-porch = <22>;
+ hsync-len = <10>;
+ vsync-len = <10>;
+ de-active = <1>;
+ pixelclk-active = <0>;
+ };
+ };
+ };
};
&pinctrl_uart1 {
diff --git a/arch/arm/include/asm/arch-sunxi/dram.h b/arch/arm/include/asm/arch-sunxi/dram.h
index 682daae..9d21b49 100644
--- a/arch/arm/include/asm/arch-sunxi/dram.h
+++ b/arch/arm/include/asm/arch-sunxi/dram.h
@@ -40,5 +40,6 @@
unsigned long sunxi_dram_init(void);
void mctl_await_completion(u32 *reg, u32 mask, u32 val);
bool mctl_mem_matches(u32 offset);
+bool mctl_mem_matches_base(u32 offset, ulong base);
#endif /* _SUNXI_DRAM_H */
diff --git a/arch/arm/mach-imx/imx9/container.cfg b/arch/arm/mach-imx/imx9/container.cfg
index f268bc9..72fe791 100644
--- a/arch/arm/mach-imx/imx9/container.cfg
+++ b/arch/arm/mach-imx/imx9/container.cfg
@@ -7,4 +7,5 @@
SOC_TYPE IMX9
CONTAINER
IMAGE A55 bl31.bin 0x204E0000
-IMAGE A55 u-boot.bin CONFIG_TEXT_BASE
\ No newline at end of file
+IMAGE A55 u-boot.bin CONFIG_TEXT_BASE
+IMAGE A55 tee.bin 0x96000000
\ No newline at end of file
diff --git a/arch/arm/mach-imx/imx9/imximage.cfg b/arch/arm/mach-imx/imx9/imximage.cfg
index 3e44046..d327d6a 100644
--- a/arch/arm/mach-imx/imx9/imximage.cfg
+++ b/arch/arm/mach-imx/imx9/imximage.cfg
@@ -5,6 +5,6 @@
BOOT_FROM SD 0x400
SOC_TYPE IMX9
-APPEND mx93a0-ahab-container.img
+APPEND mx93a1-ahab-container.img
CONTAINER
IMAGE A55 u-boot-spl-ddr.bin 0x2049A000
\ No newline at end of file
diff --git a/arch/arm/mach-sunxi/clock_sun4i.c b/arch/arm/mach-sunxi/clock_sun4i.c
index 8f1d1b6..ac3b7a8 100644
--- a/arch/arm/mach-sunxi/clock_sun4i.c
+++ b/arch/arm/mach-sunxi/clock_sun4i.c
@@ -25,6 +25,7 @@
APB0_DIV_1 << APB0_DIV_SHIFT |
CPU_CLK_SRC_OSC24M << CPU_CLK_SRC_SHIFT,
&ccm->cpu_ahb_apb0_cfg);
+ sdelay(20);
writel(PLL1_CFG_DEFAULT, &ccm->pll1_cfg);
sdelay(200);
writel(AXI_DIV_1 << AXI_DIV_SHIFT |
@@ -32,6 +33,7 @@
APB0_DIV_1 << APB0_DIV_SHIFT |
CPU_CLK_SRC_PLL1 << CPU_CLK_SRC_SHIFT,
&ccm->cpu_ahb_apb0_cfg);
+ sdelay(20);
#ifdef CONFIG_MACH_SUN7I
setbits_le32(&ccm->ahb_gate0, 0x1 << AHB_GATE_OFFSET_DMA);
#endif
diff --git a/arch/arm/mach-sunxi/dram_helpers.c b/arch/arm/mach-sunxi/dram_helpers.c
index 4a867df..83dbe4c 100644
--- a/arch/arm/mach-sunxi/dram_helpers.c
+++ b/arch/arm/mach-sunxi/dram_helpers.c
@@ -26,19 +26,39 @@
}
/*
- * Test if memory at offset offset matches memory at begin of DRAM
+ * Test if memory at offset matches memory at a certain base
*
* Note: dsb() is not available on ARMv5 in Thumb mode
*/
#ifndef CONFIG_MACH_SUNIV
-bool mctl_mem_matches(u32 offset)
+bool mctl_mem_matches_base(u32 offset, ulong base)
{
+ u32 val_base;
+ u32 val_offset;
+ bool ret;
+
+ /* Save original values */
+ val_base = readl(base);
+ val_offset = readl(base + offset);
+
/* Try to write different values to RAM at two addresses */
- writel(0, CFG_SYS_SDRAM_BASE);
- writel(0xaa55aa55, (ulong)CFG_SYS_SDRAM_BASE + offset);
+ writel(0, base);
+ writel(0xaa55aa55, base + offset);
dsb();
/* Check if the same value is actually observed when reading back */
- return readl(CFG_SYS_SDRAM_BASE) ==
- readl((ulong)CFG_SYS_SDRAM_BASE + offset);
+ ret = readl(base) == readl(base + offset);
+
+ /* Restore original values */
+ writel(val_base, base);
+ writel(val_offset, base + offset);
+ return ret;
+}
+
+/*
+ * Test if memory at offset matches memory at begin of DRAM
+ */
+bool mctl_mem_matches(u32 offset)
+{
+ return mctl_mem_matches_base(offset, CFG_SYS_SDRAM_BASE);
}
#endif
diff --git a/arch/arm/mach-sunxi/dram_sunxi_dw.c b/arch/arm/mach-sunxi/dram_sunxi_dw.c
index 3bfcc63..e064ef3 100644
--- a/arch/arm/mach-sunxi/dram_sunxi_dw.c
+++ b/arch/arm/mach-sunxi/dram_sunxi_dw.c
@@ -650,19 +650,6 @@
return 0;
}
-/*
- * Test if memory at offset offset matches memory at a certain base
- */
-static bool mctl_mem_matches_base(u32 offset, ulong base)
-{
- /* Try to write different values to RAM at two addresses */
- writel(0, base);
- writel(0xaa55aa55, base + offset);
- dsb();
- /* Check if the same value is actually observed when reading back */
- return readl(base) ==
- readl(base + offset);
-}
static void mctl_auto_detect_dram_size_rank(uint16_t socid, struct dram_para *para, ulong base, struct rank_para *rank)
{
diff --git a/board/armadeus/opos6uldev/opos6uldev.env b/board/armadeus/opos6uldev/opos6uldev.env
index f900297..2e7b659 100644
--- a/board/armadeus/opos6uldev/opos6uldev.env
+++ b/board/armadeus/opos6uldev/opos6uldev.env
@@ -24,7 +24,6 @@
kernelimg=opos6ul-linux.bin
splashpos=0,0
splashimage=CONFIG_SYS_LOAD_ADDR
-videomode=video=ctfb:x:800,y:480,depth:18,pclk:33033,le:96,ri:96,up:20,lo:21,hs:64,vs:4,sync:0,vmode:0
check_env=if test -n ${flash_env_version};
then env default env_version;
else env set flash_env_version ${env_version}; env save;
diff --git a/board/freescale/imx93_evk/spl.c b/board/freescale/imx93_evk/spl.c
index a98ed69..2fd5559 100644
--- a/board/freescale/imx93_evk/spl.c
+++ b/board/freescale/imx93_evk/spl.c
@@ -20,6 +20,7 @@
#include <asm/mach-imx/boot_mode.h>
#include <asm/mach-imx/mxc_i2c.h>
#include <asm/arch-mx7ulp/gpio.h>
+#include <asm/mach-imx/ele_api.h>
#include <asm/mach-imx/syscounter.h>
#include <asm/sections.h>
#include <dm/uclass.h>
@@ -43,6 +44,12 @@
void spl_board_init(void)
{
+ int ret;
+
+ ret = ele_start_rng();
+ if (ret)
+ printf("Fail to start RNG: %d\n", ret);
+
puts("Normal Boot\n");
}
diff --git a/board/kobol/helios4/spiboot.config b/board/kobol/helios4/spiboot.config
new file mode 100644
index 0000000..5ffb7d2
--- /dev/null
+++ b/board/kobol/helios4/spiboot.config
@@ -0,0 +1,4 @@
+CONFIG_MVEBU_SPL_BOOT_DEVICE_SPI=y
+# CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC is not set
+CONFIG_ENV_OFFSET=0x100000
+CONFIG_ENV_SECT_SIZE=0x10000
diff --git a/board/phytec/phycore_imx93/spl.c b/board/phytec/phycore_imx93/spl.c
index dabc531..16303fc 100644
--- a/board/phytec/phycore_imx93/spl.c
+++ b/board/phytec/phycore_imx93/spl.c
@@ -11,6 +11,7 @@
#include <asm/arch/sys_proto.h>
#include <asm/arch/trdc.h>
#include <asm/mach-imx/boot_mode.h>
+#include <asm/mach-imx/ele_api.h>
#include <asm/sections.h>
#include <hang.h>
#include <init.h>
@@ -34,6 +35,12 @@
void spl_board_init(void)
{
+ int ret;
+
+ ret = ele_start_rng();
+ if (ret)
+ printf("Fail to start RNG: %d\n", ret);
+
puts("Normal Boot\n");
}
diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS
index a2da6a4..4bcd9b9 100644
--- a/board/sunxi/MAINTAINERS
+++ b/board/sunxi/MAINTAINERS
@@ -460,6 +460,11 @@
S: Maintained
F: configs/orangepi_zero2_defconfig
+ORANGEPI ZERO 2W BOARD
+M: Andre Przywara <andre.przywara@arm.com>
+S: Maintained
+F: configs/orangepi_zero2w_defconfig
+
ORANGEPI ZERO 3 BOARD
M: Andre Przywara <andre.przywara@arm.com>
S: Maintained
diff --git a/board/variscite/imx93_var_som/spl.c b/board/variscite/imx93_var_som/spl.c
index e6db4eb..36e1721 100644
--- a/board/variscite/imx93_var_som/spl.c
+++ b/board/variscite/imx93_var_som/spl.c
@@ -20,6 +20,7 @@
#include <asm/mach-imx/mxc_i2c.h>
#include <asm/arch-mx7ulp/gpio.h>
#include <asm/sections.h>
+#include <asm/mach-imx/ele_api.h>
#include <asm/mach-imx/syscounter.h>
#include <dm/uclass.h>
#include <dm/device.h>
@@ -47,9 +48,14 @@
void spl_board_init(void)
{
struct var_eeprom *ep = VAR_EEPROM_DATA;
+ int ret;
puts("Normal Boot\n");
+ ret = ele_start_rng();
+ if (ret)
+ printf("Fail to start RNG: %d\n", ret);
+
/* Copy EEPROM contents to DRAM */
memcpy(ep, &eeprom, sizeof(*ep));
}
diff --git a/configs/A20-OLinuXino_MICRO-eMMC_defconfig b/configs/A20-OLinuXino_MICRO-eMMC_defconfig
index ca5869f..2f26b0c 100644
--- a/configs/A20-OLinuXino_MICRO-eMMC_defconfig
+++ b/configs/A20-OLinuXino_MICRO-eMMC_defconfig
@@ -20,6 +20,7 @@
CONFIG_MII=y
CONFIG_SUN7I_GMAC=y
CONFIG_SUN7I_GMAC_FORCE_TXERR=y
+CONFIG_AXP_ALDO3_INRUSH_QUIRK=y
CONFIG_AXP_ALDO3_VOLT=2800
CONFIG_AXP_ALDO4_VOLT=2800
CONFIG_SCSI=y
diff --git a/configs/A20-OLinuXino_MICRO_defconfig b/configs/A20-OLinuXino_MICRO_defconfig
index db4270f..673ab85 100644
--- a/configs/A20-OLinuXino_MICRO_defconfig
+++ b/configs/A20-OLinuXino_MICRO_defconfig
@@ -20,6 +20,7 @@
CONFIG_MII=y
CONFIG_SUN7I_GMAC=y
CONFIG_SUN7I_GMAC_FORCE_TXERR=y
+CONFIG_AXP_ALDO3_INRUSH_QUIRK=y
CONFIG_AXP_ALDO3_VOLT=2800
CONFIG_AXP_ALDO4_VOLT=2800
CONFIG_SCSI=y
diff --git a/configs/helios4_defconfig b/configs/helios4_defconfig
index f4f5db6..72d1d77 100644
--- a/configs/helios4_defconfig
+++ b/configs/helios4_defconfig
@@ -43,7 +43,6 @@
CONFIG_CMD_PCI=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
diff --git a/configs/opos6uldev_defconfig b/configs/opos6uldev_defconfig
index e1884df..7d21a6fe 100644
--- a/configs/opos6uldev_defconfig
+++ b/configs/opos6uldev_defconfig
@@ -115,13 +115,10 @@
CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_VIDEO=y
CONFIG_VIDEO_LOGO=y
-# CONFIG_VIDEO_BPP8 is not set
-# CONFIG_VIDEO_BPP32 is not set
CONFIG_SYS_WHITE_ON_BLACK=y
CONFIG_VIDEO_MXS=y
CONFIG_SPLASH_SCREEN=y
CONFIG_SPLASH_SCREEN_ALIGN=y
-CONFIG_SPLASH_SOURCE=y
CONFIG_BMP_16BPP=y
CONFIG_BMP_24BPP=y
CONFIG_BMP_32BPP=y
diff --git a/configs/orangepi_zero2w_defconfig b/configs/orangepi_zero2w_defconfig
new file mode 100644
index 0000000..5734d9d
--- /dev/null
+++ b/configs/orangepi_zero2w_defconfig
@@ -0,0 +1,30 @@
+CONFIG_ARM=y
+CONFIG_ARCH_SUNXI=y
+CONFIG_DEFAULT_DEVICE_TREE="sun50i-h618-orangepi-zero2w"
+CONFIG_SPL=y
+CONFIG_DRAM_SUN50I_H616_DX_ODT=0x07070707
+CONFIG_DRAM_SUN50I_H616_DX_DRI=0x0e0e0e0e
+CONFIG_DRAM_SUN50I_H616_CA_DRI=0x0e0e
+CONFIG_DRAM_SUN50I_H616_ODT_EN=0xaaaaeeee
+CONFIG_DRAM_SUN50I_H616_TPR6=0x48808080
+CONFIG_DRAM_SUN50I_H616_TPR10=0x402f6663
+CONFIG_DRAM_SUN50I_H616_TPR11=0x26262524
+CONFIG_DRAM_SUN50I_H616_TPR12=0x100f100f
+CONFIG_MACH_SUN50I_H616=y
+CONFIG_SUNXI_DRAM_H616_LPDDR4=y
+CONFIG_DRAM_CLK=792
+CONFIG_R_I2C_ENABLE=y
+CONFIG_SPL_SPI_SUNXI=y
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SPL_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
+CONFIG_MTD=y
+CONFIG_SPI_FLASH_ZBIT=y
+CONFIG_AXP313_POWER=y
+CONFIG_SPI=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_MUSB_GADGET=y
diff --git a/configs/turris_omnia_defconfig b/configs/turris_omnia_defconfig
index f045dd7..2914840 100644
--- a/configs/turris_omnia_defconfig
+++ b/configs/turris_omnia_defconfig
@@ -95,7 +95,9 @@
CONFIG_SPI_FLASH_MTD=y
CONFIG_PHY_MARVELL=y
CONFIG_PHY_FIXED=y
+CONFIG_DM_DSA=y
CONFIG_PHY_GIGE=y
+CONFIG_MV88E6XXX=y
CONFIG_MVNETA=y
CONFIG_MII=y
CONFIG_MVMDIO=y
diff --git a/doc/board/nxp/imx93_11x11_evk.rst b/doc/board/nxp/imx93_11x11_evk.rst
index fb0ecf8..171645a 100644
--- a/doc/board/nxp/imx93_11x11_evk.rst
+++ b/doc/board/nxp/imx93_11x11_evk.rst
@@ -42,10 +42,10 @@
.. code-block:: bash
- $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-sentinel-0.10.bin
- $ chmod +x firmware-sentinel-0.10.bin
- $ ./firmware-sentinel-0.10.bin
- $ cp firmware-sentinel-0.10/mx93a0-ahab-container.img $(srctree)
+ $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-sentinel-0.11.bin
+ $ chmod +x firmware-sentinel-0.11.bin
+ $ ./firmware-sentinel-0.11.bin
+ $ cp firmware-sentinel-0.11/mx93a1-ahab-container.img $(srctree)
Build U-Boot
------------
diff --git a/doc/board/phytec/imx93-phyboard-segin.rst b/doc/board/phytec/imx93-phyboard-segin.rst
index da8772e..ce17fbe 100644
--- a/doc/board/phytec/imx93-phyboard-segin.rst
+++ b/doc/board/phytec/imx93-phyboard-segin.rst
@@ -41,10 +41,10 @@
.. code-block:: bash
- $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-sentinel-0.10.bin
- $ chmod +x firmware-sentinel-0.10.bin
- $ ./firmware-sentinel-0.10.bin
- $ cp firmware-sentinel-0.10/mx93a0-ahab-container.img $(srctree)
+ $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-sentinel-0.11.bin
+ $ chmod +x firmware-sentinel-0.11.bin
+ $ ./firmware-sentinel-0.11.bin
+ $ cp firmware-sentinel-0.11/mx93a1-ahab-container.img $(srctree)
Build U-Boot
------------
diff --git a/doc/board/variscite/imx93_var_som.rst b/doc/board/variscite/imx93_var_som.rst
index 4951afd..02309f2 100644
--- a/doc/board/variscite/imx93_var_som.rst
+++ b/doc/board/variscite/imx93_var_som.rst
@@ -42,10 +42,10 @@
.. code-block:: bash
- $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-sentinel-0.10.bin
- $ chmod +x firmware-sentinel-0.10.bin
- $ ./firmware-sentinel-0.10.bin
- $ cp firmware-sentinel-0.10/mx93a0-ahab-container.img $(srctree)
+ $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-sentinel-0.11.bin
+ $ chmod +x firmware-sentinel-0.11.bin
+ $ ./firmware-sentinel-0.11.bin
+ $ cp firmware-sentinel-0.11/mx93a1-ahab-container.img $(srctree)
Build U-Boot
------------
diff --git a/drivers/net/mv88e6xxx.c b/drivers/net/mv88e6xxx.c
index c073f81..8fbbc1c 100644
--- a/drivers/net/mv88e6xxx.c
+++ b/drivers/net/mv88e6xxx.c
@@ -745,6 +745,7 @@
{
struct dsa_pdata *dsa_pdata = dev_get_uclass_plat(dev);
struct mv88e6xxx_priv *priv = dev_get_priv(dev);
+ fdt_addr_t smi_addr;
int val, ret;
if (ofnode_valid(dev_ofnode(dev)) &&
@@ -753,6 +754,13 @@
return -ENODEV;
}
+ smi_addr = dev_read_addr(dev);
+ if (smi_addr == FDT_ADDR_T_NONE) {
+ dev_err(dev, "Missing SMI address\n");
+ return -EINVAL;
+ }
+ priv->smi_addr = smi_addr;
+
/* probe internal mdio bus */
ret = mv88e6xxx_probe_mdio(dev);
if (ret)
diff --git a/drivers/net/phy/ethernet_id.c b/drivers/net/phy/ethernet_id.c
index 877a51c..6cb1fd4 100644
--- a/drivers/net/phy/ethernet_id.c
+++ b/drivers/net/phy/ethernet_id.c
@@ -71,6 +71,9 @@
}
}
+ if (phyaddr == -1)
+ phyaddr = ofnode_read_u32_default(phandle_args.node, "reg", -1);
+
id = vendor << 16 | device;
phydev = phy_device_create(bus, phyaddr, id, false);
if (phydev)
diff --git a/drivers/rng/Kconfig b/drivers/rng/Kconfig
index a89c899..cd72852 100644
--- a/drivers/rng/Kconfig
+++ b/drivers/rng/Kconfig
@@ -105,4 +105,12 @@
help
Enable True Random Number Generator in StarFive JH7110 SoCs.
+config RNG_TURRIS_RWTM
+ bool "Turris Mox TRNG in Secure Processor"
+ depends on DM_RNG && ARMADA_3700
+ help
+ Use TRNG in Turris Mox Secure Processor Firmware. Can be used
+ on other Armada-3700 devices (like EspressoBin) if Secure
+ Firmware from CZ.NIC is used.
+
endif
diff --git a/drivers/rng/Makefile b/drivers/rng/Makefile
index 7e64c4c..ecae1a3 100644
--- a/drivers/rng/Makefile
+++ b/drivers/rng/Makefile
@@ -17,3 +17,4 @@
obj-$(CONFIG_RNG_ARM_RNDR) += arm_rndr.o
obj-$(CONFIG_TPM_RNG) += tpm_rng.o
obj-$(CONFIG_RNG_JH7110) += jh7110_rng.o
+obj-$(CONFIG_RNG_TURRIS_RWTM) += turris_rwtm_rng.o
diff --git a/drivers/rng/turris_rwtm_rng.c b/drivers/rng/turris_rwtm_rng.c
new file mode 100644
index 0000000..ca808c4
--- /dev/null
+++ b/drivers/rng/turris_rwtm_rng.c
@@ -0,0 +1,123 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR BSD-3-Clause
+/*
+ * Copyright (c) 2024, Max Resch
+ */
+
+#include <dm.h>
+#include <malloc.h>
+#include <rng.h>
+#include <asm/dma-mapping.h>
+#include <asm/types.h>
+#include <mach/mbox.h>
+
+/* size of entropy buffer */
+#define RNG_BUFFER_SIZE 128U
+
+struct turris_rwtm_rng_priv {
+ phys_addr_t buffer;
+};
+
+static int turris_rwtm_rng_fill_entropy(phys_addr_t entropy, size_t size)
+{
+ u32 args[3] = { 1, (u32)entropy, size };
+ int ret;
+
+ /* flush data cache */
+ flush_dcache_range(entropy, entropy + size);
+
+ /*
+ * get entropy
+ * args[0] = 1 copies BYTES array in args[1] of length args[2]
+ */
+ ret = mbox_do_cmd(MBOX_CMD_GET_RANDOM, args, 3, NULL, 0);
+ if (ret < 0)
+ return ret;
+
+ /* invalidate data cache */
+ invalidate_dcache_range(entropy, entropy + size);
+
+ return 0;
+}
+
+static int turris_rwtm_rng_random_read(struct udevice *dev, void *data, size_t count)
+{
+ struct turris_rwtm_rng_priv *priv = dev_get_priv(dev);
+ phys_addr_t phys;
+ size_t size;
+ int ret;
+
+ phys = priv->buffer;
+
+ while (count) {
+ size = min_t(size_t, RNG_BUFFER_SIZE, count);
+
+ ret = turris_rwtm_rng_fill_entropy(phys, size);
+ if (ret < 0)
+ return ret;
+
+ memcpy(data, (void *)phys, size);
+ count -= size;
+ data = (u8 *)data + size;
+ }
+
+ return 0;
+}
+
+static int turris_rwtm_rng_probe(struct udevice *dev)
+{
+ struct turris_rwtm_rng_priv *priv = dev_get_priv(dev);
+ u32 args[] = { 0 };
+ int ret;
+
+ /*
+ * check if the random command is supported
+ * args[0] = 0 would copy 16 DWORDS entropy to out but we ignore them
+ */
+ ret = mbox_do_cmd(MBOX_CMD_GET_RANDOM, args, ARRAY_SIZE(args), NULL, 0);
+ if (ret < 0)
+ return ret;
+
+ /* entropy buffer */
+ priv->buffer = 0;
+
+ /* buffer address need to be aligned */
+ dma_alloc_coherent(RNG_BUFFER_SIZE, (unsigned long *)&priv->buffer);
+ if (!priv->buffer)
+ return -ENOMEM;
+
+ return 0;
+}
+
+static int turris_rwtm_rng_remove(struct udevice *dev)
+{
+ struct turris_rwtm_rng_priv *priv = dev_get_priv(dev);
+ phys_addr_t phys = priv->buffer;
+
+ dma_free_coherent((void *)phys);
+
+ return 0;
+}
+
+static const struct dm_rng_ops turris_rwtm_rng_ops = {
+ .read = turris_rwtm_rng_random_read,
+};
+
+/*
+ * only Turris MOX firmware has the RNG but allow all probable devices to be
+ * probed the default firmware will just reject the probe
+ */
+static const struct udevice_id turris_rwtm_rng_match[] = {
+ { .compatible = "cznic,turris-mox-rwtm" },
+ { .compatible = "marvell,armada-3700-rwtm-firmware" },
+ {},
+};
+
+U_BOOT_DRIVER(turris_rwtm_rng) = {
+ .name = "turris-rwtm-rng",
+ .id = UCLASS_RNG,
+ .of_match = turris_rwtm_rng_match,
+ .ops = &turris_rwtm_rng_ops,
+ .probe = turris_rwtm_rng_probe,
+ .remove = turris_rwtm_rng_remove,
+ .priv_auto = sizeof(struct turris_rwtm_rng_priv),
+};
diff --git a/drivers/spi/spi-sunxi.c b/drivers/spi/spi-sunxi.c
index c56d82d..9ec6b35 100644
--- a/drivers/spi/spi-sunxi.c
+++ b/drivers/spi/spi-sunxi.c
@@ -117,6 +117,8 @@
SPI_TCR_XCH,
SPI_TCR_CS_MANUAL,
SPI_TCR_CS_LEVEL,
+ SPI_TCR_SDC,
+ SPI_TCR_SDM,
SPI_FCR_TF_RST,
SPI_FCR_RF_RST,
SPI_FSR_RF_CNT_MASK,
@@ -128,6 +130,7 @@
u32 fifo_depth;
bool has_soft_reset;
bool has_burst_ctl;
+ bool has_clk_ctl;
};
struct sun4i_spi_plat {
@@ -302,7 +305,19 @@
setbits_le32(SPI_REG(priv, SPI_TCR), SPI_BIT(priv, SPI_TCR_CS_MANUAL) |
SPI_BIT(priv, SPI_TCR_CS_ACTIVE_LOW));
- sun4i_spi_set_speed_mode(dev->parent);
+ if (priv->variant->has_clk_ctl) {
+ sun4i_spi_set_speed_mode(dev->parent);
+ } else {
+ /*
+ * At this moment there is no ability to change input clock.
+ * Therefore, we can only use default HOSC@24MHz clock and
+ * set SPI sampling mode to normal
+ */
+ clrsetbits_le32(SPI_REG(priv, SPI_TCR),
+ SPI_BIT(priv, SPI_TCR_SDC) |
+ SPI_BIT(priv, SPI_TCR_SDM),
+ SPI_BIT(priv, SPI_TCR_SDM));
+ }
return 0;
}
@@ -516,6 +531,8 @@
[SPI_TCR_CS_MASK] = 0x30,
[SPI_TCR_CS_MANUAL] = BIT(6),
[SPI_TCR_CS_LEVEL] = BIT(7),
+ [SPI_TCR_SDC] = BIT(11),
+ [SPI_TCR_SDM] = BIT(13),
[SPI_TCR_XCH] = BIT(31),
[SPI_FCR_RF_RST] = BIT(15),
[SPI_FCR_TF_RST] = BIT(31),
@@ -526,6 +543,7 @@
.regs = sun4i_spi_regs,
.bits = sun4i_spi_bits,
.fifo_depth = 64,
+ .has_clk_ctl = true,
};
static const struct sun4i_spi_variant sun6i_a31_spi_variant = {
@@ -534,6 +552,7 @@
.fifo_depth = 128,
.has_soft_reset = true,
.has_burst_ctl = true,
+ .has_clk_ctl = true,
};
static const struct sun4i_spi_variant sun8i_h3_spi_variant = {
@@ -542,6 +561,15 @@
.fifo_depth = 64,
.has_soft_reset = true,
.has_burst_ctl = true,
+ .has_clk_ctl = true,
+};
+
+static const struct sun4i_spi_variant sun50i_r329_spi_variant = {
+ .regs = sun6i_spi_regs,
+ .bits = sun6i_spi_bits,
+ .fifo_depth = 64,
+ .has_soft_reset = true,
+ .has_burst_ctl = true,
};
static const struct udevice_id sun4i_spi_ids[] = {
@@ -557,6 +585,10 @@
.compatible = "allwinner,sun8i-h3-spi",
.data = (ulong)&sun8i_h3_spi_variant,
},
+ {
+ .compatible = "allwinner,sun50i-r329-spi",
+ .data = (ulong)&sun50i_r329_spi_variant,
+ },
{ /* sentinel */ }
};
diff --git a/drivers/video/mxsfb.c b/drivers/video/mxsfb.c
index 1043394..515363f 100644
--- a/drivers/video/mxsfb.c
+++ b/drivers/video/mxsfb.c
@@ -387,6 +387,7 @@
static const struct udevice_id mxs_video_ids[] = {
{ .compatible = "fsl,imx23-lcdif" },
{ .compatible = "fsl,imx28-lcdif" },
+ { .compatible = "fsl,imx6sx-lcdif" },
{ .compatible = "fsl,imx7ulp-lcdif" },
{ .compatible = "fsl,imxrt-lcdif" },
{ /* sentinel */ }
diff --git a/tools/imx9_image.sh b/tools/imx9_image.sh
index 88dfcfe..ca78a57 100755
--- a/tools/imx9_image.sh
+++ b/tools/imx9_image.sh
@@ -19,7 +19,7 @@
fi
if [ ! -f $tmp ]; then
- echo "WARNING '$tmp' not found, resulting binary is not-functional" >&2
+ echo "WARNING '$tmp' not found, resulting binary may be not-functional" >&2
# Comment-out the lines for un-existing files. This way,
# mkimage can keep working. This allows CI tests to pass even