mpc85xx: pcie: Implement workaround for Erratum A007815

The read-only-write-enable bit is set by default and must be cleared
to prevent overwriting read-only registers.  This should be done
immediately after resetting the PCI Express controller.

Reviewed-by: Hamish Martin <hamish.martin@alliedtelesis.co.nz>
Signed-off-by: Tony O'Brien <tony.obrien@alliedtelesis.co.nz>
[York S: Move SYS_FSL_ERRATUM_A007815 to Kconfig]
Reviewed-by: York Sun <york.sun@nxp.com>
diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig
index b0f34b6..615d7e1 100644
--- a/arch/powerpc/cpu/mpc85xx/Kconfig
+++ b/arch/powerpc/cpu/mpc85xx/Kconfig
@@ -831,6 +831,7 @@
 	select SYS_FSL_ERRATUM_A006593
 	select SYS_FSL_ERRATUM_A007186
 	select SYS_FSL_ERRATUM_A007212
+	select SYS_FSL_ERRATUM_A007815
 	select SYS_FSL_ERRATUM_A007907
 	select SYS_FSL_ERRATUM_A009942
 	select SYS_FSL_ERRATUM_ESDHC111
@@ -893,6 +894,7 @@
 	select SYS_FSL_ERRATUM_A006593
 	select SYS_FSL_ERRATUM_A007186
 	select SYS_FSL_ERRATUM_A007798
+	select SYS_FSL_ERRATUM_A007815
 	select SYS_FSL_ERRATUM_A007907
 	select SYS_FSL_ERRATUM_A009942
 	select SYS_FSL_HAS_DDR3
@@ -1081,6 +1083,9 @@
 config SYS_FSL_ERRATUM_A007212
 	bool
 
+config SYS_FSL_ERRATUM_A007815
+	bool
+
 config SYS_FSL_ERRATUM_A007798
 	bool