x86: cougarcanyon2: Enable CPU driver and SMP support
This enables the 206ax cpu driver on Intel Cougar Canyon 2 board,
so that SMP can be supported too.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
diff --git a/arch/x86/dts/cougarcanyon2.dts b/arch/x86/dts/cougarcanyon2.dts
index 8c71e98..946ba06 100644
--- a/arch/x86/dts/cougarcanyon2.dts
+++ b/arch/x86/dts/cougarcanyon2.dts
@@ -27,6 +27,39 @@
stdout-path = "/serial";
};
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "intel,core-gen3";
+ reg = <0>;
+ intel,apic-id = <0>;
+ };
+
+ cpu@1 {
+ device_type = "cpu";
+ compatible = "intel,core-gen3";
+ reg = <1>;
+ intel,apic-id = <1>;
+ };
+
+ cpu@2 {
+ device_type = "cpu";
+ compatible = "intel,core-gen3";
+ reg = <2>;
+ intel,apic-id = <2>;
+ };
+
+ cpu@3 {
+ device_type = "cpu";
+ compatible = "intel,core-gen3";
+ reg = <3>;
+ intel,apic-id = <3>;
+ };
+ };
+
microcode {
update@0 {
#include "microcode/m12306a2_00000008.dtsi"
diff --git a/configs/cougarcanyon2_defconfig b/configs/cougarcanyon2_defconfig
index 04ad232..98d9aa0 100644
--- a/configs/cougarcanyon2_defconfig
+++ b/configs/cougarcanyon2_defconfig
@@ -5,12 +5,14 @@
CONFIG_TARGET_COUGARCANYON2=y
# CONFIG_HAVE_INTEL_ME is not set
# CONFIG_ENABLE_MRC_CACHE is not set
+CONFIG_SMP=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro"
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_LAST_STAGE_INIT=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_CPU=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_PART=y
@@ -32,6 +34,7 @@
CONFIG_EFI_PARTITION=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
+CONFIG_CPU=y
CONFIG_SYS_NS16550=y
CONFIG_SPI=y
CONFIG_USB_STORAGE=y