| commit | 0bd20207ab2d874842161cab37c213310d785b24 | [log] [tgz] |
|---|---|---|
| author | Masahiro Yamada <yamada.masahiro@socionext.com> | Tue May 24 21:13:57 2016 +0900 |
| committer | Masahiro Yamada <yamada.masahiro@socionext.com> | Thu May 26 00:35:26 2016 +0900 |
| tree | da95cd1c624176e51bd12a9b709e968afd89205f | |
| parent | fc15b9beed05dec6cc092c265042381a0eadb0e9 [diff] |
ARM: uniphier: disable cache in SPL of PH1-LD20 The Boot ROM has enabled D-cache and MMU setting DDR memory area as Normal Memory in its page table. Disable D-cache and MMU before jumping to U-Boot proper. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>