CONFIG_SPL_SYS_[DI]CACHE_OFF: add

While converting CONFIG_SYS_[DI]CACHE_OFF to Kconfig, there are instances
where these configuration items are conditional on SPL. This commit adds SPL
variants of these configuration items, uses CONFIG_IS_ENABLED(), and updates
the configurations as required.

Acked-by: Alexey Brodkin <abrodkin@synopsys.com>
Signed-off-by: Trevor Woerner <trevor@toganlabs.com>
[trini: Make the default depend on the setting for full U-Boot, update
more zynq hardware]
Signed-off-by: Tom Rini <trini@konsulko.com>
diff --git a/arch/nds32/Kconfig b/arch/nds32/Kconfig
index 89d8af5..b6f16bf 100644
--- a/arch/nds32/Kconfig
+++ b/arch/nds32/Kconfig
@@ -22,12 +22,26 @@
 	help
 	  Do not enable instruction cache in U-Boot.
 
+config SPL_SYS_ICACHE_OFF
+	bool "Do not enable icache in SPL"
+	depends on SPL
+	default SYS_ICACHE_OFF
+	help
+	  Do not enable instruction cache in SPL.
+
 config SYS_DCACHE_OFF
 	bool "Do not enable dcache"
 	default n
 	help
 	  Do not enable data cache in U-Boot.
 
+config SPL_SYS_DCACHE_OFF
+	bool "Do not enable dcache in SPL"
+	depends on SPL
+	default SYS_DCACHE_OFF
+	help
+	  Do not enable data cache in SPL.
+
 source "board/AndesTech/adp-ag101p/Kconfig"
 source "board/AndesTech/adp-ae3xx/Kconfig"
 
diff --git a/arch/nds32/cpu/n1213/start.S b/arch/nds32/cpu/n1213/start.S
index 4e6a0e7..6918881 100644
--- a/arch/nds32/cpu/n1213/start.S
+++ b/arch/nds32/cpu/n1213/start.S
@@ -129,7 +129,7 @@
 	mfsr	$r1, $mr8
 	and	$r1, $r1, $r0
 	mtsr	$r1, $mr8
-#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
+#if !(CONFIG_IS_ENABLED(SYS_ICACHE_OFF) && CONFIG_IS_ENABLED(SYS_DCACHE_OFF))
 /*
  * MMU_CTL NTC0 Cacheable/Write-Back
  */
@@ -139,7 +139,7 @@
 	mtsr	$r1, $mr0
 #endif
 
-#ifndef CONFIG_SYS_DCACHE_OFF
+#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
 #ifdef CONFIG_ARCH_MAP_SYSMEM
 /*
  * MMU_CTL NTC1 Non-cacheable
@@ -158,14 +158,14 @@
 #endif
 #endif
 
-#if !defined(CONFIG_SYS_ICACHE_OFF)
+#if !CONFIG_IS_ENABLED(SYS_ICACHE_OFF)
 	li	$r0, 0x1
 	mfsr	$r1, $mr8
 	or	$r1, $r1, $r0
 	mtsr	$r1, $mr8
 #endif
 
-#if !defined(CONFIG_SYS_DCACHE_OFF)
+#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
 	li	$r0, 0x2
 	mfsr	$r1, $mr8
 	or	$r1, $r1, $r0
diff --git a/arch/nds32/lib/cache.c b/arch/nds32/lib/cache.c
index 3e5aa7c..2706513 100644
--- a/arch/nds32/lib/cache.c
+++ b/arch/nds32/lib/cache.c
@@ -6,7 +6,7 @@
  */
 
 #include <common.h>
-#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
+#if !(CONFIG_IS_ENABLED(SYS_ICACHE_OFF) && CONFIG_IS_ENABLED(SYS_DCACHE_OFF))
 static inline unsigned long CACHE_SET(unsigned char cache)
 {
 	if (cache == ICACHE)
@@ -38,7 +38,7 @@
 }
 #endif
 
-#ifndef CONFIG_SYS_ICACHE_OFF
+#if !CONFIG_IS_ENABLED(SYS_ICACHE_OFF)
 void invalidate_icache_all(void)
 {
 	unsigned long end, line_size;
@@ -133,7 +133,7 @@
 
 #endif
 
-#ifndef CONFIG_SYS_DCACHE_OFF
+#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
 void dcache_wbinval_all(void)
 {
 	unsigned long end, line_size;