clk: convert API to match reset/mailbox style
The following changes are made to the clock API:
* The concept of "clocks" and "peripheral clocks" are unified; each clock
provider now implements a single set of clocks. This provides a simpler
conceptual interface to clients, and better aligns with device tree
clock bindings.
* Clocks are now identified with a single "struct clk", rather than
requiring clients to store the clock provider device and clock identity
values separately. For simple clock consumers, this isolates clients
from internal details of the clock API.
* clk.h is split so it only contains the client/consumer API, whereas
clk-uclass.h contains the provider API. This aligns with the recently
added reset and mailbox APIs.
* clk_ops .of_xlate(), .request(), and .free() are added so providers
can customize these operations if needed. This also aligns with the
recently added reset and mailbox APIs.
* clk_disable() is added.
* All users of the current clock APIs are updated.
* Sandbox clock tests are updated to exercise clock lookup via DT, and
clock enable/disable.
* rkclk_get_clk() is removed and replaced with standard APIs.
Buildman shows no clock-related errors for any board for which buildman
can download a toolchain.
test/py passes for sandbox (which invokes the dm clk test amongst
others).
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
diff --git a/arch/mips/mach-pic32/cpu.c b/arch/mips/mach-pic32/cpu.c
index f2ee911..ac33391 100644
--- a/arch/mips/mach-pic32/cpu.c
+++ b/arch/mips/mach-pic32/cpu.c
@@ -23,18 +23,34 @@
DECLARE_GLOBAL_DATA_PTR;
-static ulong clk_get_cpu_rate(void)
+static ulong rate(int id)
{
int ret;
struct udevice *dev;
+ struct clk clk;
+ ulong rate;
ret = uclass_get_device(UCLASS_CLK, 0, &dev);
if (ret) {
- panic("uclass-clk: device not found\n");
+ printf("clk-uclass not found\n");
return 0;
}
- return clk_get_rate(dev);
+ clk.id = id;
+ ret = clk_request(dev, &clk);
+ if (ret < 0)
+ return ret;
+
+ rate = clk_get_rate(&clk);
+
+ clk_free(&clk);
+
+ return rate;
+}
+
+static ulong clk_get_cpu_rate(void)
+{
+ return rate(PB7CLK);
}
/* initialize prefetch module related to cpu_clk */
@@ -127,30 +143,25 @@
}
#endif
#ifdef CONFIG_CMD_CLK
+
int soc_clk_dump(void)
{
- int i, ret;
- struct udevice *dev;
-
- ret = uclass_get_device(UCLASS_CLK, 0, &dev);
- if (ret) {
- printf("clk-uclass not found\n");
- return ret;
- }
+ int i;
printf("PLL Speed: %lu MHz\n",
- CLK_MHZ(clk_get_periph_rate(dev, PLLCLK)));
- printf("CPU Speed: %lu MHz\n", CLK_MHZ(clk_get_rate(dev)));
- printf("MPLL Speed: %lu MHz\n",
- CLK_MHZ(clk_get_periph_rate(dev, MPLL)));
+ CLK_MHZ(rate(PLLCLK)));
+
+ printf("CPU Speed: %lu MHz\n", CLK_MHZ(rate(PB7CLK)));
+
+ printf("MPLL Speed: %lu MHz\n", CLK_MHZ(rate(MPLL)));
for (i = PB1CLK; i <= PB7CLK; i++)
printf("PB%d Clock Speed: %lu MHz\n", i - PB1CLK + 1,
- CLK_MHZ(clk_get_periph_rate(dev, i)));
+ CLK_MHZ(rate(i)));
for (i = REF1CLK; i <= REF5CLK; i++)
printf("REFO%d Clock Speed: %lu MHz\n", i - REF1CLK + 1,
- CLK_MHZ(clk_get_periph_rate(dev, i)));
+ CLK_MHZ(rate(i)));
return 0;
}
#endif