ppc: Remove MPC8315ERDB board

This board has not been converted to CONFIG_DM_PCI by the deadline and is
also missing conversion to CONFIG_DM.  Remove it.  As this is the last
ARCH_MPC8315 platform, remove that support as well.

Signed-off-by: Tom Rini <trini@konsulko.com>
diff --git a/include/mpc83xx.h b/include/mpc83xx.h
index ea67868..71cffa1 100644
--- a/include/mpc83xx.h
+++ b/include/mpc83xx.h
@@ -243,41 +243,6 @@
 #define SICRH_TSOBI1			0x00000002
 #define SICRH_TSOBI2			0x00000001
 
-#elif defined(CONFIG_ARCH_MPC8315)
-/* SICRL bits - MPC8315 specific */
-#define SICRL_DMA_CH0			0xc0000000
-#define SICRL_DMA_SPI			0x30000000
-#define SICRL_UART			0x0c000000
-#define SICRL_IRQ4			0x02000000
-#define SICRL_IRQ5			0x01800000
-#define SICRL_IRQ6_7			0x00400000
-#define SICRL_IIC1			0x00300000
-#define SICRL_TDM			0x000c0000
-#define SICRL_TDM_SHARED		0x00030000
-#define SICRL_PCI_A			0x0000c000
-#define SICRL_ELBC_A			0x00003000
-#define SICRL_ETSEC1_A			0x000000c0
-#define SICRL_ETSEC1_B			0x00000030
-#define SICRL_ETSEC1_C			0x0000000c
-#define SICRL_TSEXPOBI			0x00000001
-
-/* SICRH bits - MPC8315 specific */
-#define SICRH_GPIO_0			0xc0000000
-#define SICRH_GPIO_1			0x30000000
-#define SICRH_GPIO_2			0x0c000000
-#define SICRH_GPIO_3			0x03000000
-#define SICRH_GPIO_4			0x00c00000
-#define SICRH_GPIO_5			0x00300000
-#define SICRH_GPIO_6			0x000c0000
-#define SICRH_GPIO_7			0x00030000
-#define SICRH_GPIO_8			0x0000c000
-#define SICRH_GPIO_9			0x00003000
-#define SICRH_GPIO_10			0x00000c00
-#define SICRH_GPIO_11			0x00000300
-#define SICRH_ETSEC2_A			0x000000c0
-#define SICRH_TSOBI1			0x00000002
-#define SICRH_TSOBI2			0x00000001
-
 #elif defined(CONFIG_ARCH_MPC837X)
 /* SICRL bits - MPC837X specific */
 #define SICRL_USB_A			0xC0000000
@@ -634,7 +599,7 @@
 #define HRCWL_CE_TO_PLL_1X30		0x0000001E
 #define HRCWL_CE_TO_PLL_1X31		0x0000001F
 
-#elif defined(CONFIG_ARCH_MPC8308) || defined(CONFIG_ARCH_MPC8315)
+#elif defined(CONFIG_ARCH_MPC8308)
 #define HRCWL_SVCOD			0x30000000
 #define HRCWL_SVCOD_SHIFT		28
 #define HRCWL_SVCOD_DIV_2		0x00000000
@@ -981,7 +946,7 @@
 #define SCCR_USBDRCM_2			0x00200000
 #define SCCR_USBDRCM_3			0x00300000
 
-#elif defined(CONFIG_ARCH_MPC8308) || defined(CONFIG_ARCH_MPC8315)
+#elif defined(CONFIG_ARCH_MPC8308)
 /* SCCR bits - MPC8315/MPC8308 specific */
 #define SCCR_TSEC1CM			0xc0000000
 #define SCCR_TSEC1CM_SHIFT		30