i.MX6: board: Add BTicino i.MX6DL Mamoj initial support
Add initial support for i.MX6DL BTicino Mamoj board.
Mamoh board added:
- SPL
- SPL_DM
- SPL_OF_CONTROL
- DM for U-Boot proper
- OF_CONTROL for U-Boot proper
- eMMC
- FEC
- Boot from eMMC
- Boot from USB SDP
Signed-off-by: Simone CIANNI <simone.cianni@bticino.it>
Signed-off-by: Raffaele RECALCATI <raffaele.recalcati@bticino.it>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
diff --git a/board/bticino/mamoj/Kconfig b/board/bticino/mamoj/Kconfig
new file mode 100644
index 0000000..e5aec58
--- /dev/null
+++ b/board/bticino/mamoj/Kconfig
@@ -0,0 +1,12 @@
+if TARGET_MX6DL_MAMOJ
+
+config SYS_BOARD
+ default "mamoj"
+
+config SYS_VENDOR
+ default "bticino"
+
+config SYS_CONFIG_NAME
+ default "imx6dl-mamoj"
+
+endif
diff --git a/board/bticino/mamoj/MAINTAINERS b/board/bticino/mamoj/MAINTAINERS
new file mode 100644
index 0000000..c35b387
--- /dev/null
+++ b/board/bticino/mamoj/MAINTAINERS
@@ -0,0 +1,10 @@
+MX6DL_MAMOJ BOARD
+M: Jagan Teki <jagan@amarulasolutions.com>
+M: Raffaele RECALCATI <raffaele.recalcati@bticino.it>
+M: Simone CIANNI <simone.cianni@bticino.it>
+S: Maintained
+F: board/bticino/mamoj
+F: include/configs/imx6dl-mamoj.h
+F: configs/imx6dl_mamoj_defconfig
+F: arch/arm/dts/imx6dl-mamoj.dts
+F: arch/arm/dts/imx6dl-mamoj-u-boot.dtsi
diff --git a/board/bticino/mamoj/Makefile b/board/bticino/mamoj/Makefile
new file mode 100644
index 0000000..f1ddda4
--- /dev/null
+++ b/board/bticino/mamoj/Makefile
@@ -0,0 +1,8 @@
+# Copyright (C) 2018 BTicino
+# Copyright (C) 2017 Amarula Solutions B.V.
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y := mamoj.o
+obj-$(CONFIG_SPL_BUILD) += spl.o
diff --git a/board/bticino/mamoj/README b/board/bticino/mamoj/README
new file mode 100644
index 0000000..eda9e45
--- /dev/null
+++ b/board/bticino/mamoj/README
@@ -0,0 +1,60 @@
+BTicino Mamoj board:
+===================
+
+Build:
+
+ $ make mrproper
+ $ make imx6dl_mamoj_defconfig
+ $ make
+
+ This will generate the SPL image called SPL and the u-boot-dtb.img.
+
+The following methods can be used for booting Mamoj boards:
+
+1. USB SDP boot
+
+1. USB SDP boot:
+---------------
+
+ - Build imx_usb_loader
+
+ $ git clone git://github.com/boundarydevices/imx_usb_loader.git
+ $ cd imx_usb_loader
+ $ make
+
+ - Build the BSP and copy SPL, u-boot-dtb.img in imx_usb_loader directory
+
+ - Put the board in "Serial Download Mode"
+
+ - Plug-in USB-to-Serial, Open minicom 1152008N1 and USB OTG cables to Host
+
+ - Turn-on board
+
+ - Identify VID/PID using lsusb
+
+ Bus 001 Device 010: ID 15a2:0061 Freescale Semiconductor, Inc. i.MX 6Solo/6DualLite SystemOnChip in RecoveryMode
+
+ - Update the conf files
+
+ imx_usb.conf
+ 0x15a2:0x0061, mx6_usb_rom.conf, 0x0525:0xb4a4, mx6_usb_sdp_spl.conf
+
+ mx6_usb_rom.conf
+ mx6_usb
+ hid,1024,0x910000,0x10000000,512M,0x00900000,0x40000
+ SPL:jump header2
+
+ mx6_usb_sdp_spl.conf
+ mx6_spl_sdp
+ hid,uboot_header,1024,0x910000,0x10000000,512M,0x00900000,0x40000
+ u-boot-dtb.img:jump header2
+
+ - Launch the loader
+
+ $ ./imx_usb
+
+ We can see U-Boot boot from USB SDP on minicom
+
+--
+Jagan Teki <jagan@amarulasolutions.com>
+03/12/18
diff --git a/board/bticino/mamoj/mamoj.c b/board/bticino/mamoj/mamoj.c
new file mode 100644
index 0000000..478f673
--- /dev/null
+++ b/board/bticino/mamoj/mamoj.c
@@ -0,0 +1,27 @@
+/*
+ * Copyright (C) 2018 Simone CIANNI <simone.cianni@bticino.it>
+ * Copyright (C) 2018 Raffaele RECALCATI <raffaele.recalcati@bticino.it>
+ * Copyright (C) 2018 Jagan Teki <jagan@amarulasolutions.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/arch/sys_proto.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int board_init(void)
+{
+ /* Address of boot parameters */
+ gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
+
+ return 0;
+}
+
+int dram_init(void)
+{
+ gd->ram_size = imx_ddr_size();
+
+ return 0;
+}
diff --git a/board/bticino/mamoj/spl.c b/board/bticino/mamoj/spl.c
new file mode 100644
index 0000000..4274cc8
--- /dev/null
+++ b/board/bticino/mamoj/spl.c
@@ -0,0 +1,161 @@
+/*
+ * Copyright (C) 2018 Simone CIANNI <simone.cianni@bticino.it>
+ * Copyright (C) 2018 Raffaele RECALCATI <raffaele.recalcati@bticino.it>
+ * Copyright (C) 2018 Jagan Teki <jagan@amarulasolutions.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <spl.h>
+
+#include <asm/io.h>
+#include <linux/sizes.h>
+
+#include <asm/arch/clock.h>
+#include <asm/arch/crm_regs.h>
+#include <asm/arch/iomux.h>
+#include <asm/arch/mx6-ddr.h>
+#include <asm/arch/mx6-pins.h>
+#include <asm/arch/sys_proto.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define IMX6SDL_DRIVE_STRENGTH 0x28
+#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
+ PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS)
+
+static iomux_v3_cfg_t const uart3_pads[] = {
+ IOMUX_PADS(PAD_EIM_D24__UART3_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)),
+ IOMUX_PADS(PAD_EIM_D25__UART3_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)),
+};
+
+struct mx6sdl_iomux_ddr_regs mx6sdl_ddr_ioregs = {
+ .dram_sdclk_0 = IMX6SDL_DRIVE_STRENGTH,
+ .dram_sdclk_1 = IMX6SDL_DRIVE_STRENGTH,
+ .dram_cas = IMX6SDL_DRIVE_STRENGTH,
+ .dram_ras = IMX6SDL_DRIVE_STRENGTH,
+ .dram_reset = IMX6SDL_DRIVE_STRENGTH,
+ .dram_sdcke0 = IMX6SDL_DRIVE_STRENGTH,
+ .dram_sdcke1 = IMX6SDL_DRIVE_STRENGTH,
+ .dram_sdba2 = 0x00000000,
+ .dram_sdodt0 = IMX6SDL_DRIVE_STRENGTH,
+ .dram_sdodt1 = IMX6SDL_DRIVE_STRENGTH,
+ .dram_sdqs0 = IMX6SDL_DRIVE_STRENGTH,
+ .dram_sdqs1 = IMX6SDL_DRIVE_STRENGTH,
+ .dram_sdqs2 = IMX6SDL_DRIVE_STRENGTH,
+ .dram_sdqs3 = IMX6SDL_DRIVE_STRENGTH,
+ .dram_sdqs4 = IMX6SDL_DRIVE_STRENGTH,
+ .dram_sdqs5 = IMX6SDL_DRIVE_STRENGTH,
+ .dram_sdqs6 = IMX6SDL_DRIVE_STRENGTH,
+ .dram_sdqs7 = IMX6SDL_DRIVE_STRENGTH,
+ .dram_dqm0 = IMX6SDL_DRIVE_STRENGTH,
+ .dram_dqm1 = IMX6SDL_DRIVE_STRENGTH,
+ .dram_dqm2 = IMX6SDL_DRIVE_STRENGTH,
+ .dram_dqm3 = IMX6SDL_DRIVE_STRENGTH,
+ .dram_dqm4 = IMX6SDL_DRIVE_STRENGTH,
+ .dram_dqm5 = IMX6SDL_DRIVE_STRENGTH,
+ .dram_dqm6 = IMX6SDL_DRIVE_STRENGTH,
+ .dram_dqm7 = IMX6SDL_DRIVE_STRENGTH,
+};
+
+struct mx6sdl_iomux_grp_regs mx6sdl_grp_ioregs = {
+ .grp_ddr_type = 0x000c0000,
+ .grp_ddrmode_ctl = 0x00020000,
+ .grp_ddrpke = 0x00000000,
+ .grp_addds = IMX6SDL_DRIVE_STRENGTH,
+ .grp_ctlds = IMX6SDL_DRIVE_STRENGTH,
+ .grp_ddrmode = 0x00020000,
+ .grp_b0ds = IMX6SDL_DRIVE_STRENGTH,
+ .grp_b1ds = IMX6SDL_DRIVE_STRENGTH,
+ .grp_b2ds = IMX6SDL_DRIVE_STRENGTH,
+ .grp_b3ds = IMX6SDL_DRIVE_STRENGTH,
+ .grp_b4ds = IMX6SDL_DRIVE_STRENGTH,
+ .grp_b5ds = IMX6SDL_DRIVE_STRENGTH,
+ .grp_b6ds = IMX6SDL_DRIVE_STRENGTH,
+ .grp_b7ds = IMX6SDL_DRIVE_STRENGTH,
+};
+
+static struct mx6_ddr3_cfg mt41k128m16jt_125 = {
+ .mem_speed = 1600,
+ .density = 4,
+ .width = 32,
+ .banks = 8,
+ .rowaddr = 14,
+ .coladdr = 10,
+ .pagesz = 2,
+ .trcd = 1375,
+ .trcmin = 4875,
+ .trasmin = 3500,
+ .SRT = 0,
+};
+
+static struct mx6_mmdc_calibration mx6dl_mmdc_calib = {
+ .p0_mpwldectrl0 = 0x0042004b,
+ .p0_mpwldectrl1 = 0x0038003c,
+ .p0_mpdgctrl0 = 0x42340230,
+ .p0_mpdgctrl1 = 0x0228022c,
+ .p0_mprddlctl = 0x42444646,
+ .p0_mpwrdlctl = 0x38382e2e,
+};
+
+static struct mx6_ddr_sysinfo mem_dl = {
+ .dsize = 1,
+ .cs1_mirror = 0,
+ /* config for full 4GB range so that get_mem_size() works */
+ .cs_density = 32,
+ .ncs = 1,
+ .bi_on = 1,
+ .rtt_nom = 1,
+ .rtt_wr = 1,
+ .ralat = 5,
+ .walat = 0,
+ .mif3_mode = 3,
+ .rst_to_cke = 0x23,
+ .sde_to_rst = 0x10,
+ .refsel = 1,
+ .refr = 7,
+};
+
+static void spl_dram_init(void)
+{
+ mx6sdl_dram_iocfg(64, &mx6sdl_ddr_ioregs, &mx6sdl_grp_ioregs);
+ mx6_dram_cfg(&mem_dl, &mx6dl_mmdc_calib, &mt41k128m16jt_125);
+
+ udelay(100);
+}
+
+static void ccgr_init(void)
+{
+ struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
+
+ writel(0x00003f3f, &ccm->CCGR0);
+ writel(0x0030fc00, &ccm->CCGR1);
+ writel(0x000fc000, &ccm->CCGR2);
+ writel(0x3f300000, &ccm->CCGR3);
+ writel(0xff00f300, &ccm->CCGR4);
+ writel(0x0f0000c3, &ccm->CCGR5);
+ writel(0x000003cc, &ccm->CCGR6);
+}
+
+void board_init_f(ulong dummy)
+{
+ ccgr_init();
+
+ /* setup AIPS and disable watchdog */
+ arch_cpu_init();
+
+ gpr_init();
+
+ /* iomux */
+ SETUP_IOMUX_PADS(uart3_pads);
+
+ /* setup GP timer */
+ timer_init();
+
+ /* UART clocks enabled and gd valid - init serial console */
+ preloader_console_init();
+
+ /* DDR initialization */
+ spl_dram_init();
+}