fpga: xilinx: Simplify load/dump/info function handling
Connect FPGA version with appropriate operations
to remove huge switch-cases for every FPGA family.
Tested on Zynq. Spartan2/Spartan3/Virtex2 just compile test.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
diff --git a/drivers/fpga/zynqpl.c b/drivers/fpga/zynqpl.c
index b4d0e22..dcd3495 100644
--- a/drivers/fpga/zynqpl.c
+++ b/drivers/fpga/zynqpl.c
@@ -36,7 +36,7 @@
#define CONFIG_SYS_FPGA_PROG_TIME (CONFIG_SYS_HZ * 4) /* 4 s */
#endif
-int zynq_info(xilinx_desc *desc)
+static int zynq_info(xilinx_desc *desc)
{
return FPGA_SUCCESS;
}
@@ -152,8 +152,7 @@
return 0;
}
-
-int zynq_load(xilinx_desc *desc, const void *buf, size_t bsize)
+static int zynq_load(xilinx_desc *desc, const void *buf, size_t bsize)
{
unsigned long ts; /* Timestamp */
u32 partialbit = 0;
@@ -358,7 +357,13 @@
return FPGA_SUCCESS;
}
-int zynq_dump(xilinx_desc *desc, const void *buf, size_t bsize)
+static int zynq_dump(xilinx_desc *desc, const void *buf, size_t bsize)
{
return FPGA_FAIL;
}
+
+struct xilinx_fpga_op zynq_op = {
+ .load = zynq_load,
+ .dump = zynq_dump,
+ .info = zynq_info,
+};