net: dwc_eth_qos: mdio: Implement clause 45
Bevor this commit, only clause 22 access was possible. After this commit,
clause 45 direct access will available as well.
Note that there is a slight change of behavior: Before this commit, the
C45E bit was set to whatever value was left in the register from the
previous access. After this commit, we adopt the common practice of
discerning C45 from C22 using the devad argument.
Signed-off-by: Philip Oberfichtner <pro@denx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
diff --git a/drivers/net/dwc_eth_qos.h b/drivers/net/dwc_eth_qos.h
index 8b3d0d4..a06390a 100644
--- a/drivers/net/dwc_eth_qos.h
+++ b/drivers/net/dwc_eth_qos.h
@@ -79,19 +79,20 @@
#define EQOS_MAC_HW_FEATURE3_ASP_SHIFT 28
#define EQOS_MAC_HW_FEATURE3_ASP_MASK 0x3
-#define EQOS_MAC_MDIO_ADDRESS_PA_SHIFT 21
-#define EQOS_MAC_MDIO_ADDRESS_RDA_SHIFT 16
-#define EQOS_MAC_MDIO_ADDRESS_CR_SHIFT 8
+#define EQOS_MAC_MDIO_ADDRESS_PA_MASK GENMASK(25, 21)
+#define EQOS_MAC_MDIO_ADDRESS_RDA_MASK GENMASK(20, 16)
+#define EQOS_MAC_MDIO_ADDRESS_CR_MASK GENMASK(11, 8)
#define EQOS_MAC_MDIO_ADDRESS_CR_100_150 1
#define EQOS_MAC_MDIO_ADDRESS_CR_20_35 2
#define EQOS_MAC_MDIO_ADDRESS_CR_250_300 5
#define EQOS_MAC_MDIO_ADDRESS_SKAP BIT(4)
-#define EQOS_MAC_MDIO_ADDRESS_GOC_SHIFT 2
+#define EQOS_MAC_MDIO_ADDRESS_GOC_MASK GENMASK(3, 2)
#define EQOS_MAC_MDIO_ADDRESS_GOC_READ 3
#define EQOS_MAC_MDIO_ADDRESS_GOC_WRITE 1
#define EQOS_MAC_MDIO_ADDRESS_C45E BIT(1)
#define EQOS_MAC_MDIO_ADDRESS_GB BIT(0)
+#define EQOS_MAC_MDIO_DATA_RA_MASK GENMASK(31, 16)
#define EQOS_MAC_MDIO_DATA_GD_MASK 0xffff
#define EQOS_MTL_REGS_BASE 0xd00