mtd: rawnand: cortina_nand: Add Cortina CAxxxx SoC support
Add Cortina Access parallel Nand support for CAxxxx SOCs
Signed-off-by: Kate Liu <kate.liu@cortina-access.com>
Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>
CC: Tom Rini <trini@konsulko.com>
CC: Scott Wood <oss@buserror.net>
Reviewed-by: Tom Rini <trini@konsulko.com>
diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig
index 3cf3b14..ed151ee 100644
--- a/drivers/mtd/nand/raw/Kconfig
+++ b/drivers/mtd/nand/raw/Kconfig
@@ -321,6 +321,18 @@
The controller supports a maximum 8k page size and supports
a maximum 8-bit correction error per sector of 512 bytes.
+config CORTINA_NAND
+ bool "Support for NAND controller on Cortina-Access SoCs"
+ depends on CORTINA_PLATFORM
+ select SYS_NAND_SELF_INIT
+ select DM_MTD
+ imply CMD_NAND
+ help
+ Enables support for NAND Flash chips on Coartina-Access SoCs platform
+ This controller is found on Presidio/Venus SoCs.
+ The controller supports a maximum 8k page size and supports
+ a maximum 40-bit error correction per sector of 1024 bytes.
+
comment "Generic NAND options"
config SYS_NAND_BLOCK_SIZE