cpu: imx8: support a72 as boot cpu
Support booting i.MX8QM with A72 as boot cpu
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
diff --git a/drivers/cpu/imx8_cpu.c b/drivers/cpu/imx8_cpu.c
index 7c54c29..c4679e1 100644
--- a/drivers/cpu/imx8_cpu.c
+++ b/drivers/cpu/imx8_cpu.c
@@ -20,6 +20,7 @@
const char *type;
u32 cpurev;
u32 freq_mhz;
+ u32 mpidr;
};
const char *get_imx8_type(u32 imxtype)
@@ -144,16 +145,28 @@
return 0;
}
+static int cpu_imx_is_current(struct udevice *dev)
+{
+ struct cpu_imx_platdata *plat = dev_get_platdata(dev);
+
+ if (plat->mpidr == (read_mpidr() & 0xffff))
+ return 1;
+
+ return 0;
+}
+
static const struct cpu_ops cpu_imx8_ops = {
.get_desc = cpu_imx_get_desc,
.get_info = cpu_imx_get_info,
.get_count = cpu_imx_get_count,
.get_vendor = cpu_imx_get_vendor,
+ .is_current = cpu_imx_is_current,
};
static const struct udevice_id cpu_imx8_ids[] = {
{ .compatible = "arm,cortex-a35" },
{ .compatible = "arm,cortex-a53" },
+ { .compatible = "arm,cortex-a72" },
{ }
};
@@ -185,6 +198,12 @@
plat->rev = get_imx8_rev(cpurev & 0xFFF);
plat->type = get_imx8_type((cpurev & 0xFF000) >> 12);
plat->freq_mhz = imx8_get_cpu_rate() / 1000000;
+ plat->mpidr = dev_read_addr(dev);
+ if (plat->mpidr == FDT_ADDR_T_NONE) {
+ printf("%s: Failed to get CPU reg property\n", __func__);
+ return -EINVAL;
+ }
+
return 0;
}