serial, ns16550: bugfix: ns16550 fifo not enabled
commit: 65f83802b7a5b "serial: 16550: Add getfcr accessor"
breaks u-boot commandline working with long commands
sending to the board.
Since the above patch, you have to setup the fcr register.
For board/archs which enable OF_PLATDATA, the new field
fcr in struct ns16550_platdata is not filled with a
default value ...
This leads in not setting up the uarts fifo, which ends
in problems, when you send long commands to u-boots
commandline.
Detected this issue with automated tbot tests on am335x
based shc board.
The error does not popup, if you type commands. You need
to copy&paste a long command to u-boots commandshell
(or send a long command with tbot)
Possible boards/plattforms with problems:
./arch/arm/cpu/arm926ejs/lpc32xx/devices.c
./arch/arm/mach-tegra/board.c
./board/overo/overo.c
./board/quipos/cairo/cairo.c
./board/logicpd/omap3som/omap3logic.c
./board/logicpd/zoom1/zoom1.c
./board/timll/devkit8000/devkit8000.c
./board/lg/sniper/sniper.c
./board/ti/beagle/beagle.c
./drivers/serial/serial_rockchip.c
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Tested-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
diff --git a/arch/arm/mach-omap2/am33xx/board.c b/arch/arm/mach-omap2/am33xx/board.c
index 73824df..190310f 100644
--- a/arch/arm/mach-omap2/am33xx/board.c
+++ b/arch/arm/mach-omap2/am33xx/board.c
@@ -40,14 +40,20 @@
#if !CONFIG_IS_ENABLED(OF_CONTROL)
static const struct ns16550_platdata am33xx_serial[] = {
- { .base = CONFIG_SYS_NS16550_COM1, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK },
+ { .base = CONFIG_SYS_NS16550_COM1, .reg_shift = 2,
+ .clock = CONFIG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, },
# ifdef CONFIG_SYS_NS16550_COM2
- { .base = CONFIG_SYS_NS16550_COM2, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK },
+ { .base = CONFIG_SYS_NS16550_COM2, .reg_shift = 2,
+ .clock = CONFIG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, },
# ifdef CONFIG_SYS_NS16550_COM3
- { .base = CONFIG_SYS_NS16550_COM3, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK },
- { .base = CONFIG_SYS_NS16550_COM4, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK },
- { .base = CONFIG_SYS_NS16550_COM5, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK },
- { .base = CONFIG_SYS_NS16550_COM6, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK },
+ { .base = CONFIG_SYS_NS16550_COM3, .reg_shift = 2,
+ .clock = CONFIG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, },
+ { .base = CONFIG_SYS_NS16550_COM4, .reg_shift = 2,
+ .clock = CONFIG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, },
+ { .base = CONFIG_SYS_NS16550_COM5, .reg_shift = 2,
+ .clock = CONFIG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, },
+ { .base = CONFIG_SYS_NS16550_COM6, .reg_shift = 2,
+ .clock = CONFIG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, },
# endif
# endif
};