| commit | b5e9b296251f138ef9f9cfc15f408710a24831cd | [log] [tgz] |
|---|---|---|
| author | Marek Vasut <marex@denx.de> | Mon Sep 15 01:45:14 2014 +0200 |
| committer | Marek Vasut <marex@denx.de> | Mon Oct 06 17:46:50 2014 +0200 |
| tree | f2ea633bcc66ea69c6c5520ded9ccd916e295838 | |
| parent | 40e7bcdee72830fa51d9e98428f1a61f9126527e [diff] |
arm: socfpga: cache: Enable PL310 L2 cache Enable the PL310 L2 cache controller support for the SoCFPGA. With the cache related issues resolved, this is safe to be done. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Pavel Machek <pavel@denx.de> Acked-by: Pavel Machek <pavel@denx.de>