commit 1acb70393f2719c70d92f52d91be2525fa1db679
author Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Fri Jul 15 19:31:16 2022 +0530
committer Michal Simek <michal.simek@amd.com> Tue Jul 26 09:34:21 2022 +0200
tree f41d40ea9c4f885f6787cecd8c217bf94faa85ff
parent 557832bd88351ffc0b8e43720b98700fe74f68b2

spi: zynq_qspi: Add child pre probe function

Add child pre probe function in the driver. Update max_hz of priv from
spi_slave structure.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/1657893679-20039-2-git-send-email-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>

drivers/spi/zynq_qspi.c

diff --git a/drivers/spi/zynq_qspi.c b/drivers/spi/zynq_qspi.c
index b69d992..066a0c6 100644
--- a/drivers/spi/zynq_qspi.c
+++ b/drivers/spi/zynq_qspi.c
@@ -94,6 +94,7 @@
 	u8 mode;
 	u8 fifo_depth;
 	u32 freq;		/* required frequency */
+	u32 max_hz;
 	const void *tx_buf;
 	void *rx_buf;
 	unsigned len;
@@ -174,6 +175,16 @@
 	writel(ZYNQ_QSPI_ENR_SPI_EN_MASK, &regs->enr);
 }
 
+static int zynq_qspi_child_pre_probe(struct udevice *bus)
+{
+	struct spi_slave *slave = dev_get_parent_priv(bus);
+	struct zynq_qspi_priv *priv = dev_get_priv(bus->parent);
+
+	priv->max_hz = slave->max_hz;
+
+	return 0;
+}
+
 static int zynq_qspi_probe(struct udevice *bus)
 {
 	struct zynq_qspi_plat *plat = dev_get_plat(bus);
@@ -746,4 +757,5 @@
 	.plat_auto	= sizeof(struct zynq_qspi_plat),
 	.priv_auto	= sizeof(struct zynq_qspi_priv),
 	.probe  = zynq_qspi_probe,
+	.child_pre_probe = zynq_qspi_child_pre_probe,
 };