Merge patch series "arm: Add Analog Devices SC5xx Machine Type"
Greg Malysa <greg.malysa@timesys.com> says:
This series adds support for the ADI SC5xx machine type and includes two
core drivers that are required for being able to boot any board--a UART
driver, the gptimer driver which is used as a clock reference (CNTVCNT
is not supported on the armv7 sc5xx SoCs) and the clock tree driver. Our
corresponding Linux support relies on u-boot configuring the clocks
correctly before booting, so it is not possible to boot any board
without the CGU/CDU configuration happening here. There are also no
board files, device trees, or defconfigs included here, but some common
definitions that will be used to build board files currently are. The
sc5xx SoCs themselves include many armv7 families (sc57x, sc58x, and
sc594) all using an ARM Cortex-A5, and one armv8 family (sc598) indended
to be a drop-in replacement for the SC594 in terms of peripherals, with
a Cortex-A55 instead.
Some of the configuration code in dmcinit and clkinit is quite scary and
causes a lot of checkpatch violations. It is modified from code
initially provided by ADI, but it has not been fully rewritten. There's
a question of how important it is to clean up this code--it has some
quality violations, but it has been in use (including in production) for
over two years and is known to work for performing the low level SoC
initialization, while a rewrite might introduce timing or sequence bugs
that could take a significant amount of time to detect in the future.
diff --git a/.gitignore b/.gitignore
index d9a64d7..37f71c2 100644
--- a/.gitignore
+++ b/.gitignore
@@ -10,6 +10,7 @@
*.a
*.asn1.[ch]
*.bin
+*.bin[_.]*
*.cfgout
*.cover
*.dtb
@@ -17,23 +18,27 @@
*.dtb.S
*.elf
*.exe
+*.fit
*.gcda
*.gcno
*.i
*.img
+*.itb
*.lex.c
*.lst
+*.map
*.mod.c
*.mbx
*.o
*.o.*
*.order
*.patch
+*.pem
*.s
*.su
*.swp
*.tab.[ch]
-
+*.ti-*
# Build tree
/build*
@@ -64,6 +69,10 @@
/tpl/
/defconfig
/generated_defconfig
+/Test*
+/capsule.*.efi-capsule
+/capsule*.map
+/keep-syms-lto.*
#
# Generated include files
diff --git a/.mailmap b/.mailmap
index 59f8471..8049856 100644
--- a/.mailmap
+++ b/.mailmap
@@ -15,6 +15,7 @@
# Proper Name <proper@email.xx> <commit@email.xx>
# Proper Name <proper@email.xx> Commit Name <commit@email.xx>
+AKASHI Takahiro <akashi.tkhro@gmail.com> <takahiro.akashi@linaro.org>
Alexander Graf <agraf@csgraf.de> <agraf@suse.de>
Allen Martin <amartin@nvidia.com>
Amanda Baze <amanda.baze@amd.com> <nicole.baze@xilinx.com>
@@ -30,6 +31,7 @@
Bharat Kumar Gogada <bharat.kumar.gogada@amd.com> <bharat.kumar.gogada@xilinx.com>
Bharat Kumar Gogada <bharat.kumar.gogada@amd.com> <bharatku@xilinx.com>
Bhargava Sreekantappa Gayathri <bhargava.sreekantappa-gayathri@amd.com> <bhargava.sreekantappa-gayathri@xilinx.com>
+Bhupesh Sharma <bhupesh.linux@gmail.com> <bhupesh.sharma@linaro.org>
Bin Meng <bmeng.cn@gmail.com> <bin.meng@windriver.com>
Boris Brezillon <bbrezillon@kernel.org> <boris.brezillon@bootlin.com>
Boris Brezillon <bbrezillon@kernel.org> <boris.brezillon@free-electrons.com>
diff --git a/Kconfig b/Kconfig
index 75f9563..82df59f 100644
--- a/Kconfig
+++ b/Kconfig
@@ -715,6 +715,20 @@
A static value for the CPU frequency. Note that if not required
for a given SoC, this can be left at 0.
+config HAS_LDR
+ bool
+ help
+ Enables building .ldr targets for U-Boot and SPL. This does not
+ automatically build any additional targets with make or buildman.
+
+config LDR_CPU
+ string "CPU name to be passed to LDR utility."
+ depends on HAS_LDR
+ help
+ Set the CPU name for the -T parameter in the LDR utility. This is
+ generally used on processors from Analog Devices, but may be also
+ be useful for other vendors.
+
source "api/Kconfig"
endmenu # General setup
diff --git a/MAINTAINERS b/MAINTAINERS
index 71b6d15..6853288 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -224,7 +224,6 @@
M: Anand Gore <anand.gore@broadcom.com>
M: William Zhang <william.zhang@broadcom.com>
M: Kursad Oney <kursad.oney@broadcom.com>
-M: Joel Peshkin <joel.peshkin@broadcom.com>
M: Philippe Reynes <philippe.reynes@softathome.com>
S: Maintained
F: arch/arm/mach-bcmbca/
@@ -619,11 +618,9 @@
M: Caleb Connolly <caleb.connolly@linaro.org>
M: Neil Armstrong <neil.armstrong@linaro.org>
R: Sumit Garg <sumit.garg@linaro.org>
+L: u-boot-qcom@groups.io
S: Maintained
-F: arch/arm/dts/msm8*.dtsi
-F: arch/arm/dts/pm8???.dtsi
-F: arch/arm/dts/pms405.dtsi
-F: arch/arm/dts/sdm845.dtsi
+T: git https://source.denx.de/u-boot/custodians/u-boot-snapdragon.git
F: drivers/*/*/pm8???-*
F: drivers/gpio/msm_gpio.c
F: drivers/mmc/msm_sdhci.c
@@ -1586,7 +1583,7 @@
F: test/py/tests/test_fs/test_squashfs/
STACKPROTECTOR
-M: Joel Peshkin <joel.peshkin@broadcom.com>
+M: William Zhang <william.zhang@broadcom.com>
S: Maintained
F: common/stackprot.c
F: cmd/stackprot_test.c
@@ -1658,9 +1655,18 @@
M: Ilias Apalodimas <ilias.apalodimas@linaro.org>
T: git https://source.denx.de/u-boot/custodians/u-boot-tpm.git
S: Maintained
+F: cmd/optee*
+F: doc/README.tee
+F: doc/device-tree-bindings/firmware/linaro,optee-tz.txt
+F: drivers/firmware/scmi/optee_agent.c
F: drivers/tee/
+F: include/sandboxtee.h
F: include/tee.h
F: include/tee/
+F: include/test/optee.h
+F: test/dm/tee.c
+F: test/optee/
+F: test/py/tests/test_optee_rpmb.py
TEE-lib
M: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
diff --git a/Makefile b/Makefile
index 5d28595..44deb33 100644
--- a/Makefile
+++ b/Makefile
@@ -1,9 +1,9 @@
# SPDX-License-Identifier: GPL-2.0+
VERSION = 2024
-PATCHLEVEL = 04
+PATCHLEVEL = 07
SUBLEVEL =
-EXTRAVERSION =
+EXTRAVERSION = -rc2
NAME =
# *DOCUMENTATION*
@@ -717,7 +717,7 @@
endif
ifdef CONFIG_CC_OPTIMIZE_FOR_DEBUG
-KBUILD_CFLAGS += -Og -Wno-maybe-uninitialized
+KBUILD_CFLAGS += -Og
# Avoid false positives -Wmaybe-uninitialized
# https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78394
KBUILD_CFLAGS += -Wno-maybe-uninitialized
@@ -1360,7 +1360,7 @@
u-boot.ldr: u-boot
$(CREATE_LDR_ENV)
- $(LDR) -T $(CONFIG_CPU) -c $@ $< $(LDR_FLAGS)
+ $(LDR) -T $(CONFIG_LDR_CPU) -c $@ $< $(LDR_FLAGS)
$(BOARD_SIZE_CHECK)
# binman
@@ -1963,6 +1963,7 @@
echo \#define U_BOOT_VERSION_NUM $(VERSION); \
echo \#define U_BOOT_VERSION_NUM_PATCH $$(echo $(PATCHLEVEL) | \
sed -e "s/^0*//"); \
+ echo \#define HOST_ARCH $(HOST_ARCH); \
echo \#define CC_VERSION_STRING \"$$(LC_ALL=C $(CC) --version | head -n 1)\"; \
echo \#define LD_VERSION_STRING \"$$(LC_ALL=C $(LD) --version | head -n 1)\"; )
endef
@@ -2199,7 +2200,8 @@
mkimage-out.spl.mkimage mkimage.spl.mkimage imx-boot.map \
itb.fit.fit itb.fit.itb itb.map spl.map mkimage-out.rom.mkimage \
mkimage.rom.mkimage mkimage-in-simple-bin* rom.map simple-bin* \
- idbloader-spi.img lib/efi_loader/helloworld_efi.S *.itb
+ idbloader-spi.img lib/efi_loader/helloworld_efi.S *.itb \
+ Test* capsule.*.efi-capsule capsule*.map
# Directories & files removed with 'make mrproper'
MRPROPER_DIRS += include/config include/generated spl tpl vpl \
diff --git a/api/api.c b/api/api.c
index 89003c1..d22132f 100644
--- a/api/api.c
+++ b/api/api.c
@@ -7,11 +7,13 @@
#include <config.h>
#include <command.h>
-#include <common.h>
#include <env.h>
#include <malloc.h>
+#include <time.h>
#include <env_internal.h>
+#include <vsprintf.h>
#include <linux/delay.h>
+#include <linux/errno.h>
#include <linux/types.h>
#include <api_public.h>
#include <u-boot/crc.h>
diff --git a/api/api_display.c b/api/api_display.c
index 2e877a8..8fd078c 100644
--- a/api/api_display.c
+++ b/api/api_display.c
@@ -3,9 +3,9 @@
* Copyright (c) 2011 The Chromium OS Authors.
*/
-#include <common.h>
#include <api_public.h>
#include <log.h>
+#include <linux/types.h>
/* TODO(clchiou): add support of video device */
diff --git a/api/api_net.c b/api/api_net.c
index 7515c26..264ff53 100644
--- a/api/api_net.c
+++ b/api/api_net.c
@@ -6,7 +6,6 @@
*/
#include <config.h>
-#include <common.h>
#include <net.h>
#include <linux/types.h>
#include <api_public.h>
diff --git a/api/api_platform-arm.c b/api/api_platform-arm.c
index 6cfd9e6..9afba66 100644
--- a/api/api_platform-arm.c
+++ b/api/api_platform-arm.c
@@ -12,7 +12,6 @@
#include <linux/types.h>
#include <api_public.h>
-#include <asm/u-boot.h>
#include <asm/global_data.h>
#include "api_private.h"
diff --git a/api/api_platform-mips.c b/api/api_platform-mips.c
index e150966..262b35a 100644
--- a/api/api_platform-mips.c
+++ b/api/api_platform-mips.c
@@ -9,7 +9,6 @@
#include <linux/types.h>
#include <api_public.h>
-#include <asm/u-boot.h>
#include <asm/global_data.h>
#include "api_private.h"
diff --git a/api/api_platform-powerpc.c b/api/api_platform-powerpc.c
index 847a4a3..3a04a9f 100644
--- a/api/api_platform-powerpc.c
+++ b/api/api_platform-powerpc.c
@@ -12,7 +12,6 @@
#include <linux/types.h>
#include <api_public.h>
-#include <asm/u-boot.h>
#include <asm/global_data.h>
#include "api_private.h"
diff --git a/api/api_storage.c b/api/api_storage.c
index 78becbe..3d2d9d6 100644
--- a/api/api_storage.c
+++ b/api/api_storage.c
@@ -6,10 +6,10 @@
*/
#include <config.h>
-#include <common.h>
#include <api_public.h>
#include <part.h>
#include <scsi.h>
+#include <linux/types.h>
#if defined(CONFIG_CMD_USB) && defined(CONFIG_USB_STORAGE)
#include <usb.h>
diff --git a/arch/Kconfig b/arch/Kconfig
index f9aaf37..abd406d 100644
--- a/arch/Kconfig
+++ b/arch/Kconfig
@@ -254,7 +254,6 @@
imply CMD_PCI
imply CMD_SF
imply CMD_SF_TEST
- imply CMD_ZBOOT
imply DM_GPIO
imply DM_KEYBOARD
imply DM_MMC
diff --git a/arch/arc/include/asm/global_data.h b/arch/arc/include/asm/global_data.h
index e35a26f..fd9b7fb 100644
--- a/arch/arc/include/asm/global_data.h
+++ b/arch/arc/include/asm/global_data.h
@@ -6,6 +6,8 @@
#ifndef __ASM_ARC_GLOBAL_DATA_H
#define __ASM_ARC_GLOBAL_DATA_H
+#include <asm/u-boot.h>
+
#ifndef __ASSEMBLY__
/* Architecture-specific global data */
struct arch_global_data {
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index ded35cb..8d46707 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -762,10 +762,8 @@
select DM_SERIAL
select DM_RESET
select GPIO_EXTRA_HEADER
- select MSM_SMEM
select PINCTRL
select CLK
- select SMEM
select OF_CONTROL
select CLK_QCOM_IPQ4019
select PINCTRL_QCOM_IPQ4019
@@ -1022,7 +1020,7 @@
select USB
imply CMD_DM
imply CMD_GPT
- imply DISTRO_DEFAULTS
+ imply BOOTSTD_FULL
imply OF_HAS_PRIOR_STAGE
config ARCH_OWL
@@ -1068,6 +1066,7 @@
imply BOARD_EARLY_INIT_F
imply CMD_DM
imply FAT_WRITE
+ imply OF_UPSTREAM
imply SYS_THUMB_BUILD
imply ARCH_MISC_INIT if DISPLAY_CPUINFO
@@ -1078,6 +1077,7 @@
select DM_GPIO
select DM_SERIAL
select DM_RESET
+ select POWER_DOMAIN
select GPIO_EXTRA_HEADER
select MSM_SMEM
select OF_CONTROL
@@ -1087,7 +1087,8 @@
select BOARD_LATE_INIT
select OF_BOARD
select SAVE_PREV_BL_FDT_ADDR
- select LINUX_KERNEL_IMAGE_HEADER
+ select LINUX_KERNEL_IMAGE_HEADER if !ENABLE_ARM_SOC_BOOT0_HOOK
+ imply OF_UPSTREAM
imply CMD_DM
config ARCH_SOCFPGA
@@ -1320,6 +1321,14 @@
select SPL_DM_SPI_FLASH if SPL_DM_SPI
select SPL_DM_MAILBOX if SPL
imply SPL_FIRMWARE if SPL
+ imply SPL_FS_FAT if SPL
+ imply SPL_LIBCOMMON_SUPPORT if SPL
+ imply SPL_LIBDISK_SUPPORT if SPL
+ imply SPL_LIBGENERIC_SUPPORT if SPL
+ imply SPL_MMC if SPL && MMC_SDHCI_ZYNQ
+ imply SPL_SERIAL if SPL
+ imply SPL_SPI if SPL && ZYNQ_QSPI
+ imply SPL_SPI_FLASH_SUPPORT if SPL && ZYNQ_QSPI
select SPL_SEPARATE_BSS if SPL
select SUPPORT_SPL
imply ZYNQMP_IPI if DM_MAILBOX
@@ -1335,7 +1344,7 @@
config ARCH_TEGRA
bool "NVIDIA Tegra"
select GPIO_EXTRA_HEADER
- imply DISTRO_DEFAULTS
+ imply BOOTSTD_DEFAULTS
imply FAT_WRITE
imply SPL_TIMER if SPL
diff --git a/arch/arm/cpu/arm11/cpu.c b/arch/arm/cpu/arm11/cpu.c
index 1e16b89..01d2e1a 100644
--- a/arch/arm/cpu/arm11/cpu.c
+++ b/arch/arm/cpu/arm11/cpu.c
@@ -14,7 +14,6 @@
* CPU specific code
*/
-#include <common.h>
#include <command.h>
#include <cpu_func.h>
#include <irq_func.h>
diff --git a/arch/arm/cpu/arm1136/mx31/devices.c b/arch/arm/cpu/arm1136/mx31/devices.c
index 9997e8f..87ca303 100644
--- a/arch/arm/cpu/arm1136/mx31/devices.c
+++ b/arch/arm/cpu/arm1136/mx31/devices.c
@@ -6,7 +6,6 @@
* (c) 2007 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de>
*/
-#include <common.h>
#include <asm/arch/imx-regs.h>
#include <asm/arch/clock.h>
diff --git a/arch/arm/cpu/arm1136/mx31/generic.c b/arch/arm/cpu/arm1136/mx31/generic.c
index a3d4f14..fc56bac 100644
--- a/arch/arm/cpu/arm1136/mx31/generic.c
+++ b/arch/arm/cpu/arm1136/mx31/generic.c
@@ -4,7 +4,6 @@
* Sascha Hauer, Pengutronix
*/
-#include <common.h>
#include <div64.h>
#include <init.h>
#include <asm/arch/imx-regs.h>
diff --git a/arch/arm/cpu/arm1136/mx31/timer.c b/arch/arm/cpu/arm1136/mx31/timer.c
index a913860..b41ca68 100644
--- a/arch/arm/cpu/arm1136/mx31/timer.c
+++ b/arch/arm/cpu/arm1136/mx31/timer.c
@@ -4,7 +4,6 @@
* Sascha Hauer, Pengutronix
*/
-#include <common.h>
#include <init.h>
#include <asm/arch/imx-regs.h>
#include <asm/io.h>
diff --git a/arch/arm/cpu/arm720t/interrupts.c b/arch/arm/cpu/arm720t/interrupts.c
index f0fc58d..e3d0216 100644
--- a/arch/arm/cpu/arm720t/interrupts.c
+++ b/arch/arm/cpu/arm720t/interrupts.c
@@ -9,7 +9,7 @@
* Alex Zuepke <azu@sysgo.de>
*/
-#include <common.h>
+#include <linux/types.h>
#if defined(CONFIG_ARCH_TEGRA)
static ulong timestamp;
diff --git a/arch/arm/cpu/arm920t/cpu.c b/arch/arm/cpu/arm920t/cpu.c
index 305713e..61e1823 100644
--- a/arch/arm/cpu/arm920t/cpu.c
+++ b/arch/arm/cpu/arm920t/cpu.c
@@ -12,7 +12,6 @@
* CPU specific code
*/
-#include <common.h>
#include <command.h>
#include <cpu_func.h>
#include <irq_func.h>
diff --git a/arch/arm/cpu/arm920t/start.S b/arch/arm/cpu/arm920t/start.S
index cba4a1f..e792e8e 100644
--- a/arch/arm/cpu/arm920t/start.S
+++ b/arch/arm/cpu/arm920t/start.S
@@ -8,7 +8,6 @@
*/
#include <asm-offsets.h>
-#include <common.h>
#include <config.h>
/*
diff --git a/arch/arm/cpu/arm926ejs/cache.c b/arch/arm/cpu/arm926ejs/cache.c
index 95963d2..5b87a3a 100644
--- a/arch/arm/cpu/arm926ejs/cache.c
+++ b/arch/arm/cpu/arm926ejs/cache.c
@@ -6,7 +6,6 @@
#include <cpu_func.h>
#include <asm/cache.h>
#include <linux/types.h>
-#include <common.h>
#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
void invalidate_dcache_all(void)
diff --git a/arch/arm/cpu/arm926ejs/cpu.c b/arch/arm/cpu/arm926ejs/cpu.c
index 2ce413a..07ab04b 100644
--- a/arch/arm/cpu/arm926ejs/cpu.c
+++ b/arch/arm/cpu/arm926ejs/cpu.c
@@ -12,7 +12,6 @@
* CPU specific code
*/
-#include <common.h>
#include <command.h>
#include <cpu_func.h>
#include <irq_func.h>
diff --git a/arch/arm/cpu/arm926ejs/mxs/clock.c b/arch/arm/cpu/arm926ejs/mxs/clock.c
index 4e1cf3a..58f6cf8 100644
--- a/arch/arm/cpu/arm926ejs/mxs/clock.c
+++ b/arch/arm/cpu/arm926ejs/mxs/clock.c
@@ -9,7 +9,6 @@
* Copyright (C) 2010 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <log.h>
#include <linux/errno.h>
#include <asm/io.h>
diff --git a/arch/arm/cpu/arm926ejs/mxs/iomux.c b/arch/arm/cpu/arm926ejs/mxs/iomux.c
index 381264b..851b4de 100644
--- a/arch/arm/cpu/arm926ejs/mxs/iomux.c
+++ b/arch/arm/cpu/arm926ejs/mxs/iomux.c
@@ -6,7 +6,6 @@
* <armlinux@phytec.de>
*/
-#include <common.h>
#include <linux/errno.h>
#include <asm/io.h>
#include <asm/arch/clock.h>
diff --git a/arch/arm/cpu/arm926ejs/mxs/mxs.c b/arch/arm/cpu/arm926ejs/mxs/mxs.c
index 4f3cb63..7b2bb09 100644
--- a/arch/arm/cpu/arm926ejs/mxs/mxs.c
+++ b/arch/arm/cpu/arm926ejs/mxs/mxs.c
@@ -9,7 +9,6 @@
* Copyright (C) 2010 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <command.h>
#include <cpu_func.h>
#include <hang.h>
diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
index 249f8de..76a69d7 100644
--- a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
+++ b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
@@ -6,7 +6,6 @@
* on behalf of DENX Software Engineering GmbH
*/
-#include <common.h>
#include <config.h>
#include <init.h>
#include <log.h>
diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_lradc_init.c b/arch/arm/cpu/arm926ejs/mxs/spl_lradc_init.c
index 2cfbd78..b2d3b2b 100644
--- a/arch/arm/cpu/arm926ejs/mxs/spl_lradc_init.c
+++ b/arch/arm/cpu/arm926ejs/mxs/spl_lradc_init.c
@@ -6,7 +6,6 @@
* on behalf of DENX Software Engineering GmbH
*/
-#include <common.h>
#include <config.h>
#include <log.h>
#include <asm/io.h>
diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
index a94803e..c3136dd 100644
--- a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
+++ b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
@@ -6,7 +6,6 @@
* on behalf of DENX Software Engineering GmbH
*/
-#include <common.h>
#include <config.h>
#include <init.h>
#include <log.h>
diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c b/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c
index 77bca7e..8b65c09 100644
--- a/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c
+++ b/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c
@@ -6,7 +6,6 @@
* on behalf of DENX Software Engineering GmbH
*/
-#include <common.h>
#include <config.h>
#include <hang.h>
#include <log.h>
diff --git a/arch/arm/cpu/arm926ejs/mxs/start.S b/arch/arm/cpu/arm926ejs/mxs/start.S
index 61982e3..a6eb053 100644
--- a/arch/arm/cpu/arm926ejs/mxs/start.S
+++ b/arch/arm/cpu/arm926ejs/mxs/start.S
@@ -20,7 +20,6 @@
#include <asm-offsets.h>
#include <config.h>
-#include <common.h>
#include <system-constants.h>
/*
diff --git a/arch/arm/cpu/arm926ejs/mxs/timer.c b/arch/arm/cpu/arm926ejs/mxs/timer.c
index 3dff3d7..cbd3b5d 100644
--- a/arch/arm/cpu/arm926ejs/mxs/timer.c
+++ b/arch/arm/cpu/arm926ejs/mxs/timer.c
@@ -9,7 +9,6 @@
* (C) Copyright 2009-2010 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <init.h>
#include <time.h>
#include <asm/global_data.h>
diff --git a/arch/arm/cpu/arm926ejs/start.S b/arch/arm/cpu/arm926ejs/start.S
index c882bd3..5d6c9f0 100644
--- a/arch/arm/cpu/arm926ejs/start.S
+++ b/arch/arm/cpu/arm926ejs/start.S
@@ -16,7 +16,6 @@
#include <asm-offsets.h>
#include <config.h>
-#include <common.h>
#include <linux/linkage.h>
/*
diff --git a/arch/arm/cpu/arm946es/cpu.c b/arch/arm/cpu/arm946es/cpu.c
index 334bb54..efd232d 100644
--- a/arch/arm/cpu/arm946es/cpu.c
+++ b/arch/arm/cpu/arm946es/cpu.c
@@ -12,7 +12,6 @@
* CPU specific code
*/
-#include <common.h>
#include <command.h>
#include <cpu_func.h>
#include <irq_func.h>
diff --git a/arch/arm/cpu/armv7/arch_timer.c b/arch/arm/cpu/armv7/arch_timer.c
index 17bd53d..f25a867 100644
--- a/arch/arm/cpu/armv7/arch_timer.c
+++ b/arch/arm/cpu/armv7/arch_timer.c
@@ -4,7 +4,7 @@
* Texas Instruments Incorporated, <www.ti.com>
*/
-#include <common.h>
+#include <config.h>
#include <init.h>
#include <time.h>
#include <asm/global_data.h>
diff --git a/arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c b/arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c
index 39217c5..7f73f89 100644
--- a/arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c
+++ b/arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c
@@ -9,7 +9,6 @@
*
*/
-#include <common.h>
#include <asm/io.h>
#include <linux/errno.h>
#include <asm/arch/sysmap.h>
diff --git a/arch/arm/cpu/armv7/bcm235xx/clk-bsc.c b/arch/arm/cpu/armv7/bcm235xx/clk-bsc.c
index 1b3f36a..55dcc2f 100644
--- a/arch/arm/cpu/armv7/bcm235xx/clk-bsc.c
+++ b/arch/arm/cpu/armv7/bcm235xx/clk-bsc.c
@@ -3,7 +3,6 @@
* Copyright 2013 Broadcom Corporation.
*/
-#include <common.h>
#include <asm/io.h>
#include <linux/errno.h>
#include <asm/arch/sysmap.h>
diff --git a/arch/arm/cpu/armv7/bcm235xx/clk-core.c b/arch/arm/cpu/armv7/bcm235xx/clk-core.c
index d7edefe..b769c45 100644
--- a/arch/arm/cpu/armv7/bcm235xx/clk-core.c
+++ b/arch/arm/cpu/armv7/bcm235xx/clk-core.c
@@ -9,7 +9,6 @@
*
*/
-#include <common.h>
#include <log.h>
#include <asm/io.h>
#include <linux/delay.h>
diff --git a/arch/arm/cpu/armv7/bcm235xx/clk-eth.c b/arch/arm/cpu/armv7/bcm235xx/clk-eth.c
index 209ceca..5f7cc4a 100644
--- a/arch/arm/cpu/armv7/bcm235xx/clk-eth.c
+++ b/arch/arm/cpu/armv7/bcm235xx/clk-eth.c
@@ -3,7 +3,6 @@
* Copyright 2014 Broadcom Corporation.
*/
-#include <common.h>
#include <asm/io.h>
#include <linux/delay.h>
#include <linux/errno.h>
diff --git a/arch/arm/cpu/armv7/bcm235xx/clk-sdio.c b/arch/arm/cpu/armv7/bcm235xx/clk-sdio.c
index f2ba354..f3ff29b 100644
--- a/arch/arm/cpu/armv7/bcm235xx/clk-sdio.c
+++ b/arch/arm/cpu/armv7/bcm235xx/clk-sdio.c
@@ -3,7 +3,6 @@
* Copyright 2013 Broadcom Corporation.
*/
-#include <common.h>
#include <asm/io.h>
#include <linux/errno.h>
#include <asm/arch/sysmap.h>
diff --git a/arch/arm/cpu/armv7/bcm235xx/clk-usb-otg.c b/arch/arm/cpu/armv7/bcm235xx/clk-usb-otg.c
index f604aec..8791805 100644
--- a/arch/arm/cpu/armv7/bcm235xx/clk-usb-otg.c
+++ b/arch/arm/cpu/armv7/bcm235xx/clk-usb-otg.c
@@ -3,7 +3,6 @@
* Copyright 2014 Broadcom Corporation.
*/
-#include <common.h>
#include <linux/errno.h>
#include <asm/arch/sysmap.h>
#include "clk-core.h"
diff --git a/arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c b/arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c
index 8f6260e..b258fea 100644
--- a/arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c
+++ b/arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c
@@ -9,7 +9,6 @@
*
*/
-#include <common.h>
#include <asm/io.h>
#include <linux/errno.h>
#include <asm/arch/sysmap.h>
diff --git a/arch/arm/cpu/armv7/bcm281xx/clk-bsc.c b/arch/arm/cpu/armv7/bcm281xx/clk-bsc.c
index 1b3f36a..55dcc2f 100644
--- a/arch/arm/cpu/armv7/bcm281xx/clk-bsc.c
+++ b/arch/arm/cpu/armv7/bcm281xx/clk-bsc.c
@@ -3,7 +3,6 @@
* Copyright 2013 Broadcom Corporation.
*/
-#include <common.h>
#include <asm/io.h>
#include <linux/errno.h>
#include <asm/arch/sysmap.h>
diff --git a/arch/arm/cpu/armv7/bcm281xx/clk-core.c b/arch/arm/cpu/armv7/bcm281xx/clk-core.c
index 26b673a..3f2e021 100644
--- a/arch/arm/cpu/armv7/bcm281xx/clk-core.c
+++ b/arch/arm/cpu/armv7/bcm281xx/clk-core.c
@@ -9,7 +9,6 @@
*
*/
-#include <common.h>
#include <log.h>
#include <asm/io.h>
#include <linux/delay.h>
diff --git a/arch/arm/cpu/armv7/bcm281xx/clk-eth.c b/arch/arm/cpu/armv7/bcm281xx/clk-eth.c
index 209ceca..5f7cc4a 100644
--- a/arch/arm/cpu/armv7/bcm281xx/clk-eth.c
+++ b/arch/arm/cpu/armv7/bcm281xx/clk-eth.c
@@ -3,7 +3,6 @@
* Copyright 2014 Broadcom Corporation.
*/
-#include <common.h>
#include <asm/io.h>
#include <linux/delay.h>
#include <linux/errno.h>
diff --git a/arch/arm/cpu/armv7/bcm281xx/clk-sdio.c b/arch/arm/cpu/armv7/bcm281xx/clk-sdio.c
index f2ba354..f3ff29b 100644
--- a/arch/arm/cpu/armv7/bcm281xx/clk-sdio.c
+++ b/arch/arm/cpu/armv7/bcm281xx/clk-sdio.c
@@ -3,7 +3,6 @@
* Copyright 2013 Broadcom Corporation.
*/
-#include <common.h>
#include <asm/io.h>
#include <linux/errno.h>
#include <asm/arch/sysmap.h>
diff --git a/arch/arm/cpu/armv7/bcm281xx/clk-usb-otg.c b/arch/arm/cpu/armv7/bcm281xx/clk-usb-otg.c
index f604aec..8791805 100644
--- a/arch/arm/cpu/armv7/bcm281xx/clk-usb-otg.c
+++ b/arch/arm/cpu/armv7/bcm281xx/clk-usb-otg.c
@@ -3,7 +3,6 @@
* Copyright 2014 Broadcom Corporation.
*/
-#include <common.h>
#include <linux/errno.h>
#include <asm/arch/sysmap.h>
#include "clk-core.h"
diff --git a/arch/arm/cpu/armv7/bcm281xx/reset.c b/arch/arm/cpu/armv7/bcm281xx/reset.c
index 1491e5c..87e4337 100644
--- a/arch/arm/cpu/armv7/bcm281xx/reset.c
+++ b/arch/arm/cpu/armv7/bcm281xx/reset.c
@@ -3,7 +3,6 @@
* Copyright 2013 Broadcom Corporation.
*/
-#include <common.h>
#include <cpu_func.h>
#include <asm/io.h>
#include <asm/arch/sysmap.h>
diff --git a/arch/arm/cpu/armv7/bcmcygnus/reset.c b/arch/arm/cpu/armv7/bcmcygnus/reset.c
index 63992fd..617c8d6 100644
--- a/arch/arm/cpu/armv7/bcmcygnus/reset.c
+++ b/arch/arm/cpu/armv7/bcmcygnus/reset.c
@@ -3,7 +3,6 @@
* Copyright 2014 Broadcom Corporation.
*/
-#include <common.h>
#include <cpu_func.h>
#include <asm/io.h>
diff --git a/arch/arm/cpu/armv7/bcmnsp/reset.c b/arch/arm/cpu/armv7/bcmnsp/reset.c
index a313775..c3be331 100644
--- a/arch/arm/cpu/armv7/bcmnsp/reset.c
+++ b/arch/arm/cpu/armv7/bcmnsp/reset.c
@@ -3,7 +3,6 @@
* Copyright 2014 Broadcom Corporation.
*/
-#include <common.h>
#include <cpu_func.h>
#include <asm/io.h>
diff --git a/arch/arm/cpu/armv7/cache_v7.c b/arch/arm/cpu/armv7/cache_v7.c
index 19ff432..d11420d 100644
--- a/arch/arm/cpu/armv7/cache_v7.c
+++ b/arch/arm/cpu/armv7/cache_v7.c
@@ -7,7 +7,6 @@
#include <cpu_func.h>
#include <asm/cache.h>
#include <linux/types.h>
-#include <common.h>
#include <asm/armv7.h>
#include <asm/utils.h>
diff --git a/arch/arm/cpu/armv7/cp15.c b/arch/arm/cpu/armv7/cp15.c
index 0ac4e7b..b2c52db 100644
--- a/arch/arm/cpu/armv7/cp15.c
+++ b/arch/arm/cpu/armv7/cp15.c
@@ -7,7 +7,6 @@
* CP15 specific code
*/
-#include <common.h>
#include <command.h>
#include <asm/system.h>
#include <asm/cache.h>
diff --git a/arch/arm/cpu/armv7/cpu.c b/arch/arm/cpu/armv7/cpu.c
index 6259ffa..aa981fa 100644
--- a/arch/arm/cpu/armv7/cpu.c
+++ b/arch/arm/cpu/armv7/cpu.c
@@ -14,7 +14,6 @@
* CPU specific code
*/
-#include <common.h>
#include <command.h>
#include <cpu_func.h>
#include <irq_func.h>
diff --git a/arch/arm/cpu/armv7/exception_level.c b/arch/arm/cpu/armv7/exception_level.c
index f6d25bb..7baade6 100644
--- a/arch/arm/cpu/armv7/exception_level.c
+++ b/arch/arm/cpu/armv7/exception_level.c
@@ -8,7 +8,6 @@
* secure mode before booting an operating system.
*/
-#include <common.h>
#include <bootm.h>
#include <cpu_func.h>
#include <log.h>
diff --git a/arch/arm/cpu/armv7/iproc-common/armpll.c b/arch/arm/cpu/armv7/iproc-common/armpll.c
index 8c3a323..b345671 100644
--- a/arch/arm/cpu/armv7/iproc-common/armpll.c
+++ b/arch/arm/cpu/armv7/iproc-common/armpll.c
@@ -3,7 +3,6 @@
* Copyright 2014 Broadcom Corporation.
*/
-#include <common.h>
#include <asm/io.h>
#include <asm/iproc-common/armpll.h>
#include <asm/iproc-common/sysmap.h>
diff --git a/arch/arm/cpu/armv7/iproc-common/hwinit-common.c b/arch/arm/cpu/armv7/iproc-common/hwinit-common.c
index 896d2f9..eca7e8b 100644
--- a/arch/arm/cpu/armv7/iproc-common/hwinit-common.c
+++ b/arch/arm/cpu/armv7/iproc-common/hwinit-common.c
@@ -3,7 +3,6 @@
* Copyright 2014 Broadcom Corporation.
*/
-#include <common.h>
#include <cpu_func.h>
#include <asm/cache.h>
diff --git a/arch/arm/cpu/armv7/iproc-common/timer.c b/arch/arm/cpu/armv7/iproc-common/timer.c
index a4255a4..b60d90f 100644
--- a/arch/arm/cpu/armv7/iproc-common/timer.c
+++ b/arch/arm/cpu/armv7/iproc-common/timer.c
@@ -3,7 +3,6 @@
* Copyright 2014 Broadcom Corporation.
*/
-#include <common.h>
#include <div64.h>
#include <init.h>
#include <time.h>
diff --git a/arch/arm/cpu/armv7/ls102xa/clock.c b/arch/arm/cpu/armv7/ls102xa/clock.c
index 4e1fe28..e885a85 100644
--- a/arch/arm/cpu/armv7/ls102xa/clock.c
+++ b/arch/arm/cpu/armv7/ls102xa/clock.c
@@ -3,7 +3,7 @@
* Copyright 2014 Freescale Semiconductor, Inc.
*/
-#include <common.h>
+#include <config.h>
#include <clock_legacy.h>
#include <asm/global_data.h>
#include <asm/io.h>
diff --git a/arch/arm/cpu/armv7/ls102xa/cpu.c b/arch/arm/cpu/armv7/ls102xa/cpu.c
index c455969..74a2dcb 100644
--- a/arch/arm/cpu/armv7/ls102xa/cpu.c
+++ b/arch/arm/cpu/armv7/ls102xa/cpu.c
@@ -4,7 +4,6 @@
* Copyright 2021 NXP
*/
-#include <common.h>
#include <cpu_func.h>
#include <init.h>
#include <net.h>
diff --git a/arch/arm/cpu/armv7/ls102xa/fdt.c b/arch/arm/cpu/armv7/ls102xa/fdt.c
index 1c3d24b..34eea22 100644
--- a/arch/arm/cpu/armv7/ls102xa/fdt.c
+++ b/arch/arm/cpu/armv7/ls102xa/fdt.c
@@ -3,7 +3,7 @@
* Copyright 2014 Freescale Semiconductor, Inc.
*/
-#include <common.h>
+#include <config.h>
#include <clock_legacy.h>
#include <net.h>
#include <asm/global_data.h>
diff --git a/arch/arm/cpu/armv7/ls102xa/fsl_epu.c b/arch/arm/cpu/armv7/ls102xa/fsl_epu.c
index e31a4fb..664eae5 100644
--- a/arch/arm/cpu/armv7/ls102xa/fsl_epu.c
+++ b/arch/arm/cpu/armv7/ls102xa/fsl_epu.c
@@ -3,7 +3,6 @@
* Copyright 2014 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <asm/io.h>
#include "fsl_epu.h"
diff --git a/arch/arm/cpu/armv7/ls102xa/fsl_ls1_serdes.c b/arch/arm/cpu/armv7/ls102xa/fsl_ls1_serdes.c
index f74d819..c1eadb3 100644
--- a/arch/arm/cpu/armv7/ls102xa/fsl_ls1_serdes.c
+++ b/arch/arm/cpu/armv7/ls102xa/fsl_ls1_serdes.c
@@ -3,7 +3,7 @@
* Copyright 2014 Freescale Semiconductor, Inc.
*/
-#include <common.h>
+#include <config.h>
#include <asm/arch/fsl_serdes.h>
#include <asm/arch/immap_ls102xa.h>
#include <linux/errno.h>
diff --git a/arch/arm/cpu/armv7/ls102xa/ls102xa_serdes.c b/arch/arm/cpu/armv7/ls102xa/ls102xa_serdes.c
index 8c030be..3032e26 100644
--- a/arch/arm/cpu/armv7/ls102xa/ls102xa_serdes.c
+++ b/arch/arm/cpu/armv7/ls102xa/ls102xa_serdes.c
@@ -3,7 +3,7 @@
* Copyright 2014 Freescale Semiconductor, Inc.
*/
-#include <common.h>
+#include <linux/kernel.h>
#include <asm/arch/fsl_serdes.h>
#include <asm/arch/immap_ls102xa.h>
diff --git a/arch/arm/cpu/armv7/ls102xa/soc.c b/arch/arm/cpu/armv7/ls102xa/soc.c
index 84d4ea3..7ff59ed 100644
--- a/arch/arm/cpu/armv7/ls102xa/soc.c
+++ b/arch/arm/cpu/armv7/ls102xa/soc.c
@@ -3,7 +3,7 @@
* Copyright 2015 Freescale Semiconductor, Inc.
*/
-#include <common.h>
+#include <config.h>
#include <log.h>
#include <asm/arch/clock.h>
#include <asm/io.h>
diff --git a/arch/arm/cpu/armv7/ls102xa/spl.c b/arch/arm/cpu/armv7/ls102xa/spl.c
index a194968..374de92 100644
--- a/arch/arm/cpu/armv7/ls102xa/spl.c
+++ b/arch/arm/cpu/armv7/ls102xa/spl.c
@@ -3,7 +3,6 @@
* Copyright 2014 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <spl.h>
u32 spl_boot_device(void)
diff --git a/arch/arm/cpu/armv7/ls102xa/timer.c b/arch/arm/cpu/armv7/ls102xa/timer.c
index c6126b1..6f32ced 100644
--- a/arch/arm/cpu/armv7/ls102xa/timer.c
+++ b/arch/arm/cpu/armv7/ls102xa/timer.c
@@ -3,7 +3,6 @@
* Copyright 2014 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <init.h>
#include <time.h>
#include <asm/global_data.h>
diff --git a/arch/arm/cpu/armv7/mpu_v7r.c b/arch/arm/cpu/armv7/mpu_v7r.c
index 1d31c63..2d83e4c 100644
--- a/arch/arm/cpu/armv7/mpu_v7r.c
+++ b/arch/arm/cpu/armv7/mpu_v7r.c
@@ -6,7 +6,6 @@
* Lokesh Vutla <lokeshvutla@ti.com>
*/
-#include <common.h>
#include <command.h>
#include <cpu_func.h>
#include <asm/armv7.h>
diff --git a/arch/arm/cpu/armv7/s5p-common/cpu_info.c b/arch/arm/cpu/armv7/s5p-common/cpu_info.c
index fb29209..4331dde 100644
--- a/arch/arm/cpu/armv7/s5p-common/cpu_info.c
+++ b/arch/arm/cpu/armv7/s5p-common/cpu_info.c
@@ -3,7 +3,6 @@
* Copyright (C) 2009 Samsung Electronics
* Minkyu Kang <mk7.kang@samsung.com>
*/
-#include <common.h>
#include <display_options.h>
#include <fdtdec.h>
#include <init.h>
diff --git a/arch/arm/cpu/armv7/s5p-common/pwm.c b/arch/arm/cpu/armv7/s5p-common/pwm.c
index 5068327..986b585 100644
--- a/arch/arm/cpu/armv7/s5p-common/pwm.c
+++ b/arch/arm/cpu/armv7/s5p-common/pwm.c
@@ -5,7 +5,7 @@
* Donghwa Lee <dh09.lee@samsung.com>
*/
-#include <common.h>
+#include <config.h>
#include <errno.h>
#include <asm/io.h>
#include <asm/arch/pwm.h>
diff --git a/arch/arm/cpu/armv7/s5p-common/sromc.c b/arch/arm/cpu/armv7/s5p-common/sromc.c
index 0fc1709..c0035fb 100644
--- a/arch/arm/cpu/armv7/s5p-common/sromc.c
+++ b/arch/arm/cpu/armv7/s5p-common/sromc.c
@@ -4,7 +4,7 @@
* Naveen Krishna Ch <ch.naveen@samsung.com>
*/
-#include <common.h>
+#include <config.h>
#include <asm/io.h>
#include <asm/arch/sromc.h>
diff --git a/arch/arm/cpu/armv7/s5p-common/timer.c b/arch/arm/cpu/armv7/s5p-common/timer.c
index 9d981cc..12994ec 100644
--- a/arch/arm/cpu/armv7/s5p-common/timer.c
+++ b/arch/arm/cpu/armv7/s5p-common/timer.c
@@ -6,7 +6,6 @@
* Minkyu Kang <mk7.kang@samsung.com>
*/
-#include <common.h>
#include <div64.h>
#include <init.h>
#include <time.h>
diff --git a/arch/arm/cpu/armv7/s5p4418/cpu.c b/arch/arm/cpu/armv7/s5p4418/cpu.c
index 8febfe5..27ffb45 100644
--- a/arch/arm/cpu/armv7/s5p4418/cpu.c
+++ b/arch/arm/cpu/armv7/s5p4418/cpu.c
@@ -4,7 +4,6 @@
* Hyunseok, Jung <hsjung@nexell.co.kr>
*/
-#include <common.h>
#include <command.h>
#include <asm/system.h>
#include <asm/cache.h>
diff --git a/arch/arm/cpu/armv7/sunxi/psci.c b/arch/arm/cpu/armv7/sunxi/psci.c
index 5cb8cfa..4c30f32 100644
--- a/arch/arm/cpu/armv7/sunxi/psci.c
+++ b/arch/arm/cpu/armv7/sunxi/psci.c
@@ -7,7 +7,6 @@
* which was based on code by Carl van Schaik <carl@ok-labs.com>.
*/
#include <config.h>
-#include <common.h>
#include <asm/cache.h>
#include <asm/arch/cpu.h>
diff --git a/arch/arm/cpu/armv7/sunxi/sram.c b/arch/arm/cpu/armv7/sunxi/sram.c
index 28ff6a1..bc25719 100644
--- a/arch/arm/cpu/armv7/sunxi/sram.c
+++ b/arch/arm/cpu/armv7/sunxi/sram.c
@@ -9,7 +9,6 @@
* SRAM init for older sunxi SoCs.
*/
-#include <common.h>
#include <init.h>
#include <asm/io.h>
#include <asm/arch/cpu.h>
diff --git a/arch/arm/cpu/armv7/syslib.c b/arch/arm/cpu/armv7/syslib.c
index 7e29636..f0eda1c 100644
--- a/arch/arm/cpu/armv7/syslib.c
+++ b/arch/arm/cpu/armv7/syslib.c
@@ -7,7 +7,6 @@
* Syed Mohammed Khasim <khasim@ti.com>
*/
-#include <common.h>
#include <asm/io.h>
/************************************************************
diff --git a/arch/arm/cpu/armv7/vf610/generic.c b/arch/arm/cpu/armv7/vf610/generic.c
index c23ddc1..e61ad7b 100644
--- a/arch/arm/cpu/armv7/vf610/generic.c
+++ b/arch/arm/cpu/armv7/vf610/generic.c
@@ -3,7 +3,6 @@
* Copyright 2013 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <clock_legacy.h>
#include <command.h>
#include <cpu_func.h>
diff --git a/arch/arm/cpu/armv7/vf610/timer.c b/arch/arm/cpu/armv7/vf610/timer.c
index a9c1a8f..7bae0b5 100644
--- a/arch/arm/cpu/armv7/vf610/timer.c
+++ b/arch/arm/cpu/armv7/vf610/timer.c
@@ -3,7 +3,6 @@
* Copyright 2013 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <init.h>
#include <time.h>
#include <asm/global_data.h>
diff --git a/arch/arm/cpu/armv7/virt-dt.c b/arch/arm/cpu/armv7/virt-dt.c
index c042248..5dc7ed5 100644
--- a/arch/arm/cpu/armv7/virt-dt.c
+++ b/arch/arm/cpu/armv7/virt-dt.c
@@ -15,7 +15,6 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
-#include <common.h>
#include <errno.h>
#include <log.h>
#include <stdio_dev.h>
diff --git a/arch/arm/cpu/armv7/virt-v7.c b/arch/arm/cpu/armv7/virt-v7.c
index 5ffeca1..8114993 100644
--- a/arch/arm/cpu/armv7/virt-v7.c
+++ b/arch/arm/cpu/armv7/virt-v7.c
@@ -8,7 +8,6 @@
* needed to enable ARMv7 virtualization for current hypervisors
*/
-#include <common.h>
#include <cpu_func.h>
#include <asm/armv7.h>
#include <asm/cache.h>
diff --git a/arch/arm/cpu/armv7m/cache.c b/arch/arm/cpu/armv7m/cache.c
index d1aecf6..b6d08b7 100644
--- a/arch/arm/cpu/armv7m/cache.c
+++ b/arch/arm/cpu/armv7m/cache.c
@@ -4,7 +4,6 @@
* Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics.
*/
-#include <common.h>
#include <cpu_func.h>
#include <errno.h>
#include <log.h>
diff --git a/arch/arm/cpu/armv7m/cpu.c b/arch/arm/cpu/armv7m/cpu.c
index 65427b5..b4440d3 100644
--- a/arch/arm/cpu/armv7m/cpu.c
+++ b/arch/arm/cpu/armv7m/cpu.c
@@ -7,7 +7,6 @@
* Kamil Lulko, <kamil.lulko@gmail.com>
*/
-#include <common.h>
#include <cpu_func.h>
#include <irq_func.h>
#include <asm/io.h>
diff --git a/arch/arm/cpu/armv7m/systick-timer.c b/arch/arm/cpu/armv7m/systick-timer.c
index c30af4f..d8fa4f0 100644
--- a/arch/arm/cpu/armv7m/systick-timer.c
+++ b/arch/arm/cpu/armv7m/systick-timer.c
@@ -21,7 +21,7 @@
* using CFG_SYS_HZ_CLOCK.
*/
-#include <common.h>
+#include <config.h>
#include <init.h>
#include <time.h>
#include <asm/global_data.h>
diff --git a/arch/arm/cpu/armv8/cache_v8.c b/arch/arm/cpu/armv8/cache_v8.c
index 6973340..d4c64f2 100644
--- a/arch/arm/cpu/armv8/cache_v8.c
+++ b/arch/arm/cpu/armv8/cache_v8.c
@@ -7,7 +7,6 @@
* Alexander Graf <agraf@suse.de>
*/
-#include <common.h>
#include <cpu_func.h>
#include <hang.h>
#include <log.h>
@@ -326,6 +325,8 @@
/* Going one level down */
if (pte_type(&table[i]) == PTE_TYPE_FAULT)
set_pte_table(&table[i], create_table());
+ else if (pte_type(&table[i]) != PTE_TYPE_TABLE)
+ split_block(&table[i], level);
next_table = (u64 *)(table[i] & GENMASK_ULL(47, PAGE_SHIFT));
next_size = min(map_size - (virt & (map_size - 1)), size);
diff --git a/arch/arm/cpu/armv8/cpu-dt.c b/arch/arm/cpu/armv8/cpu-dt.c
index 9bfe381..97667e6 100644
--- a/arch/arm/cpu/armv8/cpu-dt.c
+++ b/arch/arm/cpu/armv8/cpu-dt.c
@@ -3,7 +3,6 @@
* Copyright 2016 NXP Semiconductor, Inc.
*/
-#include <common.h>
#include <asm/cache.h>
#include <asm/psci.h>
#include <asm/system.h>
diff --git a/arch/arm/cpu/armv8/cpu.c b/arch/arm/cpu/armv8/cpu.c
index 3c7f36a..d568efa 100644
--- a/arch/arm/cpu/armv8/cpu.c
+++ b/arch/arm/cpu/armv8/cpu.c
@@ -10,7 +10,6 @@
* Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
*/
-#include <common.h>
#include <command.h>
#include <cpu_func.h>
#include <irq_func.h>
diff --git a/arch/arm/cpu/armv8/exception_level.c b/arch/arm/cpu/armv8/exception_level.c
index b119365..85c78f5 100644
--- a/arch/arm/cpu/armv8/exception_level.c
+++ b/arch/arm/cpu/armv8/exception_level.c
@@ -8,7 +8,6 @@
* level before booting an operating system.
*/
-#include <common.h>
#include <bootm.h>
#include <cpu_func.h>
#include <log.h>
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
index 12d3118..d2dbfdd 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
@@ -4,7 +4,7 @@
* Copyright 2014-2015 Freescale Semiconductor, Inc.
*/
-#include <common.h>
+#include <config.h>
#include <clock_legacy.h>
#include <cpu_func.h>
#include <env.h>
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
index 22ce699..ca6be36 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
@@ -4,7 +4,7 @@
* Copyright 2020-2021 NXP
*/
-#include <common.h>
+#include <config.h>
#include <clock_legacy.h>
#include <efi_loader.h>
#include <log.h>
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_serdes.c b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_serdes.c
index 1541dfb..78961d8 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_serdes.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_serdes.c
@@ -3,11 +3,12 @@
* Copyright 2015 Freescale Semiconductor, Inc.
*/
-#include <common.h>
+#include <config.h>
#include <log.h>
#include <asm/io.h>
#include <linux/delay.h>
#include <linux/errno.h>
+#include <linux/string.h>
#include <asm/arch/fsl_serdes.h>
#include <asm/arch/soc.h>
@@ -258,7 +259,7 @@
/* Wait for SVDD to stabilize */
udelay(100);
- /* For each PLL that’s not disabled via RCW */
+ /* For each PLL that's not disabled via RCW */
#ifdef CONFIG_SYS_FSL_SRDS_1
cfg_tmp = (cfg_rcw5 >> 22) & 0x3;
for (i = 0; i < 2 && !(cfg_tmp & (0x1 << (1 - i))); i++) {
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c
index 4455eb1..9a24d4b 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c
@@ -4,7 +4,7 @@
* Copyright 2019 NXP.
*/
-#include <common.h>
+#include <config.h>
#include <clock_legacy.h>
#include <cpu_func.h>
#include <asm/global_data.h>
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c
index c0efc34..b768790 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c
@@ -4,7 +4,7 @@
* Copyright 2014-2015 Freescale Semiconductor, Inc.
*/
-#include <common.h>
+#include <config.h>
#include <env.h>
#include <log.h>
#include <asm/io.h>
@@ -483,7 +483,7 @@
ret = -1;
}
- /* For each PLL that’s not disabled via RCW enable the SERDES */
+ /* For each PLL that's not disabled via RCW enable the SERDES */
#ifdef CONFIG_SYS_FSL_SRDS_1
cfg_tmp = cfg_rcwsrds1 & 0x3;
do_serdes_enable(cfg_tmp, serdes1_base);
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c
index 137778d..452246e 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c
@@ -6,7 +6,7 @@
* Derived from arch/power/cpu/mpc85xx/speed.c
*/
-#include <common.h>
+#include <config.h>
#include <clock_legacy.h>
#include <cpu_func.h>
#include <asm/global_data.h>
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/icid.c b/arch/arm/cpu/armv8/fsl-layerscape/icid.c
index c22e732..04ffefa 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/icid.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/icid.c
@@ -3,7 +3,7 @@
* Copyright 2018 NXP
*/
-#include <common.h>
+#include <config.h>
#include <linux/libfdt.h>
#include <fdt_support.h>
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls1012a_serdes.c b/arch/arm/cpu/armv8/fsl-layerscape/ls1012a_serdes.c
index 8d7beca..c0e5455 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/ls1012a_serdes.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/ls1012a_serdes.c
@@ -3,7 +3,7 @@
* Copyright 2016 Freescale Semiconductor, Inc.
*/
-#include <common.h>
+#include <config.h>
#include <asm/arch/fsl_serdes.h>
#include <asm/arch/immap_lsch2.h>
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls1028_ids.c b/arch/arm/cpu/armv8/fsl-layerscape/ls1028_ids.c
index 86a49b1..d48baa6 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/ls1028_ids.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/ls1028_ids.c
@@ -3,9 +3,9 @@
* Copyright 2019 NXP
*/
-#include <common.h>
#include <fdt_support.h>
#include <log.h>
+#include <asm/arch/stream_id_lsch3.h>
#include <asm/arch-fsl-layerscape/immap_lsch3.h>
#include <asm/arch-fsl-layerscape/fsl_icid.h>
#include <asm/arch-fsl-layerscape/fsl_portals.h>
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls1028a_serdes.c b/arch/arm/cpu/armv8/fsl-layerscape/ls1028a_serdes.c
index 80d2910..1b4eab3 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/ls1028a_serdes.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/ls1028a_serdes.c
@@ -3,7 +3,8 @@
* Copyright 2019 NXP
*/
-#include <common.h>
+#include <config.h>
+#include <linux/kernel.h>
#include <asm/arch/fsl_serdes.h>
struct serdes_config {
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls1043_ids.c b/arch/arm/cpu/armv8/fsl-layerscape/ls1043_ids.c
index e3c3fc6..ec80e42 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/ls1043_ids.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/ls1043_ids.c
@@ -3,11 +3,12 @@
* Copyright 2018 NXP
*/
-#include <common.h>
+#include <config.h>
#include <asm/arch-fsl-layerscape/immap_lsch2.h>
#include <asm/arch-fsl-layerscape/fsl_icid.h>
#include <asm/arch-fsl-layerscape/fsl_portals.h>
#include <fsl_sec.h>
+#include <asm/arch/stream_id_lsch3.h>
#ifdef CONFIG_SYS_DPAA_QBMAN
struct qportal_info qp_info[CFG_SYS_QMAN_NUM_PORTALS] = {
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls1043a_serdes.c b/arch/arm/cpu/armv8/fsl-layerscape/ls1043a_serdes.c
index 6c5e52e..1911ca1 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/ls1043a_serdes.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/ls1043a_serdes.c
@@ -3,7 +3,7 @@
* Copyright 2015 Freescale Semiconductor, Inc.
*/
-#include <common.h>
+#include <config.h>
#include <asm/arch/fsl_serdes.h>
#include <asm/arch/immap_lsch2.h>
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c b/arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c
index 333d7e2..a73dd31 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c
@@ -3,10 +3,11 @@
* Copyright 2018 NXP
*/
-#include <common.h>
+#include <config.h>
#include <asm/arch-fsl-layerscape/immap_lsch2.h>
#include <asm/arch-fsl-layerscape/fsl_icid.h>
#include <asm/arch-fsl-layerscape/fsl_portals.h>
+#include <asm/arch/stream_id_lsch3.h>
#ifdef CONFIG_SYS_DPAA_QBMAN
struct qportal_info qp_info[CFG_SYS_QMAN_NUM_PORTALS] = {
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls1046a_serdes.c b/arch/arm/cpu/armv8/fsl-layerscape/ls1046a_serdes.c
index 9347e51..26ca4ca 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/ls1046a_serdes.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/ls1046a_serdes.c
@@ -4,7 +4,7 @@
* Copyright 2019 NXP
*/
-#include <common.h>
+#include <config.h>
#include <asm/arch/fsl_serdes.h>
#include <asm/arch/immap_lsch2.h>
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls1088_ids.c b/arch/arm/cpu/armv8/fsl-layerscape/ls1088_ids.c
index 23743ae..3a076ca 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/ls1088_ids.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/ls1088_ids.c
@@ -3,10 +3,11 @@
* Copyright 2019 NXP
*/
-#include <common.h>
+#include <config.h>
#include <asm/arch-fsl-layerscape/immap_lsch3.h>
#include <asm/arch-fsl-layerscape/fsl_icid.h>
#include <asm/arch-fsl-layerscape/fsl_portals.h>
+#include <asm/arch/stream_id_lsch3.h>
struct icid_id_table icid_tbl[] = {
SET_SDHC_ICID(1, FSL_SDMMC_STREAM_ID),
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls1088a_serdes.c b/arch/arm/cpu/armv8/fsl-layerscape/ls1088a_serdes.c
index fe667f0..154b727 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/ls1088a_serdes.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/ls1088a_serdes.c
@@ -3,7 +3,7 @@
* Copyright 2017-2019 NXP
*/
-#include <common.h>
+#include <config.h>
#include <asm/arch/fsl_serdes.h>
#include <asm/arch/soc.h>
#include <asm/io.h>
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c b/arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c
index 7997422..5088c8e 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c
@@ -3,7 +3,7 @@
* Copyright 2014-2015 Freescale Semiconductor, Inc.
*/
-#include <common.h>
+#include <config.h>
#include <asm/arch/fsl_serdes.h>
struct serdes_config {
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls2088_ids.c b/arch/arm/cpu/armv8/fsl-layerscape/ls2088_ids.c
index e6403b7..c320e83 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/ls2088_ids.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/ls2088_ids.c
@@ -3,10 +3,11 @@
* Copyright 2019 NXP
*/
-#include <common.h>
+#include <config.h>
#include <asm/arch-fsl-layerscape/immap_lsch3.h>
#include <asm/arch-fsl-layerscape/fsl_icid.h>
#include <asm/arch-fsl-layerscape/fsl_portals.h>
+#include <asm/arch/stream_id_lsch3.h>
struct icid_id_table icid_tbl[] = {
SET_SDHC_ICID(1, FSL_SDMMC_STREAM_ID),
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/lx2160_ids.c b/arch/arm/cpu/armv8/fsl-layerscape/lx2160_ids.c
index 3a0ed1f..df9329d 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/lx2160_ids.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/lx2160_ids.c
@@ -3,10 +3,11 @@
* Copyright 2019 NXP
*/
-#include <common.h>
+#include <config.h>
#include <asm/arch-fsl-layerscape/immap_lsch3.h>
#include <asm/arch-fsl-layerscape/fsl_icid.h>
#include <asm/arch-fsl-layerscape/fsl_portals.h>
+#include <asm/arch/stream_id_lsch3.h>
struct icid_id_table icid_tbl[] = {
SET_SDHC_ICID(1, FSL_SDMMC_STREAM_ID),
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/lx2160a_serdes.c b/arch/arm/cpu/armv8/fsl-layerscape/lx2160a_serdes.c
index 5941d90..43f0e8c 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/lx2160a_serdes.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/lx2160a_serdes.c
@@ -3,7 +3,7 @@
* Copyright 2018, 2020 NXP
*/
-#include <common.h>
+#include <config.h>
#include <asm/arch/fsl_serdes.h>
struct serdes_config {
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/mp.c b/arch/arm/cpu/armv8/fsl-layerscape/mp.c
index ce0c46a..db91320 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/mp.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/mp.c
@@ -3,7 +3,7 @@
* Copyright 2014-2015 Freescale Semiconductor, Inc.
*/
-#include <common.h>
+#include <config.h>
#include <clock_legacy.h>
#include <cpu_func.h>
#include <image.h>
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
index 4c61d28..d85a630 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
@@ -4,7 +4,7 @@
* Copyright 2019-2021 NXP
*/
-#include <common.h>
+#include <config.h>
#include <clock_legacy.h>
#include <cpu_func.h>
#include <env.h>
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/spl.c b/arch/arm/cpu/armv8/fsl-layerscape/spl.c
index 232adfa..a739ff2 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/spl.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/spl.c
@@ -3,7 +3,7 @@
* Copyright 2014-2015 Freescale Semiconductor, Inc.
*/
-#include <common.h>
+#include <config.h>
#include <clock_legacy.h>
#include <cpu_func.h>
#include <debug_uart.h>
diff --git a/arch/arm/cpu/armv8/generic_timer.c b/arch/arm/cpu/armv8/generic_timer.c
index 8f83372..e4aa5a4 100644
--- a/arch/arm/cpu/armv8/generic_timer.c
+++ b/arch/arm/cpu/armv8/generic_timer.c
@@ -4,7 +4,6 @@
* David Feng <fenghua@phytium.com.cn>
*/
-#include <common.h>
#include <bootstage.h>
#include <command.h>
#include <time.h>
diff --git a/arch/arm/cpu/armv8/hisilicon/pinmux.c b/arch/arm/cpu/armv8/hisilicon/pinmux.c
index e14057c..d7a5a79 100644
--- a/arch/arm/cpu/armv8/hisilicon/pinmux.c
+++ b/arch/arm/cpu/armv8/hisilicon/pinmux.c
@@ -4,7 +4,6 @@
* Peter Griffin <peter.griffin@linaro.org>
*/
-#include <common.h>
#include <fdtdec.h>
#include <log.h>
#include <asm/gpio.h>
diff --git a/arch/arm/cpu/armv8/sec_firmware.c b/arch/arm/cpu/armv8/sec_firmware.c
index c0e8726..44372cb 100644
--- a/arch/arm/cpu/armv8/sec_firmware.c
+++ b/arch/arm/cpu/armv8/sec_firmware.c
@@ -3,7 +3,7 @@
* Copyright 2016 NXP Semiconductor, Inc.
*/
-#include <common.h>
+#include <config.h>
#include <cpu_func.h>
#include <errno.h>
#include <fdt_support.h>
diff --git a/arch/arm/cpu/armv8/sha1_ce_glue.c b/arch/arm/cpu/armv8/sha1_ce_glue.c
index 780b119..c88b4dc 100644
--- a/arch/arm/cpu/armv8/sha1_ce_glue.c
+++ b/arch/arm/cpu/armv8/sha1_ce_glue.c
@@ -5,7 +5,6 @@
* Copyright (C) 2022 Linaro Ltd <loic.poulain@linaro.org>
*/
-#include <common.h>
#include <u-boot/sha1.h>
extern void sha1_armv8_ce_process(uint32_t state[5], uint8_t const *src,
diff --git a/arch/arm/cpu/armv8/sha256_ce_glue.c b/arch/arm/cpu/armv8/sha256_ce_glue.c
index 67dd796..d5d2b4f 100644
--- a/arch/arm/cpu/armv8/sha256_ce_glue.c
+++ b/arch/arm/cpu/armv8/sha256_ce_glue.c
@@ -5,7 +5,6 @@
* Copyright (C) 2022 Linaro Ltd <loic.poulain@linaro.org>
*/
-#include <common.h>
#include <u-boot/sha256.h>
extern void sha256_armv8_ce_process(uint32_t state[8], uint8_t const *src,
diff --git a/arch/arm/cpu/armv8/spin_table.c b/arch/arm/cpu/armv8/spin_table.c
index 42a0962..485294b 100644
--- a/arch/arm/cpu/armv8/spin_table.c
+++ b/arch/arm/cpu/armv8/spin_table.c
@@ -4,7 +4,6 @@
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*/
-#include <common.h>
#include <linux/libfdt.h>
#include <asm/spin_table.h>
diff --git a/arch/arm/cpu/armv8/spl_data.c b/arch/arm/cpu/armv8/spl_data.c
index 8f1231c..259b49f 100644
--- a/arch/arm/cpu/armv8/spl_data.c
+++ b/arch/arm/cpu/armv8/spl_data.c
@@ -3,7 +3,6 @@
* Copyright 2020 NXP
*/
-#include <common.h>
#include <spl.h>
char __data_save_start[0] __section(".__data_save_start");
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 7b7788f..c9f1b25 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -47,33 +47,7 @@
dtb-$(CONFIG_ARCH_KIRKWOOD) += \
kirkwood-atl-sbx81lifkw.dtb \
- kirkwood-atl-sbx81lifxcat.dtb \
- kirkwood-blackarmor-nas220.dtb \
- kirkwood-d2net.dtb \
- kirkwood-dns325.dtb \
- kirkwood-dockstar.dtb \
- kirkwood-dreamplug.dtb \
- kirkwood-ds109.dtb \
- kirkwood-goflexnet.dtb \
- kirkwood-guruplug-server-plus.dtb \
- kirkwood-ib62x0.dtb \
- kirkwood-iconnect.dtb \
- kirkwood-is2.dtb \
- kirkwood-lsxhl.dtb \
- kirkwood-lschlv2.dtb \
- kirkwood-net2big.dtb \
- kirkwood-ns2.dtb \
- kirkwood-ns2lite.dtb \
- kirkwood-ns2max.dtb \
- kirkwood-ns2mini.dtb \
- kirkwood-nsa310s.dtb \
- kirkwood-nsa325.dtb \
- kirkwood-openrd-base.dtb \
- kirkwood-openrd-client.dtb \
- kirkwood-openrd-ultimate.dtb \
- kirkwood-pogo_e02.dtb \
- kirkwood-pogoplug-series-4.dtb \
- kirkwood-sheevaplug.dtb
+ kirkwood-atl-sbx81lifxcat.dtb
dtb-$(CONFIG_MACH_S900) += \
bubblegum_96.dtb
@@ -107,7 +81,6 @@
rk3288-evb.dtb \
rk3288-firefly.dtb \
rk3288-miqi.dtb \
- rk3288-phycore-rdk.dtb \
rk3288-popmetal.dtb \
rk3288-rock2-square.dtb \
rk3288-rock-pi-n8.dtb \
@@ -193,8 +166,8 @@
rk3568-rock-3a.dtb
dtb-$(CONFIG_ROCKCHIP_RK3588) += \
- rk3588s-coolpi-4b.dts \
- rk3588-coolpi-cm5-evb.dts \
+ rk3588s-coolpi-4b.dtb \
+ rk3588-coolpi-cm5-evb.dtb \
rk3588-edgeble-neu6a-io.dtb \
rk3588-edgeble-neu6b-io.dtb \
rk3588-evb1-v10.dtb \
@@ -206,6 +179,7 @@
rk3588-quartzpro64.dtb \
rk3588s-rock-5a.dtb \
rk3588-rock-5b.dtb \
+ rk3588-toybrick-x0.dtb \
rk3588-turing-rk1.dtb
dtb-$(CONFIG_ROCKCHIP_RV1108) += \
@@ -219,40 +193,8 @@
s5p4418-nanopi2.dtb
dtb-$(CONFIG_ARCH_MESON) += \
- meson-a1-ad401.dtb \
- meson-axg-s400.dtb \
- meson-axg-jethome-jethub-j100.dtb \
- meson-gxl-s805x-libretech-ac.dtb \
- meson-gxl-s905d-libretech-pc.dtb \
- meson-gxl-s905w-jethome-jethub-j80.dtb \
- meson-gxl-s905x-khadas-vim.dtb \
- meson-gxl-s905x-libretech-cc.dtb \
- meson-gxl-s905x-libretech-cc-v2.dtb \
- meson-gxl-s905x-p212.dtb \
- meson-gxm-gt1-ultimate.dtb \
- meson-gxm-khadas-vim2.dtb \
- meson-gxm-s912-libretech-pc.dtb \
- meson-gxm-wetek-core2.dtb \
- meson-g12a-radxa-zero.dtb \
- meson-g12a-sei510.dtb \
- meson-g12a-u200.dtb \
- meson-g12b-a311d-bananapi-m2s.dtb \
- meson-g12b-a311d-khadas-vim3.dtb \
- meson-g12b-bananapi-cm4-cm4io.dtb \
- meson-g12b-gsking-x.dtb \
- meson-g12b-gtking.dtb \
- meson-g12b-gtking-pro.dtb \
- meson-g12b-odroid-go-ultra.dtb \
- meson-g12b-odroid-n2.dtb \
- meson-g12b-odroid-n2l.dtb \
- meson-g12b-odroid-n2-plus.dtb \
- meson-g12b-radxa-zero2.dtb \
- meson-sm1-bananapi-m2-pro.dtb \
- meson-sm1-bananapi-m5.dtb \
- meson-sm1-khadas-vim3l.dtb \
- meson-sm1-odroid-c4.dtb \
- meson-sm1-odroid-hc4.dtb \
- meson-sm1-sei610.dtb
+ meson-a1-ad401.dtb
+
dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \
tegra20-medcom-wide.dtb \
tegra20-paz00.dtb \
@@ -630,12 +572,6 @@
dtb-$(CONFIG_TARGET_TEN64) += fsl-ls1088a-ten64.dtb
-dtb-$(CONFIG_ARCH_SNAPDRAGON) += apq8016-sbc.dtb \
- apq8096-db820c.dtb \
- sdm845-db845c.dtb \
- sdm845-samsung-starqltechn.dtb \
- qcs404-evb-4000.dtb
-
dtb-$(CONFIG_TARGET_STEMMY) += ste-ux500-samsung-stemmy.dtb
dtb-$(CONFIG_STM32F4) += stm32f429-disco.dtb \
@@ -1082,16 +1018,12 @@
imx8mm-phg.dtb \
imx8mm-phyboard-polis-rdk.dtb \
imx8mm-phygate-tauri-l.dtb \
- imx8mm-verdin-wifi-dev.dtb \
imx8mn-bsh-smm-s2.dtb \
imx8mn-bsh-smm-s2pro.dtb \
imx8mq-cm.dtb \
imx8mn-var-som-symphony.dtb \
- imx8mm-beacon-kit.dtb \
- imx8mn-beacon-kit.dtb \
imx8mq-mnt-reform2.dtb \
imx8mq-phanbell.dtb \
- imx8mp-beacon-kit.dtb \
imx8mp-data-modul-edm-sbc.dtb \
imx8mp-dhcom-som-overlay-rev100.dtbo \
imx8mp-dhcom-som-overlay-eth1xfast.dtbo \
@@ -1104,13 +1036,11 @@
imx8mp-icore-mx8mp-edimm2.2.dtb \
imx8mp-msc-sm2s.dtb \
imx8mp-phyboard-pollux-rdk.dtb \
- imx8mp-verdin-wifi-dev.dtb \
imx8mq-pico-pi.dtb \
imx8mq-kontron-pitx-imx8m.dtb \
imx8mq-librem5-r4.dtb
dtb-$(CONFIG_ARCH_IMX9) += \
- imx93-11x11-evk.dtb \
imx93-var-som-symphony.dtb \
imx93-phyboard-segin.dtb
@@ -1119,41 +1049,41 @@
imxrt1170-evk.dtb \
dtb-$(CONFIG_RCAR_GEN2) += \
- r8a7790-lager-u-boot.dtb \
- r8a7790-stout-u-boot.dtb \
- r8a7791-koelsch-u-boot.dtb \
- r8a7791-porter-u-boot.dtb \
- r8a7792-blanche-u-boot.dtb \
- r8a7793-gose-u-boot.dtb \
- r8a7794-alt-u-boot.dtb \
- r8a7794-silk-u-boot.dtb
+ r8a7790-lager.dtb \
+ r8a7790-stout.dtb \
+ r8a7791-koelsch.dtb \
+ r8a7791-porter.dtb \
+ r8a7792-blanche.dtb \
+ r8a7793-gose.dtb \
+ r8a7794-alt.dtb \
+ r8a7794-silk.dtb
dtb-$(CONFIG_RCAR_GEN3) += \
r8a774a1-beacon-rzg2m-kit.dtb \
r8a774b1-beacon-rzg2n-kit.dtb \
r8a774e1-beacon-rzg2h-kit.dtb \
- r8a774a1-hihope-rzg2m-u-boot.dtb \
- r8a774b1-hihope-rzg2n-u-boot.dtb \
- r8a774c0-ek874-u-boot.dtb \
- r8a774e1-hihope-rzg2h-u-boot.dtb \
- r8a77950-ulcb-u-boot.dtb \
- r8a77950-salvator-x-u-boot.dtb \
- r8a77960-ulcb-u-boot.dtb \
- r8a77960-salvator-x-u-boot.dtb \
- r8a77965-ulcb-u-boot.dtb \
- r8a77965-salvator-x-u-boot.dtb \
- r8a77970-eagle-u-boot.dtb \
- r8a77970-v3msk-u-boot.dtb \
- r8a77980-condor-u-boot.dtb \
- r8a77980-v3hsk-u-boot.dtb \
- r8a77990-ebisu-u-boot.dtb \
- r8a77995-draak-u-boot.dtb
+ r8a774a1-hihope-rzg2m.dtb \
+ r8a774b1-hihope-rzg2n.dtb \
+ r8a774c0-ek874.dtb \
+ r8a774e1-hihope-rzg2h.dtb \
+ r8a77951-ulcb.dtb \
+ r8a77951-salvator-x.dtb \
+ r8a77960-ulcb.dtb \
+ r8a77960-salvator-x.dtb \
+ r8a77965-ulcb.dtb \
+ r8a77965-salvator-x.dtb \
+ r8a77970-eagle.dtb \
+ r8a77970-v3msk.dtb \
+ r8a77980-condor.dtb \
+ r8a77980-v3hsk.dtb \
+ r8a77990-ebisu.dtb \
+ r8a77995-draak.dtb
dtb-$(CONFIG_RCAR_GEN4) += \
- r8a779a0-falcon-u-boot.dtb \
- r8a779f0-spider-u-boot.dtb \
- r8a779g0-white-hawk-u-boot.dtb \
- r8a779h0-gray-hawk-u-boot.dtb
+ r8a779a0-falcon.dtb \
+ r8a779f0-spider.dtb \
+ r8a779g0-white-hawk.dtb \
+ r8a779h0-gray-hawk.dtb
dtb-$(CONFIG_TARGET_RZG2L) += \
r9a07g044l2-smarc.dts
@@ -1163,7 +1093,7 @@
endif
dtb-$(CONFIG_RZA1) += \
- r7s72100-gr-peach-u-boot.dtb
+ r7s72100-gr-peach.dtb
dtb-$(CONFIG_ARCH_KEYSTONE) += keystone-k2hk-evm.dtb \
keystone-k2l-evm.dtb \
@@ -1389,7 +1319,9 @@
k3-am6548-iot2050-advanced-pg2.dtb \
k3-am6548-iot2050-advanced-m2.dtb \
k3-am6548-iot2050-advanced-m2-bkey-usb3-overlay.dtbo \
- k3-am6548-iot2050-advanced-m2-bkey-ekey-pcie-overlay.dtbo
+ k3-am6548-iot2050-advanced-m2-bkey-ekey-pcie-overlay.dtbo \
+ k3-am654-icssg2.dtbo
+
dtb-$(CONFIG_SOC_K3_J721E) += k3-j721e-common-proc-board.dtb \
k3-j721e-r5-common-proc-board.dtb \
k3-j7200-common-proc-board.dtb \
@@ -1409,16 +1341,13 @@
dtb-$(CONFIG_SOC_K3_AM642) += k3-am642-r5-evm.dtb \
k3-am642-r5-sk.dtb \
- k3-am642-phyboard-electra-rdk.dtb \
k3-am642-r5-phycore-som-2gb.dtb
dtb-$(CONFIG_SOC_K3_AM625) += k3-am625-sk.dtb \
k3-am625-r5-sk.dtb \
k3-am625-beagleplay.dtb \
k3-am625-r5-beagleplay.dtb \
- k3-am625-verdin-wifi-dev.dtb \
k3-am625-verdin-r5.dtb \
- k3-am625-phyboard-lyra-rdk.dtb \
k3-am625-r5-phycore-som-2gb.dtb
dtb-$(CONFIG_SOC_K3_AM62A7) += k3-am62a7-sk.dtb \
diff --git a/arch/arm/dts/apq8016-sbc.dts b/arch/arm/dts/apq8016-sbc.dts
deleted file mode 100644
index 9ffad7d..0000000
--- a/arch/arm/dts/apq8016-sbc.dts
+++ /dev/null
@@ -1,729 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Copyright (c) 2015, The Linux Foundation. All rights reserved.
- */
-
-/dts-v1/;
-
-#include "msm8916-pm8916.dtsi"
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/leds/common.h>
-#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
-#include <dt-bindings/pinctrl/qcom,pmic-mpp.h>
-#include <dt-bindings/sound/apq8016-lpass.h>
-
-/ {
- model = "Qualcomm Technologies, Inc. APQ 8016 SBC";
- compatible = "qcom,apq8016-sbc", "qcom,apq8016";
-
- aliases {
- mmc0 = &sdhc_1; /* eMMC */
- mmc1 = &sdhc_2; /* SD card */
- serial0 = &blsp_uart2;
- serial1 = &blsp_uart1;
- usid0 = &pm8916_0;
- i2c0 = &blsp_i2c2;
- i2c1 = &blsp_i2c6;
- i2c3 = &blsp_i2c4;
- spi0 = &blsp_spi5;
- spi1 = &blsp_spi3;
- };
-
- chosen {
- stdout-path = "serial0";
- };
-
- reserved-memory {
- ramoops@bff00000 {
- compatible = "ramoops";
- reg = <0x0 0xbff00000 0x0 0x100000>;
-
- record-size = <0x20000>;
- console-size = <0x20000>;
- ftrace-size = <0x20000>;
- };
- };
-
- usb2513 {
- compatible = "smsc,usb3503";
- reset-gpios = <&pm8916_gpios 3 GPIO_ACTIVE_LOW>;
- initial-mode = <1>;
- };
-
- usb_id: usb-id {
- compatible = "linux,extcon-usb-gpio";
- id-gpios = <&tlmm 121 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&usb_id_default>;
- };
-
- hdmi-out {
- compatible = "hdmi-connector";
- type = "a";
-
- port {
- hdmi_con: endpoint {
- remote-endpoint = <&adv7533_out>;
- };
- };
- };
-
- gpio-keys {
- compatible = "gpio-keys";
- autorepeat;
-
- pinctrl-names = "default";
- pinctrl-0 = <&msm_key_volp_n_default>;
-
- button {
- label = "Volume Up";
- linux,code = <KEY_VOLUMEUP>;
- gpios = <&tlmm 107 GPIO_ACTIVE_LOW>;
- };
- };
-
- leds {
- pinctrl-names = "default";
- pinctrl-0 = <&tlmm_leds>,
- <&pm8916_gpios_leds>,
- <&pm8916_mpps_leds>;
-
- compatible = "gpio-leds";
-
- led@1 {
- label = "apq8016-sbc:green:user1";
- function = LED_FUNCTION_HEARTBEAT;
- color = <LED_COLOR_ID_GREEN>;
- gpios = <&tlmm 21 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "heartbeat";
- default-state = "off";
- };
-
- led@2 {
- label = "apq8016-sbc:green:user2";
- function = LED_FUNCTION_DISK_ACTIVITY;
- color = <LED_COLOR_ID_GREEN>;
- gpios = <&tlmm 120 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "mmc0";
- default-state = "off";
- };
-
- led@3 {
- label = "apq8016-sbc:green:user3";
- function = LED_FUNCTION_DISK_ACTIVITY;
- color = <LED_COLOR_ID_GREEN>;
- gpios = <&pm8916_gpios 1 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "mmc1";
- default-state = "off";
- };
-
- led@4 {
- label = "apq8016-sbc:green:user4";
- color = <LED_COLOR_ID_GREEN>;
- gpios = <&pm8916_gpios 2 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "none";
- panic-indicator;
- default-state = "off";
- };
-
- led@5 {
- label = "apq8016-sbc:yellow:wlan";
- function = LED_FUNCTION_WLAN;
- color = <LED_COLOR_ID_YELLOW>;
- gpios = <&pm8916_mpps 2 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "phy0tx";
- default-state = "off";
- };
-
- led@6 {
- label = "apq8016-sbc:blue:bt";
- function = LED_FUNCTION_BLUETOOTH;
- color = <LED_COLOR_ID_BLUE>;
- gpios = <&pm8916_mpps 3 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "bluetooth-power";
- default-state = "off";
- };
- };
-};
-
-&blsp_i2c2 {
- /* On Low speed expansion: LS-I2C0 */
- status = "okay";
-};
-
-&blsp_i2c4 {
- /* On High speed expansion: HS-I2C2 */
- status = "okay";
-
- adv_bridge: bridge@39 {
- status = "okay";
-
- compatible = "adi,adv7533";
- reg = <0x39>;
-
- interrupt-parent = <&tlmm>;
- interrupts = <31 IRQ_TYPE_EDGE_FALLING>;
-
- adi,dsi-lanes = <4>;
- clocks = <&rpmcc RPM_SMD_BB_CLK2>;
- clock-names = "cec";
-
- pd-gpios = <&tlmm 32 GPIO_ACTIVE_HIGH>;
-
- avdd-supply = <&pm8916_l6>;
- a2vdd-supply = <&pm8916_l6>;
- dvdd-supply = <&pm8916_l6>;
- pvdd-supply = <&pm8916_l6>;
- v1p2-supply = <&pm8916_l6>;
- v3p3-supply = <&pm8916_l17>;
-
- pinctrl-names = "default","sleep";
- pinctrl-0 = <&adv7533_int_active &adv7533_switch_active>;
- pinctrl-1 = <&adv7533_int_suspend &adv7533_switch_suspend>;
- #sound-dai-cells = <1>;
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
- adv7533_in: endpoint {
- remote-endpoint = <&mdss_dsi0_out>;
- };
- };
-
- port@1 {
- reg = <1>;
- adv7533_out: endpoint {
- remote-endpoint = <&hdmi_con>;
- };
- };
- };
- };
-};
-
-&blsp_i2c6 {
- /* On Low speed expansion: LS-I2C1 */
- status = "okay";
-};
-
-&blsp_spi3 {
- /* On High speed expansion: HS-SPI1 */
- status = "okay";
-};
-
-&blsp_spi5 {
- /* On Low speed expansion: LS-SPI0 */
- status = "okay";
-};
-
-&blsp_uart1 {
- status = "okay";
- label = "LS-UART0";
-};
-
-&blsp_uart2 {
- status = "okay";
- label = "LS-UART1";
-};
-
-&camss {
- status = "okay";
-};
-
-&gpu {
- status = "okay";
-};
-
-&lpass {
- status = "okay";
-};
-
-&lpass_codec {
- status = "okay";
-};
-
-&mba_mem {
- status = "okay";
-};
-
-&mdss {
- status = "okay";
-};
-
-&mdss_dsi0_out {
- data-lanes = <0 1 2 3>;
- remote-endpoint = <&adv7533_in>;
-};
-
-&mpss {
- status = "okay";
-
- firmware-name = "qcom/apq8016/mba.mbn", "qcom/apq8016/modem.mbn";
-};
-
-&mpss_mem {
- status = "okay";
- reg = <0x0 0x86800000 0x0 0x2b00000>;
-};
-
-&pm8916_codec {
- status = "okay";
- qcom,mbhc-vthreshold-low = <75 150 237 450 500>;
- qcom,mbhc-vthreshold-high = <75 150 237 450 500>;
-};
-
-&pm8916_resin {
- status = "okay";
- linux,code = <KEY_VOLUMEDOWN>;
-};
-
-&pm8916_rpm_regulators {
- /*
- * The 96Boards specification expects a 1.8V power rail on the low-speed
- * expansion connector that is able to provide at least 0.18W / 100 mA.
- * L15/L16 are connected in parallel to provide 55 mA each. A minimum load
- * must be specified to ensure the regulators are not put in LPM where they
- * would only provide 5 mA.
- */
- pm8916_l15: l15 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-system-load = <50000>;
- regulator-allow-set-load;
- regulator-always-on;
- };
- pm8916_l16: l16 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-system-load = <50000>;
- regulator-allow-set-load;
- regulator-always-on;
- };
-
- pm8916_l17: l17 {
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- };
-};
-
-&sdhc_1 {
- status = "okay";
-};
-
-&sdhc_2 {
- status = "okay";
-
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&sdc2_default &sdc2_cd_default>;
- pinctrl-1 = <&sdc2_sleep &sdc2_cd_default>;
-
- cd-gpios = <&tlmm 38 GPIO_ACTIVE_LOW>;
-};
-
-&sound {
- status = "okay";
-
- pinctrl-0 = <&cdc_pdm_default &sec_mi2s_default>;
- pinctrl-1 = <&cdc_pdm_sleep &sec_mi2s_sleep>;
- pinctrl-names = "default", "sleep";
- model = "DB410c";
- audio-routing =
- "AMIC2", "MIC BIAS Internal2",
- "AMIC3", "MIC BIAS External1";
-
- quaternary-dai-link {
- link-name = "ADV7533";
- cpu {
- sound-dai = <&lpass MI2S_QUATERNARY>;
- };
- codec {
- sound-dai = <&adv_bridge 0>;
- };
- };
-
- primary-dai-link {
- link-name = "WCD";
- cpu {
- sound-dai = <&lpass MI2S_PRIMARY>;
- };
- codec {
- sound-dai = <&lpass_codec 0>, <&pm8916_codec 0>;
- };
- };
-
- tertiary-dai-link {
- link-name = "WCD-Capture";
- cpu {
- sound-dai = <&lpass MI2S_TERTIARY>;
- };
- codec {
- sound-dai = <&lpass_codec 1>, <&pm8916_codec 1>;
- };
- };
-};
-
-&usb {
- status = "okay";
- extcon = <&usb_id>, <&usb_id>;
-
- pinctrl-names = "default", "device";
- pinctrl-0 = <&usb_sw_sel_pm &usb_hub_reset_pm>;
- pinctrl-1 = <&usb_sw_sel_pm_device &usb_hub_reset_pm_device>;
-};
-
-&usb_hs_phy {
- extcon = <&usb_id>;
-};
-
-&venus {
- status = "okay";
-};
-
-&venus_mem {
- status = "okay";
-};
-
-&wcnss {
- status = "okay";
- firmware-name = "qcom/apq8016/wcnss.mbn";
-};
-
-&wcnss_ctrl {
- firmware-name = "qcom/apq8016/WCNSS_qcom_wlan_nv_sbc.bin";
-};
-
-&wcnss_iris {
- compatible = "qcom,wcn3620";
-};
-
-&wcnss_mem {
- status = "okay";
-};
-
-/* Enable CoreSight */
-&cti0 { status = "okay"; };
-&cti1 { status = "okay"; };
-&cti12 { status = "okay"; };
-&cti13 { status = "okay"; };
-&cti14 { status = "okay"; };
-&cti15 { status = "okay"; };
-&debug0 { status = "okay"; };
-&debug1 { status = "okay"; };
-&debug2 { status = "okay"; };
-&debug3 { status = "okay"; };
-&etf { status = "okay"; };
-&etm0 { status = "okay"; };
-&etm1 { status = "okay"; };
-&etm2 { status = "okay"; };
-&etm3 { status = "okay"; };
-&etr { status = "okay"; };
-&funnel0 { status = "okay"; };
-&funnel1 { status = "okay"; };
-&replicator { status = "okay"; };
-&stm { status = "okay"; };
-&tpiu { status = "okay"; };
-
-/*
- * 2mA drive strength is not enough when connecting multiple
- * I2C devices with different pull up resistors.
- */
-&blsp_i2c2_default {
- drive-strength = <16>;
-};
-
-&blsp_i2c4_default {
- drive-strength = <16>;
-};
-
-&blsp_i2c6_default {
- drive-strength = <16>;
-};
-
-/*
- * GPIO name legend: proper name = the GPIO line is used as GPIO
- * NC = not connected (pin out but not routed from the chip to
- * anything the board)
- * "[PER]" = pin is muxed for [peripheral] (not GPIO)
- * LSEC = Low Speed External Connector
- * HSEC = High Speed External Connector
- *
- * Line names are taken from the schematic "DragonBoard410c"
- * dated monday, august 31, 2015. Page 5 in particular.
- *
- * For the lines routed to the external connectors the
- * lines are named after the 96Boards CE Specification 1.0,
- * Appendix "Expansion Connector Signal Description".
- *
- * When the 96Board naming of a line and the schematic name of
- * the same line are in conflict, the 96Board specification
- * takes precedence, which means that the external UART on the
- * LSEC is named UART0 while the schematic and SoC names this
- * UART3. This is only for the informational lines i.e. "[FOO]",
- * the GPIO named lines "GPIO-A" thru "GPIO-L" are the only
- * ones actually used for GPIO.
- */
-
-&tlmm {
- gpio-line-names =
- "[UART0_TX]", /* GPIO_0, LSEC pin 5 */
- "[UART0_RX]", /* GPIO_1, LSEC pin 7 */
- "[UART0_CTS_N]", /* GPIO_2, LSEC pin 3 */
- "[UART0_RTS_N]", /* GPIO_3, LSEC pin 9 */
- "[UART1_TX]", /* GPIO_4, LSEC pin 11 */
- "[UART1_RX]", /* GPIO_5, LSEC pin 13 */
- "[I2C0_SDA]", /* GPIO_8, LSEC pin 17 */
- "[I2C0_SCL]", /* GPIO_7, LSEC pin 15 */
- "[SPI1_DOUT]", /* SPI1_MOSI, HSEC pin 1 */
- "[SPI1_DIN]", /* SPI1_MISO, HSEC pin 11 */
- "[SPI1_CS]", /* SPI1_CS_N, HSEC pin 7 */
- "[SPI1_SCLK]", /* SPI1_CLK, HSEC pin 9 */
- "GPIO-B", /* LS_EXP_GPIO_B, LSEC pin 24 */
- "GPIO-C", /* LS_EXP_GPIO_C, LSEC pin 25 */
- "[I2C3_SDA]", /* HSEC pin 38 */
- "[I2C3_SCL]", /* HSEC pin 36 */
- "[SPI0_MOSI]", /* LSEC pin 14 */
- "[SPI0_MISO]", /* LSEC pin 10 */
- "[SPI0_CS_N]", /* LSEC pin 12 */
- "[SPI0_CLK]", /* LSEC pin 8 */
- "HDMI_HPD_N", /* GPIO 20 */
- "USR_LED_1_CTRL",
- "[I2C1_SDA]", /* GPIO_22, LSEC pin 21 */
- "[I2C1_SCL]", /* GPIO_23, LSEC pin 19 */
- "GPIO-G", /* LS_EXP_GPIO_G, LSEC pin 29 */
- "GPIO-H", /* LS_EXP_GPIO_H, LSEC pin 30 */
- "[CSI0_MCLK]", /* HSEC pin 15 */
- "[CSI1_MCLK]", /* HSEC pin 17 */
- "GPIO-K", /* LS_EXP_GPIO_K, LSEC pin 33 */
- "[I2C2_SDA]", /* HSEC pin 34 */
- "[I2C2_SCL]", /* HSEC pin 32 */
- "DSI2HDMI_INT_N",
- "DSI_SW_SEL_APQ",
- "GPIO-L", /* LS_EXP_GPIO_L, LSEC pin 34 */
- "GPIO-J", /* LS_EXP_GPIO_J, LSEC pin 32 */
- "GPIO-I", /* LS_EXP_GPIO_I, LSEC pin 31 */
- "GPIO-A", /* LS_EXP_GPIO_A, LSEC pin 23 */
- "FORCED_USB_BOOT",
- "SD_CARD_DET_N",
- "[WCSS_BT_SSBI]",
- "[WCSS_WLAN_DATA_2]", /* GPIO 40 */
- "[WCSS_WLAN_DATA_1]",
- "[WCSS_WLAN_DATA_0]",
- "[WCSS_WLAN_SET]",
- "[WCSS_WLAN_CLK]",
- "[WCSS_FM_SSBI]",
- "[WCSS_FM_SDI]",
- "[WCSS_BT_DAT_CTL]",
- "[WCSS_BT_DAT_STB]",
- "NC",
- "NC", /* GPIO 50 */
- "NC",
- "NC",
- "NC",
- "NC",
- "NC",
- "NC",
- "NC",
- "NC",
- "NC",
- "NC", /* GPIO 60 */
- "NC",
- "NC",
- "[CDC_PDM0_CLK]",
- "[CDC_PDM0_SYNC]",
- "[CDC_PDM0_TX0]",
- "[CDC_PDM0_RX0]",
- "[CDC_PDM0_RX1]",
- "[CDC_PDM0_RX2]",
- "GPIO-D", /* LS_EXP_GPIO_D, LSEC pin 26 */
- "NC", /* GPIO 70 */
- "NC",
- "NC",
- "NC",
- "NC", /* GPIO 74 */
- "NC",
- "NC",
- "NC",
- "NC",
- "NC",
- "BOOT_CONFIG_0", /* GPIO 80 */
- "BOOT_CONFIG_1",
- "BOOT_CONFIG_2",
- "BOOT_CONFIG_3",
- "NC",
- "NC",
- "BOOT_CONFIG_5",
- "NC",
- "NC",
- "NC",
- "NC", /* GPIO 90 */
- "NC",
- "NC",
- "NC",
- "NC",
- "NC",
- "NC",
- "NC",
- "NC",
- "NC",
- "NC", /* GPIO 100 */
- "NC",
- "NC",
- "NC",
- "SSBI_GPS",
- "NC",
- "NC",
- "KEY_VOLP_N",
- "NC",
- "NC",
- "[LS_EXP_MI2S_WS]", /* GPIO 110 */
- "NC",
- "NC",
- "[LS_EXP_MI2S_SCK]",
- "[LS_EXP_MI2S_DATA0]",
- "GPIO-E", /* LS_EXP_GPIO_E, LSEC pin 27 */
- "NC",
- "[DSI2HDMI_MI2S_WS]",
- "[DSI2HDMI_MI2S_SCK]",
- "[DSI2HDMI_MI2S_DATA0]",
- "USR_LED_2_CTRL", /* GPIO 120 */
- "SB_HS_ID";
-
- sdc2_cd_default: sdc2-cd-default-state {
- pins = "gpio38";
- function = "gpio";
- drive-strength = <2>;
- bias-disable;
- };
-
- tlmm_leds: tlmm-leds-state {
- pins = "gpio21", "gpio120";
- function = "gpio";
-
- output-low;
- };
-
- usb_id_default: usb-id-default-state {
- pins = "gpio121";
- function = "gpio";
-
- drive-strength = <8>;
- bias-pull-up;
- };
-
- adv7533_int_active: adv533-int-active-state {
- pins = "gpio31";
- function = "gpio";
-
- drive-strength = <16>;
- bias-disable;
- };
-
- adv7533_int_suspend: adv7533-int-suspend-state {
- pins = "gpio31";
- function = "gpio";
-
- drive-strength = <2>;
- bias-disable;
- };
-
- adv7533_switch_active: adv7533-switch-active-state {
- pins = "gpio32";
- function = "gpio";
-
- drive-strength = <16>;
- bias-disable;
- };
-
- adv7533_switch_suspend: adv7533-switch-suspend-state {
- pins = "gpio32";
- function = "gpio";
-
- drive-strength = <2>;
- bias-disable;
- };
-
- msm_key_volp_n_default: msm-key-volp-n-default-state {
- pins = "gpio107";
- function = "gpio";
-
- drive-strength = <8>;
- bias-pull-up;
- };
-};
-
-&pm8916_gpios {
- gpio-line-names =
- "USR_LED_3_CTRL",
- "USR_LED_4_CTRL",
- "USB_HUB_RESET_N_PM",
- "USB_SW_SEL_PM";
-
- usb_hub_reset_pm: usb-hub-reset-pm-state {
- pins = "gpio3";
- function = PMIC_GPIO_FUNC_NORMAL;
-
- input-disable;
- output-high;
- };
-
- usb_hub_reset_pm_device: usb-hub-reset-pm-device-state {
- pins = "gpio3";
- function = PMIC_GPIO_FUNC_NORMAL;
-
- output-low;
- };
-
- usb_sw_sel_pm: usb-sw-sel-pm-state {
- pins = "gpio4";
- function = PMIC_GPIO_FUNC_NORMAL;
-
- power-source = <PM8916_GPIO_VPH>;
- input-disable;
- output-high;
- };
-
- usb_sw_sel_pm_device: usb-sw-sel-pm-device-state {
- pins = "gpio4";
- function = PMIC_GPIO_FUNC_NORMAL;
-
- power-source = <PM8916_GPIO_VPH>;
- input-disable;
- output-low;
- };
-
- pm8916_gpios_leds: pm8916-gpios-leds-state {
- pins = "gpio1", "gpio2";
- function = PMIC_GPIO_FUNC_NORMAL;
-
- output-low;
- };
-};
-
-&pm8916_mpps {
- gpio-line-names =
- "VDD_PX_BIAS",
- "WLAN_LED_CTRL",
- "BT_LED_CTRL",
- "GPIO-F"; /* LS_EXP_GPIO_F, LSEC pin 28 */
-
- pinctrl-names = "default";
- pinctrl-0 = <&ls_exp_gpio_f>;
-
- ls_exp_gpio_f: pm8916-mpp4-state {
- pins = "mpp4";
- function = "digital";
-
- output-low;
- power-source = <PM8916_MPP_L5>; /* 1.8V */
- };
-
- pm8916_mpps_leds: pm8916-mpps-state {
- pins = "mpp2", "mpp3";
- function = "digital";
-
- output-low;
- };
-};
diff --git a/arch/arm/dts/apq8016-schneider-hmibsc.dts b/arch/arm/dts/apq8016-schneider-hmibsc.dts
new file mode 100644
index 0000000..75c6137
--- /dev/null
+++ b/arch/arm/dts/apq8016-schneider-hmibsc.dts
@@ -0,0 +1,491 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (c) 2015, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2024, Linaro Ltd.
+ */
+
+/dts-v1/;
+
+#include "msm8916-pm8916.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
+#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
+#include <dt-bindings/pinctrl/qcom,pmic-mpp.h>
+#include <dt-bindings/sound/apq8016-lpass.h>
+
+/ {
+ model = "Schneider Electric HMIBSC Board";
+ compatible = "schneider,apq8016-hmibsc", "qcom,apq8016";
+
+ aliases {
+ i2c1 = &blsp_i2c6;
+ i2c3 = &blsp_i2c4;
+ i2c4 = &blsp_i2c3;
+ mmc0 = &sdhc_1; /* eMMC */
+ mmc1 = &sdhc_2; /* SD card */
+ serial0 = &blsp_uart1;
+ serial1 = &blsp_uart2;
+ spi0 = &blsp_spi5;
+ usid0 = &pm8916_0;
+ };
+
+ chosen {
+ stdout-path = "serial0";
+ };
+
+ hdmi-out {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con: endpoint {
+ remote-endpoint = <&adv7533_out>;
+ };
+ };
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+ autorepeat;
+ pinctrl-0 = <&msm_key_volp_n_default>;
+ pinctrl-names = "default";
+
+ button {
+ label = "Volume Up";
+ linux,code = <KEY_VOLUMEUP>;
+ gpios = <&tlmm 107 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-0 = <&pm8916_mpps_leds>;
+ pinctrl-names = "default";
+
+ led-1 {
+ function = LED_FUNCTION_WLAN;
+ color = <LED_COLOR_ID_YELLOW>;
+ gpios = <&pm8916_mpps 2 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "phy0tx";
+ default-state = "off";
+ };
+
+ led-2 {
+ function = LED_FUNCTION_BLUETOOTH;
+ color = <LED_COLOR_ID_BLUE>;
+ gpios = <&pm8916_mpps 3 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "bluetooth-power";
+ default-state = "off";
+ };
+ };
+
+ memory@80000000 {
+ reg = <0 0x80000000 0 0x40000000>;
+ };
+
+ reserved-memory {
+ ramoops@bff00000 {
+ compatible = "ramoops";
+ reg = <0x0 0xbff00000 0x0 0x100000>;
+ record-size = <0x20000>;
+ console-size = <0x20000>;
+ ftrace-size = <0x20000>;
+ ecc-size = <16>;
+ };
+ };
+
+ usb-hub {
+ compatible = "smsc,usb3503";
+ reset-gpios = <&pm8916_gpios 1 GPIO_ACTIVE_LOW>;
+ initial-mode = <1>;
+ };
+
+ usb_id: usb-id {
+ compatible = "linux,extcon-usb-gpio";
+ id-gpios = <&tlmm 110 GPIO_ACTIVE_HIGH>;
+ pinctrl-0 = <&usb_id_default>;
+ pinctrl-names = "default";
+ };
+};
+
+&blsp_i2c3 {
+ status = "okay";
+
+ eeprom@50 {
+ compatible = "atmel,24c32";
+ reg = <0x50>;
+ };
+};
+
+&blsp_i2c4 {
+ status = "okay";
+
+ adv_bridge: bridge@39 {
+ compatible = "adi,adv7533";
+ reg = <0x39>;
+ interrupts-extended = <&tlmm 31 IRQ_TYPE_EDGE_FALLING>;
+
+ adi,dsi-lanes = <4>;
+ clocks = <&rpmcc RPM_SMD_BB_CLK2>;
+ clock-names = "cec";
+ pd-gpios = <&tlmm 32 GPIO_ACTIVE_HIGH>;
+
+ avdd-supply = <&pm8916_l6>;
+ a2vdd-supply = <&pm8916_l6>;
+ dvdd-supply = <&pm8916_l6>;
+ pvdd-supply = <&pm8916_l6>;
+ v1p2-supply = <&pm8916_l6>;
+ v3p3-supply = <&pm8916_l17>;
+
+ pinctrl-0 = <&adv7533_int_active &adv7533_switch_active>;
+ pinctrl-1 = <&adv7533_int_suspend &adv7533_switch_suspend>;
+ pinctrl-names = "default","sleep";
+ #sound-dai-cells = <0>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ adv7533_in: endpoint {
+ remote-endpoint = <&mdss_dsi0_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ adv7533_out: endpoint {
+ remote-endpoint = <&hdmi_con>;
+ };
+ };
+ };
+ };
+};
+
+&blsp_i2c6 {
+ status = "okay";
+
+ rtc@30 {
+ compatible = "sii,s35390a";
+ reg = <0x30>;
+ };
+
+ eeprom@50 {
+ compatible = "atmel,24c256";
+ reg = <0x50>;
+ };
+};
+
+&blsp_spi5 {
+ cs-gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
+ status = "okay";
+
+ tpm@0 {
+ compatible = "infineon,slb9670", "tcg,tpm_tis-spi";
+ reg = <0>;
+ spi-max-frequency = <500000>;
+ };
+};
+
+&blsp_uart1 {
+ label = "UART0";
+ status = "okay";
+};
+
+&blsp_uart2 {
+ label = "UART1";
+ status = "okay";
+};
+
+&lpass {
+ status = "okay";
+};
+
+&mdss {
+ status = "okay";
+};
+
+&mdss_dsi0_out {
+ data-lanes = <0 1 2 3>;
+ remote-endpoint = <&adv7533_in>;
+};
+
+&pm8916_codec {
+ qcom,mbhc-vthreshold-low = <75 150 237 450 500>;
+ qcom,mbhc-vthreshold-high = <75 150 237 450 500>;
+ status = "okay";
+};
+
+&pm8916_gpios {
+ gpio-line-names =
+ "USB_HUB_RESET_N_PM",
+ "USB_SW_SEL_PM",
+ "NC",
+ "NC";
+
+ usb_hub_reset_pm: usb-hub-reset-pm-state {
+ pins = "gpio1";
+ function = PMIC_GPIO_FUNC_NORMAL;
+ input-disable;
+ output-high;
+ };
+
+ usb_hub_reset_pm_device: usb-hub-reset-pm-device-state {
+ pins = "gpio1";
+ function = PMIC_GPIO_FUNC_NORMAL;
+ input-disable;
+ output-low;
+ };
+
+ usb_sw_sel_pm: usb-sw-sel-pm-state {
+ pins = "gpio2";
+ function = PMIC_GPIO_FUNC_NORMAL;
+ power-source = <PM8916_GPIO_VPH>;
+ input-disable;
+ output-high;
+ };
+
+ usb_sw_sel_pm_device: usb-sw-sel-pm-device-state {
+ pins = "gpio2";
+ function = PMIC_GPIO_FUNC_NORMAL;
+ power-source = <PM8916_GPIO_VPH>;
+ input-disable;
+ output-low;
+ };
+};
+
+&pm8916_mpps {
+ gpio-line-names =
+ "NC",
+ "WLAN_LED_CTRL",
+ "BT_LED_CTRL",
+ "NC";
+
+ pm8916_mpps_leds: pm8916-mpps-state {
+ pins = "mpp2", "mpp3";
+ function = "digital";
+ output-low;
+ };
+};
+
+&pm8916_resin {
+ linux,code = <KEY_POWER>;
+ status = "okay";
+};
+
+&pm8916_rpm_regulators {
+ pm8916_l17: l17 {
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+};
+
+&sdhc_1 {
+ status = "okay";
+};
+
+&sdhc_2 {
+ pinctrl-0 = <&sdc2_default &sdc2_cd_default>;
+ pinctrl-1 = <&sdc2_sleep &sdc2_cd_default>;
+ pinctrl-names = "default", "sleep";
+ cd-gpios = <&tlmm 38 GPIO_ACTIVE_LOW>;
+ status = "okay";
+};
+
+&sound {
+ pinctrl-0 = <&cdc_pdm_default &sec_mi2s_default>;
+ pinctrl-1 = <&cdc_pdm_sleep &sec_mi2s_sleep>;
+ pinctrl-names = "default", "sleep";
+ model = "HMIBSC";
+ audio-routing =
+ "AMIC2", "MIC BIAS Internal2",
+ "AMIC3", "MIC BIAS External1";
+ status = "okay";
+
+ quaternary-dai-link {
+ link-name = "ADV7533";
+ cpu {
+ sound-dai = <&lpass MI2S_QUATERNARY>;
+ };
+ codec {
+ sound-dai = <&adv_bridge 0>;
+ };
+ };
+
+ primary-dai-link {
+ link-name = "WCD";
+ cpu {
+ sound-dai = <&lpass MI2S_PRIMARY>;
+ };
+ codec {
+ sound-dai = <&lpass_codec 0>, <&pm8916_codec 0>;
+ };
+ };
+
+ tertiary-dai-link {
+ link-name = "WCD-Capture";
+ cpu {
+ sound-dai = <&lpass MI2S_TERTIARY>;
+ };
+ codec {
+ sound-dai = <&lpass_codec 1>, <&pm8916_codec 1>;
+ };
+ };
+};
+
+&tlmm {
+ pinctrl-0 = <&uart1_mux0_rs232_high &uart1_mux1_rs232_low>;
+ pinctrl-names = "default";
+
+ adv7533_int_active: adv533-int-active-state {
+ pins = "gpio31";
+ function = "gpio";
+ drive-strength = <16>;
+ bias-disable;
+ };
+
+ adv7533_int_suspend: adv7533-int-suspend-state {
+ pins = "gpio31";
+ function = "gpio";
+ drive-strength = <2>;
+ bias-disable;
+ };
+
+ adv7533_switch_active: adv7533-switch-active-state {
+ pins = "gpio32";
+ function = "gpio";
+ drive-strength = <16>;
+ bias-disable;
+ };
+
+ adv7533_switch_suspend: adv7533-switch-suspend-state {
+ pins = "gpio32";
+ function = "gpio";
+ drive-strength = <2>;
+ bias-disable;
+ };
+
+ msm_key_volp_n_default: msm-key-volp-n-default-state {
+ pins = "gpio107";
+ function = "gpio";
+ drive-strength = <8>;
+ bias-pull-up;
+ };
+
+ sdc2_cd_default: sdc2-cd-default-state {
+ pins = "gpio38";
+ function = "gpio";
+ drive-strength = <2>;
+ bias-disable;
+ };
+
+ /*
+ * UART1 being the debug console supports various modes of
+ * operation (RS-232/485/422) controlled via GPIOs configured
+ * mux as follows:
+ *
+ * gpio100 gpio99 UART mode
+ * 0 0 loopback
+ * 0 1 RS-232
+ * 1 0 RS-485
+ * 1 1 RS-422
+ *
+ * The default mode configured here is RS-232 mode.
+ */
+ uart1_mux0_rs232_high: uart1-mux0-rs232-state {
+ bootph-all;
+ pins = "gpio99";
+ function = "gpio";
+ drive-strength = <16>;
+ bias-disable;
+ output-high;
+ };
+
+ uart1_mux1_rs232_low: uart1-mux1-rs232-state {
+ bootph-all;
+ pins = "gpio100";
+ function = "gpio";
+ drive-strength = <16>;
+ bias-disable;
+ output-low;
+ };
+
+ usb_id_default: usb-id-default-state {
+ pins = "gpio110";
+ function = "gpio";
+ drive-strength = <8>;
+ bias-pull-up;
+ };
+};
+
+&usb {
+ extcon = <&usb_id>, <&usb_id>;
+ pinctrl-0 = <&usb_sw_sel_pm &usb_hub_reset_pm>;
+ pinctrl-1 = <&usb_sw_sel_pm_device &usb_hub_reset_pm_device>;
+ pinctrl-names = "default", "device";
+ status = "okay";
+};
+
+&usb_hs_phy {
+ extcon = <&usb_id>;
+};
+
+&wcnss {
+ firmware-name = "qcom/apq8016/wcnss.mbn";
+ status = "okay";
+};
+
+&wcnss_ctrl {
+ firmware-name = "qcom/apq8016/WCNSS_qcom_wlan_nv_sbc.bin";
+};
+
+&wcnss_iris {
+ compatible = "qcom,wcn3620";
+};
+
+&wcnss_mem {
+ status = "okay";
+};
+
+/* PINCTRL - additions to nodes defined in msm8916.dtsi */
+
+/*
+ * 2mA drive strength is not enough when connecting multiple
+ * I2C devices with different pull up resistors.
+ */
+&blsp_i2c4_default {
+ drive-strength = <16>;
+};
+
+&blsp_i2c6_default {
+ drive-strength = <16>;
+};
+
+&blsp_uart1_default {
+ bootph-all;
+};
+
+/* Enable CoreSight */
+&cti0 { status = "okay"; };
+&cti1 { status = "okay"; };
+&cti12 { status = "okay"; };
+&cti13 { status = "okay"; };
+&cti14 { status = "okay"; };
+&cti15 { status = "okay"; };
+&debug0 { status = "okay"; };
+&debug1 { status = "okay"; };
+&debug2 { status = "okay"; };
+&debug3 { status = "okay"; };
+&etf { status = "okay"; };
+&etm0 { status = "okay"; };
+&etm1 { status = "okay"; };
+&etm2 { status = "okay"; };
+&etm3 { status = "okay"; };
+&etr { status = "okay"; };
+&funnel0 { status = "okay"; };
+&funnel1 { status = "okay"; };
+&replicator { status = "okay"; };
+&stm { status = "okay"; };
+&tpiu { status = "okay"; };
diff --git a/arch/arm/dts/apq8096-db820c.dts b/arch/arm/dts/apq8096-db820c.dts
deleted file mode 100644
index e8148b3..0000000
--- a/arch/arm/dts/apq8096-db820c.dts
+++ /dev/null
@@ -1,1137 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Copyright (c) 2014-2016, The Linux Foundation. All rights reserved.
- */
-
-/dts-v1/;
-
-#include "msm8996.dtsi"
-#include "pm8994.dtsi"
-#include "pmi8994.dtsi"
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/leds/common.h>
-#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
-#include <dt-bindings/sound/qcom,q6afe.h>
-#include <dt-bindings/sound/qcom,q6asm.h>
-#include <dt-bindings/sound/qcom,wcd9335.h>
-
-/*
- * GPIO name legend: proper name = the GPIO line is used as GPIO
- * NC = not connected (pin out but not routed from the chip to
- * anything the board)
- * "[PER]" = pin is muxed for [peripheral] (not GPIO)
- * LSEC = Low Speed External Connector
- * P HSEC = Primary High Speed External Connector
- * S HSEC = Secondary High Speed External Connector
- * J14 = Camera Connector
- * TP = Test Points
- *
- * Line names are taken from the schematic "DragonBoard 820c",
- * drawing no: LM25-P2751-1
- *
- * For the lines routed to the external connectors the
- * lines are named after the 96Boards CE Specification 1.0,
- * Appendix "Expansion Connector Signal Description".
- *
- * When the 96Board naming of a line and the schematic name of
- * the same line are in conflict, the 96Board specification
- * takes precedence, which means that the external UART on the
- * LSEC is named UART0 while the schematic and SoC names this
- * UART3. This is only for the informational lines i.e. "[FOO]",
- * the GPIO named lines "GPIO-A" thru "GPIO-L" are the only
- * ones actually used for GPIO.
- */
-
-/ {
- model = "Qualcomm Technologies, Inc. DB820c";
- compatible = "arrow,apq8096-db820c", "qcom,apq8096-sbc", "qcom,apq8096";
-
- aliases {
- serial0 = &blsp2_uart2;
- serial1 = &blsp2_uart3;
- serial2 = &blsp1_uart2;
- i2c0 = &blsp1_i2c3;
- i2c1 = &blsp2_i2c1;
- i2c2 = &blsp2_i2c1;
- spi0 = &blsp1_spi1;
- spi1 = &blsp2_spi6;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- div1_mclk: divclk1 {
- compatible = "gpio-gate-clock";
- pinctrl-0 = <&audio_mclk>;
- pinctrl-names = "default";
- clocks = <&rpmcc RPM_SMD_DIV_CLK1>;
- #clock-cells = <0>;
- enable-gpios = <&pm8994_gpios 15 0>;
- };
-
- divclk4: divclk4 {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <32768>;
- clock-output-names = "divclk4";
-
- pinctrl-names = "default";
- pinctrl-0 = <&divclk4_pin_a>;
- };
-
- gpio-keys {
- compatible = "gpio-keys";
- autorepeat;
-
- pinctrl-names = "default";
- pinctrl-0 = <&volume_up_gpio>;
-
- button {
- label = "Volume Up";
- linux,code = <KEY_VOLUMEUP>;
- gpios = <&pm8994_gpios 2 GPIO_ACTIVE_LOW>;
- };
- };
-
- usb2_id: usb2-id {
- compatible = "linux,extcon-usb-gpio";
- id-gpios = <&pmi8994_gpios 6 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&usb2_vbus_det_gpio>;
- };
-
- usb3_id: usb3-id {
- compatible = "linux,extcon-usb-gpio";
- id-gpios = <&pm8994_gpios 22 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&usb3_vbus_det_gpio>;
- };
-
- vph_pwr: vph-pwr-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vph_pwr";
- regulator-always-on;
- regulator-boot-on;
-
- regulator-min-microvolt = <3700000>;
- regulator-max-microvolt = <3700000>;
- };
-
- wlan_en: wlan-en-1-8v {
- pinctrl-names = "default";
- pinctrl-0 = <&wlan_en_gpios>;
- compatible = "regulator-fixed";
- regulator-name = "wlan-en-regulator";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- gpio = <&pm8994_gpios 8 0>;
-
- /* WLAN card specific delay */
- startup-delay-us = <70000>;
- enable-active-high;
- };
-};
-
-&blsp1_i2c3 {
- /* On Low speed expansion: LS-I2C0 */
- status = "okay";
-};
-
-&blsp1_spi1 {
- /* On Low speed expansion */
- status = "okay";
-};
-
-&blsp1_uart2 {
- label = "BT-UART";
- status = "okay";
-
- bluetooth {
- compatible = "qcom,qca6174-bt";
-
- /* bt_disable_n gpio */
- enable-gpios = <&pm8994_gpios 19 GPIO_ACTIVE_HIGH>;
-
- clocks = <&divclk4>;
- };
-};
-
-&adsp_pil {
- status = "okay";
- firmware-name = "qcom/apq8096/adsp.mbn";
-};
-
-&blsp2_i2c1 {
- /* On High speed expansion: HS-I2C2 */
- status = "okay";
-};
-
-&blsp2_i2c1 {
- /* On Low speed expansion: LS-I2C1 */
- status = "okay";
-};
-
-&blsp2_spi6 {
- /* On High speed expansion */
- status = "okay";
-};
-
-&blsp2_uart2 {
- label = "LS-UART1";
- status = "okay";
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&blsp2_uart2_2pins_default>;
- pinctrl-1 = <&blsp2_uart2_2pins_sleep>;
-};
-
-&blsp2_uart3 {
- label = "LS-UART0";
- status = "disabled";
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&blsp2_uart3_4pins_default>;
- pinctrl-1 = <&blsp2_uart3_4pins_sleep>;
-};
-
-&camss {
- vdda-supply = <&vreg_l2a_1p25>;
-};
-
-&gpu {
- status = "okay";
-};
-
-&hsusb_phy1 {
- status = "okay";
-
- vdd-supply = <&vreg_l28a_0p925>;
- vdda-pll-supply = <&vreg_l12a_1p8>;
- vdda-phy-dpdm-supply = <&vreg_l24a_3p075>;
-};
-
-&hsusb_phy2 {
- status = "okay";
-
- vdd-supply = <&vreg_l28a_0p925>;
- vdda-pll-supply = <&vreg_l12a_1p8>;
- vdda-phy-dpdm-supply = <&vreg_l24a_3p075>;
-};
-
-&mdp {
- status = "okay";
-};
-
-&mdss {
- status = "okay";
-};
-
-&mdss_hdmi {
- status = "okay";
-
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&hdmi_hpd_active &hdmi_ddc_active>;
- pinctrl-1 = <&hdmi_hpd_suspend &hdmi_ddc_suspend>;
-
- core-vdda-supply = <&vreg_l12a_1p8>;
- core-vcc-supply = <&vreg_s4a_1p8>;
-};
-
-&mdss_hdmi_phy {
- status = "okay";
-
- vddio-supply = <&vreg_l12a_1p8>;
- vcca-supply = <&vreg_l28a_0p925>;
- #phy-cells = <0>;
-};
-
-&mmcc {
- vdd-gfx-supply = <&vdd_gfx>;
-};
-
-&mss_pil {
- status = "okay";
- pll-supply = <&vreg_l12a_1p8>;
- firmware-name = "qcom/apq8096/mba.mbn", "qcom/apq8096/modem.mbn";
-};
-
-&pm8994_resin {
- status = "okay";
- linux,code = <KEY_VOLUMEDOWN>;
-};
-
-&tlmm {
- gpio-line-names =
- "[SPI0_DOUT]", /* GPIO_0, BLSP1_SPI_MOSI, LSEC pin 14 */
- "[SPI0_DIN]", /* GPIO_1, BLSP1_SPI_MISO, LSEC pin 10 */
- "[SPI0_CS]", /* GPIO_2, BLSP1_SPI_CS_N, LSEC pin 12 */
- "[SPI0_SCLK]", /* GPIO_3, BLSP1_SPI_CLK, LSEC pin 8 */
- "[UART1_TxD]", /* GPIO_4, BLSP8_UART_TX, LSEC pin 11 */
- "[UART1_RxD]", /* GPIO_5, BLSP8_UART_RX, LSEC pin 13 */
- "[I2C1_SDA]", /* GPIO_6, BLSP8_I2C_SDA, LSEC pin 21 */
- "[I2C1_SCL]", /* GPIO_7, BLSP8_I2C_SCL, LSEC pin 19 */
- "GPIO-H", /* GPIO_8, LCD0_RESET_N, LSEC pin 30 */
- "TP93", /* GPIO_9 */
- "GPIO-G", /* GPIO_10, MDP_VSYNC_P, LSEC pin 29 */
- "[MDP_VSYNC_S]", /* GPIO_11, S HSEC pin 55 */
- "NC", /* GPIO_12 */
- "[CSI0_MCLK]", /* GPIO_13, CAM_MCLK0, P HSEC pin 15 */
- "[CAM_MCLK1]", /* GPIO_14, J14 pin 11 */
- "[CSI1_MCLK]", /* GPIO_15, CAM_MCLK2, P HSEC pin 17 */
- "TP99", /* GPIO_16 */
- "[I2C2_SDA]", /* GPIO_17, CCI_I2C_SDA0, P HSEC pin 34 */
- "[I2C2_SCL]", /* GPIO_18, CCI_I2C_SCL0, P HSEC pin 32 */
- "[CCI_I2C_SDA1]", /* GPIO_19, S HSEC pin 38 */
- "[CCI_I2C_SCL1]", /* GPIO_20, S HSEC pin 36 */
- "FLASH_STROBE_EN", /* GPIO_21, S HSEC pin 5 */
- "FLASH_STROBE_TRIG", /* GPIO_22, S HSEC pin 1 */
- "GPIO-K", /* GPIO_23, CAM2_RST_N, LSEC pin 33 */
- "GPIO-D", /* GPIO_24, LSEC pin 26 */
- "GPIO-I", /* GPIO_25, CAM0_RST_N, LSEC pin 31 */
- "GPIO-J", /* GPIO_26, CAM0_STANDBY_N, LSEC pin 32 */
- "BLSP6_I2C_SDA", /* GPIO_27 */
- "BLSP6_I2C_SCL", /* GPIO_28 */
- "GPIO-B", /* GPIO_29, TS0_RESET_N, LSEC pin 24 */
- "GPIO30", /* GPIO_30, S HSEC pin 4 */
- "HDMI_CEC", /* GPIO_31 */
- "HDMI_DDC_CLOCK", /* GPIO_32 */
- "HDMI_DDC_DATA", /* GPIO_33 */
- "HDMI_HOT_PLUG_DETECT", /* GPIO_34 */
- "PCIE0_RST_N", /* GPIO_35 */
- "PCIE0_CLKREQ_N", /* GPIO_36 */
- "PCIE0_WAKE", /* GPIO_37 */
- "SD_CARD_DET_N", /* GPIO_38 */
- "TSIF1_SYNC", /* GPIO_39, S HSEC pin 48 */
- "W_DISABLE_N", /* GPIO_40 */
- "[BLSP9_UART_TX]", /* GPIO_41 */
- "[BLSP9_UART_RX]", /* GPIO_42 */
- "[BLSP2_UART_CTS_N]", /* GPIO_43 */
- "[BLSP2_UART_RFR_N]", /* GPIO_44 */
- "[BLSP3_UART_TX]", /* GPIO_45 */
- "[BLSP3_UART_RX]", /* GPIO_46 */
- "[I2C0_SDA]", /* GPIO_47, LS_I2C0_SDA, LSEC pin 17 */
- "[I2C0_SCL]", /* GPIO_48, LS_I2C0_SCL, LSEC pin 15 */
- "[UART0_TxD]", /* GPIO_49, BLSP9_UART_TX, LSEC pin 5 */
- "[UART0_RxD]", /* GPIO_50, BLSP9_UART_RX, LSEC pin 7 */
- "[UART0_CTS]", /* GPIO_51, BLSP9_UART_CTS_N, LSEC pin 3 */
- "[UART0_RTS]", /* GPIO_52, BLSP9_UART_RFR_N, LSEC pin 9 */
- "[CODEC_INT1_N]", /* GPIO_53 */
- "[CODEC_INT2_N]", /* GPIO_54 */
- "[BLSP7_I2C_SDA]", /* GPIO_55 */
- "[BLSP7_I2C_SCL]", /* GPIO_56 */
- "MI2S_MCLK", /* GPIO_57, S HSEC pin 3 */
- "[PCM_CLK]", /* GPIO_58, QUA_MI2S_SCK, LSEC pin 18 */
- "[PCM_FS]", /* GPIO_59, QUA_MI2S_WS, LSEC pin 16 */
- "[PCM_DO]", /* GPIO_60, QUA_MI2S_DATA0, LSEC pin 20 */
- "[PCM_DI]", /* GPIO_61, QUA_MI2S_DATA1, LSEC pin 22 */
- "GPIO-E", /* GPIO_62, LSEC pin 27 */
- "TP87", /* GPIO_63 */
- "[CODEC_RST_N]", /* GPIO_64 */
- "[PCM1_CLK]", /* GPIO_65 */
- "[PCM1_SYNC]", /* GPIO_66 */
- "[PCM1_DIN]", /* GPIO_67 */
- "[PCM1_DOUT]", /* GPIO_68 */
- "AUDIO_REF_CLK", /* GPIO_69 */
- "SLIMBUS_CLK", /* GPIO_70 */
- "SLIMBUS_DATA0", /* GPIO_71 */
- "SLIMBUS_DATA1", /* GPIO_72 */
- "NC", /* GPIO_73 */
- "NC", /* GPIO_74 */
- "NC", /* GPIO_75 */
- "NC", /* GPIO_76 */
- "TP94", /* GPIO_77 */
- "NC", /* GPIO_78 */
- "TP95", /* GPIO_79 */
- "GPIO-A", /* GPIO_80, MEMS_RESET_N, LSEC pin 23 */
- "TP88", /* GPIO_81 */
- "TP89", /* GPIO_82 */
- "TP90", /* GPIO_83 */
- "TP91", /* GPIO_84 */
- "[SD_DAT0]", /* GPIO_85, BLSP12_SPI_MOSI, P HSEC pin 1 */
- "[SD_CMD]", /* GPIO_86, BLSP12_SPI_MISO, P HSEC pin 11 */
- "[SD_DAT3]", /* GPIO_87, BLSP12_SPI_CS_N, P HSEC pin 7 */
- "[SD_SCLK]", /* GPIO_88, BLSP12_SPI_CLK, P HSEC pin 9 */
- "TSIF1_CLK", /* GPIO_89, S HSEC pin 42 */
- "TSIF1_EN", /* GPIO_90, S HSEC pin 46 */
- "TSIF1_DATA", /* GPIO_91, S HSEC pin 44 */
- "NC", /* GPIO_92 */
- "TSIF2_CLK", /* GPIO_93, S HSEC pin 52 */
- "TSIF2_EN", /* GPIO_94, S HSEC pin 56 */
- "TSIF2_DATA", /* GPIO_95, S HSEC pin 54 */
- "TSIF2_SYNC", /* GPIO_96, S HSEC pin 58 */
- "NC", /* GPIO_97 */
- "CAM1_STANDBY_N", /* GPIO_98 */
- "NC", /* GPIO_99 */
- "NC", /* GPIO_100 */
- "[LCD1_RESET_N]", /* GPIO_101, S HSEC pin 51 */
- "BOOT_CONFIG1", /* GPIO_102 */
- "USB_HUB_RESET", /* GPIO_103 */
- "CAM1_RST_N", /* GPIO_104 */
- "NC", /* GPIO_105 */
- "NC", /* GPIO_106 */
- "NC", /* GPIO_107 */
- "NC", /* GPIO_108 */
- "NC", /* GPIO_109 */
- "NC", /* GPIO_110 */
- "NC", /* GPIO_111 */
- "NC", /* GPIO_112 */
- "PMI8994_BUA", /* GPIO_113 */
- "PCIE2_RST_N", /* GPIO_114 */
- "PCIE2_CLKREQ_N", /* GPIO_115 */
- "PCIE2_WAKE", /* GPIO_116 */
- "SSC_IRQ_0", /* GPIO_117 */
- "SSC_IRQ_1", /* GPIO_118 */
- "SSC_IRQ_2", /* GPIO_119 */
- "NC", /* GPIO_120 */
- "GPIO121", /* GPIO_121, S HSEC pin 2 */
- "NC", /* GPIO_122 */
- "SSC_IRQ_6", /* GPIO_123 */
- "SSC_IRQ_7", /* GPIO_124 */
- "GPIO-C", /* GPIO_125, TS_INT0, LSEC pin 25 */
- "BOOT_CONFIG5", /* GPIO_126 */
- "NC", /* GPIO_127 */
- "NC", /* GPIO_128 */
- "BOOT_CONFIG7", /* GPIO_129 */
- "PCIE1_RST_N", /* GPIO_130 */
- "PCIE1_CLKREQ_N", /* GPIO_131 */
- "PCIE1_WAKE", /* GPIO_132 */
- "GPIO-L", /* GPIO_133, CAM2_STANDBY_N, LSEC pin 34 */
- "NC", /* GPIO_134 */
- "NC", /* GPIO_135 */
- "BOOT_CONFIG8", /* GPIO_136 */
- "NC", /* GPIO_137 */
- "NC", /* GPIO_138 */
- "GPS_SSBI2", /* GPIO_139 */
- "GPS_SSBI1", /* GPIO_140 */
- "NC", /* GPIO_141 */
- "NC", /* GPIO_142 */
- "NC", /* GPIO_143 */
- "BOOT_CONFIG6", /* GPIO_144 */
- "NC", /* GPIO_145 */
- "NC", /* GPIO_146 */
- "NC", /* GPIO_147 */
- "NC", /* GPIO_148 */
- "NC"; /* GPIO_149 */
-
- sdc2_cd_on: sdc2-cd-on-state {
- pins = "gpio38";
- function = "gpio";
- bias-pull-up;
- drive-strength = <16>;
- };
-
- sdc2_cd_off: sdc2-cd-off-state {
- pins = "gpio38";
- function = "gpio";
- bias-pull-up;
- drive-strength = <2>;
- };
-
- hdmi_hpd_active: hdmi-hpd-active-state {
- pins = "gpio34";
- function = "hdmi_hot";
- bias-pull-down;
- drive-strength = <16>;
- };
-
- hdmi_hpd_suspend: hdmi-hpd-suspend-state {
- pins = "gpio34";
- function = "hdmi_hot";
- bias-pull-down;
- drive-strength = <2>;
- };
-
- hdmi_ddc_active: hdmi-ddc-active-state {
- pins = "gpio32", "gpio33";
- function = "hdmi_ddc";
- drive-strength = <2>;
- bias-pull-up;
- };
-
- hdmi_ddc_suspend: hdmi-ddc-suspend-state {
- pins = "gpio32", "gpio33";
- function = "hdmi_ddc";
- drive-strength = <2>;
- bias-pull-down;
- };
-};
-
-&pcie0 {
- status = "okay";
- perst-gpios = <&tlmm 35 GPIO_ACTIVE_LOW>;
- vddpe-3v3-supply = <&wlan_en>;
- vdda-supply = <&vreg_l28a_0p925>;
-};
-
-&pcie1 {
- status = "okay";
- perst-gpios = <&tlmm 130 GPIO_ACTIVE_LOW>;
- vdda-supply = <&vreg_l28a_0p925>;
-};
-
-&pcie2 {
- status = "okay";
- perst-gpios = <&tlmm 114 GPIO_ACTIVE_LOW>;
- vdda-supply = <&vreg_l28a_0p925>;
-};
-
-&pcie_phy {
- status = "okay";
-
- vdda-phy-supply = <&vreg_l28a_0p925>;
- vdda-pll-supply = <&vreg_l12a_1p8>;
-};
-
-&pm8994_gpios {
- gpio-line-names =
- "NC",
- "KEY_VOLP_N",
- "NC",
- "BL1_PWM",
- "GPIO-F", /* BL0_PWM, LSEC pin 28 */
- "BL1_EN",
- "NC",
- "WLAN_EN",
- "NC",
- "NC",
- "NC",
- "NC",
- "NC",
- "NC",
- "DIVCLK1",
- "DIVCLK2",
- "DIVCLK3",
- "DIVCLK4",
- "BT_EN",
- "PMIC_SLB",
- "PMIC_BUA",
- "USB_VBUS_DET";
-
- pinctrl-names = "default";
- pinctrl-0 = <&ls_exp_gpio_f &bt_en_gpios>;
-
- ls_exp_gpio_f: pm8994-gpio5-state {
- pinconf {
- pins = "gpio5";
- function = PMIC_GPIO_FUNC_NORMAL;
- output-low;
- power-source = <PM8994_GPIO_S4>; /* 1.8V */
- };
- };
-
- bt_en_gpios: bt-en-pios-state {
- pinconf {
- pins = "gpio19";
- function = PMIC_GPIO_FUNC_NORMAL;
- output-low;
- power-source = <PM8994_GPIO_S4>; /* 1.8V */
- qcom,drive-strength = <PMIC_GPIO_STRENGTH_LOW>;
- bias-pull-down;
- };
- };
-
- wlan_en_gpios: wlan-en-gpios-state {
- pinconf {
- pins = "gpio8";
- function = PMIC_GPIO_FUNC_NORMAL;
- output-low;
- power-source = <PM8994_GPIO_S4>; /* 1.8V */
- qcom,drive-strength = <PMIC_GPIO_STRENGTH_LOW>;
- bias-pull-down;
- };
- };
-
- audio_mclk: clk-div1-state {
- pinconf {
- pins = "gpio15";
- function = "func1";
- power-source = <PM8994_GPIO_S4>; /* 1.8V */
- };
- };
-
- volume_up_gpio: pm8996-gpio2-state {
- pinconf {
- pins = "gpio2";
- function = "normal";
- input-enable;
- drive-push-pull;
- bias-pull-up;
- qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>;
- power-source = <PM8994_GPIO_S4>; /* 1.8V */
- };
- };
-
- divclk4_pin_a: divclk4-state {
- pinconf {
- pins = "gpio18";
- function = PMIC_GPIO_FUNC_FUNC2;
-
- bias-disable;
- power-source = <PM8994_GPIO_S4>;
- };
- };
-
- usb3_vbus_det_gpio: pm8996-gpio22-state {
- pinconf {
- pins = "gpio22";
- function = PMIC_GPIO_FUNC_NORMAL;
- input-enable;
- bias-pull-down;
- qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>;
- power-source = <PM8994_GPIO_S4>; /* 1.8V */
- };
- };
-};
-
-&pm8994_mpps {
- gpio-line-names =
- "VDDPX_BIAS",
- "WIFI_LED",
- "NC",
- "BT_LED",
- "PM_MPP05",
- "PM_MPP06",
- "PM_MPP07",
- "NC";
-};
-
-&pm8994_spmi_regulators {
- qcom,saw-reg = <&saw3>;
- vdd_s11-supply = <&vph_pwr>;
-
- s9 {
- qcom,saw-slave;
- };
- s10 {
- qcom,saw-slave;
- };
- s11 {
- qcom,saw-leader;
- regulator-name = "VDD_APCC";
- regulator-always-on;
- regulator-min-microvolt = <980000>;
- regulator-max-microvolt = <980000>;
- };
-};
-
-&pmi8994_gpios {
- gpio-line-names =
- "NC",
- "SPKR_AMP_EN1",
- "SPKR_AMP_EN2",
- "TP61",
- "NC",
- "USB2_VBUS_DET",
- "NC",
- "NC",
- "NC",
- "NC";
-
- usb2_vbus_det_gpio: pmi8996-gpio6-state {
- pinconf {
- pins = "gpio6";
- function = PMIC_GPIO_FUNC_NORMAL;
- input-enable;
- bias-pull-down;
- qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>;
- power-source = <PM8994_GPIO_S4>; /* 1.8V */
- };
- };
-};
-
-&pmi8994_lpg {
- qcom,power-source = <1>;
-
- pinctrl-names = "default";
- pinctrl-0 = <&pmi8994_mpp2_userled4>;
-
- qcom,dtest = <0 0>,
- <0 0>,
- <0 0>,
- <4 1>;
-
- status = "okay";
-
- led@1 {
- reg = <1>;
- color = <LED_COLOR_ID_GREEN>;
- function = LED_FUNCTION_HEARTBEAT;
- function-enumerator = <1>;
-
- linux,default-trigger = "heartbeat";
- default-state = "on";
- };
-
- led@2 {
- reg = <2>;
- color = <LED_COLOR_ID_GREEN>;
- function = LED_FUNCTION_HEARTBEAT;
- function-enumerator = <0>;
- };
-
- led@3 {
- reg = <3>;
- color = <LED_COLOR_ID_GREEN>;
- function = LED_FUNCTION_HEARTBEAT;
- function-enumerator = <2>;
- };
-
- led@4 {
- reg = <4>;
- color = <LED_COLOR_ID_GREEN>;
- function = LED_FUNCTION_HEARTBEAT;
- function-enumerator = <3>;
- };
-};
-
-&pmi8994_mpps {
- pmi8994_mpp2_userled4: mpp2-userled4-state {
- pins = "mpp2";
- function = "sink";
-
- output-low;
- qcom,dtest = <4>;
- };
-};
-
-&pmi8994_spmi_regulators {
- vdd_s2-supply = <&vph_pwr>;
-
- vdd_gfx: s2 {
- regulator-name = "VDD_GFX";
- regulator-min-microvolt = <980000>;
- regulator-max-microvolt = <980000>;
- };
-};
-
-&rpm_requests {
- regulators-0 {
- compatible = "qcom,rpm-pm8994-regulators";
-
- vdd_s1-supply = <&vph_pwr>;
- vdd_s2-supply = <&vph_pwr>;
- vdd_s3-supply = <&vph_pwr>;
- vdd_s4-supply = <&vph_pwr>;
- vdd_s5-supply = <&vph_pwr>;
- vdd_s6-supply = <&vph_pwr>;
- vdd_s7-supply = <&vph_pwr>;
- vdd_s8-supply = <&vph_pwr>;
- vdd_s9-supply = <&vph_pwr>;
- vdd_s10-supply = <&vph_pwr>;
- vdd_s11-supply = <&vph_pwr>;
- vdd_s12-supply = <&vph_pwr>;
- vdd_l1-supply = <&vreg_s1b_1p025>;
- vdd_l2_l26_l28-supply = <&vreg_s3a_1p3>;
- vdd_l3_l11-supply = <&vreg_s3a_1p3>;
- vdd_l4_l27_l31-supply = <&vreg_s3a_1p3>;
- vdd_l5_l7-supply = <&vreg_s5a_2p15>;
- vdd_l6_l12_l32-supply = <&vreg_s5a_2p15>;
- vdd_l8_l16_l30-supply = <&vph_pwr>;
- vdd_l9_l10_l18_l22-supply = <&vph_pwr_bbyp>;
- vdd_l13_l19_l23_l24-supply = <&vph_pwr_bbyp>;
- vdd_l14_l15-supply = <&vreg_s5a_2p15>;
- vdd_l17_l29-supply = <&vph_pwr_bbyp>;
- vdd_l20_l21-supply = <&vph_pwr_bbyp>;
- vdd_l25-supply = <&vreg_s3a_1p3>;
- vdd_lvs1_2-supply = <&vreg_s4a_1p8>;
-
- vreg_s3a_1p3: s3 {
- regulator-name = "vreg_s3a_1p3";
- regulator-min-microvolt = <1300000>;
- regulator-max-microvolt = <1300000>;
- };
-
- /**
- * 1.8v required on LS expansion
- * for mezzanine boards
- */
- vreg_s4a_1p8: s4 {
- regulator-name = "vreg_s4a_1p8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-always-on;
- };
- vreg_s5a_2p15: s5 {
- regulator-name = "vreg_s5a_2p15";
- regulator-min-microvolt = <2150000>;
- regulator-max-microvolt = <2150000>;
- };
- vreg_s7a_1p0: s7 {
- regulator-name = "vreg_s7a_1p0";
- regulator-min-microvolt = <800000>;
- regulator-max-microvolt = <800000>;
- };
-
- vreg_l1a_1p0: l1 {
- regulator-name = "vreg_l1a_1p0";
- regulator-min-microvolt = <1000000>;
- regulator-max-microvolt = <1000000>;
- };
- vreg_l2a_1p25: l2 {
- regulator-name = "vreg_l2a_1p25";
- regulator-min-microvolt = <1250000>;
- regulator-max-microvolt = <1250000>;
- };
- vreg_l3a_0p875: l3 {
- regulator-name = "vreg_l3a_0p875";
- regulator-min-microvolt = <850000>;
- regulator-max-microvolt = <850000>;
- };
- vreg_l4a_1p225: l4 {
- regulator-name = "vreg_l4a_1p225";
- regulator-min-microvolt = <1225000>;
- regulator-max-microvolt = <1225000>;
- };
- vreg_l6a_1p2: l6 {
- regulator-name = "vreg_l6a_1p2";
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1200000>;
- };
- vreg_l8a_1p8: l8 {
- regulator-name = "vreg_l8a_1p8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- };
- vreg_l9a_1p8: l9 {
- regulator-name = "vreg_l9a_1p8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- };
- vreg_l10a_1p8: l10 {
- regulator-name = "vreg_l10a_1p8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- };
- vreg_l11a_1p15: l11 {
- regulator-name = "vreg_l11a_1p15";
- regulator-min-microvolt = <1150000>;
- regulator-max-microvolt = <1150000>;
- };
- vreg_l12a_1p8: l12 {
- regulator-name = "vreg_l12a_1p8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- };
- vreg_l13a_2p95: l13 {
- regulator-name = "vreg_l13a_2p95";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <2950000>;
- };
- vreg_l14a_1p8: l14 {
- regulator-name = "vreg_l14a_1p8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- };
- vreg_l15a_1p8: l15 {
- regulator-name = "vreg_l15a_1p8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- };
- vreg_l16a_2p7: l16 {
- regulator-name = "vreg_l16a_2p7";
- regulator-min-microvolt = <2700000>;
- regulator-max-microvolt = <2700000>;
- };
- vreg_l17a_2p8: l17 {
- regulator-name = "vreg_l17a_2p8";
- regulator-min-microvolt = <2500000>;
- regulator-max-microvolt = <2500000>;
- };
- vreg_l18a_2p85: l18 {
- regulator-name = "vreg_l18a_2p85";
- regulator-min-microvolt = <2700000>;
- regulator-max-microvolt = <2900000>;
- };
- vreg_l19a_2p8: l19 {
- regulator-name = "vreg_l19a_2p8";
- regulator-min-microvolt = <3000000>;
- regulator-max-microvolt = <3000000>;
- };
- vreg_l20a_2p95: l20 {
- regulator-name = "vreg_l20a_2p95";
- regulator-min-microvolt = <2950000>;
- regulator-max-microvolt = <2950000>;
- regulator-allow-set-load;
- };
- vreg_l21a_2p95: l21 {
- regulator-name = "vreg_l21a_2p95";
- regulator-min-microvolt = <2950000>;
- regulator-max-microvolt = <2950000>;
- regulator-allow-set-load;
- regulator-system-load = <200000>;
- };
- vreg_l22a_3p0: l22 {
- regulator-name = "vreg_l22a_3p0";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- };
- vreg_l23a_2p8: l23 {
- regulator-name = "vreg_l23a_2p8";
- regulator-min-microvolt = <2800000>;
- regulator-max-microvolt = <2800000>;
- };
- vreg_l24a_3p075: l24 {
- regulator-name = "vreg_l24a_3p075";
- regulator-min-microvolt = <3075000>;
- regulator-max-microvolt = <3075000>;
- };
- vreg_l25a_1p2: l25 {
- regulator-name = "vreg_l25a_1p2";
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1200000>;
- regulator-allow-set-load;
- };
- vreg_l26a_0p8: l27 {
- regulator-name = "vreg_l26a_0p8";
- regulator-min-microvolt = <1000000>;
- regulator-max-microvolt = <1000000>;
- };
- vreg_l28a_0p925: l28 {
- regulator-name = "vreg_l28a_0p925";
- regulator-min-microvolt = <925000>;
- regulator-max-microvolt = <925000>;
- regulator-allow-set-load;
- };
- vreg_l29a_2p8: l29 {
- regulator-name = "vreg_l29a_2p8";
- regulator-min-microvolt = <2800000>;
- regulator-max-microvolt = <2800000>;
- };
- vreg_l30a_1p8: l30 {
- regulator-name = "vreg_l30a_1p8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- };
- vreg_l32a_1p8: l32 {
- regulator-name = "vreg_l32a_1p8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- };
-
- vreg_lvs1a_1p8: lvs1 {
- regulator-name = "vreg_lvs1a_1p8";
- };
-
- vreg_lvs2a_1p8: lvs2 {
- regulator-name = "vreg_lvs2a_1p8";
- };
- };
-
- regulators-1 {
- compatible = "qcom,rpm-pmi8994-regulators";
-
- vdd_s1-supply = <&vph_pwr>;
- vdd_s2-supply = <&vph_pwr>;
- vdd_s3-supply = <&vph_pwr>;
- vdd_bst_byp-supply = <&vph_pwr>;
-
- vph_pwr_bbyp: boost-bypass {
- regulator-name = "vph_pwr_bbyp";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- };
-
- vreg_s1b_1p025: s1 {
- regulator-name = "vreg_s1b_1p025";
- regulator-min-microvolt = <1025000>;
- regulator-max-microvolt = <1025000>;
- };
- };
-};
-
-&sdhc2 {
- /* External SD card */
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&sdc2_state_on &sdc2_cd_on>;
- pinctrl-1 = <&sdc2_state_off &sdc2_cd_off>;
- cd-gpios = <&tlmm 38 GPIO_ACTIVE_LOW>;
- vmmc-supply = <&vreg_l21a_2p95>;
- vqmmc-supply = <&vreg_l13a_2p95>;
- status = "okay";
-};
-
-&q6asmdai {
- dai@0 {
- reg = <0>;
- };
-
- dai@1 {
- reg = <1>;
- };
-
- dai@2 {
- reg = <2>;
- };
-};
-
-&slim_msm {
- status = "okay";
-
- slim@1 {
- reg = <1>;
- #address-cells = <2>;
- #size-cells = <0>;
-
- tasha_ifd: tas-ifd@0,0 {
- compatible = "slim217,1a0";
- reg = <0 0>;
- };
-
- wcd9335: codec@1,0 {
- compatible = "slim217,1a0";
- reg = <1 0>;
-
- clock-names = "mclk", "slimbus";
- clocks = <&div1_mclk>,
- <&rpmcc RPM_SMD_BB_CLK1>;
- interrupt-parent = <&tlmm>;
- interrupts = <54 IRQ_TYPE_LEVEL_HIGH>,
- <53 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "intr1", "intr2";
- interrupt-controller;
- #interrupt-cells = <1>;
-
- pinctrl-0 = <&cdc_reset_active &wcd_intr_default>;
- pinctrl-names = "default";
-
- reset-gpios = <&tlmm 64 GPIO_ACTIVE_LOW>;
- slim-ifc-dev = <&tasha_ifd>;
-
- #sound-dai-cells = <1>;
-
- vdd-buck-supply = <&vreg_s4a_1p8>;
- vdd-buck-sido-supply = <&vreg_s4a_1p8>;
- vdd-tx-supply = <&vreg_s4a_1p8>;
- vdd-rx-supply = <&vreg_s4a_1p8>;
- vdd-io-supply = <&vreg_s4a_1p8>;
- };
- };
-};
-
-&sound {
- compatible = "qcom,apq8096-sndcard";
- model = "DB820c";
- audio-routing = "RX_BIAS", "MCLK",
- "MM_DL1", "MultiMedia1 Playback",
- "MM_DL2", "MultiMedia2 Playback",
- "MultiMedia3 Capture", "MM_UL3";
-
- mm1-dai-link {
- link-name = "MultiMedia1";
- cpu {
- sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA1>;
- };
- };
-
- mm2-dai-link {
- link-name = "MultiMedia2";
- cpu {
- sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA2>;
- };
- };
-
- mm3-dai-link {
- link-name = "MultiMedia3";
- cpu {
- sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA3>;
- };
- };
-
- hdmi-dai-link {
- link-name = "HDMI";
- cpu {
- sound-dai = <&q6afedai HDMI_RX>;
- };
-
- platform {
- sound-dai = <&q6routing>;
- };
-
- codec {
- sound-dai = <&mdss_hdmi 0>;
- };
- };
-
- slim-dai-link {
- link-name = "SLIM Playback";
- cpu {
- sound-dai = <&q6afedai SLIMBUS_6_RX>;
- };
-
- platform {
- sound-dai = <&q6routing>;
- };
-
- codec {
- sound-dai = <&wcd9335 AIF4_PB>;
- };
- };
-
- slimcap-dai-link {
- link-name = "SLIM Capture";
- cpu {
- sound-dai = <&q6afedai SLIMBUS_0_TX>;
- };
-
- platform {
- sound-dai = <&q6routing>;
- };
-
- codec {
- sound-dai = <&wcd9335 AIF1_CAP>;
- };
- };
-};
-
-&ufsphy {
- status = "okay";
-
- vdda-phy-supply = <&vreg_l28a_0p925>;
- vdda-pll-supply = <&vreg_l12a_1p8>;
-};
-
-&ufshc {
- status = "okay";
-
- vcc-supply = <&vreg_l20a_2p95>;
- vccq-supply = <&vreg_l25a_1p2>;
- vccq2-supply = <&vreg_s4a_1p8>;
- vdd-hba-supply = <&vreg_l25a_1p2>;
-
- vcc-max-microamp = <600000>;
- vccq-max-microamp = <450000>;
- vccq2-max-microamp = <450000>;
-};
-
-&usb2 {
- status = "okay";
- extcon = <&usb2_id>;
-};
-
-&usb2_dwc3 {
- extcon = <&usb2_id>;
- dr_mode = "otg";
- maximum-speed = "high-speed";
-};
-
-&usb3 {
- status = "okay";
- extcon = <&usb3_id>;
-};
-
-&usb3_dwc3 {
- extcon = <&usb3_id>;
- dr_mode = "otg";
-};
-
-&usb3phy {
- status = "okay";
-
- vdda-phy-supply = <&vreg_l28a_0p925>;
- vdda-pll-supply = <&vreg_l12a_1p8>;
-};
-
-&venus {
- status = "okay";
-};
diff --git a/arch/arm/dts/fsl-ls1028a-kontron-sl28-var1.dts b/arch/arm/dts/fsl-ls1028a-kontron-sl28-var1.dts
deleted file mode 100644
index 7cd29ab..0000000
--- a/arch/arm/dts/fsl-ls1028a-kontron-sl28-var1.dts
+++ /dev/null
@@ -1,59 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Device Tree file for the Kontron SMARC-sAL28 board.
- *
- * This is for the network variant 1 which has one ethernet port. It is
- * different than the base variant, which also has one port, but here the
- * port is connected via RGMII. This port is not TSN aware.
- * None of the four SerDes lanes are used by the module, instead they are
- * all led out to the carrier for customer use.
- *
- * Copyright (C) 2021 Michael Walle <michael@walle.cc>
- *
- */
-
-/dts-v1/;
-#include "fsl-ls1028a-kontron-sl28.dts"
-#include <dt-bindings/net/qca-ar803x.h>
-
-/ {
- model = "Kontron SMARC-sAL28 (4 Lanes)";
- compatible = "kontron,sl28-var1", "kontron,sl28", "fsl,ls1028a";
-};
-
-&enetc_mdio_pf3 {
- /* Delete unused phy node */
- /delete-node/ ethernet-phy@5;
-
- phy0: ethernet-phy@4 {
- reg = <0x4>;
- eee-broken-1000t;
- eee-broken-100tx;
- qca,clk-out-frequency = <125000000>;
- qca,clk-out-strength = <AR803X_STRENGTH_FULL>;
- qca,keep-pll-enabled;
- vddio-supply = <&vddio>;
-
- vddio: vddio-regulator {
- regulator-name = "VDDIO";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- };
-
- vddh: vddh-regulator {
- regulator-name = "VDDH";
- };
- };
-};
-
-&enetc_port0 {
- status = "disabled";
- /* Delete the phy-handle to the old phy0 label */
- /delete-property/ phy-handle;
-};
-
-&enetc_port1 {
- phy-handle = <&phy0>;
- phy-mode = "rgmii-id";
- status = "okay";
-};
diff --git a/arch/arm/dts/fsl-ls1028a-kontron-sl28-var2.dts b/arch/arm/dts/fsl-ls1028a-kontron-sl28-var2.dts
deleted file mode 100644
index 330e34f93..0000000
--- a/arch/arm/dts/fsl-ls1028a-kontron-sl28-var2.dts
+++ /dev/null
@@ -1,65 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Device Tree file for the Kontron SMARC-sAL28 board.
- *
- * This is for the network variant 2 which has two ethernet ports. These
- * ports are connected to the internal switch.
- *
- * Copyright (C) 2021 Michael Walle <michael@walle.cc>
- *
- */
-
-/dts-v1/;
-#include "fsl-ls1028a-kontron-sl28.dts"
-
-/ {
- model = "Kontron SMARC-sAL28 (TSN-on-module)";
- compatible = "kontron,sl28-var2", "kontron,sl28", "fsl,ls1028a";
-};
-
-&enetc_mdio_pf3 {
- phy1: ethernet-phy@4 {
- reg = <0x4>;
- eee-broken-1000t;
- eee-broken-100tx;
- };
-};
-
-&enetc_port0 {
- status = "disabled";
- /*
- * In the base device tree the PHY at address 5 was assigned for
- * this port. On this module this PHY is connected to a switch
- * port instead. Therefore, delete the phy-handle property here.
- */
- /delete-property/ phy-handle;
-};
-
-&enetc_port2 {
- status = "okay";
-};
-
-&mscc_felix {
- status = "okay";
-};
-
-&mscc_felix_port0 {
- label = "swp0";
- managed = "in-band-status";
- phy-handle = <&phy0>;
- phy-mode = "sgmii";
- status = "okay";
-};
-
-&mscc_felix_port1 {
- label = "swp1";
- managed = "in-band-status";
- phy-handle = <&phy1>;
- phy-mode = "sgmii";
- status = "okay";
-};
-
-&mscc_felix_port4 {
- ethernet = <&enetc_port2>;
- status = "okay";
-};
diff --git a/arch/arm/dts/fsl-ls1028a-kontron-sl28-var3.dts b/arch/arm/dts/fsl-ls1028a-kontron-sl28-var3.dts
deleted file mode 100644
index 0c8b2af..0000000
--- a/arch/arm/dts/fsl-ls1028a-kontron-sl28-var3.dts
+++ /dev/null
@@ -1,15 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Device Tree file for the Kontron SMARC-sAL28 board.
- *
- * Copyright (C) 2019 Michael Walle <michael@walle.cc>
- *
- */
-
-/dts-v1/;
-#include "fsl-ls1028a-kontron-sl28.dts"
-
-/ {
- model = "Kontron SMARC-sAL28 (Single PHY)";
- compatible = "kontron,sl28-var3", "kontron,sl28", "fsl,ls1028a";
-};
diff --git a/arch/arm/dts/fsl-ls1028a-kontron-sl28-var4.dts b/arch/arm/dts/fsl-ls1028a-kontron-sl28-var4.dts
deleted file mode 100644
index 9b5e92f..0000000
--- a/arch/arm/dts/fsl-ls1028a-kontron-sl28-var4.dts
+++ /dev/null
@@ -1,47 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Device Tree file for the Kontron SMARC-sAL28 board.
- *
- * This is for the network variant 4 which has two ethernet ports. It
- * extends the base and provides one more port connected via RGMII.
- *
- * Copyright (C) 2021 Michael Walle <michael@walle.cc>
- *
- */
-
-/dts-v1/;
-#include "fsl-ls1028a-kontron-sl28.dts"
-#include <dt-bindings/net/qca-ar803x.h>
-
-/ {
- model = "Kontron SMARC-sAL28 (Dual PHY)";
- compatible = "kontron,sl28-var4", "kontron,sl28", "fsl,ls1028a";
-};
-
-&enetc_mdio_pf3 {
- phy1: ethernet-phy@4 {
- reg = <0x4>;
- eee-broken-1000t;
- eee-broken-100tx;
- qca,clk-out-frequency = <125000000>;
- qca,clk-out-strength = <AR803X_STRENGTH_FULL>;
- qca,keep-pll-enabled;
- vddio-supply = <&vddio>;
-
- vddio: vddio-regulator {
- regulator-name = "VDDIO";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- };
-
- vddh: vddh-regulator {
- regulator-name = "VDDH";
- };
- };
-};
-
-&enetc_port1 {
- phy-handle = <&phy1>;
- phy-mode = "rgmii-id";
- status = "okay";
-};
diff --git a/arch/arm/dts/fsl-ls1028a-kontron-sl28.dts b/arch/arm/dts/fsl-ls1028a-kontron-sl28.dts
deleted file mode 100644
index ab713b4..0000000
--- a/arch/arm/dts/fsl-ls1028a-kontron-sl28.dts
+++ /dev/null
@@ -1,308 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Device Tree file for the Kontron SMARC-sAL28 board.
- *
- * Copyright (C) 2021 Michael Walle <michael@walle.cc>
- *
- */
-
-/dts-v1/;
-#include "fsl-ls1028a.dtsi"
-#include <dt-bindings/interrupt-controller/irq.h>
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "Kontron SMARC-sAL28";
- compatible = "kontron,sl28", "fsl,ls1028a";
-
- aliases {
- crypto = &crypto;
- serial0 = &duart0;
- serial1 = &duart1;
- serial2 = &lpuart1;
- spi0 = &fspi;
- spi1 = &dspi2;
- mmc0 = &esdhc1;
- mmc1 = &esdhc;
- rtc0 = &rtc;
- rtc1 = &ftm_alarm0;
- };
-
- buttons0 {
- compatible = "gpio-keys";
-
- power-button {
- interrupts-extended = <&sl28cpld_intc
- 4 IRQ_TYPE_EDGE_BOTH>;
- linux,code = <KEY_POWER>;
- label = "Power";
- };
-
- sleep-button {
- interrupts-extended = <&sl28cpld_intc
- 5 IRQ_TYPE_EDGE_BOTH>;
- linux,code = <KEY_SLEEP>;
- label = "Sleep";
- };
- };
-
- buttons1 {
- compatible = "gpio-keys-polled";
- poll-interval = <200>;
-
- lid-switch {
- linux,input-type = <EV_SW>;
- linux,code = <SW_LID>;
- gpios = <&sl28cpld_gpio3 4 GPIO_ACTIVE_LOW>;
- label = "Lid";
- };
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-};
-
-&can0 {
- status = "okay";
-};
-
-&dspi2 {
- status = "okay";
-};
-
-&duart0 {
- status = "okay";
-};
-
-&duart1 {
- status = "okay";
-};
-
-&enetc_mdio_pf3 {
- phy0: ethernet-phy@5 {
- reg = <0x5>;
- eee-broken-1000t;
- eee-broken-100tx;
- };
-};
-
-&enetc_port0 {
- phy-handle = <&phy0>;
- phy-mode = "sgmii";
- managed = "in-band-status";
- status = "okay";
-};
-
-&esdhc {
- sd-uhs-sdr104;
- sd-uhs-sdr50;
- sd-uhs-sdr25;
- sd-uhs-sdr12;
- status = "okay";
-};
-
-&esdhc1 {
- mmc-hs200-1_8v;
- mmc-hs400-1_8v;
- bus-width = <8>;
- status = "okay";
-};
-
-&fspi {
- status = "okay";
-
- flash@0 {
- compatible = "jedec,spi-nor";
- m25p,fast-read;
- spi-max-frequency = <133000000>;
- reg = <0>;
- /* The following setting enables 1-1-2 (CMD-ADDR-DATA) mode */
- spi-rx-bus-width = <2>; /* 2 SPI Rx lines */
- spi-tx-bus-width = <1>; /* 1 SPI Tx line */
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- partition@0 {
- reg = <0x000000 0x010000>;
- label = "rcw";
- read-only;
- };
-
- partition@10000 {
- reg = <0x010000 0x1d0000>;
- label = "failsafe bootloader";
- read-only;
- };
-
- partition@200000 {
- reg = <0x200000 0x010000>;
- label = "configuration store";
- };
-
- partition@210000 {
- reg = <0x210000 0x1d0000>;
- label = "bootloader";
- };
-
- partition@3e0000 {
- reg = <0x3e0000 0x020000>;
- label = "bootloader environment";
- };
- };
- };
-};
-
-&gpio1 {
- gpio-line-names =
- "", "", "", "", "", "", "", "",
- "", "", "", "", "", "", "", "",
- "", "", "", "", "", "", "TDO", "TCK",
- "", "", "", "", "", "", "", "";
-};
-
-&gpio2 {
- gpio-line-names =
- "", "", "", "", "", "", "TMS", "TDI",
- "", "", "", "", "", "", "", "",
- "", "", "", "", "", "", "", "",
- "", "", "", "", "", "", "", "";
-};
-
-&i2c0 {
- status = "okay";
-
- rtc: rtc@32 {
- compatible = "microcrystal,rv8803";
- reg = <0x32>;
- };
-
- sl28cpld@4a {
- compatible = "kontron,sl28cpld";
- reg = <0x4a>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- watchdog@4 {
- compatible = "kontron,sl28cpld-wdt";
- reg = <0x4>;
- kontron,assert-wdt-timeout-pin;
- };
-
- hwmon@b {
- compatible = "kontron,sl28cpld-fan";
- reg = <0xb>;
- };
-
- sl28cpld_pwm0: pwm@c {
- compatible = "kontron,sl28cpld-pwm";
- reg = <0xc>;
- #pwm-cells = <2>;
- };
-
- sl28cpld_pwm1: pwm@e {
- compatible = "kontron,sl28cpld-pwm";
- reg = <0xe>;
- #pwm-cells = <2>;
- };
-
- sl28cpld_gpio0: gpio@10 {
- compatible = "kontron,sl28cpld-gpio";
- reg = <0x10>;
- interrupts-extended = <&gpio2 6
- IRQ_TYPE_EDGE_FALLING>;
-
- gpio-controller;
- #gpio-cells = <2>;
- gpio-line-names =
- "GPIO0_CAM0_PWR_N", "GPIO1_CAM1_PWR_N",
- "GPIO2_CAM0_RST_N", "GPIO3_CAM1_RST_N",
- "GPIO4_HDA_RST_N", "GPIO5_PWM_OUT",
- "GPIO6_TACHIN", "GPIO7";
-
- interrupt-controller;
- #interrupt-cells = <2>;
- };
-
- sl28cpld_gpio1: gpio@15 {
- compatible = "kontron,sl28cpld-gpio";
- reg = <0x15>;
- interrupts-extended = <&gpio2 6
- IRQ_TYPE_EDGE_FALLING>;
-
- gpio-controller;
- #gpio-cells = <2>;
- gpio-line-names =
- "GPIO8", "GPIO9", "GPIO10", "GPIO11",
- "", "", "", "";
-
- interrupt-controller;
- #interrupt-cells = <2>;
- };
-
- sl28cpld_gpio2: gpio@1a {
- compatible = "kontron,sl28cpld-gpo";
- reg = <0x1a>;
-
- gpio-controller;
- #gpio-cells = <2>;
- gpio-line-names =
- "LCD0 voltage enable",
- "LCD0 backlight enable",
- "eMMC reset", "LVDS bridge reset",
- "LVDS bridge power-down",
- "SDIO power enable",
- "", "";
- };
-
- sl28cpld_gpio3: gpio@1b {
- compatible = "kontron,sl28cpld-gpi";
- reg = <0x1b>;
-
- gpio-controller;
- #gpio-cells = <2>;
- gpio-line-names =
- "Power button", "Force recovery", "Sleep",
- "Battery low", "Lid state", "Charging",
- "Charger present", "";
- };
-
- sl28cpld_intc: interrupt-controller@1c {
- compatible = "kontron,sl28cpld-intc";
- reg = <0x1c>;
- interrupts-extended = <&gpio2 6
- IRQ_TYPE_EDGE_FALLING>;
-
- interrupt-controller;
- #interrupt-cells = <2>;
- };
- };
-
- eeprom@50 {
- compatible = "atmel,24c32";
- reg = <0x50>;
- pagesize = <32>;
- };
-};
-
-&i2c3 {
- status = "okay";
-};
-
-&i2c4 {
- status = "okay";
-
- eeprom@50 {
- compatible = "atmel,24c32";
- reg = <0x50>;
- pagesize = <32>;
- };
-};
-
-&lpuart1 {
- status = "okay";
-};
diff --git a/arch/arm/dts/imx6dl-brppt2.dts b/arch/arm/dts/imx6dl-brppt2.dts
index 575bfac..05c843c 100644
--- a/arch/arm/dts/imx6dl-brppt2.dts
+++ b/arch/arm/dts/imx6dl-brppt2.dts
@@ -17,7 +17,7 @@
#include "imx6dl.dtsi"
#include "imx6qdl-u-boot.dtsi"
#include <dt-bindings/pwm/pwm.h>
-#include <include/dt-bindings/gpio/gpio.h>
+#include <dt-bindings/gpio/gpio.h>
/ {
model = "PPT50";
diff --git a/arch/arm/dts/imx6qdl-hummingboard2-emmc-som-v15-u-boot.dtsi b/arch/arm/dts/imx6qdl-hummingboard2-emmc-som-v15-u-boot.dtsi
index e9b188e..358cf8a 100644
--- a/arch/arm/dts/imx6qdl-hummingboard2-emmc-som-v15-u-boot.dtsi
+++ b/arch/arm/dts/imx6qdl-hummingboard2-emmc-som-v15-u-boot.dtsi
@@ -1,6 +1,7 @@
// SPDX-License-Identifier: GPL-2.0+
#include "imx6qdl-u-boot.dtsi"
+#include "imx6qdl-sr-som-u-boot.dtsi"
/ {
board-detect {
diff --git a/arch/arm/dts/imx6qdl-sr-som-u-boot.dtsi b/arch/arm/dts/imx6qdl-sr-som-u-boot.dtsi
new file mode 100644
index 0000000..0bd7df0
--- /dev/null
+++ b/arch/arm/dts/imx6qdl-sr-som-u-boot.dtsi
@@ -0,0 +1,49 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+
+#include <dt-bindings/gpio/gpio.h>
+
+&fec {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_microsom_enet_ar8035>;
+ phy-handle = <&phy>;
+ phy-mode = "rgmii-id";
+
+ /*
+ * The PHY seems to require a long-enough reset duration to avoid
+ * some rare issues where the PHY gets stuck in an inconsistent and
+ * non-functional state at boot-up. 10ms proved to be fine .
+ */
+ phy-reset-duration = <10>;
+ phy-reset-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>;
+ status = "okay";
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ethernet-phy@0 {
+ status = "disabled";
+ };
+
+ ethernet-phy@1 {
+ status = "disabled";
+ };
+
+ ethernet-phy@4 {
+ status = "disabled";
+ };
+
+ phy: ethernet-phy@ffffffff {
+ /*
+ * The PHY can appear either:
+ * - AR8035: at address 0 or 4
+ * - ADIN1300: at address 1
+ * Actual address being detected at runtime.
+ */
+ reg = <0xffffffff>;
+ qca,clk-out-frequency = <125000000>;
+ qca,smarteee-tw-us-1g = <24>;
+ adi,phy-output-clock = "125mhz-free-running";
+ };
+ };
+};
diff --git a/arch/arm/dts/imx8mm-beacon-kit.dts b/arch/arm/dts/imx8mm-beacon-kit.dts
deleted file mode 100644
index 74a7b0c..0000000
--- a/arch/arm/dts/imx8mm-beacon-kit.dts
+++ /dev/null
@@ -1,19 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0 OR MIT)
-/*
- * Copyright 2020 Compass Electronics Group, LLC
- */
-
-/dts-v1/;
-
-#include "imx8mm.dtsi"
-#include "imx8mm-beacon-som.dtsi"
-#include "imx8mm-beacon-baseboard.dtsi"
-
-/ {
- model = "Beacon EmbeddedWorks i.MX8M Mini Development Kit";
- compatible = "beacon,imx8mm-beacon-kit", "fsl,imx8mm";
-
- chosen {
- stdout-path = &uart2;
- };
-};
diff --git a/arch/arm/dts/imx8mm-beacon-som.dtsi b/arch/arm/dts/imx8mm-beacon-som.dtsi
deleted file mode 100644
index cf07987..0000000
--- a/arch/arm/dts/imx8mm-beacon-som.dtsi
+++ /dev/null
@@ -1,461 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0 OR MIT)
-/*
- * Copyright 2020 Compass Electronics Group, LLC
- */
-
-/ {
- aliases {
- rtc0 = &rtc;
- rtc1 = &snvs_rtc;
- };
-
- usdhc1_pwrseq: usdhc1_pwrseq {
- compatible = "mmc-pwrseq-simple";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_usdhc1_gpio>;
- reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
- clocks = <&osc_32k>;
- clock-names = "ext_clock";
- post-power-on-delay-ms = <80>;
- };
-
- memory@40000000 {
- device_type = "memory";
- reg = <0x0 0x40000000 0 0x80000000>;
- };
-};
-
-&A53_0 {
- cpu-supply = <&buck2_reg>;
-};
-
-&A53_1 {
- cpu-supply = <&buck2_reg>;
-};
-
-&A53_2 {
- cpu-supply = <&buck2_reg>;
-};
-
-&A53_3 {
- cpu-supply = <&buck2_reg>;
-};
-
-&ddrc {
- operating-points-v2 = <&ddrc_opp_table>;
-
- ddrc_opp_table: opp-table {
- compatible = "operating-points-v2";
-
- opp-25M {
- opp-hz = /bits/ 64 <25000000>;
- };
-
- opp-100M {
- opp-hz = /bits/ 64 <100000000>;
- };
-
- opp-750M {
- opp-hz = /bits/ 64 <750000000>;
- };
- };
-};
-
-&fec1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_fec1>;
- phy-mode = "rgmii-id";
- phy-handle = <ðphy0>;
- fsl,magic-packet;
- status = "okay";
-
- mdio {
- #address-cells = <1>;
- #size-cells = <0>;
-
- ethphy0: ethernet-phy@0 {
- compatible = "ethernet-phy-ieee802.3-c22";
- reg = <0>;
- };
- };
-};
-
-&flexspi {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_flexspi>;
- status = "okay";
-
- flash@0 {
- reg = <0>;
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "jedec,spi-nor";
- spi-max-frequency = <80000000>;
- spi-tx-bus-width = <1>;
- spi-rx-bus-width = <4>;
- };
-};
-
-&i2c1 {
- clock-frequency = <400000>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_i2c1>;
- status = "okay";
-
- pmic@4b {
- compatible = "rohm,bd71847";
- reg = <0x4b>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pmic>;
- interrupt-parent = <&gpio1>;
- interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
- rohm,reset-snvs-powered;
-
- #clock-cells = <0>;
- clocks = <&osc_32k 0>;
- clock-output-names = "clk-32k-out";
-
- regulators {
- buck1_reg: BUCK1 {
- regulator-name = "buck1";
- regulator-min-microvolt = <700000>;
- regulator-max-microvolt = <1300000>;
- regulator-boot-on;
- regulator-always-on;
- regulator-ramp-delay = <1250>;
- };
-
- buck2_reg: BUCK2 {
- regulator-name = "buck2";
- regulator-min-microvolt = <700000>;
- regulator-max-microvolt = <1300000>;
- regulator-boot-on;
- regulator-always-on;
- regulator-ramp-delay = <1250>;
- rohm,dvs-run-voltage = <1000000>;
- rohm,dvs-idle-voltage = <900000>;
- };
-
- buck3_reg: BUCK3 {
- // BUCK5 in datasheet
- regulator-name = "buck3";
- regulator-min-microvolt = <700000>;
- regulator-max-microvolt = <1350000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- buck4_reg: BUCK4 {
- // BUCK6 in datasheet
- regulator-name = "buck4";
- regulator-min-microvolt = <3000000>;
- regulator-max-microvolt = <3300000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- buck5_reg: BUCK5 {
- // BUCK7 in datasheet
- regulator-name = "buck5";
- regulator-min-microvolt = <1605000>;
- regulator-max-microvolt = <1995000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- buck6_reg: BUCK6 {
- // BUCK8 in datasheet
- regulator-name = "buck6";
- regulator-min-microvolt = <800000>;
- regulator-max-microvolt = <1400000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- ldo1_reg: LDO1 {
- regulator-name = "ldo1";
- regulator-min-microvolt = <1600000>;
- regulator-max-microvolt = <3300000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- ldo2_reg: LDO2 {
- regulator-name = "ldo2";
- regulator-min-microvolt = <800000>;
- regulator-max-microvolt = <900000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- ldo3_reg: LDO3 {
- regulator-name = "ldo3";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- ldo4_reg: LDO4 {
- regulator-name = "ldo4";
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <1800000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- ldo6_reg: LDO6 {
- regulator-name = "ldo6";
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <1800000>;
- regulator-boot-on;
- regulator-always-on;
- };
- };
- };
-};
-
-&i2c3 {
- clock-frequency = <400000>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_i2c3>;
- status = "okay";
-
- eeprom@50 {
- compatible = "microchip,24c64", "atmel,24c64";
- pagesize = <32>;
- read-only; /* Manufacturing EEPROM programmed at factory */
- reg = <0x50>;
- };
-
- rtc: rtc@51 {
- compatible = "nxp,pcf85263";
- reg = <0x51>;
- };
-};
-
-&uart1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart1>;
- assigned-clocks = <&clk IMX8MM_CLK_UART1>;
- assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_80M>;
- uart-has-rtscts;
- status = "okay";
-
- bluetooth {
- compatible = "brcm,bcm43438-bt";
- shutdown-gpios = <&gpio2 6 GPIO_ACTIVE_HIGH>;
- host-wakeup-gpios = <&gpio2 8 GPIO_ACTIVE_HIGH>;
- device-wakeup-gpios = <&gpio2 7 GPIO_ACTIVE_HIGH>;
- clocks = <&osc_32k>;
- max-speed = <4000000>;
- clock-names = "extclk";
- };
-};
-
-&usdhc1 {
- #address-cells = <1>;
- #size-cells = <0>;
- pinctrl-names = "default", "state_100mhz", "state_200mhz";
- pinctrl-0 = <&pinctrl_usdhc1>;
- pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
- pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
- bus-width = <4>;
- non-removable;
- cap-power-off-card;
- keep-power-in-suspend;
- mmc-pwrseq = <&usdhc1_pwrseq>;
- status = "okay";
-
- brcmf: bcrmf@1 {
- reg = <1>;
- compatible = "brcm,bcm4329-fmac";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_wlan>;
- interrupt-parent = <&gpio2>;
- interrupts = <9 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "host-wake";
- };
-};
-
-&usdhc3 {
- pinctrl-names = "default", "state_100mhz", "state_200mhz";
- pinctrl-0 = <&pinctrl_usdhc3>;
- pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
- pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
- bus-width = <8>;
- non-removable;
- status = "okay";
-};
-
-&wdog1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_wdog>;
- fsl,ext-reset-output;
- status = "okay";
-};
-
-&iomuxc {
- pinctrl_fec1: fec1grp {
- fsl,pins = <
- MX8MM_IOMUXC_ENET_MDC_ENET1_MDC 0x3
- MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO 0x3
- MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f
- MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f
- MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f
- MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f
- MX8MM_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91
- MX8MM_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91
- MX8MM_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91
- MX8MM_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91
- MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f
- MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91
- MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91
- MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f
- MX8MM_IOMUXC_SAI2_RXC_GPIO4_IO22 0x19
- >;
- };
-
- pinctrl_i2c1: i2c1grp {
- fsl,pins = <
- MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL 0x400001c3
- MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c3
- >;
- };
-
- pinctrl_i2c3: i2c3grp {
- fsl,pins = <
- MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL 0x400001c3
- MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c3
- >;
- };
-
- pinctrl_flexspi: flexspigrp {
- fsl,pins = <
- MX8MM_IOMUXC_NAND_ALE_QSPI_A_SCLK 0x1c2
- MX8MM_IOMUXC_NAND_CE0_B_QSPI_A_SS0_B 0x82
- MX8MM_IOMUXC_NAND_DATA00_QSPI_A_DATA0 0x82
- MX8MM_IOMUXC_NAND_DATA01_QSPI_A_DATA1 0x82
- MX8MM_IOMUXC_NAND_DATA02_QSPI_A_DATA2 0x82
- MX8MM_IOMUXC_NAND_DATA03_QSPI_A_DATA3 0x82
- >;
- };
-
- pinctrl_pmic: pmicirqgrp {
- fsl,pins = <
- MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x141
- >;
- };
-
- pinctrl_uart1: uart1grp {
- fsl,pins = <
- MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX 0x140
- MX8MM_IOMUXC_UART1_TXD_UART1_DCE_TX 0x140
- MX8MM_IOMUXC_UART3_RXD_UART1_DCE_CTS_B 0x140
- MX8MM_IOMUXC_UART3_TXD_UART1_DCE_RTS_B 0x140
- MX8MM_IOMUXC_SD1_DATA4_GPIO2_IO6 0x19
- MX8MM_IOMUXC_SD1_DATA5_GPIO2_IO7 0x19
- MX8MM_IOMUXC_SD1_DATA6_GPIO2_IO8 0x19
- MX8MM_IOMUXC_GPIO1_IO00_ANAMIX_REF_CLK_32K 0x141
- >;
- };
-
- pinctrl_usdhc1_gpio: usdhc1gpiogrp {
- fsl,pins = <
- MX8MM_IOMUXC_SD1_RESET_B_GPIO2_IO10 0x41
- >;
- };
-
- pinctrl_usdhc1: usdhc1grp {
- fsl,pins = <
- MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x190
- MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d0
- MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d0
- MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d0
- MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d0
- MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d0
- >;
- };
-
- pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
- fsl,pins = <
- MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x194
- MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d4
- MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d4
- MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d4
- MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d4
- MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d4
- >;
- };
-
- pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {
- fsl,pins = <
- MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x196
- MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d6
- MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d6
- MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d6
- MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d6
- MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d6
- >;
- };
-
- pinctrl_usdhc3: usdhc3grp {
- fsl,pins = <
- MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x190
- MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d0
- MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d0
- MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d0
- MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d0
- MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d0
- MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d0
- MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d0
- MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d0
- MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d0
- MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x190
- >;
- };
-
- pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {
- fsl,pins = <
- MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x194
- MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d4
- MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d4
- MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d4
- MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d4
- MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d4
- MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d4
- MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d4
- MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d4
- MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d4
- MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x194
- >;
- };
-
- pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {
- fsl,pins = <
- MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x196
- MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d6
- MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d6
- MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d6
- MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d6
- MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d6
- MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d6
- MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d6
- MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d6
- MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d6
- MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x196
- >;
- };
-
- pinctrl_wdog: wdoggrp {
- fsl,pins = <
- MX8MM_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0x166
- >;
- };
-
- pinctrl_wlan: wlangrp {
- fsl,pins = <
- MX8MM_IOMUXC_SD1_DATA7_GPIO2_IO9 0x111
- >;
- };
-};
diff --git a/arch/arm/dts/imx8mm-u-boot.dtsi b/arch/arm/dts/imx8mm-u-boot.dtsi
index 06f2f73..6ab8f66 100644
--- a/arch/arm/dts/imx8mm-u-boot.dtsi
+++ b/arch/arm/dts/imx8mm-u-boot.dtsi
@@ -5,7 +5,6 @@
/ {
binman: binman {
- multiple-images;
};
#ifdef CONFIG_OPTEE
@@ -43,56 +42,61 @@
};
&binman {
- u-boot-spl-ddr {
- align = <4>;
- align-size = <4>;
- filename = "u-boot-spl-ddr.bin";
- pad-byte = <0xff>;
+ filename = "flash.bin";
+ section {
+ pad-byte = <0x00>;
- u-boot-spl {
- align-end = <4>;
- filename = "u-boot-spl.bin";
- };
-
- ddr-1d-imem-fw {
- filename = "lpddr4_pmu_train_1d_imem.bin";
- align-end = <4>;
+#ifdef CONFIG_FSPI_CONF_HEADER
+ fspi_conf_block {
+ filename = CONFIG_FSPI_CONF_FILE;
type = "blob-ext";
+ size = <0x1000>;
};
+#endif
- ddr-1d-dmem-fw {
- filename = "lpddr4_pmu_train_1d_dmem.bin";
- align-end = <4>;
- type = "blob-ext";
- };
+ nxp-imx8mimage {
+ filename = "u-boot-spl-mkimage.bin";
+ nxp,boot-from = "sd";
+ nxp,rom-version = <1>;
+ nxp,loader-address = <CONFIG_SPL_TEXT_BASE>;
+ args; /* Needed by mkimage etype superclass */
- ddr-2d-imem-fw {
- filename = "lpddr4_pmu_train_2d_imem.bin";
- align-end = <4>;
- type = "blob-ext";
- };
-
- ddr-2d-dmem-fw {
- filename = "lpddr4_pmu_train_2d_dmem.bin";
- align-end = <4>;
- type = "blob-ext";
- };
- };
-
- spl {
- filename = "spl.bin";
-
- mkimage {
- args = "-n spl/u-boot-spl.cfgout -T imx8mimage -e 0x7e1000";
-
- blob {
+ section {
+ align = <4>;
+ align-size = <4>;
filename = "u-boot-spl-ddr.bin";
+ pad-byte = <0xff>;
+
+ u-boot-spl {
+ align-end = <4>;
+ filename = "u-boot-spl.bin";
+ };
+
+ ddr-1d-imem-fw {
+ filename = "lpddr4_pmu_train_1d_imem.bin";
+ align-end = <4>;
+ type = "blob-ext";
+ };
+
+ ddr-1d-dmem-fw {
+ filename = "lpddr4_pmu_train_1d_dmem.bin";
+ align-end = <4>;
+ type = "blob-ext";
+ };
+
+ ddr-2d-imem-fw {
+ filename = "lpddr4_pmu_train_2d_imem.bin";
+ align-end = <4>;
+ type = "blob-ext";
+ };
+
+ ddr-2d-dmem-fw {
+ filename = "lpddr4_pmu_train_2d_dmem.bin";
+ align-end = <4>;
+ type = "blob-ext";
+ };
};
};
- };
-
- itb {
- filename = "u-boot.itb";
fit {
description = "Configuration to load ATF before U-Boot";
@@ -101,6 +105,11 @@
#endif
fit,fdt-list = "of-list";
#address-cells = <1>;
+#ifdef CONFIG_FSPI_CONF_HEADER
+ offset = <0x58C00>;
+#else
+ offset = <0x57c00>;
+#endif
images {
uboot {
@@ -166,43 +175,6 @@
};
};
};
-
- imx-boot {
- filename = "flash.bin";
- pad-byte = <0x00>;
-
-#ifdef CONFIG_FSPI_CONF_HEADER
- fspi_conf_block {
- filename = CONFIG_FSPI_CONF_FILE;
- type = "blob-ext";
- size = <0x1000>;
- };
-
- spl {
- filename = "spl.bin";
- offset = <0x1000>;
- type = "blob-ext";
- };
-
- binman_uboot: uboot {
- filename = "u-boot.itb";
- offset = <0x58C00>;
- type = "blob-ext";
- };
-#else
- spl {
- filename = "spl.bin";
- offset = <0x0>;
- type = "blob-ext";
- };
-
- binman_uboot: uboot {
- filename = "u-boot.itb";
- offset = <0x57c00>;
- type = "blob-ext";
- };
-#endif
- };
};
&clk {
diff --git a/arch/arm/dts/imx8mm-verdin-dev.dtsi b/arch/arm/dts/imx8mm-verdin-dev.dtsi
deleted file mode 100644
index 3c4b8ca..0000000
--- a/arch/arm/dts/imx8mm-verdin-dev.dtsi
+++ /dev/null
@@ -1,160 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-/*
- * Copyright 2022 Toradex
- */
-
-/ {
- sound_card: sound-card {
- compatible = "simple-audio-card";
- simple-audio-card,bitclock-master = <&dailink_master>;
- simple-audio-card,format = "i2s";
- simple-audio-card,frame-master = <&dailink_master>;
- simple-audio-card,mclk-fs = <256>;
- simple-audio-card,name = "imx8mm-nau8822";
- simple-audio-card,routing =
- "Headphones", "LHP",
- "Headphones", "RHP",
- "Speaker", "LSPK",
- "Speaker", "RSPK",
- "Line Out", "AUXOUT1",
- "Line Out", "AUXOUT2",
- "LAUX", "Line In",
- "RAUX", "Line In",
- "LMICP", "Mic In",
- "RMICP", "Mic In";
- simple-audio-card,widgets =
- "Headphones", "Headphones",
- "Line Out", "Line Out",
- "Speaker", "Speaker",
- "Microphone", "Mic In",
- "Line", "Line In";
-
- dailink_master: simple-audio-card,codec {
- clocks = <&clk IMX8MM_CLK_SAI2_ROOT>;
- sound-dai = <&nau8822_1a>;
- };
-
- simple-audio-card,cpu {
- sound-dai = <&sai2>;
- };
- };
-};
-
-/* Verdin SPI_1 */
-&ecspi2 {
- status = "okay";
-};
-
-/* EEPROM on display adapter boards */
-&eeprom_display_adapter {
- status = "okay";
-};
-
-/* EEPROM on Verdin Development board */
-&eeprom_carrier_board {
- status = "okay";
-};
-
-&fec1 {
- status = "okay";
-};
-
-/* Verdin QSPI_1 */
-&flexspi {
- status = "okay";
-};
-
-/* Current measurement into module VCC */
-&hwmon {
- status = "okay";
-};
-
-&hwmon_temp {
- vs-supply = <®_1p8v>;
- status = "okay";
-};
-
-&i2c3 {
- status = "okay";
-};
-
-&gpio_expander_21 {
- status = "okay";
-};
-
-/* Verdin I2C_1 */
-&i2c4 {
- status = "okay";
-
- /* Audio Codec */
- nau8822_1a: audio-codec@1a {
- compatible = "nuvoton,nau8822";
- reg = <0x1a>;
- #sound-dai-cells = <0>;
- };
-};
-
-/* Verdin PCIE_1 */
-&pcie0 {
- status = "okay";
-};
-
-&pcie_phy {
- status = "okay";
-};
-
-/* Verdin PWM_3_DSI */
-&pwm1 {
- status = "okay";
-};
-
-/* Verdin PWM_1 */
-&pwm2 {
- status = "okay";
-};
-
-/* Verdin PWM_2 */
-&pwm3 {
- status = "okay";
-};
-
-/* Verdin I2S_1 */
-&sai2 {
- status = "okay";
-};
-
-/* Verdin UART_3 */
-&uart1 {
- status = "okay";
-};
-
-/* Verdin UART_1, connector X50 through RS485 transceiver */
-&uart2 {
- linux,rs485-enabled-at-boot-time;
- rs485-rts-active-low;
- rs485-rx-during-tx;
- status = "okay";
-};
-
-/* Verdin UART_2 */
-&uart3 {
- status = "okay";
-};
-
-/* Verdin USB_1 */
-&usbotg1 {
- disable-over-current;
- status = "okay";
-};
-
-/* Verdin USB_2 */
-&usbotg2 {
- disable-over-current;
- status = "okay";
-};
-
-/* Limit frequency on dev board due to long traces and bad signal integrity */
-&usdhc2 {
- max-frequency = <100000000>;
- status = "okay";
-};
diff --git a/arch/arm/dts/imx8mm-verdin-wifi-dev-u-boot.dtsi b/arch/arm/dts/imx8mm-verdin-wifi-dev-u-boot.dtsi
index 38db560..90183af 100644
--- a/arch/arm/dts/imx8mm-verdin-wifi-dev-u-boot.dtsi
+++ b/arch/arm/dts/imx8mm-verdin-wifi-dev-u-boot.dtsi
@@ -35,8 +35,12 @@
bootph-pre-ram;
};
-&binman_uboot {
- offset = <0x5fc00>;
+&binman {
+ section {
+ fit {
+ offset = <0x5fc00>;
+ };
+ };
};
&gpio1 {
@@ -60,6 +64,11 @@
ctrl-sleep-moci-hog {
bootph-pre-ram;
+ gpio-hog;
+ output-high;
+ gpios = <1 GPIO_ACTIVE_HIGH>;
+ line-name = "CTRL_SLEEP_MOCI#";
+
};
};
diff --git a/arch/arm/dts/imx8mm-verdin-wifi-dev.dts b/arch/arm/dts/imx8mm-verdin-wifi-dev.dts
deleted file mode 100644
index ef95202..0000000
--- a/arch/arm/dts/imx8mm-verdin-wifi-dev.dts
+++ /dev/null
@@ -1,18 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-/*
- * Copyright 2022 Toradex
- */
-
-/dts-v1/;
-
-#include "imx8mm-verdin.dtsi"
-#include "imx8mm-verdin-wifi.dtsi"
-#include "imx8mm-verdin-dev.dtsi"
-
-/ {
- model = "Toradex Verdin iMX8M Mini WB on Verdin Development Board";
- compatible = "toradex,verdin-imx8mm-wifi-dev",
- "toradex,verdin-imx8mm-wifi",
- "toradex,verdin-imx8mm",
- "fsl,imx8mm";
-};
diff --git a/arch/arm/dts/imx8mm-verdin-wifi.dtsi b/arch/arm/dts/imx8mm-verdin-wifi.dtsi
deleted file mode 100644
index 017db9e..0000000
--- a/arch/arm/dts/imx8mm-verdin-wifi.dtsi
+++ /dev/null
@@ -1,94 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-/*
- * Copyright 2022 Toradex
- */
-
-/ {
- reg_wifi_en: regulator-wifi-en {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio3 25 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_wifi_pwr_en>;
- regulator-max-microvolt = <3300000>;
- regulator-min-microvolt = <3300000>;
- regulator-name = "PDn_AW-CM276NF";
- startup-delay-us = <2000>;
- };
-};
-
-&gpio3 {
- gpio-line-names = "SODIMM_52",
- "SODIMM_54",
- "SODIMM_64",
- "SODIMM_21",
- "SODIMM_206",
- "SODIMM_76",
- "SODIMM_56",
- "SODIMM_58",
- "SODIMM_60",
- "SODIMM_62",
- "",
- "",
- "",
- "",
- "SODIMM_66",
- "SODIMM_17",
- "",
- "",
- "",
- "SODIMM_244",
- "",
- "SODIMM_48",
- "SODIMM_44",
- "SODIMM_42",
- "SODIMM_46";
-};
-
-&gpio4 {
- gpio-line-names = "SODIMM_102",
- "SODIMM_90",
- "SODIMM_92",
- "SODIMM_94",
- "SODIMM_96",
- "SODIMM_100",
- "",
- "",
- "",
- "",
- "SODIMM_120",
- "SODIMM_104",
- "SODIMM_106",
- "SODIMM_108",
- "SODIMM_112",
- "SODIMM_114",
- "SODIMM_116",
- "",
- "SODIMM_118",
- "",
- "SODIMM_88",
- "SODIMM_149",
- "SODIMM_147",
- "SODIMM_36",
- "SODIMM_32",
- "SODIMM_30",
- "SODIMM_34",
- "SODIMM_38",
- "SODIMM_252",
- "SODIMM_133",
- "SODIMM_135",
- "SODIMM_129";
-};
-
-/* On-module Wi-Fi */
-&usdhc3 {
- bus-width = <4>;
- keep-power-in-suspend;
- non-removable;
- pinctrl-names = "default", "state_100mhz", "state_200mhz";
- pinctrl-0 = <&pinctrl_usdhc3>, <&pinctrl_wifi_ctrl>;
- pinctrl-1 = <&pinctrl_usdhc3_100mhz>, <&pinctrl_wifi_ctrl>;
- pinctrl-2 = <&pinctrl_usdhc3_200mhz>, <&pinctrl_wifi_ctrl>;
- vmmc-supply = <®_wifi_en>;
- status = "okay";
-};
diff --git a/arch/arm/dts/imx8mm-verdin.dtsi b/arch/arm/dts/imx8mm-verdin.dtsi
deleted file mode 100644
index 6f08115..0000000
--- a/arch/arm/dts/imx8mm-verdin.dtsi
+++ /dev/null
@@ -1,1319 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-/*
- * Copyright 2022 Toradex
- */
-
-#include <dt-bindings/phy/phy-imx8-pcie.h>
-#include <dt-bindings/pwm/pwm.h>
-#include "imx8mm.dtsi"
-
-/ {
- chosen {
- stdout-path = &uart1;
- };
-
- aliases {
- rtc0 = &rtc_i2c;
- rtc1 = &snvs_rtc;
- };
-
- backlight: backlight {
- compatible = "pwm-backlight";
- brightness-levels = <0 45 63 88 119 158 203 255>;
- default-brightness-level = <4>;
- /* Verdin I2S_2_D_OUT (DSI_1_BKL_EN/DSI_1_BKL_EN_LVDS, SODIMM 46) */
- enable-gpios = <&gpio3 24 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_i2s_2_d_out_dsi_1_bkl_en>;
- power-supply = <®_3p3v>;
- /* Verdin PWM_3_DSI/PWM_3_DSI_LVDS (SODIMM 19) */
- pwms = <&pwm1 0 6666667 PWM_POLARITY_INVERTED>;
- status = "disabled";
- };
-
- /* Fixed clock dedicated to SPI CAN controller */
- clk40m: oscillator {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <40000000>;
- };
-
- gpio-keys {
- compatible = "gpio-keys";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_gpio_keys>;
-
- key-wakeup {
- debounce-interval = <10>;
- /* Verdin CTRL_WAKE1_MICO# (SODIMM 252) */
- gpios = <&gpio4 28 GPIO_ACTIVE_LOW>;
- label = "Wake-Up";
- linux,code = <KEY_WAKEUP>;
- wakeup-source;
- };
- };
-
- hdmi_connector: hdmi-connector {
- compatible = "hdmi-connector";
- ddc-i2c-bus = <&i2c2>;
- /* Verdin PWM_3_DSI (SODIMM 19) */
- hpd-gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
- label = "hdmi";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pwm_3_dsi_hpd_gpio>;
- type = "a";
- status = "disabled";
- };
-
- panel_lvds: panel-lvds {
- compatible = "panel-lvds";
- backlight = <&backlight>;
- data-mapping = "vesa-24";
- status = "disabled";
- };
-
- /* Carrier Board Supplies */
- reg_1p8v: regulator-1p8v {
- compatible = "regulator-fixed";
- regulator-max-microvolt = <1800000>;
- regulator-min-microvolt = <1800000>;
- regulator-name = "+V1.8_SW";
- };
-
- reg_3p3v: regulator-3p3v {
- compatible = "regulator-fixed";
- regulator-max-microvolt = <3300000>;
- regulator-min-microvolt = <3300000>;
- regulator-name = "+V3.3_SW";
- };
-
- reg_5p0v: regulator-5p0v {
- compatible = "regulator-fixed";
- regulator-max-microvolt = <5000000>;
- regulator-min-microvolt = <5000000>;
- regulator-name = "+V5_SW";
- };
-
- /* Non PMIC On-module Supplies */
- reg_ethphy: regulator-ethphy {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio2 20 GPIO_ACTIVE_HIGH>; /* PMIC_EN_ETH */
- off-on-delay-us = <500000>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_reg_eth>;
- regulator-always-on;
- regulator-boot-on;
- regulator-max-microvolt = <3300000>;
- regulator-min-microvolt = <3300000>;
- regulator-name = "On-module +V3.3_ETH";
- startup-delay-us = <200000>;
- };
-
- reg_usb_otg1_vbus: regulator-usb-otg1 {
- compatible = "regulator-fixed";
- enable-active-high;
- /* Verdin USB_1_EN (SODIMM 155) */
- gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_reg_usb1_en>;
- regulator-max-microvolt = <5000000>;
- regulator-min-microvolt = <5000000>;
- regulator-name = "USB_1_EN";
- };
-
- reg_usb_otg2_vbus: regulator-usb-otg2 {
- compatible = "regulator-fixed";
- enable-active-high;
- /* Verdin USB_2_EN (SODIMM 185) */
- gpio = <&gpio1 14 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_reg_usb2_en>;
- regulator-max-microvolt = <5000000>;
- regulator-min-microvolt = <5000000>;
- regulator-name = "USB_2_EN";
- };
-
- reg_usdhc2_vmmc: regulator-usdhc2 {
- compatible = "regulator-fixed";
- enable-active-high;
- /* Verdin SD_1_PWR_EN (SODIMM 76) */
- gpio = <&gpio3 5 GPIO_ACTIVE_HIGH>;
- off-on-delay-us = <100000>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_usdhc2_pwr_en>;
- regulator-max-microvolt = <3300000>;
- regulator-min-microvolt = <3300000>;
- regulator-name = "+V3.3_SD";
- startup-delay-us = <2000>;
- };
-
- reserved-memory {
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- /* Use the kernel configuration settings instead */
- /delete-node/ linux,cma;
- };
-};
-
-&A53_0 {
- cpu-supply = <®_vdd_arm>;
-};
-
-&A53_1 {
- cpu-supply = <®_vdd_arm>;
-};
-
-&A53_2 {
- cpu-supply = <®_vdd_arm>;
-};
-
-&A53_3 {
- cpu-supply = <®_vdd_arm>;
-};
-
-&cpu_alert0 {
- temperature = <95000>;
-};
-
-&cpu_crit0 {
- temperature = <105000>;
-};
-
-&ddrc {
- operating-points-v2 = <&ddrc_opp_table>;
-
- ddrc_opp_table: opp-table {
- compatible = "operating-points-v2";
-
- opp-25000000 {
- opp-hz = /bits/ 64 <25000000>;
- };
-
- opp-100000000 {
- opp-hz = /bits/ 64 <100000000>;
- };
-
- opp-750000000 {
- opp-hz = /bits/ 64 <750000000>;
- };
- };
-};
-
-/* Verdin SPI_1 */
-&ecspi2 {
- #address-cells = <1>;
- #size-cells = <0>;
- cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_ecspi2>;
-};
-
-/* Verdin CAN_1 (On-module) */
-&ecspi3 {
- #address-cells = <1>;
- #size-cells = <0>;
- cs-gpios = <&gpio5 25 GPIO_ACTIVE_LOW>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_ecspi3>;
- status = "okay";
-
- can1: can@0 {
- compatible = "microchip,mcp251xfd";
- clocks = <&clk40m>;
- interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_LOW>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_can1_int>;
- reg = <0>;
- spi-max-frequency = <8500000>;
- };
-};
-
-/* Verdin ETH_1 (On-module PHY) */
-&fec1 {
- fsl,magic-packet;
- phy-handle = <ðphy0>;
- phy-mode = "rgmii-id";
- phy-supply = <®_ethphy>;
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&pinctrl_fec1>;
- pinctrl-1 = <&pinctrl_fec1_sleep>;
-
- mdio {
- #address-cells = <1>;
- #size-cells = <0>;
-
- ethphy0: ethernet-phy@7 {
- compatible = "ethernet-phy-ieee802.3-c22";
- interrupt-parent = <&gpio1>;
- interrupts = <10 IRQ_TYPE_LEVEL_LOW>;
- micrel,led-mode = <0>;
- reg = <7>;
- };
- };
-};
-
-/* Verdin QSPI_1 */
-&flexspi {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_flexspi0>;
-};
-
-&gpio1 {
- gpio-line-names = "SODIMM_216",
- "SODIMM_19",
- "",
- "",
- "",
- "",
- "",
- "",
- "SODIMM_220",
- "SODIMM_222",
- "",
- "SODIMM_218",
- "SODIMM_155",
- "SODIMM_157",
- "SODIMM_185",
- "SODIMM_187";
-};
-
-&gpio2 {
- gpio-line-names = "",
- "",
- "",
- "",
- "",
- "",
- "",
- "",
- "",
- "",
- "",
- "",
- "SODIMM_84",
- "SODIMM_78",
- "SODIMM_74",
- "SODIMM_80",
- "SODIMM_82",
- "SODIMM_70",
- "SODIMM_72";
-};
-
-&gpio5 {
- gpio-line-names = "SODIMM_131",
- "",
- "SODIMM_91",
- "SODIMM_16",
- "SODIMM_15",
- "SODIMM_208",
- "SODIMM_137",
- "SODIMM_139",
- "SODIMM_141",
- "SODIMM_143",
- "SODIMM_196",
- "SODIMM_200",
- "SODIMM_198",
- "SODIMM_202",
- "",
- "",
- "SODIMM_55",
- "SODIMM_53",
- "SODIMM_95",
- "SODIMM_93",
- "SODIMM_14",
- "SODIMM_12",
- "",
- "",
- "",
- "",
- "SODIMM_210",
- "SODIMM_212",
- "SODIMM_151",
- "SODIMM_153";
-
- ctrl-sleep-moci-hog {
- gpio-hog;
- /* Verdin CTRL_SLEEP_MOCI# (SODIMM 256) */
- gpios = <1 GPIO_ACTIVE_HIGH>;
- line-name = "CTRL_SLEEP_MOCI#";
- output-high;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_ctrl_sleep_moci>;
- };
-};
-
-/* On-module I2C */
-&i2c1 {
- clock-frequency = <400000>;
- pinctrl-names = "default", "gpio";
- pinctrl-0 = <&pinctrl_i2c1>;
- pinctrl-1 = <&pinctrl_i2c1_gpio>;
- scl-gpios = <&gpio5 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
- sda-gpios = <&gpio5 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
- status = "okay";
-
- pca9450: pmic@25 {
- compatible = "nxp,pca9450a";
- interrupt-parent = <&gpio1>;
- /* PMIC PCA9450 PMIC_nINT GPIO1_IO3 */
- interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pmic>;
- reg = <0x25>;
-
- /*
- * The bootloader is expected to switch on the I2C level shifter for the TLA2024 ADC
- * behind this PMIC.
- */
-
- regulators {
- reg_vdd_soc: BUCK1 {
- nxp,dvs-run-voltage = <850000>;
- nxp,dvs-standby-voltage = <800000>;
- regulator-always-on;
- regulator-boot-on;
- regulator-max-microvolt = <850000>;
- regulator-min-microvolt = <800000>;
- regulator-name = "On-module +VDD_SOC (BUCK1)";
- regulator-ramp-delay = <3125>;
- };
-
- reg_vdd_arm: BUCK2 {
- nxp,dvs-run-voltage = <950000>;
- nxp,dvs-standby-voltage = <850000>;
- regulator-always-on;
- regulator-boot-on;
- regulator-max-microvolt = <1050000>;
- regulator-min-microvolt = <805000>;
- regulator-name = "On-module +VDD_ARM (BUCK2)";
- regulator-ramp-delay = <3125>;
- };
-
- reg_vdd_dram: BUCK3 {
- regulator-always-on;
- regulator-boot-on;
- regulator-max-microvolt = <1000000>;
- regulator-min-microvolt = <805000>;
- regulator-name = "On-module +VDD_GPU_VPU_DDR (BUCK3)";
- };
-
- reg_vdd_3v3: BUCK4 {
- regulator-always-on;
- regulator-boot-on;
- regulator-max-microvolt = <3300000>;
- regulator-min-microvolt = <3300000>;
- regulator-name = "On-module +V3.3 (BUCK4)";
- };
-
- reg_vdd_1v8: BUCK5 {
- regulator-always-on;
- regulator-boot-on;
- regulator-max-microvolt = <1800000>;
- regulator-min-microvolt = <1800000>;
- regulator-name = "PWR_1V8_MOCI (BUCK5)";
- };
-
- reg_nvcc_dram: BUCK6 {
- regulator-always-on;
- regulator-boot-on;
- regulator-max-microvolt = <1100000>;
- regulator-min-microvolt = <1100000>;
- regulator-name = "On-module +VDD_DDR (BUCK6)";
- };
-
- reg_nvcc_snvs: LDO1 {
- regulator-always-on;
- regulator-boot-on;
- regulator-max-microvolt = <1800000>;
- regulator-min-microvolt = <1800000>;
- regulator-name = "On-module +V1.8_SNVS (LDO1)";
- };
-
- reg_vdd_snvs: LDO2 {
- regulator-always-on;
- regulator-boot-on;
- regulator-max-microvolt = <800000>;
- regulator-min-microvolt = <800000>;
- regulator-name = "On-module +V0.8_SNVS (LDO2)";
- };
-
- reg_vdda: LDO3 {
- regulator-always-on;
- regulator-boot-on;
- regulator-max-microvolt = <1800000>;
- regulator-min-microvolt = <1800000>;
- regulator-name = "On-module +V1.8A (LDO3)";
- };
-
- reg_vdd_phy: LDO4 {
- regulator-always-on;
- regulator-boot-on;
- regulator-max-microvolt = <900000>;
- regulator-min-microvolt = <900000>;
- regulator-name = "On-module +V0.9_MIPI (LDO4)";
- };
-
- reg_nvcc_sd: LDO5 {
- regulator-max-microvolt = <3300000>;
- regulator-min-microvolt = <1800000>;
- regulator-name = "On-module +V3.3_1.8_SD (LDO5)";
- };
- };
- };
-
- rtc_i2c: rtc@32 {
- compatible = "epson,rx8130";
- reg = <0x32>;
- };
-
- adc@49 {
- compatible = "ti,ads1015";
- reg = <0x49>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- /* Verdin I2C_1 (ADC_4 - ADC_3) */
- channel@0 {
- reg = <0>;
- ti,datarate = <4>;
- ti,gain = <2>;
- };
-
- /* Verdin I2C_1 (ADC_4 - ADC_1) */
- channel@1 {
- reg = <1>;
- ti,datarate = <4>;
- ti,gain = <2>;
- };
-
- /* Verdin I2C_1 (ADC_3 - ADC_1) */
- channel@2 {
- reg = <2>;
- ti,datarate = <4>;
- ti,gain = <2>;
- };
-
- /* Verdin I2C_1 (ADC_2 - ADC_1) */
- channel@3 {
- reg = <3>;
- ti,datarate = <4>;
- ti,gain = <2>;
- };
-
- /* Verdin I2C_1 ADC_4 */
- channel@4 {
- reg = <4>;
- ti,datarate = <4>;
- ti,gain = <2>;
- };
-
- /* Verdin I2C_1 ADC_3 */
- channel@5 {
- reg = <5>;
- ti,datarate = <4>;
- ti,gain = <2>;
- };
-
- /* Verdin I2C_1 ADC_2 */
- channel@6 {
- reg = <6>;
- ti,datarate = <4>;
- ti,gain = <2>;
- };
-
- /* Verdin I2C_1 ADC_1 */
- channel@7 {
- reg = <7>;
- ti,datarate = <4>;
- ti,gain = <2>;
- };
- };
-
- eeprom@50 {
- compatible = "st,24c02";
- pagesize = <16>;
- reg = <0x50>;
- };
-};
-
-/* Verdin I2C_2_DSI */
-&i2c2 {
- clock-frequency = <10000>;
- pinctrl-names = "default", "gpio";
- pinctrl-0 = <&pinctrl_i2c2>;
- pinctrl-1 = <&pinctrl_i2c2_gpio>;
- scl-gpios = <&gpio5 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
- sda-gpios = <&gpio5 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
- status = "disabled";
-};
-
-/* Verdin I2C_3_HDMI N/A */
-
-/* Verdin I2C_4_CSI */
-&i2c3 {
- clock-frequency = <400000>;
- pinctrl-names = "default", "gpio";
- pinctrl-0 = <&pinctrl_i2c3>;
- pinctrl-1 = <&pinctrl_i2c3_gpio>;
- scl-gpios = <&gpio5 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
- sda-gpios = <&gpio5 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
-};
-
-/* Verdin I2C_1 */
-&i2c4 {
- clock-frequency = <400000>;
- pinctrl-names = "default", "gpio";
- pinctrl-0 = <&pinctrl_i2c4>;
- pinctrl-1 = <&pinctrl_i2c4_gpio>;
- scl-gpios = <&gpio5 20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
- sda-gpios = <&gpio5 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
-
- gpio_expander_21: gpio-expander@21 {
- compatible = "nxp,pcal6416";
- #gpio-cells = <2>;
- gpio-controller;
- reg = <0x21>;
- vcc-supply = <®_3p3v>;
- status = "disabled";
- };
-
- lvds_ti_sn65dsi84: bridge@2c {
- compatible = "ti,sn65dsi84";
- /* Verdin GPIO_9_DSI (SN65DSI84 IRQ, SODIMM 17, unused) */
- /* Verdin GPIO_10_DSI (SODIMM 21) */
- enable-gpios = <&gpio3 3 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_gpio_10_dsi>;
- reg = <0x2c>;
- status = "disabled";
- };
-
- /* Current measurement into module VCC */
- hwmon: hwmon@40 {
- compatible = "ti,ina219";
- reg = <0x40>;
- shunt-resistor = <10000>;
- status = "disabled";
- };
-
- hdmi_lontium_lt8912: hdmi@48 {
- compatible = "lontium,lt8912b";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_gpio_10_dsi>;
- reg = <0x48>;
- /* Verdin GPIO_9_DSI (LT8912 INT, SODIMM 17, unused) */
- /* Verdin GPIO_10_DSI (SODIMM 21) */
- reset-gpios = <&gpio3 3 GPIO_ACTIVE_LOW>;
- status = "disabled";
- };
-
- atmel_mxt_ts: touch@4a {
- compatible = "atmel,maxtouch";
- /*
- * Verdin GPIO_9_DSI
- * (TOUCH_INT#, SODIMM 17, also routed to SN65DSI84 IRQ albeit currently unused)
- */
- interrupt-parent = <&gpio3>;
- interrupts = <15 IRQ_TYPE_EDGE_FALLING>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_gpio_9_dsi>, <&pinctrl_i2s_2_bclk_touch_reset>;
- reg = <0x4a>;
- /* Verdin I2S_2_BCLK (TOUCH_RESET#, SODIMM 42) */
- reset-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;
- status = "disabled";
- };
-
- /* Temperature sensor on carrier board */
- hwmon_temp: sensor@4f {
- compatible = "ti,tmp75c";
- reg = <0x4f>;
- status = "disabled";
- };
-
- /* EEPROM on display adapter (MIPI DSI Display Adapter) */
- eeprom_display_adapter: eeprom@50 {
- compatible = "st,24c02";
- pagesize = <16>;
- reg = <0x50>;
- status = "disabled";
- };
-
- /* EEPROM on carrier board */
- eeprom_carrier_board: eeprom@57 {
- compatible = "st,24c02";
- pagesize = <16>;
- reg = <0x57>;
- status = "disabled";
- };
-};
-
-/* Verdin PCIE_1 */
-&pcie0 {
- assigned-clocks = <&clk IMX8MM_CLK_PCIE1_AUX>,
- <&clk IMX8MM_CLK_PCIE1_CTRL>;
- assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>,
- <&clk IMX8MM_SYS_PLL2_250M>;
- assigned-clock-rates = <10000000>, <250000000>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pcie0>;
- /* PCIE_1_RESET# (SODIMM 244) */
- reset-gpio = <&gpio3 19 GPIO_ACTIVE_LOW>;
-};
-
-&pcie_phy {
- clocks = <&clk IMX8MM_CLK_PCIE1_PHY>;
- clock-names = "ref";
- fsl,clkreq-unsupported;
- fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_OUTPUT>;
- fsl,tx-deemph-gen1 = <0x2d>;
- fsl,tx-deemph-gen2 = <0xf>;
-};
-
-/* Verdin PWM_3_DSI */
-&pwm1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pwm_1>;
- #pwm-cells = <3>;
-};
-
-/* Verdin PWM_1 */
-&pwm2 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pwm_2>;
- #pwm-cells = <3>;
-};
-
-/* Verdin PWM_2 */
-&pwm3 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pwm_3>;
- #pwm-cells = <3>;
-};
-
-/* Verdin I2S_1 */
-&sai2 {
- #sound-dai-cells = <0>;
- assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>;
- assigned-clock-rates = <24576000>;
- assigned-clocks = <&clk IMX8MM_CLK_SAI2>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_sai2>;
-};
-
-&snvs_pwrkey {
- status = "okay";
-};
-
-/* Verdin UART_3, used as the Linux console */
-&uart1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart1>;
-};
-
-/* Verdin UART_1 */
-&uart2 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart2>;
- uart-has-rtscts;
-};
-
-/* Verdin UART_2 */
-&uart3 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart3>;
- uart-has-rtscts;
-};
-
-/*
- * Verdin UART_4
- * Resource allocated to M4 by default, must not be accessed from Cortex-A35 or you get an OOPS
- */
-&uart4 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart4>;
-};
-
-/* Verdin USB_1 */
-&usbotg1 {
- adp-disable;
- dr_mode = "otg";
- hnp-disable;
- samsung,picophy-dc-vol-level-adjust = <7>;
- samsung,picophy-pre-emp-curr-control = <3>;
- srp-disable;
- vbus-supply = <®_usb_otg1_vbus>;
-};
-
-/* Verdin USB_2 */
-&usbotg2 {
- dr_mode = "host";
- samsung,picophy-dc-vol-level-adjust = <7>;
- samsung,picophy-pre-emp-curr-control = <3>;
- vbus-supply = <®_usb_otg2_vbus>;
-};
-
-&usbphynop1 {
- vcc-supply = <®_vdd_3v3>;
-};
-
-&usbphynop2 {
- power-domains = <&pgc_otg2>;
- vcc-supply = <®_vdd_3v3>;
-};
-
-/* On-module eMMC */
-&usdhc1 {
- bus-width = <8>;
- keep-power-in-suspend;
- non-removable;
- pinctrl-names = "default", "state_100mhz", "state_200mhz";
- pinctrl-0 = <&pinctrl_usdhc1>;
- pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
- pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
- status = "okay";
-};
-
-/* Verdin SD_1 */
-&usdhc2 {
- bus-width = <4>;
- cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
- disable-wp;
- pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
- pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_cd>;
- pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_cd>;
- pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_cd>;
- pinctrl-3 = <&pinctrl_usdhc2_sleep>, <&pinctrl_usdhc2_cd_sleep>;
- vmmc-supply = <®_usdhc2_vmmc>;
-};
-
-&wdog1 {
- fsl,ext-reset-output;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_wdog>;
- status = "okay";
-};
-
-&iomuxc {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_gpio1>, <&pinctrl_gpio2>,
- <&pinctrl_gpio3>, <&pinctrl_gpio4>,
- <&pinctrl_gpio7>, <&pinctrl_gpio8>,
- <&pinctrl_gpio_hog1>, <&pinctrl_gpio_hog2>, <&pinctrl_gpio_hog3>,
- <&pinctrl_pmic_tpm_ena>;
-
- pinctrl_can1_int: can1intgrp {
- fsl,pins =
- <MX8MM_IOMUXC_GPIO1_IO06_GPIO1_IO6 0x146>; /* CAN_1_SPI_INT#_1.8V */
- };
-
- pinctrl_can2_int: can2intgrp {
- fsl,pins =
- <MX8MM_IOMUXC_GPIO1_IO07_GPIO1_IO7 0x106>; /* CAN_2_SPI_INT#_1.8V, unused */
- };
-
- pinctrl_ctrl_sleep_moci: ctrlsleepmocigrp {
- fsl,pins =
- <MX8MM_IOMUXC_SAI3_TXD_GPIO5_IO1 0x106>; /* SODIMM 256 */
- };
-
- pinctrl_ecspi2: ecspi2grp {
- fsl,pins =
- <MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0x6>, /* SODIMM 198 */
- <MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0x6>, /* SODIMM 200 */
- <MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0x6>, /* SODIMM 196 */
- <MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0x6>; /* SODIMM 202 */
- };
-
- pinctrl_ecspi3: ecspi3grp {
- fsl,pins =
- <MX8MM_IOMUXC_GPIO1_IO05_GPIO1_IO5 0x146>, /* CAN_2_SPI_CS#_1.8V */
- <MX8MM_IOMUXC_UART1_RXD_ECSPI3_SCLK 0x6>, /* CAN_SPI_SCK_1.8V */
- <MX8MM_IOMUXC_UART1_TXD_ECSPI3_MOSI 0x6>, /* CAN_SPI_MOSI_1.8V */
- <MX8MM_IOMUXC_UART2_RXD_ECSPI3_MISO 0x6>, /* CAN_SPI_MISO_1.8V */
- <MX8MM_IOMUXC_UART2_TXD_GPIO5_IO25 0x6>; /* CAN_1_SPI_CS_1.8V# */
- };
-
- pinctrl_fec1: fec1grp {
- fsl,pins =
- <MX8MM_IOMUXC_ENET_MDC_ENET1_MDC 0x3>,
- <MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO 0x3>,
- <MX8MM_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91>,
- <MX8MM_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91>,
- <MX8MM_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91>,
- <MX8MM_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91>,
- <MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91>,
- <MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91>,
- <MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f>,
- <MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f>,
- <MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f>,
- <MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f>,
- <MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f>,
- <MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f>,
- <MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10 0x146>;
- };
-
- pinctrl_fec1_sleep: fec1-sleepgrp {
- fsl,pins =
- <MX8MM_IOMUXC_ENET_MDC_ENET1_MDC 0x3>,
- <MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO 0x3>,
- <MX8MM_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91>,
- <MX8MM_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91>,
- <MX8MM_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91>,
- <MX8MM_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91>,
- <MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91>,
- <MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91>,
- <MX8MM_IOMUXC_ENET_TD0_GPIO1_IO21 0x1f>,
- <MX8MM_IOMUXC_ENET_TD1_GPIO1_IO20 0x1f>,
- <MX8MM_IOMUXC_ENET_TD2_GPIO1_IO19 0x1f>,
- <MX8MM_IOMUXC_ENET_TD3_GPIO1_IO18 0x1f>,
- <MX8MM_IOMUXC_ENET_TXC_GPIO1_IO23 0x1f>,
- <MX8MM_IOMUXC_ENET_TX_CTL_GPIO1_IO22 0x1f>,
- <MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10 0x106>;
- };
-
- pinctrl_flexspi0: flexspi0grp {
- fsl,pins =
- <MX8MM_IOMUXC_NAND_ALE_QSPI_A_SCLK 0x106>, /* SODIMM 52 */
- <MX8MM_IOMUXC_NAND_CE0_B_QSPI_A_SS0_B 0x106>, /* SODIMM 54 */
- <MX8MM_IOMUXC_NAND_CE1_B_QSPI_A_SS1_B 0x106>, /* SODIMM 64 */
- <MX8MM_IOMUXC_NAND_DATA00_QSPI_A_DATA0 0x106>, /* SODIMM 56 */
- <MX8MM_IOMUXC_NAND_DATA01_QSPI_A_DATA1 0x106>, /* SODIMM 58 */
- <MX8MM_IOMUXC_NAND_DATA02_QSPI_A_DATA2 0x106>, /* SODIMM 60 */
- <MX8MM_IOMUXC_NAND_DATA03_QSPI_A_DATA3 0x106>, /* SODIMM 62 */
- <MX8MM_IOMUXC_NAND_DQS_QSPI_A_DQS 0x106>; /* SODIMM 66 */
- };
-
- pinctrl_gpio1: gpio1grp {
- fsl,pins =
- <MX8MM_IOMUXC_NAND_CE3_B_GPIO3_IO4 0x106>; /* SODIMM 206 */
- };
-
- pinctrl_gpio2: gpio2grp {
- fsl,pins =
- <MX8MM_IOMUXC_SPDIF_EXT_CLK_GPIO5_IO5 0x106>; /* SODIMM 208 */
- };
-
- pinctrl_gpio3: gpio3grp {
- fsl,pins =
- <MX8MM_IOMUXC_UART3_RXD_GPIO5_IO26 0x106>; /* SODIMM 210 */
- };
-
- pinctrl_gpio4: gpio4grp {
- fsl,pins =
- <MX8MM_IOMUXC_UART3_TXD_GPIO5_IO27 0x106>; /* SODIMM 212 */
- };
-
- pinctrl_gpio5: gpio5grp {
- fsl,pins =
- <MX8MM_IOMUXC_GPIO1_IO00_GPIO1_IO0 0x106>; /* SODIMM 216 */
- };
-
- pinctrl_gpio6: gpio6grp {
- fsl,pins =
- <MX8MM_IOMUXC_GPIO1_IO11_GPIO1_IO11 0x106>; /* SODIMM 218 */
- };
-
- pinctrl_gpio7: gpio7grp {
- fsl,pins =
- <MX8MM_IOMUXC_GPIO1_IO08_GPIO1_IO8 0x106>; /* SODIMM 220 */
- };
-
- pinctrl_gpio8: gpio8grp {
- fsl,pins =
- <MX8MM_IOMUXC_GPIO1_IO09_GPIO1_IO9 0x106>; /* SODIMM 222 */
- };
-
- /* Verdin GPIO_9_DSI (pulled-up as active-low) */
- pinctrl_gpio_9_dsi: gpio9dsigrp {
- fsl,pins =
- <MX8MM_IOMUXC_NAND_RE_B_GPIO3_IO15 0x146>; /* SODIMM 17 */
- };
-
- /* Verdin GPIO_10_DSI (pulled-up as active-low) */
- pinctrl_gpio_10_dsi: gpio10dsigrp {
- fsl,pins =
- <MX8MM_IOMUXC_NAND_CE2_B_GPIO3_IO3 0x146>; /* SODIMM 21 */
- };
-
- pinctrl_gpio_hog1: gpiohog1grp {
- fsl,pins =
- <MX8MM_IOMUXC_SAI1_MCLK_GPIO4_IO20 0x106>, /* SODIMM 88 */
- <MX8MM_IOMUXC_SAI1_RXC_GPIO4_IO1 0x106>, /* SODIMM 90 */
- <MX8MM_IOMUXC_SAI1_RXD0_GPIO4_IO2 0x106>, /* SODIMM 92 */
- <MX8MM_IOMUXC_SAI1_RXD1_GPIO4_IO3 0x106>, /* SODIMM 94 */
- <MX8MM_IOMUXC_SAI1_RXD2_GPIO4_IO4 0x106>, /* SODIMM 96 */
- <MX8MM_IOMUXC_SAI1_RXD3_GPIO4_IO5 0x106>, /* SODIMM 100 */
- <MX8MM_IOMUXC_SAI1_RXFS_GPIO4_IO0 0x106>, /* SODIMM 102 */
- <MX8MM_IOMUXC_SAI1_TXC_GPIO4_IO11 0x106>, /* SODIMM 104 */
- <MX8MM_IOMUXC_SAI1_TXD0_GPIO4_IO12 0x106>, /* SODIMM 106 */
- <MX8MM_IOMUXC_SAI1_TXD1_GPIO4_IO13 0x106>, /* SODIMM 108 */
- <MX8MM_IOMUXC_SAI1_TXD2_GPIO4_IO14 0x106>, /* SODIMM 112 */
- <MX8MM_IOMUXC_SAI1_TXD3_GPIO4_IO15 0x106>, /* SODIMM 114 */
- <MX8MM_IOMUXC_SAI1_TXD4_GPIO4_IO16 0x106>, /* SODIMM 116 */
- <MX8MM_IOMUXC_SAI1_TXD6_GPIO4_IO18 0x106>, /* SODIMM 118 */
- <MX8MM_IOMUXC_SAI1_TXFS_GPIO4_IO10 0x106>; /* SODIMM 120 */
- };
-
- pinctrl_gpio_hog2: gpiohog2grp {
- fsl,pins =
- <MX8MM_IOMUXC_SAI3_MCLK_GPIO5_IO2 0x106>; /* SODIMM 91 */
- };
-
- pinctrl_gpio_hog3: gpiohog3grp {
- fsl,pins =
- <MX8MM_IOMUXC_GPIO1_IO13_GPIO1_IO13 0x146>, /* SODIMM 157 */
- <MX8MM_IOMUXC_GPIO1_IO15_GPIO1_IO15 0x146>; /* SODIMM 187 */
- };
-
- pinctrl_gpio_keys: gpiokeysgrp {
- fsl,pins =
- <MX8MM_IOMUXC_SAI3_RXFS_GPIO4_IO28 0x146>; /* SODIMM 252 */
- };
-
- /* On-module I2C */
- pinctrl_i2c1: i2c1grp {
- fsl,pins =
- <MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL 0x40000146>, /* PMIC_I2C_SCL */
- <MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x40000146>; /* PMIC_I2C_SDA */
- };
-
- pinctrl_i2c1_gpio: i2c1gpiogrp {
- fsl,pins =
- <MX8MM_IOMUXC_I2C1_SCL_GPIO5_IO14 0x146>, /* PMIC_I2C_SCL */
- <MX8MM_IOMUXC_I2C1_SDA_GPIO5_IO15 0x146>; /* PMIC_I2C_SDA */
- };
-
- /* Verdin I2C_4_CSI */
- pinctrl_i2c2: i2c2grp {
- fsl,pins =
- <MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL 0x40000146>, /* SODIMM 55 */
- <MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA 0x40000146>; /* SODIMM 53 */
- };
-
- pinctrl_i2c2_gpio: i2c2gpiogrp {
- fsl,pins =
- <MX8MM_IOMUXC_I2C2_SCL_GPIO5_IO16 0x146>, /* SODIMM 55 */
- <MX8MM_IOMUXC_I2C2_SDA_GPIO5_IO17 0x146>; /* SODIMM 53 */
- };
-
- /* Verdin I2C_2_DSI */
- pinctrl_i2c3: i2c3grp {
- fsl,pins =
- <MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL 0x40000146>, /* SODIMM 95 */
- <MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x40000146>; /* SODIMM 93 */
- };
-
- pinctrl_i2c3_gpio: i2c3gpiogrp {
- fsl,pins =
- <MX8MM_IOMUXC_I2C3_SCL_GPIO5_IO18 0x146>, /* SODIMM 95 */
- <MX8MM_IOMUXC_I2C3_SDA_GPIO5_IO19 0x146>; /* SODIMM 93 */
- };
-
- /* Verdin I2C_1 */
- pinctrl_i2c4: i2c4grp {
- fsl,pins =
- <MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL 0x40000146>, /* SODIMM 14 */
- <MX8MM_IOMUXC_I2C4_SDA_I2C4_SDA 0x40000146>; /* SODIMM 12 */
- };
-
- pinctrl_i2c4_gpio: i2c4gpiogrp {
- fsl,pins =
- <MX8MM_IOMUXC_I2C4_SCL_GPIO5_IO20 0x146>, /* SODIMM 14 */
- <MX8MM_IOMUXC_I2C4_SDA_GPIO5_IO21 0x146>; /* SODIMM 12 */
- };
-
- /* Verdin I2S_2_BCLK (TOUCH_RESET#) */
- pinctrl_i2s_2_bclk_touch_reset: i2s2bclktouchresetgrp {
- fsl,pins =
- <MX8MM_IOMUXC_SAI5_RXD2_GPIO3_IO23 0x6>; /* SODIMM 42 */
- };
-
- /* Verdin I2S_2_D_OUT shared with SAI5 */
- pinctrl_i2s_2_d_out_dsi_1_bkl_en: i2s2doutdsi1bklengrp {
- fsl,pins =
- <MX8MM_IOMUXC_SAI5_RXD3_GPIO3_IO24 0x6>; /* SODIMM 46 */
- };
-
- pinctrl_pcie0: pcie0grp {
- fsl,pins =
- <MX8MM_IOMUXC_SAI5_RXFS_GPIO3_IO19 0x6>, /* SODIMM 244 */
- /* PMIC_EN_PCIe_CLK, unused */
- <MX8MM_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x6>;
- };
-
- pinctrl_pmic: pmicirqgrp {
- fsl,pins =
- <MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x141>; /* PMIC_INT# */
- };
-
- /* Verdin PWM_3_DSI shared with GPIO1_IO1 */
- pinctrl_pwm_1: pwm1grp {
- fsl,pins =
- <MX8MM_IOMUXC_GPIO1_IO01_PWM1_OUT 0x6>; /* SODIMM 19 */
- };
-
- pinctrl_pwm_2: pwm2grp {
- fsl,pins =
- <MX8MM_IOMUXC_SPDIF_RX_PWM2_OUT 0x6>; /* SODIMM 15 */
- };
-
- pinctrl_pwm_3: pwm3grp {
- fsl,pins =
- <MX8MM_IOMUXC_SPDIF_TX_PWM3_OUT 0x6>; /* SODIMM 16 */
- };
-
- /* Verdin PWM_3_DSI (pulled-down as active-high) shared with PWM1_OUT */
- pinctrl_pwm_3_dsi_hpd_gpio: pwm3dsihpdgpiogrp {
- fsl,pins =
- <MX8MM_IOMUXC_GPIO1_IO01_GPIO1_IO1 0x106>; /* SODIMM 19 */
- };
-
- pinctrl_reg_eth: regethgrp {
- fsl,pins =
- <MX8MM_IOMUXC_SD2_WP_GPIO2_IO20 0x146>; /* PMIC_EN_ETH */
- };
-
- pinctrl_reg_usb1_en: regusb1engrp {
- fsl,pins =
- <MX8MM_IOMUXC_GPIO1_IO12_GPIO1_IO12 0x106>; /* SODIMM 155 */
- };
-
- pinctrl_reg_usb2_en: regusb2engrp {
- fsl,pins =
- <MX8MM_IOMUXC_GPIO1_IO14_GPIO1_IO14 0x106>; /* SODIMM 185 */
- };
-
- pinctrl_sai2: sai2grp {
- fsl,pins =
- <MX8MM_IOMUXC_SAI2_MCLK_SAI2_MCLK 0x6>, /* SODIMM 38 */
- <MX8MM_IOMUXC_SAI2_TXC_SAI2_TX_BCLK 0x6>, /* SODIMM 30 */
- <MX8MM_IOMUXC_SAI2_TXFS_SAI2_TX_SYNC 0x6>, /* SODIMM 32 */
- <MX8MM_IOMUXC_SAI2_RXD0_SAI2_RX_DATA0 0x6>, /* SODIMM 36 */
- <MX8MM_IOMUXC_SAI2_TXD0_SAI2_TX_DATA0 0x6>; /* SODIMM 34 */
- };
-
- pinctrl_sai5: sai5grp {
- fsl,pins =
- <MX8MM_IOMUXC_SAI5_RXD0_SAI5_RX_DATA0 0x6>, /* SODIMM 48 */
- <MX8MM_IOMUXC_SAI5_RXD1_SAI5_TX_SYNC 0x6>, /* SODIMM 44 */
- <MX8MM_IOMUXC_SAI5_RXD2_SAI5_TX_BCLK 0x6>, /* SODIMM 42 */
- <MX8MM_IOMUXC_SAI5_RXD3_SAI5_TX_DATA0 0x6>; /* SODIMM 46 */
- };
-
- /* control signal for optional ATTPM20P or SE050 */
- pinctrl_pmic_tpm_ena: pmictpmenagrp {
- fsl,pins =
- <MX8MM_IOMUXC_SAI1_TXD7_GPIO4_IO19 0x106>; /* PMIC_TPM_ENA */
- };
-
- pinctrl_tsp: tspgrp {
- fsl,pins =
- <MX8MM_IOMUXC_SAI1_RXD4_GPIO4_IO6 0x6>, /* SODIMM 148 */
- <MX8MM_IOMUXC_SAI1_RXD5_GPIO4_IO7 0x6>, /* SODIMM 152 */
- <MX8MM_IOMUXC_SAI1_RXD6_GPIO4_IO8 0x6>, /* SODIMM 154 */
- <MX8MM_IOMUXC_SAI1_RXD7_GPIO4_IO9 0x146>, /* SODIMM 174 */
- <MX8MM_IOMUXC_SAI1_TXD5_GPIO4_IO17 0x6>; /* SODIMM 150 */
- };
-
- pinctrl_uart1: uart1grp {
- fsl,pins =
- <MX8MM_IOMUXC_SAI2_RXC_UART1_DCE_RX 0x146>, /* SODIMM 147 */
- <MX8MM_IOMUXC_SAI2_RXFS_UART1_DCE_TX 0x146>; /* SODIMM 149 */
- };
-
- pinctrl_uart2: uart2grp {
- fsl,pins =
- <MX8MM_IOMUXC_SAI3_RXC_UART2_DCE_CTS_B 0x146>, /* SODIMM 133 */
- <MX8MM_IOMUXC_SAI3_RXD_UART2_DCE_RTS_B 0x146>, /* SODIMM 135 */
- <MX8MM_IOMUXC_SAI3_TXC_UART2_DCE_TX 0x146>, /* SODIMM 131 */
- <MX8MM_IOMUXC_SAI3_TXFS_UART2_DCE_RX 0x146>; /* SODIMM 129 */
- };
-
- pinctrl_uart3: uart3grp {
- fsl,pins =
- <MX8MM_IOMUXC_ECSPI1_MISO_UART3_DCE_CTS_B 0x146>, /* SODIMM 141 */
- <MX8MM_IOMUXC_ECSPI1_MOSI_UART3_DCE_TX 0x146>, /* SODIMM 139 */
- <MX8MM_IOMUXC_ECSPI1_SCLK_UART3_DCE_RX 0x146>, /* SODIMM 137 */
- <MX8MM_IOMUXC_ECSPI1_SS0_UART3_DCE_RTS_B 0x146>; /* SODIMM 143 */
- };
-
- pinctrl_uart4: uart4grp {
- fsl,pins =
- <MX8MM_IOMUXC_UART4_RXD_UART4_DCE_RX 0x146>, /* SODIMM 151 */
- <MX8MM_IOMUXC_UART4_TXD_UART4_DCE_TX 0x146>; /* SODIMM 153 */
- };
-
- pinctrl_usdhc1: usdhc1grp {
- fsl,pins =
- <MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x190>,
- <MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d0>,
- <MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d0>,
- <MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d0>,
- <MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d0>,
- <MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d0>,
- <MX8MM_IOMUXC_SD1_DATA4_USDHC1_DATA4 0x1d0>,
- <MX8MM_IOMUXC_SD1_DATA5_USDHC1_DATA5 0x1d0>,
- <MX8MM_IOMUXC_SD1_DATA6_USDHC1_DATA6 0x1d0>,
- <MX8MM_IOMUXC_SD1_DATA7_USDHC1_DATA7 0x1d0>,
- <MX8MM_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0x1d1>,
- <MX8MM_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x190>;
- };
-
- pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
- fsl,pins =
- <MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x194>,
- <MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d4>,
- <MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d4>,
- <MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d4>,
- <MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d4>,
- <MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d4>,
- <MX8MM_IOMUXC_SD1_DATA4_USDHC1_DATA4 0x1d4>,
- <MX8MM_IOMUXC_SD1_DATA5_USDHC1_DATA5 0x1d4>,
- <MX8MM_IOMUXC_SD1_DATA6_USDHC1_DATA6 0x1d4>,
- <MX8MM_IOMUXC_SD1_DATA7_USDHC1_DATA7 0x1d4>,
- <MX8MM_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0x1d1>,
- <MX8MM_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x194>;
- };
-
- pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {
- fsl,pins =
- <MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x196>,
- <MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d6>,
- <MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d6>,
- <MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d6>,
- <MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d6>,
- <MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d6>,
- <MX8MM_IOMUXC_SD1_DATA4_USDHC1_DATA4 0x1d6>,
- <MX8MM_IOMUXC_SD1_DATA5_USDHC1_DATA5 0x1d6>,
- <MX8MM_IOMUXC_SD1_DATA6_USDHC1_DATA6 0x1d6>,
- <MX8MM_IOMUXC_SD1_DATA7_USDHC1_DATA7 0x1d6>,
- <MX8MM_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0x1d1>,
- <MX8MM_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x196>;
- };
-
- pinctrl_usdhc2_cd: usdhc2cdgrp {
- fsl,pins =
- <MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x6>; /* SODIMM 84 */
- };
-
- pinctrl_usdhc2_cd_sleep: usdhc2cdslpgrp {
- fsl,pins =
- <MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x0>; /* SODIMM 84 */
- };
-
- pinctrl_usdhc2_pwr_en: usdhc2pwrengrp {
- fsl,pins =
- <MX8MM_IOMUXC_NAND_CLE_GPIO3_IO5 0x6>; /* SODIMM 76 */
- };
-
- /*
- * Note: Due to ERR050080 we use discrete external on-module resistors pulling-up to the
- * on-module +V3.3_1.8_SD (LDO5) rail and explicitly disable the internal pull-ups here.
- */
- pinctrl_usdhc2: usdhc2grp {
- fsl,pins =
- <MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x10>,
- <MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x90>, /* SODIMM 78 */
- <MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x90>, /* SODIMM 74 */
- <MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x90>, /* SODIMM 80 */
- <MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x90>, /* SODIMM 82 */
- <MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x90>, /* SODIMM 70 */
- <MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x90>; /* SODIMM 72 */
- };
-
- pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
- fsl,pins =
- <MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x10>,
- <MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x94>,
- <MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x94>,
- <MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x94>,
- <MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x94>,
- <MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x94>,
- <MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x94>;
- };
-
- pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
- fsl,pins =
- <MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x10>,
- <MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x96>,
- <MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x96>,
- <MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x96>,
- <MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x96>,
- <MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x96>,
- <MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x96>;
- };
-
- /* Avoid backfeeding with removed card power */
- pinctrl_usdhc2_sleep: usdhc2slpgrp {
- fsl,pins =
- <MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x0>,
- <MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x0>,
- <MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x0>,
- <MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x0>,
- <MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x0>,
- <MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x0>,
- <MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x0>;
- };
-
- /*
- * On-module Wi-Fi/BT or type specific SDHC interface
- * (e.g. on X52 extension slot of Verdin Development Board)
- */
- pinctrl_usdhc3: usdhc3grp {
- fsl,pins =
- <MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x150>,
- <MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x150>,
- <MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x150>,
- <MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x150>,
- <MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x150>,
- <MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x150>;
- };
-
- pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {
- fsl,pins =
- <MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x154>,
- <MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x154>,
- <MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x154>,
- <MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x154>,
- <MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x154>,
- <MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x154>;
- };
-
- pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {
- fsl,pins =
- <MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x156>,
- <MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x156>,
- <MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x156>,
- <MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x156>,
- <MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x156>,
- <MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x156>;
- };
-
- pinctrl_wdog: wdoggrp {
- fsl,pins =
- <MX8MM_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0x166>; /* PMIC_WDI */
- };
-
- pinctrl_wifi_ctrl: wifictrlgrp {
- fsl,pins =
- <MX8MM_IOMUXC_NAND_READY_B_GPIO3_IO16 0x46>, /* WIFI_WKUP_BT */
- <MX8MM_IOMUXC_SAI1_RXD7_GPIO4_IO9 0x146>, /* WIFI_W_WKUP_HOST */
- <MX8MM_IOMUXC_SAI5_RXC_GPIO3_IO20 0x46>; /* WIFI_WKUP_WLAN */
- };
-
- pinctrl_wifi_i2s: bti2sgrp {
- fsl,pins =
- <MX8MM_IOMUXC_SAI1_RXD4_SAI6_TX_BCLK 0x6>, /* WIFI_TX_BCLK */
- <MX8MM_IOMUXC_SAI1_RXD5_SAI6_TX_DATA0 0x6>, /* WIFI_TX_DATA0 */
- <MX8MM_IOMUXC_SAI1_RXD6_SAI6_TX_SYNC 0x6>, /* WIFI_TX_SYNC */
- <MX8MM_IOMUXC_SAI1_TXD5_SAI6_RX_DATA0 0x6>; /* WIFI_RX_DATA0 */
- };
-
- pinctrl_wifi_pwr_en: wifipwrengrp {
- fsl,pins =
- <MX8MM_IOMUXC_SAI5_MCLK_GPIO3_IO25 0x6>; /* PMIC_EN_WIFI */
- };
-};
diff --git a/arch/arm/dts/imx8mn-beacon-kit.dts b/arch/arm/dts/imx8mn-beacon-kit.dts
deleted file mode 100644
index 1392ce0..0000000
--- a/arch/arm/dts/imx8mn-beacon-kit.dts
+++ /dev/null
@@ -1,19 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0 OR MIT)
-/*
- * Copyright 2020 Compass Electronics Group, LLC
- */
-
-/dts-v1/;
-
-#include "imx8mn.dtsi"
-#include "imx8mn-beacon-som.dtsi"
-#include "imx8mn-beacon-baseboard.dtsi"
-
-/ {
- model = "Beacon EmbeddedWorks i.MX8M Nano Development Kit";
- compatible = "beacon,imx8mn-beacon-kit", "fsl,imx8mn";
-
- chosen {
- stdout-path = &uart2;
- };
-};
diff --git a/arch/arm/dts/imx8mn-beacon-som.dtsi b/arch/arm/dts/imx8mn-beacon-som.dtsi
deleted file mode 100644
index 1133cde..0000000
--- a/arch/arm/dts/imx8mn-beacon-som.dtsi
+++ /dev/null
@@ -1,472 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0 OR MIT)
-/*
- * Copyright 2020 Compass Electronics Group, LLC
- */
-
-/ {
- aliases {
- rtc0 = &rtc;
- rtc1 = &snvs_rtc;
- spi0 = &flexspi;
- };
-
- usdhc1_pwrseq: usdhc1_pwrseq {
- compatible = "mmc-pwrseq-simple";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_usdhc1_gpio>;
- reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
- clocks = <&osc_32k>;
- clock-names = "ext_clock";
- post-power-on-delay-ms = <80>;
- };
-
- memory@40000000 {
- device_type = "memory";
- reg = <0x0 0x40000000 0 0x80000000>;
- };
-};
-
-&A53_0 {
- cpu-supply = <&buck2_reg>;
-};
-
-&A53_1 {
- cpu-supply = <&buck2_reg>;
-};
-
-&A53_2 {
- cpu-supply = <&buck2_reg>;
-};
-
-&A53_3 {
- cpu-supply = <&buck2_reg>;
-};
-
-/* DDR controller is running LPDDR at 800MHz which requires 0.95V */
-&a53_opp_table {
- opp-1200000000 {
- opp-microvolt = <950000>;
- };
-};
-
-&ddrc {
- operating-points-v2 = <&ddrc_opp_table>;
-
- ddrc_opp_table: opp-table {
- compatible = "operating-points-v2";
-
- opp-25M {
- opp-hz = /bits/ 64 <25000000>;
- };
-
- opp-100M {
- opp-hz = /bits/ 64 <100000000>;
- };
-
- opp-800M {
- opp-hz = /bits/ 64 <800000000>;
- };
- };
-};
-
-&fec1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_fec1>;
- phy-mode = "rgmii-id";
- phy-handle = <ðphy0>;
- phy-supply = <&buck6_reg>;
- phy-reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>;
- fsl,magic-packet;
- status = "okay";
-
- mdio {
- #address-cells = <1>;
- #size-cells = <0>;
-
- ethphy0: ethernet-phy@0 {
- compatible = "ethernet-phy-ieee802.3-c22";
- reg = <0>;
- };
- };
-};
-
-&flexspi {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_flexspi>;
- status = "okay";
-
- flash@0 {
- reg = <0>;
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "jedec,spi-nor";
- spi-max-frequency = <80000000>;
- spi-tx-bus-width = <1>;
- spi-rx-bus-width = <4>;
- };
-};
-
-&i2c1 {
- clock-frequency = <400000>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_i2c1>;
- status = "okay";
-
- pmic@4b {
- compatible = "rohm,bd71847";
- reg = <0x4b>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pmic>;
- interrupt-parent = <&gpio1>;
- interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
- rohm,reset-snvs-powered;
- #clock-cells = <0>;
- clocks = <&osc_32k 0>;
- clock-output-names = "clk-32k-out";
-
- regulators {
- buck1_reg: BUCK1 {
- regulator-name = "buck1";
- regulator-min-microvolt = <700000>;
- regulator-max-microvolt = <1300000>;
- regulator-boot-on;
- regulator-always-on;
- regulator-ramp-delay = <1250>;
- };
-
- buck2_reg: BUCK2 {
- regulator-name = "buck2";
- regulator-min-microvolt = <700000>;
- regulator-max-microvolt = <1300000>;
- regulator-boot-on;
- regulator-always-on;
- regulator-ramp-delay = <1250>;
- rohm,dvs-run-voltage = <1000000>;
- rohm,dvs-idle-voltage = <900000>;
- };
-
- buck3_reg: BUCK3 {
- // BUCK5 in datasheet
- regulator-name = "buck3";
- regulator-min-microvolt = <700000>;
- regulator-max-microvolt = <1350000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- buck4_reg: BUCK4 {
- // BUCK6 in datasheet
- regulator-name = "buck4";
- regulator-min-microvolt = <3000000>;
- regulator-max-microvolt = <3300000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- buck5_reg: BUCK5 {
- // BUCK7 in datasheet
- regulator-name = "buck5";
- regulator-min-microvolt = <1605000>;
- regulator-max-microvolt = <1995000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- buck6_reg: BUCK6 {
- // BUCK8 in datasheet
- regulator-name = "buck6";
- regulator-min-microvolt = <800000>;
- regulator-max-microvolt = <1400000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- ldo1_reg: LDO1 {
- regulator-name = "ldo1";
- regulator-min-microvolt = <1600000>;
- regulator-max-microvolt = <3300000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- ldo2_reg: LDO2 {
- regulator-name = "ldo2";
- regulator-min-microvolt = <800000>;
- regulator-max-microvolt = <900000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- ldo3_reg: LDO3 {
- regulator-name = "ldo3";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- ldo4_reg: LDO4 {
- regulator-name = "ldo4";
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <1800000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- ldo6_reg: LDO6 {
- regulator-name = "ldo6";
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <1800000>;
- regulator-boot-on;
- regulator-always-on;
- };
- };
- };
-};
-
-&i2c3 {
- clock-frequency = <400000>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_i2c3>;
- status = "okay";
-
- eeprom@50 {
- compatible = "microchip,24c64", "atmel,24c64";
- pagesize = <32>;
- read-only; /* Manufacturing EEPROM programmed at factory */
- reg = <0x50>;
- };
-
- rtc: rtc@51 {
- compatible = "nxp,pcf85263";
- reg = <0x51>;
- };
-};
-
-&uart1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart1>;
- assigned-clocks = <&clk IMX8MN_CLK_UART1>;
- assigned-clock-parents = <&clk IMX8MN_SYS_PLL1_80M>;
- uart-has-rtscts;
- status = "okay";
-
- bluetooth {
- compatible = "brcm,bcm43438-bt";
- shutdown-gpios = <&gpio2 6 GPIO_ACTIVE_HIGH>;
- host-wakeup-gpios = <&gpio2 8 GPIO_ACTIVE_HIGH>;
- device-wakeup-gpios = <&gpio2 7 GPIO_ACTIVE_HIGH>;
- clocks = <&osc_32k>;
- max-speed = <4000000>;
- clock-names = "extclk";
- };
-};
-
-&usdhc1 {
- #address-cells = <1>;
- #size-cells = <0>;
- pinctrl-names = "default", "state_100mhz", "state_200mhz";
- pinctrl-0 = <&pinctrl_usdhc1>;
- pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
- pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
- vmmc-supply = <&buck4_reg>;
- vqmmc-supply = <&buck5_reg>;
- bus-width = <4>;
- non-removable;
- cap-power-off-card;
- keep-power-in-suspend;
- mmc-pwrseq = <&usdhc1_pwrseq>;
- status = "okay";
-
- brcmf: bcrmf@1 {
- reg = <1>;
- compatible = "brcm,bcm4329-fmac";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_wlan>;
- interrupt-parent = <&gpio2>;
- interrupts = <9 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "host-wake";
- };
-};
-
-&usdhc3 {
- pinctrl-names = "default", "state_100mhz", "state_200mhz";
- pinctrl-0 = <&pinctrl_usdhc3>;
- pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
- pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
- bus-width = <8>;
- non-removable;
- status = "okay";
-};
-
-&wdog1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_wdog>;
- fsl,ext-reset-output;
- status = "okay";
-};
-
-&iomuxc {
- pinctrl_fec1: fec1grp {
- fsl,pins = <
- MX8MN_IOMUXC_ENET_MDC_ENET1_MDC 0x3
- MX8MN_IOMUXC_ENET_MDIO_ENET1_MDIO 0x3
- MX8MN_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f
- MX8MN_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f
- MX8MN_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f
- MX8MN_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f
- MX8MN_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91
- MX8MN_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91
- MX8MN_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91
- MX8MN_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91
- MX8MN_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f
- MX8MN_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91
- MX8MN_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91
- MX8MN_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f
- MX8MN_IOMUXC_SAI2_RXC_GPIO4_IO22 0x19
- >;
- };
-
- pinctrl_i2c1: i2c1grp {
- fsl,pins = <
- MX8MN_IOMUXC_I2C1_SCL_I2C1_SCL 0x400001c3
- MX8MN_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c3
- >;
- };
-
- pinctrl_i2c3: i2c3grp {
- fsl,pins = <
- MX8MN_IOMUXC_I2C3_SCL_I2C3_SCL 0x400001c3
- MX8MN_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c3
- >;
- };
-
- pinctrl_flexspi: flexspigrp {
- fsl,pins = <
- MX8MN_IOMUXC_NAND_ALE_QSPI_A_SCLK 0x1c2
- MX8MN_IOMUXC_NAND_CE0_B_QSPI_A_SS0_B 0x82
- MX8MN_IOMUXC_NAND_DATA00_QSPI_A_DATA0 0x82
- MX8MN_IOMUXC_NAND_DATA01_QSPI_A_DATA1 0x82
- MX8MN_IOMUXC_NAND_DATA02_QSPI_A_DATA2 0x82
- MX8MN_IOMUXC_NAND_DATA03_QSPI_A_DATA3 0x82
- >;
- };
-
- pinctrl_pmic: pmicirqgrp {
- fsl,pins = <
- MX8MN_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x141
- >;
- };
-
- pinctrl_uart1: uart1grp {
- fsl,pins = <
- MX8MN_IOMUXC_UART1_RXD_UART1_DCE_RX 0x140
- MX8MN_IOMUXC_UART1_TXD_UART1_DCE_TX 0x140
- MX8MN_IOMUXC_UART3_RXD_UART1_DCE_CTS_B 0x140
- MX8MN_IOMUXC_UART3_TXD_UART1_DCE_RTS_B 0x140
- MX8MN_IOMUXC_SD1_DATA4_GPIO2_IO6 0x19
- MX8MN_IOMUXC_SD1_DATA5_GPIO2_IO7 0x19
- MX8MN_IOMUXC_SD1_DATA6_GPIO2_IO8 0x19
- MX8MN_IOMUXC_GPIO1_IO00_ANAMIX_REF_CLK_32K 0x141
- >;
- };
-
- pinctrl_usdhc1_gpio: usdhc1gpiogrp {
- fsl,pins = <
- MX8MN_IOMUXC_SD1_RESET_B_GPIO2_IO10 0x41
- >;
- };
-
- pinctrl_usdhc1: usdhc1grp {
- fsl,pins = <
- MX8MN_IOMUXC_SD1_CLK_USDHC1_CLK 0x190
- MX8MN_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d0
- MX8MN_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d0
- MX8MN_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d0
- MX8MN_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d0
- MX8MN_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d0
- >;
- };
-
- pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
- fsl,pins = <
- MX8MN_IOMUXC_SD1_CLK_USDHC1_CLK 0x194
- MX8MN_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d4
- MX8MN_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d4
- MX8MN_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d4
- MX8MN_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d4
- MX8MN_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d4
- >;
- };
-
- pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {
- fsl,pins = <
- MX8MN_IOMUXC_SD1_CLK_USDHC1_CLK 0x196
- MX8MN_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d6
- MX8MN_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d6
- MX8MN_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d6
- MX8MN_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d6
- MX8MN_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d6
- >;
- };
-
- pinctrl_usdhc3: usdhc3grp {
- fsl,pins = <
- MX8MN_IOMUXC_NAND_WE_B_USDHC3_CLK 0x190
- MX8MN_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d0
- MX8MN_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d0
- MX8MN_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d0
- MX8MN_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d0
- MX8MN_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d0
- MX8MN_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d0
- MX8MN_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d0
- MX8MN_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d0
- MX8MN_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d0
- MX8MN_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x190
- >;
- };
-
- pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {
- fsl,pins = <
- MX8MN_IOMUXC_NAND_WE_B_USDHC3_CLK 0x194
- MX8MN_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d4
- MX8MN_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d4
- MX8MN_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d4
- MX8MN_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d4
- MX8MN_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d4
- MX8MN_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d4
- MX8MN_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d4
- MX8MN_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d4
- MX8MN_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d4
- MX8MN_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x194
- >;
- };
-
- pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {
- fsl,pins = <
- MX8MN_IOMUXC_NAND_WE_B_USDHC3_CLK 0x196
- MX8MN_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d6
- MX8MN_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d6
- MX8MN_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d6
- MX8MN_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d6
- MX8MN_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d6
- MX8MN_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d6
- MX8MN_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d6
- MX8MN_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d6
- MX8MN_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d6
- MX8MN_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x196
- >;
- };
-
- pinctrl_wdog: wdoggrp {
- fsl,pins = <
- MX8MN_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0xc6
- >;
- };
-
- pinctrl_wlan: wlangrp {
- fsl,pins = <
- MX8MN_IOMUXC_SD1_DATA7_GPIO2_IO9 0x111
- >;
- };
-};
diff --git a/arch/arm/dts/imx8mn-u-boot.dtsi b/arch/arm/dts/imx8mn-u-boot.dtsi
index 96b1a1b..ba9967d 100644
--- a/arch/arm/dts/imx8mn-u-boot.dtsi
+++ b/arch/arm/dts/imx8mn-u-boot.dtsi
@@ -5,7 +5,6 @@
/ {
binman: binman {
- multiple-images;
};
#ifdef CONFIG_OPTEE
@@ -92,78 +91,83 @@
};
&binman {
- u-boot-spl-ddr {
- filename = "u-boot-spl-ddr.bin";
- pad-byte = <0xff>;
- align-size = <4>;
- align = <4>;
+ filename = "flash.bin";
+ section {
+ pad-byte = <0x00>;
- u-boot-spl {
- align-end = <4>;
- filename = "u-boot-spl.bin";
- };
-
- ddr-1d-imem-fw {
-#ifdef CONFIG_IMX8M_LPDDR4
- filename = "lpddr4_pmu_train_1d_imem.bin";
-#elif CONFIG_IMX8M_DDR4
- filename = "ddr4_imem_1d_201810.bin";
-#else
- filename = "ddr3_imem_1d.bin";
-#endif
+#ifdef CONFIG_FSPI_CONF_HEADER
+ fspi_conf_block {
+ filename = CONFIG_FSPI_CONF_FILE;
type = "blob-ext";
- align-end = <4>;
+ offset = <0x400>;
};
-
- ddr-1d-dmem-fw {
-#ifdef CONFIG_IMX8M_LPDDR4
- filename = "lpddr4_pmu_train_1d_dmem.bin";
-#elif CONFIG_IMX8M_DDR4
- filename = "ddr4_dmem_1d_201810.bin";
-#else
- filename = "ddr3_dmem_1d.bin";
#endif
- type = "blob-ext";
- align-end = <4>;
- };
+
+ nxp-imx8mimage {
+ filename = "u-boot-spl-mkimage.bin";
+ nxp,boot-from = "sd";
+ nxp,rom-version = <2>;
+ nxp,loader-address = <CONFIG_SPL_TEXT_BASE>;
+ args; /* Needed by mkimage etype superclass */
+
+ section {
+ filename = "u-boot-spl-ddr.bin";
+ pad-byte = <0xff>;
+ align-size = <4>;
+ align = <4>;
+
+ u-boot-spl {
+ align-end = <4>;
+ filename = "u-boot-spl.bin";
+ };
+
+ ddr-1d-imem-fw {
+#ifdef CONFIG_IMX8M_LPDDR4
+ filename = "lpddr4_pmu_train_1d_imem.bin";
+#elif CONFIG_IMX8M_DDR4
+ filename = "ddr4_imem_1d_201810.bin";
+#else
+ filename = "ddr3_imem_1d.bin";
+#endif
+ type = "blob-ext";
+ align-end = <4>;
+ };
+
+ ddr-1d-dmem-fw {
+#ifdef CONFIG_IMX8M_LPDDR4
+ filename = "lpddr4_pmu_train_1d_dmem.bin";
+#elif CONFIG_IMX8M_DDR4
+ filename = "ddr4_dmem_1d_201810.bin";
+#else
+ filename = "ddr3_dmem_1d.bin";
+#endif
+ type = "blob-ext";
+ align-end = <4>;
+ };
#if defined(CONFIG_IMX8M_LPDDR4) || defined(CONFIG_IMX8M_DDR4)
- ddr-2d-imem-fw {
+ ddr-2d-imem-fw {
#ifdef CONFIG_IMX8M_LPDDR4
- filename = "lpddr4_pmu_train_2d_imem.bin";
+ filename = "lpddr4_pmu_train_2d_imem.bin";
#else
- filename = "ddr4_imem_2d_201810.bin";
+ filename = "ddr4_imem_2d_201810.bin";
#endif
- type = "blob-ext";
- align-end = <4>;
- };
+ type = "blob-ext";
+ align-end = <4>;
+ };
- ddr-2d-dmem-fw {
+ ddr-2d-dmem-fw {
#ifdef CONFIG_IMX8M_LPDDR4
- filename = "lpddr4_pmu_train_2d_dmem.bin";
+ filename = "lpddr4_pmu_train_2d_dmem.bin";
#else
- filename = "ddr4_dmem_2d_201810.bin";
+ filename = "ddr4_dmem_2d_201810.bin";
#endif
- type = "blob-ext";
- align-end = <4>;
- };
+ type = "blob-ext";
+ align-end = <4>;
+ };
#endif
- };
-
- spl {
- filename = "spl.bin";
-
- mkimage {
- args = "-n spl/u-boot-spl.cfgout -T imx8mimage -e 0x912000";
-
- blob {
- filename = "u-boot-spl-ddr.bin";
};
};
- };
-
- itb {
- filename = "u-boot.itb";
fit {
description = "Configuration to load ATF before U-Boot";
@@ -172,6 +176,11 @@
#endif
fit,fdt-list = "of-list";
#address-cells = <1>;
+#ifdef CONFIG_FSPI_CONF_HEADER
+ offset = <0x59000>;
+#else
+ offset = <0x58000>;
+#endif
images {
uboot {
@@ -237,42 +246,4 @@
};
};
};
-
- imx-boot {
- filename = "flash.bin";
- pad-byte = <0x00>;
-
-#ifdef CONFIG_FSPI_CONF_HEADER
- fspi_conf_block {
- filename = CONFIG_FSPI_CONF_FILE;
- type = "blob-ext";
- offset = <0x400>;
- };
-
- spl {
- filename = "spl.bin";
- offset = <0x1000>;
- type = "blob-ext";
- };
-
- binman_uboot: uboot {
- filename = "u-boot.itb";
- offset = <0x59000>;
- type = "blob-ext";
- };
-#else
-
- spl {
- offset = <0x0>;
- filename = "spl.bin";
- type = "blob-ext";
- };
-
- binman_uboot: uboot {
- offset = <0x58000>;
- filename = "u-boot.itb";
- type = "blob-ext";
- };
-#endif
- };
};
diff --git a/arch/arm/dts/imx8mp-beacon-kit.dts b/arch/arm/dts/imx8mp-beacon-kit.dts
deleted file mode 100644
index a080574..0000000
--- a/arch/arm/dts/imx8mp-beacon-kit.dts
+++ /dev/null
@@ -1,783 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright 2023 Logic PD, Inc dba Beacon EmbeddedWorks
- */
-
-/dts-v1/;
-
-#include <dt-bindings/usb/pd.h>
-#include <dt-bindings/phy/phy-imx8-pcie.h>
-#include "imx8mp.dtsi"
-#include "imx8mp-beacon-som.dtsi"
-
-/ {
- model = "Beacon EmbeddedWorks i.MX8MPlus Development kit";
- compatible = "beacon,imx8mp-beacon-kit", "fsl,imx8mp";
-
- aliases {
- ethernet0 = &eqos;
- ethernet1 = &fec;
- };
-
- chosen {
- stdout-path = &uart2;
- };
-
- clk_xtal25: clock-xtal25 {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <25000000>;
- };
-
- connector {
- compatible = "usb-c-connector";
- label = "USB-C";
- data-role = "dual";
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
-
- hs_ep: endpoint {
- remote-endpoint = <&usb3_hs_ep>;
- };
- };
- port@1 {
- reg = <1>;
-
- ss_ep: endpoint {
- remote-endpoint = <&hd3ss3220_in_ep>;
- };
- };
- };
- };
-
- dmic_codec: dmic-codec {
- compatible = "dmic-codec";
- num-channels = <1>;
- #sound-dai-cells = <0>;
- };
-
- gpio-keys {
- compatible = "gpio-keys";
- autorepeat;
-
- button-0 {
- label = "btn0";
- linux,code = <BTN_0>;
- gpios = <&pca6416_1 12 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
- wakeup-source;
- };
-
- button-1 {
- label = "btn1";
- linux,code = <BTN_1>;
- gpios = <&pca6416_1 13 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
- wakeup-source;
- };
-
- button-2 {
- label = "btn2";
- linux,code = <BTN_2>;
- gpios = <&pca6416_1 14 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
- wakeup-source;
- };
-
- button-3 {
- label = "btn3";
- linux,code = <BTN_3>;
- gpios = <&pca6416_1 15 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
- wakeup-source;
- };
- };
-
- bridge-connector {
- compatible = "hdmi-connector";
- type = "a";
-
- port {
- hdmi_con: endpoint {
- remote-endpoint = <&adv7535_out>;
- };
- };
- };
-
- leds {
- compatible = "gpio-leds";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_led3>;
-
- led-0 {
- label = "gen_led0";
- gpios = <&pca6416_1 4 GPIO_ACTIVE_HIGH>;
- default-state = "off";
- };
-
- led-1 {
- label = "gen_led1";
- gpios = <&pca6416_1 5 GPIO_ACTIVE_HIGH>;
- default-state = "off";
- };
-
- led-2 {
- label = "gen_led2";
- gpios = <&pca6416_1 6 GPIO_ACTIVE_HIGH>;
- default-state = "off";
- };
-
- led-3 {
- label = "heartbeat";
- gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "heartbeat";
- };
- };
-
- reg_audio: regulator-wm8962 {
- compatible = "regulator-fixed";
- regulator-name = "3v3_aud";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- gpio = <&pca6416_1 11 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
-
- reg_usdhc2_vmmc: regulator-usdhc2 {
- compatible = "regulator-fixed";
- regulator-name = "VSD_3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- startup-delay-us = <100>;
- off-on-delay-us = <20000>;
- };
-
- reg_usb1_host_vbus: regulator-usb1-vbus {
- compatible = "regulator-fixed";
- regulator-name = "usb1_host_vbus";
- regulator-max-microvolt = <5000000>;
- regulator-min-microvolt = <5000000>;
- gpio = <&pca6416_1 0 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
-
- sound-adv7535 {
- compatible = "simple-audio-card";
- simple-audio-card,name = "sound-adv7535";
- simple-audio-card,format = "i2s";
-
- simple-audio-card,cpu {
- sound-dai = <&sai5>;
- system-clock-direction-out;
- };
-
- simple-audio-card,codec {
- sound-dai = <&adv_bridge>;
- };
- };
-
- sound-dmic {
- compatible = "simple-audio-card";
- simple-audio-card,name = "sound-pdm";
- simple-audio-card,format = "i2s";
- simple-audio-card,bitclock-master = <&dailink_master>;
- simple-audio-card,frame-master = <&dailink_master>;
-
- dailink_master: simple-audio-card,cpu {
- sound-dai = <&micfil>;
- };
-
- simple-audio-card,codec {
- sound-dai = <&dmic_codec>;
- };
- };
-
- sound-wm8962 {
- compatible = "simple-audio-card";
- simple-audio-card,name = "wm8962";
- simple-audio-card,format = "i2s";
- simple-audio-card,widgets = "Headphone", "Headphones",
- "Microphone", "Headset Mic",
- "Speaker", "Speaker";
- simple-audio-card,routing = "Headphones", "HPOUTL",
- "Headphones", "HPOUTR",
- "Speaker", "SPKOUTL",
- "Speaker", "SPKOUTR",
- "Headset Mic", "MICBIAS",
- "IN3R", "Headset Mic";
-
- simple-audio-card,cpu {
- sound-dai = <&sai3>;
- };
-
- simple-audio-card,codec {
- sound-dai = <&wm8962>;
- clocks = <&clk IMX8MP_CLK_IPP_DO_CLKO1>;
- frame-master;
- bitclock-master;
- };
- };
-};
-
-&audio_blk_ctrl {
- assigned-clocks = <&clk IMX8MP_AUDIO_PLL1>, <&clk IMX8MP_AUDIO_PLL2>;
- assigned-clock-rates = <393216000>, <135475200>;
-};
-
-&ecspi2 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_ecspi2>;
- cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
- status = "okay";
-
- tpm: tpm@0 {
- compatible = "infineon,slb9670", "tcg,tpm_tis-spi";
- reg = <0>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_tpm>;
- reset-gpios = <&gpio4 0 GPIO_ACTIVE_LOW>;
- spi-max-frequency = <18500000>;
- };
-};
-
-&fec {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_fec>;
- phy-mode = "rgmii-id";
- phy-handle = <ðphy1>;
- fsl,magic-packet;
- status = "okay";
-
- mdio {
- #address-cells = <1>;
- #size-cells = <0>;
-
- ethphy1: ethernet-phy@3 {
- compatible = "ethernet-phy-id0022.1640",
- "ethernet-phy-ieee802.3-c22";
- reg = <3>;
- reset-gpios = <&gpio4 18 GPIO_ACTIVE_LOW>;
- reset-assert-us = <10000>;
- reset-deassert-us = <150000>;
- interrupt-parent = <&gpio4>;
- interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
- };
- };
-};
-
-&flexcan1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_flexcan1>;
- status = "okay";
-};
-
-&gpio2 {
- usb-mux-hog {
- gpio-hog;
- gpios = <20 0>;
- output-low;
- line-name = "USB-C Mux En";
- };
-};
-
-&i2c2 {
- clock-frequency = <384000>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_i2c2>;
- status = "okay";
-
- pca6416_3: gpio@20 {
- compatible = "nxp,pcal6416";
- reg = <0x20>;
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-parent = <&gpio4>;
- interrupts = <27 IRQ_TYPE_EDGE_FALLING>;
- interrupt-controller;
- #interrupt-cells = <2>;
- };
-
- adv_bridge: hdmi@3d {
- compatible = "adi,adv7535";
- reg = <0x3d>, <0x3c>, <0x3e>, <0x3f>;
- reg-names = "main", "cec", "edid", "packet";
- adi,dsi-lanes = <4>;
- #sound-dai-cells = <0>;
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
-
- adv7535_in: endpoint {
- remote-endpoint = <&dsi_out>;
- };
- };
-
- port@1 {
- reg = <1>;
-
- adv7535_out: endpoint {
- remote-endpoint = <&hdmi_con>;
- };
- };
- };
- };
-
- pcieclk: clock-generator@68 {
- compatible = "renesas,9fgv0241";
- reg = <0x68>;
- clocks = <&clk_xtal25>;
- #clock-cells = <1>;
- };
-};
-
-&i2c3 {
- /* Connected to USB Hub */
- usb-typec@52 {
- compatible = "nxp,ptn5110";
- reg = <0x52>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_typec>;
- interrupt-parent = <&gpio4>;
- interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
-
- connector {
- compatible = "usb-c-connector";
- label = "USB-C";
- power-role = "source";
- data-role = "host";
- source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
- };
- };
-};
-
-&i2c4 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_i2c4>;
- clock-frequency = <384000>;
- status = "okay";
-
- wm8962: audio-codec@1a {
- compatible = "wlf,wm8962";
- reg = <0x1a>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_wm8962>;
- clocks = <&clk IMX8MP_CLK_IPP_DO_CLKO1>;
- assigned-clocks = <&clk IMX8MP_CLK_IPP_DO_CLKO1>;
- assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL2_OUT>;
- assigned-clock-rates = <22576000>;
- DCVDD-supply = <®_audio>;
- DBVDD-supply = <®_audio>;
- AVDD-supply = <®_audio>;
- CPVDD-supply = <®_audio>;
- MICVDD-supply = <®_audio>;
- PLLVDD-supply = <®_audio>;
- SPKVDD1-supply = <®_audio>;
- SPKVDD2-supply = <®_audio>;
- gpio-cfg = <
- 0x0000 /* 0:Default */
- 0x0000 /* 1:Default */
- 0x0000 /* 2:FN_DMICCLK */
- 0x0000 /* 3:Default */
- 0x0000 /* 4:FN_DMICCDAT */
- 0x0000 /* 5:Default */
- >;
- #sound-dai-cells = <0>;
- };
-
- pca6416: gpio@20 {
- compatible = "nxp,pcal6416";
- reg = <0x20>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pcal6414>;
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-parent = <&gpio4>;
- interrupts = <27 IRQ_TYPE_EDGE_FALLING>;
- interrupt-controller;
- #interrupt-cells = <2>;
- };
-
- pca6416_1: gpio@21 {
- compatible = "nxp,pcal6416";
- reg = <0x21>;
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-parent = <&gpio4>;
- interrupts = <27 IRQ_TYPE_EDGE_FALLING>;
- interrupt-controller;
- #interrupt-cells = <2>;
-
- usb-hub-hog {
- gpio-hog;
- gpios = <7 0>;
- output-low;
- line-name = "USB Hub Enable";
- };
- };
-
- usb-typec@47 {
- compatible = "ti,hd3ss3220";
- reg = <0x47>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_hd3ss3220>;
- interrupt-parent = <&gpio4>;
- interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
-
- hd3ss3220_in_ep: endpoint {
- remote-endpoint = <&ss_ep>;
- };
- };
-
- port@1 {
- reg = <1>;
-
- hd3ss3220_out_ep: endpoint {
- remote-endpoint = <&usb3_role_switch>;
- };
- };
- };
- };
-};
-
-&lcdif1 {
- status = "okay";
-};
-
-&micfil {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pdm>;
- assigned-clocks = <&clk IMX8MP_CLK_PDM>;
- assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL1_OUT>;
- assigned-clock-rates = <49152000>;
- status = "okay";
-};
-
-&mipi_dsi {
- samsung,esc-clock-frequency = <10000000>;
- status = "okay";
-
- ports {
- port@1 {
- reg = <1>;
-
- dsi_out: endpoint {
- remote-endpoint = <&adv7535_in>;
- };
- };
- };
-};
-
-&pcie {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pcie>;
- reset-gpio = <&gpio4 21 GPIO_ACTIVE_LOW>;
- status = "okay";
-};
-
-&pcie_phy {
- fsl,clkreq-unsupported;
- fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
- clocks = <&pcieclk 1>;
- clock-names = "ref";
- status = "okay";
-};
-
-&sai3 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_sai3>;
- assigned-clocks = <&clk IMX8MP_CLK_SAI3>,
- <&clk IMX8MP_AUDIO_PLL2> ;
- assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL2_OUT>;
- assigned-clock-rates = <12288000>, <361267200>;
- fsl,sai-mclk-direction-output;
- status = "okay";
-};
-
-&sai5 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_sai5>;
- assigned-clocks = <&clk IMX8MP_CLK_SAI5>;
- assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL1_OUT>;
- assigned-clock-rates = <12288000>;
- fsl,sai-mclk-direction-output;
- status = "okay";
-};
-
-&snvs_pwrkey {
- status = "okay";
-};
-
-&uart2 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart2>;
- status = "okay";
-};
-
-&uart3 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart3>;
- assigned-clocks = <&clk IMX8MP_CLK_UART3>;
- assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_80M>;
- uart-has-rtscts;
- status = "okay";
-};
-
-&usb3_0 {
- status = "okay";
-};
-
-&usb_dwc3_0 {
- dr_mode = "otg";
- hnp-disable;
- srp-disable;
- adp-disable;
- usb-role-switch;
- status = "okay";
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
- usb3_hs_ep: endpoint {
- remote-endpoint = <&hs_ep>;
- };
- };
- port@1 {
- reg = <1>;
- usb3_role_switch: endpoint {
- remote-endpoint = <&hd3ss3220_out_ep>;
- };
- };
- };
-};
-
-&usb3_phy0 {
- vbus-supply = <®_usb1_host_vbus>;
- status = "okay";
-};
-
-&usb3_1 {
- status = "okay";
-};
-
-&usb_dwc3_1 {
- dr_mode = "host";
- status = "okay";
-};
-
-&usb3_phy1 {
- status = "okay";
-};
-
-&usdhc2 {
- pinctrl-names = "default", "state_100mhz", "state_200mhz";
- pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
- pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
- pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
- cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
- vmmc-supply = <®_usdhc2_vmmc>;
- bus-width = <4>;
- status = "okay";
-};
-
-&iomuxc {
- pinctrl_ecspi2: ecspi2grp {
- fsl,pins = <
- MX8MP_IOMUXC_ECSPI2_SCLK__ECSPI2_SCLK 0x82
- MX8MP_IOMUXC_ECSPI2_MOSI__ECSPI2_MOSI 0x82
- MX8MP_IOMUXC_ECSPI2_MISO__ECSPI2_MISO 0x82
- MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13 0x40000
- >;
- };
-
- pinctrl_fec: fecgrp {
- fsl,pins = <
- MX8MP_IOMUXC_SAI1_RXD2__ENET1_MDC 0x2
- MX8MP_IOMUXC_SAI1_RXD3__ENET1_MDIO 0x2
- MX8MP_IOMUXC_SAI1_RXD4__ENET1_RGMII_RD0 0x90
- MX8MP_IOMUXC_SAI1_RXD5__ENET1_RGMII_RD1 0x90
- MX8MP_IOMUXC_SAI1_RXD6__ENET1_RGMII_RD2 0x90
- MX8MP_IOMUXC_SAI1_RXD7__ENET1_RGMII_RD3 0x90
- MX8MP_IOMUXC_SAI1_TXC__ENET1_RGMII_RXC 0x90
- MX8MP_IOMUXC_SAI1_TXFS__ENET1_RGMII_RX_CTL 0x90
- MX8MP_IOMUXC_SAI1_TXD0__ENET1_RGMII_TD0 0x16
- MX8MP_IOMUXC_SAI1_TXD1__ENET1_RGMII_TD1 0x16
- MX8MP_IOMUXC_SAI1_TXD2__ENET1_RGMII_TD2 0x16
- MX8MP_IOMUXC_SAI1_TXD3__ENET1_RGMII_TD3 0x16
- MX8MP_IOMUXC_SAI1_TXD4__ENET1_RGMII_TX_CTL 0x16
- MX8MP_IOMUXC_SAI1_TXD5__ENET1_RGMII_TXC 0x16
- MX8MP_IOMUXC_SAI1_RXD0__GPIO4_IO02 0x140
- MX8MP_IOMUXC_SAI1_TXD6__GPIO4_IO18 0x10
- >;
- };
-
- pinctrl_flexcan1: flexcan1grp {
- fsl,pins = <
- MX8MP_IOMUXC_SPDIF_RX__CAN1_RX 0x154
- MX8MP_IOMUXC_SPDIF_TX__CAN1_TX 0x154
- >;
- };
-
- pinctrl_hd3ss3220: hd3ss3220grp {
- fsl,pins = <
- MX8MP_IOMUXC_SAI1_TXD7__GPIO4_IO19 0x140
- >;
- };
-
- pinctrl_i2c2: i2c2grp {
- fsl,pins = <
- MX8MP_IOMUXC_I2C2_SCL__I2C2_SCL 0x400001c2
- MX8MP_IOMUXC_I2C2_SDA__I2C2_SDA 0x400001c2
- >;
- };
-
- pinctrl_i2c4: i2c4grp {
- fsl,pins = <
- MX8MP_IOMUXC_I2C4_SCL__I2C4_SCL 0x400001c2
- MX8MP_IOMUXC_I2C4_SDA__I2C4_SDA 0x400001c2
- >;
- };
-
- pinctrl_led3: led3grp {
- fsl,pins = <
- MX8MP_IOMUXC_SAI3_RXFS__GPIO4_IO28 0x41
- >;
- };
-
- pinctrl_pcal6414: pcal6414-gpiogrp {
- fsl,pins = <
- MX8MP_IOMUXC_SAI2_MCLK__GPIO4_IO27 0x10
- >;
- };
-
- pinctrl_pcie: pciegrp {
- fsl,pins = <
- MX8MP_IOMUXC_GPIO1_IO05__GPIO1_IO05 0x10 /* PCIe_nDIS */
- MX8MP_IOMUXC_SAI2_RXFS__GPIO4_IO21 0x10 /* PCIe_nRST */
- >;
- };
-
- pinctrl_pdm: pdmgrp {
- fsl,pins = <
- MX8MP_IOMUXC_SAI5_RXC__AUDIOMIX_PDM_CLK 0xd6
- MX8MP_IOMUXC_SAI5_RXD0__AUDIOMIX_PDM_BIT_STREAM00 0xd6
- >;
- };
-
- pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp {
- fsl,pins = <
- MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19 0x40
- >;
- };
-
- pinctrl_sai3: sai3grp {
- fsl,pins = <
- MX8MP_IOMUXC_SAI3_TXFS__AUDIOMIX_SAI3_TX_SYNC 0xd6
- MX8MP_IOMUXC_SAI3_TXC__AUDIOMIX_SAI3_TX_BCLK 0xd6
- MX8MP_IOMUXC_SAI3_RXD__AUDIOMIX_SAI3_RX_DATA00 0xd6
- MX8MP_IOMUXC_SAI3_TXD__AUDIOMIX_SAI3_TX_DATA00 0xd6
- MX8MP_IOMUXC_SAI3_MCLK__AUDIOMIX_SAI3_MCLK 0xd6
- >;
- };
-
- pinctrl_sai5: sai5grp {
- fsl,pins = <
- MX8MP_IOMUXC_SAI5_RXD3__AUDIOMIX_SAI5_TX_DATA00 0xd6
- MX8MP_IOMUXC_SAI5_RXD2__AUDIOMIX_SAI5_TX_BCLK 0xd6
- MX8MP_IOMUXC_SAI5_RXD1__AUDIOMIX_SAI5_TX_SYNC 0xd6
- >;
- };
-
- pinctrl_tpm: tpmgrp {
- fsl,pins = <
- MX8MP_IOMUXC_SAI1_RXFS__GPIO4_IO00 0x19 /* Reset */
- MX8MP_IOMUXC_SAI3_RXC__GPIO4_IO29 0x1d6 /* IRQ */
- >;
- };
-
- pinctrl_typec: typec1grp {
- fsl,pins = <
- MX8MP_IOMUXC_SAI1_RXC__GPIO4_IO01 0xc4
- >;
- };
-
- pinctrl_uart2: uart2grp {
- fsl,pins = <
- MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX 0x140
- MX8MP_IOMUXC_UART2_TXD__UART2_DCE_TX 0x140
- >;
- };
-
- pinctrl_uart3: uart3grp {
- fsl,pins = <
- MX8MP_IOMUXC_ECSPI1_SCLK__UART3_DCE_RX 0x140
- MX8MP_IOMUXC_ECSPI1_MOSI__UART3_DCE_TX 0x140
- MX8MP_IOMUXC_ECSPI1_SS0__UART3_DCE_RTS 0x140
- MX8MP_IOMUXC_ECSPI1_MISO__UART3_DCE_CTS 0x140
- >;
- };
-
- pinctrl_usdhc2: usdhc2grp {
- fsl,pins = <
- MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x190
- MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d0
- MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d0
- MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d0
- MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d0
- MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d0
- MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0
- >;
- };
-
- pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
- fsl,pins = <
- MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x194
- MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d4
- MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d4
- MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d4
- MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d4
- MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d4
- MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0
- >;
- };
-
- pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
- fsl,pins = <
- MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x196
- MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d6
- MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d6
- MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d6
- MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d6
- MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d6
- MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0
- >;
- };
-
- pinctrl_usdhc2_gpio: usdhc2gpiogrp {
- fsl,pins = <
- MX8MP_IOMUXC_SD2_CD_B__GPIO2_IO12 0x1c4
- >;
- };
-
- pinctrl_wm8962: wm8962grp {
- fsl,pins = <
- MX8MP_IOMUXC_GPIO1_IO14__CCM_CLKO1 0x59
- >;
- };
-};
diff --git a/arch/arm/dts/imx8mp-beacon-som.dtsi b/arch/arm/dts/imx8mp-beacon-som.dtsi
deleted file mode 100644
index 8be251b..0000000
--- a/arch/arm/dts/imx8mp-beacon-som.dtsi
+++ /dev/null
@@ -1,487 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright 2023 LogicPD, Inc. dba Beacon EmbeddedWorks
- */
-
-/ {
- aliases {
- rtc0 = &rtc;
- rtc1 = &snvs_rtc;
- };
-
- memory@40000000 {
- device_type = "memory";
- reg = <0x0 0x40000000 0 0xc0000000>,
- <0x1 0x00000000 0 0xc0000000>;
- };
-
- reg_wl_bt: regulator-wifi-bt {
- compatible = "regulator-fixed";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_reg_wl_bt>;
- regulator-name = "wl-bt-pow-dwn";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- gpio = <&gpio2 6 GPIO_ACTIVE_LOW>;
- startup-delay-us = <70000>;
- regulator-always-on;
- };
-};
-
-&A53_0 {
- cpu-supply = <&buck2>;
-};
-
-&A53_1 {
- cpu-supply = <&buck2>;
-};
-
-&A53_2 {
- cpu-supply = <&buck2>;
-};
-
-&A53_3 {
- cpu-supply = <&buck2>;
-};
-
-&eqos {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_eqos>;
- phy-mode = "rgmii-id";
- phy-handle = <ðphy0>;
- snps,force_thresh_dma_mode;
- snps,mtl-rx-config = <&mtl_rx_setup>;
- snps,mtl-tx-config = <&mtl_tx_setup>;
- status = "okay";
-
- mdio {
- compatible = "snps,dwmac-mdio";
- #address-cells = <1>;
- #size-cells = <0>;
-
- ethphy0: ethernet-phy@3 {
- compatible = "ethernet-phy-id0022.1640",
- "ethernet-phy-ieee802.3-c22";
- reg = <3>;
- reset-gpios = <&gpio4 10 GPIO_ACTIVE_LOW>;
- interrupt-parent = <&gpio1>;
- interrupts = <10 IRQ_TYPE_LEVEL_LOW>;
- };
- };
-
- mtl_rx_setup: rx-queues-config {
- snps,rx-queues-to-use = <5>;
- snps,rx-sched-sp;
-
- queue0 {
- snps,dcb-algorithm;
- snps,priority = <0x1>;
- snps,map-to-dma-channel = <0>;
- };
-
- queue1 {
- snps,dcb-algorithm;
- snps,priority = <0x2>;
- snps,map-to-dma-channel = <1>;
- };
-
- queue2 {
- snps,dcb-algorithm;
- snps,priority = <0x4>;
- snps,map-to-dma-channel = <2>;
- };
-
- queue3 {
- snps,dcb-algorithm;
- snps,priority = <0x8>;
- snps,map-to-dma-channel = <3>;
- };
-
- queue4 {
- snps,dcb-algorithm;
- snps,priority = <0xf0>;
- snps,map-to-dma-channel = <4>;
- };
- };
-
- mtl_tx_setup: tx-queues-config {
- snps,tx-queues-to-use = <5>;
- snps,tx-sched-sp;
-
- queue0 {
- snps,dcb-algorithm;
- snps,priority = <0x1>;
- };
-
- queue1 {
- snps,dcb-algorithm;
- snps,priority = <0x2>;
- };
-
- queue2 {
- snps,dcb-algorithm;
- snps,priority = <0x4>;
- };
-
- queue3 {
- snps,dcb-algorithm;
- snps,priority = <0x8>;
- };
-
- queue4 {
- snps,dcb-algorithm;
- snps,priority = <0xf0>;
- };
- };
-};
-
-&flexspi {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_flexspi0>;
- status = "okay";
-
- flash0: flash@0 {
- compatible = "jedec,spi-nor";
- reg = <0>;
- spi-max-frequency = <80000000>;
- spi-tx-bus-width = <1>;
- spi-rx-bus-width = <4>;
- };
-};
-
-&i2c1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_i2c1>;
- clock-frequency = <384000>;
- status = "okay";
-
- pmic@25 {
- compatible = "nxp,pca9450c";
- reg = <0x25>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pmic>;
- interrupt-parent = <&gpio1>;
- interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
-
- regulators {
- buck1: BUCK1 {
- regulator-name = "BUCK1";
- regulator-min-microvolt = <600000>;
- regulator-max-microvolt = <2187500>;
- regulator-boot-on;
- regulator-always-on;
- regulator-ramp-delay = <3125>;
- };
-
- buck2: BUCK2 {
- regulator-name = "BUCK2";
- regulator-min-microvolt = <600000>;
- regulator-max-microvolt = <2187500>;
- regulator-boot-on;
- regulator-always-on;
- regulator-ramp-delay = <3125>;
- nxp,dvs-run-voltage = <950000>;
- nxp,dvs-standby-voltage = <850000>;
- };
-
- buck4: BUCK4 {
- regulator-name = "BUCK4";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- buck5: BUCK5 {
- regulator-name = "BUCK5";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- buck6: BUCK6 {
- regulator-name = "BUCK6";
- regulator-min-microvolt = <600000>;
- regulator-max-microvolt = <3400000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- ldo1: LDO1 {
- regulator-name = "LDO1";
- regulator-min-microvolt = <1600000>;
- regulator-max-microvolt = <1800000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- ldo3: LDO3 {
- regulator-name = "LDO3";
- regulator-min-microvolt = <800000>;
- regulator-max-microvolt = <1800000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- ldo4: LDO4 {
- regulator-name = "LDO4";
- regulator-min-microvolt = <800000>;
- regulator-max-microvolt = <3300000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- ldo5: LDO5 {
- regulator-name = "LDO5";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
- regulator-boot-on;
- regulator-always-on;
- };
- };
- };
-};
-
-&i2c3 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_i2c3>;
- clock-frequency = <384000>;
- status = "okay";
-
- eeprom@50 {
- compatible = "atmel,24c64";
- reg = <0x50>;
- pagesize = <32>;
- read-only; /* Manufacturing EEPROM programmed at factory */
- };
-
- rtc: rtc@51 {
- compatible = "nxp,pcf85263";
- reg = <0x51>;
- };
-};
-
-&snvs_pwrkey {
- status = "okay";
-};
-
-&uart1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart1>;
- assigned-clocks = <&clk IMX8MP_CLK_UART1>;
- assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_80M>;
- uart-has-rtscts;
- status = "okay";
-
- bluetooth {
- compatible = "nxp,88w8997-bt";
- };
-};
-
-&usdhc1 {
- pinctrl-names = "default", "state_100mhz", "state_200mhz";
- pinctrl-0 = <&pinctrl_usdhc1>;
- pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
- pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
- bus-width = <4>;
- vmmc-supply = <®_wl_bt>;
- cap-sd-highspeed;
- sd-uhs-sdr50;
- sd-uhs-sdr104;
- keep-power-in-suspend;
- wakeup-source;
- non-removable;
- cap-power-off-card;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "okay";
-
- mwifiex: wifi@1 {
- compatible = "marvell,sd8997";
- reg = <1>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_wlan>;
- interrupt-parent = <&gpio2>;
- interrupts = <9 IRQ_TYPE_LEVEL_LOW>;
- };
-};
-
-&usdhc3 {
- pinctrl-names = "default", "state_100mhz", "state_200mhz";
- pinctrl-0 = <&pinctrl_usdhc3>;
- pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
- pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
- bus-width = <8>;
- non-removable;
- status = "okay";
-};
-
-&wdog1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_wdog>;
- fsl,ext-reset-output;
- status = "okay";
-};
-
-&iomuxc {
- pinctrl_eqos: eqosgrp {
- fsl,pins = <
- MX8MP_IOMUXC_ENET_MDC__ENET_QOS_MDC 0x2
- MX8MP_IOMUXC_ENET_MDIO__ENET_QOS_MDIO 0x2
- MX8MP_IOMUXC_ENET_RD0__ENET_QOS_RGMII_RD0 0x90
- MX8MP_IOMUXC_ENET_RD1__ENET_QOS_RGMII_RD1 0x90
- MX8MP_IOMUXC_ENET_RD2__ENET_QOS_RGMII_RD2 0x90
- MX8MP_IOMUXC_ENET_RD3__ENET_QOS_RGMII_RD3 0x90
- MX8MP_IOMUXC_ENET_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK 0x90
- MX8MP_IOMUXC_ENET_RX_CTL__ENET_QOS_RGMII_RX_CTL 0x90
- MX8MP_IOMUXC_ENET_TD0__ENET_QOS_RGMII_TD0 0x16
- MX8MP_IOMUXC_ENET_TD1__ENET_QOS_RGMII_TD1 0x16
- MX8MP_IOMUXC_ENET_TD2__ENET_QOS_RGMII_TD2 0x16
- MX8MP_IOMUXC_ENET_TD3__ENET_QOS_RGMII_TD3 0x16
- MX8MP_IOMUXC_ENET_TX_CTL__ENET_QOS_RGMII_TX_CTL 0x16
- MX8MP_IOMUXC_ENET_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK 0x16
- MX8MP_IOMUXC_SAI2_RXC__GPIO4_IO22 0x10
- MX8MP_IOMUXC_GPIO1_IO10__GPIO1_IO10 0x10
- >;
- };
-
- pinctrl_flexspi0: flexspi0grp {
- fsl,pins = <
- MX8MP_IOMUXC_NAND_ALE__FLEXSPI_A_SCLK 0x1c2
- MX8MP_IOMUXC_NAND_CE0_B__FLEXSPI_A_SS0_B 0x82
- MX8MP_IOMUXC_NAND_DATA00__FLEXSPI_A_DATA00 0x82
- MX8MP_IOMUXC_NAND_DATA01__FLEXSPI_A_DATA01 0x82
- MX8MP_IOMUXC_NAND_DATA02__FLEXSPI_A_DATA02 0x82
- MX8MP_IOMUXC_NAND_DATA03__FLEXSPI_A_DATA03 0x82
- >;
- };
-
- pinctrl_i2c1: i2c1grp {
- fsl,pins = <
- MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL 0x400001c2
- MX8MP_IOMUXC_I2C1_SDA__I2C1_SDA 0x400001c2
- >;
- };
-
- pinctrl_i2c3: i2c3grp {
- fsl,pins = <
- MX8MP_IOMUXC_I2C3_SCL__I2C3_SCL 0x400001c2
- MX8MP_IOMUXC_I2C3_SDA__I2C3_SDA 0x400001c2
- >;
- };
-
- pinctrl_pmic: pmicgrp {
- fsl,pins = <
- MX8MP_IOMUXC_GPIO1_IO03__GPIO1_IO03 0x1c0
- >;
- };
-
- pinctrl_reg_wl_bt: reg-wl-btgrp {
- fsl,pins = <
- MX8MP_IOMUXC_SD1_DATA4__GPIO2_IO06 0x40
- >;
- };
-
- pinctrl_uart1: uart1grp {
- fsl,pins = <
- MX8MP_IOMUXC_UART1_RXD__UART1_DCE_RX 0x140
- MX8MP_IOMUXC_UART1_TXD__UART1_DCE_TX 0x140
- MX8MP_IOMUXC_UART3_RXD__UART1_DCE_CTS 0x140
- MX8MP_IOMUXC_UART3_TXD__UART1_DCE_RTS 0x140
- >;
- };
-
- pinctrl_usdhc1: usdhc1grp {
- fsl,pins = <
- MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK 0x190
- MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD 0x1d0
- MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0 0x1d0
- MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1 0x1d0
- MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2 0x1d0
- MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3 0x1d0
- >;
- };
-
- pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
- fsl,pins = <
- MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK 0x194
- MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD 0x1d4
- MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0 0x1d4
- MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1 0x1d4
- MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2 0x1d4
- MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3 0x1d4
- >;
- };
-
- pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {
- fsl,pins = <
- MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK 0x196
- MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD 0x1d6
- MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0 0x1d6
- MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1 0x1d6
- MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2 0x1d6
- MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3 0x1d6
- >;
- };
-
- pinctrl_usdhc3: usdhc3grp {
- fsl,pins = <
- MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x190
- MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d0
- MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d0
- MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d0
- MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d0
- MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d0
- MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d0
- MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d0
- MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d0
- MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d0
- MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x190
- >;
- };
-
- pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {
- fsl,pins = <
- MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x194
- MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d4
- MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d4
- MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d4
- MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d4
- MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d4
- MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d4
- MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d4
- MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d4
- MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d4
- MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x194
- >;
- };
-
- pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {
- fsl,pins = <
- MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x196
- MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d6
- MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d6
- MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d6
- MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d6
- MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d6
- MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d6
- MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d6
- MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d6
- MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d6
- MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x196
- >;
- };
-
- pinctrl_wdog: wdoggrp {
- fsl,pins = <
- MX8MP_IOMUXC_GPIO1_IO02__WDOG1_WDOG_B 0x166
- >;
- };
-
- pinctrl_wlan: wlangrp {
- fsl,pins = <
- MX8MP_IOMUXC_SD1_DATA7__GPIO2_IO09 0x140
- >;
- };
-};
diff --git a/arch/arm/dts/imx8mp-dhcom-pdk3-u-boot.dtsi b/arch/arm/dts/imx8mp-dhcom-pdk3-u-boot.dtsi
index 040f333..b0b99d5 100644
--- a/arch/arm/dts/imx8mp-dhcom-pdk3-u-boot.dtsi
+++ b/arch/arm/dts/imx8mp-dhcom-pdk3-u-boot.dtsi
@@ -4,3 +4,15 @@
*/
#include "imx8mp-dhcom-u-boot.dtsi"
+
+/ {
+ clk_pcie100: clk-pcie100 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <100000000>;
+ };
+};
+
+&pcie_phy {
+ clocks = <&clk_pcie100>;
+};
diff --git a/arch/arm/dts/imx8mp-dhcom-u-boot.dtsi b/arch/arm/dts/imx8mp-dhcom-u-boot.dtsi
index b05be57..cb37e28 100644
--- a/arch/arm/dts/imx8mp-dhcom-u-boot.dtsi
+++ b/arch/arm/dts/imx8mp-dhcom-u-boot.dtsi
@@ -136,7 +136,7 @@
};
&binman {
- itb {
+ section {
fit {
images {
fdt-dto-imx8mp-dhcom-som-overlay-eth1xfast {
diff --git a/arch/arm/dts/imx8mp-rsb3720-a1-u-boot.dtsi b/arch/arm/dts/imx8mp-rsb3720-a1-u-boot.dtsi
index 22171bd..aff5dcf 100644
--- a/arch/arm/dts/imx8mp-rsb3720-a1-u-boot.dtsi
+++ b/arch/arm/dts/imx8mp-rsb3720-a1-u-boot.dtsi
@@ -136,7 +136,7 @@
};
&binman {
- itb {
+ section {
fit {
images {
fip {
diff --git a/arch/arm/dts/imx8mp-u-boot.dtsi b/arch/arm/dts/imx8mp-u-boot.dtsi
index 4fadcae..c4c1a17 100644
--- a/arch/arm/dts/imx8mp-u-boot.dtsi
+++ b/arch/arm/dts/imx8mp-u-boot.dtsi
@@ -6,7 +6,6 @@
/ {
binman: binman {
- multiple-images;
};
#ifdef CONFIG_OPTEE
@@ -83,55 +82,52 @@
#endif
&binman {
- u-boot-spl-ddr {
- filename = "u-boot-spl-ddr.bin";
- pad-byte = <0xff>;
- align-size = <4>;
- align = <4>;
+ filename = "flash.bin";
+ section {
+ pad-byte = <0x00>;
- u-boot-spl {
- align-end = <4>;
- };
+ nxp-imx8mimage {
+ filename = "u-boot-spl-mkimage.bin";
+ nxp,boot-from = "sd";
+ nxp,rom-version = <2>;
+ nxp,loader-address = <CONFIG_SPL_TEXT_BASE>;
+ args; /* Needed by mkimage etype superclass */
- ddr-1d-imem-fw {
- filename = "lpddr4_pmu_train_1d_imem_202006.bin";
- type = "blob-ext";
- align-end = <4>;
- };
-
- ddr-1d-dmem-fw {
- filename = "lpddr4_pmu_train_1d_dmem_202006.bin";
- type = "blob-ext";
- align-end = <4>;
- };
-
- ddr-2d-imem-fw {
- filename = "lpddr4_pmu_train_2d_imem_202006.bin";
- type = "blob-ext";
- align-end = <4>;
- };
-
- ddr-2d-dmem-fw {
- filename = "lpddr4_pmu_train_2d_dmem_202006.bin";
- type = "blob-ext";
- align-end = <4>;
- };
- };
-
- spl {
- filename = "spl.bin";
-
- mkimage {
- args = "-n spl/u-boot-spl.cfgout -T imx8mimage -e 0x920000";
-
- blob {
+ section {
filename = "u-boot-spl-ddr.bin";
+ pad-byte = <0xff>;
+ align-size = <4>;
+ align = <4>;
+
+ u-boot-spl {
+ align-end = <4>;
+ };
+
+ ddr-1d-imem-fw {
+ filename = "lpddr4_pmu_train_1d_imem_202006.bin";
+ type = "blob-ext";
+ align-end = <4>;
+ };
+
+ ddr-1d-dmem-fw {
+ filename = "lpddr4_pmu_train_1d_dmem_202006.bin";
+ type = "blob-ext";
+ align-end = <4>;
+ };
+
+ ddr-2d-imem-fw {
+ filename = "lpddr4_pmu_train_2d_imem_202006.bin";
+ type = "blob-ext";
+ align-end = <4>;
+ };
+
+ ddr-2d-dmem-fw {
+ filename = "lpddr4_pmu_train_2d_dmem_202006.bin";
+ type = "blob-ext";
+ align-end = <4>;
+ };
};
};
- };
-
- itb {
- filename = "u-boot.itb";
fit {
description = "Configuration to load ATF before U-Boot";
@@ -140,6 +136,7 @@
#endif
fit,fdt-list = "of-list";
#address-cells = <1>;
+ offset = <0x58000>;
images {
uboot {
@@ -195,21 +192,4 @@
};
};
};
-
- imx-boot {
- filename = "flash.bin";
- pad-byte = <0x00>;
-
- spl {
- filename = "spl.bin";
- offset = <0x0>;
- type = "blob-ext";
- };
-
- binman_uboot: uboot {
- filename = "u-boot.itb";
- offset = <0x58000>;
- type = "blob-ext";
- };
- };
};
diff --git a/arch/arm/dts/imx8mp-verdin-dev.dtsi b/arch/arm/dts/imx8mp-verdin-dev.dtsi
deleted file mode 100644
index bdfdd4c..0000000
--- a/arch/arm/dts/imx8mp-verdin-dev.dtsi
+++ /dev/null
@@ -1,165 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-/*
- * Copyright 2022 Toradex
- */
-
-/ {
- /* TODO: Audio Codec */
-
- reg_eth2phy: regulator-eth2phy {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio_expander_21 4 GPIO_ACTIVE_HIGH>; /* ETH_PWR_EN */
- off-on-delay-us = <500000>;
- regulator-max-microvolt = <3300000>;
- regulator-min-microvolt = <3300000>;
- regulator-name = "+V3.3_ETH";
- startup-delay-us = <200000>;
- vin-supply = <®_3p3v>;
- };
-};
-
-&backlight {
- power-supply = <®_3p3v>;
-};
-
-/* Verdin SPI_1 */
-&ecspi1 {
- status = "okay";
-};
-
-/* EEPROM on display adapter boards */
-&eeprom_display_adapter {
- status = "okay";
-};
-
-/* EEPROM on Verdin Development board */
-&eeprom_carrier_board {
- status = "okay";
-};
-
-&eqos {
- status = "okay";
-};
-
-&fec {
- phy-supply = <®_eth2phy>;
- status = "okay";
-};
-
-&flexcan1 {
- status = "okay";
-};
-
-&flexcan2 {
- status = "okay";
-};
-
-/* Verdin QSPI_1 */
-&flexspi {
- status = "okay";
-};
-
-&gpio_expander_21 {
- status = "okay";
- vcc-supply = <®_1p8v>;
-};
-
-/* Current measurement into module VCC */
-&hwmon {
- status = "okay";
-};
-
-&hwmon_temp {
- vs-supply = <®_1p8v>;
- status = "okay";
-};
-
-/* Verdin I2C_2_DSI */
-&i2c2 {
- status = "okay";
-};
-
-&i2c3 {
- status = "okay";
-};
-
-/* Verdin I2C_1 */
-&i2c4 {
- status = "okay";
-
- /* TODO: Audio Codec */
-};
-
-/* Verdin PCIE_1 */
-&pcie {
- status = "okay";
-};
-
-&pcie_phy {
- status = "okay";
-};
-
-/* Verdin PWM_1 */
-&pwm1 {
- status = "okay";
-};
-
-/* Verdin PWM_2 */
-&pwm2 {
- status = "okay";
-};
-
-/* Verdin PWM_3_DSI */
-&pwm3 {
- status = "okay";
-};
-
-®_usdhc2_vmmc {
- vin-supply = <®_3p3v>;
-};
-
-/* TODO: Verdin I2C_1 with Audio Codec */
-
-/* Verdin UART_1, connector X50 through RS485 transceiver */
-&uart1 {
- linux,rs485-enabled-at-boot-time;
- rs485-rts-active-low;
- rs485-rx-during-tx;
- status = "okay";
-};
-
-/* Verdin UART_2 */
-&uart2 {
- status = "okay";
-};
-
-/* Verdin UART_3, used as the Linux Console */
-&uart3 {
- status = "okay";
-};
-
-/* Verdin USB_1 */
-&usb3_0 {
- status = "okay";
-};
-
-&usb3_phy0 {
- status = "okay";
-};
-
-/* Verdin USB_2 */
-&usb3_1 {
- fsl,permanently-attached;
- status = "okay";
-};
-
-&usb3_phy1 {
- status = "okay";
-};
-
-/* Limit frequency on dev board due to long traces and bad signal integrity */
-&usdhc2 {
- max-frequency = <100000000>;
- status = "okay";
-};
diff --git a/arch/arm/dts/imx8mp-verdin-wifi-dev-u-boot.dtsi b/arch/arm/dts/imx8mp-verdin-wifi-dev-u-boot.dtsi
index 03f211d..7b45a87 100644
--- a/arch/arm/dts/imx8mp-verdin-wifi-dev-u-boot.dtsi
+++ b/arch/arm/dts/imx8mp-verdin-wifi-dev-u-boot.dtsi
@@ -58,6 +58,10 @@
ctrl-sleep-moci-hog {
bootph-pre-ram;
+ gpio-hog;
+ output-high;
+ gpios = <29 GPIO_ACTIVE_HIGH>;
+ line-name = "CTRL_SLEEP_MOCI#";
};
};
diff --git a/arch/arm/dts/imx8mp-verdin-wifi-dev.dts b/arch/arm/dts/imx8mp-verdin-wifi-dev.dts
deleted file mode 100644
index c1713c2..0000000
--- a/arch/arm/dts/imx8mp-verdin-wifi-dev.dts
+++ /dev/null
@@ -1,18 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-/*
- * Copyright 2022 Toradex
- */
-
-/dts-v1/;
-
-#include "imx8mp-verdin.dtsi"
-#include "imx8mp-verdin-wifi.dtsi"
-#include "imx8mp-verdin-dev.dtsi"
-
-/ {
- model = "Toradex Verdin iMX8M Plus WB on Verdin Development Board";
- compatible = "toradex,verdin-imx8mp-wifi-dev",
- "toradex,verdin-imx8mp-wifi",
- "toradex,verdin-imx8mp",
- "fsl,imx8mp";
-};
diff --git a/arch/arm/dts/imx8mp-verdin-wifi.dtsi b/arch/arm/dts/imx8mp-verdin-wifi.dtsi
deleted file mode 100644
index ef94f9a..0000000
--- a/arch/arm/dts/imx8mp-verdin-wifi.dtsi
+++ /dev/null
@@ -1,87 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-/*
- * Copyright 2022 Toradex
- */
-
-/ {
- reg_wifi_en: regulator-wifi-en {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio2 11 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_wifi_pwr_en>;
- regulator-max-microvolt = <3300000>;
- regulator-min-microvolt = <3300000>;
- regulator-name = "PDn_AW-CM276NF";
- startup-delay-us = <2000>;
- };
-};
-
-&gpio5 {
- gpio-line-names = "SODIMM_42",
- "SODIMM_46",
- "SODIMM_187",
- "SODIMM_20",
- "SODIMM_22",
- "SODIMM_15",
- "SODIMM_196",
- "SODIMM_200",
- "SODIMM_198",
- "SODIMM_202",
- "",
- "",
- "",
- "",
- "",
- "",
- "SODIMM_55",
- "SODIMM_53",
- "SODIMM_95",
- "SODIMM_93",
- "SODIMM_14",
- "SODIMM_12",
- "SODIMM_129",
- "SODIMM_131",
- "SODIMM_137",
- "SODIMM_139",
- "SODIMM_147",
- "SODIMM_149",
- "SODIMM_151",
- "SODIMM_153";
-};
-
-&iomuxc {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_gpio1>, <&pinctrl_gpio2>,
- <&pinctrl_gpio3>, <&pinctrl_gpio4>,
- <&pinctrl_gpio7>, <&pinctrl_gpio8>,
- <&pinctrl_gpio_hog2>, <&pinctrl_gpio_hog3>, <&pinctrl_gpio_hog4>,
- <&pinctrl_hdmi_hog>;
-};
-
-/* On-module Bluetooth */
-&uart4 {
- uart-has-rtscts;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_bt_uart>;
- status = "okay";
-
- bluetooth {
- compatible = "mrvl,88w8997";
- max-speed = <921600>;
- };
-};
-
-/* On-module Wi-Fi */
-&usdhc1 {
- bus-width = <4>;
- keep-power-in-suspend;
- max-frequency = <100000000>;
- non-removable;
- pinctrl-names = "default", "state_100mhz", "state_200mhz";
- pinctrl-0 = <&pinctrl_usdhc1>, <&pinctrl_wifi_ctrl>;
- pinctrl-1 = <&pinctrl_usdhc1_100mhz>, <&pinctrl_wifi_ctrl>;
- pinctrl-2 = <&pinctrl_usdhc1_200mhz>, <&pinctrl_wifi_ctrl>;
- vmmc-supply = <®_wifi_en>;
- status = "okay";
-};
diff --git a/arch/arm/dts/imx8mp-verdin.dtsi b/arch/arm/dts/imx8mp-verdin.dtsi
deleted file mode 100644
index e9e4fcb..0000000
--- a/arch/arm/dts/imx8mp-verdin.dtsi
+++ /dev/null
@@ -1,1438 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-/*
- * Copyright 2022 Toradex
- */
-
-#include <dt-bindings/phy/phy-imx8-pcie.h>
-#include <dt-bindings/pwm/pwm.h>
-#include "imx8mp.dtsi"
-
-/ {
- chosen {
- stdout-path = &uart3;
- };
-
- aliases {
- /* Ethernet aliases to ensure correct MAC addresses */
- ethernet0 = &eqos;
- ethernet1 = &fec;
- rtc0 = &rtc_i2c;
- rtc1 = &snvs_rtc;
- };
-
- backlight: backlight {
- compatible = "pwm-backlight";
- brightness-levels = <0 45 63 88 119 158 203 255>;
- default-brightness-level = <4>;
- /* Verdin I2S_2_D_OUT (DSI_1_BKL_EN/DSI_1_BKL_EN_LVDS, SODIMM 46) */
- enable-gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_i2s_2_d_out_dsi_1_bkl_en>;
- power-supply = <®_3p3v>;
- /* Verdin PWM_3_DSI/PWM_3_DSI_LVDS (SODIMM 19) */
- pwms = <&pwm3 0 6666667 PWM_POLARITY_INVERTED>;
- status = "disabled";
- };
-
- backlight_mezzanine: backlight-mezzanine {
- compatible = "pwm-backlight";
- brightness-levels = <0 45 63 88 119 158 203 255>;
- default-brightness-level = <4>;
- /* Verdin GPIO 4 (SODIMM 212) */
- enable-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
- /* Verdin PWM_2 (SODIMM 16) */
- pwms = <&pwm2 0 6666667 PWM_POLARITY_INVERTED>;
- status = "disabled";
- };
-
- gpio-keys {
- compatible = "gpio-keys";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_gpio_keys>;
-
- key-wakeup {
- debounce-interval = <10>;
- /* Verdin CTRL_WAKE1_MICO# (SODIMM 252) */
- gpios = <&gpio4 0 GPIO_ACTIVE_LOW>;
- label = "Wake-Up";
- linux,code = <KEY_WAKEUP>;
- wakeup-source;
- };
- };
-
- /* Carrier Board Supplies */
- reg_1p8v: regulator-1p8v {
- compatible = "regulator-fixed";
- regulator-max-microvolt = <1800000>;
- regulator-min-microvolt = <1800000>;
- regulator-name = "+V1.8_SW";
- };
-
- reg_3p3v: regulator-3p3v {
- compatible = "regulator-fixed";
- regulator-max-microvolt = <3300000>;
- regulator-min-microvolt = <3300000>;
- regulator-name = "+V3.3_SW";
- };
-
- reg_5p0v: regulator-5p0v {
- compatible = "regulator-fixed";
- regulator-max-microvolt = <5000000>;
- regulator-min-microvolt = <5000000>;
- regulator-name = "+V5_SW";
- };
-
- /* Non PMIC On-module Supplies */
- reg_module_eth1phy: regulator-module-eth1phy {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio2 20 GPIO_ACTIVE_HIGH>; /* PMIC_EN_ETH */
- off-on-delay-us = <500000>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_reg_eth>;
- regulator-always-on;
- regulator-boot-on;
- regulator-max-microvolt = <3300000>;
- regulator-min-microvolt = <3300000>;
- regulator-name = "On-module +V3.3_ETH";
- startup-delay-us = <200000>;
- vin-supply = <®_vdd_3v3>;
- };
-
- reg_usb1_vbus: regulator-usb1-vbus {
- compatible = "regulator-fixed";
- enable-active-high;
- /* Verdin USB_1_EN (SODIMM 155) */
- gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_usb1_vbus>;
- regulator-max-microvolt = <5000000>;
- regulator-min-microvolt = <5000000>;
- regulator-name = "USB_1_EN";
- };
-
- reg_usb2_vbus: regulator-usb2-vbus {
- compatible = "regulator-fixed";
- enable-active-high;
- /* Verdin USB_2_EN (SODIMM 185) */
- gpio = <&gpio1 14 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_usb2_vbus>;
- regulator-max-microvolt = <5000000>;
- regulator-min-microvolt = <5000000>;
- regulator-name = "USB_2_EN";
- };
-
- reg_usdhc2_vmmc: regulator-usdhc2 {
- compatible = "regulator-fixed";
- enable-active-high;
- /* Verdin SD_1_PWR_EN (SODIMM 76) */
- gpio = <&gpio4 22 GPIO_ACTIVE_HIGH>;
- off-on-delay-us = <100000>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_usdhc2_pwr_en>;
- regulator-max-microvolt = <3300000>;
- regulator-min-microvolt = <3300000>;
- regulator-name = "+V3.3_SD";
- startup-delay-us = <2000>;
- };
-
- reserved-memory {
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- /* Use the kernel configuration settings instead */
- /delete-node/ linux,cma;
- };
-};
-
-&A53_0 {
- cpu-supply = <®_vdd_arm>;
-};
-
-&A53_1 {
- cpu-supply = <®_vdd_arm>;
-};
-
-&A53_2 {
- cpu-supply = <®_vdd_arm>;
-};
-
-&A53_3 {
- cpu-supply = <®_vdd_arm>;
-};
-
-&cpu_alert0 {
- temperature = <95000>;
-};
-
-&cpu_crit0 {
- temperature = <105000>;
-};
-
-/* Verdin SPI_1 */
-&ecspi1 {
- #address-cells = <1>;
- #size-cells = <0>;
- cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_ecspi1>;
-};
-
-/* Verdin ETH_1 (On-module PHY) */
-&eqos {
- phy-handle = <ðphy0>;
- phy-mode = "rgmii-id";
- phy-supply = <®_module_eth1phy>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_eqos>;
- snps,force_thresh_dma_mode;
- snps,mtl-rx-config = <&mtl_rx_setup>;
- snps,mtl-tx-config = <&mtl_tx_setup>;
-
- mdio {
- compatible = "snps,dwmac-mdio";
- #address-cells = <1>;
- #size-cells = <0>;
-
- ethphy0: ethernet-phy@7 {
- compatible = "ethernet-phy-ieee802.3-c22";
- eee-broken-100tx;
- eee-broken-1000t;
- interrupt-parent = <&gpio1>;
- interrupts = <10 IRQ_TYPE_LEVEL_LOW>;
- micrel,led-mode = <0>;
- reg = <7>;
- };
- };
-
- mtl_rx_setup: rx-queues-config {
- snps,rx-queues-to-use = <5>;
- snps,rx-sched-sp;
-
- queue0 {
- snps,dcb-algorithm;
- snps,priority = <0x1>;
- snps,map-to-dma-channel = <0>;
- };
-
- queue1 {
- snps,dcb-algorithm;
- snps,priority = <0x2>;
- snps,map-to-dma-channel = <1>;
- };
-
- queue2 {
- snps,dcb-algorithm;
- snps,priority = <0x4>;
- snps,map-to-dma-channel = <2>;
- };
-
- queue3 {
- snps,dcb-algorithm;
- snps,priority = <0x8>;
- snps,map-to-dma-channel = <3>;
- };
-
- queue4 {
- snps,dcb-algorithm;
- snps,priority = <0xf0>;
- snps,map-to-dma-channel = <4>;
- };
- };
-
- mtl_tx_setup: tx-queues-config {
- snps,tx-queues-to-use = <5>;
- snps,tx-sched-sp;
-
- queue0 {
- snps,dcb-algorithm;
- snps,priority = <0x1>;
- };
-
- queue1 {
- snps,dcb-algorithm;
- snps,priority = <0x2>;
- };
-
- queue2 {
- snps,dcb-algorithm;
- snps,priority = <0x4>;
- };
-
- queue3 {
- snps,dcb-algorithm;
- snps,priority = <0x8>;
- };
-
- queue4 {
- snps,dcb-algorithm;
- snps,priority = <0xf0>;
- };
- };
-};
-
-/* Verdin ETH_2_RGMII */
-&fec {
- fsl,magic-packet;
- phy-handle = <ðphy1>;
- phy-mode = "rgmii-id";
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&pinctrl_fec>;
- pinctrl-1 = <&pinctrl_fec_sleep>;
-
- mdio {
- #address-cells = <1>;
- #size-cells = <0>;
-
- ethphy1: ethernet-phy@7 {
- compatible = "ethernet-phy-ieee802.3-c22";
- interrupt-parent = <&gpio4>;
- interrupts = <18 IRQ_TYPE_LEVEL_LOW>;
- micrel,led-mode = <0>;
- reg = <7>;
- };
- };
-};
-
-/* Verdin CAN_1 */
-&flexcan1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_flexcan1>;
- status = "disabled";
-};
-
-/* Verdin CAN_2 */
-&flexcan2 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_flexcan2>;
- status = "disabled";
-};
-
-/* Verdin QSPI_1 */
-&flexspi {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_flexspi0>;
-};
-
-&gpio1 {
- gpio-line-names = "SODIMM_206",
- "SODIMM_208",
- "",
- "",
- "",
- "SODIMM_210",
- "SODIMM_212",
- "SODIMM_216",
- "SODIMM_218",
- "",
- "",
- "SODIMM_16",
- "SODIMM_155",
- "SODIMM_157",
- "SODIMM_185",
- "SODIMM_91";
-};
-
-&gpio2 {
- gpio-line-names = "",
- "",
- "",
- "",
- "",
- "",
- "SODIMM_143",
- "SODIMM_141",
- "",
- "",
- "SODIMM_161",
- "",
- "SODIMM_84",
- "SODIMM_78",
- "SODIMM_74",
- "SODIMM_80",
- "SODIMM_82",
- "SODIMM_70",
- "SODIMM_72";
-};
-
-&gpio3 {
- gpio-line-names = "SODIMM_52",
- "SODIMM_54",
- "",
- "",
- "",
- "",
- "SODIMM_56",
- "SODIMM_58",
- "SODIMM_60",
- "SODIMM_62",
- "",
- "",
- "",
- "",
- "SODIMM_66",
- "",
- "SODIMM_64",
- "",
- "",
- "SODIMM_34",
- "SODIMM_19",
- "",
- "SODIMM_32",
- "",
- "",
- "SODIMM_30",
- "SODIMM_59",
- "SODIMM_57",
- "SODIMM_63",
- "SODIMM_61";
-};
-
-&gpio4 {
- gpio-line-names = "SODIMM_252",
- "SODIMM_222",
- "SODIMM_36",
- "SODIMM_220",
- "SODIMM_193",
- "SODIMM_191",
- "SODIMM_201",
- "SODIMM_203",
- "SODIMM_205",
- "SODIMM_207",
- "SODIMM_199",
- "SODIMM_197",
- "SODIMM_221",
- "SODIMM_219",
- "SODIMM_217",
- "SODIMM_215",
- "SODIMM_211",
- "SODIMM_213",
- "SODIMM_189",
- "SODIMM_244",
- "SODIMM_38",
- "",
- "SODIMM_76",
- "SODIMM_135",
- "SODIMM_133",
- "SODIMM_17",
- "SODIMM_24",
- "SODIMM_26",
- "SODIMM_21",
- "SODIMM_256",
- "SODIMM_48",
- "SODIMM_44";
-
- ctrl-sleep-moci-hog {
- gpio-hog;
- /* Verdin CTRL_SLEEP_MOCI# (SODIMM 256) */
- gpios = <29 GPIO_ACTIVE_HIGH>;
- line-name = "CTRL_SLEEP_MOCI#";
- output-high;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_ctrl_sleep_moci>;
- };
-};
-
-/* On-module I2C */
-&i2c1 {
- clock-frequency = <400000>;
- pinctrl-names = "default", "gpio";
- pinctrl-0 = <&pinctrl_i2c1>;
- pinctrl-1 = <&pinctrl_i2c1_gpio>;
- scl-gpios = <&gpio5 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
- sda-gpios = <&gpio5 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
- status = "okay";
-
- pca9450: pmic@25 {
- compatible = "nxp,pca9450c";
- interrupt-parent = <&gpio1>;
- /* PMIC PCA9450 PMIC_nINT GPIO1_IO3 */
- interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pmic>;
- reg = <0x25>;
-
- /*
- * The bootloader is expected to switch on LDO4 for the on-module +V3.3_ADC and the
- * I2C level shifter for the TLA2024 ADC behind this PMIC.
- */
-
- regulators {
- BUCK1 {
- regulator-always-on;
- regulator-boot-on;
- regulator-max-microvolt = <1000000>;
- regulator-min-microvolt = <720000>;
- regulator-name = "On-module +VDD_SOC (BUCK1)";
- regulator-ramp-delay = <3125>;
- };
-
- reg_vdd_arm: BUCK2 {
- nxp,dvs-run-voltage = <950000>;
- nxp,dvs-standby-voltage = <850000>;
- regulator-always-on;
- regulator-boot-on;
- regulator-max-microvolt = <1025000>;
- regulator-min-microvolt = <720000>;
- regulator-name = "On-module +VDD_ARM (BUCK2)";
- regulator-ramp-delay = <3125>;
- };
-
- reg_vdd_3v3: BUCK4 {
- regulator-always-on;
- regulator-boot-on;
- regulator-max-microvolt = <3300000>;
- regulator-min-microvolt = <3300000>;
- regulator-name = "On-module +V3.3 (BUCK4)";
- };
-
- reg_vdd_1v8: BUCK5 {
- regulator-always-on;
- regulator-boot-on;
- regulator-max-microvolt = <1800000>;
- regulator-min-microvolt = <1800000>;
- regulator-name = "PWR_1V8_MOCI (BUCK5)";
- };
-
- BUCK6 {
- regulator-always-on;
- regulator-boot-on;
- regulator-max-microvolt = <1155000>;
- regulator-min-microvolt = <1045000>;
- regulator-name = "On-module +VDD_DDR (BUCK6)";
- };
-
- LDO1 {
- regulator-always-on;
- regulator-boot-on;
- regulator-max-microvolt = <1950000>;
- regulator-min-microvolt = <1650000>;
- regulator-name = "On-module +V1.8_SNVS (LDO1)";
- };
-
- LDO2 {
- regulator-always-on;
- regulator-boot-on;
- regulator-max-microvolt = <1150000>;
- regulator-min-microvolt = <800000>;
- regulator-name = "On-module +V0.8_SNVS (LDO2)";
- };
-
- LDO3 {
- regulator-always-on;
- regulator-boot-on;
- regulator-max-microvolt = <1800000>;
- regulator-min-microvolt = <1800000>;
- regulator-name = "On-module +V1.8A (LDO3)";
- };
-
- LDO4 {
- regulator-always-on;
- regulator-boot-on;
- regulator-max-microvolt = <3300000>;
- regulator-min-microvolt = <3300000>;
- regulator-name = "On-module +V3.3_ADC (LDO4)";
- };
-
- LDO5 {
- regulator-max-microvolt = <3300000>;
- regulator-min-microvolt = <1800000>;
- regulator-name = "On-module +V3.3_1.8_SD (LDO5)";
- };
- };
- };
-
- rtc_i2c: rtc@32 {
- compatible = "epson,rx8130";
- reg = <0x32>;
- };
-
- /* On-module temperature sensor */
- hwmon_temp_module: sensor@48 {
- compatible = "ti,tmp1075";
- reg = <0x48>;
- vs-supply = <®_vdd_1v8>;
- };
-
- adc@49 {
- compatible = "ti,ads1015";
- reg = <0x49>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- /* Verdin I2C_1 (ADC_4 - ADC_3) */
- channel@0 {
- reg = <0>;
- ti,datarate = <4>;
- ti,gain = <2>;
- };
-
- /* Verdin I2C_1 (ADC_4 - ADC_1) */
- channel@1 {
- reg = <1>;
- ti,datarate = <4>;
- ti,gain = <2>;
- };
-
- /* Verdin I2C_1 (ADC_3 - ADC_1) */
- channel@2 {
- reg = <2>;
- ti,datarate = <4>;
- ti,gain = <2>;
- };
-
- /* Verdin I2C_1 (ADC_2 - ADC_1) */
- channel@3 {
- reg = <3>;
- ti,datarate = <4>;
- ti,gain = <2>;
- };
-
- /* Verdin I2C_1 ADC_4 */
- channel@4 {
- reg = <4>;
- ti,datarate = <4>;
- ti,gain = <2>;
- };
-
- /* Verdin I2C_1 ADC_3 */
- channel@5 {
- reg = <5>;
- ti,datarate = <4>;
- ti,gain = <2>;
- };
-
- /* Verdin I2C_1 ADC_2 */
- channel@6 {
- reg = <6>;
- ti,datarate = <4>;
- ti,gain = <2>;
- };
-
- /* Verdin I2C_1 ADC_1 */
- channel@7 {
- reg = <7>;
- ti,datarate = <4>;
- ti,gain = <2>;
- };
- };
-
- eeprom@50 {
- compatible = "st,24c02";
- pagesize = <16>;
- reg = <0x50>;
- };
-};
-
-/* Verdin I2C_2_DSI */
-&i2c2 {
- /* Lower frequency to avoid DDC/EDID issues with certain displays/screens. */
- clock-frequency = <10000>;
- pinctrl-names = "default", "gpio";
- pinctrl-0 = <&pinctrl_i2c2>;
- pinctrl-1 = <&pinctrl_i2c2_gpio>;
- scl-gpios = <&gpio5 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
- sda-gpios = <&gpio5 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
-
- atmel_mxt_ts_mezzanine: touch-mezzanine@4a {
- compatible = "atmel,maxtouch";
- /* Verdin GPIO_3 (SODIMM 210) */
- interrupt-parent = <&gpio1>;
- interrupts = <5 IRQ_TYPE_EDGE_FALLING>;
- reg = <0x4a>;
- /* Verdin GPIO_2 (SODIMM 208) */
- reset-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
- status = "disabled";
- };
-};
-
-/* TODO: Verdin I2C_3_HDMI */
-
-/* Verdin I2C_4_CSI */
-&i2c3 {
- clock-frequency = <400000>;
- pinctrl-names = "default", "gpio";
- pinctrl-0 = <&pinctrl_i2c3>;
- pinctrl-1 = <&pinctrl_i2c3_gpio>;
- scl-gpios = <&gpio5 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
- sda-gpios = <&gpio5 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
-};
-
-/* Verdin I2C_1 */
-&i2c4 {
- clock-frequency = <400000>;
- pinctrl-names = "default", "gpio";
- pinctrl-0 = <&pinctrl_i2c4>;
- pinctrl-1 = <&pinctrl_i2c4_gpio>;
- scl-gpios = <&gpio5 20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
- sda-gpios = <&gpio5 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
-
- gpio_expander_21: gpio-expander@21 {
- compatible = "nxp,pcal6416";
- #gpio-cells = <2>;
- gpio-controller;
- reg = <0x21>;
- vcc-supply = <®_3p3v>;
- status = "disabled";
- };
-
- lvds_ti_sn65dsi84: bridge@2c {
- compatible = "ti,sn65dsi84";
- /* Verdin GPIO_9_DSI (SN65DSI84 IRQ, SODIMM 17, unused) */
- /* Verdin GPIO_10_DSI (SODIMM 21) */
- enable-gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_gpio_10_dsi>;
- reg = <0x2c>;
- status = "disabled";
- };
-
- /* Current measurement into module VCC */
- hwmon: hwmon@40 {
- compatible = "ti,ina219";
- reg = <0x40>;
- shunt-resistor = <10000>;
- status = "disabled";
- };
-
- hdmi_lontium_lt8912: hdmi@48 {
- compatible = "lontium,lt8912b";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_gpio_10_dsi>, <&pinctrl_pwm_3_dsi_hpd_gpio>;
- reg = <0x48>;
- /* Verdin GPIO_9_DSI (LT8912 INT, SODIMM 17, unused) */
- /* Verdin GPIO_10_DSI (SODIMM 21) */
- reset-gpios = <&gpio4 28 GPIO_ACTIVE_LOW>;
- status = "disabled";
- };
-
- atmel_mxt_ts: touch@4a {
- compatible = "atmel,maxtouch";
- /*
- * Verdin GPIO_9_DSI
- * (TOUCH_INT#, SODIMM 17, also routed to SN65DSI84 IRQ albeit currently unused)
- */
- interrupt-parent = <&gpio4>;
- interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_gpio_9_dsi>, <&pinctrl_i2s_2_bclk_touch_reset>;
- reg = <0x4a>;
- /* Verdin I2S_2_BCLK (TOUCH_RESET#, SODIMM 42) */
- reset-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
- status = "disabled";
- };
-
- /* Temperature sensor on carrier board */
- hwmon_temp: sensor@4f {
- compatible = "ti,tmp75c";
- reg = <0x4f>;
- status = "disabled";
- };
-
- /* EEPROM on display adapter (MIPI DSI Display Adapter) */
- eeprom_display_adapter: eeprom@50 {
- compatible = "st,24c02";
- pagesize = <16>;
- reg = <0x50>;
- status = "disabled";
- };
-
- /* EEPROM on carrier board */
- eeprom_carrier_board: eeprom@57 {
- compatible = "st,24c02";
- pagesize = <16>;
- reg = <0x57>;
- status = "disabled";
- };
-};
-
-/* Verdin PCIE_1 */
-&pcie {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pcie>;
- /* PCIE_1_RESET# (SODIMM 244) */
- reset-gpio = <&gpio4 19 GPIO_ACTIVE_LOW>;
-};
-
-&pcie_phy {
- clocks = <&hsio_blk_ctrl>;
- clock-names = "ref";
- fsl,clkreq-unsupported;
- fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_OUTPUT>;
-};
-
-/* Verdin PWM_1 */
-&pwm1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pwm_1>;
- #pwm-cells = <3>;
-};
-
-/* Verdin PWM_2 */
-&pwm2 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pwm_2>;
- #pwm-cells = <3>;
-};
-
-/* Verdin PWM_3_DSI */
-&pwm3 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pwm_3>;
- #pwm-cells = <3>;
-};
-
-/* TODO: Verdin I2S_1 */
-
-/* TODO: Verdin I2S_2 */
-
-&snvs_pwrkey {
- status = "okay";
-};
-
-/* Verdin UART_1 */
-&uart1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart1>;
- uart-has-rtscts;
-};
-
-/* Verdin UART_2 */
-&uart2 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart2>;
- uart-has-rtscts;
-};
-
-/* Verdin UART_3, used as the Linux Console */
-&uart3 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart3>;
-};
-
-/* Verdin UART_4, used for Bluetooth on Wi-Fi/Bluetooth SKUs */
-&uart4 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart4>;
-};
-
-/* Verdin USB_1 */
-&usb3_0 {
- fsl,disable-port-power-control;
- fsl,over-current-active-low;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_usb_1_oc_n>;
-};
-
-&usb_dwc3_0 {
- /* dual role only, not full featured OTG */
- adp-disable;
- dr_mode = "otg";
- hnp-disable;
- maximum-speed = "high-speed";
- role-switch-default-mode = "peripheral";
- srp-disable;
- usb-role-switch;
-
- connector {
- compatible = "gpio-usb-b-connector", "usb-b-connector";
- id-gpios = <&gpio2 10 GPIO_ACTIVE_HIGH>;
- label = "Type-C";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_usb_1_id>;
- self-powered;
- type = "micro";
- vbus-supply = <®_usb1_vbus>;
- };
-};
-
-/* Verdin USB_2 */
-&usb3_1 {
- fsl,disable-port-power-control;
-};
-
-&usb3_phy1 {
- vbus-supply = <®_usb2_vbus>;
-};
-
-&usb_dwc3_1 {
- dr_mode = "host";
-};
-
-/* Verdin SD_1 */
-&usdhc2 {
- assigned-clocks = <&clk IMX8MP_CLK_USDHC2>;
- assigned-clock-rates = <400000000>;
- bus-width = <4>;
- cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
- disable-wp;
- pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
- pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_cd>;
- pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_cd>;
- pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_cd>;
- pinctrl-3 = <&pinctrl_usdhc2_sleep>, <&pinctrl_usdhc2_cd_sleep>;
- vmmc-supply = <®_usdhc2_vmmc>;
-};
-
-/* On-module eMMC */
-&usdhc3 {
- assigned-clocks = <&clk IMX8MP_CLK_USDHC3_ROOT>;
- assigned-clock-rates = <400000000>;
- bus-width = <8>;
- non-removable;
- pinctrl-names = "default", "state_100mhz", "state_200mhz";
- pinctrl-0 = <&pinctrl_usdhc3>;
- pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
- pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
- status = "okay";
-};
-
-&wdog1 {
- fsl,ext-reset-output;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_wdog>;
- status = "okay";
-};
-
-&iomuxc {
- pinctrl_bt_uart: btuartgrp {
- fsl,pins =
- <MX8MP_IOMUXC_ECSPI2_MISO__UART4_DCE_CTS 0x1c4>,
- <MX8MP_IOMUXC_ECSPI2_MOSI__UART4_DCE_TX 0x1c4>,
- <MX8MP_IOMUXC_ECSPI2_SCLK__UART4_DCE_RX 0x1c4>,
- <MX8MP_IOMUXC_ECSPI2_SS0__UART4_DCE_RTS 0x1c4>;
- };
-
- pinctrl_ctrl_sleep_moci: ctrlsleepmocigrp {
- fsl,pins =
- <MX8MP_IOMUXC_SAI3_RXC__GPIO4_IO29 0x1c4>; /* SODIMM 256 */
- };
-
- pinctrl_ecspi1: ecspi1grp {
- fsl,pins =
- <MX8MP_IOMUXC_ECSPI1_MISO__ECSPI1_MISO 0x1c4>, /* SODIMM 198 */
- <MX8MP_IOMUXC_ECSPI1_MOSI__ECSPI1_MOSI 0x4>, /* SODIMM 200 */
- <MX8MP_IOMUXC_ECSPI1_SCLK__ECSPI1_SCLK 0x4>, /* SODIMM 196 */
- <MX8MP_IOMUXC_ECSPI1_SS0__GPIO5_IO09 0x1c4>; /* SODIMM 202 */
- };
-
- /* Connection On Board PHY */
- pinctrl_eqos: eqosgrp {
- fsl,pins =
- <MX8MP_IOMUXC_ENET_MDC__ENET_QOS_MDC 0x3>,
- <MX8MP_IOMUXC_ENET_MDIO__ENET_QOS_MDIO 0x3>,
- <MX8MP_IOMUXC_ENET_RD0__ENET_QOS_RGMII_RD0 0x91>,
- <MX8MP_IOMUXC_ENET_RD1__ENET_QOS_RGMII_RD1 0x91>,
- <MX8MP_IOMUXC_ENET_RD2__ENET_QOS_RGMII_RD2 0x91>,
- <MX8MP_IOMUXC_ENET_RD3__ENET_QOS_RGMII_RD3 0x91>,
- <MX8MP_IOMUXC_ENET_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK 0x91>,
- <MX8MP_IOMUXC_ENET_RX_CTL__ENET_QOS_RGMII_RX_CTL 0x91>,
- <MX8MP_IOMUXC_ENET_TD0__ENET_QOS_RGMII_TD0 0x1f>,
- <MX8MP_IOMUXC_ENET_TD1__ENET_QOS_RGMII_TD1 0x1f>,
- <MX8MP_IOMUXC_ENET_TD2__ENET_QOS_RGMII_TD2 0x1f>,
- <MX8MP_IOMUXC_ENET_TD3__ENET_QOS_RGMII_TD3 0x1f>,
- <MX8MP_IOMUXC_ENET_TX_CTL__ENET_QOS_RGMII_TX_CTL 0x1f>,
- <MX8MP_IOMUXC_ENET_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK 0x1f>;
- };
-
- /* ETH_INT# shared with TPM_INT# (usually N/A) */
- pinctrl_eth_tpm_int: ethtpmintgrp {
- fsl,pins =
- <MX8MP_IOMUXC_GPIO1_IO10__GPIO1_IO10 0x1c4>;
- };
-
- /* Connection Carrier Board PHY ETH_2 */
- pinctrl_fec: fecgrp {
- fsl,pins =
- <MX8MP_IOMUXC_SAI1_RXD2__ENET1_MDC 0x3>, /* SODIMM 193 */
- <MX8MP_IOMUXC_SAI1_RXD3__ENET1_MDIO 0x3>, /* SODIMM 191 */
- <MX8MP_IOMUXC_SAI1_RXD4__ENET1_RGMII_RD0 0x91>, /* SODIMM 201 */
- <MX8MP_IOMUXC_SAI1_RXD5__ENET1_RGMII_RD1 0x91>, /* SODIMM 203 */
- <MX8MP_IOMUXC_SAI1_RXD6__ENET1_RGMII_RD2 0x91>, /* SODIMM 205 */
- <MX8MP_IOMUXC_SAI1_RXD7__ENET1_RGMII_RD3 0x91>, /* SODIMM 207 */
- <MX8MP_IOMUXC_SAI1_TXC__ENET1_RGMII_RXC 0x91>, /* SODIMM 197 */
- <MX8MP_IOMUXC_SAI1_TXFS__ENET1_RGMII_RX_CTL 0x91>, /* SODIMM 199 */
- <MX8MP_IOMUXC_SAI1_TXD0__ENET1_RGMII_TD0 0x1f>, /* SODIMM 221 */
- <MX8MP_IOMUXC_SAI1_TXD1__ENET1_RGMII_TD1 0x1f>, /* SODIMM 219 */
- <MX8MP_IOMUXC_SAI1_TXD2__ENET1_RGMII_TD2 0x1f>, /* SODIMM 217 */
- <MX8MP_IOMUXC_SAI1_TXD3__ENET1_RGMII_TD3 0x1f>, /* SODIMM 215 */
- <MX8MP_IOMUXC_SAI1_TXD4__ENET1_RGMII_TX_CTL 0x1f>, /* SODIMM 211 */
- <MX8MP_IOMUXC_SAI1_TXD5__ENET1_RGMII_TXC 0x1f>, /* SODIMM 213 */
- <MX8MP_IOMUXC_SAI1_TXD6__GPIO4_IO18 0x1c4>; /* SODIMM 189 */
- };
-
- pinctrl_fec_sleep: fecsleepgrp {
- fsl,pins =
- <MX8MP_IOMUXC_SAI1_RXD2__ENET1_MDC 0x3>, /* SODIMM 193 */
- <MX8MP_IOMUXC_SAI1_RXD3__ENET1_MDIO 0x3>, /* SODIMM 191 */
- <MX8MP_IOMUXC_SAI1_RXD4__ENET1_RGMII_RD0 0x91>, /* SODIMM 201 */
- <MX8MP_IOMUXC_SAI1_RXD5__ENET1_RGMII_RD1 0x91>, /* SODIMM 203 */
- <MX8MP_IOMUXC_SAI1_RXD6__ENET1_RGMII_RD2 0x91>, /* SODIMM 205 */
- <MX8MP_IOMUXC_SAI1_RXD7__ENET1_RGMII_RD3 0x91>, /* SODIMM 207 */
- <MX8MP_IOMUXC_SAI1_TXC__ENET1_RGMII_RXC 0x91>, /* SODIMM 197 */
- <MX8MP_IOMUXC_SAI1_TXFS__ENET1_RGMII_RX_CTL 0x91>, /* SODIMM 199 */
- <MX8MP_IOMUXC_SAI1_TXD0__GPIO4_IO12 0x1f>, /* SODIMM 221 */
- <MX8MP_IOMUXC_SAI1_TXD1__GPIO4_IO13 0x1f>, /* SODIMM 219 */
- <MX8MP_IOMUXC_SAI1_TXD2__GPIO4_IO14 0x1f>, /* SODIMM 217 */
- <MX8MP_IOMUXC_SAI1_TXD3__GPIO4_IO15 0x1f>, /* SODIMM 215 */
- <MX8MP_IOMUXC_SAI1_TXD4__GPIO4_IO16 0x1f>, /* SODIMM 211 */
- <MX8MP_IOMUXC_SAI1_TXD5__GPIO4_IO17 0x1f>, /* SODIMM 213 */
- <MX8MP_IOMUXC_SAI1_TXD6__GPIO4_IO18 0x184>; /* SODIMM 189 */
- };
-
- pinctrl_flexcan1: flexcan1grp {
- fsl,pins =
- <MX8MP_IOMUXC_SPDIF_RX__CAN1_RX 0x154>, /* SODIMM 22 */
- <MX8MP_IOMUXC_SPDIF_TX__CAN1_TX 0x154>; /* SODIMM 20 */
- };
-
- pinctrl_flexcan2: flexcan2grp {
- fsl,pins =
- <MX8MP_IOMUXC_SAI2_MCLK__CAN2_RX 0x154>, /* SODIMM 26 */
- <MX8MP_IOMUXC_SAI2_TXD0__CAN2_TX 0x154>; /* SODIMM 24 */
- };
-
- pinctrl_flexspi0: flexspi0grp {
- fsl,pins =
- <MX8MP_IOMUXC_NAND_ALE__FLEXSPI_A_SCLK 0x1c2>, /* SODIMM 52 */
- <MX8MP_IOMUXC_NAND_CE0_B__FLEXSPI_A_SS0_B 0x82>, /* SODIMM 54 */
- <MX8MP_IOMUXC_NAND_DQS__FLEXSPI_A_DQS 0x82>, /* SODIMM 66 */
- <MX8MP_IOMUXC_NAND_DATA00__FLEXSPI_A_DATA00 0x82>, /* SODIMM 56 */
- <MX8MP_IOMUXC_NAND_DATA01__FLEXSPI_A_DATA01 0x82>, /* SODIMM 58 */
- <MX8MP_IOMUXC_NAND_DATA02__FLEXSPI_A_DATA02 0x82>, /* SODIMM 60 */
- <MX8MP_IOMUXC_NAND_DATA03__FLEXSPI_A_DATA03 0x82>, /* SODIMM 62 */
- <MX8MP_IOMUXC_NAND_READY_B__GPIO3_IO16 0x82>; /* SODIMM 64 */
- };
-
- pinctrl_gpio1: gpio1grp {
- fsl,pins =
- <MX8MP_IOMUXC_GPIO1_IO00__GPIO1_IO00 0x184>; /* SODIMM 206 */
- };
-
- pinctrl_gpio2: gpio2grp {
- fsl,pins =
- <MX8MP_IOMUXC_GPIO1_IO01__GPIO1_IO01 0x1c4>; /* SODIMM 208 */
- };
-
- pinctrl_gpio3: gpio3grp {
- fsl,pins =
- <MX8MP_IOMUXC_GPIO1_IO05__GPIO1_IO05 0x184>; /* SODIMM 210 */
- };
-
- pinctrl_gpio4: gpio4grp {
- fsl,pins =
- <MX8MP_IOMUXC_GPIO1_IO06__GPIO1_IO06 0x184>; /* SODIMM 212 */
- };
-
- pinctrl_gpio5: gpio5grp {
- fsl,pins =
- <MX8MP_IOMUXC_GPIO1_IO07__GPIO1_IO07 0x184>; /* SODIMM 216 */
- };
-
- pinctrl_gpio6: gpio6grp {
- fsl,pins =
- <MX8MP_IOMUXC_GPIO1_IO08__GPIO1_IO08 0x184>; /* SODIMM 218 */
- };
-
- pinctrl_gpio7: gpio7grp {
- fsl,pins =
- <MX8MP_IOMUXC_SAI1_RXD1__GPIO4_IO03 0x184>; /* SODIMM 220 */
- };
-
- pinctrl_gpio8: gpio8grp {
- fsl,pins =
- <MX8MP_IOMUXC_SAI1_RXC__GPIO4_IO01 0x184>; /* SODIMM 222 */
- };
-
- /* Verdin GPIO_9_DSI (pulled-up as active-low) */
- pinctrl_gpio_9_dsi: gpio9dsigrp {
- fsl,pins =
- <MX8MP_IOMUXC_SAI2_TXC__GPIO4_IO25 0x1c4>; /* SODIMM 17 */
- };
-
- /* Verdin GPIO_10_DSI */
- pinctrl_gpio_10_dsi: gpio10dsigrp {
- fsl,pins =
- <MX8MP_IOMUXC_SAI3_RXFS__GPIO4_IO28 0x1c4>; /* SODIMM 21 */
- };
-
- /* Non-wifi MSP usage only */
- pinctrl_gpio_hog1: gpiohog1grp {
- fsl,pins =
- <MX8MP_IOMUXC_ECSPI2_MISO__GPIO5_IO12 0x1c4>, /* SODIMM 116 */
- <MX8MP_IOMUXC_ECSPI2_MOSI__GPIO5_IO11 0x1c4>, /* SODIMM 152 */
- <MX8MP_IOMUXC_ECSPI2_SCLK__GPIO5_IO10 0x1c4>, /* SODIMM 164 */
- <MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13 0x1c4>; /* SODIMM 128 */
- };
-
- /* USB_2_OC# */
- pinctrl_gpio_hog2: gpiohog2grp {
- fsl,pins =
- <MX8MP_IOMUXC_SAI3_MCLK__GPIO5_IO02 0x1c4>; /* SODIMM 187 */
- };
-
- pinctrl_gpio_hog3: gpiohog3grp {
- fsl,pins =
- /* CSI_1_MCLK */
- <MX8MP_IOMUXC_GPIO1_IO15__GPIO1_IO15 0x1c4>; /* SODIMM 91 */
- };
-
- /* Wifi usage only */
- pinctrl_gpio_hog4: gpiohog4grp {
- fsl,pins =
- <MX8MP_IOMUXC_UART4_RXD__GPIO5_IO28 0x1c4>, /* SODIMM 151 */
- <MX8MP_IOMUXC_UART4_TXD__GPIO5_IO29 0x1c4>; /* SODIMM 153 */
- };
-
- pinctrl_gpio_keys: gpiokeysgrp {
- fsl,pins =
- <MX8MP_IOMUXC_SAI1_RXFS__GPIO4_IO00 0x1c4>; /* SODIMM 252 */
- };
-
- pinctrl_hdmi_hog: hdmihoggrp {
- fsl,pins =
- <MX8MP_IOMUXC_HDMI_CEC__HDMIMIX_HDMI_CEC 0x40000019>, /* SODIMM 63 */
- <MX8MP_IOMUXC_HDMI_DDC_SCL__HDMIMIX_HDMI_SCL 0x400001c3>, /* SODIMM 59 */
- <MX8MP_IOMUXC_HDMI_DDC_SDA__HDMIMIX_HDMI_SDA 0x400001c3>, /* SODIMM 57 */
- <MX8MP_IOMUXC_HDMI_HPD__HDMIMIX_HDMI_HPD 0x40000019>; /* SODIMM 61 */
- };
-
- /* On-module I2C */
- pinctrl_i2c1: i2c1grp {
- fsl,pins =
- <MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL 0x400001c6>, /* PMIC_I2C_SCL */
- <MX8MP_IOMUXC_I2C1_SDA__I2C1_SDA 0x400001c6>; /* PMIC_I2C_SDA */
- };
-
- pinctrl_i2c1_gpio: i2c1gpiogrp {
- fsl,pins =
- <MX8MP_IOMUXC_I2C1_SCL__GPIO5_IO14 0x400001c6>, /* PMIC_I2C_SCL */
- <MX8MP_IOMUXC_I2C1_SDA__GPIO5_IO15 0x400001c6>; /* PMIC_I2C_SDA */
- };
-
- /* Verdin I2C_2_DSI */
- pinctrl_i2c2: i2c2grp {
- fsl,pins =
- <MX8MP_IOMUXC_I2C2_SCL__I2C2_SCL 0x400001c6>, /* SODIMM 55 */
- <MX8MP_IOMUXC_I2C2_SDA__I2C2_SDA 0x400001c6>; /* SODIMM 53 */
- };
-
- pinctrl_i2c2_gpio: i2c2gpiogrp {
- fsl,pins =
- <MX8MP_IOMUXC_I2C2_SCL__GPIO5_IO16 0x400001c6>, /* SODIMM 55 */
- <MX8MP_IOMUXC_I2C2_SDA__GPIO5_IO17 0x400001c6>; /* SODIMM 53 */
- };
-
- /* Verdin I2C_4_CSI */
- pinctrl_i2c3: i2c3grp {
- fsl,pins =
- <MX8MP_IOMUXC_I2C3_SCL__I2C3_SCL 0x400001c6>, /* SODIMM 95 */
- <MX8MP_IOMUXC_I2C3_SDA__I2C3_SDA 0x400001c6>; /* SODIMM 93 */
- };
-
- pinctrl_i2c3_gpio: i2c3gpiogrp {
- fsl,pins =
- <MX8MP_IOMUXC_I2C3_SCL__GPIO5_IO18 0x400001c6>, /* SODIMM 95 */
- <MX8MP_IOMUXC_I2C3_SDA__GPIO5_IO19 0x400001c6>; /* SODIMM 93 */
- };
-
- /* Verdin I2C_1 */
- pinctrl_i2c4: i2c4grp {
- fsl,pins =
- <MX8MP_IOMUXC_I2C4_SCL__I2C4_SCL 0x400001c6>, /* SODIMM 14 */
- <MX8MP_IOMUXC_I2C4_SDA__I2C4_SDA 0x400001c6>; /* SODIMM 12 */
- };
-
- pinctrl_i2c4_gpio: i2c4gpiogrp {
- fsl,pins =
- <MX8MP_IOMUXC_I2C4_SCL__GPIO5_IO20 0x400001c6>, /* SODIMM 14 */
- <MX8MP_IOMUXC_I2C4_SDA__GPIO5_IO21 0x400001c6>; /* SODIMM 12 */
- };
-
- /* Verdin I2S_2_BCLK (TOUCH_RESET#) */
- pinctrl_i2s_2_bclk_touch_reset: i2s2bclktouchresetgrp {
- fsl,pins =
- <MX8MP_IOMUXC_SAI3_TXC__GPIO5_IO00 0x184>; /* SODIMM 42 */
- };
-
- /* Verdin I2S_2_D_OUT shared with SAI3 */
- pinctrl_i2s_2_d_out_dsi_1_bkl_en: i2s2doutdsi1bklengrp {
- fsl,pins =
- <MX8MP_IOMUXC_SAI3_TXD__GPIO5_IO01 0x184>; /* SODIMM 46 */
- };
-
- pinctrl_pcie: pciegrp {
- fsl,pins =
- <MX8MP_IOMUXC_SAI1_TXD7__GPIO4_IO19 0x4>, /* SODIMM 244 */
- <MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19 0x1c4>; /* PMIC_EN_PCIe_CLK, unused */
- };
-
- pinctrl_pmic: pmicirqgrp {
- fsl,pins =
- <MX8MP_IOMUXC_GPIO1_IO03__GPIO1_IO03 0x1c4>; /* PMIC_INT# */
- };
-
- pinctrl_pwm_1: pwm1grp {
- fsl,pins =
- <MX8MP_IOMUXC_SPDIF_EXT_CLK__PWM1_OUT 0x6>; /* SODIMM 15 */
- };
-
- pinctrl_pwm_2: pwm2grp {
- fsl,pins =
- <MX8MP_IOMUXC_GPIO1_IO11__PWM2_OUT 0x6>; /* SODIMM 16 */
- };
-
- /* Verdin PWM_3_DSI shared with GPIO3_IO20 */
- pinctrl_pwm_3: pwm3grp {
- fsl,pins =
- <MX8MP_IOMUXC_SAI5_RXC__PWM3_OUT 0x6>; /* SODIMM 19 */
- };
-
- /* Verdin PWM_3_DSI (pulled-down as active-high) shared with PWM3_OUT */
- pinctrl_pwm_3_dsi_hpd_gpio: pwm3dsi1hpdgpiogrp {
- fsl,pins =
- <MX8MP_IOMUXC_SAI5_RXC__GPIO3_IO20 0x184>; /* SODIMM 19 */
- };
-
- pinctrl_reg_eth: regethgrp {
- fsl,pins =
- <MX8MP_IOMUXC_SD2_WP__GPIO2_IO20 0x184>; /* PMIC_EN_ETH */
- };
-
- pinctrl_sai1: sai1grp {
- fsl,pins =
- <MX8MP_IOMUXC_SAI1_MCLK__AUDIOMIX_SAI1_MCLK 0x96>, /* SODIMM 38 */
- <MX8MP_IOMUXC_SAI1_RXD0__AUDIOMIX_SAI1_RX_DATA00 0x1d6>, /* SODIMM 36 */
- <MX8MP_IOMUXC_SAI5_MCLK__AUDIOMIX_SAI1_TX_BCLK 0x1d6>, /* SODIMM 30 */
- <MX8MP_IOMUXC_SAI5_RXD1__AUDIOMIX_SAI1_TX_SYNC 0x1d6>, /* SODIMM 32 */
- <MX8MP_IOMUXC_SAI5_RXFS__AUDIOMIX_SAI1_TX_DATA00 0x96>; /* SODIMM 34 */
- };
-
- pinctrl_sai3: sai3grp {
- fsl,pins =
- <MX8MP_IOMUXC_SAI3_RXD__AUDIOMIX_SAI3_RX_DATA00 0x1d6>, /* SODIMM 48 */
- <MX8MP_IOMUXC_SAI3_TXC__AUDIOMIX_SAI3_TX_BCLK 0x1d6>, /* SODIMM 42 */
- <MX8MP_IOMUXC_SAI3_TXD__AUDIOMIX_SAI3_TX_DATA00 0x96>, /* SODIMM 46 */
- <MX8MP_IOMUXC_SAI3_TXFS__AUDIOMIX_SAI3_TX_SYNC 0x1d6>; /* SODIMM 44 */
- };
-
- pinctrl_uart1: uart1grp {
- fsl,pins =
- <MX8MP_IOMUXC_SAI2_RXD0__UART1_DCE_RTS 0x1c4>, /* SODIMM 135 */
- <MX8MP_IOMUXC_SAI2_TXFS__UART1_DCE_CTS 0x1c4>, /* SODIMM 133 */
- <MX8MP_IOMUXC_UART1_RXD__UART1_DCE_RX 0x1c4>, /* SODIMM 129 */
- <MX8MP_IOMUXC_UART1_TXD__UART1_DCE_TX 0x1c4>; /* SODIMM 131 */
- };
-
- pinctrl_uart2: uart2grp {
- fsl,pins =
- <MX8MP_IOMUXC_SD1_DATA4__UART2_DCE_RTS 0x1c4>, /* SODIMM 143 */
- <MX8MP_IOMUXC_SD1_DATA5__UART2_DCE_CTS 0x1c4>, /* SODIMM 141 */
- <MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX 0x1c4>, /* SODIMM 137 */
- <MX8MP_IOMUXC_UART2_TXD__UART2_DCE_TX 0x1c4>; /* SODIMM 139 */
- };
-
- pinctrl_uart3: uart3grp {
- fsl,pins =
- <MX8MP_IOMUXC_UART3_RXD__UART3_DCE_RX 0x1c4>, /* SODIMM 147 */
- <MX8MP_IOMUXC_UART3_TXD__UART3_DCE_TX 0x1c4>; /* SODIMM 149 */
- };
-
- /* Non-wifi usage only */
- pinctrl_uart4: uart4grp {
- fsl,pins =
- <MX8MP_IOMUXC_UART4_RXD__UART4_DCE_RX 0x1c4>, /* SODIMM 151 */
- <MX8MP_IOMUXC_UART4_TXD__UART4_DCE_TX 0x1c4>; /* SODIMM 153 */
- };
-
- pinctrl_usb1_vbus: usb1vbusgrp {
- fsl,pins =
- <MX8MP_IOMUXC_GPIO1_IO12__GPIO1_IO12 0x106>; /* SODIMM 155 */
- };
-
- /* USB_1_ID */
- pinctrl_usb_1_id: usb1idgrp {
- fsl,pins =
- <MX8MP_IOMUXC_SD1_RESET_B__GPIO2_IO10 0x1c4>; /* SODIMM 161 */
- };
-
- /* USB_1_OC# */
- pinctrl_usb_1_oc_n: usb1ocngrp {
- fsl,pins =
- <MX8MP_IOMUXC_GPIO1_IO13__USB1_OTG_OC 0x1c4>; /* SODIMM 157 */
- };
-
- pinctrl_usb2_vbus: usb2vbusgrp {
- fsl,pins =
- <MX8MP_IOMUXC_GPIO1_IO14__GPIO1_IO14 0x106>; /* SODIMM 185 */
- };
-
- /* On-module Wi-Fi */
- pinctrl_usdhc1: usdhc1grp {
- fsl,pins =
- <MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK 0x190>,
- <MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD 0x1d0>,
- <MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0 0x1d0>,
- <MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1 0x1d0>,
- <MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2 0x1d0>,
- <MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3 0x1d0>;
- };
-
- pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
- fsl,pins =
- <MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK 0x194>,
- <MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD 0x1d4>,
- <MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0 0x1d4>,
- <MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1 0x1d4>,
- <MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2 0x1d4>,
- <MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3 0x1d4>;
- };
-
- pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {
- fsl,pins =
- <MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK 0x196>,
- <MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD 0x1d6>,
- <MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0 0x1d6>,
- <MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1 0x1d6>,
- <MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2 0x1d6>,
- <MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3 0x1d6>;
- };
-
- pinctrl_usdhc2_cd: usdhc2cdgrp {
- fsl,pins =
- <MX8MP_IOMUXC_SD2_CD_B__GPIO2_IO12 0x1c4>; /* SODIMM 84 */
- };
-
- pinctrl_usdhc2_cd_sleep: usdhc2cdslpgrp {
- fsl,pins =
- <MX8MP_IOMUXC_SD2_CD_B__GPIO2_IO12 0x0>; /* SODIMM 84 */
- };
-
- pinctrl_usdhc2_pwr_en: usdhc2pwrengrp {
- fsl,pins =
- <MX8MP_IOMUXC_SAI2_RXC__GPIO4_IO22 0x4>; /* SODIMM 76 */
- };
-
- pinctrl_usdhc2: usdhc2grp {
- fsl,pins =
- <MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0x4>, /* PMIC_USDHC_VSELECT */
- <MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x190>, /* SODIMM 78 */
- <MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d0>, /* SODIMM 74 */
- <MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d0>, /* SODIMM 80 */
- <MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d0>, /* SODIMM 82 */
- <MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d0>, /* SODIMM 70 */
- <MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d0>; /* SODIMM 72 */
- };
-
- pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
- fsl,pins =
- <MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0x4>,
- <MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x194>,
- <MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d4>,
- <MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d4>,
- <MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d4>,
- <MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d4>,
- <MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d4>;
- };
-
- pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
- fsl,pins =
- <MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0x4>,
- <MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x196>,
- <MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d6>,
- <MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d6>,
- <MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d6>,
- <MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d6>,
- <MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d6>;
- };
-
- /* Avoid backfeeding with removed card power */
- pinctrl_usdhc2_sleep: usdhc2slpgrp {
- fsl,pins =
- <MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0x0>,
- <MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x100>,
- <MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x100>,
- <MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x100>,
- <MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x100>,
- <MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x100>,
- <MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x100>;
- };
-
- pinctrl_usdhc3: usdhc3grp {
- fsl,pins =
- <MX8MP_IOMUXC_GPIO1_IO09__USDHC3_RESET_B 0x1d1>,
- <MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x190>,
- <MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d0>,
- <MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d0>,
- <MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d0>,
- <MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d0>,
- <MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d0>,
- <MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d0>,
- <MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d0>,
- <MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d0>,
- <MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x190>,
- <MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d0>;
- };
-
- pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {
- fsl,pins =
- <MX8MP_IOMUXC_GPIO1_IO09__USDHC3_RESET_B 0x1d1>,
- <MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x194>,
- <MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d4>,
- <MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d4>,
- <MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d4>,
- <MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d4>,
- <MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d4>,
- <MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d4>,
- <MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d4>,
- <MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d4>,
- <MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x194>,
- <MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d4>;
- };
-
- pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {
- fsl,pins =
- <MX8MP_IOMUXC_GPIO1_IO09__USDHC3_RESET_B 0x1d1>,
- <MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x196>,
- <MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d2>,
- <MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d2>,
- <MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d2>,
- <MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d2>,
- <MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d2>,
- <MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d2>,
- <MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d2>,
- <MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d2>,
- <MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x196>,
- <MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d6>;
- };
-
- pinctrl_wdog: wdoggrp {
- fsl,pins =
- <MX8MP_IOMUXC_GPIO1_IO02__WDOG1_WDOG_B 0xc6>; /* PMIC_WDI */
- };
-
- pinctrl_bluetooth_ctrl: bluetoothctrlgrp {
- fsl,pins =
- <MX8MP_IOMUXC_SD1_DATA6__GPIO2_IO08 0x1c4>; /* WIFI_WKUP_BT */
- };
-
- pinctrl_wifi_ctrl: wifictrlgrp {
- fsl,pins =
- <MX8MP_IOMUXC_SD1_DATA7__GPIO2_IO09 0x1c4>; /* WIFI_WKUP_WLAN */
- };
-
- pinctrl_wifi_i2s: wifii2sgrp {
- fsl,pins =
- <MX8MP_IOMUXC_SAI2_RXFS__GPIO4_IO21 0x1d6>, /* WIFI_TX_SYNC */
- <MX8MP_IOMUXC_SAI5_RXD0__GPIO3_IO21 0x96>, /* WIFI_RX_DATA0 */
- <MX8MP_IOMUXC_SAI5_RXD2__GPIO3_IO23 0x1d6>, /* WIFI_TX_BCLK */
- <MX8MP_IOMUXC_SAI5_RXD3__GPIO3_IO24 0x1d6>; /* WIFI_TX_DATA0 */
- };
-
- pinctrl_wifi_pwr_en: wifipwrengrp {
- fsl,pins =
- <MX8MP_IOMUXC_SD1_STROBE__GPIO2_IO11 0x184>; /* PMIC_EN_WIFI */
- };
-};
diff --git a/arch/arm/dts/imx8mq-cm-u-boot.dtsi b/arch/arm/dts/imx8mq-cm-u-boot.dtsi
index e23998f..8195013 100644
--- a/arch/arm/dts/imx8mq-cm-u-boot.dtsi
+++ b/arch/arm/dts/imx8mq-cm-u-boot.dtsi
@@ -3,11 +3,7 @@
* Copyright 2019 NXP
*/
-/ {
- binman: binman {
- multiple-images;
- };
-};
+#include "imx8mq-u-boot.dtsi"
&pinctrl_uart1 {
bootph-pre-ram;
@@ -16,108 +12,3 @@
&uart1 {
bootph-pre-ram;
};
-
-&binman {
- u-boot-spl-ddr {
- filename = "u-boot-spl-ddr.bin";
- pad-byte = <0xff>;
- align-size = <4>;
- align = <4>;
-
- u-boot-spl {
- align-end = <4>;
- };
-
- ddr-1d-imem-fw {
- filename = "lpddr4_pmu_train_1d_imem.bin";
- type = "blob-ext";
- align-end = <4>;
- };
-
- ddr-1d-dmem-fw {
- filename = "lpddr4_pmu_train_1d_dmem.bin";
- type = "blob-ext";
- align-end = <4>;
- };
-
- ddr-2d-imem-fw {
- filename = "lpddr4_pmu_train_2d_imem.bin";
- type = "blob-ext";
- align-end = <4>;
- };
-
- ddr-2d-dmem-fw {
- filename = "lpddr4_pmu_train_2d_dmem.bin";
- type = "blob-ext";
- align-end = <4>;
- };
- };
-
- flash {
- mkimage {
- args = "-n spl/u-boot-spl.cfgout -T imx8mimage -e 0x7e1000";
-
- blob {
- filename = "u-boot-spl-ddr.bin";
- };
- };
- };
-
- itb {
- filename = "u-boot.itb";
-
- fit {
- description = "Configuration to load ATF before U-Boot";
- #address-cells = <1>;
- fit,external-offset = <CONFIG_FIT_EXTERNAL_OFFSET>;
-
- images {
- uboot {
- description = "U-Boot (64-bit)";
- type = "standalone";
- arch = "arm64";
- compression = "none";
- load = <CONFIG_TEXT_BASE>;
-
- uboot_blob: blob-ext {
- filename = "u-boot-nodtb.bin";
- };
- };
-
- atf {
- description = "ARM Trusted Firmware";
- type = "firmware";
- arch = "arm64";
- compression = "none";
- load = <0x910000>;
- entry = <0x910000>;
-
- atf_blob: blob-ext {
- filename = "bl31.bin";
- };
- };
-
- fdt {
- description = "NAME";
- type = "flat_dt";
- compression = "none";
-
- uboot_fdt_blob: blob-ext {
- filename = "u-boot.dtb";
- };
- };
- };
-
- configurations {
- default = "conf";
-
- conf {
- description = "NAME";
- firmware = "uboot";
- loadables = "atf";
- fdt = "fdt";
- };
- };
- };
- };
-};
diff --git a/arch/arm/dts/imx8mq-librem5-r4-u-boot.dtsi b/arch/arm/dts/imx8mq-librem5-r4-u-boot.dtsi
index e3341a4..1a4568d 100644
--- a/arch/arm/dts/imx8mq-librem5-r4-u-boot.dtsi
+++ b/arch/arm/dts/imx8mq-librem5-r4-u-boot.dtsi
@@ -11,14 +11,13 @@
};
&binman {
- /delete-node/ signed-hdmi;
-
- signed-hdmi {
- filename = "signed_hdmi.bin";
-
- signed-dp-imx8m {
- filename = "signed_dp_imx8m.bin";
- type = "blob-ext";
+ section {
+ nxp-imx8mimage {
+ section {
+ signed-hdmi-imx8m {
+ filename = "signed_dp_imx8m.bin";
+ };
+ };
};
};
};
diff --git a/arch/arm/dts/imx8mq-u-boot.dtsi b/arch/arm/dts/imx8mq-u-boot.dtsi
index 90b2274..48dbe94 100644
--- a/arch/arm/dts/imx8mq-u-boot.dtsi
+++ b/arch/arm/dts/imx8mq-u-boot.dtsi
@@ -5,7 +5,6 @@
/ {
binman: binman {
- multiple-images;
};
};
@@ -35,65 +34,58 @@
};
&binman {
- u-boot-spl-ddr {
- align = <4>;
- align-size = <4>;
- filename = "u-boot-spl-ddr.bin";
- pad-byte = <0xff>;
+ filename = "flash.bin";
+ section {
+ pad-byte = <0x00>;
- u-boot-spl {
- align-end = <4>;
- filename = "u-boot-spl.bin";
- };
+ nxp-imx8mimage {
+ filename = "u-boot-spl-mkimage.bin";
+ nxp,boot-from = "sd";
+ nxp,rom-version = <1>;
+ nxp,loader-address = <CONFIG_SPL_TEXT_BASE>;
+ args; /* Needed by mkimage etype superclass */
- ddr-1d-imem-fw {
- filename = "lpddr4_pmu_train_1d_imem.bin";
- align-end = <4>;
- type = "blob-ext";
- };
-
- ddr-1d-dmem-fw {
- filename = "lpddr4_pmu_train_1d_dmem.bin";
- align-end = <4>;
- type = "blob-ext";
- };
-
- ddr-2d-imem-fw {
- filename = "lpddr4_pmu_train_2d_imem.bin";
- align-end = <4>;
- type = "blob-ext";
- };
-
- ddr-2d-dmem-fw {
- filename = "lpddr4_pmu_train_2d_dmem.bin";
- align-end = <4>;
- type = "blob-ext";
- };
- };
-
- signed-hdmi {
- filename = "signed_hdmi.bin";
-
- signed-hdmi-imx8m {
- filename = "signed_hdmi_imx8m.bin";
- type = "blob-ext";
- };
- };
-
- spl {
- filename = "spl.bin";
-
- mkimage {
- args = "-n spl/u-boot-spl.cfgout -T imx8mimage -e 0x7e1000";
-
- blob {
+ section {
+ align = <4>;
+ align-size = <4>;
filename = "u-boot-spl-ddr.bin";
+ pad-byte = <0xff>;
+
+ u-boot-spl {
+ align-end = <4>;
+ filename = "u-boot-spl.bin";
+ };
+
+ ddr-1d-imem-fw {
+ filename = "lpddr4_pmu_train_1d_imem.bin";
+ align-end = <4>;
+ type = "blob-ext";
+ };
+
+ ddr-1d-dmem-fw {
+ filename = "lpddr4_pmu_train_1d_dmem.bin";
+ align-end = <4>;
+ type = "blob-ext";
+ };
+
+ ddr-2d-imem-fw {
+ filename = "lpddr4_pmu_train_2d_imem.bin";
+ align-end = <4>;
+ type = "blob-ext";
+ };
+
+ ddr-2d-dmem-fw {
+ filename = "lpddr4_pmu_train_2d_dmem.bin";
+ align-end = <4>;
+ type = "blob-ext";
+ };
+
+ signed-hdmi-imx8m {
+ filename = "signed_hdmi_imx8m.bin";
+ type = "blob-ext";
+ };
};
};
- };
-
- itb {
- filename = "u-boot.itb";
fit {
description = "Configuration to load ATF before U-Boot";
@@ -158,21 +150,4 @@
};
};
};
-
- imx-boot {
- filename = "flash.bin";
- pad-byte = <0x00>;
-
- spl {
- filename = "spl.bin";
- offset = <0x0>;
- type = "blob-ext";
- };
-
- binman_uboot: uboot {
- filename = "u-boot.itb";
- offset = <0x57c00>;
- type = "blob-ext";
- };
- };
};
diff --git a/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi b/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi
index a99ba99..408e601 100644
--- a/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi
+++ b/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi
@@ -26,6 +26,111 @@
bootph-pre-ram;
};
+&lpi2c2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clock-frequency = <400000>;
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&pinctrl_lpi2c2>;
+ pinctrl-1 = <&pinctrl_lpi2c2>;
+ status = "okay";
+
+ pmic@25 {
+ compatible = "nxp,pca9451a";
+ reg = <0x25>;
+ interrupt-parent = <&pcal6524>;
+ interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
+
+ regulators {
+ buck1: BUCK1 {
+ regulator-name = "BUCK1";
+ regulator-min-microvolt = <650000>;
+ regulator-max-microvolt = <2237500>;
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-ramp-delay = <3125>;
+ };
+
+ buck2: BUCK2 {
+ regulator-name = "BUCK2";
+ regulator-min-microvolt = <600000>;
+ regulator-max-microvolt = <2187500>;
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-ramp-delay = <3125>;
+ };
+
+ buck4: BUCK4{
+ regulator-name = "BUCK4";
+ regulator-min-microvolt = <600000>;
+ regulator-max-microvolt = <3400000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ buck5: BUCK5{
+ regulator-name = "BUCK5";
+ regulator-min-microvolt = <600000>;
+ regulator-max-microvolt = <3400000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ buck6: BUCK6 {
+ regulator-name = "BUCK6";
+ regulator-min-microvolt = <600000>;
+ regulator-max-microvolt = <3400000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldo1: LDO1 {
+ regulator-name = "LDO1";
+ regulator-min-microvolt = <1600000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldo4: LDO4 {
+ regulator-name = "LDO4";
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldo5: LDO5 {
+ regulator-name = "LDO5";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+ };
+ };
+
+ pcal6524: gpio@22 {
+ compatible = "nxp,pcal6524";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pcal6524>;
+ reg = <0x22>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ interrupt-parent = <&gpio3>;
+ interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
+ };
+
+ adp5585gpio: gpio@34 {
+ compatible = "adp5585";
+ reg = <0x34>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+};
+
&aips1 {
bootph-pre-ram;
bootph-all;
@@ -44,6 +149,19 @@
&iomuxc {
bootph-pre-ram;
bootph-some-ram;
+
+ pinctrl_lpi2c2: lpi2c2grp {
+ fsl,pins = <
+ MX93_PAD_I2C2_SCL__LPI2C2_SCL 0x40000b9e
+ MX93_PAD_I2C2_SDA__LPI2C2_SDA 0x40000b9e
+ >;
+ };
+
+ pinctrl_pcal6524: pcal6524grp {
+ fsl,pins = <
+ MX93_PAD_CCM_CLKO2__GPIO3_IO27 0x31e
+ >;
+ };
};
®_usdhc2_vmmc {
diff --git a/arch/arm/dts/imx93-11x11-evk.dts b/arch/arm/dts/imx93-11x11-evk.dts
deleted file mode 100644
index 4322cc3..0000000
--- a/arch/arm/dts/imx93-11x11-evk.dts
+++ /dev/null
@@ -1,322 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright 2022 NXP
- */
-
-/dts-v1/;
-
-#include "imx93.dtsi"
-
-/ {
- model = "NXP i.MX93 11X11 EVK board";
- compatible = "fsl,imx93-11x11-evk", "fsl,imx93";
-
- chosen {
- stdout-path = &lpuart1;
- };
-
- reg_vref_1v8: regulator-adc-vref {
- compatible = "regulator-fixed";
- regulator-name = "vref_1v8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- };
-
- reg_usdhc2_vmmc: regulator-usdhc2 {
- compatible = "regulator-fixed";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
- regulator-name = "VSD_3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- gpio = <&gpio3 7 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
-};
-
-&adc1 {
- vref-supply = <®_vref_1v8>;
- status = "okay";
-};
-
-&mu1 {
- status = "okay";
-};
-
-&mu2 {
- status = "okay";
-};
-
-&eqos {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_eqos>;
- phy-mode = "rgmii-id";
- phy-handle = <ðphy1>;
- status = "okay";
-
- mdio {
- compatible = "snps,dwmac-mdio";
- #address-cells = <1>;
- #size-cells = <0>;
- clock-frequency = <5000000>;
-
- ethphy1: ethernet-phy@1 {
- reg = <1>;
- eee-broken-1000t;
- };
- };
-};
-
-&fec {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_fec>;
- phy-mode = "rgmii-id";
- phy-handle = <ðphy2>;
- fsl,magic-packet;
- status = "okay";
-
- mdio {
- #address-cells = <1>;
- #size-cells = <0>;
- clock-frequency = <5000000>;
-
- ethphy2: ethernet-phy@2 {
- reg = <2>;
- eee-broken-1000t;
- };
- };
-};
-
-&lpi2c2 {
- #address-cells = <1>;
- #size-cells = <0>;
- clock-frequency = <400000>;
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&pinctrl_lpi2c2>;
- pinctrl-1 = <&pinctrl_lpi2c2>;
- status = "okay";
-
- pmic@25 {
- compatible = "nxp,pca9451a";
- reg = <0x25>;
- interrupt-parent = <&pcal6524>;
- interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
-
- regulators {
- buck1: BUCK1 {
- regulator-name = "BUCK1";
- regulator-min-microvolt = <650000>;
- regulator-max-microvolt = <2237500>;
- regulator-boot-on;
- regulator-always-on;
- regulator-ramp-delay = <3125>;
- };
-
- buck2: BUCK2 {
- regulator-name = "BUCK2";
- regulator-min-microvolt = <600000>;
- regulator-max-microvolt = <2187500>;
- regulator-boot-on;
- regulator-always-on;
- regulator-ramp-delay = <3125>;
- };
-
- buck4: BUCK4{
- regulator-name = "BUCK4";
- regulator-min-microvolt = <600000>;
- regulator-max-microvolt = <3400000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- buck5: BUCK5{
- regulator-name = "BUCK5";
- regulator-min-microvolt = <600000>;
- regulator-max-microvolt = <3400000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- buck6: BUCK6 {
- regulator-name = "BUCK6";
- regulator-min-microvolt = <600000>;
- regulator-max-microvolt = <3400000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- ldo1: LDO1 {
- regulator-name = "LDO1";
- regulator-min-microvolt = <1600000>;
- regulator-max-microvolt = <3300000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- ldo4: LDO4 {
- regulator-name = "LDO4";
- regulator-min-microvolt = <800000>;
- regulator-max-microvolt = <3300000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- ldo5: LDO5 {
- regulator-name = "LDO5";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
- regulator-boot-on;
- regulator-always-on;
- };
- };
- };
-
- pcal6524: gpio@22 {
- compatible = "nxp,pcal6524";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pcal6524>;
- reg = <0x22>;
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- interrupt-parent = <&gpio3>;
- interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
- };
-
- adp5585gpio: gpio@34 {
- compatible = "adp5585";
- reg = <0x34>;
- gpio-controller;
- #gpio-cells = <2>;
- };
-};
-
-&lpuart1 { /* console */
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart1>;
- status = "okay";
-};
-
-&usdhc1 {
- pinctrl-names = "default", "state_100mhz", "state_200mhz";
- pinctrl-0 = <&pinctrl_usdhc1>;
- pinctrl-1 = <&pinctrl_usdhc1>;
- pinctrl-2 = <&pinctrl_usdhc1>;
- bus-width = <8>;
- non-removable;
- status = "okay";
-};
-
-&usdhc2 {
- pinctrl-names = "default", "state_100mhz", "state_200mhz";
- pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
- pinctrl-1 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
- pinctrl-2 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
- cd-gpios = <&gpio3 00 GPIO_ACTIVE_LOW>;
- vmmc-supply = <®_usdhc2_vmmc>;
- bus-width = <4>;
- status = "okay";
- no-sdio;
- no-mmc;
-};
-
-&iomuxc {
- pinctrl_lpi2c2: lpi2c2grp {
- fsl,pins = <
- MX93_PAD_I2C2_SCL__LPI2C2_SCL 0x40000b9e
- MX93_PAD_I2C2_SDA__LPI2C2_SDA 0x40000b9e
- >;
- };
-
- pinctrl_pcal6524: pcal6524grp {
- fsl,pins = <
- MX93_PAD_CCM_CLKO2__GPIO3_IO27 0x31e
- >;
- };
-
- pinctrl_eqos: eqosgrp {
- fsl,pins = <
- MX93_PAD_ENET1_MDC__ENET_QOS_MDC 0x57e
- MX93_PAD_ENET1_MDIO__ENET_QOS_MDIO 0x57e
- MX93_PAD_ENET1_RD0__ENET_QOS_RGMII_RD0 0x57e
- MX93_PAD_ENET1_RD1__ENET_QOS_RGMII_RD1 0x57e
- MX93_PAD_ENET1_RD2__ENET_QOS_RGMII_RD2 0x57e
- MX93_PAD_ENET1_RD3__ENET_QOS_RGMII_RD3 0x57e
- MX93_PAD_ENET1_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK 0x5fe
- MX93_PAD_ENET1_RX_CTL__ENET_QOS_RGMII_RX_CTL 0x57e
- MX93_PAD_ENET1_TD0__ENET_QOS_RGMII_TD0 0x57e
- MX93_PAD_ENET1_TD1__ENET_QOS_RGMII_TD1 0x57e
- MX93_PAD_ENET1_TD2__ENET_QOS_RGMII_TD2 0x57e
- MX93_PAD_ENET1_TD3__ENET_QOS_RGMII_TD3 0x57e
- MX93_PAD_ENET1_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK 0x5fe
- MX93_PAD_ENET1_TX_CTL__ENET_QOS_RGMII_TX_CTL 0x57e
- >;
- };
-
- pinctrl_fec: fecgrp {
- fsl,pins = <
- MX93_PAD_ENET2_MDC__ENET1_MDC 0x57e
- MX93_PAD_ENET2_MDIO__ENET1_MDIO 0x57e
- MX93_PAD_ENET2_RD0__ENET1_RGMII_RD0 0x57e
- MX93_PAD_ENET2_RD1__ENET1_RGMII_RD1 0x57e
- MX93_PAD_ENET2_RD2__ENET1_RGMII_RD2 0x57e
- MX93_PAD_ENET2_RD3__ENET1_RGMII_RD3 0x57e
- MX93_PAD_ENET2_RXC__ENET1_RGMII_RXC 0x5fe
- MX93_PAD_ENET2_RX_CTL__ENET1_RGMII_RX_CTL 0x57e
- MX93_PAD_ENET2_TD0__ENET1_RGMII_TD0 0x57e
- MX93_PAD_ENET2_TD1__ENET1_RGMII_TD1 0x57e
- MX93_PAD_ENET2_TD2__ENET1_RGMII_TD2 0x57e
- MX93_PAD_ENET2_TD3__ENET1_RGMII_TD3 0x57e
- MX93_PAD_ENET2_TXC__ENET1_RGMII_TXC 0x5fe
- MX93_PAD_ENET2_TX_CTL__ENET1_RGMII_TX_CTL 0x57e
- >;
- };
-
- pinctrl_uart1: uart1grp {
- fsl,pins = <
- MX93_PAD_UART1_RXD__LPUART1_RX 0x31e
- MX93_PAD_UART1_TXD__LPUART1_TX 0x31e
- >;
- };
-
- pinctrl_usdhc1: usdhc1grp {
- fsl,pins = <
- MX93_PAD_SD1_CLK__USDHC1_CLK 0x15fe
- MX93_PAD_SD1_CMD__USDHC1_CMD 0x13fe
- MX93_PAD_SD1_DATA0__USDHC1_DATA0 0x13fe
- MX93_PAD_SD1_DATA1__USDHC1_DATA1 0x13fe
- MX93_PAD_SD1_DATA2__USDHC1_DATA2 0x13fe
- MX93_PAD_SD1_DATA3__USDHC1_DATA3 0x13fe
- MX93_PAD_SD1_DATA4__USDHC1_DATA4 0x13fe
- MX93_PAD_SD1_DATA5__USDHC1_DATA5 0x13fe
- MX93_PAD_SD1_DATA6__USDHC1_DATA6 0x13fe
- MX93_PAD_SD1_DATA7__USDHC1_DATA7 0x13fe
- MX93_PAD_SD1_STROBE__USDHC1_STROBE 0x15fe
- >;
- };
-
- pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp {
- fsl,pins = <
- MX93_PAD_SD2_RESET_B__GPIO3_IO07 0x31e
- >;
- };
-
- pinctrl_usdhc2_gpio: usdhc2gpiogrp {
- fsl,pins = <
- MX93_PAD_SD2_CD_B__GPIO3_IO00 0x31e
- >;
- };
-
- pinctrl_usdhc2: usdhc2grp {
- fsl,pins = <
- MX93_PAD_SD2_CLK__USDHC2_CLK 0x15fe
- MX93_PAD_SD2_CMD__USDHC2_CMD 0x13fe
- MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x13fe
- MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x13fe
- MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x13fe
- MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x13fe
- MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e
- >;
- };
-};
diff --git a/arch/arm/dts/imx93-u-boot.dtsi b/arch/arm/dts/imx93-u-boot.dtsi
index 40e17bb..289aba1 100644
--- a/arch/arm/dts/imx93-u-boot.dtsi
+++ b/arch/arm/dts/imx93-u-boot.dtsi
@@ -86,3 +86,18 @@
};
};
};
+
+&tmu {
+ compatible = "fsl,imx93-tmu";
+ reg = <0x44482000 0x1000>;
+ clocks = <&clk IMX93_CLK_TMC_GATE>;
+ little-endian;
+ fsl,tmu-calibration = <0x0000000e 0x800000da
+ 0x00000029 0x800000e9
+ 0x00000056 0x80000102
+ 0x000000a2 0x8000012a
+ 0x00000116 0x80000166
+ 0x00000195 0x800001a7
+ 0x000001b2 0x800001b6>;
+ #thermal-sensor-cells = <1>;
+};
diff --git a/arch/arm/dts/k3-am62-phycore-som.dtsi b/arch/arm/dts/k3-am62-phycore-som.dtsi
deleted file mode 100644
index aa43e74..0000000
--- a/arch/arm/dts/k3-am62-phycore-som.dtsi
+++ /dev/null
@@ -1,324 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Copyright (C) 2022 - 2023 PHYTEC Messtechnik GmbH
- * Author: Wadim Egorov <w.egorov@phytec.de>
- *
- * Product homepage:
- * https://www.phytec.com/product/phycore-am62x
- */
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/leds/common.h>
-#include <dt-bindings/net/ti-dp83867.h>
-
-/ {
- model = "PHYTEC phyCORE-AM62x";
- compatible = "phytec,am62-phycore-som", "ti,am625";
-
- aliases {
- ethernet0 = &cpsw_port1;
- gpio0 = &main_gpio0;
- gpio1 = &main_gpio1;
- i2c0 = &main_i2c0;
- mmc0 = &sdhci0;
- rtc0 = &i2c_som_rtc;
- rtc1 = &wkup_rtc0;
- spi0 = &ospi0;
- };
-
- memory@80000000 {
- device_type = "memory";
- reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
- };
-
- reserved_memory: reserved-memory {
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- ramoops@9ca00000 {
- compatible = "ramoops";
- reg = <0x00 0x9ca00000 0x00 0x00100000>;
- record-size = <0x8000>;
- console-size = <0x8000>;
- ftrace-size = <0x00>;
- pmsg-size = <0x8000>;
- };
-
- secure_tfa_ddr: tfa@9e780000 {
- reg = <0x00 0x9e780000 0x00 0x80000>;
- alignment = <0x1000>;
- no-map;
- };
-
- secure_ddr: optee@9e800000 {
- reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */
- alignment = <0x1000>;
- no-map;
- };
-
- wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9db00000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0x9db00000 0x00 0x00c00000>;
- no-map;
- };
- };
-
- vcc_5v0_som: regulator-vcc-5v0-som {
- compatible = "regulator-fixed";
- regulator-name = "VCC_5V0_SOM";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- vdd_1v8: regulator-vdd-1v8 {
- compatible = "regulator-fixed";
- regulator-name = "VDD_1V8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vcc_5v0_som>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- leds {
- compatible = "gpio-leds";
- pinctrl-names = "default";
- pinctrl-0 = <&leds_pins_default>;
-
- led-0 {
- color = <LED_COLOR_ID_GREEN>;
- gpios = <&main_gpio0 13 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "heartbeat";
- function = LED_FUNCTION_HEARTBEAT;
- };
- };
-};
-
-&main_pmx0 {
- leds_pins_default: leds-default-pins {
- pinctrl-single,pins = <
- AM62X_IOPAD(0x034, PIN_OUTPUT, 7) /* (H21) OSPI0_CSN2.GPIO0_13 */
- >;
- };
-
- main_i2c0_pins_default: main-i2c0-default-pins {
- pinctrl-single,pins = <
- AM62X_IOPAD(0x1e0, PIN_INPUT_PULLUP, 0) /* (B16) I2C0_SCL */
- AM62X_IOPAD(0x1e4, PIN_INPUT_PULLUP, 0) /* (A16) I2C0_SDA */
- >;
- };
-
- main_mdio1_pins_default: main-mdio1-default-pins {
- pinctrl-single,pins = <
- AM62X_IOPAD(0x160, PIN_OUTPUT, 0) /* (AD24) MDIO0_MDC */
- AM62X_IOPAD(0x15c, PIN_INPUT, 0) /* (AB22) MDIO0_MDIO */
- >;
- };
-
- main_mmc0_pins_default: main-mmc0-default-pins {
- pinctrl-single,pins = <
- AM62X_IOPAD(0x220, PIN_INPUT_PULLUP, 0) /* (Y3) MMC0_CMD */
- AM62X_IOPAD(0x218, PIN_INPUT_PULLDOWN, 0) /* (AB1) MMC0_CLK */
- AM62X_IOPAD(0x214, PIN_INPUT_PULLUP, 0) /* (AA2) MMC0_DAT0 */
- AM62X_IOPAD(0x210, PIN_INPUT_PULLUP, 0) /* (AA1) MMC0_DAT1 */
- AM62X_IOPAD(0x20c, PIN_INPUT_PULLUP, 0) /* (AA3) MMC0_DAT2 */
- AM62X_IOPAD(0x208, PIN_INPUT_PULLUP, 0) /* (Y4) MMC0_DAT3 */
- AM62X_IOPAD(0x204, PIN_INPUT_PULLUP, 0) /* (AB2) MMC0_DAT4 */
- AM62X_IOPAD(0x200, PIN_INPUT_PULLUP, 0) /* (AC1) MMC0_DAT5 */
- AM62X_IOPAD(0x1fc, PIN_INPUT_PULLUP, 0) /* (AD2) MMC0_DAT6 */
- AM62X_IOPAD(0x1f8, PIN_INPUT_PULLUP, 0) /* (AC2) MMC0_DAT7 */
- >;
- };
-
- main_rgmii1_pins_default: main-rgmii1-default-pins {
- pinctrl-single,pins = <
- AM62X_IOPAD(0x14c, PIN_INPUT, 0) /* (AB17) RGMII1_RD0 */
- AM62X_IOPAD(0x150, PIN_INPUT, 0) /* (AC17) RGMII1_RD1 */
- AM62X_IOPAD(0x154, PIN_INPUT, 0) /* (AB16) RGMII1_RD2 */
- AM62X_IOPAD(0x158, PIN_INPUT, 0) /* (AA15) RGMII1_RD3 */
- AM62X_IOPAD(0x148, PIN_INPUT, 0) /* (AD17) RGMII1_RXC */
- AM62X_IOPAD(0x144, PIN_INPUT, 0) /* (AE17) RGMII1_RX_CTL */
- AM62X_IOPAD(0x134, PIN_OUTPUT, 0) /* (AE20) RGMII1_TD0 */
- AM62X_IOPAD(0x138, PIN_OUTPUT, 0) /* (AD20) RGMII1_TD1 */
- AM62X_IOPAD(0x13c, PIN_OUTPUT, 0) /* (AE18) RGMII1_TD2 */
- AM62X_IOPAD(0x140, PIN_OUTPUT, 0) /* (AD18) RGMII1_TD3 */
- AM62X_IOPAD(0x130, PIN_OUTPUT, 0) /* (AE19) RGMII1_TXC */
- AM62X_IOPAD(0x12c, PIN_OUTPUT, 0) /* (AD19) RGMII1_TX_CTL */
- >;
- };
-
- ospi0_pins_default: ospi0-default-pins {
- pinctrl-single,pins = <
- AM62X_IOPAD(0x000, PIN_OUTPUT, 0) /* (H24) OSPI0_CLK */
- AM62X_IOPAD(0x02c, PIN_OUTPUT, 0) /* (F23) OSPI0_CSn0 */
- AM62X_IOPAD(0x00c, PIN_INPUT, 0) /* (E25) OSPI0_D0 */
- AM62X_IOPAD(0x010, PIN_INPUT, 0) /* (G24) OSPI0_D1 */
- AM62X_IOPAD(0x014, PIN_INPUT, 0) /* (F25) OSPI0_D2 */
- AM62X_IOPAD(0x018, PIN_INPUT, 0) /* (F24) OSPI0_D3 */
- AM62X_IOPAD(0x01c, PIN_INPUT, 0) /* (J23) OSPI0_D4 */
- AM62X_IOPAD(0x020, PIN_INPUT, 0) /* (J25) OSPI0_D5 */
- AM62X_IOPAD(0x024, PIN_INPUT, 0) /* (H25) OSPI0_D6 */
- AM62X_IOPAD(0x028, PIN_INPUT, 0) /* (J22) OSPI0_D7 */
- AM62X_IOPAD(0x008, PIN_INPUT, 0) /* (J24) OSPI0_DQS */
- >;
- };
-
- pmic_irq_pins_default: pmic-irq-default-pins {
- pinctrl-single,pins = <
- AM62X_IOPAD(0x01f4, PIN_INPUT, 0) /* (D16) EXTINTn */
- >;
- };
-};
-
-&cpsw3g {
- pinctrl-names = "default";
- pinctrl-0 = <&main_rgmii1_pins_default>;
-};
-
-&cpsw_port1 {
- phy-mode = "rgmii-rxid";
- phy-handle = <&cpsw3g_phy1>;
-};
-
-&cpsw3g_mdio {
- pinctrl-names = "default";
- pinctrl-0 = <&main_mdio1_pins_default>;
- status = "okay";
-
- cpsw3g_phy1: ethernet-phy@1 {
- compatible = "ethernet-phy-id2000.a231", "ethernet-phy-ieee802.3-c22";
- reg = <1>;
- ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
- ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
- };
-};
-
-&main_i2c0 {
- pinctrl-names = "default";
- pinctrl-0 = <&main_i2c0_pins_default>;
- clock-frequency = <400000>;
- status = "okay";
-
- pmic@30 {
- compatible = "ti,tps65219";
- reg = <0x30>;
- buck1-supply = <&vcc_5v0_som>;
- buck2-supply = <&vcc_5v0_som>;
- buck3-supply = <&vcc_5v0_som>;
- ldo1-supply = <&vdd_3v3>;
- ldo2-supply = <&vdd_1v8>;
- ldo3-supply = <&vcc_5v0_som>;
- ldo4-supply = <&vcc_5v0_som>;
-
- pinctrl-names = "default";
- pinctrl-0 = <&pmic_irq_pins_default>;
- interrupt-parent = <&gic500>;
- interrupts = <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-controller;
- #interrupt-cells = <1>;
-
- ti,power-button;
- system-power-controller;
-
- regulators {
- vdd_core: buck1 {
- regulator-name = "VDD_CORE";
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <750000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- vdd_3v3: buck2 {
- regulator-name = "VDD_3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- vdd_ddr4: buck3 {
- regulator-name = "VDD_DDR4";
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1200000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- vddshv5_sdio: ldo1 {
- regulator-name = "VDDSHV5_SDIO";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-allow-bypass;
- regulator-boot-on;
- regulator-always-on;
- };
-
- vddr_core: ldo2 {
- regulator-name = "VDDR_CORE";
- regulator-min-microvolt = <850000>;
- regulator-max-microvolt = <850000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- vdda_1v8: ldo3 {
- regulator-name = "VDDA_1V8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- vdd_2v5: ldo4 {
- regulator-name = "VDD_2V5";
- regulator-min-microvolt = <2500000>;
- regulator-max-microvolt = <2500000>;
- regulator-boot-on;
- regulator-always-on;
- };
- };
- };
-
- eeprom@50 {
- compatible = "atmel,24c32";
- pagesize = <32>;
- reg = <0x50>;
- };
-
- i2c_som_rtc: rtc@52 {
- compatible = "microcrystal,rv3028";
- reg = <0x52>;
- };
-};
-
-&ospi0 {
- pinctrl-names = "default";
- pinctrl-0 = <&ospi0_pins_default>;
- status = "okay";
-
- serial_flash: flash@0 {
- compatible = "jedec,spi-nor";
- reg = <0x0>;
- spi-tx-bus-width = <8>;
- spi-rx-bus-width = <8>;
- spi-max-frequency = <25000000>;
- cdns,tshsl-ns = <60>;
- cdns,tsd2d-ns = <60>;
- cdns,tchsh-ns = <60>;
- cdns,tslch-ns = <60>;
- cdns,read-delay = <0>;
- };
-};
-
-&sdhci0 {
- pinctrl-names = "default";
- pinctrl-0 = <&main_mmc0_pins_default>;
- ti,driver-strength-ohm = <50>;
- disable-wp;
- non-removable;
- status = "okay";
-};
diff --git a/arch/arm/dts/k3-am62-verdin-dev.dtsi b/arch/arm/dts/k3-am62-verdin-dev.dtsi
deleted file mode 100644
index 6701cb8..0000000
--- a/arch/arm/dts/k3-am62-verdin-dev.dtsi
+++ /dev/null
@@ -1,240 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-/*
- * Copyright 2023 Toradex
- *
- * Common dtsi for Verdin AM62 SoM on Development carrier board
- *
- * https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62
- * https://www.toradex.com/products/carrier-board/verdin-development-board-kit
- */
-
-/ {
- sound {
- compatible = "simple-audio-card";
- simple-audio-card,bitclock-master = <&codec_dai>;
- simple-audio-card,format = "i2s";
- simple-audio-card,frame-master = <&codec_dai>;
- simple-audio-card,name = "verdin-nau8822";
- simple-audio-card,routing =
- "Headphones", "LHP",
- "Headphones", "RHP",
- "Speaker", "LSPK",
- "Speaker", "RSPK",
- "Line Out", "AUXOUT1",
- "Line Out", "AUXOUT2",
- "LAUX", "Line In",
- "RAUX", "Line In",
- "LMICP", "Mic In",
- "RMICP", "Mic In";
- simple-audio-card,widgets =
- "Headphones", "Headphones",
- "Line Out", "Line Out",
- "Speaker", "Speaker",
- "Microphone", "Mic In",
- "Line", "Line In";
-
- codec_dai: simple-audio-card,codec {
- clocks = <&audio_refclk1>;
- sound-dai = <&nau8822_1a>;
- };
-
- simple-audio-card,cpu {
- sound-dai = <&mcasp0>;
- };
- };
-};
-
-/* Verdin ETHs */
-&cpsw3g {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_rgmii1>, <&pinctrl_rgmii2>;
- status = "okay";
-};
-
-/* MDIO, shared by Verdin ETH_1 (On-module PHY) and Verdin ETH_2_RGMII */
-&cpsw3g_mdio {
- status = "okay";
-
- cpsw3g_phy1: ethernet-phy@7 {
- compatible = "ethernet-phy-ieee802.3-c22";
- reg = <7>;
- interrupt-parent = <&main_gpio0>;
- interrupts = <38 IRQ_TYPE_EDGE_FALLING>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_eth2_rgmii_int>;
- micrel,led-mode = <0>;
- };
-};
-
-/* Verdin ETH_1 (On-module PHY) */
-&cpsw_port1 {
- status = "okay";
-};
-
-/* Verdin ETH_2_RGMII */
-&cpsw_port2 {
- phy-handle = <&cpsw3g_phy1>;
- phy-mode = "rgmii-rxid";
- status = "okay";
-};
-
-/* Verdin PWM_1, PWM_2 */
-&epwm0 {
- status = "okay";
-};
-
-/* Verdin PWM_3_DSI */
-&epwm1 {
- status = "okay";
-};
-
-&main_gpio0 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_ctrl_sleep_moci>,
- <&pinctrl_gpio_5>,
- <&pinctrl_gpio_6>,
- <&pinctrl_gpio_7>,
- <&pinctrl_gpio_8>;
-};
-
-/* Verdin I2C_1 */
-&main_i2c1 {
- status = "okay";
-
- /* Audio Codec */
- nau8822_1a: audio-codec@1a {
- compatible = "nuvoton,nau8822";
- reg = <0x1a>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_i2s1_mclk>;
- #sound-dai-cells = <0>;
- };
-
- /* IO Expander */
- gpio_expander_21: gpio@21 {
- compatible = "nxp,pcal6416";
- reg = <0x21>;
- #gpio-cells = <2>;
- gpio-controller;
- };
-
- /* Current measurement into module VCC */
- hwmon@40 {
- compatible = "ti,ina219";
- reg = <0x40>;
- shunt-resistor = <10000>;
- };
-
- /* Temperature sensor */
- sensor@4f {
- compatible = "ti,tmp75c";
- reg = <0x4f>;
- };
-
- /* EEPROM */
- eeprom@57 {
- compatible = "st,24c02", "atmel,24c02";
- reg = <0x57>;
- pagesize = <16>;
- };
-};
-
-/* Verdin I2C_2_DSI */
-&main_i2c2 {
- status = "okay";
-};
-
-/* Verdin I2C_4_CSI */
-&main_i2c3 {
- status = "okay";
-};
-
-/* Verdin CAN_1 */
-&main_mcan0 {
- status = "okay";
-};
-
-/* Verdin SPI_1 */
-&main_spi1 {
- status = "okay";
-};
-
-/* Verdin UART_3 */
-&main_uart0 {
- status = "okay";
-};
-
-/* Verdin UART_1, connector X50 through RS485 transceiver. */
-&main_uart1 {
- linux,rs485-enabled-at-boot-time;
- rs485-rx-during-tx;
- status = "okay";
-};
-
-/* Verdin I2S_1 */
-&mcasp0 {
- status = "okay";
-};
-
-&mcu_gpio0 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_gpio_1>,
- <&pinctrl_gpio_2>,
- <&pinctrl_gpio_3>,
- <&pinctrl_gpio_4>;
-};
-
-/* Verdin I2C_3_HDMI */
-&mcu_i2c0 {
- status = "okay";
-};
-
-/* Verdin CAN_2 */
-&mcu_mcan0 {
- status = "okay";
-};
-
-/* Verdin UART_4 */
-&mcu_uart0 {
- status = "okay";
-};
-
-/* Verdin QSPI_1 */
-&ospi0 {
- status = "okay";
-};
-
-/* Verdin SD_1 */
-&sdhci1 {
- ti,driver-strength-ohm = <33>;
- status = "okay";
-};
-
-/* Verdin USB_1 */
-&usbss0 {
- status = "okay";
-};
-
-&usb0 {
- status = "okay";
-};
-
-/* Verdin USB_2 */
-&usbss1 {
- status = "okay";
-};
-
-&usb1 {
- status = "okay";
-};
-
-/* Verdin CTRL_WAKE1_MICO# */
-&verdin_gpio_keys {
- status = "okay";
-};
-
-/* Verdin UART_2 */
-&wkup_uart0 {
- /* FIXME: WKUP UART0 is used by DM firmware */
- status = "reserved";
-};
diff --git a/arch/arm/dts/k3-am62-verdin-wifi.dtsi b/arch/arm/dts/k3-am62-verdin-wifi.dtsi
deleted file mode 100644
index a6808b1..0000000
--- a/arch/arm/dts/k3-am62-verdin-wifi.dtsi
+++ /dev/null
@@ -1,45 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-/*
- * Copyright 2023 Toradex
- *
- * Common dtsi for Verdin AM62 SoM WB variant
- *
- * https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62
- */
-
-/ {
- wifi_pwrseq: wifi-pwrseq {
- compatible = "mmc-pwrseq-simple";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_wifi_en>;
- reset-gpios = <&main_gpio0 22 GPIO_ACTIVE_LOW>;
- };
-};
-
-/* On-module Wi-Fi */
-&sdhci2 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_sdhci2>;
- bus-width = <4>;
- cap-power-off-card;
- keep-power-in-suspend;
- mmc-pwrseq = <&wifi_pwrseq>;
- non-removable;
- ti,fails-without-test-cd;
- ti,driver-strength-ohm = <50>;
- vmmc-supply = <®_3v3>;
- status = "okay";
-};
-
-/* On-module Bluetooth */
-&main_uart5 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart5>;
- uart-has-rtscts;
- status = "okay";
-
- bluetooth {
- compatible = "nxp,88w8987-bt";
- fw-init-baudrate = <3000000>;
- };
-};
diff --git a/arch/arm/dts/k3-am62-verdin.dtsi b/arch/arm/dts/k3-am62-verdin.dtsi
deleted file mode 100644
index 5db52f2..0000000
--- a/arch/arm/dts/k3-am62-verdin.dtsi
+++ /dev/null
@@ -1,1443 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-/*
- * Copyright 2023 Toradex
- *
- * Common dtsi for Verdin AM62 SoM
- *
- * https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62
- */
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/interrupt-controller/arm-gic.h>
-#include <dt-bindings/interrupt-controller/irq.h>
-#include <dt-bindings/net/ti-dp83867.h>
-
-/ {
- chosen {
- stdout-path = "serial2:115200n8";
- };
-
- aliases {
- can0 = &main_mcan0;
- can1 = &mcu_mcan0;
- ethernet0 = &cpsw_port1;
- ethernet1 = &cpsw_port2;
- i2c0 = &main_i2c0;
- i2c1 = &main_i2c1;
- i2c2 = &main_i2c2;
- i2c3 = &mcu_i2c0;
- i2c4 = &main_i2c3;
- mmc0 = &sdhci0;
- mmc1 = &sdhci1;
- mmc2 = &sdhci2;
- rtc0 = &rtc_i2c;
- rtc1 = &wkup_rtc0;
- serial0 = &main_uart1;
- serial1 = &wkup_uart0;
- serial2 = &main_uart0;
- serial3 = &mcu_uart0;
- serial4 = &main_uart5;
- usb0 = &usb0;
- usb1 = &usb1;
- };
-
- verdin_gpio_keys: gpio-keys {
- compatible = "gpio-keys";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_ctrl_wake1_mico>;
- status = "disabled";
-
- verdin_key_wakeup: key-wakeup {
- debounce-interval = <10>;
- /* Verdin CTRL_WAKE1_MICO# (SODIMM 252) */
- gpios = <&main_gpio0 32 GPIO_ACTIVE_LOW>;
- label = "Wake-Up";
- linux,code = <KEY_WAKEUP>;
- wakeup-source;
- };
- };
-
- memory@80000000 {
- device_type = "memory";
- reg = <0x00000000 0x80000000 0x00000000 0x40000000>; /* 1G RAM */
- };
-
- opp-table {
- /* Add 1.4GHz OPP. Requires VDD_CORE to be at 0.85V */
- opp-1400000000 {
- opp-hz = /bits/ 64 <1400000000>;
- opp-supported-hw = <0x01 0x0004>;
- clock-latency-ns = <6000000>;
- };
- };
-
- /* Module Power Supply */
- reg_vsodimm: regulator-vsodimm {
- compatible = "regulator-fixed";
- regulator-name = "+V_SODIMM";
- };
-
- /* Non PMIC On-module Supplies */
- reg_3v3: regulator-3v3 {
- compatible = "regulator-fixed";
- regulator-max-microvolt = <3300000>;
- regulator-min-microvolt = <3300000>;
- regulator-name = "On-module +V3.3";
- vin-supply = <®_vsodimm>;
- };
-
- reg_1v2_dsi: regulator-1v2-dsi {
- compatible = "regulator-fixed";
- regulator-max-microvolt = <1200000>;
- regulator-min-microvolt = <1200000>;
- regulator-name = "On-module +V1.2_DSI";
- vin-supply = <®_1v8>;
- };
-
- /* Enabled by +V1.2_DSI */
- reg_1v8_dsi: regulator-1v8-dsi {
- compatible = "regulator-fixed";
- regulator-max-microvolt = <1800000>;
- regulator-min-microvolt = <1800000>;
- regulator-name = "On-module +V1.8_DSI";
- vin-supply = <®_1v8>;
- };
-
- /* Enabled by +V2.5_ETH */
- reg_1v0_eth: regulator-1v0-eth {
- compatible = "regulator-fixed";
- regulator-max-microvolt = <1000000>;
- regulator-min-microvolt = <1000000>;
- regulator-name = "On-module +V1.0_ETH";
- vin-supply = <®_1v8>;
- };
-
- /* Enabled by +V2.5_ETH */
- reg_1v8_eth: regulator-1v8-eth {
- compatible = "regulator-fixed";
- regulator-max-microvolt = <1800000>;
- regulator-min-microvolt = <1800000>;
- regulator-name = "On-module +V1.8_ETH";
- vin-supply = <®_1v8>;
- };
-
- /* Verdin SD_1 Power Supply */
- reg_sdhc1_vmmc: regulator-sdhci1 {
- compatible = "regulator-fixed";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_sd1_pwr_en>;
- enable-active-high;
- /* Verdin SD_1_PWR_EN (SODIMM 76) */
- gpio = <&main_gpio0 29 GPIO_ACTIVE_HIGH>;
- off-on-delay-us = <100000>;
- regulator-max-microvolt = <3300000>;
- regulator-min-microvolt = <3300000>;
- regulator-name = "+V3.3_SD";
- startup-delay-us = <2000>;
- };
-
- reg_sdhc1_vqmmc: regulator-sdhci1-vqmmc {
- compatible = "regulator-gpio";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_vsel_sd>;
- /* PMIC_VSEL_SD */
- gpios = <&main_gpio0 21 GPIO_ACTIVE_HIGH>;
- regulator-name = "LDO1-VSEL-SD (PMIC)";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
- states = <1800000 0x0>,
- <3300000 0x1>;
- vin-supply = <®_sd_3v3_1v8>;
- };
-
- reserved-memory {
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- secure_tfa_ddr: tfa@9e780000 {
- reg = <0x00 0x9e780000 0x00 0x80000>;
- alignment = <0x1000>;
- no-map;
- };
-
- secure_ddr: optee@9e800000 {
- reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */
- alignment = <0x1000>;
- no-map;
- };
-
- wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9db00000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0x9db00000 0x00 0xc00000>;
- no-map;
- };
- };
-};
-
-&main_pmx0 {
- /* Verdin PWM_1 */
- pinctrl_epwm0_a: main-epwm0a-default-pins {
- pinctrl-single,pins = <
- AM62X_IOPAD(0x01b4, PIN_OUTPUT, 2) /* (A13) SPI0_CS0.EHRPWM0_A */ /* SODIMM 15 */
- >;
- };
-
- /* Verdin PWM_2 */
- pinctrl_epwm0_b: main-epwm0b-default-pins {
- pinctrl-single,pins = <
- AM62X_IOPAD(0x01b8, PIN_OUTPUT, 2) /* (C13) SPI0_CS1.EHRPWM0_B */ /* SODIMM 16 */
- >;
- };
-
- /* Verdin PWM_3_DSI */
- pinctrl_epwm1_a: main-epwm1a-default-pins {
- pinctrl-single,pins = <
- AM62X_IOPAD(0x01bc, PIN_OUTPUT, 2) /* (A14) SPI0_CLK.EHRPWM1_A */ /* SODIMM 19 */
- >;
- };
-
- /* Verdin QSPI_1_CLK as GPIO (conflict with Verdin QSPI_1 interface) */
- pinctrl_qspi1_clk_gpio: main-gpio0-0-default-pins {
- pinctrl-single,pins = <
- AM62X_IOPAD(0x0000, PIN_INPUT, 7) /* (H24) OSPI0_CLK.GPIO0_0 */ /* SODIMM 52 */
- >;
- };
-
- /* Verdin QSPI_1_IO0 as GPIO (conflict with Verdin QSPI_1 interface) */
- pinctrl_qspi1_io0_gpio: main-gpio0-3-default-pins {
- pinctrl-single,pins = <
- AM62X_IOPAD(0x000c, PIN_INPUT, 7) /* (E25) OSPI0_D0.GPIO0_3 */ /* SODIMM 56 */
- >;
- };
-
- /* Verdin QSPI_1_IO1 as GPIO (conflict with Verdin QSPI_1 interface) */
- pinctrl_qspi1_io1_gpio: main-gpio0-4-default-pins {
- pinctrl-single,pins = <
- AM62X_IOPAD(0x0010, PIN_INPUT, 7) /* (G24) OSPI0_D1.GPIO0_4 */ /* SODIMM 58 */
- >;
- };
-
- /* Verdin QSPI_1_IO2 as GPIO (conflict with Verdin QSPI_1 interface) */
- pinctrl_qspi1_io2_gpio: main-gpio0-5-default-pins {
- pinctrl-single,pins = <
- AM62X_IOPAD(0x0014, PIN_INPUT, 7) /* (F25) OSPI0_D2.GPIO0_5 */ /* SODIMM 60 */
- >;
- };
-
- /* Verdin QSPI_1_IO3 as GPIO (conflict with Verdin QSPI_1 interface) */
- pinctrl_qspi1_io3_gpio: main-gpio0-6-default-pins {
- pinctrl-single,pins = <
- AM62X_IOPAD(0x0018, PIN_INPUT, 7) /* (F24) OSPI0_D3.GPIO0_6 */ /* SODIMM 62 */
- >;
- };
-
- /* Verdin QSPI_1_CS# as GPIO (conflict with Verdin QSPI_1 interface) */
- pinctrl_qspi1_cs_gpio: main-gpio0-11-default-pins {
- pinctrl-single,pins = <
- AM62X_IOPAD(0x002c, PIN_INPUT, 7) /* (F23) OSPI0_CSn0.GPIO0_11 */ /* SODIMM 54 */
- >;
- };
-
- /* Verdin QSPI_1_CS2# as GPIO (conflict with Verdin QSPI_1 interface) */
- pinctrl_qspi1_cs2_gpio: main-gpio0-12-default-pins {
- pinctrl-single,pins = <
- AM62X_IOPAD(0x0030, PIN_INPUT, 7) /* (G21) OSPI0_CSn1.GPIO0_12 */ /* SODIMM 64 */
- >;
- };
-
- /* WiFi_W_WKUP_HOST# */
- pinctrl_wifi_w_wkup_host: main-gpio0-15-default-pins {
- pinctrl-single,pins = <
- AM62X_IOPAD(0x003c, PIN_INPUT, 7) /* (M25) GPMC0_AD0.GPIO0_15 */ /* SODIMM 174 */
- >;
- };
-
- /* WiFi_BT_WKUP_HOST# */
- pinctrl_bt_wkup_host: main-gpio0-16-default-pins {
- pinctrl-single,pins = <
- AM62X_IOPAD(0x0040, PIN_INPUT, 7) /* (N23) GPMC0_AD1.GPIO0_16 */ /* SODIMM 172 */
- >;
- };
-
- /* PMIC_ETH_RESET# */
- pinctrl_eth_reset: main-gpio0-17-default-pins {
- pinctrl-single,pins = <
- AM62X_IOPAD(0x0044, PIN_INPUT, 7) /* (N24) GPMC0_AD2.GPIO0_17 */
- >;
- };
-
- /* PMIC_BRIDGE_RESET# */
- pinctrl_bridge_reset: main-gpio0-20-default-pins {
- pinctrl-single,pins = <
- AM62X_IOPAD(0x0050, PIN_INPUT, 7) /* (P22) GPMC0_AD5.GPIO0_20 */
- >;
- };
-
- /* PMIC_VSEL_SD */
- pinctrl_vsel_sd: main-gpio0-21-default-pins {
- pinctrl-single,pins = <
- AM62X_IOPAD(0x0054, PIN_INPUT, 7) /* (P21) GPMC0_AD6.GPIO0_21 */
- >;
- };
-
- /* PMIC_EN_WIFI */
- pinctrl_wifi_en: main-gpio0-22-default-pins {
- pinctrl-single,pins = <
- AM62X_IOPAD(0x0058, PIN_INPUT, 7) /* (R23) GPMC0_AD7.GPIO0_22 */
- >;
- };
-
- /* PMIC_ETH_INT# */
- pinctrl_eth_int: main-gpio0-25-default-pins {
- pinctrl-single,pins = <
- AM62X_IOPAD(0x0064, PIN_INPUT_PULLUP, 7) /* (T25) GPMC0_AD10.GPIO0_25 */
- >;
- };
-
- /* WiFi_WKUP_BT# */
- pinctrl_wifi_wkup_bt: main-gpio0-26-default-pins {
- pinctrl-single,pins = <
- AM62X_IOPAD(0x0068, PIN_INPUT, 7) /* (R21) GPMC0_AD11.GPIO0_26 */
- >;
- };
-
- /* WiFi_WKUP_WLAN# */
- pinctrl_wifi_wkup_wlan: main-gpio0-27-default-pins {
- pinctrl-single,pins = <
- AM62X_IOPAD(0x006c, PIN_INPUT, 7) /* (T22) GPMC0_AD12.GPIO0_27 */
- >;
- };
-
- /* Verdin SD_1_PWR_EN */
- pinctrl_sd1_pwr_en: main-gpio0-29-default-pins {
- pinctrl-single,pins = <
- AM62X_IOPAD(0x0074, PIN_INPUT, 7) /* (U25) GPMC0_AD14.GPIO0_29 */ /* SODIMM 76 */
- >;
- };
-
- /* Verdin DSI_1_BKL_EN */
- pinctrl_dsi1_bkl_en: main-gpio0-30-default-pins {
- pinctrl-single,pins = <
- AM62X_IOPAD(0x0078, PIN_INPUT, 7) /* (U24) GPMC0_AD15.GPIO0_30 */ /* SODIMM 21 */
- >;
- };
-
- /* Verdin CTRL_SLEEP_MOCI# */
- pinctrl_ctrl_sleep_moci: main-gpio0-31-default-pins {
- pinctrl-single,pins = <
- AM62X_IOPAD(0x007c, PIN_INPUT, 7) /* (P25) GPMC0_CLK.GPIO0_31 */ /* SODIMM 256 */
- >;
- };
-
- /* Verdin CTRL_WAKE1_MICO# */
- pinctrl_ctrl_wake1_mico: main-gpio0-32-default-pins {
- pinctrl-single,pins = <
- AM62X_IOPAD(0x0084, PIN_INPUT_PULLUP, 7) /* (L23) GPMC0_ADVn_ALE.GPIO0_32 */ /* SODIMM 252 */
- >;
- };
-
- /* Verdin I2S_2_D_OUT as GPIO (conflict with Verdin I2S_2 interface) */
- pinctrl_i2s_2_d_out_gpio: main-gpio0-34-default-pins {
- pinctrl-single,pins = <
- AM62X_IOPAD(0x008c, PIN_INPUT, 7) /* (L25) GPMC0_WEn.GPIO0_34 */ /* SODIMM 46 */
- >;
- };
-
- /* Verdin I2S_2_BCLK as GPIO (conflict with Verdin I2S_2 interface) */
- pinctrl_i2s_2_bclk_gpio: main-gpio0-35-default-pins {
- pinctrl-single,pins = <
- AM62X_IOPAD(0x0090, PIN_INPUT, 7) /* (M24) GPMC0_BE0n_CLE.GPIO0_35 */ /* SODIMM 42 */
- >;
- };
-
- /* Verdin GPIO_6 */
- pinctrl_gpio_6: main-gpio0-36-default-pins {
- pinctrl-single,pins = <
- AM62X_IOPAD(0x0094, PIN_INPUT, 7) /* (N20) GPMC0_BE1n.GPIO0_36 */ /* SODIMM 218 */
- >;
- };
-
- /* Verdin ETH_2_RGMII_INT# */
- pinctrl_eth2_rgmii_int: main-gpio0-38-default-pins {
- pinctrl-single,pins = <
- AM62X_IOPAD(0x009c, PIN_INPUT, 7) /* (V25) GPMC0_WAIT1.GPIO0_38 */ /* SODIMM 189 */
- >;
- };
-
- /* Verdin GPIO_5 */
- pinctrl_gpio_5: main-gpio0-40-default-pins {
- pinctrl-single,pins = <
- AM62X_IOPAD(0x00a4, PIN_INPUT, 7) /* (M22) GPMC0_DIR.GPIO0_40 */ /* SODIMM 216 */
- >;
- };
-
- /* Verdin GPIO_7 */
- pinctrl_gpio_7: main-gpio0-41-default-pins {
- pinctrl-single,pins = <
- AM62X_IOPAD(0x00a8, PIN_INPUT, 7) /* (M21) GPMC0_CSn0.GPIO0_41 */ /* SODIMM 220 */
- >;
- };
-
- /* Verdin GPIO_8 */
- pinctrl_gpio_8: main-gpio0-42-default-pins {
- pinctrl-single,pins = <
- AM62X_IOPAD(0x00ac, PIN_INPUT, 7) /* (L21) GPMC0_CSn1.GPIO0_42 */ /* SODIMM 222 */
- >;
- };
-
- /* Verdin USB_1_OC# */
- pinctrl_usb1_oc: main-gpio0-71-default-pins {
- pinctrl-single,pins = <
- AM62X_IOPAD(0x0124, PIN_INPUT, 7) /* (A23) MMC2_SDCD.GPIO0_71 */ /* SODIMM 157 */
- >;
- };
-
- /* Verdin USB_2_OC# */
- pinctrl_usb2_oc: main-gpio0-72-default-pins {
- pinctrl-single,pins = <
- AM62X_IOPAD(0x0128, PIN_INPUT, 7) /* (B23) MMC2_SDWP.GPIO0_72 */ /* SODIMM 187 */
- >;
- };
-
- /* Verdin PWM_3_DSI as GPIO */
- pinctrl_pwm3_dsi_gpio: main-gpio1-17-default-pins {
- pinctrl-single,pins = <
- AM62X_IOPAD(0x01bc, PIN_INPUT, 7) /* (A14) SPI0_CLK.GPIO1_17 */ /* SODIMM 19 */
- >;
- };
-
- /* Verdin QSPI_1_DQS as GPIO */
- pinctrl_qspi1_dqs_gpio: main-gpio1-18-default-pins {
- pinctrl-single,pins = <
- AM62X_IOPAD(0x01c0, PIN_INPUT, 7) /* (B13) SPI0_D0.GPIO1_18 */ /* SODIMM 66 */
- >;
- };
-
- /* Verdin USB_1_ID */
- pinctrl_usb0_id: main-gpio1-19-default-pins {
- pinctrl-single,pins = <
- AM62X_IOPAD(0x01c4, PIN_INPUT, 7) /* (B14) SPI0_D1.GPIO1_19 */ /* SODIMM 161 */
- >;
- };
-
- /* Verdin DSI_1_INT# (pulled-up as active-low) */
- pinctrl_dsi1_int: main-gpio1-49-default-pins {
- pinctrl-single,pins = <
- AM62X_IOPAD(0x0244, PIN_INPUT_PULLUP, 7) /* (C17) MMC1_SDWP.GPIO1_49 */ /* SODIMM 17 */
- >;
- };
-
- /* On-module I2C - PMIC_I2C */
- pinctrl_i2c0: main-i2c0-default-pins {
- pinctrl-single,pins = <
- AM62X_IOPAD(0x01e0, PIN_INPUT, 0) /* (B16) I2C0_SCL */ /* PMIC_I2C_SCL */
- AM62X_IOPAD(0x01e4, PIN_INPUT, 0) /* (A16) I2C0_SDA */ /* PMIC_I2C_SDA */
- >;
- };
-
- /* Verdin I2C_1 */
- pinctrl_i2c1: main-i2c1-default-pins {
- pinctrl-single,pins = <
- AM62X_IOPAD(0x01e8, PIN_INPUT_PULLUP, 0) /* (B17) I2C1_SCL */ /* SODIMM 14 */
- AM62X_IOPAD(0x01ec, PIN_INPUT_PULLUP, 0) /* (A17) I2C1_SDA */ /* SODIMM 12 */
- >;
- };
-
- /* Verdin I2C_2_DSI */
- pinctrl_i2c2: main-i2c2-default-pins {
- pinctrl-single,pins = <
- AM62X_IOPAD(0x00b0, PIN_INPUT, 1) /* (K22) GPMC0_CSn2.I2C2_SCL */ /* SODIMM 55 */
- AM62X_IOPAD(0x00b4, PIN_INPUT, 1) /* (K24) GPMC0_CSn3.I2C2_SDA */ /* SODIMM 53 */
- >;
- };
-
- /* Verdin I2C_4_CSI */
- pinctrl_i2c3: main-i2c3-default-pins {
- pinctrl-single,pins = <
- AM62X_IOPAD(0x01d0, PIN_INPUT, 2) /* (A15) UART0_CTSn.I2C3_SCL */ /* SODIMM 95 */
- AM62X_IOPAD(0x01d4, PIN_INPUT, 2) /* (B15) UART0_RTSn.I2C3_SDA */ /* SODIMM 93 */
- >;
- };
-
- /* I2S_1_MCLK */
- pinctrl_i2s1_mclk: main-system-audio-ext-reflock1-default-pins {
- pinctrl-single,pins = <
- AM62X_IOPAD(0x00a0, PIN_OUTPUT, 1) /* (K25) GPMC0_WPn.AUDIO_EXT_REFCLK1 */ /* SODIMM 38 */
- >;
- };
-
- /* Verdin I2S_1 */
- pinctrl_mcasp0: main-mcasp0-default-pins {
- pinctrl-single,pins = <
- AM62X_IOPAD(0x01a4, PIN_INPUT, 0) /* (B20) MCASP0_ACLKX */ /* SODIMM 30 */
- AM62X_IOPAD(0x01a8, PIN_INPUT, 0) /* (D20) MCASP0_AFSX */ /* SODIMM 32 */
- AM62X_IOPAD(0x01a0, PIN_OUTPUT, 0) /* (E18) MCASP0_AXR0 */ /* SODIMM 34 */
- AM62X_IOPAD(0x019c, PIN_INPUT, 0) /* (B18) MCASP0_AXR1 */ /* SODIMM 36 */
- >;
- };
-
- /* Verdin I2S_2 */
- pinctrl_mcasp1: main-mcasp1-default-pins {
- pinctrl-single,pins = <
- AM62X_IOPAD(0x0090, PIN_INPUT, 2) /* (M24) GPMC0_BE0n_CLE.MCASP1_ACLKX */ /* SODIMM 42 */
- AM62X_IOPAD(0x0098, PIN_INPUT, 2) /* (U23) GPMC0_WAIT0.MCASP1_AFSX */ /* SODIMM 44 */
- AM62X_IOPAD(0x008c, PIN_OUTPUT, 2) /* (L25) GPMC0_WEn.MCASP1_AXR0 */ /* SODIMM 46 */
- AM62X_IOPAD(0x0088, PIN_INPUT, 2) /* (L24) GPMC0_OEn_REn.MCASP1_AXR1 */ /* SODIMM 48 */
- >;
- };
-
- /* Verdin CAN_1 */
- pinctrl_mcan0: main-mcan0-default-pins {
- pinctrl-single,pins = <
- AM62X_IOPAD(0x01dc, PIN_INPUT, 0) /* (E15) MCAN0_RX */ /* SODIMM 22 */
- AM62X_IOPAD(0x01d8, PIN_OUTPUT, 0) /* (C15) MCAN0_TX */ /* SODIMM 20 */
- >;
- };
-
- /* MDIO, shared by Verdin ETH_1 (On-module PHY) and Verdin ETH_2_RGMII */
- pinctrl_mdio: main-mdio1-default-pins {
- pinctrl-single,pins = <
- AM62X_IOPAD(0x160, PIN_OUTPUT, 0) /* (AD24) MDIO0_MDC */ /* ETH_1_MDC, SODIMM 193 */
- AM62X_IOPAD(0x15c, PIN_INPUT, 0) /* (AB22) MDIO0_MDIO */ /* ETH_1_MDIO, SODIMM 191 */
- >;
- };
-
- /* On-module eMMC */
- pinctrl_sdhci0: main-mmc0-default-pins {
- pinctrl-single,pins = <
- AM62X_IOPAD(0x220, PIN_INPUT, 0) /* (Y3) MMC0_CMD */
- AM62X_IOPAD(0x218, PIN_INPUT, 0) /* (AB1) MMC0_CLK */
- AM62X_IOPAD(0x214, PIN_INPUT, 0) /* (AA2) MMC0_DAT0 */
- AM62X_IOPAD(0x210, PIN_INPUT, 0) /* (AA1) MMC0_DAT1 */
- AM62X_IOPAD(0x20c, PIN_INPUT, 0) /* (AA3) MMC0_DAT2 */
- AM62X_IOPAD(0x208, PIN_INPUT, 0) /* (Y4) MMC0_DAT3 */
- AM62X_IOPAD(0x204, PIN_INPUT, 0) /* (AB2) MMC0_DAT4 */
- AM62X_IOPAD(0x200, PIN_INPUT, 0) /* (AC1) MMC0_DAT5 */
- AM62X_IOPAD(0x1fc, PIN_INPUT, 0) /* (AD2) MMC0_DAT6 */
- AM62X_IOPAD(0x1f8, PIN_INPUT, 0) /* (AC2) MMC0_DAT7 */
- >;
- };
-
- /* Verdin SD_1 */
- pinctrl_sdhci1: main-mmc1-default-pins {
- pinctrl-single,pins = <
- AM62X_IOPAD(0x23c, PIN_INPUT, 0) /* (A21) MMC1_CMD */ /* SODIMM 74 */
- AM62X_IOPAD(0x234, PIN_INPUT, 0) /* (B22) MMC1_CLK */ /* SODIMM 78 */
- AM62X_IOPAD(0x230, PIN_INPUT, 0) /* (A22) MMC1_DAT0 */ /* SODIMM 80 */
- AM62X_IOPAD(0x22c, PIN_INPUT, 0) /* (B21) MMC1_DAT1 */ /* SODIMM 82 */
- AM62X_IOPAD(0x228, PIN_INPUT, 0) /* (C21) MMC1_DAT2 */ /* SODIMM 70 */
- AM62X_IOPAD(0x224, PIN_INPUT, 0) /* (D22) MMC1_DAT3 */ /* SODIMM 72 */
- AM62X_IOPAD(0x240, PIN_INPUT_PULLUP, 0) /* (D17) MMC1_SDCD */ /* SODIMM 84 */
- >;
- };
-
- /* On-module Wi-Fi on WB SKUs, module-specific SDIO otherwise */
- pinctrl_sdhci2: main-mmc2-default-pins {
- pinctrl-single,pins = <
- AM62X_IOPAD(0x120, PIN_INPUT, 0) /* (C24) MMC2_CMD */ /* WiFi_SDIO_CMD */
- AM62X_IOPAD(0x118, PIN_INPUT, 0) /* (D25) MMC2_CLK */ /* WiFi_SDIO_CLK */
- AM62X_IOPAD(0x114, PIN_INPUT, 0) /* (B24) MMC2_DAT0 */ /* WiFi_SDIO_DATA0 */
- AM62X_IOPAD(0x110, PIN_INPUT, 0) /* (C25) MMC2_DAT1 */ /* WiFi_SDIO_DATA1 */
- AM62X_IOPAD(0x10c, PIN_INPUT, 0) /* (E23) MMC2_DAT2 */ /* WiFi_SDIO_DATA2 */
- AM62X_IOPAD(0x108, PIN_INPUT, 0) /* (D24) MMC2_DAT3 */ /* WiFi_SDIO_DATA3 */
- AM62X_IOPAD(0x11c, PIN_INPUT, 0) /* (#N/A) MMC2_CLKB */
- >;
- };
-
- /* Verdin QSPI_1 */
- pinctrl_ospi0: main-ospi0-default-pins {
- pinctrl-single,pins = <
- AM62X_IOPAD(0x0000, PIN_OUTPUT, 0) /* (H24) OSPI0_CLK */ /* SODIMM 52 */
- AM62X_IOPAD(0x002c, PIN_OUTPUT, 0) /* (F23) OSPI0_CSn0 */ /* SODIMM 54 */
- AM62X_IOPAD(0x0030, PIN_OUTPUT, 0) /* (G21) OSPI0_CSn1 */ /* SODIMM 64 */
- AM62X_IOPAD(0x000c, PIN_INPUT, 0) /* (E25) OSPI0_D0 */ /* SODIMM 56 */
- AM62X_IOPAD(0x0010, PIN_INPUT, 0) /* (G24) OSPI0_D1 */ /* SODIMM 58 */
- AM62X_IOPAD(0x0014, PIN_INPUT, 0) /* (F25) OSPI0_D2 */ /* SODIMM 60 */
- AM62X_IOPAD(0x0018, PIN_INPUT, 0) /* (F24) OSPI0_D3 */ /* SODIMM 62 */
- >;
- };
-
- /* Verdin ETH_1 RGMII (On-module PHY) */
- pinctrl_rgmii1: main-rgmii1-default-pins {
- pinctrl-single,pins = <
- AM62X_IOPAD(0x14c, PIN_INPUT, 0) /* (AB17) RGMII1_RD0 */
- AM62X_IOPAD(0x150, PIN_INPUT, 0) /* (AC17) RGMII1_RD1 */
- AM62X_IOPAD(0x154, PIN_INPUT, 0) /* (AB16) RGMII1_RD2 */
- AM62X_IOPAD(0x158, PIN_INPUT, 0) /* (AA15) RGMII1_RD3 */
- AM62X_IOPAD(0x148, PIN_INPUT, 0) /* (AD17) RGMII1_RXC */
- AM62X_IOPAD(0x144, PIN_INPUT, 0) /* (AE17) RGMII1_RX_CTL */
- AM62X_IOPAD(0x134, PIN_OUTPUT, 0) /* (AE20) RGMII1_TD0 */
- AM62X_IOPAD(0x138, PIN_OUTPUT, 0) /* (AD20) RGMII1_TD1 */
- AM62X_IOPAD(0x13c, PIN_OUTPUT, 0) /* (AE18) RGMII1_TD2 */
- AM62X_IOPAD(0x140, PIN_OUTPUT, 0) /* (AD18) RGMII1_TD3 */
- AM62X_IOPAD(0x130, PIN_OUTPUT, 0) /* (AE19) RGMII1_TXC */
- AM62X_IOPAD(0x12c, PIN_OUTPUT, 0) /* (AD19) RGMII1_TX_CTL */
- >;
- };
-
- /* Verdin ETH_2 RGMII */
- pinctrl_rgmii2: main-rgmii2-default-pins {
- pinctrl-single,pins = <
- AM62X_IOPAD(0x184, PIN_INPUT, 0) /* (AE23) RGMII2_RD0 */ /* SODIMM 201 */
- AM62X_IOPAD(0x188, PIN_INPUT, 0) /* (AB20) RGMII2_RD1 */ /* SODIMM 203 */
- AM62X_IOPAD(0x18c, PIN_INPUT, 0) /* (AC21) RGMII2_RD2 */ /* SODIMM 205 */
- AM62X_IOPAD(0x190, PIN_INPUT, 0) /* (AE22) RGMII2_RD3 */ /* SODIMM 207 */
- AM62X_IOPAD(0x180, PIN_INPUT, 0) /* (AD23) RGMII2_RXC */ /* SODIMM 197 */
- AM62X_IOPAD(0x17c, PIN_INPUT, 0) /* (AD22) RGMII2_RX_CTL */ /* SODIMM 199 */
- AM62X_IOPAD(0x16c, PIN_OUTPUT, 0) /* (Y18) RGMII2_TD0 */ /* SODIMM 221 */
- AM62X_IOPAD(0x170, PIN_OUTPUT, 0) /* (AA18) RGMII2_TD1 */ /* SODIMM 219 */
- AM62X_IOPAD(0x174, PIN_OUTPUT, 0) /* (AD21) RGMII2_TD2 */ /* SODIMM 217 */
- AM62X_IOPAD(0x178, PIN_OUTPUT, 0) /* (AC20) RGMII2_TD3 */ /* SODIMM 215 */
- AM62X_IOPAD(0x168, PIN_OUTPUT, 0) /* (AE21) RGMII2_TXC */ /* SODIMM 213 */
- AM62X_IOPAD(0x164, PIN_OUTPUT, 0) /* (AA19) RGMII2_TX_CTL */ /* SODIMM 211 */
- >;
- };
-
- /* Verdin SPI_1 */
- pinctrl_spi1: main-spi1-default-pins {
- pinctrl-single,pins = <
- AM62X_IOPAD(0x0020, PIN_INPUT, 1) /* (J25) OSPI0_D5.SPI1_CLK */ /* SODIMM 196 */
- AM62X_IOPAD(0x001c, PIN_INPUT, 1) /* (J23) OSPI0_D4.SPI1_CS0 */ /* SODIMM 202 */
- AM62X_IOPAD(0x0024, PIN_INPUT, 1) /* (H25) OSPI0_D6.SPI1_D0 */ /* SODIMM 200 */
- AM62X_IOPAD(0x0028, PIN_INPUT, 1) /* (J22) OSPI0_D7.SPI1_D1 */ /* SODIMM 198 */
- >;
- };
-
- /* ETH_25MHz_CLK */
- pinctrl_eth_clock: main-system-clkout0-default-pins {
- pinctrl-single,pins = <
- AM62X_IOPAD(0x01f0, PIN_OUTPUT_PULLUP, 5) /* (A18) EXT_REFCLK1.CLKOUT0 */
- >;
- };
-
- /* PMIC_EXTINT# */
- pinctrl_pmic_extint: main-system-extint-default-pins {
- pinctrl-single,pins = <
- AM62X_IOPAD(0x01f4, PIN_INPUT, 0) /* (D16) EXTINTn */
- >;
- };
-
- /* Verdin UART_3, used as the Linux console */
- pinctrl_uart0: main-uart0-default-pins {
- pinctrl-single,pins = <
- AM62X_IOPAD(0x1c8, PIN_INPUT_PULLUP, 0) /* (D14) UART0_RXD */ /* SODIMM 147 */
- AM62X_IOPAD(0x1cc, PIN_OUTPUT, 0) /* (E14) UART0_TXD */ /* SODIMM 149 */
- >;
- };
-
- /* Verdin UART_1 */
- pinctrl_uart1: main-uart1-default-pins {
- pinctrl-single,pins = <
- AM62X_IOPAD(0x0194, PIN_INPUT_PULLUP, 2) /* (B19) MCASP0_AXR3.UART1_CTSn */ /* SODIMM 135 */
- AM62X_IOPAD(0x0198, PIN_OUTPUT, 2) /* (A19) MCASP0_AXR2.UART1_RTSn */ /* SODIMM 133 */
- AM62X_IOPAD(0x01ac, PIN_INPUT_PULLUP, 2) /* (E19) MCASP0_AFSR.UART1_RXD */ /* SODIMM 129 */
- AM62X_IOPAD(0x01b0, PIN_OUTPUT, 2) /* (A20) MCASP0_ACLKR.UART1_TXD */ /* SODIMM 131 */
- >;
- };
-
- /* Bluetooth on WB SKUs, module-specific UART otherwise */
- pinctrl_uart5: main-uart5-default-pins {
- pinctrl-single,pins = <
- AM62X_IOPAD(0x0008, PIN_INPUT_PULLUP, 5) /* (J24) OSPI0_DQS.UART5_CTSn */ /* WiFi_UART_CTS */
- AM62X_IOPAD(0x0004, PIN_OUTPUT, 5) /* (G25) OSPI0_LBCLKO.UART5_RTSn */ /* WiFi_UART_RTS */
- AM62X_IOPAD(0x0034, PIN_INPUT_PULLUP, 5) /* (H21) OSPI0_CSn2.UART5_RXD */ /* WiFi_UART_RXD */
- AM62X_IOPAD(0x0038, PIN_OUTPUT, 5) /* (E24) OSPI0_CSn3.UART5_TXD */ /* WiFi_UART_TXD */
- >;
- };
-
- /* Verdin USB_1 */
- pinctrl_usb0: main-usb0-default-pins {
- pinctrl-single,pins = <
- AM62X_IOPAD(0x0254, PIN_OUTPUT, 0) /* (C20) USB0_DRVVBUS */ /* SODIMM 155 */
- >;
- };
-
- /* Verdin USB_2 */
- pinctrl_usb1: main-usb1-default-pins {
- pinctrl-single,pins = <
- AM62X_IOPAD(0x0258, PIN_OUTPUT, 0) /* (F18) USB1_DRVVBUS */ /* SODIMM 185 */
- >;
- };
-
- /* DSS VOUT0 RGB */
- pinctrl_parallel_rgb: main-vout-default-pins {
- pinctrl-single,pins = <
- AM62X_IOPAD(0x0100, PIN_OUTPUT, 0) /* (AC25) VOUT0_VSYNC */
- AM62X_IOPAD(0x00f8, PIN_OUTPUT, 0) /* (AB24) VOUT0_HSYNC */
- AM62X_IOPAD(0x0104, PIN_OUTPUT, 0) /* (AC24) VOUT0_PCLK */
- AM62X_IOPAD(0x00fc, PIN_OUTPUT, 0) /* (Y20) VOUT0_DE */
- AM62X_IOPAD(0x00b8, PIN_OUTPUT, 0) /* (U22) VOUT0_DATA0 */
- AM62X_IOPAD(0x00bc, PIN_OUTPUT, 0) /* (V24) VOUT0_DATA1 */
- AM62X_IOPAD(0x00c0, PIN_OUTPUT, 0) /* (W25) VOUT0_DATA2 */
- AM62X_IOPAD(0x00c4, PIN_OUTPUT, 0) /* (W24) VOUT0_DATA3 */
- AM62X_IOPAD(0x00c8, PIN_OUTPUT, 0) /* (Y25) VOUT0_DATA4 */
- AM62X_IOPAD(0x00cc, PIN_OUTPUT, 0) /* (Y24) VOUT0_DATA5 */
- AM62X_IOPAD(0x00d0, PIN_OUTPUT, 0) /* (Y23) VOUT0_DATA6 */
- AM62X_IOPAD(0x00d4, PIN_OUTPUT, 0) /* (AA25) VOUT0_DATA7 */
- AM62X_IOPAD(0x00d8, PIN_OUTPUT, 0) /* (V21) VOUT0_DATA8 */
- AM62X_IOPAD(0x00dc, PIN_OUTPUT, 0) /* (W21) VOUT0_DATA9 */
- AM62X_IOPAD(0x00e0, PIN_OUTPUT, 0) /* (V20) VOUT0_DATA10 */
- AM62X_IOPAD(0x00e4, PIN_OUTPUT, 0) /* (AA23) VOUT0_DATA11 */
- AM62X_IOPAD(0x00e8, PIN_OUTPUT, 0) /* (AB25) VOUT0_DATA12 */
- AM62X_IOPAD(0x00ec, PIN_OUTPUT, 0) /* (AA24) VOUT0_DATA13 */
- AM62X_IOPAD(0x00f0, PIN_OUTPUT, 0) /* (Y22) VOUT0_DATA14 */
- AM62X_IOPAD(0x00f4, PIN_OUTPUT, 0) /* (AA21) VOUT0_DATA15 */
- AM62X_IOPAD(0x005c, PIN_OUTPUT, 1) /* (R24) GPMC0_AD8.VOUT0_DATA16 */
- AM62X_IOPAD(0x0060, PIN_OUTPUT, 1) /* (R25) GPMC0_AD9.VOUT0_DATA17 */
- >;
- };
-};
-
-&mcu_pmx0 {
- /* Verdin PCIE_1_RESET# */
- pinctrl_pcie_1_reset: mcu-gpio0-0-default-pins {
- pinctrl-single,pins = <
- AM62X_MCU_IOPAD(0x0000, PIN_INPUT, 7) /* (E8) MCU_SPI0_CS0.MCU_GPIO0_0 */ /* SODIMM 244 */
- >;
- };
-
- /* Verdin GPIO_1 */
- pinctrl_gpio_1: mcu-gpio0-1-default-pins {
- pinctrl-single,pins = <
- AM62X_MCU_IOPAD(0x0004, PIN_INPUT, 7) /* (B8) MCU_SPI0_CS1.MCU_GPIO0_1 */ /* SODIMM 206 */
- >;
- };
-
- /* Verdin GPIO_2 */
- pinctrl_gpio_2: mcu-gpio0-2-default-pins {
- pinctrl-single,pins = <
- AM62X_MCU_IOPAD(0x0008, PIN_INPUT, 7) /* (A7) MCU_SPI0_CLK.MCU_GPIO0_2 */ /* SODIMM 208 */
- >;
- };
-
- /* Verdin GPIO_3 */
- pinctrl_gpio_3: mcu-gpio0-3-default-pins {
- pinctrl-single,pins = <
- AM62X_MCU_IOPAD(0x000c, PIN_INPUT, 7) /* (D9) MCU_SPI0_D0.MCU_GPIO0_3 */ /* SODIMM 210 */
- >;
- };
-
- /* Verdin GPIO_4 */
- pinctrl_gpio_4: mcu-gpio0-4-default-pins {
- pinctrl-single,pins = <
- AM62X_MCU_IOPAD(0x0010, PIN_INPUT, 7) /* (C9) MCU_SPI0_D1.MCU_GPIO0_4 */ /* SODIMM 212 */
- >;
- };
-
- /* Verdin I2C_3_HDMI */
- pinctrl_mcu_i2c0: mcu-i2c0-default-pins {
- pinctrl-single,pins = <
- AM62X_MCU_IOPAD(0x0044, PIN_INPUT, 0) /* (A8) MCU_I2C0_SCL */ /* SODIMM 59 */
- AM62X_MCU_IOPAD(0x0048, PIN_INPUT, 0) /* (D10) MCU_I2C0_SDA */ /* SODIMM 57 */
- >;
- };
-
- /* Verdin CAN_2 */
- pinctrl_mcu_mcan0: mcu-mcan0-default-pins {
- pinctrl-single,pins = <
- AM62X_MCU_IOPAD(0x0038, PIN_INPUT, 0) /* (B3) MCU_MCAN0_RX */ /* SODIMM 26 */
- AM62X_MCU_IOPAD(0x0034, PIN_OUTPUT, 0) /* (D6) MCU_MCAN0_TX */ /* SODIMM 24 */
- >;
- };
-
- /* Verdin UART_4 - Reserved to Cortex-M4 */
- pinctrl_mcu_uart0: mcu-uart0-default-pins {
- pinctrl-single,pins = <
- AM62X_MCU_IOPAD(0x0014, PIN_INPUT_PULLUP, 0) /* (B5) MCU_UART0_RXD */ /* SODIMM 151 */
- AM62X_MCU_IOPAD(0x0018, PIN_OUTPUT, 0) /* (A5) MCU_UART0_TXD */ /* SODIMM 153 */
- >;
- };
-
- /* Verdin CSI_1_MCLK */
- pinctrl_csi1_mclk: wkup-clkout0-default-pins {
- pinctrl-single,pins = <
- AM62X_MCU_IOPAD(0x0084, PIN_OUTPUT, 0) /* (A12) WKUP_CLKOUT0 */ /* SODIMM 91 */
- >;
- };
-
- /* Verdin UART_2 */
- pinctrl_wkup_uart0: wkup-uart0-default-pins {
- pinctrl-single,pins = <
- AM62X_MCU_IOPAD(0x002c, PIN_INPUT_PULLUP, 0) /* (C6) WKUP_UART0_CTSn */ /* SODIMM 143 */
- AM62X_MCU_IOPAD(0x0030, PIN_OUTPUT, 0) /* (A4) WKUP_UART0_RTSn */ /* SODIMM 141 */
- AM62X_MCU_IOPAD(0x0024, PIN_INPUT_PULLUP, 0) /* (B4) WKUP_UART0_RXD */ /* SODIMM 137 */
- AM62X_MCU_IOPAD(0x0028, PIN_OUTPUT, 0) /* (C5) WKUP_UART0_TXD */ /* SODIMM 139 */
- >;
- };
-};
-
-/* VERDIN I2S_1_MCLK */
-&audio_refclk1 {
- assigned-clock-rates = <25000000>;
-};
-
-&cpsw3g {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_rgmii1>;
- status = "disabled";
-};
-
-/* Verdin ETH_1 (On-module PHY) */
-&cpsw_port1 {
- phy-handle = <&cpsw3g_phy0>;
- phy-mode = "rgmii-rxid";
- status = "disabled";
-};
-
-/* Verdin ETH_2_RGMII */
-&cpsw_port2 {
- status = "disabled";
-};
-
-/* MDIO, shared by Verdin ETH_1 (On-module PHY) and Verdin ETH_2_RGMII */
-&cpsw3g_mdio {
- assigned-clocks = <&k3_clks 157 20>;
- assigned-clock-parents = <&k3_clks 157 22>;
- assigned-clock-rates = <25000000>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_eth_clock>, <&pinctrl_mdio>;
- status = "disabled";
-
- cpsw3g_phy0: ethernet-phy@0 {
- compatible = "ethernet-phy-id2000.a231";
- reg = <0>;
- interrupt-parent = <&main_gpio0>;
- interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_eth_int>, <&pinctrl_eth_reset>;
- reset-gpios = <&main_gpio0 17 GPIO_ACTIVE_LOW>;
- reset-assert-us = <10>;
- reset-deassert-us = <1000>;
- ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
- ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
- };
-};
-
-&dss {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_parallel_rgb>;
- status = "disabled";
-};
-
-&dss_ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- /* VP2: DPI Output */
- port@1 {
- reg = <1>;
-
- dpi_out: endpoint {
- remote-endpoint = <&rgb_in>;
- };
- };
-};
-
-/* Verdin PWM_1, PWM_2 */
-&epwm0 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_epwm0_a>, <&pinctrl_epwm0_b>;
- status = "disabled";
-};
-
-/* Verdin PWM_3_DSI */
-&epwm1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_epwm1_a>;
- status = "disabled";
-};
-
-&main_gpio0 {
- gpio-line-names =
- "SODIMM_52", /* 0 */
- "",
- "",
- "SODIMM_56",
- "SODIMM_58",
- "SODIMM_60",
- "SODIMM_62",
- "",
- "",
- "",
- "", /* 10 */
- "SODIMM_54",
- "SODIMM_64",
- "",
- "",
- "SODIMM_174",
- "SODIMM_172",
- "",
- "",
- "",
- "", /* 20 */
- "",
- "",
- "",
- "",
- "",
- "",
- "",
- "",
- "SODIMM_76",
- "SODIMM_21", /* 30 */
- "SODIMM_256",
- "SODIMM_252",
- "",
- "SODIMM_46",
- "SODIMM_42",
- "SODIMM_218",
- "",
- "SODIMM_189",
- "",
- "SODIMM_216", /* 40 */
- "SODIMM_220",
- "SODIMM_222",
- "",
- "",
- "",
- "",
- "",
- "",
- "",
- "", /* 50 */
- "",
- "",
- "",
- "",
- "",
- "",
- "",
- "",
- "",
- "", /* 60 */
- "",
- "",
- "",
- "",
- "",
- "",
- "",
- "",
- "",
- "", /* 70 */
- "SODIMM_157",
- "SODIMM_187",
- "",
- "",
- "",
- "",
- "",
- "",
- "",
- "", /* 80 */
- "",
- "",
- "",
- "",
- "",
- "";
-
- verdin_ctrl_sleep_moci: ctrl-sleep-moci-hog {
- gpio-hog;
- /* Verdin CTRL_SLEEP_MOCI# (SODIMM 256) */
- gpios = <31 GPIO_ACTIVE_HIGH>;
- line-name = "CTRL_SLEEP_MOCI#";
- output-high;
- };
-};
-
-&main_gpio1 {
- gpio-line-names =
- "", /* 0 */
- "",
- "",
- "",
- "",
- "",
- "",
- "",
- "",
- "",
- "", /* 10 */
- "",
- "",
- "",
- "",
- "SODIMM_15",
- "SODIMM_16",
- "SODIMM_19",
- "SODIMM_66",
- "SODIMM_161",
- "", /* 20 */
- "",
- "",
- "",
- "",
- "",
- "",
- "",
- "",
- "",
- "", /* 30 */
- "",
- "",
- "",
- "",
- "",
- "",
- "",
- "",
- "",
- "", /* 40 */
- "",
- "",
- "",
- "",
- "",
- "",
- "",
- "",
- "SODIMM_17",
- "", /* 50 */
- "",
- "",
- "",
- "",
- "",
- "",
- "",
- "",
- "",
- "", /* 60 */
- "",
- "",
- "",
- "",
- "",
- "",
- "",
- "",
- "",
- "", /* 70 */
- "",
- "",
- "",
- "",
- "",
- "",
- "",
- "",
- "",
- "", /* 80 */
- "",
- "",
- "",
- "",
- "",
- "",
- "";
-};
-
-/* On-module I2C - PMIC_I2C */
-&main_i2c0 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_i2c0>;
- clock-frequency = <400000>;
- status = "okay";
-
- dsi_bridge: dsi@e {
- compatible = "toshiba,tc358778";
- reg = <0xe>;
- assigned-clocks = <&k3_clks 157 20>;
- assigned-clock-parents = <&k3_clks 157 22>;
- assigned-clock-rates = <25000000>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_bridge_reset>;
- clocks = <&k3_clks 157 20>;
- clock-names = "refclk";
- reset-gpios = <&main_gpio0 20 GPIO_ACTIVE_LOW>;
- vddc-supply = <®_1v2_dsi>;
- vddmipi-supply = <®_1v2_dsi>;
- vddio-supply = <®_1v8_dsi>;
- status = "disabled";
-
- dsi_bridge_ports: ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
-
- rgb_in: endpoint {
- data-lines = <18>;
- remote-endpoint = <&dpi_out>;
- };
- };
-
- port@1 {
- reg = <1>;
- };
- };
- };
-
- pmic@30 {
- compatible = "ti,tps65219";
- reg = <0x30>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pmic_extint>;
- interrupt-parent = <&gic500>;
- interrupts = <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
-
- buck1-supply = <®_vsodimm>;
- buck2-supply = <®_vsodimm>;
- buck3-supply = <®_vsodimm>;
- ldo1-supply = <®_3v3>;
- ldo2-supply = <®_1v8>;
- ldo3-supply = <®_3v3>;
- ldo4-supply = <®_3v3>;
- system-power-controller;
- ti,power-button;
-
- regulators {
- reg_vdd_core: buck1 {
- regulator-always-on;
- regulator-boot-on;
- regulator-max-microvolt = <850000>;
- regulator-min-microvolt = <850000>;
- regulator-name = "+VDD_CORE (PMIC BUCK1)";
- };
-
- reg_1v8: buck2 {
- regulator-always-on;
- regulator-boot-on;
- regulator-max-microvolt = <1800000>;
- regulator-min-microvolt = <1800000>;
- regulator-name = "+V1.8 (PMIC BUCK2)"; /* On-module and SODIMM 214 */
- };
-
- reg_vdd_ddr: buck3 {
- regulator-always-on;
- regulator-boot-on;
- regulator-max-microvolt = <1100000>;
- regulator-min-microvolt = <1100000>;
- regulator-name = "+VDD_DDR (PMIC BUCK3)";
- };
-
- reg_sd_3v3_1v8: ldo1 {
- regulator-allow-bypass;
- regulator-always-on;
- regulator-boot-on;
- regulator-max-microvolt = <3300000>;
- regulator-min-microvolt = <3300000>;
- regulator-name = "+V3.3_1.8_SD (PMIC LDO1)";
- };
-
- reg_vddr_core: ldo2 {
- regulator-always-on;
- regulator-boot-on;
- regulator-max-microvolt = <850000>;
- regulator-min-microvolt = <850000>;
- regulator-name = "+VDDR_CORE (PMIC LDO2)";
- };
-
- reg_1v8a: ldo3 {
- regulator-always-on;
- regulator-boot-on;
- regulator-max-microvolt = <1800000>;
- regulator-min-microvolt = <1800000>;
- regulator-name = "+V1.8A (PMIC LDO3)";
- };
-
- reg_eth_2v5: ldo4 {
- regulator-always-on;
- regulator-boot-on;
- regulator-max-microvolt = <2500000>;
- regulator-min-microvolt = <2500000>;
- regulator-name = "+V2.5_ETH (PMIC LDO4)";
- };
- };
- };
-
- rtc_i2c: rtc@32 {
- compatible = "epson,rx8130";
- reg = <0x32>;
- };
-
- sensor@48 {
- compatible = "ti,tmp1075";
- reg = <0x48>;
- };
-
- adc@49 {
- compatible = "ti,ads1015";
- reg = <0x49>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- /* Verdin PMIC_I2C (ADC_4 - ADC_3) */
- channel@0 {
- reg = <0>;
- ti,datarate = <4>;
- ti,gain = <2>;
- };
-
- /* Verdin PMIC_I2C (ADC_4 - ADC_1) */
- channel@1 {
- reg = <1>;
- ti,datarate = <4>;
- ti,gain = <2>;
- };
-
- /* Verdin PMIC_I2C (ADC_3 - ADC_1) */
- channel@2 {
- reg = <2>;
- ti,datarate = <4>;
- ti,gain = <2>;
- };
-
- /* Verdin PMIC_I2C (ADC_2 - ADC_1) */
- channel@3 {
- reg = <3>;
- ti,datarate = <4>;
- ti,gain = <2>;
- };
-
- /* Verdin PMIC_I2C ADC_4 */
- channel@4 {
- reg = <4>;
- ti,datarate = <4>;
- ti,gain = <2>;
- };
-
- /* Verdin PMIC_I2C ADC_3 */
- channel@5 {
- reg = <5>;
- ti,datarate = <4>;
- ti,gain = <2>;
- };
-
- /* Verdin PMIC_I2C ADC_2 */
- channel@6 {
- reg = <6>;
- ti,datarate = <4>;
- ti,gain = <2>;
- };
-
- /* Verdin PMIC_I2C ADC_1 */
- channel@7 {
- reg = <7>;
- ti,datarate = <4>;
- ti,gain = <2>;
- };
- };
-
- eeprom@50 {
- compatible = "st,24c02", "atmel,24c02";
- pagesize = <16>;
- reg = <0x50>;
- };
-};
-
-/* Verdin I2C_1 */
-&main_i2c1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_i2c1>;
- status = "disabled";
-};
-
-/* Verdin I2C_2_DSI */
-&main_i2c2 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_i2c2>;
- status = "disabled";
-};
-
-/* Verdin I2C_4_CSI */
-&main_i2c3 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_i2c3>;
- status = "disabled";
-};
-
-&mailbox0_cluster0 {
- mbox_m4_0: mbox-m4-0 {
- ti,mbox-rx = <0 0 0>;
- ti,mbox-tx = <1 0 0>;
- };
-};
-
-/* Verdin CAN_1 */
-&main_mcan0 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_mcan0>;
- status = "disabled";
-};
-
-/* Verdin SPI_1 */
-&main_spi1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_spi1>;
- ti,pindir-d0-out-d1-in;
- status = "disabled";
-};
-
-/* Verdin UART_3, used as the Linux console */
-&main_uart0 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart0>;
- status = "disabled";
-};
-
-/* Verdin UART_1 */
-&main_uart1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart1>;
- status = "disabled";
-};
-
-/* Verdin I2S_1 */
-&mcasp0 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_mcasp0>;
- op-mode = <0>; /* I2S mode */
- serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
- 1 2 0 0
- 0 0 0 0
- 0 0 0 0
- 0 0 0 0
- >;
- tdm-slots = <2>;
- rx-num-evt = <32>;
- tx-num-evt = <32>;
- #sound-dai-cells = <0>;
- status = "disabled";
-};
-
-/* Verdin I2S_2 */
-&mcasp1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_mcasp1>;
- op-mode = <0>; /* I2S mode */
- serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
- 1 2 0 0
- 0 0 0 0
- 0 0 0 0
- 0 0 0 0
- >;
- tdm-slots = <2>;
- rx-num-evt = <32>;
- tx-num-evt = <32>;
- #sound-dai-cells = <0>;
- status = "disabled";
-};
-
-/* Verdin I2C_3_HDMI */
-&mcu_i2c0 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_mcu_i2c0>;
- status = "disabled";
-};
-
-&mcu_gpio0 {
- gpio-line-names =
- "SODIMM_244",
- "SODIMM_206",
- "SODIMM_208",
- "SODIMM_210",
- "SODIMM_212",
- "",
- "",
- "",
- "",
- "",
- "",
- "",
- "",
- "",
- "",
- "",
- "",
- "",
- "",
- "",
- "",
- "",
- "",
- "";
-};
-
-/* Verdin CAN_2 */
-&mcu_mcan0 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_mcu_mcan0>;
- status = "disabled";
-};
-
-/* Verdin UART_4 - Cortex-M4 UART */
-&mcu_uart0 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_mcu_uart0>;
- status = "disabled";
-};
-
-/* Verdin QSPI_1 */
-&ospi0 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_ospi0>;
- status = "disabled";
-};
-
-/* On-module eMMC */
-&sdhci0 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_sdhci0>;
- non-removable;
- ti,driver-strength-ohm = <50>;
- status = "okay";
-};
-
-/* Verdin SD_1 */
-&sdhci1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_sdhci1>;
- disable-wp;
- ti,driver-strength-ohm = <50>;
- vmmc-supply = <®_sdhc1_vmmc>;
- vqmmc-supply = <®_sdhc1_vqmmc>;
- status = "disabled";
-};
-
-/* Verdin USB_1 */
-&usbss0 {
- ti,vbus-divider;
- status = "disabled";
-};
-
-/* TODO: role swich using ID pin */
-&usb0 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_usb0>, <&pinctrl_usb0_id>;
- status = "disabled";
-};
-
-/* Verdin USB_2 */
-&usbss1 {
- ti,vbus-divider;
- status = "disabled";
-};
-
-&usb1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_usb1>;
- dr_mode = "host";
- status = "disabled";
-};
-
-/* Verdin UART_2 */
-&wkup_uart0 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_wkup_uart0>;
- status = "disabled";
-};
diff --git a/arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi b/arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi
index cca0f44..fb20320 100644
--- a/arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi
+++ b/arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi
@@ -41,13 +41,6 @@
clock-frequency = <25000000>;
};
-&dmsc {
- k3_sysreset: sysreset-controller {
- compatible = "ti,sci-sysreset";
- bootph-all;
- };
-};
-
&sd_pins_default {
/* Force to use SDCD card detect pin */
pinctrl-single,pins = <
diff --git a/arch/arm/dts/k3-am625-phyboard-lyra-rdk-u-boot.dtsi b/arch/arm/dts/k3-am625-phyboard-lyra-rdk-u-boot.dtsi
index f6138f3..9416228 100644
--- a/arch/arm/dts/k3-am625-phyboard-lyra-rdk-u-boot.dtsi
+++ b/arch/arm/dts/k3-am625-phyboard-lyra-rdk-u-boot.dtsi
@@ -42,13 +42,6 @@
bootph-all;
};
-&dmsc {
- k3_sysreset: sysreset-controller {
- compatible = "ti,sci-sysreset";
- bootph-all;
- };
-};
-
&fss {
bootph-all;
};
diff --git a/arch/arm/dts/k3-am625-phyboard-lyra-rdk.dts b/arch/arm/dts/k3-am625-phyboard-lyra-rdk.dts
deleted file mode 100644
index a438baf..0000000
--- a/arch/arm/dts/k3-am625-phyboard-lyra-rdk.dts
+++ /dev/null
@@ -1,266 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Copyright (C) 2022 - 2023 PHYTEC Messtechnik GmbH
- * Author: Wadim Egorov <w.egorov@phytec.de>
- *
- * Product homepage:
- * https://www.phytec.com/product/phyboard-am62x
- */
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/leds/common.h>
-#include <dt-bindings/net/ti-dp83867.h>
-#include "k3-am625.dtsi"
-#include "k3-am62-phycore-som.dtsi"
-
-/ {
- compatible = "phytec,am625-phyboard-lyra-rdk",
- "phytec,am62-phycore-som", "ti,am625";
- model = "PHYTEC phyBOARD-Lyra AM625";
-
- aliases {
- serial2 = &main_uart0;
- serial3 = &main_uart1;
- mmc1 = &sdhci1;
- usb0 = &usb0;
- usb1 = &usb1;
- ethernet1 = &cpsw_port2;
- };
-
- can_tc1: can-phy0 {
- compatible = "ti,tcan1042";
- #phy-cells = <0>;
- max-bitrate = <5000000>;
- standby-gpios = <&gpio_exp 1 GPIO_ACTIVE_HIGH>;
- };
-
- keys {
- compatible = "gpio-keys";
- autorepeat;
- pinctrl-names = "default";
- pinctrl-0 = <&gpio_keys_pins_default>;
-
- key-home {
- label = "home";
- linux,code = <KEY_HOME>;
- gpios = <&main_gpio1 23 GPIO_ACTIVE_HIGH>;
- };
-
- key-menu {
- label = "menu";
- linux,code = <KEY_MENU>;
- gpios = <&gpio_exp 4 GPIO_ACTIVE_HIGH>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
- pinctrl-names = "default";
- pinctrl-0 = <&leds_pins_default>, <&user_leds_pins_default>;
-
- led-1 {
- gpios = <&main_gpio0 32 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "mmc0";
- };
-
- led-2 {
- gpios = <&gpio_exp 2 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "mmc1";
- };
- };
-
- vcc_3v3_mmc: regulator-vcc-3v3-mmc {
- compatible = "regulator-fixed";
- regulator-name = "VCC_3V3_MMC";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-always-on;
- regulator-boot-on;
- };
-};
-
-&main_pmx0 {
- gpio_keys_pins_default: gpio-keys-default-pins {
- pinctrl-single,pins = <
- AM62X_IOPAD(0x1d4, PIN_INPUT, 7) /* (B15) UART0_RTSn.GPIO1_23 */
- >;
- };
-
- gpio_exp_int_pins_default: gpio-exp-int-default-pins {
- pinctrl-single,pins = <
- AM62X_IOPAD(0x244, PIN_INPUT, 7) /* (C17) MMC1_SDWP.GPIO1_49 */
- >;
- };
-
- main_i2c1_pins_default: main-i2c1-default-pins {
- pinctrl-single,pins = <
- AM62X_IOPAD(0x1e8, PIN_INPUT_PULLUP, 0) /* (B17) I2C1_SCL */
- AM62X_IOPAD(0x1ec, PIN_INPUT_PULLUP, 0) /* (A17) I2C1_SDA */
- >;
- };
-
- main_mcan0_pins_default: main-mcan0-default-pins {
- pinctrl-single,pins = <
- AM62X_IOPAD(0x1dc, PIN_INPUT, 0) /* (E15) MCAN0_RX */
- AM62X_IOPAD(0x1d8, PIN_OUTPUT, 0) /* (C15) MCAN0_TX */
- >;
- };
-
- main_mmc1_pins_default: main-mmc1-default-pins {
- pinctrl-single,pins = <
- AM62X_IOPAD(0x23c, PIN_INPUT_PULLUP, 0) /* (A21) MMC1_CMD */
- AM62X_IOPAD(0x234, PIN_INPUT_PULLDOWN, 0) /* (B22) MMC1_CLK */
- AM62X_IOPAD(0x230, PIN_INPUT_PULLUP, 0) /* (A22) MMC1_DAT0 */
- AM62X_IOPAD(0x22c, PIN_INPUT_PULLUP, 0) /* (B21) MMC1_DAT1 */
- AM62X_IOPAD(0x228, PIN_INPUT_PULLUP, 0) /* (C21) MMC1_DAT2 */
- AM62X_IOPAD(0x224, PIN_INPUT_PULLUP, 0) /* (D22) MMC1_DAT3 */
- AM62X_IOPAD(0x240, PIN_INPUT_PULLUP, 0) /* (D17) MMC1_SDCD */
- >;
- };
-
- main_rgmii2_pins_default: main-rgmii2-default-pins {
- pinctrl-single,pins = <
- AM62X_IOPAD(0x184, PIN_INPUT, 0) /* (AE23) RGMII2_RD0 */
- AM62X_IOPAD(0x188, PIN_INPUT, 0) /* (AB20) RGMII2_RD1 */
- AM62X_IOPAD(0x18c, PIN_INPUT, 0) /* (AC21) RGMII2_RD2 */
- AM62X_IOPAD(0x190, PIN_INPUT, 0) /* (AE22) RGMII2_RD3 */
- AM62X_IOPAD(0x180, PIN_INPUT, 0) /* (AD23) RGMII2_RXC */
- AM62X_IOPAD(0x17c, PIN_INPUT, 0) /* (AD22) RGMII2_RX_CTL */
- AM62X_IOPAD(0x16c, PIN_OUTPUT, 0) /* (Y18) RGMII2_TD0 */
- AM62X_IOPAD(0x170, PIN_OUTPUT, 0) /* (AA18) RGMII2_TD1 */
- AM62X_IOPAD(0x174, PIN_OUTPUT, 0) /* (AD21) RGMII2_TD2 */
- AM62X_IOPAD(0x178, PIN_OUTPUT, 0) /* (AC20) RGMII2_TD3 */
- AM62X_IOPAD(0x168, PIN_OUTPUT, 0) /* (AE21) RGMII2_TXC */
- AM62X_IOPAD(0x164, PIN_OUTPUT, 0) /* (AA19) RGMII2_TX_CTL */
- >;
- };
-
- main_uart0_pins_default: main-uart0-default-pins {
- pinctrl-single,pins = <
- AM62X_IOPAD(0x1c8, PIN_INPUT, 0) /* (D14) UART0_RXD */
- AM62X_IOPAD(0x1cc, PIN_OUTPUT, 0) /* (E14) UART0_TXD */
- >;
- };
-
- main_uart1_pins_default: main-uart1-default-pins {
- pinctrl-single,pins = <
- AM62X_IOPAD(0x194, PIN_INPUT, 2) /* (B19) MCASP0_AXR3.UART1_CTSn */
- AM62X_IOPAD(0x198, PIN_OUTPUT, 2) /* (A19) MCASP0_AXR2.UART1_RTSn */
- AM62X_IOPAD(0x1ac, PIN_INPUT, 2) /* (E19) MCASP0_AFSR.UART1_RXD */
- AM62X_IOPAD(0x1b0, PIN_OUTPUT, 2) /* (A20) MCASP0_ACLKR.UART1_TXD */
- >;
- };
-
- main_usb1_pins_default: main-usb1-default-pins {
- pinctrl-single,pins = <
- AM62X_IOPAD(0x258, PIN_OUTPUT, 0) /* (F18) USB1_DRVVBUS */
- >;
- };
-
- user_leds_pins_default: user-leds-default-pins {
- pinctrl-single,pins = <
- AM62X_IOPAD(0x084, PIN_OUTPUT, 7) /* (L23) GPMC0_ADVn_ALE.GPIO0_32 */
- >;
- };
-};
-
-&cpsw3g {
- pinctrl-names = "default";
- pinctrl-0 = <&main_rgmii1_pins_default>, <&main_rgmii2_pins_default>;
-};
-
-&cpsw_port2 {
- phy-mode = "rgmii-rxid";
- phy-handle = <&cpsw3g_phy3>;
-};
-
-&cpsw3g_mdio {
- cpsw3g_phy3: ethernet-phy@3 {
- compatible = "ethernet-phy-id2000.a231", "ethernet-phy-ieee802.3-c22";
- reg = <3>;
- ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
- ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
- };
-};
-
-&main_i2c1 {
- pinctrl-names = "default";
- pinctrl-0 = <&main_i2c1_pins_default>;
- clock-frequency = <400000>;
- status = "okay";
-
- gpio_exp: gpio-expander@21 {
- pinctrl-names = "default";
- pinctrl-0 = <&gpio_exp_int_pins_default>;
- compatible = "nxp,pcf8574";
- reg = <0x21>;
- interrupt-parent = <&main_gpio1>;
- interrupts = <49 0>;
- #gpio-cells = <2>;
- gpio-controller;
- interrupt-controller;
- #interrupt-cells = <2>;
- gpio-line-names = "GPIO0_HDMI_RST", "GPIO1_CAN0_nEN",
- "GPIO2_LED2", "GPIO3_LVDS_GPIO",
- "GPIO4_BUT2", "GPIO5_LVDS_BKLT_EN",
- "GPIO6_ETH1_USER_RESET", "GPIO7_AUDIO_USER_RESET";
- };
-
- eeprom@51 {
- compatible = "atmel,24c02";
- pagesize = <16>;
- reg = <0x51>;
- };
-};
-
-&main_mcan0 {
- pinctrl-names = "default";
- pinctrl-0 = <&main_mcan0_pins_default>;
- phys = <&can_tc1>;
- status = "okay";
-};
-
-&main_uart0 {
- pinctrl-names = "default";
- pinctrl-0 = <&main_uart0_pins_default>;
- status = "okay";
-};
-
-&main_uart1 {
- pinctrl-names = "default";
- pinctrl-0 = <&main_uart1_pins_default>;
- /* Main UART1 may be used by TIFS firmware */
- status = "okay";
-};
-
-&sdhci1 {
- vmmc-supply = <&vcc_3v3_mmc>;
- vqmmc-supply = <&vddshv5_sdio>;
- pinctrl-names = "default";
- pinctrl-0 = <&main_mmc1_pins_default>;
- ti,driver-strength-ohm = <50>;
- disable-wp;
- no-1-8-v;
- status = "okay";
-};
-
-&usbss0 {
- ti,vbus-divider;
- status = "okay";
-};
-
-&usbss1 {
- ti,vbus-divider;
- status = "okay";
-};
-
-&usb0 {
- dr_mode = "peripheral";
-};
-
-&usb1 {
- dr_mode = "host";
- pinctrl-names = "default";
- pinctrl-0 = <&main_usb1_pins_default>;
-};
diff --git a/arch/arm/dts/k3-am625-phycore-som-binman.dtsi b/arch/arm/dts/k3-am625-phycore-som-binman.dtsi
index ed50bfe..dbee4aa 100644
--- a/arch/arm/dts/k3-am625-phycore-som-binman.dtsi
+++ b/arch/arm/dts/k3-am625-phycore-som-binman.dtsi
@@ -140,7 +140,7 @@
#endif /* CONFIG_TARGET_PHYCORE_AM62X_R5 */
#ifdef CONFIG_TARGET_PHYCORE_AM62X_A53
-#define SPL_AM625_PHYBOARD_LYRA_DTB "spl/dts/k3-am625-phyboard-lyra-rdk.dtb"
+#define SPL_AM625_PHYBOARD_LYRA_DTB "spl/dts/ti/k3-am625-phyboard-lyra-rdk.dtb"
#define AM625_PHYBOARD_LYRA_DTB "u-boot.dtb"
&binman {
diff --git a/arch/arm/dts/k3-am625-sk-binman.dtsi b/arch/arm/dts/k3-am625-sk-binman.dtsi
index 5b058bd..dfd38d6 100644
--- a/arch/arm/dts/k3-am625-sk-binman.dtsi
+++ b/arch/arm/dts/k3-am625-sk-binman.dtsi
@@ -151,11 +151,107 @@
filename = "ti-dm/am62xx/ipc_echo_testb_mcu1_0_release_strip.xer5f";
};
};
+
+ tifsstub-hs {
+ filename = "tifsstub.bin_hs";
+ ti-secure-rom {
+ content = <&tifsstub_hs_cert>;
+ core = "secure";
+ load = <0x40000>;
+ sw-rev = <CONFIG_K3_X509_SWRV>;
+ keyfile = "custMpk.pem";
+ countersign;
+ tifsstub;
+ };
+ tifsstub_hs_cert: tifsstub-hs-cert.bin {
+ filename = "ti-sysfw/ti-fs-stub-firmware-am62x-hs-cert.bin";
+ type = "blob-ext";
+ optional;
+ };
+ tifsstub_hs_enc: tifsstub-hs-enc.bin {
+ filename = "ti-sysfw/ti-fs-stub-firmware-am62x-hs-enc.bin";
+ type = "blob-ext";
+ optional;
+ };
+ };
+
+ tifsstub-fs {
+ filename = "tifsstub.bin_fs";
+ tifsstub_fs_cert: tifsstub-fs-cert.bin {
+ filename = "ti-sysfw/ti-fs-stub-firmware-am62x-hs-cert.bin";
+ type = "blob-ext";
+ optional;
+ };
+ tifsstub_fs_enc: tifsstub-fs-enc.bin {
+ filename = "ti-sysfw/ti-fs-stub-firmware-am62x-hs-enc.bin";
+ type = "blob-ext";
+ optional;
+ };
+
+ };
+
+ tifsstub-gp {
+ filename = "tifsstub.bin_gp";
+ ti-secure-rom {
+ content = <&tifsstub_gp>;
+ core = "secure";
+ load = <0x60000>;
+ sw-rev = <CONFIG_K3_X509_SWRV>;
+ keyfile = "ti-degenerate-key.pem";
+ tifsstub;
+ };
+ tifsstub_gp: tifsstub-gp.bin {
+ filename = "ti-sysfw/ti-fs-stub-firmware-am62x-gp.bin";
+ type = "blob-ext";
+ optional;
+ };
+ };
+
ti-spl {
insert-template = <&ti_spl_template>;
fit {
images {
+
+ tifsstub-hs {
+ description = "TIFSSTUB";
+ type = "firmware";
+ arch = "arm32";
+ compression = "none";
+ os = "tifsstub-hs";
+ load = <0x9dc00000>;
+ entry = <0x9dc00000>;
+ blob-ext {
+ filename = "tifsstub.bin_hs";
+ };
+ };
+
+ tifsstub-fs {
+ description = "TIFSSTUB";
+ type = "firmware";
+ arch = "arm32";
+ compression = "none";
+ os = "tifsstub-fs";
+ load = <0x9dc00000>;
+ entry = <0x9dc00000>;
+ blob-ext {
+ filename = "tifsstub.bin_fs";
+ };
+ };
+
+ tifsstub-gp {
+ description = "TIFSSTUB";
+ type = "firmware";
+ arch = "arm32";
+ compression = "none";
+ os = "tifsstub-gp";
+ load = <0x9dc00000>;
+ entry = <0x9dc00000>;
+ blob-ext {
+ filename = "tifsstub.bin_gp";
+ };
+ };
+
dm {
ti-secure {
content = <&dm>;
@@ -189,7 +285,8 @@
conf-0 {
description = "k3-am625-sk";
firmware = "atf";
- loadables = "tee", "dm", "spl";
+ loadables = "tee", "tifsstub-hs", "tifsstub-fs",
+ "tifsstub-gp", "dm", "spl";
fdt = "fdt-0";
};
};
@@ -247,6 +344,45 @@
fit {
images {
+ tifsstub-hs {
+ description = "tifsstub";
+ type = "firmware";
+ arch = "arm32";
+ compression = "none";
+ os = "tifsstub-hs";
+ load = <0x9dc00000>;
+ entry = <0x9dc00000>;
+ blob-ext {
+ filename = "tifsstub.bin_hs";
+ };
+ };
+
+ tifsstub-fs {
+ description = "tifsstub";
+ type = "firmware";
+ arch = "arm32";
+ compression = "none";
+ os = "tifsstub-fs";
+ load = <0x9dc00000>;
+ entry = <0x9dc00000>;
+ blob-ext {
+ filename = "tifsstub.bin_fs";
+ };
+ };
+
+ tifsstub-gp {
+ description = "tifsstub";
+ type = "firmware";
+ arch = "arm32";
+ compression = "none";
+ os = "tifsstub-gp";
+ load = <0x9dc00000>;
+ entry = <0x9dc00000>;
+ blob-ext {
+ filename = "tifsstub.bin_gp";
+ };
+ };
+
dm {
ti-dm {
filename = "ti-dm.bin";
@@ -270,7 +406,8 @@
conf-0 {
description = "k3-am625-sk";
firmware = "atf";
- loadables = "tee", "dm", "spl";
+ loadables = "tee", "tifsstub-hs", "tifsstub-fs",
+ "tifsstub-gp", "dm", "spl";
fdt = "fdt-0";
};
};
diff --git a/arch/arm/dts/k3-am625-verdin-wifi-dev-binman.dtsi b/arch/arm/dts/k3-am625-verdin-wifi-dev-binman.dtsi
index 4e37048..a9b86b6 100644
--- a/arch/arm/dts/k3-am625-verdin-wifi-dev-binman.dtsi
+++ b/arch/arm/dts/k3-am625-verdin-wifi-dev-binman.dtsi
@@ -140,7 +140,7 @@
#ifdef CONFIG_TARGET_VERDIN_AM62_A53
-#define SPL_VERDIN_AM62_DTB "spl/dts/k3-am625-verdin-wifi-dev.dtb"
+#define SPL_VERDIN_AM62_DTB "spl/dts/ti/k3-am625-verdin-wifi-dev.dtb"
#define VERDIN_AM62_DTB "u-boot.dtb"
&binman {
@@ -150,12 +150,107 @@
filename = "ti-dm/am62xx/ipc_echo_testb_mcu1_0_release_strip.xer5f";
};
};
+
+ tifsstub-hs {
+ filename = "tifsstub.bin_hs";
+ ti-secure-rom {
+ content = <&tifsstub_hs_cert>;
+ core = "secure";
+ load = <0x40000>;
+ sw-rev = <CONFIG_K3_X509_SWRV>;
+ keyfile = "custMpk.pem";
+ countersign;
+ tifsstub;
+ };
+ tifsstub_hs_cert: tifsstub-hs-cert.bin {
+ filename = "ti-sysfw/ti-fs-stub-firmware-am62x-hs-cert.bin";
+ type = "blob-ext";
+ optional;
+ };
+ tifsstub_hs_enc: tifsstub-hs-enc.bin {
+ filename = "ti-sysfw/ti-fs-stub-firmware-am62x-hs-enc.bin";
+ type = "blob-ext";
+ optional;
+ };
+ };
+
+ tifsstub-fs {
+ filename = "tifsstub.bin_fs";
+ tifsstub_fs_cert: tifsstub-fs-cert.bin {
+ filename = "ti-sysfw/ti-fs-stub-firmware-am62x-hs-cert.bin";
+ type = "blob-ext";
+ optional;
+ };
+ tifsstub_fs_enc: tifsstub-fs-enc.bin {
+ filename = "ti-sysfw/ti-fs-stub-firmware-am62x-hs-enc.bin";
+ type = "blob-ext";
+ optional;
+ };
+
+ };
+
+ tifsstub-gp {
+ filename = "tifsstub.bin_gp";
+ ti-secure-rom {
+ content = <&tifsstub_gp>;
+ core = "secure";
+ load = <0x60000>;
+ sw-rev = <CONFIG_K3_X509_SWRV>;
+ keyfile = "ti-degenerate-key.pem";
+ tifsstub;
+ };
+ tifsstub_gp: tifsstub-gp.bin {
+ filename = "ti-sysfw/ti-fs-stub-firmware-am62x-gp.bin";
+ type = "blob-ext";
+ optional;
+ };
+ };
+
ti-spl {
insert-template = <&ti_spl_template>;
fit {
images {
+ tifsstub-hs {
+ description = "TIFSSTUB";
+ type = "firmware";
+ arch = "arm32";
+ compression = "none";
+ os = "tifsstub-hs";
+ load = <0x9dc00000>;
+ entry = <0x9dc00000>;
+ blob-ext {
+ filename = "tifsstub.bin_hs";
+ };
+ };
+
+ tifsstub-fs {
+ description = "TIFSSTUB";
+ type = "firmware";
+ arch = "arm32";
+ compression = "none";
+ os = "tifsstub-fs";
+ load = <0x9dc00000>;
+ entry = <0x9dc00000>;
+ blob-ext {
+ filename = "tifsstub.bin_fs";
+ };
+ };
+
+ tifsstub-gp {
+ description = "TIFSSTUB";
+ type = "firmware";
+ arch = "arm32";
+ compression = "none";
+ os = "tifsstub-gp";
+ load = <0x9dc00000>;
+ entry = <0x9dc00000>;
+ blob-ext {
+ filename = "tifsstub.bin_gp";
+ };
+ };
+
dm {
ti-secure {
content = <&dm>;
@@ -187,7 +282,8 @@
conf-0 {
description = "k3-am625-verdin-wifi-dev";
firmware = "atf";
- loadables = "tee", "dm", "spl";
+ loadables = "tee", "tifsstub-hs", "tifsstub-fs",
+ "tifsstub-gp", "dm", "spl";
fdt = "fdt-0";
};
};
@@ -243,6 +339,45 @@
fit {
images {
+ tifsstub-hs {
+ description = "tifsstub";
+ type = "firmware";
+ arch = "arm32";
+ compression = "none";
+ os = "tifsstub-hs";
+ load = <0x9dc00000>;
+ entry = <0x9dc00000>;
+ blob-ext {
+ filename = "tifsstub.bin_hs";
+ };
+ };
+
+ tifsstub-fs {
+ description = "tifsstub";
+ type = "firmware";
+ arch = "arm32";
+ compression = "none";
+ os = "tifsstub-fs";
+ load = <0x9dc00000>;
+ entry = <0x9dc00000>;
+ blob-ext {
+ filename = "tifsstub.bin_fs";
+ };
+ };
+
+ tifsstub-gp {
+ description = "tifsstub";
+ type = "firmware";
+ arch = "arm32";
+ compression = "none";
+ os = "tifsstub-gp";
+ load = <0x9dc00000>;
+ entry = <0x9dc00000>;
+ blob-ext {
+ filename = "tifsstub.bin_gp";
+ };
+ };
+
dm {
ti-dm {
filename = "ti-dm.bin";
@@ -266,7 +401,8 @@
conf-0 {
description = "k3-am625-verdin-wifi-dev";
firmware = "atf";
- loadables = "tee", "dm", "spl";
+ loadables = "tee", "tifsstub-hs", "tifsstub-fs",
+ "tifsstub-gp", "dm", "spl";
fdt = "fdt-0";
};
};
diff --git a/arch/arm/dts/k3-am625-verdin-wifi-dev-u-boot.dtsi b/arch/arm/dts/k3-am625-verdin-wifi-dev-u-boot.dtsi
index 28b697b..9ecb305 100644
--- a/arch/arm/dts/k3-am625-verdin-wifi-dev-u-boot.dtsi
+++ b/arch/arm/dts/k3-am625-verdin-wifi-dev-u-boot.dtsi
@@ -85,19 +85,20 @@
bootph-all;
};
-&dmsc {
- k3_sysreset: sysreset-controller {
- compatible = "ti,sci-sysreset";
- bootph-all;
- };
-};
-
&fss {
bootph-all;
};
&main_gpio0 {
bootph-all;
+
+ ctrl-sleep-moci-hog {
+ bootph-all;
+ gpio-hog;
+ gpios = <31 GPIO_ACTIVE_HIGH>;
+ line-name = "CTRL_SLEEP_MOCI#";
+ output-high;
+ };
};
/* On-module I2C - PMIC_I2C */
@@ -172,10 +173,6 @@
status = "disabled";
};
-&verdin_ctrl_sleep_moci {
- bootph-all;
-};
-
/* Verdin UART_2 */
&wkup_uart0 {
bootph-all;
diff --git a/arch/arm/dts/k3-am625-verdin-wifi-dev.dts b/arch/arm/dts/k3-am625-verdin-wifi-dev.dts
deleted file mode 100644
index 4b657d6..0000000
--- a/arch/arm/dts/k3-am625-verdin-wifi-dev.dts
+++ /dev/null
@@ -1,22 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-/*
- * Copyright 2023 Toradex
- *
- * https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62
- * https://www.toradex.com/products/carrier-board/verdin-development-board-kit
- */
-
-/dts-v1/;
-
-#include "k3-am625.dtsi"
-#include "k3-am62-verdin.dtsi"
-#include "k3-am62-verdin-wifi.dtsi"
-#include "k3-am62-verdin-dev.dtsi"
-
-/ {
- model = "Toradex Verdin AM62 WB on Verdin Development Board";
- compatible = "toradex,verdin-am62-wifi-dev",
- "toradex,verdin-am62-wifi",
- "toradex,verdin-am62",
- "ti,am625";
-};
diff --git a/arch/arm/dts/k3-am62a7-sk-u-boot.dtsi b/arch/arm/dts/k3-am62a7-sk-u-boot.dtsi
index 31b89b4..c42dec1 100644
--- a/arch/arm/dts/k3-am62a7-sk-u-boot.dtsi
+++ b/arch/arm/dts/k3-am62a7-sk-u-boot.dtsi
@@ -119,10 +119,6 @@
&dmsc {
bootph-all;
- k3_sysreset: sysreset-controller {
- compatible = "ti,sci-sysreset";
- bootph-all;
- };
};
&vdd_mmc1 {
diff --git a/arch/arm/dts/k3-am62p5-sk-u-boot.dtsi b/arch/arm/dts/k3-am62p5-sk-u-boot.dtsi
index c166d65..cf087c6 100644
--- a/arch/arm/dts/k3-am62p5-sk-u-boot.dtsi
+++ b/arch/arm/dts/k3-am62p5-sk-u-boot.dtsi
@@ -15,9 +15,4 @@
&dmsc {
bootph-pre-ram;
-
- k3_sysreset: sysreset-controller {
- compatible = "ti,sci-sysreset";
- bootph-pre-ram;
- };
};
diff --git a/arch/arm/dts/k3-am64-phycore-som.dtsi b/arch/arm/dts/k3-am64-phycore-som.dtsi
deleted file mode 100644
index 1678e74..0000000
--- a/arch/arm/dts/k3-am64-phycore-som.dtsi
+++ /dev/null
@@ -1,320 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Copyright (C) 2021 PHYTEC America, LLC - https://www.phytec.com
- * Author: Matt McKee <mmckee@phytec.com>
- *
- * Copyright (C) 2022 PHYTEC Messtechnik GmbH
- * Author: Wadim Egorov <w.egorov@phytec.de>
- *
- * Product homepage:
- * https://www.phytec.com/product/phycore-am64x
- */
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/leds/common.h>
-#include <dt-bindings/net/ti-dp83867.h>
-
-/ {
- model = "PHYTEC phyCORE-AM64x";
- compatible = "phytec,am64-phycore-som", "ti,am642";
-
- aliases {
- ethernet0 = &cpsw_port1;
- mmc0 = &sdhci0;
- rtc0 = &i2c_som_rtc;
- };
-
- memory@80000000 {
- device_type = "memory";
- reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
- };
-
- reserved_memory: reserved-memory {
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- secure_ddr: optee@9e800000 {
- reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */
- alignment = <0x1000>;
- no-map;
- };
-
- main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa0000000 0x00 0x100000>;
- no-map;
- };
-
- main_r5fss0_core0_memory_region: r5f-memory@a0100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa0100000 0x00 0xf00000>;
- no-map;
- };
-
- main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa1000000 0x00 0x100000>;
- no-map;
- };
-
- main_r5fss0_core1_memory_region: r5f-memory@a1100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa1100000 0x00 0xf00000>;
- no-map;
- };
-
- main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a2000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa2000000 0x00 0x100000>;
- no-map;
- };
-
- main_r5fss1_core0_memory_region: r5f-memory@a2100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa2100000 0x00 0xf00000>;
- no-map;
- };
-
- main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a3000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa3000000 0x00 0x100000>;
- no-map;
- };
-
- main_r5fss1_core1_memory_region: r5f-memory@a3100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa3100000 0x00 0xf00000>;
- no-map;
- };
- };
-
- leds {
- compatible = "gpio-leds";
- pinctrl-names = "default";
- pinctrl-0 = <&leds_pins_default>;
-
- led-0 {
- color = <LED_COLOR_ID_GREEN>;
- gpios = <&main_gpio0 12 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "heartbeat";
- function = LED_FUNCTION_HEARTBEAT;
- };
- };
-
- vcc_5v0_som: regulator-vcc-5v0-som {
- /* VIN / VCC_5V0_SOM */
- compatible = "regulator-fixed";
- regulator-name = "VCC_5V0_SOM";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- regulator-always-on;
- regulator-boot-on;
- };
-};
-
-&main_pmx0 {
- cpsw_mdio_pins_default: cpsw-mdio-default-pins {
- pinctrl-single,pins = <
- AM64X_IOPAD(0x01f8, PIN_INPUT, 4) /* (P5) PRG0_PRU1_GPO18.MDIO0_MDIO */
- AM64X_IOPAD(0x01fc, PIN_OUTPUT, 4) /* (R2) PRG0_PRU1_GPO19.MDIO0_MDC */
- AM64X_IOPAD(0x0100, PIN_OUTPUT, 7) /* (V7) PRG1_PRU0_GPO18.GPIO0_63 */
- >;
- };
-
- cpsw_rgmii1_pins_default: cpsw-rgmii1-default-pins {
- pinctrl-single,pins = <
- AM64X_IOPAD(0x0184, PIN_INPUT, 4) /* (W6) PRG0_PRU0_GPO9.RGMII1_RX_CTL */
- AM64X_IOPAD(0x0188, PIN_INPUT, 4) /* (AA5) PRG0_PRU0_GPO10.RGMII1_RXC */
- AM64X_IOPAD(0x00dc, PIN_OUTPUT, 4) /* (U15) PRG1_PRU0_GPO9.RGMII1_TX_CTL */
- AM64X_IOPAD(0x00e0, PIN_OUTPUT, 4) /* (U14) PRG1_PRU0_GPO10.RGMII1_TXC */
- AM64X_IOPAD(0x01cc, PIN_INPUT, 4) /* (W5) PRG0_PRU1_GPO7.RGMII1_RD0 */
- AM64X_IOPAD(0x0124, PIN_OUTPUT, 4) /* (V15) PRG1_PRU1_GPO7.RGMII1_TD0 */
- AM64X_IOPAD(0x01d4, PIN_INPUT, 4) /* (Y5) PRG0_PRU1_GPO9.RGMII1_RD1 */
- AM64X_IOPAD(0x012c, PIN_OUTPUT, 4) /* (V14) PRG1_PRU1_GPO9.RGMII1_TD1 */
- AM64X_IOPAD(0x01d8, PIN_INPUT, 4) /* (V6) PRG0_PRU1_GPO10.RGMII1_RD2 */
- AM64X_IOPAD(0x0130, PIN_OUTPUT, 4) /* (W14) PRG1_PRU1_GPO10.RGMII1_TD2 */
- AM64X_IOPAD(0x01f4, PIN_INPUT, 4) /* (V5) PRG0_PRU1_GPO17.RGMII1_RD3 */
- AM64X_IOPAD(0x014c, PIN_OUTPUT, 4) /* (AA14) PRG1_PRU1_GPO17.RGMII1_TD3 */
- AM64X_IOPAD(0x0154, PIN_INPUT, 7) /* (V12) PRG1_PRU1_GPO19.GPIO0_84 */
- >;
- };
-
- eeprom_wp_pins_default: eeprom-wp-default-pins {
- pinctrl-single,pins = <
- AM64X_IOPAD(0x0208, PIN_OUTPUT, 7) /* (D12) SPI0_CS0.GPIO1_42 */
- >;
- };
-
- leds_pins_default: leds-default-pins {
- pinctrl-single,pins = <
- AM64X_IOPAD(0x0030, PIN_OUTPUT, 7) /* (L18) OSPI0_CSn1.GPIO0_12 */
- >;
- };
-
- main_i2c0_pins_default: main-i2c0-default-pins {
- pinctrl-single,pins = <
- AM64X_IOPAD(0x0260, PIN_INPUT, 0) /* (A18) I2C0_SCL */
- AM64X_IOPAD(0x0264, PIN_INPUT, 0) /* (B18) I2C0_SDA */
- >;
- };
-
- ospi0_pins_default: ospi0-default-pins {
- pinctrl-single,pins = <
- AM64X_IOPAD(0x0000, PIN_OUTPUT, 0) /* (N20) OSPI0_CLK */
- AM64X_IOPAD(0x0008, PIN_INPUT, 0) /* (N19) OSPI0_DQS */
- AM64X_IOPAD(0x000c, PIN_INPUT, 0) /* (M19) OSPI0_D0 */
- AM64X_IOPAD(0x0010, PIN_INPUT, 0) /* (M18) OSPI0_D1 */
- AM64X_IOPAD(0x0014, PIN_INPUT, 0) /* (M20) OSPI0_D2 */
- AM64X_IOPAD(0x0018, PIN_INPUT, 0) /* (M21) OSPI0_D3 */
- AM64X_IOPAD(0x001c, PIN_INPUT, 0) /* (P21) OSPI0_D4 */
- AM64X_IOPAD(0x0020, PIN_INPUT, 0) /* (P20) OSPI0_D5 */
- AM64X_IOPAD(0x0024, PIN_INPUT, 0) /* (N18) OSPI0_D6 */
- AM64X_IOPAD(0x0028, PIN_INPUT, 0) /* (M17) OSPI0_D7 */
- AM64X_IOPAD(0x002c, PIN_OUTPUT, 0) /* (L19) OSPI0_CSn0 */
- >;
- };
-
- rtc_pins_default: rtc-defaults-pins {
- pinctrl-single,pins = <
- AM64X_IOPAD(0x0278, PIN_INPUT, 7) /* (C19) EXTINTn.GPIO1_70 */
- >;
- };
-};
-
-&cpsw3g {
- pinctrl-names = "default";
- pinctrl-0 = <&cpsw_rgmii1_pins_default>;
-};
-
-&cpsw3g_mdio {
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&cpsw_mdio_pins_default>;
-
- cpsw3g_phy1: ethernet-phy@1 {
- compatible = "ethernet-phy-id2000.a231", "ethernet-phy-ieee802.3-c22";
- reg = <1>;
- interrupt-parent = <&main_gpio0>;
- interrupts = <84 IRQ_TYPE_EDGE_FALLING>;
- ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
- ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
- reset-gpios = <&main_gpio0 63 GPIO_ACTIVE_LOW>;
- reset-assert-us = <1000>;
- reset-deassert-us = <1000>;
- };
-};
-
-&cpsw_port1 {
- phy-mode = "rgmii-rxid";
- phy-handle = <&cpsw3g_phy1>;
-};
-
-&cpsw_port2 {
- status = "disabled";
-};
-
-&mailbox0_cluster2 {
- status = "okay";
-
- mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
- ti,mbox-rx = <0 0 2>;
- ti,mbox-tx = <1 0 2>;
- };
-
- mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
- ti,mbox-rx = <2 0 2>;
- ti,mbox-tx = <3 0 2>;
- };
-};
-
-&mailbox0_cluster4 {
- status = "okay";
-
- mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {
- ti,mbox-rx = <0 0 2>;
- ti,mbox-tx = <1 0 2>;
- };
-
- mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {
- ti,mbox-rx = <2 0 2>;
- ti,mbox-tx = <3 0 2>;
- };
-};
-
-&main_i2c0 {
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&main_i2c0_pins_default>;
- clock-frequency = <400000>;
-
- eeprom@50 {
- compatible = "atmel,24c32";
- pinctrl-names = "default";
- pinctrl-0 = <&eeprom_wp_pins_default>;
- pagesize = <32>;
- reg = <0x50>;
- };
-
- i2c_som_rtc: rtc@52 {
- compatible = "microcrystal,rv3028";
- reg = <0x52>;
- pinctrl-names = "default";
- pinctrl-0 = <&rtc_pins_default>;
- interrupt-parent = <&main_gpio1>;
- interrupts = <70 IRQ_TYPE_EDGE_FALLING>;
- wakeup-source;
- };
-};
-
-&main_r5fss0_core0 {
- mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core0>;
- memory-region = <&main_r5fss0_core0_dma_memory_region>,
- <&main_r5fss0_core0_memory_region>;
-};
-
-&main_r5fss0_core1 {
- mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core1>;
- memory-region = <&main_r5fss0_core1_dma_memory_region>,
- <&main_r5fss0_core1_memory_region>;
-};
-
-&main_r5fss1_core0 {
- mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core0>;
- memory-region = <&main_r5fss1_core0_dma_memory_region>,
- <&main_r5fss1_core0_memory_region>;
-};
-
-&main_r5fss1_core1 {
- mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core1>;
- memory-region = <&main_r5fss1_core1_dma_memory_region>,
- <&main_r5fss1_core1_memory_region>;
-};
-
-&ospi0 {
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&ospi0_pins_default>;
-
- flash@0 {
- compatible = "jedec,spi-nor";
- reg = <0x0>;
- spi-tx-bus-width = <8>;
- spi-rx-bus-width = <8>;
- spi-max-frequency = <25000000>;
- cdns,tshsl-ns = <60>;
- cdns,tsd2d-ns = <60>;
- cdns,tchsh-ns = <60>;
- cdns,tslch-ns = <60>;
- cdns,read-delay = <0>;
- };
-};
-
-&sdhci0 {
- status = "okay";
- bus-width = <8>;
- non-removable;
- ti,driver-strength-ohm = <50>;
- disable-wp;
- keep-power-in-suspend;
-};
diff --git a/arch/arm/dts/k3-am642-evm-u-boot.dtsi b/arch/arm/dts/k3-am642-evm-u-boot.dtsi
index ee66567..705b3ba 100644
--- a/arch/arm/dts/k3-am642-evm-u-boot.dtsi
+++ b/arch/arm/dts/k3-am642-evm-u-boot.dtsi
@@ -23,13 +23,6 @@
bootph-all;
};
-&dmsc {
- k3_sysreset: sysreset-controller {
- compatible = "ti,sci-sysreset";
- bootph-all;
- };
-};
-
&sdhci0 {
bootph-all;
};
diff --git a/arch/arm/dts/k3-am642-phyboard-electra-rdk-u-boot.dtsi b/arch/arm/dts/k3-am642-phyboard-electra-rdk-u-boot.dtsi
index 5dfc40a..4677c35 100644
--- a/arch/arm/dts/k3-am642-phyboard-electra-rdk-u-boot.dtsi
+++ b/arch/arm/dts/k3-am642-phyboard-electra-rdk-u-boot.dtsi
@@ -29,10 +29,6 @@
&dmsc {
bootph-all;
- k3_sysreset: sysreset-controller {
- compatible = "ti,sci-sysreset";
- bootph-all;
- };
};
&dmss {
diff --git a/arch/arm/dts/k3-am642-phyboard-electra-rdk.dts b/arch/arm/dts/k3-am642-phyboard-electra-rdk.dts
deleted file mode 100644
index 53b64e5..0000000
--- a/arch/arm/dts/k3-am642-phyboard-electra-rdk.dts
+++ /dev/null
@@ -1,302 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Copyright (C) 2021 PHYTEC America, LLC - https://www.phytec.com
- * Author: Matt McKee <mmckee@phytec.com>
- *
- * Copyright (C) 2022 PHYTEC Messtechnik GmbH
- * Author: Wadim Egorov <w.egorov@phytec.de>
- *
- * Product homepage:
- * https://www.phytec.com/product/phyboard-am64x
- */
-
-/dts-v1/;
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/leds/common.h>
-#include <dt-bindings/leds/leds-pca9532.h>
-#include <dt-bindings/phy/phy.h>
-#include "k3-am642.dtsi"
-#include "k3-am64-phycore-som.dtsi"
-
-#include "k3-serdes.h"
-
-/ {
- compatible = "phytec,am642-phyboard-electra-rdk",
- "phytec,am64-phycore-som", "ti,am642";
- model = "PHYTEC phyBOARD-Electra-AM64x RDK";
-
- aliases {
- mmc1 = &sdhci1;
- serial2 = &main_uart0;
- serial3 = &main_uart1;
- };
-
- chosen {
- stdout-path = &main_uart0;
- };
-
- can_tc1: can-phy0 {
- compatible = "ti,tcan1042";
- pinctrl-names = "default";
- pinctrl-0 = <&can_tc1_pins_default>;
- #phy-cells = <0>;
- max-bitrate = <5000000>;
- standby-gpios = <&main_gpio0 32 GPIO_ACTIVE_HIGH>;
- };
-
- can_tc2: can-phy1 {
- compatible = "ti,tcan1042";
- pinctrl-names = "default";
- pinctrl-0 = <&can_tc2_pins_default>;
- #phy-cells = <0>;
- max-bitrate = <5000000>;
- standby-gpios = <&main_gpio0 35 GPIO_ACTIVE_HIGH>;
- };
-
- keys {
- compatible = "gpio-keys";
- autorepeat;
- pinctrl-names = "default";
- pinctrl-0 = <&gpio_keys_pins_default>;
-
- key-home {
- label = "home";
- linux,code = <KEY_HOME>;
- gpios = <&main_gpio0 17 GPIO_ACTIVE_HIGH>;
- };
-
- key-menu {
- label = "menu";
- linux,code = <KEY_MENU>;
- gpios = <&main_gpio0 21 GPIO_ACTIVE_HIGH>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
- pinctrl-names = "default";
- pinctrl-0 = <&leds_pins_default>, <&user_leds_pins_default>;
-
- led-1 {
- color = <LED_COLOR_ID_RED>;
- gpios = <&main_gpio0 15 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "mmc0";
- function = LED_FUNCTION_DISK;
- };
-
- led-2 {
- color = <LED_COLOR_ID_GREEN>;
- gpios = <&main_gpio0 16 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "mmc1";
- function = LED_FUNCTION_DISK;
- };
- };
-
- vcc_3v3_mmc: regulator-sd {
- /* TPS22963C */
- compatible = "regulator-fixed";
- regulator-name = "VCC_3V3_MMC";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-boot-on;
- regulator-always-on;
- };
-};
-
-&main_pmx0 {
- can_tc1_pins_default: can-tc1-default-pins {
- pinctrl-single,pins = <
- AM64X_IOPAD(0x0084, PIN_OUTPUT, 7) /* (P16) GPMC0_ADVn_ALE.GPIO0_32 */
- >;
- };
-
- can_tc2_pins_default: can-tc2-default-pins {
- pinctrl-single,pins = <
- AM64X_IOPAD(0x0090, PIN_OUTPUT, 7) /* (P17) GPMC0_BE0n_CLE.GPIO0_35 */
- >;
- };
-
- gpio_keys_pins_default: gpio-keys-default-pins {
- pinctrl-single,pins = <
- AM64X_IOPAD(0x0044, PIN_INPUT, 7) /* (T18) GPMC0_AD2.GPIO0_17 */
- AM64X_IOPAD(0x0054, PIN_INPUT, 7) /* (V20) GPMC0_AD6.GPIO0_21 */
- >;
- };
-
- main_i2c1_pins_default: main-i2c1-default-pins {
- pinctrl-single,pins = <
- AM64X_IOPAD(0x0268, PIN_INPUT, 0) /* (C18) I2C1_SCL */
- AM64X_IOPAD(0x026c, PIN_INPUT, 0) /* (B19) I2C1_SDA */
- >;
- };
-
- main_mcan0_pins_default: main-mcan0-default-pins {
- pinctrl-single,pins = <
- AM64X_IOPAD(0x0250, PIN_OUTPUT, 0) /* (A17) MCAN0_TX */
- AM64X_IOPAD(0x0254, PIN_INPUT, 0) /* (B17) MCAN0_RX */
- >;
- };
-
- main_mcan1_pins_default: main-mcan1-default-pins {
- pinctrl-single,pins = <
- AM64X_IOPAD(0x0258, PIN_OUTPUT, 0) /* (C17) MCAN1_TX */
- AM64X_IOPAD(0x025c, PIN_INPUT, 0) /* (D17) MCAN1_RX */
- >;
- };
-
- main_mmc1_pins_default: main-mmc1-default-pins {
- pinctrl-single,pins = <
- AM64X_IOPAD(0x027c, PIN_INPUT_PULLUP, 0) /* (K18) MMC1_DAT3 */
- AM64X_IOPAD(0x0280, PIN_INPUT_PULLUP, 0) /* (K19) MMC1_DAT2 */
- AM64X_IOPAD(0x0284, PIN_INPUT_PULLUP, 0) /* (L21) MMC1_DAT1 */
- AM64X_IOPAD(0x0288, PIN_INPUT_PULLUP, 0) /* (K21) MMC1_DAT0 */
- AM64X_IOPAD(0x028c, PIN_INPUT_PULLDOWN, 0) /* (L20) MMC1_CLK */
- AM64X_IOPAD(0x0290, PIN_INPUT, 0) /* MMC1_CLKLB */
- AM64X_IOPAD(0x0294, PIN_INPUT_PULLUP, 0) /* (J19) MMC1_CMD */
- AM64X_IOPAD(0x0298, PIN_INPUT_PULLUP, 0) /* (D19) MMC1_SDCD */
- >;
- };
-
- main_uart0_pins_default: main-uart0-default-pins {
- pinctrl-single,pins = <
- AM64X_IOPAD(0x0230, PIN_INPUT, 0) /* (D15) UART0_RXD */
- AM64X_IOPAD(0x0234, PIN_OUTPUT, 0) /* (C16) UART0_TXD */
- >;
- };
-
- main_uart1_pins_default: main-uart1-default-pins {
- pinctrl-single,pins = <
- AM64X_IOPAD(0x0248, PIN_INPUT, 0) /* (D16) UART1_CTSn */
- AM64X_IOPAD(0x024C, PIN_OUTPUT, 0) /* (E16) UART1_RTSn */
- AM64X_IOPAD(0x0240, PIN_INPUT, 0) /* (E15) UART1_RXD */
- AM64X_IOPAD(0x0244, PIN_OUTPUT, 0) /* (E14) UART1_TXD */
- >;
- };
-
- main_usb0_pins_default: main-usb0-default-pins {
- pinctrl-single,pins = <
- AM64X_IOPAD(0x02a8, PIN_OUTPUT, 0) /* (E19) USB0_DRVVBUS */
- >;
- };
-
- pcie_usb_sel_pins_default: pcie-usb-sel-default-pins {
- pinctrl-single,pins = <
- AM64X_IOPAD(0x017c, PIN_OUTPUT, 7) /* (T1) PRG0_PRU0_GPO7.GPIO1_7 */
- >;
- };
-
- pcie0_pins_default: pcie0-default-pins {
- pinctrl-single,pins = <
- AM64X_IOPAD(0x0098, PIN_OUTPUT, 7) /* (W19) GPMC0_WAIT0.GPIO0_37 */
- >;
- };
-
- user_leds_pins_default: user-leds-default-pins {
- pinctrl-single,pins = <
- AM64X_IOPAD(0x003c, PIN_OUTPUT, 7) /* (T20) GPMC0_AD0.GPIO0_15 */
- AM64X_IOPAD(0x0040, PIN_OUTPUT, 7) /* (U21) GPMC0_AD1.GPIO0_16 */
- >;
- };
-};
-
-&main_i2c1 {
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&main_i2c1_pins_default>;
- clock-frequency = <400000>;
-
- eeprom@51 {
- compatible = "atmel,24c02";
- pagesize = <16>;
- reg = <0x51>;
- };
-
- led-controller@62 {
- compatible = "nxp,pca9533";
- reg = <0x62>;
-
- led-3 {
- label = "red:user";
- type = <PCA9532_TYPE_LED>;
- };
-
- led-4 {
- label = "green:user";
- type = <PCA9532_TYPE_LED>;
- };
-
- led-5 {
- label = "blue:user";
- type = <PCA9532_TYPE_LED>;
- };
- };
-};
-
-&main_mcan0 {
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&main_mcan0_pins_default>;
- phys = <&can_tc1>;
-};
-
-&main_mcan1 {
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&main_mcan1_pins_default>;
- phys = <&can_tc2>;
-};
-
-&main_uart0 {
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&main_uart0_pins_default>;
- current-speed = <115200>;
-};
-
-&main_uart1 {
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&main_uart1_pins_default>;
- uart-has-rtscts;
- current-speed = <115200>;
-};
-
-&sdhci1 {
- status = "okay";
- vmmc-supply = <&vcc_3v3_mmc>;
- pinctrl-names = "default";
- pinctrl-0 = <&main_mmc1_pins_default>;
- bus-width = <4>;
- ti,driver-strength-ohm = <50>;
- disable-wp;
- no-1-8-v;
-};
-
-&serdes0 {
- serdes0_pcie_usb_link: phy@0 {
- reg = <0>;
- cdns,num-lanes = <1>;
- #phy-cells = <0>;
- cdns,phy-type = <PHY_TYPE_USB3>;
- resets = <&serdes_wiz0 1>;
- };
-};
-
-&serdes_ln_ctrl {
- idle-states = <AM64_SERDES0_LANE0_USB>;
-};
-
-&usbss0 {
- ti,vbus-divider;
-};
-
-&usb0 {
- pinctrl-names = "default";
- pinctrl-0 = <&main_usb0_pins_default>;
- dr_mode = "host";
- maximum-speed = "super-speed";
- phys = <&serdes0_pcie_usb_link>;
- phy-names = "cdns3,usb3-phy";
-};
diff --git a/arch/arm/dts/k3-am642-phycore-som-binman.dtsi b/arch/arm/dts/k3-am642-phycore-som-binman.dtsi
index 79783aa..dd09670 100644
--- a/arch/arm/dts/k3-am642-phycore-som-binman.dtsi
+++ b/arch/arm/dts/k3-am642-phycore-som-binman.dtsi
@@ -121,7 +121,7 @@
#endif
#ifdef CONFIG_TARGET_PHYCORE_AM64X_A53
-#define SPL_AM642_PHYBOARD_ELECTRA_DTB "spl/dts/k3-am642-phyboard-electra-rdk.dtb"
+#define SPL_AM642_PHYBOARD_ELECTRA_DTB "spl/dts/ti/k3-am642-phyboard-electra-rdk.dtb"
#define AM642_PHYBOARD_ELECTRA_DTB "u-boot.dtb"
&binman {
@@ -289,10 +289,6 @@
#ifdef CONFIG_TARGET_PHYCORE_AM64X_A53
-#define SPL_AM642_PHYBOARD_ELECTRA_DTB "spl/dts/k3-am642-phyboard-electra-rdk.dtb"
-
-#define AM642_PHYBOARD_ELECTRA_DTB "u-boot.dtb"
-
&binman {
ti-spl {
insert-template = <&ti_spl_template>;
diff --git a/arch/arm/dts/k3-am642-sk-u-boot.dtsi b/arch/arm/dts/k3-am642-sk-u-boot.dtsi
index 7e6b298..6fcb11b 100644
--- a/arch/arm/dts/k3-am642-sk-u-boot.dtsi
+++ b/arch/arm/dts/k3-am642-sk-u-boot.dtsi
@@ -15,13 +15,6 @@
clock-frequency = <200000000>;
};
-&dmsc {
- k3_sysreset: sysreset-controller {
- compatible = "ti,sci-sysreset";
- bootph-all;
- };
-};
-
&sdhci0 {
status = "disabled";
};
diff --git a/arch/arm/dts/k3-am65-iot2050-common-u-boot.dtsi b/arch/arm/dts/k3-am65-iot2050-common-u-boot.dtsi
index d53f133..b6d2c81 100644
--- a/arch/arm/dts/k3-am65-iot2050-common-u-boot.dtsi
+++ b/arch/arm/dts/k3-am65-iot2050-common-u-boot.dtsi
@@ -99,10 +99,6 @@
&dmsc {
bootph-all;
- k3_sysreset: sysreset-controller {
- compatible = "ti,sci-sysreset";
- bootph-all;
- };
};
&k3_pds {
diff --git a/arch/arm/dts/k3-am654-icssg2.dtso b/arch/arm/dts/k3-am654-icssg2.dtso
new file mode 100644
index 0000000..faefa2f
--- /dev/null
+++ b/arch/arm/dts/k3-am654-icssg2.dtso
@@ -0,0 +1,145 @@
+// SPDX-License-Identifier: GPL-2.0
+/**
+ * DT overlay for enabling ICSSG2 on AM654 EVM
+ *
+ * Copyright (C) 2018-2023 Texas Instruments Incorporated - https://www.ti.com/
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/net/ti-dp83867.h>
+#include "k3-pinctrl.h"
+
+&{/} {
+ aliases {
+ ethernet1 = "/icssg2-eth/ethernet-ports/port@0";
+ ethernet2 = "/icssg2-eth/ethernet-ports/port@1";
+ };
+
+ /* Ethernet node on PRU-ICSSG2 */
+ icssg2_eth: icssg2-eth {
+ compatible = "ti,am654-icssg-prueth";
+ pinctrl-names = "default";
+ pinctrl-0 = <&icssg2_rgmii_pins_default>;
+ sram = <&msmc_ram>;
+ ti,prus = <&pru2_0>, <&rtu2_0>, <&tx_pru2_0>,
+ <&pru2_1>, <&rtu2_1>, <&tx_pru2_1>;
+ firmware-name = "ti-pruss/am65x-sr2-pru0-prueth-fw.elf",
+ "ti-pruss/am65x-sr2-rtu0-prueth-fw.elf",
+ "ti-pruss/am65x-sr2-txpru0-prueth-fw.elf",
+ "ti-pruss/am65x-sr2-pru1-prueth-fw.elf",
+ "ti-pruss/am65x-sr2-rtu1-prueth-fw.elf",
+ "ti-pruss/am65x-sr2-txpru1-prueth-fw.elf";
+
+ ti,pruss-gp-mux-sel = <2>, /* MII mode */
+ <2>,
+ <2>,
+ <2>, /* MII mode */
+ <2>,
+ <2>;
+
+ ti,mii-g-rt = <&icssg2_mii_g_rt>;
+ ti,mii-rt = <&icssg2_mii_rt>;
+ ti,iep = <&icssg2_iep0>, <&icssg2_iep1>;
+
+ interrupt-parent = <&icssg2_intc>;
+ interrupts = <24 0 2>, <25 1 3>;
+ interrupt-names = "tx_ts0", "tx_ts1";
+
+ dmas = <&main_udmap 0xc300>, /* egress slice 0 */
+ <&main_udmap 0xc301>, /* egress slice 0 */
+ <&main_udmap 0xc302>, /* egress slice 0 */
+ <&main_udmap 0xc303>, /* egress slice 0 */
+ <&main_udmap 0xc304>, /* egress slice 1 */
+ <&main_udmap 0xc305>, /* egress slice 1 */
+ <&main_udmap 0xc306>, /* egress slice 1 */
+ <&main_udmap 0xc307>, /* egress slice 1 */
+ <&main_udmap 0x4300>, /* ingress slice 0 */
+ <&main_udmap 0x4301>; /* ingress slice 1 */
+
+ dma-names = "tx0-0", "tx0-1", "tx0-2", "tx0-3",
+ "tx1-0", "tx1-1", "tx1-2", "tx1-3",
+ "rx0", "rx1";
+ ethernet-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ icssg2_emac0: port@0 {
+ reg = <0>;
+ phy-handle = <&icssg2_phy0>;
+ phy-mode = "rgmii-id";
+ ti,syscon-rgmii-delay = <&scm_conf 0x4120>;
+ /* Filled in by bootloader */
+ local-mac-address = [00 00 00 00 00 00];
+ };
+ icssg2_emac1: port@1 {
+ reg = <1>;
+ phy-handle = <&icssg2_phy1>;
+ phy-mode = "rgmii-id";
+ ti,syscon-rgmii-delay = <&scm_conf 0x4124>;
+ /* Filled in by bootloader */
+ local-mac-address = [00 00 00 00 00 00];
+ };
+ };
+ };
+};
+
+&main_pmx0 {
+
+ icssg2_mdio_pins_default: icssg2-mdio-default-pins {
+ pinctrl-single,pins = <
+ AM65X_IOPAD(0x0094, PIN_INPUT, 2) /* (AC19) PRG2_PRU0_GPO7.PRG2_MDIO0_MDIO */
+ AM65X_IOPAD(0x00c8, PIN_OUTPUT, 2) /* (AE15) PRG2_PRU1_GPO7.PRG2_MDIO0_MDC */
+ >;
+ };
+
+ icssg2_rgmii_pins_default: icssg2-rgmii-default-pins {
+ pinctrl-single,pins = <
+ AM65X_IOPAD(0x00ac, PIN_INPUT, 2) /* (AH15) PRG2_PRU1_GPO0.PRG2_RGMII2_RD0 */
+ AM65X_IOPAD(0x00b0, PIN_INPUT, 2) /* (AC16) PRG2_PRU1_GPO1.PRG2_RGMII2_RD1 */
+ AM65X_IOPAD(0x00b4, PIN_INPUT, 2) /* (AD17) PRG2_PRU1_GPO2.PRG2_RGMII2_RD2 */
+ AM65X_IOPAD(0x00b8, PIN_INPUT, 2) /* (AH14) PRG2_PRU1_GPO3.PRG2_RGMII2_RD3 */
+ AM65X_IOPAD(0x00cc, PIN_OUTPUT, 2) /* (AD15) PRG2_PRU1_GPO8.PRG2_RGMII2_TD0 */
+ AM65X_IOPAD(0x00d0, PIN_OUTPUT, 2) /* (AF14) PRG2_PRU1_GPO9.PRG2_RGMII2_TD1 */
+ AM65X_IOPAD(0x00d4, PIN_OUTPUT, 2) /* (AC15) PRG2_PRU1_GPO10.PRG2_RGMII2_TD2 */
+ AM65X_IOPAD(0x00d8, PIN_OUTPUT, 2) /* (AD14) PRG2_PRU1_GPO11.PRG2_RGMII2_TD3 */
+ AM65X_IOPAD(0x00dc, PIN_INPUT, 2) /* (AE14) PRG2_PRU1_GPO16.PRG2_RGMII2_TXC */
+ AM65X_IOPAD(0x00c4, PIN_OUTPUT, 2) /* (AC17) PRG2_PRU1_GPO6.PRG2_RGMII2_TX_CTL */
+ AM65X_IOPAD(0x00c0, PIN_INPUT, 2) /* (AG15) PRG2_PRU1_GPO5.PRG2_RGMII2_RXC */
+ AM65X_IOPAD(0x00bc, PIN_INPUT, 2) /* (AG14) PRG2_PRU1_GPO4.PRG2_RGMII2_RX_CTL */
+
+ AM65X_IOPAD(0x0078, PIN_INPUT, 2) /* (AF18) PRG2_PRU0_GPO0.PRG2_RGMII1_RD0 */
+ AM65X_IOPAD(0x007c, PIN_INPUT, 2) /* (AE18) PRG2_PRU0_GPO1.PRG2_RGMII1_RD1 */
+ AM65X_IOPAD(0x0080, PIN_INPUT, 2) /* (AH17) PRG2_PRU0_GPO2.PRG2_RGMII1_RD2 */
+ AM65X_IOPAD(0x0084, PIN_INPUT, 2) /* (AG18) PRG2_PRU0_GPO3.PRG2_RGMII1_RD3 */
+ AM65X_IOPAD(0x0098, PIN_OUTPUT, 2) /* (AH16) PRG2_PRU0_GPO8.PRG2_RGMII1_TD0 */
+ AM65X_IOPAD(0x009c, PIN_OUTPUT, 2) /* (AG16) PRG2_PRU0_GPO9.PRG2_RGMII1_TD1 */
+ AM65X_IOPAD(0x00a0, PIN_OUTPUT, 2) /* (AF16) PRG2_PRU0_GPO10.PRG2_RGMII1_TD2 */
+ AM65X_IOPAD(0x00a4, PIN_OUTPUT, 2) /* (AE16) PRG2_PRU0_GPO11.PRG2_RGMII1_TD3 */
+ AM65X_IOPAD(0x00a8, PIN_INPUT, 2) /* (AD16) PRG2_PRU0_GPO16.PRG2_RGMII1_TXC */
+ AM65X_IOPAD(0x0090, PIN_OUTPUT, 2) /* (AE17) PRG2_PRU0_GPO6.PRG2_RGMII1_TX_CTL */
+ AM65X_IOPAD(0x008c, PIN_INPUT, 2) /* (AF17) PRG2_PRU0_GPO5.PRG2_RGMII1_RXC */
+ AM65X_IOPAD(0x0088, PIN_INPUT, 2) /* (AG17) PRG2_PRU0_GPO4.PRG2_RGMII1_RX_CTL */
+ >;
+ };
+};
+
+&icssg2_mdio {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&icssg2_mdio_pins_default>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ icssg2_phy0: ethernet-phy@0 {
+ reg = <0>;
+ ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
+ ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
+ };
+
+ icssg2_phy1: ethernet-phy@3 {
+ reg = <3>;
+ ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
+ ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
+ };
+};
diff --git a/arch/arm/dts/k3-am65x-binman.dtsi b/arch/arm/dts/k3-am65x-binman.dtsi
index 8cc24da..d0cd488 100644
--- a/arch/arm/dts/k3-am65x-binman.dtsi
+++ b/arch/arm/dts/k3-am65x-binman.dtsi
@@ -98,6 +98,8 @@
#define SPL_AM654_EVM_DTB "spl/dts/k3-am654-base-board.dtb"
#define AM654_EVM_DTB "u-boot.dtb"
+#define AM654_EVM_ICSSG2_DTBO "arch/arm/dts/k3-am654-icssg2.dtbo"
+
&binman {
ti-spl {
insert-template = <&ti_spl_template>;
@@ -124,6 +126,20 @@
filename = SPL_AM654_EVM_DTB;
};
};
+
+ fdt-1 {
+ description = "k3-am654-icssg2 overlay";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ ti-secure {
+ content = <&spl_am65x_evm_icssg2_dtb>;
+ keyfile = "custMpk.pem";
+ };
+ spl_am65x_evm_icssg2_dtb: blob-ext {
+ filename = AM654_EVM_ICSSG2_DTBO;
+ };
+ };
};
configurations {
@@ -133,7 +149,7 @@
description = "k3-am654-base-board";
firmware = "atf";
loadables = "tee", "dm", "spl";
- fdt = "fdt-0";
+ fdt = "fdt-0", "fdt-1";
};
};
};
@@ -168,6 +184,24 @@
};
};
+ fdt-1 {
+ description = "k3-am654-icssg2 overlay";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ ti-secure {
+ content = <&am65x_evm_icssg2_dtb>;
+ keyfile = "custMpk.pem";
+
+ };
+ am65x_evm_icssg2_dtb: blob-ext {
+ filename = AM654_EVM_ICSSG2_DTBO;
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
+
};
configurations {
@@ -177,7 +211,7 @@
description = "k3-am654-base-board";
firmware = "uboot";
loadables = "uboot";
- fdt = "fdt-0";
+ fdt = "fdt-0", "fdt-1";
};
};
};
@@ -205,6 +239,16 @@
filename = SPL_AM654_EVM_DTB;
};
};
+
+ fdt-1 {
+ description = "k3-am654-icssg2 overlay";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ blob {
+ filename = AM654_EVM_ICSSG2_DTBO;
+ };
+ };
};
configurations {
@@ -214,7 +258,7 @@
description = "k3-am654-base-board";
firmware = "atf";
loadables = "tee", "dm", "spl";
- fdt = "fdt-0";
+ fdt = "fdt-0", "fdt-1";
};
};
};
@@ -243,6 +287,19 @@
algo = "crc32";
};
};
+
+ fdt-1 {
+ description = "k3-am654-icssg2";
+ type = "flat_dt";
+ arch = "arm";
+ compression = "none";
+ blob {
+ filename = AM654_EVM_ICSSG2_DTBO;
+ };
+ hash {
+ algo = "crc32";
+ };
+ };
};
configurations {
@@ -252,7 +309,7 @@
description = "k3-am654-base-board";
firmware = "uboot";
loadables = "uboot";
- fdt = "fdt-0";
+ fdt = "fdt-0", "fdt-1";
};
};
};
diff --git a/arch/arm/dts/k3-am68-sk-base-board-u-boot.dtsi b/arch/arm/dts/k3-am68-sk-base-board-u-boot.dtsi
index 4f34347..b8fc62f 100644
--- a/arch/arm/dts/k3-am68-sk-base-board-u-boot.dtsi
+++ b/arch/arm/dts/k3-am68-sk-base-board-u-boot.dtsi
@@ -51,10 +51,6 @@
&sms {
bootph-all;
- k3_sysreset: sysreset-controller {
- compatible = "ti,sci-sysreset";
- bootph-all;
- };
};
&main_pmx0 {
diff --git a/arch/arm/dts/k3-am69-sk-u-boot.dtsi b/arch/arm/dts/k3-am69-sk-u-boot.dtsi
index bed330e..4a82d2f 100644
--- a/arch/arm/dts/k3-am69-sk-u-boot.dtsi
+++ b/arch/arm/dts/k3-am69-sk-u-boot.dtsi
@@ -23,13 +23,6 @@
bootph-pre-ram;
};
-&sms {
- k3_sysreset: sysreset-controller {
- compatible = "ti,sci-sysreset";
- bootph-pre-ram;
- };
-};
-
#ifdef CONFIG_TARGET_J784S4_A72_EVM
#define SPL_AM69_SK_DTB "spl/dts/ti/k3-am69-sk.dtb"
diff --git a/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi b/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi
index c9fee0e..485f17c 100644
--- a/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi
+++ b/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi
@@ -57,10 +57,6 @@
&dmsc {
bootph-all;
- k3_sysreset: sysreset-controller {
- compatible = "ti,sci-sysreset";
- bootph-all;
- };
};
&k3_pds {
diff --git a/arch/arm/dts/k3-j721e-beagleboneai64-u-boot.dtsi b/arch/arm/dts/k3-j721e-beagleboneai64-u-boot.dtsi
index 116ee37..e202ae1 100644
--- a/arch/arm/dts/k3-j721e-beagleboneai64-u-boot.dtsi
+++ b/arch/arm/dts/k3-j721e-beagleboneai64-u-boot.dtsi
@@ -92,10 +92,6 @@
&dmsc {
bootph-all;
- k3_sysreset: sysreset-controller {
- compatible = "ti,sci-sysreset";
- bootph-all;
- };
};
&k3_pds {
diff --git a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
index 9433f3b..aa919b4 100644
--- a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
+++ b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
@@ -47,10 +47,6 @@
&dmsc {
bootph-all;
- k3_sysreset: sysreset-controller {
- compatible = "ti,sci-sysreset";
- bootph-all;
- };
};
&k3_pds {
diff --git a/arch/arm/dts/k3-j721e-sk-u-boot.dtsi b/arch/arm/dts/k3-j721e-sk-u-boot.dtsi
index 8b20555..8f4f944 100644
--- a/arch/arm/dts/k3-j721e-sk-u-boot.dtsi
+++ b/arch/arm/dts/k3-j721e-sk-u-boot.dtsi
@@ -47,10 +47,6 @@
&dmsc {
bootph-all;
- k3_sysreset: sysreset-controller {
- compatible = "ti,sci-sysreset";
- bootph-all;
- };
};
&k3_pds {
diff --git a/arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi b/arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi
index a3ebf59..19b2d48 100644
--- a/arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi
+++ b/arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi
@@ -51,10 +51,6 @@
&sms {
bootph-all;
- k3_sysreset: sysreset-controller {
- compatible = "ti,sci-sysreset";
- bootph-all;
- };
};
&main_pmx0 {
diff --git a/arch/arm/dts/k3-j784s4-evm-u-boot.dtsi b/arch/arm/dts/k3-j784s4-evm-u-boot.dtsi
index ac74978..8f03073 100644
--- a/arch/arm/dts/k3-j784s4-evm-u-boot.dtsi
+++ b/arch/arm/dts/k3-j784s4-evm-u-boot.dtsi
@@ -22,10 +22,3 @@
"tchanrt", "rflow";
bootph-pre-ram;
};
-
-&sms {
- k3_sysreset: sysreset-controller {
- compatible = "ti,sci-sysreset";
- bootph-pre-ram;
- };
-};
diff --git a/arch/arm/dts/kirkwood-6192.dtsi b/arch/arm/dts/kirkwood-6192.dtsi
deleted file mode 100644
index 396bcba..0000000
--- a/arch/arm/dts/kirkwood-6192.dtsi
+++ /dev/null
@@ -1,88 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/ {
- mbus@f1000000 {
- pciec: pcie@82000000 {
- compatible = "marvell,kirkwood-pcie";
- status = "disabled";
- device_type = "pci";
-
- #address-cells = <3>;
- #size-cells = <2>;
-
- bus-range = <0x00 0xff>;
-
- ranges =
- <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000
- 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */
- 0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO */>;
-
- pcie0: pcie@1,0 {
- device_type = "pci";
- assigned-addresses = <0x82000800 0 0x00040000 0 0x2000>;
- reg = <0x0800 0 0 0 0>;
- #address-cells = <3>;
- #size-cells = <2>;
- #interrupt-cells = <1>;
- ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
- 0x81000000 0 0 0x81000000 0x1 0 1 0>;
- bus-range = <0x00 0xff>;
- interrupt-map-mask = <0 0 0 0>;
- interrupt-map = <0 0 0 0 &intc 9>;
- marvell,pcie-port = <0>;
- marvell,pcie-lane = <0>;
- clocks = <&gate_clk 2>;
- status = "disabled";
- };
- };
- };
-
- ocp@f1000000 {
- pinctrl: pin-controller@10000 {
- compatible = "marvell,88f6192-pinctrl";
-
- pmx_sata0: pmx-sata0 {
- marvell,pins = "mpp5", "mpp21", "mpp23";
- marvell,function = "sata0";
- };
- pmx_sata1: pmx-sata1 {
- marvell,pins = "mpp4", "mpp20", "mpp22";
- marvell,function = "sata1";
- };
- pmx_sdio: pmx-sdio {
- marvell,pins = "mpp12", "mpp13", "mpp14",
- "mpp15", "mpp16", "mpp17";
- marvell,function = "sdio";
- };
- };
-
- rtc: rtc@10300 {
- compatible = "marvell,kirkwood-rtc", "marvell,orion-rtc";
- reg = <0x10300 0x20>;
- interrupts = <53>;
- clocks = <&gate_clk 7>;
- };
-
- sata: sata@80000 {
- compatible = "marvell,orion-sata";
- reg = <0x80000 0x5000>;
- interrupts = <21>;
- clocks = <&gate_clk 14>, <&gate_clk 15>;
- clock-names = "0", "1";
- phys = <&sata_phy0>, <&sata_phy1>;
- phy-names = "port0", "port1";
- status = "disabled";
- };
-
- sdio: mvsdio@90000 {
- compatible = "marvell,orion-sdio";
- reg = <0x90000 0x200>;
- interrupts = <28>;
- clocks = <&gate_clk 4>;
- bus-width = <4>;
- cap-sdio-irq;
- cap-sd-highspeed;
- cap-mmc-highspeed;
- status = "disabled";
- };
- };
-};
diff --git a/arch/arm/dts/kirkwood-6281.dtsi b/arch/arm/dts/kirkwood-6281.dtsi
deleted file mode 100644
index faa0584..0000000
--- a/arch/arm/dts/kirkwood-6281.dtsi
+++ /dev/null
@@ -1,90 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/ {
- mbus@f1000000 {
- pciec: pcie@82000000 {
- compatible = "marvell,kirkwood-pcie";
- status = "disabled";
- device_type = "pci";
-
- #address-cells = <3>;
- #size-cells = <2>;
-
- bus-range = <0x00 0xff>;
-
- ranges =
- <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000
- 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */
- 0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO */>;
-
- pcie0: pcie@1,0 {
- device_type = "pci";
- assigned-addresses = <0x82000800 0 0x00040000 0 0x2000>;
- reg = <0x0800 0 0 0 0>;
- #address-cells = <3>;
- #size-cells = <2>;
- #interrupt-cells = <1>;
- ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
- 0x81000000 0 0 0x81000000 0x1 0 1 0>;
- bus-range = <0x00 0xff>;
- interrupt-map-mask = <0 0 0 0>;
- interrupt-map = <0 0 0 0 &intc 9>;
- marvell,pcie-port = <0>;
- marvell,pcie-lane = <0>;
- clocks = <&gate_clk 2>;
- status = "disabled";
- };
- };
- };
-
- ocp@f1000000 {
- pinctrl: pin-controller@10000 {
- compatible = "marvell,88f6281-pinctrl";
-
- pmx_sata0: pmx-sata0 {
- marvell,pins = "mpp5", "mpp21", "mpp23";
- marvell,function = "sata0";
- };
- pmx_sata1: pmx-sata1 {
- marvell,pins = "mpp4", "mpp20", "mpp22";
- marvell,function = "sata1";
- };
- pmx_sdio: pmx-sdio {
- marvell,pins = "mpp12", "mpp13", "mpp14",
- "mpp15", "mpp16", "mpp17";
- marvell,function = "sdio";
- };
- };
-
- rtc: rtc@10300 {
- compatible = "marvell,kirkwood-rtc", "marvell,orion-rtc";
- reg = <0x10300 0x20>;
- interrupts = <53>;
- clocks = <&gate_clk 7>;
- };
-
- sata: sata@80000 {
- compatible = "marvell,orion-sata";
- reg = <0x80000 0x5000>;
- interrupts = <21>;
- clocks = <&gate_clk 14>, <&gate_clk 15>;
- clock-names = "0", "1";
- phys = <&sata_phy0>, <&sata_phy1>;
- phy-names = "port0", "port1";
- status = "disabled";
- };
-
- sdio: mvsdio@90000 {
- compatible = "marvell,orion-sdio";
- reg = <0x90000 0x200>;
- interrupts = <28>;
- clocks = <&gate_clk 4>;
- pinctrl-0 = <&pmx_sdio>;
- pinctrl-names = "default";
- bus-width = <4>;
- cap-sdio-irq;
- cap-sd-highspeed;
- cap-mmc-highspeed;
- status = "disabled";
- };
- };
-};
diff --git a/arch/arm/dts/kirkwood-6282.dtsi b/arch/arm/dts/kirkwood-6282.dtsi
deleted file mode 100644
index e732c50..0000000
--- a/arch/arm/dts/kirkwood-6282.dtsi
+++ /dev/null
@@ -1,161 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/ {
- mbus@f1000000 {
- pciec: pcie@82000000 {
- compatible = "marvell,kirkwood-pcie";
- status = "disabled";
- device_type = "pci";
-
- #address-cells = <3>;
- #size-cells = <2>;
-
- bus-range = <0x00 0xff>;
-
- ranges =
- <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000
- 0x82000000 0 0x44000 MBUS_ID(0xf0, 0x01) 0x44000 0 0x00002000
- 0x82000000 0 0x80000 MBUS_ID(0xf0, 0x01) 0x80000 0 0x00002000
- 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */
- 0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO */
- 0x82000000 0x2 0 MBUS_ID(0x04, 0xd8) 0 1 0 /* Port 1.0 MEM */
- 0x81000000 0x2 0 MBUS_ID(0x04, 0xd0) 0 1 0 /* Port 1.0 IO */>;
-
- pcie0: pcie@1,0 {
- device_type = "pci";
- assigned-addresses = <0x82000800 0 0x00040000 0 0x2000>;
- reg = <0x0800 0 0 0 0>;
- #address-cells = <3>;
- #size-cells = <2>;
- #interrupt-cells = <1>;
- ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
- 0x81000000 0 0 0x81000000 0x1 0 1 0>;
- bus-range = <0x00 0xff>;
- interrupt-names = "intx", "error";
- interrupts = <9>, <44>;
- interrupt-map-mask = <0 0 0 7>;
- interrupt-map = <0 0 0 1 &pcie0_intc 0>,
- <0 0 0 2 &pcie0_intc 1>,
- <0 0 0 3 &pcie0_intc 2>,
- <0 0 0 4 &pcie0_intc 3>;
- marvell,pcie-port = <0>;
- marvell,pcie-lane = <0>;
- clocks = <&gate_clk 2>;
- status = "disabled";
-
- pcie0_intc: interrupt-controller {
- interrupt-controller;
- #interrupt-cells = <1>;
- };
- };
-
- pcie1: pcie@2,0 {
- device_type = "pci";
- assigned-addresses = <0x82001000 0 0x00044000 0 0x2000>;
- reg = <0x1000 0 0 0 0>;
- #address-cells = <3>;
- #size-cells = <2>;
- #interrupt-cells = <1>;
- ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
- 0x81000000 0 0 0x81000000 0x2 0 1 0>;
- bus-range = <0x00 0xff>;
- interrupt-names = "intx", "error";
- interrupts = <10>, <45>;
- interrupt-map-mask = <0 0 0 7>;
- interrupt-map = <0 0 0 1 &pcie1_intc 0>,
- <0 0 0 2 &pcie1_intc 1>,
- <0 0 0 3 &pcie1_intc 2>,
- <0 0 0 4 &pcie1_intc 3>;
- marvell,pcie-port = <1>;
- marvell,pcie-lane = <0>;
- clocks = <&gate_clk 18>;
- status = "disabled";
-
- pcie1_intc: interrupt-controller {
- interrupt-controller;
- #interrupt-cells = <1>;
- };
- };
- };
- };
- ocp@f1000000 {
-
- pinctrl: pin-controller@10000 {
- compatible = "marvell,88f6282-pinctrl";
-
- pmx_sata0: pmx-sata0 {
- marvell,pins = "mpp5", "mpp21", "mpp23";
- marvell,function = "sata0";
- };
- pmx_sata1: pmx-sata1 {
- marvell,pins = "mpp4", "mpp20", "mpp22";
- marvell,function = "sata1";
- };
-
- /*
- * Default I2C1 pinctrl setting on mpp36/mpp37,
- * overwrite marvell,pins on board level if required.
- */
- pmx_twsi1: pmx-twsi1 {
- marvell,pins = "mpp36", "mpp37";
- marvell,function = "twsi1";
- };
-
- pmx_sdio: pmx-sdio {
- marvell,pins = "mpp12", "mpp13", "mpp14",
- "mpp15", "mpp16", "mpp17";
- marvell,function = "sdio";
- };
- };
-
- thermal: thermal@10078 {
- compatible = "marvell,kirkwood-thermal";
- reg = <0x10078 0x4>;
- status = "okay";
- };
-
- rtc: rtc@10300 {
- compatible = "marvell,kirkwood-rtc", "marvell,orion-rtc";
- reg = <0x10300 0x20>;
- interrupts = <53>;
- clocks = <&gate_clk 7>;
- };
-
- i2c1: i2c@11100 {
- compatible = "marvell,mv64xxx-i2c";
- reg = <0x11100 0x20>;
- #address-cells = <1>;
- #size-cells = <0>;
- interrupts = <32>;
- clock-frequency = <100000>;
- clocks = <&gate_clk 7>;
- pinctrl-0 = <&pmx_twsi1>;
- pinctrl-names = "default";
- status = "disabled";
- };
-
- sata: sata@80000 {
- compatible = "marvell,orion-sata";
- reg = <0x80000 0x5000>;
- interrupts = <21>;
- clocks = <&gate_clk 14>, <&gate_clk 15>;
- clock-names = "0", "1";
- phys = <&sata_phy0>, <&sata_phy1>;
- phy-names = "port0", "port1";
- status = "disabled";
- };
-
- sdio: mvsdio@90000 {
- compatible = "marvell,orion-sdio";
- reg = <0x90000 0x200>;
- interrupts = <28>;
- clocks = <&gate_clk 4>;
- pinctrl-0 = <&pmx_sdio>;
- pinctrl-names = "default";
- bus-width = <4>;
- cap-sdio-irq;
- cap-sd-highspeed;
- cap-mmc-highspeed;
- status = "disabled";
- };
- };
-};
diff --git a/arch/arm/dts/kirkwood-98dx4122.dtsi b/arch/arm/dts/kirkwood-98dx4122.dtsi
deleted file mode 100644
index 299c147..0000000
--- a/arch/arm/dts/kirkwood-98dx4122.dtsi
+++ /dev/null
@@ -1,53 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/ {
- mbus@f1000000 {
- pciec: pcie@82000000 {
- compatible = "marvell,kirkwood-pcie";
- status = "disabled";
- device_type = "pci";
-
- #address-cells = <3>;
- #size-cells = <2>;
-
- bus-range = <0x00 0xff>;
-
- ranges =
- <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000
- 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */
- 0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO */>;
-
- pcie0: pcie@1,0 {
- device_type = "pci";
- assigned-addresses = <0x82000800 0 0x00040000 0 0x2000>;
- reg = <0x0800 0 0 0 0>;
- #address-cells = <3>;
- #size-cells = <2>;
- #interrupt-cells = <1>;
- ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
- 0x81000000 0 0 0x81000000 0x1 0 1 0>;
- bus-range = <0x00 0xff>;
- interrupt-map-mask = <0 0 0 0>;
- interrupt-map = <0 0 0 0 &intc 9>;
- marvell,pcie-port = <0>;
- marvell,pcie-lane = <0>;
- clocks = <&gate_clk 2>;
- status = "disabled";
- };
- };
- };
-
- ocp@f1000000 {
- pinctrl: pin-controller@10000 {
- compatible = "marvell,98dx4122-pinctrl";
-
- };
- };
-};
-
-&sata_phy0 {
- status = "disabled";
-};
-
-&sata_phy1 {
- status = "disabled";
-};
diff --git a/arch/arm/dts/kirkwood-blackarmor-nas220.dts b/arch/arm/dts/kirkwood-blackarmor-nas220.dts
deleted file mode 100644
index 07fbfca..0000000
--- a/arch/arm/dts/kirkwood-blackarmor-nas220.dts
+++ /dev/null
@@ -1,172 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Device Tree file for Seagate Blackarmor NAS220
- *
- * Copyright (C) 2014 Evgeni Dobrev <evgeni@studio-punkt.com>
- */
-
-/dts-v1/;
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
-#include "kirkwood.dtsi"
-#include "kirkwood-6192.dtsi"
-
-/ {
- model = "Seagate Blackarmor NAS220";
- compatible = "seagate,blackarmor-nas220","marvell,kirkwood-88f6192",
- "marvell,kirkwood";
-
- memory { /* 128 MB */
- device_type = "memory";
- reg = <0x00000000 0x8000000>;
- };
-
- chosen {
- bootargs = "console=ttyS0,115200n8";
- stdout-path = &uart0;
- };
-
- gpio_poweroff {
- compatible = "gpio-poweroff";
- gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
- };
-
- gpio_keys {
- compatible = "gpio-keys";
-
- reset {
- label = "Reset";
- linux,code = <KEY_POWER>;
- gpios = <&gpio0 29 GPIO_ACTIVE_HIGH>;
- };
-
- button {
- label = "Power";
- linux,code = <KEY_SLEEP>;
- gpios = <&gpio0 26 GPIO_ACTIVE_LOW>;
- };
- };
-
- gpio-leds {
- compatible = "gpio-leds";
-
- blue-power {
- label = "nas220:blue:power";
- gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "default-on";
- };
- };
-
- regulators {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <0>;
- pinctrl-0 = <&pmx_power_sata0 &pmx_power_sata1>;
- pinctrl-names = "default";
-
- sata0_power: regulator@1 {
- compatible = "regulator-fixed";
- reg = <1>;
- regulator-name = "SATA0 Power";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- enable-active-high;
- regulator-always-on;
- regulator-boot-on;
- gpio = <&gpio0 24 GPIO_ACTIVE_LOW>;
- };
-
- sata1_power: regulator@2 {
- compatible = "regulator-fixed";
- reg = <2>;
- regulator-name = "SATA1 Power";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- enable-active-high;
- regulator-always-on;
- regulator-boot-on;
- gpio = <&gpio0 28 GPIO_ACTIVE_LOW>;
- };
- };
-};
-
-/*
- * Serial port routed to connector CN5
- *
- * pin 1 - TX (CPU's TX)
- * pin 4 - RX (CPU's RX)
- * pin 6 - GND
- */
-&uart0 {
- status = "okay";
-};
-
-&pinctrl {
- pinctrl-0 = <&pmx_button_reset &pmx_button_power>;
- pinctrl-names = "default";
-
- pmx_act_sata0: pmx-act-sata0 {
- marvell,pins = "mpp15";
- marvell,function = "sata0";
- };
-
- pmx_act_sata1: pmx-act-sata1 {
- marvell,pins = "mpp16";
- marvell,function = "sata1";
- };
-
- pmx_power_sata0: pmx-power-sata0 {
- marvell,pins = "mpp24";
- marvell,function = "gpio";
- };
-
- pmx_power_sata1: pmx-power-sata1 {
- marvell,pins = "mpp28";
- marvell,function = "gpio";
- };
-
- pmx_button_reset: pmx-button-reset {
- marvell,pins = "mpp29";
- marvell,function = "gpio";
- };
-
- pmx_button_power: pmx-button-power {
- marvell,pins = "mpp26";
- marvell,function = "gpio";
- };
-};
-
-&sata {
- status = "okay";
- nr-ports = <2>;
-};
-
-&i2c0 {
- status = "okay";
-
- adt7476: thermal@2e {
- compatible = "adi,adt7476";
- reg = <0x2e>;
- };
-};
-
-&nand {
- status = "okay";
-};
-
-&mdio {
- status = "okay";
-
- ethphy0: ethernet-phy@8 {
- reg = <8>;
- };
-};
-
-ð0 {
- status = "okay";
-
- ethernet0-port@0 {
- phy-handle = <ðphy0>;
- };
-};
diff --git a/arch/arm/dts/kirkwood-d2net.dts b/arch/arm/dts/kirkwood-d2net.dts
deleted file mode 100644
index bd3b266..0000000
--- a/arch/arm/dts/kirkwood-d2net.dts
+++ /dev/null
@@ -1,45 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Device Tree file for d2 Network v2
- *
- * Copyright (C) 2014 Simon Guinot <simon.guinot@sequanux.org>
- *
-*/
-
-/dts-v1/;
-
-#include <dt-bindings/leds/leds-ns2.h>
-#include "kirkwood-netxbig.dtsi"
-
-/ {
- model = "LaCie d2 Network v2";
- compatible = "lacie,d2net_v2", "lacie,netxbig", "marvell,kirkwood-88f6281", "marvell,kirkwood";
-
- memory {
- device_type = "memory";
- reg = <0x00000000 0x10000000>;
- };
-
- ns2-leds {
- compatible = "lacie,ns2-leds";
-
- blue-sata {
- label = "d2net_v2:blue:sata";
- slow-gpio = <&gpio0 29 GPIO_ACTIVE_HIGH>;
- cmd-gpio = <&gpio0 30 GPIO_ACTIVE_HIGH>;
- modes-map = <NS_V2_LED_OFF 1 0
- NS_V2_LED_ON 0 1
- NS_V2_LED_ON 1 1
- NS_V2_LED_SATA 0 0>;
- };
- };
-
- gpio-leds {
- compatible = "gpio-leds";
-
- red-fail {
- label = "d2net_v2:red:fail";
- gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>;
- };
- };
-};
diff --git a/arch/arm/dts/kirkwood-dns325.dts b/arch/arm/dts/kirkwood-dns325.dts
deleted file mode 100644
index 94d9c06..0000000
--- a/arch/arm/dts/kirkwood-dns325.dts
+++ /dev/null
@@ -1,63 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/dts-v1/;
-
-#include "kirkwood-dnskw.dtsi"
-
-/ {
- model = "D-Link DNS-325 NAS (Rev A1)";
- compatible = "dlink,dns-325-a1", "dlink,dns-325", "dlink,dns-kirkwood", "marvell,kirkwood-88f6281", "marvell,kirkwood";
-
- memory {
- device_type = "memory";
- reg = <0x00000000 0x10000000>;
- };
-
- chosen {
- bootargs = "console=ttyS0,115200n8 earlyprintk";
- stdout-path = &uart0;
- };
-
- gpio-leds {
- compatible = "gpio-leds";
- pinctrl-0 = <&pmx_led_power &pmx_led_red_usb_325
- &pmx_led_red_left_hdd &pmx_led_red_right_hdd
- &pmx_led_white_usb>;
- pinctrl-names = "default";
-
- white-power {
- label = "dns325:white:power";
- gpios = <&gpio0 26 GPIO_ACTIVE_LOW>;
- default-state = "keep";
- };
- white-usb {
- label = "dns325:white:usb";
- gpios = <&gpio1 11 GPIO_ACTIVE_LOW>; /* GPIO 43 */
- };
- red-l_hdd {
- label = "dns325:red:l_hdd";
- gpios = <&gpio0 28 GPIO_ACTIVE_LOW>;
- };
- red-r_hdd {
- label = "dns325:red:r_hdd";
- gpios = <&gpio0 27 GPIO_ACTIVE_LOW>;
- };
- red-usb {
- label = "dns325:red:usb";
- gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
- };
- };
-
- ocp@f1000000 {
- i2c@11000 {
- status = "okay";
-
- lm75: lm75@48 {
- compatible = "national,lm75";
- reg = <0x48>;
- };
- };
- serial@12000 {
- status = "okay";
- };
- };
-};
diff --git a/arch/arm/dts/kirkwood-dnskw.dtsi b/arch/arm/dts/kirkwood-dnskw.dtsi
deleted file mode 100644
index cbaf06f..0000000
--- a/arch/arm/dts/kirkwood-dnskw.dtsi
+++ /dev/null
@@ -1,235 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-#include "kirkwood.dtsi"
-#include "kirkwood-6281.dtsi"
-
-/ {
- model = "D-Link DNS NASes (kirkwood-based)";
- compatible = "dlink,dns-kirkwood", "marvell,kirkwood-88f6281", "marvell,kirkwood";
-
- gpio_keys {
- compatible = "gpio-keys";
- #address-cells = <1>;
- #size-cells = <0>;
- pinctrl-0 = <&pmx_button_power &pmx_button_unmount
- &pmx_button_reset>;
- pinctrl-names = "default";
-
- power {
- label = "Power button";
- linux,code = <KEY_POWER>;
- gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
- };
- eject {
- label = "USB unmount button";
- linux,code = <KEY_EJECTCD>;
- gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
- };
- reset {
- label = "Reset button";
- linux,code = <KEY_RESTART>;
- gpios = <&gpio1 16 GPIO_ACTIVE_LOW>;
- };
- };
-
- gpio_fan {
- /* Fan: ADDA AD045HB-G73 40mm 6000rpm@5v */
- compatible = "gpio-fan";
- pinctrl-0 = <&pmx_fan_high_speed &pmx_fan_low_speed>;
- pinctrl-names = "default";
- gpios = <&gpio1 14 GPIO_ACTIVE_LOW
- &gpio1 13 GPIO_ACTIVE_LOW>;
- gpio-fan,speed-map = <0 0
- 3000 1
- 6000 2>;
- };
-
- gpio_poweroff {
- compatible = "gpio-poweroff";
- pinctrl-0 = <&pmx_power_off>;
- pinctrl-names = "default";
- gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
- };
-
- ocp@f1000000 {
- pinctrl: pin-controller@10000 {
-
- pinctrl-0 = <&pmx_power_back_on &pmx_present_sata0
- &pmx_present_sata1 &pmx_fan_tacho
- &pmx_temp_alarm>;
- pinctrl-names = "default";
-
- pmx_sata0: pmx-sata0 {
- marvell,pins = "mpp20";
- marvell,function = "sata1";
- };
- pmx_sata1: pmx-sata1 {
- marvell,pins = "mpp21";
- marvell,function = "sata0";
- };
- pmx_led_power: pmx-led-power {
- marvell,pins = "mpp26";
- marvell,function = "gpio";
- };
- pmx_led_red_right_hdd: pmx-led-red-right-hdd {
- marvell,pins = "mpp27";
- marvell,function = "gpio";
- };
- pmx_led_red_left_hdd: pmx-led-red-left-hdd {
- marvell,pins = "mpp28";
- marvell,function = "gpio";
- };
- pmx_led_red_usb_325: pmx-led-red-usb-325 {
- marvell,pins = "mpp29";
- marvell,function = "gpio";
- };
- pmx_button_power: pmx-button-power {
- marvell,pins = "mpp34";
- marvell,function = "gpio";
- };
- pmx_led_red_usb_320: pmx-led-red-usb-320 {
- marvell,pins = "mpp35";
- marvell,function = "gpio";
- };
- pmx_power_off: pmx-power-off {
- marvell,pins = "mpp36";
- marvell,function = "gpio";
- };
- pmx_power_back_on: pmx-power-back-on {
- marvell,pins = "mpp37";
- marvell,function = "gpio";
- };
- pmx_power_sata0: pmx-power-sata0 {
- marvell,pins = "mpp39";
- marvell,function = "gpio";
- };
- pmx_power_sata1: pmx-power-sata1 {
- marvell,pins = "mpp40";
- marvell,function = "gpio";
- };
- pmx_present_sata0: pmx-present-sata0 {
- marvell,pins = "mpp41";
- marvell,function = "gpio";
- };
- pmx_present_sata1: pmx-present-sata1 {
- marvell,pins = "mpp42";
- marvell,function = "gpio";
- };
- pmx_led_white_usb: pmx-led-white-usb {
- marvell,pins = "mpp43";
- marvell,function = "gpio";
- };
- pmx_fan_tacho: pmx-fan-tacho {
- marvell,pins = "mpp44";
- marvell,function = "gpio";
- };
- pmx_fan_high_speed: pmx-fan-high-speed {
- marvell,pins = "mpp45";
- marvell,function = "gpio";
- };
- pmx_fan_low_speed: pmx-fan-low-speed {
- marvell,pins = "mpp46";
- marvell,function = "gpio";
- };
- pmx_button_unmount: pmx-button-unmount {
- marvell,pins = "mpp47";
- marvell,function = "gpio";
- };
- pmx_button_reset: pmx-button-reset {
- marvell,pins = "mpp48";
- marvell,function = "gpio";
- };
- pmx_temp_alarm: pmx-temp-alarm {
- marvell,pins = "mpp49";
- marvell,function = "gpio";
- };
- };
- sata@80000 {
- pinctrl-0 = <&pmx_sata0 &pmx_sata1>;
- pinctrl-names = "default";
- status = "okay";
- nr-ports = <2>;
- };
- };
-
- regulators {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <0>;
- pinctrl-0 = <&pmx_power_sata0 &pmx_power_sata1>;
- pinctrl-names = "default";
-
- sata0_power: regulator@1 {
- compatible = "regulator-fixed";
- reg = <1>;
- regulator-name = "SATA0 Power";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- enable-active-high;
- regulator-always-on;
- regulator-boot-on;
- gpio = <&gpio1 7 0>;
- };
- sata1_power: regulator@2 {
- compatible = "regulator-fixed";
- reg = <2>;
- regulator-name = "SATA1 Power";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- enable-active-high;
- regulator-always-on;
- regulator-boot-on;
- gpio = <&gpio1 8 0>;
- };
- };
-};
-
-&nand {
- status = "okay";
- chip-delay = <35>;
-
- partition@0 {
- label = "u-boot";
- reg = <0x0000000 0x100000>;
- read-only;
- };
-
- partition@100000 {
- label = "uImage";
- reg = <0x0100000 0x500000>;
- };
-
- partition@600000 {
- label = "ramdisk";
- reg = <0x0600000 0x500000>;
- };
-
- partition@b00000 {
- label = "image";
- reg = <0x0b00000 0x6600000>;
- };
-
- partition@7100000 {
- label = "mini firmware";
- reg = <0x7100000 0xa00000>;
- };
-
- partition@7b00000 {
- label = "config";
- reg = <0x7b00000 0x500000>;
- };
-};
-
-&mdio {
- status = "okay";
-
- ethphy0: ethernet-phy@8 {
- reg = <8>;
- };
-};
-
-ð0 {
- status = "okay";
- ethernet0-port@0 {
- phy-handle = <ðphy0>;
- };
-};
diff --git a/arch/arm/dts/kirkwood-dockstar.dts b/arch/arm/dts/kirkwood-dockstar.dts
deleted file mode 100644
index 6a3f1bf..0000000
--- a/arch/arm/dts/kirkwood-dockstar.dts
+++ /dev/null
@@ -1,110 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/dts-v1/;
-
-#include "kirkwood.dtsi"
-#include "kirkwood-6281.dtsi"
-
-/ {
- model = "Seagate FreeAgent Dockstar";
- compatible = "seagate,dockstar", "marvell,kirkwood-88f6281", "marvell,kirkwood";
-
- memory {
- device_type = "memory";
- reg = <0x00000000 0x8000000>;
- };
-
- chosen {
- bootargs = "console=ttyS0,115200n8 earlyprintk root=/dev/sda1 rootdelay=10";
- stdout-path = &uart0;
- };
-
- ocp@f1000000 {
- pinctrl: pin-controller@10000 {
- pmx_usb_power_enable: pmx-usb-power-enable {
- marvell,pins = "mpp29";
- marvell,function = "gpio";
- };
- pmx_led_green: pmx-led-green {
- marvell,pins = "mpp46";
- marvell,function = "gpio";
- };
- pmx_led_orange: pmx-led-orange {
- marvell,pins = "mpp47";
- marvell,function = "gpio";
- };
- };
- serial@12000 {
- status = "ok";
- };
- };
- gpio-leds {
- compatible = "gpio-leds";
- pinctrl-0 = <&pmx_led_green &pmx_led_orange>;
- pinctrl-names = "default";
-
- health {
- label = "status:green:health";
- gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
- default-state = "keep";
- };
- fault {
- label = "status:orange:fault";
- gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
- };
- };
- regulators {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <0>;
- pinctrl-0 = <&pmx_usb_power_enable>;
- pinctrl-names = "default";
-
- usb_power: regulator@1 {
- compatible = "regulator-fixed";
- reg = <1>;
- regulator-name = "USB Power";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- enable-active-high;
- regulator-always-on;
- regulator-boot-on;
- gpio = <&gpio0 29 0>;
- };
- };
-};
-
-&nand {
- status = "okay";
-
- partition@0 {
- label = "u-boot";
- reg = <0x0000000 0x100000>;
- read-only;
- };
-
- partition@100000 {
- label = "uImage";
- reg = <0x0100000 0x400000>;
- };
-
- partition@500000 {
- label = "data";
- reg = <0x0500000 0xfb00000>;
- };
-};
-
-&mdio {
- status = "okay";
-
- ethphy0: ethernet-phy@0 {
- compatible = "marvell,88e1116";
- reg = <0>;
- };
-};
-
-ð0 {
- status = "okay";
- ethernet0-port@0 {
- phy-handle = <ðphy0>;
- };
-};
diff --git a/arch/arm/dts/kirkwood-dreamplug-u-boot.dtsi b/arch/arm/dts/kirkwood-dreamplug-u-boot.dtsi
new file mode 100644
index 0000000..59f19a2
--- /dev/null
+++ b/arch/arm/dts/kirkwood-dreamplug-u-boot.dtsi
@@ -0,0 +1,7 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+/ {
+ aliases {
+ spi0 = &spi0;
+ };
+};
diff --git a/arch/arm/dts/kirkwood-dreamplug.dts b/arch/arm/dts/kirkwood-dreamplug.dts
deleted file mode 100644
index e9eea22..0000000
--- a/arch/arm/dts/kirkwood-dreamplug.dts
+++ /dev/null
@@ -1,131 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/dts-v1/;
-
-#include "kirkwood.dtsi"
-#include "kirkwood-6281.dtsi"
-
-/ {
- model = "Globalscale Technologies Dreamplug";
- compatible = "globalscale,dreamplug-003-ds2001", "globalscale,dreamplug", "marvell,kirkwood-88f6281", "marvell,kirkwood";
-
- memory {
- device_type = "memory";
- reg = <0x00000000 0x20000000>;
- };
-
- chosen {
- bootargs = "console=ttyS0,115200n8 earlyprintk";
- stdout-path = &uart0;
- };
-
- aliases {
- spi0 = &spi0;
- };
-
- ocp@f1000000 {
- pinctrl: pin-controller@10000 {
- pmx_led_bluetooth: pmx-led-bluetooth {
- marvell,pins = "mpp47";
- marvell,function = "gpio";
- };
- pmx_led_wifi: pmx-led-wifi {
- marvell,pins = "mpp48";
- marvell,function = "gpio";
- };
- pmx_led_wifi_ap: pmx-led-wifi-ap {
- marvell,pins = "mpp49";
- marvell,function = "gpio";
- };
- };
- serial@12000 {
- status = "ok";
- };
-
- spi@10600 {
- status = "okay";
-
- m25p40@0 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "mxicy,mx25l1606e", "jedec,spi-nor";
- reg = <0>;
- spi-max-frequency = <50000000>;
- mode = <0>;
-
- partition@0 {
- reg = <0x0 0x80000>;
- label = "u-boot";
- };
-
- partition@100000 {
- reg = <0x100000 0x10000>;
- label = "u-boot env";
- };
-
- partition@180000 {
- reg = <0x180000 0x10000>;
- label = "dtb";
- };
- };
- };
-
- sata@80000 {
- status = "okay";
- nr-ports = <1>;
- };
-
- mvsdio@90000 {
- pinctrl-0 = <&pmx_sdio>;
- pinctrl-names = "default";
- status = "okay";
- /* No CD or WP GPIOs */
- broken-cd;
- };
- };
-
- gpio-leds {
- compatible = "gpio-leds";
- pinctrl-0 = <&pmx_led_bluetooth &pmx_led_wifi
- &pmx_led_wifi_ap >;
- pinctrl-names = "default";
-
- bluetooth {
- label = "dreamplug:blue:bluetooth";
- gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
- };
- wifi {
- label = "dreamplug:green:wifi";
- gpios = <&gpio1 16 GPIO_ACTIVE_LOW>;
- };
- wifi-ap {
- label = "dreamplug:green:wifi_ap";
- gpios = <&gpio1 17 GPIO_ACTIVE_LOW>;
- };
- };
-};
-
-&mdio {
- status = "okay";
-
- ethphy0: ethernet-phy@0 {
- reg = <0>;
- };
-
- ethphy1: ethernet-phy@1 {
- reg = <1>;
- };
-};
-
-ð0 {
- status = "okay";
- ethernet0-port@0 {
- phy-handle = <ðphy0>;
- };
-};
-
-ð1 {
- status = "okay";
- ethernet1-port@0 {
- phy-handle = <ðphy1>;
- };
-};
diff --git a/arch/arm/dts/kirkwood-ds109.dts b/arch/arm/dts/kirkwood-ds109.dts
deleted file mode 100644
index 29982e7..0000000
--- a/arch/arm/dts/kirkwood-ds109.dts
+++ /dev/null
@@ -1,40 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Andrew Lunn <andrew@lunn.ch>
- * Ben Peddell <klightspeed@killerwolves.net>
- *
- */
-
-/dts-v1/;
-
-#include "kirkwood.dtsi"
-#include "kirkwood-6281.dtsi"
-#include "kirkwood-synology.dtsi"
-
-/ {
- model = "Synology DS109, DS110, DS110jv20";
- compatible = "synology,ds109", "synology,ds110jv20",
- "synology,ds110", "marvell,kirkwood";
-
- memory {
- device_type = "memory";
- reg = <0x00000000 0x8000000>;
- };
-
- chosen {
- bootargs = "console=ttyS0,115200n8";
- stdout-path = &uart0;
- };
-
- gpio-fan-150-32-35 {
- status = "okay";
- };
-
- gpio-leds-hdd-21-1 {
- status = "okay";
- };
-};
-
-&rs5c372 {
- status = "okay";
-};
diff --git a/arch/arm/dts/kirkwood-goflexnet.dts b/arch/arm/dts/kirkwood-goflexnet.dts
deleted file mode 100644
index 02d87e0..0000000
--- a/arch/arm/dts/kirkwood-goflexnet.dts
+++ /dev/null
@@ -1,190 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/dts-v1/;
-
-#include "kirkwood.dtsi"
-#include "kirkwood-6281.dtsi"
-
-/ {
- model = "Seagate GoFlex Net";
- compatible = "seagate,goflexnet", "marvell,kirkwood-88f6281", "marvell,kirkwood";
-
- memory {
- device_type = "memory";
- reg = <0x00000000 0x8000000>;
- };
-
- chosen {
- bootargs = "console=ttyS0,115200n8 earlyprintk root=/dev/sda1 rootdelay=10";
- stdout-path = &uart0;
- };
-
- ocp@f1000000 {
- pinctrl: pin-controller@10000 {
- pmx_usb_power_enable: pmx-usb-power-enable {
- marvell,pins = "mpp29";
- marvell,function = "gpio";
- };
- pmx_led_right_cap_0: pmx-led_right_cap_0 {
- marvell,pins = "mpp38";
- marvell,function = "gpio";
- };
- pmx_led_right_cap_1: pmx-led_right_cap_1 {
- marvell,pins = "mpp39";
- marvell,function = "gpio";
- };
- pmx_led_right_cap_2: pmx-led_right_cap_2 {
- marvell,pins = "mpp40";
- marvell,function = "gpio";
- };
- pmx_led_right_cap_3: pmx-led_right_cap_3 {
- marvell,pins = "mpp41";
- marvell,function = "gpio";
- };
- pmx_led_left_cap_0: pmx-led_left_cap_0 {
- marvell,pins = "mpp42";
- marvell,function = "gpio";
- };
- pmx_led_left_cap_1: pmx-led_left_cap_1 {
- marvell,pins = "mpp43";
- marvell,function = "gpio";
- };
- pmx_led_left_cap_2: pmx-led_left_cap_2 {
- marvell,pins = "mpp44";
- marvell,function = "gpio";
- };
- pmx_led_left_cap_3: pmx-led_left_cap_3 {
- marvell,pins = "mpp45";
- marvell,function = "gpio";
- };
- pmx_led_green: pmx-led_green {
- marvell,pins = "mpp46";
- marvell,function = "gpio";
- };
- pmx_led_orange: pmx-led_orange {
- marvell,pins = "mpp47";
- marvell,function = "gpio";
- };
- };
- serial@12000 {
- status = "ok";
- };
-
- sata@80000 {
- status = "okay";
- nr-ports = <2>;
- };
-
- };
- gpio-leds {
- compatible = "gpio-leds";
- pinctrl-0 = < &pmx_led_orange
- &pmx_led_left_cap_0 &pmx_led_left_cap_1
- &pmx_led_left_cap_2 &pmx_led_left_cap_3
- &pmx_led_right_cap_0 &pmx_led_right_cap_1
- &pmx_led_right_cap_2 &pmx_led_right_cap_3
- >;
- pinctrl-names = "default";
-
- health {
- label = "status:green:health";
- gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
- default-state = "keep";
- };
- fault {
- label = "status:orange:fault";
- gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
- };
- left0 {
- label = "status:white:left0";
- gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;
- };
- left1 {
- label = "status:white:left1";
- gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>;
- };
- left2 {
- label = "status:white:left2";
- gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>;
- };
- left3 {
- label = "status:white:left3";
- gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
- };
- right0 {
- label = "status:white:right0";
- gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
- };
- right1 {
- label = "status:white:right1";
- gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
- };
- right2 {
- label = "status:white:right2";
- gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
- };
- right3 {
- label = "status:white:right3";
- gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
- };
- };
- regulators {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <0>;
- pinctrl-0 = <&pmx_usb_power_enable>;
- pinctrl-names = "default";
-
- usb_power: regulator@1 {
- compatible = "regulator-fixed";
- reg = <1>;
- regulator-name = "USB Power";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- enable-active-high;
- regulator-always-on;
- regulator-boot-on;
- gpio = <&gpio0 29 GPIO_ACTIVE_HIGH>;
- };
- };
-};
-
-&nand {
- chip-delay = <40>;
- status = "okay";
-
- partition@0 {
- label = "u-boot";
- reg = <0x0000000 0x100000>;
- read-only;
- };
-
- partition@100000 {
- label = "uImage";
- reg = <0x0100000 0x400000>;
- };
-
- partition@500000 {
- label = "pogoplug";
- reg = <0x0500000 0x2000000>;
- };
-
- partition@2500000 {
- label = "root";
- reg = <0x02500000 0xd800000>;
- };
-};
-
-&mdio {
- status = "okay";
-
- ethphy0: ethernet-phy@0 {
- reg = <0>;
- };
-};
-
-ð0 {
- status = "okay";
- ethernet0-port@0 {
- phy-handle = <ðphy0>;
- };
-};
diff --git a/arch/arm/dts/kirkwood-guruplug-server-plus.dts b/arch/arm/dts/kirkwood-guruplug-server-plus.dts
deleted file mode 100644
index ff1260e..0000000
--- a/arch/arm/dts/kirkwood-guruplug-server-plus.dts
+++ /dev/null
@@ -1,133 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/dts-v1/;
-
-#include "kirkwood.dtsi"
-#include "kirkwood-6281.dtsi"
-
-/ {
- model = "Globalscale Technologies Guruplug Server Plus";
- compatible = "globalscale,guruplug-server-plus", "globalscale,guruplug", "marvell,kirkwood-88f6281", "marvell,kirkwood";
-
- memory {
- device_type = "memory";
- reg = <0x00000000 0x20000000>;
- };
-
- chosen {
- bootargs = "console=ttyS0,115200n8 earlyprintk";
- stdout-path = &uart0;
- };
-
- ocp@f1000000 {
- pinctrl: pin-controller@10000 {
- pmx_led_health_r: pmx-led-health-r {
- marvell,pins = "mpp46";
- marvell,function = "gpio";
- };
- pmx_led_health_g: pmx-led-health-g {
- marvell,pins = "mpp47";
- marvell,function = "gpio";
- };
- pmx_led_wmode_r: pmx-led-wmode-r {
- marvell,pins = "mpp48";
- marvell,function = "gpio";
- };
- pmx_led_wmode_g: pmx-led-wmode-g {
- marvell,pins = "mpp49";
- marvell,function = "gpio";
- };
- };
- serial@12000 {
- status = "ok";
- };
-
- sata@80000 {
- status = "okay";
- nr-ports = <1>;
- };
-
- /* AzureWave AW-GH381 WiFi/BT */
- mvsdio@90000 {
- status = "okay";
- non-removable;
- };
- };
-
- gpio-leds {
- compatible = "gpio-leds";
- pinctrl-0 = < &pmx_led_health_r &pmx_led_health_g
- &pmx_led_wmode_r &pmx_led_wmode_g >;
- pinctrl-names = "default";
-
- health-r {
- label = "guruplug:red:health";
- gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
- };
- health-g {
- label = "guruplug:green:health";
- gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
- };
- wmode-r {
- label = "guruplug:red:wmode";
- gpios = <&gpio1 16 GPIO_ACTIVE_LOW>;
- };
- wmode-g {
- label = "guruplug:green:wmode";
- gpios = <&gpio1 17 GPIO_ACTIVE_LOW>;
- };
- };
-};
-
-&nand {
- status = "okay";
-
- partition@0 {
- label = "u-boot";
- reg = <0x00000000 0x00100000>;
- read-only;
- };
-
- partition@100000 {
- label = "uImage";
- reg = <0x00100000 0x00400000>;
- };
-
- partition@500000 {
- label = "data";
- reg = <0x00500000 0x1fb00000>;
- };
-};
-
-&mdio {
- status = "okay";
-
- ethphy0: ethernet-phy@0 {
- /* Marvell 88E1121R */
- compatible = "ethernet-phy-id0141.0cb0",
- "ethernet-phy-ieee802.3-c22";
- reg = <0>;
- };
-
- ethphy1: ethernet-phy@1 {
- /* Marvell 88E1121R */
- compatible = "ethernet-phy-id0141.0cb0",
- "ethernet-phy-ieee802.3-c22";
- reg = <1>;
- };
-};
-
-ð0 {
- status = "okay";
- ethernet0-port@0 {
- phy-handle = <ðphy0>;
- phy-connection-type = "rgmii-id";
- };
-};
-
-ð1 {
- status = "okay";
- ethernet1-port@0 {
- phy-handle = <ðphy1>;
- phy-connection-type = "rgmii-id";
- };
-};
diff --git a/arch/arm/dts/kirkwood-ib62x0.dts b/arch/arm/dts/kirkwood-ib62x0.dts
deleted file mode 100644
index 962a910..0000000
--- a/arch/arm/dts/kirkwood-ib62x0.dts
+++ /dev/null
@@ -1,146 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/dts-v1/;
-
-#include "kirkwood.dtsi"
-#include "kirkwood-6281.dtsi"
-
-/ {
- model = "RaidSonic ICY BOX IB-NAS62x0 (Rev B)";
- compatible = "raidsonic,ib-nas6210-b", "raidsonic,ib-nas6220-b", "raidsonic,ib-nas6210", "raidsonic,ib-nas6220", "raidsonic,ib-nas62x0", "marvell,kirkwood-88f6281", "marvell,kirkwood";
-
- memory {
- device_type = "memory";
- reg = <0x00000000 0x10000000>;
- };
-
- chosen {
- bootargs = "console=ttyS0,115200n8 earlyprintk";
- stdout-path = &uart0;
- };
-
- ocp@f1000000 {
- pinctrl: pin-controller@10000 {
- pmx_led_os_red: pmx-led-os-red {
- marvell,pins = "mpp22";
- marvell,function = "gpio";
- };
- pmx_power_off: pmx-power-off {
- marvell,pins = "mpp24";
- marvell,function = "gpio";
- };
- pmx_led_os_green: pmx-led-os-green {
- marvell,pins = "mpp25";
- marvell,function = "gpio";
- };
- pmx_led_usb_transfer: pmx-led-usb-transfer {
- marvell,pins = "mpp27";
- marvell,function = "gpio";
- };
- pmx_button_reset: pmx-button-reset {
- marvell,pins = "mpp28";
- marvell,function = "gpio";
- };
- pmx_button_usb_copy: pmx-button-usb-copy {
- marvell,pins = "mpp29";
- marvell,function = "gpio";
- };
- };
-
- serial@12000 {
- status = "okay";
- };
-
- sata@80000 {
- status = "okay";
- nr-ports = <2>;
- };
- };
-
- gpio_keys {
- compatible = "gpio-keys";
- #address-cells = <1>;
- #size-cells = <0>;
- pinctrl-0 = <&pmx_button_reset &pmx_button_usb_copy>;
- pinctrl-names = "default";
-
- copy {
- label = "USB Copy";
- linux,code = <KEY_COPY>;
- gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
- };
- reset {
- label = "Reset";
- linux,code = <KEY_RESTART>;
- gpios = <&gpio0 28 GPIO_ACTIVE_LOW>;
- };
- };
-
- gpio-leds {
- compatible = "gpio-leds";
- pinctrl-0 = <&pmx_led_os_red &pmx_led_os_green
- &pmx_led_usb_transfer>;
- pinctrl-names = "default";
-
- green-os {
- label = "ib62x0:green:os";
- gpios = <&gpio0 25 GPIO_ACTIVE_HIGH>;
- default-state = "keep";
- };
- red-os {
- label = "ib62x0:red:os";
- gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>;
- };
- usb-copy {
- label = "ib62x0:red:usb_copy";
- gpios = <&gpio0 27 GPIO_ACTIVE_HIGH>;
- };
- };
-
- gpio_poweroff {
- compatible = "gpio-poweroff";
- pinctrl-0 = <&pmx_power_off>;
- pinctrl-names = "default";
- gpios = <&gpio0 24 GPIO_ACTIVE_HIGH>;
- };
-};
-
-&nand {
- status = "okay";
-
- partition@0 {
- label = "u-boot";
- reg = <0x0000000 0xe0000>;
- };
-
- partition@e0000 {
- label = "u-boot environment";
- reg = <0xe0000 0x20000>;
- };
-
- partition@100000 {
- label = "uImage";
- reg = <0x0100000 0x600000>;
- };
-
- partition@700000 {
- label = "root";
- reg = <0x0700000 0xf900000>;
- };
-
-};
-
-&mdio {
- status = "okay";
-
- ethphy0: ethernet-phy@8 {
- reg = <8>;
- };
-};
-
-ð0 {
- status = "okay";
-
- ethernet0-port@0 {
- phy-handle = <ðphy0>;
- };
-};
diff --git a/arch/arm/dts/kirkwood-iconnect.dts b/arch/arm/dts/kirkwood-iconnect.dts
deleted file mode 100644
index 4a512d8..0000000
--- a/arch/arm/dts/kirkwood-iconnect.dts
+++ /dev/null
@@ -1,195 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/dts-v1/;
-
-#include "kirkwood.dtsi"
-#include "kirkwood-6281.dtsi"
-
-/ {
- model = "Iomega Iconnect";
- compatible = "iom,iconnect-1.1", "iom,iconnect", "marvell,kirkwood-88f6281", "marvell,kirkwood";
-
- memory {
- device_type = "memory";
- reg = <0x00000000 0x10000000>;
- };
-
- chosen {
- bootargs = "console=ttyS0,115200n8 earlyprintk";
- stdout-path = &uart0;
- linux,initrd-start = <0x4500040>;
- linux,initrd-end = <0x4800000>;
- };
-
- ocp@f1000000 {
- pinctrl: pin-controller@10000 {
- pmx_button_reset: pmx-button-reset {
- marvell,pins = "mpp12";
- marvell,function = "gpio";
- };
- pmx_button_otb: pmx-button-otb {
- marvell,pins = "mpp35";
- marvell,function = "gpio";
- };
- pmx_led_level: pmx-led-level {
- marvell,pins = "mpp41";
- marvell,function = "gpio";
- };
- pmx_led_power_blue: pmx-led-power-blue {
- marvell,pins = "mpp42";
- marvell,function = "gpio";
- };
- pmx_led_power_red: pmx-power-red {
- marvell,pins = "mpp43";
- marvell,function = "gpio";
- };
- pmx_led_usb1: pmx-led-usb1 {
- marvell,pins = "mpp44";
- marvell,function = "gpio";
- };
- pmx_led_usb2: pmx-led-usb2 {
- marvell,pins = "mpp45";
- marvell,function = "gpio";
- };
- pmx_led_usb3: pmx-led-usb3 {
- marvell,pins = "mpp46";
- marvell,function = "gpio";
- };
- pmx_led_usb4: pmx-led-usb4 {
- marvell,pins = "mpp47";
- marvell,function = "gpio";
- };
- pmx_led_otb: pmx-led-otb {
- marvell,pins = "mpp48";
- marvell,function = "gpio";
- };
- };
- i2c@11000 {
- status = "okay";
-
- lm63: lm63@4c {
- compatible = "national,lm63";
- reg = <0x4c>;
- };
- };
- serial@12000 {
- status = "ok";
- };
- };
-
- gpio-leds {
- compatible = "gpio-leds";
- pinctrl-0 = < &pmx_led_level &pmx_led_power_blue
- &pmx_led_power_red &pmx_led_usb1
- &pmx_led_usb2 &pmx_led_usb3
- &pmx_led_usb4 &pmx_led_otb >;
- pinctrl-names = "default";
-
- led-level {
- label = "led_level";
- gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
- default-state = "on";
- };
- power-blue {
- label = "power:blue";
- gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;
- default-state = "keep";
- };
- power-red {
- label = "power:red";
- gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>;
- };
- usb1 {
- label = "usb1:blue";
- gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>;
- };
- usb2 {
- label = "usb2:blue";
- gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
- };
- usb3 {
- label = "usb3:blue";
- gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
- };
- usb4 {
- label = "usb4:blue";
- gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>;
- };
- otb {
- label = "otb:blue";
- gpios = <&gpio1 16 GPIO_ACTIVE_HIGH>;
- };
- };
-
- gpio_keys {
- compatible = "gpio-keys";
- #address-cells = <1>;
- #size-cells = <0>;
- pinctrl-0 = < &pmx_button_reset &pmx_button_otb >;
- pinctrl-names = "default";
-
- otb {
- label = "OTB Button";
- linux,code = <KEY_COPY>;
- gpios = <&gpio1 3 GPIO_ACTIVE_LOW>;
- debounce-interval = <100>;
- };
- reset {
- label = "Reset";
- linux,code = <KEY_RESTART>;
- gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
- debounce-interval = <100>;
- };
- };
-};
-
-&nand {
- status = "okay";
-
- partition@0 {
- label = "uboot";
- reg = <0x0000000 0xc0000>;
- };
-
- partition@a0000 {
- label = "env";
- reg = <0xa0000 0x20000>;
- };
-
- partition@100000 {
- label = "zImage";
- reg = <0x100000 0x300000>;
- };
-
- partition@540000 {
- label = "initrd";
- reg = <0x540000 0x300000>;
- };
-
- partition@980000 {
- label = "boot";
- reg = <0x980000 0x1f400000>;
- };
-};
-
-&mdio {
- status = "okay";
-
- ethphy0: ethernet-phy@11 {
- reg = <11>;
- };
-};
-
-ð0 {
- status = "okay";
- ethernet0-port@0 {
- phy-handle = <ðphy0>;
- };
-};
-
-&pciec {
- status = "okay";
-};
-
-&pcie0 {
- status = "okay";
-};
diff --git a/arch/arm/dts/kirkwood-is2.dts b/arch/arm/dts/kirkwood-is2.dts
deleted file mode 100644
index 1bc16a5..0000000
--- a/arch/arm/dts/kirkwood-is2.dts
+++ /dev/null
@@ -1,40 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/dts-v1/;
-
-#include <dt-bindings/leds/leds-ns2.h>
-#include "kirkwood-ns2-common.dtsi"
-
-/ {
- model = "LaCie Internet Space v2";
- compatible = "lacie,inetspace_v2", "marvell,kirkwood-88f6281", "marvell,kirkwood";
-
- memory {
- device_type = "memory";
- reg = <0x00000000 0x8000000>;
- };
-
- ocp@f1000000 {
- sata@80000 {
- pinctrl-0 = <&pmx_ns2_sata0>;
- pinctrl-names = "default";
- status = "okay";
- nr-ports = <1>;
- };
- };
-
- ns2-leds {
- compatible = "lacie,ns2-leds";
-
- blue-sata {
- label = "ns2:blue:sata";
- slow-gpio = <&gpio0 29 0>;
- cmd-gpio = <&gpio0 30 0>;
- modes-map = <NS_V2_LED_OFF 1 0
- NS_V2_LED_ON 0 1
- NS_V2_LED_ON 1 1
- NS_V2_LED_SATA 0 0>;
- };
- };
-};
-
-ðphy0 { reg = <8>; };
diff --git a/arch/arm/dts/kirkwood-lschlv2-u-boot.dtsi b/arch/arm/dts/kirkwood-lschlv2-u-boot.dtsi
index 7fc2d7d..cf33ff8 100644
--- a/arch/arm/dts/kirkwood-lschlv2-u-boot.dtsi
+++ b/arch/arm/dts/kirkwood-lschlv2-u-boot.dtsi
@@ -1,7 +1,9 @@
// SPDX-License-Identifier: GPL-2.0+
-ð0 {
- status = "disabled";
+/ {
+ aliases {
+ spi0 = &spi0;
+ };
};
&hdd_power {
diff --git a/arch/arm/dts/kirkwood-lschlv2.dts b/arch/arm/dts/kirkwood-lschlv2.dts
deleted file mode 100644
index 1d737d9..0000000
--- a/arch/arm/dts/kirkwood-lschlv2.dts
+++ /dev/null
@@ -1,20 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/dts-v1/;
-
-#include "kirkwood-lsxl.dtsi"
-
-/ {
- model = "Buffalo Linkstation LS-CHLv2";
- compatible = "buffalo,lschlv2", "buffalo,lsxl", "marvell,kirkwood-88f6281", "marvell,kirkwood";
-
- memory {
- device_type = "memory";
- reg = <0x00000000 0x4000000>;
- };
-
- ocp@f1000000 {
- serial@12000 {
- status = "okay";
- };
- };
-};
diff --git a/arch/arm/dts/kirkwood-lsxhl-u-boot.dtsi b/arch/arm/dts/kirkwood-lsxhl-u-boot.dtsi
index 7fc2d7d..cf33ff8 100644
--- a/arch/arm/dts/kirkwood-lsxhl-u-boot.dtsi
+++ b/arch/arm/dts/kirkwood-lsxhl-u-boot.dtsi
@@ -1,7 +1,9 @@
// SPDX-License-Identifier: GPL-2.0+
-ð0 {
- status = "disabled";
+/ {
+ aliases {
+ spi0 = &spi0;
+ };
};
&hdd_power {
diff --git a/arch/arm/dts/kirkwood-lsxhl.dts b/arch/arm/dts/kirkwood-lsxhl.dts
deleted file mode 100644
index a56e0d7..0000000
--- a/arch/arm/dts/kirkwood-lsxhl.dts
+++ /dev/null
@@ -1,20 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/dts-v1/;
-
-#include "kirkwood-lsxl.dtsi"
-
-/ {
- model = "Buffalo Linkstation LS-XHL";
- compatible = "buffalo,lsxhl", "buffalo,lsxl", "marvell,kirkwood-88f6281", "marvell,kirkwood";
-
- memory {
- device_type = "memory";
- reg = <0x00000000 0x10000000>;
- };
-
- ocp@f1000000 {
- serial@12000 {
- status = "okay";
- };
- };
-};
diff --git a/arch/arm/dts/kirkwood-lsxl.dtsi b/arch/arm/dts/kirkwood-lsxl.dtsi
deleted file mode 100644
index c99c0da..0000000
--- a/arch/arm/dts/kirkwood-lsxl.dtsi
+++ /dev/null
@@ -1,241 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-#include "kirkwood.dtsi"
-#include "kirkwood-6281.dtsi"
-
-/ {
- chosen {
- bootargs = "console=ttyS0,115200n8 earlyprintk";
- stdout-path = &uart0;
- };
-
- aliases {
- spi0 = &spi0;
- };
-
- ocp@f1000000 {
- pinctrl: pin-controller@10000 {
- pmx_power_hdd: pmx-power-hdd {
- marvell,pins = "mpp10";
- marvell,function = "gpo";
- };
- pmx_usb_vbus: pmx-usb-vbus {
- marvell,pins = "mpp11";
- marvell,function = "gpio";
- };
- pmx_fan_high: pmx-fan-high {
- marvell,pins = "mpp18";
- marvell,function = "gpo";
- };
- pmx_fan_low: pmx-fan-low {
- marvell,pins = "mpp19";
- marvell,function = "gpo";
- };
- pmx_led_function_blue: pmx-led-function-blue {
- marvell,pins = "mpp36";
- marvell,function = "gpio";
- };
- pmx_led_alarm: pmx-led-alarm {
- marvell,pins = "mpp37";
- marvell,function = "gpio";
- };
- pmx_led_info: pmx-led-info {
- marvell,pins = "mpp38";
- marvell,function = "gpio";
- };
- pmx_led_power: pmx-led-power {
- marvell,pins = "mpp39";
- marvell,function = "gpio";
- };
- pmx_fan_lock: pmx-fan-lock {
- marvell,pins = "mpp40";
- marvell,function = "gpio";
- };
- pmx_button_function: pmx-button-function {
- marvell,pins = "mpp41";
- marvell,function = "gpio";
- };
- pmx_power_switch: pmx-power-switch {
- marvell,pins = "mpp42";
- marvell,function = "gpio";
- };
- pmx_power_auto_switch: pmx-power-auto-switch {
- marvell,pins = "mpp43";
- marvell,function = "gpio";
- };
- pmx_led_function_red: pmx-led-function_red {
- marvell,pins = "mpp48";
- marvell,function = "gpio";
- };
-
- };
- sata@80000 {
- status = "okay";
- nr-ports = <1>;
- };
-
- spi@10600 {
- status = "okay";
-
- m25p40@0 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "m25p40", "jedec,spi-nor";
- reg = <0>;
- spi-max-frequency = <25000000>;
- mode = <0>;
-
- partition@0 {
- reg = <0x0 0x60000>;
- label = "uboot";
- read-only;
- };
-
- partition@60000 {
- reg = <0x60000 0x10000>;
- label = "dtb";
- read-only;
- };
-
- partition@70000 {
- reg = <0x70000 0x10000>;
- label = "uboot_env";
- };
- };
- };
- };
-
- gpio_keys {
- compatible = "gpio-keys";
- #address-cells = <1>;
- #size-cells = <0>;
- pinctrl-0 = <&pmx_button_function &pmx_power_switch
- &pmx_power_auto_switch>;
- pinctrl-names = "default";
-
- option {
- label = "Function Button";
- linux,code = <KEY_OPTION>;
- gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
- };
- reserved {
- label = "Power-on Switch";
- linux,code = <KEY_RESERVED>;
- linux,input-type = <5>;
- gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
- };
- power {
- label = "Power-auto Switch";
- linux,code = <KEY_ESC>;
- linux,input-type = <5>;
- gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
- };
- };
-
- gpio_leds {
- compatible = "gpio-leds";
- pinctrl-0 = <&pmx_led_function_red &pmx_led_alarm
- &pmx_led_info &pmx_led_power
- &pmx_led_function_blue>;
- pinctrl-names = "default";
-
- func_blue {
- label = "lsxl:blue:func";
- gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
- };
-
- alarm {
- label = "lsxl:red:alarm";
- gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
- };
-
- info {
- label = "lsxl:amber:info";
- gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
- };
-
- power {
- label = "lsxl:blue:power";
- gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
- default-state = "keep";
- };
-
- func_red {
- label = "lsxl:red:func";
- gpios = <&gpio1 16 GPIO_ACTIVE_LOW>;
- };
- };
-
- gpio_fan {
- compatible = "gpio-fan";
- pinctrl-0 = <&pmx_fan_low &pmx_fan_high &pmx_fan_lock>;
- pinctrl-names = "default";
- gpios = <&gpio0 19 GPIO_ACTIVE_LOW
- &gpio0 18 GPIO_ACTIVE_LOW>;
- gpio-fan,speed-map = <0 3
- 1500 2
- 3250 1
- 5000 0>;
- alarm-gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
- };
-
- restart_poweroff {
- compatible = "restart-poweroff";
- };
-
- regulators {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <0>;
- pinctrl-0 = <&pmx_power_hdd &pmx_usb_vbus>;
- pinctrl-names = "default";
-
- usb_power: regulator@1 {
- compatible = "regulator-fixed";
- reg = <1>;
- regulator-name = "USB Power";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- enable-active-high;
- regulator-always-on;
- regulator-boot-on;
- gpio = <&gpio0 11 0>;
- };
- hdd_power: regulator@2 {
- compatible = "regulator-fixed";
- reg = <2>;
- regulator-name = "HDD Power";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- enable-active-high;
- regulator-always-on;
- regulator-boot-on;
- gpio = <&gpio0 10 0>;
- };
- };
-};
-
-&mdio {
- status = "okay";
-
- ethphy0: ethernet-phy@0 {
- reg = <0>;
- };
-
- ethphy1: ethernet-phy@8 {
- reg = <8>;
- };
-};
-
-ð0 {
- status = "okay";
- ethernet0-port@0 {
- phy-handle = <ðphy0>;
- };
-};
-
-ð1 {
- status = "okay";
- ethernet1-port@0 {
- phy-handle = <ðphy1>;
- };
-};
diff --git a/arch/arm/dts/kirkwood-net2big.dts b/arch/arm/dts/kirkwood-net2big.dts
deleted file mode 100644
index 3e3ac28..0000000
--- a/arch/arm/dts/kirkwood-net2big.dts
+++ /dev/null
@@ -1,63 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Device Tree file for LaCie 2Big Network v2
- *
- * Copyright (C) 2014
- *
- * Andrew Lunn <andrew@lunn.ch>
- *
- * Based on netxbig_v2-setup.c,
- * Copyright (C) 2010 Simon Guinot <sguinot@lacie.com>
- *
-*/
-
-/dts-v1/;
-
-#include "kirkwood.dtsi"
-#include "kirkwood-6281.dtsi"
-#include "kirkwood-netxbig.dtsi"
-
-/ {
- model = "LaCie 2Big Network v2";
- compatible = "lacie,net2big_v2", "lacie,netxbig", "marvell,kirkwood-88f6281", "marvell,kirkwood";
-
- memory {
- device_type = "memory";
- reg = <0x00000000 0x10000000>;
- };
-
- fan {
- compatible = "gpio-fan";
- alarm-gpios = <&gpio0 25 GPIO_ACTIVE_LOW>;
- };
-};
-
-®ulators {
- regulator@2 {
- compatible = "regulator-fixed";
- reg = <2>;
- regulator-name = "hdd1power";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- enable-active-high;
- regulator-always-on;
- regulator-boot-on;
- gpio = <&gpio0 17 GPIO_ACTIVE_HIGH>;
- };
-
- clocks {
- g762_clk: g762-oscillator {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <32768>;
- };
- };
-};
-
-&i2c0 {
- g762@3e {
- compatible = "gmt,g762";
- reg = <0x3e>;
- clocks = <&g762_clk>;
- };
-};
diff --git a/arch/arm/dts/kirkwood-netxbig.dtsi b/arch/arm/dts/kirkwood-netxbig.dtsi
deleted file mode 100644
index b573702..0000000
--- a/arch/arm/dts/kirkwood-netxbig.dtsi
+++ /dev/null
@@ -1,232 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Device Tree common file for LaCie 2Big and 5Big Network v2
- *
- * Copyright (C) 2014
- *
- * Andrew Lunn <andrew@lunn.ch>
- *
- * Based on netxbig_v2-setup.c,
- * Copyright (C) 2010 Simon Guinot <sguinot@lacie.com>
- *
-*/
-
-#include <dt-bindings/leds/leds-netxbig.h>
-#include "kirkwood.dtsi"
-#include "kirkwood-6281.dtsi"
-
-/ {
- chosen {
- bootargs = "console=ttyS0,115200n8";
- stdout-path = &uart0;
- };
-
- ocp@f1000000 {
- serial@12000 {
- status = "okay";
- };
-
- spi@10600 {
- status = "okay";
-
- flash@0 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "mxicy,mx25l4005a", "jedec,spi-nor";
- reg = <0>;
- spi-max-frequency = <20000000>;
- mode = <0>;
-
- partition@0 {
- reg = <0x0 0x80000>;
- label = "u-boot";
- };
- };
- };
-
- sata@80000 {
- status = "okay";
- nr-ports = <2>;
- };
-
- };
-
- gpio-keys {
- compatible = "gpio-keys";
- #address-cells = <1>;
- #size-cells = <0>;
-
- /*
- * esc and power represent a three position rocker
- * switch. Thus the conventional KEY_POWER does not fit
- */
- exc {
- label = "Back power switch (on|auto)";
- linux,code = <KEY_ESC>;
- linux,input-type = <5>;
- gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
- };
- power {
- label = "Back power switch (auto|off)";
- linux,code = <KEY_1>;
- linux,input-type = <5>;
- gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
- };
- option {
- label = "Function button";
- linux,code = <KEY_OPTION>;
- gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
- };
-
- };
-
- gpio-poweroff {
- compatible = "gpio-poweroff";
- gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>;
- };
-
- regulators: regulators {
- status = "okay";
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <0>;
- pinctrl-names = "default";
-
- regulator@1 {
- compatible = "regulator-fixed";
- reg = <1>;
- regulator-name = "hdd0power";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- enable-active-high;
- regulator-always-on;
- regulator-boot-on;
- gpio = <&gpio0 16 GPIO_ACTIVE_HIGH>;
- };
- };
-
- netxbig_gpio_ext: netxbig-gpio-ext {
- compatible = "lacie,netxbig-gpio-ext";
-
- addr-gpios = <&gpio1 15 GPIO_ACTIVE_HIGH
- &gpio1 16 GPIO_ACTIVE_HIGH
- &gpio1 17 GPIO_ACTIVE_HIGH>;
- data-gpios = <&gpio1 12 GPIO_ACTIVE_HIGH
- &gpio1 13 GPIO_ACTIVE_HIGH
- &gpio1 14 GPIO_ACTIVE_HIGH>;
- enable-gpio = <&gpio0 29 GPIO_ACTIVE_HIGH>;
- };
-
- netxbig-leds {
- compatible = "lacie,netxbig-leds";
-
- gpio-ext = <&netxbig_gpio_ext>;
-
- timers = <NETXBIG_LED_TIMER1 500 500
- NETXBIG_LED_TIMER2 500 1000>;
-
- blue-power {
- label = "netxbig:blue:power";
- mode-addr = <0>;
- mode-val = <NETXBIG_LED_OFF 0
- NETXBIG_LED_ON 1
- NETXBIG_LED_TIMER1 3
- NETXBIG_LED_TIMER2 7>;
- bright-addr = <1>;
- max-brightness = <7>;
- };
- red-power {
- label = "netxbig:red:power";
- mode-addr = <0>;
- mode-val = <NETXBIG_LED_OFF 0
- NETXBIG_LED_ON 2
- NETXBIG_LED_TIMER1 4>;
- bright-addr = <1>;
- max-brightness = <7>;
- };
- blue-sata0 {
- label = "netxbig:blue:sata0";
- mode-addr = <3>;
- mode-val = <NETXBIG_LED_OFF 0
- NETXBIG_LED_ON 7
- NETXBIG_LED_SATA 1
- NETXBIG_LED_TIMER1 3>;
- bright-addr = <2>;
- max-brightness = <7>;
- };
- red-sata0 {
- label = "netxbig:red:sata0";
- mode-addr = <3>;
- mode-val = <NETXBIG_LED_OFF 0
- NETXBIG_LED_ON 2
- NETXBIG_LED_TIMER1 4>;
- bright-addr = <2>;
- max-brightness = <7>;
- };
- blue-sata1 {
- label = "netxbig:blue:sata1";
- mode-addr = <4>;
- mode-val = <NETXBIG_LED_OFF 0
- NETXBIG_LED_ON 7
- NETXBIG_LED_SATA 1
- NETXBIG_LED_TIMER1 3>;
- bright-addr = <2>;
- max-brightness = <7>;
- };
- red-sata1 {
- label = "netxbig:red:sata1";
- mode-addr = <4>;
- mode-val = <NETXBIG_LED_OFF 0
- NETXBIG_LED_ON 2
- NETXBIG_LED_TIMER1 4>;
- bright-addr = <2>;
- max-brightness = <7>;
- };
- };
-};
-
-&mdio {
- status = "okay";
-
- ethphy0: ethernet-phy@0 {
- reg = <8>;
- };
-
- ethphy1: ethernet-phy@1 {
- reg = <0>;
- };
-};
-
-ð0 {
- status = "okay";
- ethernet0-port@0 {
- phy-handle = <ðphy0>;
- };
-};
-
-&pinctrl {
- pinctrl-names = "default";
-
- pmx_button_function: pmx-button-function {
- marvell,pins = "mpp34";
- marvell,function = "gpio";
- };
- pmx_button_power_off: pmx-button-power-off {
- marvell,pins = "mpp15";
- marvell,function = "gpio";
- };
- pmx_button_power_on: pmx-button-power-on {
- marvell,pins = "mpp13";
- marvell,function = "gpio";
- };
-};
-
-&i2c0 {
- status = "okay";
-
- eeprom@50 {
- compatible = "atmel,24c04";
- pagesize = <16>;
- reg = <0x50>;
- };
-};
diff --git a/arch/arm/dts/kirkwood-ns2-common.dtsi b/arch/arm/dts/kirkwood-ns2-common.dtsi
deleted file mode 100644
index 51530ea..0000000
--- a/arch/arm/dts/kirkwood-ns2-common.dtsi
+++ /dev/null
@@ -1,97 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-#include "kirkwood.dtsi"
-#include "kirkwood-6281.dtsi"
-
-/ {
- chosen {
- bootargs = "console=ttyS0,115200n8";
- stdout-path = &uart0;
- };
-
- ocp@f1000000 {
- pinctrl: pin-controller@10000 {
- pmx_ns2_sata0: pmx-ns2-sata0 {
- marvell,pins = "mpp21";
- marvell,function = "sata0";
- };
- pmx_ns2_sata1: pmx-ns2-sata1 {
- marvell,pins = "mpp20";
- marvell,function = "sata1";
- };
- };
-
- serial@12000 {
- status = "okay";
- };
-
- spi@10600 {
- status = "okay";
-
- flash@0 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "mxicy,mx25l4005a", "jedec,spi-nor";
- reg = <0>;
- spi-max-frequency = <20000000>;
- mode = <0>;
-
- partition@0 {
- reg = <0x0 0x80000>;
- label = "u-boot";
- };
- };
- };
-
- i2c@11000 {
- status = "okay";
-
- eeprom@50 {
- compatible = "atmel,24c04";
- pagesize = <16>;
- reg = <0x50>;
- };
- };
- };
-
- gpio_keys {
- compatible = "gpio-keys";
- #address-cells = <1>;
- #size-cells = <0>;
-
- power {
- label = "Power push button";
- linux,code = <KEY_POWER>;
- gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>;
- };
- };
-
- gpio-leds {
- compatible = "gpio-leds";
-
- red-fail {
- label = "ns2:red:fail";
- gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>;
- };
- };
-
- gpio_poweroff {
- compatible = "gpio-poweroff";
- gpios = <&gpio0 31 GPIO_ACTIVE_HIGH>;
- };
-
-};
-
-&mdio {
- status = "okay";
-
- ethphy0: ethernet-phy@X {
- /* overwrite reg property in board file */
- };
-};
-
-ð0 {
- status = "okay";
- ethernet0-port@0 {
- phy-handle = <ðphy0>;
- };
-};
diff --git a/arch/arm/dts/kirkwood-ns2.dts b/arch/arm/dts/kirkwood-ns2.dts
deleted file mode 100644
index 7b67083..0000000
--- a/arch/arm/dts/kirkwood-ns2.dts
+++ /dev/null
@@ -1,40 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/dts-v1/;
-
-#include <dt-bindings/leds/leds-ns2.h>
-#include "kirkwood-ns2-common.dtsi"
-
-/ {
- model = "LaCie Network Space v2";
- compatible = "lacie,netspace_v2", "marvell,kirkwood-88f6281", "marvell,kirkwood";
-
- memory {
- device_type = "memory";
- reg = <0x00000000 0x10000000>;
- };
-
- ocp@f1000000 {
- sata@80000 {
- pinctrl-0 = <&pmx_ns2_sata0>;
- pinctrl-names = "default";
- status = "okay";
- nr-ports = <1>;
- };
- };
-
- ns2-leds {
- compatible = "lacie,ns2-leds";
-
- blue-sata {
- label = "ns2:blue:sata";
- slow-gpio = <&gpio0 29 0>;
- cmd-gpio = <&gpio0 30 0>;
- modes-map = <NS_V2_LED_OFF 1 0
- NS_V2_LED_ON 0 1
- NS_V2_LED_ON 1 1
- NS_V2_LED_SATA 0 0>;
- };
- };
-};
-
-ðphy0 { reg = <8>; };
diff --git a/arch/arm/dts/kirkwood-ns2lite.dts b/arch/arm/dts/kirkwood-ns2lite.dts
deleted file mode 100644
index b0cb590..0000000
--- a/arch/arm/dts/kirkwood-ns2lite.dts
+++ /dev/null
@@ -1,35 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/dts-v1/;
-
-#include "kirkwood-ns2-common.dtsi"
-
-/ {
- model = "LaCie Network Space Lite v2";
- compatible = "lacie,netspace_lite_v2", "marvell,kirkwood-88f6192", "marvell,kirkwood";
-
- memory {
- device_type = "memory";
- reg = <0x00000000 0x8000000>;
- };
-
- ocp@f1000000 {
- sata@80000 {
- pinctrl-0 = <&pmx_ns2_sata0>;
- pinctrl-names = "default";
- status = "okay";
- nr-ports = <1>;
- };
- };
-
- gpio-leds {
- compatible = "gpio-leds";
-
- blue-sata {
- label = "ns2:blue:sata";
- gpios = <&gpio0 30 GPIO_ACTIVE_LOW>;
- linux,default-trigger = "disk-activity";
- };
- };
-};
-
-ðphy0 { reg = <0>; };
diff --git a/arch/arm/dts/kirkwood-ns2max.dts b/arch/arm/dts/kirkwood-ns2max.dts
deleted file mode 100644
index c0a087e..0000000
--- a/arch/arm/dts/kirkwood-ns2max.dts
+++ /dev/null
@@ -1,59 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/dts-v1/;
-
-#include <dt-bindings/leds/leds-ns2.h>
-#include "kirkwood-ns2-common.dtsi"
-
-/ {
- model = "LaCie Network Space Max v2";
- compatible = "lacie,netspace_max_v2", "marvell,kirkwood-88f6281", "marvell,kirkwood";
-
- memory {
- device_type = "memory";
- reg = <0x00000000 0x10000000>;
- };
-
- ocp@f1000000 {
- sata@80000 {
- pinctrl-0 = <&pmx_ns2_sata0 &pmx_ns2_sata1>;
- pinctrl-names = "default";
- status = "okay";
- nr-ports = <2>;
- };
- };
-
- gpio_fan {
- compatible = "gpio-fan";
- gpios = <&gpio0 22 GPIO_ACTIVE_LOW
- &gpio0 7 GPIO_ACTIVE_LOW
- &gpio1 1 GPIO_ACTIVE_LOW
- &gpio0 23 GPIO_ACTIVE_LOW>;
- gpio-fan,speed-map =
- < 0 0
- 1500 15
- 1700 14
- 1800 13
- 2100 12
- 3100 11
- 3300 10
- 4300 9
- 5500 8>;
- alarm-gpios = <&gpio0 25 GPIO_ACTIVE_LOW>;
- };
-
- ns2-leds {
- compatible = "lacie,ns2-leds";
-
- blue-sata {
- label = "ns2:blue:sata";
- slow-gpio = <&gpio0 29 0>;
- cmd-gpio = <&gpio0 30 0>;
- modes-map = <NS_V2_LED_OFF 1 0
- NS_V2_LED_ON 0 1
- NS_V2_LED_ON 1 1
- NS_V2_LED_SATA 0 0>;
- };
- };
-};
-
-ðphy0 { reg = <8>; };
diff --git a/arch/arm/dts/kirkwood-ns2mini.dts b/arch/arm/dts/kirkwood-ns2mini.dts
deleted file mode 100644
index 5b9fa14..0000000
--- a/arch/arm/dts/kirkwood-ns2mini.dts
+++ /dev/null
@@ -1,60 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/dts-v1/;
-
-#include <dt-bindings/leds/leds-ns2.h>
-#include "kirkwood-ns2-common.dtsi"
-
-/ {
- /* This machine is embedded in the first LaCie CloudBox product. */
- model = "LaCie Network Space Mini v2";
- compatible = "lacie,netspace_mini_v2", "marvell,kirkwood-88f6192", "marvell,kirkwood";
-
- memory {
- device_type = "memory";
- reg = <0x00000000 0x8000000>;
- };
-
- ocp@f1000000 {
- sata@80000 {
- pinctrl-0 = <&pmx_ns2_sata0>;
- pinctrl-names = "default";
- status = "okay";
- nr-ports = <1>;
- };
- };
-
- gpio_fan {
- compatible = "gpio-fan";
- gpios = <&gpio0 22 GPIO_ACTIVE_LOW
- &gpio0 7 GPIO_ACTIVE_LOW
- &gpio1 1 GPIO_ACTIVE_LOW
- &gpio0 23 GPIO_ACTIVE_LOW>;
- gpio-fan,speed-map =
- < 0 0
- 3000 15
- 3180 14
- 4140 13
- 4570 12
- 6760 11
- 7140 10
- 7980 9
- 9200 8>;
- alarm-gpios = <&gpio0 25 GPIO_ACTIVE_LOW>;
- };
-
- ns2-leds {
- compatible = "lacie,ns2-leds";
-
- blue-sata {
- label = "ns2:blue:sata";
- slow-gpio = <&gpio0 29 0>;
- cmd-gpio = <&gpio0 30 0>;
- modes-map = <NS_V2_LED_OFF 1 0
- NS_V2_LED_ON 0 1
- NS_V2_LED_ON 1 1
- NS_V2_LED_SATA 0 0>;
- };
- };
-};
-
-ðphy0 { reg = <0>; };
diff --git a/arch/arm/dts/kirkwood-nsa310s.dts b/arch/arm/dts/kirkwood-nsa310s.dts
deleted file mode 100644
index 09ee76c..0000000
--- a/arch/arm/dts/kirkwood-nsa310s.dts
+++ /dev/null
@@ -1,319 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Device tree file for the Zyxel NSA 310S NAS box.
- *
- * Copyright (c) 2015-2021, Tony Dinh <mibodhi@gmail.com>
- *
- * Based on
- * Copyright (c) 2014, Adam Baker <linux@baker-net.org.uk>
- * Based upon the board setup file created by Peter Schildmann
- */
-/dts-v1/;
-
-#include "kirkwood.dtsi"
-#include "kirkwood-6281.dtsi"
-
-/ {
- model = "Zyxel NSA310S";
- compatible = "zyxel,nsa320s", "marvell,kirkwood-88f6702", "marvell,kirkwood";
-
- memory {
- device_type = "memory";
- reg = <0x00000000 0x10000000>;
- };
-
- chosen {
- bootargs = "console=ttyS0,115200";
- stdout-path = &uart0;
- };
-
- ocp@f1000000 {
- pinctrl: pin-controller@10000 {
- pinctrl-names = "default";
-
- pmx_sata0: pmx-sata0 {
- marvell,pins ;
- marvell,function = "sata0";
- };
-
- pmx_sata1: pmx-sata1 {
- marvell,pins ;
- marvell,function = "sata1";
- };
-
- pmx_usb_power: pmx-usb-power {
- marvell,pins = "mpp21";
- marvell,function = "gpio";
- };
-
- pmx_pwr_off: pmx-pwr-off {
- marvell,pins = "mpp27";
- marvell,function = "gpio";
- };
-
- pmx_btn_reset: pmx-btn-reset {
- marvell,pins = "mpp24";
- marvell,function = "gpio";
- };
-
- pmx_btn_copy: pmx-btn-copy {
- marvell,pins = "mpp25";
- marvell,function = "gpio";
- };
-
- pmx_btn_power: pmx-btn-power {
- marvell,pins = "mpp26";
- marvell,function = "gpio";
- };
-
- pmx_led_hdd2_green: pmx-led-hdd2-green {
- marvell,pins = "mpp34";
- marvell,function = "gpio";
- };
-
- pmx_led_hdd2_red: pmx-led-hdd2-red {
- marvell,pins = "mpp12";
- marvell,function = "gpio";
- };
-
- pmx_led_usb_green: pmx-led-usb-green {
- marvell,pins = "mpp15";
- marvell,function = "gpio";
- };
-
- pmx_led_copy_green: pmx-led-copy-green {
- marvell,pins = "mpp22";
- marvell,function = "gpio";
- };
-
- pmx_led_copy_red: pmx-led-copy-red {
- marvell,pins = "mpp23";
- marvell,function = "gpio";
- };
-
- pmx_led_sys_green: pmx-led-sys-green {
- marvell,pins = "mpp28";
- marvell,function = "gpio";
- };
-
- pmx_led_sys_orange: pmx-led-sys-orange {
- marvell,pins = "mpp29";
- marvell,function = "gpio";
- };
-
- pmx_led_hdd1_green: pmx-led-hdd1-green {
- marvell,pins = "mpp16";
- marvell,function = "gpio";
- };
-
- pmx_led_hdd1_red: pmx-led-hdd1-red {
- marvell,pins = "mpp13";
- marvell,function = "gpio";
- };
-
- pmx_pwr_sata1: pmx-pwr-sata1 {
- marvell,pins = "mpp33";
- marvell,function = "gpio";
- };
- };
-
- serial@12000 {
- status = "ok";
- };
-
- sata@80000 {
- status = "okay";
- nr-ports = <1>;
- };
-
- rtc@10300 {
- status = "disabled";
- };
-
- i2c@11000 {
- status = "okay";
- ht1382: rtc@68 {
- compatible = "htk,ht1382";
- reg = <0x68>;
- };
- };
- };
-
- regulators {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <0>;
- pinctrl-names = "default";
- pinctrl-0 = <&pmx_usb_power &pmx_pwr_sata1>;
-
- usb0_power: regulator@1 {
- compatible = "regulator-fixed";
- reg = <1>;
- regulator-name = "USB Power";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- regulator-always-on;
- regulator-boot-on;
- enable-active-high;
- gpio = <&gpio0 21 GPIO_ACTIVE_HIGH>;
- };
-
- sata1_power: regulator@2 {
- compatible = "regulator-fixed";
- reg = <2>;
- regulator-name = "SATA1 Power";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- regulator-always-on;
- regulator-boot-on;
- enable-active-high;
- gpio = <&gpio1 1 GPIO_ACTIVE_HIGH>;
- };
- };
-
- gpio_poweroff {
- compatible = "gpio-poweroff";
- pinctrl-0 = <&pmx_pwr_off>;
- pinctrl-names = "default";
- gpios = <&gpio0 27 GPIO_ACTIVE_HIGH>;
- };
-
- gpio_keys {
- compatible = "gpio-keys";
- #address-cells = <1>;
- #size-cells = <0>;
- pinctrl-0 = <&pmx_btn_reset &pmx_btn_copy &pmx_btn_power>;
- pinctrl-names = "default";
-
- button@1 {
- label = "Power Button";
- linux,code = <KEY_POWER>;
- gpios = <&gpio0 26 GPIO_ACTIVE_HIGH>;
- };
- button@2 {
- label = "Copy Button";
- linux,code = <KEY_COPY>;
- gpios = <&gpio0 25 GPIO_ACTIVE_LOW>;
- };
- button@3 {
- label = "Reset Button";
- linux,code = <KEY_RESTART>;
- gpios = <&gpio0 24 GPIO_ACTIVE_LOW>;
- };
- };
-
- gpio-leds {
- compatible = "gpio-leds";
- pinctrl-0 = <&pmx_led_hdd2_green &pmx_led_hdd2_red
- &pmx_led_usb_green
- &pmx_led_sys_green &pmx_led_sys_orange
- &pmx_led_copy_green &pmx_led_copy_red
- &pmx_led_hdd1_green &pmx_led_hdd1_red>;
- pinctrl-names = "default";
-
- green-sys {
- label = "nsa310s:green:sys";
- gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "default-on";
- };
- orange-sys {
- label = "nsa310s:orange:sys";
- gpios = <&gpio0 29 GPIO_ACTIVE_HIGH>;
- };
- green-hdd1 {
- label = "nsa310s:green:hdd1";
- gpios = <&gpio0 16 GPIO_ACTIVE_HIGH>;
- };
- red-hdd1 {
- label = "nsa310s:red:hdd1";
- gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
- };
- green-hdd2 {
- label = "nsa310s:green:hdd2";
- gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
- };
- red-hdd2 {
- label = "nsa310s:red:hdd2";
- gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>;
- };
- green-usb {
- label = "nsa310s:green:usb";
- gpios = <&gpio0 15 GPIO_ACTIVE_HIGH>;
- };
- green-copy {
- label = "nsa310s:green:copy";
- gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "ide-disk";
- };
- red-copy {
- label = "nsa310s:red:copy";
- gpios = <&gpio0 23 GPIO_ACTIVE_HIGH>;
- };
- };
-};
-
-&nand {
- status = "okay";
- chip-delay = <35>;
-
- partition@0 {
- label = "uboot";
- reg = <0x0000000 0x0100000>;
- };
- partition@100000 {
- label = "stock_uboot_env";
- reg = <0x0100000 0x0080000>;
- };
- partition@180000 {
- label = "key_store";
- reg = <0x0180000 0x0080000>;
- };
- partition@200000 {
- label = "info";
- reg = <0x0200000 0x0080000>;
- };
- partition@280000 {
- label = "etc";
- reg = <0x0280000 0x0a00000>;
- };
- partition@c80000 {
- label = "kernel_1";
- reg = <0x0c80000 0x0a00000>;
- };
- partition@1680000 {
- label = "rootfs1";
- reg = <0x1680000 0x2fc0000>;
- };
- partition@4640000 {
- label = "kernel_2";
- reg = <0x4640000 0x0a00000>;
- };
- partition@5040000 {
- label = "rootfs2";
- reg = <0x5040000 0x2fc0000>;
- };
-};
-
-&mdio {
- status = "okay";
- ethphy0: ethernet-phy@1 {
- compatible = "marvell,88e1510";
- reg = <1>;
- };
-};
-
-ð0 {
- status = "okay";
- ethernet0-port@0 {
- phy-handle = <ðphy0>;
- phy-mode = "rgmii";
- };
-};
-
-&pciec {
- status = "okay";
-};
-
-&pcie0 {
- status = "okay";
-};
diff --git a/arch/arm/dts/kirkwood-nsa325-u-boot.dtsi b/arch/arm/dts/kirkwood-nsa325-u-boot.dtsi
new file mode 100644
index 0000000..dec27b2
--- /dev/null
+++ b/arch/arm/dts/kirkwood-nsa325-u-boot.dtsi
@@ -0,0 +1,7 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+&nand {
+ partition@0 {
+ /delete-property/ read-only;
+ };
+};
diff --git a/arch/arm/dts/kirkwood-nsa325.dts b/arch/arm/dts/kirkwood-nsa325.dts
deleted file mode 100644
index efc57cf..0000000
--- a/arch/arm/dts/kirkwood-nsa325.dts
+++ /dev/null
@@ -1,231 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/* Device tree file for the Zyxel NSA 325 NAS box.
- *
- * Copyright (c) 2015, Hans Ulli Kroll <ulli.kroll@googlemail.com>
- *
- *
- * Based upon the board setup file created by Peter Schildmann
- */
-
-/dts-v1/;
-
-#include "kirkwood-nsa3x0-common.dtsi"
-
-/ {
- model = "ZyXEL NSA325";
- compatible = "zyxel,nsa325", "marvell,kirkwood-88f6282", "marvell,kirkwood";
-
- memory {
- device_type = "memory";
- reg = <0x00000000 0x20000000>;
- };
-
- chosen {
- bootargs = "console=ttyS0,115200";
- stdout-path = &uart0;
- };
-
- ocp@f1000000 {
- pinctrl: pin-controller@10000 {
- pinctrl-names = "default";
-
- pmx_led_hdd2_green: pmx-led-hdd2-green {
- marvell,pins = "mpp12";
- marvell,function = "gpio";
- };
-
- pmx_led_hdd2_red: pmx-led-hdd2-red {
- marvell,pins = "mpp13";
- marvell,function = "gpio";
- };
-
- pmx_mcu_data: pmx-mcu-data {
- marvell,pins = "mpp14";
- marvell,function = "gpio";
- };
-
- pmx_led_usb_green: pmx-led-usb-green {
- marvell,pins = "mpp15";
- marvell,function = "gpio";
- };
-
- pmx_mcu_clk: pmx-mcu-clk {
- marvell,pins = "mpp16";
- marvell,function = "gpio";
- };
-
- pmx_mcu_act: pmx-mcu-act {
- marvell,pins = "mpp17";
- marvell,function = "gpio";
- };
-
- pmx_led_sys_green: pmx-led-sys-green {
- marvell,pins = "mpp28";
- marvell,function = "gpio";
- };
-
- pmx_led_sys_orange: pmx-led-sys-orange {
- marvell,pins = "mpp29";
- marvell,function = "gpio";
- };
-
- pmx_led_hdd1_green: pmx-led-hdd1-green {
- marvell,pins = "mpp41";
- marvell,function = "gpio";
- };
-
- pmx_led_hdd1_red: pmx-led-hdd1-red {
- marvell,pins = "mpp42";
- marvell,function = "gpio";
- };
-
- pmx_htp: pmx-htp {
- marvell,pins = "mpp43";
- marvell,function = "gpio";
- };
-
- /*
- * Buzzer needs to be switched at around 1kHz so is
- * not compatible with the gpio-beeper driver.
- */
- pmx_buzzer: pmx-buzzer {
- marvell,pins = "mpp44";
- marvell,function = "gpio";
- };
-
- pmx_vid_b1: pmx-vid-b1 {
- marvell,pins = "mpp45";
- marvell,function = "gpio";
- };
-
- pmx_power_resume_data: pmx-power-resume-data {
- marvell,pins = "mpp47";
- marvell,function = "gpio";
- };
-
- pmx_power_resume_clk: pmx-power-resume-clk {
- marvell,pins = "mpp49";
- marvell,function = "gpio";
- };
-
- pmx_pwr_sata1: pmx-pwr-sata1 {
- marvell,pins = "mpp47";
- marvell,function = "gpio";
- };
- };
-
- /* This board uses the pcf8563 RTC instead of the SoC RTC */
- rtc@10300 {
- status = "disabled";
- };
-
- i2c@11000 {
- status = "okay";
-
- pcf8563: pcf8563@51 {
- compatible = "nxp,pcf8563";
- reg = <0x51>;
- };
- };
- };
-
- regulators {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <0>;
- pinctrl-0 = <&pmx_pwr_sata1>;
- pinctrl-names = "default";
-
- usb0_power: regulator@1 {
- enable-active-high;
- };
-
- sata1_power: regulator@2 {
- compatible = "regulator-fixed";
- reg = <2>;
- regulator-name = "SATA1 Power";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- regulator-always-on;
- regulator-boot-on;
- enable-active-high;
- gpio = <&gpio1 15 GPIO_ACTIVE_HIGH>;
- };
- };
-
- gpio-leds {
- compatible = "gpio-leds";
- pinctrl-0 = <&pmx_led_hdd2_green &pmx_led_hdd2_red
- &pmx_led_usb_green
- &pmx_led_sys_green &pmx_led_sys_orange
- &pmx_led_copy_green &pmx_led_copy_red
- &pmx_led_hdd1_green &pmx_led_hdd1_red>;
- pinctrl-names = "default";
-
- green-sys {
- label = "nsa325:green:sys";
- gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>;
- };
- orange-sys {
- label = "nsa325:orange:sys";
- gpios = <&gpio0 29 GPIO_ACTIVE_HIGH>;
- };
- green-hdd1 {
- label = "nsa325:green:hdd1";
- gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
- };
- red-hdd1 {
- label = "nsa325:red:hdd1";
- gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;
- };
- green-hdd2 {
- label = "nsa325:green:hdd2";
- gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>;
- };
- red-hdd2 {
- label = "nsa325:red:hdd2";
- gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
- };
- green-usb {
- label = "nsa325:green:usb";
- gpios = <&gpio0 15 GPIO_ACTIVE_HIGH>;
- };
- green-copy {
- label = "nsa325:green:copy";
- gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
- };
- red-copy {
- label = "nsa325:red:copy";
- gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
- };
-
- /* The following pins are currently not assigned to a driver,
- some of them should be configured as inputs.
- pinctrl-0 = <&pmx_mcu_data &pmx_mcu_clk &pmx_mcu_act
- &pmx_htp &pmx_vid_b1
- &pmx_power_resume_data &pmx_power_resume_clk>; */
- };
-
-};
-
-&mdio {
- status = "okay";
- ethphy0: ethernet-phy@1 {
- reg = <1>;
- };
-};
-
-ð0 {
- status = "okay";
- ethernet0-port@0 {
- phy-handle = <ðphy0>;
- };
-};
-
-&pciec {
- status = "okay";
-};
-
-&pcie0 {
- status = "okay";
-};
diff --git a/arch/arm/dts/kirkwood-nsa3x0-common.dtsi b/arch/arm/dts/kirkwood-nsa3x0-common.dtsi
deleted file mode 100644
index a21c50d..0000000
--- a/arch/arm/dts/kirkwood-nsa3x0-common.dtsi
+++ /dev/null
@@ -1,157 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-#include "kirkwood.dtsi"
-#include "kirkwood-6281.dtsi"
-
-/ {
- model = "ZyXEL NSA310";
-
- ocp@f1000000 {
- pinctrl: pin-controller@10000 {
-
- pmx_usb_power: pmx-usb-power {
- marvell,pins = "mpp21";
- marvell,function = "gpio";
- };
-
- pmx_pwr_off: pmx-pwr-off {
- marvell,pins = "mpp48";
- marvell,function = "gpio";
- };
-
- pmx_btn_reset: pmx-btn-reset {
- marvell,pins = "mpp36";
- marvell,function = "gpio";
- };
-
- pmx_btn_copy: pmx-btn-copy {
- marvell,pins = "mpp37";
- marvell,function = "gpio";
- };
-
- pmx_btn_power: pmx-btn-power {
- marvell,pins = "mpp46";
- marvell,function = "gpio";
- };
-
- pmx_led_copy_green: pmx-led-copy-green {
- marvell,pins = "mpp39";
- marvell,function = "gpio";
- };
-
- pmx_led_copy_red: pmx-led-copy-red {
- marvell,pins = "mpp40";
- marvell,function = "gpio";
- };
- };
-
- serial@12000 {
- status = "okay";
- };
-
- sata@80000 {
- status = "okay";
- nr-ports = <2>;
- };
- };
-
- gpio_poweroff {
- compatible = "gpio-poweroff";
- pinctrl-0 = <&pmx_pwr_off>;
- pinctrl-names = "default";
- gpios = <&gpio1 16 GPIO_ACTIVE_HIGH>;
- };
-
- gpio_keys {
- compatible = "gpio-keys";
- #address-cells = <1>;
- #size-cells = <0>;
- pinctrl-0 = <&pmx_btn_reset &pmx_btn_copy &pmx_btn_power>;
- pinctrl-names = "default";
-
- power {
- label = "Power Button";
- linux,code = <KEY_POWER>;
- gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
- };
- copy {
- label = "Copy Button";
- linux,code = <KEY_COPY>;
- gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
- };
- reset {
- label = "Reset Button";
- linux,code = <KEY_RESTART>;
- gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
- };
- };
-
-
- regulators {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <0>;
- pinctrl-0 = <&pmx_usb_power>;
- pinctrl-names = "default";
-
- usb0_power: regulator@1 {
- compatible = "regulator-fixed";
- reg = <1>;
- regulator-name = "USB Power";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- regulator-always-on;
- regulator-boot-on;
- gpio = <&gpio0 21 GPIO_ACTIVE_HIGH>;
- };
- };
-};
-
-&nand {
- status = "okay";
- chip-delay = <35>;
-
- partition@0 {
- label = "uboot";
- reg = <0x0000000 0x0100000>;
- };
- partition@100000 {
- label = "uboot_env";
- reg = <0x0100000 0x0080000>;
- };
- partition@180000 {
- label = "key_store";
- reg = <0x0180000 0x0080000>;
- };
- partition@200000 {
- label = "info";
- reg = <0x0200000 0x0080000>;
- };
- partition@280000 {
- label = "etc";
- reg = <0x0280000 0x0a00000>;
- };
- partition@c80000 {
- label = "kernel_1";
- reg = <0x0c80000 0x0a00000>;
- };
- partition@1680000 {
- label = "rootfs1";
- reg = <0x1680000 0x2fc0000>;
- };
- partition@4640000 {
- label = "kernel_2";
- reg = <0x4640000 0x0a00000>;
- };
- partition@5040000 {
- label = "rootfs2";
- reg = <0x5040000 0x2fc0000>;
- };
-};
-
-&pciec {
- status = "okay";
-};
-
-&pcie0 {
- status = "okay";
-};
diff --git a/arch/arm/dts/kirkwood-openrd-base.dts b/arch/arm/dts/kirkwood-openrd-base.dts
deleted file mode 100644
index 094191e..0000000
--- a/arch/arm/dts/kirkwood-openrd-base.dts
+++ /dev/null
@@ -1,39 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Marvell OpenRD Base Board Description
- *
- * Andrew Lunn <andrew@lunn.ch>
- *
- * This file contains the definitions that are specific to OpenRD
- * base variant of the Marvell Kirkwood Development Board.
- */
-
-/dts-v1/;
-
-#include "kirkwood-openrd.dtsi"
-
-/ {
- model = "OpenRD Base";
- compatible = "marvell,openrd-base", "marvell,openrd", "marvell,kirkwood-88f6281", "marvell,kirkwood";
-
- ocp@f1000000 {
- serial@12100 {
- status = "okay";
- };
- };
-};
-
-&mdio {
- status = "okay";
-
- ethphy0: ethernet-phy@8 {
- reg = <8>;
- };
-};
-
-ð0 {
- status = "okay";
- ethernet0-port@0 {
- phy-handle = <ðphy0>;
- };
-};
diff --git a/arch/arm/dts/kirkwood-openrd-client.dts b/arch/arm/dts/kirkwood-openrd-client.dts
deleted file mode 100644
index 74dc23d..0000000
--- a/arch/arm/dts/kirkwood-openrd-client.dts
+++ /dev/null
@@ -1,73 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Marvell OpenRD Client Board Description
- *
- * Andrew Lunn <andrew@lunn.ch>
- *
- * This file contains the definitions that are specific to OpenRD
- * client variant of the Marvell Kirkwood Development Board.
- */
-
-/dts-v1/;
-
-#include "kirkwood-openrd.dtsi"
-
-/ {
- model = "OpenRD Client";
- compatible = "marvell,openrd-client", "marvell,openrd", "marvell,kirkwood-88f6281", "marvell,kirkwood";
-
- ocp@f1000000 {
- audio-controller@a0000 {
- status = "okay";
- };
- i2c@11000 {
- status = "okay";
- clock-frequency = <400000>;
-
- cs42l51: cs42l51@4a {
- compatible = "cirrus,cs42l51";
- reg = <0x4a>;
- #sound-dai-cells = <0>;
- };
- };
- };
-
- sound {
- compatible = "simple-audio-card";
- simple-audio-card,format = "i2s";
- simple-audio-card,mclk-fs = <256>;
-
- simple-audio-card,cpu {
- sound-dai = <&audio0 0>;
- };
-
- simple-audio-card,codec {
- sound-dai = <&cs42l51>;
- };
- };
-};
-
-&mdio {
- status = "okay";
-
- ethphy0: ethernet-phy@8 {
- reg = <8>;
- };
- ethphy1: ethernet-phy@24 {
- reg = <24>;
- };
-};
-
-ð0 {
- status = "okay";
- ethernet0-port@0 {
- phy-handle = <ðphy0>;
- };
-};
-
-ð1 {
- status = "okay";
- ethernet1-port@0 {
- phy-handle = <ðphy1>;
- };
-};
diff --git a/arch/arm/dts/kirkwood-openrd-ultimate.dts b/arch/arm/dts/kirkwood-openrd-ultimate.dts
deleted file mode 100644
index 888e133..0000000
--- a/arch/arm/dts/kirkwood-openrd-ultimate.dts
+++ /dev/null
@@ -1,55 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Marvell OpenRD Ultimate Board Description
- *
- * Andrew Lunn <andrew@lunn.ch>
- *
- * This file contains the definitions that are specific to OpenRD
- * ultimate variant of the Marvell Kirkwood Development Board.
- */
-
-/dts-v1/;
-
-#include "kirkwood-openrd.dtsi"
-
-/ {
- model = "OpenRD Ultimate";
- compatible = "marvell,openrd-ultimate", "marvell,openrd", "marvell,kirkwood-88f6281", "marvell,kirkwood";
-
- ocp@f1000000 {
- i2c@11000 {
- status = "okay";
- clock-frequency = <400000>;
-
- cs42l51: cs42l51@4a {
- compatible = "cirrus,cs42l51";
- reg = <0x4a>;
- };
- };
- };
-};
-
-&mdio {
- status = "okay";
-
- ethphy0: ethernet-phy@0 {
- reg = <0>;
- };
- ethphy1: ethernet-phy@1 {
- reg = <1>;
- };
-};
-
-ð0 {
- status = "okay";
- ethernet0-port@0 {
- phy-handle = <ðphy0>;
- };
-};
-
-ð1 {
- status = "okay";
- ethernet1-port@0 {
- phy-handle = <ðphy1>;
- };
-};
diff --git a/arch/arm/dts/kirkwood-openrd.dtsi b/arch/arm/dts/kirkwood-openrd.dtsi
deleted file mode 100644
index 47f03c6..0000000
--- a/arch/arm/dts/kirkwood-openrd.dtsi
+++ /dev/null
@@ -1,122 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Marvell OpenRD (Base|Client|Ultimate) Board Description
- *
- * Andrew Lunn <andrew@lunn.ch>
- *
- * This file contains the definitions that are common between the three
- * variants of the Marvell Kirkwood Development Board.
- */
-
-#include "kirkwood.dtsi"
-#include "kirkwood-6281.dtsi"
-
-/ {
- memory {
- device_type = "memory";
- reg = <0x00000000 0x20000000>;
- };
-
- chosen {
- bootargs = "console=ttyS0,115200n8";
- stdout-path = &uart0;
- };
-
- ocp@f1000000 {
- pinctrl: pin-controller@10000 {
- pinctrl-0 = <&pmx_select28 &pmx_sdio_cd &pmx_select34>;
- pinctrl-names = "default";
-
- pmx_select28: pmx-select-rs232-rs485 {
- marvell,pins = "mpp28";
- marvell,function = "gpio";
- };
- pmx_sdio_cd: pmx-sdio-cd {
- marvell,pins = "mpp29";
- marvell,function = "gpio";
- };
- pmx_select34: pmx-select-uart-sd {
- marvell,pins = "mpp34";
- marvell,function = "gpio";
- };
- };
- serial@12000 {
- status = "okay";
-
- };
- sata@80000 {
- status = "okay";
- nr-ports = <2>;
- };
- mvsdio@90000 {
- status = "okay";
- cd-gpios = <&gpio0 29 9>;
- };
- gpio@10100 {
- p28 {
- gpio-hog;
- gpios = <28 GPIO_ACTIVE_HIGH>;
- /*
- * SelRS232or485 selects between RS-232 or RS-485
- * mode for the second UART.
- *
- * Low: RS-232
- * High: RS-485
- *
- * To use the second UART, you need to change also
- * the SelUARTorSD.
- */
- output-low;
- line-name = "SelRS232or485";
- };
- };
- gpio@10140 {
- p2 {
- gpio-hog;
- gpios = <2 GPIO_ACTIVE_HIGH>;
- /*
- * SelUARTorSD selects between the second UART
- * (serial@12100) and SD (mvsdio@90000).
- *
- * Low: UART
- * High: SD
- *
- * When changing this line make sure the newly
- * selected device node is enabled and the
- * previously selected device node is disabled.
- */
- output-high; /* Select SD by default */
- line-name = "SelUARTorSD";
- };
- };
- };
-};
-
-&nand {
- status = "okay";
- pinctrl-0 = <&pmx_nand>;
- pinctrl-names = "default";
-
- partition@0 {
- label = "u-boot";
- reg = <0x0000000 0x100000>;
- };
-
- partition@100000 {
- label = "uImage";
- reg = <0x0100000 0x400000>;
- };
-
- partition@600000 {
- label = "root";
- reg = <0x0600000 0x1FA00000>;
- };
-};
-
-&pciec {
- status = "okay";
-};
-
-&pcie0 {
- status = "okay";
-};
diff --git a/arch/arm/dts/kirkwood-pogo_e02.dts b/arch/arm/dts/kirkwood-pogo_e02.dts
deleted file mode 100644
index f9e95e5..0000000
--- a/arch/arm/dts/kirkwood-pogo_e02.dts
+++ /dev/null
@@ -1,132 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * kirkwood-pogo_e02.dts - Device tree file for Pogoplug E02
- *
- * Copyright (C) 2015 Christoph Junghans <ottxor@gentoo.org>
- *
- * based on information of dts files from
- * Arch Linux ARM by Oleg Rakhmanov <moonman.ca@gmail.com>
- * OpenWrt by Felix Kaechele <heffer@fedoraproject.org>
- *
- */
-
-/dts-v1/;
-
-#include "kirkwood.dtsi"
-#include "kirkwood-6281.dtsi"
-
-/ {
- model = "Cloud Engines Pogoplug E02";
- compatible = "cloudengines,pogoe02", "marvell,kirkwood-88f6281",
- "marvell,kirkwood";
-
- memory {
- device_type = "memory";
- reg = <0x00000000 0x10000000>;
- };
-
- chosen {
- bootargs = "console=ttyS0,115200n8";
- stdout-path = &uart0;
- };
-
- gpio-leds {
- compatible = "gpio-leds";
-
- health {
- label = "pogo_e02:green:health";
- gpios = <&gpio1 16 GPIO_ACTIVE_LOW>;
- default-state = "keep";
- };
- fault {
- label = "pogo_e02:orange:fault";
- gpios = <&gpio1 17 GPIO_ACTIVE_LOW>;
- };
- };
-
- regulators {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <0>;
- pinctrl-0 = <&pmx_usb_power_enable>;
- pinctrl-names = "default";
-
- usb_power: regulator@1 {
- compatible = "regulator-fixed";
- reg = <1>;
- regulator-name = "USB Power";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- enable-active-high;
- regulator-always-on;
- regulator-boot-on;
- gpio = <&gpio0 29 GPIO_ACTIVE_HIGH>;
- };
- };
-};
-
-&pinctrl {
- pinctrl-0 = < &pmx_usb_power_enable &pmx_led_orange
- &pmx_led_green >;
- pinctrl-names = "default";
-
- pmx_usb_power_enable: pmx-usb-power-enable {
- marvell,pins = "mpp29";
- marvell,function = "gpio";
- };
-
- pmx_led_green: pmx-led-green {
- marvell,pins = "mpp48";
- marvell,function = "gpio";
- };
-
- pmx_led_orange: pmx-led-orange {
- marvell,pins = "mpp49";
- marvell,function = "gpio";
- };
-};
-
-&uart0 {
- status = "okay";
-};
-
-&nand {
- chip-delay = <40>;
- status = "okay";
-
- partition@0 {
- label = "u-boot";
- reg = <0x0000000 0x100000>;
- read-only;
- };
-
- partition@100000 {
- label = "uImage";
- reg = <0x0100000 0x400000>;
- };
-
- partition@500000 {
- label = "pogoplug";
- reg = <0x0500000 0x2000000>;
- };
-
- partition@2500000 {
- label = "root";
- reg = <0x02500000 0x5b00000>;
- };
-};
-
-&mdio {
- status = "okay";
-
- ethphy0: ethernet-phy@0 {
- reg = <0>;
- };
-};
-
-ð0 {
- status = "okay";
- ethernet0-port@0 {
- phy-handle = <ðphy0>;
- };
-};
diff --git a/arch/arm/dts/kirkwood-pogoplug-series-4.dts b/arch/arm/dts/kirkwood-pogoplug-series-4.dts
deleted file mode 100644
index 5aa4669..0000000
--- a/arch/arm/dts/kirkwood-pogoplug-series-4.dts
+++ /dev/null
@@ -1,180 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * kirkwood-pogoplug-series-4.dts - Device tree file for PogoPlug Series 4
- * inspired by the board files made by Kevin Mihelich for ArchLinux,
- * and their DTS file.
- *
- * Copyright (C) 2015 Linus Walleij <linus.walleij@linaro.org>
- */
-
-/dts-v1/;
-
-#include "kirkwood.dtsi"
-#include "kirkwood-6192.dtsi"
-#include <dt-bindings/input/linux-event-codes.h>
-
-/ {
- model = "Cloud Engines PogoPlug Series 4";
- compatible = "cloudengines,pogoplugv4", "marvell,kirkwood-88f6192",
- "marvell,kirkwood";
-
- memory {
- device_type = "memory";
- reg = <0x00000000 0x08000000>;
- };
-
- chosen {
- stdout-path = "uart0:115200n8";
- };
-
- gpio_keys {
- compatible = "gpio-keys";
- #address-cells = <1>;
- #size-cells = <0>;
- pinctrl-0 = <&pmx_button_eject>;
- pinctrl-names = "default";
-
- eject {
- debounce-interval = <50>;
- wakeup-source;
- linux,code = <KEY_EJECTCD>;
- label = "Eject Button";
- gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
- };
- };
-
- gpio-leds {
- compatible = "gpio-leds";
- pinctrl-0 = <&pmx_led_green &pmx_led_red>;
- pinctrl-names = "default";
-
- health {
- label = "pogoplugv4:green:health";
- gpios = <&gpio0 22 GPIO_ACTIVE_LOW>;
- default-state = "on";
- };
- fault {
- label = "pogoplugv4:red:fault";
- gpios = <&gpio0 24 GPIO_ACTIVE_LOW>;
- };
- };
-};
-
-&pinctrl {
- pmx_sata0: pmx-sata0 {
- marvell,pins = "mpp21";
- marvell,function = "sata0";
- };
-
- pmx_sata1: pmx-sata1 {
- marvell,pins = "mpp20";
- marvell,function = "sata1";
- };
-
- pmx_sdio_cd: pmx-sdio-cd {
- marvell,pins = "mpp27";
- marvell,function = "gpio";
- };
-
- pmx_sdio_wp: pmx-sdio-wp {
- marvell,pins = "mpp28";
- marvell,function = "gpio";
- };
-
- pmx_button_eject: pmx-button-eject {
- marvell,pins = "mpp29";
- marvell,function = "gpio";
- };
-
- pmx_led_green: pmx-led-green {
- marvell,pins = "mpp22";
- marvell,function = "gpio";
- };
-
- pmx_led_red: pmx-led-red {
- marvell,pins = "mpp24";
- marvell,function = "gpio";
- };
-};
-
-&uart0 {
- status = "okay";
-};
-
-/*
- * This PCIE controller has a USB 3.0 XHCI controller at 1,0
- */
-&pciec {
- status = "okay";
-};
-
-&pcie0 {
- status = "okay";
-};
-
-&sata {
- status = "okay";
- pinctrl-0 = <&pmx_sata0 &pmx_sata1>;
- pinctrl-names = "default";
- nr-ports = <1>;
-};
-
-&sdio {
- status = "okay";
- pinctrl-0 = <&pmx_sdio &pmx_sdio_cd &pmx_sdio_wp>;
- pinctrl-names = "default";
- cd-gpios = <&gpio0 27 GPIO_ACTIVE_LOW>;
- wp-gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>;
-};
-
-&nand {
- /* 128 MiB of NAND flash */
- chip-delay = <40>;
- status = "okay";
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- partition@0 {
- label = "u-boot";
- reg = <0x00000000 0x200000>;
- read-only;
- };
-
- partition@200000 {
- label = "uImage";
- reg = <0x00200000 0x300000>;
- };
-
- partition@500000 {
- label = "uImage2";
- reg = <0x00500000 0x300000>;
- };
-
- partition@800000 {
- label = "failsafe";
- reg = <0x00800000 0x800000>;
- };
-
- partition@1000000 {
- label = "root";
- reg = <0x01000000 0x7000000>;
- };
- };
-};
-
-&mdio {
- status = "okay";
-
- ethphy0: ethernet-phy@0 {
- reg = <0>;
- };
-};
-
-ð0 {
- status = "okay";
- ethernet0-port@0 {
- phy-handle = <ðphy0>;
- };
-};
diff --git a/arch/arm/dts/kirkwood-sheevaplug-common.dtsi b/arch/arm/dts/kirkwood-sheevaplug-common.dtsi
deleted file mode 100644
index 0a698d3..0000000
--- a/arch/arm/dts/kirkwood-sheevaplug-common.dtsi
+++ /dev/null
@@ -1,104 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * kirkwood-sheevaplug-common.dtsi - Common parts for Sheevaplugs
- *
- * Copyright (C) 2013 Simon Baatz <gmbnomis@gmail.com>
- */
-
-#include "kirkwood.dtsi"
-#include "kirkwood-6281.dtsi"
-
-/ {
- memory {
- device_type = "memory";
- reg = <0x00000000 0x20000000>;
- };
-
- chosen {
- bootargs = "console=ttyS0,115200n8 earlyprintk";
- stdout-path = &uart0;
- };
-
- ocp@f1000000 {
- pinctrl: pin-controller@10000 {
-
- pmx_usb_power_enable: pmx-usb-power-enable {
- marvell,pins = "mpp29";
- marvell,function = "gpio";
- };
- pmx_led_red: pmx-led-red {
- marvell,pins = "mpp46";
- marvell,function = "gpio";
- };
- pmx_led_blue: pmx-led-blue {
- marvell,pins = "mpp49";
- marvell,function = "gpio";
- };
- pmx_sdio_cd: pmx-sdio-cd {
- marvell,pins = "mpp44";
- marvell,function = "gpio";
- };
- pmx_sdio_wp: pmx-sdio-wp {
- marvell,pins = "mpp47";
- marvell,function = "gpio";
- };
- };
- serial@12000 {
- status = "okay";
- };
- };
-
- regulators {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <0>;
- pinctrl-0 = <&pmx_usb_power_enable>;
- pinctrl-names = "default";
-
- usb_power: regulator@1 {
- compatible = "regulator-fixed";
- reg = <1>;
- regulator-name = "USB Power";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- enable-active-high;
- regulator-always-on;
- regulator-boot-on;
- gpio = <&gpio0 29 0>;
- };
- };
-};
-
-&nand {
- status = "okay";
-
- partition@0 {
- label = "u-boot";
- reg = <0x0000000 0x100000>;
- };
-
- partition@100000 {
- label = "uImage";
- reg = <0x0100000 0x400000>;
- };
-
- partition@500000 {
- label = "root";
- reg = <0x0500000 0x1fb00000>;
- };
-};
-
-&mdio {
- status = "okay";
-
- ethphy0: ethernet-phy@0 {
- reg = <0>;
- };
-};
-
-ð0 {
- status = "okay";
- ethernet0-port@0 {
- phy-handle = <ðphy0>;
- };
-};
diff --git a/arch/arm/dts/kirkwood-sheevaplug.dts b/arch/arm/dts/kirkwood-sheevaplug.dts
deleted file mode 100644
index c73cc90..0000000
--- a/arch/arm/dts/kirkwood-sheevaplug.dts
+++ /dev/null
@@ -1,42 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * kirkwood-sheevaplug.dts - Device tree file for Sheevaplug
- *
- * Copyright (C) 2013 Simon Baatz <gmbnomis@gmail.com>
- */
-
-/dts-v1/;
-
-#include "kirkwood-sheevaplug-common.dtsi"
-
-/ {
- model = "Globalscale Technologies SheevaPlug";
- compatible = "globalscale,sheevaplug", "marvell,kirkwood-88f6281", "marvell,kirkwood";
-
- ocp@f1000000 {
- mvsdio@90000 {
- pinctrl-0 = <&pmx_sdio>;
- pinctrl-names = "default";
- status = "okay";
- /* No CD or WP GPIOs */
- broken-cd;
- };
- };
-
- gpio-leds {
- compatible = "gpio-leds";
- pinctrl-0 = <&pmx_led_blue &pmx_led_red>;
- pinctrl-names = "default";
-
- health {
- label = "sheevaplug:blue:health";
- gpios = <&gpio1 17 GPIO_ACTIVE_LOW>;
- default-state = "keep";
- };
-
- misc {
- label = "sheevaplug:red:misc";
- gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
- };
- };
-};
diff --git a/arch/arm/dts/kirkwood-synology.dtsi b/arch/arm/dts/kirkwood-synology.dtsi
deleted file mode 100644
index c97ed29..0000000
--- a/arch/arm/dts/kirkwood-synology.dtsi
+++ /dev/null
@@ -1,855 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Nodes for Marvell 628x Synology devices
- *
- * Andrew Lunn <andrew@lunn.ch>
- * Ben Peddell <klightspeed@killerwolves.net>
- *
- */
-
-/ {
- ocp@f1000000 {
- pinctrl: pin-controller@10000 {
- pmx_alarmled_12: pmx-alarmled-12 {
- marvell,pins = "mpp12";
- marvell,function = "gpio";
- };
-
- pmx_fanctrl_15: pmx-fanctrl-15 {
- marvell,pins = "mpp15";
- marvell,function = "gpio";
- };
-
- pmx_fanctrl_16: pmx-fanctrl-16 {
- marvell,pins = "mpp16";
- marvell,function = "gpio";
- };
-
- pmx_fanctrl_17: pmx-fanctrl-17 {
- marvell,pins = "mpp17";
- marvell,function = "gpio";
- };
-
- pmx_fanalarm_18: pmx-fanalarm-18 {
- marvell,pins = "mpp18";
- marvell,function = "gpo";
- };
-
- pmx_hddled_20: pmx-hddled-20 {
- marvell,pins = "mpp20";
- marvell,function = "gpio";
- };
-
- pmx_hddled_21: pmx-hddled-21 {
- marvell,pins = "mpp21";
- marvell,function = "gpio";
- };
-
- pmx_hddled_22: pmx-hddled-22 {
- marvell,pins = "mpp22";
- marvell,function = "gpio";
- };
-
- pmx_hddled_23: pmx-hddled-23 {
- marvell,pins = "mpp23";
- marvell,function = "gpio";
- };
-
- pmx_hddled_24: pmx-hddled-24 {
- marvell,pins = "mpp24";
- marvell,function = "gpio";
- };
-
- pmx_hddled_25: pmx-hddled-25 {
- marvell,pins = "mpp25";
- marvell,function = "gpio";
- };
-
- pmx_hddled_26: pmx-hddled-26 {
- marvell,pins = "mpp26";
- marvell,function = "gpio";
- };
-
- pmx_hddled_27: pmx-hddled-27 {
- marvell,pins = "mpp27";
- marvell,function = "gpio";
- };
-
- pmx_hddled_28: pmx-hddled-28 {
- marvell,pins = "mpp28";
- marvell,function = "gpio";
- };
-
- pmx_hdd1_pwr_29: pmx-hdd1-pwr-29 {
- marvell,pins = "mpp29";
- marvell,function = "gpio";
- };
-
- pmx_hdd1_pwr_30: pmx-hdd-pwr-30 {
- marvell,pins = "mpp30";
- marvell,function = "gpio";
- };
-
- pmx_hdd2_pwr_31: pmx-hdd2-pwr-31 {
- marvell,pins = "mpp31";
- marvell,function = "gpio";
- };
-
- pmx_fanctrl_32: pmx-fanctrl-32 {
- marvell,pins = "mpp32";
- marvell,function = "gpio";
- };
-
- pmx_fanctrl_33: pmx-fanctrl-33 {
- marvell,pins = "mpp33";
- marvell,function = "gpo";
- };
-
- pmx_fanctrl_34: pmx-fanctrl-34 {
- marvell,pins = "mpp34";
- marvell,function = "gpio";
- };
-
- pmx_hdd2_pwr_34: pmx-hdd2-pwr-34 {
- marvell,pins = "mpp34";
- marvell,function = "gpio";
- };
-
- pmx_fanalarm_35: pmx-fanalarm-35 {
- marvell,pins = "mpp35";
- marvell,function = "gpio";
- };
-
- pmx_hddled_36: pmx-hddled-36 {
- marvell,pins = "mpp36";
- marvell,function = "gpio";
- };
-
- pmx_hddled_37: pmx-hddled-37 {
- marvell,pins = "mpp37";
- marvell,function = "gpio";
- };
-
- pmx_hddled_38: pmx-hddled-38 {
- marvell,pins = "mpp38";
- marvell,function = "gpio";
- };
-
- pmx_hddled_39: pmx-hddled-39 {
- marvell,pins = "mpp39";
- marvell,function = "gpio";
- };
-
- pmx_hddled_40: pmx-hddled-40 {
- marvell,pins = "mpp40";
- marvell,function = "gpio";
- };
-
- pmx_hddled_41: pmx-hddled-41 {
- marvell,pins = "mpp41";
- marvell,function = "gpio";
- };
-
- pmx_hddled_42: pmx-hddled-42 {
- marvell,pins = "mpp42";
- marvell,function = "gpio";
- };
-
- pmx_hddled_43: pmx-hddled-43 {
- marvell,pins = "mpp43";
- marvell,function = "gpio";
- };
-
- pmx_hddled_44: pmx-hddled-44 {
- marvell,pins = "mpp44";
- marvell,function = "gpio";
- };
-
- pmx_hddled_45: pmx-hddled-45 {
- marvell,pins = "mpp45";
- marvell,function = "gpio";
- };
-
- pmx_hdd3_pwr_44: pmx-hdd3-pwr-44 {
- marvell,pins = "mpp44";
- marvell,function = "gpio";
- };
-
- pmx_hdd4_pwr_45: pmx-hdd4-pwr-45 {
- marvell,pins = "mpp45";
- marvell,function = "gpio";
- };
-
- pmx_fanalarm_44: pmx-fanalarm-44 {
- marvell,pins = "mpp44";
- marvell,function = "gpio";
- };
-
- pmx_fanalarm_45: pmx-fanalarm-45 {
- marvell,pins = "mpp45";
- marvell,function = "gpio";
- };
- };
-
- rtc@10300 {
- status = "disabled";
- };
-
- spi@10600 {
- status = "okay";
-
- m25p80@0 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "st,m25p80", "jedec,spi-nor";
- reg = <0>;
- spi-max-frequency = <20000000>;
- mode = <0>;
-
- partition@0 {
- reg = <0x00000000 0x00080000>;
- label = "RedBoot";
- };
-
- partition@80000 {
- reg = <0x00080000 0x00200000>;
- label = "zImage";
- };
-
- partition@280000 {
- reg = <0x00280000 0x00140000>;
- label = "rd.gz";
- };
-
- partition@3c0000 {
- reg = <0x003c0000 0x00010000>;
- label = "vendor";
- };
-
- partition@3d0000 {
- reg = <0x003d0000 0x00020000>;
- label = "RedBoot config";
- };
-
- partition@3f0000 {
- reg = <0x003f0000 0x00010000>;
- label = "FIS directory";
- };
- };
- };
-
- i2c@11000 {
- status = "okay";
- clock-frequency = <400000>;
-
- rs5c372: rs5c372@32 {
- status = "disabled";
- compatible = "ricoh,rs5c372";
- reg = <0x32>;
- };
-
- s35390a: s35390a@30 {
- status = "disabled";
- compatible = "sii,s35390a";
- reg = <0x30>;
- };
- };
-
- serial@12000 {
- status = "okay";
- };
-
- serial@12100 {
- status = "okay";
- };
-
- poweroff@12100 {
- compatible = "synology,power-off";
- reg = <0x12100 0x100>;
- clocks = <&gate_clk 7>;
- };
-
- sata@80000 {
- pinctrl-0 = <&pmx_sata0 &pmx_sata1>;
- pinctrl-names = "default";
- status = "okay";
- nr-ports = <2>;
- };
- };
-
- gpio-fan-150-32-35 {
- status = "disabled";
- compatible = "gpio-fan";
- pinctrl-0 = <&pmx_fanctrl_32 &pmx_fanctrl_33 &pmx_fanctrl_34
- &pmx_fanalarm_35>;
- pinctrl-names = "default";
- gpios = <&gpio1 0 GPIO_ACTIVE_HIGH
- &gpio1 1 GPIO_ACTIVE_HIGH
- &gpio1 2 GPIO_ACTIVE_HIGH>;
- gpio-fan,speed-map = < 0 0
- 2200 1
- 2500 2
- 3000 4
- 3300 3
- 3700 5
- 3800 6
- 4200 7 >;
- };
-
- gpio-fan-150-15-18 {
- status = "disabled";
- compatible = "gpio-fan";
- pinctrl-0 = <&pmx_fanctrl_15 &pmx_fanctrl_16 &pmx_fanctrl_17
- &pmx_fanalarm_18>;
- pinctrl-names = "default";
- gpios = <&gpio0 15 GPIO_ACTIVE_HIGH
- &gpio0 16 GPIO_ACTIVE_HIGH
- &gpio0 17 GPIO_ACTIVE_HIGH>;
- alarm-gpios = <&gpio0 18 GPIO_ACTIVE_HIGH>;
- gpio-fan,speed-map = < 0 0
- 2200 1
- 2500 2
- 3000 4
- 3300 3
- 3700 5
- 3800 6
- 4200 7 >;
- };
-
- gpio-fan-100-32-35 {
- status = "disabled";
- compatible = "gpio-fan";
- pinctrl-0 = <&pmx_fanctrl_32 &pmx_fanctrl_33 &pmx_fanctrl_34
- &pmx_fanalarm_35>;
- pinctrl-names = "default";
- gpios = <&gpio1 0 GPIO_ACTIVE_HIGH
- &gpio1 1 GPIO_ACTIVE_HIGH
- &gpio1 2 GPIO_ACTIVE_HIGH>;
- alarm-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
- gpio-fan,speed-map = < 0 0
- 2500 1
- 3100 2
- 3800 3
- 4600 4
- 4800 5
- 4900 6
- 5000 7 >;
- };
-
- gpio-fan-100-15-18 {
- status = "disabled";
- compatible = "gpio-fan";
- pinctrl-0 = <&pmx_fanctrl_15 &pmx_fanctrl_16 &pmx_fanctrl_17
- &pmx_fanalarm_18>;
- pinctrl-names = "default";
- gpios = <&gpio0 15 GPIO_ACTIVE_HIGH
- &gpio0 16 GPIO_ACTIVE_HIGH
- &gpio0 17 GPIO_ACTIVE_HIGH>;
- alarm-gpios = <&gpio0 18 GPIO_ACTIVE_HIGH>;
- gpio-fan,speed-map = < 0 0
- 2500 1
- 3100 2
- 3800 3
- 4600 4
- 4800 5
- 4900 6
- 5000 7 >;
- };
-
- gpio-fan-100-15-35-1 {
- status = "disabled";
- compatible = "gpio-fan";
- pinctrl-0 = <&pmx_fanctrl_15 &pmx_fanctrl_16 &pmx_fanctrl_17
- &pmx_fanalarm_35>;
- pinctrl-names = "default";
- gpios = <&gpio0 15 GPIO_ACTIVE_HIGH
- &gpio0 16 GPIO_ACTIVE_HIGH
- &gpio0 17 GPIO_ACTIVE_HIGH>;
- alarm-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
- gpio-fan,speed-map = < 0 0
- 2500 1
- 3100 2
- 3800 3
- 4600 4
- 4800 5
- 4900 6
- 5000 7 >;
- };
-
- gpio-fan-100-15-35-3 {
- status = "disabled";
- compatible = "gpio-fan";
- pinctrl-0 = <&pmx_fanctrl_15 &pmx_fanctrl_16 &pmx_fanctrl_17
- &pmx_fanalarm_35 &pmx_fanalarm_44 &pmx_fanalarm_45>;
- pinctrl-names = "default";
- gpios = <&gpio0 15 GPIO_ACTIVE_HIGH
- &gpio0 16 GPIO_ACTIVE_HIGH
- &gpio0 17 GPIO_ACTIVE_HIGH>;
- alarm-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH
- &gpio1 12 GPIO_ACTIVE_HIGH
- &gpio1 13 GPIO_ACTIVE_HIGH>;
- gpio-fan,speed-map = < 0 0
- 2500 1
- 3100 2
- 3800 3
- 4600 4
- 4800 5
- 4900 6
- 5000 7 >;
- };
-
- gpio-leds-alarm-12 {
- status = "disabled";
- compatible = "gpio-leds";
- pinctrl-0 = <&pmx_alarmled_12>;
- pinctrl-names = "default";
-
- hdd1-green {
- label = "synology:alarm";
- gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
- };
- };
-
- gpio-leds-hdd-20 {
- status = "disabled";
- compatible = "gpio-leds";
- pinctrl-0 = <&pmx_hddled_20 &pmx_hddled_21 &pmx_hddled_22
- &pmx_hddled_23 &pmx_hddled_24 &pmx_hddled_25
- &pmx_hddled_26 &pmx_hddled_27>;
- pinctrl-names = "default";
-
- hdd1-green {
- label = "synology:green:hdd1";
- gpios = <&gpio0 20 GPIO_ACTIVE_LOW>;
- };
-
- hdd1-amber {
- label = "synology:amber:hdd1";
- gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
- };
-
- hdd2-green {
- label = "synology:green:hdd2";
- gpios = <&gpio0 22 GPIO_ACTIVE_LOW>;
- };
-
- hdd2-amber {
- label = "synology:amber:hdd2";
- gpios = <&gpio0 23 GPIO_ACTIVE_LOW>;
- };
-
- hdd3-green {
- label = "synology:green:hdd3";
- gpios = <&gpio0 24 GPIO_ACTIVE_LOW>;
- };
-
- hdd3-amber {
- label = "synology:amber:hdd3";
- gpios = <&gpio0 25 GPIO_ACTIVE_LOW>;
- };
-
- hdd4-green {
- label = "synology:green:hdd4";
- gpios = <&gpio0 26 GPIO_ACTIVE_LOW>;
- };
-
- hdd4-amber {
- label = "synology:amber:hdd4";
- gpios = <&gpio0 27 GPIO_ACTIVE_LOW>;
- };
- };
-
- gpio-leds-hdd-21-1 {
- status = "disabled";
- compatible = "gpio-leds";
- pinctrl-0 = <&pmx_hddled_21 &pmx_hddled_23>;
- pinctrl-names = "default";
-
- hdd1-green {
- label = "synology:green:hdd1";
- gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
- };
-
- hdd1-amber {
- label = "synology:amber:hdd1";
- gpios = <&gpio0 23 GPIO_ACTIVE_LOW>;
- };
- };
-
- gpio-leds-hdd-21-2 {
- status = "disabled";
- compatible = "gpio-leds";
- pinctrl-0 = <&pmx_hddled_21 &pmx_hddled_23 &pmx_hddled_20 &pmx_hddled_22>;
- pinctrl-names = "default";
-
- hdd1-green {
- label = "synology:green:hdd1";
- gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
- };
-
- hdd1-amber {
- label = "synology:amber:hdd1";
- gpios = <&gpio0 23 GPIO_ACTIVE_LOW>;
- };
-
- hdd2-green {
- label = "synology:green:hdd2";
- gpios = <&gpio0 20 GPIO_ACTIVE_LOW>;
- };
-
- hdd2-amber {
- label = "synology:amber:hdd2";
- gpios = <&gpio0 22 GPIO_ACTIVE_LOW>;
- };
- };
-
- gpio-leds-hdd-36 {
- status = "disabled";
- compatible = "gpio-leds";
- pinctrl-0 = <&pmx_hddled_36 &pmx_hddled_37 &pmx_hddled_38
- &pmx_hddled_39 &pmx_hddled_40 &pmx_hddled_41
- &pmx_hddled_42 &pmx_hddled_43 &pmx_hddled_44
- &pmx_hddled_45>;
- pinctrl-names = "default";
-
- hdd1-green {
- label = "synology:green:hdd1";
- gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
- };
-
- hdd1-amber {
- label = "synology:amber:hdd1";
- gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
- };
-
- hdd2-green {
- label = "synology:green:hdd2";
- gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
- };
-
- hdd2-amber {
- label = "synology:amber:hdd2";
- gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
- };
-
- hdd3-green {
- label = "synology:green:hdd3";
- gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
- };
-
- hdd3-amber {
- label = "synology:amber:hdd3";
- gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
- };
-
- hdd4-green {
- label = "synology:green:hdd4";
- gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
- };
-
- hdd4-amber {
- label = "synology:amber:hdd4";
- gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
- };
-
- hdd5-green {
- label = "synology:green:hdd5";
- gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
- };
-
- hdd5-amber {
- label = "synology:amber:hdd5";
- gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
- };
- };
-
- gpio-leds-hdd-38 {
- status = "disabled";
- compatible = "gpio-leds";
- pinctrl-0 = <&pmx_hddled_38 &pmx_hddled_39 &pmx_hddled_36 &pmx_hddled_37>;
- pinctrl-names = "default";
-
- hdd1-green {
- label = "synology:green:hdd1";
- gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
- };
-
- hdd1-amber {
- label = "synology:amber:hdd1";
- gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
- };
-
- hdd2-green {
- label = "synology:green:hdd2";
- gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
- };
-
- hdd2-amber {
- label = "synology:amber:hdd2";
- gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
- };
- };
-
- regulators-hdd-29 {
- status = "disabled";
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <0>;
- pinctrl-0 = <&pmx_hdd1_pwr_29 &pmx_hdd2_pwr_31>;
- pinctrl-names = "default";
-
- regulator@1 {
- compatible = "regulator-fixed";
- reg = <1>;
- regulator-name = "hdd1power";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- enable-active-high;
- regulator-always-on;
- regulator-boot-on;
- startup-delay-us = <5000000>;
- gpio = <&gpio0 29 GPIO_ACTIVE_HIGH>;
- };
-
- regulator@2 {
- compatible = "regulator-fixed";
- reg = <2>;
- regulator-name = "hdd2power";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- enable-active-high;
- regulator-always-on;
- regulator-boot-on;
- startup-delay-us = <5000000>;
- gpio = <&gpio0 31 GPIO_ACTIVE_HIGH>;
- };
- };
-
- regulators-hdd-30-1 {
- status = "disabled";
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <0>;
- pinctrl-0 = <&pmx_hdd1_pwr_30>;
- pinctrl-names = "default";
-
- regulator@1 {
- compatible = "regulator-fixed";
- reg = <1>;
- regulator-name = "hdd1power";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- enable-active-high;
- regulator-always-on;
- regulator-boot-on;
- startup-delay-us = <5000000>;
- gpio = <&gpio0 30 GPIO_ACTIVE_HIGH>;
- };
- };
-
- regulators-hdd-30-2 {
- status = "disabled";
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <0>;
- pinctrl-0 = <&pmx_hdd1_pwr_30 &pmx_hdd2_pwr_34>;
- pinctrl-names = "default";
-
- regulator@1 {
- compatible = "regulator-fixed";
- reg = <1>;
- regulator-name = "hdd1power";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- enable-active-high;
- regulator-always-on;
- regulator-boot-on;
- startup-delay-us = <5000000>;
- gpio = <&gpio0 30 GPIO_ACTIVE_HIGH>;
- };
-
- regulator@2 {
- compatible = "regulator-fixed";
- reg = <2>;
- regulator-name = "hdd2power";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- enable-active-high;
- regulator-always-on;
- regulator-boot-on;
- startup-delay-us = <5000000>;
- gpio = <&gpio1 2 GPIO_ACTIVE_HIGH>;
- };
- };
-
- regulators-hdd-30-4 {
- status = "disabled";
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <0>;
- pinctrl-0 = <&pmx_hdd1_pwr_30 &pmx_hdd2_pwr_34
- &pmx_hdd3_pwr_44 &pmx_hdd4_pwr_45>;
- pinctrl-names = "default";
-
- regulator@1 {
- compatible = "regulator-fixed";
- reg = <1>;
- regulator-name = "hdd1power";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- enable-active-high;
- regulator-always-on;
- regulator-boot-on;
- startup-delay-us = <5000000>;
- gpio = <&gpio0 30 GPIO_ACTIVE_HIGH>;
- };
-
- regulator@2 {
- compatible = "regulator-fixed";
- reg = <2>;
- regulator-name = "hdd2power";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- enable-active-high;
- regulator-always-on;
- regulator-boot-on;
- startup-delay-us = <5000000>;
- gpio = <&gpio1 2 GPIO_ACTIVE_HIGH>;
- };
-
- regulator@3 {
- compatible = "regulator-fixed";
- reg = <3>;
- regulator-name = "hdd3power";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- enable-active-high;
- regulator-always-on;
- regulator-boot-on;
- startup-delay-us = <5000000>;
- gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
- };
-
- regulator@4 {
- compatible = "regulator-fixed";
- reg = <4>;
- regulator-name = "hdd4power";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- enable-active-high;
- regulator-always-on;
- regulator-boot-on;
- startup-delay-us = <5000000>;
- gpio = <&gpio1 13 GPIO_ACTIVE_HIGH>;
- };
- };
-
- regulators-hdd-31 {
- status = "disabled";
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <0>;
- pinctrl-0 = <&pmx_hdd2_pwr_31>;
- pinctrl-names = "default";
-
- regulator@1 {
- compatible = "regulator-fixed";
- reg = <1>;
- regulator-name = "hdd2power";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- enable-active-high;
- regulator-always-on;
- regulator-boot-on;
- startup-delay-us = <5000000>;
- gpio = <&gpio0 31 GPIO_ACTIVE_HIGH>;
- };
- };
-
- regulators-hdd-34 {
- status = "disabled";
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <0>;
- pinctrl-0 = <&pmx_hdd2_pwr_34 &pmx_hdd3_pwr_44
- &pmx_hdd4_pwr_45>;
- pinctrl-names = "default";
-
- regulator@2 {
- compatible = "regulator-fixed";
- reg = <2>;
- regulator-name = "hdd2power";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- enable-active-high;
- regulator-always-on;
- regulator-boot-on;
- startup-delay-us = <5000000>;
- gpio = <&gpio1 2 GPIO_ACTIVE_HIGH>;
- };
-
- regulator@3 {
- compatible = "regulator-fixed";
- reg = <3>;
- regulator-name = "hdd3power";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- enable-active-high;
- regulator-always-on;
- regulator-boot-on;
- startup-delay-us = <5000000>;
- gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
- };
-
- regulator@4 {
- compatible = "regulator-fixed";
- reg = <4>;
- regulator-name = "hdd4power";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- enable-active-high;
- regulator-always-on;
- regulator-boot-on;
- startup-delay-us = <5000000>;
- gpio = <&gpio1 13 GPIO_ACTIVE_HIGH>;
- };
- };
-};
-
-&mdio {
- status = "okay";
-
- ethphy0: ethernet-phy@0 {
- device_type = "ethernet-phy";
- reg = <8>;
- };
-
- ethphy1: ethernet-phy@1 {
- device_type = "ethernet-phy";
- reg = <9>;
- };
-};
-
-ð0 {
- status = "okay";
-
- ethernet0-port@0 {
- phy-handle = <ðphy0>;
- };
-};
-
-ð1 {
- status = "disabled";
-
- ethernet1-port@0 {
- phy-handle = <ðphy1>;
- };
-};
-
-&pciec {
- status = "okay";
-};
-
-&pcie0 {
- status = "okay";
-};
diff --git a/arch/arm/dts/kirkwood.dtsi b/arch/arm/dts/kirkwood.dtsi
deleted file mode 100644
index 81c7eda..0000000
--- a/arch/arm/dts/kirkwood.dtsi
+++ /dev/null
@@ -1,393 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/include/ "skeleton.dtsi"
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/gpio/gpio.h>
-
-#define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16))
-
-/ {
- compatible = "marvell,kirkwood";
- interrupt-parent = <&intc>;
-
- cpus {
- #address-cells = <1>;
- #size-cells = <0>;
-
- cpu@0 {
- device_type = "cpu";
- compatible = "marvell,feroceon";
- reg = <0>;
- clocks = <&core_clk 1>, <&core_clk 3>, <&gate_clk 11>;
- clock-names = "cpu_clk", "ddrclk", "powersave";
- };
- };
-
- aliases {
- gpio0 = &gpio0;
- gpio1 = &gpio1;
- i2c0 = &i2c0;
- };
-
- mbus@f1000000 {
- compatible = "marvell,kirkwood-mbus", "simple-bus";
- #address-cells = <2>;
- #size-cells = <1>;
- /* If a board file needs to change this ranges it must replace it completely */
- ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000 /* internal-regs */
- MBUS_ID(0x01, 0x2f) 0 0xf4000000 0x10000 /* nand flash */
- MBUS_ID(0x03, 0x01) 0 0xf5000000 0x10000 /* crypto sram */
- >;
- controller = <&mbusc>;
- pcie-mem-aperture = <0xe0000000 0x10000000>; /* 256 MiB memory space */
- pcie-io-aperture = <0xf2000000 0x100000>; /* 1 MiB I/O space */
-
- nand: nand@12f {
- #address-cells = <1>;
- #size-cells = <1>;
- cle = <0>;
- ale = <1>;
- bank-width = <1>;
- compatible = "marvell,orion-nand";
- reg = <MBUS_ID(0x01, 0x2f) 0 0x400>;
- chip-delay = <25>;
- /* set partition map and/or chip-delay in board dts */
- clocks = <&gate_clk 7>;
- pinctrl-0 = <&pmx_nand>;
- pinctrl-names = "default";
- status = "disabled";
- };
-
- crypto_sram: sa-sram@301 {
- compatible = "mmio-sram";
- reg = <MBUS_ID(0x03, 0x01) 0x0 0x800>;
- clocks = <&gate_clk 17>;
- #address-cells = <1>;
- #size-cells = <1>;
- };
- };
-
- ocp@f1000000 {
- compatible = "simple-bus";
- ranges = <0x00000000 0xf1000000 0x0100000>;
- #address-cells = <1>;
- #size-cells = <1>;
-
- pinctrl: pin-controller@10000 {
- /* set compatible property in SoC file */
- reg = <0x10000 0x20>;
-
- pmx_ge1: pmx-ge1 {
- marvell,pins = "mpp20", "mpp21", "mpp22", "mpp23",
- "mpp24", "mpp25", "mpp26", "mpp27",
- "mpp30", "mpp31", "mpp32", "mpp33";
- marvell,function = "ge1";
- };
-
- pmx_nand: pmx-nand {
- marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3",
- "mpp4", "mpp5", "mpp18", "mpp19";
- marvell,function = "nand";
- };
-
- /*
- * Default SPI0 pinctrl setting with CSn on mpp0,
- * overwrite marvell,pins on board level if required.
- */
- pmx_spi: pmx-spi {
- marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3";
- marvell,function = "spi";
- };
-
- pmx_twsi0: pmx-twsi0 {
- marvell,pins = "mpp8", "mpp9";
- marvell,function = "twsi0";
- };
-
- /*
- * Default UART pinctrl setting without RTS/CTS,
- * overwrite marvell,pins on board level if required.
- */
- pmx_uart0: pmx-uart0 {
- marvell,pins = "mpp10", "mpp11";
- marvell,function = "uart0";
- };
-
- pmx_uart1: pmx-uart1 {
- marvell,pins = "mpp13", "mpp14";
- marvell,function = "uart1";
- };
- };
-
- core_clk: core-clocks@10030 {
- compatible = "marvell,kirkwood-core-clock";
- reg = <0x10030 0x4>;
- #clock-cells = <1>;
- };
-
- spi0: spi@10600 {
- compatible = "marvell,orion-spi";
- #address-cells = <1>;
- #size-cells = <0>;
- cell-index = <0>;
- interrupts = <23>;
- reg = <0x10600 0x28>;
- clocks = <&gate_clk 7>;
- pinctrl-0 = <&pmx_spi>;
- pinctrl-names = "default";
- status = "disabled";
- };
-
- gpio0: gpio@10100 {
- compatible = "marvell,orion-gpio";
- #gpio-cells = <2>;
- gpio-controller;
- reg = <0x10100 0x40>;
- ngpios = <32>;
- interrupt-controller;
- #interrupt-cells = <2>;
- interrupts = <35>, <36>, <37>, <38>;
- clocks = <&gate_clk 7>;
- };
-
- gpio1: gpio@10140 {
- compatible = "marvell,orion-gpio";
- #gpio-cells = <2>;
- gpio-controller;
- reg = <0x10140 0x40>;
- ngpios = <18>;
- interrupt-controller;
- #interrupt-cells = <2>;
- interrupts = <39>, <40>, <41>;
- clocks = <&gate_clk 7>;
- };
-
- i2c0: i2c@11000 {
- compatible = "marvell,mv64xxx-i2c";
- reg = <0x11000 0x20>;
- #address-cells = <1>;
- #size-cells = <0>;
- interrupts = <29>;
- clock-frequency = <100000>;
- clocks = <&gate_clk 7>;
- pinctrl-0 = <&pmx_twsi0>;
- pinctrl-names = "default";
- status = "disabled";
- };
-
- uart0: serial@12000 {
- compatible = "ns16550a";
- reg = <0x12000 0x100>;
- reg-shift = <2>;
- interrupts = <33>;
- clocks = <&gate_clk 7>;
- pinctrl-0 = <&pmx_uart0>;
- pinctrl-names = "default";
- status = "disabled";
- };
-
- uart1: serial@12100 {
- compatible = "ns16550a";
- reg = <0x12100 0x100>;
- reg-shift = <2>;
- interrupts = <34>;
- clocks = <&gate_clk 7>;
- pinctrl-0 = <&pmx_uart1>;
- pinctrl-names = "default";
- status = "disabled";
- };
-
- mbusc: mbus-controller@20000 {
- compatible = "marvell,mbus-controller";
- reg = <0x20000 0x80>, <0x1500 0x20>;
- };
-
- sysc: system-controller@20000 {
- compatible = "marvell,orion-system-controller";
- reg = <0x20000 0x120>;
- };
-
- bridge_intc: bridge-interrupt-ctrl@20110 {
- compatible = "marvell,orion-bridge-intc";
- interrupt-controller;
- #interrupt-cells = <1>;
- reg = <0x20110 0x8>;
- interrupts = <1>;
- marvell,#interrupts = <6>;
- };
-
- gate_clk: clock-gating-control@2011c {
- compatible = "marvell,kirkwood-gating-clock";
- reg = <0x2011c 0x4>;
- clocks = <&core_clk 0>;
- #clock-cells = <1>;
- };
-
- l2: l2-cache@20128 {
- compatible = "marvell,kirkwood-cache";
- reg = <0x20128 0x4>;
- };
-
- intc: main-interrupt-ctrl@20200 {
- compatible = "marvell,orion-intc";
- interrupt-controller;
- #interrupt-cells = <1>;
- reg = <0x20200 0x10>, <0x20210 0x10>;
- };
-
- timer: timer@20300 {
- compatible = "marvell,orion-timer";
- reg = <0x20300 0x20>;
- interrupt-parent = <&bridge_intc>;
- interrupts = <1>, <2>;
- clocks = <&core_clk 0>;
- };
-
- wdt: watchdog-timer@20300 {
- compatible = "marvell,orion-wdt";
- reg = <0x20300 0x28>, <0x20108 0x4>;
- interrupt-parent = <&bridge_intc>;
- interrupts = <3>;
- clocks = <&gate_clk 7>;
- status = "okay";
- };
-
- cesa: crypto@30000 {
- compatible = "marvell,kirkwood-crypto";
- reg = <0x30000 0x10000>;
- reg-names = "regs";
- interrupts = <22>;
- clocks = <&gate_clk 17>;
- marvell,crypto-srams = <&crypto_sram>;
- marvell,crypto-sram-size = <0x800>;
- status = "okay";
- };
-
- usb0: ehci@50000 {
- compatible = "marvell,orion-ehci";
- reg = <0x50000 0x1000>;
- interrupts = <19>;
- clocks = <&gate_clk 3>;
- status = "okay";
- };
-
- dma0: xor@60800 {
- compatible = "marvell,orion-xor";
- reg = <0x60800 0x100
- 0x60A00 0x100>;
- status = "okay";
- clocks = <&gate_clk 8>;
-
- xor00 {
- interrupts = <5>;
- dmacap,memcpy;
- dmacap,xor;
- };
- xor01 {
- interrupts = <6>;
- dmacap,memcpy;
- dmacap,xor;
- dmacap,memset;
- };
- };
-
- dma1: xor@60900 {
- compatible = "marvell,orion-xor";
- reg = <0x60900 0x100
- 0x60B00 0x100>;
- status = "okay";
- clocks = <&gate_clk 16>;
-
- xor00 {
- interrupts = <7>;
- dmacap,memcpy;
- dmacap,xor;
- };
- xor01 {
- interrupts = <8>;
- dmacap,memcpy;
- dmacap,xor;
- dmacap,memset;
- };
- };
-
- eth0: ethernet-controller@72000 {
- compatible = "marvell,kirkwood-eth";
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0x72000 0x4000>;
- clocks = <&gate_clk 0>;
- marvell,tx-checksum-limit = <1600>;
- status = "disabled";
-
- eth0port: ethernet0-port@0 {
- compatible = "marvell,kirkwood-eth-port";
- reg = <0>;
- interrupts = <11>;
- /* overwrite MAC address in bootloader */
- local-mac-address = [00 00 00 00 00 00];
- /* set phy-handle property in board file */
- };
- };
-
- mdio: mdio-bus@72004 {
- compatible = "marvell,orion-mdio";
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0x72004 0x84>;
- interrupts = <46>;
- clocks = <&gate_clk 0>;
- status = "disabled";
-
- /* add phy nodes in board file */
- };
-
- eth1: ethernet-controller@76000 {
- compatible = "marvell,kirkwood-eth";
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0x76000 0x4000>;
- clocks = <&gate_clk 19>;
- marvell,tx-checksum-limit = <1600>;
- pinctrl-0 = <&pmx_ge1>;
- pinctrl-names = "default";
- status = "disabled";
-
- eth1port: ethernet1-port@0 {
- compatible = "marvell,kirkwood-eth-port";
- reg = <0>;
- interrupts = <15>;
- /* overwrite MAC address in bootloader */
- local-mac-address = [00 00 00 00 00 00];
- /* set phy-handle property in board file */
- };
- };
-
- sata_phy0: sata-phy@82000 {
- compatible = "marvell,mvebu-sata-phy";
- reg = <0x82000 0x0334>;
- clocks = <&gate_clk 14>;
- clock-names = "sata";
- #phy-cells = <0>;
- status = "ok";
- };
-
- sata_phy1: sata-phy@84000 {
- compatible = "marvell,mvebu-sata-phy";
- reg = <0x84000 0x0334>;
- clocks = <&gate_clk 15>;
- clock-names = "sata";
- #phy-cells = <0>;
- status = "ok";
- };
-
- audio0: audio-controller@a0000 {
- compatible = "marvell,kirkwood-audio";
- #sound-dai-cells = <0>;
- reg = <0xa0000 0x2210>;
- interrupts = <24>;
- clocks = <&gate_clk 9>;
- clock-names = "internal";
- status = "disabled";
- };
- };
-};
diff --git a/arch/arm/dts/meson-axg-jethome-jethub-j100.dts b/arch/arm/dts/meson-axg-jethome-jethub-j100.dts
deleted file mode 100644
index 5783732..0000000
--- a/arch/arm/dts/meson-axg-jethome-jethub-j100.dts
+++ /dev/null
@@ -1,361 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2021 Vyacheslav Bocharov <adeep@lexina.in>
- * Copyright (c) 2020 JetHome
- * Author: Aleksandr Kazantsev <ak@tvip.ru>
- * Author: Alexey Shevelkin <ash@tvip.ru>
- * Author: Vyacheslav Bocharov <adeep@lexina.in>
- */
-
-/dts-v1/;
-
-#include "meson-axg.dtsi"
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/thermal/thermal.h>
-
-/ {
- compatible = "jethome,jethub-j100", "amlogic,a113d", "amlogic,meson-axg";
- model = "JetHome JetHub J100";
- aliases {
- serial0 = &uart_AO; /* Console */
- serial1 = &uart_AO_B; /* External UART (Wireless Module) */
- ethernet0 = ðmac;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- /* 1024MB RAM */
- memory@0 {
- device_type = "memory";
- reg = <0x0 0x0 0x0 0x40000000>;
- };
-
- reserved-memory {
- linux,cma {
- size = <0x0 0x400000>;
- };
- };
-
- emmc_pwrseq: emmc-pwrseq {
- compatible = "mmc-pwrseq-emmc";
- reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
- };
-
- vcc_3v3: regulator-vcc_3v3 {
- compatible = "regulator-fixed";
- regulator-name = "VCC_3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vddao_3v3>;
- regulator-always-on;
- };
-
- vcc_5v: regulator-vcc_5v {
- compatible = "regulator-fixed";
- regulator-name = "VCC5V";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- regulator-always-on;
- };
-
- vddao_3v3: regulator-vddao_3v3 {
- compatible = "regulator-fixed";
- regulator-name = "VDDAO_3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vcc_5v>;
- regulator-always-on;
- };
-
- vddio_ao18: regulator-vddio_ao18 {
- compatible = "regulator-fixed";
- regulator-name = "VDDIO_AO18";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vddao_3v3>;
- regulator-always-on;
- };
-
- vddio_boot: regulator-vddio_boot {
- compatible = "regulator-fixed";
- regulator-name = "VDDIO_BOOT";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vddao_3v3>;
- regulator-always-on;
- };
-
- usb_pwr: regulator-usb_pwr {
- compatible = "regulator-fixed";
- regulator-name = "USB_PWR";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc_5v>;
- regulator-always-on;
- };
-
- sdio_pwrseq: sdio-pwrseq {
- compatible = "mmc-pwrseq-simple";
- reset-gpios = <&gpio GPIOX_7 GPIO_ACTIVE_LOW>;
- clocks = <&wifi32k>;
- clock-names = "ext_clock";
- };
-
- wifi32k: wifi32k {
- compatible = "pwm-clock";
- #clock-cells = <0>;
- clock-frequency = <32768>;
- pwms = <&pwm_ab 0 30518 0>; /* PWM_A at 32.768KHz */
- };
-
- thermal-zones {
- cpu_thermal: cpu-thermal {
- polling-delay-passive = <250>;
- polling-delay = <1000>;
- thermal-sensors = <&scpi_sensors 0>;
- trips {
- cpu_passive: cpu-passive {
- temperature = <70000>; /* millicelsius */
- hysteresis = <2000>; /* millicelsius */
- type = "passive";
- };
-
- cpu_hot: cpu-hot {
- temperature = <80000>; /* millicelsius */
- hysteresis = <2000>; /* millicelsius */
- type = "hot";
- };
-
- cpu_critical: cpu-critical {
- temperature = <100000>; /* millicelsius */
- hysteresis = <2000>; /* millicelsius */
- type = "critical";
- };
- };
- };
-
- cpu_cooling_maps: cooling-maps {
- map0 {
- trip = <&cpu_passive>;
- cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- };
-
- map1 {
- trip = <&cpu_hot>;
- cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- };
- };
- };
- onewire {
- compatible = "w1-gpio";
- gpios = <&gpio GPIOA_14 GPIO_ACTIVE_HIGH>;
- #gpio-cells = <1>;
- };
-};
-
-&efuse {
- sn: sn@32 {
- reg = <0x32 0x20>;
- };
-
- eth_mac: eth_mac@0 {
- reg = <0x0 0x6>;
- };
-
- bt_mac: bt_mac@6 {
- reg = <0x6 0x6>;
- };
-
- wifi_mac: wifi_mac@c {
- reg = <0xc 0x6>;
- };
-
- bid: bid@12 {
- reg = <0x12 0x20>;
- };
-};
-
-ðmac {
- status = "okay";
- pinctrl-0 = <ð_rmii_x_pins>;
- pinctrl-names = "default";
- phy-handle = <ð_phy0>;
- phy-mode = "rmii";
-
- mdio {
- compatible = "snps,dwmac-mdio";
- #address-cells = <1>;
- #size-cells = <0>;
-
- /* ICPlus IP101A/G Ethernet PHY (vendor_id=0x0243, model_id=0x0c54) */
- eth_phy0: ethernet-phy@0 {
- /* compatible = "ethernet-phy-id0243.0c54";*/
- max-speed = <100>;
- reg = <0>;
-
- reset-assert-us = <10000>;
- reset-deassert-us = <10000>;
- reset-gpios = <&gpio GPIOZ_5 GPIO_ACTIVE_LOW>;
- };
- };
-};
-
-/* Internal I2C bus (on CPU module) */
-&i2c1 {
- status = "okay";
- pinctrl-0 = <&i2c1_z_pins>;
- pinctrl-names = "default";
-
- /* RTC */
- pcf8563: pcf8563@51 {
- compatible = "nxp,pcf8563";
- reg = <0x51>;
- status = "okay";
- };
-};
-
-/* Peripheral I2C bus (on motherboard) */
-&i2c_AO {
- status = "okay";
- pinctrl-0 = <&i2c_ao_sck_10_pins>, <&i2c_ao_sda_11_pins>;
- pinctrl-names = "default";
-};
-
-&pwm_ab {
- status = "okay";
- pinctrl-0 = <&pwm_a_x20_pins>;
- pinctrl-names = "default";
-};
-
-/* wifi module */
-&sd_emmc_b {
- status = "okay";
- #address-cells = <1>;
- #size-cells = <0>;
-
- pinctrl-0 = <&sdio_pins>;
- pinctrl-1 = <&sdio_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <4>;
- cap-sd-highspeed;
- sd-uhs-sdr104;
- max-frequency = <200000000>;
- non-removable;
- disable-wp;
-
- mmc-pwrseq = <&sdio_pwrseq>;
-
- vmmc-supply = <&vddao_3v3>;
- vqmmc-supply = <&vddio_boot>;
-
- brcmf: wifi@1 {
- reg = <1>;
- compatible = "brcm,bcm4329-fmac";
- };
-};
-
-/* emmc storage */
-&sd_emmc_c {
- status = "okay";
- pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>;
- pinctrl-1 = <&emmc_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <8>;
- cap-mmc-highspeed;
- max-frequency = <200000000>;
- non-removable;
- disable-wp;
- mmc-ddr-1_8v;
- mmc-hs200-1_8v;
-
- mmc-pwrseq = <&emmc_pwrseq>;
-
- vmmc-supply = <&vcc_3v3>;
- vqmmc-supply = <&vddio_boot>;
-};
-
-/* UART Bluetooth */
-&uart_B {
- status = "okay";
- pinctrl-0 = <&uart_b_z_pins>, <&uart_b_z_cts_rts_pins>;
- pinctrl-names = "default";
- uart-has-rtscts;
-
- bluetooth {
- compatible = "brcm,bcm43438-bt";
- shutdown-gpios = <&gpio GPIOZ_7 GPIO_ACTIVE_HIGH>;
- };
-};
-
-/* UART Console */
-&uart_AO {
- status = "okay";
- pinctrl-0 = <&uart_ao_a_pins>;
- pinctrl-names = "default";
-};
-
-/* UART Wireless module */
-&uart_AO_B {
- status = "okay";
- pinctrl-0 = <&uart_ao_b_pins>;
- pinctrl-names = "default";
-};
-
-&usb {
- status = "okay";
- phy-supply = <&usb_pwr>;
-};
-
-&spicc1 {
- status = "okay";
- pinctrl-0 = <&spi1_x_pins>, <&spi1_ss0_x_pins>;
- pinctrl-names = "default";
-};
-
-&gpio {
- gpio-line-names =
- "", "", "", "", "", // 0 - 4
- "", "", "", "", "", // 5 - 9
- "UserButton", "", "", "", "", // 10 - 14
- "", "", "", "", "", // 15 - 19
- "", "", "", "", "", // 20 - 24
- "", "LedRed", "LedGreen", "Output3", "Output2", // 25 - 29
- "Output1", "", "", "", "", // 30 - 34
- "", "ZigBeeBOOT", "", "", "", // 35 - 39
- "", "ZigBeeRESET", "", "Input4", "Input3", // 40 - 44
- "Input2", "Input1", "", "", "", // 45 - 49
- "", "", "", "", "", // 50 - 54
- "", "", "", "", "", // 55 - 59
- "", "", "", "", "", // 60 - 64
- "", "", "", "", "", // 65 - 69
- "", "", "", "", "", // 70 - 74
- "", "", "", "", "", // 75 - 79
- "", "", "", "", "", // 80 - 84
- "", ""; // 85-86
-};
-
-&cpu0 {
- #cooling-cells = <2>;
-};
-
-&cpu1 {
- #cooling-cells = <2>;
-};
-
-&cpu2 {
- #cooling-cells = <2>;
-};
-
-&cpu3 {
- #cooling-cells = <2>;
-};
diff --git a/arch/arm/dts/meson-axg-s400.dts b/arch/arm/dts/meson-axg-s400.dts
deleted file mode 100644
index 359589d..0000000
--- a/arch/arm/dts/meson-axg-s400.dts
+++ /dev/null
@@ -1,602 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2017 Amlogic, Inc. All rights reserved.
- */
-
-/dts-v1/;
-
-#include "meson-axg.dtsi"
-#include <dt-bindings/input/input.h>
-
-/ {
- compatible = "amlogic,s400", "amlogic,a113d", "amlogic,meson-axg";
- model = "Amlogic Meson AXG S400 Development Board";
-
- adc_keys {
- compatible = "adc-keys";
- io-channels = <&saradc 0>;
- io-channel-names = "buttons";
- keyup-threshold-microvolt = <1800000>;
-
- button-next {
- label = "Next";
- linux,code = <KEY_NEXT>;
- press-threshold-microvolt = <1116000>; /* 62% */
- };
-
- button-prev {
- label = "Previous";
- linux,code = <KEY_PREVIOUS>;
- press-threshold-microvolt = <900000>; /* 50% */
- };
-
- button-wifi {
- label = "Wifi";
- linux,code = <KEY_WLAN>;
- press-threshold-microvolt = <684000>; /* 38% */
- };
-
- button-up {
- label = "Volume Up";
- linux,code = <KEY_VOLUMEUP>;
- press-threshold-microvolt = <468000>; /* 26% */
- };
-
- button-down {
- label = "Volume Down";
- linux,code = <KEY_VOLUMEDOWN>;
- press-threshold-microvolt = <252000>; /* 14% */
- };
-
- button-voice {
- label = "Voice";
- linux,code = <KEY_VOICECOMMAND>;
- press-threshold-microvolt = <0>; /* 0% */
- };
- };
-
- aliases {
- serial0 = &uart_AO;
- serial1 = &uart_A;
- };
-
- linein: audio-codec-0 {
- #sound-dai-cells = <0>;
- compatible = "everest,es7241";
- VDDA-supply = <&vcc_3v3>;
- VDDP-supply = <&vcc_3v3>;
- VDDD-supply = <&vcc_3v3>;
- status = "okay";
- sound-name-prefix = "Linein";
- };
-
- lineout: audio-codec-1 {
- #sound-dai-cells = <0>;
- compatible = "everest,es7154";
- VDD-supply = <&vcc_3v3>;
- PVDD-supply = <&vcc_5v>;
- status = "okay";
- sound-name-prefix = "Lineout";
- };
-
- spdif_dit: audio-codec-2 {
- #sound-dai-cells = <0>;
- compatible = "linux,spdif-dit";
- status = "okay";
- sound-name-prefix = "DIT";
- };
-
- dmics: audio-codec-3 {
- #sound-dai-cells = <0>;
- compatible = "dmic-codec";
- num-channels = <7>;
- wakeup-delay-ms = <50>;
- status = "okay";
- sound-name-prefix = "MIC";
- };
-
- spdif_dir: audio-codec-4 {
- #sound-dai-cells = <0>;
- compatible = "linux,spdif-dir";
- status = "okay";
- sound-name-prefix = "DIR";
- };
-
- emmc_pwrseq: emmc-pwrseq {
- compatible = "mmc-pwrseq-emmc";
- reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- memory@0 {
- device_type = "memory";
- reg = <0x0 0x0 0x0 0x40000000>;
- };
-
- main_12v: regulator-main_12v {
- compatible = "regulator-fixed";
- regulator-name = "12V";
- regulator-min-microvolt = <12000000>;
- regulator-max-microvolt = <12000000>;
- regulator-always-on;
- };
-
- vcc_3v3: regulator-vcc_3v3 {
- compatible = "regulator-fixed";
- regulator-name = "VCC_3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vddao_3v3>;
- regulator-always-on;
- };
-
- vcc_5v: regulator-vcc_5v {
- compatible = "regulator-fixed";
- regulator-name = "VCC5V";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&main_12v>;
-
- gpio = <&gpio_ao GPIOAO_13 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
-
- vddao_3v3: regulator-vddao_3v3 {
- compatible = "regulator-fixed";
- regulator-name = "VDDAO_3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&main_12v>;
- regulator-always-on;
- };
-
- vddio_ao18: regulator-vddio_ao18 {
- compatible = "regulator-fixed";
- regulator-name = "VDDIO_AO18";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vddao_3v3>;
- regulator-always-on;
- };
-
- vddio_boot: regulator-vddio_boot {
- compatible = "regulator-fixed";
- regulator-name = "VDDIO_BOOT";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vddao_3v3>;
- regulator-always-on;
- };
-
- usb_pwr: regulator-usb_pwr {
- compatible = "regulator-fixed";
- regulator-name = "USB_PWR";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc_5v>;
-
- gpio = <&gpio_ao GPIOAO_5 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
-
- sdio_pwrseq: sdio-pwrseq {
- compatible = "mmc-pwrseq-simple";
- reset-gpios = <&gpio GPIOX_7 GPIO_ACTIVE_LOW>;
- clocks = <&wifi32k>;
- clock-names = "ext_clock";
- };
-
- speaker-leds {
- compatible = "gpio-leds";
-
- aled1 {
- label = "speaker:aled1";
- gpios = <&gpio_speaker 7 0>;
- };
-
- aled2 {
- label = "speaker:aled2";
- gpios = <&gpio_speaker 6 0>;
- };
-
- aled3 {
- label = "speaker:aled3";
- gpios = <&gpio_speaker 5 0>;
- };
-
- aled4 {
- label = "speaker:aled4";
- gpios = <&gpio_speaker 4 0>;
- };
-
- aled5 {
- label = "speaker:aled5";
- gpios = <&gpio_speaker 3 0>;
- };
-
- aled6 {
- label = "speaker:aled6";
- gpios = <&gpio_speaker 2 0>;
- };
- };
-
- sound {
- compatible = "amlogic,axg-sound-card";
- model = "AXG-S400";
- audio-aux-devs = <&tdmin_a>, <&tdmin_b>, <&tdmin_c>,
- <&tdmin_lb>, <&tdmout_c>;
- audio-widgets = "Line", "Lineout",
- "Line", "Linein",
- "Speaker", "Speaker1 Left",
- "Speaker", "Speaker1 Right";
- audio-routing = "TDMOUT_C IN 0", "FRDDR_A OUT 2",
- "SPDIFOUT IN 0", "FRDDR_A OUT 3",
- "TDMOUT_C IN 1", "FRDDR_B OUT 2",
- "SPDIFOUT IN 1", "FRDDR_B OUT 3",
- "TDMOUT_C IN 2", "FRDDR_C OUT 2",
- "SPDIFOUT IN 2", "FRDDR_C OUT 3",
- "TDM_C Playback", "TDMOUT_C OUT",
- "TDMIN_A IN 2", "TDM_C Capture",
- "TDMIN_A IN 5", "TDM_C Loopback",
- "TDMIN_B IN 2", "TDM_C Capture",
- "TDMIN_B IN 5", "TDM_C Loopback",
- "TDMIN_C IN 2", "TDM_C Capture",
- "TDMIN_C IN 5", "TDM_C Loopback",
- "TDMIN_LB IN 2", "TDM_C Loopback",
- "TDMIN_LB IN 5", "TDM_C Capture",
- "TODDR_A IN 0", "TDMIN_A OUT",
- "TODDR_B IN 0", "TDMIN_A OUT",
- "TODDR_C IN 0", "TDMIN_A OUT",
- "TODDR_A IN 1", "TDMIN_B OUT",
- "TODDR_B IN 1", "TDMIN_B OUT",
- "TODDR_C IN 1", "TDMIN_B OUT",
- "TODDR_A IN 2", "TDMIN_C OUT",
- "TODDR_B IN 2", "TDMIN_C OUT",
- "TODDR_C IN 2", "TDMIN_C OUT",
- "TODDR_A IN 3", "SPDIFIN Capture",
- "TODDR_B IN 3", "SPDIFIN Capture",
- "TODDR_C IN 3", "SPDIFIN Capture",
- "TODDR_A IN 4", "PDM Capture",
- "TODDR_B IN 4", "PDM Capture",
- "TODDR_C IN 4", "PDM Capture",
- "TODDR_A IN 6", "TDMIN_LB OUT",
- "TODDR_B IN 6", "TDMIN_LB OUT",
- "TODDR_C IN 6", "TDMIN_LB OUT",
- "Lineout", "Lineout AOUTL",
- "Lineout", "Lineout AOUTR",
- "Speaker1 Left", "SPK1 OUT_A",
- "Speaker1 Left", "SPK1 OUT_B",
- "Speaker1 Right", "SPK1 OUT_C",
- "Speaker1 Right", "SPK1 OUT_D",
- "Linein AINL", "Linein",
- "Linein AINR", "Linein";
- assigned-clocks = <&clkc CLKID_HIFI_PLL>,
- <&clkc CLKID_MPLL0>,
- <&clkc CLKID_MPLL1>;
- assigned-clock-parents = <0>, <0>, <0>;
- assigned-clock-rates = <589824000>,
- <270950400>,
- <393216000>;
- status = "okay";
-
- dai-link-0 {
- sound-dai = <&frddr_a>;
- };
-
- dai-link-1 {
- sound-dai = <&frddr_b>;
- };
-
- dai-link-2 {
- sound-dai = <&frddr_c>;
- };
-
- dai-link-3 {
- sound-dai = <&toddr_a>;
- };
-
- dai-link-4 {
- sound-dai = <&toddr_b>;
- };
-
- dai-link-5 {
- sound-dai = <&toddr_c>;
- };
-
- dai-link-6 {
- sound-dai = <&tdmif_c>;
- dai-format = "i2s";
- dai-tdm-slot-tx-mask-2 = <1 1>;
- dai-tdm-slot-rx-mask-1 = <1 1>;
- mclk-fs = <256>;
-
- codec-0 {
- sound-dai = <&lineout>;
- };
-
- codec-1 {
- sound-dai = <&speaker_amp1>;
- };
-
- codec-2 {
- sound-dai = <&linein>;
- };
-
- };
-
- dai-link-7 {
- sound-dai = <&spdifout>;
-
- codec {
- sound-dai = <&spdif_dit>;
- };
- };
-
- dai-link-8 {
- sound-dai = <&spdifin>;
-
- codec {
- sound-dai = <&spdif_dir>;
- };
- };
-
- dai-link-9 {
- sound-dai = <&pdm>;
-
- codec {
- sound-dai = <&dmics>;
- };
- };
- };
-
- wifi32k: wifi32k {
- compatible = "pwm-clock";
- #clock-cells = <0>;
- clock-frequency = <32768>;
- pwms = <&pwm_ab 0 30518 0>; /* PWM_A at 32.768KHz */
- };
-};
-
-ðmac {
- status = "okay";
- pinctrl-0 = <ð_rgmii_y_pins>;
- pinctrl-names = "default";
- phy-handle = <ð_phy0>;
- phy-mode = "rgmii";
-
- mdio {
- compatible = "snps,dwmac-mdio";
- #address-cells = <1>;
- #size-cells = <0>;
-
- eth_phy0: ethernet-phy@0 {
- /* Realtek RTL8211F (0x001cc916) */
- reg = <0>;
- interrupt-parent = <&gpio_intc>;
- interrupts = <98 IRQ_TYPE_LEVEL_LOW>;
- eee-broken-1000t;
- };
- };
-};
-
-&frddr_a {
- status = "okay";
-};
-
-&frddr_b {
- status = "okay";
-};
-
-&frddr_c {
- status = "okay";
-};
-
-&ir {
- status = "okay";
- pinctrl-0 = <&remote_input_ao_pins>;
- pinctrl-names = "default";
-};
-
-&i2c1 {
- status = "okay";
- pinctrl-0 = <&i2c1_z_pins>;
- pinctrl-names = "default";
-
- speaker_amp1: audio-codec@1b {
- compatible = "ti,tas5707";
- reg = <0x1b>;
- reset-gpios = <&gpio_ao GPIOAO_4 GPIO_ACTIVE_LOW>;
- #sound-dai-cells = <0>;
- AVDD-supply = <&vcc_3v3>;
- DVDD-supply = <&vcc_3v3>;
- PVDD_A-supply = <&main_12v>;
- PVDD_B-supply = <&main_12v>;
- PVDD_C-supply = <&main_12v>;
- PVDD_D-supply = <&main_12v>;
- sound-name-prefix = "SPK1";
- };
-};
-
-&i2c_AO {
- status = "okay";
- pinctrl-0 = <&i2c_ao_sck_10_pins>, <&i2c_ao_sda_11_pins>;
- pinctrl-names = "default";
-
- gpio_speaker: gpio-controller@1f {
- compatible = "nxp,pca9557";
- reg = <0x1f>;
- gpio-controller;
- #gpio-cells = <2>;
- vcc-supply = <&vddao_3v3>;
- };
-};
-
-&pdm {
- pinctrl-0 = <&pdm_dclk_a14_pins>, <&pdm_din0_pins>,
- <&pdm_din1_pins>, <&pdm_din2_pins>, <&pdm_din3_pins>;
- pinctrl-names = "default";
- status = "okay";
-};
-
-&pcieA {
- reset-gpios = <&gpio GPIOX_19 GPIO_ACTIVE_LOW>;
- status = "okay";
-};
-
-&pcieB {
- reset-gpios = <&gpio GPIOZ_10 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>;
- status = "okay";
-};
-
-&pwm_ab {
- status = "okay";
- pinctrl-0 = <&pwm_a_x20_pins>;
- pinctrl-names = "default";
-};
-
-&saradc {
- status = "okay";
- vref-supply = <&vddio_ao18>;
-};
-
-/* wifi module */
-&sd_emmc_b {
- status = "okay";
- #address-cells = <1>;
- #size-cells = <0>;
-
- pinctrl-0 = <&sdio_pins>;
- pinctrl-1 = <&sdio_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <4>;
- cap-sd-highspeed;
- sd-uhs-sdr104;
- max-frequency = <200000000>;
- non-removable;
- disable-wp;
-
- mmc-pwrseq = <&sdio_pwrseq>;
-
- vmmc-supply = <&vddao_3v3>;
- vqmmc-supply = <&vddio_boot>;
-
- brcmf: wifi@1 {
- reg = <1>;
- compatible = "brcm,bcm4329-fmac";
- };
-};
-
-/* emmc storage */
-&sd_emmc_c {
- status = "okay";
- pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>;
- pinctrl-1 = <&emmc_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <8>;
- cap-mmc-highspeed;
- max-frequency = <200000000>;
- non-removable;
- disable-wp;
- mmc-ddr-1_8v;
- mmc-hs200-1_8v;
-
- mmc-pwrseq = <&emmc_pwrseq>;
-
- vmmc-supply = <&vcc_3v3>;
- vqmmc-supply = <&vddio_boot>;
-};
-
-&spdifin {
- pinctrl-0 = <&spdif_in_a19_pins>;
- pinctrl-names = "default";
- status = "okay";
-};
-
-&spdifout {
- pinctrl-0 = <&spdif_out_a20_pins>;
- pinctrl-names = "default";
- status = "okay";
-};
-
-&tdmif_a {
- pinctrl-0 = <&tdma_sclk_pins>, <&tdma_fs_pins>,
- <&tdma_din0_pins>, <&tdma_dout0_x15_pins>;
- pinctrl-names = "default";
- status = "okay";
-};
-
-&tdmif_b {
- pinctrl-0 = <&tdmb_sclk_pins>, <&tdmb_fs_pins>,
- <&tdmb_din3_pins>, <&mclk_b_pins>;
- pinctrl-names = "default";
- status = "okay";
-};
-
-&tdmif_c {
- pinctrl-0 = <&tdmc_sclk_pins>, <&tdmc_fs_pins>,
- <&tdmc_din1_pins>, <&tdmc_dout2_pins>,
- <&mclk_c_pins>;
- pinctrl-names = "default";
- status = "okay";
-};
-
-&tdmin_a {
- status = "okay";
-};
-
-&tdmin_b {
- status = "okay";
-};
-
-&tdmin_c {
- status = "okay";
-};
-
-&tdmin_lb {
- status = "okay";
-};
-
-&tdmout_c {
- status = "okay";
-};
-
-&toddr_a {
- status = "okay";
-};
-
-&toddr_b {
- status = "okay";
-};
-
-&toddr_c {
- status = "okay";
-};
-
-&uart_A {
- status = "okay";
- pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
- pinctrl-names = "default";
- uart-has-rtscts;
-
- bluetooth {
- compatible = "brcm,bcm43438-bt";
- shutdown-gpios = <&gpio GPIOX_21 GPIO_ACTIVE_HIGH>;
- };
-};
-
-&uart_AO {
- status = "okay";
- pinctrl-0 = <&uart_ao_a_pins>;
- pinctrl-names = "default";
-};
-
-&usb {
- status = "okay";
- dr_mode = "otg";
- vbus-supply = <&usb_pwr>;
-};
diff --git a/arch/arm/dts/meson-axg.dtsi b/arch/arm/dts/meson-axg.dtsi
deleted file mode 100644
index 3f5254e..0000000
--- a/arch/arm/dts/meson-axg.dtsi
+++ /dev/null
@@ -1,1957 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2017 Amlogic, Inc. All rights reserved.
- */
-
-#include <dt-bindings/clock/axg-aoclkc.h>
-#include <dt-bindings/clock/axg-audio-clkc.h>
-#include <dt-bindings/clock/axg-clkc.h>
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/gpio/meson-axg-gpio.h>
-#include <dt-bindings/interrupt-controller/irq.h>
-#include <dt-bindings/interrupt-controller/arm-gic.h>
-#include <dt-bindings/reset/amlogic,meson-axg-audio-arb.h>
-#include <dt-bindings/reset/amlogic,meson-axg-reset.h>
-#include <dt-bindings/power/meson-axg-power.h>
-
-/ {
- compatible = "amlogic,meson-axg";
-
- interrupt-parent = <&gic>;
- #address-cells = <2>;
- #size-cells = <2>;
-
- tdmif_a: audio-controller-0 {
- compatible = "amlogic,axg-tdm-iface";
- #sound-dai-cells = <0>;
- sound-name-prefix = "TDM_A";
- clocks = <&clkc_audio AUD_CLKID_MST_A_MCLK>,
- <&clkc_audio AUD_CLKID_MST_A_SCLK>,
- <&clkc_audio AUD_CLKID_MST_A_LRCLK>;
- clock-names = "mclk", "sclk", "lrclk";
- status = "disabled";
- };
-
- tdmif_b: audio-controller-1 {
- compatible = "amlogic,axg-tdm-iface";
- #sound-dai-cells = <0>;
- sound-name-prefix = "TDM_B";
- clocks = <&clkc_audio AUD_CLKID_MST_B_MCLK>,
- <&clkc_audio AUD_CLKID_MST_B_SCLK>,
- <&clkc_audio AUD_CLKID_MST_B_LRCLK>;
- clock-names = "mclk", "sclk", "lrclk";
- status = "disabled";
- };
-
- tdmif_c: audio-controller-2 {
- compatible = "amlogic,axg-tdm-iface";
- #sound-dai-cells = <0>;
- sound-name-prefix = "TDM_C";
- clocks = <&clkc_audio AUD_CLKID_MST_C_MCLK>,
- <&clkc_audio AUD_CLKID_MST_C_SCLK>,
- <&clkc_audio AUD_CLKID_MST_C_LRCLK>;
- clock-names = "mclk", "sclk", "lrclk";
- status = "disabled";
- };
-
- arm-pmu {
- compatible = "arm,cortex-a53-pmu";
- interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
- };
-
- cpus {
- #address-cells = <0x2>;
- #size-cells = <0x0>;
-
- cpu0: cpu@0 {
- device_type = "cpu";
- compatible = "arm,cortex-a53";
- reg = <0x0 0x0>;
- enable-method = "psci";
- next-level-cache = <&l2>;
- clocks = <&scpi_dvfs 0>;
- };
-
- cpu1: cpu@1 {
- device_type = "cpu";
- compatible = "arm,cortex-a53";
- reg = <0x0 0x1>;
- enable-method = "psci";
- next-level-cache = <&l2>;
- clocks = <&scpi_dvfs 0>;
- };
-
- cpu2: cpu@2 {
- device_type = "cpu";
- compatible = "arm,cortex-a53";
- reg = <0x0 0x2>;
- enable-method = "psci";
- next-level-cache = <&l2>;
- clocks = <&scpi_dvfs 0>;
- };
-
- cpu3: cpu@3 {
- device_type = "cpu";
- compatible = "arm,cortex-a53";
- reg = <0x0 0x3>;
- enable-method = "psci";
- next-level-cache = <&l2>;
- clocks = <&scpi_dvfs 0>;
- };
-
- l2: l2-cache0 {
- compatible = "cache";
- };
- };
-
- sm: secure-monitor {
- compatible = "amlogic,meson-gxbb-sm";
- };
-
- efuse: efuse {
- compatible = "amlogic,meson-gxbb-efuse";
- clocks = <&clkc CLKID_EFUSE>;
- #address-cells = <1>;
- #size-cells = <1>;
- read-only;
- secure-monitor = <&sm>;
- };
-
- psci {
- compatible = "arm,psci-1.0";
- method = "smc";
- };
-
- reserved-memory {
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- /* 16 MiB reserved for Hardware ROM Firmware */
- hwrom_reserved: hwrom@0 {
- reg = <0x0 0x0 0x0 0x1000000>;
- no-map;
- };
-
- /* Alternate 3 MiB reserved for ARM Trusted Firmware (BL31) */
- secmon_reserved: secmon@5000000 {
- reg = <0x0 0x05000000 0x0 0x300000>;
- no-map;
- };
- };
-
- scpi {
- compatible = "arm,scpi-pre-1.0";
- mboxes = <&mailbox 1 &mailbox 2>;
- shmem = <&cpu_scp_lpri &cpu_scp_hpri>;
-
- scpi_clocks: clocks {
- compatible = "arm,scpi-clocks";
-
- scpi_dvfs: clock-controller {
- compatible = "arm,scpi-dvfs-clocks";
- #clock-cells = <1>;
- clock-indices = <0>;
- clock-output-names = "vcpu";
- };
- };
-
- scpi_sensors: sensors {
- compatible = "amlogic,meson-gxbb-scpi-sensors";
- #thermal-sensor-cells = <1>;
- };
- };
-
- soc {
- compatible = "simple-bus";
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- pcieA: pcie@f9800000 {
- compatible = "amlogic,axg-pcie", "snps,dw-pcie";
- reg = <0x0 0xf9800000 0x0 0x400000>,
- <0x0 0xff646000 0x0 0x2000>,
- <0x0 0xf9f00000 0x0 0x100000>;
- reg-names = "elbi", "cfg", "config";
- interrupts = <GIC_SPI 177 IRQ_TYPE_EDGE_RISING>;
- #interrupt-cells = <1>;
- interrupt-map-mask = <0 0 0 0>;
- interrupt-map = <0 0 0 0 &gic GIC_SPI 179 IRQ_TYPE_EDGE_RISING>;
- bus-range = <0x0 0xff>;
- #address-cells = <3>;
- #size-cells = <2>;
- device_type = "pci";
- ranges = <0x82000000 0 0xf9c00000 0x0 0xf9c00000 0 0x00300000>;
-
- clocks = <&clkc CLKID_USB>, <&clkc CLKID_PCIE_A>, <&clkc CLKID_PCIE_CML_EN0>;
- clock-names = "general", "pclk", "port";
- resets = <&reset RESET_PCIE_A>, <&reset RESET_PCIE_APB>;
- reset-names = "port", "apb";
- num-lanes = <1>;
- phys = <&pcie_phy>;
- phy-names = "pcie";
- status = "disabled";
- };
-
- pcieB: pcie@fa000000 {
- compatible = "amlogic,axg-pcie", "snps,dw-pcie";
- reg = <0x0 0xfa000000 0x0 0x400000>,
- <0x0 0xff648000 0x0 0x2000>,
- <0x0 0xfa400000 0x0 0x100000>;
- reg-names = "elbi", "cfg", "config";
- interrupts = <GIC_SPI 167 IRQ_TYPE_EDGE_RISING>;
- #interrupt-cells = <1>;
- interrupt-map-mask = <0 0 0 0>;
- interrupt-map = <0 0 0 0 &gic GIC_SPI 169 IRQ_TYPE_EDGE_RISING>;
- bus-range = <0x0 0xff>;
- #address-cells = <3>;
- #size-cells = <2>;
- device_type = "pci";
- ranges = <0x82000000 0 0xfa500000 0x0 0xfa500000 0 0x00300000>;
-
- clocks = <&clkc CLKID_USB>, <&clkc CLKID_PCIE_B>, <&clkc CLKID_PCIE_CML_EN1>;
- clock-names = "general", "pclk", "port";
- resets = <&reset RESET_PCIE_B>, <&reset RESET_PCIE_APB>;
- reset-names = "port", "apb";
- num-lanes = <1>;
- phys = <&pcie_phy>;
- phy-names = "pcie";
- status = "disabled";
- };
-
- usb: usb@ffe09080 {
- compatible = "amlogic,meson-axg-usb-ctrl";
- reg = <0x0 0xffe09080 0x0 0x20>;
- interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB1_DDR_BRIDGE>;
- clock-names = "usb_ctrl", "ddr";
- resets = <&reset RESET_USB_OTG>;
-
- dr_mode = "otg";
-
- phys = <&usb2_phy1>;
- phy-names = "usb2-phy1";
-
- dwc2: usb@ff400000 {
- compatible = "amlogic,meson-g12a-usb", "snps,dwc2";
- reg = <0x0 0xff400000 0x0 0x40000>;
- interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clkc CLKID_USB1>;
- clock-names = "otg";
- phys = <&usb2_phy1>;
- dr_mode = "peripheral";
- g-rx-fifo-size = <192>;
- g-np-tx-fifo-size = <128>;
- g-tx-fifo-size = <128 128 16 16 16>;
- };
-
- dwc3: usb@ff500000 {
- compatible = "snps,dwc3";
- reg = <0x0 0xff500000 0x0 0x100000>;
- interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
- dr_mode = "host";
- maximum-speed = "high-speed";
- snps,dis_u2_susphy_quirk;
- };
- };
-
- ethmac: ethernet@ff3f0000 {
- compatible = "amlogic,meson-axg-dwmac",
- "snps,dwmac-3.70a",
- "snps,dwmac";
- reg = <0x0 0xff3f0000 0x0 0x10000>,
- <0x0 0xff634540 0x0 0x8>;
- interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "macirq";
- clocks = <&clkc CLKID_ETH>,
- <&clkc CLKID_FCLK_DIV2>,
- <&clkc CLKID_MPLL2>,
- <&clkc CLKID_FCLK_DIV2>;
- clock-names = "stmmaceth", "clkin0", "clkin1",
- "timing-adjustment";
- rx-fifo-depth = <4096>;
- tx-fifo-depth = <2048>;
- power-domains = <&pwrc PWRC_AXG_ETHERNET_MEM_ID>;
- status = "disabled";
- };
-
- pcie_phy: phy@ff644000 {
- compatible = "amlogic,axg-pcie-phy";
- reg = <0x0 0xff644000 0x0 0x1c>;
- resets = <&reset RESET_PCIE_PHY>;
- phys = <&mipi_pcie_analog_dphy>;
- phy-names = "analog";
- #phy-cells = <0>;
- };
-
- pdm: audio-controller@ff632000 {
- compatible = "amlogic,axg-pdm";
- reg = <0x0 0xff632000 0x0 0x34>;
- #sound-dai-cells = <0>;
- sound-name-prefix = "PDM";
- clocks = <&clkc_audio AUD_CLKID_PDM>,
- <&clkc_audio AUD_CLKID_PDM_DCLK>,
- <&clkc_audio AUD_CLKID_PDM_SYSCLK>;
- clock-names = "pclk", "dclk", "sysclk";
- status = "disabled";
- };
-
- periphs: bus@ff634000 {
- compatible = "simple-bus";
- reg = <0x0 0xff634000 0x0 0x2000>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges = <0x0 0x0 0x0 0xff634000 0x0 0x2000>;
-
- hwrng: rng@18 {
- compatible = "amlogic,meson-rng";
- reg = <0x0 0x18 0x0 0x4>;
- clocks = <&clkc CLKID_RNG0>;
- clock-names = "core";
- };
-
- pinctrl_periphs: pinctrl@480 {
- compatible = "amlogic,meson-axg-periphs-pinctrl";
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- gpio: bank@480 {
- reg = <0x0 0x00480 0x0 0x40>,
- <0x0 0x004e8 0x0 0x14>,
- <0x0 0x00520 0x0 0x14>,
- <0x0 0x00430 0x0 0x3c>;
- reg-names = "mux", "pull", "pull-enable", "gpio";
- gpio-controller;
- #gpio-cells = <2>;
- gpio-ranges = <&pinctrl_periphs 0 0 86>;
- };
-
- i2c0_pins: i2c0 {
- mux {
- groups = "i2c0_sck",
- "i2c0_sda";
- function = "i2c0";
- bias-disable;
- };
- };
-
- i2c1_x_pins: i2c1_x {
- mux {
- groups = "i2c1_sck_x",
- "i2c1_sda_x";
- function = "i2c1";
- bias-disable;
- };
- };
-
- i2c1_z_pins: i2c1_z {
- mux {
- groups = "i2c1_sck_z",
- "i2c1_sda_z";
- function = "i2c1";
- bias-disable;
- };
- };
-
- i2c2_a_pins: i2c2_a {
- mux {
- groups = "i2c2_sck_a",
- "i2c2_sda_a";
- function = "i2c2";
- bias-disable;
- };
- };
-
- i2c2_x_pins: i2c2_x {
- mux {
- groups = "i2c2_sck_x",
- "i2c2_sda_x";
- function = "i2c2";
- bias-disable;
- };
- };
-
- i2c3_a6_pins: i2c3_a6 {
- mux {
- groups = "i2c3_sda_a6",
- "i2c3_sck_a7";
- function = "i2c3";
- bias-disable;
- };
- };
-
- i2c3_a12_pins: i2c3_a12 {
- mux {
- groups = "i2c3_sda_a12",
- "i2c3_sck_a13";
- function = "i2c3";
- bias-disable;
- };
- };
-
- i2c3_a19_pins: i2c3_a19 {
- mux {
- groups = "i2c3_sda_a19",
- "i2c3_sck_a20";
- function = "i2c3";
- bias-disable;
- };
- };
-
- emmc_pins: emmc {
- mux-0 {
- groups = "emmc_nand_d0",
- "emmc_nand_d1",
- "emmc_nand_d2",
- "emmc_nand_d3",
- "emmc_nand_d4",
- "emmc_nand_d5",
- "emmc_nand_d6",
- "emmc_nand_d7",
- "emmc_cmd";
- function = "emmc";
- bias-pull-up;
- };
-
- mux-1 {
- groups = "emmc_clk";
- function = "emmc";
- bias-disable;
- };
- };
-
- emmc_ds_pins: emmc_ds {
- mux {
- groups = "emmc_ds";
- function = "emmc";
- bias-pull-down;
- };
- };
-
- emmc_clk_gate_pins: emmc_clk_gate {
- mux {
- groups = "BOOT_8";
- function = "gpio_periphs";
- bias-pull-down;
- };
- };
-
- eth_rgmii_x_pins: eth-x-rgmii {
- mux {
- groups = "eth_mdio_x",
- "eth_mdc_x",
- "eth_rgmii_rx_clk_x",
- "eth_rx_dv_x",
- "eth_rxd0_x",
- "eth_rxd1_x",
- "eth_rxd2_rgmii",
- "eth_rxd3_rgmii",
- "eth_rgmii_tx_clk",
- "eth_txen_x",
- "eth_txd0_x",
- "eth_txd1_x",
- "eth_txd2_rgmii",
- "eth_txd3_rgmii";
- function = "eth";
- bias-disable;
- };
- };
-
- eth_rgmii_y_pins: eth-y-rgmii {
- mux {
- groups = "eth_mdio_y",
- "eth_mdc_y",
- "eth_rgmii_rx_clk_y",
- "eth_rx_dv_y",
- "eth_rxd0_y",
- "eth_rxd1_y",
- "eth_rxd2_rgmii",
- "eth_rxd3_rgmii",
- "eth_rgmii_tx_clk",
- "eth_txen_y",
- "eth_txd0_y",
- "eth_txd1_y",
- "eth_txd2_rgmii",
- "eth_txd3_rgmii";
- function = "eth";
- bias-disable;
- };
- };
-
- eth_rmii_x_pins: eth-x-rmii {
- mux {
- groups = "eth_mdio_x",
- "eth_mdc_x",
- "eth_rgmii_rx_clk_x",
- "eth_rx_dv_x",
- "eth_rxd0_x",
- "eth_rxd1_x",
- "eth_txen_x",
- "eth_txd0_x",
- "eth_txd1_x";
- function = "eth";
- bias-disable;
- };
- };
-
- eth_rmii_y_pins: eth-y-rmii {
- mux {
- groups = "eth_mdio_y",
- "eth_mdc_y",
- "eth_rgmii_rx_clk_y",
- "eth_rx_dv_y",
- "eth_rxd0_y",
- "eth_rxd1_y",
- "eth_txen_y",
- "eth_txd0_y",
- "eth_txd1_y";
- function = "eth";
- bias-disable;
- };
- };
-
- mclk_b_pins: mclk_b {
- mux {
- groups = "mclk_b";
- function = "mclk_b";
- bias-disable;
- };
- };
-
- mclk_c_pins: mclk_c {
- mux {
- groups = "mclk_c";
- function = "mclk_c";
- bias-disable;
- };
- };
-
- pdm_dclk_a14_pins: pdm_dclk_a14 {
- mux {
- groups = "pdm_dclk_a14";
- function = "pdm";
- bias-disable;
- };
- };
-
- pdm_dclk_a19_pins: pdm_dclk_a19 {
- mux {
- groups = "pdm_dclk_a19";
- function = "pdm";
- bias-disable;
- };
- };
-
- pdm_din0_pins: pdm_din0 {
- mux {
- groups = "pdm_din0";
- function = "pdm";
- bias-disable;
- };
- };
-
- pdm_din1_pins: pdm_din1 {
- mux {
- groups = "pdm_din1";
- function = "pdm";
- bias-disable;
- };
- };
-
- pdm_din2_pins: pdm_din2 {
- mux {
- groups = "pdm_din2";
- function = "pdm";
- bias-disable;
- };
- };
-
- pdm_din3_pins: pdm_din3 {
- mux {
- groups = "pdm_din3";
- function = "pdm";
- bias-disable;
- };
- };
-
- pwm_a_a_pins: pwm_a_a {
- mux {
- groups = "pwm_a_a";
- function = "pwm_a";
- bias-disable;
- };
- };
-
- pwm_a_x18_pins: pwm_a_x18 {
- mux {
- groups = "pwm_a_x18";
- function = "pwm_a";
- bias-disable;
- };
- };
-
- pwm_a_x20_pins: pwm_a_x20 {
- mux {
- groups = "pwm_a_x20";
- function = "pwm_a";
- bias-disable;
- };
- };
-
- pwm_a_z_pins: pwm_a_z {
- mux {
- groups = "pwm_a_z";
- function = "pwm_a";
- bias-disable;
- };
- };
-
- pwm_b_a_pins: pwm_b_a {
- mux {
- groups = "pwm_b_a";
- function = "pwm_b";
- bias-disable;
- };
- };
-
- pwm_b_x_pins: pwm_b_x {
- mux {
- groups = "pwm_b_x";
- function = "pwm_b";
- bias-disable;
- };
- };
-
- pwm_b_z_pins: pwm_b_z {
- mux {
- groups = "pwm_b_z";
- function = "pwm_b";
- bias-disable;
- };
- };
-
- pwm_c_a_pins: pwm_c_a {
- mux {
- groups = "pwm_c_a";
- function = "pwm_c";
- bias-disable;
- };
- };
-
- pwm_c_x10_pins: pwm_c_x10 {
- mux {
- groups = "pwm_c_x10";
- function = "pwm_c";
- bias-disable;
- };
- };
-
- pwm_c_x17_pins: pwm_c_x17 {
- mux {
- groups = "pwm_c_x17";
- function = "pwm_c";
- bias-disable;
- };
- };
-
- pwm_d_x11_pins: pwm_d_x11 {
- mux {
- groups = "pwm_d_x11";
- function = "pwm_d";
- bias-disable;
- };
- };
-
- pwm_d_x16_pins: pwm_d_x16 {
- mux {
- groups = "pwm_d_x16";
- function = "pwm_d";
- bias-disable;
- };
- };
-
- sdio_pins: sdio {
- mux-0 {
- groups = "sdio_d0",
- "sdio_d1",
- "sdio_d2",
- "sdio_d3",
- "sdio_cmd";
- function = "sdio";
- bias-pull-up;
- };
-
- mux-1 {
- groups = "sdio_clk";
- function = "sdio";
- bias-disable;
- };
- };
-
- sdio_clk_gate_pins: sdio_clk_gate {
- mux {
- groups = "GPIOX_4";
- function = "gpio_periphs";
- bias-pull-down;
- };
- };
-
- spdif_in_z_pins: spdif_in_z {
- mux {
- groups = "spdif_in_z";
- function = "spdif_in";
- bias-disable;
- };
- };
-
- spdif_in_a1_pins: spdif_in_a1 {
- mux {
- groups = "spdif_in_a1";
- function = "spdif_in";
- bias-disable;
- };
- };
-
- spdif_in_a7_pins: spdif_in_a7 {
- mux {
- groups = "spdif_in_a7";
- function = "spdif_in";
- bias-disable;
- };
- };
-
- spdif_in_a19_pins: spdif_in_a19 {
- mux {
- groups = "spdif_in_a19";
- function = "spdif_in";
- bias-disable;
- };
- };
-
- spdif_in_a20_pins: spdif_in_a20 {
- mux {
- groups = "spdif_in_a20";
- function = "spdif_in";
- bias-disable;
- };
- };
-
- spdif_out_a1_pins: spdif_out_a1 {
- mux {
- groups = "spdif_out_a1";
- function = "spdif_out";
- bias-disable;
- };
- };
-
- spdif_out_a11_pins: spdif_out_a11 {
- mux {
- groups = "spdif_out_a11";
- function = "spdif_out";
- bias-disable;
- };
- };
-
- spdif_out_a19_pins: spdif_out_a19 {
- mux {
- groups = "spdif_out_a19";
- function = "spdif_out";
- bias-disable;
- };
- };
-
- spdif_out_a20_pins: spdif_out_a20 {
- mux {
- groups = "spdif_out_a20";
- function = "spdif_out";
- bias-disable;
- };
- };
-
- spdif_out_z_pins: spdif_out_z {
- mux {
- groups = "spdif_out_z";
- function = "spdif_out";
- bias-disable;
- };
- };
-
- spi0_pins: spi0 {
- mux {
- groups = "spi0_miso",
- "spi0_mosi",
- "spi0_clk";
- function = "spi0";
- bias-disable;
- };
- };
-
- spi0_ss0_pins: spi0_ss0 {
- mux {
- groups = "spi0_ss0";
- function = "spi0";
- bias-disable;
- };
- };
-
- spi0_ss1_pins: spi0_ss1 {
- mux {
- groups = "spi0_ss1";
- function = "spi0";
- bias-disable;
- };
- };
-
- spi0_ss2_pins: spi0_ss2 {
- mux {
- groups = "spi0_ss2";
- function = "spi0";
- bias-disable;
- };
- };
-
- spi1_a_pins: spi1_a {
- mux {
- groups = "spi1_miso_a",
- "spi1_mosi_a",
- "spi1_clk_a";
- function = "spi1";
- bias-disable;
- };
- };
-
- spi1_ss0_a_pins: spi1_ss0_a {
- mux {
- groups = "spi1_ss0_a";
- function = "spi1";
- bias-disable;
- };
- };
-
- spi1_ss1_pins: spi1_ss1 {
- mux {
- groups = "spi1_ss1";
- function = "spi1";
- bias-disable;
- };
- };
-
- spi1_x_pins: spi1_x {
- mux {
- groups = "spi1_miso_x",
- "spi1_mosi_x",
- "spi1_clk_x";
- function = "spi1";
- bias-disable;
- };
- };
-
- spi1_ss0_x_pins: spi1_ss0_x {
- mux {
- groups = "spi1_ss0_x";
- function = "spi1";
- bias-disable;
- };
- };
-
- tdma_din0_pins: tdma_din0 {
- mux {
- groups = "tdma_din0";
- function = "tdma";
- bias-disable;
- };
- };
-
- tdma_dout0_x14_pins: tdma_dout0_x14 {
- mux {
- groups = "tdma_dout0_x14";
- function = "tdma";
- bias-disable;
- };
- };
-
- tdma_dout0_x15_pins: tdma_dout0_x15 {
- mux {
- groups = "tdma_dout0_x15";
- function = "tdma";
- bias-disable;
- };
- };
-
- tdma_dout1_pins: tdma_dout1 {
- mux {
- groups = "tdma_dout1";
- function = "tdma";
- bias-disable;
- };
- };
-
- tdma_din1_pins: tdma_din1 {
- mux {
- groups = "tdma_din1";
- function = "tdma";
- bias-disable;
- };
- };
-
- tdma_fs_pins: tdma_fs {
- mux {
- groups = "tdma_fs";
- function = "tdma";
- bias-disable;
- };
- };
-
- tdma_fs_slv_pins: tdma_fs_slv {
- mux {
- groups = "tdma_fs_slv";
- function = "tdma";
- bias-disable;
- };
- };
-
- tdma_sclk_pins: tdma_sclk {
- mux {
- groups = "tdma_sclk";
- function = "tdma";
- bias-disable;
- };
- };
-
- tdma_sclk_slv_pins: tdma_sclk_slv {
- mux {
- groups = "tdma_sclk_slv";
- function = "tdma";
- bias-disable;
- };
- };
-
- tdmb_din0_pins: tdmb_din0 {
- mux {
- groups = "tdmb_din0";
- function = "tdmb";
- bias-disable;
- };
- };
-
- tdmb_din1_pins: tdmb_din1 {
- mux {
- groups = "tdmb_din1";
- function = "tdmb";
- bias-disable;
- };
- };
-
- tdmb_din2_pins: tdmb_din2 {
- mux {
- groups = "tdmb_din2";
- function = "tdmb";
- bias-disable;
- };
- };
-
- tdmb_din3_pins: tdmb_din3 {
- mux {
- groups = "tdmb_din3";
- function = "tdmb";
- bias-disable;
- };
- };
-
- tdmb_dout0_pins: tdmb_dout0 {
- mux {
- groups = "tdmb_dout0";
- function = "tdmb";
- bias-disable;
- };
- };
-
- tdmb_dout1_pins: tdmb_dout1 {
- mux {
- groups = "tdmb_dout1";
- function = "tdmb";
- bias-disable;
- };
- };
-
- tdmb_dout2_pins: tdmb_dout2 {
- mux {
- groups = "tdmb_dout2";
- function = "tdmb";
- bias-disable;
- };
- };
-
- tdmb_dout3_pins: tdmb_dout3 {
- mux {
- groups = "tdmb_dout3";
- function = "tdmb";
- bias-disable;
- };
- };
-
- tdmb_fs_pins: tdmb_fs {
- mux {
- groups = "tdmb_fs";
- function = "tdmb";
- bias-disable;
- };
- };
-
- tdmb_fs_slv_pins: tdmb_fs_slv {
- mux {
- groups = "tdmb_fs_slv";
- function = "tdmb";
- bias-disable;
- };
- };
-
- tdmb_sclk_pins: tdmb_sclk {
- mux {
- groups = "tdmb_sclk";
- function = "tdmb";
- bias-disable;
- };
- };
-
- tdmb_sclk_slv_pins: tdmb_sclk_slv {
- mux {
- groups = "tdmb_sclk_slv";
- function = "tdmb";
- bias-disable;
- };
- };
-
- tdmc_fs_pins: tdmc_fs {
- mux {
- groups = "tdmc_fs";
- function = "tdmc";
- bias-disable;
- };
- };
-
- tdmc_fs_slv_pins: tdmc_fs_slv {
- mux {
- groups = "tdmc_fs_slv";
- function = "tdmc";
- bias-disable;
- };
- };
-
- tdmc_sclk_pins: tdmc_sclk {
- mux {
- groups = "tdmc_sclk";
- function = "tdmc";
- bias-disable;
- };
- };
-
- tdmc_sclk_slv_pins: tdmc_sclk_slv {
- mux {
- groups = "tdmc_sclk_slv";
- function = "tdmc";
- bias-disable;
- };
- };
-
- tdmc_din0_pins: tdmc_din0 {
- mux {
- groups = "tdmc_din0";
- function = "tdmc";
- bias-disable;
- };
- };
-
- tdmc_din1_pins: tdmc_din1 {
- mux {
- groups = "tdmc_din1";
- function = "tdmc";
- bias-disable;
- };
- };
-
- tdmc_din2_pins: tdmc_din2 {
- mux {
- groups = "tdmc_din2";
- function = "tdmc";
- bias-disable;
- };
- };
-
- tdmc_din3_pins: tdmc_din3 {
- mux {
- groups = "tdmc_din3";
- function = "tdmc";
- bias-disable;
- };
- };
-
- tdmc_dout0_pins: tdmc_dout0 {
- mux {
- groups = "tdmc_dout0";
- function = "tdmc";
- bias-disable;
- };
- };
-
- tdmc_dout1_pins: tdmc_dout1 {
- mux {
- groups = "tdmc_dout1";
- function = "tdmc";
- bias-disable;
- };
- };
-
- tdmc_dout2_pins: tdmc_dout2 {
- mux {
- groups = "tdmc_dout2";
- function = "tdmc";
- bias-disable;
- };
- };
-
- tdmc_dout3_pins: tdmc_dout3 {
- mux {
- groups = "tdmc_dout3";
- function = "tdmc";
- bias-disable;
- };
- };
-
- uart_a_pins: uart_a {
- mux {
- groups = "uart_tx_a",
- "uart_rx_a";
- function = "uart_a";
- bias-disable;
- };
- };
-
- uart_a_cts_rts_pins: uart_a_cts_rts {
- mux {
- groups = "uart_cts_a",
- "uart_rts_a";
- function = "uart_a";
- bias-disable;
- };
- };
-
- uart_b_x_pins: uart_b_x {
- mux {
- groups = "uart_tx_b_x",
- "uart_rx_b_x";
- function = "uart_b";
- bias-disable;
- };
- };
-
- uart_b_x_cts_rts_pins: uart_b_x_cts_rts {
- mux {
- groups = "uart_cts_b_x",
- "uart_rts_b_x";
- function = "uart_b";
- bias-disable;
- };
- };
-
- uart_b_z_pins: uart_b_z {
- mux {
- groups = "uart_tx_b_z",
- "uart_rx_b_z";
- function = "uart_b";
- bias-disable;
- };
- };
-
- uart_b_z_cts_rts_pins: uart_b_z_cts_rts {
- mux {
- groups = "uart_cts_b_z",
- "uart_rts_b_z";
- function = "uart_b";
- bias-disable;
- };
- };
-
- uart_ao_b_z_pins: uart_ao_b_z {
- mux {
- groups = "uart_ao_tx_b_z",
- "uart_ao_rx_b_z";
- function = "uart_ao_b_z";
- bias-disable;
- };
- };
-
- uart_ao_b_z_cts_rts_pins: uart_ao_b_z_cts_rts {
- mux {
- groups = "uart_ao_cts_b_z",
- "uart_ao_rts_b_z";
- function = "uart_ao_b_z";
- bias-disable;
- };
- };
- };
- };
-
- hiubus: bus@ff63c000 {
- compatible = "simple-bus";
- reg = <0x0 0xff63c000 0x0 0x1c00>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges = <0x0 0x0 0x0 0xff63c000 0x0 0x1c00>;
-
- sysctrl: system-controller@0 {
- compatible = "amlogic,meson-axg-hhi-sysctrl",
- "simple-mfd", "syscon";
- reg = <0 0 0 0x400>;
-
- clkc: clock-controller {
- compatible = "amlogic,axg-clkc";
- #clock-cells = <1>;
- clocks = <&xtal>;
- clock-names = "xtal";
- };
-
- pwrc: power-controller {
- compatible = "amlogic,meson-axg-pwrc";
- #power-domain-cells = <1>;
- amlogic,ao-sysctrl = <&sysctrl_AO>;
- resets = <&reset RESET_VIU>,
- <&reset RESET_VENC>,
- <&reset RESET_VCBUS>,
- <&reset RESET_VENCL>,
- <&reset RESET_VID_LOCK>;
- reset-names = "viu", "venc", "vcbus",
- "vencl", "vid_lock";
- clocks = <&clkc CLKID_VPU>,
- <&clkc CLKID_VAPB>;
- clock-names = "vpu", "vapb";
- /*
- * VPU clocking is provided by two identical clock paths
- * VPU_0 and VPU_1 muxed to a single clock by a glitch
- * free mux to safely change frequency while running.
- * Same for VAPB but with a final gate after the glitch free mux.
- */
- assigned-clocks = <&clkc CLKID_VPU_0_SEL>,
- <&clkc CLKID_VPU_0>,
- <&clkc CLKID_VPU>, /* Glitch free mux */
- <&clkc CLKID_VAPB_0_SEL>,
- <&clkc CLKID_VAPB_0>,
- <&clkc CLKID_VAPB_SEL>; /* Glitch free mux */
- assigned-clock-parents = <&clkc CLKID_FCLK_DIV4>,
- <0>, /* Do Nothing */
- <&clkc CLKID_VPU_0>,
- <&clkc CLKID_FCLK_DIV4>,
- <0>, /* Do Nothing */
- <&clkc CLKID_VAPB_0>;
- assigned-clock-rates = <0>, /* Do Nothing */
- <250000000>,
- <0>, /* Do Nothing */
- <0>, /* Do Nothing */
- <250000000>,
- <0>; /* Do Nothing */
- };
-
- mipi_pcie_analog_dphy: phy {
- compatible = "amlogic,axg-mipi-pcie-analog-phy";
- #phy-cells = <0>;
- status = "disabled";
- };
- };
- };
-
- mailbox: mailbox@ff63c404 {
- compatible = "amlogic,meson-gxbb-mhu";
- reg = <0 0xff63c404 0 0x4c>;
- interrupts = <GIC_SPI 208 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 209 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 210 IRQ_TYPE_EDGE_RISING>;
- #mbox-cells = <1>;
- };
-
- mipi_dphy: phy@ff640000 {
- compatible = "amlogic,axg-mipi-dphy";
- reg = <0x0 0xff640000 0x0 0x100>;
- clocks = <&clkc CLKID_MIPI_DSI_PHY>;
- clock-names = "pclk";
- resets = <&reset RESET_MIPI_PHY>;
- reset-names = "phy";
- phys = <&mipi_pcie_analog_dphy>;
- phy-names = "analog";
- #phy-cells = <0>;
- status = "disabled";
- };
-
- audio: bus@ff642000 {
- compatible = "simple-bus";
- reg = <0x0 0xff642000 0x0 0x2000>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges = <0x0 0x0 0x0 0xff642000 0x0 0x2000>;
-
- clkc_audio: clock-controller@0 {
- compatible = "amlogic,axg-audio-clkc";
- reg = <0x0 0x0 0x0 0xb4>;
- #clock-cells = <1>;
-
- clocks = <&clkc CLKID_AUDIO>,
- <&clkc CLKID_MPLL0>,
- <&clkc CLKID_MPLL1>,
- <&clkc CLKID_MPLL2>,
- <&clkc CLKID_MPLL3>,
- <&clkc CLKID_HIFI_PLL>,
- <&clkc CLKID_FCLK_DIV3>,
- <&clkc CLKID_FCLK_DIV4>,
- <&clkc CLKID_GP0_PLL>;
- clock-names = "pclk",
- "mst_in0",
- "mst_in1",
- "mst_in2",
- "mst_in3",
- "mst_in4",
- "mst_in5",
- "mst_in6",
- "mst_in7";
-
- resets = <&reset RESET_AUDIO>;
- };
-
- toddr_a: audio-controller@100 {
- compatible = "amlogic,axg-toddr";
- reg = <0x0 0x100 0x0 0x2c>;
- #sound-dai-cells = <0>;
- sound-name-prefix = "TODDR_A";
- interrupts = <GIC_SPI 84 IRQ_TYPE_EDGE_RISING>;
- clocks = <&clkc_audio AUD_CLKID_TODDR_A>;
- resets = <&arb AXG_ARB_TODDR_A>;
- amlogic,fifo-depth = <512>;
- status = "disabled";
- };
-
- toddr_b: audio-controller@140 {
- compatible = "amlogic,axg-toddr";
- reg = <0x0 0x140 0x0 0x2c>;
- #sound-dai-cells = <0>;
- sound-name-prefix = "TODDR_B";
- interrupts = <GIC_SPI 85 IRQ_TYPE_EDGE_RISING>;
- clocks = <&clkc_audio AUD_CLKID_TODDR_B>;
- resets = <&arb AXG_ARB_TODDR_B>;
- amlogic,fifo-depth = <256>;
- status = "disabled";
- };
-
- toddr_c: audio-controller@180 {
- compatible = "amlogic,axg-toddr";
- reg = <0x0 0x180 0x0 0x2c>;
- #sound-dai-cells = <0>;
- sound-name-prefix = "TODDR_C";
- interrupts = <GIC_SPI 86 IRQ_TYPE_EDGE_RISING>;
- clocks = <&clkc_audio AUD_CLKID_TODDR_C>;
- resets = <&arb AXG_ARB_TODDR_C>;
- amlogic,fifo-depth = <256>;
- status = "disabled";
- };
-
- frddr_a: audio-controller@1c0 {
- compatible = "amlogic,axg-frddr";
- reg = <0x0 0x1c0 0x0 0x2c>;
- #sound-dai-cells = <0>;
- sound-name-prefix = "FRDDR_A";
- interrupts = <GIC_SPI 88 IRQ_TYPE_EDGE_RISING>;
- clocks = <&clkc_audio AUD_CLKID_FRDDR_A>;
- resets = <&arb AXG_ARB_FRDDR_A>;
- amlogic,fifo-depth = <512>;
- status = "disabled";
- };
-
- frddr_b: audio-controller@200 {
- compatible = "amlogic,axg-frddr";
- reg = <0x0 0x200 0x0 0x2c>;
- #sound-dai-cells = <0>;
- sound-name-prefix = "FRDDR_B";
- interrupts = <GIC_SPI 89 IRQ_TYPE_EDGE_RISING>;
- clocks = <&clkc_audio AUD_CLKID_FRDDR_B>;
- resets = <&arb AXG_ARB_FRDDR_B>;
- amlogic,fifo-depth = <256>;
- status = "disabled";
- };
-
- frddr_c: audio-controller@240 {
- compatible = "amlogic,axg-frddr";
- reg = <0x0 0x240 0x0 0x2c>;
- #sound-dai-cells = <0>;
- sound-name-prefix = "FRDDR_C";
- interrupts = <GIC_SPI 90 IRQ_TYPE_EDGE_RISING>;
- clocks = <&clkc_audio AUD_CLKID_FRDDR_C>;
- resets = <&arb AXG_ARB_FRDDR_C>;
- amlogic,fifo-depth = <256>;
- status = "disabled";
- };
-
- arb: reset-controller@280 {
- compatible = "amlogic,meson-axg-audio-arb";
- reg = <0x0 0x280 0x0 0x4>;
- #reset-cells = <1>;
- clocks = <&clkc_audio AUD_CLKID_DDR_ARB>;
- };
-
- tdmin_a: audio-controller@300 {
- compatible = "amlogic,axg-tdmin";
- reg = <0x0 0x300 0x0 0x40>;
- sound-name-prefix = "TDMIN_A";
- clocks = <&clkc_audio AUD_CLKID_TDMIN_A>,
- <&clkc_audio AUD_CLKID_TDMIN_A_SCLK>,
- <&clkc_audio AUD_CLKID_TDMIN_A_SCLK_SEL>,
- <&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>,
- <&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>;
- clock-names = "pclk", "sclk", "sclk_sel",
- "lrclk", "lrclk_sel";
- status = "disabled";
- };
-
- tdmin_b: audio-controller@340 {
- compatible = "amlogic,axg-tdmin";
- reg = <0x0 0x340 0x0 0x40>;
- sound-name-prefix = "TDMIN_B";
- clocks = <&clkc_audio AUD_CLKID_TDMIN_B>,
- <&clkc_audio AUD_CLKID_TDMIN_B_SCLK>,
- <&clkc_audio AUD_CLKID_TDMIN_B_SCLK_SEL>,
- <&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>,
- <&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>;
- clock-names = "pclk", "sclk", "sclk_sel",
- "lrclk", "lrclk_sel";
- status = "disabled";
- };
-
- tdmin_c: audio-controller@380 {
- compatible = "amlogic,axg-tdmin";
- reg = <0x0 0x380 0x0 0x40>;
- sound-name-prefix = "TDMIN_C";
- clocks = <&clkc_audio AUD_CLKID_TDMIN_C>,
- <&clkc_audio AUD_CLKID_TDMIN_C_SCLK>,
- <&clkc_audio AUD_CLKID_TDMIN_C_SCLK_SEL>,
- <&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>,
- <&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>;
- clock-names = "pclk", "sclk", "sclk_sel",
- "lrclk", "lrclk_sel";
- status = "disabled";
- };
-
- tdmin_lb: audio-controller@3c0 {
- compatible = "amlogic,axg-tdmin";
- reg = <0x0 0x3c0 0x0 0x40>;
- sound-name-prefix = "TDMIN_LB";
- clocks = <&clkc_audio AUD_CLKID_TDMIN_LB>,
- <&clkc_audio AUD_CLKID_TDMIN_LB_SCLK>,
- <&clkc_audio AUD_CLKID_TDMIN_LB_SCLK_SEL>,
- <&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>,
- <&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>;
- clock-names = "pclk", "sclk", "sclk_sel",
- "lrclk", "lrclk_sel";
- status = "disabled";
- };
-
- spdifin: audio-controller@400 {
- compatible = "amlogic,axg-spdifin";
- reg = <0x0 0x400 0x0 0x30>;
- #sound-dai-cells = <0>;
- sound-name-prefix = "SPDIFIN";
- interrupts = <GIC_SPI 87 IRQ_TYPE_EDGE_RISING>;
- clocks = <&clkc_audio AUD_CLKID_SPDIFIN>,
- <&clkc_audio AUD_CLKID_SPDIFIN_CLK>;
- clock-names = "pclk", "refclk";
- status = "disabled";
- };
-
- spdifout: audio-controller@480 {
- compatible = "amlogic,axg-spdifout";
- reg = <0x0 0x480 0x0 0x50>;
- #sound-dai-cells = <0>;
- sound-name-prefix = "SPDIFOUT";
- clocks = <&clkc_audio AUD_CLKID_SPDIFOUT>,
- <&clkc_audio AUD_CLKID_SPDIFOUT_CLK>;
- clock-names = "pclk", "mclk";
- status = "disabled";
- };
-
- tdmout_a: audio-controller@500 {
- compatible = "amlogic,axg-tdmout";
- reg = <0x0 0x500 0x0 0x40>;
- sound-name-prefix = "TDMOUT_A";
- clocks = <&clkc_audio AUD_CLKID_TDMOUT_A>,
- <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK>,
- <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK_SEL>,
- <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>,
- <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>;
- clock-names = "pclk", "sclk", "sclk_sel",
- "lrclk", "lrclk_sel";
- status = "disabled";
- };
-
- tdmout_b: audio-controller@540 {
- compatible = "amlogic,axg-tdmout";
- reg = <0x0 0x540 0x0 0x40>;
- sound-name-prefix = "TDMOUT_B";
- clocks = <&clkc_audio AUD_CLKID_TDMOUT_B>,
- <&clkc_audio AUD_CLKID_TDMOUT_B_SCLK>,
- <&clkc_audio AUD_CLKID_TDMOUT_B_SCLK_SEL>,
- <&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>,
- <&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>;
- clock-names = "pclk", "sclk", "sclk_sel",
- "lrclk", "lrclk_sel";
- status = "disabled";
- };
-
- tdmout_c: audio-controller@580 {
- compatible = "amlogic,axg-tdmout";
- reg = <0x0 0x580 0x0 0x40>;
- sound-name-prefix = "TDMOUT_C";
- clocks = <&clkc_audio AUD_CLKID_TDMOUT_C>,
- <&clkc_audio AUD_CLKID_TDMOUT_C_SCLK>,
- <&clkc_audio AUD_CLKID_TDMOUT_C_SCLK_SEL>,
- <&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>,
- <&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>;
- clock-names = "pclk", "sclk", "sclk_sel",
- "lrclk", "lrclk_sel";
- status = "disabled";
- };
- };
-
- aobus: bus@ff800000 {
- compatible = "simple-bus";
- reg = <0x0 0xff800000 0x0 0x100000>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges = <0x0 0x0 0x0 0xff800000 0x0 0x100000>;
-
- sysctrl_AO: sys-ctrl@0 {
- compatible = "amlogic,meson-axg-ao-sysctrl", "simple-mfd", "syscon";
- reg = <0x0 0x0 0x0 0x100>;
-
- clkc_AO: clock-controller {
- compatible = "amlogic,meson-axg-aoclkc";
- #clock-cells = <1>;
- #reset-cells = <1>;
- clocks = <&xtal>, <&clkc CLKID_CLK81>;
- clock-names = "xtal", "mpeg-clk";
- };
- };
-
- pinctrl_aobus: pinctrl@14 {
- compatible = "amlogic,meson-axg-aobus-pinctrl";
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- gpio_ao: bank@14 {
- reg = <0x0 0x00014 0x0 0x8>,
- <0x0 0x0002c 0x0 0x4>,
- <0x0 0x00024 0x0 0x8>;
- reg-names = "mux", "pull", "gpio";
- gpio-controller;
- #gpio-cells = <2>;
- gpio-ranges = <&pinctrl_aobus 0 0 15>;
- };
-
- i2c_ao_sck_4_pins: i2c_ao_sck_4 {
- mux {
- groups = "i2c_ao_sck_4";
- function = "i2c_ao";
- bias-disable;
- };
- };
-
- i2c_ao_sck_8_pins: i2c_ao_sck_8 {
- mux {
- groups = "i2c_ao_sck_8";
- function = "i2c_ao";
- bias-disable;
- };
- };
-
- i2c_ao_sck_10_pins: i2c_ao_sck_10 {
- mux {
- groups = "i2c_ao_sck_10";
- function = "i2c_ao";
- bias-disable;
- };
- };
-
- i2c_ao_sda_5_pins: i2c_ao_sda_5 {
- mux {
- groups = "i2c_ao_sda_5";
- function = "i2c_ao";
- bias-disable;
- };
- };
-
- i2c_ao_sda_9_pins: i2c_ao_sda_9 {
- mux {
- groups = "i2c_ao_sda_9";
- function = "i2c_ao";
- bias-disable;
- };
- };
-
- i2c_ao_sda_11_pins: i2c_ao_sda_11 {
- mux {
- groups = "i2c_ao_sda_11";
- function = "i2c_ao";
- bias-disable;
- };
- };
-
- remote_input_ao_pins: remote_input_ao {
- mux {
- groups = "remote_input_ao";
- function = "remote_input_ao";
- bias-disable;
- };
- };
-
- uart_ao_a_pins: uart_ao_a {
- mux {
- groups = "uart_ao_tx_a",
- "uart_ao_rx_a";
- function = "uart_ao_a";
- bias-disable;
- };
- };
-
- uart_ao_a_cts_rts_pins: uart_ao_a_cts_rts {
- mux {
- groups = "uart_ao_cts_a",
- "uart_ao_rts_a";
- function = "uart_ao_a";
- bias-disable;
- };
- };
-
- uart_ao_b_pins: uart_ao_b {
- mux {
- groups = "uart_ao_tx_b",
- "uart_ao_rx_b";
- function = "uart_ao_b";
- bias-disable;
- };
- };
-
- uart_ao_b_cts_rts_pins: uart_ao_b_cts_rts {
- mux {
- groups = "uart_ao_cts_b",
- "uart_ao_rts_b";
- function = "uart_ao_b";
- bias-disable;
- };
- };
- };
-
- sec_AO: ao-secure@140 {
- compatible = "amlogic,meson-gx-ao-secure", "syscon";
- reg = <0x0 0x140 0x0 0x140>;
- amlogic,has-chip-id;
- };
-
- pwm_AO_cd: pwm@2000 {
- compatible = "amlogic,meson-axg-ao-pwm";
- reg = <0x0 0x02000 0x0 0x20>;
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- uart_AO: serial@3000 {
- compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart";
- reg = <0x0 0x3000 0x0 0x18>;
- interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>;
- clocks = <&xtal>, <&clkc_AO CLKID_AO_UART1>, <&xtal>;
- clock-names = "xtal", "pclk", "baud";
- status = "disabled";
- };
-
- uart_AO_B: serial@4000 {
- compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart";
- reg = <0x0 0x4000 0x0 0x18>;
- interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>;
- clocks = <&xtal>, <&clkc_AO CLKID_AO_UART2>, <&xtal>;
- clock-names = "xtal", "pclk", "baud";
- status = "disabled";
- };
-
- i2c_AO: i2c@5000 {
- compatible = "amlogic,meson-axg-i2c";
- reg = <0x0 0x05000 0x0 0x20>;
- interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>;
- clocks = <&clkc CLKID_AO_I2C>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- pwm_AO_ab: pwm@7000 {
- compatible = "amlogic,meson-axg-ao-pwm";
- reg = <0x0 0x07000 0x0 0x20>;
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- ir: ir@8000 {
- compatible = "amlogic,meson-gxbb-ir";
- reg = <0x0 0x8000 0x0 0x20>;
- interrupts = <GIC_SPI 196 IRQ_TYPE_EDGE_RISING>;
- status = "disabled";
- };
-
- saradc: adc@9000 {
- compatible = "amlogic,meson-axg-saradc",
- "amlogic,meson-saradc";
- reg = <0x0 0x9000 0x0 0x38>;
- #io-channel-cells = <1>;
- interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>;
- clocks = <&xtal>,
- <&clkc_AO CLKID_AO_SAR_ADC>,
- <&clkc_AO CLKID_AO_SAR_ADC_CLK>,
- <&clkc_AO CLKID_AO_SAR_ADC_SEL>;
- clock-names = "clkin", "core", "adc_clk", "adc_sel";
- status = "disabled";
- };
- };
-
- ge2d: ge2d@ff940000 {
- compatible = "amlogic,axg-ge2d";
- reg = <0x0 0xff940000 0x0 0x10000>;
- interrupts = <GIC_SPI 150 IRQ_TYPE_EDGE_RISING>;
- clocks = <&clkc CLKID_VAPB>;
- resets = <&reset RESET_GE2D>;
- };
-
- gic: interrupt-controller@ffc01000 {
- compatible = "arm,gic-400";
- reg = <0x0 0xffc01000 0 0x1000>,
- <0x0 0xffc02000 0 0x2000>,
- <0x0 0xffc04000 0 0x2000>,
- <0x0 0xffc06000 0 0x2000>;
- interrupt-controller;
- interrupts = <GIC_PPI 9
- (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
- #interrupt-cells = <3>;
- #address-cells = <0>;
- };
-
- cbus: bus@ffd00000 {
- compatible = "simple-bus";
- reg = <0x0 0xffd00000 0x0 0x25000>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges = <0x0 0x0 0x0 0xffd00000 0x0 0x25000>;
-
- reset: reset-controller@1004 {
- compatible = "amlogic,meson-axg-reset";
- reg = <0x0 0x01004 0x0 0x9c>;
- #reset-cells = <1>;
- };
-
- gpio_intc: interrupt-controller@f080 {
- compatible = "amlogic,meson-axg-gpio-intc",
- "amlogic,meson-gpio-intc";
- reg = <0x0 0xf080 0x0 0x10>;
- interrupt-controller;
- #interrupt-cells = <2>;
- amlogic,channel-interrupts = <64 65 66 67 68 69 70 71>;
- };
-
- watchdog@f0d0 {
- compatible = "amlogic,meson-gxbb-wdt";
- reg = <0x0 0xf0d0 0x0 0x10>;
- clocks = <&xtal>;
- };
-
- pwm_ab: pwm@1b000 {
- compatible = "amlogic,meson-axg-ee-pwm";
- reg = <0x0 0x1b000 0x0 0x20>;
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- pwm_cd: pwm@1a000 {
- compatible = "amlogic,meson-axg-ee-pwm";
- reg = <0x0 0x1a000 0x0 0x20>;
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- spicc0: spi@13000 {
- compatible = "amlogic,meson-axg-spicc";
- reg = <0x0 0x13000 0x0 0x3c>;
- interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clkc CLKID_SPICC0>;
- clock-names = "core";
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- spicc1: spi@15000 {
- compatible = "amlogic,meson-axg-spicc";
- reg = <0x0 0x15000 0x0 0x3c>;
- interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clkc CLKID_SPICC1>;
- clock-names = "core";
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- clk_msr: clock-measure@18000 {
- compatible = "amlogic,meson-axg-clk-measure";
- reg = <0x0 0x18000 0x0 0x10>;
- };
-
- i2c3: i2c@1c000 {
- compatible = "amlogic,meson-axg-i2c";
- reg = <0x0 0x1c000 0x0 0x20>;
- interrupts = <GIC_SPI 39 IRQ_TYPE_EDGE_RISING>;
- clocks = <&clkc CLKID_I2C>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- i2c2: i2c@1d000 {
- compatible = "amlogic,meson-axg-i2c";
- reg = <0x0 0x1d000 0x0 0x20>;
- interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>;
- clocks = <&clkc CLKID_I2C>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- i2c1: i2c@1e000 {
- compatible = "amlogic,meson-axg-i2c";
- reg = <0x0 0x1e000 0x0 0x20>;
- interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>;
- clocks = <&clkc CLKID_I2C>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- i2c0: i2c@1f000 {
- compatible = "amlogic,meson-axg-i2c";
- reg = <0x0 0x1f000 0x0 0x20>;
- interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>;
- clocks = <&clkc CLKID_I2C>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- uart_B: serial@23000 {
- compatible = "amlogic,meson-gx-uart";
- reg = <0x0 0x23000 0x0 0x18>;
- interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>;
- status = "disabled";
- clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>;
- clock-names = "xtal", "pclk", "baud";
- };
-
- uart_A: serial@24000 {
- compatible = "amlogic,meson-gx-uart";
- reg = <0x0 0x24000 0x0 0x18>;
- interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>;
- status = "disabled";
- clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>;
- clock-names = "xtal", "pclk", "baud";
- fifo-size = <128>;
- };
- };
-
- apb: bus@ffe00000 {
- compatible = "simple-bus";
- reg = <0x0 0xffe00000 0x0 0x200000>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges = <0x0 0x0 0x0 0xffe00000 0x0 0x200000>;
-
- sd_emmc_b: sd@5000 {
- compatible = "amlogic,meson-axg-mmc";
- reg = <0x0 0x5000 0x0 0x800>;
- interrupts = <GIC_SPI 217 IRQ_TYPE_EDGE_RISING>;
- status = "disabled";
- clocks = <&clkc CLKID_SD_EMMC_B>,
- <&clkc CLKID_SD_EMMC_B_CLK0>,
- <&clkc CLKID_FCLK_DIV2>;
- clock-names = "core", "clkin0", "clkin1";
- resets = <&reset RESET_SD_EMMC_B>;
- };
-
- sd_emmc_c: mmc@7000 {
- compatible = "amlogic,meson-axg-mmc";
- reg = <0x0 0x7000 0x0 0x800>;
- interrupts = <GIC_SPI 218 IRQ_TYPE_EDGE_RISING>;
- status = "disabled";
- clocks = <&clkc CLKID_SD_EMMC_C>,
- <&clkc CLKID_SD_EMMC_C_CLK0>,
- <&clkc CLKID_FCLK_DIV2>;
- clock-names = "core", "clkin0", "clkin1";
- resets = <&reset RESET_SD_EMMC_C>;
- };
-
- usb2_phy1: phy@9020 {
- compatible = "amlogic,meson-gxl-usb2-phy";
- #phy-cells = <0>;
- reg = <0x0 0x9020 0x0 0x20>;
- clocks = <&clkc CLKID_USB>;
- clock-names = "phy";
- resets = <&reset RESET_USB_OTG>;
- reset-names = "phy";
- };
- };
-
- sram: sram@fffc0000 {
- compatible = "mmio-sram";
- reg = <0x0 0xfffc0000 0x0 0x20000>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0 0x0 0xfffc0000 0x20000>;
-
- cpu_scp_lpri: scp-sram@13000 {
- compatible = "amlogic,meson-axg-scp-shmem";
- reg = <0x13000 0x400>;
- };
-
- cpu_scp_hpri: scp-sram@13400 {
- compatible = "amlogic,meson-axg-scp-shmem";
- reg = <0x13400 0x400>;
- };
- };
- };
-
- timer {
- compatible = "arm,armv8-timer";
- interrupts = <GIC_PPI 13
- (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 14
- (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 11
- (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 10
- (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>;
- };
-
- xtal: xtal-clk {
- compatible = "fixed-clock";
- clock-frequency = <24000000>;
- clock-output-names = "xtal";
- #clock-cells = <0>;
- };
-};
diff --git a/arch/arm/dts/meson-g12-common.dtsi b/arch/arm/dts/meson-g12-common.dtsi
deleted file mode 100644
index 9dbd508..0000000
--- a/arch/arm/dts/meson-g12-common.dtsi
+++ /dev/null
@@ -1,2493 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2018 Amlogic, Inc. All rights reserved.
- */
-
-#include <dt-bindings/phy/phy.h>
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/clock/g12a-clkc.h>
-#include <dt-bindings/clock/g12a-aoclkc.h>
-#include <dt-bindings/interrupt-controller/irq.h>
-#include <dt-bindings/interrupt-controller/arm-gic.h>
-#include <dt-bindings/reset/amlogic,meson-g12a-reset.h>
-#include <dt-bindings/thermal/thermal.h>
-
-/ {
- interrupt-parent = <&gic>;
- #address-cells = <2>;
- #size-cells = <2>;
-
- aliases {
- mmc0 = &sd_emmc_b; /* SD card */
- mmc1 = &sd_emmc_c; /* eMMC */
- mmc2 = &sd_emmc_a; /* SDIO */
- };
-
- chosen {
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- simplefb_cvbs: framebuffer-cvbs {
- compatible = "amlogic,simple-framebuffer",
- "simple-framebuffer";
- amlogic,pipeline = "vpu-cvbs";
- clocks = <&clkc CLKID_HDMI>,
- <&clkc CLKID_HTX_PCLK>,
- <&clkc CLKID_VPU_INTR>;
- status = "disabled";
- };
-
- simplefb_hdmi: framebuffer-hdmi {
- compatible = "amlogic,simple-framebuffer",
- "simple-framebuffer";
- amlogic,pipeline = "vpu-hdmi";
- clocks = <&clkc CLKID_HDMI>,
- <&clkc CLKID_HTX_PCLK>,
- <&clkc CLKID_VPU_INTR>;
- status = "disabled";
- };
- };
-
- efuse: efuse {
- compatible = "amlogic,meson-gxbb-efuse";
- clocks = <&clkc CLKID_EFUSE>;
- #address-cells = <1>;
- #size-cells = <1>;
- read-only;
- secure-monitor = <&sm>;
- };
-
- gpu_opp_table: opp-table-gpu {
- compatible = "operating-points-v2";
-
- opp-124999998 {
- opp-hz = /bits/ 64 <124999998>;
- opp-microvolt = <800000>;
- };
- opp-249999996 {
- opp-hz = /bits/ 64 <249999996>;
- opp-microvolt = <800000>;
- };
- opp-285714281 {
- opp-hz = /bits/ 64 <285714281>;
- opp-microvolt = <800000>;
- };
- opp-399999994 {
- opp-hz = /bits/ 64 <399999994>;
- opp-microvolt = <800000>;
- };
- opp-499999992 {
- opp-hz = /bits/ 64 <499999992>;
- opp-microvolt = <800000>;
- };
- opp-666666656 {
- opp-hz = /bits/ 64 <666666656>;
- opp-microvolt = <800000>;
- };
- opp-799999987 {
- opp-hz = /bits/ 64 <799999987>;
- opp-microvolt = <800000>;
- };
- };
-
- psci {
- compatible = "arm,psci-1.0";
- method = "smc";
- };
-
- reserved-memory {
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- /* 3 MiB reserved for ARM Trusted Firmware (BL31) */
- secmon_reserved: secmon@5000000 {
- reg = <0x0 0x05000000 0x0 0x300000>;
- no-map;
- };
-
- /* 32 MiB reserved for ARM Trusted Firmware (BL32) */
- secmon_reserved_bl32: secmon@5300000 {
- reg = <0x0 0x05300000 0x0 0x2000000>;
- no-map;
- };
-
- linux,cma {
- compatible = "shared-dma-pool";
- reusable;
- size = <0x0 0x10000000>;
- alignment = <0x0 0x400000>;
- linux,cma-default;
- };
- };
-
- sm: secure-monitor {
- compatible = "amlogic,meson-gxbb-sm";
- };
-
- soc {
- compatible = "simple-bus";
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- pcie: pcie@fc000000 {
- compatible = "amlogic,g12a-pcie", "snps,dw-pcie";
- reg = <0x0 0xfc000000 0x0 0x400000>,
- <0x0 0xff648000 0x0 0x2000>,
- <0x0 0xfc400000 0x0 0x200000>;
- reg-names = "elbi", "cfg", "config";
- interrupts = <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
- #interrupt-cells = <1>;
- interrupt-map-mask = <0 0 0 0>;
- interrupt-map = <0 0 0 0 &gic GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
- bus-range = <0x0 0xff>;
- #address-cells = <3>;
- #size-cells = <2>;
- device_type = "pci";
- ranges = <0x81000000 0 0 0x0 0xfc600000 0 0x00100000>,
- <0x82000000 0 0xfc700000 0x0 0xfc700000 0 0x1900000>;
-
- clocks = <&clkc CLKID_PCIE_PHY
- &clkc CLKID_PCIE_COMB
- &clkc CLKID_PCIE_PLL>;
- clock-names = "general",
- "pclk",
- "port";
- resets = <&reset RESET_PCIE_CTRL_A>,
- <&reset RESET_PCIE_APB>;
- reset-names = "port",
- "apb";
- num-lanes = <1>;
- phys = <&usb3_pcie_phy PHY_TYPE_PCIE>;
- phy-names = "pcie";
- status = "disabled";
- };
-
- ethmac: ethernet@ff3f0000 {
- compatible = "amlogic,meson-g12a-dwmac",
- "snps,dwmac-3.70a",
- "snps,dwmac";
- reg = <0x0 0xff3f0000 0x0 0x10000>,
- <0x0 0xff634540 0x0 0x8>;
- interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "macirq";
- clocks = <&clkc CLKID_ETH>,
- <&clkc CLKID_FCLK_DIV2>,
- <&clkc CLKID_MPLL2>,
- <&clkc CLKID_FCLK_DIV2>;
- clock-names = "stmmaceth", "clkin0", "clkin1",
- "timing-adjustment";
- rx-fifo-depth = <4096>;
- tx-fifo-depth = <2048>;
- status = "disabled";
-
- mdio0: mdio {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "snps,dwmac-mdio";
- };
- };
-
- apb: bus@ff600000 {
- compatible = "simple-bus";
- reg = <0x0 0xff600000 0x0 0x200000>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges = <0x0 0x0 0x0 0xff600000 0x0 0x200000>;
-
- hdmi_tx: hdmi-tx@0 {
- compatible = "amlogic,meson-g12a-dw-hdmi";
- reg = <0x0 0x0 0x0 0x10000>;
- interrupts = <GIC_SPI 57 IRQ_TYPE_EDGE_RISING>;
- resets = <&reset RESET_HDMITX_CAPB3>,
- <&reset RESET_HDMITX_PHY>,
- <&reset RESET_HDMITX>;
- reset-names = "hdmitx_apb", "hdmitx", "hdmitx_phy";
- clocks = <&clkc CLKID_HDMI>,
- <&clkc CLKID_HTX_PCLK>,
- <&clkc CLKID_VPU_INTR>;
- clock-names = "isfr", "iahb", "venci";
- #address-cells = <1>;
- #size-cells = <0>;
- #sound-dai-cells = <0>;
- status = "disabled";
-
- /* VPU VENC Input */
- hdmi_tx_venc_port: port@0 {
- reg = <0>;
-
- hdmi_tx_in: endpoint {
- remote-endpoint = <&hdmi_tx_out>;
- };
- };
-
- /* TMDS Output */
- hdmi_tx_tmds_port: port@1 {
- reg = <1>;
- };
- };
-
- apb_efuse: bus@30000 {
- compatible = "simple-bus";
- reg = <0x0 0x30000 0x0 0x2000>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges = <0x0 0x0 0x0 0x30000 0x0 0x2000>;
-
- hwrng: rng@218 {
- compatible = "amlogic,meson-rng";
- reg = <0x0 0x218 0x0 0x4>;
- clocks = <&clkc CLKID_RNG0>;
- clock-names = "core";
- };
- };
-
- acodec: audio-controller@32000 {
- compatible = "amlogic,t9015";
- reg = <0x0 0x32000 0x0 0x14>;
- #sound-dai-cells = <0>;
- sound-name-prefix = "ACODEC";
- clocks = <&clkc CLKID_AUDIO_CODEC>;
- clock-names = "pclk";
- resets = <&reset RESET_AUDIO_CODEC>;
- status = "disabled";
- };
-
- periphs: bus@34400 {
- compatible = "simple-bus";
- reg = <0x0 0x34400 0x0 0x400>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges = <0x0 0x0 0x0 0x34400 0x0 0x400>;
-
- periphs_pinctrl: pinctrl@40 {
- compatible = "amlogic,meson-g12a-periphs-pinctrl";
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- gpio: bank@40 {
- reg = <0x0 0x40 0x0 0x4c>,
- <0x0 0xe8 0x0 0x18>,
- <0x0 0x120 0x0 0x18>,
- <0x0 0x2c0 0x0 0x40>,
- <0x0 0x340 0x0 0x1c>;
- reg-names = "gpio",
- "pull",
- "pull-enable",
- "mux",
- "ds";
- gpio-controller;
- #gpio-cells = <2>;
- gpio-ranges = <&periphs_pinctrl 0 0 86>;
- };
-
- cec_ao_a_h_pins: cec_ao_a_h {
- mux {
- groups = "cec_ao_a_h";
- function = "cec_ao_a_h";
- bias-disable;
- };
- };
-
- cec_ao_b_h_pins: cec_ao_b_h {
- mux {
- groups = "cec_ao_b_h";
- function = "cec_ao_b_h";
- bias-disable;
- };
- };
-
- emmc_ctrl_pins: emmc-ctrl {
- mux-0 {
- groups = "emmc_cmd";
- function = "emmc";
- bias-pull-up;
- drive-strength-microamp = <4000>;
- };
-
- mux-1 {
- groups = "emmc_clk";
- function = "emmc";
- bias-disable;
- drive-strength-microamp = <4000>;
- };
- };
-
- emmc_data_4b_pins: emmc-data-4b {
- mux-0 {
- groups = "emmc_nand_d0",
- "emmc_nand_d1",
- "emmc_nand_d2",
- "emmc_nand_d3";
- function = "emmc";
- bias-pull-up;
- drive-strength-microamp = <4000>;
- };
- };
-
- emmc_data_8b_pins: emmc-data-8b {
- mux-0 {
- groups = "emmc_nand_d0",
- "emmc_nand_d1",
- "emmc_nand_d2",
- "emmc_nand_d3",
- "emmc_nand_d4",
- "emmc_nand_d5",
- "emmc_nand_d6",
- "emmc_nand_d7";
- function = "emmc";
- bias-pull-up;
- drive-strength-microamp = <4000>;
- };
- };
-
- emmc_ds_pins: emmc-ds {
- mux {
- groups = "emmc_nand_ds";
- function = "emmc";
- bias-pull-down;
- drive-strength-microamp = <4000>;
- };
- };
-
- emmc_clk_gate_pins: emmc_clk_gate {
- mux {
- groups = "BOOT_8";
- function = "gpio_periphs";
- bias-pull-down;
- drive-strength-microamp = <4000>;
- };
- };
-
- hdmitx_ddc_pins: hdmitx_ddc {
- mux {
- groups = "hdmitx_sda",
- "hdmitx_sck";
- function = "hdmitx";
- bias-disable;
- drive-strength-microamp = <4000>;
- };
- };
-
- hdmitx_hpd_pins: hdmitx_hpd {
- mux {
- groups = "hdmitx_hpd_in";
- function = "hdmitx";
- bias-disable;
- };
- };
-
-
- i2c0_sda_c_pins: i2c0-sda-c {
- mux {
- groups = "i2c0_sda_c";
- function = "i2c0";
- bias-disable;
- drive-strength-microamp = <3000>;
-
- };
- };
-
- i2c0_sck_c_pins: i2c0-sck-c {
- mux {
- groups = "i2c0_sck_c";
- function = "i2c0";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- i2c0_sda_z0_pins: i2c0-sda-z0 {
- mux {
- groups = "i2c0_sda_z0";
- function = "i2c0";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- i2c0_sck_z1_pins: i2c0-sck-z1 {
- mux {
- groups = "i2c0_sck_z1";
- function = "i2c0";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- i2c0_sda_z7_pins: i2c0-sda-z7 {
- mux {
- groups = "i2c0_sda_z7";
- function = "i2c0";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- i2c0_sda_z8_pins: i2c0-sda-z8 {
- mux {
- groups = "i2c0_sda_z8";
- function = "i2c0";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- i2c1_sda_x_pins: i2c1-sda-x {
- mux {
- groups = "i2c1_sda_x";
- function = "i2c1";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- i2c1_sck_x_pins: i2c1-sck-x {
- mux {
- groups = "i2c1_sck_x";
- function = "i2c1";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- i2c1_sda_h2_pins: i2c1-sda-h2 {
- mux {
- groups = "i2c1_sda_h2";
- function = "i2c1";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- i2c1_sck_h3_pins: i2c1-sck-h3 {
- mux {
- groups = "i2c1_sck_h3";
- function = "i2c1";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- i2c1_sda_h6_pins: i2c1-sda-h6 {
- mux {
- groups = "i2c1_sda_h6";
- function = "i2c1";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- i2c1_sck_h7_pins: i2c1-sck-h7 {
- mux {
- groups = "i2c1_sck_h7";
- function = "i2c1";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- i2c2_sda_x_pins: i2c2-sda-x {
- mux {
- groups = "i2c2_sda_x";
- function = "i2c2";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- i2c2_sck_x_pins: i2c2-sck-x {
- mux {
- groups = "i2c2_sck_x";
- function = "i2c2";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- i2c2_sda_z_pins: i2c2-sda-z {
- mux {
- groups = "i2c2_sda_z";
- function = "i2c2";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- i2c2_sck_z_pins: i2c2-sck-z {
- mux {
- groups = "i2c2_sck_z";
- function = "i2c2";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- i2c3_sda_h_pins: i2c3-sda-h {
- mux {
- groups = "i2c3_sda_h";
- function = "i2c3";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- i2c3_sck_h_pins: i2c3-sck-h {
- mux {
- groups = "i2c3_sck_h";
- function = "i2c3";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- i2c3_sda_a_pins: i2c3-sda-a {
- mux {
- groups = "i2c3_sda_a";
- function = "i2c3";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- i2c3_sck_a_pins: i2c3-sck-a {
- mux {
- groups = "i2c3_sck_a";
- function = "i2c3";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- mclk0_a_pins: mclk0-a {
- mux {
- groups = "mclk0_a";
- function = "mclk0";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- mclk1_a_pins: mclk1-a {
- mux {
- groups = "mclk1_a";
- function = "mclk1";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- mclk1_x_pins: mclk1-x {
- mux {
- groups = "mclk1_x";
- function = "mclk1";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- mclk1_z_pins: mclk1-z {
- mux {
- groups = "mclk1_z";
- function = "mclk1";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- nor_pins: nor {
- mux {
- groups = "nor_d",
- "nor_q",
- "nor_c",
- "nor_cs";
- function = "nor";
- bias-disable;
- };
- };
-
- pdm_din0_a_pins: pdm-din0-a {
- mux {
- groups = "pdm_din0_a";
- function = "pdm";
- bias-disable;
- };
- };
-
- pdm_din0_c_pins: pdm-din0-c {
- mux {
- groups = "pdm_din0_c";
- function = "pdm";
- bias-disable;
- };
- };
-
- pdm_din0_x_pins: pdm-din0-x {
- mux {
- groups = "pdm_din0_x";
- function = "pdm";
- bias-disable;
- };
- };
-
- pdm_din0_z_pins: pdm-din0-z {
- mux {
- groups = "pdm_din0_z";
- function = "pdm";
- bias-disable;
- };
- };
-
- pdm_din1_a_pins: pdm-din1-a {
- mux {
- groups = "pdm_din1_a";
- function = "pdm";
- bias-disable;
- };
- };
-
- pdm_din1_c_pins: pdm-din1-c {
- mux {
- groups = "pdm_din1_c";
- function = "pdm";
- bias-disable;
- };
- };
-
- pdm_din1_x_pins: pdm-din1-x {
- mux {
- groups = "pdm_din1_x";
- function = "pdm";
- bias-disable;
- };
- };
-
- pdm_din1_z_pins: pdm-din1-z {
- mux {
- groups = "pdm_din1_z";
- function = "pdm";
- bias-disable;
- };
- };
-
- pdm_din2_a_pins: pdm-din2-a {
- mux {
- groups = "pdm_din2_a";
- function = "pdm";
- bias-disable;
- };
- };
-
- pdm_din2_c_pins: pdm-din2-c {
- mux {
- groups = "pdm_din2_c";
- function = "pdm";
- bias-disable;
- };
- };
-
- pdm_din2_x_pins: pdm-din2-x {
- mux {
- groups = "pdm_din2_x";
- function = "pdm";
- bias-disable;
- };
- };
-
- pdm_din2_z_pins: pdm-din2-z {
- mux {
- groups = "pdm_din2_z";
- function = "pdm";
- bias-disable;
- };
- };
-
- pdm_din3_a_pins: pdm-din3-a {
- mux {
- groups = "pdm_din3_a";
- function = "pdm";
- bias-disable;
- };
- };
-
- pdm_din3_c_pins: pdm-din3-c {
- mux {
- groups = "pdm_din3_c";
- function = "pdm";
- bias-disable;
- };
- };
-
- pdm_din3_x_pins: pdm-din3-x {
- mux {
- groups = "pdm_din3_x";
- function = "pdm";
- bias-disable;
- };
- };
-
- pdm_din3_z_pins: pdm-din3-z {
- mux {
- groups = "pdm_din3_z";
- function = "pdm";
- bias-disable;
- };
- };
-
- pdm_dclk_a_pins: pdm-dclk-a {
- mux {
- groups = "pdm_dclk_a";
- function = "pdm";
- bias-disable;
- drive-strength-microamp = <500>;
- };
- };
-
- pdm_dclk_c_pins: pdm-dclk-c {
- mux {
- groups = "pdm_dclk_c";
- function = "pdm";
- bias-disable;
- drive-strength-microamp = <500>;
- };
- };
-
- pdm_dclk_x_pins: pdm-dclk-x {
- mux {
- groups = "pdm_dclk_x";
- function = "pdm";
- bias-disable;
- drive-strength-microamp = <500>;
- };
- };
-
- pdm_dclk_z_pins: pdm-dclk-z {
- mux {
- groups = "pdm_dclk_z";
- function = "pdm";
- bias-disable;
- drive-strength-microamp = <500>;
- };
- };
-
- pwm_a_pins: pwm-a {
- mux {
- groups = "pwm_a";
- function = "pwm_a";
- bias-disable;
- };
- };
-
- pwm_b_x7_pins: pwm-b-x7 {
- mux {
- groups = "pwm_b_x7";
- function = "pwm_b";
- bias-disable;
- };
- };
-
- pwm_b_x19_pins: pwm-b-x19 {
- mux {
- groups = "pwm_b_x19";
- function = "pwm_b";
- bias-disable;
- };
- };
-
- pwm_c_c_pins: pwm-c-c {
- mux {
- groups = "pwm_c_c";
- function = "pwm_c";
- bias-disable;
- };
- };
-
- pwm_c_x5_pins: pwm-c-x5 {
- mux {
- groups = "pwm_c_x5";
- function = "pwm_c";
- bias-disable;
- };
- };
-
- pwm_c_x8_pins: pwm-c-x8 {
- mux {
- groups = "pwm_c_x8";
- function = "pwm_c";
- bias-disable;
- };
- };
-
- pwm_d_x3_pins: pwm-d-x3 {
- mux {
- groups = "pwm_d_x3";
- function = "pwm_d";
- bias-disable;
- };
- };
-
- pwm_d_x6_pins: pwm-d-x6 {
- mux {
- groups = "pwm_d_x6";
- function = "pwm_d";
- bias-disable;
- };
- };
-
- pwm_e_pins: pwm-e {
- mux {
- groups = "pwm_e";
- function = "pwm_e";
- bias-disable;
- };
- };
-
- pwm_f_z_pins: pwm-f-z {
- mux {
- groups = "pwm_f_z";
- function = "pwm_f";
- bias-disable;
- };
- };
-
- pwm_f_a_pins: pwm-f-a {
- mux {
- groups = "pwm_f_a";
- function = "pwm_f";
- bias-disable;
- };
- };
-
- pwm_f_x_pins: pwm-f-x {
- mux {
- groups = "pwm_f_x";
- function = "pwm_f";
- bias-disable;
- };
- };
-
- pwm_f_h_pins: pwm-f-h {
- mux {
- groups = "pwm_f_h";
- function = "pwm_f";
- bias-disable;
- };
- };
-
- sdcard_c_pins: sdcard_c {
- mux-0 {
- groups = "sdcard_d0_c",
- "sdcard_d1_c",
- "sdcard_d2_c",
- "sdcard_d3_c",
- "sdcard_cmd_c";
- function = "sdcard";
- bias-pull-up;
- drive-strength-microamp = <4000>;
- };
-
- mux-1 {
- groups = "sdcard_clk_c";
- function = "sdcard";
- bias-disable;
- drive-strength-microamp = <4000>;
- };
- };
-
- sdcard_clk_gate_c_pins: sdcard_clk_gate_c {
- mux {
- groups = "GPIOC_4";
- function = "gpio_periphs";
- bias-pull-down;
- drive-strength-microamp = <4000>;
- };
- };
-
- sdcard_z_pins: sdcard_z {
- mux-0 {
- groups = "sdcard_d0_z",
- "sdcard_d1_z",
- "sdcard_d2_z",
- "sdcard_d3_z",
- "sdcard_cmd_z";
- function = "sdcard";
- bias-pull-up;
- drive-strength-microamp = <4000>;
- };
-
- mux-1 {
- groups = "sdcard_clk_z";
- function = "sdcard";
- bias-disable;
- drive-strength-microamp = <4000>;
- };
- };
-
- sdcard_clk_gate_z_pins: sdcard_clk_gate_z {
- mux {
- groups = "GPIOZ_6";
- function = "gpio_periphs";
- bias-pull-down;
- drive-strength-microamp = <4000>;
- };
- };
-
- sdio_pins: sdio {
- mux {
- groups = "sdio_d0",
- "sdio_d1",
- "sdio_d2",
- "sdio_d3",
- "sdio_clk",
- "sdio_cmd";
- function = "sdio";
- bias-disable;
- drive-strength-microamp = <4000>;
- };
- };
-
- sdio_clk_gate_pins: sdio_clk_gate {
- mux {
- groups = "GPIOX_4";
- function = "gpio_periphs";
- bias-pull-down;
- drive-strength-microamp = <4000>;
- };
- };
-
- spdif_in_a10_pins: spdif-in-a10 {
- mux {
- groups = "spdif_in_a10";
- function = "spdif_in";
- bias-disable;
- };
- };
-
- spdif_in_a12_pins: spdif-in-a12 {
- mux {
- groups = "spdif_in_a12";
- function = "spdif_in";
- bias-disable;
- };
- };
-
- spdif_in_h_pins: spdif-in-h {
- mux {
- groups = "spdif_in_h";
- function = "spdif_in";
- bias-disable;
- };
- };
-
- spdif_out_h_pins: spdif-out-h {
- mux {
- groups = "spdif_out_h";
- function = "spdif_out";
- drive-strength-microamp = <500>;
- bias-disable;
- };
- };
-
- spdif_out_a11_pins: spdif-out-a11 {
- mux {
- groups = "spdif_out_a11";
- function = "spdif_out";
- drive-strength-microamp = <500>;
- bias-disable;
- };
- };
-
- spdif_out_a13_pins: spdif-out-a13 {
- mux {
- groups = "spdif_out_a13";
- function = "spdif_out";
- drive-strength-microamp = <500>;
- bias-disable;
- };
- };
-
- spicc0_x_pins: spicc0-x {
- mux {
- groups = "spi0_mosi_x",
- "spi0_miso_x",
- "spi0_clk_x";
- function = "spi0";
- drive-strength-microamp = <4000>;
- bias-disable;
- };
- };
-
- spicc0_ss0_x_pins: spicc0-ss0-x {
- mux {
- groups = "spi0_ss0_x";
- function = "spi0";
- drive-strength-microamp = <4000>;
- bias-disable;
- };
- };
-
- spicc0_c_pins: spicc0-c {
- mux {
- groups = "spi0_mosi_c",
- "spi0_miso_c",
- "spi0_ss0_c",
- "spi0_clk_c";
- function = "spi0";
- drive-strength-microamp = <4000>;
- bias-disable;
- };
- };
-
- spicc1_pins: spicc1 {
- mux {
- groups = "spi1_mosi",
- "spi1_miso",
- "spi1_clk";
- function = "spi1";
- drive-strength-microamp = <4000>;
- };
- };
-
- spicc1_ss0_pins: spicc1-ss0 {
- mux {
- groups = "spi1_ss0";
- function = "spi1";
- drive-strength-microamp = <4000>;
- bias-disable;
- };
- };
-
- tdm_a_din0_pins: tdm-a-din0 {
- mux {
- groups = "tdm_a_din0";
- function = "tdm_a";
- bias-disable;
- };
- };
-
-
- tdm_a_din1_pins: tdm-a-din1 {
- mux {
- groups = "tdm_a_din1";
- function = "tdm_a";
- bias-disable;
- };
- };
-
- tdm_a_dout0_pins: tdm-a-dout0 {
- mux {
- groups = "tdm_a_dout0";
- function = "tdm_a";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- tdm_a_dout1_pins: tdm-a-dout1 {
- mux {
- groups = "tdm_a_dout1";
- function = "tdm_a";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- tdm_a_fs_pins: tdm-a-fs {
- mux {
- groups = "tdm_a_fs";
- function = "tdm_a";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- tdm_a_sclk_pins: tdm-a-sclk {
- mux {
- groups = "tdm_a_sclk";
- function = "tdm_a";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- tdm_a_slv_fs_pins: tdm-a-slv-fs {
- mux {
- groups = "tdm_a_slv_fs";
- function = "tdm_a";
- bias-disable;
- };
- };
-
-
- tdm_a_slv_sclk_pins: tdm-a-slv-sclk {
- mux {
- groups = "tdm_a_slv_sclk";
- function = "tdm_a";
- bias-disable;
- };
- };
-
- tdm_b_din0_pins: tdm-b-din0 {
- mux {
- groups = "tdm_b_din0";
- function = "tdm_b";
- bias-disable;
- };
- };
-
- tdm_b_din1_pins: tdm-b-din1 {
- mux {
- groups = "tdm_b_din1";
- function = "tdm_b";
- bias-disable;
- };
- };
-
- tdm_b_din2_pins: tdm-b-din2 {
- mux {
- groups = "tdm_b_din2";
- function = "tdm_b";
- bias-disable;
- };
- };
-
- tdm_b_din3_a_pins: tdm-b-din3-a {
- mux {
- groups = "tdm_b_din3_a";
- function = "tdm_b";
- bias-disable;
- };
- };
-
- tdm_b_din3_h_pins: tdm-b-din3-h {
- mux {
- groups = "tdm_b_din3_h";
- function = "tdm_b";
- bias-disable;
- };
- };
-
- tdm_b_dout0_pins: tdm-b-dout0 {
- mux {
- groups = "tdm_b_dout0";
- function = "tdm_b";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- tdm_b_dout1_pins: tdm-b-dout1 {
- mux {
- groups = "tdm_b_dout1";
- function = "tdm_b";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- tdm_b_dout2_pins: tdm-b-dout2 {
- mux {
- groups = "tdm_b_dout2";
- function = "tdm_b";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- tdm_b_dout3_a_pins: tdm-b-dout3-a {
- mux {
- groups = "tdm_b_dout3_a";
- function = "tdm_b";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- tdm_b_dout3_h_pins: tdm-b-dout3-h {
- mux {
- groups = "tdm_b_dout3_h";
- function = "tdm_b";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- tdm_b_fs_pins: tdm-b-fs {
- mux {
- groups = "tdm_b_fs";
- function = "tdm_b";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- tdm_b_sclk_pins: tdm-b-sclk {
- mux {
- groups = "tdm_b_sclk";
- function = "tdm_b";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- tdm_b_slv_fs_pins: tdm-b-slv-fs {
- mux {
- groups = "tdm_b_slv_fs";
- function = "tdm_b";
- bias-disable;
- };
- };
-
- tdm_b_slv_sclk_pins: tdm-b-slv-sclk {
- mux {
- groups = "tdm_b_slv_sclk";
- function = "tdm_b";
- bias-disable;
- };
- };
-
- tdm_c_din0_a_pins: tdm-c-din0-a {
- mux {
- groups = "tdm_c_din0_a";
- function = "tdm_c";
- bias-disable;
- };
- };
-
- tdm_c_din0_z_pins: tdm-c-din0-z {
- mux {
- groups = "tdm_c_din0_z";
- function = "tdm_c";
- bias-disable;
- };
- };
-
- tdm_c_din1_a_pins: tdm-c-din1-a {
- mux {
- groups = "tdm_c_din1_a";
- function = "tdm_c";
- bias-disable;
- };
- };
-
- tdm_c_din1_z_pins: tdm-c-din1-z {
- mux {
- groups = "tdm_c_din1_z";
- function = "tdm_c";
- bias-disable;
- };
- };
-
- tdm_c_din2_a_pins: tdm-c-din2-a {
- mux {
- groups = "tdm_c_din2_a";
- function = "tdm_c";
- bias-disable;
- };
- };
-
- eth_leds_pins: eth-leds {
- mux {
- groups = "eth_link_led",
- "eth_act_led";
- function = "eth";
- bias-disable;
- };
- };
-
- eth_pins: eth {
- mux {
- groups = "eth_mdio",
- "eth_mdc",
- "eth_rgmii_rx_clk",
- "eth_rx_dv",
- "eth_rxd0",
- "eth_rxd1",
- "eth_txen",
- "eth_txd0",
- "eth_txd1";
- function = "eth";
- drive-strength-microamp = <4000>;
- bias-disable;
- };
- };
-
- eth_rgmii_pins: eth-rgmii {
- mux {
- groups = "eth_rxd2_rgmii",
- "eth_rxd3_rgmii",
- "eth_rgmii_tx_clk",
- "eth_txd2_rgmii",
- "eth_txd3_rgmii";
- function = "eth";
- drive-strength-microamp = <4000>;
- bias-disable;
- };
- };
-
- tdm_c_din2_z_pins: tdm-c-din2-z {
- mux {
- groups = "tdm_c_din2_z";
- function = "tdm_c";
- bias-disable;
- };
- };
-
- tdm_c_din3_a_pins: tdm-c-din3-a {
- mux {
- groups = "tdm_c_din3_a";
- function = "tdm_c";
- bias-disable;
- };
- };
-
- tdm_c_din3_z_pins: tdm-c-din3-z {
- mux {
- groups = "tdm_c_din3_z";
- function = "tdm_c";
- bias-disable;
- };
- };
-
- tdm_c_dout0_a_pins: tdm-c-dout0-a {
- mux {
- groups = "tdm_c_dout0_a";
- function = "tdm_c";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- tdm_c_dout0_z_pins: tdm-c-dout0-z {
- mux {
- groups = "tdm_c_dout0_z";
- function = "tdm_c";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- tdm_c_dout1_a_pins: tdm-c-dout1-a {
- mux {
- groups = "tdm_c_dout1_a";
- function = "tdm_c";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- tdm_c_dout1_z_pins: tdm-c-dout1-z {
- mux {
- groups = "tdm_c_dout1_z";
- function = "tdm_c";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- tdm_c_dout2_a_pins: tdm-c-dout2-a {
- mux {
- groups = "tdm_c_dout2_a";
- function = "tdm_c";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- tdm_c_dout2_z_pins: tdm-c-dout2-z {
- mux {
- groups = "tdm_c_dout2_z";
- function = "tdm_c";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- tdm_c_dout3_a_pins: tdm-c-dout3-a {
- mux {
- groups = "tdm_c_dout3_a";
- function = "tdm_c";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- tdm_c_dout3_z_pins: tdm-c-dout3-z {
- mux {
- groups = "tdm_c_dout3_z";
- function = "tdm_c";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- tdm_c_fs_a_pins: tdm-c-fs-a {
- mux {
- groups = "tdm_c_fs_a";
- function = "tdm_c";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- tdm_c_fs_z_pins: tdm-c-fs-z {
- mux {
- groups = "tdm_c_fs_z";
- function = "tdm_c";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- tdm_c_sclk_a_pins: tdm-c-sclk-a {
- mux {
- groups = "tdm_c_sclk_a";
- function = "tdm_c";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- tdm_c_sclk_z_pins: tdm-c-sclk-z {
- mux {
- groups = "tdm_c_sclk_z";
- function = "tdm_c";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- tdm_c_slv_fs_a_pins: tdm-c-slv-fs-a {
- mux {
- groups = "tdm_c_slv_fs_a";
- function = "tdm_c";
- bias-disable;
- };
- };
-
- tdm_c_slv_fs_z_pins: tdm-c-slv-fs-z {
- mux {
- groups = "tdm_c_slv_fs_z";
- function = "tdm_c";
- bias-disable;
- };
- };
-
- tdm_c_slv_sclk_a_pins: tdm-c-slv-sclk-a {
- mux {
- groups = "tdm_c_slv_sclk_a";
- function = "tdm_c";
- bias-disable;
- };
- };
-
- tdm_c_slv_sclk_z_pins: tdm-c-slv-sclk-z {
- mux {
- groups = "tdm_c_slv_sclk_z";
- function = "tdm_c";
- bias-disable;
- };
- };
-
- uart_a_pins: uart-a {
- mux {
- groups = "uart_a_tx",
- "uart_a_rx";
- function = "uart_a";
- bias-disable;
- };
- };
-
- uart_a_cts_rts_pins: uart-a-cts-rts {
- mux {
- groups = "uart_a_cts",
- "uart_a_rts";
- function = "uart_a";
- bias-disable;
- };
- };
-
- uart_b_pins: uart-b {
- mux {
- groups = "uart_b_tx",
- "uart_b_rx";
- function = "uart_b";
- bias-disable;
- };
- };
-
- uart_c_pins: uart-c {
- mux {
- groups = "uart_c_tx",
- "uart_c_rx";
- function = "uart_c";
- bias-disable;
- };
- };
-
- uart_c_cts_rts_pins: uart-c-cts-rts {
- mux {
- groups = "uart_c_cts",
- "uart_c_rts";
- function = "uart_c";
- bias-disable;
- };
- };
- };
- };
-
- cpu_temp: temperature-sensor@34800 {
- compatible = "amlogic,g12a-cpu-thermal",
- "amlogic,g12a-thermal";
- reg = <0x0 0x34800 0x0 0x50>;
- interrupts = <GIC_SPI 35 IRQ_TYPE_EDGE_RISING>;
- clocks = <&clkc CLKID_TS>;
- #thermal-sensor-cells = <0>;
- amlogic,ao-secure = <&sec_AO>;
- };
-
- ddr_temp: temperature-sensor@34c00 {
- compatible = "amlogic,g12a-ddr-thermal",
- "amlogic,g12a-thermal";
- reg = <0x0 0x34c00 0x0 0x50>;
- interrupts = <GIC_SPI 36 IRQ_TYPE_EDGE_RISING>;
- clocks = <&clkc CLKID_TS>;
- #thermal-sensor-cells = <0>;
- amlogic,ao-secure = <&sec_AO>;
- };
-
- usb2_phy0: phy@36000 {
- compatible = "amlogic,g12a-usb2-phy";
- reg = <0x0 0x36000 0x0 0x2000>;
- clocks = <&xtal>;
- clock-names = "xtal";
- resets = <&reset RESET_USB_PHY20>;
- reset-names = "phy";
- #phy-cells = <0>;
- };
-
- dmc: bus@38000 {
- compatible = "simple-bus";
- reg = <0x0 0x38000 0x0 0x400>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges = <0x0 0x0 0x0 0x38000 0x0 0x400>;
-
- canvas: video-lut@48 {
- compatible = "amlogic,canvas";
- reg = <0x0 0x48 0x0 0x14>;
- };
- };
-
- usb2_phy1: phy@3a000 {
- compatible = "amlogic,g12a-usb2-phy";
- reg = <0x0 0x3a000 0x0 0x2000>;
- clocks = <&xtal>;
- clock-names = "xtal";
- resets = <&reset RESET_USB_PHY21>;
- reset-names = "phy";
- #phy-cells = <0>;
- };
-
- hiu: bus@3c000 {
- compatible = "simple-bus";
- reg = <0x0 0x3c000 0x0 0x1400>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges = <0x0 0x0 0x0 0x3c000 0x0 0x1400>;
-
- hhi: system-controller@0 {
- compatible = "amlogic,meson-gx-hhi-sysctrl",
- "simple-mfd", "syscon";
- reg = <0 0 0 0x400>;
-
- clkc: clock-controller {
- compatible = "amlogic,g12a-clkc";
- #clock-cells = <1>;
- clocks = <&xtal>;
- clock-names = "xtal";
- };
-
- pwrc: power-controller {
- compatible = "amlogic,meson-g12a-pwrc";
- #power-domain-cells = <1>;
- amlogic,ao-sysctrl = <&rti>;
- resets = <&reset RESET_VIU>,
- <&reset RESET_VENC>,
- <&reset RESET_VCBUS>,
- <&reset RESET_BT656>,
- <&reset RESET_RDMA>,
- <&reset RESET_VENCI>,
- <&reset RESET_VENCP>,
- <&reset RESET_VDAC>,
- <&reset RESET_VDI6>,
- <&reset RESET_VENCL>,
- <&reset RESET_VID_LOCK>;
- reset-names = "viu", "venc", "vcbus", "bt656",
- "rdma", "venci", "vencp", "vdac",
- "vdi6", "vencl", "vid_lock";
- clocks = <&clkc CLKID_VPU>,
- <&clkc CLKID_VAPB>;
- clock-names = "vpu", "vapb";
- /*
- * VPU clocking is provided by two identical clock paths
- * VPU_0 and VPU_1 muxed to a single clock by a glitch
- * free mux to safely change frequency while running.
- * Same for VAPB but with a final gate after the glitch free mux.
- */
- assigned-clocks = <&clkc CLKID_VPU_0_SEL>,
- <&clkc CLKID_VPU_0>,
- <&clkc CLKID_VPU>, /* Glitch free mux */
- <&clkc CLKID_VAPB_0_SEL>,
- <&clkc CLKID_VAPB_0>,
- <&clkc CLKID_VAPB_SEL>; /* Glitch free mux */
- assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>,
- <0>, /* Do Nothing */
- <&clkc CLKID_VPU_0>,
- <&clkc CLKID_FCLK_DIV4>,
- <0>, /* Do Nothing */
- <&clkc CLKID_VAPB_0>;
- assigned-clock-rates = <0>, /* Do Nothing */
- <666666666>,
- <0>, /* Do Nothing */
- <0>, /* Do Nothing */
- <250000000>,
- <0>; /* Do Nothing */
- };
- };
- };
-
- usb3_pcie_phy: phy@46000 {
- compatible = "amlogic,g12a-usb3-pcie-phy";
- reg = <0x0 0x46000 0x0 0x2000>;
- clocks = <&clkc CLKID_PCIE_PLL>;
- clock-names = "ref_clk";
- resets = <&reset RESET_PCIE_PHY>;
- reset-names = "phy";
- assigned-clocks = <&clkc CLKID_PCIE_PLL>;
- assigned-clock-rates = <100000000>;
- #phy-cells = <1>;
- };
-
- eth_phy: mdio-multiplexer@4c000 {
- compatible = "amlogic,g12a-mdio-mux";
- reg = <0x0 0x4c000 0x0 0xa4>;
- clocks = <&clkc CLKID_ETH_PHY>,
- <&xtal>,
- <&clkc CLKID_MPLL_50M>;
- clock-names = "pclk", "clkin0", "clkin1";
- mdio-parent-bus = <&mdio0>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- ext_mdio: mdio@0 {
- reg = <0>;
- #address-cells = <1>;
- #size-cells = <0>;
- };
-
- int_mdio: mdio@1 {
- reg = <1>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- internal_ephy: ethernet_phy@8 {
- compatible = "ethernet-phy-id0180.3301",
- "ethernet-phy-ieee802.3-c22";
- interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
- reg = <8>;
- max-speed = <100>;
- };
- };
- };
- };
-
- pmu: pmu@ff638000 {
- reg = <0x0 0xff638000 0x0 0x100>,
- <0x0 0xff638c00 0x0 0x100>;
- interrupts = <GIC_SPI 52 IRQ_TYPE_EDGE_RISING>;
- };
-
- aobus: bus@ff800000 {
- compatible = "simple-bus";
- reg = <0x0 0xff800000 0x0 0x100000>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges = <0x0 0x0 0x0 0xff800000 0x0 0x100000>;
-
- rti: sys-ctrl@0 {
- compatible = "amlogic,meson-gx-ao-sysctrl",
- "simple-mfd", "syscon";
- reg = <0x0 0x0 0x0 0x100>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges = <0x0 0x0 0x0 0x0 0x0 0x100>;
-
- clkc_AO: clock-controller {
- compatible = "amlogic,meson-g12a-aoclkc";
- #clock-cells = <1>;
- #reset-cells = <1>;
- clocks = <&xtal>, <&clkc CLKID_CLK81>;
- clock-names = "xtal", "mpeg-clk";
- };
-
- ao_pinctrl: pinctrl@14 {
- compatible = "amlogic,meson-g12a-aobus-pinctrl";
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- gpio_ao: bank@14 {
- reg = <0x0 0x14 0x0 0x8>,
- <0x0 0x1c 0x0 0x8>,
- <0x0 0x24 0x0 0x14>;
- reg-names = "mux",
- "ds",
- "gpio";
- gpio-controller;
- #gpio-cells = <2>;
- gpio-ranges = <&ao_pinctrl 0 0 15>;
- };
-
- i2c_ao_sck_pins: i2c_ao_sck_pins {
- mux {
- groups = "i2c_ao_sck";
- function = "i2c_ao";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- i2c_ao_sda_pins: i2c_ao_sda {
- mux {
- groups = "i2c_ao_sda";
- function = "i2c_ao";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- i2c_ao_sck_e_pins: i2c_ao_sck_e {
- mux {
- groups = "i2c_ao_sck_e";
- function = "i2c_ao";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- i2c_ao_sda_e_pins: i2c_ao_sda_e {
- mux {
- groups = "i2c_ao_sda_e";
- function = "i2c_ao";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- mclk0_ao_pins: mclk0-ao {
- mux {
- groups = "mclk0_ao";
- function = "mclk0_ao";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- tdm_ao_b_din0_pins: tdm-ao-b-din0 {
- mux {
- groups = "tdm_ao_b_din0";
- function = "tdm_ao_b";
- bias-disable;
- };
- };
-
- spdif_ao_out_pins: spdif-ao-out {
- mux {
- groups = "spdif_ao_out";
- function = "spdif_ao_out";
- drive-strength-microamp = <500>;
- bias-disable;
- };
- };
-
- tdm_ao_b_din1_pins: tdm-ao-b-din1 {
- mux {
- groups = "tdm_ao_b_din1";
- function = "tdm_ao_b";
- bias-disable;
- };
- };
-
- tdm_ao_b_din2_pins: tdm-ao-b-din2 {
- mux {
- groups = "tdm_ao_b_din2";
- function = "tdm_ao_b";
- bias-disable;
- };
- };
-
- tdm_ao_b_dout0_pins: tdm-ao-b-dout0 {
- mux {
- groups = "tdm_ao_b_dout0";
- function = "tdm_ao_b";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- tdm_ao_b_dout1_pins: tdm-ao-b-dout1 {
- mux {
- groups = "tdm_ao_b_dout1";
- function = "tdm_ao_b";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- tdm_ao_b_dout2_pins: tdm-ao-b-dout2 {
- mux {
- groups = "tdm_ao_b_dout2";
- function = "tdm_ao_b";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- tdm_ao_b_fs_pins: tdm-ao-b-fs {
- mux {
- groups = "tdm_ao_b_fs";
- function = "tdm_ao_b";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- tdm_ao_b_sclk_pins: tdm-ao-b-sclk {
- mux {
- groups = "tdm_ao_b_sclk";
- function = "tdm_ao_b";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- tdm_ao_b_slv_fs_pins: tdm-ao-b-slv-fs {
- mux {
- groups = "tdm_ao_b_slv_fs";
- function = "tdm_ao_b";
- bias-disable;
- };
- };
-
- tdm_ao_b_slv_sclk_pins: tdm-ao-b-slv-sclk {
- mux {
- groups = "tdm_ao_b_slv_sclk";
- function = "tdm_ao_b";
- bias-disable;
- };
- };
-
- uart_ao_a_pins: uart-a-ao {
- mux {
- groups = "uart_ao_a_tx",
- "uart_ao_a_rx";
- function = "uart_ao_a";
- bias-disable;
- };
- };
-
- uart_ao_a_cts_rts_pins: uart-ao-a-cts-rts {
- mux {
- groups = "uart_ao_a_cts",
- "uart_ao_a_rts";
- function = "uart_ao_a";
- bias-disable;
- };
- };
-
- uart_ao_b_2_3_pins: uart-ao-b-2-3 {
- mux {
- groups = "uart_ao_b_tx_2",
- "uart_ao_b_rx_3";
- function = "uart_ao_b";
- bias-disable;
- };
- };
-
- uart_ao_b_8_9_pins: uart-ao-b-8-9 {
- mux {
- groups = "uart_ao_b_tx_8",
- "uart_ao_b_rx_9";
- function = "uart_ao_b";
- bias-disable;
- };
- };
-
- uart_ao_b_cts_rts_pins: uart-ao-b-cts-rts {
- mux {
- groups = "uart_ao_b_cts",
- "uart_ao_b_rts";
- function = "uart_ao_b";
- bias-disable;
- };
- };
-
- pwm_a_e_pins: pwm-a-e {
- mux {
- groups = "pwm_a_e";
- function = "pwm_a_e";
- bias-disable;
- };
- };
-
- pwm_ao_a_pins: pwm-ao-a {
- mux {
- groups = "pwm_ao_a";
- function = "pwm_ao_a";
- bias-disable;
- };
- };
-
- pwm_ao_b_pins: pwm-ao-b {
- mux {
- groups = "pwm_ao_b";
- function = "pwm_ao_b";
- bias-disable;
- };
- };
-
- pwm_ao_c_4_pins: pwm-ao-c-4 {
- mux {
- groups = "pwm_ao_c_4";
- function = "pwm_ao_c";
- bias-disable;
- };
- };
-
- pwm_ao_c_6_pins: pwm-ao-c-6 {
- mux {
- groups = "pwm_ao_c_6";
- function = "pwm_ao_c";
- bias-disable;
- };
- };
-
- pwm_ao_d_5_pins: pwm-ao-d-5 {
- mux {
- groups = "pwm_ao_d_5";
- function = "pwm_ao_d";
- bias-disable;
- };
- };
-
- pwm_ao_d_10_pins: pwm-ao-d-10 {
- mux {
- groups = "pwm_ao_d_10";
- function = "pwm_ao_d";
- bias-disable;
- };
- };
-
- pwm_ao_d_e_pins: pwm-ao-d-e {
- mux {
- groups = "pwm_ao_d_e";
- function = "pwm_ao_d";
- };
- };
-
- remote_input_ao_pins: remote-input-ao {
- mux {
- groups = "remote_ao_input";
- function = "remote_ao_input";
- bias-disable;
- };
- };
- };
- };
-
- vrtc: rtc@a8 {
- compatible = "amlogic,meson-vrtc";
- reg = <0x0 0x000a8 0x0 0x4>;
- };
-
- cec_AO: cec@100 {
- compatible = "amlogic,meson-gx-ao-cec";
- reg = <0x0 0x00100 0x0 0x14>;
- interrupts = <GIC_SPI 199 IRQ_TYPE_EDGE_RISING>;
- clocks = <&clkc_AO CLKID_AO_CEC>;
- clock-names = "core";
- status = "disabled";
- };
-
- sec_AO: ao-secure@140 {
- compatible = "amlogic,meson-gx-ao-secure", "syscon";
- reg = <0x0 0x140 0x0 0x140>;
- amlogic,has-chip-id;
- };
-
- cecb_AO: cec@280 {
- compatible = "amlogic,meson-g12a-ao-cec";
- reg = <0x0 0x00280 0x0 0x1c>;
- interrupts = <GIC_SPI 203 IRQ_TYPE_EDGE_RISING>;
- clocks = <&clkc_AO CLKID_AO_CTS_OSCIN>;
- clock-names = "oscin";
- status = "disabled";
- };
-
- pwm_AO_cd: pwm@2000 {
- compatible = "amlogic,meson-g12a-ao-pwm-cd";
- reg = <0x0 0x2000 0x0 0x20>;
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- uart_AO: serial@3000 {
- compatible = "amlogic,meson-gx-uart",
- "amlogic,meson-ao-uart";
- reg = <0x0 0x3000 0x0 0x18>;
- interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>;
- clocks = <&xtal>, <&clkc_AO CLKID_AO_UART>, <&xtal>;
- clock-names = "xtal", "pclk", "baud";
- status = "disabled";
- };
-
- uart_AO_B: serial@4000 {
- compatible = "amlogic,meson-gx-uart",
- "amlogic,meson-ao-uart";
- reg = <0x0 0x4000 0x0 0x18>;
- interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>;
- clocks = <&xtal>, <&clkc_AO CLKID_AO_UART2>, <&xtal>;
- clock-names = "xtal", "pclk", "baud";
- status = "disabled";
- };
-
- i2c_AO: i2c@5000 {
- compatible = "amlogic,meson-axg-i2c";
- status = "disabled";
- reg = <0x0 0x05000 0x0 0x20>;
- interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>;
- #address-cells = <1>;
- #size-cells = <0>;
- clocks = <&clkc CLKID_I2C>;
- };
-
- pwm_AO_ab: pwm@7000 {
- compatible = "amlogic,meson-g12a-ao-pwm-ab";
- reg = <0x0 0x7000 0x0 0x20>;
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- ir: ir@8000 {
- compatible = "amlogic,meson-gxbb-ir";
- reg = <0x0 0x8000 0x0 0x20>;
- interrupts = <GIC_SPI 196 IRQ_TYPE_EDGE_RISING>;
- status = "disabled";
- };
-
- saradc: adc@9000 {
- compatible = "amlogic,meson-g12a-saradc",
- "amlogic,meson-saradc";
- reg = <0x0 0x9000 0x0 0x48>;
- #io-channel-cells = <1>;
- interrupts = <GIC_SPI 200 IRQ_TYPE_EDGE_RISING>;
- clocks = <&xtal>,
- <&clkc_AO CLKID_AO_SAR_ADC>,
- <&clkc_AO CLKID_AO_SAR_ADC_CLK>,
- <&clkc_AO CLKID_AO_SAR_ADC_SEL>;
- clock-names = "clkin", "core", "adc_clk", "adc_sel";
- status = "disabled";
- };
- };
-
- vdec: video-decoder@ff620000 {
- compatible = "amlogic,g12a-vdec";
- reg = <0x0 0xff620000 0x0 0x10000>,
- <0x0 0xffd0e180 0x0 0xe4>;
- reg-names = "dos", "esparser";
- interrupts = <GIC_SPI 44 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 32 IRQ_TYPE_EDGE_RISING>;
- interrupt-names = "vdec", "esparser";
-
- amlogic,ao-sysctrl = <&rti>;
- amlogic,canvas = <&canvas>;
-
- clocks = <&clkc CLKID_PARSER>,
- <&clkc CLKID_DOS>,
- <&clkc CLKID_VDEC_1>,
- <&clkc CLKID_VDEC_HEVC>,
- <&clkc CLKID_VDEC_HEVCF>;
- clock-names = "dos_parser", "dos", "vdec_1",
- "vdec_hevc", "vdec_hevcf";
- resets = <&reset RESET_PARSER>;
- reset-names = "esparser";
- };
-
- vpu: vpu@ff900000 {
- compatible = "amlogic,meson-g12a-vpu";
- reg = <0x0 0xff900000 0x0 0x100000>,
- <0x0 0xff63c000 0x0 0x1000>;
- reg-names = "vpu", "hhi";
- interrupts = <GIC_SPI 3 IRQ_TYPE_EDGE_RISING>;
- #address-cells = <1>;
- #size-cells = <0>;
- amlogic,canvas = <&canvas>;
-
- /* CVBS VDAC output port */
- cvbs_vdac_port: port@0 {
- reg = <0>;
- };
-
- /* HDMI-TX output port */
- hdmi_tx_port: port@1 {
- reg = <1>;
-
- hdmi_tx_out: endpoint {
- remote-endpoint = <&hdmi_tx_in>;
- };
- };
- };
-
- gic: interrupt-controller@ffc01000 {
- compatible = "arm,gic-400";
- reg = <0x0 0xffc01000 0 0x1000>,
- <0x0 0xffc02000 0 0x2000>,
- <0x0 0xffc04000 0 0x2000>,
- <0x0 0xffc06000 0 0x2000>;
- interrupt-controller;
- interrupts = <GIC_PPI 9
- (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
- #interrupt-cells = <3>;
- #address-cells = <0>;
- };
-
- cbus: bus@ffd00000 {
- compatible = "simple-bus";
- reg = <0x0 0xffd00000 0x0 0x100000>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges = <0x0 0x0 0x0 0xffd00000 0x0 0x100000>;
-
- reset: reset-controller@1004 {
- compatible = "amlogic,meson-axg-reset";
- reg = <0x0 0x1004 0x0 0x9c>;
- #reset-cells = <1>;
- };
-
- gpio_intc: interrupt-controller@f080 {
- compatible = "amlogic,meson-g12a-gpio-intc",
- "amlogic,meson-gpio-intc";
- reg = <0x0 0xf080 0x0 0x10>;
- interrupt-controller;
- #interrupt-cells = <2>;
- amlogic,channel-interrupts = <64 65 66 67 68 69 70 71>;
- };
-
- watchdog: watchdog@f0d0 {
- compatible = "amlogic,meson-gxbb-wdt";
- reg = <0x0 0xf0d0 0x0 0x10>;
- clocks = <&xtal>;
- };
-
- spicc0: spi@13000 {
- compatible = "amlogic,meson-g12a-spicc";
- reg = <0x0 0x13000 0x0 0x44>;
- interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clkc CLKID_SPICC0>,
- <&clkc CLKID_SPICC0_SCLK>;
- clock-names = "core", "pclk";
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- spicc1: spi@15000 {
- compatible = "amlogic,meson-g12a-spicc";
- reg = <0x0 0x15000 0x0 0x44>;
- interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clkc CLKID_SPICC1>,
- <&clkc CLKID_SPICC1_SCLK>;
- clock-names = "core", "pclk";
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- spifc: spi@14000 {
- compatible = "amlogic,meson-gxbb-spifc";
- status = "disabled";
- reg = <0x0 0x14000 0x0 0x80>;
- #address-cells = <1>;
- #size-cells = <0>;
- clocks = <&clkc CLKID_CLK81>;
- };
-
- pwm_ef: pwm@19000 {
- compatible = "amlogic,meson-g12a-ee-pwm";
- reg = <0x0 0x19000 0x0 0x20>;
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- pwm_cd: pwm@1a000 {
- compatible = "amlogic,meson-g12a-ee-pwm";
- reg = <0x0 0x1a000 0x0 0x20>;
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- pwm_ab: pwm@1b000 {
- compatible = "amlogic,meson-g12a-ee-pwm";
- reg = <0x0 0x1b000 0x0 0x20>;
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- i2c3: i2c@1c000 {
- compatible = "amlogic,meson-axg-i2c";
- status = "disabled";
- reg = <0x0 0x1c000 0x0 0x20>;
- interrupts = <GIC_SPI 39 IRQ_TYPE_EDGE_RISING>;
- #address-cells = <1>;
- #size-cells = <0>;
- clocks = <&clkc CLKID_I2C>;
- };
-
- i2c2: i2c@1d000 {
- compatible = "amlogic,meson-axg-i2c";
- status = "disabled";
- reg = <0x0 0x1d000 0x0 0x20>;
- interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>;
- #address-cells = <1>;
- #size-cells = <0>;
- clocks = <&clkc CLKID_I2C>;
- };
-
- i2c1: i2c@1e000 {
- compatible = "amlogic,meson-axg-i2c";
- status = "disabled";
- reg = <0x0 0x1e000 0x0 0x20>;
- interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>;
- #address-cells = <1>;
- #size-cells = <0>;
- clocks = <&clkc CLKID_I2C>;
- };
-
- i2c0: i2c@1f000 {
- compatible = "amlogic,meson-axg-i2c";
- status = "disabled";
- reg = <0x0 0x1f000 0x0 0x20>;
- interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>;
- #address-cells = <1>;
- #size-cells = <0>;
- clocks = <&clkc CLKID_I2C>;
- };
-
- clk_msr: clock-measure@18000 {
- compatible = "amlogic,meson-g12a-clk-measure";
- reg = <0x0 0x18000 0x0 0x10>;
- };
-
- uart_C: serial@22000 {
- compatible = "amlogic,meson-gx-uart";
- reg = <0x0 0x22000 0x0 0x18>;
- interrupts = <GIC_SPI 93 IRQ_TYPE_EDGE_RISING>;
- clocks = <&xtal>, <&clkc CLKID_UART2>, <&xtal>;
- clock-names = "xtal", "pclk", "baud";
- status = "disabled";
- };
-
- uart_B: serial@23000 {
- compatible = "amlogic,meson-gx-uart";
- reg = <0x0 0x23000 0x0 0x18>;
- interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>;
- clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>;
- clock-names = "xtal", "pclk", "baud";
- status = "disabled";
- };
-
- uart_A: serial@24000 {
- compatible = "amlogic,meson-gx-uart";
- reg = <0x0 0x24000 0x0 0x18>;
- interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>;
- clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>;
- clock-names = "xtal", "pclk", "baud";
- status = "disabled";
- fifo-size = <128>;
- };
- };
-
- sd_emmc_a: sd@ffe03000 {
- compatible = "amlogic,meson-axg-mmc";
- reg = <0x0 0xffe03000 0x0 0x800>;
- interrupts = <GIC_SPI 189 IRQ_TYPE_EDGE_RISING>;
- status = "disabled";
- clocks = <&clkc CLKID_SD_EMMC_A>,
- <&clkc CLKID_SD_EMMC_A_CLK0>,
- <&clkc CLKID_FCLK_DIV2>;
- clock-names = "core", "clkin0", "clkin1";
- resets = <&reset RESET_SD_EMMC_A>;
- };
-
- sd_emmc_b: sd@ffe05000 {
- compatible = "amlogic,meson-axg-mmc";
- reg = <0x0 0xffe05000 0x0 0x800>;
- interrupts = <GIC_SPI 190 IRQ_TYPE_EDGE_RISING>;
- status = "disabled";
- clocks = <&clkc CLKID_SD_EMMC_B>,
- <&clkc CLKID_SD_EMMC_B_CLK0>,
- <&clkc CLKID_FCLK_DIV2>;
- clock-names = "core", "clkin0", "clkin1";
- resets = <&reset RESET_SD_EMMC_B>;
- };
-
- sd_emmc_c: mmc@ffe07000 {
- compatible = "amlogic,meson-axg-mmc";
- reg = <0x0 0xffe07000 0x0 0x800>;
- interrupts = <GIC_SPI 191 IRQ_TYPE_EDGE_RISING>;
- status = "disabled";
- clocks = <&clkc CLKID_SD_EMMC_C>,
- <&clkc CLKID_SD_EMMC_C_CLK0>,
- <&clkc CLKID_FCLK_DIV2>;
- clock-names = "core", "clkin0", "clkin1";
- resets = <&reset RESET_SD_EMMC_C>;
- };
-
- usb: usb@ffe09000 {
- status = "disabled";
- compatible = "amlogic,meson-g12a-usb-ctrl";
- reg = <0x0 0xffe09000 0x0 0xa0>;
- interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- clocks = <&clkc CLKID_USB>;
- resets = <&reset RESET_USB>;
-
- dr_mode = "otg";
-
- phys = <&usb2_phy0>, <&usb2_phy1>,
- <&usb3_pcie_phy PHY_TYPE_USB3>;
- phy-names = "usb2-phy0", "usb2-phy1", "usb3-phy0";
-
- dwc2: usb@ff400000 {
- compatible = "amlogic,meson-g12a-usb", "snps,dwc2";
- reg = <0x0 0xff400000 0x0 0x40000>;
- interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clkc CLKID_USB1_DDR_BRIDGE>;
- clock-names = "otg";
- phys = <&usb2_phy1>;
- phy-names = "usb2-phy";
- dr_mode = "peripheral";
- g-rx-fifo-size = <192>;
- g-np-tx-fifo-size = <128>;
- g-tx-fifo-size = <128 128 16 16 16>;
- };
-
- dwc3: usb@ff500000 {
- compatible = "snps,dwc3";
- reg = <0x0 0xff500000 0x0 0x100000>;
- interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
- dr_mode = "host";
- snps,dis_u2_susphy_quirk;
- snps,quirk-frame-length-adjustment = <0x20>;
- snps,parkmode-disable-ss-quirk;
- };
- };
-
- mali: gpu@ffe40000 {
- compatible = "amlogic,meson-g12a-mali", "arm,mali-bifrost";
- reg = <0x0 0xffe40000 0x0 0x40000>;
- interrupt-parent = <&gic>;
- interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "job", "mmu", "gpu";
- clocks = <&clkc CLKID_MALI>;
- resets = <&reset RESET_DVALIN_CAPB3>, <&reset RESET_DVALIN>;
- operating-points-v2 = <&gpu_opp_table>;
- #cooling-cells = <2>;
- };
- };
-
- thermal-zones {
- cpu_thermal: cpu-thermal {
- polling-delay = <1000>;
- polling-delay-passive = <100>;
- thermal-sensors = <&cpu_temp>;
-
- trips {
- cpu_passive: cpu-passive {
- temperature = <85000>; /* millicelsius */
- hysteresis = <2000>; /* millicelsius */
- type = "passive";
- };
-
- cpu_hot: cpu-hot {
- temperature = <95000>; /* millicelsius */
- hysteresis = <2000>; /* millicelsius */
- type = "hot";
- };
-
- cpu_critical: cpu-critical {
- temperature = <110000>; /* millicelsius */
- hysteresis = <2000>; /* millicelsius */
- type = "critical";
- };
- };
- };
-
- ddr_thermal: ddr-thermal {
- polling-delay = <1000>;
- polling-delay-passive = <100>;
- thermal-sensors = <&ddr_temp>;
-
- trips {
- ddr_passive: ddr-passive {
- temperature = <85000>; /* millicelsius */
- hysteresis = <2000>; /* millicelsius */
- type = "passive";
- };
-
- ddr_critical: ddr-critical {
- temperature = <110000>; /* millicelsius */
- hysteresis = <2000>; /* millicelsius */
- type = "critical";
- };
- };
-
- cooling-maps {
- map {
- trip = <&ddr_passive>;
- cooling-device = <&mali THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- };
- };
- };
- };
-
- timer {
- compatible = "arm,armv8-timer";
- interrupts = <GIC_PPI 13
- (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 14
- (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 11
- (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 10
- (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>;
- arm,no-tick-in-suspend;
- };
-
- xtal: xtal-clk {
- compatible = "fixed-clock";
- clock-frequency = <24000000>;
- clock-output-names = "xtal";
- #clock-cells = <0>;
- };
-
-};
diff --git a/arch/arm/dts/meson-g12.dtsi b/arch/arm/dts/meson-g12.dtsi
deleted file mode 100644
index 6a1f4dc..0000000
--- a/arch/arm/dts/meson-g12.dtsi
+++ /dev/null
@@ -1,385 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2019 BayLibre, SAS
- * Author: Jerome Brunet <jbrunet@baylibre.com>
- */
-
-#include "meson-g12-common.dtsi"
-#include <dt-bindings/clock/axg-audio-clkc.h>
-#include <dt-bindings/power/meson-g12a-power.h>
-#include <dt-bindings/reset/amlogic,meson-axg-audio-arb.h>
-#include <dt-bindings/reset/amlogic,meson-g12a-audio-reset.h>
-
-/ {
- tdmif_a: audio-controller-0 {
- compatible = "amlogic,axg-tdm-iface";
- #sound-dai-cells = <0>;
- sound-name-prefix = "TDM_A";
- clocks = <&clkc_audio AUD_CLKID_MST_A_MCLK>,
- <&clkc_audio AUD_CLKID_MST_A_SCLK>,
- <&clkc_audio AUD_CLKID_MST_A_LRCLK>;
- clock-names = "mclk", "sclk", "lrclk";
- status = "disabled";
- };
-
- tdmif_b: audio-controller-1 {
- compatible = "amlogic,axg-tdm-iface";
- #sound-dai-cells = <0>;
- sound-name-prefix = "TDM_B";
- clocks = <&clkc_audio AUD_CLKID_MST_B_MCLK>,
- <&clkc_audio AUD_CLKID_MST_B_SCLK>,
- <&clkc_audio AUD_CLKID_MST_B_LRCLK>;
- clock-names = "mclk", "sclk", "lrclk";
- status = "disabled";
- };
-
- tdmif_c: audio-controller-2 {
- compatible = "amlogic,axg-tdm-iface";
- #sound-dai-cells = <0>;
- sound-name-prefix = "TDM_C";
- clocks = <&clkc_audio AUD_CLKID_MST_C_MCLK>,
- <&clkc_audio AUD_CLKID_MST_C_SCLK>,
- <&clkc_audio AUD_CLKID_MST_C_LRCLK>;
- clock-names = "mclk", "sclk", "lrclk";
- status = "disabled";
- };
-};
-
-&apb {
- pdm: audio-controller@40000 {
- compatible = "amlogic,g12a-pdm",
- "amlogic,axg-pdm";
- reg = <0x0 0x40000 0x0 0x34>;
- #sound-dai-cells = <0>;
- sound-name-prefix = "PDM";
- clocks = <&clkc_audio AUD_CLKID_PDM>,
- <&clkc_audio AUD_CLKID_PDM_DCLK>,
- <&clkc_audio AUD_CLKID_PDM_SYSCLK>;
- clock-names = "pclk", "dclk", "sysclk";
- resets = <&clkc_audio AUD_RESET_PDM>;
- status = "disabled";
- };
-
- audio: bus@42000 {
- compatible = "simple-bus";
- reg = <0x0 0x42000 0x0 0x2000>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges = <0x0 0x0 0x0 0x42000 0x0 0x2000>;
-
- clkc_audio: clock-controller@0 {
- status = "disabled";
- compatible = "amlogic,g12a-audio-clkc";
- reg = <0x0 0x0 0x0 0xb4>;
- #clock-cells = <1>;
- #reset-cells = <1>;
-
- clocks = <&clkc CLKID_AUDIO>,
- <&clkc CLKID_MPLL0>,
- <&clkc CLKID_MPLL1>,
- <&clkc CLKID_MPLL2>,
- <&clkc CLKID_MPLL3>,
- <&clkc CLKID_HIFI_PLL>,
- <&clkc CLKID_FCLK_DIV3>,
- <&clkc CLKID_FCLK_DIV4>,
- <&clkc CLKID_GP0_PLL>;
- clock-names = "pclk",
- "mst_in0",
- "mst_in1",
- "mst_in2",
- "mst_in3",
- "mst_in4",
- "mst_in5",
- "mst_in6",
- "mst_in7";
-
- resets = <&reset RESET_AUDIO>;
- };
-
- toddr_a: audio-controller@100 {
- compatible = "amlogic,g12a-toddr",
- "amlogic,axg-toddr";
- reg = <0x0 0x100 0x0 0x2c>;
- #sound-dai-cells = <0>;
- sound-name-prefix = "TODDR_A";
- interrupts = <GIC_SPI 148 IRQ_TYPE_EDGE_RISING>;
- clocks = <&clkc_audio AUD_CLKID_TODDR_A>;
- resets = <&arb AXG_ARB_TODDR_A>,
- <&clkc_audio AUD_RESET_TODDR_A>;
- reset-names = "arb", "rst";
- amlogic,fifo-depth = <512>;
- status = "disabled";
- };
-
- toddr_b: audio-controller@140 {
- compatible = "amlogic,g12a-toddr",
- "amlogic,axg-toddr";
- reg = <0x0 0x140 0x0 0x2c>;
- #sound-dai-cells = <0>;
- sound-name-prefix = "TODDR_B";
- interrupts = <GIC_SPI 149 IRQ_TYPE_EDGE_RISING>;
- clocks = <&clkc_audio AUD_CLKID_TODDR_B>;
- resets = <&arb AXG_ARB_TODDR_B>,
- <&clkc_audio AUD_RESET_TODDR_B>;
- reset-names = "arb", "rst";
- amlogic,fifo-depth = <256>;
- status = "disabled";
- };
-
- toddr_c: audio-controller@180 {
- compatible = "amlogic,g12a-toddr",
- "amlogic,axg-toddr";
- reg = <0x0 0x180 0x0 0x2c>;
- #sound-dai-cells = <0>;
- sound-name-prefix = "TODDR_C";
- interrupts = <GIC_SPI 150 IRQ_TYPE_EDGE_RISING>;
- clocks = <&clkc_audio AUD_CLKID_TODDR_C>;
- resets = <&arb AXG_ARB_TODDR_C>,
- <&clkc_audio AUD_RESET_TODDR_C>;
- reset-names = "arb", "rst";
- amlogic,fifo-depth = <256>;
- status = "disabled";
- };
-
- frddr_a: audio-controller@1c0 {
- compatible = "amlogic,g12a-frddr",
- "amlogic,axg-frddr";
- reg = <0x0 0x1c0 0x0 0x2c>;
- #sound-dai-cells = <0>;
- sound-name-prefix = "FRDDR_A";
- interrupts = <GIC_SPI 152 IRQ_TYPE_EDGE_RISING>;
- clocks = <&clkc_audio AUD_CLKID_FRDDR_A>;
- resets = <&arb AXG_ARB_FRDDR_A>,
- <&clkc_audio AUD_RESET_FRDDR_A>;
- reset-names = "arb", "rst";
- amlogic,fifo-depth = <512>;
- status = "disabled";
- };
-
- frddr_b: audio-controller@200 {
- compatible = "amlogic,g12a-frddr",
- "amlogic,axg-frddr";
- reg = <0x0 0x200 0x0 0x2c>;
- #sound-dai-cells = <0>;
- sound-name-prefix = "FRDDR_B";
- interrupts = <GIC_SPI 153 IRQ_TYPE_EDGE_RISING>;
- clocks = <&clkc_audio AUD_CLKID_FRDDR_B>;
- resets = <&arb AXG_ARB_FRDDR_B>,
- <&clkc_audio AUD_RESET_FRDDR_B>;
- reset-names = "arb", "rst";
- amlogic,fifo-depth = <256>;
- status = "disabled";
- };
-
- frddr_c: audio-controller@240 {
- compatible = "amlogic,g12a-frddr",
- "amlogic,axg-frddr";
- reg = <0x0 0x240 0x0 0x2c>;
- #sound-dai-cells = <0>;
- sound-name-prefix = "FRDDR_C";
- interrupts = <GIC_SPI 154 IRQ_TYPE_EDGE_RISING>;
- clocks = <&clkc_audio AUD_CLKID_FRDDR_C>;
- resets = <&arb AXG_ARB_FRDDR_C>,
- <&clkc_audio AUD_RESET_FRDDR_C>;
- reset-names = "arb", "rst";
- amlogic,fifo-depth = <256>;
- status = "disabled";
- };
-
- arb: reset-controller@280 {
- status = "disabled";
- compatible = "amlogic,meson-axg-audio-arb";
- reg = <0x0 0x280 0x0 0x4>;
- #reset-cells = <1>;
- clocks = <&clkc_audio AUD_CLKID_DDR_ARB>;
- };
-
- tdmin_a: audio-controller@300 {
- compatible = "amlogic,g12a-tdmin",
- "amlogic,axg-tdmin";
- reg = <0x0 0x300 0x0 0x40>;
- sound-name-prefix = "TDMIN_A";
- resets = <&clkc_audio AUD_RESET_TDMIN_A>;
- clocks = <&clkc_audio AUD_CLKID_TDMIN_A>,
- <&clkc_audio AUD_CLKID_TDMIN_A_SCLK>,
- <&clkc_audio AUD_CLKID_TDMIN_A_SCLK_SEL>,
- <&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>,
- <&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>;
- clock-names = "pclk", "sclk", "sclk_sel",
- "lrclk", "lrclk_sel";
- status = "disabled";
- };
-
- tdmin_b: audio-controller@340 {
- compatible = "amlogic,g12a-tdmin",
- "amlogic,axg-tdmin";
- reg = <0x0 0x340 0x0 0x40>;
- sound-name-prefix = "TDMIN_B";
- resets = <&clkc_audio AUD_RESET_TDMIN_B>;
- clocks = <&clkc_audio AUD_CLKID_TDMIN_B>,
- <&clkc_audio AUD_CLKID_TDMIN_B_SCLK>,
- <&clkc_audio AUD_CLKID_TDMIN_B_SCLK_SEL>,
- <&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>,
- <&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>;
- clock-names = "pclk", "sclk", "sclk_sel",
- "lrclk", "lrclk_sel";
- status = "disabled";
- };
-
- tdmin_c: audio-controller@380 {
- compatible = "amlogic,g12a-tdmin",
- "amlogic,axg-tdmin";
- reg = <0x0 0x380 0x0 0x40>;
- sound-name-prefix = "TDMIN_C";
- resets = <&clkc_audio AUD_RESET_TDMIN_C>;
- clocks = <&clkc_audio AUD_CLKID_TDMIN_C>,
- <&clkc_audio AUD_CLKID_TDMIN_C_SCLK>,
- <&clkc_audio AUD_CLKID_TDMIN_C_SCLK_SEL>,
- <&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>,
- <&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>;
- clock-names = "pclk", "sclk", "sclk_sel",
- "lrclk", "lrclk_sel";
- status = "disabled";
- };
-
- tdmin_lb: audio-controller@3c0 {
- compatible = "amlogic,g12a-tdmin",
- "amlogic,axg-tdmin";
- reg = <0x0 0x3c0 0x0 0x40>;
- sound-name-prefix = "TDMIN_LB";
- resets = <&clkc_audio AUD_RESET_TDMIN_LB>;
- clocks = <&clkc_audio AUD_CLKID_TDMIN_LB>,
- <&clkc_audio AUD_CLKID_TDMIN_LB_SCLK>,
- <&clkc_audio AUD_CLKID_TDMIN_LB_SCLK_SEL>,
- <&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>,
- <&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>;
- clock-names = "pclk", "sclk", "sclk_sel",
- "lrclk", "lrclk_sel";
- status = "disabled";
- };
-
- spdifin: audio-controller@400 {
- compatible = "amlogic,g12a-spdifin",
- "amlogic,axg-spdifin";
- reg = <0x0 0x400 0x0 0x30>;
- #sound-dai-cells = <0>;
- sound-name-prefix = "SPDIFIN";
- interrupts = <GIC_SPI 151 IRQ_TYPE_EDGE_RISING>;
- clocks = <&clkc_audio AUD_CLKID_SPDIFIN>,
- <&clkc_audio AUD_CLKID_SPDIFIN_CLK>;
- clock-names = "pclk", "refclk";
- resets = <&clkc_audio AUD_RESET_SPDIFIN>;
- status = "disabled";
- };
-
- spdifout: audio-controller@480 {
- compatible = "amlogic,g12a-spdifout",
- "amlogic,axg-spdifout";
- reg = <0x0 0x480 0x0 0x50>;
- #sound-dai-cells = <0>;
- sound-name-prefix = "SPDIFOUT";
- clocks = <&clkc_audio AUD_CLKID_SPDIFOUT>,
- <&clkc_audio AUD_CLKID_SPDIFOUT_CLK>;
- clock-names = "pclk", "mclk";
- resets = <&clkc_audio AUD_RESET_SPDIFOUT>;
- status = "disabled";
- };
-
- tdmout_a: audio-controller@500 {
- compatible = "amlogic,g12a-tdmout";
- reg = <0x0 0x500 0x0 0x40>;
- sound-name-prefix = "TDMOUT_A";
- resets = <&clkc_audio AUD_RESET_TDMOUT_A>;
- clocks = <&clkc_audio AUD_CLKID_TDMOUT_A>,
- <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK>,
- <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK_SEL>,
- <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>,
- <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>;
- clock-names = "pclk", "sclk", "sclk_sel",
- "lrclk", "lrclk_sel";
- status = "disabled";
- };
-
- tdmout_b: audio-controller@540 {
- compatible = "amlogic,g12a-tdmout";
- reg = <0x0 0x540 0x0 0x40>;
- sound-name-prefix = "TDMOUT_B";
- resets = <&clkc_audio AUD_RESET_TDMOUT_B>;
- clocks = <&clkc_audio AUD_CLKID_TDMOUT_B>,
- <&clkc_audio AUD_CLKID_TDMOUT_B_SCLK>,
- <&clkc_audio AUD_CLKID_TDMOUT_B_SCLK_SEL>,
- <&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>,
- <&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>;
- clock-names = "pclk", "sclk", "sclk_sel",
- "lrclk", "lrclk_sel";
- status = "disabled";
- };
-
- tdmout_c: audio-controller@580 {
- compatible = "amlogic,g12a-tdmout";
- reg = <0x0 0x580 0x0 0x40>;
- sound-name-prefix = "TDMOUT_C";
- resets = <&clkc_audio AUD_RESET_TDMOUT_C>;
- clocks = <&clkc_audio AUD_CLKID_TDMOUT_C>,
- <&clkc_audio AUD_CLKID_TDMOUT_C_SCLK>,
- <&clkc_audio AUD_CLKID_TDMOUT_C_SCLK_SEL>,
- <&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>,
- <&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>;
- clock-names = "pclk", "sclk", "sclk_sel",
- "lrclk", "lrclk_sel";
- status = "disabled";
- };
-
- spdifout_b: audio-controller@680 {
- compatible = "amlogic,g12a-spdifout",
- "amlogic,axg-spdifout";
- reg = <0x0 0x680 0x0 0x50>;
- #sound-dai-cells = <0>;
- sound-name-prefix = "SPDIFOUT_B";
- clocks = <&clkc_audio AUD_CLKID_SPDIFOUT_B>,
- <&clkc_audio AUD_CLKID_SPDIFOUT_B_CLK>;
- clock-names = "pclk", "mclk";
- resets = <&clkc_audio AUD_RESET_SPDIFOUT_B>;
- status = "disabled";
- };
-
- toacodec: audio-controller@740 {
- compatible = "amlogic,g12a-toacodec";
- reg = <0x0 0x740 0x0 0x4>;
- #sound-dai-cells = <1>;
- sound-name-prefix = "TOACODEC";
- resets = <&clkc_audio AUD_RESET_TOACODEC>;
- status = "disabled";
- };
-
- tohdmitx: audio-controller@744 {
- compatible = "amlogic,g12a-tohdmitx";
- reg = <0x0 0x744 0x0 0x4>;
- #sound-dai-cells = <1>;
- sound-name-prefix = "TOHDMITX";
- resets = <&clkc_audio AUD_RESET_TOHDMITX>;
- status = "disabled";
- };
- };
-};
-
-ðmac {
- power-domains = <&pwrc PWRC_G12A_ETH_ID>;
-};
-
-&vpu {
- power-domains = <&pwrc PWRC_G12A_VPU_ID>;
-};
-
-&sd_emmc_a {
- amlogic,dram-access-quirk;
-};
-
-&simplefb_cvbs {
- power-domains = <&pwrc PWRC_G12A_VPU_ID>;
-};
-
-&simplefb_hdmi {
- power-domains = <&pwrc PWRC_G12A_VPU_ID>;
-};
-
diff --git a/arch/arm/dts/meson-g12a-radxa-zero.dts b/arch/arm/dts/meson-g12a-radxa-zero.dts
deleted file mode 100644
index e3bb6df..0000000
--- a/arch/arm/dts/meson-g12a-radxa-zero.dts
+++ /dev/null
@@ -1,405 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2018 BayLibre SAS. All rights reserved.
- */
-
-/dts-v1/;
-
-#include "meson-g12a.dtsi"
-#include <dt-bindings/gpio/meson-g12a-gpio.h>
-#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
-
-/ {
- compatible = "radxa,zero", "amlogic,g12a";
- model = "Radxa Zero";
-
- aliases {
- serial0 = &uart_AO;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- memory@0 {
- device_type = "memory";
- reg = <0x0 0x0 0x0 0x40000000>;
- };
-
- cvbs-connector {
- status = "disabled";
- compatible = "composite-video-connector";
-
- port {
- cvbs_connector_in: endpoint {
- remote-endpoint = <&cvbs_vdac_out>;
- };
- };
- };
-
- hdmi-connector {
- compatible = "hdmi-connector";
- type = "a";
-
- port {
- hdmi_connector_in: endpoint {
- remote-endpoint = <&hdmi_tx_tmds_out>;
- };
- };
- };
-
- emmc_pwrseq: emmc-pwrseq {
- compatible = "mmc-pwrseq-emmc";
- reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
- };
-
- sdio_pwrseq: sdio-pwrseq {
- compatible = "mmc-pwrseq-simple";
- reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
- clocks = <&wifi32k>;
- clock-names = "ext_clock";
- };
-
- ao_5v: regulator-ao_5v {
- compatible = "regulator-fixed";
- regulator-name = "AO_5V";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- regulator-always-on;
- };
-
- vcc_1v8: regulator-vcc_1v8 {
- compatible = "regulator-fixed";
- regulator-name = "VCC_1V8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vcc_3v3>;
- regulator-always-on;
- };
-
- vcc_3v3: regulator-vcc_3v3 {
- compatible = "regulator-fixed";
- regulator-name = "VCC_3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vddao_3v3>;
- regulator-always-on;
- };
-
- hdmi_pw: regulator-hdmi_pw {
- compatible = "regulator-fixed";
- regulator-name = "HDMI_PW";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&ao_5v>;
- regulator-always-on;
- };
-
- vddao_1v8: regulator-vddao_1v8 {
- compatible = "regulator-fixed";
- regulator-name = "VDDAO_1V8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vddao_3v3>;
- regulator-always-on;
- };
-
- vddao_3v3: regulator-vddao_3v3 {
- compatible = "regulator-fixed";
- regulator-name = "VDDAO_3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&ao_5v>;
- regulator-always-on;
- };
-
- vddcpu: regulator-vddcpu {
- compatible = "pwm-regulator";
-
- regulator-name = "VDDCPU";
- regulator-min-microvolt = <721000>;
- regulator-max-microvolt = <1022000>;
-
- vin-supply = <&ao_5v>;
-
- pwms = <&pwm_AO_cd 1 1250 0>;
- pwm-dutycycle-range = <100 0>;
-
- regulator-boot-on;
- regulator-always-on;
- };
-
- sound {
- compatible = "amlogic,axg-sound-card";
- model = "RADXA-ZERO";
- audio-aux-devs = <&tdmout_b>;
- audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
- "TDMOUT_B IN 1", "FRDDR_B OUT 1",
- "TDMOUT_B IN 2", "FRDDR_C OUT 1",
- "TDM_B Playback", "TDMOUT_B OUT";
-
- assigned-clocks = <&clkc CLKID_MPLL2>,
- <&clkc CLKID_MPLL0>,
- <&clkc CLKID_MPLL1>;
- assigned-clock-parents = <0>, <0>, <0>;
- assigned-clock-rates = <294912000>,
- <270950400>,
- <393216000>;
- status = "okay";
-
- dai-link-0 {
- sound-dai = <&frddr_a>;
- };
-
- dai-link-1 {
- sound-dai = <&frddr_b>;
- };
-
- dai-link-2 {
- sound-dai = <&frddr_c>;
- };
-
- /* 8ch hdmi interface */
- dai-link-3 {
- sound-dai = <&tdmif_b>;
- dai-format = "i2s";
- dai-tdm-slot-tx-mask-0 = <1 1>;
- dai-tdm-slot-tx-mask-1 = <1 1>;
- dai-tdm-slot-tx-mask-2 = <1 1>;
- dai-tdm-slot-tx-mask-3 = <1 1>;
- mclk-fs = <256>;
-
- codec {
- sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
- };
- };
-
- dai-link-4 {
- sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
-
- codec {
- sound-dai = <&hdmi_tx>;
- };
- };
- };
-
- wifi32k: wifi32k {
- compatible = "pwm-clock";
- #clock-cells = <0>;
- clock-frequency = <32768>;
- pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
- };
-};
-
-&arb {
- status = "okay";
-};
-
-&cec_AO {
- pinctrl-0 = <&cec_ao_a_h_pins>;
- pinctrl-names = "default";
- status = "disabled";
- hdmi-phandle = <&hdmi_tx>;
-};
-
-&cecb_AO {
- pinctrl-0 = <&cec_ao_b_h_pins>;
- pinctrl-names = "default";
- status = "okay";
- hdmi-phandle = <&hdmi_tx>;
-};
-
-&clkc_audio {
- status = "okay";
-};
-
-&cpu0 {
- cpu-supply = <&vddcpu>;
- operating-points-v2 = <&cpu_opp_table>;
- clocks = <&clkc CLKID_CPU_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu1 {
- cpu-supply = <&vddcpu>;
- operating-points-v2 = <&cpu_opp_table>;
- clocks = <&clkc CLKID_CPU_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu2 {
- cpu-supply = <&vddcpu>;
- operating-points-v2 = <&cpu_opp_table>;
- clocks = <&clkc CLKID_CPU_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu3 {
- cpu-supply = <&vddcpu>;
- operating-points-v2 = <&cpu_opp_table>;
- clocks = <&clkc CLKID_CPU_CLK>;
- clock-latency = <50000>;
-};
-
-&cvbs_vdac_port {
- cvbs_vdac_out: endpoint {
- remote-endpoint = <&cvbs_connector_in>;
- };
-};
-
-&frddr_a {
- status = "okay";
-};
-
-&frddr_b {
- status = "okay";
-};
-
-&frddr_c {
- status = "okay";
-};
-
-&hdmi_tx {
- status = "okay";
- pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>;
- pinctrl-names = "default";
- hdmi-supply = <&hdmi_pw>;
-};
-
-&hdmi_tx_tmds_port {
- hdmi_tx_tmds_out: endpoint {
- remote-endpoint = <&hdmi_connector_in>;
- };
-};
-
-&ir {
- status = "disabled";
- pinctrl-0 = <&remote_input_ao_pins>;
- pinctrl-names = "default";
-};
-
-&pwm_AO_cd {
- pinctrl-0 = <&pwm_ao_d_e_pins>;
- pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin1";
- status = "okay";
-};
-
-&pwm_ef {
- status = "okay";
- pinctrl-0 = <&pwm_e_pins>;
- pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin0";
-};
-
-&saradc {
- status = "okay";
- vref-supply = <&vddao_1v8>;
-};
-
-/* SDIO */
-&sd_emmc_a {
- status = "okay";
- pinctrl-0 = <&sdio_pins>;
- pinctrl-1 = <&sdio_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
- #address-cells = <1>;
- #size-cells = <0>;
-
- bus-width = <4>;
- cap-sd-highspeed;
- sd-uhs-sdr50;
- max-frequency = <100000000>;
-
- non-removable;
- disable-wp;
-
- /* WiFi firmware requires power to be kept while in suspend */
- keep-power-in-suspend;
-
- mmc-pwrseq = <&sdio_pwrseq>;
-
- vmmc-supply = <&vddao_3v3>;
- vqmmc-supply = <&vddao_1v8>;
-
- brcmf: wifi@1 {
- reg = <1>;
- compatible = "brcm,bcm4329-fmac";
- };
-};
-
-/* SD card */
-&sd_emmc_b {
- status = "okay";
- pinctrl-0 = <&sdcard_c_pins>;
- pinctrl-1 = <&sdcard_clk_gate_c_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <4>;
- cap-sd-highspeed;
- max-frequency = <100000000>;
- disable-wp;
-
- cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
- vmmc-supply = <&vddao_3v3>;
- vqmmc-supply = <&vddao_3v3>;
-};
-
-/* eMMC */
-&sd_emmc_c {
- status = "okay";
- pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>;
- pinctrl-1 = <&emmc_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <8>;
- cap-mmc-highspeed;
- mmc-ddr-1_8v;
- mmc-hs200-1_8v;
- max-frequency = <200000000>;
- disable-wp;
-
- mmc-pwrseq = <&emmc_pwrseq>;
- vmmc-supply = <&vcc_3v3>;
- vqmmc-supply = <&vcc_1v8>;
-};
-
-&tdmif_b {
- status = "okay";
-};
-
-&tdmout_b {
- status = "okay";
-};
-
-&tohdmitx {
- status = "okay";
-};
-
-&uart_A {
- status = "okay";
- pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
- pinctrl-names = "default";
- uart-has-rtscts;
-
- bluetooth {
- compatible = "brcm,bcm43438-bt";
- shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
- max-speed = <2000000>;
- clocks = <&wifi32k>;
- clock-names = "lpo";
- };
-};
-
-&uart_AO {
- status = "okay";
- pinctrl-0 = <&uart_ao_a_pins>;
- pinctrl-names = "default";
-};
-
-&usb {
- status = "okay";
- dr_mode = "host";
-};
diff --git a/arch/arm/dts/meson-g12a-sei510.dts b/arch/arm/dts/meson-g12a-sei510.dts
deleted file mode 100644
index 81269cc..0000000
--- a/arch/arm/dts/meson-g12a-sei510.dts
+++ /dev/null
@@ -1,566 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2019 BayLibre SAS. All rights reserved.
- */
-
-/dts-v1/;
-
-#include "meson-g12a.dtsi"
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/gpio/meson-g12a-gpio.h>
-#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
-
-/ {
- compatible = "seirobotics,sei510", "amlogic,g12a";
- model = "SEI Robotics SEI510";
-
- adc_keys {
- compatible = "adc-keys";
- io-channels = <&saradc 0>;
- io-channel-names = "buttons";
- keyup-threshold-microvolt = <1800000>;
-
- button-onoff {
- label = "On/Off";
- linux,code = <KEY_POWER>;
- press-threshold-microvolt = <1700000>;
- };
- };
-
- aliases {
- serial0 = &uart_AO;
- ethernet0 = ðmac;
- };
-
- mono_dac: audio-codec-0 {
- compatible = "maxim,max98357a";
- #sound-dai-cells = <0>;
- sound-name-prefix = "U16";
- sdmode-gpios = <&gpio GPIOX_8 GPIO_ACTIVE_HIGH>;
- };
-
- dmics: audio-codec-1 {
- #sound-dai-cells = <0>;
- compatible = "dmic-codec";
- num-channels = <2>;
- wakeup-delay-ms = <50>;
- status = "okay";
- sound-name-prefix = "MIC";
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- cvbs-connector {
- compatible = "composite-video-connector";
-
- port {
- cvbs_connector_in: endpoint {
- remote-endpoint = <&cvbs_vdac_out>;
- };
- };
- };
-
- emmc_pwrseq: emmc-pwrseq {
- compatible = "mmc-pwrseq-emmc";
- reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
- };
-
- hdmi-connector {
- compatible = "hdmi-connector";
- type = "a";
-
- port {
- hdmi_connector_in: endpoint {
- remote-endpoint = <&hdmi_tx_tmds_out>;
- };
- };
- };
-
- memory@0 {
- device_type = "memory";
- reg = <0x0 0x0 0x0 0x40000000>;
- };
-
- ao_5v: regulator-ao_5v {
- compatible = "regulator-fixed";
- regulator-name = "AO_5V";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&dc_in>;
- regulator-always-on;
- };
-
- dc_in: regulator-dc_in {
- compatible = "regulator-fixed";
- regulator-name = "DC_IN";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- regulator-always-on;
- };
-
- emmc_1v8: regulator-emmc_1v8 {
- compatible = "regulator-fixed";
- regulator-name = "EMMC_1V8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vddao_3v3>;
- regulator-always-on;
- };
-
- vddao_3v3: regulator-vddao_3v3 {
- compatible = "regulator-fixed";
- regulator-name = "VDDAO_3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&dc_in>;
- regulator-always-on;
- };
-
- vddao_3v3_t: regultor-vddao_3v3_t {
- compatible = "regulator-fixed";
- regulator-name = "VDDAO_3V3_T";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vddao_3v3>;
- gpio = <&gpio GPIOH_8 GPIO_OPEN_DRAIN>;
- enable-active-high;
- };
-
- vddcpu: regulator-vddcpu {
- /*
- * SY8120B1ABC DC/DC Regulator.
- */
- compatible = "pwm-regulator";
-
- regulator-name = "VDDCPU";
- regulator-min-microvolt = <721000>;
- regulator-max-microvolt = <1022000>;
-
- vin-supply = <&dc_in>;
-
- pwms = <&pwm_AO_cd 1 1250 0>;
- pwm-dutycycle-range = <100 0>;
-
- regulator-boot-on;
- regulator-always-on;
- };
-
- vddio_ao1v8: regulator-vddio_ao1v8 {
- compatible = "regulator-fixed";
- regulator-name = "VDDIO_AO1V8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vddao_3v3>;
- regulator-always-on;
- };
-
- reserved-memory {
- /* TEE Reserved Memory */
- bl32_reserved: bl32@5000000 {
- reg = <0x0 0x05300000 0x0 0x2000000>;
- no-map;
- };
- };
-
- sdio_pwrseq: sdio-pwrseq {
- compatible = "mmc-pwrseq-simple";
- reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
- clocks = <&wifi32k>;
- clock-names = "ext_clock";
- };
-
- wifi32k: wifi32k {
- compatible = "pwm-clock";
- #clock-cells = <0>;
- clock-frequency = <32768>;
- pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
- };
-
- sound {
- compatible = "amlogic,axg-sound-card";
- model = "SEI510";
- audio-aux-devs = <&tdmout_a>, <&tdmout_b>,
- <&tdmin_a>, <&tdmin_b>;
- audio-routing = "TDMOUT_A IN 0", "FRDDR_A OUT 0",
- "TDMOUT_A IN 1", "FRDDR_B OUT 0",
- "TDMOUT_A IN 2", "FRDDR_C OUT 0",
- "TDM_A Playback", "TDMOUT_A OUT",
- "TDMOUT_B IN 0", "FRDDR_A OUT 1",
- "TDMOUT_B IN 1", "FRDDR_B OUT 1",
- "TDMOUT_B IN 2", "FRDDR_C OUT 1",
- "TDM_B Playback", "TDMOUT_B OUT",
- "TODDR_A IN 4", "PDM Capture",
- "TODDR_B IN 4", "PDM Capture",
- "TODDR_C IN 4", "PDM Capture",
- "TDMIN_A IN 0", "TDM_A Capture",
- "TDMIN_A IN 3", "TDM_A Loopback",
- "TDMIN_B IN 0", "TDM_A Capture",
- "TDMIN_B IN 3", "TDM_A Loopback",
- "TDMIN_A IN 1", "TDM_B Capture",
- "TDMIN_A IN 4", "TDM_B Loopback",
- "TDMIN_B IN 1", "TDM_B Capture",
- "TDMIN_B IN 4", "TDM_B Loopback",
- "TODDR_A IN 0", "TDMIN_A OUT",
- "TODDR_B IN 0", "TDMIN_A OUT",
- "TODDR_C IN 0", "TDMIN_A OUT",
- "TODDR_A IN 1", "TDMIN_B OUT",
- "TODDR_B IN 1", "TDMIN_B OUT",
- "TODDR_C IN 1", "TDMIN_B OUT";
-
- assigned-clocks = <&clkc CLKID_MPLL2>,
- <&clkc CLKID_MPLL0>,
- <&clkc CLKID_MPLL1>;
- assigned-clock-parents = <0>, <0>, <0>;
- assigned-clock-rates = <294912000>,
- <270950400>,
- <393216000>;
- status = "okay";
-
- dai-link-0 {
- sound-dai = <&frddr_a>;
- };
-
- dai-link-1 {
- sound-dai = <&frddr_b>;
- };
-
- dai-link-2 {
- sound-dai = <&frddr_c>;
- };
-
- dai-link-3 {
- sound-dai = <&toddr_a>;
- };
-
- dai-link-4 {
- sound-dai = <&toddr_b>;
- };
-
- dai-link-5 {
- sound-dai = <&toddr_c>;
- };
-
- /* internal speaker interface */
- dai-link-6 {
- sound-dai = <&tdmif_a>;
- dai-format = "i2s";
- dai-tdm-slot-tx-mask-0 = <1 1>;
- mclk-fs = <256>;
-
- codec-0 {
- sound-dai = <&mono_dac>;
- };
-
- codec-1 {
- sound-dai = <&tohdmitx TOHDMITX_I2S_IN_A>;
- };
- };
-
- /* 8ch hdmi interface */
- dai-link-7 {
- sound-dai = <&tdmif_b>;
- dai-format = "i2s";
- dai-tdm-slot-tx-mask-0 = <1 1>;
- dai-tdm-slot-tx-mask-1 = <1 1>;
- dai-tdm-slot-tx-mask-2 = <1 1>;
- dai-tdm-slot-tx-mask-3 = <1 1>;
- mclk-fs = <256>;
-
- codec {
- sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
- };
- };
-
- /* internal digital mics */
- dai-link-8 {
- sound-dai = <&pdm>;
-
- codec {
- sound-dai = <&dmics>;
- };
- };
-
- /* hdmi glue */
- dai-link-9 {
- sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
-
- codec {
- sound-dai = <&hdmi_tx>;
- };
- };
- };
-};
-
-&arb {
- status = "okay";
-};
-
-&cec_AO {
- pinctrl-0 = <&cec_ao_a_h_pins>;
- pinctrl-names = "default";
- status = "disabled";
- hdmi-phandle = <&hdmi_tx>;
-};
-
-&cecb_AO {
- pinctrl-0 = <&cec_ao_b_h_pins>;
- pinctrl-names = "default";
- status = "okay";
- hdmi-phandle = <&hdmi_tx>;
-};
-
-&clkc_audio {
- status = "okay";
-};
-
-&cpu0 {
- cpu-supply = <&vddcpu>;
- operating-points-v2 = <&cpu_opp_table>;
- clocks = <&clkc CLKID_CPU_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu1 {
- cpu-supply = <&vddcpu>;
- operating-points-v2 = <&cpu_opp_table>;
- clocks = <&clkc CLKID_CPU_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu2 {
- cpu-supply = <&vddcpu>;
- operating-points-v2 = <&cpu_opp_table>;
- clocks = <&clkc CLKID_CPU_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu3 {
- cpu-supply = <&vddcpu>;
- operating-points-v2 = <&cpu_opp_table>;
- clocks = <&clkc CLKID_CPU_CLK>;
- clock-latency = <50000>;
-};
-
-&cvbs_vdac_port {
- cvbs_vdac_out: endpoint {
- remote-endpoint = <&cvbs_connector_in>;
- };
-};
-
-ðmac {
- status = "okay";
- phy-handle = <&internal_ephy>;
- phy-mode = "rmii";
-};
-
-&frddr_a {
- status = "okay";
-};
-
-&frddr_b {
- status = "okay";
-};
-
-&frddr_c {
- status = "okay";
-};
-
-&hdmi_tx {
- status = "okay";
- pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>;
- pinctrl-names = "default";
-};
-
-&hdmi_tx_tmds_port {
- hdmi_tx_tmds_out: endpoint {
- remote-endpoint = <&hdmi_connector_in>;
- };
-};
-
-&i2c3 {
- status = "okay";
- pinctrl-0 = <&i2c3_sda_a_pins>, <&i2c3_sck_a_pins>;
- pinctrl-names = "default";
-};
-
-&ir {
- status = "okay";
- pinctrl-0 = <&remote_input_ao_pins>;
- pinctrl-names = "default";
-};
-
-&pwm_AO_cd {
- pinctrl-0 = <&pwm_ao_d_e_pins>;
- pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin1";
- status = "okay";
-};
-
-&pwm_ef {
- status = "okay";
- pinctrl-0 = <&pwm_e_pins>;
- pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin0";
-};
-
-&pdm {
- pinctrl-0 = <&pdm_din0_z_pins>, <&pdm_din1_z_pins>,
- <&pdm_din2_z_pins>, <&pdm_din3_z_pins>,
- <&pdm_dclk_z_pins>;
- pinctrl-names = "default";
- status = "okay";
-};
-
-&saradc {
- status = "okay";
- vref-supply = <&vddio_ao1v8>;
-};
-
-/* SDIO */
-&sd_emmc_a {
- status = "okay";
- pinctrl-0 = <&sdio_pins>;
- pinctrl-1 = <&sdio_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
- #address-cells = <1>;
- #size-cells = <0>;
-
- bus-width = <4>;
- cap-sd-highspeed;
- sd-uhs-sdr50;
- max-frequency = <100000000>;
-
- non-removable;
- disable-wp;
-
- /* WiFi firmware requires power to be kept while in suspend */
- keep-power-in-suspend;
-
- mmc-pwrseq = <&sdio_pwrseq>;
-
- vmmc-supply = <&vddao_3v3>;
- vqmmc-supply = <&vddio_ao1v8>;
-
- brcmf: wifi@1 {
- reg = <1>;
- compatible = "brcm,bcm4329-fmac";
- };
-};
-
-/* SD card */
-&sd_emmc_b {
- status = "okay";
- pinctrl-0 = <&sdcard_c_pins>;
- pinctrl-1 = <&sdcard_clk_gate_c_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <4>;
- cap-sd-highspeed;
- max-frequency = <50000000>;
- disable-wp;
-
- cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
- vmmc-supply = <&vddao_3v3>;
- vqmmc-supply = <&vddao_3v3>;
-};
-
-/* eMMC */
-&sd_emmc_c {
- status = "okay";
- pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>;
- pinctrl-1 = <&emmc_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <8>;
- cap-mmc-highspeed;
- mmc-ddr-1_8v;
- mmc-hs200-1_8v;
- max-frequency = <200000000>;
- non-removable;
- disable-wp;
-
- mmc-pwrseq = <&emmc_pwrseq>;
- vmmc-supply = <&vddao_3v3>;
- vqmmc-supply = <&emmc_1v8>;
-};
-
-&tdmif_a {
- pinctrl-0 = <&tdm_a_dout0_pins>, <&tdm_a_fs_pins>, <&tdm_a_sclk_pins>;
- pinctrl-names = "default";
- status = "okay";
-
- assigned-clocks = <&clkc_audio AUD_CLKID_TDM_SCLK_PAD0>,
- <&clkc_audio AUD_CLKID_TDM_LRCLK_PAD0>;
- assigned-clock-parents = <&clkc_audio AUD_CLKID_MST_A_SCLK>,
- <&clkc_audio AUD_CLKID_MST_A_LRCLK>;
- assigned-clock-rates = <0>, <0>;
-};
-
-&tdmif_b {
- status = "okay";
-};
-
-&tdmin_a {
- status = "okay";
-};
-
-&tdmin_b {
- status = "okay";
-};
-
-&tdmout_a {
- status = "okay";
-};
-
-&tdmout_b {
- status = "okay";
-};
-
-&toddr_a {
- status = "okay";
-};
-
-&toddr_b {
- status = "okay";
-};
-
-&toddr_c {
- status = "okay";
-};
-
-&tohdmitx {
- status = "okay";
-};
-
-&uart_A {
- status = "okay";
- pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
- pinctrl-names = "default";
- uart-has-rtscts;
-
- bluetooth {
- compatible = "brcm,bcm43438-bt";
- shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
- max-speed = <2000000>;
- clocks = <&wifi32k>;
- clock-names = "lpo";
- vbat-supply = <&vddao_3v3>;
- vddio-supply = <&vddio_ao1v8>;
- };
-};
-
-&uart_AO {
- status = "okay";
- pinctrl-0 = <&uart_ao_a_pins>;
- pinctrl-names = "default";
-};
-
-&usb {
- status = "okay";
- dr_mode = "host";
-};
diff --git a/arch/arm/dts/meson-g12a-u200.dts b/arch/arm/dts/meson-g12a-u200.dts
deleted file mode 100644
index a26bfe7..0000000
--- a/arch/arm/dts/meson-g12a-u200.dts
+++ /dev/null
@@ -1,308 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2018 Amlogic, Inc. All rights reserved.
- */
-
-/dts-v1/;
-
-#include "meson-g12a.dtsi"
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/gpio/meson-g12a-gpio.h>
-
-/ {
- compatible = "amlogic,u200", "amlogic,g12a";
- model = "Amlogic Meson G12A U200 Development Board";
-
- aliases {
- serial0 = &uart_AO;
- ethernet0 = ðmac;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- cvbs-connector {
- compatible = "composite-video-connector";
-
- port {
- cvbs_connector_in: endpoint {
- remote-endpoint = <&cvbs_vdac_out>;
- };
- };
- };
-
- emmc_pwrseq: emmc-pwrseq {
- compatible = "mmc-pwrseq-emmc";
- reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
- };
-
- hdmi-connector {
- compatible = "hdmi-connector";
- type = "a";
-
- port {
- hdmi_connector_in: endpoint {
- remote-endpoint = <&hdmi_tx_tmds_out>;
- };
- };
- };
-
- memory@0 {
- device_type = "memory";
- reg = <0x0 0x0 0x0 0x40000000>;
- };
-
- flash_1v8: regulator-flash_1v8 {
- compatible = "regulator-fixed";
- regulator-name = "FLASH_1V8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vcc_3v3>;
- regulator-always-on;
- };
-
- main_12v: regulator-main_12v {
- compatible = "regulator-fixed";
- regulator-name = "12V";
- regulator-min-microvolt = <12000000>;
- regulator-max-microvolt = <12000000>;
- regulator-always-on;
- };
-
- usb_pwr_en: regulator-usb_pwr_en {
- compatible = "regulator-fixed";
- regulator-name = "USB_PWR_EN";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc_5v>;
-
- gpio = <&gpio GPIOH_6 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
-
- vcc_1v8: regulator-vcc_1v8 {
- compatible = "regulator-fixed";
- regulator-name = "VCC_1V8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vcc_3v3>;
- regulator-always-on;
- };
-
- vcc_3v3: regulator-vcc_3v3 {
- compatible = "regulator-fixed";
- regulator-name = "VCC_3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vddao_3v3>;
- regulator-always-on;
- /* FIXME: actually controlled by VDDCPU_B_EN */
- };
-
- vcc_5v: regulator-vcc_5v {
- compatible = "regulator-fixed";
- regulator-name = "VCC_5V";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&main_12v>;
-
- gpio = <&gpio GPIOH_8 GPIO_OPEN_DRAIN>;
- enable-active-high;
- };
-
- vddao_1v8: regulator-vddao_1v8 {
- compatible = "regulator-fixed";
- regulator-name = "VDDAO_1V8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vddao_3v3>;
- regulator-always-on;
- };
-
- vddao_3v3: regulator-vddao_3v3 {
- compatible = "regulator-fixed";
- regulator-name = "VDDAO_3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&main_12v>;
- regulator-always-on;
- };
-
- vddcpu: regulator-vddcpu {
- /*
- * MP8756GD Regulator.
- */
- compatible = "pwm-regulator";
-
- regulator-name = "VDDCPU";
- regulator-min-microvolt = <721000>;
- regulator-max-microvolt = <1022000>;
-
- vin-supply = <&main_12v>;
-
- pwms = <&pwm_AO_cd 1 1250 0>;
- pwm-dutycycle-range = <100 0>;
-
- regulator-boot-on;
- regulator-always-on;
- };
-};
-
-&cec_AO {
- pinctrl-0 = <&cec_ao_a_h_pins>;
- pinctrl-names = "default";
- status = "disabled";
- hdmi-phandle = <&hdmi_tx>;
-};
-
-&cecb_AO {
- pinctrl-0 = <&cec_ao_b_h_pins>;
- pinctrl-names = "default";
- status = "okay";
- hdmi-phandle = <&hdmi_tx>;
-};
-
-&cpu0 {
- cpu-supply = <&vddcpu>;
- operating-points-v2 = <&cpu_opp_table>;
- clocks = <&clkc CLKID_CPU_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu1 {
- cpu-supply = <&vddcpu>;
- operating-points-v2 = <&cpu_opp_table>;
- clocks = <&clkc CLKID_CPU_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu2 {
- cpu-supply = <&vddcpu>;
- operating-points-v2 = <&cpu_opp_table>;
- clocks = <&clkc CLKID_CPU_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu3 {
- cpu-supply = <&vddcpu>;
- operating-points-v2 = <&cpu_opp_table>;
- clocks = <&clkc CLKID_CPU_CLK>;
- clock-latency = <50000>;
-};
-
-&cvbs_vdac_port {
- cvbs_vdac_out: endpoint {
- remote-endpoint = <&cvbs_connector_in>;
- };
-};
-
-ðmac {
- status = "okay";
- phy-handle = <&internal_ephy>;
- phy-mode = "rmii";
-};
-
-&hdmi_tx {
- status = "okay";
- pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>;
- pinctrl-names = "default";
- hdmi-supply = <&vcc_5v>;
-};
-
-&hdmi_tx_tmds_port {
- hdmi_tx_tmds_out: endpoint {
- remote-endpoint = <&hdmi_connector_in>;
- };
-};
-
-&ir {
- status = "okay";
- pinctrl-0 = <&remote_input_ao_pins>;
- pinctrl-names = "default";
-};
-
-/* i2c Touch */
-&i2c0 {
- status = "okay";
- pinctrl-0 = <&i2c0_sda_z0_pins>, <&i2c0_sck_z1_pins>;
- pinctrl-names = "default";
-};
-
-/* i2c CM */
-&i2c2 {
- status = "okay";
- pinctrl-0 = <&i2c2_sda_z_pins>, <&i2c2_sck_z_pins>;
- pinctrl-names = "default";
-};
-
-/* i2c Audio */
-&i2c3 {
- status = "okay";
- pinctrl-0 = <&i2c3_sda_a_pins>, <&i2c3_sck_a_pins>;
- pinctrl-names = "default";
-};
-
-&pwm_AO_cd {
- pinctrl-0 = <&pwm_ao_d_e_pins>;
- pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin1";
- status = "okay";
-};
-
-/* SD card */
-&sd_emmc_b {
- status = "okay";
- pinctrl-0 = <&sdcard_c_pins>;
- pinctrl-1 = <&sdcard_clk_gate_c_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <4>;
- cap-sd-highspeed;
- max-frequency = <50000000>;
- disable-wp;
-
- cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
- vmmc-supply = <&vddao_3v3>;
- vqmmc-supply = <&vddao_3v3>;
-};
-
-/* eMMC */
-&sd_emmc_c {
- status = "okay";
- pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>;
- pinctrl-1 = <&emmc_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <8>;
- cap-mmc-highspeed;
- mmc-ddr-1_8v;
- mmc-hs200-1_8v;
- max-frequency = <200000000>;
- non-removable;
- disable-wp;
-
- mmc-pwrseq = <&emmc_pwrseq>;
- vmmc-supply = <&vcc_3v3>;
- vqmmc-supply = <&flash_1v8>;
-};
-
-&uart_AO {
- status = "okay";
- pinctrl-0 = <&uart_ao_a_pins>;
- pinctrl-names = "default";
-};
-
-&usb {
- status = "okay";
- vbus-supply = <&usb_pwr_en>;
-};
-
-&usb2_phy0 {
- phy-supply = <&vcc_5v>;
-};
-
-&usb2_phy1 {
- phy-supply = <&vcc_5v>;
-};
diff --git a/arch/arm/dts/meson-g12a.dtsi b/arch/arm/dts/meson-g12a.dtsi
deleted file mode 100644
index 7677764..0000000
--- a/arch/arm/dts/meson-g12a.dtsi
+++ /dev/null
@@ -1,140 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2018 Amlogic, Inc. All rights reserved.
- */
-
-#include "meson-g12.dtsi"
-
-/ {
- compatible = "amlogic,g12a";
-
- cpus {
- #address-cells = <0x2>;
- #size-cells = <0x0>;
-
- cpu0: cpu@0 {
- device_type = "cpu";
- compatible = "arm,cortex-a53";
- reg = <0x0 0x0>;
- enable-method = "psci";
- next-level-cache = <&l2>;
- #cooling-cells = <2>;
- };
-
- cpu1: cpu@1 {
- device_type = "cpu";
- compatible = "arm,cortex-a53";
- reg = <0x0 0x1>;
- enable-method = "psci";
- next-level-cache = <&l2>;
- #cooling-cells = <2>;
- };
-
- cpu2: cpu@2 {
- device_type = "cpu";
- compatible = "arm,cortex-a53";
- reg = <0x0 0x2>;
- enable-method = "psci";
- next-level-cache = <&l2>;
- #cooling-cells = <2>;
- };
-
- cpu3: cpu@3 {
- device_type = "cpu";
- compatible = "arm,cortex-a53";
- reg = <0x0 0x3>;
- enable-method = "psci";
- next-level-cache = <&l2>;
- #cooling-cells = <2>;
- };
-
- l2: l2-cache0 {
- compatible = "cache";
- cache-level = <2>;
- };
- };
-
- cpu_opp_table: opp-table {
- compatible = "operating-points-v2";
- opp-shared;
-
- opp-100000000 {
- opp-hz = /bits/ 64 <100000000>;
- opp-microvolt = <731000>;
- };
-
- opp-250000000 {
- opp-hz = /bits/ 64 <250000000>;
- opp-microvolt = <731000>;
- };
-
- opp-500000000 {
- opp-hz = /bits/ 64 <500000000>;
- opp-microvolt = <731000>;
- };
-
- opp-667000000 {
- opp-hz = /bits/ 64 <666666666>;
- opp-microvolt = <731000>;
- };
-
- opp-1000000000 {
- opp-hz = /bits/ 64 <1000000000>;
- opp-microvolt = <731000>;
- };
-
- opp-1200000000 {
- opp-hz = /bits/ 64 <1200000000>;
- opp-microvolt = <731000>;
- };
-
- opp-1398000000 {
- opp-hz = /bits/ 64 <1398000000>;
- opp-microvolt = <761000>;
- };
-
- opp-1512000000 {
- opp-hz = /bits/ 64 <1512000000>;
- opp-microvolt = <791000>;
- };
-
- opp-1608000000 {
- opp-hz = /bits/ 64 <1608000000>;
- opp-microvolt = <831000>;
- };
-
- opp-1704000000 {
- opp-hz = /bits/ 64 <1704000000>;
- opp-microvolt = <861000>;
- };
-
- opp-1800000000 {
- opp-hz = /bits/ 64 <1800000000>;
- opp-microvolt = <981000>;
- };
- };
-};
-
-&cpu_thermal {
- cooling-maps {
- map0 {
- trip = <&cpu_passive>;
- cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- };
-
- map1 {
- trip = <&cpu_hot>;
- cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- };
- };
-};
-
-&pmu {
- compatible = "amlogic,g12a-ddr-pmu";
-};
diff --git a/arch/arm/dts/meson-g12b-a311d-bananapi-m2s.dts b/arch/arm/dts/meson-g12b-a311d-bananapi-m2s.dts
deleted file mode 100644
index 3136531..0000000
--- a/arch/arm/dts/meson-g12b-a311d-bananapi-m2s.dts
+++ /dev/null
@@ -1,33 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2023 Christian Hewitt <christianshewitt@gmail.com>
- */
-
-/dts-v1/;
-
-#include "meson-g12b-a311d.dtsi"
-#include "meson-g12b-bananapi.dtsi"
-
-/ {
- compatible = "bananapi,bpi-m2s", "amlogic,a311d", "amlogic,g12b";
- model = "BananaPi M2S";
-
- aliases {
- i2c0 = &i2c1;
- i2c1 = &i2c3;
- };
-};
-
-/* Camera (CSI) bus */
-&i2c1 {
- status = "okay";
- pinctrl-0 = <&i2c1_sda_h6_pins>, <&i2c1_sck_h7_pins>;
- pinctrl-names = "default";
-};
-
-/* Display (DSI) bus */
-&i2c3 {
- status = "okay";
- pinctrl-0 = <&i2c3_sda_a_pins>, <&i2c3_sck_a_pins>;
- pinctrl-names = "default";
-};
diff --git a/arch/arm/dts/meson-g12b-a311d-khadas-vim3.dts b/arch/arm/dts/meson-g12b-a311d-khadas-vim3.dts
deleted file mode 100644
index 124a809..0000000
--- a/arch/arm/dts/meson-g12b-a311d-khadas-vim3.dts
+++ /dev/null
@@ -1,41 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2019 BayLibre, SAS
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- * Copyright (c) 2019 Christian Hewitt <christianshewitt@gmail.com>
- */
-
-/dts-v1/;
-
-#include "meson-g12b-a311d.dtsi"
-#include "meson-khadas-vim3.dtsi"
-#include "meson-g12b-khadas-vim3.dtsi"
-
-/ {
- compatible = "khadas,vim3", "amlogic,a311d", "amlogic,g12b";
-};
-
-/*
- * The VIM3 on-board MCU can mux the PCIe/USB3.0 shared differential
- * lines using a FUSB340TMX USB 3.1 SuperSpeed Data Switch between
- * an USB3.0 Type A connector and a M.2 Key M slot.
- * The PHY driving these differential lines is shared between
- * the USB3.0 controller and the PCIe Controller, thus only
- * a single controller can use it.
- * If the MCU is configured to mux the PCIe/USB3.0 differential lines
- * to the M.2 Key M slot, uncomment the following block to disable
- * USB3.0 from the USB Complex and enable the PCIe controller.
- * The End User is not expected to uncomment the following except for
- * testing purposes, but instead rely on the firmware/bootloader to
- * update these nodes accordingly if PCIe mode is selected by the MCU.
- */
-/*
-&pcie {
- status = "okay";
-};
-
-&usb {
- phys = <&usb2_phy0>, <&usb2_phy1>;
- phy-names = "usb2-phy0", "usb2-phy1";
-};
- */
diff --git a/arch/arm/dts/meson-g12b-a311d.dtsi b/arch/arm/dts/meson-g12b-a311d.dtsi
deleted file mode 100644
index d61f430..0000000
--- a/arch/arm/dts/meson-g12b-a311d.dtsi
+++ /dev/null
@@ -1,149 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2019 BayLibre, SAS
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- */
-
-#include "meson-g12b.dtsi"
-
-/ {
- cpu_opp_table_0: opp-table-0 {
- compatible = "operating-points-v2";
- opp-shared;
-
- opp-100000000 {
- opp-hz = /bits/ 64 <100000000>;
- opp-microvolt = <731000>;
- };
-
- opp-250000000 {
- opp-hz = /bits/ 64 <250000000>;
- opp-microvolt = <731000>;
- };
-
- opp-500000000 {
- opp-hz = /bits/ 64 <500000000>;
- opp-microvolt = <731000>;
- };
-
- opp-667000000 {
- opp-hz = /bits/ 64 <667000000>;
- opp-microvolt = <731000>;
- };
-
- opp-1000000000 {
- opp-hz = /bits/ 64 <1000000000>;
- opp-microvolt = <761000>;
- };
-
- opp-1200000000 {
- opp-hz = /bits/ 64 <1200000000>;
- opp-microvolt = <781000>;
- };
-
- opp-1398000000 {
- opp-hz = /bits/ 64 <1398000000>;
- opp-microvolt = <811000>;
- };
-
- opp-1512000000 {
- opp-hz = /bits/ 64 <1512000000>;
- opp-microvolt = <861000>;
- };
-
- opp-1608000000 {
- opp-hz = /bits/ 64 <1608000000>;
- opp-microvolt = <901000>;
- };
-
- opp-1704000000 {
- opp-hz = /bits/ 64 <1704000000>;
- opp-microvolt = <951000>;
- };
-
- opp-1800000000 {
- opp-hz = /bits/ 64 <1800000000>;
- opp-microvolt = <1001000>;
- };
- };
-
- cpub_opp_table_1: opp-table-1 {
- compatible = "operating-points-v2";
- opp-shared;
-
- opp-100000000 {
- opp-hz = /bits/ 64 <100000000>;
- opp-microvolt = <731000>;
- };
-
- opp-250000000 {
- opp-hz = /bits/ 64 <250000000>;
- opp-microvolt = <731000>;
- };
-
- opp-500000000 {
- opp-hz = /bits/ 64 <500000000>;
- opp-microvolt = <731000>;
- };
-
- opp-667000000 {
- opp-hz = /bits/ 64 <667000000>;
- opp-microvolt = <731000>;
- };
-
- opp-1000000000 {
- opp-hz = /bits/ 64 <1000000000>;
- opp-microvolt = <731000>;
- };
-
- opp-1200000000 {
- opp-hz = /bits/ 64 <1200000000>;
- opp-microvolt = <751000>;
- };
-
- opp-1398000000 {
- opp-hz = /bits/ 64 <1398000000>;
- opp-microvolt = <771000>;
- };
-
- opp-1512000000 {
- opp-hz = /bits/ 64 <1512000000>;
- opp-microvolt = <771000>;
- };
-
- opp-1608000000 {
- opp-hz = /bits/ 64 <1608000000>;
- opp-microvolt = <781000>;
- };
-
- opp-1704000000 {
- opp-hz = /bits/ 64 <1704000000>;
- opp-microvolt = <791000>;
- };
-
- opp-1800000000 {
- opp-hz = /bits/ 64 <1800000000>;
- opp-microvolt = <831000>;
- };
-
- opp-1908000000 {
- opp-hz = /bits/ 64 <1908000000>;
- opp-microvolt = <861000>;
- };
-
- opp-2016000000 {
- opp-hz = /bits/ 64 <2016000000>;
- opp-microvolt = <911000>;
- };
-
- opp-2108000000 {
- opp-hz = /bits/ 64 <2108000000>;
- opp-microvolt = <951000>;
- };
-
- opp-2208000000 {
- opp-hz = /bits/ 64 <2208000000>;
- opp-microvolt = <1011000>;
- };
- };
-};
diff --git a/arch/arm/dts/meson-g12b-bananapi-cm4-cm4io.dts b/arch/arm/dts/meson-g12b-bananapi-cm4-cm4io.dts
deleted file mode 100644
index 1b0c388..0000000
--- a/arch/arm/dts/meson-g12b-bananapi-cm4-cm4io.dts
+++ /dev/null
@@ -1,165 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2023 Neil Armstrong <neil.armstrong@linaro.org>
- */
-
-/dts-v1/;
-
-#include "meson-g12b-bananapi-cm4.dtsi"
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/leds/common.h>
-#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
-
-/ {
- compatible = "bananapi,bpi-cm4io", "bananapi,bpi-cm4", "amlogic,a311d", "amlogic,g12b";
- model = "BananaPi BPI-CM4IO Baseboard with BPI-CM4 Module";
-
- aliases {
- ethernet0 = ðmac;
- i2c0 = &i2c1;
- i2c1 = &i2c3;
- };
-
- adc-keys {
- compatible = "adc-keys";
- io-channels = <&saradc 2>;
- io-channel-names = "buttons";
- keyup-threshold-microvolt = <1710000>;
-
- button-function {
- label = "Function";
- linux,code = <KEY_FN>;
- press-threshold-microvolt = <10000>;
- };
- };
-
- hdmi_connector: hdmi-connector {
- compatible = "hdmi-connector";
- type = "a";
-
- port {
- hdmi_connector_in: endpoint {
- remote-endpoint = <&hdmi_tx_tmds_out>;
- };
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- led-blue {
- color = <LED_COLOR_ID_BLUE>;
- function = LED_FUNCTION_STATUS;
- gpios = <&gpio_ao GPIOAO_7 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "heartbeat";
- };
-
- led-green {
- color = <LED_COLOR_ID_GREEN>;
- function = LED_FUNCTION_STATUS;
- gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_HIGH>;
- };
- };
-
- sound {
- compatible = "amlogic,axg-sound-card";
- model = "BPI-CM4IO";
- audio-aux-devs = <&tdmout_b>;
- audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
- "TDMOUT_B IN 1", "FRDDR_B OUT 1",
- "TDMOUT_B IN 2", "FRDDR_C OUT 1",
- "TDM_B Playback", "TDMOUT_B OUT";
-
- assigned-clocks = <&clkc CLKID_MPLL2>,
- <&clkc CLKID_MPLL0>,
- <&clkc CLKID_MPLL1>;
- assigned-clock-parents = <0>, <0>, <0>;
- assigned-clock-rates = <294912000>,
- <270950400>,
- <393216000>;
-
- dai-link-0 {
- sound-dai = <&frddr_a>;
- };
-
- dai-link-1 {
- sound-dai = <&frddr_b>;
- };
-
- dai-link-2 {
- sound-dai = <&frddr_c>;
- };
-
- /* 8ch hdmi interface */
- dai-link-3 {
- sound-dai = <&tdmif_b>;
- dai-format = "i2s";
- dai-tdm-slot-tx-mask-0 = <1 1>;
- dai-tdm-slot-tx-mask-1 = <1 1>;
- dai-tdm-slot-tx-mask-2 = <1 1>;
- dai-tdm-slot-tx-mask-3 = <1 1>;
- mclk-fs = <256>;
-
- codec {
- sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
- };
- };
-
- /* hdmi glue */
- dai-link-4 {
- sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
-
- codec {
- sound-dai = <&hdmi_tx>;
- };
- };
- };
-};
-
-&cecb_AO {
- status = "okay";
-};
-
-ðmac {
- status = "okay";
-};
-
-&hdmi_tx {
- status = "okay";
-};
-
-&hdmi_tx_tmds_port {
- hdmi_tx_tmds_out: endpoint {
- remote-endpoint = <&hdmi_connector_in>;
- };
-};
-
-/* CSI port */
-&i2c1 {
- status = "okay";
-};
-
-/* DSI port for touchscreen */
-&i2c3 {
- status = "okay";
-};
-
-/* miniPCIe port with USB + SIM slot */
-&pcie {
- status = "okay";
-};
-
-&sd_emmc_b {
- status = "okay";
-};
-
-&tohdmitx {
- status = "okay";
-};
-
-/* Peripheral Only USB-C port */
-&usb {
- dr_mode = "peripheral";
-
- status = "okay";
-};
diff --git a/arch/arm/dts/meson-g12b-bananapi-cm4.dtsi b/arch/arm/dts/meson-g12b-bananapi-cm4.dtsi
deleted file mode 100644
index 97e5229..0000000
--- a/arch/arm/dts/meson-g12b-bananapi-cm4.dtsi
+++ /dev/null
@@ -1,388 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2023 Neil Armstrong <neil.armstrong@linaro.org>
- */
-
-#include "meson-g12b-a311d.dtsi"
-#include <dt-bindings/gpio/meson-g12a-gpio.h>
-
-/ {
- aliases {
- serial0 = &uart_AO;
- rtc1 = &vrtc;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- emmc_pwrseq: emmc-pwrseq {
- compatible = "mmc-pwrseq-emmc";
- reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
- };
-
- memory@0 {
- device_type = "memory";
- reg = <0x0 0x0 0x0 0x40000000>;
- };
-
- sdio_pwrseq: sdio-pwrseq {
- compatible = "mmc-pwrseq-simple";
- reset-gpios = <&gpio GPIOAO_6 GPIO_ACTIVE_LOW>;
- clocks = <&wifi32k>;
- clock-names = "ext_clock";
- };
-
- emmc_1v8: regulator-emmc-1v8 {
- compatible = "regulator-fixed";
- regulator-name = "EMMC_1V8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vddao_3v3>;
- regulator-always-on;
- };
-
- dc_in: regulator-dc-in {
- compatible = "regulator-fixed";
- regulator-name = "DC_IN";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- regulator-always-on;
- };
-
- vddio_c: regulator-vddio-c {
- compatible = "regulator-gpio";
- regulator-name = "VDDIO_C";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
-
- enable-gpio = <&gpio_ao GPIOAO_3 GPIO_OPEN_DRAIN>;
- enable-active-high;
- regulator-always-on;
-
- gpios = <&gpio_ao GPIOAO_9 GPIO_OPEN_DRAIN>;
- gpios-states = <1>;
-
- states = <1800000 0>,
- <3300000 1>;
- };
-
- vddao_1v8: regulator-vddao-1v8 {
- compatible = "regulator-fixed";
- regulator-name = "VDDAO_1V8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vddao_3v3>;
- regulator-always-on;
- };
-
- vddao_3v3: regulator-vddao-3v3 {
- compatible = "regulator-fixed";
- regulator-name = "VDDAO_3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&dc_in>;
- regulator-always-on;
- };
-
- vddcpu_a: regulator-vddcpu-a {
- /*
- * MP8756GD DC/DC Regulator.
- */
- compatible = "pwm-regulator";
-
- regulator-name = "VDDCPU_A";
- regulator-min-microvolt = <680000>;
- regulator-max-microvolt = <1040000>;
-
- pwm-supply = <&dc_in>;
-
- pwms = <&pwm_ab 0 1250 0>;
- pwm-dutycycle-range = <100 0>;
-
- regulator-boot-on;
- regulator-always-on;
- };
-
- vddcpu_b: regulator-vddcpu-b {
- /*
- * SY8120B1ABC DC/DC Regulator.
- */
- compatible = "pwm-regulator";
-
- regulator-name = "VDDCPU_B";
- regulator-min-microvolt = <680000>;
- regulator-max-microvolt = <1040000>;
-
- pwm-supply = <&dc_in>;
-
- pwms = <&pwm_AO_cd 1 1250 0>;
- pwm-dutycycle-range = <100 0>;
-
- regulator-boot-on;
- regulator-always-on;
- };
-
- wifi32k: wifi32k {
- compatible = "pwm-clock";
- #clock-cells = <0>;
- clock-frequency = <32768>;
- pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
- };
-};
-
-&arb {
- status = "okay";
-};
-
-&clkc_audio {
- status = "okay";
-};
-
-&cec_AO {
- pinctrl-0 = <&cec_ao_a_h_pins>;
- pinctrl-names = "default";
- hdmi-phandle = <&hdmi_tx>;
-};
-
-&cecb_AO {
- pinctrl-0 = <&cec_ao_b_h_pins>;
- pinctrl-names = "default";
- hdmi-phandle = <&hdmi_tx>;
-};
-
-&cpu0 {
- cpu-supply = <&vddcpu_b>;
- operating-points-v2 = <&cpu_opp_table_0>;
- clocks = <&clkc CLKID_CPU_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu1 {
- cpu-supply = <&vddcpu_b>;
- operating-points-v2 = <&cpu_opp_table_0>;
- clocks = <&clkc CLKID_CPU_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu100 {
- cpu-supply = <&vddcpu_a>;
- operating-points-v2 = <&cpub_opp_table_1>;
- clocks = <&clkc CLKID_CPUB_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu101 {
- cpu-supply = <&vddcpu_a>;
- operating-points-v2 = <&cpub_opp_table_1>;
- clocks = <&clkc CLKID_CPUB_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu102 {
- cpu-supply = <&vddcpu_a>;
- operating-points-v2 = <&cpub_opp_table_1>;
- clocks = <&clkc CLKID_CPUB_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu103 {
- cpu-supply = <&vddcpu_a>;
- operating-points-v2 = <&cpub_opp_table_1>;
- clocks = <&clkc CLKID_CPUB_CLK>;
- clock-latency = <50000>;
-};
-
-&ext_mdio {
- external_phy: ethernet-phy@0 {
- /* Realtek RTL8211F (0x001cc916) */
- reg = <0>;
- max-speed = <1000>;
-
- interrupt-parent = <&gpio_intc>;
- /* MAC_INTR on GPIOZ_14 */
- interrupts = <26 IRQ_TYPE_LEVEL_LOW>;
- };
-};
-
-/* Ethernet to be enabled in baseboard DT */
-ðmac {
- pinctrl-0 = <ð_pins>, <ð_rgmii_pins>;
- pinctrl-names = "default";
- phy-mode = "rgmii-txid";
- phy-handle = <&external_phy>;
-};
-
-&frddr_a {
- status = "okay";
-};
-
-&frddr_b {
- status = "okay";
-};
-
-&frddr_c {
- status = "okay";
-};
-
-/* HDMI to be enabled in baseboard DT */
-&hdmi_tx {
- pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>;
- pinctrl-names = "default";
- hdmi-supply = <&dc_in>;
-};
-
-/* "Camera" I2C bus */
-&i2c1 {
- pinctrl-0 = <&i2c1_sda_h6_pins>, <&i2c1_sck_h7_pins>;
- pinctrl-names = "default";
-};
-
-/* Main I2C bus */
-&i2c2 {
- pinctrl-0 = <&i2c2_sda_x_pins>, <&i2c2_sck_x_pins>;
- pinctrl-names = "default";
-};
-
-/* "ID" I2C bus */
-&i2c3 {
- pinctrl-0 = <&i2c3_sda_a_pins>, <&i2c3_sck_a_pins>;
- pinctrl-names = "default";
-};
-
-&pcie {
- reset-gpios = <&gpio GPIOA_8 GPIO_ACTIVE_LOW>;
-};
-
-&pwm_ab {
- pinctrl-0 = <&pwm_a_e_pins>;
- pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin0";
-
- status = "okay";
-};
-
-&pwm_ef {
- pinctrl-0 = <&pwm_e_pins>;
- pinctrl-names = "default";
-
- status = "okay";
-};
-
-&pwm_AO_cd {
- pinctrl-0 = <&pwm_ao_d_e_pins>;
- pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin1";
-
- status = "okay";
-};
-
-&saradc {
- vref-supply = <&vddao_1v8>;
-
- status = "okay";
-};
-
-/* on-module SDIO WiFi */
-&sd_emmc_a {
- pinctrl-0 = <&sdio_pins>;
- pinctrl-1 = <&sdio_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
- #address-cells = <1>;
- #size-cells = <0>;
-
- bus-width = <4>;
- sd-uhs-sdr104;
- max-frequency = <50000000>;
-
- non-removable;
- disable-wp;
-
- /* WiFi firmware requires power in suspend */
- keep-power-in-suspend;
-
- mmc-pwrseq = <&sdio_pwrseq>;
-
- vmmc-supply = <&vddao_3v3>;
- vqmmc-supply = <&vddao_3v3>;
-
- status = "okay";
-
- rtl8822cs: wifi@1 {
- reg = <1>;
- };
-};
-
-/* SD card to be enabled in baseboard DT */
-&sd_emmc_b {
- pinctrl-0 = <&sdcard_c_pins>;
- pinctrl-1 = <&sdcard_clk_gate_c_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <4>;
- cap-sd-highspeed;
- max-frequency = <50000000>;
- disable-wp;
-
- cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
- vmmc-supply = <&vddao_3v3>;
- vqmmc-supply = <&vddio_c>;
-};
-
-/* on-module eMMC */
-&sd_emmc_c {
- pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>;
- pinctrl-1 = <&emmc_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <8>;
- cap-mmc-highspeed;
- mmc-ddr-1_8v;
- mmc-hs200-1_8v;
- max-frequency = <200000000>;
- disable-wp;
-
- mmc-pwrseq = <&emmc_pwrseq>;
- vmmc-supply = <&vddao_3v3>;
- vqmmc-supply = <&vddao_1v8>;
-
- status = "okay";
-};
-
-&tdmif_b {
- status = "okay";
-};
-
-&tdmout_b {
- status = "okay";
-};
-
-/* on-module UART BT */
-&uart_A {
- pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
- pinctrl-names = "default";
- uart-has-rtscts;
-
- status = "okay";
-
- bluetooth {
- compatible = "realtek,rtl8822cs-bt";
- enable-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
- host-wake-gpios = <&gpio GPIOX_19 GPIO_ACTIVE_HIGH>;
- device-wake-gpios = <&gpio GPIOX_18 GPIO_ACTIVE_HIGH>;
- };
-};
-
-&uart_AO {
- pinctrl-0 = <&uart_ao_a_pins>;
- pinctrl-names = "default";
-
- status = "okay";
-};
-
-&usb {
- phys = <&usb2_phy0>, <&usb2_phy1>;
- phy-names = "usb2-phy0", "usb2-phy1";
-};
diff --git a/arch/arm/dts/meson-g12b-bananapi.dtsi b/arch/arm/dts/meson-g12b-bananapi.dtsi
deleted file mode 100644
index 83709787..0000000
--- a/arch/arm/dts/meson-g12b-bananapi.dtsi
+++ /dev/null
@@ -1,521 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2019 BayLibre, SAS
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- * Copyright (c) 2023 Christian Hewitt <christianshewitt@gmail.com>
- */
-
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/leds/common.h>
-#include <dt-bindings/gpio/meson-g12a-gpio.h>
-#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
-
-/ {
- aliases {
- serial0 = &uart_AO;
- ethernet0 = ðmac;
- rtc1 = &vrtc;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- memory@0 {
- device_type = "memory";
- reg = <0x0 0x0 0x0 0x80000000>; /* 2 GiB or 4 GiB */
- };
-
- adc-keys {
- compatible = "adc-keys";
- io-channels = <&saradc 2>;
- io-channel-names = "buttons";
- keyup-threshold-microvolt = <1710000>;
-
- button-function {
- label = "RST";
- linux,code = <KEY_POWER>;
- press-threshold-microvolt = <10000>;
- };
- };
-
- emmc_pwrseq: emmc-pwrseq {
- compatible = "mmc-pwrseq-emmc";
- reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
- };
-
- fan0: pwm-fan {
- compatible = "pwm-fan";
- #cooling-cells = <2>;
- cooling-min-state = <0>;
- cooling-max-state = <3>;
- cooling-levels = <0 120 170 220>;
- pwms = <&pwm_cd 1 40000 0>;
- };
-
- hdmi-connector {
- compatible = "hdmi-connector";
- type = "a";
-
- port {
- hdmi_connector_in: endpoint {
- remote-endpoint = <&hdmi_tx_tmds_out>;
- };
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- led-0 {
- color = <LED_COLOR_ID_BLUE>;
- function = LED_FUNCTION_STATUS;
- gpios = <&gpio_ao GPIOAO_7 GPIO_ACTIVE_LOW>;
- linux,default-trigger = "heartbeat";
- };
-
- led-1 {
- color = <LED_COLOR_ID_GREEN>;
- function = LED_FUNCTION_STATUS;
- gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_LOW>;
- };
- };
-
- sdio_pwrseq: sdio-pwrseq {
- compatible = "mmc-pwrseq-simple";
- reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
- clocks = <&wifi32k>;
- clock-names = "ext_clock";
- };
-
- wifi32k: wifi32k {
- compatible = "pwm-clock";
- #clock-cells = <0>;
- clock-frequency = <32768>;
- pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
- };
-
- dc_in: regulator-dc-in {
- compatible = "regulator-fixed";
- regulator-name = "DC_IN";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- regulator-always-on;
- };
-
- vcc_5v: regulator-vcc-5v {
- compatible = "regulator-fixed";
- regulator-name = "VCC_5V";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&dc_in>;
-
- gpio = <&gpio GPIOH_8 GPIO_OPEN_DRAIN>;
- enable-active-high;
- };
-
- vcc_3v3: regulator-vcc-3v3 {
- compatible = "regulator-fixed";
- regulator-name = "VCC_3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vsys_3v3>;
- regulator-always-on;
- };
-
- vcc_1v8: regulator-vcc-1v8 {
- compatible = "regulator-fixed";
- regulator-name = "VCC_1V8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vcc_3v3>;
- regulator-always-on;
- };
-
- vddao_1v8: regulator-vddao-1v8 {
- compatible = "regulator-fixed";
- regulator-name = "VDDIO_AO1V8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vsys_3v3>;
- regulator-always-on;
- };
-
- vddcpu_a: regulator-vddcpu-a {
- compatible = "pwm-regulator";
- regulator-name = "VDDCPU_A";
- regulator-min-microvolt = <690000>;
- regulator-max-microvolt = <1050000>;
- pwm-supply = <&dc_in>;
- pwms = <&pwm_ab 0 1250 0>;
- pwm-dutycycle-range = <100 0>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- vddcpu_b: regulator-vddcpu-b {
- compatible = "pwm-regulator";
- regulator-name = "VDDCPU_B";
- regulator-min-microvolt = <690000>;
- regulator-max-microvolt = <1050000>;
- pwm-supply = <&vsys_3v3>;
- pwms = <&pwm_AO_cd 1 1250 0>;
- pwm-dutycycle-range = <100 0>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- vsys_3v3: regulator-vsys-3v3 {
- compatible = "regulator-fixed";
- regulator-name = "VSYS_3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&dc_in>;
- regulator-always-on;
- };
-
- emmc_1v8: regulator-emmc-1v8 {
- compatible = "regulator-fixed";
- regulator-name = "EMMC_AO1V8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vcc_3v3>;
- regulator-always-on;
- };
-
- usb_pwr: regulator-usb-pwr {
- compatible = "regulator-fixed";
- regulator-name = "USB_PWR";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc_5v>;
-
- gpio = <&gpio GPIOA_6 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
-
- sound {
- compatible = "amlogic,axg-sound-card";
- model = "BPI-M2S";
- audio-aux-devs = <&tdmout_b>;
- audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
- "TDMOUT_B IN 1", "FRDDR_B OUT 1",
- "TDMOUT_B IN 2", "FRDDR_C OUT 1",
- "TDM_B Playback", "TDMOUT_B OUT";
-
- assigned-clocks = <&clkc CLKID_MPLL2>,
- <&clkc CLKID_MPLL0>,
- <&clkc CLKID_MPLL1>;
- assigned-clock-parents = <0>, <0>, <0>;
- assigned-clock-rates = <294912000>,
- <270950400>,
- <393216000>;
-
- dai-link-0 {
- sound-dai = <&frddr_a>;
- };
-
- dai-link-1 {
- sound-dai = <&frddr_b>;
- };
-
- dai-link-2 {
- sound-dai = <&frddr_c>;
- };
-
- /* 8ch hdmi interface */
- dai-link-3 {
- sound-dai = <&tdmif_b>;
- dai-format = "i2s";
- dai-tdm-slot-tx-mask-0 = <1 1>;
- dai-tdm-slot-tx-mask-1 = <1 1>;
- dai-tdm-slot-tx-mask-2 = <1 1>;
- dai-tdm-slot-tx-mask-3 = <1 1>;
- mclk-fs = <256>;
-
- codec {
- sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
- };
- };
-
- /* hdmi glue */
- dai-link-4 {
- sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
-
- codec {
- sound-dai = <&hdmi_tx>;
- };
- };
- };
-};
-
-&arb {
- status = "okay";
-};
-
-&clkc_audio {
- status = "okay";
-};
-
-&cecb_AO {
- pinctrl-0 = <&cec_ao_b_h_pins>;
- pinctrl-names = "default";
- status = "okay";
- hdmi-phandle = <&hdmi_tx>;
-};
-
-&cpu0 {
- cpu-supply = <&vddcpu_b>;
- operating-points-v2 = <&cpu_opp_table_0>;
- clocks = <&clkc CLKID_CPU_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu1 {
- cpu-supply = <&vddcpu_b>;
- operating-points-v2 = <&cpu_opp_table_0>;
- clocks = <&clkc CLKID_CPU_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu100 {
- cpu-supply = <&vddcpu_a>;
- operating-points-v2 = <&cpub_opp_table_1>;
- clocks = <&clkc CLKID_CPUB_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu101 {
- cpu-supply = <&vddcpu_a>;
- operating-points-v2 = <&cpub_opp_table_1>;
- clocks = <&clkc CLKID_CPUB_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu102 {
- cpu-supply = <&vddcpu_a>;
- operating-points-v2 = <&cpub_opp_table_1>;
- clocks = <&clkc CLKID_CPUB_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu103 {
- cpu-supply = <&vddcpu_a>;
- operating-points-v2 = <&cpub_opp_table_1>;
- clocks = <&clkc CLKID_CPUB_CLK>;
- clock-latency = <50000>;
-};
-
-ðmac {
- pinctrl-0 = <ð_pins>, <ð_rgmii_pins>;
- pinctrl-names = "default";
- status = "okay";
- phy-mode = "rgmii";
- phy-handle = <&external_phy>;
- amlogic,tx-delay-ns = <2>;
-};
-
-&ext_mdio {
- external_phy: ethernet-phy@0 {
- /* Realtek RTL8211F (0x001cc916) */
- reg = <0>;
- max-speed = <1000>;
-
- reset-assert-us = <10000>;
- reset-deassert-us = <80000>;
- reset-gpios = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>;
-
- interrupt-parent = <&gpio_intc>;
- /* MAC_INTR on GPIOZ_14 */
- interrupts = <26 IRQ_TYPE_LEVEL_LOW>;
- };
-};
-
-&frddr_a {
- status = "okay";
-};
-
-&frddr_b {
- status = "okay";
-};
-
-&frddr_c {
- status = "okay";
-};
-
-&hdmi_tx {
- status = "okay";
- pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>;
- pinctrl-names = "default";
- hdmi-supply = <&vcc_5v>;
-};
-
-&hdmi_tx_tmds_port {
- hdmi_tx_tmds_out: endpoint {
- remote-endpoint = <&hdmi_connector_in>;
- };
-};
-
-/* Main i2c bus */
-&i2c2 {
- status = "okay";
- pinctrl-0 = <&i2c2_sda_x_pins>, <&i2c2_sck_x_pins>;
- pinctrl-names = "default";
-};
-
-&pcie {
- status = "okay";
- reset-gpios = <&gpio GPIOA_8 GPIO_ACTIVE_LOW>;
-};
-
-&pwm_ab {
- status = "okay";
- pinctrl-0 = <&pwm_a_e_pins>;
- pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin0";
-};
-
-&pwm_cd {
- status = "okay";
- pinctrl-0 = <&pwm_d_x6_pins>;
- pinctrl-names = "default";
- pwm-gpios = <&gpio GPIOAO_10 GPIO_ACTIVE_HIGH>;
-};
-
-&pwm_ef {
- status = "okay";
- pinctrl-0 = <&pwm_e_pins>;
- pinctrl-names = "default";
-};
-
-&pwm_AO_cd {
- pinctrl-0 = <&pwm_ao_d_e_pins>;
- pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin1";
- status = "okay";
-};
-
-&saradc {
- status = "okay";
- vref-supply = <&vddao_1v8>;
-};
-
-/* SDIO */
-&sd_emmc_a {
- /* enable if WiFi/BT board connected */
- status = "disabled";
- pinctrl-0 = <&sdio_pins>;
- pinctrl-1 = <&sdio_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
- #address-cells = <1>;
- #size-cells = <0>;
-
- bus-width = <4>;
- sd-uhs-sdr104;
- max-frequency = <50000000>;
-
- non-removable;
- disable-wp;
-
- /* WiFi firmware requires power in suspend */
- keep-power-in-suspend;
-
- mmc-pwrseq = <&sdio_pwrseq>;
-
- vmmc-supply = <&vsys_3v3>;
- vqmmc-supply = <&vddao_1v8>;
-
- rtl8822cs: wifi@1 {
- reg = <1>;
- };
-};
-
-/* SD card */
-&sd_emmc_b {
- status = "okay";
- pinctrl-0 = <&sdcard_c_pins>;
- pinctrl-1 = <&sdcard_clk_gate_c_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <4>;
- cap-sd-highspeed;
- max-frequency = <50000000>;
- disable-wp;
-
- cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
- vmmc-supply = <&vsys_3v3>;
- vqmmc-supply = <&vsys_3v3>;
-};
-
-/* eMMC */
-&sd_emmc_c {
- status = "okay";
- pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>;
- pinctrl-1 = <&emmc_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <8>;
- cap-mmc-highspeed;
- mmc-ddr-1_8v;
- mmc-hs200-1_8v;
- max-frequency = <200000000>;
- disable-wp;
-
- mmc-pwrseq = <&emmc_pwrseq>;
- vmmc-supply = <&vcc_3v3>;
- vqmmc-supply = <&emmc_1v8>;
-};
-
-&tdmif_b {
- status = "okay";
-};
-
-&tdmout_b {
- status = "okay";
-};
-
-&tohdmitx {
- status = "okay";
-};
-
-&uart_A {
- /* enable if WiFi/BT board connected */
- status = "disabled";
- pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
- pinctrl-names = "default";
- uart-has-rtscts;
-
- bluetooth {
- compatible = "realtek,rtl8822cs-bt";
- enable-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
- host-wake-gpios = <&gpio GPIOX_19 GPIO_ACTIVE_HIGH>;
- device-wake-gpios = <&gpio GPIOX_18 GPIO_ACTIVE_HIGH>;
- };
-};
-
-&uart_AO {
- status = "okay";
- pinctrl-0 = <&uart_ao_a_pins>;
- pinctrl-names = "default";
-};
-
-&usb2_phy0 {
- phy-supply = <&dc_in>;
-};
-
-&usb2_phy1 {
- phy-supply = <&usb_pwr>;
-};
-
-&usb3_pcie_phy {
- phy-supply = <&usb_pwr>;
-};
-
-&usb {
- status = "okay";
- dr_mode = "peripheral";
- phys = <&usb2_phy0>, <&usb2_phy1>;
- phy-names = "usb2-phy0", "usb2-phy1";
-};
diff --git a/arch/arm/dts/meson-g12b-gsking-x.dts b/arch/arm/dts/meson-g12b-gsking-x.dts
deleted file mode 100644
index 6c7bfac..0000000
--- a/arch/arm/dts/meson-g12b-gsking-x.dts
+++ /dev/null
@@ -1,133 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2019 BayLibre, SAS
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- * Copyright (c) 2019 Christian Hewitt <christianshewitt@gmail.com>
- */
-
-/dts-v1/;
-
-#include "meson-g12b-w400.dtsi"
-#include <dt-bindings/leds/common.h>
-#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
-
-/ {
- compatible = "azw,gsking-x", "amlogic,s922x", "amlogic,g12b";
- model = "Beelink GS-King X";
-
- aliases {
- rtc0 = &rtc;
- rtc1 = &vrtc;
- };
-
- gpio-keys-polled {
- compatible = "gpio-keys-polled";
- #address-cells = <1>;
- #size-cells = <0>;
- poll-interval = <100>;
-
- power-button {
- label = "power";
- linux,code = <KEY_POWER>;
- gpios = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_HIGH>;
- };
- };
-
- sound {
- compatible = "amlogic,axg-sound-card";
- model = "GSKING-X";
- audio-aux-devs = <&tdmout_a>;
- audio-routing = "TDMOUT_A IN 0", "FRDDR_A OUT 1",
- "TDMOUT_A IN 1", "FRDDR_B OUT 1",
- "TDMOUT_A IN 2", "FRDDR_C OUT 1",
- "TDM_A Playback", "TDMOUT_A OUT";
-
- assigned-clocks = <&clkc CLKID_MPLL2>,
- <&clkc CLKID_MPLL0>,
- <&clkc CLKID_MPLL1>;
- assigned-clock-parents = <0>, <0>, <0>;
- assigned-clock-rates = <294912000>,
- <270950400>,
- <393216000>;
- status = "okay";
-
- dai-link-0 {
- sound-dai = <&frddr_a>;
- };
-
- dai-link-1 {
- sound-dai = <&frddr_b>;
- };
-
- dai-link-2 {
- sound-dai = <&frddr_c>;
- };
-
- /* 8ch hdmi interface */
- dai-link-3 {
- sound-dai = <&tdmif_a>;
- dai-format = "i2s";
- dai-tdm-slot-tx-mask-0 = <1 1>;
- dai-tdm-slot-tx-mask-1 = <1 1>;
- dai-tdm-slot-tx-mask-2 = <1 1>;
- dai-tdm-slot-tx-mask-3 = <1 1>;
- mclk-fs = <256>;
-
- codec {
- sound-dai = <&tohdmitx TOHDMITX_I2S_IN_A>;
- };
- };
-
- dai-link-4 {
- sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
-
- codec {
- sound-dai = <&hdmi_tx>;
- };
- };
- };
-};
-
-&arb {
- status = "okay";
-};
-
-&clkc_audio {
- status = "okay";
-};
-
-&frddr_a {
- status = "okay";
-};
-
-&frddr_b {
- status = "okay";
-};
-
-&frddr_c {
- status = "okay";
-};
-
-&i2c3 {
- status = "okay";
- pinctrl-0 = <&i2c3_sda_a_pins>, <&i2c3_sck_a_pins>;
- pinctrl-names = "default";
-
- rtc: rtc@51 {
- compatible = "nxp,pcf8563";
- reg = <0x51>;
- wakeup-source;
- };
-};
-
-&tdmif_a {
- status = "okay";
-};
-
-&tdmout_a {
- status = "okay";
-};
-
-&tohdmitx {
- status = "okay";
-};
diff --git a/arch/arm/dts/meson-g12b-gtking-pro.dts b/arch/arm/dts/meson-g12b-gtking-pro.dts
deleted file mode 100644
index 707daf9..0000000
--- a/arch/arm/dts/meson-g12b-gtking-pro.dts
+++ /dev/null
@@ -1,142 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2019 BayLibre, SAS
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- * Copyright (c) 2019 Christian Hewitt <christianshewitt@gmail.com>
- */
-
-/dts-v1/;
-
-#include "meson-g12b-w400.dtsi"
-#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
-
-/ {
- compatible = "azw,gtking", "amlogic,s922x", "amlogic,g12b";
- model = "Beelink GT-King Pro";
-
- aliases {
- rtc0 = &rtc;
- rtc1 = &vrtc;
- };
-
- gpio-keys-polled {
- compatible = "gpio-keys-polled";
- #address-cells = <1>;
- #size-cells = <0>;
- poll-interval = <100>;
-
- power-button {
- label = "power";
- linux,code = <KEY_POWER>;
- gpios = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_HIGH>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- led-white {
- label = "power:white";
- gpios = <&gpio_ao GPIOAO_11 GPIO_ACTIVE_HIGH>;
- default-state = "on";
- };
- };
-
- sound {
- compatible = "amlogic,axg-sound-card";
- model = "GTKING-PRO";
- audio-aux-devs = <&tdmout_b>;
- audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
- "TDMOUT_B IN 1", "FRDDR_B OUT 1",
- "TDMOUT_B IN 2", "FRDDR_C OUT 1",
- "TDM_B Playback", "TDMOUT_B OUT";
-
- assigned-clocks = <&clkc CLKID_MPLL2>,
- <&clkc CLKID_MPLL0>,
- <&clkc CLKID_MPLL1>;
- assigned-clock-parents = <0>, <0>, <0>;
- assigned-clock-rates = <294912000>,
- <270950400>,
- <393216000>;
- status = "okay";
-
- dai-link-0 {
- sound-dai = <&frddr_a>;
- };
-
- dai-link-1 {
- sound-dai = <&frddr_b>;
- };
-
- dai-link-2 {
- sound-dai = <&frddr_c>;
- };
-
- /* 8ch hdmi interface */
- dai-link-3 {
- sound-dai = <&tdmif_b>;
- dai-format = "i2s";
- dai-tdm-slot-tx-mask-0 = <1 1>;
- dai-tdm-slot-tx-mask-1 = <1 1>;
- dai-tdm-slot-tx-mask-2 = <1 1>;
- dai-tdm-slot-tx-mask-3 = <1 1>;
- mclk-fs = <256>;
-
- codec {
- sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
- };
- };
-
- dai-link-4 {
- sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
-
- codec {
- sound-dai = <&hdmi_tx>;
- };
- };
- };
-};
-
-&arb {
- status = "okay";
-};
-
-&clkc_audio {
- status = "okay";
-};
-
-&frddr_a {
- status = "okay";
-};
-
-&frddr_b {
- status = "okay";
-};
-
-&frddr_c {
- status = "okay";
-};
-
-&i2c3 {
- status = "okay";
- pinctrl-0 = <&i2c3_sda_a_pins>, <&i2c3_sck_a_pins>;
- pinctrl-names = "default";
-
- rtc: rtc@51 {
- compatible = "nxp,pcf8563";
- reg = <0x51>;
- wakeup-source;
- };
-};
-
-&tdmif_b {
- status = "okay";
-};
-
-&tdmout_b {
- status = "okay";
-};
-
-&tohdmitx {
- status = "okay";
-};
diff --git a/arch/arm/dts/meson-g12b-gtking.dts b/arch/arm/dts/meson-g12b-gtking.dts
deleted file mode 100644
index 5d96c14..0000000
--- a/arch/arm/dts/meson-g12b-gtking.dts
+++ /dev/null
@@ -1,163 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2019 BayLibre, SAS
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- * Copyright (c) 2019 Christian Hewitt <christianshewitt@gmail.com>
- */
-
-/dts-v1/;
-
-#include "meson-g12b-w400.dtsi"
-#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
-
-/ {
- compatible = "azw,gtking", "amlogic,s922x", "amlogic,g12b";
- model = "Beelink GT-King";
-
- aliases {
- rtc0 = &rtc;
- rtc1 = &vrtc;
- };
-
- spdif_dit: audio-codec-1 {
- #sound-dai-cells = <0>;
- compatible = "linux,spdif-dit";
- status = "okay";
- sound-name-prefix = "DIT";
- };
-
- sound {
- compatible = "amlogic,axg-sound-card";
- model = "GTKING";
- audio-aux-devs = <&tdmout_b>;
- audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
- "TDMOUT_B IN 1", "FRDDR_B OUT 1",
- "TDMOUT_B IN 2", "FRDDR_C OUT 1",
- "TDM_B Playback", "TDMOUT_B OUT",
- "SPDIFOUT IN 0", "FRDDR_A OUT 3",
- "SPDIFOUT IN 1", "FRDDR_B OUT 3",
- "SPDIFOUT IN 2", "FRDDR_C OUT 3";
-
- assigned-clocks = <&clkc CLKID_MPLL2>,
- <&clkc CLKID_MPLL0>,
- <&clkc CLKID_MPLL1>;
- assigned-clock-parents = <0>, <0>, <0>;
- assigned-clock-rates = <294912000>,
- <270950400>,
- <393216000>;
- status = "okay";
-
- dai-link-0 {
- sound-dai = <&frddr_a>;
- };
-
- dai-link-1 {
- sound-dai = <&frddr_b>;
- };
-
- dai-link-2 {
- sound-dai = <&frddr_c>;
- };
-
- /* 8ch hdmi interface */
- dai-link-3 {
- sound-dai = <&tdmif_b>;
- dai-format = "i2s";
- dai-tdm-slot-tx-mask-0 = <1 1>;
- dai-tdm-slot-tx-mask-1 = <1 1>;
- dai-tdm-slot-tx-mask-2 = <1 1>;
- dai-tdm-slot-tx-mask-3 = <1 1>;
- mclk-fs = <256>;
-
- codec {
- sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
- };
- };
-
- /* spdif hdmi or toslink interface */
- dai-link-4 {
- sound-dai = <&spdifout>;
-
- codec-0 {
- sound-dai = <&spdif_dit>;
- };
-
- codec-1 {
- sound-dai = <&tohdmitx TOHDMITX_SPDIF_IN_A>;
- };
- };
-
- /* spdif hdmi interface */
- dai-link-5 {
- sound-dai = <&spdifout_b>;
-
- codec {
- sound-dai = <&tohdmitx TOHDMITX_SPDIF_IN_B>;
- };
- };
-
- /* hdmi glue */
- dai-link-6 {
- sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
-
- codec {
- sound-dai = <&hdmi_tx>;
- };
- };
- };
-};
-
-&arb {
- status = "okay";
-};
-
-&clkc_audio {
- status = "okay";
-};
-
-&frddr_a {
- status = "okay";
-};
-
-&frddr_b {
- status = "okay";
-};
-
-&frddr_c {
- status = "okay";
-};
-
-
-&i2c3 {
- status = "okay";
- pinctrl-0 = <&i2c3_sda_a_pins>, <&i2c3_sck_a_pins>;
- pinctrl-names = "default";
-
- rtc: rtc@51 {
- compatible = "nxp,pcf8563";
- reg = <0x51>;
- wakeup-source;
- };
-};
-
-&spdifout {
- pinctrl-0 = <&spdif_out_h_pins>;
- pinctrl-names = "default";
- status = "okay";
-};
-
-&spdifout_b {
- status = "okay";
-};
-
-&tdmif_b {
- status = "okay";
-};
-
-&tdmout_b {
- status = "okay";
-};
-
-&tohdmitx {
- status = "okay";
-};
diff --git a/arch/arm/dts/meson-g12b-khadas-vim3.dtsi b/arch/arm/dts/meson-g12b-khadas-vim3.dtsi
deleted file mode 100644
index f42cf4b..0000000
--- a/arch/arm/dts/meson-g12b-khadas-vim3.dtsi
+++ /dev/null
@@ -1,107 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2019 BayLibre, SAS
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- * Copyright (c) 2019 Christian Hewitt <christianshewitt@gmail.com>
- */
-
-/ {
- model = "Khadas VIM3";
-
- vddcpu_a: regulator-vddcpu-a {
- /*
- * MP8756GD Regulator.
- */
- compatible = "pwm-regulator";
-
- regulator-name = "VDDCPU_A";
- regulator-min-microvolt = <690000>;
- regulator-max-microvolt = <1050000>;
-
- vin-supply = <&dc_in>;
-
- pwms = <&pwm_ab 0 1250 0>;
- pwm-dutycycle-range = <100 0>;
-
- regulator-boot-on;
- regulator-always-on;
- };
-
- vddcpu_b: regulator-vddcpu-b {
- /*
- * Silergy SY8030DEC Regulator.
- */
- compatible = "pwm-regulator";
-
- regulator-name = "VDDCPU_B";
- regulator-min-microvolt = <690000>;
- regulator-max-microvolt = <1050000>;
-
- vin-supply = <&vsys_3v3>;
-
- pwms = <&pwm_AO_cd 1 1250 0>;
- pwm-dutycycle-range = <100 0>;
-
- regulator-boot-on;
- regulator-always-on;
- };
-};
-
-&cpu0 {
- cpu-supply = <&vddcpu_b>;
- operating-points-v2 = <&cpu_opp_table_0>;
- clocks = <&clkc CLKID_CPU_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu1 {
- cpu-supply = <&vddcpu_b>;
- operating-points-v2 = <&cpu_opp_table_0>;
- clocks = <&clkc CLKID_CPU_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu100 {
- cpu-supply = <&vddcpu_a>;
- operating-points-v2 = <&cpub_opp_table_1>;
- clocks = <&clkc CLKID_CPUB_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu101 {
- cpu-supply = <&vddcpu_a>;
- operating-points-v2 = <&cpub_opp_table_1>;
- clocks = <&clkc CLKID_CPUB_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu102 {
- cpu-supply = <&vddcpu_a>;
- operating-points-v2 = <&cpub_opp_table_1>;
- clocks = <&clkc CLKID_CPUB_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu103 {
- cpu-supply = <&vddcpu_a>;
- operating-points-v2 = <&cpub_opp_table_1>;
- clocks = <&clkc CLKID_CPUB_CLK>;
- clock-latency = <50000>;
-};
-
-&pwm_ab {
- pinctrl-0 = <&pwm_a_e_pins>;
- pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin0";
- status = "okay";
-};
-
-&pwm_AO_cd {
- pinctrl-0 = <&pwm_ao_d_e_pins>;
- pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin1";
- status = "okay";
-};
-
diff --git a/arch/arm/dts/meson-g12b-odroid-go-ultra.dts b/arch/arm/dts/meson-g12b-odroid-go-ultra.dts
deleted file mode 100644
index 1e40709..0000000
--- a/arch/arm/dts/meson-g12b-odroid-go-ultra.dts
+++ /dev/null
@@ -1,722 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2022 Neil Armstrong <neil.armstrong@linaro.org>
- */
-
-/dts-v1/;
-
-#include "meson-g12b-s922x.dtsi"
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/leds/common.h>
-#include <dt-bindings/gpio/meson-g12a-gpio.h>
-#include <dt-bindings/sound/meson-g12a-toacodec.h>
-#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
-
-/ {
- compatible = "hardkernel,odroid-go-ultra", "amlogic,s922x", "amlogic,g12b";
- model = "Hardkernel ODROID-GO-Ultra";
-
- aliases {
- serial0 = &uart_AO;
- rtc0 = &vrtc;
- };
-
- adc-joystick-left {
- compatible = "adc-joystick";
- io-channels = <&saradc 2>, <&saradc 3>;
- poll-interval = <10>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- axis@0 {
- reg = <0>;
- linux,code = <ABS_Y>;
- abs-range = <3150 950>;
- abs-fuzz = <32>;
- abs-flat = <64>;
- };
- axis@1 {
- reg = <1>;
- linux,code = <ABS_X>;
- abs-range = <700 2900>;
- abs-fuzz = <32>;
- abs-flat = <64>;
- };
- };
-
- adc-joystick-right {
- compatible = "adc-joystick";
- io-channels = <&saradc 0>, <&saradc 1>;
- poll-interval = <10>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- axis@0 {
- reg = <0>;
- linux,code = <ABS_RY>;
- abs-range = <3150 950>;
- abs-fuzz = <32>;
- abs-flat = <64>;
- };
- axis@1 {
- reg = <1>;
- linux,code = <ABS_RX>;
- abs-range = <800 3000>;
- abs-fuzz = <32>;
- abs-flat = <64>;
- };
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- codec_clk: codec-clk {
- compatible = "fixed-clock";
- clock-frequency = <12288000>;
- clock-output-names = "codec_clk";
- #clock-cells = <0>;
- };
-
- gpio-keys {
- compatible = "gpio-keys-polled";
- poll-interval = <10>;
- pinctrl-0 = <&keypad_gpio_pins>;
- pinctrl-names = "default";
-
- volume-up-button {
- label = "VOLUME-UP";
- linux,code = <KEY_VOLUMEUP>;
- gpios = <&gpio GPIOX_8 GPIO_ACTIVE_LOW>;
- };
- volume-down-button {
- label = "VOLUME-DOWN";
- linux,code = <KEY_VOLUMEDOWN>;
- gpios = <&gpio GPIOX_9 GPIO_ACTIVE_LOW>;
- };
- dpad-up-button {
- label = "DPAD-UP";
- linux,code = <BTN_DPAD_UP>;
- gpios = <&gpio GPIOX_0 GPIO_ACTIVE_LOW>;
- };
- dpad-down-button {
- label = "DPAD-DOWN";
- linux,code = <BTN_DPAD_DOWN>;
- gpios = <&gpio GPIOX_1 GPIO_ACTIVE_LOW>;
- };
- dpad-left-button {
- label = "DPAD-LEFT";
- linux,code = <BTN_DPAD_LEFT>;
- gpios = <&gpio GPIOX_2 GPIO_ACTIVE_LOW>;
- };
- dpad-right-button {
- label = "DPAD-RIGHT";
- linux,code = <BTN_DPAD_RIGHT>;
- gpios = <&gpio GPIOX_3 GPIO_ACTIVE_LOW>;
- };
- a-button {
- label = "A";
- linux,code = <BTN_EAST>;
- gpios = <&gpio GPIOX_4 GPIO_ACTIVE_LOW>;
- };
- b-button {
- label = "B";
- linux,code = <BTN_SOUTH>;
- gpios = <&gpio GPIOX_5 GPIO_ACTIVE_LOW>;
- };
- y-button {
- label = "Y";
- linux,code = <BTN_WEST>;
- gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
- };
- x-button {
- label = "X";
- linux,code = <BTN_NORTH>;
- gpios = <&gpio GPIOX_7 GPIO_ACTIVE_LOW>;
- };
- f1-button {
- label = "F1";
- linux,code = <BTN_TRIGGER_HAPPY1>;
- gpios = <&gpio GPIOX_17 GPIO_ACTIVE_LOW>;
- };
- f2-button {
- label = "F2";
- linux,code = <BTN_TRIGGER_HAPPY2>;
- gpios = <&gpio GPIOX_10 GPIO_ACTIVE_LOW>;
- };
- f3-button {
- label = "F3";
- linux,code = <BTN_TRIGGER_HAPPY3>;
- gpios = <&gpio GPIOX_11 GPIO_ACTIVE_LOW>;
- };
- f4-button {
- label = "F4";
- linux,code = <BTN_TRIGGER_HAPPY4>;
- gpios = <&gpio GPIOX_12 GPIO_ACTIVE_LOW>;
- };
- f5-button {
- label = "F5";
- linux,code = <BTN_TRIGGER_HAPPY5>;
- gpios = <&gpio GPIOX_13 GPIO_ACTIVE_LOW>;
- };
- f6-button {
- label = "F6";
- linux,code = <BTN_TRIGGER_HAPPY6>;
- gpios = <&gpio GPIOX_16 GPIO_ACTIVE_LOW>;
- };
- top-left-button {
- label = "TOP Left";
- linux,code = <BTN_TL>;
- gpios = <&gpio GPIOX_14 GPIO_ACTIVE_LOW>;
- };
- top-left2-button {
- label = "TOP Left 2";
- linux,code = <BTN_TL2>;
- gpios = <&gpio GPIOX_19 GPIO_ACTIVE_LOW>;
- };
- top-right-button {
- label = "TOP Right";
- linux,code = <BTN_TR>;
- gpios = <&gpio GPIOX_15 GPIO_ACTIVE_LOW>;
- };
- top-right2-button {
- label = "TOP Right 2";
- linux,code = <BTN_TR2>;
- gpios = <&gpio GPIOX_18 GPIO_ACTIVE_LOW>;
- };
- };
-
- memory@0 {
- device_type = "memory";
- reg = <0x0 0x0 0x0 0x40000000>;
- };
-
- emmc_pwrseq: emmc-pwrseq {
- compatible = "mmc-pwrseq-emmc";
- reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
- };
-
- leds {
- compatible = "gpio-leds";
-
- led-blue {
- color = <LED_COLOR_ID_BLUE>;
- gpios = <&gpio_ao GPIOAO_11 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "heartbeat";
- };
- };
-
- vdd_sys: regulator-vdd-sys {
- compatible = "regulator-fixed";
- regulator-name = "VDD_SYS";
- regulator-min-microvolt = <3800000>;
- regulator-max-microvolt = <3800000>;
- regulator-always-on;
- };
-
- sound {
- compatible = "amlogic,axg-sound-card";
- model = "Odroid GO Ultra";
- audio-widgets = "Microphone", "Mic Jack",
- "Headphone", "Headphones",
- "Speaker", "Internal Speakers";
- audio-aux-devs = <&tdmout_b>, <&tdmin_b>, <&speaker_amp>;
- audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
- "TDM_B Playback", "TDMOUT_B OUT",
- "TDMIN_B IN 1", "TDM_B Capture",
- "TDMIN_B IN 4", "TDM_B Loopback",
- "TODDR_A IN 1", "TDMIN_B OUT",
- "MICL", "Mic Jack",
- "Headphones", "HPOL",
- "Headphones", "HPOR",
- "Speaker Amplifier INL", "HPOL",
- "Speaker Amplifier INR", "HPOR",
- "Internal Speakers", "Speaker Amplifier OUTL",
- "Internal Speakers", "Speaker Amplifier OUTR";
-
- assigned-clocks = <&clkc CLKID_MPLL2>,
- <&clkc CLKID_MPLL0>,
- <&clkc CLKID_MPLL1>;
- assigned-clock-parents = <0>, <0>, <0>;
- assigned-clock-rates = <294912000>,
- <270950400>,
- <393216000>;
-
- dai-link-0 {
- sound-dai = <&frddr_a>;
- };
-
- dai-link-1 {
- sound-dai = <&toddr_a>;
- };
-
- dai-link-2 {
- sound-dai = <&tdmif_b>;
- dai-format = "i2s";
- dai-tdm-slot-tx-mask-0 = <1 1>;
- mclk-fs = <256>;
-
- codec-0 {
- sound-dai = <&rk817>;
- };
- };
- };
-
- speaker_amp: speaker-amplifier {
- compatible = "simple-audio-amplifier";
- sound-name-prefix = "Speaker Amplifier";
- VCC-supply = <&hp_5v>;
- };
-};
-
-&arb {
- status = "okay";
-};
-
-&cpu0 {
- cpu-supply = <&vddcpu_b>;
- operating-points-v2 = <&cpu_opp_table_0>;
- clocks = <&clkc CLKID_CPU_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu1 {
- cpu-supply = <&vddcpu_b>;
- operating-points-v2 = <&cpu_opp_table_0>;
- clocks = <&clkc CLKID_CPU_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu100 {
- cpu-supply = <&vddcpu_a>;
- operating-points-v2 = <&cpub_opp_table_1>;
- clocks = <&clkc CLKID_CPUB_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu101 {
- cpu-supply = <&vddcpu_a>;
- operating-points-v2 = <&cpub_opp_table_1>;
- clocks = <&clkc CLKID_CPUB_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu102 {
- cpu-supply = <&vddcpu_a>;
- operating-points-v2 = <&cpub_opp_table_1>;
- clocks = <&clkc CLKID_CPUB_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu103 {
- cpu-supply = <&vddcpu_a>;
- operating-points-v2 = <&cpub_opp_table_1>;
- clocks = <&clkc CLKID_CPUB_CLK>;
- clock-latency = <50000>;
-};
-
-/* RK817 only supports 12.5mV steps, round up the values */
-&cpu_opp_table_0 {
- opp-1000000000 {
- opp-microvolt = <737500>;
- };
- opp-1200000000 {
- opp-microvolt = <737500>;
- };
- opp-1398000000 {
- opp-microvolt = <762500>;
- };
- opp-1512000000 {
- opp-microvolt = <800000>;
- };
- opp-1608000000 {
- opp-microvolt = <837500>;
- };
- opp-1704000000 {
- opp-microvolt = <862500>;
- };
- opp-1896000000 {
- opp-microvolt = <987500>;
- };
- opp-1992000000 {
- opp-microvolt = <1012500>;
- };
-};
-
-/* RK818 only supports 12.5mV steps, round up the values */
-&cpub_opp_table_1 {
- opp-1000000000 {
- opp-microvolt = <775000>;
- };
- opp-1200000000 {
- opp-microvolt = <775000>;
- };
- opp-1398000000 {
- opp-microvolt = <800000>;
- };
- opp-1512000000 {
- opp-microvolt = <825000>;
- };
- opp-1608000000 {
- opp-microvolt = <862500>;
- };
- opp-1704000000 {
- opp-microvolt = <900000>;
- };
- opp-1800000000 {
- opp-microvolt = <987500>;
- };
- opp-1908000000 {
- opp-microvolt = <1025000>;
- };
-};
-
-&i2c_AO {
- status = "okay";
- pinctrl-0 = <&i2c_ao_sck_pins>, <&i2c_ao_sda_pins>;
- pinctrl-names = "default";
-
- rk818: pmic@1c {
- compatible = "rockchip,rk818";
- reg = <0x1c>;
- interrupt-parent = <&gpio_intc>;
- interrupts = <7 IRQ_TYPE_LEVEL_LOW>; /* GPIOAO_7 */
-
- vcc1-supply = <&vdd_sys>;
- vcc2-supply = <&vdd_sys>;
- vcc3-supply = <&vdd_sys>;
- vcc4-supply = <&vdd_sys>;
- vcc6-supply = <&vdd_sys>;
- vcc7-supply = <&vcc_2v3>;
- vcc8-supply = <&vcc_2v3>;
- vcc9-supply = <&vddao_3v3>;
- boost-supply = <&vdd_sys>;
- switch-supply = <&vdd_sys>;
-
- regulators {
- vddcpu_a: DCDC_REG1 {
- regulator-name = "vddcpu_a";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <775000>;
- regulator-max-microvolt = <1025000>;
- regulator-ramp-delay = <6001>;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <775000>;
- };
- };
-
- vdd_ee: DCDC_REG2 {
- regulator-name = "vdd_ee";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <875000>;
- regulator-max-microvolt = <1250000>;
- regulator-ramp-delay = <6001>;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <875000>;
- };
- };
-
- vddq_1v1: DCDC_REG3 {
- regulator-name = "vddq_1v1";
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-on-in-suspend;
- };
- };
-
- vddao_3v3: DCDC_REG4 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-name = "vddao_3v3";
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <3300000>;
- };
- };
-
- hp_5v: DCDC_BOOST {
- regulator-always-on;
- regulator-boot-on;
- regulator-name = "hp_5v";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vddio_ao1v8: LDO_REG5 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-name = "vddio_ao1v8";
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- vddq_1v8: LDO_REG7 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-name = "vddq_1v8";
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- vddio_c: LDO_REG9 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
- regulator-name = "vddio_c";
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <3300000>;
- };
- };
-
- vcc_sd: SWITCH_REG {
- regulator-name = "vcc_sd";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-state-mem {
- regulator-on-in-suspend;
- };
- };
-
- OTG_SWITCH {
- regulator-name = "otg_switch";
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
- };
- };
-};
-
-&i2c3 {
- status = "okay";
- pinctrl-0 = <&i2c3_sda_a_pins>, <&i2c3_sck_a_pins>;
- pinctrl-names = "default";
-
- rk817: pmic@20 {
- compatible = "rockchip,rk817";
- reg = <0x20>;
- interrupt-parent = <&gpio_intc>;
-
- interrupts = <5 IRQ_TYPE_LEVEL_LOW>; /* GPIOAO_5 */
-
- vcc1-supply = <&vdd_sys>;
- vcc2-supply = <&vdd_sys>;
- vcc3-supply = <&vdd_sys>;
- vcc4-supply = <&vdd_sys>;
- vcc5-supply = <&vdd_sys>;
- vcc6-supply = <&vdd_sys>;
- vcc7-supply = <&vdd_sys>;
- vcc8-supply = <&vdd_sys>;
- vcc9-supply = <&rk817_boost>;
-
- #sound-dai-cells = <0>;
- clocks = <&codec_clk>;
- clock-names = "mclk";
-
- #clock-cells = <1>;
-
- regulators {
- vddcpu_b: DCDC_REG2 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <737500>;
- regulator-max-microvolt = <1012500>;
- regulator-ramp-delay = <6001>;
- regulator-initial-mode = <0x2>;
- regulator-name = "vddcpu_b";
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1000000>;
- };
- };
-
- vcc_2v3: DCDC_REG3 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <2300000>;
- regulator-max-microvolt = <2400000>;
- regulator-initial-mode = <0x2>;
- regulator-name = "vcc_2v3";
- regulator-state-mem {
- regulator-on-in-suspend;
- };
- };
-
- LDO_REG4 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-name = "vdd_codec";
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_lcd: LDO_REG8 {
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-name = "vcc_lcd";
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- rk817_boost: BOOST {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5400000>;
- regulator-name = "rk817_boost";
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- usb_host: OTG_SWITCH {
- regulator-name = "usb_host";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
- };
- };
-};
-
-&clkc_audio {
- status = "okay";
-};
-
-ð_phy {
- status = "disabled";
-};
-
-&frddr_a {
- status = "okay";
-};
-
-&periphs_pinctrl {
- keypad_gpio_pins: keypad-gpio {
- mux {
- groups = "GPIOX_0", "GPIOX_1", "GPIOX_2", "GPIOX_3",
- "GPIOX_4", "GPIOX_5", "GPIOX_6", "GPIOX_7",
- "GPIOX_8", "GPIOX_9", "GPIOX_10", "GPIOX_11",
- "GPIOX_12", "GPIOX_13", "GPIOX_14", "GPIOX_15",
- "GPIOX_16", "GPIOX_17", "GPIOX_18", "GPIOX_19";
- function = "gpio_periphs";
- bias-pull-up;
- output-disable;
- };
- };
-};
-
-&saradc {
- status = "okay";
- vref-supply = <&vddio_ao1v8>;
-};
-
-/* SD card */
-&sd_emmc_b {
- status = "okay";
- pinctrl-0 = <&sdcard_c_pins>;
- pinctrl-1 = <&sdcard_clk_gate_c_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <4>;
- cap-sd-highspeed;
- max-frequency = <50000000>;
- disable-wp;
-
- cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
- vmmc-supply = <&vcc_sd>;
- vqmmc-supply = <&vddio_c>;
-
-};
-
-/* eMMC */
-&sd_emmc_c {
- status = "okay";
- pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>;
- pinctrl-1 = <&emmc_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <8>;
- cap-mmc-highspeed;
- mmc-ddr-1_8v;
- mmc-hs200-1_8v;
- max-frequency = <200000000>;
- disable-wp;
-
- mmc-pwrseq = <&emmc_pwrseq>;
- vmmc-supply = <&vcc_sd>;
- vqmmc-supply = <&vddio_ao1v8>;
-};
-
-
-&tdmif_b {
- pinctrl-0 = <&tdm_b_dout0_pins>, <&tdm_b_fs_pins>, <&tdm_b_sclk_pins>, <&tdm_b_din1_pins>;
- pinctrl-names = "default";
- status = "okay";
-
- assigned-clocks = <&clkc_audio AUD_CLKID_TDM_SCLK_PAD1>,
- <&clkc_audio AUD_CLKID_TDM_LRCLK_PAD1>;
- assigned-clock-parents = <&clkc_audio AUD_CLKID_MST_B_SCLK>,
- <&clkc_audio AUD_CLKID_MST_B_LRCLK>;
- assigned-clock-rates = <0>, <0>;
-};
-
-&tdmin_b {
- status = "okay";
-};
-
-&tdmout_b {
- status = "okay";
-};
-
-&toddr_a {
- status = "okay";
-};
-
-&uart_AO {
- status = "okay";
- pinctrl-0 = <&uart_ao_a_pins>;
- pinctrl-names = "default";
-};
-
-&usb {
- status = "okay";
- dr_mode = "peripheral";
-};
-
-&usb2_phy0 {
- status = "okay";
-};
-
-&usb2_phy1 {
- status = "okay";
- phy-supply = <&usb_host>;
-};
diff --git a/arch/arm/dts/meson-g12b-odroid-n2-plus.dts b/arch/arm/dts/meson-g12b-odroid-n2-plus.dts
deleted file mode 100644
index ce1198a..0000000
--- a/arch/arm/dts/meson-g12b-odroid-n2-plus.dts
+++ /dev/null
@@ -1,31 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2019 BayLibre, SAS
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- */
-
-/dts-v1/;
-
-/* The Amlogic S922X Rev. C supports the same OPPs as the A311D variant */
-#include "meson-g12b-a311d.dtsi"
-#include "meson-g12b-odroid-n2.dtsi"
-
-/ {
- compatible = "hardkernel,odroid-n2-plus", "amlogic,s922x", "amlogic,g12b";
- model = "Hardkernel ODROID-N2Plus";
-};
-
-&vddcpu_a {
- regulator-min-microvolt = <680000>;
- regulator-max-microvolt = <1040000>;
-
- pwms = <&pwm_ab 0 1500 0>;
-};
-
-&vddcpu_b {
- regulator-min-microvolt = <680000>;
- regulator-max-microvolt = <1040000>;
-
- pwms = <&pwm_AO_cd 1 1500 0>;
-};
-
diff --git a/arch/arm/dts/meson-g12b-odroid-n2.dts b/arch/arm/dts/meson-g12b-odroid-n2.dts
deleted file mode 100644
index a198a91..0000000
--- a/arch/arm/dts/meson-g12b-odroid-n2.dts
+++ /dev/null
@@ -1,15 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2019 BayLibre, SAS
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- */
-
-/dts-v1/;
-
-#include "meson-g12b-s922x.dtsi"
-#include "meson-g12b-odroid-n2.dtsi"
-
-/ {
- compatible = "hardkernel,odroid-n2", "amlogic,s922x", "amlogic,g12b";
- model = "Hardkernel ODROID-N2";
-};
diff --git a/arch/arm/dts/meson-g12b-odroid-n2.dtsi b/arch/arm/dts/meson-g12b-odroid-n2.dtsi
deleted file mode 100644
index 24d0442..0000000
--- a/arch/arm/dts/meson-g12b-odroid-n2.dtsi
+++ /dev/null
@@ -1,303 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2019 BayLibre, SAS
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- */
-
-#include "meson-g12b-odroid.dtsi"
-
-/ {
- aliases {
- rtc0 = &rtc;
- };
-
- dio2133: audio-amplifier-0 {
- compatible = "simple-audio-amplifier";
- enable-gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_HIGH>;
- VCC-supply = <&vcc_5v>;
- sound-name-prefix = "U19";
- status = "okay";
- };
-
- hub_5v: regulator-hub_5v {
- compatible = "regulator-fixed";
- regulator-name = "HUB_5V";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc_5v>;
-
- /* Connected to the Hub CHIPENABLE, LOW sets low power state */
- gpio = <&gpio GPIOH_5 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
-
- sound {
- compatible = "amlogic,axg-sound-card";
- model = "ODROID-N2";
- audio-widgets = "Line", "Lineout";
- audio-aux-devs = <&tdmout_b>, <&tdmout_c>, <&tdmin_a>,
- <&tdmin_b>, <&tdmin_c>, <&tdmin_lb>,
- <&dio2133>;
- audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
- "TDMOUT_B IN 1", "FRDDR_B OUT 1",
- "TDMOUT_B IN 2", "FRDDR_C OUT 1",
- "TDM_B Playback", "TDMOUT_B OUT",
- "TDMOUT_C IN 0", "FRDDR_A OUT 2",
- "TDMOUT_C IN 1", "FRDDR_B OUT 2",
- "TDMOUT_C IN 2", "FRDDR_C OUT 2",
- "TDM_C Playback", "TDMOUT_C OUT",
- "TDMIN_A IN 4", "TDM_B Loopback",
- "TDMIN_B IN 4", "TDM_B Loopback",
- "TDMIN_C IN 4", "TDM_B Loopback",
- "TDMIN_LB IN 1", "TDM_B Loopback",
- "TDMIN_A IN 5", "TDM_C Loopback",
- "TDMIN_B IN 5", "TDM_C Loopback",
- "TDMIN_C IN 5", "TDM_C Loopback",
- "TDMIN_LB IN 2", "TDM_C Loopback",
- "TODDR_A IN 0", "TDMIN_A OUT",
- "TODDR_B IN 0", "TDMIN_A OUT",
- "TODDR_C IN 0", "TDMIN_A OUT",
- "TODDR_A IN 1", "TDMIN_B OUT",
- "TODDR_B IN 1", "TDMIN_B OUT",
- "TODDR_C IN 1", "TDMIN_B OUT",
- "TODDR_A IN 2", "TDMIN_C OUT",
- "TODDR_B IN 2", "TDMIN_C OUT",
- "TODDR_C IN 2", "TDMIN_C OUT",
- "TODDR_A IN 6", "TDMIN_LB OUT",
- "TODDR_B IN 6", "TDMIN_LB OUT",
- "TODDR_C IN 6", "TDMIN_LB OUT",
- "U19 INL", "ACODEC LOLP",
- "U19 INR", "ACODEC LORP",
- "Lineout", "U19 OUTL",
- "Lineout", "U19 OUTR";
-
- assigned-clocks = <&clkc CLKID_MPLL2>,
- <&clkc CLKID_MPLL0>,
- <&clkc CLKID_MPLL1>;
- assigned-clock-parents = <0>, <0>, <0>;
- assigned-clock-rates = <294912000>,
- <270950400>,
- <393216000>;
- status = "okay";
-
- dai-link-0 {
- sound-dai = <&frddr_a>;
- };
-
- dai-link-1 {
- sound-dai = <&frddr_b>;
- };
-
- dai-link-2 {
- sound-dai = <&frddr_c>;
- };
-
- dai-link-3 {
- sound-dai = <&toddr_a>;
- };
-
- dai-link-4 {
- sound-dai = <&toddr_b>;
- };
-
- dai-link-5 {
- sound-dai = <&toddr_c>;
- };
-
- /* 8ch hdmi interface */
- dai-link-6 {
- sound-dai = <&tdmif_b>;
- dai-format = "i2s";
- dai-tdm-slot-tx-mask-0 = <1 1>;
- dai-tdm-slot-tx-mask-1 = <1 1>;
- dai-tdm-slot-tx-mask-2 = <1 1>;
- dai-tdm-slot-tx-mask-3 = <1 1>;
- mclk-fs = <256>;
-
- codec-0 {
- sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
- };
-
- codec-1 {
- sound-dai = <&toacodec TOACODEC_IN_B>;
- };
- };
-
- /* i2s jack output interface */
- dai-link-7 {
- sound-dai = <&tdmif_c>;
- dai-format = "i2s";
- dai-tdm-slot-tx-mask-0 = <1 1>;
- mclk-fs = <256>;
-
- codec-0 {
- sound-dai = <&tohdmitx TOHDMITX_I2S_IN_C>;
- };
-
- codec-1 {
- sound-dai = <&toacodec TOACODEC_IN_C>;
- };
- };
-
- /* hdmi glue */
- dai-link-8 {
- sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
-
- codec {
- sound-dai = <&hdmi_tx>;
- };
- };
-
- /* acodec glue */
- dai-link-9 {
- sound-dai = <&toacodec TOACODEC_OUT>;
-
- codec {
- sound-dai = <&acodec>;
- };
- };
- };
-};
-
-&acodec {
- AVDD-supply = <&vddao_1v8>;
- status = "okay";
-};
-
-ðmac {
- pinctrl-0 = <ð_pins>, <ð_rgmii_pins>;
- pinctrl-names = "default";
- status = "okay";
- phy-mode = "rgmii";
- phy-handle = <&external_phy>;
- amlogic,tx-delay-ns = <2>;
-};
-
-&ext_mdio {
- external_phy: ethernet-phy@0 {
- /* Realtek RTL8211F (0x001cc916) */
- reg = <0>;
- max-speed = <1000>;
-
- reset-assert-us = <10000>;
- reset-deassert-us = <80000>;
- reset-gpios = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>;
-
- interrupt-parent = <&gpio_intc>;
- /* MAC_INTR on GPIOZ_14 */
- interrupts = <26 IRQ_TYPE_LEVEL_LOW>;
- };
-};
-
-&gpio {
- gpio-line-names =
- /* GPIOZ */
- "", "", "", "", "", "", "", "",
- "", "", "", "", "", "", "", "",
- /* GPIOH */
- "", "", "", "", "", "", "", "",
- "",
- /* BOOT */
- "", "", "", "", "", "", "", "",
- "", "", "", "", "", "", "", "",
- /* GPIOC */
- "", "", "", "", "", "", "", "",
- /* GPIOA */
- "PIN_44", /* GPIOA_0 */
- "PIN_46", /* GPIOA_1 */
- "PIN_45", /* GPIOA_2 */
- "PIN_47", /* GPIOA_3 */
- "PIN_26", /* GPIOA_4 */
- "", "", "", "", "", "",
- "PIN_42", /* GPIOA_11 */
- "PIN_32", /* GPIOA_12 */
- "PIN_7", /* GPIOA_13 */
- "PIN_27", /* GPIOA_14 */
- "PIN_28", /* GPIOA_15 */
- /* GPIOX */
- "PIN_16", /* GPIOX_0 */
- "PIN_18", /* GPIOX_1 */
- "PIN_22", /* GPIOX_2 */
- "PIN_11", /* GPIOX_3 */
- "PIN_13", /* GPIOX_4 */
- "PIN_33", /* GPIOX_5 */
- "PIN_35", /* GPIOX_6 */
- "PIN_15", /* GPIOX_7 */
- "PIN_19", /* GPIOX_8 */
- "PIN_21", /* GPIOX_9 */
- "PIN_24", /* GPIOX_10 */
- "PIN_23", /* GPIOX_11 */
- "PIN_8", /* GPIOX_12 */
- "PIN_10", /* GPIOX_13 */
- "PIN_29", /* GPIOX_14 */
- "PIN_31", /* GPIOX_15 */
- "PIN_12", /* GPIOX_16 */
- "PIN_3", /* GPIOX_17 */
- "PIN_5", /* GPIOX_18 */
- "PIN_36"; /* GPIOX_19 */
- /*
- * WARNING: The USB Hub on the Odroid-N2 needs a reset signal
- * to be turned high in order to be detected by the USB Controller
- * This signal should be handled by a USB specific power sequence
- * in order to reset the Hub when USB bus is powered down.
- */
- hog-0 {
- gpio-hog;
- gpios = <GPIOH_4 GPIO_ACTIVE_HIGH>;
- output-high;
- line-name = "usb-hub-reset";
- };
-};
-
-&i2c3 {
- status = "okay";
- pinctrl-0 = <&i2c3_sda_a_pins>, <&i2c3_sck_a_pins>;
- pinctrl-names = "default";
-
- rtc: rtc@51 {
- compatible = "nxp,pcf8563";
- reg = <0x51>;
- wakeup-source;
- };
-};
-
-&ir {
- status = "okay";
- pinctrl-0 = <&remote_input_ao_pins>;
- pinctrl-names = "default";
- linux,rc-map-name = "rc-odroid";
-};
-
-/*
- * EMMC_D4, EMMC_D5, EMMC_D6 and EMMC_D7 pins are shared between SPI NOR pins
- * and eMMC Data 4 to 7 pins.
- * Replace emmc_data_8b_pins to emmc_data_4b_pins from sd_emmc_c pinctrl-0,
- * and change bus-width to 4 then spifc can be enabled.
- * The SW1 slide should also be set to the correct position.
- */
-&spifc {
- status = "disabled";
- pinctrl-0 = <&nor_pins>;
- pinctrl-names = "default";
-
- mx25u64: flash@0 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "mxicy,mx25u6435f", "jedec,spi-nor";
- reg = <0>;
- spi-max-frequency = <104000000>;
- };
-};
-
-&toacodec {
- status = "okay";
-};
-
-&usb {
- vbus-supply = <&usb_pwr_en>;
-};
-
-&usb2_phy1 {
- /* Enable the hub which is connected to this port */
- phy-supply = <&hub_5v>;
-};
diff --git a/arch/arm/dts/meson-g12b-odroid-n2l.dts b/arch/arm/dts/meson-g12b-odroid-n2l.dts
deleted file mode 100644
index 70919f4..0000000
--- a/arch/arm/dts/meson-g12b-odroid-n2l.dts
+++ /dev/null
@@ -1,125 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2022 Dongjin Kim <tobetter@gmail.com>
- */
-
-/dts-v1/;
-
-/* The Amlogic S922X Rev. C supports the same OPPs as the A311D variant */
-#include "meson-g12b-a311d.dtsi"
-#include "meson-g12b-odroid.dtsi"
-
-/ {
- compatible = "hardkernel,odroid-n2l", "amlogic,s922x", "amlogic,g12b";
- model = "Hardkernel ODROID-N2L";
-
- sound {
- compatible = "amlogic,axg-sound-card";
- model = "ODROID-N2L";
- audio-aux-devs = <&tdmout_b>, <&tdmin_a>, <&tdmin_b>,
- <&tdmin_c>, <&tdmin_lb>;
- audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
- "TDMOUT_B IN 1", "FRDDR_B OUT 1",
- "TDMOUT_B IN 2", "FRDDR_C OUT 1",
- "TDM_B Playback", "TDMOUT_B OUT",
- "TDMIN_A IN 4", "TDM_B Loopback",
- "TDMIN_B IN 4", "TDM_B Loopback",
- "TDMIN_C IN 4", "TDM_B Loopback",
- "TDMIN_LB IN 1", "TDM_B Loopback",
- "TODDR_A IN 0", "TDMIN_A OUT",
- "TODDR_B IN 0", "TDMIN_A OUT",
- "TODDR_C IN 0", "TDMIN_A OUT",
- "TODDR_A IN 1", "TDMIN_B OUT",
- "TODDR_B IN 1", "TDMIN_B OUT",
- "TODDR_C IN 1", "TDMIN_B OUT",
- "TODDR_A IN 2", "TDMIN_C OUT",
- "TODDR_B IN 2", "TDMIN_C OUT",
- "TODDR_C IN 2", "TDMIN_C OUT",
- "TODDR_A IN 6", "TDMIN_LB OUT",
- "TODDR_B IN 6", "TDMIN_LB OUT",
- "TODDR_C IN 6", "TDMIN_LB OUT";
-
- assigned-clocks = <&clkc CLKID_MPLL2>,
- <&clkc CLKID_MPLL0>,
- <&clkc CLKID_MPLL1>;
- assigned-clock-parents = <0>, <0>, <0>;
- assigned-clock-rates = <294912000>,
- <270950400>,
- <393216000>;
- status = "okay";
-
- dai-link-0 {
- sound-dai = <&frddr_a>;
- };
-
- dai-link-1 {
- sound-dai = <&frddr_b>;
- };
-
- dai-link-2 {
- sound-dai = <&frddr_c>;
- };
-
- dai-link-3 {
- sound-dai = <&toddr_a>;
- };
-
- dai-link-4 {
- sound-dai = <&toddr_b>;
- };
-
- dai-link-5 {
- sound-dai = <&toddr_c>;
- };
-
- /* 8ch hdmi interface */
- dai-link-6 {
- sound-dai = <&tdmif_b>;
- dai-format = "i2s";
- dai-tdm-slot-tx-mask-0 = <1 1>;
- dai-tdm-slot-tx-mask-1 = <1 1>;
- dai-tdm-slot-tx-mask-2 = <1 1>;
- dai-tdm-slot-tx-mask-3 = <1 1>;
- mclk-fs = <256>;
-
- codec {
- sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
- };
- };
-
- /* hdmi glue */
- dai-link-7 {
- sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
-
- codec {
- sound-dai = <&hdmi_tx>;
- };
- };
- };
-};
-
-ð_phy {
- status = "disabled";
-};
-
-&vddcpu_a {
- regulator-min-microvolt = <680000>;
- regulator-max-microvolt = <1040000>;
-
- pwms = <&pwm_ab 0 1500 0>;
-};
-
-&vddcpu_b {
- regulator-min-microvolt = <680000>;
- regulator-max-microvolt = <1040000>;
-
- pwms = <&pwm_AO_cd 1 1500 0>;
-};
-
-&usb2_phy0 {
- phy-supply = <&usb_pwr_en>;
-};
-
-&usb2_phy1 {
- phy-supply = <&usb_pwr_en>;
-};
diff --git a/arch/arm/dts/meson-g12b-odroid.dtsi b/arch/arm/dts/meson-g12b-odroid.dtsi
deleted file mode 100644
index 9e12a34..0000000
--- a/arch/arm/dts/meson-g12b-odroid.dtsi
+++ /dev/null
@@ -1,445 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2019 BayLibre, SAS
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- */
-
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/gpio/meson-g12a-gpio.h>
-#include <dt-bindings/sound/meson-g12a-toacodec.h>
-#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
-
-/ {
- aliases {
- serial0 = &uart_AO;
- ethernet0 = ðmac;
- rtc1 = &vrtc;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- memory@0 {
- device_type = "memory";
- reg = <0x0 0x0 0x0 0x40000000>;
- };
-
- emmc_pwrseq: emmc-pwrseq {
- compatible = "mmc-pwrseq-emmc";
- reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
- };
-
- fan: gpio-fan {
- compatible = "gpio-fan";
- gpios = <&gpio_ao GPIOAO_10 GPIO_ACTIVE_HIGH>;
- /* Using Dummy Speed */
- gpio-fan,speed-map = <0 0>, <1 1>;
- #cooling-cells = <2>;
- };
-
- leds {
- compatible = "gpio-leds";
-
- led-blue {
- label = "n2:blue";
- gpios = <&gpio_ao GPIOAO_11 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "heartbeat";
- };
- };
-
- tflash_vdd: regulator-tflash_vdd {
- compatible = "regulator-fixed";
-
- regulator-name = "TFLASH_VDD";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
-
- gpio = <&gpio_ao GPIOAO_8 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- regulator-always-on;
- };
-
- tf_io: gpio-regulator-tf_io {
- compatible = "regulator-gpio";
-
- regulator-name = "TF_IO";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
-
- gpios = <&gpio_ao GPIOAO_9 GPIO_ACTIVE_HIGH>;
- gpios-states = <0>;
-
- states = <3300000 0>,
- <1800000 1>;
- };
-
- flash_1v8: regulator-flash_1v8 {
- compatible = "regulator-fixed";
- regulator-name = "FLASH_1V8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vcc_3v3>;
- regulator-always-on;
- };
-
- main_12v: regulator-main_12v {
- compatible = "regulator-fixed";
- regulator-name = "12V";
- regulator-min-microvolt = <12000000>;
- regulator-max-microvolt = <12000000>;
- regulator-always-on;
- };
-
- usb_pwr_en: regulator-usb_pwr_en {
- compatible = "regulator-fixed";
- regulator-name = "USB_PWR_EN";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc_5v>;
-
- /* Connected to the microUSB port power enable */
- gpio = <&gpio GPIOH_6 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
-
- vcc_5v: regulator-vcc_5v {
- compatible = "regulator-fixed";
- regulator-name = "5V";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- regulator-always-on;
- vin-supply = <&main_12v>;
- gpio = <&gpio GPIOH_8 GPIO_OPEN_DRAIN>;
- enable-active-high;
- };
-
- vcc_1v8: regulator-vcc_1v8 {
- compatible = "regulator-fixed";
- regulator-name = "VCC_1V8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vcc_3v3>;
- regulator-always-on;
- };
-
- vcc_3v3: regulator-vcc_3v3 {
- compatible = "regulator-fixed";
- regulator-name = "VCC_3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vddao_3v3>;
- regulator-always-on;
- /* FIXME: actually controlled by VDDCPU_B_EN */
- };
-
- vddcpu_a: regulator-vddcpu-a {
- /*
- * MP8756GD Regulator.
- */
- compatible = "pwm-regulator";
-
- regulator-name = "VDDCPU_A";
- regulator-min-microvolt = <721000>;
- regulator-max-microvolt = <1022000>;
-
- pwm-supply = <&main_12v>;
-
- pwms = <&pwm_ab 0 1250 0>;
- pwm-dutycycle-range = <100 0>;
-
- regulator-boot-on;
- regulator-always-on;
- };
-
- vddcpu_b: regulator-vddcpu-b {
- /*
- * Silergy SY8120B1ABC Regulator.
- */
- compatible = "pwm-regulator";
-
- regulator-name = "VDDCPU_B";
- regulator-min-microvolt = <721000>;
- regulator-max-microvolt = <1022000>;
-
- pwm-supply = <&main_12v>;
-
- pwms = <&pwm_AO_cd 1 1250 0>;
- pwm-dutycycle-range = <100 0>;
-
- regulator-boot-on;
- regulator-always-on;
- };
-
- vddao_1v8: regulator-vddao_1v8 {
- compatible = "regulator-fixed";
- regulator-name = "VDDAO_1V8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vddao_3v3>;
- regulator-always-on;
- };
-
- vddao_3v3: regulator-vddao_3v3 {
- compatible = "regulator-fixed";
- regulator-name = "VDDAO_3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&main_12v>;
- regulator-always-on;
- };
-
- hdmi-connector {
- compatible = "hdmi-connector";
- type = "a";
-
- port {
- hdmi_connector_in: endpoint {
- remote-endpoint = <&hdmi_tx_tmds_out>;
- };
- };
- };
-};
-
-&arb {
- status = "okay";
-};
-
-&cec_AO {
- pinctrl-0 = <&cec_ao_a_h_pins>;
- pinctrl-names = "default";
- status = "disabled";
- hdmi-phandle = <&hdmi_tx>;
-};
-
-&cecb_AO {
- pinctrl-0 = <&cec_ao_b_h_pins>;
- pinctrl-names = "default";
- status = "okay";
- hdmi-phandle = <&hdmi_tx>;
-};
-
-&clkc_audio {
- status = "okay";
-};
-
-&cpu0 {
- cpu-supply = <&vddcpu_b>;
- operating-points-v2 = <&cpu_opp_table_0>;
- clocks = <&clkc CLKID_CPU_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu1 {
- cpu-supply = <&vddcpu_b>;
- operating-points-v2 = <&cpu_opp_table_0>;
- clocks = <&clkc CLKID_CPU_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu100 {
- cpu-supply = <&vddcpu_a>;
- operating-points-v2 = <&cpub_opp_table_1>;
- clocks = <&clkc CLKID_CPUB_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu101 {
- cpu-supply = <&vddcpu_a>;
- operating-points-v2 = <&cpub_opp_table_1>;
- clocks = <&clkc CLKID_CPUB_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu102 {
- cpu-supply = <&vddcpu_a>;
- operating-points-v2 = <&cpub_opp_table_1>;
- clocks = <&clkc CLKID_CPUB_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu103 {
- cpu-supply = <&vddcpu_a>;
- operating-points-v2 = <&cpub_opp_table_1>;
- clocks = <&clkc CLKID_CPUB_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu_thermal {
- trips {
- cpu_active: cpu-active {
- temperature = <60000>; /* millicelsius */
- hysteresis = <2000>; /* millicelsius */
- type = "active";
- };
- };
-
- cooling-maps {
- map {
- trip = <&cpu_active>;
- cooling-device = <&fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- };
- };
-};
-
-&ddr_thermal {
- trips {
- ddr_active: ddr-active {
- temperature = <60000>; /* millicelsius */
- hysteresis = <2000>; /* millicelsius */
- type = "active";
- };
- };
-
- cooling-maps {
- map {
- trip = <&ddr_active>;
- cooling-device = <&fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- };
- };
-};
-
-&frddr_a {
- status = "okay";
-};
-
-&frddr_b {
- status = "okay";
-};
-
-&frddr_c {
- status = "okay";
-};
-
-&hdmi_tx {
- status = "okay";
- pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>;
- pinctrl-names = "default";
- hdmi-supply = <&vcc_5v>;
-};
-
-&hdmi_tx_tmds_port {
- hdmi_tx_tmds_out: endpoint {
- remote-endpoint = <&hdmi_connector_in>;
- };
-};
-
-&pwm_ab {
- pinctrl-0 = <&pwm_a_e_pins>;
- pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin0";
- status = "okay";
-};
-
-&pwm_AO_cd {
- pinctrl-0 = <&pwm_ao_d_e_pins>;
- pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin1";
- status = "okay";
-};
-
-&saradc {
- status = "okay";
- vref-supply = <&vddao_1v8>;
-};
-
-/* SD card */
-&sd_emmc_b {
- status = "okay";
- pinctrl-0 = <&sdcard_c_pins>;
- pinctrl-1 = <&sdcard_clk_gate_c_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <4>;
- cap-sd-highspeed;
- max-frequency = <50000000>;
- disable-wp;
-
- cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
- vmmc-supply = <&tflash_vdd>;
- vqmmc-supply = <&tf_io>;
-
-};
-
-/* eMMC */
-&sd_emmc_c {
- status = "okay";
- pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>;
- pinctrl-1 = <&emmc_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <8>;
- cap-mmc-highspeed;
- mmc-ddr-1_8v;
- mmc-hs200-1_8v;
- max-frequency = <200000000>;
- disable-wp;
-
- mmc-pwrseq = <&emmc_pwrseq>;
- vmmc-supply = <&vcc_3v3>;
- vqmmc-supply = <&flash_1v8>;
-};
-
-&tdmif_b {
- status = "okay";
-};
-
-&tdmif_c {
- status = "okay";
-};
-
-&tdmin_a {
- status = "okay";
-};
-
-&tdmin_b {
- status = "okay";
-};
-
-&tdmin_c {
- status = "okay";
-};
-
-&tdmin_lb {
- status = "okay";
-};
-
-&tdmout_b {
- status = "okay";
-};
-
-&tdmout_c {
- status = "okay";
-};
-
-&tohdmitx {
- status = "okay";
-};
-
-&toddr_a {
- status = "okay";
-};
-
-&toddr_b {
- status = "okay";
-};
-
-&toddr_c {
- status = "okay";
-};
-
-&uart_AO {
- status = "okay";
- pinctrl-0 = <&uart_ao_a_pins>;
- pinctrl-names = "default";
-};
-
-&usb {
- status = "okay";
-};
-
-&usb2_phy0 {
- phy-supply = <&vcc_5v>;
-};
diff --git a/arch/arm/dts/meson-g12b-radxa-zero2.dts b/arch/arm/dts/meson-g12b-radxa-zero2.dts
deleted file mode 100644
index 890f5bf..0000000
--- a/arch/arm/dts/meson-g12b-radxa-zero2.dts
+++ /dev/null
@@ -1,489 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2019 BayLibre, SAS
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- * Copyright (c) 2019 Christian Hewitt <christianshewitt@gmail.com>
- * Copyright (c) 2022 Radxa Limited
- * Author: Yuntian Zhang <yt@radxa.com>
- */
-
-/dts-v1/;
-
-#include "meson-g12b-a311d.dtsi"
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/leds/common.h>
-#include <dt-bindings/gpio/meson-g12a-gpio.h>
-#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
-
-/ {
- compatible = "radxa,zero2", "amlogic,a311d", "amlogic,g12b";
- model = "Radxa Zero2";
-
- aliases {
- serial0 = &uart_AO;
- serial2 = &uart_A;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- memory@0 {
- device_type = "memory";
- reg = <0x0 0x0 0x0 0x80000000>;
- };
-
- gpio-keys-polled {
- compatible = "gpio-keys-polled";
- poll-interval = <100>;
- power-button {
- label = "power";
- linux,code = <KEY_POWER>;
- gpios = <&gpio_ao GPIOAO_3 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- led-green {
- color = <LED_COLOR_ID_GREEN>;
- function = LED_FUNCTION_STATUS;
- gpios = <&gpio GPIOA_12 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "heartbeat";
- };
- };
-
- hdmi-connector {
- compatible = "hdmi-connector";
- type = "a";
-
- port {
- hdmi_connector_in: endpoint {
- remote-endpoint = <&hdmi_tx_tmds_out>;
- };
- };
- };
-
- emmc_pwrseq: emmc-pwrseq {
- compatible = "mmc-pwrseq-emmc";
- reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
- };
-
- sdio_pwrseq: sdio-pwrseq {
- compatible = "mmc-pwrseq-simple";
- reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
- clocks = <&wifi32k>;
- clock-names = "ext_clock";
- };
-
- ao_5v: regulator-ao-5v {
- compatible = "regulator-fixed";
- regulator-name = "AO_5V";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- regulator-always-on;
- };
-
- vcc_1v8: regulator-vcc-1v8 {
- compatible = "regulator-fixed";
- regulator-name = "VCC_1V8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vcc_3v3>;
- regulator-always-on;
- };
-
- vcc_3v3: regulator-vcc-3v3 {
- compatible = "regulator-fixed";
- regulator-name = "VCC_3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vddao_3v3>;
- regulator-always-on;
- /* FIXME: actually controlled by VDDCPU_B_EN */
- };
-
- vddao_1v8: regulator-vddao-1v8 {
- compatible = "regulator-fixed";
- regulator-name = "VDDIO_AO1V8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vddao_3v3>;
- regulator-always-on;
- };
-
- vddao_3v3: regulator-vddao-3v3 {
- compatible = "regulator-fixed";
- regulator-name = "VDDAO_3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&ao_5v>;
- regulator-always-on;
- };
-
- vddcpu_a: regulator-vddcpu-a {
- /*
- * MP8756GD Regulator.
- */
- compatible = "pwm-regulator";
-
- regulator-name = "VDDCPU_A";
- regulator-min-microvolt = <730000>;
- regulator-max-microvolt = <1022000>;
-
- pwm-supply = <&ao_5v>;
-
- pwms = <&pwm_ab 0 1250 0>;
- pwm-dutycycle-range = <100 0>;
-
- regulator-boot-on;
- regulator-always-on;
- };
-
- vddcpu_b: regulator-vddcpu-b {
- /*
- * Silergy SY8120B1ABC Regulator.
- */
- compatible = "pwm-regulator";
-
- regulator-name = "VDDCPU_B";
- regulator-min-microvolt = <730000>;
- regulator-max-microvolt = <1022000>;
-
- pwm-supply = <&ao_5v>;
-
- pwms = <&pwm_AO_cd 1 1250 0>;
- pwm-dutycycle-range = <100 0>;
-
- regulator-boot-on;
- regulator-always-on;
- };
-
- sound {
- compatible = "amlogic,axg-sound-card";
- model = "RADXA-ZERO2";
- audio-aux-devs = <&tdmout_b>;
- audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
- "TDMOUT_B IN 1", "FRDDR_B OUT 1",
- "TDMOUT_B IN 2", "FRDDR_C OUT 1",
- "TDM_B Playback", "TDMOUT_B OUT";
-
- assigned-clocks = <&clkc CLKID_MPLL2>,
- <&clkc CLKID_MPLL0>,
- <&clkc CLKID_MPLL1>;
- assigned-clock-parents = <0>, <0>, <0>;
- assigned-clock-rates = <294912000>,
- <270950400>,
- <393216000>;
-
- dai-link-0 {
- sound-dai = <&frddr_a>;
- };
-
- dai-link-1 {
- sound-dai = <&frddr_b>;
- };
-
- dai-link-2 {
- sound-dai = <&frddr_c>;
- };
-
- /* 8ch hdmi interface */
- dai-link-3 {
- sound-dai = <&tdmif_b>;
- dai-format = "i2s";
- dai-tdm-slot-tx-mask-0 = <1 1>;
- dai-tdm-slot-tx-mask-1 = <1 1>;
- dai-tdm-slot-tx-mask-2 = <1 1>;
- dai-tdm-slot-tx-mask-3 = <1 1>;
- mclk-fs = <256>;
-
- codec {
- sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
- };
- };
-
- /* hdmi glue */
- dai-link-4 {
- sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
-
- codec {
- sound-dai = <&hdmi_tx>;
- };
- };
- };
-
- wifi32k: clock-0 {
- compatible = "pwm-clock";
- #clock-cells = <0>;
- clock-frequency = <32768>;
- pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
- };
-};
-
-&arb {
- status = "okay";
-};
-
-&cec_AO {
- pinctrl-0 = <&cec_ao_a_h_pins>;
- pinctrl-names = "default";
- status = "disabled";
- hdmi-phandle = <&hdmi_tx>;
-};
-
-&cecb_AO {
- pinctrl-0 = <&cec_ao_b_h_pins>;
- pinctrl-names = "default";
- status = "okay";
- hdmi-phandle = <&hdmi_tx>;
-};
-
-&clkc_audio {
- status = "okay";
-};
-
-&cpu0 {
- cpu-supply = <&vddcpu_b>;
- operating-points-v2 = <&cpu_opp_table_0>;
- clocks = <&clkc CLKID_CPU_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu1 {
- cpu-supply = <&vddcpu_b>;
- operating-points-v2 = <&cpu_opp_table_0>;
- clocks = <&clkc CLKID_CPU_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu100 {
- cpu-supply = <&vddcpu_a>;
- operating-points-v2 = <&cpub_opp_table_1>;
- clocks = <&clkc CLKID_CPUB_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu101 {
- cpu-supply = <&vddcpu_a>;
- operating-points-v2 = <&cpub_opp_table_1>;
- clocks = <&clkc CLKID_CPUB_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu102 {
- cpu-supply = <&vddcpu_a>;
- operating-points-v2 = <&cpub_opp_table_1>;
- clocks = <&clkc CLKID_CPUB_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu103 {
- cpu-supply = <&vddcpu_a>;
- operating-points-v2 = <&cpub_opp_table_1>;
- clocks = <&clkc CLKID_CPUB_CLK>;
- clock-latency = <50000>;
-};
-
-&frddr_a {
- status = "okay";
-};
-
-&frddr_b {
- status = "okay";
-};
-
-&frddr_c {
- status = "okay";
-};
-
-&gpio {
- gpio-line-names =
- /* GPIOZ */
- "PIN_27", "PIN_28", "PIN_7", "PIN_11", "PIN_13", "PIN_15", "PIN_18", "PIN_40",
- "", "", "", "", "", "", "", "",
- /* GPIOH */
- "", "", "", "", "PIN_19", "PIN_21", "PIN_24", "PIN_23",
- "",
- /* BOOT */
- "", "", "", "", "", "", "", "",
- "", "", "", "", "EMMC_PWRSEQ", "", "", "",
- /* GPIOC */
- "", "", "", "", "", "", "SD_CD", "PIN_36",
- /* GPIOA */
- "PIN_32", "PIN_12", "PIN_35", "", "", "PIN_38", "", "",
- "", "", "", "", "LED_GREEN", "PIN_31", "PIN_3", "PIN_5",
- /* GPIOX */
- "", "", "", "", "", "", "SDIO_PWRSEQ", "",
- "", "", "", "", "", "", "", "",
- "", "BT_SHUTDOWN", "", "";
-};
-
-&gpio_ao {
- gpio-line-names =
- /* GPIOAO */
- "PIN_8", "PIN_10", "", "BTN_POWER", "", "", "", "PIN_29",
- "PIN_33", "PIN_37", "FAN", "",
- /* GPIOE */
- "", "", "";
-};
-
-&hdmi_tx {
- status = "okay";
- pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>;
- pinctrl-names = "default";
- hdmi-supply = <&ao_5v>;
-};
-
-&hdmi_tx_tmds_port {
- hdmi_tx_tmds_out: endpoint {
- remote-endpoint = <&hdmi_connector_in>;
- };
-};
-
-&ir {
- status = "disabled";
- pinctrl-0 = <&remote_input_ao_pins>;
- pinctrl-names = "default";
-};
-
-&pwm_ab {
- pinctrl-0 = <&pwm_a_e_pins>;
- pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin0";
- status = "okay";
-};
-
-&pwm_ef {
- pinctrl-0 = <&pwm_e_pins>;
- pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin0";
- status = "okay";
-};
-
-&pwm_AO_ab {
- pinctrl-0 = <&pwm_ao_a_pins>;
- pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin0";
- status = "okay";
-};
-
-&pwm_AO_cd {
- pinctrl-0 = <&pwm_ao_d_e_pins>;
- pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin1";
- status = "okay";
-};
-
-&saradc {
- status = "okay";
- vref-supply = <&vddao_1v8>;
-};
-
-/* SDIO */
-&sd_emmc_a {
- status = "okay";
- pinctrl-0 = <&sdio_pins>;
- pinctrl-1 = <&sdio_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
- #address-cells = <1>;
- #size-cells = <0>;
-
- bus-width = <4>;
- cap-sd-highspeed;
- max-frequency = <100000000>;
-
- non-removable;
- disable-wp;
-
- /* WiFi firmware requires power to be kept while in suspend */
- keep-power-in-suspend;
-
- mmc-pwrseq = <&sdio_pwrseq>;
-
- vmmc-supply = <&vddao_3v3>;
- vqmmc-supply = <&vddao_1v8>;
-
- brcmf: wifi@1 {
- reg = <1>;
- compatible = "brcm,bcm4329-fmac";
- };
-};
-
-/* SD card */
-&sd_emmc_b {
- status = "okay";
- pinctrl-0 = <&sdcard_c_pins>;
- pinctrl-1 = <&sdcard_clk_gate_c_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <4>;
- cap-sd-highspeed;
- max-frequency = <50000000>;
- disable-wp;
-
- cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
- vmmc-supply = <&vddao_3v3>;
- vqmmc-supply = <&vddao_3v3>;
-};
-
-/* eMMC */
-&sd_emmc_c {
- status = "okay";
- pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>;
- pinctrl-1 = <&emmc_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <8>;
- cap-mmc-highspeed;
- mmc-ddr-1_8v;
- mmc-hs200-1_8v;
- max-frequency = <200000000>;
- disable-wp;
-
- mmc-pwrseq = <&emmc_pwrseq>;
- vmmc-supply = <&vcc_3v3>;
- vqmmc-supply = <&vcc_1v8>;
-};
-
-&tdmif_b {
- status = "okay";
-};
-
-&tdmout_b {
- status = "okay";
-};
-
-&tohdmitx {
- status = "okay";
-};
-
-&uart_A {
- status = "okay";
- pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
- pinctrl-names = "default";
- uart-has-rtscts;
-
- bluetooth {
- compatible = "brcm,bcm43438-bt";
- shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
- max-speed = <2000000>;
- clocks = <&wifi32k>;
- clock-names = "lpo";
- };
-};
-
-&uart_AO {
- status = "okay";
- pinctrl-0 = <&uart_ao_a_pins>;
- pinctrl-names = "default";
-};
-
-&usb {
- status = "okay";
-};
diff --git a/arch/arm/dts/meson-g12b-s922x-bananapi-m2s.dts b/arch/arm/dts/meson-g12b-s922x-bananapi-m2s.dts
deleted file mode 100644
index 7f66f26..0000000
--- a/arch/arm/dts/meson-g12b-s922x-bananapi-m2s.dts
+++ /dev/null
@@ -1,14 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2023 Christian Hewitt <christianshewitt@gmail.com>
- */
-
-/dts-v1/;
-
-#include "meson-g12b-s922x.dtsi"
-#include "meson-g12b-bananapi.dtsi"
-
-/ {
- compatible = "bananapi,bpi-m2s", "amlogic,s922x", "amlogic,g12b";
- model = "BananaPi M2S";
-};
diff --git a/arch/arm/dts/meson-g12b-s922x.dtsi b/arch/arm/dts/meson-g12b-s922x.dtsi
deleted file mode 100644
index 1e5d0ee..0000000
--- a/arch/arm/dts/meson-g12b-s922x.dtsi
+++ /dev/null
@@ -1,139 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2019 BayLibre, SAS
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- */
-
-#include "meson-g12b.dtsi"
-
-/ {
- cpu_opp_table_0: opp-table-0 {
- compatible = "operating-points-v2";
- opp-shared;
-
- opp-100000000 {
- opp-hz = /bits/ 64 <100000000>;
- opp-microvolt = <731000>;
- };
-
- opp-250000000 {
- opp-hz = /bits/ 64 <250000000>;
- opp-microvolt = <731000>;
- };
-
- opp-500000000 {
- opp-hz = /bits/ 64 <500000000>;
- opp-microvolt = <731000>;
- };
-
- opp-667000000 {
- opp-hz = /bits/ 64 <667000000>;
- opp-microvolt = <731000>;
- };
-
- opp-1000000000 {
- opp-hz = /bits/ 64 <1000000000>;
- opp-microvolt = <731000>;
- };
-
- opp-1200000000 {
- opp-hz = /bits/ 64 <1200000000>;
- opp-microvolt = <731000>;
- };
-
- opp-1398000000 {
- opp-hz = /bits/ 64 <1398000000>;
- opp-microvolt = <761000>;
- };
-
- opp-1512000000 {
- opp-hz = /bits/ 64 <1512000000>;
- opp-microvolt = <791000>;
- };
-
- opp-1608000000 {
- opp-hz = /bits/ 64 <1608000000>;
- opp-microvolt = <831000>;
- };
-
- opp-1704000000 {
- opp-hz = /bits/ 64 <1704000000>;
- opp-microvolt = <861000>;
- };
-
- opp-1896000000 {
- opp-hz = /bits/ 64 <1896000000>;
- opp-microvolt = <981000>;
- };
-
- opp-1992000000 {
- opp-hz = /bits/ 64 <1992000000>;
- opp-microvolt = <1001000>;
- };
- };
-
- cpub_opp_table_1: opp-table-1 {
- compatible = "operating-points-v2";
- opp-shared;
-
- opp-100000000 {
- opp-hz = /bits/ 64 <100000000>;
- opp-microvolt = <751000>;
- };
-
- opp-250000000 {
- opp-hz = /bits/ 64 <250000000>;
- opp-microvolt = <751000>;
- };
-
- opp-500000000 {
- opp-hz = /bits/ 64 <500000000>;
- opp-microvolt = <751000>;
- };
-
- opp-667000000 {
- opp-hz = /bits/ 64 <667000000>;
- opp-microvolt = <751000>;
- };
-
- opp-1000000000 {
- opp-hz = /bits/ 64 <1000000000>;
- opp-microvolt = <771000>;
- };
-
- opp-1200000000 {
- opp-hz = /bits/ 64 <1200000000>;
- opp-microvolt = <771000>;
- };
-
- opp-1398000000 {
- opp-hz = /bits/ 64 <1398000000>;
- opp-microvolt = <791000>;
- };
-
- opp-1512000000 {
- opp-hz = /bits/ 64 <1512000000>;
- opp-microvolt = <821000>;
- };
-
- opp-1608000000 {
- opp-hz = /bits/ 64 <1608000000>;
- opp-microvolt = <861000>;
- };
-
- opp-1704000000 {
- opp-hz = /bits/ 64 <1704000000>;
- opp-microvolt = <891000>;
- };
-
- opp-1800000000 {
- opp-hz = /bits/ 64 <1800000000>;
- opp-microvolt = <981000>;
- };
-
- opp-1908000000 {
- opp-hz = /bits/ 64 <1908000000>;
- opp-microvolt = <1022000>;
- };
- };
-};
diff --git a/arch/arm/dts/meson-g12b-w400.dtsi b/arch/arm/dts/meson-g12b-w400.dtsi
deleted file mode 100644
index feb0885..0000000
--- a/arch/arm/dts/meson-g12b-w400.dtsi
+++ /dev/null
@@ -1,425 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2019 BayLibre, SAS
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- * Copyright (c) 2019 Christian Hewitt <christianshewitt@gmail.com>
- */
-
-/dts-v1/;
-
-#include "meson-g12b.dtsi"
-#include "meson-g12b-s922x.dtsi"
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/gpio/meson-g12a-gpio.h>
-
-/ {
- aliases {
- serial0 = &uart_AO;
- ethernet0 = ðmac;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- memory@0 {
- device_type = "memory";
- reg = <0x0 0x0 0x0 0x40000000>;
- };
-
- emmc_pwrseq: emmc-pwrseq {
- compatible = "mmc-pwrseq-emmc";
- reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
- };
-
- sdio_pwrseq: sdio-pwrseq {
- compatible = "mmc-pwrseq-simple";
- reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
- clocks = <&wifi32k>;
- clock-names = "ext_clock";
- };
-
- flash_1v8: regulator-flash_1v8 {
- compatible = "regulator-fixed";
- regulator-name = "FLASH_1V8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vcc_3v3>;
- regulator-always-on;
- };
-
- main_12v: regulator-main_12v {
- compatible = "regulator-fixed";
- regulator-name = "12V";
- regulator-min-microvolt = <12000000>;
- regulator-max-microvolt = <12000000>;
- regulator-always-on;
- };
-
- vcc_5v: regulator-vcc_5v {
- compatible = "regulator-fixed";
- regulator-name = "VCC_5V";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&main_12v>;
-
- gpio = <&gpio GPIOH_8 GPIO_OPEN_DRAIN>;
- enable-active-high;
- };
-
- vcc_1v8: regulator-vcc_1v8 {
- compatible = "regulator-fixed";
- regulator-name = "VCC_1V8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vcc_3v3>;
- regulator-always-on;
- };
-
- vcc_3v3: regulator-vcc_3v3 {
- compatible = "regulator-fixed";
- regulator-name = "VCC_3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vddao_3v3>;
- regulator-always-on;
- /* FIXME: actually controlled by VDDCPU_B_EN */
- };
-
- vddcpu_a: regulator-vddcpu-a {
- /*
- * MP1653 Regulator.
- */
- compatible = "pwm-regulator";
-
- regulator-name = "VDDCPU_A";
- regulator-min-microvolt = <721000>;
- regulator-max-microvolt = <1022000>;
-
- vin-supply = <&main_12v>;
-
- pwms = <&pwm_ab 0 1250 0>;
- pwm-dutycycle-range = <100 0>;
-
- regulator-boot-on;
- regulator-always-on;
- };
-
- vddcpu_b: regulator-vddcpu-b {
- /*
- * MP1652 Regulator.
- */
- compatible = "pwm-regulator";
-
- regulator-name = "VDDCPU_B";
- regulator-min-microvolt = <721000>;
- regulator-max-microvolt = <1022000>;
-
- vin-supply = <&main_12v>;
-
- pwms = <&pwm_AO_cd 1 1250 0>;
- pwm-dutycycle-range = <100 0>;
-
- regulator-boot-on;
- regulator-always-on;
- };
-
- usb1_pow: regulator-usb1-pow {
- compatible = "regulator-fixed";
- regulator-name = "USB1_POW";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc_5v>;
-
- /* connected to SY6280A Power Switch */
- gpio = <&gpio GPIOA_8 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
-
- usb_pwr_en: regulator-usb-pwr-en {
- compatible = "regulator-fixed";
- regulator-name = "USB_PWR_EN";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc_5v>;
-
- /* Connected to USB3 Type-A Port power enable */
- gpio = <&gpio GPIOAO_7 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
-
- vddao_1v8: regulator-vddao-1v8 {
- compatible = "regulator-fixed";
- regulator-name = "VDDAO_1V8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vddao_3v3>;
- regulator-always-on;
- };
-
- vddao_3v3: regulator-vddao-3v3 {
- compatible = "regulator-fixed";
- regulator-name = "VDDAO_3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&main_12v>;
- regulator-always-on;
- };
-
- cvbs-connector {
- compatible = "composite-video-connector";
-
- port {
- cvbs_connector_in: endpoint {
- remote-endpoint = <&cvbs_vdac_out>;
- };
- };
- };
-
- hdmi-connector {
- compatible = "hdmi-connector";
- type = "a";
-
- port {
- hdmi_connector_in: endpoint {
- remote-endpoint = <&hdmi_tx_tmds_out>;
- };
- };
- };
-
- wifi32k: wifi32k {
- compatible = "pwm-clock";
- #clock-cells = <0>;
- clock-frequency = <32768>;
- pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
- };
-};
-
-&cec_AO {
- pinctrl-0 = <&cec_ao_a_h_pins>;
- pinctrl-names = "default";
- status = "disabled";
- hdmi-phandle = <&hdmi_tx>;
-};
-
-&cecb_AO {
- pinctrl-0 = <&cec_ao_b_h_pins>;
- pinctrl-names = "default";
- status = "okay";
- hdmi-phandle = <&hdmi_tx>;
-};
-
-&cpu0 {
- cpu-supply = <&vddcpu_b>;
- operating-points-v2 = <&cpu_opp_table_0>;
- clocks = <&clkc CLKID_CPU_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu1 {
- cpu-supply = <&vddcpu_b>;
- operating-points-v2 = <&cpu_opp_table_0>;
- clocks = <&clkc CLKID_CPU_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu100 {
- cpu-supply = <&vddcpu_a>;
- operating-points-v2 = <&cpub_opp_table_1>;
- clocks = <&clkc CLKID_CPUB_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu101 {
- cpu-supply = <&vddcpu_a>;
- operating-points-v2 = <&cpub_opp_table_1>;
- clocks = <&clkc CLKID_CPUB_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu102 {
- cpu-supply = <&vddcpu_a>;
- operating-points-v2 = <&cpub_opp_table_1>;
- clocks = <&clkc CLKID_CPUB_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu103 {
- cpu-supply = <&vddcpu_a>;
- operating-points-v2 = <&cpub_opp_table_1>;
- clocks = <&clkc CLKID_CPUB_CLK>;
- clock-latency = <50000>;
-};
-
-&cvbs_vdac_port {
- cvbs_vdac_out: endpoint {
- remote-endpoint = <&cvbs_connector_in>;
- };
-};
-
-&ext_mdio {
- external_phy: ethernet-phy@0 {
- /* Realtek RTL8211F (0x001cc916) */
- reg = <0>;
- max-speed = <1000>;
-
- reset-assert-us = <10000>;
- reset-deassert-us = <80000>;
- reset-gpios = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>;
-
- interrupt-parent = <&gpio_intc>;
- /* MAC_INTR on GPIOZ_14 */
- interrupts = <26 IRQ_TYPE_LEVEL_LOW>;
- };
-};
-
-ðmac {
- pinctrl-0 = <ð_pins>, <ð_rgmii_pins>;
- pinctrl-names = "default";
- status = "okay";
- phy-mode = "rgmii";
- phy-handle = <&external_phy>;
- amlogic,tx-delay-ns = <2>;
-};
-
-&hdmi_tx {
- status = "okay";
- pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>;
- pinctrl-names = "default";
- hdmi-supply = <&vcc_5v>;
-};
-
-&hdmi_tx_tmds_port {
- hdmi_tx_tmds_out: endpoint {
- remote-endpoint = <&hdmi_connector_in>;
- };
-};
-
-&ir {
- status = "okay";
- pinctrl-0 = <&remote_input_ao_pins>;
- pinctrl-names = "default";
-};
-
-&pwm_ab {
- pinctrl-0 = <&pwm_a_e_pins>;
- pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin0";
- status = "okay";
-};
-
-&pwm_AO_cd {
- pinctrl-0 = <&pwm_ao_d_e_pins>;
- pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin1";
- status = "okay";
-};
-
-&pwm_ef {
- pinctrl-0 = <&pwm_e_pins>;
- pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin0";
- status = "okay";
-};
-
-/* SDIO */
-&sd_emmc_a {
- status = "okay";
- pinctrl-0 = <&sdio_pins>;
- pinctrl-1 = <&sdio_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
- #address-cells = <1>;
- #size-cells = <0>;
-
- bus-width = <4>;
- cap-sd-highspeed;
- max-frequency = <100000000>;
-
- /* WiFi firmware requires power to be kept while in suspend */
- keep-power-in-suspend;
-
- non-removable;
- disable-wp;
-
- mmc-pwrseq = <&sdio_pwrseq>;
-
- vmmc-supply = <&vddao_3v3>;
- vqmmc-supply = <&vddao_1v8>;
-
- brcmf: wifi@1 {
- reg = <1>;
- compatible = "brcm,bcm4329-fmac";
- };
-};
-
-/* SD card */
-&sd_emmc_b {
- status = "okay";
- pinctrl-0 = <&sdcard_c_pins>;
- pinctrl-1 = <&sdcard_clk_gate_c_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <4>;
- cap-sd-highspeed;
- max-frequency = <50000000>;
- disable-wp;
-
- cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
- vmmc-supply = <&vddao_3v3>;
- vqmmc-supply = <&vddao_3v3>;
-};
-
-/* eMMC */
-&sd_emmc_c {
- status = "okay";
- pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>;
- pinctrl-1 = <&emmc_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <8>;
- cap-mmc-highspeed;
- max-frequency = <100000000>;
- disable-wp;
-
- mmc-pwrseq = <&emmc_pwrseq>;
- vmmc-supply = <&vcc_3v3>;
- vqmmc-supply = <&flash_1v8>;
-};
-
-&uart_A {
- status = "okay";
- pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
- pinctrl-names = "default";
- uart-has-rtscts;
-
- bluetooth {
- compatible = "brcm,bcm43438-bt";
- shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
- max-speed = <2000000>;
- clocks = <&wifi32k>;
- clock-names = "lpo";
- };
-};
-
-&uart_AO {
- status = "okay";
- pinctrl-0 = <&uart_ao_a_pins>;
- pinctrl-names = "default";
-};
-
-&usb {
- status = "okay";
- dr_mode = "host";
- vbus-supply = <&usb_pwr_en>;
-};
-
-&usb2_phy0 {
- phy-supply = <&usb1_pow>;
-};
-
-&usb2_phy1 {
- phy-supply = <&usb1_pow>;
-};
diff --git a/arch/arm/dts/meson-g12b.dtsi b/arch/arm/dts/meson-g12b.dtsi
deleted file mode 100644
index 75ff00f..0000000
--- a/arch/arm/dts/meson-g12b.dtsi
+++ /dev/null
@@ -1,146 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2019 BayLibre, SAS
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- */
-
-#include "meson-g12.dtsi"
-
-/ {
- compatible = "amlogic,g12b";
-
- cpus {
- #address-cells = <0x2>;
- #size-cells = <0x0>;
-
- cpu-map {
- cluster0 {
- core0 {
- cpu = <&cpu0>;
- };
-
- core1 {
- cpu = <&cpu1>;
- };
- };
-
- cluster1 {
- core0 {
- cpu = <&cpu100>;
- };
-
- core1 {
- cpu = <&cpu101>;
- };
-
- core2 {
- cpu = <&cpu102>;
- };
-
- core3 {
- cpu = <&cpu103>;
- };
- };
- };
-
- cpu0: cpu@0 {
- device_type = "cpu";
- compatible = "arm,cortex-a53";
- reg = <0x0 0x0>;
- enable-method = "psci";
- capacity-dmips-mhz = <592>;
- next-level-cache = <&l2>;
- #cooling-cells = <2>;
- };
-
- cpu1: cpu@1 {
- device_type = "cpu";
- compatible = "arm,cortex-a53";
- reg = <0x0 0x1>;
- enable-method = "psci";
- capacity-dmips-mhz = <592>;
- next-level-cache = <&l2>;
- #cooling-cells = <2>;
- };
-
- cpu100: cpu@100 {
- device_type = "cpu";
- compatible = "arm,cortex-a73";
- reg = <0x0 0x100>;
- enable-method = "psci";
- capacity-dmips-mhz = <1024>;
- next-level-cache = <&l2>;
- #cooling-cells = <2>;
- };
-
- cpu101: cpu@101 {
- device_type = "cpu";
- compatible = "arm,cortex-a73";
- reg = <0x0 0x101>;
- enable-method = "psci";
- capacity-dmips-mhz = <1024>;
- next-level-cache = <&l2>;
- #cooling-cells = <2>;
- };
-
- cpu102: cpu@102 {
- device_type = "cpu";
- compatible = "arm,cortex-a73";
- reg = <0x0 0x102>;
- enable-method = "psci";
- capacity-dmips-mhz = <1024>;
- next-level-cache = <&l2>;
- #cooling-cells = <2>;
- };
-
- cpu103: cpu@103 {
- device_type = "cpu";
- compatible = "arm,cortex-a73";
- reg = <0x0 0x103>;
- enable-method = "psci";
- capacity-dmips-mhz = <1024>;
- next-level-cache = <&l2>;
- #cooling-cells = <2>;
- };
-
- l2: l2-cache0 {
- compatible = "cache";
- cache-level = <2>;
- };
- };
-};
-
-&clkc {
- compatible = "amlogic,g12b-clkc";
-};
-
-&cpu_thermal {
- cooling-maps {
- map0 {
- trip = <&cpu_passive>;
- cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu100 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu101 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu102 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu103 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- };
- map1 {
- trip = <&cpu_hot>;
- cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu100 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu101 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu102 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu103 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- };
- };
-};
-
-&mali {
- dma-coherent;
-};
-
-&pmu {
- compatible = "amlogic,g12b-ddr-pmu";
-};
diff --git a/arch/arm/dts/meson-gx-libretech-pc.dtsi b/arch/arm/dts/meson-gx-libretech-pc.dtsi
deleted file mode 100644
index 4e84ab8..0000000
--- a/arch/arm/dts/meson-gx-libretech-pc.dtsi
+++ /dev/null
@@ -1,447 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Copyright (c) 2019 BayLibre SAS.
- * Author: Jerome Brunet <jbrunet@baylibre.com>
- */
-
-/* Libretech Amlogic GX PC form factor - AKA: Tartiflette */
-
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/leds/common.h>
-#include <dt-bindings/sound/meson-aiu.h>
-
-/ {
- adc-keys {
- compatible = "adc-keys";
- io-channels = <&saradc 0>;
- io-channel-names = "buttons";
- keyup-threshold-microvolt = <1800000>;
-
- button-update {
- label = "update";
- linux,code = <KEY_VENDOR>;
- press-threshold-microvolt = <1300000>;
- };
- };
-
- aliases {
- serial0 = &uart_AO;
- ethernet0 = ðmac;
- spi0 = &spifc;
- };
-
- dio2133: analog-amplifier {
- compatible = "simple-audio-amplifier";
- sound-name-prefix = "AU2";
- VCC-supply = <&vcc5v>;
- enable-gpios = <&gpio GPIOH_5 GPIO_ACTIVE_HIGH>;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- cvbs-connector {
- compatible = "composite-video-connector";
- status = "disabled";
-
- port {
- cvbs_connector_in: endpoint {
- remote-endpoint = <&cvbs_vdac_out>;
- };
- };
- };
-
- emmc_pwrseq: emmc-pwrseq {
- compatible = "mmc-pwrseq-emmc";
- reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
- };
-
- hdmi-connector {
- compatible = "hdmi-connector";
- type = "a";
-
- port {
- hdmi_connector_in: endpoint {
- remote-endpoint = <&hdmi_tx_tmds_out>;
- };
- };
- };
-
- gpio-keys-polled {
- compatible = "gpio-keys-polled";
- poll-interval = <100>;
-
- power-button {
- label = "power";
- linux,code = <KEY_POWER>;
- gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_LOW>;
- };
- };
-
- memory@0 {
- device_type = "memory";
- reg = <0x0 0x0 0x0 0x80000000>;
- };
-
- ao_5v: regulator-ao_5v {
- compatible = "regulator-fixed";
- regulator-name = "AO_5V";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&dc_in>;
- regulator-always-on;
- };
-
- dc_in: regulator-dc_in {
- compatible = "regulator-fixed";
- regulator-name = "DC_IN";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- regulator-always-on;
- };
-
- leds {
- compatible = "gpio-leds";
-
- led-green {
- color = <LED_COLOR_ID_GREEN>;
- function = LED_FUNCTION_DISK_ACTIVITY;
- gpios = <&gpio_ao GPIOAO_9 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "disk-activity";
- };
-
- led-blue {
- color = <LED_COLOR_ID_BLUE>;
- function = LED_FUNCTION_STATUS;
- gpios = <&gpio GPIODV_28 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "heartbeat";
- panic-indicator;
- };
- };
-
- vcc_card: regulator-vcc_card {
- compatible = "regulator-fixed";
- regulator-name = "VCC_CARD";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vddio_ao3v3>;
-
- gpio = <&gpio GPIODV_4 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
-
- vcc5v: regulator-vcc5v {
- compatible = "regulator-fixed";
- regulator-name = "VCC5V";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&ao_5v>;
-
- gpio = <&gpio GPIOH_3 GPIO_OPEN_DRAIN>;
- };
-
- vddio_ao18: regulator-vddio_ao18 {
- compatible = "regulator-fixed";
- regulator-name = "VDDIO_AO18";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&ao_5v>;
- regulator-always-on;
- };
-
- vddio_ao3v3: regulator-vddio_ao3v3 {
- compatible = "regulator-fixed";
- regulator-name = "VDDIO_AO3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&ao_5v>;
- regulator-always-on;
- };
-
- vddio_boot: regulator-vddio_boot {
- compatible = "regulator-fixed";
- regulator-name = "VDDIO_BOOT";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vddio_ao3v3>;
- regulator-always-on;
- };
-
- vddio_card: regulator-vddio-card {
- compatible = "regulator-gpio";
- regulator-name = "VDDIO_CARD";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
-
- gpios = <&gpio GPIODV_5 GPIO_ACTIVE_HIGH>;
- gpios-states = <0>;
-
- states = <3300000 0>,
- <1800000 1>;
-
- regulator-settling-time-up-us = <200>;
- regulator-settling-time-down-us = <50000>;
- };
-
- sound {
- compatible = "amlogic,gx-sound-card";
- model = "LIBRETECH-PC";
- audio-aux-devs = <&dio2133>;
- audio-widgets = "Speaker", "7J4-14 LEFT",
- "Speaker", "7J4-11 RIGHT";
- audio-routing = "AU2 INL", "ACODEC LOLN",
- "AU2 INR", "ACODEC LORN",
- "7J4-14 LEFT", "AU2 OUTL",
- "7J4-11 RIGHT", "AU2 OUTR";
- assigned-clocks = <&clkc CLKID_MPLL0>,
- <&clkc CLKID_MPLL1>,
- <&clkc CLKID_MPLL2>;
- assigned-clock-parents = <0>, <0>, <0>;
- assigned-clock-rates = <294912000>,
- <270950400>,
- <393216000>;
- status = "okay";
-
- dai-link-0 {
- sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>;
- };
-
- dai-link-1 {
- sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>;
- dai-format = "i2s";
- mclk-fs = <256>;
-
- codec-0 {
- sound-dai = <&aiu AIU_HDMI CTRL_I2S>;
- };
-
- codec-1 {
- sound-dai = <&aiu AIU_ACODEC CTRL_I2S>;
- };
- };
-
- dai-link-2 {
- sound-dai = <&aiu AIU_HDMI CTRL_OUT>;
-
- codec-0 {
- sound-dai = <&hdmi_tx>;
- };
- };
-
- dai-link-3 {
- sound-dai = <&aiu AIU_ACODEC CTRL_OUT>;
-
- codec-0 {
- sound-dai = <&acodec>;
- };
- };
- };
-};
-
-&acodec {
- AVDD-supply = <&vddio_ao18>;
- status = "okay";
-};
-
-&aiu {
- status = "okay";
-};
-
-&cec_AO {
- pinctrl-0 = <&ao_cec_pins>;
- pinctrl-names = "default";
- hdmi-phandle = <&hdmi_tx>;
- status = "okay";
-};
-
-&cvbs_vdac_port {
- cvbs_vdac_out: endpoint {
- remote-endpoint = <&cvbs_connector_in>;
- };
-};
-
-ðmac {
- pinctrl-0 = <ð_pins>, <ð_phy_irq_pins>;
- pinctrl-names = "default";
- phy-handle = <&external_phy>;
- amlogic,tx-delay-ns = <2>;
- phy-mode = "rgmii";
- status = "okay";
-};
-
-&external_mdio {
- external_phy: ethernet-phy@0 {
- reg = <0>;
- max-speed = <1000>;
- reset-assert-us = <10000>;
- reset-deassert-us = <30000>;
- reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>;
- interrupt-parent = <&gpio_intc>;
- interrupts = <25 IRQ_TYPE_LEVEL_LOW>;
- };
-};
-
-&pinctrl_periphs {
- /*
- * Make sure the reset pin of the usb HUB is driven high to take
- * it out of reset.
- */
- usb1_rst_pins: usb1_rst_irq {
- mux {
- groups = "GPIODV_3";
- function = "gpio_periphs";
- bias-disable;
- output-high;
- };
- };
-
- /* Make sure the phy irq pin is properly configured as input */
- eth_phy_irq_pins: eth_phy_irq {
- mux {
- groups = "GPIOZ_15";
- function = "gpio_periphs";
- bias-disable;
- output-disable;
- };
- };
-};
-
-&hdmi_tx {
- pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>;
- pinctrl-names = "default";
- hdmi-supply = <&vcc5v>;
- status = "okay";
-};
-
-&hdmi_tx_tmds_port {
- hdmi_tx_tmds_out: endpoint {
- remote-endpoint = <&hdmi_connector_in>;
- };
-};
-
-&ir {
- pinctrl-0 = <&remote_input_ao_pins>;
- pinctrl-names = "default";
- status = "okay";
-};
-
-&i2c_C {
- pinctrl-0 = <&i2c_c_dv18_pins>;
- pinctrl-names = "default";
- status = "okay";
-
- rtc: rtc@51 {
- reg = <0x51>;
- compatible = "nxp,pcf8563";
- #clock-cells = <0>;
- clock-output-names = "rtc_clkout";
- };
-};
-
-&pwm_AO_ab {
- pinctrl-0 = <&pwm_ao_a_3_pins>;
- pinctrl-names = "default";
- clocks = <&clkc CLKID_FCLK_DIV4>;
- clock-names = "clkin0";
- status = "okay";
-};
-
-&pwm_ab {
- pinctrl-0 = <&pwm_b_pins>;
- pinctrl-names = "default";
- clocks = <&clkc CLKID_FCLK_DIV4>;
- clock-names = "clkin0";
- status = "okay";
-};
-
-&pwm_ef {
- pinctrl-0 = <&pwm_e_pins>, <&pwm_f_clk_pins>;
- pinctrl-names = "default";
- clocks = <&clkc CLKID_FCLK_DIV4>;
- clock-names = "clkin0";
- status = "okay";
-};
-
-&saradc {
- vref-supply = <&vddio_ao18>;
- status = "okay";
-};
-
-/* SD card */
-&sd_emmc_b {
- pinctrl-0 = <&sdcard_pins>;
- pinctrl-1 = <&sdcard_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <4>;
- cap-sd-highspeed;
- sd-uhs-sdr12;
- sd-uhs-sdr25;
- sd-uhs-sdr50;
- sd-uhs-ddr50;
- max-frequency = <200000000>;
- disable-wp;
-
- cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>;
-
- vmmc-supply = <&vcc_card>;
- vqmmc-supply = <&vddio_card>;
-
- status = "okay";
-};
-
-/* eMMC */
-&sd_emmc_c {
- pinctrl-0 = <&emmc_pins>;
- pinctrl-1 = <&emmc_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <8>;
- cap-mmc-highspeed;
- mmc-ddr-1_8v;
- mmc-hs200-1_8v;
- max-frequency = <200000000>;
- disable-wp;
-
- mmc-pwrseq = <&emmc_pwrseq>;
- vmmc-supply = <&vddio_ao3v3>;
- vqmmc-supply = <&vddio_boot>;
-
- status = "okay";
-};
-
-&spifc {
- pinctrl-0 = <&nor_pins>;
- pinctrl-names = "default";
- status = "okay";
-
- gd25lq128: flash@0 {
- compatible = "jedec,spi-nor";
- #address-cells = <1>;
- #size-cells = <1>;
- reg = <0>;
- spi-max-frequency = <12000000>;
- };
-};
-
-&uart_AO {
- pinctrl-0 = <&uart_ao_a_pins>;
- pinctrl-names = "default";
- status = "okay";
-};
-
-&usb {
- status = "okay";
- dr_mode = "host";
-};
-
-&usb2_phy0 {
- pinctrl-0 = <&usb1_rst_pins>;
- pinctrl-names = "default";
- phy-supply = <&vcc5v>;
-};
-
-&usb2_phy1 {
- phy-supply = <&vcc5v>;
-};
diff --git a/arch/arm/dts/meson-gx-mali450.dtsi b/arch/arm/dts/meson-gx-mali450.dtsi
deleted file mode 100644
index f9771b5..0000000
--- a/arch/arm/dts/meson-gx-mali450.dtsi
+++ /dev/null
@@ -1,61 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2017 BayLibre SAS
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- */
-
-/ {
- gpu_opp_table: opp-table {
- compatible = "operating-points-v2";
-
- opp-125000000 {
- opp-hz = /bits/ 64 <125000000>;
- opp-microvolt = <950000>;
- };
- opp-250000000 {
- opp-hz = /bits/ 64 <250000000>;
- opp-microvolt = <950000>;
- };
- opp-285714285 {
- opp-hz = /bits/ 64 <285714285>;
- opp-microvolt = <950000>;
- };
- opp-400000000 {
- opp-hz = /bits/ 64 <400000000>;
- opp-microvolt = <950000>;
- };
- opp-500000000 {
- opp-hz = /bits/ 64 <500000000>;
- opp-microvolt = <950000>;
- };
- opp-666666666 {
- opp-hz = /bits/ 64 <666666666>;
- opp-microvolt = <950000>;
- };
- opp-744000000 {
- opp-hz = /bits/ 64 <744000000>;
- opp-microvolt = <950000>;
- };
- };
-};
-
-&apb {
- mali: gpu@c0000 {
- compatible = "arm,mali-450";
- reg = <0x0 0xc0000 0x0 0x40000>;
- interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "gp", "gpmmu", "pp", "pmu",
- "pp0", "ppmmu0", "pp1", "ppmmu1",
- "pp2", "ppmmu2";
- operating-points-v2 = <&gpu_opp_table>;
- };
-};
diff --git a/arch/arm/dts/meson-gx-p23x-q20x.dtsi b/arch/arm/dts/meson-gx-p23x-q20x.dtsi
deleted file mode 100644
index dafc841..0000000
--- a/arch/arm/dts/meson-gx-p23x-q20x.dtsi
+++ /dev/null
@@ -1,324 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2016 Endless Computers, Inc.
- * Author: Carlo Caione <carlo@endlessm.com>
- */
-
-/* Common DTSI for same Amlogic Q200/Q201 and P230/P231 boards using either
- * the pin-compatible S912 (GXM) or S905D (GXL) SoCs.
- */
-
-#include <dt-bindings/sound/meson-aiu.h>
-
-/ {
- aliases {
- serial0 = &uart_AO;
- ethernet0 = ðmac;
- };
-
- dio2133: analog-amplifier {
- compatible = "simple-audio-amplifier";
- sound-name-prefix = "AU2";
- VCC-supply = <&hdmi_5v>;
- enable-gpios = <&gpio GPIOH_5 GPIO_ACTIVE_HIGH>;
- };
-
- spdif_dit: audio-codec-0 {
- #sound-dai-cells = <0>;
- compatible = "linux,spdif-dit";
- status = "okay";
- sound-name-prefix = "DIT";
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- memory@0 {
- device_type = "memory";
- reg = <0x0 0x0 0x0 0x80000000>;
- };
-
- hdmi_5v: regulator-hdmi-5v {
- compatible = "regulator-fixed";
-
- regulator-name = "HDMI_5V";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
-
- gpio = <&gpio GPIOH_3 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- regulator-always-on;
- };
-
- vddio_ao18: regulator-vddio_ao18 {
- compatible = "regulator-fixed";
- regulator-name = "VDDIO_AO18";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- };
-
- vddio_boot: regulator-vddio_boot {
- compatible = "regulator-fixed";
- regulator-name = "VDDIO_BOOT";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- };
-
- vddao_3v3: regulator-vddao_3v3 {
- compatible = "regulator-fixed";
- regulator-name = "VDDAO_3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- };
-
- vcc_3v3: regulator-vcc_3v3 {
- compatible = "regulator-fixed";
- regulator-name = "VCC_3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- };
-
- emmc_pwrseq: emmc-pwrseq {
- compatible = "mmc-pwrseq-emmc";
- reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
- };
-
- wifi32k: wifi32k {
- compatible = "pwm-clock";
- #clock-cells = <0>;
- clock-frequency = <32768>;
- pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
- };
-
- sdio_pwrseq: sdio-pwrseq {
- compatible = "mmc-pwrseq-simple";
- reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
- clocks = <&wifi32k>;
- clock-names = "ext_clock";
- };
-
- cvbs-connector {
- compatible = "composite-video-connector";
-
- port {
- cvbs_connector_in: endpoint {
- remote-endpoint = <&cvbs_vdac_out>;
- };
- };
- };
-
- hdmi-connector {
- compatible = "hdmi-connector";
- type = "a";
-
- port {
- hdmi_connector_in: endpoint {
- remote-endpoint = <&hdmi_tx_tmds_out>;
- };
- };
- };
-
- sound {
- compatible = "amlogic,gx-sound-card";
- model = "P230-Q200";
- audio-aux-devs = <&dio2133>;
- audio-widgets = "Line", "Lineout";
- audio-routing = "AU2 INL", "ACODEC LOLP",
- "AU2 INR", "ACODEC LORP",
- "AU2 INL", "ACODEC LOLN",
- "AU2 INR", "ACODEC LORN",
- "Lineout", "AU2 OUTL",
- "Lineout", "AU2 OUTR";
- assigned-clocks = <&clkc CLKID_MPLL0>,
- <&clkc CLKID_MPLL1>,
- <&clkc CLKID_MPLL2>;
- assigned-clock-parents = <0>, <0>, <0>;
- assigned-clock-rates = <294912000>,
- <270950400>,
- <393216000>;
- status = "okay";
-
- dai-link-0 {
- sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>;
- };
-
- dai-link-1 {
- sound-dai = <&aiu AIU_CPU CPU_SPDIF_FIFO>;
- };
-
- dai-link-2 {
- sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>;
- dai-format = "i2s";
- mclk-fs = <256>;
-
- codec-0 {
- sound-dai = <&aiu AIU_HDMI CTRL_I2S>;
- };
-
- codec-1 {
- sound-dai = <&aiu AIU_ACODEC CTRL_I2S>;
- };
- };
-
- dai-link-3 {
- sound-dai = <&aiu AIU_CPU CPU_SPDIF_ENCODER>;
-
- codec-0 {
- sound-dai = <&spdif_dit>;
- };
- };
-
- dai-link-4 {
- sound-dai = <&aiu AIU_HDMI CTRL_OUT>;
-
- codec-0 {
- sound-dai = <&hdmi_tx>;
- };
- };
-
- dai-link-5 {
- sound-dai = <&aiu AIU_ACODEC CTRL_OUT>;
-
- codec-0 {
- sound-dai = <&acodec>;
- };
- };
- };
-};
-
-&acodec {
- AVDD-supply = <&vddio_ao18>;
- status = "okay";
-};
-
-&aiu {
- status = "okay";
- pinctrl-0 = <&spdif_out_h_pins>;
- pinctrl-names = "default";
-
-};
-
-&cec_AO {
- status = "okay";
- pinctrl-0 = <&ao_cec_pins>;
- pinctrl-names = "default";
- hdmi-phandle = <&hdmi_tx>;
-};
-
-&cvbs_vdac_port {
- cvbs_vdac_out: endpoint {
- remote-endpoint = <&cvbs_connector_in>;
- };
-};
-
-ðmac {
- status = "okay";
-};
-
-&hdmi_tx {
- status = "okay";
- pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>;
- pinctrl-names = "default";
- hdmi-supply = <&hdmi_5v>;
-};
-
-&hdmi_tx_tmds_port {
- hdmi_tx_tmds_out: endpoint {
- remote-endpoint = <&hdmi_connector_in>;
- };
-};
-
-&ir {
- status = "okay";
- pinctrl-0 = <&remote_input_ao_pins>;
- pinctrl-names = "default";
-};
-
-&pwm_ef {
- status = "okay";
- pinctrl-0 = <&pwm_e_pins>;
- pinctrl-names = "default";
- clocks = <&clkc CLKID_FCLK_DIV4>;
- clock-names = "clkin0";
-};
-
-&saradc {
- status = "okay";
- vref-supply = <&vddio_ao18>;
-};
-
-/* Wireless SDIO Module */
-&sd_emmc_a {
- status = "okay";
- pinctrl-0 = <&sdio_pins>;
- pinctrl-1 = <&sdio_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
- #address-cells = <1>;
- #size-cells = <0>;
-
- bus-width = <4>;
- cap-sd-highspeed;
- max-frequency = <50000000>;
-
- non-removable;
- disable-wp;
-
- /* WiFi firmware requires power to be kept while in suspend */
- keep-power-in-suspend;
-
- mmc-pwrseq = <&sdio_pwrseq>;
-
- vmmc-supply = <&vddao_3v3>;
- vqmmc-supply = <&vddio_boot>;
-};
-
-/* SD card */
-&sd_emmc_b {
- status = "okay";
- pinctrl-0 = <&sdcard_pins>;
- pinctrl-1 = <&sdcard_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <4>;
- cap-sd-highspeed;
- max-frequency = <50000000>;
- disable-wp;
-
- cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>;
-
- vmmc-supply = <&vddao_3v3>;
- vqmmc-supply = <&vddio_boot>;
-};
-
-/* eMMC */
-&sd_emmc_c {
- status = "okay";
- pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>;
- pinctrl-1 = <&emmc_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <8>;
- cap-mmc-highspeed;
- max-frequency = <200000000>;
- non-removable;
- disable-wp;
- mmc-ddr-1_8v;
- mmc-hs200-1_8v;
-
- mmc-pwrseq = <&emmc_pwrseq>;
- vmmc-supply = <&vcc_3v3>;
- vqmmc-supply = <&vddio_boot>;
-};
-
-/* This UART is brought out to the DB9 connector */
-&uart_AO {
- status = "okay";
- pinctrl-0 = <&uart_ao_a_pins>;
- pinctrl-names = "default";
-};
-
-&usb {
- status = "okay";
- dr_mode = "otg";
-};
diff --git a/arch/arm/dts/meson-gx.dtsi b/arch/arm/dts/meson-gx.dtsi
deleted file mode 100644
index 11f89bf..0000000
--- a/arch/arm/dts/meson-gx.dtsi
+++ /dev/null
@@ -1,675 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2016 Andreas Färber
- *
- * Copyright (c) 2016 BayLibre, SAS.
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- *
- * Copyright (c) 2016 Endless Computers, Inc.
- * Author: Carlo Caione <carlo@endlessm.com>
- */
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/interrupt-controller/irq.h>
-#include <dt-bindings/interrupt-controller/arm-gic.h>
-#include <dt-bindings/power/meson-gxbb-power.h>
-#include <dt-bindings/thermal/thermal.h>
-
-/ {
- interrupt-parent = <&gic>;
- #address-cells = <2>;
- #size-cells = <2>;
-
- aliases {
- mmc0 = &sd_emmc_b; /* SD card */
- mmc1 = &sd_emmc_c; /* eMMC */
- mmc2 = &sd_emmc_a; /* SDIO */
- };
-
- reserved-memory {
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- /* 16 MiB reserved for Hardware ROM Firmware */
- hwrom_reserved: hwrom@0 {
- reg = <0x0 0x0 0x0 0x1000000>;
- no-map;
- };
-
- /* 2 MiB reserved for ARM Trusted Firmware (BL31) */
- secmon_reserved: secmon@10000000 {
- reg = <0x0 0x10000000 0x0 0x200000>;
- no-map;
- };
-
- /* Alternate 3 MiB reserved for ARM Trusted Firmware (BL31) */
- secmon_reserved_alt: secmon@5000000 {
- reg = <0x0 0x05000000 0x0 0x300000>;
- no-map;
- };
-
- /* 32 MiB reserved for ARM Trusted Firmware (BL32) */
- secmon_reserved_bl32: secmon@5300000 {
- reg = <0x0 0x05300000 0x0 0x2000000>;
- no-map;
- };
-
- linux,cma {
- compatible = "shared-dma-pool";
- reusable;
- size = <0x0 0x10000000>;
- alignment = <0x0 0x400000>;
- linux,cma-default;
- };
- };
-
- chosen {
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- simplefb_cvbs: framebuffer-cvbs {
- compatible = "amlogic,simple-framebuffer",
- "simple-framebuffer";
- amlogic,pipeline = "vpu-cvbs";
- power-domains = <&pwrc PWRC_GXBB_VPU_ID>;
- status = "disabled";
- };
-
- simplefb_hdmi: framebuffer-hdmi {
- compatible = "amlogic,simple-framebuffer",
- "simple-framebuffer";
- amlogic,pipeline = "vpu-hdmi";
- power-domains = <&pwrc PWRC_GXBB_VPU_ID>;
- status = "disabled";
- };
- };
-
- cpus {
- #address-cells = <0x2>;
- #size-cells = <0x0>;
-
- cpu0: cpu@0 {
- device_type = "cpu";
- compatible = "arm,cortex-a53";
- reg = <0x0 0x0>;
- enable-method = "psci";
- next-level-cache = <&l2>;
- clocks = <&scpi_dvfs 0>;
- #cooling-cells = <2>;
- };
-
- cpu1: cpu@1 {
- device_type = "cpu";
- compatible = "arm,cortex-a53";
- reg = <0x0 0x1>;
- enable-method = "psci";
- next-level-cache = <&l2>;
- clocks = <&scpi_dvfs 0>;
- #cooling-cells = <2>;
- };
-
- cpu2: cpu@2 {
- device_type = "cpu";
- compatible = "arm,cortex-a53";
- reg = <0x0 0x2>;
- enable-method = "psci";
- next-level-cache = <&l2>;
- clocks = <&scpi_dvfs 0>;
- #cooling-cells = <2>;
- };
-
- cpu3: cpu@3 {
- device_type = "cpu";
- compatible = "arm,cortex-a53";
- reg = <0x0 0x3>;
- enable-method = "psci";
- next-level-cache = <&l2>;
- clocks = <&scpi_dvfs 0>;
- #cooling-cells = <2>;
- };
-
- l2: l2-cache0 {
- compatible = "cache";
- cache-level = <2>;
- };
- };
-
- thermal-zones {
- cpu-thermal {
- polling-delay-passive = <250>; /* milliseconds */
- polling-delay = <1000>; /* milliseconds */
-
- thermal-sensors = <&scpi_sensors 0>;
-
- trips {
- cpu_passive: cpu-passive {
- temperature = <80000>; /* millicelsius */
- hysteresis = <2000>; /* millicelsius */
- type = "passive";
- };
-
- cpu_hot: cpu-hot {
- temperature = <90000>; /* millicelsius */
- hysteresis = <2000>; /* millicelsius */
- type = "hot";
- };
-
- cpu_critical: cpu-critical {
- temperature = <110000>; /* millicelsius */
- hysteresis = <2000>; /* millicelsius */
- type = "critical";
- };
- };
-
- cpu_cooling_maps: cooling-maps {
- map0 {
- trip = <&cpu_passive>;
- cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- };
-
- map1 {
- trip = <&cpu_hot>;
- cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- };
- };
- };
- };
-
- arm-pmu {
- compatible = "arm,cortex-a53-pmu";
- interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
- };
-
- psci {
- compatible = "arm,psci-0.2";
- method = "smc";
- };
-
- timer {
- compatible = "arm,armv8-timer";
- interrupts = <GIC_PPI 13
- (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 14
- (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 11
- (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 10
- (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>;
- };
-
- xtal: xtal-clk {
- compatible = "fixed-clock";
- clock-frequency = <24000000>;
- clock-output-names = "xtal";
- #clock-cells = <0>;
- };
-
- firmware {
- sm: secure-monitor {
- compatible = "amlogic,meson-gx-sm", "amlogic,meson-gxbb-sm";
- };
- };
-
- efuse: efuse {
- compatible = "amlogic,meson-gx-efuse", "amlogic,meson-gxbb-efuse";
- #address-cells = <1>;
- #size-cells = <1>;
- read-only;
- secure-monitor = <&sm>;
-
- sn: sn@14 {
- reg = <0x14 0x10>;
- };
-
- eth_mac: eth-mac@34 {
- reg = <0x34 0x10>;
- };
-
- bid: bid@46 {
- reg = <0x46 0x30>;
- };
- };
-
- scpi {
- compatible = "amlogic,meson-gxbb-scpi", "arm,scpi-pre-1.0";
- mboxes = <&mailbox 1 &mailbox 2>;
- shmem = <&cpu_scp_lpri &cpu_scp_hpri>;
-
- scpi_clocks: clocks {
- compatible = "arm,scpi-clocks";
-
- scpi_dvfs: clocks-0 {
- compatible = "arm,scpi-dvfs-clocks";
- #clock-cells = <1>;
- clock-indices = <0>;
- clock-output-names = "vcpu";
- };
- };
-
- scpi_sensors: sensors {
- compatible = "amlogic,meson-gxbb-scpi-sensors", "arm,scpi-sensors";
- #thermal-sensor-cells = <1>;
- };
- };
-
- soc {
- compatible = "simple-bus";
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- cbus: bus@c1100000 {
- compatible = "simple-bus";
- reg = <0x0 0xc1100000 0x0 0x100000>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges = <0x0 0x0 0x0 0xc1100000 0x0 0x100000>;
-
- gpio_intc: interrupt-controller@9880 {
- compatible = "amlogic,meson-gpio-intc";
- reg = <0x0 0x9880 0x0 0x10>;
- interrupt-controller;
- #interrupt-cells = <2>;
- amlogic,channel-interrupts = <64 65 66 67 68 69 70 71>;
- status = "disabled";
- };
-
- reset: reset-controller@4404 {
- compatible = "amlogic,meson-gxbb-reset";
- reg = <0x0 0x04404 0x0 0x9c>;
- #reset-cells = <1>;
- };
-
- aiu: audio-controller@5400 {
- compatible = "amlogic,aiu";
- #sound-dai-cells = <2>;
- sound-name-prefix = "AIU";
- reg = <0x0 0x5400 0x0 0x2ac>;
- interrupts = <GIC_SPI 48 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 50 IRQ_TYPE_EDGE_RISING>;
- interrupt-names = "i2s", "spdif";
- status = "disabled";
- };
-
- uart_A: serial@84c0 {
- compatible = "amlogic,meson-gx-uart";
- reg = <0x0 0x84c0 0x0 0x18>;
- interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>;
- status = "disabled";
- fifo-size = <128>;
- };
-
- uart_B: serial@84dc {
- compatible = "amlogic,meson-gx-uart";
- reg = <0x0 0x84dc 0x0 0x18>;
- interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>;
- status = "disabled";
- };
-
- i2c_A: i2c@8500 {
- compatible = "amlogic,meson-gxbb-i2c";
- reg = <0x0 0x08500 0x0 0x20>;
- interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- pwm_ab: pwm@8550 {
- compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
- reg = <0x0 0x08550 0x0 0x10>;
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- pwm_cd: pwm@8650 {
- compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
- reg = <0x0 0x08650 0x0 0x10>;
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- saradc: adc@8680 {
- compatible = "amlogic,meson-saradc";
- reg = <0x0 0x8680 0x0 0x34>;
- #io-channel-cells = <1>;
- interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>;
- status = "disabled";
- };
-
- pwm_ef: pwm@86c0 {
- compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
- reg = <0x0 0x086c0 0x0 0x10>;
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- uart_C: serial@8700 {
- compatible = "amlogic,meson-gx-uart";
- reg = <0x0 0x8700 0x0 0x18>;
- interrupts = <GIC_SPI 93 IRQ_TYPE_EDGE_RISING>;
- status = "disabled";
- };
-
- clock-measure@8758 {
- compatible = "amlogic,meson-gx-clk-measure";
- reg = <0x0 0x8758 0x0 0x10>;
- };
-
- i2c_B: i2c@87c0 {
- compatible = "amlogic,meson-gxbb-i2c";
- reg = <0x0 0x087c0 0x0 0x20>;
- interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- i2c_C: i2c@87e0 {
- compatible = "amlogic,meson-gxbb-i2c";
- reg = <0x0 0x087e0 0x0 0x20>;
- interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- spicc: spi@8d80 {
- compatible = "amlogic,meson-gx-spicc";
- reg = <0x0 0x08d80 0x0 0x80>;
- interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- spifc: spi@8c80 {
- compatible = "amlogic,meson-gxbb-spifc";
- reg = <0x0 0x08c80 0x0 0x80>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- watchdog@98d0 {
- compatible = "amlogic,meson-gxbb-wdt";
- reg = <0x0 0x098d0 0x0 0x10>;
- clocks = <&xtal>;
- };
- };
-
- gic: interrupt-controller@c4301000 {
- compatible = "arm,gic-400";
- reg = <0x0 0xc4301000 0 0x1000>,
- <0x0 0xc4302000 0 0x2000>,
- <0x0 0xc4304000 0 0x2000>,
- <0x0 0xc4306000 0 0x2000>;
- interrupt-controller;
- interrupts = <GIC_PPI 9
- (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
- #interrupt-cells = <3>;
- #address-cells = <0>;
- };
-
- sram: sram@c8000000 {
- compatible = "mmio-sram";
- reg = <0x0 0xc8000000 0x0 0x14000>;
-
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0 0x0 0xc8000000 0x14000>;
-
- cpu_scp_lpri: scp-sram@0 {
- compatible = "amlogic,meson-gxbb-scp-shmem";
- reg = <0x13000 0x400>;
- };
-
- cpu_scp_hpri: scp-sram@200 {
- compatible = "amlogic,meson-gxbb-scp-shmem";
- reg = <0x13400 0x400>;
- };
- };
-
- aobus: bus@c8100000 {
- compatible = "simple-bus";
- reg = <0x0 0xc8100000 0x0 0x100000>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges = <0x0 0x0 0x0 0xc8100000 0x0 0x100000>;
-
- sysctrl_AO: sys-ctrl@0 {
- compatible = "amlogic,meson-gx-ao-sysctrl", "simple-mfd", "syscon";
- reg = <0x0 0x0 0x0 0x100>;
-
- clkc_AO: clock-controller {
- compatible = "amlogic,meson-gx-aoclkc";
- #clock-cells = <1>;
- #reset-cells = <1>;
- };
- };
-
- cec_AO: cec@100 {
- compatible = "amlogic,meson-gx-ao-cec";
- reg = <0x0 0x00100 0x0 0x14>;
- interrupts = <GIC_SPI 199 IRQ_TYPE_EDGE_RISING>;
- status = "disabled";
- };
-
- sec_AO: ao-secure@140 {
- compatible = "amlogic,meson-gx-ao-secure", "syscon";
- reg = <0x0 0x140 0x0 0x140>;
- amlogic,has-chip-id;
- };
-
- uart_AO: serial@4c0 {
- compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart";
- reg = <0x0 0x004c0 0x0 0x18>;
- interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>;
- status = "disabled";
- };
-
- uart_AO_B: serial@4e0 {
- compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart";
- reg = <0x0 0x004e0 0x0 0x18>;
- interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>;
- status = "disabled";
- };
-
- i2c_AO: i2c@500 {
- compatible = "amlogic,meson-gxbb-i2c";
- reg = <0x0 0x500 0x0 0x20>;
- interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- pwm_AO_ab: pwm@550 {
- compatible = "amlogic,meson-gx-ao-pwm", "amlogic,meson-gxbb-ao-pwm";
- reg = <0x0 0x00550 0x0 0x10>;
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- ir: ir@580 {
- compatible = "amlogic,meson-gx-ir", "amlogic,meson-gxbb-ir";
- reg = <0x0 0x00580 0x0 0x40>;
- interrupts = <GIC_SPI 196 IRQ_TYPE_EDGE_RISING>;
- status = "disabled";
- };
- };
-
- vdec: video-codec@c8820000 {
- compatible = "amlogic,gx-vdec";
- reg = <0x0 0xc8820000 0x0 0x10000>,
- <0x0 0xc110a580 0x0 0xe4>;
- reg-names = "dos", "esparser";
-
- interrupts = <GIC_SPI 44 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 32 IRQ_TYPE_EDGE_RISING>;
- interrupt-names = "vdec", "esparser";
-
- amlogic,ao-sysctrl = <&sysctrl_AO>;
- amlogic,canvas = <&canvas>;
- };
-
- periphs: bus@c8834000 {
- compatible = "simple-bus";
- reg = <0x0 0xc8834000 0x0 0x2000>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges = <0x0 0x0 0x0 0xc8834000 0x0 0x2000>;
-
- hwrng: rng@0 {
- compatible = "amlogic,meson-rng";
- reg = <0x0 0x0 0x0 0x4>;
- };
- };
-
- dmcbus: bus@c8838000 {
- compatible = "simple-bus";
- reg = <0x0 0xc8838000 0x0 0x400>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges = <0x0 0x0 0x0 0xc8838000 0x0 0x400>;
-
- canvas: video-lut@48 {
- compatible = "amlogic,canvas";
- reg = <0x0 0x48 0x0 0x14>;
- };
- };
-
- hiubus: bus@c883c000 {
- compatible = "simple-bus";
- reg = <0x0 0xc883c000 0x0 0x2000>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges = <0x0 0x0 0x0 0xc883c000 0x0 0x2000>;
-
- sysctrl: system-controller@0 {
- compatible = "amlogic,meson-gx-hhi-sysctrl", "simple-mfd", "syscon";
- reg = <0 0 0 0x400>;
-
- pwrc: power-controller {
- compatible = "amlogic,meson-gxbb-pwrc";
- #power-domain-cells = <1>;
- amlogic,ao-sysctrl = <&sysctrl_AO>;
- };
- };
-
- mailbox: mailbox@404 {
- compatible = "amlogic,meson-gxbb-mhu";
- reg = <0 0x404 0 0x4c>;
- interrupts = <GIC_SPI 208 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 209 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 210 IRQ_TYPE_EDGE_RISING>;
- #mbox-cells = <1>;
- };
- };
-
- ethmac: ethernet@c9410000 {
- compatible = "amlogic,meson-gxbb-dwmac",
- "snps,dwmac-3.70a",
- "snps,dwmac";
- reg = <0x0 0xc9410000 0x0 0x10000>,
- <0x0 0xc8834540 0x0 0x4>;
- interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "macirq";
- rx-fifo-depth = <4096>;
- tx-fifo-depth = <2048>;
- power-domains = <&pwrc PWRC_GXBB_ETHERNET_MEM_ID>;
- status = "disabled";
- };
-
- apb: apb@d0000000 {
- compatible = "simple-bus";
- reg = <0x0 0xd0000000 0x0 0x200000>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges = <0x0 0x0 0x0 0xd0000000 0x0 0x200000>;
-
- sd_emmc_a: mmc@70000 {
- compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc";
- reg = <0x0 0x70000 0x0 0x800>;
- interrupts = <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>;
- status = "disabled";
- };
-
- sd_emmc_b: mmc@72000 {
- compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc";
- reg = <0x0 0x72000 0x0 0x800>;
- interrupts = <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>;
- status = "disabled";
- };
-
- sd_emmc_c: mmc@74000 {
- compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc";
- reg = <0x0 0x74000 0x0 0x800>;
- interrupts = <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>;
- status = "disabled";
- };
- };
-
- vpu: vpu@d0100000 {
- compatible = "amlogic,meson-gx-vpu";
- reg = <0x0 0xd0100000 0x0 0x100000>,
- <0x0 0xc883c000 0x0 0x1000>;
- reg-names = "vpu", "hhi";
- interrupts = <GIC_SPI 3 IRQ_TYPE_EDGE_RISING>;
- #address-cells = <1>;
- #size-cells = <0>;
- amlogic,canvas = <&canvas>;
-
- /* CVBS VDAC output port */
- cvbs_vdac_port: port@0 {
- reg = <0>;
- };
-
- /* HDMI-TX output port */
- hdmi_tx_port: port@1 {
- reg = <1>;
-
- hdmi_tx_out: endpoint {
- remote-endpoint = <&hdmi_tx_in>;
- };
- };
- };
-
- hdmi_tx: hdmi-tx@c883a000 {
- compatible = "amlogic,meson-gx-dw-hdmi";
- reg = <0x0 0xc883a000 0x0 0x1c>;
- interrupts = <GIC_SPI 57 IRQ_TYPE_EDGE_RISING>;
- #address-cells = <1>;
- #size-cells = <0>;
- #sound-dai-cells = <0>;
- sound-name-prefix = "HDMITX";
- status = "disabled";
-
- /* VPU VENC Input */
- hdmi_tx_venc_port: port@0 {
- reg = <0>;
-
- hdmi_tx_in: endpoint {
- remote-endpoint = <&hdmi_tx_out>;
- };
- };
-
- /* TMDS Output */
- hdmi_tx_tmds_port: port@1 {
- reg = <1>;
- };
- };
- };
-};
diff --git a/arch/arm/dts/meson-gxl-mali.dtsi b/arch/arm/dts/meson-gxl-mali.dtsi
deleted file mode 100644
index 478e755..0000000
--- a/arch/arm/dts/meson-gxl-mali.dtsi
+++ /dev/null
@@ -1,17 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2017 BayLibre SAS
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- */
-
-#include "meson-gx-mali450.dtsi"
-
-&mali {
- compatible = "amlogic,meson-gxl-mali", "arm,mali-450";
-
- clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_MALI>;
- clock-names = "bus", "core";
-
- assigned-clocks = <&clkc CLKID_GP0_PLL>;
- assigned-clock-rates = <744000000>;
-};
diff --git a/arch/arm/dts/meson-gxl-s805x-libretech-ac.dts b/arch/arm/dts/meson-gxl-s805x-libretech-ac.dts
deleted file mode 100644
index 213a070..0000000
--- a/arch/arm/dts/meson-gxl-s805x-libretech-ac.dts
+++ /dev/null
@@ -1,319 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2018 BayLibre, SAS.
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- * Author: Jerome Brunet <jbrunet@baylibre.com>
- */
-
-/dts-v1/;
-
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/sound/meson-aiu.h>
-
-#include "meson-gxl-s805x.dtsi"
-
-/ {
- compatible = "libretech,aml-s805x-ac", "amlogic,s805x",
- "amlogic,meson-gxl";
- model = "Libre Computer AML-S805X-AC";
-
- aliases {
- serial0 = &uart_AO;
- ethernet0 = ðmac;
- spi0 = &spifc;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- cvbs-connector {
- /*
- * The pads are present but no connector is soldered on
- * 2J2, so keep this off by default.
- */
- status = "disabled";
- compatible = "composite-video-connector";
-
- port {
- cvbs_connector_in: endpoint {
- remote-endpoint = <&cvbs_vdac_out>;
- };
- };
- };
-
- dc_5v: regulator-dc_5v {
- compatible = "regulator-fixed";
- regulator-name = "DC_5V";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- regulator-always-on;
- };
-
- emmc_pwrseq: emmc-pwrseq {
- compatible = "mmc-pwrseq-emmc";
- reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
- };
-
- hdmi-connector {
- compatible = "hdmi-connector";
- type = "a";
-
- port {
- hdmi_connector_in: endpoint {
- remote-endpoint = <&hdmi_tx_tmds_out>;
- };
- };
- };
-
- memory@0 {
- device_type = "memory";
- reg = <0x0 0x0 0x0 0x20000000>;
- };
-
- vcck: regulator-vcck {
- compatible = "regulator-fixed";
- regulator-name = "VCCK";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&dc_5v>;
-
- /*
- * This is controlled by GPIOAO_9 we reserve this but
- * claiming it as done below reset the board anyway
- * Need to investigate this
- *
- * gpio = <&gpio_ao GPIOAO_9 GPIO_ACTIVE_HIGH>;
- * enable-active-high;
- */
- regulator-always-on;
- };
-
- vcc_3v3: regulator-vcc_3v3 {
- compatible = "regulator-fixed";
- regulator-name = "VCC_3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&dc_5v>;
- regulator-always-on;
- };
-
- vddio_ao18: regulator-vddio_ao18 {
- compatible = "regulator-fixed";
- regulator-name = "VDDIO_AO18";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vcc_3v3>;
- regulator-always-on;
- };
-
- vddio_boot: regulator-vddio_boot {
- compatible = "regulator-fixed";
- regulator-name = "VDDIO_BOOT";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vcc_3v3>;
- regulator-always-on;
- };
-
- sound {
- compatible = "amlogic,gx-sound-card";
- model = "LIBRETECH-AC";
- audio-widgets = "Speaker", "9J5-3 LEFT",
- "Speaker", "9J5-2 RIGHT";
- audio-routing = "9J5-3 LEFT", "ACODEC LOLN",
- "9J5-2 RIGHT", "ACODEC LORN";
- assigned-clocks = <&clkc CLKID_MPLL0>,
- <&clkc CLKID_MPLL1>,
- <&clkc CLKID_MPLL2>;
- assigned-clock-parents = <0>, <0>, <0>;
- assigned-clock-rates = <294912000>,
- <270950400>,
- <393216000>;
- status = "okay";
-
- dai-link-0 {
- sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>;
- };
-
- dai-link-1 {
- sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>;
- dai-format = "i2s";
- mclk-fs = <256>;
-
- codec-0 {
- sound-dai = <&aiu AIU_HDMI CTRL_I2S>;
- };
-
- codec-1 {
- sound-dai = <&aiu AIU_ACODEC CTRL_I2S>;
- };
- };
-
- dai-link-2 {
- sound-dai = <&aiu AIU_HDMI CTRL_OUT>;
-
- codec-0 {
- sound-dai = <&hdmi_tx>;
- };
- };
-
- dai-link-3 {
- sound-dai = <&aiu AIU_ACODEC CTRL_OUT>;
-
- codec-0 {
- sound-dai = <&acodec>;
- };
- };
- };
-};
-
-&acodec {
- AVDD-supply = <&vddio_ao18>;
- status = "okay";
-};
-
-&aiu {
- status = "okay";
-};
-
-&cec_AO {
- status = "okay";
- pinctrl-0 = <&ao_cec_pins>;
- pinctrl-names = "default";
- hdmi-phandle = <&hdmi_tx>;
-};
-
-&cvbs_vdac_port {
- cvbs_vdac_out: endpoint {
- remote-endpoint = <&cvbs_connector_in>;
- };
-};
-
-ðmac {
- status = "okay";
-};
-
-&internal_phy {
- pinctrl-0 = <ð_link_led_pins>, <ð_act_led_pins>;
- pinctrl-names = "default";
-};
-
-&ir {
- status = "okay";
- pinctrl-0 = <&remote_input_ao_pins>;
- pinctrl-names = "default";
-};
-
-&hdmi_tx {
- status = "okay";
- pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>;
- pinctrl-names = "default";
-};
-
-&hdmi_tx_tmds_port {
- hdmi_tx_tmds_out: endpoint {
- remote-endpoint = <&hdmi_connector_in>;
- };
-};
-
-&gpio_ao {
- gpio-line-names = "UART TX",
- "UART RX",
- "7J1 Header Pin31",
- "", "", "", "",
- "IR In",
- "HDMI CEC",
- "5V VCCK Regulator",
- /* GPIO_TEST_N */
- "";
-};
-
-&gpio {
- gpio-line-names = /* Bank GPIOZ */
- "", "", "", "", "", "", "",
- "", "", "", "", "", "", "",
- "Eth Link LED", "Eth Activity LED",
- /* Bank GPIOH */
- "HDMI HPD", "HDMI SDA", "HDMI SCL",
- "", "7J1 Header Pin13",
- "7J1 Header Pin15",
- "7J1 Header Pin7",
- "7J1 Header Pin12",
- "7J1 Header Pin16",
- "7J1 Header Pin18",
- /* Bank BOOT */
- "eMMC D0", "eMMC D1", "eMMC D2", "eMMC D3",
- "eMMC D4", "eMMC D5", "eMMC D6", "eMMC D7",
- "eMMC Clk", "eMMC Reset", "eMMC CMD",
- "SPI NOR MOSI", "SPI NOR MISO", "SPI NOR Clk",
- "", "SPI NOR Chip Select",
- /* Bank CARD */
- "", "", "", "", "", "", "",
- /* Bank GPIODV */
- "", "", "", "", "", "", "", "", "", "", "", "",
- "", "", "", "", "", "", "", "", "", "", "", "",
- "7J1 Header Pin27", "7J1 Header Pin28", "",
- "7J1 Header Pin29",
- "VCCK Regulator", "VDDEE Regulator",
- /* Bank GPIOX */
- "7J1 Header Pin22", "7J1 Header Pin26",
- "7J1 Header Pin36", "7J1 Header Pin38",
- "7J1 Header Pin40", "7J1 Header Pin37",
- "7J1 Header Pin33", "7J1 Header Pin35",
- "7J1 Header Pin19", "7J1 Header Pin21",
- "7J1 Header Pin24", "7J1 Header Pin23",
- "7J1 Header Pin8", "7J1 Header Pin10",
- "", "", "7J1 Header Pin32", "", "",
- /* Bank GPIOCLK */
- "", "";
-};
-
-&saradc {
- status = "okay";
- vref-supply = <&vddio_boot>;
-};
-
-/* eMMC */
-&sd_emmc_c {
- status = "okay";
- pinctrl-0 = <&emmc_pins>;
- pinctrl-1 = <&emmc_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <8>;
- cap-mmc-highspeed;
- mmc-ddr-1_8v;
- mmc-hs200-1_8v;
- max-frequency = <200000000>;
- disable-wp;
-
- mmc-pwrseq = <&emmc_pwrseq>;
- vmmc-supply = <&vcc_3v3>;
- vqmmc-supply = <&vddio_boot>;
-};
-
-&spifc {
- status = "okay";
- pinctrl-0 = <&nor_pins>;
- pinctrl-names = "default";
-
- w25q32: flash@0 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "jedec,spi-nor";
- reg = <0>;
- spi-max-frequency = <3000000>;
- };
-};
-
-&uart_AO {
- status = "okay";
- pinctrl-0 = <&uart_ao_a_pins>;
- pinctrl-names = "default";
-};
-
-&usb {
- status = "okay";
- dr_mode = "host";
-};
diff --git a/arch/arm/dts/meson-gxl-s805x.dtsi b/arch/arm/dts/meson-gxl-s805x.dtsi
deleted file mode 100644
index 2997584..0000000
--- a/arch/arm/dts/meson-gxl-s805x.dtsi
+++ /dev/null
@@ -1,23 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2020 BayLibre SAS
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- */
-
-#include "meson-gxl-s905x.dtsi"
-
-/ {
- compatible = "amlogic,s805x", "amlogic,meson-gxl";
-};
-
-/* The S805X Package doesn't seem to handle the 744MHz OPP correctly */
-&gpu_opp_table {
- opp-744000000 {
- status = "disabled";
- };
-};
-
-&mali {
- /delete-property/ assigned-clocks;
- /delete-property/ assigned-clock-rates;
-};
diff --git a/arch/arm/dts/meson-gxl-s905d-libretech-pc.dts b/arch/arm/dts/meson-gxl-s905d-libretech-pc.dts
deleted file mode 100644
index 100a1cf..0000000
--- a/arch/arm/dts/meson-gxl-s905d-libretech-pc.dts
+++ /dev/null
@@ -1,16 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Copyright (c) 2019 BayLibre SAS. All rights reserved.
- * Author: Jerome Brunet <jbrunet@baylibre.com>
- */
-
-/dts-v1/;
-
-#include "meson-gxl-s905d.dtsi"
-#include "meson-gx-libretech-pc.dtsi"
-
-/ {
- compatible = "libretech,aml-s905d-pc", "amlogic,s905d",
- "amlogic,meson-gxl";
- model = "Libre Computer AML-S905D-PC";
-};
diff --git a/arch/arm/dts/meson-gxl-s905d.dtsi b/arch/arm/dts/meson-gxl-s905d.dtsi
deleted file mode 100644
index 4332191..0000000
--- a/arch/arm/dts/meson-gxl-s905d.dtsi
+++ /dev/null
@@ -1,12 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2016 Endless Computers, Inc.
- * Author: Carlo Caione <carlo@endlessm.com>
- */
-
-#include "meson-gxl.dtsi"
-#include "meson-gxl-mali.dtsi"
-
-/ {
- compatible = "amlogic,s905d", "amlogic,meson-gxl";
-};
diff --git a/arch/arm/dts/meson-gxl-s905w-jethome-jethub-j80.dts b/arch/arm/dts/meson-gxl-s905w-jethome-jethub-j80.dts
deleted file mode 100644
index a18d6d2..0000000
--- a/arch/arm/dts/meson-gxl-s905w-jethome-jethub-j80.dts
+++ /dev/null
@@ -1,247 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2021 Vyacheslav Bocharov <adeep@lexina.in>
- * Copyright (c) 2020 JetHome
- * Author: Aleksandr Kazantsev <ak@tvip.ru>
- * Author: Alexey Shevelkin <ash@tvip.ru>
- * Author: Vyacheslav Bocharov <adeep@lexina.in>
- */
-
-/dts-v1/;
-
-#include "meson-gxl.dtsi"
-
-/ {
- compatible = "jethome,jethub-j80", "amlogic,s905w", "amlogic,meson-gxl";
- model = "JetHome JetHub J80";
- memory@0 {
- device_type = "memory";
- reg = <0x0 0x0 0x0 0x40000000>;
- };
-
- reserved-memory {
- linux,cma {
- size = <0x0 0x1000000>;
- };
- };
-
- aliases {
- serial0 = &uart_AO; /* Console */
- serial1 = &uart_A; /* Bluetooth */
- serial2 = &uart_AO_B; /* Wireless module 1 */
- serial3 = &uart_C; /* Wireless module 2 */
- ethernet0 = ðmac;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- vddio_ao18: regulator-vddio_ao18 {
- compatible = "regulator-fixed";
- regulator-name = "VDDIO_AO18";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- };
-
- vddio_boot: regulator-vddio_boot {
- compatible = "regulator-fixed";
- regulator-name = "VDDIO_BOOT";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- };
-
- vddao_3v3: regulator-vddao_3v3 {
- compatible = "regulator-fixed";
- regulator-name = "VDDAO_3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- };
-
- vcc_3v3: regulator-vcc_3v3 {
- compatible = "regulator-fixed";
- regulator-name = "VCC_3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- };
-
- emmc_pwrseq: emmc-pwrseq {
- compatible = "mmc-pwrseq-emmc";
- reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
- };
-
- wifi32k: wifi32k {
- compatible = "pwm-clock";
- #clock-cells = <0>;
- clock-frequency = <32768>;
- pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
- };
-
- sdio_pwrseq: sdio-pwrseq {
- compatible = "mmc-pwrseq-simple";
- reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
- clocks = <&wifi32k>;
- clock-names = "ext_clock";
- };
-};
-
-&efuse {
- bt_mac: bt-mac@6 {
- reg = <0x6 0x6>;
- };
-
- wifi_mac: wifi-mac@c {
- reg = <0xc 0x6>;
- };
-};
-
-&sn {
- reg = <0x32 0x20>;
-};
-
-ð_mac {
- reg = <0x0 0x6>;
-};
-
-&bid {
- reg = <0x12 0x20>;
-};
-
-&usb {
- status = "okay";
- dr_mode = "host";
-};
-
-&pwm_ef {
- status = "okay";
- pinctrl-0 = <&pwm_e_pins>;
- pinctrl-names = "default";
- clocks = <&clkc CLKID_FCLK_DIV4>;
- clock-names = "clkin0";
-};
-
-&saradc {
- status = "okay";
- vref-supply = <&vddio_ao18>;
-};
-
-/* Wireless SDIO Module */
-&sd_emmc_a {
- status = "okay";
- pinctrl-0 = <&sdio_pins>;
- pinctrl-1 = <&sdio_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
- #address-cells = <1>;
- #size-cells = <0>;
-
- bus-width = <4>;
- cap-sd-highspeed;
- max-frequency = <50000000>;
-
- non-removable;
- disable-wp;
-
- /* WiFi firmware requires power to be kept while in suspend */
- keep-power-in-suspend;
-
- mmc-pwrseq = <&sdio_pwrseq>;
-
- vmmc-supply = <&vddao_3v3>;
- vqmmc-supply = <&vddio_boot>;
-};
-
-/* SD card */
-&sd_emmc_b {
- status = "okay";
- pinctrl-0 = <&sdcard_pins>;
- pinctrl-1 = <&sdcard_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <4>;
- cap-sd-highspeed;
- max-frequency = <50000000>;
- disable-wp;
-
- cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>;
-
- vmmc-supply = <&vddao_3v3>;
- vqmmc-supply = <&vddio_boot>;
-};
-
-/* eMMC */
-&sd_emmc_c {
- status = "okay";
- pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>;
- pinctrl-1 = <&emmc_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <8>;
- cap-mmc-highspeed;
- max-frequency = <200000000>;
- non-removable;
- disable-wp;
- mmc-ddr-1_8v;
- mmc-hs200-1_8v;
-
- mmc-pwrseq = <&emmc_pwrseq>;
- vmmc-supply = <&vcc_3v3>;
- vqmmc-supply = <&vddio_boot>;
-};
-
-/* Console UART */
-&uart_AO {
- status = "okay";
- pinctrl-0 = <&uart_ao_a_pins>;
- pinctrl-names = "default";
-};
-
-/* S905W only has access to its internal PHY */
-ðmac {
- status = "okay";
- phy-mode = "rmii";
- phy-handle = <&internal_phy>;
-};
-
-&internal_phy {
- status = "okay";
- pinctrl-0 = <ð_link_led_pins>, <ð_act_led_pins>;
- pinctrl-names = "default";
-};
-
-&uart_A {
- status = "okay";
- pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
- pinctrl-names = "default";
- uart-has-rtscts;
-
- bluetooth {
- compatible = "realtek,rtl8822cs-bt";
- enable-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
- host-wake-gpios = <&gpio GPIOX_18 GPIO_ACTIVE_HIGH>;
- };
-};
-
-&uart_C {
- status = "okay";
- pinctrl-0 = <&uart_c_pins>;
- pinctrl-names = "default";
-};
-
-&uart_AO_B {
- status = "okay";
- pinctrl-0 = <&uart_ao_b_pins>, <&uart_ao_b_cts_rts_pins>;
- pinctrl-names = "default";
- uart-has-rtscts;
-};
-
-&i2c_B {
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&i2c_b_pins>;
-
- pcf8563: rtc@51 {
- compatible = "nxp,pcf8563";
- reg = <0x51>;
- status = "okay";
- };
-};
diff --git a/arch/arm/dts/meson-gxl-s905x-khadas-vim.dts b/arch/arm/dts/meson-gxl-s905x-khadas-vim.dts
deleted file mode 100644
index 02f8183..0000000
--- a/arch/arm/dts/meson-gxl-s905x-khadas-vim.dts
+++ /dev/null
@@ -1,237 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2017 Martin Blumenstingl <martin.blumenstingl@googlemail.com>.
- */
-
-/dts-v1/;
-
-#include "meson-gxl-s905x-p212.dtsi"
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/sound/meson-aiu.h>
-
-/ {
- compatible = "khadas,vim", "amlogic,s905x", "amlogic,meson-gxl";
- model = "Khadas VIM";
-
- adc-keys {
- compatible = "adc-keys";
- io-channels = <&saradc 0>;
- io-channel-names = "buttons";
- keyup-threshold-microvolt = <1710000>;
-
- button-function {
- label = "Function";
- linux,code = <KEY_FN>;
- press-threshold-microvolt = <10000>;
- };
- };
-
- aliases {
- serial2 = &uart_AO_B;
- ethernet0 = ðmac;
- };
-
- gpio-keys-polled {
- compatible = "gpio-keys-polled";
- poll-interval = <100>;
-
- power-button {
- label = "power";
- linux,code = <KEY_POWER>;
- gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_LOW>;
- };
- };
-
- led-controller {
- compatible = "pwm-leds";
-
- led-1 {
- label = "vim:red:power";
- pwms = <&pwm_AO_ab 1 7812500 0>;
- max-brightness = <255>;
- linux,default-trigger = "default-on";
- };
- };
-
- hdmi-connector {
- compatible = "hdmi-connector";
- type = "a";
-
- port {
- hdmi_connector_in: endpoint {
- remote-endpoint = <&hdmi_tx_tmds_out>;
- };
- };
- };
-
- sound {
- compatible = "amlogic,gx-sound-card";
- model = "KHADAS-VIM";
- assigned-clocks = <&clkc CLKID_MPLL0>,
- <&clkc CLKID_MPLL1>,
- <&clkc CLKID_MPLL2>;
- assigned-clock-parents = <0>, <0>, <0>;
- assigned-clock-rates = <294912000>,
- <270950400>,
- <393216000>;
- status = "okay";
-
- dai-link-0 {
- sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>;
- };
-
- dai-link-1 {
- sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>;
- dai-format = "i2s";
- mclk-fs = <256>;
-
- codec-0 {
- sound-dai = <&aiu AIU_HDMI CTRL_I2S>;
- };
- };
-
- dai-link-2 {
- sound-dai = <&aiu AIU_HDMI CTRL_OUT>;
-
- codec-0 {
- sound-dai = <&hdmi_tx>;
- };
- };
- };
-};
-
-&aiu {
- status = "okay";
-};
-
-&cec_AO {
- status = "okay";
- pinctrl-0 = <&ao_cec_pins>;
- pinctrl-names = "default";
- hdmi-phandle = <&hdmi_tx>;
-};
-
-&hdmi_tx {
- status = "okay";
- pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>;
- pinctrl-names = "default";
- hdmi-supply = <&hdmi_5v>;
-};
-
-&hdmi_tx_tmds_port {
- hdmi_tx_tmds_out: endpoint {
- remote-endpoint = <&hdmi_connector_in>;
- };
-};
-
-&i2c_A {
- status = "okay";
- pinctrl-0 = <&i2c_a_pins>;
- pinctrl-names = "default";
-};
-
-&i2c_B {
- status = "okay";
- pinctrl-0 = <&i2c_b_pins>;
- pinctrl-names = "default";
-
- rtc: rtc@51 {
- status = "okay";
- compatible = "haoyu,hym8563";
- reg = <0x51>;
- #clock-cells = <0>;
- clock-output-names = "xin32k";
- };
-};
-
-&ir {
- linux,rc-map-name = "rc-khadas";
-};
-
-&gpio_ao {
- gpio-line-names = "UART TX",
- "UART RX",
- "Power Key In",
- "J9 Header Pin35",
- "J9 Header Pin16",
- "J9 Header Pin15",
- "J9 Header Pin33",
- "IR In",
- "HDMI CEC",
- "SYS LED",
- /* GPIO_TEST_N */
- "";
-};
-
-&gpio {
- gpio-line-names = /* Bank GPIOZ */
- "", "", "", "", "", "", "",
- "", "", "", "", "", "", "",
- "Power OFF",
- "VCCK Enable",
- /* Bank GPIOH */
- "HDMI HPD", "HDMI SDA", "HDMI SCL",
- "HDMI_5V_EN", "SPDIF",
- "J9 Header Pin37",
- "J9 Header Pin30",
- "J9 Header Pin29",
- "J9 Header Pin32",
- "J9 Header Pin31",
- /* Bank BOOT */
- "eMMC D0", "eMMC D1", "eMMC D2", "eMMC D3",
- "eMMC D4", "eMMC D5", "eMMC D6", "eMMC D7",
- "eMMC Clk", "eMMC Reset", "eMMC CMD",
- "", "BOOT_MODE", "", "", "eMMC Data Strobe",
- /* Bank CARD */
- "SDCard D1", "SDCard D0", "SDCard CLK", "SDCard CMD",
- "SDCard D3", "SDCard D2", "SDCard Det",
- /* Bank GPIODV */
- "", "", "", "", "", "", "", "", "", "", "", "",
- "", "", "", "", "", "", "", "", "", "", "", "",
- "I2C A SDA", "I2C A SCK", "I2C B SDA", "I2C B SCK",
- "VCCK Regulator", "VDDEE Regulator",
- /* Bank GPIOX */
- "WIFI SDIO D0", "WIFI SDIO D1", "WIFI SDIO D2",
- "WIFI SDIO D3", "WIFI SDIO CLK", "WIFI SDIO CMD",
- "WIFI Power Enable", "WIFI WAKE HOST",
- "Bluetooth PCM DOUT", "Bluetooth PCM DIN",
- "Bluetooth PCM SYNC", "Bluetooth PCM CLK",
- "Bluetooth UART TX", "Bluetooth UART RX",
- "Bluetooth UART CTS", "Bluetooth UART RTS",
- "WIFI 32K", "Bluetooth Enable",
- "Bluetooth WAKE HOST",
- /* Bank GPIOCLK */
- "", "J9 Header Pin39";
-};
-
-&pwm_AO_ab {
- status = "okay";
- pinctrl-0 = <&pwm_ao_a_3_pins>, <&pwm_ao_b_pins>;
- pinctrl-names = "default";
- clocks = <&xtal> , <&xtal>;
- clock-names = "clkin0", "clkin1" ;
-};
-
-&pwm_ef {
- pinctrl-0 = <&pwm_e_pins>, <&pwm_f_clk_pins>;
-};
-
-&sd_emmc_a {
- max-frequency = <100000000>;
-};
-
-/* This is brought out on the Linux_RX (18) and Linux_TX (19) pins: */
-&uart_AO {
- status = "okay";
-};
-
-/* This is brought out on the UART_RX_AO_B (15) and UART_TX_AO_B (16) pins: */
-&uart_AO_B {
- status = "okay";
- pinctrl-0 = <&uart_ao_b_pins>;
- pinctrl-names = "default";
-};
-
-&usb {
- dr_mode = "peripheral";
-};
diff --git a/arch/arm/dts/meson-gxl-s905x-libretech-cc-v2.dts b/arch/arm/dts/meson-gxl-s905x-libretech-cc-v2.dts
deleted file mode 100644
index 6c4e68e..0000000
--- a/arch/arm/dts/meson-gxl-s905x-libretech-cc-v2.dts
+++ /dev/null
@@ -1,313 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2020 BayLibre, SAS.
- * Author: Jerome Brunet <jbrunet@baylibre.com>
- */
-
-/dts-v1/;
-
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/leds/common.h>
-#include <dt-bindings/sound/meson-aiu.h>
-
-#include "meson-gxl-s905x.dtsi"
-
-/ {
- compatible = "libretech,aml-s905x-cc-v2", "amlogic,s905x",
- "amlogic,meson-gxl";
- model = "Libre Computer AML-S905X-CC V2";
-
- aliases {
- serial0 = &uart_AO;
- ethernet0 = ðmac;
- spi0 = &spifc;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- emmc_pwrseq: emmc-pwrseq {
- compatible = "mmc-pwrseq-emmc";
- reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
- };
-
- hdmi-connector {
- compatible = "hdmi-connector";
- type = "a";
-
- port {
- hdmi_connector_in: endpoint {
- remote-endpoint = <&hdmi_tx_tmds_out>;
- };
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- led-blue {
- color = <LED_COLOR_ID_BLUE>;
- function = LED_FUNCTION_STATUS;
- gpios = <&gpio GPIODV_24 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "heartbeat";
- panic-indicator;
- };
-
- led-green {
- color = <LED_COLOR_ID_GREEN>;
- function = LED_FUNCTION_DISK_ACTIVITY;
- gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "disk-activity";
- };
- };
-
- memory@0 {
- device_type = "memory";
- reg = <0x0 0x0 0x0 0x80000000>;
- };
-
- ao_5v: regulator-ao_5v {
- compatible = "regulator-fixed";
- regulator-name = "AO_5V";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&dc_in>;
- regulator-always-on;
- };
-
- dc_in: regulator-dc_in {
- compatible = "regulator-fixed";
- regulator-name = "DC_IN";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- regulator-always-on;
- };
-
- vcck: regulator-vcck {
- compatible = "regulator-fixed";
- regulator-name = "VCCK";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&ao_5v>;
- regulator-always-on;
- };
-
- vcc_card: regulator-vcc_card {
- compatible = "regulator-fixed";
- regulator-name = "VCC_CARD";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vddio_ao3v3>;
-
- gpio = <&gpio GPIOCLK_1 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
-
- vcc5v: regulator-vcc5v {
- compatible = "regulator-fixed";
- regulator-name = "VCC5V";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&ao_5v>;
-
- gpio = <&gpio GPIOH_3 GPIO_OPEN_DRAIN>;
- };
-
- vddio_ao3v3: regulator-vddio_ao3v3 {
- compatible = "regulator-fixed";
- regulator-name = "VDDIO_AO3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&ao_5v>;
- regulator-always-on;
- };
-
- vddio_card: regulator-vddio-card {
- compatible = "regulator-gpio";
- regulator-name = "VDDIO_CARD";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
-
- gpios = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_HIGH>;
- gpios-states = <0>;
-
- states = <3300000 0>,
- <1800000 1>;
-
- regulator-settling-time-up-us = <200>;
- regulator-settling-time-down-us = <50000>;
- };
-
- vddio_ao18: regulator-vddio_ao18 {
- compatible = "regulator-fixed";
- regulator-name = "VDDIO_AO18";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vddio_ao3v3>;
- regulator-always-on;
- };
-
- vcc_1v8: regulator-vcc_1v8 {
- compatible = "regulator-fixed";
- regulator-name = "VCC 1V8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vddio_ao3v3>;
- regulator-always-on;
- };
-
- sound {
- compatible = "amlogic,gx-sound-card";
- model = "LIBRETECH-CC-V2";
- assigned-clocks = <&clkc CLKID_MPLL0>,
- <&clkc CLKID_MPLL1>,
- <&clkc CLKID_MPLL2>;
- assigned-clock-parents = <0>, <0>, <0>;
- assigned-clock-rates = <294912000>,
- <270950400>,
- <393216000>;
- status = "okay";
-
- dai-link-0 {
- sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>;
- };
-
- dai-link-1 {
- sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>;
- dai-format = "i2s";
- mclk-fs = <256>;
-
- codec-0 {
- sound-dai = <&aiu AIU_HDMI CTRL_I2S>;
- };
- };
-
- dai-link-2 {
- sound-dai = <&aiu AIU_HDMI CTRL_OUT>;
-
- codec-0 {
- sound-dai = <&hdmi_tx>;
- };
- };
- };
-};
-
-&aiu {
- status = "okay";
-};
-
-&cec_AO {
- status = "okay";
- pinctrl-0 = <&ao_cec_pins>;
- pinctrl-names = "default";
- hdmi-phandle = <&hdmi_tx>;
-};
-
-ðmac {
- status = "okay";
-};
-
-&internal_phy {
- pinctrl-0 = <ð_link_led_pins>, <ð_act_led_pins>;
- pinctrl-names = "default";
-};
-
-&ir {
- status = "okay";
- pinctrl-0 = <&remote_input_ao_pins>;
- pinctrl-names = "default";
-};
-
-&hdmi_tx {
- status = "okay";
- pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>;
- hdmi-supply = <&vcc5v>;
- pinctrl-names = "default";
-};
-
-&hdmi_tx_tmds_port {
- hdmi_tx_tmds_out: endpoint {
- remote-endpoint = <&hdmi_connector_in>;
- };
-};
-
-&saradc {
- status = "okay";
- vref-supply = <&vddio_ao18>;
-};
-
-/* SD card */
-&sd_emmc_b {
- pinctrl-0 = <&sdcard_pins>;
- pinctrl-1 = <&sdcard_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <4>;
- cap-sd-highspeed;
- sd-uhs-sdr12;
- sd-uhs-sdr25;
- sd-uhs-sdr50;
- sd-uhs-ddr50;
- max-frequency = <100000000>;
- disable-wp;
-
- cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>;
-
- vmmc-supply = <&vcc_card>;
- vqmmc-supply = <&vddio_card>;
-
- status = "okay";
-};
-
-/* eMMC */
-&sd_emmc_c {
- pinctrl-0 = <&emmc_pins>;
- pinctrl-1 = <&emmc_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <8>;
- cap-mmc-highspeed;
- mmc-hs200-1_8v;
- max-frequency = <200000000>;
- disable-wp;
-
- mmc-pwrseq = <&emmc_pwrseq>;
- vmmc-supply = <&vddio_ao3v3>;
- vqmmc-supply = <&vcc_1v8>;
-
- status = "okay";
-};
-
-&spifc {
- status = "okay";
- pinctrl-0 = <&nor_pins>;
- pinctrl-names = "default";
-
- nor_4u1: flash@0 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "jedec,spi-nor";
- reg = <0>;
- spi-max-frequency = <3000000>;
- };
-};
-
-&uart_AO {
- status = "okay";
- pinctrl-0 = <&uart_ao_a_pins>;
- pinctrl-names = "default";
-};
-
-&usb {
- status = "okay";
- dr_mode = "host";
-};
-
-&usb2_phy0 {
- phy-supply = <&vcc5v>;
-};
-
-&usb2_phy1 {
- phy-supply = <&vcc5v>;
-};
diff --git a/arch/arm/dts/meson-gxl-s905x-libretech-cc.dts b/arch/arm/dts/meson-gxl-s905x-libretech-cc.dts
deleted file mode 100644
index 82bfabf..0000000
--- a/arch/arm/dts/meson-gxl-s905x-libretech-cc.dts
+++ /dev/null
@@ -1,356 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2017 BayLibre, SAS.
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- * Author: Jerome Brunet <jbrunet@baylibre.com>
- */
-
-/dts-v1/;
-
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/sound/meson-aiu.h>
-
-#include "meson-gxl-s905x.dtsi"
-
-/ {
- compatible = "libretech,aml-s905x-cc", "amlogic,s905x",
- "amlogic,meson-gxl";
- model = "Libre Computer AML-S905X-CC";
-
- aliases {
- serial0 = &uart_AO;
- ethernet0 = ðmac;
- };
-
- dio2133: analog-amplifier {
- compatible = "simple-audio-amplifier";
- sound-name-prefix = "AU2";
- VCC-supply = <&hdmi_5v>;
- enable-gpios = <&gpio GPIOH_5 GPIO_ACTIVE_HIGH>;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- cvbs-connector {
- compatible = "composite-video-connector";
-
- port {
- cvbs_connector_in: endpoint {
- remote-endpoint = <&cvbs_vdac_out>;
- };
- };
- };
-
- emmc_pwrseq: emmc-pwrseq {
- compatible = "mmc-pwrseq-emmc";
- reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
- };
-
- hdmi-connector {
- compatible = "hdmi-connector";
- type = "a";
-
- port {
- hdmi_connector_in: endpoint {
- remote-endpoint = <&hdmi_tx_tmds_out>;
- };
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- led-system {
- label = "librecomputer:system-status";
- gpios = <&gpio GPIODV_24 GPIO_ACTIVE_HIGH>;
- default-state = "on";
- panic-indicator;
- };
-
- led-blue {
- label = "librecomputer:blue";
- gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "heartbeat";
- };
- };
-
- memory@0 {
- device_type = "memory";
- reg = <0x0 0x0 0x0 0x80000000>;
- };
-
- hdmi_5v: regulator-hdmi-5v {
- compatible = "regulator-fixed";
-
- regulator-name = "HDMI_5V";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
-
- gpio = <&gpio GPIOH_3 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- regulator-always-on;
- };
-
- vcc_3v3: regulator-vcc_3v3 {
- compatible = "regulator-fixed";
- regulator-name = "VCC_3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- };
-
- vcc_card: regulator-vcc-card {
- compatible = "regulator-gpio";
-
- regulator-name = "VCC_CARD";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
-
- gpios = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_HIGH>;
- gpios-states = <0>;
-
- states = <3300000 0>,
- <1800000 1>;
-
- regulator-settling-time-up-us = <200>;
- regulator-settling-time-down-us = <50000>;
- };
-
- vddio_ao18: regulator-vddio_ao18 {
- compatible = "regulator-fixed";
- regulator-name = "VDDIO_AO18";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- };
-
- /* This is provided by LDOs on the eMMC daugther card */
- vddio_boot: regulator-vddio_boot {
- compatible = "regulator-fixed";
- regulator-name = "VDDIO_BOOT";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vcc_3v3>;
- };
-
- sound {
- compatible = "amlogic,gx-sound-card";
- model = "LIBRETECH-CC";
- audio-aux-devs = <&dio2133>;
- audio-widgets = "Line", "Lineout";
- audio-routing = "AU2 INL", "ACODEC LOLN",
- "AU2 INR", "ACODEC LORN",
- "Lineout", "AU2 OUTL",
- "Lineout", "AU2 OUTR";
- assigned-clocks = <&clkc CLKID_MPLL0>,
- <&clkc CLKID_MPLL1>,
- <&clkc CLKID_MPLL2>;
- assigned-clock-parents = <0>, <0>, <0>;
- assigned-clock-rates = <294912000>,
- <270950400>,
- <393216000>;
- status = "okay";
-
- dai-link-0 {
- sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>;
- };
-
- dai-link-1 {
- sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>;
- dai-format = "i2s";
- mclk-fs = <256>;
-
- codec-0 {
- sound-dai = <&aiu AIU_HDMI CTRL_I2S>;
- };
-
- codec-1 {
- sound-dai = <&aiu AIU_ACODEC CTRL_I2S>;
- };
- };
-
- dai-link-2 {
- sound-dai = <&aiu AIU_HDMI CTRL_OUT>;
-
- codec-0 {
- sound-dai = <&hdmi_tx>;
- };
- };
-
- dai-link-3 {
- sound-dai = <&aiu AIU_ACODEC CTRL_OUT>;
-
- codec-0 {
- sound-dai = <&acodec>;
- };
- };
- };
-};
-
-&acodec {
- AVDD-supply = <&vddio_ao18>;
- status = "okay";
-};
-
-&aiu {
- status = "okay";
-};
-
-&cec_AO {
- status = "okay";
- pinctrl-0 = <&ao_cec_pins>;
- pinctrl-names = "default";
- hdmi-phandle = <&hdmi_tx>;
-};
-
-&cvbs_vdac_port {
- cvbs_vdac_out: endpoint {
- remote-endpoint = <&cvbs_connector_in>;
- };
-};
-
-ðmac {
- status = "okay";
-};
-
-&internal_phy {
- pinctrl-0 = <ð_link_led_pins>, <ð_act_led_pins>;
- pinctrl-names = "default";
-};
-
-&ir {
- status = "okay";
- pinctrl-0 = <&remote_input_ao_pins>;
- pinctrl-names = "default";
-};
-
-&hdmi_tx {
- status = "okay";
- pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>;
- pinctrl-names = "default";
- hdmi-supply = <&hdmi_5v>;
-};
-
-&hdmi_tx_tmds_port {
- hdmi_tx_tmds_out: endpoint {
- remote-endpoint = <&hdmi_connector_in>;
- };
-};
-
-&gpio_ao {
- gpio-line-names = "UART TX",
- "UART RX",
- "Blue LED",
- "SDCard Voltage Switch",
- "7J1 Header Pin5",
- "7J1 Header Pin3",
- "7J1 Header Pin12",
- "IR In",
- "9J3 Switch HDMI CEC/7J1 Header Pin11",
- "7J1 Header Pin13",
- /* GPIO_TEST_N */
- "7J1 Header Pin15";
-};
-
-&gpio {
- gpio-line-names = /* Bank GPIOZ */
- "", "", "", "", "", "", "",
- "", "", "", "", "", "", "",
- "Eth Link LED", "Eth Activity LED",
- /* Bank GPIOH */
- "HDMI HPD", "HDMI SDA", "HDMI SCL",
- "HDMI_5V_EN", "9J1 Header Pin2",
- "Analog Audio Mute",
- "2J3 Header Pin6",
- "2J3 Header Pin5",
- "2J3 Header Pin4",
- "2J3 Header Pin3",
- /* Bank BOOT */
- "eMMC D0", "eMMC D1", "eMMC D2", "eMMC D3",
- "eMMC D4", "eMMC D5", "eMMC D6", "eMMC D7",
- "eMMC Clk", "eMMC Reset", "eMMC CMD",
- "ALT BOOT MODE", "", "", "", "eMMC Data Strobe",
- /* Bank CARD */
- "SDCard D1", "SDCard D0", "SDCard CLK", "SDCard CMD",
- "SDCard D3", "SDCard D2", "SDCard Det",
- /* Bank GPIODV */
- "", "", "", "", "", "", "", "", "", "", "", "",
- "", "", "", "", "", "", "", "", "", "", "", "",
- "Green LED", "VCCK Enable",
- "7J1 Header Pin27", "7J1 Header Pin28",
- "VCCK Regulator", "VDDEE Regulator",
- /* Bank GPIOX */
- "7J1 Header Pin22", "7J1 Header Pin26",
- "7J1 Header Pin36", "7J1 Header Pin38",
- "7J1 Header Pin40", "7J1 Header Pin37",
- "7J1 Header Pin33", "7J1 Header Pin35",
- "7J1 Header Pin19", "7J1 Header Pin21",
- "7J1 Header Pin24", "7J1 Header Pin23",
- "7J1 Header Pin8", "7J1 Header Pin10",
- "7J1 Header Pin16", "7J1 Header Pin18",
- "7J1 Header Pin32", "7J1 Header Pin29",
- "7J1 Header Pin31",
- /* Bank GPIOCLK */
- "7J1 Header Pin7", "";
-};
-
-&saradc {
- status = "okay";
- vref-supply = <&vddio_ao18>;
-};
-
-/* SD card */
-&sd_emmc_b {
- status = "okay";
- pinctrl-0 = <&sdcard_pins>;
- pinctrl-1 = <&sdcard_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <4>;
- cap-sd-highspeed;
- max-frequency = <50000000>;
- disable-wp;
-
- cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>;
-
- vmmc-supply = <&vcc_3v3>;
- vqmmc-supply = <&vcc_card>;
-};
-
-/* eMMC */
-&sd_emmc_c {
- status = "okay";
- pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>;
- pinctrl-1 = <&emmc_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <8>;
- cap-mmc-highspeed;
- mmc-ddr-1_8v;
- mmc-hs200-1_8v;
- max-frequency = <200000000>;
- disable-wp;
-
- mmc-pwrseq = <&emmc_pwrseq>;
- vmmc-supply = <&vcc_3v3>;
- vqmmc-supply = <&vddio_boot>;
-};
-
-&uart_AO {
- status = "okay";
- pinctrl-0 = <&uart_ao_a_pins>;
- pinctrl-names = "default";
-};
-
-&usb {
- status = "okay";
- dr_mode = "host";
-};
-
-&usb2_phy0 {
- /*
- * even though the schematics don't show it:
- * HDMI_5V is also used as supply for the USB VBUS.
- */
- phy-supply = <&hdmi_5v>;
-};
diff --git a/arch/arm/dts/meson-gxl-s905x-p212.dts b/arch/arm/dts/meson-gxl-s905x-p212.dts
deleted file mode 100644
index 9b4ea6a..0000000
--- a/arch/arm/dts/meson-gxl-s905x-p212.dts
+++ /dev/null
@@ -1,134 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2016 Endless Computers, Inc.
- * Author: Carlo Caione <carlo@endlessm.com>
- */
-
-/dts-v1/;
-
-#include "meson-gxl-s905x-p212.dtsi"
-#include <dt-bindings/sound/meson-aiu.h>
-
-/ {
- compatible = "amlogic,p212", "amlogic,s905x", "amlogic,meson-gxl";
- model = "Amlogic Meson GXL (S905X) P212 Development Board";
-
- dio2133: analog-amplifier {
- compatible = "simple-audio-amplifier";
- sound-name-prefix = "AU2";
- VCC-supply = <&hdmi_5v>;
- enable-gpios = <&gpio GPIOH_5 GPIO_ACTIVE_HIGH>;
- };
-
- cvbs-connector {
- compatible = "composite-video-connector";
-
- port {
- cvbs_connector_in: endpoint {
- remote-endpoint = <&cvbs_vdac_out>;
- };
- };
- };
-
- hdmi-connector {
- compatible = "hdmi-connector";
- type = "a";
-
- port {
- hdmi_connector_in: endpoint {
- remote-endpoint = <&hdmi_tx_tmds_out>;
- };
- };
- };
-
- sound {
- compatible = "amlogic,gx-sound-card";
- model = "S905X-P212";
- audio-aux-devs = <&dio2133>;
- audio-widgets = "Line", "Lineout";
- audio-routing = "AU2 INL", "ACODEC LOLN",
- "AU2 INR", "ACODEC LORN",
- "Lineout", "AU2 OUTL",
- "Lineout", "AU2 OUTR";
- assigned-clocks = <&clkc CLKID_MPLL0>,
- <&clkc CLKID_MPLL1>,
- <&clkc CLKID_MPLL2>;
- assigned-clock-parents = <0>, <0>, <0>;
- assigned-clock-rates = <294912000>,
- <270950400>,
- <393216000>;
- dai-link-0 {
- sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>;
- };
-
- dai-link-1 {
- sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>;
- dai-format = "i2s";
- mclk-fs = <256>;
-
- codec-0 {
- sound-dai = <&aiu AIU_HDMI CTRL_I2S>;
- };
-
- codec-1 {
- sound-dai = <&aiu AIU_ACODEC CTRL_I2S>;
- };
- };
-
- dai-link-2 {
- sound-dai = <&aiu AIU_HDMI CTRL_OUT>;
-
- codec-0 {
- sound-dai = <&hdmi_tx>;
- };
- };
-
- dai-link-3 {
- sound-dai = <&aiu AIU_ACODEC CTRL_OUT>;
-
- codec-0 {
- sound-dai = <&acodec>;
- };
- };
- };
-};
-
-&acodec {
- AVDD-supply = <&vddio_ao18>;
- status = "okay";
-};
-
-&aiu {
- status = "okay";
-};
-
-&cec_AO {
- status = "okay";
- pinctrl-0 = <&ao_cec_pins>;
- pinctrl-names = "default";
- hdmi-phandle = <&hdmi_tx>;
-};
-
-&cvbs_vdac_port {
- cvbs_vdac_out: endpoint {
- remote-endpoint = <&cvbs_connector_in>;
- };
-};
-
-&hdmi_tx {
- status = "okay";
- pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>;
- pinctrl-names = "default";
- hdmi-supply = <&hdmi_5v>;
-};
-
-&hdmi_tx_tmds_port {
- hdmi_tx_tmds_out: endpoint {
- remote-endpoint = <&hdmi_connector_in>;
- };
-};
-
-/* This UART is brought out to the DB9 connector */
-&uart_AO {
- status = "okay";
-};
diff --git a/arch/arm/dts/meson-gxl-s905x-p212.dtsi b/arch/arm/dts/meson-gxl-s905x-p212.dtsi
deleted file mode 100644
index a150cc0..0000000
--- a/arch/arm/dts/meson-gxl-s905x-p212.dtsi
+++ /dev/null
@@ -1,213 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2016 Martin Blumenstingl <martin.blumenstingl@googlemail.com>.
- * Based on meson-gx-p23x-q20x.dtsi:
- * - Copyright (c) 2016 Endless Computers, Inc.
- * Author: Carlo Caione <carlo@endlessm.com>
- * - Copyright (c) 2016 BayLibre, SAS.
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- */
-
-/* Common DTSI for devices which are based on the P212 reference board. */
-
-#include "meson-gxl-s905x.dtsi"
-
-/ {
- aliases {
- serial0 = &uart_AO;
- ethernet0 = ðmac;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- memory@0 {
- device_type = "memory";
- reg = <0x0 0x0 0x0 0x80000000>;
- };
-
- hdmi_5v: regulator-hdmi-5v {
- compatible = "regulator-fixed";
-
- regulator-name = "HDMI_5V";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
-
- gpio = <&gpio GPIOH_3 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- regulator-always-on;
- };
-
- vddio_boot: regulator-vddio_boot {
- compatible = "regulator-fixed";
- regulator-name = "VDDIO_BOOT";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- };
-
- vddao_3v3: regulator-vddao_3v3 {
- compatible = "regulator-fixed";
- regulator-name = "VDDAO_3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- };
-
- vddio_ao18: regulator-vddio_ao18 {
- compatible = "regulator-fixed";
- regulator-name = "VDDIO_AO18";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- };
-
- vcc_3v3: regulator-vcc_3v3 {
- compatible = "regulator-fixed";
- regulator-name = "VCC_3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- };
-
- emmc_pwrseq: emmc-pwrseq {
- compatible = "mmc-pwrseq-emmc";
- reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
- };
-
- wifi32k: wifi32k {
- compatible = "pwm-clock";
- #clock-cells = <0>;
- clock-frequency = <32768>;
- pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
- };
-
- sdio_pwrseq: sdio-pwrseq {
- compatible = "mmc-pwrseq-simple";
- reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
- clocks = <&wifi32k>;
- clock-names = "ext_clock";
- };
-};
-
-ðmac {
- status = "okay";
-};
-
-&ir {
- status = "okay";
- pinctrl-0 = <&remote_input_ao_pins>;
- pinctrl-names = "default";
-};
-
-&pwm_ef {
- status = "okay";
- pinctrl-0 = <&pwm_e_pins>;
- pinctrl-names = "default";
- clocks = <&clkc CLKID_FCLK_DIV4>;
- clock-names = "clkin0";
-};
-
-&saradc {
- status = "okay";
- vref-supply = <&vddio_ao18>;
-};
-
-/* Wireless SDIO Module */
-&sd_emmc_a {
- status = "okay";
- pinctrl-0 = <&sdio_pins>;
- pinctrl-1 = <&sdio_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
- #address-cells = <1>;
- #size-cells = <0>;
-
- bus-width = <4>;
- cap-sd-highspeed;
- max-frequency = <50000000>;
-
- non-removable;
- disable-wp;
-
- /* WiFi firmware requires power to be kept while in suspend */
- keep-power-in-suspend;
-
- mmc-pwrseq = <&sdio_pwrseq>;
-
- vmmc-supply = <&vddao_3v3>;
- vqmmc-supply = <&vddio_boot>;
-
- brcmf: wifi@1 {
- reg = <1>;
- compatible = "brcm,bcm4329-fmac";
- };
-};
-
-/* SD card */
-&sd_emmc_b {
- status = "okay";
- pinctrl-0 = <&sdcard_pins>;
- pinctrl-1 = <&sdcard_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <4>;
- cap-sd-highspeed;
- max-frequency = <50000000>;
- disable-wp;
-
- cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>;
-
- vmmc-supply = <&vddao_3v3>;
- vqmmc-supply = <&vddio_boot>;
-};
-
-/* eMMC */
-&sd_emmc_c {
- status = "okay";
- pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>;
- pinctrl-1 = <&emmc_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <8>;
- cap-mmc-highspeed;
- max-frequency = <200000000>;
- non-removable;
- disable-wp;
- mmc-ddr-1_8v;
- mmc-hs200-1_8v;
-
- mmc-pwrseq = <&emmc_pwrseq>;
- vmmc-supply = <&vcc_3v3>;
- vqmmc-supply = <&vddio_boot>;
-};
-
-/* This is connected to the Bluetooth module: */
-&uart_A {
- status = "okay";
- pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
- pinctrl-names = "default";
- uart-has-rtscts;
-
- bluetooth {
- compatible = "brcm,bcm43438-bt";
- shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
- max-speed = <2000000>;
- clocks = <&wifi32k>;
- clock-names = "lpo";
- };
-};
-
-&uart_AO {
- status = "okay";
- pinctrl-0 = <&uart_ao_a_pins>;
- pinctrl-names = "default";
-};
-
-&usb {
- status = "okay";
- dr_mode = "host";
-};
-
-&usb2_phy0 {
- /*
- * HDMI_5V is also used as supply for the USB VBUS.
- */
- phy-supply = <&hdmi_5v>;
-};
diff --git a/arch/arm/dts/meson-gxl-s905x.dtsi b/arch/arm/dts/meson-gxl-s905x.dtsi
deleted file mode 100644
index 40c19f6..0000000
--- a/arch/arm/dts/meson-gxl-s905x.dtsi
+++ /dev/null
@@ -1,18 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2016 Endless Computers, Inc.
- * Author: Carlo Caione <carlo@endlessm.com>
- */
-
-#include "meson-gxl.dtsi"
-#include "meson-gxl-mali.dtsi"
-
-/ {
- compatible = "amlogic,s905x", "amlogic,meson-gxl";
-};
-
-/* S905X only has access to its internal PHY */
-ðmac {
- phy-mode = "rmii";
- phy-handle = <&internal_phy>;
-};
diff --git a/arch/arm/dts/meson-gxl.dtsi b/arch/arm/dts/meson-gxl.dtsi
deleted file mode 100644
index 17bcfa4..0000000
--- a/arch/arm/dts/meson-gxl.dtsi
+++ /dev/null
@@ -1,940 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2016 Endless Computers, Inc.
- * Author: Carlo Caione <carlo@endlessm.com>
- */
-
-#include "meson-gx.dtsi"
-#include <dt-bindings/clock/gxbb-clkc.h>
-#include <dt-bindings/clock/gxbb-aoclkc.h>
-#include <dt-bindings/gpio/meson-gxl-gpio.h>
-#include <dt-bindings/reset/amlogic,meson-gxbb-reset.h>
-
-/ {
- compatible = "amlogic,meson-gxl";
-
- soc {
- usb: usb@d0078080 {
- compatible = "amlogic,meson-gxl-usb-ctrl";
- reg = <0x0 0xd0078080 0x0 0x20>;
- interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB1_DDR_BRIDGE>;
- clock-names = "usb_ctrl", "ddr";
- resets = <&reset RESET_USB_OTG>;
-
- dr_mode = "otg";
-
- phys = <&usb2_phy0>, <&usb2_phy1>;
- phy-names = "usb2-phy0", "usb2-phy1";
-
- dwc2: usb@c9100000 {
- compatible = "amlogic,meson-g12a-usb", "snps,dwc2";
- reg = <0x0 0xc9100000 0x0 0x40000>;
- interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clkc CLKID_USB1>;
- clock-names = "otg";
- phys = <&usb2_phy1>;
- dr_mode = "peripheral";
- g-rx-fifo-size = <192>;
- g-np-tx-fifo-size = <128>;
- g-tx-fifo-size = <128 128 16 16 16>;
- };
-
- dwc3: usb@c9000000 {
- compatible = "snps,dwc3";
- reg = <0x0 0xc9000000 0x0 0x100000>;
- interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
- dr_mode = "host";
- maximum-speed = "high-speed";
- snps,dis_u2_susphy_quirk;
- };
- };
-
- acodec: audio-controller@c8832000 {
- compatible = "amlogic,t9015";
- reg = <0x0 0xc8832000 0x0 0x14>;
- #sound-dai-cells = <0>;
- sound-name-prefix = "ACODEC";
- clocks = <&clkc CLKID_ACODEC>;
- clock-names = "pclk";
- resets = <&reset RESET_ACODEC>;
- status = "disabled";
- };
-
- crypto: crypto@c883e000 {
- compatible = "amlogic,gxl-crypto";
- reg = <0x0 0xc883e000 0x0 0x36>;
- interrupts = <GIC_SPI 188 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 189 IRQ_TYPE_EDGE_RISING>;
- clocks = <&clkc CLKID_BLKMV>;
- clock-names = "blkmv";
- status = "okay";
- };
- };
-};
-
-&aiu {
- compatible = "amlogic,aiu-gxl", "amlogic,aiu";
- clocks = <&clkc CLKID_AIU_GLUE>,
- <&clkc CLKID_I2S_OUT>,
- <&clkc CLKID_AOCLK_GATE>,
- <&clkc CLKID_CTS_AMCLK>,
- <&clkc CLKID_MIXER_IFACE>,
- <&clkc CLKID_IEC958>,
- <&clkc CLKID_IEC958_GATE>,
- <&clkc CLKID_CTS_MCLK_I958>,
- <&clkc CLKID_CTS_I958>;
- clock-names = "pclk",
- "i2s_pclk",
- "i2s_aoclk",
- "i2s_mclk",
- "i2s_mixer",
- "spdif_pclk",
- "spdif_aoclk",
- "spdif_mclk",
- "spdif_mclk_sel";
- resets = <&reset RESET_AIU>;
-};
-
-&apb {
- usb2_phy0: phy@78000 {
- compatible = "amlogic,meson-gxl-usb2-phy";
- #phy-cells = <0>;
- reg = <0x0 0x78000 0x0 0x20>;
- clocks = <&clkc CLKID_USB>;
- clock-names = "phy";
- resets = <&reset RESET_USB_OTG>;
- reset-names = "phy";
- status = "okay";
- };
-
- usb2_phy1: phy@78020 {
- compatible = "amlogic,meson-gxl-usb2-phy";
- #phy-cells = <0>;
- reg = <0x0 0x78020 0x0 0x20>;
- clocks = <&clkc CLKID_USB>;
- clock-names = "phy";
- resets = <&reset RESET_USB_OTG>;
- reset-names = "phy";
- status = "okay";
- };
-};
-
-&efuse {
- clocks = <&clkc CLKID_EFUSE>;
-};
-
-ðmac {
- clocks = <&clkc CLKID_ETH>,
- <&clkc CLKID_FCLK_DIV2>,
- <&clkc CLKID_MPLL2>,
- <&clkc CLKID_FCLK_DIV2>;
- clock-names = "stmmaceth", "clkin0", "clkin1", "timing-adjustment";
-
- mdio0: mdio {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "snps,dwmac-mdio";
- };
-};
-
-&aobus {
- pinctrl_aobus: pinctrl@14 {
- compatible = "amlogic,meson-gxl-aobus-pinctrl";
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- gpio_ao: bank@14 {
- reg = <0x0 0x00014 0x0 0x8>,
- <0x0 0x0002c 0x0 0x4>,
- <0x0 0x00024 0x0 0x8>;
- reg-names = "mux", "pull", "gpio";
- gpio-controller;
- #gpio-cells = <2>;
- gpio-ranges = <&pinctrl_aobus 0 0 14>;
- };
-
- uart_ao_a_pins: uart_ao_a {
- mux {
- groups = "uart_tx_ao_a", "uart_rx_ao_a";
- function = "uart_ao";
- bias-disable;
- };
- };
-
- uart_ao_a_cts_rts_pins: uart_ao_a_cts_rts {
- mux {
- groups = "uart_cts_ao_a",
- "uart_rts_ao_a";
- function = "uart_ao";
- bias-disable;
- };
- };
-
- uart_ao_b_pins: uart_ao_b {
- mux {
- groups = "uart_tx_ao_b", "uart_rx_ao_b";
- function = "uart_ao_b";
- bias-disable;
- };
- };
-
- uart_ao_b_0_1_pins: uart_ao_b_0_1 {
- mux {
- groups = "uart_tx_ao_b_0", "uart_rx_ao_b_1";
- function = "uart_ao_b";
- bias-disable;
- };
- };
-
- uart_ao_b_cts_rts_pins: uart_ao_b_cts_rts {
- mux {
- groups = "uart_cts_ao_b",
- "uart_rts_ao_b";
- function = "uart_ao_b";
- bias-disable;
- };
- };
-
- remote_input_ao_pins: remote_input_ao {
- mux {
- groups = "remote_input_ao";
- function = "remote_input_ao";
- bias-disable;
- };
- };
-
- i2c_ao_pins: i2c_ao {
- mux {
- groups = "i2c_sck_ao",
- "i2c_sda_ao";
- function = "i2c_ao";
- bias-disable;
- };
- };
-
- pwm_ao_a_3_pins: pwm_ao_a_3 {
- mux {
- groups = "pwm_ao_a_3";
- function = "pwm_ao_a";
- bias-disable;
- };
- };
-
- pwm_ao_a_8_pins: pwm_ao_a_8 {
- mux {
- groups = "pwm_ao_a_8";
- function = "pwm_ao_a";
- bias-disable;
- };
- };
-
- pwm_ao_b_pins: pwm_ao_b {
- mux {
- groups = "pwm_ao_b";
- function = "pwm_ao_b";
- bias-disable;
- };
- };
-
- pwm_ao_b_6_pins: pwm_ao_b_6 {
- mux {
- groups = "pwm_ao_b_6";
- function = "pwm_ao_b";
- bias-disable;
- };
- };
-
- i2s_out_ch23_ao_pins: i2s_out_ch23_ao {
- mux {
- groups = "i2s_out_ch23_ao";
- function = "i2s_out_ao";
- bias-disable;
- };
- };
-
- i2s_out_ch45_ao_pins: i2s_out_ch45_ao {
- mux {
- groups = "i2s_out_ch45_ao";
- function = "i2s_out_ao";
- bias-disable;
- };
- };
-
- spdif_out_ao_6_pins: spdif_out_ao_6 {
- mux {
- groups = "spdif_out_ao_6";
- function = "spdif_out_ao";
- bias-disable;
- };
- };
-
- spdif_out_ao_9_pins: spdif_out_ao_9 {
- mux {
- groups = "spdif_out_ao_9";
- function = "spdif_out_ao";
- bias-disable;
- };
- };
-
- ao_cec_pins: ao_cec {
- mux {
- groups = "ao_cec";
- function = "cec_ao";
- bias-disable;
- };
- };
-
- ee_cec_pins: ee_cec {
- mux {
- groups = "ee_cec";
- function = "cec_ao";
- bias-disable;
- };
- };
- };
-};
-
-&cec_AO {
- clocks = <&clkc_AO CLKID_AO_CEC_32K>;
- clock-names = "core";
-};
-
-&clkc_AO {
- compatible = "amlogic,meson-gxl-aoclkc", "amlogic,meson-gx-aoclkc";
- clocks = <&xtal>, <&clkc CLKID_CLK81>;
- clock-names = "xtal", "mpeg-clk";
-};
-
-&gpio_intc {
- compatible = "amlogic,meson-gxl-gpio-intc",
- "amlogic,meson-gpio-intc";
- status = "okay";
-};
-
-&hdmi_tx {
- compatible = "amlogic,meson-gxl-dw-hdmi", "amlogic,meson-gx-dw-hdmi";
- resets = <&reset RESET_HDMITX_CAPB3>,
- <&reset RESET_HDMI_SYSTEM_RESET>,
- <&reset RESET_HDMI_TX>;
- reset-names = "hdmitx_apb", "hdmitx", "hdmitx_phy";
- clocks = <&clkc CLKID_HDMI_PCLK>,
- <&clkc CLKID_CLK81>,
- <&clkc CLKID_GCLK_VENCI_INT0>;
- clock-names = "isfr", "iahb", "venci";
-};
-
-&sysctrl {
- clkc: clock-controller {
- compatible = "amlogic,gxl-clkc";
- #clock-cells = <1>;
- clocks = <&xtal>;
- clock-names = "xtal";
- };
-};
-
-&hwrng {
- clocks = <&clkc CLKID_RNG0>;
- clock-names = "core";
-};
-
-&i2c_A {
- clocks = <&clkc CLKID_I2C>;
-};
-
-&i2c_AO {
- clocks = <&clkc CLKID_AO_I2C>;
-};
-
-&i2c_B {
- clocks = <&clkc CLKID_I2C>;
-};
-
-&i2c_C {
- clocks = <&clkc CLKID_I2C>;
-};
-
-&periphs {
- pinctrl_periphs: pinctrl@4b0 {
- compatible = "amlogic,meson-gxl-periphs-pinctrl";
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- gpio: bank@4b0 {
- reg = <0x0 0x004b0 0x0 0x28>,
- <0x0 0x004e8 0x0 0x14>,
- <0x0 0x00520 0x0 0x14>,
- <0x0 0x00430 0x0 0x40>;
- reg-names = "mux", "pull", "pull-enable", "gpio";
- gpio-controller;
- #gpio-cells = <2>;
- gpio-ranges = <&pinctrl_periphs 0 0 100>;
- };
-
- emmc_pins: emmc {
- mux-0 {
- groups = "emmc_nand_d07",
- "emmc_cmd";
- function = "emmc";
- bias-pull-up;
- };
-
- mux-1 {
- groups = "emmc_clk";
- function = "emmc";
- bias-disable;
- };
- };
-
- emmc_ds_pins: emmc-ds {
- mux {
- groups = "emmc_ds";
- function = "emmc";
- bias-pull-down;
- };
- };
-
- emmc_clk_gate_pins: emmc_clk_gate {
- mux {
- groups = "BOOT_8";
- function = "gpio_periphs";
- bias-pull-down;
- };
- };
-
- nor_pins: nor {
- mux {
- groups = "nor_d",
- "nor_q",
- "nor_c",
- "nor_cs";
- function = "nor";
- bias-disable;
- };
- };
-
- spi_pins: spi-pins {
- mux {
- groups = "spi_miso",
- "spi_mosi",
- "spi_sclk";
- function = "spi";
- bias-disable;
- };
- };
-
- spi_idle_high_pins: spi-idle-high-pins {
- mux {
- groups = "spi_sclk";
- bias-pull-up;
- };
- };
-
- spi_idle_low_pins: spi-idle-low-pins {
- mux {
- groups = "spi_sclk";
- bias-pull-down;
- };
- };
-
- spi_ss0_pins: spi-ss0 {
- mux {
- groups = "spi_ss0";
- function = "spi";
- bias-disable;
- };
- };
-
- sdcard_pins: sdcard {
- mux-0 {
- groups = "sdcard_d0",
- "sdcard_d1",
- "sdcard_d2",
- "sdcard_d3",
- "sdcard_cmd";
- function = "sdcard";
- bias-pull-up;
- };
-
- mux-1 {
- groups = "sdcard_clk";
- function = "sdcard";
- bias-disable;
- };
- };
-
- sdcard_clk_gate_pins: sdcard_clk_gate {
- mux {
- groups = "CARD_2";
- function = "gpio_periphs";
- bias-pull-down;
- };
- };
-
- sdio_pins: sdio {
- mux-0 {
- groups = "sdio_d0",
- "sdio_d1",
- "sdio_d2",
- "sdio_d3",
- "sdio_cmd";
- function = "sdio";
- bias-pull-up;
- };
-
- mux-1 {
- groups = "sdio_clk";
- function = "sdio";
- bias-disable;
- };
- };
-
- sdio_clk_gate_pins: sdio_clk_gate {
- mux {
- groups = "GPIOX_4";
- function = "gpio_periphs";
- bias-pull-down;
- };
- };
-
- sdio_irq_pins: sdio_irq {
- mux {
- groups = "sdio_irq";
- function = "sdio";
- bias-disable;
- };
- };
-
- uart_a_pins: uart_a {
- mux {
- groups = "uart_tx_a",
- "uart_rx_a";
- function = "uart_a";
- bias-disable;
- };
- };
-
- uart_a_cts_rts_pins: uart_a_cts_rts {
- mux {
- groups = "uart_cts_a",
- "uart_rts_a";
- function = "uart_a";
- bias-disable;
- };
- };
-
- uart_b_pins: uart_b {
- mux {
- groups = "uart_tx_b",
- "uart_rx_b";
- function = "uart_b";
- bias-disable;
- };
- };
-
- uart_b_cts_rts_pins: uart_b_cts_rts {
- mux {
- groups = "uart_cts_b",
- "uart_rts_b";
- function = "uart_b";
- bias-disable;
- };
- };
-
- uart_c_pins: uart_c {
- mux {
- groups = "uart_tx_c",
- "uart_rx_c";
- function = "uart_c";
- bias-disable;
- };
- };
-
- uart_c_cts_rts_pins: uart_c_cts_rts {
- mux {
- groups = "uart_cts_c",
- "uart_rts_c";
- function = "uart_c";
- bias-disable;
- };
- };
-
- i2c_a_pins: i2c_a {
- mux {
- groups = "i2c_sck_a",
- "i2c_sda_a";
- function = "i2c_a";
- bias-disable;
- };
- };
-
- i2c_b_pins: i2c_b {
- mux {
- groups = "i2c_sck_b",
- "i2c_sda_b";
- function = "i2c_b";
- bias-disable;
- };
- };
-
- i2c_c_pins: i2c_c {
- mux {
- groups = "i2c_sck_c",
- "i2c_sda_c";
- function = "i2c_c";
- bias-disable;
- };
- };
-
- i2c_c_dv18_pins: i2c_c_dv18 {
- mux {
- groups = "i2c_sck_c_dv19",
- "i2c_sda_c_dv18";
- function = "i2c_c";
- bias-disable;
- };
- };
-
- eth_pins: eth_c {
- mux {
- groups = "eth_mdio",
- "eth_mdc",
- "eth_clk_rx_clk",
- "eth_rx_dv",
- "eth_rxd0",
- "eth_rxd1",
- "eth_rxd2",
- "eth_rxd3",
- "eth_rgmii_tx_clk",
- "eth_tx_en",
- "eth_txd0",
- "eth_txd1",
- "eth_txd2",
- "eth_txd3";
- function = "eth";
- bias-disable;
- };
- };
-
- eth_link_led_pins: eth_link_led {
- mux {
- groups = "eth_link_led";
- function = "eth_led";
- bias-disable;
- };
- };
-
- eth_act_led_pins: eth_act_led {
- mux {
- groups = "eth_act_led";
- function = "eth_led";
- };
- };
-
- pwm_a_pins: pwm_a {
- mux {
- groups = "pwm_a";
- function = "pwm_a";
- bias-disable;
- };
- };
-
- pwm_b_pins: pwm_b {
- mux {
- groups = "pwm_b";
- function = "pwm_b";
- bias-disable;
- };
- };
-
- pwm_c_pins: pwm_c {
- mux {
- groups = "pwm_c";
- function = "pwm_c";
- bias-disable;
- };
- };
-
- pwm_d_pins: pwm_d {
- mux {
- groups = "pwm_d";
- function = "pwm_d";
- bias-disable;
- };
- };
-
- pwm_e_pins: pwm_e {
- mux {
- groups = "pwm_e";
- function = "pwm_e";
- bias-disable;
- };
- };
-
- pwm_f_clk_pins: pwm_f_clk {
- mux {
- groups = "pwm_f_clk";
- function = "pwm_f";
- bias-disable;
- };
- };
-
- pwm_f_x_pins: pwm_f_x {
- mux {
- groups = "pwm_f_x";
- function = "pwm_f";
- bias-disable;
- };
- };
-
- hdmi_hpd_pins: hdmi_hpd {
- mux {
- groups = "hdmi_hpd";
- function = "hdmi_hpd";
- bias-disable;
- };
- };
-
- hdmi_i2c_pins: hdmi_i2c {
- mux {
- groups = "hdmi_sda", "hdmi_scl";
- function = "hdmi_i2c";
- bias-disable;
- };
- };
-
- i2s_am_clk_pins: i2s_am_clk {
- mux {
- groups = "i2s_am_clk";
- function = "i2s_out";
- bias-disable;
- };
- };
-
- i2s_out_ao_clk_pins: i2s_out_ao_clk {
- mux {
- groups = "i2s_out_ao_clk";
- function = "i2s_out";
- bias-disable;
- };
- };
-
- i2s_out_lr_clk_pins: i2s_out_lr_clk {
- mux {
- groups = "i2s_out_lr_clk";
- function = "i2s_out";
- bias-disable;
- };
- };
-
- i2s_out_ch01_pins: i2s_out_ch01 {
- mux {
- groups = "i2s_out_ch01";
- function = "i2s_out";
- bias-disable;
- };
- };
- i2sout_ch23_z_pins: i2sout_ch23_z {
- mux {
- groups = "i2sout_ch23_z";
- function = "i2s_out";
- bias-disable;
- };
- };
-
- i2sout_ch45_z_pins: i2sout_ch45_z {
- mux {
- groups = "i2sout_ch45_z";
- function = "i2s_out";
- bias-disable;
- };
- };
-
- i2sout_ch67_z_pins: i2sout_ch67_z {
- mux {
- groups = "i2sout_ch67_z";
- function = "i2s_out";
- bias-disable;
- };
- };
-
- spdif_out_h_pins: spdif_out_ao_h {
- mux {
- groups = "spdif_out_h";
- function = "spdif_out";
- bias-disable;
- };
- };
- };
-
- eth_phy_mux: mdio@558 {
- reg = <0x0 0x558 0x0 0xc>;
- compatible = "amlogic,gxl-mdio-mux";
- #address-cells = <1>;
- #size-cells = <0>;
- clocks = <&clkc CLKID_FCLK_DIV4>;
- clock-names = "ref";
- mdio-parent-bus = <&mdio0>;
-
- external_mdio: mdio@0 {
- reg = <0x0>;
- #address-cells = <1>;
- #size-cells = <0>;
- };
-
- internal_mdio: mdio@1 {
- reg = <0x1>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- internal_phy: ethernet-phy@8 {
- compatible = "ethernet-phy-id0181.4400";
- interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
- reg = <8>;
- max-speed = <100>;
- };
- };
- };
-};
-
-&pwrc {
- resets = <&reset RESET_VIU>,
- <&reset RESET_VENC>,
- <&reset RESET_VCBUS>,
- <&reset RESET_BT656>,
- <&reset RESET_DVIN_RESET>,
- <&reset RESET_RDMA>,
- <&reset RESET_VENCI>,
- <&reset RESET_VENCP>,
- <&reset RESET_VDAC>,
- <&reset RESET_VDI6>,
- <&reset RESET_VENCL>,
- <&reset RESET_VID_LOCK>;
- reset-names = "viu", "venc", "vcbus", "bt656",
- "dvin", "rdma", "venci", "vencp",
- "vdac", "vdi6", "vencl", "vid_lock";
- clocks = <&clkc CLKID_VPU>,
- <&clkc CLKID_VAPB>;
- clock-names = "vpu", "vapb";
- /*
- * VPU clocking is provided by two identical clock paths
- * VPU_0 and VPU_1 muxed to a single clock by a glitch
- * free mux to safely change frequency while running.
- * Same for VAPB but with a final gate after the glitch free mux.
- */
- assigned-clocks = <&clkc CLKID_VPU_0_SEL>,
- <&clkc CLKID_VPU_0>,
- <&clkc CLKID_VPU>, /* Glitch free mux */
- <&clkc CLKID_VAPB_0_SEL>,
- <&clkc CLKID_VAPB_0>,
- <&clkc CLKID_VAPB_SEL>; /* Glitch free mux */
- assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>,
- <0>, /* Do Nothing */
- <&clkc CLKID_VPU_0>,
- <&clkc CLKID_FCLK_DIV4>,
- <0>, /* Do Nothing */
- <&clkc CLKID_VAPB_0>;
- assigned-clock-rates = <0>, /* Do Nothing */
- <666666666>,
- <0>, /* Do Nothing */
- <0>, /* Do Nothing */
- <250000000>,
- <0>; /* Do Nothing */
-};
-
-&saradc {
- compatible = "amlogic,meson-gxl-saradc", "amlogic,meson-saradc";
- clocks = <&xtal>,
- <&clkc CLKID_SAR_ADC>,
- <&clkc CLKID_SAR_ADC_CLK>,
- <&clkc CLKID_SAR_ADC_SEL>;
- clock-names = "clkin", "core", "adc_clk", "adc_sel";
-};
-
-&sd_emmc_a {
- clocks = <&clkc CLKID_SD_EMMC_A>,
- <&clkc CLKID_SD_EMMC_A_CLK0>,
- <&clkc CLKID_FCLK_DIV2>;
- clock-names = "core", "clkin0", "clkin1";
- resets = <&reset RESET_SD_EMMC_A>;
-};
-
-&sd_emmc_b {
- clocks = <&clkc CLKID_SD_EMMC_B>,
- <&clkc CLKID_SD_EMMC_B_CLK0>,
- <&clkc CLKID_FCLK_DIV2>;
- clock-names = "core", "clkin0", "clkin1";
- resets = <&reset RESET_SD_EMMC_B>;
-};
-
-&sd_emmc_c {
- clocks = <&clkc CLKID_SD_EMMC_C>,
- <&clkc CLKID_SD_EMMC_C_CLK0>,
- <&clkc CLKID_FCLK_DIV2>;
- clock-names = "core", "clkin0", "clkin1";
- resets = <&reset RESET_SD_EMMC_C>;
-};
-
-&simplefb_hdmi {
- clocks = <&clkc CLKID_HDMI_PCLK>,
- <&clkc CLKID_CLK81>,
- <&clkc CLKID_GCLK_VENCI_INT0>;
-};
-
-&spicc {
- clocks = <&clkc CLKID_SPICC>;
- clock-names = "core";
- resets = <&reset RESET_PERIPHS_SPICC>;
- num-cs = <1>;
-};
-
-&spifc {
- clocks = <&clkc CLKID_SPI>;
-};
-
-&uart_A {
- clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>;
- clock-names = "xtal", "pclk", "baud";
-};
-
-&uart_AO {
- clocks = <&xtal>, <&clkc_AO CLKID_AO_UART1>, <&xtal>;
- clock-names = "xtal", "pclk", "baud";
-};
-
-&uart_AO_B {
- clocks = <&xtal>, <&clkc_AO CLKID_AO_UART2>, <&xtal>;
- clock-names = "xtal", "pclk", "baud";
-};
-
-&uart_B {
- clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>;
- clock-names = "xtal", "pclk", "baud";
-};
-
-&uart_C {
- clocks = <&xtal>, <&clkc CLKID_UART2>, <&xtal>;
- clock-names = "xtal", "pclk", "baud";
-};
-
-&vpu {
- compatible = "amlogic,meson-gxl-vpu", "amlogic,meson-gx-vpu";
- power-domains = <&pwrc PWRC_GXBB_VPU_ID>;
-};
-
-&vdec {
- compatible = "amlogic,gxl-vdec", "amlogic,gx-vdec";
- clocks = <&clkc CLKID_DOS_PARSER>,
- <&clkc CLKID_DOS>,
- <&clkc CLKID_VDEC_1>,
- <&clkc CLKID_VDEC_HEVC>;
- clock-names = "dos_parser", "dos", "vdec_1", "vdec_hevc";
- resets = <&reset RESET_PARSER>;
- reset-names = "esparser";
-};
diff --git a/arch/arm/dts/meson-gxm-gt1-ultimate.dts b/arch/arm/dts/meson-gxm-gt1-ultimate.dts
deleted file mode 100644
index 2c26788..0000000
--- a/arch/arm/dts/meson-gxm-gt1-ultimate.dts
+++ /dev/null
@@ -1,91 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) Christian Hewitt <christianshewitt@gmail.com>
- */
-
-/dts-v1/;
-
-#include "meson-gxm.dtsi"
-#include "meson-gx-p23x-q20x.dtsi"
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/leds/common.h>
-
-/ {
- compatible = "azw,gt1-ultimate", "amlogic,s912", "amlogic,meson-gxm";
- model = "Beelink GT1 Ultimate";
-
- leds {
- compatible = "gpio-leds";
-
- led-white {
- color = <LED_COLOR_ID_WHITE>;
- function = LED_FUNCTION_POWER;
- gpios = <&gpio_ao GPIOAO_9 GPIO_ACTIVE_HIGH>;
- default-state = "on";
- panic-indicator;
- };
- };
-
- adc-keys {
- compatible = "adc-keys";
- io-channels = <&saradc 0>;
- io-channel-names = "buttons";
- keyup-threshold-microvolt = <1710000>;
-
- button-function {
- label = "update";
- linux,code = <KEY_VENDOR>;
- press-threshold-microvolt = <10000>;
- };
- };
-};
-
-ðmac {
- pinctrl-0 = <ð_pins>;
- pinctrl-names = "default";
- phy-handle = <&external_phy>;
- amlogic,tx-delay-ns = <2>;
- phy-mode = "rgmii";
-};
-
-&external_mdio {
- external_phy: ethernet-phy@0 {
- /* Realtek RTL8211F (0x001cc916) */
- reg = <0>;
- max-speed = <1000>;
-
- reset-assert-us = <10000>;
- reset-deassert-us = <80000>;
- reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>;
-
- interrupt-parent = <&gpio_intc>;
- /* MAC_INTR on GPIOZ_15 */
- interrupts = <25 IRQ_TYPE_LEVEL_LOW>;
- };
-};
-
-&ir {
- linux,rc-map-name = "rc-beelink-gs1";
-};
-
-&sd_emmc_a {
- brcmf: wifi@1 {
- reg = <1>;
- compatible = "brcm,bcm4329-fmac";
- };
-};
-
-&uart_A {
- status = "okay";
- pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
- pinctrl-names = "default";
- uart-has-rtscts;
-
- bluetooth {
- compatible = "brcm,bcm43438-bt";
- shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
- max-speed = <2000000>;
- clocks = <&wifi32k>;
- clock-names = "lpo";
- };
-};
diff --git a/arch/arm/dts/meson-gxm-khadas-vim2.dts b/arch/arm/dts/meson-gxm-khadas-vim2.dts
deleted file mode 100644
index 74897a1..0000000
--- a/arch/arm/dts/meson-gxm-khadas-vim2.dts
+++ /dev/null
@@ -1,424 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2017 Martin Blumenstingl <martin.blumenstingl@googlemail.com>.
- * Copyright (c) 2017 BayLibre, SAS
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- */
-
-/dts-v1/;
-
-#include "meson-gxm.dtsi"
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/sound/meson-aiu.h>
-
-/ {
- compatible = "khadas,vim2", "amlogic,s912", "amlogic,meson-gxm";
- model = "Khadas VIM2";
-
- aliases {
- serial0 = &uart_AO;
- serial2 = &uart_AO_B;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- memory@0 {
- device_type = "memory";
- reg = <0x0 0x0 0x0 0x80000000>;
- };
-
- adc-keys {
- compatible = "adc-keys";
- io-channels = <&saradc 0>;
- io-channel-names = "buttons";
- keyup-threshold-microvolt = <1710000>;
-
- button-function {
- label = "Function";
- linux,code = <KEY_FN>;
- press-threshold-microvolt = <10000>;
- };
- };
-
- emmc_pwrseq: emmc-pwrseq {
- compatible = "mmc-pwrseq-emmc";
- reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
- };
-
- gpio_fan: gpio-fan {
- compatible = "gpio-fan";
- gpios = <&gpio GPIODV_14 GPIO_ACTIVE_HIGH
- &gpio GPIODV_15 GPIO_ACTIVE_HIGH>;
- /* Dummy RPM values since fan is optional */
- gpio-fan,speed-map =
- <0 0>,
- <1 1>,
- <2 2>,
- <3 3>;
- #cooling-cells = <2>;
- };
-
- gpio-keys-polled {
- compatible = "gpio-keys-polled";
- poll-interval = <100>;
-
- power-button {
- label = "power";
- linux,code = <KEY_POWER>;
- gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_LOW>;
- };
- };
-
- hdmi-connector {
- compatible = "hdmi-connector";
- type = "a";
-
- port {
- hdmi_connector_in: endpoint {
- remote-endpoint = <&hdmi_tx_tmds_out>;
- };
- };
- };
-
- led-controller {
- compatible = "pwm-leds";
-
- led-1 {
- label = "vim:red:power";
- pwms = <&pwm_AO_ab 1 7812500 0>;
- max-brightness = <255>;
- linux,default-trigger = "default-on";
- };
- };
-
- sdio_pwrseq: sdio-pwrseq {
- compatible = "mmc-pwrseq-simple";
- reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
- clocks = <&wifi32k>;
- clock-names = "ext_clock";
- };
-
- hdmi_5v: regulator-hdmi-5v {
- compatible = "regulator-fixed";
-
- regulator-name = "HDMI_5V";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
-
- gpio = <&gpio GPIOH_3 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- regulator-always-on;
- };
-
- vcc_3v3: regulator-vcc_3v3 {
- compatible = "regulator-fixed";
- regulator-name = "VCC_3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- };
-
- vddio_ao18: regulator-vddio_ao18 {
- compatible = "regulator-fixed";
- regulator-name = "VDDIO_AO18";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- };
-
- vddio_boot: regulator-vddio_boot {
- compatible = "regulator-fixed";
- regulator-name = "VDDIO_BOOT";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- };
-
- vddao_3v3: regulator-vddao_3v3 {
- compatible = "regulator-fixed";
- regulator-name = "VDDAO_3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- };
-
- wifi32k: wifi32k {
- compatible = "pwm-clock";
- #clock-cells = <0>;
- clock-frequency = <32768>;
- pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
- };
-
- sound {
- compatible = "amlogic,gx-sound-card";
- model = "KHADAS-VIM2";
- assigned-clocks = <&clkc CLKID_MPLL0>,
- <&clkc CLKID_MPLL1>,
- <&clkc CLKID_MPLL2>;
- assigned-clock-parents = <0>, <0>, <0>;
- assigned-clock-rates = <294912000>,
- <270950400>,
- <393216000>;
- status = "okay";
-
- dai-link-0 {
- sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>;
- };
-
- dai-link-1 {
- sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>;
- dai-format = "i2s";
- mclk-fs = <256>;
-
- codec-0 {
- sound-dai = <&aiu AIU_HDMI CTRL_I2S>;
- };
- };
-
- dai-link-2 {
- sound-dai = <&aiu AIU_HDMI CTRL_OUT>;
-
- codec-0 {
- sound-dai = <&hdmi_tx>;
- };
- };
- };
-};
-
-&aiu {
- status = "okay";
-};
-
-&cec_AO {
- status = "okay";
- pinctrl-0 = <&ao_cec_pins>;
- pinctrl-names = "default";
- hdmi-phandle = <&hdmi_tx>;
-};
-
-&cpu_cooling_maps {
- map0 {
- cooling-device = <&gpio_fan THERMAL_NO_LIMIT 1>;
- };
-
- map1 {
- cooling-device = <&gpio_fan 2 THERMAL_NO_LIMIT>,
- <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- };
-};
-
-ðmac {
- pinctrl-0 = <ð_pins>;
- pinctrl-names = "default";
-
- /* Select external PHY by default */
- phy-handle = <&external_phy>;
-
- amlogic,tx-delay-ns = <2>;
-
- /* External PHY is in RGMII */
- phy-mode = "rgmii";
-
- status = "okay";
-};
-
-&external_mdio {
- external_phy: ethernet-phy@0 {
- /* Realtek RTL8211F (0x001cc916) */
- reg = <0>;
-
- reset-assert-us = <10000>;
- reset-deassert-us = <80000>;
- reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>;
-
- interrupt-parent = <&gpio_intc>;
- /* MAC_INTR on GPIOZ_15 */
- interrupts = <25 IRQ_TYPE_LEVEL_LOW>;
- };
-};
-
-&hdmi_tx {
- status = "okay";
- pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>;
- pinctrl-names = "default";
- hdmi-supply = <&hdmi_5v>;
-};
-
-&hdmi_tx_tmds_port {
- hdmi_tx_tmds_out: endpoint {
- remote-endpoint = <&hdmi_connector_in>;
- };
-};
-
-&i2c_A {
- status = "okay";
- pinctrl-0 = <&i2c_a_pins>;
- pinctrl-names = "default";
-};
-
-&i2c_B {
- status = "okay";
- pinctrl-0 = <&i2c_b_pins>;
- pinctrl-names = "default";
-
- rtc: rtc@51 {
- status = "okay";
- compatible = "haoyu,hym8563";
- reg = <0x51>;
- #clock-cells = <0>;
- clock-output-names = "xin32k";
- };
-};
-
-&ir {
- status = "okay";
- pinctrl-0 = <&remote_input_ao_pins>;
- pinctrl-names = "default";
- linux,rc-map-name = "rc-khadas";
-};
-
-&pwm_AO_ab {
- status = "okay";
- pinctrl-0 = <&pwm_ao_a_3_pins>, <&pwm_ao_b_pins>;
- pinctrl-names = "default";
- clocks = <&clkc CLKID_FCLK_DIV4>;
- clock-names = "clkin0";
-};
-
-&pwm_ef {
- status = "okay";
- pinctrl-0 = <&pwm_e_pins>, <&pwm_f_clk_pins>;
- pinctrl-names = "default";
- clocks = <&clkc CLKID_FCLK_DIV4>;
- clock-names = "clkin0";
-};
-
-&sd_emmc_a {
- status = "okay";
- pinctrl-0 = <&sdio_pins>;
- pinctrl-1 = <&sdio_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
- #address-cells = <1>;
- #size-cells = <0>;
-
- bus-width = <4>;
- cap-sd-highspeed;
- max-frequency = <100000000>;
-
- non-removable;
- disable-wp;
-
- /* WiFi firmware requires power to be kept while in suspend */
- keep-power-in-suspend;
-
- mmc-pwrseq = <&sdio_pwrseq>;
-
- vmmc-supply = <&vddao_3v3>;
- vqmmc-supply = <&vddio_boot>;
-
- brcmf: wifi@1 {
- reg = <1>;
- compatible = "brcm,bcm4329-fmac";
- };
-};
-
-/* SD card */
-&sd_emmc_b {
- status = "okay";
- pinctrl-0 = <&sdcard_pins>;
- pinctrl-1 = <&sdcard_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <4>;
- cap-sd-highspeed;
- max-frequency = <50000000>;
- disable-wp;
-
- cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>;
-
- vmmc-supply = <&vddao_3v3>;
- vqmmc-supply = <&vddio_boot>;
-};
-
-/* eMMC */
-&sd_emmc_c {
- status = "okay";
- pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>;
- pinctrl-1 = <&emmc_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <8>;
- cap-mmc-highspeed;
- max-frequency = <200000000>;
- non-removable;
- disable-wp;
- mmc-ddr-1_8v;
- mmc-hs200-1_8v;
-
- mmc-pwrseq = <&emmc_pwrseq>;
- vmmc-supply = <&vcc_3v3>;
- vqmmc-supply = <&vddio_boot>;
-};
-
-/*
- * EMMC_DS pin is shared between SPI NOR CS and eMMC Data Strobe
- * Remove emmc_ds_pins from sd_emmc_c pinctrl-0 then spifc can be enabled
- */
-&spifc {
- status = "disabled";
- pinctrl-0 = <&nor_pins>;
- pinctrl-names = "default";
-
- w25q32: flash@0 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "winbond,w25q16", "jedec,spi-nor";
- reg = <0>;
- spi-max-frequency = <104000000>;
- };
-};
-
-/* This one is connected to the Bluetooth module */
-&uart_A {
- status = "okay";
- pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
- pinctrl-names = "default";
- uart-has-rtscts;
-
- bluetooth {
- compatible = "brcm,bcm43438-bt";
- shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
- max-speed = <2000000>;
- clocks = <&wifi32k>;
- clock-names = "lpo";
- };
-};
-
-/* This is brought out on the Linux_RX (18) and Linux_TX (19) pins: */
-&uart_AO {
- status = "okay";
- pinctrl-0 = <&uart_ao_a_pins>;
- pinctrl-names = "default";
-};
-
-/* This is brought out on the UART_RX_AO_B (15) and UART_TX_AO_B (16) pins: */
-&uart_AO_B {
- status = "okay";
- pinctrl-0 = <&uart_ao_b_pins>;
- pinctrl-names = "default";
-};
-
-&saradc {
- status = "okay";
- vref-supply = <&vddio_ao18>;
-};
-
-&usb {
- status = "okay";
- dr_mode = "peripheral";
-};
diff --git a/arch/arm/dts/meson-gxm-s912-libretech-pc.dts b/arch/arm/dts/meson-gxm-s912-libretech-pc.dts
deleted file mode 100644
index 444c249..0000000
--- a/arch/arm/dts/meson-gxm-s912-libretech-pc.dts
+++ /dev/null
@@ -1,62 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Copyright (c) 2019 BayLibre SAS. All rights reserved.
- * Author: Jerome Brunet <jbrunet@baylibre.com>
- */
-
-/dts-v1/;
-
-#include "meson-gxm.dtsi"
-#include "meson-gx-libretech-pc.dtsi"
-
-/ {
- compatible = "libretech,aml-s912-pc", "amlogic,s912",
- "amlogic,meson-gxm";
- model = "Libre Computer AML-S912-PC";
-
- typec2_vbus: regulator-typec2_vbus {
- compatible = "regulator-fixed";
- regulator-name = "TYPEC2_VBUS";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc5v>;
-
- gpio = <&gpio GPIODV_1 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
-};
-
-&pinctrl_periphs {
- /*
- * Make sure the irq pin of the TYPE C controller is not driven
- * by the SoC.
- */
- fusb302_irq_pins: fusb302_irq {
- mux {
- groups = "GPIODV_0";
- function = "gpio_periphs";
- bias-pull-up;
- output-disable;
- };
- };
-};
-
-&i2c_C {
- fusb302@22 {
- compatible = "fcs,fusb302";
- reg = <0x22>;
-
- pinctrl-0 = <&fusb302_irq_pins>;
- pinctrl-names = "default";
- interrupt-parent = <&gpio_intc>;
- interrupts = <59 IRQ_TYPE_LEVEL_LOW>;
-
- vbus-supply = <&typec2_vbus>;
-
- status = "okay";
- };
-};
-
-&usb2_phy2 {
- phy-supply = <&typec2_vbus>;
-};
diff --git a/arch/arm/dts/meson-gxm-wetek-core2.dts b/arch/arm/dts/meson-gxm-wetek-core2.dts
deleted file mode 100644
index f8c4034..0000000
--- a/arch/arm/dts/meson-gxm-wetek-core2.dts
+++ /dev/null
@@ -1,85 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2020 Christian Hewitt <christianshewitt@gmail.com>
- */
-
-/dts-v1/;
-
-#include "meson-gxm.dtsi"
-#include "meson-gx-p23x-q20x.dtsi"
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/leds/common.h>
-
-/ {
- compatible = "wetek,core2", "amlogic,s912", "amlogic,meson-gxm";
- model = "WeTek Core 2";
-
- memory@0 {
- device_type = "memory";
- reg = <0x0 0x0 0x0 0x80000000>; /* 2 GiB or 3 GiB */
- };
-
- leds {
- compatible = "gpio-leds";
-
- led-blue {
- color = <LED_COLOR_ID_BLUE>;
- function = LED_FUNCTION_STATUS;
- gpios = <&gpio GPIODV_24 GPIO_ACTIVE_HIGH>;
- default-state = "on";
- };
- };
-
- adc-keys {
- compatible = "adc-keys";
- io-channels = <&saradc 0>;
- io-channel-names = "buttons";
- keyup-threshold-microvolt = <1710000>;
-
- button-update {
- label = "update";
- linux,code = <KEY_VENDOR>;
- press-threshold-microvolt = <10000>;
- };
- };
-
- gpio-keys-polled {
- compatible = "gpio-keys-polled";
- poll-interval = <100>;
-
- button-power {
- label = "power";
- linux,code = <KEY_POWER>;
- gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_LOW>;
- };
- };
-};
-
-/* Disabled as Realtek RTL8152 USB provides Ethernet */
-ðmac {
- status = "disabled";
-};
-
-&internal_phy {
- status = "disabled";
-};
-
-&ir {
- linux,rc-map-name = "rc-wetek-play2";
-};
-
-/* This is connected to the Bluetooth module: */
-&uart_A {
- status = "okay";
- pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
- pinctrl-names = "default";
- uart-has-rtscts;
-
- bluetooth {
- compatible = "brcm,bcm43438-bt";
- shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
- max-speed = <2000000>;
- clocks = <&wifi32k>;
- clock-names = "lpo";
- };
-};
diff --git a/arch/arm/dts/meson-gxm.dtsi b/arch/arm/dts/meson-gxm.dtsi
deleted file mode 100644
index 411cc31..0000000
--- a/arch/arm/dts/meson-gxm.dtsi
+++ /dev/null
@@ -1,216 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2016 Endless Computers, Inc.
- * Author: Carlo Caione <carlo@endlessm.com>
- */
-
-#include "meson-gxl.dtsi"
-
-/ {
- compatible = "amlogic,meson-gxm";
-
- cpus {
- cpu-map {
- cluster0 {
- core0 {
- cpu = <&cpu0>;
- };
- core1 {
- cpu = <&cpu1>;
- };
- core2 {
- cpu = <&cpu2>;
- };
- core3 {
- cpu = <&cpu3>;
- };
- };
-
- cluster1 {
- core0 {
- cpu = <&cpu4>;
- };
- core1 {
- cpu = <&cpu5>;
- };
- core2 {
- cpu = <&cpu6>;
- };
- core3 {
- cpu = <&cpu7>;
- };
- };
- };
-
- cpu0: cpu@0 {
- capacity-dmips-mhz = <1024>;
- };
-
- cpu1: cpu@1 {
- capacity-dmips-mhz = <1024>;
- };
-
- cpu2: cpu@2 {
- capacity-dmips-mhz = <1024>;
- };
-
- cpu3: cpu@3 {
- capacity-dmips-mhz = <1024>;
- };
-
- cpu4: cpu@100 {
- device_type = "cpu";
- compatible = "arm,cortex-a53";
- reg = <0x0 0x100>;
- enable-method = "psci";
- capacity-dmips-mhz = <1024>;
- next-level-cache = <&l2>;
- clocks = <&scpi_dvfs 1>;
- #cooling-cells = <2>;
- };
-
- cpu5: cpu@101 {
- device_type = "cpu";
- compatible = "arm,cortex-a53";
- reg = <0x0 0x101>;
- enable-method = "psci";
- capacity-dmips-mhz = <1024>;
- next-level-cache = <&l2>;
- clocks = <&scpi_dvfs 1>;
- #cooling-cells = <2>;
- };
-
- cpu6: cpu@102 {
- device_type = "cpu";
- compatible = "arm,cortex-a53";
- reg = <0x0 0x102>;
- enable-method = "psci";
- capacity-dmips-mhz = <1024>;
- next-level-cache = <&l2>;
- clocks = <&scpi_dvfs 1>;
- #cooling-cells = <2>;
- };
-
- cpu7: cpu@103 {
- device_type = "cpu";
- compatible = "arm,cortex-a53";
- reg = <0x0 0x103>;
- enable-method = "psci";
- capacity-dmips-mhz = <1024>;
- next-level-cache = <&l2>;
- clocks = <&scpi_dvfs 1>;
- #cooling-cells = <2>;
- };
- };
-
- gpu_opp_table: opp-table {
- compatible = "operating-points-v2";
-
- opp-125000000 {
- opp-hz = /bits/ 64 <125000000>;
- opp-microvolt = <950000>;
- };
- opp-250000000 {
- opp-hz = /bits/ 64 <250000000>;
- opp-microvolt = <950000>;
- };
- opp-285714285 {
- opp-hz = /bits/ 64 <285714285>;
- opp-microvolt = <950000>;
- };
- opp-400000000 {
- opp-hz = /bits/ 64 <400000000>;
- opp-microvolt = <950000>;
- };
- opp-500000000 {
- opp-hz = /bits/ 64 <500000000>;
- opp-microvolt = <950000>;
- };
- opp-666666666 {
- opp-hz = /bits/ 64 <666666666>;
- opp-microvolt = <950000>;
- };
- };
-};
-
-&apb {
- usb2_phy2: phy@78040 {
- compatible = "amlogic,meson-gxl-usb2-phy";
- #phy-cells = <0>;
- reg = <0x0 0x78040 0x0 0x20>;
- clocks = <&clkc CLKID_USB>;
- clock-names = "phy";
- resets = <&reset RESET_USB_OTG>;
- reset-names = "phy";
- status = "okay";
- };
-
- mali: gpu@c0000 {
- compatible = "amlogic,meson-gxm-mali", "arm,mali-t820";
- reg = <0x0 0xc0000 0x0 0x40000>;
- interrupt-parent = <&gic>;
- interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "job", "mmu", "gpu";
- clocks = <&clkc CLKID_MALI>;
- resets = <&reset RESET_MALI_CAPB3>, <&reset RESET_MALI>;
- operating-points-v2 = <&gpu_opp_table>;
- };
-};
-
-&clkc_AO {
- compatible = "amlogic,meson-gxm-aoclkc", "amlogic,meson-gx-aoclkc";
-};
-
-&cpu_cooling_maps {
- map0 {
- cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- };
-
- map1 {
- cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- };
-};
-
-&saradc {
- compatible = "amlogic,meson-gxm-saradc", "amlogic,meson-saradc";
-};
-
-&scpi_dvfs {
- clock-indices = <0 1>;
- clock-output-names = "vbig", "vlittle";
-};
-
-&vpu {
- compatible = "amlogic,meson-gxm-vpu", "amlogic,meson-gx-vpu";
-};
-
-&hdmi_tx {
- compatible = "amlogic,meson-gxm-dw-hdmi", "amlogic,meson-gx-dw-hdmi";
-};
-
-&usb {
- compatible = "amlogic,meson-gxm-usb-ctrl";
-
- phy-names = "usb2-phy0", "usb2-phy1", "usb2-phy2";
- phys = <&usb2_phy0>, <&usb2_phy1>, <&usb2_phy2>;
-};
-
-&vdec {
- compatible = "amlogic,gxm-vdec", "amlogic,gx-vdec";
-};
diff --git a/arch/arm/dts/meson-khadas-vim3.dtsi b/arch/arm/dts/meson-khadas-vim3.dtsi
deleted file mode 100644
index 3cf4ecb..0000000
--- a/arch/arm/dts/meson-khadas-vim3.dtsi
+++ /dev/null
@@ -1,534 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2019 BayLibre, SAS
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- * Copyright (c) 2019 Christian Hewitt <christianshewitt@gmail.com>
- */
-
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/leds/common.h>
-#include <dt-bindings/gpio/meson-g12a-gpio.h>
-#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
-
-/ {
- aliases {
- serial0 = &uart_AO;
- ethernet0 = ðmac;
- rtc0 = &rtc;
- rtc1 = &vrtc;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- memory@0 {
- device_type = "memory";
- reg = <0x0 0x0 0x0 0x80000000>;
- };
-
- adc-keys {
- compatible = "adc-keys";
- io-channels = <&saradc 2>;
- io-channel-names = "buttons";
- keyup-threshold-microvolt = <1710000>;
-
- button-function {
- label = "Function";
- linux,code = <KEY_FN>;
- press-threshold-microvolt = <10000>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- led-white {
- color = <LED_COLOR_ID_WHITE>;
- function = LED_FUNCTION_STATUS;
- gpios = <&gpio_ao GPIOAO_4 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "heartbeat";
- };
-
- led-red {
- color = <LED_COLOR_ID_RED>;
- function = LED_FUNCTION_STATUS;
- gpios = <&gpio_expander 5 GPIO_ACTIVE_HIGH>;
- };
- };
-
- emmc_pwrseq: emmc-pwrseq {
- compatible = "mmc-pwrseq-emmc";
- reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
- };
-
- gpio-keys-polled {
- compatible = "gpio-keys-polled";
- poll-interval = <100>;
-
- power-button {
- label = "power";
- linux,code = <KEY_POWER>;
- gpios = <&gpio_ao GPIOAO_7 GPIO_ACTIVE_LOW>;
- };
- };
-
- sdio_pwrseq: sdio-pwrseq {
- compatible = "mmc-pwrseq-simple";
- reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
- clocks = <&wifi32k>;
- clock-names = "ext_clock";
- };
-
- dc_in: regulator-dc_in {
- compatible = "regulator-fixed";
- regulator-name = "DC_IN";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- regulator-always-on;
- };
-
- vcc_5v: regulator-vcc_5v {
- compatible = "regulator-fixed";
- regulator-name = "VCC_5V";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&dc_in>;
-
- gpio = <&gpio GPIOH_8 GPIO_OPEN_DRAIN>;
- enable-active-high;
- };
-
- vcc_1v8: regulator-vcc_1v8 {
- compatible = "regulator-fixed";
- regulator-name = "VCC_1V8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vcc_3v3>;
- regulator-always-on;
- };
-
- vcc_3v3: regulator-vcc_3v3 {
- compatible = "regulator-fixed";
- regulator-name = "VCC_3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vsys_3v3>;
- regulator-always-on;
- /* FIXME: actually controlled by VDDCPU_B_EN */
- };
-
- vddao_1v8: regulator-vddao_1v8 {
- compatible = "regulator-fixed";
- regulator-name = "VDDIO_AO1V8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vsys_3v3>;
- regulator-always-on;
- };
-
- emmc_1v8: regulator-emmc_1v8 {
- compatible = "regulator-fixed";
- regulator-name = "EMMC_AO1V8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vcc_3v3>;
- regulator-always-on;
- };
-
- vsys_3v3: regulator-vsys_3v3 {
- compatible = "regulator-fixed";
- regulator-name = "VSYS_3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&dc_in>;
- regulator-always-on;
- };
-
- usb_pwr: regulator-usb_pwr {
- compatible = "regulator-fixed";
- regulator-name = "USB_PWR";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc_5v>;
-
- gpio = <&gpio GPIOA_6 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
-
- hdmi-connector {
- compatible = "hdmi-connector";
- type = "a";
-
- port {
- hdmi_connector_in: endpoint {
- remote-endpoint = <&hdmi_tx_tmds_out>;
- };
- };
- };
-
-
- sound {
- compatible = "amlogic,axg-sound-card";
- model = "KHADAS-VIM3";
- audio-aux-devs = <&tdmin_a>, <&tdmout_a>;
- audio-routing = "TDMOUT_A IN 0", "FRDDR_A OUT 0",
- "TDMOUT_A IN 1", "FRDDR_B OUT 0",
- "TDMOUT_A IN 2", "FRDDR_C OUT 0",
- "TDM_A Playback", "TDMOUT_A OUT",
- "TDMIN_A IN 0", "TDM_A Capture",
- "TDMIN_A IN 3", "TDM_A Loopback",
- "TODDR_A IN 0", "TDMIN_A OUT",
- "TODDR_B IN 0", "TDMIN_A OUT",
- "TODDR_C IN 0", "TDMIN_A OUT";
-
- assigned-clocks = <&clkc CLKID_MPLL2>,
- <&clkc CLKID_MPLL0>,
- <&clkc CLKID_MPLL1>;
- assigned-clock-parents = <0>, <0>, <0>;
- assigned-clock-rates = <294912000>,
- <270950400>,
- <393216000>;
- status = "okay";
-
- dai-link-0 {
- sound-dai = <&frddr_a>;
- };
-
- dai-link-1 {
- sound-dai = <&frddr_b>;
- };
-
- dai-link-2 {
- sound-dai = <&frddr_c>;
- };
-
- dai-link-3 {
- sound-dai = <&toddr_a>;
- };
-
- dai-link-4 {
- sound-dai = <&toddr_b>;
- };
-
- dai-link-5 {
- sound-dai = <&toddr_c>;
- };
-
- /* 8ch hdmi interface */
- dai-link-6 {
- sound-dai = <&tdmif_a>;
- dai-format = "i2s";
- dai-tdm-slot-tx-mask-0 = <1 1>;
- dai-tdm-slot-tx-mask-1 = <1 1>;
- dai-tdm-slot-tx-mask-2 = <1 1>;
- dai-tdm-slot-tx-mask-3 = <1 1>;
- mclk-fs = <256>;
-
- codec {
- sound-dai = <&tohdmitx TOHDMITX_I2S_IN_A>;
- };
- };
-
- /* hdmi glue */
- dai-link-7 {
- sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
-
- codec {
- sound-dai = <&hdmi_tx>;
- };
- };
- };
-
- wifi32k: wifi32k {
- compatible = "pwm-clock";
- #clock-cells = <0>;
- clock-frequency = <32768>;
- pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
- };
-};
-
-&arb {
- status = "okay";
-};
-
-&clkc_audio {
- status = "okay";
-};
-
-&cec_AO {
- pinctrl-0 = <&cec_ao_a_h_pins>;
- pinctrl-names = "default";
- status = "disabled";
- hdmi-phandle = <&hdmi_tx>;
-};
-
-&cecb_AO {
- pinctrl-0 = <&cec_ao_b_h_pins>;
- pinctrl-names = "default";
- status = "okay";
- hdmi-phandle = <&hdmi_tx>;
-};
-
-&cpu_thermal {
- trips {
- cpu_active: cpu-active {
- temperature = <80000>; /* millicelsius */
- hysteresis = <2000>; /* millicelsius */
- type = "active";
- };
- };
-
- cooling-maps {
- map {
- trip = <&cpu_active>;
- cooling-device = <&khadas_mcu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- };
- };
-};
-
-&ext_mdio {
- external_phy: ethernet-phy@0 {
- /* Realtek RTL8211F (0x001cc916) */
- reg = <0>;
- max-speed = <1000>;
-
- interrupt-parent = <&gpio_intc>;
- /* MAC_INTR on GPIOZ_14 */
- interrupts = <26 IRQ_TYPE_LEVEL_LOW>;
- };
-};
-
-ðmac {
- pinctrl-0 = <ð_pins>, <ð_rgmii_pins>;
- pinctrl-names = "default";
- status = "okay";
- phy-mode = "rgmii";
- phy-handle = <&external_phy>;
- amlogic,tx-delay-ns = <2>;
-};
-
-&frddr_a {
- status = "okay";
-};
-
-&frddr_b {
- status = "okay";
-};
-
-&frddr_c {
- status = "okay";
-};
-
-&hdmi_tx {
- status = "okay";
- pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>;
- pinctrl-names = "default";
- hdmi-supply = <&vcc_5v>;
-};
-
-&hdmi_tx_tmds_port {
- hdmi_tx_tmds_out: endpoint {
- remote-endpoint = <&hdmi_connector_in>;
- };
-};
-
-&i2c_AO {
- status = "okay";
- pinctrl-0 = <&i2c_ao_sck_pins>, <&i2c_ao_sda_pins>;
- pinctrl-names = "default";
-
- khadas_mcu: system-controller@18 {
- compatible = "khadas,mcu";
- reg = <0x18>;
- #cooling-cells = <2>;
- };
-
- gpio_expander: gpio-controller@20 {
- compatible = "ti,tca6408";
- reg = <0x20>;
- vcc-supply = <&vcc_3v3>;
- gpio-controller;
- #gpio-cells = <2>;
- };
-
- rtc: rtc@51 {
- compatible = "haoyu,hym8563";
- reg = <0x51>;
- #clock-cells = <0>;
- };
-};
-
-&ir {
- status = "okay";
- pinctrl-0 = <&remote_input_ao_pins>;
- pinctrl-names = "default";
- linux,rc-map-name = "rc-khadas";
-};
-
-&pcie {
- reset-gpios = <&gpio GPIOA_8 GPIO_ACTIVE_LOW>;
-};
-
-&pwm_ef {
- status = "okay";
- pinctrl-0 = <&pwm_e_pins>;
- pinctrl-names = "default";
-};
-
-&saradc {
- status = "okay";
- vref-supply = <&vddao_1v8>;
-};
-
-/* SDIO */
-&sd_emmc_a {
- status = "okay";
- pinctrl-0 = <&sdio_pins>;
- pinctrl-1 = <&sdio_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
- #address-cells = <1>;
- #size-cells = <0>;
-
- bus-width = <4>;
- cap-sd-highspeed;
- max-frequency = <100000000>;
-
- non-removable;
- disable-wp;
-
- /* WiFi firmware requires power to be kept while in suspend */
- keep-power-in-suspend;
-
- mmc-pwrseq = <&sdio_pwrseq>;
-
- vmmc-supply = <&vsys_3v3>;
- vqmmc-supply = <&vddao_1v8>;
-
- brcmf: wifi@1 {
- reg = <1>;
- compatible = "brcm,bcm4329-fmac";
- };
-};
-
-/* SD card */
-&sd_emmc_b {
- status = "okay";
- pinctrl-0 = <&sdcard_c_pins>;
- pinctrl-1 = <&sdcard_clk_gate_c_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <4>;
- cap-sd-highspeed;
- max-frequency = <50000000>;
- disable-wp;
-
- cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
- vmmc-supply = <&vsys_3v3>;
- vqmmc-supply = <&vsys_3v3>;
-};
-
-/* eMMC */
-&sd_emmc_c {
- status = "okay";
- pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>;
- pinctrl-1 = <&emmc_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <8>;
- cap-mmc-highspeed;
- mmc-ddr-1_8v;
- mmc-hs200-1_8v;
- max-frequency = <200000000>;
- disable-wp;
-
- mmc-pwrseq = <&emmc_pwrseq>;
- vmmc-supply = <&vcc_3v3>;
- vqmmc-supply = <&emmc_1v8>;
-};
-
-/*
- * EMMC_D4, EMMC_D5, EMMC_D6 and EMMC_D7 pins are shared between SPI NOR CS
- * and eMMC Data 4 to 7 pins.
- * Replace emmc_data_8b_pins to emmc_data_4b_pins from sd_emmc_c pinctrl-0,
- * and change bus-width to 4 then spifc can be enabled.
- */
-&spifc {
- status = "disabled";
- pinctrl-0 = <&nor_pins>;
- pinctrl-names = "default";
-
- w25q128: spi-flash@0 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "winbond,w25q128fw", "jedec,spi-nor";
- reg = <0>;
- spi-max-frequency = <104000000>;
- };
-};
-
-&tdmif_a {
- status = "okay";
-};
-
-&tdmin_a {
- status = "okay";
-};
-
-&tdmout_a {
- status = "okay";
-};
-
-&toddr_a {
- status = "okay";
-};
-
-&toddr_b {
- status = "okay";
-};
-
-&toddr_c {
- status = "okay";
-};
-
-&tohdmitx {
- status = "okay";
-};
-
-&uart_A {
- status = "okay";
- pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
- pinctrl-names = "default";
- uart-has-rtscts;
-
- bluetooth {
- compatible = "brcm,bcm43438-bt";
- shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
- max-speed = <2000000>;
- clocks = <&wifi32k>;
- clock-names = "lpo";
- };
-};
-
-&uart_AO {
- status = "okay";
- pinctrl-0 = <&uart_ao_a_pins>;
- pinctrl-names = "default";
-};
-
-&usb2_phy0 {
- phy-supply = <&dc_in>;
-};
-
-&usb2_phy1 {
- phy-supply = <&usb_pwr>;
-};
-
-&usb3_pcie_phy {
- phy-supply = <&usb_pwr>;
-};
-
-&usb {
- status = "okay";
- dr_mode = "peripheral";
-};
diff --git a/arch/arm/dts/meson-sm1-bananapi-m2-pro.dts b/arch/arm/dts/meson-sm1-bananapi-m2-pro.dts
deleted file mode 100644
index 5860343..0000000
--- a/arch/arm/dts/meson-sm1-bananapi-m2-pro.dts
+++ /dev/null
@@ -1,97 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2021 BayLibre SAS
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- */
-
-/dts-v1/;
-
-#include "meson-sm1-bananapi.dtsi"
-#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
-
-/ {
- compatible = "bananapi,bpi-m2-pro", "amlogic,sm1";
- model = "Banana Pi BPI-M2-PRO";
-
- sound {
- compatible = "amlogic,axg-sound-card";
- model = "BPI-M2-PRO";
- audio-aux-devs = <&tdmout_b>;
- audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
- "TDMOUT_B IN 1", "FRDDR_B OUT 1",
- "TDMOUT_B IN 2", "FRDDR_C OUT 1",
- "TDM_B Playback", "TDMOUT_B OUT";
-
- assigned-clocks = <&clkc CLKID_MPLL2>,
- <&clkc CLKID_MPLL0>,
- <&clkc CLKID_MPLL1>;
- assigned-clock-parents = <0>, <0>, <0>;
- assigned-clock-rates = <294912000>,
- <270950400>,
- <393216000>;
-
- dai-link-0 {
- sound-dai = <&frddr_a>;
- };
-
- dai-link-1 {
- sound-dai = <&frddr_b>;
- };
-
- dai-link-2 {
- sound-dai = <&frddr_c>;
- };
-
- /* 8ch hdmi interface */
- dai-link-3 {
- sound-dai = <&tdmif_b>;
- dai-format = "i2s";
- dai-tdm-slot-tx-mask-0 = <1 1>;
- dai-tdm-slot-tx-mask-1 = <1 1>;
- dai-tdm-slot-tx-mask-2 = <1 1>;
- dai-tdm-slot-tx-mask-3 = <1 1>;
- mclk-fs = <256>;
-
- codec {
- sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
- };
- };
-
- /* hdmi glue */
- dai-link-4 {
- sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
-
- codec {
- sound-dai = <&hdmi_tx>;
- };
- };
- };
-};
-
-&clkc_audio {
- status = "okay";
-};
-
-&frddr_a {
- status = "okay";
-};
-
-&frddr_b {
- status = "okay";
-};
-
-&frddr_c {
- status = "okay";
-};
-
-&tdmif_b {
- status = "okay";
-};
-
-&tdmout_b {
- status = "okay";
-};
-
-&tohdmitx {
- status = "okay";
-};
diff --git a/arch/arm/dts/meson-sm1-bananapi-m5.dts b/arch/arm/dts/meson-sm1-bananapi-m5.dts
deleted file mode 100644
index f045bf8..0000000
--- a/arch/arm/dts/meson-sm1-bananapi-m5.dts
+++ /dev/null
@@ -1,221 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2021 BayLibre SAS
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- */
-
-/dts-v1/;
-
-#include "meson-sm1-bananapi.dtsi"
-#include <dt-bindings/sound/meson-g12a-toacodec.h>
-#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
-
-/ {
- compatible = "bananapi,bpi-m5", "amlogic,sm1";
- model = "Banana Pi BPI-M5";
-
- /* TOFIX: handle CVBS_DET on SARADC channel 0 */
- cvbs-connector {
- compatible = "composite-video-connector";
-
- port {
- cvbs_connector_in: endpoint {
- remote-endpoint = <&cvbs_vdac_out>;
- };
- };
- };
-
- sound {
- compatible = "amlogic,axg-sound-card";
- model = "BPI-M5";
- audio-widgets = "Line", "Lineout";
- audio-aux-devs = <&tdmout_b>, <&tdmout_c>,
- <&tdmin_a>, <&tdmin_b>, <&tdmin_c>;
- audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
- "TDMOUT_B IN 1", "FRDDR_B OUT 1",
- "TDMOUT_B IN 2", "FRDDR_C OUT 1",
- "TDM_B Playback", "TDMOUT_B OUT",
- "TDMOUT_C IN 0", "FRDDR_A OUT 2",
- "TDMOUT_C IN 1", "FRDDR_B OUT 2",
- "TDMOUT_C IN 2", "FRDDR_C OUT 2",
- "TDM_C Playback", "TDMOUT_C OUT",
- "TDMIN_A IN 4", "TDM_B Loopback",
- "TDMIN_B IN 4", "TDM_B Loopback",
- "TDMIN_C IN 4", "TDM_B Loopback",
- "TDMIN_A IN 5", "TDM_C Loopback",
- "TDMIN_B IN 5", "TDM_C Loopback",
- "TDMIN_C IN 5", "TDM_C Loopback",
- "TODDR_A IN 0", "TDMIN_A OUT",
- "TODDR_B IN 0", "TDMIN_A OUT",
- "TODDR_C IN 0", "TDMIN_A OUT",
- "TODDR_A IN 1", "TDMIN_B OUT",
- "TODDR_B IN 1", "TDMIN_B OUT",
- "TODDR_C IN 1", "TDMIN_B OUT",
- "TODDR_A IN 2", "TDMIN_C OUT",
- "TODDR_B IN 2", "TDMIN_C OUT",
- "TODDR_C IN 2", "TDMIN_C OUT",
- "Lineout", "ACODEC LOLP",
- "Lineout", "ACODEC LORP";
-
- assigned-clocks = <&clkc CLKID_MPLL2>,
- <&clkc CLKID_MPLL0>,
- <&clkc CLKID_MPLL1>;
- assigned-clock-parents = <0>, <0>, <0>;
- assigned-clock-rates = <294912000>,
- <270950400>,
- <393216000>;
-
- dai-link-0 {
- sound-dai = <&frddr_a>;
- };
-
- dai-link-1 {
- sound-dai = <&frddr_b>;
- };
-
- dai-link-2 {
- sound-dai = <&frddr_c>;
- };
-
- dai-link-3 {
- sound-dai = <&toddr_a>;
- };
-
- dai-link-4 {
- sound-dai = <&toddr_b>;
- };
-
- dai-link-5 {
- sound-dai = <&toddr_c>;
- };
-
- /* 8ch hdmi interface */
- dai-link-6 {
- sound-dai = <&tdmif_b>;
- dai-format = "i2s";
- dai-tdm-slot-tx-mask-0 = <1 1>;
- dai-tdm-slot-tx-mask-1 = <1 1>;
- dai-tdm-slot-tx-mask-2 = <1 1>;
- dai-tdm-slot-tx-mask-3 = <1 1>;
- mclk-fs = <256>;
-
- codec-0 {
- sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
- };
-
- codec-1 {
- sound-dai = <&toacodec TOACODEC_IN_B>;
- };
- };
-
- /* i2s jack output interface */
- dai-link-7 {
- sound-dai = <&tdmif_c>;
- dai-format = "i2s";
- dai-tdm-slot-tx-mask-0 = <1 1>;
- mclk-fs = <256>;
-
- codec-0 {
- sound-dai = <&tohdmitx TOHDMITX_I2S_IN_C>;
- };
-
- codec-1 {
- sound-dai = <&toacodec TOACODEC_IN_C>;
- };
- };
-
- /* hdmi glue */
- dai-link-8 {
- sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
-
- codec {
- sound-dai = <&hdmi_tx>;
- };
- };
-
- /* acodec glue */
- dai-link-9 {
- sound-dai = <&toacodec TOACODEC_OUT>;
-
- codec {
- sound-dai = <&acodec>;
- };
- };
- };
-};
-
-&acodec {
- AVDD-supply = <&vddao_1v8>;
- status = "okay";
-};
-
-
-&clkc_audio {
- status = "okay";
-};
-
-&cvbs_vdac_port {
- cvbs_vdac_out: endpoint {
- remote-endpoint = <&cvbs_connector_in>;
- };
-};
-
-&frddr_a {
- status = "okay";
-};
-
-&frddr_b {
- status = "okay";
-};
-
-&frddr_c {
- status = "okay";
-};
-
-&tdmif_b {
- status = "okay";
-};
-
-&tdmif_c {
- status = "okay";
-};
-
-&tdmin_a {
- status = "okay";
-};
-
-&tdmin_b {
- status = "okay";
-};
-
-&tdmin_c {
- status = "okay";
-};
-
-&tdmout_b {
- status = "okay";
-};
-
-&tdmout_c {
- status = "okay";
-};
-
-&toacodec {
- status = "okay";
-};
-
-&tohdmitx {
- status = "okay";
-};
-
-&toddr_a {
- status = "okay";
-};
-
-&toddr_b {
- status = "okay";
-};
-
-&toddr_c {
- status = "okay";
-};
diff --git a/arch/arm/dts/meson-sm1-bananapi.dtsi b/arch/arm/dts/meson-sm1-bananapi.dtsi
deleted file mode 100644
index 17045ff..0000000
--- a/arch/arm/dts/meson-sm1-bananapi.dtsi
+++ /dev/null
@@ -1,435 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2021 BayLibre SAS
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- */
-
-#include "meson-sm1.dtsi"
-#include <dt-bindings/leds/common.h>
-#include <dt-bindings/input/linux-event-codes.h>
-#include <dt-bindings/gpio/meson-g12a-gpio.h>
-
-/ {
- adc-keys {
- compatible = "adc-keys";
- io-channels = <&saradc 2>;
- io-channel-names = "buttons";
- keyup-threshold-microvolt = <1800000>;
-
- button-sw3 {
- label = "SW3";
- linux,code = <BTN_3>;
- press-threshold-microvolt = <1700000>;
- };
- };
-
- aliases {
- serial0 = &uart_AO;
- ethernet0 = ðmac;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- emmc_pwrseq: emmc-pwrseq {
- compatible = "mmc-pwrseq-emmc";
- reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
- };
-
- gpio-keys {
- compatible = "gpio-keys";
-
- key {
- label = "SW1";
- linux,code = <BTN_1>;
- gpios = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_LOW>;
- interrupt-parent = <&gpio_intc>;
- interrupts = <3 IRQ_TYPE_EDGE_BOTH>;
- };
- };
-
- hdmi-connector {
- compatible = "hdmi-connector";
- type = "a";
-
- port {
- hdmi_connector_in: endpoint {
- remote-endpoint = <&hdmi_tx_tmds_out>;
- };
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- led-green {
- color = <LED_COLOR_ID_GREEN>;
- function = LED_FUNCTION_STATUS;
- gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_LOW>;
- };
-
- led-blue {
- color = <LED_COLOR_ID_BLUE>;
- function = LED_FUNCTION_STATUS;
- gpios = <&gpio_ao GPIOAO_11 GPIO_ACTIVE_LOW>;
- linux,default-trigger = "heartbeat";
- };
- };
-
- memory@0 {
- device_type = "memory";
- reg = <0x0 0x0 0x0 0x40000000>;
- };
-
- emmc_1v8: regulator-emmc_1v8 {
- compatible = "regulator-fixed";
- regulator-name = "EMMC_1V8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vddao_3v3>;
- regulator-always-on;
- };
-
- dc_in: regulator-dc_in {
- compatible = "regulator-fixed";
- regulator-name = "DC_IN";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- regulator-always-on;
- };
-
- vddio_c: regulator-vddio_c {
- compatible = "regulator-gpio";
- regulator-name = "VDDIO_C";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
-
- enable-gpios = <&gpio_ao GPIOE_2 GPIO_OPEN_DRAIN>;
- enable-active-high;
- regulator-always-on;
-
- gpios = <&gpio_ao GPIOAO_6 GPIO_OPEN_DRAIN>;
- gpios-states = <1>;
-
- states = <1800000 0>,
- <3300000 1>;
- };
-
- tflash_vdd: regulator-tflash_vdd {
- compatible = "regulator-fixed";
- regulator-name = "TFLASH_VDD";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&dc_in>;
- gpio = <&gpio GPIOH_8 GPIO_OPEN_DRAIN>;
- enable-active-high;
- regulator-always-on;
- };
-
- vddao_1v8: regulator-vddao_1v8 {
- compatible = "regulator-fixed";
- regulator-name = "VDDAO_1V8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vddao_3v3>;
- regulator-always-on;
- };
-
- vddao_3v3: regulator-vddao_3v3 {
- compatible = "regulator-fixed";
- regulator-name = "VDDAO_3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&dc_in>;
- regulator-always-on;
- };
-
- vddcpu: regulator-vddcpu {
- /*
- * SY8120B1ABC DC/DC Regulator.
- */
- compatible = "pwm-regulator";
-
- regulator-name = "VDDCPU";
- regulator-min-microvolt = <690000>;
- regulator-max-microvolt = <1050000>;
-
- pwm-supply = <&dc_in>;
-
- pwms = <&pwm_AO_cd 1 1250 0>;
- pwm-dutycycle-range = <100 0>;
-
- regulator-boot-on;
- regulator-always-on;
- };
-
- /* USB Hub Power Enable */
- vl_pwr_en: regulator-vl_pwr_en {
- compatible = "regulator-fixed";
- regulator-name = "VL_PWR_EN";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&dc_in>;
-
- gpio = <&gpio GPIOH_6 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
-};
-
-&arb {
- status = "okay";
-};
-
-&cpu0 {
- cpu-supply = <&vddcpu>;
- operating-points-v2 = <&cpu_opp_table>;
- clocks = <&clkc CLKID_CPU_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu1 {
- cpu-supply = <&vddcpu>;
- operating-points-v2 = <&cpu_opp_table>;
- clocks = <&clkc CLKID_CPU1_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu2 {
- cpu-supply = <&vddcpu>;
- operating-points-v2 = <&cpu_opp_table>;
- clocks = <&clkc CLKID_CPU2_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu3 {
- cpu-supply = <&vddcpu>;
- operating-points-v2 = <&cpu_opp_table>;
- clocks = <&clkc CLKID_CPU3_CLK>;
- clock-latency = <50000>;
-};
-
-&ext_mdio {
- external_phy: ethernet-phy@0 {
- /* Realtek RTL8211F (0x001cc916) */
- reg = <0>;
- max-speed = <1000>;
-
- interrupt-parent = <&gpio_intc>;
- /* MAC_INTR on GPIOZ_14 */
- interrupts = <26 IRQ_TYPE_LEVEL_LOW>;
- };
-};
-
-ðmac {
- pinctrl-0 = <ð_pins>, <ð_rgmii_pins>;
- pinctrl-names = "default";
- status = "okay";
- phy-mode = "rgmii-txid";
- phy-handle = <&external_phy>;
-};
-
-&gpio {
- gpio-line-names =
- /* GPIOZ */
- "ETH_MDIO", /* GPIOZ_0 */
- "ETH_MDC", /* GPIOZ_1 */
- "ETH_RXCLK", /* GPIOZ_2 */
- "ETH_RX_DV", /* GPIOZ_3 */
- "ETH_RXD0", /* GPIOZ_4 */
- "ETH_RXD1", /* GPIOZ_5 */
- "ETH_RXD2", /* GPIOZ_6 */
- "ETH_RXD3", /* GPIOZ_7 */
- "ETH_TXCLK", /* GPIOZ_8 */
- "ETH_TXEN", /* GPIOZ_9 */
- "ETH_TXD0", /* GPIOZ_10 */
- "ETH_TXD1", /* GPIOZ_11 */
- "ETH_TXD2", /* GPIOZ_12 */
- "ETH_TXD3", /* GPIOZ_13 */
- "ETH_INTR", /* GPIOZ_14 */
- "ETH_NRST", /* GPIOZ_15 */
- /* GPIOH */
- "HDMI_SDA", /* GPIOH_0 */
- "HDMI_SCL", /* GPIOH_1 */
- "HDMI_HPD", /* GPIOH_2 */
- "HDMI_CEC", /* GPIOH_3 */
- "VL-RST_N", /* GPIOH_4 */
- "CON1-P36", /* GPIOH_5 */
- "VL-PWREN", /* GPIOH_6 */
- "WiFi_3V3_1V8", /* GPIOH_7 */
- "TFLASH_VDD_EN", /* GPIOH_8 */
- /* BOOT */
- "eMMC_D0", /* BOOT_0 */
- "eMMC_D1", /* BOOT_1 */
- "eMMC_D2", /* BOOT_2 */
- "eMMC_D3", /* BOOT_3 */
- "eMMC_D4", /* BOOT_4 */
- "eMMC_D5", /* BOOT_5 */
- "eMMC_D6", /* BOOT_6 */
- "eMMC_D7", /* BOOT_7 */
- "eMMC_CLK", /* BOOT_8 */
- "",
- "eMMC_CMD", /* BOOT_10 */
- "",
- "eMMC_RST#", /* BOOT_12 */
- "eMMC_DS", /* BOOT_13 */
- "", "",
- /* GPIOC */
- "SD_D0_B", /* GPIOC_0 */
- "SD_D1_B", /* GPIOC_1 */
- "SD_D2_B", /* GPIOC_2 */
- "SD_D3_B", /* GPIOC_3 */
- "SD_CLK_B", /* GPIOC_4 */
- "SD_CMD_B", /* GPIOC_5 */
- "CARD_EN_DET", /* GPIOC_6 */
- "",
- /* GPIOA */
- "", "", "", "", "", "", "", "",
- "", "", "", "", "", "",
- "CON1-P27", /* GPIOA_14 */
- "CON1-P28", /* GPIOA_15 */
- /* GPIOX */
- "CON1-P16", /* GPIOX_0 */
- "CON1-P18", /* GPIOX_1 */
- "CON1-P22", /* GPIOX_2 */
- "CON1-P11", /* GPIOX_3 */
- "CON1-P13", /* GPIOX_4 */
- "CON1-P07", /* GPIOX_5 */
- "CON1-P33", /* GPIOX_6 */
- "CON1-P15", /* GPIOX_7 */
- "CON1-P19", /* GPIOX_8 */
- "CON1-P21", /* GPIOX_9 */
- "CON1-P24", /* GPIOX_10 */
- "CON1-P23", /* GPIOX_11 */
- "CON1-P08", /* GPIOX_12 */
- "CON1-P10", /* GPIOX_13 */
- "CON1-P29", /* GPIOX_14 */
- "CON1-P31", /* GPIOX_15 */
- "CON1-P26", /* GPIOX_16 */
- "CON1-P03", /* GPIOX_17 */
- "CON1-P05", /* GPIOX_18 */
- "CON1-P32"; /* GPIOX_19 */
-
- /*
- * WARNING: The USB Hub needs a reset signal to be turned high in
- * order to be detected by the USB Controller. This signal should
- * be handled by a USB specific power sequence to reset the Hub
- * when the USB bus is powered down.
- */
- usb-hub-hog {
- gpio-hog;
- gpios = <GPIOH_4 GPIO_ACTIVE_HIGH>;
- output-high;
- line-name = "usb-hub-reset";
- };
-};
-
-&gpio_ao {
- gpio-line-names =
- /* GPIOAO */
- "DEBUG TX", /* GPIOAO_0 */
- "DEBUG RX", /* GPIOAO_1 */
- "SYS_LED2", /* GPIOAO_2 */
- "UPDATE_KEY", /* GPIOAO_3 */
- "CON1-P40", /* GPIOAO_4 */
- "IR_IN", /* GPIOAO_5 */
- "TF_3V3N_1V8_EN", /* GPIOAO_6 */
- "CON1-P35", /* GPIOAO_7 */
- "CON1-P12", /* GPIOAO_8 */
- "CON1-P37", /* GPIOAO_9 */
- "CON1-P38", /* GPIOAO_10 */
- "SYS_LED", /* GPIOAO_11 */
- /* GPIOE */
- "VDDEE_PWM", /* GPIOE_0 */
- "VDDCPU_PWM", /* GPIOE_1 */
- "TF_PWR_EN"; /* GPIOE_2 */
-};
-
-&hdmi_tx {
- status = "okay";
- pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>;
- pinctrl-names = "default";
- hdmi-supply = <&dc_in>;
-};
-
-&hdmi_tx_tmds_port {
- hdmi_tx_tmds_out: endpoint {
- remote-endpoint = <&hdmi_connector_in>;
- };
-};
-
-&ir {
- status = "okay";
- pinctrl-0 = <&remote_input_ao_pins>;
- pinctrl-names = "default";
-};
-
-&pwm_AO_cd {
- pinctrl-0 = <&pwm_ao_d_e_pins>;
- pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin1";
- status = "okay";
-};
-
-&saradc {
- status = "okay";
- vref-supply = <&vddao_1v8>;
-};
-
-/* SD card */
-&sd_emmc_b {
- status = "okay";
- pinctrl-0 = <&sdcard_c_pins>;
- pinctrl-1 = <&sdcard_clk_gate_c_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <4>;
- cap-sd-highspeed;
- max-frequency = <50000000>;
- disable-wp;
-
- /* TOFIX: SD card is barely usable in SDR modes */
-
- cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
- vmmc-supply = <&tflash_vdd>;
- vqmmc-supply = <&vddio_c>;
-};
-
-/* eMMC */
-&sd_emmc_c {
- status = "okay";
- pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>;
- pinctrl-1 = <&emmc_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <8>;
- cap-mmc-highspeed;
- mmc-ddr-1_8v;
- mmc-hs200-1_8v;
- max-frequency = <200000000>;
- disable-wp;
-
- mmc-pwrseq = <&emmc_pwrseq>;
- vmmc-supply = <&vddao_3v3>;
- vqmmc-supply = <&emmc_1v8>;
-};
-
-&uart_AO {
- status = "okay";
- pinctrl-0 = <&uart_ao_a_pins>;
- pinctrl-names = "default";
-};
-
-&usb {
- status = "okay";
-};
-
-&usb2_phy0 {
- phy-supply = <&dc_in>;
-};
-
-&usb2_phy1 {
- /* Enable the hub which is connected to this port */
- phy-supply = <&vl_pwr_en>;
-};
diff --git a/arch/arm/dts/meson-sm1-khadas-vim3l.dts b/arch/arm/dts/meson-sm1-khadas-vim3l.dts
deleted file mode 100644
index f2c0981..0000000
--- a/arch/arm/dts/meson-sm1-khadas-vim3l.dts
+++ /dev/null
@@ -1,113 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2019 BayLibre, SAS
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- */
-
-/dts-v1/;
-
-#include "meson-sm1.dtsi"
-#include "meson-khadas-vim3.dtsi"
-#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
-
-/ {
- compatible = "khadas,vim3l", "amlogic,sm1";
- model = "Khadas VIM3L";
-
- vddcpu: regulator-vddcpu {
- /*
- * Silergy SY8030DEC Regulator.
- */
- compatible = "pwm-regulator";
-
- regulator-name = "VDDCPU";
- regulator-min-microvolt = <690000>;
- regulator-max-microvolt = <1050000>;
-
- vin-supply = <&vsys_3v3>;
-
- pwms = <&pwm_AO_cd 1 1250 0>;
- pwm-dutycycle-range = <100 0>;
-
- regulator-boot-on;
- regulator-always-on;
- };
-
- sound {
- model = "G12B-KHADAS-VIM3L";
- audio-routing = "TDMOUT_A IN 0", "FRDDR_A OUT 0",
- "TDMOUT_A IN 1", "FRDDR_B OUT 0",
- "TDMOUT_A IN 2", "FRDDR_C OUT 0",
- "TDM_A Playback", "TDMOUT_A OUT",
- "TDMIN_A IN 0", "TDM_A Capture",
- "TDMIN_A IN 13", "TDM_A Loopback",
- "TODDR_A IN 0", "TDMIN_A OUT",
- "TODDR_B IN 0", "TDMIN_A OUT",
- "TODDR_C IN 0", "TDMIN_A OUT";
- };
-};
-
-&cpu0 {
- cpu-supply = <&vddcpu>;
- operating-points-v2 = <&cpu_opp_table>;
- clocks = <&clkc CLKID_CPU_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu1 {
- cpu-supply = <&vddcpu>;
- operating-points-v2 = <&cpu_opp_table>;
- clocks = <&clkc CLKID_CPU1_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu2 {
- cpu-supply = <&vddcpu>;
- operating-points-v2 = <&cpu_opp_table>;
- clocks = <&clkc CLKID_CPU2_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu3 {
- cpu-supply = <&vddcpu>;
- operating-points-v2 = <&cpu_opp_table>;
- clocks = <&clkc CLKID_CPU3_CLK>;
- clock-latency = <50000>;
-};
-
-&pwm_AO_cd {
- pinctrl-0 = <&pwm_ao_d_e_pins>;
- pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin1";
- status = "okay";
-};
-
-/*
- * The VIM3 on-board MCU can mux the PCIe/USB3.0 shared differential
- * lines using a FUSB340TMX USB 3.1 SuperSpeed Data Switch between
- * an USB3.0 Type A connector and a M.2 Key M slot.
- * The PHY driving these differential lines is shared between
- * the USB3.0 controller and the PCIe Controller, thus only
- * a single controller can use it.
- * If the MCU is configured to mux the PCIe/USB3.0 differential lines
- * to the M.2 Key M slot, uncomment the following block to disable
- * USB3.0 from the USB Complex and enable the PCIe controller.
- * The End User is not expected to uncomment the following except for
- * testing purposes, but instead rely on the firmware/bootloader to
- * update these nodes accordingly if PCIe mode is selected by the MCU.
- */
-/*
-&pcie {
- status = "okay";
-};
-
-&usb {
- phys = <&usb2_phy0>, <&usb2_phy1>;
- phy-names = "usb2-phy0", "usb2-phy1";
-};
- */
-
-&sd_emmc_a {
- sd-uhs-sdr50;
-};
diff --git a/arch/arm/dts/meson-sm1-odroid-c4.dts b/arch/arm/dts/meson-sm1-odroid-c4.dts
deleted file mode 100644
index 8c30ce6..0000000
--- a/arch/arm/dts/meson-sm1-odroid-c4.dts
+++ /dev/null
@@ -1,48 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2020 Dongjin Kim <tobetter@gmail.com>
- */
-
-/dts-v1/;
-
-#include "meson-sm1-odroid.dtsi"
-
-/ {
- compatible = "hardkernel,odroid-c4", "amlogic,sm1";
- model = "Hardkernel ODROID-C4";
-
- leds {
- compatible = "gpio-leds";
-
- led-blue {
- color = <LED_COLOR_ID_BLUE>;
- function = LED_FUNCTION_STATUS;
- gpios = <&gpio_ao GPIOAO_11 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "heartbeat";
- panic-indicator;
- };
- };
-
- sound {
- model = "ODROID-C4";
- };
-};
-
-&gpio {
- /*
- * WARNING: The USB Hub on the Odroid-C4 needs a reset signal
- * to be turned high in order to be detected by the USB Controller
- * This signal should be handled by a USB specific power sequence
- * in order to reset the Hub when USB bus is powered down.
- */
- hog-0 {
- gpio-hog;
- gpios = <GPIOH_4 GPIO_ACTIVE_HIGH>;
- output-high;
- line-name = "usb-hub-reset";
- };
-};
-
-&ir {
- linux,rc-map-name = "rc-odroid";
-};
diff --git a/arch/arm/dts/meson-sm1-odroid-hc4.dts b/arch/arm/dts/meson-sm1-odroid-hc4.dts
deleted file mode 100644
index f3f9532..0000000
--- a/arch/arm/dts/meson-sm1-odroid-hc4.dts
+++ /dev/null
@@ -1,140 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2020 Dongjin Kim <tobetter@gmail.com>
- */
-
-/dts-v1/;
-
-#include "meson-sm1-odroid.dtsi"
-
-/ {
- compatible = "hardkernel,odroid-hc4", "amlogic,sm1";
- model = "Hardkernel ODROID-HC4";
-
- aliases {
- rtc0 = &rtc;
- rtc1 = &vrtc;
- };
-
- fan0: pwm-fan {
- compatible = "pwm-fan";
- #cooling-cells = <2>;
- cooling-min-state = <0>;
- cooling-max-state = <3>;
- cooling-levels = <0 120 170 220>;
- pwms = <&pwm_cd 1 40000 0>;
- };
-
- leds {
- compatible = "gpio-leds";
-
- led-blue {
- color = <LED_COLOR_ID_BLUE>;
- function = LED_FUNCTION_STATUS;
- gpios = <&gpio_ao GPIOAO_11 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "heartbeat";
- panic-indicator;
- };
-
- led-red {
- color = <LED_COLOR_ID_RED>;
- function = LED_FUNCTION_POWER;
- gpios = <&gpio_ao GPIOAO_7 GPIO_ACTIVE_HIGH>;
- default-state = "on";
- };
- };
-
- /* Powers the SATA Disk 0 regulator, which is enabled when a disk load is detected */
- p12v_0: regulator-p12v_0 {
- compatible = "regulator-fixed";
- regulator-name = "P12V_0";
- regulator-min-microvolt = <12000000>;
- regulator-max-microvolt = <12000000>;
- vin-supply = <&main_12v>;
-
- gpio = <&gpio GPIOH_8 GPIO_OPEN_DRAIN>;
- enable-active-high;
- regulator-always-on;
- };
-
- /* Powers the SATA Disk 1 regulator, which is enabled when a disk load is detected */
- p12v_1: regulator-p12v_1 {
- compatible = "regulator-fixed";
- regulator-name = "P12V_1";
- regulator-min-microvolt = <12000000>;
- regulator-max-microvolt = <12000000>;
- vin-supply = <&main_12v>;
-
- gpio = <&gpio GPIOH_8 GPIO_OPEN_DRAIN>;
- enable-active-high;
- regulator-always-on;
- };
-
- sound {
- model = "ODROID-HC4";
- };
-};
-
-&cpu_thermal {
- cooling-maps {
- map {
- trip = <&cpu_passive>;
- cooling-device = <&fan0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- };
- };
-};
-
-&ir {
- linux,rc-map-name = "rc-odroid";
-};
-
-&i2c2 {
- status = "okay";
- pinctrl-0 = <&i2c2_sda_x_pins>, <&i2c2_sck_x_pins>;
- pinctrl-names = "default";
-
- rtc: rtc@51 {
- status = "okay";
- compatible = "nxp,pcf8563";
- reg = <0x51>;
- wakeup-source;
- };
-};
-
-&pcie {
- status = "okay";
- reset-gpios = <&gpio GPIOH_4 GPIO_ACTIVE_LOW>;
-};
-
-&pwm_cd {
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&pwm_d_x6_pins>;
-};
-
-&sd_emmc_c {
- status = "disabled";
-};
-
-&spifc {
- status = "okay";
- pinctrl-0 = <&nor_pins>;
- pinctrl-names = "default";
-
- spi-flash@0 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "jedec,spi-nor";
- reg = <0>;
- spi-max-frequency = <104000000>;
- };
-};
-
-&usb {
- phys = <&usb2_phy1>;
- phy-names = "usb2-phy1";
-};
-
-&usb2_phy0 {
- status = "disabled";
-};
diff --git a/arch/arm/dts/meson-sm1-odroid.dtsi b/arch/arm/dts/meson-sm1-odroid.dtsi
deleted file mode 100644
index fd0ad85..0000000
--- a/arch/arm/dts/meson-sm1-odroid.dtsi
+++ /dev/null
@@ -1,449 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2020 Dongjin Kim <tobetter@gmail.com>
- */
-
-#include "meson-sm1.dtsi"
-#include <dt-bindings/gpio/meson-g12a-gpio.h>
-#include <dt-bindings/leds/common.h>
-#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
-
-/ {
- aliases {
- serial0 = &uart_AO;
- ethernet0 = ðmac;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- memory@0 {
- device_type = "memory";
- reg = <0x0 0x0 0x0 0x40000000>;
- };
-
- emmc_pwrseq: emmc-pwrseq {
- compatible = "mmc-pwrseq-emmc";
- reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
- };
-
- tflash_vdd: regulator-tflash_vdd {
- compatible = "regulator-fixed";
-
- regulator-name = "TFLASH_VDD";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
-
- gpio = <&gpio_ao GPIOAO_3 GPIO_OPEN_DRAIN>;
- enable-active-high;
- regulator-always-on;
- };
-
- tf_io: gpio-regulator-tf_io {
- compatible = "regulator-gpio";
-
- regulator-name = "TF_IO";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vcc_5v>;
-
- enable-gpio = <&gpio GPIOE_2 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- regulator-always-on;
-
- gpios = <&gpio_ao GPIOAO_6 GPIO_OPEN_SOURCE>;
- gpios-states = <0>;
-
- states = <3300000 0>,
- <1800000 1>;
- };
-
- flash_1v8: regulator-flash_1v8 {
- compatible = "regulator-fixed";
- regulator-name = "FLASH_1V8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vcc_3v3>;
- regulator-always-on;
- };
-
- main_12v: regulator-main_12v {
- compatible = "regulator-fixed";
- regulator-name = "12V";
- regulator-min-microvolt = <12000000>;
- regulator-max-microvolt = <12000000>;
- regulator-always-on;
- };
-
- vcc_5v: regulator-vcc_5v {
- compatible = "regulator-fixed";
- regulator-name = "5V";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- regulator-always-on;
- vin-supply = <&main_12v>;
- gpio = <&gpio GPIOH_8 GPIO_OPEN_DRAIN>;
- enable-active-high;
- };
-
- vcc_1v8: regulator-vcc_1v8 {
- compatible = "regulator-fixed";
- regulator-name = "VCC_1V8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vcc_3v3>;
- regulator-always-on;
- };
-
- vcc_3v3: regulator-vcc_3v3 {
- compatible = "regulator-fixed";
- regulator-name = "VCC_3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vddao_3v3>;
- regulator-always-on;
- /* FIXME: actually controlled by VDDCPU_B_EN */
- };
-
- vddcpu: regulator-vddcpu {
- /*
- * MP8756GD Regulator.
- */
- compatible = "pwm-regulator";
-
- regulator-name = "VDDCPU";
- regulator-min-microvolt = <721000>;
- regulator-max-microvolt = <1022000>;
-
- vin-supply = <&main_12v>;
-
- pwms = <&pwm_AO_cd 1 1250 0>;
- pwm-dutycycle-range = <100 0>;
-
- regulator-boot-on;
- regulator-always-on;
- };
-
- usb_pwr_en: regulator-usb_pwr_en {
- compatible = "regulator-fixed";
- regulator-name = "USB_PWR_EN";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc_5v>;
-
- /* Connected to the microUSB port power enable */
- gpio = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
-
- vddao_1v8: regulator-vddao_1v8 {
- compatible = "regulator-fixed";
- regulator-name = "VDDAO_1V8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vddao_3v3>;
- regulator-always-on;
- };
-
- vddao_3v3: regulator-vddao_3v3 {
- compatible = "regulator-fixed";
- regulator-name = "VDDAO_3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&main_12v>;
- regulator-always-on;
- };
-
- hdmi-connector {
- compatible = "hdmi-connector";
- type = "a";
-
- port {
- hdmi_connector_in: endpoint {
- remote-endpoint = <&hdmi_tx_tmds_out>;
- };
- };
- };
-
- sound {
- compatible = "amlogic,axg-sound-card";
- audio-aux-devs = <&tdmout_b>;
- audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
- "TDMOUT_B IN 1", "FRDDR_B OUT 1",
- "TDMOUT_B IN 2", "FRDDR_C OUT 1",
- "TDM_B Playback", "TDMOUT_B OUT";
-
- assigned-clocks = <&clkc CLKID_MPLL2>,
- <&clkc CLKID_MPLL0>,
- <&clkc CLKID_MPLL1>;
- assigned-clock-parents = <0>, <0>, <0>;
- assigned-clock-rates = <294912000>,
- <270950400>,
- <393216000>;
- status = "okay";
-
- dai-link-0 {
- sound-dai = <&frddr_a>;
- };
-
- dai-link-1 {
- sound-dai = <&frddr_b>;
- };
-
- dai-link-2 {
- sound-dai = <&frddr_c>;
- };
-
- /* 8ch hdmi interface */
- dai-link-3 {
- sound-dai = <&tdmif_b>;
- dai-format = "i2s";
- dai-tdm-slot-tx-mask-0 = <1 1>;
- dai-tdm-slot-tx-mask-1 = <1 1>;
- dai-tdm-slot-tx-mask-2 = <1 1>;
- dai-tdm-slot-tx-mask-3 = <1 1>;
- mclk-fs = <256>;
-
- codec {
- sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
- };
- };
-
- /* hdmi glue */
- dai-link-4 {
- sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
-
- codec {
- sound-dai = <&hdmi_tx>;
- };
- };
- };
-};
-
-&arb {
- status = "okay";
-};
-
-&clkc_audio {
- status = "okay";
-};
-
-&cpu0 {
- cpu-supply = <&vddcpu>;
- operating-points-v2 = <&cpu_opp_table>;
- clocks = <&clkc CLKID_CPU_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu1 {
- cpu-supply = <&vddcpu>;
- operating-points-v2 = <&cpu_opp_table>;
- clocks = <&clkc CLKID_CPU1_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu2 {
- cpu-supply = <&vddcpu>;
- operating-points-v2 = <&cpu_opp_table>;
- clocks = <&clkc CLKID_CPU2_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu3 {
- cpu-supply = <&vddcpu>;
- operating-points-v2 = <&cpu_opp_table>;
- clocks = <&clkc CLKID_CPU3_CLK>;
- clock-latency = <50000>;
-};
-
-&ext_mdio {
- external_phy: ethernet-phy@0 {
- /* Realtek RTL8211F (0x001cc916) */
- reg = <0>;
- max-speed = <1000>;
-
- interrupt-parent = <&gpio_intc>;
- /* MAC_INTR on GPIOZ_14 */
- interrupts = <26 IRQ_TYPE_LEVEL_LOW>;
- };
-};
-
-ðmac {
- pinctrl-0 = <ð_pins>, <ð_rgmii_pins>;
- pinctrl-names = "default";
- status = "okay";
- phy-mode = "rgmii";
- phy-handle = <&external_phy>;
- amlogic,tx-delay-ns = <2>;
-};
-
-&frddr_a {
- status = "okay";
-};
-
-&frddr_b {
- status = "okay";
-};
-
-&frddr_c {
- status = "okay";
-};
-
-&gpio {
- gpio-line-names =
- /* GPIOZ */
- "", "", "", "", "", "", "", "",
- "", "", "", "", "", "", "", "",
- /* GPIOH */
- "", "", "", "", "",
- "PIN_36", /* GPIOH_5 */
- "PIN_26", /* GPIOH_6 */
- "PIN_32", /* GPIOH_7 */
- "",
- /* BOOT */
- "", "", "", "", "", "", "", "",
- "", "", "", "", "", "", "", "",
- /* GPIOC */
- "", "", "", "", "", "", "", "",
- /* GPIOA */
- "", "", "", "", "", "", "", "",
- "", "", "", "", "", "",
- "PIN_27", /* GPIOA_14 */
- "PIN_28", /* GPIOA_15 */
- /* GPIOX */
- "PIN_16", /* GPIOX_0 */
- "PIN_18", /* GPIOX_1 */
- "PIN_22", /* GPIOX_2 */
- "PIN_11", /* GPIOX_3 */
- "PIN_13", /* GPIOX_4 */
- "PIN_7", /* GPIOX_5 */
- "PIN_33", /* GPIOX_6 */
- "PIN_15", /* GPIOX_7 */
- "PIN_19", /* GPIOX_8 */
- "PIN_21", /* GPIOX_9 */
- "PIN_24", /* GPIOX_10 */
- "PIN_23", /* GPIOX_11 */
- "PIN_8", /* GPIOX_12 */
- "PIN_10", /* GPIOX_13 */
- "PIN_29", /* GPIOX_14 */
- "PIN_31", /* GPIOX_15 */
- "PIN_12", /* GPIOX_16 */
- "PIN_3", /* GPIOX_17 */
- "PIN_5", /* GPIOX_18 */
- "PIN_35"; /* GPIOX_19 */
-};
-
-&gpio_ao {
- gpio-line-names =
- /* GPIOAO */
- "", "", "", "",
- "PIN_47", /* GPIOAO_4 */
- "", "",
- "PIN_45", /* GPIOAO_7 */
- "PIN_46", /* GPIOAO_8 */
- "PIN_44", /* GPIOAO_9 */
- "PIN_42", /* GPIOAO_10 */
- "",
- /* GPIOE */
- "", "", "";
-};
-
-&hdmi_tx {
- status = "okay";
- pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>;
- pinctrl-names = "default";
- hdmi-supply = <&vcc_5v>;
-};
-
-&hdmi_tx_tmds_port {
- hdmi_tx_tmds_out: endpoint {
- remote-endpoint = <&hdmi_connector_in>;
- };
-};
-
-&ir {
- status = "okay";
- pinctrl-0 = <&remote_input_ao_pins>;
- pinctrl-names = "default";
-};
-
-&pwm_AO_cd {
- pinctrl-0 = <&pwm_ao_d_e_pins>;
- pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin1";
- status = "okay";
-};
-
-&saradc {
- status = "okay";
-};
-
-/* SD card */
-&sd_emmc_b {
- status = "okay";
- pinctrl-0 = <&sdcard_c_pins>;
- pinctrl-1 = <&sdcard_clk_gate_c_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <4>;
- cap-sd-highspeed;
- max-frequency = <200000000>;
- sd-uhs-sdr12;
- sd-uhs-sdr25;
- sd-uhs-sdr50;
- sd-uhs-sdr104;
- disable-wp;
-
- cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
- vmmc-supply = <&tflash_vdd>;
- vqmmc-supply = <&tf_io>;
-};
-
-/* eMMC */
-&sd_emmc_c {
- status = "okay";
- pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>;
- pinctrl-1 = <&emmc_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <8>;
- cap-mmc-highspeed;
- mmc-ddr-1_8v;
- mmc-hs200-1_8v;
- max-frequency = <200000000>;
- disable-wp;
-
- mmc-pwrseq = <&emmc_pwrseq>;
- vmmc-supply = <&vcc_3v3>;
- vqmmc-supply = <&flash_1v8>;
-};
-
-&tdmif_b {
- status = "okay";
-};
-
-&tdmout_b {
- status = "okay";
-};
-
-&tohdmitx {
- status = "okay";
-};
-
-&uart_AO {
- status = "okay";
- pinctrl-0 = <&uart_ao_a_pins>;
- pinctrl-names = "default";
-};
-
-&usb {
- status = "okay";
- vbus-supply = <&usb_pwr_en>;
-};
-
-&usb2_phy0 {
- phy-supply = <&vcc_5v>;
-};
-
diff --git a/arch/arm/dts/meson-sm1-sei610.dts b/arch/arm/dts/meson-sm1-sei610.dts
deleted file mode 100644
index 2194a77..0000000
--- a/arch/arm/dts/meson-sm1-sei610.dts
+++ /dev/null
@@ -1,616 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2019 BayLibre SAS. All rights reserved.
- */
-
-/dts-v1/;
-
-#include "meson-sm1.dtsi"
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/gpio/meson-g12a-gpio.h>
-#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
-
-/ {
- compatible = "seirobotics,sei610", "amlogic,sm1";
- model = "SEI Robotics SEI610";
-
- aliases {
- serial0 = &uart_AO;
- ethernet0 = ðmac;
- };
-
- mono_dac: audio-codec-0 {
- compatible = "maxim,max98357a";
- #sound-dai-cells = <0>;
- sound-name-prefix = "U16";
- sdmode-gpios = <&gpio GPIOX_8 GPIO_ACTIVE_HIGH>;
- };
-
- dmics: audio-codec-1 {
- #sound-dai-cells = <0>;
- compatible = "dmic-codec";
- num-channels = <2>;
- wakeup-delay-ms = <50>;
- status = "okay";
- sound-name-prefix = "MIC";
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- emmc_pwrseq: emmc-pwrseq {
- compatible = "mmc-pwrseq-emmc";
- reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
- };
-
- gpio-keys {
- compatible = "gpio-keys";
-
- key1 {
- label = "A";
- linux,code = <BTN_0>;
- gpios = <&gpio GPIOH_6 GPIO_ACTIVE_LOW>;
- interrupt-parent = <&gpio_intc>;
- interrupts = <34 IRQ_TYPE_EDGE_BOTH>;
- };
-
- key2 {
- label = "B";
- linux,code = <BTN_1>;
- gpios = <&gpio GPIOH_7 GPIO_ACTIVE_LOW>;
- interrupt-parent = <&gpio_intc>;
- interrupts = <35 IRQ_TYPE_EDGE_BOTH>;
- };
-
- key3 {
- label = "C";
- linux,code = <BTN_2>;
- gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_LOW>;
- interrupt-parent = <&gpio_intc>;
- interrupts = <2 IRQ_TYPE_EDGE_BOTH>;
- };
-
- mic_mute {
- label = "MicMute";
- linux,code = <SW_MUTE_DEVICE>;
- linux,input-type = <EV_SW>;
- gpios = <&gpio_ao GPIOE_2 GPIO_ACTIVE_LOW>;
- interrupt-parent = <&gpio_intc>;
- interrupts = <99 IRQ_TYPE_EDGE_BOTH>;
- };
-
- power_key {
- label = "PowerKey";
- linux,code = <KEY_POWER>;
- gpios = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_LOW>;
- interrupt-parent = <&gpio_intc>;
- interrupts = <3 IRQ_TYPE_EDGE_BOTH>;
- };
- };
-
- hdmi-connector {
- compatible = "hdmi-connector";
- type = "a";
-
- port {
- hdmi_connector_in: endpoint {
- remote-endpoint = <&hdmi_tx_tmds_out>;
- };
- };
- };
-
- led-controller-1 {
- compatible = "gpio-leds";
-
- led-1 {
- label = "sei610:blue:bt";
- gpios = <&gpio GPIOC_7 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>;
- default-state = "off";
- };
- };
-
- led-controller-2 {
- compatible = "pwm-leds";
-
- led-2 {
- label = "sei610:red:power";
- pwms = <&pwm_AO_ab 0 30518 0>;
- max-brightness = <255>;
- linux,default-trigger = "default-on";
- active-low;
- };
- };
-
- memory@0 {
- device_type = "memory";
- reg = <0x0 0x0 0x0 0x40000000>;
- };
-
- ao_5v: regulator-ao_5v {
- compatible = "regulator-fixed";
- regulator-name = "AO_5V";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&dc_in>;
- regulator-always-on;
- };
-
- dc_in: regulator-dc_in {
- compatible = "regulator-fixed";
- regulator-name = "DC_IN";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- regulator-always-on;
- };
-
- emmc_1v8: regulator-emmc_1v8 {
- compatible = "regulator-fixed";
- regulator-name = "EMMC_1V8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vddao_3v3>;
- regulator-always-on;
- };
-
- vddao_3v3: regulator-vddao_3v3 {
- compatible = "regulator-fixed";
- regulator-name = "VDDAO_3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&dc_in>;
- regulator-always-on;
- };
-
- /* Used by Tuner, RGB Led & IR Emitter LED array */
- vddao_3v3_t: regulator-vddao_3v3_t {
- compatible = "regulator-fixed";
- regulator-name = "VDDAO_3V3_T";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vddao_3v3>;
- gpio = <&gpio GPIOH_8 GPIO_OPEN_DRAIN>;
- enable-active-low;
- regulator-always-on;
- };
-
- vddcpu: regulator-vddcpu {
- /*
- * SY8120B1ABC DC/DC Regulator.
- */
- compatible = "pwm-regulator";
-
- regulator-name = "VDDCPU";
- regulator-min-microvolt = <690000>;
- regulator-max-microvolt = <1050000>;
-
- vin-supply = <&dc_in>;
-
- pwms = <&pwm_AO_cd 1 1500 0>;
- pwm-dutycycle-range = <100 0>;
-
- regulator-boot-on;
- regulator-always-on;
- };
-
- vddio_ao1v8: regulator-vddio_ao1v8 {
- compatible = "regulator-fixed";
- regulator-name = "VDDIO_AO1V8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vddao_3v3>;
- regulator-always-on;
- };
-
- reserved-memory {
- /* TEE Reserved Memory */
- bl32_reserved: bl32@5000000 {
- reg = <0x0 0x05300000 0x0 0x2000000>;
- no-map;
- };
- };
-
- sdio_pwrseq: sdio-pwrseq {
- compatible = "mmc-pwrseq-simple";
- reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
- clocks = <&wifi32k>;
- clock-names = "ext_clock";
- };
-
- sound {
- compatible = "amlogic,axg-sound-card";
- model = "SEI610";
- audio-aux-devs = <&tdmout_a>, <&tdmout_b>,
- <&tdmin_a>, <&tdmin_b>;
- audio-routing = "TDMOUT_A IN 0", "FRDDR_A OUT 0",
- "TDMOUT_A IN 1", "FRDDR_B OUT 0",
- "TDMOUT_A IN 2", "FRDDR_C OUT 0",
- "TDM_A Playback", "TDMOUT_A OUT",
- "TDMOUT_B IN 0", "FRDDR_A OUT 1",
- "TDMOUT_B IN 1", "FRDDR_B OUT 1",
- "TDMOUT_B IN 2", "FRDDR_C OUT 1",
- "TDM_B Playback", "TDMOUT_B OUT",
- "TODDR_A IN 4", "PDM Capture",
- "TODDR_B IN 4", "PDM Capture",
- "TODDR_C IN 4", "PDM Capture",
- "TDMIN_A IN 0", "TDM_A Capture",
- "TDMIN_A IN 3", "TDM_A Loopback",
- "TDMIN_B IN 0", "TDM_A Capture",
- "TDMIN_B IN 3", "TDM_A Loopback",
- "TDMIN_A IN 1", "TDM_B Capture",
- "TDMIN_A IN 4", "TDM_B Loopback",
- "TDMIN_B IN 1", "TDM_B Capture",
- "TDMIN_B IN 4", "TDM_B Loopback",
- "TODDR_A IN 0", "TDMIN_A OUT",
- "TODDR_B IN 0", "TDMIN_A OUT",
- "TODDR_C IN 0", "TDMIN_A OUT",
- "TODDR_A IN 1", "TDMIN_B OUT",
- "TODDR_B IN 1", "TDMIN_B OUT",
- "TODDR_C IN 1", "TDMIN_B OUT";
-
- assigned-clocks = <&clkc CLKID_MPLL2>,
- <&clkc CLKID_MPLL0>,
- <&clkc CLKID_MPLL1>;
- assigned-clock-parents = <0>, <0>, <0>;
- assigned-clock-rates = <294912000>,
- <270950400>,
- <393216000>;
- status = "okay";
-
- dai-link-0 {
- sound-dai = <&frddr_a>;
- };
-
- dai-link-1 {
- sound-dai = <&frddr_b>;
- };
-
- dai-link-2 {
- sound-dai = <&frddr_c>;
- };
-
- dai-link-3 {
- sound-dai = <&toddr_a>;
- };
-
- dai-link-4 {
- sound-dai = <&toddr_b>;
- };
-
- dai-link-5 {
- sound-dai = <&toddr_c>;
- };
-
- /* internal speaker interface */
- dai-link-6 {
- sound-dai = <&tdmif_a>;
- dai-format = "i2s";
- dai-tdm-slot-tx-mask-0 = <1 1>;
- mclk-fs = <256>;
-
- codec-0 {
- sound-dai = <&mono_dac>;
- };
-
- codec-1 {
- sound-dai = <&tohdmitx TOHDMITX_I2S_IN_A>;
- };
- };
-
- /* 8ch hdmi interface */
- dai-link-7 {
- sound-dai = <&tdmif_b>;
- dai-format = "i2s";
- dai-tdm-slot-tx-mask-0 = <1 1>;
- dai-tdm-slot-tx-mask-1 = <1 1>;
- dai-tdm-slot-tx-mask-2 = <1 1>;
- dai-tdm-slot-tx-mask-3 = <1 1>;
- mclk-fs = <256>;
-
- codec {
- sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
- };
- };
-
- /* internal digital mics */
- dai-link-8 {
- sound-dai = <&pdm>;
-
- codec {
- sound-dai = <&dmics>;
- };
- };
-
- /* hdmi glue */
- dai-link-9 {
- sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
-
- codec {
- sound-dai = <&hdmi_tx>;
- };
- };
- };
-
- wifi32k: wifi32k {
- compatible = "pwm-clock";
- #clock-cells = <0>;
- clock-frequency = <32768>;
- pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
- };
-};
-
-&arb {
- status = "okay";
-};
-
-&cec_AO {
- pinctrl-0 = <&cec_ao_a_h_pins>;
- pinctrl-names = "default";
- status = "disabled";
- hdmi-phandle = <&hdmi_tx>;
-};
-
-&cecb_AO {
- pinctrl-0 = <&cec_ao_b_h_pins>;
- pinctrl-names = "default";
- status = "okay";
- hdmi-phandle = <&hdmi_tx>;
-};
-
-&clkc_audio {
- status = "okay";
-};
-
-&cpu0 {
- cpu-supply = <&vddcpu>;
- operating-points-v2 = <&cpu_opp_table>;
- clocks = <&clkc CLKID_CPU_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu1 {
- cpu-supply = <&vddcpu>;
- operating-points-v2 = <&cpu_opp_table>;
- clocks = <&clkc CLKID_CPU1_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu2 {
- cpu-supply = <&vddcpu>;
- operating-points-v2 = <&cpu_opp_table>;
- clocks = <&clkc CLKID_CPU2_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu3 {
- cpu-supply = <&vddcpu>;
- operating-points-v2 = <&cpu_opp_table>;
- clocks = <&clkc CLKID_CPU3_CLK>;
- clock-latency = <50000>;
-};
-
-ðmac {
- status = "okay";
- phy-handle = <&internal_ephy>;
- phy-mode = "rmii";
-};
-
-&frddr_a {
- status = "okay";
-};
-
-&frddr_b {
- status = "okay";
-};
-
-&frddr_c {
- status = "okay";
-};
-
-&hdmi_tx {
- status = "okay";
- pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>;
- pinctrl-names = "default";
-};
-
-&hdmi_tx_tmds_port {
- hdmi_tx_tmds_out: endpoint {
- remote-endpoint = <&hdmi_connector_in>;
- };
-};
-
-&i2c3 {
- status = "okay";
- pinctrl-0 = <&i2c3_sda_a_pins>, <&i2c3_sck_a_pins>;
- pinctrl-names = "default";
-};
-
-&ir {
- status = "okay";
- pinctrl-0 = <&remote_input_ao_pins>;
- pinctrl-names = "default";
-};
-
-&pdm {
- pinctrl-0 = <&pdm_din0_z_pins>, <&pdm_dclk_z_pins>;
- pinctrl-names = "default";
- status = "okay";
-};
-
-&pwm_AO_ab {
- status = "okay";
- pinctrl-0 = <&pwm_ao_a_pins>;
- pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin0";
-};
-
-&pwm_AO_cd {
- pinctrl-0 = <&pwm_ao_d_e_pins>;
- pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin1";
- status = "okay";
-};
-
-&pwm_ef {
- status = "okay";
- pinctrl-0 = <&pwm_e_pins>;
- pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin0";
-};
-
-&saradc {
- status = "okay";
- vref-supply = <&vddio_ao1v8>;
-};
-
-/* SDIO */
-&sd_emmc_a {
- status = "okay";
- pinctrl-0 = <&sdio_pins>;
- pinctrl-1 = <&sdio_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
- #address-cells = <1>;
- #size-cells = <0>;
-
- bus-width = <4>;
- cap-sd-highspeed;
- sd-uhs-sdr50;
- max-frequency = <100000000>;
-
- non-removable;
- disable-wp;
-
- /* WiFi firmware requires power to be kept while in suspend */
- keep-power-in-suspend;
-
- mmc-pwrseq = <&sdio_pwrseq>;
-
- vmmc-supply = <&vddao_3v3>;
- vqmmc-supply = <&vddio_ao1v8>;
-
- brcmf: wifi@1 {
- reg = <1>;
- compatible = "brcm,bcm4329-fmac";
- };
-};
-
-/* SD card */
-&sd_emmc_b {
- status = "okay";
- pinctrl-0 = <&sdcard_c_pins>;
- pinctrl-1 = <&sdcard_clk_gate_c_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <4>;
- cap-sd-highspeed;
- max-frequency = <50000000>;
- disable-wp;
-
- cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
- vmmc-supply = <&vddao_3v3>;
- vqmmc-supply = <&vddao_3v3>;
-};
-
-/* eMMC */
-&sd_emmc_c {
- status = "okay";
- pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>;
- pinctrl-1 = <&emmc_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <8>;
- cap-mmc-highspeed;
- mmc-ddr-1_8v;
- mmc-hs200-1_8v;
- max-frequency = <200000000>;
- non-removable;
- disable-wp;
-
- mmc-pwrseq = <&emmc_pwrseq>;
- vmmc-supply = <&vddao_3v3>;
- vqmmc-supply = <&emmc_1v8>;
-};
-
-&tdmif_a {
- pinctrl-0 = <&tdm_a_dout0_pins>, <&tdm_a_fs_pins>, <&tdm_a_sclk_pins>;
- pinctrl-names = "default";
- status = "okay";
-
- assigned-clocks = <&clkc_audio AUD_CLKID_TDM_SCLK_PAD0>,
- <&clkc_audio AUD_CLKID_TDM_LRCLK_PAD0>;
- assigned-clock-parents = <&clkc_audio AUD_CLKID_MST_A_SCLK>,
- <&clkc_audio AUD_CLKID_MST_A_LRCLK>;
- assigned-clock-rates = <0>, <0>;
-};
-
-&tdmif_b {
- status = "okay";
-};
-
-&tdmin_a {
- status = "okay";
-};
-
-&tdmin_b {
- status = "okay";
-};
-
-&tdmout_a {
- status = "okay";
-};
-
-&tdmout_b {
- status = "okay";
-};
-
-&toddr_a {
- status = "okay";
-};
-
-&toddr_b {
- status = "okay";
-};
-
-&toddr_c {
- status = "okay";
-};
-
-&tohdmitx {
- status = "okay";
-};
-
-&uart_A {
- status = "okay";
- pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
- pinctrl-names = "default";
- uart-has-rtscts;
-
- bluetooth {
- compatible = "brcm,bcm43438-bt";
- interrupt-parent = <&gpio_intc>;
- interrupts = <95 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "host-wakeup";
- shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
- max-speed = <2000000>;
- clocks = <&wifi32k>;
- clock-names = "lpo";
- vbat-supply = <&vddao_3v3>;
- vddio-supply = <&vddio_ao1v8>;
- };
-};
-
-/* Exposed via the on-board USB to Serial FT232RL IC */
-&uart_AO {
- status = "okay";
- pinctrl-0 = <&uart_ao_a_pins>;
- pinctrl-names = "default";
-};
-
-&usb {
- status = "okay";
- dr_mode = "otg";
-};
diff --git a/arch/arm/dts/meson-sm1.dtsi b/arch/arm/dts/meson-sm1.dtsi
deleted file mode 100644
index 56ca0ba..0000000
--- a/arch/arm/dts/meson-sm1.dtsi
+++ /dev/null
@@ -1,550 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2019 BayLibre, SAS
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- */
-
-#include "meson-g12-common.dtsi"
-#include <dt-bindings/clock/axg-audio-clkc.h>
-#include <dt-bindings/power/meson-sm1-power.h>
-#include <dt-bindings/reset/amlogic,meson-axg-audio-arb.h>
-#include <dt-bindings/reset/amlogic,meson-g12a-audio-reset.h>
-
-/ {
- compatible = "amlogic,sm1";
-
- tdmif_a: audio-controller-0 {
- compatible = "amlogic,axg-tdm-iface";
- #sound-dai-cells = <0>;
- sound-name-prefix = "TDM_A";
- clocks = <&clkc_audio AUD_CLKID_MST_A_MCLK>,
- <&clkc_audio AUD_CLKID_MST_A_SCLK>,
- <&clkc_audio AUD_CLKID_MST_A_LRCLK>;
- clock-names = "mclk", "sclk", "lrclk";
- status = "disabled";
- };
-
- tdmif_b: audio-controller-1 {
- compatible = "amlogic,axg-tdm-iface";
- #sound-dai-cells = <0>;
- sound-name-prefix = "TDM_B";
- clocks = <&clkc_audio AUD_CLKID_MST_B_MCLK>,
- <&clkc_audio AUD_CLKID_MST_B_SCLK>,
- <&clkc_audio AUD_CLKID_MST_B_LRCLK>;
- clock-names = "mclk", "sclk", "lrclk";
- status = "disabled";
- };
-
- tdmif_c: audio-controller-2 {
- compatible = "amlogic,axg-tdm-iface";
- #sound-dai-cells = <0>;
- sound-name-prefix = "TDM_C";
- clocks = <&clkc_audio AUD_CLKID_MST_C_MCLK>,
- <&clkc_audio AUD_CLKID_MST_C_SCLK>,
- <&clkc_audio AUD_CLKID_MST_C_LRCLK>;
- clock-names = "mclk", "sclk", "lrclk";
- status = "disabled";
- };
-
- cpus {
- #address-cells = <0x2>;
- #size-cells = <0x0>;
-
- cpu0: cpu@0 {
- device_type = "cpu";
- compatible = "arm,cortex-a55";
- reg = <0x0 0x0>;
- enable-method = "psci";
- next-level-cache = <&l2>;
- #cooling-cells = <2>;
- };
-
- cpu1: cpu@1 {
- device_type = "cpu";
- compatible = "arm,cortex-a55";
- reg = <0x0 0x1>;
- enable-method = "psci";
- next-level-cache = <&l2>;
- #cooling-cells = <2>;
- };
-
- cpu2: cpu@2 {
- device_type = "cpu";
- compatible = "arm,cortex-a55";
- reg = <0x0 0x2>;
- enable-method = "psci";
- next-level-cache = <&l2>;
- #cooling-cells = <2>;
- };
-
- cpu3: cpu@3 {
- device_type = "cpu";
- compatible = "arm,cortex-a55";
- reg = <0x0 0x3>;
- enable-method = "psci";
- next-level-cache = <&l2>;
- #cooling-cells = <2>;
- };
-
- l2: l2-cache0 {
- compatible = "cache";
- cache-level = <2>;
- };
- };
-
- cpu_opp_table: opp-table {
- compatible = "operating-points-v2";
- opp-shared;
-
- opp-1000000000 {
- opp-hz = /bits/ 64 <1000000000>;
- opp-microvolt = <770000>;
- };
-
- opp-1200000000 {
- opp-hz = /bits/ 64 <1200000000>;
- opp-microvolt = <780000>;
- };
-
- opp-1404000000 {
- opp-hz = /bits/ 64 <1404000000>;
- opp-microvolt = <790000>;
- };
-
- opp-1500000000 {
- opp-hz = /bits/ 64 <1500000000>;
- opp-microvolt = <800000>;
- };
-
- opp-1608000000 {
- opp-hz = /bits/ 64 <1608000000>;
- opp-microvolt = <810000>;
- };
-
- opp-1704000000 {
- opp-hz = /bits/ 64 <1704000000>;
- opp-microvolt = <850000>;
- };
-
- opp-1800000000 {
- opp-hz = /bits/ 64 <1800000000>;
- opp-microvolt = <900000>;
- };
-
- opp-1908000000 {
- opp-hz = /bits/ 64 <1908000000>;
- opp-microvolt = <950000>;
- };
- };
-};
-
-&apb {
- audio: bus@60000 {
- compatible = "simple-bus";
- reg = <0x0 0x60000 0x0 0x1000>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges = <0x0 0x0 0x0 0x60000 0x0 0x1000>;
-
- clkc_audio: clock-controller@0 {
- status = "disabled";
- compatible = "amlogic,sm1-audio-clkc";
- reg = <0x0 0x0 0x0 0xb4>;
- #clock-cells = <1>;
- #reset-cells = <1>;
-
- clocks = <&clkc CLKID_AUDIO>,
- <&clkc CLKID_MPLL0>,
- <&clkc CLKID_MPLL1>,
- <&clkc CLKID_MPLL2>,
- <&clkc CLKID_MPLL3>,
- <&clkc CLKID_HIFI_PLL>,
- <&clkc CLKID_FCLK_DIV3>,
- <&clkc CLKID_FCLK_DIV4>,
- <&clkc CLKID_FCLK_DIV5>;
- clock-names = "pclk",
- "mst_in0",
- "mst_in1",
- "mst_in2",
- "mst_in3",
- "mst_in4",
- "mst_in5",
- "mst_in6",
- "mst_in7";
-
- resets = <&reset RESET_AUDIO>;
- };
-
- toddr_a: audio-controller@100 {
- compatible = "amlogic,sm1-toddr",
- "amlogic,axg-toddr";
- reg = <0x0 0x100 0x0 0x2c>;
- #sound-dai-cells = <0>;
- sound-name-prefix = "TODDR_A";
- interrupts = <GIC_SPI 148 IRQ_TYPE_EDGE_RISING>;
- clocks = <&clkc_audio AUD_CLKID_TODDR_A>;
- resets = <&arb AXG_ARB_TODDR_A>,
- <&clkc_audio AUD_RESET_TODDR_A>;
- reset-names = "arb", "rst";
- amlogic,fifo-depth = <8192>;
- status = "disabled";
- };
-
- toddr_b: audio-controller@140 {
- compatible = "amlogic,sm1-toddr",
- "amlogic,axg-toddr";
- reg = <0x0 0x140 0x0 0x2c>;
- #sound-dai-cells = <0>;
- sound-name-prefix = "TODDR_B";
- interrupts = <GIC_SPI 149 IRQ_TYPE_EDGE_RISING>;
- clocks = <&clkc_audio AUD_CLKID_TODDR_B>;
- resets = <&arb AXG_ARB_TODDR_B>,
- <&clkc_audio AUD_RESET_TODDR_B>;
- reset-names = "arb", "rst";
- amlogic,fifo-depth = <256>;
- status = "disabled";
- };
-
- toddr_c: audio-controller@180 {
- compatible = "amlogic,sm1-toddr",
- "amlogic,axg-toddr";
- reg = <0x0 0x180 0x0 0x2c>;
- #sound-dai-cells = <0>;
- sound-name-prefix = "TODDR_C";
- interrupts = <GIC_SPI 150 IRQ_TYPE_EDGE_RISING>;
- clocks = <&clkc_audio AUD_CLKID_TODDR_C>;
- resets = <&arb AXG_ARB_TODDR_C>,
- <&clkc_audio AUD_RESET_TODDR_C>;
- reset-names = "arb", "rst";
- amlogic,fifo-depth = <256>;
- status = "disabled";
- };
-
- frddr_a: audio-controller@1c0 {
- compatible = "amlogic,sm1-frddr",
- "amlogic,axg-frddr";
- reg = <0x0 0x1c0 0x0 0x2c>;
- #sound-dai-cells = <0>;
- sound-name-prefix = "FRDDR_A";
- interrupts = <GIC_SPI 152 IRQ_TYPE_EDGE_RISING>;
- clocks = <&clkc_audio AUD_CLKID_FRDDR_A>;
- resets = <&arb AXG_ARB_FRDDR_A>,
- <&clkc_audio AUD_RESET_FRDDR_A>;
- reset-names = "arb", "rst";
- amlogic,fifo-depth = <512>;
- status = "disabled";
- };
-
- frddr_b: audio-controller@200 {
- compatible = "amlogic,sm1-frddr",
- "amlogic,axg-frddr";
- reg = <0x0 0x200 0x0 0x2c>;
- #sound-dai-cells = <0>;
- sound-name-prefix = "FRDDR_B";
- interrupts = <GIC_SPI 153 IRQ_TYPE_EDGE_RISING>;
- clocks = <&clkc_audio AUD_CLKID_FRDDR_B>;
- resets = <&arb AXG_ARB_FRDDR_B>,
- <&clkc_audio AUD_RESET_FRDDR_B>;
- reset-names = "arb", "rst";
- amlogic,fifo-depth = <256>;
- status = "disabled";
- };
-
- frddr_c: audio-controller@240 {
- compatible = "amlogic,sm1-frddr",
- "amlogic,axg-frddr";
- reg = <0x0 0x240 0x0 0x2c>;
- #sound-dai-cells = <0>;
- sound-name-prefix = "FRDDR_C";
- interrupts = <GIC_SPI 154 IRQ_TYPE_EDGE_RISING>;
- clocks = <&clkc_audio AUD_CLKID_FRDDR_C>;
- resets = <&arb AXG_ARB_FRDDR_C>,
- <&clkc_audio AUD_RESET_FRDDR_C>;
- reset-names = "arb", "rst";
- amlogic,fifo-depth = <256>;
- status = "disabled";
- };
-
- arb: reset-controller@280 {
- status = "disabled";
- compatible = "amlogic,meson-sm1-audio-arb";
- reg = <0x0 0x280 0x0 0x4>;
- #reset-cells = <1>;
- clocks = <&clkc_audio AUD_CLKID_DDR_ARB>;
- };
-
- tdmin_a: audio-controller@300 {
- compatible = "amlogic,sm1-tdmin",
- "amlogic,axg-tdmin";
- reg = <0x0 0x300 0x0 0x40>;
- sound-name-prefix = "TDMIN_A";
- resets = <&clkc_audio AUD_RESET_TDMIN_A>;
- clocks = <&clkc_audio AUD_CLKID_TDMIN_A>,
- <&clkc_audio AUD_CLKID_TDMIN_A_SCLK>,
- <&clkc_audio AUD_CLKID_TDMIN_A_SCLK_SEL>,
- <&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>,
- <&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>;
- clock-names = "pclk", "sclk", "sclk_sel",
- "lrclk", "lrclk_sel";
- status = "disabled";
- };
-
- tdmin_b: audio-controller@340 {
- compatible = "amlogic,sm1-tdmin",
- "amlogic,axg-tdmin";
- reg = <0x0 0x340 0x0 0x40>;
- sound-name-prefix = "TDMIN_B";
- resets = <&clkc_audio AUD_RESET_TDMIN_B>;
- clocks = <&clkc_audio AUD_CLKID_TDMIN_B>,
- <&clkc_audio AUD_CLKID_TDMIN_B_SCLK>,
- <&clkc_audio AUD_CLKID_TDMIN_B_SCLK_SEL>,
- <&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>,
- <&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>;
- clock-names = "pclk", "sclk", "sclk_sel",
- "lrclk", "lrclk_sel";
- status = "disabled";
- };
-
- tdmin_c: audio-controller@380 {
- compatible = "amlogic,sm1-tdmin",
- "amlogic,axg-tdmin";
- reg = <0x0 0x380 0x0 0x40>;
- sound-name-prefix = "TDMIN_C";
- resets = <&clkc_audio AUD_RESET_TDMIN_C>;
- clocks = <&clkc_audio AUD_CLKID_TDMIN_C>,
- <&clkc_audio AUD_CLKID_TDMIN_C_SCLK>,
- <&clkc_audio AUD_CLKID_TDMIN_C_SCLK_SEL>,
- <&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>,
- <&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>;
- clock-names = "pclk", "sclk", "sclk_sel",
- "lrclk", "lrclk_sel";
- status = "disabled";
- };
-
- tdmin_lb: audio-controller@3c0 {
- compatible = "amlogic,sm1-tdmin",
- "amlogic,axg-tdmin";
- reg = <0x0 0x3c0 0x0 0x40>;
- sound-name-prefix = "TDMIN_LB";
- resets = <&clkc_audio AUD_RESET_TDMIN_LB>;
- clocks = <&clkc_audio AUD_CLKID_TDMIN_LB>,
- <&clkc_audio AUD_CLKID_TDMIN_LB_SCLK>,
- <&clkc_audio AUD_CLKID_TDMIN_LB_SCLK_SEL>,
- <&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>,
- <&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>;
- clock-names = "pclk", "sclk", "sclk_sel",
- "lrclk", "lrclk_sel";
- status = "disabled";
- };
-
- spdifin: audio-controller@400 {
- compatible = "amlogic,g12a-spdifin",
- "amlogic,axg-spdifin";
- reg = <0x0 0x400 0x0 0x30>;
- #sound-dai-cells = <0>;
- sound-name-prefix = "SPDIFIN";
- interrupts = <GIC_SPI 151 IRQ_TYPE_EDGE_RISING>;
- clocks = <&clkc_audio AUD_CLKID_SPDIFIN>,
- <&clkc_audio AUD_CLKID_SPDIFIN_CLK>;
- clock-names = "pclk", "refclk";
- resets = <&clkc_audio AUD_RESET_SPDIFIN>;
- status = "disabled";
- };
-
- spdifout_a: audio-controller@480 {
- compatible = "amlogic,g12a-spdifout",
- "amlogic,axg-spdifout";
- reg = <0x0 0x480 0x0 0x50>;
- #sound-dai-cells = <0>;
- sound-name-prefix = "SPDIFOUT_A";
- clocks = <&clkc_audio AUD_CLKID_SPDIFOUT>,
- <&clkc_audio AUD_CLKID_SPDIFOUT_CLK>;
- clock-names = "pclk", "mclk";
- resets = <&clkc_audio AUD_RESET_SPDIFOUT>;
- status = "disabled";
- };
-
- tdmout_a: audio-controller@500 {
- compatible = "amlogic,sm1-tdmout";
- reg = <0x0 0x500 0x0 0x40>;
- sound-name-prefix = "TDMOUT_A";
- resets = <&clkc_audio AUD_RESET_TDMOUT_A>;
- clocks = <&clkc_audio AUD_CLKID_TDMOUT_A>,
- <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK>,
- <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK_SEL>,
- <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>,
- <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>;
- clock-names = "pclk", "sclk", "sclk_sel",
- "lrclk", "lrclk_sel";
- status = "disabled";
- };
-
- tdmout_b: audio-controller@540 {
- compatible = "amlogic,sm1-tdmout";
- reg = <0x0 0x540 0x0 0x40>;
- sound-name-prefix = "TDMOUT_B";
- resets = <&clkc_audio AUD_RESET_TDMOUT_B>;
- clocks = <&clkc_audio AUD_CLKID_TDMOUT_B>,
- <&clkc_audio AUD_CLKID_TDMOUT_B_SCLK>,
- <&clkc_audio AUD_CLKID_TDMOUT_B_SCLK_SEL>,
- <&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>,
- <&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>;
- clock-names = "pclk", "sclk", "sclk_sel",
- "lrclk", "lrclk_sel";
- status = "disabled";
- };
-
- tdmout_c: audio-controller@580 {
- compatible = "amlogic,sm1-tdmout";
- reg = <0x0 0x580 0x0 0x40>;
- sound-name-prefix = "TDMOUT_C";
- resets = <&clkc_audio AUD_RESET_TDMOUT_C>;
- clocks = <&clkc_audio AUD_CLKID_TDMOUT_C>,
- <&clkc_audio AUD_CLKID_TDMOUT_C_SCLK>,
- <&clkc_audio AUD_CLKID_TDMOUT_C_SCLK_SEL>,
- <&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>,
- <&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>;
- clock-names = "pclk", "sclk", "sclk_sel",
- "lrclk", "lrclk_sel";
- status = "disabled";
- };
-
- toacodec: audio-controller@740 {
- compatible = "amlogic,sm1-toacodec",
- "amlogic,g12a-toacodec";
- reg = <0x0 0x740 0x0 0x4>;
- #sound-dai-cells = <1>;
- sound-name-prefix = "TOACODEC";
- resets = <&clkc_audio AUD_RESET_TOACODEC>;
- status = "disabled";
- };
-
- tohdmitx: audio-controller@744 {
- compatible = "amlogic,sm1-tohdmitx",
- "amlogic,g12a-tohdmitx";
- reg = <0x0 0x744 0x0 0x4>;
- #sound-dai-cells = <1>;
- sound-name-prefix = "TOHDMITX";
- resets = <&clkc_audio AUD_RESET_TOHDMITX>;
- status = "disabled";
- };
-
- toddr_d: audio-controller@840 {
- compatible = "amlogic,sm1-toddr",
- "amlogic,axg-toddr";
- reg = <0x0 0x840 0x0 0x2c>;
- #sound-dai-cells = <0>;
- sound-name-prefix = "TODDR_D";
- interrupts = <GIC_SPI 49 IRQ_TYPE_EDGE_RISING>;
- clocks = <&clkc_audio AUD_CLKID_TODDR_D>;
- resets = <&arb AXG_ARB_TODDR_D>,
- <&clkc_audio AUD_RESET_TODDR_D>;
- reset-names = "arb", "rst";
- amlogic,fifo-depth = <256>;
- status = "disabled";
- };
-
- frddr_d: audio-controller@880 {
- compatible = "amlogic,sm1-frddr",
- "amlogic,axg-frddr";
- reg = <0x0 0x880 0x0 0x2c>;
- #sound-dai-cells = <0>;
- sound-name-prefix = "FRDDR_D";
- interrupts = <GIC_SPI 50 IRQ_TYPE_EDGE_RISING>;
- clocks = <&clkc_audio AUD_CLKID_FRDDR_D>;
- resets = <&arb AXG_ARB_FRDDR_D>,
- <&clkc_audio AUD_RESET_FRDDR_D>;
- reset-names = "arb", "rst";
- amlogic,fifo-depth = <256>;
- status = "disabled";
- };
- };
-
- pdm: audio-controller@61000 {
- compatible = "amlogic,sm1-pdm",
- "amlogic,axg-pdm";
- reg = <0x0 0x61000 0x0 0x34>;
- #sound-dai-cells = <0>;
- sound-name-prefix = "PDM";
- clocks = <&clkc_audio AUD_CLKID_PDM>,
- <&clkc_audio AUD_CLKID_PDM_DCLK>,
- <&clkc_audio AUD_CLKID_PDM_SYSCLK>;
- clock-names = "pclk", "dclk", "sysclk";
- resets = <&clkc_audio AUD_RESET_PDM>;
- status = "disabled";
- };
-};
-
-&cecb_AO {
- compatible = "amlogic,meson-sm1-ao-cec";
-};
-
-&clk_msr {
- compatible = "amlogic,meson-sm1-clk-measure";
-};
-
-
-&clkc {
- compatible = "amlogic,sm1-clkc";
-};
-
-&cpu_thermal {
- cooling-maps {
- map0 {
- trip = <&cpu_passive>;
- cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- };
-
- map1 {
- trip = <&cpu_hot>;
- cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- };
- };
-};
-
-ðmac {
- power-domains = <&pwrc PWRC_SM1_ETH_ID>;
-};
-
-&gpio_intc {
- compatible = "amlogic,meson-sm1-gpio-intc",
- "amlogic,meson-gpio-intc";
-};
-
-&pcie {
- power-domains = <&pwrc PWRC_SM1_PCIE_ID>;
-};
-
-&pmu {
- compatible = "amlogic,sm1-ddr-pmu";
-};
-
-&pwrc {
- compatible = "amlogic,meson-sm1-pwrc";
-};
-
-&simplefb_cvbs {
- power-domains = <&pwrc PWRC_SM1_VPU_ID>;
-};
-
-&simplefb_hdmi {
- power-domains = <&pwrc PWRC_SM1_VPU_ID>;
-};
-
-&vdec {
- compatible = "amlogic,sm1-vdec";
-};
-
-&vpu {
- power-domains = <&pwrc PWRC_SM1_VPU_ID>;
-};
-
-&usb {
- power-domains = <&pwrc PWRC_SM1_USB_ID>;
-};
diff --git a/arch/arm/dts/msm8916-pm8916.dtsi b/arch/arm/dts/msm8916-pm8916.dtsi
deleted file mode 100644
index b1a7eaf..0000000
--- a/arch/arm/dts/msm8916-pm8916.dtsi
+++ /dev/null
@@ -1,157 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * msm8916-pm8916.dtsi describes common properties (e.g. regulator connections)
- * that apply to most devices that make use of the MSM8916 SoC and PM8916 PMIC.
- * Many regulators have a fixed purpose in the original reference design and
- * were rarely re-used for different purposes. Devices that deviate from the
- * typical reference design should not make use of this include and instead add
- * the necessary properties in the board-specific device tree.
- */
-
-#include "msm8916.dtsi"
-#include "pm8916.dtsi"
-
-&camss {
- vdda-supply = <&pm8916_l2>;
-};
-
-&mdss_dsi0 {
- vdda-supply = <&pm8916_l2>;
- vddio-supply = <&pm8916_l6>;
-};
-
-&mdss_dsi0_phy {
- vddio-supply = <&pm8916_l6>;
-};
-
-&mpss {
- pll-supply = <&pm8916_l7>;
-};
-
-&pm8916_codec {
- vdd-cdc-io-supply = <&pm8916_l5>;
- vdd-cdc-tx-rx-cx-supply = <&pm8916_l5>;
- vdd-micbias-supply = <&pm8916_l13>;
-};
-
-&sdhc_1 {
- vmmc-supply = <&pm8916_l8>;
- vqmmc-supply = <&pm8916_l5>;
-};
-
-&sdhc_2 {
- vmmc-supply = <&pm8916_l11>;
- vqmmc-supply = <&pm8916_l12>;
-};
-
-&usb_hs_phy {
- v1p8-supply = <&pm8916_l7>;
- v3p3-supply = <&pm8916_l13>;
-};
-
-&wcnss {
- vddpx-supply = <&pm8916_l7>;
-};
-
-&wcnss_iris {
- vddxo-supply = <&pm8916_l7>;
- vddrfa-supply = <&pm8916_s3>;
- vddpa-supply = <&pm8916_l9>;
- vdddig-supply = <&pm8916_l5>;
-};
-
-&rpm_requests {
- pm8916_rpm_regulators: regulators {
- compatible = "qcom,rpm-pm8916-regulators";
- vdd_l1_l2_l3-supply = <&pm8916_s3>;
- vdd_l4_l5_l6-supply = <&pm8916_s4>;
- vdd_l7-supply = <&pm8916_s4>;
-
- /* pm8916_s1 is managed by rpmpd (MSM8916_VDDCX) */
-
- pm8916_s3: s3 {
- regulator-min-microvolt = <1250000>;
- regulator-max-microvolt = <1350000>;
- regulator-always-on; /* Needed for L2 */
- };
-
- pm8916_s4: s4 {
- regulator-min-microvolt = <1850000>;
- regulator-max-microvolt = <2150000>;
- regulator-always-on; /* Needed for L5/L7 */
- };
-
- /*
- * Some of the regulators are unused or managed by another
- * processor (e.g. the modem). We should still define nodes for
- * them to ensure the vote from the application processor can be
- * dropped in case the regulators are already on during boot.
- *
- * The labels for these nodes are omitted on purpose because
- * boards should configure a proper voltage before using them.
- */
- l1 {};
-
- pm8916_l2: l2 {
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1200000>;
- regulator-always-on; /* Needed for LPDDR RAM */
- };
-
- /* pm8916_l3 is managed by rpmpd (MSM8916_VDDMX) */
-
- l4 {};
-
- pm8916_l5: l5 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-always-on; /* Needed for most digital I/O */
- };
-
- pm8916_l6: l6 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- };
-
- pm8916_l7: l7 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-always-on; /* Needed for CPU PLL */
- };
-
- pm8916_l8: l8 {
- regulator-min-microvolt = <2900000>;
- regulator-max-microvolt = <2900000>;
- };
-
- pm8916_l9: l9 {
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- };
-
- l10 {};
-
- pm8916_l11: l11 {
- regulator-min-microvolt = <2950000>;
- regulator-max-microvolt = <2950000>;
- regulator-allow-set-load;
- regulator-system-load = <200000>;
- };
-
- pm8916_l12: l12 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <2950000>;
- };
-
- pm8916_l13: l13 {
- regulator-min-microvolt = <3075000>;
- regulator-max-microvolt = <3075000>;
- };
-
- l14 {};
- l15 {};
- l16 {};
- l17 {};
- l18 {};
- };
-};
diff --git a/arch/arm/dts/msm8916.dtsi b/arch/arm/dts/msm8916.dtsi
deleted file mode 100644
index 4f799b5..0000000
--- a/arch/arm/dts/msm8916.dtsi
+++ /dev/null
@@ -1,2702 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Copyright (c) 2013-2015, The Linux Foundation. All rights reserved.
- */
-
-#include <dt-bindings/arm/coresight-cti-dt.h>
-#include <dt-bindings/clock/qcom,gcc-msm8916.h>
-#include <dt-bindings/clock/qcom,rpmcc.h>
-#include <dt-bindings/interconnect/qcom,msm8916.h>
-#include <dt-bindings/interrupt-controller/arm-gic.h>
-#include <dt-bindings/power/qcom-rpmpd.h>
-#include <dt-bindings/reset/qcom,gcc-msm8916.h>
-#include <dt-bindings/thermal/thermal.h>
-
-/ {
- interrupt-parent = <&intc>;
-
- #address-cells = <2>;
- #size-cells = <2>;
-
- chosen { };
-
- memory@80000000 {
- device_type = "memory";
- /* We expect the bootloader to fill in the reg */
- reg = <0 0x80000000 0 0>;
- };
-
- reserved-memory {
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- tz-apps@86000000 {
- reg = <0x0 0x86000000 0x0 0x300000>;
- no-map;
- };
-
- smem@86300000 {
- compatible = "qcom,smem";
- reg = <0x0 0x86300000 0x0 0x100000>;
- no-map;
-
- hwlocks = <&tcsr_mutex 3>;
- qcom,rpm-msg-ram = <&rpm_msg_ram>;
- };
-
- hypervisor@86400000 {
- reg = <0x0 0x86400000 0x0 0x100000>;
- no-map;
- };
-
- tz@86500000 {
- reg = <0x0 0x86500000 0x0 0x180000>;
- no-map;
- };
-
- reserved@86680000 {
- reg = <0x0 0x86680000 0x0 0x80000>;
- no-map;
- };
-
- rmtfs@86700000 {
- compatible = "qcom,rmtfs-mem";
- reg = <0x0 0x86700000 0x0 0xe0000>;
- no-map;
-
- qcom,client-id = <1>;
- };
-
- rfsa@867e0000 {
- reg = <0x0 0x867e0000 0x0 0x20000>;
- no-map;
- };
-
- mpss_mem: mpss@86800000 {
- /*
- * The memory region for the mpss firmware is generally
- * relocatable and could be allocated dynamically.
- * However, many firmware versions tend to fail when
- * loaded to some special addresses, so it is hard to
- * define reliable alloc-ranges.
- *
- * alignment = <0x0 0x400000>;
- * alloc-ranges = <0x0 0x86800000 0x0 0x8000000>;
- */
- reg = <0x0 0x86800000 0x0 0>; /* size is device-specific */
- no-map;
- status = "disabled";
- };
-
- wcnss_mem: wcnss {
- size = <0x0 0x600000>;
- alignment = <0x0 0x100000>;
- alloc-ranges = <0x0 0x86800000 0x0 0x8000000>;
- no-map;
- status = "disabled";
- };
-
- venus_mem: venus {
- size = <0x0 0x500000>;
- alignment = <0x0 0x100000>;
- alloc-ranges = <0x0 0x86800000 0x0 0x8000000>;
- no-map;
- status = "disabled";
- };
-
- mba_mem: mba {
- size = <0x0 0x100000>;
- alignment = <0x0 0x100000>;
- alloc-ranges = <0x0 0x86800000 0x0 0x8000000>;
- no-map;
- status = "disabled";
- };
- };
-
- clocks {
- xo_board: xo-board {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <19200000>;
- };
-
- sleep_clk: sleep-clk {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <32768>;
- };
- };
-
- cpus {
- #address-cells = <1>;
- #size-cells = <0>;
-
- CPU0: cpu@0 {
- device_type = "cpu";
- compatible = "arm,cortex-a53";
- reg = <0x0>;
- next-level-cache = <&L2_0>;
- enable-method = "psci";
- clocks = <&apcs>;
- operating-points-v2 = <&cpu_opp_table>;
- #cooling-cells = <2>;
- power-domains = <&CPU_PD0>;
- power-domain-names = "psci";
- qcom,acc = <&cpu0_acc>;
- qcom,saw = <&cpu0_saw>;
- };
-
- CPU1: cpu@1 {
- device_type = "cpu";
- compatible = "arm,cortex-a53";
- reg = <0x1>;
- next-level-cache = <&L2_0>;
- enable-method = "psci";
- clocks = <&apcs>;
- operating-points-v2 = <&cpu_opp_table>;
- #cooling-cells = <2>;
- power-domains = <&CPU_PD1>;
- power-domain-names = "psci";
- qcom,acc = <&cpu1_acc>;
- qcom,saw = <&cpu1_saw>;
- };
-
- CPU2: cpu@2 {
- device_type = "cpu";
- compatible = "arm,cortex-a53";
- reg = <0x2>;
- next-level-cache = <&L2_0>;
- enable-method = "psci";
- clocks = <&apcs>;
- operating-points-v2 = <&cpu_opp_table>;
- #cooling-cells = <2>;
- power-domains = <&CPU_PD2>;
- power-domain-names = "psci";
- qcom,acc = <&cpu2_acc>;
- qcom,saw = <&cpu2_saw>;
- };
-
- CPU3: cpu@3 {
- device_type = "cpu";
- compatible = "arm,cortex-a53";
- reg = <0x3>;
- next-level-cache = <&L2_0>;
- enable-method = "psci";
- clocks = <&apcs>;
- operating-points-v2 = <&cpu_opp_table>;
- #cooling-cells = <2>;
- power-domains = <&CPU_PD3>;
- power-domain-names = "psci";
- qcom,acc = <&cpu3_acc>;
- qcom,saw = <&cpu3_saw>;
- };
-
- L2_0: l2-cache {
- compatible = "cache";
- cache-level = <2>;
- cache-unified;
- };
-
- idle-states {
- entry-method = "psci";
-
- CPU_SLEEP_0: cpu-sleep-0 {
- compatible = "arm,idle-state";
- idle-state-name = "standalone-power-collapse";
- arm,psci-suspend-param = <0x40000002>;
- entry-latency-us = <130>;
- exit-latency-us = <150>;
- min-residency-us = <2000>;
- local-timer-stop;
- };
- };
-
- domain-idle-states {
-
- CLUSTER_RET: cluster-retention {
- compatible = "domain-idle-state";
- arm,psci-suspend-param = <0x41000012>;
- entry-latency-us = <500>;
- exit-latency-us = <500>;
- min-residency-us = <2000>;
- };
-
- CLUSTER_PWRDN: cluster-gdhs {
- compatible = "domain-idle-state";
- arm,psci-suspend-param = <0x41000032>;
- entry-latency-us = <2000>;
- exit-latency-us = <2000>;
- min-residency-us = <6000>;
- };
- };
- };
-
- cpu_opp_table: opp-table-cpu {
- compatible = "operating-points-v2";
- opp-shared;
-
- opp-200000000 {
- opp-hz = /bits/ 64 <200000000>;
- };
- opp-400000000 {
- opp-hz = /bits/ 64 <400000000>;
- };
- opp-800000000 {
- opp-hz = /bits/ 64 <800000000>;
- };
- opp-998400000 {
- opp-hz = /bits/ 64 <998400000>;
- };
- };
-
- firmware {
- scm: scm {
- compatible = "qcom,scm-msm8916", "qcom,scm";
- clocks = <&gcc GCC_CRYPTO_CLK>,
- <&gcc GCC_CRYPTO_AXI_CLK>,
- <&gcc GCC_CRYPTO_AHB_CLK>;
- clock-names = "core", "bus", "iface";
- #reset-cells = <1>;
-
- qcom,dload-mode = <&tcsr 0x6100>;
- };
- };
-
- pmu {
- compatible = "arm,cortex-a53-pmu";
- interrupts = <GIC_PPI 7 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
- };
-
- psci {
- compatible = "arm,psci-1.0";
- method = "smc";
-
- CPU_PD0: power-domain-cpu0 {
- #power-domain-cells = <0>;
- power-domains = <&CLUSTER_PD>;
- domain-idle-states = <&CPU_SLEEP_0>;
- };
-
- CPU_PD1: power-domain-cpu1 {
- #power-domain-cells = <0>;
- power-domains = <&CLUSTER_PD>;
- domain-idle-states = <&CPU_SLEEP_0>;
- };
-
- CPU_PD2: power-domain-cpu2 {
- #power-domain-cells = <0>;
- power-domains = <&CLUSTER_PD>;
- domain-idle-states = <&CPU_SLEEP_0>;
- };
-
- CPU_PD3: power-domain-cpu3 {
- #power-domain-cells = <0>;
- power-domains = <&CLUSTER_PD>;
- domain-idle-states = <&CPU_SLEEP_0>;
- };
-
- CLUSTER_PD: power-domain-cluster {
- #power-domain-cells = <0>;
- domain-idle-states = <&CLUSTER_RET>, <&CLUSTER_PWRDN>;
- };
- };
-
- rpm: remoteproc {
- compatible = "qcom,msm8916-rpm-proc", "qcom,rpm-proc";
-
- smd-edge {
- interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;
- qcom,ipc = <&apcs 8 0>;
- qcom,smd-edge = <15>;
-
- rpm_requests: rpm-requests {
- compatible = "qcom,rpm-msm8916";
- qcom,smd-channels = "rpm_requests";
-
- rpmcc: clock-controller {
- compatible = "qcom,rpmcc-msm8916", "qcom,rpmcc";
- #clock-cells = <1>;
- clocks = <&xo_board>;
- clock-names = "xo";
- };
-
- rpmpd: power-controller {
- compatible = "qcom,msm8916-rpmpd";
- #power-domain-cells = <1>;
- operating-points-v2 = <&rpmpd_opp_table>;
-
- rpmpd_opp_table: opp-table {
- compatible = "operating-points-v2";
-
- rpmpd_opp_ret: opp1 {
- opp-level = <1>;
- };
- rpmpd_opp_svs_krait: opp2 {
- opp-level = <2>;
- };
- rpmpd_opp_svs_soc: opp3 {
- opp-level = <3>;
- };
- rpmpd_opp_nom: opp4 {
- opp-level = <4>;
- };
- rpmpd_opp_turbo: opp5 {
- opp-level = <5>;
- };
- rpmpd_opp_super_turbo: opp6 {
- opp-level = <6>;
- };
- };
- };
- };
- };
- };
-
- smp2p-hexagon {
- compatible = "qcom,smp2p";
- qcom,smem = <435>, <428>;
-
- interrupts = <GIC_SPI 27 IRQ_TYPE_EDGE_RISING>;
-
- qcom,ipc = <&apcs 8 14>;
-
- qcom,local-pid = <0>;
- qcom,remote-pid = <1>;
-
- hexagon_smp2p_out: master-kernel {
- qcom,entry-name = "master-kernel";
-
- #qcom,smem-state-cells = <1>;
- };
-
- hexagon_smp2p_in: slave-kernel {
- qcom,entry-name = "slave-kernel";
-
- interrupt-controller;
- #interrupt-cells = <2>;
- };
- };
-
- smp2p-wcnss {
- compatible = "qcom,smp2p";
- qcom,smem = <451>, <431>;
-
- interrupts = <GIC_SPI 143 IRQ_TYPE_EDGE_RISING>;
-
- qcom,ipc = <&apcs 8 18>;
-
- qcom,local-pid = <0>;
- qcom,remote-pid = <4>;
-
- wcnss_smp2p_out: master-kernel {
- qcom,entry-name = "master-kernel";
-
- #qcom,smem-state-cells = <1>;
- };
-
- wcnss_smp2p_in: slave-kernel {
- qcom,entry-name = "slave-kernel";
-
- interrupt-controller;
- #interrupt-cells = <2>;
- };
- };
-
- smsm {
- compatible = "qcom,smsm";
-
- #address-cells = <1>;
- #size-cells = <0>;
-
- qcom,ipc-1 = <&apcs 8 13>;
- qcom,ipc-3 = <&apcs 8 19>;
-
- apps_smsm: apps@0 {
- reg = <0>;
-
- #qcom,smem-state-cells = <1>;
- };
-
- hexagon_smsm: hexagon@1 {
- reg = <1>;
- interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>;
-
- interrupt-controller;
- #interrupt-cells = <2>;
- };
-
- wcnss_smsm: wcnss@6 {
- reg = <6>;
- interrupts = <GIC_SPI 144 IRQ_TYPE_EDGE_RISING>;
-
- interrupt-controller;
- #interrupt-cells = <2>;
- };
- };
-
- soc: soc@0 {
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0 0 0 0xffffffff>;
- compatible = "simple-bus";
-
- rng@22000 {
- compatible = "qcom,prng";
- reg = <0x00022000 0x200>;
- clocks = <&gcc GCC_PRNG_AHB_CLK>;
- clock-names = "core";
- };
-
- restart@4ab000 {
- compatible = "qcom,pshold";
- reg = <0x004ab000 0x4>;
- };
-
- qfprom: qfprom@5c000 {
- compatible = "qcom,msm8916-qfprom", "qcom,qfprom";
- reg = <0x0005c000 0x1000>;
- #address-cells = <1>;
- #size-cells = <1>;
-
- tsens_base1: base1@d0 {
- reg = <0xd0 0x1>;
- bits = <0 7>;
- };
-
- tsens_s0_p1: s0-p1@d0 {
- reg = <0xd0 0x2>;
- bits = <7 5>;
- };
-
- tsens_s0_p2: s0-p2@d1 {
- reg = <0xd1 0x2>;
- bits = <4 5>;
- };
-
- tsens_s1_p1: s1-p1@d2 {
- reg = <0xd2 0x1>;
- bits = <1 5>;
- };
- tsens_s1_p2: s1-p2@d2 {
- reg = <0xd2 0x2>;
- bits = <6 5>;
- };
- tsens_s2_p1: s2-p1@d3 {
- reg = <0xd3 0x1>;
- bits = <3 5>;
- };
-
- tsens_s2_p2: s2-p2@d4 {
- reg = <0xd4 0x1>;
- bits = <0 5>;
- };
-
- // no tsens with hw_id 3
-
- tsens_s4_p1: s4-p1@d4 {
- reg = <0xd4 0x2>;
- bits = <5 5>;
- };
-
- tsens_s4_p2: s4-p2@d5 {
- reg = <0xd5 0x1>;
- bits = <2 5>;
- };
-
- tsens_s5_p1: s5-p1@d5 {
- reg = <0xd5 0x2>;
- bits = <7 5>;
- };
-
- tsens_s5_p2: s5-p2@d6 {
- reg = <0xd6 0x2>;
- bits = <4 5>;
- };
-
- tsens_base2: base2@d7 {
- reg = <0xd7 0x1>;
- bits = <1 7>;
- };
-
- tsens_mode: mode@ef {
- reg = <0xef 0x1>;
- bits = <5 3>;
- };
- };
-
- rpm_msg_ram: sram@60000 {
- compatible = "qcom,rpm-msg-ram";
- reg = <0x00060000 0x8000>;
- };
-
- sram@290000 {
- compatible = "qcom,msm8916-rpm-stats";
- reg = <0x00290000 0x10000>;
- };
-
- bimc: interconnect@400000 {
- compatible = "qcom,msm8916-bimc";
- reg = <0x00400000 0x62000>;
- #interconnect-cells = <1>;
- clock-names = "bus", "bus_a";
- clocks = <&rpmcc RPM_SMD_BIMC_CLK>,
- <&rpmcc RPM_SMD_BIMC_A_CLK>;
- };
-
- tsens: thermal-sensor@4a9000 {
- compatible = "qcom,msm8916-tsens", "qcom,tsens-v0_1";
- reg = <0x004a9000 0x1000>, /* TM */
- <0x004a8000 0x1000>; /* SROT */
-
- // no hw_id 3
- nvmem-cells = <&tsens_mode>,
- <&tsens_base1>, <&tsens_base2>,
- <&tsens_s0_p1>, <&tsens_s0_p2>,
- <&tsens_s1_p1>, <&tsens_s1_p2>,
- <&tsens_s2_p1>, <&tsens_s2_p2>,
- <&tsens_s4_p1>, <&tsens_s4_p2>,
- <&tsens_s5_p1>, <&tsens_s5_p2>;
- nvmem-cell-names = "mode",
- "base1", "base2",
- "s0_p1", "s0_p2",
- "s1_p1", "s1_p2",
- "s2_p1", "s2_p2",
- "s4_p1", "s4_p2",
- "s5_p1", "s5_p2";
- #qcom,sensors = <5>;
- interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "uplow";
- #thermal-sensor-cells = <1>;
- };
-
- pcnoc: interconnect@500000 {
- compatible = "qcom,msm8916-pcnoc";
- reg = <0x00500000 0x11000>;
- #interconnect-cells = <1>;
- clock-names = "bus", "bus_a";
- clocks = <&rpmcc RPM_SMD_PCNOC_CLK>,
- <&rpmcc RPM_SMD_PCNOC_A_CLK>;
- };
-
- snoc: interconnect@580000 {
- compatible = "qcom,msm8916-snoc";
- reg = <0x00580000 0x14000>;
- #interconnect-cells = <1>;
- clock-names = "bus", "bus_a";
- clocks = <&rpmcc RPM_SMD_SNOC_CLK>,
- <&rpmcc RPM_SMD_SNOC_A_CLK>;
- };
-
- stm: stm@802000 {
- compatible = "arm,coresight-stm", "arm,primecell";
- reg = <0x00802000 0x1000>,
- <0x09280000 0x180000>;
- reg-names = "stm-base", "stm-stimulus-base";
-
- clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
- clock-names = "apb_pclk", "atclk";
-
- status = "disabled";
-
- out-ports {
- port {
- stm_out: endpoint {
- remote-endpoint = <&funnel0_in7>;
- };
- };
- };
- };
-
- /* System CTIs */
- /* CTI 0 - TMC connections */
- cti0: cti@810000 {
- compatible = "arm,coresight-cti", "arm,primecell";
- reg = <0x00810000 0x1000>;
-
- clocks = <&rpmcc RPM_QDSS_CLK>;
- clock-names = "apb_pclk";
-
- status = "disabled";
- };
-
- /* CTI 1 - TPIU connections */
- cti1: cti@811000 {
- compatible = "arm,coresight-cti", "arm,primecell";
- reg = <0x00811000 0x1000>;
-
- clocks = <&rpmcc RPM_QDSS_CLK>;
- clock-names = "apb_pclk";
-
- status = "disabled";
- };
-
- /* CTIs 2-11 - no information - not instantiated */
-
- tpiu: tpiu@820000 {
- compatible = "arm,coresight-tpiu", "arm,primecell";
- reg = <0x00820000 0x1000>;
-
- clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
- clock-names = "apb_pclk", "atclk";
-
- status = "disabled";
-
- in-ports {
- port {
- tpiu_in: endpoint {
- remote-endpoint = <&replicator_out1>;
- };
- };
- };
- };
-
- funnel0: funnel@821000 {
- compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
- reg = <0x00821000 0x1000>;
-
- clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
- clock-names = "apb_pclk", "atclk";
-
- status = "disabled";
-
- in-ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- /*
- * Not described input ports:
- * 0 - connected to Resource and Power Manger CPU ETM
- * 1 - not-connected
- * 2 - connected to Modem CPU ETM
- * 3 - not-connected
- * 5 - not-connected
- * 6 - connected trought funnel to Wireless CPU ETM
- * 7 - connected to STM component
- */
-
- port@4 {
- reg = <4>;
- funnel0_in4: endpoint {
- remote-endpoint = <&funnel1_out>;
- };
- };
-
- port@7 {
- reg = <7>;
- funnel0_in7: endpoint {
- remote-endpoint = <&stm_out>;
- };
- };
- };
-
- out-ports {
- port {
- funnel0_out: endpoint {
- remote-endpoint = <&etf_in>;
- };
- };
- };
- };
-
- replicator: replicator@824000 {
- compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
- reg = <0x00824000 0x1000>;
-
- clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
- clock-names = "apb_pclk", "atclk";
-
- status = "disabled";
-
- out-ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
- replicator_out0: endpoint {
- remote-endpoint = <&etr_in>;
- };
- };
- port@1 {
- reg = <1>;
- replicator_out1: endpoint {
- remote-endpoint = <&tpiu_in>;
- };
- };
- };
-
- in-ports {
- port {
- replicator_in: endpoint {
- remote-endpoint = <&etf_out>;
- };
- };
- };
- };
-
- etf: etf@825000 {
- compatible = "arm,coresight-tmc", "arm,primecell";
- reg = <0x00825000 0x1000>;
-
- clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
- clock-names = "apb_pclk", "atclk";
-
- status = "disabled";
-
- in-ports {
- port {
- etf_in: endpoint {
- remote-endpoint = <&funnel0_out>;
- };
- };
- };
-
- out-ports {
- port {
- etf_out: endpoint {
- remote-endpoint = <&replicator_in>;
- };
- };
- };
- };
-
- etr: etr@826000 {
- compatible = "arm,coresight-tmc", "arm,primecell";
- reg = <0x00826000 0x1000>;
-
- clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
- clock-names = "apb_pclk", "atclk";
-
- status = "disabled";
-
- in-ports {
- port {
- etr_in: endpoint {
- remote-endpoint = <&replicator_out0>;
- };
- };
- };
- };
-
- funnel1: funnel@841000 { /* APSS funnel only 4 inputs are used */
- compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
- reg = <0x00841000 0x1000>;
-
- clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
- clock-names = "apb_pclk", "atclk";
-
- status = "disabled";
-
- in-ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
- funnel1_in0: endpoint {
- remote-endpoint = <&etm0_out>;
- };
- };
- port@1 {
- reg = <1>;
- funnel1_in1: endpoint {
- remote-endpoint = <&etm1_out>;
- };
- };
- port@2 {
- reg = <2>;
- funnel1_in2: endpoint {
- remote-endpoint = <&etm2_out>;
- };
- };
- port@3 {
- reg = <3>;
- funnel1_in3: endpoint {
- remote-endpoint = <&etm3_out>;
- };
- };
- };
-
- out-ports {
- port {
- funnel1_out: endpoint {
- remote-endpoint = <&funnel0_in4>;
- };
- };
- };
- };
-
- debug0: debug@850000 {
- compatible = "arm,coresight-cpu-debug", "arm,primecell";
- reg = <0x00850000 0x1000>;
- clocks = <&rpmcc RPM_QDSS_CLK>;
- clock-names = "apb_pclk";
- cpu = <&CPU0>;
- status = "disabled";
- };
-
- debug1: debug@852000 {
- compatible = "arm,coresight-cpu-debug", "arm,primecell";
- reg = <0x00852000 0x1000>;
- clocks = <&rpmcc RPM_QDSS_CLK>;
- clock-names = "apb_pclk";
- cpu = <&CPU1>;
- status = "disabled";
- };
-
- debug2: debug@854000 {
- compatible = "arm,coresight-cpu-debug", "arm,primecell";
- reg = <0x00854000 0x1000>;
- clocks = <&rpmcc RPM_QDSS_CLK>;
- clock-names = "apb_pclk";
- cpu = <&CPU2>;
- status = "disabled";
- };
-
- debug3: debug@856000 {
- compatible = "arm,coresight-cpu-debug", "arm,primecell";
- reg = <0x00856000 0x1000>;
- clocks = <&rpmcc RPM_QDSS_CLK>;
- clock-names = "apb_pclk";
- cpu = <&CPU3>;
- status = "disabled";
- };
-
- /* Core CTIs; CTIs 12-15 */
- /* CTI - CPU-0 */
- cti12: cti@858000 {
- compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti",
- "arm,primecell";
- reg = <0x00858000 0x1000>;
-
- clocks = <&rpmcc RPM_QDSS_CLK>;
- clock-names = "apb_pclk";
-
- cpu = <&CPU0>;
- arm,cs-dev-assoc = <&etm0>;
-
- status = "disabled";
- };
-
- /* CTI - CPU-1 */
- cti13: cti@859000 {
- compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti",
- "arm,primecell";
- reg = <0x00859000 0x1000>;
-
- clocks = <&rpmcc RPM_QDSS_CLK>;
- clock-names = "apb_pclk";
-
- cpu = <&CPU1>;
- arm,cs-dev-assoc = <&etm1>;
-
- status = "disabled";
- };
-
- /* CTI - CPU-2 */
- cti14: cti@85a000 {
- compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti",
- "arm,primecell";
- reg = <0x0085a000 0x1000>;
-
- clocks = <&rpmcc RPM_QDSS_CLK>;
- clock-names = "apb_pclk";
-
- cpu = <&CPU2>;
- arm,cs-dev-assoc = <&etm2>;
-
- status = "disabled";
- };
-
- /* CTI - CPU-3 */
- cti15: cti@85b000 {
- compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti",
- "arm,primecell";
- reg = <0x0085b000 0x1000>;
-
- clocks = <&rpmcc RPM_QDSS_CLK>;
- clock-names = "apb_pclk";
-
- cpu = <&CPU3>;
- arm,cs-dev-assoc = <&etm3>;
-
- status = "disabled";
- };
-
- etm0: etm@85c000 {
- compatible = "arm,coresight-etm4x", "arm,primecell";
- reg = <0x0085c000 0x1000>;
-
- clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
- clock-names = "apb_pclk", "atclk";
- arm,coresight-loses-context-with-cpu;
-
- cpu = <&CPU0>;
-
- status = "disabled";
-
- out-ports {
- port {
- etm0_out: endpoint {
- remote-endpoint = <&funnel1_in0>;
- };
- };
- };
- };
-
- etm1: etm@85d000 {
- compatible = "arm,coresight-etm4x", "arm,primecell";
- reg = <0x0085d000 0x1000>;
-
- clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
- clock-names = "apb_pclk", "atclk";
- arm,coresight-loses-context-with-cpu;
-
- cpu = <&CPU1>;
-
- status = "disabled";
-
- out-ports {
- port {
- etm1_out: endpoint {
- remote-endpoint = <&funnel1_in1>;
- };
- };
- };
- };
-
- etm2: etm@85e000 {
- compatible = "arm,coresight-etm4x", "arm,primecell";
- reg = <0x0085e000 0x1000>;
-
- clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
- clock-names = "apb_pclk", "atclk";
- arm,coresight-loses-context-with-cpu;
-
- cpu = <&CPU2>;
-
- status = "disabled";
-
- out-ports {
- port {
- etm2_out: endpoint {
- remote-endpoint = <&funnel1_in2>;
- };
- };
- };
- };
-
- etm3: etm@85f000 {
- compatible = "arm,coresight-etm4x", "arm,primecell";
- reg = <0x0085f000 0x1000>;
-
- clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
- clock-names = "apb_pclk", "atclk";
- arm,coresight-loses-context-with-cpu;
-
- cpu = <&CPU3>;
-
- status = "disabled";
-
- out-ports {
- port {
- etm3_out: endpoint {
- remote-endpoint = <&funnel1_in3>;
- };
- };
- };
- };
-
- tlmm: pinctrl@1000000 {
- compatible = "qcom,msm8916-pinctrl";
- reg = <0x01000000 0x300000>;
- interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
- gpio-controller;
- gpio-ranges = <&tlmm 0 0 122>;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
-
- blsp_i2c1_default: blsp-i2c1-default-state {
- pins = "gpio2", "gpio3";
- function = "blsp_i2c1";
- drive-strength = <2>;
- bias-disable;
- };
-
- blsp_i2c1_sleep: blsp-i2c1-sleep-state {
- pins = "gpio2", "gpio3";
- function = "gpio";
- drive-strength = <2>;
- bias-disable;
- };
-
- blsp_i2c2_default: blsp-i2c2-default-state {
- pins = "gpio6", "gpio7";
- function = "blsp_i2c2";
- drive-strength = <2>;
- bias-disable;
- };
-
- blsp_i2c2_sleep: blsp-i2c2-sleep-state {
- pins = "gpio6", "gpio7";
- function = "gpio";
- drive-strength = <2>;
- bias-disable;
- };
-
- blsp_i2c3_default: blsp-i2c3-default-state {
- pins = "gpio10", "gpio11";
- function = "blsp_i2c3";
- drive-strength = <2>;
- bias-disable;
- };
-
- blsp_i2c3_sleep: blsp-i2c3-sleep-state {
- pins = "gpio10", "gpio11";
- function = "gpio";
- drive-strength = <2>;
- bias-disable;
- };
-
- blsp_i2c4_default: blsp-i2c4-default-state {
- pins = "gpio14", "gpio15";
- function = "blsp_i2c4";
- drive-strength = <2>;
- bias-disable;
- };
-
- blsp_i2c4_sleep: blsp-i2c4-sleep-state {
- pins = "gpio14", "gpio15";
- function = "gpio";
- drive-strength = <2>;
- bias-disable;
- };
-
- blsp_i2c5_default: blsp-i2c5-default-state {
- pins = "gpio18", "gpio19";
- function = "blsp_i2c5";
- drive-strength = <2>;
- bias-disable;
- };
-
- blsp_i2c5_sleep: blsp-i2c5-sleep-state {
- pins = "gpio18", "gpio19";
- function = "gpio";
- drive-strength = <2>;
- bias-disable;
- };
-
- blsp_i2c6_default: blsp-i2c6-default-state {
- pins = "gpio22", "gpio23";
- function = "blsp_i2c6";
- drive-strength = <2>;
- bias-disable;
- };
-
- blsp_i2c6_sleep: blsp-i2c6-sleep-state {
- pins = "gpio22", "gpio23";
- function = "gpio";
- drive-strength = <2>;
- bias-disable;
- };
-
- blsp_spi1_default: blsp-spi1-default-state {
- spi-pins {
- pins = "gpio0", "gpio1", "gpio3";
- function = "blsp_spi1";
- drive-strength = <12>;
- bias-disable;
- };
- cs-pins {
- pins = "gpio2";
- function = "gpio";
- drive-strength = <16>;
- bias-disable;
- output-high;
- };
- };
-
- blsp_spi1_sleep: blsp-spi1-sleep-state {
- pins = "gpio0", "gpio1", "gpio2", "gpio3";
- function = "gpio";
- drive-strength = <2>;
- bias-pull-down;
- };
-
- blsp_spi2_default: blsp-spi2-default-state {
- spi-pins {
- pins = "gpio4", "gpio5", "gpio7";
- function = "blsp_spi2";
- drive-strength = <12>;
- bias-disable;
- };
- cs-pins {
- pins = "gpio6";
- function = "gpio";
- drive-strength = <16>;
- bias-disable;
- output-high;
- };
- };
-
- blsp_spi2_sleep: blsp-spi2-sleep-state {
- pins = "gpio4", "gpio5", "gpio6", "gpio7";
- function = "gpio";
- drive-strength = <2>;
- bias-pull-down;
- };
-
- blsp_spi3_default: blsp-spi3-default-state {
- spi-pins {
- pins = "gpio8", "gpio9", "gpio11";
- function = "blsp_spi3";
- drive-strength = <12>;
- bias-disable;
- };
- cs-pins {
- pins = "gpio10";
- function = "gpio";
- drive-strength = <16>;
- bias-disable;
- output-high;
- };
- };
-
- blsp_spi3_sleep: blsp-spi3-sleep-state {
- pins = "gpio8", "gpio9", "gpio10", "gpio11";
- function = "gpio";
- drive-strength = <2>;
- bias-pull-down;
- };
-
- blsp_spi4_default: blsp-spi4-default-state {
- spi-pins {
- pins = "gpio12", "gpio13", "gpio15";
- function = "blsp_spi4";
- drive-strength = <12>;
- bias-disable;
- };
- cs-pins {
- pins = "gpio14";
- function = "gpio";
- drive-strength = <16>;
- bias-disable;
- output-high;
- };
- };
-
- blsp_spi4_sleep: blsp-spi4-sleep-state {
- pins = "gpio12", "gpio13", "gpio14", "gpio15";
- function = "gpio";
- drive-strength = <2>;
- bias-pull-down;
- };
-
- blsp_spi5_default: blsp-spi5-default-state {
- spi-pins {
- pins = "gpio16", "gpio17", "gpio19";
- function = "blsp_spi5";
- drive-strength = <12>;
- bias-disable;
- };
- cs-pins {
- pins = "gpio18";
- function = "gpio";
- drive-strength = <16>;
- bias-disable;
- output-high;
- };
- };
-
- blsp_spi5_sleep: blsp-spi5-sleep-state {
- pins = "gpio16", "gpio17", "gpio18", "gpio19";
- function = "gpio";
- drive-strength = <2>;
- bias-pull-down;
- };
-
- blsp_spi6_default: blsp-spi6-default-state {
- spi-pins {
- pins = "gpio20", "gpio21", "gpio23";
- function = "blsp_spi6";
- drive-strength = <12>;
- bias-disable;
- };
- cs-pins {
- pins = "gpio22";
- function = "gpio";
- drive-strength = <16>;
- bias-disable;
- output-high;
- };
- };
-
- blsp_spi6_sleep: blsp-spi6-sleep-state {
- pins = "gpio20", "gpio21", "gpio22", "gpio23";
- function = "gpio";
- drive-strength = <2>;
- bias-pull-down;
- };
-
- blsp_uart1_default: blsp-uart1-default-state {
- /* TX, RX, CTS_N, RTS_N */
- pins = "gpio0", "gpio1", "gpio2", "gpio3";
- function = "blsp_uart1";
- drive-strength = <16>;
- bias-disable;
- };
-
- blsp_uart1_sleep: blsp-uart1-sleep-state {
- pins = "gpio0", "gpio1", "gpio2", "gpio3";
- function = "gpio";
- drive-strength = <2>;
- bias-pull-down;
- };
-
- blsp_uart2_default: blsp-uart2-default-state {
- pins = "gpio4", "gpio5";
- function = "blsp_uart2";
- drive-strength = <16>;
- bias-disable;
- };
-
- blsp_uart2_sleep: blsp-uart2-sleep-state {
- pins = "gpio4", "gpio5";
- function = "gpio";
- drive-strength = <2>;
- bias-pull-down;
- };
-
- camera_front_default: camera-front-default-state {
- pwdn-pins {
- pins = "gpio33";
- function = "gpio";
- drive-strength = <16>;
- bias-disable;
- };
- rst-pins {
- pins = "gpio28";
- function = "gpio";
- drive-strength = <16>;
- bias-disable;
- };
- mclk1-pins {
- pins = "gpio27";
- function = "cam_mclk1";
- drive-strength = <16>;
- bias-disable;
- };
- };
-
- camera_rear_default: camera-rear-default-state {
- pwdn-pins {
- pins = "gpio34";
- function = "gpio";
- drive-strength = <16>;
- bias-disable;
- };
- rst-pins {
- pins = "gpio35";
- function = "gpio";
- drive-strength = <16>;
- bias-disable;
- };
- mclk0-pins {
- pins = "gpio26";
- function = "cam_mclk0";
- drive-strength = <16>;
- bias-disable;
- };
- };
-
- cci0_default: cci0-default-state {
- pins = "gpio29", "gpio30";
- function = "cci_i2c";
- drive-strength = <16>;
- bias-disable;
- };
-
- cdc_dmic_default: cdc-dmic-default-state {
- clk-pins {
- pins = "gpio0";
- function = "dmic0_clk";
- drive-strength = <8>;
- };
- data-pins {
- pins = "gpio1";
- function = "dmic0_data";
- drive-strength = <8>;
- };
- };
-
- cdc_dmic_sleep: cdc-dmic-sleep-state {
- clk-pins {
- pins = "gpio0";
- function = "dmic0_clk";
- drive-strength = <2>;
- bias-disable;
- };
- data-pins {
- pins = "gpio1";
- function = "dmic0_data";
- drive-strength = <2>;
- bias-disable;
- };
- };
-
- cdc_pdm_default: cdc-pdm-default-state {
- pins = "gpio63", "gpio64", "gpio65", "gpio66",
- "gpio67", "gpio68";
- function = "cdc_pdm0";
- drive-strength = <8>;
- bias-disable;
- };
-
- cdc_pdm_sleep: cdc-pdm-sleep-state {
- pins = "gpio63", "gpio64", "gpio65", "gpio66",
- "gpio67", "gpio68";
- function = "cdc_pdm0";
- drive-strength = <2>;
- bias-pull-down;
- };
-
- pri_mi2s_default: mi2s-pri-default-state {
- pins = "gpio113", "gpio114", "gpio115", "gpio116";
- function = "pri_mi2s";
- drive-strength = <8>;
- bias-disable;
- };
-
- pri_mi2s_sleep: mi2s-pri-sleep-state {
- pins = "gpio113", "gpio114", "gpio115", "gpio116";
- function = "pri_mi2s";
- drive-strength = <2>;
- bias-disable;
- };
-
- pri_mi2s_mclk_default: mi2s-pri-mclk-default-state {
- pins = "gpio116";
- function = "pri_mi2s";
- drive-strength = <8>;
- bias-disable;
- };
-
- pri_mi2s_mclk_sleep: mi2s-pri-mclk-sleep-state {
- pins = "gpio116";
- function = "pri_mi2s";
- drive-strength = <2>;
- bias-disable;
- };
-
- pri_mi2s_ws_default: mi2s-pri-ws-default-state {
- pins = "gpio110";
- function = "pri_mi2s_ws";
- drive-strength = <8>;
- bias-disable;
- };
-
- pri_mi2s_ws_sleep: mi2s-pri-ws-sleep-state {
- pins = "gpio110";
- function = "pri_mi2s_ws";
- drive-strength = <2>;
- bias-disable;
- };
-
- sec_mi2s_default: mi2s-sec-default-state {
- pins = "gpio112", "gpio117", "gpio118", "gpio119";
- function = "sec_mi2s";
- drive-strength = <8>;
- bias-disable;
- };
-
- sec_mi2s_sleep: mi2s-sec-sleep-state {
- pins = "gpio112", "gpio117", "gpio118", "gpio119";
- function = "sec_mi2s";
- drive-strength = <2>;
- bias-disable;
- };
-
- sdc1_default: sdc1-default-state {
- clk-pins {
- pins = "sdc1_clk";
- bias-disable;
- drive-strength = <16>;
- };
- cmd-pins {
- pins = "sdc1_cmd";
- bias-pull-up;
- drive-strength = <10>;
- };
- data-pins {
- pins = "sdc1_data";
- bias-pull-up;
- drive-strength = <10>;
- };
- };
-
- sdc1_sleep: sdc1-sleep-state {
- clk-pins {
- pins = "sdc1_clk";
- bias-disable;
- drive-strength = <2>;
- };
- cmd-pins {
- pins = "sdc1_cmd";
- bias-pull-up;
- drive-strength = <2>;
- };
- data-pins {
- pins = "sdc1_data";
- bias-pull-up;
- drive-strength = <2>;
- };
- };
-
- sdc2_default: sdc2-default-state {
- clk-pins {
- pins = "sdc2_clk";
- bias-disable;
- drive-strength = <16>;
- };
- cmd-pins {
- pins = "sdc2_cmd";
- bias-pull-up;
- drive-strength = <10>;
- };
- data-pins {
- pins = "sdc2_data";
- bias-pull-up;
- drive-strength = <10>;
- };
- };
-
- sdc2_sleep: sdc2-sleep-state {
- clk-pins {
- pins = "sdc2_clk";
- bias-disable;
- drive-strength = <2>;
- };
- cmd-pins {
- pins = "sdc2_cmd";
- bias-pull-up;
- drive-strength = <2>;
- };
- data-pins {
- pins = "sdc2_data";
- bias-pull-up;
- drive-strength = <2>;
- };
- };
-
- wcss_wlan_default: wcss-wlan-default-state {
- pins = "gpio40", "gpio41", "gpio42", "gpio43", "gpio44";
- function = "wcss_wlan";
- drive-strength = <6>;
- bias-pull-up;
- };
- };
-
- gcc: clock-controller@1800000 {
- compatible = "qcom,gcc-msm8916";
- #clock-cells = <1>;
- #reset-cells = <1>;
- #power-domain-cells = <1>;
- reg = <0x01800000 0x80000>;
- clocks = <&xo_board>,
- <&sleep_clk>,
- <&mdss_dsi0_phy 1>,
- <&mdss_dsi0_phy 0>,
- <0>,
- <0>,
- <0>;
- clock-names = "xo",
- "sleep_clk",
- "dsi0pll",
- "dsi0pllbyte",
- "ext_mclk",
- "ext_pri_i2s",
- "ext_sec_i2s";
- };
-
- tcsr_mutex: hwlock@1905000 {
- compatible = "qcom,tcsr-mutex";
- reg = <0x01905000 0x20000>;
- #hwlock-cells = <1>;
- };
-
- tcsr: syscon@1937000 {
- compatible = "qcom,tcsr-msm8916", "syscon";
- reg = <0x01937000 0x30000>;
- };
-
- mdss: display-subsystem@1a00000 {
- status = "disabled";
- compatible = "qcom,mdss";
- reg = <0x01a00000 0x1000>,
- <0x01ac8000 0x3000>;
- reg-names = "mdss_phys", "vbif_phys";
-
- power-domains = <&gcc MDSS_GDSC>;
-
- clocks = <&gcc GCC_MDSS_AHB_CLK>,
- <&gcc GCC_MDSS_AXI_CLK>,
- <&gcc GCC_MDSS_VSYNC_CLK>;
- clock-names = "iface",
- "bus",
- "vsync";
-
- interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
-
- interrupt-controller;
- #interrupt-cells = <1>;
-
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
-
- mdss_mdp: display-controller@1a01000 {
- compatible = "qcom,msm8916-mdp5", "qcom,mdp5";
- reg = <0x01a01000 0x89000>;
- reg-names = "mdp_phys";
-
- interrupt-parent = <&mdss>;
- interrupts = <0>;
-
- clocks = <&gcc GCC_MDSS_AHB_CLK>,
- <&gcc GCC_MDSS_AXI_CLK>,
- <&gcc GCC_MDSS_MDP_CLK>,
- <&gcc GCC_MDSS_VSYNC_CLK>;
- clock-names = "iface",
- "bus",
- "core",
- "vsync";
-
- iommus = <&apps_iommu 4>;
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
- mdss_mdp_intf1_out: endpoint {
- remote-endpoint = <&mdss_dsi0_in>;
- };
- };
- };
- };
-
- mdss_dsi0: dsi@1a98000 {
- compatible = "qcom,msm8916-dsi-ctrl",
- "qcom,mdss-dsi-ctrl";
- reg = <0x01a98000 0x25c>;
- reg-names = "dsi_ctrl";
-
- interrupt-parent = <&mdss>;
- interrupts = <4>;
-
- assigned-clocks = <&gcc BYTE0_CLK_SRC>,
- <&gcc PCLK0_CLK_SRC>;
- assigned-clock-parents = <&mdss_dsi0_phy 0>,
- <&mdss_dsi0_phy 1>;
-
- clocks = <&gcc GCC_MDSS_MDP_CLK>,
- <&gcc GCC_MDSS_AHB_CLK>,
- <&gcc GCC_MDSS_AXI_CLK>,
- <&gcc GCC_MDSS_BYTE0_CLK>,
- <&gcc GCC_MDSS_PCLK0_CLK>,
- <&gcc GCC_MDSS_ESC0_CLK>;
- clock-names = "mdp_core",
- "iface",
- "bus",
- "byte",
- "pixel",
- "core";
- phys = <&mdss_dsi0_phy>;
-
- #address-cells = <1>;
- #size-cells = <0>;
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
- mdss_dsi0_in: endpoint {
- remote-endpoint = <&mdss_mdp_intf1_out>;
- };
- };
-
- port@1 {
- reg = <1>;
- mdss_dsi0_out: endpoint {
- };
- };
- };
- };
-
- mdss_dsi0_phy: phy@1a98300 {
- compatible = "qcom,dsi-phy-28nm-lp";
- reg = <0x01a98300 0xd4>,
- <0x01a98500 0x280>,
- <0x01a98780 0x30>;
- reg-names = "dsi_pll",
- "dsi_phy",
- "dsi_phy_regulator";
-
- #clock-cells = <1>;
- #phy-cells = <0>;
-
- clocks = <&gcc GCC_MDSS_AHB_CLK>,
- <&xo_board>;
- clock-names = "iface", "ref";
- };
- };
-
- camss: camss@1b0ac00 {
- compatible = "qcom,msm8916-camss";
- reg = <0x01b0ac00 0x200>,
- <0x01b00030 0x4>,
- <0x01b0b000 0x200>,
- <0x01b00038 0x4>,
- <0x01b08000 0x100>,
- <0x01b08400 0x100>,
- <0x01b0a000 0x500>,
- <0x01b00020 0x10>,
- <0x01b10000 0x1000>;
- reg-names = "csiphy0",
- "csiphy0_clk_mux",
- "csiphy1",
- "csiphy1_clk_mux",
- "csid0",
- "csid1",
- "ispif",
- "csi_clk_mux",
- "vfe0";
- interrupts = <GIC_SPI 78 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 79 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 51 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 52 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 55 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 57 IRQ_TYPE_EDGE_RISING>;
- interrupt-names = "csiphy0",
- "csiphy1",
- "csid0",
- "csid1",
- "ispif",
- "vfe0";
- power-domains = <&gcc VFE_GDSC>;
- clocks = <&gcc GCC_CAMSS_TOP_AHB_CLK>,
- <&gcc GCC_CAMSS_ISPIF_AHB_CLK>,
- <&gcc GCC_CAMSS_CSI0PHYTIMER_CLK>,
- <&gcc GCC_CAMSS_CSI1PHYTIMER_CLK>,
- <&gcc GCC_CAMSS_CSI0_AHB_CLK>,
- <&gcc GCC_CAMSS_CSI0_CLK>,
- <&gcc GCC_CAMSS_CSI0PHY_CLK>,
- <&gcc GCC_CAMSS_CSI0PIX_CLK>,
- <&gcc GCC_CAMSS_CSI0RDI_CLK>,
- <&gcc GCC_CAMSS_CSI1_AHB_CLK>,
- <&gcc GCC_CAMSS_CSI1_CLK>,
- <&gcc GCC_CAMSS_CSI1PHY_CLK>,
- <&gcc GCC_CAMSS_CSI1PIX_CLK>,
- <&gcc GCC_CAMSS_CSI1RDI_CLK>,
- <&gcc GCC_CAMSS_AHB_CLK>,
- <&gcc GCC_CAMSS_VFE0_CLK>,
- <&gcc GCC_CAMSS_CSI_VFE0_CLK>,
- <&gcc GCC_CAMSS_VFE_AHB_CLK>,
- <&gcc GCC_CAMSS_VFE_AXI_CLK>;
- clock-names = "top_ahb",
- "ispif_ahb",
- "csiphy0_timer",
- "csiphy1_timer",
- "csi0_ahb",
- "csi0",
- "csi0_phy",
- "csi0_pix",
- "csi0_rdi",
- "csi1_ahb",
- "csi1",
- "csi1_phy",
- "csi1_pix",
- "csi1_rdi",
- "ahb",
- "vfe0",
- "csi_vfe0",
- "vfe_ahb",
- "vfe_axi";
- iommus = <&apps_iommu 3>;
- status = "disabled";
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
- };
-
- port@1 {
- reg = <1>;
- };
- };
- };
-
- cci: cci@1b0c000 {
- compatible = "qcom,msm8916-cci", "qcom,msm8226-cci";
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0x01b0c000 0x1000>;
- interrupts = <GIC_SPI 50 IRQ_TYPE_EDGE_RISING>;
- clocks = <&gcc GCC_CAMSS_TOP_AHB_CLK>,
- <&gcc GCC_CAMSS_CCI_AHB_CLK>,
- <&gcc GCC_CAMSS_CCI_CLK>,
- <&gcc GCC_CAMSS_AHB_CLK>;
- clock-names = "camss_top_ahb", "cci_ahb",
- "cci", "camss_ahb";
- assigned-clocks = <&gcc GCC_CAMSS_CCI_AHB_CLK>,
- <&gcc GCC_CAMSS_CCI_CLK>;
- assigned-clock-rates = <80000000>, <19200000>;
- pinctrl-names = "default";
- pinctrl-0 = <&cci0_default>;
- status = "disabled";
-
- cci_i2c0: i2c-bus@0 {
- reg = <0>;
- clock-frequency = <400000>;
- #address-cells = <1>;
- #size-cells = <0>;
- };
- };
-
- gpu: gpu@1c00000 {
- compatible = "qcom,adreno-306.0", "qcom,adreno";
- reg = <0x01c00000 0x20000>;
- reg-names = "kgsl_3d0_reg_memory";
- interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "kgsl_3d0_irq";
- clock-names =
- "core",
- "iface",
- "mem",
- "mem_iface",
- "alt_mem_iface",
- "gfx3d";
- clocks =
- <&gcc GCC_OXILI_GFX3D_CLK>,
- <&gcc GCC_OXILI_AHB_CLK>,
- <&gcc GCC_OXILI_GMEM_CLK>,
- <&gcc GCC_BIMC_GFX_CLK>,
- <&gcc GCC_BIMC_GPU_CLK>,
- <&gcc GFX3D_CLK_SRC>;
- power-domains = <&gcc OXILI_GDSC>;
- operating-points-v2 = <&gpu_opp_table>;
- iommus = <&gpu_iommu 1>, <&gpu_iommu 2>;
- status = "disabled";
-
- gpu_opp_table: opp-table {
- compatible = "operating-points-v2";
-
- opp-400000000 {
- opp-hz = /bits/ 64 <400000000>;
- };
- opp-19200000 {
- opp-hz = /bits/ 64 <19200000>;
- };
- };
- };
-
- venus: video-codec@1d00000 {
- compatible = "qcom,msm8916-venus";
- reg = <0x01d00000 0xff000>;
- interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
- power-domains = <&gcc VENUS_GDSC>;
- clocks = <&gcc GCC_VENUS0_VCODEC0_CLK>,
- <&gcc GCC_VENUS0_AHB_CLK>,
- <&gcc GCC_VENUS0_AXI_CLK>;
- clock-names = "core", "iface", "bus";
- iommus = <&apps_iommu 5>;
- memory-region = <&venus_mem>;
- status = "disabled";
-
- video-decoder {
- compatible = "venus-decoder";
- };
-
- video-encoder {
- compatible = "venus-encoder";
- };
- };
-
- apps_iommu: iommu@1ef0000 {
- #address-cells = <1>;
- #size-cells = <1>;
- #iommu-cells = <1>;
- compatible = "qcom,msm8916-iommu", "qcom,msm-iommu-v1";
- ranges = <0 0x01e20000 0x20000>;
- reg = <0x01ef0000 0x3000>;
- clocks = <&gcc GCC_SMMU_CFG_CLK>,
- <&gcc GCC_APSS_TCU_CLK>;
- clock-names = "iface", "bus";
- qcom,iommu-secure-id = <17>;
-
- /* VFE */
- iommu-ctx@3000 {
- compatible = "qcom,msm-iommu-v1-sec";
- reg = <0x3000 0x1000>;
- interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
- };
-
- /* MDP_0 */
- iommu-ctx@4000 {
- compatible = "qcom,msm-iommu-v1-ns";
- reg = <0x4000 0x1000>;
- interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
- };
-
- /* VENUS_NS */
- iommu-ctx@5000 {
- compatible = "qcom,msm-iommu-v1-sec";
- reg = <0x5000 0x1000>;
- interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
- };
- };
-
- gpu_iommu: iommu@1f08000 {
- #address-cells = <1>;
- #size-cells = <1>;
- #iommu-cells = <1>;
- compatible = "qcom,msm8916-iommu", "qcom,msm-iommu-v1";
- ranges = <0 0x01f08000 0x10000>;
- clocks = <&gcc GCC_SMMU_CFG_CLK>,
- <&gcc GCC_GFX_TCU_CLK>;
- clock-names = "iface", "bus";
- qcom,iommu-secure-id = <18>;
-
- /* GFX3D_USER */
- iommu-ctx@1000 {
- compatible = "qcom,msm-iommu-v1-ns";
- reg = <0x1000 0x1000>;
- interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>;
- };
-
- /* GFX3D_PRIV */
- iommu-ctx@2000 {
- compatible = "qcom,msm-iommu-v1-ns";
- reg = <0x2000 0x1000>;
- interrupts = <GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>;
- };
- };
-
- spmi_bus: spmi@200f000 {
- compatible = "qcom,spmi-pmic-arb";
- reg = <0x0200f000 0x001000>,
- <0x02400000 0x400000>,
- <0x02c00000 0x400000>,
- <0x03800000 0x200000>,
- <0x0200a000 0x002100>;
- reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
- interrupt-names = "periph_irq";
- interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
- qcom,ee = <0>;
- qcom,channel = <0>;
- #address-cells = <2>;
- #size-cells = <0>;
- interrupt-controller;
- #interrupt-cells = <4>;
- };
-
- bam_dmux_dma: dma-controller@4044000 {
- compatible = "qcom,bam-v1.7.0";
- reg = <0x04044000 0x19000>;
- interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
- #dma-cells = <1>;
- qcom,ee = <0>;
-
- num-channels = <6>;
- qcom,num-ees = <1>;
- qcom,powered-remotely;
-
- status = "disabled";
- };
-
- mpss: remoteproc@4080000 {
- compatible = "qcom,msm8916-mss-pil";
- reg = <0x04080000 0x100>,
- <0x04020000 0x040>;
-
- reg-names = "qdsp6", "rmb";
-
- interrupts-extended = <&intc GIC_SPI 24 IRQ_TYPE_EDGE_RISING>,
- <&hexagon_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
- <&hexagon_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
- <&hexagon_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
- <&hexagon_smp2p_in 3 IRQ_TYPE_EDGE_RISING>;
- interrupt-names = "wdog", "fatal", "ready",
- "handover", "stop-ack";
-
- power-domains = <&rpmpd MSM8916_VDDCX>,
- <&rpmpd MSM8916_VDDMX>;
- power-domain-names = "cx", "mx";
-
- clocks = <&gcc GCC_MSS_CFG_AHB_CLK>,
- <&gcc GCC_MSS_Q6_BIMC_AXI_CLK>,
- <&gcc GCC_BOOT_ROM_AHB_CLK>,
- <&xo_board>;
- clock-names = "iface", "bus", "mem", "xo";
-
- qcom,smem-states = <&hexagon_smp2p_out 0>;
- qcom,smem-state-names = "stop";
-
- resets = <&scm 0>;
- reset-names = "mss_restart";
-
- qcom,halt-regs = <&tcsr 0x18000 0x19000 0x1a000>;
-
- status = "disabled";
-
- mba {
- memory-region = <&mba_mem>;
- };
-
- mpss {
- memory-region = <&mpss_mem>;
- };
-
- bam_dmux: bam-dmux {
- compatible = "qcom,bam-dmux";
-
- interrupt-parent = <&hexagon_smsm>;
- interrupts = <1 IRQ_TYPE_EDGE_BOTH>, <11 IRQ_TYPE_EDGE_BOTH>;
- interrupt-names = "pc", "pc-ack";
-
- qcom,smem-states = <&apps_smsm 1>, <&apps_smsm 11>;
- qcom,smem-state-names = "pc", "pc-ack";
-
- dmas = <&bam_dmux_dma 4>, <&bam_dmux_dma 5>;
- dma-names = "tx", "rx";
-
- status = "disabled";
- };
-
- smd-edge {
- interrupts = <GIC_SPI 25 IRQ_TYPE_EDGE_RISING>;
-
- qcom,smd-edge = <0>;
- qcom,ipc = <&apcs 8 12>;
- qcom,remote-pid = <1>;
-
- label = "hexagon";
-
- fastrpc {
- compatible = "qcom,fastrpc";
- qcom,smd-channels = "fastrpcsmd-apps-dsp";
- label = "adsp";
- qcom,non-secure-domain;
-
- #address-cells = <1>;
- #size-cells = <0>;
-
- cb@1 {
- compatible = "qcom,fastrpc-compute-cb";
- reg = <1>;
- };
- };
- };
- };
-
- sound: sound@7702000 {
- status = "disabled";
- compatible = "qcom,apq8016-sbc-sndcard";
- reg = <0x07702000 0x4>, <0x07702004 0x4>;
- reg-names = "mic-iomux", "spkr-iomux";
- };
-
- lpass: audio-controller@7708000 {
- status = "disabled";
- compatible = "qcom,apq8016-lpass-cpu";
-
- /*
- * Note: Unlike the name would suggest, the SEC_I2S_CLK
- * is actually only used by Tertiary MI2S while
- * Primary/Secondary MI2S both use the PRI_I2S_CLK.
- */
- clocks = <&gcc GCC_ULTAUDIO_AHBFABRIC_IXFABRIC_CLK>,
- <&gcc GCC_ULTAUDIO_LPAIF_PRI_I2S_CLK>,
- <&gcc GCC_ULTAUDIO_LPAIF_PRI_I2S_CLK>,
- <&gcc GCC_ULTAUDIO_LPAIF_SEC_I2S_CLK>,
- <&gcc GCC_ULTAUDIO_LPAIF_AUX_I2S_CLK>,
- <&gcc GCC_ULTAUDIO_PCNOC_MPORT_CLK>,
- <&gcc GCC_ULTAUDIO_PCNOC_SWAY_CLK>;
-
- clock-names = "ahbix-clk",
- "mi2s-bit-clk0",
- "mi2s-bit-clk1",
- "mi2s-bit-clk2",
- "mi2s-bit-clk3",
- "pcnoc-mport-clk",
- "pcnoc-sway-clk";
- #sound-dai-cells = <1>;
-
- interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "lpass-irq-lpaif";
- reg = <0x07708000 0x10000>;
- reg-names = "lpass-lpaif";
-
- #address-cells = <1>;
- #size-cells = <0>;
- };
-
- lpass_codec: audio-codec@771c000 {
- compatible = "qcom,msm8916-wcd-digital-codec";
- reg = <0x0771c000 0x400>;
- clocks = <&gcc GCC_ULTAUDIO_AHBFABRIC_IXFABRIC_CLK>,
- <&gcc GCC_CODEC_DIGCODEC_CLK>;
- clock-names = "ahbix-clk", "mclk";
- #sound-dai-cells = <1>;
- status = "disabled";
- };
-
- sdhc_1: mmc@7824900 {
- compatible = "qcom,msm8916-sdhci", "qcom,sdhci-msm-v4";
- reg = <0x07824900 0x11c>, <0x07824000 0x800>;
- reg-names = "hc", "core";
-
- interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "hc_irq", "pwr_irq";
- clocks = <&gcc GCC_SDCC1_AHB_CLK>,
- <&gcc GCC_SDCC1_APPS_CLK>,
- <&xo_board>;
- clock-names = "iface", "core", "xo";
- pinctrl-0 = <&sdc1_default>;
- pinctrl-1 = <&sdc1_sleep>;
- pinctrl-names = "default", "sleep";
- mmc-ddr-1_8v;
- bus-width = <8>;
- non-removable;
- status = "disabled";
- };
-
- sdhc_2: mmc@7864900 {
- compatible = "qcom,msm8916-sdhci", "qcom,sdhci-msm-v4";
- reg = <0x07864900 0x11c>, <0x07864000 0x800>;
- reg-names = "hc", "core";
-
- interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "hc_irq", "pwr_irq";
- clocks = <&gcc GCC_SDCC2_AHB_CLK>,
- <&gcc GCC_SDCC2_APPS_CLK>,
- <&xo_board>;
- clock-names = "iface", "core", "xo";
- pinctrl-0 = <&sdc2_default>;
- pinctrl-1 = <&sdc2_sleep>;
- pinctrl-names = "default", "sleep";
- bus-width = <4>;
- status = "disabled";
- };
-
- blsp_dma: dma-controller@7884000 {
- compatible = "qcom,bam-v1.7.0";
- reg = <0x07884000 0x23000>;
- interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&gcc GCC_BLSP1_AHB_CLK>;
- clock-names = "bam_clk";
- #dma-cells = <1>;
- qcom,ee = <0>;
- };
-
- blsp_uart1: serial@78af000 {
- compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
- reg = <0x078af000 0x200>;
- interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&gcc GCC_BLSP1_UART1_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>;
- clock-names = "core", "iface";
- dmas = <&blsp_dma 0>, <&blsp_dma 1>;
- dma-names = "tx", "rx";
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&blsp_uart1_default>;
- pinctrl-1 = <&blsp_uart1_sleep>;
- status = "disabled";
- };
-
- blsp_uart2: serial@78b0000 {
- compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
- reg = <0x078b0000 0x200>;
- interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>;
- clock-names = "core", "iface";
- dmas = <&blsp_dma 2>, <&blsp_dma 3>;
- dma-names = "tx", "rx";
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&blsp_uart2_default>;
- pinctrl-1 = <&blsp_uart2_sleep>;
- status = "disabled";
- };
-
- blsp_i2c1: i2c@78b5000 {
- compatible = "qcom,i2c-qup-v2.2.1";
- reg = <0x078b5000 0x500>;
- interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&gcc GCC_BLSP1_QUP1_I2C_APPS_CLK>,
- <&gcc GCC_BLSP1_AHB_CLK>;
- clock-names = "core", "iface";
- dmas = <&blsp_dma 4>, <&blsp_dma 5>;
- dma-names = "tx", "rx";
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&blsp_i2c1_default>;
- pinctrl-1 = <&blsp_i2c1_sleep>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- blsp_spi1: spi@78b5000 {
- compatible = "qcom,spi-qup-v2.2.1";
- reg = <0x078b5000 0x500>;
- interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&gcc GCC_BLSP1_QUP1_SPI_APPS_CLK>,
- <&gcc GCC_BLSP1_AHB_CLK>;
- clock-names = "core", "iface";
- dmas = <&blsp_dma 4>, <&blsp_dma 5>;
- dma-names = "tx", "rx";
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&blsp_spi1_default>;
- pinctrl-1 = <&blsp_spi1_sleep>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- blsp_i2c2: i2c@78b6000 {
- compatible = "qcom,i2c-qup-v2.2.1";
- reg = <0x078b6000 0x500>;
- interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>,
- <&gcc GCC_BLSP1_AHB_CLK>;
- clock-names = "core", "iface";
- dmas = <&blsp_dma 6>, <&blsp_dma 7>;
- dma-names = "tx", "rx";
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&blsp_i2c2_default>;
- pinctrl-1 = <&blsp_i2c2_sleep>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- blsp_spi2: spi@78b6000 {
- compatible = "qcom,spi-qup-v2.2.1";
- reg = <0x078b6000 0x500>;
- interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&gcc GCC_BLSP1_QUP2_SPI_APPS_CLK>,
- <&gcc GCC_BLSP1_AHB_CLK>;
- clock-names = "core", "iface";
- dmas = <&blsp_dma 6>, <&blsp_dma 7>;
- dma-names = "tx", "rx";
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&blsp_spi2_default>;
- pinctrl-1 = <&blsp_spi2_sleep>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- blsp_i2c3: i2c@78b7000 {
- compatible = "qcom,i2c-qup-v2.2.1";
- reg = <0x078b7000 0x500>;
- interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&gcc GCC_BLSP1_QUP3_I2C_APPS_CLK>,
- <&gcc GCC_BLSP1_AHB_CLK>;
- clock-names = "core", "iface";
- dmas = <&blsp_dma 8>, <&blsp_dma 9>;
- dma-names = "tx", "rx";
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&blsp_i2c3_default>;
- pinctrl-1 = <&blsp_i2c3_sleep>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- blsp_spi3: spi@78b7000 {
- compatible = "qcom,spi-qup-v2.2.1";
- reg = <0x078b7000 0x500>;
- interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&gcc GCC_BLSP1_QUP3_SPI_APPS_CLK>,
- <&gcc GCC_BLSP1_AHB_CLK>;
- clock-names = "core", "iface";
- dmas = <&blsp_dma 8>, <&blsp_dma 9>;
- dma-names = "tx", "rx";
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&blsp_spi3_default>;
- pinctrl-1 = <&blsp_spi3_sleep>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- blsp_i2c4: i2c@78b8000 {
- compatible = "qcom,i2c-qup-v2.2.1";
- reg = <0x078b8000 0x500>;
- interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&gcc GCC_BLSP1_QUP4_I2C_APPS_CLK>,
- <&gcc GCC_BLSP1_AHB_CLK>;
- clock-names = "core", "iface";
- dmas = <&blsp_dma 10>, <&blsp_dma 11>;
- dma-names = "tx", "rx";
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&blsp_i2c4_default>;
- pinctrl-1 = <&blsp_i2c4_sleep>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- blsp_spi4: spi@78b8000 {
- compatible = "qcom,spi-qup-v2.2.1";
- reg = <0x078b8000 0x500>;
- interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&gcc GCC_BLSP1_QUP4_SPI_APPS_CLK>,
- <&gcc GCC_BLSP1_AHB_CLK>;
- clock-names = "core", "iface";
- dmas = <&blsp_dma 10>, <&blsp_dma 11>;
- dma-names = "tx", "rx";
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&blsp_spi4_default>;
- pinctrl-1 = <&blsp_spi4_sleep>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- blsp_i2c5: i2c@78b9000 {
- compatible = "qcom,i2c-qup-v2.2.1";
- reg = <0x078b9000 0x500>;
- interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&gcc GCC_BLSP1_QUP5_I2C_APPS_CLK>,
- <&gcc GCC_BLSP1_AHB_CLK>;
- clock-names = "core", "iface";
- dmas = <&blsp_dma 12>, <&blsp_dma 13>;
- dma-names = "tx", "rx";
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&blsp_i2c5_default>;
- pinctrl-1 = <&blsp_i2c5_sleep>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- blsp_spi5: spi@78b9000 {
- compatible = "qcom,spi-qup-v2.2.1";
- reg = <0x078b9000 0x500>;
- interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&gcc GCC_BLSP1_QUP5_SPI_APPS_CLK>,
- <&gcc GCC_BLSP1_AHB_CLK>;
- clock-names = "core", "iface";
- dmas = <&blsp_dma 12>, <&blsp_dma 13>;
- dma-names = "tx", "rx";
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&blsp_spi5_default>;
- pinctrl-1 = <&blsp_spi5_sleep>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- blsp_i2c6: i2c@78ba000 {
- compatible = "qcom,i2c-qup-v2.2.1";
- reg = <0x078ba000 0x500>;
- interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&gcc GCC_BLSP1_QUP6_I2C_APPS_CLK>,
- <&gcc GCC_BLSP1_AHB_CLK>;
- clock-names = "core", "iface";
- dmas = <&blsp_dma 14>, <&blsp_dma 15>;
- dma-names = "tx", "rx";
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&blsp_i2c6_default>;
- pinctrl-1 = <&blsp_i2c6_sleep>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- blsp_spi6: spi@78ba000 {
- compatible = "qcom,spi-qup-v2.2.1";
- reg = <0x078ba000 0x500>;
- interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&gcc GCC_BLSP1_QUP6_SPI_APPS_CLK>,
- <&gcc GCC_BLSP1_AHB_CLK>;
- clock-names = "core", "iface";
- dmas = <&blsp_dma 14>, <&blsp_dma 15>;
- dma-names = "tx", "rx";
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&blsp_spi6_default>;
- pinctrl-1 = <&blsp_spi6_sleep>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- usb: usb@78d9000 {
- compatible = "qcom,ci-hdrc";
- reg = <0x078d9000 0x200>,
- <0x078d9200 0x200>;
- interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&gcc GCC_USB_HS_AHB_CLK>,
- <&gcc GCC_USB_HS_SYSTEM_CLK>;
- clock-names = "iface", "core";
- assigned-clocks = <&gcc GCC_USB_HS_SYSTEM_CLK>;
- assigned-clock-rates = <80000000>;
- resets = <&gcc GCC_USB_HS_BCR>;
- reset-names = "core";
- phy_type = "ulpi";
- dr_mode = "otg";
- hnp-disable;
- srp-disable;
- adp-disable;
- ahb-burst-config = <0>;
- phy-names = "usb-phy";
- phys = <&usb_hs_phy>;
- status = "disabled";
- #reset-cells = <1>;
-
- ulpi {
- usb_hs_phy: phy {
- compatible = "qcom,usb-hs-phy-msm8916",
- "qcom,usb-hs-phy";
- #phy-cells = <0>;
- clocks = <&xo_board>, <&gcc GCC_USB2A_PHY_SLEEP_CLK>;
- clock-names = "ref", "sleep";
- resets = <&gcc GCC_USB2A_PHY_BCR>, <&usb 0>;
- reset-names = "phy", "por";
- qcom,init-seq = /bits/ 8 <0x0 0x44>,
- <0x1 0x6b>,
- <0x2 0x24>,
- <0x3 0x13>;
- };
- };
- };
-
- wcnss: remoteproc@a204000 {
- compatible = "qcom,pronto-v2-pil", "qcom,pronto";
- reg = <0x0a204000 0x2000>, <0x0a202000 0x1000>, <0x0a21b000 0x3000>;
- reg-names = "ccu", "dxe", "pmu";
-
- memory-region = <&wcnss_mem>;
-
- interrupts-extended = <&intc GIC_SPI 149 IRQ_TYPE_EDGE_RISING>,
- <&wcnss_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
- <&wcnss_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
- <&wcnss_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
- <&wcnss_smp2p_in 3 IRQ_TYPE_EDGE_RISING>;
- interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack";
-
- power-domains = <&rpmpd MSM8916_VDDCX>,
- <&rpmpd MSM8916_VDDMX>;
- power-domain-names = "cx", "mx";
-
- qcom,smem-states = <&wcnss_smp2p_out 0>;
- qcom,smem-state-names = "stop";
-
- pinctrl-names = "default";
- pinctrl-0 = <&wcss_wlan_default>;
-
- status = "disabled";
-
- wcnss_iris: iris {
- /* Separate chip, compatible is board-specific */
- clocks = <&rpmcc RPM_SMD_RF_CLK2>;
- clock-names = "xo";
- };
-
- smd-edge {
- interrupts = <GIC_SPI 142 IRQ_TYPE_EDGE_RISING>;
-
- qcom,ipc = <&apcs 8 17>;
- qcom,smd-edge = <6>;
- qcom,remote-pid = <4>;
-
- label = "pronto";
-
- wcnss_ctrl: wcnss {
- compatible = "qcom,wcnss";
- qcom,smd-channels = "WCNSS_CTRL";
-
- qcom,mmio = <&wcnss>;
-
- wcnss_bt: bluetooth {
- compatible = "qcom,wcnss-bt";
- };
-
- wcnss_wifi: wifi {
- compatible = "qcom,wcnss-wlan";
-
- interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "tx", "rx";
-
- qcom,smem-states = <&apps_smsm 10>, <&apps_smsm 9>;
- qcom,smem-state-names = "tx-enable", "tx-rings-empty";
- };
- };
- };
- };
-
- intc: interrupt-controller@b000000 {
- compatible = "qcom,msm-qgic2";
- interrupt-controller;
- #interrupt-cells = <3>;
- reg = <0x0b000000 0x1000>, <0x0b002000 0x2000>,
- <0x0b001000 0x1000>, <0x0b004000 0x2000>;
- interrupts = <GIC_PPI 0 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
- };
-
- apcs: mailbox@b011000 {
- compatible = "qcom,msm8916-apcs-kpss-global", "syscon";
- reg = <0x0b011000 0x1000>;
- #mbox-cells = <1>;
- clocks = <&a53pll>, <&gcc GPLL0_VOTE>;
- clock-names = "pll", "aux";
- #clock-cells = <0>;
- };
-
- a53pll: clock@b016000 {
- compatible = "qcom,msm8916-a53pll";
- reg = <0x0b016000 0x40>;
- #clock-cells = <0>;
- clocks = <&xo_board>;
- clock-names = "xo";
- };
-
- timer@b020000 {
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
- compatible = "arm,armv7-timer-mem";
- reg = <0x0b020000 0x1000>;
- clock-frequency = <19200000>;
-
- frame@b021000 {
- frame-number = <0>;
- interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
- reg = <0x0b021000 0x1000>,
- <0x0b022000 0x1000>;
- };
-
- frame@b023000 {
- frame-number = <1>;
- interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
- reg = <0x0b023000 0x1000>;
- status = "disabled";
- };
-
- frame@b024000 {
- frame-number = <2>;
- interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
- reg = <0x0b024000 0x1000>;
- status = "disabled";
- };
-
- frame@b025000 {
- frame-number = <3>;
- interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
- reg = <0x0b025000 0x1000>;
- status = "disabled";
- };
-
- frame@b026000 {
- frame-number = <4>;
- interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
- reg = <0x0b026000 0x1000>;
- status = "disabled";
- };
-
- frame@b027000 {
- frame-number = <5>;
- interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
- reg = <0x0b027000 0x1000>;
- status = "disabled";
- };
-
- frame@b028000 {
- frame-number = <6>;
- interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
- reg = <0x0b028000 0x1000>;
- status = "disabled";
- };
- };
-
- cpu0_acc: power-manager@b088000 {
- compatible = "qcom,msm8916-acc";
- reg = <0x0b088000 0x1000>;
- status = "reserved"; /* Controlled by PSCI firmware */
- };
-
- cpu0_saw: power-manager@b089000 {
- compatible = "qcom,msm8916-saw2-v3.0-cpu", "qcom,saw2";
- reg = <0x0b089000 0x1000>;
- status = "reserved"; /* Controlled by PSCI firmware */
- };
-
- cpu1_acc: power-manager@b098000 {
- compatible = "qcom,msm8916-acc";
- reg = <0x0b098000 0x1000>;
- status = "reserved"; /* Controlled by PSCI firmware */
- };
-
- cpu1_saw: power-manager@b099000 {
- compatible = "qcom,msm8916-saw2-v3.0-cpu", "qcom,saw2";
- reg = <0x0b099000 0x1000>;
- status = "reserved"; /* Controlled by PSCI firmware */
- };
-
- cpu2_acc: power-manager@b0a8000 {
- compatible = "qcom,msm8916-acc";
- reg = <0x0b0a8000 0x1000>;
- status = "reserved"; /* Controlled by PSCI firmware */
- };
-
- cpu2_saw: power-manager@b0a9000 {
- compatible = "qcom,msm8916-saw2-v3.0-cpu", "qcom,saw2";
- reg = <0x0b0a9000 0x1000>;
- status = "reserved"; /* Controlled by PSCI firmware */
- };
-
- cpu3_acc: power-manager@b0b8000 {
- compatible = "qcom,msm8916-acc";
- reg = <0x0b0b8000 0x1000>;
- status = "reserved"; /* Controlled by PSCI firmware */
- };
-
- cpu3_saw: power-manager@b0b9000 {
- compatible = "qcom,msm8916-saw2-v3.0-cpu", "qcom,saw2";
- reg = <0x0b0b9000 0x1000>;
- status = "reserved"; /* Controlled by PSCI firmware */
- };
- };
-
- thermal-zones {
- cpu0-1-thermal {
- polling-delay-passive = <250>;
- polling-delay = <1000>;
-
- thermal-sensors = <&tsens 5>;
-
- trips {
- cpu0_1_alert0: trip-point0 {
- temperature = <75000>;
- hysteresis = <2000>;
- type = "passive";
- };
- cpu0_1_crit: cpu-crit {
- temperature = <110000>;
- hysteresis = <2000>;
- type = "critical";
- };
- };
-
- cooling-maps {
- map0 {
- trip = <&cpu0_1_alert0>;
- cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- };
- };
- };
-
- cpu2-3-thermal {
- polling-delay-passive = <250>;
- polling-delay = <1000>;
-
- thermal-sensors = <&tsens 4>;
-
- trips {
- cpu2_3_alert0: trip-point0 {
- temperature = <75000>;
- hysteresis = <2000>;
- type = "passive";
- };
- cpu2_3_crit: cpu-crit {
- temperature = <110000>;
- hysteresis = <2000>;
- type = "critical";
- };
- };
-
- cooling-maps {
- map0 {
- trip = <&cpu2_3_alert0>;
- cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- };
- };
- };
-
- gpu-thermal {
- polling-delay-passive = <250>;
- polling-delay = <1000>;
-
- thermal-sensors = <&tsens 2>;
-
- trips {
- gpu_alert0: trip-point0 {
- temperature = <75000>;
- hysteresis = <2000>;
- type = "passive";
- };
- gpu_crit: gpu-crit {
- temperature = <95000>;
- hysteresis = <2000>;
- type = "critical";
- };
- };
- };
-
- camera-thermal {
- polling-delay-passive = <250>;
- polling-delay = <1000>;
-
- thermal-sensors = <&tsens 1>;
-
- trips {
- cam_alert0: trip-point0 {
- temperature = <75000>;
- hysteresis = <2000>;
- type = "hot";
- };
- };
- };
-
- modem-thermal {
- polling-delay-passive = <250>;
- polling-delay = <1000>;
-
- thermal-sensors = <&tsens 0>;
-
- trips {
- modem_alert0: trip-point0 {
- temperature = <85000>;
- hysteresis = <2000>;
- type = "hot";
- };
- };
- };
- };
-
- timer {
- compatible = "arm,armv8-timer";
- interrupts = <GIC_PPI 2 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 3 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 4 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 1 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
- };
-};
diff --git a/arch/arm/dts/msm8996.dtsi b/arch/arm/dts/msm8996.dtsi
deleted file mode 100644
index 6ba9da9..0000000
--- a/arch/arm/dts/msm8996.dtsi
+++ /dev/null
@@ -1,3884 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Copyright (c) 2014-2015, The Linux Foundation. All rights reserved.
- */
-
-#include <dt-bindings/interrupt-controller/arm-gic.h>
-#include <dt-bindings/clock/qcom,gcc-msm8996.h>
-#include <dt-bindings/clock/qcom,mmcc-msm8996.h>
-#include <dt-bindings/clock/qcom,rpmcc.h>
-#include <dt-bindings/interconnect/qcom,msm8996.h>
-#include <dt-bindings/interconnect/qcom,msm8996-cbf.h>
-#include <dt-bindings/firmware/qcom,scm.h>
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/power/qcom-rpmpd.h>
-#include <dt-bindings/soc/qcom,apr.h>
-#include <dt-bindings/thermal/thermal.h>
-
-/ {
- interrupt-parent = <&intc>;
-
- #address-cells = <2>;
- #size-cells = <2>;
-
- chosen { };
-
- clocks {
- xo_board: xo-board {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <19200000>;
- clock-output-names = "xo_board";
- };
-
- sleep_clk: sleep-clk {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <32764>;
- clock-output-names = "sleep_clk";
- };
- };
-
- cpus {
- #address-cells = <2>;
- #size-cells = <0>;
-
- CPU0: cpu@0 {
- device_type = "cpu";
- compatible = "qcom,kryo";
- reg = <0x0 0x0>;
- enable-method = "psci";
- cpu-idle-states = <&CPU_SLEEP_0>;
- capacity-dmips-mhz = <1024>;
- clocks = <&kryocc 0>;
- interconnects = <&cbf MASTER_CBF_M4M &cbf SLAVE_CBF_M4M>;
- operating-points-v2 = <&cluster0_opp>;
- #cooling-cells = <2>;
- next-level-cache = <&L2_0>;
- L2_0: l2-cache {
- compatible = "cache";
- cache-level = <2>;
- cache-unified;
- };
- };
-
- CPU1: cpu@1 {
- device_type = "cpu";
- compatible = "qcom,kryo";
- reg = <0x0 0x1>;
- enable-method = "psci";
- cpu-idle-states = <&CPU_SLEEP_0>;
- capacity-dmips-mhz = <1024>;
- clocks = <&kryocc 0>;
- interconnects = <&cbf MASTER_CBF_M4M &cbf SLAVE_CBF_M4M>;
- operating-points-v2 = <&cluster0_opp>;
- #cooling-cells = <2>;
- next-level-cache = <&L2_0>;
- };
-
- CPU2: cpu@100 {
- device_type = "cpu";
- compatible = "qcom,kryo";
- reg = <0x0 0x100>;
- enable-method = "psci";
- cpu-idle-states = <&CPU_SLEEP_0>;
- capacity-dmips-mhz = <1024>;
- clocks = <&kryocc 1>;
- interconnects = <&cbf MASTER_CBF_M4M &cbf SLAVE_CBF_M4M>;
- operating-points-v2 = <&cluster1_opp>;
- #cooling-cells = <2>;
- next-level-cache = <&L2_1>;
- L2_1: l2-cache {
- compatible = "cache";
- cache-level = <2>;
- cache-unified;
- };
- };
-
- CPU3: cpu@101 {
- device_type = "cpu";
- compatible = "qcom,kryo";
- reg = <0x0 0x101>;
- enable-method = "psci";
- cpu-idle-states = <&CPU_SLEEP_0>;
- capacity-dmips-mhz = <1024>;
- clocks = <&kryocc 1>;
- interconnects = <&cbf MASTER_CBF_M4M &cbf SLAVE_CBF_M4M>;
- operating-points-v2 = <&cluster1_opp>;
- #cooling-cells = <2>;
- next-level-cache = <&L2_1>;
- };
-
- cpu-map {
- cluster0 {
- core0 {
- cpu = <&CPU0>;
- };
-
- core1 {
- cpu = <&CPU1>;
- };
- };
-
- cluster1 {
- core0 {
- cpu = <&CPU2>;
- };
-
- core1 {
- cpu = <&CPU3>;
- };
- };
- };
-
- idle-states {
- entry-method = "psci";
-
- CPU_SLEEP_0: cpu-sleep-0 {
- compatible = "arm,idle-state";
- idle-state-name = "standalone-power-collapse";
- arm,psci-suspend-param = <0x00000004>;
- entry-latency-us = <130>;
- exit-latency-us = <80>;
- min-residency-us = <300>;
- };
- };
- };
-
- cluster0_opp: opp-table-cluster0 {
- compatible = "operating-points-v2-kryo-cpu";
- nvmem-cells = <&speedbin_efuse>;
- opp-shared;
-
- /* Nominal fmax for now */
- opp-307200000 {
- opp-hz = /bits/ 64 <307200000>;
- opp-supported-hw = <0xf>;
- clock-latency-ns = <200000>;
- opp-peak-kBps = <307200>;
- };
- opp-422400000 {
- opp-hz = /bits/ 64 <422400000>;
- opp-supported-hw = <0xf>;
- clock-latency-ns = <200000>;
- opp-peak-kBps = <307200>;
- };
- opp-480000000 {
- opp-hz = /bits/ 64 <480000000>;
- opp-supported-hw = <0xf>;
- clock-latency-ns = <200000>;
- opp-peak-kBps = <307200>;
- };
- opp-556800000 {
- opp-hz = /bits/ 64 <556800000>;
- opp-supported-hw = <0xf>;
- clock-latency-ns = <200000>;
- opp-peak-kBps = <307200>;
- };
- opp-652800000 {
- opp-hz = /bits/ 64 <652800000>;
- opp-supported-hw = <0xf>;
- clock-latency-ns = <200000>;
- opp-peak-kBps = <384000>;
- };
- opp-729600000 {
- opp-hz = /bits/ 64 <729600000>;
- opp-supported-hw = <0xf>;
- clock-latency-ns = <200000>;
- opp-peak-kBps = <460800>;
- };
- opp-844800000 {
- opp-hz = /bits/ 64 <844800000>;
- opp-supported-hw = <0xf>;
- clock-latency-ns = <200000>;
- opp-peak-kBps = <537600>;
- };
- opp-960000000 {
- opp-hz = /bits/ 64 <960000000>;
- opp-supported-hw = <0xf>;
- clock-latency-ns = <200000>;
- opp-peak-kBps = <672000>;
- };
- opp-1036800000 {
- opp-hz = /bits/ 64 <1036800000>;
- opp-supported-hw = <0xf>;
- clock-latency-ns = <200000>;
- opp-peak-kBps = <672000>;
- };
- opp-1113600000 {
- opp-hz = /bits/ 64 <1113600000>;
- opp-supported-hw = <0xf>;
- clock-latency-ns = <200000>;
- opp-peak-kBps = <825600>;
- };
- opp-1190400000 {
- opp-hz = /bits/ 64 <1190400000>;
- opp-supported-hw = <0xf>;
- clock-latency-ns = <200000>;
- opp-peak-kBps = <825600>;
- };
- opp-1228800000 {
- opp-hz = /bits/ 64 <1228800000>;
- opp-supported-hw = <0xf>;
- clock-latency-ns = <200000>;
- opp-peak-kBps = <902400>;
- };
- opp-1324800000 {
- opp-hz = /bits/ 64 <1324800000>;
- opp-supported-hw = <0xd>;
- clock-latency-ns = <200000>;
- opp-peak-kBps = <1056000>;
- };
- opp-1363200000 {
- opp-hz = /bits/ 64 <1363200000>;
- opp-supported-hw = <0x2>;
- clock-latency-ns = <200000>;
- opp-peak-kBps = <1132800>;
- };
- opp-1401600000 {
- opp-hz = /bits/ 64 <1401600000>;
- opp-supported-hw = <0xd>;
- clock-latency-ns = <200000>;
- opp-peak-kBps = <1132800>;
- };
- opp-1478400000 {
- opp-hz = /bits/ 64 <1478400000>;
- opp-supported-hw = <0x9>;
- clock-latency-ns = <200000>;
- opp-peak-kBps = <1190400>;
- };
- opp-1497600000 {
- opp-hz = /bits/ 64 <1497600000>;
- opp-supported-hw = <0x04>;
- clock-latency-ns = <200000>;
- opp-peak-kBps = <1305600>;
- };
- opp-1593600000 {
- opp-hz = /bits/ 64 <1593600000>;
- opp-supported-hw = <0x9>;
- clock-latency-ns = <200000>;
- opp-peak-kBps = <1382400>;
- };
- };
-
- cluster1_opp: opp-table-cluster1 {
- compatible = "operating-points-v2-kryo-cpu";
- nvmem-cells = <&speedbin_efuse>;
- opp-shared;
-
- /* Nominal fmax for now */
- opp-307200000 {
- opp-hz = /bits/ 64 <307200000>;
- opp-supported-hw = <0xf>;
- clock-latency-ns = <200000>;
- opp-peak-kBps = <307200>;
- };
- opp-403200000 {
- opp-hz = /bits/ 64 <403200000>;
- opp-supported-hw = <0xf>;
- clock-latency-ns = <200000>;
- opp-peak-kBps = <307200>;
- };
- opp-480000000 {
- opp-hz = /bits/ 64 <480000000>;
- opp-supported-hw = <0xf>;
- clock-latency-ns = <200000>;
- opp-peak-kBps = <307200>;
- };
- opp-556800000 {
- opp-hz = /bits/ 64 <556800000>;
- opp-supported-hw = <0xf>;
- clock-latency-ns = <200000>;
- opp-peak-kBps = <307200>;
- };
- opp-652800000 {
- opp-hz = /bits/ 64 <652800000>;
- opp-supported-hw = <0xf>;
- clock-latency-ns = <200000>;
- opp-peak-kBps = <307200>;
- };
- opp-729600000 {
- opp-hz = /bits/ 64 <729600000>;
- opp-supported-hw = <0xf>;
- clock-latency-ns = <200000>;
- opp-peak-kBps = <307200>;
- };
- opp-806400000 {
- opp-hz = /bits/ 64 <806400000>;
- opp-supported-hw = <0xf>;
- clock-latency-ns = <200000>;
- opp-peak-kBps = <384000>;
- };
- opp-883200000 {
- opp-hz = /bits/ 64 <883200000>;
- opp-supported-hw = <0xf>;
- clock-latency-ns = <200000>;
- opp-peak-kBps = <460800>;
- };
- opp-940800000 {
- opp-hz = /bits/ 64 <940800000>;
- opp-supported-hw = <0xf>;
- clock-latency-ns = <200000>;
- opp-peak-kBps = <537600>;
- };
- opp-1036800000 {
- opp-hz = /bits/ 64 <1036800000>;
- opp-supported-hw = <0xf>;
- clock-latency-ns = <200000>;
- opp-peak-kBps = <595200>;
- };
- opp-1113600000 {
- opp-hz = /bits/ 64 <1113600000>;
- opp-supported-hw = <0xf>;
- clock-latency-ns = <200000>;
- opp-peak-kBps = <672000>;
- };
- opp-1190400000 {
- opp-hz = /bits/ 64 <1190400000>;
- opp-supported-hw = <0xf>;
- clock-latency-ns = <200000>;
- opp-peak-kBps = <672000>;
- };
- opp-1248000000 {
- opp-hz = /bits/ 64 <1248000000>;
- opp-supported-hw = <0xf>;
- clock-latency-ns = <200000>;
- opp-peak-kBps = <748800>;
- };
- opp-1324800000 {
- opp-hz = /bits/ 64 <1324800000>;
- opp-supported-hw = <0xf>;
- clock-latency-ns = <200000>;
- opp-peak-kBps = <825600>;
- };
- opp-1401600000 {
- opp-hz = /bits/ 64 <1401600000>;
- opp-supported-hw = <0xf>;
- clock-latency-ns = <200000>;
- opp-peak-kBps = <902400>;
- };
- opp-1478400000 {
- opp-hz = /bits/ 64 <1478400000>;
- opp-supported-hw = <0xf>;
- clock-latency-ns = <200000>;
- opp-peak-kBps = <979200>;
- };
- opp-1555200000 {
- opp-hz = /bits/ 64 <1555200000>;
- opp-supported-hw = <0xf>;
- clock-latency-ns = <200000>;
- opp-peak-kBps = <1056000>;
- };
- opp-1632000000 {
- opp-hz = /bits/ 64 <1632000000>;
- opp-supported-hw = <0xf>;
- clock-latency-ns = <200000>;
- opp-peak-kBps = <1190400>;
- };
- opp-1708800000 {
- opp-hz = /bits/ 64 <1708800000>;
- opp-supported-hw = <0xf>;
- clock-latency-ns = <200000>;
- opp-peak-kBps = <1228800>;
- };
- opp-1785600000 {
- opp-hz = /bits/ 64 <1785600000>;
- opp-supported-hw = <0xf>;
- clock-latency-ns = <200000>;
- opp-peak-kBps = <1305600>;
- };
- opp-1804800000 {
- opp-hz = /bits/ 64 <1804800000>;
- opp-supported-hw = <0xe>;
- clock-latency-ns = <200000>;
- opp-peak-kBps = <1305600>;
- };
- opp-1824000000 {
- opp-hz = /bits/ 64 <1824000000>;
- opp-supported-hw = <0x1>;
- clock-latency-ns = <200000>;
- opp-peak-kBps = <1382400>;
- };
- opp-1900800000 {
- opp-hz = /bits/ 64 <1900800000>;
- opp-supported-hw = <0x4>;
- clock-latency-ns = <200000>;
- opp-peak-kBps = <1305600>;
- };
- opp-1920000000 {
- opp-hz = /bits/ 64 <1920000000>;
- opp-supported-hw = <0x1>;
- clock-latency-ns = <200000>;
- opp-peak-kBps = <1459200>;
- };
- opp-1996800000 {
- opp-hz = /bits/ 64 <1996800000>;
- opp-supported-hw = <0x1>;
- clock-latency-ns = <200000>;
- opp-peak-kBps = <1593600>;
- };
- opp-2073600000 {
- opp-hz = /bits/ 64 <2073600000>;
- opp-supported-hw = <0x1>;
- clock-latency-ns = <200000>;
- opp-peak-kBps = <1593600>;
- };
- opp-2150400000 {
- opp-hz = /bits/ 64 <2150400000>;
- opp-supported-hw = <0x1>;
- clock-latency-ns = <200000>;
- opp-peak-kBps = <1593600>;
- };
- };
-
- firmware {
- scm {
- compatible = "qcom,scm-msm8996", "qcom,scm";
- qcom,dload-mode = <&tcsr_2 0x13000>;
- };
- };
-
- memory@80000000 {
- device_type = "memory";
- /* We expect the bootloader to fill in the reg */
- reg = <0x0 0x80000000 0x0 0x0>;
- };
-
- psci {
- compatible = "arm,psci-1.0";
- method = "smc";
- };
-
- rpm: remoteproc {
- compatible = "qcom,msm8996-rpm-proc", "qcom,rpm-proc";
-
- glink-edge {
- compatible = "qcom,glink-rpm";
- interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;
- qcom,rpm-msg-ram = <&rpm_msg_ram>;
- mboxes = <&apcs_glb 0>;
-
- rpm_requests: rpm-requests {
- compatible = "qcom,rpm-msm8996";
- qcom,glink-channels = "rpm_requests";
-
- rpmcc: clock-controller {
- compatible = "qcom,rpmcc-msm8996", "qcom,rpmcc";
- #clock-cells = <1>;
- clocks = <&xo_board>;
- clock-names = "xo";
- };
-
- rpmpd: power-controller {
- compatible = "qcom,msm8996-rpmpd";
- #power-domain-cells = <1>;
- operating-points-v2 = <&rpmpd_opp_table>;
-
- rpmpd_opp_table: opp-table {
- compatible = "operating-points-v2";
-
- rpmpd_opp1: opp1 {
- opp-level = <1>;
- };
-
- rpmpd_opp2: opp2 {
- opp-level = <2>;
- };
-
- rpmpd_opp3: opp3 {
- opp-level = <3>;
- };
-
- rpmpd_opp4: opp4 {
- opp-level = <4>;
- };
-
- rpmpd_opp5: opp5 {
- opp-level = <5>;
- };
-
- rpmpd_opp6: opp6 {
- opp-level = <6>;
- };
- };
- };
- };
- };
- };
-
- reserved-memory {
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- hyp_mem: memory@85800000 {
- reg = <0x0 0x85800000 0x0 0x600000>;
- no-map;
- };
-
- xbl_mem: memory@85e00000 {
- reg = <0x0 0x85e00000 0x0 0x200000>;
- no-map;
- };
-
- smem_mem: smem-mem@86000000 {
- reg = <0x0 0x86000000 0x0 0x200000>;
- no-map;
- };
-
- tz_mem: memory@86200000 {
- reg = <0x0 0x86200000 0x0 0x2600000>;
- no-map;
- };
-
- rmtfs_mem: rmtfs {
- compatible = "qcom,rmtfs-mem";
-
- size = <0x0 0x200000>;
- alloc-ranges = <0x0 0xa0000000 0x0 0x2000000>;
- no-map;
-
- qcom,client-id = <1>;
- qcom,vmid = <QCOM_SCM_VMID_MSS_MSA>;
- };
-
- mpss_mem: mpss@88800000 {
- reg = <0x0 0x88800000 0x0 0x6200000>;
- no-map;
- };
-
- adsp_mem: adsp@8ea00000 {
- reg = <0x0 0x8ea00000 0x0 0x1b00000>;
- no-map;
- };
-
- slpi_mem: slpi@90500000 {
- reg = <0x0 0x90500000 0x0 0xa00000>;
- no-map;
- };
-
- gpu_mem: gpu@90f00000 {
- compatible = "shared-dma-pool";
- reg = <0x0 0x90f00000 0x0 0x100000>;
- no-map;
- };
-
- venus_mem: venus@91000000 {
- reg = <0x0 0x91000000 0x0 0x500000>;
- no-map;
- };
-
- mba_mem: mba@91500000 {
- reg = <0x0 0x91500000 0x0 0x200000>;
- no-map;
- };
-
- mdata_mem: mpss-metadata {
- alloc-ranges = <0x0 0xa0000000 0x0 0x20000000>;
- size = <0x0 0x4000>;
- no-map;
- };
- };
-
- smem {
- compatible = "qcom,smem";
- memory-region = <&smem_mem>;
- hwlocks = <&tcsr_mutex 3>;
- };
-
- smp2p-adsp {
- compatible = "qcom,smp2p";
- qcom,smem = <443>, <429>;
-
- interrupts = <GIC_SPI 158 IRQ_TYPE_EDGE_RISING>;
-
- mboxes = <&apcs_glb 10>;
-
- qcom,local-pid = <0>;
- qcom,remote-pid = <2>;
-
- adsp_smp2p_out: master-kernel {
- qcom,entry-name = "master-kernel";
- #qcom,smem-state-cells = <1>;
- };
-
- adsp_smp2p_in: slave-kernel {
- qcom,entry-name = "slave-kernel";
-
- interrupt-controller;
- #interrupt-cells = <2>;
- };
- };
-
- smp2p-mpss {
- compatible = "qcom,smp2p";
- qcom,smem = <435>, <428>;
-
- interrupts = <GIC_SPI 451 IRQ_TYPE_EDGE_RISING>;
-
- mboxes = <&apcs_glb 14>;
-
- qcom,local-pid = <0>;
- qcom,remote-pid = <1>;
-
- mpss_smp2p_out: master-kernel {
- qcom,entry-name = "master-kernel";
- #qcom,smem-state-cells = <1>;
- };
-
- mpss_smp2p_in: slave-kernel {
- qcom,entry-name = "slave-kernel";
-
- interrupt-controller;
- #interrupt-cells = <2>;
- };
- };
-
- smp2p-slpi {
- compatible = "qcom,smp2p";
- qcom,smem = <481>, <430>;
-
- interrupts = <GIC_SPI 178 IRQ_TYPE_EDGE_RISING>;
-
- mboxes = <&apcs_glb 26>;
-
- qcom,local-pid = <0>;
- qcom,remote-pid = <3>;
-
- slpi_smp2p_out: master-kernel {
- qcom,entry-name = "master-kernel";
- #qcom,smem-state-cells = <1>;
- };
-
- slpi_smp2p_in: slave-kernel {
- qcom,entry-name = "slave-kernel";
-
- interrupt-controller;
- #interrupt-cells = <2>;
- };
- };
-
- soc: soc@0 {
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0 0 0 0xffffffff>;
- compatible = "simple-bus";
-
- pcie_phy: phy-wrapper@34000 {
- compatible = "qcom,msm8996-qmp-pcie-phy";
- reg = <0x00034000 0x488>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x0 0x00034000 0x4000>;
-
- clocks = <&gcc GCC_PCIE_PHY_AUX_CLK>,
- <&gcc GCC_PCIE_PHY_CFG_AHB_CLK>,
- <&gcc GCC_PCIE_CLKREF_CLK>;
- clock-names = "aux", "cfg_ahb", "ref";
-
- resets = <&gcc GCC_PCIE_PHY_BCR>,
- <&gcc GCC_PCIE_PHY_COM_BCR>,
- <&gcc GCC_PCIE_PHY_COM_NOCSR_BCR>;
- reset-names = "phy", "common", "cfg";
-
- status = "disabled";
-
- pciephy_0: phy@1000 {
- reg = <0x1000 0x130>,
- <0x1200 0x200>,
- <0x1400 0x1dc>;
-
- clocks = <&gcc GCC_PCIE_0_PIPE_CLK>;
- clock-names = "pipe0";
- resets = <&gcc GCC_PCIE_0_PHY_BCR>;
- reset-names = "lane0";
-
- #clock-cells = <0>;
- clock-output-names = "pcie_0_pipe_clk_src";
-
- #phy-cells = <0>;
- };
-
- pciephy_1: phy@2000 {
- reg = <0x2000 0x130>,
- <0x2200 0x200>,
- <0x2400 0x1dc>;
-
- clocks = <&gcc GCC_PCIE_1_PIPE_CLK>;
- clock-names = "pipe1";
- resets = <&gcc GCC_PCIE_1_PHY_BCR>;
- reset-names = "lane1";
-
- #clock-cells = <0>;
- clock-output-names = "pcie_1_pipe_clk_src";
-
- #phy-cells = <0>;
- };
-
- pciephy_2: phy@3000 {
- reg = <0x3000 0x130>,
- <0x3200 0x200>,
- <0x3400 0x1dc>;
-
- clocks = <&gcc GCC_PCIE_2_PIPE_CLK>;
- clock-names = "pipe2";
- resets = <&gcc GCC_PCIE_2_PHY_BCR>;
- reset-names = "lane2";
-
- #clock-cells = <0>;
- clock-output-names = "pcie_2_pipe_clk_src";
-
- #phy-cells = <0>;
- };
- };
-
- rpm_msg_ram: sram@68000 {
- compatible = "qcom,rpm-msg-ram";
- reg = <0x00068000 0x6000>;
- };
-
- qfprom@74000 {
- compatible = "qcom,msm8996-qfprom", "qcom,qfprom";
- reg = <0x00074000 0x8ff>;
- #address-cells = <1>;
- #size-cells = <1>;
-
- qusb2p_hstx_trim: hstx_trim@24e {
- reg = <0x24e 0x2>;
- bits = <5 4>;
- };
-
- qusb2s_hstx_trim: hstx_trim@24f {
- reg = <0x24f 0x1>;
- bits = <1 4>;
- };
-
- speedbin_efuse: speedbin@133 {
- reg = <0x133 0x1>;
- bits = <5 3>;
- };
- };
-
- rng: rng@83000 {
- compatible = "qcom,prng-ee";
- reg = <0x00083000 0x1000>;
- clocks = <&gcc GCC_PRNG_AHB_CLK>;
- clock-names = "core";
- };
-
- gcc: clock-controller@300000 {
- compatible = "qcom,gcc-msm8996";
- #clock-cells = <1>;
- #reset-cells = <1>;
- #power-domain-cells = <1>;
- reg = <0x00300000 0x90000>;
-
- clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>,
- <&rpmcc RPM_SMD_LN_BB_CLK>,
- <&sleep_clk>,
- <&pciephy_0>,
- <&pciephy_1>,
- <&pciephy_2>,
- <&ssusb_phy_0>,
- <&ufsphy_lane 0>,
- <&ufsphy_lane 1>,
- <&ufsphy_lane 2>;
- clock-names = "cxo",
- "cxo2",
- "sleep_clk",
- "pcie_0_pipe_clk_src",
- "pcie_1_pipe_clk_src",
- "pcie_2_pipe_clk_src",
- "usb3_phy_pipe_clk_src",
- "ufs_rx_symbol_0_clk_src",
- "ufs_rx_symbol_1_clk_src",
- "ufs_tx_symbol_0_clk_src";
- };
-
- bimc: interconnect@408000 {
- compatible = "qcom,msm8996-bimc";
- reg = <0x00408000 0x5a000>;
- #interconnect-cells = <1>;
- clock-names = "bus", "bus_a";
- clocks = <&rpmcc RPM_SMD_BIMC_CLK>,
- <&rpmcc RPM_SMD_BIMC_A_CLK>;
- };
-
- tsens0: thermal-sensor@4a9000 {
- compatible = "qcom,msm8996-tsens", "qcom,tsens-v2";
- reg = <0x004a9000 0x1000>, /* TM */
- <0x004a8000 0x1000>; /* SROT */
- #qcom,sensors = <13>;
- interrupts = <GIC_SPI 458 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "uplow", "critical";
- #thermal-sensor-cells = <1>;
- };
-
- tsens1: thermal-sensor@4ad000 {
- compatible = "qcom,msm8996-tsens", "qcom,tsens-v2";
- reg = <0x004ad000 0x1000>, /* TM */
- <0x004ac000 0x1000>; /* SROT */
- #qcom,sensors = <8>;
- interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "uplow", "critical";
- #thermal-sensor-cells = <1>;
- };
-
- cryptobam: dma-controller@644000 {
- compatible = "qcom,bam-v1.7.0";
- reg = <0x00644000 0x24000>;
- interrupts = <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&gcc GCC_CE1_CLK>;
- clock-names = "bam_clk";
- #dma-cells = <1>;
- qcom,ee = <0>;
- qcom,controlled-remotely;
- };
-
- crypto: crypto@67a000 {
- compatible = "qcom,crypto-v5.4";
- reg = <0x0067a000 0x6000>;
- clocks = <&gcc GCC_CE1_AHB_CLK>,
- <&gcc GCC_CE1_AXI_CLK>,
- <&gcc GCC_CE1_CLK>;
- clock-names = "iface", "bus", "core";
- dmas = <&cryptobam 6>, <&cryptobam 7>;
- dma-names = "rx", "tx";
- };
-
- cnoc: interconnect@500000 {
- compatible = "qcom,msm8996-cnoc";
- reg = <0x00500000 0x1000>;
- #interconnect-cells = <1>;
- clock-names = "bus", "bus_a";
- clocks = <&rpmcc RPM_SMD_CNOC_CLK>,
- <&rpmcc RPM_SMD_CNOC_A_CLK>;
- };
-
- snoc: interconnect@524000 {
- compatible = "qcom,msm8996-snoc";
- reg = <0x00524000 0x1c000>;
- #interconnect-cells = <1>;
- clock-names = "bus", "bus_a";
- clocks = <&rpmcc RPM_SMD_SNOC_CLK>,
- <&rpmcc RPM_SMD_SNOC_A_CLK>;
- };
-
- a0noc: interconnect@543000 {
- compatible = "qcom,msm8996-a0noc";
- reg = <0x00543000 0x6000>;
- #interconnect-cells = <1>;
- clock-names = "aggre0_snoc_axi",
- "aggre0_cnoc_ahb",
- "aggre0_noc_mpu_cfg";
- clocks = <&gcc GCC_AGGRE0_SNOC_AXI_CLK>,
- <&gcc GCC_AGGRE0_CNOC_AHB_CLK>,
- <&gcc GCC_AGGRE0_NOC_MPU_CFG_AHB_CLK>;
- power-domains = <&gcc AGGRE0_NOC_GDSC>;
- };
-
- a1noc: interconnect@562000 {
- compatible = "qcom,msm8996-a1noc";
- reg = <0x00562000 0x5000>;
- #interconnect-cells = <1>;
- clock-names = "bus", "bus_a";
- clocks = <&rpmcc RPM_SMD_AGGR1_NOC_CLK>,
- <&rpmcc RPM_SMD_AGGR1_NOC_A_CLK>;
- };
-
- a2noc: interconnect@583000 {
- compatible = "qcom,msm8996-a2noc";
- reg = <0x00583000 0x7000>;
- #interconnect-cells = <1>;
- clock-names = "bus", "bus_a", "aggre2_ufs_axi", "ufs_axi";
- clocks = <&rpmcc RPM_SMD_AGGR2_NOC_CLK>,
- <&rpmcc RPM_SMD_AGGR2_NOC_A_CLK>,
- <&gcc GCC_AGGRE2_UFS_AXI_CLK>,
- <&gcc GCC_UFS_AXI_CLK>;
- };
-
- mnoc: interconnect@5a4000 {
- compatible = "qcom,msm8996-mnoc";
- reg = <0x005a4000 0x1c000>;
- #interconnect-cells = <1>;
- clock-names = "bus", "bus_a", "iface";
- clocks = <&rpmcc RPM_SMD_MMAXI_CLK>,
- <&rpmcc RPM_SMD_MMAXI_A_CLK>,
- <&mmcc AHB_CLK_SRC>;
- };
-
- pnoc: interconnect@5c0000 {
- compatible = "qcom,msm8996-pnoc";
- reg = <0x005c0000 0x3000>;
- #interconnect-cells = <1>;
- clock-names = "bus", "bus_a";
- clocks = <&rpmcc RPM_SMD_PCNOC_CLK>,
- <&rpmcc RPM_SMD_PCNOC_A_CLK>;
- };
-
- tcsr_mutex: hwlock@740000 {
- compatible = "qcom,tcsr-mutex";
- reg = <0x00740000 0x20000>;
- #hwlock-cells = <1>;
- };
-
- tcsr_1: syscon@760000 {
- compatible = "qcom,tcsr-msm8996", "syscon";
- reg = <0x00760000 0x20000>;
- };
-
- tcsr_2: syscon@7a0000 {
- compatible = "qcom,tcsr-msm8996", "syscon";
- reg = <0x007a0000 0x18000>;
- };
-
- mmcc: clock-controller@8c0000 {
- compatible = "qcom,mmcc-msm8996";
- #clock-cells = <1>;
- #reset-cells = <1>;
- #power-domain-cells = <1>;
- reg = <0x008c0000 0x40000>;
- clocks = <&xo_board>,
- <&gcc GPLL0>,
- <&gcc GCC_MMSS_NOC_CFG_AHB_CLK>,
- <&mdss_dsi0_phy 1>,
- <&mdss_dsi0_phy 0>,
- <&mdss_dsi1_phy 1>,
- <&mdss_dsi1_phy 0>,
- <&mdss_hdmi_phy>;
- clock-names = "xo",
- "gpll0",
- "gcc_mmss_noc_cfg_ahb_clk",
- "dsi0pll",
- "dsi0pllbyte",
- "dsi1pll",
- "dsi1pllbyte",
- "hdmipll";
- assigned-clocks = <&mmcc MMPLL9_PLL>,
- <&mmcc MMPLL1_PLL>,
- <&mmcc MMPLL3_PLL>,
- <&mmcc MMPLL4_PLL>,
- <&mmcc MMPLL5_PLL>;
- assigned-clock-rates = <624000000>,
- <810000000>,
- <980000000>,
- <960000000>,
- <825000000>;
- };
-
- mdss: display-subsystem@900000 {
- compatible = "qcom,mdss";
-
- reg = <0x00900000 0x1000>,
- <0x009b0000 0x1040>,
- <0x009b8000 0x1040>;
- reg-names = "mdss_phys",
- "vbif_phys",
- "vbif_nrt_phys";
-
- power-domains = <&mmcc MDSS_GDSC>;
- interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
-
- interrupt-controller;
- #interrupt-cells = <1>;
-
- clocks = <&mmcc MDSS_AHB_CLK>,
- <&mmcc MDSS_MDP_CLK>;
- clock-names = "iface", "core";
-
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
-
- status = "disabled";
-
- mdp: display-controller@901000 {
- compatible = "qcom,msm8996-mdp5", "qcom,mdp5";
- reg = <0x00901000 0x90000>;
- reg-names = "mdp_phys";
-
- interrupt-parent = <&mdss>;
- interrupts = <0>;
-
- clocks = <&mmcc MDSS_AHB_CLK>,
- <&mmcc MDSS_AXI_CLK>,
- <&mmcc MDSS_MDP_CLK>,
- <&mmcc SMMU_MDP_AXI_CLK>,
- <&mmcc MDSS_VSYNC_CLK>;
- clock-names = "iface",
- "bus",
- "core",
- "iommu",
- "vsync";
-
- iommus = <&mdp_smmu 0>;
-
- assigned-clocks = <&mmcc MDSS_MDP_CLK>,
- <&mmcc MDSS_VSYNC_CLK>;
- assigned-clock-rates = <300000000>,
- <19200000>;
-
- interconnects = <&mnoc MASTER_MDP_PORT0 &bimc SLAVE_EBI_CH0>,
- <&mnoc MASTER_MDP_PORT1 &bimc SLAVE_EBI_CH0>,
- <&mnoc MASTER_ROTATOR &bimc SLAVE_EBI_CH0>;
- interconnect-names = "mdp0-mem", "mdp1-mem", "rotator-mem";
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
- mdp5_intf3_out: endpoint {
- remote-endpoint = <&mdss_hdmi_in>;
- };
- };
-
- port@1 {
- reg = <1>;
- mdp5_intf1_out: endpoint {
- remote-endpoint = <&mdss_dsi0_in>;
- };
- };
-
- port@2 {
- reg = <2>;
- mdp5_intf2_out: endpoint {
- remote-endpoint = <&mdss_dsi1_in>;
- };
- };
- };
- };
-
- mdss_dsi0: dsi@994000 {
- compatible = "qcom,msm8996-dsi-ctrl",
- "qcom,mdss-dsi-ctrl";
- reg = <0x00994000 0x400>;
- reg-names = "dsi_ctrl";
-
- interrupt-parent = <&mdss>;
- interrupts = <4>;
-
- clocks = <&mmcc MDSS_MDP_CLK>,
- <&mmcc MDSS_BYTE0_CLK>,
- <&mmcc MDSS_AHB_CLK>,
- <&mmcc MDSS_AXI_CLK>,
- <&mmcc MMSS_MISC_AHB_CLK>,
- <&mmcc MDSS_PCLK0_CLK>,
- <&mmcc MDSS_ESC0_CLK>;
- clock-names = "mdp_core",
- "byte",
- "iface",
- "bus",
- "core_mmss",
- "pixel",
- "core";
- assigned-clocks = <&mmcc BYTE0_CLK_SRC>, <&mmcc PCLK0_CLK_SRC>;
- assigned-clock-parents = <&mdss_dsi0_phy 0>, <&mdss_dsi0_phy 1>;
-
- phys = <&mdss_dsi0_phy>;
- status = "disabled";
-
- #address-cells = <1>;
- #size-cells = <0>;
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
- mdss_dsi0_in: endpoint {
- remote-endpoint = <&mdp5_intf1_out>;
- };
- };
-
- port@1 {
- reg = <1>;
- mdss_dsi0_out: endpoint {
- };
- };
- };
- };
-
- mdss_dsi0_phy: phy@994400 {
- compatible = "qcom,dsi-phy-14nm";
- reg = <0x00994400 0x100>,
- <0x00994500 0x300>,
- <0x00994800 0x188>;
- reg-names = "dsi_phy",
- "dsi_phy_lane",
- "dsi_pll";
-
- #clock-cells = <1>;
- #phy-cells = <0>;
-
- clocks = <&mmcc MDSS_AHB_CLK>, <&rpmcc RPM_SMD_XO_CLK_SRC>;
- clock-names = "iface", "ref";
- status = "disabled";
- };
-
- mdss_dsi1: dsi@996000 {
- compatible = "qcom,msm8996-dsi-ctrl",
- "qcom,mdss-dsi-ctrl";
- reg = <0x00996000 0x400>;
- reg-names = "dsi_ctrl";
-
- interrupt-parent = <&mdss>;
- interrupts = <5>;
-
- clocks = <&mmcc MDSS_MDP_CLK>,
- <&mmcc MDSS_BYTE1_CLK>,
- <&mmcc MDSS_AHB_CLK>,
- <&mmcc MDSS_AXI_CLK>,
- <&mmcc MMSS_MISC_AHB_CLK>,
- <&mmcc MDSS_PCLK1_CLK>,
- <&mmcc MDSS_ESC1_CLK>;
- clock-names = "mdp_core",
- "byte",
- "iface",
- "bus",
- "core_mmss",
- "pixel",
- "core";
- assigned-clocks = <&mmcc BYTE1_CLK_SRC>, <&mmcc PCLK1_CLK_SRC>;
- assigned-clock-parents = <&mdss_dsi1_phy 0>, <&mdss_dsi1_phy 1>;
-
- phys = <&mdss_dsi1_phy>;
- status = "disabled";
-
- #address-cells = <1>;
- #size-cells = <0>;
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
- mdss_dsi1_in: endpoint {
- remote-endpoint = <&mdp5_intf2_out>;
- };
- };
-
- port@1 {
- reg = <1>;
- mdss_dsi1_out: endpoint {
- };
- };
- };
- };
-
- mdss_dsi1_phy: phy@996400 {
- compatible = "qcom,dsi-phy-14nm";
- reg = <0x00996400 0x100>,
- <0x00996500 0x300>,
- <0x00996800 0x188>;
- reg-names = "dsi_phy",
- "dsi_phy_lane",
- "dsi_pll";
-
- #clock-cells = <1>;
- #phy-cells = <0>;
-
- clocks = <&mmcc MDSS_AHB_CLK>, <&rpmcc RPM_SMD_XO_CLK_SRC>;
- clock-names = "iface", "ref";
- status = "disabled";
- };
-
- mdss_hdmi: hdmi-tx@9a0000 {
- compatible = "qcom,hdmi-tx-8996";
- reg = <0x009a0000 0x50c>,
- <0x00070000 0x6158>,
- <0x009e0000 0xfff>;
- reg-names = "core_physical",
- "qfprom_physical",
- "hdcp_physical";
-
- interrupt-parent = <&mdss>;
- interrupts = <8>;
-
- clocks = <&mmcc MDSS_MDP_CLK>,
- <&mmcc MDSS_AHB_CLK>,
- <&mmcc MDSS_HDMI_CLK>,
- <&mmcc MDSS_HDMI_AHB_CLK>,
- <&mmcc MDSS_EXTPCLK_CLK>;
- clock-names =
- "mdp_core",
- "iface",
- "core",
- "alt_iface",
- "extp";
-
- phys = <&mdss_hdmi_phy>;
- #sound-dai-cells = <1>;
-
- status = "disabled";
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
- mdss_hdmi_in: endpoint {
- remote-endpoint = <&mdp5_intf3_out>;
- };
- };
- };
- };
-
- mdss_hdmi_phy: phy@9a0600 {
- #phy-cells = <0>;
- compatible = "qcom,hdmi-phy-8996";
- reg = <0x009a0600 0x1c4>,
- <0x009a0a00 0x124>,
- <0x009a0c00 0x124>,
- <0x009a0e00 0x124>,
- <0x009a1000 0x124>,
- <0x009a1200 0x0c8>;
- reg-names = "hdmi_pll",
- "hdmi_tx_l0",
- "hdmi_tx_l1",
- "hdmi_tx_l2",
- "hdmi_tx_l3",
- "hdmi_phy";
-
- clocks = <&mmcc MDSS_AHB_CLK>,
- <&gcc GCC_HDMI_CLKREF_CLK>,
- <&xo_board>;
- clock-names = "iface",
- "ref",
- "xo";
-
- #clock-cells = <0>;
-
- status = "disabled";
- };
- };
-
- gpu: gpu@b00000 {
- compatible = "qcom,adreno-530.2", "qcom,adreno";
-
- reg = <0x00b00000 0x3f000>;
- reg-names = "kgsl_3d0_reg_memory";
-
- interrupts = <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>;
-
- clocks = <&mmcc GPU_GX_GFX3D_CLK>,
- <&mmcc GPU_AHB_CLK>,
- <&mmcc GPU_GX_RBBMTIMER_CLK>,
- <&gcc GCC_BIMC_GFX_CLK>,
- <&gcc GCC_MMSS_BIMC_GFX_CLK>;
-
- clock-names = "core",
- "iface",
- "rbbmtimer",
- "mem",
- "mem_iface";
-
- interconnects = <&bimc MASTER_GRAPHICS_3D &bimc SLAVE_EBI_CH0>;
- interconnect-names = "gfx-mem";
-
- power-domains = <&mmcc GPU_GX_GDSC>;
- iommus = <&adreno_smmu 0>;
-
- nvmem-cells = <&speedbin_efuse>;
- nvmem-cell-names = "speed_bin";
-
- operating-points-v2 = <&gpu_opp_table>;
-
- status = "disabled";
-
- #cooling-cells = <2>;
-
- gpu_opp_table: opp-table {
- compatible = "operating-points-v2";
-
- /*
- * 624Mhz is only available on speed bins 0 and 3.
- * 560Mhz is only available on speed bins 0, 2 and 3.
- * All the rest are available on all bins of the hardware.
- */
- opp-624000000 {
- opp-hz = /bits/ 64 <624000000>;
- opp-supported-hw = <0x09>;
- };
- opp-560000000 {
- opp-hz = /bits/ 64 <560000000>;
- opp-supported-hw = <0x0d>;
- };
- opp-510000000 {
- opp-hz = /bits/ 64 <510000000>;
- opp-supported-hw = <0xff>;
- };
- opp-401800000 {
- opp-hz = /bits/ 64 <401800000>;
- opp-supported-hw = <0xff>;
- };
- opp-315000000 {
- opp-hz = /bits/ 64 <315000000>;
- opp-supported-hw = <0xff>;
- };
- opp-214000000 {
- opp-hz = /bits/ 64 <214000000>;
- opp-supported-hw = <0xff>;
- };
- opp-133000000 {
- opp-hz = /bits/ 64 <133000000>;
- opp-supported-hw = <0xff>;
- };
- };
-
- zap-shader {
- memory-region = <&gpu_mem>;
- };
- };
-
- tlmm: pinctrl@1010000 {
- compatible = "qcom,msm8996-pinctrl";
- reg = <0x01010000 0x300000>;
- interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
- gpio-controller;
- gpio-ranges = <&tlmm 0 0 150>;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
-
- blsp1_spi1_default: blsp1-spi1-default-state {
- spi-pins {
- pins = "gpio0", "gpio1", "gpio3";
- function = "blsp_spi1";
- drive-strength = <12>;
- bias-disable;
- };
-
- cs-pins {
- pins = "gpio2";
- function = "gpio";
- drive-strength = <16>;
- bias-disable;
- output-high;
- };
- };
-
- blsp1_spi1_sleep: blsp1-spi1-sleep-state {
- pins = "gpio0", "gpio1", "gpio2", "gpio3";
- function = "gpio";
- drive-strength = <2>;
- bias-pull-down;
- };
-
- blsp2_uart2_2pins_default: blsp2-uart2-2pins-state {
- pins = "gpio4", "gpio5";
- function = "blsp_uart8";
- drive-strength = <16>;
- bias-disable;
- };
-
- blsp2_uart2_2pins_sleep: blsp2-uart2-2pins-sleep-state {
- pins = "gpio4", "gpio5";
- function = "gpio";
- drive-strength = <2>;
- bias-disable;
- };
-
- blsp2_i2c2_default: blsp2-i2c2-state {
- pins = "gpio6", "gpio7";
- function = "blsp_i2c8";
- drive-strength = <16>;
- bias-disable;
- };
-
- blsp2_i2c2_sleep: blsp2-i2c2-sleep-state {
- pins = "gpio6", "gpio7";
- function = "gpio";
- drive-strength = <2>;
- bias-disable;
- };
-
- blsp1_i2c6_default: blsp1-i2c6-state {
- pins = "gpio27", "gpio28";
- function = "blsp_i2c6";
- drive-strength = <16>;
- bias-disable;
- };
-
- blsp1_i2c6_sleep: blsp1-i2c6-sleep-state {
- pins = "gpio27", "gpio28";
- function = "gpio";
- drive-strength = <2>;
- bias-pull-up;
- };
-
- cci0_default: cci0-default-state {
- pins = "gpio17", "gpio18";
- function = "cci_i2c";
- drive-strength = <16>;
- bias-disable;
- };
-
- camera0_state_on:
- camera_rear_default: camera-rear-default-state {
- camera0_mclk: mclk0-pins {
- pins = "gpio13";
- function = "cam_mclk";
- drive-strength = <16>;
- bias-disable;
- };
-
- camera0_rst: rst-pins {
- pins = "gpio25";
- function = "gpio";
- drive-strength = <16>;
- bias-disable;
- };
-
- camera0_pwdn: pwdn-pins {
- pins = "gpio26";
- function = "gpio";
- drive-strength = <16>;
- bias-disable;
- };
- };
-
- cci1_default: cci1-default-state {
- pins = "gpio19", "gpio20";
- function = "cci_i2c";
- drive-strength = <16>;
- bias-disable;
- };
-
- camera1_state_on:
- camera_board_default: camera-board-default-state {
- mclk1-pins {
- pins = "gpio14";
- function = "cam_mclk";
- drive-strength = <16>;
- bias-disable;
- };
-
- pwdn-pins {
- pins = "gpio98";
- function = "gpio";
- drive-strength = <16>;
- bias-disable;
- };
-
- rst-pins {
- pins = "gpio104";
- function = "gpio";
- drive-strength = <16>;
- bias-disable;
- };
- };
-
- camera2_state_on:
- camera_front_default: camera-front-default-state {
- camera2_mclk: mclk2-pins {
- pins = "gpio15";
- function = "cam_mclk";
- drive-strength = <16>;
- bias-disable;
- };
-
- camera2_rst: rst-pins {
- pins = "gpio23";
- function = "gpio";
- drive-strength = <16>;
- bias-disable;
- };
-
- pwdn-pins {
- pins = "gpio133";
- function = "gpio";
- drive-strength = <16>;
- bias-disable;
- };
- };
-
- pcie0_state_on: pcie0-state-on-state {
- perst-pins {
- pins = "gpio35";
- function = "gpio";
- drive-strength = <2>;
- bias-pull-down;
- };
-
- clkreq-pins {
- pins = "gpio36";
- function = "pci_e0";
- drive-strength = <2>;
- bias-pull-up;
- };
-
- wake-pins {
- pins = "gpio37";
- function = "gpio";
- drive-strength = <2>;
- bias-pull-up;
- };
- };
-
- pcie0_state_off: pcie0-state-off-state {
- perst-pins {
- pins = "gpio35";
- function = "gpio";
- drive-strength = <2>;
- bias-pull-down;
- };
-
- clkreq-pins {
- pins = "gpio36";
- function = "gpio";
- drive-strength = <2>;
- bias-disable;
- };
-
- wake-pins {
- pins = "gpio37";
- function = "gpio";
- drive-strength = <2>;
- bias-disable;
- };
- };
-
- blsp1_uart2_default: blsp1-uart2-default-state {
- pins = "gpio41", "gpio42", "gpio43", "gpio44";
- function = "blsp_uart2";
- drive-strength = <16>;
- bias-disable;
- };
-
- blsp1_uart2_sleep: blsp1-uart2-sleep-state {
- pins = "gpio41", "gpio42", "gpio43", "gpio44";
- function = "gpio";
- drive-strength = <2>;
- bias-disable;
- };
-
- blsp1_i2c3_default: blsp1-i2c3-default-state {
- pins = "gpio47", "gpio48";
- function = "blsp_i2c3";
- drive-strength = <16>;
- bias-disable;
- };
-
- blsp1_i2c3_sleep: blsp1-i2c3-sleep-state {
- pins = "gpio47", "gpio48";
- function = "gpio";
- drive-strength = <2>;
- bias-disable;
- };
-
- blsp2_uart3_4pins_default: blsp2-uart3-4pins-state {
- pins = "gpio49", "gpio50", "gpio51", "gpio52";
- function = "blsp_uart9";
- drive-strength = <16>;
- bias-disable;
- };
-
- blsp2_uart3_4pins_sleep: blsp2-uart3-4pins-sleep-state {
- pins = "gpio49", "gpio50", "gpio51", "gpio52";
- function = "blsp_uart9";
- drive-strength = <2>;
- bias-disable;
- };
-
- blsp2_i2c3_default: blsp2-i2c3-state-state {
- pins = "gpio51", "gpio52";
- function = "blsp_i2c9";
- drive-strength = <16>;
- bias-disable;
- };
-
- blsp2_i2c3_sleep: blsp2-i2c3-sleep-state {
- pins = "gpio51", "gpio52";
- function = "gpio";
- drive-strength = <2>;
- bias-disable;
- };
-
- wcd_intr_default: wcd-intr-default-state {
- pins = "gpio54";
- function = "gpio";
- drive-strength = <2>;
- bias-pull-down;
- };
-
- blsp2_i2c1_default: blsp2-i2c1-state {
- pins = "gpio55", "gpio56";
- function = "blsp_i2c7";
- drive-strength = <16>;
- bias-disable;
- };
-
- blsp2_i2c1_sleep: blsp2-i2c1-sleep-state {
- pins = "gpio55", "gpio56";
- function = "gpio";
- drive-strength = <2>;
- bias-disable;
- };
-
- blsp2_i2c5_default: blsp2-i2c5-state {
- pins = "gpio60", "gpio61";
- function = "blsp_i2c11";
- drive-strength = <2>;
- bias-disable;
- };
-
- /* Sleep state for BLSP2_I2C5 is missing.. */
-
- cdc_reset_active: cdc-reset-active-state {
- pins = "gpio64";
- function = "gpio";
- drive-strength = <16>;
- bias-pull-down;
- output-high;
- };
-
- cdc_reset_sleep: cdc-reset-sleep-state {
- pins = "gpio64";
- function = "gpio";
- drive-strength = <16>;
- bias-disable;
- output-low;
- };
-
- blsp2_spi6_default: blsp2-spi6-default-state {
- spi-pins {
- pins = "gpio85", "gpio86", "gpio88";
- function = "blsp_spi12";
- drive-strength = <12>;
- bias-disable;
- };
-
- cs-pins {
- pins = "gpio87";
- function = "gpio";
- drive-strength = <16>;
- bias-disable;
- output-high;
- };
- };
-
- blsp2_spi6_sleep: blsp2-spi6-sleep-state {
- pins = "gpio85", "gpio86", "gpio87", "gpio88";
- function = "gpio";
- drive-strength = <2>;
- bias-pull-down;
- };
-
- blsp2_i2c6_default: blsp2-i2c6-state {
- pins = "gpio87", "gpio88";
- function = "blsp_i2c12";
- drive-strength = <16>;
- bias-disable;
- };
-
- blsp2_i2c6_sleep: blsp2-i2c6-sleep-state {
- pins = "gpio87", "gpio88";
- function = "gpio";
- drive-strength = <2>;
- bias-disable;
- };
-
- pcie1_state_on: pcie1-on-state {
- perst-pins {
- pins = "gpio130";
- function = "gpio";
- drive-strength = <2>;
- bias-pull-down;
- };
-
- clkreq-pins {
- pins = "gpio131";
- function = "pci_e1";
- drive-strength = <2>;
- bias-pull-up;
- };
-
- wake-pins {
- pins = "gpio132";
- function = "gpio";
- drive-strength = <2>;
- bias-pull-down;
- };
- };
-
- pcie1_state_off: pcie1-off-state {
- /* Perst is missing? */
- clkreq-pins {
- pins = "gpio131";
- function = "gpio";
- drive-strength = <2>;
- bias-disable;
- };
-
- wake-pins {
- pins = "gpio132";
- function = "gpio";
- drive-strength = <2>;
- bias-disable;
- };
- };
-
- pcie2_state_on: pcie2-on-state {
- perst-pins {
- pins = "gpio114";
- function = "gpio";
- drive-strength = <2>;
- bias-pull-down;
- };
-
- clkreq-pins {
- pins = "gpio115";
- function = "pci_e2";
- drive-strength = <2>;
- bias-pull-up;
- };
-
- wake-pins {
- pins = "gpio116";
- function = "gpio";
- drive-strength = <2>;
- bias-pull-down;
- };
- };
-
- pcie2_state_off: pcie2-off-state {
- /* Perst is missing? */
- clkreq-pins {
- pins = "gpio115";
- function = "gpio";
- drive-strength = <2>;
- bias-disable;
- };
-
- wake-pins {
- pins = "gpio116";
- function = "gpio";
- drive-strength = <2>;
- bias-disable;
- };
- };
-
- sdc1_state_on: sdc1-on-state {
- clk-pins {
- pins = "sdc1_clk";
- bias-disable;
- drive-strength = <16>;
- };
-
- cmd-pins {
- pins = "sdc1_cmd";
- bias-pull-up;
- drive-strength = <10>;
- };
-
- data-pins {
- pins = "sdc1_data";
- bias-pull-up;
- drive-strength = <10>;
- };
-
- rclk-pins {
- pins = "sdc1_rclk";
- bias-pull-down;
- };
- };
-
- sdc1_state_off: sdc1-off-state {
- clk-pins {
- pins = "sdc1_clk";
- bias-disable;
- drive-strength = <2>;
- };
-
- cmd-pins {
- pins = "sdc1_cmd";
- bias-pull-up;
- drive-strength = <2>;
- };
-
- data-pins {
- pins = "sdc1_data";
- bias-pull-up;
- drive-strength = <2>;
- };
-
- rclk-pins {
- pins = "sdc1_rclk";
- bias-pull-down;
- };
- };
-
- sdc2_state_on: sdc2-on-state {
- clk-pins {
- pins = "sdc2_clk";
- bias-disable;
- drive-strength = <16>;
- };
-
- cmd-pins {
- pins = "sdc2_cmd";
- bias-pull-up;
- drive-strength = <10>;
- };
-
- data-pins {
- pins = "sdc2_data";
- bias-pull-up;
- drive-strength = <10>;
- };
- };
-
- sdc2_state_off: sdc2-off-state {
- clk-pins {
- pins = "sdc2_clk";
- bias-disable;
- drive-strength = <2>;
- };
-
- cmd-pins {
- pins = "sdc2_cmd";
- bias-pull-up;
- drive-strength = <2>;
- };
-
- data-pins {
- pins = "sdc2_data";
- bias-pull-up;
- drive-strength = <2>;
- };
- };
- };
-
- sram@290000 {
- compatible = "qcom,rpm-stats";
- reg = <0x00290000 0x10000>;
- };
-
- spmi_bus: spmi@400f000 {
- compatible = "qcom,spmi-pmic-arb";
- reg = <0x0400f000 0x1000>,
- <0x04400000 0x800000>,
- <0x04c00000 0x800000>,
- <0x05800000 0x200000>,
- <0x0400a000 0x002100>;
- reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
- interrupt-names = "periph_irq";
- interrupts = <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>;
- qcom,ee = <0>;
- qcom,channel = <0>;
- #address-cells = <2>;
- #size-cells = <0>;
- interrupt-controller;
- #interrupt-cells = <4>;
- };
-
- bus@0 {
- power-domains = <&gcc AGGRE0_NOC_GDSC>;
- compatible = "simple-pm-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x0 0x0 0xffffffff>;
-
- pcie0: pcie@600000 {
- compatible = "qcom,pcie-msm8996";
- status = "disabled";
- power-domains = <&gcc PCIE0_GDSC>;
- bus-range = <0x00 0xff>;
- num-lanes = <1>;
-
- reg = <0x00600000 0x2000>,
- <0x0c000000 0xf1d>,
- <0x0c000f20 0xa8>,
- <0x0c100000 0x100000>;
- reg-names = "parf", "dbi", "elbi","config";
-
- phys = <&pciephy_0>;
- phy-names = "pciephy";
-
- #address-cells = <3>;
- #size-cells = <2>;
- ranges = <0x01000000 0x0 0x00000000 0x0c200000 0x0 0x100000>,
- <0x02000000 0x0 0x0c300000 0x0c300000 0x0 0xd00000>;
-
- device_type = "pci";
-
- interrupts = <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "msi";
- #interrupt-cells = <1>;
- interrupt-map-mask = <0 0 0 0x7>;
- interrupt-map = <0 0 0 1 &intc 0 244 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
- <0 0 0 2 &intc 0 245 IRQ_TYPE_LEVEL_HIGH>, /* int_b */
- <0 0 0 3 &intc 0 247 IRQ_TYPE_LEVEL_HIGH>, /* int_c */
- <0 0 0 4 &intc 0 248 IRQ_TYPE_LEVEL_HIGH>; /* int_d */
-
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&pcie0_state_on>;
- pinctrl-1 = <&pcie0_state_off>;
-
- linux,pci-domain = <0>;
-
- clocks = <&gcc GCC_PCIE_0_PIPE_CLK>,
- <&gcc GCC_PCIE_0_AUX_CLK>,
- <&gcc GCC_PCIE_0_CFG_AHB_CLK>,
- <&gcc GCC_PCIE_0_MSTR_AXI_CLK>,
- <&gcc GCC_PCIE_0_SLV_AXI_CLK>;
-
- clock-names = "pipe",
- "aux",
- "cfg",
- "bus_master",
- "bus_slave";
- };
-
- pcie1: pcie@608000 {
- compatible = "qcom,pcie-msm8996";
- power-domains = <&gcc PCIE1_GDSC>;
- bus-range = <0x00 0xff>;
- num-lanes = <1>;
-
- status = "disabled";
-
- reg = <0x00608000 0x2000>,
- <0x0d000000 0xf1d>,
- <0x0d000f20 0xa8>,
- <0x0d100000 0x100000>;
-
- reg-names = "parf", "dbi", "elbi","config";
-
- phys = <&pciephy_1>;
- phy-names = "pciephy";
-
- #address-cells = <3>;
- #size-cells = <2>;
- ranges = <0x01000000 0x0 0x00000000 0x0d200000 0x0 0x100000>,
- <0x02000000 0x0 0x0d300000 0x0d300000 0x0 0xd00000>;
-
- device_type = "pci";
-
- interrupts = <GIC_SPI 413 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "msi";
- #interrupt-cells = <1>;
- interrupt-map-mask = <0 0 0 0x7>;
- interrupt-map = <0 0 0 1 &intc 0 272 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
- <0 0 0 2 &intc 0 273 IRQ_TYPE_LEVEL_HIGH>, /* int_b */
- <0 0 0 3 &intc 0 274 IRQ_TYPE_LEVEL_HIGH>, /* int_c */
- <0 0 0 4 &intc 0 275 IRQ_TYPE_LEVEL_HIGH>; /* int_d */
-
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&pcie1_state_on>;
- pinctrl-1 = <&pcie1_state_off>;
-
- linux,pci-domain = <1>;
-
- clocks = <&gcc GCC_PCIE_1_PIPE_CLK>,
- <&gcc GCC_PCIE_1_AUX_CLK>,
- <&gcc GCC_PCIE_1_CFG_AHB_CLK>,
- <&gcc GCC_PCIE_1_MSTR_AXI_CLK>,
- <&gcc GCC_PCIE_1_SLV_AXI_CLK>;
-
- clock-names = "pipe",
- "aux",
- "cfg",
- "bus_master",
- "bus_slave";
- };
-
- pcie2: pcie@610000 {
- compatible = "qcom,pcie-msm8996";
- power-domains = <&gcc PCIE2_GDSC>;
- bus-range = <0x00 0xff>;
- num-lanes = <1>;
- status = "disabled";
- reg = <0x00610000 0x2000>,
- <0x0e000000 0xf1d>,
- <0x0e000f20 0xa8>,
- <0x0e100000 0x100000>;
-
- reg-names = "parf", "dbi", "elbi","config";
-
- phys = <&pciephy_2>;
- phy-names = "pciephy";
-
- #address-cells = <3>;
- #size-cells = <2>;
- ranges = <0x01000000 0x0 0x00000000 0x0e200000 0x0 0x100000>,
- <0x02000000 0x0 0x0e300000 0x0e300000 0x0 0x1d00000>;
-
- device_type = "pci";
-
- interrupts = <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "msi";
- #interrupt-cells = <1>;
- interrupt-map-mask = <0 0 0 0x7>;
- interrupt-map = <0 0 0 1 &intc 0 142 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
- <0 0 0 2 &intc 0 143 IRQ_TYPE_LEVEL_HIGH>, /* int_b */
- <0 0 0 3 &intc 0 144 IRQ_TYPE_LEVEL_HIGH>, /* int_c */
- <0 0 0 4 &intc 0 145 IRQ_TYPE_LEVEL_HIGH>; /* int_d */
-
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&pcie2_state_on>;
- pinctrl-1 = <&pcie2_state_off>;
-
- linux,pci-domain = <2>;
- clocks = <&gcc GCC_PCIE_2_PIPE_CLK>,
- <&gcc GCC_PCIE_2_AUX_CLK>,
- <&gcc GCC_PCIE_2_CFG_AHB_CLK>,
- <&gcc GCC_PCIE_2_MSTR_AXI_CLK>,
- <&gcc GCC_PCIE_2_SLV_AXI_CLK>;
-
- clock-names = "pipe",
- "aux",
- "cfg",
- "bus_master",
- "bus_slave";
- };
- };
-
- ufshc: ufshc@624000 {
- compatible = "qcom,msm8996-ufshc", "qcom,ufshc",
- "jedec,ufs-2.0";
- reg = <0x00624000 0x2500>;
- interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
-
- phys = <&ufsphy_lane>;
- phy-names = "ufsphy";
-
- power-domains = <&gcc UFS_GDSC>;
-
- clock-names =
- "core_clk_src",
- "core_clk",
- "bus_clk",
- "bus_aggr_clk",
- "iface_clk",
- "core_clk_unipro_src",
- "core_clk_unipro",
- "core_clk_ice",
- "ref_clk",
- "tx_lane0_sync_clk",
- "rx_lane0_sync_clk";
- clocks =
- <&gcc UFS_AXI_CLK_SRC>,
- <&gcc GCC_UFS_AXI_CLK>,
- <&gcc GCC_SYS_NOC_UFS_AXI_CLK>,
- <&gcc GCC_AGGRE2_UFS_AXI_CLK>,
- <&gcc GCC_UFS_AHB_CLK>,
- <&gcc UFS_ICE_CORE_CLK_SRC>,
- <&gcc GCC_UFS_UNIPRO_CORE_CLK>,
- <&gcc GCC_UFS_ICE_CORE_CLK>,
- <&rpmcc RPM_SMD_LN_BB_CLK>,
- <&gcc GCC_UFS_TX_SYMBOL_0_CLK>,
- <&gcc GCC_UFS_RX_SYMBOL_0_CLK>;
- freq-table-hz =
- <100000000 200000000>,
- <0 0>,
- <0 0>,
- <0 0>,
- <0 0>,
- <150000000 300000000>,
- <0 0>,
- <0 0>,
- <0 0>,
- <0 0>,
- <0 0>;
-
- interconnects = <&a2noc MASTER_UFS &bimc SLAVE_EBI_CH0>,
- <&bimc MASTER_AMPSS_M0 &cnoc SLAVE_UFS_CFG>;
- interconnect-names = "ufs-ddr", "cpu-ufs";
-
- lanes-per-direction = <1>;
- #reset-cells = <1>;
- status = "disabled";
- };
-
- ufsphy: phy@627000 {
- compatible = "qcom,msm8996-qmp-ufs-phy";
- reg = <0x00627000 0x1c4>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
-
- clocks = <&gcc GCC_UFS_CLKREF_CLK>;
- clock-names = "ref";
-
- resets = <&ufshc 0>;
- reset-names = "ufsphy";
- status = "disabled";
-
- ufsphy_lane: phy@627400 {
- reg = <0x627400 0x12c>,
- <0x627600 0x200>,
- <0x627c00 0x1b4>;
- #clock-cells = <1>;
- #phy-cells = <0>;
- };
- };
-
- camss: camss@a34000 {
- compatible = "qcom,msm8996-camss";
- reg = <0x00a34000 0x1000>,
- <0x00a00030 0x4>,
- <0x00a35000 0x1000>,
- <0x00a00038 0x4>,
- <0x00a36000 0x1000>,
- <0x00a00040 0x4>,
- <0x00a30000 0x100>,
- <0x00a30400 0x100>,
- <0x00a30800 0x100>,
- <0x00a30c00 0x100>,
- <0x00a31000 0x500>,
- <0x00a00020 0x10>,
- <0x00a10000 0x1000>,
- <0x00a14000 0x1000>;
- reg-names = "csiphy0",
- "csiphy0_clk_mux",
- "csiphy1",
- "csiphy1_clk_mux",
- "csiphy2",
- "csiphy2_clk_mux",
- "csid0",
- "csid1",
- "csid2",
- "csid3",
- "ispif",
- "csi_clk_mux",
- "vfe0",
- "vfe1";
- interrupts = <GIC_SPI 78 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 79 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 80 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 296 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 297 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 298 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 299 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 309 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 314 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 315 IRQ_TYPE_EDGE_RISING>;
- interrupt-names = "csiphy0",
- "csiphy1",
- "csiphy2",
- "csid0",
- "csid1",
- "csid2",
- "csid3",
- "ispif",
- "vfe0",
- "vfe1";
- power-domains = <&mmcc VFE0_GDSC>,
- <&mmcc VFE1_GDSC>;
- clocks = <&mmcc CAMSS_TOP_AHB_CLK>,
- <&mmcc CAMSS_ISPIF_AHB_CLK>,
- <&mmcc CAMSS_CSI0PHYTIMER_CLK>,
- <&mmcc CAMSS_CSI1PHYTIMER_CLK>,
- <&mmcc CAMSS_CSI2PHYTIMER_CLK>,
- <&mmcc CAMSS_CSI0_AHB_CLK>,
- <&mmcc CAMSS_CSI0_CLK>,
- <&mmcc CAMSS_CSI0PHY_CLK>,
- <&mmcc CAMSS_CSI0PIX_CLK>,
- <&mmcc CAMSS_CSI0RDI_CLK>,
- <&mmcc CAMSS_CSI1_AHB_CLK>,
- <&mmcc CAMSS_CSI1_CLK>,
- <&mmcc CAMSS_CSI1PHY_CLK>,
- <&mmcc CAMSS_CSI1PIX_CLK>,
- <&mmcc CAMSS_CSI1RDI_CLK>,
- <&mmcc CAMSS_CSI2_AHB_CLK>,
- <&mmcc CAMSS_CSI2_CLK>,
- <&mmcc CAMSS_CSI2PHY_CLK>,
- <&mmcc CAMSS_CSI2PIX_CLK>,
- <&mmcc CAMSS_CSI2RDI_CLK>,
- <&mmcc CAMSS_CSI3_AHB_CLK>,
- <&mmcc CAMSS_CSI3_CLK>,
- <&mmcc CAMSS_CSI3PHY_CLK>,
- <&mmcc CAMSS_CSI3PIX_CLK>,
- <&mmcc CAMSS_CSI3RDI_CLK>,
- <&mmcc CAMSS_AHB_CLK>,
- <&mmcc CAMSS_VFE0_CLK>,
- <&mmcc CAMSS_CSI_VFE0_CLK>,
- <&mmcc CAMSS_VFE0_AHB_CLK>,
- <&mmcc CAMSS_VFE0_STREAM_CLK>,
- <&mmcc CAMSS_VFE1_CLK>,
- <&mmcc CAMSS_CSI_VFE1_CLK>,
- <&mmcc CAMSS_VFE1_AHB_CLK>,
- <&mmcc CAMSS_VFE1_STREAM_CLK>,
- <&mmcc CAMSS_VFE_AHB_CLK>,
- <&mmcc CAMSS_VFE_AXI_CLK>;
- clock-names = "top_ahb",
- "ispif_ahb",
- "csiphy0_timer",
- "csiphy1_timer",
- "csiphy2_timer",
- "csi0_ahb",
- "csi0",
- "csi0_phy",
- "csi0_pix",
- "csi0_rdi",
- "csi1_ahb",
- "csi1",
- "csi1_phy",
- "csi1_pix",
- "csi1_rdi",
- "csi2_ahb",
- "csi2",
- "csi2_phy",
- "csi2_pix",
- "csi2_rdi",
- "csi3_ahb",
- "csi3",
- "csi3_phy",
- "csi3_pix",
- "csi3_rdi",
- "ahb",
- "vfe0",
- "csi_vfe0",
- "vfe0_ahb",
- "vfe0_stream",
- "vfe1",
- "csi_vfe1",
- "vfe1_ahb",
- "vfe1_stream",
- "vfe_ahb",
- "vfe_axi";
- iommus = <&vfe_smmu 0>,
- <&vfe_smmu 1>,
- <&vfe_smmu 2>,
- <&vfe_smmu 3>;
- status = "disabled";
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
- };
- };
-
- cci: cci@a0c000 {
- compatible = "qcom,msm8996-cci";
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0xa0c000 0x1000>;
- interrupts = <GIC_SPI 295 IRQ_TYPE_EDGE_RISING>;
- power-domains = <&mmcc CAMSS_GDSC>;
- clocks = <&mmcc CAMSS_TOP_AHB_CLK>,
- <&mmcc CAMSS_CCI_AHB_CLK>,
- <&mmcc CAMSS_CCI_CLK>,
- <&mmcc CAMSS_AHB_CLK>;
- clock-names = "camss_top_ahb",
- "cci_ahb",
- "cci",
- "camss_ahb";
- assigned-clocks = <&mmcc CAMSS_CCI_AHB_CLK>,
- <&mmcc CAMSS_CCI_CLK>;
- assigned-clock-rates = <80000000>, <37500000>;
- pinctrl-names = "default";
- pinctrl-0 = <&cci0_default &cci1_default>;
- status = "disabled";
-
- cci_i2c0: i2c-bus@0 {
- reg = <0>;
- clock-frequency = <400000>;
- #address-cells = <1>;
- #size-cells = <0>;
- };
-
- cci_i2c1: i2c-bus@1 {
- reg = <1>;
- clock-frequency = <400000>;
- #address-cells = <1>;
- #size-cells = <0>;
- };
- };
-
- adreno_smmu: iommu@b40000 {
- compatible = "qcom,msm8996-smmu-v2", "qcom,adreno-smmu", "qcom,smmu-v2";
- reg = <0x00b40000 0x10000>;
-
- #global-interrupts = <1>;
- interrupts = <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
-
- clocks = <&gcc GCC_MMSS_BIMC_GFX_CLK>,
- <&mmcc GPU_AHB_CLK>;
- clock-names = "bus", "iface";
-
- power-domains = <&mmcc GPU_GDSC>;
- };
-
- venus: video-codec@c00000 {
- compatible = "qcom,msm8996-venus";
- reg = <0x00c00000 0xff000>;
- interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
- power-domains = <&mmcc VENUS_GDSC>;
- clocks = <&mmcc VIDEO_CORE_CLK>,
- <&mmcc VIDEO_AHB_CLK>,
- <&mmcc VIDEO_AXI_CLK>,
- <&mmcc VIDEO_MAXI_CLK>;
- clock-names = "core", "iface", "bus", "mbus";
- interconnects = <&mnoc MASTER_VIDEO_P0 &bimc SLAVE_EBI_CH0>,
- <&bimc MASTER_AMPSS_M0 &mnoc SLAVE_VENUS_CFG>;
- interconnect-names = "video-mem", "cpu-cfg";
- iommus = <&venus_smmu 0x00>,
- <&venus_smmu 0x01>,
- <&venus_smmu 0x0a>,
- <&venus_smmu 0x07>,
- <&venus_smmu 0x0e>,
- <&venus_smmu 0x0f>,
- <&venus_smmu 0x08>,
- <&venus_smmu 0x09>,
- <&venus_smmu 0x0b>,
- <&venus_smmu 0x0c>,
- <&venus_smmu 0x0d>,
- <&venus_smmu 0x10>,
- <&venus_smmu 0x11>,
- <&venus_smmu 0x21>,
- <&venus_smmu 0x28>,
- <&venus_smmu 0x29>,
- <&venus_smmu 0x2b>,
- <&venus_smmu 0x2c>,
- <&venus_smmu 0x2d>,
- <&venus_smmu 0x31>;
- memory-region = <&venus_mem>;
- status = "disabled";
-
- video-decoder {
- compatible = "venus-decoder";
- clocks = <&mmcc VIDEO_SUBCORE0_CLK>;
- clock-names = "core";
- power-domains = <&mmcc VENUS_CORE0_GDSC>;
- };
-
- video-encoder {
- compatible = "venus-encoder";
- clocks = <&mmcc VIDEO_SUBCORE1_CLK>;
- clock-names = "core";
- power-domains = <&mmcc VENUS_CORE1_GDSC>;
- };
- };
-
- mdp_smmu: iommu@d00000 {
- compatible = "qcom,msm8996-smmu-v2", "qcom,smmu-v2";
- reg = <0x00d00000 0x10000>;
-
- #global-interrupts = <1>;
- interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- clocks = <&mmcc SMMU_MDP_AXI_CLK>,
- <&mmcc SMMU_MDP_AHB_CLK>;
- clock-names = "bus", "iface";
-
- power-domains = <&mmcc MDSS_GDSC>;
- };
-
- venus_smmu: iommu@d40000 {
- compatible = "qcom,msm8996-smmu-v2", "qcom,smmu-v2";
- reg = <0x00d40000 0x20000>;
- #global-interrupts = <1>;
- interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>;
- power-domains = <&mmcc MMAGIC_VIDEO_GDSC>;
- clocks = <&mmcc SMMU_VIDEO_AXI_CLK>,
- <&mmcc SMMU_VIDEO_AHB_CLK>;
- clock-names = "bus", "iface";
- #iommu-cells = <1>;
- status = "okay";
- };
-
- vfe_smmu: iommu@da0000 {
- compatible = "qcom,msm8996-smmu-v2", "qcom,smmu-v2";
- reg = <0x00da0000 0x10000>;
-
- #global-interrupts = <1>;
- interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>;
- power-domains = <&mmcc MMAGIC_CAMSS_GDSC>;
- clocks = <&mmcc SMMU_VFE_AXI_CLK>,
- <&mmcc SMMU_VFE_AHB_CLK>;
- clock-names = "bus", "iface";
- #iommu-cells = <1>;
- };
-
- lpass_q6_smmu: iommu@1600000 {
- compatible = "qcom,msm8996-smmu-v2", "qcom,smmu-v2";
- reg = <0x01600000 0x20000>;
- #iommu-cells = <1>;
- power-domains = <&gcc HLOS1_VOTE_LPASS_CORE_GDSC>;
-
- #global-interrupts = <1>;
- interrupts = <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 393 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 394 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>;
-
- clocks = <&gcc GCC_HLOS1_VOTE_LPASS_ADSP_SMMU_CLK>,
- <&gcc GCC_HLOS1_VOTE_LPASS_CORE_SMMU_CLK>;
- clock-names = "bus", "iface";
- };
-
- slpi_pil: remoteproc@1c00000 {
- compatible = "qcom,msm8996-slpi-pil";
- reg = <0x01c00000 0x4000>;
-
- interrupts-extended = <&intc 0 390 IRQ_TYPE_EDGE_RISING>,
- <&slpi_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
- <&slpi_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
- <&slpi_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
- <&slpi_smp2p_in 3 IRQ_TYPE_EDGE_RISING>;
- interrupt-names = "wdog",
- "fatal",
- "ready",
- "handover",
- "stop-ack";
-
- clocks = <&xo_board>,
- <&rpmcc RPM_SMD_AGGR2_NOC_CLK>;
- clock-names = "xo", "aggre2";
-
- memory-region = <&slpi_mem>;
-
- qcom,smem-states = <&slpi_smp2p_out 0>;
- qcom,smem-state-names = "stop";
-
- power-domains = <&rpmpd MSM8996_VDDSSCX>;
- power-domain-names = "ssc_cx";
-
- status = "disabled";
-
- smd-edge {
- interrupts = <GIC_SPI 176 IRQ_TYPE_EDGE_RISING>;
-
- label = "dsps";
- mboxes = <&apcs_glb 25>;
- qcom,smd-edge = <3>;
- qcom,remote-pid = <3>;
- };
- };
-
- mss_pil: remoteproc@2080000 {
- compatible = "qcom,msm8996-mss-pil";
- reg = <0x2080000 0x100>,
- <0x2180000 0x020>;
- reg-names = "qdsp6", "rmb";
-
- interrupts-extended = <&intc 0 448 IRQ_TYPE_EDGE_RISING>,
- <&mpss_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
- <&mpss_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
- <&mpss_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
- <&mpss_smp2p_in 3 IRQ_TYPE_EDGE_RISING>,
- <&mpss_smp2p_in 7 IRQ_TYPE_EDGE_RISING>;
- interrupt-names = "wdog", "fatal", "ready",
- "handover", "stop-ack",
- "shutdown-ack";
-
- clocks = <&gcc GCC_MSS_CFG_AHB_CLK>,
- <&gcc GCC_MSS_Q6_BIMC_AXI_CLK>,
- <&gcc GCC_BOOT_ROM_AHB_CLK>,
- <&xo_board>,
- <&gcc GCC_MSS_GPLL0_DIV_CLK>,
- <&gcc GCC_MSS_SNOC_AXI_CLK>,
- <&gcc GCC_MSS_MNOC_BIMC_AXI_CLK>,
- <&rpmcc RPM_SMD_PCNOC_CLK>,
- <&rpmcc RPM_SMD_QDSS_CLK>;
- clock-names = "iface", "bus", "mem", "xo", "gpll0_mss",
- "snoc_axi", "mnoc_axi", "pnoc", "qdss";
-
- resets = <&gcc GCC_MSS_RESTART>;
- reset-names = "mss_restart";
-
- power-domains = <&rpmpd MSM8996_VDDCX>,
- <&rpmpd MSM8996_VDDMX>;
- power-domain-names = "cx", "mx";
-
- qcom,smem-states = <&mpss_smp2p_out 0>;
- qcom,smem-state-names = "stop";
-
- qcom,halt-regs = <&tcsr_1 0x3000 0x5000 0x4000>;
-
- status = "disabled";
-
- mba {
- memory-region = <&mba_mem>;
- };
-
- mpss {
- memory-region = <&mpss_mem>;
- };
-
- metadata {
- memory-region = <&mdata_mem>;
- };
-
- smd-edge {
- interrupts = <GIC_SPI 449 IRQ_TYPE_EDGE_RISING>;
-
- label = "mpss";
- mboxes = <&apcs_glb 12>;
- qcom,smd-edge = <0>;
- qcom,remote-pid = <1>;
- };
- };
-
- stm@3002000 {
- compatible = "arm,coresight-stm", "arm,primecell";
- reg = <0x3002000 0x1000>,
- <0x8280000 0x180000>;
- reg-names = "stm-base", "stm-stimulus-base";
-
- clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
- clock-names = "apb_pclk", "atclk";
-
- out-ports {
- port {
- stm_out: endpoint {
- remote-endpoint =
- <&funnel0_in>;
- };
- };
- };
- };
-
- tpiu@3020000 {
- compatible = "arm,coresight-tpiu", "arm,primecell";
- reg = <0x3020000 0x1000>;
-
- clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
- clock-names = "apb_pclk", "atclk";
-
- in-ports {
- port {
- tpiu_in: endpoint {
- remote-endpoint =
- <&replicator_out1>;
- };
- };
- };
- };
-
- funnel@3021000 {
- compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
- reg = <0x3021000 0x1000>;
-
- clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
- clock-names = "apb_pclk", "atclk";
-
- in-ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@7 {
- reg = <7>;
- funnel0_in: endpoint {
- remote-endpoint =
- <&stm_out>;
- };
- };
- };
-
- out-ports {
- port {
- funnel0_out: endpoint {
- remote-endpoint =
- <&merge_funnel_in0>;
- };
- };
- };
- };
-
- funnel@3022000 {
- compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
- reg = <0x3022000 0x1000>;
-
- clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
- clock-names = "apb_pclk", "atclk";
-
- in-ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@6 {
- reg = <6>;
- funnel1_in: endpoint {
- remote-endpoint =
- <&apss_merge_funnel_out>;
- };
- };
- };
-
- out-ports {
- port {
- funnel1_out: endpoint {
- remote-endpoint =
- <&merge_funnel_in1>;
- };
- };
- };
- };
-
- funnel@3023000 {
- compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
- reg = <0x3023000 0x1000>;
-
- clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
- clock-names = "apb_pclk", "atclk";
-
-
- out-ports {
- port {
- funnel2_out: endpoint {
- remote-endpoint =
- <&merge_funnel_in2>;
- };
- };
- };
- };
-
- funnel@3025000 {
- compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
- reg = <0x3025000 0x1000>;
-
- clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
- clock-names = "apb_pclk", "atclk";
-
- in-ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
- merge_funnel_in0: endpoint {
- remote-endpoint =
- <&funnel0_out>;
- };
- };
-
- port@1 {
- reg = <1>;
- merge_funnel_in1: endpoint {
- remote-endpoint =
- <&funnel1_out>;
- };
- };
-
- port@2 {
- reg = <2>;
- merge_funnel_in2: endpoint {
- remote-endpoint =
- <&funnel2_out>;
- };
- };
- };
-
- out-ports {
- port {
- merge_funnel_out: endpoint {
- remote-endpoint =
- <&etf_in>;
- };
- };
- };
- };
-
- replicator@3026000 {
- compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
- reg = <0x3026000 0x1000>;
-
- clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
- clock-names = "apb_pclk", "atclk";
-
- in-ports {
- port {
- replicator_in: endpoint {
- remote-endpoint =
- <&etf_out>;
- };
- };
- };
-
- out-ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
- replicator_out0: endpoint {
- remote-endpoint =
- <&etr_in>;
- };
- };
-
- port@1 {
- reg = <1>;
- replicator_out1: endpoint {
- remote-endpoint =
- <&tpiu_in>;
- };
- };
- };
- };
-
- etf@3027000 {
- compatible = "arm,coresight-tmc", "arm,primecell";
- reg = <0x3027000 0x1000>;
-
- clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
- clock-names = "apb_pclk", "atclk";
-
- in-ports {
- port {
- etf_in: endpoint {
- remote-endpoint =
- <&merge_funnel_out>;
- };
- };
- };
-
- out-ports {
- port {
- etf_out: endpoint {
- remote-endpoint =
- <&replicator_in>;
- };
- };
- };
- };
-
- etr@3028000 {
- compatible = "arm,coresight-tmc", "arm,primecell";
- reg = <0x3028000 0x1000>;
-
- clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
- clock-names = "apb_pclk", "atclk";
- arm,scatter-gather;
-
- in-ports {
- port {
- etr_in: endpoint {
- remote-endpoint =
- <&replicator_out0>;
- };
- };
- };
- };
-
- debug@3810000 {
- compatible = "arm,coresight-cpu-debug", "arm,primecell";
- reg = <0x3810000 0x1000>;
-
- clocks = <&rpmcc RPM_QDSS_CLK>;
- clock-names = "apb_pclk";
-
- cpu = <&CPU0>;
- };
-
- etm@3840000 {
- compatible = "arm,coresight-etm4x", "arm,primecell";
- reg = <0x3840000 0x1000>;
-
- clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
- clock-names = "apb_pclk", "atclk";
-
- cpu = <&CPU0>;
-
- out-ports {
- port {
- etm0_out: endpoint {
- remote-endpoint =
- <&apss_funnel0_in0>;
- };
- };
- };
- };
-
- debug@3910000 {
- compatible = "arm,coresight-cpu-debug", "arm,primecell";
- reg = <0x3910000 0x1000>;
-
- clocks = <&rpmcc RPM_QDSS_CLK>;
- clock-names = "apb_pclk";
-
- cpu = <&CPU1>;
- };
-
- etm@3940000 {
- compatible = "arm,coresight-etm4x", "arm,primecell";
- reg = <0x3940000 0x1000>;
-
- clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
- clock-names = "apb_pclk", "atclk";
-
- cpu = <&CPU1>;
-
- out-ports {
- port {
- etm1_out: endpoint {
- remote-endpoint =
- <&apss_funnel0_in1>;
- };
- };
- };
- };
-
- funnel@39b0000 { /* APSS Funnel 0 */
- compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
- reg = <0x39b0000 0x1000>;
-
- clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
- clock-names = "apb_pclk", "atclk";
-
- in-ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
- apss_funnel0_in0: endpoint {
- remote-endpoint = <&etm0_out>;
- };
- };
-
- port@1 {
- reg = <1>;
- apss_funnel0_in1: endpoint {
- remote-endpoint = <&etm1_out>;
- };
- };
- };
-
- out-ports {
- port {
- apss_funnel0_out: endpoint {
- remote-endpoint =
- <&apss_merge_funnel_in0>;
- };
- };
- };
- };
-
- debug@3a10000 {
- compatible = "arm,coresight-cpu-debug", "arm,primecell";
- reg = <0x3a10000 0x1000>;
-
- clocks = <&rpmcc RPM_QDSS_CLK>;
- clock-names = "apb_pclk";
-
- cpu = <&CPU2>;
- };
-
- etm@3a40000 {
- compatible = "arm,coresight-etm4x", "arm,primecell";
- reg = <0x3a40000 0x1000>;
-
- clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
- clock-names = "apb_pclk", "atclk";
-
- cpu = <&CPU2>;
-
- out-ports {
- port {
- etm2_out: endpoint {
- remote-endpoint =
- <&apss_funnel1_in0>;
- };
- };
- };
- };
-
- debug@3b10000 {
- compatible = "arm,coresight-cpu-debug", "arm,primecell";
- reg = <0x3b10000 0x1000>;
-
- clocks = <&rpmcc RPM_QDSS_CLK>;
- clock-names = "apb_pclk";
-
- cpu = <&CPU3>;
- };
-
- etm@3b40000 {
- compatible = "arm,coresight-etm4x", "arm,primecell";
- reg = <0x3b40000 0x1000>;
-
- clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
- clock-names = "apb_pclk", "atclk";
-
- cpu = <&CPU3>;
-
- out-ports {
- port {
- etm3_out: endpoint {
- remote-endpoint =
- <&apss_funnel1_in1>;
- };
- };
- };
- };
-
- funnel@3bb0000 { /* APSS Funnel 1 */
- compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
- reg = <0x3bb0000 0x1000>;
-
- clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
- clock-names = "apb_pclk", "atclk";
-
- in-ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
- apss_funnel1_in0: endpoint {
- remote-endpoint = <&etm2_out>;
- };
- };
-
- port@1 {
- reg = <1>;
- apss_funnel1_in1: endpoint {
- remote-endpoint = <&etm3_out>;
- };
- };
- };
-
- out-ports {
- port {
- apss_funnel1_out: endpoint {
- remote-endpoint =
- <&apss_merge_funnel_in1>;
- };
- };
- };
- };
-
- funnel@3bc0000 {
- compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
- reg = <0x3bc0000 0x1000>;
-
- clocks = <&rpmcc RPM_QDSS_CLK>, <&rpmcc RPM_QDSS_A_CLK>;
- clock-names = "apb_pclk", "atclk";
-
- in-ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
- apss_merge_funnel_in0: endpoint {
- remote-endpoint =
- <&apss_funnel0_out>;
- };
- };
-
- port@1 {
- reg = <1>;
- apss_merge_funnel_in1: endpoint {
- remote-endpoint =
- <&apss_funnel1_out>;
- };
- };
- };
-
- out-ports {
- port {
- apss_merge_funnel_out: endpoint {
- remote-endpoint =
- <&funnel1_in>;
- };
- };
- };
- };
-
- kryocc: clock-controller@6400000 {
- compatible = "qcom,msm8996-apcc";
- reg = <0x06400000 0x90000>;
-
- clock-names = "xo", "sys_apcs_aux";
- clocks = <&rpmcc RPM_SMD_XO_A_CLK_SRC>, <&apcs_glb>;
-
- #clock-cells = <1>;
- };
-
- usb3: usb@6af8800 {
- compatible = "qcom,msm8996-dwc3", "qcom,dwc3";
- reg = <0x06af8800 0x400>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
-
- interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "hs_phy_irq", "ss_phy_irq";
-
- clocks = <&gcc GCC_SYS_NOC_USB3_AXI_CLK>,
- <&gcc GCC_USB30_MASTER_CLK>,
- <&gcc GCC_AGGRE2_USB3_AXI_CLK>,
- <&gcc GCC_USB30_SLEEP_CLK>,
- <&gcc GCC_USB30_MOCK_UTMI_CLK>;
- clock-names = "cfg_noc",
- "core",
- "iface",
- "sleep",
- "mock_utmi";
-
- assigned-clocks = <&gcc GCC_USB30_MOCK_UTMI_CLK>,
- <&gcc GCC_USB30_MASTER_CLK>;
- assigned-clock-rates = <19200000>, <120000000>;
-
- interconnects = <&a2noc MASTER_USB3 &bimc SLAVE_EBI_CH0>,
- <&bimc MASTER_AMPSS_M0 &snoc SLAVE_USB3>;
- interconnect-names = "usb-ddr", "apps-usb";
-
- power-domains = <&gcc USB30_GDSC>;
- status = "disabled";
-
- usb3_dwc3: usb@6a00000 {
- compatible = "snps,dwc3";
- reg = <0x06a00000 0xcc00>;
- interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
- phys = <&hsusb_phy1>, <&ssusb_phy_0>;
- phy-names = "usb2-phy", "usb3-phy";
- snps,hird-threshold = /bits/ 8 <0>;
- snps,dis_u2_susphy_quirk;
- snps,dis_enblslpm_quirk;
- snps,is-utmi-l1-suspend;
- tx-fifo-resize;
- };
- };
-
- usb3phy: phy@7410000 {
- compatible = "qcom,msm8996-qmp-usb3-phy";
- reg = <0x07410000 0x1c4>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
-
- clocks = <&gcc GCC_USB3_PHY_AUX_CLK>,
- <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
- <&gcc GCC_USB3_CLKREF_CLK>;
- clock-names = "aux", "cfg_ahb", "ref";
-
- resets = <&gcc GCC_USB3_PHY_BCR>,
- <&gcc GCC_USB3PHY_PHY_BCR>;
- reset-names = "phy", "common";
- status = "disabled";
-
- ssusb_phy_0: phy@7410200 {
- reg = <0x07410200 0x200>,
- <0x07410400 0x130>,
- <0x07410600 0x1a8>;
- #phy-cells = <0>;
-
- #clock-cells = <0>;
- clock-output-names = "usb3_phy_pipe_clk_src";
- clocks = <&gcc GCC_USB3_PHY_PIPE_CLK>;
- clock-names = "pipe0";
- };
- };
-
- hsusb_phy1: phy@7411000 {
- compatible = "qcom,msm8996-qusb2-phy";
- reg = <0x07411000 0x180>;
- #phy-cells = <0>;
-
- clocks = <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
- <&gcc GCC_RX1_USB2_CLKREF_CLK>;
- clock-names = "cfg_ahb", "ref";
-
- resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>;
- nvmem-cells = <&qusb2p_hstx_trim>;
- status = "disabled";
- };
-
- hsusb_phy2: phy@7412000 {
- compatible = "qcom,msm8996-qusb2-phy";
- reg = <0x07412000 0x180>;
- #phy-cells = <0>;
-
- clocks = <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
- <&gcc GCC_RX2_USB2_CLKREF_CLK>;
- clock-names = "cfg_ahb", "ref";
-
- resets = <&gcc GCC_QUSB2PHY_SEC_BCR>;
- nvmem-cells = <&qusb2s_hstx_trim>;
- status = "disabled";
- };
-
- sdhc1: mmc@7464900 {
- compatible = "qcom,msm8996-sdhci", "qcom,sdhci-msm-v4";
- reg = <0x07464900 0x11c>, <0x07464000 0x800>;
- reg-names = "hc", "core";
-
- interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "hc_irq", "pwr_irq";
-
- clock-names = "iface", "core", "xo";
- clocks = <&gcc GCC_SDCC1_AHB_CLK>,
- <&gcc GCC_SDCC1_APPS_CLK>,
- <&rpmcc RPM_SMD_XO_CLK_SRC>;
- resets = <&gcc GCC_SDCC1_BCR>;
-
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&sdc1_state_on>;
- pinctrl-1 = <&sdc1_state_off>;
-
- bus-width = <8>;
- non-removable;
- status = "disabled";
- };
-
- sdhc2: mmc@74a4900 {
- compatible = "qcom,msm8996-sdhci", "qcom,sdhci-msm-v4";
- reg = <0x074a4900 0x314>, <0x074a4000 0x800>;
- reg-names = "hc", "core";
-
- interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "hc_irq", "pwr_irq";
-
- clock-names = "iface", "core", "xo";
- clocks = <&gcc GCC_SDCC2_AHB_CLK>,
- <&gcc GCC_SDCC2_APPS_CLK>,
- <&rpmcc RPM_SMD_XO_CLK_SRC>;
- resets = <&gcc GCC_SDCC2_BCR>;
-
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&sdc2_state_on>;
- pinctrl-1 = <&sdc2_state_off>;
-
- bus-width = <4>;
- status = "disabled";
- };
-
- blsp1_dma: dma-controller@7544000 {
- compatible = "qcom,bam-v1.7.0";
- reg = <0x07544000 0x2b000>;
- interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&gcc GCC_BLSP1_AHB_CLK>;
- clock-names = "bam_clk";
- qcom,controlled-remotely;
- #dma-cells = <1>;
- qcom,ee = <0>;
- };
-
- blsp1_uart2: serial@7570000 {
- compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
- reg = <0x07570000 0x1000>;
- interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>,
- <&gcc GCC_BLSP1_AHB_CLK>;
- clock-names = "core", "iface";
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&blsp1_uart2_default>;
- pinctrl-1 = <&blsp1_uart2_sleep>;
- dmas = <&blsp1_dma 2>, <&blsp1_dma 3>;
- dma-names = "tx", "rx";
- status = "disabled";
- };
-
- blsp1_spi1: spi@7575000 {
- compatible = "qcom,spi-qup-v2.2.1";
- reg = <0x07575000 0x600>;
- interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&gcc GCC_BLSP1_QUP1_SPI_APPS_CLK>,
- <&gcc GCC_BLSP1_AHB_CLK>;
- clock-names = "core", "iface";
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&blsp1_spi1_default>;
- pinctrl-1 = <&blsp1_spi1_sleep>;
- dmas = <&blsp1_dma 12>, <&blsp1_dma 13>;
- dma-names = "tx", "rx";
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- blsp1_i2c3: i2c@7577000 {
- compatible = "qcom,i2c-qup-v2.2.1";
- reg = <0x07577000 0x1000>;
- interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&gcc GCC_BLSP1_QUP3_I2C_APPS_CLK>,
- <&gcc GCC_BLSP1_AHB_CLK>;
- clock-names = "core", "iface";
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&blsp1_i2c3_default>;
- pinctrl-1 = <&blsp1_i2c3_sleep>;
- dmas = <&blsp1_dma 16>, <&blsp1_dma 17>;
- dma-names = "tx", "rx";
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- blsp1_i2c6: i2c@757a000 {
- compatible = "qcom,i2c-qup-v2.2.1";
- reg = <0x757a000 0x1000>;
- interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&gcc GCC_BLSP1_QUP6_I2C_APPS_CLK>,
- <&gcc GCC_BLSP1_AHB_CLK>;
- clock-names = "core", "iface";
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&blsp1_i2c6_default>;
- pinctrl-1 = <&blsp1_i2c6_sleep>;
- dmas = <&blsp1_dma 22>, <&blsp1_dma 23>;
- dma-names = "tx", "rx";
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- blsp2_dma: dma-controller@7584000 {
- compatible = "qcom,bam-v1.7.0";
- reg = <0x07584000 0x2b000>;
- interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&gcc GCC_BLSP2_AHB_CLK>;
- clock-names = "bam_clk";
- qcom,controlled-remotely;
- #dma-cells = <1>;
- qcom,ee = <0>;
- };
-
- blsp2_uart2: serial@75b0000 {
- compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
- reg = <0x075b0000 0x1000>;
- interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&gcc GCC_BLSP2_UART2_APPS_CLK>,
- <&gcc GCC_BLSP2_AHB_CLK>;
- clock-names = "core", "iface";
- status = "disabled";
- };
-
- blsp2_uart3: serial@75b1000 {
- compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
- reg = <0x075b1000 0x1000>;
- interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&gcc GCC_BLSP2_UART3_APPS_CLK>,
- <&gcc GCC_BLSP2_AHB_CLK>;
- clock-names = "core", "iface";
- status = "disabled";
- };
-
- blsp2_i2c1: i2c@75b5000 {
- compatible = "qcom,i2c-qup-v2.2.1";
- reg = <0x075b5000 0x1000>;
- interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&gcc GCC_BLSP2_QUP1_I2C_APPS_CLK>,
- <&gcc GCC_BLSP2_AHB_CLK>;
- clock-names = "core", "iface";
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&blsp2_i2c1_default>;
- pinctrl-1 = <&blsp2_i2c1_sleep>;
- dmas = <&blsp2_dma 12>, <&blsp2_dma 13>;
- dma-names = "tx", "rx";
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- blsp2_i2c2: i2c@75b6000 {
- compatible = "qcom,i2c-qup-v2.2.1";
- reg = <0x075b6000 0x1000>;
- interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&gcc GCC_BLSP2_QUP2_I2C_APPS_CLK>,
- <&gcc GCC_BLSP2_AHB_CLK>;
- clock-names = "core", "iface";
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&blsp2_i2c2_default>;
- pinctrl-1 = <&blsp2_i2c2_sleep>;
- dmas = <&blsp2_dma 14>, <&blsp2_dma 15>;
- dma-names = "tx", "rx";
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- blsp2_i2c3: i2c@75b7000 {
- compatible = "qcom,i2c-qup-v2.2.1";
- reg = <0x075b7000 0x1000>;
- interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&gcc GCC_BLSP2_QUP3_I2C_APPS_CLK>,
- <&gcc GCC_BLSP2_AHB_CLK>;
- clock-names = "core", "iface";
- clock-frequency = <400000>;
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&blsp2_i2c3_default>;
- pinctrl-1 = <&blsp2_i2c3_sleep>;
- dmas = <&blsp2_dma 16>, <&blsp2_dma 17>;
- dma-names = "tx", "rx";
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- blsp2_i2c5: i2c@75b9000 {
- compatible = "qcom,i2c-qup-v2.2.1";
- reg = <0x75b9000 0x1000>;
- interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&gcc GCC_BLSP2_QUP5_I2C_APPS_CLK>,
- <&gcc GCC_BLSP2_AHB_CLK>;
- clock-names = "core", "iface";
- pinctrl-names = "default";
- pinctrl-0 = <&blsp2_i2c5_default>;
- dmas = <&blsp2_dma 20>, <&blsp2_dma 21>;
- dma-names = "tx", "rx";
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- blsp2_i2c6: i2c@75ba000 {
- compatible = "qcom,i2c-qup-v2.2.1";
- reg = <0x75ba000 0x1000>;
- interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&gcc GCC_BLSP2_QUP6_I2C_APPS_CLK>,
- <&gcc GCC_BLSP2_AHB_CLK>;
- clock-names = "core", "iface";
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&blsp2_i2c6_default>;
- pinctrl-1 = <&blsp2_i2c6_sleep>;
- dmas = <&blsp2_dma 22>, <&blsp2_dma 23>;
- dma-names = "tx", "rx";
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- blsp2_spi6: spi@75ba000 {
- compatible = "qcom,spi-qup-v2.2.1";
- reg = <0x075ba000 0x600>;
- interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&gcc GCC_BLSP2_QUP6_SPI_APPS_CLK>,
- <&gcc GCC_BLSP2_AHB_CLK>;
- clock-names = "core", "iface";
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&blsp2_spi6_default>;
- pinctrl-1 = <&blsp2_spi6_sleep>;
- dmas = <&blsp2_dma 22>, <&blsp2_dma 23>;
- dma-names = "tx", "rx";
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- usb2: usb@76f8800 {
- compatible = "qcom,msm8996-dwc3", "qcom,dwc3";
- reg = <0x076f8800 0x400>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
-
- interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "hs_phy_irq";
-
- clocks = <&gcc GCC_PERIPH_NOC_USB20_AHB_CLK>,
- <&gcc GCC_USB20_MASTER_CLK>,
- <&gcc GCC_USB20_MOCK_UTMI_CLK>,
- <&gcc GCC_USB20_SLEEP_CLK>,
- <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>;
- clock-names = "cfg_noc",
- "core",
- "iface",
- "sleep",
- "mock_utmi";
-
- assigned-clocks = <&gcc GCC_USB20_MOCK_UTMI_CLK>,
- <&gcc GCC_USB20_MASTER_CLK>;
- assigned-clock-rates = <19200000>, <60000000>;
-
- power-domains = <&gcc USB30_GDSC>;
- qcom,select-utmi-as-pipe-clk;
- status = "disabled";
-
- usb2_dwc3: usb@7600000 {
- compatible = "snps,dwc3";
- reg = <0x07600000 0xcc00>;
- interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
- phys = <&hsusb_phy2>;
- phy-names = "usb2-phy";
- maximum-speed = "high-speed";
- snps,dis_u2_susphy_quirk;
- snps,dis_enblslpm_quirk;
- };
- };
-
- slimbam: dma-controller@9184000 {
- compatible = "qcom,bam-v1.7.0";
- qcom,controlled-remotely;
- reg = <0x09184000 0x32000>;
- num-channels = <31>;
- interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
- #dma-cells = <1>;
- qcom,ee = <1>;
- qcom,num-ees = <2>;
- };
-
- slim_msm: slim-ngd@91c0000 {
- compatible = "qcom,slim-ngd-v1.5.0";
- reg = <0x091c0000 0x2c000>;
- interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&slimbam 3>, <&slimbam 4>;
- dma-names = "rx", "tx";
- #address-cells = <1>;
- #size-cells = <0>;
-
- status = "disabled";
- };
-
- adsp_pil: remoteproc@9300000 {
- compatible = "qcom,msm8996-adsp-pil";
- reg = <0x09300000 0x80000>;
-
- interrupts-extended = <&intc 0 162 IRQ_TYPE_EDGE_RISING>,
- <&adsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
- <&adsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
- <&adsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
- <&adsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>;
- interrupt-names = "wdog", "fatal", "ready",
- "handover", "stop-ack";
-
- clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>;
- clock-names = "xo";
-
- memory-region = <&adsp_mem>;
-
- qcom,smem-states = <&adsp_smp2p_out 0>;
- qcom,smem-state-names = "stop";
-
- power-domains = <&rpmpd MSM8996_VDDCX>;
- power-domain-names = "cx";
-
- status = "disabled";
-
- smd-edge {
- interrupts = <GIC_SPI 156 IRQ_TYPE_EDGE_RISING>;
-
- label = "lpass";
- mboxes = <&apcs_glb 8>;
- qcom,smd-edge = <1>;
- qcom,remote-pid = <2>;
-
- apr {
- power-domains = <&gcc HLOS1_VOTE_LPASS_ADSP_GDSC>;
- compatible = "qcom,apr-v2";
- qcom,smd-channels = "apr_audio_svc";
- qcom,domain = <APR_DOMAIN_ADSP>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- service@3 {
- reg = <APR_SVC_ADSP_CORE>;
- compatible = "qcom,q6core";
- };
-
- q6afe: service@4 {
- compatible = "qcom,q6afe";
- reg = <APR_SVC_AFE>;
- q6afedai: dais {
- compatible = "qcom,q6afe-dais";
- #address-cells = <1>;
- #size-cells = <0>;
- #sound-dai-cells = <1>;
- dai@1 {
- reg = <1>;
- };
- };
- };
-
- q6asm: service@7 {
- compatible = "qcom,q6asm";
- reg = <APR_SVC_ASM>;
- q6asmdai: dais {
- compatible = "qcom,q6asm-dais";
- #address-cells = <1>;
- #size-cells = <0>;
- #sound-dai-cells = <1>;
- iommus = <&lpass_q6_smmu 1>;
- };
- };
-
- q6adm: service@8 {
- compatible = "qcom,q6adm";
- reg = <APR_SVC_ADM>;
- q6routing: routing {
- compatible = "qcom,q6adm-routing";
- #sound-dai-cells = <0>;
- };
- };
- };
- };
- };
-
- apcs_glb: mailbox@9820000 {
- compatible = "qcom,msm8996-apcs-hmss-global";
- reg = <0x09820000 0x1000>;
-
- #mbox-cells = <1>;
- #clock-cells = <0>;
- };
-
- timer@9840000 {
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
- compatible = "arm,armv7-timer-mem";
- reg = <0x09840000 0x1000>;
- clock-frequency = <19200000>;
-
- frame@9850000 {
- frame-number = <0>;
- interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
- reg = <0x09850000 0x1000>,
- <0x09860000 0x1000>;
- };
-
- frame@9870000 {
- frame-number = <1>;
- interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
- reg = <0x09870000 0x1000>;
- status = "disabled";
- };
-
- frame@9880000 {
- frame-number = <2>;
- interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
- reg = <0x09880000 0x1000>;
- status = "disabled";
- };
-
- frame@9890000 {
- frame-number = <3>;
- interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
- reg = <0x09890000 0x1000>;
- status = "disabled";
- };
-
- frame@98a0000 {
- frame-number = <4>;
- interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
- reg = <0x098a0000 0x1000>;
- status = "disabled";
- };
-
- frame@98b0000 {
- frame-number = <5>;
- interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
- reg = <0x098b0000 0x1000>;
- status = "disabled";
- };
-
- frame@98c0000 {
- frame-number = <6>;
- interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
- reg = <0x098c0000 0x1000>;
- status = "disabled";
- };
- };
-
- saw3: syscon@9a10000 {
- compatible = "syscon";
- reg = <0x09a10000 0x1000>;
- };
-
- cbf: clock-controller@9a11000 {
- compatible = "qcom,msm8996-cbf";
- reg = <0x09a11000 0x10000>;
- clocks = <&rpmcc RPM_SMD_XO_A_CLK_SRC>, <&apcs_glb>;
- #clock-cells = <0>;
- #interconnect-cells = <1>;
- };
-
- intc: interrupt-controller@9bc0000 {
- compatible = "qcom,msm8996-gic-v3", "arm,gic-v3";
- #interrupt-cells = <3>;
- interrupt-controller;
- #redistributor-regions = <1>;
- redistributor-stride = <0x0 0x40000>;
- reg = <0x09bc0000 0x10000>,
- <0x09c00000 0x100000>;
- interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
- };
- };
-
- sound: sound {
- };
-
- thermal-zones {
- cpu0-thermal {
- polling-delay-passive = <250>;
- polling-delay = <1000>;
-
- thermal-sensors = <&tsens0 3>;
-
- trips {
- cpu0_alert0: trip-point0 {
- temperature = <75000>;
- hysteresis = <2000>;
- type = "passive";
- };
-
- cpu0_crit: cpu-crit {
- temperature = <110000>;
- hysteresis = <2000>;
- type = "critical";
- };
- };
- };
-
- cpu1-thermal {
- polling-delay-passive = <250>;
- polling-delay = <1000>;
-
- thermal-sensors = <&tsens0 5>;
-
- trips {
- cpu1_alert0: trip-point0 {
- temperature = <75000>;
- hysteresis = <2000>;
- type = "passive";
- };
-
- cpu1_crit: cpu-crit {
- temperature = <110000>;
- hysteresis = <2000>;
- type = "critical";
- };
- };
- };
-
- cpu2-thermal {
- polling-delay-passive = <250>;
- polling-delay = <1000>;
-
- thermal-sensors = <&tsens0 8>;
-
- trips {
- cpu2_alert0: trip-point0 {
- temperature = <75000>;
- hysteresis = <2000>;
- type = "passive";
- };
-
- cpu2_crit: cpu-crit {
- temperature = <110000>;
- hysteresis = <2000>;
- type = "critical";
- };
- };
- };
-
- cpu3-thermal {
- polling-delay-passive = <250>;
- polling-delay = <1000>;
-
- thermal-sensors = <&tsens0 10>;
-
- trips {
- cpu3_alert0: trip-point0 {
- temperature = <75000>;
- hysteresis = <2000>;
- type = "passive";
- };
-
- cpu3_crit: cpu-crit {
- temperature = <110000>;
- hysteresis = <2000>;
- type = "critical";
- };
- };
- };
-
- gpu-top-thermal {
- polling-delay-passive = <250>;
- polling-delay = <1000>;
-
- thermal-sensors = <&tsens1 6>;
-
- trips {
- gpu1_alert0: trip-point0 {
- temperature = <90000>;
- hysteresis = <2000>;
- type = "passive";
- };
- };
-
- cooling-maps {
- map0 {
- trip = <&gpu1_alert0>;
- cooling-device = <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- };
- };
- };
-
- gpu-bottom-thermal {
- polling-delay-passive = <250>;
- polling-delay = <1000>;
-
- thermal-sensors = <&tsens1 7>;
-
- trips {
- gpu2_alert0: trip-point0 {
- temperature = <90000>;
- hysteresis = <2000>;
- type = "passive";
- };
- };
-
- cooling-maps {
- map0 {
- trip = <&gpu2_alert0>;
- cooling-device = <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- };
- };
- };
-
- m4m-thermal {
- polling-delay-passive = <250>;
- polling-delay = <1000>;
-
- thermal-sensors = <&tsens0 1>;
-
- trips {
- m4m_alert0: trip-point0 {
- temperature = <90000>;
- hysteresis = <2000>;
- type = "hot";
- };
- };
- };
-
- l3-or-venus-thermal {
- polling-delay-passive = <250>;
- polling-delay = <1000>;
-
- thermal-sensors = <&tsens0 2>;
-
- trips {
- l3_or_venus_alert0: trip-point0 {
- temperature = <90000>;
- hysteresis = <2000>;
- type = "hot";
- };
- };
- };
-
- cluster0-l2-thermal {
- polling-delay-passive = <250>;
- polling-delay = <1000>;
-
- thermal-sensors = <&tsens0 7>;
-
- trips {
- cluster0_l2_alert0: trip-point0 {
- temperature = <90000>;
- hysteresis = <2000>;
- type = "hot";
- };
- };
- };
-
- cluster1-l2-thermal {
- polling-delay-passive = <250>;
- polling-delay = <1000>;
-
- thermal-sensors = <&tsens0 12>;
-
- trips {
- cluster1_l2_alert0: trip-point0 {
- temperature = <90000>;
- hysteresis = <2000>;
- type = "hot";
- };
- };
- };
-
- camera-thermal {
- polling-delay-passive = <250>;
- polling-delay = <1000>;
-
- thermal-sensors = <&tsens1 1>;
-
- trips {
- camera_alert0: trip-point0 {
- temperature = <90000>;
- hysteresis = <2000>;
- type = "hot";
- };
- };
- };
-
- q6-dsp-thermal {
- polling-delay-passive = <250>;
- polling-delay = <1000>;
-
- thermal-sensors = <&tsens1 2>;
-
- trips {
- q6_dsp_alert0: trip-point0 {
- temperature = <90000>;
- hysteresis = <2000>;
- type = "hot";
- };
- };
- };
-
- mem-thermal {
- polling-delay-passive = <250>;
- polling-delay = <1000>;
-
- thermal-sensors = <&tsens1 3>;
-
- trips {
- mem_alert0: trip-point0 {
- temperature = <90000>;
- hysteresis = <2000>;
- type = "hot";
- };
- };
- };
-
- modemtx-thermal {
- polling-delay-passive = <250>;
- polling-delay = <1000>;
-
- thermal-sensors = <&tsens1 4>;
-
- trips {
- modemtx_alert0: trip-point0 {
- temperature = <90000>;
- hysteresis = <2000>;
- type = "hot";
- };
- };
- };
- };
-
- timer {
- compatible = "arm,armv8-timer";
- interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
- <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
- <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
- <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
- };
-};
diff --git a/arch/arm/dts/pm8916.dtsi b/arch/arm/dts/pm8916.dtsi
deleted file mode 100644
index f4de867..0000000
--- a/arch/arm/dts/pm8916.dtsi
+++ /dev/null
@@ -1,178 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-#include <dt-bindings/iio/qcom,spmi-vadc.h>
-#include <dt-bindings/input/linux-event-codes.h>
-#include <dt-bindings/interrupt-controller/irq.h>
-#include <dt-bindings/spmi/spmi.h>
-
-&spmi_bus {
-
- pm8916_0: pmic@0 {
- compatible = "qcom,pm8916", "qcom,spmi-pmic";
- reg = <0x0 SPMI_USID>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- pon@800 {
- compatible = "qcom,pm8916-pon";
- reg = <0x800>;
- mode-bootloader = <0x2>;
- mode-recovery = <0x1>;
-
- pwrkey {
- compatible = "qcom,pm8941-pwrkey";
- interrupts = <0x0 0x8 0 IRQ_TYPE_EDGE_BOTH>;
- debounce = <15625>;
- bias-pull-up;
- linux,code = <KEY_POWER>;
- };
-
- pm8916_resin: resin {
- compatible = "qcom,pm8941-resin";
- interrupts = <0x0 0x8 1 IRQ_TYPE_EDGE_BOTH>;
- debounce = <15625>;
- bias-pull-up;
- status = "disabled";
- };
-
- watchdog {
- compatible = "qcom,pm8916-wdt";
- interrupts = <0x0 0x8 6 IRQ_TYPE_EDGE_RISING>;
- timeout-sec = <60>;
- };
- };
-
- pm8916_usbin: usb-detect@1300 {
- compatible = "qcom,pm8941-misc";
- reg = <0x1300>;
- interrupts = <0x0 0x13 1 IRQ_TYPE_EDGE_BOTH>;
- interrupt-names = "usb_vbus";
- status = "disabled";
- };
-
- pm8916_temp: temp-alarm@2400 {
- compatible = "qcom,spmi-temp-alarm";
- reg = <0x2400>;
- interrupts = <0 0x24 0 IRQ_TYPE_EDGE_RISING>;
- io-channels = <&pm8916_vadc VADC_DIE_TEMP>;
- io-channel-names = "thermal";
- #thermal-sensor-cells = <0>;
- };
-
- pm8916_vadc: adc@3100 {
- compatible = "qcom,spmi-vadc";
- reg = <0x3100>;
- interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
- #address-cells = <1>;
- #size-cells = <0>;
- #io-channel-cells = <1>;
-
- channel@0 {
- reg = <VADC_USBIN>;
- qcom,pre-scaling = <1 10>;
- };
- channel@7 {
- reg = <VADC_VSYS>;
- qcom,pre-scaling = <1 3>;
- };
- channel@8 {
- reg = <VADC_DIE_TEMP>;
- };
- channel@9 {
- reg = <VADC_REF_625MV>;
- };
- channel@a {
- reg = <VADC_REF_1250MV>;
- };
- channel@e {
- reg = <VADC_GND_REF>;
- };
- channel@f {
- reg = <VADC_VDD_VADC>;
- };
- };
-
- rtc@6000 {
- compatible = "qcom,pm8941-rtc";
- reg = <0x6000>, <0x6100>;
- reg-names = "rtc", "alarm";
- interrupts = <0x0 0x61 0x1 IRQ_TYPE_EDGE_RISING>;
- };
-
- pm8916_mpps: mpps@a000 {
- compatible = "qcom,pm8916-mpp", "qcom,spmi-mpp";
- reg = <0xa000>;
- gpio-controller;
- #gpio-cells = <2>;
- gpio-ranges = <&pm8916_mpps 0 0 4>;
- interrupt-controller;
- #interrupt-cells = <2>;
- };
-
- pm8916_gpios: gpio@c000 {
- compatible = "qcom,pm8916-gpio", "qcom,spmi-gpio";
- reg = <0xc000>;
- gpio-controller;
- gpio-ranges = <&pm8916_gpios 0 0 4>;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- };
- };
-
- pm8916_1: pmic@1 {
- compatible = "qcom,pm8916", "qcom,spmi-pmic";
- reg = <0x1 SPMI_USID>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- pm8916_pwm: pwm {
- compatible = "qcom,pm8916-pwm";
-
- #pwm-cells = <2>;
-
- status = "disabled";
- };
-
- pm8916_vib: vibrator@c000 {
- compatible = "qcom,pm8916-vib";
- reg = <0xc000>;
- status = "disabled";
- };
-
- pm8916_codec: audio-codec@f000 {
- compatible = "qcom,pm8916-wcd-analog-codec";
- reg = <0xf000>;
- interrupt-parent = <&spmi_bus>;
- interrupts = <0x1 0xf0 0x0 IRQ_TYPE_NONE>,
- <0x1 0xf0 0x1 IRQ_TYPE_NONE>,
- <0x1 0xf0 0x2 IRQ_TYPE_NONE>,
- <0x1 0xf0 0x3 IRQ_TYPE_NONE>,
- <0x1 0xf0 0x4 IRQ_TYPE_NONE>,
- <0x1 0xf0 0x5 IRQ_TYPE_NONE>,
- <0x1 0xf0 0x6 IRQ_TYPE_NONE>,
- <0x1 0xf0 0x7 IRQ_TYPE_NONE>,
- <0x1 0xf1 0x0 IRQ_TYPE_NONE>,
- <0x1 0xf1 0x1 IRQ_TYPE_NONE>,
- <0x1 0xf1 0x2 IRQ_TYPE_NONE>,
- <0x1 0xf1 0x3 IRQ_TYPE_NONE>,
- <0x1 0xf1 0x4 IRQ_TYPE_NONE>,
- <0x1 0xf1 0x5 IRQ_TYPE_NONE>;
- interrupt-names = "cdc_spk_cnp_int",
- "cdc_spk_clip_int",
- "cdc_spk_ocp_int",
- "mbhc_ins_rem_det1",
- "mbhc_but_rel_det",
- "mbhc_but_press_det",
- "mbhc_ins_rem_det",
- "mbhc_switch_int",
- "cdc_ear_ocp_int",
- "cdc_hphr_ocp_int",
- "cdc_hphl_ocp_det",
- "cdc_ear_cnp_int",
- "cdc_hphr_cnp_int",
- "cdc_hphl_cnp_int";
- #sound-dai-cells = <1>;
- status = "disabled";
- };
- };
-};
diff --git a/arch/arm/dts/pm8994.dtsi b/arch/arm/dts/pm8994.dtsi
deleted file mode 100644
index d44a95c..0000000
--- a/arch/arm/dts/pm8994.dtsi
+++ /dev/null
@@ -1,152 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-#include <dt-bindings/iio/qcom,spmi-vadc.h>
-#include <dt-bindings/input/linux-event-codes.h>
-#include <dt-bindings/interrupt-controller/irq.h>
-#include <dt-bindings/spmi/spmi.h>
-
-/ {
- thermal-zones {
- pm8994-thermal {
- polling-delay-passive = <250>;
- polling-delay = <1000>;
-
- thermal-sensors = <&pm8994_temp>;
-
- trips {
- pm8994_alert0: pm8994-alert0 {
- temperature = <95000>;
- hysteresis = <2000>;
- type = "passive";
- };
- pm8994_crit: pm8994-crit {
- temperature = <125000>;
- hysteresis = <2000>;
- type = "critical";
- };
- };
- };
- };
-};
-
-&spmi_bus {
-
- pmic@0 {
- compatible = "qcom,pm8994", "qcom,spmi-pmic";
- reg = <0x0 SPMI_USID>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- rtc@6000 {
- compatible = "qcom,pm8941-rtc";
- reg = <0x6000>, <0x6100>;
- reg-names = "rtc", "alarm";
- interrupts = <0x0 0x61 0x1 IRQ_TYPE_EDGE_RISING>;
- };
-
- pm8994_pon: pon@800 {
- compatible = "qcom,pm8916-pon";
- reg = <0x800>;
- mode-bootloader = <0x2>;
- mode-recovery = <0x1>;
-
- pwrkey {
- compatible = "qcom,pm8941-pwrkey";
- interrupts = <0x0 0x8 0 IRQ_TYPE_EDGE_BOTH>;
- debounce = <15625>;
- bias-pull-up;
- linux,code = <KEY_POWER>;
- };
-
- pm8994_resin: resin {
- compatible = "qcom,pm8941-resin";
- interrupts = <0x0 0x8 1 IRQ_TYPE_EDGE_BOTH>;
- debounce = <15625>;
- bias-pull-up;
- status = "disabled";
- };
- };
-
- pm8994_temp: temp-alarm@2400 {
- compatible = "qcom,spmi-temp-alarm";
- reg = <0x2400>;
- interrupts = <0x0 0x24 0x0 IRQ_TYPE_EDGE_RISING>;
- io-channels = <&pm8994_vadc VADC_DIE_TEMP>;
- io-channel-names = "thermal";
- #thermal-sensor-cells = <0>;
- };
-
- pm8994_vadc: adc@3100 {
- compatible = "qcom,spmi-vadc";
- reg = <0x3100>;
- interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
- #address-cells = <1>;
- #size-cells = <0>;
- #io-channel-cells = <1>;
-
- channel@7 {
- reg = <VADC_VSYS>;
- qcom,pre-scaling = <1 3>;
- label = "vph_pwr";
- };
- channel@8 {
- reg = <VADC_DIE_TEMP>;
- label = "die_temp";
- };
- channel@9 {
- reg = <VADC_REF_625MV>;
- label = "ref_625mv";
- };
- channel@a {
- reg = <VADC_REF_1250MV>;
- label = "ref_1250mv";
- };
- channel@e {
- reg = <VADC_GND_REF>;
- };
- channel@f {
- reg = <VADC_VDD_VADC>;
- };
- };
-
- pm8994_gpios: gpio@c000 {
- compatible = "qcom,pm8994-gpio", "qcom,spmi-gpio";
- reg = <0xc000>;
- gpio-controller;
- gpio-ranges = <&pm8994_gpios 0 0 22>;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- };
-
- pm8994_mpps: mpps@a000 {
- compatible = "qcom,pm8994-mpp", "qcom,spmi-mpp";
- reg = <0xa000>;
- gpio-controller;
- #gpio-cells = <2>;
- gpio-ranges = <&pm8994_mpps 0 0 8>;
- interrupt-controller;
- #interrupt-cells = <2>;
- };
- };
-
- pmic@1 {
- compatible = "qcom,pm8994", "qcom,spmi-pmic";
- reg = <0x1 SPMI_USID>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- pm8994_lpg: pwm {
- compatible = "qcom,pm8994-lpg";
-
- #address-cells = <1>;
- #size-cells = <0>;
- #pwm-cells = <2>;
-
- status = "disabled";
- };
-
- pm8994_spmi_regulators: regulators {
- compatible = "qcom,pm8994-regulators";
- };
- };
-};
diff --git a/arch/arm/dts/pm8998.dtsi b/arch/arm/dts/pm8998.dtsi
deleted file mode 100644
index 3f82715..0000000
--- a/arch/arm/dts/pm8998.dtsi
+++ /dev/null
@@ -1,130 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/* Copyright 2018 Google LLC. */
-
-#include <dt-bindings/iio/qcom,spmi-vadc.h>
-#include <dt-bindings/input/linux-event-codes.h>
-#include <dt-bindings/interrupt-controller/irq.h>
-#include <dt-bindings/spmi/spmi.h>
-#include <dt-bindings/thermal/thermal.h>
-
-/ {
- thermal-zones {
- pm8998-thermal {
- polling-delay-passive = <250>;
- polling-delay = <1000>;
-
- thermal-sensors = <&pm8998_temp>;
-
- trips {
- pm8998_alert0: pm8998-alert0 {
- temperature = <105000>;
- hysteresis = <2000>;
- type = "passive";
- };
- pm8998_crit: pm8998-crit {
- temperature = <125000>;
- hysteresis = <2000>;
- type = "critical";
- };
- };
- };
- };
-};
-
-&spmi_bus {
- pm8998_lsid0: pmic@0 {
- compatible = "qcom,pm8998", "qcom,spmi-pmic";
- reg = <0x0 SPMI_USID>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- pm8998_pon: pon@800 {
- compatible = "qcom,pm8998-pon";
-
- reg = <0x800>;
- mode-bootloader = <0x2>;
- mode-recovery = <0x1>;
-
- pm8998_pwrkey: pwrkey {
- compatible = "qcom,pm8941-pwrkey";
- interrupts = <0x0 0x8 0 IRQ_TYPE_EDGE_BOTH>;
- debounce = <15625>;
- bias-pull-up;
- linux,code = <KEY_POWER>;
- };
-
- pm8998_resin: resin {
- compatible = "qcom,pm8941-resin";
- interrupts = <0x0 0x8 1 IRQ_TYPE_EDGE_BOTH>;
- debounce = <15625>;
- bias-pull-up;
- status = "disabled";
- };
- };
-
- pm8998_temp: temp-alarm@2400 {
- compatible = "qcom,spmi-temp-alarm";
- reg = <0x2400>;
- interrupts = <0x0 0x24 0x0 IRQ_TYPE_EDGE_RISING>;
- io-channels = <&pm8998_adc ADC5_DIE_TEMP>;
- io-channel-names = "thermal";
- #thermal-sensor-cells = <0>;
- };
-
- pm8998_coincell: charger@2800 {
- compatible = "qcom,pm8998-coincell", "qcom,pm8941-coincell";
- reg = <0x2800>;
-
- status = "disabled";
- };
-
- pm8998_adc: adc@3100 {
- compatible = "qcom,spmi-adc-rev2";
- reg = <0x3100>;
- interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
- #address-cells = <1>;
- #size-cells = <0>;
- #io-channel-cells = <1>;
-
- channel@6 {
- reg = <ADC5_DIE_TEMP>;
- label = "die_temp";
- };
- };
-
- pm8998_adc_tm: adc-tm@3400 {
- compatible = "qcom,spmi-adc-tm-hc";
- reg = <0x3400>;
- interrupts = <0x0 0x34 0x0 IRQ_TYPE_EDGE_RISING>;
- #thermal-sensor-cells = <1>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- rtc@6000 {
- compatible = "qcom,pm8941-rtc";
- reg = <0x6000>, <0x6100>;
- reg-names = "rtc", "alarm";
- interrupts = <0x0 0x61 0x1 IRQ_TYPE_EDGE_RISING>;
- };
-
- pm8998_gpios: gpio@c000 {
- compatible = "qcom,pm8998-gpio", "qcom,spmi-gpio";
- reg = <0xc000>;
- gpio-controller;
- gpio-ranges = <&pm8998_gpios 0 0 26>;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- };
-
- };
-
- pm8998_lsid1: pmic@1 {
- compatible = "qcom,pm8998", "qcom,spmi-pmic";
- reg = <0x1 SPMI_USID>;
- #address-cells = <1>;
- #size-cells = <0>;
- };
-};
diff --git a/arch/arm/dts/pmi8994.dtsi b/arch/arm/dts/pmi8994.dtsi
deleted file mode 100644
index 36d6a1f..0000000
--- a/arch/arm/dts/pmi8994.dtsi
+++ /dev/null
@@ -1,65 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-#include <dt-bindings/interrupt-controller/irq.h>
-#include <dt-bindings/spmi/spmi.h>
-
-&spmi_bus {
-
- pmic@2 {
- compatible = "qcom,pmi8994", "qcom,spmi-pmic";
- reg = <0x2 SPMI_USID>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- pmi8994_gpios: gpio@c000 {
- compatible = "qcom,pmi8994-gpio", "qcom,spmi-gpio";
- reg = <0xc000>;
- gpio-controller;
- gpio-ranges = <&pmi8994_gpios 0 0 10>;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- };
-
- pmi8994_mpps: mpps@a000 {
- compatible = "qcom,pmi8994-mpp", "qcom,spmi-mpp";
- reg = <0xa000>;
- gpio-controller;
- gpio-ranges = <&pmi8994_mpps 0 0 4>;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- };
- };
-
- pmic@3 {
- compatible = "qcom,pmi8994", "qcom,spmi-pmic";
- reg = <0x3 SPMI_USID>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- pmi8994_lpg: pwm {
- compatible = "qcom,pmi8994-lpg";
-
- #address-cells = <1>;
- #size-cells = <0>;
- #pwm-cells = <2>;
-
- status = "disabled";
- };
-
- pmi8994_spmi_regulators: regulators {
- compatible = "qcom,pmi8994-regulators";
- };
-
- pmi8994_wled: wled@d800 {
- compatible = "qcom,pmi8994-wled";
- reg = <0xd800>, <0xd900>;
- interrupts = <0x3 0xd8 0x1 IRQ_TYPE_EDGE_RISING>,
- <0x3 0xd8 0x2 IRQ_TYPE_EDGE_RISING>;
- interrupt-names = "ovp", "short";
- qcom,cabc;
- qcom,external-pfet;
- status = "disabled";
- };
- };
-};
diff --git a/arch/arm/dts/pmi8998.dtsi b/arch/arm/dts/pmi8998.dtsi
deleted file mode 100644
index cd3f079..0000000
--- a/arch/arm/dts/pmi8998.dtsi
+++ /dev/null
@@ -1,98 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-#include <dt-bindings/interrupt-controller/irq.h>
-#include <dt-bindings/spmi/spmi.h>
-
-&spmi_bus {
- pmi8998_lsid0: pmic@2 {
- compatible = "qcom,pmi8998", "qcom,spmi-pmic";
- reg = <0x2 SPMI_USID>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- pmi8998_charger: charger@1000 {
- compatible = "qcom,pmi8998-charger";
- reg = <0x1000>;
-
- interrupts = <0x2 0x13 0x4 IRQ_TYPE_EDGE_BOTH>,
- <0x2 0x12 0x2 IRQ_TYPE_EDGE_BOTH>,
- <0x2 0x16 0x1 IRQ_TYPE_EDGE_RISING>,
- <0x2 0x13 0x6 IRQ_TYPE_EDGE_RISING>;
- interrupt-names = "usb-plugin",
- "bat-ov",
- "wdog-bark",
- "usbin-icl-change";
-
- io-channels = <&pmi8998_rradc 3>,
- <&pmi8998_rradc 4>;
- io-channel-names = "usbin_i", "usbin_v";
-
- status = "disabled";
- };
-
- pmi8998_gpios: gpio@c000 {
- compatible = "qcom,pmi8998-gpio", "qcom,spmi-gpio";
- reg = <0xc000>;
- gpio-controller;
- gpio-ranges = <&pmi8998_gpios 0 0 14>;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- };
-
- pmi8998_rradc: adc@4500 {
- compatible = "qcom,pmi8998-rradc";
- reg = <0x4500>;
- #io-channel-cells = <1>;
- };
- };
-
- pmi8998_lsid1: pmic@3 {
- compatible = "qcom,pmi8998", "qcom,spmi-pmic";
- reg = <0x3 SPMI_USID>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- labibb {
- compatible = "qcom,pmi8998-lab-ibb";
-
- ibb: ibb {
- interrupts = <0x3 0xdc 0x2 IRQ_TYPE_EDGE_RISING>,
- <0x3 0xdc 0x0 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "sc-err", "ocp";
- };
-
- lab: lab {
- interrupts = <0x3 0xde 0x1 IRQ_TYPE_EDGE_RISING>,
- <0x3 0xde 0x0 IRQ_TYPE_LEVEL_LOW>;
- interrupt-names = "sc-err", "ocp";
- };
- };
-
- pmi8998_lpg: pwm {
- compatible = "qcom,pmi8998-lpg";
-
- #address-cells = <1>;
- #size-cells = <0>;
- #pwm-cells = <2>;
-
- status = "disabled";
- };
-
- pmi8998_flash: led-controller@d300 {
- compatible = "qcom,pmi8998-flash-led", "qcom,spmi-flash-led";
- reg = <0xd300>;
- status = "disabled";
- };
-
- pmi8998_wled: leds@d800 {
- compatible = "qcom,pmi8998-wled";
- reg = <0xd800>, <0xd900>;
- interrupts = <0x3 0xd8 0x1 IRQ_TYPE_EDGE_RISING>,
- <0x3 0xd8 0x2 IRQ_TYPE_EDGE_RISING>;
- interrupt-names = "ovp", "short";
- label = "backlight";
-
- status = "disabled";
- };
- };
-};
diff --git a/arch/arm/dts/pms405.dtsi b/arch/arm/dts/pms405.dtsi
deleted file mode 100644
index 461ad97..0000000
--- a/arch/arm/dts/pms405.dtsi
+++ /dev/null
@@ -1,149 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Copyright (c) 2018, Linaro Limited
- */
-
-#include <dt-bindings/spmi/spmi.h>
-#include <dt-bindings/input/linux-event-codes.h>
-#include <dt-bindings/iio/qcom,spmi-vadc.h>
-#include <dt-bindings/thermal/thermal.h>
-
-/ {
- thermal-zones {
- pms405-thermal {
- polling-delay-passive = <250>;
- polling-delay = <1000>;
-
- thermal-sensors = <&pms405_temp>;
-
- trips {
- pms405_alert0: pms405-alert0 {
- temperature = <105000>;
- hysteresis = <2000>;
- type = "passive";
- };
- pms405_crit: pms405-crit {
- temperature = <125000>;
- hysteresis = <2000>;
- type = "critical";
- };
- };
- };
- };
-};
-
-&spmi_bus {
- pms405_0: pms405@0 {
- compatible = "qcom,pms405", "qcom,spmi-pmic";
- reg = <0x0 SPMI_USID>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- pms405_gpios: gpio@c000 {
- compatible = "qcom,pms405-gpio", "qcom,spmi-gpio";
- reg = <0xc000>;
- gpio-controller;
- gpio-ranges = <&pms405_gpios 0 0 12>;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- };
-
- pon@800 {
- compatible = "qcom,pms405-pon";
- reg = <0x0800>;
- mode-bootloader = <0x2>;
- mode-recovery = <0x1>;
-
- pwrkey {
- compatible = "qcom,pm8941-pwrkey";
- interrupts = <0x0 0x8 0 IRQ_TYPE_EDGE_BOTH>;
- debounce = <15625>;
- bias-pull-up;
- linux,code = <KEY_POWER>;
- };
- };
-
- pms405_temp: temp-alarm@2400 {
- compatible = "qcom,spmi-temp-alarm";
- reg = <0x2400>;
- interrupts = <0 0x24 0 IRQ_TYPE_EDGE_RISING>;
- io-channels = <&pms405_adc ADC5_DIE_TEMP>;
- io-channel-names = "thermal";
- #thermal-sensor-cells = <0>;
- };
-
- pms405_adc: adc@3100 {
- compatible = "qcom,pms405-adc", "qcom,spmi-adc-rev2";
- reg = <0x3100>;
- interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
- #address-cells = <1>;
- #size-cells = <0>;
- #io-channel-cells = <1>;
-
- channel@0 {
- reg = <ADC5_REF_GND>;
- qcom,pre-scaling = <1 1>;
- label = "ref_gnd";
- };
-
- channel@1 {
- reg = <ADC5_1P25VREF>;
- qcom,pre-scaling = <1 1>;
- label = "vref_1p25";
- };
-
- channel@131 {
- reg = <ADC5_VPH_PWR>;
- qcom,pre-scaling = <1 3>;
- label = "vph_pwr";
- };
-
- channel@6 {
- reg = <ADC5_DIE_TEMP>;
- qcom,pre-scaling = <1 1>;
- label = "die_temp";
- };
-
- channel@77 {
- reg = <ADC5_AMUX_THM1_100K_PU>;
- qcom,ratiometric;
- qcom,hw-settle-time = <200>;
- qcom,pre-scaling = <1 1>;
- label = "pa_therm1";
- };
-
- channel@79 {
- reg = <ADC5_AMUX_THM3_100K_PU>;
- qcom,ratiometric;
- qcom,hw-settle-time = <200>;
- qcom,pre-scaling = <1 1>;
- label = "pa_therm3";
- };
-
- channel@76 {
- reg = <ADC5_XO_THERM_100K_PU>;
- qcom,ratiometric;
- qcom,hw-settle-time = <200>;
- qcom,pre-scaling = <1 1>;
- label = "xo_therm";
- };
- };
-
- rtc@6000 {
- compatible = "qcom,pm8941-rtc";
- reg = <0x6000>, <0x6100>;
- reg-names = "rtc", "alarm";
- interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>;
- };
- };
-
- pms405_1: pms405@1 {
- compatible = "qcom,pms405", "qcom,spmi-pmic";
- reg = <0x1 SPMI_USID>;
-
- pms405_spmi_regulators: regulators {
- compatible = "qcom,pms405-regulators";
- };
- };
-};
diff --git a/arch/arm/dts/qcs404-evb-4000.dts b/arch/arm/dts/qcs404-evb-4000.dts
deleted file mode 100644
index 358827c..0000000
--- a/arch/arm/dts/qcs404-evb-4000.dts
+++ /dev/null
@@ -1,96 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Copyright (c) 2018, Linaro Limited
- */
-
-/dts-v1/;
-
-#include <dt-bindings/gpio/gpio.h>
-#include "qcs404-evb.dtsi"
-
-/ {
- model = "Qualcomm Technologies, Inc. QCS404 EVB 4000";
- compatible = "qcom,qcs404-evb-4000", "qcom,qcs404-evb",
- "qcom,qcs404";
-};
-
-ðernet {
- status = "okay";
-
- snps,reset-gpio = <&tlmm 60 GPIO_ACTIVE_LOW>;
- snps,reset-active-low;
- snps,reset-delays-us = <0 10000 10000>;
-
- pinctrl-names = "default";
- pinctrl-0 = <ðernet_defaults>;
-
- phy-handle = <&phy1>;
- phy-mode = "rgmii";
- mdio {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "snps,dwmac-mdio";
- phy1: phy@4 {
- compatible = "ethernet-phy-ieee802.3-c22";
- device_type = "ethernet-phy";
- reg = <0x4>;
- };
- };
-};
-
-&tlmm {
- ethernet_defaults: ethernet-defaults-state {
- int-pins {
- pins = "gpio61";
- function = "rgmii_int";
- bias-disable;
- drive-strength = <2>;
- };
- mdc-pins {
- pins = "gpio76";
- function = "rgmii_mdc";
- bias-pull-up;
- };
- mdio-pins {
- pins = "gpio75";
- function = "rgmii_mdio";
- bias-pull-up;
- };
- tx-pins {
- pins = "gpio67", "gpio66", "gpio65", "gpio64";
- function = "rgmii_tx";
- bias-pull-up;
- drive-strength = <16>;
- };
- rx-pins {
- pins = "gpio73", "gpio72", "gpio71", "gpio70";
- function = "rgmii_rx";
- bias-disable;
- drive-strength = <2>;
- };
- tx-ctl-pins {
- pins = "gpio68";
- function = "rgmii_ctl";
- bias-pull-up;
- drive-strength = <16>;
- };
- rx-ctl-pins {
- pins = "gpio74";
- function = "rgmii_ctl";
- bias-disable;
- drive-strength = <2>;
- };
- tx-ck-pins {
- pins = "gpio63";
- function = "rgmii_ck";
- bias-pull-up;
- drive-strength = <16>;
- };
- rx-ck-pins {
- pins = "gpio69";
- function = "rgmii_ck";
- bias-disable;
- drive-strength = <2>;
- };
- };
-};
diff --git a/arch/arm/dts/qcs404-evb.dtsi b/arch/arm/dts/qcs404-evb.dtsi
deleted file mode 100644
index 1065540..0000000
--- a/arch/arm/dts/qcs404-evb.dtsi
+++ /dev/null
@@ -1,389 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Copyright (c) 2018, Linaro Limited
- */
-
-#include <dt-bindings/gpio/gpio.h>
-#include "qcs404.dtsi"
-#include "pms405.dtsi"
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
-
-/ {
- aliases {
- serial0 = &blsp1_uart2;
- serial1 = &blsp1_uart3;
- };
-
- chosen {
- stdout-path = "serial0";
- };
-
- vph_pwr: vph-pwr-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vph_pwr";
- regulator-always-on;
- regulator-boot-on;
- };
-
- vdd_ch0_3p3:
- vdd_esmps3_3p3: vdd-esmps3-3p3-regulator {
- compatible = "regulator-fixed";
- regulator-name = "eSMPS3_3P3";
-
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-always-on;
- };
-
- usb3_vbus_reg: regulator-usb3-vbus {
- compatible = "regulator-fixed";
- regulator-name = "VBUS_BOOST_5V";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- gpio = <&pms405_gpios 3 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&usb_vbus_boost_pin>;
- vin-supply = <&vph_pwr>;
- enable-active-high;
-
- /* TODO: Drop this when introducing role switching */
- regulator-always-on;
- };
-};
-
-&blsp1_uart3 {
- status = "okay";
-
- bluetooth {
- compatible = "qcom,wcn3990-bt";
- vddio-supply = <&vreg_l6_1p8>;
- vddxo-supply = <&vreg_l5_1p8>;
- vddrf-supply = <&vreg_l1_1p3>;
- vddch0-supply = <&vdd_ch0_3p3>;
-
- local-bd-address = [ 02 00 00 00 5a ad ];
-
- max-speed = <3200000>;
- };
-};
-
-&blsp1_dma {
- qcom,controlled-remotely;
-};
-
-&blsp2_dma {
- qcom,controlled-remotely;
-};
-
-&gcc {
- protected-clocks = <GCC_BIMC_CDSP_CLK>,
- <GCC_CDSP_CFG_AHB_CLK>,
- <GCC_CDSP_BIMC_CLK_SRC>,
- <GCC_CDSP_TBU_CLK>,
- <141>, /* GCC_WCSS_Q6_AHB_CLK */
- <142>; /* GCC_WCSS_Q6_AXIM_CLK */
-};
-
-&pms405_spmi_regulators {
- vdd_s3-supply = <&vph_pwr>;
-
- pms405_s3: s3 {
- regulator-always-on;
- regulator-boot-on;
- regulator-name = "vdd_apc";
- regulator-initial-mode = <1>;
- regulator-min-microvolt = <1048000>;
- regulator-max-microvolt = <1384000>;
- };
-};
-
-&pcie {
- status = "okay";
-
- perst-gpios = <&tlmm 43 GPIO_ACTIVE_LOW>;
-
- pinctrl-names = "default";
- pinctrl-0 = <&perst_state>;
-};
-
-&pcie_phy {
- status = "okay";
-
- vdda-vp-supply = <&vreg_l3_1p05>;
- vdda-vph-supply = <&vreg_l5_1p8>;
-};
-
-&remoteproc_adsp {
- status = "okay";
-};
-
-&remoteproc_cdsp {
- status = "okay";
-};
-
-&remoteproc_wcss {
- status = "okay";
-};
-
-&rpm_requests {
- regulators {
- compatible = "qcom,rpm-pms405-regulators";
-
- vdd_s1-supply = <&vph_pwr>;
- vdd_s2-supply = <&vph_pwr>;
- vdd_s3-supply = <&vph_pwr>;
- vdd_s4-supply = <&vph_pwr>;
- vdd_s5-supply = <&vph_pwr>;
- vdd_l1_l2-supply = <&vreg_s5_1p35>;
- vdd_l3_l8-supply = <&vreg_s5_1p35>;
- vdd_l4-supply = <&vreg_s5_1p35>;
- vdd_l5_l6-supply = <&vreg_s4_1p8>;
- vdd_l7-supply = <&vph_pwr>;
- vdd_l9-supply = <&vreg_s5_1p35>;
- vdd_l10_l11_l12_l13-supply = <&vph_pwr>;
-
- vreg_s4_1p8: s4 {
- regulator-min-microvolt = <1728000>;
- regulator-max-microvolt = <1920000>;
- };
-
- vreg_s5_1p35: s5 {
- regulator-min-microvolt = <1352000>;
- regulator-max-microvolt = <1352000>;
- };
-
- vreg_l1_1p3: l1 {
- regulator-min-microvolt = <1240000>;
- regulator-max-microvolt = <1352000>;
- };
-
- vreg_l2_1p275: l2 {
- regulator-min-microvolt = <1048000>;
- regulator-max-microvolt = <1280000>;
- };
-
- vreg_l3_1p05: l3 {
- regulator-min-microvolt = <1048000>;
- regulator-max-microvolt = <1160000>;
- };
-
- vreg_l4_1p2: l4 {
- regulator-min-microvolt = <1144000>;
- regulator-max-microvolt = <1256000>;
- };
-
- vreg_l5_1p8: l5 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- };
-
- vreg_l6_1p8: l6 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-always-on;
- };
-
- vreg_l7_1p8: l7 {
- regulator-min-microvolt = <1616000>;
- regulator-max-microvolt = <3000000>;
- };
-
- vreg_l8_1p2: l8 {
- regulator-min-microvolt = <1136000>;
- regulator-max-microvolt = <1352000>;
- };
-
- vreg_l10_3p3: l10 {
- regulator-min-microvolt = <2936000>;
- regulator-max-microvolt = <3088000>;
- };
-
- vreg_l11_sdc2: l11 {
- regulator-min-microvolt = <2696000>;
- regulator-max-microvolt = <3304000>;
- };
-
- vreg_l12_3p3: l12 {
- regulator-min-microvolt = <3050000>;
- regulator-max-microvolt = <3300000>;
- };
-
- vreg_l13_3p3: l13 {
- regulator-min-microvolt = <3000000>;
- regulator-max-microvolt = <3300000>;
- };
- };
-};
-
-&sdcc1 {
- status = "okay";
-
- supports-cqe;
- mmc-ddr-1_8v;
- mmc-hs400-1_8v;
- bus-width = <8>;
- non-removable;
-
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&sdc1_on>;
- pinctrl-1 = <&sdc1_off>;
-};
-
-&tlmm {
- perst_state: perst-state {
- pins = "gpio43";
- function = "gpio";
-
- drive-strength = <2>;
- bias-disable;
- output-low;
- };
-
- sdc1_on: sdc1-on-state {
- clk-pins {
- pins = "sdc1_clk";
- bias-disable;
- drive-strength = <16>;
- };
-
- cmd-pins {
- pins = "sdc1_cmd";
- bias-pull-up;
- drive-strength = <10>;
- };
-
- data-pins {
- pins = "sdc1_data";
- bias-pull-up;
- drive-strength = <10>;
- };
-
- rclk-pins {
- pins = "sdc1_rclk";
- bias-pull-down;
- };
- };
-
- sdc1_off: sdc1-off-state {
- clk-pins {
- pins = "sdc1_clk";
- bias-disable;
- drive-strength = <2>;
- };
-
- cmd-pins {
- pins = "sdc1_cmd";
- bias-pull-up;
- drive-strength = <2>;
- };
-
- data-pins {
- pins = "sdc1_data";
- bias-pull-up;
- drive-strength = <2>;
- };
-
- rclk-pins {
- pins = "sdc1_rclk";
- bias-pull-down;
- };
- };
-
- usb3_id_pin: usb3-id-state {
- pins = "gpio116";
- function = "gpio";
-
- drive-strength = <2>;
- bias-pull-up;
- };
-};
-
-&pms405_gpios {
- usb_vbus_boost_pin: usb-vbus-boost-state {
- pinconf {
- pins = "gpio3";
- function = PMIC_GPIO_FUNC_NORMAL;
- output-low;
- power-source = <1>;
- };
- };
- usb3_vbus_pin: usb3-vbus-state {
- pinconf {
- pins = "gpio12";
- function = PMIC_GPIO_FUNC_NORMAL;
- input-enable;
- bias-pull-down;
- power-source = <1>;
- };
- };
-};
-
-&usb2 {
- status = "okay";
-};
-
-&usb2_phy_sec {
- vdd-supply = <&vreg_l4_1p2>;
- vdda1p8-supply = <&vreg_l5_1p8>;
- vdda3p3-supply = <&vreg_l12_3p3>;
- status = "okay";
-};
-
-&usb3 {
- status = "okay";
-
-};
-
-&usb3_dwc3 {
- dr_mode = "host";
-};
-
-&usb2_phy_prim {
- vdd-supply = <&vreg_l4_1p2>;
- vdda1p8-supply = <&vreg_l5_1p8>;
- vdda3p3-supply = <&vreg_l12_3p3>;
- status = "okay";
-};
-
-&usb3_phy {
- vdd-supply = <&vreg_l3_1p05>;
- vdda1p8-supply = <&vreg_l5_1p8>;
- status = "okay";
-};
-
-&wifi {
- status = "okay";
- vdd-0.8-cx-mx-supply = <&vreg_l2_1p275>;
- vdd-1.8-xo-supply = <&vreg_l5_1p8>;
- vdd-1.3-rfa-supply = <&vreg_l1_1p3>;
-};
-
-/* PINCTRL - additions to nodes defined in qcs404.dtsi */
-
-&blsp1_uart2_default {
- rx-pins {
- drive-strength = <2>;
- bias-disable;
- };
-
- tx-pins {
- drive-strength = <2>;
- bias-disable;
- };
-};
-
-&blsp1_uart3_default {
- cts-pins {
- bias-disable;
- };
-
- rts-tx-pins {
- drive-strength = <2>;
- bias-disable;
- };
-
- rx-pins {
- bias-pull-up;
- };
-};
diff --git a/arch/arm/dts/qcs404.dtsi b/arch/arm/dts/qcs404.dtsi
deleted file mode 100644
index 2721f32..0000000
--- a/arch/arm/dts/qcs404.dtsi
+++ /dev/null
@@ -1,1829 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Copyright (c) 2018, Linaro Limited
- */
-
-#include <dt-bindings/interrupt-controller/arm-gic.h>
-#include <dt-bindings/clock/qcom,gcc-qcs404.h>
-#include <dt-bindings/clock/qcom,turingcc-qcs404.h>
-#include <dt-bindings/clock/qcom,rpmcc.h>
-#include <dt-bindings/power/qcom-rpmpd.h>
-#include <dt-bindings/thermal/thermal.h>
-
-/ {
- interrupt-parent = <&intc>;
-
- #address-cells = <2>;
- #size-cells = <2>;
-
- chosen { };
-
- clocks {
- xo_board: xo-board {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <19200000>;
- };
-
- sleep_clk: sleep-clk {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <32768>;
- };
- };
-
- cpus {
- #address-cells = <1>;
- #size-cells = <0>;
-
- CPU0: cpu@100 {
- device_type = "cpu";
- compatible = "arm,cortex-a53";
- reg = <0x100>;
- enable-method = "psci";
- cpu-idle-states = <&CPU_SLEEP_0>;
- next-level-cache = <&L2_0>;
- #cooling-cells = <2>;
- clocks = <&apcs_glb>;
- operating-points-v2 = <&cpu_opp_table>;
- power-domains = <&cpr>;
- power-domain-names = "cpr";
- };
-
- CPU1: cpu@101 {
- device_type = "cpu";
- compatible = "arm,cortex-a53";
- reg = <0x101>;
- enable-method = "psci";
- cpu-idle-states = <&CPU_SLEEP_0>;
- next-level-cache = <&L2_0>;
- #cooling-cells = <2>;
- clocks = <&apcs_glb>;
- operating-points-v2 = <&cpu_opp_table>;
- power-domains = <&cpr>;
- power-domain-names = "cpr";
- };
-
- CPU2: cpu@102 {
- device_type = "cpu";
- compatible = "arm,cortex-a53";
- reg = <0x102>;
- enable-method = "psci";
- cpu-idle-states = <&CPU_SLEEP_0>;
- next-level-cache = <&L2_0>;
- #cooling-cells = <2>;
- clocks = <&apcs_glb>;
- operating-points-v2 = <&cpu_opp_table>;
- power-domains = <&cpr>;
- power-domain-names = "cpr";
- };
-
- CPU3: cpu@103 {
- device_type = "cpu";
- compatible = "arm,cortex-a53";
- reg = <0x103>;
- enable-method = "psci";
- cpu-idle-states = <&CPU_SLEEP_0>;
- next-level-cache = <&L2_0>;
- #cooling-cells = <2>;
- clocks = <&apcs_glb>;
- operating-points-v2 = <&cpu_opp_table>;
- power-domains = <&cpr>;
- power-domain-names = "cpr";
- };
-
- L2_0: l2-cache {
- compatible = "cache";
- cache-level = <2>;
- cache-unified;
- };
-
- idle-states {
- entry-method = "psci";
-
- CPU_SLEEP_0: cpu-sleep-0 {
- compatible = "arm,idle-state";
- idle-state-name = "standalone-power-collapse";
- arm,psci-suspend-param = <0x40000003>;
- entry-latency-us = <125>;
- exit-latency-us = <180>;
- min-residency-us = <595>;
- local-timer-stop;
- };
- };
- };
-
- cpu_opp_table: opp-table-cpu {
- compatible = "operating-points-v2-kryo-cpu";
- opp-shared;
-
- opp-1094400000 {
- opp-hz = /bits/ 64 <1094400000>;
- required-opps = <&cpr_opp1>;
- };
- opp-1248000000 {
- opp-hz = /bits/ 64 <1248000000>;
- required-opps = <&cpr_opp2>;
- };
- opp-1401600000 {
- opp-hz = /bits/ 64 <1401600000>;
- required-opps = <&cpr_opp3>;
- };
- };
-
- cpr_opp_table: opp-table-cpr {
- compatible = "operating-points-v2-qcom-level";
-
- cpr_opp1: opp1 {
- opp-level = <1>;
- qcom,opp-fuse-level = <1>;
- };
- cpr_opp2: opp2 {
- opp-level = <2>;
- qcom,opp-fuse-level = <2>;
- };
- cpr_opp3: opp3 {
- opp-level = <3>;
- qcom,opp-fuse-level = <3>;
- };
- };
-
- firmware {
- scm: scm {
- compatible = "qcom,scm-qcs404", "qcom,scm";
- #reset-cells = <1>;
- };
- };
-
- memory@80000000 {
- device_type = "memory";
- /* We expect the bootloader to fill in the size */
- reg = <0 0x80000000 0 0>;
- };
-
- psci {
- compatible = "arm,psci-1.0";
- method = "smc";
- };
-
- rpm: remoteproc {
- compatible = "qcom,qcs404-rpm-proc", "qcom,rpm-proc";
-
- glink-edge {
- compatible = "qcom,glink-rpm";
-
- interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;
- qcom,rpm-msg-ram = <&rpm_msg_ram>;
- mboxes = <&apcs_glb 0>;
-
- rpm_requests: rpm-requests {
- compatible = "qcom,rpm-qcs404";
- qcom,glink-channels = "rpm_requests";
-
- rpmcc: clock-controller {
- compatible = "qcom,rpmcc-qcs404", "qcom,rpmcc";
- #clock-cells = <1>;
- clocks = <&xo_board>;
- clock-names = "xo";
- };
-
- rpmpd: power-controller {
- compatible = "qcom,qcs404-rpmpd";
- #power-domain-cells = <1>;
- operating-points-v2 = <&rpmpd_opp_table>;
-
- rpmpd_opp_table: opp-table {
- compatible = "operating-points-v2";
-
- rpmpd_opp_ret: opp1 {
- opp-level = <16>;
- };
-
- rpmpd_opp_ret_plus: opp2 {
- opp-level = <32>;
- };
-
- rpmpd_opp_min_svs: opp3 {
- opp-level = <48>;
- };
-
- rpmpd_opp_low_svs: opp4 {
- opp-level = <64>;
- };
-
- rpmpd_opp_svs: opp5 {
- opp-level = <128>;
- };
-
- rpmpd_opp_svs_plus: opp6 {
- opp-level = <192>;
- };
-
- rpmpd_opp_nom: opp7 {
- opp-level = <256>;
- };
-
- rpmpd_opp_nom_plus: opp8 {
- opp-level = <320>;
- };
-
- rpmpd_opp_turbo: opp9 {
- opp-level = <384>;
- };
-
- rpmpd_opp_turbo_no_cpr: opp10 {
- opp-level = <416>;
- };
-
- rpmpd_opp_turbo_plus: opp11 {
- opp-level = <512>;
- };
- };
- };
- };
- };
- };
-
- reserved-memory {
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- tz_apps_mem: memory@85900000 {
- reg = <0 0x85900000 0 0x500000>;
- no-map;
- };
-
- xbl_mem: memory@85e00000 {
- reg = <0 0x85e00000 0 0x100000>;
- no-map;
- };
-
- smem_region: memory@85f00000 {
- reg = <0 0x85f00000 0 0x200000>;
- no-map;
- };
-
- tz_mem: memory@86100000 {
- reg = <0 0x86100000 0 0x300000>;
- no-map;
- };
-
- wlan_fw_mem: memory@86400000 {
- reg = <0 0x86400000 0 0x1100000>;
- no-map;
- };
-
- adsp_fw_mem: memory@87500000 {
- reg = <0 0x87500000 0 0x1a00000>;
- no-map;
- };
-
- cdsp_fw_mem: memory@88f00000 {
- reg = <0 0x88f00000 0 0x600000>;
- no-map;
- };
-
- wlan_msa_mem: memory@89500000 {
- reg = <0 0x89500000 0 0x100000>;
- no-map;
- };
-
- uefi_mem: memory@9f800000 {
- reg = <0 0x9f800000 0 0x800000>;
- no-map;
- };
- };
-
- smem {
- compatible = "qcom,smem";
-
- memory-region = <&smem_region>;
- qcom,rpm-msg-ram = <&rpm_msg_ram>;
-
- hwlocks = <&tcsr_mutex 3>;
- };
-
- soc: soc@0 {
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0 0 0 0xffffffff>;
- compatible = "simple-bus";
-
- turingcc: clock-controller@800000 {
- compatible = "qcom,qcs404-turingcc";
- reg = <0x00800000 0x30000>;
- clocks = <&gcc GCC_CDSP_CFG_AHB_CLK>;
-
- #clock-cells = <1>;
- #reset-cells = <1>;
-
- status = "disabled";
- };
-
- rpm_msg_ram: sram@60000 {
- compatible = "qcom,rpm-msg-ram";
- reg = <0x00060000 0x6000>;
- };
-
- usb3_phy: phy@78000 {
- compatible = "qcom,usb-ss-28nm-phy";
- reg = <0x00078000 0x400>;
- #phy-cells = <0>;
- clocks = <&rpmcc RPM_SMD_LN_BB_CLK>,
- <&gcc GCC_USB_HS_PHY_CFG_AHB_CLK>,
- <&gcc GCC_USB3_PHY_PIPE_CLK>;
- clock-names = "ref", "ahb", "pipe";
- resets = <&gcc GCC_USB3_PHY_BCR>,
- <&gcc GCC_USB3PHY_PHY_BCR>;
- reset-names = "com", "phy";
- status = "disabled";
- };
-
- usb2_phy_prim: phy@7a000 {
- compatible = "qcom,usb-hs-28nm-femtophy";
- reg = <0x0007a000 0x200>;
- #phy-cells = <0>;
- clocks = <&rpmcc RPM_SMD_LN_BB_CLK>,
- <&gcc GCC_USB_HS_PHY_CFG_AHB_CLK>,
- <&gcc GCC_USB2A_PHY_SLEEP_CLK>;
- clock-names = "ref", "ahb", "sleep";
- resets = <&gcc GCC_USB_HS_PHY_CFG_AHB_BCR>,
- <&gcc GCC_USB2A_PHY_BCR>;
- reset-names = "phy", "por";
- status = "disabled";
- };
-
- usb2_phy_sec: phy@7c000 {
- compatible = "qcom,usb-hs-28nm-femtophy";
- reg = <0x0007c000 0x200>;
- #phy-cells = <0>;
- clocks = <&rpmcc RPM_SMD_LN_BB_CLK>,
- <&gcc GCC_USB_HS_PHY_CFG_AHB_CLK>,
- <&gcc GCC_USB2A_PHY_SLEEP_CLK>;
- clock-names = "ref", "ahb", "sleep";
- resets = <&gcc GCC_QUSB2_PHY_BCR>,
- <&gcc GCC_USB2_HS_PHY_ONLY_BCR>;
- reset-names = "phy", "por";
- status = "disabled";
- };
-
- qfprom: qfprom@a4000 {
- compatible = "qcom,qcs404-qfprom", "qcom,qfprom";
- reg = <0x000a4000 0x1000>;
- #address-cells = <1>;
- #size-cells = <1>;
- cpr_efuse_speedbin: speedbin@13c {
- reg = <0x13c 0x4>;
- bits = <2 3>;
- };
-
- tsens_s0_p1: s0-p1@1f8 {
- reg = <0x1f8 0x1>;
- bits = <0 6>;
- };
-
- tsens_s0_p2: s0-p2@1f8 {
- reg = <0x1f8 0x2>;
- bits = <6 6>;
- };
-
- tsens_s1_p1: s1-p1@1f9 {
- reg = <0x1f9 0x2>;
- bits = <4 6>;
- };
-
- tsens_s1_p2: s1-p2@1fa {
- reg = <0x1fa 0x1>;
- bits = <2 6>;
- };
-
- tsens_s2_p1: s2-p1@1fb {
- reg = <0x1fb 0x1>;
- bits = <0 6>;
- };
-
- tsens_s2_p2: s2-p2@1fb {
- reg = <0x1fb 0x2>;
- bits = <6 6>;
- };
-
- tsens_s3_p1: s3-p1@1fc {
- reg = <0x1fc 0x2>;
- bits = <4 6>;
- };
-
- tsens_s3_p2: s3-p2@1fd {
- reg = <0x1fd 0x1>;
- bits = <2 6>;
- };
-
- tsens_s4_p1: s4-p1@1fe {
- reg = <0x1fe 0x1>;
- bits = <0 6>;
- };
-
- tsens_s4_p2: s4-p2@1fe {
- reg = <0x1fe 0x2>;
- bits = <6 6>;
- };
-
- tsens_s5_p1: s5-p1@200 {
- reg = <0x200 0x1>;
- bits = <0 6>;
- };
-
- tsens_s5_p2: s5-p2@200 {
- reg = <0x200 0x2>;
- bits = <6 6>;
- };
-
- tsens_s6_p1: s6-p1@201 {
- reg = <0x201 0x2>;
- bits = <4 6>;
- };
-
- tsens_s6_p2: s6-p2@202 {
- reg = <0x202 0x1>;
- bits = <2 6>;
- };
-
- tsens_s7_p1: s7-p1@203 {
- reg = <0x203 0x1>;
- bits = <0 6>;
- };
-
- tsens_s7_p2: s7-p2@203 {
- reg = <0x203 0x2>;
- bits = <6 6>;
- };
-
- tsens_s8_p1: s8-p1@204 {
- reg = <0x204 0x2>;
- bits = <4 6>;
- };
-
- tsens_s8_p2: s8-p2@205 {
- reg = <0x205 0x1>;
- bits = <2 6>;
- };
-
- tsens_s9_p1: s9-p1@206 {
- reg = <0x206 0x1>;
- bits = <0 6>;
- };
-
- tsens_s9_p2: s9-p2@206 {
- reg = <0x206 0x2>;
- bits = <6 6>;
- };
-
- tsens_mode: mode@208 {
- reg = <0x208 1>;
- bits = <0 3>;
- };
-
- tsens_base1: base1@208 {
- reg = <0x208 2>;
- bits = <3 8>;
- };
-
- tsens_base2: base2@208 {
- reg = <0x209 2>;
- bits = <3 8>;
- };
-
- cpr_efuse_quot_offset1: qoffset1@231 {
- reg = <0x231 0x4>;
- bits = <4 7>;
- };
- cpr_efuse_quot_offset2: qoffset2@232 {
- reg = <0x232 0x4>;
- bits = <3 7>;
- };
- cpr_efuse_quot_offset3: qoffset3@233 {
- reg = <0x233 0x4>;
- bits = <2 7>;
- };
- cpr_efuse_init_voltage1: ivoltage1@229 {
- reg = <0x229 0x4>;
- bits = <4 6>;
- };
- cpr_efuse_init_voltage2: ivoltage2@22a {
- reg = <0x22a 0x4>;
- bits = <2 6>;
- };
- cpr_efuse_init_voltage3: ivoltage3@22b {
- reg = <0x22b 0x4>;
- bits = <0 6>;
- };
- cpr_efuse_quot1: quot1@22b {
- reg = <0x22b 0x4>;
- bits = <6 12>;
- };
- cpr_efuse_quot2: quot2@22d {
- reg = <0x22d 0x4>;
- bits = <2 12>;
- };
- cpr_efuse_quot3: quot3@230 {
- reg = <0x230 0x4>;
- bits = <0 12>;
- };
- cpr_efuse_ring1: ring1@228 {
- reg = <0x228 0x4>;
- bits = <0 3>;
- };
- cpr_efuse_ring2: ring2@228 {
- reg = <0x228 0x4>;
- bits = <4 3>;
- };
- cpr_efuse_ring3: ring3@229 {
- reg = <0x229 0x4>;
- bits = <0 3>;
- };
- cpr_efuse_revision: revision@218 {
- reg = <0x218 0x4>;
- bits = <3 3>;
- };
- };
-
- rng: rng@e3000 {
- compatible = "qcom,prng-ee";
- reg = <0x000e3000 0x1000>;
- clocks = <&gcc GCC_PRNG_AHB_CLK>;
- clock-names = "core";
- };
-
- bimc: interconnect@400000 {
- reg = <0x00400000 0x80000>;
- compatible = "qcom,qcs404-bimc";
- #interconnect-cells = <1>;
- clock-names = "bus", "bus_a";
- clocks = <&rpmcc RPM_SMD_BIMC_CLK>,
- <&rpmcc RPM_SMD_BIMC_A_CLK>;
- };
-
- tsens: thermal-sensor@4a9000 {
- compatible = "qcom,qcs404-tsens", "qcom,tsens-v1";
- reg = <0x004a9000 0x1000>, /* TM */
- <0x004a8000 0x1000>; /* SROT */
- nvmem-cells = <&tsens_mode>,
- <&tsens_base1>, <&tsens_base2>,
- <&tsens_s0_p1>, <&tsens_s0_p2>,
- <&tsens_s1_p1>, <&tsens_s1_p2>,
- <&tsens_s2_p1>, <&tsens_s2_p2>,
- <&tsens_s3_p1>, <&tsens_s3_p2>,
- <&tsens_s4_p1>, <&tsens_s4_p2>,
- <&tsens_s5_p1>, <&tsens_s5_p2>,
- <&tsens_s6_p1>, <&tsens_s6_p2>,
- <&tsens_s7_p1>, <&tsens_s7_p2>,
- <&tsens_s8_p1>, <&tsens_s8_p2>,
- <&tsens_s9_p1>, <&tsens_s9_p2>;
- nvmem-cell-names = "mode",
- "base1", "base2",
- "s0_p1", "s0_p2",
- "s1_p1", "s1_p2",
- "s2_p1", "s2_p2",
- "s3_p1", "s3_p2",
- "s4_p1", "s4_p2",
- "s5_p1", "s5_p2",
- "s6_p1", "s6_p2",
- "s7_p1", "s7_p2",
- "s8_p1", "s8_p2",
- "s9_p1", "s9_p2";
- #qcom,sensors = <10>;
- interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "uplow";
- #thermal-sensor-cells = <1>;
- };
-
- pcnoc: interconnect@500000 {
- reg = <0x00500000 0x15080>;
- compatible = "qcom,qcs404-pcnoc";
- #interconnect-cells = <1>;
- clock-names = "bus", "bus_a";
- clocks = <&rpmcc RPM_SMD_PNOC_CLK>,
- <&rpmcc RPM_SMD_PNOC_A_CLK>;
- };
-
- snoc: interconnect@580000 {
- reg = <0x00580000 0x23080>;
- compatible = "qcom,qcs404-snoc";
- #interconnect-cells = <1>;
- clock-names = "bus", "bus_a";
- clocks = <&rpmcc RPM_SMD_SNOC_CLK>,
- <&rpmcc RPM_SMD_SNOC_A_CLK>;
- };
-
- remoteproc_cdsp: remoteproc@b00000 {
- compatible = "qcom,qcs404-cdsp-pas";
- reg = <0x00b00000 0x4040>;
-
- interrupts-extended = <&intc GIC_SPI 229 IRQ_TYPE_EDGE_RISING>,
- <&cdsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
- <&cdsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
- <&cdsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
- <&cdsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>;
- interrupt-names = "wdog", "fatal", "ready",
- "handover", "stop-ack";
-
- clocks = <&xo_board>;
- clock-names = "xo";
-
- /*
- * If the node was using the PIL binding, then include properties:
- * clocks = <&xo_board>,
- * <&gcc GCC_CDSP_CFG_AHB_CLK>,
- * <&gcc GCC_CDSP_TBU_CLK>,
- * <&gcc GCC_BIMC_CDSP_CLK>,
- * <&turingcc TURING_WRAPPER_AON_CLK>,
- * <&turingcc TURING_Q6SS_AHBS_AON_CLK>,
- * <&turingcc TURING_Q6SS_AHBM_AON_CLK>,
- * <&turingcc TURING_Q6SS_Q6_AXIM_CLK>;
- * clock-names = "xo",
- * "sway",
- * "tbu",
- * "bimc",
- * "ahb_aon",
- * "q6ss_slave",
- * "q6ss_master",
- * "q6_axim";
- * resets = <&gcc GCC_CDSP_RESTART>;
- * reset-names = "restart";
- * qcom,halt-regs = <&tcsr 0x19004>;
- */
-
- memory-region = <&cdsp_fw_mem>;
-
- qcom,smem-states = <&cdsp_smp2p_out 0>;
- qcom,smem-state-names = "stop";
-
- status = "disabled";
-
- glink-edge {
- interrupts = <GIC_SPI 141 IRQ_TYPE_EDGE_RISING>;
-
- qcom,remote-pid = <5>;
- mboxes = <&apcs_glb 12>;
-
- label = "cdsp";
- };
- };
-
- usb3: usb@7678800 {
- compatible = "qcom,qcs404-dwc3", "qcom,dwc3";
- reg = <0x07678800 0x400>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
- clocks = <&gcc GCC_USB30_MASTER_CLK>,
- <&gcc GCC_SYS_NOC_USB3_CLK>,
- <&gcc GCC_USB30_SLEEP_CLK>,
- <&gcc GCC_USB30_MOCK_UTMI_CLK>;
- clock-names = "core", "iface", "sleep", "mock_utmi";
- assigned-clocks = <&gcc GCC_USB20_MOCK_UTMI_CLK>,
- <&gcc GCC_USB30_MASTER_CLK>;
- assigned-clock-rates = <19200000>, <200000000>;
- status = "disabled";
-
- usb3_dwc3: usb@7580000 {
- compatible = "snps,dwc3";
- reg = <0x07580000 0xcd00>;
- interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
- phys = <&usb2_phy_prim>, <&usb3_phy>;
- phy-names = "usb2-phy", "usb3-phy";
- snps,has-lpm-erratum;
- snps,hird-threshold = /bits/ 8 <0x10>;
- snps,usb3_lpm_capable;
- dr_mode = "otg";
- };
- };
-
- usb2: usb@79b8800 {
- compatible = "qcom,qcs404-dwc3", "qcom,dwc3";
- reg = <0x079b8800 0x400>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
- clocks = <&gcc GCC_USB_HS_SYSTEM_CLK>,
- <&gcc GCC_PCNOC_USB2_CLK>,
- <&gcc GCC_USB_HS_INACTIVITY_TIMERS_CLK>,
- <&gcc GCC_USB20_MOCK_UTMI_CLK>;
- clock-names = "core", "iface", "sleep", "mock_utmi";
- assigned-clocks = <&gcc GCC_USB20_MOCK_UTMI_CLK>,
- <&gcc GCC_USB_HS_SYSTEM_CLK>;
- assigned-clock-rates = <19200000>, <133333333>;
- status = "disabled";
-
- usb@78c0000 {
- compatible = "snps,dwc3";
- reg = <0x078c0000 0xcc00>;
- interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
- phys = <&usb2_phy_sec>;
- phy-names = "usb2-phy";
- snps,has-lpm-erratum;
- snps,hird-threshold = /bits/ 8 <0x10>;
- snps,usb3_lpm_capable;
- dr_mode = "peripheral";
- };
- };
-
- tlmm: pinctrl@1000000 {
- compatible = "qcom,qcs404-pinctrl";
- reg = <0x01000000 0x200000>,
- <0x01300000 0x200000>,
- <0x07b00000 0x200000>;
- reg-names = "south", "north", "east";
- interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
- gpio-ranges = <&tlmm 0 0 120>;
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
-
- blsp1_i2c0_default: blsp1-i2c0-default-state {
- pins = "gpio32", "gpio33";
- function = "blsp_i2c0";
- };
-
- blsp1_i2c1_default: blsp1-i2c1-default-state {
- pins = "gpio24", "gpio25";
- function = "blsp_i2c1";
- };
-
- blsp1_i2c2_default: blsp1-i2c2-default-state {
- sda-pins {
- pins = "gpio19";
- function = "blsp_i2c_sda_a2";
- };
-
- scl-pins {
- pins = "gpio20";
- function = "blsp_i2c_scl_a2";
- };
- };
-
- blsp1_i2c3_default: blsp1-i2c3-default-state {
- pins = "gpio84", "gpio85";
- function = "blsp_i2c3";
- };
-
- blsp1_i2c4_default: blsp1-i2c4-default-state {
- pins = "gpio117", "gpio118";
- function = "blsp_i2c4";
- };
-
- blsp1_uart0_default: blsp1-uart0-default-state {
- pins = "gpio30", "gpio31", "gpio32", "gpio33";
- function = "blsp_uart0";
- };
-
- blsp1_uart1_default: blsp1-uart1-default-state {
- pins = "gpio22", "gpio23";
- function = "blsp_uart1";
- };
-
- blsp1_uart2_default: blsp1-uart2-default-state {
- rx-pins {
- pins = "gpio18";
- function = "blsp_uart_rx_a2";
- };
-
- tx-pins {
- pins = "gpio17";
- function = "blsp_uart_tx_a2";
- };
- };
-
- blsp1_uart3_default: blsp1-uart3-default-state {
- cts-pins {
- pins = "gpio84";
- function = "blsp_uart3";
- };
-
- rts-tx-pins {
- pins = "gpio85", "gpio82";
- function = "blsp_uart3";
- };
-
- rx-pins {
- pins = "gpio83";
- function = "blsp_uart3";
- };
- };
-
- blsp2_i2c0_default: blsp2-i2c0-default-state {
- pins = "gpio28", "gpio29";
- function = "blsp_i2c5";
- };
-
- blsp1_spi0_default: blsp1-spi0-default-state {
- pins = "gpio30", "gpio31", "gpio32", "gpio33";
- function = "blsp_spi0";
- };
-
- blsp1_spi1_default: blsp1-spi1-default-state {
- mosi-pins {
- pins = "gpio22";
- function = "blsp_spi_mosi_a1";
- };
-
- miso-pins {
- pins = "gpio23";
- function = "blsp_spi_miso_a1";
- };
-
- cs-n-pins {
- pins = "gpio24";
- function = "blsp_spi_cs_n_a1";
- };
-
- clk-pins {
- pins = "gpio25";
- function = "blsp_spi_clk_a1";
- };
- };
-
- blsp1_spi2_default: blsp1-spi2-default-state {
- pins = "gpio17", "gpio18", "gpio19", "gpio20";
- function = "blsp_spi2";
- };
-
- blsp1_spi3_default: blsp1-spi3-default-state {
- pins = "gpio82", "gpio83", "gpio84", "gpio85";
- function = "blsp_spi3";
- };
-
- blsp1_spi4_default: blsp1-spi4-default-state {
- pins = "gpio37", "gpio38", "gpio117", "gpio118";
- function = "blsp_spi4";
- };
-
- blsp2_spi0_default: blsp2-spi0-default-state {
- pins = "gpio26", "gpio27", "gpio28", "gpio29";
- function = "blsp_spi5";
- };
-
- blsp2_uart0_default: blsp2-uart0-default-state {
- pins = "gpio26", "gpio27", "gpio28", "gpio29";
- function = "blsp_uart5";
- };
- };
-
- gcc: clock-controller@1800000 {
- compatible = "qcom,gcc-qcs404";
- reg = <0x01800000 0x80000>;
- #clock-cells = <1>;
- #reset-cells = <1>;
- #power-domain-cells = <1>;
-
- clocks = <&xo_board>,
- <&sleep_clk>,
- <&pcie_phy>,
- <0>,
- <0>,
- <0>;
-
- assigned-clocks = <&gcc GCC_APSS_AHB_CLK_SRC>;
- assigned-clock-rates = <19200000>;
- };
-
- tcsr_mutex: hwlock@1905000 {
- compatible = "qcom,tcsr-mutex";
- reg = <0x01905000 0x20000>;
- #hwlock-cells = <1>;
- };
-
- tcsr: syscon@1937000 {
- compatible = "qcom,qcs404-tcsr", "syscon";
- reg = <0x01937000 0x25000>;
- };
-
- sram@290000 {
- compatible = "qcom,rpm-stats";
- reg = <0x00290000 0x10000>;
- };
-
- spmi_bus: spmi@200f000 {
- compatible = "qcom,spmi-pmic-arb";
- reg = <0x0200f000 0x001000>,
- <0x02400000 0x800000>,
- <0x02c00000 0x800000>,
- <0x03800000 0x200000>,
- <0x0200a000 0x002100>;
- reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
- interrupt-names = "periph_irq";
- interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
- qcom,ee = <0>;
- qcom,channel = <0>;
- #address-cells = <2>;
- #size-cells = <0>;
- interrupt-controller;
- #interrupt-cells = <4>;
- };
-
- remoteproc_wcss: remoteproc@7400000 {
- compatible = "qcom,qcs404-wcss-pas";
- reg = <0x07400000 0x4040>;
-
- interrupts-extended = <&intc GIC_SPI 153 IRQ_TYPE_EDGE_RISING>,
- <&wcss_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
- <&wcss_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
- <&wcss_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
- <&wcss_smp2p_in 3 IRQ_TYPE_EDGE_RISING>;
- interrupt-names = "wdog", "fatal", "ready",
- "handover", "stop-ack";
-
- clocks = <&xo_board>;
- clock-names = "xo";
-
- memory-region = <&wlan_fw_mem>;
-
- qcom,smem-states = <&wcss_smp2p_out 0>;
- qcom,smem-state-names = "stop";
-
- status = "disabled";
-
- glink-edge {
- interrupts = <GIC_SPI 156 IRQ_TYPE_EDGE_RISING>;
-
- qcom,remote-pid = <1>;
- mboxes = <&apcs_glb 16>;
-
- label = "wcss";
- };
- };
-
- pcie_phy: phy@7786000 {
- compatible = "qcom,qcs404-pcie2-phy", "qcom,pcie2-phy";
- reg = <0x07786000 0xb8>;
-
- clocks = <&gcc GCC_PCIE_0_PIPE_CLK>;
- resets = <&gcc GCC_PCIEPHY_0_PHY_BCR>,
- <&gcc GCC_PCIE_0_PIPE_ARES>;
- reset-names = "phy", "pipe";
-
- clock-output-names = "pcie_0_pipe_clk";
- #clock-cells = <0>;
- #phy-cells = <0>;
-
- status = "disabled";
- };
-
- sdcc1: mmc@7804000 {
- compatible = "qcom,qcs404-sdhci", "qcom,sdhci-msm-v5";
- reg = <0x07804000 0x1000>, <0x7805000 0x1000>;
- reg-names = "hc", "cqhci";
-
- interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "hc_irq", "pwr_irq";
-
- clocks = <&gcc GCC_SDCC1_AHB_CLK>,
- <&gcc GCC_SDCC1_APPS_CLK>,
- <&xo_board>;
- clock-names = "iface", "core", "xo";
-
- status = "disabled";
- };
-
- blsp1_dma: dma-controller@7884000 {
- compatible = "qcom,bam-v1.7.0";
- reg = <0x07884000 0x25000>;
- interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&gcc GCC_BLSP1_AHB_CLK>;
- clock-names = "bam_clk";
- #dma-cells = <1>;
- qcom,ee = <0>;
- status = "okay";
- };
-
- blsp1_uart0: serial@78af000 {
- compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
- reg = <0x078af000 0x200>;
- interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&gcc GCC_BLSP1_UART0_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>;
- clock-names = "core", "iface";
- dmas = <&blsp1_dma 0>, <&blsp1_dma 1>;
- dma-names = "tx", "rx";
- pinctrl-names = "default";
- pinctrl-0 = <&blsp1_uart0_default>;
- status = "disabled";
- };
-
- blsp1_uart1: serial@78b0000 {
- compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
- reg = <0x078b0000 0x200>;
- interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&gcc GCC_BLSP1_UART1_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>;
- clock-names = "core", "iface";
- dmas = <&blsp1_dma 2>, <&blsp1_dma 3>;
- dma-names = "tx", "rx";
- pinctrl-names = "default";
- pinctrl-0 = <&blsp1_uart1_default>;
- status = "disabled";
- };
-
- blsp1_uart2: serial@78b1000 {
- compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
- reg = <0x078b1000 0x200>;
- interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>;
- clock-names = "core", "iface";
- dmas = <&blsp1_dma 4>, <&blsp1_dma 5>;
- dma-names = "tx", "rx";
- pinctrl-names = "default";
- pinctrl-0 = <&blsp1_uart2_default>;
- status = "okay";
- };
-
- ethernet: ethernet@7a80000 {
- compatible = "qcom,qcs404-ethqos";
- reg = <0x07a80000 0x10000>,
- <0x07a96000 0x100>;
- reg-names = "stmmaceth", "rgmii";
- clock-names = "stmmaceth", "pclk", "ptp_ref", "rgmii";
- clocks = <&gcc GCC_ETH_AXI_CLK>,
- <&gcc GCC_ETH_SLAVE_AHB_CLK>,
- <&gcc GCC_ETH_PTP_CLK>,
- <&gcc GCC_ETH_RGMII_CLK>;
- interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "macirq", "eth_lpi";
-
- snps,tso;
- rx-fifo-depth = <4096>;
- tx-fifo-depth = <4096>;
-
- status = "disabled";
- };
-
- wifi: wifi@a000000 {
- compatible = "qcom,wcn3990-wifi";
- reg = <0xa000000 0x800000>;
- reg-names = "membase";
- memory-region = <&wlan_msa_mem>;
- interrupts = <GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 285 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
- status = "disabled";
- };
-
- blsp1_uart3: serial@78b2000 {
- compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
- reg = <0x078b2000 0x200>;
- interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&gcc GCC_BLSP1_UART3_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>;
- clock-names = "core", "iface";
- dmas = <&blsp1_dma 6>, <&blsp1_dma 7>;
- dma-names = "tx", "rx";
- pinctrl-names = "default";
- pinctrl-0 = <&blsp1_uart3_default>;
- status = "disabled";
- };
-
- blsp1_i2c0: i2c@78b5000 {
- compatible = "qcom,i2c-qup-v2.2.1";
- reg = <0x078b5000 0x600>;
- interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&gcc GCC_BLSP1_QUP0_I2C_APPS_CLK>,
- <&gcc GCC_BLSP1_AHB_CLK>;
- clock-names = "core", "iface";
- pinctrl-names = "default";
- pinctrl-0 = <&blsp1_i2c0_default>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- blsp1_spi0: spi@78b5000 {
- compatible = "qcom,spi-qup-v2.2.1";
- reg = <0x078b5000 0x600>;
- interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&gcc GCC_BLSP1_QUP0_SPI_APPS_CLK>,
- <&gcc GCC_BLSP1_AHB_CLK>;
- clock-names = "core", "iface";
- pinctrl-names = "default";
- pinctrl-0 = <&blsp1_spi0_default>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- blsp1_i2c1: i2c@78b6000 {
- compatible = "qcom,i2c-qup-v2.2.1";
- reg = <0x078b6000 0x600>;
- interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&gcc GCC_BLSP1_QUP1_I2C_APPS_CLK>,
- <&gcc GCC_BLSP1_AHB_CLK>;
- clock-names = "core", "iface";
- pinctrl-names = "default";
- pinctrl-0 = <&blsp1_i2c1_default>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- blsp1_spi1: spi@78b6000 {
- compatible = "qcom,spi-qup-v2.2.1";
- reg = <0x078b6000 0x600>;
- interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&gcc GCC_BLSP1_QUP1_SPI_APPS_CLK>,
- <&gcc GCC_BLSP1_AHB_CLK>;
- clock-names = "core", "iface";
- pinctrl-names = "default";
- pinctrl-0 = <&blsp1_spi1_default>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- blsp1_i2c2: i2c@78b7000 {
- compatible = "qcom,i2c-qup-v2.2.1";
- reg = <0x078b7000 0x600>;
- interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>,
- <&gcc GCC_BLSP1_AHB_CLK>;
- clock-names = "core", "iface";
- pinctrl-names = "default";
- pinctrl-0 = <&blsp1_i2c2_default>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- blsp1_spi2: spi@78b7000 {
- compatible = "qcom,spi-qup-v2.2.1";
- reg = <0x078b7000 0x600>;
- interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&gcc GCC_BLSP1_QUP2_SPI_APPS_CLK>,
- <&gcc GCC_BLSP1_AHB_CLK>;
- clock-names = "core", "iface";
- pinctrl-names = "default";
- pinctrl-0 = <&blsp1_spi2_default>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- blsp1_i2c3: i2c@78b8000 {
- compatible = "qcom,i2c-qup-v2.2.1";
- reg = <0x078b8000 0x600>;
- interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&gcc GCC_BLSP1_QUP3_I2C_APPS_CLK>,
- <&gcc GCC_BLSP1_AHB_CLK>;
- clock-names = "core", "iface";
- pinctrl-names = "default";
- pinctrl-0 = <&blsp1_i2c3_default>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- blsp1_spi3: spi@78b8000 {
- compatible = "qcom,spi-qup-v2.2.1";
- reg = <0x078b8000 0x600>;
- interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&gcc GCC_BLSP1_QUP3_SPI_APPS_CLK>,
- <&gcc GCC_BLSP1_AHB_CLK>;
- clock-names = "core", "iface";
- pinctrl-names = "default";
- pinctrl-0 = <&blsp1_spi3_default>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- blsp1_i2c4: i2c@78b9000 {
- compatible = "qcom,i2c-qup-v2.2.1";
- reg = <0x078b9000 0x600>;
- interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&gcc GCC_BLSP1_QUP4_I2C_APPS_CLK>,
- <&gcc GCC_BLSP1_AHB_CLK>;
- clock-names = "core", "iface";
- pinctrl-names = "default";
- pinctrl-0 = <&blsp1_i2c4_default>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- blsp1_spi4: spi@78b9000 {
- compatible = "qcom,spi-qup-v2.2.1";
- reg = <0x078b9000 0x600>;
- interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&gcc GCC_BLSP1_QUP4_SPI_APPS_CLK>,
- <&gcc GCC_BLSP1_AHB_CLK>;
- clock-names = "core", "iface";
- pinctrl-names = "default";
- pinctrl-0 = <&blsp1_spi4_default>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- blsp2_dma: dma-controller@7ac4000 {
- compatible = "qcom,bam-v1.7.0";
- reg = <0x07ac4000 0x17000>;
- interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&gcc GCC_BLSP2_AHB_CLK>;
- clock-names = "bam_clk";
- #dma-cells = <1>;
- qcom,ee = <0>;
- status = "disabled";
- };
-
- blsp2_uart0: serial@7aef000 {
- compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
- reg = <0x07aef000 0x200>;
- interrupts = <GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&gcc GCC_BLSP2_UART0_APPS_CLK>, <&gcc GCC_BLSP2_AHB_CLK>;
- clock-names = "core", "iface";
- dmas = <&blsp2_dma 0>, <&blsp2_dma 1>;
- dma-names = "tx", "rx";
- pinctrl-names = "default";
- pinctrl-0 = <&blsp2_uart0_default>;
- status = "disabled";
- };
-
- blsp2_i2c0: i2c@7af5000 {
- compatible = "qcom,i2c-qup-v2.2.1";
- reg = <0x07af5000 0x600>;
- interrupts = <GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&gcc GCC_BLSP2_QUP0_I2C_APPS_CLK>,
- <&gcc GCC_BLSP2_AHB_CLK>;
- clock-names = "core", "iface";
- pinctrl-names = "default";
- pinctrl-0 = <&blsp2_i2c0_default>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- blsp2_spi0: spi@7af5000 {
- compatible = "qcom,spi-qup-v2.2.1";
- reg = <0x07af5000 0x600>;
- interrupts = <GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&gcc GCC_BLSP2_QUP0_SPI_APPS_CLK>,
- <&gcc GCC_BLSP2_AHB_CLK>;
- clock-names = "core", "iface";
- pinctrl-names = "default";
- pinctrl-0 = <&blsp2_spi0_default>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- sram@8600000 {
- compatible = "qcom,qcs404-imem", "syscon", "simple-mfd";
- reg = <0x08600000 0x1000>;
-
- #address-cells = <1>;
- #size-cells = <1>;
-
- ranges = <0 0x08600000 0x1000>;
-
- pil-reloc@94c {
- compatible = "qcom,pil-reloc-info";
- reg = <0x94c 0xc8>;
- };
- };
-
- intc: interrupt-controller@b000000 {
- compatible = "qcom,msm-qgic2";
- interrupt-controller;
- #interrupt-cells = <3>;
- reg = <0x0b000000 0x1000>,
- <0x0b002000 0x1000>;
- };
-
- apcs_glb: mailbox@b011000 {
- compatible = "qcom,qcs404-apcs-apps-global",
- "qcom,msm8916-apcs-kpss-global", "syscon";
- reg = <0x0b011000 0x1000>;
- #mbox-cells = <1>;
- clocks = <&apcs_hfpll>, <&gcc GCC_GPLL0_AO_OUT_MAIN>;
- clock-names = "pll", "aux";
- #clock-cells = <0>;
- };
-
- apcs_hfpll: clock-controller@b016000 {
- compatible = "qcom,hfpll";
- reg = <0x0b016000 0x30>;
- #clock-cells = <0>;
- clock-output-names = "apcs_hfpll";
- clocks = <&xo_board>;
- clock-names = "xo";
- };
-
- watchdog@b017000 {
- compatible = "qcom,apss-wdt-qcs404", "qcom,kpss-wdt";
- reg = <0x0b017000 0x1000>;
- clocks = <&sleep_clk>;
- };
-
- cpr: power-controller@b018000 {
- compatible = "qcom,qcs404-cpr", "qcom,cpr";
- reg = <0x0b018000 0x1000>;
- interrupts = <0 15 IRQ_TYPE_EDGE_RISING>;
- clocks = <&xo_board>;
- clock-names = "ref";
- vdd-apc-supply = <&pms405_s3>;
- #power-domain-cells = <0>;
- operating-points-v2 = <&cpr_opp_table>;
- acc-syscon = <&tcsr>;
-
- nvmem-cells = <&cpr_efuse_quot_offset1>,
- <&cpr_efuse_quot_offset2>,
- <&cpr_efuse_quot_offset3>,
- <&cpr_efuse_init_voltage1>,
- <&cpr_efuse_init_voltage2>,
- <&cpr_efuse_init_voltage3>,
- <&cpr_efuse_quot1>,
- <&cpr_efuse_quot2>,
- <&cpr_efuse_quot3>,
- <&cpr_efuse_ring1>,
- <&cpr_efuse_ring2>,
- <&cpr_efuse_ring3>,
- <&cpr_efuse_revision>;
- nvmem-cell-names = "cpr_quotient_offset1",
- "cpr_quotient_offset2",
- "cpr_quotient_offset3",
- "cpr_init_voltage1",
- "cpr_init_voltage2",
- "cpr_init_voltage3",
- "cpr_quotient1",
- "cpr_quotient2",
- "cpr_quotient3",
- "cpr_ring_osc1",
- "cpr_ring_osc2",
- "cpr_ring_osc3",
- "cpr_fuse_revision";
- };
-
- timer@b120000 {
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
- compatible = "arm,armv7-timer-mem";
- reg = <0x0b120000 0x1000>;
- clock-frequency = <19200000>;
-
- frame@b121000 {
- frame-number = <0>;
- interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
- reg = <0x0b121000 0x1000>,
- <0x0b122000 0x1000>;
- };
-
- frame@b123000 {
- frame-number = <1>;
- interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
- reg = <0x0b123000 0x1000>;
- status = "disabled";
- };
-
- frame@b124000 {
- frame-number = <2>;
- interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
- reg = <0x0b124000 0x1000>;
- status = "disabled";
- };
-
- frame@b125000 {
- frame-number = <3>;
- interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
- reg = <0x0b125000 0x1000>;
- status = "disabled";
- };
-
- frame@b126000 {
- frame-number = <4>;
- interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
- reg = <0x0b126000 0x1000>;
- status = "disabled";
- };
-
- frame@b127000 {
- frame-number = <5>;
- interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
- reg = <0xb127000 0x1000>;
- status = "disabled";
- };
-
- frame@b128000 {
- frame-number = <6>;
- interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
- reg = <0x0b128000 0x1000>;
- status = "disabled";
- };
- };
-
- remoteproc_adsp: remoteproc@c700000 {
- compatible = "qcom,qcs404-adsp-pas";
- reg = <0x0c700000 0x4040>;
-
- interrupts-extended = <&intc GIC_SPI 293 IRQ_TYPE_EDGE_RISING>,
- <&adsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
- <&adsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
- <&adsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
- <&adsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>;
- interrupt-names = "wdog", "fatal", "ready",
- "handover", "stop-ack";
-
- clocks = <&xo_board>;
- clock-names = "xo";
-
- memory-region = <&adsp_fw_mem>;
-
- qcom,smem-states = <&adsp_smp2p_out 0>;
- qcom,smem-state-names = "stop";
-
- status = "disabled";
-
- glink-edge {
- interrupts = <GIC_SPI 289 IRQ_TYPE_EDGE_RISING>;
-
- qcom,remote-pid = <2>;
- mboxes = <&apcs_glb 8>;
-
- label = "adsp";
- };
- };
-
- pcie: pci@10000000 {
- compatible = "qcom,pcie-qcs404";
- reg = <0x10000000 0xf1d>,
- <0x10000f20 0xa8>,
- <0x07780000 0x2000>,
- <0x10001000 0x2000>;
- reg-names = "dbi", "elbi", "parf", "config";
- device_type = "pci";
- linux,pci-domain = <0>;
- bus-range = <0x00 0xff>;
- num-lanes = <1>;
- #address-cells = <3>;
- #size-cells = <2>;
-
- ranges = <0x81000000 0x0 0x00000000 0x10003000 0x0 0x00010000>, /* I/O */
- <0x82000000 0x0 0x10013000 0x10013000 0x0 0x007ed000>; /* memory */
-
- interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "msi";
- #interrupt-cells = <1>;
- interrupt-map-mask = <0 0 0 0x7>;
- interrupt-map = <0 0 0 1 &intc GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
- <0 0 0 2 &intc GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>, /* int_b */
- <0 0 0 3 &intc GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>, /* int_c */
- <0 0 0 4 &intc GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; /* int_d */
- clocks = <&gcc GCC_PCIE_0_CFG_AHB_CLK>,
- <&gcc GCC_PCIE_0_AUX_CLK>,
- <&gcc GCC_PCIE_0_MSTR_AXI_CLK>,
- <&gcc GCC_PCIE_0_SLV_AXI_CLK>;
- clock-names = "iface", "aux", "master_bus", "slave_bus";
-
- resets = <&gcc GCC_PCIE_0_AXI_MASTER_ARES>,
- <&gcc GCC_PCIE_0_AXI_SLAVE_ARES>,
- <&gcc GCC_PCIE_0_AXI_MASTER_STICKY_ARES>,
- <&gcc GCC_PCIE_0_CORE_STICKY_ARES>,
- <&gcc GCC_PCIE_0_BCR>,
- <&gcc GCC_PCIE_0_AHB_ARES>;
- reset-names = "axi_m",
- "axi_s",
- "axi_m_sticky",
- "pipe_sticky",
- "pwr",
- "ahb";
-
- phys = <&pcie_phy>;
- phy-names = "pciephy";
-
- status = "disabled";
- };
- };
-
- timer {
- compatible = "arm,armv8-timer";
- interrupts = <GIC_PPI 2 0xff08>,
- <GIC_PPI 3 0xff08>,
- <GIC_PPI 4 0xff08>,
- <GIC_PPI 1 0xff08>;
- };
-
- smp2p-adsp {
- compatible = "qcom,smp2p";
- qcom,smem = <443>, <429>;
- interrupts = <GIC_SPI 291 IRQ_TYPE_EDGE_RISING>;
- mboxes = <&apcs_glb 10>;
- qcom,local-pid = <0>;
- qcom,remote-pid = <2>;
-
- adsp_smp2p_out: master-kernel {
- qcom,entry-name = "master-kernel";
- #qcom,smem-state-cells = <1>;
- };
-
- adsp_smp2p_in: slave-kernel {
- qcom,entry-name = "slave-kernel";
- interrupt-controller;
- #interrupt-cells = <2>;
- };
- };
-
- smp2p-cdsp {
- compatible = "qcom,smp2p";
- qcom,smem = <94>, <432>;
- interrupts = <GIC_SPI 143 IRQ_TYPE_EDGE_RISING>;
- mboxes = <&apcs_glb 14>;
- qcom,local-pid = <0>;
- qcom,remote-pid = <5>;
-
- cdsp_smp2p_out: master-kernel {
- qcom,entry-name = "master-kernel";
- #qcom,smem-state-cells = <1>;
- };
-
- cdsp_smp2p_in: slave-kernel {
- qcom,entry-name = "slave-kernel";
- interrupt-controller;
- #interrupt-cells = <2>;
- };
- };
-
- smp2p-wcss {
- compatible = "qcom,smp2p";
- qcom,smem = <435>, <428>;
- interrupts = <GIC_SPI 158 IRQ_TYPE_EDGE_RISING>;
- mboxes = <&apcs_glb 18>;
- qcom,local-pid = <0>;
- qcom,remote-pid = <1>;
-
- wcss_smp2p_out: master-kernel {
- qcom,entry-name = "master-kernel";
- #qcom,smem-state-cells = <1>;
- };
-
- wcss_smp2p_in: slave-kernel {
- qcom,entry-name = "slave-kernel";
- interrupt-controller;
- #interrupt-cells = <2>;
- };
- };
-
- thermal-zones {
- aoss-thermal {
- polling-delay-passive = <250>;
- polling-delay = <1000>;
-
- thermal-sensors = <&tsens 0>;
-
- trips {
- aoss_alert0: trip-point0 {
- temperature = <105000>;
- hysteresis = <2000>;
- type = "hot";
- };
- };
- };
-
- q6-hvx-thermal {
- polling-delay-passive = <250>;
- polling-delay = <1000>;
-
- thermal-sensors = <&tsens 1>;
-
- trips {
- q6_hvx_alert0: trip-point0 {
- temperature = <105000>;
- hysteresis = <2000>;
- type = "hot";
- };
- };
- };
-
- lpass-thermal {
- polling-delay-passive = <250>;
- polling-delay = <1000>;
-
- thermal-sensors = <&tsens 2>;
-
- trips {
- lpass_alert0: trip-point0 {
- temperature = <105000>;
- hysteresis = <2000>;
- type = "hot";
- };
- };
- };
-
- wlan-thermal {
- polling-delay-passive = <250>;
- polling-delay = <1000>;
-
- thermal-sensors = <&tsens 3>;
-
- trips {
- wlan_alert0: trip-point0 {
- temperature = <105000>;
- hysteresis = <2000>;
- type = "hot";
- };
- };
- };
-
- cluster-thermal {
- polling-delay-passive = <250>;
- polling-delay = <1000>;
-
- thermal-sensors = <&tsens 4>;
-
- trips {
- cluster_alert0: trip-point0 {
- temperature = <95000>;
- hysteresis = <2000>;
- type = "hot";
- };
- cluster_alert1: trip-point1 {
- temperature = <105000>;
- hysteresis = <2000>;
- type = "passive";
- };
- cluster_crit: cluster-crit {
- temperature = <120000>;
- hysteresis = <2000>;
- type = "critical";
- };
- };
- cooling-maps {
- map0 {
- trip = <&cluster_alert1>;
- cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- };
- };
- };
-
- cpu0-thermal {
- polling-delay-passive = <250>;
- polling-delay = <1000>;
-
- thermal-sensors = <&tsens 5>;
-
- trips {
- cpu0_alert0: trip-point0 {
- temperature = <95000>;
- hysteresis = <2000>;
- type = "hot";
- };
- cpu0_alert1: trip-point1 {
- temperature = <105000>;
- hysteresis = <2000>;
- type = "passive";
- };
- cpu0_crit: cpu-crit {
- temperature = <120000>;
- hysteresis = <2000>;
- type = "critical";
- };
- };
- cooling-maps {
- map0 {
- trip = <&cpu0_alert1>;
- cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- };
- };
- };
-
- cpu1-thermal {
- polling-delay-passive = <250>;
- polling-delay = <1000>;
-
- thermal-sensors = <&tsens 6>;
-
- trips {
- cpu1_alert0: trip-point0 {
- temperature = <95000>;
- hysteresis = <2000>;
- type = "hot";
- };
- cpu1_alert1: trip-point1 {
- temperature = <105000>;
- hysteresis = <2000>;
- type = "passive";
- };
- cpu1_crit: cpu-crit {
- temperature = <120000>;
- hysteresis = <2000>;
- type = "critical";
- };
- };
- cooling-maps {
- map0 {
- trip = <&cpu1_alert1>;
- cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- };
- };
- };
-
- cpu2-thermal {
- polling-delay-passive = <250>;
- polling-delay = <1000>;
-
- thermal-sensors = <&tsens 7>;
-
- trips {
- cpu2_alert0: trip-point0 {
- temperature = <95000>;
- hysteresis = <2000>;
- type = "hot";
- };
- cpu2_alert1: trip-point1 {
- temperature = <105000>;
- hysteresis = <2000>;
- type = "passive";
- };
- cpu2_crit: cpu-crit {
- temperature = <120000>;
- hysteresis = <2000>;
- type = "critical";
- };
- };
- cooling-maps {
- map0 {
- trip = <&cpu2_alert1>;
- cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- };
- };
- };
-
- cpu3-thermal {
- polling-delay-passive = <250>;
- polling-delay = <1000>;
-
- thermal-sensors = <&tsens 8>;
-
- trips {
- cpu3_alert0: trip-point0 {
- temperature = <95000>;
- hysteresis = <2000>;
- type = "hot";
- };
- cpu3_alert1: trip-point1 {
- temperature = <105000>;
- hysteresis = <2000>;
- type = "passive";
- };
- cpu3_crit: cpu-crit {
- temperature = <120000>;
- hysteresis = <2000>;
- type = "critical";
- };
- };
- cooling-maps {
- map0 {
- trip = <&cpu3_alert1>;
- cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- };
- };
- };
-
- gpu-thermal {
- polling-delay-passive = <250>;
- polling-delay = <1000>;
-
- thermal-sensors = <&tsens 9>;
-
- trips {
- gpu_alert0: trip-point0 {
- temperature = <95000>;
- hysteresis = <2000>;
- type = "hot";
- };
- };
- };
- };
-};
diff --git a/arch/arm/dts/qrb4210-rb2-u-boot.dtsi b/arch/arm/dts/qrb4210-rb2-u-boot.dtsi
new file mode 100644
index 0000000..7d1375f
--- /dev/null
+++ b/arch/arm/dts/qrb4210-rb2-u-boot.dtsi
@@ -0,0 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0
+
+/* This is usually OTG but U-Boot doesn't support that properly */
+&usb_dwc3 {
+ dr_mode = "host";
+};
diff --git a/arch/arm/dts/r7s72100-gr-peach-u-boot.dts b/arch/arm/dts/r7s72100-gr-peach-u-boot.dtsi
similarity index 97%
rename from arch/arm/dts/r7s72100-gr-peach-u-boot.dts
rename to arch/arm/dts/r7s72100-gr-peach-u-boot.dtsi
index 0ae9f91..34fba29 100644
--- a/arch/arm/dts/r7s72100-gr-peach-u-boot.dts
+++ b/arch/arm/dts/r7s72100-gr-peach-u-boot.dtsi
@@ -5,7 +5,6 @@
* Copyright (C) 2019 Marek Vasut <marek.vasut@gmail.com>
*/
-#include "r7s72100-gr-peach.dts"
/ {
aliases {
diff --git a/arch/arm/dts/r8a774a1-hihope-rzg2m-u-boot.dts b/arch/arm/dts/r8a774a1-hihope-rzg2m-u-boot.dtsi
similarity index 91%
rename from arch/arm/dts/r8a774a1-hihope-rzg2m-u-boot.dts
rename to arch/arm/dts/r8a774a1-hihope-rzg2m-u-boot.dtsi
index b735e97..3ad619b 100644
--- a/arch/arm/dts/r8a774a1-hihope-rzg2m-u-boot.dts
+++ b/arch/arm/dts/r8a774a1-hihope-rzg2m-u-boot.dtsi
@@ -5,7 +5,6 @@
* Copyright (C) 2021 Renesas Electronics Corporation
*/
-#include "r8a774a1-hihope-rzg2m-ex.dts"
#include "r8a774a1-u-boot.dtsi"
&gpio3 {
diff --git a/arch/arm/dts/r8a774b1-hihope-rzg2n-u-boot.dts b/arch/arm/dts/r8a774b1-hihope-rzg2n-u-boot.dtsi
similarity index 91%
rename from arch/arm/dts/r8a774b1-hihope-rzg2n-u-boot.dts
rename to arch/arm/dts/r8a774b1-hihope-rzg2n-u-boot.dtsi
index 0bdc690..6f2f6c7 100644
--- a/arch/arm/dts/r8a774b1-hihope-rzg2n-u-boot.dts
+++ b/arch/arm/dts/r8a774b1-hihope-rzg2n-u-boot.dtsi
@@ -5,7 +5,6 @@
* Copyright (C) 2021 Renesas Electronics Corp.
*/
-#include "r8a774b1-hihope-rzg2n-ex.dts"
#include "r8a774b1-u-boot.dtsi"
&gpio3 {
diff --git a/arch/arm/dts/r8a774c0-ek874-u-boot.dts b/arch/arm/dts/r8a774c0-ek874-u-boot.dtsi
similarity index 94%
rename from arch/arm/dts/r8a774c0-ek874-u-boot.dts
rename to arch/arm/dts/r8a774c0-ek874-u-boot.dtsi
index 8fa6d80..dcdddd9 100644
--- a/arch/arm/dts/r8a774c0-ek874-u-boot.dts
+++ b/arch/arm/dts/r8a774c0-ek874-u-boot.dtsi
@@ -5,7 +5,6 @@
* Copyright (C) 2021 Renesas Electronisc Corporation
*/
-#include "r8a774c0-ek874.dts"
#include "r8a774c0-u-boot.dtsi"
/ {
diff --git a/arch/arm/dts/r8a774e1-hihope-rzg2h-u-boot.dts b/arch/arm/dts/r8a774e1-hihope-rzg2h-u-boot.dtsi
similarity index 91%
rename from arch/arm/dts/r8a774e1-hihope-rzg2h-u-boot.dts
rename to arch/arm/dts/r8a774e1-hihope-rzg2h-u-boot.dtsi
index 03a17ba..8e57e03 100644
--- a/arch/arm/dts/r8a774e1-hihope-rzg2h-u-boot.dts
+++ b/arch/arm/dts/r8a774e1-hihope-rzg2h-u-boot.dtsi
@@ -5,7 +5,6 @@
* Copyright (C) 2020 Renesas Electronics Corp.
*/
-#include "r8a774e1-hihope-rzg2h-ex.dts"
#include "r8a774e1-u-boot.dtsi"
&gpio3 {
diff --git a/arch/arm/dts/r8a7790-lager-u-boot.dts b/arch/arm/dts/r8a7790-lager-u-boot.dtsi
similarity index 90%
rename from arch/arm/dts/r8a7790-lager-u-boot.dts
rename to arch/arm/dts/r8a7790-lager-u-boot.dtsi
index 28b8b60..ed18917 100644
--- a/arch/arm/dts/r8a7790-lager-u-boot.dts
+++ b/arch/arm/dts/r8a7790-lager-u-boot.dtsi
@@ -5,7 +5,6 @@
* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
*/
-#include "r8a7790-lager.dts"
#include "r8a7790-u-boot.dtsi"
&scif0 {
diff --git a/arch/arm/dts/r8a7790-stout-u-boot.dts b/arch/arm/dts/r8a7790-stout-u-boot.dtsi
similarity index 90%
rename from arch/arm/dts/r8a7790-stout-u-boot.dts
rename to arch/arm/dts/r8a7790-stout-u-boot.dtsi
index 85bcb78..3b39304 100644
--- a/arch/arm/dts/r8a7790-stout-u-boot.dts
+++ b/arch/arm/dts/r8a7790-stout-u-boot.dtsi
@@ -5,7 +5,6 @@
* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
*/
-#include "r8a7790-stout.dts"
#include "r8a7790-u-boot.dtsi"
&scifa0 {
diff --git a/arch/arm/dts/r8a7791-koelsch-u-boot.dts b/arch/arm/dts/r8a7791-koelsch-u-boot.dtsi
similarity index 90%
rename from arch/arm/dts/r8a7791-koelsch-u-boot.dts
rename to arch/arm/dts/r8a7791-koelsch-u-boot.dtsi
index c5a1332..541c419 100644
--- a/arch/arm/dts/r8a7791-koelsch-u-boot.dts
+++ b/arch/arm/dts/r8a7791-koelsch-u-boot.dtsi
@@ -5,7 +5,6 @@
* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
*/
-#include "r8a7791-koelsch.dts"
#include "r8a7791-u-boot.dtsi"
&scif0 {
diff --git a/arch/arm/dts/r8a7791-porter-u-boot.dts b/arch/arm/dts/r8a7791-porter-u-boot.dtsi
similarity index 91%
rename from arch/arm/dts/r8a7791-porter-u-boot.dts
rename to arch/arm/dts/r8a7791-porter-u-boot.dtsi
index bfec1fc..cbf2c52 100644
--- a/arch/arm/dts/r8a7791-porter-u-boot.dts
+++ b/arch/arm/dts/r8a7791-porter-u-boot.dtsi
@@ -5,7 +5,6 @@
* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
*/
-#include "r8a7791-porter.dts"
#include "r8a7791-u-boot.dtsi"
&scif0 {
diff --git a/arch/arm/dts/r8a7792-blanche-u-boot.dts b/arch/arm/dts/r8a7792-blanche-u-boot.dtsi
similarity index 88%
rename from arch/arm/dts/r8a7792-blanche-u-boot.dts
rename to arch/arm/dts/r8a7792-blanche-u-boot.dtsi
index 1f33df8..8c36a3e 100644
--- a/arch/arm/dts/r8a7792-blanche-u-boot.dts
+++ b/arch/arm/dts/r8a7792-blanche-u-boot.dtsi
@@ -5,7 +5,6 @@
* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
*/
-#include "r8a7792-blanche.dts"
#include "r8a7792-u-boot.dtsi"
&iic3 {
diff --git a/arch/arm/dts/r8a7793-gose-u-boot.dts b/arch/arm/dts/r8a7793-gose-u-boot.dtsi
similarity index 91%
rename from arch/arm/dts/r8a7793-gose-u-boot.dts
rename to arch/arm/dts/r8a7793-gose-u-boot.dtsi
index dd0932c..41c4361 100644
--- a/arch/arm/dts/r8a7793-gose-u-boot.dts
+++ b/arch/arm/dts/r8a7793-gose-u-boot.dtsi
@@ -5,7 +5,6 @@
* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
*/
-#include "r8a7793-gose.dts"
#include "r8a7793-u-boot.dtsi"
&scif0 {
diff --git a/arch/arm/dts/r8a7794-alt-u-boot.dts b/arch/arm/dts/r8a7794-alt-u-boot.dtsi
similarity index 95%
rename from arch/arm/dts/r8a7794-alt-u-boot.dts
rename to arch/arm/dts/r8a7794-alt-u-boot.dtsi
index 0a39039..e156b4c 100644
--- a/arch/arm/dts/r8a7794-alt-u-boot.dts
+++ b/arch/arm/dts/r8a7794-alt-u-boot.dtsi
@@ -5,7 +5,6 @@
* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
*/
-#include "r8a7794-alt.dts"
#include "r8a7794-u-boot.dtsi"
&i2c7 {
diff --git a/arch/arm/dts/r8a7794-silk-u-boot.dts b/arch/arm/dts/r8a7794-silk-u-boot.dtsi
similarity index 91%
rename from arch/arm/dts/r8a7794-silk-u-boot.dts
rename to arch/arm/dts/r8a7794-silk-u-boot.dtsi
index 3fcb535..e448ea7 100644
--- a/arch/arm/dts/r8a7794-silk-u-boot.dts
+++ b/arch/arm/dts/r8a7794-silk-u-boot.dtsi
@@ -5,7 +5,6 @@
* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
*/
-#include "r8a7794-silk.dts"
#include "r8a7794-u-boot.dtsi"
&scif2 {
diff --git a/arch/arm/dts/r8a77950-salvator-x-u-boot.dts b/arch/arm/dts/r8a77950-salvator-x-u-boot.dts
deleted file mode 100644
index ba7cf52..0000000
--- a/arch/arm/dts/r8a77950-salvator-x-u-boot.dts
+++ /dev/null
@@ -1,60 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Device Tree Source extras for U-Boot for the Salvator-X board
- *
- * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
- */
-
-#include "r8a77950-salvator-x.dts"
-#include "r8a77950-u-boot.dtsi"
-
-/ {
- sysinfo {
- compatible = "renesas,rcar-sysinfo";
- i2c-eeprom = <&sysinfo_eeprom>;
- bootph-all;
- };
-};
-
-&i2c_dvfs {
- bootph-all;
-
- sysinfo_eeprom: eeprom@50 {
- bootph-all;
- status = "okay";
- };
-};
-
-&rpc {
- reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0x04000000>;
- status = "disabled";
-};
-
-&sdhi0 {
- sd-uhs-sdr12;
- sd-uhs-sdr25;
- sd-uhs-sdr104;
- max-frequency = <208000000>;
-};
-
-&sdhi2 {
- mmc-ddr-1_8v;
- mmc-hs200-1_8v;
- mmc-hs400-1_8v;
- max-frequency = <200000000>;
-};
-
-&sdhi3 {
- sd-uhs-sdr12;
- sd-uhs-sdr25;
- sd-uhs-sdr104;
- max-frequency = <208000000>;
-};
-
-&vcc_sdhi0 {
- u-boot,off-on-delay-us = <20000>;
-};
-
-&vcc_sdhi3 {
- u-boot,off-on-delay-us = <20000>;
-};
diff --git a/arch/arm/dts/r8a77950-ulcb-u-boot.dts b/arch/arm/dts/r8a77950-ulcb-u-boot.dts
deleted file mode 100644
index e371cde..0000000
--- a/arch/arm/dts/r8a77950-ulcb-u-boot.dts
+++ /dev/null
@@ -1,61 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Device Tree Source extras for U-Boot for the ULCB board
- *
- * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
- */
-
-#include "r8a77950-ulcb.dts"
-#include "r8a77950-u-boot.dtsi"
-
-/ {
- cpld {
- compatible = "renesas,ulcb-cpld";
- status = "okay";
- gpio-sck = <&gpio6 8 0>;
- gpio-mosi = <&gpio6 7 0>;
- gpio-miso = <&gpio6 10 0>;
- gpio-sstbz = <&gpio2 3 0>;
- };
-
- sysinfo {
- compatible = "renesas,rcar-sysinfo";
- i2c-eeprom = <&sysinfo_eeprom>;
- bootph-all;
- };
-};
-
-&i2c_dvfs {
- bootph-all;
-
- sysinfo_eeprom: eeprom@50 {
- compatible = "rohm,br24t01", "atmel,24c01";
- reg = <0x50>;
- pagesize = <8>;
- bootph-all;
- status = "okay";
- };
-};
-
-&rpc {
- reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0x04000000>;
- status = "disabled";
-};
-
-&sdhi0 {
- sd-uhs-sdr12;
- sd-uhs-sdr25;
- sd-uhs-sdr104;
- max-frequency = <208000000>;
-};
-
-&sdhi2 {
- mmc-ddr-1_8v;
- mmc-hs200-1_8v;
- mmc-hs400-1_8v;
- max-frequency = <200000000>;
-};
-
-&vcc_sdhi0 {
- u-boot,off-on-delay-us = <20000>;
-};
diff --git a/arch/arm/dts/r8a77960-salvator-x-u-boot.dts b/arch/arm/dts/r8a77951-salvator-x-u-boot.dtsi
similarity index 92%
copy from arch/arm/dts/r8a77960-salvator-x-u-boot.dts
copy to arch/arm/dts/r8a77951-salvator-x-u-boot.dtsi
index 2a9f0aa..744f4aa 100644
--- a/arch/arm/dts/r8a77960-salvator-x-u-boot.dts
+++ b/arch/arm/dts/r8a77951-salvator-x-u-boot.dtsi
@@ -5,8 +5,7 @@
* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
*/
-#include "r8a77960-salvator-x.dts"
-#include "r8a77960-u-boot.dtsi"
+#include "r8a77951-u-boot.dtsi"
/ {
sysinfo {
diff --git a/arch/arm/dts/r8a77950-u-boot.dtsi b/arch/arm/dts/r8a77951-u-boot.dtsi
similarity index 93%
rename from arch/arm/dts/r8a77950-u-boot.dtsi
rename to arch/arm/dts/r8a77951-u-boot.dtsi
index 92907ea..4cbec59 100644
--- a/arch/arm/dts/r8a77950-u-boot.dtsi
+++ b/arch/arm/dts/r8a77951-u-boot.dtsi
@@ -30,7 +30,6 @@
/delete-node/ &can1;
/delete-node/ &canfd;
/delete-node/ &csi20;
-/delete-node/ &csi21;
/delete-node/ &csi40;
/delete-node/ &csi41;
/delete-node/ &drif00;
@@ -44,16 +43,13 @@
/delete-node/ &du;
/delete-node/ &fcpf0;
/delete-node/ &fcpf1;
-/delete-node/ &fcpf2;
/delete-node/ &fcpvb0;
/delete-node/ &fcpvb1;
/delete-node/ &fcpvd0;
/delete-node/ &fcpvd1;
/delete-node/ &fcpvd2;
-/delete-node/ &fcpvd3;
/delete-node/ &fcpvi0;
/delete-node/ &fcpvi1;
-/delete-node/ &fcpvi2;
/delete-node/ &hdmi0;
/delete-node/ &hdmi1;
/delete-node/ &lvds0;
@@ -72,10 +68,8 @@
/delete-node/ &vspd0;
/delete-node/ &vspd1;
/delete-node/ &vspd2;
-/delete-node/ &vspd3;
/delete-node/ &vspi0;
/delete-node/ &vspi1;
-/delete-node/ &vspi2;
/ {
/delete-node/ cvbs-in;
diff --git a/arch/arm/dts/r8a77960-ulcb-u-boot.dts b/arch/arm/dts/r8a77951-ulcb-u-boot.dtsi
similarity index 93%
copy from arch/arm/dts/r8a77960-ulcb-u-boot.dts
copy to arch/arm/dts/r8a77951-ulcb-u-boot.dtsi
index 79042b2..305c486 100644
--- a/arch/arm/dts/r8a77960-ulcb-u-boot.dts
+++ b/arch/arm/dts/r8a77951-ulcb-u-boot.dtsi
@@ -5,8 +5,7 @@
* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
*/
-#include "r8a77960-ulcb.dts"
-#include "r8a77960-u-boot.dtsi"
+#include "r8a77951-u-boot.dtsi"
/ {
cpld {
diff --git a/arch/arm/dts/r8a77960-salvator-x-u-boot.dts b/arch/arm/dts/r8a77960-salvator-x-u-boot.dtsi
similarity index 95%
rename from arch/arm/dts/r8a77960-salvator-x-u-boot.dts
rename to arch/arm/dts/r8a77960-salvator-x-u-boot.dtsi
index 2a9f0aa..84a28bf 100644
--- a/arch/arm/dts/r8a77960-salvator-x-u-boot.dts
+++ b/arch/arm/dts/r8a77960-salvator-x-u-boot.dtsi
@@ -5,7 +5,6 @@
* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
*/
-#include "r8a77960-salvator-x.dts"
#include "r8a77960-u-boot.dtsi"
/ {
diff --git a/arch/arm/dts/r8a77960-ulcb-u-boot.dts b/arch/arm/dts/r8a77960-ulcb-u-boot.dtsi
similarity index 96%
rename from arch/arm/dts/r8a77960-ulcb-u-boot.dts
rename to arch/arm/dts/r8a77960-ulcb-u-boot.dtsi
index 79042b2..6372f95 100644
--- a/arch/arm/dts/r8a77960-ulcb-u-boot.dts
+++ b/arch/arm/dts/r8a77960-ulcb-u-boot.dtsi
@@ -5,7 +5,6 @@
* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
*/
-#include "r8a77960-ulcb.dts"
#include "r8a77960-u-boot.dtsi"
/ {
diff --git a/arch/arm/dts/r8a77965-salvator-x-u-boot.dts b/arch/arm/dts/r8a77965-salvator-x-u-boot.dtsi
similarity index 95%
rename from arch/arm/dts/r8a77965-salvator-x-u-boot.dts
rename to arch/arm/dts/r8a77965-salvator-x-u-boot.dtsi
index e5421f9..d9a28fe 100644
--- a/arch/arm/dts/r8a77965-salvator-x-u-boot.dts
+++ b/arch/arm/dts/r8a77965-salvator-x-u-boot.dtsi
@@ -5,7 +5,6 @@
* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
*/
-#include "r8a77965-salvator-x.dts"
#include "r8a77965-u-boot.dtsi"
/ {
diff --git a/arch/arm/dts/r8a77965-ulcb-u-boot.dts b/arch/arm/dts/r8a77965-ulcb-u-boot.dtsi
similarity index 96%
rename from arch/arm/dts/r8a77965-ulcb-u-boot.dts
rename to arch/arm/dts/r8a77965-ulcb-u-boot.dtsi
index 969911d..aa5de3d 100644
--- a/arch/arm/dts/r8a77965-ulcb-u-boot.dts
+++ b/arch/arm/dts/r8a77965-ulcb-u-boot.dtsi
@@ -5,7 +5,6 @@
* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
*/
-#include "r8a77965-ulcb.dts"
#include "r8a77965-u-boot.dtsi"
/ {
diff --git a/arch/arm/dts/r8a77970-eagle-u-boot.dts b/arch/arm/dts/r8a77970-eagle-u-boot.dtsi
similarity index 96%
rename from arch/arm/dts/r8a77970-eagle-u-boot.dts
rename to arch/arm/dts/r8a77970-eagle-u-boot.dtsi
index eb868ed..c7971b9 100644
--- a/arch/arm/dts/r8a77970-eagle-u-boot.dts
+++ b/arch/arm/dts/r8a77970-eagle-u-boot.dtsi
@@ -5,7 +5,6 @@
* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
*/
-#include "r8a77970-eagle.dts"
#include "r8a77970-u-boot.dtsi"
#include <dt-bindings/gpio/gpio.h>
diff --git a/arch/arm/dts/r8a77970-v3msk-u-boot.dts b/arch/arm/dts/r8a77970-v3msk-u-boot.dtsi
similarity index 96%
rename from arch/arm/dts/r8a77970-v3msk-u-boot.dts
rename to arch/arm/dts/r8a77970-v3msk-u-boot.dtsi
index 6ee06d7..c7b2e07 100644
--- a/arch/arm/dts/r8a77970-v3msk-u-boot.dts
+++ b/arch/arm/dts/r8a77970-v3msk-u-boot.dtsi
@@ -5,7 +5,6 @@
* Copyright (C) 2019 Cogent Embedded, Inc.
*/
-#include "r8a77970-v3msk.dts"
#include "r8a77970-u-boot.dtsi"
#include <dt-bindings/gpio/gpio.h>
diff --git a/arch/arm/dts/r8a77980-condor-u-boot.dts b/arch/arm/dts/r8a77980-condor-u-boot.dtsi
similarity index 96%
rename from arch/arm/dts/r8a77980-condor-u-boot.dts
rename to arch/arm/dts/r8a77980-condor-u-boot.dtsi
index f4a3b43..34a735a 100644
--- a/arch/arm/dts/r8a77980-condor-u-boot.dts
+++ b/arch/arm/dts/r8a77980-condor-u-boot.dtsi
@@ -5,7 +5,6 @@
* Copyright (C) 2019 Marek Vasut <marek.vasut@gmail.com>
*/
-#include "r8a77980-condor.dts"
#include "r8a77980-u-boot.dtsi"
/ {
diff --git a/arch/arm/dts/r8a77980-v3hsk-u-boot.dts b/arch/arm/dts/r8a77980-v3hsk-u-boot.dtsi
similarity index 95%
rename from arch/arm/dts/r8a77980-v3hsk-u-boot.dts
rename to arch/arm/dts/r8a77980-v3hsk-u-boot.dtsi
index d083df6..2901d0e 100644
--- a/arch/arm/dts/r8a77980-v3hsk-u-boot.dts
+++ b/arch/arm/dts/r8a77980-v3hsk-u-boot.dtsi
@@ -5,7 +5,6 @@
* Copyright (C) 2019 Cogent Embedded, Inc.
*/
-#include "r8a77980-v3hsk.dts"
#include "r8a77980-u-boot.dtsi"
/ {
diff --git a/arch/arm/dts/r8a77990-ebisu-u-boot.dts b/arch/arm/dts/r8a77990-ebisu-u-boot.dtsi
similarity index 96%
rename from arch/arm/dts/r8a77990-ebisu-u-boot.dts
rename to arch/arm/dts/r8a77990-ebisu-u-boot.dtsi
index fc1c4a7..b6b7b8f 100644
--- a/arch/arm/dts/r8a77990-ebisu-u-boot.dts
+++ b/arch/arm/dts/r8a77990-ebisu-u-boot.dtsi
@@ -5,7 +5,6 @@
* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
*/
-#include "r8a77990-ebisu.dts"
#include "r8a77990-u-boot.dtsi"
/ {
diff --git a/arch/arm/dts/r8a77995-draak-u-boot.dts b/arch/arm/dts/r8a77995-draak-u-boot.dtsi
similarity index 94%
rename from arch/arm/dts/r8a77995-draak-u-boot.dts
rename to arch/arm/dts/r8a77995-draak-u-boot.dtsi
index 41ceae1..1922c40 100644
--- a/arch/arm/dts/r8a77995-draak-u-boot.dts
+++ b/arch/arm/dts/r8a77995-draak-u-boot.dtsi
@@ -5,7 +5,6 @@
* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
*/
-#include "r8a77995-draak.dts"
#include "r8a77995-u-boot.dtsi"
/ {
diff --git a/arch/arm/dts/r8a779a0-falcon-u-boot.dts b/arch/arm/dts/r8a779a0-falcon-u-boot.dtsi
similarity index 93%
rename from arch/arm/dts/r8a779a0-falcon-u-boot.dts
rename to arch/arm/dts/r8a779a0-falcon-u-boot.dtsi
index 9d28791..3b8a017 100644
--- a/arch/arm/dts/r8a779a0-falcon-u-boot.dts
+++ b/arch/arm/dts/r8a779a0-falcon-u-boot.dtsi
@@ -5,7 +5,6 @@
* Copyright (C) 2020 Renesas Electronics Corp.
*/
-#include "r8a779a0-falcon.dts"
#include "r8a779a0-u-boot.dtsi"
/ {
diff --git a/arch/arm/dts/r8a779f0-spider-u-boot.dts b/arch/arm/dts/r8a779f0-spider-u-boot.dtsi
similarity index 95%
rename from arch/arm/dts/r8a779f0-spider-u-boot.dts
rename to arch/arm/dts/r8a779f0-spider-u-boot.dtsi
index 26fc8bc..2fc7e77 100644
--- a/arch/arm/dts/r8a779f0-spider-u-boot.dts
+++ b/arch/arm/dts/r8a779f0-spider-u-boot.dtsi
@@ -5,7 +5,6 @@
* Copyright (C) 2021 Renesas Electronics Corp.
*/
-#include "r8a779f0-spider.dts"
#include "r8a779f0-u-boot.dtsi"
/ {
diff --git a/arch/arm/dts/r8a779g0-white-hawk-u-boot.dts b/arch/arm/dts/r8a779g0-white-hawk-u-boot.dtsi
similarity index 94%
rename from arch/arm/dts/r8a779g0-white-hawk-u-boot.dts
rename to arch/arm/dts/r8a779g0-white-hawk-u-boot.dtsi
index bd75603..a102639 100644
--- a/arch/arm/dts/r8a779g0-white-hawk-u-boot.dts
+++ b/arch/arm/dts/r8a779g0-white-hawk-u-boot.dtsi
@@ -5,7 +5,6 @@
* Copyright (C) 2021 Renesas Electronics Corp.
*/
-#include "r8a779g0-white-hawk.dts"
#include "r8a779g0-u-boot.dtsi"
/ {
diff --git a/arch/arm/dts/r8a779h0-gray-hawk-u-boot.dts b/arch/arm/dts/r8a779h0-gray-hawk-u-boot.dtsi
similarity index 94%
rename from arch/arm/dts/r8a779h0-gray-hawk-u-boot.dts
rename to arch/arm/dts/r8a779h0-gray-hawk-u-boot.dtsi
index 935ba94..92c1315 100644
--- a/arch/arm/dts/r8a779h0-gray-hawk-u-boot.dts
+++ b/arch/arm/dts/r8a779h0-gray-hawk-u-boot.dtsi
@@ -5,7 +5,6 @@
* Copyright (C) 2023 Renesas Electronics Corp.
*/
-#include "r8a779h0-gray-hawk.dts"
#include "r8a779h0-u-boot.dtsi"
/ {
diff --git a/arch/arm/dts/rk3288-phycore-rdk-u-boot.dtsi b/arch/arm/dts/rk3288-phycore-rdk-u-boot.dtsi
index 383b383..12096ee 100644
--- a/arch/arm/dts/rk3288-phycore-rdk-u-boot.dtsi
+++ b/arch/arm/dts/rk3288-phycore-rdk-u-boot.dtsi
@@ -2,6 +2,16 @@
#include "rk3288-u-boot.dtsi"
+/ {
+ aliases {
+ eeprom0 = &i2c_eeprom_id;
+ };
+
+ chosen {
+ stdout-path = &uart2;
+ };
+};
+
&dmc {
rockchip,num-channels = <2>;
rockchip,pctl-timing = <0x29a 0xc8 0x1f8 0x42 0x4e 0x4 0xea 0xa
@@ -29,6 +39,15 @@
bootph-all;
};
};
+
+ /* M24C32-D Identification page */
+ i2c_eeprom_id: eeprom@58 {
+ bootph-all;
+
+ compatible = "atmel,24c32";
+ reg = <0x58>;
+ pagesize = <32>;
+ };
};
&pinctrl {
diff --git a/arch/arm/dts/rk3288-phycore-rdk.dts b/arch/arm/dts/rk3288-phycore-rdk.dts
deleted file mode 100644
index ebea8e6..0000000
--- a/arch/arm/dts/rk3288-phycore-rdk.dts
+++ /dev/null
@@ -1,271 +0,0 @@
-/*
- * Device tree file for Phytec PCM-947 carrier board
- * Copyright (C) 2017 PHYTEC Messtechnik GmbH
- * Author: Wadim Egorov <w.egorov@phytec.de>
- *
- * This file is dual-licensed: you can use it either under the terms
- * of the GPL or the X11 license, at your option. Note that this dual
- * licensing only applies to this file, and not this project as a
- * whole.
- *
- * a) This file is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or (at your option) any later version.
- *
- * This file is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * Or, alternatively,
- *
- * b) Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use,
- * copy, modify, merge, publish, distribute, sublicense, and/or
- * sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following
- * conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
- * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- */
-
-/dts-v1/;
-
-#include <dt-bindings/input/input.h>
-#include "rk3288-phycore-som.dtsi"
-
-/ {
- model = "Phytec RK3288 PCM-947";
- compatible = "phytec,rk3288-pcm-947", "phytec,rk3288-phycore-som", "rockchip,rk3288";
-
- chosen {
- stdout-path = &uart2;
- };
-
- user_buttons: user-buttons {
- compatible = "gpio-keys";
- pinctrl-names = "default";
- pinctrl-0 = <&user_button_pins>;
-
- button@0 {
- label = "home";
- linux,code = <KEY_HOME>;
- gpios = <&gpio8 0 GPIO_ACTIVE_HIGH>;
- wakeup-source;
- };
-
- button@1 {
- label = "menu";
- linux,code = <KEY_MENU>;
- gpios = <&gpio8 3 GPIO_ACTIVE_HIGH>;
- wakeup-source;
- };
- };
-
- vcc_host0_5v: usb-host0-regulator {
- compatible = "regulator-fixed";
- gpio = <&gpio2 13 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&host0_vbus_drv>;
- regulator-name = "vcc_host0_5v";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- regulator-always-on;
- vin-supply = <&vdd_in_otg_out>;
- };
-
- vcc_host1_5v: usb-host1-regulator {
- compatible = "regulator-fixed";
- gpio = <&gpio2 0 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&host1_vbus_drv>;
- regulator-name = "vcc_host1_5v";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- regulator-always-on;
- vin-supply = <&vdd_in_otg_out>;
- };
-
- vcc_otg_5v: usb-otg-regulator {
- compatible = "regulator-fixed";
- gpio = <&gpio2 12 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&otg_vbus_drv>;
- regulator-name = "vcc_otg_5v";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- regulator-always-on;
- vin-supply = <&vdd_in_otg_out>;
- };
-};
-
-&gmac {
- status = "okay";
-};
-
-&hdmi {
- status = "okay";
-};
-
-&i2c1 {
- status = "okay";
-
- touchscreen@44 {
- compatible = "st,stmpe811";
- reg = <0x44>;
- };
-
- adc@64 {
- compatible = "maxim,max1037";
- reg = <0x64>;
- };
-
- i2c_rtc: rtc@68 {
- compatible = "rv4162";
- reg = <0x68>;
- pinctrl-names = "default";
- pinctrl-0 = <&i2c_rtc_int>;
- interrupt-parent = <&gpio5>;
- interrupts = <10 0>;
- };
-};
-
-&i2c3 {
- status = "okay";
-
- i2c_eeprom_cb: eeprom@51 {
- compatible = "atmel,24c32";
- reg = <0x51>;
- pagesize = <32>;
- };
-};
-
-&i2c4 {
- status = "okay";
-};
-
-&i2c5 {
- status = "okay";
-};
-
-&pinctrl {
- pcfg_pull_up_drv_12ma: pcfg-pull-up-drv-12ma {
- bias-pull-up;
- drive-strength = <12>;
- };
-
- buttons {
- user_button_pins: user-button-pins {
- /* button 1 */
- rockchip,pins = <8 3 RK_FUNC_GPIO &pcfg_pull_up>,
- /* button 2 */
- <8 0 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-
- rv4162 {
- i2c_rtc_int: i2c-rtc-int {
- rockchip,pins = <5 10 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-
- sdmmc {
- /*
- * Default drive strength isn't enough to achieve even
- * high-speed mode on pcm-947 board so bump up to 12 mA.
- */
- sdmmc_bus4: sdmmc-bus4 {
- rockchip,pins = <6 16 RK_FUNC_1 &pcfg_pull_up_drv_12ma>,
- <6 17 RK_FUNC_1 &pcfg_pull_up_drv_12ma>,
- <6 18 RK_FUNC_1 &pcfg_pull_up_drv_12ma>,
- <6 19 RK_FUNC_1 &pcfg_pull_up_drv_12ma>;
- };
-
- sdmmc_clk: sdmmc-clk {
- rockchip,pins = <6 20 RK_FUNC_1 &pcfg_pull_none_12ma>;
- };
-
- sdmmc_cmd: sdmmc-cmd {
- rockchip,pins = <6 21 RK_FUNC_1 &pcfg_pull_up_drv_12ma>;
- };
-
- sdmmc_pwr: sdmmc-pwr {
- rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- touchscreen {
- ts_irq_pin: ts-irq-pin {
- rockchip,pins = <5 15 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- usb_host {
- host0_vbus_drv: host0-vbus-drv {
- rockchip,pins = <2 13 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- host1_vbus_drv: host1-vbus-drv {
- rockchip,pins = <2 0 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- usb_otg {
- otg_vbus_drv: otg-vbus-drv {
- rockchip,pins = <2 12 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-};
-
-&sdmmc {
- bus-width = <4>;
- cap-mmc-highspeed;
- cap-sd-highspeed;
- card-detect-delay = <200>;
- disable-wp;
- num-slots = <1>;
- pinctrl-names = "default";
- pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
- vmmc-supply = <&vdd_io_sd>;
- vqmmc-supply = <&vdd_io_sd>;
- status = "okay";
-};
-
-&uart0 {
- pinctrl-names = "default";
- pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
- status = "okay";
-};
-
-&uart2 {
- status = "okay";
-};
-
-&usbphy {
- status = "okay";
-};
-
-&usb_host0_ehci {
- status = "okay";
-};
-
-&usb_host1 {
- status = "okay";
-};
-
-&usb_otg {
- status = "okay";
-};
diff --git a/arch/arm/dts/rk3288-phycore-som.dtsi b/arch/arm/dts/rk3288-phycore-som.dtsi
deleted file mode 100644
index bde5910..0000000
--- a/arch/arm/dts/rk3288-phycore-som.dtsi
+++ /dev/null
@@ -1,506 +0,0 @@
-/*
- * Device tree file for Phytec phyCORE-RK3288 SoM
- * Copyright (C) 2017 PHYTEC Messtechnik GmbH
- * Author: Wadim Egorov <w.egorov@phytec.de>
- *
- * This file is dual-licensed: you can use it either under the terms
- * of the GPL or the X11 license, at your option. Note that this dual
- * licensing only applies to this file, and not this project as a
- * whole.
- *
- * a) This file is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or (at your option) any later version.
- *
- * This file is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * Or, alternatively,
- *
- * b) Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use,
- * copy, modify, merge, publish, distribute, sublicense, and/or
- * sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following
- * conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
- * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#include <dt-bindings/net/ti-dp83867.h>
-#include "rk3288.dtsi"
-
-/ {
- model = "Phytec RK3288 phyCORE";
- compatible = "phytec,rk3288-phycore-som", "rockchip,rk3288";
-
- /*
- * Set the minimum memory size here and
- * let the bootloader set the real size.
- */
- memory {
- device_type = "memory";
- reg = <0x0 0x0 0x0 0x80000000>;
- };
-
- aliases {
- rtc0 = &i2c_rtc;
- rtc1 = &rk818;
- eeprom0 = &i2c_eeprom_id;
- };
-
- ext_gmac: external-gmac-clock {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <125000000>;
- clock-output-names = "ext_gmac";
- };
-
- leds: user-leds {
- compatible = "gpio-leds";
- pinctrl-names = "default";
- pinctrl-0 = <&user_led>;
-
- user {
- label = "green_led";
- gpios = <&gpio7 2 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "heartbeat";
- default-state = "keep";
- };
- };
-
- vdd_emmc_io: vdd-emmc-io {
- compatible = "regulator-fixed";
- regulator-name = "vdd_emmc_io";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vdd_3v3_io>;
- };
-
- vdd_in_otg_out: vdd-in-otg-out {
- compatible = "regulator-fixed";
- regulator-name = "vdd_in_otg_out";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- };
-
- vdd_misc_1v8: vdd-misc-1v8 {
- compatible = "regulator-fixed";
- regulator-name = "vdd_misc_1v8";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- };
-};
-
-&cpu0 {
- cpu0-supply = <&vdd_cpu>;
- operating-points = <
- /* KHz uV */
- 1800000 1400000
- 1608000 1350000
- 1512000 1300000
- 1416000 1200000
- 1200000 1100000
- 1008000 1050000
- 816000 1000000
- 696000 950000
- 600000 900000
- 408000 900000
- 312000 900000
- 216000 900000
- 126000 900000
- >;
-};
-
-&emmc {
- status = "okay";
- bus-width = <8>;
- cap-mmc-highspeed;
- disable-wp;
- non-removable;
- num-slots = <1>;
- pinctrl-names = "default";
- pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_pwr &emmc_bus8>;
- vmmc-supply = <&vdd_3v3_io>;
- vqmmc-supply = <&vdd_emmc_io>;
-};
-
-&gmac {
- assigned-clocks = <&cru SCLK_MAC>;
- assigned-clock-parents = <&ext_gmac>;
- clock_in_out = "input";
- pinctrl-names = "default";
- pinctrl-0 = <&rgmii_pins &phy_rst &phy_int>;
- phy-handle = <&phy0>;
- phy-supply = <&vdd_eth_2v5>;
- phy-mode = "rgmii-id";
- snps,reset-active-low;
- snps,reset-delays-us = <0 10000 1000000>;
- snps,reset-gpio = <&gpio4 8 GPIO_ACTIVE_HIGH>;
- tx_delay = <0x0>;
- rx_delay = <0x0>;
-
- mdio0 {
- compatible = "snps,dwmac-mdio";
- #address-cells = <1>;
- #size-cells = <0>;
-
- phy0: ethernet-phy@0 {
- compatible = "ethernet-phy-ieee802.3-c22";
- reg = <0>;
- interrupt-parent = <&gpio4>;
- interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
- ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
- ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
- ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
- enet-phy-lane-no-swap;
- };
- };
-};
-
-&hdmi {
- ddc-i2c-bus = <&i2c5>;
-};
-
-&io_domains {
- audio-supply = <&vdd_3v3_io>;
- bb-supply = <&vdd_3v3_io>;
- dvp-supply = <&vdd_3v3_io>;
- flash0-supply = <&vdd_emmc_io>;
- flash1-supply = <&vdd_misc_1v8>;
- gpio1830-supply = <&vdd_3v3_io>;
- gpio30-supply = <&vdd_3v3_io>;
- lcdc-supply = <&vdd_3v3_io>;
- sdcard-supply = <&vdd_io_sd>;
- wifi-supply = <&vdd_3v3_io>;
- status = "okay";
-};
-
-&i2c0 {
- status = "okay";
- clock-frequency = <400000>;
-
- rk818: pmic@1c {
- status = "okay";
- compatible = "rockchip,rk818";
- reg = <0x1c>;
- interrupt-parent = <&gpio0>;
- interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
- pinctrl-names = "default";
- pinctrl-0 = <&pmic_int>;
- rockchip,system-power-controller;
- wakeup-source;
- #clock-cells = <1>;
-
- vcc1-supply = <&vdd_sys>;
- vcc2-supply = <&vdd_sys>;
- vcc3-supply = <&vdd_sys>;
- vcc4-supply = <&vdd_sys>;
- boost-supply = <&vdd_in_otg_out>;
- vcc6-supply = <&vdd_sys>;
- vcc7-supply = <&vdd_misc_1v8>;
- vcc8-supply = <&vdd_misc_1v8>;
- vcc9-supply = <&vdd_3v3_io>;
- vddio-supply = <&vdd_3v3_io>;
-
- regulators {
- vdd_log: DCDC_REG1 {
- regulator-name = "vdd_log";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1100000>;
- regulator-max-microvolt = <1100000>;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_gpu: DCDC_REG2 {
- regulator-name = "vdd_gpu";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <800000>;
- regulator-max-microvolt = <1250000>;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1000000>;
- };
- };
-
- vcc_ddr: DCDC_REG3 {
- regulator-name = "vcc_ddr";
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-on-in-suspend;
- };
- };
-
- vdd_3v3_io: DCDC_REG4 {
- regulator-name = "vdd_3v3_io";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <3300000>;
- };
- };
-
- vdd_sys: DCDC_BOOST {
- regulator-name = "vdd_sys";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <5000000>;
- };
- };
-
- /* vcc9 */
- vdd_sd: SWITCH_REG {
- regulator-name = "vdd_sd";
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- /* vcc6 */
- vdd_eth_2v5: LDO_REG2 {
- regulator-name = "vdd_eth_2v5";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <2500000>;
- regulator-max-microvolt = <2500000>;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <2500000>;
- };
- };
-
- /* vcc7 */
- vdd_1v0: LDO_REG3 {
- regulator-name = "vdd_1v0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1000000>;
- regulator-max-microvolt = <1000000>;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1000000>;
- };
- };
-
- /* vcc8 */
- vdd_1v8_lcd_ldo: LDO_REG4 {
- regulator-name = "vdd_1v8_lcd_ldo";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- /* vcc8 */
- vdd_1v0_lcd: LDO_REG6 {
- regulator-name = "vdd_1v0_lcd";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1000000>;
- regulator-max-microvolt = <1000000>;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1000000>;
- };
- };
-
- /* vcc7 */
- vdd_1v8_ldo: LDO_REG7 {
- regulator-name = "vdd_1v8_ldo";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-state-mem {
- regulator-off-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- /* vcc9 */
- vdd_io_sd: LDO_REG9 {
- regulator-name = "vdd_io_sd";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <3300000>;
- };
- };
- };
- };
-
- /* M24C32-D */
- i2c_eeprom: eeprom@50 {
- compatible = "atmel,24c32";
- reg = <0x50>;
- pagesize = <32>;
- };
-
- /* M24C32-D Identification page */
- i2c_eeprom_id: eeprom@58 {
- compatible = "atmel,24c32";
- reg = <0x58>;
- pagesize = <32>;
- };
-
- vdd_cpu: regulator@60 {
- compatible = "fcs,fan53555";
- reg = <0x60>;
- fcs,suspend-voltage-selector = <1>;
- regulator-always-on;
- regulator-boot-on;
- regulator-enable-ramp-delay = <300>;
- regulator-name = "vdd_cpu";
- regulator-min-microvolt = <800000>;
- regulator-max-microvolt = <1430000>;
- regulator-ramp-delay = <8000>;
- vin-supply = <&vdd_sys>;
- };
-};
-
-&pinctrl {
- pcfg_output_high: pcfg-output-high {
- output-high;
- };
-
- emmc {
- /*
- * We run eMMC at max speed; bump up drive strength.
- * We also have external pulls, so disable the internal ones.
- */
- emmc_clk: emmc-clk {
- rockchip,pins = <3 18 RK_FUNC_2 &pcfg_pull_none_12ma>;
- };
-
- emmc_cmd: emmc-cmd {
- rockchip,pins = <3 16 RK_FUNC_2 &pcfg_pull_none_12ma>;
- };
-
- emmc_bus8: emmc-bus8 {
- rockchip,pins = <3 0 RK_FUNC_2 &pcfg_pull_none_12ma>,
- <3 1 RK_FUNC_2 &pcfg_pull_none_12ma>,
- <3 2 RK_FUNC_2 &pcfg_pull_none_12ma>,
- <3 3 RK_FUNC_2 &pcfg_pull_none_12ma>,
- <3 4 RK_FUNC_2 &pcfg_pull_none_12ma>,
- <3 5 RK_FUNC_2 &pcfg_pull_none_12ma>,
- <3 6 RK_FUNC_2 &pcfg_pull_none_12ma>,
- <3 7 RK_FUNC_2 &pcfg_pull_none_12ma>;
- };
- };
-
- gmac {
- phy_int: phy-int {
- rockchip,pins = <4 2 RK_FUNC_GPIO &pcfg_pull_up>;
- };
-
- phy_rst: phy-rst {
- rockchip,pins = <4 8 RK_FUNC_GPIO &pcfg_output_high>;
- };
- };
-
- leds {
- user_led: user-led {
- rockchip,pins = <7 2 RK_FUNC_GPIO &pcfg_output_high>;
- };
- };
-
- pmic {
- pmic_int: pmic-int {
- rockchip,pins = <RK_GPIO0 4 RK_FUNC_GPIO &pcfg_pull_up>;
- };
-
- /* Pin for switching state between sleep and non-sleep state */
- pmic_sleep: pmic-sleep {
- rockchip,pins = <RK_GPIO0 0 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-};
-
-&pwm1 {
- status = "okay";
-};
-
-&saradc {
- status = "okay";
- vref-supply = <&vdd_1v8_ldo>;
-};
-
-&spi2 {
- status = "okay";
-
- serial_flash: flash@0 {
- compatible = "micron,n25q128a13", "jedec,spi-nor";
- reg = <0x0>;
- spi-max-frequency = <50000000>;
- m25p,fast-read;
- #address-cells = <1>;
- #size-cells = <1>;
- status = "okay";
- };
-};
-
-&tsadc {
- status = "okay";
- rockchip,hw-tshut-mode = <0>;
- rockchip,hw-tshut-polarity = <0>;
-};
-
-&vopb {
- status = "okay";
-};
-
-&vopb_mmu {
- status = "okay";
-};
-
-&vopl {
- status = "okay";
-};
-
-&vopl_mmu {
- status = "okay";
-};
-
-&wdt {
- status = "okay";
-};
diff --git a/arch/arm/dts/rk3308-evb-u-boot.dtsi b/arch/arm/dts/rk3308-evb-u-boot.dtsi
index d15ba94..007a69f 100644
--- a/arch/arm/dts/rk3308-evb-u-boot.dtsi
+++ b/arch/arm/dts/rk3308-evb-u-boot.dtsi
@@ -4,14 +4,11 @@
*/
#include "rk3308-u-boot.dtsi"
-/ {
- chosen {
- u-boot,spl-boot-order = "same-as-spl", &emmc;
- };
-};
-
&uart4 {
bootph-all;
clock-frequency = <24000000>;
- status = "okay";
+};
+
+&uart4_xfer {
+ bootph-all;
};
diff --git a/arch/arm/dts/rk3308-evb.dts b/arch/arm/dts/rk3308-evb.dts
index 124a240..184b84f 100644
--- a/arch/arm/dts/rk3308-evb.dts
+++ b/arch/arm/dts/rk3308-evb.dts
@@ -23,7 +23,7 @@
poll-interval = <100>;
keyup-threshold-microvolt = <1800000>;
- func-key {
+ button-func {
linux,code = <KEY_FN>;
label = "function";
press-threshold-microvolt = <18000>;
@@ -37,31 +37,31 @@
poll-interval = <100>;
keyup-threshold-microvolt = <1800000>;
- esc-key {
+ button-esc {
linux,code = <KEY_MICMUTE>;
label = "micmute";
press-threshold-microvolt = <1130000>;
};
- home-key {
+ button-home {
linux,code = <KEY_MODE>;
label = "mode";
press-threshold-microvolt = <901000>;
};
- menu-key {
+ button-menu {
linux,code = <KEY_PLAY>;
label = "play";
press-threshold-microvolt = <624000>;
};
- vol-down-key {
+ button-down {
linux,code = <KEY_VOLUMEDOWN>;
label = "volume down";
press-threshold-microvolt = <300000>;
};
- vol-up-key {
+ button-up {
linux,code = <KEY_VOLUMEUP>;
label = "volume up";
press-threshold-microvolt = <18000>;
@@ -75,34 +75,84 @@
pinctrl-names = "default";
pinctrl-0 = <&pwr_key>;
- power {
+ key-power {
gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_LOW>;
linux,code = <KEY_POWER>;
label = "GPIO Key Power";
- wakeup-source;
debounce-interval = <100>;
+ wakeup-source;
};
};
vcc12v_dcin: vcc12v-dcin {
compatible = "regulator-fixed";
regulator-name = "vcc12v_dcin";
- regulator-always-on;
- regulator-boot-on;
regulator-min-microvolt = <12000000>;
regulator-max-microvolt = <12000000>;
+ regulator-always-on;
+ regulator-boot-on;
};
vcc5v0_sys: vcc5v0-sys {
compatible = "regulator-fixed";
regulator-name = "vcc5v0_sys";
- regulator-always-on;
- regulator-boot-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ regulator-boot-on;
vin-supply = <&vcc12v_dcin>;
};
+ vccio_sdio: vcc_1v8: vcc-1v8 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_1v8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ regulator-boot-on;
+ vin-supply = <&vcc_io>;
+ };
+
+ vcc_ddr: vcc-ddr {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_ddr";
+ regulator-min-microvolt = <1500000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-always-on;
+ regulator-boot-on;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ vcc_io: vcc-io {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_io";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ regulator-boot-on;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ vccio_flash: vccio-flash {
+ compatible = "regulator-fixed";
+ regulator-name = "vccio_flash";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ regulator-boot-on;
+ vin-supply = <&vcc_io>;
+ };
+
+ vcc5v0_host: vcc5v0-host {
+ compatible = "regulator-fixed";
+ gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ pinctrl-names = "default";
+ pinctrl-0 = <&usb_drv>;
+ regulator-name = "vbus_host";
+ vin-supply = <&vcc5v0_sys>;
+ };
+
vdd_core: vdd-core {
compatible = "pwm-regulator";
pwms = <&pwm0 0 5000 1>;
@@ -118,70 +168,20 @@
vdd_log: vdd-log {
compatible = "regulator-fixed";
regulator-name = "vdd_log";
- regulator-always-on;
- regulator-boot-on;
regulator-min-microvolt = <1050000>;
regulator-max-microvolt = <1050000>;
+ regulator-always-on;
+ regulator-boot-on;
vin-supply = <&vcc5v0_sys>;
};
vdd_1v0: vdd-1v0 {
compatible = "regulator-fixed";
regulator-name = "vdd_1v0";
- regulator-always-on;
- regulator-boot-on;
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
- vin-supply = <&vcc5v0_sys>;
- };
-
- vccio_sdio: vcc_1v8: vcc-1v8 {
- compatible = "regulator-fixed";
- regulator-name = "vcc_1v8";
regulator-always-on;
regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vcc_io>;
- };
-
- vcc_ddr: vcc-ddr {
- compatible = "regulator-fixed";
- regulator-name = "vcc_ddr";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1500000>;
- regulator-max-microvolt = <1500000>;
- vin-supply = <&vcc5v0_sys>;
- };
-
- vcc_io: vcc-io {
- compatible = "regulator-fixed";
- regulator-name = "vcc_io";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vcc5v0_sys>;
- };
-
- vccio_flash: vccio-flash {
- compatible = "regulator-fixed";
- regulator-name = "vccio_flash";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vcc_io>;
- };
-
- vcc5v0_host: vcc5v0-host {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&usb_drv>;
- regulator-name = "vbus_host";
vin-supply = <&vcc5v0_sys>;
};
};
diff --git a/arch/arm/dts/rk3308-roc-cc-u-boot.dtsi b/arch/arm/dts/rk3308-roc-cc-u-boot.dtsi
index 97d922c..3e01e7a 100644
--- a/arch/arm/dts/rk3308-roc-cc-u-boot.dtsi
+++ b/arch/arm/dts/rk3308-roc-cc-u-boot.dtsi
@@ -5,13 +5,37 @@
#include "rk3308-u-boot.dtsi"
/ {
- chosen {
- u-boot,spl-boot-order = "same-as-spl", &emmc;
+ aliases {
+ ethernet0 = &gmac;
};
};
+&gmac {
+ assigned-clocks = <&cru SCLK_MAC>;
+ assigned-clock-parents = <&mac_clkin>;
+ clock_in_out = "input";
+ pinctrl-names = "default";
+ pinctrl-0 = <&rmiim1_pins &macm1_refclk>;
+ status = "okay";
+};
+
+&gpio4 {
+ bootph-pre-ram;
+};
+
&uart2 {
bootph-all;
clock-frequency = <24000000>;
- status = "okay";
+};
+
+&uart2m0_xfer {
+ bootph-all;
+};
+
+&vcc_sd {
+ bootph-pre-ram;
+};
+
+&vdd_core {
+ regulator-init-microvolt = <1015000>;
};
diff --git a/arch/arm/dts/rk3308-roc-cc.dts b/arch/arm/dts/rk3308-roc-cc.dts
index b4a54a8..9232357 100644
--- a/arch/arm/dts/rk3308-roc-cc.dts
+++ b/arch/arm/dts/rk3308-roc-cc.dts
@@ -9,11 +9,17 @@
/ {
model = "Firefly ROC-RK3308-CC board";
compatible = "firefly,roc-rk3308-cc", "rockchip,rk3308";
+
+ aliases {
+ mmc0 = &sdmmc;
+ mmc1 = &emmc;
+ };
+
chosen {
stdout-path = "serial2:1500000n8";
};
- ir_rx {
+ ir-receiver {
compatible = "gpio-ir-receiver";
gpios = <&gpio0 RK_PC0 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
@@ -27,14 +33,15 @@
leds {
compatible = "gpio-leds";
- power {
+
+ power_led: led-0 {
label = "firefly:red:power";
linux,default-trigger = "ir-power-click";
default-state = "on";
gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
};
- user {
+ user_led: led-1 {
label = "firefly:blue:user";
linux,default-trigger = "ir-user-click";
default-state = "off";
@@ -45,10 +52,10 @@
typec_vcc5v: typec-vcc5v {
compatible = "regulator-fixed";
regulator-name = "typec_vcc5v";
- regulator-always-on;
- regulator-boot-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ regulator-boot-on;
};
vcc5v0_sys: vcc5v0-sys {
@@ -61,29 +68,6 @@
vin-supply = <&typec_vcc5v>;
};
- vdd_core: vdd-core {
- compatible = "pwm-regulator";
- pwms = <&pwm0 0 5000 1>;
- regulator-name = "vdd_core";
- regulator-min-microvolt = <827000>;
- regulator-max-microvolt = <1340000>;
- regulator-init-microvolt = <1015000>;
- regulator-always-on;
- regulator-boot-on;
- regulator-settling-time-up-us = <250>;
- pwm-supply = <&vcc5v0_sys>;
- };
-
- vdd_log: vdd-log {
- compatible = "regulator-fixed";
- regulator-name = "vdd_log";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1050000>;
- regulator-max-microvolt = <1050000>;
- vin-supply = <&vcc5v0_sys>;
- };
-
vcc_io: vcc-io {
compatible = "regulator-fixed";
regulator-name = "vcc_io";
@@ -100,8 +84,8 @@
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_HIGH>;
- states = <1800000 0x0
- 3300000 0x1>;
+ states = <1800000 0x0>,
+ <3300000 0x1>;
vin-supply = <&vcc5v0_sys>;
};
@@ -113,9 +97,30 @@
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
- vim-supply = <&vcc_io>;
+ vin-supply = <&vcc_io>;
};
+ vdd_core: vdd-core {
+ compatible = "pwm-regulator";
+ pwms = <&pwm0 0 5000 1>;
+ regulator-name = "vdd_core";
+ regulator-min-microvolt = <827000>;
+ regulator-max-microvolt = <1340000>;
+ regulator-settling-time-up-us = <250>;
+ regulator-always-on;
+ regulator-boot-on;
+ pwm-supply = <&vcc5v0_sys>;
+ };
+
+ vdd_log: vdd-log {
+ compatible = "regulator-fixed";
+ regulator-name = "vdd_log";
+ regulator-min-microvolt = <1050000>;
+ regulator-max-microvolt = <1050000>;
+ regulator-always-on;
+ regulator-boot-on;
+ vin-supply = <&vcc5v0_sys>;
+ };
};
&cpu0 {
@@ -123,12 +128,9 @@
};
&emmc {
- bus-width = <8>;
cap-mmc-highspeed;
- supports-emmc;
- disable-wp;
+ mmc-hs200-1_8v;
non-removable;
- num-slots = <1>;
status = "okay";
};
@@ -143,15 +145,6 @@
};
};
-&mac {
- assigned-clocks = <&cru SCLK_MAC>;
- assigned-clock-parents = <&mac_clkin>;
- clock_in_out = "input";
- pinctrl-names = "default";
- pinctrl-0 = <&rmiim1_pins &macm1_refclk>;
- status = "okay";
-};
-
&pwm5 {
status = "okay";
pinctrl-names = "active";
@@ -181,10 +174,8 @@
};
&sdmmc {
- bus-width = <4>;
cap-mmc-highspeed;
cap-sd-highspeed;
- supports-sd;
card-detect-delay = <300>;
sd-uhs-sdr25;
sd-uhs-sdr50;
diff --git a/arch/arm/dts/rk3308-rock-pi-s-u-boot.dtsi b/arch/arm/dts/rk3308-rock-pi-s-u-boot.dtsi
index d88dee8..a6fb8b1 100644
--- a/arch/arm/dts/rk3308-rock-pi-s-u-boot.dtsi
+++ b/arch/arm/dts/rk3308-rock-pi-s-u-boot.dtsi
@@ -4,39 +4,42 @@
*/
#include "rk3308-u-boot.dtsi"
-/ {
- chosen {
- u-boot,spl-boot-order = "same-as-spl", &emmc, &sdmmc;
- };
+&emmc {
+ cap-sd-highspeed;
+ pinctrl-names = "default";
+ pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus4>;
+};
+
+&emmc_bus4 {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
+&u2phy_otg {
+ /delete-property/ phy-supply;
};
&uart0 {
bootph-all;
-};
-
-&pinctrl {
- bootph-some-ram;
-
- uart0 {
- bootph-some-ram;
- };
- rtc {
- bootph-some-ram;
- };
-};
-
-&uart0_xfer {
- bootph-some-ram;
+ clock-frequency = <24000000>;
};
&uart0_cts {
- bootph-some-ram;
+ bootph-all;
};
&uart0_rts {
- bootph-some-ram;
+ bootph-all;
};
-&rtc_32k {
- bootph-some-ram;
+&uart0_xfer {
+ bootph-all;
+};
+
+&vcc5v0_otg {
+ /delete-property/ regulator-always-on;
+};
+
+&vdd_core {
+ regulator-init-microvolt = <1015000>;
};
diff --git a/arch/arm/dts/rk3308-rock-pi-s.dts b/arch/arm/dts/rk3308-rock-pi-s.dts
index b5a8691..b47fe02 100644
--- a/arch/arm/dts/rk3308-rock-pi-s.dts
+++ b/arch/arm/dts/rk3308-rock-pi-s.dts
@@ -1,12 +1,10 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
- * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
- * Copyright (C) 2023 Akash Gajjar <gajjar04akash@gmail.com>
- * Copyright (c) 2023 Jagan Teki <jagan@openedev.com>
+ * Copyright (c) 2019 Akash Gajjar <akash@openedev.com>
+ * Copyright (c) 2019 Jagan Teki <jagan@openedev.com>
*/
/dts-v1/;
-#include <dt-bindings/input/input.h>
#include "rk3308.dtsi"
/ {
@@ -14,7 +12,7 @@
compatible = "radxa,rockpis", "rockchip,rk3308";
aliases {
- ethernet0 = &mac;
+ ethernet0 = &gmac;
mmc0 = &emmc;
mmc1 = &sdmmc;
};
@@ -107,7 +105,6 @@
regulator-name = "vdd_core";
regulator-min-microvolt = <827000>;
regulator-max-microvolt = <1340000>;
- regulator-init-microvolt = <1015000>;
regulator-settling-time-up-us = <250>;
regulator-always-on;
regulator-boot-on;
@@ -137,7 +134,7 @@
status = "okay";
};
-&mac {
+&gmac {
clock_in_out = "output";
phy-supply = <&vcc_io>;
snps,reset-gpio = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
@@ -146,6 +143,68 @@
status = "okay";
};
+&gpio0 {
+ gpio-line-names =
+ /* GPIO0_A0 - A7 */
+ "", "", "", "", "", "", "", "",
+ /* GPIO0_B0 - B7 */
+ "", "", "", "header1-pin3 [GPIO0_B3]",
+ "header1-pin5 [GPIO0_B4]", "", "",
+ "header1-pin11 [GPIO0_B7]",
+ /* GPIO0_C0 - C7 */
+ "header1-pin13 [GPIO0_C0]",
+ "header1-pin15 [GPIO0_C1]", "", "", "",
+ "", "", "",
+ /* GPIO0_D0 - D7 */
+ "", "", "", "", "", "", "", "";
+};
+
+&gpio1 {
+ gpio-line-names =
+ /* GPIO1_A0 - A7 */
+ "", "", "", "", "", "", "", "",
+ /* GPIO1_B0 - B7 */
+ "", "", "", "", "", "", "", "",
+ /* GPIO1_C0 - C7 */
+ "", "", "", "", "", "", "header1-pin21 [GPIO1_C6]",
+ "header1-pin19 [GPIO1_C7]",
+ /* GPIO1_D0 - D7 */
+ "header1-pin23 [GPIO1_D0]", "header1-pin24 [GPIO1_D1]",
+ "", "", "", "", "", "";
+};
+
+&gpio2 {
+ gpio-line-names =
+ /* GPIO2_A0 - A7 */
+ "header1-pin10 [GPIO2_A0]", "header1-pin8 [GPIO2_A1]",
+ "", "",
+ "header1-pin7 [GPIO2_A4]", "header1-pin12 [GPIO2_A5]",
+ "header2-pin46 [GPIO2_A6]", "header1-pin22 [GPIO1_A7]",
+ /* GPIO2_B0 - B7 */
+ "header2-pin45 [GPIO2_B0]", "header1-pin18 [GPIO2_B1]",
+ "header1-pin16 [GPIO2_B2]", "header2-pin44 [GPIO2_B3]",
+ "header2-pin43 [GPIO2_B4]", "header2-pin28 [GPIO2_B5]",
+ "header2-pin30 [GPIO2_B6]", "header2-pin32 [GPIO2_B7]",
+ /* GPIO2_C0 - C7 */
+ "header2-pin34 [GPIO2_C0]", "", "", "", "", "", "", "",
+ /* GPIO2_D0 - D7 */
+ "", "", "", "", "", "", "", "";
+};
+
+&gpio3 {
+ gpio-line-names =
+ /* GPIO3_A0 - A7 */
+ "", "", "", "", "", "", "", "",
+ /* GPIO3_B0 - B7 */
+ "", "", "header2-pin42 [GPIO3_B2]",
+ "header2-pin41 [GPIO3_B3]", "header2-pin40 [GPIO3_B4]",
+ "header2-pin39 [GPIO3_B5]", "", "",
+ /* GPIO3_C0 - C7 */
+ "", "", "", "", "", "", "", "",
+ /* GPIO3_D0 - D7 */
+ "", "", "", "", "", "", "", "";
+};
+
&i2c1 {
status = "okay";
};
@@ -209,6 +268,20 @@
status = "okay";
};
+&u2phy {
+ status = "okay";
+
+ u2phy_host: host-port {
+ phy-supply = <&vcc5v0_otg>;
+ status = "okay";
+ };
+
+ u2phy_otg: otg-port {
+ phy-supply = <&vcc5v0_otg>;
+ status = "okay";
+ };
+};
+
&uart0 {
status = "okay";
};
@@ -223,6 +296,19 @@
};
};
+&usb_host_ehci {
+ status = "okay";
+};
+
+&usb_host_ohci {
+ status = "okay";
+};
+
+&usb20_otg {
+ dr_mode = "peripheral";
+ status = "okay";
+};
+
&wdt {
status = "okay";
};
diff --git a/arch/arm/dts/rk3308-u-boot.dtsi b/arch/arm/dts/rk3308-u-boot.dtsi
index db2c20a..684fa7a 100644
--- a/arch/arm/dts/rk3308-u-boot.dtsi
+++ b/arch/arm/dts/rk3308-u-boot.dtsi
@@ -10,32 +10,134 @@
mmc0 = &emmc;
mmc1 = &sdmmc;
};
+
+ chosen {
+ u-boot,spl-boot-order = "same-as-spl", &sdmmc, &emmc;
+ };
+
+ dmc: dmc@ff010000 {
+ compatible = "rockchip,rk3308-dmc";
+ reg = <0x0 0xff010000 0x0 0x10000>;
+ bootph-all;
+ };
+
+ otp: nvmem@ff210000 {
+ compatible = "rockchip,rk3308-otp";
+ reg = <0x0 0xff210000 0x0 0x4000>;
+ clocks = <&cru SCLK_OTP_USR>, <&cru PCLK_OTP_NS>,
+ <&cru PCLK_OTP_PHY>;
+ clock-names = "otp", "apb_pclk", "phy";
+ resets = <&cru SRST_OTP_PHY>;
+ reset-names = "phy";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cpu_id: id@7 {
+ reg = <0x07 0x10>;
+ };
+ };
+
+ rng: rng@ff2f0000 {
+ compatible = "rockchip,cryptov2-rng";
+ reg = <0x0 0xff2f0000 0x0 0x4000>;
+ };
};
&cru {
bootph-all;
};
-&dmc {
- bootph-all;
-};
-
&emmc {
+ bootph-pre-ram;
+ bootph-some-ram;
+
/* mmc to sram can't do dma, prevent aborts transferring TF-A parts */
u-boot,spl-fifo-mode;
- bootph-all;
};
-&sdmmc {
- bootph-all;
- u-boot,spl-fifo-mode;
+&emmc_bus8 {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
+&emmc_clk {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
+&emmc_cmd {
+ bootph-pre-ram;
+ bootph-some-ram;
};
&grf {
bootph-all;
};
-&saradc {
+&pcfg_pull_none {
bootph-all;
- status = "okay";
+};
+
+&pcfg_pull_none_4ma {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
+&pcfg_pull_none_8ma {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
+&pcfg_pull_up {
+ bootph-all;
+};
+
+&pcfg_pull_up_4ma {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
+&pcfg_pull_up_8ma {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
+&pinctrl {
+ bootph-all;
+};
+
+&rtc_32k {
+ bootph-all;
+};
+
+&sdmmc {
+ bootph-pre-ram;
+ bootph-some-ram;
+
+ /* mmc to sram can't do dma, prevent aborts transferring TF-A parts */
+ u-boot,spl-fifo-mode;
+};
+
+&sdmmc_bus4 {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
+&sdmmc_clk {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
+&sdmmc_cmd {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
+&sdmmc_det {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
+&xin24m {
+ bootph-all;
};
diff --git a/arch/arm/dts/rk3308.dtsi b/arch/arm/dts/rk3308.dtsi
index 9a152a8..cfc0a87 100644
--- a/arch/arm/dts/rk3308.dtsi
+++ b/arch/arm/dts/rk3308.dtsi
@@ -1,4 +1,4 @@
-// SPDX-License-Identifier: GPL-2.0+ OR MIT
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
*
@@ -9,6 +9,7 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/soc/rockchip,boot-mode.h>
#include <dt-bindings/thermal/thermal.h>
/ {
@@ -19,6 +20,11 @@
#size-cells = <2>;
aliases {
+ gpio0 = &gpio0;
+ gpio1 = &gpio1;
+ gpio2 = &gpio2;
+ gpio3 = &gpio3;
+ gpio4 = &gpio4;
i2c0 = &i2c0;
i2c1 = &i2c1;
i2c2 = &i2c2;
@@ -39,7 +45,7 @@
cpu0: cpu@0 {
device_type = "cpu";
- compatible = "arm,cortex-a35", "arm,armv8";
+ compatible = "arm,cortex-a35";
reg = <0x0 0x0>;
enable-method = "psci";
clocks = <&cru ARMCLK>;
@@ -52,7 +58,7 @@
cpu1: cpu@1 {
device_type = "cpu";
- compatible = "arm,cortex-a35", "arm,armv8";
+ compatible = "arm,cortex-a35";
reg = <0x0 0x1>;
enable-method = "psci";
operating-points-v2 = <&cpu0_opp_table>;
@@ -62,7 +68,7 @@
cpu2: cpu@2 {
device_type = "cpu";
- compatible = "arm,cortex-a35", "arm,armv8";
+ compatible = "arm,cortex-a35";
reg = <0x0 0x2>;
enable-method = "psci";
operating-points-v2 = <&cpu0_opp_table>;
@@ -72,7 +78,7 @@
cpu3: cpu@3 {
device_type = "cpu";
- compatible = "arm,cortex-a35", "arm,armv8";
+ compatible = "arm,cortex-a35";
reg = <0x0 0x3>;
enable-method = "psci";
operating-points-v2 = <&cpu0_opp_table>;
@@ -95,10 +101,12 @@
l2: l2-cache {
compatible = "cache";
+ cache-level = <2>;
+ cache-unified;
};
};
- cpu0_opp_table: cpu0-opp-table {
+ cpu0_opp_table: opp-table-0 {
compatible = "operating-points-v2";
opp-shared;
@@ -126,7 +134,7 @@
};
arm-pmu {
- compatible = "arm,cortex-a53-pmu";
+ compatible = "arm,cortex-a35-pmu";
interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
@@ -163,12 +171,53 @@
grf: grf@ff000000 {
compatible = "rockchip,rk3308-grf", "syscon", "simple-mfd";
- reg = <0x0 0xff000000 0x0 0x10000>;
+ reg = <0x0 0xff000000 0x0 0x08000>;
+
+ reboot-mode {
+ compatible = "syscon-reboot-mode";
+ offset = <0x500>;
+ mode-bootloader = <BOOT_BL_DOWNLOAD>;
+ mode-loader = <BOOT_BL_DOWNLOAD>;
+ mode-normal = <BOOT_NORMAL>;
+ mode-recovery = <BOOT_RECOVERY>;
+ mode-fastboot = <BOOT_FASTBOOT>;
+ };
};
- dmc: dmc@0xff010000 {
- compatible = "rockchip,rk3308-dmc";
- reg = <0x0 0xff010000 0x0 0x10000>;
+ usb2phy_grf: syscon@ff008000 {
+ compatible = "rockchip,rk3308-usb2phy-grf", "syscon", "simple-mfd";
+ reg = <0x0 0xff008000 0x0 0x4000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ u2phy: usb2phy@100 {
+ compatible = "rockchip,rk3308-usb2phy";
+ reg = <0x100 0x10>;
+ assigned-clocks = <&cru USB480M>;
+ assigned-clock-parents = <&u2phy>;
+ clocks = <&cru SCLK_USBPHY_REF>;
+ clock-names = "phyclk";
+ clock-output-names = "usb480m_phy";
+ #clock-cells = <0>;
+ status = "disabled";
+
+ u2phy_otg: otg-port {
+ interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "otg-bvalid", "otg-id",
+ "linestate";
+ #phy-cells = <0>;
+ status = "disabled";
+ };
+
+ u2phy_host: host-port {
+ interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "linestate";
+ #phy-cells = <0>;
+ status = "disabled";
+ };
+ };
};
detect_grf: syscon@ff00b000 {
@@ -183,7 +232,6 @@
reg = <0x0 0xff00c000 0x0 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
-
};
i2c0: i2c@ff040000 {
@@ -239,7 +287,7 @@
};
wdt: watchdog@ff080000 {
- compatible = "snps,dw-wdt";
+ compatible = "rockchip,rk3308-wdt", "snps,dw-wdt";
reg = <0x0 0xff080000 0x0 0x100>;
clocks = <&cru PCLK_WDT>;
interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
@@ -321,9 +369,8 @@
clock-names = "spiclk", "apb_pclk";
dmas = <&dmac0 0>, <&dmac0 1>;
dma-names = "tx", "rx";
- pinctrl-names = "default", "high_speed";
+ pinctrl-names = "default";
pinctrl-0 = <&spi0_clk &spi0_csn0 &spi0_miso &spi0_mosi>;
- pinctrl-1 = <&spi0_clk_hs &spi0_csn0 &spi0_miso_hs &spi0_mosi_hs>;
status = "disabled";
};
@@ -337,9 +384,8 @@
clock-names = "spiclk", "apb_pclk";
dmas = <&dmac0 2>, <&dmac0 3>;
dma-names = "tx", "rx";
- pinctrl-names = "default", "high_speed";
+ pinctrl-names = "default";
pinctrl-0 = <&spi1_clk &spi1_csn0 &spi1_miso &spi1_mosi>;
- pinctrl-1 = <&spi1_clk_hs &spi1_csn0 &spi1_miso_hs &spi1_mosi_hs>;
status = "disabled";
};
@@ -353,141 +399,140 @@
clock-names = "spiclk", "apb_pclk";
dmas = <&dmac1 16>, <&dmac1 17>;
dma-names = "tx", "rx";
- pinctrl-names = "default", "high_speed";
+ pinctrl-names = "default";
pinctrl-0 = <&spi2_clk &spi2_csn0 &spi2_miso &spi2_mosi>;
- pinctrl-1 = <&spi2_clk_hs &spi2_csn0 &spi2_miso_hs &spi2_mosi_hs>;
status = "disabled";
};
pwm8: pwm@ff160000 {
compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm";
reg = <0x0 0xff160000 0x0 0x10>;
- #pwm-cells = <3>;
- pinctrl-names = "default";
- pinctrl-0 = <&pwm8_pin>;
clocks = <&cru SCLK_PWM2>, <&cru PCLK_PWM2>;
clock-names = "pwm", "pclk";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm8_pin>;
+ #pwm-cells = <3>;
status = "disabled";
};
pwm9: pwm@ff160010 {
compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm";
reg = <0x0 0xff160010 0x0 0x10>;
- #pwm-cells = <3>;
- pinctrl-names = "default";
- pinctrl-0 = <&pwm9_pin>;
clocks = <&cru SCLK_PWM2>, <&cru PCLK_PWM2>;
clock-names = "pwm", "pclk";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm9_pin>;
+ #pwm-cells = <3>;
status = "disabled";
};
pwm10: pwm@ff160020 {
compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm";
reg = <0x0 0xff160020 0x0 0x10>;
- #pwm-cells = <3>;
- pinctrl-names = "default";
- pinctrl-0 = <&pwm10_pin>;
clocks = <&cru SCLK_PWM2>, <&cru PCLK_PWM2>;
clock-names = "pwm", "pclk";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm10_pin>;
+ #pwm-cells = <3>;
status = "disabled";
};
pwm11: pwm@ff160030 {
compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm";
reg = <0x0 0xff160030 0x0 0x10>;
- #pwm-cells = <3>;
- pinctrl-names = "default";
- pinctrl-0 = <&pwm11_pin>;
clocks = <&cru SCLK_PWM2>, <&cru PCLK_PWM2>;
clock-names = "pwm", "pclk";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm11_pin>;
+ #pwm-cells = <3>;
status = "disabled";
};
pwm4: pwm@ff170000 {
compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm";
reg = <0x0 0xff170000 0x0 0x10>;
- #pwm-cells = <3>;
- pinctrl-names = "default";
- pinctrl-0 = <&pwm4_pin>;
clocks = <&cru SCLK_PWM1>, <&cru PCLK_PWM1>;
clock-names = "pwm", "pclk";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm4_pin>;
+ #pwm-cells = <3>;
status = "disabled";
};
pwm5: pwm@ff170010 {
compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm";
reg = <0x0 0xff170010 0x0 0x10>;
- #pwm-cells = <3>;
- pinctrl-names = "default";
- pinctrl-0 = <&pwm5_pin>;
clocks = <&cru SCLK_PWM1>, <&cru PCLK_PWM1>;
clock-names = "pwm", "pclk";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm5_pin>;
+ #pwm-cells = <3>;
status = "disabled";
};
pwm6: pwm@ff170020 {
compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm";
reg = <0x0 0xff170020 0x0 0x10>;
- #pwm-cells = <3>;
- pinctrl-names = "default";
- pinctrl-0 = <&pwm6_pin>;
clocks = <&cru SCLK_PWM1>, <&cru PCLK_PWM1>;
clock-names = "pwm", "pclk";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm6_pin>;
+ #pwm-cells = <3>;
status = "disabled";
};
pwm7: pwm@ff170030 {
compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm";
reg = <0x0 0xff170030 0x0 0x10>;
- #pwm-cells = <3>;
- pinctrl-names = "default";
- pinctrl-0 = <&pwm7_pin>;
clocks = <&cru SCLK_PWM1>, <&cru PCLK_PWM1>;
clock-names = "pwm", "pclk";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm7_pin>;
+ #pwm-cells = <3>;
status = "disabled";
};
pwm0: pwm@ff180000 {
compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm";
reg = <0x0 0xff180000 0x0 0x10>;
- #pwm-cells = <3>;
- pinctrl-names = "default";
- pinctrl-0 = <&pwm0_pin>;
clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
clock-names = "pwm", "pclk";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm0_pin>;
+ #pwm-cells = <3>;
status = "disabled";
};
pwm1: pwm@ff180010 {
compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm";
reg = <0x0 0xff180010 0x0 0x10>;
- #pwm-cells = <3>;
- pinctrl-names = "default";
- pinctrl-0 = <&pwm1_pin>;
clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
clock-names = "pwm", "pclk";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm1_pin>;
+ #pwm-cells = <3>;
status = "disabled";
};
pwm2: pwm@ff180020 {
compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm";
reg = <0x0 0xff180020 0x0 0x10>;
- #pwm-cells = <3>;
- pinctrl-names = "default";
- pinctrl-0 = <&pwm2_pin>;
clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
clock-names = "pwm", "pclk";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm2_pin>;
+ #pwm-cells = <3>;
status = "disabled";
};
pwm3: pwm@ff180030 {
compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm";
reg = <0x0 0xff180030 0x0 0x10>;
- #pwm-cells = <3>;
- pinctrl-names = "default";
- pinctrl-0 = <&pwm3_pin>;
clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
clock-names = "pwm", "pclk";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm3_pin>;
+ #pwm-cells = <3>;
status = "disabled";
};
@@ -503,41 +548,34 @@
compatible = "rockchip,rk3308-saradc", "rockchip,rk3399-saradc";
reg = <0x0 0xff1e0000 0x0 0x100>;
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
- #io-channel-cells = <1>;
clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>;
clock-names = "saradc", "apb_pclk";
+ #io-channel-cells = <1>;
resets = <&cru SRST_SARADC_P>;
reset-names = "saradc-apb";
status = "disabled";
};
- amba {
- compatible = "arm,amba-bus";
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
+ dmac0: dma-controller@ff2c0000 {
+ compatible = "arm,pl330", "arm,primecell";
+ reg = <0x0 0xff2c0000 0x0 0x4000>;
+ interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
+ arm,pl330-periph-burst;
+ clocks = <&cru ACLK_DMAC0>;
+ clock-names = "apb_pclk";
+ #dma-cells = <1>;
+ };
- dmac0: dma-controller@ff2c0000 {
- compatible = "arm,pl330", "arm,primecell";
- reg = <0x0 0xff2c0000 0x0 0x4000>;
- interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
- #dma-cells = <1>;
- clocks = <&cru ACLK_DMAC0>;
- clock-names = "apb_pclk";
- peripherals-req-type-burst;
- };
-
- dmac1: dma-controller@ff2d0000 {
- compatible = "arm,pl330", "arm,primecell";
- reg = <0x0 0xff2d0000 0x0 0x4000>;
- interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
- #dma-cells = <1>;
- clocks = <&cru ACLK_DMAC1>;
- clock-names = "apb_pclk";
- peripherals-req-type-burst;
- };
+ dmac1: dma-controller@ff2d0000 {
+ compatible = "arm,pl330", "arm,primecell";
+ reg = <0x0 0xff2d0000 0x0 0x4000>;
+ interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
+ arm,pl330-periph-burst;
+ clocks = <&cru ACLK_DMAC1>;
+ clock-names = "apb_pclk";
+ #dma-cells = <1>;
};
i2s_2ch_0: i2s@ff350000 {
@@ -572,7 +610,7 @@
};
spdif_tx: spdif-tx@ff3a0000 {
- compatible = "rockchip,rk3308-spdif", "rockchip,rk3328-spdif";
+ compatible = "rockchip,rk3308-spdif", "rockchip,rk3066-spdif";
reg = <0x0 0xff3a0000 0x0 0x1000>;
interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru SCLK_SPDIF_TX>, <&cru HCLK_SPDIFTX>;
@@ -584,16 +622,52 @@
status = "disabled";
};
+ usb20_otg: usb@ff400000 {
+ compatible = "rockchip,rk3308-usb", "rockchip,rk3066-usb",
+ "snps,dwc2";
+ reg = <0x0 0xff400000 0x0 0x40000>;
+ interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru HCLK_OTG>;
+ clock-names = "otg";
+ dr_mode = "otg";
+ g-np-tx-fifo-size = <16>;
+ g-rx-fifo-size = <280>;
+ g-tx-fifo-size = <256 128 128 64 32 16>;
+ phys = <&u2phy_otg>;
+ phy-names = "usb2-phy";
+ status = "disabled";
+ };
+
+ usb_host_ehci: usb@ff440000 {
+ compatible = "generic-ehci";
+ reg = <0x0 0xff440000 0x0 0x10000>;
+ interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru HCLK_HOST>, <&cru HCLK_HOST_ARB>, <&u2phy>;
+ phys = <&u2phy_host>;
+ phy-names = "usb";
+ status = "disabled";
+ };
+
+ usb_host_ohci: usb@ff450000 {
+ compatible = "generic-ohci";
+ reg = <0x0 0xff450000 0x0 0x10000>;
+ interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru HCLK_HOST>, <&cru HCLK_HOST_ARB>, <&u2phy>;
+ phys = <&u2phy_host>;
+ phy-names = "usb";
+ status = "disabled";
+ };
+
sdmmc: mmc@ff480000 {
compatible = "rockchip,rk3308-dw-mshc", "rockchip,rk3288-dw-mshc";
reg = <0x0 0xff480000 0x0 0x4000>;
- max-frequency = <150000000>;
+ interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
bus-width = <4>;
clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
<&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
- clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
+ clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
fifo-depth = <0x100>;
- interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
+ max-frequency = <150000000>;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_det &sdmmc_bus4>;
status = "disabled";
@@ -602,35 +676,49 @@
emmc: mmc@ff490000 {
compatible = "rockchip,rk3308-dw-mshc", "rockchip,rk3288-dw-mshc";
reg = <0x0 0xff490000 0x0 0x4000>;
- max-frequency = <150000000>;
+ interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
bus-width = <8>;
clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
<&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
- clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
+ clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
fifo-depth = <0x100>;
- interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
+ max-frequency = <150000000>;
status = "disabled";
};
sdio: mmc@ff4a0000 {
compatible = "rockchip,rk3308-dw-mshc", "rockchip,rk3288-dw-mshc";
reg = <0x0 0xff4a0000 0x0 0x4000>;
- max-frequency = <150000000>;
+ interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
bus-width = <4>;
clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>,
<&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>;
- clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
+ clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
fifo-depth = <0x100>;
- interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
+ max-frequency = <150000000>;
pinctrl-names = "default";
pinctrl-0 = <&sdio_bus4 &sdio_cmd &sdio_clk>;
status = "disabled";
};
- mac: ethernet@ff4e0000 {
- compatible = "rockchip,rk3308-mac";
+ nfc: nand-controller@ff4b0000 {
+ compatible = "rockchip,rk3308-nfc",
+ "rockchip,rv1108-nfc";
+ reg = <0x0 0xff4b0000 0x0 0x4000>;
+ interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru HCLK_NANDC>, <&cru SCLK_NANDC>;
+ clock-names = "ahb", "nfc";
+ assigned-clocks = <&cru SCLK_NANDC>;
+ assigned-clock-rates = <150000000>;
+ pinctrl-0 = <&flash_ale &flash_bus8 &flash_cle &flash_csn0
+ &flash_rdn &flash_rdy &flash_wrn>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+
+ gmac: ethernet@ff4e0000 {
+ compatible = "rockchip,rk3308-gmac";
reg = <0x0 0xff4e0000 0x0 0x10000>;
- rockchip,grf = <&grf>;
interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq";
clocks = <&cru SCLK_MAC>, <&cru SCLK_MAC_RX_TX>,
@@ -646,40 +734,57 @@
pinctrl-0 = <&rmii_pins &mac_refclk_12ma>;
resets = <&cru SRST_MAC_A>;
reset-names = "stmmaceth";
+ rockchip,grf = <&grf>;
+ status = "disabled";
+ };
+
+ sfc: spi@ff4c0000 {
+ compatible = "rockchip,sfc";
+ reg = <0x0 0xff4c0000 0x0 0x4000>;
+ interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru SCLK_SFC>, <&cru HCLK_SFC>;
+ clock-names = "clk_sfc", "hclk_sfc";
+ pinctrl-0 = <&sfc_clk &sfc_cs0 &sfc_bus4>;
+ pinctrl-names = "default";
status = "disabled";
};
cru: clock-controller@ff500000 {
compatible = "rockchip,rk3308-cru";
reg = <0x0 0xff500000 0x0 0x1000>;
+ clocks = <&xin24m>;
+ clock-names = "xin24m";
rockchip,grf = <&grf>;
#clock-cells = <1>;
#reset-cells = <1>;
+ assigned-clocks = <&cru SCLK_RTC32K>;
+ assigned-clock-rates = <32768>;
};
gic: interrupt-controller@ff580000 {
compatible = "arm,gic-400";
- #interrupt-cells = <3>;
- #address-cells = <0>;
- interrupt-controller;
-
reg = <0x0 0xff581000 0x0 0x1000>,
<0x0 0xff582000 0x0 0x2000>,
<0x0 0xff584000 0x0 0x2000>,
<0x0 0xff586000 0x0 0x2000>;
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
+ #interrupt-cells = <3>;
+ interrupt-controller;
+ #address-cells = <0>;
};
sram: sram@fff80000 {
compatible = "mmio-sram";
reg = <0x0 0xfff80000 0x0 0x40000>;
+ ranges = <0 0x0 0xfff80000 0x40000>;
#address-cells = <1>;
#size-cells = <1>;
- ranges = <0 0x0 0xfff80000 0x40000>;
+
/* reserved for ddr dvfs and system suspend/resume */
ddr-sram@0 {
reg = <0x0 0x8000>;
};
+
/* reserved for vad audio buffer */
vad_sram: vad-sram@8000 {
reg = <0x8000 0x38000>;
@@ -692,62 +797,58 @@
#address-cells = <2>;
#size-cells = <2>;
ranges;
- gpio0: gpio0@ff220000 {
+
+ gpio0: gpio@ff220000 {
compatible = "rockchip,gpio-bank";
reg = <0x0 0xff220000 0x0 0x100>;
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO0>;
gpio-controller;
#gpio-cells = <2>;
-
interrupt-controller;
#interrupt-cells = <2>;
};
- gpio1: gpio1@ff230000 {
+ gpio1: gpio@ff230000 {
compatible = "rockchip,gpio-bank";
reg = <0x0 0xff230000 0x0 0x100>;
interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO1>;
gpio-controller;
#gpio-cells = <2>;
-
interrupt-controller;
#interrupt-cells = <2>;
};
- gpio2: gpio2@ff240000 {
+ gpio2: gpio@ff240000 {
compatible = "rockchip,gpio-bank";
reg = <0x0 0xff240000 0x0 0x100>;
interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO2>;
gpio-controller;
#gpio-cells = <2>;
-
interrupt-controller;
#interrupt-cells = <2>;
};
- gpio3: gpio3@ff250000 {
+ gpio3: gpio@ff250000 {
compatible = "rockchip,gpio-bank";
reg = <0x0 0xff250000 0x0 0x100>;
interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO3>;
gpio-controller;
#gpio-cells = <2>;
-
interrupt-controller;
#interrupt-cells = <2>;
};
- gpio4: gpio4@ff260000 {
+ gpio4: gpio@ff260000 {
compatible = "rockchip,gpio-bank";
reg = <0x0 0xff260000 0x0 0x100>;
interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO4>;
gpio-controller;
#gpio-cells = <2>;
-
interrupt-controller;
#interrupt-cells = <2>;
};
@@ -831,6 +932,191 @@
input-enable;
};
+ emmc {
+ emmc_clk: emmc-clk {
+ rockchip,pins =
+ <3 RK_PB1 2 &pcfg_pull_none_8ma>;
+ };
+
+ emmc_cmd: emmc-cmd {
+ rockchip,pins =
+ <3 RK_PB0 2 &pcfg_pull_up_8ma>;
+ };
+
+ emmc_pwren: emmc-pwren {
+ rockchip,pins =
+ <3 RK_PB3 2 &pcfg_pull_none>;
+ };
+
+ emmc_rstn: emmc-rstn {
+ rockchip,pins =
+ <3 RK_PB2 2 &pcfg_pull_none>;
+ };
+
+ emmc_bus1: emmc-bus1 {
+ rockchip,pins =
+ <3 RK_PA0 2 &pcfg_pull_up_8ma>;
+ };
+
+ emmc_bus4: emmc-bus4 {
+ rockchip,pins =
+ <3 RK_PA0 2 &pcfg_pull_up_8ma>,
+ <3 RK_PA1 2 &pcfg_pull_up_8ma>,
+ <3 RK_PA2 2 &pcfg_pull_up_8ma>,
+ <3 RK_PA3 2 &pcfg_pull_up_8ma>;
+ };
+
+ emmc_bus8: emmc-bus8 {
+ rockchip,pins =
+ <3 RK_PA0 2 &pcfg_pull_up_8ma>,
+ <3 RK_PA1 2 &pcfg_pull_up_8ma>,
+ <3 RK_PA2 2 &pcfg_pull_up_8ma>,
+ <3 RK_PA3 2 &pcfg_pull_up_8ma>,
+ <3 RK_PA4 2 &pcfg_pull_up_8ma>,
+ <3 RK_PA5 2 &pcfg_pull_up_8ma>,
+ <3 RK_PA6 2 &pcfg_pull_up_8ma>,
+ <3 RK_PA7 2 &pcfg_pull_up_8ma>;
+ };
+ };
+
+ flash {
+ flash_csn0: flash-csn0 {
+ rockchip,pins =
+ <3 RK_PB5 1 &pcfg_pull_none>;
+ };
+
+ flash_rdy: flash-rdy {
+ rockchip,pins =
+ <3 RK_PB4 1 &pcfg_pull_none>;
+ };
+
+ flash_ale: flash-ale {
+ rockchip,pins =
+ <3 RK_PB3 1 &pcfg_pull_none>;
+ };
+
+ flash_cle: flash-cle {
+ rockchip,pins =
+ <3 RK_PB1 1 &pcfg_pull_none>;
+ };
+
+ flash_wrn: flash-wrn {
+ rockchip,pins =
+ <3 RK_PB0 1 &pcfg_pull_none>;
+ };
+
+ flash_rdn: flash-rdn {
+ rockchip,pins =
+ <3 RK_PB2 1 &pcfg_pull_none>;
+ };
+
+ flash_bus8: flash-bus8 {
+ rockchip,pins =
+ <3 RK_PA0 1 &pcfg_pull_up_12ma>,
+ <3 RK_PA1 1 &pcfg_pull_up_12ma>,
+ <3 RK_PA2 1 &pcfg_pull_up_12ma>,
+ <3 RK_PA3 1 &pcfg_pull_up_12ma>,
+ <3 RK_PA4 1 &pcfg_pull_up_12ma>,
+ <3 RK_PA5 1 &pcfg_pull_up_12ma>,
+ <3 RK_PA6 1 &pcfg_pull_up_12ma>,
+ <3 RK_PA7 1 &pcfg_pull_up_12ma>;
+ };
+ };
+
+ sfc {
+ sfc_bus4: sfc-bus4 {
+ rockchip,pins =
+ <3 RK_PA0 3 &pcfg_pull_none>,
+ <3 RK_PA1 3 &pcfg_pull_none>,
+ <3 RK_PA2 3 &pcfg_pull_none>,
+ <3 RK_PA3 3 &pcfg_pull_none>;
+ };
+
+ sfc_bus2: sfc-bus2 {
+ rockchip,pins =
+ <3 RK_PA0 3 &pcfg_pull_none>,
+ <3 RK_PA1 3 &pcfg_pull_none>;
+ };
+
+ sfc_cs0: sfc-cs0 {
+ rockchip,pins =
+ <3 RK_PA4 3 &pcfg_pull_none>;
+ };
+
+ sfc_clk: sfc-clk {
+ rockchip,pins =
+ <3 RK_PA5 3 &pcfg_pull_none>;
+ };
+ };
+
+ gmac {
+ rmii_pins: rmii-pins {
+ rockchip,pins =
+ /* mac_txen */
+ <1 RK_PC1 3 &pcfg_pull_none_12ma>,
+ /* mac_txd1 */
+ <1 RK_PC3 3 &pcfg_pull_none_12ma>,
+ /* mac_txd0 */
+ <1 RK_PC2 3 &pcfg_pull_none_12ma>,
+ /* mac_rxd0 */
+ <1 RK_PC4 3 &pcfg_pull_none>,
+ /* mac_rxd1 */
+ <1 RK_PC5 3 &pcfg_pull_none>,
+ /* mac_rxer */
+ <1 RK_PB7 3 &pcfg_pull_none>,
+ /* mac_rxdv */
+ <1 RK_PC0 3 &pcfg_pull_none>,
+ /* mac_mdio */
+ <1 RK_PB6 3 &pcfg_pull_none>,
+ /* mac_mdc */
+ <1 RK_PB5 3 &pcfg_pull_none>;
+ };
+
+ mac_refclk_12ma: mac-refclk-12ma {
+ rockchip,pins =
+ <1 RK_PB4 3 &pcfg_pull_none_12ma>;
+ };
+
+ mac_refclk: mac-refclk {
+ rockchip,pins =
+ <1 RK_PB4 3 &pcfg_pull_none>;
+ };
+ };
+
+ gmac-m1 {
+ rmiim1_pins: rmiim1-pins {
+ rockchip,pins =
+ /* mac_txen */
+ <4 RK_PB7 2 &pcfg_pull_none_12ma>,
+ /* mac_txd1 */
+ <4 RK_PA5 2 &pcfg_pull_none_12ma>,
+ /* mac_txd0 */
+ <4 RK_PA4 2 &pcfg_pull_none_12ma>,
+ /* mac_rxd0 */
+ <4 RK_PA2 2 &pcfg_pull_none>,
+ /* mac_rxd1 */
+ <4 RK_PA3 2 &pcfg_pull_none>,
+ /* mac_rxer */
+ <4 RK_PA0 2 &pcfg_pull_none>,
+ /* mac_rxdv */
+ <4 RK_PA1 2 &pcfg_pull_none>,
+ /* mac_mdio */
+ <4 RK_PB6 2 &pcfg_pull_none>,
+ /* mac_mdc */
+ <4 RK_PB5 2 &pcfg_pull_none>;
+ };
+
+ macm1_refclk_12ma: macm1-refclk-12ma {
+ rockchip,pins =
+ <4 RK_PB4 2 &pcfg_pull_none_12ma>;
+ };
+
+ macm1_refclk: macm1-refclk {
+ rockchip,pins =
+ <4 RK_PB4 2 &pcfg_pull_none>;
+ };
+ };
+
i2c0 {
i2c0_xfer: i2c0-xfer {
rockchip,pins =
@@ -1163,471 +1449,6 @@
};
};
- spdif_in {
- spdif_in: spdif-in {
- rockchip,pins =
- <0 RK_PC2 1 &pcfg_pull_none>;
- };
- };
-
- spdif_out {
- spdif_out: spdif-out {
- rockchip,pins =
- <0 RK_PC1 1 &pcfg_pull_none>;
- };
- };
-
- tsadc {
- tsadc_otp_gpio: tsadc-otp-gpio {
- rockchip,pins =
- <0 RK_PB2 0 &pcfg_pull_none>;
- };
-
- tsadc_otp_out: tsadc-otp-out {
- rockchip,pins =
- <0 RK_PB2 1 &pcfg_pull_none>;
- };
- };
-
- uart0 {
- uart0_xfer: uart0-xfer {
- rockchip,pins =
- <2 RK_PA1 1 &pcfg_pull_up>,
- <2 RK_PA0 1 &pcfg_pull_up>;
- };
-
- uart0_cts: uart0-cts {
- rockchip,pins =
- <2 RK_PA2 1 &pcfg_pull_none>;
- };
-
- uart0_rts: uart0-rts {
- rockchip,pins =
- <2 RK_PA3 1 &pcfg_pull_none>;
- };
-
- uart0_rts_gpio: uart0-rts-gpio {
- rockchip,pins =
- <2 RK_PA3 0 &pcfg_pull_none>;
- };
- };
-
- uart1 {
- uart1_xfer: uart1-xfer {
- rockchip,pins =
- <1 RK_PD1 1 &pcfg_pull_up>,
- <1 RK_PD0 1 &pcfg_pull_up>;
- };
-
- uart1_cts: uart1-cts {
- rockchip,pins =
- <1 RK_PC6 1 &pcfg_pull_none>;
- };
-
- uart1_rts: uart1-rts {
- rockchip,pins =
- <1 RK_PC7 1 &pcfg_pull_none>;
- };
- };
-
- uart2-m0 {
- uart2m0_xfer: uart2m0-xfer {
- rockchip,pins =
- <1 RK_PC7 2 &pcfg_pull_up>,
- <1 RK_PC6 2 &pcfg_pull_up>;
- };
- };
-
- uart2-m1 {
- uart2m1_xfer: uart2m1-xfer {
- rockchip,pins =
- <4 RK_PD3 2 &pcfg_pull_up>,
- <4 RK_PD2 2 &pcfg_pull_up>;
- };
- };
-
- uart3 {
- uart3_xfer: uart3-xfer {
- rockchip,pins =
- <3 RK_PB5 4 &pcfg_pull_up>,
- <3 RK_PB4 4 &pcfg_pull_up>;
- };
- };
-
- uart3-m1 {
- uart3m1_xfer: uart3m1-xfer {
- rockchip,pins =
- <0 RK_PC2 3 &pcfg_pull_up>,
- <0 RK_PC1 3 &pcfg_pull_up>;
- };
- };
-
- uart4 {
-
- uart4_xfer: uart4-xfer {
- rockchip,pins =
- <4 RK_PB1 1 &pcfg_pull_up>,
- <4 RK_PB0 1 &pcfg_pull_up>;
- };
-
- uart4_cts: uart4-cts {
- rockchip,pins =
- <4 RK_PA6 1 &pcfg_pull_none>;
-
- };
-
- uart4_rts: uart4-rts {
- rockchip,pins =
- <4 RK_PA7 1 &pcfg_pull_none>;
- };
-
- uart4_rts_gpio: uart4-rts-gpio {
- rockchip,pins =
- <4 RK_PA7 0 &pcfg_pull_none>;
- };
- };
-
- spi0 {
- spi0_clk: spi0-clk {
- rockchip,pins =
- <2 RK_PA2 2 &pcfg_pull_up_4ma>;
- };
-
- spi0_csn0: spi0-csn0 {
- rockchip,pins =
- <2 RK_PA3 2 &pcfg_pull_up_4ma>;
- };
-
- spi0_miso: spi0-miso {
- rockchip,pins =
- <2 RK_PA0 2 &pcfg_pull_up_4ma>;
- };
-
- spi0_mosi: spi0-mosi {
- rockchip,pins =
- <2 RK_PA1 2 &pcfg_pull_up_4ma>;
- };
-
- spi0_clk_hs: spi0-clk-hs {
- rockchip,pins =
- <2 RK_PA2 2 &pcfg_pull_up_8ma>;
- };
-
- spi0_miso_hs: spi0-miso-hs {
- rockchip,pins =
- <2 RK_PA0 2 &pcfg_pull_up_8ma>;
- };
-
- spi0_mosi_hs: spi0-mosi-hs {
- rockchip,pins =
- <2 RK_PA1 2 &pcfg_pull_up_8ma>;
- };
-
- };
-
- spi1 {
- spi1_clk: spi1-clk {
- rockchip,pins =
- <3 RK_PB3 3 &pcfg_pull_up_4ma>;
- };
-
- spi1_csn0: spi1-csn0 {
- rockchip,pins =
- <3 RK_PB5 3 &pcfg_pull_up_4ma>;
- };
-
- spi1_miso: spi1-miso {
- rockchip,pins =
- <3 RK_PB2 3 &pcfg_pull_up_4ma>;
- };
-
- spi1_mosi: spi1-mosi {
- rockchip,pins =
- <3 RK_PB4 3 &pcfg_pull_up_4ma>;
- };
-
- spi1_clk_hs: spi1-clk-hs {
- rockchip,pins =
- <3 RK_PB3 3 &pcfg_pull_up_8ma>;
- };
-
- spi1_miso_hs: spi1-miso-hs {
- rockchip,pins =
- <3 RK_PB2 3 &pcfg_pull_up_8ma>;
- };
-
- spi1_mosi_hs: spi1-mosi-hs {
- rockchip,pins =
- <3 RK_PB4 3 &pcfg_pull_up_8ma>;
- };
- };
-
- spi1-m1 {
- spi1m1_miso: spi1m1-miso {
- rockchip,pins =
- <2 RK_PA4 2 &pcfg_pull_up_4ma>;
- };
-
- spi1m1_mosi: spi1m1-mosi {
- rockchip,pins =
- <2 RK_PA5 2 &pcfg_pull_up_4ma>;
- };
-
- spi1m1_clk: spi1m1-clk {
- rockchip,pins =
- <2 RK_PA7 2 &pcfg_pull_up_4ma>;
- };
-
- spi1m1_csn0: spi1m1-csn0 {
- rockchip,pins =
- <2 RK_PB1 2 &pcfg_pull_up_4ma>;
- };
-
- spi1m1_miso_hs: spi1m1-miso-hs {
- rockchip,pins =
- <2 RK_PA4 2 &pcfg_pull_up_8ma>;
- };
-
- spi1m1_mosi_hs: spi1m1-mosi-hs {
- rockchip,pins =
- <2 RK_PA5 2 &pcfg_pull_up_8ma>;
- };
-
- spi1m1_clk_hs: spi1m1-clk-hs {
- rockchip,pins =
- <2 RK_PA7 2 &pcfg_pull_up_8ma>;
- };
-
- spi1m1_csn0_hs: spi1m1-csn0-hs {
- rockchip,pins =
- <2 RK_PB1 2 &pcfg_pull_up_8ma>;
- };
- };
-
- spi2 {
- spi2_clk: spi2-clk {
- rockchip,pins =
- <1 RK_PD0 3 &pcfg_pull_up_4ma>;
- };
-
- spi2_csn0: spi2-csn0 {
- rockchip,pins =
- <1 RK_PD1 3 &pcfg_pull_up_4ma>;
- };
-
- spi2_miso: spi2-miso {
- rockchip,pins =
- <1 RK_PC6 3 &pcfg_pull_up_4ma>;
- };
-
- spi2_mosi: spi2-mosi {
- rockchip,pins =
- <1 RK_PC7 3 &pcfg_pull_up_4ma>;
- };
-
- spi2_clk_hs: spi2-clk-hs {
- rockchip,pins =
- <1 RK_PD0 3 &pcfg_pull_up_8ma>;
- };
-
- spi2_miso_hs: spi2-miso-hs {
- rockchip,pins =
- <1 RK_PC6 3 &pcfg_pull_up_8ma>;
- };
-
- spi2_mosi_hs: spi2-mosi-hs {
- rockchip,pins =
- <1 RK_PC7 3 &pcfg_pull_up_8ma>;
- };
- };
-
- sdmmc {
- sdmmc_clk: sdmmc-clk {
- rockchip,pins =
- <4 RK_PD5 1 &pcfg_pull_none_4ma>;
- };
-
- sdmmc_cmd: sdmmc-cmd {
- rockchip,pins =
- <4 RK_PD4 1 &pcfg_pull_up_4ma>;
- };
-
- sdmmc_det: sdmmc-det {
- rockchip,pins =
- <0 RK_PA3 1 &pcfg_pull_up_4ma>;
- };
-
- sdmmc_pwren: sdmmc-pwren {
- rockchip,pins =
- <4 RK_PD6 1 &pcfg_pull_none_4ma>;
- };
-
- sdmmc_bus1: sdmmc-bus1 {
- rockchip,pins =
- <4 RK_PD0 1 &pcfg_pull_up_4ma>;
- };
-
- sdmmc_bus4: sdmmc-bus4 {
- rockchip,pins =
- <4 RK_PD0 1 &pcfg_pull_up_4ma>,
- <4 RK_PD1 1 &pcfg_pull_up_4ma>,
- <4 RK_PD2 1 &pcfg_pull_up_4ma>,
- <4 RK_PD3 1 &pcfg_pull_up_4ma>;
- };
-
- sdmmc_gpio: sdmmc-gpio {
- rockchip,pins =
- <4 RK_PD0 0 &pcfg_pull_up_4ma>,
- <4 RK_PD1 0 &pcfg_pull_up_4ma>,
- <4 RK_PD2 0 &pcfg_pull_up_4ma>,
- <4 RK_PD3 0 &pcfg_pull_up_4ma>,
- <4 RK_PD4 0 &pcfg_pull_up_4ma>,
- <4 RK_PD5 0 &pcfg_pull_up_4ma>,
- <4 RK_PD6 0 &pcfg_pull_up_4ma>;
- };
- };
-
- sdio {
- sdio_clk: sdio-clk {
- rockchip,pins =
- <4 RK_PA5 1 &pcfg_pull_none_8ma>;
- };
-
- sdio_cmd: sdio-cmd {
- rockchip,pins =
- <4 RK_PA4 1 &pcfg_pull_up_8ma>;
- };
-
- sdio_pwren: sdio-pwren {
- rockchip,pins =
- <0 RK_PA2 1 &pcfg_pull_none_8ma>;
- };
-
- sdio_wrpt: sdio-wrpt {
- rockchip,pins =
- <0 RK_PA1 1 &pcfg_pull_none_8ma>;
- };
-
- sdio_intn: sdio-intn {
- rockchip,pins =
- <0 RK_PA0 1 &pcfg_pull_none_8ma>;
- };
-
- sdio_bus1: sdio-bus1 {
- rockchip,pins =
- <4 RK_PA0 1 &pcfg_pull_up_8ma>;
- };
-
- sdio_bus4: sdio-bus4 {
- rockchip,pins =
- <4 RK_PA0 1 &pcfg_pull_up_8ma>,
- <4 RK_PA1 1 &pcfg_pull_up_8ma>,
- <4 RK_PA2 1 &pcfg_pull_up_8ma>,
- <4 RK_PA3 1 &pcfg_pull_up_8ma>;
- };
-
- sdio_gpio: sdio-gpio {
- rockchip,pins =
- <4 RK_PA0 0 &pcfg_pull_up_4ma>,
- <4 RK_PA1 0 &pcfg_pull_up_4ma>,
- <4 RK_PA2 0 &pcfg_pull_up_4ma>,
- <4 RK_PA3 0 &pcfg_pull_up_4ma>,
- <4 RK_PA4 0 &pcfg_pull_up_4ma>,
- <4 RK_PA5 0 &pcfg_pull_up_4ma>;
- };
- };
-
- emmc {
- emmc_clk: emmc-clk {
- rockchip,pins =
- <3 RK_PB1 2 &pcfg_pull_none_8ma>;
- };
-
- emmc_cmd: emmc-cmd {
- rockchip,pins =
- <3 RK_PB0 2 &pcfg_pull_up_8ma>;
- };
-
- emmc_pwren: emmc-pwren {
- rockchip,pins =
- <3 RK_PB3 2 &pcfg_pull_none>;
- };
-
- emmc_rstn: emmc-rstn {
- rockchip,pins =
- <3 RK_PB2 2 &pcfg_pull_none>;
- };
-
- emmc_bus1: emmc-bus1 {
- rockchip,pins =
- <3 RK_PA0 2 &pcfg_pull_up_8ma>;
- };
-
- emmc_bus4: emmc-bus4 {
- rockchip,pins =
- <3 RK_PA0 2 &pcfg_pull_up_8ma>,
- <3 RK_PA1 2 &pcfg_pull_up_8ma>,
- <3 RK_PA2 2 &pcfg_pull_up_8ma>,
- <3 RK_PA3 2 &pcfg_pull_up_8ma>;
- };
-
- emmc_bus8: emmc-bus8 {
- rockchip,pins =
- <3 RK_PA0 2 &pcfg_pull_up_8ma>,
- <3 RK_PA1 2 &pcfg_pull_up_8ma>,
- <3 RK_PA2 2 &pcfg_pull_up_8ma>,
- <3 RK_PA3 2 &pcfg_pull_up_8ma>,
- <3 RK_PA4 2 &pcfg_pull_up_8ma>,
- <3 RK_PA5 2 &pcfg_pull_up_8ma>,
- <3 RK_PA6 2 &pcfg_pull_up_8ma>,
- <3 RK_PA7 2 &pcfg_pull_up_8ma>;
- };
- };
-
- flash {
- flash_csn0: flash-csn0 {
- rockchip,pins =
- <3 RK_PB5 1 &pcfg_pull_none>;
- };
-
- flash_rdy: flash-rdy {
- rockchip,pins =
- <3 RK_PB4 1 &pcfg_pull_none>;
- };
-
- flash_ale: flash-ale {
- rockchip,pins =
- <3 RK_PB3 1 &pcfg_pull_none>;
- };
-
- flash_cle: flash-cle {
- rockchip,pins =
- <3 RK_PB1 1 &pcfg_pull_none>;
- };
-
- flash_wrn: flash-wrn {
- rockchip,pins =
- <3 RK_PB0 1 &pcfg_pull_none>;
- };
-
- flash_rdn: flash-rdn {
- rockchip,pins =
- <3 RK_PB2 1 &pcfg_pull_none>;
- };
-
- flash_bus8: flash-bus8 {
- rockchip,pins =
- <3 RK_PA0 1 &pcfg_pull_up_12ma>,
- <3 RK_PA1 1 &pcfg_pull_up_12ma>,
- <3 RK_PA2 1 &pcfg_pull_up_12ma>,
- <3 RK_PA3 1 &pcfg_pull_up_12ma>,
- <3 RK_PA4 1 &pcfg_pull_up_12ma>,
- <3 RK_PA5 1 &pcfg_pull_up_12ma>,
- <3 RK_PA6 1 &pcfg_pull_up_12ma>,
- <3 RK_PA7 1 &pcfg_pull_up_12ma>;
- };
- };
-
pwm0 {
pwm0_pin: pwm0-pin {
rockchip,pins =
@@ -1772,74 +1593,6 @@
};
};
- gmac {
- rmii_pins: rmii-pins {
- rockchip,pins =
- /* mac_txen */
- <1 RK_PC1 3 &pcfg_pull_none_12ma>,
- /* mac_txd1 */
- <1 RK_PC3 3 &pcfg_pull_none_12ma>,
- /* mac_txd0 */
- <1 RK_PC2 3 &pcfg_pull_none_12ma>,
- /* mac_rxd0 */
- <1 RK_PC4 3 &pcfg_pull_none>,
- /* mac_rxd1 */
- <1 RK_PC5 3 &pcfg_pull_none>,
- /* mac_rxer */
- <1 RK_PB7 3 &pcfg_pull_none>,
- /* mac_rxdv */
- <1 RK_PC0 3 &pcfg_pull_none>,
- /* mac_mdio */
- <1 RK_PB6 3 &pcfg_pull_none>,
- /* mac_mdc */
- <1 RK_PB5 3 &pcfg_pull_none>;
- };
-
- mac_refclk_12ma: mac-refclk-12ma {
- rockchip,pins =
- <1 RK_PB4 3 &pcfg_pull_none_12ma>;
- };
-
- mac_refclk: mac-refclk {
- rockchip,pins =
- <1 RK_PB4 3 &pcfg_pull_none>;
- };
- };
-
- gmac-m1 {
- rmiim1_pins: rmiim1-pins {
- rockchip,pins =
- /* mac_txen */
- <4 RK_PB7 2 &pcfg_pull_none_12ma>,
- /* mac_txd1 */
- <4 RK_PA5 2 &pcfg_pull_none_12ma>,
- /* mac_txd0 */
- <4 RK_PA4 2 &pcfg_pull_none_12ma>,
- /* mac_rxd0 */
- <4 RK_PA2 2 &pcfg_pull_none>,
- /* mac_rxd1 */
- <4 RK_PA3 2 &pcfg_pull_none>,
- /* mac_rxer */
- <4 RK_PA0 2 &pcfg_pull_none>,
- /* mac_rxdv */
- <4 RK_PA1 2 &pcfg_pull_none>,
- /* mac_mdio */
- <4 RK_PB6 2 &pcfg_pull_none>,
- /* mac_mdc */
- <4 RK_PB5 2 &pcfg_pull_none>;
- };
-
- macm1_refclk_12ma: macm1-refclk-12ma {
- rockchip,pins =
- <4 RK_PB4 2 &pcfg_pull_none_12ma>;
- };
-
- macm1_refclk: macm1-refclk {
- rockchip,pins =
- <4 RK_PB4 2 &pcfg_pull_none>;
- };
- };
-
rtc {
rtc_32k: rtc-32k {
rockchip,pins =
@@ -1847,5 +1600,289 @@
};
};
+ sdmmc {
+ sdmmc_clk: sdmmc-clk {
+ rockchip,pins =
+ <4 RK_PD5 1 &pcfg_pull_none_4ma>;
+ };
+
+ sdmmc_cmd: sdmmc-cmd {
+ rockchip,pins =
+ <4 RK_PD4 1 &pcfg_pull_up_4ma>;
+ };
+
+ sdmmc_det: sdmmc-det {
+ rockchip,pins =
+ <0 RK_PA3 1 &pcfg_pull_up_4ma>;
+ };
+
+ sdmmc_pwren: sdmmc-pwren {
+ rockchip,pins =
+ <4 RK_PD6 1 &pcfg_pull_none_4ma>;
+ };
+
+ sdmmc_bus1: sdmmc-bus1 {
+ rockchip,pins =
+ <4 RK_PD0 1 &pcfg_pull_up_4ma>;
+ };
+
+ sdmmc_bus4: sdmmc-bus4 {
+ rockchip,pins =
+ <4 RK_PD0 1 &pcfg_pull_up_4ma>,
+ <4 RK_PD1 1 &pcfg_pull_up_4ma>,
+ <4 RK_PD2 1 &pcfg_pull_up_4ma>,
+ <4 RK_PD3 1 &pcfg_pull_up_4ma>;
+ };
+ };
+
+ sdio {
+ sdio_clk: sdio-clk {
+ rockchip,pins =
+ <4 RK_PA5 1 &pcfg_pull_none_8ma>;
+ };
+
+ sdio_cmd: sdio-cmd {
+ rockchip,pins =
+ <4 RK_PA4 1 &pcfg_pull_up_8ma>;
+ };
+
+ sdio_pwren: sdio-pwren {
+ rockchip,pins =
+ <0 RK_PA2 1 &pcfg_pull_none_8ma>;
+ };
+
+ sdio_wrpt: sdio-wrpt {
+ rockchip,pins =
+ <0 RK_PA1 1 &pcfg_pull_none_8ma>;
+ };
+
+ sdio_intn: sdio-intn {
+ rockchip,pins =
+ <0 RK_PA0 1 &pcfg_pull_none_8ma>;
+ };
+
+ sdio_bus1: sdio-bus1 {
+ rockchip,pins =
+ <4 RK_PA0 1 &pcfg_pull_up_8ma>;
+ };
+
+ sdio_bus4: sdio-bus4 {
+ rockchip,pins =
+ <4 RK_PA0 1 &pcfg_pull_up_8ma>,
+ <4 RK_PA1 1 &pcfg_pull_up_8ma>,
+ <4 RK_PA2 1 &pcfg_pull_up_8ma>,
+ <4 RK_PA3 1 &pcfg_pull_up_8ma>;
+ };
+ };
+
+ spdif_in {
+ spdif_in: spdif-in {
+ rockchip,pins =
+ <0 RK_PC2 1 &pcfg_pull_none>;
+ };
+ };
+
+ spdif_out {
+ spdif_out: spdif-out {
+ rockchip,pins =
+ <0 RK_PC1 1 &pcfg_pull_none>;
+ };
+ };
+
+ spi0 {
+ spi0_clk: spi0-clk {
+ rockchip,pins =
+ <2 RK_PA2 2 &pcfg_pull_up_4ma>;
+ };
+
+ spi0_csn0: spi0-csn0 {
+ rockchip,pins =
+ <2 RK_PA3 2 &pcfg_pull_up_4ma>;
+ };
+
+ spi0_miso: spi0-miso {
+ rockchip,pins =
+ <2 RK_PA0 2 &pcfg_pull_up_4ma>;
+ };
+
+ spi0_mosi: spi0-mosi {
+ rockchip,pins =
+ <2 RK_PA1 2 &pcfg_pull_up_4ma>;
+ };
+ };
+
+ spi1 {
+ spi1_clk: spi1-clk {
+ rockchip,pins =
+ <3 RK_PB3 3 &pcfg_pull_up_4ma>;
+ };
+
+ spi1_csn0: spi1-csn0 {
+ rockchip,pins =
+ <3 RK_PB5 3 &pcfg_pull_up_4ma>;
+ };
+
+ spi1_miso: spi1-miso {
+ rockchip,pins =
+ <3 RK_PB2 3 &pcfg_pull_up_4ma>;
+ };
+
+ spi1_mosi: spi1-mosi {
+ rockchip,pins =
+ <3 RK_PB4 3 &pcfg_pull_up_4ma>;
+ };
+ };
+
+ spi1-m1 {
+ spi1m1_miso: spi1m1-miso {
+ rockchip,pins =
+ <2 RK_PA4 2 &pcfg_pull_up_4ma>;
+ };
+
+ spi1m1_mosi: spi1m1-mosi {
+ rockchip,pins =
+ <2 RK_PA5 2 &pcfg_pull_up_4ma>;
+ };
+
+ spi1m1_clk: spi1m1-clk {
+ rockchip,pins =
+ <2 RK_PA7 2 &pcfg_pull_up_4ma>;
+ };
+
+ spi1m1_csn0: spi1m1-csn0 {
+ rockchip,pins =
+ <2 RK_PB1 2 &pcfg_pull_up_4ma>;
+ };
+ };
+
+ spi2 {
+ spi2_clk: spi2-clk {
+ rockchip,pins =
+ <1 RK_PD0 3 &pcfg_pull_up_4ma>;
+ };
+
+ spi2_csn0: spi2-csn0 {
+ rockchip,pins =
+ <1 RK_PD1 3 &pcfg_pull_up_4ma>;
+ };
+
+ spi2_miso: spi2-miso {
+ rockchip,pins =
+ <1 RK_PC6 3 &pcfg_pull_up_4ma>;
+ };
+
+ spi2_mosi: spi2-mosi {
+ rockchip,pins =
+ <1 RK_PC7 3 &pcfg_pull_up_4ma>;
+ };
+ };
+
+ tsadc {
+ tsadc_otp_pin: tsadc-otp-pin {
+ rockchip,pins =
+ <0 RK_PB2 0 &pcfg_pull_none>;
+ };
+
+ tsadc_otp_out: tsadc-otp-out {
+ rockchip,pins =
+ <0 RK_PB2 1 &pcfg_pull_none>;
+ };
+ };
+
+ uart0 {
+ uart0_xfer: uart0-xfer {
+ rockchip,pins =
+ <2 RK_PA1 1 &pcfg_pull_up>,
+ <2 RK_PA0 1 &pcfg_pull_up>;
+ };
+
+ uart0_cts: uart0-cts {
+ rockchip,pins =
+ <2 RK_PA2 1 &pcfg_pull_none>;
+ };
+
+ uart0_rts: uart0-rts {
+ rockchip,pins =
+ <2 RK_PA3 1 &pcfg_pull_none>;
+ };
+
+ uart0_rts_pin: uart0-rts-pin {
+ rockchip,pins =
+ <2 RK_PA3 0 &pcfg_pull_none>;
+ };
+ };
+
+ uart1 {
+ uart1_xfer: uart1-xfer {
+ rockchip,pins =
+ <1 RK_PD1 1 &pcfg_pull_up>,
+ <1 RK_PD0 1 &pcfg_pull_up>;
+ };
+
+ uart1_cts: uart1-cts {
+ rockchip,pins =
+ <1 RK_PC6 1 &pcfg_pull_none>;
+ };
+
+ uart1_rts: uart1-rts {
+ rockchip,pins =
+ <1 RK_PC7 1 &pcfg_pull_none>;
+ };
+ };
+
+ uart2-m0 {
+ uart2m0_xfer: uart2m0-xfer {
+ rockchip,pins =
+ <1 RK_PC7 2 &pcfg_pull_up>,
+ <1 RK_PC6 2 &pcfg_pull_up>;
+ };
+ };
+
+ uart2-m1 {
+ uart2m1_xfer: uart2m1-xfer {
+ rockchip,pins =
+ <4 RK_PD3 2 &pcfg_pull_up>,
+ <4 RK_PD2 2 &pcfg_pull_up>;
+ };
+ };
+
+ uart3 {
+ uart3_xfer: uart3-xfer {
+ rockchip,pins =
+ <3 RK_PB5 4 &pcfg_pull_up>,
+ <3 RK_PB4 4 &pcfg_pull_up>;
+ };
+ };
+
+ uart3-m1 {
+ uart3m1_xfer: uart3m1-xfer {
+ rockchip,pins =
+ <0 RK_PC2 3 &pcfg_pull_up>,
+ <0 RK_PC1 3 &pcfg_pull_up>;
+ };
+ };
+
+ uart4 {
+ uart4_xfer: uart4-xfer {
+ rockchip,pins =
+ <4 RK_PB1 1 &pcfg_pull_up>,
+ <4 RK_PB0 1 &pcfg_pull_up>;
+ };
+
+ uart4_cts: uart4-cts {
+ rockchip,pins =
+ <4 RK_PA6 1 &pcfg_pull_none>;
+ };
+
+ uart4_rts: uart4-rts {
+ rockchip,pins =
+ <4 RK_PA7 1 &pcfg_pull_none>;
+ };
+
+ uart4_rts_pin: uart4-rts-pin {
+ rockchip,pins =
+ <4 RK_PA7 0 &pcfg_pull_none>;
+ };
+ };
};
};
diff --git a/arch/arm/dts/rk3328-u-boot.dtsi b/arch/arm/dts/rk3328-u-boot.dtsi
index e0c6aee..d3608bd 100644
--- a/arch/arm/dts/rk3328-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-u-boot.dtsi
@@ -130,6 +130,10 @@
bootph-all;
};
+&vop {
+ bootph-some-ram;
+};
+
#ifdef CONFIG_ROCKCHIP_SPI_IMAGE
&binman {
simple-bin-spi {
diff --git a/arch/arm/dts/rk3399-rock-pi-4a-u-boot.dtsi b/arch/arm/dts/rk3399-rock-pi-4a-u-boot.dtsi
index 85ee577..3838562 100644
--- a/arch/arm/dts/rk3399-rock-pi-4a-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-rock-pi-4a-u-boot.dtsi
@@ -4,3 +4,10 @@
*/
#include "rk3399-rock-pi-4-u-boot.dtsi"
+
+&spi1 {
+ flash@0 {
+ bootph-pre-ram;
+ bootph-some-ram;
+ };
+};
diff --git a/arch/arm/dts/rk3399-rock-pi-4a.dts b/arch/arm/dts/rk3399-rock-pi-4a.dts
index 931334a..d5df893 100644
--- a/arch/arm/dts/rk3399-rock-pi-4a.dts
+++ b/arch/arm/dts/rk3399-rock-pi-4a.dts
@@ -12,3 +12,13 @@
model = "Radxa ROCK Pi 4A";
compatible = "radxa,rockpi4a", "radxa,rockpi4", "rockchip,rk3399";
};
+
+&spi1 {
+ status = "okay";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <10000000>;
+ };
+};
diff --git a/arch/arm/dts/rk3566-anbernic-rgxx3-u-boot.dtsi b/arch/arm/dts/rk3566-anbernic-rgxx3-u-boot.dtsi
index 791f16b..793ed4a 100644
--- a/arch/arm/dts/rk3566-anbernic-rgxx3-u-boot.dtsi
+++ b/arch/arm/dts/rk3566-anbernic-rgxx3-u-boot.dtsi
@@ -6,12 +6,6 @@
chosen {
u-boot,spl-boot-order = "same-as-spl", &sdmmc1, &sdmmc0;
};
-
- rng: rng@fe388000 {
- compatible = "rockchip,cryptov2-rng";
- reg = <0x0 0xfe388000 0x0 0x2000>;
- status = "okay";
- };
};
&dsi_dphy0 {
diff --git a/arch/arm/dts/rk3566-pinetab2-u-boot.dtsi b/arch/arm/dts/rk3566-pinetab2-u-boot.dtsi
index 4aa6ab1..eb18008 100644
--- a/arch/arm/dts/rk3566-pinetab2-u-boot.dtsi
+++ b/arch/arm/dts/rk3566-pinetab2-u-boot.dtsi
@@ -3,20 +3,31 @@
#include "rk356x-u-boot.dtsi"
&fspi_dual_io_pins {
- bootph-all;
+ bootph-pre-ram;
+ bootph-some-ram;
};
&gpio0 {
- bootph-all;
+ bootph-pre-ram;
};
&i2c0 {
bootph-pre-ram;
};
-&rk817 {
+&i2c0_xfer {
bootph-pre-ram;
+};
+&i2s1m0_mclk {
+ bootph-pre-ram;
+};
+
+&pmic_int_l {
+ bootph-pre-ram;
+};
+
+&rk817 {
regulators {
bootph-pre-ram;
};
@@ -27,15 +38,13 @@
};
&sdmmc_pwren_l {
- bootph-all;
+ bootph-pre-ram;
};
&sfc {
- bootph-pre-ram;
- u-boot,spl-sfc-no-dma;
-
flash@0 {
bootph-pre-ram;
+ bootph-some-ram;
};
};
diff --git a/arch/arm/dts/rk3566-quartz64-a-u-boot.dtsi b/arch/arm/dts/rk3566-quartz64-a-u-boot.dtsi
index 930d660..0e25b7e 100644
--- a/arch/arm/dts/rk3566-quartz64-a-u-boot.dtsi
+++ b/arch/arm/dts/rk3566-quartz64-a-u-boot.dtsi
@@ -3,7 +3,7 @@
#include "rk356x-u-boot.dtsi"
&gpio0 {
- bootph-all;
+ bootph-pre-ram;
};
&sdhci {
@@ -13,11 +13,9 @@
};
&sfc {
- bootph-pre-ram;
- u-boot,spl-sfc-no-dma;
-
flash@0 {
bootph-pre-ram;
+ bootph-some-ram;
};
};
@@ -34,5 +32,5 @@
};
&vcc_sd_h {
- bootph-all;
+ bootph-pre-ram;
};
diff --git a/arch/arm/dts/rk3566-quartz64-b-u-boot.dtsi b/arch/arm/dts/rk3566-quartz64-b-u-boot.dtsi
index c235b43..f2c9d8e 100644
--- a/arch/arm/dts/rk3566-quartz64-b-u-boot.dtsi
+++ b/arch/arm/dts/rk3566-quartz64-b-u-boot.dtsi
@@ -9,11 +9,9 @@
};
&sfc {
- bootph-pre-ram;
- u-boot,spl-sfc-no-dma;
-
flash@0 {
bootph-pre-ram;
+ bootph-some-ram;
};
};
diff --git a/arch/arm/dts/rk3568-generic-u-boot.dtsi b/arch/arm/dts/rk3568-generic-u-boot.dtsi
index 6e8307e..fd7f536 100644
--- a/arch/arm/dts/rk3568-generic-u-boot.dtsi
+++ b/arch/arm/dts/rk3568-generic-u-boot.dtsi
@@ -1,3 +1,10 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
#include "rk356x-u-boot.dtsi"
+
+&sfc {
+ flash@0 {
+ bootph-pre-ram;
+ bootph-some-ram;
+ };
+};
diff --git a/arch/arm/dts/rk3568-generic.dts b/arch/arm/dts/rk3568-generic.dts
index 88eb1bf..085a092 100644
--- a/arch/arm/dts/rk3568-generic.dts
+++ b/arch/arm/dts/rk3568-generic.dts
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
- * Minimal generic DT for RK3566/RK3568 with eMMC and SD-card enabled
+ * Minimal generic DT for RK3566/RK3568 with eMMC, SD-card, SPI flash and USB OTG enabled
*/
/dts-v1/;
@@ -12,7 +12,7 @@
aliases {
mmc0 = &sdhci;
- mmc1 = &sdmmc;
+ mmc1 = &sdmmc0;
};
chosen {
@@ -28,7 +28,7 @@
no-sdio;
non-removable;
pinctrl-names = "default";
- pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd>;
+ pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>;
status = "okay";
};
@@ -39,10 +39,39 @@
no-mmc;
no-sdio;
pinctrl-names = "default";
- pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd>;
+ pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
status = "okay";
};
+&sfc {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <24000000>;
+ };
+};
+
&uart2 {
status = "okay";
};
+
+&usb_host0_xhci {
+ dr_mode = "peripheral";
+ extcon = <&usb2phy0>;
+ maximum-speed = "high-speed";
+ phys = <&usb2phy0_otg>;
+ phy-names = "usb2-phy";
+ status = "okay";
+};
+
+&usb2phy0 {
+ status = "okay";
+};
+
+&usb2phy0_otg {
+ status = "okay";
+};
diff --git a/arch/arm/dts/rk3568-odroid-m1-u-boot.dtsi b/arch/arm/dts/rk3568-odroid-m1-u-boot.dtsi
index 1fc71fa..d8a6dd8 100644
--- a/arch/arm/dts/rk3568-odroid-m1-u-boot.dtsi
+++ b/arch/arm/dts/rk3568-odroid-m1-u-boot.dtsi
@@ -3,7 +3,8 @@
#include "rk356x-u-boot.dtsi"
&fspi_dual_io_pins {
- bootph-all;
+ bootph-pre-ram;
+ bootph-some-ram;
};
&sdhci {
@@ -15,10 +16,8 @@
};
&sfc {
- bootph-pre-ram;
- u-boot,spl-sfc-no-dma;
-
flash@0 {
bootph-pre-ram;
+ bootph-some-ram;
};
};
diff --git a/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi b/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
index 5b823fc..9d18f5d 100644
--- a/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
+++ b/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
@@ -26,16 +26,15 @@
};
&sfc {
- bootph-pre-ram;
- u-boot,spl-sfc-no-dma;
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
flash@0 {
- bootph-pre-ram;
compatible = "jedec,spi-nor";
reg = <0>;
+ bootph-pre-ram;
+ bootph-some-ram;
spi-max-frequency = <24000000>;
spi-rx-bus-width = <4>;
spi-tx-bus-width = <1>;
diff --git a/arch/arm/dts/rk356x-u-boot.dtsi b/arch/arm/dts/rk356x-u-boot.dtsi
index d347080..0a0943b4 100644
--- a/arch/arm/dts/rk356x-u-boot.dtsi
+++ b/arch/arm/dts/rk356x-u-boot.dtsi
@@ -21,6 +21,11 @@
bootph-all;
};
+ rng: rng@fe388000 {
+ compatible = "rockchip,cryptov2-rng";
+ reg = <0x0 0xfe388000 0x0 0x2000>;
+ };
+
otp: nvmem@fe38c000 {
compatible = "rockchip,rk3568-otp";
reg = <0x0 0xfe38c000 0x0 0x4000>;
@@ -33,112 +38,6 @@
};
};
-&xin24m {
- bootph-all;
-};
-
-&cru {
- bootph-all;
-};
-
-&pmucru {
- bootph-all;
-};
-
-&grf {
- bootph-all;
-};
-
-&pmugrf {
- bootph-all;
-};
-
-&pinctrl {
- bootph-all;
-};
-
-&pcfg_pull_none_smt {
- bootph-all;
-};
-
-&pcfg_pull_none {
- bootph-all;
-};
-
-&pcfg_pull_up_drv_level_2 {
- bootph-all;
-};
-
-&pcfg_pull_up {
- bootph-all;
-};
-
-&emmc_bus8 {
- bootph-all;
-};
-
-&emmc_clk {
- bootph-all;
-};
-
-&emmc_cmd {
- bootph-all;
-};
-
-&emmc_datastrobe {
- bootph-all;
-};
-
-&emmc_rstnout {
- bootph-all;
-};
-
-&fspi_pins {
- bootph-all;
-};
-
-&i2c0_xfer {
- bootph-all;
-};
-
-&sdmmc0_bus4 {
- bootph-all;
-};
-
-&sdmmc0_clk {
- bootph-all;
-};
-
-&sdmmc0_cmd {
- bootph-all;
-};
-
-&sdmmc0_det {
- bootph-all;
-};
-
-&sdmmc0_pwren {
- bootph-all;
-};
-
-&uart2m0_xfer {
- bootph-all;
-};
-
-&sdhci {
- bootph-pre-ram;
- max-frequency = <200000000>;
-};
-
-&sdmmc0 {
- bootph-pre-ram;
-};
-
-&uart2 {
- bootph-pre-ram;
- clock-frequency = <24000000>;
-};
-
#ifdef CONFIG_ROCKCHIP_SPI_IMAGE
&binman {
simple-bin-spi {
@@ -149,3 +48,124 @@
};
};
#endif
+
+&cru {
+ bootph-all;
+};
+
+&emmc_bus8 {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
+&emmc_clk {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
+&emmc_cmd {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
+&emmc_datastrobe {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
+&emmc_rstnout {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
+&fspi_pins {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
+&grf {
+ bootph-all;
+};
+
+&pcfg_pull_none {
+ bootph-all;
+};
+
+&pcfg_pull_none_smt {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
+&pcfg_pull_up {
+ bootph-all;
+};
+
+&pcfg_pull_up_drv_level_2 {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
+&pinctrl {
+ bootph-all;
+};
+
+&pmucru {
+ bootph-all;
+};
+
+&pmugrf {
+ bootph-all;
+};
+
+&sdhci {
+ bootph-pre-ram;
+ bootph-some-ram;
+ max-frequency = <200000000>;
+};
+
+&sdmmc0 {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
+&sdmmc0_bus4 {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
+&sdmmc0_clk {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
+&sdmmc0_cmd {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
+&sdmmc0_det {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
+&sdmmc0_pwren {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
+&sfc {
+ u-boot,spl-sfc-no-dma;
+};
+
+&uart2 {
+ bootph-all;
+ clock-frequency = <24000000>;
+};
+
+&uart2m0_xfer {
+ bootph-all;
+};
+
+&xin24m {
+ bootph-all;
+};
diff --git a/arch/arm/dts/rk3588-coolpi-cm5-evb-u-boot.dtsi b/arch/arm/dts/rk3588-coolpi-cm5-evb-u-boot.dtsi
index ed15b14..f0ef016 100644
--- a/arch/arm/dts/rk3588-coolpi-cm5-evb-u-boot.dtsi
+++ b/arch/arm/dts/rk3588-coolpi-cm5-evb-u-boot.dtsi
@@ -3,7 +3,8 @@
#include "rk3588-u-boot.dtsi"
&fspim2_pins {
- bootph-all;
+ bootph-pre-ram;
+ bootph-some-ram;
};
&sdhci {
@@ -12,16 +13,15 @@
};
&sfc {
- bootph-pre-ram;
- u-boot,spl-sfc-no-dma;
pinctrl-names = "default";
pinctrl-0 = <&fspim2_pins>;
status = "okay";
flash@0 {
- bootph-pre-ram;
compatible = "jedec,spi-nor";
reg = <0>;
+ bootph-pre-ram;
+ bootph-some-ram;
spi-max-frequency = <24000000>;
spi-rx-bus-width = <4>;
spi-tx-bus-width = <1>;
diff --git a/arch/arm/dts/rk3588-generic-u-boot.dtsi b/arch/arm/dts/rk3588-generic-u-boot.dtsi
index 853ed58..225dfa0 100644
--- a/arch/arm/dts/rk3588-generic-u-boot.dtsi
+++ b/arch/arm/dts/rk3588-generic-u-boot.dtsi
@@ -1,3 +1,25 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
#include "rk3588s-u-boot.dtsi"
+
+&u2phy0 {
+ status = "okay";
+};
+
+&u2phy0_otg {
+ status = "okay";
+};
+
+&usbdp_phy0 {
+ status = "okay";
+};
+
+&usbdp_phy0_u3 {
+ status = "okay";
+};
+
+&usb_host0_xhci {
+ dr_mode = "peripheral";
+ maximum-speed = "high-speed";
+ status = "okay";
+};
diff --git a/arch/arm/dts/rk3588-generic.dts b/arch/arm/dts/rk3588-generic.dts
index e4721d9..95d7576 100644
--- a/arch/arm/dts/rk3588-generic.dts
+++ b/arch/arm/dts/rk3588-generic.dts
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
- * Minimal generic DT for RK3588S/RK3588 with eMMC and SD-card enabled
+ * Minimal generic DT for RK3588S/RK3588 with eMMC, SD-card and USB OTG enabled
*/
/dts-v1/;
@@ -40,5 +40,6 @@
};
&uart2 {
+ pinctrl-0 = <&uart2m0_xfer>;
status = "okay";
};
diff --git a/arch/arm/dts/rk3588-nanopc-t6-u-boot.dtsi b/arch/arm/dts/rk3588-nanopc-t6-u-boot.dtsi
index 60494bb..9683856 100644
--- a/arch/arm/dts/rk3588-nanopc-t6-u-boot.dtsi
+++ b/arch/arm/dts/rk3588-nanopc-t6-u-boot.dtsi
@@ -7,12 +7,11 @@
#include "rk3588-u-boot.dtsi"
&fspim1_pins {
- bootph-all;
+ bootph-pre-ram;
+ bootph-some-ram;
};
&sfc {
- bootph-pre-ram;
- u-boot,spl-sfc-no-dma;
pinctrl-names = "default";
pinctrl-0 = <&fspim1_pins>;
#address-cells = <1>;
@@ -20,9 +19,10 @@
status = "okay";
flash@0 {
- bootph-pre-ram;
compatible = "jedec,spi-nor";
reg = <0>;
+ bootph-pre-ram;
+ bootph-some-ram;
spi-max-frequency = <24000000>;
spi-rx-bus-width = <4>;
spi-tx-bus-width = <1>;
diff --git a/arch/arm/dts/rk3588-orangepi-5-plus-u-boot.dtsi b/arch/arm/dts/rk3588-orangepi-5-plus-u-boot.dtsi
index 5d5fa6f..1ab31a4 100644
--- a/arch/arm/dts/rk3588-orangepi-5-plus-u-boot.dtsi
+++ b/arch/arm/dts/rk3588-orangepi-5-plus-u-boot.dtsi
@@ -3,7 +3,8 @@
#include "rk3588-u-boot.dtsi"
&fspim1_pins {
- bootph-all;
+ bootph-pre-ram;
+ bootph-some-ram;
};
&sdhci {
@@ -12,10 +13,8 @@
};
&sfc {
- bootph-pre-ram;
- u-boot,spl-sfc-no-dma;
-
flash@0 {
bootph-pre-ram;
+ bootph-some-ram;
};
};
diff --git a/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi b/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi
index 9ee9dd0..d6020ca 100644
--- a/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi
+++ b/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi
@@ -18,7 +18,8 @@
};
&fspim2_pins {
- bootph-all;
+ bootph-pre-ram;
+ bootph-some-ram;
};
&pinctrl {
@@ -35,16 +36,15 @@
};
&sfc {
- bootph-pre-ram;
- u-boot,spl-sfc-no-dma;
pinctrl-names = "default";
pinctrl-0 = <&fspim2_pins>;
status = "okay";
flash@0 {
- bootph-pre-ram;
compatible = "jedec,spi-nor";
reg = <0>;
+ bootph-pre-ram;
+ bootph-some-ram;
spi-max-frequency = <24000000>;
spi-rx-bus-width = <4>;
spi-tx-bus-width = <1>;
diff --git a/arch/arm/dts/rk3588-turing-rk1-u-boot.dtsi b/arch/arm/dts/rk3588-turing-rk1-u-boot.dtsi
index ca2a684..a50bcc4 100644
--- a/arch/arm/dts/rk3588-turing-rk1-u-boot.dtsi
+++ b/arch/arm/dts/rk3588-turing-rk1-u-boot.dtsi
@@ -12,6 +12,10 @@
};
&uart9 {
- bootph-pre-ram;
+ bootph-all;
clock-frequency = <24000000>;
};
+
+&uart9m0_xfer {
+ bootph-all;
+};
diff --git a/arch/arm/dts/rk3588s-coolpi-4b-u-boot.dtsi b/arch/arm/dts/rk3588s-coolpi-4b-u-boot.dtsi
index 6e4b970..f51d7f3 100644
--- a/arch/arm/dts/rk3588s-coolpi-4b-u-boot.dtsi
+++ b/arch/arm/dts/rk3588s-coolpi-4b-u-boot.dtsi
@@ -3,7 +3,8 @@
#include "rk3588s-u-boot.dtsi"
&fspim2_pins {
- bootph-all;
+ bootph-pre-ram;
+ bootph-some-ram;
};
&sdhci {
@@ -12,16 +13,15 @@
};
&sfc {
- bootph-pre-ram;
- u-boot,spl-sfc-no-dma;
pinctrl-names = "default";
pinctrl-0 = <&fspim2_pins>;
status = "okay";
flash@0 {
- bootph-pre-ram;
compatible = "jedec,spi-nor";
reg = <0>;
+ bootph-pre-ram;
+ bootph-some-ram;
spi-max-frequency = <24000000>;
spi-rx-bus-width = <4>;
spi-tx-bus-width = <1>;
diff --git a/arch/arm/dts/rk3588s-orangepi-5-u-boot.dtsi b/arch/arm/dts/rk3588s-orangepi-5-u-boot.dtsi
index 888d1b9..12a92c0 100644
--- a/arch/arm/dts/rk3588s-orangepi-5-u-boot.dtsi
+++ b/arch/arm/dts/rk3588s-orangepi-5-u-boot.dtsi
@@ -9,14 +9,13 @@
};
&fspim0_pins {
- bootph-all;
+ bootph-pre-ram;
+ bootph-some-ram;
};
&sfc {
- bootph-pre-ram;
- u-boot,spl-sfc-no-dma;
-
flash@0 {
bootph-pre-ram;
+ bootph-some-ram;
};
};
diff --git a/arch/arm/dts/rk3588s-u-boot.dtsi b/arch/arm/dts/rk3588s-u-boot.dtsi
index ac67c77..d3c2579 100644
--- a/arch/arm/dts/rk3588s-u-boot.dtsi
+++ b/arch/arm/dts/rk3588s-u-boot.dtsi
@@ -41,6 +41,17 @@
status = "disabled";
};
+ vo0_grf: syscon@fd5a6000 {
+ compatible = "rockchip,rk3588-vo-grf", "syscon";
+ reg = <0x0 0xfd5a6000 0x0 0x2000>;
+ clocks = <&cru PCLK_VO0GRF>;
+ };
+
+ usb_grf: syscon@fd5ac000 {
+ compatible = "rockchip,rk3588-usb-grf", "syscon";
+ reg = <0x0 0xfd5ac000 0x0 0x4000>;
+ };
+
usbdpphy0_grf: syscon@fd5c8000 {
compatible = "rockchip,rk3588-usbdpphy-grf", "syscon";
reg = <0x0 0xfd5c8000 0x0 0x4000>;
@@ -72,26 +83,9 @@
};
};
- vo0_grf: syscon@fd5a6000 {
- compatible = "rockchip,rk3588-vo-grf", "syscon";
- reg = <0x0 0xfd5a6000 0x0 0x2000>;
- clocks = <&cru PCLK_VO0GRF>;
- };
-
- usb_grf: syscon@fd5ac000 {
- compatible = "rockchip,rk3588-usb-grf", "syscon";
- reg = <0x0 0xfd5ac000 0x0 0x4000>;
- };
-
- usbdpphy0_grf: syscon@fd5c8000 {
- compatible = "rockchip,rk3588-usbdpphy-grf", "syscon";
- reg = <0x0 0xfd5c8000 0x0 0x4000>;
- };
-
rng: rng@fe378000 {
compatible = "rockchip,trngv1";
reg = <0x0 0xfe378000 0x0 0x200>;
- status = "disabled";
};
usbdp_phy0: phy@fed80000 {
@@ -126,107 +120,6 @@
};
};
-&emmc_bus8 {
- bootph-all;
-};
-
-&emmc_clk {
- bootph-all;
-};
-
-&emmc_cmd {
- bootph-all;
-};
-
-&emmc_data_strobe {
- bootph-all;
-};
-
-&emmc_rstnout {
- bootph-all;
-};
-
-&pinctrl {
- bootph-all;
-};
-
-&pcfg_pull_none {
- bootph-all;
-};
-
-&pcfg_pull_up_drv_level_2 {
- bootph-all;
-};
-
-&pcfg_pull_up {
- bootph-all;
-};
-
-&xin24m {
- bootph-all;
-};
-
-&cru {
- bootph-pre-ram;
-};
-
-&sys_grf {
- bootph-pre-ram;
-};
-
-&pmu1grf {
- bootph-all;
-};
-
-&scmi {
- bootph-pre-ram;
-};
-
-&scmi_clk {
- bootph-pre-ram;
-};
-
-&sdmmc {
- bootph-pre-ram;
- bootph-some-ram;
- u-boot,spl-fifo-mode;
-};
-
-&sdhci {
- bootph-pre-ram;
- bootph-some-ram;
- u-boot,spl-fifo-mode;
-};
-
-&sdmmc_bus4 {
- bootph-all;
-};
-
-&sdmmc_clk {
- bootph-all;
-};
-
-&sdmmc_cmd {
- bootph-all;
-};
-
-&sdmmc_det {
- bootph-all;
-};
-
-&uart2 {
- bootph-pre-ram;
- clock-frequency = <24000000>;
-};
-
-&uart2m0_xfer {
- bootph-all;
-};
-
-&ioc {
- bootph-pre-ram;
-};
-
#ifdef CONFIG_ROCKCHIP_SPI_IMAGE
&binman {
simple-bin-spi {
@@ -237,3 +130,128 @@
};
};
#endif
+
+&cru {
+ bootph-all;
+};
+
+&emmc_bus8 {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
+&emmc_clk {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
+&emmc_cmd {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
+&emmc_data_strobe {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
+&emmc_rstnout {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
+&ioc {
+ bootph-all;
+};
+
+&pcfg_pull_down {
+ bootph-all;
+};
+
+&pcfg_pull_none {
+ bootph-all;
+};
+
+&pcfg_pull_up {
+ bootph-all;
+};
+
+&pcfg_pull_up_drv_level_2 {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
+&php_grf {
+ bootph-all;
+};
+
+&pinctrl {
+ bootph-all;
+};
+
+&pmu1grf {
+ bootph-all;
+};
+
+&scmi {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
+&scmi_clk {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
+&sdhci {
+ bootph-pre-ram;
+ bootph-some-ram;
+ u-boot,spl-fifo-mode;
+};
+
+&sdmmc {
+ bootph-pre-ram;
+ bootph-some-ram;
+ u-boot,spl-fifo-mode;
+};
+
+&sdmmc_bus4 {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
+&sdmmc_clk {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
+&sdmmc_cmd {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
+&sdmmc_det {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
+
+&sfc {
+ u-boot,spl-sfc-no-dma;
+};
+
+&sys_grf {
+ bootph-all;
+};
+
+&uart2 {
+ bootph-all;
+ clock-frequency = <24000000>;
+};
+
+&uart2m0_xfer {
+ bootph-all;
+};
+
+&xin24m {
+ bootph-all;
+};
diff --git a/arch/arm/dts/sdm845-db845c-u-boot.dtsi b/arch/arm/dts/sdm845-db845c-u-boot.dtsi
new file mode 100644
index 0000000..9e4533e
--- /dev/null
+++ b/arch/arm/dts/sdm845-db845c-u-boot.dtsi
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: GPL-2.0
+
+/* Needed for Linux to boot from USB, otherwise if PCIe driver is not in initramfs
+ * the VBUS supply will never get turned on.
+ * https://lore.kernel.org/linux-arm-msm/20240320122515.3243711-1-caleb.connolly@linaro.org/
+ */
+&pcie0_3p3v_dual {
+ regulator-always-on;
+};
+
+&sdhc_2 {
+ /* Remove the unsupported rpmhcc xo clock reference */
+ clocks = <&gcc GCC_SDCC2_AHB_CLK>,
+ <&gcc GCC_SDCC2_APPS_CLK>;
+ clock-names = "iface", "core";
+};
diff --git a/arch/arm/dts/sdm845-db845c.dts b/arch/arm/dts/sdm845-db845c.dts
deleted file mode 100644
index c7eba6c..0000000
--- a/arch/arm/dts/sdm845-db845c.dts
+++ /dev/null
@@ -1,1190 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Copyright (c) 2019, Linaro Ltd.
- */
-
-/dts-v1/;
-
-#include <dt-bindings/leds/common.h>
-#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
-#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
-#include <dt-bindings/sound/qcom,q6afe.h>
-#include <dt-bindings/sound/qcom,q6asm.h>
-#include "sdm845.dtsi"
-#include "sdm845-wcd9340.dtsi"
-#include "pm8998.dtsi"
-#include "pmi8998.dtsi"
-
-/ {
- model = "Thundercomm Dragonboard 845c";
- compatible = "thundercomm,db845c", "qcom,sdm845";
- qcom,msm-id = <341 0x20001>;
- qcom,board-id = <8 0>;
-
- aliases {
- serial0 = &uart9;
- serial1 = &uart6;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- /* Fixed crystal oscillator dedicated to MCP2517FD */
- clk40M: can-clock {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <40000000>;
- };
-
- dc12v: dc12v-regulator {
- compatible = "regulator-fixed";
- regulator-name = "DC12V";
- regulator-min-microvolt = <12000000>;
- regulator-max-microvolt = <12000000>;
- regulator-always-on;
- };
-
- gpio-keys {
- compatible = "gpio-keys";
- autorepeat;
-
- pinctrl-names = "default";
- pinctrl-0 = <&vol_up_pin_a>;
-
- key-vol-up {
- label = "Volume Up";
- linux,code = <KEY_VOLUMEUP>;
- gpios = <&pm8998_gpios 6 GPIO_ACTIVE_LOW>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- led-0 {
- label = "green:user4";
- function = LED_FUNCTION_INDICATOR;
- color = <LED_COLOR_ID_GREEN>;
- gpios = <&pm8998_gpios 13 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "panic-indicator";
- default-state = "off";
- };
-
- led-1 {
- label = "yellow:wlan";
- function = LED_FUNCTION_WLAN;
- color = <LED_COLOR_ID_YELLOW>;
- gpios = <&pm8998_gpios 9 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "phy0tx";
- default-state = "off";
- };
-
- led-2 {
- label = "blue:bt";
- function = LED_FUNCTION_BLUETOOTH;
- color = <LED_COLOR_ID_BLUE>;
- gpios = <&pm8998_gpios 5 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "bluetooth-power";
- default-state = "off";
- };
- };
-
- hdmi-out {
- compatible = "hdmi-connector";
- type = "a";
-
- port {
- hdmi_con: endpoint {
- remote-endpoint = <<9611_out>;
- };
- };
- };
-
- reserved-memory {
- /* Cont splash region set up by the bootloader */
- cont_splash_mem: framebuffer@9d400000 {
- reg = <0x0 0x9d400000 0x0 0x2400000>;
- no-map;
- };
- };
-
- lt9611_1v8: lt9611-vdd18-regulator {
- compatible = "regulator-fixed";
- regulator-name = "LT9611_1V8";
-
- vin-supply = <&vdc_5v>;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
-
- lt9611_3v3: lt9611-3v3 {
- compatible = "regulator-fixed";
- regulator-name = "LT9611_3V3";
-
- vin-supply = <&vdc_3v3>;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
-
- /*
- * TODO: make it possible to drive same GPIO from two clients
- * gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>;
- * enable-active-high;
- */
- };
-
- pcie0_1p05v: pcie-0-1p05v-regulator {
- compatible = "regulator-fixed";
- regulator-name = "PCIE0_1.05V";
-
- vin-supply = <&vbat>;
- regulator-min-microvolt = <1050000>;
- regulator-max-microvolt = <1050000>;
-
- /*
- * TODO: make it possible to drive same GPIO from two clients
- * gpio = <&tlmm 90 GPIO_ACTIVE_HIGH>;
- * enable-active-high;
- */
- };
-
- cam0_dvdd_1v2: cam0-dvdd-1v2-regulator {
- compatible = "regulator-fixed";
- regulator-name = "CAM0_DVDD_1V2";
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1200000>;
- enable-active-high;
- gpio = <&pm8998_gpios 12 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&cam0_dvdd_1v2_en_default>;
- vin-supply = <&vbat>;
- };
-
- cam0_avdd_2v8: cam0-avdd-2v8-regulator {
- compatible = "regulator-fixed";
- regulator-name = "CAM0_AVDD_2V8";
- regulator-min-microvolt = <2800000>;
- regulator-max-microvolt = <2800000>;
- enable-active-high;
- gpio = <&pm8998_gpios 10 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&cam0_avdd_2v8_en_default>;
- vin-supply = <&vbat>;
- };
-
- /* This regulator is enabled when the VREG_LVS1A_1P8 trace is enabled */
- cam3_avdd_2v8: cam3-avdd-2v8-regulator {
- compatible = "regulator-fixed";
- regulator-name = "CAM3_AVDD_2V8";
- regulator-min-microvolt = <2800000>;
- regulator-max-microvolt = <2800000>;
- regulator-always-on;
- vin-supply = <&vbat>;
- };
-
- pcie0_3p3v_dual: vldo-3v3-regulator {
- compatible = "regulator-fixed";
- regulator-name = "VLDO_3V3";
-
- vin-supply = <&vbat>;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
-
- gpio = <&tlmm 90 GPIO_ACTIVE_HIGH>;
- enable-active-high;
-
- pinctrl-names = "default";
- pinctrl-0 = <&pcie0_pwren_state>;
- };
-
- v5p0_hdmiout: v5p0-hdmiout-regulator {
- compatible = "regulator-fixed";
- regulator-name = "V5P0_HDMIOUT";
-
- vin-supply = <&vdc_5v>;
- regulator-min-microvolt = <500000>;
- regulator-max-microvolt = <500000>;
-
- /*
- * TODO: make it possible to drive same GPIO from two clients
- * gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>;
- * enable-active-high;
- */
- };
-
- vbat: vbat-regulator {
- compatible = "regulator-fixed";
- regulator-name = "VBAT";
-
- vin-supply = <&dc12v>;
- regulator-min-microvolt = <4200000>;
- regulator-max-microvolt = <4200000>;
- regulator-always-on;
- };
-
- vbat_som: vbat-som-regulator {
- compatible = "regulator-fixed";
- regulator-name = "VBAT_SOM";
-
- vin-supply = <&dc12v>;
- regulator-min-microvolt = <4200000>;
- regulator-max-microvolt = <4200000>;
- regulator-always-on;
- };
-
- vdc_3v3: vdc-3v3-regulator {
- compatible = "regulator-fixed";
- regulator-name = "VDC_3V3";
- vin-supply = <&dc12v>;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-always-on;
- };
-
- vdc_5v: vdc-5v-regulator {
- compatible = "regulator-fixed";
- regulator-name = "VDC_5V";
-
- vin-supply = <&dc12v>;
- regulator-min-microvolt = <500000>;
- regulator-max-microvolt = <500000>;
- regulator-always-on;
- };
-
- vreg_s4a_1p8: vreg-s4a-1p8 {
- compatible = "regulator-fixed";
- regulator-name = "vreg_s4a_1p8";
-
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-always-on;
- };
-
- vph_pwr: vph-pwr-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vph_pwr";
-
- vin-supply = <&vbat_som>;
- };
-};
-
-&adsp_pas {
- status = "okay";
-
- firmware-name = "qcom/sdm845/adsp.mbn";
-};
-
-&apps_rsc {
- regulators-0 {
- compatible = "qcom,pm8998-rpmh-regulators";
- qcom,pmic-id = "a";
- vdd-s1-supply = <&vph_pwr>;
- vdd-s2-supply = <&vph_pwr>;
- vdd-s3-supply = <&vph_pwr>;
- vdd-s4-supply = <&vph_pwr>;
- vdd-s5-supply = <&vph_pwr>;
- vdd-s6-supply = <&vph_pwr>;
- vdd-s7-supply = <&vph_pwr>;
- vdd-s8-supply = <&vph_pwr>;
- vdd-s9-supply = <&vph_pwr>;
- vdd-s10-supply = <&vph_pwr>;
- vdd-s11-supply = <&vph_pwr>;
- vdd-s12-supply = <&vph_pwr>;
- vdd-s13-supply = <&vph_pwr>;
- vdd-l1-l27-supply = <&vreg_s7a_1p025>;
- vdd-l2-l8-l17-supply = <&vreg_s3a_1p35>;
- vdd-l3-l11-supply = <&vreg_s7a_1p025>;
- vdd-l4-l5-supply = <&vreg_s7a_1p025>;
- vdd-l6-supply = <&vph_pwr>;
- vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>;
- vdd-l9-supply = <&vreg_bob>;
- vdd-l10-l23-l25-supply = <&vreg_bob>;
- vdd-l13-l19-l21-supply = <&vreg_bob>;
- vdd-l16-l28-supply = <&vreg_bob>;
- vdd-l18-l22-supply = <&vreg_bob>;
- vdd-l20-l24-supply = <&vreg_bob>;
- vdd-l26-supply = <&vreg_s3a_1p35>;
- vin-lvs-1-2-supply = <&vreg_s4a_1p8>;
-
- vreg_s3a_1p35: smps3 {
- regulator-min-microvolt = <1352000>;
- regulator-max-microvolt = <1352000>;
- };
-
- vreg_s5a_2p04: smps5 {
- regulator-min-microvolt = <1904000>;
- regulator-max-microvolt = <2040000>;
- };
-
- vreg_s7a_1p025: smps7 {
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <1028000>;
- };
-
- vreg_l1a_0p875: ldo1 {
- regulator-min-microvolt = <880000>;
- regulator-max-microvolt = <880000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vreg_l5a_0p8: ldo5 {
- regulator-min-microvolt = <800000>;
- regulator-max-microvolt = <800000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vreg_l12a_1p8: ldo12 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vreg_l7a_1p8: ldo7 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vreg_l13a_2p95: ldo13 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <2960000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vreg_l17a_1p3: ldo17 {
- regulator-min-microvolt = <1304000>;
- regulator-max-microvolt = <1304000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vreg_l20a_2p95: ldo20 {
- regulator-min-microvolt = <2960000>;
- regulator-max-microvolt = <2968000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vreg_l21a_2p95: ldo21 {
- regulator-min-microvolt = <2960000>;
- regulator-max-microvolt = <2968000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vreg_l24a_3p075: ldo24 {
- regulator-min-microvolt = <3088000>;
- regulator-max-microvolt = <3088000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vreg_l25a_3p3: ldo25 {
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3312000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vreg_l26a_1p2: ldo26 {
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1200000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vreg_lvs1a_1p8: lvs1 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-always-on;
- };
-
- vreg_lvs2a_1p8: lvs2 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-always-on;
- };
- };
-
- regulators-1 {
- compatible = "qcom,pmi8998-rpmh-regulators";
- qcom,pmic-id = "b";
-
- vdd-bob-supply = <&vph_pwr>;
-
- vreg_bob: bob {
- regulator-min-microvolt = <3312000>;
- regulator-max-microvolt = <3600000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>;
- regulator-allow-bypass;
- };
- };
-};
-
-&camss {
- status = "okay";
-
- vdda-phy-supply = <&vreg_l1a_0p875>;
- vdda-pll-supply = <&vreg_l26a_1p2>;
-};
-
-&cdsp_pas {
- status = "okay";
- firmware-name = "qcom/sdm845/cdsp.mbn";
-};
-
-&gcc {
- protected-clocks = <GCC_QSPI_CORE_CLK>,
- <GCC_QSPI_CORE_CLK_SRC>,
- <GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
- <GCC_LPASS_Q6_AXI_CLK>,
- <GCC_LPASS_SWAY_CLK>;
-};
-
-&gmu {
- status = "okay";
-};
-
-&gpi_dma0 {
- status = "okay";
-};
-
-&gpi_dma1 {
- status = "okay";
-};
-
-&gpu {
- status = "okay";
- zap-shader {
- memory-region = <&gpu_mem>;
- firmware-name = "qcom/sdm845/a630_zap.mbn";
- };
-};
-
-&i2c10 {
- status = "okay";
- clock-frequency = <400000>;
-
- lt9611_codec: hdmi-bridge@3b {
- compatible = "lontium,lt9611";
- reg = <0x3b>;
- #sound-dai-cells = <1>;
-
- interrupts-extended = <&tlmm 84 IRQ_TYPE_EDGE_FALLING>;
-
- reset-gpios = <&tlmm 128 GPIO_ACTIVE_HIGH>;
-
- vdd-supply = <<9611_1v8>;
- vcc-supply = <<9611_3v3>;
-
- pinctrl-names = "default";
- pinctrl-0 = <<9611_irq_pin>, <&dsi_sw_sel>;
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
-
- lt9611_a: endpoint {
- remote-endpoint = <&mdss_dsi0_out>;
- };
- };
-
- port@1 {
- reg = <1>;
-
- lt9611_b: endpoint {
- remote-endpoint = <&mdss_dsi1_out>;
- };
- };
-
- port@2 {
- reg = <2>;
-
- lt9611_out: endpoint {
- remote-endpoint = <&hdmi_con>;
- };
- };
- };
- };
-};
-
-&i2c11 {
- /* On Low speed expansion */
- clock-frequency = <100000>;
- status = "okay";
-};
-
-&i2c14 {
- /* On Low speed expansion */
- clock-frequency = <100000>;
- status = "okay";
-};
-
-&mdss {
- memory-region = <&cont_splash_mem>;
- status = "okay";
-};
-
-&mdss_dsi0 {
- status = "okay";
- vdda-supply = <&vreg_l26a_1p2>;
-
- qcom,dual-dsi-mode;
- qcom,master-dsi;
-
- ports {
- port@1 {
- endpoint {
- remote-endpoint = <<9611_a>;
- data-lanes = <0 1 2 3>;
- };
- };
- };
-};
-
-&mdss_dsi0_phy {
- status = "okay";
- vdds-supply = <&vreg_l1a_0p875>;
-};
-
-&mdss_dsi1 {
- vdda-supply = <&vreg_l26a_1p2>;
-
- qcom,dual-dsi-mode;
-
- /* DSI1 is slave, so use DSI0 clocks */
- assigned-clock-parents = <&mdss_dsi0_phy 0>, <&mdss_dsi0_phy 1>;
-
- status = "okay";
-
- ports {
- port@1 {
- endpoint {
- remote-endpoint = <<9611_b>;
- data-lanes = <0 1 2 3>;
- };
- };
- };
-};
-
-&mdss_dsi1_phy {
- vdds-supply = <&vreg_l1a_0p875>;
- status = "okay";
-};
-
-&mss_pil {
- status = "okay";
- firmware-name = "qcom/sdm845/mba.mbn", "qcom/sdm845/modem.mbn";
-};
-
-&pcie0 {
- status = "okay";
- perst-gpios = <&tlmm 35 GPIO_ACTIVE_LOW>;
- enable-gpio = <&tlmm 134 GPIO_ACTIVE_HIGH>;
-
- vddpe-3v3-supply = <&pcie0_3p3v_dual>;
-
- pinctrl-names = "default";
- pinctrl-0 = <&pcie0_default_state>;
-};
-
-&pcie0_phy {
- status = "okay";
-
- vdda-phy-supply = <&vreg_l1a_0p875>;
- vdda-pll-supply = <&vreg_l26a_1p2>;
-};
-
-&pcie1 {
- status = "okay";
- perst-gpios = <&tlmm 102 GPIO_ACTIVE_LOW>;
-
- pinctrl-names = "default";
- pinctrl-0 = <&pcie1_default_state>;
-};
-
-&pcie1_phy {
- status = "okay";
-
- vdda-phy-supply = <&vreg_l1a_0p875>;
- vdda-pll-supply = <&vreg_l26a_1p2>;
-};
-
-&pm8998_gpios {
- gpio-line-names =
- "NC",
- "NC",
- "WLAN_SW_CTRL",
- "NC",
- "PM_GPIO5_BLUE_BT_LED",
- "VOL_UP_N",
- "NC",
- "ADC_IN1",
- "PM_GPIO9_YEL_WIFI_LED",
- "CAM0_AVDD_EN",
- "NC",
- "CAM0_DVDD_EN",
- "PM_GPIO13_GREEN_U4_LED",
- "DIV_CLK2",
- "NC",
- "NC",
- "NC",
- "SMB_STAT",
- "NC",
- "NC",
- "ADC_IN2",
- "OPTION1",
- "WCSS_PWR_REQ",
- "PM845_GPIO24",
- "OPTION2",
- "PM845_SLB";
-
- cam0_dvdd_1v2_en_default: cam0-dvdd-1v2-en-state {
- pins = "gpio12";
- function = "normal";
-
- bias-pull-up;
- drive-push-pull;
- qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>;
- };
-
- cam0_avdd_2v8_en_default: cam0-avdd-2v8-en-state {
- pins = "gpio10";
- function = "normal";
-
- bias-pull-up;
- drive-push-pull;
- qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>;
- };
-
- vol_up_pin_a: vol-up-active-state {
- pins = "gpio6";
- function = "normal";
- input-enable;
- bias-pull-up;
- qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>;
- };
-};
-
-&pm8998_resin {
- linux,code = <KEY_VOLUMEDOWN>;
- status = "okay";
-};
-
-&pmi8998_lpg {
- status = "okay";
-
- qcom,power-source = <1>;
-
- led@3 {
- reg = <3>;
- color = <LED_COLOR_ID_GREEN>;
- function = LED_FUNCTION_HEARTBEAT;
- function-enumerator = <3>;
-
- linux,default-trigger = "heartbeat";
- default-state = "on";
- };
-
- led@4 {
- reg = <4>;
- color = <LED_COLOR_ID_GREEN>;
- function = LED_FUNCTION_INDICATOR;
- function-enumerator = <2>;
- };
-
- led@5 {
- reg = <5>;
- color = <LED_COLOR_ID_GREEN>;
- function = LED_FUNCTION_INDICATOR;
- function-enumerator = <1>;
- };
-};
-
-/* QUAT I2S Uses 4 I2S SD Lines for audio on LT9611 HDMI Bridge */
-&q6afedai {
- dai@22 {
- reg = <QUATERNARY_MI2S_RX>;
- qcom,sd-lines = <0 1 2 3>;
- };
-};
-
-&q6asmdai {
- dai@0 {
- reg = <0>;
- };
-
- dai@1 {
- reg = <1>;
- };
-
- dai@2 {
- reg = <2>;
- };
-
- dai@3 {
- reg = <3>;
- direction = <2>;
- is-compress-dai;
- };
-};
-
-&qupv3_id_0 {
- status = "okay";
-};
-
-&qupv3_id_1 {
- status = "okay";
-};
-
-&sdhc_2 {
- status = "okay";
-
- pinctrl-names = "default";
- pinctrl-0 = <&sdc2_default_state &sdc2_card_det_n>;
-
- vmmc-supply = <&vreg_l21a_2p95>;
- vqmmc-supply = <&vreg_l13a_2p95>;
-
- bus-width = <4>;
- cd-gpios = <&tlmm 126 GPIO_ACTIVE_LOW>;
-};
-
-&sound {
- compatible = "qcom,db845c-sndcard", "qcom,sdm845-sndcard";
- pinctrl-0 = <&quat_mi2s_active
- &quat_mi2s_sd0_active
- &quat_mi2s_sd1_active
- &quat_mi2s_sd2_active
- &quat_mi2s_sd3_active>;
- pinctrl-names = "default";
- model = "DB845c";
- audio-routing =
- "RX_BIAS", "MCLK",
- "AMIC1", "MIC BIAS1",
- "AMIC2", "MIC BIAS2",
- "DMIC0", "MIC BIAS1",
- "DMIC1", "MIC BIAS1",
- "DMIC2", "MIC BIAS3",
- "DMIC3", "MIC BIAS3",
- "SpkrLeft IN", "SPK1 OUT",
- "SpkrRight IN", "SPK2 OUT",
- "MM_DL1", "MultiMedia1 Playback",
- "MM_DL2", "MultiMedia2 Playback",
- "MM_DL4", "MultiMedia4 Playback",
- "MultiMedia3 Capture", "MM_UL3";
-
- mm1-dai-link {
- link-name = "MultiMedia1";
- cpu {
- sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA1>;
- };
- };
-
- mm2-dai-link {
- link-name = "MultiMedia2";
- cpu {
- sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA2>;
- };
- };
-
- mm3-dai-link {
- link-name = "MultiMedia3";
- cpu {
- sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA3>;
- };
- };
-
- mm4-dai-link {
- link-name = "MultiMedia4";
- cpu {
- sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA4>;
- };
- };
-
- hdmi-dai-link {
- link-name = "HDMI Playback";
- cpu {
- sound-dai = <&q6afedai QUATERNARY_MI2S_RX>;
- };
-
- platform {
- sound-dai = <&q6routing>;
- };
-
- codec {
- sound-dai = <<9611_codec 0>;
- };
- };
-
- slim-dai-link {
- link-name = "SLIM Playback";
- cpu {
- sound-dai = <&q6afedai SLIMBUS_0_RX>;
- };
-
- platform {
- sound-dai = <&q6routing>;
- };
-
- codec {
- sound-dai = <&left_spkr>, <&right_spkr>, <&swm 0>, <&wcd9340 0>;
- };
- };
-
- slimcap-dai-link {
- link-name = "SLIM Capture";
- cpu {
- sound-dai = <&q6afedai SLIMBUS_0_TX>;
- };
-
- platform {
- sound-dai = <&q6routing>;
- };
-
- codec {
- sound-dai = <&wcd9340 1>;
- };
- };
-};
-
-&spi0 {
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&qup_spi0_default>;
- cs-gpios = <&tlmm 3 GPIO_ACTIVE_LOW>;
-
- can@0 {
- compatible = "microchip,mcp2517fd";
- reg = <0>;
- clocks = <&clk40M>;
- interrupts-extended = <&tlmm 104 IRQ_TYPE_LEVEL_LOW>;
- spi-max-frequency = <10000000>;
- vdd-supply = <&vdc_5v>;
- xceiver-supply = <&vdc_5v>;
- };
-};
-
-&spi2 {
- /* On Low speed expansion */
- status = "okay";
-};
-
-&tlmm {
- cam0_default: cam0-default-state {
- rst-pins {
- pins = "gpio9";
- function = "gpio";
-
- drive-strength = <16>;
- bias-disable;
- };
-
- mclk0-pins {
- pins = "gpio13";
- function = "cam_mclk";
-
- drive-strength = <16>;
- bias-disable;
- };
- };
-
- cam3_default: cam3-default-state {
- rst-pins {
- function = "gpio";
- pins = "gpio21";
-
- drive-strength = <16>;
- bias-disable;
- };
-
- mclk3-pins {
- function = "cam_mclk";
- pins = "gpio16";
-
- drive-strength = <16>;
- bias-disable;
- };
- };
-
- dsi_sw_sel: dsi-sw-sel-state {
- pins = "gpio120";
- function = "gpio";
-
- drive-strength = <2>;
- bias-disable;
- output-high;
- };
-
- lt9611_irq_pin: lt9611-irq-state {
- pins = "gpio84";
- function = "gpio";
- bias-disable;
- };
-
- pcie0_default_state: pcie0-default-state {
- clkreq-pins {
- pins = "gpio36";
- function = "pci_e0";
- bias-pull-up;
- };
-
- reset-n-pins {
- pins = "gpio35";
- function = "gpio";
-
- drive-strength = <2>;
- output-low;
- bias-pull-down;
- };
-
- wake-n-pins {
- pins = "gpio37";
- function = "gpio";
-
- drive-strength = <2>;
- bias-pull-up;
- };
- };
-
- pcie0_pwren_state: pcie0-pwren-state {
- pins = "gpio90";
- function = "gpio";
-
- drive-strength = <2>;
- bias-disable;
- };
-
- pcie1_default_state: pcie1-default-state {
- perst-n-pins {
- pins = "gpio102";
- function = "gpio";
-
- drive-strength = <16>;
- bias-disable;
- };
-
- clkreq-pins {
- pins = "gpio103";
- function = "pci_e1";
- bias-pull-up;
- };
-
- wake-n-pins {
- pins = "gpio11";
- function = "gpio";
-
- drive-strength = <2>;
- bias-pull-up;
- };
-
- reset-n-pins {
- pins = "gpio75";
- function = "gpio";
-
- drive-strength = <16>;
- bias-pull-up;
- output-high;
- };
- };
-
- sdc2_default_state: sdc2-default-state {
- clk-pins {
- pins = "sdc2_clk";
- bias-disable;
-
- /*
- * It seems that mmc_test reports errors if drive
- * strength is not 16 on clk, cmd, and data pins.
- */
- drive-strength = <16>;
- };
-
- cmd-pins {
- pins = "sdc2_cmd";
- bias-pull-up;
- drive-strength = <10>;
- };
-
- data-pins {
- pins = "sdc2_data";
- bias-pull-up;
- drive-strength = <10>;
- };
- };
-
- sdc2_card_det_n: sd-card-det-n-state {
- pins = "gpio126";
- function = "gpio";
- bias-pull-up;
- };
-};
-
-&uart3 {
- label = "LS-UART0";
- pinctrl-0 = <&qup_uart3_4pin>;
-
- status = "disabled";
-};
-
-&uart6 {
- status = "okay";
-
- pinctrl-0 = <&qup_uart6_4pin>;
-
- bluetooth {
- compatible = "qcom,wcn3990-bt";
-
- vddio-supply = <&vreg_s4a_1p8>;
- vddxo-supply = <&vreg_l7a_1p8>;
- vddrf-supply = <&vreg_l17a_1p3>;
- vddch0-supply = <&vreg_l25a_3p3>;
- max-speed = <3200000>;
- };
-};
-
-&uart9 {
- label = "LS-UART1";
- status = "okay";
-};
-
-&usb_1 {
- status = "okay";
-};
-
-&usb_1_dwc3 {
- dr_mode = "peripheral";
-};
-
-&usb_1_hsphy {
- status = "okay";
-
- vdd-supply = <&vreg_l1a_0p875>;
- vdda-pll-supply = <&vreg_l12a_1p8>;
- vdda-phy-dpdm-supply = <&vreg_l24a_3p075>;
-
- qcom,imp-res-offset-value = <8>;
- qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
- qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>;
- qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>;
-};
-
-&usb_1_qmpphy {
- status = "okay";
-
- vdda-phy-supply = <&vreg_l26a_1p2>;
- vdda-pll-supply = <&vreg_l1a_0p875>;
-};
-
-&usb_2 {
- status = "okay";
-};
-
-&usb_2_dwc3 {
- dr_mode = "host";
-};
-
-&usb_2_hsphy {
- status = "okay";
-
- vdd-supply = <&vreg_l1a_0p875>;
- vdda-pll-supply = <&vreg_l12a_1p8>;
- vdda-phy-dpdm-supply = <&vreg_l24a_3p075>;
-
- qcom,imp-res-offset-value = <8>;
- qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_22_8_MA>;
-};
-
-&usb_2_qmpphy {
- status = "okay";
-
- vdda-phy-supply = <&vreg_l26a_1p2>;
- vdda-pll-supply = <&vreg_l1a_0p875>;
-};
-
-&ufs_mem_hc {
- status = "okay";
-
- reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>;
-
- vcc-supply = <&vreg_l20a_2p95>;
- vcc-max-microamp = <800000>;
-};
-
-&ufs_mem_phy {
- status = "okay";
-
- vdda-phy-supply = <&vreg_l1a_0p875>;
- vdda-pll-supply = <&vreg_l26a_1p2>;
-};
-
-&venus {
- status = "okay";
-};
-
-&wcd9340 {
- reset-gpios = <&tlmm 64 GPIO_ACTIVE_HIGH>;
- vdd-buck-supply = <&vreg_s4a_1p8>;
- vdd-buck-sido-supply = <&vreg_s4a_1p8>;
- vdd-tx-supply = <&vreg_s4a_1p8>;
- vdd-rx-supply = <&vreg_s4a_1p8>;
- vdd-io-supply = <&vreg_s4a_1p8>;
-
- swm: swm@c85 {
- left_spkr: speaker@0,1 {
- compatible = "sdw10217201000";
- reg = <0 1>;
- powerdown-gpios = <&wcdgpio 1 GPIO_ACTIVE_HIGH>;
- #thermal-sensor-cells = <0>;
- sound-name-prefix = "SpkrLeft";
- #sound-dai-cells = <0>;
- };
-
- right_spkr: speaker@0,2 {
- compatible = "sdw10217201000";
- powerdown-gpios = <&wcdgpio 1 GPIO_ACTIVE_HIGH>;
- reg = <0 2>;
- #thermal-sensor-cells = <0>;
- sound-name-prefix = "SpkrRight";
- #sound-dai-cells = <0>;
- };
- };
-};
-
-&wifi {
- status = "okay";
-
- vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;
- vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
- vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
- vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
-
- qcom,snoc-host-cap-8bit-quirk;
- qcom,ath10k-calibration-variant = "Thundercomm_DB845C";
-};
-
-/* PINCTRL - additions to nodes defined in sdm845.dtsi */
-&qup_spi2_default {
- drive-strength = <16>;
-};
-
-&qup_i2c10_default {
- drive-strength = <2>;
- bias-disable;
-};
-
-&qup_uart9_rx {
- drive-strength = <2>;
- bias-pull-up;
-};
-
-&qup_uart9_tx {
- drive-strength = <2>;
- bias-disable;
-};
-
-/* PINCTRL - additions to nodes defined in sdm845.dtsi */
-&qup_spi0_default {
- drive-strength = <6>;
- bias-disable;
-};
diff --git a/arch/arm/dts/sdm845-samsung-starqltechn.dts b/arch/arm/dts/sdm845-samsung-starqltechn.dts
deleted file mode 100644
index d37a433..0000000
--- a/arch/arm/dts/sdm845-samsung-starqltechn.dts
+++ /dev/null
@@ -1,460 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * SDM845 Samsung S9 (SM-G9600) (starqltechn / star2qltechn) common device tree source
- *
- * Copyright (c) 2020, The Linux Foundation. All rights reserved.
- */
-
-/dts-v1/;
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
-#include "sdm845.dtsi"
-
-/ {
- chassis-type = "handset";
- model = "Samsung Galaxy S9 SM-G9600";
- compatible = "samsung,starqltechn", "qcom,sdm845";
-
- chosen {
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
- framebuffer: framebuffer@9d400000 {
- compatible = "simple-framebuffer";
- reg = <0 0x9d400000 0 (2960 * 1440 * 4)>;//2400000
- width = <1440>;
- height = <2960>;
- stride = <(1440 * 4)>;
- format = "a8r8g8b8";
- };
- };
-
- vph_pwr: vph-pwr-regulator {
- compatible = "regulator-fixed";
- regulator-name = "vph_pwr";
- regulator-min-microvolt = <3700000>;
- regulator-max-microvolt = <3700000>;
- };
-
- /*
- * Apparently RPMh does not provide support for PM8998 S4 because it
- * is always-on; model it as a fixed regulator.
- */
- vreg_s4a_1p8: pm8998-smps4 {
- compatible = "regulator-fixed";
- regulator-name = "vreg_s4a_1p8";
-
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
-
- regulator-always-on;
- regulator-boot-on;
-
- vin-supply = <&vph_pwr>;
- };
-
- reserved-memory {
- memory@9d400000 {
- reg = <0x0 0x9d400000 0x0 0x02400000>;
- no-map;
- };
-
- memory@a1300000 {
- compatible = "ramoops";
- reg = <0x0 0xa1300000 0x0 0x100000>;
- record-size = <0x40000>;
- console-size = <0x40000>;
- ftrace-size = <0x40000>;
- pmsg-size = <0x40000>;
- };
- };
-};
-
-
-&apps_rsc {
- regulators-0 {
- compatible = "qcom,pm8998-rpmh-regulators";
- qcom,pmic-id = "a";
-
- vdd-s1-supply = <&vph_pwr>;
- vdd-s2-supply = <&vph_pwr>;
- vdd-s3-supply = <&vph_pwr>;
- vdd-s4-supply = <&vph_pwr>;
- vdd-s5-supply = <&vph_pwr>;
- vdd-s6-supply = <&vph_pwr>;
- vdd-s7-supply = <&vph_pwr>;
- vdd-s8-supply = <&vph_pwr>;
- vdd-s9-supply = <&vph_pwr>;
- vdd-s10-supply = <&vph_pwr>;
- vdd-s11-supply = <&vph_pwr>;
- vdd-s12-supply = <&vph_pwr>;
- vdd-s13-supply = <&vph_pwr>;
- vdd-l1-l27-supply = <&vreg_s7a_1p025>;
- vdd-l2-l8-l17-supply = <&vreg_s3a_1p35>;
- vdd-l3-l11-supply = <&vreg_s7a_1p025>;
- vdd-l4-l5-supply = <&vreg_s7a_1p025>;
- vdd-l6-supply = <&vph_pwr>;
- vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>;
- vdd-l26-supply = <&vreg_s3a_1p35>;
- vin-lvs-1-2-supply = <&vreg_s4a_1p8>;
-
- vreg_s2a_1p125: smps2 {
- regulator-min-microvolt = <1100000>;
- regulator-max-microvolt = <1100000>;
- };
-
- vreg_s3a_1p35: smps3 {
- regulator-min-microvolt = <1352000>;
- regulator-max-microvolt = <1352000>;
- };
-
- vreg_s5a_2p04: smps5 {
- regulator-min-microvolt = <1904000>;
- regulator-max-microvolt = <2040000>;
- };
-
- vreg_s7a_1p025: smps7 {
- regulator-min-microvolt = <900000>;
- regulator-max-microvolt = <1028000>;
- };
-
- vdd_qusb_hs0:
- vdda_hp_pcie_core:
- vdda_mipi_csi0_0p9:
- vdda_mipi_csi1_0p9:
- vdda_mipi_csi2_0p9:
- vdda_mipi_dsi0_pll:
- vdda_mipi_dsi1_pll:
- vdda_qlink_lv:
- vdda_qlink_lv_ck:
- vdda_qrefs_0p875:
- vdda_pcie_core:
- vdda_pll_cc_ebi01:
- vdda_pll_cc_ebi23:
- vdda_sp_sensor:
- vdda_ufs1_core:
- vdda_ufs2_core:
- vdda_usb1_ss_core:
- vdda_usb2_ss_core:
- vreg_l1a_0p875: ldo1 {
- regulator-min-microvolt = <880000>;
- regulator-max-microvolt = <880000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vddpx_10:
- vreg_l2a_1p2: ldo2 {
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1200000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- regulator-always-on;
- };
-
- vreg_l3a_1p0: ldo3 {
- regulator-min-microvolt = <1000000>;
- regulator-max-microvolt = <1000000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vdd_wcss_cx:
- vdd_wcss_mx:
- vdda_wcss_pll:
- vreg_l5a_0p8: ldo5 {
- regulator-min-microvolt = <800000>;
- regulator-max-microvolt = <800000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vddpx_13:
- vreg_l6a_1p8: ldo6 {
- regulator-min-microvolt = <1856000>;
- regulator-max-microvolt = <1856000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vreg_l7a_1p8: ldo7 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vreg_l8a_1p2: ldo8 {
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1248000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vreg_l9a_1p8: ldo9 {
- regulator-min-microvolt = <1704000>;
- regulator-max-microvolt = <2928000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vreg_l10a_1p8: ldo10 {
- regulator-min-microvolt = <1704000>;
- regulator-max-microvolt = <2928000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vreg_l11a_1p0: ldo11 {
- regulator-min-microvolt = <1000000>;
- regulator-max-microvolt = <1048000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vdd_qfprom:
- vdd_qfprom_sp:
- vdda_apc1_cs_1p8:
- vdda_gfx_cs_1p8:
- vdda_qrefs_1p8:
- vdda_qusb_hs0_1p8:
- vddpx_11:
- vreg_l12a_1p8: ldo12 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vddpx_2:
- vreg_l13a_2p95: ldo13 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <2960000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vreg_l14a_1p88: ldo14 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vreg_l15a_1p8: ldo15 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vreg_l16a_2p7: ldo16 {
- regulator-min-microvolt = <2704000>;
- regulator-max-microvolt = <2704000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vreg_l17a_1p3: ldo17 {
- regulator-min-microvolt = <1304000>;
- regulator-max-microvolt = <1304000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vreg_l18a_2p7: ldo18 {
- regulator-min-microvolt = <2704000>;
- regulator-max-microvolt = <2960000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vreg_l19a_3p0: ldo19 {
- regulator-min-microvolt = <2856000>;
- regulator-max-microvolt = <3104000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vreg_l20a_2p95: ldo20 {
- regulator-min-microvolt = <2704000>;
- regulator-max-microvolt = <2960000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vreg_l21a_2p95: ldo21 {
- regulator-min-microvolt = <2704000>;
- regulator-max-microvolt = <2960000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vreg_l22a_2p85: ldo22 {
- regulator-min-microvolt = <2864000>;
- regulator-max-microvolt = <3312000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vreg_l23a_3p3: ldo23 {
- regulator-min-microvolt = <3000000>;
- regulator-max-microvolt = <3312000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vdda_qusb_hs0_3p1:
- vreg_l24a_3p075: ldo24 {
- regulator-min-microvolt = <3088000>;
- regulator-max-microvolt = <3088000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vreg_l25a_3p3: ldo25 {
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3312000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vdda_hp_pcie_1p2:
- vdda_hv_ebi0:
- vdda_hv_ebi1:
- vdda_hv_ebi2:
- vdda_hv_ebi3:
- vdda_mipi_csi_1p25:
- vdda_mipi_dsi0_1p2:
- vdda_mipi_dsi1_1p2:
- vdda_pcie_1p2:
- vdda_ufs1_1p2:
- vdda_ufs2_1p2:
- vdda_usb1_ss_1p2:
- vdda_usb2_ss_1p2:
- vreg_l26a_1p2: ldo26 {
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1200000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vreg_l28a_3p0: ldo28 {
- regulator-min-microvolt = <2856000>;
- regulator-max-microvolt = <3008000>;
- regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
- };
-
- vreg_lvs1a_1p8: lvs1 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- };
-
- vreg_lvs2a_1p8: lvs2 {
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- };
- };
-
- regulators-1 {
- compatible = "qcom,pm8005-rpmh-regulators";
- qcom,pmic-id = "c";
-
- vdd-s1-supply = <&vph_pwr>;
- vdd-s2-supply = <&vph_pwr>;
- vdd-s3-supply = <&vph_pwr>;
- vdd-s4-supply = <&vph_pwr>;
-
- vreg_s3c_0p6: smps3 {
- regulator-min-microvolt = <600000>;
- regulator-max-microvolt = <600000>;
- };
- };
-};
-
-&gcc {
- protected-clocks = <GCC_QSPI_CORE_CLK>,
- <GCC_QSPI_CORE_CLK_SRC>,
- <GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
- <GCC_LPASS_Q6_AXI_CLK>,
- <GCC_LPASS_SWAY_CLK>;
-};
-
-&i2c10 {
- clock-frequency = <400000>;
- status = "okay";
-};
-
-&qupv3_id_1 {
- status = "okay";
-};
-
-&uart9 {
- status = "okay";
-};
-
-&ufs_mem_hc {
- reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>;
- vcc-supply = <&vreg_l20a_2p95>;
- vcc-max-microamp = <600000>;
- status = "okay";
-};
-
-&ufs_mem_phy {
- vdda-phy-supply = <&vdda_ufs1_core>;
- vdda-pll-supply = <&vdda_ufs1_1p2>;
- status = "okay";
-};
-
-&sdhc_2 {
- pinctrl-names = "default";
- pinctrl-0 = <&sdc2_clk_state &sdc2_cmd_state &sdc2_data_state &sd_card_det_n_state>;
- cd-gpios = <&tlmm 126 GPIO_ACTIVE_LOW>;
- vmmc-supply = <&vreg_l21a_2p95>;
- vqmmc-supply = <&vddpx_2>;
- status = "okay";
-};
-
-&usb_1 {
- status = "okay";
-};
-
-&usb_1_dwc3 {
- /* Until we have Type C hooked up we'll force this as peripheral. */
- dr_mode = "peripheral";
-};
-
-&usb_1_hsphy {
- vdd-supply = <&vdda_usb1_ss_core>;
- vdda-pll-supply = <&vdda_qusb_hs0_1p8>;
- vdda-phy-dpdm-supply = <&vdda_qusb_hs0_3p1>;
-
- qcom,imp-res-offset-value = <8>;
- qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
- qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>;
- qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>;
- status = "okay";
-};
-
-&usb_1_qmpphy {
- vdda-phy-supply = <&vdda_usb1_ss_1p2>;
- vdda-pll-supply = <&vdda_usb1_ss_core>;
- status = "okay";
-};
-
-&wifi {
- vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;
- vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
- vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
- vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
- status = "okay";
-};
-
-&tlmm {
- gpio-reserved-ranges = <0 4>, <27 4>, <81 4>, <85 4>;
-
- sdc2_clk_state: sdc2-clk-state {
- pins = "sdc2_clk";
- bias-disable;
-
- /*
- * It seems that mmc_test reports errors if drive
- * strength is not 16 on clk, cmd, and data pins.
- */
- drive-strength = <16>;
- };
-
- sdc2_cmd_state: sdc2-cmd-state {
- pins = "sdc2_cmd";
- bias-pull-up;
- drive-strength = <16>;
- };
-
- sdc2_data_state: sdc2-data-state {
- pins = "sdc2_data";
- bias-pull-up;
- drive-strength = <16>;
- };
-
- sd_card_det_n_state: sd-card-det-n-state {
- pins = "gpio126";
- function = "gpio";
- bias-pull-up;
- };
-};
diff --git a/arch/arm/dts/sdm845-wcd9340.dtsi b/arch/arm/dts/sdm845-wcd9340.dtsi
deleted file mode 100644
index c15d488..0000000
--- a/arch/arm/dts/sdm845-wcd9340.dtsi
+++ /dev/null
@@ -1,86 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * SDM845 SoC device tree source
- *
- * Copyright (c) 2018, The Linux Foundation. All rights reserved.
- */
-
-&slim {
- status = "okay";
-
- slim@1 {
- reg = <1>;
- #address-cells = <2>;
- #size-cells = <0>;
-
- wcd9340_ifd: ifd@0,0 {
- compatible = "slim217,250";
- reg = <0 0>;
- };
-
- wcd9340: codec@1,0 {
- compatible = "slim217,250";
- reg = <1 0>;
- slim-ifc-dev = <&wcd9340_ifd>;
-
- #sound-dai-cells = <1>;
-
- interrupts-extended = <&tlmm 54 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-controller;
- #interrupt-cells = <1>;
-
- clock-names = "extclk";
- clocks = <&rpmhcc RPMH_LN_BB_CLK2>;
-
- #clock-cells = <0>;
- clock-frequency = <9600000>;
- clock-output-names = "mclk";
-
- pinctrl-0 = <&wcd_intr_default>;
- pinctrl-names = "default";
-
- qcom,micbias1-microvolt = <1800000>;
- qcom,micbias2-microvolt = <1800000>;
- qcom,micbias3-microvolt = <1800000>;
- qcom,micbias4-microvolt = <1800000>;
-
- #address-cells = <1>;
- #size-cells = <1>;
-
- wcdgpio: gpio-controller@42 {
- compatible = "qcom,wcd9340-gpio";
- gpio-controller;
- #gpio-cells = <2>;
- reg = <0x42 0x2>;
- };
-
- swm: swm@c85 {
- compatible = "qcom,soundwire-v1.3.0";
- reg = <0xc85 0x40>;
- interrupts-extended = <&wcd9340 20>;
-
- qcom,dout-ports = <6>;
- qcom,din-ports = <2>;
- qcom,ports-sinterval-low = /bits/ 8 <0x07 0x1f 0x3f 0x7 0x1f 0x3f 0x0f 0x0f>;
- qcom,ports-offset1 = /bits/ 8 <0x01 0x02 0x0c 0x6 0x12 0x0d 0x07 0x0a>;
- qcom,ports-offset2 = /bits/ 8 <0x00 0x00 0x1f 0x00 0x00 0x1f 0x00 0x00>;
-
- #sound-dai-cells = <1>;
- clocks = <&wcd9340>;
- clock-names = "iface";
- #address-cells = <2>;
- #size-cells = <0>;
- };
- };
- };
-};
-
-&tlmm {
- wcd_intr_default: wcd-intr-default-state {
- pins = "gpio54";
- function = "gpio";
-
- bias-pull-down;
- drive-strength = <2>;
- };
-};
diff --git a/arch/arm/dts/sdm845.dtsi b/arch/arm/dts/sdm845.dtsi
deleted file mode 100644
index bf5e6eb..0000000
--- a/arch/arm/dts/sdm845.dtsi
+++ /dev/null
@@ -1,5752 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * SDM845 SoC device tree source
- *
- * Copyright (c) 2018, The Linux Foundation. All rights reserved.
- */
-
-#include <dt-bindings/clock/qcom,camcc-sdm845.h>
-#include <dt-bindings/clock/qcom,dispcc-sdm845.h>
-#include <dt-bindings/clock/qcom,gcc-sdm845.h>
-#include <dt-bindings/clock/qcom,gpucc-sdm845.h>
-#include <dt-bindings/clock/qcom,lpass-sdm845.h>
-#include <dt-bindings/clock/qcom,rpmh.h>
-#include <dt-bindings/clock/qcom,videocc-sdm845.h>
-#include <dt-bindings/dma/qcom-gpi.h>
-#include <dt-bindings/firmware/qcom,scm.h>
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/interconnect/qcom,osm-l3.h>
-#include <dt-bindings/interconnect/qcom,sdm845.h>
-#include <dt-bindings/interrupt-controller/arm-gic.h>
-#include <dt-bindings/phy/phy-qcom-qmp.h>
-#include <dt-bindings/phy/phy-qcom-qusb2.h>
-#include <dt-bindings/power/qcom-rpmpd.h>
-#include <dt-bindings/reset/qcom,sdm845-aoss.h>
-#include <dt-bindings/reset/qcom,sdm845-pdc.h>
-#include <dt-bindings/soc/qcom,apr.h>
-#include <dt-bindings/soc/qcom,rpmh-rsc.h>
-#include <dt-bindings/clock/qcom,gcc-sdm845.h>
-#include <dt-bindings/thermal/thermal.h>
-
-/ {
- interrupt-parent = <&intc>;
-
- #address-cells = <2>;
- #size-cells = <2>;
-
- aliases {
- i2c0 = &i2c0;
- i2c1 = &i2c1;
- i2c2 = &i2c2;
- i2c3 = &i2c3;
- i2c4 = &i2c4;
- i2c5 = &i2c5;
- i2c6 = &i2c6;
- i2c7 = &i2c7;
- i2c8 = &i2c8;
- i2c9 = &i2c9;
- i2c10 = &i2c10;
- i2c11 = &i2c11;
- i2c12 = &i2c12;
- i2c13 = &i2c13;
- i2c14 = &i2c14;
- i2c15 = &i2c15;
- spi0 = &spi0;
- spi1 = &spi1;
- spi2 = &spi2;
- spi3 = &spi3;
- spi4 = &spi4;
- spi5 = &spi5;
- spi6 = &spi6;
- spi7 = &spi7;
- spi8 = &spi8;
- spi9 = &spi9;
- spi10 = &spi10;
- spi11 = &spi11;
- spi12 = &spi12;
- spi13 = &spi13;
- spi14 = &spi14;
- spi15 = &spi15;
- };
-
- chosen { };
-
- clocks {
- xo_board: xo-board {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <38400000>;
- clock-output-names = "xo_board";
- };
-
- sleep_clk: sleep-clk {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <32764>;
- };
- };
-
- cpus: cpus {
- #address-cells = <2>;
- #size-cells = <0>;
-
- CPU0: cpu@0 {
- device_type = "cpu";
- compatible = "qcom,kryo385";
- reg = <0x0 0x0>;
- clocks = <&cpufreq_hw 0>;
- enable-method = "psci";
- capacity-dmips-mhz = <611>;
- dynamic-power-coefficient = <154>;
- qcom,freq-domain = <&cpufreq_hw 0>;
- operating-points-v2 = <&cpu0_opp_table>;
- interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
- <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
- power-domains = <&CPU_PD0>;
- power-domain-names = "psci";
- #cooling-cells = <2>;
- next-level-cache = <&L2_0>;
- L2_0: l2-cache {
- compatible = "cache";
- cache-level = <2>;
- cache-unified;
- next-level-cache = <&L3_0>;
- L3_0: l3-cache {
- compatible = "cache";
- cache-level = <3>;
- cache-unified;
- };
- };
- };
-
- CPU1: cpu@100 {
- device_type = "cpu";
- compatible = "qcom,kryo385";
- reg = <0x0 0x100>;
- clocks = <&cpufreq_hw 0>;
- enable-method = "psci";
- capacity-dmips-mhz = <611>;
- dynamic-power-coefficient = <154>;
- qcom,freq-domain = <&cpufreq_hw 0>;
- operating-points-v2 = <&cpu0_opp_table>;
- interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
- <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
- power-domains = <&CPU_PD1>;
- power-domain-names = "psci";
- #cooling-cells = <2>;
- next-level-cache = <&L2_100>;
- L2_100: l2-cache {
- compatible = "cache";
- cache-level = <2>;
- cache-unified;
- next-level-cache = <&L3_0>;
- };
- };
-
- CPU2: cpu@200 {
- device_type = "cpu";
- compatible = "qcom,kryo385";
- reg = <0x0 0x200>;
- clocks = <&cpufreq_hw 0>;
- enable-method = "psci";
- capacity-dmips-mhz = <611>;
- dynamic-power-coefficient = <154>;
- qcom,freq-domain = <&cpufreq_hw 0>;
- operating-points-v2 = <&cpu0_opp_table>;
- interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
- <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
- power-domains = <&CPU_PD2>;
- power-domain-names = "psci";
- #cooling-cells = <2>;
- next-level-cache = <&L2_200>;
- L2_200: l2-cache {
- compatible = "cache";
- cache-level = <2>;
- cache-unified;
- next-level-cache = <&L3_0>;
- };
- };
-
- CPU3: cpu@300 {
- device_type = "cpu";
- compatible = "qcom,kryo385";
- reg = <0x0 0x300>;
- clocks = <&cpufreq_hw 0>;
- enable-method = "psci";
- capacity-dmips-mhz = <611>;
- dynamic-power-coefficient = <154>;
- qcom,freq-domain = <&cpufreq_hw 0>;
- operating-points-v2 = <&cpu0_opp_table>;
- interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
- <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
- #cooling-cells = <2>;
- power-domains = <&CPU_PD3>;
- power-domain-names = "psci";
- next-level-cache = <&L2_300>;
- L2_300: l2-cache {
- compatible = "cache";
- cache-level = <2>;
- cache-unified;
- next-level-cache = <&L3_0>;
- };
- };
-
- CPU4: cpu@400 {
- device_type = "cpu";
- compatible = "qcom,kryo385";
- reg = <0x0 0x400>;
- clocks = <&cpufreq_hw 1>;
- enable-method = "psci";
- capacity-dmips-mhz = <1024>;
- dynamic-power-coefficient = <442>;
- qcom,freq-domain = <&cpufreq_hw 1>;
- operating-points-v2 = <&cpu4_opp_table>;
- interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
- <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
- power-domains = <&CPU_PD4>;
- power-domain-names = "psci";
- #cooling-cells = <2>;
- next-level-cache = <&L2_400>;
- L2_400: l2-cache {
- compatible = "cache";
- cache-level = <2>;
- cache-unified;
- next-level-cache = <&L3_0>;
- };
- };
-
- CPU5: cpu@500 {
- device_type = "cpu";
- compatible = "qcom,kryo385";
- reg = <0x0 0x500>;
- clocks = <&cpufreq_hw 1>;
- enable-method = "psci";
- capacity-dmips-mhz = <1024>;
- dynamic-power-coefficient = <442>;
- qcom,freq-domain = <&cpufreq_hw 1>;
- operating-points-v2 = <&cpu4_opp_table>;
- interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
- <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
- power-domains = <&CPU_PD5>;
- power-domain-names = "psci";
- #cooling-cells = <2>;
- next-level-cache = <&L2_500>;
- L2_500: l2-cache {
- compatible = "cache";
- cache-level = <2>;
- cache-unified;
- next-level-cache = <&L3_0>;
- };
- };
-
- CPU6: cpu@600 {
- device_type = "cpu";
- compatible = "qcom,kryo385";
- reg = <0x0 0x600>;
- clocks = <&cpufreq_hw 1>;
- enable-method = "psci";
- capacity-dmips-mhz = <1024>;
- dynamic-power-coefficient = <442>;
- qcom,freq-domain = <&cpufreq_hw 1>;
- operating-points-v2 = <&cpu4_opp_table>;
- interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
- <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
- power-domains = <&CPU_PD6>;
- power-domain-names = "psci";
- #cooling-cells = <2>;
- next-level-cache = <&L2_600>;
- L2_600: l2-cache {
- compatible = "cache";
- cache-level = <2>;
- cache-unified;
- next-level-cache = <&L3_0>;
- };
- };
-
- CPU7: cpu@700 {
- device_type = "cpu";
- compatible = "qcom,kryo385";
- reg = <0x0 0x700>;
- clocks = <&cpufreq_hw 1>;
- enable-method = "psci";
- capacity-dmips-mhz = <1024>;
- dynamic-power-coefficient = <442>;
- qcom,freq-domain = <&cpufreq_hw 1>;
- operating-points-v2 = <&cpu4_opp_table>;
- interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
- <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
- power-domains = <&CPU_PD7>;
- power-domain-names = "psci";
- #cooling-cells = <2>;
- next-level-cache = <&L2_700>;
- L2_700: l2-cache {
- compatible = "cache";
- cache-level = <2>;
- cache-unified;
- next-level-cache = <&L3_0>;
- };
- };
-
- cpu-map {
- cluster0 {
- core0 {
- cpu = <&CPU0>;
- };
-
- core1 {
- cpu = <&CPU1>;
- };
-
- core2 {
- cpu = <&CPU2>;
- };
-
- core3 {
- cpu = <&CPU3>;
- };
-
- core4 {
- cpu = <&CPU4>;
- };
-
- core5 {
- cpu = <&CPU5>;
- };
-
- core6 {
- cpu = <&CPU6>;
- };
-
- core7 {
- cpu = <&CPU7>;
- };
- };
- };
-
- cpu_idle_states: idle-states {
- entry-method = "psci";
-
- LITTLE_CPU_SLEEP_0: cpu-sleep-0-0 {
- compatible = "arm,idle-state";
- idle-state-name = "little-rail-power-collapse";
- arm,psci-suspend-param = <0x40000004>;
- entry-latency-us = <350>;
- exit-latency-us = <461>;
- min-residency-us = <1890>;
- local-timer-stop;
- };
-
- BIG_CPU_SLEEP_0: cpu-sleep-1-0 {
- compatible = "arm,idle-state";
- idle-state-name = "big-rail-power-collapse";
- arm,psci-suspend-param = <0x40000004>;
- entry-latency-us = <264>;
- exit-latency-us = <621>;
- min-residency-us = <952>;
- local-timer-stop;
- };
- };
-
- domain-idle-states {
- CLUSTER_SLEEP_0: cluster-sleep-0 {
- compatible = "domain-idle-state";
- arm,psci-suspend-param = <0x4100c244>;
- entry-latency-us = <3263>;
- exit-latency-us = <6562>;
- min-residency-us = <9987>;
- };
- };
- };
-
- firmware {
- scm {
- compatible = "qcom,scm-sdm845", "qcom,scm";
- };
- };
-
- memory@80000000 {
- device_type = "memory";
- /* We expect the bootloader to fill in the size */
- reg = <0 0x80000000 0 0>;
- };
-
- cpu0_opp_table: opp-table-cpu0 {
- compatible = "operating-points-v2";
- opp-shared;
-
- cpu0_opp1: opp-300000000 {
- opp-hz = /bits/ 64 <300000000>;
- opp-peak-kBps = <800000 4800000>;
- };
-
- cpu0_opp2: opp-403200000 {
- opp-hz = /bits/ 64 <403200000>;
- opp-peak-kBps = <800000 4800000>;
- };
-
- cpu0_opp3: opp-480000000 {
- opp-hz = /bits/ 64 <480000000>;
- opp-peak-kBps = <800000 6451200>;
- };
-
- cpu0_opp4: opp-576000000 {
- opp-hz = /bits/ 64 <576000000>;
- opp-peak-kBps = <800000 6451200>;
- };
-
- cpu0_opp5: opp-652800000 {
- opp-hz = /bits/ 64 <652800000>;
- opp-peak-kBps = <800000 7680000>;
- };
-
- cpu0_opp6: opp-748800000 {
- opp-hz = /bits/ 64 <748800000>;
- opp-peak-kBps = <1804000 9216000>;
- };
-
- cpu0_opp7: opp-825600000 {
- opp-hz = /bits/ 64 <825600000>;
- opp-peak-kBps = <1804000 9216000>;
- };
-
- cpu0_opp8: opp-902400000 {
- opp-hz = /bits/ 64 <902400000>;
- opp-peak-kBps = <1804000 10444800>;
- };
-
- cpu0_opp9: opp-979200000 {
- opp-hz = /bits/ 64 <979200000>;
- opp-peak-kBps = <1804000 11980800>;
- };
-
- cpu0_opp10: opp-1056000000 {
- opp-hz = /bits/ 64 <1056000000>;
- opp-peak-kBps = <1804000 11980800>;
- };
-
- cpu0_opp11: opp-1132800000 {
- opp-hz = /bits/ 64 <1132800000>;
- opp-peak-kBps = <2188000 13516800>;
- };
-
- cpu0_opp12: opp-1228800000 {
- opp-hz = /bits/ 64 <1228800000>;
- opp-peak-kBps = <2188000 15052800>;
- };
-
- cpu0_opp13: opp-1324800000 {
- opp-hz = /bits/ 64 <1324800000>;
- opp-peak-kBps = <2188000 16588800>;
- };
-
- cpu0_opp14: opp-1420800000 {
- opp-hz = /bits/ 64 <1420800000>;
- opp-peak-kBps = <3072000 18124800>;
- };
-
- cpu0_opp15: opp-1516800000 {
- opp-hz = /bits/ 64 <1516800000>;
- opp-peak-kBps = <3072000 19353600>;
- };
-
- cpu0_opp16: opp-1612800000 {
- opp-hz = /bits/ 64 <1612800000>;
- opp-peak-kBps = <4068000 19353600>;
- };
-
- cpu0_opp17: opp-1689600000 {
- opp-hz = /bits/ 64 <1689600000>;
- opp-peak-kBps = <4068000 20889600>;
- };
-
- cpu0_opp18: opp-1766400000 {
- opp-hz = /bits/ 64 <1766400000>;
- opp-peak-kBps = <4068000 22425600>;
- };
- };
-
- cpu4_opp_table: opp-table-cpu4 {
- compatible = "operating-points-v2";
- opp-shared;
-
- cpu4_opp1: opp-300000000 {
- opp-hz = /bits/ 64 <300000000>;
- opp-peak-kBps = <800000 4800000>;
- };
-
- cpu4_opp2: opp-403200000 {
- opp-hz = /bits/ 64 <403200000>;
- opp-peak-kBps = <800000 4800000>;
- };
-
- cpu4_opp3: opp-480000000 {
- opp-hz = /bits/ 64 <480000000>;
- opp-peak-kBps = <1804000 4800000>;
- };
-
- cpu4_opp4: opp-576000000 {
- opp-hz = /bits/ 64 <576000000>;
- opp-peak-kBps = <1804000 4800000>;
- };
-
- cpu4_opp5: opp-652800000 {
- opp-hz = /bits/ 64 <652800000>;
- opp-peak-kBps = <1804000 4800000>;
- };
-
- cpu4_opp6: opp-748800000 {
- opp-hz = /bits/ 64 <748800000>;
- opp-peak-kBps = <1804000 4800000>;
- };
-
- cpu4_opp7: opp-825600000 {
- opp-hz = /bits/ 64 <825600000>;
- opp-peak-kBps = <2188000 9216000>;
- };
-
- cpu4_opp8: opp-902400000 {
- opp-hz = /bits/ 64 <902400000>;
- opp-peak-kBps = <2188000 9216000>;
- };
-
- cpu4_opp9: opp-979200000 {
- opp-hz = /bits/ 64 <979200000>;
- opp-peak-kBps = <2188000 9216000>;
- };
-
- cpu4_opp10: opp-1056000000 {
- opp-hz = /bits/ 64 <1056000000>;
- opp-peak-kBps = <3072000 9216000>;
- };
-
- cpu4_opp11: opp-1132800000 {
- opp-hz = /bits/ 64 <1132800000>;
- opp-peak-kBps = <3072000 11980800>;
- };
-
- cpu4_opp12: opp-1209600000 {
- opp-hz = /bits/ 64 <1209600000>;
- opp-peak-kBps = <4068000 11980800>;
- };
-
- cpu4_opp13: opp-1286400000 {
- opp-hz = /bits/ 64 <1286400000>;
- opp-peak-kBps = <4068000 11980800>;
- };
-
- cpu4_opp14: opp-1363200000 {
- opp-hz = /bits/ 64 <1363200000>;
- opp-peak-kBps = <4068000 15052800>;
- };
-
- cpu4_opp15: opp-1459200000 {
- opp-hz = /bits/ 64 <1459200000>;
- opp-peak-kBps = <4068000 15052800>;
- };
-
- cpu4_opp16: opp-1536000000 {
- opp-hz = /bits/ 64 <1536000000>;
- opp-peak-kBps = <5412000 15052800>;
- };
-
- cpu4_opp17: opp-1612800000 {
- opp-hz = /bits/ 64 <1612800000>;
- opp-peak-kBps = <5412000 15052800>;
- };
-
- cpu4_opp18: opp-1689600000 {
- opp-hz = /bits/ 64 <1689600000>;
- opp-peak-kBps = <5412000 19353600>;
- };
-
- cpu4_opp19: opp-1766400000 {
- opp-hz = /bits/ 64 <1766400000>;
- opp-peak-kBps = <6220000 19353600>;
- };
-
- cpu4_opp20: opp-1843200000 {
- opp-hz = /bits/ 64 <1843200000>;
- opp-peak-kBps = <6220000 19353600>;
- };
-
- cpu4_opp21: opp-1920000000 {
- opp-hz = /bits/ 64 <1920000000>;
- opp-peak-kBps = <7216000 19353600>;
- };
-
- cpu4_opp22: opp-1996800000 {
- opp-hz = /bits/ 64 <1996800000>;
- opp-peak-kBps = <7216000 20889600>;
- };
-
- cpu4_opp23: opp-2092800000 {
- opp-hz = /bits/ 64 <2092800000>;
- opp-peak-kBps = <7216000 20889600>;
- };
-
- cpu4_opp24: opp-2169600000 {
- opp-hz = /bits/ 64 <2169600000>;
- opp-peak-kBps = <7216000 20889600>;
- };
-
- cpu4_opp25: opp-2246400000 {
- opp-hz = /bits/ 64 <2246400000>;
- opp-peak-kBps = <7216000 20889600>;
- };
-
- cpu4_opp26: opp-2323200000 {
- opp-hz = /bits/ 64 <2323200000>;
- opp-peak-kBps = <7216000 20889600>;
- };
-
- cpu4_opp27: opp-2400000000 {
- opp-hz = /bits/ 64 <2400000000>;
- opp-peak-kBps = <7216000 22425600>;
- };
-
- cpu4_opp28: opp-2476800000 {
- opp-hz = /bits/ 64 <2476800000>;
- opp-peak-kBps = <7216000 22425600>;
- };
-
- cpu4_opp29: opp-2553600000 {
- opp-hz = /bits/ 64 <2553600000>;
- opp-peak-kBps = <7216000 22425600>;
- };
-
- cpu4_opp30: opp-2649600000 {
- opp-hz = /bits/ 64 <2649600000>;
- opp-peak-kBps = <7216000 22425600>;
- };
-
- cpu4_opp31: opp-2745600000 {
- opp-hz = /bits/ 64 <2745600000>;
- opp-peak-kBps = <7216000 25497600>;
- };
-
- cpu4_opp32: opp-2803200000 {
- opp-hz = /bits/ 64 <2803200000>;
- opp-peak-kBps = <7216000 25497600>;
- };
- };
-
- dsi_opp_table: opp-table-dsi {
- compatible = "operating-points-v2";
-
- opp-19200000 {
- opp-hz = /bits/ 64 <19200000>;
- required-opps = <&rpmhpd_opp_min_svs>;
- };
-
- opp-180000000 {
- opp-hz = /bits/ 64 <180000000>;
- required-opps = <&rpmhpd_opp_low_svs>;
- };
-
- opp-275000000 {
- opp-hz = /bits/ 64 <275000000>;
- required-opps = <&rpmhpd_opp_svs>;
- };
-
- opp-328580000 {
- opp-hz = /bits/ 64 <328580000>;
- required-opps = <&rpmhpd_opp_svs_l1>;
- };
-
- opp-358000000 {
- opp-hz = /bits/ 64 <358000000>;
- required-opps = <&rpmhpd_opp_nom>;
- };
- };
-
- qspi_opp_table: opp-table-qspi {
- compatible = "operating-points-v2";
-
- opp-19200000 {
- opp-hz = /bits/ 64 <19200000>;
- required-opps = <&rpmhpd_opp_min_svs>;
- };
-
- opp-100000000 {
- opp-hz = /bits/ 64 <100000000>;
- required-opps = <&rpmhpd_opp_low_svs>;
- };
-
- opp-150000000 {
- opp-hz = /bits/ 64 <150000000>;
- required-opps = <&rpmhpd_opp_svs>;
- };
-
- opp-300000000 {
- opp-hz = /bits/ 64 <300000000>;
- required-opps = <&rpmhpd_opp_nom>;
- };
- };
-
- qup_opp_table: opp-table-qup {
- compatible = "operating-points-v2";
-
- opp-50000000 {
- opp-hz = /bits/ 64 <50000000>;
- required-opps = <&rpmhpd_opp_min_svs>;
- };
-
- opp-75000000 {
- opp-hz = /bits/ 64 <75000000>;
- required-opps = <&rpmhpd_opp_low_svs>;
- };
-
- opp-100000000 {
- opp-hz = /bits/ 64 <100000000>;
- required-opps = <&rpmhpd_opp_svs>;
- };
-
- opp-128000000 {
- opp-hz = /bits/ 64 <128000000>;
- required-opps = <&rpmhpd_opp_nom>;
- };
- };
-
- pmu {
- compatible = "arm,armv8-pmuv3";
- interrupts = <GIC_PPI 5 IRQ_TYPE_LEVEL_HIGH>;
- };
-
- psci: psci {
- compatible = "arm,psci-1.0";
- method = "smc";
-
- CPU_PD0: power-domain-cpu0 {
- #power-domain-cells = <0>;
- power-domains = <&CLUSTER_PD>;
- domain-idle-states = <&LITTLE_CPU_SLEEP_0>;
- };
-
- CPU_PD1: power-domain-cpu1 {
- #power-domain-cells = <0>;
- power-domains = <&CLUSTER_PD>;
- domain-idle-states = <&LITTLE_CPU_SLEEP_0>;
- };
-
- CPU_PD2: power-domain-cpu2 {
- #power-domain-cells = <0>;
- power-domains = <&CLUSTER_PD>;
- domain-idle-states = <&LITTLE_CPU_SLEEP_0>;
- };
-
- CPU_PD3: power-domain-cpu3 {
- #power-domain-cells = <0>;
- power-domains = <&CLUSTER_PD>;
- domain-idle-states = <&LITTLE_CPU_SLEEP_0>;
- };
-
- CPU_PD4: power-domain-cpu4 {
- #power-domain-cells = <0>;
- power-domains = <&CLUSTER_PD>;
- domain-idle-states = <&BIG_CPU_SLEEP_0>;
- };
-
- CPU_PD5: power-domain-cpu5 {
- #power-domain-cells = <0>;
- power-domains = <&CLUSTER_PD>;
- domain-idle-states = <&BIG_CPU_SLEEP_0>;
- };
-
- CPU_PD6: power-domain-cpu6 {
- #power-domain-cells = <0>;
- power-domains = <&CLUSTER_PD>;
- domain-idle-states = <&BIG_CPU_SLEEP_0>;
- };
-
- CPU_PD7: power-domain-cpu7 {
- #power-domain-cells = <0>;
- power-domains = <&CLUSTER_PD>;
- domain-idle-states = <&BIG_CPU_SLEEP_0>;
- };
-
- CLUSTER_PD: power-domain-cluster {
- #power-domain-cells = <0>;
- domain-idle-states = <&CLUSTER_SLEEP_0>;
- };
- };
-
- reserved-memory {
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- hyp_mem: hyp-mem@85700000 {
- reg = <0 0x85700000 0 0x600000>;
- no-map;
- };
-
- xbl_mem: xbl-mem@85e00000 {
- reg = <0 0x85e00000 0 0x100000>;
- no-map;
- };
-
- aop_mem: aop-mem@85fc0000 {
- reg = <0 0x85fc0000 0 0x20000>;
- no-map;
- };
-
- aop_cmd_db_mem: aop-cmd-db-mem@85fe0000 {
- compatible = "qcom,cmd-db";
- reg = <0x0 0x85fe0000 0 0x20000>;
- no-map;
- };
-
- smem@86000000 {
- compatible = "qcom,smem";
- reg = <0x0 0x86000000 0 0x200000>;
- no-map;
- hwlocks = <&tcsr_mutex 3>;
- };
-
- tz_mem: tz@86200000 {
- reg = <0 0x86200000 0 0x2d00000>;
- no-map;
- };
-
- rmtfs_mem: rmtfs@88f00000 {
- compatible = "qcom,rmtfs-mem";
- reg = <0 0x88f00000 0 0x200000>;
- no-map;
-
- qcom,client-id = <1>;
- qcom,vmid = <QCOM_SCM_VMID_MSS_MSA>;
- };
-
- qseecom_mem: qseecom@8ab00000 {
- reg = <0 0x8ab00000 0 0x1400000>;
- no-map;
- };
-
- camera_mem: camera-mem@8bf00000 {
- reg = <0 0x8bf00000 0 0x500000>;
- no-map;
- };
-
- ipa_fw_mem: ipa-fw@8c400000 {
- reg = <0 0x8c400000 0 0x10000>;
- no-map;
- };
-
- ipa_gsi_mem: ipa-gsi@8c410000 {
- reg = <0 0x8c410000 0 0x5000>;
- no-map;
- };
-
- gpu_mem: gpu@8c415000 {
- reg = <0 0x8c415000 0 0x2000>;
- no-map;
- };
-
- adsp_mem: adsp@8c500000 {
- reg = <0 0x8c500000 0 0x1a00000>;
- no-map;
- };
-
- wlan_msa_mem: wlan-msa@8df00000 {
- reg = <0 0x8df00000 0 0x100000>;
- no-map;
- };
-
- mpss_region: mpss@8e000000 {
- reg = <0 0x8e000000 0 0x7800000>;
- no-map;
- };
-
- venus_mem: venus@95800000 {
- reg = <0 0x95800000 0 0x500000>;
- no-map;
- };
-
- cdsp_mem: cdsp@95d00000 {
- reg = <0 0x95d00000 0 0x800000>;
- no-map;
- };
-
- mba_region: mba@96500000 {
- reg = <0 0x96500000 0 0x200000>;
- no-map;
- };
-
- slpi_mem: slpi@96700000 {
- reg = <0 0x96700000 0 0x1400000>;
- no-map;
- };
-
- spss_mem: spss@97b00000 {
- reg = <0 0x97b00000 0 0x100000>;
- no-map;
- };
-
- mdata_mem: mpss-metadata {
- alloc-ranges = <0 0xa0000000 0 0x20000000>;
- size = <0 0x4000>;
- no-map;
- };
-
- fastrpc_mem: fastrpc {
- compatible = "shared-dma-pool";
- alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>;
- alignment = <0x0 0x400000>;
- size = <0x0 0x1000000>;
- reusable;
- };
- };
-
- adsp_pas: remoteproc-adsp {
- compatible = "qcom,sdm845-adsp-pas";
-
- interrupts-extended = <&intc GIC_SPI 162 IRQ_TYPE_EDGE_RISING>,
- <&adsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
- <&adsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
- <&adsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
- <&adsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>;
- interrupt-names = "wdog", "fatal", "ready",
- "handover", "stop-ack";
-
- clocks = <&rpmhcc RPMH_CXO_CLK>;
- clock-names = "xo";
-
- memory-region = <&adsp_mem>;
-
- qcom,qmp = <&aoss_qmp>;
-
- qcom,smem-states = <&adsp_smp2p_out 0>;
- qcom,smem-state-names = "stop";
-
- status = "disabled";
-
- glink-edge {
- interrupts = <GIC_SPI 156 IRQ_TYPE_EDGE_RISING>;
- label = "lpass";
- qcom,remote-pid = <2>;
- mboxes = <&apss_shared 8>;
-
- apr {
- compatible = "qcom,apr-v2";
- qcom,glink-channels = "apr_audio_svc";
- qcom,domain = <APR_DOMAIN_ADSP>;
- #address-cells = <1>;
- #size-cells = <0>;
- qcom,intents = <512 20>;
-
- service@3 {
- reg = <APR_SVC_ADSP_CORE>;
- compatible = "qcom,q6core";
- qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd";
- };
-
- q6afe: service@4 {
- compatible = "qcom,q6afe";
- reg = <APR_SVC_AFE>;
- qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd";
- q6afedai: dais {
- compatible = "qcom,q6afe-dais";
- #address-cells = <1>;
- #size-cells = <0>;
- #sound-dai-cells = <1>;
- };
- };
-
- q6asm: service@7 {
- compatible = "qcom,q6asm";
- reg = <APR_SVC_ASM>;
- qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd";
- q6asmdai: dais {
- compatible = "qcom,q6asm-dais";
- #address-cells = <1>;
- #size-cells = <0>;
- #sound-dai-cells = <1>;
- iommus = <&apps_smmu 0x1821 0x0>;
- };
- };
-
- q6adm: service@8 {
- compatible = "qcom,q6adm";
- reg = <APR_SVC_ADM>;
- qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd";
- q6routing: routing {
- compatible = "qcom,q6adm-routing";
- #sound-dai-cells = <0>;
- };
- };
- };
-
- fastrpc {
- compatible = "qcom,fastrpc";
- qcom,glink-channels = "fastrpcglink-apps-dsp";
- label = "adsp";
- qcom,non-secure-domain;
- #address-cells = <1>;
- #size-cells = <0>;
-
- compute-cb@3 {
- compatible = "qcom,fastrpc-compute-cb";
- reg = <3>;
- iommus = <&apps_smmu 0x1823 0x0>;
- };
-
- compute-cb@4 {
- compatible = "qcom,fastrpc-compute-cb";
- reg = <4>;
- iommus = <&apps_smmu 0x1824 0x0>;
- };
- };
- };
- };
-
- cdsp_pas: remoteproc-cdsp {
- compatible = "qcom,sdm845-cdsp-pas";
-
- interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_EDGE_RISING>,
- <&cdsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
- <&cdsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
- <&cdsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
- <&cdsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>;
- interrupt-names = "wdog", "fatal", "ready",
- "handover", "stop-ack";
-
- clocks = <&rpmhcc RPMH_CXO_CLK>;
- clock-names = "xo";
-
- memory-region = <&cdsp_mem>;
-
- qcom,qmp = <&aoss_qmp>;
-
- qcom,smem-states = <&cdsp_smp2p_out 0>;
- qcom,smem-state-names = "stop";
-
- status = "disabled";
-
- glink-edge {
- interrupts = <GIC_SPI 574 IRQ_TYPE_EDGE_RISING>;
- label = "turing";
- qcom,remote-pid = <5>;
- mboxes = <&apss_shared 4>;
- fastrpc {
- compatible = "qcom,fastrpc";
- qcom,glink-channels = "fastrpcglink-apps-dsp";
- label = "cdsp";
- qcom,non-secure-domain;
- #address-cells = <1>;
- #size-cells = <0>;
-
- compute-cb@1 {
- compatible = "qcom,fastrpc-compute-cb";
- reg = <1>;
- iommus = <&apps_smmu 0x1401 0x30>;
- };
-
- compute-cb@2 {
- compatible = "qcom,fastrpc-compute-cb";
- reg = <2>;
- iommus = <&apps_smmu 0x1402 0x30>;
- };
-
- compute-cb@3 {
- compatible = "qcom,fastrpc-compute-cb";
- reg = <3>;
- iommus = <&apps_smmu 0x1403 0x30>;
- };
-
- compute-cb@4 {
- compatible = "qcom,fastrpc-compute-cb";
- reg = <4>;
- iommus = <&apps_smmu 0x1404 0x30>;
- };
-
- compute-cb@5 {
- compatible = "qcom,fastrpc-compute-cb";
- reg = <5>;
- iommus = <&apps_smmu 0x1405 0x30>;
- };
-
- compute-cb@6 {
- compatible = "qcom,fastrpc-compute-cb";
- reg = <6>;
- iommus = <&apps_smmu 0x1406 0x30>;
- };
-
- compute-cb@7 {
- compatible = "qcom,fastrpc-compute-cb";
- reg = <7>;
- iommus = <&apps_smmu 0x1407 0x30>;
- };
-
- compute-cb@8 {
- compatible = "qcom,fastrpc-compute-cb";
- reg = <8>;
- iommus = <&apps_smmu 0x1408 0x30>;
- };
- };
- };
- };
-
- smp2p-cdsp {
- compatible = "qcom,smp2p";
- qcom,smem = <94>, <432>;
-
- interrupts = <GIC_SPI 576 IRQ_TYPE_EDGE_RISING>;
-
- mboxes = <&apss_shared 6>;
-
- qcom,local-pid = <0>;
- qcom,remote-pid = <5>;
-
- cdsp_smp2p_out: master-kernel {
- qcom,entry-name = "master-kernel";
- #qcom,smem-state-cells = <1>;
- };
-
- cdsp_smp2p_in: slave-kernel {
- qcom,entry-name = "slave-kernel";
-
- interrupt-controller;
- #interrupt-cells = <2>;
- };
- };
-
- smp2p-lpass {
- compatible = "qcom,smp2p";
- qcom,smem = <443>, <429>;
-
- interrupts = <GIC_SPI 158 IRQ_TYPE_EDGE_RISING>;
-
- mboxes = <&apss_shared 10>;
-
- qcom,local-pid = <0>;
- qcom,remote-pid = <2>;
-
- adsp_smp2p_out: master-kernel {
- qcom,entry-name = "master-kernel";
- #qcom,smem-state-cells = <1>;
- };
-
- adsp_smp2p_in: slave-kernel {
- qcom,entry-name = "slave-kernel";
-
- interrupt-controller;
- #interrupt-cells = <2>;
- };
- };
-
- smp2p-mpss {
- compatible = "qcom,smp2p";
- qcom,smem = <435>, <428>;
- interrupts = <GIC_SPI 451 IRQ_TYPE_EDGE_RISING>;
- mboxes = <&apss_shared 14>;
- qcom,local-pid = <0>;
- qcom,remote-pid = <1>;
-
- modem_smp2p_out: master-kernel {
- qcom,entry-name = "master-kernel";
- #qcom,smem-state-cells = <1>;
- };
-
- modem_smp2p_in: slave-kernel {
- qcom,entry-name = "slave-kernel";
- interrupt-controller;
- #interrupt-cells = <2>;
- };
-
- ipa_smp2p_out: ipa-ap-to-modem {
- qcom,entry-name = "ipa";
- #qcom,smem-state-cells = <1>;
- };
-
- ipa_smp2p_in: ipa-modem-to-ap {
- qcom,entry-name = "ipa";
- interrupt-controller;
- #interrupt-cells = <2>;
- };
- };
-
- smp2p-slpi {
- compatible = "qcom,smp2p";
- qcom,smem = <481>, <430>;
- interrupts = <GIC_SPI 172 IRQ_TYPE_EDGE_RISING>;
- mboxes = <&apss_shared 26>;
- qcom,local-pid = <0>;
- qcom,remote-pid = <3>;
-
- slpi_smp2p_out: master-kernel {
- qcom,entry-name = "master-kernel";
- #qcom,smem-state-cells = <1>;
- };
-
- slpi_smp2p_in: slave-kernel {
- qcom,entry-name = "slave-kernel";
- interrupt-controller;
- #interrupt-cells = <2>;
- };
- };
-
- soc: soc@0 {
- #address-cells = <2>;
- #size-cells = <2>;
- ranges = <0 0 0 0 0x10 0>;
- dma-ranges = <0 0 0 0 0x10 0>;
- compatible = "simple-bus";
-
- gcc: clock-controller@100000 {
- compatible = "qcom,gcc-sdm845";
- reg = <0 0x00100000 0 0x1f0000>;
- clocks = <&rpmhcc RPMH_CXO_CLK>,
- <&rpmhcc RPMH_CXO_CLK_A>,
- <&sleep_clk>,
- <&pcie0_phy>,
- <&pcie1_phy>;
- clock-names = "bi_tcxo",
- "bi_tcxo_ao",
- "sleep_clk",
- "pcie_0_pipe_clk",
- "pcie_1_pipe_clk";
- #clock-cells = <1>;
- #reset-cells = <1>;
- #power-domain-cells = <1>;
- power-domains = <&rpmhpd SDM845_CX>;
- };
-
- qfprom@784000 {
- compatible = "qcom,sdm845-qfprom", "qcom,qfprom";
- reg = <0 0x00784000 0 0x8ff>;
- #address-cells = <1>;
- #size-cells = <1>;
-
- qusb2p_hstx_trim: hstx-trim-primary@1eb {
- reg = <0x1eb 0x1>;
- bits = <1 4>;
- };
-
- qusb2s_hstx_trim: hstx-trim-secondary@1eb {
- reg = <0x1eb 0x2>;
- bits = <6 4>;
- };
- };
-
- rng: rng@793000 {
- compatible = "qcom,prng-ee";
- reg = <0 0x00793000 0 0x1000>;
- clocks = <&gcc GCC_PRNG_AHB_CLK>;
- clock-names = "core";
- };
-
- gpi_dma0: dma-controller@800000 {
- #dma-cells = <3>;
- compatible = "qcom,sdm845-gpi-dma";
- reg = <0 0x00800000 0 0x60000>;
- interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 250 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>;
- dma-channels = <13>;
- dma-channel-mask = <0xfa>;
- iommus = <&apps_smmu 0x0016 0x0>;
- status = "disabled";
- };
-
- qupv3_id_0: geniqup@8c0000 {
- compatible = "qcom,geni-se-qup";
- reg = <0 0x008c0000 0 0x6000>;
- clock-names = "m-ahb", "s-ahb";
- clocks = <&gcc GCC_QUPV3_WRAP_0_M_AHB_CLK>,
- <&gcc GCC_QUPV3_WRAP_0_S_AHB_CLK>;
- iommus = <&apps_smmu 0x3 0x0>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
- interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>;
- interconnect-names = "qup-core";
- status = "disabled";
-
- i2c0: i2c@880000 {
- compatible = "qcom,geni-i2c";
- reg = <0 0x00880000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_i2c0_default>;
- interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- power-domains = <&rpmhpd SDM845_CX>;
- operating-points-v2 = <&qup_opp_table>;
- interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>,
- <&aggre1_noc MASTER_QUP_1 0 &mem_noc SLAVE_EBI1 0>;
- interconnect-names = "qup-core", "qup-config", "qup-memory";
- dmas = <&gpi_dma0 0 0 QCOM_GPI_I2C>,
- <&gpi_dma0 1 0 QCOM_GPI_I2C>;
- dma-names = "tx", "rx";
- status = "disabled";
- };
-
- spi0: spi@880000 {
- compatible = "qcom,geni-spi";
- reg = <0 0x00880000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_spi0_default>;
- interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>;
- interconnect-names = "qup-core", "qup-config";
- dmas = <&gpi_dma0 0 0 QCOM_GPI_SPI>,
- <&gpi_dma0 1 0 QCOM_GPI_SPI>;
- dma-names = "tx", "rx";
- status = "disabled";
- };
-
- uart0: serial@880000 {
- compatible = "qcom,geni-uart";
- reg = <0 0x00880000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_uart0_default>;
- interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>;
- power-domains = <&rpmhpd SDM845_CX>;
- operating-points-v2 = <&qup_opp_table>;
- interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>;
- interconnect-names = "qup-core", "qup-config";
- status = "disabled";
- };
-
- i2c1: i2c@884000 {
- compatible = "qcom,geni-i2c";
- reg = <0 0x00884000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_i2c1_default>;
- interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- power-domains = <&rpmhpd SDM845_CX>;
- operating-points-v2 = <&qup_opp_table>;
- interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>,
- <&aggre1_noc MASTER_QUP_1 0 &mem_noc SLAVE_EBI1 0>;
- interconnect-names = "qup-core", "qup-config", "qup-memory";
- dmas = <&gpi_dma0 0 1 QCOM_GPI_I2C>,
- <&gpi_dma0 1 1 QCOM_GPI_I2C>;
- dma-names = "tx", "rx";
- status = "disabled";
- };
-
- spi1: spi@884000 {
- compatible = "qcom,geni-spi";
- reg = <0 0x00884000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_spi1_default>;
- interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>;
- interconnect-names = "qup-core", "qup-config";
- dmas = <&gpi_dma0 0 1 QCOM_GPI_SPI>,
- <&gpi_dma0 1 1 QCOM_GPI_SPI>;
- dma-names = "tx", "rx";
- status = "disabled";
- };
-
- uart1: serial@884000 {
- compatible = "qcom,geni-uart";
- reg = <0 0x00884000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_uart1_default>;
- interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>;
- power-domains = <&rpmhpd SDM845_CX>;
- operating-points-v2 = <&qup_opp_table>;
- interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>;
- interconnect-names = "qup-core", "qup-config";
- status = "disabled";
- };
-
- i2c2: i2c@888000 {
- compatible = "qcom,geni-i2c";
- reg = <0 0x00888000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_i2c2_default>;
- interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- power-domains = <&rpmhpd SDM845_CX>;
- operating-points-v2 = <&qup_opp_table>;
- interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>,
- <&aggre1_noc MASTER_QUP_1 0 &mem_noc SLAVE_EBI1 0>;
- interconnect-names = "qup-core", "qup-config", "qup-memory";
- dmas = <&gpi_dma0 0 2 QCOM_GPI_I2C>,
- <&gpi_dma0 1 2 QCOM_GPI_I2C>;
- dma-names = "tx", "rx";
- status = "disabled";
- };
-
- spi2: spi@888000 {
- compatible = "qcom,geni-spi";
- reg = <0 0x00888000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_spi2_default>;
- interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>;
- interconnect-names = "qup-core", "qup-config";
- dmas = <&gpi_dma0 0 2 QCOM_GPI_SPI>,
- <&gpi_dma0 1 2 QCOM_GPI_SPI>;
- dma-names = "tx", "rx";
- status = "disabled";
- };
-
- uart2: serial@888000 {
- compatible = "qcom,geni-uart";
- reg = <0 0x00888000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_uart2_default>;
- interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>;
- power-domains = <&rpmhpd SDM845_CX>;
- operating-points-v2 = <&qup_opp_table>;
- interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>;
- interconnect-names = "qup-core", "qup-config";
- status = "disabled";
- };
-
- i2c3: i2c@88c000 {
- compatible = "qcom,geni-i2c";
- reg = <0 0x0088c000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP0_S3_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_i2c3_default>;
- interrupts = <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- power-domains = <&rpmhpd SDM845_CX>;
- operating-points-v2 = <&qup_opp_table>;
- interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>,
- <&aggre1_noc MASTER_QUP_1 0 &mem_noc SLAVE_EBI1 0>;
- interconnect-names = "qup-core", "qup-config", "qup-memory";
- dmas = <&gpi_dma0 0 3 QCOM_GPI_I2C>,
- <&gpi_dma0 1 3 QCOM_GPI_I2C>;
- dma-names = "tx", "rx";
- status = "disabled";
- };
-
- spi3: spi@88c000 {
- compatible = "qcom,geni-spi";
- reg = <0 0x0088c000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP0_S3_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_spi3_default>;
- interrupts = <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>;
- interconnect-names = "qup-core", "qup-config";
- dmas = <&gpi_dma0 0 3 QCOM_GPI_SPI>,
- <&gpi_dma0 1 3 QCOM_GPI_SPI>;
- dma-names = "tx", "rx";
- status = "disabled";
- };
-
- uart3: serial@88c000 {
- compatible = "qcom,geni-uart";
- reg = <0 0x0088c000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP0_S3_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_uart3_default>;
- interrupts = <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>;
- power-domains = <&rpmhpd SDM845_CX>;
- operating-points-v2 = <&qup_opp_table>;
- interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>;
- interconnect-names = "qup-core", "qup-config";
- status = "disabled";
- };
-
- i2c4: i2c@890000 {
- compatible = "qcom,geni-i2c";
- reg = <0 0x00890000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP0_S4_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_i2c4_default>;
- interrupts = <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- power-domains = <&rpmhpd SDM845_CX>;
- operating-points-v2 = <&qup_opp_table>;
- interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>,
- <&aggre1_noc MASTER_QUP_1 0 &mem_noc SLAVE_EBI1 0>;
- interconnect-names = "qup-core", "qup-config", "qup-memory";
- dmas = <&gpi_dma0 0 4 QCOM_GPI_I2C>,
- <&gpi_dma0 1 4 QCOM_GPI_I2C>;
- dma-names = "tx", "rx";
- status = "disabled";
- };
-
- spi4: spi@890000 {
- compatible = "qcom,geni-spi";
- reg = <0 0x00890000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP0_S4_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_spi4_default>;
- interrupts = <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>;
- interconnect-names = "qup-core", "qup-config";
- dmas = <&gpi_dma0 0 4 QCOM_GPI_SPI>,
- <&gpi_dma0 1 4 QCOM_GPI_SPI>;
- dma-names = "tx", "rx";
- status = "disabled";
- };
-
- uart4: serial@890000 {
- compatible = "qcom,geni-uart";
- reg = <0 0x00890000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP0_S4_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_uart4_default>;
- interrupts = <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH>;
- power-domains = <&rpmhpd SDM845_CX>;
- operating-points-v2 = <&qup_opp_table>;
- interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>;
- interconnect-names = "qup-core", "qup-config";
- status = "disabled";
- };
-
- i2c5: i2c@894000 {
- compatible = "qcom,geni-i2c";
- reg = <0 0x00894000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_i2c5_default>;
- interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- power-domains = <&rpmhpd SDM845_CX>;
- operating-points-v2 = <&qup_opp_table>;
- interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>,
- <&aggre1_noc MASTER_QUP_1 0 &mem_noc SLAVE_EBI1 0>;
- interconnect-names = "qup-core", "qup-config", "qup-memory";
- dmas = <&gpi_dma0 0 5 QCOM_GPI_I2C>,
- <&gpi_dma0 1 5 QCOM_GPI_I2C>;
- dma-names = "tx", "rx";
- status = "disabled";
- };
-
- spi5: spi@894000 {
- compatible = "qcom,geni-spi";
- reg = <0 0x00894000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_spi5_default>;
- interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>;
- interconnect-names = "qup-core", "qup-config";
- dmas = <&gpi_dma0 0 5 QCOM_GPI_SPI>,
- <&gpi_dma0 1 5 QCOM_GPI_SPI>;
- dma-names = "tx", "rx";
- status = "disabled";
- };
-
- uart5: serial@894000 {
- compatible = "qcom,geni-uart";
- reg = <0 0x00894000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_uart5_default>;
- interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH>;
- power-domains = <&rpmhpd SDM845_CX>;
- operating-points-v2 = <&qup_opp_table>;
- interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>;
- interconnect-names = "qup-core", "qup-config";
- status = "disabled";
- };
-
- i2c6: i2c@898000 {
- compatible = "qcom,geni-i2c";
- reg = <0 0x00898000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_i2c6_default>;
- interrupts = <GIC_SPI 607 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- power-domains = <&rpmhpd SDM845_CX>;
- operating-points-v2 = <&qup_opp_table>;
- interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>,
- <&aggre1_noc MASTER_QUP_1 0 &mem_noc SLAVE_EBI1 0>;
- interconnect-names = "qup-core", "qup-config", "qup-memory";
- dmas = <&gpi_dma0 0 6 QCOM_GPI_I2C>,
- <&gpi_dma0 1 6 QCOM_GPI_I2C>;
- dma-names = "tx", "rx";
- status = "disabled";
- };
-
- spi6: spi@898000 {
- compatible = "qcom,geni-spi";
- reg = <0 0x00898000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_spi6_default>;
- interrupts = <GIC_SPI 607 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>;
- interconnect-names = "qup-core", "qup-config";
- dmas = <&gpi_dma0 0 6 QCOM_GPI_SPI>,
- <&gpi_dma0 1 6 QCOM_GPI_SPI>;
- dma-names = "tx", "rx";
- status = "disabled";
- };
-
- uart6: serial@898000 {
- compatible = "qcom,geni-uart";
- reg = <0 0x00898000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_uart6_default>;
- interrupts = <GIC_SPI 607 IRQ_TYPE_LEVEL_HIGH>;
- power-domains = <&rpmhpd SDM845_CX>;
- operating-points-v2 = <&qup_opp_table>;
- interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>;
- interconnect-names = "qup-core", "qup-config";
- status = "disabled";
- };
-
- i2c7: i2c@89c000 {
- compatible = "qcom,geni-i2c";
- reg = <0 0x0089c000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP0_S7_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_i2c7_default>;
- interrupts = <GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- power-domains = <&rpmhpd SDM845_CX>;
- operating-points-v2 = <&qup_opp_table>;
- status = "disabled";
- };
-
- spi7: spi@89c000 {
- compatible = "qcom,geni-spi";
- reg = <0 0x0089c000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP0_S7_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_spi7_default>;
- interrupts = <GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>;
- interconnect-names = "qup-core", "qup-config";
- dmas = <&gpi_dma0 0 7 QCOM_GPI_SPI>,
- <&gpi_dma0 1 7 QCOM_GPI_SPI>;
- dma-names = "tx", "rx";
- status = "disabled";
- };
-
- uart7: serial@89c000 {
- compatible = "qcom,geni-uart";
- reg = <0 0x0089c000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP0_S7_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_uart7_default>;
- interrupts = <GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>;
- power-domains = <&rpmhpd SDM845_CX>;
- operating-points-v2 = <&qup_opp_table>;
- interconnects = <&aggre1_noc MASTER_QUP_1 0 &config_noc SLAVE_BLSP_1 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_1 0>;
- interconnect-names = "qup-core", "qup-config";
- status = "disabled";
- };
- };
-
- gpi_dma1: dma-controller@a00000 {
- #dma-cells = <3>;
- compatible = "qcom,sdm845-gpi-dma";
- reg = <0 0x00a00000 0 0x60000>;
- interrupts = <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 294 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 295 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH>;
- dma-channels = <13>;
- dma-channel-mask = <0xfa>;
- iommus = <&apps_smmu 0x06d6 0x0>;
- status = "disabled";
- };
-
- qupv3_id_1: geniqup@ac0000 {
- compatible = "qcom,geni-se-qup";
- reg = <0 0x00ac0000 0 0x6000>;
- clock-names = "m-ahb", "s-ahb";
- clocks = <&gcc GCC_QUPV3_WRAP_1_M_AHB_CLK>,
- <&gcc GCC_QUPV3_WRAP_1_S_AHB_CLK>;
- iommus = <&apps_smmu 0x6c3 0x0>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
- interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>;
- interconnect-names = "qup-core";
- status = "disabled";
-
- i2c8: i2c@a80000 {
- compatible = "qcom,geni-i2c";
- reg = <0 0x00a80000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP1_S0_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_i2c8_default>;
- interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- power-domains = <&rpmhpd SDM845_CX>;
- operating-points-v2 = <&qup_opp_table>;
- interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>,
- <&aggre2_noc MASTER_QUP_2 0 &mem_noc SLAVE_EBI1 0>;
- interconnect-names = "qup-core", "qup-config", "qup-memory";
- dmas = <&gpi_dma1 0 0 QCOM_GPI_I2C>,
- <&gpi_dma1 1 0 QCOM_GPI_I2C>;
- dma-names = "tx", "rx";
- status = "disabled";
- };
-
- spi8: spi@a80000 {
- compatible = "qcom,geni-spi";
- reg = <0 0x00a80000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP1_S0_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_spi8_default>;
- interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>;
- interconnect-names = "qup-core", "qup-config";
- dmas = <&gpi_dma1 0 0 QCOM_GPI_SPI>,
- <&gpi_dma1 1 0 QCOM_GPI_SPI>;
- dma-names = "tx", "rx";
- status = "disabled";
- };
-
- uart8: serial@a80000 {
- compatible = "qcom,geni-uart";
- reg = <0 0x00a80000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP1_S0_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_uart8_default>;
- interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
- power-domains = <&rpmhpd SDM845_CX>;
- operating-points-v2 = <&qup_opp_table>;
- interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>;
- interconnect-names = "qup-core", "qup-config";
- status = "disabled";
- };
-
- i2c9: i2c@a84000 {
- compatible = "qcom,geni-i2c";
- reg = <0 0x00a84000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP1_S1_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_i2c9_default>;
- interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- power-domains = <&rpmhpd SDM845_CX>;
- operating-points-v2 = <&qup_opp_table>;
- interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>,
- <&aggre2_noc MASTER_QUP_2 0 &mem_noc SLAVE_EBI1 0>;
- interconnect-names = "qup-core", "qup-config", "qup-memory";
- dmas = <&gpi_dma1 0 1 QCOM_GPI_I2C>,
- <&gpi_dma1 1 1 QCOM_GPI_I2C>;
- dma-names = "tx", "rx";
- status = "disabled";
- };
-
- spi9: spi@a84000 {
- compatible = "qcom,geni-spi";
- reg = <0 0x00a84000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP1_S1_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_spi9_default>;
- interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>;
- interconnect-names = "qup-core", "qup-config";
- dmas = <&gpi_dma1 0 1 QCOM_GPI_SPI>,
- <&gpi_dma1 1 1 QCOM_GPI_SPI>;
- dma-names = "tx", "rx";
- status = "disabled";
- };
-
- uart9: serial@a84000 {
- compatible = "qcom,geni-debug-uart";
- reg = <0 0x00a84000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP1_S1_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_uart9_default>;
- interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
- power-domains = <&rpmhpd SDM845_CX>;
- operating-points-v2 = <&qup_opp_table>;
- interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>;
- interconnect-names = "qup-core", "qup-config";
- status = "disabled";
- };
-
- i2c10: i2c@a88000 {
- compatible = "qcom,geni-i2c";
- reg = <0 0x00a88000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP1_S2_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_i2c10_default>;
- interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- power-domains = <&rpmhpd SDM845_CX>;
- operating-points-v2 = <&qup_opp_table>;
- interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>,
- <&aggre2_noc MASTER_QUP_2 0 &mem_noc SLAVE_EBI1 0>;
- interconnect-names = "qup-core", "qup-config", "qup-memory";
- dmas = <&gpi_dma1 0 2 QCOM_GPI_I2C>,
- <&gpi_dma1 1 2 QCOM_GPI_I2C>;
- dma-names = "tx", "rx";
- status = "disabled";
- };
-
- spi10: spi@a88000 {
- compatible = "qcom,geni-spi";
- reg = <0 0x00a88000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP1_S2_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_spi10_default>;
- interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>;
- interconnect-names = "qup-core", "qup-config";
- dmas = <&gpi_dma1 0 2 QCOM_GPI_SPI>,
- <&gpi_dma1 1 2 QCOM_GPI_SPI>;
- dma-names = "tx", "rx";
- status = "disabled";
- };
-
- uart10: serial@a88000 {
- compatible = "qcom,geni-uart";
- reg = <0 0x00a88000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP1_S2_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_uart10_default>;
- interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
- power-domains = <&rpmhpd SDM845_CX>;
- operating-points-v2 = <&qup_opp_table>;
- interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>;
- interconnect-names = "qup-core", "qup-config";
- status = "disabled";
- };
-
- i2c11: i2c@a8c000 {
- compatible = "qcom,geni-i2c";
- reg = <0 0x00a8c000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP1_S3_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_i2c11_default>;
- interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- power-domains = <&rpmhpd SDM845_CX>;
- operating-points-v2 = <&qup_opp_table>;
- interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>,
- <&aggre2_noc MASTER_QUP_2 0 &mem_noc SLAVE_EBI1 0>;
- interconnect-names = "qup-core", "qup-config", "qup-memory";
- dmas = <&gpi_dma1 0 3 QCOM_GPI_I2C>,
- <&gpi_dma1 1 3 QCOM_GPI_I2C>;
- dma-names = "tx", "rx";
- status = "disabled";
- };
-
- spi11: spi@a8c000 {
- compatible = "qcom,geni-spi";
- reg = <0 0x00a8c000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP1_S3_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_spi11_default>;
- interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>;
- interconnect-names = "qup-core", "qup-config";
- dmas = <&gpi_dma1 0 3 QCOM_GPI_SPI>,
- <&gpi_dma1 1 3 QCOM_GPI_SPI>;
- dma-names = "tx", "rx";
- status = "disabled";
- };
-
- uart11: serial@a8c000 {
- compatible = "qcom,geni-uart";
- reg = <0 0x00a8c000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP1_S3_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_uart11_default>;
- interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
- power-domains = <&rpmhpd SDM845_CX>;
- operating-points-v2 = <&qup_opp_table>;
- interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>;
- interconnect-names = "qup-core", "qup-config";
- status = "disabled";
- };
-
- i2c12: i2c@a90000 {
- compatible = "qcom,geni-i2c";
- reg = <0 0x00a90000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP1_S4_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_i2c12_default>;
- interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- power-domains = <&rpmhpd SDM845_CX>;
- operating-points-v2 = <&qup_opp_table>;
- interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>,
- <&aggre2_noc MASTER_QUP_2 0 &mem_noc SLAVE_EBI1 0>;
- interconnect-names = "qup-core", "qup-config", "qup-memory";
- dmas = <&gpi_dma1 0 4 QCOM_GPI_I2C>,
- <&gpi_dma1 1 4 QCOM_GPI_I2C>;
- dma-names = "tx", "rx";
- status = "disabled";
- };
-
- spi12: spi@a90000 {
- compatible = "qcom,geni-spi";
- reg = <0 0x00a90000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP1_S4_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_spi12_default>;
- interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>;
- interconnect-names = "qup-core", "qup-config";
- dmas = <&gpi_dma1 0 4 QCOM_GPI_SPI>,
- <&gpi_dma1 1 4 QCOM_GPI_SPI>;
- dma-names = "tx", "rx";
- status = "disabled";
- };
-
- uart12: serial@a90000 {
- compatible = "qcom,geni-uart";
- reg = <0 0x00a90000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP1_S4_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_uart12_default>;
- interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
- power-domains = <&rpmhpd SDM845_CX>;
- operating-points-v2 = <&qup_opp_table>;
- interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>;
- interconnect-names = "qup-core", "qup-config";
- status = "disabled";
- };
-
- i2c13: i2c@a94000 {
- compatible = "qcom,geni-i2c";
- reg = <0 0x00a94000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP1_S5_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_i2c13_default>;
- interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- power-domains = <&rpmhpd SDM845_CX>;
- operating-points-v2 = <&qup_opp_table>;
- interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>,
- <&aggre2_noc MASTER_QUP_2 0 &mem_noc SLAVE_EBI1 0>;
- interconnect-names = "qup-core", "qup-config", "qup-memory";
- dmas = <&gpi_dma1 0 5 QCOM_GPI_I2C>,
- <&gpi_dma1 1 5 QCOM_GPI_I2C>;
- dma-names = "tx", "rx";
- status = "disabled";
- };
-
- spi13: spi@a94000 {
- compatible = "qcom,geni-spi";
- reg = <0 0x00a94000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP1_S5_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_spi13_default>;
- interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>;
- interconnect-names = "qup-core", "qup-config";
- dmas = <&gpi_dma1 0 5 QCOM_GPI_SPI>,
- <&gpi_dma1 1 5 QCOM_GPI_SPI>;
- dma-names = "tx", "rx";
- status = "disabled";
- };
-
- uart13: serial@a94000 {
- compatible = "qcom,geni-uart";
- reg = <0 0x00a94000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP1_S5_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_uart13_default>;
- interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
- power-domains = <&rpmhpd SDM845_CX>;
- operating-points-v2 = <&qup_opp_table>;
- interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>;
- interconnect-names = "qup-core", "qup-config";
- status = "disabled";
- };
-
- i2c14: i2c@a98000 {
- compatible = "qcom,geni-i2c";
- reg = <0 0x00a98000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP1_S6_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_i2c14_default>;
- interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- power-domains = <&rpmhpd SDM845_CX>;
- operating-points-v2 = <&qup_opp_table>;
- interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>,
- <&aggre2_noc MASTER_QUP_2 0 &mem_noc SLAVE_EBI1 0>;
- interconnect-names = "qup-core", "qup-config", "qup-memory";
- dmas = <&gpi_dma1 0 6 QCOM_GPI_I2C>,
- <&gpi_dma1 1 6 QCOM_GPI_I2C>;
- dma-names = "tx", "rx";
- status = "disabled";
- };
-
- spi14: spi@a98000 {
- compatible = "qcom,geni-spi";
- reg = <0 0x00a98000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP1_S6_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_spi14_default>;
- interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>;
- interconnect-names = "qup-core", "qup-config";
- dmas = <&gpi_dma1 0 6 QCOM_GPI_SPI>,
- <&gpi_dma1 1 6 QCOM_GPI_SPI>;
- dma-names = "tx", "rx";
- status = "disabled";
- };
-
- uart14: serial@a98000 {
- compatible = "qcom,geni-uart";
- reg = <0 0x00a98000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP1_S6_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_uart14_default>;
- interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
- power-domains = <&rpmhpd SDM845_CX>;
- operating-points-v2 = <&qup_opp_table>;
- interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>;
- interconnect-names = "qup-core", "qup-config";
- status = "disabled";
- };
-
- i2c15: i2c@a9c000 {
- compatible = "qcom,geni-i2c";
- reg = <0 0x00a9c000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP1_S7_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_i2c15_default>;
- interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- power-domains = <&rpmhpd SDM845_CX>;
- operating-points-v2 = <&qup_opp_table>;
- status = "disabled";
- interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>,
- <&aggre2_noc MASTER_QUP_2 0 &mem_noc SLAVE_EBI1 0>;
- interconnect-names = "qup-core", "qup-config", "qup-memory";
- dmas = <&gpi_dma1 0 7 QCOM_GPI_I2C>,
- <&gpi_dma1 1 7 QCOM_GPI_I2C>;
- dma-names = "tx", "rx";
- };
-
- spi15: spi@a9c000 {
- compatible = "qcom,geni-spi";
- reg = <0 0x00a9c000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP1_S7_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_spi15_default>;
- interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>;
- interconnect-names = "qup-core", "qup-config";
- dmas = <&gpi_dma1 0 7 QCOM_GPI_SPI>,
- <&gpi_dma1 1 7 QCOM_GPI_SPI>;
- dma-names = "tx", "rx";
- status = "disabled";
- };
-
- uart15: serial@a9c000 {
- compatible = "qcom,geni-uart";
- reg = <0 0x00a9c000 0 0x4000>;
- clock-names = "se";
- clocks = <&gcc GCC_QUPV3_WRAP1_S7_CLK>;
- pinctrl-names = "default";
- pinctrl-0 = <&qup_uart15_default>;
- interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
- power-domains = <&rpmhpd SDM845_CX>;
- operating-points-v2 = <&qup_opp_table>;
- interconnects = <&aggre2_noc MASTER_QUP_2 0 &config_noc SLAVE_BLSP_2 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_BLSP_2 0>;
- interconnect-names = "qup-core", "qup-config";
- status = "disabled";
- };
- };
-
- llcc: system-cache-controller@1100000 {
- compatible = "qcom,sdm845-llcc";
- reg = <0 0x01100000 0 0x45000>, <0 0x01180000 0 0x50000>,
- <0 0x01200000 0 0x50000>, <0 0x01280000 0 0x50000>,
- <0 0x01300000 0 0x50000>;
- reg-names = "llcc0_base", "llcc1_base", "llcc2_base",
- "llcc3_base", "llcc_broadcast_base";
- interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>;
- };
-
- dma@10a2000 {
- compatible = "qcom,sdm845-dcc", "qcom,dcc";
- reg = <0x0 0x010a2000 0x0 0x1000>,
- <0x0 0x010ae000 0x0 0x2000>;
- };
-
- pmu@114a000 {
- compatible = "qcom,sdm845-llcc-bwmon";
- reg = <0 0x0114a000 0 0x1000>;
- interrupts = <GIC_SPI 580 IRQ_TYPE_LEVEL_HIGH>;
- interconnects = <&mem_noc MASTER_LLCC 3 &mem_noc SLAVE_EBI1 3>;
-
- operating-points-v2 = <&llcc_bwmon_opp_table>;
-
- llcc_bwmon_opp_table: opp-table {
- compatible = "operating-points-v2";
-
- /*
- * The interconnect path bandwidth taken from
- * cpu4_opp_table bandwidth for gladiator_noc-mem_noc
- * interconnect. This also matches the
- * bandwidth table of qcom,llccbw (qcom,bw-tbl,
- * bus width: 4 bytes) from msm-4.9 downstream
- * kernel.
- */
- opp-0 {
- opp-peak-kBps = <800000>;
- };
- opp-1 {
- opp-peak-kBps = <1804000>;
- };
- opp-2 {
- opp-peak-kBps = <3072000>;
- };
- opp-3 {
- opp-peak-kBps = <5412000>;
- };
- opp-4 {
- opp-peak-kBps = <7216000>;
- };
- };
- };
-
- pmu@1436400 {
- compatible = "qcom,sdm845-cpu-bwmon", "qcom,sdm845-bwmon";
- reg = <0 0x01436400 0 0x600>;
- interrupts = <GIC_SPI 581 IRQ_TYPE_LEVEL_HIGH>;
- interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_LLCC 3>;
-
- operating-points-v2 = <&cpu_bwmon_opp_table>;
-
- cpu_bwmon_opp_table: opp-table {
- compatible = "operating-points-v2";
-
- /*
- * The interconnect path bandwidth taken from
- * cpu4_opp_table bandwidth for OSM L3
- * interconnect. This also matches the OSM L3
- * from bandwidth table of qcom,cpu4-l3lat-mon
- * (qcom,core-dev-table, bus width: 16 bytes)
- * from msm-4.9 downstream kernel.
- */
- opp-0 {
- opp-peak-kBps = <4800000>;
- };
- opp-1 {
- opp-peak-kBps = <9216000>;
- };
- opp-2 {
- opp-peak-kBps = <15052800>;
- };
- opp-3 {
- opp-peak-kBps = <20889600>;
- };
- opp-4 {
- opp-peak-kBps = <25497600>;
- };
- };
- };
-
- pcie0: pci@1c00000 {
- compatible = "qcom,pcie-sdm845";
- reg = <0 0x01c00000 0 0x2000>,
- <0 0x60000000 0 0xf1d>,
- <0 0x60000f20 0 0xa8>,
- <0 0x60100000 0 0x100000>,
- <0 0x01c07000 0 0x1000>;
- reg-names = "parf", "dbi", "elbi", "config", "mhi";
- device_type = "pci";
- linux,pci-domain = <0>;
- bus-range = <0x00 0xff>;
- num-lanes = <1>;
-
- #address-cells = <3>;
- #size-cells = <2>;
-
- ranges = <0x01000000 0x0 0x00000000 0x0 0x60200000 0x0 0x100000>,
- <0x02000000 0x0 0x60300000 0x0 0x60300000 0x0 0xd00000>;
-
- interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "msi";
- #interrupt-cells = <1>;
- interrupt-map-mask = <0 0 0 0x7>;
- interrupt-map = <0 0 0 1 &intc 0 0 0 149 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
- <0 0 0 2 &intc 0 0 0 150 IRQ_TYPE_LEVEL_HIGH>, /* int_b */
- <0 0 0 3 &intc 0 0 0 151 IRQ_TYPE_LEVEL_HIGH>, /* int_c */
- <0 0 0 4 &intc 0 0 0 152 IRQ_TYPE_LEVEL_HIGH>; /* int_d */
-
- clocks = <&gcc GCC_PCIE_0_PIPE_CLK>,
- <&gcc GCC_PCIE_0_AUX_CLK>,
- <&gcc GCC_PCIE_0_CFG_AHB_CLK>,
- <&gcc GCC_PCIE_0_MSTR_AXI_CLK>,
- <&gcc GCC_PCIE_0_SLV_AXI_CLK>,
- <&gcc GCC_PCIE_0_SLV_Q2A_AXI_CLK>,
- <&gcc GCC_AGGRE_NOC_PCIE_TBU_CLK>;
- clock-names = "pipe",
- "aux",
- "cfg",
- "bus_master",
- "bus_slave",
- "slave_q2a",
- "tbu";
-
- iommu-map = <0x0 &apps_smmu 0x1c10 0x1>,
- <0x100 &apps_smmu 0x1c11 0x1>,
- <0x200 &apps_smmu 0x1c12 0x1>,
- <0x300 &apps_smmu 0x1c13 0x1>,
- <0x400 &apps_smmu 0x1c14 0x1>,
- <0x500 &apps_smmu 0x1c15 0x1>,
- <0x600 &apps_smmu 0x1c16 0x1>,
- <0x700 &apps_smmu 0x1c17 0x1>,
- <0x800 &apps_smmu 0x1c18 0x1>,
- <0x900 &apps_smmu 0x1c19 0x1>,
- <0xa00 &apps_smmu 0x1c1a 0x1>,
- <0xb00 &apps_smmu 0x1c1b 0x1>,
- <0xc00 &apps_smmu 0x1c1c 0x1>,
- <0xd00 &apps_smmu 0x1c1d 0x1>,
- <0xe00 &apps_smmu 0x1c1e 0x1>,
- <0xf00 &apps_smmu 0x1c1f 0x1>;
-
- resets = <&gcc GCC_PCIE_0_BCR>;
- reset-names = "pci";
-
- power-domains = <&gcc PCIE_0_GDSC>;
-
- phys = <&pcie0_phy>;
- phy-names = "pciephy";
-
- status = "disabled";
- };
-
- pcie0_phy: phy@1c06000 {
- compatible = "qcom,sdm845-qmp-pcie-phy";
- reg = <0 0x01c06000 0 0x1000>;
- clocks = <&gcc GCC_PCIE_PHY_AUX_CLK>,
- <&gcc GCC_PCIE_0_CFG_AHB_CLK>,
- <&gcc GCC_PCIE_0_CLKREF_CLK>,
- <&gcc GCC_PCIE_PHY_REFGEN_CLK>,
- <&gcc GCC_PCIE_0_PIPE_CLK>;
- clock-names = "aux",
- "cfg_ahb",
- "ref",
- "refgen",
- "pipe";
-
- clock-output-names = "pcie_0_pipe_clk";
- #clock-cells = <0>;
-
- #phy-cells = <0>;
-
- resets = <&gcc GCC_PCIE_0_PHY_BCR>;
- reset-names = "phy";
-
- assigned-clocks = <&gcc GCC_PCIE_PHY_REFGEN_CLK>;
- assigned-clock-rates = <100000000>;
-
- status = "disabled";
- };
-
- pcie1: pci@1c08000 {
- compatible = "qcom,pcie-sdm845";
- reg = <0 0x01c08000 0 0x2000>,
- <0 0x40000000 0 0xf1d>,
- <0 0x40000f20 0 0xa8>,
- <0 0x40100000 0 0x100000>,
- <0 0x01c0c000 0 0x1000>;
- reg-names = "parf", "dbi", "elbi", "config", "mhi";
- device_type = "pci";
- linux,pci-domain = <1>;
- bus-range = <0x00 0xff>;
- num-lanes = <1>;
-
- #address-cells = <3>;
- #size-cells = <2>;
-
- ranges = <0x01000000 0x0 0x00000000 0x0 0x40200000 0x0 0x100000>,
- <0x02000000 0x0 0x40300000 0x0 0x40300000 0x0 0x1fd00000>;
-
- interrupts = <GIC_SPI 307 IRQ_TYPE_EDGE_RISING>;
- interrupt-names = "msi";
- #interrupt-cells = <1>;
- interrupt-map-mask = <0 0 0 0x7>;
- interrupt-map = <0 0 0 1 &intc 0 0 0 434 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
- <0 0 0 2 &intc 0 0 0 435 IRQ_TYPE_LEVEL_HIGH>, /* int_b */
- <0 0 0 3 &intc 0 0 0 438 IRQ_TYPE_LEVEL_HIGH>, /* int_c */
- <0 0 0 4 &intc 0 0 0 439 IRQ_TYPE_LEVEL_HIGH>; /* int_d */
-
- clocks = <&gcc GCC_PCIE_1_PIPE_CLK>,
- <&gcc GCC_PCIE_1_AUX_CLK>,
- <&gcc GCC_PCIE_1_CFG_AHB_CLK>,
- <&gcc GCC_PCIE_1_MSTR_AXI_CLK>,
- <&gcc GCC_PCIE_1_SLV_AXI_CLK>,
- <&gcc GCC_PCIE_1_SLV_Q2A_AXI_CLK>,
- <&gcc GCC_PCIE_1_CLKREF_CLK>,
- <&gcc GCC_AGGRE_NOC_PCIE_TBU_CLK>;
- clock-names = "pipe",
- "aux",
- "cfg",
- "bus_master",
- "bus_slave",
- "slave_q2a",
- "ref",
- "tbu";
-
- assigned-clocks = <&gcc GCC_PCIE_1_AUX_CLK>;
- assigned-clock-rates = <19200000>;
-
- iommu-map = <0x0 &apps_smmu 0x1c00 0x1>,
- <0x100 &apps_smmu 0x1c01 0x1>,
- <0x200 &apps_smmu 0x1c02 0x1>,
- <0x300 &apps_smmu 0x1c03 0x1>,
- <0x400 &apps_smmu 0x1c04 0x1>,
- <0x500 &apps_smmu 0x1c05 0x1>,
- <0x600 &apps_smmu 0x1c06 0x1>,
- <0x700 &apps_smmu 0x1c07 0x1>,
- <0x800 &apps_smmu 0x1c08 0x1>,
- <0x900 &apps_smmu 0x1c09 0x1>,
- <0xa00 &apps_smmu 0x1c0a 0x1>,
- <0xb00 &apps_smmu 0x1c0b 0x1>,
- <0xc00 &apps_smmu 0x1c0c 0x1>,
- <0xd00 &apps_smmu 0x1c0d 0x1>,
- <0xe00 &apps_smmu 0x1c0e 0x1>,
- <0xf00 &apps_smmu 0x1c0f 0x1>;
-
- resets = <&gcc GCC_PCIE_1_BCR>;
- reset-names = "pci";
-
- power-domains = <&gcc PCIE_1_GDSC>;
-
- phys = <&pcie1_phy>;
- phy-names = "pciephy";
-
- status = "disabled";
- };
-
- pcie1_phy: phy@1c0a000 {
- compatible = "qcom,sdm845-qhp-pcie-phy";
- reg = <0 0x01c0a000 0 0x2000>;
- clocks = <&gcc GCC_PCIE_PHY_AUX_CLK>,
- <&gcc GCC_PCIE_1_CFG_AHB_CLK>,
- <&gcc GCC_PCIE_1_CLKREF_CLK>,
- <&gcc GCC_PCIE_PHY_REFGEN_CLK>,
- <&gcc GCC_PCIE_1_PIPE_CLK>;
- clock-names = "aux",
- "cfg_ahb",
- "ref",
- "refgen",
- "pipe";
-
- clock-output-names = "pcie_1_pipe_clk";
- #clock-cells = <0>;
-
- #phy-cells = <0>;
-
- resets = <&gcc GCC_PCIE_1_PHY_BCR>;
- reset-names = "phy";
-
- assigned-clocks = <&gcc GCC_PCIE_PHY_REFGEN_CLK>;
- assigned-clock-rates = <100000000>;
-
- status = "disabled";
- };
-
- mem_noc: interconnect@1380000 {
- compatible = "qcom,sdm845-mem-noc";
- reg = <0 0x01380000 0 0x27200>;
- #interconnect-cells = <2>;
- qcom,bcm-voters = <&apps_bcm_voter>;
- };
-
- dc_noc: interconnect@14e0000 {
- compatible = "qcom,sdm845-dc-noc";
- reg = <0 0x014e0000 0 0x400>;
- #interconnect-cells = <2>;
- qcom,bcm-voters = <&apps_bcm_voter>;
- };
-
- config_noc: interconnect@1500000 {
- compatible = "qcom,sdm845-config-noc";
- reg = <0 0x01500000 0 0x5080>;
- #interconnect-cells = <2>;
- qcom,bcm-voters = <&apps_bcm_voter>;
- };
-
- system_noc: interconnect@1620000 {
- compatible = "qcom,sdm845-system-noc";
- reg = <0 0x01620000 0 0x18080>;
- #interconnect-cells = <2>;
- qcom,bcm-voters = <&apps_bcm_voter>;
- };
-
- aggre1_noc: interconnect@16e0000 {
- compatible = "qcom,sdm845-aggre1-noc";
- reg = <0 0x016e0000 0 0x15080>;
- #interconnect-cells = <2>;
- qcom,bcm-voters = <&apps_bcm_voter>;
- };
-
- aggre2_noc: interconnect@1700000 {
- compatible = "qcom,sdm845-aggre2-noc";
- reg = <0 0x01700000 0 0x1f300>;
- #interconnect-cells = <2>;
- qcom,bcm-voters = <&apps_bcm_voter>;
- };
-
- mmss_noc: interconnect@1740000 {
- compatible = "qcom,sdm845-mmss-noc";
- reg = <0 0x01740000 0 0x1c100>;
- #interconnect-cells = <2>;
- qcom,bcm-voters = <&apps_bcm_voter>;
- };
-
- ufs_mem_hc: ufshc@1d84000 {
- compatible = "qcom,sdm845-ufshc", "qcom,ufshc",
- "jedec,ufs-2.0";
- reg = <0 0x01d84000 0 0x2500>,
- <0 0x01d90000 0 0x8000>;
- reg-names = "std", "ice";
- interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
- phys = <&ufs_mem_phy_lanes>;
- phy-names = "ufsphy";
- lanes-per-direction = <2>;
- power-domains = <&gcc UFS_PHY_GDSC>;
- #reset-cells = <1>;
- resets = <&gcc GCC_UFS_PHY_BCR>;
- reset-names = "rst";
-
- iommus = <&apps_smmu 0x100 0xf>;
-
- clock-names =
- "core_clk",
- "bus_aggr_clk",
- "iface_clk",
- "core_clk_unipro",
- "ref_clk",
- "tx_lane0_sync_clk",
- "rx_lane0_sync_clk",
- "rx_lane1_sync_clk",
- "ice_core_clk";
- clocks =
- <&gcc GCC_UFS_PHY_AXI_CLK>,
- <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>,
- <&gcc GCC_UFS_PHY_AHB_CLK>,
- <&gcc GCC_UFS_PHY_UNIPRO_CORE_CLK>,
- <&rpmhcc RPMH_CXO_CLK>,
- <&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>,
- <&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>,
- <&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>,
- <&gcc GCC_UFS_PHY_ICE_CORE_CLK>;
- freq-table-hz =
- <50000000 200000000>,
- <0 0>,
- <0 0>,
- <37500000 150000000>,
- <0 0>,
- <0 0>,
- <0 0>,
- <0 0>,
- <75000000 300000000>;
-
- interconnects = <&aggre1_noc MASTER_UFS_MEM 0 &mem_noc SLAVE_EBI1 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_UFS_MEM_CFG 0>;
- interconnect-names = "ufs-ddr", "cpu-ufs";
-
- status = "disabled";
- };
-
- ufs_mem_phy: phy@1d87000 {
- compatible = "qcom,sdm845-qmp-ufs-phy";
- reg = <0 0x01d87000 0 0x18c>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
- clock-names = "ref",
- "ref_aux";
- clocks = <&gcc GCC_UFS_MEM_CLKREF_CLK>,
- <&gcc GCC_UFS_PHY_PHY_AUX_CLK>;
-
- resets = <&ufs_mem_hc 0>;
- reset-names = "ufsphy";
- status = "disabled";
-
- ufs_mem_phy_lanes: phy@1d87400 {
- reg = <0 0x01d87400 0 0x108>,
- <0 0x01d87600 0 0x1e0>,
- <0 0x01d87c00 0 0x1dc>,
- <0 0x01d87800 0 0x108>,
- <0 0x01d87a00 0 0x1e0>;
- #phy-cells = <0>;
- };
- };
-
- cryptobam: dma-controller@1dc4000 {
- compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0";
- reg = <0 0x01dc4000 0 0x24000>;
- interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&rpmhcc RPMH_CE_CLK>;
- clock-names = "bam_clk";
- #dma-cells = <1>;
- qcom,ee = <0>;
- qcom,controlled-remotely;
- iommus = <&apps_smmu 0x704 0x1>,
- <&apps_smmu 0x706 0x1>,
- <&apps_smmu 0x714 0x1>,
- <&apps_smmu 0x716 0x1>;
- };
-
- crypto: crypto@1dfa000 {
- compatible = "qcom,crypto-v5.4";
- reg = <0 0x01dfa000 0 0x6000>;
- clocks = <&gcc GCC_CE1_AHB_CLK>,
- <&gcc GCC_CE1_AXI_CLK>,
- <&rpmhcc RPMH_CE_CLK>;
- clock-names = "iface", "bus", "core";
- dmas = <&cryptobam 6>, <&cryptobam 7>;
- dma-names = "rx", "tx";
- iommus = <&apps_smmu 0x704 0x1>,
- <&apps_smmu 0x706 0x1>,
- <&apps_smmu 0x714 0x1>,
- <&apps_smmu 0x716 0x1>;
- };
-
- ipa: ipa@1e40000 {
- compatible = "qcom,sdm845-ipa";
-
- iommus = <&apps_smmu 0x720 0x0>,
- <&apps_smmu 0x722 0x0>;
- reg = <0 0x01e40000 0 0x7000>,
- <0 0x01e47000 0 0x2000>,
- <0 0x01e04000 0 0x2c000>;
- reg-names = "ipa-reg",
- "ipa-shared",
- "gsi";
-
- interrupts-extended = <&intc GIC_SPI 311 IRQ_TYPE_EDGE_RISING>,
- <&intc GIC_SPI 432 IRQ_TYPE_LEVEL_HIGH>,
- <&ipa_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
- <&ipa_smp2p_in 1 IRQ_TYPE_EDGE_RISING>;
- interrupt-names = "ipa",
- "gsi",
- "ipa-clock-query",
- "ipa-setup-ready";
-
- clocks = <&rpmhcc RPMH_IPA_CLK>;
- clock-names = "core";
-
- interconnects = <&aggre2_noc MASTER_IPA 0 &mem_noc SLAVE_EBI1 0>,
- <&aggre2_noc MASTER_IPA 0 &system_noc SLAVE_IMEM 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_IPA_CFG 0>;
- interconnect-names = "memory",
- "imem",
- "config";
-
- qcom,smem-states = <&ipa_smp2p_out 0>,
- <&ipa_smp2p_out 1>;
- qcom,smem-state-names = "ipa-clock-enabled-valid",
- "ipa-clock-enabled";
-
- status = "disabled";
- };
-
- tcsr_mutex: hwlock@1f40000 {
- compatible = "qcom,tcsr-mutex";
- reg = <0 0x01f40000 0 0x20000>;
- #hwlock-cells = <1>;
- };
-
- tcsr_regs_1: syscon@1f60000 {
- compatible = "qcom,sdm845-tcsr", "syscon";
- reg = <0 0x01f60000 0 0x20000>;
- };
-
- tlmm: pinctrl@3400000 {
- compatible = "qcom,sdm845-pinctrl";
- reg = <0 0x03400000 0 0xc00000>;
- interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- gpio-ranges = <&tlmm 0 0 151>;
- wakeup-parent = <&pdc_intc>;
-
- cci0_default: cci0-default-state {
- /* SDA, SCL */
- pins = "gpio17", "gpio18";
- function = "cci_i2c";
-
- bias-pull-up;
- drive-strength = <2>; /* 2 mA */
- };
-
- cci0_sleep: cci0-sleep-state {
- /* SDA, SCL */
- pins = "gpio17", "gpio18";
- function = "cci_i2c";
-
- drive-strength = <2>; /* 2 mA */
- bias-pull-down;
- };
-
- cci1_default: cci1-default-state {
- /* SDA, SCL */
- pins = "gpio19", "gpio20";
- function = "cci_i2c";
-
- bias-pull-up;
- drive-strength = <2>; /* 2 mA */
- };
-
- cci1_sleep: cci1-sleep-state {
- /* SDA, SCL */
- pins = "gpio19", "gpio20";
- function = "cci_i2c";
-
- drive-strength = <2>; /* 2 mA */
- bias-pull-down;
- };
-
- qspi_clk: qspi-clk-state {
- pins = "gpio95";
- function = "qspi_clk";
- };
-
- qspi_cs0: qspi-cs0-state {
- pins = "gpio90";
- function = "qspi_cs";
- };
-
- qspi_cs1: qspi-cs1-state {
- pins = "gpio89";
- function = "qspi_cs";
- };
-
- qspi_data0: qspi-data0-state {
- pins = "gpio91";
- function = "qspi_data";
- };
-
- qspi_data1: qspi-data1-state {
- pins = "gpio92";
- function = "qspi_data";
- };
-
- qspi_data23: qspi-data23-state {
- pins = "gpio93", "gpio94";
- function = "qspi_data";
- };
-
- qup_i2c0_default: qup-i2c0-default-state {
- pins = "gpio0", "gpio1";
- function = "qup0";
- };
-
- qup_i2c1_default: qup-i2c1-default-state {
- pins = "gpio17", "gpio18";
- function = "qup1";
- };
-
- qup_i2c2_default: qup-i2c2-default-state {
- pins = "gpio27", "gpio28";
- function = "qup2";
- };
-
- qup_i2c3_default: qup-i2c3-default-state {
- pins = "gpio41", "gpio42";
- function = "qup3";
- };
-
- qup_i2c4_default: qup-i2c4-default-state {
- pins = "gpio89", "gpio90";
- function = "qup4";
- };
-
- qup_i2c5_default: qup-i2c5-default-state {
- pins = "gpio85", "gpio86";
- function = "qup5";
- };
-
- qup_i2c6_default: qup-i2c6-default-state {
- pins = "gpio45", "gpio46";
- function = "qup6";
- };
-
- qup_i2c7_default: qup-i2c7-default-state {
- pins = "gpio93", "gpio94";
- function = "qup7";
- };
-
- qup_i2c8_default: qup-i2c8-default-state {
- pins = "gpio65", "gpio66";
- function = "qup8";
- };
-
- qup_i2c9_default: qup-i2c9-default-state {
- pins = "gpio6", "gpio7";
- function = "qup9";
- };
-
- qup_i2c10_default: qup-i2c10-default-state {
- pins = "gpio55", "gpio56";
- function = "qup10";
- };
-
- qup_i2c11_default: qup-i2c11-default-state {
- pins = "gpio31", "gpio32";
- function = "qup11";
- };
-
- qup_i2c12_default: qup-i2c12-default-state {
- pins = "gpio49", "gpio50";
- function = "qup12";
- };
-
- qup_i2c13_default: qup-i2c13-default-state {
- pins = "gpio105", "gpio106";
- function = "qup13";
- };
-
- qup_i2c14_default: qup-i2c14-default-state {
- pins = "gpio33", "gpio34";
- function = "qup14";
- };
-
- qup_i2c15_default: qup-i2c15-default-state {
- pins = "gpio81", "gpio82";
- function = "qup15";
- };
-
- qup_spi0_default: qup-spi0-default-state {
- pins = "gpio0", "gpio1", "gpio2", "gpio3";
- function = "qup0";
- };
-
- qup_spi1_default: qup-spi1-default-state {
- pins = "gpio17", "gpio18", "gpio19", "gpio20";
- function = "qup1";
- };
-
- qup_spi2_default: qup-spi2-default-state {
- pins = "gpio27", "gpio28", "gpio29", "gpio30";
- function = "qup2";
- };
-
- qup_spi3_default: qup-spi3-default-state {
- pins = "gpio41", "gpio42", "gpio43", "gpio44";
- function = "qup3";
- };
-
- qup_spi4_default: qup-spi4-default-state {
- pins = "gpio89", "gpio90", "gpio91", "gpio92";
- function = "qup4";
- };
-
- qup_spi5_default: qup-spi5-default-state {
- pins = "gpio85", "gpio86", "gpio87", "gpio88";
- function = "qup5";
- };
-
- qup_spi6_default: qup-spi6-default-state {
- pins = "gpio45", "gpio46", "gpio47", "gpio48";
- function = "qup6";
- };
-
- qup_spi7_default: qup-spi7-default-state {
- pins = "gpio93", "gpio94", "gpio95", "gpio96";
- function = "qup7";
- };
-
- qup_spi8_default: qup-spi8-default-state {
- pins = "gpio65", "gpio66", "gpio67", "gpio68";
- function = "qup8";
- };
-
- qup_spi9_default: qup-spi9-default-state {
- pins = "gpio6", "gpio7", "gpio4", "gpio5";
- function = "qup9";
- };
-
- qup_spi10_default: qup-spi10-default-state {
- pins = "gpio55", "gpio56", "gpio53", "gpio54";
- function = "qup10";
- };
-
- qup_spi11_default: qup-spi11-default-state {
- pins = "gpio31", "gpio32", "gpio33", "gpio34";
- function = "qup11";
- };
-
- qup_spi12_default: qup-spi12-default-state {
- pins = "gpio49", "gpio50", "gpio51", "gpio52";
- function = "qup12";
- };
-
- qup_spi13_default: qup-spi13-default-state {
- pins = "gpio105", "gpio106", "gpio107", "gpio108";
- function = "qup13";
- };
-
- qup_spi14_default: qup-spi14-default-state {
- pins = "gpio33", "gpio34", "gpio31", "gpio32";
- function = "qup14";
- };
-
- qup_spi15_default: qup-spi15-default-state {
- pins = "gpio81", "gpio82", "gpio83", "gpio84";
- function = "qup15";
- };
-
- qup_uart0_default: qup-uart0-default-state {
- qup_uart0_tx: tx-pins {
- pins = "gpio2";
- function = "qup0";
- };
-
- qup_uart0_rx: rx-pins {
- pins = "gpio3";
- function = "qup0";
- };
- };
-
- qup_uart1_default: qup-uart1-default-state {
- qup_uart1_tx: tx-pins {
- pins = "gpio19";
- function = "qup1";
- };
-
- qup_uart1_rx: rx-pins {
- pins = "gpio20";
- function = "qup1";
- };
- };
-
- qup_uart2_default: qup-uart2-default-state {
- qup_uart2_tx: tx-pins {
- pins = "gpio29";
- function = "qup2";
- };
-
- qup_uart2_rx: rx-pins {
- pins = "gpio30";
- function = "qup2";
- };
- };
-
- qup_uart3_default: qup-uart3-default-state {
- qup_uart3_tx: tx-pins {
- pins = "gpio43";
- function = "qup3";
- };
-
- qup_uart3_rx: rx-pins {
- pins = "gpio44";
- function = "qup3";
- };
- };
-
- qup_uart3_4pin: qup-uart3-4pin-state {
- qup_uart3_4pin_cts: cts-pins {
- pins = "gpio41";
- function = "qup3";
- };
-
- qup_uart3_4pin_rts_tx: rts-tx-pins {
- pins = "gpio42", "gpio43";
- function = "qup3";
- };
-
- qup_uart3_4pin_rx: rx-pins {
- pins = "gpio44";
- function = "qup3";
- };
- };
-
- qup_uart4_default: qup-uart4-default-state {
- qup_uart4_tx: tx-pins {
- pins = "gpio91";
- function = "qup4";
- };
-
- qup_uart4_rx: rx-pins {
- pins = "gpio92";
- function = "qup4";
- };
- };
-
- qup_uart5_default: qup-uart5-default-state {
- qup_uart5_tx: tx-pins {
- pins = "gpio87";
- function = "qup5";
- };
-
- qup_uart5_rx: rx-pins {
- pins = "gpio88";
- function = "qup5";
- };
- };
-
- qup_uart6_default: qup-uart6-default-state {
- qup_uart6_tx: tx-pins {
- pins = "gpio47";
- function = "qup6";
- };
-
- qup_uart6_rx: rx-pins {
- pins = "gpio48";
- function = "qup6";
- };
- };
-
- qup_uart6_4pin: qup-uart6-4pin-state {
- qup_uart6_4pin_cts: cts-pins {
- pins = "gpio45";
- function = "qup6";
- bias-pull-down;
- };
-
- qup_uart6_4pin_rts_tx: rts-tx-pins {
- pins = "gpio46", "gpio47";
- function = "qup6";
- drive-strength = <2>;
- bias-disable;
- };
-
- qup_uart6_4pin_rx: rx-pins {
- pins = "gpio48";
- function = "qup6";
- bias-pull-up;
- };
- };
-
- qup_uart7_default: qup-uart7-default-state {
- qup_uart7_tx: tx-pins {
- pins = "gpio95";
- function = "qup7";
- };
-
- qup_uart7_rx: rx-pins {
- pins = "gpio96";
- function = "qup7";
- };
- };
-
- qup_uart8_default: qup-uart8-default-state {
- qup_uart8_tx: tx-pins {
- pins = "gpio67";
- function = "qup8";
- };
-
- qup_uart8_rx: rx-pins {
- pins = "gpio68";
- function = "qup8";
- };
- };
-
- qup_uart9_default: qup-uart9-default-state {
- qup_uart9_tx: tx-pins {
- pins = "gpio4";
- function = "qup9";
- };
-
- qup_uart9_rx: rx-pins {
- pins = "gpio5";
- function = "qup9";
- };
- };
-
- qup_uart10_default: qup-uart10-default-state {
- qup_uart10_tx: tx-pins {
- pins = "gpio53";
- function = "qup10";
- };
-
- qup_uart10_rx: rx-pins {
- pins = "gpio54";
- function = "qup10";
- };
- };
-
- qup_uart11_default: qup-uart11-default-state {
- qup_uart11_tx: tx-pins {
- pins = "gpio33";
- function = "qup11";
- };
-
- qup_uart11_rx: rx-pins {
- pins = "gpio34";
- function = "qup11";
- };
- };
-
- qup_uart12_default: qup-uart12-default-state {
- qup_uart12_tx: tx-pins {
- pins = "gpio51";
- function = "qup0";
- };
-
- qup_uart12_rx: rx-pins {
- pins = "gpio52";
- function = "qup0";
- };
- };
-
- qup_uart13_default: qup-uart13-default-state {
- qup_uart13_tx: tx-pins {
- pins = "gpio107";
- function = "qup13";
- };
-
- qup_uart13_rx: rx-pins {
- pins = "gpio108";
- function = "qup13";
- };
- };
-
- qup_uart14_default: qup-uart14-default-state {
- qup_uart14_tx: tx-pins {
- pins = "gpio31";
- function = "qup14";
- };
-
- qup_uart14_rx: rx-pins {
- pins = "gpio32";
- function = "qup14";
- };
- };
-
- qup_uart15_default: qup-uart15-default-state {
- qup_uart15_tx: tx-pins {
- pins = "gpio83";
- function = "qup15";
- };
-
- qup_uart15_rx: rx-pins {
- pins = "gpio84";
- function = "qup15";
- };
- };
-
- quat_mi2s_sleep: quat-mi2s-sleep-state {
- pins = "gpio58", "gpio59";
- function = "gpio";
- drive-strength = <2>;
- bias-pull-down;
- };
-
- quat_mi2s_active: quat-mi2s-active-state {
- pins = "gpio58", "gpio59";
- function = "qua_mi2s";
- drive-strength = <8>;
- bias-disable;
- output-high;
- };
-
- quat_mi2s_sd0_sleep: quat-mi2s-sd0-sleep-state {
- pins = "gpio60";
- function = "gpio";
- drive-strength = <2>;
- bias-pull-down;
- };
-
- quat_mi2s_sd0_active: quat-mi2s-sd0-active-state {
- pins = "gpio60";
- function = "qua_mi2s";
- drive-strength = <8>;
- bias-disable;
- };
-
- quat_mi2s_sd1_sleep: quat-mi2s-sd1-sleep-state {
- pins = "gpio61";
- function = "gpio";
- drive-strength = <2>;
- bias-pull-down;
- };
-
- quat_mi2s_sd1_active: quat-mi2s-sd1-active-state {
- pins = "gpio61";
- function = "qua_mi2s";
- drive-strength = <8>;
- bias-disable;
- };
-
- quat_mi2s_sd2_sleep: quat-mi2s-sd2-sleep-state {
- pins = "gpio62";
- function = "gpio";
- drive-strength = <2>;
- bias-pull-down;
- };
-
- quat_mi2s_sd2_active: quat-mi2s-sd2-active-state {
- pins = "gpio62";
- function = "qua_mi2s";
- drive-strength = <8>;
- bias-disable;
- };
-
- quat_mi2s_sd3_sleep: quat-mi2s-sd3-sleep-state {
- pins = "gpio63";
- function = "gpio";
- drive-strength = <2>;
- bias-pull-down;
- };
-
- quat_mi2s_sd3_active: quat-mi2s-sd3-active-state {
- pins = "gpio63";
- function = "qua_mi2s";
- drive-strength = <8>;
- bias-disable;
- };
- };
-
- mss_pil: remoteproc@4080000 {
- compatible = "qcom,sdm845-mss-pil";
- reg = <0 0x04080000 0 0x408>, <0 0x04180000 0 0x48>;
- reg-names = "qdsp6", "rmb";
-
- interrupts-extended =
- <&intc GIC_SPI 266 IRQ_TYPE_EDGE_RISING>,
- <&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
- <&modem_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
- <&modem_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
- <&modem_smp2p_in 3 IRQ_TYPE_EDGE_RISING>,
- <&modem_smp2p_in 7 IRQ_TYPE_EDGE_RISING>;
- interrupt-names = "wdog", "fatal", "ready",
- "handover", "stop-ack",
- "shutdown-ack";
-
- clocks = <&gcc GCC_MSS_CFG_AHB_CLK>,
- <&gcc GCC_MSS_Q6_MEMNOC_AXI_CLK>,
- <&gcc GCC_BOOT_ROM_AHB_CLK>,
- <&gcc GCC_MSS_GPLL0_DIV_CLK_SRC>,
- <&gcc GCC_MSS_SNOC_AXI_CLK>,
- <&gcc GCC_MSS_MFAB_AXIS_CLK>,
- <&gcc GCC_PRNG_AHB_CLK>,
- <&rpmhcc RPMH_CXO_CLK>;
- clock-names = "iface", "bus", "mem", "gpll0_mss",
- "snoc_axi", "mnoc_axi", "prng", "xo";
-
- qcom,qmp = <&aoss_qmp>;
-
- qcom,smem-states = <&modem_smp2p_out 0>;
- qcom,smem-state-names = "stop";
-
- resets = <&aoss_reset AOSS_CC_MSS_RESTART>,
- <&pdc_reset PDC_MODEM_SYNC_RESET>;
- reset-names = "mss_restart", "pdc_reset";
-
- qcom,halt-regs = <&tcsr_regs_1 0x3000 0x5000 0x4000>;
-
- power-domains = <&rpmhpd SDM845_CX>,
- <&rpmhpd SDM845_MX>,
- <&rpmhpd SDM845_MSS>;
- power-domain-names = "cx", "mx", "mss";
-
- status = "disabled";
-
- mba {
- memory-region = <&mba_region>;
- };
-
- mpss {
- memory-region = <&mpss_region>;
- };
-
- metadata {
- memory-region = <&mdata_mem>;
- };
-
- glink-edge {
- interrupts = <GIC_SPI 449 IRQ_TYPE_EDGE_RISING>;
- label = "modem";
- qcom,remote-pid = <1>;
- mboxes = <&apss_shared 12>;
- };
- };
-
- gpucc: clock-controller@5090000 {
- compatible = "qcom,sdm845-gpucc";
- reg = <0 0x05090000 0 0x9000>;
- #clock-cells = <1>;
- #reset-cells = <1>;
- #power-domain-cells = <1>;
- clocks = <&rpmhcc RPMH_CXO_CLK>,
- <&gcc GCC_GPU_GPLL0_CLK_SRC>,
- <&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>;
- clock-names = "bi_tcxo",
- "gcc_gpu_gpll0_clk_src",
- "gcc_gpu_gpll0_div_clk_src";
- };
-
- slpi_pas: remoteproc@5c00000 {
- compatible = "qcom,sdm845-slpi-pas";
- reg = <0 0x5c00000 0 0x4000>;
-
- interrupts-extended = <&intc GIC_SPI 494 IRQ_TYPE_EDGE_RISING>,
- <&slpi_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
- <&slpi_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
- <&slpi_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
- <&slpi_smp2p_in 3 IRQ_TYPE_EDGE_RISING>;
- interrupt-names = "wdog", "fatal", "ready",
- "handover", "stop-ack";
-
- clocks = <&rpmhcc RPMH_CXO_CLK>;
- clock-names = "xo";
-
- qcom,qmp = <&aoss_qmp>;
-
- power-domains = <&rpmhpd SDM845_CX>,
- <&rpmhpd SDM845_MX>;
- power-domain-names = "lcx", "lmx";
-
- memory-region = <&slpi_mem>;
-
- qcom,smem-states = <&slpi_smp2p_out 0>;
- qcom,smem-state-names = "stop";
-
- status = "disabled";
-
- glink-edge {
- interrupts = <GIC_SPI 170 IRQ_TYPE_EDGE_RISING>;
- label = "dsps";
- qcom,remote-pid = <3>;
- mboxes = <&apss_shared 24>;
-
- fastrpc {
- compatible = "qcom,fastrpc";
- qcom,glink-channels = "fastrpcglink-apps-dsp";
- label = "sdsp";
- qcom,non-secure-domain;
- qcom,vmids = <QCOM_SCM_VMID_HLOS QCOM_SCM_VMID_MSS_MSA
- QCOM_SCM_VMID_SSC_Q6 QCOM_SCM_VMID_ADSP_Q6>;
- memory-region = <&fastrpc_mem>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- compute-cb@0 {
- compatible = "qcom,fastrpc-compute-cb";
- reg = <0>;
- };
- };
- };
- };
-
- stm@6002000 {
- compatible = "arm,coresight-stm", "arm,primecell";
- reg = <0 0x06002000 0 0x1000>,
- <0 0x16280000 0 0x180000>;
- reg-names = "stm-base", "stm-stimulus-base";
-
- clocks = <&aoss_qmp>;
- clock-names = "apb_pclk";
-
- out-ports {
- port {
- stm_out: endpoint {
- remote-endpoint =
- <&funnel0_in7>;
- };
- };
- };
- };
-
- funnel@6041000 {
- compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
- reg = <0 0x06041000 0 0x1000>;
-
- clocks = <&aoss_qmp>;
- clock-names = "apb_pclk";
-
- out-ports {
- port {
- funnel0_out: endpoint {
- remote-endpoint =
- <&merge_funnel_in0>;
- };
- };
- };
-
- in-ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@7 {
- reg = <7>;
- funnel0_in7: endpoint {
- remote-endpoint = <&stm_out>;
- };
- };
- };
- };
-
- funnel@6043000 {
- compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
- reg = <0 0x06043000 0 0x1000>;
-
- clocks = <&aoss_qmp>;
- clock-names = "apb_pclk";
-
- out-ports {
- port {
- funnel2_out: endpoint {
- remote-endpoint =
- <&merge_funnel_in2>;
- };
- };
- };
-
- in-ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@5 {
- reg = <5>;
- funnel2_in5: endpoint {
- remote-endpoint =
- <&apss_merge_funnel_out>;
- };
- };
- };
- };
-
- funnel@6045000 {
- compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
- reg = <0 0x06045000 0 0x1000>;
-
- clocks = <&aoss_qmp>;
- clock-names = "apb_pclk";
-
- out-ports {
- port {
- merge_funnel_out: endpoint {
- remote-endpoint = <&etf_in>;
- };
- };
- };
-
- in-ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
- merge_funnel_in0: endpoint {
- remote-endpoint =
- <&funnel0_out>;
- };
- };
-
- port@2 {
- reg = <2>;
- merge_funnel_in2: endpoint {
- remote-endpoint =
- <&funnel2_out>;
- };
- };
- };
- };
-
- replicator@6046000 {
- compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
- reg = <0 0x06046000 0 0x1000>;
-
- clocks = <&aoss_qmp>;
- clock-names = "apb_pclk";
-
- out-ports {
- port {
- replicator_out: endpoint {
- remote-endpoint = <&etr_in>;
- };
- };
- };
-
- in-ports {
- port {
- replicator_in: endpoint {
- remote-endpoint = <&etf_out>;
- };
- };
- };
- };
-
- etf@6047000 {
- compatible = "arm,coresight-tmc", "arm,primecell";
- reg = <0 0x06047000 0 0x1000>;
-
- clocks = <&aoss_qmp>;
- clock-names = "apb_pclk";
-
- out-ports {
- port {
- etf_out: endpoint {
- remote-endpoint =
- <&replicator_in>;
- };
- };
- };
-
- in-ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@1 {
- reg = <1>;
- etf_in: endpoint {
- remote-endpoint =
- <&merge_funnel_out>;
- };
- };
- };
- };
-
- etr@6048000 {
- compatible = "arm,coresight-tmc", "arm,primecell";
- reg = <0 0x06048000 0 0x1000>;
-
- clocks = <&aoss_qmp>;
- clock-names = "apb_pclk";
- arm,scatter-gather;
-
- in-ports {
- port {
- etr_in: endpoint {
- remote-endpoint =
- <&replicator_out>;
- };
- };
- };
- };
-
- etm@7040000 {
- compatible = "arm,coresight-etm4x", "arm,primecell";
- reg = <0 0x07040000 0 0x1000>;
-
- cpu = <&CPU0>;
-
- clocks = <&aoss_qmp>;
- clock-names = "apb_pclk";
- arm,coresight-loses-context-with-cpu;
-
- out-ports {
- port {
- etm0_out: endpoint {
- remote-endpoint =
- <&apss_funnel_in0>;
- };
- };
- };
- };
-
- etm@7140000 {
- compatible = "arm,coresight-etm4x", "arm,primecell";
- reg = <0 0x07140000 0 0x1000>;
-
- cpu = <&CPU1>;
-
- clocks = <&aoss_qmp>;
- clock-names = "apb_pclk";
- arm,coresight-loses-context-with-cpu;
-
- out-ports {
- port {
- etm1_out: endpoint {
- remote-endpoint =
- <&apss_funnel_in1>;
- };
- };
- };
- };
-
- etm@7240000 {
- compatible = "arm,coresight-etm4x", "arm,primecell";
- reg = <0 0x07240000 0 0x1000>;
-
- cpu = <&CPU2>;
-
- clocks = <&aoss_qmp>;
- clock-names = "apb_pclk";
- arm,coresight-loses-context-with-cpu;
-
- out-ports {
- port {
- etm2_out: endpoint {
- remote-endpoint =
- <&apss_funnel_in2>;
- };
- };
- };
- };
-
- etm@7340000 {
- compatible = "arm,coresight-etm4x", "arm,primecell";
- reg = <0 0x07340000 0 0x1000>;
-
- cpu = <&CPU3>;
-
- clocks = <&aoss_qmp>;
- clock-names = "apb_pclk";
- arm,coresight-loses-context-with-cpu;
-
- out-ports {
- port {
- etm3_out: endpoint {
- remote-endpoint =
- <&apss_funnel_in3>;
- };
- };
- };
- };
-
- etm@7440000 {
- compatible = "arm,coresight-etm4x", "arm,primecell";
- reg = <0 0x07440000 0 0x1000>;
-
- cpu = <&CPU4>;
-
- clocks = <&aoss_qmp>;
- clock-names = "apb_pclk";
- arm,coresight-loses-context-with-cpu;
-
- out-ports {
- port {
- etm4_out: endpoint {
- remote-endpoint =
- <&apss_funnel_in4>;
- };
- };
- };
- };
-
- etm@7540000 {
- compatible = "arm,coresight-etm4x", "arm,primecell";
- reg = <0 0x07540000 0 0x1000>;
-
- cpu = <&CPU5>;
-
- clocks = <&aoss_qmp>;
- clock-names = "apb_pclk";
- arm,coresight-loses-context-with-cpu;
-
- out-ports {
- port {
- etm5_out: endpoint {
- remote-endpoint =
- <&apss_funnel_in5>;
- };
- };
- };
- };
-
- etm@7640000 {
- compatible = "arm,coresight-etm4x", "arm,primecell";
- reg = <0 0x07640000 0 0x1000>;
-
- cpu = <&CPU6>;
-
- clocks = <&aoss_qmp>;
- clock-names = "apb_pclk";
- arm,coresight-loses-context-with-cpu;
-
- out-ports {
- port {
- etm6_out: endpoint {
- remote-endpoint =
- <&apss_funnel_in6>;
- };
- };
- };
- };
-
- etm@7740000 {
- compatible = "arm,coresight-etm4x", "arm,primecell";
- reg = <0 0x07740000 0 0x1000>;
-
- cpu = <&CPU7>;
-
- clocks = <&aoss_qmp>;
- clock-names = "apb_pclk";
- arm,coresight-loses-context-with-cpu;
-
- out-ports {
- port {
- etm7_out: endpoint {
- remote-endpoint =
- <&apss_funnel_in7>;
- };
- };
- };
- };
-
- funnel@7800000 { /* APSS Funnel */
- compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
- reg = <0 0x07800000 0 0x1000>;
-
- clocks = <&aoss_qmp>;
- clock-names = "apb_pclk";
-
- out-ports {
- port {
- apss_funnel_out: endpoint {
- remote-endpoint =
- <&apss_merge_funnel_in>;
- };
- };
- };
-
- in-ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
- apss_funnel_in0: endpoint {
- remote-endpoint =
- <&etm0_out>;
- };
- };
-
- port@1 {
- reg = <1>;
- apss_funnel_in1: endpoint {
- remote-endpoint =
- <&etm1_out>;
- };
- };
-
- port@2 {
- reg = <2>;
- apss_funnel_in2: endpoint {
- remote-endpoint =
- <&etm2_out>;
- };
- };
-
- port@3 {
- reg = <3>;
- apss_funnel_in3: endpoint {
- remote-endpoint =
- <&etm3_out>;
- };
- };
-
- port@4 {
- reg = <4>;
- apss_funnel_in4: endpoint {
- remote-endpoint =
- <&etm4_out>;
- };
- };
-
- port@5 {
- reg = <5>;
- apss_funnel_in5: endpoint {
- remote-endpoint =
- <&etm5_out>;
- };
- };
-
- port@6 {
- reg = <6>;
- apss_funnel_in6: endpoint {
- remote-endpoint =
- <&etm6_out>;
- };
- };
-
- port@7 {
- reg = <7>;
- apss_funnel_in7: endpoint {
- remote-endpoint =
- <&etm7_out>;
- };
- };
- };
- };
-
- funnel@7810000 {
- compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
- reg = <0 0x07810000 0 0x1000>;
-
- clocks = <&aoss_qmp>;
- clock-names = "apb_pclk";
-
- out-ports {
- port {
- apss_merge_funnel_out: endpoint {
- remote-endpoint =
- <&funnel2_in5>;
- };
- };
- };
-
- in-ports {
- port {
- apss_merge_funnel_in: endpoint {
- remote-endpoint =
- <&apss_funnel_out>;
- };
- };
- };
- };
-
- sdhc_2: mmc@8804000 {
- compatible = "qcom,sdm845-sdhci", "qcom,sdhci-msm-v5";
- reg = <0 0x08804000 0 0x1000>;
-
- interrupts = <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "hc_irq", "pwr_irq";
-
- clocks = <&gcc GCC_SDCC2_AHB_CLK>,
- <&gcc GCC_SDCC2_APPS_CLK>,
- <&rpmhcc RPMH_CXO_CLK>;
- clock-names = "iface", "core", "xo";
- iommus = <&apps_smmu 0xa0 0xf>;
- power-domains = <&rpmhpd SDM845_CX>;
- operating-points-v2 = <&sdhc2_opp_table>;
-
- status = "disabled";
-
- sdhc2_opp_table: opp-table {
- compatible = "operating-points-v2";
-
- opp-9600000 {
- opp-hz = /bits/ 64 <9600000>;
- required-opps = <&rpmhpd_opp_min_svs>;
- };
-
- opp-19200000 {
- opp-hz = /bits/ 64 <19200000>;
- required-opps = <&rpmhpd_opp_low_svs>;
- };
-
- opp-100000000 {
- opp-hz = /bits/ 64 <100000000>;
- required-opps = <&rpmhpd_opp_svs>;
- };
-
- opp-201500000 {
- opp-hz = /bits/ 64 <201500000>;
- required-opps = <&rpmhpd_opp_svs_l1>;
- };
- };
- };
-
- qspi: spi@88df000 {
- compatible = "qcom,sdm845-qspi", "qcom,qspi-v1";
- reg = <0 0x088df000 0 0x600>;
- iommus = <&apps_smmu 0x160 0x0>;
- #address-cells = <1>;
- #size-cells = <0>;
- interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&gcc GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
- <&gcc GCC_QSPI_CORE_CLK>;
- clock-names = "iface", "core";
- power-domains = <&rpmhpd SDM845_CX>;
- operating-points-v2 = <&qspi_opp_table>;
- status = "disabled";
- };
-
- slim: slim-ngd@171c0000 {
- compatible = "qcom,slim-ngd-v2.1.0";
- reg = <0 0x171c0000 0 0x2c000>;
- interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
-
- dmas = <&slimbam 3>, <&slimbam 4>;
- dma-names = "rx", "tx";
-
- iommus = <&apps_smmu 0x1806 0x0>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- lmh_cluster1: lmh@17d70800 {
- compatible = "qcom,sdm845-lmh";
- reg = <0 0x17d70800 0 0x400>;
- interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
- cpus = <&CPU4>;
- qcom,lmh-temp-arm-millicelsius = <65000>;
- qcom,lmh-temp-low-millicelsius = <94500>;
- qcom,lmh-temp-high-millicelsius = <95000>;
- interrupt-controller;
- #interrupt-cells = <1>;
- };
-
- lmh_cluster0: lmh@17d78800 {
- compatible = "qcom,sdm845-lmh";
- reg = <0 0x17d78800 0 0x400>;
- interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
- cpus = <&CPU0>;
- qcom,lmh-temp-arm-millicelsius = <65000>;
- qcom,lmh-temp-low-millicelsius = <94500>;
- qcom,lmh-temp-high-millicelsius = <95000>;
- interrupt-controller;
- #interrupt-cells = <1>;
- };
-
- usb_1_hsphy: phy@88e2000 {
- compatible = "qcom,sdm845-qusb2-phy", "qcom,qusb2-v2-phy";
- reg = <0 0x088e2000 0 0x400>;
- status = "disabled";
- #phy-cells = <0>;
-
- clocks = <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
- <&rpmhcc RPMH_CXO_CLK>;
- clock-names = "cfg_ahb", "ref";
-
- resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>;
-
- nvmem-cells = <&qusb2p_hstx_trim>;
- };
-
- usb_2_hsphy: phy@88e3000 {
- compatible = "qcom,sdm845-qusb2-phy", "qcom,qusb2-v2-phy";
- reg = <0 0x088e3000 0 0x400>;
- status = "disabled";
- #phy-cells = <0>;
-
- clocks = <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
- <&rpmhcc RPMH_CXO_CLK>;
- clock-names = "cfg_ahb", "ref";
-
- resets = <&gcc GCC_QUSB2PHY_SEC_BCR>;
-
- nvmem-cells = <&qusb2s_hstx_trim>;
- };
-
- usb_1_qmpphy: phy@88e8000 {
- compatible = "qcom,sdm845-qmp-usb3-dp-phy";
- reg = <0 0x088e8000 0 0x3000>;
- status = "disabled";
-
- clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>,
- <&gcc GCC_USB3_PRIM_CLKREF_CLK>,
- <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>,
- <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>,
- <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>;
- clock-names = "aux",
- "ref",
- "com_aux",
- "usb3_pipe",
- "cfg_ahb";
-
- resets = <&gcc GCC_USB3_PHY_PRIM_BCR>,
- <&gcc GCC_USB3_DP_PHY_PRIM_BCR>;
- reset-names = "phy", "common";
-
- #clock-cells = <1>;
- #phy-cells = <1>;
- };
-
- usb_2_qmpphy: phy@88eb000 {
- compatible = "qcom,sdm845-qmp-usb3-uni-phy";
- reg = <0 0x088eb000 0 0x18c>;
- status = "disabled";
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- clocks = <&gcc GCC_USB3_SEC_PHY_AUX_CLK>,
- <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
- <&gcc GCC_USB3_SEC_CLKREF_CLK>,
- <&gcc GCC_USB3_SEC_PHY_COM_AUX_CLK>;
- clock-names = "aux", "cfg_ahb", "ref", "com_aux";
-
- resets = <&gcc GCC_USB3PHY_PHY_SEC_BCR>,
- <&gcc GCC_USB3_PHY_SEC_BCR>;
- reset-names = "phy", "common";
-
- usb_2_ssphy: phy@88eb200 {
- reg = <0 0x088eb200 0 0x128>,
- <0 0x088eb400 0 0x1fc>,
- <0 0x088eb800 0 0x218>,
- <0 0x088eb600 0 0x70>;
- #clock-cells = <0>;
- #phy-cells = <0>;
- clocks = <&gcc GCC_USB3_SEC_PHY_PIPE_CLK>;
- clock-names = "pipe0";
- clock-output-names = "usb3_uni_phy_pipe_clk_src";
- };
- };
-
- usb_1: usb@a6f8800 {
- compatible = "qcom,sdm845-dwc3", "qcom,dwc3";
- reg = <0 0x0a6f8800 0 0x400>;
- status = "disabled";
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
- dma-ranges;
-
- clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>,
- <&gcc GCC_USB30_PRIM_MASTER_CLK>,
- <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>,
- <&gcc GCC_USB30_PRIM_SLEEP_CLK>,
- <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>;
- clock-names = "cfg_noc",
- "core",
- "iface",
- "sleep",
- "mock_utmi";
-
- assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>,
- <&gcc GCC_USB30_PRIM_MASTER_CLK>;
- assigned-clock-rates = <19200000>, <150000000>;
-
- interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 486 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 488 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 489 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "hs_phy_irq", "ss_phy_irq",
- "dm_hs_phy_irq", "dp_hs_phy_irq";
-
- power-domains = <&gcc USB30_PRIM_GDSC>;
-
- resets = <&gcc GCC_USB30_PRIM_BCR>;
-
- interconnects = <&aggre2_noc MASTER_USB3_0 0 &mem_noc SLAVE_EBI1 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_USB3_0 0>;
- interconnect-names = "usb-ddr", "apps-usb";
-
- usb_1_dwc3: usb@a600000 {
- compatible = "snps,dwc3";
- reg = <0 0x0a600000 0 0xcd00>;
- interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
- iommus = <&apps_smmu 0x740 0>;
- snps,dis_u2_susphy_quirk;
- snps,dis_enblslpm_quirk;
- phys = <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>;
- phy-names = "usb2-phy", "usb3-phy";
- };
- };
-
- usb_2: usb@a8f8800 {
- compatible = "qcom,sdm845-dwc3", "qcom,dwc3";
- reg = <0 0x0a8f8800 0 0x400>;
- status = "disabled";
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
- dma-ranges;
-
- clocks = <&gcc GCC_CFG_NOC_USB3_SEC_AXI_CLK>,
- <&gcc GCC_USB30_SEC_MASTER_CLK>,
- <&gcc GCC_AGGRE_USB3_SEC_AXI_CLK>,
- <&gcc GCC_USB30_SEC_SLEEP_CLK>,
- <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>;
- clock-names = "cfg_noc",
- "core",
- "iface",
- "sleep",
- "mock_utmi";
-
- assigned-clocks = <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>,
- <&gcc GCC_USB30_SEC_MASTER_CLK>;
- assigned-clock-rates = <19200000>, <150000000>;
-
- interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 487 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 490 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 491 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "hs_phy_irq", "ss_phy_irq",
- "dm_hs_phy_irq", "dp_hs_phy_irq";
-
- power-domains = <&gcc USB30_SEC_GDSC>;
-
- resets = <&gcc GCC_USB30_SEC_BCR>;
-
- interconnects = <&aggre2_noc MASTER_USB3_1 0 &mem_noc SLAVE_EBI1 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_USB3_1 0>;
- interconnect-names = "usb-ddr", "apps-usb";
-
- usb_2_dwc3: usb@a800000 {
- compatible = "snps,dwc3";
- reg = <0 0x0a800000 0 0xcd00>;
- interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
- iommus = <&apps_smmu 0x760 0>;
- snps,dis_u2_susphy_quirk;
- snps,dis_enblslpm_quirk;
- phys = <&usb_2_hsphy>, <&usb_2_ssphy>;
- phy-names = "usb2-phy", "usb3-phy";
- };
- };
-
- venus: video-codec@aa00000 {
- compatible = "qcom,sdm845-venus-v2";
- reg = <0 0x0aa00000 0 0xff000>;
- interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
- power-domains = <&videocc VENUS_GDSC>,
- <&videocc VCODEC0_GDSC>,
- <&videocc VCODEC1_GDSC>,
- <&rpmhpd SDM845_CX>;
- power-domain-names = "venus", "vcodec0", "vcodec1", "cx";
- operating-points-v2 = <&venus_opp_table>;
- clocks = <&videocc VIDEO_CC_VENUS_CTL_CORE_CLK>,
- <&videocc VIDEO_CC_VENUS_AHB_CLK>,
- <&videocc VIDEO_CC_VENUS_CTL_AXI_CLK>,
- <&videocc VIDEO_CC_VCODEC0_CORE_CLK>,
- <&videocc VIDEO_CC_VCODEC0_AXI_CLK>,
- <&videocc VIDEO_CC_VCODEC1_CORE_CLK>,
- <&videocc VIDEO_CC_VCODEC1_AXI_CLK>;
- clock-names = "core", "iface", "bus",
- "vcodec0_core", "vcodec0_bus",
- "vcodec1_core", "vcodec1_bus";
- iommus = <&apps_smmu 0x10a0 0x8>,
- <&apps_smmu 0x10b0 0x0>;
- memory-region = <&venus_mem>;
- interconnects = <&mmss_noc MASTER_VIDEO_P0 0 &mem_noc SLAVE_EBI1 0>,
- <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_VENUS_CFG 0>;
- interconnect-names = "video-mem", "cpu-cfg";
-
- status = "disabled";
-
- video-core0 {
- compatible = "venus-decoder";
- };
-
- video-core1 {
- compatible = "venus-encoder";
- };
-
- venus_opp_table: opp-table {
- compatible = "operating-points-v2";
-
- opp-100000000 {
- opp-hz = /bits/ 64 <100000000>;
- required-opps = <&rpmhpd_opp_min_svs>;
- };
-
- opp-200000000 {
- opp-hz = /bits/ 64 <200000000>;
- required-opps = <&rpmhpd_opp_low_svs>;
- };
-
- opp-320000000 {
- opp-hz = /bits/ 64 <320000000>;
- required-opps = <&rpmhpd_opp_svs>;
- };
-
- opp-380000000 {
- opp-hz = /bits/ 64 <380000000>;
- required-opps = <&rpmhpd_opp_svs_l1>;
- };
-
- opp-444000000 {
- opp-hz = /bits/ 64 <444000000>;
- required-opps = <&rpmhpd_opp_nom>;
- };
-
- opp-533000097 {
- opp-hz = /bits/ 64 <533000097>;
- required-opps = <&rpmhpd_opp_turbo>;
- };
- };
- };
-
- videocc: clock-controller@ab00000 {
- compatible = "qcom,sdm845-videocc";
- reg = <0 0x0ab00000 0 0x10000>;
- clocks = <&rpmhcc RPMH_CXO_CLK>;
- clock-names = "bi_tcxo";
- #clock-cells = <1>;
- #power-domain-cells = <1>;
- #reset-cells = <1>;
- };
-
- camss: camss@acb3000 {
- compatible = "qcom,sdm845-camss";
-
- reg = <0 0x0acb3000 0 0x1000>,
- <0 0x0acba000 0 0x1000>,
- <0 0x0acc8000 0 0x1000>,
- <0 0x0ac65000 0 0x1000>,
- <0 0x0ac66000 0 0x1000>,
- <0 0x0ac67000 0 0x1000>,
- <0 0x0ac68000 0 0x1000>,
- <0 0x0acaf000 0 0x4000>,
- <0 0x0acb6000 0 0x4000>,
- <0 0x0acc4000 0 0x4000>;
- reg-names = "csid0",
- "csid1",
- "csid2",
- "csiphy0",
- "csiphy1",
- "csiphy2",
- "csiphy3",
- "vfe0",
- "vfe1",
- "vfe_lite";
-
- interrupts = <GIC_SPI 464 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 478 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 479 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 448 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "csid0",
- "csid1",
- "csid2",
- "csiphy0",
- "csiphy1",
- "csiphy2",
- "csiphy3",
- "vfe0",
- "vfe1",
- "vfe_lite";
-
- power-domains = <&clock_camcc IFE_0_GDSC>,
- <&clock_camcc IFE_1_GDSC>,
- <&clock_camcc TITAN_TOP_GDSC>;
-
- clocks = <&clock_camcc CAM_CC_CAMNOC_AXI_CLK>,
- <&clock_camcc CAM_CC_CPAS_AHB_CLK>,
- <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>,
- <&clock_camcc CAM_CC_IFE_0_CSID_CLK>,
- <&clock_camcc CAM_CC_IFE_0_CSID_CLK_SRC>,
- <&clock_camcc CAM_CC_IFE_1_CSID_CLK>,
- <&clock_camcc CAM_CC_IFE_1_CSID_CLK_SRC>,
- <&clock_camcc CAM_CC_IFE_LITE_CSID_CLK>,
- <&clock_camcc CAM_CC_IFE_LITE_CSID_CLK_SRC>,
- <&clock_camcc CAM_CC_CSIPHY0_CLK>,
- <&clock_camcc CAM_CC_CSI0PHYTIMER_CLK>,
- <&clock_camcc CAM_CC_CSI0PHYTIMER_CLK_SRC>,
- <&clock_camcc CAM_CC_CSIPHY1_CLK>,
- <&clock_camcc CAM_CC_CSI1PHYTIMER_CLK>,
- <&clock_camcc CAM_CC_CSI1PHYTIMER_CLK_SRC>,
- <&clock_camcc CAM_CC_CSIPHY2_CLK>,
- <&clock_camcc CAM_CC_CSI2PHYTIMER_CLK>,
- <&clock_camcc CAM_CC_CSI2PHYTIMER_CLK_SRC>,
- <&clock_camcc CAM_CC_CSIPHY3_CLK>,
- <&clock_camcc CAM_CC_CSI3PHYTIMER_CLK>,
- <&clock_camcc CAM_CC_CSI3PHYTIMER_CLK_SRC>,
- <&gcc GCC_CAMERA_AHB_CLK>,
- <&gcc GCC_CAMERA_AXI_CLK>,
- <&clock_camcc CAM_CC_SLOW_AHB_CLK_SRC>,
- <&clock_camcc CAM_CC_SOC_AHB_CLK>,
- <&clock_camcc CAM_CC_IFE_0_AXI_CLK>,
- <&clock_camcc CAM_CC_IFE_0_CLK>,
- <&clock_camcc CAM_CC_IFE_0_CPHY_RX_CLK>,
- <&clock_camcc CAM_CC_IFE_0_CLK_SRC>,
- <&clock_camcc CAM_CC_IFE_1_AXI_CLK>,
- <&clock_camcc CAM_CC_IFE_1_CLK>,
- <&clock_camcc CAM_CC_IFE_1_CPHY_RX_CLK>,
- <&clock_camcc CAM_CC_IFE_1_CLK_SRC>,
- <&clock_camcc CAM_CC_IFE_LITE_CLK>,
- <&clock_camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>,
- <&clock_camcc CAM_CC_IFE_LITE_CLK_SRC>;
- clock-names = "camnoc_axi",
- "cpas_ahb",
- "cphy_rx_src",
- "csi0",
- "csi0_src",
- "csi1",
- "csi1_src",
- "csi2",
- "csi2_src",
- "csiphy0",
- "csiphy0_timer",
- "csiphy0_timer_src",
- "csiphy1",
- "csiphy1_timer",
- "csiphy1_timer_src",
- "csiphy2",
- "csiphy2_timer",
- "csiphy2_timer_src",
- "csiphy3",
- "csiphy3_timer",
- "csiphy3_timer_src",
- "gcc_camera_ahb",
- "gcc_camera_axi",
- "slow_ahb_src",
- "soc_ahb",
- "vfe0_axi",
- "vfe0",
- "vfe0_cphy_rx",
- "vfe0_src",
- "vfe1_axi",
- "vfe1",
- "vfe1_cphy_rx",
- "vfe1_src",
- "vfe_lite",
- "vfe_lite_cphy_rx",
- "vfe_lite_src";
-
- iommus = <&apps_smmu 0x0808 0x0>,
- <&apps_smmu 0x0810 0x8>,
- <&apps_smmu 0x0c08 0x0>,
- <&apps_smmu 0x0c10 0x8>;
-
- status = "disabled";
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
- };
-
- port@1 {
- reg = <1>;
- };
-
- port@2 {
- reg = <2>;
- };
-
- port@3 {
- reg = <3>;
- };
- };
- };
-
- cci: cci@ac4a000 {
- compatible = "qcom,sdm845-cci", "qcom,msm8996-cci";
- #address-cells = <1>;
- #size-cells = <0>;
-
- reg = <0 0x0ac4a000 0 0x4000>;
- interrupts = <GIC_SPI 460 IRQ_TYPE_EDGE_RISING>;
- power-domains = <&clock_camcc TITAN_TOP_GDSC>;
-
- clocks = <&clock_camcc CAM_CC_CAMNOC_AXI_CLK>,
- <&clock_camcc CAM_CC_SOC_AHB_CLK>,
- <&clock_camcc CAM_CC_SLOW_AHB_CLK_SRC>,
- <&clock_camcc CAM_CC_CPAS_AHB_CLK>,
- <&clock_camcc CAM_CC_CCI_CLK>,
- <&clock_camcc CAM_CC_CCI_CLK_SRC>;
- clock-names = "camnoc_axi",
- "soc_ahb",
- "slow_ahb_src",
- "cpas_ahb",
- "cci",
- "cci_src";
-
- assigned-clocks = <&clock_camcc CAM_CC_CAMNOC_AXI_CLK>,
- <&clock_camcc CAM_CC_CCI_CLK>;
- assigned-clock-rates = <80000000>, <37500000>;
-
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&cci0_default &cci1_default>;
- pinctrl-1 = <&cci0_sleep &cci1_sleep>;
-
- status = "disabled";
-
- cci_i2c0: i2c-bus@0 {
- reg = <0>;
- clock-frequency = <1000000>;
- #address-cells = <1>;
- #size-cells = <0>;
- };
-
- cci_i2c1: i2c-bus@1 {
- reg = <1>;
- clock-frequency = <1000000>;
- #address-cells = <1>;
- #size-cells = <0>;
- };
- };
-
- clock_camcc: clock-controller@ad00000 {
- compatible = "qcom,sdm845-camcc";
- reg = <0 0x0ad00000 0 0x10000>;
- #clock-cells = <1>;
- #reset-cells = <1>;
- #power-domain-cells = <1>;
- clocks = <&rpmhcc RPMH_CXO_CLK>;
- clock-names = "bi_tcxo";
- };
-
- mdss: display-subsystem@ae00000 {
- compatible = "qcom,sdm845-mdss";
- reg = <0 0x0ae00000 0 0x1000>;
- reg-names = "mdss";
-
- power-domains = <&dispcc MDSS_GDSC>;
-
- clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
- <&dispcc DISP_CC_MDSS_MDP_CLK>;
- clock-names = "iface", "core";
-
- interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-controller;
- #interrupt-cells = <1>;
-
- interconnects = <&mmss_noc MASTER_MDP0 0 &mem_noc SLAVE_EBI1 0>,
- <&mmss_noc MASTER_MDP1 0 &mem_noc SLAVE_EBI1 0>;
- interconnect-names = "mdp0-mem", "mdp1-mem";
-
- iommus = <&apps_smmu 0x880 0x8>,
- <&apps_smmu 0xc80 0x8>;
-
- status = "disabled";
-
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- mdss_mdp: display-controller@ae01000 {
- compatible = "qcom,sdm845-dpu";
- reg = <0 0x0ae01000 0 0x8f000>,
- <0 0x0aeb0000 0 0x2008>;
- reg-names = "mdp", "vbif";
-
- clocks = <&gcc GCC_DISP_AXI_CLK>,
- <&dispcc DISP_CC_MDSS_AHB_CLK>,
- <&dispcc DISP_CC_MDSS_AXI_CLK>,
- <&dispcc DISP_CC_MDSS_MDP_CLK>,
- <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
- clock-names = "gcc-bus", "iface", "bus", "core", "vsync";
-
- assigned-clocks = <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
- assigned-clock-rates = <19200000>;
- operating-points-v2 = <&mdp_opp_table>;
- power-domains = <&rpmhpd SDM845_CX>;
-
- interrupt-parent = <&mdss>;
- interrupts = <0>;
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
- dpu_intf0_out: endpoint {
- remote-endpoint = <&dp_in>;
- };
- };
-
- port@1 {
- reg = <1>;
- dpu_intf1_out: endpoint {
- remote-endpoint = <&mdss_dsi0_in>;
- };
- };
-
- port@2 {
- reg = <2>;
- dpu_intf2_out: endpoint {
- remote-endpoint = <&mdss_dsi1_in>;
- };
- };
- };
-
- mdp_opp_table: opp-table {
- compatible = "operating-points-v2";
-
- opp-19200000 {
- opp-hz = /bits/ 64 <19200000>;
- required-opps = <&rpmhpd_opp_min_svs>;
- };
-
- opp-171428571 {
- opp-hz = /bits/ 64 <171428571>;
- required-opps = <&rpmhpd_opp_low_svs>;
- };
-
- opp-344000000 {
- opp-hz = /bits/ 64 <344000000>;
- required-opps = <&rpmhpd_opp_svs_l1>;
- };
-
- opp-430000000 {
- opp-hz = /bits/ 64 <430000000>;
- required-opps = <&rpmhpd_opp_nom>;
- };
- };
- };
-
- mdss_dp: displayport-controller@ae90000 {
- status = "disabled";
- compatible = "qcom,sdm845-dp";
-
- reg = <0 0x0ae90000 0 0x200>,
- <0 0x0ae90200 0 0x200>,
- <0 0x0ae90400 0 0x600>,
- <0 0x0ae90a00 0 0x600>,
- <0 0x0ae91000 0 0x600>;
-
- interrupt-parent = <&mdss>;
- interrupts = <12>;
-
- clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
- <&dispcc DISP_CC_MDSS_DP_AUX_CLK>,
- <&dispcc DISP_CC_MDSS_DP_LINK_CLK>,
- <&dispcc DISP_CC_MDSS_DP_LINK_INTF_CLK>,
- <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK>;
- clock-names = "core_iface", "core_aux", "ctrl_link",
- "ctrl_link_iface", "stream_pixel";
- assigned-clocks = <&dispcc DISP_CC_MDSS_DP_LINK_CLK_SRC>,
- <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>;
- assigned-clock-parents = <&usb_1_qmpphy QMP_USB43DP_DP_LINK_CLK>,
- <&usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>;
- phys = <&usb_1_qmpphy QMP_USB43DP_DP_PHY>;
- phy-names = "dp";
-
- operating-points-v2 = <&dp_opp_table>;
- power-domains = <&rpmhpd SDM845_CX>;
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
- port@0 {
- reg = <0>;
- dp_in: endpoint {
- remote-endpoint = <&dpu_intf0_out>;
- };
- };
-
- port@1 {
- reg = <1>;
- dp_out: endpoint { };
- };
- };
-
- dp_opp_table: opp-table {
- compatible = "operating-points-v2";
-
- opp-162000000 {
- opp-hz = /bits/ 64 <162000000>;
- required-opps = <&rpmhpd_opp_low_svs>;
- };
-
- opp-270000000 {
- opp-hz = /bits/ 64 <270000000>;
- required-opps = <&rpmhpd_opp_svs>;
- };
-
- opp-540000000 {
- opp-hz = /bits/ 64 <540000000>;
- required-opps = <&rpmhpd_opp_svs_l1>;
- };
-
- opp-810000000 {
- opp-hz = /bits/ 64 <810000000>;
- required-opps = <&rpmhpd_opp_nom>;
- };
- };
- };
-
- mdss_dsi0: dsi@ae94000 {
- compatible = "qcom,sdm845-dsi-ctrl",
- "qcom,mdss-dsi-ctrl";
- reg = <0 0x0ae94000 0 0x400>;
- reg-names = "dsi_ctrl";
-
- interrupt-parent = <&mdss>;
- interrupts = <4>;
-
- clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>,
- <&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>,
- <&dispcc DISP_CC_MDSS_PCLK0_CLK>,
- <&dispcc DISP_CC_MDSS_ESC0_CLK>,
- <&dispcc DISP_CC_MDSS_AHB_CLK>,
- <&dispcc DISP_CC_MDSS_AXI_CLK>;
- clock-names = "byte",
- "byte_intf",
- "pixel",
- "core",
- "iface",
- "bus";
- assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>, <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>;
- assigned-clock-parents = <&mdss_dsi0_phy 0>, <&mdss_dsi0_phy 1>;
-
- operating-points-v2 = <&dsi_opp_table>;
- power-domains = <&rpmhpd SDM845_CX>;
-
- phys = <&mdss_dsi0_phy>;
-
- status = "disabled";
-
- #address-cells = <1>;
- #size-cells = <0>;
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
- mdss_dsi0_in: endpoint {
- remote-endpoint = <&dpu_intf1_out>;
- };
- };
-
- port@1 {
- reg = <1>;
- mdss_dsi0_out: endpoint {
- };
- };
- };
- };
-
- mdss_dsi0_phy: phy@ae94400 {
- compatible = "qcom,dsi-phy-10nm";
- reg = <0 0x0ae94400 0 0x200>,
- <0 0x0ae94600 0 0x280>,
- <0 0x0ae94a00 0 0x1e0>;
- reg-names = "dsi_phy",
- "dsi_phy_lane",
- "dsi_pll";
-
- #clock-cells = <1>;
- #phy-cells = <0>;
-
- clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
- <&rpmhcc RPMH_CXO_CLK>;
- clock-names = "iface", "ref";
-
- status = "disabled";
- };
-
- mdss_dsi1: dsi@ae96000 {
- compatible = "qcom,sdm845-dsi-ctrl",
- "qcom,mdss-dsi-ctrl";
- reg = <0 0x0ae96000 0 0x400>;
- reg-names = "dsi_ctrl";
-
- interrupt-parent = <&mdss>;
- interrupts = <5>;
-
- clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK>,
- <&dispcc DISP_CC_MDSS_BYTE1_INTF_CLK>,
- <&dispcc DISP_CC_MDSS_PCLK1_CLK>,
- <&dispcc DISP_CC_MDSS_ESC1_CLK>,
- <&dispcc DISP_CC_MDSS_AHB_CLK>,
- <&dispcc DISP_CC_MDSS_AXI_CLK>;
- clock-names = "byte",
- "byte_intf",
- "pixel",
- "core",
- "iface",
- "bus";
- assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK_SRC>, <&dispcc DISP_CC_MDSS_PCLK1_CLK_SRC>;
- assigned-clock-parents = <&mdss_dsi1_phy 0>, <&mdss_dsi1_phy 1>;
-
- operating-points-v2 = <&dsi_opp_table>;
- power-domains = <&rpmhpd SDM845_CX>;
-
- phys = <&mdss_dsi1_phy>;
-
- status = "disabled";
-
- #address-cells = <1>;
- #size-cells = <0>;
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
- mdss_dsi1_in: endpoint {
- remote-endpoint = <&dpu_intf2_out>;
- };
- };
-
- port@1 {
- reg = <1>;
- mdss_dsi1_out: endpoint {
- };
- };
- };
- };
-
- mdss_dsi1_phy: phy@ae96400 {
- compatible = "qcom,dsi-phy-10nm";
- reg = <0 0x0ae96400 0 0x200>,
- <0 0x0ae96600 0 0x280>,
- <0 0x0ae96a00 0 0x10e>;
- reg-names = "dsi_phy",
- "dsi_phy_lane",
- "dsi_pll";
-
- #clock-cells = <1>;
- #phy-cells = <0>;
-
- clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
- <&rpmhcc RPMH_CXO_CLK>;
- clock-names = "iface", "ref";
-
- status = "disabled";
- };
- };
-
- gpu: gpu@5000000 {
- compatible = "qcom,adreno-630.2", "qcom,adreno";
-
- reg = <0 0x05000000 0 0x40000>, <0 0x509e000 0 0x10>;
- reg-names = "kgsl_3d0_reg_memory", "cx_mem";
-
- /*
- * Look ma, no clocks! The GPU clocks and power are
- * controlled entirely by the GMU
- */
-
- interrupts = <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>;
-
- iommus = <&adreno_smmu 0>;
-
- operating-points-v2 = <&gpu_opp_table>;
-
- qcom,gmu = <&gmu>;
-
- interconnects = <&mem_noc MASTER_GFX3D 0 &mem_noc SLAVE_EBI1 0>;
- interconnect-names = "gfx-mem";
-
- status = "disabled";
-
- gpu_opp_table: opp-table {
- compatible = "operating-points-v2";
-
- opp-710000000 {
- opp-hz = /bits/ 64 <710000000>;
- opp-level = <RPMH_REGULATOR_LEVEL_TURBO_L1>;
- opp-peak-kBps = <7216000>;
- };
-
- opp-675000000 {
- opp-hz = /bits/ 64 <675000000>;
- opp-level = <RPMH_REGULATOR_LEVEL_TURBO>;
- opp-peak-kBps = <7216000>;
- };
-
- opp-596000000 {
- opp-hz = /bits/ 64 <596000000>;
- opp-level = <RPMH_REGULATOR_LEVEL_NOM_L1>;
- opp-peak-kBps = <6220000>;
- };
-
- opp-520000000 {
- opp-hz = /bits/ 64 <520000000>;
- opp-level = <RPMH_REGULATOR_LEVEL_NOM>;
- opp-peak-kBps = <6220000>;
- };
-
- opp-414000000 {
- opp-hz = /bits/ 64 <414000000>;
- opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
- opp-peak-kBps = <4068000>;
- };
-
- opp-342000000 {
- opp-hz = /bits/ 64 <342000000>;
- opp-level = <RPMH_REGULATOR_LEVEL_SVS>;
- opp-peak-kBps = <2724000>;
- };
-
- opp-257000000 {
- opp-hz = /bits/ 64 <257000000>;
- opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
- opp-peak-kBps = <1648000>;
- };
- };
- };
-
- adreno_smmu: iommu@5040000 {
- compatible = "qcom,sdm845-smmu-v2", "qcom,adreno-smmu", "qcom,smmu-v2";
- reg = <0 0x05040000 0 0x10000>;
- #iommu-cells = <1>;
- #global-interrupts = <2>;
- interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 231 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 364 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 365 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 366 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 367 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 368 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 369 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 370 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 371 IRQ_TYPE_EDGE_RISING>;
- clocks = <&gcc GCC_GPU_MEMNOC_GFX_CLK>,
- <&gcc GCC_GPU_CFG_AHB_CLK>;
- clock-names = "bus", "iface";
-
- power-domains = <&gpucc GPU_CX_GDSC>;
- };
-
- gmu: gmu@506a000 {
- compatible = "qcom,adreno-gmu-630.2", "qcom,adreno-gmu";
-
- reg = <0 0x0506a000 0 0x30000>,
- <0 0x0b280000 0 0x10000>,
- <0 0x0b480000 0 0x10000>;
- reg-names = "gmu", "gmu_pdc", "gmu_pdc_seq";
-
- interrupts = <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "hfi", "gmu";
-
- clocks = <&gpucc GPU_CC_CX_GMU_CLK>,
- <&gpucc GPU_CC_CXO_CLK>,
- <&gcc GCC_DDRSS_GPU_AXI_CLK>,
- <&gcc GCC_GPU_MEMNOC_GFX_CLK>;
- clock-names = "gmu", "cxo", "axi", "memnoc";
-
- power-domains = <&gpucc GPU_CX_GDSC>,
- <&gpucc GPU_GX_GDSC>;
- power-domain-names = "cx", "gx";
-
- iommus = <&adreno_smmu 5>;
-
- operating-points-v2 = <&gmu_opp_table>;
-
- status = "disabled";
-
- gmu_opp_table: opp-table {
- compatible = "operating-points-v2";
-
- opp-400000000 {
- opp-hz = /bits/ 64 <400000000>;
- opp-level = <RPMH_REGULATOR_LEVEL_SVS>;
- };
-
- opp-200000000 {
- opp-hz = /bits/ 64 <200000000>;
- opp-level = <RPMH_REGULATOR_LEVEL_MIN_SVS>;
- };
- };
- };
-
- dispcc: clock-controller@af00000 {
- compatible = "qcom,sdm845-dispcc";
- reg = <0 0x0af00000 0 0x10000>;
- clocks = <&rpmhcc RPMH_CXO_CLK>,
- <&gcc GCC_DISP_GPLL0_CLK_SRC>,
- <&gcc GCC_DISP_GPLL0_DIV_CLK_SRC>,
- <&mdss_dsi0_phy 0>,
- <&mdss_dsi0_phy 1>,
- <&mdss_dsi1_phy 0>,
- <&mdss_dsi1_phy 1>,
- <&usb_1_qmpphy QMP_USB43DP_DP_LINK_CLK>,
- <&usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>;
- clock-names = "bi_tcxo",
- "gcc_disp_gpll0_clk_src",
- "gcc_disp_gpll0_div_clk_src",
- "dsi0_phy_pll_out_byteclk",
- "dsi0_phy_pll_out_dsiclk",
- "dsi1_phy_pll_out_byteclk",
- "dsi1_phy_pll_out_dsiclk",
- "dp_link_clk_divsel_ten",
- "dp_vco_divided_clk_src_mux";
- #clock-cells = <1>;
- #reset-cells = <1>;
- #power-domain-cells = <1>;
- };
-
- pdc_intc: interrupt-controller@b220000 {
- compatible = "qcom,sdm845-pdc", "qcom,pdc";
- reg = <0 0x0b220000 0 0x30000>;
- qcom,pdc-ranges = <0 480 94>, <94 609 15>, <115 630 7>;
- #interrupt-cells = <2>;
- interrupt-parent = <&intc>;
- interrupt-controller;
- };
-
- pdc_reset: reset-controller@b2e0000 {
- compatible = "qcom,sdm845-pdc-global";
- reg = <0 0x0b2e0000 0 0x20000>;
- #reset-cells = <1>;
- };
-
- tsens0: thermal-sensor@c263000 {
- compatible = "qcom,sdm845-tsens", "qcom,tsens-v2";
- reg = <0 0x0c263000 0 0x1ff>, /* TM */
- <0 0x0c222000 0 0x1ff>; /* SROT */
- #qcom,sensors = <13>;
- interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 508 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "uplow", "critical";
- #thermal-sensor-cells = <1>;
- };
-
- tsens1: thermal-sensor@c265000 {
- compatible = "qcom,sdm845-tsens", "qcom,tsens-v2";
- reg = <0 0x0c265000 0 0x1ff>, /* TM */
- <0 0x0c223000 0 0x1ff>; /* SROT */
- #qcom,sensors = <8>;
- interrupts = <GIC_SPI 507 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 509 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "uplow", "critical";
- #thermal-sensor-cells = <1>;
- };
-
- aoss_reset: reset-controller@c2a0000 {
- compatible = "qcom,sdm845-aoss-cc";
- reg = <0 0x0c2a0000 0 0x31000>;
- #reset-cells = <1>;
- };
-
- aoss_qmp: power-management@c300000 {
- compatible = "qcom,sdm845-aoss-qmp", "qcom,aoss-qmp";
- reg = <0 0x0c300000 0 0x400>;
- interrupts = <GIC_SPI 389 IRQ_TYPE_EDGE_RISING>;
- mboxes = <&apss_shared 0>;
-
- #clock-cells = <0>;
-
- cx_cdev: cx {
- #cooling-cells = <2>;
- };
-
- ebi_cdev: ebi {
- #cooling-cells = <2>;
- };
- };
-
- sram@c3f0000 {
- compatible = "qcom,sdm845-rpmh-stats";
- reg = <0 0x0c3f0000 0 0x400>;
- };
-
- spmi_bus: spmi@c440000 {
- compatible = "qcom,spmi-pmic-arb";
- reg = <0 0x0c440000 0 0x1100>,
- <0 0x0c600000 0 0x2000000>,
- <0 0x0e600000 0 0x100000>,
- <0 0x0e700000 0 0xa0000>,
- <0 0x0c40a000 0 0x26000>;
- reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
- interrupt-names = "periph_irq";
- interrupts = <GIC_SPI 481 IRQ_TYPE_LEVEL_HIGH>;
- qcom,ee = <0>;
- qcom,channel = <0>;
- #address-cells = <2>;
- #size-cells = <0>;
- interrupt-controller;
- #interrupt-cells = <4>;
- };
-
- sram@146bf000 {
- compatible = "qcom,sdm845-imem", "syscon", "simple-mfd";
- reg = <0 0x146bf000 0 0x1000>;
-
- #address-cells = <1>;
- #size-cells = <1>;
-
- ranges = <0 0 0x146bf000 0x1000>;
-
- pil-reloc@94c {
- compatible = "qcom,pil-reloc-info";
- reg = <0x94c 0xc8>;
- };
- };
-
- apps_smmu: iommu@15000000 {
- compatible = "qcom,sdm845-smmu-500", "arm,mmu-500";
- reg = <0 0x15000000 0 0x80000>;
- #iommu-cells = <2>;
- #global-interrupts = <1>;
- interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>;
- };
-
- lpasscc: clock-controller@17014000 {
- compatible = "qcom,sdm845-lpasscc";
- reg = <0 0x17014000 0 0x1f004>, <0 0x17300000 0 0x200>;
- reg-names = "cc", "qdsp6ss";
- #clock-cells = <1>;
- status = "disabled";
- };
-
- gladiator_noc: interconnect@17900000 {
- compatible = "qcom,sdm845-gladiator-noc";
- reg = <0 0x17900000 0 0xd080>;
- #interconnect-cells = <2>;
- qcom,bcm-voters = <&apps_bcm_voter>;
- };
-
- watchdog@17980000 {
- compatible = "qcom,apss-wdt-sdm845", "qcom,kpss-wdt";
- reg = <0 0x17980000 0 0x1000>;
- clocks = <&sleep_clk>;
- interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
- };
-
- apss_shared: mailbox@17990000 {
- compatible = "qcom,sdm845-apss-shared";
- reg = <0 0x17990000 0 0x1000>;
- #mbox-cells = <1>;
- };
-
- apps_rsc: rsc@179c0000 {
- label = "apps_rsc";
- compatible = "qcom,rpmh-rsc";
- reg = <0 0x179c0000 0 0x10000>,
- <0 0x179d0000 0 0x10000>,
- <0 0x179e0000 0 0x10000>;
- reg-names = "drv-0", "drv-1", "drv-2";
- interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
- qcom,tcs-offset = <0xd00>;
- qcom,drv-id = <2>;
- qcom,tcs-config = <ACTIVE_TCS 2>,
- <SLEEP_TCS 3>,
- <WAKE_TCS 3>,
- <CONTROL_TCS 1>;
- power-domains = <&CLUSTER_PD>;
-
- apps_bcm_voter: bcm-voter {
- compatible = "qcom,bcm-voter";
- };
-
- rpmhcc: clock-controller {
- compatible = "qcom,sdm845-rpmh-clk";
- #clock-cells = <1>;
- clock-names = "xo";
- clocks = <&xo_board>;
- };
-
- rpmhpd: power-controller {
- compatible = "qcom,sdm845-rpmhpd";
- #power-domain-cells = <1>;
- operating-points-v2 = <&rpmhpd_opp_table>;
-
- rpmhpd_opp_table: opp-table {
- compatible = "operating-points-v2";
-
- rpmhpd_opp_ret: opp1 {
- opp-level = <RPMH_REGULATOR_LEVEL_RETENTION>;
- };
-
- rpmhpd_opp_min_svs: opp2 {
- opp-level = <RPMH_REGULATOR_LEVEL_MIN_SVS>;
- };
-
- rpmhpd_opp_low_svs: opp3 {
- opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
- };
-
- rpmhpd_opp_svs: opp4 {
- opp-level = <RPMH_REGULATOR_LEVEL_SVS>;
- };
-
- rpmhpd_opp_svs_l1: opp5 {
- opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
- };
-
- rpmhpd_opp_nom: opp6 {
- opp-level = <RPMH_REGULATOR_LEVEL_NOM>;
- };
-
- rpmhpd_opp_nom_l1: opp7 {
- opp-level = <RPMH_REGULATOR_LEVEL_NOM_L1>;
- };
-
- rpmhpd_opp_nom_l2: opp8 {
- opp-level = <RPMH_REGULATOR_LEVEL_NOM_L2>;
- };
-
- rpmhpd_opp_turbo: opp9 {
- opp-level = <RPMH_REGULATOR_LEVEL_TURBO>;
- };
-
- rpmhpd_opp_turbo_l1: opp10 {
- opp-level = <RPMH_REGULATOR_LEVEL_TURBO_L1>;
- };
- };
- };
- };
-
- intc: interrupt-controller@17a00000 {
- compatible = "arm,gic-v3";
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
- #interrupt-cells = <3>;
- interrupt-controller;
- reg = <0 0x17a00000 0 0x10000>, /* GICD */
- <0 0x17a60000 0 0x100000>; /* GICR * 8 */
- interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
-
- msi-controller@17a40000 {
- compatible = "arm,gic-v3-its";
- msi-controller;
- #msi-cells = <1>;
- reg = <0 0x17a40000 0 0x20000>;
- status = "disabled";
- };
- };
-
- slimbam: dma-controller@17184000 {
- compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0";
- qcom,controlled-remotely;
- reg = <0 0x17184000 0 0x2a000>;
- num-channels = <31>;
- interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
- #dma-cells = <1>;
- qcom,ee = <1>;
- qcom,num-ees = <2>;
- iommus = <&apps_smmu 0x1806 0x0>;
- };
-
- timer@17c90000 {
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0 0 0 0x20000000>;
- compatible = "arm,armv7-timer-mem";
- reg = <0 0x17c90000 0 0x1000>;
-
- frame@17ca0000 {
- frame-number = <0>;
- interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
- reg = <0x17ca0000 0x1000>,
- <0x17cb0000 0x1000>;
- };
-
- frame@17cc0000 {
- frame-number = <1>;
- interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
- reg = <0x17cc0000 0x1000>;
- status = "disabled";
- };
-
- frame@17cd0000 {
- frame-number = <2>;
- interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
- reg = <0x17cd0000 0x1000>;
- status = "disabled";
- };
-
- frame@17ce0000 {
- frame-number = <3>;
- interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
- reg = <0x17ce0000 0x1000>;
- status = "disabled";
- };
-
- frame@17cf0000 {
- frame-number = <4>;
- interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
- reg = <0x17cf0000 0x1000>;
- status = "disabled";
- };
-
- frame@17d00000 {
- frame-number = <5>;
- interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
- reg = <0x17d00000 0x1000>;
- status = "disabled";
- };
-
- frame@17d10000 {
- frame-number = <6>;
- interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
- reg = <0x17d10000 0x1000>;
- status = "disabled";
- };
- };
-
- osm_l3: interconnect@17d41000 {
- compatible = "qcom,sdm845-osm-l3", "qcom,osm-l3";
- reg = <0 0x17d41000 0 0x1400>;
-
- clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>;
- clock-names = "xo", "alternate";
-
- #interconnect-cells = <1>;
- };
-
- cpufreq_hw: cpufreq@17d43000 {
- compatible = "qcom,sdm845-cpufreq-hw", "qcom,cpufreq-hw";
- reg = <0 0x17d43000 0 0x1400>, <0 0x17d45800 0 0x1400>;
- reg-names = "freq-domain0", "freq-domain1";
-
- interrupts-extended = <&lmh_cluster0 0>, <&lmh_cluster1 0>;
-
- clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>;
- clock-names = "xo", "alternate";
-
- #freq-domain-cells = <1>;
- #clock-cells = <1>;
- };
-
- wifi: wifi@18800000 {
- compatible = "qcom,wcn3990-wifi";
- status = "disabled";
- reg = <0 0x18800000 0 0x800000>;
- reg-names = "membase";
- memory-region = <&wlan_msa_mem>;
- clock-names = "cxo_ref_clk_pin";
- clocks = <&rpmhcc RPMH_RF_CLK2>;
- interrupts =
- <GIC_SPI 414 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 415 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>;
- iommus = <&apps_smmu 0x0040 0x1>;
- };
- };
-
- sound: sound {
- };
-
- thermal-zones {
- cpu0-thermal {
- polling-delay-passive = <250>;
- polling-delay = <1000>;
-
- thermal-sensors = <&tsens0 1>;
-
- trips {
- cpu0_alert0: trip-point0 {
- temperature = <90000>;
- hysteresis = <2000>;
- type = "passive";
- };
-
- cpu0_alert1: trip-point1 {
- temperature = <95000>;
- hysteresis = <2000>;
- type = "passive";
- };
-
- cpu0_crit: cpu-crit {
- temperature = <110000>;
- hysteresis = <1000>;
- type = "critical";
- };
- };
- };
-
- cpu1-thermal {
- polling-delay-passive = <250>;
- polling-delay = <1000>;
-
- thermal-sensors = <&tsens0 2>;
-
- trips {
- cpu1_alert0: trip-point0 {
- temperature = <90000>;
- hysteresis = <2000>;
- type = "passive";
- };
-
- cpu1_alert1: trip-point1 {
- temperature = <95000>;
- hysteresis = <2000>;
- type = "passive";
- };
-
- cpu1_crit: cpu-crit {
- temperature = <110000>;
- hysteresis = <1000>;
- type = "critical";
- };
- };
- };
-
- cpu2-thermal {
- polling-delay-passive = <250>;
- polling-delay = <1000>;
-
- thermal-sensors = <&tsens0 3>;
-
- trips {
- cpu2_alert0: trip-point0 {
- temperature = <90000>;
- hysteresis = <2000>;
- type = "passive";
- };
-
- cpu2_alert1: trip-point1 {
- temperature = <95000>;
- hysteresis = <2000>;
- type = "passive";
- };
-
- cpu2_crit: cpu-crit {
- temperature = <110000>;
- hysteresis = <1000>;
- type = "critical";
- };
- };
- };
-
- cpu3-thermal {
- polling-delay-passive = <250>;
- polling-delay = <1000>;
-
- thermal-sensors = <&tsens0 4>;
-
- trips {
- cpu3_alert0: trip-point0 {
- temperature = <90000>;
- hysteresis = <2000>;
- type = "passive";
- };
-
- cpu3_alert1: trip-point1 {
- temperature = <95000>;
- hysteresis = <2000>;
- type = "passive";
- };
-
- cpu3_crit: cpu-crit {
- temperature = <110000>;
- hysteresis = <1000>;
- type = "critical";
- };
- };
- };
-
- cpu4-thermal {
- polling-delay-passive = <250>;
- polling-delay = <1000>;
-
- thermal-sensors = <&tsens0 7>;
-
- trips {
- cpu4_alert0: trip-point0 {
- temperature = <90000>;
- hysteresis = <2000>;
- type = "passive";
- };
-
- cpu4_alert1: trip-point1 {
- temperature = <95000>;
- hysteresis = <2000>;
- type = "passive";
- };
-
- cpu4_crit: cpu-crit {
- temperature = <110000>;
- hysteresis = <1000>;
- type = "critical";
- };
- };
- };
-
- cpu5-thermal {
- polling-delay-passive = <250>;
- polling-delay = <1000>;
-
- thermal-sensors = <&tsens0 8>;
-
- trips {
- cpu5_alert0: trip-point0 {
- temperature = <90000>;
- hysteresis = <2000>;
- type = "passive";
- };
-
- cpu5_alert1: trip-point1 {
- temperature = <95000>;
- hysteresis = <2000>;
- type = "passive";
- };
-
- cpu5_crit: cpu-crit {
- temperature = <110000>;
- hysteresis = <1000>;
- type = "critical";
- };
- };
- };
-
- cpu6-thermal {
- polling-delay-passive = <250>;
- polling-delay = <1000>;
-
- thermal-sensors = <&tsens0 9>;
-
- trips {
- cpu6_alert0: trip-point0 {
- temperature = <90000>;
- hysteresis = <2000>;
- type = "passive";
- };
-
- cpu6_alert1: trip-point1 {
- temperature = <95000>;
- hysteresis = <2000>;
- type = "passive";
- };
-
- cpu6_crit: cpu-crit {
- temperature = <110000>;
- hysteresis = <1000>;
- type = "critical";
- };
- };
- };
-
- cpu7-thermal {
- polling-delay-passive = <250>;
- polling-delay = <1000>;
-
- thermal-sensors = <&tsens0 10>;
-
- trips {
- cpu7_alert0: trip-point0 {
- temperature = <90000>;
- hysteresis = <2000>;
- type = "passive";
- };
-
- cpu7_alert1: trip-point1 {
- temperature = <95000>;
- hysteresis = <2000>;
- type = "passive";
- };
-
- cpu7_crit: cpu-crit {
- temperature = <110000>;
- hysteresis = <1000>;
- type = "critical";
- };
- };
- };
-
- aoss0-thermal {
- polling-delay-passive = <250>;
- polling-delay = <1000>;
-
- thermal-sensors = <&tsens0 0>;
-
- trips {
- aoss0_alert0: trip-point0 {
- temperature = <90000>;
- hysteresis = <2000>;
- type = "hot";
- };
- };
- };
-
- cluster0-thermal {
- polling-delay-passive = <250>;
- polling-delay = <1000>;
-
- thermal-sensors = <&tsens0 5>;
-
- trips {
- cluster0_alert0: trip-point0 {
- temperature = <90000>;
- hysteresis = <2000>;
- type = "hot";
- };
- cluster0_crit: cluster0_crit {
- temperature = <110000>;
- hysteresis = <2000>;
- type = "critical";
- };
- };
- };
-
- cluster1-thermal {
- polling-delay-passive = <250>;
- polling-delay = <1000>;
-
- thermal-sensors = <&tsens0 6>;
-
- trips {
- cluster1_alert0: trip-point0 {
- temperature = <90000>;
- hysteresis = <2000>;
- type = "hot";
- };
- cluster1_crit: cluster1_crit {
- temperature = <110000>;
- hysteresis = <2000>;
- type = "critical";
- };
- };
- };
-
- gpu-top-thermal {
- polling-delay-passive = <250>;
- polling-delay = <1000>;
-
- thermal-sensors = <&tsens0 11>;
-
- trips {
- gpu1_alert0: trip-point0 {
- temperature = <90000>;
- hysteresis = <2000>;
- type = "hot";
- };
- };
- };
-
- gpu-bottom-thermal {
- polling-delay-passive = <250>;
- polling-delay = <1000>;
-
- thermal-sensors = <&tsens0 12>;
-
- trips {
- gpu2_alert0: trip-point0 {
- temperature = <90000>;
- hysteresis = <2000>;
- type = "hot";
- };
- };
- };
-
- aoss1-thermal {
- polling-delay-passive = <250>;
- polling-delay = <1000>;
-
- thermal-sensors = <&tsens1 0>;
-
- trips {
- aoss1_alert0: trip-point0 {
- temperature = <90000>;
- hysteresis = <2000>;
- type = "hot";
- };
- };
- };
-
- q6-modem-thermal {
- polling-delay-passive = <250>;
- polling-delay = <1000>;
-
- thermal-sensors = <&tsens1 1>;
-
- trips {
- q6_modem_alert0: trip-point0 {
- temperature = <90000>;
- hysteresis = <2000>;
- type = "hot";
- };
- };
- };
-
- mem-thermal {
- polling-delay-passive = <250>;
- polling-delay = <1000>;
-
- thermal-sensors = <&tsens1 2>;
-
- trips {
- mem_alert0: trip-point0 {
- temperature = <90000>;
- hysteresis = <2000>;
- type = "hot";
- };
- };
- };
-
- wlan-thermal {
- polling-delay-passive = <250>;
- polling-delay = <1000>;
-
- thermal-sensors = <&tsens1 3>;
-
- trips {
- wlan_alert0: trip-point0 {
- temperature = <90000>;
- hysteresis = <2000>;
- type = "hot";
- };
- };
- };
-
- q6-hvx-thermal {
- polling-delay-passive = <250>;
- polling-delay = <1000>;
-
- thermal-sensors = <&tsens1 4>;
-
- trips {
- q6_hvx_alert0: trip-point0 {
- temperature = <90000>;
- hysteresis = <2000>;
- type = "hot";
- };
- };
- };
-
- camera-thermal {
- polling-delay-passive = <250>;
- polling-delay = <1000>;
-
- thermal-sensors = <&tsens1 5>;
-
- trips {
- camera_alert0: trip-point0 {
- temperature = <90000>;
- hysteresis = <2000>;
- type = "hot";
- };
- };
- };
-
- video-thermal {
- polling-delay-passive = <250>;
- polling-delay = <1000>;
-
- thermal-sensors = <&tsens1 6>;
-
- trips {
- video_alert0: trip-point0 {
- temperature = <90000>;
- hysteresis = <2000>;
- type = "hot";
- };
- };
- };
-
- modem-thermal {
- polling-delay-passive = <250>;
- polling-delay = <1000>;
-
- thermal-sensors = <&tsens1 7>;
-
- trips {
- modem_alert0: trip-point0 {
- temperature = <90000>;
- hysteresis = <2000>;
- type = "hot";
- };
- };
- };
- };
-
- timer {
- compatible = "arm,armv8-timer";
- interrupts = <GIC_PPI 1 IRQ_TYPE_LEVEL_LOW>,
- <GIC_PPI 2 IRQ_TYPE_LEVEL_LOW>,
- <GIC_PPI 3 IRQ_TYPE_LEVEL_LOW>,
- <GIC_PPI 0 IRQ_TYPE_LEVEL_LOW>;
- };
-};
diff --git a/arch/arm/dts/stm32mp135f-dk-u-boot.dtsi b/arch/arm/dts/stm32mp135f-dk-u-boot.dtsi
index ba0c024..f004e98 100644
--- a/arch/arm/dts/stm32mp135f-dk-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp135f-dk-u-boot.dtsi
@@ -16,11 +16,26 @@
u-boot,mmc-env-partition = "u-boot-env";
};
+ gpio-keys {
+ button-user-1 {
+ label = "User-1";
+ linux,code = <BTN_2>;
+ gpios = <&gpioa 14 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
+ };
+
+ button-user {
+ /* update label to match the label requested in board_key_check() */
+ label = "User-2";
+ };
+ };
+
leds {
+ led-blue {
+ /delete-property/default-state;
+ };
+
led-red {
- color = <LED_COLOR_ID_RED>;
gpios = <&gpioa 13 GPIO_ACTIVE_LOW>;
- default-state = "off";
};
};
};
diff --git a/arch/arm/dts/stm32mp157a-dk1-scmi-u-boot.dtsi b/arch/arm/dts/stm32mp157a-dk1-scmi-u-boot.dtsi
index 20728f2..a5158fe 100644
--- a/arch/arm/dts/stm32mp157a-dk1-scmi-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp157a-dk1-scmi-u-boot.dtsi
@@ -3,6 +3,7 @@
* Copyright : STMicroelectronics 2022
*/
+#include <dt-bindings/input/linux-event-codes.h>
#include "stm32mp15-scmi-u-boot.dtsi"
/ {
@@ -12,20 +13,35 @@
};
config {
- u-boot,boot-led = "heartbeat";
- u-boot,error-led = "error";
+ u-boot,boot-led = "led-blue";
+ u-boot,error-led = "led-red";
u-boot,mmc-env-partition = "u-boot-env";
st,adc_usb_pd = <&adc1 18>, <&adc1 19>;
- st,fastboot-gpios = <&gpioa 13 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
- st,stm32prog-gpios = <&gpioa 14 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+
+ button-user-1 {
+ label = "User-1";
+ linux,code = <BTN_1>;
+ gpios = <&gpioa 14 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
+ };
+
+ button-user-2 {
+ label = "User-2";
+ linux,code = <BTN_2>;
+ gpios = <&gpioa 13 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
+ };
};
led {
- red {
- label = "error";
+ led-blue {
+ /delete-property/label;
+ };
+
+ led-red {
gpios = <&gpioa 13 GPIO_ACTIVE_LOW>;
- default-state = "off";
- status = "okay";
};
};
};
diff --git a/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi b/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi
index a163582..f97deba 100644
--- a/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi
@@ -4,6 +4,7 @@
*/
#include <dt-bindings/clock/stm32mp1-clksrc.h>
+#include <dt-bindings/input/linux-event-codes.h>
#include "stm32mp15-u-boot.dtsi"
#include "stm32mp15-ddr3-1x4Gb-1066-binG.dtsi"
@@ -14,12 +15,10 @@
};
config {
- u-boot,boot-led = "heartbeat";
- u-boot,error-led = "error";
+ u-boot,boot-led = "led-blue";
+ u-boot,error-led = "led-red";
u-boot,mmc-env-partition = "fip";
st,adc_usb_pd = <&adc1 18>, <&adc1 19>;
- st,fastboot-gpios = <&gpioa 13 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
- st,stm32prog-gpios = <&gpioa 14 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
};
#if defined(CONFIG_STM32MP15X_STM32IMAGE) || defined(CONFIG_SPL)
@@ -48,12 +47,29 @@
};
#endif
+ gpio-keys {
+ compatible = "gpio-keys";
+
+ button-user-1 {
+ label = "User-1";
+ linux,code = <BTN_1>;
+ gpios = <&gpioa 14 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
+ };
+
+ button-user-2 {
+ label = "User-2";
+ linux,code = <BTN_2>;
+ gpios = <&gpioa 13 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
+ };
+ };
+
led {
- red {
- label = "error";
+ led-blue {
+ /delete-property/label;
+ };
+
+ led-red {
gpios = <&gpioa 13 GPIO_ACTIVE_LOW>;
- default-state = "off";
- status = "okay";
};
};
};
diff --git a/arch/arm/dts/stm32mp157c-ed1-scmi-u-boot.dtsi b/arch/arm/dts/stm32mp157c-ed1-scmi-u-boot.dtsi
index 4d763bd..7c0d1ba 100644
--- a/arch/arm/dts/stm32mp157c-ed1-scmi-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp157c-ed1-scmi-u-boot.dtsi
@@ -3,6 +3,7 @@
* Copyright : STMicroelectronics 2022
*/
+#include <dt-bindings/input/linux-event-codes.h>
#include "stm32mp15-scmi-u-boot.dtsi"
/ {
@@ -11,19 +12,36 @@
};
config {
- u-boot,boot-led = "heartbeat";
- u-boot,error-led = "error";
+ u-boot,boot-led = "led-blue";
+ u-boot,error-led = "led-red";
u-boot,mmc-env-partition = "u-boot-env";
- st,fastboot-gpios = <&gpioa 13 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
- st,stm32prog-gpios = <&gpioa 14 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+
+ button-user-1 {
+ label = "User-1";
+ linux,code = <BTN_1>;
+ gpios = <&gpioa 14 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
+ };
+
+ button-user-2 {
+ label = "User-2";
+ linux,code = <BTN_2>;
+ gpios = <&gpioa 13 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
+ };
};
led {
- red {
- label = "error";
+ compatible = "gpio-leds";
+
+ led-blue {
+ gpios = <&gpiod 9 GPIO_ACTIVE_HIGH>;
+ };
+
+ led-red {
gpios = <&gpioa 13 GPIO_ACTIVE_LOW>;
- default-state = "off";
- status = "okay";
};
};
};
diff --git a/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi b/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi
index ef91088..d93359f 100644
--- a/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi
@@ -4,6 +4,7 @@
*/
#include <dt-bindings/clock/stm32mp1-clksrc.h>
+#include <dt-bindings/input/linux-event-codes.h>
#include "stm32mp15-u-boot.dtsi"
#include "stm32mp15-ddr3-2x4Gb-1066-binG.dtsi"
@@ -13,11 +14,9 @@
};
config {
- u-boot,boot-led = "heartbeat";
- u-boot,error-led = "error";
+ u-boot,boot-led = "led-blue";
+ u-boot,error-led = "led-red";
u-boot,mmc-env-partition = "fip";
- st,fastboot-gpios = <&gpioa 13 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
- st,stm32prog-gpios = <&gpioa 14 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
};
#if defined(CONFIG_STM32MP15X_STM32IMAGE) || defined(CONFIG_SPL)
@@ -43,12 +42,31 @@
};
#endif
+ gpio-keys {
+ compatible = "gpio-keys";
+
+ button-user-1 {
+ label = "User-1";
+ linux,code = <BTN_1>;
+ gpios = <&gpioa 14 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
+ };
+
+ button-user-2 {
+ label = "User-2";
+ linux,code = <BTN_2>;
+ gpios = <&gpioa 13 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
+ };
+ };
+
led {
- red {
- label = "error";
+ compatible = "gpio-leds";
+
+ led-blue {
+ gpios = <&gpiod 9 GPIO_ACTIVE_HIGH>;
+ };
+
+ led-red {
gpios = <&gpioa 13 GPIO_ACTIVE_LOW>;
- default-state = "off";
- status = "okay";
};
};
};
diff --git a/arch/arm/dts/stm32mp157c-ev1-u-boot.dtsi b/arch/arm/dts/stm32mp157c-ev1-u-boot.dtsi
index 139940b..3515347 100644
--- a/arch/arm/dts/stm32mp157c-ev1-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp157c-ev1-u-boot.dtsi
@@ -33,11 +33,11 @@
label = "fsbl1";
reg = <0x00000000 0x00040000>;
};
- partition@80000 {
+ partition@40000 {
label = "fsbl2";
reg = <0x00040000 0x00040000>;
};
- partition@100000 {
+ partition@80000 {
label = "ssbl";
reg = <0x00080000 0x00200000>;
};
@@ -58,7 +58,7 @@
label = "fsbl2";
reg = <0x00040000 0x00040000>;
};
- partition@100000 {
+ partition@80000 {
label = "fip";
reg = <0x00080000 0x00400000>;
};
@@ -112,7 +112,7 @@
label = "fip2";
reg = <0x00600000 0x00400000>;
};
- partition@1200000 {
+ partition@a00000 {
label = "UBI";
reg = <0x00a00000 0x3f600000>;
};
diff --git a/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi b/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi
index 2f70b06..1b44561 100644
--- a/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi
@@ -106,15 +106,15 @@
label = "fsbl2";
reg = <0x00040000 0x00040000>;
};
- partition@500000 {
+ partition@80000 {
label = "uboot";
reg = <0x00080000 0x00160000>;
};
- partition@900000 {
+ partition@1e0000 {
label = "env1";
reg = <0x001E0000 0x00010000>;
};
- partition@980000 {
+ partition@1f0000 {
label = "env2";
reg = <0x001F0000 0x00010000>;
};
diff --git a/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi b/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi
index 552b35d..ba84db6 100644
--- a/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi
@@ -42,15 +42,15 @@
label = "fsbl2";
reg = <0x00040000 0x00040000>;
};
- partition@500000 {
+ partition@80000 {
label = "uboot";
reg = <0x00080000 0x00160000>;
};
- partition@900000 {
+ partition@1e0000 {
label = "env1";
reg = <0x001E0000 0x00010000>;
};
- partition@980000 {
+ partition@1f0000 {
label = "env2";
reg = <0x001F0000 0x00010000>;
};
diff --git a/arch/arm/dts/tegra114-u-boot.dtsi b/arch/arm/dts/tegra114-u-boot.dtsi
index 7c11972..6a02714 100644
--- a/arch/arm/dts/tegra114-u-boot.dtsi
+++ b/arch/arm/dts/tegra114-u-boot.dtsi
@@ -1,3 +1,16 @@
#include <config.h>
#include "tegra-u-boot.dtsi"
+
+/ {
+ host1x@50000000 {
+ bootph-all;
+ dc@54200000 {
+ bootph-all;
+ };
+
+ dc@54240000 {
+ bootph-all;
+ };
+ };
+};
diff --git a/arch/arm/dts/tegra114.dtsi b/arch/arm/dts/tegra114.dtsi
index 68ee7f3..250d692 100644
--- a/arch/arm/dts/tegra114.dtsi
+++ b/arch/arm/dts/tegra114.dtsi
@@ -42,7 +42,7 @@
};
dc@54200000 {
- compatible = "nvidia,tegra114-dc", "nvidia,tegra20-dc";
+ compatible = "nvidia,tegra114-dc";
reg = <0x54200000 0x00040000>;
interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA114_CLK_DISP1>,
@@ -61,7 +61,7 @@
};
dc@54240000 {
- compatible = "nvidia,tegra114-dc", "nvidia,tegra20-dc";
+ compatible = "nvidia,tegra114-dc";
reg = <0x54240000 0x00040000>;
interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA114_CLK_DISP2>,
diff --git a/arch/arm/dts/tegra20-paz00.dts b/arch/arm/dts/tegra20-paz00.dts
index 5cf604e..f851767 100644
--- a/arch/arm/dts/tegra20-paz00.dts
+++ b/arch/arm/dts/tegra20-paz00.dts
@@ -35,22 +35,6 @@
status = "okay";
nvidia,panel = <&panel>;
-
- display-timings {
- timing@0 {
- /* PAZ00 has 1024x600 */
- clock-frequency = <54030000>;
- hactive = <1024>;
- vactive = <600>;
- hback-porch = <160>;
- hfront-porch = <24>;
- hsync-len = <136>;
- vback-porch = <3>;
- vfront-porch = <61>;
- vsync-len = <6>;
- hsync-active = <1>;
- };
- };
};
};
diff --git a/arch/arm/dts/tegra30-asus-grouper-common.dtsi b/arch/arm/dts/tegra30-asus-grouper-common.dtsi
index e8a3511..d437ddc 100644
--- a/arch/arm/dts/tegra30-asus-grouper-common.dtsi
+++ b/arch/arm/dts/tegra30-asus-grouper-common.dtsi
@@ -829,6 +829,12 @@
gpios = <&gpio TEGRA_GPIO(Q, 3) GPIO_ACTIVE_LOW>;
linux,code = <KEY_DOWN>;
};
+
+ switch-hall-sensor {
+ label = "Lid";
+ gpios = <&gpio TEGRA_GPIO(S, 6) GPIO_ACTIVE_LOW>;
+ linux,code = <SW_LID>;
+ };
};
panel: panel {
diff --git a/arch/arm/dts/tegra30-asus-p1801-t.dts b/arch/arm/dts/tegra30-asus-p1801-t.dts
index 350443d..243ff2b 100644
--- a/arch/arm/dts/tegra30-asus-p1801-t.dts
+++ b/arch/arm/dts/tegra30-asus-p1801-t.dts
@@ -118,8 +118,8 @@
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
- nvidia,lock = <0>;
- nvidia,ioreset = <0>;
+ nvidia,lock = <1>;
+ nvidia,io-reset = <1>;
};
/* SDMMC3 pinmux */
@@ -203,7 +203,7 @@
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,open-drain = <TEGRA_PIN_ENABLE>;
- nvidia,lock = <0>;
+ nvidia,lock = <1>;
};
gen2_i2c {
nvidia,pins = "gen2_i2c_scl_pt5",
@@ -213,7 +213,7 @@
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,open-drain = <TEGRA_PIN_ENABLE>;
- nvidia,lock = <0>;
+ nvidia,lock = <1>;
};
cam_i2c {
nvidia,pins = "cam_i2c_scl_pbb1",
@@ -223,7 +223,7 @@
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,open-drain = <TEGRA_PIN_ENABLE>;
- nvidia,lock = <0>;
+ nvidia,lock = <1>;
};
ddc_i2c {
nvidia,pins = "ddc_scl_pv4",
@@ -232,7 +232,7 @@
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
- nvidia,lock = <0>;
+ nvidia,lock = <1>;
};
pwr_i2c {
nvidia,pins = "pwr_i2c_scl_pz6",
@@ -242,7 +242,7 @@
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,open-drain = <TEGRA_PIN_ENABLE>;
- nvidia,lock = <0>;
+ nvidia,lock = <1>;
};
hotplug_i2c {
nvidia,pins = "pu4";
@@ -260,7 +260,7 @@
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,open-drain = <TEGRA_PIN_ENABLE>;
- nvidia,lock = <0>;
+ nvidia,lock = <1>;
};
hdmi_hpd {
nvidia,pins = "hdmi_int_pn7";
@@ -632,8 +632,8 @@
nvidia,pull = <TEGRA_PIN_PULL_UP>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
- nvidia,lock = <0>;
- nvidia,ioreset = <0>;
+ nvidia,lock = <1>;
+ nvidia,io-reset = <1>;
};
/* GPIO keys pinmux */
@@ -718,8 +718,8 @@
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
- nvidia,lock = <0>;
- nvidia,ioreset = <0>;
+ nvidia,lock = <1>;
+ nvidia,io-reset = <1>;
};
vi_d10_pt2 {
nvidia,pins = "vi_d10_pt2",
@@ -838,8 +838,8 @@
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
- nvidia,lock = <0>;
- nvidia,ioreset = <0>;
+ nvidia,lock = <1>;
+ nvidia,io-reset = <1>;
};
vi_mclk_pt1 {
nvidia,pins = "vi_mclk_pt1";
diff --git a/arch/arm/dts/tegra30-asus-tf600t.dts b/arch/arm/dts/tegra30-asus-tf600t.dts
index f49e734..3ddd78b 100644
--- a/arch/arm/dts/tegra30-asus-tf600t.dts
+++ b/arch/arm/dts/tegra30-asus-tf600t.dts
@@ -90,6 +90,8 @@
nvidia,pull = <TEGRA_PIN_PULL_UP>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ nvidia,lock = <1>;
+ nvidia,io-reset = <1>;
};
/* SDMMC2 pinmux */
@@ -98,21 +100,15 @@
"vi_d2_pl0",
"vi_d3_pl1",
"vi_d5_pl3",
- "vi_d7_pl5";
- nvidia,function = "sdmmc2";
- nvidia,pull = <TEGRA_PIN_PULL_NONE>;
- nvidia,tristate = <TEGRA_PIN_DISABLE>;
- nvidia,enable-input = <TEGRA_PIN_ENABLE>;
- };
- vi_d8_pl6 {
- nvidia,pins = "vi_d8_pl6",
+ "vi_d7_pl5",
+ "vi_d8_pl6",
"vi_d9_pl7";
nvidia,function = "sdmmc2";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
- nvidia,lock = <0>;
- nvidia,ioreset = <0>;
+ nvidia,lock = <1>;
+ nvidia,io-reset = <1>;
};
/* SDMMC3 pinmux */
@@ -146,6 +142,8 @@
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ nvidia,lock = <1>;
+ nvidia,io-reset = <1>;
};
sdmmc4_cmd {
nvidia,pins = "sdmmc4_cmd_pt7",
@@ -161,6 +159,8 @@
nvidia,pull = <TEGRA_PIN_PULL_UP>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ nvidia,lock = <1>;
+ nvidia,io-reset = <1>;
};
sdmmc4_rst_n {
nvidia,pins = "sdmmc4_rst_n_pcc3";
@@ -469,6 +469,42 @@
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
+ /* SPI pinmux */
+ spi1_ctrl {
+ nvidia,pins = "spi1_mosi_px4",
+ "spi1_sck_px5",
+ "spi1_cs0_n_px6",
+ "spi1_miso_px7";
+ nvidia,function = "spi1";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_ENABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ spi2_sck {
+ nvidia,pins = "spi2_sck_px2";
+ nvidia,function = "gmi";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ spi2_cs1_n {
+ nvidia,pins = "spi2_cs1_n_pw2";
+ nvidia,function = "spi2";
+ nvidia,pull = <TEGRA_PIN_PULL_UP>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+ spi4_ctrl {
+ nvidia,pins = "gmi_a16_pj7",
+ "gmi_a17_pb0",
+ "gmi_a18_pb1",
+ "gmi_a19_pk7";
+ nvidia,function = "spi4";
+ nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+ nvidia,tristate = <TEGRA_PIN_DISABLE>;
+ nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ };
+
/* Display A pinmux */
lcd_pwr0_pb2 {
nvidia,pins = "lcd_pwr0_pb2",
@@ -577,8 +613,8 @@
nvidia,pull = <TEGRA_PIN_PULL_UP>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
- nvidia,lock = <0>;
- nvidia,ioreset = <0>;
+ nvidia,lock = <1>;
+ nvidia,io-reset = <1>;
};
/* GPIO keys pinmux */
@@ -657,18 +693,19 @@
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
};
vi_vsync_pd6 {
- nvidia,pins = "vi_vsync_pd6",
+ nvidia,pins = "vi_d0_pt4",
+ "vi_d10_pt2",
+ "vi_vsync_pd6",
"vi_hsync_pd7";
nvidia,function = "rsvd2";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
- nvidia,lock = <0>;
- nvidia,ioreset = <0>;
+ nvidia,lock = <1>;
+ nvidia,io-reset = <1>;
};
- vi_d10_pt2 {
- nvidia,pins = "vi_d10_pt2",
- "vi_d0_pt4", "pbb0";
+ pbb0 {
+ nvidia,pins = "pbb0";
nvidia,function = "rsvd2";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
@@ -783,21 +820,15 @@
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
- vi_d4_pl2 {
- nvidia,pins = "vi_d4_pl2";
+ vi_d4 {
+ nvidia,pins = "vi_d4_pl2",
+ "vi_d6_pl4";
nvidia,function = "vi";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
- };
- vi_d6_pl4 {
- nvidia,pins = "vi_d6_pl4";
- nvidia,function = "vi";
- nvidia,pull = <TEGRA_PIN_PULL_NONE>;
- nvidia,tristate = <TEGRA_PIN_DISABLE>;
- nvidia,enable-input = <TEGRA_PIN_DISABLE>;
- nvidia,lock = <0>;
- nvidia,ioreset = <0>;
+ nvidia,lock = <1>;
+ nvidia,io-reset = <1>;
};
vi_mclk_pt1 {
nvidia,pins = "vi_mclk_pt1";
@@ -805,6 +836,8 @@
nvidia,pull = <TEGRA_PIN_PULL_UP>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+ nvidia,lock = <1>;
+ nvidia,io-reset = <1>;
};
jtag {
@@ -1089,6 +1122,16 @@
clock-output-names = "pmic-oscillator";
};
+ extcon-keys {
+ compatible = "gpio-keys";
+
+ switch-dock-hall-sensor {
+ label = "Lid sensor";
+ gpios = <&gpio TEGRA_GPIO(BB, 6) GPIO_ACTIVE_LOW>;
+ linux,code = <SW_LID>;
+ };
+ };
+
gpio-keys {
compatible = "gpio-keys";
diff --git a/arch/arm/dts/tegra30-asus-tf700t.dts b/arch/arm/dts/tegra30-asus-tf700t.dts
index cc03f5a..6dc760b 100644
--- a/arch/arm/dts/tegra30-asus-tf700t.dts
+++ b/arch/arm/dts/tegra30-asus-tf700t.dts
@@ -7,7 +7,18 @@
model = "ASUS Transformer Infinity TF700T";
compatible = "asus,tf700t", "nvidia,tegra30";
- /delete-node/ host1x@50000000;
+ host1x@50000000 {
+ dc@54200000 {
+ clocks = <&tegra_car TEGRA30_CLK_DISP1>,
+ <&tegra_car TEGRA30_CLK_PLL_D_OUT0>;
+
+ rgb {
+ status = "okay";
+
+ nvidia,panel = <&tc358768>;
+ };
+ };
+ };
pinmux@70000868 {
state_default: pinmux {
@@ -62,5 +73,92 @@
};
};
- /delete-node/ panel;
+ tc358768_refclk: clock-tc358768 {
+ compatible = "fixed-clock";
+ clock-frequency = <23100000>;
+ clock-accuracy = <100>;
+ #clock-cells = <0>;
+ };
+
+ tc358768_osc: clock-tc358768-osc-gate {
+ compatible = "gpio-gate-clock";
+ enable-gpios = <&gpio TEGRA_GPIO(D, 2) GPIO_ACTIVE_HIGH>;
+ clocks = <&tc358768_refclk>;
+ #clock-cells = <0>;
+ };
+
+ i2c-mux {
+ compatible = "i2c-mux-gpio";
+
+ mux-gpios = <&gpio TEGRA_GPIO(X, 0) GPIO_ACTIVE_HIGH>;
+ i2c-parent = <&gen1_i2c>;
+ idle-state = <0x0>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ i2c@1 {
+ reg = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ tc358768: dsi@7 {
+ compatible = "toshiba,tc358768";
+ reg = <0x7>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ clocks = <&tc358768_osc>;
+ clock-names = "refclk";
+
+ reset-gpios = <&gpio TEGRA_GPIO(N, 6) GPIO_ACTIVE_LOW>;
+
+ vddc-supply = <&vdd_1v2_mipi>;
+ vddio-supply = <&vdd_1v8_vio>;
+ vddmipi-supply = <&vdd_1v2_mipi>;
+
+ panel = <&panel>;
+ };
+ };
+ };
+
+ panel: panel {
+ compatible = "panasonic,vvx10f004b00";
+
+ power-supply = <&vdd_pnl_reg>;
+ backlight = <&backlight>;
+
+ /delete-property/ enable-gpios;
+
+ display-timings {
+ timing@0 {
+ /* 1920x1200@60Hz */
+ clock-frequency = <154000000>;
+
+ hactive = <1920>;
+ hfront-porch = <48>;
+ hback-porch = <80>;
+ hsync-len = <32>;
+ hsync-active = <1>;
+
+ vactive = <1200>;
+ vfront-porch = <3>;
+ vback-porch = <26>;
+ vsync-len = <6>;
+ vsync-active = <1>;
+ };
+ };
+ };
+
+ vdd_1v2_mipi: regulator-mipi {
+ compatible = "regulator-fixed";
+ regulator-name = "tc358768_1v2_vdd";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-enable-ramp-delay = <10000>;
+ regulator-boot-on;
+ gpio = <&gpio TEGRA_GPIO(BB, 3) GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
};
diff --git a/arch/arm/dts/tegra30-asus-transformer.dtsi b/arch/arm/dts/tegra30-asus-transformer.dtsi
index e6cc6e7..03ba8fb 100644
--- a/arch/arm/dts/tegra30-asus-transformer.dtsi
+++ b/arch/arm/dts/tegra30-asus-transformer.dtsi
@@ -99,8 +99,8 @@
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
- nvidia,lock = <0>;
- nvidia,io-reset = <0>;
+ nvidia,lock = <1>;
+ nvidia,io-reset = <1>;
};
/* SDMMC3 pinmux */
@@ -189,7 +189,7 @@
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,open-drain = <TEGRA_PIN_ENABLE>;
- nvidia,lock = <0>;
+ nvidia,lock = <1>;
};
gen2_i2c {
@@ -200,7 +200,7 @@
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,open-drain = <TEGRA_PIN_ENABLE>;
- nvidia,lock = <0>;
+ nvidia,lock = <1>;
};
cam_i2c {
@@ -211,7 +211,7 @@
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,open-drain = <TEGRA_PIN_ENABLE>;
- nvidia,lock = <0>;
+ nvidia,lock = <1>;
};
ddc_i2c {
@@ -221,7 +221,7 @@
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
- nvidia,lock = <0>;
+ nvidia,lock = <1>;
};
pwr_i2c {
@@ -232,7 +232,7 @@
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,open-drain = <TEGRA_PIN_ENABLE>;
- nvidia,lock = <0>;
+ nvidia,lock = <1>;
};
hotplug_i2c {
@@ -647,8 +647,8 @@
nvidia,pull = <TEGRA_PIN_PULL_UP>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
- nvidia,lock = <0>;
- nvidia,io-reset = <0>;
+ nvidia,lock = <1>;
+ nvidia,io-reset = <1>;
};
/* GPIO keys pinmux */
@@ -741,8 +741,8 @@
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
- nvidia,lock = <0>;
- nvidia,io-reset = <0>;
+ nvidia,lock = <1>;
+ nvidia,io-reset = <1>;
};
vi_d10_pt2 {
@@ -879,8 +879,8 @@
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
- nvidia,lock = <0>;
- nvidia,io-reset = <0>;
+ nvidia,lock = <1>;
+ nvidia,io-reset = <1>;
};
vi_mclk_pt1 {
@@ -1150,6 +1150,16 @@
clock-output-names = "pmic-oscillator";
};
+ extcon-keys {
+ compatible = "gpio-keys";
+
+ switch-dock-hall-sensor {
+ label = "Lid sensor";
+ gpios = <&gpio TEGRA_GPIO(S, 6) GPIO_ACTIVE_LOW>;
+ linux,code = <SW_LID>;
+ };
+ };
+
gpio-keys {
compatible = "gpio-keys";
diff --git a/arch/arm/dts/tegra30-u-boot.dtsi b/arch/arm/dts/tegra30-u-boot.dtsi
index 3038227..6a02714 100644
--- a/arch/arm/dts/tegra30-u-boot.dtsi
+++ b/arch/arm/dts/tegra30-u-boot.dtsi
@@ -8,5 +8,9 @@
dc@54200000 {
bootph-all;
};
+
+ dc@54240000 {
+ bootph-all;
+ };
};
};
diff --git a/arch/arm/dts/tegra30.dtsi b/arch/arm/dts/tegra30.dtsi
index f198bc0..1177e2a 100644
--- a/arch/arm/dts/tegra30.dtsi
+++ b/arch/arm/dts/tegra30.dtsi
@@ -158,7 +158,7 @@
};
dc@54200000 {
- compatible = "nvidia,tegra30-dc", "nvidia,tegra20-dc";
+ compatible = "nvidia,tegra30-dc";
reg = <0x54200000 0x00040000>;
interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA30_CLK_DISP1>,
diff --git a/arch/arm/dts/zynqmp-mini-nand.dts b/arch/arm/dts/zynqmp-mini-nand.dts
index e0517cf..5889d43 100644
--- a/arch/arm/dts/zynqmp-mini-nand.dts
+++ b/arch/arm/dts/zynqmp-mini-nand.dts
@@ -50,6 +50,12 @@
#size-cells = <1>;
arasan,has-mdma;
num-cs = <2>;
+ nand@0 {
+ reg = <0>;
+ #address-cells = <2>;
+ #size-cells = <1>;
+ nand-ecc-mode = "hw";
+ };
};
};
};
diff --git a/arch/arm/dts/zynqmp-sc-revB.dts b/arch/arm/dts/zynqmp-sc-revB.dts
index 8517bda..c1d713b 100644
--- a/arch/arm/dts/zynqmp-sc-revB.dts
+++ b/arch/arm/dts/zynqmp-sc-revB.dts
@@ -49,7 +49,7 @@
gpio-keys {
compatible = "gpio-keys";
autorepeat;
- fwuen {
+ key-fwuen {
label = "sw16";
gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
linux,code = <BTN_MISC>;
@@ -192,7 +192,7 @@
status = "okay";
/* QSPI should also have PINCTRL setup */
flash@0 {
- compatible = "mt25qu512a", "m25p80", "jedec,spi-nor"; /* mt25qu512abb8e12 512Mib */
+ compatible = "m25p80", "jedec,spi-nor"; /* mt25qu512abb8e12 512Mib */
#address-cells = <1>;
#size-cells = <1>;
reg = <0>;
diff --git a/arch/arm/dts/zynqmp-sck-kd-g-revA.dtso b/arch/arm/dts/zynqmp-sck-kd-g-revA.dtso
index 5202b7c..1727a1c 100644
--- a/arch/arm/dts/zynqmp-sck-kd-g-revA.dtso
+++ b/arch/arm/dts/zynqmp-sck-kd-g-revA.dtso
@@ -356,6 +356,8 @@
&uart0 {
status = "okay";
+ rts-gpios = <&gpio 72 GPIO_ACTIVE_HIGH>;
+ linux,rs485-enabled-at-boot-time;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart0_default>;
assigned-clock-rates = <100000000>;
diff --git a/arch/arm/dts/zynqmp-sck-kr-g-revB.dtso b/arch/arm/dts/zynqmp-sck-kr-g-revB.dtso
index 6c29f65..0a0cbd2 100644
--- a/arch/arm/dts/zynqmp-sck-kr-g-revB.dtso
+++ b/arch/arm/dts/zynqmp-sck-kr-g-revB.dtso
@@ -66,6 +66,18 @@
#clock-cells = <0>;
clock-frequency = <74250000>;
};
+
+ dpcon {
+ compatible = "dp-connector";
+ label = "P11";
+ type = "full-size";
+
+ port {
+ dpcon_in: endpoint {
+ remote-endpoint = <&dpsub_dp_out>;
+ };
+ };
+ };
};
&i2c1 { /* I2C_SCK C26/C27 - MIO from SOM */
@@ -130,6 +142,14 @@
phy-names = "dp-phy0";
phys = <&psgtr 1 PHY_TYPE_DP 0 1>;
assigned-clock-rates = <27000000>, <25000000>, <300000000>;
+
+ ports {
+ port@5 {
+ dpsub_dp_out: endpoint {
+ remote-endpoint = <&dpcon_in>;
+ };
+ };
+ };
};
&zynqmp_dpdma {
diff --git a/arch/arm/dts/zynqmp-sck-kv-g-revA.dtso b/arch/arm/dts/zynqmp-sck-kv-g-revA.dtso
index 6d0d5c4..561b546 100644
--- a/arch/arm/dts/zynqmp-sck-kv-g-revA.dtso
+++ b/arch/arm/dts/zynqmp-sck-kv-g-revA.dtso
@@ -342,6 +342,7 @@
slew-rate = <SLEW_RATE_SLOW>;
power-source = <IO_STANDARD_LVCMOS18>;
bias-disable;
+ output-enable;
};
conf-cd {
diff --git a/arch/arm/dts/zynqmp-sck-kv-g-revB.dtso b/arch/arm/dts/zynqmp-sck-kv-g-revB.dtso
index a4b4465..64683e0 100644
--- a/arch/arm/dts/zynqmp-sck-kv-g-revB.dtso
+++ b/arch/arm/dts/zynqmp-sck-kv-g-revB.dtso
@@ -63,6 +63,18 @@
#clock-cells = <0>;
clock-frequency = <27000000>;
};
+
+ dpcon {
+ compatible = "dp-connector";
+ label = "P11";
+ type = "full-size";
+
+ port {
+ dpcon_in: endpoint {
+ remote-endpoint = <&dpsub_dp_out>;
+ };
+ };
+ };
};
&i2c1 { /* I2C_SCK C23/C24 - MIO from SOM */
@@ -97,6 +109,14 @@
phy-names = "dp-phy0", "dp-phy1";
phys = <&psgtr 1 PHY_TYPE_DP 0 0>, <&psgtr 0 PHY_TYPE_DP 1 0>;
assigned-clock-rates = <27000000>, <25000000>, <300000000>;
+
+ ports {
+ port@5 {
+ dpsub_dp_out: endpoint {
+ remote-endpoint = <&dpcon_in>;
+ };
+ };
+ };
};
&zynqmp_dpdma {
@@ -329,6 +349,7 @@
slew-rate = <SLEW_RATE_SLOW>;
power-source = <IO_STANDARD_LVCMOS18>;
bias-disable;
+ output-enable;
};
conf-cd {
diff --git a/arch/arm/dts/zynqmp-vp-x-a2785-00-revA.dts b/arch/arm/dts/zynqmp-vp-x-a2785-00-revA.dts
index 2a3bbe1..b626d1a 100644
--- a/arch/arm/dts/zynqmp-vp-x-a2785-00-revA.dts
+++ b/arch/arm/dts/zynqmp-vp-x-a2785-00-revA.dts
@@ -47,7 +47,7 @@
gpio-keys {
compatible = "gpio-keys";
autorepeat;
- j383 {
+ key-j383 {
label = "j383";
gpios = <&gpio 10 GPIO_ACTIVE_HIGH>;
linux,code = <BTN_MISC>;
diff --git a/arch/arm/dts/zynqmp-vpk120-revA.dts b/arch/arm/dts/zynqmp-vpk120-revA.dts
index e0e4f1b..e063288 100644
--- a/arch/arm/dts/zynqmp-vpk120-revA.dts
+++ b/arch/arm/dts/zynqmp-vpk120-revA.dts
@@ -47,7 +47,7 @@
gpio-keys {
compatible = "gpio-keys";
autorepeat;
- sw16 {
+ button-16 {
label = "sw16";
gpios = <&gpio 10 GPIO_ACTIVE_HIGH>;
linux,code = <BTN_MISC>;
diff --git a/arch/arm/dts/zynqmp-zc1751-xm017-dc3.dts b/arch/arm/dts/zynqmp-zc1751-xm017-dc3.dts
index b97f7ee..48ab619 100644
--- a/arch/arm/dts/zynqmp-zc1751-xm017-dc3.dts
+++ b/arch/arm/dts/zynqmp-zc1751-xm017-dc3.dts
@@ -136,8 +136,7 @@
reg = <0x0>;
#address-cells = <0x2>;
#size-cells = <0x1>;
- nand-ecc-mode = "soft";
- nand-ecc-algo = "bch";
+ nand-ecc-mode = "hw";
nand-rb = <0>;
label = "main-storage-0";
nand-ecc-step-size = <1024>;
@@ -173,8 +172,7 @@
reg = <0x1>;
#address-cells = <0x2>;
#size-cells = <0x1>;
- nand-ecc-mode = "soft";
- nand-ecc-algo = "bch";
+ nand-ecc-mode = "hw";
nand-rb = <0>;
label = "main-storage-1";
nand-ecc-step-size = <1024>;
diff --git a/arch/arm/dts/zynqmp-zcu208-revA.dts b/arch/arm/dts/zynqmp-zcu208-revA.dts
index b4e2474..a113e47 100644
--- a/arch/arm/dts/zynqmp-zcu208-revA.dts
+++ b/arch/arm/dts/zynqmp-zcu208-revA.dts
@@ -46,7 +46,7 @@
gpio-keys {
compatible = "gpio-keys";
autorepeat;
- sw19 {
+ switch-19 {
label = "sw19";
gpios = <&gpio 22 GPIO_ACTIVE_HIGH>;
linux,code = <KEY_DOWN>;
diff --git a/arch/arm/dts/zynqmp-zcu216-revA.dts b/arch/arm/dts/zynqmp-zcu216-revA.dts
index 6f593e8..4d7d5d2 100644
--- a/arch/arm/dts/zynqmp-zcu216-revA.dts
+++ b/arch/arm/dts/zynqmp-zcu216-revA.dts
@@ -46,7 +46,7 @@
gpio-keys {
compatible = "gpio-keys";
autorepeat;
- sw19 {
+ switch-19 {
label = "sw19";
gpios = <&gpio 22 GPIO_ACTIVE_HIGH>;
linux,code = <KEY_DOWN>;
diff --git a/arch/arm/dts/zynqmp-zcu670-revA.dts b/arch/arm/dts/zynqmp-zcu670-revA.dts
index 7f70904..def3b53 100644
--- a/arch/arm/dts/zynqmp-zcu670-revA.dts
+++ b/arch/arm/dts/zynqmp-zcu670-revA.dts
@@ -49,7 +49,7 @@
gpio-keys {
compatible = "gpio-keys";
autorepeat;
- sw1 {
+ switch-1 {
label = "sw1";
gpios = <&gpio 22 GPIO_ACTIVE_HIGH>;
linux,code = <BTN_MISC>;
diff --git a/arch/arm/dts/zynqmp-zcu670-revB.dts b/arch/arm/dts/zynqmp-zcu670-revB.dts
index 0adb206..41f9a23 100644
--- a/arch/arm/dts/zynqmp-zcu670-revB.dts
+++ b/arch/arm/dts/zynqmp-zcu670-revB.dts
@@ -49,7 +49,7 @@
gpio-keys {
compatible = "gpio-keys";
autorepeat;
- sw1 {
+ switch-1 {
label = "sw1";
gpios = <&gpio 22 GPIO_ACTIVE_HIGH>;
linux,code = <BTN_MISC>;
diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi
index b50b83b..53a606c 100644
--- a/arch/arm/dts/zynqmp.dtsi
+++ b/arch/arm/dts/zynqmp.dtsi
@@ -168,7 +168,7 @@
bootph-all;
};
- pmu {
+ pmu: pmu {
compatible = "arm,armv8-pmuv3";
interrupt-parent = <&gic>;
interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>,
@@ -1001,14 +1001,14 @@
status = "disabled";
reg = <0x0 0xfe200000 0x0 0x40000>;
interrupt-parent = <&gic>;
- interrupt-names = "host", "peripheral", "otg";
+ interrupt-names = "host", "peripheral", "otg", "wakeup";
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
+ <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
/* iommus = <&smmu 0x860>; */
snps,quirk-frame-length-adjustment = <0x20>;
clock-names = "ref";
- snps,enable_guctl1_ipd_quirk;
snps,resume-hs-terminations;
/* dma-coherent; */
};
@@ -1033,14 +1033,14 @@
status = "disabled";
reg = <0x0 0xfe300000 0x0 0x40000>;
interrupt-parent = <&gic>;
- interrupt-names = "host", "peripheral", "otg";
+ interrupt-names = "host", "peripheral", "otg", "wakeup";
interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
+ <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
/* iommus = <&smmu 0x861>; */
snps,quirk-frame-length-adjustment = <0x20>;
clock-names = "ref";
- snps,enable_guctl1_ipd_quirk;
snps,resume-hs-terminations;
/* dma-coherent; */
};
diff --git a/arch/arm/include/asm/arch-am33xx/clk_synthesizer.h b/arch/arm/include/asm/arch-am33xx/clk_synthesizer.h
index 8e3d55f..393bc7a 100644
--- a/arch/arm/include/asm/arch-am33xx/clk_synthesizer.h
+++ b/arch/arm/include/asm/arch-am33xx/clk_synthesizer.h
@@ -10,6 +10,8 @@
#ifndef __CLK_SYNTHESIZER_H
#define __CLK_SYNTHESIZER_H
+#include <linux/types.h>
+
#define CLK_SYNTHESIZER_ID_REG 0x0
#define CLK_SYNTHESIZER_XCSEL 0x05
#define CLK_SYNTHESIZER_MUX_REG 0x14
diff --git a/arch/arm/include/asm/arch-aspeed/scu_ast2500.h b/arch/arm/include/asm/arch-aspeed/scu_ast2500.h
index 50d6a6b..a415693 100644
--- a/arch/arm/include/asm/arch-aspeed/scu_ast2500.h
+++ b/arch/arm/include/asm/arch-aspeed/scu_ast2500.h
@@ -140,6 +140,7 @@
#define SCU_CLKDUTY_RGMII2TXCK_MASK (0x7f << SCU_CLKDUTY_RGMII2TXCK_SHIFT)
#ifndef __ASSEMBLY__
+#include <linux/types.h>
struct ast2500_clk_priv {
struct ast2500_scu *scu;
diff --git a/arch/arm/include/asm/arch-aspeed/scu_ast2600.h b/arch/arm/include/asm/arch-aspeed/scu_ast2600.h
index 251bfa2..a2c8852 100644
--- a/arch/arm/include/asm/arch-aspeed/scu_ast2600.h
+++ b/arch/arm/include/asm/arch-aspeed/scu_ast2600.h
@@ -125,6 +125,8 @@
#define SCU_MISC_CTRL1_UART5_DIV BIT(12)
#ifndef __ASSEMBLY__
+#include <linux/types.h>
+
struct ast2600_scu {
uint32_t prot_key1; /* 0x000 */
uint32_t chip_id1; /* 0x004 */
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h b/arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h
index 9e29350..a02bec9 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h
@@ -7,6 +7,8 @@
#ifndef __FSL_SERDES_H__
#define __FSL_SERDES_H__
+#include <linux/types.h>
+
#ifdef CONFIG_FSL_LSCH3
enum srds_prtcl {
/*
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
index 9794db0..147ca2f 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
@@ -6,6 +6,7 @@
#ifndef __ARCH_FSL_LSCH2_IMMAP_H__
#define __ARCH_FSL_LSCH2_IMMAP_H__
+#include <config.h>
#include <fsl_immap.h>
#ifndef __ASSEMBLY__
#include <linux/bitops.h>
diff --git a/arch/arm/include/asm/arch-imx8m/ddr.h b/arch/arm/include/asm/arch-imx8m/ddr.h
index c14855d..1f81d91 100644
--- a/arch/arm/include/asm/arch-imx8m/ddr.h
+++ b/arch/arm/include/asm/arch-imx8m/ddr.h
@@ -8,7 +8,7 @@
#include <asm/io.h>
#include <asm/types.h>
-#include <asm/arch/ddr.h>
+#include <asm/arch/imx-regs.h>
#define DDRC_DDR_SS_GPR0 0x3d000000
#define DDRC_IPS_BASE_ADDR_0 0x3f400000
diff --git a/arch/arm/include/asm/arch-imx9/mu.h b/arch/arm/include/asm/arch-imx9/mu.h
index b860499..649b8a6 100644
--- a/arch/arm/include/asm/arch-imx9/mu.h
+++ b/arch/arm/include/asm/arch-imx9/mu.h
@@ -8,6 +8,6 @@
#include <event.h>
-int imx9_probe_mu(void *ctx, struct event *event);
+int imx9_probe_mu(void);
#endif
diff --git a/arch/arm/include/asm/arch-ls102xa/fsl_serdes.h b/arch/arm/include/asm/arch-ls102xa/fsl_serdes.h
index 9244e0a..35e3ec7 100644
--- a/arch/arm/include/asm/arch-ls102xa/fsl_serdes.h
+++ b/arch/arm/include/asm/arch-ls102xa/fsl_serdes.h
@@ -6,6 +6,8 @@
#ifndef __FSL_SERDES_H
#define __FSL_SERDES_H
+#include <linux/types.h>
+
enum srds_prtcl {
/*
* Nobody will check whether the device 'NONE' has been configured,
diff --git a/arch/arm/include/asm/arch-mx5/clock.h b/arch/arm/include/asm/arch-mx5/clock.h
index d585b5c..58013a8 100644
--- a/arch/arm/include/asm/arch-mx5/clock.h
+++ b/arch/arm/include/asm/arch-mx5/clock.h
@@ -7,6 +7,8 @@
#ifndef __ASM_ARCH_CLOCK_H
#define __ASM_ARCH_CLOCK_H
+#include <stdbool.h>
+
#ifdef CONFIG_SYS_MX5_HCLK
#define MXC_HCLK CONFIG_SYS_MX5_HCLK
#else
diff --git a/arch/arm/include/asm/arch-mx7/sys_proto.h b/arch/arm/include/asm/arch-mx7/sys_proto.h
index 634736c..5da0037 100644
--- a/arch/arm/include/asm/arch-mx7/sys_proto.h
+++ b/arch/arm/include/asm/arch-mx7/sys_proto.h
@@ -7,6 +7,8 @@
#include <asm/mach-imx/sys_proto.h>
+struct wdog_regs;
+
void set_wdog_reset(struct wdog_regs *wdog);
#endif /* __SYS_PROTO_IMX7_ */
diff --git a/arch/arm/include/asm/arch-rockchip/bootrom.h b/arch/arm/include/asm/arch-rockchip/bootrom.h
index 4276a0f..e736772 100644
--- a/arch/arm/include/asm/arch-rockchip/bootrom.h
+++ b/arch/arm/include/asm/arch-rockchip/bootrom.h
@@ -7,6 +7,8 @@
#ifndef _ASM_ARCH_BOOTROM_H
#define _ASM_ARCH_BOOTROM_H
+#include <linux/types.h>
+
/*
* Saved Stack pointer address.
* Access might be needed in some special cases.
@@ -43,11 +45,14 @@
* Boot-device identifiers as used by the BROM
*/
enum {
+ BROM_BOOTSOURCE_UNKNOWN = 0,
BROM_BOOTSOURCE_NAND = 1,
BROM_BOOTSOURCE_EMMC = 2,
BROM_BOOTSOURCE_SPINOR = 3,
BROM_BOOTSOURCE_SPINAND = 4,
BROM_BOOTSOURCE_SD = 5,
+ BROM_BOOTSOURCE_I2C = 8,
+ BROM_BOOTSOURCE_SPI = 9,
BROM_BOOTSOURCE_USB = 10,
BROM_LAST_BOOTSOURCE = BROM_BOOTSOURCE_USB
};
diff --git a/arch/arm/include/asm/arch-rockchip/clock.h b/arch/arm/include/asm/arch-rockchip/clock.h
index f01c5ae..73e5283 100644
--- a/arch/arm/include/asm/arch-rockchip/clock.h
+++ b/arch/arm/include/asm/arch-rockchip/clock.h
@@ -6,6 +6,8 @@
#ifndef _ASM_ARCH_CLOCK_H
#define _ASM_ARCH_CLOCK_H
+#include <linux/types.h>
+
struct udevice;
/* define pll mode */
diff --git a/arch/arm/include/asm/arch-rk3308/cru_rk3308.h b/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
similarity index 95%
rename from arch/arm/include/asm/arch-rk3308/cru_rk3308.h
rename to arch/arm/include/asm/arch-rockchip/cru_rk3308.h
index 84b63e4..091ae82 100644
--- a/arch/arm/include/asm/arch-rk3308/cru_rk3308.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3308.h
@@ -147,6 +147,20 @@
CORE_DIV_CON_SHIFT = 0,
CORE_DIV_CON_MASK = 0x0f << CORE_DIV_CON_SHIFT,
+ /* CRU_CLK_SEL2_CON */
+ CLK_RTC32K_SEL_SHIFT = 8,
+ CLK_RTC32K_SEL_MASK = 3 << CLK_RTC32K_SEL_SHIFT,
+ CLK_RTC32K_IO = 0,
+ CLK_RTC32K_PVTM,
+ CLK_RTC32K_FRAC_DIV,
+ CLK_RTC32K_DIV,
+
+ /* CRU_CLK_SEL3_CON */
+ CLK_RTC32K_FRAC_NUMERATOR_SHIFT = 16,
+ CLK_RTC32K_FRAC_NUMERATOR_MASK = 0xffff << 16,
+ CLK_RTC32K_FRAC_DENOMINATOR_SHIFT = 0,
+ CLK_RTC32K_FRAC_DENOMINATOR_MASK = 0xffff,
+
/* CRU_CLK_SEL5_CON */
BUS_PLL_SEL_SHIFT = 6,
BUS_PLL_SEL_MASK = 0x3 << BUS_PLL_SEL_SHIFT,
diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3328.h b/arch/arm/include/asm/arch-rockchip/cru_rk3328.h
index 226744d..4ad1d33 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3328.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3328.h
@@ -62,6 +62,40 @@
enum apll_frequencies {
APLL_816_MHZ,
APLL_600_MHZ,
+
+ /* CRU_CLK_SEL37_CON */
+ ACLK_VIO_PLL_SEL_CPLL = 0,
+ ACLK_VIO_PLL_SEL_GPLL = 1,
+ ACLK_VIO_PLL_SEL_HDMIPHY = 2,
+ ACLK_VIO_PLL_SEL_USB480M = 3,
+ ACLK_VIO_PLL_SEL_SHIFT = 6,
+ ACLK_VIO_PLL_SEL_MASK = 3 << ACLK_VIO_PLL_SEL_SHIFT,
+ ACLK_VIO_DIV_CON_SHIFT = 0,
+ ACLK_VIO_DIV_CON_MASK = 0x1f << ACLK_VIO_DIV_CON_SHIFT,
+ HCLK_VIO_DIV_CON_SHIFT = 8,
+ HCLK_VIO_DIV_CON_MASK = 0x1f << HCLK_VIO_DIV_CON_SHIFT,
+
+ /* CRU_CLK_SEL39_CON */
+ ACLK_VOP_PLL_SEL_CPLL = 0,
+ ACLK_VOP_PLL_SEL_GPLL = 1,
+ ACLK_VOP_PLL_SEL_HDMIPHY = 2,
+ ACLK_VOP_PLL_SEL_USB480M = 3,
+ ACLK_VOP_PLL_SEL_SHIFT = 6,
+ ACLK_VOP_PLL_SEL_MASK = 3 << ACLK_VOP_PLL_SEL_SHIFT,
+ ACLK_VOP_DIV_CON_SHIFT = 0,
+ ACLK_VOP_DIV_CON_MASK = 0x1f << ACLK_VOP_DIV_CON_SHIFT,
+
+ /* CRU_CLK_SEL40_CON */
+ DCLK_LCDC_PLL_SEL_GPLL = 0,
+ DCLK_LCDC_PLL_SEL_CPLL = 1,
+ DCLK_LCDC_PLL_SEL_SHIFT = 0,
+ DCLK_LCDC_PLL_SEL_MASK = 1 << DCLK_LCDC_PLL_SEL_SHIFT,
+ DCLK_LCDC_SEL_HDMIPHY = 0,
+ DCLK_LCDC_SEL_PLL = 1,
+ DCLK_LCDC_SEL_SHIFT = 1,
+ DCLK_LCDC_SEL_MASK = 1 << DCLK_LCDC_SEL_SHIFT,
+ DCLK_LCDC_DIV_CON_SHIFT = 8,
+ DCLK_LCDC_DIV_CON_MASK = 0xFf << DCLK_LCDC_DIV_CON_SHIFT,
};
void rk3328_configure_cpu(struct rk3328_cru *cru,
diff --git a/arch/arm/include/asm/arch-rk3308/grf_rk3308.h b/arch/arm/include/asm/arch-rockchip/grf_rk3308.h
similarity index 99%
rename from arch/arm/include/asm/arch-rk3308/grf_rk3308.h
rename to arch/arm/include/asm/arch-rockchip/grf_rk3308.h
index a995bb9..f4bbc24 100644
--- a/arch/arm/include/asm/arch-rk3308/grf_rk3308.h
+++ b/arch/arm/include/asm/arch-rockchip/grf_rk3308.h
@@ -5,6 +5,8 @@
#ifndef _ASM_ARCH_GRF_rk3308_H
#define _ASM_ARCH_GRF_rk3308_H
+#include <linux/kernel.h>
+
struct rk3308_grf {
unsigned int gpio0a_iomux;
unsigned int reserved0;
diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun9i.h b/arch/arm/include/asm/arch-sunxi/clock_sun9i.h
index fe6b8ba..0264bfe 100644
--- a/arch/arm/include/asm/arch-sunxi/clock_sun9i.h
+++ b/arch/arm/include/asm/arch-sunxi/clock_sun9i.h
@@ -220,10 +220,7 @@
#ifndef __ASSEMBLY__
void clock_set_pll1(unsigned int clk);
-void clock_set_pll2(unsigned int clk);
-void clock_set_pll4(unsigned int clk);
void clock_set_pll6(unsigned int clk);
-void clock_set_pll12(unsigned int clk);
unsigned int clock_get_pll4_periph0(void);
#endif
diff --git a/arch/arm/include/asm/arch-sunxi/pmic_bus.h b/arch/arm/include/asm/arch-sunxi/pmic_bus.h
index 5ab9b28..e26459f 100644
--- a/arch/arm/include/asm/arch-sunxi/pmic_bus.h
+++ b/arch/arm/include/asm/arch-sunxi/pmic_bus.h
@@ -8,6 +8,8 @@
#ifndef _SUNXI_PMIC_BUS_H
#define _SUNXI_PMIC_BUS_H
+#include <linux/types.h>
+
int pmic_bus_init(void);
int pmic_bus_read(u8 reg, u8 *data);
int pmic_bus_write(u8 reg, u8 data);
diff --git a/arch/arm/include/asm/arch-sunxi/tve.h b/arch/arm/include/asm/arch-sunxi/tve.h
index 46cd87e..4fbb4b9 100644
--- a/arch/arm/include/asm/arch-sunxi/tve.h
+++ b/arch/arm/include/asm/arch-sunxi/tve.h
@@ -9,6 +9,8 @@
#ifndef _TVE_H
#define _TVE_H
+#include <linux/types.h>
+
enum tve_mode {
tve_mode_vga,
tve_mode_composite_pal,
diff --git a/arch/arm/include/asm/arch-sunxi/tzpc.h b/arch/arm/include/asm/arch-sunxi/tzpc.h
index 7a6fcae..9269608 100644
--- a/arch/arm/include/asm/arch-sunxi/tzpc.h
+++ b/arch/arm/include/asm/arch-sunxi/tzpc.h
@@ -28,6 +28,12 @@
#define SUN8I_H3_TZPC_DECPORT1_ALL 0xff
#define SUN8I_H3_TZPC_DECPORT2_ALL 0x7f
+#if defined CONFIG_MACH_SUN6I || defined CONFIG_MACH_SUN8I_H3
void tzpc_init(void);
+#else
+static inline void tzpc_init(void)
+{
+}
+#endif
#endif /* _SUNXI_TZPC_H */
diff --git a/arch/arm/include/asm/arch-tegra/ap.h b/arch/arm/include/asm/arch-tegra/ap.h
index 78aeb25..b922b2d 100644
--- a/arch/arm/include/asm/arch-tegra/ap.h
+++ b/arch/arm/include/asm/arch-tegra/ap.h
@@ -4,6 +4,7 @@
* NVIDIA Corporation <www.nvidia.com>
*/
#include <asm/types.h>
+#include <asm/arch-tegra/tegra.h>
/* Stabilization delays, in usec */
#define PLL_STABILIZATION_DELAY (300)
diff --git a/arch/arm/include/asm/arch-tegra/cboot.h b/arch/arm/include/asm/arch-tegra/cboot.h
index 4e1da98..d0ba83a 100644
--- a/arch/arm/include/asm/arch-tegra/cboot.h
+++ b/arch/arm/include/asm/arch-tegra/cboot.h
@@ -6,6 +6,8 @@
#ifndef _TEGRA_CBOOT_H_
#define _TEGRA_CBOOT_H_
+#include <linux/errno.h>
+#include <linux/types.h>
#include <net.h>
#ifdef CONFIG_ARM64
diff --git a/arch/arm/include/asm/arch-tegra/dc.h b/arch/arm/include/asm/arch-tegra/dc.h
index 7613d84..ca37184 100644
--- a/arch/arm/include/asm/arch-tegra/dc.h
+++ b/arch/arm/include/asm/arch-tegra/dc.h
@@ -443,6 +443,11 @@
#define WINDOW_D_SELECT BIT(7)
#define WINDOW_H_SELECT BIT(8)
+/* DC_COM_PIN_OUTPUT_POLARITY1 0x307 */
+#define LHS_OUTPUT_POLARITY_LOW BIT(30)
+#define LVS_OUTPUT_POLARITY_LOW BIT(28)
+#define LSC0_OUTPUT_POLARITY_LOW BIT(24)
+
/* DC_DISP_DISP_WIN_OPTIONS 0x402 */
#define CURSOR_ENABLE BIT(16)
#define SOR_ENABLE BIT(25)
@@ -569,12 +574,4 @@
#define DC_N_WINDOWS 5
#define DC_REG_SAVE_SPACE (DC_N_WINDOWS + 5)
-#define TEGRA_DSI_A "dsi@54300000"
-#define TEGRA_DSI_B "dsi@54400000"
-
-struct tegra_dc_plat {
- struct udevice *dev; /* Display controller device */
- struct dc_ctlr *dc; /* Display controller regmap */
-};
-
#endif /* __ASM_ARCH_TEGRA_DC_H */
diff --git a/arch/arm/include/asm/arch-tegra/gpio.h b/arch/arm/include/asm/arch-tegra/gpio.h
index fe7b3a5..3c1838c 100644
--- a/arch/arm/include/asm/arch-tegra/gpio.h
+++ b/arch/arm/include/asm/arch-tegra/gpio.h
@@ -6,6 +6,7 @@
#ifndef _TEGRA_GPIO_H_
#define _TEGRA_GPIO_H_
+#include <linux/types.h>
#include <dt-bindings/gpio/tegra-gpio.h>
#define TEGRA_GPIOS_PER_PORT 8
diff --git a/arch/arm/include/asm/arch-tegra/tegra_i2c.h b/arch/arm/include/asm/arch-tegra/tegra_i2c.h
index afec6bb..dc8db39 100644
--- a/arch/arm/include/asm/arch-tegra/tegra_i2c.h
+++ b/arch/arm/include/asm/arch-tegra/tegra_i2c.h
@@ -10,6 +10,7 @@
#include <asm/io.h>
#include <asm/types.h>
+#include <asm/arch/tegra.h>
struct udevice;
diff --git a/arch/arm/include/asm/arch-tegra114/pwm.h b/arch/arm/include/asm/arch-tegra114/pwm.h
new file mode 100644
index 0000000..af39151
--- /dev/null
+++ b/arch/arm/include/asm/arch-tegra114/pwm.h
@@ -0,0 +1,13 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Tegra pulse width frequency modulator definitions
+ *
+ * Copyright (c) 2011 The Chromium OS Authors.
+ */
+
+#ifndef __ASM_ARCH_TEGRA114_PWM_H
+#define __ASM_ARCH_TEGRA114_PWM_H
+
+#include <asm/arch-tegra/pwm.h>
+
+#endif /* __ASM_ARCH_TEGRA114_PWM_H */
diff --git a/arch/arm/include/asm/arch-tegra20/display.h b/arch/arm/include/asm/arch-tegra20/display.h
deleted file mode 100644
index e7b3cff..0000000
--- a/arch/arm/include/asm/arch-tegra20/display.h
+++ /dev/null
@@ -1,28 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * (C) Copyright 2010
- * NVIDIA Corporation <www.nvidia.com>
- */
-
-#ifndef __ASM_ARCH_TEGRA_DISPLAY_H
-#define __ASM_ARCH_TEGRA_DISPLAY_H
-
-#include <asm/arch-tegra/dc.h>
-
-/* This holds information about a window which can be displayed */
-struct disp_ctl_win {
- enum win_color_depth_id fmt; /* Color depth/format */
- unsigned bpp; /* Bits per pixel */
- phys_addr_t phys_addr; /* Physical address in memory */
- unsigned x; /* Horizontal address offset (bytes) */
- unsigned y; /* Veritical address offset (bytes) */
- unsigned w; /* Width of source window */
- unsigned h; /* Height of source window */
- unsigned stride; /* Number of bytes per line */
- unsigned out_x; /* Left edge of output window (col) */
- unsigned out_y; /* Top edge of output window (row) */
- unsigned out_w; /* Width of output window in pixels */
- unsigned out_h; /* Height of output window in pixels */
-};
-
-#endif /*__ASM_ARCH_TEGRA_DISPLAY_H*/
diff --git a/arch/arm/include/asm/arch-tegra30/display.h b/arch/arm/include/asm/arch-tegra30/display.h
deleted file mode 100644
index 9411525..0000000
--- a/arch/arm/include/asm/arch-tegra30/display.h
+++ /dev/null
@@ -1,28 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * (C) Copyright 2010
- * NVIDIA Corporation <www.nvidia.com>
- */
-
-#ifndef __ASM_ARCH_TEGRA_DISPLAY_H
-#define __ASM_ARCH_TEGRA_DISPLAY_H
-
-#include <asm/arch-tegra/dc.h>
-
-/* This holds information about a window which can be displayed */
-struct disp_ctl_win {
- enum win_color_depth_id fmt; /* Color depth/format */
- unsigned int bpp; /* Bits per pixel */
- phys_addr_t phys_addr; /* Physical address in memory */
- unsigned int x; /* Horizontal address offset (bytes) */
- unsigned int y; /* Veritical address offset (bytes) */
- unsigned int w; /* Width of source window */
- unsigned int h; /* Height of source window */
- unsigned int stride; /* Number of bytes per line */
- unsigned int out_x; /* Left edge of output window (col) */
- unsigned int out_y; /* Top edge of output window (row) */
- unsigned int out_w; /* Width of output window in pixels */
- unsigned int out_h; /* Height of output window in pixels */
-};
-
-#endif /*__ASM_ARCH_TEGRA_DISPLAY_H*/
diff --git a/arch/arm/include/asm/esr.h b/arch/arm/include/asm/esr.h
index f19e4e7..9948873 100644
--- a/arch/arm/include/asm/esr.h
+++ b/arch/arm/include/asm/esr.h
@@ -7,6 +7,7 @@
#ifndef __ASM_ESR_H
#define __ASM_ESR_H
+#include <stdbool.h>
#include <asm/memory.h>
#include <linux/const.h>
diff --git a/arch/arm/include/asm/global_data.h b/arch/arm/include/asm/global_data.h
index 452bcd1..45401d5 100644
--- a/arch/arm/include/asm/global_data.h
+++ b/arch/arm/include/asm/global_data.h
@@ -12,6 +12,7 @@
#include <config.h>
#include <linux/types.h>
+#include <asm/u-boot.h>
/* Architecture-specific global data */
struct arch_global_data {
diff --git a/arch/arm/include/asm/mach-imx/gpio.h b/arch/arm/include/asm/mach-imx/gpio.h
index 1b7c9cd..2576352 100644
--- a/arch/arm/include/asm/mach-imx/gpio.h
+++ b/arch/arm/include/asm/mach-imx/gpio.h
@@ -9,6 +9,8 @@
#define __ASM_ARCH_IMX_GPIO_H
#if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
+#include <linux/types.h>
+
/* GPIO registers */
struct gpio_regs {
u32 gpio_dr; /* data */
diff --git a/arch/arm/include/asm/ti-common/davinci_nand.h b/arch/arm/include/asm/ti-common/davinci_nand.h
index 38a1a6e..84fe01e 100644
--- a/arch/arm/include/asm/ti-common/davinci_nand.h
+++ b/arch/arm/include/asm/ti-common/davinci_nand.h
@@ -9,6 +9,7 @@
#ifndef _DAVINCI_NAND_H_
#define _DAVINCI_NAND_H_
+#include <config.h>
#include <asm/arch/hardware.h>
#define NAND_READ_START 0x00
diff --git a/arch/arm/lib/asm-offsets.c b/arch/arm/lib/asm-offsets.c
index 181a8ac..9afd837 100644
--- a/arch/arm/lib/asm-offsets.c
+++ b/arch/arm/lib/asm-offsets.c
@@ -16,7 +16,6 @@
* Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
*/
-#include <common.h>
#include <linux/kbuild.h>
#include <linux/arm-smccc.h>
diff --git a/arch/arm/lib/bdinfo.c b/arch/arm/lib/bdinfo.c
index b88b01e..7c49462 100644
--- a/arch/arm/lib/bdinfo.c
+++ b/arch/arm/lib/bdinfo.c
@@ -6,7 +6,7 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
+#include <config.h>
#include <init.h>
#include <asm/global_data.h>
#include <asm/mach-types.h>
diff --git a/arch/arm/lib/bootm-fdt.c b/arch/arm/lib/bootm-fdt.c
index 29020bd..2671f9a 100644
--- a/arch/arm/lib/bootm-fdt.c
+++ b/arch/arm/lib/bootm-fdt.c
@@ -14,7 +14,6 @@
* Copyright (C) 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl)
*/
-#include <common.h>
#include <fdt_support.h>
#ifdef CONFIG_ARMV7_NONSEC
#include <asm/armv7.h>
diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c
index f30a483..192c120 100644
--- a/arch/arm/lib/bootm.c
+++ b/arch/arm/lib/bootm.c
@@ -11,7 +11,6 @@
* Copyright (C) 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl)
*/
-#include <common.h>
#include <bootm.h>
#include <bootstage.h>
#include <command.h>
diff --git a/arch/arm/lib/cache-cp15.c b/arch/arm/lib/cache-cp15.c
index 0893915..947012f 100644
--- a/arch/arm/lib/cache-cp15.c
+++ b/arch/arm/lib/cache-cp15.c
@@ -4,7 +4,6 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
#include <cpu_func.h>
#include <log.h>
#include <asm/global_data.h>
diff --git a/arch/arm/lib/cache-pl310.c b/arch/arm/lib/cache-pl310.c
index d05314e..0afd388 100644
--- a/arch/arm/lib/cache-pl310.c
+++ b/arch/arm/lib/cache-pl310.c
@@ -9,7 +9,6 @@
#include <asm/armv7.h>
#include <asm/pl310.h>
#include <config.h>
-#include <common.h>
struct pl310_regs *const pl310 = (struct pl310_regs *)CFG_SYS_PL310_BASE;
diff --git a/arch/arm/lib/cache.c b/arch/arm/lib/cache.c
index 7a16015..b2ae74a 100644
--- a/arch/arm/lib/cache.c
+++ b/arch/arm/lib/cache.c
@@ -6,7 +6,7 @@
/* for now: just dummy functions to satisfy the linker */
-#include <common.h>
+#include <config.h>
#include <cpu_func.h>
#include <log.h>
#include <malloc.h>
diff --git a/arch/arm/lib/cmd_boot.c b/arch/arm/lib/cmd_boot.c
index c905ecc..5df5bc3 100644
--- a/arch/arm/lib/cmd_boot.c
+++ b/arch/arm/lib/cmd_boot.c
@@ -17,7 +17,6 @@
* Copyright 2015 Konsulko Group, Matt Porter <mporter@konsulko.com>
*/
-#include <common.h>
#include <command.h>
/*
diff --git a/arch/arm/lib/eabi_compat.c b/arch/arm/lib/eabi_compat.c
index f702991..0a96ba1 100644
--- a/arch/arm/lib/eabi_compat.c
+++ b/arch/arm/lib/eabi_compat.c
@@ -5,7 +5,9 @@
* (C) Copyright 2009 Wolfgang Denk <wd@denx.de>
*/
-#include <common.h>
+#include <stdio.h>
+#include <linux/stddef.h>
+#include <linux/string.h>
int raise (int signum)
{
diff --git a/arch/arm/lib/gic-v3-its.c b/arch/arm/lib/gic-v3-its.c
index f4bbd21..2cc0a32 100644
--- a/arch/arm/lib/gic-v3-its.c
+++ b/arch/arm/lib/gic-v3-its.c
@@ -2,7 +2,6 @@
/*
* Copyright 2019 Broadcom.
*/
-#include <common.h>
#include <cpu_func.h>
#include <dm.h>
#include <asm/gic.h>
diff --git a/arch/arm/lib/image.c b/arch/arm/lib/image.c
index e394c1a..1f672ee 100644
--- a/arch/arm/lib/image.c
+++ b/arch/arm/lib/image.c
@@ -4,7 +4,6 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
#include <image.h>
#include <mapmem.h>
#include <asm/global_data.h>
diff --git a/arch/arm/lib/interrupts.c b/arch/arm/lib/interrupts.c
index 9961472..333a502 100644
--- a/arch/arm/lib/interrupts.c
+++ b/arch/arm/lib/interrupts.c
@@ -18,7 +18,6 @@
* Philippe Robin, ARM Ltd. <philippe.robin@arm.com>
*/
-#include <common.h>
#include <cpu_func.h>
#include <efi_loader.h>
#include <irq_func.h>
diff --git a/arch/arm/lib/interrupts_64.c b/arch/arm/lib/interrupts_64.c
index 125dc0b..b3024ba 100644
--- a/arch/arm/lib/interrupts_64.c
+++ b/arch/arm/lib/interrupts_64.c
@@ -4,7 +4,6 @@
* David Feng <fenghua@phytium.com.cn>
*/
-#include <common.h>
#include <asm/esr.h>
#include <asm/global_data.h>
#include <asm/ptrace.h>
diff --git a/arch/arm/lib/interrupts_m.c b/arch/arm/lib/interrupts_m.c
index 277854a..b977961 100644
--- a/arch/arm/lib/interrupts_m.c
+++ b/arch/arm/lib/interrupts_m.c
@@ -4,9 +4,10 @@
* Kamil Lulko, <kamil.lulko@gmail.com>
*/
-#include <common.h>
+#include <stdio.h>
#include <cpu_func.h>
#include <irq_func.h>
+#include <vsprintf.h>
/*
* Upon exception entry ARMv7-M processors automatically save stack
diff --git a/arch/arm/lib/psci-dt.c b/arch/arm/lib/psci-dt.c
index 903b335..be800a3 100644
--- a/arch/arm/lib/psci-dt.c
+++ b/arch/arm/lib/psci-dt.c
@@ -3,7 +3,6 @@
* Copyright 2016 NXP Semiconductor, Inc.
*/
-#include <common.h>
#include <asm/cache.h>
#include <linux/libfdt.h>
#include <fdt_support.h>
diff --git a/arch/arm/lib/reset.c b/arch/arm/lib/reset.c
index 3e051e3..c9796a4 100644
--- a/arch/arm/lib/reset.c
+++ b/arch/arm/lib/reset.c
@@ -20,7 +20,6 @@
* (C) Copyright 2004 Texas Insturments
*/
-#include <common.h>
#include <command.h>
#include <cpu_func.h>
#include <irq_func.h>
diff --git a/arch/arm/lib/save_prev_bl_data.c b/arch/arm/lib/save_prev_bl_data.c
index b286bac..4357aca 100644
--- a/arch/arm/lib/save_prev_bl_data.c
+++ b/arch/arm/lib/save_prev_bl_data.c
@@ -10,7 +10,6 @@
#include <fdtdec.h>
#include <fdt_support.h>
#include <fdt.h>
-#include <common.h>
#include <linux/errno.h>
#include <asm/system.h>
#include <asm/armv8/mmu.h>
diff --git a/arch/arm/lib/spl.c b/arch/arm/lib/spl.c
index b138974..c43a63f 100644
--- a/arch/arm/lib/spl.c
+++ b/arch/arm/lib/spl.c
@@ -7,7 +7,6 @@
* Tom Rini <trini@ti.com>
*/
-#include <common.h>
#include <config.h>
#include <init.h>
#include <log.h>
diff --git a/arch/arm/lib/stack.c b/arch/arm/lib/stack.c
index 656084c..ea1b937 100644
--- a/arch/arm/lib/stack.c
+++ b/arch/arm/lib/stack.c
@@ -10,7 +10,6 @@
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
* Marius Groeger <mgroeger@sysgo.de>
*/
-#include <common.h>
#include <init.h>
#include <lmb.h>
#include <asm/global_data.h>
diff --git a/arch/arm/lib/zimage.c b/arch/arm/lib/zimage.c
index 45e9c45..5128725 100644
--- a/arch/arm/lib/zimage.c
+++ b/arch/arm/lib/zimage.c
@@ -6,7 +6,6 @@
* bootz code:
* Copyright (C) 2012 Marek Vasut <marek.vasut@gmail.com>
*/
-#include <common.h>
#include <image.h>
#define LINUX_ARM_ZIMAGE_MAGIC 0x016f2818
diff --git a/arch/arm/mach-apple/board.c b/arch/arm/mach-apple/board.c
index 7a6151a..8bace30 100644
--- a/arch/arm/mach-apple/board.c
+++ b/arch/arm/mach-apple/board.c
@@ -3,7 +3,6 @@
* (C) Copyright 2021 Mark Kettenis <kettenis@openbsd.org>
*/
-#include <common.h>
#include <dm.h>
#include <dm/uclass-internal.h>
#include <efi_loader.h>
diff --git a/arch/arm/mach-apple/rtkit.c b/arch/arm/mach-apple/rtkit.c
index a550b55..b8f4771 100644
--- a/arch/arm/mach-apple/rtkit.c
+++ b/arch/arm/mach-apple/rtkit.c
@@ -4,13 +4,14 @@
* (C) Copyright 2021 Copyright The Asahi Linux Contributors
*/
-#include <common.h>
#include <mailbox.h>
#include <malloc.h>
#include <asm/arch/rtkit.h>
#include <linux/apple-mailbox.h>
#include <linux/bitfield.h>
+#include <linux/errno.h>
+#include <linux/types.h>
#define APPLE_RTKIT_EP_MGMT 0
#define APPLE_RTKIT_EP_CRASHLOG 1
diff --git a/arch/arm/mach-aspeed/ast2500/board_common.c b/arch/arm/mach-aspeed/ast2500/board_common.c
index bae1027..531c2ad 100644
--- a/arch/arm/mach-aspeed/ast2500/board_common.c
+++ b/arch/arm/mach-aspeed/ast2500/board_common.c
@@ -2,7 +2,7 @@
/*
* Copyright (c) 2016 Google, Inc
*/
-#include <common.h>
+#include <config.h>
#include <dm.h>
#include <init.h>
#include <log.h>
diff --git a/arch/arm/mach-aspeed/ast2500/clk_ast2500.c b/arch/arm/mach-aspeed/ast2500/clk_ast2500.c
index 02bd3f6..50d7f99 100644
--- a/arch/arm/mach-aspeed/ast2500/clk_ast2500.c
+++ b/arch/arm/mach-aspeed/ast2500/clk_ast2500.c
@@ -3,7 +3,6 @@
* Copyright (C) 2016 Google, Inc
*/
-#include <common.h>
#include <dm.h>
#include <asm/io.h>
#include <asm/arch/scu_ast2500.h>
diff --git a/arch/arm/mach-aspeed/ast2600/board_common.c b/arch/arm/mach-aspeed/ast2600/board_common.c
index dc6cdc3..4c0b705 100644
--- a/arch/arm/mach-aspeed/ast2600/board_common.c
+++ b/arch/arm/mach-aspeed/ast2600/board_common.c
@@ -2,7 +2,7 @@
/*
* Copyright (c) Aspeed Technology Inc.
*/
-#include <common.h>
+#include <config.h>
#include <dm.h>
#include <ram.h>
#include <timer.h>
diff --git a/arch/arm/mach-aspeed/ast2600/spl.c b/arch/arm/mach-aspeed/ast2600/spl.c
index 0952e73..05390c1 100644
--- a/arch/arm/mach-aspeed/ast2600/spl.c
+++ b/arch/arm/mach-aspeed/ast2600/spl.c
@@ -2,7 +2,6 @@
/*
* Copyright (c) Aspeed Technology Inc.
*/
-#include <common.h>
#include <debug_uart.h>
#include <dm.h>
#include <spl.h>
diff --git a/arch/arm/mach-aspeed/ast_wdt.c b/arch/arm/mach-aspeed/ast_wdt.c
index 5bc442e..c420940 100644
--- a/arch/arm/mach-aspeed/ast_wdt.c
+++ b/arch/arm/mach-aspeed/ast_wdt.c
@@ -3,7 +3,6 @@
* (C) Copyright 2016 Google, Inc
*/
-#include <common.h>
#include <asm/io.h>
#include <asm/arch/wdt.h>
#include <linux/err.h>
diff --git a/arch/arm/mach-at91/arm920t/at91rm9200_devices.c b/arch/arm/mach-at91/arm920t/at91rm9200_devices.c
index c849885..459edad 100644
--- a/arch/arm/mach-at91/arm920t/at91rm9200_devices.c
+++ b/arch/arm/mach-at91/arm920t/at91rm9200_devices.c
@@ -10,7 +10,6 @@
* Lead Tech Design <www.leadtechdesign.com>
*/
-#include <common.h>
#include <asm/io.h>
#include <asm/arch/at91_common.h>
#include <asm/arch/clk.h>
diff --git a/arch/arm/mach-at91/arm920t/clock.c b/arch/arm/mach-at91/arm920t/clock.c
index 09ac66d..ac55a61 100644
--- a/arch/arm/mach-at91/arm920t/clock.c
+++ b/arch/arm/mach-at91/arm920t/clock.c
@@ -7,7 +7,7 @@
* Copyright (C) 2005 Ivan Kokshaysky
* Copyright (C) 2009 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
*/
-#include <common.h>
+#include <config.h>
#include <asm/global_data.h>
#include <asm/io.h>
#include <asm/arch/hardware.h>
diff --git a/arch/arm/mach-at91/arm920t/cpu.c b/arch/arm/mach-at91/arm920t/cpu.c
index 9bf03fd..579e76b 100644
--- a/arch/arm/mach-at91/arm920t/cpu.c
+++ b/arch/arm/mach-at91/arm920t/cpu.c
@@ -10,7 +10,7 @@
* Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
*/
-#include <common.h>
+#include <config.h>
#include <init.h>
#include <asm/io.h>
#include <asm/arch/hardware.h>
diff --git a/arch/arm/mach-at91/arm920t/reset.c b/arch/arm/mach-at91/arm920t/reset.c
index 91e3751..7582cef 100644
--- a/arch/arm/mach-at91/arm920t/reset.c
+++ b/arch/arm/mach-at91/arm920t/reset.c
@@ -13,7 +13,6 @@
* Alex Zuepke <azu@sysgo.de>
*/
-#include <common.h>
#include <cpu_func.h>
#include <asm/io.h>
#include <asm/arch/hardware.h>
diff --git a/arch/arm/mach-at91/arm920t/timer.c b/arch/arm/mach-at91/arm920t/timer.c
index 8ef5764..f7b4116 100644
--- a/arch/arm/mach-at91/arm920t/timer.c
+++ b/arch/arm/mach-at91/arm920t/timer.c
@@ -13,7 +13,7 @@
* Alex Zuepke <azu@sysgo.de>
*/
-#include <common.h>
+#include <config.h>
#include <init.h>
#include <time.h>
#include <asm/global_data.h>
diff --git a/arch/arm/mach-at91/arm926ejs/at91sam9260_devices.c b/arch/arm/mach-at91/arm926ejs/at91sam9260_devices.c
index c10571f..201c99a 100644
--- a/arch/arm/mach-at91/arm926ejs/at91sam9260_devices.c
+++ b/arch/arm/mach-at91/arm926ejs/at91sam9260_devices.c
@@ -5,7 +5,6 @@
* Lead Tech Design <www.leadtechdesign.com>
*/
-#include <common.h>
#include <dm.h>
#include <asm/io.h>
#include <asm/arch/at91sam9260_matrix.h>
diff --git a/arch/arm/mach-at91/arm926ejs/at91sam9261_devices.c b/arch/arm/mach-at91/arm926ejs/at91sam9261_devices.c
index 0c2b9f2..b8d209c 100644
--- a/arch/arm/mach-at91/arm926ejs/at91sam9261_devices.c
+++ b/arch/arm/mach-at91/arm926ejs/at91sam9261_devices.c
@@ -5,7 +5,6 @@
* Lead Tech Design <www.leadtechdesign.com>
*/
-#include <common.h>
#include <asm/io.h>
#include <asm/arch/at91_common.h>
#include <asm/arch/clk.h>
diff --git a/arch/arm/mach-at91/arm926ejs/at91sam9263_devices.c b/arch/arm/mach-at91/arm926ejs/at91sam9263_devices.c
index 3b8a462..1749662 100644
--- a/arch/arm/mach-at91/arm926ejs/at91sam9263_devices.c
+++ b/arch/arm/mach-at91/arm926ejs/at91sam9263_devices.c
@@ -9,7 +9,6 @@
* esd electronic system design gmbh <www.esd.eu>
*/
-#include <common.h>
#include <asm/io.h>
#include <asm/arch/at91_common.h>
#include <asm/arch/clk.h>
diff --git a/arch/arm/mach-at91/arm926ejs/at91sam9m10g45_devices.c b/arch/arm/mach-at91/arm926ejs/at91sam9m10g45_devices.c
index d517810..4c48148 100644
--- a/arch/arm/mach-at91/arm926ejs/at91sam9m10g45_devices.c
+++ b/arch/arm/mach-at91/arm926ejs/at91sam9m10g45_devices.c
@@ -5,7 +5,6 @@
* Lead Tech Design <www.leadtechdesign.com>
*/
-#include <common.h>
#include <dm.h>
#include <asm/arch/at91_common.h>
#include <asm/arch/clk.h>
diff --git a/arch/arm/mach-at91/arm926ejs/at91sam9n12_devices.c b/arch/arm/mach-at91/arm926ejs/at91sam9n12_devices.c
index 9f98ce7..4dc6e51 100644
--- a/arch/arm/mach-at91/arm926ejs/at91sam9n12_devices.c
+++ b/arch/arm/mach-at91/arm926ejs/at91sam9n12_devices.c
@@ -4,7 +4,6 @@
* Josh Wu <josh.wu@atmel.com>
*/
-#include <common.h>
#include <asm/io.h>
#include <asm/arch/at91_common.h>
#include <asm/arch/at91_pio.h>
diff --git a/arch/arm/mach-at91/arm926ejs/at91sam9rl_devices.c b/arch/arm/mach-at91/arm926ejs/at91sam9rl_devices.c
index b4002eb..4f5bafb 100644
--- a/arch/arm/mach-at91/arm926ejs/at91sam9rl_devices.c
+++ b/arch/arm/mach-at91/arm926ejs/at91sam9rl_devices.c
@@ -5,7 +5,6 @@
* Lead Tech Design <www.leadtechdesign.com>
*/
-#include <common.h>
#include <asm/io.h>
#include <asm/arch/at91_common.h>
#include <asm/arch/clk.h>
diff --git a/arch/arm/mach-at91/arm926ejs/at91sam9x5_devices.c b/arch/arm/mach-at91/arm926ejs/at91sam9x5_devices.c
index f44760b..40c8a58 100644
--- a/arch/arm/mach-at91/arm926ejs/at91sam9x5_devices.c
+++ b/arch/arm/mach-at91/arm926ejs/at91sam9x5_devices.c
@@ -3,7 +3,6 @@
* Copyright (C) 2012 Atmel Corporation
*/
-#include <common.h>
#include <asm/arch/at91_common.h>
#include <asm/arch/clk.h>
#include <asm/arch/gpio.h>
diff --git a/arch/arm/mach-at91/arm926ejs/clock.c b/arch/arm/mach-at91/arm926ejs/clock.c
index 013daf4..241de6a 100644
--- a/arch/arm/mach-at91/arm926ejs/clock.c
+++ b/arch/arm/mach-at91/arm926ejs/clock.c
@@ -7,7 +7,8 @@
* Copyright (C) 2009 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
*/
-#include <common.h>
+#include <config.h>
+#include <time.h>
#include <asm/global_data.h>
#include <asm/io.h>
#include <asm/arch/hardware.h>
diff --git a/arch/arm/mach-at91/arm926ejs/cpu.c b/arch/arm/mach-at91/arm926ejs/cpu.c
index 5e84b0a..e476cd5 100644
--- a/arch/arm/mach-at91/arm926ejs/cpu.c
+++ b/arch/arm/mach-at91/arm926ejs/cpu.c
@@ -6,7 +6,7 @@
* Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
*/
-#include <common.h>
+#include <config.h>
#include <init.h>
#include <vsprintf.h>
#include <asm/io.h>
diff --git a/arch/arm/mach-at91/arm926ejs/eflash.c b/arch/arm/mach-at91/arm926ejs/eflash.c
index aade13c..bb66700 100644
--- a/arch/arm/mach-at91/arm926ejs/eflash.c
+++ b/arch/arm/mach-at91/arm926ejs/eflash.c
@@ -42,7 +42,6 @@
* someone puts a jffs2 into them)
* do a read-modify-write for partially programmed pages
*/
-#include <common.h>
#include <display_options.h>
#include <flash.h>
#include <log.h>
diff --git a/arch/arm/mach-at91/arm926ejs/reset.c b/arch/arm/mach-at91/arm926ejs/reset.c
index 6acbfa3..01b2663 100644
--- a/arch/arm/mach-at91/arm926ejs/reset.c
+++ b/arch/arm/mach-at91/arm926ejs/reset.c
@@ -5,7 +5,6 @@
* Lead Tech Design <www.leadtechdesign.com>
*/
-#include <common.h>
#include <cpu_func.h>
#include <asm/io.h>
#include <asm/arch/hardware.h>
diff --git a/arch/arm/mach-at91/arm926ejs/sam9x60_devices.c b/arch/arm/mach-at91/arm926ejs/sam9x60_devices.c
index e3d3dd8..97c572d 100644
--- a/arch/arm/mach-at91/arm926ejs/sam9x60_devices.c
+++ b/arch/arm/mach-at91/arm926ejs/sam9x60_devices.c
@@ -3,7 +3,6 @@
* Copyright (C) 2018 Microchip Technology Inc. and its subsidiaries
*/
-#include <common.h>
#include <asm/arch/at91_common.h>
#include <asm/arch/clk.h>
#include <asm/arch/gpio.h>
diff --git a/arch/arm/mach-at91/arm926ejs/timer.c b/arch/arm/mach-at91/arm926ejs/timer.c
index a8cf0e4..137a5e5 100644
--- a/arch/arm/mach-at91/arm926ejs/timer.c
+++ b/arch/arm/mach-at91/arm926ejs/timer.c
@@ -5,7 +5,6 @@
* Lead Tech Design <www.leadtechdesign.com>
*/
-#include <common.h>
#include <init.h>
#include <time.h>
#include <asm/global_data.h>
diff --git a/arch/arm/mach-at91/armv7/clock.c b/arch/arm/mach-at91/armv7/clock.c
index 6bfa02d..5357b4c 100644
--- a/arch/arm/mach-at91/armv7/clock.c
+++ b/arch/arm/mach-at91/armv7/clock.c
@@ -9,7 +9,7 @@
* Copyright (C) 2015 Wenyou Yang <wenyou.yang@atmel.com>
*/
-#include <common.h>
+#include <config.h>
#include <asm/global_data.h>
#include <linux/delay.h>
#include <linux/errno.h>
diff --git a/arch/arm/mach-at91/armv7/cpu.c b/arch/arm/mach-at91/armv7/cpu.c
index 5ea7e26..f4b2f4f 100644
--- a/arch/arm/mach-at91/armv7/cpu.c
+++ b/arch/arm/mach-at91/armv7/cpu.c
@@ -8,7 +8,7 @@
* Bo Shen <voice.shen@atmel.com>
*/
-#include <common.h>
+#include <config.h>
#include <cpu_func.h>
#include <init.h>
#include <vsprintf.h>
diff --git a/arch/arm/mach-at91/armv7/sama5d2_devices.c b/arch/arm/mach-at91/armv7/sama5d2_devices.c
index edc2057..469c221 100644
--- a/arch/arm/mach-at91/armv7/sama5d2_devices.c
+++ b/arch/arm/mach-at91/armv7/sama5d2_devices.c
@@ -4,7 +4,6 @@
* Wenyou Yang <wenyou.yang@atmel.com>
*/
-#include <common.h>
#include <asm/io.h>
#include <asm/arch/clk.h>
#include <asm/arch/sama5d2.h>
diff --git a/arch/arm/mach-at91/armv7/sama5d3_devices.c b/arch/arm/mach-at91/armv7/sama5d3_devices.c
index 04b700a..67b6320 100644
--- a/arch/arm/mach-at91/armv7/sama5d3_devices.c
+++ b/arch/arm/mach-at91/armv7/sama5d3_devices.c
@@ -4,7 +4,6 @@
* Bo Shen <voice.shen@atmel.com>
*/
-#include <common.h>
#include <asm/arch/sama5d3.h>
#include <asm/arch/at91_common.h>
#include <asm/arch/clk.h>
diff --git a/arch/arm/mach-at91/armv7/sama5d4_devices.c b/arch/arm/mach-at91/armv7/sama5d4_devices.c
index e68ae99..76fff9c 100644
--- a/arch/arm/mach-at91/armv7/sama5d4_devices.c
+++ b/arch/arm/mach-at91/armv7/sama5d4_devices.c
@@ -4,7 +4,6 @@
* Bo Shen <voice.shen@atmel.com>
*/
-#include <common.h>
#include <asm/io.h>
#include <asm/arch/at91_common.h>
#include <asm/arch/clk.h>
diff --git a/arch/arm/mach-at91/armv7/timer.c b/arch/arm/mach-at91/armv7/timer.c
index 1f54c5d..bfdb75c 100644
--- a/arch/arm/mach-at91/armv7/timer.c
+++ b/arch/arm/mach-at91/armv7/timer.c
@@ -8,7 +8,6 @@
* Bo Shen <voice.shen@atmel.com>
*/
-#include <common.h>
#include <init.h>
#include <time.h>
#include <asm/global_data.h>
diff --git a/arch/arm/mach-at91/atmel_sfr.c b/arch/arm/mach-at91/atmel_sfr.c
index 62108d2..019ef93 100644
--- a/arch/arm/mach-at91/atmel_sfr.c
+++ b/arch/arm/mach-at91/atmel_sfr.c
@@ -4,7 +4,7 @@
* Wenyou Yang <wenyou.yang@atmel.com>
*/
-#include <common.h>
+#include <config.h>
#include <asm/hardware.h>
#include <asm/io.h>
#include <asm/arch/at91_sfr.h>
diff --git a/arch/arm/mach-at91/clock.c b/arch/arm/mach-at91/clock.c
index 8344dae..442b822 100644
--- a/arch/arm/mach-at91/clock.c
+++ b/arch/arm/mach-at91/clock.c
@@ -4,8 +4,8 @@
* Wenyou Yang <wenyou.yang@atmel.com>
*/
-#include <common.h>
#include <dm.h>
+#include <time.h>
#include <wdt.h>
#include <asm/io.h>
#include <asm/arch/hardware.h>
diff --git a/arch/arm/mach-at91/include/mach/at91_common.h b/arch/arm/mach-at91/include/mach/at91_common.h
index f7b411c..683e539 100644
--- a/arch/arm/mach-at91/include/mach/at91_common.h
+++ b/arch/arm/mach-at91/include/mach/at91_common.h
@@ -8,6 +8,8 @@
#ifndef AT91_COMMON_H
#define AT91_COMMON_H
+#include <linux/types.h>
+
void at91_can_hw_init(void);
void at91_gmac_hw_init(void);
void at91_macb_hw_init(void);
diff --git a/arch/arm/mach-at91/matrix.c b/arch/arm/mach-at91/matrix.c
index 2fa8493..3bef564 100644
--- a/arch/arm/mach-at91/matrix.c
+++ b/arch/arm/mach-at91/matrix.c
@@ -4,7 +4,6 @@
* Wenyou Yang <wenyou.yang@atmel.com>
*/
-#include <common.h>
#include <asm/hardware.h>
#include <asm/io.h>
#include <asm/arch/sama5_matrix.h>
diff --git a/arch/arm/mach-at91/mpddrc.c b/arch/arm/mach-at91/mpddrc.c
index 5422c05..ac6a719 100644
--- a/arch/arm/mach-at91/mpddrc.c
+++ b/arch/arm/mach-at91/mpddrc.c
@@ -7,7 +7,6 @@
* Wenyou Yang <wenyou.yang@atmel.com>
*/
-#include <common.h>
#include <asm/io.h>
#include <asm/arch/atmel_mpddrc.h>
#include <asm/arch/at91_common.h>
diff --git a/arch/arm/mach-at91/phy.c b/arch/arm/mach-at91/phy.c
index f4484a7..ec38f5b 100644
--- a/arch/arm/mach-at91/phy.c
+++ b/arch/arm/mach-at91/phy.c
@@ -11,7 +11,7 @@
* Copyright (C) 2013 DENX Software Engineering, hs@denx.de
*/
-#include <common.h>
+#include <time.h>
#include <asm/hardware.h>
#include <asm/io.h>
#include <linux/delay.h>
diff --git a/arch/arm/mach-at91/sdram.c b/arch/arm/mach-at91/sdram.c
index 6638aa8..be3e91c 100644
--- a/arch/arm/mach-at91/sdram.c
+++ b/arch/arm/mach-at91/sdram.c
@@ -9,7 +9,6 @@
* Lead Tech Design <www.leadtechdesign.com>
*/
-#include <common.h>
#include <asm/io.h>
#include <asm/arch/at91_common.h>
#include <asm/arch/at91sam9_sdramc.h>
diff --git a/arch/arm/mach-at91/spl.c b/arch/arm/mach-at91/spl.c
index 8d53799..5feb8f7 100644
--- a/arch/arm/mach-at91/spl.c
+++ b/arch/arm/mach-at91/spl.c
@@ -4,7 +4,6 @@
* Bo Shen <voice.shen@atmel.com>
*/
-#include <common.h>
#include <hang.h>
#include <asm/io.h>
#include <asm/arch/at91_common.h>
diff --git a/arch/arm/mach-at91/spl_at91.c b/arch/arm/mach-at91/spl_at91.c
index dfba9f7..cde1700 100644
--- a/arch/arm/mach-at91/spl_at91.c
+++ b/arch/arm/mach-at91/spl_at91.c
@@ -8,7 +8,7 @@
* Bo Shen <voice.shen@atmel.com>
*/
-#include <common.h>
+#include <config.h>
#include <hang.h>
#include <init.h>
#include <log.h>
diff --git a/arch/arm/mach-at91/spl_atmel.c b/arch/arm/mach-at91/spl_atmel.c
index a30c4f6..62a7df8 100644
--- a/arch/arm/mach-at91/spl_atmel.c
+++ b/arch/arm/mach-at91/spl_atmel.c
@@ -4,7 +4,7 @@
* Bo Shen <voice.shen@atmel.com>
*/
-#include <common.h>
+#include <config.h>
#include <hang.h>
#include <init.h>
#include <log.h>
diff --git a/arch/arm/mach-bcm283x/init.c b/arch/arm/mach-bcm283x/init.c
index 016bc1e..1b45970 100644
--- a/arch/arm/mach-bcm283x/init.c
+++ b/arch/arm/mach-bcm283x/init.c
@@ -6,7 +6,6 @@
* project.
*/
-#include <common.h>
#include <cpu_func.h>
#include <init.h>
#include <dm/device.h>
diff --git a/arch/arm/mach-bcm283x/mbox.c b/arch/arm/mach-bcm283x/mbox.c
index da9faaf..c7cbfa7 100644
--- a/arch/arm/mach-bcm283x/mbox.c
+++ b/arch/arm/mach-bcm283x/mbox.c
@@ -3,9 +3,9 @@
* (C) Copyright 2012 Stephen Warren
*/
-#include <common.h>
#include <cpu_func.h>
#include <log.h>
+#include <time.h>
#include <asm/cache.h>
#include <asm/io.h>
#include <asm/arch/base.h>
diff --git a/arch/arm/mach-bcm283x/msg.c b/arch/arm/mach-bcm283x/msg.c
index 2188b38..4993c0b 100644
--- a/arch/arm/mach-bcm283x/msg.c
+++ b/arch/arm/mach-bcm283x/msg.c
@@ -3,7 +3,6 @@
* (C) Copyright 2012 Stephen Warren
*/
-#include <common.h>
#include <memalign.h>
#include <phys2bus.h>
#include <asm/arch/mbox.h>
diff --git a/arch/arm/mach-bcm283x/reset.c b/arch/arm/mach-bcm283x/reset.c
index f13ac0c..9199234 100644
--- a/arch/arm/mach-bcm283x/reset.c
+++ b/arch/arm/mach-bcm283x/reset.c
@@ -6,7 +6,7 @@
* project.
*/
-#include <common.h>
+#include <config.h>
#include <cpu_func.h>
#include <asm/io.h>
#include <asm/arch/base.h>
diff --git a/arch/arm/mach-bcmbca/bcm4908/mmu_table.c b/arch/arm/mach-bcmbca/bcm4908/mmu_table.c
index 5ab0408..ca403ba 100644
--- a/arch/arm/mach-bcmbca/bcm4908/mmu_table.c
+++ b/arch/arm/mach-bcmbca/bcm4908/mmu_table.c
@@ -2,7 +2,6 @@
/*
* Copyright 2022 Broadcom Ltd.
*/
-#include <common.h>
#include <asm/armv8/mmu.h>
#include <linux/sizes.h>
diff --git a/arch/arm/mach-bcmbca/bcm4912/mmu_table.c b/arch/arm/mach-bcmbca/bcm4912/mmu_table.c
index 52a53a2..b11effe 100644
--- a/arch/arm/mach-bcmbca/bcm4912/mmu_table.c
+++ b/arch/arm/mach-bcmbca/bcm4912/mmu_table.c
@@ -2,7 +2,6 @@
/*
* Copyright 2022 Broadcom Ltd.
*/
-#include <common.h>
#include <asm/armv8/mmu.h>
#include <linux/sizes.h>
diff --git a/arch/arm/mach-bcmbca/bcm63146/mmu_table.c b/arch/arm/mach-bcmbca/bcm63146/mmu_table.c
index c6b7a54..a883e74 100644
--- a/arch/arm/mach-bcmbca/bcm63146/mmu_table.c
+++ b/arch/arm/mach-bcmbca/bcm63146/mmu_table.c
@@ -2,7 +2,6 @@
/*
* Copyright 2022 Broadcom Ltd.
*/
-#include <common.h>
#include <asm/armv8/mmu.h>
#include <linux/sizes.h>
diff --git a/arch/arm/mach-bcmbca/bcm63158/mmu_table.c b/arch/arm/mach-bcmbca/bcm63158/mmu_table.c
index fe7efb3..eb3cc3e 100644
--- a/arch/arm/mach-bcmbca/bcm63158/mmu_table.c
+++ b/arch/arm/mach-bcmbca/bcm63158/mmu_table.c
@@ -2,7 +2,6 @@
/*
* Copyright 2022 Broadcom Ltd.
*/
-#include <common.h>
#include <asm/armv8/mmu.h>
#include <linux/sizes.h>
diff --git a/arch/arm/mach-bcmbca/bcm6813/mmu_table.c b/arch/arm/mach-bcmbca/bcm6813/mmu_table.c
index eb736bf..458624e 100644
--- a/arch/arm/mach-bcmbca/bcm6813/mmu_table.c
+++ b/arch/arm/mach-bcmbca/bcm6813/mmu_table.c
@@ -2,7 +2,6 @@
/*
* Copyright 2022 Broadcom Ltd.
*/
-#include <common.h>
#include <asm/armv8/mmu.h>
#include <linux/sizes.h>
diff --git a/arch/arm/mach-bcmbca/bcm6856/mmu_table.c b/arch/arm/mach-bcmbca/bcm6856/mmu_table.c
index 8e53b49..83c0772 100644
--- a/arch/arm/mach-bcmbca/bcm6856/mmu_table.c
+++ b/arch/arm/mach-bcmbca/bcm6856/mmu_table.c
@@ -2,7 +2,6 @@
/*
* Copyright 2022 Broadcom Ltd.
*/
-#include <common.h>
#include <asm/armv8/mmu.h>
#include <linux/sizes.h>
diff --git a/arch/arm/mach-bcmbca/bcm6858/mmu_table.c b/arch/arm/mach-bcmbca/bcm6858/mmu_table.c
index 8982910..82aba32 100644
--- a/arch/arm/mach-bcmbca/bcm6858/mmu_table.c
+++ b/arch/arm/mach-bcmbca/bcm6858/mmu_table.c
@@ -2,7 +2,6 @@
/*
* Copyright 2022 Broadcom Ltd.
*/
-#include <common.h>
#include <asm/armv8/mmu.h>
#include <linux/sizes.h>
diff --git a/arch/arm/mach-davinci/cpu.c b/arch/arm/mach-davinci/cpu.c
index dae6026..7c0a263 100644
--- a/arch/arm/mach-davinci/cpu.c
+++ b/arch/arm/mach-davinci/cpu.c
@@ -4,7 +4,7 @@
* Copyright (C) 2009 David Brownell
*/
-#include <common.h>
+#include <config.h>
#include <clock_legacy.h>
#include <init.h>
#include <asm/arch/hardware.h>
diff --git a/arch/arm/mach-davinci/da850_lowlevel.c b/arch/arm/mach-davinci/da850_lowlevel.c
index 08c8f59..936b5e1 100644
--- a/arch/arm/mach-davinci/da850_lowlevel.c
+++ b/arch/arm/mach-davinci/da850_lowlevel.c
@@ -5,7 +5,7 @@
* Copyright (C) 2011
* Heiko Schocher, DENX Software Engineering, hs@denx.de.
*/
-#include <common.h>
+#include <config.h>
#include <init.h>
#include <nand.h>
#include <ns16550.h>
diff --git a/arch/arm/mach-davinci/da850_pinmux.c b/arch/arm/mach-davinci/da850_pinmux.c
index f2536c8..4ee3cd0 100644
--- a/arch/arm/mach-davinci/da850_pinmux.c
+++ b/arch/arm/mach-davinci/da850_pinmux.c
@@ -5,7 +5,6 @@
* Copyright (C) 2011 OMICRON electronics GmbH
*/
-#include <common.h>
#include <asm/arch/davinci_misc.h>
#include <asm/arch/hardware.h>
#include <asm/arch/pinmux_defs.h>
diff --git a/arch/arm/mach-davinci/include/mach/davinci_misc.h b/arch/arm/mach-davinci/include/mach/davinci_misc.h
index 1133a23..0d0ad1e 100644
--- a/arch/arm/mach-davinci/include/mach/davinci_misc.h
+++ b/arch/arm/mach-davinci/include/mach/davinci_misc.h
@@ -6,6 +6,7 @@
#ifndef __MISC_H
#define __MISC_H
+#include <linux/types.h>
#include <asm/arch/hardware.h>
/* pin muxer definitions */
diff --git a/arch/arm/mach-davinci/misc.c b/arch/arm/mach-davinci/misc.c
index cfad28c..6c97e58 100644
--- a/arch/arm/mach-davinci/misc.c
+++ b/arch/arm/mach-davinci/misc.c
@@ -8,7 +8,7 @@
* Copyright (C) 2004 Texas Instruments.
*/
-#include <common.h>
+#include <config.h>
#include <env.h>
#include <i2c.h>
#include <init.h>
diff --git a/arch/arm/mach-davinci/pinmux.c b/arch/arm/mach-davinci/pinmux.c
index 7904257..5ecb434 100644
--- a/arch/arm/mach-davinci/pinmux.c
+++ b/arch/arm/mach-davinci/pinmux.c
@@ -8,7 +8,6 @@
* Copyright (C) 2004 Texas Instruments.
*/
-#include <common.h>
#include <asm/arch/hardware.h>
#include <asm/io.h>
#include <asm/arch/davinci_misc.h>
diff --git a/arch/arm/mach-davinci/psc.c b/arch/arm/mach-davinci/psc.c
index dae10aa..90b8178 100644
--- a/arch/arm/mach-davinci/psc.c
+++ b/arch/arm/mach-davinci/psc.c
@@ -7,7 +7,6 @@
* Copyright (C) 2004 Texas Instruments.
*/
-#include <common.h>
#include <asm/arch/hardware.h>
#include <asm/io.h>
diff --git a/arch/arm/mach-davinci/reset.c b/arch/arm/mach-davinci/reset.c
index 0d59eb6..e3e2c56 100644
--- a/arch/arm/mach-davinci/reset.c
+++ b/arch/arm/mach-davinci/reset.c
@@ -6,7 +6,6 @@
* Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
*/
-#include <common.h>
#include <cpu_func.h>
#include <asm/io.h>
#include <asm/arch/timer_defs.h>
diff --git a/arch/arm/mach-davinci/spl.c b/arch/arm/mach-davinci/spl.c
index 5f5b9eb..8c6cf9c 100644
--- a/arch/arm/mach-davinci/spl.c
+++ b/arch/arm/mach-davinci/spl.c
@@ -3,12 +3,10 @@
* Copyright (C) 2011
* Heiko Schocher, DENX Software Engineering, hs@denx.de.
*/
-#include <common.h>
#include <config.h>
#include <hang.h>
#include <init.h>
#include <spl.h>
-#include <asm/u-boot.h>
#include <asm/utils.h>
#include <nand.h>
#include <asm/arch/dm365_lowlevel.h>
diff --git a/arch/arm/mach-davinci/timer.c b/arch/arm/mach-davinci/timer.c
index 83c190b..f2990f7 100644
--- a/arch/arm/mach-davinci/timer.c
+++ b/arch/arm/mach-davinci/timer.c
@@ -20,7 +20,7 @@
* Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
*/
-#include <common.h>
+#include <config.h>
#include <init.h>
#include <time.h>
#include <asm/global_data.h>
diff --git a/arch/arm/mach-exynos/clock.c b/arch/arm/mach-exynos/clock.c
index f91f2ee..ee71b95 100644
--- a/arch/arm/mach-exynos/clock.c
+++ b/arch/arm/mach-exynos/clock.c
@@ -4,9 +4,10 @@
* Minkyu Kang <mk7.kang@samsung.com>
*/
-#include <common.h>
#include <clock_legacy.h>
#include <log.h>
+#include <time.h>
+#include <mach/cpu.h>
#include <asm/io.h>
#include <asm/arch/clock.h>
#include <asm/arch/clk.h>
diff --git a/arch/arm/mach-exynos/clock_init_exynos4.c b/arch/arm/mach-exynos/clock_init_exynos4.c
index 584e4ba..95ed195 100644
--- a/arch/arm/mach-exynos/clock_init_exynos4.c
+++ b/arch/arm/mach-exynos/clock_init_exynos4.c
@@ -23,7 +23,6 @@
* MA 02111-1307 USA
*/
-#include <common.h>
#include <config.h>
#include <asm/io.h>
#include <asm/arch/cpu.h>
diff --git a/arch/arm/mach-exynos/clock_init_exynos5.c b/arch/arm/mach-exynos/clock_init_exynos5.c
index 1cb8d39..232a248 100644
--- a/arch/arm/mach-exynos/clock_init_exynos5.c
+++ b/arch/arm/mach-exynos/clock_init_exynos5.c
@@ -5,7 +5,6 @@
* Copyright (C) 2012 Samsung Electronics
*/
-#include <common.h>
#include <config.h>
#include <asm/io.h>
#include <asm/arch/clk.h>
diff --git a/arch/arm/mach-exynos/common_setup.h b/arch/arm/mach-exynos/common_setup.h
index d7f0223..4f56160 100644
--- a/arch/arm/mach-exynos/common_setup.h
+++ b/arch/arm/mach-exynos/common_setup.h
@@ -23,6 +23,8 @@
* MA 02111-1307 USA
*/
+#include <linux/types.h>
+#include <mach/cpu.h>
#include <asm/arch/system.h>
#define DMC_OFFSET 0x10000
diff --git a/arch/arm/mach-exynos/dmc_common.c b/arch/arm/mach-exynos/dmc_common.c
index 44923dd..a96ded4 100644
--- a/arch/arm/mach-exynos/dmc_common.c
+++ b/arch/arm/mach-exynos/dmc_common.c
@@ -5,7 +5,7 @@
* Copyright (C) 2012 Samsung Electronics
*/
-#include <common.h>
+#include <linux/types.h>
#include <asm/arch/spl.h>
#include "clock_init.h"
diff --git a/arch/arm/mach-exynos/dmc_init_ddr3.c b/arch/arm/mach-exynos/dmc_init_ddr3.c
index cad8ccc..193de4c 100644
--- a/arch/arm/mach-exynos/dmc_init_ddr3.c
+++ b/arch/arm/mach-exynos/dmc_init_ddr3.c
@@ -5,7 +5,6 @@
* Copyright (C) 2012 Samsung Electronics
*/
-#include <common.h>
#include <config.h>
#include <asm/io.h>
#include <asm/arch/clock.h>
diff --git a/arch/arm/mach-exynos/exynos5_setup.h b/arch/arm/mach-exynos/exynos5_setup.h
index e9874a8..4e508ed 100644
--- a/arch/arm/mach-exynos/exynos5_setup.h
+++ b/arch/arm/mach-exynos/exynos5_setup.h
@@ -8,6 +8,7 @@
#ifndef _SMDK5250_SETUP_H
#define _SMDK5250_SETUP_H
+#include <linux/types.h>
#include <asm/arch/dmc.h>
#define NOT_AVAILABLE 0
diff --git a/arch/arm/mach-exynos/include/mach/power.h b/arch/arm/mach-exynos/include/mach/power.h
index a3d8974..757e158 100644
--- a/arch/arm/mach-exynos/include/mach/power.h
+++ b/arch/arm/mach-exynos/include/mach/power.h
@@ -8,6 +8,8 @@
#define __ASM_ARM_ARCH_POWER_H_
#ifndef __ASSEMBLY__
+#include <linux/types.h>
+
struct exynos4_power {
unsigned int om_stat;
unsigned char res1[0x8];
diff --git a/arch/arm/mach-exynos/lowlevel_init.c b/arch/arm/mach-exynos/lowlevel_init.c
index c57b8ae..0967ab9 100644
--- a/arch/arm/mach-exynos/lowlevel_init.c
+++ b/arch/arm/mach-exynos/lowlevel_init.c
@@ -23,7 +23,6 @@
* MA 02111-1307 USA
*/
-#include <common.h>
#include <config.h>
#include <debug_uart.h>
#include <asm/system.h>
diff --git a/arch/arm/mach-exynos/mmu-arm64.c b/arch/arm/mach-exynos/mmu-arm64.c
index 30e5228..e2f3254 100644
--- a/arch/arm/mach-exynos/mmu-arm64.c
+++ b/arch/arm/mach-exynos/mmu-arm64.c
@@ -4,7 +4,6 @@
* Thomas Abraham <thomas.ab@samsung.com>
*/
-#include <common.h>
#include <asm/armv8/mmu.h>
#include <linux/sizes.h>
diff --git a/arch/arm/mach-exynos/pinmux.c b/arch/arm/mach-exynos/pinmux.c
index ad3fbf2..4061dd4 100644
--- a/arch/arm/mach-exynos/pinmux.c
+++ b/arch/arm/mach-exynos/pinmux.c
@@ -4,7 +4,6 @@
* Abhilash Kesavan <a.kesavan@samsung.com>
*/
-#include <common.h>
#include <fdtdec.h>
#include <log.h>
#include <asm/gpio.h>
diff --git a/arch/arm/mach-exynos/power.c b/arch/arm/mach-exynos/power.c
index f2a6c00..599d3cc 100644
--- a/arch/arm/mach-exynos/power.c
+++ b/arch/arm/mach-exynos/power.c
@@ -4,7 +4,7 @@
* Donghwa Lee <dh09.lee@samsung.com>
*/
-#include <common.h>
+#include <mach/cpu.h>
#include <asm/io.h>
#include <asm/arch/power.h>
diff --git a/arch/arm/mach-exynos/soc.c b/arch/arm/mach-exynos/soc.c
index aff2b5e..be18f18 100644
--- a/arch/arm/mach-exynos/soc.c
+++ b/arch/arm/mach-exynos/soc.c
@@ -4,7 +4,6 @@
* Minkyu Kang <mk7.kang@samsung.com>
*/
-#include <common.h>
#include <cpu_func.h>
#include <asm/cache.h>
#include <asm/io.h>
diff --git a/arch/arm/mach-exynos/spl_boot.c b/arch/arm/mach-exynos/spl_boot.c
index 553dac7..bd5a064 100644
--- a/arch/arm/mach-exynos/spl_boot.c
+++ b/arch/arm/mach-exynos/spl_boot.c
@@ -3,7 +3,6 @@
* Copyright (C) 2012 Samsung Electronics
*/
-#include <common.h>
#include <config.h>
#include <init.h>
#include <log.h>
diff --git a/arch/arm/mach-exynos/system.c b/arch/arm/mach-exynos/system.c
index 12d0d8f..f509061 100644
--- a/arch/arm/mach-exynos/system.c
+++ b/arch/arm/mach-exynos/system.c
@@ -4,7 +4,7 @@
* Donghwa Lee <dh09.lee@samsung.com>
*/
-#include <common.h>
+#include <config.h>
#include <asm/io.h>
#include <asm/arch/system.h>
diff --git a/arch/arm/mach-exynos/tzpc.c b/arch/arm/mach-exynos/tzpc.c
index abe8e7f..320a0cf 100644
--- a/arch/arm/mach-exynos/tzpc.c
+++ b/arch/arm/mach-exynos/tzpc.c
@@ -5,7 +5,7 @@
* Copyright (C) 2012 Samsung Electronics
*/
-#include <common.h>
+#include <mach/cpu.h>
#include <asm/arch/tzpc.h>
#include <asm/io.h>
diff --git a/arch/arm/mach-highbank/timer.c b/arch/arm/mach-highbank/timer.c
index 2423a0e..32ec6f0 100644
--- a/arch/arm/mach-highbank/timer.c
+++ b/arch/arm/mach-highbank/timer.c
@@ -5,7 +5,6 @@
* Based on arm926ejs/mx27/timer.c
*/
-#include <common.h>
#include <init.h>
#include <asm/io.h>
#include <asm/arch-armv7/systimer.h>
diff --git a/arch/arm/mach-histb/board_common.c b/arch/arm/mach-histb/board_common.c
index a26c206..84d02c9 100644
--- a/arch/arm/mach-histb/board_common.c
+++ b/arch/arm/mach-histb/board_common.c
@@ -5,7 +5,6 @@
* (C) Copyright 2023 Yang Xiwen <forbidden405@outlook.com>
*/
-#include <common.h>
#include <fdtdec.h>
#include <init.h>
#include <asm/system.h>
diff --git a/arch/arm/mach-histb/sysmap-histb.c b/arch/arm/mach-histb/sysmap-histb.c
index 83a2bb9..7641455 100644
--- a/arch/arm/mach-histb/sysmap-histb.c
+++ b/arch/arm/mach-histb/sysmap-histb.c
@@ -5,7 +5,6 @@
* (C) Copyright 2023 Yang Xiwen <forbidden405@outlook.com>
*/
-#include <common.h>
#include <asm/armv8/mmu.h>
static struct mm_region histb_mem_map[] = {
diff --git a/arch/arm/mach-imx/cache.c b/arch/arm/mach-imx/cache.c
index ab9b621..b368db4 100644
--- a/arch/arm/mach-imx/cache.c
+++ b/arch/arm/mach-imx/cache.c
@@ -3,7 +3,7 @@
* Copyright 2015 Freescale Semiconductor, Inc.
*/
-#include <common.h>
+#include <config.h>
#include <cpu_func.h>
#include <asm/armv7.h>
#include <asm/cache.h>
diff --git a/arch/arm/mach-imx/cmd_bmode.c b/arch/arm/mach-imx/cmd_bmode.c
index 5b2f468..c20e807 100644
--- a/arch/arm/mach-imx/cmd_bmode.c
+++ b/arch/arm/mach-imx/cmd_bmode.c
@@ -2,7 +2,6 @@
/*
* Copyright (C) 2012 Boundary Devices Inc.
*/
-#include <common.h>
#include <linux/errno.h>
#include <asm/io.h>
#include <asm/mach-imx/boot_mode.h>
diff --git a/arch/arm/mach-imx/cmd_dek.c b/arch/arm/mach-imx/cmd_dek.c
index 2f389db..c7962ea 100644
--- a/arch/arm/mach-imx/cmd_dek.c
+++ b/arch/arm/mach-imx/cmd_dek.c
@@ -6,7 +6,7 @@
* Command for encapsulating DEK blob
*/
-#include <common.h>
+#include <config.h>
#include <command.h>
#include <log.h>
#include <malloc.h>
@@ -17,6 +17,7 @@
#include <asm/arch/clock.h>
#include <mapmem.h>
#include <tee.h>
+#include <vsprintf.h>
#ifdef CONFIG_IMX_SECO_DEK_ENCAP
#include <imx_container.h>
#include <firmware/imx/sci/sci.h>
diff --git a/arch/arm/mach-imx/cmd_hdmidet.c b/arch/arm/mach-imx/cmd_hdmidet.c
index e2571ad..8104ab2 100644
--- a/arch/arm/mach-imx/cmd_hdmidet.c
+++ b/arch/arm/mach-imx/cmd_hdmidet.c
@@ -2,7 +2,6 @@
/*
* Copyright (C) 2012 Boundary Devices Inc.
*/
-#include <common.h>
#include <command.h>
#include <asm/arch/imx-regs.h>
#include <asm/arch/mxc_hdmi.h>
diff --git a/arch/arm/mach-imx/cmd_mfgprot.c b/arch/arm/mach-imx/cmd_mfgprot.c
index 9576b48..9925c99 100644
--- a/arch/arm/mach-imx/cmd_mfgprot.c
+++ b/arch/arm/mach-imx/cmd_mfgprot.c
@@ -11,7 +11,7 @@
#include <asm/arch/clock.h>
#include <linux/compiler.h>
#include <command.h>
-#include <common.h>
+#include <config.h>
#include <env.h>
#include <fsl_sec.h>
#include <mapmem.h>
diff --git a/arch/arm/mach-imx/cmd_nandbcb.c b/arch/arm/mach-imx/cmd_nandbcb.c
index 70a213a..c2e452b 100644
--- a/arch/arm/mach-imx/cmd_nandbcb.c
+++ b/arch/arm/mach-imx/cmd_nandbcb.c
@@ -11,7 +11,6 @@
* SPDX-License-Identifier: GPL-2.0+
*/
-#include <common.h>
#include <command.h>
#include <log.h>
#include <malloc.h>
diff --git a/arch/arm/mach-imx/cpu.c b/arch/arm/mach-imx/cpu.c
index 488638c..ceee31e 100644
--- a/arch/arm/mach-imx/cpu.c
+++ b/arch/arm/mach-imx/cpu.c
@@ -7,7 +7,6 @@
*/
#include <bootm.h>
-#include <common.h>
#include <dm.h>
#include <init.h>
#include <log.h>
diff --git a/arch/arm/mach-imx/ddrmc-vf610-calibration.c b/arch/arm/mach-imx/ddrmc-vf610-calibration.c
index cd7e95e..2cf6843 100644
--- a/arch/arm/mach-imx/ddrmc-vf610-calibration.c
+++ b/arch/arm/mach-imx/ddrmc-vf610-calibration.c
@@ -7,7 +7,6 @@
*
*/
/* #define DEBUG */
-#include <common.h>
#include <log.h>
#include <asm/io.h>
#include <asm/arch/imx-regs.h>
@@ -45,7 +44,7 @@
* based on trace length differences from their
* layout.
* Mismatches up to 25% or tCK (clock period) are
- * allowed, so the value in the filed doesn’t have
+ * allowed, so the value in the filed doesn't have
* to be very accurate.
*
* - 0x2 (b'10) - RDLVL_DL_0/1 - refers to adjusting the DQS strobe in relation
@@ -184,14 +183,14 @@
debug("RDLVL: PHY_RDLVL_EDGE:\t 0x%x\n",
(tmp >> DDRMC_CR101_PHY_RDLVL_EDGE_OFF) & 0x1); //set 0
- /* Program Leveling mode - CR93[SW_LVL_MODE] to ’b10 */
+ /* Program Leveling mode - CR93[SW_LVL_MODE] to 'b10 */
clrsetbits_le32(&ddrmr->cr[93], DDRMC_CR93_SW_LVL_MODE(0x3),
DDRMC_CR93_SW_LVL_MODE(0x2));
tmp = readl(&ddrmr->cr[93]);
debug("RDLVL: SW_LVL_MODE:\t 0x%x\n",
(tmp >> DDRMC_CR93_SW_LVL_MODE_OFF) & 0x3);
- /* Start procedure - CR93[SWLVL_START] to ’b1 */
+ /* Start procedure - CR93[SWLVL_START] to 'b1 */
sw_leveling_start;
/* Poll CR94[SWLVL_OP_DONE] */
@@ -211,7 +210,7 @@
0xFFFF << DDRMC_CR105_RDLVL_DL_0_OFF,
i << DDRMC_CR105_RDLVL_DL_0_OFF);
- /* Load values CR93[SWLVL_LOAD] to ’b1 */
+ /* Load values CR93[SWLVL_LOAD] to 'b1 */
sw_leveling_load_value;
/* Poll CR94[SWLVL_OP_DONE] */
@@ -263,7 +262,7 @@
0xFFFF << DDRMC_CR110_RDLVL_DL_1_OFF,
i << DDRMC_CR110_RDLVL_DL_1_OFF);
- /* Load values CR93[SWLVL_LOAD] to ’b1 */
+ /* Load values CR93[SWLVL_LOAD] to 'b1 */
sw_leveling_load_value;
/* Poll CR94[SWLVL_OP_DONE] */
@@ -317,7 +316,7 @@
sw_leveling_load_value;
sw_leveling_op_done;
- /* Exit procedure - CR94[SWLVL_EXIT] to ’b1 */
+ /* Exit procedure - CR94[SWLVL_EXIT] to 'b1 */
sw_leveling_exit;
/* Poll CR94[SWLVL_OP_DONE] */
diff --git a/arch/arm/mach-imx/ddrmc-vf610.c b/arch/arm/mach-imx/ddrmc-vf610.c
index 7895ee6..e449fa6 100644
--- a/arch/arm/mach-imx/ddrmc-vf610.c
+++ b/arch/arm/mach-imx/ddrmc-vf610.c
@@ -6,7 +6,6 @@
* Copyright 2013 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <asm/io.h>
#include <asm/arch/imx-regs.h>
#include <asm/arch/iomux-vf610.h>
diff --git a/arch/arm/mach-imx/ele_ahab.c b/arch/arm/mach-imx/ele_ahab.c
index d02316e..c13d9f0e 100644
--- a/arch/arm/mach-imx/ele_ahab.c
+++ b/arch/arm/mach-imx/ele_ahab.c
@@ -3,7 +3,6 @@
* Copyright 2022 NXP
*/
-#include <common.h>
#include <command.h>
#include <errno.h>
#include <imx_container.h>
diff --git a/arch/arm/mach-imx/hab.c b/arch/arm/mach-imx/hab.c
index 27e053e..85d9068 100644
--- a/arch/arm/mach-imx/hab.c
+++ b/arch/arm/mach-imx/hab.c
@@ -3,7 +3,6 @@
* Copyright (C) 2010-2015 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <command.h>
#include <config.h>
#include <display_options.h>
diff --git a/arch/arm/mach-imx/i2c-mxv7.c b/arch/arm/mach-imx/i2c-mxv7.c
index a5866cf..256db15 100644
--- a/arch/arm/mach-imx/i2c-mxv7.c
+++ b/arch/arm/mach-imx/i2c-mxv7.c
@@ -2,8 +2,8 @@
/*
* Copyright (C) 2012 Boundary Devices Inc.
*/
-#include <common.h>
#include <malloc.h>
+#include <time.h>
#include <asm/arch/clock.h>
#include <asm/arch/imx-regs.h>
#include <linux/delay.h>
diff --git a/arch/arm/mach-imx/image-container.c b/arch/arm/mach-imx/image-container.c
index 35da0ae..e2388e3 100644
--- a/arch/arm/mach-imx/image-container.c
+++ b/arch/arm/mach-imx/image-container.c
@@ -3,7 +3,7 @@
* Copyright 2019 NXP
*/
-#include <common.h>
+#include <config.h>
#include <errno.h>
#include <imx_container.h>
#include <log.h>
diff --git a/arch/arm/mach-imx/imx8/ahab.c b/arch/arm/mach-imx/imx8/ahab.c
index 1c072f6..ed44df3 100644
--- a/arch/arm/mach-imx/imx8/ahab.c
+++ b/arch/arm/mach-imx/imx8/ahab.c
@@ -3,7 +3,6 @@
* Copyright 2018-2019, 2022 NXP
*/
-#include <common.h>
#include <command.h>
#include <errno.h>
#include <imx_container.h>
diff --git a/arch/arm/mach-imx/imx8/clock.c b/arch/arm/mach-imx/imx8/clock.c
index 9941b57..4e49b5b 100644
--- a/arch/arm/mach-imx/imx8/clock.c
+++ b/arch/arm/mach-imx/imx8/clock.c
@@ -3,7 +3,6 @@
* Copyright 2018 NXP
*/
-#include <common.h>
#include <asm/global_data.h>
#include <linux/errno.h>
#include <asm/arch/clock.h>
diff --git a/arch/arm/mach-imx/imx8/cpu.c b/arch/arm/mach-imx/imx8/cpu.c
index 6e64318..627baa1 100644
--- a/arch/arm/mach-imx/imx8/cpu.c
+++ b/arch/arm/mach-imx/imx8/cpu.c
@@ -3,7 +3,6 @@
* Copyright 2018, 2021 NXP
*/
-#include <common.h>
#include <clk.h>
#include <cpu.h>
#include <cpu_func.h>
diff --git a/arch/arm/mach-imx/imx8/fdt.c b/arch/arm/mach-imx/imx8/fdt.c
index c2bed3e..6d0585f 100644
--- a/arch/arm/mach-imx/imx8/fdt.c
+++ b/arch/arm/mach-imx/imx8/fdt.c
@@ -3,7 +3,6 @@
* Copyright 2019 NXP
*/
-#include <common.h>
#include <log.h>
#include <firmware/imx/sci/sci.h>
#include <asm/arch/sys_proto.h>
diff --git a/arch/arm/mach-imx/imx8/iomux.c b/arch/arm/mach-imx/imx8/iomux.c
index e4f7651..3e27d75 100644
--- a/arch/arm/mach-imx/imx8/iomux.c
+++ b/arch/arm/mach-imx/imx8/iomux.c
@@ -3,7 +3,6 @@
* Copyright 2018 NXP
*/
-#include <common.h>
#include <log.h>
#include <asm/global_data.h>
#include <asm/io.h>
diff --git a/arch/arm/mach-imx/imx8/misc.c b/arch/arm/mach-imx/imx8/misc.c
index 0ce3036..c77104d 100644
--- a/arch/arm/mach-imx/imx8/misc.c
+++ b/arch/arm/mach-imx/imx8/misc.c
@@ -1,5 +1,4 @@
// SPDX-License-Identifier: GPL-2.0+
-#include <common.h>
#include <log.h>
#include <firmware/imx/sci/sci.h>
#include <asm/mach-imx/sys_proto.h>
diff --git a/arch/arm/mach-imx/imx8/snvs_security_sc.c b/arch/arm/mach-imx/imx8/snvs_security_sc.c
index 1eaa68f..f13dfc1 100644
--- a/arch/arm/mach-imx/imx8/snvs_security_sc.c
+++ b/arch/arm/mach-imx/imx8/snvs_security_sc.c
@@ -14,7 +14,6 @@
#include <command.h>
#include <log.h>
#include <stddef.h>
-#include <common.h>
#include <firmware/imx/sci/sci.h>
#include <asm/arch-imx8/imx8-pins.h>
#include <asm/arch-imx8/snvs_security_sc.h>
diff --git a/arch/arm/mach-imx/imx8m/Kconfig b/arch/arm/mach-imx/imx8m/Kconfig
index fbde476..23d9217 100644
--- a/arch/arm/mach-imx/imx8m/Kconfig
+++ b/arch/arm/mach-imx/imx8m/Kconfig
@@ -188,6 +188,7 @@
select FSL_CAAM
select ARCH_MISC_INIT
select SPL_CRYPTO if SPL
+ imply OF_UPSTREAM
config TARGET_IMX8MP_DEBIX_MODEL_A
bool "Polyhex i.MX8M Plus Debix Model A SBC"
@@ -261,12 +262,14 @@
select IMX8MM
select SUPPORT_SPL
select IMX8M_LPDDR4
+ imply OF_UPSTREAM
config TARGET_VERDIN_IMX8MP
bool "Support Toradex Verdin iMX8M Plus module"
select IMX8MP
select SUPPORT_SPL
select IMX8M_LPDDR4
+ imply OF_UPSTREAM
config TARGET_IMX8MM_BEACON
bool "imx8mm Beacon Embedded devkit"
@@ -276,6 +279,7 @@
select FSL_CAAM
select ARCH_MISC_INIT
select SPL_CRYPTO if SPL
+ imply OF_UPSTREAM
config TARGET_IMX8MN_BEACON
bool "imx8mn Beacon Embedded devkit"
@@ -285,6 +289,7 @@
select FSL_CAAM
select ARCH_MISC_INIT
select SPL_CRYPTO if SPL
+ imply OF_UPSTREAM
config TARGET_PHYCORE_IMX8MM
bool "PHYTEC PHYCORE i.MX8MM"
diff --git a/arch/arm/mach-imx/imx8m/clock_imx8mm.c b/arch/arm/mach-imx/imx8m/clock_imx8mm.c
index 4721995..de630e9 100644
--- a/arch/arm/mach-imx/imx8m/clock_imx8mm.c
+++ b/arch/arm/mach-imx/imx8m/clock_imx8mm.c
@@ -5,7 +5,6 @@
* Peng Fan <peng.fan@nxp.com>
*/
-#include <common.h>
#include <asm/arch/clock.h>
#include <asm/arch/imx-regs.h>
#include <asm/arch/sys_proto.h>
diff --git a/arch/arm/mach-imx/imx8m/clock_imx8mq.c b/arch/arm/mach-imx/imx8m/clock_imx8mq.c
index 9db62b9..7e6c374 100644
--- a/arch/arm/mach-imx/imx8m/clock_imx8mq.c
+++ b/arch/arm/mach-imx/imx8m/clock_imx8mq.c
@@ -5,7 +5,6 @@
* Peng Fan <peng.fan@nxp.com>
*/
-#include <common.h>
#include <command.h>
#include <asm/arch/clock.h>
#include <asm/arch/imx-regs.h>
diff --git a/arch/arm/mach-imx/imx8m/clock_slice.c b/arch/arm/mach-imx/imx8m/clock_slice.c
index b5ed27a..7cfdc46 100644
--- a/arch/arm/mach-imx/imx8m/clock_slice.c
+++ b/arch/arm/mach-imx/imx8m/clock_slice.c
@@ -5,7 +5,6 @@
* Peng Fan <peng.fan@nxp.com>
*/
-#include <common.h>
#include <asm/arch/clock.h>
#include <asm/arch/imx-regs.h>
#include <asm/io.h>
diff --git a/arch/arm/mach-imx/imx8m/psci.c b/arch/arm/mach-imx/imx8m/psci.c
index 62f0b76..f5644c6 100644
--- a/arch/arm/mach-imx/imx8m/psci.c
+++ b/arch/arm/mach-imx/imx8m/psci.c
@@ -10,7 +10,6 @@
#include <asm/io.h>
#include <asm/psci.h>
#include <asm/secure.h>
-#include <common.h>
#include <cpu_func.h>
#include <debug_uart.h>
#include <fsl_wdog.h>
diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c
index 0c49fb9..be38ca5 100644
--- a/arch/arm/mach-imx/imx8m/soc.c
+++ b/arch/arm/mach-imx/imx8m/soc.c
@@ -5,7 +5,7 @@
* Peng Fan <peng.fan@nxp.com>
*/
-#include <common.h>
+#include <config.h>
#include <cpu_func.h>
#include <event.h>
#include <init.h>
diff --git a/arch/arm/mach-imx/imx8ulp/cgc.c b/arch/arm/mach-imx/imx8ulp/cgc.c
index d2fadb4..f9d8ed5 100644
--- a/arch/arm/mach-imx/imx8ulp/cgc.c
+++ b/arch/arm/mach-imx/imx8ulp/cgc.c
@@ -3,7 +3,6 @@
* Copyright 2021 NXP
*/
-#include <common.h>
#include <div64.h>
#include <asm/io.h>
#include <errno.h>
diff --git a/arch/arm/mach-imx/imx8ulp/clock.c b/arch/arm/mach-imx/imx8ulp/clock.c
index 36d1294..fadf165 100644
--- a/arch/arm/mach-imx/imx8ulp/clock.c
+++ b/arch/arm/mach-imx/imx8ulp/clock.c
@@ -3,7 +3,6 @@
* Copyright 2020 NXP
*/
-#include <common.h>
#include <command.h>
#include <div64.h>
#include <asm/arch/imx-regs.h>
diff --git a/arch/arm/mach-imx/imx8ulp/iomux.c b/arch/arm/mach-imx/imx8ulp/iomux.c
index c6d20f5..43f856b 100644
--- a/arch/arm/mach-imx/imx8ulp/iomux.c
+++ b/arch/arm/mach-imx/imx8ulp/iomux.c
@@ -3,7 +3,6 @@
* Copyright 2020-2021 NXP
*/
-#include <common.h>
#include <asm/io.h>
#include <asm/arch/imx-regs.h>
#include <asm/arch/iomux.h>
diff --git a/arch/arm/mach-imx/imx8ulp/pcc.c b/arch/arm/mach-imx/imx8ulp/pcc.c
index e3c6d67..449e496 100644
--- a/arch/arm/mach-imx/imx8ulp/pcc.c
+++ b/arch/arm/mach-imx/imx8ulp/pcc.c
@@ -3,7 +3,6 @@
* Copyright 2021 NXP
*/
-#include <common.h>
#include <div64.h>
#include <asm/io.h>
#include <errno.h>
diff --git a/arch/arm/mach-imx/imx8ulp/rdc.c b/arch/arm/mach-imx/imx8ulp/rdc.c
index cfc09e7..ca65774 100644
--- a/arch/arm/mach-imx/imx8ulp/rdc.c
+++ b/arch/arm/mach-imx/imx8ulp/rdc.c
@@ -3,7 +3,8 @@
* Copyright 2021 NXP
*/
-#include <common.h>
+#include <config.h>
+#include <linux/errno.h>
#include <asm/io.h>
#include <asm/types.h>
#include <asm/arch/imx-regs.h>
diff --git a/arch/arm/mach-imx/imx9/Kconfig b/arch/arm/mach-imx/imx9/Kconfig
index b79485f..e892da8 100644
--- a/arch/arm/mach-imx/imx9/Kconfig
+++ b/arch/arm/mach-imx/imx9/Kconfig
@@ -31,6 +31,7 @@
config TARGET_IMX93_11X11_EVK
bool "imx93_11x11_evk"
select IMX93
+ imply OF_UPSTREAM
config TARGET_IMX93_VAR_SOM
bool "imx93_var_som"
diff --git a/arch/arm/mach-imx/imx9/clock.c b/arch/arm/mach-imx/imx9/clock.c
index 75d92af..0abf457 100644
--- a/arch/arm/mach-imx/imx9/clock.c
+++ b/arch/arm/mach-imx/imx9/clock.c
@@ -5,7 +5,6 @@
* Peng Fan <peng.fan@nxp.com>
*/
-#include <common.h>
#include <command.h>
#include <asm/arch/clock.h>
#include <asm/arch/imx-regs.h>
diff --git a/arch/arm/mach-imx/imx9/clock_root.c b/arch/arm/mach-imx/imx9/clock_root.c
index 7d7ae86..47106ff 100644
--- a/arch/arm/mach-imx/imx9/clock_root.c
+++ b/arch/arm/mach-imx/imx9/clock_root.c
@@ -5,7 +5,7 @@
* Peng Fan <peng.fan@nxp.com>
*/
-#include <common.h>
+#include <config.h>
#include <command.h>
#include <asm/arch/clock.h>
#include <asm/arch/sys_proto.h>
diff --git a/arch/arm/mach-imx/imx9/imx_bootaux.c b/arch/arm/mach-imx/imx9/imx_bootaux.c
index 6afb59e..73f2e72 100644
--- a/arch/arm/mach-imx/imx9/imx_bootaux.c
+++ b/arch/arm/mach-imx/imx9/imx_bootaux.c
@@ -3,11 +3,12 @@
* Copyright 2022 NXP
*/
-#include <common.h>
#include <command.h>
#include <log.h>
#include <imx_sip.h>
+#include <vsprintf.h>
#include <linux/arm-smccc.h>
+#include <linux/errno.h>
int arch_auxiliary_core_check_up(u32 core_id)
{
diff --git a/arch/arm/mach-imx/imx9/soc.c b/arch/arm/mach-imx/imx9/soc.c
index e2794d6..3220822 100644
--- a/arch/arm/mach-imx/imx9/soc.c
+++ b/arch/arm/mach-imx/imx9/soc.c
@@ -5,7 +5,7 @@
* Peng Fan <peng.fan@nxp.com>
*/
-#include <common.h>
+#include <config.h>
#include <cpu_func.h>
#include <init.h>
#include <log.h>
@@ -622,6 +622,7 @@
return 0;
}
EVENT_SPY_SIMPLE(EVT_DM_POST_INIT_F, imx9_probe_mu);
+EVENT_SPY_SIMPLE(EVT_DM_POST_INIT_R, imx9_probe_mu);
int timer_init(void)
{
diff --git a/arch/arm/mach-imx/imx9/trdc.c b/arch/arm/mach-imx/imx9/trdc.c
index d0f855b..8cdb284 100644
--- a/arch/arm/mach-imx/imx9/trdc.c
+++ b/arch/arm/mach-imx/imx9/trdc.c
@@ -3,8 +3,8 @@
* Copyright 2022 NXP
*/
-#include <common.h>
#include <log.h>
+#include <linux/errno.h>
#include <asm/io.h>
#include <asm/types.h>
#include <asm/arch/imx-regs.h>
diff --git a/arch/arm/mach-imx/imx_bootaux.c b/arch/arm/mach-imx/imx_bootaux.c
index f7b14ca..26374fd 100644
--- a/arch/arm/mach-imx/imx_bootaux.c
+++ b/arch/arm/mach-imx/imx_bootaux.c
@@ -3,15 +3,18 @@
* Copyright (C) 2016 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <log.h>
+#include <asm/arch/imx-regs.h>
#include <asm/io.h>
#include <asm/mach-imx/sys_proto.h>
#include <command.h>
#include <elf.h>
#include <imx_sip.h>
+#include <vsprintf.h>
#include <linux/arm-smccc.h>
#include <linux/compiler.h>
+#include <linux/errno.h>
+#include <linux/string.h>
#include <cpu_func.h>
#ifndef CONFIG_IMX8
diff --git a/arch/arm/mach-imx/imxrt/soc.c b/arch/arm/mach-imx/imxrt/soc.c
index 34162a3..3028957 100644
--- a/arch/arm/mach-imx/imxrt/soc.c
+++ b/arch/arm/mach-imx/imxrt/soc.c
@@ -4,7 +4,6 @@
* Author(s): Giulio Benetti <giulio.benetti@benettiengineering.com>
*/
-#include <common.h>
#include <init.h>
#include <asm/io.h>
#include <asm/armv7_mpu.h>
diff --git a/arch/arm/mach-imx/iomux-v3.c b/arch/arm/mach-imx/iomux-v3.c
index 18131a2..c134e95 100644
--- a/arch/arm/mach-imx/iomux-v3.c
+++ b/arch/arm/mach-imx/iomux-v3.c
@@ -7,7 +7,6 @@
*
* Copyright (C) 2004-2011 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <asm/io.h>
#include <asm/arch/imx-regs.h>
#include <asm/mach-imx/iomux-v3.h>
diff --git a/arch/arm/mach-imx/mac.c b/arch/arm/mach-imx/mac.c
index 9bb63d2..e739fd1 100644
--- a/arch/arm/mach-imx/mac.c
+++ b/arch/arm/mach-imx/mac.c
@@ -5,7 +5,6 @@
* Peng Fan <peng.fan@nxp.com>
*/
-#include <common.h>
#include <asm/arch/imx-regs.h>
#include <asm/io.h>
#include <asm/arch/sys_proto.h>
diff --git a/arch/arm/mach-imx/misc.c b/arch/arm/mach-imx/misc.c
index 09a758f..7452b82 100644
--- a/arch/arm/mach-imx/misc.c
+++ b/arch/arm/mach-imx/misc.c
@@ -3,7 +3,6 @@
* Copyright 2013 Stefan Roese <sr@denx.de>
*/
-#include <common.h>
#include <lmb.h>
#include <log.h>
#include <asm/arch/sys_proto.h>
diff --git a/arch/arm/mach-imx/mmc_env.c b/arch/arm/mach-imx/mmc_env.c
index 9c822f7..34a7d17 100644
--- a/arch/arm/mach-imx/mmc_env.c
+++ b/arch/arm/mach-imx/mmc_env.c
@@ -3,7 +3,6 @@
* Copyright (C) 2017 NXP
*/
-#include <common.h>
#include <asm/arch/imx-regs.h>
#include <asm/arch/sys_proto.h>
#include <asm/io.h>
diff --git a/arch/arm/mach-imx/mmdc_size.c b/arch/arm/mach-imx/mmdc_size.c
index 41a5af6..2b1d203 100644
--- a/arch/arm/mach-imx/mmdc_size.c
+++ b/arch/arm/mach-imx/mmdc_size.c
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+
-#include <common.h>
+#include <config.h>
#include <asm/io.h>
#if defined(CONFIG_MX53)
diff --git a/arch/arm/mach-imx/mx5/clock.c b/arch/arm/mach-imx/mx5/clock.c
index bbaddd5..0b8a10f 100644
--- a/arch/arm/mach-imx/mx5/clock.c
+++ b/arch/arm/mach-imx/mx5/clock.c
@@ -6,7 +6,6 @@
* (C) Copyright 2009 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <command.h>
#include <log.h>
#include <asm/io.h>
diff --git a/arch/arm/mach-imx/mx5/mx53_dram.c b/arch/arm/mach-imx/mx5/mx53_dram.c
index f744144..180a745 100644
--- a/arch/arm/mach-imx/mx5/mx53_dram.c
+++ b/arch/arm/mach-imx/mx5/mx53_dram.c
@@ -4,7 +4,6 @@
* Patrick Bruenn <p.bruenn@beckhoff.com>
*/
-#include <common.h>
#include <init.h>
#include <asm/global_data.h>
diff --git a/arch/arm/mach-imx/mx5/soc.c b/arch/arm/mach-imx/mx5/soc.c
index 47f531d..4df5f9c 100644
--- a/arch/arm/mach-imx/mx5/soc.c
+++ b/arch/arm/mach-imx/mx5/soc.c
@@ -6,7 +6,6 @@
* (C) Copyright 2009 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <cpu_func.h>
#include <asm/arch/imx-regs.h>
#include <asm/arch/clock.h>
diff --git a/arch/arm/mach-imx/mx6/clock.c b/arch/arm/mach-imx/mx6/clock.c
index 1bdc568..fb9f56d 100644
--- a/arch/arm/mach-imx/mx6/clock.c
+++ b/arch/arm/mach-imx/mx6/clock.c
@@ -3,10 +3,10 @@
* Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <command.h>
#include <div64.h>
#include <log.h>
+#include <time.h>
#include <asm/io.h>
#include <linux/errno.h>
#include <asm/arch/imx-regs.h>
@@ -714,10 +714,10 @@
/*
* Register: PLL_VIDEO
* Bit Field: POST_DIV_SELECT
- * 00 — Divide by 4.
- * 01 — Divide by 2.
- * 10 — Divide by 1.
- * 11 — Reserved
+ * 00 - Divide by 4.
+ * 01 - Divide by 2.
+ * 10 - Divide by 1.
+ * 11 - Reserved
* No need to check post_div(1)
*/
for (post_div = 2; post_div <= 4; post_div <<= 1) {
diff --git a/arch/arm/mach-imx/mx6/ddr.c b/arch/arm/mach-imx/mx6/ddr.c
index 3c87c57..5a1258e 100644
--- a/arch/arm/mach-imx/mx6/ddr.c
+++ b/arch/arm/mach-imx/mx6/ddr.c
@@ -4,7 +4,6 @@
* Author: Tim Harvey <tharvey@gateworks.com>
*/
-#include <common.h>
#include <hang.h>
#include <log.h>
#include <linux/delay.h>
diff --git a/arch/arm/mach-imx/mx6/litesom.c b/arch/arm/mach-imx/mx6/litesom.c
index 2ba3245..ab5de26 100644
--- a/arch/arm/mach-imx/mx6/litesom.c
+++ b/arch/arm/mach-imx/mx6/litesom.c
@@ -17,7 +17,7 @@
#include <asm/mach-imx/iomux-v3.h>
#include <asm/mach-imx/boot_mode.h>
#include <asm/io.h>
-#include <common.h>
+#include <config.h>
#include <fsl_esdhc_imx.h>
#include <linux/delay.h>
#include <linux/sizes.h>
diff --git a/arch/arm/mach-imx/mx6/module_fuse.c b/arch/arm/mach-imx/mx6/module_fuse.c
index b58f11c..8b23d48 100644
--- a/arch/arm/mach-imx/mx6/module_fuse.c
+++ b/arch/arm/mach-imx/mx6/module_fuse.c
@@ -3,7 +3,6 @@
* Copyright 2019 NXP
*/
-#include <common.h>
#include <fdt_support.h>
#include <asm/io.h>
#include <asm/arch/sys_proto.h>
diff --git a/arch/arm/mach-imx/mx6/mp.c b/arch/arm/mach-imx/mx6/mp.c
index de9ace0..091a372 100644
--- a/arch/arm/mach-imx/mx6/mp.c
+++ b/arch/arm/mach-imx/mx6/mp.c
@@ -6,7 +6,6 @@
* (C) Copyright 2009 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <cpu_func.h>
#include <asm/io.h>
#include <linux/errno.h>
diff --git a/arch/arm/mach-imx/mx6/opos6ul.c b/arch/arm/mach-imx/mx6/opos6ul.c
index 38ead8a..340e614 100644
--- a/arch/arm/mach-imx/mx6/opos6ul.c
+++ b/arch/arm/mach-imx/mx6/opos6ul.c
@@ -10,7 +10,7 @@
#include <asm/arch/sys_proto.h>
#include <asm/global_data.h>
#include <asm/io.h>
-#include <common.h>
+#include <config.h>
#include <env.h>
DECLARE_GLOBAL_DATA_PTR;
diff --git a/arch/arm/mach-imx/mx6/soc.c b/arch/arm/mach-imx/mx6/soc.c
index c2875e7..3a3e01f 100644
--- a/arch/arm/mach-imx/mx6/soc.c
+++ b/arch/arm/mach-imx/mx6/soc.c
@@ -7,7 +7,6 @@
* Copyright 2021 NXP
*/
-#include <common.h>
#include <env.h>
#include <init.h>
#include <linux/delay.h>
diff --git a/arch/arm/mach-imx/mx7/clock.c b/arch/arm/mach-imx/mx7/clock.c
index 4e23238..a8606fa 100644
--- a/arch/arm/mach-imx/mx7/clock.c
+++ b/arch/arm/mach-imx/mx7/clock.c
@@ -6,11 +6,12 @@
* Peng Fan <Peng.Fan@freescale.com>
*/
-#include <common.h>
+#include <config.h>
#include <clock_legacy.h>
#include <command.h>
#include <div64.h>
#include <log.h>
+#include <time.h>
#include <asm/global_data.h>
#include <asm/io.h>
#include <linux/errno.h>
diff --git a/arch/arm/mach-imx/mx7/clock_slice.c b/arch/arm/mach-imx/mx7/clock_slice.c
index dd731d9..2a1304f 100644
--- a/arch/arm/mach-imx/mx7/clock_slice.c
+++ b/arch/arm/mach-imx/mx7/clock_slice.c
@@ -6,7 +6,6 @@
* Peng Fan <Peng.Fan@freescale.com>
*/
-#include <common.h>
#include <div64.h>
#include <asm/io.h>
#include <linux/errno.h>
diff --git a/arch/arm/mach-imx/mx7/ddr.c b/arch/arm/mach-imx/mx7/ddr.c
index cf25569..c4a90be 100644
--- a/arch/arm/mach-imx/mx7/ddr.c
+++ b/arch/arm/mach-imx/mx7/ddr.c
@@ -12,7 +12,6 @@
#include <asm/arch/imx-regs.h>
#include <asm/arch/crm_regs.h>
#include <asm/arch/mx7-ddr.h>
-#include <common.h>
#include <linux/delay.h>
/*
diff --git a/arch/arm/mach-imx/mx7/psci-mx7.c b/arch/arm/mach-imx/mx7/psci-mx7.c
index 699a256..12d6a63 100644
--- a/arch/arm/mach-imx/mx7/psci-mx7.c
+++ b/arch/arm/mach-imx/mx7/psci-mx7.c
@@ -13,7 +13,6 @@
#include <asm/armv7.h>
#include <asm/gic.h>
#include <linux/bitops.h>
-#include <common.h>
#include <fsl_wdog.h>
#define GPC_LPCR_A7_BSC 0x0
@@ -631,9 +630,9 @@
* Workaround:
* If both CPU0/CPU1 are IDLE, the last IDLE CPU should
* disable GIC first, then REG_BYPASS_COUNTER is used
- * to mask wakeup INT, and then execute “wfi” is used to
+ * to mask wakeup INT, and then execute "wfi" is used to
* bring the system into power down processing safely.
- * The counter must be enabled as close to the “wfi” state
+ * The counter must be enabled as close to the "wfi" state
* as possible. The following equation can be used to
* determine the RBC counter value:
* RBC_COUNT * (1/32K RTC frequency) >=
diff --git a/arch/arm/mach-imx/mx7/soc.c b/arch/arm/mach-imx/mx7/soc.c
index 689dbef..16c77cb 100644
--- a/arch/arm/mach-imx/mx7/soc.c
+++ b/arch/arm/mach-imx/mx7/soc.c
@@ -4,7 +4,6 @@
* Copyright 2021 NXP
*/
-#include <common.h>
#include <init.h>
#include <asm/io.h>
#include <asm/arch/imx-regs.h>
diff --git a/arch/arm/mach-imx/mx7ulp/clock.c b/arch/arm/mach-imx/mx7ulp/clock.c
index 37d8565..fb19c62 100644
--- a/arch/arm/mach-imx/mx7ulp/clock.c
+++ b/arch/arm/mach-imx/mx7ulp/clock.c
@@ -3,7 +3,7 @@
* Copyright (C) 2016 Freescale Semiconductor, Inc.
*/
-#include <common.h>
+#include <config.h>
#include <clock_legacy.h>
#include <command.h>
#include <div64.h>
diff --git a/arch/arm/mach-imx/mx7ulp/iomux.c b/arch/arm/mach-imx/mx7ulp/iomux.c
index 05ddeed..2c87a8c 100644
--- a/arch/arm/mach-imx/mx7ulp/iomux.c
+++ b/arch/arm/mach-imx/mx7ulp/iomux.c
@@ -2,7 +2,6 @@
/*
* Copyright (C) 2016 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <log.h>
#include <asm/io.h>
#include <asm/arch/imx-regs.h>
diff --git a/arch/arm/mach-imx/mx7ulp/pcc.c b/arch/arm/mach-imx/mx7ulp/pcc.c
index aa7ea86..0bfd8f7 100644
--- a/arch/arm/mach-imx/mx7ulp/pcc.c
+++ b/arch/arm/mach-imx/mx7ulp/pcc.c
@@ -3,7 +3,6 @@
* Copyright (C) 2016 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <div64.h>
#include <log.h>
#include <asm/io.h>
diff --git a/arch/arm/mach-imx/mx7ulp/scg.c b/arch/arm/mach-imx/mx7ulp/scg.c
index 4c06655..d4fb538 100644
--- a/arch/arm/mach-imx/mx7ulp/scg.c
+++ b/arch/arm/mach-imx/mx7ulp/scg.c
@@ -3,7 +3,7 @@
* Copyright (C) 2016 Freescale Semiconductor, Inc.
*/
-#include <common.h>
+#include <config.h>
#include <div64.h>
#include <log.h>
#include <asm/io.h>
diff --git a/arch/arm/mach-imx/mx7ulp/soc.c b/arch/arm/mach-imx/mx7ulp/soc.c
index 217b7c4..198ae2d 100644
--- a/arch/arm/mach-imx/mx7ulp/soc.c
+++ b/arch/arm/mach-imx/mx7ulp/soc.c
@@ -4,7 +4,7 @@
* Copyright 2021 NXP
*/
-#include <common.h>
+#include <config.h>
#include <cpu_func.h>
#include <init.h>
#include <log.h>
diff --git a/arch/arm/mach-imx/priblob.c b/arch/arm/mach-imx/priblob.c
index 5b022d5..6592448 100644
--- a/arch/arm/mach-imx/priblob.c
+++ b/arch/arm/mach-imx/priblob.c
@@ -11,7 +11,6 @@
*/
#include <asm/io.h>
-#include <common.h>
#include <command.h>
#include <fsl_sec.h>
diff --git a/arch/arm/mach-imx/rdc-sema.c b/arch/arm/mach-imx/rdc-sema.c
index e683673..56725cc 100644
--- a/arch/arm/mach-imx/rdc-sema.c
+++ b/arch/arm/mach-imx/rdc-sema.c
@@ -2,7 +2,6 @@
/*
* Copyright (C) 2016 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <asm/io.h>
#include <asm/arch/imx-regs.h>
#include <asm/mach-imx/rdc-sema.h>
diff --git a/arch/arm/mach-imx/speed.c b/arch/arm/mach-imx/speed.c
index 0e81cc8..98a42b2 100644
--- a/arch/arm/mach-imx/speed.c
+++ b/arch/arm/mach-imx/speed.c
@@ -7,7 +7,7 @@
* TsiChung Liew (Tsi-Chung.Liew@freescale.com)
*/
-#include <common.h>
+#include <config.h>
#include <clock_legacy.h>
#include <asm/arch/imx-regs.h>
#include <asm/arch/clock.h>
diff --git a/arch/arm/mach-imx/spl.c b/arch/arm/mach-imx/spl.c
index b30cd96..bc291dc 100644
--- a/arch/arm/mach-imx/spl.c
+++ b/arch/arm/mach-imx/spl.c
@@ -6,7 +6,7 @@
* Author: Tim Harvey <tharvey@gateworks.com>
*/
-#include <common.h>
+#include <config.h>
#include <hang.h>
#include <init.h>
#include <log.h>
diff --git a/arch/arm/mach-imx/spl_imx_romapi.c b/arch/arm/mach-imx/spl_imx_romapi.c
index b9ff9bb..9a86f5c 100644
--- a/arch/arm/mach-imx/spl_imx_romapi.c
+++ b/arch/arm/mach-imx/spl_imx_romapi.c
@@ -3,7 +3,6 @@
* Copyright 2019 NXP
*/
-#include <common.h>
#include <errno.h>
#include <image.h>
#include <imx_container.h>
diff --git a/arch/arm/mach-imx/syscounter.c b/arch/arm/mach-imx/syscounter.c
index 16df118..922f851 100644
--- a/arch/arm/mach-imx/syscounter.c
+++ b/arch/arm/mach-imx/syscounter.c
@@ -5,7 +5,7 @@
* The file use ls102xa/timer.c as a reference.
*/
-#include <common.h>
+#include <config.h>
#include <init.h>
#include <time.h>
#include <asm/global_data.h>
diff --git a/arch/arm/mach-imx/timer.c b/arch/arm/mach-imx/timer.c
index fcd45f0..5ac8f28 100644
--- a/arch/arm/mach-imx/timer.c
+++ b/arch/arm/mach-imx/timer.c
@@ -6,7 +6,6 @@
* (C) Copyright 2009 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <init.h>
#include <time.h>
#include <asm/io.h>
diff --git a/arch/arm/mach-imx/video.c b/arch/arm/mach-imx/video.c
index 1bc9b7c..6cbb49d 100644
--- a/arch/arm/mach-imx/video.c
+++ b/arch/arm/mach-imx/video.c
@@ -1,8 +1,9 @@
// SPDX-License-Identifier: GPL-2.0+
-#include <common.h>
+#include <stdio.h>
#include <env.h>
#include <linux/errno.h>
+#include <asm/arch/imx-regs.h>
#include <asm/mach-imx/video.h>
#ifdef CONFIG_IMX_HDMI
diff --git a/arch/arm/mach-ipq40xx/include/mach/gpio.h b/arch/arm/mach-ipq40xx/include/mach/gpio.h
index a45747c..53c6ae0 100644
--- a/arch/arm/mach-ipq40xx/include/mach/gpio.h
+++ b/arch/arm/mach-ipq40xx/include/mach/gpio.h
@@ -1,10 +1,35 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
- * Empty gpio.h
+ * Qualcomm common pin control data.
*
- * This file must stay as arch/arm/include/asm/gpio.h requires it.
- *
- * Copyright (c) 2019 Sartura Ltd.
- *
- * Author: Robert Marko <robert.marko@sartura.hr>
+ * Copyright (C) 2023 Linaro Ltd.
*/
+#ifndef _QCOM_GPIO_H_
+#define _QCOM_GPIO_H_
+
+#include <asm/types.h>
+#include <stdbool.h>
+
+struct msm_pin_data {
+ int pin_count;
+ const unsigned int *pin_offsets;
+ /* Index of first special pin, these are ignored for now */
+ unsigned int special_pins_start;
+};
+
+static inline u32 qcom_pin_offset(const unsigned int *offs, unsigned int selector)
+{
+ u32 out = (selector * 0x1000);
+
+ if (offs)
+ return out + offs[selector];
+
+ return out;
+}
+
+static inline bool qcom_is_special_pin(const struct msm_pin_data *pindata, unsigned int pin)
+{
+ return pindata->special_pins_start && pin >= pindata->special_pins_start;
+}
+
+#endif /* _QCOM_GPIO_H_ */
diff --git a/arch/arm/mach-k3/Makefile b/arch/arm/mach-k3/Makefile
index 6ee9864..1bd5233 100644
--- a/arch/arm/mach-k3/Makefile
+++ b/arch/arm/mach-k3/Makefile
@@ -25,3 +25,4 @@
obj-$(CONFIG_SOC_K3_AM62P5) += am62p5_init.o
endif
obj-y += common.o security.o
+obj-$(CONFIG_SOC_K3_AM625) += am62x/
diff --git a/arch/arm/mach-k3/am625_init.c b/arch/arm/mach-k3/am625_init.c
index 6c96e88..668f9a5 100644
--- a/arch/arm/mach-k3/am625_init.c
+++ b/arch/arm/mach-k3/am625_init.c
@@ -14,6 +14,7 @@
#include <dm.h>
#include <dm/uclass-internal.h>
#include <dm/pinctrl.h>
+#include <dm/ofnode.h>
#define RTC_BASE_ADDRESS 0x2b1f0000
#define REG_K3RTC_S_CNT_LSW (RTC_BASE_ADDRESS + 0x18)
@@ -24,6 +25,9 @@
#define K3RTC_KICK0_UNLOCK_VALUE 0x83e70b13
#define K3RTC_KICK1_UNLOCK_VALUE 0x95a4f1e0
+/* TISCI DEV ID for A53 Clock */
+#define AM62X_DEV_A53SS0_CORE_0_DEV_ID 135
+
/*
* This uninitialized global variable would normal end up in the .bss section,
* but the .bss is cleared between writing and reading this variable, so move
@@ -112,6 +116,62 @@
writel(K3RTC_KICK1_UNLOCK_VALUE, REG_K3RTC_KICK1);
}
+#if CONFIG_IS_ENABLED(OF_CONTROL)
+static int get_a53_cpu_clock_index(ofnode node)
+{
+ int count, i;
+ struct ofnode_phandle_args *args;
+ ofnode clknode;
+
+ clknode = ofnode_path("/bus@f0000/system-controller@44043000/clock-controller");
+ if (!ofnode_valid(clknode))
+ return -1;
+
+ count = ofnode_count_phandle_with_args(node, "assigned-clocks", "#clock-cells", 0);
+
+ for (i = 0; i < count; i++) {
+ if (!ofnode_parse_phandle_with_args(node, "assigned-clocks",
+ "#clock-cells", 0, i, args)) {
+ if (ofnode_equal(clknode, args->node) &&
+ args->args[0] == AM62X_DEV_A53SS0_CORE_0_DEV_ID)
+ return i;
+ }
+ }
+
+ return -1;
+}
+
+static void fixup_a53_cpu_freq_by_speed_grade(void)
+{
+ int index, size;
+ u32 *rates;
+ ofnode node;
+
+ node = ofnode_path("/a53@0");
+ if (!ofnode_valid(node))
+ return;
+
+ rates = fdt_getprop_w(ofnode_to_fdt(node), ofnode_to_offset(node),
+ "assigned-clock-rates", &size);
+
+ index = get_a53_cpu_clock_index(node);
+
+ if (!rates || index < 0 || index >= (size / sizeof(u32))) {
+ printf("Wrong A53 assigned-clocks configuration\n");
+ return;
+ }
+
+ rates[index] = cpu_to_fdt32(k3_get_a53_max_frequency());
+
+ printf("Changed A53 CPU frequency to %dHz (%c grade) in DT\n",
+ k3_get_a53_max_frequency(), k3_get_speed_grade());
+}
+#else
+static void fixup_a53_cpu_freq_by_speed_grade(void)
+{
+}
+#endif
+
void board_init_f(ulong dummy)
{
struct udevice *dev;
@@ -176,6 +236,14 @@
}
/*
+ * Relocate boot information to OCRAM (after TIFS has opend this
+ * region for us) so the next bootloader stages can keep access to
+ * primary vs backup bootmodes.
+ */
+ if (IS_ENABLED(CONFIG_CPU_V7R))
+ writel(bootindex, K3_BOOT_PARAM_TABLE_INDEX_OCRAM);
+
+ /*
* Force probe of clk_k3 driver here to ensure basic default clock
* configuration is always done.
*/
@@ -210,6 +278,8 @@
panic("DRAM init failed: %d\n", ret);
}
spl_enable_cache();
+
+ fixup_a53_cpu_freq_by_speed_grade();
}
u32 spl_mmc_boot_mode(struct mmc *mmc, const u32 boot_device)
@@ -235,100 +305,7 @@
}
}
-static u32 __get_backup_bootmedia(u32 devstat)
-{
- u32 bkup_bootmode = (devstat & MAIN_DEVSTAT_BACKUP_BOOTMODE_MASK) >>
- MAIN_DEVSTAT_BACKUP_BOOTMODE_SHIFT;
- u32 bkup_bootmode_cfg =
- (devstat & MAIN_DEVSTAT_BACKUP_BOOTMODE_CFG_MASK) >>
- MAIN_DEVSTAT_BACKUP_BOOTMODE_CFG_SHIFT;
-
- switch (bkup_bootmode) {
- case BACKUP_BOOT_DEVICE_UART:
- return BOOT_DEVICE_UART;
-
- case BACKUP_BOOT_DEVICE_USB:
- return BOOT_DEVICE_USB;
-
- case BACKUP_BOOT_DEVICE_ETHERNET:
- return BOOT_DEVICE_ETHERNET;
-
- case BACKUP_BOOT_DEVICE_MMC:
- if (bkup_bootmode_cfg)
- return BOOT_DEVICE_MMC2;
- return BOOT_DEVICE_MMC1;
-
- case BACKUP_BOOT_DEVICE_SPI:
- return BOOT_DEVICE_SPI;
-
- case BACKUP_BOOT_DEVICE_I2C:
- return BOOT_DEVICE_I2C;
-
- case BACKUP_BOOT_DEVICE_DFU:
- if (bkup_bootmode_cfg & MAIN_DEVSTAT_BACKUP_USB_MODE_MASK)
- return BOOT_DEVICE_USB;
- return BOOT_DEVICE_DFU;
- };
-
- return BOOT_DEVICE_RAM;
-}
-
-static u32 __get_primary_bootmedia(u32 devstat)
-{
- u32 bootmode = (devstat & MAIN_DEVSTAT_PRIMARY_BOOTMODE_MASK) >>
- MAIN_DEVSTAT_PRIMARY_BOOTMODE_SHIFT;
- u32 bootmode_cfg = (devstat & MAIN_DEVSTAT_PRIMARY_BOOTMODE_CFG_MASK) >>
- MAIN_DEVSTAT_PRIMARY_BOOTMODE_CFG_SHIFT;
-
- switch (bootmode) {
- case BOOT_DEVICE_OSPI:
- fallthrough;
- case BOOT_DEVICE_QSPI:
- fallthrough;
- case BOOT_DEVICE_XSPI:
- fallthrough;
- case BOOT_DEVICE_SPI:
- return BOOT_DEVICE_SPI;
-
- case BOOT_DEVICE_ETHERNET_RGMII:
- fallthrough;
- case BOOT_DEVICE_ETHERNET_RMII:
- return BOOT_DEVICE_ETHERNET;
-
- case BOOT_DEVICE_EMMC:
- return BOOT_DEVICE_MMC1;
-
- case BOOT_DEVICE_MMC:
- if ((bootmode_cfg & MAIN_DEVSTAT_PRIMARY_MMC_PORT_MASK) >>
- MAIN_DEVSTAT_PRIMARY_MMC_PORT_SHIFT)
- return BOOT_DEVICE_MMC2;
- return BOOT_DEVICE_MMC1;
-
- case BOOT_DEVICE_DFU:
- if ((bootmode_cfg & MAIN_DEVSTAT_PRIMARY_USB_MODE_MASK) >>
- MAIN_DEVSTAT_PRIMARY_USB_MODE_SHIFT)
- return BOOT_DEVICE_USB;
- return BOOT_DEVICE_DFU;
-
- case BOOT_DEVICE_NOBOOT:
- return BOOT_DEVICE_RAM;
- }
-
- return bootmode;
-}
-
u32 spl_boot_device(void)
{
- u32 devstat = readl(CTRLMMR_MAIN_DEVSTAT);
- u32 bootmedia;
-
- if (bootindex == K3_PRIMARY_BOOTMODE)
- bootmedia = __get_primary_bootmedia(devstat);
- else
- bootmedia = __get_backup_bootmedia(devstat);
-
- debug("am625_init: %s: devstat = 0x%x bootmedia = 0x%x bootindex = %d\n",
- __func__, devstat, bootmedia, bootindex);
-
- return bootmedia;
+ return get_boot_device();
}
diff --git a/arch/arm/mach-k3/am62a7_init.c b/arch/arm/mach-k3/am62a7_init.c
index 2a0221a..658828c 100644
--- a/arch/arm/mach-k3/am62a7_init.c
+++ b/arch/arm/mach-k3/am62a7_init.c
@@ -31,7 +31,7 @@
bootindex = *(u32 *)(CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX);
if (IS_ENABLED(CONFIG_CPU_V7R)) {
- memcpy(&bootdata, (uintptr_t *)ROM_ENTENDED_BOOT_DATA_INFO,
+ memcpy(&bootdata, (uintptr_t *)ROM_EXTENDED_BOOT_DATA_INFO,
sizeof(struct rom_extended_boot_data));
}
}
diff --git a/arch/arm/mach-k3/am62x/Kconfig b/arch/arm/mach-k3/am62x/Kconfig
index 7c9bac2..8b0cdd7 100644
--- a/arch/arm/mach-k3/am62x/Kconfig
+++ b/arch/arm/mach-k3/am62x/Kconfig
@@ -31,6 +31,7 @@
select ARM64
select BINMAN
select OF_SYSTEM_SETUP
+ imply OF_UPSTREAM
config TARGET_PHYCORE_AM62X_R5
bool "PHYTEC phyCORE-AM62x running on R5"
@@ -48,6 +49,7 @@
select ARM64
select BINMAN
select OF_SYSTEM_SETUP
+ imply OF_UPSTREAM
config TARGET_VERDIN_AM62_R5
bool "Toradex Verdin AM62 running on R5"
diff --git a/arch/arm/mach-k3/am62x/Makefile b/arch/arm/mach-k3/am62x/Makefile
new file mode 100644
index 0000000..acf09c3
--- /dev/null
+++ b/arch/arm/mach-k3/am62x/Makefile
@@ -0,0 +1,2 @@
+# SPDX-License-Identifier: GPL-2.0+
+obj-y += boot.o
diff --git a/arch/arm/mach-k3/am62x/boot.c b/arch/arm/mach-k3/am62x/boot.c
new file mode 100644
index 0000000..132b42f
--- /dev/null
+++ b/arch/arm/mach-k3/am62x/boot.c
@@ -0,0 +1,103 @@
+// SPDX-License-Identifier: GPL-2.0+
+#include <asm/io.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/am62_spl.h>
+
+static u32 __get_backup_bootmedia(u32 devstat)
+{
+ u32 bkup_bootmode = (devstat & MAIN_DEVSTAT_BACKUP_BOOTMODE_MASK) >>
+ MAIN_DEVSTAT_BACKUP_BOOTMODE_SHIFT;
+ u32 bkup_bootmode_cfg =
+ (devstat & MAIN_DEVSTAT_BACKUP_BOOTMODE_CFG_MASK) >>
+ MAIN_DEVSTAT_BACKUP_BOOTMODE_CFG_SHIFT;
+
+ switch (bkup_bootmode) {
+ case BACKUP_BOOT_DEVICE_UART:
+ return BOOT_DEVICE_UART;
+
+ case BACKUP_BOOT_DEVICE_USB:
+ return BOOT_DEVICE_USB;
+
+ case BACKUP_BOOT_DEVICE_ETHERNET:
+ return BOOT_DEVICE_ETHERNET;
+
+ case BACKUP_BOOT_DEVICE_MMC:
+ if (bkup_bootmode_cfg)
+ return BOOT_DEVICE_MMC2;
+ return BOOT_DEVICE_MMC1;
+
+ case BACKUP_BOOT_DEVICE_SPI:
+ return BOOT_DEVICE_SPI;
+
+ case BACKUP_BOOT_DEVICE_I2C:
+ return BOOT_DEVICE_I2C;
+
+ case BACKUP_BOOT_DEVICE_DFU:
+ if (bkup_bootmode_cfg & MAIN_DEVSTAT_BACKUP_USB_MODE_MASK)
+ return BOOT_DEVICE_USB;
+ return BOOT_DEVICE_DFU;
+ };
+
+ return BOOT_DEVICE_RAM;
+}
+
+static u32 __get_primary_bootmedia(u32 devstat)
+{
+ u32 bootmode = (devstat & MAIN_DEVSTAT_PRIMARY_BOOTMODE_MASK) >>
+ MAIN_DEVSTAT_PRIMARY_BOOTMODE_SHIFT;
+ u32 bootmode_cfg = (devstat & MAIN_DEVSTAT_PRIMARY_BOOTMODE_CFG_MASK) >>
+ MAIN_DEVSTAT_PRIMARY_BOOTMODE_CFG_SHIFT;
+
+ switch (bootmode) {
+ case BOOT_DEVICE_OSPI:
+ fallthrough;
+ case BOOT_DEVICE_QSPI:
+ fallthrough;
+ case BOOT_DEVICE_XSPI:
+ fallthrough;
+ case BOOT_DEVICE_SPI:
+ return BOOT_DEVICE_SPI;
+
+ case BOOT_DEVICE_ETHERNET_RGMII:
+ fallthrough;
+ case BOOT_DEVICE_ETHERNET_RMII:
+ return BOOT_DEVICE_ETHERNET;
+
+ case BOOT_DEVICE_EMMC:
+ return BOOT_DEVICE_MMC1;
+
+ case BOOT_DEVICE_MMC:
+ if ((bootmode_cfg & MAIN_DEVSTAT_PRIMARY_MMC_PORT_MASK) >>
+ MAIN_DEVSTAT_PRIMARY_MMC_PORT_SHIFT)
+ return BOOT_DEVICE_MMC2;
+ return BOOT_DEVICE_MMC1;
+
+ case BOOT_DEVICE_DFU:
+ if ((bootmode_cfg & MAIN_DEVSTAT_PRIMARY_USB_MODE_MASK) >>
+ MAIN_DEVSTAT_PRIMARY_USB_MODE_SHIFT)
+ return BOOT_DEVICE_USB;
+ return BOOT_DEVICE_DFU;
+
+ case BOOT_DEVICE_NOBOOT:
+ return BOOT_DEVICE_RAM;
+ }
+
+ return bootmode;
+}
+
+u32 get_boot_device(void)
+{
+ u32 devstat = readl(CTRLMMR_MAIN_DEVSTAT);
+ u32 bootmode = *(u32 *)(K3_BOOT_PARAM_TABLE_INDEX_OCRAM);
+ u32 bootmedia;
+
+ if (bootmode == K3_PRIMARY_BOOTMODE)
+ bootmedia = __get_primary_bootmedia(devstat);
+ else
+ bootmedia = __get_backup_bootmedia(devstat);
+
+ debug("%s: devstat = 0x%x bootmedia = 0x%x bootmode = %d\n",
+ __func__, devstat, bootmedia, bootmode);
+
+ return bootmedia;
+}
diff --git a/arch/arm/mach-k3/am642_init.c b/arch/arm/mach-k3/am642_init.c
index ddf47ef..80c3cb3 100644
--- a/arch/arm/mach-k3/am642_init.c
+++ b/arch/arm/mach-k3/am642_init.c
@@ -226,7 +226,7 @@
* The warm reset realigns internal clocks and prevents the lockup from
* happening.
*/
- ret = uclass_first_device_err(UCLASS_SYSRESET, &dev);
+ ret = uclass_get_device_by_driver(UCLASS_FIRMWARE, DM_DRIVER_GET(ti_sci), &dev);
if (ret)
printf("\n%s:uclass device error [%d]\n",__func__,ret);
diff --git a/arch/arm/mach-k3/am64x/Kconfig b/arch/arm/mach-k3/am64x/Kconfig
index b8fea87..e8b7d54 100644
--- a/arch/arm/mach-k3/am64x/Kconfig
+++ b/arch/arm/mach-k3/am64x/Kconfig
@@ -35,6 +35,7 @@
select BINMAN
imply BOARD
imply SPL_BOARD
+ imply OF_UPSTREAM
config TARGET_PHYCORE_AM64X_R5
bool "PHYTEC phyCORE-AM64x running on R5"
diff --git a/arch/arm/mach-k3/common.c b/arch/arm/mach-k3/common.c
index b0fb87b..1a269d6 100644
--- a/arch/arm/mach-k3/common.c
+++ b/arch/arm/mach-k3/common.c
@@ -24,6 +24,7 @@
#include <asm/io.h>
#include <fs_loader.h>
#include <fs.h>
+#include <efi_loader.h>
#include <env.h>
#include <elf.h>
#include <soc.h>
@@ -270,6 +271,17 @@
printf("Failed to probe am65_cpsw_nuss driver\n");
}
+ if (IS_ENABLED(CONFIG_TI_ICSSG_PRUETH)) {
+ struct udevice *dev;
+ int ret;
+
+ ret = uclass_get_device_by_driver(UCLASS_MISC,
+ DM_DRIVER_GET(prueth),
+ &dev);
+ if (ret)
+ printf("Failed to probe prueth driver\n");
+ }
+
/* Default FIT boot on HS-SE devices */
if (get_device_type() == K3_DEVICE_TYPE_HS_SE)
env_set("boot_fit", "1");
@@ -296,3 +308,14 @@
writel(qos_data[i].val, (uintptr_t)qos_data[i].reg);
}
#endif
+
+void efi_add_known_memory(void)
+{
+ if (IS_ENABLED(CONFIG_EFI_LOADER))
+ /*
+ * Memory over ram_top can be used by various firmware
+ * Declare to EFI only memory area below ram_top
+ */
+ efi_add_memory_map(gd->ram_base, gd->ram_top - gd->ram_base,
+ EFI_CONVENTIONAL_MEMORY);
+}
diff --git a/arch/arm/mach-k3/include/mach/am62_hardware.h b/arch/arm/mach-k3/include/mach/am62_hardware.h
index 264f8a4..bcbc482 100644
--- a/arch/arm/mach-k3/include/mach/am62_hardware.h
+++ b/arch/arm/mach-k3/include/mach/am62_hardware.h
@@ -83,6 +83,7 @@
#define CTRLMMR_DBOUNCE_CFG(index) (MCU_CTRL_MMR0_BASE + 0x4080 + (index * 4))
#define ROM_EXTENDED_BOOT_DATA_INFO 0x43c3f1e0
+#define K3_BOOT_PARAM_TABLE_INDEX_OCRAM 0x7000F290
#define TI_SRAM_SCRATCH_BOARD_EEPROM_START 0x43c30000
@@ -122,6 +123,21 @@
}
}
+static inline int k3_get_a53_max_frequency(void)
+{
+ switch (k3_get_speed_grade()) {
+ case 'K':
+ return 800000000;
+ case 'S':
+ return 1000000000;
+ case 'T':
+ return 1250000000;
+ case 'G':
+ default:
+ return 300000000;
+ }
+}
+
static inline int k3_has_pru(void)
{
u32 full_devid = readl(CTRLMMR_WKUP_JTAG_DEVICE_ID);
diff --git a/arch/arm/mach-k3/include/mach/am62a_hardware.h b/arch/arm/mach-k3/include/mach/am62a_hardware.h
index 1108080..cd61abe 100644
--- a/arch/arm/mach-k3/include/mach/am62a_hardware.h
+++ b/arch/arm/mach-k3/include/mach/am62a_hardware.h
@@ -66,7 +66,7 @@
#define MCU_CTRL_DEVICE_CLKOUT_32K_CTRL (MCU_CTRL_MMR0_BASE + 0x8058)
#define MCU_CTRL_DEVICE_CLKOUT_LFOSC_SELECT_VAL (0x3)
-#define ROM_ENTENDED_BOOT_DATA_INFO 0x43c3f1e0
+#define ROM_EXTENDED_BOOT_DATA_INFO 0x43c3f1e0
#define K3_BOOT_PARAM_TABLE_INDEX_OCRAM 0x7000F290
diff --git a/arch/arm/mach-k3/include/mach/hardware.h b/arch/arm/mach-k3/include/mach/hardware.h
index af982e7..c724450 100644
--- a/arch/arm/mach-k3/include/mach/hardware.h
+++ b/arch/arm/mach-k3/include/mach/hardware.h
@@ -107,4 +107,5 @@
u32 num_components;
};
+u32 get_boot_device(void);
#endif /* _ASM_ARCH_HARDWARE_H_ */
diff --git a/arch/arm/mach-k3/r5/common.c b/arch/arm/mach-k3/r5/common.c
index c02f8d3..0f6c294 100644
--- a/arch/arm/mach-k3/r5/common.c
+++ b/arch/arm/mach-k3/r5/common.c
@@ -24,6 +24,9 @@
IMAGE_ID_OPTEE,
IMAGE_ID_SPL,
IMAGE_ID_DM_FW,
+ IMAGE_ID_TIFSSTUB_HS,
+ IMAGE_ID_TIFSSTUB_FS,
+ IMAGE_ID_T,
IMAGE_AMT,
};
@@ -33,6 +36,9 @@
"tee",
"U-Boot",
"DM",
+ "tifsstub-hs",
+ "tifsstub-fs",
+ "tifsstub-gp",
};
#endif
@@ -314,6 +320,24 @@
break;
}
}
+
+ if (i < IMAGE_AMT && i > IMAGE_ID_DM_FW) {
+ int device_type = get_device_type();
+
+ if ((device_type == K3_DEVICE_TYPE_HS_SE &&
+ strcmp(os, "tifsstub-hs")) ||
+ (device_type == K3_DEVICE_TYPE_HS_FS &&
+ strcmp(os, "tifsstub-fs")) ||
+ (device_type == K3_DEVICE_TYPE_GP &&
+ strcmp(os, "tifsstub-gp"))) {
+ *p_size = 0;
+ } else {
+ debug("tifsstub-type: %s\n", os);
+ }
+
+ return;
+ }
+
/*
* Only DM and the DTBs are being authenticated here,
* rest will be authenticated when A72 cluster is up
diff --git a/arch/arm/mach-k3/security.c b/arch/arm/mach-k3/security.c
index 22697a2..7c46914 100644
--- a/arch/arm/mach-k3/security.c
+++ b/arch/arm/mach-k3/security.c
@@ -50,7 +50,7 @@
if (get_device_type() == K3_DEVICE_TYPE_GP) {
if (ti_secure_cert_detected(*p_image)) {
- printf("Warning: Detected image signing certificate on GP device. "
+ debug("Warning: Detected image signing certificate on GP device. "
"Skipping certificate to prevent boot failure. "
"This will fail if the image was also encrypted\n");
@@ -60,6 +60,7 @@
return;
}
+ printf("Skipping authentication on GP device\n");
*p_image += cert_length;
*p_size -= cert_length;
}
diff --git a/arch/arm/mach-kirkwood/Kconfig b/arch/arm/mach-kirkwood/Kconfig
index c2fff84..031d4e5 100644
--- a/arch/arm/mach-kirkwood/Kconfig
+++ b/arch/arm/mach-kirkwood/Kconfig
@@ -6,10 +6,12 @@
config KW88F6192
bool
select ARCH_VERY_EARLY_INIT
+ imply OF_UPSTREAM
config KW88F6281
bool
select ARCH_VERY_EARLY_INIT
+ imply OF_UPSTREAM
config SHEEVA_88SV131
bool
diff --git a/arch/arm/mach-kirkwood/cache.c b/arch/arm/mach-kirkwood/cache.c
index 009b7de..acd2e8b 100644
--- a/arch/arm/mach-kirkwood/cache.c
+++ b/arch/arm/mach-kirkwood/cache.c
@@ -3,7 +3,6 @@
* Copyright (c) 2012 Michael Walle
* Michael Walle <michael@walle.cc>
*/
-#include <common.h>
#include <asm/arch/cpu.h>
#include <asm/cache.h>
diff --git a/arch/arm/mach-kirkwood/cpu.c b/arch/arm/mach-kirkwood/cpu.c
index 2b493b3..a432abe 100644
--- a/arch/arm/mach-kirkwood/cpu.c
+++ b/arch/arm/mach-kirkwood/cpu.c
@@ -5,7 +5,6 @@
* Written-by: Prafulla Wadaskar <prafulla@marvell.com>
*/
-#include <common.h>
#include <command.h>
#include <cpu_func.h>
#include <env.h>
diff --git a/arch/arm/mach-kirkwood/include/mach/mpp.h b/arch/arm/mach-kirkwood/include/mach/mpp.h
index 4d1f58c..e275794 100644
--- a/arch/arm/mach-kirkwood/include/mach/mpp.h
+++ b/arch/arm/mach-kirkwood/include/mach/mpp.h
@@ -8,6 +8,8 @@
#ifndef __KIRKWOOD_MPP_H
#define __KIRKWOOD_MPP_H
+#include <linux/types.h>
+
#define MPP(_num, _sel, _in, _out, _F6180, _F6190, _F6192, _F6281) ( \
/* MPP number */ ((_num) & 0xff) | \
/* MPP select value */ (((_sel) & 0xf) << 8) | \
diff --git a/arch/arm/mach-kirkwood/mpp.c b/arch/arm/mach-kirkwood/mpp.c
index 4fdad99..7938820 100644
--- a/arch/arm/mach-kirkwood/mpp.c
+++ b/arch/arm/mach-kirkwood/mpp.c
@@ -9,7 +9,6 @@
* warranty of any kind, whether express or implied.
*/
-#include <common.h>
#include <log.h>
#include <asm/io.h>
#include <asm/arch/cpu.h>
diff --git a/arch/arm/mach-lpc32xx/clk.c b/arch/arm/mach-lpc32xx/clk.c
index cb2344d..2e11903 100644
--- a/arch/arm/mach-lpc32xx/clk.c
+++ b/arch/arm/mach-lpc32xx/clk.c
@@ -3,7 +3,6 @@
* Copyright (C) 2011 by Vladimir Zapolskiy <vz@mleia.com>
*/
-#include <common.h>
#include <clock_legacy.h>
#include <div64.h>
#include <asm/arch/cpu.h>
diff --git a/arch/arm/mach-lpc32xx/cpu.c b/arch/arm/mach-lpc32xx/cpu.c
index a97f9a1..80f5e7c 100644
--- a/arch/arm/mach-lpc32xx/cpu.c
+++ b/arch/arm/mach-lpc32xx/cpu.c
@@ -3,7 +3,6 @@
* Copyright (C) 2011-2015 by Vladimir Zapolskiy <vz@mleia.com>
*/
-#include <common.h>
#include <cpu_func.h>
#include <init.h>
#include <net.h>
diff --git a/arch/arm/mach-lpc32xx/devices.c b/arch/arm/mach-lpc32xx/devices.c
index 6a67a35..49308d6 100644
--- a/arch/arm/mach-lpc32xx/devices.c
+++ b/arch/arm/mach-lpc32xx/devices.c
@@ -3,7 +3,7 @@
* Copyright (C) 2011 by Vladimir Zapolskiy <vz@mleia.com>
*/
-#include <common.h>
+#include <config.h>
#include <dm.h>
#include <ns16550.h>
diff --git a/arch/arm/mach-lpc32xx/dram.c b/arch/arm/mach-lpc32xx/dram.c
index 1602237..ab7c135 100644
--- a/arch/arm/mach-lpc32xx/dram.c
+++ b/arch/arm/mach-lpc32xx/dram.c
@@ -10,7 +10,6 @@
* This code runs from SRAM.
*/
-#include <common.h>
#include <netdev.h>
#include <asm/arch/cpu.h>
#include <asm/arch/clk.h>
diff --git a/arch/arm/mach-lpc32xx/timer.c b/arch/arm/mach-lpc32xx/timer.c
index 90183e3..523f9cf 100644
--- a/arch/arm/mach-lpc32xx/timer.c
+++ b/arch/arm/mach-lpc32xx/timer.c
@@ -3,7 +3,6 @@
* Copyright (C) 2011 Vladimir Zapolskiy <vz@mleia.com>
*/
-#include <common.h>
#include <init.h>
#include <time.h>
#include <asm/arch/cpu.h>
diff --git a/arch/arm/mach-mediatek/Kconfig b/arch/arm/mach-mediatek/Kconfig
index 82018bd..ff1fdee 100644
--- a/arch/arm/mach-mediatek/Kconfig
+++ b/arch/arm/mach-mediatek/Kconfig
@@ -23,6 +23,7 @@
config TARGET_MT7623
bool "MediaTek MT7623 SoC"
select CPU_V7A
+ select MMC_SUPPORTS_TUNING
help
The MediaTek MT7623 is a ARM-based SoC with a quad-core Cortex-A7
including NEON and GPU, Mali-450 graphics, several DDR3 options,
diff --git a/arch/arm/mach-mediatek/cpu.c b/arch/arm/mach-mediatek/cpu.c
index c329e7c..8e8bc4f 100644
--- a/arch/arm/mach-mediatek/cpu.c
+++ b/arch/arm/mach-mediatek/cpu.c
@@ -3,7 +3,6 @@
* Copyright (C) 2018 MediaTek Inc.
*/
-#include <common.h>
#include <cpu_func.h>
#include <dm.h>
#include <init.h>
diff --git a/arch/arm/mach-mediatek/mt7622/init.c b/arch/arm/mach-mediatek/mt7622/init.c
index 00d3eb9..6e970ac 100644
--- a/arch/arm/mach-mediatek/mt7622/init.c
+++ b/arch/arm/mach-mediatek/mt7622/init.c
@@ -9,7 +9,6 @@
#include <asm/armv8/mmu.h>
#include <asm/system.h>
#include <asm/global_data.h>
-#include <asm/u-boot.h>
#include <linux/sizes.h>
DECLARE_GLOBAL_DATA_PTR;
diff --git a/arch/arm/mach-mediatek/mt7623/init.c b/arch/arm/mach-mediatek/mt7623/init.c
index 988b057..3d6ba3f 100644
--- a/arch/arm/mach-mediatek/mt7623/init.c
+++ b/arch/arm/mach-mediatek/mt7623/init.c
@@ -3,7 +3,7 @@
* Copyright (C) 2018 MediaTek Inc.
*/
-#include <common.h>
+#include <config.h>
#include <init.h>
#include <asm/global_data.h>
#include <linux/io.h>
diff --git a/arch/arm/mach-mediatek/mt7629/init.c b/arch/arm/mach-mediatek/mt7629/init.c
index 0130554..7cb8b72 100644
--- a/arch/arm/mach-mediatek/mt7629/init.c
+++ b/arch/arm/mach-mediatek/mt7629/init.c
@@ -5,7 +5,7 @@
*/
#include <clk.h>
-#include <common.h>
+#include <config.h>
#include <dm.h>
#include <fdtdec.h>
#include <init.h>
diff --git a/arch/arm/mach-mediatek/mt7981/init.c b/arch/arm/mach-mediatek/mt7981/init.c
index 862f0ca..07da589 100644
--- a/arch/arm/mach-mediatek/mt7981/init.c
+++ b/arch/arm/mach-mediatek/mt7981/init.c
@@ -9,7 +9,6 @@
#include <asm/armv8/mmu.h>
#include <asm/system.h>
#include <asm/global_data.h>
-#include <asm/u-boot.h>
#include <linux/sizes.h>
DECLARE_GLOBAL_DATA_PTR;
diff --git a/arch/arm/mach-mediatek/mt7986/init.c b/arch/arm/mach-mediatek/mt7986/init.c
index 905a3ab..a521c95 100644
--- a/arch/arm/mach-mediatek/mt7986/init.c
+++ b/arch/arm/mach-mediatek/mt7986/init.c
@@ -9,7 +9,6 @@
#include <asm/armv8/mmu.h>
#include <asm/system.h>
#include <asm/global_data.h>
-#include <asm/u-boot.h>
#include <linux/sizes.h>
DECLARE_GLOBAL_DATA_PTR;
diff --git a/arch/arm/mach-mediatek/mt7988/init.c b/arch/arm/mach-mediatek/mt7988/init.c
index 082f12b..2efc8c6 100644
--- a/arch/arm/mach-mediatek/mt7988/init.c
+++ b/arch/arm/mach-mediatek/mt7988/init.c
@@ -8,7 +8,6 @@
#include <init.h>
#include <asm/armv8/mmu.h>
#include <asm/global_data.h>
-#include <asm/u-boot.h>
#include <asm/system.h>
DECLARE_GLOBAL_DATA_PTR;
diff --git a/arch/arm/mach-mediatek/mt8183/init.c b/arch/arm/mach-mediatek/mt8183/init.c
index 7496029..3724354 100644
--- a/arch/arm/mach-mediatek/mt8183/init.c
+++ b/arch/arm/mach-mediatek/mt8183/init.c
@@ -6,7 +6,6 @@
*/
#include <clk.h>
-#include <common.h>
#include <dm.h>
#include <fdtdec.h>
#include <ram.h>
diff --git a/arch/arm/mach-mediatek/mt8512/init.c b/arch/arm/mach-mediatek/mt8512/init.c
index 5a21e9a..3b48caf 100644
--- a/arch/arm/mach-mediatek/mt8512/init.c
+++ b/arch/arm/mach-mediatek/mt8512/init.c
@@ -7,7 +7,6 @@
*/
#include <clk.h>
-#include <common.h>
#include <dm.h>
#include <fdtdec.h>
#include <init.h>
diff --git a/arch/arm/mach-mediatek/mt8516/init.c b/arch/arm/mach-mediatek/mt8516/init.c
index 3460dcc..892bd44 100644
--- a/arch/arm/mach-mediatek/mt8516/init.c
+++ b/arch/arm/mach-mediatek/mt8516/init.c
@@ -6,7 +6,6 @@
*/
#include <clk.h>
-#include <common.h>
#include <cpu_func.h>
#include <dm.h>
#include <fdtdec.h>
diff --git a/arch/arm/mach-mediatek/mt8518/init.c b/arch/arm/mach-mediatek/mt8518/init.c
index f7e03de..c04bcb6 100644
--- a/arch/arm/mach-mediatek/mt8518/init.c
+++ b/arch/arm/mach-mediatek/mt8518/init.c
@@ -7,7 +7,6 @@
*/
#include <clk.h>
-#include <common.h>
#include <cpu_func.h>
#include <dm.h>
#include <fdtdec.h>
diff --git a/arch/arm/mach-mediatek/spl.c b/arch/arm/mach-mediatek/spl.c
index d3cda94..247d7ee 100644
--- a/arch/arm/mach-mediatek/spl.c
+++ b/arch/arm/mach-mediatek/spl.c
@@ -5,7 +5,6 @@
*/
#include <clk.h>
-#include <common.h>
#include <hang.h>
#include <init.h>
#include <spl.h>
diff --git a/arch/arm/mach-meson/Kconfig b/arch/arm/mach-meson/Kconfig
index 95e7b01..7570f48 100644
--- a/arch/arm/mach-meson/Kconfig
+++ b/arch/arm/mach-meson/Kconfig
@@ -32,24 +32,28 @@
config MESON_GXL
bool "GXL"
select MESON_GX
+ imply OF_UPSTREAM
help
Select this if your SoC is an S905X/D or S805X
config MESON_GXM
bool "GXM"
select MESON_GX
+ imply OF_UPSTREAM
help
Select this if your SoC is an S912
config MESON_AXG
bool "AXG"
select MESON64_COMMON
+ imply OF_UPSTREAM
help
Select this if your SoC is an A113X/D
config MESON_G12A
bool "G12A"
select MESON64_COMMON
+ imply OF_UPSTREAM
help
Select this if your SoC is an S905X/D2
diff --git a/arch/arm/mach-meson/board-a1.c b/arch/arm/mach-meson/board-a1.c
index 967bb67..f848c0f 100644
--- a/arch/arm/mach-meson/board-a1.c
+++ b/arch/arm/mach-meson/board-a1.c
@@ -3,12 +3,12 @@
* (C) Copyright 2023 SberDevices, Inc.
*/
-#include <common.h>
#include <asm/arch/a1.h>
#include <asm/arch/boot.h>
#include <asm/armv8/mmu.h>
#include <asm/io.h>
#include <linux/compiler.h>
+#include <linux/errno.h>
#include <linux/sizes.h>
phys_size_t get_effective_memsize(void)
diff --git a/arch/arm/mach-meson/board-axg.c b/arch/arm/mach-meson/board-axg.c
index fdf1875..6535539 100644
--- a/arch/arm/mach-meson/board-axg.c
+++ b/arch/arm/mach-meson/board-axg.c
@@ -4,7 +4,6 @@
* (C) Copyright 2018 Neil Armstrong <narmstrong@baylibre.com>
*/
-#include <common.h>
#include <init.h>
#include <net.h>
#include <asm/arch/boot.h>
diff --git a/arch/arm/mach-meson/board-common.c b/arch/arm/mach-meson/board-common.c
index 7ceba7c..39774c4 100644
--- a/arch/arm/mach-meson/board-common.c
+++ b/arch/arm/mach-meson/board-common.c
@@ -3,7 +3,6 @@
* (C) Copyright 2016 Beniamino Galvani <b.galvani@gmail.com>
*/
-#include <common.h>
#include <cpu_func.h>
#include <fastboot.h>
#include <init.h>
diff --git a/arch/arm/mach-meson/board-g12a.c b/arch/arm/mach-meson/board-g12a.c
index d5a830f..dc4abe1 100644
--- a/arch/arm/mach-meson/board-g12a.c
+++ b/arch/arm/mach-meson/board-g12a.c
@@ -4,7 +4,6 @@
* (C) Copyright 2018 Neil Armstrong <narmstrong@baylibre.com>
*/
-#include <common.h>
#include <init.h>
#include <log.h>
#include <net.h>
diff --git a/arch/arm/mach-meson/board-gx.c b/arch/arm/mach-meson/board-gx.c
index c3fbdff..0370ed5 100644
--- a/arch/arm/mach-meson/board-gx.c
+++ b/arch/arm/mach-meson/board-gx.c
@@ -4,7 +4,6 @@
* (C) Copyright 2018 Neil Armstrong <narmstrong@baylibre.com>
*/
-#include <common.h>
#include <init.h>
#include <net.h>
#include <asm/arch/boot.h>
diff --git a/arch/arm/mach-meson/board-info.c b/arch/arm/mach-meson/board-info.c
index d51d9b8..b4058f5 100644
--- a/arch/arm/mach-meson/board-info.c
+++ b/arch/arm/mach-meson/board-info.c
@@ -4,7 +4,6 @@
* (C) Copyright 2019 Neil Armstrong <narmstrong@baylibre.com>
*/
-#include <common.h>
#include <init.h>
#include <asm/global_data.h>
#include <asm/io.h>
diff --git a/arch/arm/mach-meson/sm.c b/arch/arm/mach-meson/sm.c
index 914fd11..4d9f83d 100644
--- a/arch/arm/mach-meson/sm.c
+++ b/arch/arm/mach-meson/sm.c
@@ -5,7 +5,6 @@
* Secure monitor calls.
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <regmap.h>
diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig
index 2058c95..f15d3cc 100644
--- a/arch/arm/mach-mvebu/Kconfig
+++ b/arch/arm/mach-mvebu/Kconfig
@@ -18,6 +18,8 @@
select TOOLS_KWBIMAGE if SPL
select SPL_SYS_NO_VECTOR_TABLE if SPL
select ARCH_VERY_EARLY_INIT
+ select ARMADA_32BIT_SYSCON_RESET if DM_RESET && PCI_MVEBU
+ select ARMADA_32BIT_SYSCON_SYSRESET if SYSRESET
# ARMv7 SoCs...
config ARMADA_375
@@ -456,6 +458,29 @@
default 0x0
depends on MVEBU_SPL_BOOT_DEVICE_SPI
+config ARMADA_32BIT_SYSCON
+ bool
+ depends on ARMADA_32BIT
+ select REGMAP
+ select SYSCON
+
+config ARMADA_32BIT_SYSCON_RESET
+ bool "Support Armada XP/375/38x/39x reset controller"
+ depends on ARMADA_32BIT
+ depends on DM_RESET
+ select ARMADA_32BIT_SYSCON
+ help
+ Build support for Armada XP/375/38x/39x reset controller. This is
+ needed for PCIe support.
+
+config ARMADA_32BIT_SYSCON_SYSRESET
+ bool "Support Armada XP/375/38x/39x sysreset via driver model"
+ depends on ARMADA_32BIT
+ depends on SYSRESET
+ select ARMADA_32BIT_SYSCON
+ help
+ Build support for Armada XP/375/38x/39x system reset via driver model.
+
source "board/solidrun/clearfog/Kconfig"
source "board/kobol/helios4/Kconfig"
diff --git a/arch/arm/mach-mvebu/Makefile b/arch/arm/mach-mvebu/Makefile
index 0584ed2..329c2e4 100644
--- a/arch/arm/mach-mvebu/Makefile
+++ b/arch/arm/mach-mvebu/Makefile
@@ -22,13 +22,14 @@
obj-y = cpu.o
obj-y += dram.o
obj-y += lowlevel.o
-obj-$(CONFIG_DM_RESET) += system-controller.o
ifndef CONFIG_SPL_BUILD
obj-$(CONFIG_ARMADA_375) += ../../../drivers/ddr/marvell/axp/xor.o
obj-$(CONFIG_ARMADA_38X) += ../../../drivers/ddr/marvell/a38x/xor.o
obj-$(CONFIG_ARMADA_XP) += ../../../drivers/ddr/marvell/axp/xor.o
obj-$(CONFIG_ARMADA_MSYS) += ../../../drivers/ddr/marvell/axp/xor.o
+obj-$(CONFIG_ARMADA_32BIT_SYSCON) += system-controller.o
+
ifdef CONFIG_ARMADA_38X
obj-$(CONFIG_MVEBU_EFUSE) += efuse.o
endif
diff --git a/arch/arm/mach-mvebu/alleycat5/cpu.c b/arch/arm/mach-mvebu/alleycat5/cpu.c
index 0f72ae1..be2d9a2 100644
--- a/arch/arm/mach-mvebu/alleycat5/cpu.c
+++ b/arch/arm/mach-mvebu/alleycat5/cpu.c
@@ -3,7 +3,7 @@
* Copyright (C) 2018 Marvell International Ltd.
*/
-#include <common.h>
+#include <config.h>
#include <dm.h>
#include <fdtdec.h>
#include <linux/libfdt.h>
diff --git a/arch/arm/mach-mvebu/alleycat5/soc.c b/arch/arm/mach-mvebu/alleycat5/soc.c
index 734b0a8..98e6673 100644
--- a/arch/arm/mach-mvebu/alleycat5/soc.c
+++ b/arch/arm/mach-mvebu/alleycat5/soc.c
@@ -3,7 +3,6 @@
* Copyright (C) 2018 Marvell International Ltd.
*/
-#include <common.h>
#include <asm/arch-armada8k/cache_llc.h>
#include <asm/io.h>
#include <asm/arch/cpu.h>
diff --git a/arch/arm/mach-mvebu/arm64-common.c b/arch/arm/mach-mvebu/arm64-common.c
index 4c67f1a..63a12f7 100644
--- a/arch/arm/mach-mvebu/arm64-common.c
+++ b/arch/arm/mach-mvebu/arm64-common.c
@@ -3,7 +3,7 @@
* Copyright (C) 2016 Stefan Roese <sr@denx.de>
*/
-#include <common.h>
+#include <config.h>
#include <dm.h>
#include <fdtdec.h>
#include <init.h>
diff --git a/arch/arm/mach-mvebu/armada3700/cpu.c b/arch/arm/mach-mvebu/armada3700/cpu.c
index ab72b30..1752569 100644
--- a/arch/arm/mach-mvebu/armada3700/cpu.c
+++ b/arch/arm/mach-mvebu/armada3700/cpu.c
@@ -4,7 +4,6 @@
* Copyright (C) 2020 Marek Behún <kabel@kernel.org>
*/
-#include <common.h>
#include <cpu_func.h>
#include <dm.h>
#include <fdtdec.h>
diff --git a/arch/arm/mach-mvebu/armada3700/efuse.c b/arch/arm/mach-mvebu/armada3700/efuse.c
index 07d5f39..84a1e38 100644
--- a/arch/arm/mach-mvebu/armada3700/efuse.c
+++ b/arch/arm/mach-mvebu/armada3700/efuse.c
@@ -5,9 +5,10 @@
*/
#include <config.h>
-#include <common.h>
#include <asm/io.h>
#include <linux/delay.h>
+#include <linux/errno.h>
+#include <linux/types.h>
#include <mach/mbox.h>
#include <mach/soc.h>
diff --git a/arch/arm/mach-mvebu/armada3700/mbox.c b/arch/arm/mach-mvebu/armada3700/mbox.c
index 6555b86..5ac543a 100644
--- a/arch/arm/mach-mvebu/armada3700/mbox.c
+++ b/arch/arm/mach-mvebu/armada3700/mbox.c
@@ -4,11 +4,11 @@
* Copyright (C) 2021 Pali Rohár <pali@kernel.org>
*/
-#include <common.h>
#include <asm/arch/soc.h>
#include <asm/io.h>
#include <linux/bitops.h>
#include <linux/delay.h>
+#include <linux/errno.h>
#include <mach/mbox.h>
#define RWTM_BASE (MVEBU_REGISTER(0xb0000))
diff --git a/arch/arm/mach-mvebu/armada8k/cpu.c b/arch/arm/mach-mvebu/armada8k/cpu.c
index 939abce..7908f75 100644
--- a/arch/arm/mach-mvebu/armada8k/cpu.c
+++ b/arch/arm/mach-mvebu/armada8k/cpu.c
@@ -3,7 +3,6 @@
* Copyright (C) 2016 Stefan Roese <sr@denx.de>
*/
-#include <common.h>
#include <cpu_func.h>
#include <dm.h>
#include <fdtdec.h>
diff --git a/arch/arm/mach-mvebu/armada8k/dram.c b/arch/arm/mach-mvebu/armada8k/dram.c
index 6c801bf..fd58551 100644
--- a/arch/arm/mach-mvebu/armada8k/dram.c
+++ b/arch/arm/mach-mvebu/armada8k/dram.c
@@ -3,7 +3,7 @@
* Copyright (C) 2016 Stefan Roese <sr@denx.de>
*/
-#include <common.h>
+#include <config.h>
#include <asm/arch/cpu.h>
#include <asm/arch/soc.h>
#include <asm/global_data.h>
diff --git a/arch/arm/mach-mvebu/cpu.c b/arch/arm/mach-mvebu/cpu.c
index 8e0de93..e603ab9 100644
--- a/arch/arm/mach-mvebu/cpu.c
+++ b/arch/arm/mach-mvebu/cpu.c
@@ -3,7 +3,7 @@
* Copyright (C) 2014-2016 Stefan Roese <sr@denx.de>
*/
-#include <common.h>
+#include <config.h>
#include <ahci.h>
#include <cpu_func.h>
#include <init.h>
@@ -52,6 +52,7 @@
*/
}
+#if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_ARMADA_32BIT_SYSCON_SYSRESET)
void reset_cpu(void)
{
struct mvebu_system_registers *reg =
@@ -62,6 +63,7 @@
while (1)
;
}
+#endif
u32 get_boot_device(void)
{
diff --git a/arch/arm/mach-mvebu/dram.c b/arch/arm/mach-mvebu/dram.c
index d398d0f..c00c6b9 100644
--- a/arch/arm/mach-mvebu/dram.c
+++ b/arch/arm/mach-mvebu/dram.c
@@ -6,7 +6,6 @@
*/
#include <config.h>
-#include <common.h>
#include <init.h>
#include <asm/global_data.h>
#include <asm/io.h>
diff --git a/arch/arm/mach-mvebu/efuse.c b/arch/arm/mach-mvebu/efuse.c
index be5dc0e..4756879 100644
--- a/arch/arm/mach-mvebu/efuse.c
+++ b/arch/arm/mach-mvebu/efuse.c
@@ -4,7 +4,6 @@
*/
#include <config.h>
-#include <common.h>
#include <errno.h>
#include <asm/io.h>
#include <asm/arch/cpu.h>
diff --git a/arch/arm/mach-mvebu/gpio.c b/arch/arm/mach-mvebu/gpio.c
index 1d1e3df..587cbb0 100644
--- a/arch/arm/mach-mvebu/gpio.c
+++ b/arch/arm/mach-mvebu/gpio.c
@@ -5,7 +5,6 @@
* Written-by: Prafulla Wadaskar <prafulla@marvell.com>
*/
-#include <common.h>
#include <asm/io.h>
#include <asm/arch/cpu.h>
#include <asm/arch/soc.h>
diff --git a/arch/arm/mach-mvebu/mbus.c b/arch/arm/mach-mvebu/mbus.c
index 959ca8e..9baeece 100644
--- a/arch/arm/mach-mvebu/mbus.c
+++ b/arch/arm/mach-mvebu/mbus.c
@@ -46,7 +46,7 @@
* mvebu_mbus_del_window().
*/
-#include <common.h>
+#include <config.h>
#include <malloc.h>
#include <linux/bitops.h>
#include <linux/errno.h>
diff --git a/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec-38x.c b/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec-38x.c
index 12596ec..4582871 100644
--- a/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec-38x.c
+++ b/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec-38x.c
@@ -3,7 +3,6 @@
* Copyright (C) Marvell International Ltd. and its affiliates
*/
-#include <common.h>
#include <spl.h>
#include <asm/io.h>
#include <asm/arch/cpu.h>
diff --git a/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c b/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c
index 3349f4e..efc31d5 100644
--- a/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c
+++ b/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c
@@ -3,7 +3,7 @@
* Copyright (C) Marvell International Ltd. and its affiliates
*/
-#include <common.h>
+#include <config.h>
#include <spl.h>
#include <asm/io.h>
#include <asm/arch/cpu.h>
diff --git a/arch/arm/mach-mvebu/serdes/a38x/seq_exec.c b/arch/arm/mach-mvebu/serdes/a38x/seq_exec.c
index 2a51b71..9a1bbba 100644
--- a/arch/arm/mach-mvebu/serdes/a38x/seq_exec.c
+++ b/arch/arm/mach-mvebu/serdes/a38x/seq_exec.c
@@ -3,7 +3,6 @@
* Copyright (C) Marvell International Ltd. and its affiliates
*/
-#include <common.h>
#include <spl.h>
#include <asm/io.h>
#include <asm/arch/cpu.h>
diff --git a/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.c b/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.c
index fb8ec11..8290b86 100644
--- a/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.c
+++ b/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.c
@@ -3,7 +3,6 @@
* Copyright (C) Marvell International Ltd. and its affiliates
*/
-#include <common.h>
#include <spl.h>
#include <asm/io.h>
#include <asm/arch/cpu.h>
diff --git a/arch/arm/mach-mvebu/serdes/axp/high_speed_env_lib.c b/arch/arm/mach-mvebu/serdes/axp/high_speed_env_lib.c
index 68f8ead..61b7f16 100644
--- a/arch/arm/mach-mvebu/serdes/axp/high_speed_env_lib.c
+++ b/arch/arm/mach-mvebu/serdes/axp/high_speed_env_lib.c
@@ -3,7 +3,7 @@
* Copyright (C) Marvell International Ltd. and its affiliates
*/
-#include <common.h>
+#include <config.h>
#include <i2c.h>
#include <spl.h>
#include <asm/io.h>
diff --git a/arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.c b/arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.c
index 539d237..9b7bb2c 100644
--- a/arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.c
+++ b/arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.c
@@ -3,7 +3,6 @@
* Copyright (C) Marvell International Ltd. and its affiliates
*/
-#include <common.h>
#include <spl.h>
#include <asm/io.h>
#include <asm/arch/cpu.h>
diff --git a/arch/arm/mach-mvebu/spl.c b/arch/arm/mach-mvebu/spl.c
index 79f8877..4f4f7e0 100644
--- a/arch/arm/mach-mvebu/spl.c
+++ b/arch/arm/mach-mvebu/spl.c
@@ -3,7 +3,6 @@
* Copyright (C) 2014-2016 Stefan Roese <sr@denx.de>
*/
-#include <common.h>
#include <cpu_func.h>
#include <dm.h>
#include <fdtdec.h>
diff --git a/arch/arm/mach-mvebu/system-controller.c b/arch/arm/mach-mvebu/system-controller.c
index 7cdde11..d94bde0 100644
--- a/arch/arm/mach-mvebu/system-controller.c
+++ b/arch/arm/mach-mvebu/system-controller.c
@@ -1,18 +1,32 @@
// SPDX-License-Identifier: GPL-2.0+
-// (C) 2021 Pali Rohár <pali@kernel.org>
+/*
+ * Copyright (C) 2021 Pali Rohár <pali@kernel.org>
+ * Copyright (C) 2024 Marek Behún <kabel@kernel.org>
+ */
-#include <common.h>
#include <dm.h>
+#include <dm/lists.h>
+#include <regmap.h>
#include <reset-uclass.h>
+#include <syscon.h>
+#include <sysreset.h>
#include <asm/io.h>
-#define MVEBU_SOC_CONTROL_1_REG 0x4
+#define MVEBU_SOC_CONTROL_1_REG 0x4
-#define MVEBU_PCIE_ID 0
+#if defined(CONFIG_ARMADA_375)
+# define MVEBU_RSTOUTN_MASK_REG 0x54
+# define MVEBU_SYS_SOFT_RST_REG 0x58
+#else
+# define MVEBU_RSTOUTN_MASK_REG 0x60
+# define MVEBU_SYS_SOFT_RST_REG 0x64
+#endif
-struct mvebu_reset_data {
- void *base;
-};
+#define MVEBU_GLOBAL_SOFT_RST_BIT BIT(0)
+
+#define MVEBU_PCIE_ID 0
+
+#if IS_ENABLED(CONFIG_ARMADA_32BIT_SYSCON_RESET)
static int mvebu_reset_of_xlate(struct reset_ctl *rst,
struct ofnode_phandle_args *args)
@@ -46,46 +60,33 @@
static int mvebu_reset_assert(struct reset_ctl *rst)
{
- struct mvebu_reset_data *data = dev_get_priv(rst->dev);
+ struct regmap *regmap = syscon_get_regmap(rst->dev->parent);
- clrbits_32(data->base + MVEBU_SOC_CONTROL_1_REG, BIT(rst->data));
- return 0;
+ return regmap_update_bits(regmap, MVEBU_SOC_CONTROL_1_REG,
+ BIT(rst->data), 0);
}
static int mvebu_reset_deassert(struct reset_ctl *rst)
{
- struct mvebu_reset_data *data = dev_get_priv(rst->dev);
+ struct regmap *regmap = syscon_get_regmap(rst->dev->parent);
- setbits_32(data->base + MVEBU_SOC_CONTROL_1_REG, BIT(rst->data));
- return 0;
+ return regmap_update_bits(regmap, MVEBU_SOC_CONTROL_1_REG,
+ BIT(rst->data), BIT(rst->data));
}
static int mvebu_reset_status(struct reset_ctl *rst)
{
- struct mvebu_reset_data *data = dev_get_priv(rst->dev);
+ struct regmap *regmap = syscon_get_regmap(rst->dev->parent);
+ uint val;
+ int ret;
- return !(readl(data->base + MVEBU_SOC_CONTROL_1_REG) & BIT(rst->data));
+ ret = regmap_read(regmap, MVEBU_SOC_CONTROL_1_REG, &val);
+ if (ret < 0)
+ return ret;
+
+ return !(val & BIT(rst->data));
}
-static int mvebu_reset_of_to_plat(struct udevice *dev)
-{
- struct mvebu_reset_data *data = dev_get_priv(dev);
-
- data->base = dev_read_addr_ptr(dev);
- if (!data->base)
- return -EINVAL;
-
- return 0;
-}
-
-static const struct udevice_id mvebu_reset_of_match[] = {
- { .compatible = "marvell,armada-370-xp-system-controller" },
- { .compatible = "marvell,armada-375-system-controller" },
- { .compatible = "marvell,armada-380-system-controller" },
- { .compatible = "marvell,armada-390-system-controller" },
- { },
-};
-
static const struct reset_ops mvebu_reset_ops = {
.of_xlate = mvebu_reset_of_xlate,
.request = mvebu_reset_request,
@@ -98,8 +99,81 @@
U_BOOT_DRIVER(mvebu_reset) = {
.name = "mvebu-reset",
.id = UCLASS_RESET,
- .of_match = mvebu_reset_of_match,
- .of_to_plat = mvebu_reset_of_to_plat,
- .priv_auto = sizeof(struct mvebu_reset_data),
.ops = &mvebu_reset_ops,
};
+
+#endif /* IS_ENABLED(CONFIG_ARMADA_32BIT_SYSCON_RESET) */
+
+#if IS_ENABLED(CONFIG_ARMADA_32BIT_SYSCON_SYSRESET)
+
+static int mvebu_sysreset_request(struct udevice *dev, enum sysreset_t type)
+{
+ struct regmap *regmap = syscon_get_regmap(dev->parent);
+ uint bit;
+
+ if (type != SYSRESET_COLD)
+ return -EPROTONOSUPPORT;
+
+ bit = MVEBU_GLOBAL_SOFT_RST_BIT;
+
+ regmap_update_bits(regmap, MVEBU_RSTOUTN_MASK_REG, bit, bit);
+ regmap_update_bits(regmap, MVEBU_SYS_SOFT_RST_REG, bit, bit);
+
+ /* Loop while waiting for the reset */
+ while (1)
+ ;
+
+ return 0;
+}
+
+static struct sysreset_ops mvebu_sysreset_ops = {
+ .request = mvebu_sysreset_request,
+};
+
+U_BOOT_DRIVER(mvebu_sysreset) = {
+ .name = "mvebu-sysreset",
+ .id = UCLASS_SYSRESET,
+ .ops = &mvebu_sysreset_ops,
+};
+
+#endif /* IS_ENABLED(CONFIG_ARMADA_32BIT_SYSCON_SYSRESET) */
+
+static int mvebu_syscon_bind(struct udevice *dev)
+{
+ int ret = 0;
+
+ /* bind also mvebu-reset, with the same ofnode */
+ if (IS_ENABLED(CONFIG_ARMADA_32BIT_SYSCON_RESET)) {
+ ret = device_bind_driver_to_node(dev, "mvebu-reset",
+ "mvebu-reset", dev_ofnode(dev),
+ NULL);
+ if (ret < 0)
+ return ret;
+ }
+
+ /* bind also mvebu-sysreset, with the same ofnode */
+ if (IS_ENABLED(CONFIG_ARMADA_32BIT_SYSCON_SYSRESET)) {
+ ret = device_bind_driver_to_node(dev, "mvebu-sysreset",
+ "mvebu-sysreset",
+ dev_ofnode(dev), NULL);
+ if (ret < 0)
+ return ret;
+ }
+
+ return ret;
+}
+
+static const struct udevice_id mvebu_syscon_of_match[] = {
+ { .compatible = "marvell,armada-370-xp-system-controller" },
+ { .compatible = "marvell,armada-375-system-controller" },
+ { .compatible = "marvell,armada-380-system-controller" },
+ { .compatible = "marvell,armada-390-system-controller" },
+ { },
+};
+
+U_BOOT_DRIVER(mvebu_syscon) = {
+ .name = "mvebu-system-controller",
+ .id = UCLASS_SYSCON,
+ .of_match = mvebu_syscon_of_match,
+ .bind = mvebu_syscon_bind,
+};
diff --git a/arch/arm/mach-nexell/clock.c b/arch/arm/mach-nexell/clock.c
index 59ffa26..3082f60 100644
--- a/arch/arm/mach-nexell/clock.c
+++ b/arch/arm/mach-nexell/clock.c
@@ -4,8 +4,8 @@
* Hyunseok, Jung <hsjung@nexell.co.kr>
*/
-#include <common.h>
#include <command.h>
+#include <vsprintf.h>
#include <linux/err.h>
#include <asm/io.h>
#include <asm/arch/nexell.h>
diff --git a/arch/arm/mach-nexell/include/mach/mipi_display.h b/arch/arm/mach-nexell/include/mach/mipi_display.h
index f3fdec6..9183ffd 100644
--- a/arch/arm/mach-nexell/include/mach/mipi_display.h
+++ b/arch/arm/mach-nexell/include/mach/mipi_display.h
@@ -11,6 +11,8 @@
#ifndef MIPI_DISPLAY_H
#define MIPI_DISPLAY_H
+#include <linux/types.h>
+
/* MIPI DSI Processor-to-Peripheral transaction types */
enum {
MIPI_DSI_V_SYNC_START = 0x01,
diff --git a/arch/arm/mach-nexell/include/mach/reset.h b/arch/arm/mach-nexell/include/mach/reset.h
index e1301d4..0c6a130 100644
--- a/arch/arm/mach-nexell/include/mach/reset.h
+++ b/arch/arm/mach-nexell/include/mach/reset.h
@@ -7,6 +7,8 @@
#ifndef __NEXELL_RESET__
#define __NEXELL_RESET__
+#include <linux/types.h>
+
#define NUMBER_OF_RESET_MODULE_PIN 69
enum rstcon {
diff --git a/arch/arm/mach-nexell/reset.c b/arch/arm/mach-nexell/reset.c
index 1f732a3..627f568 100644
--- a/arch/arm/mach-nexell/reset.c
+++ b/arch/arm/mach-nexell/reset.c
@@ -8,7 +8,6 @@
*FIXME : Not support device tree & reset control driver.
* will remove after support device tree & reset control driver.
*/
-#include <common.h>
#include <asm/io.h>
#include <asm/arch/nexell.h>
#include <asm/arch/reset.h>
diff --git a/arch/arm/mach-nexell/tieoff.c b/arch/arm/mach-nexell/tieoff.c
index 5a4744c..51cca67 100644
--- a/arch/arm/mach-nexell/tieoff.c
+++ b/arch/arm/mach-nexell/tieoff.c
@@ -4,7 +4,6 @@
* Youngbok, Park <park@nexell.co.kr>
*/
-#include <common.h>
#include <asm/arch/nexell.h>
#include <asm/arch/clk.h>
#include <asm/arch/reset.h>
diff --git a/arch/arm/mach-nexell/timer.c b/arch/arm/mach-nexell/timer.c
index 3b311fd..b35c7b1 100644
--- a/arch/arm/mach-nexell/timer.c
+++ b/arch/arm/mach-nexell/timer.c
@@ -4,7 +4,6 @@
* Hyunseok, Jung <hsjung@nexell.co.kr>
*/
-#include <common.h>
#include <log.h>
#include <asm/io.h>
diff --git a/arch/arm/mach-npcm/npcm7xx/cpu.c b/arch/arm/mach-npcm/npcm7xx/cpu.c
index dd74bb9..47d51ca 100644
--- a/arch/arm/mach-npcm/npcm7xx/cpu.c
+++ b/arch/arm/mach-npcm/npcm7xx/cpu.c
@@ -3,7 +3,6 @@
* Copyright (c) 2021 Nuvoton Technology Corp.
*/
-#include <common.h>
#include <cpu_func.h>
#include <asm/armv7.h>
#include <asm/io.h>
diff --git a/arch/arm/mach-npcm/npcm7xx/l2_cache_pl310.c b/arch/arm/mach-npcm/npcm7xx/l2_cache_pl310.c
index ed4b1ca..df80687 100644
--- a/arch/arm/mach-npcm/npcm7xx/l2_cache_pl310.c
+++ b/arch/arm/mach-npcm/npcm7xx/l2_cache_pl310.c
@@ -3,7 +3,7 @@
* Copyright (c) 2021 Nuvoton Technology Corp.
*/
-#include <common.h>
+#include <config.h>
#include <asm/io.h>
#include <asm/pl310.h>
diff --git a/arch/arm/mach-npcm/npcm8xx/cpu.c b/arch/arm/mach-npcm/npcm8xx/cpu.c
index af59452..a1fb400 100644
--- a/arch/arm/mach-npcm/npcm8xx/cpu.c
+++ b/arch/arm/mach-npcm/npcm8xx/cpu.c
@@ -3,7 +3,6 @@
* Copyright (c) 2022 Nuvoton Technology Corp.
*/
-#include <common.h>
#include <dm.h>
#include <asm/global_data.h>
#include <asm/io.h>
diff --git a/arch/arm/mach-npcm/npcm8xx/reset.c b/arch/arm/mach-npcm/npcm8xx/reset.c
index 6954e6c..e28b4ae 100644
--- a/arch/arm/mach-npcm/npcm8xx/reset.c
+++ b/arch/arm/mach-npcm/npcm8xx/reset.c
@@ -3,7 +3,6 @@
* Copyright (c) 2022 Nuvoton Technology Corp.
*/
-#include <common.h>
#include <asm/io.h>
#include <asm/arch/gcr.h>
#include <asm/arch/rst.h>
diff --git a/arch/arm/mach-octeontx/clock.c b/arch/arm/mach-octeontx/clock.c
index 9da2107..ffdee87 100644
--- a/arch/arm/mach-octeontx/clock.c
+++ b/arch/arm/mach-octeontx/clock.c
@@ -5,7 +5,6 @@
* https://spdx.org/licenses
*/
-#include <common.h>
#include <asm/io.h>
#include <asm/arch/board.h>
#include <asm/arch/clock.h>
diff --git a/arch/arm/mach-octeontx/cpu.c b/arch/arm/mach-octeontx/cpu.c
index aa5f458..90454ed 100644
--- a/arch/arm/mach-octeontx/cpu.c
+++ b/arch/arm/mach-octeontx/cpu.c
@@ -5,7 +5,6 @@
* https://spdx.org/licenses
*/
-#include <common.h>
#include <asm/armv8/mmu.h>
#include <asm/global_data.h>
#include <asm/io.h>
diff --git a/arch/arm/mach-octeontx2/clock.c b/arch/arm/mach-octeontx2/clock.c
index 9da2107..ffdee87 100644
--- a/arch/arm/mach-octeontx2/clock.c
+++ b/arch/arm/mach-octeontx2/clock.c
@@ -5,7 +5,6 @@
* https://spdx.org/licenses
*/
-#include <common.h>
#include <asm/io.h>
#include <asm/arch/board.h>
#include <asm/arch/clock.h>
diff --git a/arch/arm/mach-octeontx2/cpu.c b/arch/arm/mach-octeontx2/cpu.c
index 723deef..0a44af7 100644
--- a/arch/arm/mach-octeontx2/cpu.c
+++ b/arch/arm/mach-octeontx2/cpu.c
@@ -5,7 +5,6 @@
* https://spdx.org/licenses
*/
-#include <common.h>
#include <asm/armv8/mmu.h>
#include <asm/global_data.h>
#include <asm/io.h>
diff --git a/arch/arm/mach-omap2/abb.c b/arch/arm/mach-omap2/abb.c
index 722e6db..ce33d2f 100644
--- a/arch/arm/mach-omap2/abb.c
+++ b/arch/arm/mach-omap2/abb.c
@@ -8,7 +8,6 @@
* Andrii Tseglytskyi <andrii.tseglytskyi@ti.com>
*/
-#include <common.h>
#include <asm/omap_common.h>
#include <asm/arch/clock.h>
#include <asm/io.h>
diff --git a/arch/arm/mach-omap2/am33xx/board.c b/arch/arm/mach-omap2/am33xx/board.c
index 09659da..78c1e96 100644
--- a/arch/arm/mach-omap2/am33xx/board.c
+++ b/arch/arm/mach-omap2/am33xx/board.c
@@ -7,7 +7,7 @@
* Copyright (C) 2011, Texas Instruments, Incorporated - https://www.ti.com/
*/
-#include <common.h>
+#include <config.h>
#include <dm.h>
#include <debug_uart.h>
#include <errno.h>
diff --git a/arch/arm/mach-omap2/am33xx/chilisom.c b/arch/arm/mach-omap2/am33xx/chilisom.c
index d4f2abe..4765ce0 100644
--- a/arch/arm/mach-omap2/am33xx/chilisom.c
+++ b/arch/arm/mach-omap2/am33xx/chilisom.c
@@ -4,7 +4,6 @@
* Copyright (C) 2017, Grinn - http://grinn-global.com/
*/
-#include <common.h>
#include <init.h>
#include <asm/arch/clock.h>
#include <asm/arch/clk_synthesizer.h>
diff --git a/arch/arm/mach-omap2/am33xx/clk_synthesizer.c b/arch/arm/mach-omap2/am33xx/clk_synthesizer.c
index 0969a40..b75eb58 100644
--- a/arch/arm/mach-omap2/am33xx/clk_synthesizer.c
+++ b/arch/arm/mach-omap2/am33xx/clk_synthesizer.c
@@ -7,8 +7,7 @@
* Copyright (C) 2016, Texas Instruments, Incorporated - https://www.ti.com/
*/
-
-#include <common.h>
+#include <stdio.h>
#include <asm/arch/clk_synthesizer.h>
#include <i2c.h>
diff --git a/arch/arm/mach-omap2/am33xx/clock.c b/arch/arm/mach-omap2/am33xx/clock.c
index 3273632..f07003c 100644
--- a/arch/arm/mach-omap2/am33xx/clock.c
+++ b/arch/arm/mach-omap2/am33xx/clock.c
@@ -7,7 +7,6 @@
*
* Copyright (C) 2013, Texas Instruments, Incorporated - https://www.ti.com/
*/
-#include <common.h>
#include <hang.h>
#include <init.h>
#include <log.h>
diff --git a/arch/arm/mach-omap2/am33xx/clock_am33xx.c b/arch/arm/mach-omap2/am33xx/clock_am33xx.c
index d39e7e4..c33d974 100644
--- a/arch/arm/mach-omap2/am33xx/clock_am33xx.c
+++ b/arch/arm/mach-omap2/am33xx/clock_am33xx.c
@@ -7,7 +7,6 @@
* Copyright (C) 2013, Texas Instruments, Incorporated - https://www.ti.com/
*/
-#include <common.h>
#include <asm/arch/cpu.h>
#include <asm/arch/sys_proto.h>
#include <asm/arch/clock.h>
diff --git a/arch/arm/mach-omap2/am33xx/clock_am43xx.c b/arch/arm/mach-omap2/am33xx/clock_am43xx.c
index 8039bc2..abd65ff 100644
--- a/arch/arm/mach-omap2/am33xx/clock_am43xx.c
+++ b/arch/arm/mach-omap2/am33xx/clock_am43xx.c
@@ -8,7 +8,6 @@
* Copyright (C) 2013, Texas Instruments, Incorporated - https://www.ti.com/
*/
-#include <common.h>
#include <asm/arch/cpu.h>
#include <asm/arch/clock.h>
#include <asm/arch/hardware.h>
diff --git a/arch/arm/mach-omap2/am33xx/ddr.c b/arch/arm/mach-omap2/am33xx/ddr.c
index 61b95c9..41eec00 100644
--- a/arch/arm/mach-omap2/am33xx/ddr.c
+++ b/arch/arm/mach-omap2/am33xx/ddr.c
@@ -5,7 +5,7 @@
* Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/
*/
-#include <common.h>
+#include <config.h>
#include <log.h>
#include <asm/arch/cpu.h>
#include <asm/arch/ddr_defs.h>
diff --git a/arch/arm/mach-omap2/am33xx/emif4.c b/arch/arm/mach-omap2/am33xx/emif4.c
index b29250b..f19c668 100644
--- a/arch/arm/mach-omap2/am33xx/emif4.c
+++ b/arch/arm/mach-omap2/am33xx/emif4.c
@@ -7,7 +7,6 @@
* Copyright (C) 2011, Texas Instruments, Incorporated - https://www.ti.com/
*/
-#include <common.h>
#include <asm/arch/cpu.h>
#include <asm/arch/ddr_defs.h>
#include <asm/arch/hardware.h>
diff --git a/arch/arm/mach-omap2/am33xx/fdt.c b/arch/arm/mach-omap2/am33xx/fdt.c
index 2ec30b1..3e81616 100644
--- a/arch/arm/mach-omap2/am33xx/fdt.c
+++ b/arch/arm/mach-omap2/am33xx/fdt.c
@@ -3,7 +3,6 @@
* Copyright 2017 Texas Instruments, Inc.
*/
-#include <common.h>
#include <hang.h>
#include <linux/libfdt.h>
#include <fdt_support.h>
diff --git a/arch/arm/mach-omap2/am33xx/mux.c b/arch/arm/mach-omap2/am33xx/mux.c
index 4960559..06b08e8 100644
--- a/arch/arm/mach-omap2/am33xx/mux.c
+++ b/arch/arm/mach-omap2/am33xx/mux.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <common.h>
#include <asm/arch/mux.h>
#include <asm/arch/hardware.h>
#include <asm/io.h>
diff --git a/arch/arm/mach-omap2/am33xx/sys_info.c b/arch/arm/mach-omap2/am33xx/sys_info.c
index 390d540..87afc09 100644
--- a/arch/arm/mach-omap2/am33xx/sys_info.c
+++ b/arch/arm/mach-omap2/am33xx/sys_info.c
@@ -11,7 +11,6 @@
* Syed Mohammed Khasim <khasim@ti.com>
*/
-#include <common.h>
#include <init.h>
#include <asm/io.h>
#include <asm/arch/sys_proto.h>
diff --git a/arch/arm/mach-omap2/boot-common.c b/arch/arm/mach-omap2/boot-common.c
index aa0ab13..e1ea351 100644
--- a/arch/arm/mach-omap2/boot-common.c
+++ b/arch/arm/mach-omap2/boot-common.c
@@ -7,7 +7,6 @@
* Copyright (C) 2011, Texas Instruments, Incorporated - https://www.ti.com/
*/
-#include <common.h>
#include <ahci.h>
#include <log.h>
#include <dm/uclass.h>
diff --git a/arch/arm/mach-omap2/clocks-common.c b/arch/arm/mach-omap2/clocks-common.c
index 390d1f2..2a0c228 100644
--- a/arch/arm/mach-omap2/clocks-common.c
+++ b/arch/arm/mach-omap2/clocks-common.c
@@ -12,7 +12,6 @@
* Santosh Shilimkar <santosh.shilimkar@ti.com>
* Rajendra Nayak <rnayak@ti.com>
*/
-#include <common.h>
#include <hang.h>
#include <i2c.h>
#include <init.h>
diff --git a/arch/arm/mach-omap2/emif-common.c b/arch/arm/mach-omap2/emif-common.c
index 9daaeef..4d431e2 100644
--- a/arch/arm/mach-omap2/emif-common.c
+++ b/arch/arm/mach-omap2/emif-common.c
@@ -8,7 +8,7 @@
* Aneesh V <aneesh@ti.com>
*/
-#include <common.h>
+#include <config.h>
#include <hang.h>
#include <init.h>
#include <log.h>
diff --git a/arch/arm/mach-omap2/fdt-common.c b/arch/arm/mach-omap2/fdt-common.c
index e90d577..c6b4c03 100644
--- a/arch/arm/mach-omap2/fdt-common.c
+++ b/arch/arm/mach-omap2/fdt-common.c
@@ -3,7 +3,7 @@
* Copyright 2016-2017 Texas Instruments, Inc.
*/
-#include <common.h>
+#include <config.h>
#include <log.h>
#include <linux/libfdt.h>
#include <fdt_support.h>
diff --git a/arch/arm/mach-omap2/hwinit-common.c b/arch/arm/mach-omap2/hwinit-common.c
index 0e4572c..1385016 100644
--- a/arch/arm/mach-omap2/hwinit-common.c
+++ b/arch/arm/mach-omap2/hwinit-common.c
@@ -10,7 +10,6 @@
* Aneesh V <aneesh@ti.com>
* Steve Sakoman <steve@sakoman.com>
*/
-#include <common.h>
#include <debug_uart.h>
#include <event.h>
#include <fdtdec.h>
diff --git a/arch/arm/mach-omap2/mem-common.c b/arch/arm/mach-omap2/mem-common.c
index 1919748..00f144e 100644
--- a/arch/arm/mach-omap2/mem-common.c
+++ b/arch/arm/mach-omap2/mem-common.c
@@ -12,7 +12,7 @@
* Syed Mohammed Khasim <khasim@ti.com>
*/
-#include <common.h>
+#include <config.h>
#include <asm/io.h>
#include <asm/arch/cpu.h>
#if IS_ENABLED(CONFIG_TARGET_AM335X_GUARDIAN)
diff --git a/arch/arm/mach-omap2/omap-cache.c b/arch/arm/mach-omap2/omap-cache.c
index 36db588..200a08f 100644
--- a/arch/arm/mach-omap2/omap-cache.c
+++ b/arch/arm/mach-omap2/omap-cache.c
@@ -11,9 +11,9 @@
* Steve Sakoman <steve@sakoman.com>
*/
-#include <common.h>
#include <cpu_func.h>
#include <log.h>
+#include <linux/string.h>
#include <asm/cache.h>
#include <asm/global_data.h>
diff --git a/arch/arm/mach-omap2/omap3/am35x_musb.c b/arch/arm/mach-omap2/omap3/am35x_musb.c
index 1121acc..d380762 100644
--- a/arch/arm/mach-omap2/omap3/am35x_musb.c
+++ b/arch/arm/mach-omap2/omap3/am35x_musb.c
@@ -8,8 +8,8 @@
* Hema HK <hemahk@ti.com>
*/
-#include <common.h>
#include <log.h>
+#include <time.h>
#include <dm/device.h>
#include <asm/io.h>
#include <asm/arch/am35x_def.h>
diff --git a/arch/arm/mach-omap2/omap3/board.c b/arch/arm/mach-omap2/omap3/board.c
index c76a95d..c5ada60 100644
--- a/arch/arm/mach-omap2/omap3/board.c
+++ b/arch/arm/mach-omap2/omap3/board.c
@@ -15,7 +15,6 @@
* Syed Mohammed Khasim <khasim@ti.com>
*
*/
-#include <common.h>
#include <command.h>
#include <dm.h>
#include <init.h>
diff --git a/arch/arm/mach-omap2/omap3/boot.c b/arch/arm/mach-omap2/omap3/boot.c
index ea26115..2a36a25 100644
--- a/arch/arm/mach-omap2/omap3/boot.c
+++ b/arch/arm/mach-omap2/omap3/boot.c
@@ -5,7 +5,6 @@
* Copyright (C) 2015 Paul Kocialkowski <contact@paulk.fr>
*/
-#include <common.h>
#include <asm/io.h>
#include <asm/arch/sys_proto.h>
#include <spl.h>
diff --git a/arch/arm/mach-omap2/omap3/clock.c b/arch/arm/mach-omap2/omap3/clock.c
index 13685e0..417d1eb 100644
--- a/arch/arm/mach-omap2/omap3/clock.c
+++ b/arch/arm/mach-omap2/omap3/clock.c
@@ -11,11 +11,12 @@
* Syed Mohammed Khasim <khasim@ti.com>
*/
-#include <common.h>
+#include <config.h>
#include <asm/io.h>
#include <asm/arch/clock.h>
#include <asm/arch/clocks_omap3.h>
#include <asm/arch/mem.h>
+#include <asm/arch/omap.h>
#include <asm/arch/sys_proto.h>
#include <command.h>
diff --git a/arch/arm/mach-omap2/omap3/emac.c b/arch/arm/mach-omap2/omap3/emac.c
index d0d0b7a..7348e92 100644
--- a/arch/arm/mach-omap2/omap3/emac.c
+++ b/arch/arm/mach-omap2/omap3/emac.c
@@ -6,7 +6,6 @@
* (C) Copyright 2011, Ilya Yanok, Emcraft Systems
*/
-#include <common.h>
#include <net.h>
#include <asm/io.h>
#include <asm/arch/am35x_def.h>
diff --git a/arch/arm/mach-omap2/omap3/emif4.c b/arch/arm/mach-omap2/omap3/emif4.c
index 4fbfb38..049eedf 100644
--- a/arch/arm/mach-omap2/omap3/emif4.c
+++ b/arch/arm/mach-omap2/omap3/emif4.c
@@ -9,7 +9,7 @@
* Texas Instruments Incorporated - https://www.ti.com/
*/
-#include <common.h>
+#include <config.h>
#include <init.h>
#include <asm/global_data.h>
#include <asm/io.h>
diff --git a/arch/arm/mach-omap2/omap3/sdrc.c b/arch/arm/mach-omap2/omap3/sdrc.c
index 4d27d82..4043336 100644
--- a/arch/arm/mach-omap2/omap3/sdrc.c
+++ b/arch/arm/mach-omap2/omap3/sdrc.c
@@ -21,7 +21,6 @@
* Manikandan Pillai <mani.pillai@ti.com>
*/
-#include <common.h>
#include <init.h>
#include <asm/global_data.h>
#include <asm/io.h>
diff --git a/arch/arm/mach-omap2/omap3/spl_id_nand.c b/arch/arm/mach-omap2/omap3/spl_id_nand.c
index 84a0b0a..d471262 100644
--- a/arch/arm/mach-omap2/omap3/spl_id_nand.c
+++ b/arch/arm/mach-omap2/omap3/spl_id_nand.c
@@ -11,7 +11,6 @@
* Jian Zhang <jzhang@ti.com>
*/
-#include <common.h>
#include <jffs2/load_kernel.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/omap_gpmc.h>
diff --git a/arch/arm/mach-omap2/omap3/sys_info.c b/arch/arm/mach-omap2/omap3/sys_info.c
index 5f535e2..1e3fcd5 100644
--- a/arch/arm/mach-omap2/omap3/sys_info.c
+++ b/arch/arm/mach-omap2/omap3/sys_info.c
@@ -11,9 +11,10 @@
* Syed Mohammed Khasim <khasim@ti.com>
*/
-#include <common.h>
+#include <config.h>
#include <asm/io.h>
#include <asm/arch/mem.h> /* get mem tables */
+#include <asm/arch/omap.h>
#include <asm/arch/sys_proto.h>
#include <asm/bootm.h>
#include <asm/omap_common.h>
diff --git a/arch/arm/mach-omap2/omap4/boot.c b/arch/arm/mach-omap2/omap4/boot.c
index 90b5380..a60249f 100644
--- a/arch/arm/mach-omap2/omap4/boot.c
+++ b/arch/arm/mach-omap2/omap4/boot.c
@@ -5,7 +5,6 @@
* Copyright (C) 2015 Paul Kocialkowski <contact@paulk.fr>
*/
-#include <common.h>
#include <asm/io.h>
#include <asm/omap_common.h>
#include <asm/arch/sys_proto.h>
diff --git a/arch/arm/mach-omap2/omap4/emif.c b/arch/arm/mach-omap2/omap4/emif.c
index 35a5164..5b0d3b5 100644
--- a/arch/arm/mach-omap2/omap4/emif.c
+++ b/arch/arm/mach-omap2/omap4/emif.c
@@ -8,7 +8,6 @@
* Aneesh V <aneesh@ti.com>
*/
-#include <common.h>
#include <asm/emif.h>
#include <asm/arch/sys_proto.h>
#include <asm/utils.h>
diff --git a/arch/arm/mach-omap2/omap4/hw_data.c b/arch/arm/mach-omap2/omap4/hw_data.c
index d587a4d..a81d765 100644
--- a/arch/arm/mach-omap2/omap4/hw_data.c
+++ b/arch/arm/mach-omap2/omap4/hw_data.c
@@ -8,7 +8,6 @@
*
* Sricharan R <r.sricharan@ti.com>
*/
-#include <common.h>
#include <asm/arch/omap.h>
#include <asm/arch/sys_proto.h>
#include <asm/omap_common.h>
diff --git a/arch/arm/mach-omap2/omap4/hwinit.c b/arch/arm/mach-omap2/omap4/hwinit.c
index 27dfa91..e3e6cc8 100644
--- a/arch/arm/mach-omap2/omap4/hwinit.c
+++ b/arch/arm/mach-omap2/omap4/hwinit.c
@@ -10,7 +10,6 @@
* Aneesh V <aneesh@ti.com>
* Steve Sakoman <steve@sakoman.com>
*/
-#include <common.h>
#include <palmas.h>
#include <asm/armv7.h>
#include <asm/arch/cpu.h>
diff --git a/arch/arm/mach-omap2/omap4/sdram_elpida.c b/arch/arm/mach-omap2/omap4/sdram_elpida.c
index 2a18cf0..a29a264 100644
--- a/arch/arm/mach-omap2/omap4/sdram_elpida.c
+++ b/arch/arm/mach-omap2/omap4/sdram_elpida.c
@@ -9,7 +9,6 @@
* Aneesh V <aneesh@ti.com>
*/
-#include <common.h>
#include <asm/emif.h>
#include <asm/arch/sys_proto.h>
diff --git a/arch/arm/mach-omap2/omap5/abb.c b/arch/arm/mach-omap2/omap5/abb.c
index 2f9f8e6..21da0b1 100644
--- a/arch/arm/mach-omap2/omap5/abb.c
+++ b/arch/arm/mach-omap2/omap5/abb.c
@@ -8,7 +8,7 @@
* Andrii Tseglytskyi <andrii.tseglytskyi@ti.com>
*/
-#include <common.h>
+#include <asm/arch/omap.h>
#include <asm/omap_common.h>
#include <asm/io.h>
#include <linux/bitops.h>
diff --git a/arch/arm/mach-omap2/omap5/boot.c b/arch/arm/mach-omap2/omap5/boot.c
index 15d6836..5b479a8 100644
--- a/arch/arm/mach-omap2/omap5/boot.c
+++ b/arch/arm/mach-omap2/omap5/boot.c
@@ -5,7 +5,6 @@
* Copyright (C) 2015 Paul Kocialkowski <contact@paulk.fr>
*/
-#include <common.h>
#include <asm/io.h>
#include <asm/omap_common.h>
#include <spl.h>
diff --git a/arch/arm/mach-omap2/omap5/dra7xx_iodelay.c b/arch/arm/mach-omap2/omap5/dra7xx_iodelay.c
index 8569eff..d50452b 100644
--- a/arch/arm/mach-omap2/omap5/dra7xx_iodelay.c
+++ b/arch/arm/mach-omap2/omap5/dra7xx_iodelay.c
@@ -6,7 +6,7 @@
* Lokesh Vutla <lokeshvutla@ti.com>
*/
-#include <common.h>
+#include <config.h>
#include <hang.h>
#include <log.h>
#include <asm/utils.h>
diff --git a/arch/arm/mach-omap2/omap5/emif.c b/arch/arm/mach-omap2/omap5/emif.c
index 2de36b6..d243ff3 100644
--- a/arch/arm/mach-omap2/omap5/emif.c
+++ b/arch/arm/mach-omap2/omap5/emif.c
@@ -8,7 +8,6 @@
* Aneesh V <aneesh@ti.com> for OMAP4
*/
-#include <common.h>
#include <log.h>
#include <asm/emif.h>
#include <asm/arch/sys_proto.h>
diff --git a/arch/arm/mach-omap2/omap5/fdt.c b/arch/arm/mach-omap2/omap5/fdt.c
index 0ca02e6..f75ec47 100644
--- a/arch/arm/mach-omap2/omap5/fdt.c
+++ b/arch/arm/mach-omap2/omap5/fdt.c
@@ -3,7 +3,7 @@
* Copyright 2016 Texas Instruments, Inc.
*/
-#include <common.h>
+#include <config.h>
#include <hang.h>
#include <log.h>
#include <linux/libfdt.h>
diff --git a/arch/arm/mach-omap2/omap5/hw_data.c b/arch/arm/mach-omap2/omap5/hw_data.c
index b391322..e657270 100644
--- a/arch/arm/mach-omap2/omap5/hw_data.c
+++ b/arch/arm/mach-omap2/omap5/hw_data.c
@@ -8,7 +8,6 @@
*
* Sricharan R <r.sricharan@ti.com>
*/
-#include <common.h>
#include <palmas.h>
#include <asm/arch/omap.h>
#include <asm/arch/sys_proto.h>
diff --git a/arch/arm/mach-omap2/omap5/hwinit.c b/arch/arm/mach-omap2/omap5/hwinit.c
index edab9a9..7f41e85 100644
--- a/arch/arm/mach-omap2/omap5/hwinit.c
+++ b/arch/arm/mach-omap2/omap5/hwinit.c
@@ -11,7 +11,6 @@
* Steve Sakoman <steve@sakoman.com>
* Sricharan <r.sricharan@ti.com>
*/
-#include <common.h>
#include <cpu_func.h>
#include <palmas.h>
#include <asm/armv7.h>
diff --git a/arch/arm/mach-omap2/omap5/sdram.c b/arch/arm/mach-omap2/omap5/sdram.c
index 786da45..6bf4cf4 100644
--- a/arch/arm/mach-omap2/omap5/sdram.c
+++ b/arch/arm/mach-omap2/omap5/sdram.c
@@ -10,7 +10,6 @@
* Sricharan R <r.sricharan@ti.com>
*/
-#include <common.h>
#include <asm/emif.h>
#include <asm/arch/sys_proto.h>
diff --git a/arch/arm/mach-omap2/sec-common.c b/arch/arm/mach-omap2/sec-common.c
index 64560b2..16bbc93 100644
--- a/arch/arm/mach-omap2/sec-common.c
+++ b/arch/arm/mach-omap2/sec-common.c
@@ -12,7 +12,7 @@
* Andrew F. Davis <afd@ti.com>
*/
-#include <common.h>
+#include <config.h>
#include <command.h>
#include <cpu_func.h>
#include <hang.h>
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index 71fdf5b..ed0620e 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -15,7 +15,7 @@
* Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
*/
-#include <common.h>
+#include <config.h>
#include <init.h>
#include <time.h>
#include <asm/global_data.h>
diff --git a/arch/arm/mach-omap2/utils.c b/arch/arm/mach-omap2/utils.c
index 0623281..2326d15 100644
--- a/arch/arm/mach-omap2/utils.c
+++ b/arch/arm/mach-omap2/utils.c
@@ -3,9 +3,9 @@
* Copyright 2011 Linaro Limited
* Aneesh V <aneesh@ti.com>
*/
-#include <common.h>
#include <env.h>
#include <part.h>
+#include <vsprintf.h>
#include <asm/setup.h>
#include <asm/arch/sys_proto.h>
#include <asm/omap_common.h>
diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c
index 054782e..cb377aa 100644
--- a/arch/arm/mach-omap2/vc.c
+++ b/arch/arm/mach-omap2/vc.c
@@ -14,7 +14,7 @@
* GNU General Public License for more details.
*/
-#include <common.h>
+#include <config.h>
#include <asm/omap_common.h>
#include <asm/arch/sys_proto.h>
#include <asm/arch/clock.h>
diff --git a/arch/arm/mach-orion5x/cpu.c b/arch/arm/mach-orion5x/cpu.c
index ffae9a0..58ee67e 100644
--- a/arch/arm/mach-orion5x/cpu.c
+++ b/arch/arm/mach-orion5x/cpu.c
@@ -8,7 +8,6 @@
* Written-by: Prafulla Wadaskar <prafulla@marvell.com>
*/
-#include <common.h>
#include <cpu_func.h>
#include <init.h>
#include <net.h>
diff --git a/arch/arm/mach-orion5x/dram.c b/arch/arm/mach-orion5x/dram.c
index 5647f84..228a3f7 100644
--- a/arch/arm/mach-orion5x/dram.c
+++ b/arch/arm/mach-orion5x/dram.c
@@ -8,7 +8,6 @@
* Written-by: Prafulla Wadaskar <prafulla@marvell.com>
*/
-#include <common.h>
#include <config.h>
#include <init.h>
#include <asm/arch/cpu.h>
diff --git a/arch/arm/mach-orion5x/timer.c b/arch/arm/mach-orion5x/timer.c
index b373e59..85736f0 100644
--- a/arch/arm/mach-orion5x/timer.c
+++ b/arch/arm/mach-orion5x/timer.c
@@ -7,7 +7,7 @@
* Written-by: Prafulla Wadaskar <prafulla@marvell.com>
*/
-#include <common.h>
+#include <config.h>
#include <init.h>
#include <time.h>
#include <asm/global_data.h>
diff --git a/arch/arm/mach-owl/soc.c b/arch/arm/mach-owl/soc.c
index f0f46f2..0130cad 100644
--- a/arch/arm/mach-owl/soc.c
+++ b/arch/arm/mach-owl/soc.c
@@ -5,13 +5,13 @@
* Copyright (C) 2018 Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
*/
+#include <config.h>
#include <cpu_func.h>
#include <init.h>
#include <asm/cache.h>
#include <asm/global_data.h>
#include <linux/arm-smccc.h>
#include <linux/psci.h>
-#include <common.h>
#include <asm/io.h>
#include <asm/mach-types.h>
#include <asm/psci.h>
diff --git a/arch/arm/mach-owl/sysmap-owl.c b/arch/arm/mach-owl/sysmap-owl.c
index 81f6ca2..6f0a220 100644
--- a/arch/arm/mach-owl/sysmap-owl.c
+++ b/arch/arm/mach-owl/sysmap-owl.c
@@ -6,7 +6,6 @@
* Copyright (C) 2018 Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
*/
-#include <common.h>
#include <asm/armv8/mmu.h>
static struct mm_region owl_mem_map[] = {
diff --git a/arch/arm/mach-renesas/Kconfig b/arch/arm/mach-renesas/Kconfig
index 2ac8676..aeb55da 100644
--- a/arch/arm/mach-renesas/Kconfig
+++ b/arch/arm/mach-renesas/Kconfig
@@ -14,6 +14,7 @@
imply CMD_GPT
imply CMD_MMC_SWRITE if MMC
imply CMD_UUID
+ imply OF_UPSTREAM
imply SUPPORT_EMMC_RPMB if MMC
choice
diff --git a/arch/arm/mach-renesas/memmap-gen3.c b/arch/arm/mach-renesas/memmap-gen3.c
index 4dff9e0..c50700d 100644
--- a/arch/arm/mach-renesas/memmap-gen3.c
+++ b/arch/arm/mach-renesas/memmap-gen3.c
@@ -7,7 +7,6 @@
#include <asm/armv8/mmu.h>
#include <asm/global_data.h>
-#include <asm/u-boot.h>
#include <cpu_func.h>
#define GEN3_NR_REGIONS 16
diff --git a/arch/arm/mach-renesas/memmap-rzg2l.c b/arch/arm/mach-renesas/memmap-rzg2l.c
index 9934a77..3b3c6f7 100644
--- a/arch/arm/mach-renesas/memmap-rzg2l.c
+++ b/arch/arm/mach-renesas/memmap-rzg2l.c
@@ -8,7 +8,6 @@
#include <asm/armv8/mmu.h>
#include <asm/global_data.h>
-#include <asm/u-boot.h>
#include <cpu_func.h>
#define RZG2L_NR_REGIONS 16
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index f68a0a4..67d3b28 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -160,14 +160,25 @@
select SPL_ATF
select SPL_ATF_NO_PLATFORM_PARAM
select SPL_LOAD_FIT
+ imply ARMV8_CRYPTO
+ imply ARMV8_SET_SMPEN
+ imply DM_RNG
+ imply LEGACY_IMAGE_FORMAT
+ imply MISC
+ imply MISC_INIT_R
+ imply RNG_ROCKCHIP
imply ROCKCHIP_COMMON_BOARD
- imply SPL_ROCKCHIP_COMMON_BOARD
+ imply ROCKCHIP_OTP
imply SPL_CLK
- imply SPL_REGMAP
- imply SPL_SYSCON
+ imply SPL_DM_SEQ_ALIAS
+ imply SPL_FIT_SIGNATURE
+ imply SPL_PINCTRL
imply SPL_RAM
- imply SPL_SERIAL
+ imply SPL_REGMAP
+ imply SPL_ROCKCHIP_COMMON_BOARD
imply SPL_SEPARATE_BSS
+ imply SPL_SERIAL
+ imply SPL_SYSCON
help
The Rockchip RK3308 is a ARM-based Soc which embedded with quad
Cortex-A35 and highly integrated audio interfaces.
@@ -180,18 +191,19 @@
select SUPPORT_TPL
select TPL
select TPL_NEEDS_SEPARATE_STACK if TPL
+ imply ARMV8_CRYPTO
+ imply ARMV8_SET_SMPEN
+ imply MISC
+ imply MISC_INIT_R
+ imply OF_LIVE
+ imply PRE_CONSOLE_BUFFER
imply ROCKCHIP_COMMON_BOARD
+ imply ROCKCHIP_EFUSE
imply ROCKCHIP_SDRAM_COMMON
imply SPL_ROCKCHIP_COMMON_BOARD
+ imply SPL_SEPARATE_BSS
imply SPL_SERIAL
imply TPL_SERIAL
- imply SPL_SEPARATE_BSS
- select ENABLE_ARM_SOC_BOOT0_HOOK
- select DEBUG_UART_BOARD_INIT
- select SYS_NS16550
- imply MISC
- imply ROCKCHIP_EFUSE
- imply MISC_INIT_R
help
The Rockchip RK3328 is a ARM-based SoC with a quad-core Cortex-A53.
including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
@@ -294,12 +306,16 @@
select BOARD_LATE_INIT
select DM_REGULATOR_FIXED
select DM_RESET
- imply SPL_ATF_NO_PLATFORM_PARAM if SPL_ATF
- imply ROCKCHIP_COMMON_BOARD
- imply OF_LIBFDT_OVERLAY
- imply ROCKCHIP_OTP
+ imply BOOTSTD_FULL
+ imply DM_RNG
imply MISC_INIT_R
imply MMC_HS200_SUPPORT if MMC_SDHCI_ROCKCHIP
+ imply OF_LIBFDT_OVERLAY
+ imply PHY_GIGE if DWC_ETH_QOS_ROCKCHIP
+ imply RNG_ROCKCHIP
+ imply ROCKCHIP_COMMON_BOARD
+ imply ROCKCHIP_OTP
+ imply SPL_ATF_NO_PLATFORM_PARAM if SPL_ATF
imply SPL_MMC_HS200_SUPPORT if SPL_MMC && MMC_HS200_SUPPORT
help
The Rockchip RK3568 is a ARM-based SoC with quad-core Cortex-A55,
@@ -321,16 +337,19 @@
select BOARD_LATE_INIT
select DM_REGULATOR_FIXED
select DM_RESET
- imply SPL_ATF_NO_PLATFORM_PARAM if SPL_ATF
- imply ROCKCHIP_COMMON_BOARD
- imply OF_LIBFDT_OVERLAY
- imply ROCKCHIP_OTP
+ imply BOOTSTD_FULL
+ imply CLK_SCMI
+ imply DM_RNG
imply MISC_INIT_R
imply MMC_HS200_SUPPORT if MMC_SDHCI_ROCKCHIP
- imply SPL_MMC_HS200_SUPPORT if SPL_MMC && MMC_HS200_SUPPORT
- imply CLK_SCMI
+ imply OF_LIBFDT_OVERLAY
+ imply PHY_GIGE if DWC_ETH_QOS_ROCKCHIP
+ imply RNG_ROCKCHIP
+ imply ROCKCHIP_COMMON_BOARD
+ imply ROCKCHIP_OTP
imply SCMI_FIRMWARE
- imply BOOTSTD_FULL
+ imply SPL_ATF_NO_PLATFORM_PARAM if SPL_ATF
+ imply SPL_MMC_HS200_SUPPORT if SPL_MMC && MMC_HS200_SUPPORT
help
The Rockchip RK3588 is a ARM-based SoC with quad-core Cortex-A76 and
quad-core Cortex-A55 including NEON and GPU, 6TOPS NPU, Mali-G610 MP4,
@@ -573,6 +592,9 @@
imply TPL_SYS_MALLOC_F if TPL
imply TPL_SYS_MALLOC_SIMPLE if TPL
+config NR_DRAM_BANKS
+ default 10 if ROCKCHIP_EXTERNAL_TPL
+
source "arch/arm/mach-rockchip/px30/Kconfig"
source "arch/arm/mach-rockchip/rk3036/Kconfig"
source "arch/arm/mach-rockchip/rk3066/Kconfig"
diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index cd22684..8a57b82 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -8,7 +8,7 @@
* Based on puma-rk3399.c:
* (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
*/
-#include <common.h>
+#include <config.h>
#include <clk.h>
#include <cpu_func.h>
#include <env.h>
diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
index f9be396..55e9456 100644
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -3,7 +3,6 @@
* (C) Copyright 2016 Rockchip Electronics Co., Ltd
*/
-#include <common.h>
#include <adc.h>
#include <command.h>
#include <env.h>
diff --git a/arch/arm/mach-rockchip/bootrom.c b/arch/arm/mach-rockchip/bootrom.c
index b36e559..82a0b3e 100644
--- a/arch/arm/mach-rockchip/bootrom.c
+++ b/arch/arm/mach-rockchip/bootrom.c
@@ -3,7 +3,6 @@
* Copyright (c) 2017 Google, Inc
*/
-#include <common.h>
#include <hang.h>
#include <asm/arch-rockchip/bootrom.h>
#include <asm/arch-rockchip/boot_mode.h>
diff --git a/arch/arm/mach-rockchip/cpu-info.c b/arch/arm/mach-rockchip/cpu-info.c
index a62ff53..14c7331 100644
--- a/arch/arm/mach-rockchip/cpu-info.c
+++ b/arch/arm/mach-rockchip/cpu-info.c
@@ -4,7 +4,6 @@
* Author: Jagan Teki <jagan@amarulasolutions.com>
*/
-#include <common.h>
#include <env.h>
#include <init.h>
#include <asm/arch-rockchip/clock.h>
diff --git a/arch/arm/mach-rockchip/px30-board-tpl.c b/arch/arm/mach-rockchip/px30-board-tpl.c
index 637a5e1..f0b3c5f 100644
--- a/arch/arm/mach-rockchip/px30-board-tpl.c
+++ b/arch/arm/mach-rockchip/px30-board-tpl.c
@@ -3,7 +3,6 @@
* (C) Copyright 2019 Rockchip Electronics Co., Ltd
*/
-#include <common.h>
#include <debug_uart.h>
#include <dm.h>
#include <init.h>
@@ -36,7 +35,7 @@
{
int ret;
-#ifdef CONFIG_DEBUG_UART
+#if defined(CONFIG_DEBUG_UART) && defined(CONFIG_TPL_SERIAL)
debug_uart_init();
/*
* Debug UART can be used from here if required:
@@ -46,8 +45,10 @@
* printhex8(0x1234);
* printascii("string");
*/
+#if CONFIG_TPL_BANNER_PRINT
printascii("U-Boot TPL board init\n");
#endif
+#endif
secure_timer_init();
ret = sdram_init();
diff --git a/arch/arm/mach-rockchip/px30/Kconfig b/arch/arm/mach-rockchip/px30/Kconfig
index 4189392..23f8f43 100644
--- a/arch/arm/mach-rockchip/px30/Kconfig
+++ b/arch/arm/mach-rockchip/px30/Kconfig
@@ -36,9 +36,9 @@
10.1" OF for creating complete PX30.Core C.TOUCH 2.0 10.1" Open Frame.
config TARGET_RINGNECK_PX30
- bool "Theobroma Systems PX30-µQ7 (Ringneck)"
+ bool "Theobroma Systems PX30-uQ7 (Ringneck)"
help
- The PX30-uQ7 (Ringneck) SoM is a µQseven-compatible (40mmx70mm,
+ The PX30-uQ7 (Ringneck) SoM is a uQseven-compatible (40mmx70mm,
MXM-230 connector) system-on-module from Theobroma Systems[1],
featuring the Rockchip PX30.
diff --git a/arch/arm/mach-rockchip/px30/clk_px30.c b/arch/arm/mach-rockchip/px30/clk_px30.c
index 7edf132..4101347 100644
--- a/arch/arm/mach-rockchip/px30/clk_px30.c
+++ b/arch/arm/mach-rockchip/px30/clk_px30.c
@@ -3,7 +3,6 @@
* (C) Copyright 2017 Rockchip Electronics Co., Ltd.
*/
-#include <common.h>
#include <dm.h>
#include <syscon.h>
#include <asm/arch-rockchip/clock.h>
diff --git a/arch/arm/mach-rockchip/px30/px30.c b/arch/arm/mach-rockchip/px30/px30.c
index b4f655f..8b1509e 100644
--- a/arch/arm/mach-rockchip/px30/px30.c
+++ b/arch/arm/mach-rockchip/px30/px30.c
@@ -2,7 +2,6 @@
/*
* Copyright (c) 2017 Rockchip Electronics Co., Ltd
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <fdt_support.h>
@@ -19,6 +18,7 @@
const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
[BROM_BOOTSOURCE_EMMC] = "/mmc@ff390000",
+ [BROM_BOOTSOURCE_SPINOR] = "/spi@ff3a0000/flash@0",
[BROM_BOOTSOURCE_SD] = "/mmc@ff370000",
};
diff --git a/arch/arm/mach-rockchip/px30/syscon_px30.c b/arch/arm/mach-rockchip/px30/syscon_px30.c
index 37e88f5..c9de574 100644
--- a/arch/arm/mach-rockchip/px30/syscon_px30.c
+++ b/arch/arm/mach-rockchip/px30/syscon_px30.c
@@ -3,7 +3,6 @@
* (C) Copyright 2017 Rockchip Electronics Co., Ltd
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <syscon.h>
diff --git a/arch/arm/mach-rockchip/rk3036-board-spl.c b/arch/arm/mach-rockchip/rk3036-board-spl.c
index 73f6d24..64e1001 100644
--- a/arch/arm/mach-rockchip/rk3036-board-spl.c
+++ b/arch/arm/mach-rockchip/rk3036-board-spl.c
@@ -3,7 +3,6 @@
* (C) Copyright 2015-2019 Rockchip Electronics Co., Ltd
*/
-#include <common.h>
#include <debug_uart.h>
#include <init.h>
#include <asm/io.h>
diff --git a/arch/arm/mach-rockchip/rk3036/clk_rk3036.c b/arch/arm/mach-rockchip/rk3036/clk_rk3036.c
index 116dccd..9046601 100644
--- a/arch/arm/mach-rockchip/rk3036/clk_rk3036.c
+++ b/arch/arm/mach-rockchip/rk3036/clk_rk3036.c
@@ -4,7 +4,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <dm.h>
#include <syscon.h>
#include <asm/arch-rockchip/clock.h>
diff --git a/arch/arm/mach-rockchip/rk3036/rk3036.c b/arch/arm/mach-rockchip/rk3036/rk3036.c
index e8130ab..6c92b31 100644
--- a/arch/arm/mach-rockchip/rk3036/rk3036.c
+++ b/arch/arm/mach-rockchip/rk3036/rk3036.c
@@ -3,7 +3,6 @@
* (C) Copyright 2019 Rockchip Electronics Co., Ltd
*/
-#include <common.h>
#include <init.h>
#include <asm/global_data.h>
#include <asm/arch-rockchip/grf_rk3036.h>
diff --git a/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c b/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c
index 07cd29a..308b9e6 100644
--- a/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c
+++ b/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c
@@ -2,7 +2,7 @@
/*
* (C) Copyright 2015 Rockchip Electronics Co., Ltd
*/
-#include <common.h>
+#include <config.h>
#include <init.h>
#include <asm/types.h>
#include <asm/arch-rockchip/cru_rk3036.h>
diff --git a/arch/arm/mach-rockchip/rk3036/syscon_rk3036.c b/arch/arm/mach-rockchip/rk3036/syscon_rk3036.c
index c2fd160..23b7526 100644
--- a/arch/arm/mach-rockchip/rk3036/syscon_rk3036.c
+++ b/arch/arm/mach-rockchip/rk3036/syscon_rk3036.c
@@ -3,7 +3,6 @@
* (C) Copyright 2015 Rockchip Electronics Co., Ltd
*/
-#include <common.h>
#include <dm.h>
#include <syscon.h>
#include <asm/arch-rockchip/clock.h>
diff --git a/arch/arm/mach-rockchip/rk3066/clk_rk3066.c b/arch/arm/mach-rockchip/rk3066/clk_rk3066.c
index c47526d..88057fa 100644
--- a/arch/arm/mach-rockchip/rk3066/clk_rk3066.c
+++ b/arch/arm/mach-rockchip/rk3066/clk_rk3066.c
@@ -4,7 +4,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <dm.h>
#include <syscon.h>
#include <asm/arch-rockchip/clock.h>
diff --git a/arch/arm/mach-rockchip/rk3066/rk3066.c b/arch/arm/mach-rockchip/rk3066/rk3066.c
index 9a95ff8..70b55ca 100644
--- a/arch/arm/mach-rockchip/rk3066/rk3066.c
+++ b/arch/arm/mach-rockchip/rk3066/rk3066.c
@@ -3,7 +3,6 @@
* (C) Copyright 2016 Rockchip Electronics Co., Ltd
*/
-#include <common.h>
#include <asm/arch-rockchip/bootrom.h>
#include <asm/arch-rockchip/grf_rk3066.h>
#include <asm/arch-rockchip/hardware.h>
diff --git a/arch/arm/mach-rockchip/rk3066/syscon_rk3066.c b/arch/arm/mach-rockchip/rk3066/syscon_rk3066.c
index a598f64..ff269b5 100644
--- a/arch/arm/mach-rockchip/rk3066/syscon_rk3066.c
+++ b/arch/arm/mach-rockchip/rk3066/syscon_rk3066.c
@@ -4,7 +4,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <syscon.h>
diff --git a/arch/arm/mach-rockchip/rk3128/clk_rk3128.c b/arch/arm/mach-rockchip/rk3128/clk_rk3128.c
index a1b038c..ae552af 100644
--- a/arch/arm/mach-rockchip/rk3128/clk_rk3128.c
+++ b/arch/arm/mach-rockchip/rk3128/clk_rk3128.c
@@ -3,7 +3,6 @@
* Copyright (c) 2017 Rockchip Electronics Co., Ltd
*/
-#include <common.h>
#include <dm.h>
#include <syscon.h>
#include <asm/arch-rockchip/clock.h>
diff --git a/arch/arm/mach-rockchip/rk3128/syscon_rk3128.c b/arch/arm/mach-rockchip/rk3128/syscon_rk3128.c
index 1406d5d..f81c57a 100644
--- a/arch/arm/mach-rockchip/rk3128/syscon_rk3128.c
+++ b/arch/arm/mach-rockchip/rk3128/syscon_rk3128.c
@@ -3,7 +3,6 @@
* (C) Copyright 2017 Rockchip Electronics Co., Ltd
*/
-#include <common.h>
#include <dm.h>
#include <syscon.h>
#include <asm/arch-rockchip/clock.h>
diff --git a/arch/arm/mach-rockchip/rk3188/clk_rk3188.c b/arch/arm/mach-rockchip/rk3188/clk_rk3188.c
index 94d1d23..c0e71c3 100644
--- a/arch/arm/mach-rockchip/rk3188/clk_rk3188.c
+++ b/arch/arm/mach-rockchip/rk3188/clk_rk3188.c
@@ -4,7 +4,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <dm.h>
#include <syscon.h>
#include <asm/arch-rockchip/clock.h>
diff --git a/arch/arm/mach-rockchip/rk3188/rk3188.c b/arch/arm/mach-rockchip/rk3188/rk3188.c
index ffdcaa4..53b2eaa 100644
--- a/arch/arm/mach-rockchip/rk3188/rk3188.c
+++ b/arch/arm/mach-rockchip/rk3188/rk3188.c
@@ -2,7 +2,6 @@
/*
* (C) Copyright 2019 Rockchip Electronics Co., Ltd
*/
-#include <common.h>
#include <dm.h>
#include <hang.h>
#include <init.h>
diff --git a/arch/arm/mach-rockchip/rk3188/syscon_rk3188.c b/arch/arm/mach-rockchip/rk3188/syscon_rk3188.c
index 917ff37..6df054e 100644
--- a/arch/arm/mach-rockchip/rk3188/syscon_rk3188.c
+++ b/arch/arm/mach-rockchip/rk3188/syscon_rk3188.c
@@ -4,7 +4,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <syscon.h>
diff --git a/arch/arm/mach-rockchip/rk322x/clk_rk322x.c b/arch/arm/mach-rockchip/rk322x/clk_rk322x.c
index 2e57672..4703125 100644
--- a/arch/arm/mach-rockchip/rk322x/clk_rk322x.c
+++ b/arch/arm/mach-rockchip/rk322x/clk_rk322x.c
@@ -3,7 +3,6 @@
* (C) Copyright 2017 Rockchip Electronics Co., Ltd.
*/
-#include <common.h>
#include <dm.h>
#include <syscon.h>
#include <asm/arch-rockchip/clock.h>
diff --git a/arch/arm/mach-rockchip/rk322x/syscon_rk322x.c b/arch/arm/mach-rockchip/rk322x/syscon_rk322x.c
index 0d9dca8..c471a4c 100644
--- a/arch/arm/mach-rockchip/rk322x/syscon_rk322x.c
+++ b/arch/arm/mach-rockchip/rk322x/syscon_rk322x.c
@@ -3,7 +3,6 @@
* (C) Copyright 2017 Rockchip Electronics Co., Ltd
*/
-#include <common.h>
#include <dm.h>
#include <syscon.h>
#include <asm/arch-rockchip/clock.h>
diff --git a/arch/arm/mach-rockchip/rk3288/clk_rk3288.c b/arch/arm/mach-rockchip/rk3288/clk_rk3288.c
index fb4c089..af6c5d1 100644
--- a/arch/arm/mach-rockchip/rk3288/clk_rk3288.c
+++ b/arch/arm/mach-rockchip/rk3288/clk_rk3288.c
@@ -4,7 +4,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <dm.h>
#include <syscon.h>
#include <asm/arch-rockchip/clock.h>
diff --git a/arch/arm/mach-rockchip/rk3288/rk3288.c b/arch/arm/mach-rockchip/rk3288/rk3288.c
index c77c56c..d1170f7 100644
--- a/arch/arm/mach-rockchip/rk3288/rk3288.c
+++ b/arch/arm/mach-rockchip/rk3288/rk3288.c
@@ -2,7 +2,6 @@
/*
* Copyright (c) 2016 Rockchip Electronics Co., Ltd
*/
-#include <common.h>
#include <command.h>
#include <dm.h>
#include <env.h>
@@ -28,6 +27,7 @@
const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
[BROM_BOOTSOURCE_EMMC] = "/mmc@ff0f0000",
+ [BROM_BOOTSOURCE_SPINOR] = "/spi@ff130000/flash@0",
[BROM_BOOTSOURCE_SD] = "/mmc@ff0c0000",
};
diff --git a/arch/arm/mach-rockchip/rk3288/syscon_rk3288.c b/arch/arm/mach-rockchip/rk3288/syscon_rk3288.c
index 8b2c2f3..6413d0a 100644
--- a/arch/arm/mach-rockchip/rk3288/syscon_rk3288.c
+++ b/arch/arm/mach-rockchip/rk3288/syscon_rk3288.c
@@ -4,7 +4,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <dm.h>
#include <dt-structs.h>
#include <log.h>
diff --git a/arch/arm/mach-rockchip/rk3308/Kconfig b/arch/arm/mach-rockchip/rk3308/Kconfig
index 749e999..fac9662 100644
--- a/arch/arm/mach-rockchip/rk3308/Kconfig
+++ b/arch/arm/mach-rockchip/rk3308/Kconfig
@@ -23,9 +23,6 @@
config TEXT_BASE
default 0x00600000
-config SPL_SERIAL
- default y
-
source "board/rockchip/evb_rk3308/Kconfig"
source "board/firefly/firefly-rk3308/Kconfig"
diff --git a/arch/arm/mach-rockchip/rk3308/clk_rk3308.c b/arch/arm/mach-rockchip/rk3308/clk_rk3308.c
index ccda533..557e21f 100644
--- a/arch/arm/mach-rockchip/rk3308/clk_rk3308.c
+++ b/arch/arm/mach-rockchip/rk3308/clk_rk3308.c
@@ -3,11 +3,10 @@
* Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
*/
-#include <common.h>
#include <dm.h>
#include <syscon.h>
#include <asm/arch-rockchip/clock.h>
-#include <asm/arch/cru_rk3308.h>
+#include <asm/arch-rockchip/cru_rk3308.h>
#include <linux/err.h>
int rockchip_get_clk(struct udevice **devp)
diff --git a/arch/arm/mach-rockchip/rk3308/rk3308.c b/arch/arm/mach-rockchip/rk3308/rk3308.c
index 27a7483..6f88638 100644
--- a/arch/arm/mach-rockchip/rk3308/rk3308.c
+++ b/arch/arm/mach-rockchip/rk3308/rk3308.c
@@ -2,11 +2,10 @@
/*
*Copyright (c) 2018 Rockchip Electronics Co., Ltd
*/
-#include <common.h>
#include <init.h>
#include <malloc.h>
-#include <asm/arch/grf_rk3308.h>
#include <asm/arch-rockchip/bootrom.h>
+#include <asm/arch-rockchip/grf_rk3308.h>
#include <asm/arch-rockchip/hardware.h>
#include <asm/gpio.h>
#include <debug_uart.h>
@@ -141,6 +140,7 @@
const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
[BROM_BOOTSOURCE_EMMC] = "/mmc@ff490000",
+ [BROM_BOOTSOURCE_SPINOR] = "/spi@ff4c0000/flash@0",
[BROM_BOOTSOURCE_SD] = "/mmc@ff480000",
};
diff --git a/arch/arm/mach-rockchip/rk3308/syscon_rk3308.c b/arch/arm/mach-rockchip/rk3308/syscon_rk3308.c
index b380ff5..2d7e971 100644
--- a/arch/arm/mach-rockchip/rk3308/syscon_rk3308.c
+++ b/arch/arm/mach-rockchip/rk3308/syscon_rk3308.c
@@ -3,7 +3,6 @@
* (C) Copyright 2018 Rockchip Electronics Co., Ltd
*/
-#include <common.h>
#include <dm.h>
#include <syscon.h>
#include <asm/arch-rockchip/clock.h>
diff --git a/arch/arm/mach-rockchip/rk3328/clk_rk3328.c b/arch/arm/mach-rockchip/rk3328/clk_rk3328.c
index 70c0eb6..b0c5af5 100644
--- a/arch/arm/mach-rockchip/rk3328/clk_rk3328.c
+++ b/arch/arm/mach-rockchip/rk3328/clk_rk3328.c
@@ -3,7 +3,6 @@
* (C) Copyright 2017 Rockchip Electronics Co., Ltd
*/
-#include <common.h>
#include <dm.h>
#include <asm/arch-rockchip/clock.h>
#include <asm/arch-rockchip/cru_rk3328.h>
diff --git a/arch/arm/mach-rockchip/rk3328/rk3328.c b/arch/arm/mach-rockchip/rk3328/rk3328.c
index ca3fa81..c86d119 100644
--- a/arch/arm/mach-rockchip/rk3328/rk3328.c
+++ b/arch/arm/mach-rockchip/rk3328/rk3328.c
@@ -3,7 +3,6 @@
* Copyright (c) 2016 Rockchip Electronics Co., Ltd
*/
-#include <common.h>
#include <init.h>
#include <asm/arch-rockchip/bootrom.h>
#include <asm/arch-rockchip/hardware.h>
diff --git a/arch/arm/mach-rockchip/rk3328/syscon_rk3328.c b/arch/arm/mach-rockchip/rk3328/syscon_rk3328.c
index daf74a0..02ed366 100644
--- a/arch/arm/mach-rockchip/rk3328/syscon_rk3328.c
+++ b/arch/arm/mach-rockchip/rk3328/syscon_rk3328.c
@@ -3,7 +3,6 @@
* (C) Copyright 2016 Rockchip Electronics Co., Ltd
*/
-#include <common.h>
#include <asm/arch-rockchip/clock.h>
#include <dm.h>
#include <syscon.h>
@@ -17,4 +16,7 @@
.name = "rockchip_rk3328_grf",
.id = UCLASS_SYSCON,
.of_match = rk3328_syscon_ids,
+#if CONFIG_IS_ENABLED(OF_REAL)
+ .bind = dm_scan_fdt_dev,
+#endif
};
diff --git a/arch/arm/mach-rockchip/rk3368/clk_rk3368.c b/arch/arm/mach-rockchip/rk3368/clk_rk3368.c
index b075319..c4d41e5 100644
--- a/arch/arm/mach-rockchip/rk3368/clk_rk3368.c
+++ b/arch/arm/mach-rockchip/rk3368/clk_rk3368.c
@@ -4,7 +4,6 @@
* Author: Andy Yan <andy.yan@rock-chips.org>
*/
-#include <common.h>
#include <dm.h>
#include <syscon.h>
#include <asm/arch-rockchip/clock.h>
diff --git a/arch/arm/mach-rockchip/rk3368/rk3368.c b/arch/arm/mach-rockchip/rk3368/rk3368.c
index 651ba10..f589bf6 100644
--- a/arch/arm/mach-rockchip/rk3368/rk3368.c
+++ b/arch/arm/mach-rockchip/rk3368/rk3368.c
@@ -4,7 +4,6 @@
* Copyright (c) 2016 Andreas Färber
*/
-#include <common.h>
#include <init.h>
#include <syscon.h>
#include <asm/armv8/mmu.h>
@@ -55,6 +54,7 @@
const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
[BROM_BOOTSOURCE_EMMC] = "/mmc@ff0f0000",
+ [BROM_BOOTSOURCE_SPINOR] = "/spi@ff120000/flash@0",
[BROM_BOOTSOURCE_SD] = "/mmc@ff0c0000",
};
diff --git a/arch/arm/mach-rockchip/rk3368/syscon_rk3368.c b/arch/arm/mach-rockchip/rk3368/syscon_rk3368.c
index dc2d831..7389c02 100644
--- a/arch/arm/mach-rockchip/rk3368/syscon_rk3368.c
+++ b/arch/arm/mach-rockchip/rk3368/syscon_rk3368.c
@@ -5,7 +5,6 @@
* (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <syscon.h>
diff --git a/arch/arm/mach-rockchip/rk3399/clk_rk3399.c b/arch/arm/mach-rockchip/rk3399/clk_rk3399.c
index 9d9a837..de552b5 100644
--- a/arch/arm/mach-rockchip/rk3399/clk_rk3399.c
+++ b/arch/arm/mach-rockchip/rk3399/clk_rk3399.c
@@ -4,7 +4,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <dm.h>
#include <syscon.h>
#include <asm/arch-rockchip/clock.h>
diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c b/arch/arm/mach-rockchip/rk3399/rk3399.c
index 7fa1d7c..2d7d0f8 100644
--- a/arch/arm/mach-rockchip/rk3399/rk3399.c
+++ b/arch/arm/mach-rockchip/rk3399/rk3399.c
@@ -3,7 +3,6 @@
* Copyright (c) 2016 Rockchip Electronics Co., Ltd
*/
-#include <common.h>
#include <fdt_support.h>
#include <init.h>
#include <log.h>
diff --git a/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c b/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c
index 2b5746c..b92ad54 100644
--- a/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c
+++ b/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c
@@ -3,7 +3,6 @@
* (C) Copyright 2016 Rockchip Electronics Co., Ltd
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <syscon.h>
diff --git a/arch/arm/mach-rockchip/rk3568/clk_rk3568.c b/arch/arm/mach-rockchip/rk3568/clk_rk3568.c
index 8917edc..1c6b2ec 100644
--- a/arch/arm/mach-rockchip/rk3568/clk_rk3568.c
+++ b/arch/arm/mach-rockchip/rk3568/clk_rk3568.c
@@ -3,7 +3,6 @@
* (C) Copyright 2021 Rockchip Electronics Co., Ltd
*/
-#include <common.h>
#include <dm.h>
#include <syscon.h>
#include <asm/arch-rockchip/clock.h>
diff --git a/arch/arm/mach-rockchip/rk3568/rk3568.c b/arch/arm/mach-rockchip/rk3568/rk3568.c
index b30ea04..1b3e400 100644
--- a/arch/arm/mach-rockchip/rk3568/rk3568.c
+++ b/arch/arm/mach-rockchip/rk3568/rk3568.c
@@ -3,7 +3,6 @@
* (C) Copyright 2021 Rockchip Electronics Co., Ltd
*/
-#include <common.h>
#include <dm.h>
#include <asm/armv8/mmu.h>
#include <asm/arch-rockchip/bootrom.h>
diff --git a/arch/arm/mach-rockchip/rk3568/syscon_rk3568.c b/arch/arm/mach-rockchip/rk3568/syscon_rk3568.c
index 5407e78..255259e 100644
--- a/arch/arm/mach-rockchip/rk3568/syscon_rk3568.c
+++ b/arch/arm/mach-rockchip/rk3568/syscon_rk3568.c
@@ -3,7 +3,6 @@
* (C) Copyright 2021 Rockchip Electronics Co., Ltd
*/
-#include <common.h>
#include <dm.h>
#include <syscon.h>
#include <asm/arch-rockchip/clock.h>
diff --git a/arch/arm/mach-rockchip/rk3588/Kconfig b/arch/arm/mach-rockchip/rk3588/Kconfig
index d7e4af3..39049ab 100644
--- a/arch/arm/mach-rockchip/rk3588/Kconfig
+++ b/arch/arm/mach-rockchip/rk3588/Kconfig
@@ -66,7 +66,7 @@
HDMI2.0, and HDMI1.4
2x 4-lane MIPI-DSI, compatible with MIPI DPHY 2.0 or CPHY 1.1
USB-A: USB 3.0, Type A
- USB-C: Full function USB Type‑C port, DP display up to 4Kp60, USB 3.0
+ USB-C: Full function USB Type-C port, DP display up to 4Kp60, USB 3.0
40-pin 2.54mm header connector: up to 2x SPIs, 6x UARTs, 1x I2Cs,
8x PWMs, 2x I2Ss, 28x GPIOs
Debug UART: 3 Pin 2.54mm header, 3V level, 1500000bps
@@ -117,7 +117,7 @@
Mali G610MC4 GPU
MIPI CSI 2 multiple lanes connector
4-lane MIPI DSI connector
- Audio – 3.5mm earphone jack
+ Audio - 3.5mm earphone jack
eMMC module connector
uSD slot (up to 128GB)
2x USB 2.0, 2x USB 3.0
@@ -197,7 +197,7 @@
4x ARM Cortex-A76, 4x ARM Cortex-A55
8/16GB Memory LPDDR4x
Mali G610MC4 GPU
- 2× MIPI-CSI0 Connector
+ 2x MIPI-CSI0 Connector
1x 2Lanes PCIe3.0 Connector
1x SATA3.0 Connector
32GB eMMC Module
@@ -221,14 +221,14 @@
config TEXT_BASE
default 0x00a00000
-source board/edgeble/neural-compute-module-6/Kconfig
-source board/friendlyelec/nanopc-t6-rk3588/Kconfig
-source board/pine64/quartzpro64-rk3588/Kconfig
-source board/turing/turing-rk1-rk3588/Kconfig
-source board/radxa/rock5a-rk3588s/Kconfig
-source board/radxa/rock5b-rk3588/Kconfig
-source board/rockchip/evb_rk3588/Kconfig
-source board/rockchip/toybrick_rk3588/Kconfig
-source board/theobroma-systems/jaguar_rk3588/Kconfig
+source "board/edgeble/neural-compute-module-6/Kconfig"
+source "board/friendlyelec/nanopc-t6-rk3588/Kconfig"
+source "board/pine64/quartzpro64-rk3588/Kconfig"
+source "board/turing/turing-rk1-rk3588/Kconfig"
+source "board/radxa/rock5a-rk3588s/Kconfig"
+source "board/radxa/rock5b-rk3588/Kconfig"
+source "board/rockchip/evb_rk3588/Kconfig"
+source "board/rockchip/toybrick_rk3588/Kconfig"
+source "board/theobroma-systems/jaguar_rk3588/Kconfig"
endif
diff --git a/arch/arm/mach-rockchip/rk3588/clk_rk3588.c b/arch/arm/mach-rockchip/rk3588/clk_rk3588.c
index 3df0bf2..250ec42 100644
--- a/arch/arm/mach-rockchip/rk3588/clk_rk3588.c
+++ b/arch/arm/mach-rockchip/rk3588/clk_rk3588.c
@@ -3,7 +3,6 @@
* (C) Copyright 2020 Rockchip Electronics Co., Ltd.
*/
-#include <common.h>
#include <dm.h>
#include <syscon.h>
#include <asm/arch-rockchip/clock.h>
diff --git a/arch/arm/mach-rockchip/rk3588/rk3588.c b/arch/arm/mach-rockchip/rk3588/rk3588.c
index eb65daf..d3162d3 100644
--- a/arch/arm/mach-rockchip/rk3588/rk3588.c
+++ b/arch/arm/mach-rockchip/rk3588/rk3588.c
@@ -4,7 +4,6 @@
* Copyright (c) 2022 Edgeble AI Technologies Pvt. Ltd.
*/
-#include <common.h>
#include <spl.h>
#include <asm/armv8/mmu.h>
#include <asm/arch-rockchip/bootrom.h>
diff --git a/arch/arm/mach-rockchip/rk3588/syscon_rk3588.c b/arch/arm/mach-rockchip/rk3588/syscon_rk3588.c
index 7b2cf37..f86567f 100644
--- a/arch/arm/mach-rockchip/rk3588/syscon_rk3588.c
+++ b/arch/arm/mach-rockchip/rk3588/syscon_rk3588.c
@@ -3,7 +3,6 @@
* (C) Copyright 2021 Rockchip Electronics Co., Ltd
*/
-#include <common.h>
#include <dm.h>
#include <syscon.h>
#include <asm/arch-rockchip/clock.h>
diff --git a/arch/arm/mach-rockchip/rv1108/Kconfig b/arch/arm/mach-rockchip/rv1108/Kconfig
index a12216d..28ed0b2 100644
--- a/arch/arm/mach-rockchip/rv1108/Kconfig
+++ b/arch/arm/mach-rockchip/rv1108/Kconfig
@@ -36,7 +36,7 @@
config SYS_MALLOC_F_LEN
default 0x400
-source board/rockchip/evb_rv1108/Kconfig
-source board/elgin/elgin_rv1108/Kconfig
+source "board/rockchip/evb_rv1108/Kconfig"
+source "board/elgin/elgin_rv1108/Kconfig"
endif
diff --git a/arch/arm/mach-rockchip/rv1108/clk_rv1108.c b/arch/arm/mach-rockchip/rv1108/clk_rv1108.c
index 44b53c4..5659ae0 100644
--- a/arch/arm/mach-rockchip/rv1108/clk_rv1108.c
+++ b/arch/arm/mach-rockchip/rv1108/clk_rv1108.c
@@ -4,7 +4,6 @@
* Author: Andy Yan <andy.yan@rock-chips.com>
*/
-#include <common.h>
#include <dm.h>
#include <syscon.h>
#include <asm/arch-rockchip/clock.h>
diff --git a/arch/arm/mach-rockchip/rv1108/syscon_rv1108.c b/arch/arm/mach-rockchip/rv1108/syscon_rv1108.c
index babdf57..d68fbf1 100644
--- a/arch/arm/mach-rockchip/rv1108/syscon_rv1108.c
+++ b/arch/arm/mach-rockchip/rv1108/syscon_rv1108.c
@@ -3,7 +3,6 @@
* (C) Copyright 2016 Rockchip Electronics Co., Ltd
*/
-#include <common.h>
#include <dm.h>
#include <syscon.h>
#include <asm/arch-rockchip/clock.h>
diff --git a/arch/arm/mach-rockchip/rv1126/Kconfig b/arch/arm/mach-rockchip/rv1126/Kconfig
index 55b1112..330b7df 100644
--- a/arch/arm/mach-rockchip/rv1126/Kconfig
+++ b/arch/arm/mach-rockchip/rv1126/Kconfig
@@ -6,8 +6,8 @@
Neu2:
Neural Compute Module 2(Neu2) is a 96boards SoM-CB compute module
based on Rockchip RV1126 from Edgeble AI.
- Neu2 powered with Consumer grade (0 to +80 °C) RV1126 SoC.
- Neu2k powered with Industrial grade (-40 °C to +85 °C) RV1126K SoC.
+ Neu2 powered with Consumer grade (0 to +80 deg C) RV1126 SoC.
+ Neu2k powered with Industrial grade (-40 C to +85 deg C) RV1126K SoC.
Neu2-IO:
Neural Compute Module 2(Neu2) IO board is an industrial form factor
@@ -64,7 +64,7 @@
config TEXT_BASE
default 0x600000
-source board/edgeble/neural-compute-module-2/Kconfig
-source board/itead/sonoff-ihost/Kconfig
+source "board/edgeble/neural-compute-module-2/Kconfig"
+source "board/itead/sonoff-ihost/Kconfig"
endif
diff --git a/arch/arm/mach-rockchip/rv1126/clk_rv1126.c b/arch/arm/mach-rockchip/rv1126/clk_rv1126.c
index bd89027..3d64fcd 100644
--- a/arch/arm/mach-rockchip/rv1126/clk_rv1126.c
+++ b/arch/arm/mach-rockchip/rv1126/clk_rv1126.c
@@ -4,7 +4,6 @@
* Copyright (c) 2022 Edgeble AI Technologies Pvt. Ltd.
*/
-#include <common.h>
#include <dm.h>
#include <syscon.h>
#include <asm/arch-rockchip/clock.h>
diff --git a/arch/arm/mach-rockchip/rv1126/rv1126.c b/arch/arm/mach-rockchip/rv1126/rv1126.c
index 8589c46..1c10e9b 100644
--- a/arch/arm/mach-rockchip/rv1126/rv1126.c
+++ b/arch/arm/mach-rockchip/rv1126/rv1126.c
@@ -4,7 +4,6 @@
* Copyright (c) 2022 Edgeble AI Technologies Pvt. Ltd.
*/
-#include <common.h>
#include <asm/arch-rockchip/bootrom.h>
#include <asm/arch-rockchip/hardware.h>
#include <asm/arch-rockchip/grf_rv1126.h>
@@ -15,6 +14,7 @@
const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
[BROM_BOOTSOURCE_EMMC] = "/mmc@ffc50000",
+ [BROM_BOOTSOURCE_SPINOR] = "/spi@ffc90000/flash@0",
[BROM_BOOTSOURCE_SD] = "/mmc@ffc60000",
};
diff --git a/arch/arm/mach-rockchip/rv1126/syscon_rv1126.c b/arch/arm/mach-rockchip/rv1126/syscon_rv1126.c
index 599ea66..67d2f18 100644
--- a/arch/arm/mach-rockchip/rv1126/syscon_rv1126.c
+++ b/arch/arm/mach-rockchip/rv1126/syscon_rv1126.c
@@ -4,7 +4,6 @@
* Copyright (c) 2022 Edgeble AI Technologies Pvt. Ltd.
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <syscon.h>
diff --git a/arch/arm/mach-rockchip/sdram.c b/arch/arm/mach-rockchip/sdram.c
index 0d9a0ae..1fb01e1 100644
--- a/arch/arm/mach-rockchip/sdram.c
+++ b/arch/arm/mach-rockchip/sdram.c
@@ -3,11 +3,12 @@
* Copyright (C) 2017 Rockchip Electronics Co., Ltd.
*/
-#include <common.h>
+#include <config.h>
#include <dm.h>
#include <init.h>
#include <log.h>
#include <ram.h>
+#include <asm/armv8/mmu.h>
#include <asm/global_data.h>
#include <asm/io.h>
#include <asm/arch-rockchip/sdram.h>
@@ -35,12 +36,271 @@
s64 reserve[8];
};
+#ifdef CONFIG_ARM64
+/* Tag size and offset */
+#define ATAGS_SIZE SZ_8K
+#define ATAGS_OFFSET (SZ_2M - ATAGS_SIZE)
+#define ATAGS_PHYS_BASE (CFG_SYS_SDRAM_BASE + ATAGS_OFFSET)
+#define ATAGS_PHYS_END (ATAGS_PHYS_BASE + ATAGS_SIZE)
+
+/* ATAGS memory structures */
+
+enum tag_magic {
+ ATAG_NONE,
+ ATAG_CORE = 0x54410001,
+ ATAG_SERIAL = 0x54410050,
+ ATAG_DDR_MEM = 0x54410052,
+ ATAG_MAX = 0x544100ff,
+};
+
+/*
+ * An ATAG contains the following data:
+ * - header
+ * u32 size // sizeof(header + tag data) / sizeof(u32)
+ * u32 magic
+ * - tag data
+ */
+
+struct tag_header {
+ u32 size;
+ u32 magic;
+} __packed;
+
+/*
+ * DDR_MEM tag bank is storing data this way:
+ * - address0
+ * - address1
+ * - [...]
+ * - addressX
+ * - size0
+ * - size1
+ * - [...]
+ * - sizeX
+ *
+ * with X being tag_ddr_mem.count - 1.
+ */
+struct tag_ddr_mem {
+ u32 count;
+ u32 version;
+ u64 bank[20];
+ u32 flags;
+ u32 data[2];
+ u32 hash;
+} __packed;
+
+static u32 js_hash(const void *buf, u32 len)
+{
+ u32 i, hash = 0x47C6A7E6;
+
+ if (!buf || !len)
+ return hash;
+
+ for (i = 0; i < len; i++)
+ hash ^= ((hash << 5) + ((const char *)buf)[i] + (hash >> 2));
+
+ return hash;
+}
+
+static int rockchip_dram_init_banksize(void)
+{
+ const struct tag_header *tag_h = NULL;
+ u32 *addr = (void *)ATAGS_PHYS_BASE;
+ struct tag_ddr_mem *ddr_info;
+ u32 calc_hash;
+ u8 i, j;
+
+ if (!IS_ENABLED(CONFIG_ROCKCHIP_RK3588) &&
+ !IS_ENABLED(CONFIG_ROCKCHIP_RK3568))
+ return -ENOTSUPP;
+
+ if (!IS_ENABLED(CONFIG_ROCKCHIP_EXTERNAL_TPL))
+ return -ENOTSUPP;
+
+ /* Find DDR_MEM tag */
+ while (addr < (u32 *)ATAGS_PHYS_END) {
+ tag_h = (const struct tag_header *)addr;
+
+ if (!tag_h->size) {
+ debug("End of ATAGS (0-size tag), no DDR_MEM found\n");
+ return -ENODATA;
+ }
+
+ if (tag_h->magic == ATAG_DDR_MEM)
+ break;
+
+ switch (tag_h->magic) {
+ case ATAG_NONE:
+ case ATAG_CORE:
+ case ATAG_SERIAL ... ATAG_MAX:
+ addr += tag_h->size;
+ continue;
+ default:
+ debug("Invalid magic (0x%08x) for ATAG at 0x%p\n",
+ tag_h->magic, addr);
+ return -EINVAL;
+ }
+ }
+
+ if (addr >= (u32 *)ATAGS_PHYS_END ||
+ (tag_h && (addr + tag_h->size > (u32 *)ATAGS_PHYS_END))) {
+ debug("End of ATAGS, no DDR_MEM found\n");
+ return -ENODATA;
+ }
+
+ /* Data is right after the magic member of the tag_header struct */
+ ddr_info = (struct tag_ddr_mem *)(&tag_h->magic + 1);
+ if (!ddr_info->count || ddr_info->count > CONFIG_NR_DRAM_BANKS) {
+ debug("Too many ATAG banks, got (%d) but max allowed (%d)\n",
+ ddr_info->count, CONFIG_NR_DRAM_BANKS);
+ return -ENOMEM;
+ }
+
+ if (!ddr_info->hash) {
+ debug("No hash for tag (0x%08x)\n", tag_h->magic);
+ } else {
+ calc_hash = js_hash(addr, sizeof(u32) * (tag_h->size - 1));
+
+ if (calc_hash != ddr_info->hash) {
+ debug("Incorrect hash for tag (0x%08x), got (0x%08x) expected (0x%08x)\n",
+ tag_h->magic, ddr_info->hash, calc_hash);
+ return -EINVAL;
+ }
+ }
+
+ /*
+ * Rockchip guaranteed DDR_MEM is ordered so no need to worry about
+ * bi_dram order.
+ */
+ for (i = 0, j = 0; i < ddr_info->count; i++, j++) {
+ phys_size_t size = ddr_info->bank[(i + ddr_info->count)];
+ phys_addr_t start_addr = ddr_info->bank[i];
+ struct mm_region *tmp_mem_map = mem_map;
+ phys_addr_t end_addr;
+
+ /*
+ * BL31 (TF-A) reserves the first 2MB but DDR_MEM tag may not
+ * have it, so force this space as reserved.
+ */
+ if (start_addr < SZ_2M) {
+ size -= SZ_2M - start_addr;
+ start_addr = SZ_2M;
+ }
+
+ /*
+ * Put holes for reserved memory areas from mem_map.
+ *
+ * Only check for at most one overlap with one reserved memory
+ * area.
+ */
+ while (tmp_mem_map->size) {
+ const phys_addr_t rsrv_start = tmp_mem_map->phys;
+ const phys_size_t rsrv_size = tmp_mem_map->size;
+ const phys_addr_t rsrv_end = rsrv_start + rsrv_size;
+
+ /*
+ * DRAM memories are expected by Arm to be marked as
+ * Normal Write-back cacheable, Inner shareable[1], so
+ * let's filter on that to put holes in non-DRAM areas.
+ *
+ * [1] https://developer.arm.com/documentation/102376/0200/Cacheability-and-shareability-attributes
+ */
+ const u64 dram_attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+ PTE_BLOCK_INNER_SHARE;
+ /*
+ * (AttrIndx | SH) in Lower Attributes of Block
+ * Descriptor[2].
+ * [2] https://developer.arm.com/documentation/102376/0200/Describing-memory-in-AArch64
+ */
+ const u64 attrs_mask = PMD_ATTRINDX_MASK | GENMASK(9, 8);
+
+ if ((tmp_mem_map->attrs & attrs_mask) == dram_attrs) {
+ tmp_mem_map++;
+ continue;
+ }
+
+ /*
+ * If the start of the DDR_MEM tag is in a reserved
+ * memory area, move start address and resize.
+ */
+ if (start_addr >= rsrv_start && start_addr < rsrv_end) {
+ if (rsrv_end - start_addr > size) {
+ debug("Would be negative memory size\n");
+ return -EINVAL;
+ }
+
+ size -= rsrv_end - start_addr;
+ start_addr = rsrv_end;
+ break;
+ }
+
+ if (start_addr < rsrv_start) {
+ end_addr = start_addr + size;
+
+ if (end_addr <= rsrv_start) {
+ tmp_mem_map++;
+ continue;
+ }
+
+ /*
+ * If the memory area overlaps a reserved memory
+ * area with start address outside of reserved
+ * memory area and...
+ *
+ * ... ends in the middle of reserved memory
+ * area, resize.
+ */
+ if (end_addr <= rsrv_end) {
+ size = rsrv_start - start_addr;
+ break;
+ }
+
+ /*
+ * ... ends after the reserved memory area,
+ * split the region in two, one for before the
+ * reserved memory area and one for after.
+ */
+ gd->bd->bi_dram[j].start = start_addr;
+ gd->bd->bi_dram[j].size = rsrv_start - start_addr;
+
+ j++;
+
+ size = end_addr - rsrv_end;
+ start_addr = rsrv_end;
+
+ break;
+ }
+
+ tmp_mem_map++;
+ }
+
+ if (j > CONFIG_NR_DRAM_BANKS) {
+ debug("Too many banks, max allowed (%d)\n",
+ CONFIG_NR_DRAM_BANKS);
+ return -ENOMEM;
+ }
+
+ gd->bd->bi_dram[j].start = start_addr;
+ gd->bd->bi_dram[j].size = size;
+ }
+
+ return 0;
+}
+#endif
+
int dram_init_banksize(void)
{
size_t ram_top = (unsigned long)(gd->ram_size + CFG_SYS_SDRAM_BASE);
size_t top = min((unsigned long)ram_top, (unsigned long)(gd->ram_top));
#ifdef CONFIG_ARM64
+ int ret = rockchip_dram_init_banksize();
+
+ if (!ret)
+ return ret;
+
+ debug("Couldn't use ATAG (%d) to detect DDR layout, falling back...\n",
+ ret);
+
/* Reserve 0x200000 for ATF bl31 */
gd->bd->bi_dram[0].start = 0x200000;
gd->bd->bi_dram[0].size = top - gd->bd->bi_dram[0].start;
diff --git a/arch/arm/mach-rockchip/spl-boot-order.c b/arch/arm/mach-rockchip/spl-boot-order.c
index 79c856d..3dce9b3 100644
--- a/arch/arm/mach-rockchip/spl-boot-order.c
+++ b/arch/arm/mach-rockchip/spl-boot-order.c
@@ -3,7 +3,6 @@
* (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
*/
-#include <common.h>
#include <dm.h>
#include <fdt_support.h>
#include <log.h>
@@ -29,7 +28,7 @@
* -ENOSYS, if the device matching the node can not be mapped onto a
* SPL boot device (e.g. the third MMC device)
* -1, for unspecified failures
- * a positive integer (from the BOOT_DEVICE_... family) on succes.
+ * a positive integer (from the BOOT_DEVICE_... family) on success.
*/
static int spl_node_to_boot_device(int node)
@@ -148,8 +147,8 @@
/* Try to map this back onto SPL boot devices */
boot_device = spl_node_to_boot_device(node);
if (boot_device < 0) {
- debug("%s: could not map node @%x to a boot-device\n",
- __func__, node);
+ debug("%s: could not map node %s to a boot-device\n",
+ __func__, conf);
continue;
}
diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c
index 1586a09..3ce7e79 100644
--- a/arch/arm/mach-rockchip/spl.c
+++ b/arch/arm/mach-rockchip/spl.c
@@ -32,18 +32,26 @@
const char *board_spl_was_booted_from(void)
{
- u32 bootdevice_brom_id = readl(BROM_BOOTSOURCE_ID_ADDR);
+ static u32 brom_bootsource_id_cache = BROM_BOOTSOURCE_UNKNOWN;
+ u32 bootdevice_brom_id;
const char *bootdevice_ofpath = NULL;
+ if (brom_bootsource_id_cache != BROM_BOOTSOURCE_UNKNOWN)
+ bootdevice_brom_id = brom_bootsource_id_cache;
+ else
+ bootdevice_brom_id = readl(BROM_BOOTSOURCE_ID_ADDR);
+
if (bootdevice_brom_id < ARRAY_SIZE(boot_devices))
bootdevice_ofpath = boot_devices[bootdevice_brom_id];
- if (bootdevice_ofpath)
+ if (bootdevice_ofpath) {
+ brom_bootsource_id_cache = bootdevice_brom_id;
debug("%s: brom_bootdevice_id %x maps to '%s'\n",
__func__, bootdevice_brom_id, bootdevice_ofpath);
- else
+ } else {
debug("%s: failed to resolve brom_bootdevice_id %x\n",
__func__, bootdevice_brom_id);
+ }
return bootdevice_ofpath;
}
diff --git a/arch/arm/mach-rockchip/tpl.c b/arch/arm/mach-rockchip/tpl.c
index 2c3e978..50f04f9 100644
--- a/arch/arm/mach-rockchip/tpl.c
+++ b/arch/arm/mach-rockchip/tpl.c
@@ -3,7 +3,6 @@
* (C) Copyright 2019 Rockchip Electronics Co., Ltd
*/
-#include <common.h>
#include <bootstage.h>
#include <debug_uart.h>
#include <dm.h>
diff --git a/arch/arm/mach-s5pc1xx/cache.c b/arch/arm/mach-s5pc1xx/cache.c
index b390bdf..f0aec7c 100644
--- a/arch/arm/mach-s5pc1xx/cache.c
+++ b/arch/arm/mach-s5pc1xx/cache.c
@@ -7,7 +7,6 @@
* based on arch/arm/cpu/armv7/omap3/cache.S
*/
-#include <common.h>
#include <cpu_func.h>
#include <asm/cache.h>
diff --git a/arch/arm/mach-s5pc1xx/clock.c b/arch/arm/mach-s5pc1xx/clock.c
index c90c341..b92ce11 100644
--- a/arch/arm/mach-s5pc1xx/clock.c
+++ b/arch/arm/mach-s5pc1xx/clock.c
@@ -5,7 +5,7 @@
* Heungjun Kim <riverful.kim@samsung.com>
*/
-#include <common.h>
+#include <config.h>
#include <asm/io.h>
#include <asm/arch/clock.h>
#include <asm/arch/clk.h>
diff --git a/arch/arm/mach-s5pc1xx/pinmux.c b/arch/arm/mach-s5pc1xx/pinmux.c
index 818d751..23b9252 100644
--- a/arch/arm/mach-s5pc1xx/pinmux.c
+++ b/arch/arm/mach-s5pc1xx/pinmux.c
@@ -6,7 +6,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <asm/arch/pinmux.h>
int exynos_pinmux_config(int peripheral, int flags)
diff --git a/arch/arm/mach-snapdragon/Kconfig b/arch/arm/mach-snapdragon/Kconfig
index 96e44e2..536960b 100644
--- a/arch/arm/mach-snapdragon/Kconfig
+++ b/arch/arm/mach-snapdragon/Kconfig
@@ -4,7 +4,12 @@
default "snapdragon"
config SYS_VENDOR
+ string "Snapdragon board vendor"
default "qualcomm"
+ help
+ Allows to specify vendor for the Snapdragon SoCs based boards.
+ Based on this option board/<CONFIG_SYS_VENDOR>/<CONFIG_SYS_BOARD>
+ will be used as the custom board directory.
config SYS_MALLOC_F_LEN
default 0x2000
@@ -19,12 +24,11 @@
default 0x80000000
config SYS_BOARD
- string "Qualcomm custom board"
+ string "Snapdragon SoCs based board"
help
- The Dragonboard 410c and 820c have additional board init
- code that isn't shared with other Qualcomm boards.
- Based on this option board/qualcomm/<CONFIG_SYS_BOARD> will
- be used.
+ Allows to specify the Snapdragon SoCs based board name.
+ Based on this option board/<CONFIG_SYS_VENDOR>/<CONFIG_SYS_BOARD>
+ will be used as the custom board directory.
config SYS_CONFIG_NAME
string "Board configuration name"
diff --git a/arch/arm/mach-snapdragon/Makefile b/arch/arm/mach-snapdragon/Makefile
index 857171e..7a4495c 100644
--- a/arch/arm/mach-snapdragon/Makefile
+++ b/arch/arm/mach-snapdragon/Makefile
@@ -3,3 +3,4 @@
# (C) Copyright 2015 Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
obj-y += board.o
+obj-$(CONFIG_OF_LIVE) += of_fixup.o
diff --git a/arch/arm/mach-snapdragon/board.c b/arch/arm/mach-snapdragon/board.c
index 6f762fc..3d5994c 100644
--- a/arch/arm/mach-snapdragon/board.c
+++ b/arch/arm/mach-snapdragon/board.c
@@ -16,6 +16,7 @@
#include <dm/pinctrl.h>
#include <dm/uclass-internal.h>
#include <dm/read.h>
+#include <power/regulator.h>
#include <env.h>
#include <init.h>
#include <linux/arm-smccc.h>
@@ -28,6 +29,8 @@
#include <usb.h>
#include <sort.h>
+#include "qcom-priv.h"
+
DECLARE_GLOBAL_DATA_PTR;
static struct mm_region rbx_mem_map[CONFIG_NR_DRAM_BANKS + 2] = { { 0 } };
@@ -159,7 +162,9 @@
int board_init(void)
{
+ regulators_enable_boot_on(false);
show_psci_version();
+ qcom_of_fixup_nodes();
qcom_board_init();
return 0;
}
diff --git a/arch/arm/mach-snapdragon/of_fixup.c b/arch/arm/mach-snapdragon/of_fixup.c
new file mode 100644
index 0000000..55368dd
--- /dev/null
+++ b/arch/arm/mach-snapdragon/of_fixup.c
@@ -0,0 +1,175 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * OF_LIVE devicetree fixup.
+ *
+ * This file implements runtime fixups for Qualcomm DT to improve
+ * compatibility with U-Boot. This includes adjusting the USB nodes
+ * to only use USB high-speed, as well as remapping volume buttons
+ * to behave as up/down for navigating U-Boot.
+ *
+ * We use OF_LIVE for this rather than early FDT fixup for a couple
+ * of reasons: it has a much nicer API, is most likely more efficient,
+ * and our changes are only applied to U-Boot. This allows us to use a
+ * DT designed for Linux, run U-Boot with a modified version, and then
+ * boot Linux with the original FDT.
+ *
+ * Copyright (c) 2024 Linaro Ltd.
+ * Author: Caleb Connolly <caleb.connolly@linaro.org>
+ */
+
+#define pr_fmt(fmt) "of_fixup: " fmt
+
+#include <dt-bindings/input/linux-event-codes.h>
+#include <dm/of_access.h>
+#include <dm/of.h>
+#include <fdt_support.h>
+#include <linux/errno.h>
+#include <stdlib.h>
+#include <time.h>
+
+/* U-Boot only supports USB high-speed mode on Qualcomm platforms with DWC3
+ * USB controllers. Rather than requiring source level DT changes, we fix up
+ * DT here. This improves compatibility with upstream DT and simplifies the
+ * porting process for new devices.
+ */
+static int fixup_qcom_dwc3(struct device_node *glue_np)
+{
+ struct device_node *dwc3;
+ int ret, len, hsphy_idx = 1;
+ const __be32 *phandles;
+ const char *second_phy_name;
+
+ debug("Fixing up %s\n", glue_np->name);
+
+ /* Tell the glue driver to configure the wrapper for high-speed only operation */
+ ret = of_write_prop(glue_np, "qcom,select-utmi-as-pipe-clk", 0, NULL);
+ if (ret) {
+ log_err("Failed to add property 'qcom,select-utmi-as-pipe-clk': %d\n", ret);
+ return ret;
+ }
+
+ /* Find the DWC3 node itself */
+ dwc3 = of_find_compatible_node(glue_np, NULL, "snps,dwc3");
+ if (!dwc3) {
+ log_err("Failed to find dwc3 node\n");
+ return -ENOENT;
+ }
+
+ phandles = of_get_property(dwc3, "phys", &len);
+ len /= sizeof(*phandles);
+ if (len == 1) {
+ log_debug("Only one phy, not a superspeed controller\n");
+ return 0;
+ }
+
+ /* Figure out if the superspeed phy is present and if so then which phy is it? */
+ ret = of_property_read_string_index(dwc3, "phy-names", 1, &second_phy_name);
+ if (ret == -ENODATA) {
+ log_debug("Only one phy, not a super-speed controller\n");
+ return 0;
+ } else if (ret) {
+ log_err("Failed to read second phy name: %d\n", ret);
+ return ret;
+ }
+
+ if (!strncmp("usb3-phy", second_phy_name, strlen("usb3-phy"))) {
+ log_debug("Second phy isn't superspeed (is '%s') assuming first phy is SS\n",
+ second_phy_name);
+ hsphy_idx = 0;
+ }
+
+ /* Overwrite the "phys" property to only contain the high-speed phy */
+ ret = of_write_prop(dwc3, "phys", sizeof(*phandles), phandles + hsphy_idx);
+ if (ret) {
+ log_err("Failed to overwrite 'phys' property: %d\n", ret);
+ return ret;
+ }
+
+ /* Overwrite "phy-names" to only contain a single entry */
+ ret = of_write_prop(dwc3, "phy-names", strlen("usb2-phy"), "usb2-phy");
+ if (ret) {
+ log_err("Failed to overwrite 'phy-names' property: %d\n", ret);
+ return ret;
+ }
+
+ ret = of_write_prop(dwc3, "maximum-speed", strlen("high-speed"), "high-speed");
+ if (ret) {
+ log_err("Failed to set 'maximum-speed' property: %d\n", ret);
+ return ret;
+ }
+
+ return 0;
+}
+
+static void fixup_usb_nodes(void)
+{
+ struct device_node *glue_np = NULL;
+ int ret;
+
+ while ((glue_np = of_find_compatible_node(glue_np, NULL, "qcom,dwc3"))) {
+ ret = fixup_qcom_dwc3(glue_np);
+ if (ret)
+ log_warning("Failed to fixup node %s: %d\n", glue_np->name, ret);
+ }
+}
+
+/* Remove all references to the rpmhpd device */
+static void fixup_power_domains(void)
+{
+ struct device_node *pd = NULL, *np = NULL;
+ struct property *prop;
+ const __be32 *val;
+
+ /* All Qualcomm platforms name the rpm(h)pd "power-controller" */
+ for_each_of_allnodes(pd) {
+ if (pd->name && !strcmp("power-controller", pd->name))
+ break;
+ }
+
+ /* Sanity check that this is indeed a power domain controller */
+ if (!of_find_property(pd, "#power-domain-cells", NULL)) {
+ log_err("Found power-controller but it doesn't have #power-domain-cells\n");
+ return;
+ }
+
+ /* Remove all references to the power domain controller */
+ for_each_of_allnodes(np) {
+ if (!(prop = of_find_property(np, "power-domains", NULL)))
+ continue;
+
+ val = prop->value;
+ if (val[0] == cpu_to_fdt32(pd->phandle))
+ of_remove_property(np, prop);
+ }
+}
+
+#define time_call(func, ...) \
+ do { \
+ u64 start = timer_get_us(); \
+ func(__VA_ARGS__); \
+ debug(#func " took %lluus\n", timer_get_us() - start); \
+ } while (0)
+
+void qcom_of_fixup_nodes(void)
+{
+ time_call(fixup_usb_nodes);
+ time_call(fixup_power_domains);
+}
+
+int ft_board_setup(void *blob, struct bd_info __maybe_unused *bd)
+{
+ struct fdt_header *fdt = blob;
+ int node;
+
+ /* We only want to do this fix-up for the RB1 board, quick return for all others */
+ if (!fdt_node_check_compatible(fdt, 0, "qcom,qrb4210-rb2"))
+ return 0;
+
+ fdt_for_each_node_by_compatible(node, blob, 0, "snps,dwc3") {
+ log_debug("%s: Setting 'dr_mode' to OTG\n", fdt_get_name(blob, node, NULL));
+ fdt_setprop_string(fdt, node, "dr_mode", "otg");
+ break;
+ }
+
+ return 0;
+}
diff --git a/arch/arm/mach-snapdragon/qcom-priv.h b/arch/arm/mach-snapdragon/qcom-priv.h
new file mode 100644
index 0000000..0a7ed5e
--- /dev/null
+++ b/arch/arm/mach-snapdragon/qcom-priv.h
@@ -0,0 +1,20 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#ifndef __QCOM_PRIV_H__
+#define __QCOM_PRIV_H__
+
+#if CONFIG_IS_ENABLED(OF_LIVE)
+/**
+ * qcom_of_fixup_nodes() - Fixup Qualcomm DT nodes
+ *
+ * Adjusts nodes in the live tree to improve compatibility with U-Boot.
+ */
+void qcom_of_fixup_nodes(void);
+#else
+static inline void qcom_of_fixup_nodes(void)
+{
+ log_debug("Unable to dynamically fixup USB nodes, please enable CONFIG_OF_LIVE\n");
+}
+#endif /* OF_LIVE */
+
+#endif /* __QCOM_PRIV_H__ */
diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig
index 1008232..6b6a162 100644
--- a/arch/arm/mach-socfpga/Kconfig
+++ b/arch/arm/mach-socfpga/Kconfig
@@ -90,6 +90,14 @@
imply FPGA_SOCFPGA
imply SPL_USE_TINY_PRINTF
+config SOCFPGA_ARRIA10_ALWAYS_REPROGRAM
+ bool "Always reprogram Arria 10 FPGA"
+ depends on TARGET_SOCFPGA_ARRIA10
+ help
+ Arria 10 FPGA is only programmed during the cold boot.
+ This option forces the FPGA to be reprogrammed every reboot,
+ allowing to change the bitstream and apply it with warm reboot.
+
config TARGET_SOCFPGA_CYCLONE5
bool
select TARGET_SOCFPGA_GEN5
diff --git a/arch/arm/mach-socfpga/board.c b/arch/arm/mach-socfpga/board.c
index 616e1af..feaf5ce 100644
--- a/arch/arm/mach-socfpga/board.c
+++ b/arch/arm/mach-socfpga/board.c
@@ -5,7 +5,7 @@
* Copyright (C) 2015 Marek Vasut <marex@denx.de>
*/
-#include <common.h>
+#include <config.h>
#include <asm/arch/clock_manager.h>
#include <asm/arch/mailbox_s10.h>
#include <asm/arch/misc.h>
diff --git a/arch/arm/mach-socfpga/clock_manager.c b/arch/arm/mach-socfpga/clock_manager.c
index 9e645a4..160f6e7 100644
--- a/arch/arm/mach-socfpga/clock_manager.c
+++ b/arch/arm/mach-socfpga/clock_manager.c
@@ -3,7 +3,6 @@
* Copyright (C) 2013-2017 Altera Corporation <www.altera.com>
*/
-#include <common.h>
#include <asm/arch/clock_manager.h>
#include <asm/arch/system_manager.h>
#include <asm/global_data.h>
diff --git a/arch/arm/mach-socfpga/clock_manager_agilex.c b/arch/arm/mach-socfpga/clock_manager_agilex.c
index 28f593b..9987d5b 100644
--- a/arch/arm/mach-socfpga/clock_manager_agilex.c
+++ b/arch/arm/mach-socfpga/clock_manager_agilex.c
@@ -5,7 +5,6 @@
*/
#include <clk.h>
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <malloc.h>
diff --git a/arch/arm/mach-socfpga/clock_manager_agilex5.c b/arch/arm/mach-socfpga/clock_manager_agilex5.c
index b92f0b3..7ec28d9 100644
--- a/arch/arm/mach-socfpga/clock_manager_agilex5.c
+++ b/arch/arm/mach-socfpga/clock_manager_agilex5.c
@@ -16,7 +16,6 @@
#include <vsprintf.h>
#include <asm/global_data.h>
#include <asm/io.h>
-#include <asm/u-boot.h>
#include <linux/kernel.h>
#include <linux/string.h>
#include <linux/types.h>
diff --git a/arch/arm/mach-socfpga/clock_manager_arria10.c b/arch/arm/mach-socfpga/clock_manager_arria10.c
index 8ab18f6..58b9321 100644
--- a/arch/arm/mach-socfpga/clock_manager_arria10.c
+++ b/arch/arm/mach-socfpga/clock_manager_arria10.c
@@ -3,7 +3,6 @@
* Copyright (C) 2016-2017 Intel Corporation
*/
-#include <common.h>
#include <fdtdec.h>
#include <malloc.h>
#include <asm/io.h>
diff --git a/arch/arm/mach-socfpga/clock_manager_gen5.c b/arch/arm/mach-socfpga/clock_manager_gen5.c
index 8fa2760..154ad21 100644
--- a/arch/arm/mach-socfpga/clock_manager_gen5.c
+++ b/arch/arm/mach-socfpga/clock_manager_gen5.c
@@ -3,7 +3,6 @@
* Copyright (C) 2013-2017 Altera Corporation <www.altera.com>
*/
-#include <common.h>
#include <time.h>
#include <asm/io.h>
#include <dm.h>
diff --git a/arch/arm/mach-socfpga/clock_manager_n5x.c b/arch/arm/mach-socfpga/clock_manager_n5x.c
index 0ed480d..c4c0713 100644
--- a/arch/arm/mach-socfpga/clock_manager_n5x.c
+++ b/arch/arm/mach-socfpga/clock_manager_n5x.c
@@ -4,7 +4,6 @@
*
*/
-#include <common.h>
#include <asm/arch/clock_manager.h>
#include <asm/arch/system_manager.h>
#include <asm/global_data.h>
diff --git a/arch/arm/mach-socfpga/clock_manager_s10.c b/arch/arm/mach-socfpga/clock_manager_s10.c
index 4530033..1e14894 100644
--- a/arch/arm/mach-socfpga/clock_manager_s10.c
+++ b/arch/arm/mach-socfpga/clock_manager_s10.c
@@ -4,7 +4,7 @@
*
*/
-#include <common.h>
+#include <linux/errno.h>
#include <asm/global_data.h>
#include <asm/io.h>
#include <asm/arch/clock_manager.h>
diff --git a/arch/arm/mach-socfpga/firewall.c b/arch/arm/mach-socfpga/firewall.c
index 69229dc..4dec47b 100644
--- a/arch/arm/mach-socfpga/firewall.c
+++ b/arch/arm/mach-socfpga/firewall.c
@@ -4,8 +4,8 @@
*
*/
+#include <mach/base_addr_soc64.h>
#include <asm/io.h>
-#include <common.h>
#include <asm/arch/firewall.h>
#include <asm/arch/system_manager.h>
diff --git a/arch/arm/mach-socfpga/fpga_manager.c b/arch/arm/mach-socfpga/fpga_manager.c
index 18d692c..c946d4c 100644
--- a/arch/arm/mach-socfpga/fpga_manager.c
+++ b/arch/arm/mach-socfpga/fpga_manager.c
@@ -7,7 +7,7 @@
* platform code, the real meat is located in drivers/fpga/socfpga.c .
*/
-#include <common.h>
+#include <config.h>
#include <asm/io.h>
#include <linux/errno.h>
#include <asm/arch/fpga_manager.h>
diff --git a/arch/arm/mach-socfpga/freeze_controller.c b/arch/arm/mach-socfpga/freeze_controller.c
index 561d340..7c86350 100644
--- a/arch/arm/mach-socfpga/freeze_controller.c
+++ b/arch/arm/mach-socfpga/freeze_controller.c
@@ -4,7 +4,7 @@
*/
-#include <common.h>
+#include <config.h>
#include <asm/io.h>
#include <asm/arch/clock_manager.h>
#include <asm/arch/freeze_controller.h>
diff --git a/arch/arm/mach-socfpga/include/mach/clock_manager.h b/arch/arm/mach-socfpga/include/mach/clock_manager.h
index 6c9d32b..49f3fb2 100644
--- a/arch/arm/mach-socfpga/include/mach/clock_manager.h
+++ b/arch/arm/mach-socfpga/include/mach/clock_manager.h
@@ -6,6 +6,8 @@
#ifndef _CLOCK_MANAGER_H_
#define _CLOCK_MANAGER_H_
+#include <linux/types.h>
+
phys_addr_t socfpga_get_clkmgr_addr(void);
#ifndef __ASSEMBLY__
diff --git a/arch/arm/mach-socfpga/include/mach/secure_reg_helper.h b/arch/arm/mach-socfpga/include/mach/secure_reg_helper.h
index d5a1112..01335dc 100644
--- a/arch/arm/mach-socfpga/include/mach/secure_reg_helper.h
+++ b/arch/arm/mach-socfpga/include/mach/secure_reg_helper.h
@@ -7,6 +7,8 @@
#ifndef _SECURE_REG_HELPER_H_
#define _SECURE_REG_HELPER_H_
+#include <linux/types.h>
+
#define SOCFPGA_SECURE_REG_SYSMGR_SOC64_SDMMC 1
#define SOCFPGA_SECURE_REG_SYSMGR_SOC64_EMAC0 2
#define SOCFPGA_SECURE_REG_SYSMGR_SOC64_EMAC1 3
diff --git a/arch/arm/mach-socfpga/mailbox_s10.c b/arch/arm/mach-socfpga/mailbox_s10.c
index 101af23..4c86f1e 100644
--- a/arch/arm/mach-socfpga/mailbox_s10.c
+++ b/arch/arm/mach-socfpga/mailbox_s10.c
@@ -4,7 +4,6 @@
*
*/
-#include <common.h>
#include <asm/arch/clock_manager.h>
#include <asm/arch/mailbox_s10.h>
#include <asm/arch/system_manager.h>
diff --git a/arch/arm/mach-socfpga/misc.c b/arch/arm/mach-socfpga/misc.c
index 80ad087..495ba2a 100644
--- a/arch/arm/mach-socfpga/misc.c
+++ b/arch/arm/mach-socfpga/misc.c
@@ -3,7 +3,7 @@
* Copyright (C) 2012-2017 Altera Corporation <www.altera.com>
*/
-#include <common.h>
+#include <config.h>
#include <command.h>
#include <cpu_func.h>
#include <hang.h>
diff --git a/arch/arm/mach-socfpga/misc_arria10.c b/arch/arm/mach-socfpga/misc_arria10.c
index 93c9e8b..34c2131 100644
--- a/arch/arm/mach-socfpga/misc_arria10.c
+++ b/arch/arm/mach-socfpga/misc_arria10.c
@@ -4,7 +4,7 @@
*/
#include <altera.h>
-#include <common.h>
+#include <config.h>
#include <errno.h>
#include <fdtdec.h>
#include <init.h>
diff --git a/arch/arm/mach-socfpga/misc_gen5.c b/arch/arm/mach-socfpga/misc_gen5.c
index e7500c1..b898b6f 100644
--- a/arch/arm/mach-socfpga/misc_gen5.c
+++ b/arch/arm/mach-socfpga/misc_gen5.c
@@ -3,7 +3,7 @@
* Copyright (C) 2012-2017 Altera Corporation <www.altera.com>
*/
-#include <common.h>
+#include <config.h>
#include <cpu_func.h>
#include <init.h>
#include <asm/global_data.h>
diff --git a/arch/arm/mach-socfpga/misc_soc64.c b/arch/arm/mach-socfpga/misc_soc64.c
index 2acdfad..ad1ef0d 100644
--- a/arch/arm/mach-socfpga/misc_soc64.c
+++ b/arch/arm/mach-socfpga/misc_soc64.c
@@ -5,7 +5,6 @@
*/
#include <altera.h>
-#include <common.h>
#include <asm/arch/mailbox_s10.h>
#include <asm/arch/misc.h>
#include <asm/arch/reset_manager.h>
diff --git a/arch/arm/mach-socfpga/mmu-arm64_s10.c b/arch/arm/mach-socfpga/mmu-arm64_s10.c
index 91c6d7c..b8e40d9a 100644
--- a/arch/arm/mach-socfpga/mmu-arm64_s10.c
+++ b/arch/arm/mach-socfpga/mmu-arm64_s10.c
@@ -4,7 +4,6 @@
*
*/
-#include <common.h>
#include <asm/armv8/mmu.h>
#include <asm/global_data.h>
diff --git a/arch/arm/mach-socfpga/pinmux_arria10.c b/arch/arm/mach-socfpga/pinmux_arria10.c
index f378fce..c8074f4 100644
--- a/arch/arm/mach-socfpga/pinmux_arria10.c
+++ b/arch/arm/mach-socfpga/pinmux_arria10.c
@@ -4,9 +4,9 @@
*/
#include <log.h>
+#include <linux/errno.h>
#include <asm/arch/pinmux.h>
#include <asm/io.h>
-#include <common.h>
#include <fdtdec.h>
static int do_pinctr_pin(const void *blob, int child, const char *node_name)
diff --git a/arch/arm/mach-socfpga/reset_manager_arria10.c b/arch/arm/mach-socfpga/reset_manager_arria10.c
index 27c0308..da335f4 100644
--- a/arch/arm/mach-socfpga/reset_manager_arria10.c
+++ b/arch/arm/mach-socfpga/reset_manager_arria10.c
@@ -9,7 +9,6 @@
#include <asm/arch/misc.h>
#include <asm/arch/reset_manager.h>
#include <asm/arch/system_manager.h>
-#include <common.h>
#include <errno.h>
#include <fdtdec.h>
#include <wait_bit.h>
diff --git a/arch/arm/mach-socfpga/reset_manager_gen5.c b/arch/arm/mach-socfpga/reset_manager_gen5.c
index a65860e..9395122 100644
--- a/arch/arm/mach-socfpga/reset_manager_gen5.c
+++ b/arch/arm/mach-socfpga/reset_manager_gen5.c
@@ -4,7 +4,7 @@
*/
-#include <common.h>
+#include <mach/base_addr_ac5.h>
#include <asm/io.h>
#include <asm/arch/fpga_manager.h>
#include <asm/arch/reset_manager.h>
diff --git a/arch/arm/mach-socfpga/reset_manager_s10.c b/arch/arm/mach-socfpga/reset_manager_s10.c
index f47fec1..dd0383c 100644
--- a/arch/arm/mach-socfpga/reset_manager_s10.c
+++ b/arch/arm/mach-socfpga/reset_manager_s10.c
@@ -4,7 +4,6 @@
*
*/
-#include <common.h>
#include <hang.h>
#include <asm/global_data.h>
#include <asm/io.h>
diff --git a/arch/arm/mach-socfpga/scan_manager.c b/arch/arm/mach-socfpga/scan_manager.c
index 36d6880..f881152 100644
--- a/arch/arm/mach-socfpga/scan_manager.c
+++ b/arch/arm/mach-socfpga/scan_manager.c
@@ -3,7 +3,7 @@
* Copyright (C) 2013 Altera Corporation <www.altera.com>
*/
-#include <common.h>
+#include <config.h>
#include <errno.h>
#include <asm/io.h>
#include <asm/arch/freeze_controller.h>
diff --git a/arch/arm/mach-socfpga/secure_reg_helper.c b/arch/arm/mach-socfpga/secure_reg_helper.c
index 0d4f45f..802a966 100644
--- a/arch/arm/mach-socfpga/secure_reg_helper.c
+++ b/arch/arm/mach-socfpga/secure_reg_helper.c
@@ -4,7 +4,6 @@
*
*/
-#include <common.h>
#include <hang.h>
#include <asm/io.h>
#include <asm/system.h>
diff --git a/arch/arm/mach-socfpga/secure_vab.c b/arch/arm/mach-socfpga/secure_vab.c
index e2db588..4347bf6 100644
--- a/arch/arm/mach-socfpga/secure_vab.c
+++ b/arch/arm/mach-socfpga/secure_vab.c
@@ -8,7 +8,6 @@
#include <asm/arch/secure_vab.h>
#include <asm/arch/smc_api.h>
#include <asm/unaligned.h>
-#include <common.h>
#include <exports.h>
#include <linux/errno.h>
#include <linux/intel-smc.h>
diff --git a/arch/arm/mach-socfpga/smc_api.c b/arch/arm/mach-socfpga/smc_api.c
index 8ffc7a4..ebaa0b8 100644
--- a/arch/arm/mach-socfpga/smc_api.c
+++ b/arch/arm/mach-socfpga/smc_api.c
@@ -4,10 +4,11 @@
*
*/
-#include <common.h>
#include <asm/ptrace.h>
#include <asm/system.h>
+#include <linux/errno.h>
#include <linux/intel-smc.h>
+#include <linux/string.h>
int invoke_smc(u32 func_id, u64 *args, int arg_len, u64 *ret_arg, int ret_len)
{
diff --git a/arch/arm/mach-socfpga/spl_a10.c b/arch/arm/mach-socfpga/spl_a10.c
index 9edbbf4..c20376f 100644
--- a/arch/arm/mach-socfpga/spl_a10.c
+++ b/arch/arm/mach-socfpga/spl_a10.c
@@ -3,14 +3,13 @@
* Copyright (C) 2012-2021 Altera Corporation <www.altera.com>
*/
-#include <common.h>
+#include <config.h>
#include <cpu_func.h>
#include <hang.h>
#include <init.h>
#include <asm/global_data.h>
#include <asm/io.h>
#include <asm/pl310.h>
-#include <asm/u-boot.h>
#include <asm/utils.h>
#include <image.h>
#include <asm/arch/reset_manager.h>
@@ -122,7 +121,10 @@
arch_early_init_r();
/* If the full FPGA is already loaded, ie.from EPCQ, config fpga pins */
- if (is_fpgamgr_user_mode()) {
+ if ((IS_ENABLED(CONFIG_SOCFPGA_ARRIA10_ALWAYS_REPROGRAM) &&
+ is_regular_boot_valid()) ||
+ (!IS_ENABLED(CONFIG_SOCFPGA_ARRIA10_ALWAYS_REPROGRAM) &&
+ is_fpgamgr_user_mode())) {
ret = config_pins(gd->fdt_blob, "shared");
if (ret)
return;
@@ -130,7 +132,8 @@
ret = config_pins(gd->fdt_blob, "fpga");
if (ret)
return;
- } else if (!is_fpgamgr_early_user_mode()) {
+ } else if (IS_ENABLED(CONFIG_SOCFPGA_ARRIA10_ALWAYS_REPROGRAM) ||
+ !is_fpgamgr_early_user_mode()) {
/* Program IOSSM(early IO release) or full FPGA */
fpgamgr_program(buf, FPGA_BUFSIZ, 0);
diff --git a/arch/arm/mach-socfpga/spl_agilex.c b/arch/arm/mach-socfpga/spl_agilex.c
index ee5a9dc..52617a3 100644
--- a/arch/arm/mach-socfpga/spl_agilex.c
+++ b/arch/arm/mach-socfpga/spl_agilex.c
@@ -8,9 +8,7 @@
#include <log.h>
#include <asm/global_data.h>
#include <asm/io.h>
-#include <asm/u-boot.h>
#include <asm/utils.h>
-#include <common.h>
#include <hang.h>
#include <image.h>
#include <spl.h>
diff --git a/arch/arm/mach-socfpga/spl_gen5.c b/arch/arm/mach-socfpga/spl_gen5.c
index 287fbd1..df79cfe 100644
--- a/arch/arm/mach-socfpga/spl_gen5.c
+++ b/arch/arm/mach-socfpga/spl_gen5.c
@@ -3,13 +3,11 @@
* Copyright (C) 2012 Altera Corporation <www.altera.com>
*/
-#include <common.h>
#include <hang.h>
#include <init.h>
#include <log.h>
#include <asm/global_data.h>
#include <asm/io.h>
-#include <asm/u-boot.h>
#include <asm/utils.h>
#include <image.h>
#include <asm/arch/reset_manager.h>
diff --git a/arch/arm/mach-socfpga/spl_n5x.c b/arch/arm/mach-socfpga/spl_n5x.c
index d056871..5ff137e 100644
--- a/arch/arm/mach-socfpga/spl_n5x.c
+++ b/arch/arm/mach-socfpga/spl_n5x.c
@@ -4,7 +4,6 @@
*
*/
-#include <common.h>
#include <asm/arch/clock_manager.h>
#include <asm/arch/firewall.h>
#include <asm/arch/mailbox_s10.h>
@@ -13,7 +12,6 @@
#include <asm/arch/system_manager.h>
#include <asm/global_data.h>
#include <asm/io.h>
-#include <asm/u-boot.h>
#include <asm/utils.h>
#include <dm/uclass.h>
#include <hang.h>
diff --git a/arch/arm/mach-socfpga/spl_s10.c b/arch/arm/mach-socfpga/spl_s10.c
index c20e87c..53852cb 100644
--- a/arch/arm/mach-socfpga/spl_s10.c
+++ b/arch/arm/mach-socfpga/spl_s10.c
@@ -9,9 +9,7 @@
#include <log.h>
#include <asm/global_data.h>
#include <asm/io.h>
-#include <asm/u-boot.h>
#include <asm/utils.h>
-#include <common.h>
#include <debug_uart.h>
#include <image.h>
#include <spl.h>
diff --git a/arch/arm/mach-socfpga/spl_soc64.c b/arch/arm/mach-socfpga/spl_soc64.c
index ba6efc1..4fe67ea 100644
--- a/arch/arm/mach-socfpga/spl_soc64.c
+++ b/arch/arm/mach-socfpga/spl_soc64.c
@@ -4,7 +4,6 @@
*
*/
-#include <common.h>
#include <spl.h>
DECLARE_GLOBAL_DATA_PTR;
diff --git a/arch/arm/mach-socfpga/system_manager_gen5.c b/arch/arm/mach-socfpga/system_manager_gen5.c
index 09caebb..c377d1c 100644
--- a/arch/arm/mach-socfpga/system_manager_gen5.c
+++ b/arch/arm/mach-socfpga/system_manager_gen5.c
@@ -3,7 +3,6 @@
* Copyright (C) 2013-2017 Altera Corporation <www.altera.com>
*/
-#include <common.h>
#include <asm/io.h>
#include <asm/arch/system_manager.h>
#include <asm/arch/fpga_manager.h>
diff --git a/arch/arm/mach-socfpga/system_manager_soc64.c b/arch/arm/mach-socfpga/system_manager_soc64.c
index 958bb51..4b42158 100644
--- a/arch/arm/mach-socfpga/system_manager_soc64.c
+++ b/arch/arm/mach-socfpga/system_manager_soc64.c
@@ -8,7 +8,6 @@
#include <asm/arch/system_manager.h>
#include <asm/global_data.h>
#include <asm/io.h>
-#include <common.h>
DECLARE_GLOBAL_DATA_PTR;
diff --git a/arch/arm/mach-socfpga/timer.c b/arch/arm/mach-socfpga/timer.c
index d9e8c84..99de574 100644
--- a/arch/arm/mach-socfpga/timer.c
+++ b/arch/arm/mach-socfpga/timer.c
@@ -3,7 +3,7 @@
* Copyright (C) 2012 Altera Corporation <www.altera.com>
*/
-#include <common.h>
+#include <config.h>
#include <init.h>
#include <asm/io.h>
#include <asm/arch/timer.h>
diff --git a/arch/arm/mach-socfpga/timer_s10.c b/arch/arm/mach-socfpga/timer_s10.c
index 84b13ce..8093358 100644
--- a/arch/arm/mach-socfpga/timer_s10.c
+++ b/arch/arm/mach-socfpga/timer_s10.c
@@ -4,7 +4,6 @@
*
*/
-#include <common.h>
#include <init.h>
#include <div64.h>
#include <asm/io.h>
diff --git a/arch/arm/mach-socfpga/vab.c b/arch/arm/mach-socfpga/vab.c
index e146f2c..e74c71c 100644
--- a/arch/arm/mach-socfpga/vab.c
+++ b/arch/arm/mach-socfpga/vab.c
@@ -4,9 +4,9 @@
*
*/
+#include <vsprintf.h>
#include <asm/arch/secure_vab.h>
#include <command.h>
-#include <common.h>
#include <linux/ctype.h>
static int do_vab(struct cmd_tbl *cmdtp, int flag, int argc,
diff --git a/arch/arm/mach-socfpga/wrap_handoff_soc64.c b/arch/arm/mach-socfpga/wrap_handoff_soc64.c
index 6aa9bb2..92051d1 100644
--- a/arch/arm/mach-socfpga/wrap_handoff_soc64.c
+++ b/arch/arm/mach-socfpga/wrap_handoff_soc64.c
@@ -6,7 +6,6 @@
#include <asm/arch/handoff_soc64.h>
#include <asm/io.h>
-#include <common.h>
#include <errno.h>
#include "log.h"
diff --git a/arch/arm/mach-socfpga/wrap_iocsr_config.c b/arch/arm/mach-socfpga/wrap_iocsr_config.c
index ce86f04..43ce329 100644
--- a/arch/arm/mach-socfpga/wrap_iocsr_config.c
+++ b/arch/arm/mach-socfpga/wrap_iocsr_config.c
@@ -3,7 +3,7 @@
* Copyright (C) 2015 Marek Vasut <marex@denx.de>
*/
-#include <common.h>
+#include <config.h>
#include <errno.h>
#include <asm/arch/clock_manager.h>
diff --git a/arch/arm/mach-socfpga/wrap_pinmux_config.c b/arch/arm/mach-socfpga/wrap_pinmux_config.c
index 33ca14c..e494d2e 100644
--- a/arch/arm/mach-socfpga/wrap_pinmux_config.c
+++ b/arch/arm/mach-socfpga/wrap_pinmux_config.c
@@ -3,8 +3,9 @@
* Copyright (C) 2015 Marek Vasut <marex@denx.de>
*/
-#include <common.h>
#include <errno.h>
+#include <linux/kernel.h>
+#include <linux/types.h>
/* Board-specific header. */
#include <qts/pinmux_config.h>
diff --git a/arch/arm/mach-socfpga/wrap_pll_config.c b/arch/arm/mach-socfpga/wrap_pll_config.c
index 0c40ae9..e0d0f8f 100644
--- a/arch/arm/mach-socfpga/wrap_pll_config.c
+++ b/arch/arm/mach-socfpga/wrap_pll_config.c
@@ -3,7 +3,7 @@
* Copyright (C) 2015 Marek Vasut <marex@denx.de>
*/
-#include <common.h>
+#include <config.h>
#include <asm/arch/clock_manager.h>
#include <qts/pll_config.h>
diff --git a/arch/arm/mach-socfpga/wrap_pll_config_soc64.c b/arch/arm/mach-socfpga/wrap_pll_config_soc64.c
index 6a0d6b5..f135810 100644
--- a/arch/arm/mach-socfpga/wrap_pll_config_soc64.c
+++ b/arch/arm/mach-socfpga/wrap_pll_config_soc64.c
@@ -4,7 +4,6 @@
*
*/
-#include <common.h>
#include <asm/arch/clock_manager.h>
#include <asm/io.h>
#include <asm/arch/handoff_soc64.h>
diff --git a/arch/arm/mach-socfpga/wrap_sdram_config.c b/arch/arm/mach-socfpga/wrap_sdram_config.c
index cd3a0f6..8f3fbaf 100644
--- a/arch/arm/mach-socfpga/wrap_sdram_config.c
+++ b/arch/arm/mach-socfpga/wrap_sdram_config.c
@@ -3,8 +3,10 @@
* Copyright (C) 2015 Marek Vasut <marex@denx.de>
*/
-#include <common.h>
+#include <config.h>
#include <errno.h>
+#include <linux/types.h>
+#include <linux/kernel.h>
#include <asm/arch/sdram.h>
/* Board-specific header. */
diff --git a/arch/arm/mach-stm32/soc.c b/arch/arm/mach-stm32/soc.c
index 0bd8d7b..737e680 100644
--- a/arch/arm/mach-stm32/soc.c
+++ b/arch/arm/mach-stm32/soc.c
@@ -4,7 +4,6 @@
* Author(s): Patrice Chotard, <patrice.chotard@foss.st.com> for STMicroelectronics.
*/
-#include <common.h>
#include <init.h>
#include <asm/io.h>
#include <asm/armv7_mpu.h>
diff --git a/arch/arm/mach-stm32mp/boot_params.c b/arch/arm/mach-stm32mp/boot_params.c
index 158bf40..ebddf6a 100644
--- a/arch/arm/mach-stm32mp/boot_params.c
+++ b/arch/arm/mach-stm32mp/boot_params.c
@@ -5,7 +5,7 @@
#define LOG_CATEGORY LOGC_ARCH
-#include <common.h>
+#include <config.h>
#include <log.h>
#include <linux/libfdt.h>
#include <asm/arch/sys_proto.h>
diff --git a/arch/arm/mach-stm32mp/bsec.c b/arch/arm/mach-stm32mp/bsec.c
index 5b86901..9ba7a6c 100644
--- a/arch/arm/mach-stm32mp/bsec.c
+++ b/arch/arm/mach-stm32mp/bsec.c
@@ -5,7 +5,6 @@
#define LOG_CATEGORY UCLASS_MISC
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <log.h>
diff --git a/arch/arm/mach-stm32mp/cmd_stm32key.c b/arch/arm/mach-stm32mp/cmd_stm32key.c
index c7fe232..0cb3c7a 100644
--- a/arch/arm/mach-stm32mp/cmd_stm32key.c
+++ b/arch/arm/mach-stm32mp/cmd_stm32key.c
@@ -3,7 +3,6 @@
* Copyright (C) 2019, STMicroelectronics - All Rights Reserved
*/
-#include <common.h>
#include <command.h>
#include <console.h>
#include <log.h>
diff --git a/arch/arm/mach-stm32mp/cmd_stm32prog/Kconfig b/arch/arm/mach-stm32mp/cmd_stm32prog/Kconfig
index 8f91db4..5892762 100644
--- a/arch/arm/mach-stm32mp/cmd_stm32prog/Kconfig
+++ b/arch/arm/mach-stm32mp/cmd_stm32prog/Kconfig
@@ -17,6 +17,7 @@
config CMD_STM32PROG_USB
bool "support stm32prog over USB"
depends on CMD_STM32PROG
+ depends on USB_GADGET_DOWNLOAD
default y
help
activate the command "stm32prog usb" for STM32MP soc family
diff --git a/arch/arm/mach-stm32mp/cmd_stm32prog/cmd_stm32prog.c b/arch/arm/mach-stm32mp/cmd_stm32prog/cmd_stm32prog.c
index adee6e0..967fa4e 100644
--- a/arch/arm/mach-stm32mp/cmd_stm32prog/cmd_stm32prog.c
+++ b/arch/arm/mach-stm32mp/cmd_stm32prog/cmd_stm32prog.c
@@ -3,7 +3,6 @@
* Copyright (C) 2020, STMicroelectronics - All Rights Reserved
*/
-#include <common.h>
#include <bootm.h>
#include <command.h>
#include <dfu.h>
diff --git a/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog_serial.c b/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog_serial.c
index 35bed31..07c5e04 100644
--- a/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog_serial.c
+++ b/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog_serial.c
@@ -3,12 +3,12 @@
* Copyright (C) 2020, STMicroelectronics - All Rights Reserved
*/
-#include <common.h>
#include <console.h>
#include <dm.h>
#include <dfu.h>
#include <malloc.h>
#include <serial.h>
+#include <time.h>
#include <watchdog.h>
#include <asm/arch/sys_proto.h>
#include <dm/lists.h>
diff --git a/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog_usb.c b/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog_usb.c
index d18455b..4b1ed50 100644
--- a/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog_usb.c
+++ b/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog_usb.c
@@ -3,7 +3,6 @@
* Copyright (C) 2020, STMicroelectronics - All Rights Reserved
*/
-#include <common.h>
#include <dfu.h>
#include <g_dnl.h>
#include <usb.h>
diff --git a/arch/arm/mach-stm32mp/dram_init.c b/arch/arm/mach-stm32mp/dram_init.c
index fb1208f..78b12fc 100644
--- a/arch/arm/mach-stm32mp/dram_init.c
+++ b/arch/arm/mach-stm32mp/dram_init.c
@@ -5,7 +5,6 @@
#define LOG_CATEGORY LOGC_ARCH
-#include <common.h>
#include <dm.h>
#include <image.h>
#include <init.h>
diff --git a/arch/arm/mach-stm32mp/stm32mp1/Makefile b/arch/arm/mach-stm32mp/stm32mp1/Makefile
index 8571487..ebae50f 100644
--- a/arch/arm/mach-stm32mp/stm32mp1/Makefile
+++ b/arch/arm/mach-stm32mp/stm32mp1/Makefile
@@ -8,7 +8,6 @@
obj-$(CONFIG_STM32MP13X) += stm32mp13x.o
obj-$(CONFIG_STM32MP15X) += stm32mp15x.o
-obj-$(CONFIG_STM32_ECDSA_VERIFY) += ecdsa_romapi.o
ifdef CONFIG_SPL_BUILD
obj-y += spl.o
obj-y += tzc400.o
diff --git a/arch/arm/mach-stm32mp/stm32mp1/cpu.c b/arch/arm/mach-stm32mp/stm32mp1/cpu.c
index 524778f..478c3ef 100644
--- a/arch/arm/mach-stm32mp/stm32mp1/cpu.c
+++ b/arch/arm/mach-stm32mp/stm32mp1/cpu.c
@@ -5,7 +5,6 @@
#define LOG_CATEGORY LOGC_ARCH
-#include <common.h>
#include <clk.h>
#include <cpu_func.h>
#include <debug_uart.h>
diff --git a/arch/arm/mach-stm32mp/stm32mp1/fdt.c b/arch/arm/mach-stm32mp/stm32mp1/fdt.c
index d0b6c3c..e1e4dc0 100644
--- a/arch/arm/mach-stm32mp/stm32mp1/fdt.c
+++ b/arch/arm/mach-stm32mp/stm32mp1/fdt.c
@@ -5,11 +5,11 @@
#define LOG_CATEGORY LOGC_ARCH
-#include <common.h>
#include <fdtdec.h>
#include <fdt_support.h>
#include <log.h>
#include <tee.h>
+#include <mach/stm32.h>
#include <asm/arch/sys_proto.h>
#include <dt-bindings/pinctrl/stm32-pinfunc.h>
#include <linux/io.h>
diff --git a/arch/arm/mach-stm32mp/stm32mp1/psci.c b/arch/arm/mach-stm32mp/stm32mp1/psci.c
index 8cdeb0a..7772546 100644
--- a/arch/arm/mach-stm32mp/stm32mp1/psci.c
+++ b/arch/arm/mach-stm32mp/stm32mp1/psci.c
@@ -4,7 +4,6 @@
*/
#include <config.h>
-#include <common.h>
#include <asm/armv7.h>
#include <asm/cache.h>
#include <asm/gic.h>
@@ -13,6 +12,7 @@
#include <asm/secure.h>
#include <hang.h>
#include <linux/bitops.h>
+#include <linux/errno.h>
/* PWR */
#define PWR_CR3 0x0c
@@ -703,6 +703,8 @@
{
u32 saved_mcudivr, saved_pll3cr, saved_pll4cr, saved_mssckselr;
u32 gicd_addr = stm32mp_get_gicd_base_address();
+ u32 cpu = psci_get_cpu_id();
+ u32 sp = (u32)__secure_stack_end - (cpu << ARM_PSCI_STACK_SHIFT);
bool iwdg1_wake = false;
bool iwdg2_wake = false;
bool other_wake = false;
@@ -805,4 +807,16 @@
writel(SYSCFG_CMPENR_MPUEN, STM32_SYSCFG_BASE + SYSCFG_CMPENSETR);
clrbits_le32(STM32_SYSCFG_BASE + SYSCFG_CMPCR, SYSCFG_CMPCR_SW_CTRL);
+
+ /*
+ * The system has resumed successfully. Rewrite LR register stored
+ * on stack with 'ep' value, so that on return from this PSCI call,
+ * the code would jump to that 'ep' resume entry point code path
+ * instead of the previous 'lr' register content which (e.g. with
+ * Linux) points to resume failure code path.
+ *
+ * See arch/arm/cpu/armv7/psci.S _smc_psci: for the stack layout
+ * used here, SP-4 is PC, SP-8 is LR, SP-12 is R7, and so on.
+ */
+ writel(ep, sp - 8);
}
diff --git a/arch/arm/mach-stm32mp/stm32mp1/pwr_regulator.c b/arch/arm/mach-stm32mp/stm32mp1/pwr_regulator.c
index 846637a..79c4418 100644
--- a/arch/arm/mach-stm32mp/stm32mp1/pwr_regulator.c
+++ b/arch/arm/mach-stm32mp/stm32mp1/pwr_regulator.c
@@ -5,10 +5,10 @@
#define LOG_CATEGORY UCLASS_REGULATOR
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <syscon.h>
+#include <time.h>
#include <asm/io.h>
#include <dm/device_compat.h>
#include <dm/device-internal.h>
diff --git a/arch/arm/mach-stm32mp/stm32mp1/spl.c b/arch/arm/mach-stm32mp/stm32mp1/spl.c
index 6c79259..7a8fd31 100644
--- a/arch/arm/mach-stm32mp/stm32mp1/spl.c
+++ b/arch/arm/mach-stm32mp/stm32mp1/spl.c
@@ -5,7 +5,7 @@
#define LOG_CATEGORY LOGC_ARCH
-#include <common.h>
+#include <config.h>
#include <cpu_func.h>
#include <dm.h>
#include <hang.h>
diff --git a/arch/arm/mach-stm32mp/stm32mp1/stm32mp13x.c b/arch/arm/mach-stm32mp/stm32mp1/stm32mp13x.c
index 845d973..4a81106 100644
--- a/arch/arm/mach-stm32mp/stm32mp1/stm32mp13x.c
+++ b/arch/arm/mach-stm32mp/stm32mp1/stm32mp13x.c
@@ -5,7 +5,7 @@
#define LOG_CATEGORY LOGC_ARCH
-#include <common.h>
+#include <config.h>
#include <log.h>
#include <syscon.h>
#include <asm/io.h>
diff --git a/arch/arm/mach-stm32mp/stm32mp1/stm32mp15x.c b/arch/arm/mach-stm32mp/stm32mp1/stm32mp15x.c
index afc56b0..f096fe5 100644
--- a/arch/arm/mach-stm32mp/stm32mp1/stm32mp15x.c
+++ b/arch/arm/mach-stm32mp/stm32mp1/stm32mp15x.c
@@ -5,7 +5,6 @@
#define LOG_CATEGORY LOGC_ARCH
-#include <common.h>
#include <env.h>
#include <log.h>
#include <asm/io.h>
@@ -14,6 +13,7 @@
#include <asm/arch/sys_proto.h>
#include <dm/device.h>
#include <dm/uclass.h>
+#include <linux/bitfield.h>
/* RCC register */
#define RCC_TZCR (STM32_RCC_BASE + 0x00)
@@ -41,6 +41,9 @@
#define TZC_REGION_ID_ACCESS0 (STM32_TZC_BASE + 0x114)
#define TAMP_CR1 (STM32_TAMP_BASE + 0x00)
+#define TAMP_SMCR (STM32_TAMP_BASE + 0x20)
+#define TAMP_SMCR_BKPRWDPROT GENMASK(7, 0)
+#define TAMP_SMCR_BKPWDPROT GENMASK(23, 16)
#define PWR_CR1 (STM32_PWR_BASE + 0x00)
#define PWR_MCUCR (STM32_PWR_BASE + 0x14)
@@ -136,6 +139,18 @@
*/
writel(0x0, TAMP_CR1);
+ /*
+ * TAMP: Configure non-zero secure protection settings. This is
+ * checked by BootROM function 35ac on OTP-CLOSED device during
+ * CPU core 1 release from endless loop. If secure protection
+ * fields are zero, the core 1 is not released from endless
+ * loop on second SGI0.
+ */
+ clrsetbits_le32(TAMP_SMCR,
+ TAMP_SMCR_BKPRWDPROT | TAMP_SMCR_BKPWDPROT,
+ FIELD_PREP(TAMP_SMCR_BKPRWDPROT, 0x20) |
+ FIELD_PREP(TAMP_SMCR_BKPWDPROT, 0x20));
+
/* GPIOZ: deactivate the security */
writel(BIT(0), RCC_MP_AHB5ENSETR);
writel(0x0, GPIOZ_SECCFGR);
@@ -322,8 +337,23 @@
get_cpu_string_offsets(&type, &pkg, &rev);
- snprintf(name, SOC_NAME_SIZE, "STM32MP%s%s Rev.%s",
- soc_type[type], soc_pkg[pkg], soc_rev[rev]);
+ if (bsec_dbgswenable()) {
+ snprintf(name, SOC_NAME_SIZE, "STM32MP%s%s Rev.%s",
+ soc_type[type], soc_pkg[pkg], soc_rev[rev]);
+ } else {
+ /*
+ * SoC revision is only accessible via DBUMCU IDC register,
+ * which requires BSEC.DENABLE DBGSWENABLE bit to be set to
+ * make the register accessible, otherwise an access to the
+ * register triggers bus fault. As BSEC.DBGSWENABLE is zero
+ * in case of an OTP-CLOSED system, do NOT set DBGSWENABLE
+ * bit as this might open a brief window for timing attacks.
+ * Instead, report that this system is OTP-CLOSED and do not
+ * report any SoC revision to avoid confusing users.
+ */
+ snprintf(name, SOC_NAME_SIZE, "STM32MP%s%s SEC/C",
+ soc_type[type], soc_pkg[pkg]);
+ }
}
static void setup_soc_type_pkg_rev(void)
diff --git a/arch/arm/mach-stm32mp/syscon.c b/arch/arm/mach-stm32mp/syscon.c
index a2e351d..8bcbd97 100644
--- a/arch/arm/mach-stm32mp/syscon.c
+++ b/arch/arm/mach-stm32mp/syscon.c
@@ -3,7 +3,6 @@
* Copyright (C) 2018, STMicroelectronics - All Rights Reserved
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <syscon.h>
diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
index fe89aec..ddf9414 100644
--- a/arch/arm/mach-sunxi/Kconfig
+++ b/arch/arm/mach-sunxi/Kconfig
@@ -1078,7 +1078,7 @@
config SPL_SPI_SUNXI
bool "Support for SPI Flash on Allwinner SoCs in SPL"
- depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUNXI_H3_H5 || MACH_SUN50I || MACH_SUN8I_R40 || SUN50I_GEN_H6 || MACH_SUNIV
+ depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUNXI_H3_H5 || MACH_SUN50I || MACH_SUN8I_R40 || SUN50I_GEN_H6 || MACH_SUNIV || SUNXI_GEN_NCAT2
help
Enable support for SPI Flash. This option allows SPL to read from
sunxi SPI Flash. It uses the same method as the boot ROM, so does
diff --git a/arch/arm/mach-sunxi/Makefile b/arch/arm/mach-sunxi/Makefile
index 1d4c70e..3f83c02 100644
--- a/arch/arm/mach-sunxi/Makefile
+++ b/arch/arm/mach-sunxi/Makefile
@@ -7,7 +7,6 @@
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
obj-y += board.o
-obj-y += clock.o
obj-y += cpu_info.o
obj-y += dram_helpers.o
obj-$(CONFIG_SUN6I_PRCM) += prcm.o
@@ -31,6 +30,7 @@
endif
ifdef CONFIG_SPL_BUILD
+obj-y += clock.o
obj-$(CONFIG_MACH_SUNIV) += dram_suniv.o
obj-$(CONFIG_DRAM_SUN4I) += dram_sun4i.o
obj-$(CONFIG_DRAM_SUN6I) += dram_sun6i.o
diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c
index f4dbb2a..0140b07 100644
--- a/arch/arm/mach-sunxi/board.c
+++ b/arch/arm/mach-sunxi/board.c
@@ -458,10 +458,8 @@
{
sunxi_sram_init();
-#if defined CONFIG_MACH_SUN6I || defined CONFIG_MACH_SUN8I_H3
/* Enable non-secure access to some peripherals */
tzpc_init();
-#endif
clock_init();
timer_init();
diff --git a/arch/arm/mach-sunxi/clock.c b/arch/arm/mach-sunxi/clock.c
index b6c68c9..5e9fa0d 100644
--- a/arch/arm/mach-sunxi/clock.c
+++ b/arch/arm/mach-sunxi/clock.c
@@ -23,10 +23,8 @@
int clock_init(void)
{
-#ifdef CONFIG_SPL_BUILD
clock_init_safe();
gtbus_init();
-#endif
clock_init_uart();
clock_init_sec();
diff --git a/arch/arm/mach-sunxi/clock_sun4i.c b/arch/arm/mach-sunxi/clock_sun4i.c
index ac3b7a8..6458d06 100644
--- a/arch/arm/mach-sunxi/clock_sun4i.c
+++ b/arch/arm/mach-sunxi/clock_sun4i.c
@@ -43,7 +43,6 @@
setbits_le32(&ccm->pll6_cfg, 0x1 << CCM_PLL6_CTRL_SATA_EN_SHIFT);
#endif
}
-#endif
void clock_init_uart(void)
{
@@ -77,7 +76,6 @@
return 0;
}
-#ifdef CONFIG_SPL_BUILD
#define PLL1_CFG(N, K, M, P) ( 1 << CCM_PLL1_CFG_ENABLE_SHIFT | \
0 << CCM_PLL1_CFG_VCO_RST_SHIFT | \
8 << CCM_PLL1_CFG_VCO_BIAS_SHIFT | \
@@ -177,8 +175,9 @@
&ccm->cpu_ahb_apb0_cfg);
sdelay(20);
}
-#endif
+#endif /* CONFIG_SPL_BUILD */
+/* video, DRAM, PLL_PERIPH clocks */
void clock_set_pll3(unsigned int clk)
{
struct sunxi_ccm_reg * const ccm =
diff --git a/arch/arm/mach-sunxi/clock_sun50i_h6.c b/arch/arm/mach-sunxi/clock_sun50i_h6.c
index dac3663..cc2ee33 100644
--- a/arch/arm/mach-sunxi/clock_sun50i_h6.c
+++ b/arch/arm/mach-sunxi/clock_sun50i_h6.c
@@ -51,7 +51,6 @@
*/
writel(MBUS_CLK_SRC_PLL6X2 | MBUS_CLK_M(3), &ccm->mbus_cfg);
}
-#endif
void clock_init_uart(void)
{
@@ -73,7 +72,6 @@
1 << (RESET_SHIFT + CONFIG_CONS_INDEX - 1));
}
-#ifdef CONFIG_SPL_BUILD
void clock_set_pll1(unsigned int clk)
{
struct sunxi_ccm_reg * const ccm =
@@ -105,33 +103,6 @@
val |= CCM_CPU_AXI_MUX_PLL_CPUX;
writel(val, &ccm->cpu_axi_cfg);
}
-#endif
-
-unsigned int clock_get_pll6(void)
-{
- struct sunxi_ccm_reg *const ccm =
- (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
- uint32_t rval = readl(&ccm->pll6_cfg);
- int n = ((rval & CCM_PLL6_CTRL_N_MASK) >> CCM_PLL6_CTRL_N_SHIFT) + 1;
- int div2 = ((rval & CCM_PLL6_CTRL_DIV2_MASK) >>
- CCM_PLL6_CTRL_DIV2_SHIFT) + 1;
- int div1, m;
-
- if (IS_ENABLED(CONFIG_SUNXI_GEN_NCAT2)) {
- div1 = ((rval & CCM_PLL6_CTRL_P0_MASK) >>
- CCM_PLL6_CTRL_P0_SHIFT) + 1;
- m = 1;
- } else {
- div1 = ((rval & CCM_PLL6_CTRL_DIV1_MASK) >>
- CCM_PLL6_CTRL_DIV1_SHIFT) + 1;
- if (IS_ENABLED(CONFIG_MACH_SUN50I_H6))
- m = 4;
- else
- m = 2;
- }
-
- return 24000000U * n / m / div1 / div2;
-}
int clock_twi_onoff(int port, int state)
{
@@ -160,3 +131,31 @@
return 0;
}
+#endif /* CONFIG_SPL_BUILD */
+
+/* PLL_PERIPH0 clock, used by the MMC driver */
+unsigned int clock_get_pll6(void)
+{
+ struct sunxi_ccm_reg *const ccm =
+ (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
+ uint32_t rval = readl(&ccm->pll6_cfg);
+ int n = ((rval & CCM_PLL6_CTRL_N_MASK) >> CCM_PLL6_CTRL_N_SHIFT) + 1;
+ int div2 = ((rval & CCM_PLL6_CTRL_DIV2_MASK) >>
+ CCM_PLL6_CTRL_DIV2_SHIFT) + 1;
+ int div1, m;
+
+ if (IS_ENABLED(CONFIG_SUNXI_GEN_NCAT2)) {
+ div1 = ((rval & CCM_PLL6_CTRL_P0_MASK) >>
+ CCM_PLL6_CTRL_P0_SHIFT) + 1;
+ m = 1;
+ } else {
+ div1 = ((rval & CCM_PLL6_CTRL_DIV1_MASK) >>
+ CCM_PLL6_CTRL_DIV1_SHIFT) + 1;
+ if (IS_ENABLED(CONFIG_MACH_SUN50I_H6))
+ m = 4;
+ else
+ m = 2;
+ }
+
+ return 24000000U * n / m / div1 / div2;
+}
diff --git a/arch/arm/mach-sunxi/clock_sun6i.c b/arch/arm/mach-sunxi/clock_sun6i.c
index aad9df2..59f7e15 100644
--- a/arch/arm/mach-sunxi/clock_sun6i.c
+++ b/arch/arm/mach-sunxi/clock_sun6i.c
@@ -62,7 +62,6 @@
setbits_le32(&ccm->sata_clk_cfg, CCM_SATA_CTRL_ENABLE);
#endif
}
-#endif /* CONFIG_SPL_BUILD */
void clock_init_sec(void)
{
@@ -124,7 +123,6 @@
#endif
}
-#ifdef CONFIG_SPL_BUILD
void clock_set_pll1(unsigned int clk)
{
struct sunxi_ccm_reg * const ccm =
@@ -173,6 +171,7 @@
}
#endif /* CONFIG_SPL_BUILD */
+/* video, DRAM, PLL_PERIPH clocks */
void clock_set_pll3(unsigned int clk)
{
struct sunxi_ccm_reg * const ccm =
diff --git a/arch/arm/mach-sunxi/clock_sun8i_a83t.c b/arch/arm/mach-sunxi/clock_sun8i_a83t.c
index 198fe9d..9eeba08 100644
--- a/arch/arm/mach-sunxi/clock_sun8i_a83t.c
+++ b/arch/arm/mach-sunxi/clock_sun8i_a83t.c
@@ -46,7 +46,6 @@
/* timestamp */
writel(1, 0x01720000);
}
-#endif
void clock_init_uart(void)
{
@@ -70,7 +69,6 @@
CONFIG_CONS_INDEX - 1));
}
-#ifdef CONFIG_SPL_BUILD
void clock_set_pll1(unsigned int clk)
{
struct sunxi_ccm_reg * const ccm =
@@ -102,8 +100,9 @@
CPU_CLK_SRC_PLL1 << C1_CPUX_CLK_SRC_SHIFT,
&ccm->cpu_axi_cfg);
}
-#endif
+#endif /* CONFIG_SPL_BUILD */
+/* DRAM and PLL_PERIPH0 clock (used by the MMC driver) */
void clock_set_pll5(unsigned int clk)
{
struct sunxi_ccm_reg * const ccm =
diff --git a/arch/arm/mach-sunxi/clock_sun9i.c b/arch/arm/mach-sunxi/clock_sun9i.c
index edaff9a..5913e40 100644
--- a/arch/arm/mach-sunxi/clock_sun9i.c
+++ b/arch/arm/mach-sunxi/clock_sun9i.c
@@ -17,6 +17,52 @@
#ifdef CONFIG_SPL_BUILD
+static void clock_set_pll2(unsigned int clk)
+{
+ struct sunxi_ccm_reg * const ccm =
+ (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
+ const int p = 0;
+
+ /* Switch cluster 1 to 24MHz clock while changing PLL2 */
+ clrsetbits_le32(&ccm->cpu_clk_source, C1_CPUX_CLK_SRC_MASK,
+ C1_CPUX_CLK_SRC_OSC24M);
+
+ writel(CCM_PLL2_CTRL_EN | CCM_PLL2_CTRL_P(p) |
+ CCM_PLL2_CLOCK_TIME_2 | CCM_PLL2_CTRL_N(clk / 24000000),
+ &ccm->pll2_c1_cfg);
+
+ sdelay(2000);
+
+ /* Switch cluster 1 back to PLL2 */
+ clrsetbits_le32(&ccm->cpu_clk_source, C1_CPUX_CLK_SRC_MASK,
+ C1_CPUX_CLK_SRC_PLL2);
+}
+
+static void clock_set_pll4(unsigned int clk)
+{
+ struct sunxi_ccm_reg * const ccm =
+ (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
+
+ writel(CCM_PLL4_CTRL_EN | CCM_PLL4_CTRL_N(clk / 24000000),
+ &ccm->pll4_periph0_cfg);
+
+ sdelay(2000);
+}
+
+static void clock_set_pll12(unsigned int clk)
+{
+ struct sunxi_ccm_reg * const ccm =
+ (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
+
+ if (readl(&ccm->pll12_periph1_cfg) & CCM_PLL12_CTRL_EN)
+ return;
+
+ writel(CCM_PLL12_CTRL_EN | CCM_PLL12_CTRL_N(clk / 24000000),
+ &ccm->pll12_periph1_cfg);
+
+ sdelay(2000);
+}
+
void clock_init_safe(void)
{
struct sunxi_ccm_reg * const ccm =
@@ -63,7 +109,6 @@
/* set enable-bit in TSTAMP_CTRL_REG */
writel(1, 0x01720000);
}
-#endif
void clock_init_uart(void)
{
@@ -80,7 +125,6 @@
CONFIG_CONS_INDEX - 1));
}
-#ifdef CONFIG_SPL_BUILD
void clock_set_pll1(unsigned int clk)
{
struct sunxi_ccm_reg * const ccm =
@@ -108,27 +152,6 @@
C0_CPUX_CLK_SRC_PLL1);
}
-void clock_set_pll2(unsigned int clk)
-{
- struct sunxi_ccm_reg * const ccm =
- (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
- const int p = 0;
-
- /* Switch cluster 1 to 24MHz clock while changing PLL2 */
- clrsetbits_le32(&ccm->cpu_clk_source, C1_CPUX_CLK_SRC_MASK,
- C1_CPUX_CLK_SRC_OSC24M);
-
- writel(CCM_PLL2_CTRL_EN | CCM_PLL2_CTRL_P(p) |
- CCM_PLL2_CLOCK_TIME_2 | CCM_PLL2_CTRL_N(clk / 24000000),
- &ccm->pll2_c1_cfg);
-
- sdelay(2000);
-
- /* Switch cluster 1 back to PLL2 */
- clrsetbits_le32(&ccm->cpu_clk_source, C1_CPUX_CLK_SRC_MASK,
- C1_CPUX_CLK_SRC_PLL2);
-}
-
void clock_set_pll6(unsigned int clk)
{
struct sunxi_ccm_reg * const ccm =
@@ -143,32 +166,6 @@
sdelay(2000);
}
-void clock_set_pll12(unsigned int clk)
-{
- struct sunxi_ccm_reg * const ccm =
- (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
-
- if (readl(&ccm->pll12_periph1_cfg) & CCM_PLL12_CTRL_EN)
- return;
-
- writel(CCM_PLL12_CTRL_EN | CCM_PLL12_CTRL_N(clk / 24000000),
- &ccm->pll12_periph1_cfg);
-
- sdelay(2000);
-}
-
-
-void clock_set_pll4(unsigned int clk)
-{
- struct sunxi_ccm_reg * const ccm =
- (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
-
- writel(CCM_PLL4_CTRL_EN | CCM_PLL4_CTRL_N(clk / 24000000),
- &ccm->pll4_periph0_cfg);
-
- sdelay(2000);
-}
-#endif
int clock_twi_onoff(int port, int state)
{
@@ -193,7 +190,9 @@
return 0;
}
+#endif /* CONFIG_SPL_BUILD */
+/* PLL_PERIPH0 clock (used by the MMC driver) */
unsigned int clock_get_pll4_periph0(void)
{
struct sunxi_ccm_reg *const ccm =
diff --git a/arch/arm/mach-sunxi/dram_timings/ddr2_v3s.c b/arch/arm/mach-sunxi/dram_timings/ddr2_v3s.c
index 9077f86..3666ddd 100644
--- a/arch/arm/mach-sunxi/dram_timings/ddr2_v3s.c
+++ b/arch/arm/mach-sunxi/dram_timings/ddr2_v3s.c
@@ -1,4 +1,3 @@
-#include <common.h>
#include <asm/arch/dram.h>
#include <asm/arch/cpu.h>
diff --git a/arch/arm/mach-sunxi/dram_timings/ddr3_1333.c b/arch/arm/mach-sunxi/dram_timings/ddr3_1333.c
index 0471e8a..ceaafd6 100644
--- a/arch/arm/mach-sunxi/dram_timings/ddr3_1333.c
+++ b/arch/arm/mach-sunxi/dram_timings/ddr3_1333.c
@@ -1,4 +1,3 @@
-#include <common.h>
#include <asm/arch/dram.h>
#include <asm/arch/cpu.h>
diff --git a/arch/arm/mach-sunxi/dram_timings/h616_ddr3_1333.c b/arch/arm/mach-sunxi/dram_timings/h616_ddr3_1333.c
index 232b4fe..3faf8d5 100644
--- a/arch/arm/mach-sunxi/dram_timings/h616_ddr3_1333.c
+++ b/arch/arm/mach-sunxi/dram_timings/h616_ddr3_1333.c
@@ -11,7 +11,6 @@
* SPDX-License-Identifier: GPL-2.0+
*/
-#include <common.h>
#include <asm/arch/dram.h>
#include <asm/arch/cpu.h>
diff --git a/arch/arm/mach-sunxi/dram_timings/h616_lpddr3.c b/arch/arm/mach-sunxi/dram_timings/h616_lpddr3.c
index b6d6a68..ce2ffa7 100644
--- a/arch/arm/mach-sunxi/dram_timings/h616_lpddr3.c
+++ b/arch/arm/mach-sunxi/dram_timings/h616_lpddr3.c
@@ -11,7 +11,6 @@
* SPDX-License-Identifier: GPL-2.0+
*/
-#include <common.h>
#include <asm/arch/dram.h>
#include <asm/arch/cpu.h>
diff --git a/arch/arm/mach-sunxi/dram_timings/h616_lpddr4_2133.c b/arch/arm/mach-sunxi/dram_timings/h616_lpddr4_2133.c
index c11cb86..e6446b9 100644
--- a/arch/arm/mach-sunxi/dram_timings/h616_lpddr4_2133.c
+++ b/arch/arm/mach-sunxi/dram_timings/h616_lpddr4_2133.c
@@ -9,7 +9,6 @@
* SPDX-License-Identifier: GPL-2.0+
*/
-#include <common.h>
#include <asm/arch/dram.h>
#include <asm/arch/cpu.h>
diff --git a/arch/arm/mach-sunxi/dram_timings/h6_ddr3_1333.c b/arch/arm/mach-sunxi/dram_timings/h6_ddr3_1333.c
index 2136ca3..afe8e25 100644
--- a/arch/arm/mach-sunxi/dram_timings/h6_ddr3_1333.c
+++ b/arch/arm/mach-sunxi/dram_timings/h6_ddr3_1333.c
@@ -19,7 +19,6 @@
* SPDX-License-Identifier: GPL-2.0+
*/
-#include <common.h>
#include <asm/arch/dram.h>
#include <asm/arch/cpu.h>
diff --git a/arch/arm/mach-sunxi/dram_timings/h6_lpddr3.c b/arch/arm/mach-sunxi/dram_timings/h6_lpddr3.c
index 1000860..c243b57 100644
--- a/arch/arm/mach-sunxi/dram_timings/h6_lpddr3.c
+++ b/arch/arm/mach-sunxi/dram_timings/h6_lpddr3.c
@@ -6,7 +6,6 @@
* SPDX-License-Identifier: GPL-2.0+
*/
-#include <common.h>
#include <asm/arch/dram.h>
#include <asm/arch/cpu.h>
diff --git a/arch/arm/mach-sunxi/dram_timings/lpddr3_stock.c b/arch/arm/mach-sunxi/dram_timings/lpddr3_stock.c
index bd57e2f..bc47a46 100644
--- a/arch/arm/mach-sunxi/dram_timings/lpddr3_stock.c
+++ b/arch/arm/mach-sunxi/dram_timings/lpddr3_stock.c
@@ -1,4 +1,3 @@
-#include <common.h>
#include <asm/arch/dram.h>
#include <asm/arch/cpu.h>
diff --git a/arch/arm/mach-sunxi/spl_spi_sunxi.c b/arch/arm/mach-sunxi/spl_spi_sunxi.c
index 72faa71..7acb44f 100644
--- a/arch/arm/mach-sunxi/spl_spi_sunxi.c
+++ b/arch/arm/mach-sunxi/spl_spi_sunxi.c
@@ -72,18 +72,27 @@
#define SUN6I_CTL_ENABLE BIT(0)
#define SUN6I_CTL_MASTER BIT(1)
#define SUN6I_CTL_SRST BIT(31)
+#define SUN6I_TCR_SDM BIT(13)
#define SUN6I_TCR_XCH BIT(31)
/*****************************************************************************/
-#define CCM_AHB_GATING0 (0x01C20000 + 0x60)
-#define CCM_H6_SPI_BGR_REG (0x03001000 + 0x96c)
-#ifdef CONFIG_SUN50I_GEN_H6
-#define CCM_SPI0_CLK (0x03001000 + 0x940)
+#if IS_ENABLED(CONFIG_SUN50I_GEN_H6)
+#define CCM_BASE 0x03001000
+#elif IS_ENABLED(CONFIG_SUNXI_GEN_NCAT2)
+#define CCM_BASE 0x02001000
#else
-#define CCM_SPI0_CLK (0x01C20000 + 0xA0)
+#define CCM_BASE 0x01C20000
#endif
-#define SUN6I_BUS_SOFT_RST_REG0 (0x01C20000 + 0x2C0)
+
+#define CCM_AHB_GATING0 (CCM_BASE + 0x60)
+#define CCM_H6_SPI_BGR_REG (CCM_BASE + 0x96c)
+#if IS_ENABLED(CONFIG_SUN50I_GEN_H6) || IS_ENABLED(CONFIG_SUNXI_GEN_NCAT2)
+#define CCM_SPI0_CLK (CCM_BASE + 0x940)
+#else
+#define CCM_SPI0_CLK (CCM_BASE + 0xA0)
+#endif
+#define SUN6I_BUS_SOFT_RST_REG0 (CCM_BASE + 0x2C0)
#define AHB_RESET_SPI0_SHIFT 20
#define AHB_GATE_OFFSET_SPI0 20
@@ -101,17 +110,22 @@
*/
static void spi0_pinmux_setup(unsigned int pin_function)
{
- /* All chips use PC0 and PC2. */
- sunxi_gpio_set_cfgpin(SUNXI_GPC(0), pin_function);
+ /* All chips use PC2. And all chips use PC0, except R528/T113 */
+ if (!IS_ENABLED(CONFIG_MACH_SUN8I_R528))
+ sunxi_gpio_set_cfgpin(SUNXI_GPC(0), pin_function);
+
sunxi_gpio_set_cfgpin(SUNXI_GPC(2), pin_function);
- /* All chips except H6 and H616 use PC1. */
- if (!IS_ENABLED(CONFIG_SUN50I_GEN_H6))
+ /* All chips except H6/H616/R528/T113 use PC1. */
+ if (!IS_ENABLED(CONFIG_SUN50I_GEN_H6) &&
+ !IS_ENABLED(CONFIG_MACH_SUN8I_R528))
sunxi_gpio_set_cfgpin(SUNXI_GPC(1), pin_function);
- if (IS_ENABLED(CONFIG_MACH_SUN50I_H6))
+ if (IS_ENABLED(CONFIG_MACH_SUN50I_H6) ||
+ IS_ENABLED(CONFIG_MACH_SUN8I_R528))
sunxi_gpio_set_cfgpin(SUNXI_GPC(5), pin_function);
- if (IS_ENABLED(CONFIG_MACH_SUN50I_H616))
+ if (IS_ENABLED(CONFIG_MACH_SUN50I_H616) ||
+ IS_ENABLED(CONFIG_MACH_SUN8I_R528))
sunxi_gpio_set_cfgpin(SUNXI_GPC(4), pin_function);
/* Older generations use PC23 for CS, newer ones use PC3. */
@@ -125,7 +139,8 @@
static bool is_sun6i_gen_spi(void)
{
return IS_ENABLED(CONFIG_SUNXI_GEN_SUN6I) ||
- IS_ENABLED(CONFIG_SUN50I_GEN_H6);
+ IS_ENABLED(CONFIG_SUN50I_GEN_H6) ||
+ IS_ENABLED(CONFIG_SUNXI_GEN_NCAT2);
}
static uintptr_t spi0_base_address(void)
@@ -136,6 +151,9 @@
if (IS_ENABLED(CONFIG_SUN50I_GEN_H6))
return 0x05010000;
+ if (IS_ENABLED(CONFIG_SUNXI_GEN_NCAT2))
+ return 0x04025000;
+
if (!is_sun6i_gen_spi() ||
IS_ENABLED(CONFIG_MACH_SUNIV))
return 0x01C05000;
@@ -151,23 +169,30 @@
uintptr_t base = spi0_base_address();
/* Deassert SPI0 reset on SUN6I */
- if (IS_ENABLED(CONFIG_SUN50I_GEN_H6))
+ if (IS_ENABLED(CONFIG_SUN50I_GEN_H6) ||
+ IS_ENABLED(CONFIG_SUNXI_GEN_NCAT2))
setbits_le32(CCM_H6_SPI_BGR_REG, (1U << 16) | 0x1);
else if (is_sun6i_gen_spi())
setbits_le32(SUN6I_BUS_SOFT_RST_REG0,
(1 << AHB_RESET_SPI0_SHIFT));
/* Open the SPI0 gate */
- if (!IS_ENABLED(CONFIG_SUN50I_GEN_H6))
+ if (!IS_ENABLED(CONFIG_SUN50I_GEN_H6) &&
+ !IS_ENABLED(CONFIG_SUNXI_GEN_NCAT2))
setbits_le32(CCM_AHB_GATING0, (1 << AHB_GATE_OFFSET_SPI0));
if (IS_ENABLED(CONFIG_MACH_SUNIV)) {
/* Divide by 32, clock source is AHB clock 200MHz */
writel(SPI0_CLK_DIV_BY_32, base + SUN6I_SPI0_CCTL);
} else {
- /* Divide by 4 */
- writel(SPI0_CLK_DIV_BY_4, base + (is_sun6i_gen_spi() ?
- SUN6I_SPI0_CCTL : SUN4I_SPI0_CCTL));
+ /* New SoCs do not have a clock divider inside */
+ if (!IS_ENABLED(CONFIG_SUNXI_GEN_NCAT2)) {
+ /* Divide by 4 */
+ writel(SPI0_CLK_DIV_BY_4,
+ base + (is_sun6i_gen_spi() ? SUN6I_SPI0_CCTL :
+ SUN4I_SPI0_CCTL));
+ }
+
/* 24MHz from OSC24M */
writel((1 << 31), CCM_SPI0_CLK);
}
@@ -179,6 +204,14 @@
/* Wait for completion */
while (readl(base + SUN6I_SPI0_GCR) & SUN6I_CTL_SRST)
;
+
+ /*
+ * For new SoCs we should configure sample mode depending on
+ * input clock. As 24MHz from OSC24M is used, we could use
+ * normal sample mode by setting SDM bit in the TCR register
+ */
+ if (IS_ENABLED(CONFIG_SUNXI_GEN_NCAT2))
+ setbits_le32(base + SUN6I_SPI0_TCR, SUN6I_TCR_SDM);
} else {
/* Enable SPI in the master mode and reset FIFO */
setbits_le32(base + SUN4I_SPI0_CTL, SUN4I_CTL_MASTER |
@@ -205,11 +238,13 @@
writel(0, CCM_SPI0_CLK);
/* Close the SPI0 gate */
- if (!IS_ENABLED(CONFIG_SUN50I_GEN_H6))
+ if (!IS_ENABLED(CONFIG_SUN50I_GEN_H6) &&
+ !IS_ENABLED(CONFIG_SUNXI_GEN_NCAT2))
clrbits_le32(CCM_AHB_GATING0, (1 << AHB_GATE_OFFSET_SPI0));
/* Assert SPI0 reset on SUN6I */
- if (IS_ENABLED(CONFIG_SUN50I_GEN_H6))
+ if (IS_ENABLED(CONFIG_SUN50I_GEN_H6) ||
+ IS_ENABLED(CONFIG_SUNXI_GEN_NCAT2))
clrbits_le32(CCM_H6_SPI_BGR_REG, (1U << 16) | 0x1);
else if (is_sun6i_gen_spi())
clrbits_le32(SUN6I_BUS_SOFT_RST_REG0,
@@ -223,7 +258,8 @@
if (IS_ENABLED(CONFIG_MACH_SUN50I) ||
IS_ENABLED(CONFIG_SUN50I_GEN_H6))
pin_function = SUN50I_GPC_SPI0;
- else if (IS_ENABLED(CONFIG_MACH_SUNIV))
+ else if (IS_ENABLED(CONFIG_MACH_SUNIV) ||
+ IS_ENABLED(CONFIG_MACH_SUN8I_R528))
pin_function = SUNIV_GPC_SPI0;
spi0_pinmux_setup(pin_function);
diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
index 05e194d..0461289 100644
--- a/arch/arm/mach-tegra/Kconfig
+++ b/arch/arm/mach-tegra/Kconfig
@@ -219,6 +219,10 @@
config TEGRA_ENABLE_UARTD
bool "Use UARTD"
+config TEGRA_ENABLE_UARTE
+ bool "Use UARTE"
+ depends on TEGRA20 || TEGRA30
+
endchoice
config TEGRA_GPU
diff --git a/arch/arm/mach-tegra/ap.c b/arch/arm/mach-tegra/ap.c
index 532730f..1ea620e 100644
--- a/arch/arm/mach-tegra/ap.c
+++ b/arch/arm/mach-tegra/ap.c
@@ -6,7 +6,7 @@
/* Tegra AP (Application Processor) code */
-#include <common.h>
+#include <config.h>
#include <log.h>
#include <linux/bug.h>
#include <asm/io.h>
diff --git a/arch/arm/mach-tegra/arm64-mmu.c b/arch/arm/mach-tegra/arm64-mmu.c
index ea4eac3..4fbe47a 100644
--- a/arch/arm/mach-tegra/arm64-mmu.c
+++ b/arch/arm/mach-tegra/arm64-mmu.c
@@ -7,7 +7,6 @@
* Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved.
*/
-#include <common.h>
#include <asm/system.h>
#include <asm/armv8/mmu.h>
diff --git a/arch/arm/mach-tegra/board.c b/arch/arm/mach-tegra/board.c
index 327d70b..c382e04 100644
--- a/arch/arm/mach-tegra/board.c
+++ b/arch/arm/mach-tegra/board.c
@@ -4,7 +4,7 @@
* NVIDIA Corporation <www.nvidia.com>
*/
-#include <common.h>
+#include <config.h>
#include <cpu_func.h>
#include <dm.h>
#include <init.h>
diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c
index adea12c..479137e 100644
--- a/arch/arm/mach-tegra/board2.c
+++ b/arch/arm/mach-tegra/board2.c
@@ -4,7 +4,7 @@
* NVIDIA Corporation <www.nvidia.com>
*/
-#include <common.h>
+#include <config.h>
#include <dm.h>
#include <env.h>
#include <errno.h>
diff --git a/arch/arm/mach-tegra/cache.c b/arch/arm/mach-tegra/cache.c
index d706349..462364a 100644
--- a/arch/arm/mach-tegra/cache.c
+++ b/arch/arm/mach-tegra/cache.c
@@ -5,7 +5,6 @@
/* Tegra cache routines */
-#include <common.h>
#include <asm/io.h>
#include <asm/arch-tegra/ap.h>
#if IS_ENABLED(CONFIG_TEGRA_GP_PADCTRL)
diff --git a/arch/arm/mach-tegra/cboot.c b/arch/arm/mach-tegra/cboot.c
index 8f5bb2f..c12543d 100644
--- a/arch/arm/mach-tegra/cboot.c
+++ b/arch/arm/mach-tegra/cboot.c
@@ -3,7 +3,6 @@
* Copyright (c) 2016-2018, NVIDIA CORPORATION.
*/
-#include <common.h>
#include <env.h>
#include <fdt_support.h>
#include <fdtdec.h>
diff --git a/arch/arm/mach-tegra/clock.c b/arch/arm/mach-tegra/clock.c
index 575da2b..157e6c4 100644
--- a/arch/arm/mach-tegra/clock.c
+++ b/arch/arm/mach-tegra/clock.c
@@ -5,7 +5,6 @@
/* Tegra SoC common clock control functions */
-#include <common.h>
#include <div64.h>
#include <dm.h>
#include <errno.h>
diff --git a/arch/arm/mach-tegra/cmd_enterrcm.c b/arch/arm/mach-tegra/cmd_enterrcm.c
index 92ff6cb..8fa1207 100644
--- a/arch/arm/mach-tegra/cmd_enterrcm.c
+++ b/arch/arm/mach-tegra/cmd_enterrcm.c
@@ -24,7 +24,6 @@
* (C) Copyright 2004 Texas Insturments
*/
-#include <common.h>
#include <command.h>
#include <cpu_func.h>
#include <irq_func.h>
diff --git a/arch/arm/mach-tegra/cpu.c b/arch/arm/mach-tegra/cpu.c
index 59ca8ae..5f2a591 100644
--- a/arch/arm/mach-tegra/cpu.c
+++ b/arch/arm/mach-tegra/cpu.c
@@ -3,7 +3,6 @@
* Copyright (c) 2010-2019, NVIDIA CORPORATION. All rights reserved.
*/
-#include <common.h>
#include <log.h>
#include <asm/io.h>
#include <asm/arch/clock.h>
diff --git a/arch/arm/mach-tegra/crypto.c b/arch/arm/mach-tegra/crypto.c
index 893da35..49e6a45 100644
--- a/arch/arm/mach-tegra/crypto.c
+++ b/arch/arm/mach-tegra/crypto.c
@@ -4,7 +4,6 @@
* (C) Copyright 2010 - 2011 NVIDIA Corporation <www.nvidia.com>
*/
-#include <common.h>
#include <log.h>
#include <linux/errno.h>
#include <asm/arch-tegra/crypto.h>
diff --git a/arch/arm/mach-tegra/dt-setup.c b/arch/arm/mach-tegra/dt-setup.c
index c114947..f4ae602 100644
--- a/arch/arm/mach-tegra/dt-setup.c
+++ b/arch/arm/mach-tegra/dt-setup.c
@@ -3,7 +3,6 @@
* Copyright (c) 2010-2016, NVIDIA CORPORATION.
*/
-#include <common.h>
#include <fdtdec.h>
#include <stdlib.h>
#include <asm/arch-tegra/cboot.h>
diff --git a/arch/arm/mach-tegra/emc.c b/arch/arm/mach-tegra/emc.c
index 2eea14b..83fad35 100644
--- a/arch/arm/mach-tegra/emc.c
+++ b/arch/arm/mach-tegra/emc.c
@@ -3,7 +3,6 @@
* Copyright (c) 2011 The Chromium OS Authors.
*/
-#include <common.h>
#include <asm/global_data.h>
#include "emc.h"
#include <asm/io.h>
diff --git a/arch/arm/mach-tegra/fuse.c b/arch/arm/mach-tegra/fuse.c
index 83bd505..e9b5259 100644
--- a/arch/arm/mach-tegra/fuse.c
+++ b/arch/arm/mach-tegra/fuse.c
@@ -7,7 +7,6 @@
* Svyatoslav Ryhel <clamor95@gmail.com>
*/
-#include <common.h>
#include <linux/delay.h>
#include <asm/io.h>
diff --git a/arch/arm/mach-tegra/gpu.c b/arch/arm/mach-tegra/gpu.c
index 36538e7..2338175 100644
--- a/arch/arm/mach-tegra/gpu.c
+++ b/arch/arm/mach-tegra/gpu.c
@@ -5,7 +5,6 @@
/* Tegra vpr routines */
-#include <common.h>
#include <log.h>
#include <asm/io.h>
#include <asm/arch/tegra.h>
diff --git a/arch/arm/mach-tegra/ivc.c b/arch/arm/mach-tegra/ivc.c
index 66c1276..0445d5d 100644
--- a/arch/arm/mach-tegra/ivc.c
+++ b/arch/arm/mach-tegra/ivc.c
@@ -3,11 +3,11 @@
* Copyright (c) 2016, NVIDIA CORPORATION.
*/
-#include <common.h>
#include <cpu_func.h>
#include <asm/io.h>
#include <asm/arch-tegra/ivc.h>
#include <linux/bug.h>
+#include <linux/errno.h>
#include <linux/printk.h>
#define TEGRA_IVC_ALIGN 64
diff --git a/arch/arm/mach-tegra/pmc.c b/arch/arm/mach-tegra/pmc.c
index c4f5106..3f968d4 100644
--- a/arch/arm/mach-tegra/pmc.c
+++ b/arch/arm/mach-tegra/pmc.c
@@ -3,7 +3,6 @@
* Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved.
*/
-#include <common.h>
#include <cpu_func.h>
#include <log.h>
#include <asm/global_data.h>
diff --git a/arch/arm/mach-tegra/powergate.c b/arch/arm/mach-tegra/powergate.c
index 631bc04e..2a2f846 100644
--- a/arch/arm/mach-tegra/powergate.c
+++ b/arch/arm/mach-tegra/powergate.c
@@ -3,8 +3,8 @@
* Copyright (c) 2014-2019, NVIDIA CORPORATION. All rights reserved.
*/
-#include <common.h>
#include <errno.h>
+#include <time.h>
#include <linux/delay.h>
#include <asm/io.h>
diff --git a/arch/arm/mach-tegra/spl.c b/arch/arm/mach-tegra/spl.c
index ed897ef..5df0eb2 100644
--- a/arch/arm/mach-tegra/spl.c
+++ b/arch/arm/mach-tegra/spl.c
@@ -5,7 +5,6 @@
*
* Allen Martin <amartin@nvidia.com>
*/
-#include <common.h>
#include <debug_uart.h>
#include <log.h>
#include <spl.h>
diff --git a/arch/arm/mach-tegra/sys_info.c b/arch/arm/mach-tegra/sys_info.c
index 5ad586a..11b4048 100644
--- a/arch/arm/mach-tegra/sys_info.c
+++ b/arch/arm/mach-tegra/sys_info.c
@@ -4,7 +4,6 @@
* NVIDIA Corporation <www.nvidia.com>
*/
-#include <common.h>
#include <init.h>
#include <linux/ctype.h>
#if defined(CONFIG_TEGRA124) || defined(CONFIG_TEGRA30)
diff --git a/arch/arm/mach-tegra/tegra114/clock.c b/arch/arm/mach-tegra/tegra114/clock.c
index 2ee755b..d5cc8ac 100644
--- a/arch/arm/mach-tegra/tegra114/clock.c
+++ b/arch/arm/mach-tegra/tegra114/clock.c
@@ -6,7 +6,6 @@
/* Tegra114 Clock control functions */
-#include <common.h>
#include <init.h>
#include <log.h>
#include <asm/io.h>
diff --git a/arch/arm/mach-tegra/tegra114/cpu.c b/arch/arm/mach-tegra/tegra114/cpu.c
index 7d8f080..3fe2d2d 100644
--- a/arch/arm/mach-tegra/tegra114/cpu.c
+++ b/arch/arm/mach-tegra/tegra114/cpu.c
@@ -4,7 +4,6 @@
* NVIDIA Corporation <www.nvidia.com>
*/
-#include <common.h>
#include <log.h>
#include <asm/io.h>
#include <asm/arch/clock.h>
diff --git a/arch/arm/mach-tegra/tegra124/clock.c b/arch/arm/mach-tegra/tegra124/clock.c
index ed8b6d9..4ac0c10 100644
--- a/arch/arm/mach-tegra/tegra124/clock.c
+++ b/arch/arm/mach-tegra/tegra124/clock.c
@@ -6,7 +6,7 @@
/* Tegra124 Clock control functions */
-#include <common.h>
+#include <config.h>
#include <init.h>
#include <log.h>
#include <asm/io.h>
diff --git a/arch/arm/mach-tegra/tegra124/cpu.c b/arch/arm/mach-tegra/tegra124/cpu.c
index b1bfe8f..07892ae 100644
--- a/arch/arm/mach-tegra/tegra124/cpu.c
+++ b/arch/arm/mach-tegra/tegra124/cpu.c
@@ -4,7 +4,6 @@
* NVIDIA Corporation <www.nvidia.com>
*/
-#include <common.h>
#include <log.h>
#include <asm/io.h>
#include <asm/arch/ahb.h>
diff --git a/arch/arm/mach-tegra/tegra124/pmc.c b/arch/arm/mach-tegra/tegra124/pmc.c
index 3921ffb..2294911 100644
--- a/arch/arm/mach-tegra/tegra124/pmc.c
+++ b/arch/arm/mach-tegra/tegra124/pmc.c
@@ -3,7 +3,6 @@
* Copyright (C) 2017 Google, Inc
*/
-#include <common.h>
#include <dm.h>
#include <syscon.h>
diff --git a/arch/arm/mach-tegra/tegra124/psci.c b/arch/arm/mach-tegra/tegra124/psci.c
index ab102a6..a50b681 100644
--- a/arch/arm/mach-tegra/tegra124/psci.c
+++ b/arch/arm/mach-tegra/tegra124/psci.c
@@ -4,7 +4,6 @@
* Author: Jan Kiszka <jan.kiszka@siemens.com>
*/
-#include <common.h>
#include <asm/io.h>
#include <asm/psci.h>
#include <asm/arch/flow.h>
diff --git a/arch/arm/mach-tegra/tegra124/xusb-padctl.c b/arch/arm/mach-tegra/tegra124/xusb-padctl.c
index 69736aa..1153444 100644
--- a/arch/arm/mach-tegra/tegra124/xusb-padctl.c
+++ b/arch/arm/mach-tegra/tegra124/xusb-padctl.c
@@ -5,9 +5,9 @@
#define pr_fmt(fmt) "tegra-xusb-padctl: " fmt
-#include <common.h>
#include <errno.h>
#include <log.h>
+#include <time.h>
#include <dm/of_access.h>
#include <dm/ofnode.h>
#include <linux/delay.h>
diff --git a/arch/arm/mach-tegra/tegra20/bct.c b/arch/arm/mach-tegra/tegra20/bct.c
index b2c44f3..e155b98 100644
--- a/arch/arm/mach-tegra/tegra20/bct.c
+++ b/arch/arm/mach-tegra/tegra20/bct.c
@@ -4,7 +4,6 @@
* Copyright (c) 2022, Svyatoslav Ryhel <clamor95@gmail.com>
*/
-#include <common.h>
#include <command.h>
#include <log.h>
#include <asm/arch-tegra/crypto.h>
diff --git a/arch/arm/mach-tegra/tegra20/clock.c b/arch/arm/mach-tegra/tegra20/clock.c
index 109b73b..6af20e9 100644
--- a/arch/arm/mach-tegra/tegra20/clock.c
+++ b/arch/arm/mach-tegra/tegra20/clock.c
@@ -7,7 +7,6 @@
/* Tegra20 Clock control functions */
-#include <common.h>
#include <errno.h>
#include <init.h>
#include <log.h>
diff --git a/arch/arm/mach-tegra/tegra20/cpu.c b/arch/arm/mach-tegra/tegra20/cpu.c
index e5b6059..1ba3930 100644
--- a/arch/arm/mach-tegra/tegra20/cpu.c
+++ b/arch/arm/mach-tegra/tegra20/cpu.c
@@ -3,7 +3,6 @@
* Copyright (c) 2010-2012, NVIDIA CORPORATION. All rights reserved.
*/
-#include <common.h>
#include <asm/io.h>
#include <asm/arch/tegra.h>
#include <asm/arch-tegra/pmc.h>
diff --git a/arch/arm/mach-tegra/tegra20/display.c b/arch/arm/mach-tegra/tegra20/display.c
index 4ba3fb2..207e50a 100644
--- a/arch/arm/mach-tegra/tegra20/display.c
+++ b/arch/arm/mach-tegra/tegra20/display.c
@@ -4,7 +4,6 @@
* NVIDIA Corporation <www.nvidia.com>
*/
-#include <common.h>
#include <asm/io.h>
#include <asm/arch/clock.h>
#include <asm/arch/tegra.h>
diff --git a/arch/arm/mach-tegra/tegra20/emc.c b/arch/arm/mach-tegra/tegra20/emc.c
index fb5e699..e2ee8f1 100644
--- a/arch/arm/mach-tegra/tegra20/emc.c
+++ b/arch/arm/mach-tegra/tegra20/emc.c
@@ -3,7 +3,7 @@
* Copyright (c) 2011 The Chromium OS Authors.
*/
-#include <common.h>
+#include <config.h>
#include <fdtdec.h>
#include <log.h>
#include <asm/io.h>
diff --git a/arch/arm/mach-tegra/tegra20/pmu.c b/arch/arm/mach-tegra/tegra20/pmu.c
index 05d0668..f2fe5d0 100644
--- a/arch/arm/mach-tegra/tegra20/pmu.c
+++ b/arch/arm/mach-tegra/tegra20/pmu.c
@@ -4,7 +4,6 @@
* (C) Copyright 2010,2011 NVIDIA Corporation <www.nvidia.com>
*/
-#include <common.h>
#include <i2c.h>
#include <log.h>
#include <tps6586x.h>
diff --git a/arch/arm/mach-tegra/tegra20/warmboot.c b/arch/arm/mach-tegra/tegra20/warmboot.c
index 5e3a9eb..18034c8 100644
--- a/arch/arm/mach-tegra/tegra20/warmboot.c
+++ b/arch/arm/mach-tegra/tegra20/warmboot.c
@@ -4,7 +4,6 @@
* NVIDIA Corporation <www.nvidia.com>
*/
-#include <common.h>
#include <asm/global_data.h>
#include <asm/io.h>
#include <linux/errno.h>
diff --git a/arch/arm/mach-tegra/tegra20/warmboot_avp.c b/arch/arm/mach-tegra/tegra20/warmboot_avp.c
index 94ce762..65bbe18 100644
--- a/arch/arm/mach-tegra/tegra20/warmboot_avp.c
+++ b/arch/arm/mach-tegra/tegra20/warmboot_avp.c
@@ -4,7 +4,7 @@
* NVIDIA Corporation <www.nvidia.com>
*/
-#include <common.h>
+#include <config.h>
#include <asm/io.h>
#include <asm/arch/clock.h>
#include <asm/arch/flow.h>
diff --git a/arch/arm/mach-tegra/tegra210/clock.c b/arch/arm/mach-tegra/tegra210/clock.c
index 74817e0..57ff0b2 100644
--- a/arch/arm/mach-tegra/tegra210/clock.c
+++ b/arch/arm/mach-tegra/tegra210/clock.c
@@ -6,10 +6,10 @@
/* Tegra210 Clock control functions */
-#include <common.h>
#include <errno.h>
#include <init.h>
#include <log.h>
+#include <time.h>
#include <asm/cache.h>
#include <asm/io.h>
#include <asm/arch/clock.h>
diff --git a/arch/arm/mach-tegra/tegra210/xusb-padctl.c b/arch/arm/mach-tegra/tegra210/xusb-padctl.c
index 30d0395..e409c28 100644
--- a/arch/arm/mach-tegra/tegra210/xusb-padctl.c
+++ b/arch/arm/mach-tegra/tegra210/xusb-padctl.c
@@ -5,9 +5,9 @@
#define pr_fmt(fmt) "tegra-xusb-padctl: " fmt
-#include <common.h>
#include <errno.h>
#include <log.h>
+#include <time.h>
#include <asm/global_data.h>
#include <dm/of_access.h>
#include <dm/ofnode.h>
diff --git a/arch/arm/mach-tegra/tegra30/bct.c b/arch/arm/mach-tegra/tegra30/bct.c
index cff1a3e..250009e 100644
--- a/arch/arm/mach-tegra/tegra30/bct.c
+++ b/arch/arm/mach-tegra/tegra30/bct.c
@@ -4,9 +4,9 @@
* Copyright (c) 2022, Svyatoslav Ryhel <clamor95@gmail.com>
*/
-#include <common.h>
#include <command.h>
#include <log.h>
+#include <vsprintf.h>
#include <asm/arch-tegra/crypto.h>
#include "bct.h"
#include "uboot_aes.h"
diff --git a/arch/arm/mach-tegra/tegra30/clock.c b/arch/arm/mach-tegra/tegra30/clock.c
index 0af8cde..7d61127 100644
--- a/arch/arm/mach-tegra/tegra30/clock.c
+++ b/arch/arm/mach-tegra/tegra30/clock.c
@@ -6,7 +6,6 @@
/* Tegra30 Clock control functions */
-#include <common.h>
#include <errno.h>
#include <init.h>
#include <log.h>
diff --git a/arch/arm/mach-tegra/tegra30/cpu.c b/arch/arm/mach-tegra/tegra30/cpu.c
index 60bbf13..51a9dea 100644
--- a/arch/arm/mach-tegra/tegra30/cpu.c
+++ b/arch/arm/mach-tegra/tegra30/cpu.c
@@ -3,7 +3,6 @@
* Copyright (c) 2010-2014, NVIDIA CORPORATION. All rights reserved.
*/
-#include <common.h>
#include <log.h>
#include <asm/io.h>
#include <asm/arch/clock.h>
diff --git a/arch/arm/mach-tegra/xusb-padctl-common.c b/arch/arm/mach-tegra/xusb-padctl-common.c
index 28fdebe..a3515d9 100644
--- a/arch/arm/mach-tegra/xusb-padctl-common.c
+++ b/arch/arm/mach-tegra/xusb-padctl-common.c
@@ -5,7 +5,6 @@
#define pr_fmt(fmt) "tegra-xusb-padctl: " fmt
-#include <common.h>
#include <errno.h>
#include <log.h>
#include <linux/printk.h>
diff --git a/arch/arm/mach-tegra/xusb-padctl-dummy.c b/arch/arm/mach-tegra/xusb-padctl-dummy.c
index f2d9030..1345b80 100644
--- a/arch/arm/mach-tegra/xusb-padctl-dummy.c
+++ b/arch/arm/mach-tegra/xusb-padctl-dummy.c
@@ -3,9 +3,9 @@
* Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved.
*/
-#include <common.h>
#include <errno.h>
+#include <linux/compiler.h>
#include <asm/arch-tegra/xusb-padctl.h>
struct tegra_xusb_phy * __weak tegra_xusb_phy_get(unsigned int type)
diff --git a/arch/arm/mach-u8500/cache.c b/arch/arm/mach-u8500/cache.c
index 05a9134..7541b56 100644
--- a/arch/arm/mach-u8500/cache.c
+++ b/arch/arm/mach-u8500/cache.c
@@ -3,7 +3,7 @@
* Copyright (C) 2019 Stephan Gerhold <stephan@gerhold.net>
*/
-#include <common.h>
+#include <config.h>
#include <cpu_func.h>
#include <asm/armv7.h>
#include <asm/cache.h>
diff --git a/arch/arm/mach-u8500/cpuinfo.c b/arch/arm/mach-u8500/cpuinfo.c
index ab05b8a..6d4c619 100644
--- a/arch/arm/mach-u8500/cpuinfo.c
+++ b/arch/arm/mach-u8500/cpuinfo.c
@@ -3,7 +3,6 @@
* Copyright (C) 2019 Stephan Gerhold <stephan@gerhold.net>
*/
-#include <common.h>
#include <init.h>
#include <asm/io.h>
diff --git a/arch/arm/mach-uniphier/dram_init.c b/arch/arm/mach-uniphier/dram_init.c
index 7f27531..0e1164a 100644
--- a/arch/arm/mach-uniphier/dram_init.c
+++ b/arch/arm/mach-uniphier/dram_init.c
@@ -12,7 +12,6 @@
#include <linux/printk.h>
#include <linux/sizes.h>
#include <asm/global_data.h>
-#include <asm/u-boot.h>
#include "init.h"
#include "sg-regs.h"
@@ -265,14 +264,15 @@
if (uniphier_get_soc_id() == UNIPHIER_LD20_ID)
gd->ram_size -= 64;
+ /* map all the DRAM regions */
+ uniphier_mem_map_init(gd->ram_base, prev_top - gd->ram_base);
+
return 0;
}
int dram_init_banksize(void)
{
struct uniphier_dram_map dram_map[3] = {};
- unsigned long base, top;
- bool valid_bank_found = false;
int ret, i;
ret = uniphier_dram_map_get(dram_map);
@@ -287,18 +287,7 @@
if (!dram_map[i].size)
continue;
-
- if (!valid_bank_found)
- base = dram_map[i].base;
- top = dram_map[i].base + dram_map[i].size;
- valid_bank_found = true;
}
- if (!valid_bank_found)
- return -EINVAL;
-
- /* map all the DRAM regions */
- uniphier_mem_map_init(base, top - base);
-
return 0;
}
diff --git a/arch/arm/mach-versal-net/clk.c b/arch/arm/mach-versal-net/clk.c
index d097de7..61b8fe7 100644
--- a/arch/arm/mach-versal-net/clk.c
+++ b/arch/arm/mach-versal-net/clk.c
@@ -6,7 +6,6 @@
* Michal Simek <michal.simek@amd.com>
*/
-#include <common.h>
#include <init.h>
#include <time.h>
#include <asm/global_data.h>
diff --git a/arch/arm/mach-versal-net/cpu.c b/arch/arm/mach-versal-net/cpu.c
index a82741e..d088e44 100644
--- a/arch/arm/mach-versal-net/cpu.c
+++ b/arch/arm/mach-versal-net/cpu.c
@@ -6,7 +6,6 @@
* Michal Simek <michal.simek@amd.com>
*/
-#include <common.h>
#include <init.h>
#include <asm/armv8/mmu.h>
#include <asm/cache.h>
diff --git a/arch/arm/mach-versal/clk.c b/arch/arm/mach-versal/clk.c
index 5e3f44c7..19943df 100644
--- a/arch/arm/mach-versal/clk.c
+++ b/arch/arm/mach-versal/clk.c
@@ -4,7 +4,6 @@
* Michal Simek <michal.simek@amd.com>
*/
-#include <common.h>
#include <init.h>
#include <time.h>
#include <asm/global_data.h>
diff --git a/arch/arm/mach-versal/cpu.c b/arch/arm/mach-versal/cpu.c
index e4dc305..363ce30 100644
--- a/arch/arm/mach-versal/cpu.c
+++ b/arch/arm/mach-versal/cpu.c
@@ -4,7 +4,6 @@
* Michal Simek <michal.simek@amd.com>
*/
-#include <common.h>
#include <init.h>
#include <asm/armv8/mmu.h>
#include <asm/cache.h>
diff --git a/arch/arm/mach-versal/mp.c b/arch/arm/mach-versal/mp.c
index 2487b48..921ca49 100644
--- a/arch/arm/mach-versal/mp.c
+++ b/arch/arm/mach-versal/mp.c
@@ -4,7 +4,8 @@
* Siva Durga Prasad Paladugu <siva.durga.prasad.paladugu@amd.com>
*/
-#include <common.h>
+#include <config.h>
+#include <linux/string.h>
#include <asm/io.h>
#include <asm/arch/hardware.h>
#include <asm/arch/sys_proto.h>
diff --git a/arch/arm/mach-versatile/Makefile b/arch/arm/mach-versatile/Makefile
deleted file mode 100644
index 858ca94..0000000
--- a/arch/arm/mach-versatile/Makefile
+++ /dev/null
@@ -1,7 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-
-obj-y = timer.o
-obj-y += reset.o
diff --git a/arch/arm/mach-versatile/reset.S b/arch/arm/mach-versatile/reset.S
deleted file mode 100644
index c7f1225..0000000
--- a/arch/arm/mach-versatile/reset.S
+++ /dev/null
@@ -1,28 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * armboot - Startup Code for ARM926EJS CPU-core
- *
- * Copyright (c) 2003 Texas Instruments
- *
- * ----- Adapted for OMAP1610 OMAP730 from ARM925t code ------
- *
- * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
- * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
- * Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
- * Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
- * Copyright (c) 2003 Kshitij <kshitij@ti.com>
- */
-
- .align 5
-.globl reset_cpu
-reset_cpu:
- ldr r1, rstctl1 /* get clkm1 reset ctl */
- mov r3, #0x0
- strh r3, [r1] /* clear it */
- mov r3, #0x8
- strh r3, [r1] /* force dsp+arm reset */
-_loop_forever:
- b _loop_forever
-
-rstctl1:
- .word 0xfffece10
diff --git a/arch/arm/mach-versatile/timer.c b/arch/arm/mach-versatile/timer.c
deleted file mode 100644
index b471412..0000000
--- a/arch/arm/mach-versatile/timer.c
+++ /dev/null
@@ -1,62 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * (C) Copyright 2003
- * Texas Instruments <www.ti.com>
- *
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Alex Zuepke <azu@sysgo.de>
- *
- * (C) Copyright 2002-2004
- * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
- *
- * (C) Copyright 2004
- * Philippe Robin, ARM Ltd. <philippe.robin@arm.com>
- */
-
-#include <common.h>
-
-#define TIMER_ENABLE (1 << 7)
-#define TIMER_MODE_MSK (1 << 6)
-#define TIMER_MODE_FR (0 << 6)
-#define TIMER_MODE_PD (1 << 6)
-
-#define TIMER_INT_EN (1 << 5)
-#define TIMER_PRS_MSK (3 << 2)
-#define TIMER_PRS_8S (1 << 3)
-#define TIMER_SIZE_MSK (1 << 2)
-#define TIMER_ONE_SHT (1 << 0)
-
-int timer_init (void)
-{
- ulong tmr_ctrl_val;
-
- /* 1st disable the Timer */
- tmr_ctrl_val = *(volatile ulong *)(CFG_SYS_TIMERBASE + 8);
- tmr_ctrl_val &= ~TIMER_ENABLE;
- *(volatile ulong *)(CFG_SYS_TIMERBASE + 8) = tmr_ctrl_val;
-
- /*
- * The Timer Control Register has one Undefined/Shouldn't Use Bit
- * So we should do read/modify/write Operation
- */
-
- /*
- * Timer Mode : Free Running
- * Interrupt : Disabled
- * Prescale : 8 Stage, Clk/256
- * Tmr Siz : 16 Bit Counter
- * Tmr in Wrapping Mode
- */
- tmr_ctrl_val = *(volatile ulong *)(CFG_SYS_TIMERBASE + 8);
- tmr_ctrl_val &= ~(TIMER_MODE_MSK | TIMER_INT_EN | TIMER_PRS_MSK | TIMER_SIZE_MSK | TIMER_ONE_SHT );
- tmr_ctrl_val |= (TIMER_ENABLE | TIMER_PRS_8S);
-
- *(volatile ulong *)(CFG_SYS_TIMERBASE + 8) = tmr_ctrl_val;
-
- return 0;
-}
diff --git a/arch/arm/mach-zynq/clk.c b/arch/arm/mach-zynq/clk.c
index 5e1ba8d..c1b018c 100644
--- a/arch/arm/mach-zynq/clk.c
+++ b/arch/arm/mach-zynq/clk.c
@@ -4,7 +4,6 @@
* Copyright (C) 2013 Xilinx, Inc. All rights reserved.
*/
#include <clk.h>
-#include <common.h>
#include <dm.h>
#include <init.h>
#include <malloc.h>
diff --git a/arch/arm/mach-zynq/cpu.c b/arch/arm/mach-zynq/cpu.c
index 3b6518c..c75e453 100644
--- a/arch/arm/mach-zynq/cpu.c
+++ b/arch/arm/mach-zynq/cpu.c
@@ -3,10 +3,11 @@
* Copyright (C) 2012 Michal Simek <monstr@monstr.eu>
* Copyright (C) 2012 Xilinx, Inc. All rights reserved.
*/
-#include <common.h>
+#include <config.h>
#include <cpu_func.h>
#include <init.h>
#include <zynqpl.h>
+#include <linux/errno.h>
#include <asm/cache.h>
#include <asm/io.h>
#include <asm/arch/clk.h>
diff --git a/arch/arm/mach-zynq/ddrc.c b/arch/arm/mach-zynq/ddrc.c
index 28988ef..b9a2eef 100644
--- a/arch/arm/mach-zynq/ddrc.c
+++ b/arch/arm/mach-zynq/ddrc.c
@@ -4,7 +4,7 @@
* Copyright (C) 2012 - 2017 Xilinx, Inc. All rights reserved.
*/
-#include <common.h>
+#include <linux/string.h>
#include <asm/io.h>
#include <asm/arch/sys_proto.h>
#include <asm/arch/hardware.h>
diff --git a/arch/arm/mach-zynq/slcr.c b/arch/arm/mach-zynq/slcr.c
index 5d9f4d2..ef877df 100644
--- a/arch/arm/mach-zynq/slcr.c
+++ b/arch/arm/mach-zynq/slcr.c
@@ -3,7 +3,6 @@
* Copyright (c) 2013 - 2017 Xilinx Inc.
*/
-#include <common.h>
#include <asm/io.h>
#include <malloc.h>
#include <asm/arch/hardware.h>
diff --git a/arch/arm/mach-zynq/spl.c b/arch/arm/mach-zynq/spl.c
index fea1c9b..8ef12ed 100644
--- a/arch/arm/mach-zynq/spl.c
+++ b/arch/arm/mach-zynq/spl.c
@@ -2,7 +2,6 @@
/*
* (C) Copyright 2014 - 2017 Xilinx, Inc. Michal Simek
*/
-#include <common.h>
#include <debug_uart.h>
#include <hang.h>
#include <image.h>
diff --git a/arch/arm/mach-zynqmp-r5/cpu.c b/arch/arm/mach-zynqmp-r5/cpu.c
index 0d36844..9a912dd 100644
--- a/arch/arm/mach-zynqmp-r5/cpu.c
+++ b/arch/arm/mach-zynqmp-r5/cpu.c
@@ -3,7 +3,6 @@
* Copyright (C) 2018 Xilinx, Inc. (Michal Simek)
*/
-#include <common.h>
#include <cpu_func.h>
#include <init.h>
#include <asm/armv7_mpu.h>
diff --git a/arch/arm/mach-zynqmp/Kconfig b/arch/arm/mach-zynqmp/Kconfig
index 6a7be0b..0d2238a 100644
--- a/arch/arm/mach-zynqmp/Kconfig
+++ b/arch/arm/mach-zynqmp/Kconfig
@@ -1,29 +1,5 @@
if ARCH_ZYNQMP
-config SPL_FS_FAT
- default y
-
-config SPL_LIBCOMMON_SUPPORT
- default y
-
-config SPL_LIBDISK_SUPPORT
- default y
-
-config SPL_LIBGENERIC_SUPPORT
- default y
-
-config SPL_MMC
- default y if MMC_SDHCI_ZYNQ
-
-config SPL_SERIAL
- default y
-
-config SPL_SPI_FLASH_SUPPORT
- default y if ZYNQ_QSPI
-
-config SPL_SPI
- default y if ZYNQ_QSPI
-
config SYS_BOARD
string "Board name"
default "zynqmp"
@@ -135,7 +111,8 @@
config SPL_ZYNQMP_PSU_INIT_ENABLED
bool "Include psu_init in SPL"
- default y if SPL
+ depends on SPL
+ default y
select BOARD_EARLY_INIT_F
help
Include psu_init by default in SPL.
diff --git a/arch/arm/mach-zynqmp/aes.c b/arch/arm/mach-zynqmp/aes.c
index 8a2b7fd..9a05fbf 100644
--- a/arch/arm/mach-zynqmp/aes.c
+++ b/arch/arm/mach-zynqmp/aes.c
@@ -7,9 +7,8 @@
* Christian Taedcke <christian.taedcke@weidmueller.com>
*/
-#include <common.h>
#include <mach/zynqmp_aes.h>
-
+#include <linux/errno.h>
#include <asm/arch/sys_proto.h>
#include <cpu_func.h>
#include <memalign.h>
diff --git a/arch/arm/mach-zynqmp/clk.c b/arch/arm/mach-zynqmp/clk.c
index 3b05f84..9b573b1 100644
--- a/arch/arm/mach-zynqmp/clk.c
+++ b/arch/arm/mach-zynqmp/clk.c
@@ -4,7 +4,6 @@
* Michal Simek <michal.simek@amd.com>
*/
-#include <common.h>
#include <init.h>
#include <time.h>
#include <asm/arch/clk.h>
diff --git a/arch/arm/mach-zynqmp/cpu.c b/arch/arm/mach-zynqmp/cpu.c
index 6ae2789..07668c9 100644
--- a/arch/arm/mach-zynqmp/cpu.c
+++ b/arch/arm/mach-zynqmp/cpu.c
@@ -4,9 +4,10 @@
* Michal Simek <michal.simek@amd.com>
*/
-#include <common.h>
#include <init.h>
#include <time.h>
+#include <linux/errno.h>
+#include <linux/types.h>
#include <asm/arch/hardware.h>
#include <asm/arch/sys_proto.h>
#include <asm/armv8/mmu.h>
diff --git a/arch/arm/mach-zynqmp/ecc_spl_init.c b/arch/arm/mach-zynqmp/ecc_spl_init.c
index f547d8e..1eef107 100644
--- a/arch/arm/mach-zynqmp/ecc_spl_init.c
+++ b/arch/arm/mach-zynqmp/ecc_spl_init.c
@@ -5,7 +5,6 @@
* Jorge Ramirez-Ortiz <jorge@foundries.io>
*/
-#include <common.h>
#include <cpu_func.h>
#include <asm/arch/hardware.h>
#include <asm/arch/ecc_spl_init.h>
diff --git a/arch/arm/mach-zynqmp/handoff.c b/arch/arm/mach-zynqmp/handoff.c
index dce9243..b007307 100644
--- a/arch/arm/mach-zynqmp/handoff.c
+++ b/arch/arm/mach-zynqmp/handoff.c
@@ -5,7 +5,6 @@
* Michal Simek <michal.simek@amd.com>
*/
-#include <common.h>
#include <asm/io.h>
#include <asm/arch/hardware.h>
#include <asm/arch/sys_proto.h>
diff --git a/arch/arm/mach-zynqmp/include/mach/zynqmp_aes.h b/arch/arm/mach-zynqmp/include/mach/zynqmp_aes.h
index 2a9cffb..01a13d4 100644
--- a/arch/arm/mach-zynqmp/include/mach/zynqmp_aes.h
+++ b/arch/arm/mach-zynqmp/include/mach/zynqmp_aes.h
@@ -9,6 +9,8 @@
#ifndef ZYNQMP_AES_H
#define ZYNQMP_AES_H
+#include <linux/types.h>
+
struct zynqmp_aes {
u64 srcaddr;
u64 ivaddr;
diff --git a/arch/arm/mach-zynqmp/mp.c b/arch/arm/mach-zynqmp/mp.c
index aff9054..9b46a25 100644
--- a/arch/arm/mach-zynqmp/mp.c
+++ b/arch/arm/mach-zynqmp/mp.c
@@ -4,14 +4,16 @@
* Michal Simek <michal.simek@amd.com>
*/
-#include <common.h>
+#include <config.h>
#include <cpu_func.h>
#include <log.h>
+#include <vsprintf.h>
#include <zynqmp_firmware.h>
#include <asm/arch/hardware.h>
#include <asm/arch/sys_proto.h>
#include <asm/io.h>
#include <linux/delay.h>
+#include <linux/string.h>
#define LOCK 0
#define SPLIT 1
diff --git a/arch/arm/mach-zynqmp/psu_spl_init.c b/arch/arm/mach-zynqmp/psu_spl_init.c
index b4d7f44..5b4d663 100644
--- a/arch/arm/mach-zynqmp/psu_spl_init.c
+++ b/arch/arm/mach-zynqmp/psu_spl_init.c
@@ -4,7 +4,6 @@
*
* Michal Simek <michal.simek@amd.com>
*/
-#include <common.h>
#include <asm/io.h>
#include <asm/arch/psu_init_gpl.h>
#include <linux/delay.h>
diff --git a/arch/arm/mach-zynqmp/spl.c b/arch/arm/mach-zynqmp/spl.c
index a0f35f3..6b67245 100644
--- a/arch/arm/mach-zynqmp/spl.c
+++ b/arch/arm/mach-zynqmp/spl.c
@@ -5,10 +5,10 @@
* Michal Simek <michal.simek@amd.com>
*/
-#include <common.h>
#include <image.h>
#include <init.h>
#include <log.h>
+#include <semihosting.h>
#include <spl.h>
#include <linux/delay.h>
@@ -66,6 +66,11 @@
}
#endif
+static u32 jtag_boot_device(void)
+{
+ return semihosting_enabled() ? BOOT_DEVICE_SMH : BOOT_DEVICE_RAM;
+}
+
void board_boot_order(u32 *spl_boot_list)
{
spl_boot_list[0] = spl_boot_device();
@@ -75,7 +80,7 @@
if (spl_boot_list[0] == BOOT_DEVICE_MMC2)
spl_boot_list[1] = BOOT_DEVICE_MMC1;
- spl_boot_list[2] = BOOT_DEVICE_RAM;
+ spl_boot_list[2] = jtag_boot_device();
}
u32 spl_boot_device(void)
@@ -85,19 +90,20 @@
#if defined(CONFIG_SPL_ZYNQMP_ALT_BOOTMODE_ENABLED)
/* Change default boot mode at run-time */
+ reg = CONFIG_SPL_ZYNQMP_ALT_BOOTMODE;
writel(CONFIG_SPL_ZYNQMP_ALT_BOOTMODE << BOOT_MODE_ALT_SHIFT,
&crlapb_base->boot_mode);
-#endif
-
+#else
reg = readl(&crlapb_base->boot_mode);
if (reg >> BOOT_MODE_ALT_SHIFT)
reg >>= BOOT_MODE_ALT_SHIFT;
+#endif
bootmode = reg & BOOT_MODES_MASK;
switch (bootmode) {
case JTAG_MODE:
- return BOOT_DEVICE_RAM;
+ return jtag_boot_device();
#ifdef CONFIG_SPL_MMC
case SD_MODE1:
case SD1_LSHFT_MODE: /* not working on silicon v1 */
diff --git a/arch/m68k/include/asm/global_data.h b/arch/m68k/include/asm/global_data.h
index c2ef577..93efc72 100644
--- a/arch/m68k/include/asm/global_data.h
+++ b/arch/m68k/include/asm/global_data.h
@@ -7,6 +7,8 @@
#ifndef __ASM_GBL_DATA_H
#define __ASM_GBL_DATA_H
+#include <asm/u-boot.h>
+
/* Architecture-specific global data */
struct arch_global_data {
#ifdef CONFIG_SYS_I2C_FSL
diff --git a/arch/m68k/lib/bdinfo.c b/arch/m68k/lib/bdinfo.c
index 3719f11..cf6ae5a 100644
--- a/arch/m68k/lib/bdinfo.c
+++ b/arch/m68k/lib/bdinfo.c
@@ -8,7 +8,6 @@
#include <config.h>
#include <init.h>
-#include <asm/u-boot.h>
#include <asm/global_data.h>
DECLARE_GLOBAL_DATA_PTR;
diff --git a/arch/microblaze/cpu/spl.c b/arch/microblaze/cpu/spl.c
index cb224bd..5217767 100644
--- a/arch/microblaze/cpu/spl.c
+++ b/arch/microblaze/cpu/spl.c
@@ -10,7 +10,6 @@
#include <log.h>
#include <spl.h>
#include <asm/io.h>
-#include <asm/u-boot.h>
#include <linux/stringify.h>
void board_boot_order(u32 *spl_boot_list)
diff --git a/arch/microblaze/include/asm/global_data.h b/arch/microblaze/include/asm/global_data.h
index 93506de..bb4112f 100644
--- a/arch/microblaze/include/asm/global_data.h
+++ b/arch/microblaze/include/asm/global_data.h
@@ -9,6 +9,7 @@
#define __ASM_GBL_DATA_H
#include <asm/cpuinfo.h>
+#include <asm/u-boot.h>
/* Architecture-specific global data */
struct arch_global_data {
diff --git a/arch/mips/include/asm/global_data.h b/arch/mips/include/asm/global_data.h
index 34b7e0b..147a95ec 100644
--- a/arch/mips/include/asm/global_data.h
+++ b/arch/mips/include/asm/global_data.h
@@ -9,6 +9,7 @@
#include <linux/types.h>
#include <asm/regdef.h>
+#include <asm/u-boot.h>
struct octeon_eeprom_mac_addr {
u8 mac_addr_base[6];
diff --git a/arch/mips/lib/traps.c b/arch/mips/lib/traps.c
index 40469d1..89846c9 100644
--- a/arch/mips/lib/traps.c
+++ b/arch/mips/lib/traps.c
@@ -20,7 +20,6 @@
#include <asm/mipsregs.h>
#include <asm/addrspace.h>
#include <asm/system.h>
-#include <asm/u-boot.h>
DECLARE_GLOBAL_DATA_PTR;
diff --git a/arch/mips/mach-mscc/include/mach/ddr.h b/arch/mips/mach-mscc/include/mach/ddr.h
index 3ba33d2..58c89d5 100644
--- a/arch/mips/mach-mscc/include/mach/ddr.h
+++ b/arch/mips/mach-mscc/include/mach/ddr.h
@@ -225,7 +225,7 @@
#define VC3_MPAR_FAW VC3_MPAR_tFAW
#define VC3_MPAR_BL 4
#define MSCC_MEMPARM_MR0 ((VC3_MPAR_RL - 4) << 4) | ((VC3_MPAR_tWR - 4) << 9)
-/* ODT_RTT: “0x0040” for 120ohm, and “0x0004” for 60ohm. */
+/* ODT_RTT: "0x0040" for 120ohm, and "0x0004" for 60ohm. */
#define MSCC_MEMPARM_MR1 0x0040
#define MSCC_MEMPARM_MR2 ((VC3_MPAR_WL - 5) << 3)
#define MSCC_MEMPARM_MR3 0
diff --git a/arch/mips/mach-mtmips/Kconfig b/arch/mips/mach-mtmips/Kconfig
index 15b2792..3fcd0b8 100644
--- a/arch/mips/mach-mtmips/Kconfig
+++ b/arch/mips/mach-mtmips/Kconfig
@@ -80,6 +80,7 @@
bool "MT7621"
select MIPS_CM
select MIPS_L2_CACHE
+ select MMC_SUPPORTS_TUNING
select SYS_CACHE_SHIFT_5
select SYS_MIPS_CACHE_INIT_RAM_LOAD
select PINCTRL_MT7621
diff --git a/arch/mips/mach-octeon/include/mach/cvmx-helper-pki.h b/arch/mips/mach-octeon/include/mach/cvmx-helper-pki.h
index ff32dab..25e2877 100644
--- a/arch/mips/mach-octeon/include/mach/cvmx-helper-pki.h
+++ b/arch/mips/mach-octeon/include/mach/cvmx-helper-pki.h
@@ -267,7 +267,7 @@
* buffer separate from the work queue entry. Words following the
* WQE in the same cache line will be zeroed, other lines in the
* buffer will not be modified and will retain stale data (from the
- * buffer’s previous use). This setting may decrease the peak PKI
+ * buffer's previous use). This setting may decrease the peak PKI
* performance by up to half on small packets.
*/
void cvmx_helper_pki_set_wqe_mode(int node, bool pkt_outside_wqe);
diff --git a/arch/mips/mach-octeon/include/mach/cvmx-pki.h b/arch/mips/mach-octeon/include/mach/cvmx-pki.h
index c1feb55..d918f79 100644
--- a/arch/mips/mach-octeon/include/mach/cvmx-pki.h
+++ b/arch/mips/mach-octeon/include/mach/cvmx-pki.h
@@ -110,8 +110,8 @@
* Controls how the PKI statistics counters are handled
* The PKI_STAT*_X registers can be indexed either by port kind (pkind), or
* final style. (Does not apply to the PKI_STAT_INB* registers.)
- * 0 = X represents the packet’s pkind
- * 1 = X represents the low 6-bits of packet’s final style
+ * 0 = X represents the packet's pkind
+ * 1 = X represents the low 6-bits of packet's final style
*/
enum cvmx_pki_stats_mode { CVMX_PKI_STAT_MODE_PKIND, CVMX_PKI_STAT_MODE_STYLE };
@@ -880,7 +880,7 @@
* buffer separate from the work queue entry. Words following the
* WQE in the same cache line will be zeroed, other lines in the
* buffer will not be modified and will retain stale data (from the
- * buffer’s previous use). This setting may decrease the peak PKI
+ * buffer's previous use). This setting may decrease the peak PKI
* performance by up to half on small packets.
*/
void cvmx_pki_set_wqe_mode(int node, u64 style, bool pkt_outside_wqe);
diff --git a/arch/mips/mach-octeon/include/mach/cvmx-pko3.h b/arch/mips/mach-octeon/include/mach/cvmx-pko3.h
index 86f89be..bda6072 100644
--- a/arch/mips/mach-octeon/include/mach/cvmx-pko3.h
+++ b/arch/mips/mach-octeon/include/mach/cvmx-pko3.h
@@ -366,7 +366,7 @@
*/
MEMALG_SETRSLT = 2, /* [DSZ] = B64; mem = PKO_MEM_RESULT_S. */
MEMALG_ADD = 8, /* mem = mem + PKO_SEND_MEM_S[OFFSET] */
- MEMALG_SUB = 9, /* mem = mem – PKO_SEND_MEM_S[OFFSET] */
+ MEMALG_SUB = 9, /* mem = mem - PKO_SEND_MEM_S[OFFSET] */
MEMALG_ADDLEN = 0xA, /* mem += [OFFSET] + PKO_SEND_HDR_S[TOTAL] */
MEMALG_SUBLEN = 0xB, /* mem -= [OFFSET] + PKO_SEND_HDR_S[TOTAL] */
MEMALG_ADDMBUF = 0xC, /* mem += [OFFSET] + mbufs_freed */
diff --git a/arch/nios2/cpu/cpu.c b/arch/nios2/cpu/cpu.c
index de7bfa9..792fa01 100644
--- a/arch/nios2/cpu/cpu.c
+++ b/arch/nios2/cpu/cpu.c
@@ -4,7 +4,7 @@
* Scott McNutt <smcnutt@psyent.com>
*/
-#include <common.h>
+#include <config.h>
#include <command.h>
#include <cpu.h>
#include <cpu_func.h>
diff --git a/arch/nios2/cpu/interrupts.c b/arch/nios2/cpu/interrupts.c
index 90cabb6..27093c4 100644
--- a/arch/nios2/cpu/interrupts.c
+++ b/arch/nios2/cpu/interrupts.c
@@ -7,7 +7,6 @@
* Scott McNutt <smcnutt@psyent.com>
*/
-#include <common.h>
#include <command.h>
#include <irq_func.h>
#include <asm/nios2.h>
diff --git a/arch/nios2/cpu/traps.c b/arch/nios2/cpu/traps.c
index 087a050..5969021 100644
--- a/arch/nios2/cpu/traps.c
+++ b/arch/nios2/cpu/traps.c
@@ -4,8 +4,8 @@
* Scott McNutt <smcnutt@psyent.com>
*/
-#include <common.h>
#include <hang.h>
+#include <stdio.h>
#include <asm/ptrace.h>
void trap_handler (struct pt_regs *regs)
diff --git a/arch/nios2/include/asm/global_data.h b/arch/nios2/include/asm/global_data.h
index b56e8a5..d9bbd54 100644
--- a/arch/nios2/include/asm/global_data.h
+++ b/arch/nios2/include/asm/global_data.h
@@ -7,6 +7,7 @@
#define __ASM_NIOS2_GLOBALDATA_H_
#include <linux/types.h>
+#include <asm/u-boot.h>
/* Architecture-specific global data */
struct arch_global_data {
diff --git a/arch/nios2/lib/bootm.c b/arch/nios2/lib/bootm.c
index 657a17c..ce939ff 100644
--- a/arch/nios2/lib/bootm.c
+++ b/arch/nios2/lib/bootm.c
@@ -4,7 +4,6 @@
* Scott McNutt <smcnutt@psyent.com>
*/
-#include <common.h>
#include <bootm.h>
#include <cpu_func.h>
#include <env.h>
diff --git a/arch/nios2/lib/cache.c b/arch/nios2/lib/cache.c
index 5864d8f..8f543f2 100644
--- a/arch/nios2/lib/cache.c
+++ b/arch/nios2/lib/cache.c
@@ -5,7 +5,6 @@
* Implemented by fredrik.markstrom@gmail.com and ivarholmqvist@gmail.com
*/
-#include <common.h>
#include <cpu_func.h>
#include <asm/cache.h>
#include <asm/global_data.h>
diff --git a/arch/powerpc/cpu/mpc83xx/cpu.c b/arch/powerpc/cpu/mpc83xx/cpu.c
index f6ffe29..e0be938 100644
--- a/arch/powerpc/cpu/mpc83xx/cpu.c
+++ b/arch/powerpc/cpu/mpc83xx/cpu.c
@@ -9,7 +9,6 @@
* Derived from the MPC8260 and MPC85xx.
*/
-#include <common.h>
#include <cpu_func.h>
#include <irq_func.h>
#include <net.h>
diff --git a/arch/powerpc/cpu/mpc83xx/ecc.c b/arch/powerpc/cpu/mpc83xx/ecc.c
index 3e24752..9ab5ea3 100644
--- a/arch/powerpc/cpu/mpc83xx/ecc.c
+++ b/arch/powerpc/cpu/mpc83xx/ecc.c
@@ -6,7 +6,6 @@
* based on the contribution of Marian Balakowicz <m8@semihalf.com>
*/
-#include <common.h>
#include <irq_func.h>
#include <mpc83xx.h>
#include <command.h>
diff --git a/arch/powerpc/cpu/mpc83xx/fdt.c b/arch/powerpc/cpu/mpc83xx/fdt.c
index 33b2151..1bd4f2b 100644
--- a/arch/powerpc/cpu/mpc83xx/fdt.c
+++ b/arch/powerpc/cpu/mpc83xx/fdt.c
@@ -6,7 +6,6 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
#include <clock_legacy.h>
#include <asm/global_data.h>
#include <linux/libfdt.h>
diff --git a/arch/powerpc/cpu/mpc83xx/interrupts.c b/arch/powerpc/cpu/mpc83xx/interrupts.c
index f948667..d86c981 100644
--- a/arch/powerpc/cpu/mpc83xx/interrupts.c
+++ b/arch/powerpc/cpu/mpc83xx/interrupts.c
@@ -6,7 +6,6 @@
* Copyright 2004 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <command.h>
#include <irq_func.h>
#include <mpc83xx.h>
diff --git a/arch/powerpc/cpu/mpc83xx/law.c b/arch/powerpc/cpu/mpc83xx/law.c
index 5e02f40..ae60be9 100644
--- a/arch/powerpc/cpu/mpc83xx/law.c
+++ b/arch/powerpc/cpu/mpc83xx/law.c
@@ -3,7 +3,6 @@
* Copyright 2011 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <log.h>
#include <asm/fsl_law.h>
#include <asm/mmu.h>
diff --git a/arch/powerpc/cpu/mpc83xx/pci.c b/arch/powerpc/cpu/mpc83xx/pci.c
index 65ef049..6f378c4 100644
--- a/arch/powerpc/cpu/mpc83xx/pci.c
+++ b/arch/powerpc/cpu/mpc83xx/pci.c
@@ -6,7 +6,6 @@
* with some bits from older board-specific PCI initialization.
*/
-#include <common.h>
#include <init.h>
#include <pci.h>
#include <asm/bitops.h>
diff --git a/arch/powerpc/cpu/mpc83xx/pcie.c b/arch/powerpc/cpu/mpc83xx/pcie.c
index 47ca74c5..efa30c6 100644
--- a/arch/powerpc/cpu/mpc83xx/pcie.c
+++ b/arch/powerpc/cpu/mpc83xx/pcie.c
@@ -7,7 +7,6 @@
* Anton Vorontsov <avorontsov@ru.mvista.com>
*/
-#include <common.h>
#include <clock_legacy.h>
#include <pci.h>
#include <mpc83xx.h>
diff --git a/arch/powerpc/cpu/mpc83xx/qe_io.c b/arch/powerpc/cpu/mpc83xx/qe_io.c
index 5236070..256dbfe 100644
--- a/arch/powerpc/cpu/mpc83xx/qe_io.c
+++ b/arch/powerpc/cpu/mpc83xx/qe_io.c
@@ -6,7 +6,6 @@
* based on source code of Shlomi Gridish
*/
-#include <common.h>
#include <linux/errno.h>
#include <asm/io.h>
#include <asm/immap_83xx.h>
diff --git a/arch/powerpc/cpu/mpc83xx/serdes.c b/arch/powerpc/cpu/mpc83xx/serdes.c
index d4848b2..d3ca244 100644
--- a/arch/powerpc/cpu/mpc83xx/serdes.c
+++ b/arch/powerpc/cpu/mpc83xx/serdes.c
@@ -9,7 +9,6 @@
*/
#include <config.h>
-#include <common.h>
#include <asm/io.h>
#include <asm/fsl_mpc83xx_serdes.h>
#include <linux/delay.h>
diff --git a/arch/powerpc/cpu/mpc83xx/spd_sdram.c b/arch/powerpc/cpu/mpc83xx/spd_sdram.c
index 6da8fc4..e847c03 100644
--- a/arch/powerpc/cpu/mpc83xx/spd_sdram.c
+++ b/arch/powerpc/cpu/mpc83xx/spd_sdram.c
@@ -12,7 +12,6 @@
#ifndef CONFIG_MPC83XX_SDRAM
-#include <common.h>
#include <cpu_func.h>
#include <log.h>
#include <time.h>
diff --git a/arch/powerpc/cpu/mpc83xx/speed.c b/arch/powerpc/cpu/mpc83xx/speed.c
index b7a87fe..7246496 100644
--- a/arch/powerpc/cpu/mpc83xx/speed.c
+++ b/arch/powerpc/cpu/mpc83xx/speed.c
@@ -8,7 +8,6 @@
#ifndef CONFIG_CLK_MPC83XX
-#include <common.h>
#include <clock_legacy.h>
#include <mpc83xx.h>
#include <command.h>
diff --git a/arch/powerpc/cpu/mpc83xx/spl_minimal.c b/arch/powerpc/cpu/mpc83xx/spl_minimal.c
index b55bfaf..7036e3f 100644
--- a/arch/powerpc/cpu/mpc83xx/spl_minimal.c
+++ b/arch/powerpc/cpu/mpc83xx/spl_minimal.c
@@ -3,7 +3,7 @@
* Copyright (C) 2004-2008 Freescale Semiconductor, Inc.
*/
-#include <common.h>
+#include <config.h>
#include <asm-offsets.h>
#include <clock_legacy.h>
#include <mpc83xx.h>
diff --git a/arch/powerpc/cpu/mpc83xx/traps.c b/arch/powerpc/cpu/mpc83xx/traps.c
index 94e6323..79ea1a9 100644
--- a/arch/powerpc/cpu/mpc83xx/traps.c
+++ b/arch/powerpc/cpu/mpc83xx/traps.c
@@ -11,7 +11,6 @@
* exceptions
*/
-#include <common.h>
#include <asm/global_data.h>
#include <asm/ptrace.h>
#include <command.h>
diff --git a/arch/powerpc/cpu/mpc85xx/b4860_ids.c b/arch/powerpc/cpu/mpc85xx/b4860_ids.c
index 013a171..df2f0ef 100644
--- a/arch/powerpc/cpu/mpc85xx/b4860_ids.c
+++ b/arch/powerpc/cpu/mpc85xx/b4860_ids.c
@@ -3,7 +3,8 @@
* Copyright 2012 Freescale Semiconductor, Inc.
*/
-#include <common.h>
+#include <config.h>
+#include <linux/kernel.h>
#include <asm/fsl_portals.h>
#include <asm/fsl_liodn.h>
diff --git a/arch/powerpc/cpu/mpc85xx/b4860_serdes.c b/arch/powerpc/cpu/mpc85xx/b4860_serdes.c
index 8e18e12..25fdb4b 100644
--- a/arch/powerpc/cpu/mpc85xx/b4860_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/b4860_serdes.c
@@ -3,7 +3,6 @@
* Copyright 2012 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <asm/fsl_serdes.h>
#include <asm/processor.h>
#include <asm/io.h>
diff --git a/arch/powerpc/cpu/mpc85xx/bsc9132_serdes.c b/arch/powerpc/cpu/mpc85xx/bsc9132_serdes.c
index 7921334..9ebb3d8 100644
--- a/arch/powerpc/cpu/mpc85xx/bsc9132_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/bsc9132_serdes.c
@@ -5,7 +5,6 @@
*/
#include <config.h>
-#include <common.h>
#include <log.h>
#include <asm/io.h>
#include <asm/immap_85xx.h>
diff --git a/arch/powerpc/cpu/mpc85xx/c29x_serdes.c b/arch/powerpc/cpu/mpc85xx/c29x_serdes.c
index e53dd43..bbe4a0d 100644
--- a/arch/powerpc/cpu/mpc85xx/c29x_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/c29x_serdes.c
@@ -4,7 +4,6 @@
*/
#include <config.h>
-#include <common.h>
#include <log.h>
#include <asm/io.h>
#include <asm/immap_85xx.h>
diff --git a/arch/powerpc/cpu/mpc85xx/cmd_errata.c b/arch/powerpc/cpu/mpc85xx/cmd_errata.c
index c7d473d..f91a4d4 100644
--- a/arch/powerpc/cpu/mpc85xx/cmd_errata.c
+++ b/arch/powerpc/cpu/mpc85xx/cmd_errata.c
@@ -3,7 +3,6 @@
* Copyright 2010-2011 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <command.h>
#include <init.h>
#include <linux/compiler.h>
diff --git a/arch/powerpc/cpu/mpc85xx/cpu.c b/arch/powerpc/cpu/mpc85xx/cpu.c
index e8a3e82..6356b02 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu.c
@@ -9,7 +9,6 @@
*/
#include <config.h>
-#include <common.h>
#include <cpu_func.h>
#include <clock_legacy.h>
#include <display_options.h>
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init_early.c b/arch/powerpc/cpu/mpc85xx/cpu_init_early.c
index a67f37e..574510f 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu_init_early.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init_early.c
@@ -3,8 +3,9 @@
* Copyright 2009-2012 Freescale Semiconductor, Inc
*/
-#include <common.h>
+#include <asm/ppc.h>
#include <system-constants.h>
+#include <linux/types.h>
#include <asm-offsets.h>
#include <asm/global_data.h>
#include <asm/processor.h>
diff --git a/arch/powerpc/cpu/mpc85xx/fdt.c b/arch/powerpc/cpu/mpc85xx/fdt.c
index e26436b..c56e98d 100644
--- a/arch/powerpc/cpu/mpc85xx/fdt.c
+++ b/arch/powerpc/cpu/mpc85xx/fdt.c
@@ -6,7 +6,7 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
+#include <config.h>
#include <clock_legacy.h>
#include <env.h>
#include <log.h>
diff --git a/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c b/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c
index 9b6577e..945020f 100644
--- a/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c
@@ -3,7 +3,6 @@
* Copyright 2012 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <log.h>
#include <asm/fsl_serdes.h>
#include <asm/immap_85xx.h>
diff --git a/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c b/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c
index 7c2de02..78316ea 100644
--- a/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c
@@ -3,7 +3,7 @@
* Copyright 2009-2011 Freescale Semiconductor, Inc.
*/
-#include <common.h>
+#include <config.h>
#include <env.h>
#include <log.h>
#include <time.h>
diff --git a/arch/powerpc/cpu/mpc85xx/interrupts.c b/arch/powerpc/cpu/mpc85xx/interrupts.c
index bcbdfac..3c98768 100644
--- a/arch/powerpc/cpu/mpc85xx/interrupts.c
+++ b/arch/powerpc/cpu/mpc85xx/interrupts.c
@@ -10,7 +10,7 @@
* Xianghua Xiao (X.Xiao@motorola.com)
*/
-#include <common.h>
+#include <asm/ppc.h>
#include <irq_func.h>
#include <log.h>
#include <time.h>
diff --git a/arch/powerpc/cpu/mpc85xx/liodn.c b/arch/powerpc/cpu/mpc85xx/liodn.c
index 4b8844a..af6731c 100644
--- a/arch/powerpc/cpu/mpc85xx/liodn.c
+++ b/arch/powerpc/cpu/mpc85xx/liodn.c
@@ -3,7 +3,7 @@
* Copyright 2008-2011 Freescale Semiconductor, Inc.
*/
-#include <common.h>
+#include <config.h>
#include <log.h>
#include <linux/libfdt.h>
#include <fdt_support.h>
diff --git a/arch/powerpc/cpu/mpc85xx/mp.c b/arch/powerpc/cpu/mpc85xx/mp.c
index 7c47e41..b638f24 100644
--- a/arch/powerpc/cpu/mpc85xx/mp.c
+++ b/arch/powerpc/cpu/mpc85xx/mp.c
@@ -3,7 +3,7 @@
* Copyright 2008-2011 Freescale Semiconductor, Inc.
*/
-#include <common.h>
+#include <config.h>
#include <cpu_func.h>
#include <env.h>
#include <log.h>
diff --git a/arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c b/arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c
index cbcb57f..bafff20 100644
--- a/arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c
@@ -5,7 +5,6 @@
*/
#include <config.h>
-#include <common.h>
#include <log.h>
#include <asm/io.h>
#include <asm/immap_85xx.h>
diff --git a/arch/powerpc/cpu/mpc85xx/mpc8544_serdes.c b/arch/powerpc/cpu/mpc85xx/mpc8544_serdes.c
index a48f3c1..ad979ca 100644
--- a/arch/powerpc/cpu/mpc85xx/mpc8544_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/mpc8544_serdes.c
@@ -4,7 +4,6 @@
*/
#include <config.h>
-#include <common.h>
#include <log.h>
#include <asm/io.h>
#include <asm/immap_85xx.h>
diff --git a/arch/powerpc/cpu/mpc85xx/mpc8548_serdes.c b/arch/powerpc/cpu/mpc85xx/mpc8548_serdes.c
index 479ee08..924afa0 100644
--- a/arch/powerpc/cpu/mpc85xx/mpc8548_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/mpc8548_serdes.c
@@ -4,7 +4,6 @@
*/
#include <config.h>
-#include <common.h>
#include <log.h>
#include <asm/io.h>
#include <asm/immap_85xx.h>
diff --git a/arch/powerpc/cpu/mpc85xx/p1010_serdes.c b/arch/powerpc/cpu/mpc85xx/p1010_serdes.c
index 56e5ef6..d38041e 100644
--- a/arch/powerpc/cpu/mpc85xx/p1010_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/p1010_serdes.c
@@ -5,7 +5,6 @@
*/
#include <config.h>
-#include <common.h>
#include <log.h>
#include <asm/io.h>
#include <asm/immap_85xx.h>
diff --git a/arch/powerpc/cpu/mpc85xx/p1021_serdes.c b/arch/powerpc/cpu/mpc85xx/p1021_serdes.c
index 47f13e3..ec0f14a 100644
--- a/arch/powerpc/cpu/mpc85xx/p1021_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/p1021_serdes.c
@@ -4,7 +4,6 @@
*/
#include <config.h>
-#include <common.h>
#include <log.h>
#include <asm/io.h>
#include <asm/immap_85xx.h>
diff --git a/arch/powerpc/cpu/mpc85xx/p1023_serdes.c b/arch/powerpc/cpu/mpc85xx/p1023_serdes.c
index 7a8f653..6d306d9 100644
--- a/arch/powerpc/cpu/mpc85xx/p1023_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/p1023_serdes.c
@@ -5,7 +5,6 @@
*/
#include <config.h>
-#include <common.h>
#include <log.h>
#include <asm/io.h>
#include <asm/immap_85xx.h>
diff --git a/arch/powerpc/cpu/mpc85xx/p2020_serdes.c b/arch/powerpc/cpu/mpc85xx/p2020_serdes.c
index 8c5d82a..49626fc 100644
--- a/arch/powerpc/cpu/mpc85xx/p2020_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/p2020_serdes.c
@@ -4,7 +4,6 @@
*/
#include <config.h>
-#include <common.h>
#include <log.h>
#include <asm/io.h>
#include <asm/immap_85xx.h>
diff --git a/arch/powerpc/cpu/mpc85xx/p2041_ids.c b/arch/powerpc/cpu/mpc85xx/p2041_ids.c
index 540a6e6..ae5227a 100644
--- a/arch/powerpc/cpu/mpc85xx/p2041_ids.c
+++ b/arch/powerpc/cpu/mpc85xx/p2041_ids.c
@@ -3,7 +3,8 @@
* Copyright 2011 Freescale Semiconductor, Inc.
*/
-#include <common.h>
+#include <config.h>
+#include <linux/kernel.h>
#include <asm/fsl_portals.h>
#include <asm/fsl_liodn.h>
diff --git a/arch/powerpc/cpu/mpc85xx/p2041_serdes.c b/arch/powerpc/cpu/mpc85xx/p2041_serdes.c
index 3eca3a6..3943859 100644
--- a/arch/powerpc/cpu/mpc85xx/p2041_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/p2041_serdes.c
@@ -3,7 +3,6 @@
* Copyright 2010-2011 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <asm/fsl_serdes.h>
#include <asm/processor.h>
#include <asm/io.h>
diff --git a/arch/powerpc/cpu/mpc85xx/p3041_ids.c b/arch/powerpc/cpu/mpc85xx/p3041_ids.c
index 8f64525..0675a59 100644
--- a/arch/powerpc/cpu/mpc85xx/p3041_ids.c
+++ b/arch/powerpc/cpu/mpc85xx/p3041_ids.c
@@ -3,7 +3,8 @@
* Copyright 2010-2011 Freescale Semiconductor, Inc.
*/
-#include <common.h>
+#include <config.h>
+#include <linux/kernel.h>
#include <asm/fsl_portals.h>
#include <asm/fsl_liodn.h>
diff --git a/arch/powerpc/cpu/mpc85xx/p3041_serdes.c b/arch/powerpc/cpu/mpc85xx/p3041_serdes.c
index ec8234c..b1586f1 100644
--- a/arch/powerpc/cpu/mpc85xx/p3041_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/p3041_serdes.c
@@ -3,7 +3,6 @@
* Copyright 2009-2011 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <asm/fsl_serdes.h>
#include <asm/processor.h>
#include <asm/io.h>
diff --git a/arch/powerpc/cpu/mpc85xx/p4080_ids.c b/arch/powerpc/cpu/mpc85xx/p4080_ids.c
index db41116..15ab4ac 100644
--- a/arch/powerpc/cpu/mpc85xx/p4080_ids.c
+++ b/arch/powerpc/cpu/mpc85xx/p4080_ids.c
@@ -3,7 +3,8 @@
* Copyright 2010-2011 Freescale Semiconductor, Inc.
*/
-#include <common.h>
+#include <config.h>
+#include <linux/kernel.h>
#include <asm/fsl_portals.h>
#include <asm/fsl_liodn.h>
diff --git a/arch/powerpc/cpu/mpc85xx/p4080_serdes.c b/arch/powerpc/cpu/mpc85xx/p4080_serdes.c
index 463fa11..438fd44 100644
--- a/arch/powerpc/cpu/mpc85xx/p4080_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/p4080_serdes.c
@@ -3,7 +3,6 @@
* Copyright 2009-2010 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <asm/io.h>
#include <asm/fsl_serdes.h>
#include <asm/processor.h>
diff --git a/arch/powerpc/cpu/mpc85xx/p5040_ids.c b/arch/powerpc/cpu/mpc85xx/p5040_ids.c
index bd05eae..0a34e06 100644
--- a/arch/powerpc/cpu/mpc85xx/p5040_ids.c
+++ b/arch/powerpc/cpu/mpc85xx/p5040_ids.c
@@ -3,7 +3,8 @@
* Copyright 2010-2011 Freescale Semiconductor, Inc.
*/
-#include <common.h>
+#include <config.h>
+#include <linux/kernel.h>
#include <asm/fsl_portals.h>
#include <asm/fsl_liodn.h>
diff --git a/arch/powerpc/cpu/mpc85xx/p5040_serdes.c b/arch/powerpc/cpu/mpc85xx/p5040_serdes.c
index 2327b2c..409f2ac 100644
--- a/arch/powerpc/cpu/mpc85xx/p5040_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/p5040_serdes.c
@@ -3,7 +3,6 @@
* Copyright 2009-2011 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <asm/fsl_serdes.h>
#include <asm/processor.h>
#include <asm/io.h>
diff --git a/arch/powerpc/cpu/mpc85xx/portals.c b/arch/powerpc/cpu/mpc85xx/portals.c
index 6b4cbdd..782874d 100644
--- a/arch/powerpc/cpu/mpc85xx/portals.c
+++ b/arch/powerpc/cpu/mpc85xx/portals.c
@@ -3,7 +3,6 @@
* Copyright 2008-2011 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <linux/libfdt.h>
#include <fdt_support.h>
diff --git a/arch/powerpc/cpu/mpc85xx/qe_io.c b/arch/powerpc/cpu/mpc85xx/qe_io.c
index 3cf41ca..c3f7493 100644
--- a/arch/powerpc/cpu/mpc85xx/qe_io.c
+++ b/arch/powerpc/cpu/mpc85xx/qe_io.c
@@ -6,7 +6,7 @@
* based on source code of Shlomi Gridish
*/
-#include <common.h>
+#include <config.h>
#include <linux/errno.h>
#include <asm/io.h>
#include <asm/immap_85xx.h>
diff --git a/arch/powerpc/cpu/mpc85xx/speed.c b/arch/powerpc/cpu/mpc85xx/speed.c
index 9af4031..a7e1b3c 100644
--- a/arch/powerpc/cpu/mpc85xx/speed.c
+++ b/arch/powerpc/cpu/mpc85xx/speed.c
@@ -9,7 +9,6 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
#include <cpu_func.h>
#include <clock_legacy.h>
#include <ppc_asm.tmpl>
diff --git a/arch/powerpc/cpu/mpc85xx/spl_minimal.c b/arch/powerpc/cpu/mpc85xx/spl_minimal.c
index ce2b9c2..29318fa 100644
--- a/arch/powerpc/cpu/mpc85xx/spl_minimal.c
+++ b/arch/powerpc/cpu/mpc85xx/spl_minimal.c
@@ -3,7 +3,6 @@
* Copyright 2009 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <asm/processor.h>
#include <asm/global_data.h>
#include <fsl_ifc.h>
diff --git a/arch/powerpc/cpu/mpc85xx/t1024_ids.c b/arch/powerpc/cpu/mpc85xx/t1024_ids.c
index bab076b..7239d28 100644
--- a/arch/powerpc/cpu/mpc85xx/t1024_ids.c
+++ b/arch/powerpc/cpu/mpc85xx/t1024_ids.c
@@ -3,7 +3,8 @@
* Copyright 2014 Freescale Semiconductor, Inc.
*/
-#include <common.h>
+#include <config.h>
+#include <linux/kernel.h>
#include <asm/fsl_portals.h>
#include <asm/fsl_liodn.h>
diff --git a/arch/powerpc/cpu/mpc85xx/t1024_serdes.c b/arch/powerpc/cpu/mpc85xx/t1024_serdes.c
index 16458e7..0d958fe 100644
--- a/arch/powerpc/cpu/mpc85xx/t1024_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/t1024_serdes.c
@@ -3,7 +3,6 @@
* Copyright 2014 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <asm/fsl_serdes.h>
#include <asm/processor.h>
#include <asm/io.h>
diff --git a/arch/powerpc/cpu/mpc85xx/t1040_ids.c b/arch/powerpc/cpu/mpc85xx/t1040_ids.c
index 59f4f9c..bb92fc3 100644
--- a/arch/powerpc/cpu/mpc85xx/t1040_ids.c
+++ b/arch/powerpc/cpu/mpc85xx/t1040_ids.c
@@ -3,7 +3,8 @@
* Copyright 2012 Freescale Semiconductor, Inc.
*/
-#include <common.h>
+#include <config.h>
+#include <linux/kernel.h>
#include <asm/fsl_portals.h>
#include <asm/fsl_liodn.h>
diff --git a/arch/powerpc/cpu/mpc85xx/t1040_serdes.c b/arch/powerpc/cpu/mpc85xx/t1040_serdes.c
index 3a7fdef..2033ebb 100644
--- a/arch/powerpc/cpu/mpc85xx/t1040_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/t1040_serdes.c
@@ -3,10 +3,11 @@
* Copyright 2012 Freescale Semiconductor, Inc.
*/
-#include <common.h>
+#include <linux/kernel.h>
#include <asm/fsl_serdes.h>
#include <asm/processor.h>
#include <asm/io.h>
+#include <asm/ppc.h>
static u8 serdes_cfg_tbl[][SRDS_MAX_LANES] = {
diff --git a/arch/powerpc/cpu/mpc85xx/t2080_ids.c b/arch/powerpc/cpu/mpc85xx/t2080_ids.c
index 390bb11..26a2d74 100644
--- a/arch/powerpc/cpu/mpc85xx/t2080_ids.c
+++ b/arch/powerpc/cpu/mpc85xx/t2080_ids.c
@@ -3,7 +3,8 @@
* Copyright 2013 Freescale Semiconductor, Inc.
*/
-#include <common.h>
+#include <config.h>
+#include <linux/kernel.h>
#include <asm/fsl_portals.h>
#include <asm/fsl_liodn.h>
diff --git a/arch/powerpc/cpu/mpc85xx/t2080_serdes.c b/arch/powerpc/cpu/mpc85xx/t2080_serdes.c
index 5f34aab..6702aca 100644
--- a/arch/powerpc/cpu/mpc85xx/t2080_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/t2080_serdes.c
@@ -5,9 +5,10 @@
* Shengzhou Liu <Shengzhou.Liu@freescale.com>
*/
-#include <common.h>
+#include <linux/kernel.h>
#include <asm/fsl_serdes.h>
#include <asm/processor.h>
+#include <asm/ppc.h>
#include "fsl_corenet2_serdes.h"
struct serdes_config {
diff --git a/arch/powerpc/cpu/mpc85xx/t4240_ids.c b/arch/powerpc/cpu/mpc85xx/t4240_ids.c
index 37ea778..c319bf5 100644
--- a/arch/powerpc/cpu/mpc85xx/t4240_ids.c
+++ b/arch/powerpc/cpu/mpc85xx/t4240_ids.c
@@ -3,7 +3,8 @@
* Copyright 2012 Freescale Semiconductor, Inc.
*/
-#include <common.h>
+#include <config.h>
+#include <linux/kernel.h>
#include <asm/fsl_portals.h>
#include <asm/fsl_liodn.h>
diff --git a/arch/powerpc/cpu/mpc85xx/t4240_serdes.c b/arch/powerpc/cpu/mpc85xx/t4240_serdes.c
index 61402e8..36fe34f 100644
--- a/arch/powerpc/cpu/mpc85xx/t4240_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/t4240_serdes.c
@@ -3,7 +3,6 @@
* Copyright 2012 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <asm/fsl_serdes.h>
#include <asm/processor.h>
#include <asm/io.h>
diff --git a/arch/powerpc/cpu/mpc85xx/tlb.c b/arch/powerpc/cpu/mpc85xx/tlb.c
index 2a78f0f..e0b36f8 100644
--- a/arch/powerpc/cpu/mpc85xx/tlb.c
+++ b/arch/powerpc/cpu/mpc85xx/tlb.c
@@ -6,7 +6,7 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
+#include <config.h>
#include <display_options.h>
#include <init.h>
#include <asm/bitops.h>
diff --git a/arch/powerpc/cpu/mpc85xx/traps.c b/arch/powerpc/cpu/mpc85xx/traps.c
index 8f451b4..db70f07 100644
--- a/arch/powerpc/cpu/mpc85xx/traps.c
+++ b/arch/powerpc/cpu/mpc85xx/traps.c
@@ -19,7 +19,7 @@
* This file handles the architecture-dependent parts of hardware exceptions
*/
-#include <common.h>
+#include <asm/ppc.h>
#include <asm/global_data.h>
#include <asm/ptrace.h>
#include <command.h>
diff --git a/arch/powerpc/cpu/mpc8xx/cpu_init.c b/arch/powerpc/cpu/mpc8xx/cpu_init.c
index aac4203..d1abe8f 100644
--- a/arch/powerpc/cpu/mpc8xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc8xx/cpu_init.c
@@ -92,6 +92,12 @@
CONFIG_SYS_PLPRCR);
#endif
+ /* Set SDMA configuration register */
+ if (IS_ENABLED(CONFIG_MPC885))
+ out_be32(&immr->im_siu_conf.sc_sdcr, 0x0040);
+ else
+ out_be32(&immr->im_siu_conf.sc_sdcr, 0x0001);
+
/*
* Memory Controller:
*/
diff --git a/arch/powerpc/cpu/mpc8xxx/cpu.c b/arch/powerpc/cpu/mpc8xxx/cpu.c
index 73d28f2..82f2874 100644
--- a/arch/powerpc/cpu/mpc8xxx/cpu.c
+++ b/arch/powerpc/cpu/mpc8xxx/cpu.c
@@ -8,7 +8,6 @@
*/
#include <config.h>
-#include <common.h>
#include <command.h>
#include <cpu_func.h>
#include <init.h>
diff --git a/arch/powerpc/cpu/mpc8xxx/fdt.c b/arch/powerpc/cpu/mpc8xxx/fdt.c
index 3004290..f1c1cbc 100644
--- a/arch/powerpc/cpu/mpc8xxx/fdt.c
+++ b/arch/powerpc/cpu/mpc8xxx/fdt.c
@@ -8,7 +8,6 @@
* cpu specific common code for 85xx/86xx processors.
*/
-#include <common.h>
#include <cpu_func.h>
#include <linux/libfdt.h>
#include <fdt_support.h>
diff --git a/arch/powerpc/cpu/mpc8xxx/fsl_lbc.c b/arch/powerpc/cpu/mpc8xxx/fsl_lbc.c
index 29489b4..843dd19 100644
--- a/arch/powerpc/cpu/mpc8xxx/fsl_lbc.c
+++ b/arch/powerpc/cpu/mpc8xxx/fsl_lbc.c
@@ -3,7 +3,6 @@
* Copyright 2010-2011 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <hang.h>
#include <init.h>
#include <asm/fsl_lbc.h>
diff --git a/arch/powerpc/cpu/mpc8xxx/fsl_pamu.c b/arch/powerpc/cpu/mpc8xxx/fsl_pamu.c
index 8e1f6c9..29399bc 100644
--- a/arch/powerpc/cpu/mpc8xxx/fsl_pamu.c
+++ b/arch/powerpc/cpu/mpc8xxx/fsl_pamu.c
@@ -5,12 +5,14 @@
* Copyright 2012-2016 Freescale Semiconductor, Inc.
*/
-#include <common.h>
+#include <config.h>
#include <log.h>
#include <linux/bitops.h>
#include <linux/log2.h>
#include <malloc.h>
#include <asm/fsl_pamu.h>
+#include <asm/io.h>
+#include <asm/ppc.h>
struct paace *ppaact;
struct paace *sec;
diff --git a/arch/powerpc/cpu/mpc8xxx/law.c b/arch/powerpc/cpu/mpc8xxx/law.c
index 35409dc..f16bc19 100644
--- a/arch/powerpc/cpu/mpc8xxx/law.c
+++ b/arch/powerpc/cpu/mpc8xxx/law.c
@@ -6,7 +6,6 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
#include <display_options.h>
#include <asm/bitops.h>
#include <asm/global_data.h>
diff --git a/arch/powerpc/cpu/mpc8xxx/pamu_table.c b/arch/powerpc/cpu/mpc8xxx/pamu_table.c
index b906279..831a117 100644
--- a/arch/powerpc/cpu/mpc8xxx/pamu_table.c
+++ b/arch/powerpc/cpu/mpc8xxx/pamu_table.c
@@ -3,7 +3,6 @@
* Copyright 2012-2016 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <log.h>
#include <asm/fsl_pamu.h>
#include <asm/global_data.h>
diff --git a/arch/powerpc/cpu/mpc8xxx/srio.c b/arch/powerpc/cpu/mpc8xxx/srio.c
index c0b4a12..0c7288c 100644
--- a/arch/powerpc/cpu/mpc8xxx/srio.c
+++ b/arch/powerpc/cpu/mpc8xxx/srio.c
@@ -3,13 +3,13 @@
* Copyright 2011 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <config.h>
#include <log.h>
#include <time.h>
#include <asm/fsl_law.h>
#include <asm/fsl_serdes.h>
#include <asm/fsl_srio.h>
+#include <asm/ppc.h>
#include <linux/delay.h>
#include <linux/errno.h>
diff --git a/arch/powerpc/dts/cmpc885.dts b/arch/powerpc/dts/cmpc885.dts
index 7b9566a..454ceb9 100644
--- a/arch/powerpc/dts/cmpc885.dts
+++ b/arch/powerpc/dts/cmpc885.dts
@@ -83,13 +83,23 @@
spi: spi@aa0 {
status = "okay";
#address-cells = <1>;
- #size-cells = <1>;
- cell-index = <0>;
+ #size-cells = <0>;
compatible = "fsl,mpc8xx-spi";
- gpios = <&CPM1_PIO_B 21 1>; /* /EEPROM_CS ACTIVE_LOW */
+ gpios = <&CPM1_PIO_B 21 1 /* /EEPROM_CS ACTIVE_LOW */
+ &CPM1_PIO_B 23 1 /* Temperature mother board */
+ &CPM1_PIO_B 14 1>; /* Temperature CPU board */
eeprom@0 {
- cell-index = <1>;
+ reg = <0>;
+ compatible = "atmel,at25", "cs,eeprom";
+ };
+ temp@1 {
+ reg = <1>;
+ compatible = "ti,lm74";
+ };
+ temp@2 {
+ reg = <2>;
+ compatible = "ti,lm74";
};
};
};
diff --git a/arch/powerpc/dts/cmpcpro.dts b/arch/powerpc/dts/cmpcpro.dts
index c27d9db..1dfa864 100644
--- a/arch/powerpc/dts/cmpcpro.dts
+++ b/arch/powerpc/dts/cmpcpro.dts
@@ -140,11 +140,21 @@
compatible = "fsl,mpc832x-spi";
reg = <0x4c0 0x40>;
mode = "cpu";
- gpios = <&qe_pio_d 3 1>;
+ gpios = <&qe_pio_d 3 1
+ &qe_pio_c 5 1 /* TEMP mother board */
+ &qe_pio_c 3 1>; /* TEMP CPU board */
clock-frequency = <0>;
- eeprom@3 {
+ eeprom@0 {
+ reg = <0>;
compatible = "atmel,at25", "cs,eeprom";
- cell-index = <1>;
+ };
+ temp@1 {
+ reg = <1>;
+ compatible = "ti,lm74";
+ };
+ temp@2 {
+ reg = <2>;
+ compatible = "ti,lm74";
};
};
eth0: ucc@3000 {
diff --git a/arch/powerpc/dts/mcr3000.dts b/arch/powerpc/dts/mcr3000.dts
index c4d7737..aa46007 100644
--- a/arch/powerpc/dts/mcr3000.dts
+++ b/arch/powerpc/dts/mcr3000.dts
@@ -26,6 +26,47 @@
timeout-sec = <2>;
hw_margin_ms = <1000>;
};
+
+ spi: spi@aa0 {
+ status = "okay";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cell-index = <0>;
+ compatible = "fsl,mpc8xx-spi";
+ gpios = <&csspi 2 0
+ &csspi 0 0>;
+
+ temp@0 {
+ reg = <0>;
+ compatible = "ti,lm74";
+ };
+ fpga@1 {
+ reg = <1>;
+ };
+ };
+ };
+
+ localbus@ff000100 {
+ compatible = "s3k,mcr3000-localbus", "fsl,pq1-localbus", "simple-bus";
+ #address-cells = <2>;
+ #size-cells = <1>;
+ reg = <0xff000100 0x40>; // ORx and BRx register
+
+ ranges = <0 0 0x04000000 0x04000000 // BOOT
+ 1 0 0x00000000 0x04000000 // SDRAM
+ 2 0 0x08000000 0x04000000 // RAMDP
+ 3 0 0x0C000000 0x04000000 // NAND
+ 4 0 0x10000000 0x04000000 // Periphs
+ 5 0 0x14000000 0x04000000 // FPGA
+ 6 0 0x18000000 0x04000000 // mezzanine
+ 7 0 0x1c000000 0x04000000>; // DSP
+
+ csspi: gpio-controller@2 {
+ #gpio-cells = <2>;
+ compatible = "s3k,mcr3000-cpld-csspi";
+ reg = <4 0x802 2>;
+ gpio-controller;
+ };
};
SERIAL: smc@0 {
diff --git a/arch/powerpc/include/asm/cache.h b/arch/powerpc/include/asm/cache.h
index b94faa5..21dfce4 100644
--- a/arch/powerpc/include/asm/cache.h
+++ b/arch/powerpc/include/asm/cache.h
@@ -39,6 +39,8 @@
#endif
#if defined(__KERNEL__) && !defined(__ASSEMBLY__)
+#include <linux/types.h>
+
extern void flush_dcache_range(unsigned long start, unsigned long stop);
extern void clean_dcache_range(unsigned long start, unsigned long stop);
extern void invalidate_dcache_range(unsigned long start, unsigned long stop);
diff --git a/arch/powerpc/include/asm/fsl_dma.h b/arch/powerpc/include/asm/fsl_dma.h
index 1459db7..e69e7db 100644
--- a/arch/powerpc/include/asm/fsl_dma.h
+++ b/arch/powerpc/include/asm/fsl_dma.h
@@ -8,7 +8,7 @@
#ifndef _ASM_FSL_DMA_H_
#define _ASM_FSL_DMA_H_
-#include <asm/types.h>
+#include <linux/types.h>
#ifdef CONFIG_MPC83xx
typedef struct fsl_dma {
diff --git a/arch/powerpc/include/asm/fsl_liodn.h b/arch/powerpc/include/asm/fsl_liodn.h
index 0af3d89..4ce869b 100644
--- a/arch/powerpc/include/asm/fsl_liodn.h
+++ b/arch/powerpc/include/asm/fsl_liodn.h
@@ -6,7 +6,9 @@
#ifndef _FSL_LIODN_H_
#define _FSL_LIODN_H_
-#include <asm/types.h>
+#include <config.h>
+#include <linux/types.h>
+#include <asm/ppc.h>
#include <fsl_qbman.h>
struct srio_liodn_id_table {
diff --git a/arch/powerpc/include/asm/fsl_portals.h b/arch/powerpc/include/asm/fsl_portals.h
index 54ef4fb..021eec7 100644
--- a/arch/powerpc/include/asm/fsl_portals.h
+++ b/arch/powerpc/include/asm/fsl_portals.h
@@ -6,6 +6,8 @@
#ifndef _FSL_PORTALS_H_
#define _FSL_PORTALS_H_
+#include <linux/types.h>
+
/* entries must be in order and contiguous */
enum fsl_dpaa_dev {
FSL_HW_PORTAL_SEC,
diff --git a/arch/powerpc/include/asm/fsl_serdes.h b/arch/powerpc/include/asm/fsl_serdes.h
index ddde4f8..fdf7611 100644
--- a/arch/powerpc/include/asm/fsl_serdes.h
+++ b/arch/powerpc/include/asm/fsl_serdes.h
@@ -7,6 +7,7 @@
#define __FSL_SERDES_H
#include <config.h>
+#include <linux/types.h>
enum srds_prtcl {
/*
diff --git a/arch/powerpc/include/asm/global_data.h b/arch/powerpc/include/asm/global_data.h
index f786012..a9efbbd 100644
--- a/arch/powerpc/include/asm/global_data.h
+++ b/arch/powerpc/include/asm/global_data.h
@@ -93,4 +93,6 @@
#define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("r2")
+#include <asm/u-boot.h>
+
#endif /* __ASM_GBL_DATA_H */
diff --git a/arch/powerpc/include/asm/immap_8xx.h b/arch/powerpc/include/asm/immap_8xx.h
index cf1300f..e11300c 100644
--- a/arch/powerpc/include/asm/immap_8xx.h
+++ b/arch/powerpc/include/asm/immap_8xx.h
@@ -12,6 +12,8 @@
#ifndef __IMMAP_8XX__
#define __IMMAP_8XX__
+#include <linux/types.h>
+
/* System configuration registers.
*/
typedef struct sys_conf {
diff --git a/arch/powerpc/lib/bdinfo.c b/arch/powerpc/lib/bdinfo.c
index 55dcad5..6491c21 100644
--- a/arch/powerpc/lib/bdinfo.c
+++ b/arch/powerpc/lib/bdinfo.c
@@ -6,7 +6,6 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
#include <init.h>
#include <asm/global_data.h>
diff --git a/arch/powerpc/lib/bootm.c b/arch/powerpc/lib/bootm.c
index 75c6bfd..f55b5ff 100644
--- a/arch/powerpc/lib/bootm.c
+++ b/arch/powerpc/lib/bootm.c
@@ -7,7 +7,7 @@
*/
-#include <common.h>
+#include <config.h>
#include <bootm.h>
#include <bootstage.h>
#include <cpu_func.h>
diff --git a/arch/powerpc/lib/cache.c b/arch/powerpc/lib/cache.c
index c4c5c2d..e480b26 100644
--- a/arch/powerpc/lib/cache.c
+++ b/arch/powerpc/lib/cache.c
@@ -4,7 +4,6 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
#include <cpu_func.h>
#include <asm/cache.h>
#include <watchdog.h>
diff --git a/arch/powerpc/lib/extable.c b/arch/powerpc/lib/extable.c
index 7e9d4f2..fd45e8a 100644
--- a/arch/powerpc/lib/extable.c
+++ b/arch/powerpc/lib/extable.c
@@ -5,7 +5,6 @@
* (C) Copyright 2000
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
#include <log.h>
/*
diff --git a/arch/powerpc/lib/interrupts.c b/arch/powerpc/lib/interrupts.c
index df312df..92b8a0b 100644
--- a/arch/powerpc/lib/interrupts.c
+++ b/arch/powerpc/lib/interrupts.c
@@ -7,7 +7,7 @@
* Gleb Natapov <gnatapov@mrv.com>
*/
-#include <common.h>
+#include <asm/ppc.h>
#include <irq_func.h>
#include <asm/processor.h>
#include <watchdog.h>
diff --git a/arch/powerpc/lib/kgdb.c b/arch/powerpc/lib/kgdb.c
index 8727d18..20fcb7e 100644
--- a/arch/powerpc/lib/kgdb.c
+++ b/arch/powerpc/lib/kgdb.c
@@ -1,4 +1,3 @@
-#include <common.h>
#include <command.h>
#include <kgdb.h>
#include <asm/ptrace.h>
diff --git a/arch/powerpc/lib/spl.c b/arch/powerpc/lib/spl.c
index b638ea7..3a24cbf 100644
--- a/arch/powerpc/lib/spl.c
+++ b/arch/powerpc/lib/spl.c
@@ -2,7 +2,6 @@
/*
* Copyright 2012 Stefan Roese <sr@denx.de>
*/
-#include <common.h>
#include <config.h>
#include <log.h>
#include <spl.h>
diff --git a/arch/powerpc/lib/stack.c b/arch/powerpc/lib/stack.c
index 2e731aa..afd869e 100644
--- a/arch/powerpc/lib/stack.c
+++ b/arch/powerpc/lib/stack.c
@@ -10,7 +10,6 @@
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
* Marius Groeger <mgroeger@sysgo.de>
*/
-#include <common.h>
#include <init.h>
#include <asm/global_data.h>
#include <asm/mp.h>
diff --git a/arch/powerpc/lib/time.c b/arch/powerpc/lib/time.c
index 8d6babf..0a0e75e 100644
--- a/arch/powerpc/lib/time.c
+++ b/arch/powerpc/lib/time.c
@@ -4,7 +4,6 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
#include <init.h>
#include <time.h>
#include <asm/io.h>
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 6c26f91f..7e20ef6 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -22,6 +22,7 @@
config TARGET_QEMU_VIRT
bool "Support QEMU Virt Board"
+ select BOARD_LATE_INIT
config TARGET_SIFIVE_UNLEASHED
bool "Support SiFive Unleashed Board"
@@ -93,6 +94,7 @@
# platform-specific options below
source "arch/riscv/cpu/andesv5/Kconfig"
+source "arch/riscv/cpu/cv1800b/Kconfig"
source "arch/riscv/cpu/fu540/Kconfig"
source "arch/riscv/cpu/fu740/Kconfig"
source "arch/riscv/cpu/generic/Kconfig"
@@ -119,6 +121,26 @@
endchoice
+config FRAMEPOINTER
+ bool "Build with frame pointer for stack unwinding"
+ help
+ Choose this option to use the frame pointer so the stack can be
+ unwound if needed. This is useful for tracing where faults came
+ from as the source may be several functions back
+
+ If you say Y here, then the code size will be increased due to
+ having to store the fp.
+
+config SPL_FRAMEPOINTER
+ bool "Build SPL with frame pointer for stack unwinding"
+ help
+ Choose this option to use the frame pointer so the stack can be
+ unwound if needed. This is useful for tracing where faults came
+ from as the source may be several functions back
+
+ If you say Y here, then the code size will be increased due to
+ having to store the fp.
+
choice
prompt "Code Model"
default CMODEL_MEDLOW
diff --git a/arch/riscv/Makefile b/arch/riscv/Makefile
index b3ef870..c36a853 100644
--- a/arch/riscv/Makefile
+++ b/arch/riscv/Makefile
@@ -48,6 +48,10 @@
ARCH_FLAGS = -march=$(RISCV_MARCH) -mabi=$(ABI) \
-mcmodel=$(CMODEL)
+ifeq ($(CONFIG_$(SPL_)FRAMEPOINTER),y)
+ ARCH_FLAGS += -fno-omit-frame-pointer
+endif
+
PLATFORM_CPPFLAGS += $(ARCH_FLAGS)
CFLAGS_EFI += $(ARCH_FLAGS)
diff --git a/arch/riscv/cpu/andesv5/Kconfig b/arch/riscv/cpu/andesv5/Kconfig
index f311291..e3efb0d 100644
--- a/arch/riscv/cpu/andesv5/Kconfig
+++ b/arch/riscv/cpu/andesv5/Kconfig
@@ -1,6 +1,7 @@
config RISCV_NDS
bool
select ARCH_EARLY_INIT_R
+ select SYS_CACHE_SHIFT_6
imply CPU
imply CPU_RISCV
imply RISCV_TIMER if (RISCV_SMODE || SPL_RISCV_SMODE)
diff --git a/arch/riscv/cpu/cpu.c b/arch/riscv/cpu/cpu.c
index ecfefa1..affe700 100644
--- a/arch/riscv/cpu/cpu.c
+++ b/arch/riscv/cpu/cpu.c
@@ -38,35 +38,51 @@
#if CONFIG_IS_ENABLED(RISCV_MMODE)
return csr_read(CSR_MISA) & (1 << (ext - 'a'));
#elif CONFIG_CPU
+ char sext[2] = {ext};
struct udevice *dev;
- char desc[32];
- int i;
+ const char *isa;
+ int ret, i;
uclass_find_first_device(UCLASS_CPU, &dev);
if (!dev) {
debug("unable to find the RISC-V cpu device\n");
return false;
}
- if (!cpu_get_desc(dev, desc, sizeof(desc))) {
- /*
- * skip the first 4 characters (rv32|rv64)
- */
- for (i = 4; i < sizeof(desc); i++) {
- switch (desc[i]) {
- case 's':
- case 'x':
- case 'z':
- case '_':
- case '\0':
- /*
- * Any of these characters mean the single
- * letter extensions have all been consumed.
- */
- return false;
- default:
- if (desc[i] == ext)
- return true;
- }
+
+ ret = dev_read_stringlist_search(dev, "riscv,isa-extensions", sext);
+ if (ret >= 0)
+ return true;
+
+ /*
+ * Only if the property is not found (ENODATA) is the fallback to
+ * riscv,isa used, otherwise the extension is not present in this
+ * CPU.
+ */
+ if (ret != -ENODATA)
+ return false;
+
+ isa = dev_read_string(dev, "riscv,isa");
+ if (!isa)
+ return false;
+
+ /*
+ * Skip the first 4 characters (rv32|rv64).
+ */
+ for (i = 4; i < sizeof(isa); i++) {
+ switch (isa[i]) {
+ case 's':
+ case 'x':
+ case 'z':
+ case '_':
+ case '\0':
+ /*
+ * Any of these characters mean the single
+ * letter extensions have all been consumed.
+ */
+ return false;
+ default:
+ if (isa[i] == ext)
+ return true;
}
}
diff --git a/arch/riscv/cpu/cv1800b/Kconfig b/arch/riscv/cpu/cv1800b/Kconfig
new file mode 100644
index 0000000..7225b12
--- /dev/null
+++ b/arch/riscv/cpu/cv1800b/Kconfig
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (c) 2024, Kongyang Liu <seashell11234455@gmail.com>
+
+config SOPHGO_CV1800B
+ bool
+ select ARCH_EARLY_INIT_R
+ select SYS_CACHE_SHIFT_6
+ imply CPU
+ imply CPU_RISCV
+ imply RISCV_TIMER
+ imply CMD_CPU
diff --git a/arch/riscv/cpu/cv1800b/Makefile b/arch/riscv/cpu/cv1800b/Makefile
new file mode 100644
index 0000000..95beb34
--- /dev/null
+++ b/arch/riscv/cpu/cv1800b/Makefile
@@ -0,0 +1,7 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (c) 2024, Kongyang Liu <seashell11234455@gmail.com>
+
+obj-y += dram.o
+obj-y += cpu.o
+obj-y += cache.o
diff --git a/arch/riscv/cpu/cv1800b/cache.c b/arch/riscv/cpu/cv1800b/cache.c
new file mode 100644
index 0000000..b8051e2
--- /dev/null
+++ b/arch/riscv/cpu/cv1800b/cache.c
@@ -0,0 +1,45 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2024, Kongyang Liu <seashell11234455@gmail.com>
+ */
+
+#include <cpu_func.h>
+
+/*
+ * dcache.ipa rs1 (invalidate)
+ * | 31 - 25 | 24 - 20 | 19 - 15 | 14 - 12 | 11 - 7 | 6 - 0 |
+ * 0000001 01010 rs1 000 00000 0001011
+ *
+ * dcache.cpa rs1 (clean)
+ * | 31 - 25 | 24 - 20 | 19 - 15 | 14 - 12 | 11 - 7 | 6 - 0 |
+ * 0000001 01001 rs1 000 00000 0001011
+ *
+ * dcache.cipa rs1 (clean then invalidate)
+ * | 31 - 25 | 24 - 20 | 19 - 15 | 14 - 12 | 11 - 7 | 6 - 0 |
+ * 0000001 01011 rs1 000 00000 0001011
+ *
+ * sync.s
+ * | 31 - 25 | 24 - 20 | 19 - 15 | 14 - 12 | 11 - 7 | 6 - 0 |
+ * 0000000 11001 00000 000 00000 0001011
+ */
+#define DCACHE_IPA_A0 ".long 0x02a5000b"
+#define DCACHE_CPA_A0 ".long 0x0295000b"
+#define DCACHE_CIPA_A0 ".long 0x02b5000b"
+
+#define SYNC_S ".long 0x0190000b"
+
+void invalidate_dcache_range(unsigned long start, unsigned long end)
+{
+ register unsigned long i asm("a0") = start & ~(CONFIG_SYS_CACHELINE_SIZE - 1);
+ for (; i < end; i += CONFIG_SYS_CACHELINE_SIZE)
+ __asm__ __volatile__(DCACHE_IPA_A0);
+ __asm__ __volatile__(SYNC_S);
+}
+
+void flush_dcache_range(unsigned long start, unsigned long end)
+{
+ register unsigned long i asm("a0") = start & ~(CONFIG_SYS_CACHELINE_SIZE - 1);
+ for (; i < end; i += CONFIG_SYS_CACHELINE_SIZE)
+ __asm__ __volatile__(DCACHE_CPA_A0);
+ __asm__ __volatile__(SYNC_S);
+}
diff --git a/arch/riscv/cpu/cv1800b/cpu.c b/arch/riscv/cpu/cv1800b/cpu.c
new file mode 100644
index 0000000..233a6a3
--- /dev/null
+++ b/arch/riscv/cpu/cv1800b/cpu.c
@@ -0,0 +1,9 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2024, Kongyang Liu <seashell11234455@gmail.com>
+ */
+
+int cleanup_before_linux(void)
+{
+ return 0;
+}
diff --git a/arch/riscv/cpu/cv1800b/dram.c b/arch/riscv/cpu/cv1800b/dram.c
new file mode 100644
index 0000000..91007c0
--- /dev/null
+++ b/arch/riscv/cpu/cv1800b/dram.c
@@ -0,0 +1,21 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018, Bin Meng <bmeng.cn@gmail.com>
+ */
+
+#include <fdtdec.h>
+#include <init.h>
+#include <asm/global_data.h>
+#include <linux/sizes.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int dram_init(void)
+{
+ return fdtdec_setup_mem_size_base();
+}
+
+int dram_init_banksize(void)
+{
+ return fdtdec_setup_memory_banksize();
+}
diff --git a/arch/riscv/cpu/fu540/spl.c b/arch/riscv/cpu/fu540/spl.c
index 45657b7..cedb70b 100644
--- a/arch/riscv/cpu/fu540/spl.c
+++ b/arch/riscv/cpu/fu540/spl.c
@@ -7,7 +7,7 @@
#include <dm.h>
#include <log.h>
-int spl_soc_init(void)
+int spl_dram_init(void)
{
int ret;
struct udevice *dev;
diff --git a/arch/riscv/cpu/fu740/spl.c b/arch/riscv/cpu/fu740/spl.c
index c6816e9..16b307f 100644
--- a/arch/riscv/cpu/fu740/spl.c
+++ b/arch/riscv/cpu/fu740/spl.c
@@ -10,7 +10,7 @@
#define CSR_U74_FEATURE_DISABLE 0x7c1
-int spl_soc_init(void)
+int spl_dram_init(void)
{
int ret;
struct udevice *dev;
diff --git a/arch/riscv/cpu/jh7110/spl.c b/arch/riscv/cpu/jh7110/spl.c
index 6bdf8b9..87aaf86 100644
--- a/arch/riscv/cpu/jh7110/spl.c
+++ b/arch/riscv/cpu/jh7110/spl.c
@@ -28,7 +28,7 @@
}
}
-int spl_soc_init(void)
+int spl_dram_init(void)
{
int ret;
struct udevice *dev;
diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S
index 6cecadf..a9e1935 100644
--- a/arch/riscv/cpu/start.S
+++ b/arch/riscv/cpu/start.S
@@ -418,6 +418,7 @@
*/
mv a0, s3 /* gd_t */
mv a1, s4 /* dest_addr */
+ mv s0, zero /* fp == NULL */
/*
* jump to it ...
diff --git a/arch/riscv/dts/cv1800b-milkv-duo.dts b/arch/riscv/dts/cv1800b-milkv-duo.dts
index 3af9e34..e7cc0e8 100644
--- a/arch/riscv/dts/cv1800b-milkv-duo.dts
+++ b/arch/riscv/dts/cv1800b-milkv-duo.dts
@@ -29,10 +29,36 @@
};
};
+ðernet0 {
+ status = "okay";
+ phy-mode = "rmii";
+};
+
&osc {
clock-frequency = <25000000>;
};
+&sdhci0 {
+ status = "okay";
+ bus-width = <4>;
+ no-1-8-v;
+ no-mmc;
+ no-sdio;
+};
+
+&spif {
+ status = "okay";
+
+ spiflash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <75000000>;
+ spi-tx-bus-width = <4>;
+ spi-rx-bus-width = <4>;
+ m25p,fast-read;
+ };
+};
+
&uart0 {
status = "okay";
};
diff --git a/arch/riscv/dts/cv1800b.dtsi b/arch/riscv/dts/cv1800b.dtsi
index 165e9e3..baf6418 100644
--- a/arch/riscv/dts/cv1800b.dtsi
+++ b/arch/riscv/dts/cv1800b.dtsi
@@ -16,3 +16,7 @@
&clint {
compatible = "sophgo,cv1800b-clint", "thead,c900-clint";
};
+
+&clk {
+ compatible = "sophgo,cv1800-clk";
+};
diff --git a/arch/riscv/dts/cv18xx.dtsi b/arch/riscv/dts/cv18xx.dtsi
index 2d6f4a4..4b01434 100644
--- a/arch/riscv/dts/cv18xx.dtsi
+++ b/arch/riscv/dts/cv18xx.dtsi
@@ -45,6 +45,34 @@
#clock-cells = <0>;
};
+ sdhci_clk: sdhci-clock {
+ compatible = "fixed-clock";
+ clock-frequency = <375000000>;
+ clock-output-names = "sdhci_clk";
+ #clock-cells = <0>;
+ };
+
+ eth_csrclk: eth-csrclk {
+ compatible = "fixed-clock";
+ clock-frequency = <250000000>;
+ clock-output-names = "eth_csrclk";
+ #clock-cells = <0x0>;
+ };
+
+ eth_ptpclk: eth-ptpclk {
+ compatible = "fixed-clock";
+ clock-frequency = <50000000>;
+ clock-output-names = "eth_ptpclk";
+ #clock-cells = <0x0>;
+ };
+
+ spif_clk: spi-flash-clock {
+ compatible = "fixed-clock";
+ clock-frequency = <300000000>;
+ clock-output-names = "spif_clk";
+ #clock-cells = <0>;
+ };
+
soc {
compatible = "simple-bus";
interrupt-parent = <&plic>;
@@ -53,6 +81,12 @@
dma-noncoherent;
ranges;
+ clk: clock-controller@3002000 {
+ reg = <0x03002000 0x1000>;
+ clocks = <&osc>;
+ #clock-cells = <1>;
+ };
+
gpio0: gpio@3020000 {
compatible = "snps,dw-apb-gpio";
reg = <0x3020000 0x1000>;
@@ -125,6 +159,15 @@
};
};
+ ethernet0: ethernet@4070000 {
+ compatible = "sophgo,cv1800b-dwmac";
+ reg = <0x04070000 0x10000>;
+ interrupts = <31 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <ð_csrclk>, <ð_ptpclk>;
+ clock-names = "stmmaceth", "ptp_ref";
+ status = "disabled";
+ };
+
uart0: serial@4140000 {
compatible = "snps,dw-apb-uart";
reg = <0x04140000 0x100>;
@@ -175,6 +218,25 @@
status = "disabled";
};
+ sdhci0: mmc@4310000 {
+ compatible = "sophgo,cv1800b-dwcmshc";
+ reg = <0x4310000 0x1000>;
+ interrupts = <36 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&sdhci_clk>;
+ clock-names = "core";
+ status = "disabled";
+ };
+
+ spif: spi-nor@10000000 {
+ compatible = "sophgo,cv1800b-spif";
+ reg = <0x10000000 0x10000000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&spif_clk>;
+ interrupts = <95 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
plic: interrupt-controller@70000000 {
reg = <0x70000000 0x4000000>;
interrupts-extended = <&cpu0_intc 11>, <&cpu0_intc 9>;
diff --git a/arch/riscv/dts/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/dts/jh7110-starfive-visionfive-2.dtsi
index f2c6bec..e11babc 100644
--- a/arch/riscv/dts/jh7110-starfive-visionfive-2.dtsi
+++ b/arch/riscv/dts/jh7110-starfive-visionfive-2.dtsi
@@ -298,7 +298,7 @@
pinctrl-0 = <&mmc1_pins>;
no-sdio;
no-mmc;
- broken-cd;
+ cd-gpios = <&sysgpio 41 GPIO_ACTIVE_LOW>;
cap-sd-highspeed;
post-power-on-delay-ms = <200>;
status = "okay";
diff --git a/arch/riscv/dts/xilinx-mbv32.dts b/arch/riscv/dts/xilinx-mbv32.dts
index 94e42c2..48ee115 100644
--- a/arch/riscv/dts/xilinx-mbv32.dts
+++ b/arch/riscv/dts/xilinx-mbv32.dts
@@ -8,6 +8,9 @@
*/
/dts-v1/;
+
+#include "binman.dtsi"
+
/ {
#address-cells = <1>;
#size-cells = <1>;
diff --git a/arch/riscv/include/asm/arch-fu540/spl.h b/arch/riscv/include/asm/arch-fu540/spl.h
index 4697279..519e7eb 100644
--- a/arch/riscv/include/asm/arch-fu540/spl.h
+++ b/arch/riscv/include/asm/arch-fu540/spl.h
@@ -9,6 +9,6 @@
#ifndef _SPL_SIFIVE_H
#define _SPL_SIFIVE_H
-int spl_soc_init(void);
+int spl_dram_init(void);
#endif /* _SPL_SIFIVE_H */
diff --git a/arch/riscv/include/asm/arch-fu740/spl.h b/arch/riscv/include/asm/arch-fu740/spl.h
index 15ad9e7..b327ac5 100644
--- a/arch/riscv/include/asm/arch-fu740/spl.h
+++ b/arch/riscv/include/asm/arch-fu740/spl.h
@@ -9,6 +9,6 @@
#ifndef _SPL_SIFIVE_H
#define _SPL_SIFIVE_H
-int spl_soc_init(void);
+int spl_dram_init(void);
#endif /* _SPL_SIFIVE_H */
diff --git a/arch/riscv/include/asm/arch-jh7110/eeprom.h b/arch/riscv/include/asm/arch-jh7110/eeprom.h
index d2776d5..62d184a 100644
--- a/arch/riscv/include/asm/arch-jh7110/eeprom.h
+++ b/arch/riscv/include/asm/arch-jh7110/eeprom.h
@@ -12,4 +12,13 @@
u8 get_pcb_revision_from_eeprom(void);
u32 get_ddr_size_from_eeprom(void);
+/**
+ * get_product_id_from_eeprom - get product ID string
+ *
+ * A string like "VF7110A1-2228-D008E000-00000001" is returned.
+ *
+ * Return: product ID string
+ */
+const char *get_product_id_from_eeprom(void);
+
#endif /* _ASM_RISCV_EEPROM_H */
diff --git a/arch/riscv/include/asm/arch-jh7110/spl.h b/arch/riscv/include/asm/arch-jh7110/spl.h
index 23ce887..d73355b 100644
--- a/arch/riscv/include/asm/arch-jh7110/spl.h
+++ b/arch/riscv/include/asm/arch-jh7110/spl.h
@@ -7,6 +7,6 @@
#ifndef _SPL_STARFIVE_H
#define _SPL_STARFIVE_H
-int spl_soc_init(void);
+int spl_dram_init(void);
#endif /* _SPL_STARFIVE_H */
diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h
index d1113f3..ad32ded 100644
--- a/arch/riscv/include/asm/sbi.h
+++ b/arch/riscv/include/asm/sbi.h
@@ -34,6 +34,7 @@
SBI_EXT_NACL = 0x4E41434C,
SBI_EXT_STA = 0x535441,
SBI_EXT_DBTR = 0x44425452,
+ SBI_EXT_SSE = 0x535345,
};
enum sbi_ext_base_fid {
diff --git a/arch/riscv/lib/boot.c b/arch/riscv/lib/boot.c
index 03014c5..161335a 100644
--- a/arch/riscv/lib/boot.c
+++ b/arch/riscv/lib/boot.c
@@ -4,7 +4,8 @@
* Rick Chen, Andes Technology Corporation <rick@andestech.com>
*/
-#include <asm/u-boot.h>
+#include <linux/types.h>
+#include <asm/u-boot-riscv.h>
unsigned long do_go_exec(ulong (*entry)(int, char * const []),
int argc, char *const argv[])
diff --git a/arch/riscv/lib/interrupts.c b/arch/riscv/lib/interrupts.c
index a26ccc7..7350e2c 100644
--- a/arch/riscv/lib/interrupts.c
+++ b/arch/riscv/lib/interrupts.c
@@ -60,6 +60,40 @@
#endif
}
+#if defined(CONFIG_FRAMEPOINTER) || defined(CONFIG_SPL_FRAMEPOINTER)
+static void show_backtrace(struct pt_regs *regs)
+{
+ uintptr_t *fp = (uintptr_t *)regs->s0;
+ unsigned count = 0;
+ ulong ra;
+
+ printf("backtrace:\n");
+
+ /* there are a few entry points where the s0 register is
+ * set to gd, so to avoid changing those, just abort if
+ * the value is the same */
+ while (fp != NULL && fp != (uintptr_t *)gd) {
+ ra = fp[-1];
+ printf("backtrace %2d: FP: " REG_FMT " RA: " REG_FMT,
+ count, (ulong)fp, ra);
+
+ if (gd && gd->flags & GD_FLG_RELOC)
+ printf(" - RA: " REG_FMT " reloc adjusted\n",
+ ra - gd->reloc_off);
+ else
+ printf("\n");
+
+ fp = (uintptr_t *)fp[-2];
+ count++;
+ }
+}
+#else
+static void show_backtrace(struct pt_regs *regs)
+{
+ printf("No backtrace support enabled\n");
+}
+#endif
+
/**
* instr_len() - get instruction length
*
@@ -131,6 +165,7 @@
epc - gd->reloc_off, regs->ra - gd->reloc_off);
show_regs(regs);
+ show_backtrace(regs);
show_code(epc);
show_efi_loaded_images(epc);
panic("\n");
diff --git a/arch/sandbox/Kconfig b/arch/sandbox/Kconfig
index 0ce77de..1c8353d 100644
--- a/arch/sandbox/Kconfig
+++ b/arch/sandbox/Kconfig
@@ -58,10 +58,15 @@
bool "Reset on crash"
help
If an illegal instruction or an illegal memory access occurs, the
- sandbox by default writes a crash dump and exits. If you set this
- flag, the sandbox is reset instead. This may be useful when running
- test suites like the UEFI self certification test which continue
- with the next test after a crash.
+ sandbox exits with an error by default.
+
+ If the u-boot binary is invoked with --signals (or -S), U-Boot will
+ handle the signal writing a crash dump before exiting.
+
+ If you additionally set the CONFIG_SANDBOX_CRASH_RESET flag, the
+ sandbox is reset after writing the crash dump. This may be useful
+ when running test suites like the UEFI self certification test which
+ continue with the next test after a crash.
config SANDBOX_BITS_PER_LONG
int
diff --git a/arch/sandbox/config.mk b/arch/sandbox/config.mk
index 1d50991..4058438 100644
--- a/arch/sandbox/config.mk
+++ b/arch/sandbox/config.mk
@@ -69,5 +69,3 @@
endif
EFI_CRT0 := crt0_sandbox_efi.o
EFI_RELOC := reloc_sandbox_efi.o
-AFLAGS_crt0_sandbox_efi.o += -DHOST_ARCH="$(HOST_ARCH)"
-CFLAGS_reloc_sandbox_efi.o += -DHOST_ARCH="$(HOST_ARCH)"
diff --git a/arch/sandbox/cpu/eth-raw-os.c b/arch/sandbox/cpu/eth-raw-os.c
index 92c35ae..39ea3b3 100644
--- a/arch/sandbox/cpu/eth-raw-os.c
+++ b/arch/sandbox/cpu/eth-raw-os.c
@@ -105,7 +105,12 @@
/* Make the socket non-blocking */
flags = fcntl(priv->sd, F_GETFL, 0);
- fcntl(priv->sd, F_SETFL, flags | O_NONBLOCK);
+ ret = fcntl(priv->sd, F_SETFL, flags | O_NONBLOCK);
+ if (ret == -1) {
+ printf("Failed to make socket non-blocking: %d %s\n", errno,
+ strerror(errno));
+ return -errno;
+ }
/* Enable promiscuous mode to receive responses meant for us */
mr.mr_ifindex = device->sll_ifindex;
@@ -172,7 +177,12 @@
/* Make the socket non-blocking */
flags = fcntl(priv->sd, F_GETFL, 0);
- fcntl(priv->sd, F_SETFL, flags | O_NONBLOCK);
+ ret = fcntl(priv->sd, F_SETFL, flags | O_NONBLOCK);
+ if (ret == -1) {
+ printf("Failed to make socket non-blocking: %d %s\n", errno,
+ strerror(errno));
+ return -errno;
+ }
/* Include the UDP/IP headers on send and receive */
ret = setsockopt(priv->sd, IPPROTO_IP, IP_HDRINCL, &one,
diff --git a/arch/sandbox/cpu/os.c b/arch/sandbox/cpu/os.c
index cbae510..154a5d7 100644
--- a/arch/sandbox/cpu/os.c
+++ b/arch/sandbox/cpu/os.c
@@ -188,7 +188,7 @@
fd = os_open(fname, OS_O_RDONLY);
if (fd < 0) {
printf("Cannot open file '%s'\n", fname);
- goto err;
+ return -EIO;
}
size = os_filesize(fd);
if (size < 0) {
diff --git a/arch/sandbox/dts/sandbox.dts b/arch/sandbox/dts/sandbox.dts
index 12d3eff..8392206 100644
--- a/arch/sandbox/dts/sandbox.dts
+++ b/arch/sandbox/dts/sandbox.dts
@@ -106,3 +106,7 @@
#if IS_ENABLED(CONFIG_SUPPORT_VPL)
#include "sandbox_vpl.dtsi"
#endif
+
+#if IS_ENABLED(CONFIG_EFI_HAVE_CAPSULE_SUPPORT)
+#include "sandbox_capsule.dtsi"
+#endif
diff --git a/arch/sandbox/dts/sandbox_capsule.dtsi b/arch/sandbox/dts/sandbox_capsule.dtsi
new file mode 100644
index 0000000..34d2991
--- /dev/null
+++ b/arch/sandbox/dts/sandbox_capsule.dtsi
@@ -0,0 +1,169 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Devicetree file with binman nodes needed for generating EFI
+ * capsules.
+ *
+ */
+
+#include <sandbox_efi_capsule.h>
+
+/ {
+ binman: binman {
+ multiple-images;
+ };
+};
+
+&binman {
+ capsule1 {
+ filename = "Test01";
+ efi-capsule {
+ image-index = <0x1>;
+ image-guid = SANDBOX_UBOOT_IMAGE_GUID;
+
+ text {
+ text = "u-boot:New";
+ };
+ };
+ };
+
+ capsule2 {
+ filename = "Test02";
+ efi-capsule {
+ image-index = <0x2>;
+ image-guid = SANDBOX_UBOOT_ENV_IMAGE_GUID;
+
+ text {
+ text = "u-boot-env:New";
+ };
+ };
+ };
+
+ capsule3 {
+ filename = "Test03";
+ efi-capsule {
+ image-index = <0x1>;
+ image-guid = SANDBOX_INCORRECT_GUID;
+
+ text {
+ text = "u-boot:New";
+ };
+ };
+ };
+
+ capsule4 {
+ filename = "Test101";
+ efi-capsule {
+ image-index = <0x1>;
+ fw-version = <0x5>;
+ image-guid = SANDBOX_UBOOT_IMAGE_GUID;
+
+ text {
+ text = "u-boot:New";
+ };
+ };
+ };
+
+ capsule5 {
+ filename = "Test102";
+ efi-capsule {
+ image-index = <0x2>;
+ fw-version = <0xa>;
+ image-guid = SANDBOX_UBOOT_ENV_IMAGE_GUID;
+
+ text {
+ text = "u-boot-env:New";
+ };
+ };
+ };
+
+ capsule6 {
+ filename = "Test103";
+ efi-capsule {
+ image-index = <0x1>;
+ fw-version = <0x2>;
+ image-guid = SANDBOX_UBOOT_IMAGE_GUID;
+
+ text {
+ text = "u-boot:New";
+ };
+ };
+ };
+
+ capsule7 {
+ filename = "Test11";
+ efi-capsule {
+ image-index = <0x1>;
+ image-guid = SANDBOX_UBOOT_IMAGE_GUID;
+ private-key = CAPSULE_PRIV_KEY;
+ public-key-cert = CAPSULE_PUB_KEY;
+ monotonic-count = <0x1>;
+
+ text {
+ text = "u-boot:New";
+ };
+ };
+ };
+
+ capsule8 {
+ filename = "Test12";
+ efi-capsule {
+ image-index = <0x1>;
+ image-guid = SANDBOX_UBOOT_IMAGE_GUID;
+ private-key = CAPSULE_INVAL_KEY;
+ public-key-cert = CAPSULE_INVAL_PUB_KEY;
+ monotonic-count = <0x1>;
+
+ text {
+ text = "u-boot:New";
+ };
+ };
+ };
+
+ capsule9 {
+ filename = "Test111";
+ efi-capsule {
+ image-index = <0x1>;
+ fw-version = <0x5>;
+ image-guid = SANDBOX_UBOOT_IMAGE_GUID;
+ private-key = CAPSULE_PRIV_KEY;
+ public-key-cert = CAPSULE_PUB_KEY;
+ monotonic-count = <0x1>;
+
+ text {
+ text = "u-boot:New";
+ };
+ };
+ };
+
+ capsule10 {
+ filename = "Test112";
+ efi-capsule {
+ image-index = <0x2>;
+ fw-version = <0xa>;
+ image-guid = SANDBOX_UBOOT_ENV_IMAGE_GUID;
+ private-key = CAPSULE_PRIV_KEY;
+ public-key-cert = CAPSULE_PUB_KEY;
+ monotonic-count = <0x1>;
+
+ text {
+ text = "u-boot-env:New";
+ };
+ };
+ };
+
+ capsule11 {
+ filename = "Test113";
+ efi-capsule {
+ image-index = <0x1>;
+ fw-version = <0x2>;
+ image-guid = SANDBOX_UBOOT_IMAGE_GUID;
+ private-key = CAPSULE_PRIV_KEY;
+ public-key-cert = CAPSULE_PUB_KEY;
+ monotonic-count = <0x1>;
+
+ text {
+ text = "u-boot:New";
+ };
+ };
+ };
+};
diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
index e264b29..a012f5c 100644
--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
@@ -1990,4 +1990,8 @@
#include "sandbox_vpl.dtsi"
#endif
+#if IS_ENABLED(CONFIG_EFI_HAVE_CAPSULE_SUPPORT)
+#include "sandbox_capsule.dtsi"
+#endif
+
#include "cedit.dtsi"
diff --git a/arch/sandbox/include/asm/global_data.h b/arch/sandbox/include/asm/global_data.h
index 001b2b5..309422f 100644
--- a/arch/sandbox/include/asm/global_data.h
+++ b/arch/sandbox/include/asm/global_data.h
@@ -10,6 +10,7 @@
#define __ASM_GBL_DATA_H
#include <linux/types.h>
+#include <asm/u-boot.h>
/* Architecture-specific global data */
struct arch_global_data {
diff --git a/arch/sandbox/lib/bootm.c b/arch/sandbox/lib/bootm.c
index 8dbcd9f..44ba8b5 100644
--- a/arch/sandbox/lib/bootm.c
+++ b/arch/sandbox/lib/bootm.c
@@ -85,5 +85,7 @@
int booti_setup(ulong image, ulong *relocated_addr, ulong *size,
bool force_reloc)
{
- return 0;
+ log_err("Booting is not supported on the sandbox.\n");
+
+ return 1;
}
diff --git a/arch/sh/cpu/sh4/cache.c b/arch/sh/cpu/sh4/cache.c
index 0f7dfdd..8c18399 100644
--- a/arch/sh/cpu/sh4/cache.c
+++ b/arch/sh/cpu/sh4/cache.c
@@ -4,7 +4,6 @@
* (C) Copyright 2007 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
*/
-#include <common.h>
#include <command.h>
#include <cpu_func.h>
#include <asm/cache.h>
diff --git a/arch/sh/cpu/sh4/cpu.c b/arch/sh/cpu/sh4/cpu.c
index 1b2f50d..b0ad685 100644
--- a/arch/sh/cpu/sh4/cpu.c
+++ b/arch/sh/cpu/sh4/cpu.c
@@ -4,7 +4,6 @@
* Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
*/
-#include <common.h>
#include <command.h>
#include <irq_func.h>
#include <cpu_func.h>
diff --git a/arch/sh/cpu/sh4/interrupts.c b/arch/sh/cpu/sh4/interrupts.c
index 278a3e3..eace09a 100644
--- a/arch/sh/cpu/sh4/interrupts.c
+++ b/arch/sh/cpu/sh4/interrupts.c
@@ -4,7 +4,6 @@
* Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
*/
-#include <common.h>
#include <irq_func.h>
int interrupt_init(void)
diff --git a/arch/sh/cpu/sh4/watchdog.c b/arch/sh/cpu/sh4/watchdog.c
index bf403d3..c597433 100644
--- a/arch/sh/cpu/sh4/watchdog.c
+++ b/arch/sh/cpu/sh4/watchdog.c
@@ -1,6 +1,5 @@
// SPDX-License-Identifier: GPL-2.0+
-#include <common.h>
#include <cpu_func.h>
#include <asm/processor.h>
#include <asm/system.h>
diff --git a/arch/sh/include/asm/global_data.h b/arch/sh/include/asm/global_data.h
index bd946ff..933c302 100644
--- a/arch/sh/include/asm/global_data.h
+++ b/arch/sh/include/asm/global_data.h
@@ -10,6 +10,8 @@
#ifndef __ASM_SH_GLOBALDATA_H_
#define __ASM_SH_GLOBALDATA_H_
+#include <asm/u-boot.h>
+
/* Architecture-specific global data */
struct arch_global_data {
};
diff --git a/arch/sh/lib/board.c b/arch/sh/lib/board.c
index b31fa6d..53b1c14 100644
--- a/arch/sh/lib/board.c
+++ b/arch/sh/lib/board.c
@@ -3,7 +3,7 @@
* Copyright (C) 2016 Vladimir Zapolskiy <vz@mleia.com>
*/
-#include <common.h>
+#include <config.h>
#include <init.h>
#include <asm/global_data.h>
diff --git a/arch/sh/lib/bootm.c b/arch/sh/lib/bootm.c
index 05d586b..e298d76 100644
--- a/arch/sh/lib/bootm.c
+++ b/arch/sh/lib/bootm.c
@@ -7,7 +7,7 @@
* (c) Copyright 2008 Renesas Solutions Corp.
*/
-#include <common.h>
+#include <config.h>
#include <bootm.h>
#include <command.h>
#include <env.h>
diff --git a/arch/sh/lib/time.c b/arch/sh/lib/time.c
index 19c8e3c..5feb198 100644
--- a/arch/sh/lib/time.c
+++ b/arch/sh/lib/time.c
@@ -10,7 +10,6 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
#include <init.h>
#include <asm/processor.h>
#include <asm/io.h>
diff --git a/arch/sh/lib/time_sh2.c b/arch/sh/lib/time_sh2.c
index 5484c54..0ee7dc7 100644
--- a/arch/sh/lib/time_sh2.c
+++ b/arch/sh/lib/time_sh2.c
@@ -7,7 +7,6 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
#include <init.h>
#include <time.h>
#include <asm/io.h>
diff --git a/arch/sh/lib/zimageboot.c b/arch/sh/lib/zimageboot.c
index c2e285f..e731c6a 100644
--- a/arch/sh/lib/zimageboot.c
+++ b/arch/sh/lib/zimageboot.c
@@ -9,10 +9,10 @@
* Linux SuperH zImage loading and boot
*/
-#include <common.h>
#include <command.h>
#include <env.h>
#include <irq_func.h>
+#include <vsprintf.h>
#include <asm/io.h>
#include <asm/zimage.h>
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 99e59d9..23a1e21 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -723,6 +723,14 @@
hex
default 0x10000
+config X86_HARDFP
+ bool "Support hardware floating point"
+ help
+ U-Boot generally does not make use of floating point. Where this is
+ needed, it can be enabled using this option. This adjusts the
+ start-up code for 64-bit mode and changes the compiler options for
+ 64-bit to enable SSE.
+
config HAVE_ITSS
bool "Enable ITSS"
help
@@ -1053,4 +1061,12 @@
display, memory and build information. It is stored in
struct sysinfo_t after parsing by get_coreboot_info().
+config ZBOOT
+ bool "Support the zImage format"
+ default y
+ help
+ Enable this to support booting the x86-specific zImage format. This
+ uses a special, binary format containing information about the Linux
+ format to boot.
+
endmenu
diff --git a/arch/x86/config.mk b/arch/x86/config.mk
index 26ec1af..2e3a711 100644
--- a/arch/x86/config.mk
+++ b/arch/x86/config.mk
@@ -27,9 +27,13 @@
PLATFORM_CPPFLAGS += -march=i386 -m32
else
PLATFORM_CPPFLAGS += $(if $(CONFIG_SPL_BUILD),,-fpic) -fno-common -march=core2 -m64
+
+ifndef CONFIG_X86_HARDFP
PLATFORM_CPPFLAGS += -mno-mmx -mno-sse
endif
+endif # IS_32BIT
+
PLATFORM_RELFLAGS += -fdata-sections -ffunction-sections -fvisibility=hidden
KBUILD_LDFLAGS += -Bsymbolic -Bsymbolic-functions
diff --git a/arch/x86/cpu/acpi_gpe.c b/arch/x86/cpu/acpi_gpe.c
index da01e71..13fe695 100644
--- a/arch/x86/cpu/acpi_gpe.c
+++ b/arch/x86/cpu/acpi_gpe.c
@@ -6,10 +6,10 @@
#define LOG_CATEGORY UCLASS_IRQ
-#include <common.h>
#include <dm.h>
#include <irq.h>
#include <log.h>
+#include <time.h>
#include <acpi/acpi_device.h>
#include <asm/io.h>
#include <dt-bindings/interrupt-controller/irq.h>
diff --git a/arch/x86/cpu/apollolake/acpi.c b/arch/x86/cpu/apollolake/acpi.c
index c610a7f..76230ae 100644
--- a/arch/x86/cpu/apollolake/acpi.c
+++ b/arch/x86/cpu/apollolake/acpi.c
@@ -10,7 +10,6 @@
#define LOG_CATEGORY LOGC_ACPI
-#include <common.h>
#include <cpu.h>
#include <dm.h>
#include <log.h>
diff --git a/arch/x86/cpu/apollolake/cpu.c b/arch/x86/cpu/apollolake/cpu.c
index 647c9df..f480bb1 100644
--- a/arch/x86/cpu/apollolake/cpu.c
+++ b/arch/x86/cpu/apollolake/cpu.c
@@ -3,7 +3,6 @@
* Copyright 2019 Google LLC
*/
-#include <common.h>
#include <cpu.h>
#include <dm.h>
#include <log.h>
diff --git a/arch/x86/cpu/apollolake/cpu_common.c b/arch/x86/cpu/apollolake/cpu_common.c
index 9a55026..498b306 100644
--- a/arch/x86/cpu/apollolake/cpu_common.c
+++ b/arch/x86/cpu/apollolake/cpu_common.c
@@ -3,7 +3,6 @@
* Copyright 2019 Google LLC
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <asm/cpu_common.h>
diff --git a/arch/x86/cpu/apollolake/cpu_spl.c b/arch/x86/cpu/apollolake/cpu_spl.c
index 8f48457..8798fa7 100644
--- a/arch/x86/cpu/apollolake/cpu_spl.c
+++ b/arch/x86/cpu/apollolake/cpu_spl.c
@@ -5,7 +5,6 @@
* Portions taken from coreboot
*/
-#include <common.h>
#include <dm.h>
#include <ec_commands.h>
#include <init.h>
diff --git a/arch/x86/cpu/apollolake/fsp_bindings.c b/arch/x86/cpu/apollolake/fsp_bindings.c
index fb75e1f..f6fbddc 100644
--- a/arch/x86/cpu/apollolake/fsp_bindings.c
+++ b/arch/x86/cpu/apollolake/fsp_bindings.c
@@ -3,7 +3,6 @@
* Copyright 2020 B&R Industrial Automation GmbH - http://www.br-automation.com
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <asm/arch/fsp_bindings.h>
diff --git a/arch/x86/cpu/apollolake/fsp_m.c b/arch/x86/cpu/apollolake/fsp_m.c
index c6be707..19065e1 100644
--- a/arch/x86/cpu/apollolake/fsp_m.c
+++ b/arch/x86/cpu/apollolake/fsp_m.c
@@ -4,7 +4,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <asm/arch/iomap.h>
diff --git a/arch/x86/cpu/apollolake/fsp_s.c b/arch/x86/cpu/apollolake/fsp_s.c
index a9b13c0..5fca19f 100644
--- a/arch/x86/cpu/apollolake/fsp_s.c
+++ b/arch/x86/cpu/apollolake/fsp_s.c
@@ -4,7 +4,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <binman.h>
#include <bootstage.h>
#include <dm.h>
diff --git a/arch/x86/cpu/apollolake/hostbridge.c b/arch/x86/cpu/apollolake/hostbridge.c
index 2405dec..9ee3622 100644
--- a/arch/x86/cpu/apollolake/hostbridge.c
+++ b/arch/x86/cpu/apollolake/hostbridge.c
@@ -11,7 +11,6 @@
#define LOG_CATEGORY UCLASS_NORTHBRIDGE
-#include <common.h>
#include <dm.h>
#include <dt-structs.h>
#include <log.h>
diff --git a/arch/x86/cpu/apollolake/lpc.c b/arch/x86/cpu/apollolake/lpc.c
index 4be6366..531ff1c 100644
--- a/arch/x86/cpu/apollolake/lpc.c
+++ b/arch/x86/cpu/apollolake/lpc.c
@@ -5,7 +5,6 @@
* From coreboot Apollo Lake support lpc.c
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <spl.h>
diff --git a/arch/x86/cpu/apollolake/pch.c b/arch/x86/cpu/apollolake/pch.c
index a0f9b03..3219031 100644
--- a/arch/x86/cpu/apollolake/pch.c
+++ b/arch/x86/cpu/apollolake/pch.c
@@ -3,7 +3,6 @@
* Copyright 2019 Google LLC
*/
-#include <common.h>
#include <dm.h>
#include <pch.h>
#include <spl.h>
diff --git a/arch/x86/cpu/apollolake/pmc.c b/arch/x86/cpu/apollolake/pmc.c
index 163119e..32fd034 100644
--- a/arch/x86/cpu/apollolake/pmc.c
+++ b/arch/x86/cpu/apollolake/pmc.c
@@ -8,7 +8,6 @@
#define LOG_CATEGORY UCLASS_ACPI_PMC
-#include <common.h>
#include <dm.h>
#include <dt-structs.h>
#include <log.h>
diff --git a/arch/x86/cpu/apollolake/punit.c b/arch/x86/cpu/apollolake/punit.c
index 5ed7963..b1503c2 100644
--- a/arch/x86/cpu/apollolake/punit.c
+++ b/arch/x86/cpu/apollolake/punit.c
@@ -3,10 +3,10 @@
* Copyright 2019 Google LLC
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <spl.h>
+#include <time.h>
#include <asm/cpu.h>
#include <asm/cpu_common.h>
#include <asm/intel_regs.h>
diff --git a/arch/x86/cpu/apollolake/spl.c b/arch/x86/cpu/apollolake/spl.c
index 6078d5a..b351d73 100644
--- a/arch/x86/cpu/apollolake/spl.c
+++ b/arch/x86/cpu/apollolake/spl.c
@@ -5,7 +5,6 @@
#define LOG_CATEGORY LOGC_BOOT
-#include <common.h>
#include <binman_sym.h>
#include <bootstage.h>
#include <dm.h>
diff --git a/arch/x86/cpu/apollolake/systemagent.c b/arch/x86/cpu/apollolake/systemagent.c
index b6bc2ba..f966b90 100644
--- a/arch/x86/cpu/apollolake/systemagent.c
+++ b/arch/x86/cpu/apollolake/systemagent.c
@@ -4,7 +4,6 @@
* Take from coreboot project file of the same name
*/
-#include <common.h>
#include <asm/intel_regs.h>
#include <asm/io.h>
#include <asm/arch/systemagent.h>
diff --git a/arch/x86/cpu/apollolake/uart.c b/arch/x86/cpu/apollolake/uart.c
index a936243..7e4c816 100644
--- a/arch/x86/cpu/apollolake/uart.c
+++ b/arch/x86/cpu/apollolake/uart.c
@@ -7,7 +7,6 @@
* Some code from coreboot lpss.c
*/
-#include <common.h>
#include <dm.h>
#include <dt-structs.h>
#include <malloc.h>
diff --git a/arch/x86/cpu/baytrail/acpi.c b/arch/x86/cpu/baytrail/acpi.c
index ccc4851..7821964 100644
--- a/arch/x86/cpu/baytrail/acpi.c
+++ b/arch/x86/cpu/baytrail/acpi.c
@@ -3,7 +3,6 @@
* Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
*/
-#include <common.h>
#include <cpu.h>
#include <dm.h>
#include <log.h>
diff --git a/arch/x86/cpu/baytrail/cpu.c b/arch/x86/cpu/baytrail/cpu.c
index c270426..7756a1a 100644
--- a/arch/x86/cpu/baytrail/cpu.c
+++ b/arch/x86/cpu/baytrail/cpu.c
@@ -5,7 +5,6 @@
* Based on code from coreboot
*/
-#include <common.h>
#include <cpu.h>
#include <dm.h>
#include <event.h>
diff --git a/arch/x86/cpu/baytrail/early_uart.c b/arch/x86/cpu/baytrail/early_uart.c
index 08dbd55..3736127 100644
--- a/arch/x86/cpu/baytrail/early_uart.c
+++ b/arch/x86/cpu/baytrail/early_uart.c
@@ -3,7 +3,6 @@
* Copyright (C) 2015 Google, Inc
*/
-#include <common.h>
#include <errno.h>
#include <asm/io.h>
diff --git a/arch/x86/cpu/baytrail/fsp_configs.c b/arch/x86/cpu/baytrail/fsp_configs.c
index fb3f946..9eb456f 100644
--- a/arch/x86/cpu/baytrail/fsp_configs.c
+++ b/arch/x86/cpu/baytrail/fsp_configs.c
@@ -5,7 +5,6 @@
* Copyright (C) 2015, Kodak Alaris, Inc
*/
-#include <common.h>
#include <fdtdec.h>
#include <log.h>
#include <asm/fsp1/fsp_support.h>
diff --git a/arch/x86/cpu/baytrail/valleyview.c b/arch/x86/cpu/baytrail/valleyview.c
index f73738c..839ff4d 100644
--- a/arch/x86/cpu/baytrail/valleyview.c
+++ b/arch/x86/cpu/baytrail/valleyview.c
@@ -3,7 +3,6 @@
* Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
*/
-#include <common.h>
#include <init.h>
#include <mmc.h>
#include <pci_ids.h>
@@ -11,6 +10,7 @@
#include <asm/mrccache.h>
#include <asm/post.h>
#include <asm/arch/iomap.h>
+#include <asm/u-boot-x86.h>
#include <linux/bitops.h>
/* GPIO SUS */
diff --git a/arch/x86/cpu/braswell/braswell.c b/arch/x86/cpu/braswell/braswell.c
index 3345049..8cf4b62 100644
--- a/arch/x86/cpu/braswell/braswell.c
+++ b/arch/x86/cpu/braswell/braswell.c
@@ -3,10 +3,10 @@
* Copyright (C) 2017, Bin Meng <bmeng.cn@gmail.com>
*/
-#include <common.h>
#include <init.h>
#include <asm/mrccache.h>
#include <asm/post.h>
+#include <asm/u-boot-x86.h>
int arch_cpu_init(void)
{
diff --git a/arch/x86/cpu/braswell/early_uart.c b/arch/x86/cpu/braswell/early_uart.c
index d78c6b0..8b28d28 100644
--- a/arch/x86/cpu/braswell/early_uart.c
+++ b/arch/x86/cpu/braswell/early_uart.c
@@ -3,7 +3,6 @@
* Copyright (C) 2017, Bin Meng <bmeng.cn@gmail.com>
*/
-#include <common.h>
#include <asm/io.h>
#define PCI_DEV_CONFIG(segbus, dev, fn) ( \
diff --git a/arch/x86/cpu/braswell/fsp_configs.c b/arch/x86/cpu/braswell/fsp_configs.c
index 243298f..aaf3e67 100644
--- a/arch/x86/cpu/braswell/fsp_configs.c
+++ b/arch/x86/cpu/braswell/fsp_configs.c
@@ -3,7 +3,6 @@
* Copyright (C) 2017, Bin Meng <bmeng.cn@gmail.com>
*/
-#include <common.h>
#include <fdtdec.h>
#include <log.h>
#include <asm/fsp1/fsp_support.h>
diff --git a/arch/x86/cpu/broadwell/adsp.c b/arch/x86/cpu/broadwell/adsp.c
index 1fa1823..90b2449 100644
--- a/arch/x86/cpu/broadwell/adsp.c
+++ b/arch/x86/cpu/broadwell/adsp.c
@@ -9,7 +9,6 @@
#define LOG_CATEGORY UCLASS_SYSCON
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <pci.h>
diff --git a/arch/x86/cpu/broadwell/cpu.c b/arch/x86/cpu/broadwell/cpu.c
index cbd4a3b..dc6717e 100644
--- a/arch/x86/cpu/broadwell/cpu.c
+++ b/arch/x86/cpu/broadwell/cpu.c
@@ -5,7 +5,6 @@
* Based on code from coreboot src/soc/intel/broadwell/cpu.c
*/
-#include <common.h>
#include <dm.h>
#include <cpu.h>
#include <event.h>
diff --git a/arch/x86/cpu/broadwell/cpu_from_spl.c b/arch/x86/cpu/broadwell/cpu_from_spl.c
index df5a967..a48be29 100644
--- a/arch/x86/cpu/broadwell/cpu_from_spl.c
+++ b/arch/x86/cpu/broadwell/cpu_from_spl.c
@@ -4,7 +4,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <bloblist.h>
#include <cpu_func.h>
#include <debug_uart.h>
@@ -13,6 +12,7 @@
#include <log.h>
#include <asm/global_data.h>
#include <asm/mtrr.h>
+#include <linux/errno.h>
int misc_init_r(void)
{
diff --git a/arch/x86/cpu/broadwell/cpu_full.c b/arch/x86/cpu/broadwell/cpu_full.c
index 2049dbf..c43fb7a 100644
--- a/arch/x86/cpu/broadwell/cpu_full.c
+++ b/arch/x86/cpu/broadwell/cpu_full.c
@@ -5,7 +5,6 @@
* Based on code from coreboot src/soc/intel/broadwell/cpu.c
*/
-#include <common.h>
#include <dm.h>
#include <cpu.h>
#include <init.h>
diff --git a/arch/x86/cpu/broadwell/iobp.c b/arch/x86/cpu/broadwell/iobp.c
index cb5595c..f8b2a60 100644
--- a/arch/x86/cpu/broadwell/iobp.c
+++ b/arch/x86/cpu/broadwell/iobp.c
@@ -5,7 +5,6 @@
* Modified from coreboot
*/
-#include <common.h>
#include <errno.h>
#include <asm/intel_regs.h>
#include <asm/io.h>
diff --git a/arch/x86/cpu/broadwell/lpc.c b/arch/x86/cpu/broadwell/lpc.c
index d2638a4..b945693 100644
--- a/arch/x86/cpu/broadwell/lpc.c
+++ b/arch/x86/cpu/broadwell/lpc.c
@@ -5,7 +5,6 @@
* From coreboot broadwell support
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <pch.h>
diff --git a/arch/x86/cpu/broadwell/me.c b/arch/x86/cpu/broadwell/me.c
index ae16ce2..3399d82 100644
--- a/arch/x86/cpu/broadwell/me.c
+++ b/arch/x86/cpu/broadwell/me.c
@@ -5,7 +5,6 @@
* Based on code from coreboot src/soc/intel/broadwell/me_status.c
*/
-#include <common.h>
#include <errno.h>
#include <log.h>
#include <asm/arch/me.h>
diff --git a/arch/x86/cpu/broadwell/northbridge.c b/arch/x86/cpu/broadwell/northbridge.c
index 141babc..d67ab03 100644
--- a/arch/x86/cpu/broadwell/northbridge.c
+++ b/arch/x86/cpu/broadwell/northbridge.c
@@ -3,7 +3,6 @@
* Copyright (C) 2011 The Chromium Authors
*/
-#include <common.h>
#include <dm.h>
#include <asm/global_data.h>
#include <asm/io.h>
diff --git a/arch/x86/cpu/broadwell/pch.c b/arch/x86/cpu/broadwell/pch.c
index 37fcddb..2c8b738 100644
--- a/arch/x86/cpu/broadwell/pch.c
+++ b/arch/x86/cpu/broadwell/pch.c
@@ -3,7 +3,6 @@
* Copyright (c) 2016 Google, Inc
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <pch.h>
diff --git a/arch/x86/cpu/broadwell/pinctrl_broadwell.c b/arch/x86/cpu/broadwell/pinctrl_broadwell.c
index 85bd371..b6313c3 100644
--- a/arch/x86/cpu/broadwell/pinctrl_broadwell.c
+++ b/arch/x86/cpu/broadwell/pinctrl_broadwell.c
@@ -3,7 +3,6 @@
* Copyright (C) 2016 Google, Inc
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <fdtdec.h>
diff --git a/arch/x86/cpu/broadwell/power_state.c b/arch/x86/cpu/broadwell/power_state.c
index 62fd2e8..e1d6091 100644
--- a/arch/x86/cpu/broadwell/power_state.c
+++ b/arch/x86/cpu/broadwell/power_state.c
@@ -5,7 +5,6 @@
* Copyright (C) 2016 Google, Inc.
*/
-#include <common.h>
#include <log.h>
#include <pci.h>
#include <asm/io.h>
diff --git a/arch/x86/cpu/broadwell/refcode.c b/arch/x86/cpu/broadwell/refcode.c
index df2df79..653d31d 100644
--- a/arch/x86/cpu/broadwell/refcode.c
+++ b/arch/x86/cpu/broadwell/refcode.c
@@ -6,7 +6,7 @@
* Copyright (c) 2016 Google, Inc
*/
-#include <common.h>
+#include <config.h>
#include <display_options.h>
#include <errno.h>
#include <init.h>
diff --git a/arch/x86/cpu/broadwell/sata.c b/arch/x86/cpu/broadwell/sata.c
index be3c9e7..0f67ba9 100644
--- a/arch/x86/cpu/broadwell/sata.c
+++ b/arch/x86/cpu/broadwell/sata.c
@@ -5,7 +5,6 @@
* From coreboot src/soc/intel/broadwell/sata.c
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <asm/global_data.h>
diff --git a/arch/x86/cpu/broadwell/sdram.c b/arch/x86/cpu/broadwell/sdram.c
index d30ebee..cd534a1 100644
--- a/arch/x86/cpu/broadwell/sdram.c
+++ b/arch/x86/cpu/broadwell/sdram.c
@@ -7,7 +7,6 @@
#define LOG_CATEGORY UCLASS_RAM
-#include <common.h>
#include <dm.h>
#include <init.h>
#include <log.h>
diff --git a/arch/x86/cpu/coreboot/coreboot.c b/arch/x86/cpu/coreboot/coreboot.c
index 82fe4c7..d474c79 100644
--- a/arch/x86/cpu/coreboot/coreboot.c
+++ b/arch/x86/cpu/coreboot/coreboot.c
@@ -5,7 +5,6 @@
* Graeme Russ, graeme.russ@gmail.com.
*/
-#include <common.h>
#include <cpu_func.h>
#include <event.h>
#include <fdtdec.h>
diff --git a/arch/x86/cpu/coreboot/coreboot_spl.c b/arch/x86/cpu/coreboot/coreboot_spl.c
index 3666187..566c65a 100644
--- a/arch/x86/cpu/coreboot/coreboot_spl.c
+++ b/arch/x86/cpu/coreboot/coreboot_spl.c
@@ -3,7 +3,6 @@
* Copyright 2020 Google LLC
*/
-#include <common.h>
#include <init.h>
int dram_init(void)
diff --git a/arch/x86/cpu/coreboot/sdram.c b/arch/x86/cpu/coreboot/sdram.c
index 26352df..013225f 100644
--- a/arch/x86/cpu/coreboot/sdram.c
+++ b/arch/x86/cpu/coreboot/sdram.c
@@ -5,7 +5,6 @@
* Graeme Russ, <graeme.russ@gmail.com>
*/
-#include <common.h>
#include <init.h>
#include <asm/e820.h>
#include <asm/cb_sysinfo.h>
diff --git a/arch/x86/cpu/coreboot/timestamp.c b/arch/x86/cpu/coreboot/timestamp.c
index 3ad611a..ec4003c 100644
--- a/arch/x86/cpu/coreboot/timestamp.c
+++ b/arch/x86/cpu/coreboot/timestamp.c
@@ -5,10 +5,10 @@
* Modified from the coreboot version
*/
-#include <common.h>
#include <bootstage.h>
#include <asm/arch/timestamp.h>
#include <asm/cb_sysinfo.h>
+#include <asm/u-boot-x86.h>
#include <linux/compiler.h>
static struct timestamp_table *ts_table __section(".data");
diff --git a/arch/x86/cpu/cpu.c b/arch/x86/cpu/cpu.c
index ce55efc..c843336 100644
--- a/arch/x86/cpu/cpu.c
+++ b/arch/x86/cpu/cpu.c
@@ -20,7 +20,6 @@
#define LOG_CATEGORY UCLASS_CPU
-#include <common.h>
#include <bootstage.h>
#include <command.h>
#include <cpu_func.h>
diff --git a/arch/x86/cpu/cpu_x86.c b/arch/x86/cpu/cpu_x86.c
index 59da41f..6c53f0e 100644
--- a/arch/x86/cpu/cpu_x86.c
+++ b/arch/x86/cpu/cpu_x86.c
@@ -3,7 +3,6 @@
* Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
*/
-#include <common.h>
#include <cpu.h>
#include <dm.h>
#include <errno.h>
diff --git a/arch/x86/cpu/efi/app.c b/arch/x86/cpu/efi/app.c
index f754489..218a68c 100644
--- a/arch/x86/cpu/efi/app.c
+++ b/arch/x86/cpu/efi/app.c
@@ -3,11 +3,11 @@
* Copyright (c) 2015 Google, Inc
*/
-#include <common.h>
#include <cpu_func.h>
#include <fdtdec.h>
#include <init.h>
#include <netdev.h>
+#include <asm/u-boot-x86.h>
int arch_cpu_init(void)
{
diff --git a/arch/x86/cpu/efi/payload.c b/arch/x86/cpu/efi/payload.c
index 708bfbe..642a87a 100644
--- a/arch/x86/cpu/efi/payload.c
+++ b/arch/x86/cpu/efi/payload.c
@@ -4,7 +4,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <cpu_func.h>
#include <efi.h>
#include <efi_api.h>
@@ -17,6 +16,7 @@
#include <asm/e820.h>
#include <asm/global_data.h>
#include <asm/post.h>
+#include <asm/u-boot-x86.h>
DECLARE_GLOBAL_DATA_PTR;
diff --git a/arch/x86/cpu/efi/sdram.c b/arch/x86/cpu/efi/sdram.c
index 56f3326..6fe4007 100644
--- a/arch/x86/cpu/efi/sdram.c
+++ b/arch/x86/cpu/efi/sdram.c
@@ -3,7 +3,6 @@
* Copyright (c) 2015 Google, Inc
*/
-#include <common.h>
#include <efi.h>
#include <init.h>
#include <asm/global_data.h>
diff --git a/arch/x86/cpu/i386/cpu.c b/arch/x86/cpu/i386/cpu.c
index 8882532..db2727d 100644
--- a/arch/x86/cpu/i386/cpu.c
+++ b/arch/x86/cpu/i386/cpu.c
@@ -18,7 +18,6 @@
* src/arch/x86/lib/cpu.c
*/
-#include <common.h>
#include <cpu_func.h>
#include <init.h>
#include <log.h>
@@ -32,6 +31,7 @@
#include <asm/msr.h>
#include <asm/mtrr.h>
#include <asm/processor-flags.h>
+#include <asm/u-boot-x86.h>
DECLARE_GLOBAL_DATA_PTR;
diff --git a/arch/x86/cpu/i386/interrupt.c b/arch/x86/cpu/i386/interrupt.c
index f3f3527..b3f4214 100644
--- a/arch/x86/cpu/i386/interrupt.c
+++ b/arch/x86/cpu/i386/interrupt.c
@@ -10,7 +10,6 @@
* Copyright (C) 1991, 1992 Linus Torvalds
*/
-#include <common.h>
#include <dm.h>
#include <efi_loader.h>
#include <hang.h>
diff --git a/arch/x86/cpu/intel_common/acpi.c b/arch/x86/cpu/intel_common/acpi.c
index d94ec20..29676b4 100644
--- a/arch/x86/cpu/intel_common/acpi.c
+++ b/arch/x86/cpu/intel_common/acpi.c
@@ -8,7 +8,6 @@
* Modified from coreboot src/soc/intel/common/block/acpi.c
*/
-#include <common.h>
#include <bloblist.h>
#include <cpu.h>
#include <dm.h>
diff --git a/arch/x86/cpu/intel_common/car.S b/arch/x86/cpu/intel_common/car.S
index 00308db..46d9ede 100644
--- a/arch/x86/cpu/intel_common/car.S
+++ b/arch/x86/cpu/intel_common/car.S
@@ -10,7 +10,6 @@
* Copyright (C) 2012 Kyösti Mälkki <kyosti.malkki@gmail.com>
*/
-#include <common.h>
#include <asm/microcode.h>
#include <asm/msr-index.h>
#include <asm/mtrr.h>
diff --git a/arch/x86/cpu/intel_common/cpu.c b/arch/x86/cpu/intel_common/cpu.c
index 8f489e6..e7f4191 100644
--- a/arch/x86/cpu/intel_common/cpu.c
+++ b/arch/x86/cpu/intel_common/cpu.c
@@ -7,7 +7,6 @@
* Some code taken from coreboot cpulib.c
*/
-#include <common.h>
#include <cpu.h>
#include <dm.h>
#include <errno.h>
diff --git a/arch/x86/cpu/intel_common/cpu_from_spl.c b/arch/x86/cpu/intel_common/cpu_from_spl.c
index 1c0dced..48b2ef2 100644
--- a/arch/x86/cpu/intel_common/cpu_from_spl.c
+++ b/arch/x86/cpu/intel_common/cpu_from_spl.c
@@ -3,7 +3,6 @@
* Copyright (c) 2016 Google, Inc
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <handoff.h>
diff --git a/arch/x86/cpu/intel_common/fast_spi.c b/arch/x86/cpu/intel_common/fast_spi.c
index 5d3944d..e1d536b 100644
--- a/arch/x86/cpu/intel_common/fast_spi.c
+++ b/arch/x86/cpu/intel_common/fast_spi.c
@@ -3,7 +3,6 @@
* Copyright 2019 Google LLC
*/
-#include <common.h>
#include <asm/io.h>
#include <asm/cpu_common.h>
#include <asm/fast_spi.h>
diff --git a/arch/x86/cpu/intel_common/generic_wifi.c b/arch/x86/cpu/intel_common/generic_wifi.c
index 61ec539..75fa4e0 100644
--- a/arch/x86/cpu/intel_common/generic_wifi.c
+++ b/arch/x86/cpu/intel_common/generic_wifi.c
@@ -6,7 +6,6 @@
* Modified from coreboot src/drivers/wifi/generic.c
*/
-#include <common.h>
#include <log.h>
#include <acpi/acpigen.h>
#include <acpi/acpi_device.h>
diff --git a/arch/x86/cpu/intel_common/intel_opregion.c b/arch/x86/cpu/intel_common/intel_opregion.c
index 1eed21d..78caff0 100644
--- a/arch/x86/cpu/intel_common/intel_opregion.c
+++ b/arch/x86/cpu/intel_common/intel_opregion.c
@@ -6,7 +6,6 @@
* Modified from coreboot src/soc/intel/gma/opregion.c
*/
-#include <common.h>
#include <binman.h>
#include <bloblist.h>
#include <dm.h>
diff --git a/arch/x86/cpu/intel_common/itss.c b/arch/x86/cpu/intel_common/itss.c
index ec73b3d..6d3184f 100644
--- a/arch/x86/cpu/intel_common/itss.c
+++ b/arch/x86/cpu/intel_common/itss.c
@@ -9,7 +9,6 @@
* Taken from coreboot itss.c
*/
-#include <common.h>
#include <dm.h>
#include <dt-structs.h>
#include <irq.h>
diff --git a/arch/x86/cpu/intel_common/lpc.c b/arch/x86/cpu/intel_common/lpc.c
index af68c0f..f2bdf8c 100644
--- a/arch/x86/cpu/intel_common/lpc.c
+++ b/arch/x86/cpu/intel_common/lpc.c
@@ -3,7 +3,6 @@
* Copyright (c) 2016 Google, Inc
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <fdtdec.h>
diff --git a/arch/x86/cpu/intel_common/lpss.c b/arch/x86/cpu/intel_common/lpss.c
index 26a2d2d..44cd3f0 100644
--- a/arch/x86/cpu/intel_common/lpss.c
+++ b/arch/x86/cpu/intel_common/lpss.c
@@ -7,7 +7,6 @@
* Some code from coreboot lpss.c
*/
-#include <common.h>
#include <dm.h>
#include <pci.h>
#include <asm/io.h>
diff --git a/arch/x86/cpu/intel_common/me_status.c b/arch/x86/cpu/intel_common/me_status.c
index abc5f6f..a09bd50 100644
--- a/arch/x86/cpu/intel_common/me_status.c
+++ b/arch/x86/cpu/intel_common/me_status.c
@@ -5,7 +5,6 @@
* Copyright (C) 2011 The Chromium OS Authors. All rights reserved.
*/
-#include <common.h>
#include <log.h>
#include <asm/arch/me.h>
diff --git a/arch/x86/cpu/intel_common/microcode.c b/arch/x86/cpu/intel_common/microcode.c
index 4d8e1d21..6cad272 100644
--- a/arch/x86/cpu/intel_common/microcode.c
+++ b/arch/x86/cpu/intel_common/microcode.c
@@ -6,7 +6,6 @@
* Microcode update for Intel PIII and later CPUs
*/
-#include <common.h>
#include <errno.h>
#include <fdtdec.h>
#include <log.h>
diff --git a/arch/x86/cpu/intel_common/mrc.c b/arch/x86/cpu/intel_common/mrc.c
index ff959d1..c834c05 100644
--- a/arch/x86/cpu/intel_common/mrc.c
+++ b/arch/x86/cpu/intel_common/mrc.c
@@ -5,17 +5,17 @@
#define LOG_CATEGORY UCLASS_RAM
-#include <common.h>
+#include <config.h>
#include <dm.h>
#include <init.h>
#include <log.h>
#include <spl.h>
#include <syscon.h>
+#include <time.h>
#include <asm/cpu.h>
#include <asm/global_data.h>
#include <asm/gpio.h>
#include <asm/intel_regs.h>
-#include <asm/mrc_common.h>
#include <asm/pch_common.h>
#include <asm/post.h>
#include <asm/arch/me.h>
diff --git a/arch/x86/cpu/intel_common/p2sb.c b/arch/x86/cpu/intel_common/p2sb.c
index e4e53f7..7aad8f8 100644
--- a/arch/x86/cpu/intel_common/p2sb.c
+++ b/arch/x86/cpu/intel_common/p2sb.c
@@ -7,7 +7,6 @@
#define LOG_CATEGORY UCLASS_P2SB
-#include <common.h>
#include <dm.h>
#include <dt-structs.h>
#include <log.h>
diff --git a/arch/x86/cpu/intel_common/pch.c b/arch/x86/cpu/intel_common/pch.c
index af82b64..c4cc478 100644
--- a/arch/x86/cpu/intel_common/pch.c
+++ b/arch/x86/cpu/intel_common/pch.c
@@ -3,7 +3,6 @@
* Copyright (c) 2016 Google, Inc
*/
-#include <common.h>
#include <dm.h>
#include <asm/pch_common.h>
diff --git a/arch/x86/cpu/intel_common/report_platform.c b/arch/x86/cpu/intel_common/report_platform.c
index a361281..a752443 100644
--- a/arch/x86/cpu/intel_common/report_platform.c
+++ b/arch/x86/cpu/intel_common/report_platform.c
@@ -5,12 +5,12 @@
* Copyright (C) 2012 Google Inc.
*/
-#include <common.h>
#include <log.h>
#include <asm/cpu.h>
#include <asm/pci.h>
#include <asm/report_platform.h>
#include <asm/arch/pch.h>
+#include <linux/string.h>
static void report_cpu_info(void)
{
diff --git a/arch/x86/cpu/ioapic.c b/arch/x86/cpu/ioapic.c
index 4f99de6..fa912ba 100644
--- a/arch/x86/cpu/ioapic.c
+++ b/arch/x86/cpu/ioapic.c
@@ -3,7 +3,6 @@
* Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
*/
-#include <common.h>
#include <log.h>
#include <asm/io.h>
#include <asm/ioapic.h>
diff --git a/arch/x86/cpu/irq.c b/arch/x86/cpu/irq.c
index 766b245..d4dd181 100644
--- a/arch/x86/cpu/irq.c
+++ b/arch/x86/cpu/irq.c
@@ -3,7 +3,6 @@
* Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <fdtdec.h>
diff --git a/arch/x86/cpu/ivybridge/bd82x6x.c b/arch/x86/cpu/ivybridge/bd82x6x.c
index 417290f..8ae4798 100644
--- a/arch/x86/cpu/ivybridge/bd82x6x.c
+++ b/arch/x86/cpu/ivybridge/bd82x6x.c
@@ -2,7 +2,6 @@
/*
* Copyright (C) 2014 Google, Inc
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <fdtdec.h>
diff --git a/arch/x86/cpu/ivybridge/cpu.c b/arch/x86/cpu/ivybridge/cpu.c
index e71a10b..d71ab0a 100644
--- a/arch/x86/cpu/ivybridge/cpu.c
+++ b/arch/x86/cpu/ivybridge/cpu.c
@@ -10,7 +10,6 @@
* Copyright (C) 2011 Google Inc.
*/
-#include <common.h>
#include <cpu_func.h>
#include <dm.h>
#include <errno.h>
diff --git a/arch/x86/cpu/ivybridge/early_me.c b/arch/x86/cpu/ivybridge/early_me.c
index bee1671..ac86802 100644
--- a/arch/x86/cpu/ivybridge/early_me.c
+++ b/arch/x86/cpu/ivybridge/early_me.c
@@ -5,7 +5,6 @@
* Copyright (C) 2011 The Chromium OS Authors. All rights reserved.
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <log.h>
diff --git a/arch/x86/cpu/ivybridge/fsp_configs.c b/arch/x86/cpu/ivybridge/fsp_configs.c
index 3c4ea6c..19b6ef2 100644
--- a/arch/x86/cpu/ivybridge/fsp_configs.c
+++ b/arch/x86/cpu/ivybridge/fsp_configs.c
@@ -3,7 +3,6 @@
* Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
*/
-#include <common.h>
#include <fdtdec.h>
#include <log.h>
#include <asm/fsp1/fsp_support.h>
diff --git a/arch/x86/cpu/ivybridge/ivybridge.c b/arch/x86/cpu/ivybridge/ivybridge.c
index eb3f362..81b54bb 100644
--- a/arch/x86/cpu/ivybridge/ivybridge.c
+++ b/arch/x86/cpu/ivybridge/ivybridge.c
@@ -3,10 +3,10 @@
* Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
*/
-#include <common.h>
#include <init.h>
#include <asm/post.h>
#include <asm/processor.h>
+#include <asm/u-boot-x86.h>
int arch_cpu_init(void)
{
diff --git a/arch/x86/cpu/ivybridge/lpc.c b/arch/x86/cpu/ivybridge/lpc.c
index f931d2b..17a47ed 100644
--- a/arch/x86/cpu/ivybridge/lpc.c
+++ b/arch/x86/cpu/ivybridge/lpc.c
@@ -5,7 +5,6 @@
* Copyright (C) 2008-2009 coresystems GmbH
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <fdtdec.h>
diff --git a/arch/x86/cpu/ivybridge/model_206ax.c b/arch/x86/cpu/ivybridge/model_206ax.c
index 3906a69..b72de96 100644
--- a/arch/x86/cpu/ivybridge/model_206ax.c
+++ b/arch/x86/cpu/ivybridge/model_206ax.c
@@ -6,7 +6,6 @@
* Copyright (C) 2011 The Chromium Authors
*/
-#include <common.h>
#include <cpu.h>
#include <dm.h>
#include <fdtdec.h>
diff --git a/arch/x86/cpu/ivybridge/northbridge.c b/arch/x86/cpu/ivybridge/northbridge.c
index 994f8a4..76e52f3 100644
--- a/arch/x86/cpu/ivybridge/northbridge.c
+++ b/arch/x86/cpu/ivybridge/northbridge.c
@@ -6,7 +6,6 @@
* Copyright (C) 2011 The Chromium Authors
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <asm/global_data.h>
diff --git a/arch/x86/cpu/ivybridge/sata.c b/arch/x86/cpu/ivybridge/sata.c
index f47ecdf..4e2484f 100644
--- a/arch/x86/cpu/ivybridge/sata.c
+++ b/arch/x86/cpu/ivybridge/sata.c
@@ -4,7 +4,6 @@
* Copyright (C) 2008-2009 coresystems GmbH
*/
-#include <common.h>
#include <ahci.h>
#include <dm.h>
#include <fdtdec.h>
diff --git a/arch/x86/cpu/ivybridge/sdram.c b/arch/x86/cpu/ivybridge/sdram.c
index 95a826d..bddec6c 100644
--- a/arch/x86/cpu/ivybridge/sdram.c
+++ b/arch/x86/cpu/ivybridge/sdram.c
@@ -11,7 +11,6 @@
#define LOG_CATEGORY UCLASS_RAM
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <fdtdec.h>
diff --git a/arch/x86/cpu/ivybridge/sdram_nop.c b/arch/x86/cpu/ivybridge/sdram_nop.c
index 51dfe23..d20c9a2 100644
--- a/arch/x86/cpu/ivybridge/sdram_nop.c
+++ b/arch/x86/cpu/ivybridge/sdram_nop.c
@@ -3,7 +3,6 @@
* Copyright (c) 2016 Google, Inc
*/
-#include <common.h>
#include <init.h>
#include <asm/global_data.h>
diff --git a/arch/x86/cpu/lapic.c b/arch/x86/cpu/lapic.c
index c069145..55b1b18 100644
--- a/arch/x86/cpu/lapic.c
+++ b/arch/x86/cpu/lapic.c
@@ -6,7 +6,6 @@
* Copyright (C) 2014 Google, Inc
*/
-#include <common.h>
#include <log.h>
#include <asm/io.h>
#include <asm/lapic.h>
diff --git a/arch/x86/cpu/mp_init.c b/arch/x86/cpu/mp_init.c
index a133a5d..aa1f47d 100644
--- a/arch/x86/cpu/mp_init.c
+++ b/arch/x86/cpu/mp_init.c
@@ -5,13 +5,13 @@
* Based on code from the coreboot file of the same name
*/
-#include <common.h>
#include <cpu.h>
#include <dm.h>
#include <errno.h>
#include <log.h>
#include <malloc.h>
#include <qfw.h>
+#include <time.h>
#include <asm/atomic.h>
#include <asm/cpu.h>
#include <asm/global_data.h>
diff --git a/arch/x86/cpu/mtrr.c b/arch/x86/cpu/mtrr.c
index 9c24ae9..50cba5f 100644
--- a/arch/x86/cpu/mtrr.c
+++ b/arch/x86/cpu/mtrr.c
@@ -16,7 +16,6 @@
* since the MTRR registers are sometimes in flux.
*/
-#include <common.h>
#include <cpu_func.h>
#include <log.h>
#include <sort.h>
diff --git a/arch/x86/cpu/pci.c b/arch/x86/cpu/pci.c
index 8a992ed..a7ad57f 100644
--- a/arch/x86/cpu/pci.c
+++ b/arch/x86/cpu/pci.c
@@ -8,7 +8,6 @@
* Daniel Engström, Omicron Ceti AB, <daniel@omicron.se>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <log.h>
diff --git a/arch/x86/cpu/qemu/cpu.c b/arch/x86/cpu/qemu/cpu.c
index 735b656..0708a38 100644
--- a/arch/x86/cpu/qemu/cpu.c
+++ b/arch/x86/cpu/qemu/cpu.c
@@ -3,7 +3,6 @@
* Copyright (C) 2015, Miao Yan <yanmiaobest@gmail.com>
*/
-#include <common.h>
#include <cpu.h>
#include <dm.h>
#include <errno.h>
diff --git a/arch/x86/cpu/qemu/dram.c b/arch/x86/cpu/qemu/dram.c
index d83abf0..62a301c 100644
--- a/arch/x86/cpu/qemu/dram.c
+++ b/arch/x86/cpu/qemu/dram.c
@@ -3,7 +3,6 @@
* Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
*/
-#include <common.h>
#include <init.h>
#include <asm/global_data.h>
#include <asm/post.h>
diff --git a/arch/x86/cpu/qemu/e820.c b/arch/x86/cpu/qemu/e820.c
index ebfe595..17a04f8 100644
--- a/arch/x86/cpu/qemu/e820.c
+++ b/arch/x86/cpu/qemu/e820.c
@@ -6,7 +6,6 @@
* (C) Copyright 2019 Bin Meng <bmeng.cn@gmail.com>
*/
-#include <common.h>
#include <env_internal.h>
#include <malloc.h>
#include <asm/e820.h>
diff --git a/arch/x86/cpu/qemu/qemu.c b/arch/x86/cpu/qemu/qemu.c
index 7041455..262584d 100644
--- a/arch/x86/cpu/qemu/qemu.c
+++ b/arch/x86/cpu/qemu/qemu.c
@@ -3,7 +3,6 @@
* Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
*/
-#include <common.h>
#include <cpu_func.h>
#include <init.h>
#include <pci.h>
@@ -14,6 +13,7 @@
#include <asm/processor.h>
#include <asm/arch/device.h>
#include <asm/arch/qemu.h>
+#include <asm/u-boot-x86.h>
static bool i440fx;
diff --git a/arch/x86/cpu/qfw_cpu.c b/arch/x86/cpu/qfw_cpu.c
index ee00b8f..468df5a 100644
--- a/arch/x86/cpu/qfw_cpu.c
+++ b/arch/x86/cpu/qfw_cpu.c
@@ -3,7 +3,6 @@
* Copyright (C) 2015 Google, Inc
*/
-#include <common.h>
#include <cpu.h>
#include <dm.h>
#include <malloc.h>
diff --git a/arch/x86/cpu/quark/acpi.c b/arch/x86/cpu/quark/acpi.c
index 0e18cea..80e9460 100644
--- a/arch/x86/cpu/quark/acpi.c
+++ b/arch/x86/cpu/quark/acpi.c
@@ -3,13 +3,13 @@
* Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
*/
-#include <common.h>
#include <mapmem.h>
#include <acpi/acpi_table.h>
#include <asm/processor.h>
#include <asm/tables.h>
#include <asm/arch/global_nvs.h>
#include <asm/arch/iomap.h>
+#include <linux/string.h>
static int quark_write_fadt(struct acpi_ctx *ctx,
const struct acpi_writer *entry)
diff --git a/arch/x86/cpu/quark/dram.c b/arch/x86/cpu/quark/dram.c
index ad98f3e..34e5769 100644
--- a/arch/x86/cpu/quark/dram.c
+++ b/arch/x86/cpu/quark/dram.c
@@ -3,7 +3,6 @@
* Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
*/
-#include <common.h>
#include <cpu_func.h>
#include <errno.h>
#include <fdtdec.h>
diff --git a/arch/x86/cpu/quark/hte.c b/arch/x86/cpu/quark/hte.c
index df14779..3cca6bd 100644
--- a/arch/x86/cpu/quark/hte.c
+++ b/arch/x86/cpu/quark/hte.c
@@ -7,7 +7,6 @@
* QuarkSocPkg/QuarkNorthCluster/MemoryInit/Pei
*/
-#include <common.h>
#include <asm/arch/mrc.h>
#include <asm/arch/msg_port.h>
#include "mrc_util.h"
diff --git a/arch/x86/cpu/quark/mrc.c b/arch/x86/cpu/quark/mrc.c
index ce3c2b8..be9c36b 100644
--- a/arch/x86/cpu/quark/mrc.c
+++ b/arch/x86/cpu/quark/mrc.c
@@ -32,9 +32,9 @@
* DRAM unit configuration based on Valleyview MRC.
*/
-#include <common.h>
#include <asm/arch/mrc.h>
#include <asm/arch/msg_port.h>
+#include <asm/u-boot-x86.h>
#include "mrc_util.h"
#include "smc.h"
diff --git a/arch/x86/cpu/quark/mrc_util.c b/arch/x86/cpu/quark/mrc_util.c
index b0bc59b..85408b3 100644
--- a/arch/x86/cpu/quark/mrc_util.c
+++ b/arch/x86/cpu/quark/mrc_util.c
@@ -7,12 +7,12 @@
* QuarkSocPkg/QuarkNorthCluster/MemoryInit/Pei
*/
-#include <common.h>
#include <hang.h>
#include <asm/arch/device.h>
#include <asm/arch/mrc.h>
#include <asm/arch/msg_port.h>
#include <asm/arch/quark.h>
+#include <asm/u-boot-x86.h>
#include "mrc_util.h"
#include "hte.h"
#include "smc.h"
diff --git a/arch/x86/cpu/quark/msg_port.c b/arch/x86/cpu/quark/msg_port.c
index d4f8c08..6261766 100644
--- a/arch/x86/cpu/quark/msg_port.c
+++ b/arch/x86/cpu/quark/msg_port.c
@@ -3,7 +3,6 @@
* Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
*/
-#include <common.h>
#include <asm/arch/device.h>
#include <asm/arch/msg_port.h>
#include <asm/arch/quark.h>
diff --git a/arch/x86/cpu/quark/quark.c b/arch/x86/cpu/quark/quark.c
index 62b83c2..fdf92b2 100644
--- a/arch/x86/cpu/quark/quark.c
+++ b/arch/x86/cpu/quark/quark.c
@@ -3,7 +3,6 @@
* Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
*/
-#include <common.h>
#include <cpu_func.h>
#include <event.h>
#include <init.h>
@@ -19,6 +18,7 @@
#include <asm/arch/device.h>
#include <asm/arch/msg_port.h>
#include <asm/arch/quark.h>
+#include <asm/u-boot-x86.h>
#include <linux/delay.h>
static void quark_setup_mtrr(void)
diff --git a/arch/x86/cpu/quark/smc.c b/arch/x86/cpu/quark/smc.c
index b4b3e12..a7e92b3 100644
--- a/arch/x86/cpu/quark/smc.c
+++ b/arch/x86/cpu/quark/smc.c
@@ -7,11 +7,12 @@
* QuarkSocPkg/QuarkNorthCluster/MemoryInit/Pei
*/
-#include <common.h>
#include <pci.h>
#include <asm/arch/device.h>
#include <asm/arch/mrc.h>
#include <asm/arch/msg_port.h>
+#include <asm/u-boot-x86.h>
+#include <linux/string.h>
#include "mrc_util.h"
#include "hte.h"
#include "smc.h"
diff --git a/arch/x86/cpu/queensbay/fsp_configs.c b/arch/x86/cpu/queensbay/fsp_configs.c
index 381edd0..3b5cbdb 100644
--- a/arch/x86/cpu/queensbay/fsp_configs.c
+++ b/arch/x86/cpu/queensbay/fsp_configs.c
@@ -4,7 +4,6 @@
* Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
*/
-#include <common.h>
#include <asm/fsp1/fsp_support.h>
void fsp_update_configs(struct fsp_config_data *config,
diff --git a/arch/x86/cpu/queensbay/tnc.c b/arch/x86/cpu/queensbay/tnc.c
index 4a00862..7c7eb41 100644
--- a/arch/x86/cpu/queensbay/tnc.c
+++ b/arch/x86/cpu/queensbay/tnc.c
@@ -3,7 +3,6 @@
* Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
*/
-#include <common.h>
#include <dm.h>
#include <init.h>
#include <dm/device-internal.h>
diff --git a/arch/x86/cpu/slimbootloader/sdram.c b/arch/x86/cpu/slimbootloader/sdram.c
index fbb33b2..75ca527 100644
--- a/arch/x86/cpu/slimbootloader/sdram.c
+++ b/arch/x86/cpu/slimbootloader/sdram.c
@@ -3,7 +3,6 @@
* Copyright (C) 2019 Intel Corporation <www.intel.com>
*/
-#include <common.h>
#include <init.h>
#include <asm/global_data.h>
#include <linux/sizes.h>
diff --git a/arch/x86/cpu/slimbootloader/serial.c b/arch/x86/cpu/slimbootloader/serial.c
index d28b280..4c889da 100644
--- a/arch/x86/cpu/slimbootloader/serial.c
+++ b/arch/x86/cpu/slimbootloader/serial.c
@@ -3,7 +3,6 @@
* Copyright (C) 2019 Intel Corporation <www.intel.com>
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <ns16550.h>
diff --git a/arch/x86/cpu/slimbootloader/slimbootloader.c b/arch/x86/cpu/slimbootloader/slimbootloader.c
index ec5b87c..142c934 100644
--- a/arch/x86/cpu/slimbootloader/slimbootloader.c
+++ b/arch/x86/cpu/slimbootloader/slimbootloader.c
@@ -3,7 +3,6 @@
* Copyright (C) 2019 Intel Corporation <www.intel.com>
*/
-#include <common.h>
#include <cpu_func.h>
#include <init.h>
#include <log.h>
diff --git a/arch/x86/cpu/tangier/acpi.c b/arch/x86/cpu/tangier/acpi.c
index 1d37cc9..d4d0ef6 100644
--- a/arch/x86/cpu/tangier/acpi.c
+++ b/arch/x86/cpu/tangier/acpi.c
@@ -5,7 +5,6 @@
* Partially based on acpi.c for other x86 platforms
*/
-#include <common.h>
#include <cpu.h>
#include <dm.h>
#include <mapmem.h>
diff --git a/arch/x86/cpu/tangier/pinmux.c b/arch/x86/cpu/tangier/pinmux.c
index 23bfa7c..6afb864 100644
--- a/arch/x86/cpu/tangier/pinmux.c
+++ b/arch/x86/cpu/tangier/pinmux.c
@@ -3,7 +3,6 @@
* Copyright (c) 2018 Emlid Limited
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <dm/pinctrl.h>
diff --git a/arch/x86/cpu/tangier/sdram.c b/arch/x86/cpu/tangier/sdram.c
index 374b262..6192f22 100644
--- a/arch/x86/cpu/tangier/sdram.c
+++ b/arch/x86/cpu/tangier/sdram.c
@@ -3,7 +3,6 @@
* Copyright (c) 2017 Intel Corporation
*/
-#include <common.h>
#include <init.h>
#include <log.h>
#include <asm/e820.h>
diff --git a/arch/x86/cpu/tangier/sysreset.c b/arch/x86/cpu/tangier/sysreset.c
index b03bc28..f57423a 100644
--- a/arch/x86/cpu/tangier/sysreset.c
+++ b/arch/x86/cpu/tangier/sysreset.c
@@ -5,7 +5,6 @@
* Reset driver for tangier processor
*/
-#include <common.h>
#include <dm.h>
#include <sysreset.h>
#include <asm/scu.h>
diff --git a/arch/x86/cpu/tangier/tangier.c b/arch/x86/cpu/tangier/tangier.c
index 1e2f6cc..8a8f7d2 100644
--- a/arch/x86/cpu/tangier/tangier.c
+++ b/arch/x86/cpu/tangier/tangier.c
@@ -3,7 +3,6 @@
* Copyright (c) 2017 Intel Corporation
*/
-#include <common.h>
#include <cpu_func.h>
#include <init.h>
#include <asm/u-boot-x86.h>
diff --git a/arch/x86/cpu/turbo.c b/arch/x86/cpu/turbo.c
index e2c84cd..c9b402c 100644
--- a/arch/x86/cpu/turbo.c
+++ b/arch/x86/cpu/turbo.c
@@ -5,7 +5,6 @@
* Copyright (C) 2011 The Chromium Authors.
*/
-#include <common.h>
#include <log.h>
#include <asm/cpu.h>
#include <asm/global_data.h>
diff --git a/arch/x86/cpu/x86_64/cpu.c b/arch/x86/cpu/x86_64/cpu.c
index 2647bff..80eab71 100644
--- a/arch/x86/cpu/x86_64/cpu.c
+++ b/arch/x86/cpu/x86_64/cpu.c
@@ -4,12 +4,12 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <cpu_func.h>
#include <debug_uart.h>
#include <init.h>
#include <asm/cpu.h>
#include <asm/global_data.h>
+#include <asm/processor-flags.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -39,11 +39,22 @@
return 0;
}
+/* enable SSE features for hardware floating point */
+static void setup_sse_features(void)
+{
+ asm ("mov %%cr4, %%rax\n" \
+ "or %0, %%rax\n" \
+ "mov %%rax, %%cr4\n" \
+ : : "i" (X86_CR4_OSFXSR | X86_CR4_OSXMMEXCPT) : "eax");
+}
+
int x86_cpu_reinit_f(void)
{
/* set the vendor to Intel so that native_calibrate_tsc() works */
gd->arch.x86_vendor = X86_VENDOR_INTEL;
gd->arch.has_mtrr = true;
+ if (IS_ENABLED(CONFIG_X86_HARDFP))
+ setup_sse_features();
return 0;
}
diff --git a/arch/x86/cpu/x86_64/interrupts.c b/arch/x86/cpu/x86_64/interrupts.c
index 634f766..b84ff79 100644
--- a/arch/x86/cpu/x86_64/interrupts.c
+++ b/arch/x86/cpu/x86_64/interrupts.c
@@ -4,7 +4,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <irq_func.h>
#include <asm/processor-flags.h>
diff --git a/arch/x86/cpu/x86_64/misc.c b/arch/x86/cpu/x86_64/misc.c
index 691b67f..294511e 100644
--- a/arch/x86/cpu/x86_64/misc.c
+++ b/arch/x86/cpu/x86_64/misc.c
@@ -4,7 +4,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <init.h>
DECLARE_GLOBAL_DATA_PTR;
diff --git a/arch/x86/dts/coreboot.dts b/arch/x86/dts/coreboot.dts
index dfce7c2..b867468 100644
--- a/arch/x86/dts/coreboot.dts
+++ b/arch/x86/dts/coreboot.dts
@@ -46,6 +46,16 @@
compatible = "coreboot-fb";
};
+ bootstd {
+ compatible = "u-boot,boot-std";
+
+ theme {
+ font-size = <30>;
+ menu-inset = <3>;
+ menuitem-gap-y = <1>;
+ };
+ };
+
sysinfo {
compatible = "coreboot,sysinfo";
};
diff --git a/arch/x86/include/asm/arch-quark/mrc.h b/arch/x86/include/asm/arch-quark/mrc.h
index 2353426..40c92a5 100644
--- a/arch/x86/include/asm/arch-quark/mrc.h
+++ b/arch/x86/include/asm/arch-quark/mrc.h
@@ -10,6 +10,8 @@
#ifndef _MRC_H_
#define _MRC_H_
+#include <linux/types.h>
+
#define MRC_VERSION 0x0111
/* architectural definitions */
diff --git a/arch/x86/include/asm/arch-quark/msg_port.h b/arch/x86/include/asm/arch-quark/msg_port.h
index 9527fda..98a9360 100644
--- a/arch/x86/include/asm/arch-quark/msg_port.h
+++ b/arch/x86/include/asm/arch-quark/msg_port.h
@@ -34,6 +34,8 @@
#ifndef __ASSEMBLY__
+#include <linux/types.h>
+
/**
* msg_port_setup - set up the message port control register
*
diff --git a/arch/x86/include/asm/arch-quark/quark.h b/arch/x86/include/asm/arch-quark/quark.h
index feca198..dec30e2 100644
--- a/arch/x86/include/asm/arch-quark/quark.h
+++ b/arch/x86/include/asm/arch-quark/quark.h
@@ -71,6 +71,8 @@
#ifndef __ASSEMBLY__
+#include <linux/types.h>
+
/* variable range MTRR usage */
enum {
MTRR_VAR_ROM,
diff --git a/arch/x86/include/asm/cb_sysinfo.h b/arch/x86/include/asm/cb_sysinfo.h
index 12fa395..5864b27 100644
--- a/arch/x86/include/asm/cb_sysinfo.h
+++ b/arch/x86/include/asm/cb_sysinfo.h
@@ -9,6 +9,7 @@
#define _COREBOOT_SYSINFO_H
#include <asm/coreboot_tables.h>
+#include <linux/types.h>
/* Maximum number of memory range definitions */
#define SYSINFO_MAX_MEM_RANGES 32
diff --git a/arch/x86/include/asm/coreboot_tables.h b/arch/x86/include/asm/coreboot_tables.h
index 0dfb64b..54aeffb 100644
--- a/arch/x86/include/asm/coreboot_tables.h
+++ b/arch/x86/include/asm/coreboot_tables.h
@@ -8,6 +8,9 @@
#ifndef _COREBOOT_TABLES_H
#define _COREBOOT_TABLES_H
+#include <linux/kernel.h>
+#include <linux/types.h>
+
struct timestamp_entry {
u32 entry_id;
u64 entry_stamp;
diff --git a/arch/x86/include/asm/early_cmos.h b/arch/x86/include/asm/early_cmos.h
index 543a9e6..007aeb7 100644
--- a/arch/x86/include/asm/early_cmos.h
+++ b/arch/x86/include/asm/early_cmos.h
@@ -6,6 +6,8 @@
#ifndef __EARLY_CMOS_H
#define __EARLY_CMOS_H
+#include <linux/types.h>
+
/* CMOS actually resides in the RTC SRAM */
#define CMOS_IO_PORT 0x70
diff --git a/arch/x86/include/asm/global_data.h b/arch/x86/include/asm/global_data.h
index 1ef7f1f..06bd80c 100644
--- a/arch/x86/include/asm/global_data.h
+++ b/arch/x86/include/asm/global_data.h
@@ -12,6 +12,7 @@
#include <linux/types.h>
#include <asm/processor.h>
#include <asm/mrccache.h>
+#include <asm/u-boot.h>
enum pei_boot_mode_t {
PEI_BOOT_NONE = 0,
diff --git a/arch/x86/include/asm/handoff.h b/arch/x86/include/asm/handoff.h
index aec49b9..5f66919 100644
--- a/arch/x86/include/asm/handoff.h
+++ b/arch/x86/include/asm/handoff.h
@@ -9,6 +9,8 @@
#ifndef __x86_asm_handoff_h
#define __x86_asm_handoff_h
+#include <linux/types.h>
+
/**
* struct arch_spl_handoff - architecture-specific handoff info
*
diff --git a/arch/x86/include/asm/me_common.h b/arch/x86/include/asm/me_common.h
index 8570368..aa47859 100644
--- a/arch/x86/include/asm/me_common.h
+++ b/arch/x86/include/asm/me_common.h
@@ -13,6 +13,7 @@
#define __ASM_ME_COMMON_H
#include <linux/compiler.h>
+#include <linux/string.h>
#include <linux/types.h>
#include <pci.h>
diff --git a/arch/x86/include/asm/mp.h b/arch/x86/include/asm/mp.h
index f4c4d6c..7c08f7a 100644
--- a/arch/x86/include/asm/mp.h
+++ b/arch/x86/include/asm/mp.h
@@ -11,6 +11,7 @@
#include <asm/atomic.h>
#include <asm/cache.h>
#include <linux/bitops.h>
+#include <linux/errno.h>
struct udevice;
diff --git a/arch/x86/include/asm/zimage.h b/arch/x86/include/asm/zimage.h
index 655675b..8b54260 100644
--- a/arch/x86/include/asm/zimage.h
+++ b/arch/x86/include/asm/zimage.h
@@ -30,6 +30,78 @@
#define BZIMAGE_LOAD_ADDR 0x100000
#define ZIMAGE_LOAD_ADDR 0x10000
+enum {
+ ZBOOT_STATE_START = BIT(0),
+ ZBOOT_STATE_LOAD = BIT(1),
+ ZBOOT_STATE_SETUP = BIT(2),
+ ZBOOT_STATE_INFO = BIT(3),
+ ZBOOT_STATE_GO = BIT(4),
+
+ /* This one doesn't execute automatically, so stop the count before 5 */
+ ZBOOT_STATE_DUMP = BIT(5),
+ ZBOOT_STATE_COUNT = 5,
+};
+
+/**
+ * struct zboot_state - Current state of the boot
+ *
+ * @bzimage_addr: Address of the bzImage to boot, or 0 if the image has already
+ * been loaded and does not exist (as a cohesive whole) in memory
+ * @bzimage_size: Size of the bzImage, or 0 to detect this
+ * @initrd_addr: Address of the initial ramdisk, or 0 if none
+ * @initrd_size: Size of the initial ramdisk, or 0 if none
+ * @load_address: Address where the bzImage is moved before booting, either
+ * BZIMAGE_LOAD_ADDR or ZIMAGE_LOAD_ADDR
+ * This is set up when loading the zimage
+ * @base_ptr: Pointer to the boot parameters, typically at address
+ * DEFAULT_SETUP_BASE
+ * This is set up when loading the zimage
+ * @cmdline: Environment variable containing the 'override' command line, or
+ * NULL to use the one in the setup block
+ */
+struct zboot_state {
+ ulong bzimage_addr;
+ ulong bzimage_size;
+ ulong initrd_addr;
+ ulong initrd_size;
+ ulong load_address;
+ struct boot_params *base_ptr;
+ const char *cmdline;
+};
+
+extern struct zboot_state state;
+
+/**
+ * zimage_dump() - Dump information about a zimage
+ *
+ * @base_ptr: Pointer to the boot parameters
+ * @show_cmdline: true to show the kernel command line
+ */
+void zimage_dump(struct boot_params *base_ptr, bool show_cmdline);
+
+/**
+ * zboot_load() - Load a zimage
+ *
+ * Load the zimage into the correct place
+ *
+ * Return: 0 if OK, -ve on error
+ */
+int zboot_load(void);
+
+/**
+ * zboot_setup() - Set up the zboot image reeady for booting
+ *
+ * Return: 0 if OK, -ve on error
+ */
+int zboot_setup(void);
+
+/**
+ * zboot_go() - Start the image
+ *
+ * Return: 0 if OK, -ve on error
+ */
+int zboot_go(void);
+
/**
* load_zimage() - Load a zImage or bzImage
*
@@ -62,4 +134,29 @@
int setup_zimage(struct boot_params *setup_base, char *cmd_line, int auto_boot,
ulong initrd_addr, ulong initrd_size, ulong cmdline_force);
+/**
+ * zboot_start() - Prepare to boot a zimage
+ *
+ * Record information about a zimage so it can be booted
+ *
+ * @bzimage_addr: Address of the bzImage to boot
+ * @bzimage_size: Size of the bzImage, or 0 to detect this
+ * @initrd_addr: Address of the initial ramdisk, or 0 if none
+ * @initrd_size: Size of the initial ramdisk, or 0 if none
+ * @base_addr: If non-zero, this indicates that the boot parameters have already
+ * been loaded by the caller to this address, so the load_zimage() call
+ * in zboot_load() will be skipped when booting
+ * @cmdline: Environment variable containing the 'override' command line, or
+ * NULL to use the one in the setup block
+ */
+void zboot_start(ulong bzimage_addr, ulong bzimage_size, ulong initrd_addr,
+ ulong initrd_size, ulong base_addr, const char *cmdline);
+
+/**
+ * zboot_info() - Show simple info about a zimage
+ *
+ * Shows wherer the kernel was loaded and also the setup base
+ */
+void zboot_info(void);
+
#endif
diff --git a/arch/x86/lib/Makefile b/arch/x86/lib/Makefile
index 90a7618..8fc35e1 100644
--- a/arch/x86/lib/Makefile
+++ b/arch/x86/lib/Makefile
@@ -48,7 +48,7 @@
endif
obj-y += tables.o
ifndef CONFIG_SPL_BUILD
-obj-$(CONFIG_CMD_ZBOOT) += zimage.o
+obj-$(CONFIG_ZBOOT) += zimage.o
endif
obj-$(CONFIG_USE_HOB) += hob.o
ifndef CONFIG_TPL_BUILD
diff --git a/arch/x86/lib/acpi.c b/arch/x86/lib/acpi.c
index 155fffa..a73a253 100644
--- a/arch/x86/lib/acpi.c
+++ b/arch/x86/lib/acpi.c
@@ -3,7 +3,6 @@
* Copyright (C) 2018, Bin Meng <bmeng.cn@gmail.com>
*/
-#include <common.h>
#include <log.h>
#include <acpi/acpi_table.h>
#include <asm/io.h>
diff --git a/arch/x86/lib/acpi_nhlt.c b/arch/x86/lib/acpi_nhlt.c
index 08e13fd..880ef31 100644
--- a/arch/x86/lib/acpi_nhlt.c
+++ b/arch/x86/lib/acpi_nhlt.c
@@ -7,7 +7,6 @@
#define LOG_CATEGORY LOGC_ACPI
-#include <common.h>
#include <binman.h>
#include <dm.h>
#include <log.h>
diff --git a/arch/x86/lib/acpi_s3.c b/arch/x86/lib/acpi_s3.c
index 2c70acb..3a1e331 100644
--- a/arch/x86/lib/acpi_s3.c
+++ b/arch/x86/lib/acpi_s3.c
@@ -3,7 +3,6 @@
* Copyright (C) 2017, Bin Meng <bmeng.cn@gmail.com>
*/
-#include <common.h>
#include <acpi/acpi_s3.h>
#include <acpi/acpi_table.h>
#include <asm/acpi.h>
diff --git a/arch/x86/lib/acpi_table.c b/arch/x86/lib/acpi_table.c
index a568313..a42a7e6 100644
--- a/arch/x86/lib/acpi_table.c
+++ b/arch/x86/lib/acpi_table.c
@@ -8,7 +8,6 @@
#define LOG_CATEGORY LOGC_ACPI
-#include <common.h>
#include <bloblist.h>
#include <cpu.h>
#include <dm.h>
diff --git a/arch/x86/lib/acpigen.c b/arch/x86/lib/acpigen.c
index ea2ec2a..b486f8f 100644
--- a/arch/x86/lib/acpigen.c
+++ b/arch/x86/lib/acpigen.c
@@ -3,7 +3,6 @@
* Copyright (C) 2020 Google LLC
*/
-#include <common.h>
#include <acpi/acpigen.h>
#include <acpi/acpi_table.h>
#include <asm/acpigen.h>
diff --git a/arch/x86/lib/asm-offsets.c b/arch/x86/lib/asm-offsets.c
index 8df67db..7b2905d 100644
--- a/arch/x86/lib/asm-offsets.c
+++ b/arch/x86/lib/asm-offsets.c
@@ -11,7 +11,6 @@
* #defines from the assembly-language output.
*/
-#include <common.h>
#include <asm/global_data.h>
#include <linux/kbuild.h>
diff --git a/arch/x86/lib/bdinfo.c b/arch/x86/lib/bdinfo.c
index 1240584..165e8ab 100644
--- a/arch/x86/lib/bdinfo.c
+++ b/arch/x86/lib/bdinfo.c
@@ -5,7 +5,6 @@
* Copyright 2021 Google LLC
*/
-#include <common.h>
#include <efi.h>
#include <init.h>
#include <asm/cpu.h>
diff --git a/arch/x86/lib/bios.c b/arch/x86/lib/bios.c
index f146bbd..03f7360 100644
--- a/arch/x86/lib/bios.c
+++ b/arch/x86/lib/bios.c
@@ -5,7 +5,6 @@
* Copyright (C) 2007 Advanced Micro Devices, Inc.
* Copyright (C) 2009-2010 coresystems GmbH
*/
-#include <common.h>
#include <compiler.h>
#include <bios_emul.h>
#include <irq_func.h>
diff --git a/arch/x86/lib/bios_interrupts.c b/arch/x86/lib/bios_interrupts.c
index d6b4da7..b2cf152 100644
--- a/arch/x86/lib/bios_interrupts.c
+++ b/arch/x86/lib/bios_interrupts.c
@@ -7,7 +7,6 @@
* Copyright (C) 2007-2009 coresystems GmbH
*/
-#include <common.h>
#include <log.h>
#include <asm/pci.h>
#include "bios_emul.h"
diff --git a/arch/x86/lib/bootm.c b/arch/x86/lib/bootm.c
index 050c420..2c889bc 100644
--- a/arch/x86/lib/bootm.c
+++ b/arch/x86/lib/bootm.c
@@ -7,7 +7,6 @@
* Copyright (C) 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl)
*/
-#include <common.h>
#include <bootm.h>
#include <bootstage.h>
#include <command.h>
diff --git a/arch/x86/lib/cmd_boot.c b/arch/x86/lib/cmd_boot.c
index 4facbe5..0444a5f 100644
--- a/arch/x86/lib/cmd_boot.c
+++ b/arch/x86/lib/cmd_boot.c
@@ -14,7 +14,6 @@
* Marius Groeger <mgroeger@sysgo.de>
*/
-#include <common.h>
#include <command.h>
#include <malloc.h>
#include <asm/global_data.h>
diff --git a/arch/x86/lib/coreboot/cb_support.c b/arch/x86/lib/coreboot/cb_support.c
index ebb45cd..b4d5fa4 100644
--- a/arch/x86/lib/coreboot/cb_support.c
+++ b/arch/x86/lib/coreboot/cb_support.c
@@ -5,9 +5,9 @@
* Copyright 2021 Google LLC
*/
-#include <common.h>
#include <asm/cb_sysinfo.h>
#include <asm/e820.h>
+#include <linux/kernel.h>
unsigned int cb_install_e820_map(unsigned int max_entries,
struct e820_entry *entries)
diff --git a/arch/x86/lib/coreboot/cb_sysinfo.c b/arch/x86/lib/coreboot/cb_sysinfo.c
index f7fd9ea..ec997fa 100644
--- a/arch/x86/lib/coreboot/cb_sysinfo.c
+++ b/arch/x86/lib/coreboot/cb_sysinfo.c
@@ -6,12 +6,12 @@
* Copyright (C) 2009 coresystems GmbH
*/
-#include <common.h>
#include <asm/cb_sysinfo.h>
#include <init.h>
#include <mapmem.h>
#include <net.h>
#include <asm/global_data.h>
+#include <linux/errno.h>
DECLARE_GLOBAL_DATA_PTR;
diff --git a/arch/x86/lib/coreboot_table.c b/arch/x86/lib/coreboot_table.c
index 05519d8..33fce5d 100644
--- a/arch/x86/lib/coreboot_table.c
+++ b/arch/x86/lib/coreboot_table.c
@@ -3,7 +3,6 @@
* Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
*/
-#include <common.h>
#include <malloc.h>
#include <net.h>
#include <vesa.h>
diff --git a/arch/x86/lib/div64.c b/arch/x86/lib/div64.c
index 2bea205..57da889 100644
--- a/arch/x86/lib/div64.c
+++ b/arch/x86/lib/div64.c
@@ -6,7 +6,7 @@
* Copyright 2014 Google Inc.
*/
-#include <common.h>
+#include <linux/types.h>
union overlay64 {
u64 longw;
diff --git a/arch/x86/lib/e820.c b/arch/x86/lib/e820.c
index 12fcff1..122b4f7 100644
--- a/arch/x86/lib/e820.c
+++ b/arch/x86/lib/e820.c
@@ -3,7 +3,6 @@
* Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
*/
-#include <common.h>
#include <efi_loader.h>
#include <asm/e820.h>
#include <asm/global_data.h>
diff --git a/arch/x86/lib/early_cmos.c b/arch/x86/lib/early_cmos.c
index f7b3bb2..5635d08 100644
--- a/arch/x86/lib/early_cmos.c
+++ b/arch/x86/lib/early_cmos.c
@@ -10,7 +10,6 @@
* uclass write ops, that data is stored in little-endian mode.
*/
-#include <common.h>
#include <asm/early_cmos.h>
#include <asm/io.h>
diff --git a/arch/x86/lib/fsp/fsp_common.c b/arch/x86/lib/fsp/fsp_common.c
index 8f2977a..c47e6ca 100644
--- a/arch/x86/lib/fsp/fsp_common.c
+++ b/arch/x86/lib/fsp/fsp_common.c
@@ -3,7 +3,6 @@
* Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
*/
-#include <common.h>
#include <cpu_func.h>
#include <dm.h>
#include <errno.h>
diff --git a/arch/x86/lib/fsp/fsp_dram.c b/arch/x86/lib/fsp/fsp_dram.c
index cc889a6..730721d 100644
--- a/arch/x86/lib/fsp/fsp_dram.c
+++ b/arch/x86/lib/fsp/fsp_dram.c
@@ -3,7 +3,6 @@
* Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
*/
-#include <common.h>
#include <handoff.h>
#include <init.h>
#include <log.h>
diff --git a/arch/x86/lib/fsp/fsp_graphics.c b/arch/x86/lib/fsp/fsp_graphics.c
index 09d5da8..5f77012 100644
--- a/arch/x86/lib/fsp/fsp_graphics.c
+++ b/arch/x86/lib/fsp/fsp_graphics.c
@@ -5,7 +5,6 @@
#define LOG_CATEGORY UCLASS_VIDEO
-#include <common.h>
#include <dm.h>
#include <init.h>
#include <log.h>
diff --git a/arch/x86/lib/fsp/fsp_support.c b/arch/x86/lib/fsp/fsp_support.c
index fd4d98e..19f9f65 100644
--- a/arch/x86/lib/fsp/fsp_support.c
+++ b/arch/x86/lib/fsp/fsp_support.c
@@ -4,7 +4,6 @@
* Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
*/
-#include <common.h>
#include <log.h>
#include <asm/fsp/fsp_support.h>
#include <asm/post.h>
diff --git a/arch/x86/lib/fsp1/fsp_common.c b/arch/x86/lib/fsp1/fsp_common.c
index df18f47..ebf655a 100644
--- a/arch/x86/lib/fsp1/fsp_common.c
+++ b/arch/x86/lib/fsp1/fsp_common.c
@@ -3,7 +3,6 @@
* Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <init.h>
diff --git a/arch/x86/lib/fsp1/fsp_dram.c b/arch/x86/lib/fsp1/fsp_dram.c
index eee9ce5..f3a8134 100644
--- a/arch/x86/lib/fsp1/fsp_dram.c
+++ b/arch/x86/lib/fsp1/fsp_dram.c
@@ -3,7 +3,6 @@
* Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
*/
-#include <common.h>
#include <init.h>
#include <asm/fsp/fsp_support.h>
#include <asm/global_data.h>
diff --git a/arch/x86/lib/fsp1/fsp_support.c b/arch/x86/lib/fsp1/fsp_support.c
index d84c632..6e311a1 100644
--- a/arch/x86/lib/fsp1/fsp_support.c
+++ b/arch/x86/lib/fsp1/fsp_support.c
@@ -4,7 +4,6 @@
* Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
*/
-#include <common.h>
#include <log.h>
#include <asm/fsp1/fsp_support.h>
#include <asm/post.h>
diff --git a/arch/x86/lib/fsp2/fsp_common.c b/arch/x86/lib/fsp2/fsp_common.c
index d802a86..45a274c 100644
--- a/arch/x86/lib/fsp2/fsp_common.c
+++ b/arch/x86/lib/fsp2/fsp_common.c
@@ -4,7 +4,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <init.h>
#include <asm/fsp/fsp_support.h>
diff --git a/arch/x86/lib/fsp2/fsp_dram.c b/arch/x86/lib/fsp2/fsp_dram.c
index a143223..83c6d7b 100644
--- a/arch/x86/lib/fsp2/fsp_dram.c
+++ b/arch/x86/lib/fsp2/fsp_dram.c
@@ -6,7 +6,6 @@
#define LOG_CATEGORY LOGC_ARCH
-#include <common.h>
#include <handoff.h>
#include <init.h>
#include <log.h>
diff --git a/arch/x86/lib/fsp2/fsp_init.c b/arch/x86/lib/fsp2/fsp_init.c
index aadc08c..ecbadaa 100644
--- a/arch/x86/lib/fsp2/fsp_init.c
+++ b/arch/x86/lib/fsp2/fsp_init.c
@@ -3,7 +3,6 @@
* Copyright 2019 Google LLC
*/
-#include <common.h>
#include <binman.h>
#include <binman_sym.h>
#include <bootstage.h>
diff --git a/arch/x86/lib/fsp2/fsp_meminit.c b/arch/x86/lib/fsp2/fsp_meminit.c
index 022e2cb..f481783 100644
--- a/arch/x86/lib/fsp2/fsp_meminit.c
+++ b/arch/x86/lib/fsp2/fsp_meminit.c
@@ -6,7 +6,6 @@
* Mostly taken from coreboot fsp2_0/memory_init.c
*/
-#include <common.h>
#include <binman.h>
#include <bootstage.h>
#include <dm.h>
diff --git a/arch/x86/lib/fsp2/fsp_silicon_init.c b/arch/x86/lib/fsp2/fsp_silicon_init.c
index a96d2b1..16d30c2 100644
--- a/arch/x86/lib/fsp2/fsp_silicon_init.c
+++ b/arch/x86/lib/fsp2/fsp_silicon_init.c
@@ -8,7 +8,6 @@
#define LOG_CATEGORY UCLASS_NORTHBRIDGE
-#include <common.h>
#include <binman.h>
#include <bootstage.h>
#include <dm.h>
diff --git a/arch/x86/lib/fsp2/fsp_support.c b/arch/x86/lib/fsp2/fsp_support.c
index b2c7658..808f0eb 100644
--- a/arch/x86/lib/fsp2/fsp_support.c
+++ b/arch/x86/lib/fsp2/fsp_support.c
@@ -4,7 +4,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <dm.h>
#include <init.h>
#include <log.h>
diff --git a/arch/x86/lib/hob.c b/arch/x86/lib/hob.c
index b35248e..46e83aa 100644
--- a/arch/x86/lib/hob.c
+++ b/arch/x86/lib/hob.c
@@ -4,7 +4,6 @@
* Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
*/
-#include <common.h>
#include <asm/hob.h>
/**
diff --git a/arch/x86/lib/i8254.c b/arch/x86/lib/i8254.c
index a8d1db1..8a590c6 100644
--- a/arch/x86/lib/i8254.c
+++ b/arch/x86/lib/i8254.c
@@ -4,10 +4,10 @@
* Daniel Engström, Omicron Ceti AB, <daniel@omicron.se>
*/
-#include <common.h>
#include <asm/io.h>
#include <asm/i8254.h>
#include <asm/ibmpc.h>
+#include <linux/errno.h>
#define TIMER1_VALUE 18 /* 15.6us */
#define BEEP_FREQUENCY_HZ 440
diff --git a/arch/x86/lib/i8259.c b/arch/x86/lib/i8259.c
index a0e3c09..465ff70 100644
--- a/arch/x86/lib/i8259.c
+++ b/arch/x86/lib/i8259.c
@@ -13,7 +13,6 @@
* Programmable Interrupt Controllers.
*/
-#include <common.h>
#include <log.h>
#include <asm/io.h>
#include <asm/i8259.h>
diff --git a/arch/x86/lib/init_helpers.c b/arch/x86/lib/init_helpers.c
index bf0c921..bd0efde 100644
--- a/arch/x86/lib/init_helpers.c
+++ b/arch/x86/lib/init_helpers.c
@@ -4,11 +4,11 @@
* Graeme Russ, <graeme.russ@gmail.com>
*/
-#include <common.h>
#include <init.h>
#include <asm/global_data.h>
#include <linux/errno.h>
#include <asm/mtrr.h>
+#include <asm/u-boot-x86.h>
DECLARE_GLOBAL_DATA_PTR;
diff --git a/arch/x86/lib/interrupts.c b/arch/x86/lib/interrupts.c
index ff52959..f96b2bf 100644
--- a/arch/x86/lib/interrupts.c
+++ b/arch/x86/lib/interrupts.c
@@ -29,7 +29,6 @@
* Daniel Engström
*/
-#include <common.h>
#include <command.h>
#include <irq_func.h>
#include <asm/interrupt.h>
diff --git a/arch/x86/lib/lpc-uclass.c b/arch/x86/lib/lpc-uclass.c
index 67b931d..4f89db4e 100644
--- a/arch/x86/lib/lpc-uclass.c
+++ b/arch/x86/lib/lpc-uclass.c
@@ -4,7 +4,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <dm.h>
UCLASS_DRIVER(lpc) = {
diff --git a/arch/x86/lib/mpspec.c b/arch/x86/lib/mpspec.c
index 8e97d9f..5abd928 100644
--- a/arch/x86/lib/mpspec.c
+++ b/arch/x86/lib/mpspec.c
@@ -5,7 +5,6 @@
* Adapted from coreboot src/arch/x86/boot/mpspec.c
*/
-#include <common.h>
#include <cpu.h>
#include <dm.h>
#include <errno.h>
diff --git a/arch/x86/lib/mrccache.c b/arch/x86/lib/mrccache.c
index 6494b8d..970704a 100644
--- a/arch/x86/lib/mrccache.c
+++ b/arch/x86/lib/mrccache.c
@@ -8,7 +8,6 @@
#define LOG_CATEGORY UCLASS_RAM
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <fdtdec.h>
diff --git a/arch/x86/lib/northbridge-uclass.c b/arch/x86/lib/northbridge-uclass.c
index 3838887..1d17805 100644
--- a/arch/x86/lib/northbridge-uclass.c
+++ b/arch/x86/lib/northbridge-uclass.c
@@ -4,7 +4,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <dm.h>
#include <dm/root.h>
diff --git a/arch/x86/lib/physmem.c b/arch/x86/lib/physmem.c
index 382f768..48cd107 100644
--- a/arch/x86/lib/physmem.c
+++ b/arch/x86/lib/physmem.c
@@ -8,7 +8,6 @@
* Software Foundation.
*/
-#include <common.h>
#include <log.h>
#include <physmem.h>
#include <asm/cpu.h>
diff --git a/arch/x86/lib/pinctrl_ich6.c b/arch/x86/lib/pinctrl_ich6.c
index c93f245..d4f71c5 100644
--- a/arch/x86/lib/pinctrl_ich6.c
+++ b/arch/x86/lib/pinctrl_ich6.c
@@ -3,7 +3,6 @@
* Copyright (C) 2016 Google, Inc
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <fdtdec.h>
diff --git a/arch/x86/lib/pirq_routing.c b/arch/x86/lib/pirq_routing.c
index caeaec9..5178940 100644
--- a/arch/x86/lib/pirq_routing.c
+++ b/arch/x86/lib/pirq_routing.c
@@ -5,7 +5,6 @@
* Part of this file is ported from coreboot src/arch/x86/boot/pirq_routing.c
*/
-#include <common.h>
#include <log.h>
#include <pci.h>
#include <asm/global_data.h>
diff --git a/arch/x86/lib/pmu.c b/arch/x86/lib/pmu.c
index 083aec8..2127257 100644
--- a/arch/x86/lib/pmu.c
+++ b/arch/x86/lib/pmu.c
@@ -2,7 +2,6 @@
/*
* Copyright (c) 2017 Intel Corporation
*/
-#include <common.h>
#include <dm.h>
#include <regmap.h>
#include <syscon.h>
diff --git a/arch/x86/lib/ramtest.c b/arch/x86/lib/ramtest.c
index 0338539..16cd6e4 100644
--- a/arch/x86/lib/ramtest.c
+++ b/arch/x86/lib/ramtest.c
@@ -5,9 +5,9 @@
* From Coreboot src/lib/ramtest.c
*/
-#include <common.h>
#include <asm/io.h>
#include <asm/post.h>
+#include <vsprintf.h>
static void write_phys(unsigned long addr, u32 value)
{
diff --git a/arch/x86/lib/reloc_ia32_efi.c b/arch/x86/lib/reloc_ia32_efi.c
index d56cd50..17ab54d 100644
--- a/arch/x86/lib/reloc_ia32_efi.c
+++ b/arch/x86/lib/reloc_ia32_efi.c
@@ -7,7 +7,6 @@
* All rights reserved.
*/
-#include <common.h>
#include <efi.h>
#include <elf.h>
diff --git a/arch/x86/lib/reloc_x86_64_efi.c b/arch/x86/lib/reloc_x86_64_efi.c
index 2694de7..c7a21d9 100644
--- a/arch/x86/lib/reloc_x86_64_efi.c
+++ b/arch/x86/lib/reloc_x86_64_efi.c
@@ -9,7 +9,6 @@
* All rights reserved.
*/
-#include <common.h>
#include <efi.h>
#include <elf.h>
diff --git a/arch/x86/lib/relocate.c b/arch/x86/lib/relocate.c
index da819b9..9ce5606 100644
--- a/arch/x86/lib/relocate.c
+++ b/arch/x86/lib/relocate.c
@@ -14,7 +14,6 @@
* Marius Groeger <mgroeger@sysgo.de>
*/
-#include <common.h>
#include <log.h>
#include <relocate.h>
#include <asm/global_data.h>
diff --git a/arch/x86/lib/scu.c b/arch/x86/lib/scu.c
index 90ef239..02fed60 100644
--- a/arch/x86/lib/scu.c
+++ b/arch/x86/lib/scu.c
@@ -9,7 +9,6 @@
*
* This driver enables IPC channel to SCU.
*/
-#include <common.h>
#include <dm.h>
#include <regmap.h>
#include <syscon.h>
diff --git a/arch/x86/lib/sfi.c b/arch/x86/lib/sfi.c
index 85e963b..04d9732 100644
--- a/arch/x86/lib/sfi.c
+++ b/arch/x86/lib/sfi.c
@@ -12,7 +12,6 @@
* See https://simplefirmware.org/ for details
*/
-#include <common.h>
#include <cpu.h>
#include <dm.h>
#include <asm/cpu.h>
diff --git a/arch/x86/lib/spl.c b/arch/x86/lib/spl.c
index c15f11f..f761fbc 100644
--- a/arch/x86/lib/spl.c
+++ b/arch/x86/lib/spl.c
@@ -5,7 +5,6 @@
#define LOG_CATEGORY LOGC_BOOT
-#include <common.h>
#include <cpu_func.h>
#include <debug_uart.h>
#include <dm.h>
@@ -29,6 +28,7 @@
#include <asm/processor.h>
#include <asm/qemu.h>
#include <asm/spl.h>
+#include <asm/u-boot-x86.h>
#include <asm-generic/sections.h>
DECLARE_GLOBAL_DATA_PTR;
diff --git a/arch/x86/lib/tables.c b/arch/x86/lib/tables.c
index 12eae17..45a70e9 100644
--- a/arch/x86/lib/tables.c
+++ b/arch/x86/lib/tables.c
@@ -5,7 +5,6 @@
#define LOG_CATEGORY LOGC_ACPI
-#include <common.h>
#include <bloblist.h>
#include <log.h>
#include <malloc.h>
@@ -98,6 +97,8 @@
int size = table->size ? : CONFIG_ROM_TABLE_SIZE;
u32 rom_table_end;
+ rom_addr = ALIGN(rom_addr, 16);
+
if (!strcmp("smbios", table->name))
gd->arch.smbios_start = rom_addr;
diff --git a/arch/x86/lib/tpl.c b/arch/x86/lib/tpl.c
index 273e9c8..7c03dea 100644
--- a/arch/x86/lib/tpl.c
+++ b/arch/x86/lib/tpl.c
@@ -5,7 +5,6 @@
#define LOG_CATEGORY LOGC_BOOT
-#include <common.h>
#include <debug_uart.h>
#include <dm.h>
#include <hang.h>
diff --git a/arch/x86/lib/zimage.c b/arch/x86/lib/zimage.c
index a41e1cc..73a21bc 100644
--- a/arch/x86/lib/zimage.c
+++ b/arch/x86/lib/zimage.c
@@ -14,7 +14,6 @@
#define LOG_CATEGORY LOGC_BOOT
-#include <common.h>
#include <bootm.h>
#include <command.h>
#include <env.h>
@@ -56,41 +55,8 @@
#define COMMAND_LINE_SIZE 2048
-/**
- * struct zboot_state - Current state of the boot
- *
- * @bzimage_addr: Address of the bzImage to boot
- * @bzimage_size: Size of the bzImage, or 0 to detect this
- * @initrd_addr: Address of the initial ramdisk, or 0 if none
- * @initrd_size: Size of the initial ramdisk, or 0 if none
- * @load_address: Address where the bzImage is moved before booting, either
- * BZIMAGE_LOAD_ADDR or ZIMAGE_LOAD_ADDR
- * @base_ptr: Pointer to the boot parameters, typically at address
- * DEFAULT_SETUP_BASE
- * @cmdline: Environment variable containing the 'override' command line, or
- * NULL to use the one in the setup block
- */
-struct zboot_state {
- ulong bzimage_addr;
- ulong bzimage_size;
- ulong initrd_addr;
- ulong initrd_size;
- ulong load_address;
- struct boot_params *base_ptr;
- char *cmdline;
-} state;
-
-enum {
- ZBOOT_STATE_START = BIT(0),
- ZBOOT_STATE_LOAD = BIT(1),
- ZBOOT_STATE_SETUP = BIT(2),
- ZBOOT_STATE_INFO = BIT(3),
- ZBOOT_STATE_GO = BIT(4),
-
- /* This one doesn't execute automatically, so stop the count before 5 */
- ZBOOT_STATE_DUMP = BIT(5),
- ZBOOT_STATE_COUNT = 5,
-};
+/* Current state of the boot */
+struct zboot_state state;
static void build_command_line(char *command_line, int auto_boot)
{
@@ -400,56 +366,10 @@
return 0;
}
-static int do_zboot_start(struct cmd_tbl *cmdtp, int flag, int argc,
- char *const argv[])
-{
- const char *s;
-
- memset(&state, '\0', sizeof(state));
- if (argc >= 2) {
- /* argv[1] holds the address of the bzImage */
- s = argv[1];
- } else {
- s = env_get("fileaddr");
- }
-
- if (s)
- state.bzimage_addr = hextoul(s, NULL);
-
- if (argc >= 3) {
- /* argv[2] holds the size of the bzImage */
- state.bzimage_size = hextoul(argv[2], NULL);
- }
-
- if (argc >= 4)
- state.initrd_addr = hextoul(argv[3], NULL);
- if (argc >= 5)
- state.initrd_size = hextoul(argv[4], NULL);
- if (argc >= 6) {
- /*
- * When the base_ptr is passed in, we assume that the image is
- * already loaded at the address given by argv[1] and therefore
- * the original bzImage is somewhere else, or not accessible.
- * In any case, we don't need access to the bzImage since all
- * the processing is assumed to be done.
- *
- * So set the base_ptr to the given address, use this arg as the
- * load address and set bzimage_addr to 0 so we know that it
- * cannot be proceesed (or processed again).
- */
- state.base_ptr = (void *)hextoul(argv[5], NULL);
- state.load_address = state.bzimage_addr;
- state.bzimage_addr = 0;
- }
- if (argc >= 7)
- state.cmdline = env_get(argv[6]);
-
- return 0;
-}
-
-static int zboot_load(void)
+int zboot_load(void)
{
struct boot_params *base_ptr;
+ int ret;
if (state.base_ptr) {
struct boot_params *from = (struct boot_params *)state.base_ptr;
@@ -469,23 +389,16 @@
}
state.base_ptr = base_ptr;
- return 0;
-}
-
-static int do_zboot_load(struct cmd_tbl *cmdtp, int flag, int argc,
- char *const argv[])
-{
- if (zboot_load())
- return CMD_RET_FAILURE;
-
- if (env_set_hex("zbootbase", map_to_sysmem(state.base_ptr)) ||
- env_set_hex("zbootaddr", state.load_address))
- return CMD_RET_FAILURE;
+ ret = env_set_hex("zbootbase", map_to_sysmem(state.base_ptr));
+ if (!ret)
+ ret = env_set_hex("zbootaddr", state.load_address);
+ if (ret)
+ return ret;
return 0;
}
-static int zboot_setup(void)
+int zboot_setup(void)
{
struct boot_params *base_ptr = state.base_ptr;
int ret;
@@ -499,33 +412,7 @@
return 0;
}
-static int do_zboot_setup(struct cmd_tbl *cmdtp, int flag, int argc,
- char *const argv[])
-{
- struct boot_params *base_ptr = state.base_ptr;
-
- if (!base_ptr) {
- printf("base is not set: use 'zboot load' first\n");
- return CMD_RET_FAILURE;
- }
- if (zboot_setup()) {
- puts("Setting up boot parameters failed ...\n");
- return CMD_RET_FAILURE;
- }
-
- return 0;
-}
-
-static int do_zboot_info(struct cmd_tbl *cmdtp, int flag, int argc,
- char *const argv[])
-{
- printf("Kernel loaded at %08lx, setup_base=%p\n",
- state.load_address, state.base_ptr);
-
- return 0;
-}
-
-static int zboot_go(void)
+int zboot_go(void)
{
struct boot_params *params = state.base_ptr;
struct setup_header *hdr = ¶ms->hdr;
@@ -549,35 +436,12 @@
return ret;
}
-static int do_zboot_go(struct cmd_tbl *cmdtp, int flag, int argc,
- char *const argv[])
+int zboot_run(ulong addr, ulong size, ulong initrd, ulong initrd_size,
+ ulong base, char *cmdline)
{
int ret;
- ret = zboot_go();
- printf("Kernel returned! (err=%d)\n", ret);
-
- return CMD_RET_FAILURE;
-}
-
-int zboot_start(ulong addr, ulong size, ulong initrd, ulong initrd_size,
- ulong base, char *cmdline)
-{
- int ret;
-
- memset(&state, '\0', sizeof(state));
-
- if (base) {
- state.base_ptr = map_sysmem(base, 0);
- state.load_address = addr;
- } else {
- state.bzimage_addr = addr;
- }
- state.bzimage_size = size;
- state.initrd_addr = initrd;
- state.initrd_size = initrd_size;
- state.cmdline = cmdline;
-
+ zboot_start(addr, size, initrd, initrd_size, base, cmdline);
ret = zboot_load();
if (ret)
return log_msg_ret("ld", ret);
@@ -586,7 +450,7 @@
return log_msg_ret("set", ret);
ret = zboot_go();
if (ret)
- return log_msg_ret("set", ret);
+ return log_msg_ret("go", ret);
return -EFAULT;
}
@@ -776,97 +640,25 @@
print_num("Kernel info offset", hdr->kernel_info_offset);
}
-static int do_zboot_dump(struct cmd_tbl *cmdtp, int flag, int argc,
- char *const argv[])
+void zboot_start(ulong bzimage_addr, ulong bzimage_size, ulong initrd_addr,
+ ulong initrd_size, ulong base_addr, const char *cmdline)
{
- struct boot_params *base_ptr = state.base_ptr;
+ memset(&state, '\0', sizeof(state));
- if (argc > 1)
- base_ptr = (void *)hextoul(argv[1], NULL);
- if (!base_ptr) {
- printf("No zboot setup_base\n");
- return CMD_RET_FAILURE;
+ state.bzimage_size = bzimage_size;
+ state.initrd_addr = initrd_addr;
+ state.initrd_size = initrd_size;
+ if (base_addr) {
+ state.base_ptr = map_sysmem(base_addr, 0);
+ state.load_address = bzimage_addr;
+ } else {
+ state.bzimage_addr = bzimage_addr;
}
- zimage_dump(base_ptr, true);
-
- return 0;
+ state.cmdline = cmdline;
}
-/* Note: This defines the complete_zboot() function */
-U_BOOT_SUBCMDS(zboot,
- U_BOOT_CMD_MKENT(start, 8, 1, do_zboot_start, "", ""),
- U_BOOT_CMD_MKENT(load, 1, 1, do_zboot_load, "", ""),
- U_BOOT_CMD_MKENT(setup, 1, 1, do_zboot_setup, "", ""),
- U_BOOT_CMD_MKENT(info, 1, 1, do_zboot_info, "", ""),
- U_BOOT_CMD_MKENT(go, 1, 1, do_zboot_go, "", ""),
- U_BOOT_CMD_MKENT(dump, 2, 1, do_zboot_dump, "", ""),
-)
-
-int do_zboot_states(struct cmd_tbl *cmdtp, int flag, int argc,
- char *const argv[], int state_mask)
+void zboot_info(void)
{
- int i;
-
- for (i = 0; i < ZBOOT_STATE_COUNT; i++) {
- struct cmd_tbl *cmd = &zboot_subcmds[i];
- int mask = 1 << i;
- int ret;
-
- if (mask & state_mask) {
- ret = cmd->cmd(cmd, flag, argc, argv);
- if (ret)
- return ret;
- }
- }
-
- return 0;
+ printf("Kernel loaded at %08lx, setup_base=%p\n",
+ state.load_address, state.base_ptr);
}
-
-int do_zboot_parent(struct cmd_tbl *cmdtp, int flag, int argc,
- char *const argv[], int *repeatable)
-{
- /* determine if we have a sub command */
- if (argc > 1) {
- char *endp;
-
- hextoul(argv[1], &endp);
- /*
- * endp pointing to nul means that argv[1] was just a valid
- * number, so pass it along to the normal processing
- */
- if (*endp)
- return do_zboot(cmdtp, flag, argc, argv, repeatable);
- }
-
- do_zboot_states(cmdtp, flag, argc, argv, ZBOOT_STATE_START |
- ZBOOT_STATE_LOAD | ZBOOT_STATE_SETUP |
- ZBOOT_STATE_INFO | ZBOOT_STATE_GO);
-
- return CMD_RET_FAILURE;
-}
-
-U_BOOT_CMDREP_COMPLETE(
- zboot, 8, do_zboot_parent, "Boot bzImage",
- "[addr] [size] [initrd addr] [initrd size] [setup] [cmdline]\n"
- " addr - The optional starting address of the bzimage.\n"
- " If not set it defaults to the environment\n"
- " variable \"fileaddr\".\n"
- " size - The optional size of the bzimage. Defaults to\n"
- " zero.\n"
- " initrd addr - The address of the initrd image to use, if any.\n"
- " initrd size - The size of the initrd image to use, if any.\n"
- " setup - The address of the kernel setup region, if this\n"
- " is not at addr\n"
- " cmdline - Environment variable containing the kernel\n"
- " command line, to override U-Boot's normal\n"
- " cmdline generation\n"
- "\n"
- "Sub-commands to do part of the zboot sequence:\n"
- "\tstart [addr [arg ...]] - specify arguments\n"
- "\tload - load OS image\n"
- "\tsetup - set up table\n"
- "\tinfo - show summary info\n"
- "\tgo - start OS\n"
- "\tdump [addr] - dump info (optional address of boot params)",
- complete_zboot
-);
diff --git a/arch/xtensa/cpu/cpu.c b/arch/xtensa/cpu/cpu.c
index 98d9753..abcd8f7 100644
--- a/arch/xtensa/cpu/cpu.c
+++ b/arch/xtensa/cpu/cpu.c
@@ -8,7 +8,7 @@
* CPU specific code
*/
-#include <common.h>
+#include <config.h>
#include <command.h>
#include <init.h>
#include <vsprintf.h>
diff --git a/arch/xtensa/cpu/exceptions.c b/arch/xtensa/cpu/exceptions.c
index cf9af43..2067670 100644
--- a/arch/xtensa/cpu/exceptions.c
+++ b/arch/xtensa/cpu/exceptions.c
@@ -10,12 +10,12 @@
* (Note that alloca is a special case and handled in start.S)
*/
-#include <common.h>
#include <command.h>
#include <irq_func.h>
#include <asm/ptrace.h>
#include <asm/string.h>
#include <asm/regs.h>
+#include <vsprintf.h>
typedef void (*handler_t)(struct pt_regs *);
diff --git a/arch/xtensa/include/asm/global_data.h b/arch/xtensa/include/asm/global_data.h
index 1157978..40c129d 100644
--- a/arch/xtensa/include/asm/global_data.h
+++ b/arch/xtensa/include/asm/global_data.h
@@ -6,6 +6,8 @@
#ifndef _XTENSA_GBL_DATA_H
#define _XTENSA_GBL_DATA_H
+#include <asm/u-boot.h>
+
/* Architecture-specific global data */
struct arch_global_data {
diff --git a/arch/xtensa/lib/bootm.c b/arch/xtensa/lib/bootm.c
index 9780d46..1de06b7 100644
--- a/arch/xtensa/lib/bootm.c
+++ b/arch/xtensa/lib/bootm.c
@@ -4,7 +4,6 @@
* (C) Copyright 2014 Cadence Design Systems Inc.
*/
-#include <common.h>
#include <bootm.h>
#include <bootstage.h>
#include <command.h>
diff --git a/arch/xtensa/lib/cache.c b/arch/xtensa/lib/cache.c
index 4e0c0ac..e6a7f68 100644
--- a/arch/xtensa/lib/cache.c
+++ b/arch/xtensa/lib/cache.c
@@ -4,7 +4,6 @@
* (C) Copyright 2014 - 2016 Cadence Design Systems Inc.
*/
-#include <common.h>
#include <cpu_func.h>
#include <asm/cache.h>
diff --git a/arch/xtensa/lib/time.c b/arch/xtensa/lib/time.c
index 1c927d2..c673958 100644
--- a/arch/xtensa/lib/time.c
+++ b/arch/xtensa/lib/time.c
@@ -3,7 +3,6 @@
* (C) Copyright 2008 - 2013 Tensilica Inc.
*/
-#include <common.h>
#include <clock_legacy.h>
#include <time.h>
#include <asm/global_data.h>
diff --git a/board/BuR/brppt1/board.c b/board/BuR/brppt1/board.c
index 36945bb..192a2fa 100644
--- a/board/BuR/brppt1/board.c
+++ b/board/BuR/brppt1/board.c
@@ -9,7 +9,7 @@
*
*/
-#include <common.h>
+#include <config.h>
#include <bootcount.h>
#include <env.h>
#include <errno.h>
diff --git a/board/BuR/brppt1/mux.c b/board/BuR/brppt1/mux.c
index 5d2c7a2..8932b9a 100644
--- a/board/BuR/brppt1/mux.c
+++ b/board/BuR/brppt1/mux.c
@@ -8,7 +8,6 @@
* Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com
*/
-#include <common.h>
#include <asm/arch/sys_proto.h>
#include <asm/arch/hardware.h>
#include <asm/arch/mux.h>
diff --git a/board/BuR/brppt2/board.c b/board/BuR/brppt2/board.c
index ee006f0..105fac8 100644
--- a/board/BuR/brppt2/board.c
+++ b/board/BuR/brppt2/board.c
@@ -6,7 +6,6 @@
* B&R Industrial Automation GmbH - http://www.br-automation.com/
*
*/
-#include <common.h>
#include <cpu_func.h>
#include <hang.h>
#include <init.h>
diff --git a/board/BuR/brsmarc1/board.c b/board/BuR/brsmarc1/board.c
index 738a5d2..2d3f593 100644
--- a/board/BuR/brsmarc1/board.c
+++ b/board/BuR/brsmarc1/board.c
@@ -8,7 +8,6 @@
* B&R Industrial Automation GmbH - http://www.br-automation.com
*
*/
-#include <common.h>
#include <errno.h>
#include <init.h>
#include <spl.h>
diff --git a/board/BuR/brsmarc1/mux.c b/board/BuR/brsmarc1/mux.c
index 33c214d..b59d64f 100644
--- a/board/BuR/brsmarc1/mux.c
+++ b/board/BuR/brsmarc1/mux.c
@@ -9,7 +9,6 @@
*
*/
-#include <common.h>
#include <asm/arch/sys_proto.h>
#include <asm/arch/hardware.h>
#include <asm/arch/mux.h>
diff --git a/board/BuR/brxre1/board.c b/board/BuR/brxre1/board.c
index a909104..b9b595c 100644
--- a/board/BuR/brxre1/board.c
+++ b/board/BuR/brxre1/board.c
@@ -8,7 +8,6 @@
* Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com
*
*/
-#include <common.h>
#include <env.h>
#include <errno.h>
#include <init.h>
diff --git a/board/BuR/brxre1/mux.c b/board/BuR/brxre1/mux.c
index 6c5ad89..e2e8ec5 100644
--- a/board/BuR/brxre1/mux.c
+++ b/board/BuR/brxre1/mux.c
@@ -8,7 +8,6 @@
* Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com
*/
-#include <common.h>
#include <asm/arch/sys_proto.h>
#include <asm/arch/hardware.h>
#include <asm/arch/mux.h>
diff --git a/board/BuR/common/br_resetc.c b/board/BuR/common/br_resetc.c
index 32f32b6..f5d09fe 100644
--- a/board/BuR/common/br_resetc.c
+++ b/board/BuR/common/br_resetc.c
@@ -5,7 +5,6 @@
* Copyright (C) 2019 Hannes Schmelzer <oe5hpm@oevsv.at>
* B&R Industrial Automation GmbH - http://www.br-automation.com/ *
*/
-#include <common.h>
#include <env.h>
#include <errno.h>
#include <i2c.h>
diff --git a/board/BuR/common/common.c b/board/BuR/common/common.c
index 3c78020..8aff821 100644
--- a/board/BuR/common/common.c
+++ b/board/BuR/common/common.c
@@ -10,7 +10,6 @@
*/
#include <log.h>
#include <version.h>
-#include <common.h>
#include <env.h>
#include <fdtdec.h>
#include <i2c.h>
diff --git a/board/BuS/eb_cpu5282/eb_cpu5282.c b/board/BuS/eb_cpu5282/eb_cpu5282.c
index ea49c7a..cf56108 100644
--- a/board/BuS/eb_cpu5282/eb_cpu5282.c
+++ b/board/BuS/eb_cpu5282/eb_cpu5282.c
@@ -7,7 +7,7 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
+#include <config.h>
#include <command.h>
#include <asm/global_data.h>
#include "asm/m5282.h"
diff --git a/board/CZ.NIC/turris_atsha_otp.c b/board/CZ.NIC/turris_atsha_otp.c
index a29fe36..85eebcd 100644
--- a/board/CZ.NIC/turris_atsha_otp.c
+++ b/board/CZ.NIC/turris_atsha_otp.c
@@ -11,6 +11,7 @@
#include <atsha204a-i2c.h>
#include "turris_atsha_otp.h"
+#include "turris_common.h"
#define TURRIS_ATSHA_OTP_VERSION 0
#define TURRIS_ATSHA_OTP_SERIAL 1
@@ -32,26 +33,6 @@
return dev;
}
-static void increment_mac(u8 *mac)
-{
- int i;
-
- for (i = 5; i >= 3; i--) {
- mac[i] += 1;
- if (mac[i])
- break;
- }
-}
-
-static void set_mac_if_invalid(int i, u8 *mac)
-{
- u8 oldmac[6];
-
- if (is_valid_ethaddr(mac) &&
- !eth_env_get_enetaddr_by_index("eth", i, oldmac))
- eth_env_set_enetaddr_by_index("eth", i, mac);
-}
-
int turris_atsha_otp_init_mac_addresses(int first_idx)
{
struct udevice *dev = get_atsha204a_dev();
@@ -84,11 +65,7 @@
mac[4] = mac1[2];
mac[5] = mac1[3];
- set_mac_if_invalid((first_idx + 0) % 3, mac);
- increment_mac(mac);
- set_mac_if_invalid((first_idx + 1) % 3, mac);
- increment_mac(mac);
- set_mac_if_invalid((first_idx + 2) % 3, mac);
+ turris_init_mac_addresses(first_idx, mac);
return 0;
}
diff --git a/board/CZ.NIC/turris_common.c b/board/CZ.NIC/turris_common.c
new file mode 100644
index 0000000..1717dda
--- /dev/null
+++ b/board/CZ.NIC/turris_common.c
@@ -0,0 +1,42 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2017 Marek Behún <kabel@kernel.org>
+ */
+
+#include <env.h>
+#include <net.h>
+
+#include "turris_common.h"
+
+static void increment_mac(u8 *mac)
+{
+ int i;
+
+ for (i = 5; i >= 3; i--) {
+ mac[i] += 1;
+ if (mac[i])
+ break;
+ }
+}
+
+static void set_mac_if_invalid(int i, u8 *mac)
+{
+ u8 oldmac[6];
+
+ if (is_valid_ethaddr(mac) &&
+ !eth_env_get_enetaddr_by_index("eth", i, oldmac))
+ eth_env_set_enetaddr_by_index("eth", i, mac);
+}
+
+void turris_init_mac_addresses(int first_idx, const u8 *first_mac)
+{
+ u8 mac[6];
+
+ memcpy(mac, first_mac, sizeof(mac));
+
+ set_mac_if_invalid((first_idx + 0) % 3, mac);
+ increment_mac(mac);
+ set_mac_if_invalid((first_idx + 1) % 3, mac);
+ increment_mac(mac);
+ set_mac_if_invalid((first_idx + 2) % 3, mac);
+}
diff --git a/board/CZ.NIC/turris_common.h b/board/CZ.NIC/turris_common.h
new file mode 100644
index 0000000..5565ea9
--- /dev/null
+++ b/board/CZ.NIC/turris_common.h
@@ -0,0 +1,10 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+#ifndef TURRIS_COMMON_H
+#define TURRIS_COMMON_H
+
+#include <asm/types.h>
+
+void turris_init_mac_addresses(int first_idx, const u8 *first_mac);
+
+#endif
diff --git a/board/CZ.NIC/turris_mox/mox_sp.c b/board/CZ.NIC/turris_mox/mox_sp.c
index 11d8756..1591b40 100644
--- a/board/CZ.NIC/turris_mox/mox_sp.c
+++ b/board/CZ.NIC/turris_mox/mox_sp.c
@@ -3,7 +3,7 @@
* Copyright (C) 2018 Marek Behún <kabel@kernel.org>
*/
-#include <common.h>
+#include <vsprintf.h>
#include <asm/arch/soc.h>
#include <asm/io.h>
#include <linux/bitops.h>
diff --git a/board/CZ.NIC/turris_mox/turris_mox.c b/board/CZ.NIC/turris_mox/turris_mox.c
index 3489bdd..e4ed7f2 100644
--- a/board/CZ.NIC/turris_mox/turris_mox.c
+++ b/board/CZ.NIC/turris_mox/turris_mox.c
@@ -3,7 +3,7 @@
* Copyright (C) 2018 Marek Behún <kabel@kernel.org>
*/
-#include <common.h>
+#include <config.h>
#include <asm/arch/cpu.h>
#include <asm/arch/soc.h>
#include <net.h>
@@ -395,7 +395,7 @@
return;
/*
- * SPI NOR "dtb" partition offset & size hardcoded for now because the
+ * SPI NOR "dtb" partition offset & size hardcoded for now because the
* mtd subsystem does not offer finding the partition yet and we do not
* want to reimplement OF partition parser here.
*/
@@ -565,13 +565,10 @@
int checkboard(void)
{
int i, ret, board_version, ram_size, is_sd;
- const char *pub_key, *model;
+ const char *pub_key;
const u8 *topology;
u64 serial_number;
- model = fdt_getprop(gd->fdt_blob, 0, "model", NULL);
- printf("Model: %s\n", model);
-
ret = mbox_sp_get_board_info(&serial_number, NULL, NULL, &board_version,
&ram_size, NULL);
if (ret < 0) {
diff --git a/board/CZ.NIC/turris_omnia/Makefile b/board/CZ.NIC/turris_omnia/Makefile
index dc39b44..341378b 100644
--- a/board/CZ.NIC/turris_omnia/Makefile
+++ b/board/CZ.NIC/turris_omnia/Makefile
@@ -2,4 +2,4 @@
#
# Copyright (C) 2017 Marek Behún <kabel@kernel.org>
-obj-y := turris_omnia.o ../turris_atsha_otp.o
+obj-y := turris_omnia.o ../turris_atsha_otp.o ../turris_common.o
diff --git a/board/CZ.NIC/turris_omnia/turris_omnia.c b/board/CZ.NIC/turris_omnia/turris_omnia.c
index adeb69a..4ee1a39 100644
--- a/board/CZ.NIC/turris_omnia/turris_omnia.c
+++ b/board/CZ.NIC/turris_omnia/turris_omnia.c
@@ -7,7 +7,7 @@
* Marvell/db-88f6820-gp by Stefan Roese <sr@denx.de>
*/
-#include <common.h>
+#include <config.h>
#include <env.h>
#include <i2c.h>
#include <init.h>
@@ -18,18 +18,22 @@
#include <asm/io.h>
#include <asm/arch/cpu.h>
#include <asm/arch/soc.h>
+#include <asm/unaligned.h>
#include <dm/uclass.h>
#include <dt-bindings/gpio/gpio.h>
#include <fdt_support.h>
#include <hexdump.h>
#include <time.h>
+#include <turris-omnia-mcu-interface.h>
#include <linux/bitops.h>
+#include <linux/bitrev.h>
#include <linux/delay.h>
#include <u-boot/crc.h>
#include "../drivers/ddr/marvell/a38x/ddr3_init.h"
#include <../serdes/a38x/high_speed_env_spec.h>
#include "../turris_atsha_otp.h"
+#include "../turris_common.h"
DECLARE_GLOBAL_DATA_PTR;
@@ -59,46 +63,6 @@
#define A385_WD_RSTOUT_UNMASK MVEBU_REGISTER(0x20704)
#define A385_WD_RSTOUT_UNMASK_GLOBAL BIT(8)
-enum mcu_commands {
- CMD_GET_STATUS_WORD = 0x01,
- CMD_GET_RESET = 0x09,
- CMD_GET_FW_VERSION_APP = 0x0a,
- CMD_WATCHDOG_STATE = 0x0b,
- CMD_GET_FW_VERSION_BOOT = 0x0e,
-
- /* available if STS_FEATURES_SUPPORTED bit set in status word */
- CMD_GET_FEATURES = 0x10,
-
- /* available if EXT_CMD bit set in features */
- CMD_EXT_CONTROL = 0x12,
-};
-
-enum status_word_bits {
- STS_MCU_TYPE_MASK = GENMASK(1, 0),
- STS_MCU_TYPE_STM32 = 0,
- STS_MCU_TYPE_GD32 = 1,
- STS_MCU_TYPE_MKL = 2,
- STS_MCU_TYPE_UNKN = 3,
- STS_FEATURES_SUPPORTED = BIT(2),
- CARD_DET_STSBIT = 0x0010,
- MSATA_IND_STSBIT = 0x0020,
-};
-
-/* CMD_GET_FEATURES */
-enum features_e {
- FEAT_PERIPH_MCU = BIT(0),
- FEAT_EXT_CMDS = BIT(1),
-};
-
-/* CMD_EXT_CONTROL */
-enum ext_ctl_e {
- EXT_CTL_nRES_LAN = BIT(1),
- EXT_CTL_nRES_PHY = BIT(2),
- EXT_CTL_nPERST0 = BIT(3),
- EXT_CTL_nPERST1 = BIT(4),
- EXT_CTL_nPERST2 = BIT(5),
-};
-
/*
* Those values and defines are taken from the Marvell U-Boot version
* "u-boot-2013.01-2014_T3.0"
@@ -172,6 +136,141 @@
return dm_i2c_write(chip, cmd, buf, len);
}
+static int omnia_mcu_get_sts_and_features(u16 *psts, u32 *pfeatures)
+{
+ u16 sts, feat16;
+ int ret;
+
+ ret = omnia_mcu_read(CMD_GET_STATUS_WORD, &sts, sizeof(sts));
+ if (ret)
+ return ret;
+
+ if (psts)
+ *psts = sts;
+
+ if (!pfeatures)
+ return 0;
+
+ if (sts & STS_FEATURES_SUPPORTED) {
+ /* try read 32-bit features */
+ ret = omnia_mcu_read(CMD_GET_FEATURES, pfeatures,
+ sizeof(*pfeatures));
+ if (ret) {
+ /* try read 16-bit features */
+ ret = omnia_mcu_read(CMD_GET_FEATURES, &feat16,
+ sizeof(&feat16));
+ if (ret)
+ return ret;
+
+ *pfeatures = feat16;
+ } else {
+ if (*pfeatures & FEAT_FROM_BIT_16_INVALID)
+ *pfeatures &= GENMASK(15, 0);
+ }
+ } else {
+ *pfeatures = 0;
+ }
+
+ return 0;
+}
+
+static int omnia_mcu_get_sts(u16 *sts)
+{
+ return omnia_mcu_get_sts_and_features(sts, NULL);
+}
+
+static bool omnia_mcu_has_feature(u32 feature)
+{
+ u32 features;
+
+ if (omnia_mcu_get_sts_and_features(NULL, &features))
+ return false;
+
+ return feature & features;
+}
+
+static u32 omnia_mcu_crc32(const void *p, size_t len)
+{
+ u32 val, crc = 0;
+
+ compiletime_assert(!(len % 4), "length has to be a multiple of 4");
+
+ while (len) {
+ val = bitrev32(get_unaligned_le32(p));
+ crc = crc32(crc, (void *)&val, 4);
+ p += 4;
+ len -= 4;
+ }
+
+ return ~bitrev32(crc);
+}
+
+/* Can only be called after relocation, since it needs cleared BSS */
+static int omnia_mcu_board_info(char *serial, u8 *mac, char *version)
+{
+ static u8 reply[17];
+ static bool cached;
+
+ if (!cached) {
+ u8 csum;
+ int ret;
+
+ ret = omnia_mcu_read(CMD_BOARD_INFO_GET, reply, sizeof(reply));
+ if (ret)
+ return ret;
+
+ if (reply[0] != 16)
+ return -EBADMSG;
+
+ csum = reply[16];
+ reply[16] = 0;
+
+ if ((omnia_mcu_crc32(&reply[1], 16) & 0xff) != csum)
+ return -EBADMSG;
+
+ cached = true;
+ }
+
+ if (serial) {
+ const char *serial_env;
+
+ serial_env = env_get("serial#");
+ if (serial_env && strlen(serial_env) == 16) {
+ strcpy(serial, serial_env);
+ } else {
+ sprintf(serial, "%016llX",
+ get_unaligned_le64(&reply[1]));
+ env_set("serial#", serial);
+ }
+ }
+
+ if (mac)
+ memcpy(mac, &reply[9], ETH_ALEN);
+
+ if (version)
+ sprintf(version, "%u", reply[15]);
+
+ return 0;
+}
+
+static int omnia_mcu_get_board_public_key(char pub_key[static 67])
+{
+ u8 reply[34];
+ int ret;
+
+ ret = omnia_mcu_read(CMD_CRYPTO_GET_PUBLIC_KEY, reply, sizeof(reply));
+ if (ret)
+ return ret;
+
+ if (reply[0] != 33)
+ return -EBADMSG;
+
+ bin2hex(pub_key, &reply[1], 33);
+ pub_key[66] = '\0';
+
+ return 0;
+}
+
static void enable_a385_watchdog(unsigned int timeout_minutes)
{
struct sar_freq_modes sar_freq;
@@ -219,7 +318,7 @@
puts("Disabling MCU watchdog... ");
- ret = omnia_mcu_write(CMD_WATCHDOG_STATE, "\x00", 1);
+ ret = omnia_mcu_write(CMD_SET_WATCHDOG_STATE, "\x00", 1);
if (ret) {
printf("omnia_mcu_write failed: %i\n", ret);
return false;
@@ -233,7 +332,7 @@
static bool omnia_detect_sata(const char *msata_slot)
{
int ret;
- u16 stsword;
+ u16 sts;
puts("MiniPCIe/mSATA card detection... ");
@@ -249,24 +348,24 @@
}
}
- ret = omnia_mcu_read(CMD_GET_STATUS_WORD, &stsword, sizeof(stsword));
+ ret = omnia_mcu_get_sts(&sts);
if (ret) {
printf("omnia_mcu_read failed: %i, defaulting to MiniPCIe card\n",
ret);
return false;
}
- if (!(stsword & CARD_DET_STSBIT)) {
+ if (!(sts & STS_CARD_DET)) {
puts("none\n");
return false;
}
- if (stsword & MSATA_IND_STSBIT)
+ if (sts & STS_MSATA_IND)
puts("mSATA\n");
else
puts("MiniPCIe\n");
- return stsword & MSATA_IND_STSBIT ? true : false;
+ return sts & STS_MSATA_IND;
}
static bool omnia_detect_wwan_usb3(const char *wwan_slot)
@@ -393,32 +492,33 @@
static const char * const omnia_get_mcu_type(void)
{
- static const char * const mcu_types[] = {
- [STS_MCU_TYPE_STM32] = "STM32",
- [STS_MCU_TYPE_GD32] = "GD32",
- [STS_MCU_TYPE_MKL] = "MKL",
- [STS_MCU_TYPE_UNKN] = "unknown",
- };
- static const char * const mcu_types_with_perip_resets[] = {
- [STS_MCU_TYPE_STM32] = "STM32 (with peripheral resets)",
- [STS_MCU_TYPE_GD32] = "GD32 (with peripheral resets)",
- [STS_MCU_TYPE_MKL] = "MKL (with peripheral resets)",
- [STS_MCU_TYPE_UNKN] = "unknown (with peripheral resets)",
- };
- u16 stsword, features;
+ static char result[] = "xxxxxxx (with peripheral resets)";
+ u16 sts;
int ret;
- ret = omnia_mcu_read(CMD_GET_STATUS_WORD, &stsword, sizeof(stsword));
+ ret = omnia_mcu_get_sts(&sts);
if (ret)
return "unknown";
- if (stsword & STS_FEATURES_SUPPORTED) {
- ret = omnia_mcu_read(CMD_GET_FEATURES, &features, sizeof(features));
- if (ret == 0 && (features & FEAT_PERIPH_MCU))
- return mcu_types_with_perip_resets[stsword & STS_MCU_TYPE_MASK];
+ switch (sts & STS_MCU_TYPE_MASK) {
+ case STS_MCU_TYPE_STM32:
+ strcpy(result, "STM32");
+ break;
+ case STS_MCU_TYPE_GD32:
+ strcpy(result, "GD32");
+ break;
+ case STS_MCU_TYPE_MKL:
+ strcpy(result, "MKL");
+ break;
+ default:
+ strcpy(result, "unknown");
+ break;
}
- return mcu_types[stsword & STS_MCU_TYPE_MASK];
+ if (omnia_mcu_has_feature(FEAT_PERIPH_MCU))
+ strcat(result, " (with peripheral resets)");
+
+ return result;
}
static const char * const omnia_get_mcu_version(void)
@@ -695,9 +795,6 @@
void spl_board_init(void)
{
- u16 val;
- int ret;
-
/*
* If booting from UART, disable MCU watchdog in SPL, since uploading
* U-Boot proper can take too much time and trigger it. Instead enable
@@ -714,12 +811,8 @@
* resets then LAN eth switch is initialized automatically by bootstrap
* pins when A385 is released from the reset.
*/
- ret = omnia_mcu_read(CMD_GET_STATUS_WORD, &val, sizeof(val));
- if (ret == 0 && (val & STS_FEATURES_SUPPORTED)) {
- ret = omnia_mcu_read(CMD_GET_FEATURES, &val, sizeof(val));
- if (ret == 0 && (val & FEAT_PERIPH_MCU))
- initialize_switch();
- }
+ if (omnia_mcu_has_feature(FEAT_PERIPH_MCU))
+ initialize_switch();
}
#if IS_ENABLED(CONFIG_OF_BOARD_FIXUP) || IS_ENABLED(CONFIG_OF_BOARD_SETUP)
@@ -914,26 +1007,40 @@
return 0;
}
+static void fixup_atsha_node(void *blob)
+{
+ int node;
+
+ if (!omnia_mcu_has_feature(FEAT_CRYPTO))
+ return;
+
+ node = fdt_node_offset_by_compatible(blob, -1, "atmel,atsha204a");
+ if (node < 0) {
+ printf("Cannot find ATSHA204A node!\n");
+ return;
+ }
+
+ if (fdt_status_disabled(blob, node) < 0)
+ printf("Cannot disable ATSHA204A node!\n");
+ else
+ debug("Disabled ATSHA204A node\n");
+}
+
#endif
#if IS_ENABLED(CONFIG_OF_BOARD_FIXUP)
int board_fix_fdt(void *blob)
{
- u16 val;
- int ret;
-
- ret = omnia_mcu_read(CMD_GET_STATUS_WORD, &val, sizeof(val));
- if (ret == 0 && (val & STS_FEATURES_SUPPORTED)) {
- ret = omnia_mcu_read(CMD_GET_FEATURES, &val, sizeof(val));
- if (ret == 0 && (val & FEAT_PERIPH_MCU)) {
- fixup_mcu_gpio_in_pcie_nodes(blob);
- fixup_mcu_gpio_in_eth_wan_node(blob);
- }
+ if (omnia_mcu_has_feature(FEAT_PERIPH_MCU)) {
+ fixup_mcu_gpio_in_pcie_nodes(blob);
+ fixup_mcu_gpio_in_eth_wan_node(blob);
}
fixup_msata_port_nodes(blob);
fixup_wwan_port_nodes(blob);
+ fixup_atsha_node(blob);
+
return 0;
}
#endif
@@ -964,23 +1071,46 @@
int checkboard(void)
{
- char serial[17];
+ char serial[17], version[4], pub_key[67];
+ bool has_version;
int err;
- err = turris_atsha_otp_get_serial_number(serial);
- printf("Model: Turris Omnia\n");
printf(" MCU type: %s\n", omnia_get_mcu_type());
printf(" MCU version: %s\n", omnia_get_mcu_version());
printf(" RAM size: %i MiB\n", omnia_get_ram_size_gb() * 1024);
+
+ if (omnia_mcu_has_feature(FEAT_BOARD_INFO)) {
+ err = omnia_mcu_board_info(serial, NULL, version);
+ has_version = !err;
+ } else {
+ err = turris_atsha_otp_get_serial_number(serial);
+ has_version = false;
+ }
+
+ printf(" Board version: %s\n", has_version ? version : "unknown");
printf(" Serial Number: %s\n", !err ? serial : "unknown");
+ if (omnia_mcu_has_feature(FEAT_CRYPTO)) {
+ err = omnia_mcu_get_board_public_key(pub_key);
+ printf(" ECDSA Public Key: %s\n", !err ? pub_key : "unknown");
+ }
+
return 0;
}
int misc_init_r(void)
{
- turris_atsha_otp_init_mac_addresses(1);
- turris_atsha_otp_init_serial_number();
+ if (omnia_mcu_has_feature(FEAT_BOARD_INFO)) {
+ char serial[17];
+ u8 first_mac[6];
+
+ if (!omnia_mcu_board_info(serial, first_mac, NULL))
+ turris_init_mac_addresses(1, first_mac);
+ } else {
+ turris_atsha_otp_init_mac_addresses(1);
+ turris_atsha_otp_init_serial_number();
+ }
+
return 0;
}
@@ -1102,6 +1232,8 @@
fixup_msata_port_nodes(blob);
fixup_wwan_port_nodes(blob);
+ fixup_atsha_node(blob);
+
return 0;
}
#endif
diff --git a/board/LaCie/common/common.c b/board/LaCie/common/common.c
index 52880a1..e8a7830 100644
--- a/board/LaCie/common/common.c
+++ b/board/LaCie/common/common.c
@@ -3,7 +3,6 @@
* Copyright (C) 2011 Simon Guinot <sguinot@lacie.com>
*/
-#include <common.h>
#include <i2c.h>
#include <miiphy.h>
diff --git a/board/LaCie/net2big_v2/net2big_v2.c b/board/LaCie/net2big_v2/net2big_v2.c
index 9170913..083d91b 100644
--- a/board/LaCie/net2big_v2/net2big_v2.c
+++ b/board/LaCie/net2big_v2/net2big_v2.c
@@ -8,7 +8,7 @@
* Written-by: Prafulla Wadaskar <prafulla@marvell.com>
*/
-#include <common.h>
+#include <config.h>
#include <command.h>
#include <env.h>
#include <i2c.h>
diff --git a/board/LaCie/netspace_v2/netspace_v2.c b/board/LaCie/netspace_v2/netspace_v2.c
index 22bb008..3a2fdb5 100644
--- a/board/LaCie/netspace_v2/netspace_v2.c
+++ b/board/LaCie/netspace_v2/netspace_v2.c
@@ -8,7 +8,6 @@
* Written-by: Prafulla Wadaskar <prafulla@marvell.com>
*/
-#include <common.h>
#include <command.h>
#include <env.h>
#include <init.h>
diff --git a/board/Marvell/db-88f6720/db-88f6720.c b/board/Marvell/db-88f6720/db-88f6720.c
index 26c3064..9204213 100644
--- a/board/Marvell/db-88f6720/db-88f6720.c
+++ b/board/Marvell/db-88f6720/db-88f6720.c
@@ -3,7 +3,6 @@
* Copyright (C) 2016 Stefan Roese <sr@denx.de>
*/
-#include <common.h>
#include <init.h>
#include <miiphy.h>
#include <net.h>
diff --git a/board/Marvell/db-88f6820-amc/db-88f6820-amc.c b/board/Marvell/db-88f6820-amc/db-88f6820-amc.c
index 122c63d..0f92cc3 100644
--- a/board/Marvell/db-88f6820-amc/db-88f6820-amc.c
+++ b/board/Marvell/db-88f6820-amc/db-88f6820-amc.c
@@ -3,7 +3,7 @@
* Copyright (C) 2015 Stefan Roese <sr@denx.de>
*/
-#include <common.h>
+#include <config.h>
#include <i2c.h>
#include <init.h>
#include <miiphy.h>
diff --git a/board/Marvell/db-88f6820-gp/db-88f6820-gp.c b/board/Marvell/db-88f6820-gp/db-88f6820-gp.c
index 1edc1cb..8f8b272 100644
--- a/board/Marvell/db-88f6820-gp/db-88f6820-gp.c
+++ b/board/Marvell/db-88f6820-gp/db-88f6820-gp.c
@@ -3,7 +3,7 @@
* Copyright (C) 2015 Stefan Roese <sr@denx.de>
*/
-#include <common.h>
+#include <config.h>
#include <i2c.h>
#include <init.h>
#include <miiphy.h>
diff --git a/board/Marvell/db-mv784mp-gp/db-mv784mp-gp.c b/board/Marvell/db-mv784mp-gp/db-mv784mp-gp.c
index 9e1fdec..6bca1f9 100644
--- a/board/Marvell/db-mv784mp-gp/db-mv784mp-gp.c
+++ b/board/Marvell/db-mv784mp-gp/db-mv784mp-gp.c
@@ -3,7 +3,6 @@
* Copyright (C) 2014 Stefan Roese <sr@denx.de>
*/
-#include <common.h>
#include <init.h>
#include <miiphy.h>
#include <net.h>
diff --git a/board/Marvell/db-xc3-24g4xg/db-xc3-24g4xg.c b/board/Marvell/db-xc3-24g4xg/db-xc3-24g4xg.c
index 0abdca1..a7a8479 100644
--- a/board/Marvell/db-xc3-24g4xg/db-xc3-24g4xg.c
+++ b/board/Marvell/db-xc3-24g4xg/db-xc3-24g4xg.c
@@ -3,7 +3,6 @@
* Copyright (C) 2015 Stefan Roese <sr@denx.de>
*/
-#include <common.h>
#include <i2c.h>
#include <init.h>
#include <asm/global_data.h>
diff --git a/board/Marvell/dreamplug/dreamplug.c b/board/Marvell/dreamplug/dreamplug.c
index d15faa1..3812750 100644
--- a/board/Marvell/dreamplug/dreamplug.c
+++ b/board/Marvell/dreamplug/dreamplug.c
@@ -8,7 +8,6 @@
* Written-by: Siddarth Gore <gores@marvell.com>
*/
-#include <common.h>
#include <init.h>
#include <netdev.h>
#include <asm/arch/cpu.h>
diff --git a/board/Marvell/guruplug/guruplug.c b/board/Marvell/guruplug/guruplug.c
index ea87ded..7c3cea2 100644
--- a/board/Marvell/guruplug/guruplug.c
+++ b/board/Marvell/guruplug/guruplug.c
@@ -5,7 +5,6 @@
* Written-by: Siddarth Gore <gores@marvell.com>
*/
-#include <common.h>
#include <init.h>
#include <miiphy.h>
#include <net.h>
diff --git a/board/Marvell/mvebu_alleycat-5/board.c b/board/Marvell/mvebu_alleycat-5/board.c
index 0c4f8e0..c1b7cc3 100644
--- a/board/Marvell/mvebu_alleycat-5/board.c
+++ b/board/Marvell/mvebu_alleycat-5/board.c
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+
-#include <common.h>
+#include <config.h>
#include <asm/global_data.h>
DECLARE_GLOBAL_DATA_PTR;
diff --git a/board/Marvell/mvebu_armada-37xx/board.c b/board/Marvell/mvebu_armada-37xx/board.c
index 1685b12..df3fb6d 100644
--- a/board/Marvell/mvebu_armada-37xx/board.c
+++ b/board/Marvell/mvebu_armada-37xx/board.c
@@ -3,7 +3,7 @@
* Copyright (C) 2016 Stefan Roese <sr@denx.de>
*/
-#include <common.h>
+#include <config.h>
#include <dm.h>
#include <dm/device-internal.h>
#include <env.h>
diff --git a/board/Marvell/mvebu_armada-8k/board.c b/board/Marvell/mvebu_armada-8k/board.c
index a8899af..6d70421 100644
--- a/board/Marvell/mvebu_armada-8k/board.c
+++ b/board/Marvell/mvebu_armada-8k/board.c
@@ -3,7 +3,7 @@
* Copyright (C) 2016 Stefan Roese <sr@denx.de>
*/
-#include <common.h>
+#include <config.h>
#include <dm.h>
#include <i2c.h>
#include <init.h>
diff --git a/board/Marvell/octeontx2/soc-utils.c b/board/Marvell/octeontx2/soc-utils.c
index 43a19a9..64eb95f 100644
--- a/board/Marvell/octeontx2/soc-utils.c
+++ b/board/Marvell/octeontx2/soc-utils.c
@@ -5,7 +5,6 @@
* https://spdx.org/licenses
*/
-#include <common.h>
#include <dm.h>
#include <malloc.h>
#include <errno.h>
diff --git a/board/Marvell/openrd/openrd.c b/board/Marvell/openrd/openrd.c
index 581e2e0..dda56a5 100644
--- a/board/Marvell/openrd/openrd.c
+++ b/board/Marvell/openrd/openrd.c
@@ -10,7 +10,6 @@
* Written-by: Prafulla Wadaskar <prafulla@marvell.com>
*/
-#include <common.h>
#include <init.h>
#include <miiphy.h>
#include <net.h>
diff --git a/board/Marvell/sheevaplug/sheevaplug.c b/board/Marvell/sheevaplug/sheevaplug.c
index 26ee39e..23e761d 100644
--- a/board/Marvell/sheevaplug/sheevaplug.c
+++ b/board/Marvell/sheevaplug/sheevaplug.c
@@ -6,7 +6,6 @@
* Written-by: Prafulla Wadaskar <prafulla@marvell.com>
*/
-#include <common.h>
#include <init.h>
#include <netdev.h>
#include <asm/global_data.h>
diff --git a/board/Seagate/dockstar/dockstar.c b/board/Seagate/dockstar/dockstar.c
index d72e3ef..e6ec00a 100644
--- a/board/Seagate/dockstar/dockstar.c
+++ b/board/Seagate/dockstar/dockstar.c
@@ -9,7 +9,6 @@
* Marvell Semiconductor <www.marvell.com>
*/
-#include <common.h>
#include <bootstage.h>
#include <init.h>
#include <netdev.h>
diff --git a/board/Seagate/goflexhome/goflexhome.c b/board/Seagate/goflexhome/goflexhome.c
index caea89c..b2d0ad8 100644
--- a/board/Seagate/goflexhome/goflexhome.c
+++ b/board/Seagate/goflexhome/goflexhome.c
@@ -12,7 +12,6 @@
* Marvell Semiconductor <www.marvell.com>
*/
-#include <common.h>
#include <bootstage.h>
#include <init.h>
#include <netdev.h>
diff --git a/board/Seagate/nas220/nas220.c b/board/Seagate/nas220/nas220.c
index cd2bbda..fa75532 100644
--- a/board/Seagate/nas220/nas220.c
+++ b/board/Seagate/nas220/nas220.c
@@ -8,7 +8,6 @@
* Marvell Semiconductor <www.marvell.com>
*/
-#include <common.h>
#include <init.h>
#include <miiphy.h>
#include <net.h>
diff --git a/board/Synology/ds109/ds109.c b/board/Synology/ds109/ds109.c
index 5c3f46e..4f39757 100644
--- a/board/Synology/ds109/ds109.c
+++ b/board/Synology/ds109/ds109.c
@@ -5,7 +5,7 @@
* Luka Perkov <luka@openwrt.org>
*/
-#include <common.h>
+#include <config.h>
#include <init.h>
#include <miiphy.h>
#include <net.h>
diff --git a/board/Synology/ds414/cmd_syno.c b/board/Synology/ds414/cmd_syno.c
index a62658a..29ea35e 100644
--- a/board/Synology/ds414/cmd_syno.c
+++ b/board/Synology/ds414/cmd_syno.c
@@ -5,7 +5,6 @@
* Copyright (C) 2015 Phil Sutter <phil@nwl.cc>
*/
-#include <common.h>
#include <command.h>
#include <div64.h>
#include <env.h>
diff --git a/board/Synology/ds414/ds414.c b/board/Synology/ds414/ds414.c
index abe6f9e..8db810a 100644
--- a/board/Synology/ds414/ds414.c
+++ b/board/Synology/ds414/ds414.c
@@ -4,7 +4,6 @@
* Copyright (C) 2015 Phil Sutter <phil@nwl.cc>
*/
-#include <common.h>
#include <init.h>
#include <miiphy.h>
#include <asm/global_data.h>
diff --git a/board/advantech/imx8mp_rsb3720a1/imx8mp_rsb3720a1.c b/board/advantech/imx8mp_rsb3720a1/imx8mp_rsb3720a1.c
index d87fe36..070933f 100644
--- a/board/advantech/imx8mp_rsb3720a1/imx8mp_rsb3720a1.c
+++ b/board/advantech/imx8mp_rsb3720a1/imx8mp_rsb3720a1.c
@@ -4,7 +4,6 @@
* Copyright 2022 Linaro
*/
-#include <common.h>
#include <dwc3-uboot.h>
#include <efi.h>
#include <efi_loader.h>
diff --git a/board/advantech/imx8mp_rsb3720a1/spl.c b/board/advantech/imx8mp_rsb3720a1/spl.c
index f4257bc..1f7c1f2 100644
--- a/board/advantech/imx8mp_rsb3720a1/spl.c
+++ b/board/advantech/imx8mp_rsb3720a1/spl.c
@@ -4,7 +4,7 @@
* Copyright 2022 Linaro
*/
-#include <common.h>
+#include <config.h>
#include <command.h>
#include <cpu_func.h>
#include <errno.h>
diff --git a/board/advantech/imx8qm_dmsse20_a1/imx8qm_dmsse20_a1.c b/board/advantech/imx8qm_dmsse20_a1/imx8qm_dmsse20_a1.c
index 56b7bdb..50b35db 100644
--- a/board/advantech/imx8qm_dmsse20_a1/imx8qm_dmsse20_a1.c
+++ b/board/advantech/imx8qm_dmsse20_a1/imx8qm_dmsse20_a1.c
@@ -4,7 +4,6 @@
* Copyright 2019-2023 Kococonnector GmbH
*/
-#include <common.h>
#include <errno.h>
#include <linux/libfdt.h>
#include <asm/io.h>
diff --git a/board/advantech/imx8qm_dmsse20_a1/spl.c b/board/advantech/imx8qm_dmsse20_a1/spl.c
index e8959ed..93cf074 100644
--- a/board/advantech/imx8qm_dmsse20_a1/spl.c
+++ b/board/advantech/imx8qm_dmsse20_a1/spl.c
@@ -3,7 +3,7 @@
* Copyright 2017-2018 NXP
* Copyright 2019-2023 Kococonnector GmbH
*/
-#include <common.h>
+#include <config.h>
#include <dm.h>
#include <spl.h>
#include <init.h>
diff --git a/board/advantech/imx8qm_rom7720_a1/imx8qm_rom7720_a1.c b/board/advantech/imx8qm_rom7720_a1/imx8qm_rom7720_a1.c
index 7f766a6..3def182 100644
--- a/board/advantech/imx8qm_rom7720_a1/imx8qm_rom7720_a1.c
+++ b/board/advantech/imx8qm_rom7720_a1/imx8qm_rom7720_a1.c
@@ -4,7 +4,6 @@
* Copyright (C) 2019 Oliver Graute <oliver.graute@kococonnector.com>
*/
-#include <common.h>
#include <cpu_func.h>
#include <env.h>
#include <errno.h>
diff --git a/board/advantech/imx8qm_rom7720_a1/spl.c b/board/advantech/imx8qm_rom7720_a1/spl.c
index d324001..5863e33 100644
--- a/board/advantech/imx8qm_rom7720_a1/spl.c
+++ b/board/advantech/imx8qm_rom7720_a1/spl.c
@@ -2,7 +2,7 @@
/*
* Copyright 2017-2018 NXP
*/
-#include <common.h>
+#include <config.h>
#include <dm.h>
#include <image.h>
#include <init.h>
diff --git a/board/advantech/som-db5800-som-6867/som-db5800-som-6867.c b/board/advantech/som-db5800-som-6867/som-db5800-som-6867.c
index 8499fc5..9bbd5fd 100644
--- a/board/advantech/som-db5800-som-6867/som-db5800-som-6867.c
+++ b/board/advantech/som-db5800-som-6867/som-db5800-som-6867.c
@@ -4,7 +4,6 @@
* Copyright (C) 2016 George McCollister <george.mccollister@gmail.com>
*/
-#include <common.h>
#include <init.h>
#include <asm/fsp1/fsp_support.h>
diff --git a/board/alliedtelesis/SBx81LIFKW/sbx81lifkw.c b/board/alliedtelesis/SBx81LIFKW/sbx81lifkw.c
index e0a7f3f..5e6d6c6 100644
--- a/board/alliedtelesis/SBx81LIFKW/sbx81lifkw.c
+++ b/board/alliedtelesis/SBx81LIFKW/sbx81lifkw.c
@@ -4,7 +4,6 @@
* Allied Telesis <www.alliedtelesis.com>
*/
-#include <common.h>
#include <init.h>
#include <net.h>
#include <asm/global_data.h>
diff --git a/board/alliedtelesis/SBx81LIFXCAT/sbx81lifxcat.c b/board/alliedtelesis/SBx81LIFXCAT/sbx81lifxcat.c
index 52b8eba..f30821c 100644
--- a/board/alliedtelesis/SBx81LIFXCAT/sbx81lifxcat.c
+++ b/board/alliedtelesis/SBx81LIFXCAT/sbx81lifxcat.c
@@ -4,7 +4,6 @@
* Allied Telesis <www.alliedtelesis.com>
*/
-#include <common.h>
#include <init.h>
#include <miiphy.h>
#include <net.h>
diff --git a/board/alliedtelesis/common/gpio_hog.c b/board/alliedtelesis/common/gpio_hog.c
index 4aecf7e..7da70fb 100644
--- a/board/alliedtelesis/common/gpio_hog.c
+++ b/board/alliedtelesis/common/gpio_hog.c
@@ -3,7 +3,6 @@
* Copyright (C) 2018 Allied Telesis Labs
*/
-#include <common.h>
#include <dm.h>
#include <asm/global_data.h>
#include <asm/gpio.h>
diff --git a/board/alliedtelesis/x240/x240.c b/board/alliedtelesis/x240/x240.c
index 0c4f8e0..c1b7cc3 100644
--- a/board/alliedtelesis/x240/x240.c
+++ b/board/alliedtelesis/x240/x240.c
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+
-#include <common.h>
+#include <config.h>
#include <asm/global_data.h>
DECLARE_GLOBAL_DATA_PTR;
diff --git a/board/alliedtelesis/x530/x530.c b/board/alliedtelesis/x530/x530.c
index 80ad62c..65e6d48 100644
--- a/board/alliedtelesis/x530/x530.c
+++ b/board/alliedtelesis/x530/x530.c
@@ -3,7 +3,7 @@
* Copyright (C) 2017 Allied Telesis Labs
*/
-#include <common.h>
+#include <config.h>
#include <command.h>
#include <dm.h>
#include <env.h>
diff --git a/board/amarula/vyasa-rk3288/vyasa-rk3288.c b/board/amarula/vyasa-rk3288/vyasa-rk3288.c
index 92e0698..b220256 100644
--- a/board/amarula/vyasa-rk3288/vyasa-rk3288.c
+++ b/board/amarula/vyasa-rk3288/vyasa-rk3288.c
@@ -3,7 +3,6 @@
* Copyright (C) 2017 Amarula Solutions
*/
-#include <common.h>
#include <serial.h>
#ifndef CONFIG_TPL_BUILD
diff --git a/board/amlogic/beelink-s922x/beelink-s922x.c b/board/amlogic/beelink-s922x/beelink-s922x.c
index c277631..ccb2f7d 100644
--- a/board/amlogic/beelink-s922x/beelink-s922x.c
+++ b/board/amlogic/beelink-s922x/beelink-s922x.c
@@ -4,7 +4,6 @@
* Author: Neil Armstrong <narmstrong@baylibre.com>
*/
-#include <common.h>
#include <dm.h>
#include <env.h>
#include <init.h>
diff --git a/board/amlogic/jethub-j100/MAINTAINERS b/board/amlogic/jethub-j100/MAINTAINERS
index 43f6a5f..3edc5d8 100644
--- a/board/amlogic/jethub-j100/MAINTAINERS
+++ b/board/amlogic/jethub-j100/MAINTAINERS
@@ -1,5 +1,5 @@
JetHome JetHub
-M: Vyacheslav Bocharov <adeep@lexina.in>
+M: Viacheslav Bocharov <adeep@lexina.in>
S: Maintained
L: u-boot-amlogic@groups.io
F: board/amlogic/jethub-j100/
diff --git a/board/amlogic/jethub-j100/jethub-j100.c b/board/amlogic/jethub-j100/jethub-j100.c
index 010fc0d..b770a1f 100644
--- a/board/amlogic/jethub-j100/jethub-j100.c
+++ b/board/amlogic/jethub-j100/jethub-j100.c
@@ -4,7 +4,6 @@
* Author: Vyacheslav Bocharov <adeep@lexina.in>
*/
-#include <common.h>
#include <dm.h>
#include <init.h>
#include <net.h>
diff --git a/board/amlogic/jethub-j80/jethub-j80.c b/board/amlogic/jethub-j80/jethub-j80.c
index 0b78166..07a08dc 100644
--- a/board/amlogic/jethub-j80/jethub-j80.c
+++ b/board/amlogic/jethub-j80/jethub-j80.c
@@ -6,7 +6,6 @@
*
*/
-#include <common.h>
#include <dm.h>
#include <adc.h>
#include <env.h>
diff --git a/board/amlogic/odroid-go-ultra/odroid-go-ultra.c b/board/amlogic/odroid-go-ultra/odroid-go-ultra.c
index bbd23e2..8f3f204 100644
--- a/board/amlogic/odroid-go-ultra/odroid-go-ultra.c
+++ b/board/amlogic/odroid-go-ultra/odroid-go-ultra.c
@@ -3,7 +3,7 @@
* Copyright (C) 2023 Neil Armstrong <neil.armstrong@linaro.org>
*/
-#include <common.h>
+#include <log.h>
#include <asm/arch/boot.h>
#include <power/regulator.h>
diff --git a/board/amlogic/odroid-n2/odroid-n2.c b/board/amlogic/odroid-n2/odroid-n2.c
index a4bcc62..ae953d0 100644
--- a/board/amlogic/odroid-n2/odroid-n2.c
+++ b/board/amlogic/odroid-n2/odroid-n2.c
@@ -4,7 +4,6 @@
* Author: Neil Armstrong <narmstrong@baylibre.com>
*/
-#include <common.h>
#include <dm.h>
#include <adc.h>
#include <env.h>
diff --git a/board/amlogic/p200/p200.c b/board/amlogic/p200/p200.c
index 754242e..3bede46 100644
--- a/board/amlogic/p200/p200.c
+++ b/board/amlogic/p200/p200.c
@@ -3,7 +3,6 @@
* (C) Copyright 2016 Beniamino Galvani <b.galvani@gmail.com>
*/
-#include <common.h>
#include <dm.h>
#include <env.h>
#include <init.h>
diff --git a/board/amlogic/p201/p201.c b/board/amlogic/p201/p201.c
index 769e273..d44ebae 100644
--- a/board/amlogic/p201/p201.c
+++ b/board/amlogic/p201/p201.c
@@ -3,7 +3,6 @@
* (C) Copyright 2016 Beniamino Galvani <b.galvani@gmail.com>
*/
-#include <common.h>
#include <dm.h>
#include <env.h>
#include <init.h>
diff --git a/board/amlogic/p212/p212.c b/board/amlogic/p212/p212.c
index f6e60ae..ae9834c 100644
--- a/board/amlogic/p212/p212.c
+++ b/board/amlogic/p212/p212.c
@@ -4,7 +4,6 @@
* Author: Neil Armstrong <narmstrong@baylibre.com>
*/
-#include <common.h>
#include <dm.h>
#include <env.h>
#include <init.h>
diff --git a/board/amlogic/q200/q200.c b/board/amlogic/q200/q200.c
index 47f1566..0c0afcc 100644
--- a/board/amlogic/q200/q200.c
+++ b/board/amlogic/q200/q200.c
@@ -4,7 +4,6 @@
* Author: Neil Armstrong <narmstrong@baylibre.com>
*/
-#include <common.h>
#include <dm.h>
#include <env.h>
#include <init.h>
diff --git a/board/amlogic/s400/s400.c b/board/amlogic/s400/s400.c
index 06a9044..96244c9 100644
--- a/board/amlogic/s400/s400.c
+++ b/board/amlogic/s400/s400.c
@@ -4,7 +4,6 @@
* Author: Neil Armstrong <narmstrong@baylibre.com>
*/
-#include <common.h>
#include <dm.h>
#include <init.h>
#include <net.h>
diff --git a/board/amlogic/sei510/sei510.c b/board/amlogic/sei510/sei510.c
index bb188c2..1a978d1 100644
--- a/board/amlogic/sei510/sei510.c
+++ b/board/amlogic/sei510/sei510.c
@@ -4,7 +4,6 @@
* Author: Neil Armstrong <narmstrong@baylibre.com>
*/
-#include <common.h>
#include <dm.h>
#include <env.h>
#include <env_internal.h>
diff --git a/board/amlogic/sei610/sei610.c b/board/amlogic/sei610/sei610.c
index 6490bac..8a096b1 100644
--- a/board/amlogic/sei610/sei610.c
+++ b/board/amlogic/sei610/sei610.c
@@ -4,7 +4,6 @@
* Author: Neil Armstrong <narmstrong@baylibre.com>
*/
-#include <common.h>
#include <dm.h>
#include <env.h>
#include <env_internal.h>
diff --git a/board/amlogic/u200/u200.c b/board/amlogic/u200/u200.c
index 06a9044..96244c9 100644
--- a/board/amlogic/u200/u200.c
+++ b/board/amlogic/u200/u200.c
@@ -4,7 +4,6 @@
* Author: Neil Armstrong <narmstrong@baylibre.com>
*/
-#include <common.h>
#include <dm.h>
#include <init.h>
#include <net.h>
diff --git a/board/amlogic/vim3/vim3.c b/board/amlogic/vim3/vim3.c
index 43d7a8e..bbc2d82 100644
--- a/board/amlogic/vim3/vim3.c
+++ b/board/amlogic/vim3/vim3.c
@@ -4,7 +4,6 @@
* Author: Neil Armstrong <narmstrong@baylibre.com>
*/
-#include <common.h>
#include <dm.h>
#include <env_internal.h>
#include <init.h>
@@ -89,7 +88,7 @@
/*
* If in PCIe mode, alter DT
- * 0：Enable USB3.0，Disable PCIE, 1：Disable USB3.0, Enable PCIE
+ * 0: Enable USB3.0, Disable PCIE, 1: Disable USB3.0, Enable PCIE
*/
if (ret > 0) {
static char data[32] __aligned(4);
diff --git a/board/amlogic/w400/w400.c b/board/amlogic/w400/w400.c
index 4199198..b84366a 100644
--- a/board/amlogic/w400/w400.c
+++ b/board/amlogic/w400/w400.c
@@ -4,7 +4,6 @@
* Author: Neil Armstrong <narmstrong@baylibre.com>
*/
-#include <common.h>
#include <dm.h>
#include <env_internal.h>
#include <init.h>
diff --git a/board/aristainetos/aristainetos.c b/board/aristainetos/aristainetos.c
index 17f37ba..8cfac9f 100644
--- a/board/aristainetos/aristainetos.c
+++ b/board/aristainetos/aristainetos.c
@@ -9,7 +9,6 @@
* Author: Fabio Estevam <fabio.estevam@freescale.com>
*/
-#include <common.h>
#include <bmp_layout.h>
#include <command.h>
#include <image.h>
diff --git a/board/armadeus/opos6uldev/board.c b/board/armadeus/opos6uldev/board.c
index 365fdca..5b25545 100644
--- a/board/armadeus/opos6uldev/board.c
+++ b/board/armadeus/opos6uldev/board.c
@@ -3,7 +3,6 @@
* Copyright (C) 2018 Armadeus Systems
*/
-#include <common.h>
#include <init.h>
#include <asm/arch/sys_proto.h>
#include <asm/gpio.h>
diff --git a/board/armltd/corstone1000/corstone1000.c b/board/armltd/corstone1000/corstone1000.c
index 01c80aa..3ad77f5 100644
--- a/board/armltd/corstone1000/corstone1000.c
+++ b/board/armltd/corstone1000/corstone1000.c
@@ -6,7 +6,6 @@
*/
#include <blk.h>
-#include <common.h>
#include <cpu_func.h>
#include <dm.h>
#include <env.h>
diff --git a/board/armltd/integrator/integrator.c b/board/armltd/integrator/integrator.c
index ad02cf1..eaf87e3 100644
--- a/board/armltd/integrator/integrator.c
+++ b/board/armltd/integrator/integrator.c
@@ -16,7 +16,7 @@
* Philippe Robin, <philippe.robin@arm.com>
*/
-#include <common.h>
+#include <config.h>
#include <bootstage.h>
#include <cpu_func.h>
#include <dm.h>
diff --git a/board/armltd/integrator/timer.c b/board/armltd/integrator/timer.c
index 9db5135..f4101b6 100644
--- a/board/armltd/integrator/timer.c
+++ b/board/armltd/integrator/timer.c
@@ -16,7 +16,7 @@
* Philippe Robin, <philippe.robin@arm.com>
*/
-#include <common.h>
+#include <config.h>
#include <div64.h>
#include <time.h>
#include <linux/delay.h>
diff --git a/board/armltd/total_compute/total_compute.c b/board/armltd/total_compute/total_compute.c
index 53941b5..e1b4f49 100644
--- a/board/armltd/total_compute/total_compute.c
+++ b/board/armltd/total_compute/total_compute.c
@@ -4,7 +4,7 @@
* Usama Arif <usama.arif@arm.com>
*/
-#include <common.h>
+#include <config.h>
#include <dm.h>
#include <dm/platform_data/serial_pl01x.h>
#include <asm/armv8/mmu.h>
diff --git a/board/armltd/vexpress/vexpress_common.c b/board/armltd/vexpress/vexpress_common.c
index 763131c..6c374e2 100644
--- a/board/armltd/vexpress/vexpress_common.c
+++ b/board/armltd/vexpress/vexpress_common.c
@@ -15,7 +15,7 @@
* ARM Ltd.
* Philippe Robin, <philippe.robin@arm.com>
*/
-#include <common.h>
+#include <config.h>
#include <bootstage.h>
#include <cpu_func.h>
#include <init.h>
diff --git a/board/armltd/vexpress64/pcie.c b/board/armltd/vexpress64/pcie.c
index e553da8..1045c90 100644
--- a/board/armltd/vexpress64/pcie.c
+++ b/board/armltd/vexpress64/pcie.c
@@ -5,7 +5,6 @@
* Author: Liviu Dudau <Liviu.Dudau@arm.com>
*/
-#include <common.h>
#include <init.h>
#include <log.h>
#include <asm/io.h>
diff --git a/board/armltd/vexpress64/vexpress64.c b/board/armltd/vexpress64/vexpress64.c
index ee65a59..0119f54 100644
--- a/board/armltd/vexpress64/vexpress64.c
+++ b/board/armltd/vexpress64/vexpress64.c
@@ -4,7 +4,7 @@
* David Feng <fenghua@phytium.com.cn>
* Sharma Bhupesh <bhupesh.sharma@freescale.com>
*/
-#include <common.h>
+#include <config.h>
#include <cpu_func.h>
#include <dm.h>
#include <init.h>
diff --git a/board/astro/mcf5373l/fpga.c b/board/astro/mcf5373l/fpga.c
index f857374..6e505c6 100644
--- a/board/astro/mcf5373l/fpga.c
+++ b/board/astro/mcf5373l/fpga.c
@@ -13,7 +13,6 @@
/* Altera/Xilinx FPGA configuration support for the ASTRO "URMEL" board */
-#include <common.h>
#include <console.h>
#include <watchdog.h>
#include <altera.h>
diff --git a/board/astro/mcf5373l/mcf5373l.c b/board/astro/mcf5373l/mcf5373l.c
index 43563c4..43fcbc6 100644
--- a/board/astro/mcf5373l/mcf5373l.c
+++ b/board/astro/mcf5373l/mcf5373l.c
@@ -5,9 +5,10 @@
* modified by Wolfgang Wegner <w.wegner@astro-kom.de> for ASTRO 5373l
*/
-#include <common.h>
+#include <config.h>
#include <init.h>
#include <serial.h>
+#include <time.h>
#include <watchdog.h>
#include <command.h>
#include <asm/global_data.h>
diff --git a/board/asus/transformer-t30/configs/p1801-t.config b/board/asus/transformer-t30/configs/p1801-t.config
index fab2912..f378f54 100644
--- a/board/asus/transformer-t30/configs/p1801-t.config
+++ b/board/asus/transformer-t30/configs/p1801-t.config
@@ -1,2 +1,3 @@
CONFIG_DEFAULT_DEVICE_TREE="tegra30-asus-p1801-t"
+# CONFIG_I2C_MUX is not set
CONFIG_USB_GADGET_PRODUCT_NUM=0x4cb0
diff --git a/board/asus/transformer-t30/configs/tf201.config b/board/asus/transformer-t30/configs/tf201.config
index 296743b..e4fd303 100644
--- a/board/asus/transformer-t30/configs/tf201.config
+++ b/board/asus/transformer-t30/configs/tf201.config
@@ -1,2 +1,3 @@
CONFIG_DEFAULT_DEVICE_TREE="tegra30-asus-tf201"
+# CONFIG_I2C_MUX is not set
CONFIG_USB_GADGET_PRODUCT_NUM=0x4d00
diff --git a/board/asus/transformer-t30/configs/tf300t.config b/board/asus/transformer-t30/configs/tf300t.config
index 32a92fe..9ad2ebd 100644
--- a/board/asus/transformer-t30/configs/tf300t.config
+++ b/board/asus/transformer-t30/configs/tf300t.config
@@ -1,2 +1,3 @@
CONFIG_DEFAULT_DEVICE_TREE="tegra30-asus-tf300t"
+# CONFIG_I2C_MUX is not set
CONFIG_USB_GADGET_PRODUCT_NUM=0x4d00
diff --git a/board/asus/transformer-t30/configs/tf300tg.config b/board/asus/transformer-t30/configs/tf300tg.config
index 1396294..7b44a91 100644
--- a/board/asus/transformer-t30/configs/tf300tg.config
+++ b/board/asus/transformer-t30/configs/tf300tg.config
@@ -1,2 +1,3 @@
CONFIG_DEFAULT_DEVICE_TREE="tegra30-asus-tf300tg"
+# CONFIG_I2C_MUX is not set
CONFIG_USB_GADGET_PRODUCT_NUM=0x4c80
diff --git a/board/asus/transformer-t30/configs/tf300tl.config b/board/asus/transformer-t30/configs/tf300tl.config
index 3db033c..81e96d5 100644
--- a/board/asus/transformer-t30/configs/tf300tl.config
+++ b/board/asus/transformer-t30/configs/tf300tl.config
@@ -1,2 +1,3 @@
CONFIG_DEFAULT_DEVICE_TREE="tegra30-asus-tf300tl"
+# CONFIG_I2C_MUX is not set
CONFIG_USB_GADGET_PRODUCT_NUM=0x4d00
diff --git a/board/asus/transformer-t30/configs/tf600t.config b/board/asus/transformer-t30/configs/tf600t.config
index e40d0fd..b373486 100644
--- a/board/asus/transformer-t30/configs/tf600t.config
+++ b/board/asus/transformer-t30/configs/tf600t.config
@@ -1,4 +1,6 @@
CONFIG_DEFAULT_DEVICE_TREE="tegra30-asus-tf600t"
CONFIG_BOOTCOMMAND="setenv gpio_button 222; if run check_button; then poweroff; fi; setenv gpio_button 132; if run check_button; then echo Starting SPI flash update ...; run update_spi; fi; run bootcmd_usb0; run bootcmd_mmc1; run bootcmd_mmc0; poweroff;"
+# CONFIG_I2C_MUX is not set
+CONFIG_TEGRA20_SLINK=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_USB_GADGET_PRODUCT_NUM=0x4d00
diff --git a/board/asus/transformer-t30/configs/tf700t.config b/board/asus/transformer-t30/configs/tf700t.config
index 066c884..887c25f 100644
--- a/board/asus/transformer-t30/configs/tf700t.config
+++ b/board/asus/transformer-t30/configs/tf700t.config
@@ -1,2 +1,4 @@
CONFIG_DEFAULT_DEVICE_TREE="tegra30-asus-tf700t"
+CONFIG_CLK_GPIO=y
CONFIG_USB_GADGET_PRODUCT_NUM=0x4c90
+CONFIG_VIDEO_BRIDGE_TOSHIBA_TC358768=y
diff --git a/board/atmel/at91sam9260ek/at91sam9260ek.c b/board/atmel/at91sam9260ek/at91sam9260ek.c
index b8e02f4..48aec65 100644
--- a/board/atmel/at91sam9260ek/at91sam9260ek.c
+++ b/board/atmel/at91sam9260ek/at91sam9260ek.c
@@ -5,7 +5,7 @@
* Lead Tech Design <www.leadtechdesign.com>
*/
-#include <common.h>
+#include <config.h>
#include <debug_uart.h>
#include <init.h>
#include <net.h>
diff --git a/board/atmel/at91sam9261ek/at91sam9261ek.c b/board/atmel/at91sam9261ek/at91sam9261ek.c
index eab3a13..5d7a183 100644
--- a/board/atmel/at91sam9261ek/at91sam9261ek.c
+++ b/board/atmel/at91sam9261ek/at91sam9261ek.c
@@ -5,7 +5,7 @@
* Lead Tech Design <www.leadtechdesign.com>
*/
-#include <common.h>
+#include <config.h>
#include <debug_uart.h>
#include <init.h>
#include <vsprintf.h>
diff --git a/board/atmel/at91sam9263ek/at91sam9263ek.c b/board/atmel/at91sam9263ek/at91sam9263ek.c
index 15f20b6..2b0b017 100644
--- a/board/atmel/at91sam9263ek/at91sam9263ek.c
+++ b/board/atmel/at91sam9263ek/at91sam9263ek.c
@@ -5,7 +5,7 @@
* Lead Tech Design <www.leadtechdesign.com>
*/
-#include <common.h>
+#include <config.h>
#include <debug_uart.h>
#include <init.h>
#include <net.h>
diff --git a/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c b/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c
index f53c1cf..3bd94d0 100644
--- a/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c
+++ b/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c
@@ -5,7 +5,7 @@
* Lead Tech Design <www.leadtechdesign.com>
*/
-#include <common.h>
+#include <config.h>
#include <debug_uart.h>
#include <init.h>
#include <net.h>
diff --git a/board/atmel/at91sam9n12ek/at91sam9n12ek.c b/board/atmel/at91sam9n12ek/at91sam9n12ek.c
index a3e294c..afc0c05 100644
--- a/board/atmel/at91sam9n12ek/at91sam9n12ek.c
+++ b/board/atmel/at91sam9n12ek/at91sam9n12ek.c
@@ -4,7 +4,7 @@
* Josh Wu <josh.wu@atmel.com>
*/
-#include <common.h>
+#include <config.h>
#include <init.h>
#include <net.h>
#include <vsprintf.h>
diff --git a/board/atmel/at91sam9rlek/at91sam9rlek.c b/board/atmel/at91sam9rlek/at91sam9rlek.c
index 11725f7..214e917 100644
--- a/board/atmel/at91sam9rlek/at91sam9rlek.c
+++ b/board/atmel/at91sam9rlek/at91sam9rlek.c
@@ -5,7 +5,7 @@
* Lead Tech Design <www.leadtechdesign.com>
*/
-#include <common.h>
+#include <config.h>
#include <debug_uart.h>
#include <init.h>
#include <vsprintf.h>
diff --git a/board/atmel/at91sam9x5ek/at91sam9x5ek.c b/board/atmel/at91sam9x5ek/at91sam9x5ek.c
index ab666b6..e5688c6 100644
--- a/board/atmel/at91sam9x5ek/at91sam9x5ek.c
+++ b/board/atmel/at91sam9x5ek/at91sam9x5ek.c
@@ -3,7 +3,7 @@
* Copyright (C) 2012 Atmel Corporation
*/
-#include <common.h>
+#include <config.h>
#include <init.h>
#include <asm/global_data.h>
#include <asm/io.h>
diff --git a/board/atmel/common/board.c b/board/atmel/common/board.c
index c93c0e5..55afd43 100644
--- a/board/atmel/common/board.c
+++ b/board/atmel/common/board.c
@@ -4,7 +4,6 @@
* Wenyou Yang <wenyou.yang@microchip.com>
*/
-#include <common.h>
#include <dm.h>
#include <env.h>
#include <w1.h>
diff --git a/board/atmel/common/mac-spi-nor.c b/board/atmel/common/mac-spi-nor.c
index ced27b6..628f795 100644
--- a/board/atmel/common/mac-spi-nor.c
+++ b/board/atmel/common/mac-spi-nor.c
@@ -5,7 +5,6 @@
* Author: Tudor Ambarus <tudor.ambarus@microchip.com>
*/
-#include <common.h>
#include <dm.h>
#include <env.h>
#include <net.h>
diff --git a/board/atmel/common/mac_eeprom.c b/board/atmel/common/mac_eeprom.c
index 4606008..97edb7a 100644
--- a/board/atmel/common/mac_eeprom.c
+++ b/board/atmel/common/mac_eeprom.c
@@ -4,9 +4,7 @@
* Wenyou Yang <wenyou.yang@microchip.com>
*/
-#include <common.h>
#include <dm.h>
-#include <eeprom.h>
#include <env.h>
#include <i2c_eeprom.h>
#include <net.h>
diff --git a/board/atmel/common/video_display.c b/board/atmel/common/video_display.c
index a5049f4..7718882 100644
--- a/board/atmel/common/video_display.c
+++ b/board/atmel/common/video_display.c
@@ -4,7 +4,6 @@
* Wenyou Yang <wenyou.yang@microchip.com>
*/
-#include <common.h>
#include <atmel_lcd.h>
#include <dm.h>
#include <init.h>
diff --git a/board/atmel/sam9x60_curiosity/sam9x60_curiosity.c b/board/atmel/sam9x60_curiosity/sam9x60_curiosity.c
index f53d359..e75043e 100644
--- a/board/atmel/sam9x60_curiosity/sam9x60_curiosity.c
+++ b/board/atmel/sam9x60_curiosity/sam9x60_curiosity.c
@@ -5,7 +5,6 @@
* Author: Durai Manickam KR <durai.manickamkr@microchip.com>
*/
-#include <common.h>
#include <debug_uart.h>
#include <fdtdec.h>
#include <init.h>
diff --git a/board/atmel/sam9x60ek/sam9x60ek.c b/board/atmel/sam9x60ek/sam9x60ek.c
index 3fbfca4..2e5073f 100644
--- a/board/atmel/sam9x60ek/sam9x60ek.c
+++ b/board/atmel/sam9x60ek/sam9x60ek.c
@@ -5,7 +5,7 @@
* Author: Sandeep Sheriker M <sandeep.sheriker@microchip.com>
*/
-#include <common.h>
+#include <config.h>
#include <init.h>
#include <asm/global_data.h>
#include <asm/io.h>
diff --git a/board/atmel/sama5d27_som1_ek/sama5d27_som1_ek.c b/board/atmel/sama5d27_som1_ek/sama5d27_som1_ek.c
index 329eac7..36995a9 100644
--- a/board/atmel/sama5d27_som1_ek/sama5d27_som1_ek.c
+++ b/board/atmel/sama5d27_som1_ek/sama5d27_som1_ek.c
@@ -4,7 +4,6 @@
* Wenyou.Yang <wenyou.yang@microchip.com>
*/
-#include <common.h>
#include <debug_uart.h>
#include <fdtdec.h>
#include <init.h>
diff --git a/board/atmel/sama5d27_wlsom1_ek/sama5d27_wlsom1_ek.c b/board/atmel/sama5d27_wlsom1_ek/sama5d27_wlsom1_ek.c
index 6e41017..c775d59 100644
--- a/board/atmel/sama5d27_wlsom1_ek/sama5d27_wlsom1_ek.c
+++ b/board/atmel/sama5d27_wlsom1_ek/sama5d27_wlsom1_ek.c
@@ -5,7 +5,7 @@
* Author: Nicolas Ferre <nicolas.ferre@microcihp.com>
*/
-#include <common.h>
+#include <config.h>
#include <debug_uart.h>
#include <init.h>
#include <asm/global_data.h>
diff --git a/board/atmel/sama5d29_curiosity/sama5d29_curiosity.c b/board/atmel/sama5d29_curiosity/sama5d29_curiosity.c
index d067931..8759ff6 100644
--- a/board/atmel/sama5d29_curiosity/sama5d29_curiosity.c
+++ b/board/atmel/sama5d29_curiosity/sama5d29_curiosity.c
@@ -6,7 +6,6 @@
*
*/
-#include <common.h>
#include <debug_uart.h>
#include <init.h>
#include <asm/global_data.h>
diff --git a/board/atmel/sama5d2_icp/sama5d2_icp.c b/board/atmel/sama5d2_icp/sama5d2_icp.c
index fabe492..986da01 100644
--- a/board/atmel/sama5d2_icp/sama5d2_icp.c
+++ b/board/atmel/sama5d2_icp/sama5d2_icp.c
@@ -4,7 +4,7 @@
* Eugen Hristev <eugen.hristev@microchip.com>
*/
-#include <common.h>
+#include <config.h>
#include <debug_uart.h>
#include <init.h>
#include <asm/global_data.h>
diff --git a/board/atmel/sama5d2_ptc_ek/sama5d2_ptc_ek.c b/board/atmel/sama5d2_ptc_ek/sama5d2_ptc_ek.c
index 854715e..438829d 100644
--- a/board/atmel/sama5d2_ptc_ek/sama5d2_ptc_ek.c
+++ b/board/atmel/sama5d2_ptc_ek/sama5d2_ptc_ek.c
@@ -4,7 +4,7 @@
* Wenyou Yang <wenyou.yang@microchip.com>
*/
-#include <common.h>
+#include <config.h>
#include <debug_uart.h>
#include <dm.h>
#include <i2c.h>
diff --git a/board/atmel/sama5d2_xplained/sama5d2_xplained.c b/board/atmel/sama5d2_xplained/sama5d2_xplained.c
index aa52207..c8a8eb4 100644
--- a/board/atmel/sama5d2_xplained/sama5d2_xplained.c
+++ b/board/atmel/sama5d2_xplained/sama5d2_xplained.c
@@ -4,7 +4,6 @@
* Wenyou.Yang <wenyou.yang@atmel.com>
*/
-#include <common.h>
#include <debug_uart.h>
#include <init.h>
#include <asm/global_data.h>
diff --git a/board/atmel/sama5d3_xplained/sama5d3_xplained.c b/board/atmel/sama5d3_xplained/sama5d3_xplained.c
index ce73a80..54cc3c4 100644
--- a/board/atmel/sama5d3_xplained/sama5d3_xplained.c
+++ b/board/atmel/sama5d3_xplained/sama5d3_xplained.c
@@ -4,7 +4,7 @@
* Bo Shen <voice.shen@atmel.com>
*/
-#include <common.h>
+#include <config.h>
#include <init.h>
#include <asm/global_data.h>
#include <asm/io.h>
diff --git a/board/atmel/sama5d3xek/sama5d3xek.c b/board/atmel/sama5d3xek/sama5d3xek.c
index 660a6b9..f2e1242 100644
--- a/board/atmel/sama5d3xek/sama5d3xek.c
+++ b/board/atmel/sama5d3xek/sama5d3xek.c
@@ -4,7 +4,7 @@
* Bo Shen <voice.shen@atmel.com>
*/
-#include <common.h>
+#include <config.h>
#include <init.h>
#include <asm/global_data.h>
#include <asm/io.h>
diff --git a/board/atmel/sama5d4_xplained/sama5d4_xplained.c b/board/atmel/sama5d4_xplained/sama5d4_xplained.c
index 780aba1..09ca16c 100644
--- a/board/atmel/sama5d4_xplained/sama5d4_xplained.c
+++ b/board/atmel/sama5d4_xplained/sama5d4_xplained.c
@@ -4,7 +4,7 @@
* Bo Shen <voice.shen@atmel.com>
*/
-#include <common.h>
+#include <config.h>
#include <init.h>
#include <asm/global_data.h>
#include <asm/io.h>
diff --git a/board/atmel/sama5d4ek/sama5d4ek.c b/board/atmel/sama5d4ek/sama5d4ek.c
index 2226906..1f8b85f 100644
--- a/board/atmel/sama5d4ek/sama5d4ek.c
+++ b/board/atmel/sama5d4ek/sama5d4ek.c
@@ -4,7 +4,7 @@
* Bo Shen <voice.shen@atmel.com>
*/
-#include <common.h>
+#include <config.h>
#include <init.h>
#include <asm/global_data.h>
#include <asm/io.h>
diff --git a/board/atmel/sama7g54_curiosity/sama7g54_curiosity.c b/board/atmel/sama7g54_curiosity/sama7g54_curiosity.c
index 33cd090..b05c975 100644
--- a/board/atmel/sama7g54_curiosity/sama7g54_curiosity.c
+++ b/board/atmel/sama7g54_curiosity/sama7g54_curiosity.c
@@ -6,7 +6,6 @@
*
*/
-#include <common.h>
#include <init.h>
#include <asm/global_data.h>
#include <asm/io.h>
diff --git a/board/atmel/sama7g5ek/sama7g5ek.c b/board/atmel/sama7g5ek/sama7g5ek.c
index 295fd07..c07115a 100644
--- a/board/atmel/sama7g5ek/sama7g5ek.c
+++ b/board/atmel/sama7g5ek/sama7g5ek.c
@@ -4,7 +4,7 @@
* Eugen Hristev <eugen.hristev@microchip.com>
*/
-#include <common.h>
+#include <config.h>
#include <debug_uart.h>
#include <init.h>
#include <asm/global_data.h>
diff --git a/board/avionic-design/common/tamonten-ng.c b/board/avionic-design/common/tamonten-ng.c
index 29bde60..e35bda8 100644
--- a/board/avionic-design/common/tamonten-ng.c
+++ b/board/avionic-design/common/tamonten-ng.c
@@ -4,7 +4,6 @@
* Avionic Design GmbH <www.avionic-design.de>
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <asm/arch/pinmux.h>
diff --git a/board/avionic-design/common/tamonten.c b/board/avionic-design/common/tamonten.c
index 988f057..4d74772 100644
--- a/board/avionic-design/common/tamonten.c
+++ b/board/avionic-design/common/tamonten.c
@@ -6,7 +6,6 @@
* Avionic Design GmbH <www.avionic-design.de>
*/
-#include <common.h>
#include <ns16550.h>
#include <asm/io.h>
#include <asm/gpio.h>
diff --git a/board/avionic-design/tec-ng/tec-ng-spl.c b/board/avionic-design/tec-ng/tec-ng-spl.c
index 6e54464..2504945 100644
--- a/board/avionic-design/tec-ng/tec-ng-spl.c
+++ b/board/avionic-design/tec-ng/tec-ng-spl.c
@@ -7,7 +7,6 @@
* Svyatoslav Ryhel <clamor95@gmail.com>
*/
-#include <common.h>
#include <asm/arch-tegra/tegra_i2c.h>
#include <linux/delay.h>
diff --git a/board/beacon/beacon-rzg2m/beacon-rzg2m.c b/board/beacon/beacon-rzg2m/beacon-rzg2m.c
index 99fe1ed..0990532 100644
--- a/board/beacon/beacon-rzg2m/beacon-rzg2m.c
+++ b/board/beacon/beacon-rzg2m/beacon-rzg2m.c
@@ -3,7 +3,6 @@
* Copyright 2020 Compass Electronics Group, LLC
*/
-#include <common.h>
#include <asm/global_data.h>
#include <asm/io.h>
diff --git a/board/beacon/imx8mm/lpddr4_timing.c b/board/beacon/imx8mm/lpddr4_timing.c
index 8e48b9d..c1498dd 100644
--- a/board/beacon/imx8mm/lpddr4_timing.c
+++ b/board/beacon/imx8mm/lpddr4_timing.c
@@ -4,7 +4,6 @@
*/
#include <linux/kernel.h>
-#include <common.h>
#include <asm/arch/ddr.h>
#include <asm/arch/lpddr4_define.h>
diff --git a/board/beacon/imx8mm/spl.c b/board/beacon/imx8mm/spl.c
index 1632238..12013aa 100644
--- a/board/beacon/imx8mm/spl.c
+++ b/board/beacon/imx8mm/spl.c
@@ -1,6 +1,5 @@
// SPDX-License-Identifier: GPL-2.0+
-#include <common.h>
#include <cpu_func.h>
#include <hang.h>
#include <init.h>
diff --git a/board/beacon/imx8mn/spl.c b/board/beacon/imx8mn/spl.c
index b4d46f1..f03841e 100644
--- a/board/beacon/imx8mn/spl.c
+++ b/board/beacon/imx8mn/spl.c
@@ -3,7 +3,6 @@
* Copyright 2020 Compass Electronics Group, LLC
*/
-#include <common.h>
#include <hang.h>
#include <image.h>
#include <init.h>
diff --git a/board/beacon/imx8mp/imx8mp_beacon.c b/board/beacon/imx8mp/imx8mp_beacon.c
index 8963a51..dd74e7c 100644
--- a/board/beacon/imx8mp/imx8mp_beacon.c
+++ b/board/beacon/imx8mp/imx8mp_beacon.c
@@ -1,7 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+
/* Copyright 2023 Logic PD, Inc dba Beacon EmbeddedWorks */
-#include <common.h>
#include <init.h>
#include <miiphy.h>
#include <asm/arch/sys_proto.h>
diff --git a/board/beacon/imx8mp/spl.c b/board/beacon/imx8mp/spl.c
index 591e8ca..30d577f 100644
--- a/board/beacon/imx8mp/spl.c
+++ b/board/beacon/imx8mp/spl.c
@@ -4,7 +4,6 @@
*
*/
-#include <common.h>
#include <hang.h>
#include <init.h>
#include <log.h>
diff --git a/board/beagle/beagle/beagle.c b/board/beagle/beagle/beagle.c
index 847d596..ac2f89c 100644
--- a/board/beagle/beagle/beagle.c
+++ b/board/beagle/beagle/beagle.c
@@ -12,7 +12,7 @@
* Syed Mohammed Khasim <khasim@ti.com>
*
*/
-#include <common.h>
+#include <config.h>
#include <bootstage.h>
#include <dm.h>
#include <env.h>
diff --git a/board/beagle/beagle/led.c b/board/beagle/beagle/led.c
index e21c016..efbd7c1 100644
--- a/board/beagle/beagle/led.c
+++ b/board/beagle/beagle/led.c
@@ -3,7 +3,6 @@
* Copyright (c) 2010 Texas Instruments, Inc.
* Jason Kridner <jkridner@beagleboard.org>
*/
-#include <common.h>
#include <status_led.h>
#include <asm/arch/cpu.h>
#include <asm/io.h>
diff --git a/board/beckhoff/mx53cx9020/mx53cx9020.c b/board/beckhoff/mx53cx9020/mx53cx9020.c
index e7b1318..3a76672 100644
--- a/board/beckhoff/mx53cx9020/mx53cx9020.c
+++ b/board/beckhoff/mx53cx9020/mx53cx9020.c
@@ -7,7 +7,6 @@
* Copyright (C) 2011 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <cpu_func.h>
#include <init.h>
#include <asm/arch/sys_proto.h>
diff --git a/board/beckhoff/mx53cx9020/mx53cx9020_video.c b/board/beckhoff/mx53cx9020/mx53cx9020_video.c
index bf47290..fd28a70 100644
--- a/board/beckhoff/mx53cx9020/mx53cx9020_video.c
+++ b/board/beckhoff/mx53cx9020/mx53cx9020_video.c
@@ -7,7 +7,6 @@
* Copyright (C) 2012 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <asm/arch/iomux-mx53.h>
#include <asm/gpio.h>
#include <asm/mach-imx/video.h>
diff --git a/board/bluewater/gurnard/gurnard.c b/board/bluewater/gurnard/gurnard.c
index 9b42299..3275803 100644
--- a/board/bluewater/gurnard/gurnard.c
+++ b/board/bluewater/gurnard/gurnard.c
@@ -7,7 +7,7 @@
* Author: Ryan Mallon <ryan@bluewatersys.com>
*/
-#include <common.h>
+#include <config.h>
#include <atmel_lcd.h>
#include <atmel_lcdc.h>
#include <atmel_mci.h>
diff --git a/board/bosch/acc/acc.c b/board/bosch/acc/acc.c
index 34088ad..a1a00e7 100644
--- a/board/bosch/acc/acc.c
+++ b/board/bosch/acc/acc.c
@@ -5,7 +5,7 @@
* Copyright (c) 2022 DENX Software Engineering GmbH, Philip Oberfichtner <pro@denx.de>
*/
-#include <common.h>
+#include <config.h>
#include <cpu_func.h>
#include <bootstage.h>
#include <dm.h>
@@ -437,7 +437,7 @@
.trcd = 1313, // 13.125ns
.trcmin = 5063, // 50.625ns
.trasmin = 3750, // 37.5ns
- .SRT = 0, // Set to 1 for temperatures above 85°C
+ .SRT = 0, // Set to 1 for temperatures above 85 deg C
};
static const struct mx6_ddr_sysinfo acc_mx6d_ddr_info = {
diff --git a/board/bosch/guardian/board.c b/board/bosch/guardian/board.c
index ee9e6d6..41d7567 100644
--- a/board/bosch/guardian/board.c
+++ b/board/bosch/guardian/board.c
@@ -8,7 +8,7 @@
* Copyright (C) 2018 Robert Bosch Power Tools GmbH
*/
-#include <common.h>
+#include <config.h>
#include <dm.h>
#include <env_internal.h>
#include <errno.h>
diff --git a/board/bosch/guardian/mux.c b/board/bosch/guardian/mux.c
index 53850ff..eab3398 100644
--- a/board/bosch/guardian/mux.c
+++ b/board/bosch/guardian/mux.c
@@ -6,7 +6,6 @@
* Copyright (C) 2018 Robert Bosch Power Tools GmbH
*/
-#include <common.h>
#include <i2c.h>
#include <asm/arch/hardware.h>
#include <asm/arch/mux.h>
diff --git a/board/bosch/shc/board.c b/board/bosch/shc/board.c
index 962a485..ab68874 100644
--- a/board/bosch/shc/board.c
+++ b/board/bosch/shc/board.c
@@ -11,7 +11,7 @@
* Copyright (C) 2011, Texas Instruments, Incorporated - https://www.ti.com/
*/
-#include <common.h>
+#include <config.h>
#include <bootstage.h>
#include <cpu_func.h>
#include <env.h>
@@ -115,7 +115,7 @@
gpio_direction_output(WIFI_REGEN_GPIO, 1);
/*
* Wait for Wi-Fi power regulator to reach a stable voltage
- * (soft-start time, max. 350 µs)
+ * (soft-start time, max. 350 us)
*/
__udelay(350);
diff --git a/board/bosch/shc/board.h b/board/bosch/shc/board.h
index 4cc02f9..a5e5818 100644
--- a/board/bosch/shc/board.h
+++ b/board/bosch/shc/board.h
@@ -154,7 +154,7 @@
#define HDR_FATC_LEN 12
/*
-* SHC parameters held in On-Board I²C EEPROM device.
+* SHC parameters held in On-Board I2C EEPROM device.
*
* Header Format
*
diff --git a/board/bosch/shc/mux.c b/board/bosch/shc/mux.c
index f19d186..a2a8947 100644
--- a/board/bosch/shc/mux.c
+++ b/board/bosch/shc/mux.c
@@ -9,7 +9,6 @@
* Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/
*/
-#include <common.h>
#include <hang.h>
#include <asm/arch/sys_proto.h>
#include <asm/arch/hardware.h>
diff --git a/board/boundary/nitrogen6x/nitrogen6x.c b/board/boundary/nitrogen6x/nitrogen6x.c
index 382c01d..2b0cb23 100644
--- a/board/boundary/nitrogen6x/nitrogen6x.c
+++ b/board/boundary/nitrogen6x/nitrogen6x.c
@@ -4,7 +4,6 @@
* Copyright (C) 2013, Boundary Devices <info@boundarydevices.com>
*/
-#include <common.h>
#include <command.h>
#include <env.h>
#include <init.h>
diff --git a/board/broadcom/bcmbca/board.c b/board/broadcom/bcmbca/board.c
index bcecb4d..a6ced92 100644
--- a/board/broadcom/bcmbca/board.c
+++ b/board/broadcom/bcmbca/board.c
@@ -3,7 +3,6 @@
* (C) Copyright 2022 Broadcom Ltd.
*/
-#include <common.h>
#include <fdtdec.h>
int board_init(void)
diff --git a/board/broadcom/bcmns/ns.c b/board/broadcom/bcmns/ns.c
index 1249e45..45cc629 100644
--- a/board/broadcom/bcmns/ns.c
+++ b/board/broadcom/bcmns/ns.c
@@ -4,7 +4,6 @@
* Copyright (C) 2023 Linus Walleij <linus.walleij@linaro.org>
*/
-#include <common.h>
#include <dm.h>
#include <init.h>
#include <log.h>
diff --git a/board/broadcom/bcmns3/ns3.c b/board/broadcom/bcmns3/ns3.c
index 7ae6742..bb2f1e4 100644
--- a/board/broadcom/bcmns3/ns3.c
+++ b/board/broadcom/bcmns3/ns3.c
@@ -4,8 +4,8 @@
*
*/
-#include <common.h>
#include <fdt_support.h>
+#include <linux/errno.h>
#include <asm/io.h>
#include <asm/gic-v3.h>
#include <asm/global_data.h>
diff --git a/board/broadcom/bcmstb/bcmstb.c b/board/broadcom/bcmstb/bcmstb.c
index aead6f0..bc05aec 100644
--- a/board/broadcom/bcmstb/bcmstb.c
+++ b/board/broadcom/bcmstb/bcmstb.c
@@ -12,7 +12,6 @@
#include <time.h>
#include <asm/global_data.h>
#include <linux/types.h>
-#include <common.h>
#include <env.h>
#include <asm/io.h>
#include <asm/bootm.h>
diff --git a/board/bsh/imx6ulz_smm_m2/imx6ulz_smm_m2.c b/board/bsh/imx6ulz_smm_m2/imx6ulz_smm_m2.c
index c82eabb..c03e390 100644
--- a/board/bsh/imx6ulz_smm_m2/imx6ulz_smm_m2.c
+++ b/board/bsh/imx6ulz_smm_m2/imx6ulz_smm_m2.c
@@ -14,7 +14,6 @@
#include <asm/mach-imx/boot_mode.h>
#include <asm/global_data.h>
#include <asm/gpio.h>
-#include <common.h>
#include <env.h>
#include <linux/sizes.h>
diff --git a/board/bsh/imx6ulz_smm_m2/spl.c b/board/bsh/imx6ulz_smm_m2/spl.c
index 5b4812e..724841b 100644
--- a/board/bsh/imx6ulz_smm_m2/spl.c
+++ b/board/bsh/imx6ulz_smm_m2/spl.c
@@ -1,6 +1,5 @@
// SPDX-License-Identifier: GPL-2.0+
-#include <common.h>
#include <cpu_func.h>
#include <hang.h>
#include <init.h>
diff --git a/board/bsh/imx8mn_smm_s2/imx8mn_smm_s2.c b/board/bsh/imx8mn_smm_s2/imx8mn_smm_s2.c
index 0ebf208..c998968 100644
--- a/board/bsh/imx8mn_smm_s2/imx8mn_smm_s2.c
+++ b/board/bsh/imx8mn_smm_s2/imx8mn_smm_s2.c
@@ -3,7 +3,6 @@
* Copyright 2021 Collabora Ltd.
*/
-#include <common.h>
#include <asm/arch/sys_proto.h>
#include <env.h>
diff --git a/board/bticino/mamoj/mamoj.c b/board/bticino/mamoj/mamoj.c
index c9da42b..71497b8 100644
--- a/board/bticino/mamoj/mamoj.c
+++ b/board/bticino/mamoj/mamoj.c
@@ -5,7 +5,6 @@
* Copyright (C) 2018 Jagan Teki <jagan@amarulasolutions.com>
*/
-#include <common.h>
#include <init.h>
#include <asm/arch/sys_proto.h>
#include <asm/global_data.h>
diff --git a/board/bticino/mamoj/spl.c b/board/bticino/mamoj/spl.c
index 883b7f4..59b7c24 100644
--- a/board/bticino/mamoj/spl.c
+++ b/board/bticino/mamoj/spl.c
@@ -5,7 +5,6 @@
* Copyright (C) 2018 Jagan Teki <jagan@amarulasolutions.com>
*/
-#include <common.h>
#include <init.h>
#include <serial.h>
#include <spl.h>
diff --git a/board/buffalo/lsxl/lsxl.c b/board/buffalo/lsxl/lsxl.c
index 6a866b5..1e501a0 100644
--- a/board/buffalo/lsxl/lsxl.c
+++ b/board/buffalo/lsxl/lsxl.c
@@ -7,7 +7,6 @@
* Marvell Semiconductor <www.marvell.com>
*/
-#include <common.h>
#include <bootstage.h>
#include <button.h>
#include <command.h>
diff --git a/board/cadence/xtfpga/xtfpga.c b/board/cadence/xtfpga/xtfpga.c
index 8e4081b..5110fed 100644
--- a/board/cadence/xtfpga/xtfpga.c
+++ b/board/cadence/xtfpga/xtfpga.c
@@ -4,7 +4,7 @@
* (C) Copyright 2014 - 2016 Cadence Design Systems Inc.
*/
-#include <common.h>
+#include <config.h>
#include <clock_legacy.h>
#include <command.h>
#include <dm.h>
diff --git a/board/calao/usb_a9263/usb_a9263.c b/board/calao/usb_a9263/usb_a9263.c
index 3d31776..8e39a15 100644
--- a/board/calao/usb_a9263/usb_a9263.c
+++ b/board/calao/usb_a9263/usb_a9263.c
@@ -7,7 +7,7 @@
* Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
*/
-#include <common.h>
+#include <config.h>
#include <init.h>
#include <asm/arch/at91sam9_smc.h>
#include <asm/arch/at91_common.h>
diff --git a/board/cavium/thunderx/atf.c b/board/cavium/thunderx/atf.c
index 37340fe..ce7afb7 100644
--- a/board/cavium/thunderx/atf.c
+++ b/board/cavium/thunderx/atf.c
@@ -3,8 +3,9 @@
* (C) Copyright 2014, Cavium Inc.
**/
-#include <common.h>
+#include <config.h>
#include <command.h>
+#include <vsprintf.h>
#include <asm/cache.h>
#include <asm/io.h>
#include <asm/ptrace.h>
diff --git a/board/cavium/thunderx/thunderx.c b/board/cavium/thunderx/thunderx.c
index ab20825..b1a805c 100644
--- a/board/cavium/thunderx/thunderx.c
+++ b/board/cavium/thunderx/thunderx.c
@@ -3,7 +3,7 @@
* (C) Copyright 2014, Cavium Inc.
**/
-#include <common.h>
+#include <config.h>
#include <cpu_func.h>
#include <dm.h>
#include <init.h>
diff --git a/board/cei/cei-tk1-som/cei-tk1-som.c b/board/cei/cei-tk1-som/cei-tk1-som.c
index 95ee7bb..15b2004 100644
--- a/board/cei/cei-tk1-som/cei-tk1-som.c
+++ b/board/cei/cei-tk1-som/cei-tk1-som.c
@@ -4,7 +4,7 @@
* NVIDIA Corporation <www.nvidia.com>
*/
-#include <common.h>
+#include <linux/kernel.h>
#include <power/as3722.h>
#include <asm/arch/gpio.h>
diff --git a/board/chipspark/popmetal_rk3288/popmetal-rk3288.c b/board/chipspark/popmetal_rk3288/popmetal-rk3288.c
index e6909b3..dd75511 100644
--- a/board/chipspark/popmetal_rk3288/popmetal-rk3288.c
+++ b/board/chipspark/popmetal_rk3288/popmetal-rk3288.c
@@ -3,7 +3,6 @@
* (C) Copyright 2016 Rockchip Electronics Co., Ltd
*/
-#include <common.h>
#include <init.h>
#include <asm/gpio.h>
diff --git a/board/cloos/imx8mm_phg/imx8mm_phg.c b/board/cloos/imx8mm_phg/imx8mm_phg.c
index bc4e984..091c9a5 100644
--- a/board/cloos/imx8mm_phg/imx8mm_phg.c
+++ b/board/cloos/imx8mm_phg/imx8mm_phg.c
@@ -3,7 +3,6 @@
* Copyright 2018 NXP
*/
-#include <common.h>
#include <env.h>
#include <init.h>
#include <miiphy.h>
diff --git a/board/cloos/imx8mm_phg/spl.c b/board/cloos/imx8mm_phg/spl.c
index 0c3a013..b8892ed 100644
--- a/board/cloos/imx8mm_phg/spl.c
+++ b/board/cloos/imx8mm_phg/spl.c
@@ -3,7 +3,6 @@
* Copyright 2019 NXP
*/
-#include <common.h>
#include <command.h>
#include <cpu_func.h>
#include <hang.h>
diff --git a/board/cloudengines/pogo_e02/pogo_e02.c b/board/cloudengines/pogo_e02/pogo_e02.c
index 59e1218..48eee67 100644
--- a/board/cloudengines/pogo_e02/pogo_e02.c
+++ b/board/cloudengines/pogo_e02/pogo_e02.c
@@ -10,7 +10,6 @@
* Written-by: Prafulla Wadaskar <prafulla@marvell.com>
*/
-#include <common.h>
#include <init.h>
#include <log.h>
#include <netdev.h>
diff --git a/board/cloudengines/pogo_v4/pogo_v4.c b/board/cloudengines/pogo_v4/pogo_v4.c
index 61ce0d5..c8ad563 100644
--- a/board/cloudengines/pogo_v4/pogo_v4.c
+++ b/board/cloudengines/pogo_v4/pogo_v4.c
@@ -11,7 +11,6 @@
* Written-by: Prafulla Wadaskar <prafulla@marvell.com>
*/
-#include <common.h>
#include <netdev.h>
#include <asm/arch/cpu.h>
#include <asm/arch/soc.h>
diff --git a/board/cobra5272/cobra5272.c b/board/cobra5272/cobra5272.c
index 69a9df9..774aa82 100644
--- a/board/cobra5272/cobra5272.c
+++ b/board/cobra5272/cobra5272.c
@@ -4,7 +4,7 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
+#include <config.h>
#include <init.h>
#include <asm/global_data.h>
#include <asm/immap.h>
diff --git a/board/cobra5272/flash.c b/board/cobra5272/flash.c
index 8416af1..157b71d 100644
--- a/board/cobra5272/flash.c
+++ b/board/cobra5272/flash.c
@@ -4,13 +4,17 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
+#include <config.h>
#include <console.h>
#include <cpu_func.h>
#include <flash.h>
#include <irq_func.h>
+#include <stdio.h>
+#include <time.h>
#include <uuid.h>
+#include <vsprintf.h>
#include <linux/delay.h>
+#include <linux/string.h>
#define PHYS_FLASH_1 CFG_SYS_FLASH_BASE
#define FLASH_BANK_SIZE 0x200000
diff --git a/board/compulab/cl-som-imx7/cl-som-imx7.c b/board/compulab/cl-som-imx7/cl-som-imx7.c
index af19a65..7853c4d 100644
--- a/board/compulab/cl-som-imx7/cl-som-imx7.c
+++ b/board/compulab/cl-som-imx7/cl-som-imx7.c
@@ -7,7 +7,7 @@
* Author: Uri Mashiach <uri.mashiach@compulab.co.il>
*/
-#include <common.h>
+#include <config.h>
#include <env.h>
#include <init.h>
#include <mmc.h>
diff --git a/board/compulab/cl-som-imx7/common.c b/board/compulab/cl-som-imx7/common.c
index 40ba0f7..ae8e834 100644
--- a/board/compulab/cl-som-imx7/common.c
+++ b/board/compulab/cl-som-imx7/common.c
@@ -7,7 +7,6 @@
* Author: Uri Mashiach <uri.mashiach@compulab.co.il>
*/
-#include <common.h>
#include <fsl_esdhc_imx.h>
#include <asm-generic/gpio.h>
#include "common.h"
diff --git a/board/compulab/cl-som-imx7/mux.c b/board/compulab/cl-som-imx7/mux.c
index 18f16a4..25123ee 100644
--- a/board/compulab/cl-som-imx7/mux.c
+++ b/board/compulab/cl-som-imx7/mux.c
@@ -7,7 +7,7 @@
* Author: Uri Mashiach <uri.mashiach@compulab.co.il>
*/
-#include <common.h>
+#include <linux/kernel.h>
#include <asm/mach-imx/iomux-v3.h>
#include <asm/arch-mx7/mx7-pins.h>
diff --git a/board/compulab/cl-som-imx7/spl.c b/board/compulab/cl-som-imx7/spl.c
index 98c3b83..9b6bbb9 100644
--- a/board/compulab/cl-som-imx7/spl.c
+++ b/board/compulab/cl-som-imx7/spl.c
@@ -7,7 +7,6 @@
* Author: Uri Mashiach <uri.mashiach@compulab.co.il>
*/
-#include <common.h>
#include <hang.h>
#include <init.h>
#include <spl.h>
diff --git a/board/compulab/cm_fx6/cm_fx6.c b/board/compulab/cm_fx6/cm_fx6.c
index 7bce09e..4a6cc3e 100644
--- a/board/compulab/cm_fx6/cm_fx6.c
+++ b/board/compulab/cm_fx6/cm_fx6.c
@@ -7,7 +7,7 @@
* Author: Nikita Kiryanov <nikita@compulab.co.il>
*/
-#include <common.h>
+#include <config.h>
#include <ahci.h>
#include <dm.h>
#include <dwc_ahsata.h>
diff --git a/board/compulab/cm_fx6/common.c b/board/compulab/cm_fx6/common.c
index ed8c7a3..a71861b 100644
--- a/board/compulab/cm_fx6/common.c
+++ b/board/compulab/cm_fx6/common.c
@@ -7,7 +7,6 @@
* Author: Nikita Kiryanov <nikita@compulab.co.il>
*/
-#include <common.h>
#include <asm/arch/sys_proto.h>
#include <asm/gpio.h>
#include <asm/mach-imx/spi.h>
diff --git a/board/compulab/cm_fx6/spl.c b/board/compulab/cm_fx6/spl.c
index 079f196..b11bf2d 100644
--- a/board/compulab/cm_fx6/spl.c
+++ b/board/compulab/cm_fx6/spl.c
@@ -7,7 +7,6 @@
* Author: Nikita Kiryanov <nikita@compulab.co.il>
*/
-#include <common.h>
#include <clock_legacy.h>
#include <hang.h>
#include <init.h>
diff --git a/board/compulab/cm_t43/cm_t43.c b/board/compulab/cm_t43/cm_t43.c
index 5df378a..1815819 100644
--- a/board/compulab/cm_t43/cm_t43.c
+++ b/board/compulab/cm_t43/cm_t43.c
@@ -3,7 +3,7 @@
* Copyright (C) 2015 Compulab, Ltd.
*/
-#include <common.h>
+#include <config.h>
#include <i2c.h>
#include <miiphy.h>
#include <cpsw.h>
diff --git a/board/compulab/cm_t43/mux.c b/board/compulab/cm_t43/mux.c
index 778ea05..f109105 100644
--- a/board/compulab/cm_t43/mux.c
+++ b/board/compulab/cm_t43/mux.c
@@ -3,7 +3,6 @@
* Copyright (C) 2015 Compulab, Ltd.
*/
-#include <common.h>
#include <asm/arch/sys_proto.h>
#include <asm/arch/mux.h>
#include "board.h"
diff --git a/board/compulab/cm_t43/spl.c b/board/compulab/cm_t43/spl.c
index a6223a4..212bfeb 100644
--- a/board/compulab/cm_t43/spl.c
+++ b/board/compulab/cm_t43/spl.c
@@ -3,7 +3,7 @@
* Copyright (C) 2016 Compulab, Ltd.
*/
-#include <common.h>
+#include <config.h>
#include <hang.h>
#include <init.h>
#include <spl.h>
diff --git a/board/compulab/common/common.c b/board/compulab/common/common.c
index 528c97d..6ffebe6 100644
--- a/board/compulab/common/common.c
+++ b/board/compulab/common/common.c
@@ -5,7 +5,6 @@
* Authors: Igor Grinberg <grinberg@compulab.co.il>
*/
-#include <common.h>
#include <malloc.h>
#include <asm/bootm.h>
#include <asm/gpio.h>
diff --git a/board/compulab/common/eeprom.c b/board/compulab/common/eeprom.c
index c4b257f..efdaf34 100644
--- a/board/compulab/common/eeprom.c
+++ b/board/compulab/common/eeprom.c
@@ -6,13 +6,13 @@
* Igor Grinberg <grinberg@compulab.co.il>
*/
-#include <common.h>
-#include <eeprom.h>
#include <i2c.h>
+#include <vsprintf.h>
#include <eeprom_layout.h>
#include <eeprom_field.h>
#include <asm/setup.h>
#include <linux/kernel.h>
+#include <linux/string.h>
#include "eeprom.h"
#define EEPROM_LAYOUT_VER_OFFSET 44
diff --git a/board/compulab/common/omap3_smc911x.c b/board/compulab/common/omap3_smc911x.c
index f0d3652..411fc49 100644
--- a/board/compulab/common/omap3_smc911x.c
+++ b/board/compulab/common/omap3_smc911x.c
@@ -5,7 +5,6 @@
* Authors: Igor Grinberg <grinberg@compulab.co.il>
*/
-#include <common.h>
#include <netdev.h>
#include <linux/delay.h>
diff --git a/board/compulab/imx8mm-cl-iot-gate/ddr/ddr.c b/board/compulab/imx8mm-cl-iot-gate/ddr/ddr.c
index b230478..99d3bf3 100644
--- a/board/compulab/imx8mm-cl-iot-gate/ddr/ddr.c
+++ b/board/compulab/imx8mm-cl-iot-gate/ddr/ddr.c
@@ -5,7 +5,6 @@
*
*/
-#include <common.h>
#include <spl.h>
#include <asm/io.h>
#include <errno.h>
diff --git a/board/compulab/imx8mm-cl-iot-gate/ddr/lpddr4_timing_01061010.1_2.c b/board/compulab/imx8mm-cl-iot-gate/ddr/lpddr4_timing_01061010.1_2.c
index 9019a1f..efcc95c 100644
--- a/board/compulab/imx8mm-cl-iot-gate/ddr/lpddr4_timing_01061010.1_2.c
+++ b/board/compulab/imx8mm-cl-iot-gate/ddr/lpddr4_timing_01061010.1_2.c
@@ -7,7 +7,6 @@
*/
#include <linux/kernel.h>
-#include <common.h>
#include <asm/arch/ddr.h>
#include <asm/arch/lpddr4_define.h>
diff --git a/board/compulab/imx8mm-cl-iot-gate/ddr/lpddr4_timing_01061010.c b/board/compulab/imx8mm-cl-iot-gate/ddr/lpddr4_timing_01061010.c
index 5141c04..67f59ed 100644
--- a/board/compulab/imx8mm-cl-iot-gate/ddr/lpddr4_timing_01061010.c
+++ b/board/compulab/imx8mm-cl-iot-gate/ddr/lpddr4_timing_01061010.c
@@ -7,7 +7,6 @@
*/
#include <linux/kernel.h>
-#include <common.h>
#include <asm/arch/ddr.h>
#include <asm/arch/lpddr4_define.h>
diff --git a/board/compulab/imx8mm-cl-iot-gate/ddr/lpddr4_timing_ff000110.c b/board/compulab/imx8mm-cl-iot-gate/ddr/lpddr4_timing_ff000110.c
index 2334722..273ee89 100644
--- a/board/compulab/imx8mm-cl-iot-gate/ddr/lpddr4_timing_ff000110.c
+++ b/board/compulab/imx8mm-cl-iot-gate/ddr/lpddr4_timing_ff000110.c
@@ -7,7 +7,6 @@
*/
#include <linux/kernel.h>
-#include <common.h>
#include <asm/arch/ddr.h>
#include <asm/arch/lpddr4_define.h>
diff --git a/board/compulab/imx8mm-cl-iot-gate/ddr/lpddr4_timing_ff020008.c b/board/compulab/imx8mm-cl-iot-gate/ddr/lpddr4_timing_ff020008.c
index e65445e..1243800 100644
--- a/board/compulab/imx8mm-cl-iot-gate/ddr/lpddr4_timing_ff020008.c
+++ b/board/compulab/imx8mm-cl-iot-gate/ddr/lpddr4_timing_ff020008.c
@@ -7,7 +7,6 @@
*/
#include <linux/kernel.h>
-#include <common.h>
#include <asm/arch/ddr.h>
#include <asm/arch/lpddr4_define.h>
diff --git a/board/compulab/imx8mm-cl-iot-gate/eeprom_spl.c b/board/compulab/imx8mm-cl-iot-gate/eeprom_spl.c
index 90cc33a..1256848 100644
--- a/board/compulab/imx8mm-cl-iot-gate/eeprom_spl.c
+++ b/board/compulab/imx8mm-cl-iot-gate/eeprom_spl.c
@@ -1,7 +1,7 @@
// SPDX-License-Identifier: GPL-2.0+
/* (C) Copyright 2019 CompuLab, Ltd. <www.compulab.co.il> */
-#include <common.h>
+#include <config.h>
#include <i2c.h>
#include <linux/kernel.h>
#include <asm/arch/imx8mq_pins.h>
diff --git a/board/compulab/imx8mm-cl-iot-gate/imx8mm-cl-iot-gate.c b/board/compulab/imx8mm-cl-iot-gate/imx8mm-cl-iot-gate.c
index af070ec..ba15873 100644
--- a/board/compulab/imx8mm-cl-iot-gate/imx8mm-cl-iot-gate.c
+++ b/board/compulab/imx8mm-cl-iot-gate/imx8mm-cl-iot-gate.c
@@ -4,7 +4,6 @@
* Copyright 2020 Linaro
*/
-#include <common.h>
#include <efi.h>
#include <efi_loader.h>
#include <env.h>
diff --git a/board/compulab/imx8mm-cl-iot-gate/spl.c b/board/compulab/imx8mm-cl-iot-gate/spl.c
index 19c1acd..6d9af25 100644
--- a/board/compulab/imx8mm-cl-iot-gate/spl.c
+++ b/board/compulab/imx8mm-cl-iot-gate/spl.c
@@ -4,7 +4,6 @@
* Copyright 2020 Linaro
*/
-#include <common.h>
#include <command.h>
#include <cpu_func.h>
#include <hang.h>
diff --git a/board/compulab/trimslice/trimslice.c b/board/compulab/trimslice/trimslice.c
index 21ff0cd..af05c0c 100644
--- a/board/compulab/trimslice/trimslice.c
+++ b/board/compulab/trimslice/trimslice.c
@@ -4,7 +4,6 @@
* NVIDIA Corporation <www.nvidia.com>
*/
-#include <common.h>
#include <asm/io.h>
#include <asm/arch/tegra.h>
#include <asm/arch/clock.h>
diff --git a/board/conclusive/kstr-sama5d27/kstr-sama5d27.c b/board/conclusive/kstr-sama5d27/kstr-sama5d27.c
index 1b765b1..64282ae 100644
--- a/board/conclusive/kstr-sama5d27/kstr-sama5d27.c
+++ b/board/conclusive/kstr-sama5d27/kstr-sama5d27.c
@@ -4,7 +4,7 @@
* Copyright (C) 2021-2023 Conclusive Engineering Sp. z o. o.
*/
-#include <common.h>
+#include <config.h>
#include <debug_uart.h>
#include <init.h>
#include <env.h>
diff --git a/board/congatec/cgtqmx8/cgtqmx8.c b/board/congatec/cgtqmx8/cgtqmx8.c
index 3b01354..99c33a1 100644
--- a/board/congatec/cgtqmx8/cgtqmx8.c
+++ b/board/congatec/cgtqmx8/cgtqmx8.c
@@ -3,7 +3,7 @@
* Copyright 2018 congatec AG
* Copyright (C) 2019 Oliver Graute <oliver.graute@kococonnector.com>
*/
-#include <common.h>
+#include <config.h>
#include <errno.h>
#include <linux/libfdt.h>
#include <fsl_esdhc.h>
@@ -171,7 +171,7 @@
* (U-Boot device node) (Physical Port)
* mmc0 (onboard eMMC) USDHC1
* mmc1 (external SD card) USDHC2
- * mmc2 (onboard µSD) USDHC3
+ * mmc2 (onboard uSD) USDHC3
*/
for (i = 0; i < CFG_SYS_FSL_USDHC_NUM; i++) {
switch (i) {
@@ -196,7 +196,7 @@
gpio_direction_input(USDHC1_CD_GPIO);
break;
case 2:
- /* onboard µSD */
+ /* onboard uSD */
if (!imx8_power_domain_lookup_name("conn_sdhc2", &pd))
power_domain_on(&pd);
diff --git a/board/congatec/cgtqmx8/spl.c b/board/congatec/cgtqmx8/spl.c
index b432ce2..242e794 100644
--- a/board/congatec/cgtqmx8/spl.c
+++ b/board/congatec/cgtqmx8/spl.c
@@ -4,7 +4,6 @@
*
*/
-#include <common.h>
#include <dm.h>
#include <fdt_support.h>
#include <init.h>
diff --git a/board/congatec/common/mmc.c b/board/congatec/common/mmc.c
index bb7a3d4..74a189a 100644
--- a/board/congatec/common/mmc.c
+++ b/board/congatec/common/mmc.c
@@ -4,7 +4,8 @@
* Copyright 2018 NXP
*
*/
-#include <common.h>
+
+#include <vsprintf.h>
#include <linux/errno.h>
#include <asm/io.h>
#include <env.h>
diff --git a/board/congatec/conga-qeval20-qa3-e3845/conga-qeval20-qa3.c b/board/congatec/conga-qeval20-qa3-e3845/conga-qeval20-qa3.c
index 315b6dc..4197e88 100644
--- a/board/congatec/conga-qeval20-qa3-e3845/conga-qeval20-qa3.c
+++ b/board/congatec/conga-qeval20-qa3-e3845/conga-qeval20-qa3.c
@@ -3,7 +3,6 @@
* Copyright (C) 2016 Stefan Roese <sr@denx.de>
*/
-#include <common.h>
#include <i2c.h>
#include <init.h>
#include <winbond_w83627.h>
diff --git a/board/coreboot/coreboot/coreboot.c b/board/coreboot/coreboot/coreboot.c
index e58dce3..f2ca107 100644
--- a/board/coreboot/coreboot/coreboot.c
+++ b/board/coreboot/coreboot/coreboot.c
@@ -3,7 +3,6 @@
* Copyright (C) 2018, Bin Meng <bmeng.cn@gmail.com>
*/
-#include <common.h>
#include <splash.h>
#include <init.h>
#include <smbios.h>
diff --git a/board/cortina/presidio-asic/presidio.c b/board/cortina/presidio-asic/presidio.c
index fdfa3af..c07e0ea 100644
--- a/board/cortina/presidio-asic/presidio.c
+++ b/board/cortina/presidio-asic/presidio.c
@@ -3,7 +3,7 @@
* (C) Copyright 2020 - Cortina Access Inc.
*
*/
-#include <common.h>
+#include <config.h>
#include <event.h>
#include <init.h>
#include <malloc.h>
diff --git a/board/cssi/cmpc885/Makefile b/board/cssi/cmpc885/Makefile
index baf9e5a..6c05509 100644
--- a/board/cssi/cmpc885/Makefile
+++ b/board/cssi/cmpc885/Makefile
@@ -5,6 +5,6 @@
# Christophe Leroy <christophe.leroy@c-s.fr>
#
-obj-y += cmpc885.o ../common/common.o
+obj-y += cmpc885.o
obj-y += sdram.o
obj-$(CONFIG_CMD_NAND) += nand.o
diff --git a/board/cssi/cmpc885/cmpc885.c b/board/cssi/cmpc885/cmpc885.c
index e11cfaf..49c1305 100644
--- a/board/cssi/cmpc885/cmpc885.c
+++ b/board/cssi/cmpc885/cmpc885.c
@@ -114,8 +114,10 @@
if (memcmp(din + EE_OFF_MAC1, &ident, sizeof(ident)) == 0)
eth_env_set_enetaddr("ethaddr", din + EE_OFF_MAC1);
- if (memcmp(din + EE_OFF_MAC2, &ident, sizeof(ident)) == 0)
+ if (memcmp(din + EE_OFF_MAC2, &ident, sizeof(ident)) == 0) {
eth_env_set_enetaddr("eth1addr", din + EE_OFF_MAC2);
+ eth_env_set_enetaddr("eth2addr", din + EE_OFF_MAC2);
+ }
return 0;
}
diff --git a/board/cssi/cmpc885/cmpc885.env b/board/cssi/cmpc885/cmpc885.env
index 51ab5ce..570117c 100644
--- a/board/cssi/cmpc885/cmpc885.env
+++ b/board/cssi/cmpc885/cmpc885.env
@@ -2,6 +2,6 @@
filename=cmpc885.itb
console_args=console=ttyCPM0,115200N8
loadkernel=ubi part nand0;ubifsmount ubi0;ubifsload ${loadaddr} /boot/${filename};ubifsumount; ubi detach
-flashboot=setenv bootargs ${console_args} ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:eth0:off ${ofl_args}; run loadkernel; bootm $loadaddr#$config
-tftpboot=setenv bootargs ${console_args} ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:eth0:off ${ofl_args}; tftp ${loadaddr} ${filename};bootm $loadaddr#$config
+flashboot=setenv bootargs ${console_args} ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:eth0:off ${ofl_args}; run loadkernel; bootm ${loadaddr}#${config}
+tftpboot=setenv bootargs ${console_args} ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:eth0:off ${ofl_args}; tftp ${loadaddr} ${filename};bootm ${loadaddr}#${config}
update=echo 'Updating ubi image'; if tftp $loadaddr $ubifile; then nand erase.chip; nand write $loadaddr 0x00 $filesize; fi;
diff --git a/board/cssi/cmpcpro/Makefile b/board/cssi/cmpcpro/Makefile
index 73ff451..3083778 100644
--- a/board/cssi/cmpcpro/Makefile
+++ b/board/cssi/cmpcpro/Makefile
@@ -5,4 +5,4 @@
# SPDX-License-Identifier: GPL-2.0+
#
-obj-y += cmpcpro.o nand.o ../common/common.o
+obj-y += cmpcpro.o nand.o
diff --git a/board/cssi/cmpcpro/cmpcpro.c b/board/cssi/cmpcpro/cmpcpro.c
index ef30412..ec13d9a 100644
--- a/board/cssi/cmpcpro/cmpcpro.c
+++ b/board/cssi/cmpcpro/cmpcpro.c
@@ -7,7 +7,6 @@
#include <dm.h>
#include <env.h>
#include <env_internal.h>
-#include <eeprom.h>
#include <fdt_support.h>
#include <hang.h>
#include <ioports.h>
diff --git a/board/cssi/cmpcpro/cmpcpro.env b/board/cssi/cmpcpro/cmpcpro.env
index 7394b83..47b436f 100644
--- a/board/cssi/cmpcpro/cmpcpro.env
+++ b/board/cssi/cmpcpro/cmpcpro.env
@@ -3,6 +3,6 @@
netdev=eth0
console_args=console=ttyS0,115200N8
loadkernel=ubi part nand0;ubifsmount ubi0; ubifsload ${loadaddr} /boot/${filename}; ubifsumount; ubi detach
-flashboot=mw.w 90000040 0x000E 1; setenv bootargs ${console_args} ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:eth0:off ${ofl_args}; run loadkernel; bootm $loadaddr#$config
-tftpboot=mw.w 90000040 0x000E 1; setenv bootargs ${console_args} ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:eth0:off ${ofl_args}; tftp ${loadaddr} ${filename}; bootm $loadaddr#$config
+flashboot=mw.w 90000040 0x000E 1; setenv bootargs ${console_args} ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:eth0:off ${ofl_args}; run loadkernel; bootm ${loadaddr}#${config}
+tftpboot=mw.w 90000040 0x000E 1; setenv bootargs ${console_args} ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:eth0:off ${ofl_args}; tftp ${loadaddr} ${filename}; bootm ${loadaddr}#${config}
update=echo 'Updating ubi image'; mw.w 90000040 0x000E 1; if tftp $loadaddr $ubifile; then nand erase.chip; nand write $loadaddr 0x00 $filesize; fi;
diff --git a/board/cssi/common/Makefile b/board/cssi/common/Makefile
new file mode 100644
index 0000000..9735826
--- /dev/null
+++ b/board/cssi/common/Makefile
@@ -0,0 +1,8 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2024 CS GROUP France
+# Christophe Leroy <christophe.leroy@csgroup.eu>
+#
+
+obj-$(CONFIG_TARGET_CMPC885) += common.o
+obj-$(CONFIG_TARGET_CMPCPRO) += common.o
diff --git a/board/cssi/common/common.c b/board/cssi/common/common.c
index 7ecf772..0292a90 100644
--- a/board/cssi/common/common.c
+++ b/board/cssi/common/common.c
@@ -164,7 +164,7 @@
void misc_init_r_common(void)
{
- u8 tmp, far_id;
+ u8 tmp, far_id, addr;
int count = 3;
switch (in_8(ADDR_FPGA_R_BASE)) {
@@ -173,6 +173,10 @@
if ((in_8(ADDR_FPGA_R_BASE + 0x31) & FPGA_R_ACQ_AL_FAV) == 0)
env_set("bootdelay", "60");
+ addr = in_8(ADDR_FPGA_R_BASE + 0x43);
+ printf("Board address: 0x%2.2x (System %d Rack %d Slot %d)\n",
+ addr, addr >> 7, (addr >> 4) & 7, addr & 15);
+
env_set("config", CFG_BOARD_MCR3000_2G);
env_set("hostname", CFG_BOARD_MCR3000_2G);
break;
@@ -208,12 +212,44 @@
}
}
+static void iop_setup_fpgam_common(void)
+{
+ u8 far_id = in_8(ADDR_FPGA_R_BASE + 0x43) >> 5;
+
+ if (far_id == FAR_CASRSA) {
+ /*
+ * PFDIR[15] = 0 [0x01]
+ * PFDIR[14] = 1 [0x02]
+ * PFDIR[13] = 1 [0x04]
+ */
+ clrsetbits_8(ADDR_FPGA_R_BASE + 0x37, 0x01, 0x06);
+ /*
+ * PFODR[15] = 1 [0x01]
+ * PFODR[14] = 0 [0x02]
+ * PFODR[13] = 0 [0x04]
+ */
+ clrsetbits_8(ADDR_FPGA_R_BASE + 0x39, 0x06, 0x01);
+ /*
+ * PFDAT[15] = 0 [0x01]
+ * PFDAT[14] = 1 [0x02]
+ * PFDAT[13] = 1 [0x04]
+ * PFDAT[12] = 1 [0x08]
+ */
+ clrsetbits_8(ADDR_FPGA_R_BASE + 0x3B, 0x01, 0x0E);
+
+ /* Setup TOR_OUT */
+ out_8(ADDR_FPGA_R_BASE + 0x32, 0x2A);
+ }
+}
+
void iop_setup_common(void)
{
u8 type = in_8(ADDR_FPGA_R_BASE);
- if (type == TYPE_MCR)
+ if (type == TYPE_MCR) {
iop_setup_mcr();
- else if (type == TYPE_MIAE)
+ } else if (type == TYPE_MIAE) {
iop_setup_miae();
+ iop_setup_fpgam_common();
+ }
}
diff --git a/board/cssi/mcr3000/Makefile b/board/cssi/mcr3000/Makefile
index 7803016..846fd68 100644
--- a/board/cssi/mcr3000/Makefile
+++ b/board/cssi/mcr3000/Makefile
@@ -6,3 +6,4 @@
obj-y += mcr3000.o
obj-$(CONFIG_CMD_NAND) += nand.o
+obj-$(CONFIG_MPC8XX_SPI) += mcr3000_gpio.o
diff --git a/board/cssi/mcr3000/fpga_code.h b/board/cssi/mcr3000/fpga_code.h
new file mode 100644
index 0000000..4772a50
--- /dev/null
+++ b/board/cssi/mcr3000/fpga_code.h
@@ -0,0 +1,9778 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2010 CS Systemes d'Information
+ *
+ * uCORE FPGA code for MCR3000 board
+ */
+
+u32 fpga_code[] = {
+ 0xffffffff, 0xaa995566, 0x30008001, 0x00000007, 0x30016001, 0x00000014,
+ 0x30012001, 0x00803f2d, 0x3000c001, 0x00000000, 0x30008001, 0x00000009,
+ 0x30002001, 0x00000000, 0x30008001, 0x00000001, 0x30004000, 0x5000cf75,
+ 0x00920000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00004004, 0x80000000, 0x00000000, 0x00120000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00004024, 0x80000000, 0x00000000,
+ 0xffca8000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00003ff2, 0xa0000000, 0x00000000, 0x00823000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00014020, 0x80000000, 0x00000000,
+ 0xff5a8000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00003fd6, 0xa0000000, 0x00000000, 0xff5a8000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00003ff6, 0xa0000000, 0x00000000,
+ 0x00100000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000004, 0x80000000, 0x00000000, 0xff9001a2, 0x0078800e, 0xa0058001,
+ 0x60005800, 0x16000580, 0x01600058, 0x001e0007, 0x80016000, 0x78001e00,
+ 0x070001c0, 0x0070001c, 0x00070001, 0xc0007800, 0x1c000600, 0x01800060,
+ 0x00180006, 0x00018000, 0x60001800, 0x06003fe4, 0x00000000, 0x00000000,
+ 0xc015d200, 0xff403f60, 0x0dc8237c, 0x10fc803f, 0xe00cc803, 0x7c00fc90,
+ 0x37e00ff8, 0x03fc00df, 0x003bc00f, 0xc8439700, 0xdf803fe0, 0x0ff803f8,
+ 0x22cf803f, 0xe00ff803, 0xfe00ff80, 0x3fe00ff8, 0x03fe00ff, 0x803fa02d,
+ 0xf3033020, 0x70000000, 0x00000000, 0x8090ea00, 0xbf102e40, 0x0892803f,
+ 0x0098802c, 0xcb8a8802, 0x2e088a20, 0x0ac20bb8, 0x027e420f, 0x9022f00b,
+ 0xb822e408, 0x8b822cc0, 0x09b802e8, 0x248b802e, 0xe00bb802, 0xee00bb80,
+ 0x2ee00bb8, 0x02ee00bb, 0x802e8048, 0xa4022006, 0x30000000, 0x00000000,
+ 0x08008000, 0xa3206ec0, 0x29a002cc, 0x4081040c, 0xc80a8010, 0xcc049a00,
+ 0x2cc80b30, 0x02cc00a3, 0x00a0d04b, 0xb0222081, 0xb3006cc0, 0x0b3002cc,
+ 0x8083002c, 0xc00b3002, 0xcc00b300, 0x2cc00b30, 0x02cc00b3, 0x002c8a0b,
+ 0x334a0280, 0x20000000, 0x00000000, 0xc015ee00, 0xbb002ec4, 0x0998022c,
+ 0x0489002e, 0xc00b9402, 0xe4018920, 0x62c00bb0, 0x02ec00ab, 0x0022c14b,
+ 0xb002ac40, 0xab006ec0, 0x09b002ee, 0x008b002e, 0xc00bb002, 0xec00bb00,
+ 0x2ec00bb0, 0x02ec10bb, 0x002e900a, 0xa0023000, 0x60000000, 0x00000000,
+ 0x4105e304, 0xfb023c60, 0x0d0883ec, 0x01db003e, 0xc00e0803, 0xec00d0c8,
+ 0x3ec04fb0, 0x12ec00eb, 0x0072c00f, 0x80032480, 0xfb003ec0, 0x0fb007cb,
+ 0x00cb003e, 0xc00fb003, 0xec00fb00, 0x3ec00fb0, 0x03ec00fb, 0x002e800f,
+ 0xb00b1044, 0x70000000, 0x00000000, 0xa011b800, 0xff013f60, 0x8ed023dc,
+ 0x04df903f, 0xc006f243, 0x3a40ec80, 0x3fc087f0, 0x837c0057, 0x006fc08f,
+ 0xf003fe00, 0xdf003fc0, 0x0ff003f8, 0x00ff003f, 0xc00ff003, 0xfc00ff00,
+ 0x3fc00ff0, 0x03fc00ff, 0x003f844d, 0x7403e800, 0x60000000, 0x00000000,
+ 0xc010a000, 0xcf0036c0, 0x2ea0033c, 0x00eb0c3a, 0xc00ea403, 0x8c00fb00,
+ 0x3ac00fb0, 0x03dc00ff, 0x203ac80e, 0xb203a450, 0xdb003ec0, 0x0cb003ed,
+ 0x02cb003e, 0xc00fb003, 0xec00fb00, 0x3ec00fb0, 0x03ec00fb, 0x003e980e,
+ 0xb0033004, 0x20000000, 0x00000000, 0xc8052820, 0x8f0422e8, 0x089002fc,
+ 0x880b6022, 0xc008b000, 0xe410eb00, 0x22c00eb8, 0x023c808f, 0x4023e308,
+ 0x38214e00, 0x9b003ac0, 0x0db002ee, 0x808b003a, 0xc00bb002, 0xec00bb00,
+ 0x2ec00bb0, 0x02ec00bb, 0x002e0100, 0xb9823200, 0x40000000, 0x00000000,
+ 0xc0044000, 0x830024e0, 0x0820028e, 0x00b2842a, 0xc0080002, 0x8c04b004,
+ 0x28c00b3d, 0x028c00a3, 0x9028d10b, 0x04020780, 0x83002cc0, 0x083002c4,
+ 0x8483042c, 0xc00b3002, 0xcc00b300, 0x2cc00b30, 0x024c00a3, 0x00268428,
+ 0x14023100, 0x10000000, 0x00000000, 0x60107b02, 0x839025e0, 0x086802de,
+ 0x019e8061, 0xe02a6806, 0xde40af84, 0x21e01a78, 0x021ec887, 0x8425e009,
+ 0x78867640, 0x878029e0, 0x097802d6, 0x40878029, 0xe00b7802, 0xde00b780,
+ 0x2de00b78, 0x02de00b7, 0x822fa808, 0x28021804, 0x10000000, 0x00000000,
+ 0x48084800, 0xc30036c0, 0x0a20038c, 0x10b30038, 0xc40c3043, 0x8c00f200,
+ 0x28c01f30, 0x028c80a3, 0x0138c58f, 0x31028c50, 0xd3003cc0, 0x0c3003e5,
+ 0x00c3003c, 0xc00f3003, 0xcc00f300, 0x3cc00f30, 0x03cc00e3, 0x003c804e,
+ 0x100b1302, 0x10000000, 0x00000000, 0x4015b800, 0xff443bc4, 0x0fc001dc,
+ 0x00e7001f, 0xc005f023, 0xfc11f500, 0x3bc40f70, 0x279c90e7, 0x1139c11e,
+ 0x7003fc50, 0xff003bc0, 0x0ff103f4, 0x10ff003b, 0xc00ff003, 0xfc00ff00,
+ 0x3fc01ff0, 0x03fc00ff, 0x003d880f, 0xe103d004, 0x60000000, 0x00000000,
+ 0x0804a000, 0xff80bae0, 0x0da003fc, 0x20db003e, 0xc00f9003, 0xee04cb80,
+ 0x12c08fb0, 0x20bd40cf, 0x303ec48f, 0x8003cc00, 0xcb003ec0, 0x0fb003ec,
+ 0x00cb003e, 0xc00fb003, 0xec00fb00, 0x3ec00fb0, 0x03ec00fb, 0x003e802c,
+ 0x90230200, 0x20000000, 0x00000000, 0xc0189800, 0xb72021c0, 0x096004dc,
+ 0x00b7002d, 0xc01b7002, 0xd8008f00, 0x35c00b70, 0x02dca087, 0x286dc00b,
+ 0x7022dc00, 0xd7002dc0, 0x0b70265c, 0x02c7002d, 0xc00e7003, 0xdc00b700,
+ 0x2dc00b70, 0x02dc00b7, 0x022d800d, 0x50023006, 0x20000000, 0x00000000,
+ 0x20009a00, 0xb3b02be0, 0x087802de, 0x40a7802d, 0xe00b7846, 0xce029580,
+ 0x29e00978, 0x02ce80a7, 0xa46de81b, 0x7802fe00, 0x87802de0, 0x0b7802fe,
+ 0x2097802d, 0xe00b7802, 0xde00b780, 0x2de00b78, 0x02de00b7, 0x802da008,
+ 0x38020800, 0x20000000, 0x00000000, 0x6804cc80, 0xb30020c0, 0x091602cc,
+ 0x10b3c02c, 0xc01b3502, 0xcc809104, 0x24c00b30, 0x02cc00a3, 0x002cc10b,
+ 0x3002cd40, 0x93002cc0, 0x0b30024e, 0x0083002c, 0xc00a3002, 0xcc00b300,
+ 0x2cc00b30, 0x02cc00b3, 0x022cd209, 0xb8021a00, 0x20000000, 0x00000000,
+ 0xe815f900, 0xfa002a80, 0x2ce403e8, 0x00eed83e, 0x800f6503, 0xf800dea0,
+ 0x3a800fa0, 0x03e8022a, 0x003e804f, 0xe021da00, 0xca003e80, 0x0fa003f8,
+ 0x00da003e, 0x800fa003, 0xe800fa00, 0x3e800fa0, 0x03e800fa, 0x003fb00c,
+ 0xe40b3a04, 0x70000000, 0x00000000, 0x4801a000, 0xf8003e00, 0x0e8003e0,
+ 0x00f8003e, 0x008f8003, 0xe000e800, 0x16000f80, 0x03e10018, 0x403e000f,
+ 0x8403e000, 0xf8003e10, 0x1f8003e1, 0x00f8003e, 0x000f8003, 0xa000f800,
+ 0x3e000f80, 0x03e000f8, 0x023e044f, 0x8583d200, 0x60000000, 0x00000000,
+ 0x0810a400, 0xf9003e44, 0x0f900306, 0x4059003e, 0x400c9003, 0xa400f908,
+ 0x3e410c90, 0x03c600d9, 0x021e600f, 0x9c03e460, 0xc9003a60, 0x0f9023a6,
+ 0x82c9003e, 0x400f9003, 0xe400f900, 0x3e400f90, 0x03e400f9, 0x003e608c,
+ 0x91030204, 0x20000000, 0x00000000, 0x80046400, 0xb9022e78, 0x0b900226,
+ 0x20b9882e, 0x400a9002, 0x2400b900, 0x2e400899, 0x02e740a9, 0x403a440b,
+ 0x9802e600, 0xa9002e44, 0x0b9002c4, 0x9889002e, 0x400b9002, 0xe400b900,
+ 0x2e400b90, 0x02e400b9, 0x002c4108, 0x9c02a000, 0x10000000, 0x00000000,
+ 0x38052d00, 0x39002e40, 0x0b102224, 0x04a92028, 0x40089002, 0xe400b900,
+ 0x2c400894, 0x22a50019, 0x552e4319, 0x9402a400, 0x99002a40, 0x0b9002a4,
+ 0x0099002e, 0x400b9002, 0xe400b900, 0x2e400b90, 0x02e400b9, 0x002e4928,
+ 0x90024e00, 0x40000000, 0x00000000, 0x28140408, 0xb1102c50, 0x0b140204,
+ 0x00a1002c, 0x500a9002, 0xc400b140, 0x2c501810, 0x02c40881, 0x0028400b,
+ 0x1012e442, 0xb1002cd0, 0x1b1002e5, 0x0091002c, 0x400b1002, 0xc400b100,
+ 0x2c400b10, 0x02c400b1, 0x002cc408, 0x1102cb05, 0x00000000, 0x00000000,
+ 0x380c2000, 0xf8403e00, 0x0f804320, 0x00f8003e, 0x000c8002, 0xe000f800,
+ 0x3e000c80, 0x03e004d8, 0x043e000f, 0x8003a100, 0xd8003a00, 0x0f8003a0,
+ 0xa0d8043e, 0x000f8003, 0xe000f800, 0x3e000f80, 0x03e000f8, 0x003e100c,
+ 0xa6834e03, 0x50000000, 0x00000000, 0x9805f400, 0xf9617d40, 0x0fd00be5,
+ 0x00fd003e, 0x410fd003, 0x3d00ff00, 0x3e402f90, 0x23e500f9, 0x403a500f,
+ 0xd023f480, 0x69003e40, 0x0f9003d4, 0x00e9003e, 0x400d9003, 0xe400f900,
+ 0x3e400f90, 0x03e400f9, 0x003dc84f, 0xd203a704, 0x70000000, 0x00000000,
+ 0x1805f400, 0xf9283944, 0x0f900334, 0x00cd003e, 0x400f9003, 0xe484f900,
+ 0x22400fd0, 0x03f480dd, 0x287f480f, 0x5003b400, 0xe9003f40, 0x0f9003f4,
+ 0x00c9003e, 0x400d9003, 0xe400f900, 0x3e400f90, 0x03e400f9, 0x003d402c,
+ 0xd0030600, 0x70000000, 0x00000000, 0x3818e000, 0xb8002e08, 0x0b808220,
+ 0x04d8002e, 0x0a0b8002, 0xe040b808, 0x20020b80, 0x02e008b8, 0x003a040b,
+ 0x80036000, 0xc8043e0a, 0x0b8003a8, 0x0488002e, 0x000b8003, 0xa000b800,
+ 0x2e000b80, 0x02e000e8, 0x023a0048, 0x82020e06, 0x30000000, 0x00000000,
+ 0x48008e00, 0xb1002848, 0x9b122244, 0x4581022c, 0x480b1002, 0xc400b120,
+ 0xa0400b10, 0x62c440b1, 0x002c400b, 0x9002a401, 0xa1002c48, 0x0b1002c4,
+ 0x0081002c, 0x400b1002, 0xc400b100, 0x2c400b10, 0x02c400b1, 0x002c402a,
+ 0x12821200, 0x20000000, 0x00000000, 0x9801a400, 0xb9002e48, 0x1b904264,
+ 0x0199092e, 0x400b9402, 0xe400b904, 0x22400b90, 0x02e410b9, 0x002a400b,
+ 0x91066480, 0x89006ac0, 0x039022a4, 0x0089002e, 0x400b9002, 0xa400b900,
+ 0x2e400b90, 0x02e400a9, 0x022a600a, 0x90022600, 0x20000000, 0x00000000,
+ 0xa011e740, 0xf9003a60, 0x0f9a1344, 0x0089443e, 0x400f9807, 0xe600b9d0,
+ 0x32400f90, 0x03e408f9, 0x002e400f, 0x1881a528, 0xe9002e40, 0x0b9003e5,
+ 0x02c9023e, 0x400d9003, 0xe400f900, 0x3e400f90, 0x03e400f9, 0x003c502e,
+ 0x900b2804, 0x70000000, 0x00000000, 0xc801a400, 0xf9003e61, 0x0f9a0ba4,
+ 0x08f9083e, 0x400f9c13, 0xe641f980, 0x3e401f90, 0x03e400f9, 0x007e404f,
+ 0x9003e400, 0xe9003e40, 0x0f9003a4, 0x00f9003e, 0x40079003, 0xa400f900,
+ 0x3e400f90, 0x03e400e9, 0x003e400d, 0x1103f200, 0x60000000, 0x00000000,
+ 0x0810a000, 0xf8007202, 0x0c8003e0, 0x30e8403a, 0x010f8003, 0xe000f800,
+ 0x3e000d82, 0x03e000f8, 0x040e015f, 0x84136008, 0xd8003e02, 0x0f800341,
+ 0x00c8003e, 0x000f8003, 0xe000f800, 0x3e000f80, 0x03e000f8, 0x003e042c,
+ 0x80030204, 0x20000000, 0x00000000, 0x28053900, 0xba00a3b0, 0x48a013ba,
+ 0x00ee202a, 0x800ba002, 0xe804ba00, 0x2e800ae4, 0x82f800be, 0xc13bb40b,
+ 0xe6131a80, 0xaa002fb0, 0x0ba00279, 0x00fa002e, 0x800ba002, 0xe800ba00,
+ 0x2e800ea0, 0x02e800ba, 0x042f800a, 0xe403ca00, 0x40000000, 0x00000000,
+ 0x28044d20, 0xb30064d4, 0x88b0128e, 0x05a34168, 0xc08b3002, 0xcc01bb00,
+ 0x2cc0093c, 0x02ce00b3, 0xa128e003, 0x3c828d24, 0x83022cc4, 0x0b30024d,
+ 0x8083002c, 0xc00b3002, 0xcc00b300, 0x2cc00b30, 0x028c01b3, 0x002cc028,
+ 0x3a020a00, 0x10000000, 0x00000000, 0x80105410, 0xb7a023e0, 0x0972029c,
+ 0x20a58125, 0xc80b7002, 0xdc00b700, 0x2de00a50, 0x02dd0095, 0x0829c20b,
+ 0xd01ab405, 0xb7002dc0, 0x0b700278, 0x00b7002d, 0xc00b7002, 0xdc00b700,
+ 0x2dc00a70, 0x02dc00b7, 0x002d007a, 0x7402e004, 0x10000000, 0x00000000,
+ 0x88085a00, 0xf3e43160, 0x2c7a0396, 0x00e58039, 0xf30f7802, 0xde00f790,
+ 0x2dec0d58, 0x03da00f5, 0x8139e00b, 0x78039e00, 0xd7803de0, 0x0f780352,
+ 0x0287803d, 0xe00f7803, 0xde00f780, 0x2de00f78, 0x039e0077, 0x803d602c,
+ 0xf80b2202, 0x10000000, 0x00000000, 0x0815a000, 0xfb803ec0, 0x0ef003a4,
+ 0x00f1013b, 0xc90fb023, 0xec08ff30, 0x3fcc0d90, 0x03e808f9, 0x043a800d,
+ 0xb0030c02, 0xeb003ec0, 0x0fb003c8, 0x10fb003e, 0xc00fb003, 0xec00fb00,
+ 0x3ec00eb0, 0x03ec00fb, 0x003e400f, 0xb003c204, 0x60000000, 0x00000000,
+ 0x0004b600, 0xff2033a0, 0x0cfc83be, 0x40bd803f, 0xe40cf803, 0xfe40bf92,
+ 0x13e008d9, 0x03f600cd, 0x903fe00c, 0xf203de02, 0xdf813fe0, 0x0ff903fe,
+ 0x00cf803f, 0xc00ff803, 0xfe00ff80, 0x3fe00ff8, 0x03fe00ff, 0x813f608c,
+ 0xd84b0000, 0x60000000, 0x00000000, 0xa8189840, 0xbf003180, 0x0df00214,
+ 0x4085202f, 0xc40d7003, 0x9c00b700, 0x37c80854, 0x03dc0884, 0x0031400c,
+ 0x61061000, 0xd7002dc0, 0x0e704278, 0x40d7003d, 0xc00b7002, 0xdc00b700,
+ 0x2dc00b70, 0x03dc00b7, 0x002d0208, 0x600b6a06, 0x20000000, 0x00000000,
+ 0x00009100, 0xb70021c0, 0x08710280, 0x01a4002d, 0xc0187002, 0xdc009708,
+ 0x21c08840, 0x228800b5, 0x000dc008, 0xf002b420, 0x87002dc0, 0x0b7042d4,
+ 0x0087002d, 0xc00b7002, 0xdc00b700, 0x2dc00b70, 0x02dc00b7, 0x002f4408,
+ 0x00024000, 0x20000000, 0x00000000, 0x20048840, 0xb30020c0, 0x09384200,
+ 0x1180002c, 0xc00b3202, 0x4c40b304, 0x2ec00800, 0x02c01090, 0x026c0008,
+ 0x0c922121, 0x93002ec0, 0x0a302248, 0x0093002c, 0xc00b3002, 0xcc00b300,
+ 0x2cc00b30, 0x028c00b3, 0x022c4088, 0x85024800, 0x20000000, 0x00000000,
+ 0xa815e400, 0xff0032c0, 0x08fa03ac, 0x00a9003f, 0xc088ba02, 0xec089f00,
+ 0x23c08c90, 0x11a000f9, 0x002ec028, 0x9000a600, 0xcb003e00, 0x0bb003cc,
+ 0x00cb003e, 0xc00fb003, 0xec00fb00, 0x3ec00fb0, 0x02ec00fb, 0x003ed00c,
+ 0x900b6a04, 0x60000000, 0x00000000, 0x8001a400, 0xfb003ac0, 0x0ff003cc,
+ 0x00e8003f, 0xc00db003, 0xac20ff00, 0x37c00f80, 0x01a10081, 0x0032c00f,
+ 0x9103a400, 0xeb003e00, 0x0fb02368, 0x00eb003a, 0xc00fb003, 0xec00fb00,
+ 0x3ec00fb0, 0x03ec00fb, 0x023e800f, 0xb003e000, 0x60000000, 0x00000000,
+ 0x2110b000, 0xff003f40, 0x0cf0833c, 0x0acd0037, 0xc00ff003, 0xfc01ff0a,
+ 0x13c00dd0, 0x03f0007c, 0x0032640c, 0xc0037c00, 0xcf013fe0, 0x88f003fc,
+ 0x80cf003f, 0xc00ff003, 0xfc00ff00, 0x3fc00ff0, 0x03fc00ff, 0x003f420c,
+ 0xd0830844, 0x20000000, 0x00000000, 0xa1046208, 0xbb002cc0, 0x89b002ac,
+ 0x40808022, 0xc009b003, 0xac00bb00, 0x2ac00c88, 0x026300b8, 0xc02c300f,
+ 0x08036e00, 0x8b002ef0, 0x0db002ea, 0x00ab006e, 0xc00bb002, 0xec00bb00,
+ 0x2ec10bb0, 0x03ac00bb, 0x002c6008, 0x98022841, 0x00000000, 0x00000000,
+ 0x80052600, 0x9b012ed0, 0x8930426c, 0x00898026, 0xc00bb006, 0xec00b300,
+ 0xaac00998, 0x02a225b9, 0x88269008, 0x9892e600, 0x8b012ec8, 0x8ab002ed,
+ 0x008b002e, 0xc00bb002, 0xec00bb00, 0x2ec00bb0, 0x02ec00bb, 0x002ee008,
+ 0xb8022000, 0x40000000, 0x00000000, 0x08140000, 0xb3002ec0, 0x493002c4,
+ 0x01888020, 0xc0093002, 0x8c009300, 0x28c00800, 0x024000b0, 0x00a40001,
+ 0x8006c003, 0x83002cc0, 0x033002e8, 0x02a3002c, 0xc00b3002, 0xcc00b300,
+ 0x2cc00b30, 0x028c00b3, 0x002c8028, 0x20060205, 0x00000000, 0x00000000,
+ 0x000d6000, 0xfb042cc0, 0x0cf04368, 0x00880037, 0xc00fb003, 0xec00b700,
+ 0x2bc00d80, 0x23e000b8, 0x0036000c, 0x8003e400, 0xcb003ec0, 0x0eb003ec,
+ 0x00cb002e, 0xc00fb003, 0xec00fb00, 0x3ec00fb0, 0x03ec00bb, 0x003e400c,
+ 0xa0030003, 0x50000000, 0x00000000, 0xa015f000, 0xff003fc0, 0x2ef003b0,
+ 0x007c023f, 0xc00ff003, 0xbc04ff00, 0x37c00ec0, 0x03f000fc, 0x003b001f,
+ 0x40073000, 0xff003fc0, 0x1df003f8, 0x00ff003f, 0xc00ff003, 0xfc00ff00,
+ 0x3fc00ff0, 0x03fc00ff, 0x003d404f, 0xe003e804, 0x70000000, 0x00000000,
+ 0xc015d888, 0xcf103761, 0x0dc803f2, 0x00cf3033, 0x200ff203, 0x3200df28,
+ 0x33c00ff8, 0x03fe00f4, 0x803f200e, 0x5803d200, 0xff803fe0, 0x0ff803ff,
+ 0x00cfc033, 0xe00ff803, 0xfe00ff80, 0x3be00ff8, 0x03fe00ff, 0x803fe40c,
+ 0xf8033000, 0x70000000, 0x00000000, 0x8018e9a8, 0x8b702040, 0x0c8082e2,
+ 0x088f4422, 0x204bfc03, 0x24a0afc0, 0x22e04bb2, 0x82ee0438, 0x812e200a,
+ 0x9842e200, 0xbb802ee0, 0x09b802ec, 0x028b0022, 0xe00bb802, 0xee00bb80,
+ 0x2ee00bb8, 0x02ee00bb, 0x842ec008, 0xb8036004, 0x30000000, 0x00000000,
+ 0x0805c8c0, 0x82002840, 0x480202e0, 0x00836128, 0x008b3102, 0x2400b301,
+ 0xa8c01a32, 0x32cc00b0, 0x022ac02a, 0x1002c008, 0xb3006cc0, 0x0b3002cc,
+ 0x808320a0, 0xc00b3002, 0xcc00b300, 0x28c00b30, 0x02cc00b3, 0x002e0028,
+ 0x30120211, 0x70000000, 0x00000000, 0xc005a802, 0x9a40aa40, 0x08b042e8,
+ 0x008b002a, 0x204bb002, 0x6e00ab03, 0x2ad80bb0, 0x06ec00b8, 0x006ec00a,
+ 0xb802e200, 0xbb002ec0, 0x0bb002cc, 0x008b0022, 0xc00bb002, 0xec00bb00,
+ 0x2ec08bb0, 0x02ec00bb, 0x002ef008, 0xb0027004, 0x40000000, 0x00000000,
+ 0x0004af68, 0xcbc23ec0, 0x088d83c1, 0x40cb00ba, 0x380fb003, 0x2220fb00,
+ 0x3af00fb0, 0x03ec08f8, 0x5838c04e, 0x8803e320, 0xfb003ec0, 0x0fb003ec,
+ 0x00cb0032, 0xc00fb003, 0xec00fb00, 0x3ac00fb0, 0x03ec00fb, 0x003ef00c,
+ 0xb0030004, 0x70000000, 0x00000000, 0xe110be00, 0xaf9037c4, 0x0fc803f4,
+ 0x04ff0037, 0x000f7003, 0xbc02e700, 0x37c00ff0, 0x03fc00fc, 0x801fc00d,
+ 0xc003f000, 0xbf003fc0, 0x0df003fc, 0x00ff003f, 0xc00ff003, 0xfc00ff00,
+ 0x3fc007f0, 0x03fc00ff, 0x003fc00f, 0xf003f800, 0x60000000, 0x00000000,
+ 0xc010ad00, 0xca003ac4, 0x1eb003ad, 0x80cf003a, 0x1c0ff313, 0xa508ff0a,
+ 0x3ec00fb0, 0x03ec00f8, 0x503ee184, 0xb0032010, 0xcb003ec0, 0x0fb003ec,
+ 0x00cb003e, 0xc00fb003, 0xec00fb00, 0x3ec00fb0, 0x53ec04fb, 0x043ed80c,
+ 0xb0033004, 0x20000000, 0x00000000, 0xc8040c00, 0x8a0002e0, 0x08b0022c,
+ 0x008f0022, 0x000bf402, 0x0c04dfc1, 0x2ec00bb0, 0x02ef30b8, 0x5032d40d,
+ 0xb0822000, 0xdb8826c0, 0x0bb002ec, 0x028b002e, 0xc00bb002, 0xec00bb00,
+ 0x2ec00bb0, 0x02ec00bb, 0x002cc20a, 0x3a02b200, 0x40000000, 0x00000000,
+ 0xe0054802, 0x8b002ac0, 0x0a0002c0, 0x008b0028, 0x000b3002, 0x84088380,
+ 0x04c01b30, 0x024e20b0, 0x40280009, 0x18024000, 0x93802cc0, 0x0b3002cc,
+ 0x088b002c, 0xc00b3002, 0xcc00b300, 0x2cc00b30, 0x024c00b3, 0x002cf008,
+ 0x38823800, 0x50000000, 0x00000000, 0x62011200, 0x8d9021e0, 0x08f9025e,
+ 0x04839021, 0x200b7802, 0x36409788, 0x2dc40b78, 0x02de00bc, 0x80232409,
+ 0xf8227200, 0x978025e0, 0x0b7802de, 0x0087802d, 0xe00b7802, 0xde00b780,
+ 0x2de00b78, 0x02de00b7, 0x802fe00a, 0x78029810, 0x40000000, 0x00000000,
+ 0x48080800, 0xc31038c0, 0x0a0003c4, 0x20c30038, 0x040f3012, 0x8c42a310,
+ 0x3c040b31, 0x034c40f0, 0x1038c00d, 0x10034040, 0xd3003cc0, 0x0f3003ec,
+ 0x40c3003c, 0xc00f3003, 0xcc00f300, 0x3cc40f30, 0x03cc00f3, 0x003cc00c,
+ 0x30031202, 0x00000000, 0x00000000, 0x401db801, 0xf5103fc0, 0x0f70039c,
+ 0x41ff001f, 0x400f7103, 0xdc42ff08, 0x3f880ff0, 0x03fc10ff, 0x003dc00f,
+ 0xf003b440, 0xff003fc0, 0x0ff003fc, 0x00ff003f, 0xc00ff003, 0xfc00ff00,
+ 0x3fc01ff0, 0x03fc00ff, 0x003dc407, 0x7003d006, 0x60000000, 0x00000000,
+ 0xa815ec00, 0xdf103240, 0x0eb80368, 0x00ff643a, 0x001ff700, 0xcc00df21,
+ 0x3ee00eb0, 0x03ec00f8, 0x003cc00c, 0x38032000, 0x7b003ec0, 0x0fb003ec,
+ 0x00fb80b2, 0xc00fb003, 0xec00fb00, 0x3ec00fb0, 0x03ec00fb, 0x003cc01c,
+ 0xb003ea00, 0x70000000, 0x00000000, 0xc8119400, 0xcd802140, 0x0b70021c,
+ 0x00b76821, 0x018b7142, 0x5c008730, 0x2cc00870, 0x02dc01b4, 0x006dc00a,
+ 0x70029400, 0xb7002dc0, 0x0b7012dc, 0x08b70021, 0xc00b7002, 0xdc00b700,
+ 0x2dc00b70, 0x02dc00b7, 0x002dc008, 0x7002f204, 0x60000000, 0x00000000,
+ 0xc0009a02, 0x87802160, 0x0bf802de, 0x00b78025, 0x604b7a02, 0x7e048780,
+ 0x29600a78, 0x029e09b7, 0x802fe218, 0xf8029200, 0xb7802de0, 0x0b7802de,
+ 0x00b78021, 0xe00b7802, 0xde00b780, 0x2de00b78, 0x02de00b7, 0x802fe008,
+ 0x7822f010, 0x20000000, 0x00000000, 0x4804cc20, 0x81002064, 0x0b3c028d,
+ 0x10b30024, 0xc00b3002, 0x6e028300, 0x2cd20830, 0x02cc00b3, 0xe22cd00a,
+ 0x35028c00, 0xb3002cc0, 0x0b3002cc, 0x00b30020, 0xc00b3002, 0xcc00b300,
+ 0x2cc00b30, 0x02cc00b3, 0x002cc408, 0x3002d204, 0x30000000, 0x00000000,
+ 0xe8053800, 0xce01b2a1, 0x0fe483fa, 0xc0fa002f, 0x9c0fa007, 0x7802ca00,
+ 0x3f900ea0, 0x03e800be, 0xa03d800c, 0xec02ba20, 0xfa021e80, 0x0ba003e8,
+ 0x00fa0032, 0x800fa003, 0xe800fa00, 0x3e800fa0, 0x03e800fa, 0x003db02c,
+ 0xa003fa04, 0x60000000, 0x00000000, 0x4800e000, 0xe8003e10, 0x0f820361,
+ 0x00f000ba, 0x100f8003, 0x6048f800, 0x3e000f80, 0x13e000f8, 0x403e020f,
+ 0x8082e000, 0xf8003e00, 0x0f8003e0, 0x00f8003e, 0x000f8003, 0xe000f800,
+ 0x3e000f80, 0x03e000f8, 0x003e090f, 0x8403d200, 0x30000000, 0x00000000,
+ 0x0800e400, 0xc9003e70, 0x0f9003e6, 0x10f90032, 0x600e9813, 0xe400c100,
+ 0x32400790, 0x03e400e9, 0xa02e440d, 0x9003e420, 0xf9a03e40, 0x0f9003e4,
+ 0x00c9003e, 0x400f9003, 0xe400f900, 0x3e400f90, 0x03e400f9, 0x003e400c,
+ 0x9903c204, 0x30000000, 0x00000000, 0x80044400, 0xad002240, 0x0b9002e4,
+ 0x00b9003c, 0x78089182, 0xe401e930, 0x2e400b90, 0x02c70089, 0x402e620d,
+ 0x9803a400, 0xb9002e40, 0x0b9002e4, 0x0289002e, 0x400b9002, 0xe400b900,
+ 0x2e400b90, 0x02e400b9, 0x002e542a, 0x9c02e000, 0x10000000, 0x00000000,
+ 0x18152482, 0x81002640, 0x0b9002ac, 0x40b90062, 0x441a9012, 0xe4008900,
+ 0x26400b90, 0x02e441a9, 0x002e4008, 0xb102e400, 0xb9002e40, 0x0b9002c4,
+ 0x0089002e, 0x400b9002, 0xe400b900, 0x2e400b90, 0x02e400b9, 0x002e4208,
+ 0x9082c600, 0x40000000, 0x00000000, 0x08040440, 0xa14020d0, 0x1b1402c4,
+ 0x0031406e, 0x40881002, 0xc500b100, 0x2c400b14, 0x02c40081, 0x002c4089,
+ 0x1002c400, 0xb1006c40, 0x0b1002c4, 0x4081102c, 0x400b1002, 0xc400b100,
+ 0x2c400b10, 0x02c400b1, 0x002e440a, 0x1002c211, 0x00000000, 0x00000000,
+ 0x38088100, 0xc8283600, 0x0b8003a8, 0x00f00032, 0x000e8003, 0xe0088800,
+ 0x22000f80, 0x03e800ea, 0x043e000c, 0x8003e000, 0xf8003e00, 0x0f8003e1,
+ 0x00c0403e, 0x000f8003, 0xe000f800, 0x3e000f80, 0x03e000f8, 0x003e100c,
+ 0x8003ee03, 0x50000000, 0x00000000, 0x9819f582, 0xfd003740, 0x0f5003f4,
+ 0x00b9403b, 0x410f9403, 0xfc00e940, 0x3b500f90, 0x02e4007d, 0x003f400f,
+ 0xd013bc00, 0xf9003e40, 0x0f9003e4, 0x80f9203e, 0x400f9003, 0xe400f900,
+ 0x3e400f90, 0x03e400f9, 0x023f480f, 0x9003e606, 0x70000000, 0x00000000,
+ 0x1805d403, 0xc9003f44, 0x4f900334, 0x01e91033, 0x4008d283, 0x2440fd00,
+ 0x36400f91, 0x033400fd, 0x001d400f, 0xd0072400, 0xfd003e40, 0x0f9003e4,
+ 0x00f90032, 0x400f9003, 0xe400f900, 0x3e400f90, 0x03e400f9, 0x003f400c,
+ 0x5003e600, 0x70000000, 0x00000000, 0x3810e002, 0x88212e08, 0x0b80a360,
+ 0x00801022, 0x00288002, 0x2080b840, 0x22000b80, 0x032000b8, 0x002e000b,
+ 0xa002a000, 0xb8002e00, 0x0b8002e0, 0x08b80022, 0x000b8002, 0xe000b800,
+ 0x2e000b80, 0x02e000b8, 0x002e0a28, 0x8002ce04, 0x30000000, 0x00000000,
+ 0x0805c400, 0x812c2c48, 0x0b12020c, 0x00a10120, 0x40081002, 0x0480b110,
+ 0x2c440b10, 0x024400b1, 0x802c404b, 0x90220400, 0xb1002c40, 0x0b1002c4,
+ 0x00b10020, 0x400b1002, 0xc400b100, 0x2c400b10, 0x02c400b1, 0x002e4009,
+ 0x1002c201, 0x70000000, 0x00000000, 0x1815a422, 0x89402e40, 0x0b120264,
+ 0x20a90026, 0x40089002, 0x2481b904, 0x2a400b10, 0x022c00bb, 0x002ec20b,
+ 0x9022a400, 0xb9002e40, 0x0b9002e4, 0x00b90022, 0x400b9002, 0xe400b900,
+ 0x2e400b90, 0x02e400b9, 0x002e4809, 0x9002c604, 0x60000000, 0x00000000,
+ 0xa0108640, 0x89003e40, 0x0f9c8305, 0x04a90430, 0x480c9009, 0x2400f900,
+ 0x3e724f90, 0x0b6400f9, 0x403e500f, 0x95022600, 0xf9003e40, 0x0f9002e4,
+ 0x00b900b2, 0x400f9003, 0xe400b900, 0x3e400b90, 0x03e400f9, 0x003e720d,
+ 0x9003e804, 0x70000000, 0x00000000, 0xa800a622, 0xf9021e40, 0x0f9003e7,
+ 0x00d900ba, 0x700f9023, 0xe600f908, 0x36440f90, 0x03e420f9, 0xa03e6407,
+ 0x9803e480, 0xf9003e40, 0x0f9013e4, 0x00f9003e, 0x400f9003, 0xe400f900,
+ 0x3e400f90, 0x03e400f9, 0x003e400e, 0x9003ea00, 0x60000000, 0x00000000,
+ 0x2810a100, 0xc8013e04, 0x0f840360, 0x20f80436, 0x000f0183, 0xe100c802,
+ 0x3e100f80, 0x032000f8, 0x0832104c, 0x8403e000, 0xf8003e00, 0x0f8003e0,
+ 0x00c8003e, 0x000f8003, 0xe000f800, 0x3e000f80, 0x03e000f8, 0x003e020c,
+ 0x80030a04, 0x20000000, 0x00000000, 0x28043900, 0xaa002fb0, 0x0ba00339,
+ 0x04ba0023, 0x800bec02, 0xe8008680, 0x22800ba0, 0x037800be, 0x80238408,
+ 0x2883a800, 0xba002e80, 0x0ba002e8, 0x028a002e, 0x800ba002, 0xe800ba00,
+ 0x2e800ba0, 0x02e800ba, 0x002db80a, 0xe00a0a00, 0x40000000, 0x00000000,
+ 0x28054d00, 0x830024c2, 0x0b30020c, 0x00bb0020, 0xdc0b3c02, 0xcc0093c0,
+ 0x28c00b30, 0x020e00b3, 0x9020d009, 0x3032cc08, 0xb3102cc0, 0x0b3002cc,
+ 0x088b002c, 0xc00b3002, 0xcc00b300, 0x2cc00b30, 0x02cc00b3, 0x002ce008,
+ 0x38220a00, 0x50000000, 0x00000000, 0x20011c00, 0xa7002d40, 0x09701a1c,
+ 0x00b73021, 0xc00b5002, 0xfe019508, 0x21c00b72, 0x025d00bf, 0x8023e029,
+ 0x70029c00, 0xb7002dc0, 0x0b7002de, 0x8087202d, 0xc00b7002, 0xdc00b700,
+ 0x2dc00b70, 0x02dc00b7, 0x002f002a, 0x78822800, 0x40000000, 0x00000000,
+ 0x20081600, 0xc7a83de0, 0x0ff8031e, 0x00f7b0a1, 0xe00f5803, 0xde42d180,
+ 0x29e00ffa, 0x031e00f7, 0x80b1e09d, 0x7843de00, 0xf7803de0, 0x0f7803ff,
+ 0x40c7803d, 0xe00f7803, 0xde00f780, 0x3de00f78, 0x03de00f7, 0x803d200c,
+ 0x780b2a02, 0x00000000, 0x00000000, 0x081da400, 0xff503ec0, 0x4fb203ac,
+ 0x00fb413a, 0x800f9003, 0xdc80e800, 0x3ac00ff5, 0x03e008b3, 0x007e411e,
+ 0xb003ac00, 0xfb0036c0, 0x8fb003ec, 0x00fb183e, 0xc00fb003, 0xec00fb00,
+ 0x3ec00fb0, 0x03ec00fb, 0x003d000f, 0xb003c206, 0x60000000, 0x00000000,
+ 0x4005fe00, 0xc780b3e0, 0x0ffc835e, 0x00ef8037, 0xe40fd803, 0x3e20ed80,
+ 0x37e00efc, 0x03be007f, 0x803fe40c, 0x73033e00, 0xbf903fe0, 0x0ff903fe,
+ 0x00ff803f, 0xe00ff803, 0xfe00ff80, 0x3fe00ff8, 0x03fe00ff, 0x803fa00d,
+ 0x78031000, 0x70000000, 0x00000000, 0xa8119d40, 0xd71035c0, 0x1bf21290,
+ 0x208710b1, 0x400b5003, 0x5c00d500, 0x3dc008f0, 0x021c00b5, 0x202dcc0d,
+ 0x7003dc00, 0xb5002dc0, 0x0b7042dc, 0x00b7002d, 0xc00b7002, 0xdc00b700,
+ 0x2dc00b70, 0x02dc00b7, 0x002f8028, 0x50022a04, 0x60000000, 0x00000000,
+ 0x80009400, 0x8f0821c0, 0x0b704a3c, 0x00a70021, 0xc2090002, 0x3c00b100,
+ 0x21c00b70, 0x02dc00b6, 0x002f8049, 0xf1421d20, 0xb7002dc0, 0x0b7042dc,
+ 0x00b7002d, 0xc00b7002, 0xdc00b700, 0x2dc00b70, 0x02dc00b7, 0x002d8009,
+ 0x70020400, 0x20000000, 0x00000000, 0x6014c780, 0x838024c0, 0x0b380203,
+ 0x28830020, 0x300b0012, 0x4f008000, 0x24e01930, 0x124000b0, 0x002c0009,
+ 0x3102cc00, 0xb1002cc0, 0x0b3002cc, 0x00b3002c, 0xc00b3002, 0xcc00b300,
+ 0x2cc00b30, 0x02cc00b3, 0x002ca408, 0x300a1804, 0x30000000, 0x00000000,
+ 0x28158602, 0x8f803280, 0x0bf5032c, 0x00ef0230, 0xe04d9023, 0x3ec0b900,
+ 0x32c20ff0, 0x03cc00fb, 0x983c0001, 0x30032e00, 0xf3003ec0, 0x0fb003fc,
+ 0x00ff003e, 0xc00fb002, 0xec00fb00, 0x3ec00fb0, 0x03ec00fb, 0x003ee00d,
+ 0xb0030a04, 0x60000000, 0x00000000, 0x80006440, 0xff003e10, 0x0fb103ec,
+ 0x00fb003a, 0xc84f8043, 0xfc00f900, 0x3ec00ef0, 0x13ac05fa, 0x003e400f,
+ 0x9003ec00, 0xfb007ec0, 0x0fb003ec, 0x00fb013e, 0xc00fb003, 0xec00fb00,
+ 0x3ec00fb0, 0x03ec00fb, 0x003e820f, 0xa403e000, 0x30000000, 0x00000000,
+ 0x0110e402, 0xc70033c0, 0x0cf00370, 0x00f30033, 0x700d5011, 0x3c01cd00,
+ 0x2ec08ff0, 0x023e00cd, 0x9233000e, 0xf8073c00, 0xfdc133c0, 0x0ff003fc,
+ 0x00ff0033, 0xc00ff003, 0xfc00ff00, 0x3fc00ff0, 0x03fc00ff, 0x003f000c,
+ 0xf003e004, 0x30000000, 0x00000000, 0x81046600, 0x8b0028d0, 0x0ab04220,
+ 0x00eb003e, 0x18088802, 0xac05d8e2, 0x26c00bb0, 0x03a208a0, 0x8036600d,
+ 0xb002ac00, 0xb9002ac0, 0x0bb002ec, 0x00bb0036, 0xc00bb002, 0xec00bb00,
+ 0x2ec10bb0, 0x02ec08bb, 0x000c2008, 0xb082e040, 0x10000000, 0x00000000,
+ 0x80002200, 0x8b012ac2, 0x8830022c, 0xa0bb0062, 0x800998a2, 0x8c008880,
+ 0x2ec00b30, 0x02e0808b, 0x002a2008, 0xb1026c00, 0xbb0022c0, 0x0bb002ec,
+ 0x00b30022, 0xc00bb002, 0xec00bb00, 0x2ec00bb0, 0x02ec00bb, 0x002ea008,
+ 0xb002e000, 0x40000000, 0x00000000, 0x08002000, 0x83002ac0, 0x1a304280,
+ 0x10230068, 0x00080002, 0x8c008000, 0x2cc00b30, 0x028000a0, 0x002e400b,
+ 0x3002cc00, 0x310028c0, 0x0b3002cc, 0x00b30024, 0xc00b3002, 0xcc00b300,
+ 0x2cc00b30, 0x02cc00b3, 0x002e8008, 0x0002c201, 0x00000000, 0x00000000,
+ 0x00086000, 0xcf023ac1, 0x08f00320, 0x00ff0022, 0x000d8002, 0xbc028801,
+ 0x3ec00ff0, 0x03a000c8, 0x043a001e, 0xb0226c00, 0xf90032c0, 0x0fb003fc,
+ 0x00ff0032, 0xc00fb003, 0xec00fb00, 0x3ec00fb0, 0x03ec00fb, 0x013e802c,
+ 0xb003e003, 0x50000000, 0x00000000, 0xa019f000, 0x3f003fc0, 0x0ff00b30,
+ 0x00ff003f, 0x004fc003, 0xdc08fc01, 0x37c08ff0, 0x03b000fc, 0x0035000d,
+ 0xf003bc00, 0xfd003fc0, 0x0ff013fc, 0x00ff003f, 0xc00ff003, 0xfc00ff00,
+ 0x3fc00ff0, 0x03fc00ff, 0x003f800f, 0xf003e806, 0x70000000, 0x00000000,
+ 0xc015fc00, 0xdf803d30, 0x0ef00352, 0x40ff1037, 0xca0df113, 0x32009480,
+ 0x37200f48, 0x03f200df, 0x343b800f, 0xf043fc80, 0xfd843731, 0x4cf2035c,
+ 0xa0cf803f, 0xe00ff803, 0xfe00ef80, 0x3fcc0ff2, 0x03fe00ff, 0x9033c00c,
+ 0xf803f080, 0x70000000, 0x00000000, 0x8090bf00, 0x8b802e00, 0x08fd0220,
+ 0x84b75023, 0xf04bf34a, 0x22108908, 0x2a210b88, 0x03a2088f, 0x6026b40e,
+ 0xf7823f04, 0xbb803c08, 0x0af3822b, 0x00ab802e, 0xe00eb802, 0xee00bb80,
+ 0x2ed48bb6, 0x82ec20b8, 0x0022f008, 0xb802e006, 0x30000000, 0x00000000,
+ 0x0a048c40, 0x83002e08, 0x0a3002c0, 0x00a30424, 0xc00a3202, 0xa000b820,
+ 0x28200a00, 0x02e00193, 0x302c8002, 0x30028c40, 0xb3022400, 0x8830024c,
+ 0x0083006c, 0xc00b3002, 0xcc00a300, 0x2cc88b34, 0x02cc80ab, 0x0020d00a,
+ 0x3002c200, 0x00000000, 0x00000000, 0xc000ac00, 0x8b002ec2, 0x08b022a4,
+ 0x00bb0022, 0xc00bb022, 0xa180a980, 0x2a408ba1, 0x02e200a3, 0x0066800a,
+ 0xb0022c00, 0xbb802ec3, 0x8ab00629, 0x00ab006e, 0xc00ab002, 0xec00bb00,
+ 0x2ec01bb0, 0x22ec00bb, 0x4022c00a, 0xb002f000, 0x60000000, 0x00000000,
+ 0x4101ec00, 0xcb006e00, 0x0eb013e0, 0x08eb0036, 0xc00cb023, 0x8304f9c8,
+ 0xbe001f8c, 0x03c320db, 0x003a948e, 0xb001ac00, 0xf9813601, 0x0cb0236f,
+ 0x00cb003e, 0xc00fb003, 0xec00eb00, 0x3ec00fb0, 0x03ec04f3, 0x40b2040e,
+ 0xb003d044, 0x70000000, 0x00000000, 0xa001bc00, 0xff013fc4, 0x4f70017e,
+ 0x40ff003f, 0xc00fb003, 0x7601df00, 0x3fe84dd0, 0x03b020df, 0x003be08e,
+ 0xb0117c00, 0xfe003f10, 0x077003fe, 0x60ff003f, 0xc00ef003, 0xfc00ff00,
+ 0x3fc00ff0, 0x03fc00ff, 0xa03de12d, 0xf043e800, 0x60000000, 0x00000000,
+ 0xc0008c40, 0xdb003e00, 0x0df013a8, 0x10df0133, 0xc18e7003, 0x2480eb40,
+ 0x32a80fb7, 0x072300ff, 0x003af20f, 0xb003ac40, 0xeb0032c0, 0x0cf103ef,
+ 0x00cb103e, 0xc00fb003, 0xec00fb00, 0x3ec00fb0, 0x03ec02cb, 0x003a680f,
+ 0xb803f004, 0x20000000, 0x00000000, 0xc8153c00, 0x8b003cc0, 0x48f1016c,
+ 0x10cf0423, 0xc029f003, 0x66049300, 0x36f00bbc, 0x436000df, 0x002e704d,
+ 0xf0077f44, 0xd26236c0, 0x0ffc02cc, 0x00abd072, 0xc00bb002, 0xec00bb00,
+ 0x2fc00bf0, 0x02ec008b, 0x0822d003, 0xb002f200, 0x40000000, 0x00000000,
+ 0xc4004c00, 0x83042c01, 0x09300200, 0x00bb0020, 0xc0093022, 0x0000b100,
+ 0x20100b04, 0x02010183, 0x00288088, 0xb0020e08, 0x13002200, 0x0a388288,
+ 0x0083c028, 0xc00b3002, 0xcc00b300, 0x2cc00b30, 0x02cc0083, 0x8028c10b,
+ 0x3042f000, 0x10000000, 0x00000000, 0x60105e00, 0x87806f20, 0x0879027a,
+ 0x40878428, 0xe0097902, 0x5e209f80, 0x2da40bf8, 0x02d21097, 0x802de009,
+ 0x7802de41, 0xbfd025e4, 0x097800da, 0x00a78061, 0xe00b7802, 0xde00b780,
+ 0x2de00b78, 0x02de008f, 0x8021e00b, 0x7c02d804, 0x10000000, 0x00000000,
+ 0x6c084c00, 0xc3002cc0, 0x0d30428c, 0x00f30020, 0xc4083003, 0x0c00a300,
+ 0x20c00b14, 0x020080a3, 0x2038c40c, 0x30020c00, 0xf3013000, 0x1e30038c,
+ 0x90c30038, 0xc00f3003, 0xcc00f300, 0x3cc40f31, 0x03ec00c3, 0x0038c00f,
+ 0x3003d202, 0x10000000, 0x00000000, 0x40059c20, 0xef007bc0, 0x0f7003fc,
+ 0x00ff0037, 0xc006f023, 0xdc00ef00, 0x37c00ff0, 0x035009ff, 0x003dc00f,
+ 0xf1035c30, 0xd7003fc0, 0x8ff00378, 0x00f7003b, 0xc00ff003, 0xfc00ff00,
+ 0x3fc00ff0, 0x03fc00f7, 0x003fc007, 0xf003d004, 0x60000000, 0x00000000,
+ 0x0815ac02, 0xcb003ec0, 0x0ffa0366, 0x00cf2033, 0xd10ef003, 0x2000e102,
+ 0x32600ca0, 0x03e000ff, 0x493b800f, 0xb0032c00, 0xcb0032c0, 0x0df4833a,
+ 0x00cb003e, 0xc00fb003, 0xec00fb00, 0x3ec40fb1, 0x03ec00fb, 0x00b3400f,
+ 0xb003c204, 0x20000000, 0x00000000, 0xe0109cd0, 0x87012dc0, 0x0b35023c,
+ 0x00d71035, 0xc20bf513, 0x5c00b700, 0x29c02870, 0x039000b7, 0x4431600b,
+ 0xf5120cc0, 0xa60037c0, 0x0df20352, 0x00a70039, 0xc00b7002, 0xdc00b700,
+ 0x2dc80b72, 0x02dc00bf, 0x00b5404b, 0x7002f104, 0x20000000, 0x00000000,
+ 0x20008e01, 0x87802df0, 0x0b7a025e, 0x00839125, 0xec1b7a02, 0x1e04bf80,
+ 0x23e04978, 0x429200b3, 0xa429ec1a, 0x78021e80, 0x978025e0, 0x08794206,
+ 0xc087802d, 0xe00b7802, 0xde00b780, 0x2de00b78, 0x02de00b7, 0x8021600b,
+ 0x7802c800, 0x20000000, 0x00000000, 0x4804cc02, 0x83002cf0, 0x8b30020d,
+ 0x909b0024, 0xc00bb022, 0x4c00b344, 0x28e00831, 0x228d00bb, 0x0020e20b,
+ 0x30020c04, 0xb26024e8, 0x0930024c, 0x00a30028, 0xc00b3002, 0xcc00b300,
+ 0x2cc00b30, 0x02cc00b3, 0x80a4c00b, 0x3002db00, 0x20000000, 0x00000000,
+ 0xe8056800, 0xca022f80, 0x0fa0037a, 0x088a0036, 0x800fa003, 0x3840f660,
+ 0x23a80d6d, 0x03b820fa, 0x003ba00f, 0xa04b2800, 0xde0037b8, 0x0ca00339,
+ 0x00ca003e, 0x800fa003, 0xe800fa00, 0x3e800fa0, 0x03e800fe, 0x5033800f,
+ 0xa023fb00, 0x70000000, 0x00000000, 0x48018000, 0xf8003e08, 0x0f8003e0,
+ 0x40f8003e, 0x008f8003, 0xe000f80e, 0x3e190e84, 0x02a02838, 0x003a040f,
+ 0x0013e002, 0xe8403e00, 0x0f8407e1, 0x20f8403e, 0x000f8003, 0xe000f800,
+ 0x3e000f80, 0x03e000f8, 0x103e300f, 0x8003d210, 0x60000000, 0x00000000,
+ 0x0800a480, 0xc9003e40, 0x0f9a0364, 0x00f90032, 0x400f9003, 0x6440f900,
+ 0x36400f90, 0x032650f9, 0x043e480f, 0x90034600, 0x89003240, 0x1c180324,
+ 0x80f9003e, 0x400f9003, 0xe400f900, 0x3e400f90, 0x03e400f9, 0x00b2640f,
+ 0x9003c300, 0x20000000, 0x00000000, 0x80046400, 0x89002e40, 0x0b9416e4,
+ 0x00b9003a, 0x4009900e, 0x2408b900, 0x36500e92, 0x02250039, 0x00334003,
+ 0x9002a502, 0x01202240, 0x0a9902b6, 0x00e9482e, 0x400b9002, 0xe400b900,
+ 0x2e400b90, 0x02e400b9, 0x42a2680b, 0x9012e000, 0x10000000, 0x00000000,
+ 0x38152402, 0x89002e40, 0x1b9412ec, 0x00b90022, 0x400b9042, 0x2400b900,
+ 0xa2404b90, 0x022500b9, 0x0426c00b, 0x90026480, 0xa900a041, 0x98900224,
+ 0x20b9002e, 0x400b9002, 0xe400b900, 0x2e400b90, 0x02e400b1, 0x08a2c04b,
+ 0x9002ce04, 0x40000000, 0x00000000, 0x28140400, 0x81002c50, 0x1b1042c5,
+ 0x00314028, 0x40091402, 0x0400b940, 0x24408b90, 0x220408b1, 0x4020c00b,
+ 0x14028401, 0xa1002050, 0x8b3102c4, 0x00a1006c, 0x401b1002, 0xc400b100,
+ 0x2c440b11, 0x02c440b1, 0x1020410b, 0x1842ca05, 0x00000000, 0x00000000,
+ 0x380d60a0, 0xc8003e00, 0x0f8002e0, 0x01b80032, 0x000f8002, 0x2000f801,
+ 0x32800f80, 0x032000f8, 0x023e0a0b, 0x80036800, 0xe8013200, 0x0c840320,
+ 0xa0f8003e, 0x000f8003, 0xe000f800, 0x3e1a0f86, 0x83e100f8, 0x40320b0f,
+ 0x8003ce03, 0x50000000, 0x00000000, 0x9811e400, 0xf9003f40, 0x0f9403f4,
+ 0x00f9403a, 0x50059403, 0xb400fd00, 0x3d400ed0, 0x0bfc00f9, 0x401b404f,
+ 0x94436500, 0xd50037c0, 0x0e9603b4, 0x00f9003e, 0x400f9003, 0xe400f900,
+ 0x3e480f92, 0x03e480fd, 0x20bf400f, 0x9003e610, 0x70000000, 0x00000000,
+ 0x1805f400, 0xc9003e44, 0x2cd003a4, 0x08c91032, 0x480f9283, 0x3400f904,
+ 0x3b400f50, 0x03f400f9, 0x2933400e, 0x9003f400, 0xc5003a40, 0x0fd2833c,
+ 0x00cd003e, 0x400f9003, 0xe400f900, 0x3e400f90, 0x032400fd, 0x0033c02c,
+ 0xd0030601, 0x60000000, 0x00000000, 0x3818a000, 0xc8002e88, 0x088402e8,
+ 0x21881022, 0x008b8202, 0x2000b008, 0x2a000b80, 0x02e000b8, 0x2036810b,
+ 0x8482e000, 0x8800320a, 0x8b800220, 0x00d8002e, 0x00098002, 0xe000b800,
+ 0x2e000b80, 0x0a2000b2, 0x00220008, 0x80420e06, 0x30000000, 0x00000000,
+ 0x48048c00, 0x91002848, 0x081102c4, 0x00810060, 0x450b1282, 0x0400b120,
+ 0x68400b10, 0x06c400a1, 0x2824404b, 0x1312c446, 0x8100a848, 0x1b100224,
+ 0x0081002c, 0x400b1002, 0xc400b100, 0x2c400b10, 0x020400b1, 0x00284108,
+ 0x10221201, 0x20000000, 0x00000000, 0x9804a400, 0x89002c40, 0x489042e4,
+ 0x808900a2, 0x400b1002, 0x2420b980, 0x2a580b90, 0x86e480b1, 0x0026400b,
+ 0x9022e400, 0x89002240, 0x0b10422c, 0x0099002e, 0x40099002, 0xe400b900,
+ 0x2e400b90, 0x022400b9, 0x00aa5008, 0x90422600, 0x20000000, 0x00000000,
+ 0xa011e408, 0xd9003e50, 0x089003e5, 0x00890032, 0x400f900b, 0x2600f900,
+ 0x3a704b90, 0x17e400f9, 0x00b2700f, 0x9023c400, 0xc1017a60, 0x0fd00b24,
+ 0xc049003e, 0x400f9003, 0xe400f900, 0x3e400f90, 0x032400f9, 0x003a700c,
+ 0x100b2804, 0x70000000, 0x00000000, 0xc8018402, 0xf9003e64, 0x0f9043e4,
+ 0x02f9003e, 0x408f9003, 0xe490f900, 0x3e400f91, 0x03e414f9, 0x007a640f,
+ 0x9043e400, 0xf9903a49, 0x0b9003e4, 0x00f9003e, 0x400f9003, 0xe400f900,
+ 0x3e404f10, 0x03e400f9, 0xc036440f, 0x9003f210, 0x60000000, 0x00000000,
+ 0x0810a000, 0xf8003a10, 0x2c8097e1, 0x00c00036, 0x000e8003, 0x60103800,
+ 0x32110f84, 0x03a140f8, 0x011e1808, 0x8003e000, 0xf820b210, 0x0f8003a1,
+ 0x20c8003e, 0x000f8003, 0xe000f800, 0x3e001c80, 0x03e000f8, 0x4032100c,
+ 0x8083c204, 0x20000000, 0x00000000, 0x28052800, 0xba002e80, 0x09ee03a8,
+ 0x008a0022, 0x8008a002, 0xb844ba01, 0x2b808be5, 0x823b00ba, 0x002f990a,
+ 0xa003ba00, 0xbe002280, 0x0be4829a, 0x00dea02e, 0x800ba002, 0xe800ba00,
+ 0x2e8028a0, 0x02e800be, 0x9881894d, 0xe402ca00, 0x40000000, 0x00000000,
+ 0x28044c00, 0xb30028c0, 0x081c02ac, 0x02830064, 0xc00a3002, 0x0d403b00,
+ 0x24c20b1c, 0x428e3023, 0x002cd008, 0x30028c80, 0xb30020c0, 0x0b3a228e,
+ 0x00a3892c, 0xc0033002, 0xcc00b300, 0x2cc00830, 0x06cc00bb, 0x4020c048,
+ 0x3842ca00, 0x10000000, 0x00000000, 0x80105401, 0xb7002dc8, 0x095002bc,
+ 0x80832024, 0xe0083102, 0x90009724, 0x2d400b78, 0x225c00b7, 0x102c600a,
+ 0x72069c20, 0xb70121c4, 0x0b404288, 0x20b7002d, 0xc00b7002, 0xdc00b700,
+ 0x2ce80872, 0x12dc84b5, 0x00a30009, 0x7082e004, 0x10000000, 0x00000000,
+ 0x88085600, 0xf7823bf0, 0x0c68039f, 0x20c7e435, 0xe04e7a93, 0x5600f780,
+ 0x25e00f58, 0x039e10e7, 0xb03d6008, 0x78839e00, 0xf78031ec, 0x0f28539e,
+ 0x00e7803d, 0xe00f7803, 0xde00b780, 0x3df8087e, 0x03df80f6, 0x8031a10c,
+ 0x7803e202, 0x10000000, 0x00000000, 0x0815a400, 0xfb043fd8, 0x0ea0139c,
+ 0x80ff403a, 0xc007f023, 0xe008ff00, 0x3a008fb0, 0x33ac00ff, 0x003e000f,
+ 0xf303a400, 0xfa00bfc0, 0x0ff80164, 0x00db003e, 0xc00fb003, 0xec00fb00,
+ 0x3ec00fb0, 0x23ec08f8, 0x00bc008f, 0xb003c200, 0x60000000, 0x00000000,
+ 0x0004b600, 0xcf803ff1, 0x2cf8033e, 0x80cfc437, 0xe00ef803, 0x3240bff8,
+ 0x37e08ff8, 0x03fe40bf, 0x903b600f, 0xf1037e00, 0xf78033e0, 0x0cf88312,
+ 0x40cf8013, 0xe00ff803, 0xfe00ff80, 0x3fe04cf8, 0x10fe40fe, 0x90b3e0c8,
+ 0xf943c000, 0x60000000, 0x00000000, 0xa8189c00, 0x87003dc0, 0x0864021c,
+ 0x80871035, 0xc00d7001, 0x5000b710, 0x31400b52, 0x02d040b7, 0x04714a0d,
+ 0x70015814, 0xb70035c1, 0x08740350, 0xd0a50429, 0xc00b7002, 0xdc00b700,
+ 0x3fc00a70, 0x025c00b6, 0x38a10608, 0x7002ea06, 0x20000000, 0x00000000,
+ 0x00009440, 0x87002dc0, 0x08700a1d, 0xca930021, 0xc0083002, 0x5000b728,
+ 0xa1c00b60, 0x06dd40b3, 0x05294008, 0x71061c00, 0xbf0023c0, 0x08710230,
+ 0x01860021, 0xc00b7002, 0xdc00b700, 0x2dc00870, 0x02dc0cb6, 0x00210028,
+ 0x7002c000, 0x20000000, 0x00000000, 0x20048401, 0x830028d2, 0x0820020c,
+ 0x00930024, 0xc0093002, 0x4300b300, 0x20180b0c, 0x06c040b3, 0x00283009,
+ 0x30020000, 0xb34024e0, 0x08304241, 0x40800028, 0xc00b3002, 0xcc00b300,
+ 0x2cc008b0, 0x024c00b2, 0x48201008, 0x3002c800, 0x30000000, 0x00000000,
+ 0xa815e400, 0xcb002fc0, 0x0c80033c, 0x201f0002, 0xc00cf003, 0x4480f790,
+ 0x30680f17, 0x03ef00bf, 0x003a600c, 0xf0162400, 0xfbc031d8, 0x04900606,
+ 0x42cb0032, 0xc00fb003, 0xec00fb00, 0x3fc00cf0, 0x03fc00fb, 0xc032c40c,
+ 0x1023ea04, 0x70000000, 0x00000000, 0x80018400, 0xfb003fc5, 0x0f0403fc,
+ 0x00ef023c, 0xc10ff027, 0xe000ff01, 0x3e508fa4, 0x03ec00b7, 0x0432500f,
+ 0xb007e500, 0xf9103fc2, 0x0f7043e1, 0x00fa003e, 0xc00fb003, 0xec00fb00,
+ 0x3ac08fb0, 0x036c00fb, 0x003e000d, 0xb003e000, 0x40000000, 0x00000000,
+ 0x2110ac00, 0xcf053bc0, 0x0fa0073c, 0x10cf0472, 0xc00cf003, 0x3420cf00,
+ 0x37404cd0, 0x233100ff, 0x0132428f, 0xb0033284, 0xff0933c1, 0x0cfc0374,
+ 0x00cf0037, 0xc00ff003, 0xfc00ff00, 0x3fc00ff0, 0x033c00fe, 0x90b0002c,
+ 0xd0030844, 0x20000000, 0x00000000, 0xa1046402, 0x8b002ec0, 0x0ba8062c,
+ 0x00ab002a, 0xc01ab006, 0xa200ab00, 0x322088a4, 0x83e381eb, 0x003a280b,
+ 0xb002e190, 0xb1803ec0, 0x0db00227, 0x028a002e, 0xc00bb002, 0xec01bb00,
+ 0x2ec00bb0, 0x422c00ba, 0x82a2200c, 0xb4022840, 0x10000000, 0x00000000,
+ 0x80052600, 0x9b002ec0, 0x0a98224c, 0x00830062, 0xc0183042, 0x22048b00,
+ 0x2a3008b0, 0x122c00bb, 0x0122200b, 0x30022c00, 0xbbc00ac0, 0x08b00266,
+ 0x008b082e, 0xc00bb002, 0xec08bb00, 0x2ec00bb0, 0x026c00b2, 0x0022e008,
+ 0xbc022000, 0x40000000, 0x00000000, 0x08140400, 0x93002cc0, 0x0b00024c,
+ 0x01a30068, 0xc00a3002, 0xa000ab00, 0xa8000800, 0x02c00033, 0x042000c9,
+ 0x30028804, 0xb9022ec0, 0x09300200, 0x0280002c, 0xc00b3002, 0xcc00b300,
+ 0x2cc00b30, 0x0a4c00b2, 0x00200108, 0x30120205, 0x00000000, 0x00000000,
+ 0x000d6400, 0xdb0039c0, 0x0e900a5c, 0x01cf0022, 0xc008f002, 0x2000c700,
+ 0x3a000ca0, 0x0220043f, 0x00b2000f, 0xf0032800, 0xfb003bc0, 0x4c302364,
+ 0x004a0036, 0xc00fb003, 0xec00bb00, 0x3ec00fb0, 0x036c00f2, 0x0032004c,
+ 0xb0430003, 0x50000000, 0x00000000, 0xa015fc00, 0xef003fc0, 0x0fc003bc,
+ 0x00ff003f, 0xc00ff023, 0xf000ff00, 0x33000bc0, 0x03b000ef, 0x003b000f,
+ 0xf003f000, 0xfd002dc0, 0x0ff007f4, 0x00f4003f, 0xc00ff003, 0xfc103f00,
+ 0x3fc00ff0, 0x42bc00fe, 0x043f010e, 0xe003e804, 0x70000000, 0x00000000,
+ 0xc005fe00, 0xff8009c0, 0x0ef2c3f2, 0x00fd803d, 0x200dc803, 0xfca8ff80,
+ 0x3f608cf8, 0x03fe04ff, 0x001d200c, 0xf803fe08, 0xff803fe0, 0x0ff803fe,
+ 0x00ff903b, 0xe00ff803, 0xfe00ff80, 0x3fe00f78, 0x037e04ff, 0x813fe08f,
+ 0xf803f000, 0x70000000, 0x00000000, 0x8010ee00, 0xbb802ef4, 0x08fc02e2,
+ 0x00e9802e, 0x20088802, 0xdd208b80, 0x2e600bb8, 0x02ee04bb, 0xc02e200a,
+ 0xb802ee00, 0xbb802ee0, 0x0bb803ee, 0x00bb0036, 0xe009b802, 0xee00bb80,
+ 0x2ee08fb8, 0x022e00bb, 0x802ee00b, 0xb802e004, 0x30000000, 0x00000000,
+ 0x08058c00, 0xa3012cc0, 0x0a300680, 0x01b1006e, 0x000b0002, 0xcc808302,
+ 0x2c400a30, 0x028c00b3, 0x402c000a, 0x3006cc00, 0xb3002cc0, 0x0b3002cc,
+ 0x00b32020, 0xc00b3002, 0xcc00b300, 0x2cc00b30, 0x024c00b3, 0x002cc00a,
+ 0x3002c201, 0x70000000, 0x00000000, 0xc014ac08, 0xbb002ec4, 0x08b002e2,
+ 0x00bb802e, 0x204a8202, 0xec02ab00, 0x2e480bb0, 0x00ec08bb, 0x002ec84a,
+ 0xb002ec00, 0xbb002ec0, 0x0bb002ac, 0x00bb0026, 0xc00bb002, 0xec00bb00,
+ 0x2ec08ab0, 0x022c00bb, 0x002ec00b, 0xb002f004, 0x60000000, 0x00000000,
+ 0x4015ec00, 0xfb0038e8, 0x0eb003a3, 0x20f9c03c, 0x200f8207, 0xec00fb00,
+ 0x3ec00cb0, 0x23ac00fb, 0x000e280e, 0xb003ec00, 0xfb003ec0, 0x0fb002ec,
+ 0x00bb0032, 0xc00fb003, 0xec00fb00, 0x3ec00bb0, 0x176c04fb, 0x043ec00e,
+ 0xb003d004, 0x70000000, 0x00000000, 0xe0013c14, 0xff003fe0, 0x8ff003f4,
+ 0x00ed003f, 0x000df007, 0xfc04df00, 0x3fe00ff0, 0x22fc00ff, 0x003f620f,
+ 0xf0437c00, 0xff003fc0, 0x0ff003fc, 0x00ff0037, 0xc00df003, 0xfc00ff00,
+ 0x3fc00ff0, 0xa3fc00ff, 0x003fc00f, 0xf003f800, 0x60000000, 0x00000000,
+ 0xc010ac00, 0xfb043bc0, 0x0ef003e4, 0x80fb003a, 0x020db023, 0xcc00fb00,
+ 0x3ec00eb0, 0x03ec00fb, 0x0c3a800c, 0xb2432c00, 0xfb003ec0, 0x0fb003ec,
+ 0x00fb0036, 0xc00fb003, 0xec00fb00, 0x3ec00fb0, 0x03ec00fb, 0x003ec00f,
+ 0xb003f004, 0x20000000, 0x00000000, 0xc8052c04, 0xbb003e00, 0x08f08624,
+ 0x00bbd022, 0x080db012, 0xfc00ab00, 0x3af00bb0, 0x02ec10bf, 0xc020f00d,
+ 0xba036c00, 0xbb002ec0, 0x0bb002ec, 0x04bb8022, 0xc00bb002, 0xec00bb00,
+ 0x2ec00b3c, 0x022c00bb, 0x002ec00b, 0xb002f200, 0x40000000, 0x00000000,
+ 0xe0014c00, 0xb30068c0, 0x0a300280, 0x01b0c00c, 0x20000002, 0x4c008301,
+ 0x24ec0b30, 0x024e4093, 0x90282001, 0x3c004c00, 0xb3002cc0, 0x0b3002cc,
+ 0x04bb8024, 0xc00b3002, 0xcc00b300, 0x2cc00b30, 0x028c00b3, 0x002cc01b,
+ 0x3002f800, 0x50000000, 0x00000000, 0x60011e00, 0xb7842de0, 0x087c0216,
+ 0x00b6982d, 0x20097802, 0xde02a780, 0x29e00b78, 0x02de00b7, 0x806ba209,
+ 0x78025e00, 0xb7802de0, 0x0b7802de, 0x00b78821, 0xe00b7802, 0xde00b780,
+ 0x2de00b78, 0x821e00b7, 0x802de01b, 0x7802d800, 0x40000000, 0x00000000,
+ 0x48080c40, 0xb30038c0, 0x0e300284, 0x4071403c, 0x010c3003, 0xcc00a310,
+ 0x2cc00f30, 0x034c40d3, 0x0038400d, 0x30034c00, 0xf3003cc0, 0x0f3017cc,
+ 0x08fb0034, 0xc00f3003, 0xcc00f300, 0x3cc40f30, 0x03cc00f3, 0x003cc40f,
+ 0x3003d202, 0x00000000, 0x00000000, 0x401dbc04, 0xff003b00, 0x0f7083b4,
+ 0x50f70133, 0x441ff003, 0xfc0ccf00, 0x3bc00ff0, 0x03fc00f7, 0x0037c00f,
+ 0x7003fc00, 0xff003fc0, 0x0ff001fc, 0x00ff003f, 0xc00ff003, 0xfc00ff00,
+ 0x3fc10ff0, 0x03fc00ff, 0x003fc00f, 0xf003d006, 0x60000000, 0x00000000,
+ 0xa805ec00, 0xfb007dc0, 0x0ef203e0, 0x00f3003a, 0x000f8803, 0x6d20fb00,
+ 0x38600eb0, 0x07ec00fb, 0x103ec00f, 0xb003ec00, 0xfb003ec0, 0x0fb003ec,
+ 0x00fb003e, 0xc00fb003, 0xec00fb00, 0x3ec00fb0, 0x03ec00fb, 0x003ec00f,
+ 0xb003ea00, 0x70000000, 0x00000000, 0xc8019c00, 0xb7002de0, 0x487282d4,
+ 0x00b700b5, 0x400b7002, 0x1c00b700, 0x2d400870, 0x02dc10b7, 0x002dc00b,
+ 0x7002dc00, 0xb7002dc0, 0x0b7022dc, 0x00b7002d, 0xc00b7002, 0xdc00b700,
+ 0x2dc00b70, 0x02dc00b7, 0x002dc00b, 0x7002f204, 0x60000000, 0x00000000,
+ 0xc0009e00, 0xb7812dec, 0x0b7a06d6, 0x00bfc029, 0x201bf886, 0x5e40b784,
+ 0x6d600a78, 0x02de04b7, 0xa42de00b, 0x78029e00, 0xb7802de0, 0x0b7802de,
+ 0x00b7802d, 0xe00b7802, 0xde00b780, 0x2de00b78, 0x02de00b7, 0x802de00b,
+ 0x7802f000, 0x20000000, 0x00000000, 0x4814cc00, 0xb3006cf0, 0x093002cf,
+ 0x00b34464, 0xc00b3802, 0x0c00b300, 0x2c400830, 0x02cc10b3, 0x002cd40b,
+ 0x3042cc00, 0xb3002cc0, 0x0b3002cc, 0x00b3002c, 0xc00b3002, 0xcc00b300,
+ 0x2cc00b30, 0x02cc00b3, 0x002cc00b, 0x3002d204, 0x30000000, 0x00000000,
+ 0xe815a810, 0xfa003fa0, 0x0fa003f8, 0x00f6543b, 0x960fe903, 0x6810fa00,
+ 0x3e800ea0, 0x33e804fa, 0x003f800f, 0xa047e800, 0xfa003e80, 0x0fa003e8,
+ 0x00fa003e, 0x800fa003, 0xe800fa00, 0x3e800fa0, 0x03e800fa, 0x003e800f,
+ 0xa003fa04, 0x60000000, 0x00000000, 0x4840e000, 0xf8023c0c, 0x0e8400e0,
+ 0xc8f8413e, 0x000f8003, 0xc004f804, 0x3e100f80, 0x43e000f8, 0x043e100f,
+ 0x8003e000, 0xf8003e00, 0x0f8003e0, 0x00f8003e, 0x000f8003, 0xe000f800,
+ 0x3e000f84, 0x03e000f8, 0x003e000f, 0x8003d200, 0x20000000, 0x00000000,
+ 0x0810e400, 0xf9003e60, 0x0c190366, 0x10e90032, 0x400e9003, 0xe400a900,
+ 0x3e400f90, 0x03e600f9, 0x803e420f, 0x9003e400, 0xf9003e40, 0x0f9003e4,
+ 0x00f9003e, 0x400f9003, 0xe400f900, 0x3e400f98, 0x03e400f9, 0x003e400f,
+ 0x9003c204, 0x30000000, 0x00000000, 0x80046408, 0xb9002f60, 0x0a901204,
+ 0x40894034, 0x40089002, 0xe4008900, 0x2e600b90, 0x03a440b9, 0xc02e400b,
+ 0x9802e400, 0xb9002e40, 0x0b9002e4, 0x00b9002e, 0x400b9002, 0xe400b900,
+ 0x2e400b9c, 0x02e400b9, 0x002e400b, 0x9002e001, 0x00000000, 0x00000000,
+ 0x18052400, 0xb9002e46, 0x18900264, 0x00a9282a, 0xc00a9002, 0xe400a900,
+ 0x2a440b90, 0x02e400b9, 0x102e400b, 0x9202e404, 0xb9002e40, 0x0b9002e4,
+ 0x00b9002e, 0x400b9002, 0xe400b900, 0x2e400b96, 0x02e400b9, 0x002e400b,
+ 0x9002c600, 0x40000000, 0x00000000, 0x08040400, 0xb1002c41, 0x1a100224,
+ 0x088902a8, 0x40181002, 0xc500a100, 0x2cc00b10, 0x028400b3, 0x012cc00b,
+ 0x1002c400, 0xb1002c40, 0x0b1002c4, 0x00b1402c, 0x400b1002, 0xc400b100,
+ 0x2c400b10, 0x02c400b1, 0x002c400b, 0x1006c201, 0x00000000, 0x00000000,
+ 0x38056010, 0xf8043e0a, 0x0ca00360, 0x04e800aa, 0x000e8003, 0xe008e800,
+ 0x3a000f80, 0x01e000f8, 0x003e000f, 0x8003e000, 0x78003e00, 0x0f8003e0,
+ 0x00f8003e, 0x000f8003, 0xe000f800, 0x3e000f80, 0x03e000b8, 0x003e000f,
+ 0x8003ce03, 0x50000000, 0x00000000, 0x9859e400, 0xf9003f40, 0x0f9403f4,
+ 0x00fd0137, 0xc10f5003, 0xe500d900, 0x3f400f90, 0x43a400f9, 0x403f400f,
+ 0x9003e400, 0xf9003e40, 0x0f9003e4, 0x00f9003e, 0x400f9003, 0xe400f900,
+ 0x3e400f90, 0x03e400f9, 0x003e400f, 0x9003e606, 0x70000000, 0x00000000,
+ 0x1805e400, 0xf9003740, 0x0cd20b34, 0x00cd0037, 0x400f9003, 0xe4a0c900,
+ 0x7dc00d90, 0x038400fd, 0x21794009, 0xd003e400, 0xf9003e40, 0x0f9003e4,
+ 0x00fd003e, 0x400f9003, 0xe400f900, 0x3e400fd0, 0x03e400f9, 0x003e400f,
+ 0x9003c600, 0x70000000, 0x00000000, 0x3810e008, 0xb8042e00, 0x05810220,
+ 0x00880236, 0x000b8002, 0xc080a800, 0x2e000880, 0x03a000b8, 0x04260148,
+ 0x8002e000, 0xb8002e00, 0x0b8002e0, 0x00b8002e, 0x000b8002, 0xe000b800,
+ 0x2e000b80, 0x02e000b8, 0x002e000b, 0x8002ce04, 0x30000000, 0x00000000,
+ 0x0805c400, 0xa1012cc0, 0x08101244, 0x03890020, 0x400b1802, 0xc4a08101,
+ 0x2c401910, 0x028400b1, 0x102a4109, 0x1012c400, 0xb1002c40, 0x0b1002c4,
+ 0x00b1002c, 0x400b1002, 0xc400b100, 0x2c400b10, 0x02c400b1, 0x002c400b,
+ 0x1002c201, 0x70000000, 0x00000000, 0x1811a400, 0xb9002e51, 0x1990262e,
+ 0x00891826, 0x440b9002, 0xe400a904, 0x2e400890, 0x02a400b9, 0x00264809,
+ 0x9042e400, 0xb9002e40, 0x0b9002e4, 0x00b9002e, 0x400b9002, 0xe400b900,
+ 0x2e400b90, 0x02e400b9, 0x002e400b, 0x9002c604, 0x60000000, 0x00000000,
+ 0xa011e400, 0xe9043e64, 0x0c100705, 0x84c94032, 0x504f9803, 0xe400c900,
+ 0x2c400d90, 0x03a400f9, 0x003a520d, 0x9007e400, 0xf9003e40, 0x0f9007e4,
+ 0x00fd002e, 0x400f9003, 0xe400f900, 0x3e400f90, 0x03e400f9, 0x003e400f,
+ 0x9003e804, 0x70000000, 0x00000000, 0xa801a400, 0xf9003e40, 0x0f9003e4,
+ 0x00f981be, 0x400f9203, 0xe400f900, 0x3e422f90, 0x03ec08f9, 0x0636404c,
+ 0x9006e400, 0xf9003e40, 0x0f9043e4, 0x00f9003e, 0x400f9003, 0xe400f900,
+ 0x3e400f90, 0x03e400f9, 0x003e400f, 0x9003ea00, 0x60000000, 0x00000000,
+ 0x2810a000, 0xf8003e00, 0x0c8203e0, 0x70f8403a, 0x100f8003, 0xe000e800,
+ 0x3a018f80, 0x036000e8, 0x303a090d, 0x8003e000, 0xf8003e00, 0x0f8003e0,
+ 0x00f8003e, 0x000f8003, 0xe000f800, 0x3e000f81, 0x03e000f8, 0x003e000f,
+ 0x8003ca04, 0x20000000, 0x00000000, 0x28052804, 0xba002d80, 0x88e003fa,
+ 0x00e6e0a3, 0x810ba002, 0xe8048a01, 0x3ba208a0, 0x00ea008e, 0x003d9048,
+ 0xe812e800, 0xea002e80, 0x0ba000e8, 0x00ba002e, 0x800ba002, 0xe800ba00,
+ 0x2e800be0, 0x02e800ba, 0x002e800b, 0xa002ca00, 0x40000000, 0x00000000,
+ 0x28054c00, 0xb3006cc0, 0x091422cf, 0x00a3a028, 0xc0033042, 0xec00a300,
+ 0x2cd01a30, 0x02c800b3, 0x402cf008, 0x3002cc00, 0xb3002cc0, 0x0b3002cc,
+ 0x00b3002c, 0xc00b3002, 0xcc00b300, 0x2cc00b30, 0x82cc00b3, 0x002cc00b,
+ 0x3002ca00, 0x50000000, 0x00000000, 0xa0011c01, 0xb7002dc0, 0x2970429c,
+ 0x00ad0021, 0xc01b7040, 0xdc088700, 0x2dc00870, 0x02d30094, 0x002d5008,
+ 0x4402dc00, 0xa7002dc0, 0x0b7002dc, 0x00b5202d, 0xc00b7002, 0xdc00b700,
+ 0x2dc00b70, 0x02dc00b7, 0x002dc00b, 0x7002e800, 0x40000000, 0x00000000,
+ 0xa8081e00, 0xf7803de0, 0x0d4802de, 0x04e580b9, 0xe00f7802, 0xde84e784,
+ 0x3de00a78, 0x035a20f6, 0x8439e02c, 0x5803de00, 0xf7803de0, 0x0f7803de,
+ 0x00f7803d, 0xe00f7803, 0xde00f780, 0x3de00f78, 0x03de00f7, 0x803de00f,
+ 0x7803ea02, 0x00000000, 0x00000000, 0x081dac00, 0xfb003cc0, 0x0eb003ec,
+ 0x00e1003e, 0xc00fb003, 0xed60fb00, 0x3ac006b0, 0x02e000e8, 0x003a000e,
+ 0x8043ec00, 0xeb003ec0, 0x0fb003ec, 0x00f9903e, 0xc00fb003, 0xec00fb00,
+ 0x3ec08fb0, 0x03ec00fb, 0x003ec00f, 0xb003c206, 0x60000000, 0x00000000,
+ 0x0005fe00, 0xff803de0, 0x0cc8039a, 0x04c59239, 0xe00ef803, 0xbe04df80,
+ 0x7fe40cf9, 0x03fa00ff, 0x803fe00c, 0xd325fc40, 0xff803fe0, 0x0bf903fe,
+ 0x01ff903f, 0xe00ff803, 0xfe00ff80, 0x3fe00ff9, 0x03fe00ff, 0x803fe00f,
+ 0xf803c004, 0x70000000, 0x00000000, 0xa8119c04, 0xf7002dc0, 0x0d74121c,
+ 0x00857821, 0xc1087002, 0xdc008710, 0x2d4c0d70, 0x039000b4, 0x10394408,
+ 0x4102dc00, 0xb7002dc0, 0x0b7002dc, 0x00f5002d, 0xc00b7002, 0xdc00b700,
+ 0x2dc00b70, 0x02dc00b7, 0x002dc00f, 0x7002ea04, 0x60000000, 0x00000000,
+ 0x00009c00, 0xb7002d40, 0x080102d8, 0x408c0069, 0xc00a7182, 0x9c009700,
+ 0x2dc08870, 0x429000b4, 0x002dc008, 0x5006dc40, 0xb7002dc0, 0x0b7022dc,
+ 0x00b7022d, 0xc00b7002, 0xdc00b700, 0x2dc00b70, 0x00dc00b7, 0x002dc00b,
+ 0x7002c000, 0x00000000, 0x00000000, 0x2014cc00, 0xa3002c40, 0x8930220c,
+ 0x10808420, 0xe0183486, 0xec008300, 0x2c400930, 0x028000b0, 0x00286408,
+ 0x0002cc00, 0xb3002cc0, 0x0b3002cc, 0x00a1000c, 0xc00b3002, 0xcc00b300,
+ 0x2cc00b30, 0x02cc00b3, 0x002cc00a, 0x3002c800, 0x30000000, 0x00000000,
+ 0xa815ac00, 0xbb003ec4, 0x0cb003e4, 0x14c900b8, 0xe70e3803, 0xbc02db00,
+ 0x2ec00cb0, 0x03a000f9, 0x003ed408, 0x8002ec00, 0xfb003ec0, 0x0fb003ec,
+ 0x00bb003e, 0xc00fb002, 0xec00fb00, 0x3ec00fb0, 0x03ec00fb, 0x003ec00b,
+ 0xb003ea00, 0x60000000, 0x00000000, 0x8000ec08, 0xfb003ed4, 0x0fa403e7,
+ 0x82f8003e, 0x100fb003, 0xec00fb00, 0x3ed00fb0, 0x23a000f8, 0x003a400f,
+ 0x8003ec00, 0xfb003ec0, 0x0fb003ec, 0x00f9003e, 0xc00fb003, 0xec00fb00,
+ 0x3ec00fb4, 0x03ec00fb, 0x003ec00f, 0xb003e000, 0x30000000, 0x00000000,
+ 0x0110fc00, 0xff003d80, 0x0cc403fc, 0x04fd003b, 0xd008f003, 0x2c00ef00,
+ 0x2f400cf0, 0x03f200f4, 0x0233e81c, 0xc003fc00, 0xff003fc0, 0x0ff003fc,
+ 0x00ff003f, 0xc00ff003, 0xfc00ff00, 0x3fc00ff8, 0x037c00ff, 0x003fc00f,
+ 0xf003c040, 0x30000000, 0x00000000, 0x81046c00, 0xbb002e80, 0x8a8002ef,
+ 0x01e0c022, 0x300ab002, 0x2c00ab00, 0x2c320fb0, 0x02e209b8, 0xca20000a,
+ 0x8802ec00, 0xfb002ec0, 0x0fb012ec, 0x00f9002e, 0xc00bb002, 0xec00bb00,
+ 0x2ec00f0d, 0x822c00bb, 0x002ec009, 0xb002e040, 0x10000000, 0x00000000,
+ 0x80012c00, 0xbb016ed0, 0x48a012ec, 0x40b9802a, 0xc24ab002, 0x2c00ab00,
+ 0x2ee008b0, 0x02e044b8, 0x81a24008, 0x8822ec00, 0xbb002ec0, 0x0bb002ec,
+ 0x00bb002e, 0xc00bb002, 0xec00bb00, 0x2ec00bb0, 0x026c00bb, 0x002ec01b,
+ 0xb0026004, 0x40000000, 0x00000000, 0x08040c00, 0xb3002cc0, 0x0a2062c8,
+ 0x00a80020, 0x000ab00a, 0x0c00a300, 0x2e400b30, 0x02c00090, 0x0060404a,
+ 0x0806cc04, 0xb3002cc0, 0x0b3002cc, 0x00a10024, 0xc00b3002, 0xcc00b300,
+ 0x2cc00a30, 0x02cc00b3, 0x012cc009, 0x3002c201, 0x00000000, 0x00000000,
+ 0x000d6c00, 0xfb003e00, 0x0c8013e4, 0x10b8013a, 0xc00eb003, 0x3c00eb02,
+ 0x3e4008b0, 0x03e000b8, 0x00324018, 0x8003ec00, 0xfb003ec0, 0x0fb003ec,
+ 0x04bb013e, 0xc04fb007, 0xec00fb00, 0x3ec00bb0, 0x036c00fb, 0x003ec00f,
+ 0xb003c003, 0x00000000, 0x00000000, 0xa01dfc00, 0xff003f00, 0x0fc023f0,
+ 0x08fc003f, 0x000ff003, 0xfc00df00, 0x7d400ef0, 0x03f000fc, 0x003d400f,
+ 0xc007fc00, 0xef003fc0, 0x0ef003fc, 0x00fd003f, 0xc00ff003, 0xfc00ff00,
+ 0x3fc00ff0, 0x033c00ff, 0x003fc00d, 0xf003e803, 0x70000000, 0x00000000,
+ 0xc095fe00, 0xcf003f00, 0x0ff2837c, 0x00fc843d, 0x244ef183, 0x1200ef38,
+ 0x33c81f72, 0xa35210ef, 0x8137c81c, 0x4803f200, 0xff212524, 0x0ff203fe,
+ 0x04ff803f, 0xe08ff803, 0xfc04ef20, 0x3f200f58, 0x033c40f7, 0x8131e000,
+ 0xf3023082, 0x70000000, 0x00000000, 0x8000e880, 0x8b602e00, 0x0bfc023f,
+ 0x40ba802e, 0x0848f612, 0x2080df60, 0x23e40bfc, 0x12e0888b, 0x802fc60a,
+ 0x88022200, 0xafc02208, 0x0bfc02ee, 0x00fb802e, 0xe00bb802, 0xef408b1a,
+ 0x0e200b90, 0x822c00eb, 0x822ae008, 0xa142a000, 0x20000000, 0x00000000,
+ 0x08008428, 0xa3482c80, 0x0b30224c, 0x00b0042e, 0x090a3202, 0x0020a304,
+ 0x28c00b30, 0x02a028a3, 0x002cc80a, 0x00124000, 0x83106008, 0x0b3102cc,
+ 0x00b3002c, 0xc00b3002, 0xcc00a320, 0x2c800b90, 0x0a8c40b3, 0x00208008,
+ 0x32060201, 0x20000000, 0x00000000, 0xc0158a01, 0xab002e80, 0x0bb0022c,
+ 0x00bb202e, 0x4008b006, 0x0210ab00, 0x2ac10bb0, 0x42e0048b, 0x006cc00a,
+ 0x9802ac80, 0xab006260, 0x0bb042ec, 0x00bb002e, 0xc00bb002, 0xec048b00,
+ 0x2ef00b98, 0x02ac00ab, 0x082ae018, 0xb002b004, 0x60000000, 0x00000000,
+ 0x0184e020, 0xeba03e48, 0x0fb0036c, 0x10f8003e, 0x200eb00b, 0x2200ab00,
+ 0x3ac00bb0, 0x23a920ab, 0x022ec00a, 0x0a016104, 0xdb00b610, 0x0fb007ec,
+ 0x01fb003e, 0xc00fb003, 0xec00eb00, 0x3e000f98, 0x01ac00f8, 0x0032722c,
+ 0x34030040, 0x30000000, 0x00000000, 0x8100b000, 0xdf103fc0, 0x0ff083fc,
+ 0x003e843f, 0xe40fb013, 0xf401d702, 0x37c30df0, 0xc3ff14ff, 0x081ec017,
+ 0xd0037200, 0x7f003f00, 0x0ff003fc, 0x08ef043f, 0xc00ff023, 0xdc00ff00,
+ 0x3f000ff0, 0x037c00ef, 0x923fc00f, 0xf443e060, 0x20000000, 0x00000000,
+ 0xc000a400, 0xcf203e00, 0x0ef003fc, 0x61c9403a, 0x800e700b, 0x2500ff00,
+ 0x32c40df0, 0x43ac00cb, 0x023fc00d, 0x88432c20, 0xc3003650, 0x0eb003ac,
+ 0x00fb003e, 0xc00fb003, 0xec10fb00, 0x32100fa0, 0x036c00fb, 0xa032900c,
+ 0xb4833800, 0x20000000, 0x00000000, 0xe8052000, 0x0ac022a6, 0x0b70a23c,
+ 0x198b0020, 0xc008f002, 0x24008f00, 0x23c00efc, 0x024c008b, 0x402bc008,
+ 0x94114f30, 0xdf883640, 0x0af0032c, 0x00bb002e, 0xc00bb022, 0xfc00bf00,
+ 0x22400b30, 0x023c00b3, 0x4034c00d, 0xb203fa00, 0x40000000, 0x00000000,
+ 0xc4044c10, 0x13d22400, 0x0a3c020d, 0x01920028, 0x000a3006, 0x4000a300,
+ 0x20e04b34, 0x02c80483, 0x4028c00a, 0x04928100, 0xa3802000, 0x0a30028c,
+ 0x0033002c, 0xc00b3002, 0xcc00b300, 0x20580b10, 0x02cc10b3, 0x4020c009,
+ 0x30027000, 0x10000000, 0x00000000, 0x60001e40, 0x93802520, 0x0b38020e,
+ 0x009d8063, 0xa8887822, 0x76008382, 0xa1e80b78, 0x06fc0087, 0x8429e120,
+ 0xc802fe00, 0x97812760, 0x0a38001e, 0x00b7802d, 0xe00b7802, 0xde00b780,
+ 0xa1610bf9, 0x029e01bf, 0x8427e019, 0x7802d000, 0x00000000, 0x00000000,
+ 0x6c002400, 0xd3003cc0, 0x0e310b8c, 0x40924038, 0xd00e3003, 0x4400f300,
+ 0x20c00b30, 0x828c50c3, 0x3828c00f, 0x10038140, 0xe3013000, 0x4e32078c,
+ 0x00f3003c, 0xc00f3002, 0xcc00bb00, 0x20800f31, 0x03cc00f3, 0x1030c00d,
+ 0x96035200, 0x00000000, 0x00000000, 0x401dbc00, 0xef003bc0, 0x0ff403bc,
+ 0x18e5002f, 0xc90ff081, 0xb408ff00, 0x37c80ef4, 0x023cc0d7, 0x1033c04f,
+ 0xd0035c10, 0xf7403f44, 0x0df003bc, 0x00ff003f, 0xc00ff003, 0xfc00ff00,
+ 0x3fc007f1, 0x437c40ff, 0x003fc40f, 0xf003d000, 0x20000000, 0x00000000,
+ 0x0811a802, 0x8f003a40, 0x0ff003fd, 0x20fb003e, 0x400cfc23, 0xa2009f60,
+ 0x30cb0cf5, 0x03aa00eb, 0x003bc20d, 0x9003ec00, 0xfb103e40, 0x0fb083ec,
+ 0x00fb003e, 0xc00fb003, 0xec00fb00, 0x3ec80f10, 0x032c40fb, 0x003cc088,
+ 0xb0030202, 0x20000000, 0x00000000, 0xe0089800, 0x8d8021c0, 0x0b7002dd,
+ 0x09b5002f, 0xc008f12b, 0x7400af68, 0x69c00872, 0x22fc0087, 0x002fd008,
+ 0x5012dc00, 0xb7203d40, 0x0b7642dc, 0x00e7002d, 0xc00b7002, 0xdc80b720,
+ 0x2dd20b70, 0x021c80b7, 0x002dc008, 0x500ab100, 0x20000000, 0x00000000,
+ 0x0000b700, 0x94922960, 0x037b02de, 0x00b7806d, 0xe0097802, 0x16008780,
+ 0x25c40b78, 0x02df00b7, 0x8029e808, 0x5812de01, 0xb7802d62, 0x0b7a02de,
+ 0x00b7802d, 0xe00b7802, 0xde40b790, 0x2da80be8, 0x021e00b7, 0xc02de20a,
+ 0x18220000, 0x20000000, 0x00000000, 0x4804cc00, 0x832020e8, 0x4b3002cc,
+ 0x00b1402c, 0xfc093012, 0x4d40a300, 0x28c08830, 0x12cc2093, 0x000cc008,
+ 0x3ca2cf60, 0xb30028c0, 0x0b3002cc, 0x00a3002c, 0xc00b3002, 0xcc00b300,
+ 0x2ce10b38, 0x020c00b3, 0x402ce01a, 0x39029304, 0x30000000, 0x00000000,
+ 0xc805b900, 0xce203b80, 0x0fa002e8, 0x00f6503f, 0xb03da007, 0xba008a00,
+ 0x76800fa0, 0x27fb00ea, 0x003a8048, 0xec83f800, 0xfa006fb0, 0x0fa003e8,
+ 0x00fa003e, 0x800fa003, 0xe800fa00, 0x3ea81f68, 0x032804fe, 0x403d80ae,
+ 0x64033300, 0x60000000, 0x00000000, 0x4810a000, 0xf8413c14, 0x0f0013e1,
+ 0x00f8003e, 0x000e8043, 0xe020e800, 0x78000f80, 0x07e000e8, 0x003e002e,
+ 0x8003e100, 0xf8007e02, 0x1f8003e0, 0x00f8003e, 0x000f8003, 0xe000f800,
+ 0x3e001f81, 0x8be000f8, 0x0a3e0009, 0x8083d200, 0x20000000, 0x00000000,
+ 0x0810a420, 0xd1203660, 0x1c900364, 0x00f90036, 0x400d9003, 0xe400f900,
+ 0x36400c91, 0x03e404f9, 0x043e400c, 0x9202e680, 0xc9103e41, 0x0f9043e4,
+ 0x00e9003e, 0x400f9003, 0xe400f100, 0x32680f90, 0x032408f9, 0x803e400c,
+ 0x90030300, 0x20000000, 0x00000000, 0x80046402, 0xcd402248, 0x289602a6,
+ 0x00b90036, 0x40089002, 0xe401e900, 0x2a402898, 0x02e400b9, 0x002e400f,
+ 0x9c42c500, 0x89002e40, 0x0b9002e4, 0x00b9002e, 0x400b9003, 0xa400b902,
+ 0x22e00b90, 0x022400b9, 0x002e4408, 0x92036000, 0x10000000, 0x00000000,
+ 0x18050400, 0x89402644, 0x089002a5, 0x40b90020, 0x40089002, 0xec04b102,
+ 0x62600a90, 0x82a401a9, 0x202c4000, 0x90862400, 0x89012ec0, 0x0b9002e4,
+ 0x00b9002e, 0x400b9002, 0xe400b900, 0x22500b90, 0x0a2400b9, 0x202e4009,
+ 0x98024600, 0x40000000, 0x00000000, 0x08140452, 0x8110204a, 0x08102284,
+ 0x00b10024, 0x50591402, 0xc501b140, 0x28c10a10, 0x06c505b3, 0x000c500b,
+ 0x1002ec00, 0x81002c50, 0x5b1002c4, 0x01b1012c, 0x404b1006, 0x8400b110,
+ 0x20400b91, 0x020441b3, 0x042c4129, 0x91024200, 0x00000000, 0x00000000,
+ 0x18002100, 0xc8683608, 0x088003a0, 0x10f80032, 0x002d8003, 0xe000b800,
+ 0x36000e80, 0x03e000f8, 0x003e000c, 0x8023e000, 0xc8002e00, 0x0f8003e0,
+ 0x00e8003e, 0x000f8003, 0xe0a0f868, 0x22000f84, 0x0321a8f8, 0x003e000d,
+ 0x86834600, 0x10000000, 0x00000000, 0x9811d480, 0xfd203f4a, 0x0f9403e5,
+ 0x00fd003f, 0x400e9402, 0x7400e942, 0x3a510c94, 0x03f400f9, 0x003e501e,
+ 0xf003f402, 0xf9403f41, 0x0f9403e4, 0x00f9003e, 0x400f9003, 0xe400f920,
+ 0xbe418ff2, 0x03e4807f, 0x043f400e, 0xd203e600, 0x70000000, 0x00000000,
+ 0x1815a400, 0x4d003b40, 0x06d00b74, 0x10cd003e, 0x400f9283, 0x2440f900,
+ 0x79400cd0, 0x432401ed, 0x003e4c1c, 0xd043f400, 0xfd003e40, 0x8c928324,
+ 0x00f9003e, 0x400f9003, 0xe480f900, 0x3e400f90, 0x03e400f5, 0x0033400b,
+ 0xd28b0602, 0x70000000, 0x00000000, 0x1810e010, 0x88002200, 0x08840220,
+ 0x04d8006e, 0x0a4b8203, 0x40803048, 0x32000e81, 0x0200a4b8, 0x002e0c0e,
+ 0x8002e000, 0xb8103a0a, 0x0d800220, 0x00b8002e, 0x000e8002, 0xe000b802,
+ 0x2e000b80, 0x12e000e8, 0x00a2800b, 0x82034600, 0x30000000, 0x00000000,
+ 0x4804a402, 0x81002840, 0x08110604, 0x4081012c, 0x490b1282, 0x04809134,
+ 0x28444b10, 0x068484a1, 0x002c484a, 0x1002c400, 0xb1002c48, 0x08100a04,
+ 0x00b1002c, 0x400b1002, 0xc440b100, 0x2c400b10, 0x02c400b9, 0x0020401b,
+ 0x12821a00, 0x20000000, 0x00000000, 0x9814a480, 0x89202a50, 0x08900224,
+ 0x0099002e, 0x510b9002, 0x6501b900, 0x22404a90, 0x0a2400b9, 0x042e400a,
+ 0x9802e700, 0xb9002848, 0x09900224, 0x00b9002e, 0x400a9002, 0xe400b900,
+ 0x2e580b91, 0x02e400a9, 0x8022401b, 0x98026e00, 0x20000000, 0x00000000,
+ 0xa000a580, 0xcd883a74, 0x2c900324, 0x00c9482e, 0x540f9003, 0x2740b901,
+ 0x2a400e90, 0x03a480e9, 0x003e400e, 0x9c03e400, 0xf9003e48, 0x0c900324,
+ 0x00f9003e, 0x400f9003, 0xe400f900, 0x3e500f94, 0x03e400f9, 0x4032640f,
+ 0x96032800, 0x20000000, 0x00000000, 0xe800a400, 0xf9883440, 0x0f10a3a4,
+ 0x00f9003e, 0x610f9003, 0xe600f900, 0x3a400e10, 0x03e400f9, 0x043e401f,
+ 0x9002e400, 0xf9043a40, 0x1f1003e4, 0x00f9003e, 0x400e9003, 0xe400f900,
+ 0x3e400f90, 0x03e400e9, 0x003e610f, 0x1083f200, 0x20000000, 0x00000000,
+ 0x2800a100, 0xc0023e10, 0x0f8047c0, 0x20c8001e, 0x001f0003, 0x6000c800,
+ 0x38030c88, 0x13e103d8, 0x043c000d, 0x84a3e100, 0xf8103210, 0x0c8003e0,
+ 0x00f8007e, 0x000f8003, 0xe000f800, 0x3e000f80, 0x03e000c8, 0x0032100f,
+ 0x840b0200, 0x20000000, 0x00000000, 0x08040802, 0x8e000f80, 0x1be003ba,
+ 0x088a806e, 0x800ba002, 0xa804da00, 0x238000e8, 0x03a800ce, 0xc62e8002,
+ 0xec03bb10, 0xba002a80, 0x88a002e8, 0x00ba002e, 0x800ba002, 0xe800ea00,
+ 0x3ab20ba0, 0x03a80086, 0x4922a043, 0xe88bc204, 0x00000000, 0x00000000,
+ 0x08040c00, 0x83900cc0, 0x0b11028c, 0x08a1002c, 0xc00b3002, 0x4c008b00,
+ 0x28f08838, 0x00cc00a3, 0xc92cc109, 0x3d028d64, 0xb38000c1, 0x283002cc,
+ 0x00b3006c, 0xc01b3002, 0xcc00b300, 0x2cc80b30, 0x028c0083, 0xc820e50b,
+ 0x300a0200, 0x10000000, 0x00000000, 0x00101c40, 0x85002d40, 0x0b40428d,
+ 0x08850d2d, 0xc80b3202, 0x9ec09700, 0x21100870, 0x929e80b5, 0x402dc80a,
+ 0x70229400, 0xb3802bc4, 0x087002dc, 0x00b7002d, 0xc00b7002, 0xdc00a720,
+ 0x29800b72, 0x029e8087, 0x0021c00b, 0x3002c000, 0x00000000, 0x00000000,
+ 0x00083ea0, 0xc7813de1, 0x0b481396, 0x02e5842d, 0xfc4b7a83, 0x5ea0c7c0,
+ 0x29202c78, 0x03de40e5, 0x803fea15, 0x78019600, 0xf78031e2, 0x087802de,
+ 0x00f7802d, 0xe00f7803, 0xde00f7c0, 0x2de00f78, 0x13be02c7, 0x80b1e04f,
+ 0x580b0000, 0x00000000, 0x00000000, 0x2815ac88, 0xff903e80, 0x8f8003a8,
+ 0x00d9003f, 0xc80ff103, 0x6d84bb0e, 0x7e004fb0, 0x03fc40c8, 0x003fc50c,
+ 0xb003a404, 0xf9003cd8, 0x0fb003ec, 0x00fb003e, 0xc00fb003, 0x6c00eb00,
+ 0x3a9a0fb1, 0x03ac40fb, 0x043ec00f, 0x9003ca04, 0x60000000, 0x00000000,
+ 0x4005be02, 0xce903be0, 0x0ff9021e, 0xc8ef823f, 0xe00df803, 0x7e12ef80,
+ 0x13600df9, 0x133e017d, 0x923fe00e, 0xf243f600, 0xff803be4, 0x0ff803fe,
+ 0x00ff803f, 0xe00ff803, 0xfe00ff80, 0x3fe00cf8, 0x037e00ff, 0x803fe00f,
+ 0xf8031002, 0x60000000, 0x00000000, 0xa800bc10, 0x86003546, 0x48710a1c,
+ 0xc887102f, 0xc40d7013, 0x7c008724, 0x3508a864, 0x029c48e5, 0x002dc80c,
+ 0x6082d400, 0xb72431ce, 0x0f7003dc, 0x00b7002d, 0xc00f7002, 0xdc00b700,
+ 0x3dc00af0, 0x021c00b7, 0x002dc00b, 0x70822b00, 0x20000000, 0x00000000,
+ 0xa0009c00, 0x970061c0, 0x0a71021c, 0xc0a7002d, 0xc0087002, 0x1c008305,
+ 0x21000810, 0x425c00b5, 0x012cc08b, 0x51025000, 0xb7012dc0, 0x1b7002dc,
+ 0x00b7002d, 0xc00b7002, 0xdc00b700, 0x2f000871, 0x021c00b7, 0x002dc20b,
+ 0x70022800, 0x20000000, 0x00000000, 0x40048f63, 0x93d02680, 0x40300200,
+ 0x0803e06c, 0xf0093002, 0x4f608300, 0x24010800, 0x064c20a0, 0x002cc00a,
+ 0x0c02c2c0, 0xb10062e8, 0x0b30428c, 0x00b3002c, 0xc10b3002, 0xcc00b302,
+ 0x2c120a38, 0x020c00b3, 0xb22cc00b, 0xbc021100, 0x30000000, 0x00000000,
+ 0x0804be00, 0xd80032a0, 0x0eb00724, 0x00eb882f, 0xf68cf003, 0x3e01af00,
+ 0x22400c30, 0x2a7d00f9, 0x002fc04e, 0xb8026500, 0xfb002ff0, 0x0fb002ec,
+ 0x00fb003e, 0xc01fb003, 0xec00ff00, 0x3e500cfc, 0x033c00fb, 0x003c64cf,
+ 0x9c0b0300, 0x20000000, 0x00000000, 0x8000ac00, 0xeb003e40, 0x0e8403e4,
+ 0x00fb023f, 0xc00ff013, 0xec00fb00, 0x3e100f90, 0x03bc00e9, 0x423fc00c,
+ 0x9203e009, 0xfb0036c0, 0x0eb0036c, 0x00fb003e, 0xc00eb003, 0xec00fb00,
+ 0x3a000fb1, 0x03ac08fb, 0x422e400f, 0xb403e000, 0x20000000, 0x00000000,
+ 0x0100bc00, 0xca083300, 0x0d640314, 0x09cf023b, 0xc00cf001, 0x3c00f700,
+ 0x30010ce0, 0x03bc00dd, 0x003dc00d, 0xe813f400, 0xe30073c0, 0x0870037c,
+ 0x00ff003f, 0xc00ff003, 0xfc00ff00, 0x3fd00ff0, 0x83dc10cf, 0x103fe90c,
+ 0x988b0140, 0x20000000, 0x00000000, 0x81102c04, 0x83b12212, 0x0a8003e3,
+ 0x00a3823e, 0xc18ab002, 0x2c10bb00, 0x3a008d84, 0x02ac0088, 0x802ec00c,
+ 0x8d02e224, 0xb91022c0, 0x08b0022c, 0x00bb002e, 0xc00bb002, 0x6c00bb00,
+ 0x2e800bb0, 0x02ec0089, 0xce2ee18d, 0x82022044, 0x00000000, 0x00000000,
+ 0x80040c00, 0x9a002688, 0x08a40262, 0x20b91024, 0xc0593002, 0xac08bb00,
+ 0x221429b8, 0x020c0098, 0xc02ec009, 0xb0b2e600, 0xa9042ac0, 0x0bb0026c,
+ 0x00bb002e, 0xc00bb002, 0xec00bb00, 0x2e400bb0, 0x16ec009b, 0x002ec049,
+ 0xb1022000, 0x00000000, 0x00000000, 0x08140c00, 0x92002440, 0x0b0012c0,
+ 0x00b90024, 0xc01b300a, 0x8c00b300, 0x2c000900, 0x028c0090, 0x022cc008,
+ 0x0042c000, 0x910020c0, 0x0b30060c, 0x01b3002c, 0xc00b3002, 0x4c00b300,
+ 0x2c400b30, 0x02cc0292, 0x042cc009, 0x300a0200, 0x00000000, 0x00000000,
+ 0x00007c00, 0xda003400, 0x0ca00260, 0x00b90073, 0xc00d7011, 0xbc10bf00,
+ 0x32000d80, 0x633c00d8, 0x003fc00d, 0x8003e010, 0xe9013bc0, 0x2fb0036c,
+ 0x00fb003e, 0xc00fb003, 0xec00bb00, 0x3e000fb0, 0x03ec00db, 0x003ec04d,
+ 0xb00b0000, 0x10000000, 0x00000000, 0x8011bc02, 0xef003b00, 0x0e4053b0,
+ 0x04ed003f, 0xc00ef003, 0x7c01bf02, 0x3b000ec0, 0x03fc00ec, 0x007fc08f,
+ 0xc007f008, 0x7d007bc0, 0x0cf003fc, 0x00ff003f, 0xc00ff003, 0x7c04ff00,
+ 0x3d000ff0, 0x03fc10ef, 0x003fc08f, 0xf003e004, 0x70000000, 0x00000000,
+ 0xc08cfe00, 0xcdc433c0, 0x1ff083fc, 0x00af803f, 0xe00f7207, 0x9e00cf80,
+ 0x3be00ef2, 0x03fc80ec, 0x801fe00e, 0xf803fe00, 0xff803fe0, 0x0ff803fe,
+ 0x00ff803f, 0xe00ff803, 0xfe00ff80, 0x3fe00ff8, 0x03fe00ff, 0x9037e00f,
+ 0xf803f000, 0x70000000, 0x00000000, 0x8000e600, 0x880136d0, 0x0bfc42ff,
+ 0x48b3282e, 0xe00bfc13, 0xae00fb80, 0x22c20bf5, 0x82fe44b8, 0x8232c00a,
+ 0xb802ee00, 0xbb8026e0, 0x0bb202ee, 0x00bb802e, 0xe00bb802, 0xee00bb80,
+ 0x2ee00bb8, 0x02ee00bb, 0x0022e00b, 0xb802e004, 0x30000000, 0x00000000,
+ 0x0804880a, 0x88202090, 0x5b3012cc, 0x00a3212c, 0xc08b3402, 0x8c018300,
+ 0x20c84b32, 0x428c00b0, 0x042cc008, 0x3002cc00, 0xb3002cc0, 0x0b3082cc,
+ 0x00b3002c, 0xc00b3002, 0xcc00b300, 0x2cc00a30, 0x02cc00b3, 0x006cc00b,
+ 0x3002c201, 0x70000000, 0x00000000, 0xc014a400, 0x8a002685, 0x0bb002ec,
+ 0x00bb022e, 0xc00bb002, 0xac10bb00, 0xa2c00bb0, 0x06ec00b8, 0x8628c00a,
+ 0xb002ec00, 0xbb002ec0, 0x0bb042ec, 0x00bb002e, 0xc00bb002, 0xec00bb00,
+ 0x2ec08bb0, 0x02ec00bb, 0x002ac00b, 0xb002f004, 0x60000000, 0x00000000,
+ 0x0184e380, 0xc08032d0, 0x0bb043ec, 0x00eb003e, 0xc00fb003, 0xac10cb00,
+ 0x32c00eb0, 0x07ec08e8, 0xc03ec10c, 0xb003ec00, 0xbb002ec0, 0x0fb003ec,
+ 0x00fb002e, 0xc00fb002, 0xec00bb00, 0x3ec00fb0, 0x03ec00f3, 0x003ec00f,
+ 0xb003d004, 0x70000000, 0x00000000, 0x8100b100, 0xfc403fc0, 0x0ff023fc,
+ 0x20ff002f, 0xc00ff003, 0xfc04df00, 0x37c00ff0, 0x53ec01fd, 0x0137c00f,
+ 0xf0017c00, 0x7f0037c0, 0x0ff003fc, 0x00ff003f, 0xc00ff003, 0xfc00ff00,
+ 0x3fc00ff0, 0x03fc00ff, 0x0817c00f, 0xf003f800, 0x60000000, 0x00000000,
+ 0xe000ab00, 0xc9807e82, 0x0eb043bc, 0x00db0036, 0xc00eb083, 0xac08eb00,
+ 0x3ec00ff0, 0x032c10f9, 0x403ec00c, 0xb003ec00, 0xfb003ec0, 0x0fb003ac,
+ 0x00fb003e, 0xc00fb003, 0xec00fb00, 0x3ec00fb0, 0x13ec04fb, 0x003ec00f,
+ 0xb003f004, 0x20000000, 0x00000000, 0xe8050200, 0x88502ea8, 0x0bf5063d,
+ 0x008b0022, 0xe00bf003, 0x4c208300, 0x3ac00bf0, 0x023c1089, 0x002ec00d,
+ 0xb002ec00, 0xbb002ec0, 0x0bb0022c, 0x10bb002e, 0xc00bb002, 0xec00bb00,
+ 0x2ec00bb0, 0x02ec00bb, 0xc822c10b, 0xb002f200, 0x40000000, 0x00000000,
+ 0xc4044c00, 0x90012c80, 0x0a3002cd, 0x4093002c, 0xc8083102, 0xcd80b330,
+ 0x64c00b30, 0x020c0080, 0x022ce208, 0x3002cc00, 0xb30028c0, 0x0b3a028c,
+ 0x00b3002c, 0xc00b3002, 0xcc00b300, 0x2cc00b30, 0x02cc00b3, 0x8028c043,
+ 0x3042f800, 0x50000000, 0x00000000, 0x40001e02, 0x95802da0, 0x0b78025e,
+ 0x81878061, 0xe20b7802, 0x5e409780, 0x69e01b78, 0x169e0285, 0x902de209,
+ 0x7802de00, 0xb7802de0, 0x0b78821e, 0x01b7802d, 0xe00b7802, 0xde00b780,
+ 0x2de00b78, 0x02de00b7, 0x8021e00b, 0x7802d800, 0x40000000, 0x00000000,
+ 0x4c000840, 0xd0002cd0, 0x4e30c2cc, 0x01d31134, 0xc44e3013, 0xcc00b301,
+ 0x3cc08fb0, 0x0b0c00e1, 0x003ec41c, 0x3003cc00, 0xf3003cc0, 0x0fb1038c,
+ 0x00f3003c, 0xc00f3003, 0xcc00f300, 0x3cc40f30, 0x27cc00fb, 0x0038c00f,
+ 0x3003d202, 0x00000000, 0x00000000, 0x40149c04, 0xec103fc4, 0x0f74839d,
+ 0x80ff002f, 0xc00ff183, 0xfc00ef10, 0x3bc44bf1, 0x013c20ad, 0x003fc10f,
+ 0xf103fc00, 0xff003fc0, 0x0ff003fc, 0x00ff003f, 0xc00ff003, 0xfc00ff00,
+ 0x3fc00ff0, 0x03fc00ff, 0x003bc00f, 0xf003d006, 0x60000000, 0x00000000,
+ 0x0814a400, 0xf8003fa0, 0x0eb003ff, 0x44db023e, 0xc00fb003, 0x6c00c300,
+ 0x36e00df4, 0x036c80f8, 0x8036c00e, 0xb003ec00, 0xfb003ec0, 0x0fb003ec,
+ 0x00fb003e, 0xc00fb003, 0xec00fb00, 0x3ec00fb0, 0x03ec00fb, 0x8036c00f,
+ 0xb003ea00, 0x70000000, 0x00000000, 0xc0009400, 0xb4002f20, 0x087220cc,
+ 0x00c7002d, 0xc00b3302, 0x1c008700, 0x2bc00836, 0x8a1cc0b5, 0x00b1c00b,
+ 0x70039c00, 0xb7002dc0, 0x0b7002dc, 0x00b7002d, 0xc00b7002, 0xdc00b700,
+ 0x2dc00970, 0x02dc00b7, 0x0021c00b, 0x7002f204, 0x60000000, 0x00000000,
+ 0x00009a00, 0xb484296c, 0x0a7802de, 0x8097802d, 0xe00a7802, 0xde008780,
+ 0x21e00978, 0x061e80bd, 0x8021e00b, 0x7802de00, 0xb7802de0, 0x0b7802de,
+ 0x00b7802d, 0xe00b7802, 0xde00b780, 0x2de00a78, 0x02de00b7, 0x8025e00b,
+ 0x7802f000, 0x20000000, 0x00000000, 0x4814cf00, 0xb3086ce0, 0x083022cc,
+ 0x0183002c, 0xc00b3002, 0x8c068300, 0x28c04930, 0x020c01b3, 0x4120c00b,
+ 0x30028c00, 0xb3002cc0, 0x0b3002cc, 0x00b3002c, 0xc00b3002, 0xcc00b300,
+ 0x2cc00b30, 0x02cc00b3, 0x0020c00b, 0x3002d204, 0x30000000, 0x00000000,
+ 0xc805b900, 0xfe013fa8, 0x8aa003e8, 0x04da023e, 0x800ea003, 0xe811c200,
+ 0x36800da0, 0x036800fe, 0x8a32801e, 0xa003e800, 0xfa002e80, 0x0fa003e8,
+ 0x00fa003e, 0x800ba002, 0xe800ba00, 0x3e800ea0, 0x03e800fa, 0x0036800f,
+ 0xa003fa04, 0x60000000, 0x00000000, 0x4810a040, 0xf8013e10, 0x0f0003e0,
+ 0x00f8003e, 0x100f8001, 0x2001f840, 0x3e001e80, 0x038000f8, 0x083a101f,
+ 0x8003a000, 0xf8003e00, 0x0f8403e0, 0x00f8003e, 0x000f8003, 0xe000f800,
+ 0x3e000d80, 0x03e000f8, 0x003e000f, 0x8003d200, 0x30000000, 0x00000000,
+ 0x0810a420, 0xf9213e60, 0x0f990b27, 0x00f9002e, 0x400f1003, 0xe500d902,
+ 0x36404f90, 0x032400c9, 0x003e680f, 0x9023e400, 0xf9003e40, 0x0f9403e4,
+ 0x00f9003e, 0x400f9003, 0xe400f900, 0x3e400f90, 0x03e400f9, 0x003e400f,
+ 0x9003c204, 0x30000000, 0x00000000, 0x80046500, 0xb9862f56, 0x0b9402a6,
+ 0x00b9002e, 0x560b9417, 0x440089c8, 0x2a400b90, 0x02a40089, 0x003a480b,
+ 0x9002e400, 0xb9002e40, 0x0b9202e4, 0x00b9002e, 0x400b9012, 0xe400b900,
+ 0x2e400b90, 0x02e400b9, 0x002e400b, 0x9002e000, 0x10000000, 0x00000000,
+ 0x18042600, 0xbb042e40, 0x0a940224, 0x00a9002e, 0x400b9022, 0xa4208920,
+ 0x22400b10, 0x0624028b, 0x002e400b, 0x9002e400, 0xb9002e40, 0x0b9002e4,
+ 0x00b9002e, 0x400b9002, 0xe400b900, 0x2e400b90, 0x02e400b9, 0x002e400b,
+ 0x9002c600, 0x40000000, 0x00000000, 0x08040600, 0xb1902c50, 0x0b10028c,
+ 0x01b1406c, 0x400b3052, 0x04009100, 0x28504b14, 0x12840081, 0x002c500b,
+ 0x1002c400, 0xb1002c40, 0x0b1102c4, 0x00b1002c, 0x400b1002, 0xc400b100,
+ 0x2c400b10, 0x02c400b1, 0x102c400b, 0x1002c201, 0x00000000, 0x00000000,
+ 0x1800a000, 0xf8402e0a, 0x0e800320, 0x00e8003e, 0x000f8002, 0xa002d800,
+ 0x32000f80, 0x032000c8, 0x003e000f, 0x8023e000, 0xf8047e00, 0x0f8403e0,
+ 0x04f8013e, 0x004f8013, 0xe001f800, 0x3e000f80, 0x03e000f8, 0x403e000f,
+ 0x8003ce03, 0x50000000, 0x00000000, 0x981df408, 0xfd203f40, 0x0f9423e5,
+ 0x10f9003e, 0x418f9403, 0xc400e900, 0x3a400f94, 0x03e500f5, 0x003a400f,
+ 0x9003e400, 0xf9003e40, 0x0f9203e4, 0x00f9003e, 0x400f9002, 0xe400f900,
+ 0x3e400f90, 0x03e400f1, 0x203e400f, 0x9003e606, 0x70000000, 0x00000000,
+ 0x1809b400, 0xff003344, 0x1ed00334, 0x01f91033, 0x400f5283, 0x3400fd00,
+ 0x32400f91, 0x032480b9, 0x003f448f, 0x9007e400, 0xf9003e40, 0x0fd003a4,
+ 0x00f9003e, 0x400f9003, 0xe400f900, 0x3e400f90, 0x03e400fd, 0x1036400f,
+ 0x9003c600, 0x70000000, 0x00000000, 0x1800e800, 0xb8002008, 0x0e840320,
+ 0x04b00236, 0x010b800a, 0x2000b800, 0x28024b81, 0x02a000ba, 0x022e080b,
+ 0x8002e000, 0xb8002e00, 0x0b820220, 0x00b8002e, 0x000b8002, 0xe000b800,
+ 0x2e000b80, 0x02e000b8, 0x0022000b, 0x8002ce04, 0x30000000, 0x00000000,
+ 0x68048400, 0xb900a448, 0x0a110a04, 0x40b100a8, 0x404b1042, 0x0404b100,
+ 0x20400b10, 0x020440b1, 0x002c480b, 0x1002c400, 0xb1002c40, 0x0b128a04,
+ 0x00b1002c, 0x400b1002, 0xc400b100, 0x2c400b10, 0x02c400b1, 0x0024400b,
+ 0x1002c201, 0x70000000, 0x00000000, 0xb814a440, 0xb9006250, 0x0a900224,
+ 0x01b9002a, 0xc04b9002, 0x2401b900, 0x2a400b90, 0x02a400b9, 0x002e400b,
+ 0x9002e400, 0xb9002e40, 0x1b900224, 0x00b9002e, 0x400b9002, 0xe400b900,
+ 0x2e400b90, 0x02e400bb, 0x0022400b, 0x9002c604, 0x60000000, 0x00000000,
+ 0xa000a600, 0xbd603640, 0x4e100724, 0x00b9022a, 0x400b9027, 0x2400f100,
+ 0x32400f90, 0x022400f9, 0x403e411f, 0x9002e400, 0xf9003e40, 0x0b900324,
+ 0x00f9003e, 0x400f9003, 0xe400b900, 0x3e400f90, 0x03e400f9, 0x0036400f,
+ 0x9003e804, 0x70000000, 0x00000000, 0xc800a400, 0xf9903e70, 0x0f9003a4,
+ 0x00f90036, 0x400f9003, 0xe401f900, 0x3e400f10, 0x23e400f9, 0xc03e400f,
+ 0x9003e400, 0xf9003e40, 0x0f900364, 0x00f9003e, 0x400f9003, 0xe400f900,
+ 0x3e400f90, 0x03e400f9, 0x003e4007, 0x9003ea00, 0x60000000, 0x00000000,
+ 0x0800a160, 0xe8103a10, 0x0d80d3e0, 0x10f80632, 0x000e800f, 0x2080d810,
+ 0x32000e80, 0x032000f8, 0x003e000f, 0x8043e010, 0xf8003e00, 0x0f8303e0,
+ 0x00f8003e, 0x000f8003, 0xe000f800, 0x3e000f80, 0x03e000f8, 0x0032000f,
+ 0x8003ca04, 0x20000000, 0x00000000, 0x08043b00, 0xb6902f84, 0x08e403b9,
+ 0x40ba0137, 0xb0086882, 0x38008e80, 0x2a8008a0, 0x022800ba, 0x003b800b,
+ 0xa003a800, 0xba002e80, 0x0bec02e8, 0x00ba002e, 0x800ba002, 0xe800ba00,
+ 0x2e800ba0, 0x02e800be, 0x0022800b, 0xa002ca00, 0x40000000, 0x00000000,
+ 0x08040f00, 0xb34028c0, 0x9935028d, 0x40bb0020, 0xf80a3802, 0x0d0093e0,
+ 0x20c01a30, 0x020c00b3, 0x002cc00b, 0x30028c00, 0xb3002cc0, 0x0bb000cc,
+ 0x00b3002c, 0xc00b3002, 0xcc00b300, 0x2cc00b30, 0x028c00ba, 0x8820c009,
+ 0x3002ca00, 0x50000000, 0x00000000, 0x00001400, 0xb5002de0, 0x08700294,
+ 0x00b72025, 0x70087002, 0x1e009700, 0x29e40871, 0x021c00b7, 0x0029800b,
+ 0x70029c00, 0xb7002dc0, 0x0b7002dc, 0x00b7002d, 0xc00b7002, 0xdc00b700,
+ 0x2dc00b70, 0x02dc00b4, 0x4021c00b, 0x7002e800, 0x40000000, 0x00000000,
+ 0x00001200, 0xf68439e0, 0x0d780396, 0x00f7b031, 0x600e7812, 0x1e00d780,
+ 0x21e00ef8, 0x8b1e08f7, 0x803de00f, 0x78039e00, 0xf7803de0, 0x0f7803de,
+ 0x00f7803d, 0xe00f7803, 0xde00f780, 0x3de00f78, 0x039e00fe, 0x80b1e10f,
+ 0x7803ea02, 0x00000000, 0x00000000, 0x2814a000, 0xfe903ec0, 0x0f9003a0,
+ 0x08ff003c, 0x408ba003, 0xcc006300, 0x3eda0fb6, 0x03ec10fb, 0x003ec00f,
+ 0xb047ac00, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0xc00fb003, 0xec00fb00,
+ 0x3ec00fb0, 0x03ec00f8, 0x003ec00f, 0xb003c206, 0x60000000, 0x00000000,
+ 0x4014b200, 0xfc2037a0, 0x08f90376, 0x44bf8813, 0x600ff807, 0xbe00f780,
+ 0x33e00cf8, 0x033e00cf, 0x803fe00f, 0xf203fe00, 0xff803fe0, 0x0ff8033e,
+ 0x00ff803f, 0xe00ff803, 0xfe00ff80, 0x3fe00ff8, 0x03fe00ff, 0x8033e00f,
+ 0xf803c000, 0x70000000, 0x00000000, 0xa8089004, 0xbf0021c0, 0x0d600014,
+ 0x403f2029, 0x400b5202, 0x1c80b700, 0x2bc40e70, 0x035c00a7, 0x003d800b,
+ 0x7106dc00, 0xe7002dc0, 0x0be0021c, 0x00b7002d, 0xc00b7002, 0xdc00b700,
+ 0x2dc00b70, 0x02dc00b4, 0x0035c40b, 0x7002ea04, 0x60000000, 0x00000000,
+ 0xa0009000, 0xb60021c6, 0x08700214, 0x01b70025, 0x000b3006, 0x9c08b700,
+ 0x21c00930, 0x020c0087, 0x002dc00b, 0x7002dc00, 0xb7002dc0, 0x0b50021c,
+ 0x00b7002d, 0xc00b7002, 0xdc00b700, 0x2dc00b70, 0x02dc00b7, 0x0021c00b,
+ 0x7002c000, 0x20000000, 0x00000000, 0x40048020, 0xb21320c0, 0x09000200,
+ 0x00b3002c, 0x001b0002, 0x0c01b300, 0x68c04a30, 0x064c00a3, 0xa02cc003,
+ 0x3002cc00, 0xa3002cc0, 0x0b000a0c, 0x00b3002c, 0xc00b3002, 0xcc00b300,
+ 0x2cc00b30, 0x02cc00b0, 0x0024c00b, 0x3002c804, 0x30000000, 0x00000000,
+ 0x0804a680, 0xfb401460, 0x08b00324, 0x00ff0036, 0x400b3003, 0x8c00fb00,
+ 0x33c00df0, 0x032c00cb, 0x082e408b, 0xb002ec00, 0xbb003ec0, 0x0fb0022c,
+ 0x00fb003e, 0xc00fb003, 0xec00fb00, 0x3ec00fb0, 0x03ec00fa, 0x0032c00f,
+ 0xb003ea04, 0x60000000, 0x00000000, 0x8010a400, 0xfb603ec0, 0x0fb403a4,
+ 0x00ff003a, 0x000fb003, 0xe500fb40, 0x3ec00eb0, 0x03ec00fb, 0x003ad00f,
+ 0xb003ec00, 0xfb003ec0, 0x0f9003ec, 0x00fb003e, 0xc00fb003, 0xec00fb00,
+ 0x3ec00fb0, 0x03ec00fa, 0x003ec08f, 0xb003e000, 0x30000000, 0x00000000,
+ 0x0110b000, 0xff0036d0, 0x4d280314, 0x10cf003f, 0x400ff003, 0x7800ce00,
+ 0x33c00c70, 0x033c08ff, 0x003be80f, 0xf003fc00, 0xff003fc0, 0x0fe9033c,
+ 0x00ff007f, 0xc00ff003, 0xfc00ff00, 0x3fc00ff0, 0x03fc00fe, 0x003fc00f,
+ 0xf003c044, 0x30000000, 0x00000000, 0x81042200, 0xb38022e0, 0x09880223,
+ 0x00ab002e, 0x300ca042, 0x2f00a3c0, 0x2ac008b0, 0x02ac00bb, 0x002ef00e,
+ 0xb002ec00, 0xbb002ec0, 0x0b0802ac, 0x00bb002e, 0xc00bb002, 0xec00bb00,
+ 0x2ec00bb0, 0x03ac00ba, 0xc02ec00b, 0xb002e040, 0x10000000, 0x00000000,
+ 0x80042200, 0xba282200, 0x08918662, 0x308b006e, 0x600bb002, 0x6e208b88,
+ 0x20c00ab0, 0x022c00bb, 0x002a420b, 0xb002ec00, 0xbb002ec0, 0x0bb4022c,
+ 0x00bb002e, 0xc00bb002, 0xec00bb00, 0x2ec00bb0, 0x02ec00b8, 0x802ec00b,
+ 0xb042e000, 0x40000000, 0x00000000, 0x08000000, 0xb30122c0, 0x09000240,
+ 0x0083002c, 0x000b1002, 0x0400a300, 0x28c00830, 0x128c00b3, 0x042cc00a,
+ 0x3002cc01, 0xb3002cc0, 0x0b00028c, 0x00b3002c, 0xc00b3002, 0xcc00b300,
+ 0x2cc00b30, 0x028c00b0, 0x002cc00b, 0x3002c201, 0x00000000, 0x00000000,
+ 0x00006000, 0xba00b2c0, 0x2c800360, 0x02cf003e, 0x000fb003, 0x6c008900,
+ 0x33c00ef0, 0x032c00fb, 0x003ac00f, 0xb003ec00, 0xfb003ec0, 0x0f80032c,
+ 0x00fb002e, 0xc00fb003, 0xec00fb00, 0x3ec00fb0, 0x03ec00f8, 0x003ec00f,
+ 0xb003c003, 0x50000000, 0x00000000, 0x801df000, 0xff013bc0, 0x1cc00bb0,
+ 0x00ff003f, 0x000cc003, 0xfc00ff00, 0x3fc00ff0, 0x13fc00ff, 0x007fc01f,
+ 0xf007fc00, 0xff003fc0, 0x0fc007fc, 0x00ff003f, 0xc00ff003, 0xfc00ff00,
+ 0x3fc00ff0, 0x03fc00f4, 0x003fc00f, 0xf003e806, 0x70000000, 0x00000000,
+ 0xc084fe00, 0xfc80b360, 0x0f78037c, 0x40dc8031, 0xe00ed803, 0xfe05d492,
+ 0x37c80ff0, 0x0b5081f4, 0x803fc80f, 0x4903fc80, 0xc4803720, 0x0cf2033e,
+ 0x00ff813f, 0xe00cf803, 0xfc00cf94, 0x33600dc8, 0x03fcc0cf, 0x8033c00f,
+ 0x78033004, 0x70000000, 0x00000000, 0x8000ee10, 0xb80822e0, 0x0bb8022c,
+ 0x808a2802, 0xe0009203, 0xee00b822, 0x2fcec2fc, 0x0aa700a8, 0x242ff008,
+ 0x8042ff40, 0xa8802a20, 0x0abd02ae, 0x08bb802e, 0x4208b803, 0xb6008b20,
+ 0x22e00898, 0x02ec0089, 0x8122f10b, 0xb8022006, 0x30000000, 0x00000000,
+ 0x08048c08, 0xb8202040, 0x0b300a4c, 0x00820020, 0xc04a1082, 0xcc00b000,
+ 0x28c04934, 0x008840a0, 0x080cc44a, 0x0202cc00, 0x80002000, 0x0830020c,
+ 0x00b3002c, 0x88083006, 0xec418300, 0x22004900, 0x028c408b, 0x0028d00b,
+ 0x20020201, 0x70000000, 0x00000000, 0xc014ac00, 0xb88022c0, 0x0bb0020c,
+ 0x228100a2, 0xc00ab002, 0xec00b8c0, 0x2ec049b0, 0x22a60008, 0x012ec009,
+ 0x8844ec04, 0xa9042a82, 0x8ab2c2ac, 0x00bb002c, 0x0008b002, 0xac00ab00,
+ 0xa28808ac, 0x00ec008b, 0x002ac00b, 0xa8023000, 0x60000000, 0x00000000,
+ 0x0184ac00, 0xf08022c0, 0x0fb0036e, 0x00d84832, 0xc00e9906, 0xec009880,
+ 0x7ec00d30, 0x038600f8, 0x882ec00f, 0x8883cc04, 0xc8d01000, 0x9cb4032c,
+ 0x00fb013e, 0x910cb003, 0xce02cb00, 0x30780d84, 0x03ac02c3, 0x203ac00f,
+ 0x1c030004, 0x70000000, 0x00000000, 0x8100bc10, 0xfc003f40, 0x0ff003fe,
+ 0x40fe003f, 0xc005f033, 0xbc00fd05, 0x2ec00ef0, 0x0af402ff, 0x1035c00a,
+ 0xc043fc06, 0xed023fea, 0x8f7803fc, 0x10ff003f, 0xe42ff003, 0xa640df00,
+ 0x3fc007d0, 0x03fc00fd, 0x1037c00f, 0xf003f800, 0x60000000, 0x00000000,
+ 0xc000ac00, 0xf8003ac0, 0x0fb0036c, 0x00eb003a, 0xc30e9003, 0xec00f942,
+ 0x39c02df0, 0x22ec08f9, 0x0433c08c, 0x8403bc30, 0xe8403250, 0x0ef443ec,
+ 0x00fb003e, 0x800fb007, 0x2c00db00, 0x3e480d85, 0x43ec00fb, 0x003ac60e,
+ 0xb8033004, 0x20000000, 0x00000000, 0xe8042c08, 0x38882e40, 0x0b30022c,
+ 0x00890020, 0xd808b002, 0xec808900, 0x23c009f8, 0x022490db, 0x0537d40d,
+ 0x80437e08, 0x818836c0, 0x08a002ec, 0x00bb002e, 0x800bbd82, 0x2c000b00,
+ 0x2ed00dad, 0x42fc00bb, 0x1837c008, 0xb0037200, 0x40000000, 0x00000000,
+ 0xe0040c00, 0xb0a02840, 0x0b30024c, 0x00a00028, 0xc00a1002, 0x4f208004,
+ 0x28c01830, 0x12021292, 0x0128c10b, 0x00020e40, 0x80006800, 0x0a3002cc,
+ 0x00b3002c, 0x400b3402, 0x44009b00, 0x2c10082c, 0x02ec00b3, 0x0020f08a,
+ 0x30023800, 0x50000000, 0x00000000, 0x60001e04, 0xb5806de0, 0x0b78020e,
+ 0x01878021, 0xe0085902, 0xde008d80, 0x69e01839, 0x82160e9f, 0x0025e20b,
+ 0xc900de00, 0x8c812d64, 0x187802de, 0x08b7802d, 0x600b7002, 0x56009780,
+ 0x2f210978, 0x02de00b7, 0x8025e108, 0xf8025800, 0x40000000, 0x00000000,
+ 0x68000c40, 0xf0003840, 0x0f300348, 0x08ea0038, 0xc00a3002, 0x4c008100,
+ 0x28c10d30, 0x264800f3, 0x3038cc06, 0x01030c0a, 0xe15018c2, 0x1e3003cc,
+ 0x00b3003c, 0xd00f3102, 0x4400d304, 0x2c000c11, 0x03cc00f2, 0x0038c00e,
+ 0x30031202, 0x00000000, 0x00000000, 0x401cbc10, 0xfd003fc0, 0x0ff001f0,
+ 0x44fd003f, 0xc00ff003, 0xdc02ed00, 0x37c407f0, 0x833400df, 0x2119c40d,
+ 0xc1235c41, 0xfd0035c0, 0x8fd103fc, 0x08ff003f, 0x400f7223, 0xb540ef00,
+ 0x3d800ff0, 0x03fc20f7, 0x033dc40f, 0xf003d006, 0x60000000, 0x00000000,
+ 0x0814ac00, 0xf8003ac0, 0x0f30032c, 0x01c98032, 0xc00eb003, 0x6c00f802,
+ 0x3bc00cf6, 0x87241028, 0x0233c21f, 0x80037c00, 0xc9003e80, 0x8cf013ec,
+ 0x08fb013e, 0x0004b803, 0x2500cb00, 0x3e000fa2, 0x03ec00fb, 0x0032c40c,
+ 0xb001ea04, 0x70000000, 0x00000000, 0xc0089c00, 0xb5002d40, 0x0e70023c,
+ 0x02870035, 0xc00b7006, 0x1c00b500, 0x2fd40d72, 0x0a1c00af, 0x00a1d80b,
+ 0xe0061cc2, 0x85002dc0, 0x8f6e02dc, 0x00b7002d, 0x400d7002, 0x04008700,
+ 0x2d000b77, 0x02dc80b7, 0x0029c828, 0x7002f204, 0x60000000, 0x00000000,
+ 0x00009e00, 0xb48029e0, 0x0b780a1e, 0x00878021, 0xe00bfc02, 0x5e00b580,
+ 0x2de88938, 0x465e0085, 0x8225e00a, 0x68221e41, 0x85802de2, 0x0858c2de,
+ 0x01b7812d, 0xa019780e, 0x16018780, 0x2d200b58, 0x02de00b6, 0x8021e018,
+ 0x7802f000, 0x20000000, 0x00000000, 0x48048c00, 0xb3002c60, 0x0a30000d,
+ 0x00810024, 0xc00bb002, 0x0c00b370, 0x2cc00930, 0x020c00ab, 0x9224c00b,
+ 0x3c020c00, 0x83822ce0, 0x0b3402cc, 0x00b3002e, 0xf8093002, 0x04018300,
+ 0x2c820b30, 0x02cc00b3, 0x0028c098, 0x3482d200, 0x30000000, 0x00000000,
+ 0xc804a800, 0xfe003a80, 0x0fa00338, 0x008e5032, 0x800fa003, 0x6800fec0,
+ 0x3e800da0, 0x037a20ce, 0xd066800e, 0xec022800, 0xc6e03fb0, 0x0ce003e8,
+ 0x00fa003f, 0x880da003, 0x2802ca01, 0x3f800fa0, 0x03e800f6, 0x0032802c,
+ 0xe003fa00, 0x60000000, 0x00000000, 0x4810a000, 0xf8403e04, 0x0e8013e0,
+ 0x60f8003e, 0x100f8003, 0xe000f800, 0x7e002f00, 0x03e101f8, 0x013a000f,
+ 0x836ba000, 0xf8083e02, 0x0f0003e0, 0x08f8003e, 0x000f8003, 0xc000f800,
+ 0x3e000f80, 0x03e000f8, 0x423e100f, 0x8403d200, 0x30000000, 0x00000000,
+ 0x0810a400, 0xf980b640, 0x0f900364, 0x00d9003e, 0x600e9003, 0x6440f900,
+ 0xb8401c98, 0x0366a0e9, 0x0332450f, 0x90212680, 0xc9003240, 0x0c9083e4,
+ 0x00f9003e, 0x400c9003, 0xe400d900, 0x3e700f90, 0x03e400f9, 0x00b2480c,
+ 0x9003c200, 0x30000000, 0x00000000, 0x80042400, 0xb1402240, 0x0b102224,
+ 0x00c9002e, 0x600b9002, 0x2604b900, 0x22410a9c, 0x02c68089, 0x002e680b,
+ 0x90028710, 0xd9022054, 0x0dd00224, 0x00b9002e, 0x400c9d02, 0xe4008900,
+ 0x2e500bb0, 0x02e400b9, 0x88205208, 0x9402e000, 0x10000000, 0x00000000,
+ 0x18012400, 0xbb502240, 0x0b900244, 0x0089002e, 0x460b9002, 0x6400b100,
+ 0x22400991, 0x022400a9, 0x0022400b, 0x1002a500, 0x99802240, 0x009002a4,
+ 0x00b9012e, 0x40199002, 0xe4028900, 0x2e500b90, 0x02e400b9, 0x80224008,
+ 0xbc02c604, 0x40000000, 0x00000000, 0x08000410, 0xb9102040, 0x0b100205,
+ 0x0081402c, 0x400b1102, 0x0400b140, 0x60500b30, 0x12840081, 0x40a8400b,
+ 0x14068400, 0x990020c1, 0x09100604, 0x04b1002c, 0x50283002, 0xc4008110,
+ 0x2c400b10, 0x06c440b9, 0x00204028, 0x1002c201, 0x00000000, 0x00000000,
+ 0x1800600c, 0xf8423200, 0x0f800360, 0x01c0003e, 0x000e8403, 0x6000f800,
+ 0x32000980, 0x2360a4a8, 0x0232000f, 0x8003a000, 0x9800b200, 0x2c8283a0,
+ 0x00f8003c, 0x000d8003, 0xe2a0c840, 0x3e000f80, 0x03e1a0f8, 0x00320a0c,
+ 0x8003ce03, 0x50000000, 0x00000000, 0x984de400, 0xfd203b40, 0x0f9023f5,
+ 0x02fd003e, 0x400f5203, 0xe400fd01, 0x3e510e94, 0x03d400fd, 0x0036508f,
+ 0xd021c500, 0xfd003d40, 0x4fd003e4, 0x00f9003f, 0x400f1003, 0xf400f920,
+ 0x3f400b90, 0x03e480f5, 0x013c400f, 0xd003e606, 0x70000000, 0x00000000,
+ 0x1815a400, 0xff003e40, 0x1cd023e4, 0x00e9003b, 0x400fd003, 0xb400f910,
+ 0x3e400f50, 0x033400e9, 0x00334a0f, 0x91077400, 0x5d003d40, 0x0c9011e4,
+ 0x00f9003e, 0x400fd003, 0xe400f900, 0x3f400f90, 0x03e400fd, 0x003f4047,
+ 0xf000c600, 0x70000000, 0x00000000, 0x1810e008, 0xb8002e00, 0x0d8006e1,
+ 0x20b80836, 0x000e8002, 0x6000b020, 0x2c120b80, 0x43601088, 0x2a32000b,
+ 0x22436100, 0x8a002e00, 0x0a8002e0, 0x00b8002e, 0x030b8002, 0xe040b800,
+ 0x2e000ba0, 0x22e000ba, 0x002e000b, 0xa002ce04, 0x30000000, 0x00000000,
+ 0x68048400, 0xb1002e40, 0x081002c4, 0xc0a10020, 0x400b1002, 0xc400b120,
+ 0x2c4c0b11, 0x02040481, 0x206c400b, 0x12020440, 0x81002a40, 0x081002c4,
+ 0x00b1002c, 0x480b1006, 0xc401b100, 0x2c400b10, 0x02c400b1, 0x002c400b,
+ 0x1002c201, 0x70000000, 0x00000000, 0xb811a400, 0xbb002e40, 0x099002e4,
+ 0xa0b92026, 0xc08a9022, 0x64103900, 0x2e401b90, 0x02640081, 0x422a400b,
+ 0x90006408, 0x89026e49, 0x0a9082e4, 0x00b9022e, 0x400b9002, 0xe401b900,
+ 0x2e540b92, 0x02e405b9, 0x002e400b, 0x9002c604, 0x60000000, 0x00000000,
+ 0xa004a400, 0xfd803c40, 0x089002e5, 0x00e90822, 0x410fd803, 0xa400f998,
+ 0x3e400f90, 0x030642c9, 0x00be410f, 0x9c032402, 0xc9403e79, 0x0c9403e4,
+ 0x00f9003e, 0x680f9003, 0xe400f905, 0x3e510f98, 0x03e400f9, 0xd03e400f,
+ 0x9503e804, 0x30000000, 0x00000000, 0xc800a404, 0xf9183e41, 0x0f9003e6,
+ 0x00f9003e, 0x420f9203, 0xa410f900, 0x3e400f10, 0x03e402f9, 0x0036400f,
+ 0x9903e438, 0xf9903e60, 0x1f9203e4, 0x00f9043e, 0x440f9043, 0xe480f900,
+ 0x3e600f98, 0x03e418f9, 0x883e400f, 0x9003ea00, 0x20000000, 0x00000000,
+ 0x0800a000, 0xf8003e00, 0x0f804320, 0x02d8403e, 0x044e8013, 0xe064f840,
+ 0x12000c82, 0x0320c0d8, 0x0432000e, 0x80034008, 0xd8003e18, 0x2c800320,
+ 0x08f8003e, 0x002c8003, 0xe000e800, 0x3e188c85, 0x83e000f8, 0x4032000d,
+ 0x8483ca04, 0x20000000, 0x00000000, 0x0804a804, 0xbe802e80, 0x09e10228,
+ 0x00ca002f, 0x900ba002, 0xfb00ba00, 0x2a8008ea, 0x0b79008a, 0x0083a008,
+ 0xa0123904, 0xca802d92, 0x08a04168, 0x00ba002e, 0x8008ed86, 0xe800ba00,
+ 0x2fa008a4, 0x02e810ee, 0x88b3800b, 0xe202ca00, 0x00000000, 0x00000000,
+ 0x08044c00, 0xb3902cc0, 0x0b3c0a0c, 0x088b002c, 0xc00ab002, 0xce10b300,
+ 0x24c00b3c, 0x020c0183, 0x0024c808, 0xb002cd00, 0x83002ce0, 0x1830004c,
+ 0x00b3002c, 0xc0083c12, 0xcc00a300, 0x2ce01038, 0x06cc00b3, 0x0024808b,
+ 0x3002ca00, 0x50000000, 0x00000000, 0x00101c00, 0xb5002dc0, 0x097c0a0e,
+ 0x4087202d, 0xc00b7206, 0xdc01b780, 0x29e40b70, 0x024c048f, 0x30056208,
+ 0x73128d06, 0x87082dc1, 0x0878025c, 0x00b7012f, 0xe0087002, 0xdc00b720,
+ 0x2dc24860, 0x06dc80af, 0x80a1c20b, 0x7002c800, 0x40000000, 0x00000000,
+ 0x00081e00, 0xf6a03de0, 0x0f78031e, 0x20c7a02d, 0xe09e7a03, 0xde00f78a,
+ 0x31ec4b78, 0x031e00d7, 0xa124602e, 0x7a03de00, 0xc7803de0, 0x0438235e,
+ 0x00f7803d, 0xe8087802, 0xde00e784, 0x3dc00c78, 0x83de00f7, 0x8435e00d,
+ 0x4813ca02, 0x00000000, 0x00000000, 0x2814ac00, 0xff803ec0, 0x0f3003ec,
+ 0x80ef5036, 0xc00ff803, 0x6400ff60, 0x3fd8acb0, 0x03ec02f3, 0x203a004f,
+ 0xf4012400, 0xeb003ec0, 0x4fb003ec, 0x00fb003d, 0xc00fa003, 0xec00fb00,
+ 0x3cc00fa2, 0x03ec40e3, 0x023e400f, 0x8003c206, 0x60000000, 0x00000000,
+ 0x4014be00, 0xff883be0, 0x0f7803be, 0x00e7c07b, 0xe40ff983, 0xfe408f8a,
+ 0x1fc80ff8, 0x039e00cf, 0xc13b608f, 0xfc47fc00, 0xff803fe0, 0x0cf803fe,
+ 0x40ff803f, 0xf20cf803, 0xfe00ff88, 0x3f600ff9, 0x03fe00c7, 0x8033a40c,
+ 0x69031000, 0x70000000, 0x00000000, 0xa8009c00, 0xbf0021c0, 0x0f70021c,
+ 0x20b71861, 0x8403f002, 0x1c04d720, 0x2dc40852, 0x021c01a7, 0x20a1400b,
+ 0x72079c80, 0x87002d40, 0x8d72039c, 0x05b7002f, 0xc00d7002, 0xdc008700,
+ 0x2d400b55, 0x02dc0087, 0x1035c00a, 0x60022a04, 0x60000000, 0x00000000,
+ 0xa0009c00, 0xb6482dc0, 0x0b70029c, 0x40af0029, 0x404a7012, 0x9c08870a,
+ 0x2cc00a70, 0x06944087, 0x0061400b, 0x74028840, 0xa5082dc4, 0x087022dc,
+ 0x01b7002d, 0xc0087002, 0xcc20a710, 0x2d400b75, 0x06dc009f, 0x0021c048,
+ 0x404e0000, 0x20000000, 0x00000000, 0x40040c00, 0xb38024e0, 0x1230022c,
+ 0x01b34820, 0x000bb802, 0x04001b00, 0x2cc00810, 0x020580a3, 0x0020000b,
+ 0x30028400, 0x81882c43, 0x1934028c, 0x00b3002c, 0xc0093002, 0xce01a300,
+ 0x2c400b18, 0x02cc0090, 0x4820408a, 0x28061804, 0x30000000, 0x00000000,
+ 0x0804ac10, 0xf8c03ae0, 0x8b3003be, 0x00efc03a, 0xc04eb823, 0xac00cf10,
+ 0x1fc00a30, 0x02af80cf, 0x002a400f, 0xfa03ac00, 0xab803ed0, 0x0cb083ec,
+ 0x00fb003f, 0xc60cb003, 0xec00ef00, 0x3ea00f92, 0x03fc02db, 0x6022c00c,
+ 0xba030a04, 0x60000000, 0x00000000, 0x8000ac00, 0x3a003ac5, 0x0fb403ec,
+ 0x00ff003e, 0x500fb103, 0xe800ff00, 0x3fc00eb4, 0x53e400fb, 0x103e500f,
+ 0xf003ac00, 0xe9003ed4, 0x0fb003ec, 0x00fb023f, 0xc00fb401, 0xcc004b00,
+ 0x3ee00f84, 0x03ec00eb, 0x403ec00f, 0xb003e000, 0x30000000, 0x00000000,
+ 0x0100bc00, 0xfea433c0, 0x07f0033c, 0x00cf0033, 0x8004f003, 0x3e80ff02,
+ 0x3bc00dd8, 0x03bc00df, 0x0b3f410b, 0xf003de00, 0x9f003f40, 0x0cf0a3fc,
+ 0x00ff007f, 0xc10cfa03, 0xfc00df00, 0x3f400fdc, 0x032c00ff, 0x8036c00f,
+ 0xc003c044, 0x30000000, 0x00000000, 0x81142c00, 0xb24022c0, 0x0bb74a2c,
+ 0x00c30036, 0x100bb002, 0xa020bb00, 0x3ec04a98, 0x922624bb, 0x0026200b,
+ 0xb002e400, 0x89002c70, 0x08b0026c, 0x00bb002c, 0xc008b082, 0xec00ab00,
+ 0x2e600b0c, 0x036c00b3, 0x1822680b, 0x8803a040, 0x10000000, 0x00000000,
+ 0x80012c00, 0xbb0466c0, 0x0b80222c, 0x00ab0426, 0xe019b002, 0x6000bb00,
+ 0x60c00ab2, 0x02ee00bb, 0x002a220b, 0xb002e481, 0xbb200ae2, 0x08b002ec,
+ 0x08bb002e, 0xc0099002, 0xec008b00, 0x2e700ba0, 0x02ac01bb, 0x0022e00b,
+ 0xa802e000, 0x50000000, 0x00000000, 0x08140c10, 0xbb04e0c0, 0x0b00020c,
+ 0x00ab0424, 0x000b3042, 0x8000b301, 0x2cc00a10, 0x020400b3, 0x0004000b,
+ 0x3002c405, 0x81022e00, 0x0830024c, 0x01b3002e, 0xc0293002, 0xcc00a300,
+ 0x2c400b80, 0x064c00bb, 0x0020400b, 0x00028200, 0x00000000, 0x00000000,
+ 0x00006c00, 0xfa0032c1, 0x0f80023c, 0x00ef0036, 0x000db003, 0x2000ff00,
+ 0x3bc00e80, 0x21e004d7, 0x027e000f, 0xf003e000, 0xf9003e40, 0x2cb003ec,
+ 0x00fb002f, 0xc00db003, 0xec00cb00, 0x2e400fa0, 0x03ac00fb, 0x0032c00f,
+ 0x8003c002, 0x10000000, 0x00000000, 0x8000fc04, 0xff003fc0, 0x0fc013fc,
+ 0x0adf003f, 0x000ff003, 0x9004ff00, 0x3fc00e40, 0x03f000ff, 0x007f004f,
+ 0xf023f400, 0xed043d40, 0x8ff003fc, 0x00ff023f, 0xc00ef003, 0xfc00ff02,
+ 0x3f400fc0, 0x01fc00ff, 0x003b400f, 0xe003a806, 0x70000000, 0x00000000,
+ 0xc005fe00, 0xff403300, 0x07d803fc, 0x00df003b, 0xc40cf803, 0x3c80d704,
+ 0x3fc80fc8, 0x03be40cc, 0x8033e007, 0xf803fe00, 0xfc803b20, 0x0fc003fe,
+ 0x00ff803f, 0xe00ff903, 0xfe00ff80, 0x3fe00ff8, 0x03fe00ff, 0x803fe00f,
+ 0xf2937084, 0x70000000, 0x00000000, 0xc010ee10, 0xb740a2a0, 0x0b9822ff,
+ 0x40bfc023, 0xd00ab848, 0x1ca0cf90, 0xa3f00e98, 0x028c0848, 0x803ee00e,
+ 0xb812ee04, 0xb8802e60, 0x0b8902ee, 0x00bb802e, 0xe00bb202, 0xee00bb80,
+ 0x2ee00bb8, 0x02ee00bb, 0x822ee00b, 0xbc023004, 0x30000000, 0x00000000,
+ 0xc805cc00, 0xb3602840, 0x0b10028c, 0x04b34008, 0xd8083012, 0x8cc1b300,
+ 0x24d10b80, 0x020c8290, 0x0028c00b, 0x3002cc00, 0xb0002c00, 0x0b0002cc,
+ 0x00b3002c, 0xc00b3002, 0xcc00b300, 0x2cc00b30, 0x02cc00b3, 0x002cc00b,
+ 0x30027200, 0x20000000, 0x00000000, 0xc015ac01, 0xb3002a40, 0x1bb822ec,
+ 0x00bb002a, 0xc00ab000, 0xac00bb00, 0xaac00a90, 0x0aac0088, 0x802ec08a,
+ 0xb022ec00, 0xba002ec0, 0x0bb642ec, 0x00bb002e, 0xc00bb002, 0xec00bb00,
+ 0x2ec00bb0, 0x02ec00bb, 0x002ec00b, 0xb0023004, 0x60000000, 0x00000000,
+ 0x0015e400, 0xfb003a00, 0x0f9003ec, 0x00fb003a, 0xc00c3003, 0xac00f300,
+ 0x36c00f24, 0x0b2c00c8, 0xc83ac00f, 0xb003ec00, 0xf8203e06, 0x0f8c02ec,
+ 0x00fb003e, 0xc00bb002, 0xec00fb00, 0x2ec00fb0, 0x03ec00fb, 0x003ec04f,
+ 0xb0135040, 0x70000000, 0x00000000, 0xa001bd00, 0xff0037c1, 0x0fd003fc,
+ 0x00ff0037, 0xc007f003, 0x7c088f00, 0x37c00ff4, 0x83fc00fc, 0x0037c00f,
+ 0xf003fc00, 0xff403f60, 0x0db801fc, 0x00ff003f, 0xc00ff003, 0xfc00ff00,
+ 0x3fc00ff0, 0x03fc00ff, 0x003fc10f, 0x7003e804, 0x60000000, 0x00000000,
+ 0xd410a400, 0xdb00b280, 0x0fb003ec, 0x10d33038, 0xc00db003, 0xcc10cb00,
+ 0x3ac20fa4, 0x07ac00e8, 0x403ec08f, 0xb002ec44, 0xf9043e90, 0x0f80032c,
+ 0x00fb003e, 0xc00fb003, 0xec00fb00, 0x3ec00fb0, 0x03ec00fb, 0x003ec00f,
+ 0xb003f404, 0x20000000, 0x00000000, 0xc8052c00, 0xbf0022f0, 0x03ba02fc,
+ 0x60bf0563, 0xc008bd82, 0xfc088fd0, 0x23c20bb4, 0x036c0081, 0x002ec00b,
+ 0xb002ec00, 0xbb003ac0, 0x0bb0022c, 0x00bb002e, 0xc00bb882, 0xec00bb00,
+ 0x2ec00bb0, 0x02ec00bb, 0x002ec00b, 0xf002f200, 0x40000000, 0x00000000,
+ 0xe0054410, 0xb3000416, 0x0b10024d, 0x00b38020, 0xc0093842, 0xcc00a3c0,
+ 0x28d00934, 0x222c00a0, 0x082cc00b, 0x3002cc00, 0xb0002c40, 0x0b00020c,
+ 0x00b3002c, 0xc00b3042, 0xcc00b300, 0x2cc00b30, 0x02cc00b3, 0x002cc00b,
+ 0x3002f200, 0x10000000, 0x00000000, 0xf0011600, 0xb78125a0, 0x0b7912de,
+ 0x08b78020, 0xe0087802, 0xde02a788, 0x21e00bf9, 0xc65e0084, 0x802de00b,
+ 0x7802de00, 0xb5802de0, 0x0b48021e, 0x00b7802d, 0xe00b7802, 0xde00b780,
+ 0x2de00b78, 0x02de00b7, 0x802de00b, 0x7802f804, 0x10000000, 0x00000000,
+ 0x48080c40, 0xf300b440, 0x0f1003cc, 0x00d300a8, 0xc00d3003, 0xcc00e321,
+ 0x38c48f31, 0x268c01e0, 0x023cc44f, 0x3107cc00, 0xf3003c40, 0x0f300b0c,
+ 0x10f3003c, 0xc00f3003, 0xcc00f300, 0x3cc00f30, 0x03cc00f3, 0x003cc00f,
+ 0x3003d202, 0x10000000, 0x00000000, 0x400dbc10, 0xff103b40, 0x0ff013fc,
+ 0x00f7023f, 0xc407f003, 0xfc00cf40, 0x3fc41f71, 0x03fc00fe, 0x003fc00f,
+ 0xf003fc01, 0xff003bc0, 0x0ff003fc, 0x00ff003f, 0xc00ff003, 0xfc00ff00,
+ 0x3fc00ff0, 0x03fc00ff, 0x003fc00f, 0xf003d004, 0x60000000, 0x00000000,
+ 0xa805e400, 0xbb103200, 0x0bb8032c, 0x80eb4816, 0xd50d3003, 0x2cc0db30,
+ 0x3ec00fb0, 0x036c04f8, 0x023ec00f, 0xb003ec00, 0xfa003ec0, 0x0fb0032c,
+ 0x00fb003e, 0xc00fb003, 0xec00fb00, 0x3ec00fb0, 0x03ec00fb, 0x003ec00f,
+ 0xb003c204, 0x20000000, 0x00000000, 0xc8119400, 0xb73021c0, 0x0b70035d,
+ 0x40876423, 0xc40a700a, 0x1c40d700, 0x21d40b70, 0x021c01b6, 0x006dc00f,
+ 0x7002dc00, 0xb7003dc0, 0x0b30021c, 0x00b7002d, 0xc10b7002, 0xdc00b700,
+ 0x2dc00b70, 0x02dc00b7, 0x002dc00b, 0x7002f004, 0x20000000, 0x00000000,
+ 0x80009631, 0xa3a121a0, 0x0bf8021e, 0x80a38025, 0xe88a7802, 0x0e80a7a0,
+ 0x29e00afc, 0x021e00a5, 0x802de00b, 0x7802de00, 0xb7802df0, 0x1b780a5e,
+ 0x00b7802d, 0xe00b7802, 0xde00b780, 0x2de00b78, 0x02de00b7, 0x802de00b,
+ 0x7902c800, 0x20000000, 0x00000000, 0x4814ce08, 0xb305a0d2, 0x0b30024c,
+ 0x08830020, 0xc00a3002, 0x6c01b300, 0x24c10b38, 0x220c01b3, 0x802cc10a,
+ 0x3002cc00, 0xb3602cc0, 0x0b3d024c, 0x00b3002c, 0xc00b3002, 0xcc00b300,
+ 0x2cc00b30, 0x02cc00b3, 0x002cc00b, 0x3002da04, 0x20000000, 0x00000000,
+ 0xe8152804, 0xfa04b388, 0x8fa20328, 0x00aa0036, 0x808ea003, 0x2800ea00,
+ 0x3e800f68, 0x0b6800e6, 0x603e800b, 0xa003e800, 0xfe483fa0, 0x0fe00168,
+ 0x00fa002e, 0x800ba003, 0xe800ba00, 0x3e800fa0, 0x03e800fa, 0x003e800f,
+ 0xa003fa04, 0x70000000, 0x00000000, 0x4800e000, 0xf0003e00, 0x0f8003c1,
+ 0x00f8043c, 0x010e8023, 0xa0009804, 0x3a000f84, 0x23a00078, 0x493e000f,
+ 0x8003e000, 0xf8003a00, 0x0f8203a0, 0x00f8003e, 0x000f8003, 0xe000f800,
+ 0x3e000f80, 0x03e000f8, 0x003e000f, 0x8003d200, 0x60000000, 0x00000000,
+ 0x0810e400, 0xf9003240, 0x0e9c03e4, 0x80e9803e, 0x409e9401, 0xa400e104,
+ 0x38504c90, 0x03e400f9, 0x8032400f, 0x9003e600, 0xf9003e40, 0x0f100324,
+ 0x00f9003e, 0x400f9803, 0xe400f900, 0x3e400f90, 0x03e400f9, 0x003e400f,
+ 0x9003c204, 0x20000000, 0x00000000, 0x80046400, 0xb900a060, 0x089000e4,
+ 0x04818022, 0x40181802, 0xa4018910, 0x26500d94, 0x822400f9, 0x002a400f,
+ 0x9002e400, 0xb9002e40, 0x0b900224, 0x04b9012e, 0x400e9912, 0xe400b900,
+ 0x2e400b90, 0x02e400b9, 0x002e400b, 0x9002e000, 0x10000000, 0x00000000,
+ 0x18052400, 0xb900aa4a, 0x8a9002a4, 0x00a9102e, 0x401a9012, 0xa419a900,
+ 0x6a5008b0, 0x02a410b9, 0x1022400b, 0x9002e440, 0xb9002e40, 0x0b900624,
+ 0x00b9002e, 0x400b9002, 0xe400b900, 0x2e400b90, 0x02e400b9, 0x002e400b,
+ 0x9002ce00, 0x40000000, 0x00000000, 0x08040400, 0xb110284a, 0x081012c4,
+ 0x08810020, 0x50081022, 0x85088100, 0x60408910, 0x460500b3, 0x0028401b,
+ 0x1000c408, 0xb1002c40, 0x0b100604, 0x00b1002c, 0x400b1102, 0xc400b100,
+ 0x2c400b10, 0x02c400b1, 0x002c400b, 0x1002ca05, 0x00000000, 0x00000000,
+ 0xb80d6000, 0xf8683a08, 0x0e8003a8, 0x11a800be, 0x000a8003, 0xa000a800,
+ 0x3a000c80, 0x33e010f8, 0x0032000f, 0x8003e000, 0xb8013e00, 0x4f828b20,
+ 0x00f8053e, 0x001f8403, 0xe001f800, 0x3e000f80, 0x03e000f8, 0x003e000f,
+ 0x8283ce03, 0x50000000, 0x00000000, 0x981df408, 0xf920b740, 0x0f5001c5,
+ 0x01f9413e, 0x500f9003, 0xe500f141, 0x3e500f50, 0x03e400ed, 0x003e401e,
+ 0x9003e400, 0xdf003f40, 0x0fd003e4, 0x00f9003e, 0x400e9203, 0xe400f900,
+ 0x3e400f90, 0x03e400f9, 0x003e400f, 0x9003e604, 0x70000000, 0x00000000,
+ 0x9805e400, 0xf9003340, 0x0cd003b4, 0x00d50032, 0x480e5003, 0x64c0cd00,
+ 0xf3404e50, 0x436400f5, 0x0036400f, 0x9003f400, 0xf9003e40, 0x0b928324,
+ 0x00e9003e, 0x400fd153, 0xe400b900, 0x3e400f90, 0x03e400f9, 0x003e400f,
+ 0x9283c600, 0x70000000, 0x00000000, 0x3810e000, 0xb800a280, 0x88800020,
+ 0x02881016, 0x0a088002, 0xa0d0e840, 0x3e000880, 0x0280a0ba, 0x0022000b,
+ 0x8042e000, 0xb8002e00, 0x0b800220, 0x00b8002e, 0x000b8002, 0xe000b800,
+ 0x2e000b80, 0x02e000b8, 0x002e000b, 0x8002ce06, 0x20000000, 0x00000000,
+ 0x4805c400, 0xb1012c40, 0x08100284, 0x40810020, 0x4c0b1002, 0x44889114,
+ 0x28440b90, 0x020488b9, 0x0024410b, 0x1002c400, 0xb1002c40, 0x0b100604,
+ 0x01a1002c, 0x400b1002, 0xc400b100, 0x2c400b10, 0x02c400b1, 0x002c400b,
+ 0x1002d201, 0x20000000, 0x00000000, 0x1811a400, 0xb9002e40, 0x08911224,
+ 0x10890024, 0x40089002, 0x8400a900, 0x2e400990, 0x02a400bb, 0x0022400b,
+ 0x9002e400, 0xb9002e40, 0x0b900624, 0x00b9002e, 0x400b9012, 0xe400b900,
+ 0x2e400b90, 0x02e400b9, 0x002e400b, 0x9002e600, 0x20000000, 0x00000000,
+ 0xa015e440, 0xf9003e60, 0x0c9813a4, 0x00c90032, 0x404f1023, 0x6400d102,
+ 0x0a400b10, 0x072400f1, 0x0036400b, 0x9003e404, 0xf9c03e44, 0x0f920324,
+ 0x00e9003e, 0x400b9003, 0xe400b900, 0x2e400f90, 0x02e400f9, 0x003e400f,
+ 0x9003e804, 0x70000000, 0x00000000, 0xe801a600, 0xf1003248, 0x2f9003c4,
+ 0x00b9003e, 0x400f9003, 0xe400e908, 0xb6420e90, 0x27a400f9, 0x103e400f,
+ 0x9003e400, 0xf9c43e40, 0x0f1c0be4, 0x00f9003e, 0x400f9003, 0xe400f900,
+ 0x3e401f90, 0x03e400f9, 0x003e400f, 0x9003f200, 0x60000000, 0x00000000,
+ 0x2810a000, 0xf8023610, 0x0f8103e0, 0x00d0203a, 0x000c8003, 0x2000e800,
+ 0x34014e80, 0x432000d8, 0x2032000f, 0x8003e000, 0xf8403e00, 0x0f840320,
+ 0x00e8003e, 0x000f8003, 0xe0003800, 0x3e000f80, 0x03e000f8, 0x003e000f,
+ 0x8003c204, 0x20000000, 0x00000000, 0x28052804, 0xba002d84, 0x0b2002fa,
+ 0x00de40a2, 0x800de403, 0x6804cee0, 0x03a00ce4, 0x8228008e, 0x482a800b,
+ 0xa003aa20, 0xba002e80, 0x0ba02228, 0x00ba002e, 0x800ba002, 0xe800ba00,
+ 0x2e804ba0, 0x03a800ba, 0x002e800b, 0xa002ca00, 0x40000000, 0x00000000,
+ 0x28054c00, 0xb3002c60, 0x8b380284, 0x21831068, 0xc00a3702, 0x0c00a3c0,
+ 0x28f00a3c, 0x820c0093, 0x0028c00b, 0x30028c00, 0xb3002cc0, 0x0b30024c,
+ 0x00b3002c, 0xc00b3102, 0xcc00b300, 0x2cc00b30, 0x028c00b3, 0x002cc00b,
+ 0x3002ca00, 0x10000000, 0x00000000, 0xa0011c00, 0xb7302dd0, 0x0b7006d4,
+ 0x20970124, 0xc8097006, 0x4c409700, 0x294209d0, 0x021e0087, 0x0029c00b,
+ 0x70069c00, 0xb7002dc0, 0x0b70025c, 0x00b7002d, 0xc00b7002, 0xdc00b700,
+ 0x2dc00b70, 0x029c00b7, 0x002dc00b, 0x7002e004, 0x10000000, 0x00000000,
+ 0xa8081e00, 0xb7b02d20, 0x0b78039e, 0x00878639, 0xea0e7803, 0x1e20e780,
+ 0x28a04e78, 0x0b1e20d7, 0x8039e00f, 0x78039600, 0xf7803de0, 0x0f380b5e,
+ 0x04f7802d, 0xe00f7803, 0xde00f780, 0x3de00f78, 0x039e00f7, 0x803de00f,
+ 0x7803e202, 0x10000000, 0x00000000, 0x081dac04, 0xfb213e80, 0x0fb003c8,
+ 0x08fb0033, 0xcc4f9003, 0xed80e100, 0xb2c00e90, 0x03ec80fb, 0x003ec00f,
+ 0xb003a400, 0xfb003ec0, 0x0fb003ac, 0x00fb003e, 0xc00fb003, 0xec10fb00,
+ 0x3ec00fb0, 0x03ac00fb, 0x003ec00f, 0xb003c204, 0x60000000, 0x00000000,
+ 0x4005fe00, 0xff903364, 0x0af903f2, 0x00df9037, 0xe00cf803, 0x3e00ef80,
+ 0x33e04c58, 0x133e20d7, 0x803be40f, 0xf202de40, 0xd78031e0, 0x0cf8033e,
+ 0x00ff803f, 0xe00ff903, 0xfe00ff80, 0x3fe00ff8, 0x03fe00ff, 0x803fe00f,
+ 0xf803c000, 0x20000000, 0x00000000, 0xa8119c04, 0xbf042184, 0x087002dc,
+ 0x80853037, 0xc00a7202, 0x3c00e700, 0x35c10840, 0x03bc0287, 0x0035c01b,
+ 0x70039400, 0x870035c4, 0x0a71835c, 0x00b7102d, 0xc00b7002, 0xdc00b700,
+ 0x2dc00b70, 0x02dc00b7, 0x002dc00b, 0x7002ea06, 0x20000000, 0x00000000,
+ 0x10009c00, 0xb70120c6, 0x1a5012d8, 0x00870021, 0xc0097002, 0x1c009710,
+ 0x21c009d0, 0x025c0087, 0x0829c10b, 0x7102d410, 0x9f0023c0, 0x0830021c,
+ 0x00b7002d, 0xc00b5006, 0xdc00b700, 0x2dc00b70, 0x02dc00b7, 0x002dc00b,
+ 0x7002c000, 0x20000000, 0x00000000, 0x6010ce00, 0xbb046030, 0x081802c0,
+ 0x00810064, 0xc00b1002, 0x0c00a100, 0x04010904, 0x028c0083, 0x0820c00b,
+ 0x30028400, 0x832004e4, 0x0a34024c, 0x04b3002c, 0xc00b9002, 0xcc003300,
+ 0x2cc00b30, 0x02cc00b3, 0x002cc00b, 0x3002c800, 0x20000000, 0x00000000,
+ 0x2015ae80, 0xbf0032e0, 0x0eb883ec, 0x004b0023, 0xc00db00b, 0x3c00bb02,
+ 0x30402910, 0x0b7c00cb, 0x002ac00b, 0xb003ec00, 0xdb4832d0, 0x0cb4032c,
+ 0x00fb003e, 0xc00bb003, 0xec08fb00, 0x3ec00fb0, 0x02ec00bb, 0x003ec00f,
+ 0xb003ea04, 0x70000000, 0x00000000, 0x8400ec00, 0xfb007e48, 0x0f9003cc,
+ 0x02ea003f, 0xc00eb003, 0xcc00f340, 0x3e400e90, 0x13ac00eb, 0x013ec00f,
+ 0xb003ec00, 0xfb023ec8, 0x0fb003ec, 0x00fb003e, 0xc00f9003, 0xec00fb00,
+ 0x3ec00fb0, 0x03ec00fb, 0x003ec00f, 0xb003e000, 0x60000000, 0x00000000,
+ 0x8010fc00, 0xcf007100, 0x0dfa13e4, 0x10c90039, 0xc00cf003, 0x3c00df00,
+ 0x36000ec0, 0xa73c00fd, 0x0033c00f, 0xf003f400, 0xff0033c0, 0x0cf083fc,
+ 0x00ff003f, 0xc00ff003, 0x3c00ff00, 0x3fc00ff0, 0x03fc00ff, 0x003fc00f,
+ 0xf013c844, 0x20000000, 0x00000000, 0x80044c00, 0x8b0036a1, 0x889012e2,
+ 0x00a0f022, 0xc00a1c1b, 0x6c00a9b0, 0x2260888c, 0x022c00b1, 0xc03ac00b,
+ 0xb0026400, 0x930034c0, 0x0db002ec, 0x00bb002e, 0xc00b9903, 0x6c00bb00,
+ 0x2ec00bb0, 0x02ec00bb, 0x002ec00b, 0xb002e800, 0x10000000, 0x00000000,
+ 0x80052c00, 0x8b0022e0, 0x09b002a2, 0x008b002e, 0xc0089c02, 0x2c008800,
+ 0x22600a9c, 0x02ac00bb, 0x8022c00b, 0xb002ec00, 0xbb0022c0, 0x08b002ec,
+ 0x01bb002e, 0xc00bb002, 0x2c00bb00, 0x2ec00bb0, 0x02ec00bb, 0x002ec00b,
+ 0xb002e000, 0x40000000, 0x00000000, 0x08042c00, 0x8305a001, 0x0a1002cc,
+ 0x01a10028, 0xc01a0002, 0x0c00a100, 0x20400880, 0x020c0192, 0x002cc00b,
+ 0x30024400, 0x9b0026c0, 0x093002cc, 0x00b3002c, 0xc00b1042, 0x4c00b300,
+ 0x2cc00b30, 0x02cc00b3, 0x002cc00b, 0x3002c205, 0x00000000, 0x00000000,
+ 0x800d6c00, 0xcf0022c0, 0x0d9003a8, 0x08c9003f, 0xc00c9002, 0x3c01d800,
+ 0xb6400e80, 0x0a3c00bb, 0x0032c00f, 0xb003e400, 0xfb0022c0, 0x0cb003ec,
+ 0x00fb003e, 0xc00f900b, 0x2c00fb00, 0x3ec00fb0, 0x03ec00fb, 0x003ec00f,
+ 0xb003c023, 0x50000000, 0x00000000, 0xa01dfc00, 0xff063f00, 0x8dd001f0,
+ 0x00fd0037, 0xc08f4003, 0xfc047500, 0x3f000fc0, 0x03fc00ff, 0x003bc01f,
+ 0xf0037400, 0xff003fc0, 0x0ff003fc, 0x00ff003f, 0xc00fd003, 0xfc00ff00,
+ 0x3fc00ff0, 0x03fc00ff, 0x003fc08f, 0xf003e804, 0x70000000, 0x00000000,
+ 0xc085fc80, 0xdf903fe0, 0x0df003be, 0x00ff803f, 0xc20df803, 0xfe10fc80,
+ 0x3d600ec8, 0x22f200ff, 0x913be08e, 0x48031600, 0xdc803360, 0x89f683f3,
+ 0x0044803f, 0xe00cf803, 0xfe00ff80, 0x37e00ff2, 0x83fe00fd, 0x803d200f,
+ 0xf283f000, 0x70000000, 0x00000000, 0x80188d48, 0x8b202ee0, 0x0bfc022e,
+ 0x00bb802f, 0xd808b842, 0xee008880, 0x0e080088, 0x02e2048b, 0x002ee011,
+ 0x8822a600, 0xb880284a, 0x08f602e0, 0x84a88026, 0xe02ab802, 0xee00bb80,
+ 0x2ee00bbc, 0x02ec80b8, 0x822e2009, 0xbc02e004, 0x30000000, 0x00000000,
+ 0x08048c08, 0x93002cc0, 0x4b34128c, 0x0033002c, 0xc24b3012, 0xcc089002,
+ 0x2e420900, 0x02c000a3, 0x202cc09a, 0x00108400, 0xb0002208, 0x0b3012c0,
+ 0x0080002c, 0xc0183002, 0xcc00b300, 0x2cc00b30, 0x02cc24b1, 0x002c000b,
+ 0x3002c201, 0x70000000, 0x00000000, 0xc0058c00, 0x8b002ec0, 0x0bb002ac,
+ 0x00bb002e, 0xc000b002, 0xec008980, 0x0ee02ab0, 0x066c008b, 0x002ec04b,
+ 0x9444a401, 0x9b006ae0, 0x2ab002e8, 0x00a98026, 0xc00ab002, 0xec00bb00,
+ 0x2ec00bb0, 0x02ec00bb, 0x202e214b, 0xb002f004, 0x60000000, 0x00000000,
+ 0x4115ec00, 0xdb043ec0, 0x0fb003ac, 0x00bb003e, 0xc00fb003, 0xec00f880,
+ 0x3e600d8c, 0x81e108fb, 0x003ac00e, 0x04038640, 0xf8a03260, 0x8fb002e2,
+ 0x44c8802c, 0xc00cb003, 0xec00fb00, 0x36c00bb0, 0x03ec00f9, 0x483ea00f,
+ 0xb003d004, 0x70000000, 0x00000000, 0xa001bc00, 0xff003fc0, 0x0f70437c,
+ 0x00ff007d, 0xc00df003, 0xfc007c00, 0x3f808ddc, 0x23fa50df, 0x001fc20d,
+ 0xfc03fc00, 0xec403fc0, 0x05b003f4, 0x00fc002f, 0xc00df003, 0xfc00ff00,
+ 0x3fc00fb0, 0x03fc00fd, 0x803f800d, 0xf003f800, 0x60000000, 0x00000000,
+ 0xc010ac08, 0xcb003ac0, 0x0ff003ac, 0x00fb003f, 0xc00cb203, 0xec20f808,
+ 0x3e400eaa, 0x03a504fb, 0x043ec00f, 0xa003ac20, 0xdb083242, 0x0df0032c,
+ 0x00c80232, 0xc00fb003, 0xec00fb00, 0x3ec00fb0, 0x032c00cb, 0x003e840e,
+ 0xb003f004, 0x20000000, 0x00000000, 0xc8053d40, 0x8b022ec0, 0x0bf0002c,
+ 0x00bb006f, 0xc008b402, 0x0d20b90c, 0x0cc009b0, 0x03ce84bb, 0x002ef00f,
+ 0xb8022e00, 0x834034d3, 0x0af0022c, 0x00d9e036, 0xe20bb002, 0xec00bb00,
+ 0x2ec00bf0, 0x122c004b, 0x802e9008, 0xf002f200, 0x40000000, 0x00000000,
+ 0xc0044e00, 0x830028c0, 0x0b30428c, 0x04b3012c, 0xc08a3002, 0x8f009081,
+ 0x24400304, 0x02c38093, 0x0228d003, 0x00824402, 0xa0902460, 0x08300220,
+ 0x08802020, 0xe00b3002, 0xcc00b300, 0x2cc00b30, 0x020c00b1, 0x902c280a,
+ 0x3002f800, 0x50000000, 0x00000000, 0x60005e60, 0x87802de0, 0x0b38021e,
+ 0x01b7842d, 0xe00a7882, 0x1e00b490, 0x2f2019e8, 0x06d60037, 0x822de40a,
+ 0xe8925e09, 0x8f802568, 0x0a780a3e, 0x409c8025, 0xe00b7802, 0xde00b780,
+ 0x6de00b78, 0x021e0aa7, 0xc02f6008, 0x7802d800, 0x40000000, 0x00000000,
+ 0x48084c02, 0xc30138c0, 0x0f30038c, 0x00f3002e, 0xc00e3003, 0xccc09010,
+ 0x3cc08e10, 0x02c900f3, 0x003cc20b, 0x3102cc20, 0xc0103480, 0x9c300304,
+ 0x40c00030, 0xc00b3003, 0xcc00f300, 0x3cc00f30, 0x032c00f1, 0x003c000e,
+ 0x3003d202, 0x00000000, 0x00000000, 0x401dbc14, 0xff003fc0, 0x0ff083fc,
+ 0x00ff003f, 0xc00d7017, 0xfc40fd10, 0x3fc00e71, 0x023c00ff, 0x003fc01f,
+ 0xf0133c48, 0xe7007fc8, 0x0ef183dc, 0x40fd103f, 0xc00ff103, 0xfc40ff00,
+ 0x3fc40ff0, 0x01fc08df, 0x003fc00f, 0xf003d006, 0x60000000, 0x00000000,
+ 0x0804ac00, 0xdb003ac0, 0x0ff403ec, 0x00fb003f, 0xca01b003, 0xec00f800,
+ 0x32c00eb0, 0x07ac00cb, 0x003ec10d, 0x9003c400, 0xdb001cc0, 0x0cb0032a,
+ 0x00c88032, 0xe00cb003, 0xec00fb00, 0x3ec00fb0, 0x03ec00f3, 0x0032c00f,
+ 0xb003ea00, 0x70000000, 0x00000000, 0xc0189c80, 0x87002dc0, 0x0b7302dc,
+ 0x00b7002d, 0xd8087002, 0xdc10b401, 0x21800870, 0x039c00e7, 0x006dc008,
+ 0x7002dc00, 0x87002dc0, 0x0f73029c, 0x02840021, 0xc00d7002, 0xdc00b700,
+ 0x2dc00b74, 0x02dc00b7, 0x0029c00b, 0x7202f204, 0x60000000, 0x00000000,
+ 0x20009e43, 0x97806de0, 0x0b7802de, 0x00b7802d, 0xe0097802, 0xde08bc00,
+ 0x25e00a78, 0x82de04b7, 0x8229e00b, 0x7c029e03, 0xa7806fe0, 0x687a061f,
+ 0x009cc021, 0xe0087802, 0xde00b780, 0x2de00b78, 0x02de00bf, 0x8021e00b,
+ 0x7902f000, 0x20000000, 0x00000000, 0x68008c08, 0x83026cc0, 0x0b3002cc,
+ 0x00b3002c, 0xc0883002, 0xcc00b381, 0x24e04834, 0x028f80ab, 0x016cc00a,
+ 0x3002cc00, 0xb3442cf0, 0x0b30028c, 0x00938060, 0xc0093002, 0xcc00b300,
+ 0x2cc00b30, 0x02cc00b3, 0x8068e40b, 0x3002d204, 0x30000000, 0x00000000,
+ 0xe815e800, 0xda003a80, 0x0fa003e8, 0x00fa002e, 0x800da003, 0xe800f608,
+ 0x37a30e68, 0x03d980fa, 0x0038800f, 0xec03ea80, 0xee603db2, 0x0ca01b3a,
+ 0x00de00b2, 0x800ca003, 0xe800fa00, 0x3e800fa0, 0x03e800fe, 0x9033900f,
+ 0xa003fa04, 0x60000000, 0x00000000, 0x4801a000, 0xf8003e00, 0x0f8003e0,
+ 0x00f8003e, 0x000f8002, 0xe000f802, 0x3a000f80, 0x93a000f8, 0x001e100c,
+ 0x8003e100, 0xc80a3e02, 0x0f000360, 0x00e8403e, 0x000f8007, 0xe000f800,
+ 0x3e000f80, 0x03e000f8, 0x103e120f, 0x8003d200, 0x30000000, 0x00000000,
+ 0x0810a442, 0xc9003240, 0x0f9003e4, 0x00f9003e, 0x401c9103, 0xe604f980,
+ 0x36400c9c, 0x43a640c9, 0x003a400c, 0x9983e600, 0xc9803a68, 0x6c900324,
+ 0x24f9803e, 0x440f9013, 0xe400f900, 0x3e408f90, 0x03e400f9, 0x0032402c,
+ 0x9003c204, 0x30000000, 0x00000000, 0x80046482, 0x89003240, 0x0b9002e4,
+ 0x01b9002e, 0x400a9202, 0xe701b960, 0x22401f9c, 0x112700d9, 0x0122680d,
+ 0x90824600, 0xd9813a40, 0x0d900364, 0x00b9d02e, 0x400b9002, 0xe400b900,
+ 0x2e400b90, 0x02e400b1, 0x20206008, 0x9002e000, 0x10000000, 0x00000000,
+ 0x38050400, 0x81002240, 0x0b9002e4, 0x10b9002c, 0x40089002, 0xe485b920,
+ 0x04400990, 0x02a400a9, 0x02224508, 0x9046e441, 0x89202e40, 0x2890022c,
+ 0x00b9002e, 0x400b9002, 0xe400b900, 0x2e400b90, 0x02e400b9, 0x80a2c808,
+ 0x9002c600, 0x40000000, 0x00000000, 0x28140440, 0x81102040, 0x091002c4,
+ 0x00b1002c, 0x500a1002, 0xcc00b100, 0x20500a10, 0x02241891, 0x40604019,
+ 0x10024c00, 0x91002ac4, 0x09110244, 0x40b1002c, 0x400b1002, 0xc400b100,
+ 0x2c400b10, 0x02c440b9, 0x00204008, 0x1002c201, 0x00000000, 0x00000000,
+ 0x380d41a0, 0xc840b200, 0x0f8003e0, 0x00b8002c, 0x00088003, 0xe000b800,
+ 0x340009a0, 0x02a800a8, 0x0022008c, 0x8053e001, 0xc8003a10, 0x2c040301,
+ 0x00fa003e, 0x000f8003, 0xe000f800, 0x3e000f82, 0x83e100f8, 0x0032800c,
+ 0x8283ce03, 0x50000000, 0x00000000, 0x9815e480, 0xf9203a40, 0x0f9403e4,
+ 0x00f9003e, 0x500f9003, 0xe400f500, 0x37404ff0, 0x039c00f9, 0x00b4400f,
+ 0xd0137410, 0x7f043b49, 0x0f9613f4, 0x80f5003c, 0x400f9003, 0xe400f901,
+ 0x3e400790, 0x03e480fd, 0x003f400f, 0x9003e606, 0x70000000, 0x00000000,
+ 0x1815e400, 0xc9003240, 0x0f9203e4, 0x18f9003e, 0x440cd003, 0xf404bd04,
+ 0x3a400fd0, 0x031400f9, 0x003f400b, 0xd0031400, 0xfd003f40, 0x0c920324,
+ 0x00fd003d, 0x400c9003, 0xe400f900, 0x3e400f90, 0x03e400fd, 0x003f400f,
+ 0x9203c600, 0x70000000, 0x00000000, 0x3810c000, 0x80002200, 0x0b8102e0,
+ 0x00b8002e, 0x040d8002, 0xe000b800, 0x2e020880, 0x02a000b0, 0x282e010b,
+ 0x80032008, 0xb8022e00, 0x088002a0, 0x00b8002e, 0x00088002, 0xe000b800,
+ 0x2e004b80, 0x02e020ba, 0x002e000b, 0x8002ce00, 0x30000000, 0x00000000,
+ 0x48008400, 0xa1002040, 0x0b1002c4, 0x00b1002c, 0x40081002, 0xc400b102,
+ 0x2a480a10, 0x060400b1, 0x242c400b, 0x90024400, 0xb1006c40, 0x0b110284,
+ 0x00b1812c, 0xc0381002, 0xc400b100, 0x2c400b10, 0x02c480b1, 0x002c400b,
+ 0x1102c205, 0x70000000, 0x00000000, 0x98108400, 0xa1002640, 0x0b9002e4,
+ 0x00b9002e, 0x40099002, 0xe40cb960, 0x2e400892, 0x02a400b9, 0x012e408b,
+ 0x96022400, 0xb9002c48, 0x0a9022a4, 0x21b9002e, 0x40089002, 0xe400b900,
+ 0x2e400b90, 0x02e400b9, 0x002e600b, 0x9002c604, 0x60000000, 0x00000000,
+ 0xa005e400, 0xe900b240, 0x0b9043e4, 0x00f9002e, 0x400c9023, 0xe400f900,
+ 0x3a4c4e1c, 0x222501f9, 0x003e408f, 0x980b6400, 0xf9503f58, 0x3e9027a5,
+ 0x00f9523e, 0x400c9003, 0xe400f900, 0x3e400f90, 0x03e400f9, 0xc03e600f,
+ 0x9003e804, 0x70000000, 0x00000000, 0xc811ac02, 0xd9003a40, 0x0f9003e4,
+ 0x00f9003e, 0x400f9003, 0xe400f984, 0x1e400a98, 0x23e458f9, 0x003e418f,
+ 0x9043e480, 0xf9003e42, 0x1d9003e7, 0x10f90036, 0x400f9003, 0xe400f900,
+ 0x3e400f90, 0x03e400f9, 0x283e400f, 0x9003ea00, 0x60000000, 0x00000000,
+ 0x0810a040, 0xc8003600, 0x0e8003e0, 0x00f8003c, 0x000d8003, 0xe080f800,
+ 0x3e100f87, 0x43e144f8, 0x00ba040f, 0x80c3a000, 0xd8003e14, 0x0c800320,
+ 0x08f8003e, 0x000e8003, 0xe000f800, 0x3e000f80, 0x03e000f8, 0x003a000f,
+ 0x8003ca04, 0x20000000, 0x00000000, 0x28052800, 0x8a002a80, 0x0ba002e8,
+ 0x00ea002e, 0x8008ed02, 0xfa20be11, 0x2c800be0, 0x02f80c8a, 0x042b800b,
+ 0x68023914, 0xcea02fb0, 0x4aa01228, 0x04be882d, 0x8008a002, 0xe800ba00,
+ 0x2e800ba0, 0x02e804ee, 0xa023840f, 0xa002ca00, 0x40000000, 0x00000000,
+ 0x28044f22, 0x030020c0, 0x0b3002cc, 0x00a3006c, 0xc0083002, 0xce009340,
+ 0x2cc08b38, 0x02ce80a3, 0x0020e80b, 0x34068c22, 0x83802cd0, 0x08b0000c,
+ 0x00b3a02c, 0xd80b3002, 0xcc00b300, 0x2cc00b30, 0x06cc00a3, 0x0028d40b,
+ 0x3002ca00, 0x50000000, 0x00000000, 0x80105800, 0x972029c0, 0x0b7006dc,
+ 0x04a7022d, 0xc0285402, 0xdc04b604, 0x6dc00b70, 0x02fe0497, 0x822dc00b,
+ 0x74463e20, 0x84002f80, 0x0a33021c, 0x80b6012d, 0x40097002, 0xdc00b700,
+ 0x2dc04b70, 0x02dc80a7, 0x8021c00b, 0x7002e800, 0x40000000, 0x00000000,
+ 0x88085e00, 0xc7a031e0, 0x0f7803de, 0x00e7803c, 0xf40d5803, 0xde00f480,
+ 0x3de20b78, 0x03de01f7, 0xcc31e00f, 0x78039e10, 0x45803de0, 0x1c78131e,
+ 0xc1f5803d, 0x600b7803, 0xde00b780, 0x3de00f78, 0x53df00e7, 0x8039e00f,
+ 0x7803ea00, 0x00000000, 0x00000000, 0x0815a0a0, 0xeb403ac0, 0x0fb003ec,
+ 0x00eb003f, 0xc80f9003, 0xec007a00, 0x3fd00fb0, 0x23e800ef, 0x403ac00f,
+ 0x2003ec10, 0xa8003de4, 0x0bb28bec, 0x00fa003e, 0xc00eb003, 0xec00fb00,
+ 0x36c00fb0, 0x23ec00e0, 0x013ec00e, 0xb003c204, 0x60000000, 0x00000000,
+ 0x0004be00, 0xcfc833e0, 0x0ff8033e, 0x00ff803f, 0xe04cd803, 0xfe10ff80,
+ 0x3fe30cf9, 0x073e00ff, 0x802fe407, 0xf807fc04, 0xfd903f20, 0x0cf80bbe,
+ 0x28ce903f, 0xa00df803, 0xfe00ff80, 0x3fe00ff8, 0x03fe40fd, 0x803fe40f,
+ 0xf803c000, 0x70000000, 0x00000000, 0xa8189800, 0x8f0021c0, 0x0b71035c,
+ 0x00b7002d, 0xc00d4002, 0xdc10b600, 0x2fc00a40, 0x021da037, 0x102d400e,
+ 0x55439c20, 0xf4002fc1, 0x0a70031c, 0x0086002d, 0x080d7002, 0xdc00b700,
+ 0x3dc40b70, 0x02dc00b5, 0x422dd00f, 0x7002ea04, 0x60000000, 0x00000000,
+ 0x00009440, 0x870021c0, 0x0b30021c, 0x00b7002d, 0xc0085002, 0xd400b510,
+ 0x29c008f0, 0x461400b7, 0x0025808b, 0x700214c0, 0xb5006dc0, 0x093002fc,
+ 0x0085012d, 0x00187002, 0xdc00b700, 0x2dc00b71, 0x02dc10b5, 0x082d400b,
+ 0x7002c000, 0x20000000, 0x00000000, 0x20048000, 0x8b0020c0, 0x0b30024c,
+ 0x00b3002e, 0xc0090002, 0xc400b300, 0x6ef00a0d, 0xa20280bb, 0x002c000a,
+ 0x09068600, 0xb0482cc0, 0x8b30020d, 0x0082482c, 0x80093002, 0xcc00b300,
+ 0x2cc04b30, 0x02cc00b0, 0xc02c700a, 0x3002c804, 0x30000000, 0x00000000,
+ 0xa815ec00, 0x8f00b2c0, 0x0bb0032c, 0x00fb003f, 0xc00c9023, 0xec00f940,
+ 0x3bd208bc, 0x2a2d08ff, 0x0026c00f, 0xbc132c00, 0xf8483e60, 0x0df003fd,
+ 0x0289c03e, 0xc00cb003, 0xec00fb00, 0x3ec00fb0, 0x01fc00f9, 0x903ee20b,
+ 0xb003ea04, 0x60000000, 0x00000000, 0x8001a800, 0xfb003ec0, 0x0fb003ec,
+ 0x00fb003f, 0xc00f9003, 0xe504b910, 0x3fc00fb4, 0x03e500ff, 0x003e900f,
+ 0xb603a410, 0xe8013fdc, 0x0eb003ee, 0x00f9c03e, 0x400fb003, 0xec00fb00,
+ 0x3ac00fb0, 0x03ec00f9, 0x003e400f, 0xb003e000, 0x30000000, 0x00000000,
+ 0x21108400, 0xcf0033c0, 0x0f70033c, 0x00ff003e, 0xc00cc003, 0xfd00cc08,
+ 0x3fc24cc8, 0x03fc40df, 0x0037400f, 0xd003fc00, 0xbc0233e0, 0x0c70037c,
+ 0x20fdc03f, 0x400cf003, 0xfc00ff00, 0x3fc00ff0, 0x03fc04fd, 0x013fc28f,
+ 0x70030044, 0x30000000, 0x00000000, 0xa1046180, 0x8b0022c0, 0x0bb002ac,
+ 0x009b002e, 0xc00a8842, 0xc604aa81, 0x2ec10886, 0x02e000bb, 0x042a3c0b,
+ 0x8803a600, 0xf0c034f4, 0x08b0422c, 0x00b9402c, 0xe00db002, 0xec00bb00,
+ 0x2ec00bb0, 0x02ec00b8, 0xc22e504b, 0xb0022040, 0x10000000, 0x00000000,
+ 0x80052c80, 0x8b0022c0, 0x0bb0022c, 0x00bb002e, 0xc0089c02, 0xec2089c0,
+ 0x2ec008b2, 0x12e801bb, 0x0022c00b, 0xa202af00, 0xb88922c2, 0x12b0026c,
+ 0x00ba082e, 0x200ab002, 0xec00bb00, 0x2ec00bb0, 0x02ec00b8, 0x802ee00b,
+ 0xb002a000, 0x40000000, 0x00000000, 0x08140800, 0x830020c0, 0x0b30028c,
+ 0x04b3002c, 0xc10a0002, 0xc000a100, 0x2cc00800, 0x02c001b3, 0x00280109,
+ 0x00028401, 0xa80026c0, 0x3a30020c, 0x00b2000c, 0x004b3002, 0xcc00b300,
+ 0x2cc00b30, 0x02cc00b0, 0x002c000b, 0x30020201, 0x00000000, 0x00000000,
+ 0x000d6000, 0xcf00b2c0, 0x0fb0032c, 0x00fb003f, 0xc00c8003, 0xe000c901,
+ 0x2fc05880, 0x12e004df, 0x0132000f, 0x8003a000, 0xb80032c0, 0x0ef0037c,
+ 0x10f9003e, 0x000eb003, 0xec00fb00, 0x3ec00fb0, 0x03ec00f8, 0x003e400f,
+ 0xb00b0003, 0x50000000, 0x00000000, 0xa015f000, 0xff003fc0, 0x0ff003fc,
+ 0x00df003f, 0xc00fc003, 0xf400ff00, 0x3fc02f40, 0x03f000df, 0x003f000f,
+ 0xc003b404, 0xfc013fc0, 0x0df013dc, 0x00ff043d, 0x000df003, 0xfc00ff00,
+ 0x3fc00ff0, 0x03fc00fc, 0x023f401f, 0xf003e802, 0x70000000, 0x00000000,
+ 0xc015fcc2, 0xd7003500, 0x0cf8033c, 0x80ff903f, 0x200ff203, 0xfe00ff80,
+ 0x3f201f48, 0x03fe10f4, 0x8035202d, 0xc803fe00, 0xfc803320, 0x0cc12330,
+ 0x405c3433, 0xe008c103, 0x3400cf80, 0x3fe00ff8, 0x03fe00ff, 0x803fe00f,
+ 0xf803f000, 0x70000000, 0x00000000, 0x8018fc00, 0x8b843220, 0x88b202bf,
+ 0x009b202e, 0x204bfc02, 0xee10bb80, 0x0ea00b88, 0x02ee00b9, 0x8022a008,
+ 0x8802ae00, 0x39802a60, 0x02860201, 0xc0b85022, 0xc80a8102, 0x2500ab80,
+ 0x2ee00bb8, 0x02ee00bb, 0x802ee00b, 0xb802e004, 0x30000000, 0x00000000,
+ 0x0805ccc8, 0x83002000, 0x0830828c, 0x40b30028, 0x000b3402, 0xcc10b300,
+ 0x2c000b00, 0x008c00ab, 0x002e4008, 0xb002cc00, 0xb8002200, 0x08040a80,
+ 0x05b02028, 0xc2080002, 0x05a08300, 0x2cc00b30, 0x024c00b3, 0x002cc00b,
+ 0x3002c201, 0x70000000, 0x00000000, 0xc005ac01, 0x9b00a270, 0x0a300aac,
+ 0x00bb002e, 0x601bb042, 0xec00bb00, 0x2ec00b88, 0x02ec109b, 0x806af008,
+ 0xb80aac04, 0xb90b2ad8, 0x02a20229, 0x00ba0420, 0xc00ab000, 0x0400ab00,
+ 0x2ec00bb0, 0x02ec00bb, 0x002ec003, 0xb002f004, 0x60000000, 0x00000000,
+ 0x00006c08, 0xdb2410e0, 0x4cb003ac, 0x08fb001a, 0x300fb003, 0xec10fb00,
+ 0x3e800b88, 0x03ac10f9, 0x803e300d, 0x2c83ec00, 0xf2003030, 0x048c03a1,
+ 0x00f808a2, 0xc0008583, 0x2400cb04, 0x3ec00fb0, 0x03ec00fb, 0x003ec00f,
+ 0xb003d004, 0x70000000, 0x00000000, 0xe1909c00, 0xef203fc0, 0x2df0006c,
+ 0x009f003f, 0x000ff003, 0xfc00ff00, 0x2f004fc0, 0x23fc00fd, 0x0033802f,
+ 0xe003fc10, 0xbf403f40, 0x0f700bf4, 0x40f9903f, 0xc00f4003, 0xf440ff00,
+ 0x3fc00ff0, 0x03fc00ff, 0x003fc00f, 0xf003f800, 0x60000000, 0x00000000,
+ 0xc010ac00, 0xf3003a80, 0x0db0032c, 0x00cb0032, 0x400fb007, 0x2c00fb00,
+ 0x36c20d82, 0x13ac11fb, 0x0036408c, 0xb0032c41, 0xfa402280, 0x1d950b2c,
+ 0x00c30432, 0xc60cb603, 0x2c60cb00, 0x3ec00fb0, 0x03ec00fb, 0x003ec00d,
+ 0xb003f004, 0x20000000, 0x00000000, 0xca043c00, 0x8ba032d4, 0x08b00b3f,
+ 0x608b0022, 0x400bf003, 0x6c00bb00, 0x0e704d84, 0x036dc0b3, 0x003cc08d,
+ 0xbc036f40, 0xfb8036c0, 0x0db1436f, 0x40dbe022, 0xf00db882, 0x2f00db00,
+ 0x2ec00bb0, 0x02ec00bb, 0x002ec00b, 0xb002f200, 0x40000000, 0x00000000,
+ 0xe0014c00, 0x83002c90, 0x0930024d, 0x00830028, 0x080b3482, 0x0c009300,
+ 0x2c24080c, 0x028e0092, 0x1820e048, 0x3c820d00, 0xb3002040, 0x0b040240,
+ 0x40902020, 0xd00a0402, 0x8600a300, 0x2cc00b30, 0x02cc00b3, 0x0024c009,
+ 0x3002f800, 0x50000000, 0x00000000, 0x60011e40, 0x848221a4, 0x0878221e,
+ 0x00878029, 0x604b7882, 0x5e00b780, 0x2fe009c8, 0x021e00b7, 0x8029e209,
+ 0x78825e00, 0xaf8825e0, 0x4819025e, 0x08978001, 0xe00b3002, 0x9600b780,
+ 0x2de00b78, 0x02de00b7, 0x802de00b, 0x7802d800, 0x40000000, 0x00000000,
+ 0x48082c00, 0xc3200cc4, 0x0db1434c, 0x008b0028, 0x161f3002, 0x0c04b300,
+ 0x6c040804, 0x828c00b3, 0x0120c018, 0x30430c40, 0xb3107040, 0x0b350344,
+ 0x80d100b2, 0xc00e0103, 0xa400e300, 0x3cc00f30, 0x03cc00f3, 0x003cc00d,
+ 0x3003d202, 0x00000000, 0x00000000, 0x401dbd20, 0x2c006785, 0x0ff013fc,
+ 0x00ff10b7, 0x400f74a3, 0xfc41ff10, 0x1dc01fc0, 0x13fc00ff, 0x103fc40f,
+ 0x7003fc10, 0xf7043fc0, 0x0ff143fc, 0x02ff003f, 0xc00df213, 0x7c01df00,
+ 0x3fc00ff0, 0x03fc01ff, 0x003fc00f, 0xf003d006, 0x60000000, 0x00000000,
+ 0xa805ed00, 0xdb8032e0, 0x0db003ed, 0x20cb0032, 0x400fb823, 0x6c00fb00,
+ 0x3ac00e80, 0x032c00e3, 0x0034c01c, 0xb003ac00, 0xfb003ec0, 0x0ba00328,
+ 0x00ca0032, 0xe00cb00b, 0x2400cb00, 0x3ec00fb0, 0x03ec00fb, 0x003ec00f,
+ 0xb003ea04, 0x70000000, 0x00000000, 0xc8119c80, 0x870035c0, 0x087002dd,
+ 0x00df0029, 0x400b3002, 0x1c01b700, 0x39400b40, 0x02dc00b7, 0x0225c008,
+ 0x70029c00, 0xb7002dc0, 0x83700a1c, 0x008f002b, 0xc0283042, 0x14008700,
+ 0x2dc00b70, 0x02dc00b7, 0x002dc00b, 0x7002f204, 0x60000000, 0x00000000,
+ 0xc0409e94, 0x838024e0, 0x087802ce, 0x08978025, 0x600b7a06, 0x5e10b780,
+ 0x2de00b48, 0x021e04b7, 0x0123e049, 0xfc029e00, 0xb7802de2, 0x0b78320e,
+ 0x08978021, 0xe0087802, 0x0e208780, 0x2de00b78, 0x02de00b7, 0x802de00b,
+ 0x7802f000, 0x20000000, 0x00000000, 0x4814ec10, 0x83002494, 0x883002cc,
+ 0x00b30028, 0xd00b3002, 0x0c00b300, 0x28780336, 0x028c00b3, 0x4200c028,
+ 0x300a0c08, 0xb3902ce0, 0x0b30c20c, 0x02939028, 0xc0083082, 0x0c028300,
+ 0x2cc00b30, 0x02cc00b3, 0x002cc00b, 0x3002d200, 0x30000000, 0x00000000,
+ 0xe815a800, 0xce0837a0, 0x6ca023e8, 0x00da0037, 0xa00fa003, 0x6800fa00,
+ 0x3f900f68, 0x872800e6, 0x00358005, 0x68038804, 0xfe807fa0, 0x0bec033a,
+ 0x42de4032, 0x800ce002, 0x2a008a00, 0x3e800fa0, 0x03e800fa, 0x003e800f,
+ 0xa003fa00, 0x60000000, 0x00000000, 0x4800e002, 0xf8003e08, 0x0e8003e0,
+ 0x00d8003e, 0x040f8403, 0xe000b800, 0x3e050f80, 0x03e001f8, 0x483e010e,
+ 0x8003e100, 0xf8003e00, 0x0f8143c1, 0x40e8483e, 0x100f8503, 0xe104d800,
+ 0x3e000f80, 0x03e000f8, 0x003e000f, 0x8003d200, 0x30000000, 0x00000000,
+ 0x0810e400, 0xc9993e50, 0x0f900324, 0x00e90232, 0x460f9801, 0xe400f900,
+ 0x3e640e9a, 0x032600f9, 0x8532610e, 0x9803a400, 0xc9a03e40, 0x07911324,
+ 0x00c90032, 0x400f9003, 0x4480c900, 0x3e400f90, 0x03e400f9, 0x003e400f,
+ 0x9003c200, 0x30000000, 0x00000000, 0x80046400, 0x89202e70, 0x0b900204,
+ 0x00890236, 0x400b9802, 0xe400b902, 0x2e500b90, 0x032440b9, 0x0016600c,
+ 0x98822440, 0x89013e40, 0x0b9c0364, 0x40d9c036, 0x764b9c03, 0x65008900,
+ 0x2e400b90, 0x02e400b9, 0x002e400b, 0x9002e004, 0x10000000, 0x00000000,
+ 0x18042400, 0x99042e40, 0x0b100226, 0x00a10022, 0x400a9202, 0xe4009900,
+ 0x6ec21b94, 0x06640099, 0x1022480a, 0x9102a420, 0x89006e40, 0x0b108224,
+ 0x24812026, 0x400b1102, 0x24108900, 0x2e400b90, 0x02e400b9, 0x002e400b,
+ 0x9002c600, 0x40000000, 0x00000000, 0x08040500, 0x81002cca, 0x1b142204,
+ 0x00814024, 0x400b3002, 0xc400b105, 0x2c408b10, 0x0a0400bb, 0x01664009,
+ 0x90420401, 0x81002840, 0x0b110244, 0x409310a4, 0x440b3102, 0x4c428100,
+ 0x2c400b10, 0x02c400b1, 0x002c400b, 0x1002c201, 0x00000000, 0x00000000,
+ 0x38080000, 0xd8013e08, 0x8f800b28, 0x00e80022, 0x810f8002, 0xe0009800,
+ 0x3e000e80, 0x026000d8, 0x0022000a, 0x8012a002, 0xc8052e00, 0x1f068321,
+ 0xa0c86836, 0x100f86c7, 0x21a0c800, 0x3e000f80, 0x03e000f8, 0x003e000f,
+ 0x8003ce03, 0x50000000, 0x00000000, 0x9819e506, 0xfd403f40, 0x079003e5,
+ 0x04f9003f, 0x400f9433, 0xe404f904, 0x3f400f50, 0x03e400fd, 0x003f400e,
+ 0x5003e400, 0xfd003f40, 0x4fd203f4, 0x80fd243e, 0x480fd203, 0xf480f900,
+ 0x3e400f90, 0x03e400f9, 0x003e400f, 0x9003e602, 0x70000000, 0x00000000,
+ 0x1801e480, 0xcd283d40, 0x0e9003f4, 0x00f91035, 0x400bd283, 0xe400d900,
+ 0x3f400fd0, 0x07b400fd, 0x0036400c, 0x500b3400, 0xfd003e40, 0x0fd28334,
+ 0xc0cd0033, 0x400cd103, 0x3400e900, 0x3e400f90, 0x03e400f9, 0x003e400f,
+ 0x9003c604, 0x70000000, 0x00000000, 0x3810e0a0, 0x88002e00, 0x4c8082e0,
+ 0x00e80222, 0x000b8002, 0xe000b801, 0x2e800ea0, 0x02e00098, 0x00228008,
+ 0x80022000, 0xb8002e00, 0x8ba26220, 0xc0a848aa, 0x02088102, 0x20a0b800,
+ 0x2e000b80, 0x02e000b8, 0x002e000b, 0x8002ce04, 0x30000000, 0x00000000,
+ 0x0805c4c2, 0x81022a40, 0x0a1206c4, 0x40a1002c, 0x400b1002, 0xc4009100,
+ 0x2c404b10, 0x02c404a9, 0x00264009, 0x90024408, 0xb1002c40, 0x0b128204,
+ 0x80813060, 0x40281002, 0x0480a100, 0x2c400b10, 0x02c400b1, 0x002c400b,
+ 0x1002c201, 0x70000000, 0x00000000, 0x1815a401, 0x89002e50, 0x089002ec,
+ 0x00a1002a, 0xc00bb002, 0xe400b900, 0x6e400a90, 0x02e40099, 0x00224038,
+ 0x920a2c00, 0xb9002e40, 0x8b900225, 0x00ab0028, 0x40089402, 0x2400b900,
+ 0x2e400b90, 0x02e400b9, 0x002e400b, 0x9002c600, 0x60000000, 0x00000000,
+ 0xa010a400, 0xc9003e50, 0x0e9003e4, 0x00e9001e, 0x680f9003, 0xe400d900,
+ 0x3e508f9c, 0x01e400f1, 0x8836400d, 0x12036400, 0xb9003e40, 0x0f980b26,
+ 0x00c94832, 0x400c9403, 0x2600e900, 0x3e400f90, 0x03e400f9, 0x003e400f,
+ 0x9003e800, 0x70000000, 0x00000000, 0xa800a400, 0xf9093e40, 0x0e9003e4,
+ 0x00e90036, 0x480f9003, 0xe400f900, 0x3e420f92, 0x83e401f9, 0x903ac04f,
+ 0x9003e400, 0xf9003e70, 0x0f92c3c4, 0x40f9a03e, 0x400f910b, 0xe480f900,
+ 0x3e400f90, 0x03e400f9, 0x003e400f, 0x9003ea00, 0x60000000, 0x00000000,
+ 0x28108000, 0xe8007e04, 0x0e8003e0, 0x10c8003e, 0x000d800b, 0x2000f800,
+ 0x3a006c84, 0x03e081f8, 0x6036100d, 0x84036080, 0xf8103e00, 0x1c841321,
+ 0x82c86032, 0x000f8003, 0x2002c800, 0x3e000f80, 0x03e000f8, 0x003e000f,
+ 0x8003ca00, 0x20000000, 0x00000000, 0x28042804, 0x8e846d80, 0x08a003b9,
+ 0x008a003f, 0xb008ed03, 0x6800ba01, 0x2f8008ec, 0x03b800be, 0x4038a00a,
+ 0xe50a3a80, 0xba006e80, 0x0de40238, 0x888e4023, 0xb20bec03, 0x7b40ca00,
+ 0x2e810ba0, 0x03a800ba, 0x002e800b, 0xa002ca04, 0x40000000, 0x00000000,
+ 0x28054c00, 0xb1802cc0, 0x1a30028e, 0x8183002c, 0xe2093c02, 0x0c00b300,
+ 0x28e40134, 0x00cd09b3, 0x8020800a, 0x30020f00, 0xb3012cc0, 0x08bc220c,
+ 0x128b00a4, 0xc20bbb0a, 0x0c008300, 0x2cc00b30, 0x02cc00b3, 0x002cc00b,
+ 0x3002ca00, 0x50000000, 0x00000000, 0x20111c80, 0x95402dc0, 0x8872229f,
+ 0x0087302b, 0x62080882, 0x1c01b700, 0x2d600974, 0x329d01bf, 0x402b100a,
+ 0x70821400, 0xb7002fe0, 0x09740a1c, 0x00830c25, 0xc10b3002, 0x5e209700,
+ 0x2dc00b70, 0x029c00b7, 0x002dc00b, 0x7002e800, 0x40000000, 0x00000000,
+ 0x20080e80, 0xf6802de0, 0x0e78038e, 0x02c7902d, 0x600d4802, 0x1e00f780,
+ 0x39605d78, 0x13de00b7, 0x8571a04e, 0x58031600, 0xf7802de0, 0x08f80b3e,
+ 0x14c78025, 0xe00f7803, 0x3e00c780, 0x3de00f78, 0x03de00f7, 0x803de00f,
+ 0x7803ea02, 0x00000000, 0x00000000, 0x0815ac24, 0xea003e80, 0x8fb403a4,
+ 0x00fb203e, 0x410f8003, 0xec00db00, 0x1c404eb0, 0x03ec00f3, 0x007c001e,
+ 0x8003e004, 0xfb023cc0, 0x07b003ec, 0x00f9003a, 0x008fb003, 0xe000eb00,
+ 0x3ec00fb0, 0x03ac00fb, 0x003ec00f, 0xb003c202, 0x60000000, 0x00000000,
+ 0x4005fe20, 0xc59025ec, 0x0efdc33e, 0x004f803f, 0x600fc803, 0x7e50ff80,
+ 0x3f6029f9, 0x23de40c7, 0x9031340c, 0x51033600, 0xff902fe8, 0x0ff8033e,
+ 0x00cf8133, 0xe007f913, 0x3e004f81, 0x3fe007f8, 0x03fe00ff, 0x803fe00f,
+ 0xf803c000, 0x70000000, 0x00000000, 0xa8119c0a, 0x870131c4, 0x48f0021c,
+ 0x04d70039, 0x400b400a, 0x1c00b704, 0x2d010850, 0x40d804d7, 0x31210e4a,
+ 0x72035400, 0xb5002dc3, 0x0b608354, 0x00861021, 0xc40bc382, 0x9c40a700,
+ 0x2dc00b70, 0x02dc00b7, 0x102dc00b, 0x7002ea04, 0x60000000, 0x00000000,
+ 0x80009c00, 0x860a2148, 0x0a700608, 0x0097002d, 0x040b0002, 0x1c10b710,
+ 0x2d400860, 0x02dc040f, 0x40230109, 0xd1061400, 0xb7000dc8, 0x0b500208,
+ 0x60870021, 0xc00b7006, 0x1c008700, 0x2dc00b70, 0x02dc00b7, 0x002dc00b,
+ 0x7002c000, 0x20000000, 0x00000000, 0x6010cc00, 0x80c02010, 0x08300200,
+ 0x00930028, 0x180b0002, 0x0c00b300, 0x2c220804, 0x02c80093, 0x00200003,
+ 0x00224000, 0xb14824d0, 0x090e0060, 0x008000a0, 0x000b0a06, 0x80042300,
+ 0x2cc00b30, 0x02cc00b3, 0x002cc00b, 0x3002c804, 0x30000000, 0x00000000,
+ 0x2815bc00, 0xcb00a2c0, 0x0ef0030c, 0x00df003c, 0x520f8003, 0x2c00fb00,
+ 0x3e400cbe, 0x03cc00cb, 0x4032a00d, 0x30022400, 0xb3403ee0, 0x0fb8012f,
+ 0x02cbe032, 0xc00fbc43, 0x2e280b00, 0x3ec00fb0, 0x03ec00fb, 0x003ec00f,
+ 0xb003ea04, 0x60000000, 0x00000000, 0x8000ec00, 0xfb407ec8, 0x0fb003e8,
+ 0x00fb002e, 0x100f8417, 0xac00fb00, 0x7e448fa4, 0x03e500fb, 0x41be000e,
+ 0xb403e400, 0xfb003ec0, 0x0f9023e8, 0x04f3083e, 0xd00fb003, 0xec04fb00,
+ 0x3ec00fb0, 0x03ec00fb, 0x003ec00f, 0xb003e010, 0x30000000, 0x00000000,
+ 0x0110ec00, 0xed083bc0, 0x4ef0037c, 0x00cf003f, 0x400e4003, 0xbc01ff00,
+ 0x7f008cda, 0x87fc00cf, 0x0033000c, 0xd9073400, 0xfd0033c2, 0x0fa04334,
+ 0x20ce043b, 0xf00fcc03, 0x2f00cf00, 0x3fc00ff0, 0x03fc00ff, 0x003fc00f,
+ 0xf003c044, 0x30000000, 0x00000000, 0x81046c00, 0x89c03c80, 0x08b04222,
+ 0x00fb0026, 0x30088802, 0x2c00fb00, 0x2c000d8c, 0x03af00d2, 0x8068240f,
+ 0x8803e200, 0xb91036c0, 0x09848363, 0x40884036, 0x300b8802, 0x22008b00,
+ 0x2ec00bb0, 0x02ec00bb, 0x002ec00b, 0xb002e040, 0x10000000, 0x00000000,
+ 0x80000c00, 0xa8882ec0, 0x0a300264, 0x808b002e, 0x600a8822, 0xac00bb00,
+ 0x6e5408b4, 0x42ef048b, 0x88220008, 0xa4022200, 0xbb0026c0, 0x0b31022c,
+ 0x24891422, 0x020b3082, 0x00208b00, 0x2ec00bb0, 0x02ec00bb, 0x002ec00b,
+ 0xb002e000, 0x40000000, 0x00000000, 0x08000c00, 0x82022cc0, 0x08300240,
+ 0x01a30024, 0x00080002, 0x0c01a300, 0x2e004900, 0x028c0091, 0x002a000b,
+ 0x8002c000, 0xb10024c0, 0x0b000240, 0x00800024, 0x000b004a, 0x00028300,
+ 0x2cc00b30, 0x02cc00b3, 0x002cc04b, 0x3042c201, 0x00000000, 0x00000000,
+ 0x00087c00, 0xea003a40, 0x0af00360, 0x008f002e, 0x000a8003, 0xac00bb00,
+ 0x2e000c80, 0x02ec00cb, 0x0022000c, 0x80022000, 0xf90036c0, 0x0f800b20,
+ 0x02c0003a, 0x000f8003, 0x2001cb00, 0x3ec00fb0, 0x03ec00fb, 0x003ec00f,
+ 0xb003c003, 0x50000000, 0x00000000, 0xa01dfc08, 0xfc003b00, 0x0ff003b0,
+ 0x00ff003f, 0x004fc023, 0xfc00ff00, 0x3d004fc0, 0x02bc00ff, 0x043f000e,
+ 0xc003f000, 0xfd003fc0, 0x0dc003b0, 0x00fc003f, 0x000fc003, 0xf000ff00,
+ 0x3fc00ff0, 0x03fc00ff, 0x003fc00f, 0xf003e802, 0x70000000, 0x00000000,
+ 0xc005fc88, 0xdc103fe0, 0x0ff807be, 0x00df803f, 0xe00ff803, 0xf0b0ef80,
+ 0x3fca0fc8, 0x0372008f, 0x281fe00c, 0xf803d200, 0x048137c0, 0x0cf923fc,
+ 0xa0cf2831, 0x200cf803, 0xfe00fe80, 0xb3c80df8, 0x0b3c86cf, 0x80b3204d,
+ 0xf802f000, 0x70000000, 0x00000000, 0xc010dc40, 0x882022e0, 0x0bb802cc,
+ 0xa08b802e, 0xe00bb802, 0xe3008b84, 0x2ff00c88, 0x0260a08f, 0xc22ee00a,
+ 0xb802e200, 0xa88223e4, 0x0ab002ff, 0x00abc02a, 0x0848b802, 0xee00bb08,
+ 0x22b408b0, 0x822f408a, 0x81226008, 0xb802e004, 0x30000000, 0x00000000,
+ 0xc8458c08, 0x900020c0, 0x0b30028c, 0x00b3002c, 0xc00b3002, 0xc000a302,
+ 0x2cc00280, 0x02e00183, 0x0028c00a, 0x3012c404, 0xa00424c0, 0x883002cc,
+ 0x00a30020, 0x02083002, 0xcc00ba20, 0x20c009b2, 0x028c0083, 0x00264009,
+ 0x3002c201, 0x70000000, 0x00000000, 0xc0148c00, 0x890022c0, 0x0bb002ec,
+ 0x00ab002e, 0xc00bb002, 0xe110ab00, 0x2ec00b98, 0x2268028b, 0x002ec008,
+ 0xb002ee00, 0xa88822c0, 0x0ab002ec, 0x00ab002a, 0x8208b002, 0xec00bb80,
+ 0x229808b0, 0x82ac118b, 0x0026e009, 0xb002f004, 0x60000000, 0x00000000,
+ 0x0415ec08, 0xd888b2c0, 0x0bb003ac, 0x00fb003e, 0xc00fb002, 0xea00eb00,
+ 0x3ec00e0e, 0x03e060cb, 0x0038c02e, 0xb003e280, 0xe08036c0, 0x2cb003cc,
+ 0x00eb0032, 0x501cb003, 0xec00f280, 0x32308db5, 0x03ac00c1, 0x9036600d,
+ 0xb002d004, 0x70000000, 0x00000000, 0xa041bc02, 0xfd9037c0, 0x0ff003fc,
+ 0x00df003f, 0xc00ff003, 0xf240df00, 0x3dc204d0, 0x033e007f, 0x003fc01f,
+ 0xf023f010, 0xfc083fc0, 0x4df003ec, 0x0077003f, 0x718ff003, 0xfc00fd00,
+ 0x3d400ff0, 0x037c00ff, 0x023bc00e, 0xf003f800, 0x60000000, 0x00000000,
+ 0xc010ac00, 0xe80032c0, 0x0fb003ec, 0x10db003e, 0xc00fb003, 0xe920db30,
+ 0x3bc00e84, 0x03e510ff, 0x013ac20e, 0xb0032c80, 0xf80034c3, 0x0cb033ec,
+ 0x00eb043e, 0x600cb003, 0xec00fa00, 0x32000ea4, 0x03ec20fb, 0x0d3e4004,
+ 0xb003f004, 0x20000000, 0x00000000, 0xd8053c80, 0x8b0022c0, 0x0bb002ec,
+ 0x008b042e, 0xc00bb000, 0xc180db81, 0x23c20b90, 0x22cc20bf, 0x8836d108,
+ 0xb0034e80, 0x89c037d2, 0x08b042fd, 0x200f802e, 0xc008b002, 0xec00bb00,
+ 0x22400830, 0x40de08bb, 0x602cc008, 0xb002f200, 0x40000000, 0x00000000,
+ 0xe0054c00, 0xaa0020c0, 0x0b3002ec, 0x0093002c, 0xc00b3002, 0xc4003340,
+ 0x28d00a00, 0x40c328b3, 0xa020c00a, 0x39828700, 0xa01020d0, 0x083006cf,
+ 0x8093902e, 0x80083002, 0xcc00b300, 0x20c00a30, 0x024e00b3, 0x442c0008,
+ 0x3002f800, 0x50000000, 0x00000000, 0xf0011f40, 0x878021e0, 0x0b7802de,
+ 0x0087806d, 0xe00b7806, 0xc6009780, 0x21e10b48, 0x02d600b7, 0x802de008,
+ 0x78227e00, 0x1c9125c0, 0x087822de, 0x0097802f, 0x50087802, 0xde00bf80,
+ 0x20e00878, 0x02de04b6, 0x802f6008, 0x7802d800, 0x40000000, 0x00000000,
+ 0x48080c00, 0xea00b0c0, 0x0b3003cc, 0x00d3003c, 0xc00f3002, 0xc400f310,
+ 0x28c40e11, 0x02cc00f3, 0x0038c20e, 0x30038400, 0xf01010c4, 0x0c3003cc,
+ 0x00f3013c, 0x840c3003, 0xcc00f340, 0x30c00e10, 0x03cc20f3, 0x003cc00c,
+ 0x3003d202, 0x00000000, 0x00000000, 0x400dbc00, 0xff103fc0, 0x0ff003fc,
+ 0x00ff003f, 0xc00ff003, 0xfc40e704, 0x3fc00fd0, 0x03fc00f7, 0x0035c00d,
+ 0x7001fc00, 0xec107dd8, 0x0ff103fc, 0x00ef003f, 0xc80ff003, 0xfc00f700,
+ 0xbf800ff1, 0x23fc40ff, 0x023dc40f, 0xf003d006, 0x60000000, 0x00000000,
+ 0xa805ec20, 0xcaa032c0, 0x0fb003ec, 0x00fb003e, 0xc00eb002, 0xec01fb00,
+ 0x3bd20f90, 0x27aa00df, 0xd036c00c, 0xb043cc04, 0xd80032c9, 0x0fb0032c,
+ 0x90fb103e, 0xc00fb003, 0xec00fb00, 0x3ec04eb0, 0x03ec00fb, 0x003cc00d,
+ 0xb003ea00, 0x70000000, 0x00000000, 0xc8118d00, 0x830821c0, 0x0b7002dc,
+ 0x00b7002d, 0xc00b7002, 0xd4403700, 0x2dd00b50, 0x42fc0483, 0x0821c002,
+ 0x7012dc00, 0xd60021d8, 0x0b70021d, 0x40b7802d, 0x404b7002, 0xdc00b700,
+ 0x2cc00870, 0x02dc00b7, 0x002dc008, 0x7002f204, 0x60000000, 0x00000000,
+ 0x80001e82, 0x868021e0, 0x0b78029e, 0x00b78021, 0xe00b7802, 0xde00b781,
+ 0x25e88b58, 0x82de0897, 0xa025e00a, 0x7802ff00, 0x97c0a5e8, 0x0b78021e,
+ 0x00b7a02d, 0xe00b7802, 0xde00b780, 0x2d220a78, 0x02dec0b7, 0x882fe009,
+ 0x7802f000, 0x20000000, 0x00000000, 0x4814cc00, 0x835020c0, 0x0b3002ec,
+ 0x00b3002c, 0xc00b3002, 0xcc00b300, 0x2cc00b38, 0x02cd0083, 0x0020c00a,
+ 0x3002ce00, 0x93c824c0, 0x0bb0020c, 0x01b3022c, 0xc00b3002, 0xcc00b380,
+ 0x2c5808bc, 0x02cc00b3, 0x842cd048, 0x3002d204, 0x30000000, 0x00000000,
+ 0xe815a804, 0x8a84b280, 0x0fa003a8, 0x00fa003a, 0x800ea003, 0xe880fa04,
+ 0x34808fe9, 0x43fb60da, 0x0236800e, 0xa003d800, 0xde803680, 0x0fa00b28,
+ 0x00fa003f, 0x900fa003, 0xe800f6a0, 0x3fb00ee9, 0x03e800f6, 0xc03d9805,
+ 0xa003fa04, 0x60000000, 0x00000000, 0x4800e100, 0xf8083e00, 0x0f8003e0,
+ 0x00f8003e, 0x000f8003, 0xe000f800, 0x1e000f80, 0x03e000f8, 0x003e000f,
+ 0x8043e102, 0xf8403a11, 0x0f8003e1, 0x00d8023e, 0x000f8003, 0xe000f800,
+ 0x3c000f81, 0x03e100f8, 0x083e000f, 0x8003d200, 0x30000000, 0x00000000,
+ 0x0810c402, 0xcb003e40, 0x0f9003e4, 0x00c9003e, 0x400f9003, 0xee00f900,
+ 0x3e500e90, 0x03e440f9, 0x203e480d, 0x9c03e640, 0xc9023060, 0x0c900324,
+ 0x00f10032, 0x460f9003, 0xe400f900, 0x36400c90, 0x032480f9, 0x8032428f,
+ 0x9003c204, 0x30000000, 0x00000000, 0x80046500, 0x89042e40, 0x0b9002e4,
+ 0x00a9002e, 0x400e9002, 0xe500b908, 0x2e600890, 0x02e600b9, 0x802c6028,
+ 0x9002e502, 0x8100227c, 0x28900225, 0x00b9c02a, 0x600b9002, 0xe408b900,
+ 0x22400890, 0x022480b9, 0x40224008, 0x9002e000, 0x10000000, 0x00000000,
+ 0x18052700, 0x89002e40, 0x0b9002e4, 0x0089002e, 0x400b9002, 0xe460b900,
+ 0x2e400b90, 0x02e400b9, 0x402e4009, 0x9000e400, 0x89106240, 0x09900224,
+ 0x00b92226, 0x500b9002, 0xe400b900, 0x26400890, 0x022410b9, 0x202a400a,
+ 0x9002c600, 0x40000000, 0x00000000, 0x08040440, 0x81102c40, 0x0b1002c5,
+ 0x00a10024, 0x400a1002, 0xc400b100, 0x24c00910, 0x02c440b1, 0x002c4008,
+ 0x1022ec00, 0x8300a040, 0x09140a0c, 0x08b1002c, 0x500b1002, 0xc400b910,
+ 0x20400811, 0x320401bb, 0x00224008, 0x1002c201, 0x00000000, 0x00000000,
+ 0xb80d61a0, 0x88683e00, 0x0f8003e0, 0x00c8003e, 0x000f8003, 0xe0a0f800,
+ 0x3e000f80, 0x21e100f8, 0x003e000d, 0x8001e000, 0xc801320a, 0x0d000320,
+ 0x00fa2836, 0x000f8003, 0xe000f840, 0x362a2c84, 0x0320a0f8, 0x003a000e,
+ 0x8003ce03, 0x50000000, 0x00000000, 0x980de480, 0xf9243e40, 0x0f9003e4,
+ 0x00f9003e, 0x400f9023, 0xe400f900, 0x3e500ed0, 0x03f480f9, 0x403c400f,
+ 0x9003f404, 0xf5001e40, 0x4e9003e5, 0x00f9003b, 0x400f9003, 0xe400fd20,
+ 0x3f408ff2, 0x2be400fd, 0x00bf400e, 0x9003e606, 0x70000000, 0x00000000,
+ 0x9805e400, 0xd9003e40, 0x0f9003e4, 0x00c9003e, 0x400f9011, 0xf408ed00,
+ 0x37400c90, 0x43f400ed, 0x28354009, 0xd003f400, 0xc5002340, 0x0f9003f4,
+ 0x80cd0033, 0x408f9003, 0xe400f900, 0x3f480c90, 0x03f400f9, 0x00b0404d,
+ 0x9002c600, 0x70000000, 0x00000000, 0x3800e000, 0x88002e00, 0x0b8002e0,
+ 0x20d8002e, 0x000b8002, 0xe001b800, 0x2e000c80, 0x02e00088, 0x0022000a,
+ 0x8022e000, 0xd8013600, 0x0b8202e0, 0x44a80022, 0x000b8002, 0xe000b820,
+ 0x22042880, 0x82e000b8, 0x00320008, 0x8002ce04, 0x30000000, 0x00000000,
+ 0x4815c400, 0x81802c40, 0x0b1002c4, 0x00810028, 0x400b1002, 0xc400a100,
+ 0x2c440810, 0x42e400a1, 0x0024400a, 0x1002e400, 0x81802040, 0x0b12a2c4,
+ 0x008100a0, 0x401b1002, 0xc400b128, 0x28400812, 0x02c440b9, 0x00224049,
+ 0x1006c201, 0x70000000, 0x00000000, 0x18158400, 0x89802e40, 0x0b9002c4,
+ 0x0099002e, 0x400b9002, 0xe441b900, 0x2e400894, 0x06e44089, 0x0022400a,
+ 0x9042ec00, 0x99002640, 0x1b9002e4, 0x00ab0022, 0x480b9002, 0xe400b900,
+ 0x22400891, 0x02e401b9, 0x40225808, 0x9002c604, 0x60000000, 0x00000000,
+ 0xa015e402, 0xc9023e40, 0x0f9002e4, 0x00c9003a, 0x400f9003, 0xe404e900,
+ 0x36402c9c, 0x02c624e9, 0x0034401e, 0x9001e720, 0xc1c03240, 0x0f9023e4,
+ 0x01c90032, 0x400f9003, 0xe400f900, 0x3a781c9c, 0x03e400f1, 0x4032500d,
+ 0x9003e804, 0x70000000, 0x00000000, 0xe801ac20, 0xe9003e40, 0x0f9003e4,
+ 0x00f9003e, 0x410f9013, 0xe400f908, 0x3e408e92, 0x03e400f1, 0x023e404f,
+ 0x9003e708, 0xf9913e40, 0x0f9003e4, 0x0071043e, 0x620f9003, 0xe408f920,
+ 0x3a682f90, 0x43e400fb, 0xa03a400f, 0x9003ea00, 0x60000000, 0x00000000,
+ 0x2810a042, 0xc8003a00, 0x0f8003e0, 0x00f8003e, 0x000f8003, 0xa008e800,
+ 0x3c081f84, 0x03e110f8, 0x0032000f, 0x8003e160, 0xc8011a01, 0x0f8003c0,
+ 0x02c8003e, 0x040c8003, 0xe000f800, 0x3e100d84, 0x03e000f8, 0x003e000e,
+ 0x8003ca04, 0x20000000, 0x00000000, 0x28052b00, 0x8a002280, 0x0ba002e8,
+ 0x00ba002e, 0x800ba002, 0xfa20de80, 0x2f900ba0, 0x02fa00be, 0xc02ba608,
+ 0xe8039800, 0xde983784, 0x4ba002fa, 0x408ea32f, 0x8108a002, 0xe808ba00,
+ 0x2ca02aa0, 0x03ba00ba, 0x402c8008, 0xa002ca00, 0x40000000, 0x00000000,
+ 0x28054e02, 0x830028c0, 0x0b30028c, 0x00b3002c, 0xc00b3002, 0x8e00b300,
+ 0x2cd40930, 0x024c00b3, 0x3020d002, 0x38428f00, 0x838064d0, 0x0b3002c4,
+ 0x0083802c, 0xd0093012, 0xcc08bb00, 0x2c600930, 0x028e80b3, 0x482cc00a,
+ 0x3002ca00, 0x50000000, 0x00000000, 0xa0011c00, 0x87b021c0, 0x0b7002dc,
+ 0x10b7002d, 0xc00b7002, 0xd400b440, 0x2d404b70, 0x12dc20b5, 0x0069c018,
+ 0x4090bc00, 0x97002550, 0x0b7012c4, 0x2097012f, 0xe0297002, 0xdc00b720,
+ 0x2c420a72, 0x029c20b7, 0x002fc108, 0x7002e800, 0x40000000, 0x00000000,
+ 0xa8000e04, 0xc38139e0, 0x4b78039e, 0x80f7803d, 0xe00f7803, 0x9a00f680,
+ 0x2de00b78, 0x025600f0, 0x8031e00f, 0x58039a14, 0xc78235e0, 0x0f7a03d6,
+ 0x10c6802d, 0xa00d7803, 0xde00f7a0, 0x3d600d7c, 0x039a00f7, 0x803de00e,
+ 0x7801ea02, 0x00000000, 0x00000000, 0x0815a500, 0xfb003ec0, 0x0fb003fd,
+ 0x40fb003e, 0xc00fb003, 0xe004c804, 0x3e400fb0, 0x21e400f8, 0x003ec00e,
+ 0x80438000, 0xfb003e40, 0x0ff503e4, 0x00ea013c, 0xc00eb003, 0xec00fb10,
+ 0x36400db0, 0x03ac00fa, 0x203ec00f, 0xb003c206, 0x60000000, 0x00000000,
+ 0x4005ff00, 0xcf803fe0, 0x0ff803ff, 0x00ff801f, 0xe00ff803, 0xfe01fd90,
+ 0x3fe40df8, 0x03be40fc, 0x803fe00d, 0xd203fe80, 0xbf9033e4, 0x0efd03b6,
+ 0x00ed903f, 0x600cf801, 0xfe00ff80, 0x3f600cf8, 0x03fe00e7, 0xc033e00f,
+ 0xf813c000, 0x70000000, 0x00000000, 0xa8119400, 0x87002dc0, 0x0b7002dc,
+ 0x40b7002d, 0xc00b7022, 0xd500b400, 0x3d400e70, 0x02d408b4, 0x002d100d,
+ 0x4003dc00, 0xb7302140, 0x0bf00219, 0x0087002f, 0xc8087002, 0xdc00b700,
+ 0x3d400d70, 0x82dc0087, 0x00a1c40b, 0x7002ea04, 0x60000000, 0x00000000,
+ 0x10009c00, 0xa7002dc0, 0x087002dc, 0x00b7002d, 0xc00b7002, 0xd0209400,
+ 0x2c010870, 0x02dc10b4, 0x002dc00a, 0x5102dc81, 0x95022501, 0x0b702694,
+ 0x40a4032d, 0xc0197002, 0xdc00b708, 0x2c440870, 0x02dc00bf, 0x0021c00b,
+ 0x7002c000, 0x20000000, 0x00000000, 0x6014c000, 0x83c02cc0, 0x0b3002cc,
+ 0x00b3002c, 0xc00b3002, 0xc200b000, 0x28000a34, 0x82c760b0, 0x002c000b,
+ 0x00108400, 0xb050a400, 0x4b300288, 0x0080002c, 0xf8093002, 0xcc08b3c0,
+ 0x2c500938, 0x02cc0893, 0x2020ec0b, 0x3002c804, 0x30000000, 0x00000000,
+ 0x3815a802, 0xaf582ec0, 0x04b003fc, 0x00fb002e, 0xc00fb002, 0xe400b900,
+ 0x2e000cb0, 0x03e700f9, 0x003ec00a, 0x8000ee30, 0xdb503240, 0x0ef00384,
+ 0x01e2003e, 0x880db003, 0xec00f7d0, 0x3e542cf0, 0x23ec00f3, 0x2032c00f,
+ 0xb003ea04, 0x60000000, 0x00000000, 0x8000e000, 0xf3003ec0, 0x0fb003fc,
+ 0x00fb043e, 0xc00fb003, 0xe018f800, 0x3e500fb1, 0x03e000f8, 0x043ec009,
+ 0x8012e800, 0xf9003a10, 0x1ff00364, 0x01fa003e, 0x800eb003, 0xec00fb00,
+ 0x3a400eb0, 0x83ed00eb, 0x003ec00f, 0xb003e000, 0x30000000, 0x00000000,
+ 0x9010e900, 0xdf0033c0, 0x0ff003fc, 0x00ff003f, 0xc00ff003, 0xb000fc00,
+ 0x7d000cf0, 0x03b400f4, 0x0033400d, 0xc003be04, 0xcf023f40, 0x0ff01362,
+ 0x80de0033, 0x800cf003, 0xfc00ff00, 0x35440cf0, 0x431c00cf, 0x003bc00f,
+ 0xf001c044, 0x30000000, 0x00000000, 0x80046120, 0x8b0022c0, 0x0bb002ec,
+ 0x009b002e, 0xc00bb002, 0xe200b8e0, 0x6e720ab0, 0x02e300e8, 0x8128700d,
+ 0x88238340, 0xd9802e32, 0x0bb00221, 0x008a80a0, 0x8028b002, 0xec08bb00,
+ 0x22400830, 0x022c8088, 0x0022c04b, 0xb002e040, 0x10000000, 0x00000000,
+ 0x80050800, 0x8b0022c0, 0x0bb002ec, 0x00bb002e, 0xc10bb042, 0xe600b882,
+ 0x6e2008b0, 0x06ee2128, 0xc022e00a, 0x8802a400, 0x9b800e60, 0x1b3002ec,
+ 0x00988022, 0x000ab002, 0xec00bb00, 0x26c008b0, 0x0264519b, 0x812ac00b,
+ 0xb002e000, 0x40000000, 0x00000000, 0x08040000, 0x830020c0, 0x0b3002cc,
+ 0x00b30024, 0xc00b3002, 0x4000b000, 0x2c400a30, 0x02c001a0, 0x00284001,
+ 0x0842c400, 0x91022c00, 0x0b304288, 0x00800020, 0xa0023002, 0xcc00bb00,
+ 0x20c028b0, 0x224c019b, 0x0020c00b, 0x3002c201, 0x00000000, 0x00000000,
+ 0x800d6802, 0xcb00b2c0, 0x0fb003fc, 0x00fb023e, 0xc003b003, 0xe000b800,
+ 0x2e0008b0, 0x03ac00e8, 0x0032401c, 0x8003a404, 0xd9003e00, 0x0ff003e8,
+ 0x08d80032, 0x8006b003, 0xec00fb00, 0x36c02cb0, 0x036c00db, 0x003ac00f,
+ 0xb023c003, 0x50000000, 0x00000000, 0xa01df000, 0xef003fc0, 0x0ff023fc,
+ 0x00df003f, 0xc00ff003, 0xf001fc00, 0x3f000ff0, 0x03f000ec, 0x003d400f,
+ 0xc047b400, 0xf4003f00, 0x0ff02378, 0x08fc013f, 0x800df003, 0xfc00ff00,
+ 0x3fc00ff0, 0x2b9c02ed, 0x003fc00f, 0xf003e806, 0x70000000, 0x00000000,
+ 0xc005f000, 0xfc002fd8, 0x8ef20b7c, 0x80ff2023, 0xe00ff003, 0x5208ec90,
+ 0x3f200fc8, 0x431210f4, 0x8037e08e, 0xc8073200, 0xcc803f20, 0x0fc803f2,
+ 0x00fc800f, 0x200fc807, 0xf000cc10, 0x33e40df9, 0x0b3b02df, 0x8033e00f,
+ 0xf803f000, 0x70000000, 0x00000000, 0xc010e000, 0xb8802fcc, 0x4876023f,
+ 0x40bf5820, 0xc20bfc02, 0x22088820, 0x2e210b88, 0x236208b8, 0x802ae10a,
+ 0x88022600, 0xab802ee0, 0x0bb842ee, 0x04bb816e, 0xe00bb842, 0xe244a810,
+ 0x22c008b0, 0x0228808b, 0x0036e00b, 0xb802f004, 0x30000000, 0x00000000,
+ 0xc805c800, 0xb2002cc0, 0x1a34820c, 0x09b32020, 0xc80b3426, 0xc0002002,
+ 0x2c000b90, 0x064001a0, 0x0022c009, 0x00020401, 0x83006cc0, 0x033022cc,
+ 0x0c930424, 0xc00b3006, 0xc0018000, 0xa0c85932, 0x02088093, 0x286cc00b,
+ 0x3002f201, 0x70000000, 0x00000000, 0xc011a810, 0xba8e2ec0, 0x08b012ac,
+ 0x00bb000a, 0xc00bb042, 0xa2082940, 0x2e601b92, 0x026601bb, 0x082ae02b,
+ 0x90822500, 0xab022ec3, 0x09b002e4, 0xb0b80c2e, 0x420bb202, 0xe4302b00,
+ 0x22c04838, 0x0228008b, 0x002ec08b, 0xb002f004, 0x60000000, 0x00000000,
+ 0x0015e480, 0xf9803ec0, 0x0eb0036c, 0x04fb0432, 0xc10fb003, 0xe320e8d0,
+ 0x3e200f20, 0x836320f0, 0x0520680f, 0x0d0a0d0c, 0xcb483ec0, 0x8fb083ee,
+ 0x00fb0026, 0xc40fbc82, 0xe344c8a0, 0x32c00db8, 0x0b2800db, 0x003ec00b,
+ 0xb003e004, 0x70000000, 0x00000000, 0xa001a800, 0xfd003ec0, 0x0ff0003c,
+ 0x20f70027, 0xc00b7023, 0x7000de80, 0x3f028fe0, 0x01f004be, 0x201b800c,
+ 0xf001f900, 0xff103fe8, 0x0fe103fe, 0x20ff403f, 0xc20fc013, 0xe800f6c0,
+ 0x3fc00ff0, 0x0bf800ff, 0x0017c00f, 0xf003e800, 0x60000000, 0x00000000,
+ 0xd010a510, 0xcb4038c0, 0x0eb003ac, 0x00fb0032, 0xc00eb003, 0x6000eb01,
+ 0x3a400eb4, 0x03e500d9, 0x4232400c, 0xa0032d00, 0xf84a3e00, 0x0f9482e9,
+ 0x00fbc03a, 0x800fb413, 0x4d00c900, 0x3ec00cb4, 0x0ba800eb, 0x003ac00f,
+ 0xb043f504, 0x20000000, 0x00000000, 0xc8052800, 0x8b8823c0, 0x28f00a3f,
+ 0x80ef0022, 0xc008f502, 0x0004db00, 0x227848b2, 0x02e6200b, 0x802a8008,
+ 0x90036e20, 0xbb402ee0, 0x0bbc00ed, 0x80bb042e, 0xd30bb522, 0xec608b20,
+ 0x2ec8089a, 0x022a208b, 0x5022c00b, 0xb002f200, 0x40000000, 0x00000000,
+ 0xe0054040, 0x826028c0, 0x09b0020e, 0x00930028, 0xc00a3002, 0x82048000,
+ 0x00200b34, 0x82c200a0, 0x1020c008, 0x00020e20, 0xb3002cc0, 0x0b3002cd,
+ 0x00b34828, 0xe00b3c02, 0x4200b021, 0x2ec02830, 0x0a2920ab, 0x402cc00b,
+ 0x3012f800, 0x50000000, 0x00000000, 0xf8011640, 0x878061e4, 0x4979021e,
+ 0x40a38129, 0xe00a3802, 0x32009d90, 0x01c00979, 0x02d6008d, 0x812be008,
+ 0x48125e40, 0xb4802d32, 0x8b5802da, 0x00b7822d, 0xa00b7822, 0xde45b580,
+ 0x2de008f8, 0x021a8087, 0x8025e00b, 0x7802fc00, 0x40000000, 0x00000000,
+ 0x48080849, 0xc31038c4, 0x0b31238c, 0x00f30038, 0xc00e3183, 0x8060c000,
+ 0xa8000f30, 0x03c800e2, 0x0030c04c, 0x10030800, 0xf3123cc0, 0x4f21c3cc,
+ 0x40f32038, 0xc04f01c3, 0x4842f200, 0x3ec00c36, 0x0ba800eb, 0x003cc40f,
+ 0x3003d202, 0x00000000, 0x00000000, 0x400dbc50, 0xf6113fc4, 0x0ef183fc,
+ 0x20df4337, 0xc00df007, 0xb008d500, 0x3dc00ef0, 0x03fc02ef, 0x012dc06f,
+ 0x5003fc00, 0xff003fc0, 0x0ff043fc, 0x00ff003f, 0xc00ff843, 0xfc40cf00,
+ 0x3fc00e70, 0x03f880ff, 0x003bc11f, 0xf003d006, 0x60000000, 0x00000000,
+ 0xa815e600, 0xca001ecc, 0x0cbe036e, 0x80cb1036, 0xc00fb603, 0x6004fb80,
+ 0x12400f30, 0x032400fb, 0x8032c00f, 0xb00b0602, 0xcb003ec0, 0x0fb001e4,
+ 0x00f8003e, 0x410fb001, 0xe4004b00, 0xb2c00ca0, 0x032800db, 0x8036c00f,
+ 0xb003ea00, 0x70000000, 0x00000000, 0xc8118c00, 0x870078c4, 0x0832821c,
+ 0xa08f0021, 0xc08b7702, 0xd000b500, 0x81c00b70, 0x109400e7, 0x0021c00b,
+ 0x70029400, 0x87002dc0, 0x0b7022dc, 0x00b7002d, 0xc00b7002, 0x4c008f04,
+ 0x29c00860, 0x0a380087, 0x0021c10b, 0x7002f024, 0x60000000, 0x00000000,
+ 0x80009700, 0x87802de8, 0x1970024e, 0x82978205, 0xe01b7802, 0x5a00bf80,
+ 0x05600bfc, 0x021e00b7, 0x0401e01b, 0x78225600, 0x87802de2, 0x0b7840de,
+ 0x00b7802d, 0xe01b78a6, 0xde1087c0, 0x21e00868, 0x021a0297, 0x8065e00b,
+ 0x7802e000, 0x20000000, 0x00000000, 0x4804ce00, 0x824828c0, 0x1830020c,
+ 0x009b0020, 0xc00b3002, 0xcf00b390, 0x20d20b38, 0x028d20a3, 0x4220cc13,
+ 0x3022d200, 0x84002500, 0x0b482252, 0xc0b4002d, 0x100b4002, 0x4e408300,
+ 0x2ac06827, 0x0a080083, 0x0020c00b, 0x3002d204, 0x30000000, 0x00000000,
+ 0xe801bb02, 0xce403e80, 0x2da00368, 0x00da0036, 0x810ba003, 0x78c0fe42,
+ 0x37800f68, 0x231800fe, 0xc033a00f, 0xef216920, 0xca403e90, 0x0fa003e9,
+ 0x00fa402e, 0x900fa803, 0xf802cec0, 0x32800c6c, 0x033802da, 0x0036800f,
+ 0xa003fa04, 0x60000000, 0x00000000, 0x48006000, 0xf8013a00, 0x1f8003e1,
+ 0x00e8003e, 0x000f8443, 0xe000f808, 0x3a110f84, 0x03e100e8, 0x10be008f,
+ 0x8003a000, 0xf85a3e02, 0x8f8303e1, 0x00f8323e, 0x120f8803, 0x6124f048,
+ 0x3e002f80, 0x03e000f8, 0x003e000f, 0x8003d200, 0x30000000, 0x00000000,
+ 0x0800e520, 0xf9013a40, 0x0e1043a6, 0x00f90032, 0x402c9803, 0xe480f900,
+ 0x3e60039a, 0x032400c9, 0x083a400e, 0x99032520, 0xf9403e40, 0x0f9907e6,
+ 0x00f9023e, 0x480f9c03, 0xc600c9a0, 0x32600c90, 0x1ba400c9, 0x203e400f,
+ 0x9003c204, 0x30000000, 0x00000000, 0x80046410, 0xb9922e40, 0x0c904224,
+ 0x00b90422, 0x40089506, 0xe610b900, 0x2e400b90, 0x036400f1, 0x40304008,
+ 0x1022a500, 0xb9c82e61, 0x0f9406e5, 0x00b9402e, 0x580b9012, 0xe650d980,
+ 0x36540894, 0x02060289, 0x402e400b, 0x9002e000, 0x10000000, 0x00000000,
+ 0x18152400, 0xb9002c40, 0x0a9002a4, 0x80b90020, 0x400890b2, 0xe401b900,
+ 0x2ec80b94, 0x02248089, 0x502a4028, 0x90423400, 0xbd002f44, 0x0bd082f5,
+ 0x40bdc02f, 0x404bd042, 0xe4008900, 0x22420890, 0xc2a44089, 0x402e400b,
+ 0x9002c600, 0x40000000, 0x00000000, 0x08040ca0, 0xb1ac2c50, 0x08140204,
+ 0x01b142a0, 0x50481002, 0xc410b142, 0x2cc10b10, 0x024c00a1, 0x00224008,
+ 0x90269400, 0xb5002d60, 0x0a5012d4, 0x10b5002d, 0x400b5002, 0xc4009310,
+ 0xa4440891, 0x022c4081, 0x102c400b, 0x1002c201, 0x00000000, 0x00000000,
+ 0xb80d6080, 0xf8203a01, 0x0e8003a8, 0x00f80022, 0x00088002, 0xe008f800,
+ 0x3e000f80, 0x03200888, 0x003a008e, 0xa0032810, 0xf8003e00, 0x0b8002e0,
+ 0x00f8003e, 0x010fe003, 0xe8a4c868, 0x30100c04, 0x03a100c0, 0x403e000f,
+ 0x8003ee03, 0x50000000, 0x00000000, 0x981df4a4, 0xfd003e50, 0x0e9403e5,
+ 0x00f9403e, 0x400f9403, 0xf400f500, 0x3f400fd0, 0x03f400b5, 0x003b400f,
+ 0x5003e400, 0xf9003e40, 0x0fb003ec, 0x00f9047e, 0x400fb003, 0xf400fd20,
+ 0x3e686fda, 0x13f680f9, 0x203e400f, 0x9003e606, 0x70000000, 0x00000000,
+ 0x9801f404, 0xfd013e4c, 0x8e9003f4, 0x00891006, 0x410ed293, 0xf400e900,
+ 0x71400f50, 0x03d410cd, 0x0032400e, 0x50033400, 0xf9003e40, 0x0f9003e4,
+ 0x00f9023e, 0xc00f9003, 0xe480bd28, 0x32440d90, 0x0b6402cd, 0x1072400f,
+ 0x9003e600, 0x70000000, 0x00000000, 0x3810c000, 0xb8002e0c, 0x0884c2e0,
+ 0x00d0102a, 0x0a8b8002, 0x2000e00a, 0x22000b80, 0x02e000a8, 0x0236018a,
+ 0x800a2000, 0xb8003e00, 0x8e8002e0, 0x10b8002e, 0x000b8002, 0xf008b020,
+ 0x22090880, 0xc2302080, 0x00a2000b, 0x8002de04, 0x30000000, 0x00000000,
+ 0x4805c400, 0xb1002c48, 0x5b1342c4, 0x49910028, 0x480b1002, 0x8400a122,
+ 0x20408b10, 0x02e40081, 0x8022400a, 0x90024400, 0xb5002d40, 0x1b500254,
+ 0x00b5002d, 0x400b5012, 0xd44db128, 0xa1480952, 0x02541081, 0x0060400b,
+ 0x1002d201, 0x70000000, 0x00000000, 0x1811a440, 0xb9006c40, 0x099002e4,
+ 0x0091002a, 0x401b9002, 0x24282901, 0x22410b90, 0x02e420a9, 0x8026408a,
+ 0x91066c10, 0xbd0c2fc8, 0x8ad112f4, 0x10bd0c2f, 0xc203d822, 0xfc01b140,
+ 0x22400852, 0x0a340081, 0x0022400b, 0x9002c604, 0x60000000, 0x00000000,
+ 0xa011e400, 0xf9c83e40, 0x4f9003c4, 0x00d90032, 0x400f9003, 0xa500e9e0,
+ 0x22584f96, 0x02c440c1, 0xc432401a, 0x98836428, 0xf9d01e52, 0x0f9c0367,
+ 0x08f9c23e, 0x540f9003, 0xe4c0f900, 0x32402d90, 0x0b6402c9, 0x0022400f,
+ 0x9003e804, 0x70000000, 0x00000000, 0xe801a420, 0xf9c03e40, 0x0e9003e4,
+ 0x08f9003a, 0x400f9003, 0xa480f9a0, 0xbe400f90, 0x03e604f9, 0x003e400f,
+ 0x9803a400, 0xf9083a42, 0xce9812e5, 0x00f9903e, 0x600f9003, 0xe420f998,
+ 0x3e400f90, 0x03e400f9, 0x003e400f, 0x9003fa00, 0x60000000, 0x00000000,
+ 0x2810a000, 0xc8403600, 0x0e800360, 0x00e80032, 0x018d0203, 0x2040c800,
+ 0x1a180e85, 0x03a000c8, 0x0032000f, 0x84036100, 0xf8003e00, 0x0f8403e1,
+ 0x28f8803e, 0x080f8403, 0xe008f810, 0x32020c80, 0x03f002c8, 0x013e000f,
+ 0x8003ca04, 0x20000000, 0x00000000, 0x28053920, 0x8edc2280, 0x08a01339,
+ 0x80ca003e, 0x8020e402, 0x2a00ba04, 0x63a000e8, 0x123800ae, 0x8028800b,
+ 0x60033960, 0xba002ea2, 0x0ba046e8, 0x00baa02e, 0xa88ba1a2, 0xeb00ee00,
+ 0x36b008ad, 0x832a208e, 0x0032800b, 0xa002ca00, 0x40000000, 0x00000000,
+ 0x28054f00, 0x93c064c0, 0x0b30020d, 0x80b3002c, 0xc0083002, 0x0e00bb00,
+ 0x28e00a32, 0x068c2083, 0x0020c01b, 0x30024f00, 0xb4012d00, 0x5b4312d0,
+ 0x00b4006d, 0x200b4402, 0xd100b380, 0x22c43830, 0x0aac0083, 0x0028c043,
+ 0x3002ca00, 0x50000000, 0x00000000, 0xa0011600, 0x9f8025c4, 0x197a020c,
+ 0x0987102d, 0xe4084082, 0x1c00b710, 0x23a20a78, 0x061c00a7, 0x4009c00b,
+ 0x70021c00, 0xb5002dc0, 0x0b7012dd, 0x04b7002d, 0xc00b7002, 0xdd00a700,
+ 0x254088d0, 0x021c0087, 0x4025c00b, 0x7002e800, 0x40000000, 0x00000000,
+ 0xa8081e00, 0xd78037e8, 0x4ffb031e, 0x00f7b03f, 0xea0c4003, 0x1e006788,
+ 0x29600e78, 0x039e10c7, 0x8031e00f, 0x78035e00, 0xf7803de0, 0x0b7802de,
+ 0x08f7802d, 0xe00f7802, 0xde00f781, 0x33a10c68, 0x03b200c7, 0x8039e00f,
+ 0x7803ea02, 0x00000000, 0x00000000, 0x081dac02, 0xe2007ad2, 0x06b00bac,
+ 0x04eb003e, 0xc00e0003, 0xec00fb20, 0x1e800d90, 0x03ac08f3, 0x043ec00f,
+ 0xb043a800, 0xfa003ec0, 0x0f8003e4, 0x04fb003e, 0xc10fb003, 0xec00fb00,
+ 0x3e800f00, 0x03a000fa, 0x003ac00f, 0xb003c206, 0x60000000, 0x00000000,
+ 0x4005fa00, 0xcf8233e0, 0x2df8835e, 0x08ff823b, 0xe00fc803, 0xbe00ff81,
+ 0x27200c78, 0x033e00e7, 0x80b3e00c, 0xf0037e00, 0xed803fe0, 0x0ff920fe,
+ 0x40ff903f, 0xe00ff842, 0xfe44ff84, 0x2fe40cf8, 0x03be00dd, 0x803fe08f,
+ 0xf803d000, 0x70000000, 0x00000000, 0xa811b008, 0x854021c0, 0x0c700210,
+ 0x00df2001, 0xc80e4023, 0x5c00e700, 0x31080866, 0x029c4087, 0x2035c04f,
+ 0x72879450, 0x85002d02, 0x0f7402d8, 0x00b5182d, 0x060b4002, 0xdc40b700,
+ 0x2f4c2870, 0x0bfc0285, 0x002dc08b, 0x7022ea04, 0x60000000, 0x00000000,
+ 0x10009420, 0x971021c0, 0x0870021c, 0x00870129, 0xc01b4002, 0x9400a710,
+ 0xa10109f0, 0x221c00a7, 0x0867c008, 0x71063c00, 0xb7002dc4, 0x0b7006dc,
+ 0x00b6002d, 0xc00b7002, 0xd200b408, 0x2d8008f0, 0x029a0097, 0x002dc00b,
+ 0x7002c400, 0x20000000, 0x00000000, 0x6014c420, 0x900022c0, 0x58300200,
+ 0x00930022, 0xc00a0002, 0x4480abe0, 0x20000100, 0x068d0083, 0x4264e20b,
+ 0x38028005, 0x93802cd0, 0x0b3006ce, 0xc0b3002c, 0xd00b3002, 0xcc40b080,
+ 0x2e0008b8, 0x0ac8008a, 0x002cc00b, 0x3002d804, 0x30000000, 0x00000000,
+ 0x28152e02, 0xdb42a3c1, 0x0cf00b2c, 0x00ef003b, 0xc00f8003, 0xad00ef82,
+ 0x22f02db0, 0x030d01e2, 0x9024f24c, 0xb0032c00, 0xfb213ef0, 0x0fbc12ec,
+ 0x10fb803e, 0xe00fb103, 0xef00fbd0, 0x2ec00cba, 0x028c00da, 0x003ec00f,
+ 0xb003ce04, 0x60000000, 0x00000000, 0x9000e400, 0xeb613ec0, 0x0e30038c,
+ 0x00f3003e, 0xc00e8403, 0xac00eb10, 0x3e970eb0, 0x03ed22fa, 0x003ec00f,
+ 0xb203ad00, 0xeb023ed8, 0x0eb193ed, 0x00fa053e, 0xd20fbc03, 0xe080f840,
+ 0x3e500f94, 0x2bec00fb, 0x403ec00f, 0xb003e000, 0x30000000, 0x00000000,
+ 0x8010f800, 0xf90036c0, 0x4cf00330, 0x80df0033, 0xc00d8003, 0xfc00df00,
+ 0x33841fe2, 0x03fc00fd, 0x0033c08c, 0xc00326a0, 0xfd083b28, 0x0ff043f8,
+ 0x00fd183f, 0x000fc003, 0xfe90f700, 0x33c02ce8, 0x0b7280dc, 0x0033c005,
+ 0xf003e004, 0x30000000, 0x00000000, 0x90006800, 0x304422c0, 0x0ab003e0,
+ 0x00ab0022, 0xc00d8a12, 0xe4009b01, 0x36000b84, 0x0266008b, 0xc03ec00a,
+ 0x08826108, 0xf94022c0, 0x0bb407ed, 0x00bb002e, 0xc00bbc02, 0xec00b8c0,
+ 0x36d0088c, 0x1a220288, 0x9022c00b, 0xb002e400, 0x10000000, 0x00000000,
+ 0x80052800, 0xba202ec0, 0x08b0066c, 0x008b002a, 0xc1088802, 0xec80bb00,
+ 0x22100b90, 0x026b009a, 0x8922c008, 0xb802e80c, 0xb2522ac1, 0x0b8812e6,
+ 0x20bb022e, 0xc40bb612, 0xec089b28, 0x22c208b6, 0x022c1088, 0x4022c009,
+ 0xb002e000, 0x40000000, 0x00000000, 0x08040215, 0xb00028c0, 0x0a300282,
+ 0x00a30028, 0xc1090002, 0xcc109300, 0x64001b00, 0x0248008a, 0x020ac02a,
+ 0x30264010, 0xbb0020c0, 0x8b30028c, 0x00b3802c, 0xc00b3022, 0xcc00b000,
+ 0x24400810, 0x022c0081, 0x0020c00b, 0x3002c201, 0x00000000, 0x00000000,
+ 0x800d6000, 0xb8003fc0, 0x0c700260, 0x00cf003b, 0xc00c8002, 0xec04d700,
+ 0x72008380, 0x036c00db, 0x0122c00c, 0x8003a000, 0xf9043ac0, 0x0fb002ec,
+ 0x00fb003e, 0xc007b003, 0xec00d800, 0x32804ca0, 0x072000c8, 0x00b2c00d,
+ 0xb003e003, 0x50000000, 0x00000000, 0xa01df000, 0xfc0037c0, 0x0ff003f0,
+ 0x00ef00b7, 0xc10fc003, 0xf4007f00, 0xb9000fc0, 0x025400bf, 0x003dc00f,
+ 0x400bb000, 0xec003f00, 0x4fc003f0, 0x00fc043f, 0x000fc003, 0xf000fc00,
+ 0x7f000f40, 0x03b000ec, 0x003fc00f, 0xf003e806, 0x70000000, 0x00000000,
+ 0xc005fc00, 0xff1033e0, 0x0ff8037e, 0x00ff803f, 0xe00ff803, 0xfca0ff84,
+ 0x3fc00e78, 0x03d600cf, 0x803fe00e, 0x5c03fe00, 0xfc803fc0, 0x0ff0433e,
+ 0x00c5803b, 0x200cf803, 0x7c80ff90, 0x3bc80dfc, 0x033e00cf, 0x4033e00f,
+ 0xf803f001, 0x70000000, 0x00000000, 0xc010cd48, 0xbf4022e0, 0x0eb802ee,
+ 0x00bb802e, 0xe00bb802, 0xef00ab84, 0x0fe40bb8, 0x02e600ab, 0x8026e00b,
+ 0x9003ee04, 0xe8802ff0, 0x0bf902ae, 0x00a98020, 0x8808b802, 0x05b08b20,
+ 0x226408b0, 0x0224208b, 0x5022e00b, 0xb802e004, 0x20000000, 0x00000000,
+ 0xc800cc08, 0xa36220c0, 0x0b3002cc, 0x00b3002c, 0xc00b3002, 0xc4008302,
+ 0x2cc10a30, 0x02a400b1, 0x002cc08a, 0x9202cc00, 0xb0002cc4, 0x0b30020c,
+ 0x008a006a, 0x0a28b002, 0x4050b320, 0x28c00bb2, 0x0a2c8083, 0x202cc00b,
+ 0x3002c201, 0x30000000, 0x00000000, 0xc015ac00, 0xb30022c0, 0x0ab002ec,
+ 0x00bb002e, 0xc00bb052, 0xe400ab04, 0x2ec01bb0, 0x02ee01b9, 0x002ec01b,
+ 0xbc12ec00, 0xbb082ec1, 0x0bb002ac, 0x01ab1062, 0xb008bc0a, 0x0a020b00,
+ 0x2a440ab0, 0x002c628b, 0x002ec00b, 0xb002f004, 0x60000000, 0x00000000,
+ 0x0011ec00, 0xeb0032c0, 0x0fb003ec, 0x00fb003e, 0xc047b023, 0xe800cb04,
+ 0x3ec04eb0, 0x03a300fb, 0x023ec00e, 0x9c13ec10, 0xf8803ec0, 0x9fb0030c,
+ 0x00cb4838, 0x214c8813, 0x6690fbd8, 0x3ae00f34, 0x030e00cb, 0x003ec00f,
+ 0xb003c004, 0x70000000, 0x00000000, 0xb001bc00, 0xff003bc0, 0x0ef003fc,
+ 0x00ff003f, 0xc00bf003, 0xf9087f00, 0x3fc00ff0, 0x03f000ef, 0x0077c00f,
+ 0xd003fc00, 0x6da83fc2, 0x0f7003fc, 0x00ff003f, 0x800fc003, 0xfc12ff00,
+ 0x34600df0, 0x43fc00f7, 0x00b3c00f, 0xf003f800, 0x60000000, 0x00000000,
+ 0xc010ac00, 0xeb00b6c0, 0x0db003ec, 0x00fb003e, 0xc00cb003, 0xac00db00,
+ 0x3fc00fb1, 0x836c00fb, 0x0036c10f, 0xb003ac04, 0xfa0032c0, 0x0cf0032c,
+ 0x00fb0036, 0x400cb403, 0xe200fb00, 0x32c03c90, 0x03ed00cb, 0x003ac00f,
+ 0xb003f004, 0x20000000, 0x00000000, 0xd8053d20, 0x8f0022c0, 0x0bb003ec,
+ 0x00bb002e, 0xc00eb002, 0xcf048b02, 0x37c00abc, 0x074c008b, 0x002ec10b,
+ 0x30036c00, 0xbb4037d2, 0x08f0036d, 0x40b3a036, 0x80083002, 0xeb008b00,
+ 0x02c008b0, 0x02ec008f, 0x0022c00b, 0xb002f200, 0x40000000, 0x00000000,
+ 0xe0054f80, 0xa30120c0, 0x1b3002cc, 0x00b3002c, 0xc00a3002, 0xcd209300,
+ 0x2cc00830, 0x020400a3, 0x002cc00b, 0x00020c00, 0xb00020d0, 0x0330020e,
+ 0x00b12020, 0x00083002, 0xc800b900, 0x20c04820, 0x024800a3, 0x0020c009,
+ 0x3002f800, 0x50000000, 0x00000000, 0xf0011e10, 0x839021e0, 0x0b78069e,
+ 0x00b7802d, 0xe00a7822, 0xce008784, 0x28e00a79, 0x027e1097, 0x802de00b,
+ 0xea021e00, 0xb68025c0, 0x0b38025e, 0x00bf8225, 0xb0087802, 0xd300af80,
+ 0xa1700878, 0x06fe02a7, 0x8021e00b, 0x7800d800, 0x40000000, 0x00000000,
+ 0x48080c40, 0xa31030c0, 0x0f3002cc, 0x00f3002c, 0xc00e3003, 0x8460d310,
+ 0x2cc00e30, 0x020400f1, 0x042cc40f, 0x10028c00, 0xf12370c4, 0x8f30530c,
+ 0x20f30030, 0x040c3003, 0xc880f300, 0x30c00834, 0x03cc00eb, 0x2038c80f,
+ 0x3003d202, 0x00000000, 0x00000000, 0x400dbc00, 0xff103bc0, 0x0ff003fc,
+ 0x00ff003f, 0xc00ff003, 0xfc00ff00, 0x17c21af0, 0x03fc00cd, 0x003fc40f,
+ 0xf203fc40, 0xf7001dd8, 0x1cf083fc, 0x00ff003f, 0x800ff003, 0xf800d700,
+ 0x3f400ff0, 0x03dc00df, 0x083fc00f, 0xf003d006, 0x60000000, 0x00000000,
+ 0xa805ec10, 0xfb2232c0, 0x0fb003ec, 0x00fb003e, 0xc00eb003, 0xe880fb00,
+ 0x3fe88c30, 0x038e00cb, 0x000ac00f, 0xb003ac00, 0xfb003ed4, 0x0ff483ac,
+ 0x00f38036, 0x008fb003, 0xe802fb00, 0x3ec02db0, 0x03ec00fb, 0x003ec00f,
+ 0xb003ea04, 0x70000000, 0x00000000, 0xc8111c80, 0xb74a21c0, 0x0b7002dc,
+ 0x00b7002d, 0xc00b7016, 0xd844b700, 0x3dc28d70, 0x021c0297, 0x002dc0cb,
+ 0xf0035c00, 0xf7002dc8, 0x0b7202dc, 0x00b70021, 0x80cb7002, 0xd800d600,
+ 0x2dc00870, 0x02dc00b7, 0x202dc00b, 0x7002f204, 0x60000000, 0x00000000,
+ 0x80009ec0, 0xb3a021e0, 0x0b78029e, 0x00b7802d, 0xe00b7802, 0xd611b780,
+ 0x2ce80978, 0x02bc0097, 0x802de08b, 0x7c421e00, 0xb7882de0, 0x1b7802de,
+ 0x00b78021, 0xa00b7c02, 0xca00b780, 0x2ce0085c, 0x02de00b7, 0xa02de00b,
+ 0x7802f040, 0x20000000, 0x00000000, 0x4814cc00, 0xb30020c0, 0x0b3002cc,
+ 0x00b3002c, 0xc00b3022, 0xcf40b300, 0x28c00930, 0x060f0093, 0x002cc05b,
+ 0x3a024c00, 0x23002cc0, 0x0b3006cc, 0x00b38020, 0xf00b3002, 0xca029370,
+ 0x2cc008bc, 0x22ef10b3, 0x002cc00b, 0x3002d200, 0x30000000, 0x00000000,
+ 0xe815a800, 0xfa00b280, 0x0fa003e8, 0x00fa003e, 0x800ea003, 0xe900fa00,
+ 0x2e800da0, 0x039800ca, 0xa03e800f, 0x68032800, 0xbe103e80, 0xcfa007a8,
+ 0x10be2033, 0xb80bec02, 0xd882fec0, 0x3ea80ce1, 0x03fa84fa, 0x043e800b,
+ 0xa003fa00, 0x60000000, 0x00000000, 0x4800e000, 0xf0003e00, 0x0f8003e0,
+ 0x00f8003e, 0x000f8003, 0xe080f800, 0x3e000f84, 0x03a060e8, 0x003e001f,
+ 0x8003e001, 0x78003e10, 0x0f8003e1, 0x00f841ba, 0x084f80c3, 0xe00af800,
+ 0x3e000e80, 0x03e020f8, 0x007e000f, 0x8003d200, 0x30000000, 0x00000000,
+ 0x0810e400, 0xe9001240, 0x0f9003a4, 0x00f9003e, 0x400f9003, 0xec00f900,
+ 0x3e400f94, 0x032400e9, 0x003e40cd, 0x902b2404, 0xe900b260, 0x0b100324,
+ 0x00f9883e, 0x400f9003, 0x6400d900, 0x3c480d90, 0x002402c9, 0x013e400f,
+ 0x9003c200, 0x30000000, 0x00000000, 0x80046540, 0x89002240, 0x0b9002e4,
+ 0x00b9002e, 0x400e9002, 0xe420b900, 0x2e400b10, 0x83640289, 0x002e418b,
+ 0x9032a404, 0xb1402258, 0x0b9002a5, 0x00b9802e, 0x400b1002, 0x2500f900,
+ 0x2e600890, 0x12240089, 0x042e400b, 0x9002e000, 0x10000000, 0x00000000,
+ 0x18050500, 0xa9002a40, 0x0a9002e4, 0x00a9002e, 0x400b9002, 0xa441a900,
+ 0x2a401a90, 0x022c0089, 0x002a4009, 0x90022400, 0xb9082249, 0x0b900224,
+ 0x00b9202e, 0x400b9002, 0x65009900, 0x2e400990, 0x0aa40089, 0x002e400b,
+ 0x9002c604, 0x40000000, 0x00000000, 0x08040440, 0x8110a840, 0x0b1002c4,
+ 0x00b1002c, 0x40081042, 0xc400b100, 0x2c400b10, 0x02640181, 0x006c400b,
+ 0x94428404, 0xb1002040, 0x0b102684, 0x00b1026c, 0x440b9002, 0x2442b110,
+ 0x2c600811, 0x06844081, 0x106c400b, 0x1002c201, 0x00000000, 0x00000000,
+ 0xb80d61a0, 0xa868ba00, 0x0e8003a0, 0x00e8002e, 0x000f8003, 0xa0a0f800,
+ 0x3e000f80, 0x032000e8, 0x003e000d, 0x80232000, 0xf8013200, 0x0b800328,
+ 0x00fa003e, 0x100f8007, 0x61a0d840, 0x3e2a0d84, 0x03a100c8, 0x683e000f,
+ 0x8003ee03, 0x50000000, 0x00000000, 0x981de480, 0xf9203640, 0x0f9003e4,
+ 0x00f9003e, 0x400f9003, 0xe400f900, 0x3e500f90, 0x03f400fd, 0x003e400f,
+ 0xd003e410, 0xfd003e50, 0x0f9403e4, 0x00ff003f, 0x480fd003, 0xf480fd20,
+ 0x3f400fd2, 0x037484f9, 0x203e400f, 0x9003e606, 0x70000000, 0x00000000,
+ 0x9805e400, 0xc9003240, 0x0f9003e4, 0x00d9003e, 0x400e9001, 0xf400f904,
+ 0x3e400ed0, 0x13e400c9, 0x003e400f, 0x90032400, 0xd5003f48, 0x0e9283f4,
+ 0x00fd003f, 0x400c9007, 0x3482f900, 0x3f490c90, 0x03e400d9, 0x103e400f,
+ 0x9003e600, 0x70000000, 0x00000000, 0x3800c002, 0x88002200, 0x0b8002e0,
+ 0x00b8002e, 0x000b8002, 0xe000b800, 0x2e000880, 0x02e01288, 0x042e008b,
+ 0x80862001, 0xf8002e00, 0x0a8003e0, 0x00b8002e, 0x800a8002, 0x20a28a20,
+ 0x2e0428a0, 0x82e020b8, 0x102e000b, 0x8002ce04, 0x30000000, 0x00000000,
+ 0x4815c400, 0x81002040, 0x0b1002c4, 0x00b10024, 0x400a1002, 0xc401b100,
+ 0x2c440b10, 0x02e404a1, 0x006c400b, 0x12024400, 0xb1002c44, 0x081002c4,
+ 0x04b1022c, 0x40289002, 0x04c8b128, 0x2c400812, 0x02c400b1, 0x022c400b,
+ 0x1002c201, 0x70000000, 0x00000000, 0x1815ac00, 0x89002240, 0x0b9002e4,
+ 0x00b9002e, 0x401b9002, 0xe420b900, 0x2e400a90, 0x02e42189, 0x016e400b,
+ 0x91966400, 0xa9002e40, 0x8a9026a4, 0x08b9002e, 0x400a908a, 0x24aa8920,
+ 0x2e400892, 0x00e400b9, 0x012e404b, 0x9000c604, 0x60000000, 0x00000000,
+ 0xa015e400, 0xc900b240, 0x0f9003e4, 0x00b90036, 0x400e9013, 0xe744f901,
+ 0x3e400f90, 0x03e400e9, 0x102e400f, 0x980a6408, 0xb9602e40, 0x0e9024e4,
+ 0x04f9801c, 0x400c9c02, 0x2402f940, 0x3c400c98, 0x01e48099, 0x002e408f,
+ 0x9003e804, 0x70000000, 0x00000000, 0xe8018c00, 0xf1003e40, 0x0f9003e4,
+ 0x00f9003e, 0x400f9003, 0xe408f900, 0x3c400d90, 0x03e480f9, 0x813e400f,
+ 0x9803a400, 0xf9903c40, 0x0f9047e4, 0x00f9907e, 0x642f9403, 0xe600f900,
+ 0x3e680f98, 0x23e680f9, 0x003e400f, 0x9003ea00, 0x60000000, 0x00000000,
+ 0x2810a080, 0xc8003200, 0x0f8003e0, 0x00e8003e, 0x000f8007, 0xe084f802,
+ 0x3e000880, 0x03e004c8, 0x02320007, 0x8043e000, 0x78083607, 0x8c8013e0,
+ 0x1078147e, 0x180e8413, 0x6080d840, 0x3e000e84, 0x036000f8, 0x003e004f,
+ 0x8001ca04, 0x20000000, 0x00000000, 0x28012820, 0x8a002280, 0x0ea002e8,
+ 0x00ba002e, 0x800ba002, 0xf800ba00, 0x2e8000e8, 0x22c800aa, 0x003a800b,
+ 0xa003a800, 0x9e082380, 0x08a002fa, 0x80be942f, 0xa0082002, 0x3800da00,
+ 0x0f8048a0, 0x07280cba, 0x002e800b, 0xa002ca00, 0x40000000, 0x00000000,
+ 0x28054d00, 0x8300a0c0, 0x0b3002cc, 0x00b3002c, 0xc00b3002, 0xcc40b300,
+ 0x2cc02839, 0x02cc0093, 0x0020c00b, 0xb0028c00, 0xb38480d0, 0x08300244,
+ 0x80b3426c, 0xe00a3002, 0x66029300, 0x2cc41a30, 0x068c08b3, 0x002cc00b,
+ 0x3002ca00, 0x50000000, 0x00000000, 0xa0011c00, 0x871021c0, 0x0a7002dc,
+ 0x00b7002d, 0xc00b7006, 0xdc00b700, 0x2dc00870, 0x00fc00b7, 0x0029c00b,
+ 0x70029c00, 0xbf802040, 0x087002d4, 0x00b4002d, 0xc208f002, 0x05009720,
+ 0x2cc098f8, 0x0e9c80b7, 0x002dc00b, 0x7002e800, 0x40000000, 0x00000000,
+ 0xa8001e02, 0xcf8031e0, 0x0f7803de, 0x00f7803d, 0xe00f7802, 0xde00f780,
+ 0x2ce00478, 0x23de00d7, 0x8071e00f, 0x7f439e01, 0xf78031e0, 0x08780356,
+ 0x10f4842d, 0xe00e7803, 0x5202d7a0, 0x3de10e78, 0x039e80f7, 0xc03de00f,
+ 0x7803e802, 0x00000000, 0x00000000, 0x0815ac80, 0xfb403ec0, 0x0fb003ec,
+ 0x00fb003e, 0xc00fb003, 0xe408fb04, 0x3ec00fb0, 0x03cc00eb, 0x003ec00f,
+ 0xf021ac00, 0xdb003a40, 0x2fb001e4, 0x00f8003c, 0xc04f3003, 0xe000fb10,
+ 0x3e800f31, 0x032c00fb, 0x003ec00f, 0xb003c206, 0x60000000, 0x00000000,
+ 0x4005fb00, 0xcfc033e0, 0x0ff803fe, 0x00ef803f, 0xe00ff803, 0xf640ff90,
+ 0x3fe00ff8, 0x23de00ef, 0x8033e00f, 0xf1037e40, 0xbf903fe0, 0x0df913f6,
+ 0x40fc903f, 0xe40cf803, 0xfa02bf90, 0x33e40ef8, 0x03fe20ff, 0x803fe00f,
+ 0xf803f004, 0x70000000, 0x00000000, 0xa8119802, 0x8f0021c0, 0x0b7002dc,
+ 0x00b7002d, 0xc00f7003, 0xd040b700, 0x2dc00b70, 0x02dc02c7, 0x0021c00b,
+ 0x70071c00, 0xb6702d48, 0x0a704390, 0x40b6103d, 0x8c087203, 0x9020d700,
+ 0x21cc0870, 0x02dc20b7, 0x002dc00b, 0x70026a04, 0x60000000, 0x00000000,
+ 0x10009800, 0x870021c0, 0x0b7002dc, 0x00a7002d, 0xc00b7002, 0xd441b700,
+ 0x6dc00b50, 0x02fc209f, 0x0021c00b, 0x71061c10, 0xb7002c00, 0x1a7032d4,
+ 0x10b5112d, 0xc2487006, 0xdc02bf01, 0x21c00a70, 0x02dc00b7, 0x002dc00b,
+ 0x7002c600, 0x20000000, 0x00000000, 0x6814c800, 0x830020c0, 0x0b3002cc,
+ 0x00b3002c, 0xc0023002, 0x8000b300, 0x2cc00b10, 0x12cc0083, 0x0020c00b,
+ 0x30220c00, 0xb2002c00, 0x0a300280, 0x00b0402c, 0xb8083002, 0xa60893d0,
+ 0x20800835, 0x22ce00b3, 0x002cc00b, 0x3002d800, 0x30000000, 0x00000000,
+ 0x2015ac00, 0xcf00a2c0, 0x0bb003ec, 0x00eb003e, 0xc00bb002, 0xe600fb00,
+ 0x2ec00fb0, 0x00cc00db, 0x0022c003, 0xfa032c00, 0xb3993e40, 0x0ab003c4,
+ 0x0038802c, 0x702c3003, 0xee02ff00, 0xb0c00efc, 0x02fd40ff, 0x003ec00f,
+ 0xb002da00, 0x60000000, 0x00000000, 0x8000e400, 0xfb003ec0, 0x0fb003ec,
+ 0x00fb003e, 0xc00fb003, 0xe545fb02, 0x3ec00f94, 0x53ec009b, 0x003ec00f,
+ 0xf003ac00, 0xfb453e10, 0x023003ec, 0x00f9503a, 0x400fb003, 0xec00eb20,
+ 0x3ec40fb0, 0x03ec00fb, 0x003ec00f, 0xb0036400, 0x30000000, 0x00000000,
+ 0x8010e440, 0xef00b3c0, 0x0ff003fc, 0x00ff003f, 0xc00ff007, 0xb00cef00,
+ 0x3bc18ff0, 0x03fc00cf, 0x043fc00f, 0xf0037c00, 0xfec03140, 0x0df04332,
+ 0x00dc083f, 0x600cf003, 0xbc40ff02, 0x3ec00cf0, 0x82fc00ff, 0x002fc00f,
+ 0xf003e000, 0x30000000, 0x00000000, 0x80046100, 0x8b0022c0, 0x0bb002ec,
+ 0x00bb002e, 0xc00bb002, 0xe210bb00, 0x2ec04b8e, 0x06ec0c8b, 0x012ec00b,
+ 0xb0022c00, 0xba813620, 0x08b002aa, 0x0488a02e, 0x400db002, 0x29008b00,
+ 0x2ef00ab0, 0x02ec00bb, 0x002ec00b, 0xb002e040, 0x10000000, 0x00000000,
+ 0x80050000, 0xb30026c0, 0x0ab002ec, 0x00bb002e, 0xc00bb002, 0xe700bb00,
+ 0x2ec05bb8, 0x06ec009b, 0x002ac00b, 0x30026c01, 0xb9002263, 0x09b0022d,
+ 0x8018802e, 0xc808b002, 0xad02bb00, 0x2ef008b0, 0x06ec00bb, 0x002ec00b,
+ 0xb002e004, 0x40000000, 0x00000000, 0x08040002, 0x930020c0, 0x0b3002cc,
+ 0x00b3002c, 0xc00b3002, 0xc000b301, 0x2cc00b10, 0x06ec0293, 0x002cc00b,
+ 0x30020c10, 0xb8002400, 0x08300288, 0x0080002c, 0x8009b002, 0x08028300,
+ 0x2cc00a30, 0x26cc00b3, 0x002cc00b, 0x3022c201, 0x00000000, 0x00000000,
+ 0x800d6000, 0xff0036c0, 0x0eb003ec, 0x00fb003e, 0xc00fb047, 0xe000eb00,
+ 0x3ec00f90, 0x06ec02db, 0x007ac01f, 0x70036c00, 0xb8003200, 0x0db00328,
+ 0x00d8007e, 0xc00cb023, 0x8c00fb00, 0x3e400cb0, 0x03ec00fb, 0x003ec00f,
+ 0xb003e003, 0x50000000, 0x00000000, 0xa01df000, 0xef003fc0, 0x0ff003fc,
+ 0x00ff003f, 0xc00ff007, 0xf014ff00, 0x3fc00fc0, 0x03fc10e7, 0x007fc00f,
+ 0xf002bc01, 0xfc003f00, 0x1ff003f8, 0x00fd0075, 0x800ff003, 0xfc12e700,
+ 0x3f400ff0, 0x03fc00bf, 0x003fc00f, 0xf003e806, 0x70000000, 0x00000000,
+ 0xc001f001, 0xff203fcc, 0x8cfc333c, 0x80d48437, 0x200ecc03, 0xdc02cc82,
+ 0x3f210df8, 0x43f200df, 0x803be00f, 0xf8023600, 0xf780370c, 0x0cc20210,
+ 0x208c3033, 0x0088d203, 0x70044f80, 0x2fe00cf8, 0x037e00cf, 0x8037e00f,
+ 0xf803f000, 0x70000000, 0x00000000, 0xe010c400, 0xbf502fcc, 0x0db0123e,
+ 0x50b9802e, 0x20088002, 0xff008880, 0x2e2088b8, 0x52e200bb, 0x8122e00b,
+ 0xb822a600, 0xbb800a0c, 0x08869223, 0x08a8712a, 0x120a9192, 0xa3028b08,
+ 0x24c02832, 0x12cc80ab, 0x8022e00b, 0xb802e006, 0x30000000, 0x00000000,
+ 0xc805c808, 0xb3002cc0, 0x083212cc, 0x0090012e, 0x000a0202, 0xcd00a000,
+ 0x2c000b30, 0x02c0019b, 0x0028c00a, 0x30000400, 0xb3002400, 0x68040600,
+ 0x00800020, 0x1908120a, 0x00408320, 0x6cca2830, 0x82cc2083, 0x0024c00b,
+ 0x3002c201, 0x70000000, 0x00000000, 0xe015ac00, 0xbb022ec0, 0x293002ec,
+ 0x00b9882e, 0xc008b0e2, 0xec000884, 0x2e600ab0, 0x02e210bb, 0x8822c009,
+ 0xb000ac08, 0x9b0620c0, 0x08104a24, 0x00a9042a, 0xc29a9802, 0xac808b00,
+ 0x24c108b0, 0x02cc10ab, 0x0026c00b, 0xb002f000, 0x60000000, 0x00000000,
+ 0x8415e000, 0xbb003ec0, 0x0cb003ec, 0x00d9c03c, 0x320e8c03, 0xec00a880,
+ 0x1e200fb0, 0x00e284d9, 0xc03ac00e, 0xb0032600, 0x73003622, 0x0c850321,
+ 0x50c8c432, 0x100c9c03, 0x0280cb00, 0x7ec00cb0, 0x036c00cb, 0x0036c007,
+ 0xb003c004, 0x70000000, 0x00000000, 0xa001b800, 0xfb003ec0, 0x0ff0032c,
+ 0x08fd002f, 0xa40fc401, 0xfc107c08, 0x1f400df0, 0x02f024ff, 0x012fc10f,
+ 0xf003fe68, 0xff043f49, 0x0fe043f8, 0x00fe903d, 0x090f7053, 0xea08ff00,
+ 0x37c04ff0, 0x13fc00ff, 0x003bc00f, 0xf003e800, 0x60000000, 0x00000000,
+ 0xd010a400, 0xcb0c30c0, 0x0cb003ec, 0x20c86032, 0x400cb403, 0x2c44e840,
+ 0x3a180fb0, 0x036100fb, 0x4232c01f, 0xb007e440, 0xeb897288, 0x44b5032c,
+ 0x80c30032, 0xd08cb80f, 0x6400cb00, 0x3ec80cb0, 0x132c02cb, 0x0032c00f,
+ 0xb003f004, 0x20000000, 0x00000000, 0xc8052f20, 0x0f4023c0, 0x0ab0023e,
+ 0x28896036, 0xe808b002, 0x1c00d848, 0x0c701eb0, 0x02e720b3, 0x0022c40b,
+ 0x3702ee00, 0xdb4376d0, 0x8db0020f, 0x80db52b6, 0xd20cbc0f, 0x2d44db60,
+ 0x2ed80db0, 0x036dc0d3, 0x0036c00b, 0xb002f200, 0x40000000, 0x00000000,
+ 0xe0054280, 0x834020c0, 0x1830024f, 0x00824260, 0x1248000a, 0x8c108080,
+ 0x08100b30, 0x02c301b3, 0x0020d44b, 0x3022c400, 0x83422400, 0x08080201,
+ 0x00808060, 0x32090002, 0x000c830a, 0x2cc00830, 0x820e0083, 0x0020c00b,
+ 0x3002f800, 0x10000000, 0x00000000, 0xf0011600, 0x879021e0, 0x0a78025e,
+ 0x008f0027, 0x60587806, 0x9e009480, 0x2da08a78, 0x06d201bf, 0x90a1e01b,
+ 0x7802d600, 0x979127a0, 0x097d065e, 0x40979824, 0xc008fd4a, 0x16009780,
+ 0x2de10978, 0x125e0097, 0x8025e00b, 0x7802d804, 0x10000000, 0x00000000,
+ 0x49080844, 0xc30070c0, 0x08b003cc, 0x00831030, 0x810c8103, 0x8c82c040,
+ 0x38c20330, 0x02c090b3, 0x1030c40b, 0x3012cc40, 0x83002042, 0x08a44308,
+ 0x048a1120, 0x04093402, 0x0800c300, 0x3cc00c30, 0x030c00c3, 0x0030c40f,
+ 0x3003da02, 0x10000000, 0x00000000, 0x401dbc18, 0xff443fc0, 0x0ff003bc,
+ 0x02ff3039, 0xc40ff103, 0x7c20cf02, 0x3f409ef0, 0x02f80077, 0x126fc40d,
+ 0xf003dc50, 0xdf003dc0, 0x4ff003bc, 0x14ff123f, 0xcc0b7003, 0xfc04ff10,
+ 0x1fc44ff0, 0x03fc40f7, 0x003fc00f, 0xf003d004, 0x60000000, 0x00000000,
+ 0x8805e000, 0xfb0032c8, 0x2cb003ed, 0x80c9003e, 0xc00fb003, 0x6c81e806,
+ 0x3ec08fb0, 0x03a000f3, 0x0026c00b, 0xb001ec00, 0xeb0036c0, 0x6d900164,
+ 0x02c9003a, 0xc084800b, 0x2e00cb80, 0x32c00cb0, 0x23ec00db, 0x003ec00f,
+ 0xb003c200, 0x70000000, 0x00000000, 0xc0919800, 0xb30023cd, 0x187002cc,
+ 0x20850439, 0xc00b7002, 0xdcb08404, 0x2dc00b70, 0x26d400e6, 0x0021c00b,
+ 0x7001dc00, 0xb70029c0, 0x0e30029c, 0x00a70428, 0xc108f002, 0x9c00a700,
+ 0x29c00870, 0x12dc0087, 0x002dc00b, 0x7002f206, 0x60000000, 0x00000000,
+ 0x80009704, 0xb79021ec, 0x0878029e, 0xc987c029, 0xe20b7806, 0x5e82a581,
+ 0x29e20b78, 0x12da00bf, 0xc025e00b, 0x7812de00, 0xa78024e0, 0x0878320e,
+ 0x2893802d, 0xe0197812, 0x4e019780, 0x21e00878, 0x22de0097, 0x802de00b,
+ 0x7802c800, 0x20000000, 0x00000000, 0x4814cf00, 0xb300a2c0, 0x0a3002cc,
+ 0x01a34868, 0xd00b3c92, 0xcc00a341, 0x6cd20b30, 0x42cd80b3, 0x8020c043,
+ 0x30028c10, 0xb30020d0, 0x08309a8d, 0x00a30068, 0xd208300a, 0x8d21b300,
+ 0x28c10830, 0x02cc0083, 0x002cc00b, 0x3002d200, 0x30000000, 0x00000000,
+ 0xe815bb00, 0xfa003280, 0x0ca003a8, 0x00c6403b, 0xa40fea23, 0x6802ae40,
+ 0x3f910fa0, 0x01f980be, 0xc034800b, 0xa000e820, 0xea003790, 0x0ce41339,
+ 0x00de48bf, 0x802d6083, 0x79849a02, 0x228028a0, 0x23e800da, 0x003e800f,
+ 0xa003fa04, 0x70000000, 0x00000000, 0x4800c080, 0xf8003e00, 0x0d8003c0,
+ 0x02d8042a, 0x100b8003, 0xe004d840, 0x1e100f80, 0x03e100e8, 0x203e000f,
+ 0x8043e000, 0xf8423e06, 0x4f8503a0, 0x20f8043e, 0x040f8403, 0xe110e800,
+ 0x3e004f84, 0x13e004f8, 0x003e000f, 0x8003d200, 0x60000000, 0x00000000,
+ 0x0810e600, 0xc9003a40, 0x0c9003e4, 0x00c91016, 0x409f9001, 0x0400c988,
+ 0x3e400b90, 0x016404f9, 0x0036480c, 0x90032600, 0xf9903648, 0x0c100304,
+ 0x40c94832, 0x480c9203, 0x2440b921, 0x3e400e90, 0x032408c9, 0x203e400f,
+ 0x9003c204, 0x20000000, 0x00000000, 0x80046440, 0xa1402240, 0x1a9002e4,
+ 0x0089402e, 0x589b9002, 0x2610d980, 0x2e400b90, 0x02e700e1, 0x0222600d,
+ 0x10036680, 0xb1202a60, 0x08900a27, 0x8a892034, 0x400d980a, 0x2680b900,
+ 0x2e440890, 0x43640289, 0x802e400b, 0x9002e000, 0x10000000, 0x00000000,
+ 0x18052400, 0x89012a40, 0x089002e6, 0x0289002a, 0x40031002, 0xa4408910,
+ 0x2ef00b90, 0x06e481b9, 0x00264008, 0x91022485, 0xb9002040, 0x689c022c,
+ 0x00830026, 0x5009940a, 0x2401b909, 0x2c400a10, 0x02040089, 0x002e400b,
+ 0x9002ce00, 0x40000000, 0x00000000, 0x080406a0, 0xa3002050, 0x0a1402c6,
+ 0x00830028, 0x400b140a, 0x84009300, 0x2c400b10, 0x02cc00a9, 0x0020c009,
+ 0x10024401, 0xb100a044, 0x08110e04, 0x008110a4, 0x44099102, 0x0401b110,
+ 0x2c452831, 0x02444081, 0x002c400b, 0x1002ca05, 0x00000000, 0x00000000,
+ 0x380d6080, 0xc8003a00, 0x088023e0, 0x00c8013e, 0x000b8003, 0xa0008800,
+ 0x2e000f80, 0x036001f8, 0x0036001c, 0xa0022000, 0xb800329a, 0x0c868320,
+ 0xa0c86922, 0x1a2c8683, 0x20a0f042, 0x7c100e84, 0x030100c8, 0x003e000f,
+ 0x8003ee03, 0x50000000, 0x00000000, 0x980df4b0, 0xf96c3e51, 0x0f9003e5,
+ 0x08fd003f, 0x400ff003, 0x4500fd00, 0x3f400f90, 0x23f410ed, 0x023e400b,
+ 0x9011f400, 0x71001b49, 0x0fd203f4, 0x00fd243f, 0x4807d203, 0xf404f920,
+ 0x3e490f92, 0x13e480f9, 0x003e400f, 0x9003e604, 0x70000000, 0x00000000,
+ 0x1805f400, 0xbd28324c, 0x0e9003f4, 0x00cd0037, 0x404f9043, 0xd481cd00,
+ 0x33400f90, 0x43f401f9, 0x0033401f, 0xd003f400, 0xf5003348, 0x0ed29134,
+ 0x828d0139, 0x4008d113, 0x24898d00, 0x32440f90, 0x112410cd, 0x003e400f,
+ 0x9003e600, 0x70000000, 0x00000000, 0x7810e800, 0xe801200c, 0x080082e0,
+ 0x00d8002e, 0x000b8202, 0xe040a801, 0x22010b80, 0x00e000ba, 0x0022000b,
+ 0x8003e008, 0xb8002a0a, 0x888203a8, 0x40e84922, 0x03288102, 0xa000f020,
+ 0x2a084f00, 0x822020a8, 0x0026000b, 0x8002ce06, 0x30000000, 0x00000000,
+ 0x4805c400, 0xb100a848, 0x021202c4, 0x44838024, 0x404b1286, 0xc4098900,
+ 0xa0400b10, 0x024400b9, 0x0020c10b, 0x1002c400, 0xb100204d, 0x28128204,
+ 0x00813028, 0x44081068, 0x04498128, 0x64480b12, 0x3a040881, 0x002c400b,
+ 0x1002d200, 0x20000000, 0x00000000, 0x18152400, 0xab022840, 0x089002e4,
+ 0x0199002e, 0x409b9202, 0xe400ab10, 0x22490b90, 0x02ec00b9, 0x00a24019,
+ 0xb002a400, 0xb90122c2, 0x081042a4, 0x80a90002, 0x50981082, 0xa4412100,
+ 0x6e400b10, 0x460400a9, 0x002e400b, 0x9002c600, 0x20000000, 0x00000000,
+ 0xa010a500, 0xf9003a40, 0x0e9002e4, 0x00c90006, 0x480f9413, 0xe4004108,
+ 0x32780f90, 0x13e428b9, 0x50324003, 0x9022e608, 0xb100b250, 0x0c9a6326,
+ 0x00c9882a, 0x602c9403, 0x27828900, 0x36400f90, 0x132400c9, 0x003e400f,
+ 0x9003e804, 0x70000000, 0x00000000, 0xe800a480, 0xf1081640, 0x0e9007e4,
+ 0x00f9a03e, 0x640f9003, 0xe400e900, 0x3e600f90, 0x03e700f9, 0x003e400f,
+ 0x9003e440, 0xf9003e68, 0x0f9103a6, 0x20e9a83c, 0x480f9903, 0xec00f900,
+ 0x3ac0deb0, 0x13ec00f9, 0x0036400f, 0x9003f200, 0x60000000, 0x00000000,
+ 0x2810a122, 0xc8003e00, 0x4e800360, 0x00c80a3e, 0x040c8013, 0x0022f801,
+ 0x32004f80, 0x43e118f8, 0x0432000b, 0x8002e020, 0xf8003213, 0x0c800301,
+ 0x00c04032, 0x002c800b, 0x0000f820, 0x2a008f80, 0x036020f8, 0x003e000f,
+ 0x8003c204, 0x20000000, 0x00000000, 0x28043800, 0x8e802e81, 0x08a00319,
+ 0x008e000f, 0x8008a003, 0x3a00cec2, 0x23b006a0, 0x02f920b2, 0x0033940b,
+ 0xec02fa00, 0xbe032380, 0x28ed423b, 0x028ea0a3, 0x80cde103, 0x6844ee80,
+ 0x22820ba4, 0x032a00ba, 0x002e800b, 0xa002ca00, 0x40000000, 0x00000000,
+ 0x28054d00, 0x82402cc0, 0x0830020d, 0x6093002c, 0xf309300a, 0x4f00a3a0,
+ 0xa4d80b30, 0x02ce20b3, 0x00a4d00b, 0x36028f00, 0xb380a2d0, 0x0834468e,
+ 0x41834468, 0xc00b3c02, 0x0c08b341, 0x24c00b38, 0xc20c10b3, 0x002cc10b,
+ 0x3002ca00, 0x50000000, 0x00000000, 0x20010e00, 0x87402dc8, 0x087a0a0c,
+ 0x0397006d, 0x4019f906, 0x1d00840a, 0x25101a70, 0x00dc00bf, 0x0021c003,
+ 0x7082d420, 0xb74020c2, 0x0a340e1c, 0x01970529, 0xc209f462, 0x5c289708,
+ 0x25804b64, 0x421830b7, 0x002dc01b, 0x7002e004, 0x40000000, 0x00000000,
+ 0x28081a00, 0xc6802de0, 0x2879071e, 0x0097813d, 0xc00d7b02, 0x5e026481,
+ 0x75200f78, 0x01de00f7, 0x8035e00f, 0x78039600, 0xb78021e0, 0x2878038e,
+ 0x00c38429, 0xe02f7803, 0x1e21f780, 0xb5609f78, 0x0b1e00f7, 0x803de00f,
+ 0x7803e202, 0x00000000, 0x00000000, 0x081da000, 0xfb023ed1, 0x0fb303a0,
+ 0x00ea002c, 0x400e7603, 0xec00d000, 0x3a000fb0, 0x02ec00f3, 0x043ec10f,
+ 0xb013e000, 0x7a003e80, 0x8db003e4, 0x00eb0026, 0x000f0003, 0xe980eb00,
+ 0x1a800bb0, 0x03a9a0fb, 0x003ec00f, 0xb003c204, 0x60000000, 0x00000000,
+ 0x4005fe00, 0xdf8033f2, 0x0ff803fe, 0x40af903f, 0xe00ff803, 0x7e00ec82,
+ 0x3f244cf9, 0x01f608cf, 0x803b600f, 0xf203f640, 0xd78423e0, 0x0cf8033e,
+ 0x00ef9433, 0xe08c7803, 0x3e087f80, 0x13700cdc, 0x237e48df, 0x803fe00f,
+ 0xf803d000, 0x20000000, 0x00000000, 0xa811b884, 0xdf0021c8, 0x0e7202dc,
+ 0xc0b7002d, 0xd0037002, 0x9400f400, 0x2d002870, 0x02d840a7, 0x0021808f,
+ 0x4002d400, 0x05002bc8, 0x8a76021d, 0x00bc3a03, 0xc82a7123, 0xdc10bc00,
+ 0x2980c840, 0x22184087, 0x002dc00b, 0x7002ea06, 0x20000000, 0x00000000,
+ 0x00009c09, 0x861021c0, 0x427012dc, 0x00b5002d, 0xc00bf002, 0x1c00a410,
+ 0x27021a70, 0x22fc008f, 0x0029c00b, 0x7102f401, 0x87002140, 0x08000018,
+ 0x00a70121, 0xc019f002, 0x1400b700, 0x21440851, 0x025c0197, 0x002dc00a,
+ 0x7002c600, 0x20000000, 0x00000000, 0x6014c180, 0x920220c0, 0x8a3002c0,
+ 0x00b0406c, 0x980b3402, 0x8410b0c9, 0x2c320a30, 0x02c100a3, 0x6020004a,
+ 0x0002c208, 0x8000282c, 0x0a800000, 0x80b08220, 0x001b0c2a, 0xc740b800,
+ 0x28800810, 0x06080183, 0x002cc00b, 0x3002d800, 0x20000000, 0x00000000,
+ 0x2815a400, 0xcb00b3c0, 0x0ef002ec, 0x00fb403e, 0x520ff103, 0x2c00a84a,
+ 0x26300eb0, 0x02c7408b, 0x803a4083, 0xb042e402, 0x8b0032f0, 0x0cb20b2e,
+ 0x24eb1022, 0xcc0db98b, 0x2d00bb00, 0x32c02ca0, 0x036c00db, 0x003ec00f,
+ 0xb003ca84, 0x60000000, 0x00000000, 0x8000ee04, 0xf2043ec0, 0x0eb013ed,
+ 0x10f9003e, 0x400ff803, 0xac00f800, 0x3e000db0, 0x03e540fb, 0x103e500f,
+ 0xb403e450, 0xeb023e50, 0x0f8003e9, 0x00fb413c, 0xc04eb403, 0xe800fb40,
+ 0x3f800fa4, 0x036100fb, 0x003ec00f, 0xb003e400, 0x30000000, 0x00000000,
+ 0x0110f200, 0xff0031c0, 0x0cf003fc, 0x00df0833, 0x401ff003, 0xd440cc01,
+ 0x3f000ff0, 0x01f000ef, 0x00b3000f, 0xc203f400, 0x9d0033e4, 0x4cf0833c,
+ 0x00fc8033, 0xc00cf003, 0x5420cc01, 0x33400ef0, 0x233c48cd, 0x803fc00e,
+ 0xf003e864, 0x30000000, 0x00000000, 0x80046200, 0xbac122c0, 0x08b002c1,
+ 0x80800022, 0x700bb012, 0xe50088c0, 0x2e220bb0, 0x22e300d3, 0x00223209,
+ 0x8c02e300, 0xb0802220, 0x0a810f60, 0x00b87022, 0x60088c03, 0x206088f0,
+ 0x36000db4, 0x03208099, 0x802ec10b, 0xb002e840, 0x10000000, 0x00000000,
+ 0x80056440, 0xb98022c0, 0x08b002e0, 0x809a2022, 0x200bb006, 0xe9008880,
+ 0x2e200bb0, 0x02e6008b, 0x00226043, 0xb042e301, 0x9b802080, 0x48b00224,
+ 0x80b30022, 0x700802a2, 0x2c018b00, 0x20480a00, 0x8a40009b, 0x202ec00b,
+ 0xb002e000, 0x40000000, 0x00000000, 0x08040800, 0xb10020c0, 0x2a3002c0,
+ 0x008081a0, 0x400b3002, 0xc00a8000, 0x2c000b30, 0x02c0009b, 0x05200009,
+ 0x00004000, 0xb100a000, 0x08004240, 0x00b00020, 0x40080006, 0x08028001,
+ 0x24800900, 0x02000293, 0x002cc00b, 0x3022c205, 0x00000000, 0x00000000,
+ 0x00082400, 0xf80033c0, 0x1cf003e0, 0x00d80032, 0x000bf043, 0xe001c800,
+ 0x3e000fb0, 0x03e000cb, 0x0022000f, 0x8047e019, 0xd9002200, 0x0c800220,
+ 0x00b80222, 0x400c8023, 0x2410c800, 0xb0400e00, 0x030000c9, 0x003ec00f,
+ 0xb003e003, 0x50000000, 0x00000000, 0xa01df000, 0xfc013fc0, 0x0df003f0,
+ 0x00ac002f, 0x000f7003, 0xd000fc02, 0x3d000ff0, 0x07d001d7, 0x00bf000d,
+ 0xc002d000, 0xfc023f00, 0x0fc003f0, 0x007c003f, 0x4087c003, 0xf005fc00,
+ 0x3b004fc0, 0x13b000ed, 0x003fc00f, 0xf003e804, 0x70000000, 0x00000000,
+ 0xc015fe00, 0xff803be0, 0x0ff803fe, 0x00ff803f, 0xe00df803, 0xf200ec90,
+ 0x37e00ff8, 0x07f210df, 0x803fc80f, 0xe843b240, 0xdf0133c0, 0x09f903fe,
+ 0x00ff4033, 0xd80ff803, 0xfe00ff80, 0x3be00ff8, 0x03fcc0ff, 0x803fe00f,
+ 0xf803f000, 0x70000000, 0x00000000, 0x8090ac00, 0xbb802ee0, 0x0bb802ee,
+ 0x08bb802e, 0xe00bb802, 0xe084c020, 0x22e003b0, 0x476208ab, 0x802ef00b,
+ 0xa802e080, 0xabc222d0, 0x0cb202cc, 0x08bf402a, 0xd40bb802, 0xee00bb08,
+ 0x32e00bb8, 0x42ed00bb, 0x802ee00b, 0xb802e004, 0x30000000, 0x00000000,
+ 0x0a048c20, 0xb30028c0, 0x0b3002cc, 0x00b3002c, 0xc0093002, 0xc020a800,
+ 0x2cc00a32, 0x82e000a3, 0x006cd00b, 0x0002e001, 0x934020da, 0x0b3002cc,
+ 0x00b33028, 0xc80b3002, 0xcc00b320, 0x28c00b30, 0x02ccc0a3, 0x002cc00b,
+ 0x3002ca00, 0x20000000, 0x00000000, 0xc004ac00, 0xbb002ec0, 0x0bb002ec,
+ 0x01bb0026, 0xc00bb002, 0xcc208884, 0x2ac00bb0, 0x02a304a8, 0x882eca0b,
+ 0xac02ec04, 0xab1022c0, 0x0bb002ec, 0x00bb002a, 0xc00bb002, 0xec00bb00,
+ 0x2ec00bb0, 0x02ec00bb, 0x002ec00b, 0xb002f804, 0x70000000, 0x00000000,
+ 0x4105ec10, 0xfb007ac0, 0x0fb003ec, 0x00fb003e, 0xc00db003, 0xe040e080,
+ 0x3ec00fb0, 0x02c208fa, 0xc43e700b, 0xa823a3c0, 0xdb0022c0, 0x2fb003ec,
+ 0x00fb013a, 0xc00bb003, 0xec00fb00, 0x3ac00fb0, 0x03ec00fb, 0x003ec00f,
+ 0xb003d044, 0x70000000, 0x00000000, 0xa041bc00, 0xff003fc0, 0x0ff003fc,
+ 0x00ff003f, 0xc00ff013, 0xf600cd00, 0x37c00ff0, 0x037420fe, 0x003fe00f,
+ 0xe001f400, 0xd780bdc8, 0x0cf003fc, 0x00f7003f, 0xc00ff003, 0xfc00ff00,
+ 0x33c00ff0, 0x03fc00ff, 0x003fc00f, 0xf003e800, 0x60000000, 0x00000000,
+ 0xc000ac00, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0xc00cb003, 0xe800f901,
+ 0x3ec04fb0, 0x13e418f9, 0xa232504f, 0x84236900, 0xff623751, 0x07b003ec,
+ 0x00cb003a, 0xc00fb003, 0xec00fb00, 0x3ec00fb0, 0x03ec00db, 0x003ec00f,
+ 0xb003f004, 0x20000000, 0x00000000, 0xc8052c00, 0xbb003ec0, 0x0bb002ec,
+ 0x00bb002e, 0xc00bb042, 0xee00b900, 0x22c00bb0, 0x01a500b8, 0x4022f408,
+ 0x9002ce00, 0x8ba02240, 0x08b002ec, 0x00df0023, 0xc00bb002, 0xec00bb00,
+ 0x2ec00bb0, 0x12fc00bb, 0x002ec00b, 0xb002f200, 0x40000000, 0x00000000,
+ 0xc0104c00, 0xb3002cc0, 0x0b30024c, 0x00b3002c, 0xc00a3042, 0xc200b000,
+ 0x24c00930, 0x02c00093, 0x4024804a, 0x3002c200, 0xa3c220c0, 0x0a3022cc,
+ 0x00830008, 0xc10b3002, 0xcc00bb00, 0x2cc00b30, 0x02cc0093, 0x002cc00b,
+ 0x3002f800, 0x50000000, 0x00000000, 0x60105e00, 0xb7802de0, 0x0b7802de,
+ 0x00b7802d, 0xe00b7822, 0xda05b588, 0x69e00b79, 0x02d600b7, 0x0024a000,
+ 0x7c02da10, 0x809020e4, 0x0878025e, 0x00978221, 0xe00b7806, 0xde00b780,
+ 0x2de00b78, 0x02de00b7, 0x802de00b, 0x7802d800, 0x40000000, 0x00000000,
+ 0x48084c10, 0xf3003cc0, 0x0f3003cc, 0x00f3002c, 0xc00e3027, 0xc420f100,
+ 0x3cc00f30, 0x03c42072, 0x10348e4a, 0x1043e428, 0xe300b0c0, 0x0e3013cc,
+ 0x00cb0038, 0xc00f3003, 0xcc00f300, 0x3cc00f30, 0x13cc01d3, 0x003cc00f,
+ 0x3003d202, 0x00000000, 0x00000000, 0x4045bc04, 0xff013bc0, 0x0bf003fc,
+ 0x00ff003f, 0xc00ff103, 0xfc04fd03, 0x37c00ff0, 0x43b400f4, 0x203b944e,
+ 0xf013fc00, 0xec083bc0, 0x0ef003fc, 0x08ff183f, 0xc00ff003, 0xfc00ff00,
+ 0x3fc00ff0, 0x03fc00ff, 0x003fc00f, 0xf003d006, 0x60000000, 0x00000000,
+ 0x0804ae00, 0xdb007ec0, 0x0fb003ec, 0x00fb003e, 0xc00fb003, 0xec00f800,
+ 0x1ec00fb8, 0x03a001fa, 0x013e588e, 0xa011ee00, 0xd70033a0, 0x0cb003ee,
+ 0x00cb2033, 0xc10cb003, 0xec00fb00, 0x3ec00fb0, 0x03ec00cb, 0x003ec00f,
+ 0xb003c200, 0x60000000, 0x00000000, 0xc018bc00, 0x87006dc0, 0x0b7002dc,
+ 0x00b7002d, 0xc10b7002, 0xdc00e500, 0x2dc00bf0, 0x035400b6, 0x046d400b,
+ 0x6012dc00, 0x24a22ba1, 0x0d70027c, 0x00d72833, 0xd01a7002, 0xdc00b700,
+ 0x2dc00b70, 0x02fd0087, 0x002dc00b, 0x7002f004, 0x20000000, 0x00000000,
+ 0x20009e00, 0x978129e0, 0x097802de, 0x00b7802d, 0xe00b7802, 0xde009581,
+ 0x2de00378, 0x021608b6, 0x802de00b, 0x6802fe01, 0x97802124, 0x097802de,
+ 0x0083a125, 0xe8187802, 0xde00b780, 0x2de00b78, 0x02de8287, 0x802de00b,
+ 0x7802c000, 0x20000000, 0x00000000, 0x68048c00, 0x83002cc0, 0x0b3002cc,
+ 0x00b3000c, 0xc00b3002, 0xcf20a3c0, 0x2cc00b30, 0x024c81b2, 0x402cf20b,
+ 0x3002cf80, 0x93c028f0, 0x19b0024c, 0x00930022, 0xc00a3002, 0xcc00b300,
+ 0x2cc04b30, 0x02cc0083, 0x002cc00b, 0x3002d204, 0x20000000, 0x00000000,
+ 0xe815e800, 0xda003e80, 0x0da003e8, 0x00ba002e, 0x800fa002, 0xf920fe90,
+ 0x3e810fa0, 0x023a80fe, 0x602ea80f, 0xe701fb00, 0xde802390, 0x09a002e8,
+ 0x00ca04e6, 0x800ca003, 0xe800fa00, 0x3e800fa0, 0x03e800ca, 0x002e800f,
+ 0xa003fa04, 0x60000000, 0x00000000, 0x4801a000, 0xf8003e01, 0x8f8003e0,
+ 0x00f8003e, 0x000b8003, 0xe000f810, 0x3e000f80, 0x036100f8, 0x083e000f,
+ 0x8003e040, 0xe8183e0c, 0x0f8003e0, 0x00f0023e, 0x000f8003, 0xe000f800,
+ 0x3e000f80, 0x03e000f8, 0x003e000f, 0x8003d200, 0x30000000, 0x00000000,
+ 0x0810a400, 0xf9003e40, 0x0f9003e4, 0x00f9007e, 0x400f9043, 0xe440f900,
+ 0x3e400f90, 0x03e600e9, 0x007ee00f, 0x98036600, 0xd1203240, 0x0e900324,
+ 0x40f90036, 0x400c9003, 0xe400f900, 0x3e400f90, 0x03c400c9, 0x003e400f,
+ 0x9003d204, 0x30000000, 0x00000000, 0x80046400, 0xb9002e40, 0x0b9002e4,
+ 0x00b9002e, 0x400b9002, 0xe600b984, 0x2e400990, 0x03c41089, 0x822e604b,
+ 0x15022400, 0xbd842340, 0x0b9003a4, 0x04b90022, 0x400a9002, 0xe400b900,
+ 0x2e400b90, 0x02e40089, 0x002e400b, 0x9002e000, 0x10000000, 0x00000000,
+ 0x38052400, 0xb9002e40, 0x0b9002e4, 0x00b9002e, 0x400b9002, 0x6404bb10,
+ 0x2a400b90, 0x02e44029, 0x88264409, 0x901a2480, 0xbb0222c0, 0x0b900225,
+ 0x00b90022, 0x40089002, 0xe400b900, 0x2e400b90, 0x02e40089, 0x042e400b,
+ 0x9002c600, 0x40000000, 0x00000000, 0x28140440, 0xb1002c40, 0x0b1002c4,
+ 0x00b1002c, 0x400b1042, 0xc451b110, 0x2c400b14, 0x02c40081, 0x012cc00b,
+ 0xb0020444, 0xb3002044, 0x191402c5, 0x00b11020, 0x442a1002, 0xc400b110,
+ 0x2c400b10, 0x02c44081, 0x012c400b, 0x1002c201, 0x00000000, 0x00000000,
+ 0x380d6100, 0xf8003e00, 0x0f8003e0, 0x00f8002e, 0x000f8003, 0xe1007840,
+ 0x3a000f80, 0x03e800e8, 0x02260a05, 0x80136100, 0xf828321a, 0x0f800320,
+ 0x00f840b2, 0x100c8003, 0xe000f840, 0x3e000f80, 0x03e1a0c8, 0x003e000f,
+ 0x8003de03, 0x50000000, 0x00000000, 0x9805e480, 0xf9003e40, 0x0f9003e4,
+ 0x01f9007e, 0x400f9007, 0xf480fd20, 0x3e400d90, 0x03b410fd, 0x010e400f,
+ 0xd003d480, 0xbd00ff48, 0x0f9003a4, 0x04f9603a, 0x580f9003, 0xe400f920,
+ 0x36400f90, 0x03e482f9, 0x003e400f, 0x9003e602, 0x70000000, 0x00000000,
+ 0x1805e404, 0xf9002a40, 0x0f9003e4, 0x00f9003e, 0x400f9043, 0xc400f900,
+ 0x3e400f91, 0x037400dd, 0x003f400f, 0xd003f400, 0xf5003340, 0x0c900374,
+ 0x40c9003a, 0x400d9003, 0xe400f900, 0x3e400f90, 0x03e400f9, 0x003e400f,
+ 0x9003c600, 0x70000000, 0x00000000, 0x3818e000, 0xb8002e00, 0x0b8002e0,
+ 0x00b8002e, 0x000b8002, 0xe004b800, 0x2e000b80, 0x0220000a, 0x002e004b,
+ 0x8013a004, 0xba002201, 0x088203a0, 0x80d84022, 0x00088002, 0xe000b820,
+ 0x2e000b80, 0x02e020b8, 0x002e000b, 0x8002ce04, 0x30000000, 0x00000000,
+ 0x48008400, 0xb1002c40, 0x0b1002c4, 0x00b1002c, 0x400b1002, 0xc400b100,
+ 0x2c400b10, 0x02440491, 0x012c404b, 0x3002c410, 0xb104a041, 0x081282c4,
+ 0x8c811528, 0x45091002, 0xc400b128, 0x2c400b10, 0x02c440b1, 0x002c400b,
+ 0x1002d201, 0x70000000, 0x00000000, 0x9804a400, 0xb9002e40, 0x0b9002e4,
+ 0x00b9002e, 0x400b9002, 0xe480b908, 0x2e400b90, 0x0665848b, 0x012ee00b,
+ 0x9406ed40, 0xb9002250, 0x089002a4, 0x0499002a, 0x40089002, 0xe400b900,
+ 0x2e400b90, 0x02e400b9, 0x002e400b, 0x9002f604, 0x60000000, 0x00000000,
+ 0xa015e400, 0xb9003a40, 0x0f9003e4, 0x00f9003e, 0x400f9003, 0xe420f940,
+ 0x3e400f90, 0x036600d9, 0x802e600f, 0x9403e704, 0xf9c02344, 0x2c9017e4,
+ 0x0489003a, 0x400d9003, 0xe400f900, 0x3e400f90, 0x03e400f9, 0x003e400f,
+ 0x9003f804, 0x70000000, 0x00000000, 0xc801a400, 0xf9003e40, 0x0f9003e4,
+ 0x00f9003e, 0x400f9003, 0xec007b40, 0x3e400f90, 0x07a410f9, 0x903e400f,
+ 0x9a03a420, 0xf1207c40, 0x0d9007a4, 0x00f90036, 0x400f9003, 0xe400f900,
+ 0x3e400f90, 0x03e400f9, 0x003e400f, 0x9003fa00, 0x60000000, 0x00000000,
+ 0x0810a000, 0xe8003e00, 0x0f8003e0, 0x00f8003a, 0x000f8002, 0xe100c800,
+ 0x3e000f80, 0x03a100f8, 0x023a068f, 0x8c03e144, 0xf808b610, 0x0e8003a0,
+ 0x80f000b2, 0x000c8003, 0xe000f800, 0x3e000f80, 0x03e000f8, 0x003e000f,
+ 0x8003ca04, 0x20000000, 0x00000000, 0x28052800, 0x8a002e80, 0x0ba002e8,
+ 0x00ba002e, 0x8003a002, 0xe8408a00, 0x3e800ba0, 0x02db40be, 0x082f800b,
+ 0xe043b809, 0xbea02280, 0x08a002bb, 0x00ba0022, 0x800da002, 0xe8009a00,
+ 0x2e800ba0, 0x03a800ba, 0x002e800b, 0xa002ca00, 0x40000000, 0x00000000,
+ 0x28040c00, 0xa3002cc0, 0x0b3002cc, 0x00b30028, 0xc01b3002, 0xcf528310,
+ 0x2cc00bb0, 0x028d00b3, 0x2108d08b, 0x10028f10, 0xb30020c0, 0x8b3002af,
+ 0x00b30022, 0xc00a3002, 0xcc00b300, 0x2cc00b30, 0x028c00b3, 0x002cc00b,
+ 0x3002ca00, 0x10000000, 0x00000000, 0x80005e00, 0x87002dc0, 0x0b7002dc,
+ 0x00b7002d, 0xc00b7002, 0xfe098500, 0x2dc00b73, 0x02dd10b7, 0x002dc00b,
+ 0x50029400, 0xb70621c8, 0x197a021d, 0x00b72021, 0xc80b7002, 0xdc009720,
+ 0x2dc00b70, 0x029cc0b7, 0x002dc00b, 0x7002e800, 0x10000000, 0x00000000,
+ 0x88083e00, 0xe7803de0, 0x0f7802de, 0x00f78039, 0xe00f7803, 0xd600c790,
+ 0x2de00f7a, 0x039e00f7, 0x8439600f, 0x58139e10, 0xb78033e8, 0x0ff90392,
+ 0x00f3a023, 0xe80e7803, 0xde00f7a0, 0x3de00f78, 0x039e80f7, 0x803de00f,
+ 0x7803ea02, 0x10000000, 0x00000000, 0x081dac00, 0xfb003ec0, 0x0fb003ec,
+ 0x00fb003e, 0xc00fb003, 0xed00fb04, 0x3ac04ff0, 0x03ec00fb, 0x003e000f,
+ 0x90022408, 0xfa003be0, 0x0ef303e0, 0x08fb063e, 0xe00db003, 0xec00fb10,
+ 0x3ec00fb0, 0x03ac00fb, 0x013ec00f, 0xb003c206, 0x60000000, 0x00000000,
+ 0x0014be20, 0xff803fe0, 0x0ff803fe, 0x00ff803f, 0xe00ff803, 0xfb00dd90,
+ 0x37e08ffd, 0x037e405f, 0x923fe00f, 0x5103be00, 0xffb033e2, 0x4cf843be,
+ 0x00cf883f, 0xe20df803, 0xfe00ff80, 0x3fe00ff8, 0x03fe00ff, 0x803fe40f,
+ 0xf803c000, 0x70000000, 0x00000000, 0xa8109c40, 0xb7003dc0, 0x0b7002dc,
+ 0x00b7002d, 0xc00f7016, 0xd040b500, 0x6dc00b70, 0x121c40b5, 0x182d440b,
+ 0x54021c50, 0xe51821c0, 0x087002bc, 0x00d7202d, 0xc8087002, 0xdc40e700,
+ 0x39c40b70, 0x02dc00e7, 0x002dc00b, 0x7042ea44, 0x60000000, 0x00000000,
+ 0x00009c00, 0xb7002dc0, 0x0b7002dc, 0x00b7002d, 0xc00b7002, 0xd020b700,
+ 0x6dc00b70, 0x225005b5, 0x002dc009, 0x61869400, 0xb32020c0, 0x0a70025c,
+ 0x00870125, 0xc0197002, 0xdc00b700, 0x2dc00b70, 0x02dc00b7, 0x002dc11b,
+ 0x7002c000, 0x20000000, 0x00000000, 0x2014cc00, 0xb30028c0, 0x0b3002cc,
+ 0x0033000c, 0xc00a3002, 0xc328b380, 0x2cc00b30, 0x020201b1, 0xe10c400b,
+ 0x2e020720, 0xb14000f1, 0x0a3002cc, 0x0093002c, 0xc0083002, 0xcc08a300,
+ 0x28c00b30, 0x02cc00a3, 0x002cc00b, 0x3002c804, 0x30000000, 0x00000000,
+ 0xa805fc00, 0xfb002ec0, 0x0fb003ec, 0x00fb002e, 0xc00bb002, 0xcd007ad0,
+ 0x2ec00ff0, 0x136f40d9, 0x820e2809, 0x9c02a584, 0xfa8422d2, 0x2ef0026c,
+ 0x00cf003f, 0xc00db003, 0xec00ff00, 0x2ec00fb0, 0x03fc00fb, 0x003ec00f,
+ 0xb003ea04, 0x70000000, 0x00000000, 0x8011ac00, 0xfb003ec0, 0x0fb003ec,
+ 0x00fb003e, 0xc04fb003, 0xed00f850, 0x3ec00bf0, 0x03e140f8, 0x403e000f,
+ 0x8403e500, 0x62403cc2, 0x0df005ad, 0x00fb003e, 0xc00fb003, 0xec00fb00,
+ 0x3ec00fb0, 0x03ec00fb, 0x003ec00f, 0xb003e000, 0x60000000, 0x00000000,
+ 0x2110bc00, 0xff003fc0, 0x0ff003fc, 0x00ff003f, 0xc00ff003, 0xfe00ec80,
+ 0x3fc00ff0, 0x113c00fc, 0x003b400f, 0xf0023400, 0xfd083bc0, 0x0cf0133e,
+ 0x00f70034, 0xc00df003, 0xfc01ff00, 0x3bc00ff0, 0x03fc00ff, 0x003fc00f,
+ 0xf003c044, 0x20000000, 0x00000000, 0xa1046c00, 0xbb002ec0, 0x0bb002ec,
+ 0x00bb002e, 0xc00bb002, 0xec688880, 0x2ec00bb0, 0x02a280b8, 0x802e300b,
+ 0x20036700, 0xe84022c0, 0x08b002ec, 0x00bb0022, 0xc00cb002, 0xec00db00,
+ 0x2ec00bb0, 0x02ec00bb, 0x002ec00e, 0xb002e040, 0x10000000, 0x00000000,
+ 0x80052c00, 0xbb002ec0, 0x0bb002ec, 0x00bb002e, 0xc00bb002, 0xec00a828,
+ 0x2ec00b30, 0x02ac41b9, 0x802ee00b, 0x9802aa01, 0xbb182ac0, 0x0a30026d,
+ 0x80bb0026, 0xc009b002, 0xec00bb00, 0x2ec00bb0, 0x06ec00bb, 0x002ec00b,
+ 0xb002e000, 0x40000000, 0x00000000, 0x08140c00, 0xb3002cc0, 0x0b3002cc,
+ 0x00b3002c, 0xc0093002, 0x6c008000, 0x2cc08b30, 0x128010b1, 0x006c400b,
+ 0x0002c801, 0xa10028c1, 0x0a3006cc, 0x00b30020, 0xc0083002, 0xcc008300,
+ 0x2cc00b30, 0x06cc00b3, 0x002cc00a, 0x3012c201, 0x00000000, 0x00000000,
+ 0x000d6c00, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0xc00fb017, 0xec08e804,
+ 0x2ec00b70, 0x03a000f8, 0x003ec00f, 0xa047a000, 0xb9003ac0, 0x0a70032c,
+ 0x007b0036, 0xc00db003, 0xec00bb00, 0x3ec00fb0, 0x03ec00fb, 0x003ec00f,
+ 0xb003c003, 0x50000000, 0x00000000, 0xa015fc00, 0xff003fc0, 0x0ff003fc,
+ 0x00ff007f, 0xc00ff013, 0xfc00fc00, 0x3fc00ff0, 0x03f000fd, 0x003f401f,
+ 0xe0037000, 0x6d0037c0, 0x4df007bc, 0x00ff003f, 0xc00ef003, 0xfc10ff00,
+ 0x3fc00ff0, 0x03fc00ff, 0x043fc00e, 0xf003e806, 0x70000000, 0x00000000,
+ 0xc005f000, 0xf4913120, 0x4dc82352, 0x00c7003d, 0x244c4903, 0x5200e480,
+ 0x73208fc8, 0x03fc806c, 0x823b200e, 0xc803f000, 0xcc240f00, 0x4ed0233e,
+ 0x00fc0423, 0x0007d203, 0xf244cc20, 0x3de00df8, 0x037e00ff, 0x803fe08c,
+ 0xf2037000, 0x70000000, 0x00000000, 0x8010e400, 0xb8202220, 0x0ba802a2,
+ 0x008fd02e, 0x08088222, 0x22048880, 0x2a200b88, 0x02fe4888, 0x803a200b,
+ 0x8802c310, 0x88d02e30, 0x889c47ae, 0x00e8c22a, 0x30499906, 0xe0848990,
+ 0x2ee00cb8, 0x02ae00bb, 0x802ec280, 0x3182a004, 0x30000000, 0x00000000,
+ 0x0805c800, 0xb0202000, 0x0bb00240, 0x0083006c, 0x00088212, 0x80008000,
+ 0x2c000a00, 0x42cc1020, 0x0028000b, 0x0802c100, 0x90002c10, 0x0814120c,
+ 0x10b04060, 0x110b1002, 0xc4808100, 0x28c009b0, 0x028c00b3, 0x002cc82a,
+ 0x32024201, 0x70000000, 0x00000000, 0xc015ae00, 0xb319aac2, 0x0ba842a7,
+ 0x008b002c, 0x20288202, 0x2612a884, 0x2e200390, 0x00ec10a8, 0x202e201b,
+ 0x9806ec00, 0x9b002e10, 0xc89802ec, 0x18ba2002, 0x821bb042, 0xec0489c0,
+ 0x2ec409b0, 0x82ac00bb, 0x002cc002, 0xb002b804, 0x60000000, 0x00000000,
+ 0x0014e280, 0xf88032a4, 0x8d080342, 0x10cb001e, 0x220c8003, 0x2224e8c9,
+ 0x2e200e82, 0x02ec00e8, 0x403a300f, 0x8843e150, 0xd8c13e20, 0x2e9c422c,
+ 0x00f840b2, 0x300f9902, 0xe900c9c0, 0x38f80d30, 0x236c00fb, 0x003ec006,
+ 0xb0134004, 0x20000000, 0x00000000, 0xe100b020, 0xfd803780, 0x0be08370,
+ 0x00ff0a1f, 0x000fc81b, 0xf400dc00, 0x3b000fea, 0x42dc04dc, 0x021b404f,
+ 0xc013d602, 0xe8453fc4, 0x1f3003bc, 0x00ed013f, 0x449d9023, 0xf800fd00,
+ 0x3fc08efa, 0x03fc00ff, 0x003fc14d, 0xf003f860, 0x20000000, 0x00000000,
+ 0xc010ad40, 0xfa0136c3, 0x0e900367, 0x06cb1036, 0x000c8403, 0xe004e801,
+ 0x3a140cb1, 0x83fc80f8, 0x083e500f, 0x92032820, 0xdb0030c4, 0x8bb4032c,
+ 0x50b34876, 0xd41f9043, 0x2c80f90c, 0x36c80cb4, 0x03ac80cb, 0x003ec00d,
+ 0xb003b004, 0x20000000, 0x00000000, 0xc8052f00, 0xbb0022d0, 0x08aa02e4,
+ 0x008fc022, 0x00080002, 0x055050c0, 0x02308db8, 0x02fe008a, 0x4022710e,
+ 0x9c03ed00, 0x8b8022e4, 0x0bbc022e, 0x10bbc82e, 0xe00bb403, 0x2c00b900,
+ 0x2e420db5, 0x836c00db, 0x000ec00b, 0xf1837200, 0x00000000, 0x00000000,
+ 0xe2054900, 0x10002480, 0x0a0c12c0, 0x00a3042c, 0x00080002, 0x814180d8,
+ 0x28220a00, 0x524d0010, 0x40682c0b, 0x0c12c000, 0x904c2020, 0x8b14c20f,
+ 0x80b0812c, 0x220b10c2, 0x2100b1d0, 0x2cf00830, 0x020d0083, 0x002cc009,
+ 0xb802b800, 0x50000000, 0x00000000, 0x62011e40, 0xbe8023e0, 0x087802d6,
+ 0x00a7856f, 0x2068c800, 0x32000c80, 0x21200b78, 0x02ce0894, 0x8021600a,
+ 0x5802fac0, 0x878421e4, 0x4b68a21e, 0x0197852d, 0xe0095882, 0x5600b780,
+ 0x6fe409f8, 0x025e0097, 0x802de00b, 0x78025800, 0x40000000, 0x00000000,
+ 0x48080800, 0xd1123400, 0x4a3407c0, 0x00a3003c, 0x008c0403, 0xc400a032,
+ 0x28040e22, 0x03cce0f0, 0x1038400f, 0x00834480, 0xd048a0c0, 0x0f32030c,
+ 0x40b1402c, 0x400b1213, 0x0540f110, 0x2cc00c30, 0x038c00c3, 0x003cc00d,
+ 0x32039202, 0x00000000, 0x00000000, 0x401dbc04, 0xff003fc0, 0x0ff007f4,
+ 0x00df1a33, 0x440fc003, 0xf443fc10, 0x3d050df0, 0x07fd40e4, 0x003b408f,
+ 0x50037c80, 0x3f103fc0, 0x07f009fc, 0x00ff103f, 0xc40ff02b, 0xbc10ff00,
+ 0x3fc00f51, 0x03dc40ff, 0x103fc01f, 0xf003d006, 0x60000000, 0x00000000,
+ 0xa805ee00, 0xcb002ec0, 0x0fa003e4, 0x00cb0832, 0x004b8002, 0xe400f800,
+ 0x3a000f90, 0x033cc0f8, 0x013e2001, 0x9803ac00, 0xcb003200, 0x4c10012c,
+ 0x00ea8032, 0x80059003, 0xec00f900, 0x3ac00cb0, 0x230e00cb, 0x003ec00f,
+ 0xb103e200, 0x70000000, 0x00000000, 0xc811bc00, 0x87002dc0, 0x8b7002d4,
+ 0x02a70025, 0x800b4002, 0xd400b400, 0x6d400b70, 0x129c00b7, 0x002d4080,
+ 0x50069c08, 0x870021c0, 0x0860021c, 0x08370028, 0xc0085002, 0xdc40b701,
+ 0x2dc00a60, 0x029c00a7, 0x002dc00b, 0x7002f204, 0x60000000, 0x00000000,
+ 0xc0009a00, 0x87802df0, 0x4b7802d6, 0x00a3a021, 0x630b4802, 0xd600b480,
+ 0x6de00bf8, 0x021e80b5, 0x882d628b, 0xd8a24e02, 0x838120e0, 0x78f8025e,
+ 0x00b38025, 0xf0087802, 0xde01b580, 0x2da00878, 0x021e0087, 0x802de00b,
+ 0x7a02f800, 0x20000000, 0x00000000, 0x4814c903, 0x834a2cc0, 0x8b3902ce,
+ 0x80a30064, 0xe00b3a46, 0xcd24b300, 0x2ce24b38, 0x428c10b3, 0x802cf808,
+ 0x3602cc20, 0x83d020e4, 0x0030024c, 0x0093e020, 0xe1883906, 0xce24b340,
+ 0x2cd00a33, 0x028c00a3, 0x002ec00b, 0x3002d204, 0x30000000, 0x00000000,
+ 0xe815b800, 0xce202f90, 0x0f6803d9, 0x00e204b3, 0x940fe803, 0xf880be70,
+ 0x3f92036b, 0x022800fe, 0x403f810f, 0xe8037820, 0xce00b3b4, 0x88620268,
+ 0x00fe40b7, 0x802ca803, 0xea00fe00, 0x3fb00cec, 0x032802ca, 0x003e800f,
+ 0xa002fa04, 0x60000000, 0x00000000, 0x4800e000, 0xf8003e10, 0x0f8003e1,
+ 0x42f8403a, 0x000f8143, 0xe000b800, 0x7e100f80, 0x03e100f8, 0x083e1087,
+ 0x8402a004, 0xf8403c01, 0x0f840ba0, 0x10f8103e, 0x121e8413, 0xe148f848,
+ 0x3e0c0f80, 0x03e000f8, 0x003e000f, 0x8403d200, 0x30000000, 0x00000000,
+ 0x0810e520, 0xf9003242, 0x0f9c0366, 0x40d90032, 0x400f9003, 0xe448d944,
+ 0x3e604f91, 0x03850ad9, 0x403e600f, 0x9c03c400, 0xd1083240, 0x0c992365,
+ 0x01f9007c, 0x400c1023, 0x2c00f940, 0x3e400c91, 0x132400f9, 0x003e400c,
+ 0x19438204, 0x30000000, 0x00000000, 0x80046500, 0xb9042a52, 0x0b920225,
+ 0x00892022, 0x40439002, 0xe600e901, 0x2e420b98, 0xe3658089, 0x402e420b,
+ 0x9e02e400, 0x89012278, 0x08908224, 0x01b9806e, 0x70089882, 0x25009940,
+ 0x2c620d18, 0x836500b9, 0x002e4008, 0x90022000, 0x10000000, 0x00000000,
+ 0x18042420, 0xb1002260, 0x0b900264, 0x24998022, 0x40039006, 0xe421b900,
+ 0x2ec40b90, 0x02a4008b, 0x002ec40b, 0x9046ec00, 0x99c02244, 0x08b01264,
+ 0x00b9202e, 0x541a9202, 0x2600b900, 0x2e440990, 0x022420b9, 0x002e4028,
+ 0x90828600, 0x40000000, 0x00000000, 0x080004a0, 0xb1402840, 0x0b100204,
+ 0x008100a0, 0x510b1402, 0xc400a100, 0x2c400b10, 0x22440091, 0x812c408b,
+ 0x1002cc00, 0x8100a040, 0x68900206, 0x00b1802c, 0x40381012, 0x04409100,
+ 0x2c400910, 0x124400b1, 0x002c4408, 0x11020200, 0x00000000, 0x00000000,
+ 0x38086080, 0xf8047200, 0x0b800360, 0x08d80422, 0x000f8023, 0xe011fa00,
+ 0x3e008f80, 0x23a000c8, 0x003e008f, 0x8043e0a0, 0xd828320a, 0x4c828b60,
+ 0x04b8282e, 0x0b0e8283, 0x2900fa28, 0x3e000d80, 0x032000f8, 0x003e100c,
+ 0x86838e02, 0x10000000, 0x00000000, 0x981dfca0, 0xfd002f40, 0x0fd003dc,
+ 0x00f9433f, 0x410fd003, 0xf4007d00, 0x3f401f50, 0x03a5006d, 0x003dc00f,
+ 0x5013f404, 0xfd042f41, 0x99f007e4, 0x10fd003f, 0xc00fd00b, 0xe480dd00,
+ 0x2d404f50, 0x03e40cf9, 0x003e484f, 0x9203e606, 0x70000000, 0x00000000,
+ 0x1805f400, 0xc9013341, 0x0ed043d4, 0x00cd0032, 0x400f9003, 0xb400fd00,
+ 0x7f400fd0, 0x03f480cd, 0x003f400f, 0xd023e400, 0xf9003e48, 0x2492c324,
+ 0x00f90032, 0x40089003, 0xf400b900, 0x3f400450, 0x037400c9, 0x003e400f,
+ 0xd2830600, 0x70000000, 0x00000000, 0x3810e000, 0x88202201, 0x088002e0,
+ 0x0888102a, 0x0a0b8202, 0x2800b802, 0x3a000ba0, 0x02e00488, 0x002e000b,
+ 0x8002e000, 0x3a102e00, 0x08800220, 0x00ba407a, 0x000ac002, 0xe000b800,
+ 0x2e802880, 0x02200288, 0x002e0a0b, 0x82020e04, 0x30000000, 0x00000000,
+ 0x0805e400, 0xa1286640, 0x081812c4, 0x00810460, 0x480b1282, 0x8410b100,
+ 0x2c400b10, 0x52c44481, 0x006c401b, 0x1000d448, 0xb5002d44, 0x08d00214,
+ 0x04b51029, 0x44085012, 0xc401b100, 0x2e400910, 0x02440081, 0x002c480b,
+ 0x128a0201, 0x70000000, 0x00000000, 0x1815a400, 0xa94026c4, 0x2ab002e4,
+ 0x8089002a, 0x400b1012, 0x2c00b911, 0x2a420b90, 0x02e40189, 0x282e408b,
+ 0x9082f501, 0xbd022f50, 0x08d00a3c, 0x00bf002f, 0x480ad002, 0xed083940,
+ 0x2e480992, 0x022c0089, 0x002e400b, 0x10020604, 0x60000000, 0x00000000,
+ 0xa210a500, 0xe9403658, 0x0c9813c7, 0x02c90032, 0x520f9883, 0xa400f960,
+ 0x2e505790, 0x03e40289, 0x013e608f, 0x9c02e700, 0xf9402e40, 0x0c910324,
+ 0x00f9402a, 0x400c9003, 0xe6007900, 0x3e600d9e, 0x034400c9, 0x003e400f,
+ 0x90022804, 0x20000000, 0x00000000, 0xa800a442, 0xd9c0ba62, 0x0d9c03e6,
+ 0x02f9002e, 0x400f9223, 0xe4a0f901, 0x3e650792, 0x03c400f9, 0x813e680f,
+ 0x9183e480, 0xf9493c64, 0x0f9803e4, 0x00f91838, 0x400f9943, 0xe680fb00,
+ 0x3e600c90, 0x23e400f9, 0x003e400f, 0x9083ea00, 0x20000000, 0x00000000,
+ 0x2a10a100, 0xf8413e00, 0x8f8203e1, 0x80d0003e, 0x100c8403, 0xe000f800,
+ 0x3e100f84, 0x83e000d8, 0x203e100f, 0x8503e100, 0xf840b202, 0x068c2320,
+ 0x20f040b2, 0x100c8003, 0xe080f834, 0x3e020c84, 0x43e000f8, 0x003e000d,
+ 0x8003ca04, 0x20000000, 0x00000000, 0x28051808, 0x3a012d90, 0x03e007b9,
+ 0x808e882e, 0x800aa062, 0xf900bec0, 0x2f900be6, 0x42fa408e, 0x002fa203,
+ 0xe403a840, 0xba083298, 0x18280228, 0x80bacc22, 0x9c8daa02, 0xf900eac0,
+ 0x2da8086e, 0x033a00ba, 0x002e8008, 0xe482ca00, 0x00000000, 0x00000000,
+ 0x28054c00, 0xbb002cd0, 0x0b31028f, 0x0093082c, 0xc0883002, 0xce00b388,
+ 0x2cfc0b3c, 0x02ce0083, 0x042cc20b, 0x30429340, 0xb4402120, 0x0a494212,
+ 0x00b4c021, 0x00084082, 0xcc00b300, 0x2cf00836, 0x028e80b3, 0x002cc008,
+ 0x3c02ca00, 0x50000000, 0x00000000, 0x21011c08, 0xb7202dc0, 0x0b5002bc,
+ 0x0097002d, 0xe40a7202, 0xd420b408, 0x2d000b40, 0x02dc2286, 0x022dc01b,
+ 0x70029410, 0xb78024c0, 0x88f0261c, 0x04b70221, 0xc0097042, 0xdc00a700,
+ 0x2d400870, 0x021c20b7, 0x002de828, 0x7002c800, 0x40000000, 0x00000000,
+ 0x20081a00, 0xf7aa3d60, 0x0f58039e, 0x00d7803f, 0xe40c7a43, 0xd6007484,
+ 0x2d200f48, 0x42c600c4, 0x803de00f, 0x78039600, 0xb38031e0, 0x4a780b1e,
+ 0x00f38120, 0xe04c7803, 0xd600f790, 0x3de00c78, 0x039e00f7, 0x803ff40c,
+ 0x7803c802, 0x00000000, 0x00000000, 0x081da400, 0xfb303e00, 0x4b9003a4,
+ 0x00eb003e, 0xd80fb683, 0xe400f804, 0x3e005f80, 0x03e000e8, 0x003e800f,
+ 0xa003a40c, 0xf8003ac0, 0x0f3001e0, 0x00fa043e, 0xc00fb020, 0xe400fb00,
+ 0x3cc00fb0, 0x03ac00fb, 0x003ec00f, 0x9003c206, 0x60000000, 0x00000000,
+ 0x4005fe00, 0xc7913be0, 0x4fd913fe, 0x406f801b, 0xe00df88b, 0x7600fc82,
+ 0x3f240fc9, 0x13fa804e, 0x803fe04c, 0xf303fe40, 0x7f8013e0, 0x0e78423e,
+ 0x48ef8093, 0xe10cf802, 0xfe404f80, 0x33c00c68, 0x033a00cf, 0x803fe00c,
+ 0xf8031004, 0x70000000, 0x00000000, 0xac119c00, 0xd71021c4, 0x0b4006dc,
+ 0xc0a60429, 0xc00bf002, 0x1401b410, 0x3d040b41, 0x02d18286, 0x402d428d,
+ 0x51239c60, 0xb7202180, 0x0b60121c, 0x40651029, 0xc00a6103, 0xbc44a600,
+ 0x21d40a70, 0x029c0087, 0x002dc00c, 0xe10a2a06, 0x60000000, 0x00000000,
+ 0x80009840, 0xaf526d40, 0x0b5482d8, 0x2aa50025, 0xc0097102, 0x9040b400,
+ 0x29008b41, 0x12c0c884, 0x002fc009, 0x70069810, 0x33002d40, 0x0ad0021c,
+ 0x50b70828, 0x00095802, 0xd4009600, 0x21c408f0, 0x021c0087, 0x102dc008,
+ 0x70022000, 0x20000000, 0x00000000, 0x64144590, 0xbb802414, 0x0b0802c3,
+ 0x00a0002c, 0xc04b3802, 0x8118b048, 0x2c101b08, 0x02c01080, 0x902c2209,
+ 0x08028d11, 0xb30024cc, 0x4934020c, 0x00a3c008, 0xd20b3002, 0x8660b200,
+ 0xa0d80233, 0x428c0083, 0x002cc009, 0x00021800, 0x30000000, 0x00000000,
+ 0x2815a500, 0xef803c50, 0x0f1003ee, 0x40eb003f, 0xd40df703, 0xe741f802,
+ 0x3a040b00, 0xa2c00080, 0x101ce00d, 0xb4038c08, 0xfbd03ec0, 0x0e390b2c,
+ 0x00eb9122, 0xe281b883, 0xc700dbd0, 0x30a88c14, 0x072c02cb, 0x003fc02c,
+ 0xb0030a04, 0x60000000, 0x00000000, 0x8000e100, 0x9b103a50, 0x079003ec,
+ 0x00f1403a, 0xe00fb012, 0x6140f850, 0x3a004f86, 0x03e000f8, 0x003ed00f,
+ 0xb183a900, 0xf3543840, 0x0f9113ed, 0x00fb4036, 0x114e9003, 0xe500e980,
+ 0x3ec00fb4, 0x03ec00fb, 0x003ec00e, 0xb403e000, 0x30000000, 0x00000000,
+ 0x0110d800, 0xcf01b342, 0x0dc0037c, 0x00ca8033, 0xc00ff001, 0xf400bc00,
+ 0x1f000cc0, 0x033000cc, 0x0033600c, 0xd1033e20, 0xcf003380, 0x0dea0b3e,
+ 0x00718033, 0xf00f6a03, 0x3400c310, 0x33e40cf1, 0x033d00ff, 0x003fc00f,
+ 0x600b8044, 0x30000000, 0x00000000, 0xc1046130, 0x8b002230, 0x088c1207,
+ 0x28f8c822, 0xc00bb002, 0xe300b8c8, 0x2c221a8a, 0x46230088, 0x80220008,
+ 0x08c26e20, 0xdb40bee4, 0x48b0236f, 0x41bbc636, 0xd08bb003, 0x6300a902,
+ 0x36d00fb8, 0x022d00bb, 0x002ec10b, 0x84022040, 0x10000000, 0x00000000,
+ 0x80002600, 0x8b006220, 0x0b980266, 0x00ab2022, 0xc00bb012, 0xe6003880,
+ 0x2e208888, 0x12221088, 0x80229408, 0xa0026480, 0x881822d0, 0x48b00220,
+ 0x04ba2126, 0xc28bb082, 0x26008b00, 0x22c009b0, 0x826400bb, 0x002ec00b,
+ 0x92822000, 0x00000000, 0x00000000, 0x0c000000, 0x83042000, 0x0b800244,
+ 0x00b00020, 0xc00b3002, 0xc000b000, 0x2e000880, 0x020000a8, 0x01a00029,
+ 0x004a6400, 0x930620c1, 0x48b80a0c, 0x08b30024, 0xc1093002, 0x64018002,
+ 0xa6c00bb0, 0x024400b3, 0x002cc00b, 0x00020201, 0x00000000, 0x00000000,
+ 0x00084800, 0x4f003200, 0x0f800364, 0x00e800b3, 0xc00ff031, 0xe000f800,
+ 0x3e000880, 0x0a2002c8, 0x0022000c, 0x80022400, 0xcb0022c0, 0x2cb00a2c,
+ 0x04bb0136, 0xc01fb043, 0x2402c800, 0x32c049b0, 0x0b6400fb, 0x003dc00f,
+ 0x80038002, 0x10000000, 0x00000000, 0xa41df000, 0xff003700, 0x0cc04394,
+ 0x00fc003f, 0xc00ff013, 0xf004fc00, 0x3f000fc0, 0x63f008dc, 0x003d000e,
+ 0xc047b000, 0xfc003f00, 0x4ec003f0, 0x08fc0037, 0x000fc043, 0xf4007c00,
+ 0x3dc00ff0, 0x039400ff, 0x003fc08f, 0xc003e807, 0x30000000, 0x00000000,
+ 0xc005fe00, 0xff803fe0, 0x0ff003fe, 0x04ff823f, 0xe00ff683, 0xbc00fc82,
+ 0x39200cfc, 0x131c80dc, 0x803b200f, 0xc8233200, 0xdf803be0, 0x0ff00378,
+ 0xa0cf803f, 0xe00ff803, 0xfe00ff80, 0x3fe00ff8, 0x03fe00dd, 0x283fe00f,
+ 0xf803f000, 0x70000000, 0x00000000, 0x8010ee00, 0xbb802ee0, 0x0bfc02cc,
+ 0x20bb802e, 0xe10bb412, 0xaf10f82a, 0x222088b0, 0x12be4288, 0x002a200b,
+ 0x90322200, 0xa98022e1, 0x8bbd022d, 0x058b802e, 0xe00bb802, 0xee00bb80,
+ 0x2ee00bb2, 0x82ee00b9, 0xc02ee00b, 0xb802e004, 0x30000000, 0x00000000,
+ 0x0805cc00, 0xb3002cc0, 0x0b34028c, 0x88b3002c, 0xc00b3202, 0x8c41b000,
+ 0x2a003a32, 0x020c00a8, 0x0820000b, 0x12c62004, 0x83042cc0, 0x0b301248,
+ 0x32a3002c, 0xc00b3002, 0xcc00b300, 0x2cc00b30, 0x02cc0093, 0x002cc00b,
+ 0x3002c201, 0x70000000, 0x00000000, 0xc015ac00, 0xbb002ec0, 0x0bb002ec,
+ 0x00bb042e, 0xc00b3002, 0x2c01a308, 0x22208330, 0x02ac00b9, 0x012a140b,
+ 0x18022c08, 0xab8222c4, 0x0b91420c, 0x20ab002e, 0xc00bb002, 0xec00bb00,
+ 0x2ec00bb0, 0x02ec00b9, 0x002ec00b, 0xb000f004, 0x60000000, 0x00000000,
+ 0x0015ec00, 0xfb003ec0, 0x0fb003ec, 0x10fb003e, 0xc08fb583, 0xaf40b800,
+ 0x38280eb0, 0x132c02f0, 0x483a1007, 0x8c032200, 0xc3403ac0, 0x0fb00368,
+ 0x00ab003e, 0xc00fb003, 0xec00fb00, 0x3ec00fb0, 0x03ec0099, 0xc03ec00f,
+ 0xb003c004, 0x70000000, 0x00000000, 0xe001bc00, 0xff013fc0, 0x0fb003fc,
+ 0x00bf003f, 0xc00be823, 0xf800fd10, 0x3f008cf0, 0x83fc00cc, 0x201fe10f,
+ 0xf013f110, 0xfd083fe0, 0x0f7841f4, 0x00df003f, 0xc00ff003, 0xfc00ff00,
+ 0x3fc00ff0, 0x03fc00fe, 0xc03fc00f, 0xf003f800, 0x60000000, 0x00000000,
+ 0xc010ac00, 0xfb0036c0, 0x0fb00bac, 0x20eb003e, 0xc00fc403, 0xf480fa00,
+ 0x3e100db0, 0x03cc00d9, 0x483ec205, 0xb4132d40, 0x6b043ec0, 0x8bf403e9,
+ 0x00db003e, 0xc00fb003, 0xec00fb00, 0x3ec00fb0, 0x03ac00f9, 0x003ec00f,
+ 0xb003f004, 0x20000000, 0x00000000, 0xc8052c00, 0xbb002ec0, 0x0bf0022f,
+ 0x208b002e, 0xc00ba502, 0xef00bb70, 0x6e220ab4, 0xd23fc089, 0x4022f10d,
+ 0xb0020d40, 0x89e02ec0, 0x0bb002ec, 0x80bb003a, 0xc00bb002, 0xec00bb00,
+ 0x2ec00bb0, 0x022c00b8, 0x002ec00b, 0xb002f200, 0x40000000, 0x00000000,
+ 0xe0054c00, 0xb3002cc0, 0x4b30020f, 0x00a3002c, 0xc00b3000, 0x4e409080,
+ 0x28200a38, 0x024d00b0, 0x80282009, 0x10024200, 0xa2006c40, 0x1a3002c8,
+ 0x0093006c, 0xc00b3002, 0xcc00b300, 0x2cc00b30, 0x028c00b3, 0x002cc00b,
+ 0x3002f800, 0x50000000, 0x00000000, 0x60011e00, 0xb7802de0, 0x0b78021e,
+ 0x4087802d, 0xe00b7902, 0xde00b680, 0x2f602878, 0x025e00ad, 0x9021e20b,
+ 0x78025e00, 0xa5902d60, 0x1b6802de, 0x00b78129, 0xe00b7802, 0xde00b780,
+ 0x2de00b78, 0x021e00b7, 0x802de00b, 0x7802d800, 0x40000000, 0x00000000,
+ 0x48080c00, 0xf3003cc0, 0x0f30038c, 0x00e3003c, 0xc00f30c7, 0xc5189100,
+ 0x38040eb1, 0x03cc98f0, 0x0838c40d, 0xb4024040, 0xe2003cc4, 0x8f1003c8,
+ 0x00d3003c, 0xc00f3003, 0xcc00f300, 0x3cc01fb0, 0x038c00f3, 0x403cc00f,
+ 0x3003d202, 0x00000000, 0x00000000, 0x400dbc00, 0xff003fc0, 0x0ff083fc,
+ 0x00ff003f, 0xc48ff003, 0xfc08ff00, 0x3f440ef0, 0x07bc00d5, 0x007dc50c,
+ 0xf0039c00, 0xdf043f41, 0x0fd003f8, 0x40ff103b, 0xc00ff003, 0xfc00ff00,
+ 0x3fc00ff0, 0x03fc00ff, 0x003fc00f, 0xf003d006, 0x60000000, 0x00000000,
+ 0xa805ec00, 0xfb003ec0, 0x0fb203ee, 0x00bb003e, 0xc01fd003, 0xb804e300,
+ 0x16000fb0, 0x03ec42c9, 0x0032000f, 0x10032c00, 0xf2003240, 0x0fe003ea,
+ 0x02cb021e, 0xc00fb003, 0xec00fb00, 0x3ec00fb0, 0x03ec00fb, 0x001ec00f,
+ 0xb003ea04, 0x70000000, 0x00000000, 0xc8119c00, 0xb7042dc0, 0x0b7303bc,
+ 0x0087002d, 0xc00b7802, 0x1a008700, 0x01400b70, 0x02dcc085, 0x0229c00b,
+ 0x700a9c00, 0xb600a1c0, 0x0b6802f4, 0x0087002d, 0xc00b7002, 0xdc00b700,
+ 0x2dc00b70, 0x02dc00b7, 0x002dc00b, 0x7002f204, 0x60000000, 0x00000000,
+ 0xc0009e00, 0xb7802de0, 0x0b7802de, 0x00a7822d, 0xe00b1902, 0x87c0af80,
+ 0x05200b78, 0x02ce8085, 0x8d21e08b, 0xf8929e21, 0xb7c025e0, 0x0b7d02da,
+ 0x00a7802d, 0xe00b7802, 0xde00b780, 0x2de00b78, 0x02de00b7, 0x802de00b,
+ 0x7802f040, 0x20000000, 0x00000000, 0x4814cc00, 0xb3002cc1, 0x0b30028c,
+ 0x0083002c, 0xc00bb502, 0x0f0083a0, 0x20c00b30, 0x02cc128b, 0x8c28f80b,
+ 0x30428f08, 0xb3c124c0, 0x0b3882cc, 0x80a3002c, 0xc00b3002, 0xcc00b302,
+ 0x2cc00b30, 0x02cc00b3, 0xc82cc00b, 0x3002d200, 0x30000000, 0x00000000,
+ 0xe815a800, 0xfa003e80, 0x0fa003e8, 0x00fa003e, 0x800fe902, 0x9840eea0,
+ 0x37a00fa0, 0x03c802ce, 0x4031a80f, 0xe803ba00, 0xf6c02680, 0x0fe403f9,
+ 0x20aa003e, 0x800fa003, 0xe800fa00, 0x3e800fa0, 0x03e800fe, 0xc03e800f,
+ 0xa003fa00, 0x60000000, 0x00000000, 0x4800e000, 0xf8003e00, 0x0f8003a0,
+ 0x00f8013e, 0x000f8003, 0xe100f800, 0x3e048f84, 0x03e000f8, 0x003e000f,
+ 0x8023e180, 0xf8203a00, 0x0f8003e0, 0x0098013e, 0x000f8003, 0xe000f800,
+ 0x3e000f80, 0x03e000f8, 0x103e000f, 0x8003d200, 0x30000000, 0x00000000,
+ 0x0810e400, 0xf9003e40, 0x0f100326, 0x40f9003e, 0x408f980b, 0xa602c9c0,
+ 0x3e60079a, 0x02e500c9, 0x4032609e, 0x9003a440, 0xf900b240, 0x0f100324,
+ 0x04f9003e, 0x400f9003, 0xe400f900, 0x3e400f90, 0x03e400f9, 0x003e400f,
+ 0x90030200, 0x30000000, 0x00000000, 0x80046400, 0xb9002e40, 0x0b900aa4,
+ 0x00b9002e, 0x400bd802, 0x34088100, 0x2271899e, 0x12e62489, 0x08a25248,
+ 0x10022704, 0xb90a2240, 0x0bd00224, 0x00f9002e, 0x400b9002, 0xe400b900,
+ 0x2e400b90, 0x02e400b9, 0x002e400b, 0x100a2000, 0x10000000, 0x00000000,
+ 0x18052400, 0xb9002e40, 0x0b900224, 0x00b9002e, 0x400b9102, 0x24808900,
+ 0x2a580b90, 0x12e40089, 0x0026480a, 0x9002ad00, 0xbb012240, 0x4bb00025,
+ 0x00b9002e, 0x400b9002, 0xe400b900, 0x2e400b90, 0x02e400b9, 0x002e400b,
+ 0x90020604, 0x40000000, 0x00000000, 0x08040400, 0xb1002c40, 0x0b10020c,
+ 0x40b1002c, 0x400b3102, 0x0c048910, 0x20400111, 0x02c40281, 0x10264008,
+ 0x94020400, 0xb1002040, 0x0b102a04, 0x40b1002c, 0x400b1002, 0xc400b100,
+ 0x2c400b11, 0x02c400b1, 0x002c400b, 0x10020201, 0x00000000, 0x00000000,
+ 0x380d6000, 0xf8003e00, 0x0f828321, 0x00f8003e, 0x000f8683, 0x20a0c840,
+ 0x3a000f84, 0x03e0a8c0, 0x4136000a, 0x8023a018, 0xf8023200, 0x4f82a321,
+ 0x00f8003e, 0x000f8003, 0xe000f800, 0x3e000f84, 0x03e000f8, 0x283e000f,
+ 0x80032e03, 0x50000000, 0x00000000, 0x980de400, 0xf9003e40, 0x0f9003e4,
+ 0x80f90136, 0x400fd207, 0x7400fd23, 0x3b400d92, 0x03e4003d, 0x213b400f,
+ 0xd003fc00, 0xfd047f40, 0x0fd013f5, 0x80e9003e, 0x400f9003, 0xe400f900,
+ 0x3e400f92, 0x03e400fd, 0x003e400f, 0x9003e606, 0x70000000, 0x00000000,
+ 0x1815e400, 0xf9003e40, 0x0f9003f4, 0x00f9043e, 0x400fd003, 0xb400d900,
+ 0x3f400cd0, 0x03f40ccd, 0x003f404d, 0x90033410, 0xfd0272c0, 0x8f9023f4,
+ 0x08c9013e, 0x410f9003, 0xe400f900, 0x3e400f90, 0x03e400f9, 0x003e400f,
+ 0x9003e600, 0x70000000, 0x00000000, 0x3810e000, 0xb8002e01, 0x0b8002e0,
+ 0x01b8002e, 0x000b8012, 0x20128a00, 0x2e000d80, 0x22200888, 0x002e000b,
+ 0x80822000, 0xb8002200, 0x0b8002e0, 0x0088002e, 0x000b8002, 0xe000b800,
+ 0x2e000b80, 0x82e000b8, 0x102e000b, 0x8002ce04, 0x30000000, 0x00000000,
+ 0x0805c400, 0xb1002c40, 0x0b1002c4, 0x00b1002c, 0x400b1002, 0x84008100,
+ 0x2c400b10, 0x02840081, 0x002c400b, 0x12120401, 0xb9006040, 0x0b1002c4,
+ 0x00a1002c, 0x400b1002, 0xc400b100, 0x2c400b12, 0x02c400b1, 0x006c400b,
+ 0x1002c201, 0x70000000, 0x00000000, 0x18052400, 0xb9002e40, 0x0b9002e4,
+ 0x00b9042e, 0x400b9422, 0x24088900, 0x2e480a10, 0x02640289, 0x102e408b,
+ 0x94022480, 0xb9206260, 0x0b9102e4, 0x00b9002e, 0x400b9002, 0xe400b900,
+ 0x2e400b90, 0x02e400b9, 0x006e400b, 0x9002c604, 0x60000000, 0x00000000,
+ 0xa004a400, 0xf9003e40, 0x0f9003f4, 0x00b9003e, 0x408fd062, 0xa680d941,
+ 0x2e603bd0, 0x03e410cd, 0x203e684b, 0x9d0b2500, 0xf960a240, 0x8b9e03e4,
+ 0x22e9003e, 0x400b9003, 0xe400f900, 0x3e400f90, 0x03e400b9, 0x903e400f,
+ 0x9002e824, 0x70000000, 0x00000000, 0xa800a400, 0xf9003e40, 0x0f9003e4,
+ 0x00f9003e, 0x400b9101, 0xc640fb10, 0x3e400d90, 0x138400f9, 0x043e700f,
+ 0x9023e430, 0xf9043e41, 0x0f9813c4, 0x80c9003e, 0x400f9003, 0xe400f900,
+ 0x3e400f90, 0x03e400f9, 0x803e400f, 0x9003ea00, 0x60000000, 0x00000000,
+ 0x2800a000, 0xf8003e00, 0x0f8003e0, 0x00d8003e, 0x000f0503, 0xe150f840,
+ 0x3e044f80, 0x27e042c8, 0x0032100f, 0x8013a100, 0xf8003a00, 0x4f8003e0,
+ 0x00c8003e, 0x000f8003, 0xe000f800, 0x3e000e80, 0x03e000f8, 0x003e000f,
+ 0x8003ca84, 0x20000000, 0x00000000, 0x28142800, 0xba002e80, 0x0ba002f9,
+ 0x008a002e, 0x800be002, 0xf800baa0, 0x2d800be3, 0x02fb008e, 0x44b3b00b,
+ 0xa003b908, 0xb6003a80, 0x0ba002f8, 0x105a002e, 0x800ba002, 0xe800ba00,
+ 0x2e800ba0, 0x03a800ba, 0x002e800b, 0xe002ca00, 0x40000000, 0x00000000,
+ 0x28054c00, 0xb3002cc0, 0x0b3002cd, 0x8093002c, 0xc00b3082, 0xcc00b380,
+ 0x2cc01b3c, 0x02cf2083, 0x6024e819, 0xb0028e00, 0xb00828c0, 0x0b3002cc,
+ 0x0183002c, 0xc00b3002, 0xcc00b300, 0x2cc00a30, 0x028c00b3, 0x002cc00b,
+ 0x2002ca00, 0x50000000, 0x00000000, 0x20011c00, 0xb7002dc0, 0x0b7002db,
+ 0x8087002d, 0xc04b7002, 0xd400b601, 0x2d400b61, 0x02d00086, 0xc201420b,
+ 0xf0529900, 0xb50029c0, 0x4b7002cc, 0x0197002d, 0xc00b7002, 0x5c00b700,
+ 0x2dc00b70, 0x029c00b7, 0x002dc00b, 0x6022e840, 0x40000000, 0x00000000,
+ 0x28081e00, 0xf7803de0, 0x0f7803ff, 0x00d7803d, 0xe00f6802, 0xde00f590,
+ 0x2de08f78, 0x02ca10cf, 0x8035e00b, 0x78839e10, 0xf58019e0, 0x8f7803de,
+ 0x0047802d, 0xe00f7803, 0xde00f780, 0x3de00e7a, 0x039e00f7, 0x803de00f,
+ 0x6803e802, 0x00000000, 0x00000000, 0x080dac00, 0xfb003ec0, 0x0fb003fa,
+ 0x00eb003e, 0xc11fe913, 0xe800f800, 0x7ec00ff8, 0x03e800ff, 0x903ec00f,
+ 0x7603a400, 0xf9003ec0, 0x0fb003ec, 0x10fb003e, 0xc00fb003, 0xec00fb00,
+ 0x3ec00fb0, 0x03ac00fb, 0x003ec00f, 0xa003c206, 0x60000000, 0x00000000,
+ 0x4005fe00, 0xff803fe0, 0x0ff80336, 0x00ff803f, 0xe00ff803, 0x3e40cf90,
+ 0x3fe40fd9, 0x033a00fd, 0x803fa10f, 0xf383be00, 0xdd813be0, 0x0cf8033e,
+ 0x04ff803f, 0xe00ff803, 0xfe00ff80, 0x3fe00ff8, 0x83fe00ff, 0x8033e00f,
+ 0xe803f000, 0x70000000, 0x00000000, 0xa8019c00, 0xb7002dc0, 0x0b700211,
+ 0x00b7002d, 0xc00bf002, 0x14608400, 0x3d404bf0, 0x02504036, 0x002d440e,
+ 0xf0021840, 0x850029c0, 0x0a70421c, 0x00b7002d, 0xc00b7002, 0xdc00e700,
+ 0x3dc00b70, 0x03dc00b7, 0x0835c00b, 0x6002fa04, 0x60000000, 0x00000000,
+ 0x00109c00, 0xb7002dc0, 0x0b30021c, 0x00b7002d, 0xc00b6102, 0x04008702,
+ 0x2d404b70, 0x065c00b5, 0x002d400b, 0x7326b820, 0x9d0023c0, 0x0930021c,
+ 0x20b70025, 0xc00b7002, 0xdc00b700, 0x2dc00b70, 0x02dc00b3, 0x0021c00b,
+ 0x6002d400, 0x20000000, 0x00000000, 0x6014cc00, 0xb3002cc0, 0x0b30000c,
+ 0x0033002c, 0xc08b3e06, 0x01208040, 0x28680b30, 0x024800b3, 0x812c400b,
+ 0x38820804, 0x019008c0, 0x0b30020e, 0x80b3002c, 0xc00b3002, 0xcc00a300,
+ 0x28c00b30, 0x02cc00b3, 0x4024c00b, 0x2002d804, 0x30000000, 0x00000000,
+ 0x2c15ac00, 0xfb002ec0, 0x0fb0032c, 0x00fb003e, 0xc0039482, 0x2700c9f0,
+ 0x2e500f80, 0x092000bb, 0x883e521b, 0xfc23a140, 0x5b4022c1, 0x89bd8a0d,
+ 0x00fb003e, 0xc00bb003, 0xec00fb00, 0x2ec00ff0, 0x03ec00fb, 0x4032c00f,
+ 0xa003da04, 0x60000000, 0x00000000, 0x8000ec00, 0xfb003ec0, 0x0f3007fc,
+ 0x00fb013e, 0xc00ff40f, 0xe402f800, 0x3e540ff4, 0x238404fe, 0x203e080e,
+ 0xb123e000, 0xf9403ec4, 0x0e3003e4, 0x00fb003e, 0xc00fb003, 0xec00fb00,
+ 0x3ec00bb0, 0x03ac00fb, 0x003ec00f, 0xa003e400, 0x30000000, 0x00000000,
+ 0x0510fc00, 0xff003bc0, 0x0ff0033c, 0x80ff003f, 0xc00f5903, 0x3c10eda0,
+ 0x3f804ff0, 0x03f010cf, 0x9033c00e, 0xf0037c10, 0xff083bc0, 0x4ff003fa,
+ 0x00cf003f, 0xc00ff003, 0xfc00ff00, 0x3fc00ff0, 0x43fc00f7, 0x0833c00f,
+ 0xe003f004, 0x30000000, 0x00000000, 0x81006c00, 0xbb002ec0, 0x0bb00b2c,
+ 0x00bb002e, 0xc00bb202, 0xea10b880, 0x3aa00bb7, 0x0263488b, 0x0a20f308,
+ 0xb0022780, 0xb9c92ec0, 0x03b002a2, 0x428b002e, 0xc00bb002, 0xec009b00,
+ 0x2ec00bb0, 0x02ec00bb, 0x002ac00b, 0xa002e140, 0x10000000, 0x00000000,
+ 0x80056c00, 0xbb002ec0, 0x0bb00264, 0x00bb002e, 0xc00b9002, 0x2600bb00,
+ 0x2e620bb0, 0x02e90481, 0x0022210a, 0x3002ea14, 0xbb802ec0, 0x0bb002ac,
+ 0x018b042a, 0xc00bb002, 0xec00bb00, 0x2ec00bb0, 0x02ec00bb, 0x0022c00b,
+ 0xa002e000, 0x40000000, 0x00000000, 0x08000c00, 0xb3002cc0, 0x0b30020c,
+ 0x00b3002c, 0xc09b3002, 0x8400b000, 0x20400b30, 0x02c00083, 0x00a20108,
+ 0x30024800, 0xb1002cc0, 0x0b3002a6, 0x0083002c, 0xc00b3002, 0xcc009300,
+ 0x2cc00b30, 0x12cc00b3, 0x0028c00b, 0x2002c201, 0x00000000, 0x00000000,
+ 0x00006c00, 0xfb003ec0, 0x0fb0026c, 0x00fb003e, 0xc00fb003, 0x2410eb00,
+ 0x3e000fb0, 0x03e802cb, 0x0032400e, 0xf0036800, 0xfb003ac0, 0x1fb003a8,
+ 0x00cb003e, 0xc00fb003, 0xec00fb00, 0x3ec00fb0, 0x03ec00fb, 0x0032c00f,
+ 0xa003e003, 0x50000000, 0x00000000, 0xa015fc00, 0xff003fc0, 0x0ff003fc,
+ 0x00ff003f, 0xc09ff007, 0xf010fc01, 0x3b000ff0, 0x237c00ff, 0x023f400f,
+ 0xf0139800, 0xf5007dc1, 0x0ff00330, 0x00ff003f, 0xc00ff003, 0xfc00ff00,
+ 0x3fc00ff0, 0x03fc00ff, 0x003fc00f, 0xe003f806, 0x70000000, 0x00000000,
+ 0xc005fc20, 0xe4803320, 0x0ff343d2, 0x40cf0431, 0x200d5803, 0xf200f480,
+ 0x3d200ef8, 0x03d200fd, 0x0037200f, 0xd8033200, 0xfc943310, 0x0ec0023e,
+ 0x40cc4033, 0xf00cc003, 0x3200cf80, 0x3fe01cf8, 0x037e00f7, 0x8037c00d,
+ 0xf2033000, 0x70000000, 0x00000000, 0x8018dd00, 0x8a002260, 0x2df552e0,
+ 0x00afd022, 0x83089802, 0xe208b881, 0x2e2028a8, 0x02e200b8, 0x9022200b,
+ 0x9800a200, 0xe0203210, 0x088c022c, 0x80a8503e, 0xc0888481, 0xe202db80,
+ 0x2ee00ab8, 0x02ee00bb, 0x802bd008, 0x7302a006, 0x30000000, 0x00000000,
+ 0x0805cca0, 0xa0002200, 0x023232c0, 0x80a30020, 0x080a3006, 0xc000b000,
+ 0x2c000830, 0x02c009b1, 0x0060000b, 0x90020000, 0xb800a019, 0x0a04024c,
+ 0x0010a020, 0xc8080b26, 0x8c008304, 0x2cc01830, 0x124c01ab, 0x0028ce09,
+ 0x30820201, 0x70000000, 0x00000000, 0xc005ac00, 0x89002ae0, 0x0bb042ec,
+ 0x202b0020, 0xd90ab002, 0xe220b8c0, 0x2e2288b8, 0x02e208b9, 0x2026600b,
+ 0x9802a200, 0xbb042240, 0x08b0220c, 0x048a022c, 0xc00a8802, 0x6c029b00,
+ 0x2ec01ab0, 0x02ec00bb, 0x002ac190, 0xb002b000, 0x60000000, 0x00000000,
+ 0x0015ec00, 0xe010b212, 0x2eb001e0, 0x00e30012, 0x202e9002, 0xe200f881,
+ 0x3c2008b8, 0x03e220f8, 0x00b2300b, 0x0a232320, 0xf0603210, 0x2e84032c,
+ 0x00d88032, 0xc00c8013, 0xa182cb00, 0x3cf608b0, 0x236c00e3, 0x803ec00d,
+ 0xb0231004, 0x70000000, 0x00000000, 0xa001bc00, 0xff803740, 0x2df023f5,
+ 0x00fb00bf, 0x0005fc01, 0x7000dc00, 0x3f000ce0, 0x03f000f6, 0x803b400f,
+ 0xe003f408, 0xec4278a4, 0x8f410bfc, 0x22f7a8bf, 0xc26df003, 0xfc00ff00,
+ 0x3fc00ff0, 0x03fc00ff, 0x903ec08f, 0xf003e800, 0x60000000, 0x00000000,
+ 0xc010ac00, 0xc8003a88, 0x0fb003e9, 0x00df0836, 0xd00cb103, 0x6080f860,
+ 0x72100db0, 0x83e140eb, 0x003e1008, 0xb50b2510, 0xfb4872d4, 0x2cb003ec,
+ 0x00c90002, 0xc50cb803, 0x2d20cb00, 0x3ecc0cb0, 0x23ec00fb, 0x003ac80d,
+ 0xb0c33004, 0x20000000, 0x00000000, 0xc8053c02, 0x895020c1, 0x03f002ec,
+ 0x080fe02a, 0xc00db543, 0x2200b860, 0x16030898, 0x02e0098b, 0x002e600c,
+ 0xb5036400, 0xbb8822c4, 0x0db252ef, 0x08db083e, 0xe08db043, 0x4c02db00,
+ 0x2ef08ab0, 0x02ec0039, 0x8037d008, 0xf0837200, 0x40000000, 0x00000000,
+ 0xc0046c00, 0x80002850, 0x0b3000e0, 0x11b3002c, 0x80003404, 0x4200b040,
+ 0x20004930, 0x428084b1, 0x00282018, 0x18224200, 0xb0402020, 0x880812cc,
+ 0x48a041ec, 0xd0088042, 0x43508305, 0x2cf10830, 0x12cc0013, 0xb062d00a,
+ 0xb8123800, 0x10000000, 0x00000000, 0x60105e40, 0x8c8821e0, 0x0b7902fa,
+ 0x05a7802b, 0xe109d802, 0x5220bc80, 0x2730086a, 0x06f20896, 0x802d3049,
+ 0x78021e00, 0xb78021e4, 0x087902de, 0x04959025, 0xe0097402, 0x16421780,
+ 0x2fc00a78, 0x02de00b7, 0x8065e40a, 0x78125804, 0x10000000, 0x00000000,
+ 0x48084c00, 0x81402846, 0x0f3002c4, 0x00f3003c, 0x800c3243, 0x4040b000,
+ 0x20040d30, 0x83c040b3, 0x013cce28, 0x300244e0, 0xb020a094, 0x080503ec,
+ 0x04eb023e, 0xc00cb10a, 0x4c00c302, 0x2cc40c30, 0x03cc00d3, 0x0038c00e,
+ 0x30031a02, 0x10000000, 0x00000000, 0x4015bd00, 0xfd0037c1, 0x0ff043fc,
+ 0x489f000f, 0xc00ff003, 0xbc10fe00, 0x3f008ff2, 0x03f0006f, 0x003dc50e,
+ 0x7003fc40, 0xff001fc5, 0x0ff102fc, 0x08bf003f, 0xc00ff003, 0xdc02ff00,
+ 0x3dc80ef0, 0x03fc40ff, 0x117fc20c, 0xf183d004, 0x60000000, 0x00000000,
+ 0x0805ec42, 0xcb8036c0, 0x0fb5136c, 0x09c73836, 0xe00cb027, 0xe000f802,
+ 0x7e001fb8, 0x07a000f0, 0x80b2400e, 0x90032000, 0xe3003240, 0x0d3003ae,
+ 0x00ca0032, 0xc00f8003, 0x2120cb02, 0x3ec01cb0, 0x036c00fb, 0x0036c20d,
+ 0xb4030200, 0x70000000, 0x00000000, 0xc8199c80, 0x870021c1, 0x0e73021c,
+ 0x00a70023, 0xc14a7022, 0xd410b400, 0x2d004b60, 0x021000b6, 0x00254083,
+ 0x70021c00, 0xb70035c0, 0x4870021c, 0x08230021, 0xc08e7023, 0x5c00d700,
+ 0x2d008a70, 0x02dc00b7, 0x0061c908, 0x33023206, 0x60000000, 0x00000000,
+ 0x21009e00, 0x95c021e0, 0x0b78069e, 0x00878021, 0xe3087802, 0xd208b480,
+ 0x6d208bf8, 0x029200bf, 0x802de00b, 0x780a1600, 0xbf8021e0, 0x0878029e,
+ 0x10078261, 0xe00b3c02, 0x5e108780, 0x2de20878, 0x22de00bf, 0x8025e809,
+ 0x7a020800, 0x20000000, 0x00000000, 0x6804cc00, 0x818020e0, 0x0a30028e,
+ 0x00a30020, 0xe08a3802, 0xcd30b340, 0x2ce00b30, 0x020d80b3, 0x582cc00b,
+ 0x31820d80, 0xbb9020c4, 0x0834620c, 0x04a388a8, 0xc00a3812, 0x4f549300,
+ 0x2cd80a30, 0x42cc01b3, 0x9060c048, 0x30023200, 0x30000000, 0x00000000,
+ 0xe815e800, 0xde4035a8, 0x4fa0039b, 0x80ca0133, 0x909ca083, 0xf801f640,
+ 0x3fb20fea, 0x03b891be, 0xc03b840e, 0xec021904, 0xfe50a3a0, 0x6ce013a8,
+ 0x10ce4832, 0x800fec03, 0x49508a00, 0x3f804ca0, 0x03e800fa, 0x00368005,
+ 0xa00a3a04, 0x70000000, 0x00000000, 0x4801a000, 0xf84abe00, 0x0e000920,
+ 0x20f800ba, 0x020f8423, 0xe100f848, 0x3e121f80, 0x03a100f8, 0x00321087,
+ 0x8003e008, 0xf8403e10, 0x0e8153e0, 0x00f80036, 0x100f8203, 0xe000f800,
+ 0x3e000f80, 0x00e000f8, 0x003e010f, 0x8003d200, 0x60000000, 0x00000000,
+ 0x08108400, 0xd9003e40, 0x0d900324, 0x10d91032, 0x400f9463, 0xe680f900,
+ 0x32400f91, 0x03e680f9, 0x003e6087, 0x900b2444, 0xc9803262, 0x4e10a364,
+ 0x00f94032, 0x640f9103, 0x6c80c900, 0x3e500c90, 0x03e404f9, 0x80384808,
+ 0x18030204, 0x20000000, 0x00000000, 0x80046402, 0x89002674, 0x08900224,
+ 0x088180b2, 0x400b9c02, 0xe700b9c0, 0x2a545b98, 0x13a608b9, 0x002e7c0e,
+ 0x18022604, 0xd9802278, 0x089042a7, 0x01b90836, 0x400b9402, 0xa720a900,
+ 0x2c700d90, 0x02e400b1, 0xd0224068, 0x9c022000, 0x10000000, 0x00000000,
+ 0x38052400, 0x99002e42, 0x59904a24, 0x00990022, 0x400a9402, 0xe400b928,
+ 0x62400b90, 0x02e400b9, 0x032ec00b, 0x920a2400, 0x89102044, 0x08900264,
+ 0x40b10022, 0x404b10c2, 0x24008901, 0x2e410990, 0x02e400b9, 0x402a420a,
+ 0x96020e00, 0x40000000, 0x00000000, 0x28140500, 0x83422440, 0x09140225,
+ 0x10810020, 0x500b1002, 0xcc15b100, 0x28c00b30, 0x028400b1, 0x002c400a,
+ 0x100a0400, 0x91122045, 0x38100204, 0x40b11024, 0xc44b1102, 0x8400a100,
+ 0x0ec08910, 0x02c400b9, 0x0420440a, 0x110a0a05, 0x00000000, 0x00000000,
+ 0xb80d4000, 0xd8003e00, 0x0d000300, 0x00d800a2, 0x004e8013, 0xe000b800,
+ 0x32000b80, 0x43e800f8, 0x293e000f, 0x80162000, 0xca40b01a, 0x2c828349,
+ 0x00b86832, 0x104f86c3, 0x2000c800, 0x3e000d80, 0x03e000f8, 0x00381a0e,
+ 0x86870e03, 0x50000000, 0x00000000, 0x9801e500, 0xf7003740, 0x0e9401f4,
+ 0x10f9403b, 0x400fd003, 0xfc00fd00, 0x3f400f70, 0x03fc01fd, 0x013f410f,
+ 0x5013f400, 0xfd203f48, 0x0fd003e4, 0x80fd203e, 0x480fd203, 0x8401f904,
+ 0x3dc10f90, 0x43e410f5, 0x003e490d, 0x9207e604, 0x70000000, 0x00000000,
+ 0x9805e440, 0xcd003940, 0x0e9303e4, 0x00f50432, 0x440dd003, 0x9400fd00,
+ 0x3f410fd0, 0x033400c9, 0x203b404f, 0x500bf408, 0xfd003344, 0x0cd20334,
+ 0x00cd3033, 0x402cd023, 0x1400c900, 0x3d400c90, 0x03e404f5, 0x0237440c,
+ 0xd2030600, 0x70000000, 0x00000000, 0x3818e044, 0xd8292200, 0x288302e0,
+ 0x24e80036, 0x000d8006, 0xe0041800, 0x2e008b80, 0x436008a8, 0x002e0003,
+ 0x8013e000, 0xb8080204, 0x0e8002a0, 0x82a830a2, 0x0208a082, 0xa008d800,
+ 0x2e000a80, 0x02e000b8, 0x00220408, 0x828a0e06, 0x30000000, 0x00000000,
+ 0x48058400, 0x8120aa40, 0x021202c4, 0x80b11420, 0x40081002, 0x8400b100,
+ 0x0c404b90, 0x06840081, 0x10284003, 0x900ac41c, 0xb104a240, 0x08110204,
+ 0xa0812220, 0x48081102, 0x06008100, 0x2c400810, 0x16c404b1, 0x002c4028,
+ 0x13021200, 0x20000000, 0x00000000, 0x1800a400, 0x99102240, 0x0a9002e6,
+ 0x20a90026, 0x44199102, 0xe4809940, 0x2e600b91, 0x426c00a9, 0x202e4391,
+ 0xb00ae410, 0xb1402244, 0x0a9082a4, 0x00830122, 0xc0089062, 0xa6109900,
+ 0x2e401b90, 0x06e400b9, 0x10284048, 0x10020600, 0x20000000, 0x00000000,
+ 0xa015e400, 0xc1003a60, 0x0e9003e5, 0x00f100f2, 0x520c9043, 0xa400f9c1,
+ 0x2e624f10, 0x03a440c9, 0x493a544f, 0x9303e480, 0xf9103268, 0x0c9c0324,
+ 0x00c9a032, 0x400c9403, 0x0400c904, 0x3e400c90, 0x03e405f9, 0x013e400c,
+ 0x90032804, 0x70000000, 0x00000000, 0xc801a400, 0xf9803e48, 0x2d9043e4,
+ 0x00f9043a, 0x410f9807, 0xe430f9a0, 0x3e420f98, 0x036601f9, 0x823e620f,
+ 0x9883e404, 0xf9023640, 0x0e920be4, 0x01f9283e, 0x400f9a03, 0xe420f900,
+ 0x3e500e90, 0x03e400f9, 0x80364007, 0x9003f200, 0x60000000, 0x00000000,
+ 0x08108008, 0xf8013601, 0x0c8003e0, 0x00f81432, 0x100d8003, 0xe102c800,
+ 0x3e104f80, 0x0ba100f8, 0x403e140f, 0x8043a100, 0xf8083208, 0x0c000320,
+ 0x80c84032, 0x084f8703, 0x2040c800, 0x3e000e80, 0x03e000f8, 0x203a000e,
+ 0x80010204, 0x20000000, 0x00000000, 0x20052800, 0xbe5021a1, 0x28a002e8,
+ 0x084e8122, 0x8008e602, 0xfb008e82, 0x0f800be4, 0x021900ba, 0x022fa10b,
+ 0x64062880, 0xee40a1b0, 0x28a802ba, 0x80cecc37, 0xa24bec02, 0x3b00aa00,
+ 0x2db688a0, 0x00e800e6, 0x2027a028, 0xec0a0a00, 0x40000000, 0x00000000,
+ 0x28054c00, 0xb34124e6, 0x003002cc, 0x00a3882a, 0xc0093482, 0xcd0083a0,
+ 0x2cd40b3a, 0x004d20b3, 0x002cf00b, 0x3d028c14, 0xa31020f0, 0x0a38022e,
+ 0x02a34022, 0xc00bb002, 0x0c008301, 0x2cf10a30, 0x00cc00a3, 0x402ce028,
+ 0x32020a00, 0x50000000, 0x00000000, 0x90111c80, 0xbf0963c0, 0x087002dc,
+ 0x80870023, 0xc0095006, 0xd2309508, 0x2d010b44, 0x065d00b7, 0x002d404b,
+ 0x700a1c00, 0xa70021d0, 0x0a50a29c, 0x08870005, 0xc08b3002, 0x1c00a701,
+ 0x2f800870, 0x02dc00af, 0x0065c308, 0x70922004, 0x40000000, 0x00000000,
+ 0x88081e20, 0xf78035e0, 0x0c7a23de, 0x21e780b9, 0xe00d5863, 0xd2004784,
+ 0x3d208b48, 0x035e00f7, 0x803d600b, 0x78029e00, 0xef8433e0, 0x0e38033e,
+ 0x08e38011, 0xe00b780b, 0x1602c780, 0x3de00e78, 0x03de00e6, 0x8038a00e,
+ 0x38232202, 0x00000000, 0x00000000, 0x0815ac88, 0xf3003ec0, 0x0fb303ec,
+ 0x00eb043c, 0xd80e8013, 0xe000ea06, 0x1e000f00, 0x03ac00bb, 0x003e408b,
+ 0xb00ae400, 0xab003ec0, 0x0d9003ec, 0x00eb003e, 0xc00fa003, 0xec00fb00,
+ 0x3ec00eb0, 0x03ec00eb, 0x003ac00f, 0x9003c204, 0x60000000, 0x00000000,
+ 0xc004be20, 0xff923fe8, 0x4ffc233e, 0x20cf803b, 0xf31f5903, 0x92c8ef80,
+ 0x3f240fc8, 0x13fe08ff, 0x90336408, 0xf9077c50, 0xcf803be0, 0x2cd903fe,
+ 0x00ff8133, 0xe02df801, 0x3a02cf80, 0x3de00df9, 0x03fe40fd, 0x80336008,
+ 0xf8030000, 0x20000000, 0x00000000, 0xa8189c40, 0xbf302100, 0x0ef0023c,
+ 0x60872029, 0xc01e5502, 0x90c08710, 0x2d154344, 0x025400b7, 0x0039110d,
+ 0x53071c20, 0xfd0003c0, 0x085393d4, 0x00b51023, 0x84085200, 0x9c008700,
+ 0x2dc18a70, 0x02dc00b7, 0x00294008, 0x720a2a06, 0x20000000, 0x00000000,
+ 0x10009c00, 0xb70809c8, 0x1b70021d, 0x0081040d, 0xc00b5112, 0xd0c0a700,
+ 0x2d040b40, 0x825860b7, 0x01674009, 0x700a3c40, 0x86022100, 0x285006d8,
+ 0x00b60021, 0x400870c2, 0x5000a700, 0x2fc00870, 0x12dc01bf, 0x0821840a,
+ 0x60220000, 0x20000000, 0x00000000, 0x60048c00, 0xb3c82010, 0x1a30220c,
+ 0x0481002c, 0xd00a0902, 0x4201a08a, 0x2c108304, 0x804100b3, 0x05281209,
+ 0x18220580, 0xa0c0a820, 0x08180080, 0x04b8d020, 0x00000c2a, 0x4000a304,
+ 0x2ce80a30, 0x02cc01b3, 0x802ac042, 0x80020800, 0x20000000, 0x00000000,
+ 0x7815bc00, 0xf9413ed2, 0x0ff00b3c, 0x00cb003f, 0xf00f9803, 0xe0c1e9e0,
+ 0x2e261f8c, 0x03ed40fb, 0xa036400c, 0xb8032e00, 0x0b082ad4, 0x0cb402ec,
+ 0x00fbc032, 0xc04cb803, 0x4360ab04, 0x3e500cb0, 0x03ec00fb, 0x8032c12e,
+ 0xb0022a04, 0x60000000, 0x00000000, 0x8000cc00, 0xfb003ed0, 0x0fb003ec,
+ 0x00f8400a, 0xc40e9023, 0xa0009940, 0x3e001f80, 0x03e9047b, 0x0a3e411f,
+ 0xb10bac04, 0xfa402614, 0x0f9203e9, 0x04fa20be, 0x500e3483, 0xa000db00,
+ 0x3ec40fb0, 0x03ec00fb, 0x003e9041, 0xa403e000, 0x30000000, 0x00000000,
+ 0xa010fc00, 0xcd003f22, 0x0d70033c, 0x00df10b3, 0xc29cd003, 0xf040dd00,
+ 0x3f040fc0, 0x11f500c3, 0x0033000f, 0xd00b3c01, 0xfd4837d0, 0x4f700335,
+ 0x008dc033, 0x880cd803, 0x3000cf02, 0x3fd00cf0, 0x03fc00ff, 0x203b000c,
+ 0xb0230844, 0x30000000, 0x00000000, 0xa5046c00, 0x8bc02428, 0x08b0122c,
+ 0x04800936, 0xc0088c42, 0xc1008880, 0x2e100b8c, 0x12c310db, 0x002a300b,
+ 0x1c022650, 0xb8c13e20, 0x0b9042a1, 0x00a8c622, 0x100d8343, 0xe0648b00,
+ 0x38d80db0, 0x02ec00b3, 0xc0223508, 0x89022840, 0x10000000, 0x00000000,
+ 0x80052c02, 0x8bc02ec4, 0x08b0020c, 0x00ab0064, 0xc1088802, 0xe100a8c1,
+ 0x2e000a88, 0x06ec048b, 0x0422601b, 0xb8222400, 0xb30822c2, 0x0b90020d,
+ 0x04bb0420, 0xc008a002, 0x20008b00, 0x2ec008b0, 0x02ec00bb, 0x082e4208,
+ 0x90822000, 0x40000000, 0x00000000, 0x08140c04, 0x82002c00, 0x9830020c,
+ 0x10910064, 0xc0480012, 0xe000b000, 0x24010b00, 0x42c00093, 0x00680009,
+ 0x00020400, 0xb0002001, 0x0b100200, 0x04b00520, 0x0019000a, 0xe0008300,
+ 0x22c00930, 0x02cc00bb, 0x00240008, 0x00020205, 0x00000000, 0x00000000,
+ 0x800d7c00, 0xcb003e00, 0x0cf00b3c, 0x00e90237, 0xc1088003, 0xe000f800,
+ 0x3e000f80, 0x00e000cb, 0x0012000f, 0x90032400, 0xb8002200, 0x4f900a20,
+ 0x00900032, 0x000c0003, 0x2000cb02, 0x3ec00cb0, 0x03ec00fb, 0x003c002c,
+ 0x800b0003, 0x50000000, 0x00000000, 0xa011fc00, 0xff003700, 0x07f003fc,
+ 0x026d00bf, 0xc02fc013, 0xf012cc04, 0x7f010fc0, 0x43f004ff, 0x003d004f,
+ 0x4003d400, 0xfc003f00, 0x0fd007f0, 0x184c003f, 0x000fc001, 0xd005ff00,
+ 0x3bc00ff0, 0x03fc00f7, 0x003b000f, 0xc003e804, 0x70000000, 0x00000000,
+ 0xc005fe00, 0xff803fe0, 0x0ff0033e, 0x00ffc03b, 0xc80ef3a3, 0x9200f480,
+ 0x07200fc8, 0x037a00ac, 0x803da00f, 0xc803f200, 0xd7923fcb, 0x0c70033e,
+ 0x12d7803f, 0xe00ff003, 0xbe00f780, 0x3fe00ff8, 0x03fe00fc, 0x803f202c,
+ 0x5803f000, 0x70000000, 0x00000000, 0xc010ee00, 0xbb802ee0, 0x0bb4022e,
+ 0x04b32020, 0xd808b402, 0x2200b881, 0x22204a88, 0x02e200ba, 0x8026a008,
+ 0x9803a080, 0x89052ed2, 0x08f902ac, 0x208b802e, 0xe00bbc03, 0x6e00bb80,
+ 0x2ee00bb8, 0x03ae00b8, 0x002e0008, 0x9802f004, 0x30000000, 0x00000000,
+ 0xc805cc00, 0xb30028c0, 0x0b34020c, 0x00a30028, 0xc60a3026, 0x4004b000,
+ 0x2e000a00, 0x020810b3, 0x002ec18a, 0x0002e0a1, 0xb2202cc9, 0x0930028c,
+ 0x80830028, 0xc00b3102, 0x8c00b300, 0x2cc00b30, 0x02cc00b0, 0x002c400a,
+ 0x0002f201, 0x70000000, 0x00000000, 0xc011ac00, 0xbb002ec0, 0x1b30222c,
+ 0x00bb0022, 0x800bb2ca, 0x62003b20, 0x22800a80, 0x02ea003b, 0x0426d008,
+ 0x9402a220, 0x89012e45, 0x08b022ac, 0x008b002e, 0xc00bb042, 0x2c00bb00,
+ 0x2ec00bb0, 0x02ac00b8, 0x002c408a, 0x8002f004, 0x60000000, 0x00000000,
+ 0x0415ec00, 0xfb003ac0, 0x0fb0032c, 0x00fb003a, 0xc28eb002, 0x6280f848,
+ 0x34000f8c, 0x036f30e9, 0x001c1047, 0xa003c300, 0xfac01ec0, 0x0cb0018c,
+ 0x00cb003e, 0xc00fb002, 0xac00fb00, 0x3ec00fb0, 0x03ec00fa, 0x203e000e,
+ 0xb003f404, 0x70000000, 0x00000000, 0xa001bc00, 0xff003fc0, 0x0ff00bfc,
+ 0x007f001f, 0x8a04e043, 0xb400fc80, 0x1f484df2, 0x07f0009f, 0x0a3f648f,
+ 0xf900f400, 0xdcc43d40, 0x0ff002fc, 0x00ff003f, 0xc00f3003, 0xfc00ff08,
+ 0x3fc00ff0, 0x03fc00fe, 0x003f040d, 0xf003e800, 0x60000000, 0x00000000,
+ 0xc010ac00, 0xfb003ec0, 0x0fb803ec, 0x08fb0835, 0xd00d5487, 0xe500eb10,
+ 0x3ae05fb6, 0x03ed14db, 0x1036180e, 0xa607e500, 0xfa703789, 0x0fb0932c,
+ 0x02cb1032, 0xc00fb003, 0x2c00fb10, 0x3ac00db0, 0x03ec00fa, 0x803a620f,
+ 0xa00b3004, 0x20000000, 0x00000000, 0xd8052c00, 0xbb002ec0, 0x0bf002ec,
+ 0x00fb0822, 0x9000bc00, 0xe42083c0, 0x22f10eb6, 0x0221808b, 0xc43e6808,
+ 0xb053a488, 0x68420250, 0x0878036d, 0x808b8036, 0xc00cf002, 0x2c00bb40,
+ 0x22c00bb0, 0x02ec00ba, 0xd022600b, 0xa0023600, 0x40000000, 0x00000000,
+ 0xe0054c00, 0xb3002cc0, 0x4b3002cc, 0x00bb4024, 0xf5033d04, 0xc2102008,
+ 0x28080b04, 0x06899590, 0x800c800a, 0x3402c000, 0x91002ce0, 0x083c028e,
+ 0x80830020, 0xc00b3002, 0x0c04b3c0, 0x28c00930, 0x02cc0431, 0x0428800b,
+ 0x10023800, 0x50000000, 0x00000000, 0xf0011e00, 0xb7802de0, 0x0b7d02de,
+ 0x00b78021, 0xe0086906, 0xf700b784, 0x29e00af8, 0x061200a6, 0x8029a05a,
+ 0x78029600, 0xaf802de2, 0x287886de, 0x00878025, 0xe008782a, 0x1e00b780,
+ 0x21e00b78, 0x02de00b5, 0x8021a08b, 0xd8023c00, 0x40000000, 0x00000000,
+ 0x48080c00, 0xf3003cc0, 0x0f3003cc, 0x40b30034, 0x410f1002, 0xc408e004,
+ 0x28404b35, 0x43c84453, 0x042ccc0e, 0x3242c440, 0xb0103ec0, 0x0e3107ac,
+ 0x01c30030, 0xc00f3003, 0x0c00f300, 0x38c00d30, 0x03cc00f9, 0x0038c40f,
+ 0x00031202, 0x00000000, 0x00000000, 0x401dbc00, 0xff003fc0, 0x0ff003fc,
+ 0x102f003f, 0xc08ff043, 0xfc00cf10, 0x37c00670, 0x17dc00df, 0x113fc41d,
+ 0xf003f441, 0xff0573c4, 0x0ef1037c, 0x40ff003f, 0xc00ef003, 0xfc00ff00,
+ 0x3fc00ff0, 0x03fc00fd, 0x003fc40f, 0xc803d002, 0x60000000, 0x00000000,
+ 0xa805ec00, 0xfb003ec0, 0x0fb90b2c, 0x00fb003f, 0x400af003, 0xc200d380,
+ 0x36800f80, 0x03ac04f9, 0x8036c04e, 0x30002000, 0xf9003f84, 0x0cb003ac,
+ 0x00cb003e, 0xc00ff803, 0x2c007b00, 0x3ec00fb0, 0x03ec00fb, 0x0032800f,
+ 0xb003ea00, 0x70000000, 0x00000000, 0xc8119c00, 0xb7042dc0, 0x0b72021c,
+ 0x00b7042f, 0xe088e802, 0x14088700, 0x21c04f70, 0x02d810b7, 0x00a1410b,
+ 0x70021c00, 0xb7002ce0, 0x087702fc, 0x00a7002d, 0xc00b7803, 0x5c00b700,
+ 0x2dc00b70, 0x02dc00b7, 0x0021800b, 0x7002f024, 0x60000000, 0x00000000,
+ 0x80009e00, 0xb7802de0, 0x0b78021e, 0x00a7802d, 0x640a5902, 0x96059f80,
+ 0x21e00b78, 0x829f04bf, 0x8421e003, 0x780ade00, 0xb4802da0, 0x487a02de,
+ 0x0087802d, 0xe00b3802, 0x1e00b780, 0x2de00b78, 0x02de00b7, 0x8021e00b,
+ 0x6802e010, 0x20000000, 0x00000000, 0x4814cc00, 0xb3002cc0, 0x0b30020c,
+ 0x00b3002c, 0xf4083406, 0x0d008309, 0x20f20a3c, 0x82cf00b3, 0x4060f40b,
+ 0x38028c80, 0xb3002cc0, 0x083012ec, 0x00a3002c, 0xc00b3002, 0x4c00b300,
+ 0x2cc00b30, 0x02cc00b3, 0x80a0c00b, 0x2802d204, 0x30000000, 0x00000000,
+ 0xe815a804, 0xfa013e81, 0x0ba00328, 0x00ea002f, 0xb40eed83, 0xb904dec1,
+ 0xb3b00be8, 0x01ba00fe, 0x5031944e, 0xe8a3fa80, 0xf6403fb0, 0xa8a043a8,
+ 0x02ca003e, 0x800ba003, 0x2800fa00, 0x3e800fa0, 0x03e800fa, 0xa032800f,
+ 0x2803fa04, 0x60000000, 0x00000000, 0x4800e000, 0xf8003e00, 0x0f8403e0,
+ 0x04f8403e, 0x100f8403, 0xe100f853, 0x3a040f80, 0x03e181f8, 0x003a101f,
+ 0x84026004, 0xf8443e06, 0x0f8003e1, 0x00f8003e, 0x000f8003, 0xe000f840,
+ 0x3e000f80, 0x03e000f8, 0x003e000f, 0xc103d200, 0x10000000, 0x00000000,
+ 0x0810e400, 0xf9003e40, 0x0f9803e4, 0x00f9903c, 0x600d1003, 0x6460f900,
+ 0x3e400f90, 0x03e400f9, 0x013e418c, 0x90432500, 0xe9883040, 0x0e9113e4,
+ 0x00c9003e, 0x400f9003, 0xe400f900, 0x3e400f90, 0x03e400f9, 0x0032400c,
+ 0x90031204, 0x30000000, 0x00000000, 0x80046400, 0xb9002e40, 0x0b9c02e4,
+ 0x0039402f, 0x4008dd10, 0x2400b984, 0x2e400b90, 0x02e600b9, 0xc12e5808,
+ 0x14022408, 0xc9302374, 0x089a22e5, 0x2089002e, 0x400b9002, 0xe400b900,
+ 0x2e400b90, 0x02e400b9, 0x40225088, 0x90022000, 0x10000000, 0x00000000,
+ 0x18052400, 0xb9002e40, 0x0a9602e4, 0x00b9082e, 0x4a09900a, 0x2404a910,
+ 0x2ed40b92, 0x02e460b9, 0x226a4408, 0x90020511, 0xab0022c0, 0x8a9002a4,
+ 0x0089602e, 0x400b9002, 0xe400b900, 0x2e400b90, 0x02e400b1, 0x00214008,
+ 0xd0020600, 0x40000000, 0x00000000, 0x08040400, 0xb1002c40, 0x0b1102c4,
+ 0x00b1102c, 0x44081102, 0x0c00b300, 0x2c409b30, 0x02c40031, 0x000e4028,
+ 0x90020441, 0x891020c4, 0x081002c5, 0x0081002c, 0x401b1002, 0xc400b100,
+ 0x2c400b10, 0x02c400b5, 0x90216408, 0x50020201, 0x00000000, 0x00000000,
+ 0xb80d6000, 0xf8003e00, 0x0e0683e0, 0x00f8417e, 0x1a4da6a3, 0x2008f800,
+ 0x3e000b80, 0x03e000fa, 0x003e000c, 0xa0032100, 0xe840b21a, 0x0e8293e0,
+ 0x02c8003e, 0x000f8a83, 0xe000fa00, 0x3e000f80, 0x03e000f0, 0x40b2100c,
+ 0xc00b0e03, 0x50000000, 0x00000000, 0x980de400, 0xf9003e40, 0x0f9203e4,
+ 0x00f92437, 0x480ff20b, 0xf400fd00, 0x3f410fd0, 0x03f400f5, 0x003f400f,
+ 0xd00bf490, 0xef213fc8, 0x0f900364, 0x00f9003e, 0x401f9003, 0xe400f900,
+ 0x3e400f90, 0x03e400f9, 0x2216482f, 0x9003f602, 0x70000000, 0x00000000,
+ 0x9805e400, 0xf9003e40, 0x0f900324, 0x00fd007f, 0x400ed003, 0xb400fd00,
+ 0x3f400dd0, 0x07b400d5, 0x0437400f, 0xd013e400, 0x3d013740, 0x8fd00374,
+ 0x04c1003e, 0x400f9003, 0xe400f500, 0x3e400f90, 0x03e400fd, 0x0033400f,
+ 0xd003c604, 0x70000000, 0x00000000, 0x3810e000, 0xb8002e00, 0x0b802220,
+ 0x04b8042e, 0x00088022, 0x2000b804, 0x2e000380, 0x22200088, 0x002e000b,
+ 0x8002e000, 0x90002000, 0x0b804220, 0x00a8002e, 0x000b8002, 0xe000b800,
+ 0x2e000b80, 0x02e000b8, 0x0022800b, 0x8002de04, 0x30000000, 0x00000000,
+ 0x4805c408, 0xb1002c40, 0x0b100a04, 0x00b1002c, 0x400a1002, 0x8400a100,
+ 0x2c408390, 0x02241091, 0x002c4003, 0x1042c401, 0xb1002440, 0x8b100644,
+ 0x0081002c, 0x400b1102, 0xc400b100, 0x2c400b10, 0x02c400b1, 0x0020400b,
+ 0x1802d201, 0x70000000, 0x00000000, 0x18152400, 0xb9002e40, 0x0b900224,
+ 0x00bb002e, 0xc0083142, 0x2400bb02, 0x0e511b94, 0x0225808b, 0x204e580b,
+ 0x9002e4a8, 0x19022240, 0x0b900224, 0x00a9002e, 0x400b9002, 0xe400b900,
+ 0x2e400b90, 0x02e400b9, 0x0022400b, 0x9002d600, 0x60000000, 0x00000000,
+ 0xa015e400, 0xf9003e40, 0x0b900324, 0x04fd002f, 0x780ad803, 0xa6d0e9e0,
+ 0x3e400f1c, 0x020510d9, 0x202e504f, 0x9042e508, 0xfd403754, 0x0f900764,
+ 0x02c9003e, 0x401f9003, 0xe400f900, 0x3e400f90, 0x03e400fd, 0x00b3500f,
+ 0x9003f800, 0x70000000, 0x00000000, 0xe801a400, 0xf9003e40, 0x0f3083e4,
+ 0x04f9022e, 0x680f9823, 0xe600f928, 0x3e440f99, 0x0b661079, 0x883e408f,
+ 0x9023ee14, 0xd9085e60, 0x071023e4, 0x00fb003e, 0x400f9003, 0xe400f900,
+ 0x3e400f90, 0x03e400f9, 0x003e400f, 0x9003fa00, 0x60000000, 0x00000000,
+ 0x2810a000, 0xf8003e00, 0x0f800b20, 0x00f80036, 0x104f8403, 0x2020f800,
+ 0x3e090f80, 0x036050f8, 0x4036020e, 0x8107e000, 0xe8543a08, 0x4c830b60,
+ 0x40c80032, 0x000f8003, 0xe000f830, 0x3a000f80, 0x03e000f8, 0x1032102c,
+ 0x8003ca00, 0x20000000, 0x00000000, 0x28052800, 0xba002e80, 0x0ba40228,
+ 0x00bee023, 0x8c0be002, 0x3880bea0, 0x6fa01be0, 0x203810be, 0xc223b098,
+ 0xe403e800, 0xee402390, 0x0de00239, 0x40da0036, 0x800ba002, 0xe800be00,
+ 0x22800ba0, 0x02e800ee, 0x00a38008, 0xe002ca00, 0x40000000, 0x00000000,
+ 0x28054c00, 0xb3002cc0, 0x0b30024c, 0x00b3e026, 0xd00b3082, 0x0f0cb3c6,
+ 0x2cf00930, 0x024c80b3, 0xc42ce00a, 0x0482ce40, 0xab8068d0, 0x183c062e,
+ 0x00830020, 0xc00b3002, 0xcc00b240, 0x28c00b30, 0x02cc00bb, 0x0020c008,
+ 0x3802ca04, 0x50000000, 0x00000000, 0xa0011c00, 0xb7002dc0, 0x0934025c,
+ 0x00b7a021, 0xc00b7502, 0x1410b701, 0x25500b70, 0x021c00b6, 0xc029e24a,
+ 0x50069c00, 0xa62021f0, 0x09604218, 0x10978825, 0xc00b7002, 0xdc00b780,
+ 0x21c00b70, 0x02dc00a5, 0x20216008, 0x7082e800, 0x40000000, 0x00000000,
+ 0xa8081e04, 0xf7803de0, 0x0f79035e, 0x04ffc075, 0xe00f3a03, 0x1e04f780,
+ 0x2de10b78, 0x035e04b6, 0x801de00a, 0x5806d220, 0xe5c039e0, 0x0c38033a,
+ 0x00c68a31, 0xe00b7803, 0xde00f682, 0x39e00f78, 0x03de00fe, 0xc033a00c,
+ 0x7803ea22, 0x00000000, 0x00000000, 0x084dac00, 0xfb003ec0, 0x0fb003ac,
+ 0x00ff803f, 0xe40ff82b, 0xe800fb00, 0x3e000f00, 0x03e800fa, 0x0130c00d,
+ 0x9003e180, 0xff802fe4, 0x0fb003a8, 0x00f8003e, 0xc00fb003, 0xec00fa00,
+ 0x3ec00fb0, 0x03ec00ed, 0x823f640f, 0xb003c206, 0x60000000, 0x00000000,
+ 0x4005fe00, 0xff803fe0, 0x0ff803be, 0x00ff803f, 0xe10cd803, 0x7650cf91,
+ 0x39e40cfa, 0x033e00e6, 0x80b7e14d, 0xf8477440, 0xff80b320, 0x0cf80336,
+ 0x08cf801f, 0xe00ff803, 0xbe00ff80, 0x3fe00ff8, 0x03fe00ff, 0x803fe00f,
+ 0xf903c000, 0x70000000, 0x00000000, 0xa8119c00, 0xb7002dc0, 0x0b50021c,
+ 0x00b7002d, 0xc00d5002, 0xd4428404, 0x2dc42872, 0x021c00b6, 0x0c25c80b,
+ 0x7006d420, 0xb7102311, 0x087043fc, 0x0087002d, 0xc00f7003, 0x9c00b500,
+ 0x2dc00b70, 0x02dc00b7, 0x003d480b, 0x7002ea84, 0x60000000, 0x00000000,
+ 0x10009c00, 0xb7002dc0, 0x0b50029c, 0x40b70028, 0xc0095102, 0xdc088702,
+ 0x05c50a73, 0x4a9440b4, 0x00290309, 0x7002d040, 0xb7002144, 0x08510210,
+ 0x40a4002d, 0xc00b7002, 0x9c00b600, 0x2dc00b70, 0x02dc00b6, 0x002d804b,
+ 0x7012c000, 0x20000000, 0x00000000, 0x6014cc08, 0xb3002cc0, 0x0b00220c,
+ 0x00b3002c, 0xd4993000, 0xc90880e6, 0x2cf10a0c, 0x060200b0, 0x800c108b,
+ 0x3482c320, 0x3ba020c0, 0x881006a8, 0x00b0002c, 0xc00a3002, 0x8c00b000,
+ 0x2cc00b30, 0x00cc00b3, 0x002a400b, 0x3402c804, 0x30000000, 0x00000000,
+ 0x2815ac00, 0xfb003ec0, 0x0ba003ac, 0x00f8003e, 0x200daa13, 0xec488b20,
+ 0x7e560ebc, 0x032d60f2, 0x003ad04d, 0x14126e00, 0xf8e032e2, 0x08b0222c,
+ 0x02eb003e, 0xc00bb003, 0xac007200, 0x3ec00fb0, 0x03ec00fb, 0x002ec00f,
+ 0xb903ea04, 0x60000000, 0x00000000, 0x9000ec00, 0xfb003ec0, 0x0fa013ec,
+ 0x05fd433f, 0x820fe487, 0xef00fb42, 0x7e5001b3, 0x03e400f8, 0x4002088b,
+ 0x90036401, 0xff403dd0, 0x2f0023ec, 0x008b003e, 0xc00fb003, 0xec00fb00,
+ 0x3ec00fb0, 0x23ec01fd, 0x003fc00f, 0xb843e000, 0x30000000, 0x00000000,
+ 0x9010fc00, 0xff003fc0, 0x0fe9037c, 0x00ee003f, 0x200ff403, 0xff08fca0,
+ 0x33c097f0, 0x03fe406e, 0x00b3c007, 0xd02b3a00, 0xff0003e2, 0x20a01338,
+ 0x00cca03f, 0xc00ff007, 0xfc00fe00, 0x33c01ff0, 0x03fc00fe, 0x003fa80c,
+ 0xfa03c044, 0x30000000, 0x00000000, 0x80046c00, 0xbb002ec0, 0x0bac022c,
+ 0x00eb802e, 0xe40bb443, 0xa824b002, 0x2a300b80, 0x06c11088, 0x0222340b,
+ 0x9c002008, 0xebf036f4, 0x00849368, 0x0088002e, 0xc01bb006, 0xec00bb00,
+ 0x2ac00fb0, 0x02ec00e9, 0x003ac008, 0xb002e000, 0x10000000, 0x00000000,
+ 0x80012c00, 0xbb002ec0, 0x0b04026c, 0x00a8102e, 0x400ba006, 0xe000bb00,
+ 0x2ab04bb0, 0x02e828aa, 0x2062c20b, 0x9c102c90, 0xbb002e80, 0x08b2022c,
+ 0xa08b002e, 0xc00bb012, 0xec04bb08, 0x22c00bb0, 0x02ec04bb, 0x042ec028,
+ 0x9002e000, 0x40000000, 0x00000000, 0x08040c00, 0xb3002cc0, 0x0b00020c,
+ 0x00a3002c, 0xc00b3062, 0x8008b804, 0x20804930, 0x02c000a8, 0x0020000b,
+ 0x90020401, 0xa300acc0, 0x0a10024c, 0x0983002c, 0xc00b3006, 0xcc00b100,
+ 0x68c00a30, 0x024c00a3, 0x0228c008, 0x1002c211, 0x00000000, 0x00000000,
+ 0x800d6c00, 0xfb002ec0, 0x0f00036c, 0x00eb003e, 0xc00fb003, 0xec00f800,
+ 0x7a800bb0, 0x02e000e8, 0x0022000f, 0x90032800, 0xf30032c0, 0x0c900328,
+ 0x0288003e, 0xc00bb002, 0xec00fb00, 0x32c00bb0, 0x03ec00fa, 0x003e800c,
+ 0x9003c003, 0x00000000, 0x00000000, 0xa00dfc00, 0xff003fc0, 0x0fc003fc,
+ 0x00ff003f, 0xc00ff043, 0x9800fc04, 0x3f804f40, 0x23f0041c, 0x043f000f,
+ 0xd013f000, 0x7f0033c0, 0x0dd003f8, 0x04fc003f, 0xc00ff003, 0xfc00fd00,
+ 0x3fc00ff0, 0x03fc00ff, 0x003bc00f, 0xd003e807, 0x70000000, 0x00000000,
+ 0xc015fc20, 0xfc8037cb, 0x0cf30352, 0x12c70537, 0x240e7003, 0xd200ff82,
+ 0x2b200fc8, 0x037e08fd, 0x203f200c, 0xc0071210, 0xf4803d04, 0x07c413be,
+ 0x40d7803b, 0x300dd203, 0x34a0cc30, 0x33e408f9, 0x0b7c00cf, 0x20b30a0c,
+ 0xc0033000, 0x70000000, 0x00000000, 0x8000fe00, 0xb98021c2, 0x48f10a22,
+ 0x008fc02e, 0x0808fc02, 0xe200b980, 0x22200b98, 0x022e0039, 0xd02e600a,
+ 0x8c022200, 0xb8800e1c, 0x0985034c, 0x808b800a, 0x080c9903, 0xe7008820,
+ 0x3ac808b2, 0x02bf508f, 0xc022100a, 0x8002a006, 0x30000000, 0x00000000,
+ 0x0805cc09, 0xb00024c9, 0x08322280, 0x0083422c, 0x080a3402, 0x8000bb00,
+ 0x28000b90, 0x06cc0881, 0x002e0018, 0x01080010, 0xb0046c08, 0x8a0202ac,
+ 0x0c9304aa, 0x0009100e, 0x0000a040, 0x20400800, 0x028c0083, 0x10200008,
+ 0x00020201, 0x70000000, 0x00000000, 0xe015ac00, 0xb95022c0, 0x08b002a2,
+ 0x008b002c, 0x2008b002, 0xe200bb82, 0x02210bbc, 0x12ac003b, 0x802ee00a,
+ 0xb0822400, 0xbb142e00, 0x09b08a2c, 0x509b002a, 0x00019c42, 0xe2300909,
+ 0xa0d008a0, 0x82ac008b, 0x0022c00a, 0x8842b000, 0x60000000, 0x00000000,
+ 0x0001ec00, 0xf90036c0, 0x2cb013c3, 0x00cb0036, 0x300eb003, 0xa2007be0,
+ 0x3a288b88, 0x13ec08e8, 0x803c2208, 0x8c022180, 0xf8803e30, 0x0e0802ac,
+ 0x10da0c3a, 0x200d1843, 0x26106800, 0x32a40cb4, 0x03ac00cb, 0x00222624,
+ 0x8a030004, 0x70000000, 0x00000000, 0xa001bc00, 0xff023bc0, 0x8ff00270,
+ 0x00ff003f, 0x000ff003, 0xf000ff02, 0x3f000bd0, 0x023c20fa, 0x003fc00f,
+ 0x2c03fc40, 0xfe023fe6, 0x8dd943fc, 0x04ee103f, 0x908eb003, 0xdc12f74c,
+ 0xbb812ff9, 0x03cc02f7, 0x003de00f, 0x4003e800, 0x60000000, 0x00000000,
+ 0xc000ac20, 0xeb003bc1, 0x4c300320, 0x00df8432, 0x400ff003, 0x6100eb00,
+ 0x32105fb4, 0x03ec40f9, 0x4032008d, 0x9003a810, 0xc94032c0, 0x0ea0032c,
+ 0x00cb003a, 0xc00cb407, 0x2c00ca40, 0x32584c94, 0x0bac00cb, 0x003e080e,
+ 0x90033004, 0x20000000, 0x00000000, 0xc8453d00, 0x832123c0, 0x28f04160,
+ 0x008f0022, 0x408bfd83, 0x2000c300, 0x22610b3d, 0x102d00bb, 0x0262c188,
+ 0xb023ef60, 0xdb0076d8, 0x88b0034e, 0x80831834, 0x940fb603, 0x2c008bc0,
+ 0x22d808b0, 0x223c00df, 0x0032c00d, 0x95037200, 0x40000000, 0x00000000,
+ 0xc0040e41, 0xb0002ac0, 0x08304203, 0x60932060, 0x010b3806, 0x4000b300,
+ 0x28244b14, 0x0a8f00b0, 0x04206088, 0x0a020201, 0x80012430, 0x0a002280,
+ 0x2881c028, 0x204a0482, 0x4600a040, 0x20c008b0, 0x020c0083, 0x00a8204a,
+ 0x19423800, 0x10000000, 0x00000000, 0x60001e00, 0x9fc021e0, 0x08380252,
+ 0x00878021, 0xa00b7102, 0x32088f90, 0xa9209bf8, 0x8a1e00b4, 0x84237608,
+ 0x5822fa04, 0x9d8025ed, 0x182802de, 0x40858025, 0x220b7052, 0x3e028680,
+ 0xe9e018f8, 0x029e0097, 0x9020200b, 0x78025804, 0x10000000, 0x00000000,
+ 0x48180c40, 0xf30028c4, 0x08311300, 0x02d310b0, 0xd00f3103, 0x4040f310,
+ 0x68000b12, 0x02cc40f3, 0x40a0c10c, 0x20828c00, 0x827624d8, 0x4e10878d,
+ 0x12c3063a, 0x490a3302, 0x4c208b28, 0x22c00c32, 0x030c02c3, 0x0038c206,
+ 0x90031a02, 0x10000000, 0x00000000, 0x401c9d00, 0xe7003fc4, 0x0ff003f0,
+ 0x00ff003f, 0xc40ff313, 0xb800d714, 0x77840f70, 0x01bc00ff, 0x003dc00e,
+ 0xf1037c00, 0xff143fc8, 0x0ff1237c, 0x009f513f, 0x400ff00b, 0xdc029f00,
+ 0x37c42f70, 0x037c40f7, 0x443fc00d, 0xf007d004, 0x60000000, 0x00000000,
+ 0x2805ec80, 0xf8003fc8, 0x0fb203e0, 0x00df203e, 0x800ff603, 0x6000fb00,
+ 0x1a212d30, 0x13ac007a, 0x003cc08c, 0xb003e400, 0xeb013e01, 0x0cb00320,
+ 0x10c38432, 0x0008000b, 0x04108981, 0x32d80cb6, 0x032d60cb, 0x5032e00c,
+ 0x9003c200, 0x70000000, 0x00000000, 0xc8019c80, 0xb7002dc4, 0x0b7102d0,
+ 0x08f7102d, 0x008b3482, 0x1004b700, 0x21401870, 0x161c00b6, 0x002dc005,
+ 0x7012dc00, 0xb7002cc0, 0x0a70429c, 0x20a70215, 0x004f700a, 0x1c00d700,
+ 0x21c40871, 0x029c00a3, 0x02a3c008, 0x7002f206, 0x60000000, 0x00000000,
+ 0x00009e40, 0xa7802dec, 0x0b7902d3, 0x0087b02d, 0xe00b7802, 0x1201bfc0,
+ 0x2ba008f8, 0x06de1037, 0x802fe008, 0x7802de01, 0xb7846df0, 0x0938121e,
+ 0x04878003, 0xe0007812, 0x3e008780, 0x25e01a78, 0x120e8187, 0xa021e008,
+ 0x7802c840, 0x20000000, 0x00000000, 0x6814cc00, 0xb3a02ec0, 0x4b3002ce,
+ 0x08b3022c, 0xf40b3002, 0x0d08b221, 0x20c20838, 0x0a8c00b3, 0x946ce049,
+ 0x3402ce81, 0xb3222cd1, 0x0b3e02ec, 0x01a32164, 0xf80b3052, 0x0d019300,
+ 0xa0d00a34, 0x928c05a3, 0x0020d4a8, 0xbc82d200, 0x30000000, 0x00000000,
+ 0xe804a800, 0xfe403e80, 0x8fa003d9, 0x00c2003f, 0x800fa00b, 0x3900fec0,
+ 0x3ba80c60, 0x07e808fe, 0x002d800c, 0xe403da00, 0xfec03fb4, 0x09ec0b28,
+ 0x00ca08b3, 0x804c624a, 0x3884ce24, 0x34802ea4, 0x032806ca, 0x0033a40c,
+ 0xe403fa04, 0x70000000, 0x00000000, 0x48108000, 0xf8512e00, 0x0f8003e0,
+ 0x22f8003e, 0x000f8003, 0xa084f801, 0x3e010f81, 0x016100f8, 0x083e040f,
+ 0x0503e148, 0xf8103e00, 0x0e0113a0, 0x00f800be, 0x040f8003, 0xe120f800,
+ 0x3a000180, 0x03e000f8, 0x003e000f, 0x8103d200, 0x60000000, 0x00000000,
+ 0x0810a400, 0xc9003640, 0x0c900326, 0x00d91032, 0x424e1803, 0x2400f901,
+ 0x36448f90, 0x63260019, 0x0036400a, 0x91ab2400, 0xc9043e60, 0x0e98036e,
+ 0x00cb423e, 0x684c9003, 0x0482c91a, 0x3eca0cb0, 0x030402c1, 0xa032600f,
+ 0x91030204, 0x20000000, 0x00000000, 0x80006500, 0x81402240, 0x08900b25,
+ 0x20898830, 0x400d950a, 0x24087102, 0x22400b9d, 0x0b2480b9, 0x002e400a,
+ 0x9082a500, 0x89012c74, 0x089c0227, 0x04d9c03a, 0x703e9d8a, 0x66048940,
+ 0x2e410890, 0x022400c9, 0x8022700b, 0x900a2000, 0x10000000, 0x00000000,
+ 0x18052500, 0x89012641, 0x0810022c, 0x40990022, 0x408a9402, 0x6c00b900,
+ 0x26400b90, 0x00644099, 0x002e4008, 0x90022480, 0x89002e40, 0x1a912624,
+ 0x8489012c, 0xc108900a, 0x6404890c, 0x6e400810, 0x02240089, 0x0022460b,
+ 0x90024e00, 0x40000000, 0x00000000, 0x08040401, 0x89002050, 0x18140604,
+ 0x01810062, 0x50091006, 0x4400b900, 0x24400bb0, 0x0a0401b1, 0x0026c00a,
+ 0x10008400, 0x81002cc4, 0x08310204, 0x40930028, 0x444a9002, 0x44008114,
+ 0x2e440811, 0x4a040081, 0x0020440b, 0x11024a05, 0x00000000, 0x00000000,
+ 0x381d6000, 0x8a003600, 0x28800320, 0x00d80222, 0x000e8003, 0x6000f804,
+ 0x36010f80, 0x032000d8, 0x2c7e0008, 0x82922802, 0x88003e1a, 0x1e868b09,
+ 0x00c8023e, 0x9088828b, 0x28a0c069, 0x3c902c04, 0x1322a2c8, 0xa8b21a0f,
+ 0xa6836e03, 0x50000000, 0x00000000, 0xb819e502, 0xff002e50, 0x0f940394,
+ 0x00f940bb, 0x400e9403, 0xb400e700, 0x39c01ff0, 0x03e400fd, 0x003f400f,
+ 0xd0037408, 0xbd013f48, 0x2fd2032c, 0x90f90139, 0x480ed00b, 0xb410bd21,
+ 0x1ec80f9a, 0x13e410e9, 0x003f480f, 0xd203a604, 0x70000000, 0x00000000,
+ 0x3805f480, 0xfd00364c, 0x0c900314, 0x00ed003e, 0x400ed283, 0xe400f901,
+ 0x3b404fd0, 0x0b3400a9, 0x283b400e, 0xd0033400, 0xc9003d48, 0x0cd28374,
+ 0x40cd0037, 0x4008d003, 0x24008d00, 0x33400c90, 0x0b2400cd, 0x00b1480d,
+ 0xd2832600, 0x70000000, 0x00000000, 0x1800e000, 0xb8002e0c, 0x488482a8,
+ 0x0888102e, 0x0a088002, 0xe000b800, 0x36010e80, 0x022018a8, 0x002e010e,
+ 0x8412a008, 0xa8002e0a, 0x0aa20220, 0x80aa0122, 0x024f8002, 0xa000d800,
+ 0x32010800, 0x836000a8, 0x10220a48, 0x82020e06, 0x30000000, 0x00000000,
+ 0x48008440, 0xb1002c48, 0x28130264, 0x04a3006c, 0x480a1012, 0xc401b900,
+ 0x28400b90, 0x02040491, 0x000c400b, 0x11024400, 0x81002c4c, 0x081292c4,
+ 0x84890124, 0x41429002, 0x24018101, 0x28400812, 0x42044081, 0x00204c09,
+ 0x12821200, 0x20000000, 0x00000000, 0x1814a400, 0xb9222c40, 0x181006e4,
+ 0x0009002e, 0x40089000, 0xe424b910, 0x26400a90, 0x022400b9, 0x082e400a,
+ 0xb402a501, 0xa9612640, 0x4a900204, 0x84a92260, 0x40ca9052, 0xa4329941,
+ 0x2a400895, 0x026400a9, 0x00224808, 0x90020600, 0x20000000, 0x00000000,
+ 0xa040a404, 0xf9803640, 0x0c900347, 0x40e9003e, 0x480e9003, 0xe700f180,
+ 0x1a600f95, 0x13241079, 0x503a600f, 0x98034700, 0x89803e62, 0xac9503e5,
+ 0x00894036, 0x6c4a9c83, 0x2700c980, 0xba502c98, 0x0b2400c9, 0x0032780d,
+ 0x9a0b2804, 0x70000000, 0x00000000, 0xe810a400, 0xf9801e40, 0x0f9003a6,
+ 0x00f9023e, 0x480f9013, 0xe500f980, 0x3e680f98, 0x03e400e9, 0x803e680e,
+ 0x9103e680, 0xf9003c68, 0x0f9083e4, 0x00f9023e, 0x420f9223, 0xec80f920,
+ 0x32641f98, 0x0be400f1, 0x003c400f, 0x1203f200, 0x60000000, 0x00000000,
+ 0x2810a040, 0xf8003e00, 0x4f800b60, 0x00c80032, 0x100f8083, 0x6000f840,
+ 0x3a008f84, 0x836080f8, 0x4036008d, 0x0403e020, 0xf8002e10, 0x8c840321,
+ 0x80c800b6, 0x144c848b, 0x20804020, 0xb2084f80, 0x0b4000c8, 0x0032100c,
+ 0x8483c204, 0x20000000, 0x00000000, 0x08043800, 0x9e802e80, 0x0ba0133b,
+ 0xc08e00a2, 0x804bea02, 0x28083a00, 0x2a800b68, 0x021900ba, 0x002f8008,
+ 0xe4a33b00, 0xba002fa0, 0x0ae00a3a, 0x00d65023, 0x90026222, 0x0800aec0,
+ 0x23a10ba0, 0x03a800da, 0x0023b428, 0xe882ca00, 0x40000000, 0x00000000,
+ 0x08054f20, 0xb3e02cc0, 0x0b30020f, 0x02a36026, 0xc01b3002, 0xcc00b300,
+ 0x28e00b3d, 0x024c4093, 0x002cd818, 0x3a2a0d00, 0xb3002ce0, 0x08b8020e,
+ 0x00930020, 0xd040300a, 0x0d009300, 0x42e00bb0, 0x020c0083, 0x80a0c008,
+ 0x3002ca00, 0x50000000, 0x00000000, 0x20011401, 0x95082dc0, 0x0b32021c,
+ 0x00a78025, 0xc80b7802, 0x9c00bf00, 0x29d11be0, 0x4a1c00b7, 0x002f6008,
+ 0x10029d00, 0xb7006dc3, 0x2274021c, 0x20974023, 0xc00a5002, 0x3c00b708,
+ 0x61c20b70, 0x128c0097, 0x4021d008, 0x7012e004, 0x40000000, 0x00000000,
+ 0x28181e00, 0xf7813df0, 0x0f7a031e, 0x04e38035, 0xe80f3807, 0xde00f780,
+ 0x29e00f78, 0x035e00d7, 0x8035e008, 0x58031e10, 0xf7803de0, 0x0cf8133e,
+ 0x04d78021, 0xe0087803, 0x1e00df80, 0x31e00f79, 0x031e14c3, 0x8031600c,
+ 0x7803e002, 0x00000000, 0x00000000, 0x081da408, 0xd9003eda, 0x0fb023a4,
+ 0x00d9003b, 0xd99f9003, 0x6c00f300, 0x16c00f00, 0x03e400fb, 0x001c00aa,
+ 0x80032418, 0xfb001e80, 0x0f902360, 0x001300b8, 0xc00f1023, 0xcc80eb00,
+ 0x2ec00fb5, 0x032c00fb, 0x003e004f, 0x8003c204, 0x60000000, 0x00000000,
+ 0x6004be00, 0xcd9033e4, 0x0cfc833e, 0x00cf803f, 0xf28cf803, 0xfe00ff84,
+ 0x21e40cd8, 0x127e403f, 0x9031e00e, 0xd3137e08, 0xff903fe4, 0x0ce8027e,
+ 0x00d480ad, 0xec4c6803, 0x3f00df80, 0x03e405f8, 0x033e00cf, 0x8033e00c,
+ 0xf9033000, 0x60000000, 0x00000000, 0xa8009c00, 0xd51821c4, 0x08f0021c,
+ 0x8487403d, 0xc0086242, 0x1c00e700, 0x21c40d41, 0x029d00b7, 0x0035410e,
+ 0x52021d00, 0xb7002fcc, 0x8a62083d, 0x08040421, 0x160d4202, 0x1d80a520,
+ 0x290009f1, 0x035c40d7, 0x0023440a, 0xe002aa06, 0x20000000, 0x00000000,
+ 0x00008800, 0x950120c4, 0x1970021c, 0x0196002d, 0xc0097002, 0x9c60bf08,
+ 0x214088c0, 0x021800b7, 0x0227c40a, 0x11061860, 0xb7012d40, 0x4170425c,
+ 0x00861023, 0xc848c002, 0x1c049600, 0x05c00970, 0x021c0087, 0x00a10008,
+ 0x50020600, 0x20000000, 0x00000000, 0x40148c01, 0x910020c0, 0x09302a03,
+ 0x2090022e, 0xe0890000, 0x0e00a3e0, 0x60580808, 0x028000b3, 0x8024140a,
+ 0x00060100, 0xb3402c10, 0x0b984202, 0x40800062, 0x30890506, 0x0c1010c0,
+ 0x24000930, 0x064c0093, 0x0000104a, 0x00029800, 0x20000000, 0x00000000,
+ 0x2805a400, 0xdb80b3c0, 0x0df0032d, 0x22db023f, 0xc2ad3003, 0xad00f3c0,
+ 0xb2c8080d, 0x822c00fb, 0xa034448e, 0x1f2b0d10, 0xf3c82ee2, 0x29bc036e,
+ 0x02480032, 0xc04c3c0a, 0x0c10db81, 0xb6c30df0, 0x872c00cb, 0x0032c00c,
+ 0x98121a04, 0x60000000, 0x00000000, 0xa010e400, 0xfb4a3ec0, 0x0eb003ec,
+ 0x00ea403b, 0xc00eb423, 0xac80fb00, 0xbe400f80, 0x03a800fb, 0x003e500f,
+ 0x9003a900, 0x3b203c58, 0x8eb583ec, 0x00e8003a, 0xd80f8003, 0xef04e25c,
+ 0x3ad007b0, 0x13cc00f3, 0x013c620f, 0x9103e400, 0x30000000, 0x00000000,
+ 0x0110d400, 0xcf903dc0, 0x0c70133e, 0x80c70033, 0xc00ca803, 0x3c05ff00,
+ 0x73e007c0, 0x033c01cb, 0x003f400c, 0xd0037ea0, 0xcf0477c0, 0x0cf0033f,
+ 0x20fd823f, 0x001cea8b, 0x3480ad80, 0x33200ff0, 0x032c00cb, 0x0013400c,
+ 0xd003e804, 0x30000000, 0x00000000, 0x81006700, 0x8ac02ec0, 0x08b02304,
+ 0x00a8d022, 0xc0088a43, 0x6c00bb00, 0x3e440f8a, 0x0340008b, 0x002e280d,
+ 0x8c036100, 0xdb013662, 0x0d98a362, 0x00b090a2, 0x34488003, 0x6f00d840,
+ 0x22100bb0, 0x02ac00db, 0x90222008, 0x8802e840, 0x10000000, 0x00000000,
+ 0x80056620, 0x880c2ec0, 0x08b00a64, 0x01890006, 0xc0289112, 0x2c00bb00,
+ 0x22c00388, 0x002480ab, 0x002e2008, 0x88022400, 0x8b042ae0, 0x2a981220,
+ 0x04b84422, 0xc0088402, 0x28008b60, 0x26d84b30, 0x026c008b, 0x002ec408,
+ 0x9802e000, 0x40000000, 0x00000000, 0x08040001, 0x81002cc0, 0x28300204,
+ 0x00a00024, 0xc0180006, 0x4c00bb00, 0x2c408a00, 0x024000a3, 0x002c0109,
+ 0x00026001, 0x9b042440, 0x18100240, 0x01b00420, 0x00080002, 0x6811b000,
+ 0xac000b30, 0x0acc0093, 0x002c40a8, 0x0012c205, 0x00000000, 0x00000000,
+ 0x00196000, 0xc8002fc0, 0x0cf00264, 0x028800a5, 0xc00c8003, 0x2c00bb00,
+ 0x22404b80, 0x022002ab, 0x002e000c, 0x80032000, 0xcb006a40, 0x18900320,
+ 0x04f800b2, 0x0028800b, 0x2400c000, 0x36000ff0, 0x0b6c00c9, 0x00be000c,
+ 0x9003e003, 0x50000000, 0x00000000, 0xa01df002, 0xf4003fc0, 0x8ff00390,
+ 0x00fc003b, 0xc00fc043, 0xfc007700, 0x3b400f40, 0x437000df, 0x003f010f,
+ 0xc003f000, 0xff043f40, 0x0f5003f0, 0x04fc020f, 0x000fc002, 0xdc00dc02,
+ 0x33000ff0, 0x03bc00fd, 0x0033000f, 0xc007e804, 0x70000000, 0x00000000,
+ 0xc005fe10, 0xff803fe0, 0x0ff913bc, 0x80ff303b, 0xd80ff403, 0xd090fe80,
+ 0x3ff00e78, 0x03fc00ff, 0x9039640d, 0xfc037200, 0xff843bc9, 0x0ff8023e,
+ 0x00ec8031, 0xe00ff843, 0xfe40f791, 0x3dd10ff8, 0x03fe00ff, 0x803d200c,
+ 0xf8033000, 0x70000000, 0x00000000, 0xc010ee00, 0xbb802ee0, 0x0bb2422e,
+ 0x408b3222, 0xd00b3442, 0x2300b880, 0x2e8008a8, 0x02ff00bb, 0x001a0008,
+ 0xb0022210, 0xbb802cda, 0x0bb082ae, 0x00b8002a, 0xe00bb802, 0xec80bb20,
+ 0x2ec808b8, 0x02ee00bb, 0x802e4008, 0xb0022004, 0x30000000, 0x00000000,
+ 0xc805cc00, 0xb3002cc0, 0x0b32028c, 0x00a32068, 0xcc8a3602, 0x8450b201,
+ 0x64480b10, 0x06cd00a3, 0x222c0009, 0x12068008, 0xa3002cc4, 0x0a32420c,
+ 0x00b00820, 0xc00b3002, 0xcc00b300, 0x2ccc0a30, 0x02cc00b3, 0x002cc008,
+ 0x30020201, 0x70000000, 0x00000000, 0xc015ac00, 0xbb002ec0, 0x0b30022d,
+ 0x008a0022, 0x008b8102, 0xa4013984, 0x6e024381, 0x16ec183b, 0x002c2008,
+ 0xb012a200, 0xbb002ec5, 0x0b3042ac, 0x00b8002a, 0xc01bb002, 0xec00bb00,
+ 0x6ec008b0, 0x02ec00bb, 0x000ec008, 0xb0023004, 0x60000000, 0x00000000,
+ 0x4015ec00, 0xfb003ec0, 0x0fb003ad, 0x04fbc83a, 0xf00fbc03, 0xe800fac0,
+ 0x7e444fac, 0x43ec00fb, 0x003a300d, 0x980ba211, 0xfb013a20, 0x0fb0032c,
+ 0x00eb6032, 0xc00fb043, 0xec00fb00, 0x3ec08eb0, 0x03ec00fb, 0x003e482c,
+ 0xb0031004, 0x70000000, 0x00000000, 0xa001bc00, 0xff003fc0, 0x0ff02371,
+ 0x08f5c03f, 0xc40ff803, 0x7840fe00, 0x3fc20ce8, 0x23ec00ff, 0x007b000b,
+ 0xdc473000, 0xff013fc0, 0x0ff003fc, 0x00ff003f, 0xc08ff043, 0xfc08ff02,
+ 0x3fc00ef0, 0x03fc00ff, 0x043f640f, 0xf003f800, 0x60000000, 0x00000000,
+ 0xc010ac00, 0xfb003ec0, 0x0fb083dd, 0x01fe103f, 0xd00ef4a3, 0x6c00eb62,
+ 0x3e408d95, 0x036c00fb, 0x013a580d, 0x90032420, 0xfb083e00, 0x0fb083ec,
+ 0x00fb003a, 0xcc0fb003, 0xec00fb20, 0x3ac00cb0, 0x03ec00fb, 0x003ec00c,
+ 0xb0033004, 0x20000000, 0x00000000, 0xd8052c00, 0xbb002ec0, 0x0bb602ec,
+ 0x00ba802e, 0xf608b800, 0x2d0089a0, 0x32620c8d, 0x003e008b, 0x61223008,
+ 0x90002600, 0xbb642e60, 0x48bc42ec, 0x00bb0022, 0xd01cb002, 0xee00bbc0,
+ 0x21e028b0, 0x02ec00bb, 0x002ee00d, 0xb0023200, 0x40000000, 0x00000000,
+ 0xe0054c00, 0xb3002cc0, 0x0b3802cc, 0x00b3482c, 0xd05ab404, 0xc12093c0,
+ 0x26b10b1c, 0x12ce0083, 0xc8280009, 0xb042c100, 0x33002ce0, 0x0a3906cc,
+ 0x00b80028, 0xe00a3002, 0xcf60b300, 0x2cc00830, 0x02cc00b3, 0x002e4408,
+ 0xb0023800, 0x50000000, 0x00000000, 0xf8011e00, 0xb7802de0, 0x0b7802d2,
+ 0x00b7802c, 0xa41a5986, 0x9200b580, 0x21a00a58, 0x205e40a7, 0x92236208,
+ 0x78025260, 0xb7802de0, 0x087802de, 0x00bc8021, 0xe0087812, 0xde00b780,
+ 0x25e40878, 0x02de00b7, 0x802fe009, 0x78021800, 0x40000000, 0x00000000,
+ 0x48080c00, 0xf3003cc0, 0x0f3002cc, 0x00b3003c, 0x400e2403, 0xc400f240,
+ 0x3ec00736, 0x134c22eb, 0x0038800d, 0x900bc000, 0xb3003cc2, 0x0e3003cc,
+ 0x00f10838, 0xc08e3003, 0xcc00b308, 0x3cc20c30, 0x03cc00f3, 0x003cc00c,
+ 0xb00b1202, 0x00000000, 0x00000000, 0x401dbc00, 0xff003fc0, 0x0ff003fc,
+ 0x00ff003f, 0x008dc003, 0x3c00c500, 0x3b800cf0, 0x03bc08cf, 0x0037001f,
+ 0xf003b010, 0xff003fc4, 0x0ef003fc, 0x00f4003f, 0xc00ef003, 0xfc00ff00,
+ 0x3bc00ff0, 0x03fc00ff, 0x003fc00f, 0xf003d006, 0x60000000, 0x00000000,
+ 0xa805ec00, 0xfb003ec0, 0x0fb803bc, 0x40fd003b, 0xc01ef103, 0x6000fb01,
+ 0x3e000508, 0x436cb1eb, 0x0036000f, 0xb0036200, 0xcb003e00, 0x0fb003ec,
+ 0x00fb003e, 0xc007b003, 0xec00fb00, 0x2ce00eb0, 0x03ec00fb, 0x003ec00f,
+ 0xb003ea00, 0x70000000, 0x00000000, 0xc8119c00, 0xb7002dc0, 0x0bf00212,
+ 0x80bda063, 0xf9083802, 0x1020b700, 0x2d812940, 0x021c8087, 0x00230008,
+ 0xf0421000, 0x87002dc4, 0x097002dc, 0x00b7102d, 0xc0097002, 0xdc00b700,
+ 0x2dc00870, 0x00dc00b7, 0x002dc00b, 0x7002f204, 0x60000000, 0x00000000,
+ 0x80009e00, 0xb7802de0, 0x0b78029f, 0x80b7b029, 0xe00b7c02, 0x9601b780,
+ 0x2b6008f8, 0x020e4087, 0x8025200a, 0x58023622, 0xa7802da0, 0x097842de,
+ 0x09b7802d, 0xe00b7802, 0xde00b780, 0x2de48a78, 0x02de00b7, 0x802de00b,
+ 0x7800f000, 0x20000000, 0x00000000, 0x4814cc00, 0xb3002cc0, 0x0b30020d,
+ 0x04b35420, 0xc0013802, 0x8c40b300, 0x2cc40030, 0x020c00ab, 0x0024f808,
+ 0x31024d00, 0xa3002cf8, 0x09b002cc, 0x00b3106c, 0xc0093002, 0xcc00b300,
+ 0x2cc00830, 0x02cc00b3, 0x022ee40b, 0x3002d204, 0x10000000, 0x00000000,
+ 0xe815a800, 0xfa003e80, 0x0fa003b8, 0x10fe803b, 0xb20fed03, 0xaa04fe02,
+ 0x3bb00de4, 0x0a2800aa, 0x0037b00e, 0xa8037b00, 0xea003e88, 0x09a003e8,
+ 0x00fa003e, 0x800ba003, 0xe800fa00, 0x3e800ea0, 0x03e800fa, 0x003fb00f,
+ 0xa003fa04, 0x60000000, 0x00000000, 0x4800e000, 0xf8003e00, 0x0f8003e0,
+ 0x00f8483e, 0x020e800b, 0x2000f820, 0x3e120f82, 0x038002d8, 0x403a140e,
+ 0x800ba120, 0x48407e00, 0x0f841360, 0x00f8083e, 0x000d8003, 0xe100f800,
+ 0x3e100f80, 0x03e000f8, 0x003e020f, 0x8003d200, 0x30000000, 0x00000000,
+ 0x0810e400, 0xf9003e40, 0x0f9203c4, 0x20d98034, 0x500e1903, 0x6c00f900,
+ 0x3e400d90, 0x03e400c9, 0x4076700c, 0x90022600, 0xf9002ee0, 0x0f9903a4,
+ 0x00fbc02e, 0x500f9003, 0xe440f980, 0x3e400f90, 0x03e400f9, 0x000e442c,
+ 0x9203c204, 0x30000000, 0x00000000, 0x80046400, 0xb9002e40, 0x0b9802f4,
+ 0x008d2003, 0x5008d602, 0x2501b901, 0x3a648894, 0x02e500d9, 0xc0a24845,
+ 0x90022600, 0xb9802e60, 0x0e920224, 0x00b9402e, 0x620b9002, 0xe600b900,
+ 0x2e480b90, 0x02e400b9, 0x002e4008, 0x9002e000, 0x10000000, 0x00000000,
+ 0x18052400, 0xb9002e40, 0x0b9402e4, 0x00911026, 0xc20a9002, 0x6401b900,
+ 0x64424892, 0x02244089, 0x0060c008, 0x1006a580, 0xb9502e48, 0x0b9002a4,
+ 0x00b9082e, 0x400b9002, 0xe500b920, 0x2e400b90, 0x02e400b9, 0x002e4008,
+ 0x9002c600, 0x40000000, 0x00000000, 0x08040400, 0xb1002c40, 0x0b1102c4,
+ 0x00811020, 0x441a1142, 0x0c00b100, 0x28440930, 0x20cc0081, 0x11204409,
+ 0x11468400, 0xb1022c44, 0x0a110204, 0x00b1102c, 0x400b1002, 0xc440b110,
+ 0x2c440b10, 0x02c400b1, 0x002c4408, 0x1102c201, 0x00000000, 0x00000000,
+ 0x380d6000, 0xf8003e00, 0x0f8402e0, 0xa0d86836, 0x1a8a8683, 0x60b0b800,
+ 0x1e102d80, 0x13a0a282, 0x4136100c, 0x840ba004, 0xf8043e1a, 0x0f8403a0,
+ 0x00f8403e, 0x000f8003, 0xe100f840, 0x3e1a0f80, 0x03e000f8, 0x003e100c,
+ 0x8403ce03, 0x50000000, 0x00000000, 0x981de400, 0xf9003e40, 0x0f9203fc,
+ 0x00fd203f, 0x480dd203, 0xe410ff00, 0x3d484ed0, 0x03e400f9, 0x203f480f,
+ 0xd2025400, 0xb9023e48, 0x0e9201e4, 0x00f9203e, 0x400f9003, 0xe480f920,
+ 0x3e480f90, 0x03e400f9, 0x003f480f, 0x9203e606, 0x70000000, 0x00000000,
+ 0x1805e400, 0xf9003e40, 0x0fd003e4, 0x00ed0037, 0x401fd003, 0x3400ff00,
+ 0x33400fd0, 0x03b408dd, 0x003b400f, 0x90011400, 0xfd013a40, 0x0dd001e4,
+ 0x00ed003f, 0x400f9003, 0xf400fd00, 0x3f400f90, 0x03e400f9, 0x003f400f,
+ 0xd003c600, 0x70000000, 0x00000000, 0x3810a000, 0xb8002e00, 0x0b8002e0,
+ 0x008a0022, 0x000ba002, 0x2000b800, 0x20000b80, 0x22200280, 0x002e000b,
+ 0x80022010, 0xb8002e00, 0x888002e0, 0x08b8002e, 0x000b8002, 0xe000b800,
+ 0x2e000b80, 0x02e008b8, 0x042e000b, 0x8282ce04, 0x30000000, 0x00000000,
+ 0x4804c400, 0xb1002c40, 0x0b1002c4, 0x00a10024, 0x400b1002, 0x0400b902,
+ 0x24404b10, 0x06840881, 0x0428410b, 0x90020608, 0xb1002c41, 0x0b1006c4,
+ 0x00b1002c, 0x400b1006, 0xc400b100, 0x2c400b10, 0x02c400b1, 0x002c400b,
+ 0x1202c201, 0x70000000, 0x00000000, 0x1815a400, 0xb9002e40, 0x0b9002e4,
+ 0x008b0022, 0xc00b9002, 0x2700b900, 0x26d00b90, 0x96241089, 0x002ec40b,
+ 0x920a2400, 0xb9002e40, 0x089002e4, 0x01b9002e, 0xc04b9002, 0xec00b900,
+ 0x2e400b90, 0x02e400b9, 0x002e460b, 0x9002c604, 0x60000000, 0x00000000,
+ 0xa015e400, 0xf9003e40, 0x0fd003e6, 0x00ed0037, 0x6c0bdd03, 0x2600f1c0,
+ 0xb7700f94, 0x03a400dd, 0x003b720f, 0x10022540, 0xf9007a40, 0x0fd003e4,
+ 0x00e9087e, 0x400f9003, 0xe400f900, 0x3e400f90, 0x03e400f9, 0x043f700f,
+ 0x9003e804, 0x70000000, 0x00000000, 0xe801a400, 0xf9003e40, 0x0f9003c4,
+ 0x80f91b3a, 0x6007900b, 0xe400f920, 0x3a480f9a, 0x03a400f9, 0x013e400f,
+ 0x9803e414, 0xf9007ec8, 0x079003e4, 0x00f9003e, 0x400f9003, 0xe400f900,
+ 0x3e400f90, 0x03e400f9, 0x003e400f, 0x9003ea00, 0x60000000, 0x00000000,
+ 0x2810a000, 0xf8003e00, 0x0f8003e1, 0x00f0007e, 0x080e8403, 0x2000e840,
+ 0x3e080e80, 0x838008c8, 0x102a020e, 0x800b2024, 0xc8943000, 0x0f8083e0,
+ 0x00f8103a, 0x030f8013, 0xe208f808, 0x2e080d80, 0x03e000f8, 0x003e100f,
+ 0x8003ca04, 0x20000000, 0x00000000, 0x28052800, 0xba002e80, 0x0be902e8,
+ 0x00be816f, 0xa008ee02, 0x39008e5a, 0x2fa20860, 0x03b8008e, 0xc037b00b,
+ 0xa0037b00, 0xce0022a2, 0x0eee02e8, 0x00be8023, 0x800ba002, 0xfa80be40,
+ 0x2fb008a0, 0x02e800ba, 0x002e800b, 0xa002ca00, 0x40000000, 0x00000000,
+ 0x28054c00, 0xb3002cc0, 0x1b3c02cc, 0x04b3952c, 0xd00ab62a, 0x8c90a300,
+ 0x24d10a38, 0x028c0183, 0x0820f00b, 0x30020d40, 0x830020c0, 0x0b3c02cc,
+ 0x00b28028, 0xf00b3002, 0xcc00b350, 0x2ce00930, 0x02cc00a3, 0x002cc00b,
+ 0x1002ca00, 0x50000000, 0x00000000, 0xa0011c00, 0xb7002dc0, 0x0b7702dc,
+ 0x00b5202c, 0x74087102, 0x9e218700, 0x2d281870, 0x829c0186, 0xa4658a0b,
+ 0x70027e10, 0x8781a1c0, 0x4a7102dc, 0x00be8021, 0xd00b7002, 0xdc00b600,
+ 0x25620870, 0x02dc00b7, 0x006d400b, 0x5002e800, 0x40000000, 0x00000000,
+ 0xa8081e00, 0xf7803de0, 0x0f7a03de, 0x00f7c02d, 0xe80e3a02, 0x8e00e780,
+ 0x2de00278, 0x138e0285, 0xa039e00e, 0xfb131202, 0xc78311e0, 0x0f6a03de,
+ 0x00f78039, 0x600f7803, 0xd600f780, 0x3de00d78, 0x03de00e7, 0x803de80f,
+ 0x5803ea02, 0x00000000, 0x00000000, 0x080dac04, 0xfb003ec0, 0x0ff803ec,
+ 0x00ff803f, 0x608ff813, 0x6c00fb00, 0x3fe48fb0, 0x03e400ff, 0x803fe40f,
+ 0xb501ac00, 0xe3003e5a, 0x0fe803ec, 0x00f3013e, 0x000fb003, 0xe800fa00,
+ 0x3c400fb0, 0x03ec00fb, 0x013fe00f, 0xd003c206, 0x60000000, 0x00000000,
+ 0x0005fe00, 0xff903fe0, 0x0fe803fe, 0x00fe803b, 0xe40ac902, 0xfe00ff80,
+ 0x35a00cf9, 0x03fe00ef, 0x883f204c, 0xf227f400, 0xfd813f60, 0x0fd803fe,
+ 0x00fe8031, 0xa40ef803, 0xfa00ce90, 0x3fa00cf8, 0x03fe00ff, 0x803fe60f,
+ 0xd803c000, 0x70000000, 0x00000000, 0xa8119c00, 0xb7002dc0, 0x0b6102dc,
+ 0x10b40023, 0xcd085702, 0xdca0b400, 0x21c00851, 0x02dc0086, 0x003bc008,
+ 0x7302d404, 0xb6002dc2, 0x0b7002dc, 0x04be0035, 0xc0087002, 0xf000d600,
+ 0x3d800870, 0x02dc00b7, 0x002d400b, 0x5002ea04, 0x60000000, 0x00000000,
+ 0x00009c00, 0xb7006dc0, 0x0b6002dc, 0x40b70829, 0xc29b6002, 0xd800b700,
+ 0x27c22861, 0x029c00b5, 0x102dc028, 0x7042d0c0, 0xb5002d44, 0x0b4002dc,
+ 0x00b74021, 0x810a7002, 0xd4008400, 0x6dc00870, 0x02dc00b7, 0x002dc00b,
+ 0x5002c000, 0x20000000, 0x00000000, 0x2014cc00, 0xb3002cc0, 0x0b3002ce,
+ 0x00b3c220, 0xf0013802, 0xc8003049, 0x20c00802, 0x02c400a3, 0x0428f008,
+ 0x3902c411, 0xb3042c41, 0x0b3002cc, 0x09b30224, 0x00083002, 0xc0009800,
+ 0x2ac00830, 0x02cc00b3, 0x002ce40b, 0x9002c804, 0x30000000, 0x00000000,
+ 0xa815ac00, 0xfb003ec0, 0x0f9004ef, 0x00fb403a, 0xa40bb983, 0xec00fbe0,
+ 0x36400cb0, 0x03cc00fb, 0x001e6c08, 0xf002ea00, 0xb9003e04, 0x1fb002ec,
+ 0x00fb4030, 0xc00ab003, 0xe400c900, 0x2ec02cb0, 0x03ec00fb, 0x003cc00b,
+ 0xb003ea04, 0x60000000, 0x00000000, 0x8000ec00, 0xfb003ec0, 0x0ff003ec,
+ 0xc1fd083f, 0x110ef003, 0xe900fb00, 0x3bc00fa4, 0x07ec01de, 0x413bc04e,
+ 0xb003ea00, 0xfb013e90, 0x0ff403ec, 0x00fb403e, 0xc00fb003, 0xec00fa00,
+ 0x3e400fb0, 0x03ec00fb, 0x003e400f, 0xb003e000, 0x30000000, 0x00000000,
+ 0x0110fc00, 0xff003fc0, 0x0fdc03bc, 0x00ff007f, 0xc00df003, 0xfe00bf00,
+ 0x3ff20ddc, 0x037800dd, 0x127ff00f, 0xf0033280, 0xde033f01, 0x0ff043fc,
+ 0x00ff003f, 0x400cf003, 0xf500cf90, 0x22c00cf0, 0x03bc00ff, 0x003fc20c,
+ 0xd0030044, 0x30000000, 0x00000000, 0x80006c00, 0xbb002ec0, 0x0bbc83ac,
+ 0x00eb006e, 0xd088b522, 0xea40bb02, 0x2ed00b0c, 0x2321008b, 0x006ec00e,
+ 0xb0022820, 0xbac02e08, 0xcbb603ac, 0x00bbe12e, 0x500eb002, 0xeb00aa80,
+ 0x2a4008b0, 0x02ec00bb, 0x042ec008, 0x99022040, 0x10000000, 0x00000000,
+ 0x80012c00, 0xbb002ec0, 0x0b9002ac, 0x04ba202c, 0x89998022, 0xe421bb00,
+ 0x2ec00bb4, 0x026d089b, 0x082ec00b, 0x300aac00, 0xb9c02e08, 0x1991066c,
+ 0x00b9802e, 0x8008b002, 0xc4008800, 0x2a8008b0, 0x02ac00bb, 0x002ec018,
+ 0xb0022000, 0x40000000, 0x00000000, 0x08040c00, 0xb3002cc0, 0x0b30028c,
+ 0x0083002c, 0xc0083002, 0xc001b000, 0x2cc08b80, 0x060c0003, 0x002cc01b,
+ 0x300a8c01, 0xb2042c80, 0x033002cc, 0x00b3002c, 0x800b3012, 0xc400a200,
+ 0x28800830, 0x02cc00b3, 0x006e4038, 0x30020201, 0x00000000, 0x00000000,
+ 0x000d6c00, 0xfb003ec0, 0x0fb007ac, 0x00f3002e, 0xc08db003, 0xe010bb00,
+ 0x3ec10d80, 0x036804db, 0x042ec00f, 0xf00ba008, 0x98023e00, 0x0fb003ec,
+ 0x04fb013e, 0x801cb003, 0xe400c800, 0x3ac028b0, 0x03ac00fb, 0x003ec00c,
+ 0x900b0003, 0x00000000, 0x00000000, 0xa01dfc00, 0xff003fc0, 0x0ff003fc,
+ 0x00ff003f, 0xc01ff043, 0xf000f400, 0x3fc00fc0, 0x239004ff, 0x063fc08e,
+ 0xf0073c01, 0xfe003f00, 0x8ff003bc, 0x00ff003f, 0x000ef043, 0xf000fc00,
+ 0x7fc00ff0, 0x03fc00ff, 0x003fc00f, 0xd003e807, 0x70000000, 0x00000000,
+ 0xc005fe00, 0xff203f60, 0x0df8033e, 0x00ff803f, 0xe00ff803, 0xfe00ff80,
+ 0x3d300fc8, 0x03d600ec, 0x8095200c, 0xc0023e40, 0xf480330c, 0x0cf803f0,
+ 0x80f42931, 0x080cc003, 0x3e04ff90, 0x37000cf0, 0x13fe48ff, 0x803fc808,
+ 0xc0a27000, 0x70000000, 0x00000000, 0xa010ee00, 0xbfc02e60, 0x08b0022e,
+ 0x00bb202e, 0xe00bb802, 0xee00bb84, 0x2e010682, 0xc2e600a9, 0x80222108,
+ 0x84802c10, 0xb8842a14, 0x20320262, 0x40988016, 0x0e8f80c2, 0x2c00b320,
+ 0x22b40af6, 0x028c80bb, 0x002ec00a, 0x8c02a004, 0x30000000, 0x00000000,
+ 0x0805cc00, 0xa3402ec0, 0x0b32828c, 0x00b3082c, 0xc00b3002, 0xcc00b300,
+ 0x2c081b00, 0x06e40089, 0x002c0028, 0x034a0c84, 0xb0022008, 0x483082c0,
+ 0x00a00128, 0x08680106, 0x0c00b825, 0x28000811, 0x824c00b3, 0x002cc40a,
+ 0x3062c201, 0x70000000, 0x00000000, 0xe015ac08, 0xbb002ec9, 0x0ab002ac,
+ 0x00bb002e, 0xc00bb012, 0xec00bb00, 0x2e204a88, 0x426e30ab, 0x802ac008,
+ 0x10422c00, 0x9a082a94, 0x08b002ec, 0x489a2026, 0x440bb182, 0x2c009904,
+ 0x2a020ab0, 0x02ac00bb, 0x062ec00a, 0xb002b004, 0x60000000, 0x00000000,
+ 0x0015ec00, 0xfb003cc1, 0x0fb00bac, 0x00fb003e, 0xc00fb003, 0xec00fb00,
+ 0x3e328f8c, 0x13e702c8, 0x803e000c, 0x810b2c10, 0xf8003030, 0x4cb013e2,
+ 0x24e8c43a, 0x100c8c03, 0x2c84fba0, 0xba902cb0, 0x036c00fb, 0x003ec04e,
+ 0x8c134004, 0x20000000, 0x00000000, 0xe001bc00, 0xff003fc0, 0x0df0037c,
+ 0x00ff003f, 0xc00ff003, 0xfc00ff00, 0x3f000fc0, 0x23fc14fd, 0x0033080f,
+ 0xa803fc20, 0xff283fc0, 0x0df02366, 0x08d7003f, 0xa00f88ab, 0xfe80ff90,
+ 0x37800f7a, 0x03fc00ff, 0x013ec00b, 0x4c037860, 0x20000000, 0x00000000,
+ 0xc010ac00, 0xfb00b2c4, 0x0fb003ec, 0x00fb003e, 0xc00fb003, 0xec04fb02,
+ 0x3e080c84, 0xc3e400cb, 0x087ec09c, 0xb2032c02, 0xc9015240, 0x08b00328,
+ 0x02c940f8, 0xd00c310b, 0x2d00ea40, 0x34900d90, 0x032c00cb, 0x0832c04e,
+ 0xb403f004, 0x20000000, 0x00000000, 0xc8052c00, 0xbf0022f4, 0x0bb002ec,
+ 0x00bb002e, 0xc00bb002, 0xec00bb00, 0x2e388d88, 0x06cf41f3, 0x402ce04d,
+ 0xbe022e00, 0x83883ee0, 0x9db0032c, 0x088b3022, 0xd48ab007, 0x6c00d370,
+ 0x32800c90, 0x036c80db, 0x6037d708, 0xb1823200, 0x00000000, 0x00000000,
+ 0xe0054c00, 0xb3002060, 0x0bb002cc, 0x00b3002c, 0xc00b3002, 0xcc00b300,
+ 0x64300908, 0x46424081, 0x442c2008, 0x00020c00, 0x80402000, 0x8a3e1240,
+ 0x04a0c008, 0x00080822, 0x42408300, 0x20400910, 0x000d8083, 0x0022c00a,
+ 0x0002b800, 0x50000000, 0x00000000, 0x60011e00, 0xb38021e0, 0x0b7802de,
+ 0x00b7802d, 0xe00b7802, 0xde00b780, 0x2f244949, 0x02f200b7, 0x802fe209,
+ 0x78121e24, 0x8d802542, 0x0978021a, 0x40858421, 0xe10a7802, 0x16409780,
+ 0xa0e00878, 0x025e0097, 0x9065e008, 0x29021800, 0x40000000, 0x00000000,
+ 0x48080c40, 0xf3003040, 0x0f3003cc, 0x00b3003c, 0xc08b3103, 0xcc00b310,
+ 0x34010d01, 0x86cc0081, 0x006c009c, 0x24072c00, 0xc31022c4, 0x0a308244,
+ 0x00a340a8, 0x82080202, 0x6c00c320, 0x30400db0, 0x030c00cb, 0x0030c00e,
+ 0x05039202, 0x00000000, 0x00000000, 0x401dbc00, 0xff003fc0, 0x0ff003fc,
+ 0x08ff003f, 0xc00ff003, 0xfc447f00, 0x3f011fc1, 0x03fc41ef, 0x003fc04f,
+ 0xf000fc00, 0x7f001fc0, 0x4bf013fc, 0x00ff0237, 0xc00ff00a, 0xfc00ff00,
+ 0x3f540ff1, 0x03fc00ff, 0x003fc00f, 0xe1439006, 0x60000000, 0x00000000,
+ 0x8805ec00, 0xfb103ec0, 0x0fb003ec, 0x01cb003e, 0xc00fb003, 0xec00fb00,
+ 0x3e005c90, 0x138c10c3, 0x0036c00d, 0x90032c00, 0xfa003e80, 0x0cb0036e,
+ 0x02d20022, 0x406cb023, 0x2b84cb84, 0x32980c10, 0x0b2c00fb, 0x8032c40f,
+ 0x90032a04, 0x70000000, 0x00000000, 0xc8119c00, 0xb73021c0, 0x0b7002dc,
+ 0x00b7002d, 0xc00b7002, 0xdc003702, 0x278008d0, 0x425c0907, 0x02a5c00a,
+ 0x70009c00, 0xb70027c1, 0x0cf0429c, 0x00870029, 0xc008300b, 0x3c40c710,
+ 0x20c10851, 0x021c00bf, 0x0121c00b, 0x70023206, 0x60000000, 0x00000000,
+ 0xc0009e00, 0xb38029f0, 0x0b7802de, 0x00b7802d, 0xe00b7802, 0xde00b784,
+ 0x2d202850, 0x227e008f, 0x8225e008, 0x78505e10, 0xb7882de0, 0xe978120e,
+ 0x29878021, 0xe28a7812, 0x1f089780, 0x21a00878, 0x021e00b7, 0x8021e80b,
+ 0x5802b000, 0x20000000, 0x00000000, 0x4814cc00, 0xb30024c0, 0x0b3002cc,
+ 0x00b3012c, 0xc00b3002, 0xcc00b300, 0x66f0003c, 0x064e4803, 0x0124f0aa,
+ 0x3a02cc00, 0xb3022cf0, 0x0930028c, 0x0083d028, 0xc00a3982, 0x4e028300,
+ 0x20c60830, 0x020c00b3, 0x00a2c00b, 0x36269200, 0x30000000, 0x00000000,
+ 0xe815a800, 0xfa003e80, 0x0fa003e8, 0x00da003e, 0x800fa013, 0xe800fa00,
+ 0x7fa40ce4, 0x821802c6, 0x8837984c, 0xea036810, 0xfe403f80, 0x0da0023a,
+ 0x40ce0033, 0xa04ee803, 0x2a005a82, 0xb2b02ca8, 0x032800fa, 0x0032804f,
+ 0xe40bba04, 0x60000000, 0x00000000, 0x4800e000, 0xf0013a00, 0x0f8003e0,
+ 0x00f8003e, 0x000f8007, 0xe0007800, 0x36040f82, 0x432100e8, 0x023a000e,
+ 0x8003a100, 0xf8083606, 0x0c8403a0, 0x01e8443e, 0x02098403, 0xa000f850,
+ 0x3c000f01, 0x0be000f8, 0x003e100f, 0x04015200, 0x30000000, 0x00000000,
+ 0x0810e400, 0xf9003640, 0x0f900324, 0x00b9003e, 0x400f9003, 0xe408f900,
+ 0x3e400c98, 0x03e6a0c9, 0x8072420d, 0x1203a700, 0xf9207c40, 0x0e980324,
+ 0x00f19832, 0x402c9843, 0x2c00fb00, 0x3ec00c91, 0x232400f9, 0x803e400c,
+ 0x90030204, 0x30000000, 0x00000000, 0x80046400, 0xb9002a54, 0x0b900224,
+ 0x00f9002e, 0x40099002, 0x6400b900, 0x2e701a9c, 0x26e58159, 0xc028620e,
+ 0x90076501, 0xf9887e71, 0x2c9d03e4, 0x00b90034, 0x504f1403, 0x6710b9d0,
+ 0x2e402898, 0x136500b9, 0x402e5068, 0x90822000, 0x10000000, 0x00000000,
+ 0x18012400, 0xb9006250, 0x0b100224, 0x00b9002e, 0x400b9002, 0xe400b900,
+ 0x6e5488b5, 0x06e400ab, 0x182ac841, 0x9402e400, 0xb9012e46, 0x0b100224,
+ 0x01b90826, 0xca089502, 0x2460b908, 0x2e400890, 0x126500b9, 0x282e4809,
+ 0x98020600, 0x40000000, 0x00000000, 0x08040400, 0xb1002840, 0x0b140244,
+ 0x00b1402c, 0x40891002, 0x4400b102, 0x2c448a11, 0x02c41091, 0x0028400a,
+ 0x11024440, 0xa1006844, 0x49310244, 0x01b104a4, 0x44ab1102, 0x4440b110,
+ 0x2c400811, 0x024440b1, 0x102c4409, 0x100a0200, 0x00000000, 0x00000000,
+ 0x380d6000, 0xf8003200, 0x0f800b20, 0x00f8003e, 0x000b8003, 0xe000b800,
+ 0x2e100884, 0x02e000a8, 0x002a000d, 0x068ae900, 0xb8002e1a, 0x4e840720,
+ 0xa0f82826, 0x1a0c868b, 0x2100f042, 0x3e0a0c8e, 0x836100f8, 0x403e9a0d,
+ 0x82832e02, 0x10000000, 0x00000000, 0x981de400, 0xf9403f40, 0x0f9003a4,
+ 0x00e9003e, 0x400d9003, 0xe400f900, 0x3f488fd2, 0x13f400bd, 0x003d400a,
+ 0xd203a490, 0xff003f48, 0x069243fc, 0x00ff043d, 0x484ff203, 0xe480f920,
+ 0x3e402fda, 0x03e480f9, 0x203e480e, 0x5003e606, 0x70000000, 0x00000000,
+ 0x1805e400, 0xf9283f40, 0x0f9003e4, 0x00f9103e, 0x400f9003, 0xe400f900,
+ 0x3f401f51, 0x033400cd, 0x0431400e, 0xd0031400, 0xfd003f48, 0x0cd003e4,
+ 0x80fd0013, 0x400c5003, 0x3400cd00, 0x12480cd0, 0x032400fd, 0x103f490d,
+ 0xd2832604, 0x70000000, 0x00000000, 0x3810e000, 0xb8002e00, 0x0b8082e0,
+ 0x00b8002e, 0x000b8002, 0xe008b800, 0x2e020b80, 0x02e80088, 0x00260018,
+ 0xa4862028, 0xe8002e8a, 0x2a0202e0, 0x44b8460a, 0x00288002, 0x20a0a800,
+ 0x22040884, 0xa2a030b8, 0x002e0a48, 0x80020e06, 0x30000000, 0x00000000,
+ 0x0805c400, 0xb1002c40, 0x0b1202c4, 0x00b1002c, 0x400b1002, 0xc400b100,
+ 0x28400b90, 0x02641089, 0x0024400a, 0x130e0400, 0xb1062c4c, 0x0a1282c4,
+ 0x04b11060, 0x44481022, 0x04808100, 0x20402813, 0x028400b1, 0x002c4d09,
+ 0x102e0201, 0x70000000, 0x00000000, 0x1815a400, 0xb9002e40, 0x0b9002e4,
+ 0x00b9002e, 0x400b9002, 0xe400b900, 0x2e504b90, 0x02e40389, 0x09264008,
+ 0x90022400, 0xb9100e48, 0x2a9022e4, 0x84bb22a2, 0x51089002, 0x2c20a961,
+ 0x22400818, 0x02a400b9, 0x042e4008, 0xb5020600, 0x60000000, 0x00000000,
+ 0xa010e400, 0xf9003e40, 0x0f9013e4, 0x08f9003e, 0x400f9003, 0xe400b904,
+ 0x3a400b10, 0x02254089, 0xc130480a, 0x9c022400, 0xf9403c50, 0x0e9003e7,
+ 0x00f14030, 0x502c9003, 0x2400c9c0, 0xb2600c90, 0x03a400f9, 0x003e400d,
+ 0x98032800, 0x30000000, 0x00000000, 0xa800a400, 0xf9003e70, 0x0f9003e4,
+ 0x00f9003e, 0x400f9003, 0xe400f900, 0x3e400f9a, 0x03a400f9, 0x20ba520f,
+ 0x9213e420, 0xe9003e40, 0x0f9013e4, 0x00f9003e, 0x650f921b, 0xe500f900,
+ 0x3e500f90, 0x03ec00f9, 0x033c400f, 0x9803ea04, 0x20000000, 0x00000000,
+ 0x2810a000, 0xf8003e02, 0x0c800360, 0x00f8003e, 0x000f8003, 0xe000f800,
+ 0x3e100f80, 0x832000e8, 0x4832104c, 0x004b6000, 0xc8407210, 0x2c820320,
+ 0x05c840b2, 0x000c8403, 0x2080c840, 0x3c000e80, 0x23e000f8, 0x053e0083,
+ 0x020b0a04, 0x20000000, 0x00000000, 0x28042800, 0xba002f90, 0x0aa04728,
+ 0x00ba002e, 0x800ba002, 0xe800ba00, 0x2f801be8, 0x0a1901c6, 0x4023a80d,
+ 0xe9033900, 0xdec423ad, 0x0de82228, 0x00de4023, 0x802ae003, 0x7b808e88,
+ 0x2e800fa0, 0x832800be, 0x822f880b, 0xe4820a00, 0x00000000, 0x00000000,
+ 0x28054c00, 0xb3002cd4, 0x0830020c, 0x00b3002c, 0xc00b3002, 0xcc00b300,
+ 0x2cc44b38, 0x020c80a3, 0x40a0e028, 0x3c028f00, 0x83302cd0, 0x203c020c,
+ 0x0583f024, 0xc008b102, 0x2c028b08, 0x2cc00a18, 0x028e00b3, 0x002ce00b,
+ 0x38024a00, 0x50000000, 0x00000000, 0x20011c00, 0xb7002de0, 0x0a7a021c,
+ 0x00b7002d, 0xc00b7002, 0xdc00b700, 0x2dc00b70, 0x863d008f, 0x0021c008,
+ 0x74421e20, 0x9f802dc0, 0x0b78823e, 0x01950024, 0x820a7012, 0x7c008700,
+ 0x2dc00b50, 0x121820b7, 0x412dc00b, 0x30524800, 0x40000000, 0x00000000,
+ 0x28081e00, 0xf7803de0, 0x0cfb0b1e, 0x00f7a83d, 0xe00b7803, 0xde00b780,
+ 0x2da10b68, 0x031e00a5, 0x8131e008, 0x38039e04, 0xc780ace0, 0x0c780b1e,
+ 0x048780a5, 0xe00c7803, 0x1e00c780, 0x3ce04ef9, 0x139e40f7, 0x823de00f,
+ 0x78034802, 0x00000000, 0x00000000, 0x081dac00, 0xfb023c80, 0x0fb003ac,
+ 0x00ff303e, 0xc00fb003, 0xec00bb00, 0x3e808f80, 0x03cc00e1, 0x003ec00f,
+ 0x9032a000, 0xf30032c0, 0x09b023cc, 0x00f1013a, 0x400fb043, 0xcc001900,
+ 0x3ec00fb0, 0x03a880f8, 0x003e000f, 0x90038206, 0x60000000, 0x00000000,
+ 0x4005fe00, 0xff8033e0, 0x0df883fe, 0x08ff8033, 0xe00ff803, 0xfe00ff90,
+ 0x3fe40df8, 0x031e01d7, 0x9033e02d, 0xf0037ec4, 0xcf803fec, 0x0cf8033e,
+ 0x40ef2033, 0xc40cfa03, 0x3e10cf80, 0x3fe00fd8, 0x033e00ff, 0x803fe00c,
+ 0xe803d004, 0x70000000, 0x00000000, 0xa8119c00, 0xb70031d8, 0x0b7002dc,
+ 0x00bf0021, 0xc00b7002, 0xdc00b700, 0x2fc40af2, 0x421c0286, 0x70a1c028,
+ 0xf203fdc4, 0x47280dd4, 0x0ae1221c, 0xc0b40109, 0x84285602, 0xb400d600,
+ 0x2dc00b50, 0x029000b5, 0x002f444a, 0x6002ea04, 0x60000000, 0x00000000,
+ 0x00009c00, 0xb7002140, 0x0b7002dc, 0x00b70025, 0xc00b7002, 0xdc00b703,
+ 0x2d060860, 0x8270009d, 0x08215028, 0x63061cc0, 0x94022d48, 0x1850025c,
+ 0x01b20821, 0xdc487702, 0x10008700, 0x2dc00b10, 0x021c00b7, 0x002dc008,
+ 0x6102e440, 0x20000000, 0x00000000, 0x6014cc00, 0xb3002020, 0x8b3002cc,
+ 0x00b30024, 0xc00b3002, 0xcc00b300, 0x2c101a18, 0x02400100, 0xc0204008,
+ 0x8820a000, 0x80c02c60, 0x0a80004e, 0xc0b0c062, 0x40089002, 0x80209821,
+ 0x2cf20b19, 0x128000b0, 0x002c000a, 0x3100da00, 0x30000000, 0x00000000,
+ 0x2815ac00, 0xfb0032c2, 0x0df003ec, 0x00ff0036, 0xc00fb003, 0xec00bb00,
+ 0x1ed018b0, 0x0b6c22d9, 0x8020c008, 0xb80a2c02, 0xdb103ed6, 0x28b00b6f,
+ 0x00f84032, 0xf008bc0b, 0x2500cb43, 0x2ee80bb8, 0x012408f9, 0x003e400c,
+ 0x3003ca00, 0x60000000, 0x00000000, 0x8000ec00, 0xfb003a40, 0x4fb003ec,
+ 0x00ff003a, 0xc00fb003, 0xec01fb00, 0x3e580eb0, 0x03a100f9, 0x203e700e,
+ 0xa1a3ed08, 0xf8003e50, 0x2f9403ac, 0x08f0403e, 0xf00dbc03, 0xe500fb40,
+ 0x3ec00fb0, 0x23ec00f9, 0x403e000f, 0xb002e400, 0x30000000, 0x00000000,
+ 0x0150fc08, 0xfb003fc8, 0x0df0033c, 0x10ff0003, 0xc00ff007, 0xfc00ff01,
+ 0x37800fe0, 0x07fc80dc, 0x0033c00c, 0xf80b7c01, 0xcf1133c0, 0x0ce00b1c,
+ 0x00cc083b, 0xc00cd003, 0x3008fe00, 0x33c00ff0, 0x0b3000fc, 0x003f400f,
+ 0xd4032000, 0x30000000, 0x00000000, 0x81046c00, 0xbb002c30, 0x08b0022c,
+ 0x009b047e, 0xc00bb002, 0xec00bb00, 0x2e680e88, 0x038004a0, 0xc036600f,
+ 0x84026048, 0xa0403c60, 0x0d8902ac, 0x00a8c02a, 0x620c8c0a, 0xa20098a1,
+ 0x22c00b38, 0x622b20b8, 0xe02e220b, 0x90022040, 0x10000000, 0x00000000,
+ 0x80056c00, 0xbb002e80, 0x1930026c, 0x00b3022a, 0xc00bb002, 0xec00bb00,
+ 0x2ee00b91, 0x02ed00a9, 0x8026e208, 0x9506a000, 0x8b0822e0, 0x08b4022c,
+ 0x00881426, 0x6008b842, 0x2600b910, 0x22c08bb1, 0x0a6440b9, 0x802e600b,
+ 0xb0022004, 0x40000000, 0x00000000, 0x08000c00, 0xb3002c00, 0x1830024c,
+ 0x00b30028, 0xc00b3002, 0xcc00b302, 0x2c400a10, 0x068008a8, 0x0026400b,
+ 0x00060008, 0xa0012440, 0x4900060c, 0x00a0002c, 0x40481002, 0x0408b000,
+ 0x20c00bb0, 0x024400b1, 0x002c000b, 0x302a0200, 0x00000000, 0x00000000,
+ 0x00086c00, 0xfb003e00, 0x0df00b6c, 0x00bf002a, 0xc18fb002, 0xec00bb00,
+ 0x3e000f80, 0x02e000b8, 0x0236001c, 0x8003e000, 0x88013200, 0x1c80032c,
+ 0x00ca003e, 0x400c9043, 0x2000f800, 0x32c08ff0, 0x2b6000f8, 0x003e400f,
+ 0x90032002, 0x10000000, 0x00000000, 0xa019fc00, 0xff003f00, 0x0ff023bc,
+ 0x00df003f, 0xc00ff003, 0xfc00ff04, 0x3f401fd0, 0x13b000ec, 0x003d004e,
+ 0xc002f004, 0xfc013d00, 0x0bc001fc, 0x00fc04b9, 0x406e4003, 0xf0005c00,
+ 0xbfc00ff0, 0x4bb000fc, 0x003f000f, 0xd003e806, 0x70000000, 0x00000000,
+ 0xc005fe00, 0xff803fe0, 0x0ff803f0, 0x00cf8137, 0xc80ed463, 0x7e00cf40,
+ 0x33200fe9, 0x035a00fc, 0x943ba00e, 0x78037a00, 0xfc4037e0, 0x0ff803d2,
+ 0x02cf873f, 0xd80cf203, 0x3840ce06, 0x3fe00c78, 0x033200ff, 0x803fe00f,
+ 0xf803f000, 0x70000000, 0x00000000, 0x8010ee00, 0xbb802ee0, 0x0bb802e8,
+ 0x808b812e, 0xe448b500, 0xcc028b50, 0x02200b10, 0x022e00b0, 0x202aa088,
+ 0xb802aa00, 0xba6020ca, 0x0bb802e8, 0x208b802e, 0xd048bc02, 0x29008ac0,
+ 0x2ee128b8, 0x036200bb, 0x802ee00b, 0xb802e004, 0x30000000, 0x00000000,
+ 0x0805cc00, 0xb3002cc0, 0x0b3002c0, 0x2083002c, 0xc00b1202, 0xcc109323,
+ 0x20004b22, 0x02c000b0, 0x0120010a, 0x30020804, 0xb01424c0, 0x0b3002e0,
+ 0x84a3002c, 0x98083106, 0x09808140, 0x2cc01830, 0x020400b3, 0x002cc00b,
+ 0x3002c201, 0x70000000, 0x00000000, 0xc015ac00, 0xbb002ec0, 0x0bb002cc,
+ 0x008b022e, 0x440b9100, 0xcc008a08, 0x22610380, 0x02a600b0, 0x012ac008,
+ 0xb022ae04, 0xb24042c0, 0x0bb002e8, 0x00ab002e, 0x8108b106, 0x28008910,
+ 0x2ec018b0, 0x426080bb, 0x002ec00b, 0xb002f004, 0x60000000, 0x00000000,
+ 0x4015ec00, 0xfb003ec0, 0x0fb003e3, 0x82cb003e, 0xf00f9803, 0xec00db10,
+ 0xb2380ba4, 0x03eb04fa, 0xc072840e, 0x30032700, 0xf81036c1, 0x4fb043e9,
+ 0x20eb007e, 0xc02cb48b, 0x2210ca80, 0x3ec00cb0, 0x032d80fb, 0x003ec00f,
+ 0xb003d004, 0x70000000, 0x00000000, 0xe001bc00, 0xff003fc0, 0x0ff003f8,
+ 0x80df003d, 0xe00cb801, 0xfc10ef00, 0x3f000fd1, 0x037c01be, 0x403fa04f,
+ 0xf003f401, 0xfc803fc0, 0x0ff003fc, 0x01df017d, 0xe44ff003, 0xf240fa80,
+ 0x3fc00ff0, 0x03f200ff, 0x003fc00f, 0xf003f800, 0x60000000, 0x00000000,
+ 0xc010ac00, 0xfb003ac0, 0x0fb003e4, 0x00db003f, 0x100d900b, 0x6c40df40,
+ 0x3e520fb4, 0x43e920fa, 0x183a520d, 0xb0036910, 0xf8623ec3, 0x0eb003e9,
+ 0x00eb003e, 0xc20fb043, 0x0400f908, 0xb2c00cb2, 0x03ad80fb, 0x043ec00f,
+ 0xb003f004, 0x20000000, 0x00000000, 0xc8052c00, 0xbb002ec0, 0x0bb002ec,
+ 0x000b042e, 0x4188b012, 0x2f008b00, 0x2e400b93, 0x0226008a, 0xc020e108,
+ 0xb8122404, 0xb8e02ee0, 0x08b012cc, 0x000b012e, 0xe04b3d12, 0x24c0b909,
+ 0x20c22830, 0x022b20bb, 0x002ec00b, 0xb002f200, 0x40000000, 0x00000000,
+ 0xe0054c00, 0xb30028c0, 0x0b3002c0, 0x0413002c, 0xc0093012, 0x0f84bb00,
+ 0x2c0018a0, 0x028b00a0, 0x406cc008, 0x30024800, 0xb1002ce0, 0x0a3002c4,
+ 0x00a3002c, 0x648b0042, 0x0804b2c0, 0x20c0093d, 0x22890093, 0x002cc00b,
+ 0x3002f800, 0x50000000, 0x00000000, 0x60011e00, 0xb7802de0, 0x0b7802ca,
+ 0x0887802c, 0xe0087802, 0x5e00a490, 0x2d600b78, 0x123a2015, 0x8167e208,
+ 0x78021a00, 0xb7806de0, 0x087802fe, 0x0087802d, 0x600b488a, 0x5a00b682,
+ 0x21e43978, 0x021200b7, 0x802de00b, 0x7802d800, 0x40000000, 0x00000000,
+ 0x48080c00, 0xf30038c0, 0x0f3003c4, 0x00d3103c, 0xc44d100b, 0x4c00f110,
+ 0x3c8c0f30, 0x158008f2, 0x103c082d, 0x31834c00, 0xf1103cc2, 0x0e3003c4,
+ 0x00e3003c, 0x000f3003, 0x0880f300, 0x30c00d30, 0x038c00f3, 0x003cc00f,
+ 0x3003d202, 0x00000000, 0x00000000, 0x401dbc00, 0xff003fc0, 0x0ff003fc,
+ 0x00ff003f, 0xc10fd007, 0x3c00cc10, 0x3fc40fd1, 0x03b800ef, 0x0139400f,
+ 0xf023fc00, 0xff003fc4, 0x0ff003fc, 0x00ff003f, 0x040f7103, 0xb800ff80,
+ 0x3dc00ef0, 0x03fc00ff, 0x003fc00f, 0xf003d006, 0x60000000, 0x00000000,
+ 0xa805ec00, 0xfb003ec0, 0x0fb002e0, 0x80fb001f, 0x840fb003, 0xec00ff10,
+ 0x32400ba0, 0x03a810f8, 0x603ec00f, 0xb003e400, 0xf9283ec0, 0x0fb003ec,
+ 0x00fb003e, 0xc00f8003, 0x2800ca00, 0x3cc10cb0, 0x03ec00fb, 0x003ec00f,
+ 0xb003ea00, 0x70000000, 0x00000000, 0xc8119c00, 0xb7002dc0, 0x0b7042d8,
+ 0x30b7002d, 0xe00b7022, 0xdc00b3a0, 0x21400b70, 0x22d800b5, 0x086dc00b,
+ 0x7002d410, 0xf5002dc0, 0x0b7002dc, 0x00b7002d, 0xc08b4002, 0x18008600,
+ 0x2dc00870, 0x20d400b7, 0x002dc00b, 0x7002f204, 0x60000000, 0x00000000,
+ 0xc0009e00, 0xb7802de0, 0x0b7802de, 0x04b7842d, 0xa00b7802, 0xde00a7a0,
+ 0xe1e00b78, 0x029e00b6, 0xc32d601b, 0x7802de00, 0xb7c02de0, 0x0b7802de,
+ 0x20b7802d, 0xe00b3802, 0x0e008784, 0x2de00a78, 0x10de00b7, 0x802de00b,
+ 0x7802f000, 0x00000000, 0x00000000, 0x4814cc00, 0xb3002cc0, 0x0b3002ce,
+ 0x00b3012c, 0xe00bb802, 0xcc00bb20, 0x20d10b3a, 0x02cf80b3, 0x802cfc0b,
+ 0x3002cc90, 0xa3802cc0, 0x0b3002cd, 0x20b3000c, 0xdc0b3002, 0x0c408300,
+ 0x2cc00a30, 0x02cc80b3, 0x002cc00b, 0x3002d204, 0x30000000, 0x00000000,
+ 0xe815a800, 0xfa003e80, 0x0fa003eb, 0x80fa003f, 0x860fa083, 0xe800eea2,
+ 0xb3950f6a, 0x039920fa, 0x823f900f, 0x2003f800, 0xba003e80, 0x0fa003f8,
+ 0x00fa003e, 0xb00fa00b, 0x2b02ca00, 0x3c800ea0, 0x03d820fa, 0x003e800f,
+ 0xa003fa04, 0x60000000, 0x00000000, 0x4800e000, 0xf8003e00, 0x0f8003e0,
+ 0x20f8003e, 0x000f8003, 0xe000f800, 0x7e000f84, 0x03e000f8, 0x423e000f,
+ 0x8403e040, 0xf8003e00, 0x0f8013e0, 0x00f8013c, 0x100f8403, 0xc120fc00,
+ 0x3e002580, 0x03e100f8, 0x003e000f, 0x8003d200, 0x30000000, 0x00000000,
+ 0x0810e400, 0xf9003e40, 0x0f9003ec, 0x00c9003e, 0x400f9003, 0x2400e900,
+ 0x36500f9a, 0x232400cb, 0xa03e640f, 0x98032400, 0xfb803e40, 0x0f9003e4,
+ 0x00e9003e, 0x600c1103, 0x2600c940, 0x36601c98, 0x03e500c9, 0x003e400f,
+ 0x9003c204, 0x30000000, 0x00000000, 0x80046400, 0xb9002e40, 0x0b9002e4,
+ 0x0289002f, 0x400b9002, 0x2620bd00, 0x02410b94, 0x82240089, 0x412e400b,
+ 0x94022400, 0xb9802e44, 0x0b9002c4, 0x0089002e, 0x70089c02, 0x27008180,
+ 0x22400891, 0x02e680a9, 0x002e400b, 0x9002e000, 0x10000000, 0x00000000,
+ 0x18052400, 0xb9002e40, 0x0b900284, 0x0089002e, 0xc00b9002, 0x24903900,
+ 0x22400bb0, 0x122c118b, 0x402ed00b, 0x9502ac00, 0xb9102e40, 0x0b9002e4,
+ 0x00a9002e, 0x4408d002, 0x35808d00, 0x26440890, 0x12e40089, 0x022e400b,
+ 0x9002c600, 0x40000000, 0x00000000, 0x08040400, 0xb1002c40, 0x0b1002c4,
+ 0x4081002c, 0x400b1102, 0x0440b114, 0xa4400b91, 0x02041081, 0x102c400b,
+ 0x10020400, 0xb3132c44, 0x0b1002e5, 0x0081002d, 0x4408700a, 0x14428502,
+ 0x20404810, 0x42e401a1, 0x006c400b, 0x1002c200, 0x00000000, 0x00000000,
+ 0x380d6000, 0xf8003e00, 0x0f8003a1, 0xa2c8003e, 0x0a0f8683, 0x2100e868,
+ 0x36000f84, 0x0b2002c8, 0x403e000f, 0x80032000, 0xf86d3e10, 0x8f8003e0,
+ 0x00e8003e, 0x9a2c8283, 0x21a0cc28, 0x36000880, 0x23e000c8, 0x003e000f,
+ 0x8003ce03, 0x10000000, 0x00000000, 0x981de400, 0xf9003e40, 0x0f9003e4,
+ 0x80f9003f, 0x400fd20b, 0xe484fd24, 0x3b408ff2, 0x03f400f9, 0x213f400f,
+ 0x900bf400, 0xf9213e48, 0x0f9003f4, 0x00f9013e, 0x480f9003, 0xe480f904,
+ 0x3e402f90, 0x03f400f9, 0x003e400f, 0x9003e607, 0x70000000, 0x00000000,
+ 0x1805a400, 0xf9003e40, 0x0f9003e4, 0x01c90036, 0x404f9283, 0xe400c900,
+ 0x38401fd0, 0x13f402cd, 0x0035400f, 0xd0202400, 0xfd003e40, 0x0f9003c4,
+ 0x40c9003f, 0x400cd011, 0x3410fd00, 0x33400dd0, 0x03f400f9, 0x003e400f,
+ 0x9003c600, 0x70000000, 0x00000000, 0x3810e000, 0xb8002e00, 0x0b8002e8,
+ 0x0088002e, 0x000b0002, 0xe0028800, 0x22000b80, 0x02e00088, 0x0022000b,
+ 0x80022000, 0xb8002e00, 0x0b8002e0, 0x8088002e, 0x00088022, 0x2010b800,
+ 0x22000880, 0x02e000b8, 0x003a000b, 0x8002ce04, 0x10000000, 0x00000000,
+ 0x0804c400, 0xb1002c40, 0x0b1002c4, 0x0081002c, 0x400b1002, 0xc4008100,
+ 0x28400b10, 0x02441481, 0x0024400b, 0x10020400, 0xb1002c40, 0x0b1002c4,
+ 0x8281002c, 0x40281002, 0x0400b100, 0x20404130, 0x02c400b1, 0x006c400b,
+ 0x1002c201, 0x70000000, 0x00000000, 0x1815a400, 0xb9002e40, 0x0b9002e6,
+ 0x0089002e, 0x500b9042, 0xc40c8900, 0x22421b92, 0x02e42089, 0x10224a4b,
+ 0x90222580, 0xb9002e40, 0x0b9002e4, 0x0089002e, 0x4008920a, 0x2504b902,
+ 0x224008b0, 0x22ec00b9, 0x002a400b, 0x9002c604, 0x60000000, 0x00000000,
+ 0xa015e400, 0xf9003e40, 0x0f9003e5, 0x0289007e, 0x640f9803, 0xe400c9a2,
+ 0x3a440bd4, 0x03c500cd, 0x00364007, 0x100b2500, 0xbd102e40, 0x0f9043e4,
+ 0x00c9003e, 0x520c9203, 0x2400f9d8, 0xb2400d90, 0x03e4c0f9, 0x002e400f,
+ 0x9003e804, 0x70000000, 0x00000000, 0xa801a400, 0xf9003e40, 0x0f9003e4,
+ 0x00f9023e, 0x600f9c03, 0xec00f110, 0x2ee28f98, 0x83e480f9, 0x003e400f,
+ 0x90036408, 0xf9803ec0, 0x0f9043e4, 0x00f9003e, 0x408f9003, 0xe400f100,
+ 0x3e400f90, 0x23e620f9, 0x003e400f, 0x9003ea00, 0x60000000, 0x00000000,
+ 0x2810a000, 0xf8003e00, 0x0f8003e1, 0x02c8043e, 0x100f8003, 0x2060b840,
+ 0x3e100f85, 0x03e108f8, 0x0422040d, 0x8043e100, 0xf8103204, 0x0f8003e0,
+ 0x00e8003c, 0x000d0583, 0x2008c800, 0x1e000788, 0x03e002c8, 0x023e000f,
+ 0x8003ca04, 0x20000000, 0x00000000, 0x28052800, 0xba002e80, 0x0ba002e8,
+ 0x008a002e, 0x800ba002, 0x2900ba00, 0x2e8008e4, 0x02f800be, 0x4823b008,
+ 0xe802e800, 0xbe4022a0, 0x0ba000e8, 0x008a002f, 0x9c08ec02, 0x39008ed2,
+ 0x2c800be0, 0x02f8008a, 0x002e800b, 0xa002ca00, 0x40000000, 0x00000000,
+ 0x28054c00, 0xb3002cc0, 0x0b3002ac, 0x00830028, 0xc00b3002, 0x0e01b300,
+ 0x24c00a30, 0x02cc00bb, 0x8820f20b, 0x20828c00, 0xb38860c0, 0x0b3002ec,
+ 0x00b3002c, 0xf0093c02, 0x0e208390, 0x2ce00b30, 0x02cf4083, 0x002cc00b,
+ 0x3002ca00, 0x50000000, 0x00000000, 0xa0011c00, 0xb7002dc0, 0x4b7002dc,
+ 0x4087002d, 0xc01b780a, 0x1c01b720, 0x2fa20862, 0x02dc00b5, 0x0023e00a,
+ 0x6082dc00, 0xb7822181, 0x0b7002fc, 0x8097002c, 0xc0087002, 0x0f008500,
+ 0x6dd00940, 0x02de0087, 0x002dc00b, 0x7002e800, 0x40000000, 0x00000000,
+ 0xa8081e00, 0xf7803de0, 0x0f78038e, 0x80c7803d, 0xe00f7903, 0x1a40f7e0,
+ 0x3de08e58, 0x03de00fe, 0x80b1e00f, 0x78019e00, 0xfc80b1e0, 0x0f7803de,
+ 0x00f7803d, 0xe00d380b, 0x1e02c782, 0x3de00f78, 0x03de00c7, 0x803de00f,
+ 0x7803ea02, 0x00000000, 0x00000000, 0x081dac00, 0xfb003ec0, 0x0fb003ed,
+ 0x00fb003e, 0xc00fb60b, 0xe000fb04, 0x7e820ee9, 0x03ec007c, 0x923ec00d,
+ 0x9003ec00, 0xfd803e00, 0x0fb003ec, 0x40eb003e, 0x800fb003, 0xec00f900,
+ 0x3ec00fa0, 0x03c000fb, 0x003ec00f, 0xb003c206, 0x60000000, 0x00000000,
+ 0x0005fe00, 0xff803fe0, 0x0ff803ff, 0x00cf803f, 0xe00ff883, 0xbe04ff80,
+ 0x2fa00ff9, 0x027e40f7, 0x8033e00f, 0xf2133e00, 0xcf883370, 0x0ff901fe,
+ 0x00cf903f, 0x600cf803, 0xb6080f90, 0x39600ef8, 0x03fe00ff, 0x803fe00f,
+ 0xf803c000, 0x70000000, 0x00000000, 0xa8119c00, 0xb7002dc0, 0x0b7002fc,
+ 0x0087042d, 0xc00bf202, 0x9c00b700, 0x2d880b75, 0x031c40b5, 0x4029080b,
+ 0x700a1c12, 0x8f402184, 0x0b7002fc, 0x60d7002f, 0xc00d7002, 0x3000d700,
+ 0x21c00d40, 0x02dc40b7, 0x0039c00b, 0x7002ea04, 0x60000000, 0x00000000,
+ 0x00009c00, 0xb7002dc0, 0x0b7002dd, 0x0087002d, 0xc20b704e, 0x1000a700,
+ 0x2d004bd1, 0x22dc00be, 0x0021c01b, 0x71023c00, 0x86082140, 0x0b7046dc,
+ 0x0087042d, 0xc0087002, 0x9c008742, 0x29c00a70, 0x02dc00b7, 0x002dc00b,
+ 0x7002c000, 0x20000000, 0x00000000, 0x2014cc00, 0xb3002cc0, 0x0b3002ce,
+ 0x4083002c, 0xf80b3002, 0x4008b3f0, 0x6c0003b6, 0x028d84b3, 0x4028100b,
+ 0x10020e44, 0x83802000, 0x0b3002ec, 0x2093002c, 0x80093002, 0x08019380,
+ 0x60c00820, 0x02cb80b3, 0x0028c00b, 0x3002c804, 0x30000000, 0x00000000,
+ 0xa815ac00, 0xfb003ec0, 0x0fb003fc, 0x02cb003e, 0xc00ff803, 0x2c00ff00,
+ 0x2e400bbc, 0x03ef00fb, 0x4012e08b, 0xb0022f00, 0xcb00b240, 0x0fb003fe,
+ 0x00cb003e, 0x800c3023, 0xa800c220, 0x2ac00ab0, 0x03e720fb, 0x003ec00f,
+ 0xb003ea04, 0x60000000, 0x00000000, 0x8000ec00, 0xfb003ec0, 0x0fb003cc,
+ 0x00fb003e, 0xc00fb143, 0xad00fb01, 0x3e020fe1, 0x016140ff, 0x003ef80f,
+ 0xb403ec00, 0xf7003e80, 0x0fb003ec, 0x00fb003e, 0x900fb003, 0xe500f940,
+ 0x3ec08580, 0x03ed00fb, 0x003ac00f, 0xb003e000, 0x30000000, 0x00000000,
+ 0x0110fc00, 0xff003fc0, 0x0ff003fc, 0x00cf003f, 0xc00ff003, 0x3001ff00,
+ 0x3f4444dc, 0x033e50df, 0x483f088f, 0xf0537c30, 0xfc403b60, 0x0ff003fc,
+ 0x00cf003f, 0x600cf00b, 0x3e00cc00, 0x33c00df8, 0x03f4000f, 0x001fc00f,
+ 0xf003c044, 0x30000000, 0x00000000, 0x81046c00, 0xbb0026c0, 0x0bb002ec,
+ 0x08ab012e, 0xc00bb002, 0x2081bb00, 0x2c200fb8, 0x022088bb, 0x023e380e,
+ 0x18022c00, 0xbb402220, 0x0bb002ec, 0x028b002e, 0x350ab882, 0x2444a9e0,
+ 0x2ac00ba4, 0x02c300ab, 0x002ec00b, 0xb002e040, 0x10000000, 0x00000000,
+ 0x80052c00, 0xbb002ec0, 0x0bb002ec, 0x008b002e, 0xc00b300a, 0x2c84bb00,
+ 0x2e800ab0, 0x0e2c00bb, 0x002ec00b, 0x98822c00, 0xbb002a48, 0x0bb002ec,
+ 0x008b002c, 0x4208a102, 0x09008b80, 0x22400982, 0x42ea00ab, 0x002ec00b,
+ 0xb002e000, 0x40000000, 0x00000000, 0x08040c00, 0xb3002cc0, 0x0b3002cc,
+ 0x0283002c, 0xc04b3002, 0x0800b300, 0x2c801b30, 0x060000b3, 0x002c000a,
+ 0x100a0c04, 0xb3002080, 0x0b3002cc, 0x0083002c, 0xc10a3002, 0x0000a304,
+ 0x28c00b00, 0x02e800a3, 0x002cc00b, 0x3002c201, 0x00000000, 0x00000000,
+ 0x000d6c00, 0xfb003ec0, 0x0fb003fc, 0x008b043e, 0xc08ff002, 0x2000bb00,
+ 0x3e000eb0, 0x132c04db, 0x013e001f, 0x90032c00, 0xfb003a40, 0x0fb003ec,
+ 0x00cb003e, 0x400c9003, 0x2c08c900, 0x72c05d80, 0x13ec00eb, 0x003ec00f,
+ 0xb003c003, 0x50000000, 0x00000000, 0xa01dfc00, 0xff0037c0, 0x0ff003fc,
+ 0x00ff013f, 0xc00ff003, 0xf000ff02, 0x3f001e70, 0x13f000ff, 0x073b008e,
+ 0x50039c00, 0xff003f00, 0x0ff003fc, 0x00ff003f, 0x000f7043, 0xf000f500,
+ 0x3fc00fc0, 0x03f800ff, 0x003fc00f, 0xf003e806, 0x70000000, 0x00000000,
+ 0xc015fe00, 0xff803fe0, 0x0ff803fe, 0x00ff803f, 0xe00ff803, 0xfe00fc80,
+ 0x3f200cf8, 0x03d204d4, 0x8033300f, 0xc903f200, 0x4cc03324, 0x0cc903f0,
+ 0x80c42033, 0x0c0dd607, 0x3e44dc28, 0x33e00ff2, 0x01fe00df, 0x803d020c,
+ 0xc3433000, 0x70000000, 0x00000000, 0xa000ae00, 0xbb802ee0, 0x0bb802ee,
+ 0x00bb802e, 0xe00bb802, 0xee10b880, 0x2e2008b8, 0x02ee048b, 0x8136c80b,
+ 0xb213cca0, 0x8b2022c0, 0x0a3002e2, 0x40a8903e, 0x1c089013, 0x2c80b840,
+ 0x2ae00bb1, 0x0a2e00bb, 0x002eb007, 0x0702a800, 0x30000000, 0x00000000,
+ 0x0804cc00, 0xb3002cc0, 0x0b30028c, 0x00b3002c, 0xc00b3002, 0xcc00b080,
+ 0x0e003830, 0x02e40033, 0x0200c08b, 0x3202cc04, 0x830220c8, 0x883222c0,
+ 0x00a00020, 0x00281302, 0x0c00b004, 0x20c00b30, 0x020c00a0, 0x002c4138,
+ 0x02020201, 0x70000000, 0x00000000, 0xe015ac00, 0xbb002ec0, 0x0bb002ec,
+ 0x00bb002e, 0xc00bb002, 0xec10b880, 0x2e2008b0, 0x02ec00ab, 0x0626c089,
+ 0xa0422080, 0x8a542280, 0x0ab00268, 0x00ab142e, 0x40083002, 0x6c10b888,
+ 0x2ac01bb0, 0x402c00bb, 0x026ec02b, 0x9000b804, 0x60000000, 0x00000000,
+ 0x0015ec00, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0xc00fb003, 0xec00f881,
+ 0x2c300cb0, 0x03ec28fb, 0x4032f00f, 0xb842ec82, 0x8b80b2c2, 0x8cba03e2,
+ 0x20e8a032, 0x040c9802, 0x2c00f880, 0x32c00f30, 0x432c00eb, 0x403e2204,
+ 0xb8090000, 0x70000000, 0x00000000, 0xa001bc00, 0xff003fc0, 0x0ff003fc,
+ 0x00ff007f, 0xc00ff001, 0xfc00fd04, 0x3f0007f0, 0x23d4045f, 0x913fe48f,
+ 0xf123fe00, 0xff823f64, 0x0fe923d5, 0x00f601bc, 0x800fba53, 0xbc00f900,
+ 0x3fc08ff0, 0x03fc00ff, 0x021f040f, 0xc983e804, 0x60000000, 0x00000000,
+ 0xc010ac00, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0xc00fb003, 0xec01d900,
+ 0x3e104fb0, 0x13e902c8, 0x403a100c, 0x94032d04, 0xc90032c6, 0x4f94132d,
+ 0x04c948ba, 0xc0ac9003, 0xac30f940, 0x32c00fb0, 0x032c00fa, 0x507a190e,
+ 0xb00b3004, 0x20000000, 0x00000000, 0xc8052c00, 0xbb002ec0, 0x0bb002ec,
+ 0x00bb022e, 0xc00bb002, 0xec04b900, 0x2e140bb8, 0x12e40083, 0x4162f40d,
+ 0xb0862f40, 0xdb0036d0, 0x0bb0036c, 0x005b4036, 0xc008b582, 0x2f288900,
+ 0x36c00bf8, 0x036c00bb, 0xd0202008, 0x9c837200, 0x40000000, 0x00000000,
+ 0xc0040c00, 0xb3002cc0, 0x0b3002cc, 0x00b3002c, 0xc00b3002, 0xcc00b000,
+ 0x2c100b31, 0x82c52483, 0x182cc029, 0x301a2f50, 0x8b1022f0, 0x0b3e02c0,
+ 0x00008028, 0x3608182a, 0x0d00b890, 0x28c00b30, 0x028c00b3, 0x0028340b,
+ 0x8802b800, 0x00000000, 0x00000000, 0x60001e00, 0xb7802de0, 0x0b7802de,
+ 0x00b7802d, 0xe00b7842, 0xde00b5c4, 0x2d220b78, 0x22da0084, 0xa0252408,
+ 0x58021ec0, 0x959025e4, 0x0b5992cc, 0x40958821, 0xe0885802, 0x1e008590,
+ 0x21e00b78, 0x02de00bf, 0x9025a009, 0x6a02d800, 0x00000000, 0x00000000,
+ 0x48180c00, 0xf3003cc0, 0x0f3003cc, 0x00f3003c, 0xc00f3003, 0xcc50b300,
+ 0x3c140b30, 0x02c460c3, 0x002ed629, 0xb3020c80, 0xcb123041, 0x0f2102c4,
+ 0x00c22028, 0x800c3003, 0xac00f100, 0xa8c10fb0, 0x838c00f1, 0x0038400f,
+ 0x00039a06, 0x00000000, 0x00000000, 0x401cbc00, 0xff003fc0, 0x8ff003fc,
+ 0x00ff003f, 0xc00ff003, 0xfc00ff01, 0x3f400ff0, 0x03fc04ff, 0x203bc50f,
+ 0xf103fc80, 0xbf103fc0, 0x0ff9037c, 0x40ff003f, 0xc44ff003, 0xfc00ff00,
+ 0x3fc00ff0, 0x817c00f7, 0x003bc00c, 0xf2435006, 0x20000000, 0x00000000,
+ 0x0805ec00, 0xfb003ec0, 0x0fb007ec, 0x00fb003e, 0xc00fb003, 0xec10f800,
+ 0x3e004cb0, 0x03ac00fb, 0x0236c00c, 0xa003e200, 0xca803280, 0x2eb00328,
+ 0x00fb00b2, 0x400fb003, 0xec00f880, 0x32c00fb0, 0x032c00fb, 0x0032c00c,
+ 0xb0030200, 0x70000000, 0x00000000, 0xc8019c00, 0xb7002dc0, 0x0b7002dc,
+ 0x00b7002d, 0xc00e7002, 0xdc00b500, 0x2dc00370, 0x42d400b7, 0x0021c008,
+ 0x7002fc00, 0xaf0021c0, 0x08f0421c, 0x00b30031, 0xc00b7002, 0xdc00bf00,
+ 0x21c00bf2, 0x021c00b7, 0x0020c028, 0x200a3200, 0x60000000, 0x00000000,
+ 0x00009e00, 0xb7802de0, 0x0a7812de, 0x00b7802d, 0xe00b7802, 0xde00b780,
+ 0x2da00b78, 0x02de00b7, 0xc2a5e088, 0x7c02de00, 0x978021e0, 0x0978821e,
+ 0x20b78025, 0xe00b78a2, 0xde11b580, 0x21e00b78, 0x025e00bf, 0x8029e008,
+ 0x78060000, 0x20000000, 0x00000000, 0x6814cc00, 0xb3002cc0, 0x0b3002cc,
+ 0x00b3002c, 0xc00a3002, 0xcc08b344, 0x2cc80b30, 0x02d160b4, 0x00213408,
+ 0x4c02d141, 0xb4182112, 0x09c8020c, 0x20b30824, 0xe00b3042, 0xcc00b3d0,
+ 0xa0c00b30, 0x0a4c00bb, 0x8028c408, 0xb9061204, 0x30000000, 0x00000000,
+ 0xe805a800, 0xfa003e80, 0x0fa003e8, 0x00fa003e, 0x800fa001, 0xe800fe40,
+ 0x3fa20fa0, 0x03e900fa, 0x803680ac, 0xa803eb00, 0xdac092a8, 0x0da40b39,
+ 0x08f6c8b7, 0x824fa823, 0xe800be40, 0x02800fa0, 0x036808fe, 0x003bb11c,
+ 0xec0a3a00, 0x20000000, 0x00000000, 0x4810a000, 0xf8003e00, 0x4f8003e0,
+ 0x00f8003e, 0x000e8003, 0xe010f801, 0x3e100f80, 0x53e100f8, 0xc03e000f,
+ 0x8203e080, 0xe8003e10, 0x048203e0, 0x00f8403a, 0x204f8003, 0xe000f820,
+ 0x3e000f80, 0x03a000f8, 0x50b6020f, 0x8003d204, 0x20000000, 0x00000000,
+ 0x0810a400, 0xf9003e40, 0x0f9003e4, 0x00f9003e, 0x400f9003, 0xe401e908,
+ 0x3e400c90, 0x03e500f9, 0x0212520c, 0x9213e610, 0xf9807e48, 0x0c980304,
+ 0x04c98136, 0x400f9903, 0x2700f900, 0x3e400f10, 0x03a400f9, 0x8030682c,
+ 0x98838204, 0x20000000, 0x00000000, 0x80046400, 0xb9002e40, 0x039042e4,
+ 0x00b9002e, 0x400b9002, 0xe400b902, 0x2c704890, 0x02e700b1, 0x8076522a,
+ 0x9802e740, 0xb9806e68, 0x089c0364, 0x00899236, 0x444b900b, 0x2500b9c0,
+ 0x2e400b95, 0x022400b9, 0xb0a27028, 0x9a022000, 0x00000000, 0x00000000,
+ 0x18052400, 0xb9002e40, 0x0b9002e4, 0x00b9002e, 0x400b9002, 0xe400a908,
+ 0x2e581898, 0x02f504bf, 0x20094008, 0xf002f500, 0xbd142d40, 0x08d50224,
+ 0x009908a2, 0xc08b1002, 0x2410a918, 0x2e400b90, 0x82a400bb, 0x00224208,
+ 0x92028600, 0x40000000, 0x00000000, 0x08040400, 0xb1002c40, 0x0b1002c4,
+ 0x00b1002c, 0x400b1002, 0xc400b100, 0x2c400810, 0x02d400b7, 0x002d4408,
+ 0x51025440, 0xb5102d44, 0x38510244, 0x02910024, 0x640b1102, 0x0c40b110,
+ 0x2c400b11, 0x260400b1, 0x10204008, 0x11020201, 0x00000000, 0x00000000,
+ 0x381d6000, 0xf8003e00, 0x0f8003e0, 0x00f8003e, 0x000f8002, 0xe000e800,
+ 0x3e002ca0, 0x23e000f8, 0x0028100c, 0x8402e100, 0xf8402c10, 0x4cc44320,
+ 0xa8d82832, 0x1a0fa693, 0x2111e868, 0x3e000f86, 0x83a000f8, 0x40320a0c,
+ 0x86838e07, 0x50000000, 0x00000000, 0xb81de400, 0xf9003e40, 0x0f9003e4,
+ 0x00f9003e, 0x400f9003, 0xe400fd00, 0x3f400f90, 0x43e410f1, 0x0036c80f,
+ 0x9203e480, 0xfb243e49, 0x0f9243f4, 0x00ef00bf, 0x480fd203, 0xa491fd20,
+ 0x3e400f92, 0x03e400f5, 0x203f400f, 0xd243ee06, 0x70000000, 0x00000000,
+ 0x3805e400, 0xf9003e40, 0x0f9003e4, 0x00f9003e, 0x400f9003, 0xe400fd00,
+ 0x3f400fd0, 0x033400f5, 0x02b3440f, 0xd003b400, 0xcd103f40, 0x0cd00724,
+ 0x80cd0433, 0x408cd003, 0x3400fd00, 0x3e400fd0, 0x03e400f5, 0x1033494e,
+ 0xd2eb4e00, 0x70000000, 0x00000000, 0x1800e000, 0xb8002e00, 0x0b8002e0,
+ 0x00b8002e, 0x000b8002, 0xe000b800, 0x3a000b80, 0x036010ba, 0x0022080f,
+ 0x80922022, 0x88002c0a, 0x28820a20, 0x48a84122, 0x00288152, 0xa000b820,
+ 0x2e000b84, 0xc2e000b8, 0x00320048, 0x82420600, 0x30000000, 0x00000000,
+ 0x48008400, 0xb1002c40, 0x0b1002c4, 0x00b1002c, 0x400b1002, 0xc400b100,
+ 0x6c400b10, 0x02cc00b1, 0x04204803, 0x12020404, 0x81002c48, 0x08128204,
+ 0x00a11020, 0x40081002, 0x0400b129, 0x2c400b13, 0x02c40099, 0x002c4528,
+ 0x1a825200, 0x20000000, 0x00000000, 0x1814a400, 0xb9002e40, 0x0b9002e4,
+ 0x00b9002e, 0x400b9002, 0xe400b950, 0x2a4a0b90, 0x02e420b9, 0x1022400a,
+ 0x900e0420, 0x89022e48, 0x08140225, 0x80a90422, 0x48089142, 0xa410b900,
+ 0x2e400b90, 0x02e400b9, 0x40aa4008, 0x90000604, 0x20000000, 0x00000000,
+ 0xa004a400, 0xf9003e40, 0x0f9003e4, 0x00f9003e, 0x400f9003, 0xe400f900,
+ 0x3e708b90, 0x02e500f1, 0x8232700b, 0x9e032650, 0xc9103e58, 0x0c9c0225,
+ 0x04e9c0b2, 0x480c9003, 0x2408f9e0, 0x7e400b90, 0x12e40099, 0xc43e480c,
+ 0x90036800, 0x20000000, 0x00000000, 0xe810a400, 0xf9003e40, 0x0f9003e4,
+ 0x00f9003e, 0x400f9003, 0xe400f908, 0x3a400b90, 0x136410f9, 0x803a504f,
+ 0x9a436400, 0xf9023e40, 0x0f9a03e4, 0x08f9203e, 0x402f1003, 0xe420f990,
+ 0x7e400f90, 0x03e400f9, 0xa024400d, 0x1003fa14, 0x20000000, 0x00000000,
+ 0x2810a000, 0xf8003e00, 0x0f8003e0, 0x00f8003e, 0x000f8003, 0xe000f800,
+ 0x32088f80, 0x03e201c8, 0x0236140f, 0x8002e002, 0xc8003e11, 0x0c860300,
+ 0x10c80830, 0x01008083, 0x2000c840, 0x3a000e80, 0x03e000f8, 0x003a100c,
+ 0x82030a04, 0x20000000, 0x00000000, 0x08042800, 0xba002e80, 0x0ba002e8,
+ 0x00ba002e, 0x800ba007, 0xe800be80, 0x2b900b60, 0x02f800de, 0x8a33840b,
+ 0xa081bb00, 0x8a082789, 0x0dec0a28, 0x008600a3, 0x9008ee02, 0x39008eb0,
+ 0x22800be1, 0x83a800b6, 0x90238400, 0xec0a0200, 0x00000000, 0x00000000,
+ 0x08054c00, 0xb3002cc0, 0x0b3002cc, 0x01b3002c, 0xc00b3002, 0xcc00b340,
+ 0x24c40b30, 0xa0cc0083, 0x00a0e00b, 0xb0028d20, 0x83002ec8, 0x483c024c,
+ 0x0283d020, 0xe8083802, 0x0f048340, 0x28c00a34, 0x028c00b3, 0x806cd028,
+ 0x31028200, 0x50000000, 0x00000000, 0x20011c00, 0xb7002dc0, 0x0b7002dc,
+ 0x00b7002d, 0xc00b7002, 0x9c00b7c0, 0x2dc00b50, 0x82de1097, 0x0021c00b,
+ 0x70029c20, 0x87002dc0, 0x4970821c, 0x00860221, 0xd018700a, 0x17008380,
+ 0x21c00b70, 0x029c00bf, 0x40254308, 0x70028804, 0x40000000, 0x00000000,
+ 0x28181e00, 0xf7802de0, 0x0f7803de, 0x00f7803d, 0xe00b7802, 0xde00f780,
+ 0x25e04f58, 0x43de0087, 0x8031e00f, 0x7803be00, 0xc7803de0, 0x0cf8034e,
+ 0x04c580a3, 0xe02cf803, 0x3e02c780, 0x39e00e58, 0x239e04f7, 0x807c602c,
+ 0x38038a00, 0x00000000, 0x00000000, 0x081dac00, 0xfb023ec0, 0x0fb003ec,
+ 0x00fb003e, 0xc00fb003, 0xec00f301, 0x3a800f80, 0x13cc10f9, 0x003ec00f,
+ 0x9003ac04, 0xfb0036c0, 0x0fa003ec, 0x00f0003e, 0xc12fb003, 0xe400f904,
+ 0x3ec00f90, 0x03ac00fa, 0x003a400f, 0xa0234204, 0x60000000, 0x00000000,
+ 0x6004be00, 0xff807fe4, 0x0ff803fe, 0x00ff803f, 0xe00ff803, 0xfe00fd80,
+ 0x33e40fd8, 0x13fe88ff, 0x8233e40c, 0xf1033e04, 0xef913fe0, 0x4ff801fe,
+ 0x00ff9033, 0xe004f813, 0x3e009f80, 0x33e00ff8, 0x033e00ff, 0x8031202c,
+ 0xf803d800, 0x20000000, 0x00000000, 0xa8009c00, 0xb70039c0, 0x0b7002dc,
+ 0x00b7002d, 0xc08b7002, 0xdc00b502, 0x15c40b51, 0x02d804b7, 0x403d0048,
+ 0xf0249400, 0xb5020d80, 0x0b50035c, 0x00b63029, 0x8088c488, 0x9000bf60,
+ 0x35c00bd4, 0x035c00bc, 0x00294408, 0x52826a00, 0x20000000, 0x00000000,
+ 0x00009c00, 0xb7002dc0, 0x0b7002dc, 0x00b7002d, 0xc00b7002, 0xdc00bc00,
+ 0x21400b50, 0x02d490b7, 0x10a1c018, 0x75061800, 0xa7086d42, 0x0b7402dc,
+ 0x00b50221, 0x442b7102, 0x1400b400, 0x21c00b40, 0x021c00b5, 0x00294008,
+ 0x7016c000, 0x20000000, 0x00000000, 0x40148c00, 0xb3002cc0, 0x0b3002cc,
+ 0x00b3002c, 0xc00b3002, 0xcc00b060, 0x24000b00, 0x02c380b1, 0x002a3508,
+ 0x10028220, 0x31812e30, 0x0b08020d, 0x40b04028, 0x10090802, 0x0000b0c0,
+ 0x24c01b00, 0x224c00b8, 0xa0284408, 0x8026d004, 0x20000000, 0x00000000,
+ 0x2805ac00, 0xfb003ec0, 0x0bb003ec, 0x00fb003e, 0xc00fb002, 0xec01b940,
+ 0x10f00f90, 0x02ee10fb, 0x4822d028, 0xb8222f20, 0xeb801ec0, 0x0fb882ed,
+ 0x00f080a2, 0xd00fb003, 0x24009922, 0x22c00bb0, 0x022c00f9, 0x60384028,
+ 0xb043ca00, 0x60000000, 0x00000000, 0xa010ec00, 0xfb003ac0, 0x0fb003ec,
+ 0x00fb0036, 0xc00fb003, 0xec00f840, 0x3e4c0f94, 0x13e440fa, 0x203ec20f,
+ 0xb133e800, 0xfb0d3e42, 0x0fb4036c, 0x90f8583e, 0x460eb013, 0xe500f940,
+ 0x3ec00fb4, 0x03ec10f9, 0x003e402f, 0xb2036804, 0x30000000, 0x00000000,
+ 0x0110fc00, 0xff003fc0, 0x0ef003fc, 0x00ff003f, 0xc00ff003, 0xfc00fd00,
+ 0x7fc00cd0, 0x03fa80ff, 0x01b3000c, 0xf933f650, 0xcd903f80, 0xccd203dc,
+ 0x04cc8033, 0x800c4013, 0x3000f408, 0x9bc00fc0, 0x01fc00fd, 0x0133400e,
+ 0xdc030044, 0x30000000, 0x00000000, 0x81046c00, 0xbb002ec0, 0x0bb002ec,
+ 0x00bb002e, 0xc00bb002, 0xec00b880, 0x2e100a8c, 0x82e184b1, 0xc062240b,
+ 0x9003e000, 0x89002e10, 0xa88803ac, 0x1488d8b6, 0x00688442, 0xa300b880,
+ 0x32c00b80, 0x12ec04b8, 0x8136600a, 0x84822040, 0x10000000, 0x00000000,
+ 0x80056c00, 0xbb002ec0, 0x0bb002ec, 0x00bb002e, 0xc00bb002, 0xec00b9c0,
+ 0x2e980888, 0x02ec00b9, 0x8122c209, 0x9042cc20, 0x8b002ed4, 0x18a082ec,
+ 0x00880020, 0xe018b202, 0xa7003980, 0x22c00b91, 0x02ec0099, 0x81222002,
+ 0xa0022000, 0x50000000, 0x00000000, 0x08000c00, 0xb3002cc0, 0x0b3002cc,
+ 0x00b3002c, 0xc00b3002, 0xcc00b000, 0x2c000a00, 0x02c004b0, 0x00200009,
+ 0x10028004, 0x81006c00, 0x1800028c, 0x02820024, 0x20880002, 0x8000b100,
+ 0x24c00b10, 0x02cc00b0, 0x0024416a, 0x00020200, 0x00000000, 0x00000000,
+ 0x00186c00, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0xc00fb003, 0xec11f800,
+ 0x2e000c80, 0x03e000f9, 0x00a0002d, 0x9002e002, 0xc9003e00, 0x0c8002ec,
+ 0x00c90070, 0x000c8012, 0xa011f800, 0x32c11f80, 0x27ec04d9, 0x0032402e,
+ 0x80030006, 0x10000000, 0x00000000, 0xa01dfc00, 0xff003fc0, 0x07f003fc,
+ 0x00ff003f, 0xc00ff007, 0xfc01f400, 0x3f000bc0, 0x47f004f5, 0x003f004e,
+ 0xd003f000, 0x7d003f00, 0x0fc063bc, 0x00f4003f, 0x008fc003, 0xf000fc00,
+ 0x33c00fc0, 0x03fc04fc, 0x013f400f, 0xc003e806, 0x70000000, 0x00000000,
+ 0x00000284, 0x00a10028, 0x400a1002, 0x8400a100, 0x28400a10, 0x028400a1,
+ 0x0028400a, 0x10028400, 0xa1002840, 0x0a100284, 0x00a10028, 0x400a1002,
+ 0x8400a100, 0x28400a10, 0x028400a1, 0x0028400a, 0x10028400, 0xa1002840,
+ 0x0a100000, 0x00000000, 0x00000000, 0x00000004, 0x00010000, 0x40001000,
+ 0x04000100, 0x00400010, 0x00040001, 0x00004000, 0x10000400, 0x01000040,
+ 0x00100004, 0x00010000, 0x40001000, 0x04000100, 0x00400010, 0x00040001,
+ 0x00004000, 0x10000400, 0x01000040, 0x00100000, 0x00000000, 0x00000000,
+ 0x00000084, 0x00210008, 0x40021000, 0x84002100, 0x08400210, 0x00840021,
+ 0x00084002, 0x10008400, 0x21000840, 0x02100084, 0x00210008, 0x40021000,
+ 0x84002100, 0x08400210, 0x00840021, 0x00084002, 0x10008400, 0x21000840,
+ 0x02100000, 0x00000000, 0x00000000, 0x00000004, 0x00010000, 0x40001000,
+ 0x04000100, 0x00400010, 0x00040001, 0x00004000, 0x10000400, 0x01000040,
+ 0x00100004, 0x00010000, 0x40001000, 0x04000100, 0x00400010, 0x00040001,
+ 0x00004000, 0x10000400, 0x01000040, 0x00100000, 0x00000000, 0x00000000,
+ 0x00000080, 0x00200008, 0x00020000, 0x80002000, 0x08000200, 0x00800020,
+ 0x00080002, 0x00008000, 0x20000800, 0x02000080, 0x00200008, 0x00020000,
+ 0x80002000, 0x08000200, 0x00800020, 0x00080002, 0x00008000, 0x20000800,
+ 0x02000000, 0x00000000, 0x00000000, 0x00000200, 0x00800020, 0x00080002,
+ 0x00008000, 0x20000800, 0x02000080, 0x00200008, 0x00020000, 0x80002000,
+ 0x08000200, 0x00800020, 0x00080002, 0x00008000, 0x20000800, 0x02000080,
+ 0x00200008, 0x00020000, 0x80002000, 0x08000000, 0x00000000, 0x00000000,
+ 0x00000080, 0x00200008, 0x00020000, 0x80002000, 0x08000200, 0x00800020,
+ 0x00080002, 0x00008000, 0x20000800, 0x02000080, 0x00200008, 0x00020000,
+ 0x80002000, 0x08000200, 0x00800020, 0x00080002, 0x00008000, 0x20000800,
+ 0x02000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000284, 0x00a10028, 0x400a1002, 0x8400a100, 0x28400a10, 0x028400a1,
+ 0x0028400a, 0x10028400, 0xa1002840, 0x0a100284, 0x00a10028, 0x400a1002,
+ 0x8400a100, 0x28400a10, 0x028400a1, 0x0028400a, 0x10028400, 0xa1002840,
+ 0x0a100000, 0x00000000, 0x00000000, 0x00000004, 0x00010000, 0x40001000,
+ 0x04000100, 0x00400010, 0x00040001, 0x00004000, 0x10000400, 0x01000040,
+ 0x00100004, 0x00010000, 0x40001000, 0x04000100, 0x00400010, 0x00040001,
+ 0x00004000, 0x10000400, 0x01000040, 0x00100000, 0x00000000, 0x00000000,
+ 0x00000084, 0x00210008, 0x40021000, 0x84002100, 0x08400210, 0x00840021,
+ 0x00084002, 0x10008400, 0x21000840, 0x02100084, 0x00210008, 0x40021000,
+ 0x84002100, 0x08400210, 0x00840021, 0x00084002, 0x10008400, 0x21000840,
+ 0x02100000, 0x00000000, 0x00000000, 0x00100007, 0x3001cc00, 0x73001cc0,
+ 0x073001cc, 0x0073001c, 0xc0073001, 0xcc007300, 0x1cc00730, 0x01cc0073,
+ 0x001cc007, 0x3001cc00, 0x73001cc0, 0x073001cc, 0x0073001c, 0xc0073001,
+ 0xcc007300, 0x1cc00730, 0x01cc0073, 0x001cc004, 0x00000000, 0x00000000,
+ 0x00000084, 0x00210008, 0x40021000, 0x84002100, 0x08400210, 0x00840021,
+ 0x00084002, 0x10008400, 0x21000840, 0x02100084, 0x00210008, 0x40021000,
+ 0x84002100, 0x08400210, 0x00840021, 0x00084002, 0x10008400, 0x21000840,
+ 0x02100000, 0x00000000, 0x00000000, 0x00000200, 0x00800020, 0x00080002,
+ 0x00008000, 0x20000800, 0x02000080, 0x00200008, 0x00020000, 0x80002000,
+ 0x08000200, 0x00800020, 0x00080002, 0x00008000, 0x20000800, 0x02000080,
+ 0x00200008, 0x00020000, 0x80002000, 0x08000000, 0x00000000, 0x00000000,
+ 0x00000080, 0x00200008, 0x00020000, 0x80002000, 0x08000200, 0x00800020,
+ 0x00080002, 0x00008000, 0x20000800, 0x02000080, 0x00200008, 0x00020000,
+ 0x80002000, 0x08000200, 0x00800020, 0x00080002, 0x00008000, 0x20000800,
+ 0x02000000, 0x00000000, 0x00000000, 0x04108000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000104, 0x20000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x3c3c0000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000f0f, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00003fff, 0xffffc000, 0x0000003f,
+ 0xffffffc0, 0x00000000, 0x3fffffff, 0xc0000000, 0x003fffff, 0xffc00000,
+ 0x00003fff, 0xffffc000, 0x0000003f, 0xffffffc0, 0x00000000, 0x3fffffff,
+ 0xc0000000, 0x003fffff, 0xffc00000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00003fff, 0xffffc000, 0x0000003f, 0xffffffc0, 0x00000000, 0x3fffffff,
+ 0xc0000000, 0x003fffff, 0xffc00000, 0x00003fff, 0xffffc000, 0x0000003f,
+ 0xffffffc0, 0x00000000, 0x3fffffff, 0xc0000000, 0x003fffff, 0xffc00000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00003fff, 0xffffc000, 0x0000003f,
+ 0xffffffc0, 0x00000000, 0x3fffffff, 0xc0000000, 0x003fffff, 0xffc00000,
+ 0x00003fff, 0xffffc000, 0x0000003f, 0xffffffc0, 0x00000000, 0x3fffffff,
+ 0xc0000000, 0x003fffff, 0xffc00000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00003fff, 0xffffc000, 0x0000003f, 0xffffffc0, 0x00000000, 0x3fffffff,
+ 0xc0000000, 0x003fffff, 0xffc00000, 0x00003fff, 0xffffc000, 0x0000003f,
+ 0xffffffc0, 0x00000000, 0x3fffffff, 0xc0000000, 0x003fffff, 0xffc00000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00003fff, 0xffffc000, 0x0000003f,
+ 0xffffffc0, 0x00000000, 0x3fffffff, 0xc0000000, 0x003fffff, 0xffc00000,
+ 0x00003fff, 0xffffc000, 0x0000003f, 0xffffffc0, 0x00000000, 0x3fffffff,
+ 0xc0000000, 0x003fffff, 0xffc00000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00003fff, 0xffffc000, 0x0000003f, 0xffffffc0, 0x00000000, 0x3fffffff,
+ 0xc0000000, 0x003fffff, 0xffc00000, 0x00003fff, 0xffffc000, 0x0000003f,
+ 0xffffffc0, 0x00000000, 0x3fffffff, 0xc0000000, 0x003fffff, 0xffc00000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000284, 0x00a10028, 0x400a1002,
+ 0x8400a100, 0x28400a10, 0x028400a1, 0x0028400a, 0x10028400, 0xa1002840,
+ 0x0a100284, 0x00a10028, 0x400a1002, 0x8400a100, 0x28400a10, 0x028400a1,
+ 0x0028400a, 0x10028400, 0xa1002840, 0x0a100000, 0x00000000, 0x00000000,
+ 0x00000004, 0x00010000, 0x40001000, 0x04000100, 0x00400010, 0x00040001,
+ 0x00004000, 0x10000400, 0x01000040, 0x00100004, 0x00010000, 0x40001000,
+ 0x04000100, 0x00400010, 0x00040001, 0x00004000, 0x10000400, 0x01000040,
+ 0x00100000, 0x00000000, 0x00000000, 0x00000084, 0x00210008, 0x40021000,
+ 0x84002100, 0x08400210, 0x00840021, 0x00084002, 0x10008400, 0x21000840,
+ 0x02100084, 0x00210008, 0x40021000, 0x84002100, 0x08400210, 0x00840021,
+ 0x00084002, 0x10008400, 0x21000840, 0x02100000, 0x00000000, 0x00000000,
+ 0x00000004, 0x00010000, 0x40001000, 0x04000100, 0x00400010, 0x00040001,
+ 0x00004000, 0x10000400, 0x01000040, 0x00100004, 0x00010000, 0x40001000,
+ 0x04000100, 0x00400010, 0x00040001, 0x00004000, 0x10000400, 0x01000040,
+ 0x00100000, 0x00000000, 0x00000000, 0x00000080, 0x00200008, 0x00020000,
+ 0x80002000, 0x08000200, 0x00800020, 0x00080002, 0x00008000, 0x20000800,
+ 0x02000080, 0x00200008, 0x00020000, 0x80002000, 0x08000200, 0x00800020,
+ 0x00080002, 0x00008000, 0x20000800, 0x02000000, 0x00000000, 0x00000000,
+ 0x00000200, 0x00800020, 0x00080002, 0x00008000, 0x20000800, 0x02000080,
+ 0x00200008, 0x00020000, 0x80002000, 0x08000200, 0x00800020, 0x00080002,
+ 0x00008000, 0x20000800, 0x02000080, 0x00200008, 0x00020000, 0x80002000,
+ 0x08000000, 0x00000000, 0x00000000, 0x00000080, 0x00200008, 0x00020000,
+ 0x80002000, 0x08000200, 0x00800020, 0x00080002, 0x00008000, 0x20000800,
+ 0x02000080, 0x00200008, 0x00020000, 0x80002000, 0x08000200, 0x00800020,
+ 0x00080002, 0x00008000, 0x20000800, 0x02000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000284, 0x00a10028, 0x400a1002,
+ 0x8400a100, 0x28400a10, 0x028400a1, 0x0028400a, 0x10028400, 0xa1002840,
+ 0x0a100284, 0x00a10028, 0x400a1002, 0x8400a100, 0x28400a10, 0x028400a1,
+ 0x0028400a, 0x10028400, 0xa1002840, 0x0a100000, 0x00000000, 0x00000000,
+ 0x00000004, 0x00010000, 0x40001000, 0x04000100, 0x00400010, 0x00040001,
+ 0x00004000, 0x10000400, 0x01000040, 0x00100004, 0x00010000, 0x40001000,
+ 0x04000100, 0x00400010, 0x00040001, 0x00004000, 0x10000400, 0x01000040,
+ 0x00100000, 0x00000000, 0x00000000, 0x00000084, 0x00210008, 0x40021000,
+ 0x84002100, 0x08400210, 0x00840021, 0x00084002, 0x10008400, 0x21000840,
+ 0x02100084, 0x00210008, 0x40021000, 0x84002100, 0x08400210, 0x00840021,
+ 0x00084002, 0x10008400, 0x21000840, 0x02100000, 0x00000000, 0x00000000,
+ 0x00100007, 0x3001cc00, 0x73001cc0, 0x073001cc, 0x0073001c, 0xc0073001,
+ 0xcc007300, 0x1cc00730, 0x01cc0073, 0x001cc007, 0x3001cc00, 0x73001cc0,
+ 0x073001cc, 0x0073001c, 0xc0073001, 0xcc007300, 0x1cc00730, 0x01cc0073,
+ 0x001cc004, 0x00000000, 0x00000000, 0x00000084, 0x00210008, 0x40021000,
+ 0x84002100, 0x08400210, 0x00840021, 0x00084002, 0x10008400, 0x21000840,
+ 0x02100084, 0x00210008, 0x40021000, 0x84002100, 0x08400210, 0x00840021,
+ 0x00084002, 0x10008400, 0x21000840, 0x02100000, 0x00000000, 0x00000000,
+ 0x00000200, 0x00800020, 0x00080002, 0x00008000, 0x20000800, 0x02000080,
+ 0x00200008, 0x00020000, 0x80002000, 0x08000200, 0x00800020, 0x00080002,
+ 0x00008000, 0x20000800, 0x02000080, 0x00200008, 0x00020000, 0x80002000,
+ 0x08000000, 0x00000000, 0x00000000, 0x00000080, 0x00200008, 0x00020000,
+ 0x80002000, 0x08000200, 0x00800020, 0x00080002, 0x00008000, 0x20000800,
+ 0x02000080, 0x00200008, 0x00020000, 0x80002000, 0x08000200, 0x00800020,
+ 0x00080002, 0x00008000, 0x20000800, 0x02000000, 0x00000000, 0x00000000,
+ 0x04108000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000104, 0x20000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x3c3c0000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000f0f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00003fff, 0xffffc000, 0x0000003f, 0xffffffc0, 0x00000000, 0x3fffffff,
+ 0xc0000000, 0x003fffff, 0xffc00000, 0x00003fff, 0xffffc000, 0x0000003f,
+ 0xffffffc0, 0x00000000, 0x3fffffff, 0xc0000000, 0x003fffff, 0xffc00000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00003fff, 0xffffc000, 0x0000003f,
+ 0xffffffc0, 0x00000000, 0x3fffffff, 0xc0000000, 0x003fffff, 0xffc00000,
+ 0x00003fff, 0xffffc000, 0x0000003f, 0xffffffc0, 0x00000000, 0x3fffffff,
+ 0xc0000000, 0x003fffff, 0xffc00000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00003fff, 0xffffc000, 0x0000003f, 0xffffffc0, 0x00000000, 0x3fffffff,
+ 0xc0000000, 0x003fffff, 0xffc00000, 0x00003fff, 0xffffc000, 0x0000003f,
+ 0xffffffc0, 0x00000000, 0x3fffffff, 0xc0000000, 0x003fffff, 0xffc00000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00003fff, 0xffffc000, 0x0000003f,
+ 0xffffffc0, 0x00000000, 0x3fffffff, 0xc0000000, 0x003fffff, 0xffc00000,
+ 0x00003fff, 0xffffc000, 0x0000003f, 0xffffffc0, 0x00000000, 0x3fffffff,
+ 0xc0000000, 0x003fffff, 0xffc00000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00003fff, 0xffffc000, 0x0000003f, 0xffffffc0, 0x00000000, 0x3fffffff,
+ 0xc0000000, 0x003fffff, 0xffc00000, 0x00003fff, 0xffffc000, 0x0000003f,
+ 0xffffffc0, 0x00000000, 0x3fffffff, 0xc0000000, 0x003fffff, 0xffc00000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00003fff, 0xffffc000, 0x0000003f,
+ 0xffffffc0, 0x00000000, 0x3fffffff, 0xc0000000, 0x003fffff, 0xffc00000,
+ 0x00003fff, 0xffffc000, 0x0000003f, 0xffffffc0, 0x00000000, 0x3fffffff,
+ 0xc0000000, 0x003fffff, 0xffc00000, 0x00000000, 0x00000000, 0x00000000,
+ 0xc005fe00, 0xfc403310, 0x0cfc03fd, 0x80dc1033, 0xe00ff023, 0x7c00e480,
+ 0x3fc40ff3, 0x033240ee, 0x2c33e00f, 0xf8033e10, 0xfc2037e0, 0x0ef8037e,
+ 0x00ff803f, 0xc008f843, 0xfe00f500, 0xb3e00ff8, 0x033a00cf, 0x803fe00f,
+ 0xf803f000, 0x70000000, 0x00000000, 0x8010ee00, 0xba002200, 0x08b022ec,
+ 0x40880222, 0xe10bfc02, 0x2d008880, 0x2fd08b31, 0x0280008a, 0xc02ac3cb,
+ 0xb202ae00, 0xbac022e0, 0x0bb802ee, 0x009b802e, 0xf428b042, 0xee00bd80,
+ 0x22e04bb8, 0x022200db, 0x802ee00b, 0xb802e004, 0x30000000, 0x00000000,
+ 0x0805cc00, 0xb0202008, 0x093202cc, 0x80a0202c, 0xc04b3400, 0x0d02b003,
+ 0x2cd84a32, 0x122080a2, 0x0020c009, 0x3082cc00, 0xb14060c0, 0x0b3002cc,
+ 0x00b3002c, 0xc0483006, 0xcc00b900, 0x20c00b30, 0x06880083, 0x002cc00b,
+ 0x3002c201, 0x70000000, 0x00000000, 0xc015ac00, 0xb2102058, 0x09b002ec,
+ 0x00a1182e, 0xc00bb00a, 0x4c009881, 0x26c08bb1, 0x02a400aa, 0x002ac01b,
+ 0xb002ec00, 0xbb0022c0, 0x0bb002ec, 0x009b002e, 0x8448b002, 0xec00b900,
+ 0x22c01bb0, 0x0222009b, 0x002ec00b, 0xb002f004, 0x60000000, 0x00000000,
+ 0x4015ec00, 0xf800b2b0, 0x29b003ec, 0x10e840be, 0xc10fb003, 0x6c00e8c0,
+ 0x3ec00fb8, 0x030000ea, 0x6432c00f, 0xb002ec00, 0xb800b6c0, 0x0eb003ec,
+ 0x08fb003c, 0x6204b003, 0xec00fd00, 0x32c00f30, 0x432f00cb, 0x003ec00f,
+ 0xb003c004, 0x70000000, 0x00000000, 0xe001bc00, 0xff803f80, 0x0ef023fc,
+ 0x00cc8013, 0xc107b001, 0xbc00ec00, 0x3fc08f68, 0x42fc4096, 0x903fc00d,
+ 0xf043bc00, 0xf4003fc0, 0x0bf003fc, 0x00bf023e, 0xe007f013, 0xfc00bd00,
+ 0x3fc00ff0, 0x03fc00ff, 0x003fc00f, 0xf003f800, 0x60000000, 0x00000000,
+ 0xc010ac00, 0xf9403ec0, 0x4db00b2c, 0x00c94036, 0xc00f300b, 0x2c80f840,
+ 0x32c407c3, 0x43e800da, 0x4036c20f, 0xb0836c10, 0xf8003ec0, 0x0fb003ec,
+ 0x00fb003a, 0x502cb00b, 0x2c00f910, 0x32c00fb0, 0x03ac80fb, 0x003ec00d,
+ 0xb003f004, 0x20000000, 0x00000000, 0xc8052c00, 0xbb002ec0, 0x08b0023c,
+ 0x148b0122, 0xc049f002, 0x3f20b800, 0x37c009a4, 0x022e108a, 0x003ac00e,
+ 0xb601ac04, 0xb8042ec0, 0x0bb002ec, 0x00bb002e, 0x8008b002, 0x2c00b100,
+ 0x22c08bb0, 0x020600bb, 0x002ec00b, 0xb002f200, 0x40000000, 0x00000000,
+ 0xe0054c00, 0xb0012c00, 0x4930122c, 0x00920024, 0xc0093012, 0x8e009004,
+ 0x00f25a38, 0x0283c993, 0x002cd00b, 0xb0404c00, 0x900024c0, 0x0b3002cc,
+ 0x00b30028, 0x000a3002, 0x4c00b100, 0x20c00b35, 0x82cb0093, 0x0024c009,
+ 0x3002f800, 0x50000000, 0x00000000, 0x60011e00, 0xb6802c20, 0x0878021e,
+ 0x00928221, 0xe0097802, 0x9e00bc80, 0x24e00978, 0x26da4087, 0x8029e01a,
+ 0x78029e00, 0xb6802de1, 0x0b7802de, 0x00b7842d, 0x200a7802, 0x5e01bd80,
+ 0x21e00b78, 0x225648b7, 0x802de00b, 0x7802d800, 0x40000000, 0x00000000,
+ 0x48080c00, 0xf0403c40, 0x2db0022c, 0x00d30034, 0xc00d3202, 0x8c009010,
+ 0x20c40e36, 0x13cd40d1, 0x0034c00f, 0x30034c00, 0xf1003cc0, 0x0f3103cc,
+ 0x48f30238, 0x000eb003, 0x4c00f100, 0x30c40f30, 0x03cd60f3, 0x003cc00d,
+ 0x3003d202, 0x00000000, 0x00000000, 0x401dbc00, 0xfe003fc4, 0x0ff103fc,
+ 0x00ef107f, 0xc005f003, 0x7c00fc04, 0x3fc44ef0, 0x023c40ff, 0x013fc00f,
+ 0xf003fc00, 0xff001fc0, 0x0ff003fc, 0x00ff003f, 0x000df003, 0xbc00fd80,
+ 0x3fc04f71, 0x03bc40ff, 0x003fc00f, 0xf003d006, 0x60000000, 0x00000000,
+ 0xa805ec00, 0xf9203a88, 0x0fb8032c, 0x00fa2102, 0xc00fb203, 0xac40e800,
+ 0x3ed20fd8, 0x032400fb, 0x003ac00f, 0xb003ec00, 0xf8003ec0, 0x0fb001ec,
+ 0x00fb003c, 0x400eb003, 0xec00f930, 0x3ac00fb0, 0x03ea04cb, 0x001ec00f,
+ 0xb003ea00, 0x70000000, 0x00000000, 0xc8119c00, 0xb30a2182, 0x0bf0021c,
+ 0x80b60821, 0xc00b7532, 0xdc00b400, 0x2dc88bf8, 0x0a3c0406, 0x002dc10b,
+ 0x7003dc00, 0xb4002dc0, 0x0b7002dc, 0x00b7002d, 0x40287002, 0xdc00b508,
+ 0x21c00b70, 0x02dc0087, 0x002dc00b, 0x7002f204, 0x40000000, 0x00000000,
+ 0xc0009e00, 0xb78029e0, 0x0a78025e, 0xc0b78021, 0xe00b7a02, 0x1e80b4c0,
+ 0x2dec0b5b, 0x121e04a5, 0x8129e003, 0x7802de00, 0xb4806de0, 0x0b7802de,
+ 0x00b7802d, 0x620a7806, 0xde00b580, 0x29e00b78, 0x12ff0087, 0x802de00b,
+ 0x7802f040, 0x20000000, 0x00000000, 0x4814cc00, 0xb37020e4, 0x0b30020c,
+ 0x00b35820, 0xc10b3002, 0xcc00b380, 0x2cc01b38, 0x020d2083, 0x402ec00b,
+ 0x30028c00, 0xb0306cc0, 0x0b3002cc, 0x0493002c, 0x32083042, 0xcc00b100,
+ 0x20c00930, 0x02ce0083, 0x002cc00b, 0x3002d204, 0x30000000, 0x00000000,
+ 0xe815a800, 0xfac03a90, 0x0ea00b68, 0x00fac0b2, 0x800fa003, 0xa800fe40,
+ 0x2e805be3, 0x131b04ee, 0x103a800f, 0xa002e801, 0xbe803e80, 0x0fa001e8,
+ 0x00fa003d, 0xb00ea003, 0xe800be00, 0x3a800fa0, 0x03fa02ca, 0x003e800f,
+ 0xa003fa04, 0x60000000, 0x00000000, 0x4800e000, 0xf0003e02, 0x0f8003e0,
+ 0x00f8003e, 0x000b0003, 0xe000f800, 0x3e001f80, 0x03e140e8, 0x0036000f,
+ 0x8003e000, 0xf8003e00, 0x0d8003e0, 0x00f8003e, 0x100f8023, 0xe000f040,
+ 0x3e000f80, 0x43e000f8, 0x003e000f, 0x8003d200, 0x30000000, 0x00000000,
+ 0x0810e400, 0xfb0032c0, 0x4c9003c4, 0x00db0032, 0x400f9043, 0x0702c908,
+ 0x3a504790, 0x53e450e9, 0x003e400c, 0x90016400, 0xf9003e40, 0x0f9003e4,
+ 0x00f9003e, 0x702c9003, 0xe400f900, 0x22400f90, 0x03e52039, 0x003e400f,
+ 0x9003c204, 0x30000000, 0x00000000, 0x80046400, 0xb9002240, 0x289002e4,
+ 0x00890022, 0x400b9002, 0x27008901, 0x2e420bd5, 0x02e48089, 0x002e4008,
+ 0x9402e400, 0xb9002e40, 0x0b9000e4, 0x00b9002e, 0x40089012, 0xe400bd88,
+ 0x22400b90, 0x22e680b9, 0x002e400b, 0x9002e000, 0x10000000, 0x00000000,
+ 0x18052400, 0xb9002040, 0x089002e4, 0x00a10022, 0x400b900a, 0x25008b00,
+ 0x2e400a94, 0x02e40129, 0x006e4008, 0x94026400, 0xb9002e40, 0x0b9002e4,
+ 0x00b9002e, 0x40099002, 0xe404b920, 0x2a400b90, 0x02e400b9, 0x002e400b,
+ 0x9002c600, 0x40000000, 0x00000000, 0x08040400, 0xb1102044, 0x081102c4,
+ 0x40a11020, 0x400b1002, 0x04408100, 0x2c440b11, 0x12e44081, 0x002c4428,
+ 0x1402c400, 0xb1002c40, 0x0b1002c4, 0x00b1002c, 0xc0091002, 0xc400b128,
+ 0xa8400b10, 0x42c400b1, 0x002c400b, 0x1002c201, 0x00000000, 0x00000000,
+ 0x380d6000, 0xf868b21a, 0x0c8403e1, 0xa0e068b2, 0x000f8283, 0x21a0c800,
+ 0x3e1a1f86, 0x93e110e8, 0x003e100c, 0x80036000, 0xf8a83e00, 0x0f8003e0,
+ 0x00f8003e, 0x2a0d8003, 0xe001f8a0, 0x3a000f80, 0x03e008f8, 0x003e000f,
+ 0x8003ee03, 0x50000000, 0x00000000, 0x981de400, 0xf9203e48, 0x0f9203e4,
+ 0x82d9203e, 0x400f9003, 0xe480fd01, 0x3e4807d2, 0x03f480fd, 0x403e480f,
+ 0x9003e400, 0xfd003e40, 0x0f9003e4, 0x00f9003f, 0x400e9a83, 0xe400f504,
+ 0x36404f90, 0x13d400f9, 0x003e400f, 0x9003e602, 0x70000000, 0x00000000,
+ 0x1805e400, 0xf9003240, 0x049003a4, 0x00f90032, 0x400f9003, 0xe400c900,
+ 0x1f400cd0, 0x033400e9, 0x003b400b, 0xd003e401, 0xf9003e40, 0x0f9003e4,
+ 0x00f9003f, 0x400c9003, 0xa400f5a0, 0x32400f50, 0x031400f9, 0x003e400f,
+ 0x9003e600, 0x70000000, 0x00000000, 0x3810e000, 0xb0002280, 0x088002e0,
+ 0x00ba0022, 0x000b8002, 0xc0028a01, 0x2e100880, 0x0228008a, 0x002e008b,
+ 0x8002e000, 0xba002e00, 0x0b8002e0, 0x0098002e, 0x100d8062, 0x2000b840,
+ 0x22000b80, 0x022008b8, 0x002e000b, 0x8002ce04, 0x30000000, 0x00000000,
+ 0x0805c400, 0xb1002440, 0x08100284, 0x00b10028, 0x400b1002, 0xc4018100,
+ 0x2c440b10, 0x024410b1, 0x0028400b, 0x1002c400, 0xb1002c40, 0x0b1002c4,
+ 0x00b1012c, 0x44081002, 0x8400b110, 0x20400b10, 0x060400b1, 0x022c400b,
+ 0x1002c201, 0x70000000, 0x00000000, 0x1815a400, 0xb9002660, 0x089002e4,
+ 0x00b9202a, 0x400b9042, 0xe4008900, 0x2e400ab2, 0x924440b9, 0x002e400b,
+ 0x9002e400, 0xb9002e40, 0x0b9002e4, 0x0099002e, 0x42099002, 0x2400b900,
+ 0x22400b90, 0x0a2580b9, 0x002e400b, 0x9002c604, 0x60000000, 0x00000000,
+ 0xa015e400, 0xf988b650, 0x2c9003a4, 0x00f940ba, 0x400f9003, 0xe400c940,
+ 0x3f408fd8, 0x037700f9, 0xc03a400f, 0x9003e400, 0xb9003e40, 0x0f9002e4,
+ 0x00f9003e, 0x400c9003, 0xa404f900, 0xb2400710, 0x032600f9, 0x013e400f,
+ 0x9003e804, 0x70000000, 0x00000000, 0xa801a400, 0xf9403a40, 0x0f9003e4,
+ 0x00f90036, 0x400f9003, 0xcc00f9c0, 0x3c400890, 0x03a600c9, 0xa43e400f,
+ 0x9003e400, 0xf9003e40, 0x0f9003e4, 0x00f9003c, 0x400f9003, 0xe400f900,
+ 0x3e400f90, 0x03e600f9, 0x003e400b, 0x9003ea00, 0x60000000, 0x00000000,
+ 0x2810a000, 0xf8403210, 0x2c8023e0, 0x00d840b2, 0x000f8003, 0x2082c800,
+ 0x3e009f00, 0x03a12078, 0x0032000f, 0x800b2000, 0xf8043e00, 0x0f8003e0,
+ 0x00f8003e, 0x000c8003, 0xe000f030, 0x36000f82, 0x032040e8, 0x003e000f,
+ 0x8003ca04, 0x20000000, 0x00000000, 0x28052800, 0xba002280, 0x08a002e8,
+ 0x008a0022, 0x800ba022, 0x2b008a00, 0x2f840be0, 0x823a00ba, 0x0023a00b,
+ 0xe5822800, 0xea002e80, 0x0ba002e8, 0x04ba003b, 0xa008a002, 0xe800be80,
+ 0x22808bec, 0xc238408a, 0x002e800b, 0xa002ca00, 0x40000000, 0x00000000,
+ 0x28054c00, 0xbb00a2c0, 0x083002cc, 0x008b0024, 0xc00b3002, 0x0c009300,
+ 0x2cc40b38, 0x828c40b3, 0x0020e00b, 0x3002cc00, 0xa3002cc0, 0x1b3002cc,
+ 0x00b3002c, 0x8028b002, 0xcc00b340, 0x24c00b30, 0x0a4b01a3, 0x002cc00b,
+ 0x3002ca00, 0x50000000, 0x00000000, 0xa0011c00, 0xb72021cc, 0x487202ce,
+ 0x42871025, 0xc00b3802, 0x18209700, 0x2dec0b7a, 0x021800b3, 0x80a1c20b,
+ 0x7802dc00, 0xb7002dc0, 0x037002dc, 0x00b70029, 0x90087002, 0xdc00b500,
+ 0x21c00b70, 0x025a0187, 0x002dc00b, 0x7002e800, 0x40000000, 0x00000000,
+ 0xa8081e00, 0xf7a230e0, 0x0c7e03de, 0x00c3a035, 0xe00f7803, 0x1e00d780,
+ 0x3d880bc4, 0x039e00f7, 0x8031e00f, 0xf802de00, 0xe7803de0, 0x0f7803de,
+ 0x04f7823d, 0xa00c7a43, 0xde00f780, 0x35e09f78, 0x035600e7, 0x803de00f,
+ 0x7803e802, 0x00000000, 0x00000000, 0x081dac00, 0xfb50bed0, 0x0fb003ec,
+ 0x00fb403a, 0xc00fb00b, 0xe980eb04, 0x3fa00fd8, 0x03fa40fb, 0x003ec00f,
+ 0xb0032c00, 0xeb001ec0, 0x0fb003ec, 0x00fb003c, 0x804fb003, 0xec00fb00,
+ 0x3ec00fb0, 0x03a000fb, 0x003ec00f, 0xb003c206, 0x60000000, 0x00000000,
+ 0x0005fe00, 0xffc033f0, 0x4cf803fe, 0x00ffc033, 0xe00ff803, 0xff00ff80,
+ 0x2fe40af8, 0x037640ff, 0x803fe00f, 0xe807fc40, 0xf78033e0, 0x0ff803fe,
+ 0x00ff803f, 0x202cf983, 0x3e00fe86, 0x33e00fd8, 0x033a00ff, 0x903fe00f,
+ 0xf803f000, 0x70000000, 0x00000000, 0xa8119c00, 0xbf0023c0, 0x087002dc,
+ 0x00bf0021, 0xc00b7002, 0xd040b710, 0x2dd00872, 0x021400b7, 0x082dc00b,
+ 0x70065c00, 0xb70029c0, 0x0b7002dc, 0x00b7002d, 0x0008f103, 0x5c00b400,
+ 0x35c00b54, 0x021000b7, 0x002dc00b, 0x7002ea04, 0x60000000, 0x00000000,
+ 0x00009c00, 0xb70021d0, 0x087002dc, 0x00b70021, 0xc00b7002, 0xd400b700,
+ 0x2d800a20, 0x12dc00b7, 0x002dc00b, 0x7102dc50, 0xbf0821c0, 0x0b7002dc,
+ 0x00b7002d, 0x80087106, 0x1c00b300, 0x21c00b50, 0x025020b7, 0x0229c00b,
+ 0x7002c400, 0x20000000, 0x00000000, 0x2014cc00, 0xb3d020e4, 0x083002cc,
+ 0x00b34020, 0xc00b3002, 0xc000b340, 0x2ec00830, 0x028f01b3, 0xc82cc00b,
+ 0x30024c00, 0xb30028c0, 0x0b3006cc, 0x00b3002c, 0xa418b002, 0x0c04b300,
+ 0x24c00b10, 0x024200b3, 0x002cc00b, 0x3002da04, 0x30000000, 0x00000000,
+ 0xa815ac00, 0xff40b3c0, 0x2cf003fc, 0x00ff08b2, 0xc00bb002, 0xec00fb40,
+ 0x3e401eb5, 0x03ecc1b3, 0x003ec00f, 0x8002ec00, 0xfb0032c0, 0x0fb002ec,
+ 0x00fb002c, 0xa40cf002, 0x2c00b300, 0xb2c00fa0, 0x036a00fb, 0x007ac00f,
+ 0xb003da04, 0x60000000, 0x00000000, 0x8000ec00, 0xf3203ec0, 0x0fb003ec,
+ 0x00f3003e, 0xc04f3013, 0xe800fb31, 0x3f501ff1, 0x137800fb, 0x003e900f,
+ 0xa000ec00, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0x900fb003, 0xec00f940,
+ 0x3ec00f90, 0x0ba820fb, 0x003ec00f, 0xb003e400, 0x30000000, 0x00000000,
+ 0x0110fc00, 0xff0033c0, 0x0cf003fc, 0x00ef0833, 0xc00ff003, 0x3d00ff00,
+ 0x3f400ec0, 0x03fe00ff, 0x0033c00c, 0xcc033c10, 0xf70033c0, 0x0ff003fc,
+ 0x00df003e, 0x400cf003, 0x3c04ef00, 0x33c00fe0, 0x033a80ff, 0x003fc00f,
+ 0xf003e004, 0x30000000, 0x00000000, 0x81046c00, 0xbb0022c0, 0x08b002ec,
+ 0x04bb00a2, 0xc00bb002, 0x2a00bb00, 0x2ec448b5, 0x12ec00bb, 0x00a29808,
+ 0x280a2c00, 0xeb002ac0, 0x0bb002ec, 0x04bb002e, 0x644ab002, 0x2c00bba4,
+ 0x2ac00b18, 0x022800bb, 0x002ec00b, 0xb002e040, 0x10000000, 0x00000000,
+ 0x80052c00, 0xbb0020c0, 0x08b002ec, 0x00ab0022, 0xc00ab002, 0x2420bb00,
+ 0x2ec00ab0, 0x02e464bb, 0x0460480a, 0xa0822c00, 0xbb0022c0, 0x0bb002ec,
+ 0x00bb002e, 0x1008b002, 0x6c00b980, 0x22c01b98, 0x062820bb, 0x002ec00b,
+ 0xb002e000, 0x40000000, 0x00000000, 0x08040c00, 0xb300a0c0, 0x283002cc,
+ 0x00b30020, 0xc00b3002, 0x0000b300, 0x2cc00830, 0x12cc08bb, 0x00280108,
+ 0x20020c00, 0xa30028c0, 0x0b3002cc, 0x00b3002e, 0x000a3002, 0x0c10b100,
+ 0x28c00910, 0x220000b3, 0x002cc00b, 0x3002c201, 0x00000000, 0x00000000,
+ 0x000d6c00, 0xff0033c0, 0x0cb003ec, 0x0cef0032, 0xc00eb003, 0x2000fb00,
+ 0x3cc00ab0, 0x23ec01fb, 0x0032400c, 0xa0032c00, 0xfb0032c0, 0x0fb003ec,
+ 0x00db013e, 0x400cb00b, 0x6c09f900, 0x32c00f90, 0x032810fb, 0x003ec00f,
+ 0xb003e003, 0x50000000, 0x00000000, 0xa01dfc00, 0xff003fc0, 0x0ff003fc,
+ 0x00ff003f, 0xc00ff00b, 0xf000ff00, 0x3fc00ff0, 0x03fc00bf, 0x01370027,
+ 0xe013fc00, 0xff003fc0, 0x0ff003fc, 0x00ff007f, 0x400ff023, 0xfc01fd04,
+ 0x3fc00f50, 0x0bf000ff, 0x003fc00f, 0xf023e802, 0x70000000, 0x00000000,
+ 0xc005fe00, 0xff803fe0, 0x0ff803fe, 0x00ff803f, 0xe00ff853, 0xfc00dd80,
+ 0x33200dc8, 0x03b200ff, 0x80332005, 0xc933f030, 0xc4303350, 0x1ef803f0,
+ 0x80dc8033, 0x4a0cc403, 0x7001cc00, 0x33428cc2, 0x83fc80cc, 0x0033044f,
+ 0xf1033000, 0x70000000, 0x00000000, 0x8000ee00, 0xeb802ee0, 0x0bb802ee,
+ 0x00bb802e, 0xe00bb802, 0xee08e880, 0xa2210888, 0x036200bb, 0x20a00208,
+ 0x0202e1a0, 0xa8702a4c, 0x08b802e0, 0xa088802a, 0x48088002, 0x20a0a800,
+ 0xa2000a84, 0x821cc288, 0x01280808, 0xf616a004, 0x30000000, 0x00000000,
+ 0x0805cc00, 0xb3002cc0, 0x0b3002cc, 0x00b3002c, 0xc00b3002, 0xec00b900,
+ 0x22000980, 0x100010b3, 0x08200888, 0x0010c000, 0x80002040, 0x583002c0,
+ 0xc1980028, 0x0a080402, 0x40808000, 0x2402080a, 0x024c2080, 0x28280009,
+ 0x34020201, 0x70000000, 0x00000000, 0xe015ac00, 0xab002ec0, 0x0bb002ec,
+ 0x00bb002e, 0xc00bb006, 0xec08a880, 0x222008a0, 0x226400b3, 0x0022c418,
+ 0xb002ed10, 0xab0028c8, 0x48b006e6, 0x2088242a, 0x40089882, 0x2220a984,
+ 0x26200ab8, 0x022c0080, 0x8068624a, 0xb002b004, 0x60000000, 0x00000000,
+ 0x0005ec00, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0xc00fb003, 0xec00f9c0,
+ 0x30220d84, 0x232000fb, 0x0132108c, 0x8802e302, 0xc8c03240, 0x08b023e3,
+ 0x08d0203a, 0x0c2c8c03, 0x671088a0, 0x36730c80, 0x036c00c8, 0xa03a308d,
+ 0xb0021004, 0x70000000, 0x00000000, 0xa011bc00, 0xff003fc0, 0x0ff003fc,
+ 0x00ff003f, 0xc00ff003, 0xfe44ff00, 0x3f000ffa, 0x83faa0ff, 0x003f800f,
+ 0xe403f8a0, 0xfca03fe0, 0x2df003d4, 0x00fc093d, 0x400f4003, 0xc400fc04,
+ 0x38400f90, 0x337c00fd, 0x023f000d, 0x7003f800, 0x60000000, 0x00000000,
+ 0xc010ac00, 0xfb003ec0, 0x0db003ec, 0x00fb003e, 0xc00fb003, 0xe880ebc0,
+ 0x32000f90, 0x03ed438b, 0x203e502d, 0x90034502, 0xcb003243, 0x0db003e1,
+ 0x00f84036, 0x040c9583, 0x6414c810, 0x3e500e20, 0x03cc00c8, 0x1832120c,
+ 0xb085b004, 0x20000000, 0x00000000, 0xc8052c00, 0xbb002ec0, 0x0bb002ec,
+ 0x00bb002e, 0xc00bb002, 0xc9008340, 0x2a000b38, 0x03ee008b, 0x407ef808,
+ 0xb9036f20, 0x8b2236d8, 0x0cb003a6, 0x20da0c36, 0x40289803, 0xe6808980,
+ 0x2e640ab0, 0x023d00d9, 0x04367028, 0xfe023200, 0x40000000, 0x00000000,
+ 0xc0040c00, 0xb3002cc0, 0x0b3002cc, 0x00b3002c, 0xc00b3002, 0xcc01a100,
+ 0x20009b00, 0x02c30093, 0x92260208, 0x000e0202, 0x8880a040, 0x023020c2,
+ 0x80a0c020, 0x68090802, 0xc1808981, 0x2c600800, 0x028ec081, 0xc0247500,
+ 0x3402f800, 0x50000000, 0x00000000, 0x60001e00, 0xb7802de0, 0x0b7802de,
+ 0x00b7802d, 0xe00b7802, 0xde2087d0, 0x29200b58, 0x12fe4197, 0x802d6418,
+ 0x58865604, 0x87806560, 0x0a780292, 0x00949025, 0x64095802, 0xd6008580,
+ 0x2d620a69, 0x021e0095, 0x8025e848, 0x79021800, 0x40000000, 0x00000000,
+ 0x48180c00, 0xf3003cc0, 0x0f3003cc, 0x00f3002c, 0xc00f3002, 0xc440e340,
+ 0x20001f35, 0x82c90093, 0x22249008, 0x260228c4, 0xc04222c0, 0x0e3003e4,
+ 0x00e00032, 0x40090202, 0xc002c100, 0x3c400c10, 0x038c00c9, 0x0034402c,
+ 0xb003d202, 0x00000000, 0x00000000, 0x401cbc00, 0xff003fc0, 0x0ff023fc,
+ 0x00ff003f, 0xc00ff103, 0xd4407704, 0x3f000ff0, 0x239c00ef, 0x003bc00e,
+ 0xf003fc50, 0xff00bfc0, 0x0df103fc, 0x40e4063f, 0xc00ed012, 0xbc08ff00,
+ 0x3f400ff0, 0x01bd407f, 0x003fc80f, 0xf4c3d006, 0x60000000, 0x00000000,
+ 0x2815ec00, 0xfb003ec0, 0x0fb007ec, 0x00fb003e, 0xc00fb003, 0xec00f100,
+ 0x76800fa0, 0x07c400eb, 0x003ec004, 0xb0032c00, 0xfb0432c1, 0x0cb003e4,
+ 0x01fa0072, 0x400c980f, 0x2c00cb80, 0x32400cb0, 0x032c40cb, 0x0032400c,
+ 0xb0032a00, 0x70000000, 0x00000000, 0xc8099c00, 0xb7002dc0, 0x0b7002dc,
+ 0x00b7002d, 0xc00b7002, 0xdc00e700, 0x21800b70, 0x06dc00d7, 0x016fc00d,
+ 0xf013dc00, 0xbf0029c0, 0x287012d4, 0x01b7006b, 0xc0187002, 0x3c08df00,
+ 0x37c00ff0, 0x021c018f, 0x0121c108, 0x72123204, 0x60000000, 0x00000000,
+ 0x00009e00, 0xb7802de0, 0x0b7802de, 0x00b7802d, 0xe00b7802, 0xda00bf80,
+ 0x25a04b78, 0x02de0087, 0x802de208, 0x7c025f01, 0xb78021e0, 0x0a7802de,
+ 0x00be8021, 0x60293806, 0x5e088700, 0x61e00a7c, 0x024e0087, 0xc020e008,
+ 0x7a0a3000, 0x20000000, 0x00000000, 0x6804cc00, 0xb3002cc0, 0x0b3002cc,
+ 0x00b3002c, 0xc00b3002, 0xc840a310, 0x20e40b32, 0x02cd009b, 0x042cd229,
+ 0xbc22ce08, 0xb350a8e0, 0x083002cd, 0x00b3a02a, 0xd4283202, 0x2f409305,
+ 0x24f00b3c, 0x0a4c0283, 0x40a0c008, 0x30021204, 0x30000000, 0x00000000,
+ 0xe814a800, 0xfa003e80, 0x0fa003e8, 0x00fa003e, 0x800ba003, 0xfa40fe80,
+ 0x37948fe4, 0x83fa918a, 0x023f900c, 0xe0037b00, 0xfe4032a8, 0x0ea003f8,
+ 0x20f6a433, 0xa00dec03, 0x7a00ce00, 0x33a80cec, 0x436802ce, 0x8033802c,
+ 0xa0033a04, 0x60000000, 0x00000000, 0x4800a000, 0xf8003e00, 0x0f8003e0,
+ 0x00f8003e, 0x000b8003, 0xe000e809, 0x3a000f84, 0x03e080d8, 0x001e100f,
+ 0x8603c000, 0xf8483e00, 0x078003e1, 0x80f8003a, 0x180e8103, 0xe020f810,
+ 0x3e020f82, 0x038000f8, 0x403e000f, 0x8003d200, 0x30000000, 0x00000000,
+ 0x0810a400, 0xf9003e40, 0x0f9003e4, 0x00f9003e, 0x400e9013, 0xe410f900,
+ 0x36400f90, 0x032440c9, 0x9232440e, 0x981326b0, 0xc1103040, 0x3e9017e6,
+ 0x00f98036, 0x400c9843, 0xe600c140, 0x30600c90, 0x032442c1, 0x1820440c,
+ 0x91038204, 0x30000000, 0x00000000, 0x80046400, 0xb9002e40, 0x0b9002e4,
+ 0x00b9002e, 0x400b9002, 0xe400b142, 0x2a400b1c, 0x138780a9, 0x48207248,
+ 0x9492a480, 0x89c82a42, 0x0d9002e4, 0xc0b93022, 0x600a9882, 0xe448f988,
+ 0x32440890, 0x02262089, 0xc02a400d, 0x9c022000, 0x10000000, 0x00000000,
+ 0x18052400, 0xb9002e40, 0x0b9002e4, 0x00b9002e, 0x400b9002, 0xe501b980,
+ 0x22400b91, 0x02241089, 0x0022400a, 0x9102a400, 0x89002244, 0x089002e4,
+ 0x00b90022, 0x44089102, 0xe5008900, 0x22500010, 0x0a240089, 0x002a4008,
+ 0x10028600, 0x40000000, 0x00000000, 0x08040400, 0xb1002c40, 0x0b1002c4,
+ 0x00b1002c, 0x400b1002, 0xc400b904, 0x28400b90, 0x228400a1, 0x10224408,
+ 0x110a0446, 0x81102844, 0x491002c4, 0x50b90060, 0xc40a1102, 0xc440a110,
+ 0x20442811, 0x02044081, 0x1028c409, 0x11020201, 0x00000000, 0x00000000,
+ 0x381d6000, 0xf8003e00, 0x0f8003e0, 0x00f8002e, 0x000f8003, 0xe000fa00,
+ 0x32004fa0, 0x43200188, 0x40b2100e, 0x840ba1a2, 0xc86cb01a, 0x288002e1,
+ 0xa0f800b2, 0x1b0c8683, 0xe1a08869, 0x321a0c86, 0x8321a0ca, 0x683a1a0c,
+ 0x26838e03, 0x50000000, 0x00000000, 0xb81de400, 0xf9003e40, 0x0f9003e4,
+ 0x00f9003e, 0x400f9003, 0xf500fd00, 0x3b400fd0, 0x03b40079, 0x203f4889,
+ 0xd200f490, 0xff20bf48, 0x8f9003f4, 0x80f5003b, 0x488fd201, 0xf480fd20,
+ 0x3b480ff2, 0x03e480fd, 0x203f480f, 0x9203e606, 0x70000000, 0x00000000,
+ 0x3805e400, 0xf9003e40, 0x0f9003e4, 0x00f9003e, 0x400f9003, 0xf480fd00,
+ 0x1e408bd0, 0x03d400ed, 0x0433440f, 0xd003b400, 0xc510b348, 0x0c9003f4,
+ 0x00f50033, 0x400fd003, 0x7480fd29, 0x33400390, 0x033400dd, 0x1033c80d,
+ 0xd2830600, 0x70000000, 0x00000000, 0x1800a000, 0xb8002e00, 0x0b8003a0,
+ 0x00b8003a, 0x000b8002, 0xe040b800, 0x2e000b80, 0x02e000e8, 0x20a2080f,
+ 0x00872020, 0xd810200a, 0x088002e0, 0x00b804b6, 0x008b8002, 0x2000e820,
+ 0x2a000b84, 0x82002088, 0x10228a08, 0x82020e04, 0x30000000, 0x00000000,
+ 0x48048400, 0xb1002c40, 0x0b1002c4, 0x00b1002c, 0x400b1002, 0xc400b100,
+ 0x2c400b10, 0x02c400b1, 0x29a0480b, 0x12020441, 0x8100204c, 0x081002c4,
+ 0x00a90060, 0x408b1042, 0x4440b128, 0x20410b13, 0x0a044091, 0x00244c19,
+ 0x12820201, 0x70000000, 0x00000000, 0x1814a400, 0xb9002e40, 0x0b9002a4,
+ 0x00b9002a, 0x400b9002, 0xe500b900, 0x2e400bb0, 0x02e410b9, 0x0022400a,
+ 0x31122505, 0x9b022240, 0x089002e4, 0x40b91026, 0x400b9002, 0x2444bb0a,
+ 0x2a480b90, 0x02240089, 0x06264009, 0x90020604, 0x60000000, 0x00000000,
+ 0xa004a400, 0xf9003e40, 0x0f9003e4, 0x00f9003e, 0x400f9003, 0xe400f900,
+ 0x3e580b96, 0x03e780f9, 0x0232620b, 0x9a0a0400, 0xc9903264, 0x2c9037e4,
+ 0x20e90032, 0x660f9a43, 0x6600f9c0, 0xb2480f90, 0x032400d9, 0x10b6700d,
+ 0x90032804, 0x70000000, 0x00000000, 0xe810a400, 0xf9003e40, 0x0f9003e4,
+ 0x00f9003e, 0x400f9003, 0xe640f940, 0x3e400f9a, 0x03e520e9, 0x00364a8f,
+ 0x9803a680, 0xf900be40, 0x0f9003e6, 0x20f9003e, 0x600f9203, 0xe400e110,
+ 0x3e400f9a, 0x03e400f1, 0x003a484e, 0x900bea00, 0x60000000, 0x00000000,
+ 0x2810a000, 0xf8003e00, 0x0f8003e0, 0x00f8003e, 0x000f8003, 0xe120f800,
+ 0x3e008f84, 0x03e01088, 0x002a040f, 0x80016004, 0xe020b209, 0x0c8003e0,
+ 0x00d8103a, 0x080c8c03, 0x2000c848, 0x32122c00, 0x02609048, 0x1832084d,
+ 0x800b0a04, 0x20000000, 0x00000000, 0x08042800, 0xba002e80, 0x0ba002e8,
+ 0x00ba002e, 0x800ba002, 0xf808be40, 0x2e800be9, 0x02fa242e, 0xc82f908e,
+ 0xe403b900, 0x8e487780, 0x0da002f9, 0x04868023, 0x9288e80b, 0x7900ae80,
+ 0x2ba008a0, 0x033a008e, 0x81379008, 0xe00a0a00, 0x40000000, 0x00000000,
+ 0x08054c00, 0xb3002cc0, 0x0b30028c, 0x00b3002c, 0xc00b3002, 0xcd00b320,
+ 0x0cc00b34, 0x02cd008b, 0xca28d01a, 0x3a120ec0, 0xb30322e4, 0x883002cf,
+ 0x0183802c, 0xe029b002, 0x0f608300, 0x20e00830, 0x022d4083, 0x4022c008,
+ 0xb0020a00, 0x50000000, 0x00000000, 0x20011c00, 0xb7002dc0, 0x0b7002dc,
+ 0x00b7002d, 0xc00b7002, 0xdc00b508, 0x2dc00b74, 0x06fe00a7, 0x002fe058,
+ 0x70828c00, 0xb70025c0, 0x097002d7, 0x008c0027, 0x61097402, 0x0e00a309,
+ 0x29620832, 0x021c0083, 0x0025c028, 0x50022800, 0x40000000, 0x00000000,
+ 0x28181e00, 0xf7803de0, 0x0f78039e, 0x00f7803d, 0xe00f7803, 0xde00b580,
+ 0x2de04f78, 0x02de0087, 0x8039e00e, 0x78031e02, 0xf780a1e1, 0x0c7801fe,
+ 0x02c4802d, 0xe00df822, 0x1e10c783, 0x33e00c7c, 0x0b1e02c7, 0x8033600c,
+ 0x38032a02, 0x00000000, 0x00000000, 0x081dac00, 0xfb003ec0, 0x0fb003ec,
+ 0x00fb003e, 0xc00fb003, 0xec00f804, 0x3ec00fa0, 0x03e400b9, 0x023c804f,
+ 0x8003ac00, 0xcb003e80, 0x0fb003e0, 0x00e80038, 0x404c9013, 0xe404fb02,
+ 0x3e000fb2, 0x43ac00fb, 0x003e800e, 0xa003c206, 0x60000000, 0x00000000,
+ 0x6004be00, 0xff803fe0, 0x0ff803fe, 0x00ff803f, 0xe00ff803, 0xfe00c580,
+ 0x17e00f78, 0x033e08ff, 0x803be00c, 0xf2037e02, 0x4f8437e0, 0x84f803fe,
+ 0x10ff8033, 0xe00ed813, 0xf6402fa0, 0x33ec0cfc, 0x033e01ff, 0x80b3a08f,
+ 0xf8030000, 0x70000000, 0x00000000, 0xa8009c00, 0xb7002dc0, 0x0b70039c,
+ 0x00b7002d, 0xc00b7002, 0xdc10d540, 0x35c04351, 0x03dd00f7, 0x002d5a8d,
+ 0x7003f400, 0xc7002bc0, 0x2a7002d4, 0x00b400b5, 0x02084202, 0xf4e0dd20,
+ 0x2b444871, 0x061800b6, 0x2421c80b, 0x51022a04, 0x60000000, 0x00000000,
+ 0x00009c00, 0xb7002dc0, 0x0b7002dc, 0x00b7002d, 0xc00b7002, 0xd8008d00,
+ 0x21c00b70, 0x021820b6, 0x0029c089, 0xf1821820, 0xb1102544, 0x0a7002d4,
+ 0x00a40029, 0x440b5006, 0xd0018436, 0x21480870, 0x021400b5, 0x0121008b,
+ 0x70020000, 0x20000000, 0x00000000, 0x40148c00, 0xb3002cc0, 0x0b30028c,
+ 0x00b3002c, 0xc00b3002, 0xc8109040, 0x24c00b0c, 0x024100a0, 0x040c1009,
+ 0x0c02e204, 0xa1882a20, 0x48300243, 0x40b0802c, 0x20090402, 0xe2002000,
+ 0x083c08b8, 0x002000b0, 0x4022b00b, 0x20720804, 0x30000000, 0x00000000,
+ 0x2805ac00, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0xc00bb003, 0xec00c1c8,
+ 0x12c40fbe, 0x532d00bb, 0x003ad06d, 0x3d222e00, 0xbb0036e2, 0x0ab003e5,
+ 0x40f2303a, 0x640f9a01, 0xe70289c8, 0x22502cf8, 0x8b2c00fb, 0xc832c80f,
+ 0xa00b2a04, 0x60000000, 0x00000000, 0xa010ec00, 0xfb003ec0, 0x0fb003ac,
+ 0x00fb003e, 0xc00fb003, 0xe004f900, 0x3ec00fb4, 0xc3e9287a, 0x013ec00f,
+ 0xb447a880, 0xd9103e40, 0x0bb003e4, 0x00f84036, 0x500e9083, 0xe424d960,
+ 0x3e500fb0, 0x83e500f9, 0x603e400f, 0x9003e000, 0x30000000, 0x00000000,
+ 0x0110fc00, 0xff003fc0, 0x0ff003fc, 0x00ff003f, 0xc00ef003, 0xdd00cd08,
+ 0x3fc00fd4, 0x037c80ff, 0x9233420f, 0xf1037604, 0xce0233c0, 0x8cf01554,
+ 0x00ce4030, 0x400cc013, 0xf402c400, 0x31400cf0, 0x003800ce, 0x803f424c,
+ 0x8c0b0044, 0x30000000, 0x00000000, 0x81046c00, 0xbb002ec0, 0x0bb002ec,
+ 0x00bb0026, 0xc00bb002, 0xe300a8c0, 0x22c00b04, 0x02a30198, 0xc862000b,
+ 0x8c42a208, 0xd0802206, 0x0eb01363, 0x2088882a, 0x60888802, 0xe68888c0,
+ 0x36380ab0, 0x02224088, 0x802e2408, 0x88022040, 0x10000000, 0x00000000,
+ 0x80056c00, 0xbb002ec0, 0x0bb002ec, 0x00bb002e, 0xc00bb002, 0xec208880,
+ 0x2ec00ba0, 0x022400b1, 0x0022840b, 0x80022d84, 0x8b802280, 0x08b002e2,
+ 0x008a0022, 0x700898e2, 0xe6008984, 0x2a6108b0, 0x22ec208b, 0x182e8088,
+ 0x24022000, 0x40000000, 0x00000000, 0x08000c00, 0xb3002cc0, 0x0b3002cc,
+ 0x00b3002c, 0xc00b3002, 0xc000a800, 0xe8c00b00, 0x020001b0, 0x00200019,
+ 0x80028001, 0x9100a000, 0x0b300280, 0x02880028, 0x00080002, 0xc4008100,
+ 0x24400a30, 0x02c00080, 0x002c4000, 0x10120201, 0x00000000, 0x00000000,
+ 0x00186c00, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0xc00fb003, 0xe800c804,
+ 0x3ec00b80, 0x032000b8, 0x00a0000f, 0x80072000, 0xc9013200, 0x0cb002e0,
+ 0x00c80032, 0x40048013, 0xe002c800, 0x7a400c70, 0x0be002c0, 0x003e002c,
+ 0x80030003, 0x50000000, 0x00000000, 0xa01dfc00, 0xff003fc0, 0x0ff003fc,
+ 0x00ff0037, 0xc00ff013, 0xd000fc00, 0x37c10fc0, 0x03f000dc, 0x003f000f,
+ 0x4003b001, 0xbd013f00, 0x1ef00370, 0x00f4003f, 0x408fc003, 0xf400fc00,
+ 0x3f400ff0, 0x033000fc, 0x003f000f, 0xc003e806, 0x70000000, 0x00000000,
+ 0xc005fe00, 0xff803fe4, 0x0cc4033c, 0x80ff803f, 0xe00df803, 0x74a0ff80,
+ 0x3bc00df8, 0x077e00ff, 0x803fe00f, 0xf803be00, 0xff803f48, 0x0cf0033e,
+ 0x00ff113f, 0xe10ff003, 0x3200dc80, 0x73204fc8, 0x23d200ff, 0x803fe00f,
+ 0xf803f000, 0x70000000, 0x00000000, 0xc010ee00, 0xbb802ec8, 0x0882122e,
+ 0x00bb802e, 0xe10bb202, 0x2704bb82, 0x2ff008b8, 0x12ee00bb, 0x822ee00b,
+ 0xb8026e00, 0xbb802c8a, 0x0fa082ae, 0x00bf622e, 0xc10bb802, 0x2a00d880,
+ 0x36e00b88, 0x02e200bb, 0x802ee00b, 0xb802f004, 0x30000000, 0x00000000,
+ 0xc800cc00, 0xb3002cc0, 0x0802020c, 0x40b30028, 0xc1493092, 0x4c10b300,
+ 0x2cd00930, 0x02cc00a3, 0x002cc00b, 0x3002cc00, 0xb3002ccc, 0x0a31020c,
+ 0x00b3402c, 0xc00a0002, 0x2000a800, 0x20c00b00, 0x02c000a3, 0x002cc00b,
+ 0x3002f201, 0x70000000, 0x00000000, 0xc015ac00, 0xbb002ec0, 0x0810022c,
+ 0x00bb002e, 0xc00bb002, 0x2c40bb00, 0x0ec019b0, 0x42ec009b, 0x002ec00b,
+ 0xb0026c00, 0xbb002ec8, 0x0a3402ac, 0x00bb042e, 0xc00b8182, 0x2a249800,
+ 0x26400b98, 0x20e220bb, 0x002ec00b, 0xb002f004, 0x60000000, 0x00000000,
+ 0x4015ec00, 0xfb003ec0, 0x0cae0b2c, 0x00fb003e, 0xc00db013, 0x6c10bb01,
+ 0x3ac00db0, 0x12ec10fb, 0x003ec10f, 0xb003ac00, 0xfb007ec8, 0x0ab5032c,
+ 0x00fb003e, 0xc00f6c0b, 0x2200e0c8, 0x22340f8a, 0x03e300fb, 0x003ec00f,
+ 0xb003f004, 0x70000000, 0x00000000, 0xa001bc00, 0xff003fc0, 0x0ff903fc,
+ 0x00ff005f, 0xc00ff001, 0xfc007f00, 0x3dc00af0, 0x03fc00ff, 0x003fc00f,
+ 0xf003fc00, 0xff013de0, 0x0fd003fc, 0x08ff0037, 0xc00ba803, 0xf800fc48,
+ 0x3fe00fd0, 0x03f420ff, 0x003fc00f, 0xf003e800, 0x60000000, 0x00000000,
+ 0xc410ac00, 0xfb003ac0, 0x0ca403ec, 0x00fb003a, 0xc00eb203, 0xec00fb00,
+ 0x3ac00fb0, 0x03ec14fb, 0x043ec00f, 0xb0036c00, 0xfb003ed0, 0x0db6032c,
+ 0x00fb003e, 0xc00f8c0b, 0x2200c842, 0x32d20c80, 0x03e500db, 0x003ec00f,
+ 0xb003f004, 0x20000000, 0x00000000, 0xd8052c00, 0xbb002ec0, 0x08b0023c,
+ 0x00bb002e, 0xc00bbc02, 0xec00bb00, 0x2fc008b0, 0x02ec10bb, 0x002ec00b,
+ 0xb002ec00, 0xbb002ee8, 0x05b8036c, 0x00bf003a, 0xc00f8002, 0x8a10a800,
+ 0xa2d02898, 0x0265008b, 0x002ec00b, 0xb002f000, 0x40000000, 0x00000000,
+ 0xe0054c00, 0xb3002ec0, 0x0800024c, 0x00b30028, 0xc00ab002, 0x4400b300,
+ 0x64c04a30, 0x020c0093, 0x002cc00b, 0x3002cc00, 0x93002cd8, 0x0031060c,
+ 0x08b3002c, 0xc00b048a, 0x01208010, 0x20800800, 0x02c00093, 0x002cc00b,
+ 0x3002fa00, 0x50000000, 0x00000000, 0xf0011e00, 0xb7802de0, 0x0818021e,
+ 0x01b7802d, 0xe00b7802, 0xd600b780, 0x6ce00878, 0x02de00b7, 0x802de00b,
+ 0x7802de00, 0xb7800de0, 0x0938025e, 0x00b78029, 0xe00b4802, 0xb250ac90,
+ 0x21a10849, 0x12760087, 0x802de00b, 0x7806fc00, 0x40000000, 0x00000000,
+ 0x48080c00, 0xf3003ac0, 0x0c0003cc, 0x00f30038, 0xc00e3183, 0xc400f310,
+ 0x34c04e32, 0x07cc4093, 0x002cc00f, 0x3002cc00, 0x93003cc0, 0x4c30070c,
+ 0x40f3003c, 0xc00f3003, 0x0400c210, 0x30d4cc10, 0x83c400d3, 0x003cc00f,
+ 0x3003d202, 0x00000000, 0x00000000, 0x400dbc40, 0xff003fc0, 0x0ff103fc,
+ 0x00ff003f, 0xc00ff003, 0xfc00ff01, 0x7fc00ef0, 0x03fc11ff, 0x003fc00f,
+ 0xf003fc00, 0xff003fc0, 0x0ff007fc, 0x11ff023b, 0xc00ef103, 0xdc00f650,
+ 0x3d045ff0, 0x03f444ff, 0x003fc00f, 0xf003d006, 0x60000000, 0x00000000,
+ 0xa805ec00, 0xfb007ec0, 0x0fa2032c, 0x40fb003e, 0xc00fb003, 0xe400fb00,
+ 0x3ecc0fb0, 0x03ec01eb, 0x007ac00f, 0xb003ec00, 0xfb003ec0, 0x0cb003ac,
+ 0x08fb783e, 0xc00e9003, 0x2000e961, 0x32930f98, 0x032000fb, 0x003ec00f,
+ 0xb003ea00, 0x70000000, 0x00000000, 0xc8119c00, 0xb7006dc0, 0x0b70821c,
+ 0x00b7002d, 0xc00b7006, 0xdc00b700, 0x2dc2cb70, 0x02dc00b7, 0x002dc00b,
+ 0x7016dc00, 0xb7002fc0, 0x0af0029c, 0x10b7202d, 0xc00b1002, 0x1000d500,
+ 0x35c00b70, 0x021c00b7, 0x002dc00b, 0x7002f024, 0x60000000, 0x00000000,
+ 0x80009e00, 0xb78029e0, 0xcb68c21e, 0x80b7802d, 0xe00b7802, 0xd600b780,
+ 0x2de10b78, 0x02de00b7, 0x822de0cb, 0x7822de00, 0xb7802de2, 0x0878021e,
+ 0x00b7802d, 0xe10a780a, 0x1200a480, 0x21e08b58, 0x021600b7, 0x822de00b,
+ 0x7802e000, 0x20000000, 0x00000000, 0x4814cc00, 0xb3002cc0, 0x0b30020c,
+ 0x00b3002c, 0xc10b3002, 0xce00b302, 0x2cc00b30, 0x02cc00b3, 0x0024c00b,
+ 0x3002cc00, 0xb3002cd0, 0x4a39028c, 0x00bb002e, 0xc00b3402, 0x08009000,
+ 0x04c00b3a, 0x020e00b3, 0x002cc00b, 0x3002d204, 0x30000000, 0x00000000,
+ 0xe815a800, 0xfa003e80, 0x0fac0b28, 0x00fa003e, 0x800fa003, 0xea80ba04,
+ 0x3e800fa0, 0x02e804fa, 0x003e800f, 0xa003e800, 0xfa003fa0, 0x08e00328,
+ 0x04ba002e, 0x800e610b, 0x3900ee0b, 0x12840fe8, 0x033b80fa, 0x023e800f,
+ 0xa003fa04, 0x60000000, 0x00000000, 0x4800e000, 0xf8003e00, 0x0f8083e0,
+ 0x00f8003e, 0x000f8003, 0xe000f800, 0x1e000b80, 0x03e004f8, 0x001e000f,
+ 0x8003e000, 0xf8003e12, 0x0f8083e0, 0x00f8001e, 0x000f8003, 0xd100fc40,
+ 0x3e040f81, 0x0be100f8, 0x003e000f, 0x8003d200, 0x30000000, 0x00000000,
+ 0x0810e408, 0xf9003e40, 0x0fb00304, 0x00c9003e, 0x400f9403, 0x4400c900,
+ 0x3e400f90, 0x43e400d9, 0x003e400f, 0x9003e400, 0xf9003c40, 0x0e140364,
+ 0x00f90036, 0x400c9003, 0x2520c909, 0x32d09f91, 0x03e720f9, 0x003e400f,
+ 0x9003c204, 0x30000000, 0x00000000, 0x80046400, 0xb9002e40, 0x0b900224,
+ 0x0089002e, 0x400b9402, 0xe4008900, 0x2e400f90, 0x03e40039, 0x002e400b,
+ 0x9002e400, 0xb9002e60, 0x08980224, 0x04b9012a, 0x40089002, 0x2720a1a0,
+ 0x2a700b90, 0x026700b9, 0x002e400b, 0x9002e000, 0x10000000, 0x00000000,
+ 0x18052400, 0xb9002e40, 0x0b100a24, 0x0089002e, 0x400b9402, 0xe4008900,
+ 0x2e400b90, 0x02e400b9, 0x002e400b, 0x9002e400, 0x99002e54, 0x0a908264,
+ 0x00b90022, 0x40089002, 0x24008d20, 0x22400b90, 0x82e400b9, 0x002a400b,
+ 0x9002c600, 0x40000000, 0x00000000, 0x08040400, 0xb1002c44, 0x0b110204,
+ 0x0281002c, 0x400b1106, 0xc4018100, 0x2c400b10, 0x32c400b1, 0x002c400b,
+ 0x1002c400, 0xb1002c44, 0x08110204, 0x00b11028, 0x44081282, 0x3400a500,
+ 0x28c00b10, 0x024c00b1, 0x002c400b, 0x1002c201, 0x00000000, 0x00000000,
+ 0x380d6000, 0xf8003e10, 0x0f068320, 0xa088002e, 0x000f8403, 0xe0a2c800,
+ 0x3e0a0f80, 0x03e000f8, 0x003e000f, 0x8003e000, 0xd8003e1a, 0x0e868360,
+ 0x00f86a32, 0x102c8a0b, 0x2000cc00, 0x32000b80, 0x03e000f8, 0x003a000f,
+ 0x8003ce03, 0x10000000, 0x00000000, 0x981de400, 0xf9003e48, 0x0f9203e4,
+ 0x00f9003e, 0x400f9203, 0xf400f900, 0x3e400e90, 0x03a400f9, 0x003e400f,
+ 0x9003e400, 0xf9003f48, 0x0fd203e4, 0x00f9203a, 0x480fd003, 0xd400f502,
+ 0x3e400f50, 0x23fc00f9, 0x003e400f, 0x9003e607, 0x60000000, 0x00000000,
+ 0x1805e400, 0xf9003e40, 0x0f900324, 0x00f9003e, 0x400fd003, 0x2480f900,
+ 0x3e400f90, 0x07a400f9, 0x003e400f, 0x9003e400, 0xf9003f40, 0x0fd00364,
+ 0x00f90032, 0x400fd803, 0x7400c501, 0x03408f90, 0x03f400c9, 0x003e400f,
+ 0x9003c600, 0x70000000, 0x00000000, 0x3810e000, 0xb8002e00, 0x0b800220,
+ 0x00b8002e, 0x000b820a, 0x2040b801, 0x2e000b80, 0x12e000b8, 0x002e000b,
+ 0x8002e000, 0xb8002e00, 0x088002e0, 0x08b80036, 0x2a0b8002, 0x20028c00,
+ 0x36000b80, 0x00e00288, 0x002e000b, 0x8002de04, 0x30000000, 0x00000000,
+ 0x4805c400, 0xb1002c40, 0x0b100204, 0x00b1002c, 0x400b1282, 0x0400b102,
+ 0x2c440b10, 0x028400b1, 0x002c400b, 0x1002c400, 0xb1002c40, 0x091002c4,
+ 0x08b10020, 0x400b1402, 0x74008d01, 0x28401b10, 0x00cc0081, 0x002c400b,
+ 0x1002d201, 0x50000000, 0x00000000, 0x1815a400, 0xb9002e40, 0x0b908224,
+ 0x00b9002e, 0x400b1042, 0x2480b900, 0x2e400b90, 0x12e400b9, 0x002e400b,
+ 0x9002e400, 0xb9002ed0, 0x089002e4, 0x00b10026, 0x400bb422, 0x2d408d00,
+ 0x26421b95, 0x02e40009, 0x002e400b, 0x9002c604, 0x60000000, 0x00000000,
+ 0xa011e400, 0xf9003e40, 0x0f9c0b24, 0x00f9003e, 0x400f9003, 0x2600f900,
+ 0x3e410f90, 0x03a400f9, 0x003e400f, 0x9002e400, 0xf9003e70, 0x0d9e02e4,
+ 0x00b90132, 0x40071003, 0x6400c9b0, 0x3a400f94, 0x23c400c9, 0x003e400f,
+ 0x9003e804, 0x70000000, 0x00000000, 0xe801a400, 0xf9003e40, 0x0f9103e4,
+ 0x00f9003e, 0x400f9003, 0xe400f904, 0x3e400f90, 0x03e400f9, 0x003e400f,
+ 0x9003e400, 0xf9003e70, 0x0d9c03e4, 0x00f9003e, 0x400b9c03, 0xe400f980,
+ 0x3e640fb0, 0x03e400f9, 0x003e400f, 0x9003fa00, 0x60000000, 0x00000000,
+ 0x2810a000, 0xf8003e00, 0x0f800360, 0x00f8003e, 0x000f8003, 0x2000e800,
+ 0x3e000f80, 0x03e018f8, 0x003e000f, 0x8003e000, 0xf8003c18, 0x0e8603e0,
+ 0x08f80032, 0x010f8703, 0x31049c08, 0x32040c80, 0x83e000c8, 0x003e000f,
+ 0x8003ca04, 0x20000000, 0x00000000, 0x28052800, 0xba002e80, 0x0ba00b28,
+ 0x00ba002e, 0x800be402, 0x28088a00, 0x0e800ba0, 0x02e800ba, 0x002e800b,
+ 0xa003a800, 0xba002fb0, 0x08ee02e8, 0x00ba002a, 0x800be402, 0x99408680,
+ 0x2ba008ac, 0x12f800da, 0x002e800b, 0xa002ca00, 0x40000000, 0x00000000,
+ 0x28054c01, 0xb3002cc0, 0x0bb0020c, 0x00b3002c, 0xc00b3882, 0x0c00a300,
+ 0x2cc00b30, 0x22cc00b3, 0x002cc00b, 0x3002cc00, 0xb3002cc0, 0x0a3402cc,
+ 0x00b30020, 0xc00b3002, 0x08089000, 0x60c0093d, 0x06cc00a3, 0x002cc00b,
+ 0x3002ca00, 0x50000000, 0x00000000, 0xa0011c00, 0xb7002dc4, 0x0b73021c,
+ 0x00b7002d, 0xc00b7402, 0x0e008700, 0x2dc00b70, 0x02dc04b7, 0x002dc00b,
+ 0x70029c00, 0xb7002dd0, 0x087002dc, 0x10b32029, 0xc00b7002, 0x99008408,
+ 0x2ba02970, 0x02dc00b7, 0x002dc00b, 0x7002e800, 0x40000000, 0x00000000,
+ 0xa8081e00, 0xf7803de0, 0x0f3a031e, 0x00f7803d, 0xe00fd80b, 0x1e00e780,
+ 0x2de01f78, 0x03de00f7, 0x803de14f, 0x7843de00, 0xf7803fe0, 0x0e7823de,
+ 0x10f78031, 0xe00b3803, 0x1200d494, 0x31e08d78, 0x83de00e7, 0x803de00f,
+ 0x7803ea02, 0x00000000, 0x00000000, 0x081dac00, 0xfb003ec0, 0x0fb403ec,
+ 0x00fb003e, 0xc00fb003, 0xec00fb00, 0x3ec00fb0, 0x03ec00fb, 0x003ec00f,
+ 0xb003ac00, 0xfb003ec0, 0x0fb003ec, 0x00fb603e, 0xc00fb003, 0xc810f840,
+ 0x3c800e92, 0x03c800db, 0x043ec00f, 0xb003c206, 0x60000000, 0x00000000,
+ 0x0005fe00, 0xff803fe0, 0x0ffc033e, 0x00cf803f, 0xe00fe803, 0x7e00ff80,
+ 0x3be00ff8, 0x03fe00ff, 0x907fe40f, 0xf103fe00, 0xff803fe0, 0x0ff803fe,
+ 0x00ffc833, 0xe00fd803, 0x3200c490, 0x33604ff8, 0x23fe00ff, 0x803fe00f,
+ 0xf803c000, 0x70000000, 0x00000000, 0xa8111c00, 0xb7002dc0, 0x0bf0021c,
+ 0x0087002d, 0xc00b7002, 0x1c40b710, 0x2dc10b71, 0x02dc00b7, 0x0039c40b,
+ 0x7002dc00, 0xb7002dc0, 0x0b7002dc, 0x40b70035, 0xc00b7002, 0x1000d432,
+ 0x35084b70, 0x00dc40b7, 0x002dc00b, 0x7002ea04, 0x60000000, 0x00000000,
+ 0x00009c00, 0xb7002dc0, 0x0b70821c, 0x0087002d, 0xc00b4002, 0x5c00b700,
+ 0x2dc00b70, 0x029c00b7, 0x046dc08b, 0x7106dc00, 0xb7002dc2, 0x0b7002dc,
+ 0x00b30021, 0xc00b5102, 0x2000a403, 0x61408b70, 0x82d400b7, 0x002dc00b,
+ 0x7002c000, 0x20000000, 0x00000000, 0x2014cc00, 0xb3002cc0, 0x0b34020c,
+ 0x0083002c, 0xc00b3002, 0x0c00b302, 0x2cc00b30, 0x02cc10b3, 0x0168c00b,
+ 0x3002cc00, 0xb3002cd2, 0x0b3402cc, 0x00b30026, 0xc00b300a, 0x01009010,
+ 0x24300b38, 0x82c100b3, 0x002cc00b, 0x3002c804, 0x10000000, 0x00000000,
+ 0xa815ac00, 0xfb002fc0, 0x0ff80b2c, 0x02cb003e, 0xc00bb003, 0x6e80fb00,
+ 0x3ac00fb0, 0x03ac00fb, 0x003ec00f, 0xb003ec00, 0xbb003ed0, 0x0fba01ec,
+ 0x00bf0033, 0xc00f900b, 0x2a802810, 0x22e20fb0, 0x03e108bb, 0x003ec00f,
+ 0xb003ea04, 0x60000000, 0x00000000, 0x8000ec00, 0xfb003ec0, 0x0f3083ec,
+ 0x00fb003e, 0xc00fb413, 0xec00fb01, 0x36c00fb0, 0x33ec00fb, 0x003ac00f,
+ 0xb003ec00, 0xfb003ed0, 0xcfb483ec, 0x00fb003e, 0xc00f1403, 0xe808f840,
+ 0x3ec00fb4, 0x03e700fb, 0x003ec00f, 0xb003e000, 0x30000000, 0x00000000,
+ 0x0110fc00, 0xff001fc0, 0x0ff0032c, 0x00ff003f, 0xc00fc903, 0xfc00ff00,
+ 0x3fc00ff0, 0x03fc00df, 0x003fc00f, 0xf003fc00, 0xff003fe4, 0x0ff003fc,
+ 0x00ff003f, 0xc00c9003, 0x3028ce10, 0x33020ce0, 0x01b320ff, 0x003fc00f,
+ 0xf003c044, 0x30000000, 0x00000000, 0x80046c00, 0xbb002ec0, 0x0bb0022c,
+ 0x00bb002e, 0xc00ba002, 0xec00bb00, 0x3ec04bb0, 0x12ec00bb, 0x002ec00b,
+ 0xb003ac00, 0xbb002e80, 0x0bbe02ec, 0x00bb002f, 0xc00a9c0a, 0x0b00a262,
+ 0x20108a04, 0x22a300bb, 0x002ec00b, 0xb002e000, 0x10000000, 0x00000000,
+ 0x80052c00, 0xbb002ec0, 0x0bb0026c, 0x00bb002e, 0xc00b8082, 0xec00bb00,
+ 0x2ec00bb0, 0x02ec09bb, 0x002ec00b, 0xb002ec00, 0xbb002ec0, 0x0bb102ec,
+ 0x00bb002e, 0xc0089802, 0x2e009900, 0x22e288a4, 0x066820bb, 0x002ec00b,
+ 0xb002e000, 0x40000000, 0x00000000, 0x08040c00, 0xb3002cc0, 0x0b300a4c,
+ 0x00b3002c, 0xc00b1002, 0xcc00b300, 0x2cc00b30, 0x02cc00b3, 0x002cc00b,
+ 0x30028c00, 0xb3002cc0, 0x0b3002cc, 0x00b3002c, 0xc00a0012, 0x2c00a900,
+ 0x20c00aa0, 0x22cc00b3, 0x002cc00b, 0x3002c201, 0x00000000, 0x00000000,
+ 0x000d6c00, 0xfb003ec0, 0x0ff0026c, 0x00fb003e, 0xc00f0003, 0xec00fb00,
+ 0x2ec00fb0, 0x57ec00db, 0x003ec00f, 0xb003ec00, 0xfb003ec0, 0x0fb003ec,
+ 0x00ff003e, 0xc00c9003, 0x2000d800, 0x32000ca0, 0x136009fb, 0x003ec00f,
+ 0xb003c003, 0x50000000, 0x00000000, 0xa00dfc00, 0xff003fc0, 0x0ff003bc,
+ 0x00ff003f, 0xc007c003, 0xfc00ff00, 0x3bc00ff0, 0x07fc00ff, 0x003fc00f,
+ 0xf003fc00, 0xff003f40, 0x0fc003fc, 0x00ff003f, 0xc00fc003, 0xf801fc00,
+ 0xbf000fe0, 0x03b000ff, 0x043fc00f, 0xf003e806, 0x70000000, 0x00000000,
+ 0xc005fe00, 0xff803fe0, 0x0ff803fe, 0x00ff803f, 0xe00ff803, 0xf2004c80,
+ 0x332047c8, 0x023308b4, 0x803d200f, 0xcc037240, 0xcc903724, 0x0ff803fe,
+ 0x00f48433, 0xe00ff903, 0xf000cc00, 0x33000cc0, 0x63fc80fd, 0x8033080d,
+ 0x5c037000, 0x50000000, 0x00000000, 0x8010ee00, 0xbb802ee0, 0x0bb802ee,
+ 0x00bb802e, 0xe00bb802, 0xe6008880, 0x36208bb0, 0x436c00bb, 0x802ee08b,
+ 0x30002c95, 0x8320a2c8, 0x0bb803ae, 0x00b88022, 0xc00bb023, 0xa010a800,
+ 0x2a000a88, 0x223d40bb, 0x21223448, 0xb002a004, 0x30000000, 0x00000000,
+ 0x0805cc00, 0xb3002cc0, 0x0b30028c, 0x00b30028, 0xc00b3002, 0xa4008002,
+ 0x2c200b32, 0xe2cc80a3, 0x002cc10b, 0x32100c08, 0x830020c1, 0x0b3002cc,
+ 0x00b000a8, 0xc00b3222, 0xc000a000, 0x20000900, 0x428c00b9, 0x89a0004b,
+ 0x1242c201, 0x70000000, 0x00000000, 0xc015ac00, 0xbb002ec0, 0x0bb002ec,
+ 0x00bb002e, 0xc00bb002, 0xef028b20, 0x2e000b84, 0x02ec80b9, 0x006ec50b,
+ 0x36020c00, 0x8a002208, 0x0bb002ec, 0x00b88022, 0xc00bb002, 0xa210a880,
+ 0x2a200b88, 0x462c10ba, 0x0022cb02, 0xb102b004, 0x60000000, 0x00000000,
+ 0x4015ec00, 0xfb003ec0, 0x0fb003ec, 0x00fb003a, 0xc00fb013, 0xe300c001,
+ 0x3e004f10, 0x03af00eb, 0x083ef20f, 0xb4132f82, 0x8b98b2e2, 0x0fb003ec,
+ 0x00f0e03a, 0xc00fb003, 0xe310e8a1, 0x32608d18, 0x63ec00f3, 0x9032108f,
+ 0x9c035004, 0x70000000, 0x00000000, 0xe001bc00, 0xff003fc0, 0x0ff003fc,
+ 0x00ff003f, 0xc00ff002, 0xfc087e84, 0x37c80ff0, 0x067200ff, 0x203f200f,
+ 0xf003be84, 0xff8a3fe2, 0x0ff003bc, 0x00fc003f, 0xc00ff003, 0x8000f400,
+ 0x1d420ed0, 0x02fc00fe, 0x003da009, 0xf001f800, 0x60000000, 0x00000000,
+ 0xc010ac00, 0xfb003ec0, 0x0fb003ec, 0x00fb003a, 0xc00fb003, 0xe400c902,
+ 0x7ec00fb0, 0xa2ec40fa, 0x703ad04e, 0x86132002, 0xc940a2d0, 0x0db0036c,
+ 0x00d82032, 0xc00cb103, 0xe502c900, 0x32500c94, 0x036c02cb, 0x003a400c,
+ 0x90037004, 0x20000000, 0x00000000, 0xc8052c00, 0xbb002ec0, 0x0bb002ec,
+ 0x00bb002e, 0xc00bb002, 0xcd00dbc0, 0x2ec00b98, 0x92ef00bb, 0x803ad508,
+ 0xb003ef41, 0x8be022e0, 0x09b003ec, 0x015820b6, 0xdc0db802, 0xe5c08950,
+ 0x36420d94, 0x023e008a, 0xb022f00a, 0xb582b200, 0x40000000, 0x00000000,
+ 0xe0054c00, 0x93002cc0, 0x0930024c, 0x00b3002c, 0xc00b3002, 0xc52080b0,
+ 0x04211b10, 0x02cc2093, 0xc024e00a, 0x31020c01, 0x8b0020f4, 0x0b3002cc,
+ 0x00b00420, 0xc0083c82, 0xc4008190, 0x2c200804, 0x820f2481, 0x02280888,
+ 0xb0023800, 0x50000000, 0x00000000, 0x60011e00, 0xb7802de0, 0x0b7802de,
+ 0x00b7802d, 0xe00b7802, 0xd6409580, 0x2de21b79, 0x02de00b6, 0x8029e008,
+ 0x480292e0, 0x858061e4, 0x8b78029e, 0x00b69025, 0xe0097802, 0xd6108580,
+ 0x25a00978, 0x020e6087, 0x8021600a, 0x69029800, 0x40000000, 0x00000000,
+ 0x48080c00, 0xf3003cc0, 0x0b3003cc, 0x00f30038, 0xc00f3002, 0xcc00c210,
+ 0x2cc00f31, 0x03c008f3, 0x002c025a, 0x32022c80, 0x831230c0, 0x0f3042cc,
+ 0x00b00032, 0xc00c3103, 0xc500cb00, 0x3e400c05, 0x0b0c00c9, 0x00388a0c,
+ 0x24071202, 0x00000000, 0x00000000, 0x401dbc00, 0xff003fc0, 0x0ff003fc,
+ 0x00ff003f, 0xc00ff003, 0xdc00ff00, 0x3fc00fd1, 0x03fc00ff, 0x103fc00f,
+ 0xf003fc80, 0xff003fe0, 0x0df003fc, 0x00cd003b, 0xc00df003, 0xfc00ff00,
+ 0x3fc00f70, 0x17bd04ff, 0x001dc00f, 0xe0039006, 0x60000000, 0x00000000,
+ 0xa805ec00, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0xc00fb003, 0xec00cb00,
+ 0x1e000c80, 0x032c02c9, 0x003ac18f, 0xb0032c10, 0xca013e00, 0x4cb003ec,
+ 0x00e20232, 0xc08fb003, 0xec080900, 0x3e400f90, 0x03ec80d1, 0x80b2c06c,
+ 0x90432a00, 0x70000000, 0x00000000, 0xc8119c00, 0xb70039c0, 0x0b7002dc,
+ 0x00b7002d, 0xc00b7002, 0xdc00d700, 0x2dc00df0, 0x431c00a7, 0x002dc10b,
+ 0xf0223c00, 0x87012fc0, 0x4d70239c, 0x08b60029, 0xc00b7002, 0xfc00a700,
+ 0x6dc00b70, 0x42dc8487, 0x0021c108, 0x70037204, 0x60000000, 0x00000000,
+ 0xc0009e00, 0xb7802de0, 0x0b7802de, 0x00b78029, 0xe00b7802, 0xff008780,
+ 0x2fe00978, 0x025e00a7, 0x806de00b, 0x7802de00, 0x97802de0, 0x0b7802de,
+ 0x00b68021, 0xe00b7802, 0xde0097c4, 0x2de00b7c, 0x42ce489f, 0x8120e008,
+ 0xf8023000, 0x20000000, 0x00000000, 0x4814cc00, 0xb30028c0, 0x0b3002cc,
+ 0x00b3002c, 0xc00b3002, 0xce0093c8, 0x2ce209c4, 0x06330084, 0x802d364b,
+ 0x40029244, 0x0c032f24, 0x893000cc, 0x00b3802a, 0xc00bb002, 0xef60bb4d,
+ 0x2cf8433a, 0x42cc0083, 0x8820f049, 0xb0025204, 0x30000000, 0x00000000,
+ 0xe815a800, 0xfa003e80, 0x0fa003e8, 0x00fa003e, 0x800fa003, 0xda00c680,
+ 0x3d830da4, 0x0b6b20ea, 0x083eb04f, 0xa40bea0a, 0x5aa03eb5, 0x0fa022e8,
+ 0x00f60832, 0x800fa003, 0xfb00dec0, 0x3fb20fec, 0x03e800de, 0xa033900c,
+ 0xe8833a04, 0x60000000, 0x00000000, 0x4800e000, 0xf8003a00, 0x0f8003e0,
+ 0x00f8003e, 0x000f8003, 0xe000f850, 0x3e000f82, 0x03e020b8, 0x001e100f,
+ 0x85016000, 0xf8803e00, 0x0f8003a0, 0x00f8013e, 0x000f8003, 0xe100e800,
+ 0x3e000f80, 0x03e100f8, 0x403e060e, 0x8c03d200, 0x30000000, 0x00000000,
+ 0x0810e400, 0xf9003e40, 0x0f9003e4, 0x00f9003e, 0x400f9003, 0xe600d940,
+ 0x32700c9c, 0x0ba600c9, 0xaa3e600f, 0x948b2420, 0xc9003270, 0x2c9003e4,
+ 0x00f90032, 0x400c9803, 0xa400c980, 0x30440c10, 0x030600e9, 0xc03c489c,
+ 0x98030204, 0x30000000, 0x00000000, 0x80046400, 0xb9002e40, 0x0b9002e4,
+ 0x00b9002e, 0x400b9002, 0xe70089c0, 0x2a400a9e, 0x02270089, 0x203a500b,
+ 0x9c422402, 0x89142260, 0x089002e4, 0x00b9003e, 0x74289c02, 0x270289a0,
+ 0xa2500894, 0x03654489, 0xc02e4008, 0x950a2000, 0x10000000, 0x00000000,
+ 0x18052400, 0xb9002e40, 0x0b9002e4, 0x00b9002e, 0x400b9002, 0xe4a29b08,
+ 0x264018d0, 0x063c808d, 0x002f440b, 0x50029580, 0x8d412340, 0x0a9002e4,
+ 0x00b91026, 0x50089182, 0xa4808920, 0x22d00898, 0x026400a9, 0x002e4009,
+ 0x90020600, 0x40000000, 0x00000000, 0x08040400, 0xb1002c40, 0x0b1002c4,
+ 0x00b1002c, 0x400b1002, 0xe4008900, 0x2c400a51, 0x06144885, 0x0229c00b,
+ 0x71421444, 0x851221c4, 0x3a1002c4, 0x00b9002c, 0x44081102, 0x04408110,
+ 0x20440810, 0x024c4083, 0x102c4028, 0x31020201, 0x00000000, 0x00000000,
+ 0x380d6000, 0xf8003e00, 0x0f8003e0, 0x00f8003e, 0x000f8002, 0xe000d800,
+ 0x36000c84, 0x238902c8, 0x003e000f, 0x8402a104, 0xc840b310, 0x0e8007e0,
+ 0x00f80026, 0x100c8403, 0xa9a0c868, 0x321a2ca2, 0x8321a0e8, 0x403e8a0d,
+ 0x84030e03, 0x50000000, 0x00000000, 0x981de400, 0xf9003e40, 0x0f9003e4,
+ 0x00f9003e, 0x400f9003, 0xd402fd00, 0x29c00f92, 0x03ec80fb, 0x003a400f,
+ 0x9213e480, 0xfb203e48, 0x0d9003e4, 0x00fd003a, 0x480f9203, 0xf480fd20,
+ 0x3f480fd0, 0x03e490fd, 0x213f401f, 0x5203e606, 0x70000000, 0x00000000,
+ 0x1805e400, 0xf9003e40, 0x0f9003e4, 0x00f9003e, 0x400f9003, 0xf400ed00,
+ 0x3f400fd1, 0x07f400cd, 0x003f400f, 0xd0433400, 0xcd103340, 0x089003e4,
+ 0x00fd0033, 0x400fd013, 0x7484bd2a, 0x334c0ed0, 0x033400fd, 0x10374829,
+ 0xd0030600, 0x70000000, 0x00000000, 0x3810e000, 0xb8002e00, 0x0b8002e0,
+ 0x00b8002e, 0x000b8002, 0xe0008800, 0x3a000ba0, 0x22c0b0d8, 0x002e000b,
+ 0xa0934020, 0x8800340a, 0x8a8002e0, 0x00b8043a, 0x020b8002, 0x20a0b820,
+ 0x220c2884, 0x0aa020b0, 0x00220008, 0x82034e04, 0x30000000, 0x00000000,
+ 0x0805c400, 0xb1002c40, 0x0b1002c4, 0x00b1002c, 0x400b1002, 0xe401a102,
+ 0x2c410b10, 0x02c489a1, 0x002ce00b, 0x12028400, 0xb1002048, 0x081002c4,
+ 0x00b10024, 0x400b1002, 0x44c0b128, 0x20480811, 0x628440b1, 0x00244449,
+ 0x92c20201, 0x70000000, 0x00000000, 0x1815a400, 0xb9002e40, 0x0b9002e4,
+ 0x00b9002e, 0x400b9002, 0xe4028920, 0x6a400b90, 0x04e48099, 0x002e400b,
+ 0x9212c404, 0x99012640, 0x0a9002e4, 0x00b91026, 0x400b9002, 0x2450b910,
+ 0x22400890, 0x02a400b1, 0x00224808, 0xb1824604, 0x60000000, 0x00000000,
+ 0xa015e400, 0xf9003e40, 0x0f9003e4, 0x00f9002e, 0x400f9003, 0xe780e960,
+ 0x3e500f99, 0x02e700e9, 0x902e600f, 0x9412a682, 0xf9803278, 0x0c9040e4,
+ 0x00f148b6, 0x400f9003, 0x6790f920, 0xb26c0c90, 0x03a400f9, 0xc836580d,
+ 0x9c032804, 0x70000000, 0x00000000, 0xa801a400, 0xf9003e40, 0x0f9003e4,
+ 0x00f9003e, 0x400f9003, 0xe440f908, 0x3e640f98, 0x83e400f9, 0x003e440f,
+ 0x98436720, 0xe9223e44, 0x0f9003e4, 0x00f9003a, 0x400f9003, 0xe404f182,
+ 0x3e400d1c, 0x436400f9, 0x123e420f, 0x9003ea00, 0x60000000, 0x00000000,
+ 0x2810a000, 0xf8003e00, 0x0f8003e0, 0x00f8003e, 0x000f8003, 0xe180c800,
+ 0x3e104f84, 0x13e1c0c8, 0x483e0044, 0x84a3e000, 0xc8413e00, 0x2c8003e0,
+ 0x00f87032, 0x000f8003, 0xe000f801, 0x3e040780, 0x03e060e8, 0x6038100f,
+ 0x8403ca04, 0x20000000, 0x00000000, 0x28052800, 0xba002e80, 0x0ba002e8,
+ 0x00ba002e, 0x800ba002, 0xd8008ec0, 0x2e800be8, 0x823a108e, 0x802f9508,
+ 0xee2b3b80, 0x8e982fa0, 0x0aa002e8, 0x00be802b, 0xa00bec02, 0xfb40bec0,
+ 0x2fa003e0, 0x013a048e, 0xe223820b, 0x6c02ca00, 0x40000000, 0x00000000,
+ 0x28054c00, 0xb3002cc0, 0x0b3002cc, 0x00b3002c, 0xc00b3002, 0xcc0293c0,
+ 0x2ce00b30, 0x02af0213, 0x052cc069, 0xb0000c00, 0x8bc02ee2, 0x083002cc,
+ 0x00b3c020, 0xe40bba02, 0xcc00b360, 0x2ec00b32, 0x008c00a3, 0x0028e00b,
+ 0x3c82ca00, 0x50000000, 0x00000000, 0xa0011c00, 0xb7002dc0, 0x0b7002dc,
+ 0x00b7002d, 0xc00b7002, 0xf8009740, 0x2dd00b78, 0x529c0097, 0x402de009,
+ 0x70021c08, 0x87002dd0, 0x0a7002dc, 0x00bc0029, 0xc00b7082, 0xdd00b741,
+ 0x25400b70, 0x021e1487, 0x0021c00b, 0x6082e800, 0x40000000, 0x00000000,
+ 0xa8081e00, 0xf7803de0, 0x0f7803de, 0x00f7803d, 0xe00f7803, 0xd200d781,
+ 0x2de00ff8, 0x039e00d7, 0x843de04d, 0xf8431c00, 0xc7803de0, 0x0c7803de,
+ 0x00f58221, 0xe00f5803, 0xde00f780, 0x3de08f48, 0x178e04e7, 0x8239e00f,
+ 0x7803ea02, 0x00000000, 0x00000000, 0x081dac00, 0xfb003ec0, 0x0fb003ec,
+ 0x00fb003e, 0xc00fb003, 0xc00ae900, 0x0e400fb0, 0x032404e8, 0x003c010e,
+ 0xb023a000, 0xfa043680, 0x0bb003ec, 0x00f0003e, 0x000f9003, 0xe008f802,
+ 0x3e000f00, 0x13a000fa, 0x043e400f, 0xb003c206, 0x60000000, 0x00000000,
+ 0x0005fe00, 0xff803fe0, 0x0ff803fe, 0x00ff803f, 0xe00ff803, 0xda00ef91,
+ 0x71e40cfb, 0x03bec0cf, 0x903fe90b, 0xf2023e80, 0xcf9433e0, 0x0ff803fe,
+ 0x00fe8033, 0xe00cf803, 0x3e00cf90, 0x3fe40468, 0x007e40cf, 0x8033e00c,
+ 0xf9030000, 0x70000000, 0x00000000, 0xa8119c00, 0xb7002dc0, 0x0b7002dc,
+ 0x00b7002d, 0xc00b7002, 0xd8008701, 0x61c08d61, 0x431840d7, 0x502dc20b,
+ 0xe3863d80, 0xa7002946, 0x4b7002dc, 0x00b44037, 0x400dc002, 0x1000a600,
+ 0x2d402870, 0x1230c0a7, 0x04214028, 0xc1022a04, 0x60000000, 0x00000000,
+ 0x00009c00, 0xb7002dc0, 0x0b7002dc, 0x00b7002d, 0xc00b7002, 0xb060ae01,
+ 0x2bc009d2, 0x129c81a7, 0x002dd84b, 0x520a9cc0, 0x850221d0, 0x0b7002dc,
+ 0x00b40029, 0xc0095002, 0x1c008508, 0x6d401840, 0x025c1085, 0x0020c009,
+ 0x70420000, 0x20000000, 0x00000000, 0x2014cc00, 0xb3002cc0, 0x0b3002cc,
+ 0x00b3002c, 0xc00b3002, 0xc32380c8, 0x28660908, 0x122320b0, 0xc12c000b,
+ 0x0c028380, 0x20002800, 0x0b3002cc, 0x01b0a02c, 0x00990000, 0x2200a004,
+ 0x6c000800, 0x002000a8, 0x10a07009, 0x18020804, 0x30000000, 0x00000000,
+ 0xa815ac00, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0xc00fb003, 0xc200e30c,
+ 0x3af00db4, 0x02af22e3, 0x943ec04b, 0xbd02ae20, 0x8be0b2e0, 0x0fb003ec,
+ 0x00fa603a, 0x400d902a, 0x26808980, 0x2ec2081c, 0xab6400cb, 0x4032920d,
+ 0xb48b2a04, 0x60000000, 0x00000000, 0x8000ec00, 0xfb003ec0, 0x0fb003ec,
+ 0x00fb003e, 0xc00fb003, 0xe000fa00, 0x26c00f91, 0x03ac009b, 0x503ec18f,
+ 0x90016d00, 0xf9003ec0, 0x0fb003ec, 0x00f80036, 0x000f9003, 0xe400f901,
+ 0x3e500f90, 0x83e400f9, 0x483e880e, 0xa203e000, 0x30000000, 0x00000000,
+ 0x0110fc00, 0xff003fc0, 0x0ff003fc, 0x00ff003f, 0xc00ff007, 0xf000cfa1,
+ 0x33e00fa0, 0x80f842cf, 0x0233e00f, 0xe1133f04, 0xff083340, 0x8cf003fc,
+ 0x00fc4033, 0x400dc003, 0xe400c500, 0x31210cd0, 0x037400cf, 0x80b3800c,
+ 0xd003c044, 0x30000000, 0x00000000, 0x81046c00, 0xbb002ec0, 0x0bb002ec,
+ 0x00bb002e, 0xc00bb002, 0xe30088c0, 0x22600984, 0x42e10088, 0x803e280b,
+ 0x80066200, 0xb8002a12, 0x08b002ec, 0x10b0c036, 0x28098c02, 0xe200a880,
+ 0x36320a88, 0x42220288, 0x92205008, 0x9802e040, 0x10000000, 0x00000000,
+ 0x80052c00, 0xbb002ec0, 0x0bb002ec, 0x00bb002e, 0xc00bb002, 0xe2228940,
+ 0x22480bb2, 0x82e50088, 0x10220949, 0x30826000, 0xb2812084, 0x98b002ec,
+ 0x00ba0022, 0x600b9882, 0xe6008980, 0x22c8088c, 0x0266008a, 0x4622d818,
+ 0xb202e000, 0x40000000, 0x00000000, 0x08040c00, 0xb3002cc0, 0x0b3002cc,
+ 0x00b3002c, 0xc00b3002, 0xe0008001, 0x20400b00, 0x02c00280, 0x042c000b,
+ 0x00024000, 0xb0802800, 0x183002cc, 0x00b80024, 0x000b0002, 0xc000a000,
+ 0x24400a00, 0x02000080, 0x0020c008, 0x1002c201, 0x00000000, 0x00000000,
+ 0x000d6c00, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0xc00fb002, 0xe000c800,
+ 0x32400f80, 0x07c008c8, 0x0032000d, 0x800a2001, 0xf0003200, 0x2cb002ec,
+ 0x00fa0032, 0x400f8007, 0xe400c900, 0x32000c80, 0x036400c0, 0x0032c04c,
+ 0x9043c003, 0x50000000, 0x00000000, 0xa01dfc00, 0xff003fc0, 0x0ff003fc,
+ 0x00ff003f, 0xc00ff003, 0xf000f400, 0x3f400dc0, 0x03f000fc, 0x003b000f,
+ 0xc007b000, 0xfc003f00, 0x0ff003fc, 0x00f40037, 0x000dc003, 0xf000fc00,
+ 0x7d005fc0, 0x03b000fc, 0x003f400f, 0xd003e806, 0x70000000, 0x00000000,
+ 0xc045fe08, 0xff803be0, 0x0ff803fe, 0x00ff803f, 0x0a0fc3c3, 0xfe00cc29,
+ 0x3fe00fc1, 0x037e00ff, 0x8037200c, 0xc8033000, 0xcf803de4, 0x0cc4033c,
+ 0x20ef903f, 0xe00ff803, 0xfe00f680, 0x39210cc8, 0x031600cf, 0x803fe00f,
+ 0xf803f000, 0x70000000, 0x00000000, 0xc010ee00, 0xbb802ee0, 0x0bb802ee,
+ 0x00bb802c, 0x5a8b1402, 0x0e000bc6, 0x2ee00b85, 0x0aae00bb, 0x0036200a,
+ 0x8802ab40, 0xab802ec0, 0x28a4422c, 0x008b202e, 0xe00bb802, 0xee00b880,
+ 0x36200d88, 0x0226008b, 0x802ee00b, 0xb802e006, 0x30000000, 0x00000000,
+ 0xc805cc00, 0xb30028c0, 0x0b30028c, 0x00b3002c, 0xc00b0002, 0x64038000,
+ 0x2c400b02, 0x0a4c00a3, 0x00200018, 0x80060404, 0x830128c8, 0x88160a04,
+ 0x20b3002c, 0xc00b3002, 0x8c00b200, 0x28000900, 0x06a000a3, 0x012cc01b,
+ 0x3002c201, 0x70000000, 0x00000000, 0xc015ac00, 0xbb002ec0, 0x0bb002ec,
+ 0x00bb002e, 0xc10b8022, 0x0c648820, 0x26c00b22, 0x06ec10bb, 0x0026800a,
+ 0xa082ac01, 0xab002ec0, 0x2890022f, 0x009b042e, 0xc00bb000, 0xec14ba04,
+ 0x26020988, 0x422e00ab, 0x002ec00b, 0xb002f000, 0x60000000, 0x00000000,
+ 0x0015ec00, 0xfb003ac0, 0x0fb003ac, 0x00fb003e, 0x380faa13, 0x68008b40,
+ 0x3e400f88, 0x036c00eb, 0x00302c0c, 0x0d032280, 0xcb003cc0, 0x0c8c032f,
+ 0x04fb023e, 0xc00fb003, 0xac00fa40, 0x3a200c0c, 0x83a6006b, 0x003ec00f,
+ 0xb003c004, 0x70000000, 0x00000000, 0xa001bc00, 0xff003fc0, 0x0ff001fc,
+ 0x00ff003f, 0x260f79a0, 0x7e28ff80, 0x3fe40f90, 0x01bc00ff, 0x003f400f,
+ 0xf003d104, 0xff003fc0, 0x0fe903fc, 0x00ef003f, 0xc00ff003, 0xfc00fc00,
+ 0x3f100fc0, 0x0bf400df, 0x003fc00f, 0xf003e800, 0x60000000, 0x00000000,
+ 0xc010ac00, 0xfb003ec0, 0x0fb0036c, 0x00fb003e, 0x100e800b, 0xed00d870,
+ 0x3ec00cb6, 0x03ec20cb, 0x003ed20c, 0x94032000, 0xcb213ec0, 0x8c0403ad,
+ 0x00fb003e, 0xc00fb003, 0xec00fa40, 0x36320c80, 0x03ec00cb, 0x003ec00f,
+ 0xb003f004, 0x20000000, 0x00000000, 0xc8052c00, 0xbb002ec0, 0x0bb002ec,
+ 0x00bb002e, 0x8205be12, 0x2f03a840, 0x2ed48dbe, 0x022d10db, 0x002ec00d,
+ 0xb0036c00, 0xdb802ef6, 0x08bd822c, 0x00ab003a, 0xc00bb002, 0xef00b270,
+ 0x20210880, 0x02cc088b, 0x022ec00e, 0xb002f200, 0x40000000, 0x00000000,
+ 0xe0054c00, 0xb3002cc0, 0x0b3002cc, 0x0093002c, 0xa00a3002, 0x02048000,
+ 0x2ce00908, 0x028e408b, 0x00242009, 0x00024d20, 0x93c02cc0, 0x083802aa,
+ 0x02b3002c, 0xc00b3002, 0xccc0b202, 0x24100810, 0x02c401a3, 0x002cc00b,
+ 0x3002f000, 0x10000000, 0x00000000, 0xe0011e00, 0xb7802de0, 0x0b7802de,
+ 0x00b7802d, 0xe0887b42, 0x3e80a790, 0x2de24978, 0x021e0097, 0x822de209,
+ 0xd8024e00, 0x97802de4, 0x0838021e, 0x00a78029, 0xe00b7802, 0xde00b480,
+ 0x21200858, 0x06fe00a7, 0x802de00a, 0x7802d804, 0x10000000, 0x00000000,
+ 0x48080c00, 0xb3003cc0, 0x0f3003cc, 0x00b3003c, 0xc00a0203, 0x8c248050,
+ 0x6cc00914, 0x0b8c41c3, 0x0034400d, 0x30024c2c, 0xd3083cc0, 0x0c1203a8,
+ 0x28f3043c, 0xc00f3003, 0xcc00b240, 0x34080c12, 0x03c000e3, 0x003cc00f,
+ 0x3003d202, 0x10000000, 0x00000000, 0x401dbc00, 0xff003fc0, 0x0ff003fc,
+ 0x00ff003f, 0xc40fe213, 0xbc80af14, 0x7dc00ff0, 0x039c00ff, 0x003dc40f,
+ 0x7103fc00, 0xff003fc0, 0xafd003fc, 0x00ff003b, 0xc00ff003, 0xfc007e01,
+ 0x3f102fd0, 0x03fc00df, 0x003fc00f, 0xf003d004, 0x60000000, 0x00000000,
+ 0xa805ec00, 0xfb003ec0, 0x0fb003ec, 0x01eb003e, 0x000db803, 0x0c08cb80,
+ 0x36c00fa0, 0x032c00fb, 0x003e800f, 0xa003e000, 0xf38232c0, 0x0ca00328,
+ 0x00cb003e, 0xc00fb003, 0xee00e200, 0xb0000c28, 0x432c00fb, 0x003ec00f,
+ 0xb003c200, 0x70000000, 0x00000000, 0xc8119c00, 0xb7002dc0, 0x0b7002dc,
+ 0x00b7002d, 0xc0087002, 0x1c008300, 0x21c01b70, 0x029c00b7, 0x002dc00b,
+ 0x7002d400, 0xb70021c0, 0x8870023c, 0x0087002d, 0xc00b7002, 0xdc108400,
+ 0x35000550, 0x021c00b7, 0x002dc00b, 0x7002f206, 0x60000000, 0x00000000,
+ 0x80009e00, 0xb7802de0, 0x0b7802de, 0x00b7822c, 0x60091802, 0x7e01a7c0,
+ 0x2de20b38, 0x025e00b7, 0x802de01a, 0x7812da11, 0xb78021e0, 0x08280218,
+ 0x0087802d, 0xe00b7802, 0xde00af80, 0x23e08a68, 0xc01e20b7, 0x802de00b,
+ 0x7802c840, 0x00000000, 0x00000000, 0x4814cc00, 0xb3002cc0, 0x0b3002cc,
+ 0x00b3002c, 0xf0083a22, 0x4d68a360, 0x28e00bb2, 0x2acc00b3, 0x002cd20b,
+ 0x3c82cf01, 0xb30020c0, 0x283a120c, 0x0083002c, 0xc00b3002, 0xcc008308,
+ 0x24c82b3e, 0x420d00b3, 0x002cc00b, 0x3002da00, 0x30000000, 0x00000000,
+ 0xe815a800, 0xfa003e80, 0x0fa002e8, 0x00fa003f, 0xb63dec3b, 0x7a0aee00,
+ 0x3e800fec, 0x136804fa, 0x003f880f, 0xe003fb60, 0xfa003280, 0x0cea0b1a,
+ 0x84ca003e, 0x800fa003, 0xe800ee01, 0x33920ee4, 0x0b1a40fa, 0x003e800f,
+ 0xa003fa04, 0x50000000, 0x00000000, 0x4800e000, 0xf8003e00, 0x0f8003e0,
+ 0x00f8003e, 0x000f8503, 0xa100d800, 0x36000f81, 0x03a000f8, 0x003e000b,
+ 0x8101e100, 0xf802be00, 0x0f8043e0, 0x00f8001e, 0x000f8003, 0xe100f443,
+ 0xbf010584, 0x03e000f8, 0x003e000f, 0x8003d200, 0x60000000, 0x00000000,
+ 0x0810e400, 0xf9003e40, 0x0f9003e4, 0x00f9003e, 0x500c9a03, 0xe700c984,
+ 0x3e700c90, 0x032600f9, 0x003e400c, 0x9003e480, 0xf9803e64, 0x0c1203a7,
+ 0x02c9003e, 0x400f9003, 0xe400f9c0, 0x32604c98, 0x00e400c9, 0x003e400f,
+ 0x9003c204, 0x20000000, 0x00000000, 0x80046400, 0xb9002e40, 0x0b9002e4,
+ 0x00b9002e, 0x708d9a22, 0xc5008940, 0x2c700d9c, 0x022700b9, 0x002c440d,
+ 0x9002e600, 0xb9c82c58, 0x08901224, 0x0089002e, 0x400b9002, 0xe520b920,
+ 0x28650a9d, 0x02e40089, 0x002e400b, 0x9002e000, 0x10000000, 0x00000000,
+ 0x18052400, 0xb9002e40, 0x0b9002e4, 0x00b9002c, 0x40009012, 0xe4008918,
+ 0x2e500896, 0x02258839, 0x002e4008, 0x9002e400, 0xb9202e40, 0x08b002a4,
+ 0x0089002e, 0x400b9002, 0xe400b900, 0x23400a90, 0x12e40089, 0x006e400b,
+ 0x9002ce00, 0x40000000, 0x00000000, 0x08040400, 0xb1002c40, 0x0b1002c4,
+ 0x00b1002c, 0xc4291106, 0xe4028100, 0x2e408911, 0x0a0400b1, 0x102e4009,
+ 0x1002cc0c, 0xb1002c44, 0x08114224, 0x5081102c, 0x400b1002, 0xc410bd00,
+ 0x2b400a30, 0x02e40281, 0x002c400b, 0x1002ca05, 0x00000000, 0x00000000,
+ 0xb80d6000, 0xb8003e00, 0x0f8003e0, 0x00b8003e, 0x1a0c8683, 0xe8108828,
+ 0x3e000c86, 0x8b2000f8, 0x403e800c, 0x8043e0a0, 0xf8003e10, 0x4ca683a1,
+ 0xa2c8403e, 0x000f8003, 0xe000f800, 0x33004a80, 0x03e000c8, 0x003e000f,
+ 0x8003ee03, 0x00000000, 0x00000000, 0x981de400, 0xf9003e40, 0x0f9003e4,
+ 0x00f9003f, 0x480ef223, 0xf4003d00, 0x3f400fd2, 0x03e400f9, 0x213fc00f,
+ 0xd003f400, 0xf9003c49, 0x2fd203f4, 0x80f9243e, 0x400f9003, 0xc400fd00,
+ 0x3f400fd0, 0x03f400f9, 0x002e400f, 0x9003e601, 0x70000000, 0x00000000,
+ 0x9805e400, 0xf9003e40, 0x0f9003e4, 0x00f9003f, 0x480dd28b, 0x2400c900,
+ 0x37400fd1, 0x237400f9, 0x0037400f, 0x9003f400, 0xc5003f40, 0x0cd283f4,
+ 0x00d9003e, 0x400f9003, 0xd400f500, 0x31400ad0, 0x03e400f9, 0x003e400f,
+ 0x9003e601, 0x70000000, 0x00000000, 0x3810e000, 0xb8002e00, 0x0b8002e0,
+ 0x00b8002e, 0x0a888202, 0x2800ac40, 0x22000b01, 0x02a000b8, 0xa82e000b,
+ 0x8002e000, 0x88022e0a, 0x480202c0, 0x0088002e, 0x000b8002, 0xe004bc00,
+ 0xa2004080, 0x02e804b8, 0x002e000b, 0x8002ce06, 0x30000000, 0x00000000,
+ 0x4805c400, 0xb1002c40, 0x0b1002c4, 0x00b1002c, 0x6c091286, 0x34019510,
+ 0x68401b10, 0x0a4400b1, 0x002c400b, 0x1002c440, 0x81002c48, 0x281282c4,
+ 0x0091002c, 0x400b1002, 0xd400b500, 0x22400a10, 0x02c400b1, 0x0068400b,
+ 0x1002d201, 0x60000000, 0x00000000, 0x1815a400, 0xb9002e40, 0x0b9002e4,
+ 0x00b9002e, 0x60089006, 0x1400ad00, 0x2ac00b94, 0x02a400b9, 0x002ec00b,
+ 0x9202e620, 0x0b002e40, 0x289512e4, 0x0089002e, 0x400b9002, 0xec00bd08,
+ 0x22408892, 0x12e400b9, 0x000e400b, 0x9002c600, 0x20000000, 0x00000000,
+ 0xa015e410, 0xf9003e40, 0x0f9003e4, 0x00f9003e, 0x408d9c03, 0x2610d9f0,
+ 0x3e600b90, 0x136404f9, 0x0036640f, 0x9a03e702, 0x49023c41, 0x0c9003e4,
+ 0x00d9003e, 0x400f9003, 0xe400f1c1, 0x32490e98, 0x03e700f9, 0x003a400f,
+ 0x9003e804, 0x70000000, 0x00000000, 0xe841a400, 0xf9003e40, 0x0f9003e4,
+ 0x00f9003e, 0x420b9c03, 0xe490f184, 0xb6680f92, 0x01e420f9, 0x002e600f,
+ 0x9003e410, 0xf9003e42, 0x079003c5, 0x00f9003e, 0x400f9003, 0xe400f9c4,
+ 0x3e660f90, 0x13e680f9, 0x003e400f, 0x9003f200, 0x60000000, 0x00000000,
+ 0x2810a000, 0xf8003e00, 0x0f8003e0, 0x00f8003e, 0x040e8643, 0xa040f800,
+ 0x36024f84, 0x0b2040f8, 0x003e000e, 0x8403c100, 0xf8003200, 0x0c8203a0,
+ 0x08c8003e, 0x000f8002, 0xf040cc40, 0x32000c88, 0x03e002c8, 0x003e000f,
+ 0x8003c204, 0x20000000, 0x00000000, 0x28052800, 0xba002e80, 0x0ba002e8,
+ 0x00ba002f, 0xa008ec02, 0x2a00ba60, 0x03b00be4, 0x023a00ba, 0x002fb808,
+ 0xa003b840, 0xbe802380, 0x08e00228, 0x00aa002e, 0x800ba002, 0xfb40ae10,
+ 0x29a808e8, 0x02e80c8a, 0x002e800b, 0xa002ca00, 0x40000000, 0x00000000,
+ 0x28054c00, 0xb3002cc0, 0x0b30028c, 0x00b3002e, 0xf00ab00a, 0xd180b420,
+ 0xa0d003be, 0x020e00b3, 0x002cd80a, 0x30028e00, 0xb33120f0, 0x883d428e,
+ 0x0483022c, 0xc00b3002, 0xca0080c2, 0x20900830, 0x42cc0083, 0x006cc00b,
+ 0x3002ca00, 0x50000000, 0x00000000, 0xa0011c00, 0xb7002dc0, 0x0b7002dc,
+ 0x00b7002d, 0x80087402, 0x5c00b300, 0x21020b70, 0x821004b7, 0x002fe008,
+ 0x70029d08, 0xb78021d0, 0x0878001c, 0x20a7202d, 0xc00b7002, 0xd200a440,
+ 0x29c02870, 0x82fe0087, 0x002dc00b, 0x7002e004, 0x60000000, 0x00000000,
+ 0xa8081e00, 0xf7803de0, 0x0f78039e, 0x00f7803c, 0xe0de2833, 0xde00f782,
+ 0x21200f78, 0x031201f7, 0x803de00e, 0x78039e08, 0xf7803320, 0x2c780b9e,
+ 0x00c7b03d, 0xe00f7803, 0xda00c485, 0x31a04858, 0x03de00c7, 0x803de00f,
+ 0x7803e002, 0x00000000, 0x00000000, 0x080dac00, 0xfb003ec0, 0x0fb003ec,
+ 0x00fb002e, 0x005f8043, 0xac00bb01, 0x7a000f90, 0x03e000fb, 0x003cc00f,
+ 0xb003ac00, 0xfb00be81, 0x0fb003ed, 0x04fb003e, 0xc00fb043, 0xe004f820,
+ 0x3e400f90, 0x03cc04fb, 0x001ec00f, 0xb003c204, 0x60000000, 0x00000000,
+ 0x4005fe00, 0xff803fe0, 0x0ff803fe, 0x00ff803f, 0x600cfb43, 0x7e40cf96,
+ 0x3f240ff8, 0x033200ff, 0x803fe00f, 0xf203fe40, 0xff8037e0, 0x4fd8035f,
+ 0x00cf9833, 0xe00ff803, 0x5200c7d0, 0x3b648ef8, 0x033e00ff, 0x903fe00f,
+ 0xf803f000, 0x20000000, 0x00000000, 0xa8019c00, 0xb7002dc0, 0x0b7002dc,
+ 0x00b7002f, 0x00287102, 0x1c00a538, 0x2d020b71, 0x021100b7, 0x022dc00b,
+ 0x7002dc00, 0xb7202dd0, 0x0bd0421c, 0x408f0035, 0xc00b7002, 0xd040d730,
+ 0x21cc4070, 0x035c40b7, 0x002dc00f, 0x7002ea02, 0x20000000, 0x00000000,
+ 0x10109c00, 0xb7002dc0, 0x0b7002dc, 0x00b7002d, 0x00087222, 0x70059680,
+ 0x2d008b24, 0x025000b7, 0x002dc00b, 0x7102dd01, 0xb7022544, 0x0b6082dc,
+ 0x20870061, 0xc00b7002, 0xd0009c00, 0x2b408ac0, 0x025c00b7, 0x006dc00b,
+ 0x7002c404, 0x20000000, 0x00000000, 0x6814cc00, 0xb3002cc0, 0x0b3002cc,
+ 0x00b3002c, 0x10089c02, 0x0c88b3c0, 0x2c000b00, 0x224000b3, 0x002c801b,
+ 0x3006ca01, 0xb2002e80, 0x0ba8028c, 0x10830024, 0xc00b3002, 0xc0009040,
+ 0x2040280a, 0x024d40b3, 0x002cc00b, 0x3002da00, 0x20000000, 0x00000000,
+ 0x2815ac00, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0xc00c9423, 0x6f02dbd0,
+ 0x2e000fb0, 0x0b6000ff, 0x003ec60b, 0xb183ef20, 0xfb003680, 0x4fac03cd,
+ 0x02cf0032, 0xc00fb003, 0xec0018a0, 0x2af80ea4, 0xa26d00fb, 0x002ec00f,
+ 0xb003da04, 0x60000000, 0x00000000, 0x9000ec00, 0xfb003ec0, 0x0fb003ec,
+ 0x00fb003c, 0xd70f8313, 0xe144e200, 0x3e100f28, 0x03a000fb, 0x003ec00f,
+ 0xb003ec00, 0xfb001e91, 0x1f908164, 0x80fb003e, 0xc00fb003, 0xc410f800,
+ 0x3ec20fa4, 0x43ec80fb, 0x003ec00e, 0xb003e400, 0x10000000, 0x00000000,
+ 0x8010fc10, 0xff003fc0, 0x0ff003fc, 0x00ff003f, 0xe80cc91b, 0x3e01cd80,
+ 0x33000ff0, 0x03b000ef, 0x003fc00f, 0xf003dc40, 0xcf803f00, 0x0ee0033e,
+ 0x008f0033, 0xc00ff003, 0xf800dca8, 0x33c000e0, 0x03fc00bf, 0x002fc00f,
+ 0xf003e804, 0x30000000, 0x00000000, 0x80046c00, 0xbb002ec0, 0x0bb002ec,
+ 0x00bb002e, 0x78088c42, 0x2c81ab40, 0x22200b80, 0x036300bf, 0x002e100f,
+ 0xb002ef80, 0x89c02eb0, 0x089d122c, 0x008b003a, 0xc00bb002, 0xe3008020,
+ 0x28f238a2, 0x03ac00bb, 0x002ec00b, 0xb002e840, 0x10000000, 0x00000000,
+ 0x80052c00, 0xbb002ec0, 0x0bb002ec, 0x00bb002e, 0xc008b412, 0x0c918b60,
+ 0x22200b98, 0x02a200bb, 0x002ec80b, 0xb002ec00, 0x8b202e20, 0x1a80922c,
+ 0x40a30022, 0xc00bb002, 0xea159801, 0x26600a98, 0x02ec01bb, 0x002ec00b,
+ 0xb002e000, 0x40000000, 0x00000000, 0x08040c00, 0xb3002cc0, 0x0b3002cc,
+ 0x00b3002c, 0xc0282022, 0x2c00a300, 0x20000b08, 0x0e4004b3, 0x002c400b,
+ 0x3002c000, 0x80002c00, 0x0810022c, 0x02a30028, 0xc00b3002, 0xe0098800,
+ 0x2ac04810, 0x02cc01b3, 0x0024c00b, 0x3002c200, 0x00000000, 0x00000000,
+ 0x80056c00, 0xfb003ec0, 0x0fb003ec, 0x00fb002e, 0x800c3003, 0x0c008b00,
+ 0xb2000f80, 0x0ba000eb, 0x003ec00f, 0xb002e402, 0xcb003e00, 0x0ea00b3c,
+ 0x02ef0022, 0xc00fb003, 0xe800d805, 0x76400a80, 0x07ec00fb, 0x003ec00f,
+ 0xb003e001, 0x10000000, 0x00000000, 0xa015fc00, 0xff003fc0, 0x0ff003fc,
+ 0x00ff001f, 0x008fc003, 0xf000fc00, 0x3f000fc0, 0x03f000ff, 0x003fc00e,
+ 0xf003fc00, 0xff003f01, 0x0fc003fc, 0x00df003b, 0xc00ff003, 0xf000fc00,
+ 0x7dc00d40, 0x03bc00ff, 0x006fc00f, 0xf023e805, 0x70000000, 0x00000000,
+ 0xc005fe00, 0xff803fe0, 0x0ff803fe, 0x00ff803f, 0xe00ff803, 0xfe00ff84,
+ 0x1fe40cc8, 0x03f600fc, 0x8037020c, 0xd8033028, 0xccc20160, 0x07c2037e,
+ 0x00ff803f, 0xe00ff803, 0xfe01dc00, 0x3d210f40, 0x031010dc, 0x203f604d,
+ 0x42033000, 0x70000000, 0x00000000, 0xc010ee00, 0xbb802ee0, 0x0bb802ee,
+ 0x00bb802e, 0xe00bb803, 0xae00bb82, 0x2cc88e88, 0x42e480b8, 0x01221a25,
+ 0x88002300, 0x8a0022e1, 0x8b8822ae, 0x00bb8026, 0xe00bb802, 0xee18b803,
+ 0x2e200e88, 0x02a200a8, 0xd42e6028, 0x8812a004, 0x30000000, 0x00000000,
+ 0xc805cc00, 0xb3002cc0, 0x0b3002cc, 0x00b3002c, 0xc00a3002, 0xcc00b300,
+ 0x2cc80800, 0x02c4a1b8, 0x08280848, 0x10024010, 0x81202040, 0x4b04028c,
+ 0x00b3002c, 0xc00a3002, 0xcc00b000, 0x2c000b10, 0x06400080, 0x0028404a,
+ 0x04420201, 0x70000000, 0x00000000, 0xc015ac00, 0xbb002ec0, 0x0bb002ec,
+ 0x00bb002e, 0xc00bb002, 0xac00bb00, 0x6ec00ab0, 0x02e410bb, 0x00a60509,
+ 0x90226d8d, 0x8b00a2c0, 0x8ba102ac, 0x00bb0026, 0xc009b002, 0xec00b881,
+ 0x26480a98, 0x00e300a9, 0x002e008a, 0x8802b004, 0x60000000, 0x00000000,
+ 0x4015ec10, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0xc00fb003, 0xec00fb00,
+ 0x3ec00c82, 0x43e644f0, 0x483e3188, 0x95036300, 0xc85a3260, 0x0f0a03ec,
+ 0x00fb003e, 0xc00eb002, 0xec00b8a0, 0x3e400f88, 0x416600d8, 0xe23cc28e,
+ 0x88031004, 0x70000000, 0x00000000, 0xa001bc00, 0xff003fc0, 0x0ff003fc,
+ 0x00ff003f, 0xc00ff003, 0xfc00ff02, 0x3fc00ee4, 0x13f410fe, 0x9139c02f,
+ 0xc00ba000, 0xfe003fe8, 0x4fd803fc, 0x009f003f, 0xc00ff003, 0xfc00fd00,
+ 0x3f600f40, 0x2394007a, 0x282fd30d, 0xf013f800, 0x60000000, 0x00000000,
+ 0xd010ac00, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0xc00fb003, 0xec00fb80,
+ 0x3ec10e94, 0x07e441f9, 0x0032c80e, 0x94030c84, 0xc9201241, 0x8cb003ac,
+ 0x00fb0036, 0xc00fb003, 0xec00f802, 0x3a868e96, 0x036500fb, 0x003ad00f,
+ 0xa1003004, 0x20000000, 0x00000000, 0xc8052c00, 0xbb002ec0, 0x0bb002ec,
+ 0x00bb002e, 0xc00bb002, 0xec003b40, 0x2ee008b0, 0x03e704bb, 0x0036d80f,
+ 0x25222f88, 0x8b0876f8, 0x0db8836c, 0x00bb0026, 0xc00bb003, 0xec00b9d0,
+ 0x16f04890, 0x0226028b, 0x0202c00b, 0x30037200, 0x40000000, 0x00000000,
+ 0xe8054c00, 0xb30024c0, 0x0b3002cc, 0x00b3002c, 0xc00b3002, 0x4c00b320,
+ 0x2ef20a00, 0x02c42490, 0x1000000a, 0x3c024302, 0x9b0020f8, 0x0808020c,
+ 0x00b3002c, 0xc0093002, 0xcc00b100, 0x28b00a00, 0x02c00890, 0x902cc113,
+ 0x00863800, 0x50000000, 0x00000000, 0xf0011e00, 0xb7802de0, 0x0b7802de,
+ 0x00b7802d, 0xe00b7802, 0xde01b780, 0x2de00858, 0x02d640b5, 0x8024ec4b,
+ 0xe8825e41, 0xb780a3e4, 0x0978025e, 0x00b7802d, 0xe00b7802, 0xde00b58a,
+ 0x23a00849, 0x02524087, 0x9221228b, 0x69025800, 0x40000000, 0x00000000,
+ 0x48080c00, 0xf3003cc0, 0x0f3003cc, 0x00f3002c, 0xc00f3002, 0x4c00b300,
+ 0x3cc20e20, 0x02cc00ba, 0x2020d82e, 0x110b4010, 0xdb0020c5, 0x0c12020c,
+ 0x90f3003c, 0xc00d3003, 0xcc00fb00, 0x28000e34, 0x03cc20f2, 0x0038cd1f,
+ 0x20031202, 0x00000000, 0x00000000, 0x401dbc00, 0xff003fc0, 0x0ff003fc,
+ 0x00ff003f, 0xc00ff003, 0xfc00ff02, 0x3fc003f0, 0x03bc10ff, 0x033fc90e,
+ 0x5003bc00, 0x4f102fc4, 0x0f7003fc, 0x00ff0037, 0xc00ff003, 0xbc00ff00,
+ 0x3f408ff0, 0x43bc00ef, 0x027f840f, 0xe003d006, 0x60000000, 0x00000000,
+ 0xa815ec00, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0xc00fb003, 0xac00fb00,
+ 0x3ec00db0, 0x03e400cb, 0x0032000c, 0xb041ec00, 0xcb0022c1, 0x0ca00b2c,
+ 0x00fb003e, 0xc00fb003, 0xec00f900, 0x3eda0610, 0x03a408c9, 0x0032c087,
+ 0x00022a00, 0x70000000, 0x00000000, 0xc8119c00, 0xb7006dc0, 0x0b7002dc,
+ 0x00b7002d, 0xc00b7002, 0xdc00b700, 0x2fc00870, 0x06d404df, 0x0023c008,
+ 0x70038c00, 0xaf0035c0, 0x0830021c, 0x00b7002d, 0xc00b7002, 0xdc00f703,
+ 0x2dd00b70, 0x421c0087, 0x0069c01b, 0x700bf204, 0x60000000, 0x00000000,
+ 0x80009e00, 0xa7802de0, 0x0b7802de, 0x00b7802d, 0xe00b7802, 0xde00b780,
+ 0x2de04978, 0x069e0487, 0x8861e008, 0x5802de02, 0x978021e1, 0x0878021e,
+ 0x00b7802d, 0xe00b7802, 0xde00b780, 0x2da00a78, 0xc28e0083, 0x8421e04b,
+ 0xe846f000, 0x20000000, 0x00000000, 0x4804cc00, 0xb3002cc0, 0x0b3002cc,
+ 0x00b3002c, 0xc00b3002, 0xcc00b300, 0x2cc01839, 0x02ec1093, 0x0020d128,
+ 0x3f028e20, 0xb300a4c0, 0x483c020c, 0x00b3000c, 0xc00b3002, 0xcc00ab80,
+ 0x4cd60b38, 0x028c2683, 0x6028e50b, 0x3c8ad204, 0x30000000, 0x00000000,
+ 0xe805a800, 0xfa003e80, 0x0fa003e8, 0x00fa003e, 0x800fa003, 0xe800fa00,
+ 0x3e800de0, 0x03e800ce, 0x80b3a228, 0xe400d880, 0xde043081, 0x2cea0228,
+ 0x00fa003e, 0x800fa003, 0xe800be48, 0x3ea00ee4, 0x03b9204e, 0xc971b08f,
+ 0xee037a04, 0x60000000, 0x00000000, 0x4800e000, 0xf8003e00, 0x0f8003e0,
+ 0x00f8003e, 0x000f8003, 0xe000f840, 0x3e000f80, 0x83e004f8, 0x813e020f,
+ 0x8403e000, 0xe8403e00, 0x0f8483e0, 0x00f8003e, 0x000f8003, 0xe000f84c,
+ 0x3e000f84, 0x0b6000f0, 0x407e080f, 0x84025200, 0x30000000, 0x00000000,
+ 0x0800e400, 0xf9003e40, 0x0f9003e4, 0x00f9003e, 0x400f9003, 0xe400f990,
+ 0x3e400e90, 0x032400d9, 0x803a440c, 0x9403e642, 0xc9923240, 0x0c1a1324,
+ 0x08f9003e, 0x400f9003, 0xe400f910, 0x32600f10, 0x832700d9, 0x403a6008,
+ 0x18030204, 0x30000000, 0x00000000, 0x80046400, 0xb9002e40, 0x0b9002e4,
+ 0x00b9002e, 0x400b9002, 0xe400b940, 0x2e540810, 0x02a70881, 0x89227048,
+ 0x9802e400, 0x81c02240, 0x889203a4, 0x00b9002e, 0x404b9002, 0xe400b9c0,
+ 0xa2c40b92, 0x02040289, 0x4836610a, 0x99422000, 0x10000000, 0x00000000,
+ 0x18152400, 0xb9002e40, 0x0b9002e4, 0x00b9002e, 0x400b9002, 0xe400b900,
+ 0x2c402a90, 0x02244099, 0x20285008, 0xb442e420, 0x89412250, 0x08902224,
+ 0x00b9002e, 0x400b9002, 0xe400b940, 0x22408990, 0x02240299, 0x0522440a,
+ 0x90060600, 0x40000000, 0x00000000, 0x08040400, 0xb1002c40, 0x0b1002c4,
+ 0x00b1002c, 0x400b1002, 0xc400b104, 0x2c440890, 0x02844081, 0x10204408,
+ 0x1026c401, 0x89102040, 0x281002c4, 0x00b1002c, 0x400b1002, 0xc400b110,
+ 0x20401b10, 0x0a040081, 0x0026c00a, 0x30060201, 0x00000000, 0x00000000,
+ 0x380d6000, 0xf8003e00, 0x0f8003e0, 0x00f8003e, 0x000f8003, 0xe000fa00,
+ 0x3e900e80, 0x030900d8, 0x412a1a1c, 0x8007e0a4, 0xc840b200, 0x0c828b20,
+ 0x00f8003e, 0x000f8012, 0xe005f86a, 0x32000d82, 0x8320a8d8, 0x28ba000e,
+ 0x828b0e03, 0x50000000, 0x00000000, 0x981de400, 0xf9003e40, 0x0f9003e4,
+ 0x00f9003e, 0x400f9003, 0xe400f900, 0x3e480fd0, 0x43f480fd, 0x202fc92f,
+ 0xd003f404, 0xfd213d40, 0x4ff007a4, 0x00f9003e, 0x400f9003, 0xe401fd20,
+ 0x3e400fd0, 0x03f412fd, 0x013b400f, 0xd003e606, 0x70000000, 0x00000000,
+ 0x1805e400, 0xf9003e40, 0x0f9003e4, 0x00f9003e, 0x400f9003, 0xe401fd00,
+ 0x3f410f90, 0x03f40185, 0x00b74c0c, 0xd017f400, 0xcd103340, 0x0fd28324,
+ 0x04f9002e, 0x400f9003, 0xe400fd28, 0x22404fd0, 0x0194006d, 0x00b7410c,
+ 0xd2890600, 0x70000000, 0x00000000, 0x3810e000, 0xb8002e00, 0x0b8002e0,
+ 0x00b8002e, 0x000b8000, 0xe005b800, 0x3a020b80, 0x1260b588, 0x216a0c28,
+ 0x8016e804, 0xa0002200, 0x8b800220, 0x00380026, 0x000b8002, 0xe000b820,
+ 0x2a000b84, 0x02200288, 0x1022010a, 0x80120e04, 0x30000000, 0x00000000,
+ 0x4805c400, 0xb1002c40, 0x0b1002c4, 0x00b1002c, 0x400b1002, 0xc400b100,
+ 0x2c401b10, 0x06c48281, 0x28204809, 0x1802c450, 0x9100a040, 0x0b100204,
+ 0x00b1002c, 0x400b1002, 0xc400b128, 0x28401b31, 0x06844481, 0x04284008,
+ 0x90060201, 0x70000000, 0x00000000, 0x1815a400, 0xb9002e40, 0x0b9002e4,
+ 0x00b9002e, 0x400b9002, 0xe400b900, 0x2a401b94, 0x22440089, 0x02284189,
+ 0xb142e402, 0xb1002240, 0x0b901224, 0x10990026, 0x400b9002, 0xe400b900,
+ 0x2a400b95, 0x0a2c0189, 0x242a4282, 0x92000604, 0x60000000, 0x00000000,
+ 0xa015e400, 0xf9003e40, 0x0f9003e4, 0x00f9003e, 0x400b9003, 0xe400b900,
+ 0x2e400f98, 0x03e40081, 0xa122700d, 0x9002e500, 0xd9203240, 0x0f900b24,
+ 0x00f9003e, 0x400f9003, 0xe400b900, 0xb2480f90, 0x4387c0c9, 0xe23e7004,
+ 0x900b2804, 0x70000000, 0x00000000, 0xe801a400, 0xf9003e40, 0x0f9003e4,
+ 0x00f9003e, 0x400f9003, 0xe408f900, 0x3a420f9a, 0x016488f9, 0x403a648e,
+ 0x9813c500, 0xe9003e40, 0x0f9c03e4, 0x00f90036, 0x400f9003, 0xe408f1a0,
+ 0x36690d90, 0x0be600f1, 0x00366607, 0x9803ea00, 0x60000000, 0x00000000,
+ 0x2810a000, 0xf8003e00, 0x0f8003e0, 0x00f8003e, 0x000e8003, 0xe000e801,
+ 0x3e010f84, 0x03e01088, 0x0c3e124c, 0x8001e140, 0xf8603200, 0x0f0403e0,
+ 0x0078003e, 0x000f8003, 0xe000f800, 0x12180f80, 0x836128c8, 0x0e3a100f,
+ 0x80130a04, 0x20000000, 0x00000000, 0x28052800, 0xba002e80, 0x0ba002e8,
+ 0x00ba002e, 0x800ba006, 0xe800be30, 0x2fa00ba0, 0x72f9008e, 0x0033b008,
+ 0xe803ba00, 0xbe802380, 0x0be002e8, 0x00ba002e, 0x800ba002, 0xe800bec2,
+ 0x16808b60, 0x033800ae, 0x8081a20b, 0x6003ca00, 0x40000000, 0x00000000,
+ 0x28054c00, 0xb3002cc0, 0x0b3002cc, 0x00b3002c, 0xc00b3012, 0xcc08b340,
+ 0x2ce00930, 0x02ce8893, 0xc028c54b, 0x31868e80, 0xb38020e4, 0x0b3002cc,
+ 0x0093002c, 0xc00b3002, 0xcc00b348, 0x20f00b34, 0x020c0193, 0x0120d009,
+ 0x3602ca00, 0x50000000, 0x00000000, 0xa0011c00, 0xb7002dc0, 0x0b7002dc,
+ 0x00b7002d, 0xc00b7002, 0xdc00b702, 0x2dc20b70, 0x26dd0087, 0x4021c009,
+ 0x40069400, 0xb74621c0, 0x0b7002dc, 0x00b7002d, 0xc00b7002, 0xdc00b309,
+ 0x25508b70, 0x021d03b6, 0x0821c08b, 0xf402e800, 0x40000000, 0x00000000,
+ 0xa8081e00, 0xf7803de0, 0x0f7803de, 0x00f7803d, 0xe00f7802, 0xde00f780,
+ 0x2de00d78, 0x03fe02d7, 0x80bbc08f, 0x78039e00, 0xf780b1e0, 0x4f7842de,
+ 0x00f7802d, 0xe00f7803, 0xde00f780, 0x21e00f78, 0x031e18d7, 0x8179e08f,
+ 0x7823ea02, 0x00000000, 0x00000000, 0x081dac00, 0xfb003ec0, 0x0fb003ec,
+ 0x00fb003e, 0xc00fb003, 0xec00bb00, 0x3ec007b0, 0x03ec00fb, 0x001ec00e,
+ 0x9003a800, 0xfb041e80, 0x0b9003ec, 0x08fb003e, 0xc00fb003, 0xec10f801,
+ 0x3e584f20, 0x0aac00e2, 0x007ec00f, 0x3003c206, 0x60000000, 0x00000000,
+ 0x0005fe00, 0xff803fe0, 0x0ff803fe, 0x00ff803f, 0xe00ff803, 0xfe00f780,
+ 0x33e004f8, 0x03fe00c7, 0x8033e40c, 0xf213fa04, 0xc78423e4, 0x0ff8033e,
+ 0x00ff903f, 0xe00ff803, 0xfe047f81, 0x33f40f49, 0x013e848f, 0x9037648f,
+ 0x48080000, 0x70000000, 0x00000000, 0xa8119c00, 0xb7006dc0, 0x0b7002dc,
+ 0x00b7002d, 0xc00b7002, 0xdc40b540, 0x37000871, 0x42d84087, 0x002bde88,
+ 0x60065100, 0xd7113540, 0x0b71039c, 0x00b7002d, 0xc00b7002, 0xdc00fc00,
+ 0x29800b43, 0x029c80a6, 0x3021540b, 0x7103ea04, 0x60000000, 0x00000000,
+ 0x00009c00, 0xb7002dc0, 0x0b7002dc, 0x00b7002d, 0xc00b7002, 0xdc00b600,
+ 0x21c00870, 0x02d4008c, 0x10210108, 0x5182c440, 0x8c0021c1, 0x0b30821c,
+ 0x00b7000d, 0xc00b7002, 0xdc00b708, 0x21408b40, 0x1214c0a1, 0x0325448b,
+ 0xd0820000, 0x20000000, 0x00000000, 0x2014cc00, 0xb3002cc0, 0x0b3002cc,
+ 0x00b3002c, 0xc00b3002, 0xcc00b000, 0x24000934, 0x02c00280, 0xe1203100,
+ 0x1242c300, 0x90022000, 0x0b1202cc, 0x00b3002c, 0xc00b3002, 0xcc003840,
+ 0x48120b08, 0x028c00a3, 0x5020f01b, 0x3c028804, 0x30000000, 0x00000000,
+ 0xa815ac00, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0xc00fb002, 0xec00fb00,
+ 0x32c02c34, 0x83ec008b, 0xc032c028, 0x9c02e768, 0xcba0a2e8, 0x0fb0032c,
+ 0x00fb003e, 0xc00fb002, 0xec007940, 0x22900f90, 0x020c30eb, 0xc036c90f,
+ 0xb8022a04, 0x60000000, 0x00000000, 0x8000ec00, 0xfb003ec0, 0x0fb003ec,
+ 0x00fb003e, 0xc00fb003, 0xec00fa40, 0x3ed00eb0, 0x43e510f9, 0x52be084f,
+ 0x94036400, 0xf8403ec0, 0x0fb003ac, 0x00fb003e, 0xc00fb003, 0xec00e920,
+ 0x3e000f85, 0x13ed003b, 0x003e80c3, 0xb213e000, 0x30000000, 0x00000000,
+ 0x0110fc00, 0xff003fc0, 0x0ff003fc, 0x00ff003f, 0xc00ff003, 0xfc00fd20,
+ 0x33080cf0, 0x833a00df, 0x0033e40c, 0xd0039c04, 0xcfc033c0, 0x0f60033c,
+ 0x00ff003f, 0xc00ff003, 0xfc00fd00, 0x33800fd0, 0x032c00cd, 0x0833c20c,
+ 0x78038044, 0x30000000, 0x00000000, 0x80046c00, 0xbb002ec0, 0x0bb002ec,
+ 0x00bb002e, 0xc00bb002, 0xec00b000, 0x2a2068b0, 0x12830081, 0x5036210a,
+ 0x18226f00, 0xa8412a80, 0x0b84022c, 0x00bb002e, 0xc009b002, 0xec009880,
+ 0x2a180b08, 0x026e0081, 0x0080d10a, 0xb5822040, 0x10000000, 0x00000000,
+ 0x80052c00, 0xbb002ec0, 0x0bb002ec, 0x00bb002e, 0xc00bb002, 0xec00bb00,
+ 0x20d018b0, 0x022ca49b, 0x0820c008, 0xa802e600, 0x830822c0, 0x0ab4022c,
+ 0x00bb002e, 0xc00bb002, 0xec00b980, 0x22c00b88, 0x8262008b, 0x60228808,
+ 0xa042a000, 0x40000000, 0x00000000, 0x08040c00, 0xb3002cc0, 0x0b3002cc,
+ 0x00b3002c, 0xc00b3002, 0xcc00b000, 0x280008b0, 0x02a00081, 0x04a4002a,
+ 0xa0224400, 0xa0002840, 0x0b300a8c, 0x00b3002c, 0xc00b3002, 0xcc009000,
+ 0x28800b00, 0x12400283, 0x0022808a, 0x30020201, 0x00000000, 0x00000000,
+ 0x000d6c00, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0xc00fb002, 0xec00f800,
+ 0x32000cb0, 0x230001d9, 0x0032004c, 0x9023a400, 0xc80332c0, 0x0fa0032c,
+ 0x00fb003e, 0xc00fb003, 0xec00f900, 0x32400f90, 0x032000c9, 0x0032800c,
+ 0x80078003, 0x50000000, 0x00000000, 0xa01dfc00, 0xff003fc0, 0x0ff003fc,
+ 0x00ff003f, 0xc00ff003, 0xfc00fc00, 0x3f008df0, 0x43f0003d, 0x023f000f,
+ 0xd003b400, 0xfc003f00, 0x0fc0037c, 0x00ff003f, 0xc00df003, 0xfc005c00,
+ 0x7f000fc0, 0x03b0087d, 0x003f800f, 0xf003e806, 0x70000000, 0x00000000,
+ 0xc005fe00, 0xff803fe0, 0x0ff803fe, 0x00dc6033, 0xe00cd243, 0xf200cc80,
+ 0x33084cc1, 0x2370c0ec, 0x8037200f, 0xf803d080, 0xdf90b720, 0x0cc80370,
+ 0xc0df0137, 0xc80ff803, 0xfe00ff80, 0x3fe00e58, 0x039200ff, 0x803fe00f,
+ 0xf803f000, 0x70000000, 0x00000000, 0xc010ee00, 0xbb802ee0, 0x0bb802ec,
+ 0x228b3022, 0x08889922, 0xee02db80, 0xa2342887, 0x0208c08b, 0x8022e04b,
+ 0xb802e300, 0x8b0020c1, 0x28b08224, 0x408b8023, 0xe40bb802, 0xee00bb80,
+ 0x2ee10b98, 0x022200bb, 0x802ee00b, 0xb802f004, 0x30000000, 0x00000000,
+ 0xc805cc00, 0xb3002cc0, 0x0b3002cc, 0x80800028, 0x820a1002, 0xec008300,
+ 0x28000900, 0x02c4008b, 0x0020c00a, 0x3002c100, 0xa1002aca, 0x2a3202c0,
+ 0x80b34064, 0xc00b3016, 0xcc04b304, 0x2cc00bb0, 0x020001b3, 0x002cc00b,
+ 0x3002f201, 0x70000000, 0x00000000, 0xc015ac00, 0xbb002ec0, 0x0bb002ec,
+ 0x10aa042a, 0xca8a9100, 0xe8009940, 0x22408828, 0x02a81129, 0x0ce6c20b,
+ 0xb002e802, 0xb3002a88, 0x0a2202a4, 0x40aa8162, 0xc00bb002, 0xec00bb01,
+ 0x2ec00bb8, 0xc22800bb, 0x042ec00b, 0xb002f004, 0x60000000, 0x00000000,
+ 0x0415ec00, 0xfb003ec0, 0x0fb003ec, 0x18c9c8b8, 0xc04cb801, 0xec02cb80,
+ 0x30300d88, 0x03e782eb, 0x4432c10f, 0xb002e004, 0xea483ec8, 0x0eb263e9,
+ 0x00fb8036, 0xc00fb002, 0xec00fb00, 0x3ec00f98, 0x122160fb, 0x003ec00f,
+ 0xb003f004, 0x70000000, 0x00000000, 0xa001bc00, 0xff003fc0, 0x0ff003fc,
+ 0x089d9037, 0xe00dd812, 0xc484fe20, 0x17e60ed0, 0x537244d7, 0x423b480f,
+ 0xf003fd00, 0x8f2035e0, 0x0dd8237a, 0x00d5003f, 0xc00ff003, 0xfc00ff00,
+ 0x3fc00fd0, 0x837200ff, 0x003fc00f, 0xf003e800, 0x60000000, 0x00000000,
+ 0xd010ac00, 0xfb003ec0, 0x0fb003ec, 0x00e0483a, 0xc00eb003, 0x2d80cb41,
+ 0x36802db0, 0x0b0500ea, 0x4032900f, 0xb0034400, 0xfb103644, 0x0eb403a1,
+ 0x02eb1032, 0xc00fb003, 0xac00fb00, 0x3ec44fa0, 0x032090db, 0x203ec00f,
+ 0xb003f104, 0x20000000, 0x00000000, 0xc8052c00, 0xbb002ec0, 0x0bb002ed,
+ 0x008aa022, 0xfc08be07, 0x6c128308, 0x0ee08dbe, 0x222b608b, 0x5036f40b,
+ 0xb002ed60, 0xcb5022c4, 0x08bf222c, 0x800ad033, 0xc00bb002, 0xec00bb40,
+ 0x2ee40b26, 0x0a28008b, 0xa02ec00b, 0xb002f600, 0x40000000, 0x00000000,
+ 0xe0054c00, 0xb3002cc0, 0x0b3002ef, 0x8422412c, 0x400a3c86, 0xce008384,
+ 0x04000800, 0x820a00b3, 0x9064d00b, 0x30024000, 0xa00024e0, 0x2a3000ac,
+ 0x01a3c0a4, 0xc00b3002, 0x8c00b322, 0x2cd00b10, 0x02050093, 0x402cc00b,
+ 0x3002f800, 0x50000000, 0x00000000, 0xf0011e00, 0xb7802de0, 0x0b7802de,
+ 0x20879025, 0xe4085802, 0xfe048780, 0x2ca449e8, 0x221a4036, 0x8025a00b,
+ 0x7802d600, 0x8f802161, 0x0878120e, 0x00879021, 0xe00b7802, 0xde00b781,
+ 0x2de01b79, 0x02360497, 0x802de00b, 0x7806fc00, 0x40000000, 0x00000000,
+ 0x48080c10, 0xf3002cc0, 0x0f3003ec, 0x00aa103e, 0xc10e3102, 0xc422c200,
+ 0x34d64800, 0x430c40f3, 0x0030460f, 0x30024c00, 0xe30034c0, 0x0e901385,
+ 0x00e31030, 0xc00f3003, 0x8c00f300, 0x3cc00f10, 0x030400d3, 0x003cc00f,
+ 0x3003d202, 0x00000000, 0x00000000, 0x401dbc00, 0xff003fc0, 0x0ff003fc,
+ 0x00ff103b, 0xc00f7043, 0x7c08ff80, 0x3fc40e61, 0x03fc51c7, 0x103fe00f,
+ 0xf003fc00, 0xf7103bc4, 0x9ff803fc, 0x00f6103b, 0xc40ff003, 0xfc00ff00,
+ 0x3fc00ff0, 0x23f440ef, 0x003fc00f, 0xf003d006, 0x60000000, 0x00000000,
+ 0xa805ec00, 0xfb003ec0, 0x0fb003ec, 0x00f90032, 0xc00cb003, 0xea18c904,
+ 0x3e409ca0, 0x032400c9, 0x0032c00f, 0xb003e802, 0xcb003680, 0x0ca80b2a,
+ 0x01cb0032, 0xec0cb003, 0xec00fb80, 0x32c00f18, 0x072000fb, 0x003ec00f,
+ 0xb003ea00, 0x70000000, 0x00000000, 0xc8119c00, 0xb7002dc0, 0x0b7002dc,
+ 0x00b50021, 0xc1005002, 0xdc008701, 0x2dc00870, 0x0a1400a7, 0x0029c00b,
+ 0x7002cc00, 0x8f0229c0, 0x0d700218, 0x00870029, 0xc40d7002, 0xdc10b700,
+ 0x35c04b70, 0x061000b7, 0x002dc00b, 0x7002f024, 0x60000000, 0x00000000,
+ 0x80009e00, 0xb7802de0, 0x0b7802de, 0x00a38021, 0xe2087882, 0xde208780,
+ 0x2cc00a78, 0x420e20ab, 0x8029e00b, 0x7802dc01, 0x878022f0, 0x3b785286,
+ 0x0297c220, 0xe0087802, 0xde00bf80, 0x21e00bd8, 0x0a1600b7, 0x802de00b,
+ 0x7802e000, 0x20000000, 0x00000000, 0x4814cc00, 0xb3002cc0, 0x0b3002cc,
+ 0x00b30020, 0xd1083002, 0xd20084a2, 0x2cf10a34, 0x820e10a4, 0x00290c0b,
+ 0x3002cc81, 0x83442908, 0x2b49468c, 0x80928028, 0xc0093002, 0xcc00b300,
+ 0x24c00b36, 0x020c00b3, 0x042cc00b, 0x3002d204, 0x30000000, 0x00000000,
+ 0xe815a800, 0xfa003e80, 0x0fa003e8, 0x00fee0b3, 0xa40ca803, 0xe812caa0,
+ 0x3fb72a6a, 0x133902ea, 0xc03ab00f, 0xa013fa80, 0xce847680, 0x0fa543b9,
+ 0x00d680b2, 0x800ca002, 0xe800fa00, 0x32800fe4, 0x033900fa, 0x003e800f,
+ 0xa003fa04, 0x60000000, 0x00000000, 0x4800e000, 0xf8003e00, 0x0f8003e0,
+ 0x00f8483e, 0x006f8403, 0xe000f800, 0x3e108984, 0x03e02018, 0x181e000f,
+ 0x8003e110, 0xf8597e00, 0x05800360, 0x40e8007e, 0x000f8003, 0xe000f800,
+ 0x3e104f84, 0x03e060f8, 0x003e000f, 0x8003d200, 0x30000000, 0x00000000,
+ 0x0810e400, 0xf9003e40, 0x0f9003e4, 0x00e94032, 0x702e1c03, 0xa460f900,
+ 0x3c680c91, 0x036480c1, 0x00b2500c, 0x9003e440, 0xf9013040, 0x0c9203e4,
+ 0x80f90032, 0x410f9003, 0xe400f900, 0x3e400f90, 0x03e408f9, 0x003e400f,
+ 0x9003c204, 0x30000000, 0x00000000, 0x80046400, 0xb9002e40, 0x0b9002e5,
+ 0x48810020, 0x40089002, 0x2400b900, 0x2e41089a, 0x0a260289, 0x18a84008,
+ 0x9002e700, 0xb9a0a277, 0x089042e4, 0x04b94022, 0x400b9003, 0xa400b901,
+ 0x2e404b96, 0x02e400b9, 0x002e400b, 0x9002e000, 0x10000000, 0x00000000,
+ 0x18052400, 0xb9002e40, 0x0b9002c5, 0x00a90022, 0x420a9002, 0xbc04bd21,
+ 0x0e400890, 0x0244008d, 0x01234008, 0x9002ac00, 0xb1112340, 0x00d002e4,
+ 0x00b94026, 0x400b9002, 0xe400b900, 0x2e400b90, 0x02e400b9, 0x002e400b,
+ 0x9002c600, 0x40000000, 0x00000000, 0x08040400, 0xb1002c40, 0x0b1002c4,
+ 0x408110a0, 0x44081022, 0x1c00b502, 0x2c40a891, 0x0a04408d, 0x0029c0a8,
+ 0x1002c400, 0xb1152345, 0x285102c4, 0x40b10024, 0x400b1002, 0xc400b101,
+ 0x2c400b10, 0x02c400b1, 0x002c400b, 0x1002c201, 0x00000000, 0x00000000,
+ 0xb80d6000, 0xf8003e00, 0x0f8003e1, 0x00ea68b2, 0x100ea2c3, 0xa000fc01,
+ 0x3e8a4c06, 0xa369a0c8, 0x0033000c, 0x8003a8a0, 0xf8402210, 0x0c6403e1,
+ 0xa0f828b6, 0x0a0f8003, 0xe000f000, 0x3e808f80, 0x03e000f8, 0x003e000f,
+ 0x8003ce03, 0x50000000, 0x00000000, 0x981de400, 0xf9003e40, 0x0f9003e4,
+ 0x80fd203d, 0x480fd003, 0xc410f900, 0x3f4083d2, 0x03f488f9, 0x003e400b,
+ 0x9003fc00, 0xfd223e48, 0x0b9203f4, 0x84f5003a, 0x400f9003, 0xa400f900,
+ 0x3e400fd0, 0x13f400f9, 0x003e400f, 0x9023e606, 0x70000000, 0x00000000,
+ 0x9805e400, 0xf9003e40, 0x0f9003f4, 0x00cd1237, 0x402cd283, 0xf400dd00,
+ 0x37400cd1, 0x133480cd, 0x0033400f, 0x9003b402, 0xcd143340, 0x8cd003f4,
+ 0xc0fd0436, 0x400c9003, 0xe400f900, 0x3e400fd0, 0x032400f9, 0x003e400f,
+ 0x9003c600, 0x70000000, 0x00000000, 0x3810e000, 0xb8002e00, 0x0b8002e0,
+ 0x22881022, 0x0b888050, 0xe8008802, 0x2e804aa1, 0x12a0a4a8, 0x002a000b,
+ 0x8002e002, 0xa000328b, 0x08a202e0, 0xc0b8002a, 0x000d8002, 0xe000b800,
+ 0x2f000b80, 0x022000bc, 0x00260009, 0x8002de04, 0x30000000, 0x00000000,
+ 0x4805c400, 0xb1002c40, 0x0b1002c4, 0x00910024, 0x68093012, 0xc4049104,
+ 0x64440a10, 0x0a04c0a1, 0x0264400b, 0x10028441, 0x89002048, 0x0a3282c4,
+ 0x80b90024, 0x40081002, 0xc400b500, 0x2d400b90, 0x0a1400b5, 0x002c400b,
+ 0x1002d201, 0x70000000, 0x00000000, 0x1815a400, 0xb9002e40, 0x0b9002c4,
+ 0x00998022, 0xc0099002, 0xe4108904, 0x6e408a12, 0x028400ab, 0x286e620b,
+ 0x9012e405, 0xa9182460, 0x089002e4, 0x20b9802a, 0x40099002, 0xe400b900,
+ 0x2f411bb1, 0x026620bf, 0x002e4009, 0x9002c604, 0x60000000, 0x00000000,
+ 0xa015e400, 0xf9003e40, 0x0f9003e4, 0x00d92034, 0x400d9803, 0xe440d922,
+ 0x36740e9c, 0x03248861, 0x8036510f, 0x9003a600, 0xc1c23250, 0x2e9c13e6,
+ 0x40f9e036, 0x400c9003, 0xe400f900, 0x3e400f90, 0xc32500f9, 0x003e400f,
+ 0x9003e804, 0x70000000, 0x00000000, 0xe801a400, 0xf9003e40, 0x0f9003e4,
+ 0x08e9003e, 0x682e9402, 0xe620f990, 0x3e608f98, 0x03e640b9, 0x803a404f,
+ 0x9003c508, 0xd980ba40, 0x0f9a03e6, 0x00f9003e, 0x400f9003, 0xe400f900,
+ 0x3e400f90, 0x03a400f9, 0x0136400f, 0x9003fa00, 0x60000000, 0x00000000,
+ 0x2810a000, 0xf8003e00, 0x0f8003e0, 0x00f0213a, 0x082c8803, 0x2100f842,
+ 0x3e122e87, 0x032020e8, 0x003e160f, 0x8003e082, 0xc8403a12, 0x2e8623e0,
+ 0x08e84030, 0x000f8003, 0xe000fc00, 0x3f000f85, 0x033000fc, 0x003e000f,
+ 0x8003ca04, 0x20000000, 0x00000000, 0x28052800, 0xba002e80, 0x0ba002fa,
+ 0x80be4023, 0xb008e00a, 0x1a00ba80, 0x2db80dec, 0x237800de, 0x802f900b,
+ 0xa003bb80, 0xce802bb0, 0x40e002ea, 0x0006c022, 0x800ba002, 0xe800ba00,
+ 0x2e800b68, 0x022840ba, 0x082e800b, 0xa002ca00, 0x40000000, 0x00000000,
+ 0x28054c00, 0xb3002cc0, 0x0b30028e, 0x20b31028, 0xc0083026, 0x0e15b304,
+ 0x6cc04a30, 0x420e4023, 0xc82cc00b, 0x30028c00, 0x93e028c4, 0x023400ce,
+ 0x00a23020, 0xc00b3002, 0xcc00b300, 0x2cc00b38, 0x020d10b3, 0x812cc003,
+ 0x3002ca00, 0x50000000, 0x00000000, 0xa0011c00, 0xb7002dc0, 0x0b7002dc,
+ 0x00b30023, 0xd0081802, 0x1c20b740, 0x6dc00930, 0x225c0a97, 0x0e6dc009,
+ 0x70228c04, 0x870829c1, 0x087002ce, 0x308f0021, 0xc00b7002, 0xdc10b704,
+ 0x2dc00bd0, 0x0a1c10b7, 0x002dc00b, 0x7002e800, 0x40000000, 0x00000000,
+ 0xa8081e00, 0xf7803de0, 0x0f78039e, 0x00b48029, 0x20085803, 0x1e00f780,
+ 0x2ce00a78, 0x233e00e7, 0x803de00f, 0x78039e00, 0xd7803be1, 0x0e7823de,
+ 0x00e780b1, 0xe00f7803, 0xde00f780, 0x3da00f68, 0x031e04f7, 0x823de00f,
+ 0x7803e202, 0x00000000, 0x00000000, 0x081dac00, 0xfb003ec0, 0x0fb003e0,
+ 0x00f8003c, 0x400f9001, 0xec04bb00, 0x0ec05fb0, 0x6bec11db, 0x021ec00f,
+ 0xb002ac00, 0xfb003600, 0x07b003ec, 0x00f3003e, 0xc00fb003, 0xec00fb00,
+ 0x3e8a0710, 0x02ec0cfb, 0x603ec00f, 0xb003c202, 0x60000000, 0x00000000,
+ 0x4005fe00, 0xff803fe0, 0x0ff803fe, 0x00fe8033, 0xe00cda03, 0xfe42cf94,
+ 0x3fe40c7b, 0x43be00df, 0x8433e48f, 0xf103fe00, 0xcfb033e0, 0x0cc803fe,
+ 0x00cf8233, 0xe00ff803, 0xfe00ff80, 0x3fe04f78, 0x233a00cd, 0xd03fe40f,
+ 0xf803c000, 0x70000000, 0x00000000, 0xa8119c00, 0xb7002dc0, 0x0b7002dc,
+ 0x00b72121, 0xc4085002, 0xdd008702, 0x2dcc0a41, 0x43540087, 0x10a1c00b,
+ 0x70079c88, 0x865c21c0, 0x085012f4, 0x40850029, 0xc00b7002, 0xdc40b710,
+ 0x2dc44b50, 0x835858d5, 0x002dc00b, 0x7002ea00, 0x60000000, 0x00000000,
+ 0x10009c00, 0xb7002dc0, 0x0b7002dc, 0x00b64227, 0x80085222, 0xfc089701,
+ 0x2cc11af2, 0xa288209f, 0x4025c00b, 0x71068034, 0x852021c4, 0x0a6002dc,
+ 0x00870021, 0xc00b7002, 0xdc00b700, 0x2d800b60, 0x02680085, 0x012dc01b,
+ 0x7002c004, 0x20000000, 0x00000000, 0x6814cc00, 0xb3002cc0, 0x0b3002c0,
+ 0x00ba0522, 0x90080042, 0xc0489350, 0x2cb21a82, 0x02430080, 0x0024920b,
+ 0x30028280, 0x88c02210, 0x08b602c7, 0x0481e028, 0xc00b3002, 0xcc00b300,
+ 0x2c800b18, 0x004a4091, 0x002cc00b, 0x3002c004, 0x30000000, 0x00000000,
+ 0x2815ac00, 0xfb003ec0, 0x0fb003e0, 0x00fbc036, 0x80689003, 0xec10db40,
+ 0x3ec82ebc, 0x73af00db, 0x80b4c00f, 0xb0038f00, 0xcb0032c0, 0x2eb402e4,
+ 0x82c20032, 0xc00bb002, 0xec00fa00, 0x3e400fb8, 0x014c00ca, 0x002ec00f,
+ 0xb003e204, 0x60000000, 0x00000000, 0x9000ec00, 0xfb003ec0, 0x0fb003e1,
+ 0x00f9c03e, 0x280f9510, 0xed84eb00, 0x3ed005b0, 0x03e920fb, 0x503ae00f,
+ 0xb003a100, 0xf9403ee8, 0x039821e4, 0x20fb103e, 0xc00fb003, 0xec00fa46,
+ 0x3e400fb0, 0x03ec00fa, 0x003ec00f, 0xb003e000, 0x30000000, 0x00000000,
+ 0x8010fc00, 0xff003fc0, 0x0ff003f2, 0x00fc01b3, 0x002cd003, 0x0e80cfa9,
+ 0x3de40cc0, 0x0b9682c3, 0x0033e80c, 0xf0037e00, 0xce2cb3e0, 0x2ce80b3c,
+ 0x40ff00b3, 0xc00ff003, 0xfc00fe00, 0x3f000ff0, 0x033c00ce, 0x003fc00f,
+ 0xf003c044, 0x30000000, 0x00000000, 0x80446c00, 0xbb002ec0, 0x0bb002e3,
+ 0x80b88022, 0x21880002, 0x23108b00, 0x2ed00880, 0x4360808a, 0xc0221008,
+ 0xb002e320, 0xd8002228, 0x2084022e, 0x00bb8022, 0xc00bb002, 0xec00ba40,
+ 0x2e051b3c, 0x02ac088a, 0x002ec00e, 0xb002e800, 0x10000000, 0x00000000,
+ 0x80052c00, 0xbb002ec0, 0x0bb002ec, 0x40ba8822, 0xa0089602, 0x2c028b01,
+ 0x2ec200b8, 0x02ac009b, 0x12a2d00a, 0xb002ec80, 0x8b002204, 0x0a860224,
+ 0x00bb2022, 0xc00bb002, 0xec00ba40, 0x2e400b98, 0x06680088, 0x002ec00b,
+ 0xb002e000, 0x40000000, 0x00000000, 0x08040c00, 0xb3002cc0, 0x0b3002cc,
+ 0x00b00020, 0x00081022, 0x2c018102, 0x2c402808, 0x0240008b, 0x0020c00a,
+ 0x3006c008, 0x90002000, 0x88100204, 0x00b30020, 0xc00b3002, 0xcc00b200,
+ 0x24400b90, 0x06680280, 0x002cc00a, 0x3002ca01, 0x00000000, 0x00000000,
+ 0x800d6c00, 0xfb003ec0, 0x0fb003ec, 0x00fa0022, 0x800c900b, 0x2c00c900,
+ 0x3e004880, 0x0ba000c9, 0x0132402e, 0xb0036000, 0xc0003000, 0x0ca0032c,
+ 0x00fb0032, 0xc00fb003, 0xec00ba00, 0x3e000b90, 0x0b6800c8, 0x027ec00f,
+ 0xb003c001, 0x00000000, 0x00000000, 0xa01dfc00, 0xff003fc0, 0x0ff003f0,
+ 0x00f4003d, 0x000fd001, 0xfc00ff00, 0x3fc00fc0, 0x13f000ff, 0x003fc00d,
+ 0xf001f000, 0xfc013f00, 0x0bc003f4, 0x00f7003f, 0xc00ff003, 0xfc00fe00,
+ 0x3f000fd0, 0x03b810fc, 0x003fc00e, 0xf003e805, 0x70000000, 0x00000000,
+ 0xc005fe00, 0xff803fe0, 0x0ff803fe, 0x00ff803f, 0xe00ff803, 0xfe10bf90,
+ 0x3f200ddc, 0x03b204fc, 0x903f200f, 0x49233200, 0xcc80b324, 0x0ec90b3e,
+ 0x00ff803f, 0xe00ff803, 0xfe00dc10, 0x37200ff1, 0x039a42fc, 0x30334008,
+ 0xd902f000, 0x70000000, 0x00000000, 0xc010ee00, 0xbb802ee0, 0x0bb802ee,
+ 0x00bb802e, 0xe00bb802, 0xee00bb00, 0x2e082c82, 0x022610b3, 0x2126e04e,
+ 0xb003ee00, 0x832222c8, 0x8ab2032e, 0x08bb802e, 0xc00bb802, 0xee003842,
+ 0x22610b75, 0x022c80a8, 0x60b61d8a, 0x9002e004, 0x30000000, 0x00000000,
+ 0xc805cc00, 0xb30028c0, 0x0b30028c, 0x00b3002c, 0xc00a3002, 0x8c00b320,
+ 0x2c028890, 0x028c00b3, 0x202cc01b, 0x32020c00, 0x838820e0, 0x0830020c,
+ 0x00b3002c, 0xc00a3002, 0xcc00b061, 0x24004a32, 0x222c04a1, 0x92244248,
+ 0x2202c201, 0x70000000, 0x00000000, 0xc015ac00, 0xbb002ec0, 0x0bb002ec,
+ 0x00bb002e, 0xc00bb002, 0xec00bb04, 0x2ec009b8, 0x422828bb, 0x042e508a,
+ 0xa0466830, 0x8b0020c8, 0x1a98822c, 0x00bb002e, 0xc00bb002, 0xec04bb00,
+ 0x2248cbb0, 0x022e00a9, 0x0226400a, 0xa286f004, 0x60000000, 0x00000000,
+ 0x8015ec00, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0xc00eb003, 0xac00fb00,
+ 0x3e2c0c18, 0x03a710fb, 0x0b3ed007, 0xbc032e00, 0xcb0332e0, 0x0cb0032c,
+ 0x00fb003e, 0xc00eb002, 0xec00f8c0, 0x36000eb0, 0x012a00e8, 0x8030600c,
+ 0xbc03d004, 0x70000000, 0x00000000, 0xb001bc00, 0xff003fc0, 0x0ff003fc,
+ 0x00ff003f, 0xc00ff003, 0xfc00df00, 0x3f800ed0, 0x23f680ff, 0xa037c90e,
+ 0xd403fd06, 0xfd103f41, 0x0bf003bc, 0x00ff0027, 0xc00ff003, 0xfc00f690,
+ 0x3fa04ff0, 0x027c02f6, 0x921fe48f, 0xd003f800, 0x60000000, 0x00000000,
+ 0xc010ac00, 0xfb003ec0, 0x0db003ec, 0x00fb003e, 0xc00fb003, 0xec00fb00,
+ 0x7a420cb4, 0x036d00f8, 0x01729007, 0xb401a480, 0xfa221280, 0x0ca483ac,
+ 0x00fb003e, 0xc00cb003, 0xac01f940, 0x32000fb0, 0x03ac00c8, 0x003ac94c,
+ 0xb5433004, 0x20000000, 0x00000000, 0xd8052c00, 0xbb002ec0, 0x0bb002ec,
+ 0x00bb002e, 0xc00bb002, 0xec14bb80, 0x76e00db0, 0x022e20bb, 0x20a2f48b,
+ 0xb0034c00, 0xbbe0a2d6, 0x08b4036c, 0x00bb002e, 0xe20db002, 0xec00bb00,
+ 0x36800bf0, 0x120c04da, 0x7222d80d, 0xa4037200, 0x40000000, 0x00000000,
+ 0xe0054c00, 0x930024c0, 0x0b3002cc, 0x00b3002c, 0xc00b3002, 0xcc00b3a1,
+ 0x2a200910, 0x024c20b3, 0xc800e01b, 0xbd824d40, 0xbbc020c0, 0x29b9020c,
+ 0x00b3002c, 0xc0083002, 0x8c00b002, 0x20801bb0, 0x0a400082, 0x00284009,
+ 0x1c827800, 0x50000000, 0x00000000, 0xf0011e00, 0xb7802de0, 0x0b7802de,
+ 0x00b7802d, 0xe01b7806, 0xde00b784, 0x216a09f8, 0x221e01b4, 0xa021a009,
+ 0x78025604, 0xb68021a4, 0x0968025e, 0x00b7802d, 0xe0097802, 0xde00b580,
+ 0x25621b79, 0x02fe0096, 0x9423a049, 0xd802d800, 0x40000000, 0x00000000,
+ 0x48080c00, 0xf3003cc0, 0x0f3002cc, 0x00b3003c, 0xc00f3003, 0xcc00fb08,
+ 0x2a800d14, 0x074441f3, 0x0020c60f, 0x17034c40, 0xb1103244, 0x2db2028c,
+ 0x00f3003e, 0xc0083003, 0x8c00ba40, 0xa0954f30, 0x074480cb, 0x10b8c00d,
+ 0x32035202, 0x00000000, 0x00000000, 0x401dbc00, 0xff003fc0, 0x0ff003fc,
+ 0x00ff003f, 0xc00ff003, 0xfc00ff00, 0x3fc81b70, 0x17f448bf, 0x203fc00f,
+ 0xf103fc44, 0xff003fc5, 0x02f803fc, 0x40ff003f, 0xc00ff003, 0xfc00ff10,
+ 0x1b500ff0, 0x813400ff, 0x143dc40f, 0x70035006, 0x60000000, 0x00000000,
+ 0xa805ec04, 0xfb023ec0, 0x0fb003ec, 0x00fb003e, 0xc00fb003, 0xec00fb00,
+ 0x2ec04c38, 0x23a804eb, 0x0012400f, 0xa002e800, 0xeb003ec0, 0x0e9007ec,
+ 0x00fb003e, 0xe02cb003, 0xec00fb00, 0x32c80fb4, 0x834800c9, 0x0032400c,
+ 0xb0032a00, 0x70000000, 0x00000000, 0xc8919c00, 0xb7002dc0, 0x0b7002dc,
+ 0x00b7002d, 0xc00b7002, 0xdc10b701, 0x2dc00870, 0x121c003f, 0x0631c00b,
+ 0x7002dc00, 0xb7002fc0, 0x0f7002dc, 0x00b7002f, 0xc0087003, 0x9c00b702,
+ 0xa9c00b32, 0x021c00a7, 0x0621818a, 0x7012b204, 0x60000000, 0x00000000,
+ 0x90009e00, 0xa7802de0, 0x0b7802de, 0x00b7802d, 0xe00b7802, 0xde00b780,
+ 0x2de048f8, 0x829610a7, 0x8c21e00b, 0x7802de00, 0xb7822de0, 0x087802de,
+ 0x00b7802d, 0xe0097802, 0xde00b380, 0x21e40b78, 0x027e0081, 0xc020e008,
+ 0x7802f000, 0x20000000, 0x00000000, 0x4814cc00, 0xb3002cc0, 0x0b3002cc,
+ 0x00b3002c, 0xc00b3002, 0xcc00b300, 0x6ef48832, 0x221000b4, 0x20a5000b,
+ 0xcc02d000, 0xb4802d24, 0x4b4d02cc, 0x00b3002c, 0xc0083002, 0x8c00bb90,
+ 0x20d48b30, 0x020c00a3, 0xc022d18a, 0xb202d204, 0x30000000, 0x00000000,
+ 0xe015a800, 0xfa003e80, 0x0fa003e8, 0x00fa003e, 0x800fa003, 0xe800fa04,
+ 0x2f90ace0, 0x03a800ea, 0xc422b20f, 0xae02e980, 0xfaa13e80, 0x0ca923e8,
+ 0x00ba003e, 0x800da003, 0xe800fe40, 0xa2a44ba0, 0x035a22ce, 0xc0b3b02c,
+ 0xec43fa04, 0x60000000, 0x00000000, 0x4800e000, 0xf8003e00, 0x0f8003e0,
+ 0x00f8003e, 0x000f8003, 0xe000f800, 0x3e180f80, 0x43e024f8, 0x403a120b,
+ 0x8241e024, 0xf8803e20, 0x058003e0, 0x00f8003e, 0x000f8003, 0xe000f800,
+ 0x3e000f80, 0x03e000f0, 0x213e042f, 0x85039200, 0x30000000, 0x00000000,
+ 0x0810e400, 0xf9003e40, 0x0f9003e4, 0x00f9003e, 0x400f9003, 0xe400f9c0,
+ 0x7a400c90, 0x03e400f9, 0x9232480b, 0x90432508, 0xf9803270, 0x4c911324,
+ 0x08e9003e, 0x700f9003, 0xe400f908, 0x32600f10, 0x03a402d9, 0x10326a0c,
+ 0x98030204, 0x30000000, 0x00000000, 0x80046400, 0xb9002e40, 0x0b9002e4,
+ 0x00b9002e, 0x400b9022, 0xe400b94a, 0x664c0890, 0x02e780b9, 0x406a7089,
+ 0x99432420, 0xb9102250, 0x28100364, 0x00b9002e, 0x520b9002, 0xe400b900,
+ 0x22fc0b90, 0x02240889, 0x40226188, 0x930a2000, 0x10000000, 0x00000000,
+ 0x18052400, 0xb9002e40, 0x0b9002e4, 0x00b9002e, 0x400b9002, 0xe414b104,
+ 0x2e400890, 0x02f48835, 0x4023400b, 0xd0023401, 0xb5002140, 0x40d00224,
+ 0x00b9002e, 0x400b9002, 0xe400b900, 0xa2400b90, 0x02a40099, 0x4022c008,
+ 0x90060600, 0x40000000, 0x00000000, 0x08040400, 0xb1002c40, 0x0b1002c4,
+ 0x00b1002c, 0x400b1002, 0xc400b114, 0x24442814, 0x02d401b5, 0x1229c089,
+ 0x510a1400, 0xb7102144, 0x08510a44, 0x00b1002c, 0x440b1002, 0xc400b110,
+ 0x20400b11, 0x02244081, 0x12a044c8, 0x11060201, 0x00000000, 0x00000000,
+ 0xb80d6000, 0xf8003e00, 0x0f8003e0, 0x00f8003e, 0x000f8003, 0xe010f840,
+ 0x28110c80, 0x03e000f8, 0x4022000f, 0x84072000, 0xf840b290, 0x0cc40320,
+ 0x00f8003e, 0x100f8003, 0xe000f868, 0x32011f86, 0x83a100d8, 0x69329a0c,
+ 0x84030e03, 0x50000000, 0x00000000, 0x981de401, 0xf9003e40, 0x0f9003e4,
+ 0x00f9003e, 0x400f9003, 0xe400f924, 0x3b480fd0, 0x23e404f9, 0x203e400f,
+ 0x9227a400, 0xf9213e48, 0x4f9253a4, 0x00f9003e, 0x480b9003, 0xe400fd20,
+ 0x2e400f92, 0x11f480fd, 0x243f48af, 0x7203e606, 0x70000000, 0x00000000,
+ 0x9805e400, 0xf9003e40, 0x0f9003e4, 0x00f9003e, 0x400f9003, 0xe400fd00,
+ 0x73414c91, 0x233400cd, 0x00b3404f, 0xd0217400, 0xfd10b340, 0x0fd00324,
+ 0x00f9003d, 0x400c9002, 0xe400f928, 0x36400c90, 0x032402cd, 0x103348cc,
+ 0xd0430600, 0x70000000, 0x00000000, 0x7810e000, 0xb8002e00, 0x0b8002e0,
+ 0x00b8002e, 0x000b8002, 0xe008b008, 0x2a020880, 0x02201088, 0x202200cb,
+ 0x8080a804, 0xc001220a, 0x0b8206a0, 0x00e80026, 0x020d8002, 0xe010b820,
+ 0x22000a84, 0xb2082188, 0x10aa8a0a, 0x82160e04, 0x30000000, 0x00000000,
+ 0x4805c400, 0xb1002c40, 0x0b1002c4, 0x00b1002c, 0x400b1002, 0xc400b120,
+ 0x24408910, 0x02440181, 0x2920410b, 0x12020c04, 0x31002048, 0x0b128204,
+ 0x00b1002c, 0x40081002, 0xc400b128, 0x26400813, 0x02040081, 0x00204ca8,
+ 0x128a0201, 0x70000000, 0x00000000, 0x1815a410, 0xb9002e40, 0x0b9002e4,
+ 0x00b9002e, 0x400b9042, 0xe400b300, 0x20585990, 0x82640289, 0x0822400b,
+ 0x9006a400, 0x89002246, 0x0b9402a4, 0x00a90026, 0x40099002, 0xe400b908,
+ 0x22400a90, 0x02241089, 0x402ac00a, 0x92420604, 0x60000000, 0x00000000,
+ 0xa015e410, 0xf9003e40, 0x0f9003e4, 0x00f9003e, 0x400f9002, 0xe400f900,
+ 0x36402d9c, 0x036580c9, 0x5132628f, 0x96236704, 0xf9882260, 0x4f180a24,
+ 0x00f9003e, 0x400c9003, 0xe400f902, 0x34400c90, 0x0b274489, 0x0032702c,
+ 0x90022804, 0x70000000, 0x00000000, 0xe801a400, 0xf9003e40, 0x0f9003e4,
+ 0x00f9003e, 0x400f9003, 0xe400f900, 0xbe400e9a, 0x03a680f9, 0x803e700f,
+ 0x9c03e720, 0xe9103e40, 0x0f9203e4, 0x00f9003e, 0x400d9003, 0xe400f9a0,
+ 0x3e400f90, 0x03e600f9, 0x083e480f, 0x9003ea00, 0x60000000, 0x00000000,
+ 0x2810a000, 0xf8003e00, 0x0f8003e0, 0x00f8003e, 0x000f8003, 0xe000f81c,
+ 0x12154c80, 0x03e044f8, 0x40b2000f, 0x80a3e100, 0xf8003202, 0x0c8603e0,
+ 0x00f8003e, 0x001c8003, 0xe000f000, 0x32024300, 0x136100d8, 0x0032102c,
+ 0x84030a04, 0x20000000, 0x00000000, 0x28052800, 0xba002e80, 0x0ba002e8,
+ 0x00ba002e, 0x800ba002, 0xe800be01, 0x2b800aa0, 0x02db00be, 0xd823b14b,
+ 0xe003b800, 0xbe903bb8, 0x0dea03e8, 0x00ba002f, 0x9408a002, 0xe800ba00,
+ 0x22800ba0, 0x032810ce, 0x4123a00d, 0xe0020a00, 0x40000000, 0x00000000,
+ 0x28054c00, 0xb3002cc0, 0x0b30028c, 0x00b3002c, 0xc00b3002, 0xcc00b380,
+ 0x20c209b0, 0x02ce20bb, 0xc128f603, 0xb8128d01, 0x3bc020f0, 0x083402cc,
+ 0x00b3002e, 0xe0083002, 0x4c00b300, 0xa0c00930, 0x262c008b, 0xc0a2c209,
+ 0xbc820a00, 0x50000000, 0x00000000, 0xa0011c00, 0xb7002dc0, 0x0b7002dc,
+ 0x00b7002d, 0xc00b7002, 0xdc00b702, 0x2bc00b79, 0x12dc04b7, 0x0021c01b,
+ 0x70869c00, 0xb7402de0, 0x097002dc, 0x00b7002d, 0xd0087002, 0xdc00b722,
+ 0x21400932, 0x021c8087, 0x40209009, 0x74022800, 0x40000000, 0x00000000,
+ 0xa8081e00, 0xf7803de0, 0x0f78039e, 0x00f7803d, 0xe00f7803, 0xde00f780,
+ 0x21e00d72, 0x02da00bf, 0x8029e08f, 0x78279610, 0xf78433e0, 0x0c7803de,
+ 0x00f7802d, 0xe0287803, 0x5e00b3d0, 0x31a08d7c, 0x0b1ec2c2, 0x80b1a01d,
+ 0xf80b2a02, 0x00000000, 0x00000000, 0x081dac00, 0xfb003ec0, 0x0fb003ec,
+ 0x00fb003e, 0xc007b003, 0xec00fa00, 0x3cc10eb0, 0x03e400f9, 0x001e400f,
+ 0xb013a800, 0x78013a80, 0x0f9003ac, 0x00fb003e, 0x400fb003, 0xec10db60,
+ 0x3e980fb6, 0x81adc8f9, 0x043e800f, 0xb003c206, 0x60000000, 0x00000000,
+ 0x4005fe00, 0xff803fe0, 0x0ff803fe, 0x00ff803f, 0xe00ff803, 0xbe00ffb0,
+ 0x33e00478, 0x033644ef, 0x8435200d, 0xf3033a40, 0xff9033ec, 0x86f9073e,
+ 0x40ff803f, 0x600bf903, 0xfe00ff80, 0xb3f40ff8, 0x433e00af, 0x903fa00c,
+ 0xf8030000, 0x70000000, 0x00000000, 0xa8119c00, 0xb7012dc0, 0x0b7002dc,
+ 0x00b7002d, 0xc00b7002, 0xdc00bd32, 0x09880d70, 0x0314008f, 0x6109c408,
+ 0x50029060, 0xbf3135c6, 0x0d70069c, 0x00b7002d, 0x400b7103, 0xdc00b700,
+ 0x21400b71, 0x021c0087, 0x382f000a, 0x51836a04, 0x60000000, 0x00000000,
+ 0x10009c00, 0xb7002dc0, 0x0b7002dc, 0x00b7002d, 0xc00b7002, 0x9c00b731,
+ 0x2b4088f1, 0x023c08a6, 0x00614009, 0x71421404, 0xb7006148, 0x187012dc,
+ 0x00b7002d, 0x400b7002, 0xdc00b700, 0x21808b70, 0x021c00b6, 0x002d8008,
+ 0xf0020000, 0x20000000, 0x00000000, 0x6014cc00, 0xb3002cc0, 0x0b3002cc,
+ 0x00b3002c, 0xc00b3002, 0xcc00b800, 0x28200938, 0x20440080, 0x20285308,
+ 0x1c008100, 0x38c00420, 0x411c02cc, 0x00b3002c, 0x400b3002, 0x8c0833c2,
+ 0x20800bb0, 0x000e2091, 0x812c300a, 0x94804804, 0x30000000, 0x00000000,
+ 0x3815ac00, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0xc00fb003, 0xac00fb00,
+ 0x32c2887e, 0x012500eb, 0x6222500d, 0xbc632504, 0xfb4a32d0, 0x0ea083ec,
+ 0x00fb003e, 0xc00fb012, 0xec08ff60, 0xa2e00ff0, 0x0b1c00fb, 0x813e800c,
+ 0xac022a04, 0x60000000, 0x00000000, 0x8400ec00, 0xfb003ec0, 0x0fb003ec,
+ 0x00fb003e, 0xc00fb003, 0xec00fb40, 0x26484fb0, 0x0ba120fa, 0x403ab00f,
+ 0xb103ed80, 0xfb003e58, 0x8fb483ac, 0x00fb003e, 0x400fb003, 0xec04fb20,
+ 0x3e444fb0, 0x03ac50eb, 0x003e9c0f, 0xa403e000, 0x30000000, 0x00000000,
+ 0x8010fc00, 0xff003fc0, 0x0ff003fc, 0x00ff003f, 0xc00ff003, 0xfc00fd00,
+ 0x33801cf0, 0x832808ff, 0x0033400f, 0xd083f400, 0xff0833f0, 0x2ce003fc,
+ 0x00ff003f, 0x880ff003, 0xfc01ff00, 0x7f460ff0, 0x037c00ee, 0x0033000e,
+ 0xda010044, 0x30000000, 0x00000000, 0x80046c08, 0xbb002ec0, 0x0bb002ec,
+ 0x00bb002e, 0xc00bb002, 0x6c00b8d2, 0x2a040db0, 0x022200b8, 0x10a2780b,
+ 0x9882ef20, 0xd8f02212, 0x0a9882ec, 0x00bb002e, 0x100fb002, 0xec00bb00,
+ 0x6e500bb0, 0x12ac0081, 0x0228200d, 0x94036040, 0x10000000, 0x00000000,
+ 0x80052c00, 0xbb002ec0, 0x0bb002ec, 0x00bb002e, 0xc00bb006, 0xec00ba00,
+ 0x20d008b0, 0x02270831, 0x0066200b, 0xb802e601, 0x98002080, 0x089802ec,
+ 0x00bb0026, 0x100bb002, 0xec00bb01, 0x2e820bb0, 0x062c02a9, 0x1822a02a,
+ 0xb082a000, 0x40000000, 0x00000000, 0x08040c00, 0xb3002cc0, 0x0b3002cc,
+ 0x00b3002c, 0xc00b3002, 0xcc00b004, 0x200009b0, 0x020400b0, 0x0060800b,
+ 0x0002c400, 0x80042000, 0x081002cc, 0x0093002c, 0x000b3042, 0xcc009300,
+ 0x2c000b30, 0x02ac0081, 0x00280009, 0x0002c201, 0x00000000, 0x00000000,
+ 0x800d6c00, 0xfb043ec0, 0x0fb003ec, 0x00bb003e, 0xc00fb003, 0xec00f800,
+ 0xb20018b0, 0x032c08f8, 0x0036400f, 0x9013e408, 0x9800b000, 0x0c9043ec,
+ 0x00fb003e, 0x000fb003, 0xec00b702, 0x6e000f70, 0x031c02e9, 0x0332004e,
+ 0x90278003, 0x50000000, 0x00000000, 0xa01dfc00, 0xff003fc0, 0x0ff003fc,
+ 0x00ff003f, 0xc00ff003, 0x7c00fc00, 0x3d010ff0, 0x0bf400bc, 0x007f400f,
+ 0x4003f400, 0x9c003f00, 0x4f5003fc, 0x00ff003f, 0x000ef003, 0xfc00ff00,
+ 0x3f000ff0, 0x01bc04fd, 0x003f000f, 0x50036806, 0x70000000, 0x00000000,
+ 0xc005fe00, 0xff803fe0, 0x0ff803f4, 0x00ffc433, 0x0c8d5003, 0x7200cc90,
+ 0x334d0dd2, 0x137012ff, 0x903f0e4d, 0x40033e00, 0xfc2133e4, 0x0df9033f,
+ 0x00cd0033, 0xe00ff803, 0xfe007f80, 0x3fe00cf8, 0x01f200cc, 0x803fe00f,
+ 0xf803f000, 0x70000000, 0x00000000, 0x8010ee00, 0xbb802ee0, 0x0bb802e7,
+ 0x00880022, 0x0d488c52, 0x2e04a300, 0x221c489d, 0x0221a283, 0x00361828,
+ 0x89028e00, 0xb8d0a008, 0x48321228, 0x00a8802a, 0xe00bb802, 0xee00bb80,
+ 0x2e6108b8, 0x42e20088, 0x802ee00b, 0xb802e006, 0x30000000, 0x00000000,
+ 0x0805cc00, 0xb3002cc0, 0x0b3002cc, 0x409b2528, 0x40191402, 0xcc00a322,
+ 0xac004900, 0x068100a3, 0x00280009, 0x00020c00, 0xa0002040, 0x09800204,
+ 0x80820028, 0xc00b3002, 0xcc00b304, 0x2e802830, 0x02c00080, 0x002cc00b,
+ 0x3002c201, 0x70000000, 0x00000000, 0xc015ac00, 0xbb002ec0, 0x0bb002ec,
+ 0x80ab082c, 0x02089002, 0xa080a310, 0x2cd04aa8, 0x06ac0083, 0x00024009,
+ 0xb002ac00, 0xbb1022ca, 0x08b0020c, 0x11aa082a, 0xc00bb002, 0xec01bb00,
+ 0x6e4418b1, 0x02e21088, 0x842ec00b, 0xb002f000, 0x60000000, 0x00000000,
+ 0x4015ec00, 0xfb003ec0, 0x0fb003ec, 0x00d2803a, 0xe00d9413, 0xcc80eb48,
+ 0x3e602d98, 0x0ba148eb, 0x002a200d, 0x82032c00, 0xe8c032c0, 0x0d24032a,
+ 0x80c8443a, 0xc00fb003, 0xec00fb02, 0x3c488c98, 0x03e604c9, 0x803ec00f,
+ 0xb003d004, 0x70000000, 0x00000000, 0xe001bc00, 0xff003fc0, 0x0ff003de,
+ 0x10dfc033, 0xa40f7103, 0x6c00bc00, 0x33680d50, 0x031000ff, 0x033de52e,
+ 0xd103fc08, 0xf2003fe0, 0x0ff403fe, 0x40fc003f, 0xc00ff003, 0xfc00ff00,
+ 0x3f400fd8, 0x03f400fc, 0x003fc00f, 0xf003e800, 0x60000000, 0x00000000,
+ 0xc010ac00, 0xfb003ec0, 0x0fb003ec, 0x00fb803e, 0x400fb203, 0x2c4aeb70,
+ 0x32d20fb0, 0x0b2d22fb, 0x2032820c, 0xa003ae80, 0xd91032d0, 0x0fb1032c,
+ 0x40fa4032, 0xc00fb003, 0xec00fb01, 0x3a84cfb0, 0x03e108f9, 0x083ec00f,
+ 0xb003f004, 0x20000000, 0x00000000, 0xc8052c00, 0xbb0026c0, 0x0bb002ec,
+ 0x003b012e, 0xb408b402, 0x2f408b42, 0x16d803b0, 0x022f008b, 0x4036c108,
+ 0x3d836c00, 0x8b00a2dd, 0x08b0036c, 0x00b20036, 0xc00bb002, 0xec00bb50,
+ 0x2e640bb0, 0x82c060b9, 0x042ec00b, 0xb002f200, 0x40000000, 0x00000000,
+ 0xe0054c00, 0xb3002cc0, 0x0b3002c4, 0x0031002c, 0x809a0802, 0x0c02a381,
+ 0x2c400b10, 0x024042a3, 0xd128048a, 0x00028d00, 0xb08122a0, 0x081c8247,
+ 0x20b12020, 0xc00b3002, 0xcc00b340, 0x28900b1a, 0x02c301b0, 0xd02cc00b,
+ 0x3002f000, 0x10000000, 0x00000000, 0x60011e00, 0xb78025e0, 0x0b7802d6,
+ 0x00b7d02d, 0xa4087992, 0x3e8287b0, 0x25e01bf8, 0x024e0087, 0x802ca088,
+ 0x68023e02, 0xa5c021e1, 0x0879065e, 0x00b18025, 0xe00b7802, 0xde00b781,
+ 0x2da00b78, 0x02da00b6, 0x802de00b, 0x7802d804, 0x10000000, 0x00000000,
+ 0x48080c00, 0xf3003cc0, 0x0f3002c4, 0x00f3003e, 0x460e340a, 0x0c00e036,
+ 0x2c400f00, 0x034100e3, 0x0428c04e, 0x10028c80, 0xf25030c0, 0x0c35034c,
+ 0x00f32030, 0xc00f3003, 0xcc00f300, 0x38800f11, 0x03c100f0, 0x003cc00f,
+ 0x3003d202, 0x10000000, 0x00000000, 0x401dbc00, 0xff0037c0, 0x0ff003fc,
+ 0x00ff001f, 0xc52ef003, 0xfc98ffb0, 0x3fc00f60, 0x03bc40ef, 0x0037c44f,
+ 0xf1037c02, 0xdf003fc0, 0x0ef123fc, 0x40ff013f, 0xc00ff003, 0xfc00ff00,
+ 0x3f800ff0, 0x43f800fc, 0x003fc00f, 0xf003d004, 0x60000000, 0x00000000,
+ 0xa805ec00, 0xfb003ec0, 0x0fb003e4, 0x00fb0036, 0xc00d9043, 0x0000cb00,
+ 0x32c00c30, 0x032c00db, 0x0032600c, 0xb003ec00, 0xfb013ec0, 0x0cb0132c,
+ 0x00c92032, 0xc00fb003, 0xec00fb00, 0x3c600c90, 0x01e400f9, 0x8036c00f,
+ 0xb003c200, 0x70000000, 0x00000000, 0xc8119c00, 0xb7002dc0, 0x0b7002dc,
+ 0x10bf0021, 0xc0c87002, 0x1c00af00, 0xa1c00870, 0x435c008f, 0x0021c00a,
+ 0x7002dc00, 0xb7012dc0, 0x08f0423c, 0x00a10921, 0xc00b7002, 0xdc00b700,
+ 0x2d400850, 0x02d400b6, 0x0021c00b, 0x7002f206, 0x60000000, 0x00000000,
+ 0xc0009e00, 0xb7802de0, 0x0b7802d6, 0x00b78024, 0x70093802, 0x9f008782,
+ 0x29e018f8, 0x0a9e02b7, 0x80a9c028, 0x78869e00, 0xb7802de0, 0x0878021e,
+ 0x00868021, 0xe01b7802, 0xde00b780, 0x27a00858, 0x40d600bd, 0x8025e00b,
+ 0x7802c800, 0x00000000, 0x00000000, 0x4814cc00, 0xb3002cc0, 0x0b3002ce,
+ 0x40b38020, 0xf048344a, 0x9200acca, 0x28e42831, 0x02ed03a3, 0x0068c00a,
+ 0x3482cc00, 0xb3082ed2, 0x28bc0a0f, 0x81a30020, 0xc00b3002, 0xcc01b300,
+ 0x6ccc0838, 0x02ce60b3, 0x2020c00b, 0x3002da00, 0x30000000, 0x00000000,
+ 0xe815a800, 0xfa003e80, 0x0fa003ea, 0x00fe0837, 0xb02de803, 0xa800ca20,
+ 0x3b904c6c, 0x033a22fa, 0x003bb20c, 0xec03e800, 0xfe883fb8, 0x4ce4831b,
+ 0x00ca40b2, 0x800fa003, 0xe800fa00, 0x37b00c28, 0x03fb00fe, 0x4036800f,
+ 0xa003fa05, 0x70000000, 0x00000000, 0x4800e000, 0xf8003e00, 0x0f8003e0,
+ 0x00f8083e, 0x180f8101, 0x6180f840, 0x16002f80, 0x016080d8, 0x4004080f,
+ 0x0003e000, 0xf8003e00, 0x0f8203e0, 0x40f8083e, 0x000f8003, 0xe000f800,
+ 0x3e002f81, 0x03e110f8, 0x503e000f, 0x8003d200, 0x20000000, 0x00000000,
+ 0x0810e400, 0xf9003e40, 0x0f9003c4, 0x00c9403a, 0x500c1483, 0x0406c982,
+ 0x38522e90, 0x8ba640c9, 0x003e410c, 0x91232408, 0xf1403268, 0x0c9843a4,
+ 0x88cb103a, 0x400f9003, 0xe400f900, 0x3e400f9a, 0x03660079, 0x807e400f,
+ 0x9003c204, 0x30000000, 0x00000000, 0x80046400, 0xb9002e40, 0x0b9002e4,
+ 0x00894022, 0x70689602, 0x27608980, 0x22704890, 0x222700a9, 0xa2225008,
+ 0x90022540, 0xb9002270, 0x089c2225, 0x00810022, 0x400b9002, 0xe400b900,
+ 0x2e400b9c, 0x022460b9, 0x502e400b, 0x9002e000, 0x10000000, 0x00000000,
+ 0x18052400, 0xb9002e40, 0x0b9002e4, 0x00810828, 0x40089002, 0x34108d10,
+ 0x2e420a90, 0x40242081, 0x2022c80a, 0x90822511, 0xb900a243, 0x489542a5,
+ 0x0089002e, 0x400b9002, 0xe400b908, 0x2e420b94, 0x026400b9, 0x402e400b,
+ 0x9002ce00, 0x40000000, 0x00000000, 0x08040400, 0xb1002c40, 0x0b1002c4,
+ 0x02811020, 0x44081002, 0x34008710, 0x24452890, 0x420440a1, 0x12a04428,
+ 0x10020400, 0xb1802044, 0x08110224, 0x42810024, 0x400b1002, 0xc400b100,
+ 0x2c400b10, 0x020400b1, 0x002c401b, 0x1002ca05, 0x00000000, 0x00000000,
+ 0x380d6000, 0xf8003e00, 0x0f8003e0, 0xa0c8403a, 0x9a0c8293, 0x2002cc41,
+ 0x3c1a2e82, 0x8301a2c8, 0x40389b0e, 0x82832000, 0xf8281010, 0x2c8403a1,
+ 0x00c8283e, 0x000f8003, 0xe000f800, 0x3e000f80, 0x036000f8, 0x002e000f,
+ 0x8003ce03, 0x50000000, 0x00000000, 0x981de400, 0xf9003e40, 0x0f9003f4,
+ 0x00fd202f, 0x480fd00b, 0xe400f920, 0x3b480fd0, 0x63f490f9, 0x203f480d,
+ 0xd00be400, 0xfd003f48, 0x8fd213f4, 0x80f9043a, 0x400f9003, 0xe400f900,
+ 0x3f400fd0, 0x03f410f5, 0x043e400f, 0x9003e604, 0x70000000, 0x00000000,
+ 0x1805e400, 0xf9003e40, 0x0f9003e4, 0x00fd143f, 0x480fd283, 0x3400fd00,
+ 0xb3410c90, 0x033480dd, 0x00334c0c, 0xd0032400, 0xe9003340, 0x0cd00334,
+ 0x40cd003e, 0x400f9003, 0xe400f900, 0x1e408ed0, 0x031400cd, 0x003e400f,
+ 0x9003c601, 0x70000000, 0x00000000, 0x3810e000, 0xb8002e00, 0x0b8002e0,
+ 0x00b0002e, 0x8a0b8002, 0x2000b008, 0x22020a81, 0x4280a888, 0x24a20c4a,
+ 0x84030000, 0x8c10200b, 0x08a20a20, 0x8288412e, 0x000b8002, 0xe000b800,
+ 0x2f811b80, 0x02200088, 0x002e000b, 0x8002ce06, 0x30000000, 0x00000000,
+ 0x0805c400, 0xb1002c40, 0x0b100284, 0x40b1002c, 0x4c0b9022, 0x0c00b120,
+ 0x2c444990, 0x0684c091, 0x2820480a, 0x11027400, 0xa5042248, 0x28128204,
+ 0x80819024, 0x400b1002, 0xc400b500, 0x2d400a90, 0x02040081, 0x002c400b,
+ 0x1002d201, 0x60000000, 0x00000000, 0x1815a400, 0xb9002e40, 0x0b9002e4,
+ 0x80b9002e, 0x400b9402, 0x2580b108, 0x26510b90, 0x06a48089, 0x0020500a,
+ 0x90821406, 0x8d10a242, 0x08110205, 0x0189102e, 0x400b9002, 0xe400b900,
+ 0x6f418b90, 0x0a248289, 0x282e400b, 0x9002c600, 0x20000000, 0x00000000,
+ 0xa015e400, 0xf9003e40, 0x0f9003e4, 0x00f9c83e, 0x500f9c03, 0x2510f900,
+ 0x3e402d9c, 0x832620d9, 0x00326024, 0x940b6400, 0xe9601260, 0x0c943127,
+ 0x08c98436, 0x400f9003, 0xe400f900, 0x3e508e18, 0x030520c9, 0x003e400f,
+ 0x9003e804, 0x70000000, 0x00000000, 0xa801a400, 0xf9003e40, 0x0f9003e4,
+ 0x00f9183e, 0x700f940b, 0xe600f944, 0x3a686e92, 0x40e402f9, 0x082e648f,
+ 0x9203e400, 0xf980be6a, 0x0f9083e7, 0x20f9803e, 0x400f9003, 0xe400f900,
+ 0x3e480f91, 0x03e600f9, 0x003e400f, 0x9003f200, 0x60000000, 0x00000000,
+ 0x2810a000, 0xf8003e00, 0x0f8003e0, 0x01f800b2, 0x182e8003, 0xe088f810,
+ 0x3a000c84, 0x032000c8, 0x003a000c, 0x01036000, 0xc048b210, 0x4e802321,
+ 0x02c800b2, 0x000f8003, 0xe000fc04, 0x1b100f80, 0x03e140d8, 0x003e000f,
+ 0x8003c204, 0x20000000, 0x00000000, 0x28052800, 0xba002e80, 0x0ba002e8,
+ 0x01be4823, 0xb0086b02, 0xf910bec1, 0x23940c20, 0x003904ae, 0x2023a008,
+ 0xe80b2900, 0x8a4021b0, 0x08ec0a3a, 0x008ee022, 0x800ba002, 0xe8009a00,
+ 0x2e801be8, 0x42f8008e, 0x002e800b, 0xa002ca00, 0x40000000, 0x00000000,
+ 0x28054c00, 0xb3002cc0, 0x0b30028c, 0x04b38020, 0xf00a3002, 0xcd0033a1,
+ 0x2ad08930, 0x126fc08b, 0xc028d82a, 0x3e0213c2, 0x848028f0, 0x0a3c0a8d,
+ 0x0093c824, 0xc0033002, 0xcc00b300, 0x28e10b30, 0x02cd2193, 0x002cc00b,
+ 0x3002ca00, 0x50000000, 0x00000000, 0xa0011c00, 0xb7002dc0, 0x0b7002dc,
+ 0x00b78021, 0xf0087002, 0xdc00b700, 0x20e208f0, 0x025c00a7, 0x0021d04a,
+ 0x30123c08, 0x874029c3, 0x0870829c, 0x20978025, 0xc00b7002, 0xdc009700,
+ 0x2dd00b70, 0x82f00184, 0x002dc00b, 0x7006e000, 0x40000000, 0x00000000,
+ 0xa8081e00, 0xf7803de0, 0x0f78039e, 0x00b48030, 0xe00e7803, 0xde00f780,
+ 0x29c02d78, 0x0b5e09cf, 0x8038e08e, 0x78031e00, 0xc38099e0, 0x8ef823be,
+ 0x18d18035, 0xe00f7803, 0xde00f680, 0x39a10b48, 0x03d200d7, 0x803de00f,
+ 0x7803e202, 0x00000000, 0x00000000, 0x081dac00, 0xfb003ec0, 0x0fb003ec,
+ 0x00f8003e, 0x4007b002, 0xec08ba00, 0x3e810f30, 0x01a800fb, 0x013e000d,
+ 0xb003ac10, 0xfb003640, 0x0f80036c, 0x00e9003a, 0xc00fb003, 0xec00fa00,
+ 0x3e980f80, 0x03e000fb, 0x003ec00f, 0xb003c206, 0x60000000, 0x00000000,
+ 0x0005fe00, 0xff803fe0, 0x0ff803fe, 0x00f78033, 0xe00f7803, 0x3e00ffb0,
+ 0x31e40cf8, 0x037e00cf, 0x8033ec0d, 0xf2037e00, 0xcf8133e0, 0x0c78233a,
+ 0x00ce8033, 0xe00ff803, 0xfe00ff80, 0x337007d8, 0x03fe00f7, 0x8033e00f,
+ 0xf803c000, 0x20000000, 0x00000000, 0xa8119c00, 0xb7002dc0, 0x0b7002dc,
+ 0x40b600a1, 0x840b7402, 0x1c00bf3c, 0x294e8e71, 0x029c64ae, 0x00a3c428,
+ 0x51039402, 0x84042380, 0x08740a1c, 0x028714b5, 0xc00b7002, 0xdc00f700,
+ 0x35460b70, 0x02d800b4, 0x0035c00b, 0x7002ea06, 0x20000000, 0x00000000,
+ 0x00009c00, 0xb7002dc0, 0x0b7002dc, 0x00be1821, 0xc00b710a, 0x1c00b531,
+ 0x2bc01970, 0x02440085, 0x0021c809, 0x20023840, 0x979021c6, 0x08f00230,
+ 0x40b60021, 0xc00b7002, 0xdc00ba00, 0x21000b40, 0x025420b7, 0x0825c00b,
+ 0x7002c000, 0x20000000, 0x00000000, 0x2014cc00, 0xb3002cc0, 0x0b3002cc,
+ 0x00ba0022, 0x200b0a02, 0x016cb800, 0x28084a38, 0x428282a0, 0x02220909,
+ 0x00228c00, 0x93912022, 0x08014207, 0x50b30c20, 0xc00b3002, 0xcc00a200,
+ 0x64120b00, 0x02c200b3, 0xc024c00b, 0x3002c800, 0x20000000, 0x00000000,
+ 0xa815ac00, 0xfb003ec0, 0x0fb003ec, 0x80fb8032, 0xd00fbe03, 0x2d00fb40,
+ 0x3ad00d38, 0x036f00cb, 0x0222d00d, 0xbd8b2c00, 0xdbc0b2e0, 0x0cb00326,
+ 0x00fb0022, 0xc00fb003, 0xec00bb00, 0x22f00f88, 0x836e00fb, 0xc036c00f,
+ 0xb003ea04, 0x60000000, 0x00000000, 0x8000ec00, 0xfb003ec0, 0x0fb003ec,
+ 0x00f9083e, 0xdc0fb403, 0xec00f921, 0x0ec00fb1, 0x03e400f9, 0x423ec40e,
+ 0xa003a800, 0xeb607ec0, 0x0fb0b3ec, 0x808b003e, 0xc00fb003, 0xec00fb00,
+ 0x3ec00f94, 0x03e500fa, 0x203ec00f, 0xb003e000, 0x30000000, 0x00000000,
+ 0x0110fc00, 0xff003fc0, 0x0ff003fc, 0x00fd0033, 0x808cf003, 0xde50cf84,
+ 0x33490cb0, 0x035f00ce, 0xa03fc44c, 0x58037706, 0xc8403f81, 0x4cf10330,
+ 0x00ff047f, 0xc00ff003, 0xfc00fe00, 0x3f801fc0, 0x03f840ff, 0x0033c00b,
+ 0xf003c844, 0x30000000, 0x00000000, 0x81046c00, 0xbb002ec0, 0x0bb002ec,
+ 0x00b99022, 0x3408b122, 0xe6048818, 0xa23808b0, 0x02220088, 0x063e0008,
+ 0x8c822e00, 0xabe02c02, 0x088c0228, 0x00bb002e, 0xc00bb002, 0xec00ba00,
+ 0x2e811b8c, 0x83a320b3, 0x802ac00b, 0xb002e840, 0x10000000, 0x00000000,
+ 0x80052c00, 0xbb002ec0, 0x0bb002ec, 0x00bb4022, 0x4208b002, 0xec008a00,
+ 0x208008b0, 0x0269008b, 0x402a0208, 0xb1020c01, 0x8b002a48, 0x0a004aa2,
+ 0x30bb802e, 0xc00bb002, 0xec00bb00, 0x2a404b88, 0x22ec00bb, 0x1022c00b,
+ 0xb002e000, 0x40000000, 0x00000000, 0x08040c00, 0xb3002cc0, 0x0b3002cc,
+ 0x00b00020, 0x00080002, 0xee068000, 0x200008b0, 0x02000080, 0x002c0008,
+ 0x00022e04, 0xa3002e00, 0x0800020c, 0x01b3802c, 0xc0093002, 0xcc009300,
+ 0x24400b10, 0x028c01b2, 0x0068c00b, 0x3002c205, 0x00000000, 0x00000000,
+ 0x000d6c00, 0xfb003ec0, 0x0fb003ec, 0x00fb00b2, 0x002cb002, 0xe810c801,
+ 0x32002cb0, 0x036000c8, 0x003a004c, 0x800b0c00, 0xcb003e00, 0x0c802320,
+ 0x00fb002e, 0xc00fb003, 0xec00fa00, 0x3a000b80, 0x03ec00fb, 0x0032c00f,
+ 0xb003c003, 0x00000000, 0x00000000, 0xa01dfc00, 0xff003fc0, 0x0ff003fc,
+ 0x00fc003f, 0x0007f002, 0xfc083c00, 0x1f000ff0, 0x03f000dc, 0x023b002f,
+ 0xc007b000, 0xfc003f00, 0x2fc003d0, 0x00f7003f, 0xc00ff003, 0xfc00fe00,
+ 0x3f000fc0, 0x23fc00ff, 0x003fc00f, 0xf003e805, 0x70000000, 0x00000000,
+ 0xc005fe00, 0xff803fe0, 0x0ff803fe, 0x00ff803f, 0xe00ff803, 0xf1807d92,
+ 0x3f080dc6, 0x123108fd, 0x0033600e, 0xc0135600, 0xc4903308, 0x0cf9033e,
+ 0x00ff803f, 0xe00fc003, 0x3e00ff80, 0x3f0803c2, 0x033d00dc, 0x3037080c,
+ 0xc4c37000, 0x70000000, 0x00000000, 0x8010ee00, 0xbb802ee0, 0x0bb802ee,
+ 0x00bb802e, 0xe00bb802, 0xe000b920, 0x221ec885, 0x02214089, 0xc22a2002,
+ 0x88122604, 0x8b202234, 0x0a3212ae, 0x00bb802e, 0xe00b8816, 0xac10bb00,
+ 0x2e304b04, 0x0a3d848a, 0x62221f48, 0x84022004, 0x30000000, 0x00000000,
+ 0x0805cc00, 0xb3002cc0, 0x0a3002cc, 0x00b3002c, 0xc00a3012, 0xc0c03321,
+ 0xa0008902, 0x02408091, 0x102e4008, 0x01020800, 0x83006000, 0x4230228c,
+ 0x00b3002c, 0xc00b0002, 0x0c00b300, 0x28040b03, 0xa20c4090, 0x102c002a,
+ 0x02024201, 0x70000000, 0x00000000, 0xc015ac00, 0xbb002ec0, 0x0bb002ec,
+ 0x00bb002e, 0xc00bb002, 0xe840b180, 0x22c008b2, 0x064c818b, 0x102e220a,
+ 0xa1022a00, 0x8b002240, 0x08b002ac, 0x00bb002e, 0xc00b9802, 0xac00bb00,
+ 0x2e440b80, 0x062c008a, 0x0228c20a, 0xb0023004, 0x60000000, 0x00000000,
+ 0x0015ec00, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0xc00eb003, 0xe100f8e2,
+ 0x32200d88, 0x936300d9, 0x843cf10c, 0x8c0b2720, 0xc8003200, 0x0cb003ac,
+ 0x04bb003e, 0xc00b9802, 0x2c00fb01, 0x3e208f94, 0x0b2c10d8, 0x523e114e,
+ 0x88835004, 0x70000000, 0x00000000, 0xe001bc00, 0xff003fc0, 0x0ff003fc,
+ 0x00ff003f, 0xc00ff003, 0xfc04fc01, 0x37a90f48, 0x0bba0ad1, 0x803b400f,
+ 0x9803f400, 0xff083cb0, 0x2ff003fc, 0x00df0027, 0xc00f1013, 0xfc04df00,
+ 0x3ea00fd2, 0x23fc00fc, 0x8037f005, 0xe911f800, 0x60000000, 0x00000000,
+ 0xc010ac00, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0xc00fb003, 0x6502eb22,
+ 0x32404cb5, 0x8ba580db, 0x08b2c40f, 0x300b2020, 0xcb0032d0, 0x8cb1432c,
+ 0x00fb0036, 0xc00f9003, 0x2c00fb00, 0x3ad02c34, 0x432c22c9, 0x48b2180c,
+ 0x1003f004, 0x20000000, 0x00000000, 0xc8052c00, 0xbb002ec0, 0x0bb002ec,
+ 0x00bb002e, 0xc18bb002, 0xee30a948, 0x36c40ab8, 0x23ac00fb, 0x44227003,
+ 0xb5120524, 0xdb0032c0, 0x0fbc022c, 0x00bb002e, 0xc00b9482, 0x2d61bb59,
+ 0x22f408b9, 0x823d0089, 0x2022f005, 0xb8023200, 0x40000000, 0x00000000,
+ 0xe0054c00, 0xb3002cc0, 0x0b3002cc, 0x00b3002c, 0xc00b3002, 0xc030a180,
+ 0x22000804, 0x1a434081, 0x4020780b, 0x00020700, 0x98002c00, 0x08bc820c,
+ 0x00b30024, 0xc00b0612, 0x0e00b300, 0x28344824, 0x4a6c0089, 0x44a00009,
+ 0x088ab800, 0x50000000, 0x00000000, 0x60011e00, 0xb7802de0, 0x0b7802de,
+ 0x00b7802d, 0xe00b7802, 0xc600a580, 0x24660a39, 0x028600b7, 0x8021209b,
+ 0x78023600, 0x9f8829e0, 0x0b7a021e, 0x00b7802d, 0xe00b4802, 0x1e00b780,
+ 0x21e0086b, 0x024e0483, 0x90202289, 0x58021800, 0x40000000, 0x00000000,
+ 0x48080c00, 0xf3003cc0, 0x0f3002cc, 0x00f3002c, 0xc00b3003, 0xcd80eb00,
+ 0x30800800, 0x02c80081, 0x0030440f, 0x16830cc0, 0xd3003c84, 0x8c300b0c,
+ 0x00f30034, 0xc00f000b, 0x0c00bb10, 0x38980c12, 0x134ca2c1, 0x4030c00d,
+ 0xa0839202, 0x00000000, 0x00000000, 0x401dbc01, 0xff003fc0, 0x0ff003fc,
+ 0x00ff003f, 0xc00ff013, 0xfc00fd12, 0x3fc00ff0, 0x03fc00ff, 0x003fc10f,
+ 0xf001fc48, 0x7f0217c0, 0x0bf203fc, 0x00ff003f, 0xc00ff003, 0xfc00ff04,
+ 0x3fc04fd2, 0x43bc00ff, 0x013fc44f, 0xf11f9006, 0x60000000, 0x00000000,
+ 0xa805ec00, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0xc00fb003, 0xe800c800,
+ 0x12c06cb0, 0x012c03db, 0x003ec00f, 0x20136400, 0x3800b240, 0x0fb0032c,
+ 0x00fb003e, 0xc00fb003, 0xec007b00, 0x3c400ca0, 0x032d20ca, 0x01b6c10d,
+ 0xb0132a00, 0x70000000, 0x00000000, 0xc8119c00, 0xb7002dc0, 0x0b7002dc,
+ 0x00b7002d, 0xc00b7002, 0xcc008700, 0x03c00870, 0x237c0287, 0x002d000b,
+ 0x70021c00, 0xbf0021c0, 0x0bf0035c, 0x00b7002d, 0xc10b7002, 0xdc00b702,
+ 0x2dc04860, 0x021c9086, 0x0028c108, 0x70023204, 0x60000000, 0x00000000,
+ 0xc0009e00, 0xb78029e0, 0x0b7802de, 0x00a7846d, 0xe00b7802, 0xde049680,
+ 0x01e2093c, 0x029e0097, 0x802de00b, 0x78c6d200, 0xb78021f0, 0x4a78061e,
+ 0x00b7802d, 0xe00b7802, 0xde00b780, 0x2df00838, 0x224e40a7, 0xc025e119,
+ 0x3c023000, 0x20000000, 0x00000000, 0x4814cc00, 0xb3002cc0, 0x0b3002cc,
+ 0x00b3002c, 0xc10b3002, 0xcc2093c0, 0x00c808b8, 0x72ec2003, 0x002ce00b,
+ 0x30020e40, 0xb30120d8, 0x4b30024c, 0x00b3002c, 0xc00b3402, 0xec043b00,
+ 0x2cd008b1, 0x024c05a3, 0xc028c198, 0x32021204, 0x30000000, 0x00000000,
+ 0xe815a800, 0xfa003e80, 0x0fa003e8, 0x00fa003e, 0x800fa003, 0xf802de87,
+ 0xb3a00de0, 0x07b810da, 0x002fbc4f, 0xe003fa40, 0xf60033b0, 0x0fa00328,
+ 0x00fa002e, 0x800fe082, 0xe8007a00, 0x2f942ced, 0x036802ee, 0xc037802d,
+ 0xe80b3a04, 0x60000000, 0x00000000, 0x4800e000, 0xf8003e00, 0x0f8003e0,
+ 0x00f8003e, 0x000f8003, 0xe150e870, 0x3e100f80, 0x0b6040e8, 0x103e000f,
+ 0x8410e000, 0xf8403c00, 0x0f8403e0, 0x00f8003e, 0x010f8483, 0xe000f800,
+ 0x3e000f84, 0x0ba10058, 0x203e200f, 0x0403d200, 0x30000000, 0x00000000,
+ 0x0810e400, 0xf9003e40, 0x0f9003e4, 0x00f9003e, 0x400f9003, 0xe600e9c0,
+ 0x38600e90, 0x83a400c9, 0xa03e500f, 0x18a32510, 0xf9803240, 0x0c902324,
+ 0x00f9003e, 0x400f9003, 0xe400c920, 0x30640e94, 0x132680c9, 0x0030400c,
+ 0x9a030204, 0x30000000, 0x00000000, 0x80046400, 0xb9002e40, 0x0b9002e4,
+ 0x00b9002e, 0x400b9022, 0xe5c08904, 0x6a410a9d, 0x122760a9, 0xa02e700b,
+ 0x98032400, 0xb9c83640, 0x089c0aa4, 0x00b9002e, 0x400b9c82, 0xe503a980,
+ 0xa2500890, 0x0a260489, 0xc122414d, 0x9c0a2000, 0x10000000, 0x00000000,
+ 0x18052400, 0xb9002e40, 0x0b9002e4, 0x00b9002a, 0x400b9002, 0xc400a100,
+ 0x2ec48a94, 0x02ac1489, 0x002e421b, 0x91422400, 0xb91022c0, 0x08110224,
+ 0x00b9002e, 0x400b9202, 0xe4608900, 0x22400ab4, 0x02042081, 0x28224008,
+ 0x90020600, 0x40000000, 0x00000000, 0x08040400, 0xb1002c40, 0x0b1002c4,
+ 0x00b1002c, 0x400b1002, 0xc4408310, 0x2c440a11, 0x220444a1, 0x042c400b,
+ 0x10020400, 0xb9102440, 0x08110284, 0x00b1002c, 0x400b1002, 0xc4408110,
+ 0x20400811, 0x02044281, 0x10204489, 0x11020201, 0x00000000, 0x00000000,
+ 0xb80d6000, 0xf8003e00, 0x0f8003e0, 0x00f8003a, 0x000f8003, 0xe1a0e040,
+ 0x2e9a0e86, 0x82a1a0c8, 0x287e004f, 0xa2a32800, 0xf840320a, 0x2ca40320,
+ 0x00f8047e, 0x000f8283, 0xe1008840, 0x328a0e86, 0x8321a0c0, 0x68b21a2c,
+ 0xa6830e03, 0x50000000, 0x00000000, 0x981de400, 0xf9003e40, 0x0f9003e4,
+ 0x00f9003e, 0x400f9013, 0xf484fd24, 0x3bc82ff2, 0x0bf480fd, 0x003f404f,
+ 0xd00bbc00, 0xfd203f40, 0x4f9203e4, 0x00f9003e, 0x410fd003, 0xe480f924,
+ 0x3f408bd2, 0x03e480fd, 0x203f490f, 0xd243e606, 0x70000000, 0x00000000,
+ 0x9805e400, 0xf9003e40, 0x0f9003e4, 0x00f9003e, 0x400f9003, 0xf4c2cd00,
+ 0x374025d1, 0x037480dd, 0x2873400f, 0xd0033400, 0xfd102248, 0x0cd00324,
+ 0x00f9003e, 0x400fd023, 0xf400fd00, 0x3f480dd0, 0x033400cd, 0x1033c80d,
+ 0xd2834600, 0x70000000, 0x00000000, 0x3810e000, 0xb8002e00, 0x0b8002e0,
+ 0x00b8002e, 0x000b8002, 0xe8c0da08, 0x22020d81, 0x0b60a0d8, 0x002a801c,
+ 0x84016001, 0xb2006200, 0x8a020220, 0x00b8002e, 0x000b8102, 0xe0a0b820,
+ 0x2e040884, 0xa28020a8, 0x10a28a08, 0x02020e04, 0x30000000, 0x00000000,
+ 0x0805c400, 0xb1002c40, 0x0b1002c4, 0x00b1002c, 0x400b1002, 0xc4828920,
+ 0x24440910, 0x42c4c091, 0x0064404b, 0x11068408, 0xb100a044, 0x48128e04,
+ 0x00b1002c, 0x400b1002, 0xc480b128, 0x2c400933, 0x028444a1, 0x01a84c29,
+ 0x12824201, 0x70000000, 0x00000000, 0x1815a400, 0xb9002e40, 0x0b9002e4,
+ 0x00b9006e, 0x400b9012, 0xc4489b00, 0x20c40910, 0x02e42099, 0x002e4048,
+ 0xb606e480, 0xb1042240, 0x0ab00224, 0x00b90026, 0x40cb9892, 0xe400b900,
+ 0x2e400890, 0x9aa400a9, 0x082a4008, 0x94020604, 0x60000000, 0x00000000,
+ 0xa015e400, 0xf9003e40, 0x0f9003e4, 0x00f9003e, 0x410f9003, 0xe600c110,
+ 0x36500d90, 0x03e600d9, 0x0426700b, 0x9c23a510, 0xb9c02262, 0x0c904324,
+ 0x00f9003e, 0x400f9803, 0xe400f900, 0x3e6c0d94, 0x0ba404e9, 0x003a600d,
+ 0x9c036804, 0x70000000, 0x00000000, 0xa801a400, 0xf9003e40, 0x0f9003e4,
+ 0x00f9003e, 0x400f9003, 0xe600f980, 0x3e622f99, 0x034442f1, 0x483a480c,
+ 0x10826408, 0xf9203e48, 0x0f9003e4, 0x00f9003e, 0x408f9003, 0xe400f908,
+ 0x3e400f19, 0x034430f9, 0x0c34700f, 0x1903ea00, 0x60000000, 0x00000000,
+ 0x2810a000, 0xf8003e00, 0x0f8003e0, 0x00f8003e, 0x000f8003, 0xe002c84c,
+ 0x3e110e80, 0xa36180c8, 0x003e018c, 0x8043e140, 0xf840b010, 0x0f808320,
+ 0x00f8003e, 0x000f8013, 0xe0840800, 0x3c100c82, 0x13e00068, 0x40b2000d,
+ 0x83038a04, 0x20000000, 0x00000000, 0x28052800, 0xba002e80, 0x0ba002e8,
+ 0x00ba002e, 0x800ba002, 0xfb418e80, 0x2fa848e4, 0x023a088e, 0x0023840d,
+ 0xe4113a00, 0xbe1a3680, 0x09e00a28, 0x00ba002e, 0x804be402, 0xf900ae60,
+ 0x2fa408e4, 0x013a000e, 0xc003a00a, 0xe84a0a00, 0x40000000, 0x00000000,
+ 0x28054c00, 0xb3002cc0, 0x0b30028c, 0x00b3002c, 0xc00b3002, 0xcf0483c0,
+ 0x2cd00a38, 0x020c4283, 0x4028d108, 0x3c0a0e80, 0xb30020c0, 0x0bbd024c,
+ 0x00b3002c, 0xc00b3c82, 0xcc408380, 0x2ce10830, 0x088f00ab, 0x8024e228,
+ 0x38028a00, 0x50000000, 0x00000000, 0xa0011c00, 0xb7002dc0, 0x0b7002dc,
+ 0x00b7002d, 0xc00b7002, 0xcc208708, 0x2dc00874, 0x021c0087, 0x0021e209,
+ 0x74021800, 0xb70025c0, 0x0970025c, 0x00b7002d, 0xc10b6082, 0xdc008700,
+ 0x2dc20870, 0x021c2487, 0x0925c20a, 0x70522800, 0x40000000, 0x00000000,
+ 0xa8081e00, 0xf7803de0, 0x0f78039e, 0x00f7803d, 0xe00f7803, 0xde008780,
+ 0x2ce00ef8, 0x0a0e00c7, 0x8139a10c, 0x38031600, 0xf78231e0, 0x0f78035e,
+ 0x00f7802d, 0xe00f7803, 0xfc00c780, 0x3ce02cf8, 0x239e10e3, 0x8134e01c,
+ 0x7803aa02, 0x00000000, 0x00000000, 0x081dac00, 0xfb003ec0, 0x0fb003ec,
+ 0x00fb003e, 0xc10fb003, 0xe810fa00, 0x3e0007b0, 0x09ac00f3, 0x0038010f,
+ 0xb013ac00, 0xf8003ec0, 0x09a003ac, 0x00fb003e, 0xc00fa003, 0xe000f900,
+ 0x2e808fb0, 0x03a400f9, 0x043ac08c, 0xb003c202, 0x60000000, 0x00000000,
+ 0x4005fe00, 0xff803fe0, 0x0ff803fe, 0x00ff803f, 0xe00ff803, 0xfe00df80,
+ 0x33e40cf8, 0x437e44cf, 0x8033600f, 0xf103be40, 0xbf8033e0, 0x4cf8233e,
+ 0x00ef803f, 0xe00ff803, 0xfe00cf80, 0x33600cf8, 0x037e04cf, 0x8433600c,
+ 0xf9430000, 0x70000000, 0x00000000, 0xa8119c00, 0xb7002dc0, 0x0b7002dc,
+ 0x00b7002d, 0xc00b7002, 0xf400df10, 0x23cd0c60, 0x0294c086, 0x5235000f,
+ 0x72035060, 0xb72121c0, 0x0ff0021c, 0x00b7002d, 0xc40e6002, 0xf080ac00,
+ 0x3dc00f72, 0x0a3c0086, 0x00218008, 0x47022a04, 0x60000000, 0x00000000,
+ 0x00009c00, 0xb7002dc0, 0x0b7002dc, 0x00b7002d, 0xc00b7102, 0xdc409500,
+ 0x21c0a950, 0x02180a87, 0x0021c60b, 0x21069408, 0xb70224c0, 0x0951021c,
+ 0x00b7002d, 0xc00b5002, 0xdc01a700, 0x21000840, 0x06584087, 0x10214408,
+ 0x30020000, 0x20000000, 0x00000000, 0x6014cc00, 0xb3002cc0, 0x0b3002cc,
+ 0x00b3002c, 0xc00b3002, 0xc24018c1, 0x0034080c, 0x02834002, 0x80243013,
+ 0x0c02c421, 0xb84024c2, 0x0900020c, 0x00b3002c, 0xc00a3602, 0xc000a000,
+ 0x28844a00, 0x06001480, 0x94228408, 0x04020804, 0x30000000, 0x00000000,
+ 0x2815ac00, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0xc00fb023, 0xef02db20,
+ 0x92e009b0, 0x826f044b, 0xa232658f, 0xb403a700, 0xfb0036c0, 0x0db0032c,
+ 0x00eb003e, 0xc00fbc02, 0xe400e900, 0x22c008b0, 0x236c028b, 0x00b2902c,
+ 0xbf4a2a04, 0x60000000, 0x00000000, 0x8000ec00, 0xfb003ec0, 0x0fb003ec,
+ 0x00fb003e, 0xc00fb003, 0xed84f945, 0x3cd28f90, 0x03a880fb, 0x033e400a,
+ 0xa7136d08, 0xfbc83ac4, 0x0f9403ec, 0x00fb003e, 0xc00fbc03, 0xe408f800,
+ 0x3ed00f00, 0x03e800fb, 0x013e182f, 0xb013e000, 0x30000000, 0x00000000,
+ 0x8010fc00, 0xff003fc0, 0x0ff003fc, 0x00ff003f, 0xc00ff043, 0xd400ffa8,
+ 0x33c00c61, 0x832400c8, 0x8033c00f, 0x70037400, 0xff0031c0, 0x08f903fc,
+ 0x10ff003f, 0xc00f5803, 0xb400fd00, 0x3eea4cf2, 0x137e40f2, 0x0033800c,
+ 0xc8030044, 0x30000000, 0x00000000, 0x81046c00, 0xbb002ec0, 0x0bb002ec,
+ 0x00bb002e, 0xc04bb012, 0xe30088c1, 0x2a304884, 0x036380a0, 0xc236720b,
+ 0xbc022f20, 0xb8c02ac0, 0x088c026c, 0x00fb002e, 0xc00b9802, 0xa200b880,
+ 0x38d80a80, 0x026208b8, 0x40222428, 0x8502a040, 0x10000000, 0x00000000,
+ 0x80052c00, 0xbb002ec0, 0x0bb002ec, 0x00bb002e, 0xc00bb002, 0xe8a0ba00,
+ 0x220808b0, 0x820c808b, 0x2022610b, 0x98006200, 0xb82822c0, 0x0aa002ec,
+ 0x00bb0026, 0xc00bb602, 0x2600b988, 0x2e4008b4, 0x02a420b9, 0x50225008,
+ 0x30022000, 0x40000000, 0x00000000, 0x08040c00, 0xb3002cc0, 0x0b3002cc,
+ 0x00b3002c, 0xc10b3002, 0xc0058000, 0x28006800, 0x424000a2, 0x02244009,
+ 0x20224000, 0xb00028c0, 0x180002cc, 0x00b3002c, 0xc00b3002, 0x8000b004,
+ 0x2cc00a00, 0x020000b0, 0x00a00088, 0x00128201, 0x00000000, 0x00000000,
+ 0x800d6c00, 0xfb003ec0, 0x0fb003ec, 0x00fb002e, 0xc00fb022, 0xe004f800,
+ 0xb2001c00, 0x072008c8, 0x0232c00b, 0x80036400, 0xf00032c0, 0x0e8002ec,
+ 0x00fb003e, 0xc00f9003, 0x2400f900, 0x3e800c00, 0x03e008f8, 0x0430402c,
+ 0x80030003, 0x50000000, 0x00000000, 0xa01dfc00, 0xff003fc0, 0x0ff003fc,
+ 0x00ff003f, 0xc08ff003, 0xf000bc00, 0x3f010fc0, 0x07f0007c, 0x003f400f,
+ 0xc0033400, 0xfc003fc0, 0x0dc0237c, 0x00ef003f, 0xc00fd003, 0xf000fc00,
+ 0x3b801fc0, 0x0bf010fc, 0x003f004f, 0xc003e806, 0x70000000, 0x00000000,
+ 0xc005fe00, 0xff803fe0, 0x0ff803fe, 0x00ff803f, 0xe00ff903, 0x70089c10,
+ 0x33080dc9, 0x237200fc, 0x2d37080c, 0xc1037060, 0xff803d48, 0x0cf9033e,
+ 0x42cf8033, 0xe00ff803, 0xfe00ff80, 0x3f210f58, 0x03f600ff, 0x803fe00e,
+ 0xf803f000, 0x70000000, 0x00000000, 0xc010ee00, 0xbb802ee0, 0x0bb802ee,
+ 0x009b802e, 0xe00b3202, 0x23408812, 0x2a9a08b2, 0x022e00b0, 0xc0322408,
+ 0x81420184, 0x8b802e74, 0x0ab2022c, 0x808300a2, 0xe00bb802, 0xee00bb80,
+ 0x2e200b98, 0x22e200bb, 0x802ee00b, 0xb802e006, 0x30000000, 0x00000000,
+ 0xc805cc00, 0xb3002cc0, 0x0b3002cc, 0x00b3002c, 0xc08b2222, 0xc0068a22,
+ 0x20180932, 0x02cc00b2, 0x00240009, 0x00024800, 0xa3002cc0, 0x0830022c,
+ 0x10830020, 0xc00b3002, 0xcc00b300, 0x2c001b20, 0x02c400b3, 0x002cc00a,
+ 0x3002c201, 0x70000000, 0x00000000, 0xc015ac00, 0xbb002ec0, 0x0bb002ec,
+ 0x00bb002e, 0xc08bb182, 0xa8008b84, 0x2aa00834, 0x22ec00ba, 0x002ec028,
+ 0x11022a00, 0x0b042e44, 0x0a30082c, 0x00830022, 0xc00bb002, 0xec00bb00,
+ 0x6e020bbc, 0x02e620bb, 0x042ec00b, 0xb002f000, 0x60000000, 0x00000000,
+ 0x4015ec00, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0xc00f8813, 0xe290d8c0,
+ 0x32200db8, 0x23ec60f9, 0xc0b6000d, 0x88036280, 0xeb003ee0, 0x0cb00300,
+ 0x80cb0032, 0xc01fb003, 0xec00fb00, 0x3e24cf9c, 0x02e710fb, 0x003ec00e,
+ 0xb003c004, 0x70000000, 0x00000000, 0xa001bc00, 0xff003fc0, 0x0ff003fc,
+ 0x00df003f, 0xc08ff803, 0x5f20fc00, 0x3d000f89, 0x033200fc, 0xc030d20f,
+ 0xb803f020, 0xff003d60, 0x0ff01bfd, 0x08ff013f, 0xc00ff003, 0xfc00ff00,
+ 0x3f000ff0, 0x03f000ff, 0x003fc00f, 0xf003e900, 0x60000000, 0x00000000,
+ 0xc010ac00, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0xc00fb803, 0xa410c840,
+ 0x3e000eb6, 0x032c84d3, 0x48f6000d, 0xa40b2002, 0xdb003ee0, 0x2cb0032c,
+ 0x00cb0832, 0xc00fb003, 0xec00fb00, 0x3ad00fa4, 0x03a500eb, 0x043ec00f,
+ 0xb003f004, 0x20000000, 0x00000000, 0xc8052c00, 0xbb0026c0, 0x0bb002ec,
+ 0x00bb012e, 0xc04bbc02, 0x2f008220, 0x2e8208b6, 0x036d003b, 0x003af248,
+ 0xb8836b80, 0x8b022e54, 0x08b0036f, 0x408b4022, 0xc00bb002, 0xec00bbb0,
+ 0x2ec30bb2, 0x0227008b, 0x042ec00e, 0xb002f200, 0x40000000, 0x00000000,
+ 0xe0054c00, 0xb3002cc0, 0x0b3002cc, 0x00b3002c, 0xc0099240, 0x81518248,
+ 0x2c808a30, 0x020c01b1, 0xc2201008, 0x008a2812, 0xa3002c50, 0x08300283,
+ 0x00834020, 0xc00b3002, 0xcc00b380, 0x28c80b20, 0x028281a3, 0x002cc00b,
+ 0x3002f000, 0x10000000, 0x00000000, 0xe0011e00, 0xb78025e0, 0x0b7802de,
+ 0x00b7802d, 0xe00b7802, 0x064086a0, 0x2de008fa, 0x025e00bc, 0x80292048,
+ 0x68025e01, 0xa7802d60, 0x887838fe, 0x20878021, 0xe00b7802, 0xde00b780,
+ 0x2de00be8, 0x061a0087, 0x802de00b, 0x7802d800, 0x10000000, 0x00000000,
+ 0x48080c00, 0xf3003cc0, 0x0f3003cc, 0x00f3102c, 0xc40d3302, 0x8c05c300,
+ 0x2ec00e00, 0x030020f3, 0x1820c02c, 0x360b0800, 0xe3003cc0, 0x0cb0038c,
+ 0x00c30030, 0xc00f3003, 0xcc00b300, 0x38c00f20, 0x038020e3, 0x003cc00f,
+ 0x3003d202, 0x10000000, 0x00000000, 0x401dbc00, 0xff0037c0, 0x0ff003fc,
+ 0x00ff043f, 0xc007f113, 0xfc04ff26, 0x3fc00ff2, 0x03fe00ff, 0x023fc40e,
+ 0xf003f800, 0xdf103fc0, 0x0ff0035c, 0x00ff003f, 0xc00ff003, 0xfc00ff00,
+ 0x3fe00ff0, 0x03d840ff, 0x003fc00e, 0xf003d006, 0x60000000, 0x00000000,
+ 0xa805ec00, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0xc00fb003, 0xe800d800,
+ 0x32000fb8, 0x032c00fb, 0x213ae08d, 0x900b0400, 0xeb003ec0, 0x0fb04b2c,
+ 0x00cb0032, 0xc00fb003, 0xec00fb00, 0x3e0a8390, 0x03e400fb, 0x003ec00f,
+ 0xb003c200, 0x70000000, 0x00000000, 0xc8119c00, 0xb7002dc0, 0x0b7002dc,
+ 0x00b70039, 0xc00b7002, 0xdc008604, 0x21408b70, 0x021c0896, 0x0c38c008,
+ 0x70021c00, 0x87012dc0, 0x0b70023c, 0x00a700a1, 0xc00b7002, 0xdc00b700,
+ 0x2d000b70, 0x02d000b7, 0x002dc00b, 0x7002f206, 0x60000000, 0x00000000,
+ 0x80009e00, 0xb7802de0, 0x0b7802de, 0x00b7802d, 0xe00b7802, 0xde089580,
+ 0x29a10b70, 0x021e00b7, 0x8029e009, 0x7c023600, 0xa7802de0, 0x0b78025e,
+ 0x00878021, 0xe00b7802, 0xde00b780, 0x2de00b68, 0x02d600b7, 0x802de00b,
+ 0x7802c840, 0x20000000, 0x00000000, 0x4814cc00, 0xb3002cc0, 0x0b3002cc,
+ 0x00b3002c, 0xc00b3712, 0xce1083b0, 0x28d00bcc, 0x02110093, 0x002cec08,
+ 0xbc020e00, 0x83002ce1, 0x0bb0426f, 0x20ab0420, 0xc00b3002, 0xcc00b300,
+ 0x6cf41b31, 0x02cd0033, 0x042cc00b, 0x3002da00, 0x30000000, 0x00000000,
+ 0xe815a800, 0xfa003e80, 0x0fa003e8, 0x00fa003e, 0x800fe803, 0xf8c8de00,
+ 0xbbb20fa6, 0x1b2a20fa, 0xca3b810d, 0xe50b3b28, 0xaa003ea8, 0x0fa0037b,
+ 0x80ca0032, 0x800fa003, 0xe800fa00, 0x3c800fec, 0x03f800fa, 0x003e800f,
+ 0xa003fa04, 0x60000000, 0x00000000, 0x4800e000, 0xf8003e00, 0x0f8003e0,
+ 0x00f8013a, 0x000f8003, 0xc000f800, 0x16020784, 0x83e08070, 0x483a000f,
+ 0x8423e122, 0xf8003e10, 0x0f8003a0, 0x00f8003e, 0x000f8003, 0xe000f804,
+ 0x3e020f80, 0x03e1c4f8, 0x003e000f, 0x8003d200, 0x70000000, 0x00000000,
+ 0x0810e400, 0xf9003e40, 0x0f9003e4, 0x00f9003e, 0x400f9a43, 0xe500e1c0,
+ 0x3a600f98, 0x032600fb, 0x4032404d, 0x99038640, 0xc9023c44, 0x0c900127,
+ 0x02c9803a, 0x400f9003, 0xe400f900, 0x3ec00e92, 0x832511f9, 0x003e400f,
+ 0x9003c204, 0x20000000, 0x00000000, 0x80046400, 0xb9002e40, 0x0b9002e4,
+ 0x00b9002e, 0x400b9402, 0xe5208940, 0x22600b9c, 0x02a610b9, 0x4a22508b,
+ 0x9e1a2480, 0xd9002e73, 0x08900227, 0x008940a2, 0x400b9002, 0xe400b9d0,
+ 0x2e789810, 0x022680b9, 0x002e400b, 0x9002e001, 0x10000000, 0x00000000,
+ 0x18052400, 0xb9002e40, 0x0b9002e4, 0x00b9002e, 0x400b9402, 0xe400ab00,
+ 0x2ec80bd1, 0x023440bb, 0x0022d80b, 0x9002a402, 0x89002e40, 0x08900aa5,
+ 0x0089102e, 0x400b9002, 0xe400b940, 0x2e440a90, 0x8a2400b9, 0x002e400b,
+ 0x9002ce00, 0x40000000, 0x00000000, 0x08040400, 0xb1002c40, 0x0b1002c4,
+ 0x00b1002c, 0x400b1142, 0xc40c8110, 0xa4450b51, 0x029614b1, 0x03a0400b,
+ 0x11120440, 0x91002c40, 0x28110684, 0x40831024, 0x400b1002, 0xc400b100,
+ 0x2c400810, 0x020400b1, 0x002c400b, 0x1002ca04, 0x00000000, 0x00000000,
+ 0x380d6000, 0xf8003e00, 0x0f8003e0, 0x00f8003e, 0x000f8403, 0xe0a0e268,
+ 0x3e1a0b24, 0x033000f8, 0x28320b0f, 0x0683a1a1, 0xc8013e0a, 0x0c8403a1,
+ 0x02c0403e, 0x000f8003, 0xe000f800, 0x3e000a80, 0x232000b8, 0x003e000f,
+ 0x8003ee03, 0x10000000, 0x00000000, 0x981de400, 0xf9003e40, 0x0f9003e4,
+ 0x00f9003e, 0x404fd203, 0xdc08fd20, 0x2b690f92, 0x43e410f9, 0x003f400f,
+ 0xd203f484, 0xf9003f40, 0x0f120374, 0x90f9203a, 0x400f9003, 0xe400f900,
+ 0x3e400fd0, 0x03f410f9, 0x003e400f, 0x9003e605, 0x70000000, 0x00000000,
+ 0x1805e400, 0xf9003e40, 0x0f9003e4, 0x00f9003e, 0x400f5003, 0x7480dd01,
+ 0x37408dd1, 0x031400f9, 0x2932490c, 0xd0033402, 0xc9053f49, 0x4c905334,
+ 0x52cd0032, 0x400f9003, 0xe4007d00, 0x1f40cfd0, 0x033400f9, 0x003e400f,
+ 0x9023e600, 0x70000000, 0x00000000, 0x3810e000, 0xb8002e00, 0x0b8002e0,
+ 0x00b8002e, 0x000b8208, 0x20408a48, 0x228008a0, 0x022000b0, 0x00838408,
+ 0x84828020, 0x88002e00, 0x080242a0, 0x82880022, 0x000b8002, 0xe000b802,
+ 0x2e008ba0, 0x022800b8, 0x002e000b, 0x8002ce06, 0x30000000, 0x00000000,
+ 0x4805c400, 0xb1002c40, 0x0b1002c4, 0x00b1002c, 0x408b12a2, 0x04089130,
+ 0x66441910, 0x028401bd, 0x80214008, 0x13020440, 0x81002c44, 0x0a128204,
+ 0x80810020, 0x404b1002, 0xc4009101, 0x24404b10, 0x220400b1, 0x022c400b,
+ 0x1002d200, 0x20000000, 0x00000000, 0x1815a400, 0xb9002e40, 0x0b9002e4,
+ 0x00b9002e, 0x400b3022, 0x24449324, 0x62400830, 0x02ac10b5, 0x20234408,
+ 0x9012a500, 0x89002e48, 0x0a104285, 0x80810022, 0x400b9002, 0xe400b900,
+ 0x2ed90b90, 0x28240039, 0x002e400b, 0x9002c600, 0x20000000, 0x00000000,
+ 0xa015e400, 0xf9003e40, 0x0f9003e4, 0x00f9003e, 0x400f9883, 0x2602d902,
+ 0x36604d90, 0x03a580f9, 0x00b2500c, 0x92032409, 0xc9013e40, 0x2e900324,
+ 0x00cd0032, 0x409f9003, 0xe400d900, 0x36400f9c, 0x032540f9, 0x002e400f,
+ 0x9003e804, 0x70000000, 0x00000000, 0xe801a400, 0xf9003e40, 0x0f9003e4,
+ 0x00f9013e, 0x400f9203, 0xe600e900, 0xbe480f94, 0x0b6440f9, 0x003e40ef,
+ 0x9403e502, 0xf9003e42, 0x0d9003e6, 0x00f901be, 0x401f9003, 0xe400f908,
+ 0x3e400f9a, 0x03e600f9, 0x003e410f, 0x9003f200, 0x60000000, 0x00000000,
+ 0x2810a000, 0xf8003e00, 0x0f8003e0, 0x00f8003e, 0x000f8483, 0x0080f841,
+ 0x3e008e86, 0x032040c8, 0x08301c2c, 0x83036008, 0xc8023e00, 0x0f800321,
+ 0x20f8003e, 0x000f8003, 0xe000f800, 0x3e004f84, 0x03e108f8, 0x003e000f,
+ 0x8003c204, 0x20000000, 0x00000000, 0x28052800, 0xba002e80, 0x0ba002e8,
+ 0x00ba012e, 0x805bec02, 0x3824be41, 0xa0800de4, 0x023b005a, 0x20228008,
+ 0xe4033b02, 0x8a002d80, 0x03e00238, 0x00be002e, 0x800ea002, 0xe800be40,
+ 0x2f920b60, 0x02fb00ba, 0x002e800b, 0xa002ca00, 0x40000000, 0x00000000,
+ 0x28054c00, 0xb3002cc0, 0x0b30028c, 0x00b3002c, 0xc00b3402, 0x0e00b3e0,
+ 0x28c02a3c, 0x0a0f2094, 0x81211088, 0xb0022cc0, 0xa3022cc0, 0x8b30220c,
+ 0x40b3902c, 0xc00b3002, 0xcc00b310, 0x2ce80b32, 0x42cf80b3, 0x002cc00b,
+ 0x3002ca00, 0x50000000, 0x00000000, 0xa0011c00, 0xb7002dc0, 0x0b7002dc,
+ 0x00b7002d, 0xc00bd402, 0x1c00b740, 0x23400974, 0x021e009f, 0x0221c008,
+ 0x70021c00, 0xa7002dd1, 0x0b72001c, 0x00b7202d, 0xc00a7002, 0xdc00b500,
+ 0x2dc00b50, 0x02d420b7, 0x002dc00b, 0x7002e004, 0x40000000, 0x00000000,
+ 0xa8081e00, 0xf7803de0, 0x0f78039e, 0x00b7803d, 0xe00b780b, 0x1e00ff80,
+ 0xa9e00ef8, 0x0b1e00d7, 0x80b0e04c, 0xf80b1e00, 0xa7803de0, 0x0f7b091e,
+ 0x00f7803d, 0xe00f7803, 0xde00f680, 0x3de04f78, 0x43d200f7, 0x843de00f,
+ 0x7803e002, 0x00000000, 0x00000000, 0x081dac00, 0xfb003ec0, 0x0fb003ec,
+ 0x00fb003e, 0xc04fa043, 0xec08fa00, 0x38c00790, 0x13ec08bb, 0x003ec08f,
+ 0xb003a810, 0xdb003ec0, 0x0fb323ec, 0x00fa903e, 0xc00eb003, 0xec00fb00,
+ 0x3ec10fb0, 0x03e400fb, 0x003ec00f, 0xb003c204, 0x60000000, 0x00000000,
+ 0x0005fe00, 0xff803fe0, 0x0ff803fe, 0x00ff803f, 0xe00fe803, 0xfe009fa6,
+ 0x3fe00df8, 0x031e40cf, 0x90b3e04d, 0xf2431e00, 0xdf8237e0, 0x0ff8133e,
+ 0x40cd8037, 0xe00ff803, 0xfe00fd90, 0x2fa40fe8, 0x03fe00ff, 0x802fe40f,
+ 0xf803f000, 0x20000000, 0x00000000, 0xa8119c00, 0xb7002dc0, 0x0b7002dc,
+ 0x00b7042d, 0xc00b4202, 0xdd208501, 0x2d4a4c71, 0xa35cd086, 0x30318088,
+ 0x52029474, 0xd7042dd3, 0x0bf04abc, 0x608d1021, 0xc00f7003, 0x9c00f500,
+ 0x2d840b40, 0x02d500b7, 0x102dc00b, 0x7002ea02, 0x20000000, 0x00000000,
+ 0x00009c00, 0xb7002dc0, 0x0b7002dc, 0x00b7002d, 0xc00b6022, 0xdc009720,
+ 0x2dc0a860, 0x021c219d, 0x00256629, 0x61a63c00, 0x97002dc4, 0x0b710a50,
+ 0x428500a5, 0xc00b7002, 0xdc00b401, 0x2d000b71, 0x02d820b7, 0x002dc08b,
+ 0x7002c404, 0x20000000, 0x00000000, 0x2014cc00, 0xb3002cc0, 0x0b3002cc,
+ 0x00b3002c, 0xc04bad02, 0xc8909080, 0x6ce0080c, 0x020f2893, 0x4020d008,
+ 0x08068020, 0x93002ce0, 0x0b3002c3, 0x00800020, 0xc00a3002, 0x8c00a100,
+ 0x2c800b30, 0x02c620b3, 0x002cc00b, 0x3002da00, 0x20000000, 0x00000000,
+ 0xa815ac00, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0xc00fb003, 0xcc04d308,
+ 0x3cc10cbd, 0x422d00db, 0x5036e00d, 0xb0030c08, 0xdb0136c0, 0x0ff0036e,
+ 0x008a0036, 0xc00bb003, 0xec00b000, 0x1cc08bb8, 0x83e3007b, 0x002ec00f,
+ 0xb003da04, 0x60000000, 0x00000000, 0x8000ec00, 0xfb003ec0, 0x0fb003ec,
+ 0x08fb003e, 0xc00f94e3, 0xed00eb48, 0x1e420fa4, 0x03ed00e9, 0x013c424f,
+ 0x2083ac00, 0xeb043ed0, 0x1fb003a0, 0x00fa003e, 0xc00fb003, 0xec00f840,
+ 0x3e800f90, 0x83e100fb, 0x003ec00f, 0xb003e400, 0x30000000, 0x00000000,
+ 0x0110fc00, 0xff003fc0, 0x0ff003fc, 0x00ff007f, 0xc00ff003, 0x2e80cd21,
+ 0x72c18c79, 0x033f00fe, 0x4032b02c, 0xd81b3688, 0xdf003fe0, 0x8ff013bc,
+ 0x344c203f, 0xc00ff003, 0xfc00fc00, 0x33c00cf0, 0x03f000cf, 0x003fc00f,
+ 0xf013e804, 0x30000000, 0x00000000, 0x80046c00, 0xbb002ec0, 0x0bb002ec,
+ 0x00bb006e, 0xc01ba902, 0x25008840, 0x22c08a8c, 0x036f04eb, 0xc076c008,
+ 0x840b6300, 0x8b042eb0, 0x4bb04360, 0x60d8c02e, 0xc00bb002, 0xec00b880,
+ 0x2a600db0, 0x02c204ab, 0x002ec00b, 0xb002e840, 0x10000000, 0x00000000,
+ 0x80052c00, 0xbb002ec0, 0x0bb002ec, 0x00bb022e, 0xc04b9002, 0x2c048a00,
+ 0x62c02890, 0x022c00a3, 0x0d22c208, 0xb5066900, 0x9b0006c4, 0x4b30068c,
+ 0x00a8402e, 0xc00bb002, 0xec00b9c0, 0x22e008a0, 0x02a6008b, 0x002ec00b,
+ 0xb002e000, 0x40000000, 0x00000000, 0x08040c00, 0xb30024c0, 0x0b3002cc,
+ 0x00b3002c, 0xc00b1002, 0x04018800, 0xa2400980, 0x024000ab, 0x0024c008,
+ 0x000a6000, 0x83002c40, 0x0b300a40, 0x00b0002c, 0xc0093002, 0xcc009100,
+ 0x2a800900, 0x02e400a3, 0x002cc01b, 0x3002c201, 0x00000000, 0x00000000,
+ 0x000d6c00, 0xfb003ec0, 0x0fb003ec, 0x00fb002e, 0xc00b900a, 0x2802c800,
+ 0x22c00c00, 0x132010e3, 0x0022c008, 0x00032000, 0xdb003e00, 0x0ff00ba0,
+ 0x00a8003e, 0xc00fb003, 0xec00f800, 0x32405cb0, 0x23a000cb, 0x047ec00f,
+ 0xb003e001, 0x50000000, 0x00000000, 0xa01dfc00, 0xff003fc0, 0x0ff003fc,
+ 0x00ff003f, 0xc00fc003, 0xfc00fc00, 0x3fc00ec0, 0x03fc006c, 0x003f000f,
+ 0xc043f000, 0x7f013fc0, 0x0ff003f0, 0x05dc003f, 0xc00ff003, 0xfc00fd00,
+ 0x3f400ff0, 0x23f400ff, 0x003fc04f, 0xf003e804, 0x70000000, 0x00000000,
+ 0xc005fe00, 0xff803fe0, 0x0ff803fe, 0x00ff803f, 0x204fc903, 0x3300dc80,
+ 0x33300cc9, 0x02f200fc, 0x8037080d, 0xc00b1640, 0xc5823fe0, 0x0ff803fe,
+ 0x00df800b, 0x200fc003, 0x3008c680, 0x3f400cd8, 0x13f028cf, 0x90310c0c,
+ 0xc3033000, 0x70000000, 0x00000000, 0xc010ee00, 0xbb802ee0, 0x0bb802ee,
+ 0x00bb802e, 0x600bb202, 0x2c008b00, 0x34c880b2, 0x00ee14b3, 0x082e1040,
+ 0x878be488, 0xe9802ee0, 0x03b820ee, 0x00bb002a, 0x800b9021, 0xa200aa80,
+ 0x2a200a98, 0x02e120ab, 0x002a1c0a, 0x83022004, 0x30000000, 0x00000000,
+ 0xc805cc00, 0xb3002cc0, 0x0b3002cc, 0x00b3002c, 0x400a3200, 0x8c848329,
+ 0x00e08b30, 0x10cc08b3, 0x21201a03, 0x000a0480, 0x83002cc0, 0x0b3002cc,
+ 0x00b30020, 0x001a0026, 0x00102300, 0xac404a10, 0x12c081ab, 0x222c0008,
+ 0x80020201, 0x70000000, 0x00000000, 0xc015ac00, 0xbb002ec0, 0x0bb002ec,
+ 0x00bb002e, 0x080bb002, 0x8c408b10, 0x24c00b90, 0x22e430ba, 0x442a465b,
+ 0xa0226600, 0xbb8826c0, 0x4bb002ec, 0x009b002a, 0xd00b9c42, 0xe201ab00,
+ 0x2af00a9c, 0x22e018aa, 0x202e831a, 0x88023004, 0x60000000, 0x00000000,
+ 0x0015ec00, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0xe00eb603, 0xae82cb4a,
+ 0x32e00fb5, 0x83ee40fb, 0xc136102f, 0x84030f00, 0xc9803ec0, 0x0bb003ec,
+ 0x04fb00ba, 0x200f8c01, 0x2280c232, 0x3e600eb0, 0x03e30061, 0xc13e200c,
+ 0x88031004, 0x70000000, 0x00000000, 0xa001bc00, 0xff003fc0, 0x0ff003fc,
+ 0x00ff023f, 0xc00ffa03, 0x7c00fe82, 0x3f65acf8, 0x03fc00ff, 0xa03da00c,
+ 0x5123fc30, 0xed003fc0, 0x0ff003fc, 0x00ff0037, 0x884f5043, 0x9400fc08,
+ 0x3d420ff0, 0x13de50ff, 0x00099087, 0xb00bf800, 0x60000000, 0x00000000,
+ 0xd410ac00, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0xd20f8407, 0x2040f942,
+ 0x36820ca4, 0x032810f9, 0x0832dd0d, 0xb0032400, 0xc94832c0, 0x8fb023ec,
+ 0x00fb0832, 0x810d8003, 0xe000fb44, 0x3a500f86, 0x036d00c9, 0x493e082c,
+ 0xa1413004, 0x20000000, 0x00000000, 0xc8052c00, 0xbb002ec0, 0x0bb002ec,
+ 0x00bb012e, 0xe248b622, 0x2f08bb50, 0x36f00fba, 0x036c04bb, 0xcd36c168,
+ 0xbc076580, 0xd94036c0, 0x09b002ec, 0x00bb8036, 0xf0089402, 0xe600bbc0,
+ 0x36f28bbc, 0x02ec00db, 0x602e8228, 0x31037200, 0x40000000, 0x00000000,
+ 0xe0054c04, 0xb3000cc0, 0x0b3002cc, 0x00b3002c, 0xf00abe00, 0x0e28bb80,
+ 0x2cf50832, 0x020c04bb, 0x01241048, 0x0e020000, 0x804020c0, 0x0b30024c,
+ 0x00bbd020, 0x68120242, 0x46049340, 0xa8714b31, 0x024000b3, 0xc40c2029,
+ 0x08223800, 0x50000000, 0x00000000, 0xf0011e00, 0xb7802de0, 0x0b7802de,
+ 0x00b7802d, 0xe1084906, 0x1200b584, 0x29a81a69, 0x021a00b5, 0x8025e808,
+ 0x79023204, 0x9d8025e0, 0x4b7802de, 0x00b78027, 0xe2385a82, 0xde20b798,
+ 0xa5210b78, 0x02ce89b7, 0x942d2529, 0x69005800, 0x40000000, 0x00000000,
+ 0x48080c40, 0xf3003cc0, 0x0f3002cc, 0x00b3002c, 0xd00eb00a, 0x0c80f208,
+ 0x2c4008b1, 0x020c40f3, 0x0036800c, 0x94820148, 0xc21030c0, 0x0f3002cc,
+ 0x00fb0030, 0x400a3003, 0xc400f300, 0x28440f31, 0x034d08f2, 0x003c800d,
+ 0x210b1202, 0x00000000, 0x00000000, 0x401dbc10, 0xff003fc0, 0x0ff003fc,
+ 0x00ff003d, 0xc04ef013, 0xfc00ff00, 0x37c827f1, 0x03fc08bf, 0x900fc80a,
+ 0xf04bfc00, 0xfe0427c0, 0x0df003fc, 0x00ff003d, 0xd00ef203, 0xfc00ff00,
+ 0x1f804ff1, 0x03fc81de, 0x003f800e, 0xe103d006, 0x60000000, 0x00000000,
+ 0xa805ec00, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0x000fb01b, 0x2c00cb00,
+ 0xb6e10d90, 0x136400fa, 0x003e4084, 0xa0036c00, 0xf8003ec0, 0x0fb003ec,
+ 0x00fb8026, 0xa00c8013, 0x04004000, 0x32400fa0, 0x03e000cb, 0x8032802c,
+ 0x00032a00, 0x70000000, 0x00000000, 0xc8119c00, 0xb7002dc0, 0x0b7002dc,
+ 0x00b7002d, 0x400b7002, 0x1c028700, 0x23c00070, 0x225c04b7, 0x002fc108,
+ 0xf0021800, 0xb7002dc0, 0x0b7002dc, 0x00bf0023, 0x800af042, 0x9c00d500,
+ 0x35c00b70, 0x02dc0087, 0x0029802a, 0x700bf204, 0x60000000, 0x00000000,
+ 0x80009e00, 0xb7802de0, 0x0a7802de, 0x00b7802d, 0x620b7806, 0x1e088780,
+ 0x21e00b78, 0x025e00b7, 0x842de028, 0x78a61700, 0xb5802de0, 0x0b7802de,
+ 0x00b78021, 0xe0097c02, 0x5e0187c0, 0x25600b68, 0x02ce0085, 0x8028a008,
+ 0xe80a3000, 0x20000000, 0x00000000, 0x4814cc00, 0xb3002cc0, 0x0b3002cc,
+ 0x00b3012d, 0x100b4402, 0x32008c80, 0x21181ac8, 0x265120bc, 0x102cf008,
+ 0x360e0f20, 0x930024c0, 0x0b3002cc, 0x00b300a4, 0xd8aab802, 0xcc4093c1,
+ 0x04c05b34, 0x82ed0083, 0xc028c10a, 0xb900d204, 0x30000000, 0x00000000,
+ 0xe815a800, 0xfa003e80, 0x0fa003e8, 0x00fa003e, 0xa00fa003, 0x2b00ca04,
+ 0x32820fa5, 0xc36b80fa, 0x003fbc0c, 0xec033b00, 0xfe483e80, 0x0fa003e8,
+ 0x00fa0036, 0x880de803, 0x7a40ce82, 0x15940fe6, 0x42fa82ce, 0x84399208,
+ 0xe4033a04, 0x60000000, 0x00000000, 0x4800e000, 0xf8003e00, 0x0f8003e0,
+ 0x00f8003e, 0x120f81cb, 0xe170f818, 0x3a000980, 0x2ba000f8, 0x802e000f,
+ 0x0003a100, 0xf8083e00, 0x0f8003e0, 0x00f8003a, 0x010f8403, 0xa000f841,
+ 0x3e000784, 0x03e080f8, 0x301e020f, 0x8093d200, 0x30000000, 0x00000000,
+ 0x0810e400, 0xf9003e40, 0x0f9003e4, 0x00f9003e, 0x640f9403, 0x2608c9c0,
+ 0x32504f92, 0x03a400f9, 0xa230500c, 0x98032700, 0xc9003e40, 0x1f9003e4,
+ 0x00f9003e, 0xc80f912b, 0x0400c988, 0x32600c9c, 0x23e402c9, 0x803e600c,
+ 0x904b0204, 0x30000000, 0x00000000, 0x80046400, 0xb9002e40, 0x0b9002e4,
+ 0x00b9002e, 0x700b9402, 0xa6018960, 0x22410b9e, 0x122405f9, 0x40a2710e,
+ 0x9c2b8780, 0xd9002640, 0x0f9002e4, 0x00b9c02e, 0x500b9402, 0x24c0d14c,
+ 0x2a40cd90, 0x80e40089, 0x442e602e, 0x9002a000, 0x10000000, 0x00000000,
+ 0x18052400, 0xb9002e40, 0x0b9002e4, 0x00b9002f, 0x400b5402, 0x346a8d00,
+ 0x27400bd0, 0x02b414bd, 0x41625008, 0x91022410, 0x89002e40, 0x0b9002e4,
+ 0x00b9182e, 0x420b9022, 0x24008910, 0x22480890, 0x0264008b, 0x502e4408,
+ 0x90220600, 0x40000000, 0x00000000, 0x08040400, 0xb1002c40, 0x0b1002c4,
+ 0x00b1002d, 0x400b5102, 0x94408510, 0xe5c48b51, 0x021401a5, 0x1060448a,
+ 0x31028440, 0x91002c40, 0x0a1002c4, 0x00b1102c, 0x440b3106, 0x04009900,
+ 0x28c00910, 0x16c44081, 0x102e442b, 0x11028201, 0x00000000, 0x00000000,
+ 0xb80d6000, 0xf8003e00, 0x0f8003e0, 0x00f8003e, 0x800b0403, 0x01048042,
+ 0x26100b04, 0x03a000bc, 0x44321a2c, 0x868b2100, 0xc8003e00, 0x0b8003e0,
+ 0x00b8403e, 0x100f8693, 0x20b08800, 0x320a0c80, 0x0761a0c8, 0x403e9a0c,
+ 0x86830e03, 0x50000000, 0x00000000, 0x981de400, 0xf9003e40, 0x0f9003e4,
+ 0x00f9003e, 0x400f9213, 0xec80f920, 0x3ac90f92, 0x03ec00f9, 0x200f4802,
+ 0xd203b480, 0xfd003640, 0x0f9001e4, 0x00f9203e, 0x480fd203, 0xf400fd00,
+ 0x3f410dd0, 0x03f48075, 0x203f482e, 0xd2036606, 0x70000000, 0x00000000,
+ 0x9805e400, 0xf9003e40, 0x0f9003e4, 0x00f9003f, 0x400fd003, 0x3440fd00,
+ 0x37410fd1, 0x0324007d, 0x00334c2c, 0xd0221400, 0xcd002240, 0x0f9003e4,
+ 0x00fd0033, 0x4007d143, 0x3480cd00, 0x3bc80c50, 0x032402cd, 0x1033486c,
+ 0xd2a30600, 0x70000000, 0x00000000, 0x3810e000, 0xb8002e00, 0x0b8002e0,
+ 0x00b8002e, 0x000b820a, 0x2088b00a, 0x22020e00, 0x032000ba, 0x20a00c0f,
+ 0x04822028, 0xa8002200, 0x0b8023a0, 0x00980822, 0x024b8102, 0x20108800,
+ 0x22040d80, 0x436824c8, 0x04aa0b88, 0x82020e04, 0x30000000, 0x00000000,
+ 0x4805c400, 0xb1002c40, 0x0b1002c4, 0x00b1002c, 0x400b1282, 0x4484b120,
+ 0x64400310, 0x220400b1, 0x2828480a, 0x13024600, 0x83002040, 0x0b1002c4,
+ 0x00b12020, 0x400b1012, 0x04418100, 0x28404890, 0x02044081, 0x00284c0a,
+ 0x92820201, 0x70000000, 0x00000000, 0x1815a400, 0xb9002e40, 0x0b9002e4,
+ 0x00b9002e, 0x421b1282, 0x6400b910, 0x62418b10, 0x022400b1, 0x10284009,
+ 0x104a6c80, 0xa9002240, 0x0b9002a4, 0x00990022, 0x500b9602, 0x2c408900,
+ 0xaa410995, 0x02640089, 0x082a4828, 0xb0020604, 0x60000000, 0x00000000,
+ 0xa015e400, 0xf9003e40, 0x0f9003e4, 0x00f9003e, 0x400f9c13, 0x6540f961,
+ 0x36640f90, 0x8b2740f9, 0x803a429e, 0x96036602, 0xc930b240, 0x0f9003e4,
+ 0x04f900b2, 0x700f9c03, 0x2402c160, 0xb8680c94, 0x02270409, 0x0038588e,
+ 0x900a2804, 0x70000000, 0x00000000, 0xe801a400, 0xf9003e40, 0x0f9003e4,
+ 0x00f9003e, 0x400f9083, 0xa600f984, 0x3e604e99, 0x03a400f9, 0x80364a0f,
+ 0x9c83a400, 0xf9803e40, 0x0f9003a4, 0x00f9003e, 0x500f180b, 0xc400f943,
+ 0xb6640f98, 0x13e490e9, 0x201e400d, 0x910bea00, 0x60000000, 0x00000000,
+ 0x2810a000, 0xf8003e00, 0x0f8003e0, 0x00f8003e, 0x040f8403, 0xe100d822,
+ 0x36124f86, 0x032000e8, 0x503e102c, 0x80036000, 0xd8003e00, 0x0f8003e0,
+ 0x00f80032, 0x001f8043, 0x2080f800, 0x7a080e80, 0x036102c8, 0x20320906,
+ 0x80030a04, 0x20000000, 0x00000000, 0x28052800, 0xba002e80, 0x0ba002e8,
+ 0x00ba012f, 0xb00bec32, 0xfb20cec1, 0x23a00be0, 0x02a800be, 0x900f90a8,
+ 0xe003b800, 0x86402e80, 0x0ba002e8, 0x00be882b, 0xb109e403, 0x7901be08,
+ 0x2b990868, 0x03a800de, 0x8013982d, 0x684b8a00, 0x40000000, 0x00000000,
+ 0x28054c00, 0xb3002cc0, 0x0b30028c, 0x00b3002c, 0xc80b3502, 0xcf209b82,
+ 0xa0f0033d, 0x020c04a3, 0x000ce482, 0x30062e04, 0x93202cc0, 0x0b3002cc,
+ 0x01bb8020, 0xcc0b3302, 0x0d10b380, 0x20f01a38, 0x822c01ab, 0xd3a4e082,
+ 0x388a0a00, 0x50000000, 0x00000000, 0xa0011c00, 0xb7002dc0, 0x0b7002dc,
+ 0x00b7006d, 0x400b7002, 0xde008708, 0x21c28b70, 0x029c00b7, 0x002dc088,
+ 0x70aa9c20, 0x87002dc0, 0x0b7002dc, 0x00b70029, 0xc0897022, 0x5d00bd00,
+ 0x284008f0, 0xa29c0097, 0x04218109, 0xe0a06800, 0x40000000, 0x00000000,
+ 0xa8081e00, 0xf7803de0, 0x0b78039e, 0x00f7803d, 0xe00f7803, 0xfe08d780,
+ 0x21e00f78, 0x031e00e7, 0x803de00e, 0x78131e08, 0xd7802de0, 0x0f7803de,
+ 0x00ff8021, 0xe00bf802, 0x1a00b680, 0x29e00e78, 0x030f04ee, 0x8037a04e,
+ 0x78092a02, 0x00000000, 0x00000000, 0x081dac00, 0xfb003ec0, 0x0fb003ec,
+ 0x00fb003e, 0x400fb003, 0xe000fb00, 0x3ac00fb0, 0x31ec00db, 0x003ec00f,
+ 0x9003a400, 0xfb001ec0, 0x0fb003ec, 0x00f8003e, 0x00098023, 0xe800f100,
+ 0x3ec007b0, 0x02ac00fb, 0x043e800f, 0x20038206, 0x60000000, 0x00000000,
+ 0x4005fe00, 0xff803fe0, 0x0ff803fe, 0x00ff803f, 0xe00ef903, 0x3e004f80,
+ 0x33e46cf8, 0x433e40ff, 0x8033ec2c, 0xf2037e08, 0xff8033e0, 0x0ff803fe,
+ 0x00df803f, 0xe00ffa01, 0x1e480fb0, 0xbbe00ff8, 0x033e48ff, 0x843fa00c,
+ 0xd81b8000, 0x70000000, 0x00000000, 0xa8119c00, 0xb7002dc0, 0x0e7002dc,
+ 0x00b7002d, 0xd008c403, 0x5c10dd02, 0x214108c1, 0x835c00bc, 0x08370c0d,
+ 0x71071c00, 0xb60001c0, 0x0b7003dc, 0x00b5003d, 0xc40b5202, 0x9c00d710,
+ 0xb50a0f42, 0x135cc8b7, 0x102d002d, 0x51022a04, 0x60000000, 0x00000000,
+ 0x00009c00, 0xb7002dc0, 0x0b7002dc, 0x00b7002f, 0x000a7046, 0x1c008600,
+ 0x21821874, 0x021c00b7, 0x0021cc98, 0x60029c20, 0xa70021c0, 0x0b7002dc,
+ 0x00b7002d, 0x000b6306, 0x18048661, 0x29800970, 0x961c00b4, 0x002d8409,
+ 0x50820000, 0x20000000, 0x00000000, 0x6014cc00, 0xb3002cc0, 0x0a3002cc,
+ 0x00b3002c, 0x50088a06, 0x61c090c8, 0x22018880, 0x024d00b0, 0x40241019,
+ 0x890aa480, 0xb24020c0, 0x0b3002cc, 0x00b0002e, 0x010b0802, 0x88601300,
+ 0x20b20a08, 0x064c00b1, 0xc02c000b, 0x9c020804, 0x30000000, 0x00000000,
+ 0x2815ac00, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0x100eb403, 0x2f08cbe0,
+ 0xb2d40cb8, 0x032c00fb, 0x1032c00c, 0xb503ae00, 0xfb00b2c0, 0x0fb003ec,
+ 0x00f9002e, 0x5c0f9603, 0x26008bc0, 0xaae04b38, 0x423d00b3, 0x403cb809,
+ 0xbc0a2a04, 0x60000000, 0x00000000, 0x8000ec00, 0xfb003ec0, 0x0eb003ec,
+ 0x00fb003e, 0x400fb143, 0xed08fa00, 0x3e800fb0, 0x03ee20fb, 0x023cd70d,
+ 0xa4032c00, 0xfb803ec0, 0x0fb003ac, 0x00f9003a, 0x400f9203, 0xe410f980,
+ 0xbec00f84, 0x03ecc0f9, 0x1a3e920d, 0x80a36000, 0x30000000, 0x00000000,
+ 0x8010fc00, 0xff003fc0, 0x0ff003fc, 0x00ff003e, 0x020fc003, 0x3c00cd10,
+ 0xb3400cc0, 0x0b3c00fc, 0x8037310e, 0xf0437c00, 0xcfa83fc0, 0x4ff043fc,
+ 0x00fc003f, 0x400c9003, 0xf004fe00, 0xbbc04ff0, 0x833c003e, 0x4023080c,
+ 0xf82b0044, 0x30000000, 0x00000000, 0x80006c00, 0xbb002ec0, 0x0bb003ec,
+ 0x00bb002e, 0x700b8d42, 0x22c08840, 0x2a350a80, 0x422c00b8, 0xc122300a,
+ 0x8d122200, 0xab0026c0, 0x0bb002ec, 0x00b8c02e, 0x200d8812, 0xe200b380,
+ 0x22f40bbb, 0x02ac0499, 0x4a363008, 0x840aa040, 0x10000000, 0x00000000,
+ 0x80052c01, 0xbb002ec0, 0x0bb002ec, 0x00bb002e, 0xe00bb002, 0x20088340,
+ 0x2ad008b5, 0x122c00b3, 0x5026c22a, 0x90826600, 0x89002ec0, 0x0bb002ec,
+ 0x00b9c02e, 0x60089802, 0x6600bb80, 0xaed08bb0, 0x026c01bb, 0x002a9018,
+ 0xa1022000, 0x40000000, 0x00000000, 0x08040c00, 0xb3002cc0, 0x0b3002cc,
+ 0x00b3002c, 0xc00b0002, 0x00008000, 0x28000a00, 0x020c00b0, 0x0020000a,
+ 0x0002040c, 0xa0002cc0, 0x0b3006cc, 0x00b1002c, 0x40091002, 0xc4009300,
+ 0xa0400300, 0x028c0099, 0x002e0028, 0x00028201, 0x00000000, 0x00000000,
+ 0x800d6c00, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0x000f800b, 0x0002c800,
+ 0x38002c80, 0x032c04f8, 0x0436002e, 0x000b6408, 0x89003ec0, 0x0fb003ec,
+ 0x00f8003e, 0x000c8002, 0xec04fa00, 0xbe804fb0, 0x036c00f9, 0x003a002c,
+ 0x20450003, 0x50000000, 0x00000000, 0xa01dfc00, 0xff003fc0, 0x0ff003bc,
+ 0x00ff003f, 0x408fc003, 0xf010fc01, 0x3f002fc0, 0x01fc00fc, 0x003f008f,
+ 0xc007b000, 0xf40237c0, 0x0ff003fc, 0x00fc003f, 0x000fc023, 0xf400f701,
+ 0x3f800f40, 0x02bc00fd, 0x0035010f, 0xc0036806, 0x70000000, 0x00000000,
+ 0xc005fe00, 0xff803fe0, 0x0ff803fe, 0x00fc3137, 0xe40fc403, 0x7080cf90,
+ 0x334c2ff8, 0x03fe40ef, 0x80735b4d, 0xf813fd80, 0xdf1035e5, 0x0cf00338,
+ 0x00ff8037, 0xe00ff803, 0xd200ff28, 0x33e00f52, 0x83fc00c7, 0x3033c12c,
+ 0xe013f000, 0x70000000, 0x00000000, 0x8000ee00, 0xbb802ee0, 0x0bb802ee,
+ 0x00b03020, 0xc80b1402, 0x2300a900, 0x2a504a12, 0x02cc04bb, 0x8020190c,
+ 0xb842fc00, 0xab702240, 0x0dfd022a, 0x00bb0122, 0xe009b802, 0xe200bf60,
+ 0x2ae00bdc, 0x12e20088, 0x60223008, 0x9c02f004, 0x30000000, 0x00000000,
+ 0x0805cc00, 0xb3002cc0, 0x0b3002cc, 0x00b32024, 0xc80b1602, 0xc1018300,
+ 0x28102a30, 0x82cc01b3, 0x002c4808, 0x3002ccc0, 0xb30026c8, 0x48300e0c,
+ 0x01b30024, 0xc00b3002, 0x8000b308, 0x20c00b10, 0x02c840a1, 0x6224c488,
+ 0x3402f201, 0x70000000, 0x00000000, 0xe015ac00, 0xbb002ec0, 0x0bb002ec,
+ 0x00bb6022, 0xc00b9022, 0xac00ab02, 0x2ae00ab8, 0x02ec04bb, 0x04282009,
+ 0xb002ec01, 0xab0122c0, 0x49b0022c, 0x20bb0022, 0xc00bb022, 0xe900bb00,
+ 0x6ac00b90, 0x02e482aa, 0x41a60008, 0x8002f004, 0x60000000, 0x00000000,
+ 0x0005ec00, 0xfb003ec0, 0x0fb003ec, 0x00f80036, 0xc00f8c83, 0xe360cb01,
+ 0x3a604ea6, 0x23ec00fb, 0x001e680c, 0xb013ec03, 0xfb0036c0, 0x0cb00322,
+ 0x40fb0036, 0xc00fb003, 0xe040fb01, 0x32c00fb0, 0x03fc00af, 0x0037002c,
+ 0xc003e004, 0x70000000, 0x00000000, 0xa011bc00, 0xff003fc0, 0x0ff003fc,
+ 0x08fc803f, 0xc20fe903, 0x6400ff10, 0x1e404ef0, 0x13fc00ff, 0x0833c02e,
+ 0xf043dc02, 0xf7003f64, 0x0fb003f0, 0x00ff003f, 0xc04df003, 0xf000ff00,
+ 0x3fc00fdc, 0x23e000dc, 0x003bc30f, 0xf003e800, 0x60000000, 0x00000000,
+ 0xc010ac00, 0xfb003ec0, 0x0fb003ec, 0x00d24c3a, 0xc00a0403, 0xa982cb20,
+ 0x3e812db0, 0x03ac00fb, 0x003ed30e, 0xb003ec00, 0xfb003ec0, 0x4eb10bac,
+ 0x00eb2032, 0xc00fb003, 0xe480e700, 0xb2c00fb0, 0x038820e1, 0x003a000c,
+ 0x9003f004, 0x20000000, 0x00000000, 0xc8052c00, 0xbb002ec0, 0x0bb002ec,
+ 0x013ba022, 0xc00aa702, 0x0c008b64, 0x22d00cb6, 0x122c0083, 0xe01ad008,
+ 0xb002fc08, 0x8f0020c0, 0x0c75032c, 0x008b6032, 0xc00eb002, 0xec008f00,
+ 0x22d20b91, 0x0227200a, 0xa020f00d, 0xa002f600, 0x40000000, 0x00000000,
+ 0xc0040c00, 0xb3002cc0, 0x0b3002cc, 0x04b18028, 0xd00a2004, 0x81009940,
+ 0x2e660800, 0x028c04a3, 0x044c500b, 0x3002cc00, 0xa3002880, 0x1b300ecc,
+ 0x00bb00a0, 0xc0093002, 0xcd00a300, 0x24c20b34, 0x028500a2, 0x0028e408,
+ 0x2002f900, 0x50000000, 0x00000000, 0x60001e00, 0xb7802de0, 0x0b7802de,
+ 0x00b59021, 0xe0087906, 0x1a2097b0, 0x21e4087c, 0x021f0587, 0x8029e009,
+ 0x7802de00, 0xa7802320, 0x0878023e, 0x00978021, 0xe00a7802, 0xf6008380,
+ 0x25e00bd8, 0x021a0085, 0x90212429, 0x5802fe00, 0x40000000, 0x00000000,
+ 0x48180c00, 0xf3003cc0, 0x0f3003cc, 0x00b31038, 0xc40e3102, 0x84c2db20,
+ 0x3c002c31, 0x438c80a3, 0x252cca0f, 0x3002ec00, 0xab2038c0, 0x4f3213cc,
+ 0x04fb0130, 0xc00d3103, 0xc800a300, 0x34c00f30, 0x038000e0, 0x1038c40c,
+ 0x3003d202, 0x00000000, 0x00000000, 0x401cbc00, 0xff003fc0, 0x0ff003fc,
+ 0x00ff101f, 0xc007f101, 0xfc50ef21, 0x3fc00ff1, 0x63fc00ef, 0x021bc02e,
+ 0xf003fc00, 0xcf003bc4, 0x0ff002dc, 0x40ef003b, 0xc40ef003, 0xf800ff00,
+ 0x3bc00fd8, 0x03fc02ff, 0x103d040f, 0xc003d006, 0x60000000, 0x00000000,
+ 0x2805ec00, 0xdb003ec0, 0x0fb003ec, 0x00fa2032, 0xc00fa403, 0x2c00fb00,
+ 0x3ec02cb0, 0x03ec08fb, 0x003e402c, 0xb003ec40, 0xdb003e80, 0x0db4836c,
+ 0x00fb0032, 0xc00fb003, 0xecc0ff20, 0x3ce00eba, 0x032402ca, 0x0332000c,
+ 0x8483ea00, 0x70000000, 0x00000000, 0xc8019c00, 0xb7002dc0, 0x0b7002dc,
+ 0x00b71021, 0xc10b3082, 0x1c00bf00, 0x21c02d70, 0x22dc0437, 0x0025c02c,
+ 0x7022cc44, 0xa7402d80, 0x0a32121c, 0x00ef0121, 0xc00b7002, 0xd440b748,
+ 0x2dc00870, 0x8358008d, 0x0035c008, 0x7000f024, 0x60000000, 0x00000000,
+ 0x00009e00, 0xb7802de0, 0x0b7802de, 0x00b6c025, 0xe0097802, 0x1e00b780,
+ 0x29a01878, 0x12de11b7, 0x802cc309, 0x7802de00, 0xb7a02de0, 0x2b7b0ade,
+ 0x19b780a1, 0xe10b7802, 0xde80b7a0, 0x2de00b38, 0x06020084, 0x80213008,
+ 0x5802e040, 0x20000000, 0x00000000, 0x6814cc00, 0xb3002cc0, 0x0b3002cc,
+ 0x00b34024, 0xc08b3902, 0x8e60b382, 0x28e01932, 0x02cc01b3, 0x0024f008,
+ 0x3002cc05, 0xa3006ee4, 0x0b30028c, 0x00a30020, 0xc00b3002, 0xcd00bb00,
+ 0x2cc00938, 0x024c0083, 0x0024d808, 0x2802d204, 0x30000000, 0x00000000,
+ 0xe804a800, 0xda003e80, 0x0fa003e8, 0x00fac0b6, 0x800fa50b, 0x3800faa2,
+ 0xb9880ce6, 0x03e800fa, 0x003d802d, 0xa002e800, 0xfa043f80, 0x0fa003f8,
+ 0x80fa0032, 0x800fa003, 0xe800fa00, 0x3e800fa2, 0x032800ca, 0x0432b02c,
+ 0xaa03fa04, 0x60000000, 0x00000000, 0x4810a000, 0xf8003e00, 0x0f8003e0,
+ 0x00f0243a, 0x000f8003, 0x6100f842, 0x32000f84, 0x03e100b8, 0x0036120f,
+ 0x8003c002, 0xa8007e00, 0x8a840a60, 0x00f8407e, 0x008f8003, 0xe000f800,
+ 0x3e000e80, 0x03f000fc, 0x403f002f, 0xc003d200, 0x30000000, 0x00000000,
+ 0x0810a400, 0xf9003e40, 0x0f9003e4, 0x00fb0032, 0x501fb803, 0x2610c910,
+ 0x12402c99, 0x13e64459, 0x107e442c, 0x9003e402, 0xc9003e40, 0x2e110ba4,
+ 0x00f91036, 0x400f9003, 0xe620f900, 0x32600f90, 0x03c700c1, 0x8132602c,
+ 0x9003c204, 0x30000000, 0x00000000, 0x80046400, 0xb9002e40, 0x0b9002e4,
+ 0x00990022, 0x701b99aa, 0x0620d180, 0x3640089c, 0x02e700e9, 0x066e5808,
+ 0x9002e400, 0x89003e40, 0x0c920364, 0x00b90432, 0x400b9007, 0xed40b900,
+ 0x22640b90, 0x02e60089, 0xd0b44408, 0x9002e000, 0x10000000, 0x00000000,
+ 0x18052400, 0xb9002e40, 0x0b9002e4, 0x00b90062, 0x405b1002, 0x24408900,
+ 0x6e400b90, 0x82e420b9, 0x09264108, 0x9006e403, 0x89012ec1, 0x2a901224,
+ 0x04b10126, 0x404b9002, 0xe420b900, 0x26400b90, 0x02e4028d, 0x002b40a8,
+ 0xd002c600, 0x40000000, 0x00000000, 0x08040400, 0xb1002c40, 0x0b1002c4,
+ 0x009310a0, 0xc40b1102, 0x04009b10, 0x2ec40911, 0x02c440a1, 0x002e4408,
+ 0x1006c440, 0x81122844, 0x08101244, 0x01b31020, 0x400b1022, 0x8401b128,
+ 0x24400b10, 0x02d40085, 0x102d4008, 0x5002c201, 0x00000000, 0x00000000,
+ 0x381d6000, 0xf8003e00, 0x0b8002e0, 0x00f06832, 0x100b86a3, 0x20a4c840,
+ 0x3c1a0f84, 0x02e100b8, 0x00261a0c, 0x8002e1a0, 0xc86c2c10, 0x0e8283a0,
+ 0xa0f84036, 0x000f8002, 0xe000f8a0, 0xb6000f82, 0x83e0a0ca, 0x693a8a2c,
+ 0xc283ee03, 0x50000000, 0x00000000, 0xb81de400, 0xf9003e40, 0x0f9003e4,
+ 0x0059203e, 0x480f9213, 0xfc04fd20, 0x374846d2, 0x13e484e9, 0x013f480f,
+ 0x9003e486, 0xf9223f48, 0x4e9013f4, 0x00f9203e, 0x400f9003, 0xe400f9a8,
+ 0x3a400fd0, 0x03ec00f9, 0x20b0402f, 0x9003e606, 0x70000000, 0x00000000,
+ 0x3805e400, 0xf9003e40, 0x0f9003e4, 0x00f9103e, 0x400f9283, 0x3480cd00,
+ 0xbf400e11, 0x032400cd, 0x013a4c2c, 0x9003e400, 0xf9102e40, 0x0fd28b24,
+ 0x88fd003e, 0x400f9003, 0xe400f900, 0x37400f90, 0x03e400cd, 0x0033480c,
+ 0x92832600, 0x70000000, 0x00000000, 0x1800e000, 0xb8002e00, 0x0b8002e0,
+ 0x00b8102c, 0x0a0ba202, 0x20500808, 0x2a020aa0, 0x0220a888, 0x040e0c4a,
+ 0x8002e020, 0x88102c8a, 0x0b8023a0, 0x40b8002e, 0x001b8002, 0xe000e800,
+ 0x3a000380, 0x02f00288, 0x10220008, 0x80021e04, 0x30000000, 0x00000000,
+ 0x48008400, 0xb1002c40, 0x0b1002c4, 0x00b1002c, 0x490b1286, 0xc4029120,
+ 0xae641a10, 0x12048381, 0x002e4808, 0x1002c440, 0xb1012c49, 0x0b100204,
+ 0x00b1002c, 0x400b1002, 0xc400b100, 0x2c400a50, 0x02d44181, 0x00a04428,
+ 0x102a1201, 0x70000000, 0x00000000, 0x1814a400, 0xb9002e40, 0x0b9002e4,
+ 0x00b9502e, 0x400b1006, 0xe4109100, 0x2a488a10, 0x02040ca9, 0x002e400a,
+ 0x9002e406, 0xa9012e44, 0x0bb002a4, 0x00bb002e, 0x400b9002, 0xe4a0a900,
+ 0x6a400bb0, 0x02fc0089, 0x00224028, 0x94020604, 0x60000000, 0x00000000,
+ 0xa004a400, 0xf9003e40, 0x0f9003e4, 0x00f9803e, 0x400f940b, 0xe700d900,
+ 0xbe600e9c, 0x0b240049, 0x011e402c, 0x9001e400, 0xf9003e40, 0x0f900324,
+ 0x84fd003e, 0x400b9003, 0xe600f901, 0x36400f90, 0x23e50049, 0x0032400c,
+ 0x90032804, 0x70000000, 0x00000000, 0xe810a400, 0xf9003e40, 0x0f9003e4,
+ 0x00fb803e, 0xc20fb043, 0x0440e9c0, 0xbe402fba, 0x83ec00d9, 0x003ec80f,
+ 0x9003c410, 0xd9003e60, 0x0f9043a4, 0x80f9003e, 0x404f9003, 0xe600e900,
+ 0x1a400790, 0x03e400f9, 0x903c402f, 0x9003fa00, 0x40000000, 0x00000000,
+ 0x2810a000, 0xf8003e00, 0x0f8003e0, 0x00f820b2, 0x002c840b, 0x2100c801,
+ 0x3a008e84, 0x032080c8, 0x013e082c, 0x8003e000, 0xc8013e10, 0x2e008320,
+ 0x00e80032, 0x000e8003, 0xe120f800, 0x3e080fc0, 0x035000c0, 0x0832000e,
+ 0x00030a04, 0x20000000, 0x00000000, 0x08042800, 0xba002e80, 0x0ba002e8,
+ 0x00ba0262, 0x9008a400, 0x38008e01, 0x218108a4, 0x136b003e, 0xa06c820a,
+ 0xa003a800, 0xda002e80, 0x08e40368, 0x008e0022, 0x800ea002, 0xe920ba00,
+ 0x2fa28ba0, 0x0368008e, 0x0023a808, 0xa0020a00, 0x40000000, 0x00000000,
+ 0x08054c00, 0xb3002cc0, 0x0b30028c, 0x00b3c020, 0xe0083c82, 0x4d208300,
+ 0x28e08b34, 0x020e0083, 0xcb2ce0e8, 0x30228c01, 0x83002cc0, 0x0a04060c,
+ 0x00a300a0, 0xc00a3002, 0xcd00b300, 0x2cd00b30, 0x020c00b3, 0x00a02028,
+ 0x300a0a00, 0x50000000, 0x00000000, 0x20011c00, 0xb7002dc0, 0x0b7002dc,
+ 0x00b7c021, 0xa2087082, 0x5d008702, 0x210209e0, 0x025820b7, 0x046fc00a,
+ 0x70068c00, 0x97202de8, 0x185002fe, 0x00848021, 0xc00b7002, 0xd800b700,
+ 0x2dc00bf8, 0x024c00b3, 0x0021c008, 0x30422800, 0x40000000, 0x00000000,
+ 0x28181e00, 0xf7803de0, 0x0f78039e, 0x00f38221, 0xe00c3803, 0x4e02cf80,
+ 0x2be04b78, 0x031e00c7, 0x822de00c, 0x78039e84, 0x87c23df0, 0x0e48031e,
+ 0x04efe0a1, 0xe00e7803, 0xde20f780, 0x3d600f38, 0x231600f6, 0x8030200e,
+ 0x78032802, 0x00000000, 0x00000000, 0x081dac00, 0xfb003ec0, 0x0fb003ec,
+ 0x00fb483e, 0x90079200, 0xac10f800, 0x3e400e82, 0xa0e924fb, 0x003c580f,
+ 0xb003ac02, 0xfb003ed8, 0x0f30034c, 0x00f8803e, 0xc00eb003, 0xe880ff70,
+ 0x3e401fb0, 0x07e5a2c8, 0x001e000f, 0xb003c206, 0x60000000, 0x00000000,
+ 0x6004be00, 0xff803fe0, 0x0ff803fe, 0x00ff803f, 0xf00fec03, 0xfe00cf84,
+ 0x33ec0df8, 0x033e40cf, 0x9035f00c, 0xf207fc20, 0xff813ff0, 0x0cd8033e,
+ 0x00ff8033, 0xe40ff803, 0xf600ffc2, 0x23240ff8, 0x03be08fe, 0x823f202d,
+ 0xf8033000, 0x70000000, 0x00000000, 0xa8009c00, 0xb7002dc0, 0x0b7002dc,
+ 0x00b6002d, 0x900b4082, 0xdd028f1c, 0xa1842a60, 0x121c0487, 0x10210028,
+ 0x71079c82, 0xe7002dc0, 0x0850029c, 0x40b40129, 0xc00b7002, 0xd400b710,
+ 0x21840b70, 0x115c00b6, 0x682d4608, 0x71822a04, 0x60000000, 0x00000000,
+ 0x00009c00, 0xb7002dc0, 0x0b7002dc, 0x00b7002d, 0x800b7102, 0xcc00b700,
+ 0x21c8a960, 0x02140187, 0x122bc409, 0x70028c42, 0x87002dc0, 0x0a50021c,
+ 0x00b70021, 0xc10b7002, 0xd800b700, 0x25008b30, 0x821400b6, 0x006c0008,
+ 0x30020400, 0x20000000, 0x00000000, 0x4014cc00, 0xb3002cc0, 0x0b3002cc,
+ 0x01b2402c, 0x800b1422, 0xcb80b800, 0x20c01a00, 0x02041181, 0x00281009,
+ 0x30068c00, 0xb3002ec0, 0x0a30228c, 0x00b00028, 0xc00b3002, 0xca00b300,
+ 0x24000b38, 0x064500b8, 0x802c1028, 0x38021804, 0x10000000, 0x00000000,
+ 0x2c05ac00, 0xfb003ec0, 0x0fb003ec, 0x00fa403e, 0xc00fb403, 0xef02f880,
+ 0x30f20db9, 0x0b2c02cb, 0x0038b80d, 0xb043bc00, 0xef007fc0, 0x2e80032c,
+ 0x00fb0032, 0xc00fb002, 0xec80ff00, 0x860007a8, 0x032a80f9, 0x803eb00d,
+ 0xb8031a04, 0x60000000, 0x00000000, 0xa010ec00, 0xfb003ec0, 0x0fb003ec,
+ 0x04f8203e, 0xc00fa023, 0xec404940, 0x3e024e95, 0x03e900fb, 0x40a2820e,
+ 0xb0038c10, 0xeb043ec5, 0x051403ec, 0x00f8403e, 0xc00fb003, 0xe800ff00,
+ 0x3a500fa0, 0x03c820f9, 0x083e180f, 0xb083e400, 0x30000000, 0x00000000,
+ 0x0510fc00, 0xff003fc0, 0x0ff003fc, 0x00ff1033, 0x440cf083, 0xde40ce00,
+ 0x33800ff8, 0x03fb00ff, 0x103fc06c, 0xf013fc04, 0xcf003fc0, 0x0ec0091c,
+ 0x00cc8033, 0xc01ff003, 0xb600fb00, 0x33000fe0, 0x03f000cf, 0x00b38000,
+ 0x70032004, 0x30000000, 0x00000000, 0x81046c00, 0xbb002ec0, 0x0bb002ec,
+ 0x00b90022, 0x50088402, 0xe90088d1, 0x22300895, 0x03a901ba, 0x443e5308,
+ 0xb002ec00, 0x8b012ec0, 0x0da0036c, 0x00d81022, 0xc00bb002, 0xe20cbb00,
+ 0x22620ba0, 0x02e000c9, 0xc020a008, 0xb0022100, 0x10000000, 0x00000000,
+ 0x80056c00, 0xbb002ec0, 0x0bb002ec, 0x00b04020, 0x4008a082, 0x6c018808,
+ 0x224a1bb0, 0x82a434bb, 0x086e8028, 0xb012ec01, 0x9b012ec0, 0x0a90026c,
+ 0x00830022, 0xc00bb002, 0xe440b300, 0x22201ba0, 0x02e80099, 0x8022a20a,
+ 0xb0026000, 0x40000000, 0x00000000, 0x08000c00, 0xb3002cc0, 0x0b3002cc,
+ 0x00b000a0, 0x40280042, 0xc4068100, 0x22000810, 0x028400b3, 0x002a0018,
+ 0x3002cc02, 0x930424c0, 0x29100acc, 0x00900020, 0xc00b3002, 0xc400b300,
+ 0xa0000b20, 0x02c80281, 0x0020800a, 0x30024201, 0x00000000, 0x00000000,
+ 0x00186c00, 0xfb003ec0, 0x0fb003ec, 0x00f90022, 0x000cb002, 0x6400ca00,
+ 0xb0002f20, 0x038004b8, 0x042ec008, 0xb003ec00, 0xdb003dc0, 0x4e800b6c,
+ 0x04c000b2, 0xc00bb003, 0xe000ff00, 0x72000fa0, 0x03e000da, 0x0032802e,
+ 0xb0036003, 0x50000000, 0x00000000, 0xa01dfc00, 0xff003fc0, 0x0ff003fc,
+ 0x00fc053f, 0x000fc022, 0xfc00fc04, 0x3f010fc0, 0x03b000f7, 0x040f000f,
+ 0xf007fc00, 0xcf003fc0, 0x0b60037c, 0x00fc003f, 0xc00ff003, 0xf000ff00,
+ 0x3f000fe0, 0x03f000fc, 0x003f800d, 0xf003a806, 0x70000000, 0x00000000,
+ 0xc005fe00, 0xff803fe0, 0x0ff803fe, 0x00ff8033, 0x080cd803, 0xf600fc09,
+ 0x33008dc2, 0x833004cc, 0x0431080c, 0xc3a21e00, 0xff803fe0, 0x07f803fe,
+ 0x00dc003f, 0x002c6803, 0xf600cd80, 0x3f204cd9, 0x0b3658cc, 0x803fe00f,
+ 0xc2033000, 0x70000000, 0x00000000, 0xc010ee00, 0xbb802ee0, 0x0bb802ee,
+ 0x00bb8022, 0x35289800, 0xe210b8c0, 0x0230088c, 0x02230088, 0xd02a3028,
+ 0x86036c00, 0xbb802ee0, 0x0eb802ee, 0x0038040e, 0x2008b802, 0xe404d982,
+ 0x2ee04a90, 0x0aa88088, 0x802ee00b, 0x8d136004, 0x30000000, 0x00000000,
+ 0xc805cc08, 0xb3002cc0, 0x0b3002cc, 0x00b300a4, 0x00183002, 0xc4002004,
+ 0x08100800, 0x02405080, 0x00200408, 0x00028ca0, 0xb3022cc0, 0x0b3002cc,
+ 0x00b0002c, 0x00483006, 0xe4048302, 0x2cc00832, 0x028c0882, 0x002cc10b,
+ 0x00028201, 0x70000000, 0x00000000, 0xc015ac00, 0xbb002ec0, 0x0bb002ec,
+ 0x00bb0026, 0xc0089806, 0xe200bb18, 0x228108a4, 0x0260008b, 0x102a8008,
+ 0xa1226c00, 0xbb002ec0, 0x0ab012ec, 0x00b9802e, 0x20889002, 0xe4009a08,
+ 0x2ec00ab0, 0x82ac4088, 0x002ec04b, 0xb282f004, 0x60000000, 0x00000000,
+ 0x0015ec00, 0xfb003ec0, 0x0fb003ec, 0x00fb0036, 0x360c8c23, 0xef00f880,
+ 0xba002d88, 0x036200c8, 0xa032108c, 0x8c03ac00, 0xfb003ec0, 0x0fb003ec,
+ 0x00d8a03c, 0x604ca001, 0xce40c942, 0x3c120c80, 0x03a600c8, 0x503ec00f,
+ 0x00239004, 0x70000000, 0x00000000, 0xa001bc00, 0xff043fc0, 0x0ff003fc,
+ 0x00ff0039, 0x400fc003, 0xf4107b80, 0x3f500ff9, 0x2b9e82f8, 0x883f710d,
+ 0x98037c20, 0xff003fc0, 0x0ef003fc, 0x00fc003e, 0x408fc901, 0xf004fc43,
+ 0x3fe80bd4, 0x037e10fc, 0x843fa4cf, 0xf0027800, 0x60000000, 0x00000000,
+ 0xc010ac00, 0xfb003ec0, 0x0fb003ec, 0x00fb203e, 0x820cb303, 0xec00f008,
+ 0xb0c01f14, 0x03ad02c3, 0x10b2c00c, 0x300b2c40, 0xcb003ec0, 0x0fb053ec,
+ 0x00f80432, 0x500cb40b, 0x2c88c900, 0x3ec80fb4, 0x032d10ca, 0x403ec20c,
+ 0x84233004, 0x20000000, 0x00000000, 0xd8052c00, 0xbb000ec0, 0x0bb002ec,
+ 0x00b3002e, 0xc0088022, 0xe4409b00, 0x22c80bbf, 0x422f04ab, 0x8020c008,
+ 0xb5822d00, 0xdb002ec0, 0x0bb002ec, 0x00b9d276, 0x610d9003, 0x6c008a02,
+ 0x2ef38bb7, 0x216c10d8, 0x502ee20a, 0xb182b200, 0x40000000, 0x00000000,
+ 0xe8054c00, 0xb3002cc0, 0x093002cc, 0x00b3002c, 0x00091c02, 0xc740b0c0,
+ 0x20220b00, 0x02802080, 0x82600008, 0x08000e00, 0x83002cc0, 0x193006cc,
+ 0x04b10028, 0x00092082, 0xcd008300, 0x2cc00bb8, 0x02240091, 0x002ce008,
+ 0x0c003800, 0x50000000, 0x00000000, 0xf0011e00, 0xb7802de0, 0x0b7802de,
+ 0x00b7802c, 0xae095802, 0xd200b480, 0x21e40b18, 0x020e00a7, 0x8021e008,
+ 0x79021e00, 0x97802de0, 0x0b7812de, 0x01b58825, 0x24087802, 0xda008780,
+ 0x2de40bfa, 0x02728097, 0x802fa04a, 0x48029800, 0x40000000, 0x00000000,
+ 0x48080c40, 0xf3003cc0, 0x0f3003cc, 0x00f3083c, 0x480d3503, 0xc580f308,
+ 0x30400b30, 0x038d20c0, 0x1030488c, 0x15020c88, 0x83102cc0, 0x0f3003cc,
+ 0x00fb0028, 0x42293403, 0xed02c330, 0x3cc00f30, 0x030d00d3, 0x083c481c,
+ 0x30031202, 0x00000000, 0x00000000, 0x401dbc00, 0xff003fc0, 0x0ff003fc,
+ 0x00ff003f, 0xc80ad103, 0xfc00df00, 0x3fc00ff1, 0x02fc00ff, 0x023fc00f,
+ 0xf103fc00, 0xff003fc0, 0x0ff003fc, 0x00ff003f, 0xc00ff107, 0x3c00bf12,
+ 0x3fc10f72, 0x47dc80ff, 0x003dc00f, 0x7003d006, 0x60000000, 0x00000000,
+ 0xa805ec00, 0xfb003ec0, 0x0fb003ec, 0x00fb8032, 0xc0008003, 0xec00fb00,
+ 0xb2800da0, 0x032000cb, 0x003e800d, 0xa00f2c00, 0xdb003ec0, 0x0fb003ec,
+ 0x00f9003e, 0xc00ca003, 0xee024b00, 0x3ee00c80, 0x032600c9, 0x283e408f,
+ 0xb0032a00, 0x70000000, 0x00000000, 0xc8119c00, 0xb7002dc0, 0x0b7002dc,
+ 0x00b70020, 0xc00d7002, 0xd000b704, 0x21c10870, 0x021c04c7, 0x002cc108,
+ 0x30061c00, 0x87002dc0, 0x0b7042dc, 0x00b7002d, 0xc0187006, 0xf8008700,
+ 0x2dc00ae0, 0x0a180287, 0x602d800b, 0x70123204, 0x60000000, 0x00000000,
+ 0x80009e00, 0xb7802de0, 0x0b7802de, 0x00b78021, 0xe0087802, 0xde20b3c0,
+ 0x68e10838, 0x020e2397, 0x822df089, 0x78121e00, 0x87802de0, 0x0b7802de,
+ 0x00b78029, 0xe0187802, 0xde008781, 0x2fe0187c, 0x069f0087, 0x802d700b,
+ 0x38023000, 0x20000000, 0x00000000, 0x4814cc00, 0xb3002cc0, 0x0b3002cc,
+ 0x00b30520, 0xf4093a02, 0xce00b384, 0x20e0a839, 0x020e0183, 0x406cc908,
+ 0x3c060c00, 0x83002cc0, 0x0b3002cc, 0x00bb002c, 0xf4083522, 0xce0083c2,
+ 0x6cc00a3c, 0x028f0093, 0x062ce00b, 0x3c021204, 0x30000000, 0x00000000,
+ 0xe815a800, 0xfa003e80, 0x0fa003e8, 0x00fa0033, 0xb00cea03, 0xf904fe40,
+ 0x3bb20ce1, 0x0a3a00de, 0xc03fa02d, 0xed932802, 0x8a003e80, 0x0fa003e8,
+ 0x00fe003f, 0xa00ce843, 0xfac4ce18, 0x3f810ce5, 0x0bb900ca, 0x013f840f,
+ 0xee033a04, 0x60000000, 0x00000000, 0x4800e000, 0xf8003e00, 0x0f8003e0,
+ 0x00f800bc, 0x020f8403, 0xe020f000, 0x1e030e80, 0x03c020f8, 0x303e000f,
+ 0x8013e100, 0xe8003e00, 0x0f8003e0, 0x00f8143e, 0x122f8603, 0xe004f802,
+ 0x3e000f80, 0x126000e8, 0x003e004f, 0x808bd200, 0x30000000, 0x00000000,
+ 0x0810e400, 0xf9003e40, 0x0f9003e4, 0x00f9003e, 0x500c9413, 0xe710f988,
+ 0x70601c18, 0x032400c1, 0x8034500e, 0x90132480, 0xc9003e40, 0x0f9003e4,
+ 0x00f99036, 0x680c9823, 0xe700f904, 0x3e400f90, 0x032420f9, 0x003e640f,
+ 0x11030204, 0x30000000, 0x00000000, 0x80046400, 0xb9002e40, 0x0b9002e4,
+ 0x00b9002e, 0x40089082, 0xe788b970, 0x2a562896, 0x02242089, 0x003e6048,
+ 0x9ca98580, 0xd9002e40, 0x0b9002e4, 0x00b901a0, 0x60189582, 0xe400b900,
+ 0x6e524b93, 0x0a2400fb, 0x402e708b, 0x9c016000, 0x10000000, 0x00000000,
+ 0x18052400, 0xb9002e40, 0x0b9002e4, 0x00b9002e, 0x42089012, 0xe408b900,
+ 0x26c01892, 0x02248089, 0x5222d00a, 0x12002400, 0x89002e40, 0x0b9002e4,
+ 0x00b90022, 0xc1289002, 0xe400b904, 0x2e600b10, 0x022400bb, 0x082ed00b,
+ 0x90820600, 0x40000000, 0x00000000, 0x08040400, 0xb1002c40, 0x0b1002c4,
+ 0x00b1002c, 0x40281042, 0xc400b104, 0xa4402810, 0x0a040281, 0x00644088,
+ 0x11228441, 0x91002c40, 0x0b1002c4, 0x00b11020, 0xc0081042, 0xc440b104,
+ 0x2c410b11, 0x020448b1, 0x012c400b, 0x10024201, 0x00000000, 0x00000000,
+ 0xb80d6000, 0xf8003e00, 0x0f8003e0, 0x00f8003e, 0x0a4c8002, 0xe000f82c,
+ 0x260a0882, 0x8320a0c8, 0x28320a0e, 0x868b2100, 0xc8003e00, 0x0f8003e0,
+ 0x00f86d32, 0x0b088013, 0xe900f800, 0x2e000f84, 0x230100f8, 0x003e000f,
+ 0x82830e03, 0x50000000, 0x00000000, 0x981de400, 0xf9003e40, 0x0f9003e4,
+ 0x00f1023f, 0x4127d003, 0xf400fd00, 0x3b400fd0, 0x03f400fd, 0x003f400f,
+ 0xf2438481, 0xf9003e40, 0x0f9003e4, 0x00fd2039, 0x400fd001, 0xfc98fd00,
+ 0x3d400fd2, 0x03f490e9, 0x013f400f, 0xd043e606, 0x70000000, 0x00000000,
+ 0x9805e400, 0xf9003e40, 0x0f9003e4, 0x00fd003e, 0x480c9003, 0x2402c901,
+ 0x3a400890, 0x03a480f9, 0x283b488c, 0xd0031400, 0xf9003e40, 0x0f9003e4,
+ 0x00fd0033, 0x400e1043, 0xf4007901, 0x3f400050, 0x032400f1, 0x003f400f,
+ 0xd2ab0600, 0x70000000, 0x00000000, 0x3810e000, 0xb8002e00, 0x0b8002e0,
+ 0x00b8002e, 0x00088002, 0x20108a40, 0x22800d81, 0x122000be, 0x0022840d,
+ 0x848b6020, 0xb8002e00, 0x0b8002e0, 0x00b84822, 0x00288002, 0xe0a0b803,
+ 0x0e000880, 0x822020b8, 0x002e000b, 0x80028e04, 0x30000000, 0x00000000,
+ 0x4805c400, 0xb1002c40, 0x0b1002c4, 0x00b1002d, 0x4408d806, 0x34009512,
+ 0x69440850, 0x029440b5, 0x00a04008, 0x13120400, 0xb1002c40, 0x0b1002c4,
+ 0x00a13020, 0x442b1052, 0x8480b180, 0x2c40aa12, 0x120400b1, 0x002c400b,
+ 0x18420201, 0x70000000, 0x00000000, 0x1815a400, 0xb9002e40, 0x0b9002e4,
+ 0x00b9002f, 0x5009d202, 0x34009d00, 0x634809d0, 0x023504bd, 0x10224109,
+ 0xb00e6410, 0xb9002e40, 0x0b9002e4, 0x00bb2c22, 0x40289202, 0xe480b900,
+ 0x2e480ab1, 0x822410b9, 0x012e430b, 0x91028604, 0x60000000, 0x00000000,
+ 0xa015e400, 0xf9003e40, 0x0f9003e4, 0x00f9003e, 0x602c1803, 0x0720d942,
+ 0x3a500c9f, 0x03a600f9, 0xc0a2700c, 0x90032408, 0xf9003e40, 0x0f9003e4,
+ 0x00f9c0b0, 0x680f9083, 0xe700f990, 0x1e490e90, 0x0b2480f9, 0x103e500f,
+ 0x90032804, 0x70000000, 0x00000000, 0xe801a400, 0xf9003e40, 0x0f9003e4,
+ 0x00f9003c, 0x500e980b, 0xe480e918, 0x3e404f98, 0x03e480f9, 0x8036500f,
+ 0x9483e400, 0xf9003e40, 0x0f9003e4, 0x00f1003e, 0x508fb803, 0xe608f980,
+ 0x3e404d90, 0x23e480f9, 0x003e650f, 0x9013ea00, 0x60000000, 0x00000000,
+ 0x2810a000, 0xf8003e00, 0x0f8003e0, 0x00f8083e, 0x000c8003, 0xe130f040,
+ 0xb0001c00, 0x032002c0, 0x5220182c, 0x80116010, 0xc8003e00, 0x0f8003e0,
+ 0x00f8003e, 0x100c8403, 0x2100c801, 0x3e010f80, 0x836000c8, 0x003a084c,
+ 0x018b0a04, 0x20000000, 0x00000000, 0x28052800, 0xba002e80, 0x0ba002e8,
+ 0x00be402e, 0x9088ac82, 0xeb80ba8c, 0x22920da5, 0x862a408a, 0x800b8008,
+ 0xe003bb61, 0xfa003a80, 0x0ba002e8, 0x00bec02f, 0x800fa882, 0xbb00fa01,
+ 0x2d984be2, 0x03a800aa, 0xa023a00d, 0xe0020a00, 0x40000000, 0x00000000,
+ 0x28054c00, 0xb3002cc0, 0x0b30028c, 0x00b3402d, 0x08284e02, 0xd200b442,
+ 0x25284844, 0x021104a4, 0xe120f05a, 0xb0120d00, 0x83002cc0, 0x0b3006cc,
+ 0x00b3186c, 0xc4083000, 0x0b208300, 0x2ce803b8, 0x020c0093, 0x8028e408,
+ 0x34424a00, 0x50000000, 0x00000000, 0xa0011c00, 0xb7002dc0, 0x0b7002dc,
+ 0x00b7002c, 0xc0887006, 0xdc04b700, 0x25c00970, 0x020f0087, 0x0629d008,
+ 0x30c29e00, 0xb70029c0, 0x0b7002dc, 0x00b7002c, 0xc08bf822, 0x9a20a702,
+ 0x2dc00bf0, 0x029e80bc, 0x8221e009, 0x30126800, 0x40000000, 0x00000000,
+ 0xa8081e00, 0xf7803de0, 0x0f78039e, 0x00b7803d, 0xe00c7803, 0xde00f380,
+ 0x24e00838, 0x0a1e00e3, 0x8030e00e, 0x78131e02, 0x87803de0, 0x0b7803de,
+ 0x00f7802d, 0xe00c6817, 0x3e008780, 0x3de00f78, 0x033f50d7, 0x8039e09c,
+ 0x78036a02, 0x00000000, 0x00000000, 0x081dac00, 0xfb003ec0, 0x0fb003ec,
+ 0x00fb003e, 0x404fb003, 0xec00fb01, 0x3ac00fa0, 0x43e400fa, 0x043ec00f,
+ 0xb003a400, 0xeb063ec0, 0x0fb003ec, 0x04f9013e, 0x400fb683, 0xec08fb00,
+ 0x3ec00fb0, 0x03ac80e8, 0x483cc00f, 0xb0038206, 0x60000000, 0x00000000,
+ 0x4005fe00, 0xff803fe0, 0x0ff803fe, 0x00ff803f, 0x600cf913, 0xfe007f90,
+ 0x37e04cf8, 0x433e00cf, 0x803fe04f, 0xf2017e00, 0x5f843fe4, 0x0ff803fe,
+ 0x00ff9037, 0xe00ef813, 0xf2003f90, 0x37e00ffb, 0x033e00cf, 0x803fa04c,
+ 0xf8010000, 0x70000000, 0x00000000, 0xa8119c00, 0xb7002dc0, 0x0b7002dc,
+ 0x00b6002d, 0x920d5102, 0xdc00b63a, 0x21180851, 0x221800d5, 0x1925c80b,
+ 0x6083f800, 0xe7002dc0, 0x0e7002dc, 0x40be0029, 0xd8087202, 0xd000d711,
+ 0x35c00b51, 0x0a1c4084, 0x042dc0ca, 0x70022a04, 0x60000000, 0x00000000,
+ 0x18009c00, 0xb7002dc0, 0x0b7002dc, 0x00b7002d, 0xc0086186, 0xd000b502,
+ 0x80c00070, 0x021c2097, 0x802d011b, 0x110a1c00, 0xa7002dc1, 0x0b7002dc,
+ 0x00a50229, 0xc00a4086, 0xd400bf10, 0x21400b62, 0x0e1c20b7, 0x002d800a,
+ 0x20020000, 0x20000000, 0x00000000, 0x6014cc00, 0xb3002cc0, 0x0b3002cc,
+ 0x00b2002c, 0x70093e02, 0xcc00b300, 0x20f80830, 0x020c0093, 0x0064240b,
+ 0x0a026400, 0xb3002cc0, 0x0a3002cc, 0x00b06128, 0xc0081c12, 0xc7009360,
+ 0x24700b0c, 0x060f0090, 0x902cf40a, 0x34020804, 0x30000000, 0x00000000,
+ 0x2815ac08, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0x600cbc03, 0xecc0fb10,
+ 0x32c80cb1, 0xcb2c00db, 0x902ec40f, 0xb4032c00, 0xeb003ec0, 0x0fb003ec,
+ 0x00f90838, 0xe00e1d03, 0xcb80f300, 0x30a80fb4, 0x133e02fb, 0x013e600e,
+ 0xb40b2a04, 0x60000000, 0x00000000, 0x9000ec00, 0xfb003ec0, 0x0fb003ec,
+ 0x00f9003e, 0xc80fa003, 0xe000f901, 0x32d00fb0, 0x23cd00fb, 0x4036c00f,
+ 0x9403ec00, 0x6b003ec0, 0x0fb003ec, 0x00f8003a, 0xd42d8403, 0xe900cb80,
+ 0x3ec01fa1, 0x83ec886b, 0x003e4087, 0x3103e000, 0x30000000, 0x00000000,
+ 0x8010fc00, 0xff003fc0, 0x0ff003fc, 0x00ff203e, 0x800dd903, 0xfe40f2c0,
+ 0x31200c1a, 0x032822d5, 0x0035c00e, 0x64033c00, 0xcf003fc0, 0x0ff003fc,
+ 0x00e50073, 0x000ce043, 0x3420cf00, 0x03e24cdc, 0x03fc00ce, 0x103fc20c,
+ 0xd1830044, 0x30000000, 0x00000000, 0x80046c00, 0xbb002ec0, 0x0bb002ec,
+ 0x00b9802e, 0x5008bc02, 0xed00bbc0, 0x2ae088b8, 0x22ae708b, 0x8c2ac00a,
+ 0x84036602, 0x8b002ec0, 0x09b022ec, 0x00b8c076, 0x200aa202, 0xa220ab00,
+ 0x6af80888, 0x434c00aa, 0x002cf00a, 0xb0036040, 0x10000000, 0x00000000,
+ 0x80052c00, 0xbb002ec0, 0x0bb002ec, 0x00bb002c, 0x4009b082, 0xec20bb41,
+ 0x22c408a0, 0x0224098a, 0x2422c00a, 0xb0026600, 0x8b002ec0, 0x0ab0026c,
+ 0x00b98522, 0xe1089202, 0x22008b02, 0x220808b0, 0x02ec0089, 0x082e8608,
+ 0xb0822000, 0x40000000, 0x00000000, 0x08040c00, 0xb3002cc0, 0x0b3002cc,
+ 0x00b0042e, 0xc0083002, 0xcc00b300, 0x28c02a38, 0x028c0183, 0x0028c16a,
+ 0x006a0001, 0x83002cc0, 0x093002cc, 0x00b00024, 0xc10a8006, 0xa000ab00,
+ 0x2a800800, 0x026c1021, 0x042e400a, 0x30024201, 0x00000000, 0x00000000,
+ 0x800d6c00, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0xc08db003, 0xec00fb00,
+ 0x22c00cb0, 0x432c00db, 0x0032000e, 0x80026400, 0xcb003ec0, 0x0fb003ec,
+ 0x10e90022, 0x000c8003, 0x2000cb00, 0x22400c00, 0x03dc00c8, 0x003ec00c,
+ 0xb0230003, 0x50000000, 0x00000000, 0xa01dfc00, 0xff003fc0, 0x0ff003fc,
+ 0x00fc003f, 0x0003c033, 0xf000fc00, 0x3f0109c0, 0x03f0003c, 0x003f000f,
+ 0xc003f400, 0xff003fc0, 0x0df002fc, 0x00fc001d, 0x008fc023, 0xf000f702,
+ 0x0f400fc0, 0x033c00fc, 0x003dc04f, 0xf003e806, 0x70000000, 0x00000000,
+ 0xc005fe00, 0xff803fe0, 0x0ff803fe, 0x00fc6837, 0xe00ff203, 0x3f00cc90,
+ 0x37200cc2, 0x035e00de, 0x21330d0c, 0xc2033080, 0xfc103304, 0x2c410372,
+ 0x00dcc033, 0x200fc803, 0x1600ff00, 0x3fe14ff9, 0x03fe00ff, 0x803fe00f,
+ 0xf803f000, 0x70000000, 0x00000000, 0xc010ee00, 0xbb802ee0, 0x0bb802ee,
+ 0x10b04022, 0xe08bfd02, 0x2c808120, 0x2a210a93, 0x0aac908a, 0xc0361028,
+ 0x8c02a300, 0xb0402018, 0x0d860200, 0x00890028, 0x000b0002, 0x26009f30,
+ 0x2ee00bb2, 0x02ee00bb, 0x802ee10b, 0xb802f004, 0x30000000, 0x00000000,
+ 0xc805cc00, 0xb3002cc0, 0x0b3002cc, 0x00b12024, 0xc00a3042, 0x0c00a800,
+ 0x26008810, 0x824020b2, 0x10240408, 0x21020040, 0xb0402010, 0x08140204,
+ 0x00920020, 0xc00a0002, 0x0400b30e, 0x2cc00a32, 0x02cc00a3, 0x002cc00b,
+ 0x3802f201, 0x70000000, 0x00000000, 0xc015ac00, 0xbb002ec0, 0x0bb002ec,
+ 0x00ba0022, 0xc00bb002, 0x0c00a880, 0x22a00a10, 0x0aec01aa, 0x08660008,
+ 0xa0022020, 0xb8022200, 0x08900224, 0x0083002a, 0xc00b8022, 0x2468bb00,
+ 0x2ec00bb0, 0x02ec00bb, 0x002ec00b, 0xb002f004, 0x60000000, 0x00000000,
+ 0x0015ec00, 0xfb003ec0, 0x0fb003ec, 0x00f98836, 0xc00e300b, 0x2c00e1e1,
+ 0x36208ca8, 0x036c20f2, 0x4036448c, 0x900b2900, 0xf980b202, 0x08a00b20,
+ 0x40d80032, 0x004ea20b, 0x2700bb00, 0x2ec00fb0, 0x03ec00eb, 0x003ed00f,
+ 0xa003e104, 0x70000000, 0x00000000, 0xa001bc00, 0xff003fc0, 0x0ff003fc,
+ 0x00fc903f, 0xc00ff003, 0xfc02dd08, 0x3f00afe1, 0x13bd02de, 0x003e620f,
+ 0xd003f800, 0xfd903d04, 0x0f6083f2, 0x00fd003f, 0x000fe083, 0xf400df00,
+ 0x3fc00ff0, 0x13fc00ff, 0x003f400f, 0xc003e800, 0x60000000, 0x00000000,
+ 0xc010ac00, 0xfb003ec0, 0x0fb0036c, 0x00d1603a, 0xc00fb007, 0xac80f800,
+ 0x3a400ea0, 0x03ac08da, 0x4030400c, 0x3007e940, 0xc1203200, 0x2cb10366,
+ 0x00ca103a, 0xe04ea80a, 0x2510cf00, 0x3ec00fb1, 0x03ec00fb, 0x003ec20f,
+ 0xa003f004, 0x20000000, 0x00000000, 0xc8052c00, 0xbb002ec0, 0x0bb002ec,
+ 0x00ba0022, 0xc09bf542, 0x2c20b824, 0x34d048a5, 0x022dc05a, 0x58364808,
+ 0xb006e800, 0x89002208, 0x2db80226, 0x008b8032, 0xe40dac02, 0x2400df00,
+ 0x2ec00bb0, 0x02ec00bb, 0x002e700b, 0x8002f600, 0x40000000, 0x00000000,
+ 0xe0054c00, 0xb3002cc0, 0x0b3002cc, 0x00b24028, 0xc00b3002, 0x8f009200,
+ 0x28162a04, 0x12a10003, 0x00248028, 0x0006c610, 0x02c120c0, 0x48004268,
+ 0x02808028, 0x000a9402, 0x08008300, 0x28c00b38, 0x02cc00b3, 0x002ce00b,
+ 0x3002f800, 0x50000000, 0x00000000, 0xe0011e00, 0xb7802de0, 0x0b7802de,
+ 0x00b68021, 0xe00b7802, 0x1e00b690, 0x27280838, 0x123e0097, 0x8025a008,
+ 0x4802d400, 0x86b021e0, 0x0948021a, 0x00858061, 0x24095802, 0x3a009790,
+ 0x2de00b78, 0x02de00b7, 0x802da00b, 0x7c02fc00, 0x40000000, 0x00000000,
+ 0x48080c00, 0xf3003cc0, 0x0f3002cc, 0x40f30038, 0xc00b3042, 0x8c00d010,
+ 0x38800e10, 0x0b8c0083, 0x2034800c, 0x2102c440, 0x8228b0c4, 0x0810034c,
+ 0x00ca0038, 0xc40e1103, 0x0840c310, 0x3cc00f30, 0x03cc00f3, 0x003cd20f,
+ 0x3003d202, 0x00000000, 0x00000000, 0x401dbc00, 0xff003fc0, 0x0ff003fc,
+ 0x00ff513f, 0xc04f7003, 0xfc003d14, 0x3d884ff4, 0x03fc00f7, 0x003f840f,
+ 0xe003d4c0, 0xfe203fc4, 0x0fd103fc, 0x00ff1033, 0xc40fd143, 0xfa40ff10,
+ 0x3fc00ff0, 0x03fc00ff, 0x013f800f, 0xf003d006, 0x60000000, 0x00000000,
+ 0xa805ec00, 0xfb003ac0, 0x0fb003ec, 0x00fb4032, 0xc00fb003, 0xae00c800,
+ 0xb2008fa0, 0x0b2c008b, 0x9036c00c, 0x9103ac40, 0xcb1032c4, 0x0fa10328,
+ 0x00d88032, 0x000db003, 0xe800ff20, 0x32c00fb0, 0x03ec00fb, 0x003ec00f,
+ 0xb003ea00, 0x70000000, 0x00000000, 0xc8119c00, 0xb7002dc0, 0x0b7002dc,
+ 0x10b30421, 0xc00b7502, 0xfc00a400, 0x21000a30, 0x021c0083, 0x8021e008,
+ 0x5a12ce80, 0x87a021e0, 0x0b680218, 0x008500a1, 0x01087002, 0xd800b312,
+ 0x21c00b70, 0x02dc00b7, 0x002d000b, 0x5002f024, 0x60000000, 0x00000000,
+ 0x80009e00, 0xb78029e0, 0x0b7802de, 0x00b78021, 0xe01b7802, 0x9e008780,
+ 0x27e00b78, 0x129f0987, 0x8029ec09, 0x7a02de80, 0x838029e0, 0x0b78021e,
+ 0x009e8021, 0xe0097802, 0xda00b7b0, 0x21e00b78, 0x02de00b7, 0x802de00b,
+ 0x7802e000, 0x20000000, 0x00000000, 0x4814cc00, 0xb3002cc0, 0x0b3002cc,
+ 0x00b30020, 0xc05b3006, 0xcc10a380, 0xa4c00a3f, 0x028c0283, 0x0228c029,
+ 0x3002ce18, 0x830028c0, 0x0bb1422c, 0x00830020, 0xc0083842, 0xc800bb00,
+ 0x20c00b30, 0x02cc00b3, 0x016c000b, 0x1102d304, 0x30000000, 0x00000000,
+ 0xe815a800, 0xfa003a80, 0x0fa003e8, 0x00fa10b2, 0x800fa003, 0xa800ce00,
+ 0xb7808fa0, 0x03b800ca, 0x00ba942d, 0xa403aa82, 0xca40ba81, 0x0fa80b28,
+ 0x00da0032, 0x800daa03, 0xe800ba00, 0xa2800fa0, 0x03e800fa, 0x003e880f,
+ 0xa803fa04, 0x60000000, 0x00000000, 0x4800e000, 0xf8003e00, 0x0f8003e0,
+ 0x00f8003e, 0x000f0003, 0xe100f810, 0x3a120f80, 0x036090e8, 0x4036000e,
+ 0x8083e000, 0xf80a1400, 0x0f8003e0, 0x04f8003e, 0x000f8003, 0xf000f800,
+ 0x3e000f80, 0x03e000f8, 0x003e100f, 0x8803d200, 0x30000000, 0x00000000,
+ 0x0810e400, 0xf9003e40, 0x0f9003e4, 0x00eba032, 0x400f9203, 0xa600f908,
+ 0x3e410cb0, 0x03e400e9, 0x2006600c, 0x10030400, 0xc9003250, 0x4c940326,
+ 0x00c9013e, 0x504c9013, 0x2400f900, 0x32400f90, 0x03e400f9, 0x003e400f,
+ 0x9003c204, 0x30000000, 0x00000000, 0x80046400, 0xb9002e40, 0x0b9002e4,
+ 0x00e9c022, 0x400e9a0a, 0x2600b940, 0x204c0891, 0x022740cd, 0x002f6008,
+ 0xd0023400, 0x8d40a360, 0x28d81225, 0x0089002e, 0x50089c02, 0x2404b900,
+ 0x22400b90, 0x02e410b9, 0x012e580b, 0x9002e000, 0x10000000, 0x00000000,
+ 0x18012400, 0xb9002e40, 0x0b9002e4, 0x00a14022, 0x400b9002, 0x2460b108,
+ 0xee402830, 0x0a8420a9, 0x00254618, 0xd0023400, 0x95002340, 0x48d00234,
+ 0x408d802d, 0x40085102, 0x3400b900, 0x22400b90, 0x02e400b9, 0x002f400b,
+ 0xd002c600, 0x40000000, 0x00000000, 0x08040400, 0xb1002c40, 0x0b1006c4,
+ 0x00a11020, 0x400a1002, 0x0440b110, 0x24400811, 0x02044181, 0x002d4428,
+ 0x500a1410, 0x9713a1c4, 0x08510a16, 0x42859025, 0x64285902, 0x1400b128,
+ 0x20400b11, 0x02c400b1, 0x042d400b, 0x5842c201, 0x00000000, 0x00000000,
+ 0xb80d6000, 0xb8003e00, 0x0f8003e0, 0x00e868b2, 0x000b8283, 0x2100f040,
+ 0x3e000c86, 0x838100ea, 0x28341a0c, 0x828320a2, 0xd868321a, 0x0c868301,
+ 0x08c8403c, 0x100c840b, 0x3000f8a0, 0xb2000f84, 0x03e000f8, 0x003e000f,
+ 0xc003ce03, 0x50000000, 0x00000000, 0x981de400, 0xf9003e40, 0x0f9003e4,
+ 0x00f9201e, 0x400e9003, 0xe484fd22, 0x39400f92, 0x03f480e9, 0x023e480f,
+ 0x9003e400, 0xe9a23e68, 0x0f1a03e4, 0x88f1203e, 0x480f9203, 0xe404f9a8,
+ 0x3e400f92, 0x03e400f9, 0x003e400f, 0x9003e606, 0x70000000, 0x00000000,
+ 0x9805e400, 0xf9003e40, 0x0f9003e4, 0x00f91032, 0x410fd003, 0x3440c900,
+ 0x33400dd1, 0x0374028d, 0x0033450c, 0x9003f404, 0xf914b240, 0x0c100334,
+ 0x00dd003f, 0x400fd003, 0x2400dd00, 0x32400fd0, 0x03e400f9, 0x003e400f,
+ 0x9003c600, 0x70000000, 0x00000000, 0x3810e000, 0xb8002e00, 0x0b8002e0,
+ 0x00ba10a2, 0x008b8000, 0x2080a008, 0x22000801, 0x02a0a488, 0x0022084d,
+ 0x8022e008, 0xb802220a, 0x08c20220, 0x0088002e, 0x804b8002, 0x2010b800,
+ 0x22000b80, 0x03e000b8, 0x002e000b, 0xc002de04, 0x30000000, 0x00000000,
+ 0x4805c400, 0xb1002c40, 0x0b1002c4, 0x00b10020, 0x400b1002, 0x04808120,
+ 0x22400910, 0x02c48181, 0x002c480a, 0x1002c400, 0xb5002149, 0x08d29204,
+ 0x0491012c, 0x410b1002, 0x0400b100, 0x20400b10, 0x02c400b1, 0x002d400b,
+ 0x5002d201, 0x70000000, 0x00000000, 0x1815a400, 0xb9002e40, 0x0b9002e4,
+ 0x10b10022, 0x400bb002, 0x2400a188, 0x22600990, 0x02acb189, 0x0026408b,
+ 0x9202e400, 0xb10623c0, 0x88d0020d, 0x0089002e, 0xc80b9002, 0x2400b902,
+ 0x22400b90, 0x02e400b9, 0x002f400b, 0xd002c604, 0x60000000, 0x00000000,
+ 0xa015e400, 0xf9003e40, 0x0f9003e4, 0x00f94032, 0x400f900b, 0x2400c900,
+ 0xb2580d90, 0x83e502c9, 0x043e402e, 0x9003e404, 0xf900b240, 0x2c948334,
+ 0x00d9802f, 0x504fd00b, 0x2400f900, 0xa2400f90, 0x03e400f9, 0x003e400f,
+ 0x9003e804, 0x30000000, 0x00000000, 0xe801a400, 0xf9003e40, 0x0f9003e4,
+ 0x08fb203e, 0x400f1003, 0xe400fb00, 0x3e420e90, 0xa3a600f9, 0x083a420d,
+ 0x9023e400, 0xf9083e42, 0x0f904be4, 0x20f9203e, 0x400f9003, 0xe400f100,
+ 0x3e400f90, 0x03a400f9, 0x003e404f, 0x9003fa00, 0x20000000, 0x00000000,
+ 0x2810a000, 0xf8003e00, 0x0f8003e0, 0x00f840b2, 0x000f8003, 0xe080f800,
+ 0x3a108c84, 0x0ba020c0, 0x003e000c, 0x8043e040, 0xc8103200, 0x2cc40b20,
+ 0x10f8083a, 0x102e8041, 0x2000f800, 0xb2000f80, 0x03e000f8, 0x003e000f,
+ 0x8003ca04, 0x20000000, 0x00000000, 0x28052800, 0xba002e80, 0x0ba002e8,
+ 0x00ba6022, 0x800be902, 0xf800baf0, 0x21b20dec, 0x123b20ce, 0xa00f8008,
+ 0xa003aa02, 0x8a002280, 0x0d640238, 0x80be482f, 0x8008e003, 0x6800ba00,
+ 0x22800ba0, 0x026800ba, 0x012e804b, 0xa882ca00, 0x00000000, 0x00000000,
+ 0x28054c00, 0xb3002cc0, 0x0b30028c, 0x00b30820, 0xc01b3c02, 0xee109340,
+ 0x68d108b8, 0x02ac0493, 0xc40ed000, 0x30068e00, 0x83c022c0, 0x883b020c,
+ 0x01b2402c, 0xc00ab002, 0x0c00b102, 0x20c00b10, 0x02cc00b3, 0x002c000b,
+ 0x0002ca00, 0x50000000, 0x00000000, 0xa0011c00, 0xb7002dc0, 0x0b7002dc,
+ 0x00b70021, 0xc00b6086, 0xdd00b700, 0xa1c00970, 0xc23c0087, 0x802dc208,
+ 0x70029600, 0x8700a140, 0x09701214, 0x80b6002d, 0x68085202, 0x5c00b520,
+ 0x21c00b74, 0x025c10b7, 0x002dc00b, 0x5002c800, 0x40000000, 0x00000000,
+ 0xa8081e00, 0xf7803de0, 0x0f78039e, 0x00b38031, 0xe00b5803, 0xde00d690,
+ 0x29e00c78, 0x239e0297, 0x003fe02c, 0x78038e00, 0xcf8023a0, 0x0c78031b,
+ 0x00f7803f, 0xa00eec03, 0x1e00f590, 0x31e00f58, 0x23de00f7, 0x803d600f,
+ 0x5803ca02, 0x00000000, 0x00000000, 0x081dac00, 0xfb003ec0, 0x0fb003ec,
+ 0x00fa4826, 0xc00f8003, 0xe4007a40, 0x3cc003b0, 0x03cc00fb, 0x003ec00f,
+ 0xb003a400, 0xfb003e00, 0x0fb003e2, 0x00f9003e, 0x240f8803, 0xec00f540,
+ 0x3ec00fb0, 0x03ec00fb, 0x043ec00f, 0x9003c206, 0x60000000, 0x00000000,
+ 0x4005fe00, 0xff803fe0, 0x0ff803fe, 0x00fe803f, 0xe00fc803, 0x3e00cf80,
+ 0x33e10dc8, 0x0b3e004f, 0x903fe00f, 0xf113f600, 0x7e80b3e0, 0x0cc80b3e,
+ 0x08f78033, 0xe00ef803, 0xfe00fd88, 0x3fe40ff9, 0x03fe00ff, 0x812f240c,
+ 0xe803d000, 0x70000000, 0x00000000, 0xa8119c00, 0xb7002dc0, 0x0b7002dc,
+ 0x00b6002d, 0xc00b5002, 0x38028400, 0x21d808c0, 0x4a1c4287, 0x002dc40b,
+ 0x70039c00, 0xbf002340, 0x0ac00214, 0x00b700b7, 0x410a5402, 0xdc08f501,
+ 0x2dc00b70, 0x02dc44b7, 0x002dc208, 0x7002ea04, 0x60000000, 0x00000000,
+ 0x00009c00, 0xb7002dc0, 0x0b7002dc, 0x00b4002d, 0xc00b6002, 0x1c009600,
+ 0x23c03941, 0x02100087, 0x046d000b, 0x7106d400, 0xb6002180, 0x09490210,
+ 0x40bf0021, 0x84086002, 0xdc00b500, 0x2dc05b70, 0x42dc00b7, 0x002f4088,
+ 0x7082c000, 0x20000000, 0x00000000, 0x6014cc00, 0xb3002cc0, 0x0b3002cc,
+ 0x00b0002c, 0xc00b3012, 0x00009040, 0x20e0888a, 0x22002083, 0x022e008b,
+ 0x30028c00, 0xba052000, 0x0b800200, 0x00b34020, 0x000a0002, 0xcf80a102,
+ 0x2cc05bb0, 0x02cc00b3, 0x002cf008, 0x3802d804, 0x30000000, 0x00000000,
+ 0x2815ac00, 0xfb003ec0, 0x0fb003ec, 0x00fb303e, 0xc00f900b, 0x2c00db00,
+ 0xb2e20db4, 0xcb2f06cb, 0x002ec00f, 0xb003ec00, 0xf900b2c0, 0x2db0032c,
+ 0x00fb1022, 0xc00cb003, 0xed80bd00, 0x2ec00f90, 0x03ec00fb, 0x003e900c,
+ 0xa803ca04, 0x60000000, 0x00000000, 0x8000ec00, 0xfb003ec0, 0x0fb003ec,
+ 0x00fb403e, 0xc00f8403, 0xec08ed08, 0xbed00fa4, 0x03e140fb, 0x003e000f,
+ 0xb023c400, 0xfb003ec0, 0x8eb403e5, 0x00fb007e, 0x000f8003, 0xec10fd00,
+ 0x3ec00fb0, 0x03ec00fb, 0x003ec00f, 0xb003e000, 0x30000000, 0x00000000,
+ 0x8010fc00, 0xff003fc0, 0x0ff003fc, 0x00fd203f, 0xc00f8003, 0xfa00cea0,
+ 0xbbc42cd8, 0x033e00ff, 0x003fc00c, 0xf003fc00, 0xcd1033e0, 0x0cf42338,
+ 0x04ef013f, 0x104fc003, 0x3c00fd00, 0x03c00fd0, 0x033c00ff, 0x003ee20c,
+ 0xfa03c044, 0x30000000, 0x00000000, 0x80046c00, 0xbb002ec0, 0x0bb002ec,
+ 0x00b8082e, 0xc00b8802, 0xe020d880, 0x20a00981, 0x832100ba, 0x802e0408,
+ 0xb002e40a, 0x8b02a270, 0x2dbe0221, 0x0089602e, 0x100b8402, 0x2c00b904,
+ 0x22c00bb9, 0x02ac00bb, 0x002ee008, 0xb002e000, 0x10000000, 0x00000000,
+ 0x80052c00, 0xbb002ec0, 0x0bb002ec, 0x00bb002e, 0xc00b8802, 0xc4418300,
+ 0x2ac009b0, 0x0a2c40bb, 0x502ed008, 0xb002a404, 0x880020c4, 0x08b00208,
+ 0x00ab002e, 0xc00b3202, 0x2c00b100, 0x2ac00b90, 0x026c00bb, 0x002c8808,
+ 0xa002e000, 0x50000000, 0x00000000, 0x08040c00, 0xb3002cc0, 0x0b3002cc,
+ 0x00b3006c, 0xc00b1002, 0xc0009000, 0x22408920, 0x020000b0, 0x002c0008,
+ 0x3002cc04, 0xa100a0c0, 0x09300a00, 0x0083002c, 0x00090002, 0x0c00b100,
+ 0xa8c00b10, 0x02cc00b3, 0x042ec108, 0x3002c204, 0x00000000, 0x00000000,
+ 0x800d6c00, 0xfb003ec0, 0x0bb003ec, 0x00f9002e, 0xc00f8003, 0xe000c200,
+ 0x3a000c90, 0x030000b9, 0x003e000c, 0xb003a400, 0xc800b280, 0x2c900320,
+ 0x00eb003e, 0x004f800b, 0x2c00fd00, 0x3ac00f90, 0x0b6c00fb, 0x003ec00c,
+ 0xb003c002, 0x10000000, 0x00000000, 0xa01dfc00, 0xff003fc0, 0x0ff003fc,
+ 0x00fc003f, 0xc00fc003, 0xf004fc01, 0x3dc04ec0, 0x03b000ff, 0x003f000f,
+ 0xf001fc08, 0xdc023f00, 0x0ed003f0, 0x00ff003f, 0x000fc003, 0xfc00fd00,
+ 0x37c00fd0, 0x03bc00ff, 0x003fc00f, 0xf003e804, 0x70000000, 0x00000000,
+ 0xc005fe00, 0xff803fe0, 0x0ff803fe, 0x00ff803f, 0x200cc803, 0xf600ed80,
+ 0x3fe00fc2, 0x037e00df, 0x80b5200f, 0xd803fa00, 0xcf803fe0, 0x0fc00334,
+ 0x00cc803f, 0x204fe823, 0xf200cc80, 0x2d604c78, 0x0330d0cc, 0x823f102c,
+ 0xc2237000, 0x70000000, 0x00000000, 0xc010ee00, 0xbb802ee0, 0x0bb802ee,
+ 0x00bb842e, 0xa008b802, 0xe600a980, 0x2ee10b88, 0x02ae008b, 0x8422a00b,
+ 0xb802ea00, 0xdb802ee0, 0x0b800a24, 0x00a8802e, 0xa003b842, 0xee028b80,
+ 0x2e6028b8, 0x02a180a8, 0x802c1428, 0x86022004, 0x30000000, 0x00000000,
+ 0xc805cc04, 0xb3012cc0, 0x1b3002cc, 0x00b30028, 0x40083012, 0x8400a004,
+ 0x2cc00b04, 0x0a8c0093, 0x00208003, 0x1006e400, 0x93002cc0, 0x0b000204,
+ 0x0082000c, 0x001b3022, 0xe0008300, 0x6c400830, 0x0200c082, 0x002c0808,
+ 0x23868201, 0x70000000, 0x00000000, 0xc015ac00, 0xbb002ec0, 0x0bb002ec,
+ 0x00bb002e, 0xc028b002, 0xe6108988, 0x6ec00bb0, 0x10ac008b, 0x0022a009,
+ 0xb812ee00, 0x9b002ec0, 0x0b980226, 0x01aa002e, 0x100bb002, 0xec008b29,
+ 0x2e000890, 0x02a400aa, 0x082e0208, 0xb002b004, 0x60000000, 0x00000000,
+ 0x0015ec00, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0xc04c8003, 0xeb20eb80,
+ 0x3ec00f88, 0x038c10db, 0x0032220f, 0x9883ce00, 0xdb003ec0, 0x0f8c0323,
+ 0x30c9803e, 0x300fb483, 0xe004c8c0, 0x3cd02cb0, 0x032004c9, 0x923e100c,
+ 0x8c03c804, 0x70000000, 0x00000000, 0xa001bc00, 0x7f003fc0, 0x0ff003fc,
+ 0x00ff003f, 0xc20ff003, 0xf800ff01, 0x3fc00f79, 0x03bc00ff, 0x003b800f,
+ 0xd003fc00, 0xff003fc0, 0x0f8003dc, 0x007d223f, 0x890ff043, 0xfa48ff02,
+ 0x2fd00ff9, 0x03dc90fd, 0x8025c60f, 0x49037800, 0x60000000, 0x00000000,
+ 0xc010ac00, 0xfb003ec0, 0x0fb003ec, 0x00fb007e, 0xc00fb003, 0x2408f800,
+ 0x7ee00f85, 0x032c08fb, 0x003e000c, 0x9403ec08, 0x7b003ec0, 0x0f840ba0,
+ 0x00f9103e, 0x141fb403, 0xe400fb54, 0x32542cb1, 0x032900c9, 0x483ed02c,
+ 0x840b7004, 0x20000000, 0x00000000, 0xd8052c00, 0xbb002ec0, 0x0bb002ec,
+ 0x00bb002c, 0xd00bbe02, 0x02009900, 0x2ec40bb4, 0x036c5083, 0xc12ee028,
+ 0x9003ec00, 0xbb0026c0, 0x0b9a162e, 0x80b9522e, 0x144bb462, 0xcd44bb04,
+ 0x36c42a38, 0x036c00d9, 0xc22ed85d, 0x970a3200, 0x40000000, 0x00000000,
+ 0xe8054c00, 0xb3002cc0, 0x0930024c, 0x00b3002c, 0x300b0602, 0x0440b100,
+ 0x24c00b04, 0x828c0483, 0x88246008, 0x0002c800, 0xb3002cc0, 0x49900204,
+ 0x20b0802c, 0x600b3e02, 0xc100b3c8, 0x24d00838, 0x02008090, 0xd02c0009,
+ 0x10023000, 0x50000000, 0x00000000, 0xf0011e00, 0xb7802de0, 0x0b7802de,
+ 0x00b7802d, 0xa20bf802, 0x1709b580, 0x2de04b48, 0x0a5e0187, 0x882df088,
+ 0x6802da00, 0xb78025e0, 0x0b580216, 0x00b4802d, 0xe00b7802, 0xd620bf80,
+ 0x25a80a58, 0x064a2094, 0x802de089, 0x09021800, 0x40000000, 0x00000000,
+ 0x48080c00, 0xf3003cc0, 0x0f3003cc, 0x00f3002c, 0x400f3003, 0x0480f000,
+ 0x2cc14f32, 0x038c80e3, 0x003c860c, 0x0003cc04, 0xf3007cc0, 0x0f140284,
+ 0x00f2002c, 0xc00b3183, 0xc804b320, 0x34c18c31, 0x030d00d3, 0x003cc80c,
+ 0x35431a02, 0x00000000, 0x00000000, 0x401dbc00, 0xff003fc0, 0x0ff003fc,
+ 0x00ff002f, 0xc00f700b, 0xfc009e00, 0x3fc00f70, 0x035c02ef, 0x003f800f,
+ 0xf003bc00, 0xff0037c0, 0x4ff003f4, 0x00fe003f, 0xc00ff043, 0xfc00f700,
+ 0x2f880bd0, 0x17fc00ff, 0x013fc01f, 0xf1039006, 0x60000000, 0x00000000,
+ 0xa805ec00, 0xfb003ec0, 0x0fb003ec, 0x00fb007c, 0xe00e0803, 0x2800fb00,
+ 0x1ce00cb0, 0x032c00fb, 0x013ec00f, 0x9023ec00, 0xfb003ec0, 0x0fb00226,
+ 0x00db283a, 0x5c4fb0a2, 0xc100db00, 0x3ec02eb0, 0x03e400da, 0x283e001c,
+ 0xb0012a00, 0x70000000, 0x00000000, 0xc8119c00, 0xb7002dc0, 0x0b7002dc,
+ 0x00b7046d, 0xc0087002, 0x1c00b700, 0x0dc02870, 0x021c00b7, 0x002dc00b,
+ 0x5002dc00, 0xb7042dc0, 0x0bf0037c, 0x0087412d, 0xc20b7002, 0xd0208700,
+ 0x2dc02870, 0x12cc0086, 0x602cc00a, 0x20023204, 0x60000000, 0x00000000,
+ 0x80009e00, 0xb7802de0, 0x0b7802de, 0x00b7802f, 0xe08b7802, 0x5600b588,
+ 0x2de00838, 0x029e00b7, 0x8029a00b, 0x6806de00, 0xa7802de0, 0x0b78021a,
+ 0x0087e06d, 0xe80b7802, 0xfe089780, 0x2de00a78, 0x02de0897, 0x802de038,
+ 0x78223000, 0x20000000, 0x00000000, 0x4814cc00, 0xb3002cc0, 0x0b3002cc,
+ 0x00b3002c, 0xf4093002, 0x4c00b360, 0x24c00a35, 0x028c00b3, 0x002ce00b,
+ 0x3622cd00, 0xb3002cc0, 0x0b30024c, 0xc283082c, 0xc00b3406, 0xcc008304,
+ 0x6cd40a39, 0x02ce8093, 0x002cd00a, 0x38021204, 0x30000000, 0x00000000,
+ 0xe815a800, 0xfa003e80, 0x0fa003e8, 0x00fa003f, 0xb00fe003, 0x7a00fec0,
+ 0x1e808c6c, 0x4b8800fa, 0x013fa00f, 0xe483f804, 0xfa043e80, 0x0fe2033a,
+ 0x00da803e, 0x804fa403, 0xc840de00, 0x3da02ea8, 0x03fb80da, 0x883fa02c,
+ 0xe00b3a04, 0x60000000, 0x00000000, 0x4800e000, 0xf8003e00, 0x0f8003e0,
+ 0x00f8003e, 0x120e800b, 0xa2407800, 0x1e100d84, 0x836000f8, 0x003e340f,
+ 0x800360c0, 0xf8003e00, 0x0f8003e0, 0x00f8403e, 0x000f8203, 0xe000f800,
+ 0x3e100584, 0x23e100e8, 0x063e1c0f, 0x8103d200, 0x30000000, 0x00000000,
+ 0x0810e400, 0xf9003e40, 0x0f9003e4, 0x00f9003e, 0x600f9803, 0xe408f900,
+ 0x3a600f91, 0x03a508c9, 0x0022500f, 0x90032400, 0xc9003e40, 0x0f1a0724,
+ 0x00f9003e, 0x400fb803, 0xec80c912, 0x326a0c90, 0x03c640c9, 0x082c602c,
+ 0x9a030204, 0x30000000, 0x00000000, 0x80046400, 0xb9002e40, 0x0b9002e4,
+ 0x00b9002e, 0x740b9c82, 0xe500b100, 0x36720e90, 0x03e70081, 0x0022508b,
+ 0x10034400, 0xa9002e40, 0x0b9882a7, 0x00bb402e, 0xc08b9502, 0xe700a144,
+ 0x76400a90, 0x02e5008b, 0x402e4088, 0x980b6000, 0x10000000, 0x00000000,
+ 0x18052400, 0xb9002e40, 0x0b9002e4, 0x00b9002e, 0x401b9202, 0xe448b900,
+ 0x26484bb0, 0x42240289, 0x1022504b, 0x90022400, 0x89002e40, 0x09900224,
+ 0xa0b9002e, 0x400b9080, 0x64248940, 0x22c00890, 0x02e40089, 0x282e4a48,
+ 0x10020600, 0x40000000, 0x00000000, 0x08040400, 0xb1002c40, 0x0b1002c4,
+ 0x00b1002c, 0x400b1006, 0xcc11b904, 0x20408a10, 0x02c40081, 0x0028400b,
+ 0x90226400, 0xa1002c40, 0x0b110284, 0x40b3002c, 0x410b1022, 0xc400a901,
+ 0x26400a10, 0x02c44081, 0x006c4408, 0x310a4201, 0x00000000, 0x00000000,
+ 0xb80d6000, 0xf8003e00, 0x0f8002e0, 0x00b8002e, 0x800f8023, 0xe004f800,
+ 0x26000fa2, 0x83a800c8, 0x0032000f, 0x80032000, 0xc8003e01, 0x4f868221,
+ 0xa0f8003e, 0x000f8013, 0xe010c800, 0x228008a0, 0x03e9a2c8, 0x003e1a0c,
+ 0x86830e03, 0x10000000, 0x00000000, 0x981de400, 0xf9003e40, 0x0f9003e4,
+ 0x00f9003f, 0xc003f013, 0xf400ff00, 0xbe400ef0, 0x03e40039, 0x00b7400f,
+ 0xd003f400, 0xf9003e40, 0x0fd243f4, 0x80f9003e, 0x400f9003, 0xe400ff01,
+ 0x3d400fd0, 0x01f480f9, 0x003f480f, 0xd203e607, 0x60000000, 0x00000000,
+ 0x9805e400, 0xf9003e40, 0x0f9003e4, 0x00f9003f, 0x400ed003, 0xf400c900,
+ 0x37400fd0, 0x0b3412cd, 0x003f410f, 0x9003c400, 0xc9003e40, 0x0fd28314,
+ 0xc049003e, 0x400fd003, 0x3400cd00, 0x3f400fd0, 0x02f412c9, 0x043f480d,
+ 0xd2830600, 0x70000000, 0x00000000, 0x3810e000, 0xb8002e00, 0x0b8002e0,
+ 0x00b8001a, 0x00088022, 0xe8008802, 0x2e000b81, 0x0be00088, 0x003a800b,
+ 0x8043a000, 0x88002e00, 0x03a20360, 0xc8a8002e, 0x00038002, 0x20008800,
+ 0x0e000880, 0x12c020a8, 0x042e8a08, 0x82028e04, 0x30000000, 0x00000000,
+ 0x4805c400, 0xb1002c40, 0x0b1002c4, 0x00b1002e, 0x400a1002, 0xe4008100,
+ 0x6c411b10, 0x02040081, 0x022c400b, 0x1002e409, 0x81002c40, 0x43128204,
+ 0x80810028, 0x400b9012, 0x24008100, 0x2c403a10, 0x02cc40a1, 0x002c4c18,
+ 0x12868201, 0x70000000, 0x00000000, 0x1815a400, 0xb9002e40, 0x0b9002e4,
+ 0x00b9002e, 0x40489002, 0xe4008900, 0x0e400b90, 0x02e40009, 0x002a4419,
+ 0x9292a540, 0x89002e40, 0x4bb00264, 0x20a9142e, 0x400b9022, 0x24008901,
+ 0x2e406890, 0x42e580a9, 0x600ec408, 0x95028604, 0x60000000, 0x00000000,
+ 0xa015e400, 0xf9003e40, 0x0f9003e4, 0x00f9003c, 0x500e9903, 0xc750c980,
+ 0x3e404f94, 0x03040049, 0x003e400f, 0x9423e702, 0xc9003e40, 0x1f9c0326,
+ 0x40c9043e, 0x640f9203, 0x2620c910, 0x3c760e98, 0x33e600e9, 0x403e402d,
+ 0x9c0ba804, 0x20000000, 0x00000000, 0xe801a400, 0xf9003e40, 0x0f9003e4,
+ 0x00f9003a, 0x420f9883, 0xe402f922, 0x3e400f91, 0x826400f9, 0x003a400f,
+ 0x9003a600, 0xf9003e40, 0x0f1983e4, 0x00f9003e, 0x400f900b, 0xe482d900,
+ 0x3e608e92, 0x80e400f9, 0x8036400f, 0x9803ea00, 0x20000000, 0x00000000,
+ 0x2810a000, 0xf8003e00, 0x0f8003e0, 0x00f8003e, 0x101f8003, 0xe080f840,
+ 0x3e01c700, 0x432010d8, 0x003e104f, 0x8423e000, 0x48003e00, 0x0f8103e0,
+ 0x00c8043e, 0x001d8483, 0x2130f860, 0x32110c80, 0x23e028c8, 0x083e000f,
+ 0x840b0a04, 0x20000000, 0x00000000, 0x28052800, 0xba002e80, 0x0ba002e8,
+ 0x00ba002f, 0xa20be482, 0xfa00ba04, 0x2f820be4, 0x037b80ce, 0x000fb209,
+ 0xa0038800, 0xda002680, 0x0bec02f8, 0x008a802e, 0xb64b6c02, 0x1800be01,
+ 0x2ba80ae0, 0x00f8025a, 0x412f9088, 0xec020a00, 0x00000000, 0x00000000,
+ 0x28054c00, 0xb3002cc0, 0x0b3002cc, 0x00b3002c, 0xc00b3002, 0xcc00b301,
+ 0x2ce80320, 0x024e28b1, 0x002cf80b, 0x30008c00, 0x93002cc0, 0x0b3802ee,
+ 0x0083802c, 0xf00b380a, 0x0c50b3d2, 0x60c00938, 0x40ad0083, 0x402eed0a,
+ 0xbe024a00, 0x50000000, 0x00000000, 0xa0011c00, 0xb7002dc0, 0x0b7002dc,
+ 0x00b7002d, 0xc00b7002, 0xdd09b700, 0x2dc00964, 0x225c00a7, 0x082dc04b,
+ 0x7002bc00, 0x970025c0, 0x0b7002dd, 0x0087082d, 0x800be08a, 0x1c00b780,
+ 0x29400b74, 0x42dc0097, 0x002cc008, 0x30824800, 0x40000000, 0x00000000,
+ 0xa8081e00, 0xf7803de0, 0x0f7803de, 0x00f7802d, 0xe00b5803, 0xd200f780,
+ 0x2de00b28, 0x235e00f7, 0x803d600f, 0x78039e00, 0xd7803de0, 0x0f7803de,
+ 0x02c7803d, 0xe40b7827, 0x1e04f780, 0x31e00d78, 0x039e10c5, 0x803de01e,
+ 0x78034a02, 0x00000000, 0x00000000, 0x081dac00, 0xfb003ec0, 0x0fb003ec,
+ 0x00fb003e, 0x000fa033, 0xec00fb02, 0x3e808fa0, 0x02c808db, 0x003ec04d,
+ 0xb003ac00, 0xfb0036c0, 0x0f9003e0, 0x10fa4c2e, 0x990f3003, 0xe408f300,
+ 0x3c0006b0, 0x23e800ba, 0x4c7e408e, 0xb0038206, 0x60000000, 0x00000000,
+ 0x4005fe00, 0xff803fe0, 0x0ff803fe, 0x00ff803f, 0x200ff803, 0xfe487f80,
+ 0x1fa40fe8, 0x031e04ef, 0x923fa00c, 0xf303de00, 0xdf803fe0, 0x0ff90336,
+ 0x00cd8037, 0xe02cf842, 0x3e40cf92, 0x33e00cf9, 0x03fec0ce, 0x823fe00c,
+ 0xf8211000, 0x70000000, 0x00000000, 0xa8119c00, 0xb7002dc0, 0x0b7002dc,
+ 0x00b7012d, 0x400b5002, 0xd450b718, 0x25900b72, 0x435c0087, 0x040d5006,
+ 0x71039c00, 0xc7002dc0, 0x0bf002b4, 0x20a5002d, 0x40084103, 0x5c40d732,
+ 0x35440d71, 0x12f440a7, 0x002dc828, 0x62022a04, 0x60000000, 0x00000000,
+ 0x10009c00, 0xb7002dc0, 0x0b7002dc, 0x00b7002d, 0x800b5002, 0x9401b700,
+ 0x2dc01b50, 0x065c00a7, 0x000f4209, 0x7082bc00, 0x97002dc0, 0x0b402214,
+ 0x00850027, 0xc0087002, 0x9c209704, 0x23d20870, 0xc65c8194, 0x002d8088,
+ 0x50060000, 0x20000000, 0x00000000, 0x6814cc00, 0xb3002cc0, 0x0b3002cc,
+ 0x00b3002c, 0x000b1482, 0xc640b30c, 0x24018b34, 0x264c0083, 0x002c600a,
+ 0x3c828c00, 0x83002cc0, 0x0b040281, 0x00a0002c, 0x40083486, 0xcf209310,
+ 0x24a04938, 0x06c240b2, 0x012e3008, 0x84021804, 0x30000000, 0x00000000,
+ 0x3815ac00, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0x400f8e03, 0xe540fb80,
+ 0x3e800fa7, 0x036c00eb, 0x003c440d, 0xb403ac00, 0xdb003ec0, 0x0f9c032d,
+ 0x40ca0036, 0x620c3003, 0xab00da40, 0x32d00cb8, 0x03ef00db, 0x003ec22c,
+ 0xb10b0a04, 0x60000000, 0x00000000, 0x8000ec00, 0xfb003ec0, 0x0fb003ec,
+ 0x00fb003e, 0x700fb403, 0xec007b00, 0x36100fa4, 0x03ec10fa, 0x403e800f,
+ 0xb043ac40, 0xfb003ec0, 0x0f9103ed, 0x00f8013e, 0x000f8401, 0x6d00f920,
+ 0x3ec00fb4, 0x03cc20e9, 0x003e804f, 0x9403e000, 0x30000000, 0x00000000,
+ 0x8010fc00, 0xff003fc0, 0x0ff003fc, 0x00ff003f, 0xc00fc003, 0x3001ff00,
+ 0x3fc00fa0, 0x237400ff, 0x107f400c, 0xf001fc00, 0xcf003fc0, 0x0f408331,
+ 0x00ff4237, 0x400ff003, 0x3000fe40, 0x3fc00df0, 0x033600cd, 0x803bf204,
+ 0xa0030044, 0x30000000, 0x00000000, 0x80006c00, 0xbb002ec0, 0x0bb003ec,
+ 0x00bb002e, 0x600b2822, 0x2f20bb00, 0x2e308b26, 0x022208ba, 0x603ed00d,
+ 0xb002cc00, 0x8b002ec0, 0x0b8c0362, 0x20b04222, 0x348b9d02, 0xa760b9c0,
+ 0x2ca0483f, 0x22a30280, 0x8422100d, 0x8c032040, 0x10000000, 0x00000000,
+ 0x80052c05, 0xbb022ec0, 0x0bb002ec, 0x00bb002e, 0x620b9882, 0x2200bb00,
+ 0x2ea01ba0, 0x026e00bb, 0x002e2008, 0xb002ec00, 0x8b002ec0, 0x0b980224,
+ 0x00ba0826, 0x9009b402, 0x2801b808, 0x2ee009b0, 0x2269808a, 0x102a400a,
+ 0xb2822000, 0x50000000, 0x00000000, 0x08040c00, 0xb3002cc0, 0x0b3002cc,
+ 0x00b3002c, 0x400b9002, 0x0400b300, 0x2c800b20, 0x020c00b2, 0x00280009,
+ 0x3002ec02, 0x83002cc0, 0x0b100244, 0x00b80120, 0x010b1002, 0x8c00b100,
+ 0x2cc00890, 0x06c00189, 0x0060002b, 0x00020200, 0x00000000, 0x00000000,
+ 0x800d6c00, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0xc00f9002, 0x2000bb00,
+ 0x3ec00f80, 0x036c00fb, 0x042e400c, 0xb003ec00, 0xcb003ec0, 0x0f800320,
+ 0x08fb0036, 0x800fb013, 0x2400bb00, 0x2ec00da0, 0x036010c8, 0x0038004e,
+ 0x800b0002, 0x10000000, 0x00000000, 0xa01dfc00, 0xff003fc0, 0x0ff003bc,
+ 0x00ff003f, 0x400bd00b, 0xf400ff00, 0x3f000fe0, 0x01fc00fe, 0x003d400f,
+ 0xf007fc00, 0xdf003fc0, 0x0fc003f0, 0x00fc003d, 0x008f5003, 0xd400f500,
+ 0x1d800fc0, 0x03b008fc, 0x043f000d, 0xc003a806, 0x70000000, 0x00000000,
+ 0xc005fe00, 0xff802fe0, 0x0fec0312, 0x00ff803f, 0xe00ff803, 0xfe00ff22,
+ 0x37400cc4, 0x03f064dc, 0x1021200d, 0xe8033e00, 0xfc8035c8, 0x0cd90336,
+ 0x00ff803f, 0xe00ff803, 0xfe02cf80, 0x3fe00ff8, 0x03fe00ff, 0x803f600c,
+ 0xf803f000, 0x70000000, 0x00000000, 0xc000ee00, 0xbb802ee0, 0x0b220a22,
+ 0x00bb802e, 0xe00bb802, 0xee00bf90, 0x22700894, 0x02e58889, 0x603a002c,
+ 0xa8222200, 0xb9843ee4, 0x0a92022e, 0x00bb802e, 0xe00bb802, 0xee008b80,
+ 0x2ee00bb8, 0x02ee00bb, 0x802e400d, 0xb802e000, 0x30000000, 0x00000000,
+ 0xc805cc00, 0xb3002cc0, 0x0ba00240, 0x00b3002c, 0xc00b3002, 0xcc00b300,
+ 0x20500906, 0x02c00491, 0x42620008, 0x10020400, 0xb98020c1, 0x08900204,
+ 0x00b3002c, 0xc00b3002, 0xcc008300, 0x2cc00b30, 0x02cc00b3, 0x002e4008,
+ 0x3002c201, 0x60000000, 0x00000000, 0xc015ac00, 0xbb002ec0, 0x0ba00262,
+ 0x18bb002e, 0xc00bb002, 0xec00bb00, 0x22c08990, 0x82e40889, 0x002e2009,
+ 0x85422210, 0xbb802e40, 0x4a9c122c, 0x80bb002e, 0xc04bb002, 0xec008b00,
+ 0x2ec00bb0, 0x02ec00bb, 0x002e6209, 0xb002f005, 0x70000000, 0x00000000,
+ 0x0015ec00, 0xfb003ec0, 0x0fa00367, 0x10fb003e, 0xc00fb003, 0xec00fb00,
+ 0x32600da4, 0x03c200d8, 0xc022620c, 0xb80b2a10, 0xf18030f8, 0x4c980b2e,
+ 0x00fb003e, 0xc00fb003, 0xec00cb00, 0x2ec00bb0, 0x03ec00fb, 0x003e700c,
+ 0xb003c000, 0x70000000, 0x00000000, 0xa001bc08, 0xff003fc0, 0x0fe003b0,
+ 0x00ff003f, 0xc00ff003, 0xfc00f700, 0x3fd00eea, 0x03f240ec, 0x903b000e,
+ 0xe803f800, 0xfd043fc4, 0x0fd003fc, 0x00ff003f, 0xc00ff003, 0xfc00ff00,
+ 0x3fc00ff0, 0x03fc00ff, 0x003f400f, 0xf003e804, 0x60000000, 0x00000000,
+ 0xc010ac00, 0xfb003ec0, 0x0fa003a1, 0x84eb043e, 0xc00fb003, 0x6c00fb08,
+ 0x3e480ca6, 0x17a802c0, 0x403e100d, 0x90932528, 0xcb003250, 0x0c81132c,
+ 0x007b003e, 0xc00fb023, 0xec00fb00, 0x3ec00fb0, 0x07ec00fb, 0x003e700c,
+ 0xb003f004, 0x20000000, 0x00000000, 0xc8052c00, 0xbb002ec0, 0x0b204227,
+ 0x008b002e, 0xe80bb002, 0xec00bf60, 0x38e00db4, 0x262e02d8, 0x00205408,
+ 0x04022010, 0xdb003660, 0x080d022c, 0x00bb002e, 0xc00bb002, 0xcc00bb00,
+ 0x2ec00bb0, 0x02ec00bb, 0x002c400a, 0xb002f200, 0x40000000, 0x00000000,
+ 0xe0054c00, 0xb3002cc0, 0x0b20828c, 0x04a3022c, 0xc01b3002, 0xcc00b300,
+ 0x6c544810, 0x028828a2, 0x0028c009, 0x30020f00, 0x819220e0, 0x08300204,
+ 0x00b3002c, 0xc00b3002, 0xcc00b300, 0x2cc00b30, 0x02cc00b3, 0x002cd208,
+ 0x3002f000, 0x00000000, 0x00000000, 0xe0111e00, 0xb7802de0, 0x0b68223a,
+ 0x2087802d, 0xe00b7802, 0xde00b780, 0x69654918, 0x229e8493, 0x9223a408,
+ 0x69121a28, 0x958025c0, 0x0879021e, 0x00b7802d, 0xe00b7802, 0xde00b780,
+ 0x2de00b78, 0x02de00b7, 0x802fa00a, 0x7802d800, 0x00000000, 0x00000000,
+ 0x48000c00, 0xf3003cc0, 0x0f200280, 0x40a3003c, 0xc00b3003, 0xcc00f300,
+ 0x3cc40830, 0x02a022e3, 0x5038000d, 0x10030404, 0xc320b046, 0x0cb00b0c,
+ 0x00f3003c, 0xc00f3003, 0xcc00f300, 0x3cc00f30, 0x02cc00f3, 0x003c400c,
+ 0x3003d206, 0x00000000, 0x00000000, 0x4015bc00, 0xff003fc0, 0x0fe003f4,
+ 0x04ff003f, 0xc00ff003, 0xfc00ff00, 0x39c483f5, 0x237488ff, 0x503b400f,
+ 0x404bd000, 0xf7003f89, 0x0ff003fc, 0x00ff003f, 0xc04ff003, 0xfc01ff00,
+ 0x7fc00ff0, 0x03fc00ff, 0x003d440f, 0xf003d006, 0x20000000, 0x00000000,
+ 0xa805ec00, 0xfb003ec0, 0x0f200324, 0x10eb003e, 0xc00fb003, 0xec00fb80,
+ 0x32c0aca6, 0x012804ca, 0x4232404d, 0x18032800, 0xc90432c0, 0x2c900b2c,
+ 0x00fb003e, 0xc00fb003, 0xec00fb00, 0x3ec00fb0, 0x03ec00fb, 0x003ee00c,
+ 0xb003c200, 0x70000000, 0x00000000, 0xc8119c00, 0xb7002dc0, 0x0b600210,
+ 0x00b7002d, 0xc00b7002, 0xdc00b749, 0x21c12820, 0x020808a2, 0x00090000,
+ 0x600a1810, 0x850021c0, 0x2ad00a9c, 0x0097002d, 0xc00b7002, 0xdc00b700,
+ 0x6dc00b70, 0x02dc00b7, 0x002f8008, 0x7002f204, 0x60000000, 0x00000000,
+ 0x80009e00, 0xb7802de0, 0x0be8021a, 0x00b7806d, 0xe00b7802, 0xde00b380,
+ 0x24e00978, 0x121a2007, 0x8063a009, 0xdc023602, 0x878820e2, 0x087c021f,
+ 0x00b7802d, 0xe00b7822, 0xde00b780, 0x2de00b78, 0x02de00b7, 0x802d6008,
+ 0x7802c800, 0x20000000, 0x00000000, 0x4814cc00, 0xb3002cc0, 0x0b200a0f,
+ 0x00b3002c, 0xc00b3002, 0xcc00b300, 0xa4c02838, 0x820d30ab, 0x0420d008,
+ 0x08220700, 0x83c020a0, 0x8a3c328c, 0x00b3002c, 0xc00b3042, 0xcc00b300,
+ 0x2cc00b30, 0x02cc00b3, 0x002c4008, 0x3002da04, 0x30000000, 0x00000000,
+ 0xe815a800, 0xfa003e80, 0x0f60033b, 0x20fa003e, 0x800fa003, 0xe800fa00,
+ 0x34a02dae, 0x0b3a02ca, 0x52b3800d, 0xec031a00, 0xce40b180, 0x8ce80328,
+ 0x00fa003e, 0x800fa003, 0xe800fa00, 0x2e800ba0, 0x03e800fa, 0x003f802c,
+ 0xa003fb00, 0x30000000, 0x00000000, 0x4800e000, 0xf8003e00, 0x0f8403e1,
+ 0x20f8003e, 0x000f8003, 0xe000f800, 0x3a040f00, 0x43c000f8, 0x003e080f,
+ 0x80c3e140, 0xf8483e00, 0x2f8203e0, 0x04d8003e, 0x000f8003, 0xe000f800,
+ 0x3e000f80, 0x03e000f8, 0x003e000f, 0x8003d204, 0x20000000, 0x00000000,
+ 0x0810e400, 0xf9003e40, 0x0f990327, 0x02c9003e, 0x400c9003, 0xe400f980,
+ 0x3e400eb9, 0x032440eb, 0x0032500d, 0x9003e420, 0xc9003240, 0x0c940324,
+ 0x00f9003e, 0x400f9003, 0xe400f900, 0x3e400f90, 0x03e400f9, 0x003e400f,
+ 0x9003c204, 0x20000000, 0x00000000, 0x80046400, 0xb9002e40, 0x0b9c8a06,
+ 0x0089002e, 0x600b9002, 0xe400b9c0, 0x2e40089c, 0x02241089, 0x04224028,
+ 0x9002e400, 0x81482240, 0x08900a24, 0x00b9002e, 0x400b9002, 0xe400b900,
+ 0x2e400b90, 0x02e401b9, 0x002e400b, 0x9002e001, 0x10000000, 0x00000000,
+ 0x18052400, 0xb9002e40, 0x0b90022c, 0x2089002e, 0x440a9002, 0xe400b918,
+ 0x26400a94, 0x022400a9, 0x00204008, 0x9002ec80, 0x8980a260, 0x09100224,
+ 0x00b9002e, 0x400b9002, 0xe400b900, 0x2e400b90, 0x02e410b9, 0x002e600b,
+ 0x9002c600, 0x40000000, 0x00000000, 0x08040400, 0xb1002c40, 0x0b910204,
+ 0x0081002c, 0x400b1002, 0xc400b100, 0x2c404811, 0x020c46a1, 0x1020c408,
+ 0x1002e400, 0x81002260, 0x09310a04, 0x00b1002c, 0x400b1002, 0xc400b100,
+ 0x24400b10, 0x02c400b1, 0x002c440b, 0x1002c201, 0x00000000, 0x00000000,
+ 0xb80d6000, 0xf8003e00, 0x0f840320, 0x00c8003e, 0x000e8003, 0xe000f828,
+ 0x360a0e86, 0x8b21a0e8, 0x6832100c, 0xa003e802, 0xc801322a, 0x2d842320,
+ 0x08f8003e, 0x000f8003, 0xe000f800, 0x3e000f80, 0x03e000b8, 0x003e100f,
+ 0x8003ce03, 0x50000000, 0x00000000, 0x981de400, 0xf9003e40, 0x0f9203f4,
+ 0x00f9003e, 0x400f9003, 0xe410f904, 0x3f400792, 0x03f480d9, 0x20bdc80e,
+ 0xd001dc08, 0x7500af40, 0x0eda03f4, 0x00f9003e, 0x400f9003, 0xe400f900,
+ 0x3e400f90, 0x03e400f9, 0x003f480f, 0x9003ee06, 0x70000000, 0x00000000,
+ 0x9805e400, 0xf9003e40, 0x0f9003f4, 0x00f9043f, 0x400e9043, 0xe400f500,
+ 0x37400d91, 0x033480c9, 0x2833c40e, 0x5003d400, 0xfd003349, 0x4cd06324,
+ 0x00f9003e, 0x400f9003, 0xf400f900, 0x3e400f90, 0x03e400f9, 0x003f400f,
+ 0x9003ce00, 0x70000000, 0x00000000, 0x3810e000, 0xb8002e00, 0x0b0082e0,
+ 0x00b8002e, 0x000b8002, 0xe000b800, 0x22000801, 0x0a20a0aa, 0x00220848,
+ 0x8012e008, 0xb800a200, 0x0a820a20, 0x00b8002e, 0x004b8002, 0xe000b800,
+ 0x2e000b80, 0x02e000b8, 0x002e0a0b, 0x8002c604, 0x30000000, 0x00000000,
+ 0x4805c400, 0xb1002c40, 0x0b1222c4, 0x00b1002c, 0x400b1002, 0xc400b100,
+ 0x20440910, 0x0244c0b1, 0x0020480a, 0x1002c400, 0xb1002044, 0x08928204,
+ 0x00b1002c, 0x400b1002, 0xc400b100, 0x2c400b10, 0x02c400b1, 0x002c480b,
+ 0x1002d200, 0x20000000, 0x00000000, 0x1815a400, 0xb9002e40, 0x0b9002e6,
+ 0x00b9002e, 0x400b9002, 0xe400b901, 0x22480910, 0x026550a1, 0x00a04808,
+ 0x9002e440, 0xb9102242, 0x0a941224, 0x40b9002e, 0x400b9002, 0xe400b900,
+ 0x2e400b90, 0x02e400b9, 0x002e440b, 0x9002c604, 0x20000000, 0x00000000,
+ 0xa011e400, 0xf9003e40, 0x0f9003e4, 0x28f9043e, 0x400f9003, 0xe400f900,
+ 0xb0600d94, 0x834400e9, 0x4032400e, 0x9883e700, 0xf1489054, 0x0c150326,
+ 0x00f9003e, 0x400f9003, 0xe400f900, 0x3e400f90, 0x03e400f9, 0x003e480f,
+ 0x9003e800, 0x20000000, 0x00000000, 0xe800a400, 0xf9003e40, 0x0fb087e4,
+ 0x0cf9003e, 0x408f9003, 0xe400f900, 0x3e628eb2, 0x13a400f9, 0x013e400f,
+ 0x9c03e420, 0xf9883e42, 0x0f980be4, 0x00f9003e, 0x400f9003, 0xe400f900,
+ 0x3e400f90, 0x03e400f9, 0x003e600f, 0x9003fa04, 0x20000000, 0x00000000,
+ 0x2810a000, 0xf8003e00, 0x0f800b23, 0x00f8003e, 0x000d8003, 0xe000f008,
+ 0x72002c84, 0x03a000c8, 0x40ba180f, 0x84036002, 0xc8003e00, 0x0e8403e0,
+ 0x0078003e, 0x000f8003, 0xe000f800, 0x3e000f80, 0x03e000f8, 0x003e100c,
+ 0x8003ca04, 0x20000000, 0x00000000, 0x28043800, 0xba002e80, 0x8ba4033a,
+ 0x80ba002e, 0x800ba002, 0xe800be60, 0xa38208ac, 0x023a02da, 0x0023808b,
+ 0xe9033a00, 0x8e002f80, 0x08e182f8, 0x00ba006e, 0x800ba002, 0xe800ba00,
+ 0x2e800ba0, 0x03a800ba, 0x002f8208, 0xa002c200, 0x00000000, 0x00000000,
+ 0x28054800, 0xb3002cc0, 0x0b38020c, 0x00b3002c, 0xc00b3002, 0xcc00b3c0,
+ 0x20c0083a, 0x128e0023, 0x0028300b, 0x210a0f40, 0x83002cd0, 0x0a1002c8,
+ 0x00b3002c, 0xc00b3002, 0xcc00b300, 0x2cc00b30, 0x028c00b3, 0x002ce228,
+ 0x3002c200, 0x50000000, 0x00000000, 0xa0011800, 0xb7002dc0, 0x0b7c021c,
+ 0x00b7002d, 0xd00b7002, 0xdc00b600, 0x61000870, 0x82090497, 0x2021500b,
+ 0x68021a00, 0x87002dc0, 0x486012d8, 0x0037002d, 0xc00b7002, 0xdc00b700,
+ 0x2dc00b70, 0x029c00b7, 0x002da018, 0x7002c804, 0x40000000, 0x00000000,
+ 0xa8081a00, 0xf7803de0, 0x0f690b1e, 0x00f7803d, 0xe00b7803, 0xde00f680,
+ 0x21e00c78, 0x039a00e3, 0x8839200f, 0x78031e00, 0xc7803de0, 0x4e5843da,
+ 0x0077802d, 0xe10f7803, 0xde00f780, 0x3de00f78, 0x039e00f7, 0x803f608c,
+ 0x7803ca02, 0x00000000, 0x00000000, 0x081da800, 0xfb003ec0, 0x0fb203a8,
+ 0x00fb003e, 0x400fb003, 0xec04fb00, 0x3c008fa6, 0x83e000fb, 0x703e400f,
+ 0xb003ac04, 0xfb003c40, 0x0fa003e8, 0x00fb003e, 0xc00fb003, 0xec00fb00,
+ 0x7ec00fb0, 0x03ac00fb, 0x007f000f, 0xb003c204, 0x60000000, 0x00000000,
+ 0x4005fa00, 0xff803fe0, 0x0f78031a, 0x00cf803d, 0xe00cf803, 0xfc80ff80,
+ 0x33200ce8, 0x03fe00df, 0x8233200c, 0xe203be00, 0xc79433e0, 0x2cf8033a,
+ 0x04cf803f, 0xe00ff803, 0xfe00ff80, 0x3fe00ff8, 0x03fe00ff, 0x803fe00f,
+ 0xf803d800, 0x20000000, 0x00000000, 0xa8119800, 0xb7002dc0, 0x0b700218,
+ 0x0087102d, 0x44087002, 0xdc003620, 0xa1110866, 0x12f840af, 0x0023440a,
+ 0x6002d440, 0x871129c0, 0x08f10218, 0x0287003d, 0xc40b7002, 0xdc01b700,
+ 0x6dc00b70, 0x02dc01b7, 0x002dc00b, 0x7002ea00, 0x20000000, 0x00000000,
+ 0x10009800, 0xb7002dc0, 0x0bc00219, 0x0087002d, 0xc0087002, 0xdc40b202,
+ 0x21000960, 0x06d00097, 0x0021c008, 0x71829c00, 0x97022d82, 0x28500218,
+ 0x0087002d, 0xc00b7002, 0xdc00b700, 0x2dc00b70, 0x02dc00b7, 0x002dc00b,
+ 0x7002c000, 0x20000000, 0x00000000, 0x6014c800, 0xb3002cc0, 0x0b100a08,
+ 0x0283002c, 0x40083002, 0xcc04b300, 0x20001920, 0x02c010a3, 0x40e2d00a,
+ 0x3402cc00, 0x93812c00, 0x08200208, 0x40830228, 0xc00b3002, 0xcc00b300,
+ 0x2cc00b30, 0x02cc00b3, 0x002cc00b, 0x3002d004, 0x30000000, 0x00000000,
+ 0x2815a800, 0xfb003ec0, 0x0f300328, 0x00cb043e, 0xc00cb003, 0xec007300,
+ 0x32220db4, 0x03e000df, 0x0032900c, 0x8c03ad02, 0xd2c03cc0, 0x0c80032a,
+ 0x00cb002e, 0xc00fb003, 0xec00bb00, 0x3ec00fb0, 0x02ec00fb, 0x001ed40b,
+ 0xb003ca00, 0x60000000, 0x00000000, 0x8000e800, 0xfb003ec0, 0x0fb003e0,
+ 0x00fb003e, 0x402fb003, 0xec00f840, 0x3a002eb4, 0x23e028f3, 0x203ec00f,
+ 0x8443ecc8, 0xe8703ac0, 0x8fb003e8, 0x00fb003e, 0xc00fb003, 0xec00fb00,
+ 0x3ec00fb0, 0x03ec00fb, 0x003e000f, 0xb003e804, 0x30000000, 0x00000000,
+ 0x8010f800, 0xcf003fc0, 0x0fe20332, 0x00ff003f, 0xf00ff003, 0xfc00fc40,
+ 0x3b040cd1, 0x933309df, 0x0073860c, 0xd0837800, 0xff0032ea, 0x0cc00338,
+ 0x00cf003f, 0xc00ff003, 0xfc00ff00, 0x3fc00ff0, 0x03fc00ff, 0x003f400c,
+ 0xf003c044, 0x30000000, 0x00000000, 0x80044800, 0x8b002ec0, 0x0bbe0221,
+ 0x88bb012e, 0xe08bb002, 0xec00b920, 0xa0300880, 0x030304cb, 0x0276c008,
+ 0x16022e00, 0xbbc922d3, 0x0db40348, 0x00db002e, 0xc00bb022, 0xec00bb00,
+ 0x2ec00bb0, 0x02ec00bb, 0x002d200a, 0xb002e040, 0x10000000, 0x00000000,
+ 0x80052800, 0x9b002ec0, 0x0b800264, 0x80bb002e, 0xc00bb002, 0xec01b800,
+ 0x22000810, 0x0220268b, 0x00228008, 0xa1022c60, 0xbb8122c1, 0x08340228,
+ 0x009b002e, 0xc00bb002, 0xec00bb00, 0x2ec00bb0, 0x02ec00bb, 0x002ee008,
+ 0xb002e000, 0x50000000, 0x00000000, 0x08040800, 0x93002cc0, 0x0b80024c,
+ 0x00b3002c, 0x400b3002, 0xcc09b200, 0x20001810, 0x0a000083, 0x0024c028,
+ 0xa0020c04, 0xb90520c0, 0x09300a68, 0x00930024, 0xc00b3002, 0xcc00b300,
+ 0x2cc00b30, 0x02cc00b3, 0x002ec04a, 0x3002c201, 0x00000000, 0x00000000,
+ 0x800d6800, 0xdb003ec0, 0x0f800364, 0x00fb012e, 0xc00bb002, 0xec00f800,
+ 0x32008c90, 0x1320088f, 0x0222c048, 0xa00b2800, 0xfb00b2c0, 0x0c800328,
+ 0x00db003e, 0xc00fb003, 0xec01fb00, 0x3ec00fb0, 0x03ec00fb, 0x003ec00c,
+ 0xb003c006, 0x00000000, 0x00000000, 0xa01df800, 0xef003fc0, 0x0fc003b0,
+ 0x00ff003f, 0x400ff003, 0xfc00fc00, 0x3d010fc0, 0x23b000ff, 0x003fc00b,
+ 0xf0039c00, 0xff003fc0, 0x0ff003d8, 0x00ff003f, 0xc00ff003, 0xfc00ff00,
+ 0x3fc00ff0, 0x03fc00ff, 0x003fc01f, 0xf003e806, 0x70000000, 0x00000000,
+ 0xc005fe08, 0xff803fe0, 0x0ff803fe, 0x00ff803f, 0xf00dc813, 0x9600cd80,
+ 0x3fe00cf8, 0x039200cf, 0x803fe00f, 0xd8033e00, 0xfc003fe0, 0x0fd00374,
+ 0x10fd0033, 0x210ff803, 0xf402ed80, 0x3f200cc8, 0x03f200fc, 0x8033020c,
+ 0x78023000, 0x70000000, 0x00000000, 0xc010ee00, 0x3b802ec0, 0x0bb802ee,
+ 0x00bb802e, 0xc02ab802, 0x22088b81, 0x26e008b8, 0x222200ab, 0x842ee00e,
+ 0xb8022e00, 0xb8802ee0, 0x0b980224, 0x04b98022, 0x200bb843, 0xa608fb80,
+ 0x2e800a98, 0x52ea00b9, 0x802a3008, 0xa00a2004, 0x30000000, 0x00000000,
+ 0xc805cc00, 0xb3002cc0, 0x0b3002cc, 0x00b3002c, 0xc81a0002, 0xac018101,
+ 0x2e0009b0, 0x028c0083, 0x0028c00b, 0x20020c00, 0xb0002cc0, 0x83104884,
+ 0x10b10120, 0xc09b3022, 0xc004a304, 0x6c400820, 0x02c010b3, 0x00200188,
+ 0x328a0201, 0x70000000, 0x00000000, 0xc015ac00, 0xbb002ee0, 0x0bb002ec,
+ 0x00bb002e, 0xc048b002, 0x2e228bc4, 0x268001b0, 0x022c248b, 0x042ec000,
+ 0xb8822c00, 0xb8882ec0, 0x199c02a6, 0x009bc122, 0xc10bb002, 0x6600bb01,
+ 0x2ee20a90, 0x00ec00bb, 0x002a0048, 0x91023004, 0x60000000, 0x00000000,
+ 0x0015ec00, 0xfa003ec0, 0x0fb003ec, 0x00fb003e, 0xc00f9803, 0x8600c904,
+ 0x3eec8d12, 0x038002cb, 0x003ec04f, 0x9c232c00, 0xf8c03ec0, 0x0f8813e6,
+ 0x00f180b2, 0x300fb003, 0xe702e9b1, 0x3ed00c80, 0x03e340fa, 0x4832280c,
+ 0xbc030004, 0x70000000, 0x00000000, 0xa001bc00, 0xfe003fc0, 0x0ff003fc,
+ 0x00ff003f, 0xc00ff203, 0xf000ff00, 0x3fc22ad1, 0x03f044ff, 0x003fc006,
+ 0xf003fc00, 0xfc003fc0, 0x0fd02774, 0x00fd003f, 0x324ff003, 0x9402fd04,
+ 0x37c00be0, 0x03f8007f, 0x243f252f, 0xf803f800, 0x60000000, 0x00000000,
+ 0xc010ac00, 0xfa003684, 0x0cb003ec, 0x00fb003e, 0xc20d9203, 0xe500c940,
+ 0x72400fb2, 0x032c00eb, 0x0036c01f, 0xa5832c00, 0xf9403ec0, 0x0fa103ec,
+ 0x00c9403e, 0xd04fb20b, 0x2180cb40, 0x3ad80cb0, 0x03e090fb, 0x403cc00f,
+ 0xb0033004, 0x20000000, 0x00000000, 0xd8052c00, 0xba002280, 0x08b002ec,
+ 0x00bb002e, 0xf2803822, 0xe000db00, 0x20190bbc, 0x822c408b, 0xc022c00b,
+ 0x34036c00, 0xb90026c0, 0x0b2c02ed, 0x05db0226, 0xf00bb012, 0x25908bd0,
+ 0x0ef00db0, 0x00ec00b3, 0xe02ef50b, 0xb802b200, 0x40000000, 0x00000000,
+ 0xe0054c00, 0xb30024c0, 0x083002cc, 0x00b3002e, 0xe0082402, 0xc4009000,
+ 0x20f00b24, 0x0a400083, 0x6024c00b, 0x30020c00, 0xb1002cc0, 0x0b1c8241,
+ 0x20806424, 0x11033932, 0x04000184, 0x0ad00800, 0x42c500b3, 0x2024f40b,
+ 0xb2023800, 0x50000000, 0x00000000, 0xf8011e00, 0xbb8021f0, 0x087802de,
+ 0x01b7806d, 0xe0087882, 0xd2429d80, 0x21e00be8, 0x02120087, 0x8821e00b,
+ 0xf8025e00, 0xb78025e0, 0x0b5802d2, 0x00958225, 0x600b7802, 0x16008688,
+ 0x2fe20958, 0x02d601b7, 0x812de44b, 0xf8029800, 0x40000000, 0x00000000,
+ 0x48080c00, 0xf30036c0, 0x083003cc, 0x00f3003e, 0xc00c2003, 0xcc40d000,
+ 0xa0000f20, 0x030c02e3, 0x0034c00b, 0x30030c00, 0xf1003cc4, 0x0f1003e4,
+ 0x2081083c, 0x074f3103, 0x0c00c301, 0x38c10c21, 0x93c950f3, 0x117cc44f,
+ 0x30a31202, 0x00000000, 0x00000000, 0x401dbc00, 0xff003fc0, 0x2ff003fc,
+ 0x00ff003f, 0xc00af003, 0xfc50f410, 0x3fc00f70, 0x027c04f7, 0x003fc00f,
+ 0x7103fc00, 0xff1007c0, 0x0ff103f0, 0x007f1217, 0x400f7003, 0xd408ff00,
+ 0x3dc40fd1, 0x03fc51ff, 0x017fc40f, 0xf103d006, 0x60000000, 0x00000000,
+ 0xa805ec00, 0xfa003e40, 0x0cb043ec, 0x00fb003e, 0xc00fb003, 0xc408c800,
+ 0x3cc00c18, 0x036c00cb, 0x003ec00c, 0xb0032c00, 0xf98032c0, 0x0f900024,
+ 0x00f8043e, 0x9807b013, 0xec06d800, 0x0ec00f82, 0x23e490fb, 0x003e000c,
+ 0xb0012a00, 0x70000000, 0x00000000, 0xc8119c01, 0xb6002f40, 0x087002dc,
+ 0x00b7022d, 0xc00b7006, 0xdc008504, 0x2dc04860, 0x021c00a7, 0x012dc00c,
+ 0x70035c00, 0xb70021c0, 0x0350435c, 0x00b7002d, 0xc28b7002, 0xdc00f600,
+ 0x2dc08b66, 0x82d520b7, 0x002d0008, 0xf0023204, 0x60000000, 0x00000000,
+ 0x80009e00, 0xb6802d20, 0x287802de, 0x00b7802d, 0xe08b7802, 0xd6008780,
+ 0x2fe22858, 0x06de0097, 0x802de008, 0x78025e00, 0xb38025e1, 0x4338021e,
+ 0x00b4802d, 0xac1b7802, 0xce0497c0, 0x65e0cb7a, 0x22da80b7, 0xc02ce048,
+ 0x78223000, 0x20000000, 0x00000000, 0x4814cc00, 0xb2002e18, 0x083002cc,
+ 0x00b3002c, 0xc00b3042, 0xcf0083f0, 0x2ce2083a, 0x228f30b3, 0x002cc009,
+ 0x30024c10, 0xb38824c0, 0x0b36224d, 0x00b3c02c, 0xe41b3002, 0xcc08b340,
+ 0x2cc00b3e, 0x02cc00b3, 0x802ced08, 0x3c821204, 0x30000000, 0x00000000,
+ 0xe815a800, 0xfa003e80, 0x0ca003e8, 0x00fa003e, 0x800f6403, 0xf962ce42,
+ 0x3f900cea, 0x03d800da, 0x003e800c, 0xe0036800, 0xfe08b680, 0x0fe60338,
+ 0x00fe643e, 0xa00fa003, 0xf800d6c0, 0x37880fac, 0x03e800fe, 0x803f802c,
+ 0xec0b3a04, 0x60000000, 0x00000000, 0x4800e000, 0xf8803e00, 0x0f8003e0,
+ 0x00f8043e, 0x000f8003, 0xe100f800, 0x3e100f84, 0x012040e8, 0x013e002e,
+ 0x8003e000, 0xf8003a00, 0x1f8003e1, 0x40f8403e, 0x000f8003, 0xe002f841,
+ 0x3e200f85, 0x12e000f8, 0x013e000f, 0x8103d200, 0x30000000, 0x00000000,
+ 0x0810e400, 0xf9003e60, 0x2c9003e4, 0x00f9003e, 0x400c9483, 0x2400c902,
+ 0x3e402c90, 0x03e680d9, 0x903e400c, 0x9a232400, 0xf9003e40, 0x0f182304,
+ 0x60c18a32, 0x400f9003, 0xe600c9a8, 0x32684f91, 0x23251079, 0x903c480c,
+ 0x92030204, 0x30000000, 0x00000000, 0x80046400, 0xb9002e64, 0x089002e4,
+ 0x00b9002e, 0x4c089812, 0x05088900, 0x2c444c94, 0x02e50089, 0x206c400f,
+ 0x1c07e400, 0xb9002e40, 0x0b900365, 0x00d93436, 0xc8cb9002, 0xc640a920,
+ 0x2a624b30, 0x036d0099, 0x002e78a8, 0x90022000, 0x10000000, 0x00000000,
+ 0x18052400, 0xb9002f40, 0x089002e4, 0x00b9002c, 0x40089406, 0x24068900,
+ 0x2e408992, 0x02e40499, 0x002e5048, 0x90822400, 0xb9002e40, 0x0b92022c,
+ 0x00890022, 0xc00b9102, 0xec008900, 0x26400b90, 0x022500b9, 0x002e4008,
+ 0x30820600, 0x40000000, 0x00000000, 0x08040400, 0xb5002d44, 0x081002c4,
+ 0x00b1002c, 0x44289002, 0x0c008100, 0x2e400830, 0x02e40081, 0x002c400a,
+ 0x10028400, 0xb1002c40, 0x0b104244, 0x48910024, 0x400b1002, 0xc401a904,
+ 0x2c440b90, 0x02440091, 0x002c4008, 0x11020201, 0x00000000, 0x00000000,
+ 0xb80d6000, 0xf8003f10, 0x0c8003e0, 0x00b8003e, 0x100c8003, 0x20088800,
+ 0x2e800d80, 0x03e800d8, 0x002e0008, 0x80022000, 0xf8283e00, 0x0fa2c329,
+ 0xb0c82822, 0x000f8003, 0xe0a0c801, 0x36100fa0, 0x032000f8, 0x003e0a0c,
+ 0x840b2e03, 0x50000000, 0x00000000, 0x981de400, 0xf9003ec8, 0x0f9003e4,
+ 0x00f9003e, 0x480fd00b, 0xf400fd00, 0x1f400ed0, 0x03d400f9, 0x003c410f,
+ 0x5003e400, 0xff003e40, 0x0fd003f4, 0x80fd0006, 0x400f9003, 0xf400fd00,
+ 0x3b480f90, 0x03e400fd, 0x043fc00f, 0xd203e606, 0x70000000, 0x00000000,
+ 0x9805e400, 0xf9003fc0, 0x0f9003e4, 0x00f9003f, 0x440cd013, 0xd400c102,
+ 0x3d400ed0, 0x035400e5, 0x003d400e, 0x5003e400, 0xf9003e40, 0x0f5203b4,
+ 0xa0bd203e, 0x400bd003, 0xfc00c502, 0x0d40cf90, 0x03e410fd, 0x0033400c,
+ 0xd0032600, 0x70000000, 0x00000000, 0x3810e000, 0xb8002e08, 0x0b8002e0,
+ 0x00b8002c, 0x010d8002, 0xe008e800, 0x3a8108a0, 0x022000d8, 0x003a0008,
+ 0x8003a000, 0xb8002e00, 0x0b800220, 0x80b8142e, 0x800b8022, 0xe044d800,
+ 0x26888b80, 0x02e800b8, 0x002a0408, 0x02820e04, 0x30000000, 0x00000000,
+ 0x4805c400, 0xb1002c4a, 0x0b1042c4, 0x00b1002c, 0x40891002, 0xc4048100,
+ 0x6c400a10, 0x024400a1, 0x002c400b, 0x1002c400, 0xb1102c40, 0x0b110284,
+ 0xa4b1802c, 0x404b1000, 0xc4008100, 0x244a8b10, 0x02c400b9, 0x0020402a,
+ 0x12020201, 0x70000000, 0x00000000, 0x1811a400, 0xb9002e40, 0x0b9002e4,
+ 0x00b9042c, 0x41099002, 0xe400b928, 0x2e400890, 0x02251099, 0x000ec00a,
+ 0xb002e400, 0xb9102e40, 0x0bb20224, 0x00b9202e, 0x410b9012, 0xe440991a,
+ 0x26400b90, 0x06e40139, 0x002a400a, 0x10020604, 0x60000000, 0x00000000,
+ 0xa015e400, 0xf9003e40, 0x0f9003e4, 0x00f9003e, 0x400d9013, 0xc682c941,
+ 0x3c400e1c, 0x036400e9, 0x003c400f, 0x9701e400, 0xf9003e40, 0x0f1c83a6,
+ 0x80f9c03e, 0x608f9003, 0xc680c900, 0x76500f90, 0x83e500f1, 0xb632702e,
+ 0x9a0b2804, 0x70000000, 0x00000000, 0xe801a400, 0xf9003e40, 0x0f9003e4,
+ 0x00f9003e, 0x428f9083, 0xe690e900, 0x3a720f9a, 0x03e640f9, 0x003a400d,
+ 0x9003a400, 0xf9003e40, 0x0f9007e5, 0x00f90a3e, 0x684f9023, 0xe600f980,
+ 0x3e400f91, 0x03e448f9, 0x803e4805, 0x9903ea00, 0x60000000, 0x00000000,
+ 0x2810a000, 0xf8003e10, 0x0c8003e0, 0x00f8003e, 0x002c8003, 0xe000c800,
+ 0x32100c82, 0x03a010c8, 0x0036000c, 0x80032000, 0xf8403e00, 0x0f840360,
+ 0x61c80032, 0x000f8243, 0xe000c860, 0x3214cc84, 0x43e030f8, 0x003c000c,
+ 0x8c0b0a04, 0x20000000, 0x00000000, 0x28052800, 0xba002fa0, 0x08a002e8,
+ 0x00ea012f, 0xb208e202, 0xf8008a04, 0x238008e0, 0x021904ae, 0x80239128,
+ 0xec02a800, 0xba002680, 0x0bec023a, 0x00ae40a2, 0x9509e402, 0xf8048e04,
+ 0x0b900da4, 0x02e800ee, 0x402f800a, 0xe8020a00, 0x40000000, 0x00000000,
+ 0x28054c00, 0xb3002ce0, 0x283002cc, 0x00a3002c, 0xe0083802, 0xcd808300,
+ 0x24142830, 0x028c6083, 0x902cc280, 0x13028c00, 0xa3002cc0, 0x0b3da24c,
+ 0x00835020, 0xf40b3002, 0xc80683c0, 0x00e80836, 0x02cc00a3, 0x602cc000,
+ 0x30424a00, 0x50000000, 0x00000000, 0xa0011c00, 0xb7002da2, 0x087002dc,
+ 0x00a7002d, 0xc0086012, 0xdd008f80, 0x27800850, 0x821c04a7, 0x8029d008,
+ 0xf8029c00, 0xb70025c0, 0x0b70021e, 0x08a78021, 0x80097042, 0xfc008ec2,
+ 0x2b600970, 0x02d908a7, 0x042cc10a, 0x70a06800, 0x40000000, 0x00000000,
+ 0xa8081e00, 0xf7803fe0, 0x0c7803de, 0x00e7803d, 0xe00c7803, 0xde02c780,
+ 0x35200c78, 0x139e02c7, 0x803de00c, 0x78039e00, 0xe7803de0, 0x0f78037a,
+ 0x00878331, 0xe40b7803, 0xda00c780, 0x31e00c58, 0x83de00e7, 0x807de04c,
+ 0x78436a02, 0x00000000, 0x00000000, 0x081dac00, 0xfb003e80, 0x0fb003ec,
+ 0x00eb001e, 0xc00f9003, 0xec00fb00, 0xba400f30, 0x03ec00da, 0x0036c00f,
+ 0xb003ec00, 0xfb003ec0, 0x0fb003e0, 0x00f3003e, 0x9903b043, 0xcc08fb00,
+ 0x3e400f90, 0x03e9a0eb, 0x027ec04f, 0x80038206, 0x60000000, 0x00000000,
+ 0x4005fe00, 0xff803fe0, 0x0cf803fe, 0x00ff803f, 0xe00ed803, 0xfa00cf80,
+ 0x3da04c78, 0x033e00cf, 0x803fe00c, 0x78073c40, 0xff8033e0, 0x0fe30336,
+ 0x00f78013, 0x600df803, 0x1a005f80, 0x33a10ff8, 0x03f640ff, 0x8431e48c,
+ 0x49131000, 0x70000000, 0x00000000, 0xa8119c00, 0xb7002f90, 0x087002dc,
+ 0x00b7000f, 0xc0086083, 0xd8008721, 0x0d980860, 0x0a9c80d5, 0x022dc00d,
+ 0x70079c00, 0xb70039c0, 0x83702014, 0xa0b72021, 0xc0087123, 0x5c42a620,
+ 0x35484b70, 0x23d400b7, 0x5269cc0a, 0x4383ea04, 0x60000000, 0x00000000,
+ 0x18009c00, 0xb7002dc0, 0x087002dc, 0x00b7002d, 0x000a5102, 0xdd008705,
+ 0x0d0008f0, 0x02181085, 0x002d800b, 0xe0025c40, 0xb70025c0, 0x0b565014,
+ 0x00b70867, 0x00087002, 0xf8009701, 0x2d021b40, 0x02d021b7, 0x0021c018,
+ 0xf0060600, 0x20000000, 0x00000000, 0x6014cc00, 0xb3002c80, 0x083002cc,
+ 0x00b3002c, 0x00081022, 0xcc0083a0, 0x2c12083c, 0x820c1090, 0x002c800b,
+ 0x3e028c00, 0xb30028c0, 0x0b300203, 0x00b1a2e4, 0x99083002, 0xcf0193c0,
+ 0x24600b0e, 0x06c208b3, 0x0228c01a, 0x0006d804, 0x30000000, 0x00000000,
+ 0x2815ac08, 0xfb003ec0, 0x2cb003ec, 0x00fb003e, 0xc00e9403, 0xef22cb44,
+ 0x3e300cae, 0x132c06cb, 0x013cc00f, 0x30836c00, 0xfb0836c0, 0x0f3c832e,
+ 0x00fbc036, 0xc00cb003, 0xea40d361, 0x3ee00fa4, 0x83ed40f3, 0x5032c00c,
+ 0xbd030e04, 0x60000000, 0x00000000, 0x9000ec00, 0xfb003e40, 0x0fb003ec,
+ 0x00fb013e, 0x100fb423, 0xad00fb11, 0x3e140f84, 0x03ec00fa, 0x413ec005,
+ 0xb013ac00, 0xfb003ec0, 0x1fb443e4, 0x00fb003a, 0x002eb003, 0x6940e840,
+ 0x5e500f84, 0x03a800fb, 0x443ec08f, 0xb0036000, 0x30000000, 0x00000000,
+ 0x8010fc00, 0xff003fc0, 0x0ff003fc, 0x00ff003f, 0xe00fd0c3, 0x3c00cf00,
+ 0x3f600fd4, 0x137c00df, 0x003fc00c, 0xf0033c00, 0xfb003fc0, 0x0fb8135c,
+ 0x28cf0037, 0xe88ff803, 0xda02cd08, 0x37400ff2, 0x03f400cf, 0x9033c00c,
+ 0xf0032004, 0x30000000, 0x00000000, 0x80046c00, 0xbb002ee0, 0x0bb002ec,
+ 0x00bb002e, 0x244b1a13, 0x0f208b00, 0x2e500b1c, 0x020e008a, 0x002ee008,
+ 0xbc002c00, 0xbb002ec0, 0x0bb50226, 0x00d32022, 0x200b91c2, 0x6340f9a0,
+ 0x2a690e94, 0x02c000d9, 0x8034254d, 0x00002040, 0x10000000, 0x00000000,
+ 0x80052c00, 0xbb002ee0, 0x0bb002ec, 0x00bb002e, 0xc20b8802, 0x66008b04,
+ 0x2e040bb4, 0x1266109b, 0x402e6018, 0xb8022c00, 0xbb002ec0, 0x0bb00266,
+ 0x208a1126, 0x408bb002, 0xe8208b14, 0x22e00ba0, 0x82ec419b, 0x0022c208,
+ 0x80026000, 0x40000000, 0x00000000, 0x08040c00, 0xb3002cc0, 0x0b3002cc,
+ 0x00b3002c, 0x010ba002, 0x040a8300, 0x2c010ba0, 0x02240080, 0x002c4008,
+ 0xb00a0c00, 0xb3002cc0, 0x0b300244, 0x00930060, 0x400b2006, 0xc800a300,
+ 0x68400a00, 0x02ec019a, 0x0024c009, 0x800a4201, 0x00000000, 0x00000000,
+ 0x800d6c00, 0xfb002ec0, 0x0fb003ec, 0x00fb003e, 0x000f900b, 0x6408cb00,
+ 0x3e000fb0, 0x036800d9, 0x023e4108, 0xb0032c00, 0xfb003ec0, 0x0bb00364,
+ 0x108b0036, 0x000bb022, 0xe8008900, 0x32004fa0, 0x23e000db, 0x0032c08c,
+ 0xb0136003, 0x50000000, 0x00000000, 0xa01dfc00, 0xff003fc0, 0x0ff003fc,
+ 0x00ff003f, 0x008fd003, 0xd4025f00, 0x3f010ff0, 0x03dc007c, 0x003d400d,
+ 0xf003fc00, 0xff003fc0, 0x0ff003b4, 0x04ff013d, 0x000b4003, 0x7002f502,
+ 0x3f410ec0, 0x03f000b4, 0x003f000f, 0xc003a806, 0x70000000, 0x00000000,
+ 0xc001fe00, 0xff803f00, 0x0ff803f4, 0xe0df10b3, 0xc000e403, 0x3c00ff80,
+ 0x33200d78, 0x23f094dc, 0x203f000d, 0xf9035e00, 0x5f203f80, 0x0df8037e,
+ 0x00ff803f, 0xe00ff803, 0xfe00cf80, 0x37e00ff8, 0x037e00ff, 0x803fe00f,
+ 0xf803f000, 0x70000000, 0x00000000, 0xc010ee00, 0xbb802e34, 0x0bb802f5,
+ 0x000a6022, 0x160d9703, 0x6a00bb20, 0x2a200ab8, 0x02eb4488, 0x1d22cc48,
+ 0xb002ec20, 0xab002230, 0x08b2822e, 0x00bb802e, 0xe08bb802, 0xee008b80,
+ 0x2ee00bb8, 0x02ee00bb, 0x822ee00b, 0xb802e004, 0x30000000, 0x00000000,
+ 0xc805cc00, 0xb3002c80, 0x4b3000c4, 0x908b1020, 0xc8490202, 0x4400b308,
+ 0x2a000920, 0x02c01090, 0x202c4249, 0xb0422c00, 0x83402851, 0x0930024c,
+ 0x00a3002c, 0xc00b3002, 0xec008300, 0x28c00b30, 0x02cc00b3, 0x002cc00b,
+ 0x3002c201, 0x70000000, 0x00000000, 0xc015ac00, 0xbb602e00, 0x0bb00264,
+ 0x008800a2, 0x0009b002, 0x6200bb00, 0x222008b0, 0x02e0648a, 0x80a6e018,
+ 0xb002ac00, 0x2b002200, 0x08b0022c, 0x003b002e, 0xc00bb042, 0xe8808900,
+ 0x2ec00bb0, 0x02ec00bb, 0x002ec003, 0xb002f004, 0x60000000, 0x00000000,
+ 0x1015ec00, 0xfb003f00, 0x0fb803e4, 0x00c60033, 0xc00df023, 0x7e00b300,
+ 0x38200db3, 0x03cb00d0, 0x803ea08d, 0x3a236800, 0xcb003890, 0x0d30036c,
+ 0x00eb003e, 0xc00fb013, 0xec02ca00, 0x3ec00fb0, 0x03ec00fb, 0x003ec10f,
+ 0xb003c000, 0x70000000, 0x00000000, 0xa001bf00, 0xff803fc0, 0x0ff403d4,
+ 0x00efc03f, 0x300f4003, 0xfc10ff00, 0xbf010fd0, 0x03f824fc, 0x013bc00f,
+ 0xf903fc40, 0xf3003f08, 0x0ff003fc, 0x00ff003f, 0xc00ff003, 0xde00fe00,
+ 0x3fc00ff0, 0x03fc00ff, 0x003fc00f, 0xf003e804, 0x60000000, 0x00000000,
+ 0xc010ac00, 0xfb403280, 0x0fb003e4, 0x80ce0031, 0xd60ed003, 0xe400fb00,
+ 0x3a000cb4, 0x032148cb, 0x12bac00d, 0xa4832c00, 0xeb043652, 0x2db803ec,
+ 0x00fb003e, 0xc00fb003, 0xec00fb00, 0x3ec00fb0, 0x03ec00db, 0x003ec00f,
+ 0xb003f004, 0x20000000, 0x00000000, 0xd8052c00, 0x9b0f22c8, 0x0bb202f5,
+ 0x108b0036, 0x300da002, 0xec00bb80, 0x762108be, 0x036100da, 0x0022c008,
+ 0xa8074c00, 0xdf022238, 0x2cb002ec, 0x00bb003a, 0xc00bb002, 0xe800b900,
+ 0x2ec00bb0, 0x02ec00bb, 0x002ec00b, 0xb002f200, 0x40000000, 0x00000000,
+ 0xe0054c00, 0xb3a22052, 0x1b3802c4, 0x00a10020, 0x309a2002, 0x4c00b390,
+ 0x2804083e, 0x12070080, 0xe0aec009, 0x3c020400, 0xa3002480, 0x083002cc,
+ 0x00b3002c, 0xc00b3002, 0xcc00b300, 0x2cc00b30, 0x02cc0093, 0x002cc00b,
+ 0x3002f000, 0x00000000, 0x00000000, 0xf0011e00, 0x97802160, 0x1b7806c6,
+ 0x40808025, 0xe0085802, 0xda00b780, 0x23a028f8, 0x025e089e, 0x9061e008,
+ 0x7a027e00, 0xb78020a4, 0x087c02de, 0x00b78029, 0xe00b7802, 0xd600b780,
+ 0x2de00b78, 0x02de00b7, 0x802de00b, 0x7802d804, 0x00000000, 0x00000000,
+ 0x48080c00, 0xb30030c0, 0x0f3002c4, 0x00e10022, 0x000a0003, 0x4400fb00,
+ 0x28880832, 0x03048081, 0x00bec00d, 0xb0820400, 0xe3003454, 0x0c3003cc,
+ 0x00f3003c, 0xc00f3003, 0xcc00f300, 0x3cc00f30, 0x03cc00d3, 0x003cc00f,
+ 0x3003d202, 0x00000000, 0x00000000, 0x401dbc00, 0xd700bf40, 0x0ff003f5,
+ 0x00fe003f, 0xc00ff003, 0xf800ff10, 0x3d800ff0, 0x03d408f7, 0x063fc44e,
+ 0xf243fc00, 0xdf003fc4, 0x0ff013fc, 0x00ff003b, 0xc00ff003, 0xf040fd00,
+ 0x3fc00ff0, 0x03fc00ff, 0x003fc00f, 0xf003d004, 0x20000000, 0x00000000,
+ 0xa805ec00, 0xfb483e00, 0x0fb003e6, 0x00580033, 0x000cf20b, 0x3c00fb00,
+ 0x3c000c38, 0x032c80da, 0x0136c01d, 0x10032800, 0xeb103880, 0x0cb003ac,
+ 0x00eb003e, 0xc00fb003, 0xec00fa00, 0x3ec00fb0, 0x03ec00fb, 0x003ec00f,
+ 0xb003c200, 0x70000000, 0x00000000, 0xc8119c88, 0x37202dc0, 0x0b7002f5,
+ 0x80850035, 0xc00a4082, 0x1c00b700, 0x2d800870, 0x028c4426, 0x0121c04c,
+ 0x50035c00, 0xb7022d80, 0x4af0021c, 0x00b7002d, 0xc00f7022, 0xd400b600,
+ 0x2dc00b70, 0x02dc00b7, 0x002dc00b, 0x7002f200, 0x60000000, 0x00000000,
+ 0x80009ed0, 0xb7b22da0, 0x0b7902d6, 0x009c8200, 0x20081802, 0x1600b780,
+ 0x2d6009f8, 0x025e0817, 0xc125e018, 0xf8821f00, 0xb7a02d60, 0x0878029e,
+ 0x01a7802d, 0xe00b7802, 0xde00b780, 0x2de00b78, 0x029e00b7, 0x802de00b,
+ 0x7802c800, 0x20000000, 0x00000000, 0x4814cc08, 0xb3d22cf0, 0x0b3002c4,
+ 0x00917024, 0xc00a2402, 0x0c00b300, 0x2cc21838, 0x02cc0683, 0xc820e008,
+ 0xb0024d00, 0xbb002cc0, 0x0a30028c, 0x00b3002c, 0xc00a3002, 0xc000b108,
+ 0x2cc00b30, 0x02cc00b3, 0x002cc00b, 0x3002da04, 0x30000000, 0x00000000,
+ 0xe815a000, 0xfc003fa4, 0x0f0003e8, 0x00da4032, 0x800ca403, 0x3a00fa00,
+ 0x3fa22dee, 0x036a02de, 0xc635a02c, 0xe0033a41, 0xea047b80, 0x08a003a8,
+ 0x00ea003e, 0x800ba007, 0xe800fa40, 0x2e800fa0, 0x03a800fa, 0x003e800f,
+ 0xa003fa00, 0x20000000, 0x00000000, 0x4800e000, 0xf84a3e04, 0x8f8003e0,
+ 0x04e0043d, 0x100fc083, 0xe060f804, 0x3e010e82, 0x038140f8, 0x003a141f,
+ 0x8403e000, 0xf8007e00, 0x8f800360, 0x00f8003e, 0x000f8007, 0xe000f800,
+ 0x3e000f80, 0x03e000f8, 0x003e000f, 0x8003d204, 0x20000000, 0x00000000,
+ 0x0810e001, 0xc8207044, 0x0c800324, 0x00f90036, 0x400c1003, 0x0400d901,
+ 0x3e400d91, 0x13ee42c9, 0x00b2400c, 0x90832400, 0xe900b660, 0x0e9003a4,
+ 0x00f9003e, 0x400b9003, 0xe400f900, 0x3e400f90, 0x03e400f9, 0x003e400f,
+ 0x9003c204, 0x20000000, 0x00000000, 0x80044401, 0x81002240, 0x28900224,
+ 0x00b90036, 0x501d9007, 0x64008900, 0x2c504894, 0x02e508d1, 0x00365008,
+ 0x95020404, 0x89002044, 0x08100224, 0x00b9002e, 0x400b9002, 0xe408b900,
+ 0x2e400b90, 0x02e400b9, 0x002e400b, 0x9002e000, 0x00000000, 0x00000000,
+ 0x18052406, 0x8900a2c2, 0x88982224, 0x41b90023, 0xc008d012, 0x24009940,
+ 0x26e20990, 0x12a402ab, 0x0462c228, 0x90022400, 0xa9002240, 0x0a9842a4,
+ 0x01b9002e, 0x400b9002, 0xf400bd00, 0x2e400b90, 0x02e400b9, 0x002e400b,
+ 0x9002c600, 0x40000000, 0x00000000, 0x08042400, 0x88102044, 0x18110604,
+ 0x40b11025, 0xc4095102, 0x44008114, 0x2c401810, 0x02cc0291, 0x14264418,
+ 0x310a2440, 0x81102040, 0x08190204, 0x00b1002c, 0x400b1002, 0xd400b500,
+ 0x2c400b10, 0x02c400b1, 0x002c400b, 0x1002c201, 0x00000000, 0x00000000,
+ 0xb80d60a0, 0x8a6a221a, 0x4c868b29, 0xa0f868b2, 0x1a08c682, 0x20a0d840,
+ 0x36000da0, 0x03e0a0e0, 0x6c321a0c, 0x84032100, 0xe86a360a, 0x0e8403a0,
+ 0x00f8003e, 0x000f8003, 0xe000fc00, 0x7e000f80, 0x03e000f8, 0x003e000f,
+ 0x8003ce07, 0x50000000, 0x00000000, 0x9819f000, 0xfc243f48, 0x0fc200f4,
+ 0x80f5203e, 0x480f9203, 0xf404f920, 0x2f40cfd0, 0x13e412fd, 0x213d480f,
+ 0xd203f680, 0xf9223f41, 0x0f9203e4, 0x00f9003e, 0x400f9013, 0xe400f900,
+ 0x3e400f90, 0x03e400f9, 0x003e400f, 0x9003ef06, 0x70000000, 0x00000000,
+ 0x9805ce80, 0xfca03f10, 0x0fecc3d4, 0x02c10031, 0x400c9003, 0x6400fd00,
+ 0x3d400dd0, 0x4b1480dd, 0x2833480a, 0x50430400, 0xf9007d40, 0x0cd00324,
+ 0x00f9003e, 0x400f9003, 0xe400f900, 0x3e400f90, 0x03e400f9, 0x003e400f,
+ 0x9003ce00, 0x70000000, 0x00000000, 0x3810e100, 0x38c41a20, 0x0b8c02e0,
+ 0x00880022, 0x000a8000, 0xa000b800, 0x2e000a80, 0x42200088, 0x202a048c,
+ 0x80822800, 0xb8002e00, 0x08820220, 0x00b8002e, 0x004b8002, 0xe000b800,
+ 0x2e000b80, 0x02e000b8, 0x002e000b, 0x8002c604, 0x30000000, 0x00000000,
+ 0x4805c500, 0xb04c0c08, 0x0b1202c4, 0x00810020, 0x40081002, 0x0400b100,
+ 0x2c400910, 0x02044091, 0x2826400b, 0x920a0400, 0xb1002c60, 0x28128e04,
+ 0x00b1002c, 0x400b1002, 0xc600b100, 0x28400b10, 0x02c400a1, 0x002c400b,
+ 0x1002d200, 0x20000000, 0x00000000, 0x1815a404, 0xb9022e60, 0x0b9002e4,
+ 0x00890022, 0x400a9002, 0xa480bb00, 0x2e584a91, 0x02248089, 0x182e5008,
+ 0xb2022410, 0xb9002e40, 0x08900224, 0x00b9002e, 0x400b9002, 0xe400b9c0,
+ 0x2e400b90, 0x02e400b9, 0x002e400b, 0x9002c604, 0x20000000, 0x00000000,
+ 0xa011e400, 0xf9343e60, 0x0f9803e4, 0x04c900b2, 0x404c9043, 0x2400f900,
+ 0x3c400d1c, 0x830608d9, 0x8036400f, 0x96432400, 0xf9002e60, 0x2c900324,
+ 0x00f9003e, 0x400b9003, 0xe400f940, 0x3e400f90, 0x03e400f9, 0x003e400f,
+ 0x9003e000, 0x20000000, 0x00000000, 0xe801a688, 0xf8093a00, 0x0f8207e4,
+ 0x00f9a03e, 0x402f9103, 0xe400f900, 0x3e610e98, 0x03e600f9, 0x813a408e,
+ 0x9003e400, 0xf9003c72, 0x0f9003e4, 0x00f9003e, 0x400f9003, 0xe400f900,
+ 0x3e400f90, 0x03e400f9, 0x003e400f, 0x9003fa04, 0x20000000, 0x00000000,
+ 0x2810a000, 0xc8407e00, 0x0c8023c0, 0x01c80034, 0x000c0003, 0xa000f808,
+ 0x7e000c80, 0x83e204e8, 0x40b21184, 0x870b6100, 0xe8003200, 0x4c8143a0,
+ 0x00f8003e, 0x000f8003, 0xe000f840, 0x3e000f80, 0x03e000f8, 0x003e000f,
+ 0x8003ca04, 0x20000000, 0x00000000, 0x28053808, 0x8c806f30, 0x288003b8,
+ 0x008a0023, 0x9208a003, 0x6800bec0, 0x2f800dec, 0x02f81086, 0x0021a008,
+ 0x60032800, 0x8a003780, 0x8de002e8, 0x00ba002e, 0x800ba022, 0xe800ba00,
+ 0x2e800ba0, 0x02e800ba, 0x002e800b, 0xa002c200, 0x00000000, 0x00000000,
+ 0x2805480e, 0x83422ce2, 0x883002c4, 0x008b0024, 0x52283002, 0x0c01b1d0,
+ 0x2c802830, 0x12ce00a1, 0x08204208, 0x30020c00, 0xa30028c0, 0x08bc828c,
+ 0x00b3002c, 0xc01b3002, 0xcc00b300, 0x2cc00b30, 0x02cc00b3, 0x002cc00b,
+ 0x3002c200, 0x50000000, 0x00000000, 0xa0011a00, 0x87082de2, 0x087082b4,
+ 0x008f3021, 0x40087302, 0x5c00b500, 0x2f800974, 0x02d82080, 0x00204308,
+ 0x70223e48, 0x83a42dc0, 0x097002dc, 0x0037002d, 0xc00b7002, 0xdc00b700,
+ 0x2dc00b70, 0x02dc00b7, 0x002dc00b, 0x7002c800, 0x40000000, 0x00000000,
+ 0xa8081a02, 0xc7886cea, 0x8c7c03d6, 0x02878035, 0x200c3803, 0x1e00f580,
+ 0x2d200c78, 0x02da00a5, 0x0031202c, 0x78131e04, 0xe78239e0, 0x0c78039e,
+ 0x00f7803d, 0xe00f7803, 0xde00f780, 0x3de00f78, 0x03de00f7, 0x803de00f,
+ 0x7803ca02, 0x00000000, 0x00000000, 0x081da80a, 0xfb407ecc, 0x0fb001a4,
+ 0x00fb803e, 0x000fb803, 0xec00f900, 0x3e000bb0, 0x03e800f8, 0x00be000f,
+ 0xb003ac00, 0xfb1036c0, 0x0fb003ec, 0x00fb003e, 0xc00fb003, 0xec00fb00,
+ 0x3ec00fb0, 0x03ec00fb, 0x003ec00f, 0xb003c206, 0x60000000, 0x00000000,
+ 0x4005fa00, 0xf79833e0, 0x0ff803f6, 0x00cf803b, 0x604cf823, 0x3e00cd80,
+ 0x3da02e78, 0x033e00c5, 0x8033604f, 0x6003be40, 0x4f801fe0, 0x0ff803be,
+ 0x00ff803f, 0xe00ff803, 0xfe00ff80, 0x3fe00ff8, 0x03fe00ff, 0x803fe00f,
+ 0xf803d800, 0x20000000, 0x00000000, 0xa8019820, 0x370051c0, 0x0b7002d4,
+ 0x00870021, 0xc40af000, 0x9c04a700, 0x2d908871, 0x029900a5, 0x0079500b,
+ 0x62063ce0, 0x87102d80, 0x0bf1021c, 0x00b7002d, 0xc40b7002, 0xdc00b700,
+ 0x2dc00b70, 0x02dc00b7, 0x002dc00b, 0x7002ea00, 0x20000000, 0x00000000,
+ 0x18109800, 0xbf0801d0, 0x0b7002f4, 0x009f0028, 0x00087002, 0x5c008500,
+ 0x2f000b70, 0x02182295, 0x4025040b, 0xe3069c01, 0x87002dd0, 0x0b70029c,
+ 0x00b7002d, 0xc00b7002, 0xdd20b700, 0x2dc00b70, 0x02dc00b7, 0x0029c00b,
+ 0x7002c000, 0x20000000, 0x00000000, 0x6014ca00, 0xb3c224c0, 0x0b3802c4,
+ 0x088b8020, 0xe40a3402, 0xcd00a300, 0x2c04080c, 0x428200a1, 0x0028200b,
+ 0x20020d21, 0x83002c80, 0x0b30020c, 0x00b3002c, 0xc00b3002, 0xce00b300,
+ 0x2cc00b30, 0x02cc00b3, 0x002cc00b, 0x3002d004, 0x20000000, 0x00000000,
+ 0x3815aa00, 0xfb0032f0, 0x0fb083e0, 0x00df203a, 0x500cfa03, 0x6e00c800,
+ 0x3cc00eb9, 0x022c00db, 0x2036690f, 0x3002bf02, 0xcf003ec0, 0x0f9013ac,
+ 0x08fb003e, 0xc00fb003, 0xee00fb00, 0x3ec00fb0, 0x02ec00bb, 0x003ec00f,
+ 0xb003ca00, 0x60000000, 0x00000000, 0x8000e808, 0xfb003ac4, 0x0fb003e1,
+ 0x00eb203e, 0x480f3083, 0xacc0f800, 0x3e400fb5, 0x03e904f8, 0x003e580f,
+ 0xa403ec00, 0xfb003ef0, 0x0f9403ec, 0x00fb003e, 0xc00fb003, 0xec00fb80,
+ 0x3ec00fb0, 0x03ec00fb, 0x003ec00f, 0xb003e804, 0x30000000, 0x00000000,
+ 0x8010f801, 0xffa873c8, 0x4ff02338, 0x01cf0031, 0x000cf003, 0x2c00bc00,
+ 0x3f003ef4, 0x03fe82cf, 0x001b040f, 0xe0437c00, 0xff003f60, 0x0ada03fc,
+ 0x00ff003f, 0xc00bf003, 0xfc00ff00, 0x3fc00ff0, 0x03fc00ff, 0x003fc00f,
+ 0xf003c044, 0x30000000, 0x00000000, 0x80046801, 0xb34022c8, 0x0b30020e,
+ 0x428b0036, 0x000db003, 0x6c00b804, 0x2e300db6, 0x02c80080, 0x8122000b,
+ 0xac0a6c00, 0xeb022ce8, 0x08a002ec, 0x00bb002e, 0xc00bb002, 0xec00bb00,
+ 0x2ec00bb0, 0x02ec00bb, 0x002ec00b, 0xb002e040, 0x10000000, 0x00000000,
+ 0x80052808, 0xbb0922c0, 0x0bb10261, 0x008b0022, 0x4008b002, 0x2c009800,
+ 0x2ee10ab0, 0x02ec008b, 0x80aac08b, 0xa8026c00, 0xbb002ec8, 0x0ab402ec,
+ 0x00bb002e, 0xc00bb002, 0xec00bb00, 0x2ec00bb0, 0x02ec00bb, 0x002ec00b,
+ 0xb002e000, 0x50000000, 0x00000000, 0x08040808, 0xb30020c0, 0x1bb00640,
+ 0x01830024, 0xc029302e, 0x4c00b200, 0x2c400800, 0x42c00081, 0x0068c00b,
+ 0xb0024c00, 0xa3042cc0, 0x1a1002cc, 0x00b3002c, 0xc00b3002, 0xcc00b300,
+ 0x2cc00b30, 0x02cc00b3, 0x002cc00b, 0x3002c200, 0x00000000, 0x00000000,
+ 0x80056808, 0xbb0022c0, 0x0fb00b68, 0x088b0032, 0x000cb003, 0x2c00d900,
+ 0x3e008ab0, 0x03e800cb, 0x003ac00f, 0x90036c00, 0xfb003e41, 0x0e9003ec,
+ 0x00fb003e, 0xc00fb003, 0xec00fb00, 0x3ec00fb0, 0x03ec00fb, 0x003ec00f,
+ 0xb003c006, 0x10000000, 0x00000000, 0xa011f800, 0xff003fc0, 0x0ff0019c,
+ 0x00f7001f, 0xc00ff003, 0xfc00ff02, 0x2f010ff0, 0x03d800fd, 0x0537c08f,
+ 0xf023bc00, 0xef003fc0, 0x0dd003fc, 0x00ff043f, 0xc00ff003, 0xfc00ff00,
+ 0x3fc00ff0, 0x03fc01ff, 0x003fc00f, 0xf003e806, 0x70000000, 0x00000000,
+ 0xc005fe00, 0xf72033c8, 0x0f600b3c, 0x00ec803f, 0xe00ff803, 0xfe00f580,
+ 0x33a00e60, 0x039200ec, 0x0021204e, 0xf820fe00, 0xb4803fe0, 0x0f7803f4,
+ 0x00fd0033, 0x200fd003, 0xf008ef80, 0x3f000e40, 0x033200f4, 0x803f200f,
+ 0xf803f000, 0x70000000, 0x00000000, 0xc010ee00, 0xbbc02230, 0x0b9c0222,
+ 0x0088802e, 0xe00bb802, 0xee08ba80, 0xa2208898, 0x22221008, 0x80220008,
+ 0xb8006e00, 0xb8802ee0, 0x0bb002e0, 0x04b8002a, 0x200b8803, 0xaa00ab80,
+ 0x2e202888, 0x0a2e00bb, 0x802e200b, 0xb800e004, 0x30000000, 0x00000000,
+ 0xc805cc00, 0xb2402490, 0x0b21020c, 0x00a0002c, 0xc00b3002, 0xcc00b101,
+ 0x20803920, 0x02cc0828, 0x01204002, 0x3002cc00, 0x900024c0, 0x433002c4,
+ 0x00810228, 0xc00b1012, 0xc000a301, 0x2c000a00, 0x020c00b3, 0x002c000b,
+ 0x3002c201, 0x70000000, 0x00000000, 0xc015ac00, 0xba882640, 0x0b902220,
+ 0x2088002e, 0xc00bb002, 0xec08bb80, 0x22a00990, 0x02ec3088, 0x1020c008,
+ 0xb0226c00, 0xbb002ec0, 0x09b010ea, 0x00ab8c2a, 0xc00b9812, 0xea02ab10,
+ 0x2e60088c, 0x022c00bb, 0x000ec00b, 0xb402f004, 0x60000000, 0x00000000,
+ 0x0015ec10, 0xfd40b7e0, 0x4fc40b3f, 0x00ebc03e, 0xc00fb003, 0xec00f180,
+ 0x30e00fa4, 0x83e002e8, 0xe0b23c0e, 0xb001ec00, 0xf9003ec0, 0x0fb003e7,
+ 0x11f9c03a, 0x044f9c47, 0xe326e8c4, 0x3e200e1c, 0x012140fb, 0x003e900f,
+ 0x9c03d004, 0x70000000, 0x00000000, 0xb001bc00, 0xbd003b10, 0x07f003f3,
+ 0x00ff203f, 0xc00ff003, 0xfc00ff00, 0x2f400ec4, 0x133048f8, 0x803f200f,
+ 0xf0437c00, 0xfda03fc0, 0x8ff005f4, 0x04f4003f, 0x400fd003, 0x9002ff00,
+ 0x3c000fd0, 0x03fc00ff, 0x001f000f, 0xf103f800, 0x60000000, 0x00000000,
+ 0xc010ac00, 0xf0403280, 0x4f848b2d, 0x00cb403e, 0xc40fb003, 0xec00f900,
+ 0xb2800d20, 0x032c00da, 0x08b6480f, 0xb0a3ec08, 0xf90036c0, 0x0fb00325,
+ 0x88f94032, 0x090fb403, 0xe020f950, 0x3e600c90, 0x032c80fb, 0x0032988f,
+ 0xb043f004, 0x20000000, 0x00000000, 0xd8052c00, 0xb8502240, 0x8b3c8202,
+ 0x008b002e, 0xc00bb882, 0xec04bb00, 0x220888aa, 0x020c0082, 0x6022c008,
+ 0xb4066c00, 0xbb0222c0, 0x09bd1a2b, 0x84baf036, 0x504bb106, 0xea00b901,
+ 0x2e400d98, 0x0a2f80bb, 0x0036d00b, 0xb082f200, 0x40000000, 0x00000000,
+ 0xe0054c00, 0xb2002040, 0x0b380a08, 0x0083002c, 0xf80b3482, 0xcc00b300,
+ 0x20a00920, 0x00022090, 0xc02c9409, 0x3442cc00, 0xb2002cc0, 0x023d02a7,
+ 0x00b18000, 0x044b1d02, 0xc500b302, 0x2c002800, 0x828c00b0, 0x0028400b,
+ 0x2802f800, 0x50000000, 0x00000000, 0xf0011e00, 0xbe0021a0, 0x8b490230,
+ 0x2087802d, 0xe40b7802, 0xde08b680, 0x21204958, 0x12326085, 0x806be00a,
+ 0x7802de00, 0xbe8021e0, 0x0b790296, 0x00b58065, 0x200b4806, 0xde20b780,
+ 0x2de00968, 0x029e40bf, 0x802d600b, 0x7802d800, 0x40000000, 0x00000000,
+ 0x48080c00, 0xf3103000, 0x0f340b08, 0x40c3003c, 0xc49f3003, 0xcc40f300,
+ 0x30800d20, 0x030c50d3, 0x003cc00d, 0x3102cc00, 0xf2103cc0, 0x0f300384,
+ 0x40b91030, 0xc80f1000, 0xc400f300, 0x7c00d411, 0xa38d44f3, 0x1078100f,
+ 0x3003d202, 0x00000000, 0x00000000, 0x401dbc00, 0xff307fc0, 0x0fc003d8,
+ 0xc0ff003f, 0xc51ff003, 0xfc08ff00, 0xbdc00ed1, 0x03fc40bf, 0x1037c40d,
+ 0xf0207c00, 0xff0037c0, 0x0df0037c, 0x00ff142f, 0xc01fe003, 0xfc00ff01,
+ 0x3fc04ff1, 0x037c49ff, 0x0037c00f, 0xf003d006, 0x60000000, 0x00000000,
+ 0xa805ec08, 0xfa003260, 0x2c969b3e, 0x00cb003c, 0xe04eb022, 0xec00f300,
+ 0x0ac00fa2, 0x03cc00c1, 0x00b68003, 0xb043ec00, 0xfb003ec0, 0x0fb80324,
+ 0x00f9003e, 0x900f9003, 0xe012ca80, 0x30c00c90, 0x43ce00cb, 0x003ec60f,
+ 0xb003ea00, 0x70000000, 0x00000000, 0xc8119c00, 0xb2002080, 0x08600218,
+ 0x0087002d, 0xc0087002, 0xdc00b700, 0x3dc00b60, 0x82dc0085, 0x0035c00b,
+ 0x70039c01, 0xb7042dc0, 0x0bf0121c, 0x08e5002d, 0xd20b5002, 0xd8088601,
+ 0x35c00f70, 0x02dc0087, 0x002d480b, 0x7002f204, 0x60000000, 0x00000000,
+ 0x80009e00, 0xb7802120, 0x0818020e, 0x0087882d, 0xe00a7802, 0xde04bf80,
+ 0x21a08b68, 0x06de0087, 0x8021e00b, 0x7802de01, 0xb7802de0, 0x0b780256,
+ 0x0027802d, 0xa80b7882, 0xd2008780, 0x21e00978, 0x12de0197, 0x802da00b,
+ 0x7802f000, 0x20000000, 0x00000000, 0x4814cc00, 0xb31020c0, 0x08290a09,
+ 0x2083482c, 0xc0083002, 0xcc00b348, 0x2cc00b33, 0x06cf2083, 0x50a4c00b,
+ 0x3002cc00, 0xb3402cc0, 0x0b300a4c, 0xc0b3122c, 0xf40b3c02, 0xca848302,
+ 0x24d20b36, 0x22cc0893, 0x022ce40b, 0x3c02d204, 0x30000000, 0x00000000,
+ 0xe815a800, 0xfa80b280, 0x0ca00339, 0x22c6803e, 0x800ea003, 0xe800f640,
+ 0x33800fa8, 0x23d802ce, 0x9033810f, 0xa003e800, 0xfe403e80, 0x0fa0077a,
+ 0x00ee003e, 0xb10fec03, 0xdb80ce01, 0x33a20de4, 0x23f802d6, 0xa03e800f,
+ 0xe483fa04, 0x60000000, 0x00000000, 0x4800e000, 0xf0003f00, 0x8f4003e0,
+ 0x00f8003e, 0x000f8003, 0xe000f800, 0x3e024f84, 0x03e040f8, 0x40be0007,
+ 0x8403a000, 0xf8213e00, 0x0f8003a0, 0x00e8413e, 0x020f8083, 0xe100f886,
+ 0x3e100f85, 0x03e100e8, 0x003e100f, 0x8083d200, 0x30000000, 0x00000000,
+ 0x0810e400, 0xf9003240, 0x0f900324, 0x00f90036, 0x688f9003, 0xe400f900,
+ 0x32400db8, 0x13e40059, 0x0232600f, 0x9003e400, 0xe9007e40, 0x0f9407e5,
+ 0x00e9493e, 0x400f1203, 0x2600c990, 0x3a482d14, 0x132400f9, 0x2832600c,
+ 0x9003c204, 0x30000000, 0x00000000, 0x80046400, 0xb900a240, 0x0b900224,
+ 0x00b90222, 0x70099802, 0xe400b920, 0x20490892, 0x02e40081, 0x0022400e,
+ 0x9002e400, 0xb9002e40, 0x0b9402e5, 0x00b9002e, 0xc20b9c27, 0x6470a900,
+ 0x38520892, 0x022500b9, 0x4134d008, 0x9802e000, 0x10000000, 0x00000000,
+ 0x18052400, 0xb9002740, 0x0bd20224, 0x00bb0026, 0x420b9602, 0xe400b900,
+ 0xaec40991, 0x06e400b9, 0x4062440b, 0x9402e400, 0xa9002e40, 0x0a9086ec,
+ 0x00b9022e, 0x404bb402, 0x24008b00, 0x2ec02890, 0x122400b9, 0x08624408,
+ 0x9202c600, 0x40000000, 0x00000000, 0x08040400, 0xb1002540, 0x4b500a04,
+ 0x00b90020, 0x40091002, 0xc401b100, 0x2e410810, 0x06e40021, 0x0024500a,
+ 0x1002c400, 0xb1002c40, 0x0b1142cc, 0x40b3146c, 0x400b1012, 0x6410a100,
+ 0x28402810, 0x020c01b1, 0x00264008, 0x1002c201, 0x00000000, 0x00000000,
+ 0xb80d6000, 0xf828360a, 0x0fc28320, 0xa0f80036, 0x000f8003, 0xe000b800,
+ 0x3e000d80, 0x03e000f8, 0x00b2808f, 0x8003e000, 0xe8002e00, 0x0f8402e1,
+ 0xa0f8683e, 0x000f8282, 0x20a0c800, 0x3a0a0d82, 0x8b2000f8, 0x0032802c,
+ 0x8003ce03, 0x50000000, 0x00000000, 0x981de400, 0xfd003a40, 0x0f9003f4,
+ 0x00fd003e, 0x40019003, 0xe400fd00, 0x33c04f94, 0x03f41cdd, 0x413b400e,
+ 0x9003e400, 0xfd003e40, 0x0f9243f4, 0x84fd203e, 0x400fd001, 0xd400f504,
+ 0x3f40afd0, 0x03f400fd, 0x003e400f, 0xd003e606, 0x70000000, 0x00000000,
+ 0x9805e400, 0xf9283e48, 0x0c501334, 0x00fd0033, 0x410fd003, 0xe400fd00,
+ 0x31c00fd0, 0x431400cd, 0x0002400f, 0xd000e400, 0xf9003e41, 0x0fd00334,
+ 0xc0fd003e, 0x400c5003, 0xf480cf00, 0xb1480c50, 0x03f400c5, 0x003e400f,
+ 0xd0030600, 0x70000000, 0x00000000, 0x3810e000, 0xb8002f04, 0x08840220,
+ 0x00b80022, 0x000b8023, 0xa000b800, 0x22000b80, 0x022000b8, 0x002a800b,
+ 0x80026000, 0xb8003a00, 0x0b821360, 0xc0b8482e, 0x80088102, 0xe000a800,
+ 0x220408a4, 0x02e000d8, 0x002e800b, 0x80034e04, 0x30000000, 0x00000000,
+ 0x4805c400, 0xb5002d40, 0x28110a44, 0x40b100a0, 0x400b1002, 0xc400b900,
+ 0x20400b18, 0x02040091, 0x0060400b, 0x3002c400, 0xb1002c40, 0x0b128204,
+ 0x80b1312e, 0x40381842, 0xc4428100, 0x20400811, 0x02c40081, 0x002c400b,
+ 0x10020201, 0x70000000, 0x00000000, 0x1815a400, 0xb9002f40, 0x08900264,
+ 0x00b90022, 0x400b9002, 0xa400b900, 0x22400b90, 0x022400b9, 0x082a400b,
+ 0xb0226400, 0xb9002e40, 0x0b90026d, 0x00b9002e, 0x40089102, 0xec00a910,
+ 0x22c00891, 0x02ed0099, 0x402e400b, 0x90824604, 0x60000000, 0x00000000,
+ 0xa011e400, 0xf9083e42, 0x0c900b64, 0x00f90032, 0x400f9003, 0xe404f160,
+ 0xb2500f94, 0x0b0760c1, 0x0032440f, 0x9003e400, 0xf9483e40, 0x0f900326,
+ 0x40f9183c, 0x600c9443, 0xc600c1a0, 0x32520c90, 0x03c400c9, 0x403e540f,
+ 0x95032804, 0x70000000, 0x00000000, 0xe801a400, 0xf9003c40, 0x8f9007a4,
+ 0x80f9003e, 0x400f9003, 0xa400f900, 0x3e444f92, 0x03e618e9, 0xc03ee08f,
+ 0x90036400, 0xf9c03a40, 0x0f9023e4, 0x00f9843e, 0x681f9003, 0xe484f900,
+ 0x3c402f98, 0x03e730f9, 0x243e600f, 0x9003ea00, 0x60000000, 0x00000000,
+ 0x2810a000, 0xf8403212, 0x0c000360, 0x00f8203e, 0x020f8303, 0x2000f848,
+ 0x36000c00, 0x03e004c8, 0x40b20c8f, 0x8043e000, 0xf8003e00, 0x0f8103e1,
+ 0x00f8183e, 0x040f8003, 0x20c0c840, 0x32104d80, 0x0b2000f8, 0x1032000f,
+ 0x8043ca04, 0x20000000, 0x00000000, 0x28052800, 0xba002290, 0x08e0032a,
+ 0x00b6202f, 0x820be002, 0x2800be08, 0x2b950fe0, 0x02fb288e, 0x0022900b,
+ 0xe402e800, 0xba002e80, 0x0be806fa, 0x20bec02e, 0xb00ee90e, 0x3804aed0,
+ 0x37a22ae8, 0x033900be, 0x0016a60b, 0x2082ca00, 0x40000000, 0x00000000,
+ 0x28054c00, 0xb2002070, 0x4800020e, 0x00b3802c, 0xf00b3806, 0x0c00b3c0,
+ 0x24440830, 0x02cc8183, 0x10a4c00b, 0x24828c00, 0xb3002cc0, 0x0bb802ce,
+ 0x80b3402c, 0xc20b3d02, 0x4f108301, 0x20c00939, 0x120f10b3, 0x8860d04b,
+ 0x3802ca00, 0x50000000, 0x00000000, 0xa0011c00, 0xb780a150, 0x08700214,
+ 0x20b7002d, 0x000b7806, 0x1c00bf00, 0x29e00b70, 0x02d4008f, 0x0025800b,
+ 0x6002dc00, 0xb7002dc0, 0x0b7012d4, 0x00b6002d, 0x810a7802, 0x5c04af44,
+ 0x25c02a78, 0x021d00b7, 0x8065c00b, 0x7002e800, 0x40000000, 0x00000000,
+ 0xa8081e00, 0xf2803060, 0x2c480b1e, 0x00b7803d, 0xe00f580b, 0x1e00f780,
+ 0x35e00c78, 0x13de02c7, 0x8035e00f, 0x68039e00, 0xb7803de0, 0x0f5802da,
+ 0x00f7822d, 0xe20f5802, 0x5e00c784, 0x71e00d78, 0x031e10f7, 0x8031e40f,
+ 0x7803ea02, 0x00000000, 0x00000000, 0x081dac00, 0xfb003e40, 0x0f9003a4,
+ 0x00fb003e, 0x400f1003, 0xec00f302, 0x2ec00b90, 0x03e40473, 0x003a500f,
+ 0xb003ec00, 0xfb003ec0, 0x0f8013e4, 0x00f9001e, 0x800eb003, 0x8c02f300,
+ 0x3ec00fa0, 0x13ac00fb, 0x003e980f, 0xb003c206, 0x60000000, 0x00000000,
+ 0x4005fe00, 0xfe803be0, 0x0cc8033e, 0x00cf8033, 0xe00ff803, 0xfe00fe80,
+ 0x33e00cf8, 0x03fe00c7, 0x8033300c, 0xf203fe00, 0xff803fe0, 0x0ff8037e,
+ 0x40cd803f, 0xe40f7813, 0xde04c780, 0x33e06ff8, 0x033e40cf, 0x863fa40f,
+ 0x78030000, 0x70000000, 0x00000000, 0xa8119c00, 0xb70021c0, 0x0870021c,
+ 0x20870021, 0xc0034402, 0xdc00b600, 0x29d80d70, 0x12dc00a7, 0x20350002,
+ 0x7002dc00, 0xb7002dc0, 0x0bd04294, 0x44a4402d, 0x440b7003, 0x1c088510,
+ 0x35c40a70, 0x029c40a7, 0x042d840b, 0x70036a04, 0x60000000, 0x00000000,
+ 0x10009c00, 0xba0028c0, 0x0800021c, 0x00870021, 0x400b7002, 0xdc00b700,
+ 0x21c00870, 0x82dc0087, 0x0021400a, 0x7102dc00, 0xb7002dc0, 0x0b510294,
+ 0x0195082d, 0x808b7182, 0xb4408700, 0x2dc02a70, 0x023c2897, 0x002d410b,
+ 0xf0820000, 0x20000000, 0x00000000, 0x6814cc00, 0xb30020cc, 0x0810020f,
+ 0x008300a0, 0x400b1002, 0xcc00b350, 0xa8c88916, 0x02cc00a3, 0x60e47808,
+ 0x3002cc00, 0xb3202cc0, 0x0b000287, 0x18b00024, 0x180b2812, 0x0c028360,
+ 0x2cf00a20, 0x028e20b3, 0xc02c220b, 0x3c024804, 0x30000000, 0x00000000,
+ 0x3815ac00, 0xfa003a90, 0x0caa0b2f, 0x02cb0032, 0x400f8003, 0xec00f340,
+ 0xb2d20cb4, 0x03cc00c2, 0x0030b82e, 0x3003ec00, 0xf3003ec0, 0x0fb003ae,
+ 0x01db423e, 0x400fb423, 0xac00cbc0, 0x3ee00e38, 0xa30900d3, 0xc03e780f,
+ 0x91032a04, 0x60000000, 0x00000000, 0x8000ec00, 0xf3003e80, 0x8f8083e4,
+ 0x00fb003e, 0x000f9003, 0xec00fb60, 0x3ed08fb0, 0x23ed00f9, 0x403e800b,
+ 0xb003ec00, 0xfb103ec1, 0x0f9411a5, 0x44eb403e, 0x000fb207, 0xeb00f9c0,
+ 0x16d40e90, 0x03e910eb, 0x183e404f, 0xb013e000, 0x30000000, 0x00000000,
+ 0x8010fc18, 0xfe003180, 0x0c60030c, 0x204f1037, 0x400fd003, 0xfc00ff00,
+ 0x33800fe0, 0x03fc80cf, 0x0033a00d, 0xf0033c00, 0xff0037c1, 0x0fc003c8,
+ 0x21cd083f, 0x490ff003, 0x1c04cfa2, 0x338209b8, 0x033840cf, 0x1023608f,
+ 0xf8030044, 0x30000000, 0x00000000, 0x80006c00, 0xbb0022bc, 0x08a80364,
+ 0x0083a022, 0x600b9c02, 0xec009b88, 0x2aa04b84, 0xa26d2689, 0x80228408,
+ 0xa8022c00, 0x9b0022c0, 0x098487a7, 0x00a9c02e, 0x200d308a, 0x2d08a104,
+ 0x34302d88, 0x02ad00db, 0x8036240b, 0x3902a040, 0x10000000, 0x00000000,
+ 0x80052c08, 0xba0022c0, 0x08ac026c, 0x00a80026, 0xa00ba802, 0xec04b980,
+ 0x22e00bb0, 0x12e8008a, 0xc0228209, 0x98026c01, 0xbb0026c0, 0x0bb202e6,
+ 0x0089800e, 0xc00bb102, 0x2c408a40, 0x26e00b92, 0x526c008b, 0x086a800b,
+ 0xb0026000, 0x40000000, 0x00000000, 0x08040c01, 0xb30020c0, 0x08000a4c,
+ 0x02a80020, 0xa00b0002, 0xcc01b900, 0xa8c04b30, 0x024c028b, 0x002a8008,
+ 0x1002cc00, 0x9b0020c1, 0x09100684, 0x10a1042c, 0x410a3006, 0x0c00a800,
+ 0x24c10b10, 0x12e4019b, 0x006c800b, 0xb062c201, 0x00000000, 0x00000000,
+ 0x800d6c00, 0xfa0032c0, 0x2ca00b6c, 0x00e80036, 0x400fb003, 0xec00f900,
+ 0x32c00fa0, 0x03e802cb, 0x00a0804d, 0x900b6c00, 0xbb0036c0, 0x0f8002e0,
+ 0x0089003e, 0x804bb00a, 0x2c10ca04, 0x32800fb0, 0x036c08c8, 0x003a400f,
+ 0xb0034003, 0x50000000, 0x00000000, 0xa01dfc00, 0xff003fc0, 0x8fe003bc,
+ 0x00d4003f, 0x4003d003, 0xfc08d500, 0x1dc00fc0, 0x035c00ff, 0x00b7804f,
+ 0xd0033c00, 0xdf0237c0, 0x0dc053f4, 0x10fd063f, 0x010df001, 0xfc00fc00,
+ 0x3d802dc0, 0x239400fc, 0x0137000f, 0xf003a806, 0x70000000, 0x00000000,
+ 0xc005fe10, 0xfc103d20, 0x0ec803de, 0x40cf803f, 0xc80ffc03, 0x3c00f780,
+ 0x3fe00ff8, 0x033e40ff, 0x2073600f, 0xe20b3e40, 0xff803de4, 0x0cf803fe,
+ 0x00ff802d, 0xa00cf903, 0x3f00cf80, 0x33e00ff8, 0x03fe00ff, 0x803fe00f,
+ 0xf803f000, 0x70000000, 0x00000000, 0xc010ee18, 0xb9620e60, 0x08b802ec,
+ 0x008b282e, 0xf00bb202, 0xaf40bb80, 0x2ee00ba8, 0x428c808f, 0x3022600b,
+ 0xa4922c00, 0xbb802ec0, 0x08b802ee, 0x00bb802e, 0x8008b002, 0x2c808b28,
+ 0x22c20bb8, 0x02ee00bb, 0x812ee00b, 0xb802e006, 0x30000000, 0x00000000,
+ 0xc805cc00, 0xb2422e40, 0x0a3002cc, 0x0083202c, 0xd00b3202, 0x0c109300,
+ 0x2cc00ba0, 0x020c90b3, 0x0860c00b, 0xa3024c00, 0xb3012cc1, 0x183002cc,
+ 0x00b2002e, 0x80083202, 0x0c808320, 0x20c00b30, 0x02cc00b3, 0x002cc00b,
+ 0x3002c201, 0x70000000, 0x00000000, 0xc015ac20, 0xba012e40, 0x88a022ee,
+ 0x008b002e, 0xc00bb002, 0xac00bb08, 0x2e800ba8, 0x22ac008b, 0x2022400b,
+ 0xa1006c00, 0xbb002ec0, 0x08b002ec, 0x00ba002e, 0xb028304a, 0x0c008300,
+ 0x22c00bb0, 0x02ec04bb, 0x002ec00b, 0xb002f000, 0x60000000, 0x00000000,
+ 0x0015ec08, 0xfc003e40, 0x4eb603ec, 0x02cb003e, 0xc00fb023, 0x2c00f900,
+ 0x3ec00fb8, 0x032c04f9, 0x00a2c40f, 0xa0036c00, 0xfb003ec0, 0x0cb003ec,
+ 0x00fba03c, 0xb00cb003, 0x2ec0cb40, 0x32c00fb0, 0x03ec00fb, 0x003ec00f,
+ 0xb003c004, 0x70000000, 0x00000000, 0xa001be40, 0xff003f41, 0x0fd913fc,
+ 0x00ff003e, 0xc00ff003, 0xfc08ff02, 0x3fc00fe0, 0x23fc12fb, 0x00bfe00f,
+ 0xa803bc00, 0xff003fc0, 0x0ff003fc, 0x08ff403f, 0x000ff003, 0xfc00ff20,
+ 0x3fc00ff0, 0x03fc00ff, 0x003fc00f, 0xf003e800, 0x60000000, 0x00000000,
+ 0xc010ad00, 0xc8802000, 0x0cb547ec, 0x10cb003e, 0xc00cb007, 0xec00f940,
+ 0x32400fa2, 0x032c03e1, 0x0036c90c, 0x85032c00, 0xeb003ec0, 0x0cb003ec,
+ 0x00fa4032, 0x800db003, 0x2c40cb00, 0x32c00cb0, 0x03ec00fb, 0x043ec00f,
+ 0xb003f004, 0x20000000, 0x00000000, 0xc8052e84, 0x8a002260, 0x08b806cc,
+ 0x008b002f, 0xc00db007, 0xfc08fb50, 0x36200b20, 0x036c00db, 0x5832f00d,
+ 0x00022c08, 0x8b002cf2, 0x0db002ec, 0x00ba0022, 0xa008b582, 0x2d408b50,
+ 0x22d608b0, 0x02ec00bb, 0x002ec00b, 0xb002f200, 0x40000000, 0x00000000,
+ 0xe0054d80, 0x80042040, 0x083802cc, 0x0083002c, 0xc008b002, 0xcc009340,
+ 0x20e40b1c, 0x02ae00a3, 0x40207008, 0x28028c00, 0xa3902ce2, 0x093002cc,
+ 0x00b30020, 0x0009300a, 0x0e008310, 0x20c02930, 0x02cc00b3, 0x0028c00b,
+ 0x3002f000, 0x10000000, 0x00000000, 0xf0013e00, 0x85a02322, 0x087816fe,
+ 0x0187802d, 0xe0097802, 0x9e08af82, 0x65e11b48, 0x02de2097, 0x80256001,
+ 0x68029e00, 0x87102de4, 0x097802de, 0x00bf8023, 0x20087802, 0x14008680,
+ 0x21e00978, 0x02de00b7, 0x802de00b, 0x7802d804, 0x10000000, 0x00000000,
+ 0x48080c00, 0x8b002044, 0x081312cc, 0x02c3002c, 0xc0083002, 0xcc009200,
+ 0x30c00f21, 0x938c02a3, 0x00304204, 0x200b8c00, 0xe3103cc0, 0x0d3003cc,
+ 0x00f10030, 0x420db003, 0x2800c900, 0x32c00d30, 0x03cc00f3, 0x0038c00f,
+ 0x3003d202, 0x10000000, 0x00000000, 0x401d9d02, 0xff20bf44, 0x2ff103fc,
+ 0x407f003f, 0xc00ff003, 0xfc00fe00, 0x3f800f60, 0x037c00ff, 0x1039c00f,
+ 0xe0035c00, 0xff203fc1, 0x0ff003fc, 0x00f700bf, 0x400ff003, 0xf000fc10,
+ 0x3fc00ef0, 0x03fc00ff, 0x003fc00f, 0xf003d004, 0x60000000, 0x00000000,
+ 0xa805ed40, 0xf8003240, 0x0fa483ec, 0x00cb003e, 0xc00eb803, 0x2c40f900,
+ 0x3ec00f90, 0x13ec08c9, 0x2032c00f, 0x80432c00, 0xfb0032e0, 0x0eb003ec,
+ 0x00fb8038, 0x000cb003, 0x2c00fb00, 0x32c00fb0, 0x03ec00fb, 0x003ac00f,
+ 0xb003c200, 0x70000000, 0x00000000, 0xc8119c80, 0xb7000141, 0x8b7002fd,
+ 0x0087002d, 0xe10bf002, 0x9e80b700, 0x2dc00b40, 0x02fc0085, 0x0821c00b,
+ 0xd0421c00, 0xb700a1c0, 0x0a7002dc, 0x00b70029, 0x8008700a, 0x1400be00,
+ 0x21c00b70, 0x02dc00b7, 0x002dc00b, 0x7002f206, 0x60000000, 0x00000000,
+ 0x80009e00, 0xb1802160, 0x0b7802df, 0x0087802d, 0xe40b7802, 0x5e00b480,
+ 0x2d600b68, 0x02de029d, 0x8025f00b, 0x58421e00, 0xb78021e0, 0x0a7802de,
+ 0x00bd8023, 0x20087802, 0x1a00b580, 0x21e00b78, 0x02de00b7, 0x802de00b,
+ 0x7802c840, 0x20000000, 0x00000000, 0x4814cf00, 0xb3932012, 0x8b0802cc,
+ 0x0083002c, 0xc00b3002, 0x8c00b280, 0x2c204b20, 0x02ec0281, 0x1024c00b,
+ 0x990a4c00, 0xb30020c0, 0x0a3002cc, 0x00b3022a, 0x30083002, 0x0000b000,
+ 0x20c00b30, 0x02cc00b3, 0x002cc00b, 0x3002da00, 0x30000000, 0x00000000,
+ 0xe815b360, 0xfe803090, 0x0f2e03c2, 0x02ca003e, 0x800fa003, 0x6800fa80,
+ 0x3ea00f60, 0x02e800da, 0x80b6800f, 0xe0032800, 0xfa003280, 0x0ea003e8,
+ 0x00fe0033, 0xa80ca003, 0x2800fa00, 0xb2800fa0, 0x03e800fa, 0x003e800f,
+ 0xa003fa04, 0x70000000, 0x00000000, 0x4800e000, 0xf800be00, 0x4f80e3e0,
+ 0x04f8003e, 0x000f8003, 0xa010f010, 0x3e044f80, 0x03e000e8, 0x003a100f,
+ 0x8483a000, 0xf8403e10, 0x0f8003e0, 0x00f8003e, 0x122f8003, 0xe100f800,
+ 0x3e000f80, 0x03e000f8, 0x003e000f, 0x8003d200, 0x60000000, 0x00000000,
+ 0x0810e280, 0xc9013268, 0x8c901320, 0x02c9003e, 0x400f9003, 0xe400f900,
+ 0x72400f90, 0x07a442c9, 0xc0ba400f, 0x92032680, 0xc9003240, 0x0f9003e4,
+ 0x00f9002e, 0x400c9003, 0x2400c900, 0x32400c90, 0x03e400f9, 0x003e400f,
+ 0x9003c204, 0x20000000, 0x00000000, 0x80044500, 0x89002260, 0x48900a24,
+ 0x0189002e, 0x400b9002, 0xe400b900, 0x36400f91, 0x86260089, 0xc022680b,
+ 0x94836400, 0xd1883644, 0x0b9002e4, 0x00b9002e, 0x4008900a, 0x25828900,
+ 0xa2402890, 0x02e400b9, 0x002e400b, 0x9002e000, 0x10000000, 0x00000000,
+ 0x18052422, 0x9380a2c0, 0x28d10224, 0x0089002e, 0x400b9002, 0xe400b900,
+ 0x27400b90, 0x42a40081, 0x002a481b, 0xb0020400, 0x89102e40, 0x0b9002e4,
+ 0x00b9002e, 0x44091002, 0x1400b700, 0x20400890, 0x02e400b9, 0x002e400b,
+ 0x9002ce00, 0x40000000, 0x00000000, 0x08042044, 0x91102140, 0x08511204,
+ 0x4081102c, 0x400b1102, 0xc400bd00, 0xa1400a90, 0x02044181, 0x14a0401b,
+ 0x11024440, 0x91002444, 0x0b1002c4, 0x00b1002c, 0x44091102, 0x1440b510,
+ 0x20440810, 0x00c400b1, 0x002c400b, 0x1002ca05, 0x00000000, 0x00000000,
+ 0xb80d61a0, 0xda683200, 0x0cc40221, 0xa088403e, 0x0a0f8403, 0xe0a0f800,
+ 0x27000b80, 0x02a100ca, 0xe93a010f, 0x86832100, 0xc8003490, 0x0f8003e0,
+ 0x00f8003e, 0x902d0413, 0x2100fc40, 0x32100c80, 0x03e000f8, 0x003e000f,
+ 0x8003ee03, 0x50000000, 0x00000000, 0x981df080, 0xed213fc0, 0x0f9203f0,
+ 0x80f9203e, 0x400f9203, 0xe400fd00, 0x3e400fd0, 0x43e688e5, 0x203f400f,
+ 0xd202e480, 0xf1003e48, 0x079003e4, 0x00f5003f, 0x480e9203, 0xe480c920,
+ 0x3e480f90, 0x03e400f9, 0x003e400f, 0x9003e604, 0x70000000, 0x00000000,
+ 0x9855d200, 0xfd043d40, 0x0fc403b6, 0x00c9002e, 0x400f9003, 0xe400c100,
+ 0x36400f50, 0x03b400d9, 0x2831400f, 0x5013f400, 0xcd003f40, 0x0f9003e4,
+ 0x00f9003f, 0x400e9003, 0x2400c900, 0x32400c90, 0x01e400f9, 0x003e400f,
+ 0x9003e600, 0x70000000, 0x00000000, 0x3810e320, 0xba002e00, 0x0b8a02e0,
+ 0x00a8003a, 0x000b8002, 0xe010a800, 0x23000b80, 0x0240a088, 0x2022004b,
+ 0x8486e002, 0x88002e0a, 0x0b8002e0, 0x00b8002e, 0x00088002, 0x28008004,
+ 0x23000880, 0x22e000b8, 0x002e000b, 0x8002ce06, 0x30000000, 0x00000000,
+ 0x4805c0c0, 0xb1002c40, 0x431002c4, 0x4081002c, 0x400b1002, 0xc4008d00,
+ 0x21600b90, 0x02c48099, 0x2824401b, 0x1302c400, 0x91002c48, 0x0b1002c4,
+ 0x04b1002e, 0x400a5002, 0x14008500, 0x21400810, 0x02c400b1, 0x002c400b,
+ 0x1002d200, 0x20000000, 0x00000000, 0x1811a400, 0xb9272e40, 0x8b90c2e6,
+ 0x00a9002a, 0x400b9002, 0xe400a900, 0x23400b90, 0x02640089, 0x0026c00b,
+ 0x9082c404, 0x99002e40, 0x0b9002e4, 0x00b9002e, 0xc208900a, 0x14108d10,
+ 0x03400890, 0x06e400b9, 0x002e400b, 0x9002c600, 0x20000000, 0x00000000,
+ 0xa005e780, 0xf9c03e50, 0x0f9803e6, 0x00c9003e, 0x400f9003, 0xe400c920,
+ 0xb2400f18, 0x83a410d1, 0x00b6600f, 0x9002e400, 0xd9003e40, 0x0f9003e4,
+ 0x00f9483e, 0x640e9003, 0x2502c980, 0xb2402c90, 0x03e400f9, 0x003e400f,
+ 0x9003e804, 0x70000000, 0x00000000, 0xe801a118, 0xf9893e40, 0x0f8903e4,
+ 0x10f9003a, 0x400f9003, 0xc408f902, 0x3a480f92, 0x03a400fb, 0x083a4b0f,
+ 0x9203e401, 0xe9003e42, 0x0f9003e4, 0x00f9903e, 0x600f9003, 0xe400f982,
+ 0x3e400f90, 0x03e400f9, 0x003e400f, 0x9003f200, 0x60000000, 0x00000000,
+ 0x2800a120, 0xc8413e01, 0x0c8043e0, 0x00c8003e, 0x000f8003, 0xe000f000,
+ 0x32210f84, 0x83a000c8, 0x003a000c, 0x80036000, 0xc8003200, 0x0c8003e0,
+ 0x00f8403e, 0x100dc003, 0x31028c00, 0xb3000c80, 0x03e008f8, 0x003e000f,
+ 0x8003c204, 0x20000000, 0x00000000, 0x28053000, 0xde002e80, 0x088802e8,
+ 0x00da002e, 0x800ba002, 0xe800fa00, 0x36800bec, 0x822a018a, 0x0023900d,
+ 0xe24f2a22, 0xce8463a9, 0x0da012e8, 0x00ba002d, 0x8008a003, 0x68008aa1,
+ 0x228008a0, 0x02e800ba, 0x002e800b, 0xa002ca00, 0x40000000, 0x00000000,
+ 0x28054f40, 0x83002c60, 0x083902e4, 0x0083002c, 0xc00b3002, 0xcc00b200,
+ 0x20400b3c, 0x02ae5283, 0x40a8d009, 0x22020e04, 0x830020e0, 0x083002cc,
+ 0x00b3002c, 0xc009b012, 0x0c008bc8, 0x6a800830, 0x02cc00b3, 0x002cc00b,
+ 0x3002ca00, 0x50000000, 0x00000000, 0xa0011e40, 0x97006ff0, 0x287102d4,
+ 0x0097002d, 0xc00b7002, 0xdc04af00, 0x25c00bd0, 0x021c0086, 0x0821e20b,
+ 0x68021c04, 0x878821a0, 0x097002dc, 0x00b7022f, 0x50284002, 0x50008402,
+ 0x69400870, 0x02dc00b7, 0x002dc00b, 0x7002e000, 0x40000000, 0x00000000,
+ 0xa8081ea0, 0xc5803de0, 0x087a22f6, 0x00c7807d, 0xe00f7803, 0xde00b680,
+ 0x21600b78, 0x03960283, 0x88b9e00d, 0x58033600, 0xc780a1e0, 0x0c7803de,
+ 0x00f7803d, 0xa10df803, 0x3a00c780, 0x3ba22c78, 0x03de00f7, 0x803de00f,
+ 0x7803e002, 0x00000000, 0x00000000, 0x0819ac02, 0xe9001e40, 0x4fb003e6,
+ 0x40fb903e, 0xc00fb903, 0xec00fb00, 0x3ec00fb0, 0x03ed00f8, 0x223ec00d,
+ 0x9003a5a0, 0xe3003cc0, 0x0fb003ec, 0x08fb003d, 0x802f8003, 0xe400f800,
+ 0x36400fb0, 0x03ec00fb, 0x003ec00f, 0xb003c206, 0x60000000, 0x00000000,
+ 0x4005fe00, 0xff8033e0, 0x0ff903f6, 0x00ff8033, 0xe00cf803, 0xfe00fe80,
+ 0x3f200ff8, 0x035700df, 0x8037e40f, 0xf2077c00, 0x7f803fe0, 0x0ff803fe,
+ 0x00ff9033, 0xe007f803, 0x3e00cc80, 0x3fa00cf8, 0x02fe40ff, 0x803fe00f,
+ 0xf803f000, 0x20000000, 0x00000000, 0xa8119c84, 0xe70121c0, 0x0b7002d4,
+ 0x00bf0029, 0xc00a7012, 0xdc04b742, 0x2d800b60, 0x021c0086, 0x0021cc0b,
+ 0x71429c80, 0xb7002dc0, 0x0b7002dc, 0x00b70029, 0x420bc002, 0x10008700,
+ 0x2d400870, 0x02dc00b7, 0x002dc00b, 0x7002ea06, 0x20000000, 0x00000000,
+ 0x10009c30, 0x3000a5c0, 0x0b7002d4, 0x00b70025, 0xc0097002, 0xdc00b600,
+ 0x2d100bf0, 0x025c0080, 0x0025c30b, 0x50021e40, 0xb7002dc0, 0x0b7002dc,
+ 0x00bf0861, 0x840b700a, 0x38208400, 0x2d800870, 0x02dc08b7, 0x002dc00b,
+ 0x7002c600, 0x20000000, 0x00000000, 0x6014cd04, 0xa04124d2, 0x8b3c02c4,
+ 0x00bb002c, 0xc00b3002, 0xcc00b380, 0x2c810b34, 0x122c0480, 0x8020e00b,
+ 0x32068c00, 0xb3002cc0, 0x4b3002cc, 0x00b380aa, 0x800b8002, 0x26088300,
+ 0x0c400930, 0x02cc00b3, 0x002cc00b, 0x3002d800, 0x20000000, 0x00000000,
+ 0x28158e10, 0xfa8036d0, 0x0fb607d4, 0x00ff0036, 0xc00df003, 0xec08fba0,
+ 0x3ec10bb4, 0x036c02cb, 0x0836e00f, 0xa0022400, 0xfb003ec0, 0x0fb003ec,
+ 0x00fb8022, 0xe00f8003, 0x26020b40, 0x2e402cb0, 0x03ec00fb, 0x002ec00f,
+ 0xb003da04, 0x60000000, 0x00000000, 0x8000ed80, 0xf85c3ac1, 0x8fb003e6,
+ 0x08fb063a, 0xc00eb063, 0xec00fb40, 0x3ec00fb0, 0xc3ec10e3, 0x403ed00f,
+ 0xa003a400, 0xfb403e80, 0x0fb003ec, 0x00fb003e, 0x500fb003, 0xe800f804,
+ 0x3e900eb0, 0x03ec00fb, 0x003ec00f, 0xb003e400, 0x30000000, 0x00000000,
+ 0x8010fc00, 0xcea43fe8, 0x9ff087f4, 0x00cf0032, 0xc00ff043, 0xdc00cf02,
+ 0x33c00ff2, 0x037601cf, 0x0033d00c, 0x9003f640, 0xfe003f40, 0x0cf003fc,
+ 0x00ff0033, 0xc00cc813, 0x2000df08, 0x3f600cf0, 0x03fc00ff, 0x003fc00f,
+ 0xf003e804, 0x30000000, 0x00000000, 0x80006c40, 0x8cc02ec0, 0x0bb007e4,
+ 0x00cb0036, 0xc00bb002, 0xec00d300, 0x76c00b3e, 0x03664489, 0x2120f128,
+ 0x9013a600, 0xba802ce0, 0x0db022ec, 0x08b30023, 0xf008f803, 0x7c028c00,
+ 0x2fa008b0, 0x02ec08bb, 0x002ec00b, 0xb002e840, 0x10000000, 0x00000000,
+ 0x80012c21, 0x8b402e40, 0x9bb212e4, 0x009b0122, 0xc04bb012, 0xec158b00,
+ 0x22c80bb0, 0x0224068b, 0x0022c008, 0xb002ec00, 0xbbc02e60, 0x09b002ec,
+ 0x01bb0022, 0x60088602, 0x24808800, 0x2c5808b0, 0x02ec00bb, 0x002ec00b,
+ 0xb002e000, 0x40000000, 0x00000000, 0x08040c10, 0x01046cc0, 0x0b301284,
+ 0x00830024, 0xc00b3042, 0xcc009b02, 0x24e00b30, 0x02440483, 0x00a2c008,
+ 0x30028c00, 0xb3002cc0, 0x493002cc, 0x00bb0020, 0x40083002, 0x48008300,
+ 0x2c802830, 0x06cc00b3, 0x012cc00b, 0x3022c205, 0x00000000, 0x00000000,
+ 0x800d6c00, 0xca003ec0, 0x0bb002e4, 0x02db0022, 0xc00fb003, 0xec00cb00,
+ 0x22c00fb0, 0x033c0888, 0x00b2808c, 0x9003f408, 0xf8002e40, 0x0db003ec,
+ 0x04fb00b2, 0xc02c800b, 0x2000c800, 0x3c400cb0, 0x03ec00fb, 0x037ec08f,
+ 0xb003e003, 0x50000000, 0x00000000, 0xa019fc12, 0xfc013f40, 0x0ff001f4,
+ 0x00ff003f, 0xc08ff003, 0xfc04ff00, 0x3fc00f70, 0x03fc007c, 0x013f400f,
+ 0xf007b400, 0xfe003f41, 0x07f003fc, 0x00f7007f, 0xc08ff003, 0xfc01ff00,
+ 0x7f800ff0, 0x03fc00ff, 0x007fc00f, 0xf003e804, 0x70000000, 0x00000000,
+ 0xc005fe00, 0xff8033e0, 0x0ff803fe, 0x00ff803f, 0xe00ff803, 0xfe00ff80,
+ 0x3de00ee0, 0x03b800f6, 0x003b800e, 0xf003fe00, 0xff803d20, 0x0ff813fe,
+ 0x00ed0033, 0x400cd003, 0xf200cd02, 0x35000cf8, 0x03fe02cc, 0x813f200f,
+ 0x7803f000, 0x70000000, 0x00000000, 0xc010ee00, 0xbb0022e0, 0x4bb802ee,
+ 0x00bb822e, 0xe00bb822, 0xee00bb80, 0x2ee008a8, 0x022a00ba, 0x8022a008,
+ 0xb802ee00, 0xbb802e20, 0x0bb8226c, 0x04e80022, 0x600c8803, 0xa0108984,
+ 0x6b200ab8, 0x02ee008b, 0x822ea00b, 0xb802e804, 0x30000000, 0x00000000,
+ 0xc805cc04, 0xb30220c0, 0x4b3022cc, 0x00b3006c, 0xc00b3006, 0xcc00b300,
+ 0x2cc00b20, 0x12c801b3, 0x002c400a, 0x3002cc00, 0xb3002c40, 0x0b30024c,
+ 0x04390028, 0x40281042, 0xc4029102, 0x20000830, 0x02ec0883, 0x002c000b,
+ 0x3006c201, 0x70000000, 0x00000000, 0xc015ac00, 0xbb00a2c0, 0x0bb002ec,
+ 0x00bb002e, 0xc00bb002, 0xec00bb00, 0x2ec009a5, 0x026800bb, 0x000e5808,
+ 0x9822ec00, 0xbb002e44, 0x0bb0026c, 0x00b80022, 0xf0899882, 0xe4001910,
+ 0x2a600ab0, 0x02ec008b, 0x002ec00b, 0xb842f804, 0x60000000, 0x00000000,
+ 0x0015ec00, 0xfb0032c0, 0x0fb003ec, 0x00fb003e, 0xc04fb003, 0xec00fb00,
+ 0x3ec00fbc, 0x0be000fa, 0xe01eb00e, 0xbc03ec00, 0xfb063ea0, 0x0fb003ec,
+ 0x10f98030, 0x706c9813, 0xc200d100, 0x36208cb0, 0x03cc00ca, 0x083e400f,
+ 0xb483d004, 0x70000000, 0x00000000, 0xa001bc00, 0xff003fc0, 0x0ff003fc,
+ 0x00ff003f, 0xc00ff002, 0xfc00bf00, 0x3fc00ef0, 0x01b100fe, 0x2033800f,
+ 0xf003fc20, 0xff001f00, 0x0ff043fc, 0x00edc0be, 0x414ef003, 0xb100eb80,
+ 0x2f404ff0, 0x03fc10ff, 0x003fa40f, 0xf000f800, 0x60000000, 0x00000000,
+ 0xc010ac00, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0xc00fb003, 0xec00fb00,
+ 0x3ec00c30, 0x03e102c3, 0x2038002c, 0xb003ec00, 0xfb003ec7, 0x0db003ec,
+ 0x00f9203e, 0x510c94c3, 0xec08cb00, 0x32002cb0, 0x03ec00fb, 0x403e400f,
+ 0x9c833004, 0x20000000, 0x00000000, 0xd8052c00, 0xbb002ec0, 0x0bb002ec,
+ 0x04bb002e, 0xc04bb002, 0xec10bb00, 0x2cc008b0, 0x02e8008b, 0x40222008,
+ 0xb802ef01, 0xbb002e60, 0x00b042ee, 0x00e0892e, 0xd44db202, 0xef448b80,
+ 0x284108b0, 0x22ee80bb, 0x502ed10b, 0xb4437200, 0x40000000, 0x00000000,
+ 0xe8054c14, 0xbb012cc0, 0x033000cc, 0x00b3002c, 0xc00b3002, 0xcc04b300,
+ 0x0ce00800, 0x22cc1010, 0x4400a80a, 0x3002cc00, 0xb3002c10, 0x093002cc,
+ 0x20b1802c, 0x100a1c02, 0xcc00a164, 0x20020830, 0x02cc21b1, 0x002c138b,
+ 0x30027800, 0x50000000, 0x00000000, 0xf0011e00, 0xb7802de0, 0x0b7802de,
+ 0x00b7802d, 0xe00b7802, 0xde00b780, 0x2de0a840, 0x02ce0094, 0x8020a00a,
+ 0x6802de20, 0xb7836fa0, 0x087802de, 0x0035906d, 0x204b4802, 0xde42a790,
+ 0x2ba80878, 0x02de00b7, 0x802d200b, 0x68025800, 0x40000000, 0x00000000,
+ 0x48080c00, 0xf3103cc0, 0x0f3103cc, 0x00f3003c, 0xc41f3003, 0xcc00f300,
+ 0x3cc21c00, 0x03c901d0, 0x0030430a, 0x3583cc00, 0xb3001c40, 0x0d3023cc,
+ 0x20f1003c, 0x4c0e1213, 0xcc30e108, 0x00410c31, 0x03cc44f3, 0x017c808f,
+ 0x30035202, 0x00000000, 0x00000000, 0x401dbc00, 0xff003fc0, 0x4ff003fc,
+ 0x00ff003f, 0xc00ff003, 0xfc00ff00, 0x3fc00fe6, 0x03f840ee, 0x0037c00d,
+ 0xf003fc00, 0x7f003fc2, 0x0ff103fc, 0x00ef003f, 0xc401d003, 0xdc18df00,
+ 0x3fc80ff0, 0x43fc01ff, 0x003fc60f, 0xf003d006, 0x60000000, 0x00000000,
+ 0xa805ec00, 0xfb003ec0, 0x0fb003ec, 0x00fb003e, 0xc00fb003, 0xec00fb00,
+ 0x2ec02e84, 0x136681e8, 0x203e8803, 0xb003ec00, 0xfb003e88, 0x1fb003ec,
+ 0x00fb8032, 0x410f9003, 0x0802c900, 0xb6c90cb0, 0x03ec00fb, 0x8072400f,
+ 0xb003e200, 0x70000000, 0x00000000, 0xc8119c00, 0xb7006dc1, 0x0b7002dc,
+ 0x01b7002d, 0xc00b7042, 0xdc00b700, 0x2dc00840, 0x02c44084, 0x0839840b,
+ 0x7022dc04, 0xb7002d8c, 0x0b7000dc, 0x00bf0039, 0x800b6003, 0x58028700,
+ 0x39c40a70, 0x02dc00b7, 0x0029040b, 0x7012f204, 0x60000000, 0x00000000,
+ 0x80009e00, 0xb7802de0, 0x0b7842de, 0x00b7802d, 0xe00b7802, 0xde00b780,
+ 0x2de00a68, 0x02da00a6, 0x812da00b, 0x7882de00, 0xb7802de1, 0x4b7802de,
+ 0x11b7c025, 0x600b7882, 0x7e018780, 0x21e00878, 0x02de00b7, 0xc021e88b,
+ 0x7802f000, 0x20000000, 0x00000000, 0x4814cc00, 0xb3002cc0, 0x0b3002cc,
+ 0x00b3022c, 0xc00b3002, 0xcc00b300, 0x2cc02834, 0x22cd2083, 0x4068f20b,
+ 0x32024c05, 0xb3002cc0, 0x8b3042cc, 0x00b3c068, 0xec8b3002, 0xce818380,
+ 0x2cf40a30, 0x02cc00b3, 0x0028c00b, 0x3802d204, 0x30000000, 0x00000000,
+ 0xe815a800, 0xfa003e80, 0x0fa003e8, 0x00fa003e, 0x800fa003, 0xe800fa00,
+ 0x3e800ead, 0x136b20ea, 0x243eb80f, 0xe003e800, 0xfa003e80, 0x0fa003e8,
+ 0x00fe8237, 0x900fe813, 0x7a80caa1, 0x33a00ca0, 0x03e810fe, 0x8032900f,
+ 0x6883fa04, 0x60000000, 0x00000000, 0x4800e000, 0xf8003e00, 0x0f8003e0,
+ 0x00f8003e, 0x000f8003, 0xe000f800, 0x3e000f81, 0x02e000f8, 0x401e000f,
+ 0x8003e010, 0xf8023e14, 0x0b8013e1, 0x00f8407e, 0x100f8013, 0x6100f840,
+ 0x3a022d80, 0x03e004f8, 0x413e020f, 0x8c03d200, 0x30000000, 0x00000000,
+ 0x0810e400, 0xf9003e40, 0x0f9003e4, 0x00f9003e, 0x400f9003, 0xe400f900,
+ 0x3e440db0, 0x03ee01fb, 0x880ec80b, 0x9403e700, 0xf9003e70, 0x1f9003e4,
+ 0x81f9483e, 0x410c90c3, 0x2600c120, 0x30508890, 0x03e400f9, 0x803e410f,
+ 0x99030204, 0x30000000, 0x00000000, 0x80046400, 0xb9002e40, 0x0b9002e4,
+ 0x00b9002e, 0x400b9002, 0xe400b900, 0x24482890, 0x02e52199, 0x212e400b,
+ 0x10022780, 0xb9002ef2, 0x1f900266, 0x80b9002c, 0x40081603, 0x6602f941,
+ 0x22500d90, 0x02e400e9, 0x202ef40b, 0x94c3e000, 0x10000000, 0x00000000,
+ 0x18052400, 0xb9002e40, 0x0b9002e4, 0x00b9002e, 0x400b9002, 0xe400b900,
+ 0x2e402990, 0x02e440b9, 0x106e400b, 0x90066404, 0xb9012e40, 0x0b9012e4,
+ 0x04bb012e, 0x61289202, 0x4d808900, 0x22c00a90, 0x02e421b9, 0x102e500b,
+ 0x90020600, 0x40000000, 0x00000000, 0x08040400, 0xb1102c40, 0x1b1002c4,
+ 0x00b1002c, 0x400b1002, 0xc400b100, 0x2c400810, 0x02c40091, 0x026c400b,
+ 0x30060400, 0xb1002c40, 0x0a1002c4, 0x41b3112c, 0x40081006, 0xc450b300,
+ 0x60c00b10, 0x22c404a1, 0x002c400b, 0x1012c201, 0x00000000, 0x00000000,
+ 0xb80c6000, 0xf8403e00, 0x0f8003e0, 0x00f8003e, 0x000f8003, 0xe000f800,
+ 0x3e000d80, 0x03e000b8, 0x003e000f, 0x80036000, 0xf8002e00, 0x038003e1,
+ 0x00b8683e, 0x8a088283, 0x6102c828, 0xa20a2e80, 0x23e000f8, 0x003e000f,
+ 0x80030e03, 0x50000000, 0x00000000, 0x981ce400, 0xf9203e40, 0x0f9003e4,
+ 0x00f9003e, 0x400f9003, 0xe400f900, 0x34400f94, 0x23e50099, 0x403e500f,
+ 0xd4036400, 0xf9003e40, 0x4f904364, 0x80fd203f, 0x400f5001, 0x7480f504,
+ 0x3d400490, 0x03f400e5, 0x023e400f, 0xd003a606, 0x70000000, 0x00000000,
+ 0x9805e400, 0xf9003a40, 0x0f9003e4, 0x00f9003e, 0x400f9003, 0xe400f900,
+ 0x3d400090, 0x13f400fd, 0x0433400f, 0xd002d400, 0xb9003e40, 0x0f9003f4,
+ 0x40fd013e, 0x404fd003, 0xf400e529, 0x33482e90, 0x03f400f9, 0x003e410f,
+ 0xd0030604, 0x70000000, 0x00000000, 0x3810e000, 0xb8202200, 0x0b8002e0,
+ 0x00b8002e, 0x000b8002, 0xe000b800, 0x2e0008a0, 0x02e800b8, 0x0432000e,
+ 0xa402e000, 0xf8003e00, 0x0b8022e0, 0x84384c2e, 0x800b8122, 0xc0a48800,
+ 0x22040a80, 0x02e004b8, 0x002e808b, 0x80008e04, 0x30000000, 0x00000000,
+ 0x4805c400, 0xb1282c40, 0x0b1002c4, 0x00b1002c, 0x400b1002, 0xc400b100,
+ 0x2c402810, 0x02c400b1, 0x8024400b, 0x1102c400, 0xb1002c40, 0x0b1002c4,
+ 0x80b1302c, 0x440b1022, 0xee80a100, 0x20400a10, 0x22c400b1, 0x002c401b,
+ 0x90400201, 0x70000000, 0x00000000, 0x1815a400, 0xb9002640, 0x0b9002e4,
+ 0x0039002e, 0x400b9002, 0xe400b900, 0x2e40a890, 0x12ec00b9, 0x1022440a,
+ 0x9002e400, 0xb9002e40, 0x0b9002e4, 0x00b9006e, 0x410b9002, 0xe6008900,
+ 0x22400a90, 0x02e400bb, 0x020e408b, 0x90428604, 0x60000000, 0x00000000,
+ 0xa011e400, 0xf9003e40, 0x0f9003e4, 0x00f9003e, 0x400f9003, 0xe400f900,
+ 0x3c400c90, 0x03e500f9, 0x00b6480f, 0x9403e400, 0xf9003e58, 0x4f9013e4,
+ 0x10f9883e, 0x400f98c3, 0xc404e180, 0xb2480e90, 0x03e400f9, 0x203e70cf,
+ 0x9c832800, 0x30000000, 0x00000000, 0xe801a400, 0xf9003a40, 0x0f9003e4,
+ 0x00f9003e, 0x400f9003, 0xe400f902, 0x3e408f91, 0x03e4a0f9, 0x033a600e,
+ 0x92a3e420, 0xe9003a40, 0x0f9013e4, 0x30f9283e, 0xc41f9103, 0xe408f940,
+ 0x3e400f90, 0x03e4107b, 0x223e700f, 0x9102ea00, 0x20000000, 0x00000000,
+ 0x2810a000, 0xf8003e00, 0x0f8003e0, 0x00f8003e, 0x000f8003, 0xe000f800,
+ 0x3e040d80, 0x03e100d0, 0x003e000f, 0x80036000, 0xd8003e00, 0x0f8007e0,
+ 0x40f8503e, 0x000f8643, 0x2020d820, 0x30000c80, 0x03e000c8, 0x003e100f,
+ 0x85c3ca00, 0x20000000, 0x00000000, 0x28052800, 0xba002e80, 0x0ba003a8,
+ 0x00ba002e, 0x800ba002, 0xe800ba00, 0x2f9408a0, 0x42f8008e, 0x002f800b,
+ 0xe003b800, 0x8a007e80, 0x0ba006fb, 0x009e402e, 0x8813e803, 0x7910ae00,
+ 0x378008a0, 0x033800da, 0x842ea20b, 0x6802ca00, 0x00000000, 0x00000000,
+ 0x28054c00, 0xbb002cc0, 0x0b3002cc, 0x00b3002c, 0xc00b3002, 0xcc00b300,
+ 0x2cd00830, 0x22cf0093, 0x002cc00b, 0x30020d00, 0x93002cc0, 0x0a3032cf,
+ 0x00b3c12c, 0xe01b3d02, 0x0c049394, 0x20c40830, 0x06cc4083, 0x902ce103,
+ 0x3422ca00, 0x50000000, 0x00000000, 0xa0011c08, 0xb7202dc0, 0x0b70029c,
+ 0x00b7002d, 0xc00b7002, 0xdc00b700, 0x2dc02870, 0x02de2087, 0x082dc00b,
+ 0x38829e00, 0x87002940, 0x0b7002d8, 0x00b7006d, 0xc00b3802, 0x5000a500,
+ 0x24c00870, 0x021e0496, 0x002d800b, 0x7002c800, 0x40000000, 0x00000000,
+ 0xa8081e00, 0xf7e03de0, 0x0f7803de, 0x00f7803d, 0xe00f7803, 0xde00f780,
+ 0x2de04c78, 0x06de00d7, 0x803de00f, 0x78031e00, 0xd7802da0, 0x0f7802de,
+ 0x00f7802d, 0x200b7813, 0x1e10d584, 0x31e02c78, 0x03de00c7, 0x883d640f,
+ 0x7807ca02, 0x00000000, 0x00000000, 0x081dac00, 0xfb003ec0, 0x0fb003ac,
+ 0x00fb003e, 0xc04fb003, 0xec00fb00, 0x3e400fb0, 0x03cc00fa, 0x003e400f,
+ 0x9003a800, 0xfb003e12, 0x0fb043e0, 0x04d9003e, 0x0a0fb000, 0xe400f905,
+ 0x3ec10fb0, 0x238c00da, 0x203e188f, 0xb043c206, 0x60000000, 0x00000000,
+ 0x4005fe00, 0xff8033e0, 0x0ff803fe, 0x00ff803f, 0xe00ff903, 0xfe00ff80,
+ 0x3f200ff8, 0x03fe00f7, 0x8033e00f, 0xf013de00, 0x6f803fe0, 0x0ff803f6,
+ 0x41cd9033, 0xcc0cf803, 0x1a40c790, 0x33e02ef8, 0x03fe40fd, 0x8033e00f,
+ 0xf9031000, 0x70000000, 0x00000000, 0xa8119c00, 0xbf0021c0, 0x0b7002dc,
+ 0x00b7002d, 0xc00b7002, 0xdc00b700, 0x2d800f70, 0x039c00b7, 0x0021c003,
+ 0x5202dc80, 0x87002d40, 0x4b7002f4, 0x40250129, 0xc0087423, 0xd0ca8530,
+ 0x35ca2f70, 0x02dcc0e4, 0x1029810b, 0x70116a00, 0x60000000, 0x00000000,
+ 0x10009c00, 0xb70021c0, 0x0b7002dc, 0x00b7002d, 0xc00b7006, 0xdc00b700,
+ 0x2d400b74, 0x82d000b5, 0x0021d00b, 0x7106d801, 0xa7002d80, 0x0b7002d4,
+ 0x50050021, 0x808a7002, 0x78068502, 0x24c00b70, 0x02dc00bf, 0x002d420b,
+ 0xf0804000, 0x20000000, 0x00000000, 0x6814cc00, 0xb30020c0, 0x0b3002cc,
+ 0x00b3002c, 0xc00b3002, 0xcc00b302, 0x2c400b38, 0x02c000b0, 0x80204009,
+ 0x13024800, 0x83002c20, 0x0b3002c0, 0x00a1a428, 0x810a3822, 0x40008180,
+ 0x24f20b30, 0x02cc00a2, 0x102c398b, 0x2c425804, 0x30000000, 0x00000000,
+ 0x2815ac00, 0xff0032c0, 0x0fb003ec, 0x00fb003e, 0xc00fb003, 0xec00fb00,
+ 0x3ec00fb8, 0x03ed88fb, 0x5cb0d00f, 0x3803ec00, 0xeb003ec2, 0x0fb003ec,
+ 0x00ca6072, 0xf40e3083, 0x4c00cb25, 0x36d08fb0, 0x03ec00f3, 0x003ef00f,
+ 0x30234a04, 0x60000000, 0x00000000, 0x9000ec00, 0xfb003ec0, 0x0fb003ec,
+ 0x00fb003e, 0xc00fb003, 0xec00fb00, 0x3ed00eb0, 0x03ac00fb, 0x003e940f,
+ 0xb003e404, 0xfb003e90, 0x1fb013e4, 0x00fb403e, 0x8409b623, 0xf008f900,
+ 0x3cc00fb0, 0x03ed00fb, 0x081ad00f, 0xb003e010, 0x30000000, 0x00000000,
+ 0x8010fc08, 0xff003fc0, 0x0ff003fc, 0x00ff003f, 0xc00ff003, 0xfc00ff00,
+ 0x3fc00cf0, 0x03f120df, 0x003fc00c, 0xe0037400, 0xff003f60, 0x0ff023fc,
+ 0x00f9043e, 0x680ff403, 0x3f00cd00, 0x73e00df0, 0x03fd00cc, 0xa023a80c,
+ 0xf0830044, 0x30000000, 0x00000000, 0x80046c00, 0xbb002ec0, 0x0bb002ec,
+ 0x00bb002e, 0xc00bb002, 0xec009b00, 0x24f82cb0, 0x02c3008a, 0x002e0008,
+ 0x84222240, 0xbb002e36, 0x03b002e6, 0x00b9802e, 0x380bb802, 0xa41881c0,
+ 0x22900db0, 0x02c900d8, 0x0034b808, 0x90036040, 0x10000000, 0x00000000,
+ 0x80052c00, 0xbb002ec0, 0x0bb002ec, 0x00bb002e, 0xc00bb002, 0xec00bb00,
+ 0x2ee009b0, 0x02ec009b, 0x002ec208, 0xa4026c00, 0xbb002ec1, 0x4bb062e7,
+ 0x00b8882e, 0x404ba006, 0x2012898c, 0x22c609b0, 0x02ec2099, 0x006e4008,
+ 0xb6022000, 0x50000000, 0x00000000, 0x08040c00, 0xb3002cc0, 0x0b3002cc,
+ 0x00b3002c, 0xc00b3002, 0xcc00b300, 0x2cc00830, 0x02cc0083, 0x002c802a,
+ 0x00024400, 0xb3002c80, 0x0b3002c4, 0x00b1002c, 0x0003100e, 0x80008100,
+ 0x20c00930, 0x02c40099, 0x002e4008, 0x3006c200, 0x00000000, 0x00000000,
+ 0x800d6c00, 0xfb003ec0, 0x0fb003ec, 0x00bb003e, 0xc00fb003, 0xec00fb00,
+ 0x3ec00db0, 0x03e000d9, 0x003ec00c, 0xa0036000, 0xfb003e40, 0x0fb003e4,
+ 0x00b8003e, 0x400bb022, 0x2804c904, 0x22400db0, 0x03ec00c8, 0x003e002c,
+ 0xb0030000, 0x10000000, 0x00000000, 0xa01dfc00, 0xff003fc0, 0x0ff003fc,
+ 0x00ff003f, 0xc00ff003, 0xfc00df00, 0x37c00ff0, 0x03f0109c, 0x003f000d,
+ 0xc003b000, 0xff003f00, 0x0ff053f4, 0x107d003f, 0x004f7000, 0xf000fc00,
+ 0x3f010ff0, 0x03f000f4, 0x0037000f, 0x70436806, 0x70000000, 0x00000000,
+ 0xc005de00, 0xfe9033e0, 0x0ff8431e, 0x00ff803f, 0xe00ff803, 0xfe02ff80,
+ 0x3fe00c58, 0x10be40f5, 0x803fe00f, 0xf803fe00, 0xff903f85, 0x0fc103f0,
+ 0x40cd0033, 0xe00ff803, 0xfe00ff80, 0x37e00ff8, 0x03f808dc, 0x21330c08,
+ 0xd3833000, 0x70000000, 0x00000000, 0x8000ee00, 0xba2022e0, 0x0bb8022e,
+ 0x00bb802e, 0xe00bb802, 0xcca08b08, 0x2ec00898, 0x222c80bb, 0x802ee00b,
+ 0xb802ee00, 0xbb012e98, 0x4b3602ed, 0x00aad02a, 0xe08bb802, 0xee08bb84,
+ 0x2ee00bb8, 0x02e820b3, 0x18a0d008, 0x2002a006, 0x30000000, 0x00000000,
+ 0x0805cc00, 0xb22120c1, 0x0b30020c, 0x00b3002c, 0xc00b3002, 0xcc00a320,
+ 0x2cca08b0, 0x028c80b3, 0x006cc09b, 0x3002cc00, 0xb3202c8c, 0x0b0302c0,
+ 0x40810420, 0xc00b3002, 0xcc00b300, 0x2cc00b30, 0x02c8c0b0, 0x20201828,
+ 0x12020201, 0x70000000, 0x00000000, 0xc015ac08, 0xb20022d8, 0x0bb0022c,
+ 0x009b002e, 0xc00bb002, 0xec009b00, 0x2cc08ab2, 0x022c00bb, 0x006ec00b,
+ 0xb002ec00, 0xbb002e80, 0x0bb002ec, 0x00aa042a, 0xc00bb002, 0xec00bb00,
+ 0x2ec00bb0, 0x02e800b3, 0x0022c018, 0x2000b000, 0x60000000, 0x00000000,
+ 0x0005ee00, 0xfa0032f0, 0x4f380b2c, 0x00fb003e, 0xc00fb003, 0xec00eb00,
+ 0x3ec00c18, 0x03ac10f9, 0x002ec10f, 0xb003ec00, 0xfb003f90, 0x0fc003f0,
+ 0x00cd0032, 0xc00fb043, 0xec18fb04, 0x3ec08fb0, 0x03f900fc, 0x0033000c,
+ 0xd0030004, 0x70000000, 0x00000000, 0xa011bd00, 0xfe00bfe0, 0x8ff413fc,
+ 0x00ff003f, 0xc00ff003, 0xfc00ef00, 0x3fc00dd8, 0x03fc00ff, 0x003fc00f,
+ 0xf003fc00, 0xff003f81, 0x0ff083fc, 0x04f6003f, 0xc00ff003, 0xfc00ff00,
+ 0x3fc00ff0, 0x43f800ff, 0x003dc00f, 0xe083e800, 0x60000000, 0x00000000,
+ 0xc010ac10, 0xca023ed2, 0x0fb0832c, 0x00cb003e, 0xc00fb007, 0xec00cb00,
+ 0x32c40cb0, 0x472c10fb, 0x0416c00f, 0xb003ec00, 0xfb003e90, 0x2c800b20,
+ 0x40c9003e, 0xc00fb003, 0xec00fb00, 0x36c00fb0, 0x03e902c8, 0x0032000c,
+ 0x900b3004, 0x20000000, 0x00000000, 0xc8052c80, 0x0a402ec0, 0x0bbc022c,
+ 0x008b002e, 0xc00bb002, 0xec008b00, 0x22e008b0, 0x036c04bb, 0x0036c00b,
+ 0xb002ec04, 0xbb003a80, 0x08be036e, 0x40ca002e, 0xc00bb002, 0xec00bb00,
+ 0x22c00bb0, 0x02e8008b, 0x1522ec4c, 0xa6423200, 0x40000000, 0x00000000,
+ 0xc4040e02, 0x82482cf4, 0x0b31020c, 0x0083002c, 0xc00b3002, 0xeec28330,
+ 0xa0c80810, 0x028c00b1, 0x0020c00b, 0x3002cc01, 0xb3006ccc, 0x08080221,
+ 0x0081002c, 0xc00b3002, 0xcc00b300, 0x24c00b30, 0x02cc01a0, 0x10a00028,
+ 0x1002b000, 0x10000000, 0x00000000, 0x60003e00, 0x86802de0, 0x0b78021e,
+ 0x0087802d, 0xe00b7802, 0xde008780, 0x21e408d8, 0x42de00bf, 0x8025e003,
+ 0x7842de00, 0xb78028e8, 0x0878024e, 0x0086802d, 0xe00b7802, 0xde00b780,
+ 0x25e00b78, 0x02ce00a7, 0x8021e008, 0x68009800, 0x10000000, 0x00000000,
+ 0x4c180c40, 0xc2203cc8, 0x4f320b0c, 0x00c3002c, 0xc00f3002, 0xcc00cb00,
+ 0x32c00c10, 0x028c00f3, 0x0020c403, 0x3003cc00, 0xf3003cd0, 0x0c000300,
+ 0x02c1003c, 0xc00f3003, 0xcc00b300, 0x34c00f30, 0x03cd00e0, 0x0430000c,
+ 0x10039202, 0x10000000, 0x00000000, 0x401cac00, 0xfa002ec0, 0x0f3003ec,
+ 0x00fb003e, 0xc00fb023, 0xec00fb10, 0x3ec00f90, 0x036c00fb, 0x003ec00f,
+ 0xb003ec00, 0xfb002ec9, 0x0bb003ec, 0x00ea803e, 0xc00fb023, 0xec04f302,
+ 0x3ac00fb0, 0x03ec009b, 0x103ec40f, 0xa8035006, 0x60000000, 0x00000000,
+ 0x0805ec00, 0xf28032d4, 0x0cb9032c, 0x00fb003e, 0xc00fb003, 0xec00cb00,
+ 0x32e00c90, 0x03ee0049, 0x003ec00f, 0xb013ec00, 0xfb80b2c0, 0x0c800322,
+ 0x00c9003e, 0xc00fb003, 0xec00fb00, 0x2ec00fb0, 0x03ee02c8, 0x0032000c,
+ 0x900b0200, 0x70000000, 0x00000000, 0xc8019c80, 0xb60021c2, 0x0872021c,
+ 0x00b7002d, 0xc00b7002, 0xfc008f00, 0x23c02850, 0x02fc0287, 0x002dc00b,
+ 0x7002dc00, 0xb70023c0, 0x083002bc, 0x0286002d, 0xc00b7002, 0xdc00b700,
+ 0x2dc00b70, 0x02cc008f, 0x0023c008, 0x60023206, 0x60000000, 0x00000000,
+ 0x20009e60, 0xbe8021f8, 0x08f8821e, 0x00b7802d, 0xe00b7802, 0xde068782,
+ 0x21e00858, 0x02de0087, 0x802de00b, 0x7802de00, 0xb78021e0, 0x09480212,
+ 0x0085802d, 0xe00b7802, 0xde04b782, 0x2de00b78, 0x02de0094, 0x80212008,
+ 0x18020840, 0x20000000, 0x00000000, 0x6814ce00, 0xb20020c0, 0x0838020c,
+ 0x00b3002c, 0xc00b3002, 0xec008b00, 0x20c00810, 0x02cc0083, 0x002cc00b,
+ 0x3002cc10, 0xb30022c0, 0x09b0228c, 0x0082002c, 0xc00b3002, 0xcc00b300,
+ 0x2cc00b30, 0x02cc089b, 0x0020c008, 0x20021a00, 0x30000000, 0x00000000,
+ 0xe8058000, 0xfe00b300, 0x2c800b28, 0x00fa002e, 0x800fa003, 0xe800ca00,
+ 0xb2800ca0, 0x03e800ca, 0x002e800f, 0xa003e800, 0xfa003280, 0xada00328,
+ 0x00ca003e, 0x800fa003, 0xe800fa00, 0x3e800fa0, 0x03e800da, 0x00b2802c,
+ 0xa0233a04, 0x70000000, 0x00000000, 0x4810a000, 0xf8043e18, 0x0f8003e0,
+ 0x00f8003e, 0x000f8003, 0xe000f800, 0x3e000f80, 0x03e000f8, 0x003e000f,
+ 0x8013e000, 0xf8003e00, 0x0ec003f0, 0x00f4003e, 0x000f8003, 0xe000f800,
+ 0x3e000f80, 0x03e008ec, 0x003f000f, 0x4003d200, 0x60000000, 0x00000000,
+ 0x0810a002, 0xc9903e24, 0x0c8203e4, 0x00f9003e, 0x400f9003, 0xe402c900,
+ 0xb2400f90, 0x03e400f9, 0x003e400f, 0x9003e400, 0xf9003e40, 0x0c900324,
+ 0x00f90032, 0x400f9003, 0xe400f900, 0x3e400f90, 0x03e400f9, 0x0032400c,
+ 0x90030204, 0x20000000, 0x00000000, 0x80046400, 0x89002c40, 0x089c02e4,
+ 0x00b9002e, 0x400b9002, 0xe4008990, 0x22400b90, 0x02e400b9, 0x002e400b,
+ 0x9002e400, 0xb9002e40, 0x28900224, 0x00b90036, 0x400b9002, 0xe400b900,
+ 0x2e400b90, 0x02e400b9, 0x00224008, 0x90036000, 0x10000000, 0x00000000,
+ 0x18052480, 0x99002e42, 0x089002e4, 0x00b9002e, 0x400b9002, 0xe4009900,
+ 0x26400b90, 0x02e400b9, 0x002e400b, 0x9002e400, 0xb9002e40, 0x08d00234,
+ 0x00bd0026, 0x400b9002, 0xe400b900, 0x2e400b90, 0x02e400bd, 0x00214028,
+ 0xd0020e00, 0x40000000, 0x00000000, 0x08040440, 0x91142e04, 0x283102c4,
+ 0x00b1002c, 0x400b1002, 0xc4409110, 0x24440b10, 0x02c440b1, 0x002c400b,
+ 0x1002c404, 0xb1122c44, 0x18510214, 0x40b50024, 0x400b1002, 0xc400b100,
+ 0x2c400b10, 0x12c441b5, 0x10a14408, 0x51024a05, 0x00000000, 0x00000000,
+ 0x381d61a0, 0xd8403e1b, 0x0c8683e0, 0x00f8003e, 0x000f8003, 0xe100d840,
+ 0x36100f80, 0x03e100f8, 0x003e000f, 0x8002e000, 0xf0403e1a, 0x0c868321,
+ 0xa0fc2836, 0x000f8003, 0xe000f800, 0x2e000f80, 0x03e1a0f8, 0x68321a0c,
+ 0xc6832e03, 0x50000000, 0x00000000, 0xb81df080, 0xe9203d08, 0x0f4203e4,
+ 0x00f9003e, 0x400f9003, 0xe480e924, 0x3a480fd0, 0x03e680fd, 0x003e400f,
+ 0x9003e400, 0x79203e48, 0x0f920be4, 0x80f9003e, 0x400f9003, 0xe400f900,
+ 0x3e400f90, 0x03e480f9, 0x223e480f, 0x9203e604, 0x70000000, 0x00000000,
+ 0x3805f280, 0xfd003f30, 0x0fcc03c4, 0x00f9003e, 0x400f9003, 0xe400c904,
+ 0x32400c90, 0x03e400c9, 0x003e400f, 0x9003f400, 0xf9003e40, 0x0c900324,
+ 0x00c90032, 0x400fd003, 0xe400fd00, 0x3e400f90, 0x03e400f9, 0x1032480c,
+ 0x92832600, 0x70000000, 0x00000000, 0x1800e3f0, 0xb8002e30, 0x0b8c42e0,
+ 0x00b8002e, 0x000b8002, 0xe0008000, 0x23010880, 0x02e0a088, 0x002e000b,
+ 0x8002e004, 0xb8002e00, 0x28800230, 0x00880022, 0x000b8002, 0xe000b800,
+ 0x2e000b80, 0x12c020b8, 0x10220a08, 0xc2020e06, 0x30000000, 0x00000000,
+ 0x48008400, 0xb1002c10, 0x0b0602c4, 0x10b1002c, 0x400b1002, 0xd4008500,
+ 0x21400810, 0x02c48081, 0x002c400b, 0x1002c400, 0xb1012d40, 0x08500214,
+ 0x00810020, 0x400b1002, 0xc400b100, 0x2c400b10, 0x02c440b5, 0x00254c89,
+ 0x528a1200, 0x20000000, 0x00000000, 0x1814a400, 0xbb022e44, 0x0b9002e4,
+ 0x00b9002e, 0x400b9002, 0xc4008500, 0x21408890, 0x22e40089, 0x202e400b,
+ 0x9002e400, 0xb9002d41, 0x08d00234, 0x00890022, 0x400b9002, 0xe410b900,
+ 0x2e400b90, 0x02e400bd, 0x00a74009, 0xd0020600, 0x20000000, 0x00000000,
+ 0xa004a600, 0xf9023e68, 0x0f9043e4, 0x00f9003e, 0x400f9003, 0xe402c900,
+ 0xb2402c90, 0x13e402c9, 0x003e400f, 0x9003e400, 0xf9003e40, 0x2c900324,
+ 0x00c90032, 0x400f9003, 0xe400f900, 0x3e400f90, 0x03e400f9, 0x0076400d,
+ 0x900b2804, 0x70000000, 0x00000000, 0xe810a100, 0xf9023e22, 0x0f8983e4,
+ 0x00f9003e, 0x400f9003, 0xe408f900, 0x3e400f99, 0x03e400f9, 0x803e400f,
+ 0x9003e400, 0xf9083e40, 0x4f900be4, 0x02f900be, 0x400f9003, 0xe400f900,
+ 0x3e400f90, 0x03e420f1, 0x003a402e, 0x9003f200, 0x60000000, 0x00000000,
+ 0x2810a000, 0xf800b200, 0x0f8043e0, 0x02c8003e, 0x000f8003, 0xf000cc00,
+ 0x33040f80, 0x23e010e8, 0x003e010f, 0x8003e000, 0xf8003f00, 0x0f400310,
+ 0x00c0003e, 0x000f8003, 0x6000f800, 0x3e000f80, 0x03e000cc, 0x0031000c,
+ 0xc0030204, 0x20000000, 0x00000000, 0x08042080, 0xbe702322, 0x0bce02f8,
+ 0x008a002e, 0x800ba002, 0xe8008a00, 0x22b00ba0, 0x02e8008a, 0x002e800b,
+ 0xa043a808, 0xba412e81, 0x0ba00a28, 0x00da002e, 0x800ba002, 0x2800ba00,
+ 0x2e800ba0, 0x02e9028a, 0x00a28008, 0xa0020a00, 0x40000000, 0x00000000,
+ 0x08054e00, 0xb38020c0, 0x0b3022c8, 0x0883002c, 0xc00b3002, 0xcc028300,
+ 0xa0820b30, 0x02ec00a3, 0x002cc00b, 0x3002cc18, 0xb3406cc0, 0x0b300208,
+ 0x0283002c, 0xc00b3002, 0x4c00b300, 0x2cc00b30, 0x028d0083, 0x00a4c038,
+ 0xa00a0a00, 0x50000000, 0x00000000, 0x20011c00, 0xbf8021c8, 0x0b7002da,
+ 0x0087002d, 0xc00b7002, 0xd0008400, 0x21400b70, 0x02dc8087, 0x002dc00b,
+ 0x70029c00, 0xb7002d00, 0x0b000204, 0x0897012d, 0xc00b7802, 0x1c00b700,
+ 0x2dc00b70, 0x02de0084, 0x02240008, 0x50022004, 0x40000000, 0x00000000,
+ 0x28181e80, 0xf780b1e0, 0x8f7d03da, 0x02c7803d, 0xe00f7803, 0xfe00c580,
+ 0x21a40f78, 0x03fe80e7, 0x803de00b, 0x7803de00, 0xf7803de0, 0x0f78031a,
+ 0x00c7823d, 0xe00f7813, 0x5e08f780, 0x3de00f78, 0x039e00c3, 0x8035e00c,
+ 0x28032002, 0x00000000, 0x00000000, 0x081dac40, 0xf3003ecc, 0x0fb003e8,
+ 0x00fb003e, 0xc00fb003, 0xe000fa00, 0x3e580fb0, 0x03ec00fb, 0x003ec00f,
+ 0xb043ac10, 0xfb003e00, 0x0f8003e4, 0x00fb003e, 0xc00f3003, 0xec10fb00,
+ 0x3ec00fb0, 0x03ec00f8, 0x003a000f, 0x9003c204, 0x60000000, 0x00000000,
+ 0x6005be00, 0xff8031f0, 0x0cf803fa, 0x00ff803f, 0xe00ff803, 0xfe00ff80,
+ 0x33600ff8, 0x23fe20cf, 0x803fe00f, 0xf003de02, 0xce8033e0, 0x2cf8033a,
+ 0x00cf801f, 0xe00ff803, 0xfe00f780, 0xb3e00ff8, 0x03fa00cf, 0x803fe004,
+ 0xe803f000, 0x20000000, 0x00000000, 0xa8009c00, 0xbe0421c0, 0x087002d8,
+ 0x00b7002d, 0xc00b7002, 0xd000b400, 0xa1800b70, 0x02fc0087, 0x002dc40b,
+ 0x7002dc00, 0x86002100, 0x08c10214, 0x6287102d, 0xc00b7002, 0xdc00b700,
+ 0x21c00b70, 0x02d80084, 0x002d0608, 0x5002ea06, 0x20000000, 0x00000000,
+ 0x00009c00, 0xb50021c0, 0x087002d8, 0x00b7002d, 0xc00b7002, 0xdc00b500,
+ 0x21400b70, 0x02dc0087, 0x002dc00b, 0x7002dc40, 0x860024c0, 0x0870021a,
+ 0x0087002d, 0xc00b7002, 0xdc00b700, 0x21c00b71, 0x02d80087, 0x002cc008,
+ 0x6802c400, 0x20000000, 0x00000000, 0x40148e00, 0xb00020d0, 0x083802c8,
+ 0x00b3002c, 0xc00b3002, 0xc000b200, 0x20800b30, 0x02ec0083, 0x802cc00b,
+ 0x3002cc02, 0x82002400, 0x08090a06, 0x0083926c, 0xc00b3002, 0xcc003300,
+ 0x20c00b30, 0x02c81080, 0xd02e2028, 0x1d02da00, 0x20000000, 0x00000000,
+ 0x2805ae80, 0xf00010e2, 0x2cba03e8, 0x00fb003e, 0xc00fb003, 0xe000fa04,
+ 0x32810bb0, 0x02fc02cb, 0xa02ec00f, 0xb003ec00, 0x8b00b6c0, 0x0cb4032b,
+ 0x00cb403e, 0xc003b002, 0xec00bb00, 0x32c00fb0, 0x03ec02cb, 0x403ef00c,
+ 0xa403da04, 0x60000000, 0x00000000, 0xa010ec00, 0xf844bec0, 0x0fb003e8,
+ 0x00fb003e, 0xc00fb003, 0xed00f902, 0x3e400fb0, 0x03ec00fb, 0x003ec00f,
+ 0xb003ec00, 0xfb003a00, 0x1f8203e4, 0x80fb203e, 0xc00fb003, 0xec00fb00,
+ 0x3ec00fb0, 0x03ec00f8, 0x203e080f, 0x9203e400, 0x30000000, 0x00000000,
+ 0x0110fe80, 0xfe8033ca, 0x0cf003f8, 0x08cf003f, 0xc00ff003, 0xf000cc02,
+ 0x3f800ff0, 0x03fc00cf, 0x003fc00f, 0xf003fc10, 0xff0037c0, 0x0f700338,
+ 0x00c70033, 0xc00ff003, 0xfc00ff00, 0x3fc00ff0, 0x03fc00f7, 0x0033c02c,
+ 0x60032804, 0x30000000, 0x00000000, 0x81046e00, 0xbe8022f8, 0x08b182c8,
+ 0x008b002e, 0xc00bb022, 0xfc808f08, 0x2f400bb0, 0x02ec008b, 0x003ac00b,
+ 0xb012ec00, 0xbf002f00, 0x0ec00234, 0x10db0022, 0xc14bb002, 0xec00bb00,
+ 0x2ec00bb0, 0x02fc00bc, 0x00230008, 0xd0022840, 0x10000000, 0x00000000,
+ 0x80056c00, 0xb91022c0, 0x09b002e8, 0x008b002e, 0xc00bb002, 0xc0428a00,
+ 0x2e408bb0, 0x02ec008b, 0x002ec00b, 0xb002ec00, 0xba002ec0, 0x0bb00208,
+ 0x008b0022, 0xc00bb002, 0xec00bb00, 0x2ec00bb0, 0x02e800bb, 0x0022c009,
+ 0xa0022000, 0x40000000, 0x00000000, 0x0c000c00, 0xb801a2c0, 0x293002c8,
+ 0x0283002c, 0xc00b3042, 0xcc008100, 0x2c801b30, 0x12cc0083, 0x002cc00b,
+ 0x3002cc00, 0xb2006c00, 0x0a000a04, 0x009300a0, 0xc00b3002, 0xcc00b300,
+ 0x2cc00b30, 0x02c800b0, 0x01a00009, 0x100a0205, 0x00000000, 0x00000000,
+ 0x00186c00, 0xf90432c0, 0x4db043e8, 0x02cb003e, 0xc00fb002, 0xe010c000,
+ 0x3e400fb0, 0x03ec028b, 0x003ec00b, 0xb053ec01, 0xf20036c0, 0x0fb00308,
+ 0x00cb0032, 0xc00fb007, 0xec05fb02, 0x3ec00fb0, 0x03c800fb, 0x0032c00d,
+ 0xa0032003, 0x50000000, 0x00000000, 0xa41dfc00, 0xfc003fc0, 0x0ef023f8,
+ 0x00ff003f, 0xc00ff003, 0xfc14ff00, 0x3f800ff0, 0x13fc04ff, 0x007bc00f,
+ 0xf023fc00, 0xfe003f00, 0x8fc003f4, 0x00ff003f, 0xc01ff003, 0xfc10ff00,
+ 0x3fc00ff0, 0x03f810fc, 0x003f000e, 0xd023e804, 0x70000000, 0x00000000,
+ 0xc005fe00, 0xff803fe0, 0x0ff843fe, 0x00ff803f, 0xe00cf803, 0xfe00ff80,
+ 0x3fe00ff8, 0x23fe19ee, 0x0033e00f, 0xf803fe00, 0xfc863fe1, 0x2cc20374,
+ 0x10fe803b, 0x210f4803, 0xf000c400, 0x33a00cc8, 0x03f600ff, 0x803f204f,
+ 0xf8233000, 0x70000000, 0x00000000, 0x8010ee00, 0xbb842ee0, 0x4bb802ee,
+ 0x00bb802e, 0xe00ab802, 0xee00bb80, 0x2ee00bb8, 0x42ee01ba, 0x8022e04b,
+ 0xb802ee00, 0xb8802cc8, 0x4cb7022b, 0x54ba8022, 0xa10ba802, 0xf2028c80,
+ 0xa2808898, 0x42e600bb, 0x002ee00b, 0xb802a004, 0x30000000, 0x00000000,
+ 0x0805cc10, 0x33002cc0, 0x0b3002cc, 0x00b3002c, 0xc0193012, 0xcc10b300,
+ 0x2cc10b30, 0x02cc00b3, 0x0160c10b, 0x3002cc00, 0xb00428c2, 0x080086c4,
+ 0x00ba8428, 0x000b0002, 0xc0028100, 0x20c02800, 0x024010b3, 0x002cc00b,
+ 0xb0020201, 0x70000000, 0x00000000, 0xc015ac04, 0xbb012ec0, 0xcbb002ec,
+ 0x00bb002e, 0xc02bb002, 0xec00bb00, 0x2ec00bb0, 0x02ec00bb, 0x0022c00b,
+ 0xb002ec00, 0xb9402cc0, 0x09b002a8, 0x10ba802a, 0x484b8002, 0xe6000980,
+ 0xa2c00890, 0x02e008bb, 0x002ec603, 0xb802b004, 0x60000000, 0x00000000,
+ 0x0015ec00, 0xfb003ec0, 0x8fb003ec, 0x00fb003e, 0xc00db003, 0xec00fb00,
+ 0x3ec00fb0, 0x03ec09e8, 0x50b2c00f, 0xb003ec00, 0xfa503ac0, 0x0cc043f4,
+ 0x00fa00ba, 0x408f8403, 0xe300c8a0, 0x32800c80, 0x03ec00fb, 0x003e300f,
+ 0xa80b1004, 0x70000000, 0x00000000, 0xe001bc00, 0xff003fc1, 0x0ff013fc,
+ 0x00ff003f, 0xc00ef013, 0xfc00ff00, 0x3fc10ff0, 0x03fc10fc, 0x003fc00f,
+ 0xf003fc00, 0xfc803fc2, 0x4ef00278, 0x04fe0037, 0xe00be401, 0xe020f400,
+ 0x3f808fd9, 0x02fc00ff, 0x023fe00f, 0xf003f800, 0x60000000, 0x00000000,
+ 0xc010ac00, 0xfb013ec0, 0x03b003ec, 0x00fb003e, 0xc12db003, 0xec00fb00,
+ 0x3ec00fb0, 0x03ec00f1, 0x0532c10f, 0xb003ec00, 0xfa583ec0, 0x2c000b64,
+ 0x20ca003e, 0x000f9403, 0x0400c840, 0xb2c40c80, 0x03e800fb, 0x013ed00f,
+ 0xa0033004, 0x20000000, 0x00000000, 0xc8052c00, 0xbb002ec0, 0x0bb002ec,
+ 0x10bb012c, 0xc108b002, 0xec10bb01, 0x2ec00bb0, 0x02ec103b, 0x0422c00b,
+ 0xb002ec08, 0xb9802ed8, 0x48bd202a, 0x90d2000e, 0x600b9102, 0x26008988,
+ 0x22d00d90, 0x12e800bb, 0x002ef80b, 0x100eb200, 0x40000000, 0x00000000,
+ 0xe0054c00, 0xb3002cc1, 0x0b3002cc, 0x00b3002c, 0xc0093002, 0xcc00b300,
+ 0x2cc00b30, 0x02cc00b2, 0x0024c00b, 0x3002cc00, 0xb1402cc0, 0x08004246,
+ 0x1082002c, 0x060b1006, 0x0100a102, 0x22a00820, 0x02c400b3, 0x020cf20b,
+ 0x30023800, 0x50000000, 0x00000000, 0x60011e00, 0xb7802de0, 0x0b7842de,
+ 0x00b7802d, 0xe0097802, 0xde00b780, 0x6de00b78, 0x02de00b2, 0x0025e00b,
+ 0x7802de40, 0xb6812de0, 0x8878c20a, 0x0096802d, 0xa01bf802, 0x1e42af80,
+ 0x21b40978, 0x00d600b7, 0x802de00b, 0xfb029800, 0x00000000, 0x00000000,
+ 0x48080c00, 0xf3003cc4, 0x0f3003cc, 0x00f3003c, 0xc00d3003, 0xcc00f300,
+ 0x3cc00f30, 0x03cc04f2, 0x1034c01b, 0x3003cc00, 0xf1003cc0, 0x0c800344,
+ 0x0081003c, 0x840f240b, 0x0860e100, 0x32c00c21, 0x03c040f3, 0x003cc00f,
+ 0x32021202, 0x00000000, 0x00000000, 0x401dbc04, 0xff003fc0, 0x0ff003fc,
+ 0x00ff003d, 0xc00ef003, 0xfc00ff00, 0x3fc00ff0, 0x03fc00fe, 0x603bc00f,
+ 0xf003fc10, 0xff403fc0, 0x8ff003ba, 0x40fd013f, 0xc40fe0a3, 0xfc52df10,
+ 0x3fc10ff0, 0x53f200bf, 0x003fc40f, 0x72035007, 0x20000000, 0x00000000,
+ 0xa805ec00, 0xfb003ec0, 0x1db003ec, 0x08fb003e, 0xc00fb003, 0xec00fb00,
+ 0x3ec00fb0, 0x03ec00f8, 0x403ec00f, 0xb003ce00, 0xcbe03ac0, 0x0e8043e4,
+ 0x06ca02b6, 0x580f9603, 0xe520ca20, 0x3a800ea0, 0x03ec00fb, 0x003ec00c,
+ 0xa00b2a00, 0x70000000, 0x00000000, 0xc8119c00, 0xb7022dc0, 0x0b7002dc,
+ 0x00b7002d, 0xc00b7002, 0xdc00b700, 0x2dc00b70, 0x02dc00b4, 0x002dc00b,
+ 0x7002dc04, 0x860021c0, 0x887042d8, 0x00a60421, 0xc40b7302, 0xdc008310,
+ 0x2b800a70, 0x039c00b7, 0x002dc10d, 0x70023204, 0x60000000, 0x00000000,
+ 0xc0009e00, 0xb7812de0, 0x4b7802de, 0x00b7862d, 0xe00b7802, 0x9e00b780,
+ 0x2de00b78, 0x02de00b6, 0xc02de00b, 0x7802de02, 0x8f9029e0, 0x4a4810c6,
+ 0x008d8021, 0xa40b7a02, 0xfe038680, 0x2de00a68, 0x02da10b7, 0x802de008,
+ 0x68023000, 0x20000000, 0x00000000, 0x4814cc00, 0xb3002cc0, 0x0b3002cc,
+ 0x00b3002c, 0xc00b3002, 0xcc00b300, 0x2cc00b30, 0x06cc00b3, 0x422cc00b,
+ 0x3002cc00, 0x830020c1, 0x083002c8, 0x00a10024, 0xc88b3002, 0xcd808340,
+ 0xaec00a30, 0x028840b3, 0x002cc009, 0x34021204, 0x30000000, 0x00000000,
+ 0xe815a800, 0xfa003e80, 0x0fa003e8, 0x00fa003e, 0x800fa003, 0xa800fa00,
+ 0x3e800fa0, 0x03e800fa, 0x003e800f, 0xa003e800, 0xca003a80, 0x0ea003e8,
+ 0x04c60436, 0x800fa403, 0xf810c6d0, 0xbe800ea0, 0x03ea00fa, 0x003d800c,
+ 0xec473a04, 0x60000000, 0x00000000, 0x4800e000, 0xf8003e00, 0x0f8003e0,
+ 0x00f8003e, 0x000f8003, 0xe000f800, 0x3e000f80, 0x03e000f8, 0x083e000f,
+ 0x8003e000, 0xf8503e00, 0x0fc013f0, 0x00f8013a, 0x000f8493, 0xc000f810,
+ 0x3a100f80, 0x03f000f8, 0x003e000f, 0x8587d200, 0x30000000, 0x00000000,
+ 0x0810e400, 0xf9003e40, 0x0f9003e4, 0x00f9002e, 0x600f9003, 0xe400f900,
+ 0x3e400f90, 0x03e400fb, 0x003e400f, 0x9003e400, 0xf9003e40, 0x2c900304,
+ 0x8ae90092, 0x410f9903, 0xe404c900, 0x36400c90, 0x03e400c9, 0x102e400c,
+ 0x90130204, 0x30000000, 0x00000000, 0x80046400, 0xb9006e40, 0x0b9002e4,
+ 0x00b9002e, 0x600b9003, 0xa400b900, 0x2e400b90, 0x02e400b9, 0x002e400b,
+ 0x9002e400, 0xbb492c40, 0x08900a24, 0x80890022, 0xe109b402, 0xe520d900,
+ 0x2a400890, 0x02c400d9, 0x802e520d, 0x100aa000, 0x10000000, 0x00000000,
+ 0x18052400, 0xb9042e40, 0x0b9002e4, 0x00b9002e, 0x440b9002, 0xe400b900,
+ 0x2e400b90, 0x02e400bb, 0x002e400b, 0x9002e400, 0xb9002e40, 0x08100a34,
+ 0x0089022a, 0x440b9002, 0xec808910, 0x664288d0, 0x02f400a9, 0x002e4808,
+ 0x90920600, 0x40000000, 0x00000000, 0x08040400, 0xb1002c40, 0x0b1002c4,
+ 0x00b1002c, 0x400b1002, 0xc400b100, 0x2c400b10, 0x12c400b1, 0x002c400b,
+ 0x1012c400, 0xb1002e44, 0x48510294, 0x00810068, 0x41093000, 0xc4029100,
+ 0x2c440850, 0x02f401b1, 0x102c4009, 0x10008201, 0x00000000, 0x00000000,
+ 0xb80d6000, 0xf8002e00, 0x0f8003e0, 0x00f8003e, 0x000f8003, 0xe000f800,
+ 0x3e000f80, 0x03e000f8, 0x003e000f, 0x8003e000, 0xf8003c10, 0x88868330,
+ 0xa0c8003a, 0x000b8013, 0xe0a28829, 0x36102c80, 0x03f000e8, 0x403e000c,
+ 0x80010e03, 0x50000000, 0x00000000, 0x981de400, 0xf9003e40, 0x0f9003e4,
+ 0x00f9003e, 0x400f9003, 0xa400f900, 0x3e400f90, 0x03e400f9, 0x403e400f,
+ 0x9003e400, 0xf1002f49, 0x0f920364, 0x00d70036, 0x4005b001, 0xd400fd00,
+ 0xba480f90, 0x03e400d9, 0xa23dc00f, 0x5003e606, 0x70000000, 0x00000000,
+ 0x9805e400, 0xf9003e40, 0x0f9003e4, 0x00f9003f, 0x400f9043, 0xe400f900,
+ 0x3e400f90, 0x03e404f9, 0x003e400f, 0x9003f402, 0xc9003e44, 0x0c920b14,
+ 0xa0cd00b2, 0x400f9003, 0xf400cd20, 0x33400e10, 0x03e400fd, 0x0231400c,
+ 0x50030600, 0x70000000, 0x00000000, 0x3810e000, 0xb8002e00, 0x0b8002e0,
+ 0x00b8002e, 0x000b8002, 0xe000b800, 0x2e000b80, 0x02e000b8, 0x002e000b,
+ 0x8002e000, 0x88002e00, 0x08c28220, 0x02880022, 0x000b8002, 0xe0428802,
+ 0x2a880880, 0x03a800e8, 0x0222000a, 0x80014e04, 0x30000000, 0x00000000,
+ 0x0805c400, 0xb1002c40, 0x0b1002c4, 0x00b1002c, 0x400b1002, 0xc400b100,
+ 0x2c400b10, 0x02c400b1, 0x002c401b, 0x1002c400, 0x81002d40, 0x08530a04,
+ 0x00810020, 0x400b1002, 0xc4020114, 0xa04a8a10, 0x02c400b1, 0x00264008,
+ 0x10220201, 0x70000000, 0x00000000, 0x1815a400, 0xb9002e40, 0x0b9002e4,
+ 0x00b9002e, 0x400b9002, 0xe400b900, 0x2e400b90, 0x42e400b9, 0x002e400b,
+ 0x9002e400, 0x89002e40, 0x08d02224, 0x00890022, 0xc80b9002, 0xe4a08908,
+ 0xaa400890, 0x02a400a9, 0x0006400a, 0xb2024604, 0x60000000, 0x00000000,
+ 0xa015e400, 0xf9003e40, 0x0f9003e4, 0x00f9003e, 0x400f9003, 0xe400f900,
+ 0x3e400f90, 0x03e400f9, 0x603e400f, 0x9003e400, 0xc9603e40, 0x2c900324,
+ 0x00c94032, 0x620f9c03, 0xc504c940, 0xb2500e90, 0x03e500fd, 0x0036501c,
+ 0x90032804, 0x70000000, 0x00000000, 0xa801a400, 0xf9003e40, 0x0f9003e4,
+ 0x00f9003e, 0x400f9003, 0xe400f900, 0x3e400f90, 0x03e400f9, 0x203e400f,
+ 0x9003e400, 0xf9003e40, 0x0f1003e4, 0x00f9903e, 0x400f9403, 0xe400f900,
+ 0x1e400b90, 0x03a408e9, 0x003a501b, 0x9803ea00, 0x60000000, 0x00000000,
+ 0x2810a000, 0xf8003e00, 0x0f8003e0, 0x00f8003e, 0x000f8003, 0xe000f800,
+ 0x3e000f80, 0x03a000f8, 0x403e000f, 0x8003e000, 0xf8003f00, 0x0fc00320,
+ 0x10c8003e, 0x000f8113, 0xe102d040, 0x36122c80, 0x032000f8, 0x003e040c,
+ 0x80030a04, 0x20000000, 0x00000000, 0x28052800, 0xba002e80, 0x0ba002e8,
+ 0x00ba002e, 0x800ba002, 0xe800ba00, 0x2e800ba0, 0x40e800ba, 0x022e810b,
+ 0xa002c800, 0xba002e81, 0x0ba0021b, 0xc0a2012e, 0x9049a022, 0xf800da88,
+ 0xaba008a0, 0x023800ea, 0x002db00a, 0x62028a00, 0x40000000, 0x00000000,
+ 0x28054c00, 0xb3002cc0, 0x0b3002cc, 0x00b3002c, 0xc00b3002, 0xcc00b300,
+ 0x2cc00b30, 0x028c00b3, 0x002cc11b, 0x3002cc00, 0xa3002ec0, 0x0b20420f,
+ 0x0083006c, 0xc80b3802, 0xce009381, 0x26e00830, 0x020801bb, 0x002cd808,
+ 0x28020a00, 0x50000000, 0x00000000, 0xa0011c00, 0xb7002dc0, 0x0b7002dc,
+ 0x00b7002d, 0xc00b7002, 0xdc00b700, 0x2dc00b70, 0x12dc00b7, 0x002dc00b,
+ 0x7002dc00, 0xb6082d00, 0x0b50021c, 0x10a7042d, 0xc0097002, 0xd9009700,
+ 0x29c208f8, 0x021800a7, 0xa02dc00a, 0xe002a800, 0x40000000, 0x00000000,
+ 0xa8081e00, 0xf7803de0, 0x0f7803de, 0x00f7803d, 0x600f7803, 0xde00f780,
+ 0x3de00f78, 0x039e00f7, 0x803de10f, 0x7803de00, 0xe7803de0, 0x0be80b1e,
+ 0x00c7803d, 0x620b6883, 0xce00d784, 0x37e00c78, 0x0b1a00f5, 0x403de00c,
+ 0x78032a02, 0x00000000, 0x00000000, 0x081dac00, 0xfb003ec0, 0x0fb003ec,
+ 0x00fb003e, 0x400fb003, 0xec00fb00, 0x3ec00fb0, 0x03ec00fb, 0x003ec00f,
+ 0xb003ec00, 0xfa093e00, 0x0f9003ec, 0x10fb003e, 0x5001a403, 0xec00e300,
+ 0x3ec00fb0, 0x03e800e9, 0x803ec00f, 0xb003c206, 0x60000000, 0x00000000,
+ 0x4005fe00, 0xff803fe0, 0x0ff803fe, 0x00ff803d, 0xe00cf803, 0xfe00ff80,
+ 0x3fe00ff8, 0x03fe00ff, 0x803fe00f, 0xf807dc41, 0xcd903fe4, 0x0ce8033e,
+ 0x00c78233, 0xe00fd803, 0xde00dfb0, 0xb7e00cf8, 0x03fa00ff, 0x803fe00c,
+ 0x68030000, 0x70000000, 0x00000000, 0xa8119c00, 0xb7002dc0, 0x0b7002dc,
+ 0x00b7002d, 0xc00a7002, 0xdc00b700, 0x2dc00b70, 0x02dc00b7, 0x002dc40b,
+ 0x7006dc02, 0x84002d00, 0xa850021c, 0x408710b1, 0x840b5002, 0xd888f710,
+ 0x37488d70, 0x039800e7, 0x002dc00f, 0x60036a04, 0x60000000, 0x00000000,
+ 0x18009c00, 0xb7002dc0, 0x0b7002dc, 0x00b7002d, 0x40087002, 0xdc00b700,
+ 0x2dc00b70, 0x02dc00b7, 0x402dc00b, 0x7002dc40, 0x85012fc0, 0x08680a0c,
+ 0x02870025, 0x420b4082, 0xdc058321, 0x21800870, 0x02d800b5, 0x002fc008,
+ 0xf0820000, 0x20000000, 0x00000000, 0x6014cc00, 0xb3002cc0, 0x0b3002cc,
+ 0x00b3002c, 0x400a3002, 0xcc00b300, 0x2cc00b30, 0x02cc00b3, 0x002cc00b,
+ 0x3002cc00, 0x80002e00, 0x4815020d, 0x30830020, 0x20cb0822, 0xcd2091c0,
+ 0x26008934, 0x028b00a1, 0x002c810b, 0x36424804, 0x30000000, 0x00000000,
+ 0x3815ac00, 0xfb003ec0, 0x0fb003ec, 0x00fb003c, 0x400cb003, 0xec00fb00,
+ 0x3ec00fb0, 0x03ec00fb, 0x003ec00f, 0xb003ec00, 0xcb183ec0, 0x8ca0030e,
+ 0x80c30036, 0xb00fb803, 0xec08cb02, 0xb2400c30, 0x03e9c0fb, 0x003ee01c,
+ 0x38472a04, 0x60000000, 0x00000000, 0x8000ec00, 0xfb003ec0, 0x0fb003ec,
+ 0x00fb003e, 0x400fb003, 0xec00fb00, 0x3ec00fb0, 0x03ec00fb, 0x103ec00f,
+ 0xb003ec04, 0xf9423e00, 0x0e1093e5, 0x00fb003e, 0x120fa043, 0xca00f310,
+ 0x3e008fb0, 0x07e801fb, 0x023ec61e, 0xb007a000, 0x30000000, 0x00000000,
+ 0x8010fc00, 0xff003fc0, 0x0ff023fc, 0x00ff003f, 0x480cf003, 0xfc00ff00,
+ 0x3fc00ff0, 0x03fc00ff, 0x003fc00f, 0xf003fc00, 0xfe823fc0, 0x3ce0473e,
+ 0x50cf0037, 0xa00cd803, 0xfc04df08, 0x37400cf0, 0x933800cd, 0x003f440f,
+ 0xf0074044, 0x30000000, 0x00000000, 0x81046c01, 0xbb002ec0, 0x0bb002ec,
+ 0x04bb012e, 0x400db002, 0xec00bb00, 0x2ec00bb0, 0x02ec00bb, 0x002ec00b,
+ 0xb002ec00, 0xb8192f00, 0x98d01228, 0x00ab0034, 0x10088e20, 0xee02fb00,
+ 0xb62028b0, 0x020800c9, 0x002ec00b, 0xbc022040, 0x10000000, 0x00000000,
+ 0x80052c04, 0xbb042ec0, 0x0bb002ec, 0x00bb002e, 0x4008b042, 0xec00bb00,
+ 0x2ec00bb0, 0x02ec00bb, 0x002ec00b, 0xb002ec00, 0xbb002ec0, 0x88a0026c,
+ 0x308b0066, 0xc508b102, 0xee089b00, 0xa67008b0, 0x0628009b, 0x002ec20b,
+ 0x98022000, 0x40000000, 0x00000000, 0x08040c00, 0xb3002cc0, 0x0b3002cc,
+ 0x00b3002c, 0x40093002, 0xcc00b300, 0x2cc00b30, 0x02cc00b3, 0x002cc00b,
+ 0x3002cc00, 0xb1042c00, 0x08101a4c, 0x00ab0026, 0x00182052, 0xc000b300,
+ 0xa40008b0, 0x0a080183, 0x002cc00b, 0x900a4201, 0x00000000, 0x00000000,
+ 0x800d6c08, 0xbb003ec0, 0x0fb003ec, 0x00fb013e, 0x402cb003, 0xec00fb00,
+ 0x3ec00fb0, 0x03ec00fb, 0x003ec00f, 0xb002ec00, 0xfa003ec0, 0x1820426c,
+ 0x04cb00b6, 0xc1089003, 0xec02db00, 0x36000cb0, 0x032802d9, 0x003ec00f,
+ 0x90034003, 0x50000000, 0x00000000, 0xa01dfc00, 0xff003fc0, 0x4ff000fc,
+ 0x00ff003f, 0x402ff003, 0xfc00ff00, 0x3fc00ff0, 0x03fc00ff, 0x003fc00f,
+ 0xf003fc04, 0xfc003d01, 0x8fd02bbc, 0x00ff00b7, 0x000fc003, 0xfc00fd02,
+ 0x3b004ff0, 0x03f800fd, 0x003dc08f, 0xd023a806, 0x70000000, 0x00000000,
+ 0x00000284, 0x00a10028, 0x400a1002, 0x8400a1cc, 0x28400a10, 0x028400a1,
+ 0x0028730a, 0x10028400, 0xa1002873, 0x0a100285, 0x04a10028, 0x600a1082,
+ 0x8230a100, 0x28420a10, 0x02860491, 0x0028400a, 0x18c2842c, 0xb14c2842,
+ 0x0a100000, 0x00000000, 0x00000000, 0x00000004, 0x00010000, 0x40001000,
+ 0x04000100, 0x00400010, 0x00040001, 0x00004000, 0x10000400, 0x01000040,
+ 0x00100004, 0x10010000, 0x53001000, 0x04000100, 0x00410010, 0x00050011,
+ 0x00004000, 0x10000408, 0x01420040, 0x00100000, 0x00000000, 0x00000000,
+ 0x00000084, 0x00210008, 0x40021000, 0x84002100, 0x08400210, 0x00840021,
+ 0x00084002, 0x10008400, 0x21000840, 0x021000c5, 0x24210008, 0x63021080,
+ 0x85002100, 0x08422210, 0x00042601, 0x00084002, 0x1400c420, 0x21090842,
+ 0x02100000, 0x00000000, 0x00000000, 0x00000804, 0x02010080, 0x40201008,
+ 0x040201cc, 0x80402010, 0x08040201, 0x00807320, 0x10080402, 0x01008073,
+ 0x20100805, 0x02010280, 0x62201088, 0x05020100, 0x80402010, 0x08062201,
+ 0x00804020, 0x18c80426, 0x014c8042, 0x20100000, 0x00000000, 0x00000000,
+ 0x00000080, 0x00200008, 0x00020000, 0x80002000, 0x08000200, 0x00800020,
+ 0x00080002, 0x00008002, 0x20000833, 0x22000080, 0x2820090a, 0x31020000,
+ 0x82002004, 0x0800020c, 0xc0800410, 0x00080002, 0x00000200, 0x300c0801,
+ 0x02000000, 0x00000000, 0x00000000, 0x00000200, 0x00800020, 0x00080002,
+ 0x00008000, 0x20000800, 0x02000080, 0x00200008, 0x00020000, 0x80002000,
+ 0x08000203, 0x10800020, 0x01080002, 0x01008008, 0x20000800, 0x02000080,
+ 0x00200008, 0x08024110, 0x800c2002, 0x08004000, 0x00000000, 0x00000000,
+ 0x00000080, 0x00200008, 0x00020000, 0x80002000, 0x08000200, 0x00800020,
+ 0x00080002, 0x00008000, 0x20000800, 0x020000c1, 0x2c200b08, 0x02020080,
+ 0x80002000, 0x08000200, 0x20c02000, 0x00080002, 0x0410c220, 0x00090802,
+ 0x02008000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000033,
+ 0x00003102, 0x28000800, 0x31000080, 0x02000004, 0x0000000c, 0xc0002010,
+ 0x00000000, 0x00000224, 0x10050003, 0x00008000, 0x00000000, 0x00000000,
+ 0x00000284, 0x00a10028, 0x400a1002, 0x8400a100, 0x28400a10, 0x028400a1,
+ 0x0028400a, 0x10028400, 0xa1002840, 0x0a100284, 0x00a10428, 0x414a1042,
+ 0x8400a100, 0x28400a10, 0x028404a1, 0x0428400a, 0x14028410, 0xb1082841,
+ 0x0a100000, 0x00000000, 0x00000000, 0x00000004, 0x00010000, 0x40001000,
+ 0x04000100, 0x00400010, 0x00040001, 0x00004000, 0x10000400, 0x01000040,
+ 0x00105004, 0x04010900, 0x52401080, 0x04000140, 0x00400010, 0x00042401,
+ 0x88004000, 0x10300424, 0x010d0042, 0x80108000, 0x00000000, 0x00000000,
+ 0x00000084, 0x00210008, 0x40021000, 0x84002100, 0x08400210, 0x00840021,
+ 0x00084002, 0x10008400, 0x21000840, 0x021080c4, 0x00210608, 0x61821000,
+ 0x84002100, 0x08400210, 0x00840411, 0x44084002, 0x1410c514, 0x210d0841,
+ 0x42104000, 0x00000000, 0x00000000, 0x00100007, 0x3001cc00, 0x73001cc0,
+ 0x073001cc, 0x0073001c, 0xc0040001, 0xcc007300, 0x1cc00730, 0x01cc0073,
+ 0x001cc007, 0x3c01cf00, 0x73401cc0, 0x07300180, 0x0073001c, 0xd0041401,
+ 0x88007300, 0x18c00514, 0x01c50072, 0x001cc004, 0x00000000, 0x00000000,
+ 0x00000084, 0x00210008, 0x40021000, 0x84002100, 0x08400210, 0x00840021,
+ 0x00084002, 0x10008400, 0x21000840, 0x02100086, 0x20210808, 0x42421cc0,
+ 0x84002100, 0x08400210, 0x10873c21, 0x8c087302, 0x18d0842c, 0x01470840,
+ 0x02104000, 0x00000000, 0x00000000, 0x00000200, 0x00800020, 0x00080002,
+ 0x00008000, 0x20000800, 0x02000080, 0x00200008, 0x00020000, 0x80002000,
+ 0x08000301, 0x00800c20, 0x02881002, 0x00008000, 0x20000800, 0x02042081,
+ 0x00204108, 0x18220030, 0x81442000, 0x48008000, 0x00000000, 0x00000000,
+ 0x00000080, 0x00200008, 0x00020000, 0x80002000, 0x08000200, 0x00800020,
+ 0x00080002, 0x00008000, 0x20000800, 0x020020c0, 0x2420090a, 0x03021000,
+ 0x80002000, 0x08000200, 0x10441401, 0x48084202, 0x14100034, 0x21890800,
+ 0x42004000, 0x00000000, 0x00000000, 0x04108000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00002002, 0x28000e00, 0x03000cc0, 0x00000000, 0x00000000, 0x20432000,
+ 0x8c003100, 0x0cc00030, 0x00000000, 0x40004104, 0x20000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00001000, 0x40000000, 0x10000080,
+ 0x00000000, 0x00000000, 0x10108000, 0x00000000, 0x00100000, 0x10402090,
+ 0x80008000, 0x00000000, 0x00000000, 0x3c3c0000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x000010c0, 0x80800000, 0x10003080, 0x00000000, 0x00000000, 0x10c08080,
+ 0x00001000, 0x0010e080, 0x80000010, 0x00308f0f, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000002, 0x001a003c, 0x003c0000,
+ 0x00000000, 0x00000000, 0x0141c181, 0x40199999, 0x99801b00, 0x18002400,
+ 0x3c000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x80000014, 0x00140000, 0x00000000, 0x00000000, 0x00028202,
+ 0x00000000, 0x00000000, 0x02001400, 0x14000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00001101, 0x80018000,
+ 0x00000000, 0x00000000, 0x28142112, 0x30000000, 0x00000000, 0x00110880,
+ 0x08800000, 0x00000000, 0x00000000, 0x00003fff, 0xffffc000, 0x0000003f,
+ 0xffffffc0, 0x00000000, 0x3fffffff, 0xc0000000, 0x003fffff, 0xffc00000,
+ 0x00003f7f, 0xffffc000, 0x0000003f, 0xffffffc0, 0x00000000, 0x3fffffff,
+ 0xc0000000, 0x003fffff, 0xffc00000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00003fff, 0xffffc000, 0x0000003f, 0xffffffc0, 0x00000000, 0x3fffffff,
+ 0xc0000000, 0x003fffff, 0xffc00000, 0x00003fff, 0xffffc000, 0x0000003f,
+ 0xffffffc0, 0x00000000, 0x3fff7ffd, 0x40000000, 0x003fffff, 0xffc00000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00003fff, 0xffffc000, 0x0000003f,
+ 0xffffffc0, 0x00000000, 0x3fffffff, 0xc0000000, 0x003fffff, 0xffc00000,
+ 0x00003fff, 0xffffc000, 0x0000003f, 0xffffffc0, 0x00000000, 0x3df7ffff,
+ 0xc0000000, 0x003ffeff, 0xfec00000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00003fff, 0xffffc000, 0x0000003f, 0xffffffc0, 0x00000000, 0x3fffffff,
+ 0xc0000000, 0x003fffff, 0xffc00000, 0x00003fff, 0xffffc000, 0x0000003f,
+ 0xffffffc0, 0x00000000, 0x3fffffff, 0xc0000000, 0x003fffff, 0xffc00000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00003fff, 0xffffc000, 0x0000003f,
+ 0xffffffc0, 0x00000000, 0x3fffffff, 0xc0000000, 0x003fffff, 0xffc00000,
+ 0x00003fff, 0xffffc000, 0x0000003f, 0xffffffc0, 0x00000000, 0x3fffffff,
+ 0xc0000000, 0x003fffff, 0xffc00000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00003fff, 0xffffc000, 0x0000003f, 0xffffffc0, 0x00000000, 0x3fffffff,
+ 0xc0000000, 0x003fffff, 0xffc00000, 0x00003fff, 0xffffc000, 0x0000003f,
+ 0xffffffc0, 0x00000000, 0x3fffffff, 0xc0000000, 0x003fffff, 0xffc00000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000284, 0x00a10028, 0x400a1002,
+ 0x8400a100, 0x28400a0c, 0xc28400a1, 0x0028400a, 0x10028400, 0xa1002840,
+ 0x0a104285, 0x04a54028, 0x420a1802, 0x8700a000, 0x29400a10, 0x028400a1,
+ 0x0028400a, 0x10028400, 0xa1002840, 0x0a100000, 0x00000000, 0x00000000,
+ 0x00000004, 0x00010000, 0x40001000, 0x04000100, 0x00400010, 0x00040001,
+ 0x00004000, 0x10000400, 0x01000040, 0x00108007, 0x00090000, 0x41009440,
+ 0x0700084e, 0x02400010, 0x00040001, 0x00004000, 0x10000400, 0x01000040,
+ 0x00100000, 0x00000000, 0x00000000, 0x00000084, 0x00210008, 0x40021000,
+ 0x84002100, 0x08400210, 0x00840021, 0x00084002, 0x10008400, 0x21000840,
+ 0x02104087, 0x0821410c, 0x42021880, 0x852021c9, 0x08400290, 0x00840021,
+ 0x00084002, 0x10008400, 0x21000840, 0x02100000, 0x00000000, 0x00000000,
+ 0x00000004, 0x02010080, 0x40201008, 0x04000100, 0x80402010, 0x08040201,
+ 0x00804020, 0x10080402, 0x01008040, 0x20104805, 0x0a014180, 0x40201008,
+ 0x062a010d, 0x80402010, 0x08040201, 0x00804020, 0x10080402, 0x01008040,
+ 0x20100000, 0x00000000, 0x00000000, 0x00000080, 0x00200008, 0x00020000,
+ 0x80002000, 0x08000200, 0x08800020, 0x00080022, 0x00088332, 0x20008820,
+ 0x22000082, 0x00284609, 0x22020800, 0x82242040, 0x08000204, 0x00800020,
+ 0x00080002, 0x00008000, 0x20000800, 0x02000000, 0x00000000, 0x00000000,
+ 0x00000200, 0x00800020, 0x00080002, 0x00008000, 0x20000800, 0x02000080,
+ 0x00200008, 0x00020000, 0x80002010, 0x08000201, 0x20c04020, 0x10080082,
+ 0x031080c0, 0x20000884, 0x82000080, 0x00200008, 0x00020000, 0x80002000,
+ 0x08000000, 0x00000000, 0x00000000, 0x00000080, 0x00200008, 0x00020000,
+ 0x80002000, 0x08000200, 0x00800020, 0x00080002, 0x00008000, 0x20000820,
+ 0x02000080, 0x0c200b0c, 0x220604c0, 0x832428c1, 0x0a000204, 0x40800020,
+ 0x00080002, 0x00008000, 0x20000800, 0x02000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000330, 0x00000000, 0x00000002, 0x10008000, 0x22000440,
+ 0x002c00c3, 0x0100000c, 0x40000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000284, 0x00a10028, 0x400a1002,
+ 0x8400a100, 0x28400a10, 0x028400a1, 0x0028400a, 0x10028400, 0xa1cc2840,
+ 0x0a100285, 0x00a5042c, 0x600a9002, 0x8620e144, 0x28410e10, 0x028400a1,
+ 0xcc28400a, 0x10028400, 0xa1002840, 0x0a100000, 0x00000000, 0x00000000,
+ 0x00000004, 0x00010000, 0x40001000, 0x04000100, 0x00400010, 0x00040001,
+ 0x00004000, 0x10000400, 0x01000040, 0x00100007, 0x04094901, 0x52001880,
+ 0x04240189, 0x12720010, 0x00040001, 0x00004000, 0x10000400, 0x01000040,
+ 0x00100000, 0x00000000, 0x00000000, 0x00000084, 0x00210008, 0x40021000,
+ 0x84002100, 0x08400210, 0x00840021, 0x00084002, 0x10008400, 0x21000840,
+ 0x02100085, 0x0421010c, 0x41021440, 0x81102144, 0x08510210, 0x00840021,
+ 0x00084002, 0x10008400, 0x21000840, 0x02100000, 0x00000000, 0x00000000,
+ 0x00100007, 0x3001cc00, 0x40001000, 0x073001cc, 0x0073001c, 0xc0073001,
+ 0xcc007300, 0x1cc00400, 0x01cc0073, 0x001cc007, 0x0c018700, 0x60401cb0,
+ 0x0504018d, 0x0060401c, 0xc0073001, 0xcc004000, 0x1cc00730, 0x01cc0073,
+ 0x001cc004, 0x00000000, 0x00000000, 0x00000084, 0x00210008, 0x40021000,
+ 0x84002100, 0x08400210, 0x00840021, 0x00084002, 0x10008400, 0x21000840,
+ 0x02103087, 0x2029400c, 0x70021000, 0x870c29cb, 0x18408298, 0x00840021,
+ 0x00084002, 0x10008400, 0x21000840, 0x02100000, 0x00000000, 0x00000000,
+ 0x00000200, 0x00800020, 0x00080002, 0x00008000, 0x20000800, 0x02000080,
+ 0x00200008, 0x00020000, 0x80002000, 0x08000203, 0x00840030, 0x30c80002,
+ 0x03008040, 0x21004804, 0x02000080, 0x00200008, 0x00020000, 0x80002000,
+ 0x08000000, 0x00000000, 0x00000000, 0x00000080, 0x00200008, 0x00020000,
+ 0x80002000, 0x08000200, 0x00800020, 0x00080002, 0x00008000, 0x20000800,
+ 0x02001081, 0x2420410c, 0x10460400, 0x81042049, 0x08004204, 0x00800020,
+ 0x00080002, 0x00008000, 0x20000800, 0x02000000, 0x00000000, 0x00000000,
+ 0x04108000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000003, 0x28004200, 0x20000420,
+ 0x000000c8, 0x0000000c, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000104, 0x20000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00001010, 0x00004020, 0x00400090, 0x10000000, 0x00004000, 0x80000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x3c3c0000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x000010e0, 0x80800000, 0x10003090,
+ 0xe080a000, 0x00500030, 0x80000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000f0f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x000025c3, 0x85ed803f, 0xdfffffd6, 0xcd32a080, 0x26402640, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00001012, 0x9282003f, 0x80690044,
+ 0x06820480, 0x3e96e816, 0xc0000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000888, 0x32081200, 0x00000008, 0x81720172, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00003fff, 0xffffc000, 0x0000003f, 0xffffffc0, 0x00000000, 0x3fffffff,
+ 0xc0000000, 0x003fffff, 0xffc00000, 0x00003dff, 0xffff8000, 0x0000003f,
+ 0xff3fff40, 0x00000000, 0x3fffffff, 0xc0000000, 0x003fffff, 0xffc00000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00003fff, 0xffffc000, 0x0000003f,
+ 0xffffffc0, 0x00000000, 0x3fffffff, 0xc0000000, 0x003fffff, 0xffc00000,
+ 0x00003fff, 0xffffc000, 0x0000003f, 0xffffffc0, 0x00000000, 0x3fffffff,
+ 0xc0000000, 0x003fffff, 0xffc00000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00003fff, 0xffffc000, 0x0000003f, 0xffffffc0, 0x00000000, 0x3fffffff,
+ 0xc0000000, 0x003fffff, 0xffc00000, 0x00003fff, 0xffffc000, 0x0000003f,
+ 0xffffffc0, 0x00000000, 0x3fffffff, 0xc0000000, 0x003fffff, 0xffc00000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00003fff, 0xffffc000, 0x0000003f,
+ 0xffffffc0, 0x00000000, 0x3fffffff, 0xc0000000, 0x003fffff, 0xffc00000,
+ 0x00003fff, 0xffffc000, 0x0000003f, 0xffffffc0, 0x00000000, 0x3fffffff,
+ 0xc0000000, 0x003fffff, 0xffc00000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00003fff, 0xffffc000, 0x0000003f, 0xffffffc0, 0x00000000, 0x3fffffff,
+ 0xc0000000, 0x003fffff, 0xffc00000, 0x00003fff, 0xffffc000, 0x0000003f,
+ 0xffffffc0, 0x00000000, 0x3fffffff, 0xc0000000, 0x003fffff, 0xffc00000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00003fff, 0xffffc000, 0x0000003f,
+ 0xffffffc0, 0x00000000, 0x3fffffff, 0xc0000000, 0x003fffff, 0xffc00000,
+ 0x00003fff, 0xffffc000, 0x0000003f, 0xffffffc0, 0x00000000, 0x3fffffff,
+ 0xc0000000, 0x003fffff, 0xffc00000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00c54703, 0x7040dc50, 0x370405c1, 0x037140dc, 0x1037140d, 0xc1037140,
+ 0xdc103714, 0x0dc10371, 0x40dc1027, 0x1c0dc503, 0x7144dc70, 0x27040dc5,
+ 0x037140dc, 0x1037040d, 0xc5037141, 0xdc103704, 0x05c50370, 0x415c1037,
+ 0x041dc031, 0x00000000, 0x00000000, 0x00454405, 0x71015c40, 0x571015c4,
+ 0x0571005c, 0x40571815, 0xc4057101, 0x5c405710, 0x05c40571, 0x015c4057,
+ 0x1015c405, 0x71015c40, 0x571015c4, 0x0571015c, 0x60571814, 0xc4057181,
+ 0x5c400710, 0x1dc40571, 0x015c4017, 0x101dc011, 0x50000000, 0x00000000,
+ 0x00840601, 0x20804820, 0x12080482, 0x01208048, 0x20120804, 0x82012180,
+ 0x48201208, 0x04820120, 0x80482012, 0x08048201, 0x20804820, 0x12080486,
+ 0x01208048, 0x60120800, 0x82012080, 0x48201208, 0x04860120, 0x80482012,
+ 0x08048020, 0x00000000, 0x00000000, 0x00800001, 0x60005800, 0x16001580,
+ 0x01600058, 0x00161005, 0x80016000, 0x58001610, 0x05800161, 0x80180016,
+ 0x10058401, 0x61005840, 0x06000582, 0x01618058, 0x00161005, 0x84016100,
+ 0x58001700, 0x05800160, 0x01580016, 0x00058020, 0x00000000, 0x00000000,
+ 0x00c54805, 0x32015c80, 0x572015c8, 0x0572015c, 0x80572015, 0xc8057201,
+ 0x54905728, 0x15c80572, 0x011c8047, 0x2015c805, 0x72811c80, 0x572015c8,
+ 0x0572015c, 0x80572015, 0xc8047200, 0x1c801720, 0x15c80572, 0x015c8007,
+ 0x2015c011, 0x50000000, 0x00000000, 0x00c54840, 0x20001800, 0x06000180,
+ 0x00600018, 0x00060001, 0x84006080, 0x18000600, 0x01800060, 0x00180006,
+ 0x00018000, 0x60001800, 0x06000180, 0x00600018, 0x00060001, 0x82006000,
+ 0x18004600, 0x01800060, 0x00180046, 0x00018031, 0x00000000, 0x00000000,
+ 0x00c54004, 0x62010800, 0x42001088, 0x04220108, 0x80422010, 0x88042201,
+ 0x08c04220, 0x10880422, 0x01088042, 0x30108a04, 0x234108c0, 0x42201088,
+ 0x04220108, 0x80422010, 0x88042200, 0x08004200, 0x108a0420, 0x01080042,
+ 0x20108031, 0x00000000, 0x00000000, 0x00454a05, 0x52c150b0, 0x5408450e,
+ 0x05428150, 0xa0443811, 0x0e054381, 0x50a05438, 0x150a0543, 0x8151a054,
+ 0x28150a05, 0x428150a0, 0x5428150a, 0x05428151, 0xe0542815, 0x1e0542c1,
+ 0x1020540c, 0x051e0544, 0xc0502054, 0x28050011, 0x50000000, 0x00000000,
+ 0x00801c01, 0x570045c0, 0x1170055e, 0x01530055, 0xc0157805, 0x5c015780,
+ 0x55c01570, 0x054c0153, 0x8054c015, 0x70055c01, 0x530055c0, 0x1530054c,
+ 0x01530055, 0xc0153005, 0x5c015300, 0x45d01030, 0x045c0157, 0x0045c010,
+ 0x70040020, 0x00000000, 0x00000000, 0x00802000, 0x40000480, 0x01300104,
+ 0x00400010, 0x40041001, 0x04004100, 0x10400418, 0x01000041, 0x00100004,
+ 0x18010000, 0x41001060, 0x04000100, 0x00400010, 0x61040001, 0x06004000,
+ 0x04000000, 0x10460040, 0x01040000, 0x00000120, 0x00000000, 0x00000000,
+ 0x00456802, 0x08008680, 0x21800820, 0x02080002, 0x00208008, 0x20020800,
+ 0x82002080, 0x00200208, 0x00820020, 0x80082002, 0x08008200, 0x20800820,
+ 0x22080082, 0x00208008, 0x20220808, 0x86106080, 0x08602208, 0x00860060,
+ 0x80080111, 0x50000000, 0x00000000, 0x00c55005, 0x64015900, 0x56401d90,
+ 0x05600159, 0x00564015, 0x90056401, 0x59005640, 0x15800560, 0x01590056,
+ 0x40159005, 0x60015900, 0x56000580, 0x05600159, 0x00560005, 0x90056000,
+ 0x59005200, 0x15900564, 0x01590056, 0x40148031, 0x00000000, 0x00000000,
+ 0x00c54003, 0x6000d800, 0x16200580, 0x036000d8, 0x0036000d, 0x80136000,
+ 0xd8003600, 0x0d800760, 0x00d80016, 0x000d8003, 0x6000d800, 0x36000d80,
+ 0x036000d8, 0x0036000d, 0x80176000, 0xd8003600, 0x05800360, 0x00580036,
+ 0x001d8031, 0x00000000, 0x00000000, 0x00454204, 0x30810c20, 0x430810c2,
+ 0x0430810c, 0x20430810, 0xc2043081, 0x0c204308, 0x10c20430, 0x810c2003,
+ 0x0810c204, 0x30810c20, 0x430810c2, 0x0430810c, 0x02430810, 0xc0243081,
+ 0x0c20030c, 0x18c02430, 0x818c2003, 0x0810c011, 0x50000000, 0x00000000,
+ 0x00040000, 0x30000c00, 0x030000c0, 0x0030000c, 0x00030000, 0xc0003000,
+ 0x0c000300, 0x00c00030, 0x000c0443, 0x0000c000, 0x30000c00, 0x030000c0,
+ 0x0030000c, 0x04030000, 0xc0403000, 0x0c800320, 0x00c04032, 0x100c8003,
+ 0x0000c000, 0x00000000, 0x00000000, 0x00800201, 0x30804c20, 0x130c14c2,
+ 0x0130804c, 0x20130804, 0xc2013080, 0x4c201308, 0x04c20130, 0x804c2013,
+ 0x0804c201, 0x30804c20, 0x130804c2, 0x0130804c, 0x20130804, 0xc2053080,
+ 0x4cb01328, 0x04c20132, 0xc04cb013, 0x0814c020, 0x00000000, 0x00000000,
+ 0x00454205, 0x60815820, 0x56081582, 0x05608118, 0x20560815, 0x82056081,
+ 0x58205608, 0x15820160, 0x81582246, 0x08118205, 0x60815820, 0x56081582,
+ 0x05608158, 0x20460815, 0x82016081, 0x5830120c, 0x15c20560, 0xc15c3012,
+ 0x08158011, 0x50000000, 0x00000000, 0x00c54200, 0x20800820, 0x020800c2,
+ 0x00208008, 0x20020800, 0x82002080, 0x08200208, 0x00820020, 0x80082002,
+ 0x08008200, 0x20800820, 0x02080002, 0x00208008, 0x20020800, 0x82002080,
+ 0x08204208, 0x01820020, 0x80182042, 0x08008031, 0x00000000, 0x00000000,
+ 0x00454204, 0x64811920, 0x464c10d2, 0x04608119, 0x20464811, 0x92046481,
+ 0x19204648, 0x11820064, 0x81182046, 0x48118204, 0x64811920, 0x46481182,
+ 0x04608119, 0x20464811, 0x92006481, 0x19204248, 0x10920464, 0x81092042,
+ 0x48118011, 0x00000000, 0x00000000, 0x00c56005, 0x58015600, 0x55800460,
+ 0x05580156, 0x00558015, 0x60055801, 0x56005580, 0x15600158, 0x01560055,
+ 0x80156005, 0x58015600, 0x55801560, 0x05580156, 0x00558015, 0x60015801,
+ 0x16005080, 0x04600558, 0x00460050, 0x80054011, 0x50000000, 0x00000000,
+ 0x00000601, 0x71805060, 0x14180506, 0x01418050, 0x60141805, 0x06014180,
+ 0x50601418, 0x05060541, 0x80506014, 0x18050601, 0x41805060, 0x14180506,
+ 0x01418050, 0x60141805, 0x06014180, 0x50601418, 0x05060141, 0x80506014,
+ 0x18050000, 0x00000000, 0x00000000, 0x00000200, 0x04804120, 0x10480412,
+ 0x01008041, 0x20104804, 0x12010484, 0x41201048, 0x04020104, 0x80402010,
+ 0x48040201, 0x04844120, 0x10480402, 0x01008041, 0x20104804, 0x12010480,
+ 0x41201048, 0x14120104, 0x81412010, 0x48040000, 0x00000000, 0x00000000,
+ 0x00c54602, 0x1180d460, 0x35180d46, 0x035180c4, 0x6035180d, 0x46035180,
+ 0xd4603518, 0x0d460351, 0x80d46015, 0x180d4603, 0x5180d460, 0x35180d42,
+ 0x035180d5, 0x6035180d, 0x52035080, 0xd4607518, 0x0d520351, 0x80d46075,
+ 0x180d4031, 0x50000000, 0x00000000, 0x00454605, 0x71815c60, 0x77181dc6,
+ 0x0571814c, 0x60171815, 0xc6057181, 0x5c604718, 0x15c60571, 0x815c6047,
+ 0x1815c605, 0x71815c60, 0x171815c6, 0x0471815c, 0x60571815, 0xc6057182,
+ 0x5c605718, 0x11c60571, 0x811c6057, 0x1815c011, 0x00000000, 0x00000000,
+ 0x00414603, 0x7180dc60, 0x371805c6, 0x037180dc, 0x6077181d, 0xc6037180,
+ 0xdc603718, 0x0dc60371, 0x80dc6037, 0x180dc603, 0x7180dc60, 0x371809c6,
+ 0x037180dc, 0x6037180d, 0xc6027180, 0x9c603718, 0x05c60371, 0x804c6037,
+ 0x180dc011, 0x00000000, 0x00000000, 0x00454605, 0x71815c60, 0x571850c6,
+ 0x0571815c, 0x6077181d, 0xc6057181, 0x5c605718, 0x15c60571, 0x815c6057,
+ 0x1815c605, 0x71815c60, 0x571815c6, 0x0571815c, 0x60571815, 0xc6057181,
+ 0x5c600718, 0x18c60571, 0x818c6003, 0x1815c011, 0x50000000, 0x00000000,
+ 0x00004201, 0x20804820, 0x120805c2, 0x01208048, 0x20120804, 0x82012080,
+ 0x48201208, 0x04820120, 0x80482012, 0x08048201, 0x20804820, 0x12080482,
+ 0x01208048, 0x20120804, 0x82012080, 0x48201208, 0x05820120, 0x80482002,
+ 0x08048000, 0x00000000, 0x00000000, 0x00000601, 0x61845860, 0x16181586,
+ 0x01618058, 0x60161805, 0x86016180, 0x58601618, 0x05860161, 0x80586006,
+ 0x18058601, 0x61805860, 0x16180586, 0x01618058, 0x60161805, 0x86016180,
+ 0x58601218, 0x00860161, 0x80486012, 0x18058000, 0x00000000, 0x00000000,
+ 0x00454005, 0x30015c00, 0x570015c0, 0x0570015c, 0x00170005, 0xc0057001,
+ 0x5c005700, 0x15c00570, 0x015c0057, 0x0015c005, 0x70015c00, 0x570015c0,
+ 0x0570015c, 0x00570015, 0xc0057001, 0x1c001300, 0x15c00570, 0x011c0013,
+ 0x0014c011, 0x50000000, 0x00000000, 0x00454200, 0x20801820, 0x06080182,
+ 0x00608018, 0x20060801, 0x82006080, 0x18200608, 0x01820060, 0x80182006,
+ 0x08018200, 0x60801820, 0x06080182, 0x00608018, 0x20060801, 0x82006080,
+ 0x18204008, 0x01820060, 0x80182042, 0x08008011, 0x00000000, 0x00000000,
+ 0x00454204, 0x60810820, 0x42081082, 0x04208108, 0x20020800, 0x82042081,
+ 0x08204208, 0x10820420, 0x81082042, 0x08108204, 0x20810820, 0x42081082,
+ 0x04208108, 0x20420810, 0x82042081, 0x08204608, 0x10820420, 0x81082046,
+ 0x28118011, 0x00000000, 0x00000000, 0x00454305, 0x50811020, 0x54080502,
+ 0x05408150, 0x20140805, 0x02054081, 0x50205408, 0x15020540, 0x81502044,
+ 0x08150205, 0x40815020, 0x54081502, 0x05408150, 0x20540815, 0x02054081,
+ 0x10305508, 0x05020440, 0x80503055, 0x0c154011, 0x50000000, 0x00000000,
+ 0x00000301, 0x50c05420, 0x150c0543, 0x0150c014, 0x30150c05, 0x430150c0,
+ 0x5430150c, 0x05430150, 0xc0543015, 0x0c054301, 0x50c05430, 0x150c0543,
+ 0x0150c054, 0x30150c05, 0x43015080, 0x54201508, 0x05430150, 0x80542015,
+ 0x28054000, 0x00000000, 0x00000000, 0x00000000, 0x42001080, 0x04204108,
+ 0x10420010, 0x80042001, 0x08004200, 0x10800420, 0x01080042, 0x0010c004,
+ 0x20010800, 0x42001080, 0x04200108, 0x00420010, 0x80042001, 0x08004200,
+ 0x18000420, 0x11080042, 0x01100006, 0x00010000, 0x00000000, 0x00000000,
+ 0x00454c02, 0x00c08020, 0x20080802, 0x02008080, 0x20200808, 0x02020080,
+ 0x80202008, 0x08020200, 0x80800020, 0x08080202, 0x00808020, 0x20080802,
+ 0x02008080, 0x00200808, 0x00020080, 0x80206008, 0x08000200, 0x00802060,
+ 0x08080011, 0x50000000, 0x00000000, 0x00454001, 0x60025800, 0x56001d80,
+ 0x05600158, 0x00560015, 0x80056001, 0x58005600, 0x15800560, 0x01580056,
+ 0x00158005, 0x60015800, 0x56001580, 0x05600158, 0x00560015, 0x80056001,
+ 0x58005600, 0x15800560, 0x01580056, 0x00158011, 0x00000000, 0x00000000,
+ 0x00c54003, 0x6000d800, 0x360005c0, 0x03600058, 0x0036000d, 0x80036000,
+ 0xd8003600, 0x4d800360, 0x00d80076, 0x00058003, 0x6000d800, 0x76000d80,
+ 0x036000d8, 0x0016000d, 0x80036000, 0xd8003200, 0x04800360, 0x00480032,
+ 0x000d8000, 0x00000000, 0x00000000, 0x00000004, 0x30010c00, 0x43001180,
+ 0x0430000c, 0x00430010, 0xc0043001, 0x0c004300, 0x50c00430, 0x010c0043,
+ 0x00008004, 0x30010c00, 0x430010d0, 0x0430010c, 0x00030010, 0xd0043405,
+ 0x0c000200, 0x18900430, 0x01880002, 0x0010c000, 0x00000000, 0x00000000,
+ 0x00001000, 0x31000d40, 0x03400080, 0x0034000c, 0x00035000, 0xc4003580,
+ 0x0c400350, 0x00c00034, 0x000c0003, 0x5000d400, 0x34000d40, 0x030000d0,
+ 0x0034000d, 0x40034000, 0xd4003400, 0x0d000240, 0x00940035, 0x00090002,
+ 0x0000c000, 0x00000000, 0x00000000, 0x00000500, 0x31804c60, 0x131414c5,
+ 0x0131404c, 0x50131404, 0xc5013140, 0x4c501314, 0x04c50131, 0x404c7053,
+ 0x14048501, 0x31404c70, 0x131404c5, 0x0131404c, 0x70131404, 0xc5013100,
+ 0x4c401310, 0x04850131, 0x80484012, 0x1004c000, 0x00000000, 0x00000000,
+ 0x00002305, 0x69c11a30, 0x568c15a3, 0x0568c15a, 0x30568c15, 0xa70568c1,
+ 0x5a70569c, 0x15a30568, 0xc11a1016, 0x9c14a305, 0x68c15a30, 0x168c15a3,
+ 0x0568c15a, 0x30568c15, 0xa30568c1, 0x5a30168c, 0x15a30569, 0xc11a3016,
+ 0x8c158000, 0x00000000, 0x00000000, 0x00001800, 0x20000940, 0x02400080,
+ 0x00240008, 0x00024000, 0x81002500, 0x08000240, 0x00800024, 0x00080002,
+ 0x40009500, 0x24000940, 0x02000090, 0x00240009, 0x40024000, 0x94002400,
+ 0x09004240, 0x00950024, 0x00090042, 0x00008000, 0x00000000, 0x00000000,
+ 0x00000044, 0x62011880, 0x46201188, 0x04621118, 0x80462011, 0x88046201,
+ 0x18c04630, 0x11884462, 0x11188006, 0x30108804, 0x62111880, 0x06211188,
+ 0x44621118, 0x80462111, 0x8c046211, 0x18044621, 0x11880462, 0x01180446,
+ 0x01118000, 0x00000000, 0x00000000, 0x00000045, 0x50115404, 0x55000540,
+ 0x05501154, 0x00550015, 0x40055001, 0x54005500, 0x15404550, 0x01540415,
+ 0x00154045, 0x50015401, 0x15001540, 0x45501514, 0x00550015, 0x40045011,
+ 0x14045501, 0x05400450, 0x10540455, 0x01154000, 0x00000000, 0x00000000,
+ 0x00000801, 0x42085080, 0x14208508, 0x21420050, 0x82142005, 0x08214200,
+ 0x50821420, 0x05082142, 0x00508214, 0x20010801, 0x42005080, 0x54208508,
+ 0x01420010, 0x80142005, 0x08004200, 0x50821520, 0x85080142, 0x08508215,
+ 0x20854000, 0x00000000, 0x00000000, 0x00000a01, 0x028040a0, 0x1028040a,
+ 0x01028140, 0xa0102804, 0x0a010280, 0x40a01028, 0x440a0102, 0x8040a010,
+ 0x28140a01, 0x028040a0, 0x1028040a, 0x01028040, 0xa0502804, 0x0a010280,
+ 0x40a01028, 0x140a0102, 0xc140b010, 0x28000000, 0x00000000, 0x00000000,
+ 0x00000c02, 0x0300d4c0, 0x35300d4c, 0x03530054, 0xc035300d, 0x4c035300,
+ 0xd4c03530, 0x0d4c0353, 0x00d4c035, 0x30054c03, 0x5300d4c0, 0x35300d4c,
+ 0x035300d4, 0xc015300d, 0x4c035300, 0xd4c06030, 0x0d4c0353, 0x00d4c065,
+ 0x30084000, 0x00000000, 0x00000000, 0x00000905, 0x72015c80, 0x57201dc8,
+ 0x0572015c, 0x80572015, 0xc8097201, 0x5c805720, 0x15c80172, 0x015c8057,
+ 0x2011c804, 0x72015c80, 0x572015c8, 0x0572015c, 0x80572015, 0xc8057201,
+ 0x5c805720, 0x11c80572, 0x415c9057, 0x2015c000, 0x00000000, 0x00000000,
+ 0x00000b52, 0x42d290b4, 0x242d090b, 0x4a4ad490, 0xb4a42d09, 0x0b4a42d0,
+ 0x90b4a42d, 0x092b5a4a, 0xd090b5a4, 0x2d090b52, 0x4ad090b4, 0x24ad292b,
+ 0x524ad490, 0xb424ad09, 0x0b424ad0, 0x90b424ad, 0x090b4242, 0xd090b424,
+ 0x2d290000, 0x00000000, 0x00000000, 0x00003bfe, 0x4edfd3b7, 0xe4edf93b,
+ 0x7f4fff93, 0xb7f4edf9, 0x3b7f4edf, 0x93b7f4ed, 0xf93fff4f, 0xdf93bff4,
+ 0xedf93bfe, 0x4fdf93b7, 0xe4fdfd3f, 0xfe4fff93, 0xb7e4fdf9, 0x3b7e4fdf,
+ 0x93b7e4fd, 0xf93b7e4e, 0xdf93b7e4, 0xedfd0000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x0000249f, 0x4fa643e9, 0xf4ffe43f,
+ 0xf90927d3, 0xff90fffd, 0x3ff90fff, 0xd3ff90ff, 0xfd249909, 0x7fd3e990,
+ 0xfffd3e9f, 0x497fd3ff, 0xf497e424, 0x9f4927d3, 0xfff497fd, 0x3fff4927,
+ 0xd2499092, 0x643fff4f, 0xa6424990, 0x92640000, 0x00000000, 0x00000000,
+ 0x00003b7f, 0x4fdf93f7, 0xf4fff93f, 0xfe4edfd3, 0xffe4fffd, 0x3ffe4fff,
+ 0xd3ffe4ff, 0xfd3b7e4e, 0xffd3f7e4, 0xfffd3f7f, 0x4effd3ff, 0xf4eff93b,
+ 0x7f4edfd3, 0xfff4effd, 0x3fff4edf, 0xd3b7e4ed, 0xf93fff4f, 0xdf93b7e4,
+ 0xedf90000, 0x00000000, 0x00000000, 0x0000237e, 0x4ec793b1, 0xe4ede13b,
+ 0x7e4edf93, 0xb7e4edf9, 0x3b7e4edf, 0x93b7e4ed, 0xf93b7e4e, 0xdf93f7e4,
+ 0xedf93b7e, 0x4edf93b7, 0xe4edf93b, 0x7f4edf93, 0xffe4edf9, 0x3fff4ec7,
+ 0xd23184ec, 0x613fff4f, 0xc6123184, 0x8c790000, 0x00000000, 0x00000000,
+ 0x00000120, 0x71409c52, 0x671409c0, 0x2271409c, 0x08270201, 0xc1447040,
+ 0x9c100704, 0x01c10070, 0x201c1027, 0x0409c102, 0x71409c10, 0x271419c5,
+ 0x0270411c, 0x50271409, 0xc7027041, 0x1c102704, 0x09c50270, 0x409c5027,
+ 0x0401c000, 0x00000000, 0x00000000, 0x00000405, 0x71810c44, 0x421010c4,
+ 0x8571010c, 0x48571205, 0xc4817101, 0x5c401710, 0x15c40171, 0x215c4057,
+ 0x1415c405, 0x71815c40, 0x571010c4, 0x0571015c, 0x60571015, 0xc4057101,
+ 0x5c405710, 0x15c40571, 0x015c4057, 0x1015c000, 0x00000000, 0x00000000,
+ 0x00000301, 0x20905c74, 0x120885c2, 0x0121885c, 0x28120814, 0x83812080,
+ 0x48205208, 0x04820520, 0x80482012, 0x08048201, 0x20804820, 0x121805c6,
+ 0x01208048, 0x20120804, 0x86012080, 0x48201208, 0x04860120, 0x80486012,
+ 0x08048000, 0x00000000, 0x00000000, 0x00000004, 0x61281806, 0x07108180,
+ 0x00600818, 0x00060001, 0x80006000, 0x18000600, 0x11800060, 0x01180006,
+ 0x00018000, 0x41001800, 0x060a8180, 0x00600118, 0x40061001, 0x80006000,
+ 0x18000600, 0x01820060, 0x00182006, 0x00118000, 0x00000000, 0x00000000,
+ 0x00000944, 0x72090ca4, 0x072811c8, 0x4472810c, 0x84472111, 0xc8407201,
+ 0x1c824320, 0x90880432, 0x111c8043, 0x20114804, 0x52011c80, 0x472001c8,
+ 0x0472001c, 0x80472811, 0xc8047201, 0x1c904720, 0x11c80472, 0x011c8047,
+ 0x2011c000, 0x00000000, 0x00000000, 0x00000000, 0x60500800, 0x06000180,
+ 0x00601008, 0x00060001, 0x80006040, 0x18040201, 0x00804020, 0x00100402,
+ 0x04018000, 0x60001800, 0x06001182, 0x00600018, 0x00060001, 0x80006000,
+ 0x18800600, 0x01800060, 0x00180006, 0x00018000, 0x00000000, 0x00000000,
+ 0x00001404, 0x26011980, 0x0260108c, 0x04260118, 0xc0423010, 0x8c002201,
+ 0x08804640, 0x108c0465, 0x01088046, 0x00108804, 0x274108c0, 0x42601098,
+ 0x04240009, 0x00426010, 0x90042401, 0x08404220, 0x10900422, 0x01090042,
+ 0x60108000, 0x00000000, 0x00000000, 0x00002200, 0x4a8116e0, 0x44a8112a,
+ 0x044a8116, 0xa044a811, 0x2a044a81, 0x12b0458a, 0x002a8458, 0x8012a145,
+ 0xac112a04, 0x4a8112a0, 0x44a8112a, 0x04488412, 0xb044a811, 0x2b044881,
+ 0x12a044a8, 0x112a044a, 0x8112b044, 0x88010000, 0x00000000, 0x00000000,
+ 0x08c00d00, 0x5b0006c0, 0x05b0014c, 0x005b0014, 0xc0053801, 0x4c005300,
+ 0x04c80132, 0x014c8053, 0x0014c005, 0x14014c00, 0x530014c0, 0x05b0014c,
+ 0x00530014, 0xc0013001, 0x4c001300, 0x14c00530, 0x014c0003, 0x0014c001,
+ 0x30014000, 0x00000000, 0x00000000, 0x00c01c00, 0x44000560, 0x04400106,
+ 0x00440010, 0x60041001, 0x06004000, 0x04000160, 0x01068047, 0x80100404,
+ 0x00010000, 0x45001060, 0x04400110, 0x00460011, 0x81014001, 0x18001600,
+ 0x10400400, 0x01180000, 0x00118001, 0x40010030, 0x00000000, 0x00000000,
+ 0x08c04002, 0x04088502, 0x20408801, 0x02040880, 0x10200400, 0x00000000,
+ 0x84000100, 0x08000000, 0x40800020, 0x24480002, 0x00008000, 0x20000800,
+ 0x02000080, 0x80210008, 0x08021000, 0x80802000, 0x08080200, 0x00808021,
+ 0x20080030, 0x00000000, 0x00000000, 0x08c04006, 0x60011800, 0x06001180,
+ 0x04600118, 0x00460011, 0x80066001, 0x18004600, 0x19800460, 0x00980046,
+ 0x00018004, 0x60011800, 0x46000180, 0x04600198, 0x00460011, 0x80046001,
+ 0x98004600, 0x11800420, 0x01180046, 0x00198030, 0x00000000, 0x00000000,
+ 0x10014800, 0x60009c00, 0x220009c0, 0x0260009c, 0x00260009, 0x80026000,
+ 0x98002620, 0x01800262, 0x01180066, 0x00098002, 0x60009800, 0x660019c0,
+ 0x02620118, 0x00260009, 0x80026200, 0x18002600, 0x09800260, 0x00980026,
+ 0x20018200, 0x00000000, 0x00000000, 0x40454224, 0x34811922, 0x42481182,
+ 0x24348118, 0x22430890, 0x42243081, 0x04304308, 0x10c30430, 0x890c3043,
+ 0x0810c204, 0x30810c20, 0x43481182, 0x0430810c, 0x20430810, 0xc2043081,
+ 0x0c204308, 0x10c20430, 0x810c2043, 0x0810c011, 0x50000000, 0x00000000,
+ 0x40000000, 0x30100800, 0x02000080, 0x00300008, 0x00030000, 0xc0003000,
+ 0x04040301, 0x00c04030, 0x000c0403, 0x0000c000, 0x30000c00, 0x03000080,
+ 0x0030000c, 0x00030000, 0xc0003000, 0x0c000300, 0x00c00030, 0x000c0003,
+ 0x0000c000, 0x00000000, 0x00000000, 0x40000304, 0x30800c20, 0x020800c2,
+ 0x0030800c, 0x20030800, 0xc2003080, 0x0c300308, 0x10c30030, 0xc00c3001,
+ 0x0800c200, 0x30800c20, 0x030800c2, 0x0030c00c, 0x20030800, 0xc20030c1,
+ 0x0c200308, 0x00c20030, 0x800c2003, 0x0c10c000, 0x00000000, 0x00000000,
+ 0x40454204, 0x64c11920, 0x46481182, 0x04648118, 0x20460811, 0x82046081,
+ 0x18204608, 0x11820460, 0xc1182004, 0x08118204, 0x60811820, 0x06480182,
+ 0x0460c118, 0x20460811, 0x820460c1, 0x18204608, 0x11820460, 0x81182046,
+ 0x0c118011, 0x50000000, 0x00000000, 0x40014200, 0x30800820, 0x02080082,
+ 0x00208008, 0x20020800, 0x82002080, 0x08200208, 0x00c20020, 0x80042002,
+ 0x08008200, 0x20800820, 0x02080082, 0x0020800c, 0x20020800, 0x82002080,
+ 0x0c200208, 0x00820020, 0x80082002, 0x0800c000, 0x00000000, 0x00000000,
+ 0x50014304, 0x30c11820, 0x46081182, 0x04608118, 0x20460811, 0x82046081,
+ 0x1820460c, 0x10c20460, 0x810c2006, 0x08118204, 0x60811820, 0x06080182,
+ 0x0460810c, 0x20460811, 0x82046081, 0x0c204608, 0x11820460, 0x81182046,
+ 0x0810c000, 0x00000000, 0x00000000, 0x40455000, 0x10011500, 0x45001150,
+ 0x04500115, 0x00454011, 0x50045001, 0x14004500, 0x00400454, 0x01040005,
+ 0x00114004, 0x50011400, 0x05000140, 0x04500104, 0x00450011, 0x40045000,
+ 0x04004500, 0x11400450, 0x01140045, 0x00004211, 0x50000000, 0x00000000,
+ 0x48000600, 0x41801460, 0x04180106, 0x00418014, 0x60041801, 0x06004180,
+ 0x10600518, 0x00060051, 0x80106045, 0x18010600, 0x41801060, 0x44181106,
+ 0x00418010, 0x60041801, 0x06004180, 0x10600418, 0x01060041, 0x80106004,
+ 0x18010000, 0x00000000, 0x00000000, 0x48000001, 0x00c00000, 0x10080400,
+ 0x01008000, 0x00100004, 0x00010080, 0x40200008, 0x44020000, 0x00402010,
+ 0x08440200, 0x00804020, 0x10080402, 0x01008040, 0x20100804, 0x02010080,
+ 0x40201008, 0x04020100, 0x80402010, 0x08040000, 0x00000000, 0x00000000,
+ 0x40455603, 0x51008540, 0x35100d56, 0x03510085, 0x6035580d, 0x56035180,
+ 0xd4602118, 0x08460215, 0x80d46020, 0x180d4603, 0x1180d460, 0x35100d46,
+ 0x035180d4, 0x6035180d, 0x46035180, 0xd4603518, 0x0d460351, 0x80d46035,
+ 0x180d4011, 0x50000000, 0x00000000, 0x00014606, 0x71811c60, 0x471811c6,
+ 0x0471811c, 0x60471821, 0xc6007181, 0x1c604718, 0x1d860071, 0x809c6047,
+ 0x1801c605, 0x71811c60, 0x471811c6, 0x0471819c, 0x60471811, 0xc6047181,
+ 0x9c604718, 0x11c60471, 0x811c6047, 0x1819c000, 0x00000000, 0x00000000,
+ 0x40004600, 0x71809c60, 0x271809c6, 0x0271809c, 0x60071809, 0xc6007181,
+ 0x1c602718, 0x01c60271, 0x80586127, 0x1809c602, 0x71809c60, 0x271819c6,
+ 0x0271811c, 0x60271801, 0xc6027181, 0x1c602718, 0x09c60271, 0x809c6027,
+ 0x1801c000, 0x00000000, 0x00000000, 0x50055604, 0x31815d60, 0x571815d6,
+ 0x0571815d, 0x60175815, 0xd6017180, 0x5c605718, 0x50c60175, 0x810c6057,
+ 0x1815c605, 0x71815c60, 0x571815c6, 0x0571810c, 0x60571805, 0xc6057181,
+ 0x0c615718, 0x15c60571, 0x815c6057, 0x1810c211, 0x50000000, 0x00000000,
+ 0x40001201, 0x74004920, 0x120c0492, 0x0120c049, 0x20124804, 0x92052481,
+ 0x49001000, 0x05d00124, 0x804c0012, 0x08048201, 0x04804920, 0x12080482,
+ 0x0120805d, 0x20120804, 0x92012080, 0x5d201208, 0x04920120, 0x80492012,
+ 0x0805c000, 0x00000000, 0x00000000, 0x40002604, 0x61801a60, 0x061801a6,
+ 0x0061801a, 0x60069801, 0xa6006180, 0x18600618, 0x11860069, 0x81186006,
+ 0x18010600, 0x61801860, 0x06180186, 0x00618018, 0x60061801, 0x86006181,
+ 0x18600618, 0x01860061, 0x80186006, 0x18118000, 0x00000000, 0x00000000,
+ 0x00456004, 0x78211e00, 0x438011e0, 0x0438010a, 0x00438011, 0xe0043800,
+ 0x1e004780, 0x11e00478, 0x011e0847, 0x8010e004, 0x78011e00, 0x478001e0,
+ 0x0478001e, 0x00478011, 0xe0047800, 0x1e004380, 0x11e00438, 0x011e0047,
+ 0x8011c011, 0x50000000, 0x00000000, 0x40015200, 0x64a01930, 0x02080193,
+ 0x0020c009, 0x30024801, 0x93002480, 0x1928060a, 0x01928064, 0x80102806,
+ 0x0c000200, 0x64801920, 0x06080182, 0x00608019, 0x20060801, 0x92006080,
+ 0x19200208, 0x01920020, 0x80192006, 0x08018000, 0x00000000, 0x00000000,
+ 0x40014204, 0x20a10820, 0x42081082, 0x04608108, 0x20460810, 0x82046080,
+ 0x08284208, 0x10828420, 0x81082042, 0x08118204, 0x20810820, 0x42080082,
+ 0x04208008, 0x20420810, 0x82042080, 0x08204608, 0x108a0460, 0x81082042,
+ 0x08108000, 0x00000000, 0x00000000, 0x40414200, 0x40811020, 0x40081102,
+ 0x04508100, 0x20450811, 0x02045080, 0x10204408, 0x81022440, 0x80102144,
+ 0x08114204, 0x40811021, 0x44081102, 0x04408010, 0x20440811, 0x02044080,
+ 0x10304508, 0x11030450, 0x81102044, 0x08010011, 0x50000000, 0x00000000,
+ 0x40004300, 0x10801430, 0x010c0143, 0x0010c014, 0x30010c00, 0x43001081,
+ 0x1432050c, 0x01430050, 0xc0043005, 0x0c014300, 0x50c01430, 0x050c0143,
+ 0x0052c114, 0x20050c01, 0x420050c0, 0x1430050c, 0x014a0050, 0xc0142005,
+ 0x0c014000, 0x00000000, 0x00000000, 0x40000800, 0x12101000, 0x01200100,
+ 0x00100010, 0x00012000, 0x40001200, 0x10840421, 0x41084042, 0x00048404,
+ 0x00010810, 0x42001080, 0x04200108, 0x00420010, 0x80042001, 0x08004200,
+ 0x10000420, 0x01000042, 0x00108004, 0x20010000, 0x00000000, 0x00000000,
+ 0x40454222, 0x10a080aa, 0x2109080a, 0x22120080, 0xa2010888, 0x4a201080,
+ 0x00302008, 0x08020000, 0x88842020, 0x28080202, 0x00808020, 0x200a0802,
+ 0x02008080, 0x20200800, 0x02020080, 0x80a02008, 0x08020200, 0x80802020,
+ 0x08080011, 0x50000000, 0x00000000, 0x40014086, 0x60111804, 0x46010180,
+ 0x84601118, 0x08660211, 0x80046001, 0x18004600, 0x19800460, 0x20980046,
+ 0x00018004, 0x60011800, 0x46010180, 0x04600198, 0x00460019, 0x80046001,
+ 0x98004600, 0x11800460, 0x01180046, 0x00198000, 0x00000000, 0x00000000,
+ 0x400140a0, 0x74109908, 0x26010990, 0x80640099, 0x0a060209, 0x90826000,
+ 0x99000640, 0x01d00260, 0x201d0026, 0x40018002, 0x60009800, 0x26010990,
+ 0x0260001c, 0x01660009, 0x80026000, 0x1d002600, 0x09900660, 0x00980026,
+ 0x0001c000, 0x00000000, 0x00000000, 0x40456004, 0x68090e0a, 0x438090e0,
+ 0x0038090e, 0x00038210, 0xe0843801, 0x0e000380, 0x11a00438, 0x211a0043,
+ 0x8010e004, 0x38010e00, 0x438090e0, 0x0438011a, 0x00438010, 0xe0043801,
+ 0x1a004380, 0x10e00638, 0x010e0043, 0x80118011, 0x50000000, 0x00000000,
+ 0x50000100, 0x29c00c10, 0x030400c1, 0x2438400c, 0x10430400, 0xc1003040,
+ 0x0e544395, 0x00a58030, 0x400a7003, 0x0400c100, 0x10400c10, 0x030400c5,
+ 0x40304008, 0x10030400, 0xc1003040, 0x08100304, 0x00c10030, 0x400c1003,
+ 0x04008000, 0x00000000, 0x00000000, 0x40000504, 0x35000d50, 0x031400d5,
+ 0x0035480d, 0x50031400, 0xd5003100, 0x0d600354, 0x10d70031, 0x410d5003,
+ 0x5400c500, 0x31400c50, 0x031400d5, 0x0031410c, 0x40031400, 0xc4003141,
+ 0x0d500314, 0x00d40031, 0x400c4003, 0x1410c200, 0x10000000, 0x00000000,
+ 0x40454304, 0x64811830, 0x47081183, 0x04608118, 0x30460c11, 0x830460c1,
+ 0x1970465c, 0x11970460, 0xc1193046, 0x0c118304, 0x60c11830, 0x46081187,
+ 0x0460c118, 0x30060c11, 0x830460c1, 0x1830460c, 0x11830460, 0xc1183046,
+ 0x0c118011, 0x40000000, 0x00000000, 0x40014000, 0x21000c80, 0x060000c8,
+ 0x0022000c, 0x80020000, 0x88002000, 0x08000200, 0x00800020, 0x00084002,
+ 0x20008000, 0x20000800, 0x020000c0, 0x00200008, 0x00020000, 0x80002000,
+ 0x08800200, 0x00800020, 0x00080002, 0x00008000, 0x00000000, 0x00000000,
+ 0x40014844, 0x62190c14, 0x422110c0, 0x4460110c, 0x04462111, 0x80446211,
+ 0x18844621, 0x11884462, 0x11188446, 0x01118844, 0x62111884, 0x462110c8,
+ 0x44601118, 0x84062111, 0x88446211, 0x18044621, 0x11804462, 0x11188446,
+ 0x21118000, 0x00000000, 0x00000000, 0x40454040, 0x54110404, 0x41011040,
+ 0x44501104, 0x04450111, 0x40445011, 0x15044545, 0x01500450, 0x10150645,
+ 0x01114044, 0x50111400, 0x45011044, 0x44501414, 0x04450111, 0x40c45010,
+ 0x14044501, 0x11404050, 0x11140c45, 0x01014011, 0x50000000, 0x00000000,
+ 0x40000820, 0x4208108a, 0x05228108, 0x20520810, 0x82052081, 0x08205208,
+ 0x10820420, 0x81082042, 0x08108204, 0x20814820, 0x42001082, 0x04208108,
+ 0x00420810, 0x82042001, 0x08204208, 0x10820520, 0x81086052, 0x08108204,
+ 0x20810000, 0x00000000, 0x00000000, 0x00000a01, 0x028840a0, 0x0028040a,
+ 0x0002c840, 0xa0002804, 0x0a000280, 0x40a0102c, 0x040a0102, 0xc000a010,
+ 0x28140a01, 0x028040a0, 0x1028840a, 0x01028040, 0xa2102804, 0x0a010280,
+ 0x40a00028, 0x040a0002, 0x8040a010, 0x28040000, 0x00000000, 0x00000000,
+ 0x40454d03, 0x5740d4d0, 0x21340d4d, 0x20134080, 0xd001348d, 0x4d021340,
+ 0xd5d01574, 0x0d5d0353, 0x40c5d035, 0x34084d03, 0x5348d4d0, 0x35340d4d,
+ 0x035340d4, 0xd035340d, 0x4d035340, 0xd4d02134, 0x0d4d0213, 0x40d4d035,
+ 0x340d4011, 0x50000000, 0x00000000, 0x40014846, 0x72411c82, 0x472011c8,
+ 0x0472011c, 0x82472011, 0xc8447201, 0x1c904720, 0x19c90472, 0x49dc9047,
+ 0x2010c800, 0x72011c80, 0x472011c8, 0x0472019c, 0x80072011, 0xc8047201,
+ 0x9c884720, 0x11c80472, 0x011c8047, 0x2019c000, 0x00000000, 0x00000000,
+ 0x00002b42, 0x42d090b4, 0x24ad490b, 0x4a42d490, 0xb4a4ad29, 0x0b4a4ad2,
+ 0x90b4a42d, 0x490b4a4a, 0xd090b5a4, 0x2d692b5a, 0x4ad092b4, 0xa4ad490b,
+ 0x524ad492, 0xb424ad49, 0x2b424ad4, 0x90b4a4ad, 0x690b424a, 0xd692b424,
+ 0xad490000, 0x00000000, 0x00000000, 0x00003f7e, 0x4edf93b7, 0xe4fff93b,
+ 0x7f4eff93, 0xb7f4fdfd, 0x3b7f4fdf, 0xd3b7f4ef, 0xf93b7f4f, 0xdf93bff4,
+ 0xeffd3fff, 0x4fdf93f7, 0xf4fff93b, 0xfe4fff93, 0xf7e4fff9, 0x3f7e4fff,
+ 0x93b7f4ff, 0xfd3b7e4f, 0xffd3f7e4, 0xfff90000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x000025f9, 0x0fa7d25f, 0xf4927d25,
+ 0xf90927d2, 0x5f9097e4, 0x25f90926, 0x43e990fa, 0x643ff909, 0x7e43e990,
+ 0x92642499, 0x097fd25f, 0x90927d3e, 0x9f492642, 0x49f4927d, 0x249f4926,
+ 0x425f9092, 0x64249f49, 0x264249f4, 0x92640000, 0x00000000, 0x00000000,
+ 0x00003bfe, 0x4fdfd3bf, 0xf4edfd3b, 0xfe4edfd3, 0xbfe4eff9, 0x3bfe4edf,
+ 0x93f7e4fd, 0xf93ffe4e, 0xff93f7e4, 0xedf93b7e, 0x4effd3bf, 0xe4edfd3f,
+ 0x7f4edf93, 0xb7f4edfd, 0x3b7f4edf, 0x93bfe4ed, 0xf93b7f4e, 0xdf93b7f4,
+ 0xedf90000, 0x00000000, 0x00000000, 0x00003b98, 0x49c65239, 0x94ede523,
+ 0x9e48de52, 0x39e4ee79, 0x239e4ec7, 0x9271e49d, 0xe1277e4e, 0xe61277e4,
+ 0x8df93b7e, 0x4edf93b7, 0xe4ede13b, 0x7e4ede13, 0xb1e4edf9, 0x3b1e4ede,
+ 0x1237e4ed, 0xf9231e4e, 0xdf93b1e4, 0xede10000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x30002001, 0x02020000, 0x30004555,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
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+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x30000001, 0x000054cf, 0x30008001, 0x00000003, 0x30004015, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x30008001, 0x00000005, 0x3000a001, 0x00000000,
+ 0x30000001, 0x0000dca0, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+};
diff --git a/board/cssi/mcr3000/mcr3000.c b/board/cssi/mcr3000/mcr3000.c
index 8857c9e..48e82a9 100644
--- a/board/cssi/mcr3000/mcr3000.c
+++ b/board/cssi/mcr3000/mcr3000.c
@@ -13,12 +13,15 @@
#include <mpc8xx.h>
#include <fdt_support.h>
#include <serial.h>
+#include <spi.h>
#include <asm/global_data.h>
#include <asm/io.h>
#include <dm/uclass.h>
#include <wdt.h>
#include <linux/delay.h>
+#include "fpga_code.h"
+
DECLARE_GLOBAL_DATA_PTR;
#define SDRAM_MAX_SIZE (32 * 1024 * 1024)
@@ -107,6 +110,49 @@
return 0;
}
+static int load_fpga(void)
+{
+ immap_t __iomem *immr = (immap_t __iomem *)CONFIG_SYS_IMMR;
+ struct udevice *master;
+ struct spi_slave *slave;
+ int ret;
+
+ ret = uclass_get_device(UCLASS_SPI, 0, &master);
+ if (ret)
+ return ret;
+
+ ret = _spi_get_bus_and_cs(0, 1, 10000000, 0, "spi_generic_drv",
+ "generic_0:0", &master, &slave);
+ if (ret)
+ return ret;
+
+ ret = spi_claim_bus(slave);
+
+ printf("FPGA Init ... ");
+
+ clrbits_be32(&immr->im_cpm.cp_pbdat, 0x20000);
+ while ((in_be32(&immr->im_cpm.cp_pbdat) & 0x8000))
+ ;
+ setbits_be32(&immr->im_cpm.cp_pbdat, 0x20000);
+ while (!(in_be32(&immr->im_cpm.cp_pbdat) & 0x8000))
+ ;
+
+ printf("Loading ... ");
+
+ ret = spi_xfer(slave, sizeof(fpga_code) * BITS_PER_BYTE, fpga_code, NULL, 0);
+
+ spi_release_bus(slave);
+
+ if ((in_be32(&immr->im_cpm.cp_pbdat) & 0x4000)) {
+ printf("Done\n");
+ } else {
+ printf("FAILED\n");
+ ret = -EINVAL;
+ }
+
+ return ret;
+}
+
int misc_init_r(void)
{
immap_t __iomem *immr = (immap_t __iomem *)CONFIG_SYS_IMMR;
@@ -116,6 +162,18 @@
clrbits_be16(&iop->iop_pcpar, 0x4);
clrbits_be16(&iop->iop_pcdir, 0x4);
+ /* Activate SPI */
+ clrsetbits_be32(&immr->im_cpm.cp_pbpar, 0x1, 0xe);
+ setbits_be32(&immr->im_cpm.cp_pbdir, 0xf);
+ clrbits_be32(&immr->im_cpm.cp_pbdat, 0x1);
+
+ if (!load_fpga()) {
+ u8 addr = in_be16((void *)0x1400009c);
+
+ printf("Board address: 0x%2.2x (System %d Rack %d Slot %d)\n",
+ addr, addr >> 7, (addr >> 4) & 7, addr & 15);
+ }
+
/* if BTN_ACQ_AL is pressed then bootdelay is changed to 60 second */
if ((in_be16(&iop->iop_pcdat) & 0x0004) == 0)
env_set("bootdelay", "60");
diff --git a/board/cssi/mcr3000/mcr3000.env b/board/cssi/mcr3000/mcr3000.env
index 372ab09..380c10c 100644
--- a/board/cssi/mcr3000/mcr3000.env
+++ b/board/cssi/mcr3000/mcr3000.env
@@ -8,7 +8,7 @@
console_args=console=ttyCPM0,115200N8
loadkernel=ubi part nand0;ubifsmount ubi0;ubifsload ${loadaddr} /boot/${filename};ubifsumount; ubi detach
bootcmd=run flashboot
-flashboot=setenv bootargs ${console_args} ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:mcr3k:eth0:off;${ofl_args}; run loadkernel; bootm ${loadaddr}
+flashboot=setenv bootargs ${console_args} ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:mcr3k:eth0:off ${ofl_args}; run loadkernel; bootm ${loadaddr}
tftpboot=setenv bootargs ${console_args} ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:mcr3k:eth0:off ${ofl_args}; tftp ${loadaddr} ${filename}; bootm ${loadaddr}
dhcpboot=dhcp ${loadaddr} ${filename};setenv bootargs ${console_args} ${dhcp_ip} ${ofl_args}; bootm ${loadaddr}
update=echo 'Updating ubi image'; if tftp 0x2000 $ubifile; then nand erase.chip; nand write 0x2000 0x00 $filesize; fi
diff --git a/board/cssi/mcr3000/mcr3000_gpio.c b/board/cssi/mcr3000/mcr3000_gpio.c
new file mode 100644
index 0000000..2bba14e
--- /dev/null
+++ b/board/cssi/mcr3000/mcr3000_gpio.c
@@ -0,0 +1,109 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2024 CS GROUP France
+ * Christophe Leroy <christophe.leroy@csgroup.eu>
+ */
+
+#include <asm/io.h>
+#include <dm.h>
+#include <mapmem.h>
+#include <asm/gpio.h>
+#include <malloc.h>
+
+#include "../common/common.h"
+
+struct mcr3000_spi_gpio_plat {
+ ulong addr;
+};
+
+struct mcr3000_spi_gpio_data {
+ void __iomem *base;
+};
+
+static int mcr3000_spi_gpio_set_value(struct udevice *dev, uint gpio, int value)
+{
+ struct mcr3000_spi_gpio_data *data = dev_get_priv(dev);
+
+ if (value)
+ clrsetbits_be16(data->base, 7 << 5, (gpio & 7) << 5);
+ else
+ clrbits_be16(data->base, 7 << 5);
+
+ return 0;
+}
+
+static int mcr3000_spi_gpio_get_value(struct udevice *dev, uint gpio)
+{
+ struct mcr3000_spi_gpio_data *data = dev_get_priv(dev);
+
+ return gpio == ((in_be16(data->base) >> 5) & 7);
+}
+
+static int mcr3000_spi_gpio_direction_input(struct udevice *dev, uint gpio)
+{
+ return 0;
+}
+
+static int mcr3000_spi_gpio_get_function(struct udevice *dev, uint gpio)
+{
+ return GPIOF_OUTPUT;
+}
+
+static int mcr3000_spi_gpio_ofdata_to_platdata(struct udevice *dev)
+{
+ struct mcr3000_spi_gpio_plat *plat = dev_get_plat(dev);
+ fdt_addr_t addr;
+ u32 reg[2];
+
+ dev_read_u32_array(dev, "reg", reg, 2);
+ addr = dev_translate_address(dev, reg);
+
+ plat->addr = addr;
+
+ return 0;
+}
+
+static int mcr3000_spi_gpio_probe(struct udevice *dev)
+{
+ struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
+ struct mcr3000_spi_gpio_data *data = dev_get_priv(dev);
+ struct mcr3000_spi_gpio_plat *plat = dev_get_plat(dev);
+ char name[32], *str;
+
+ data->base = map_sysmem(plat->addr, 2);
+
+ snprintf(name, sizeof(name), "CHIPSELECT@%lx_", plat->addr);
+ str = strdup(name);
+
+ if (!str)
+ return -ENOMEM;
+
+ uc_priv->bank_name = str;
+ uc_priv->gpio_count = 16;
+
+ return 0;
+}
+
+static const struct dm_gpio_ops gpio_mcr3000_spi_ops = {
+ .get_value = mcr3000_spi_gpio_get_value,
+ .set_value = mcr3000_spi_gpio_set_value,
+ .direction_input = mcr3000_spi_gpio_direction_input,
+ .direction_output = mcr3000_spi_gpio_set_value,
+ .get_function = mcr3000_spi_gpio_get_function,
+};
+
+static const struct udevice_id mcr3000_spi_gpio_ids[] = {
+ { .compatible = "s3k,mcr3000-cpld-csspi"},
+ { /* sentinel */ }
+};
+
+U_BOOT_DRIVER(mcr3000_spi_gpio) = {
+ .name = "mcr3000_spi_chipselect",
+ .id = UCLASS_GPIO,
+ .ops = &gpio_mcr3000_spi_ops,
+ .of_to_plat = mcr3000_spi_gpio_ofdata_to_platdata,
+ .plat_auto = sizeof(struct mcr3000_spi_gpio_plat),
+ .of_match = mcr3000_spi_gpio_ids,
+ .probe = mcr3000_spi_gpio_probe,
+ .priv_auto = sizeof(struct mcr3000_spi_gpio_data),
+};
diff --git a/board/d-link/dns325/dns325.c b/board/d-link/dns325/dns325.c
index 8ebfe4c..3bbde98 100644
--- a/board/d-link/dns325/dns325.c
+++ b/board/d-link/dns325/dns325.c
@@ -9,7 +9,6 @@
* Written-by: Prafulla Wadaskar <prafulla@marvell.com>
*/
-#include <common.h>
#include <init.h>
#include <log.h>
#include <miiphy.h>
diff --git a/board/data_modul/common/common.c b/board/data_modul/common/common.c
index 4ece82c..b4d74a8 100644
--- a/board/data_modul/common/common.c
+++ b/board/data_modul/common/common.c
@@ -3,7 +3,6 @@
* Copyright 2022 Marek Vasut <marex@denx.de>
*/
-#include <common.h>
#include <asm-generic/gpio.h>
#include <asm-generic/sections.h>
#include <asm/arch/clock.h>
diff --git a/board/data_modul/imx8mm_edm_sbc/imx8mm_data_modul_edm_sbc.c b/board/data_modul/imx8mm_edm_sbc/imx8mm_data_modul_edm_sbc.c
index bfb2bdd..339702e 100644
--- a/board/data_modul/imx8mm_edm_sbc/imx8mm_data_modul_edm_sbc.c
+++ b/board/data_modul/imx8mm_edm_sbc/imx8mm_data_modul_edm_sbc.c
@@ -3,7 +3,6 @@
* Copyright 2022 Marek Vasut <marex@denx.de>
*/
-#include <common.h>
#include <asm/arch/clock.h>
#include <asm/arch/imx8mm_pins.h>
#include <asm/io.h>
diff --git a/board/data_modul/imx8mm_edm_sbc/spl.c b/board/data_modul/imx8mm_edm_sbc/spl.c
index 4a9c62f..17aafd7 100644
--- a/board/data_modul/imx8mm_edm_sbc/spl.c
+++ b/board/data_modul/imx8mm_edm_sbc/spl.c
@@ -3,7 +3,6 @@
* Copyright 2022 Marek Vasut <marex@denx.de>
*/
-#include <common.h>
#include <hang.h>
#include <image.h>
#include <init.h>
diff --git a/board/data_modul/imx8mp_edm_sbc/imx8mp_data_modul_edm_sbc.c b/board/data_modul/imx8mp_edm_sbc/imx8mp_data_modul_edm_sbc.c
index f0f373a..138acd3 100644
--- a/board/data_modul/imx8mp_edm_sbc/imx8mp_data_modul_edm_sbc.c
+++ b/board/data_modul/imx8mp_edm_sbc/imx8mp_data_modul_edm_sbc.c
@@ -3,7 +3,6 @@
* Copyright 2022 Marek Vasut <marex@denx.de>
*/
-#include <common.h>
#include <asm/arch/clock.h>
#include <asm/arch/imx8mp_pins.h>
#include <asm/io.h>
diff --git a/board/data_modul/imx8mp_edm_sbc/spl.c b/board/data_modul/imx8mp_edm_sbc/spl.c
index cc2d253..c193589 100644
--- a/board/data_modul/imx8mp_edm_sbc/spl.c
+++ b/board/data_modul/imx8mp_edm_sbc/spl.c
@@ -3,7 +3,6 @@
* Copyright 2022 Marek Vasut <marex@denx.de>
*/
-#include <common.h>
#include <hang.h>
#include <image.h>
#include <init.h>
diff --git a/board/davinci/da8xxevm/da850evm.c b/board/davinci/da8xxevm/da850evm.c
index 05053a8..0011c82 100644
--- a/board/davinci/da8xxevm/da850evm.c
+++ b/board/davinci/da8xxevm/da850evm.c
@@ -8,7 +8,7 @@
* Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
*/
-#include <common.h>
+#include <config.h>
#include <dm.h>
#include <env.h>
#include <i2c.h>
diff --git a/board/davinci/da8xxevm/omapl138_lcdk.c b/board/davinci/da8xxevm/omapl138_lcdk.c
index 9738e2b..607e05a 100644
--- a/board/davinci/da8xxevm/omapl138_lcdk.c
+++ b/board/davinci/da8xxevm/omapl138_lcdk.c
@@ -8,7 +8,7 @@
* Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
*/
-#include <common.h>
+#include <config.h>
#include <env.h>
#include <i2c.h>
#include <init.h>
diff --git a/board/dfi/dfi-bt700/dfi-bt700.c b/board/dfi/dfi-bt700/dfi-bt700.c
index 87506a7..907cc98 100644
--- a/board/dfi/dfi-bt700/dfi-bt700.c
+++ b/board/dfi/dfi-bt700/dfi-bt700.c
@@ -3,7 +3,6 @@
* Copyright (C) 2016 Stefan Roese <sr@denx.de>
*/
-#include <common.h>
#include <init.h>
#include <log.h>
#include <nuvoton_nct6102d.h>
diff --git a/board/dhelectronics/common/dh_common.c b/board/dhelectronics/common/dh_common.c
index 67e3d59..32c50b4 100644
--- a/board/dhelectronics/common/dh_common.c
+++ b/board/dhelectronics/common/dh_common.c
@@ -4,7 +4,6 @@
* Copyright 2022 DENX Software Engineering GmbH, Philip Oberfichtner <pro@denx.de>
*/
-#include <common.h>
#include <dm.h>
#include <i2c_eeprom.h>
#include <net.h>
@@ -18,6 +17,19 @@
return eth_env_get_enetaddr(env, enetaddr);
}
+int dh_get_mac_is_enabled(const char *alias)
+{
+ ofnode node = ofnode_path(alias);
+
+ if (!ofnode_valid(node))
+ return -EINVAL;
+
+ if (!ofnode_is_enabled(node))
+ return -ENODEV;
+
+ return 0;
+}
+
int dh_get_mac_from_eeprom(unsigned char *enetaddr, const char *alias)
{
struct udevice *dev;
@@ -57,6 +69,9 @@
if (dh_mac_is_in_env("ethaddr"))
return 0;
+ if (dh_get_mac_is_enabled("ethernet0"))
+ return 0;
+
if (!dh_get_mac_from_eeprom(enetaddr, "eeprom0"))
return eth_env_set_enetaddr("ethaddr", enetaddr);
diff --git a/board/dhelectronics/common/dh_common.h b/board/dhelectronics/common/dh_common.h
index 2b24637..a2de5b1 100644
--- a/board/dhelectronics/common/dh_common.h
+++ b/board/dhelectronics/common/dh_common.h
@@ -12,6 +12,14 @@
bool dh_mac_is_in_env(const char *env);
/*
+ * dh_get_mac_is_enabled - Test if ethernet MAC is enabled in DT
+ *
+ * @alias: alias for ethernet MAC device tree node
+ * Return: 0 if OK, other value on error
+ */
+int dh_get_mac_is_enabled(const char *alias);
+
+/*
* dh_get_mac_from_eeprom - Get MAC address from eeprom and write it to enetaddr
*
* @enetaddr: buffer where address is to be stored
diff --git a/board/dhelectronics/common/dh_imx.c b/board/dhelectronics/common/dh_imx.c
index 7f451ba..3d6487d 100644
--- a/board/dhelectronics/common/dh_imx.c
+++ b/board/dhelectronics/common/dh_imx.c
@@ -4,9 +4,9 @@
* Copyright 2022 DENX Software Engineering GmbH, Philip Oberfichtner <pro@denx.de>
*/
+#include <linux/errno.h>
#include <asm/arch/imx-regs.h>
#include <asm/arch/sys_proto.h>
-#include <common.h>
#include <net.h>
#include "dh_imx.h"
diff --git a/board/dhelectronics/dh_imx6/dh_imx6.c b/board/dhelectronics/dh_imx6/dh_imx6.c
index 07fc9b1..c8dd30d 100644
--- a/board/dhelectronics/dh_imx6/dh_imx6.c
+++ b/board/dhelectronics/dh_imx6/dh_imx6.c
@@ -5,9 +5,7 @@
* Copyright (C) 2017 Marek Vasut <marex@denx.de>
*/
-#include <common.h>
#include <dm.h>
-#include <eeprom.h>
#include <image.h>
#include <init.h>
#include <net.h>
@@ -92,6 +90,9 @@
if (dh_mac_is_in_env("ethaddr"))
return 0;
+ if (dh_get_mac_is_enabled("ethernet0"))
+ return 0;
+
if (!dh_imx_get_mac_from_fuse(enetaddr))
goto out;
diff --git a/board/dhelectronics/dh_imx6/dh_imx6_spl.c b/board/dhelectronics/dh_imx6/dh_imx6_spl.c
index e6d5657..3a5495e 100644
--- a/board/dhelectronics/dh_imx6/dh_imx6_spl.c
+++ b/board/dhelectronics/dh_imx6/dh_imx6_spl.c
@@ -5,7 +5,6 @@
* Copyright (C) 2017 Marek Vasut <marex@denx.de>
*/
-#include <common.h>
#include <cpu_func.h>
#include <init.h>
#include <asm/arch/clock.h>
diff --git a/board/dhelectronics/dh_imx8mp/common.c b/board/dhelectronics/dh_imx8mp/common.c
index 44456da..f6db9f6 100644
--- a/board/dhelectronics/dh_imx8mp/common.c
+++ b/board/dhelectronics/dh_imx8mp/common.c
@@ -3,7 +3,6 @@
* Copyright 2022 Marek Vasut <marex@denx.de>
*/
-#include <common.h>
#include <asm/io.h>
#include <asm-generic/gpio.h>
diff --git a/board/dhelectronics/dh_imx8mp/imx8mp_dhcom_pdk2.c b/board/dhelectronics/dh_imx8mp/imx8mp_dhcom_pdk2.c
index 5f12d78..c635735 100644
--- a/board/dhelectronics/dh_imx8mp/imx8mp_dhcom_pdk2.c
+++ b/board/dhelectronics/dh_imx8mp/imx8mp_dhcom_pdk2.c
@@ -3,7 +3,6 @@
* Copyright 2022 Marek Vasut <marex@denx.de>
*/
-#include <common.h>
#include <asm/arch/clock.h>
#include <asm/arch/ddr.h>
#include <asm/arch/sys_proto.h>
@@ -47,6 +46,9 @@
if (dh_mac_is_in_env("ethaddr"))
return 0;
+ if (dh_get_mac_is_enabled("ethernet0"))
+ return 0;
+
if (!dh_imx_get_mac_from_fuse(enetaddr))
goto out;
@@ -66,6 +68,9 @@
if (dh_mac_is_in_env("eth1addr"))
return 0;
+ if (dh_get_mac_is_enabled("ethernet1"))
+ return 0;
+
if (!dh_imx_get_mac_from_fuse(enetaddr))
goto increment_out;
diff --git a/board/dhelectronics/dh_imx8mp/spl.c b/board/dhelectronics/dh_imx8mp/spl.c
index 7d228da..714f846 100644
--- a/board/dhelectronics/dh_imx8mp/spl.c
+++ b/board/dhelectronics/dh_imx8mp/spl.c
@@ -3,7 +3,6 @@
* Copyright 2022 Marek Vasut <marex@denx.de>
*/
-#include <common.h>
#include <hang.h>
#include <image.h>
#include <init.h>
diff --git a/board/dhelectronics/dh_stm32mp1/board.c b/board/dhelectronics/dh_stm32mp1/board.c
index d1f662d..20c9d70 100644
--- a/board/dhelectronics/dh_stm32mp1/board.c
+++ b/board/dhelectronics/dh_stm32mp1/board.c
@@ -3,7 +3,6 @@
* Copyright (C) 2018, STMicroelectronics - All Rights Reserved
*/
-#include <common.h>
#include <adc.h>
#include <log.h>
#include <net.h>
@@ -48,12 +47,10 @@
/* SYSCFG registers */
#define SYSCFG_BOOTR 0x00
-#define SYSCFG_PMCSETR 0x04
#define SYSCFG_IOCTRLSETR 0x18
#define SYSCFG_ICNR 0x1C
#define SYSCFG_CMPCR 0x20
#define SYSCFG_CMPENSETR 0x24
-#define SYSCFG_PMCCLRR 0x44
#define SYSCFG_BOOTR_BOOT_MASK GENMASK(2, 0)
#define SYSCFG_BOOTR_BOOTPD_SHIFT 4
@@ -69,16 +66,6 @@
#define SYSCFG_CMPENSETR_MPU_EN BIT(0)
-#define SYSCFG_PMCSETR_ETH_CLK_SEL BIT(16)
-#define SYSCFG_PMCSETR_ETH_REF_CLK_SEL BIT(17)
-
-#define SYSCFG_PMCSETR_ETH_SELMII BIT(20)
-
-#define SYSCFG_PMCSETR_ETH_SEL_MASK GENMASK(23, 21)
-#define SYSCFG_PMCSETR_ETH_SEL_GMII_MII 0
-#define SYSCFG_PMCSETR_ETH_SEL_RGMII BIT(21)
-#define SYSCFG_PMCSETR_ETH_SEL_RMII BIT(23)
-
#define KS_CCR 0x08
#define KS_CCR_EEPROM BIT(9)
#define KS_BE0 BIT(12)
@@ -128,6 +115,9 @@
if (dh_mac_is_in_env("ethaddr"))
return 0;
+ if (dh_get_mac_is_enabled("ethernet0"))
+ return 0;
+
if (!dh_get_mac_from_eeprom(enetaddr, "eeprom0"))
return eth_env_set_enetaddr("ethaddr", enetaddr);
@@ -141,6 +131,9 @@
if (dh_mac_is_in_env("eth1addr"))
return 0;
+ if (dh_get_mac_is_enabled("ethernet1"))
+ return 0;
+
if (dh_stm32_mac_is_in_ks8851())
return 0;
@@ -679,76 +672,6 @@
#endif
}
-/* eth init function : weak called in eqos driver */
-int board_interface_eth_init(struct udevice *dev,
- phy_interface_t interface_type)
-{
- u8 *syscfg;
- u32 value;
- bool eth_clk_sel_reg = false;
- bool eth_ref_clk_sel_reg = false;
-
- /* Gigabit Ethernet 125MHz clock selection. */
- eth_clk_sel_reg = dev_read_bool(dev, "st,eth-clk-sel");
-
- /* Ethernet 50Mhz RMII clock selection */
- eth_ref_clk_sel_reg =
- dev_read_bool(dev, "st,eth-ref-clk-sel");
-
- syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
-
- if (!syscfg)
- return -ENODEV;
-
- switch (interface_type) {
- case PHY_INTERFACE_MODE_MII:
- value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII |
- SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
- debug("%s: PHY_INTERFACE_MODE_MII\n", __func__);
- break;
- case PHY_INTERFACE_MODE_GMII:
- if (eth_clk_sel_reg)
- value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII |
- SYSCFG_PMCSETR_ETH_CLK_SEL;
- else
- value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII;
- debug("%s: PHY_INTERFACE_MODE_GMII\n", __func__);
- break;
- case PHY_INTERFACE_MODE_RMII:
- if (eth_ref_clk_sel_reg)
- value = SYSCFG_PMCSETR_ETH_SEL_RMII |
- SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
- else
- value = SYSCFG_PMCSETR_ETH_SEL_RMII;
- debug("%s: PHY_INTERFACE_MODE_RMII\n", __func__);
- break;
- case PHY_INTERFACE_MODE_RGMII:
- case PHY_INTERFACE_MODE_RGMII_ID:
- case PHY_INTERFACE_MODE_RGMII_RXID:
- case PHY_INTERFACE_MODE_RGMII_TXID:
- if (eth_clk_sel_reg)
- value = SYSCFG_PMCSETR_ETH_SEL_RGMII |
- SYSCFG_PMCSETR_ETH_CLK_SEL;
- else
- value = SYSCFG_PMCSETR_ETH_SEL_RGMII;
- debug("%s: PHY_INTERFACE_MODE_RGMII\n", __func__);
- break;
- default:
- debug("%s: Do not manage %d interface\n",
- __func__, interface_type);
- /* Do not manage others interfaces */
- return -EINVAL;
- }
-
- /* clear and set ETH configuration bits */
- writel(SYSCFG_PMCSETR_ETH_SEL_MASK | SYSCFG_PMCSETR_ETH_SELMII |
- SYSCFG_PMCSETR_ETH_REF_CLK_SEL | SYSCFG_PMCSETR_ETH_CLK_SEL,
- syscfg + SYSCFG_PMCCLRR);
- writel(value, syscfg + SYSCFG_PMCSETR);
-
- return 0;
-}
-
#if defined(CONFIG_OF_BOARD_SETUP)
int ft_board_setup(void *blob, struct bd_info *bd)
{
diff --git a/board/ea/ea-lpc3250devkitv2/ea-lpc3250devkitv2.c b/board/ea/ea-lpc3250devkitv2/ea-lpc3250devkitv2.c
index 2b03e48..222e5fa 100644
--- a/board/ea/ea-lpc3250devkitv2/ea-lpc3250devkitv2.c
+++ b/board/ea/ea-lpc3250devkitv2/ea-lpc3250devkitv2.c
@@ -5,7 +5,7 @@
*/
#include <init.h>
-#include <common.h>
+#include <config.h>
#include <asm/io.h>
#include <asm/global_data.h>
diff --git a/board/ea/mx7ulp_com/mx7ulp_com.c b/board/ea/mx7ulp_com/mx7ulp_com.c
index cd9591a..8f78937 100644
--- a/board/ea/mx7ulp_com/mx7ulp_com.c
+++ b/board/ea/mx7ulp_com/mx7ulp_com.c
@@ -3,7 +3,6 @@
* Copyright (C) 2016 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <init.h>
#include <asm/global_data.h>
#include <asm/io.h>
diff --git a/board/eets/pdu001/board.c b/board/eets/pdu001/board.c
index 3a52e4a..2ad256f 100644
--- a/board/eets/pdu001/board.c
+++ b/board/eets/pdu001/board.c
@@ -9,7 +9,7 @@
* Copyright (C) 2011, Texas Instruments, Incorporated - https://www.ti.com/
*/
-#include <common.h>
+#include <config.h>
#include <env.h>
#include <errno.h>
#include <init.h>
diff --git a/board/eets/pdu001/mux.c b/board/eets/pdu001/mux.c
index c97927e..f306a13 100644
--- a/board/eets/pdu001/mux.c
+++ b/board/eets/pdu001/mux.c
@@ -7,7 +7,7 @@
* Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/
*/
-#include <common.h>
+#include <config.h>
#include <i2c.h>
#include <asm/arch/sys_proto.h>
#include <asm/arch/hardware.h>
diff --git a/board/efi/efi-x86_payload/payload.c b/board/efi/efi-x86_payload/payload.c
index 5d4492c..d7d1e53 100644
--- a/board/efi/efi-x86_payload/payload.c
+++ b/board/efi/efi-x86_payload/payload.c
@@ -3,7 +3,6 @@
* Copyright (C) 2018, Bin Meng <bmeng.cn@gmail.com>
*/
-#include <common.h>
#include <init.h>
#include <usb.h>
diff --git a/board/egnite/ethernut5/ethernut5.c b/board/egnite/ethernut5/ethernut5.c
index 9953df0..64e341c3 100644
--- a/board/egnite/ethernut5/ethernut5.c
+++ b/board/egnite/ethernut5/ethernut5.c
@@ -52,7 +52,7 @@
* http://www.ethernut.de/
*/
-#include <common.h>
+#include <config.h>
#include <init.h>
#include <net.h>
#include <netdev.h>
diff --git a/board/egnite/ethernut5/ethernut5_pwrman.c b/board/egnite/ethernut5/ethernut5_pwrman.c
index 81f1abf..42e1914 100644
--- a/board/egnite/ethernut5/ethernut5_pwrman.c
+++ b/board/egnite/ethernut5/ethernut5_pwrman.c
@@ -31,8 +31,8 @@
* For additional information visit the project home page at
* http://www.ethernut.de/
*/
-#include <common.h>
#include <command.h>
+#include <vsprintf.h>
#include <asm/arch/at91sam9260.h>
#include <asm/arch/at91_common.h>
#include <asm/arch/gpio.h>
diff --git a/board/elgin/elgin_rv1108/elgin_rv1108.c b/board/elgin/elgin_rv1108/elgin_rv1108.c
index 10398e7..9fea4f8 100644
--- a/board/elgin/elgin_rv1108/elgin_rv1108.c
+++ b/board/elgin/elgin_rv1108/elgin_rv1108.c
@@ -4,7 +4,6 @@
* Authors: Andy Yan <andy.yan@rock-chips.com>
*/
-#include <common.h>
#include <init.h>
#include <syscon.h>
#include <asm/global_data.h>
diff --git a/board/embest/mx6boards/mx6boards.c b/board/embest/mx6boards/mx6boards.c
index a3c23bd..8963501 100644
--- a/board/embest/mx6boards/mx6boards.c
+++ b/board/embest/mx6boards/mx6boards.c
@@ -12,7 +12,6 @@
* Copyright (C) 2013 Jon Nettleton <jon.nettleton@gmail.com>.
*/
-#include <common.h>
#include <init.h>
#include <net.h>
#include <asm/arch/clock.h>
diff --git a/board/emulation/common/qemu_dfu.c b/board/emulation/common/qemu_dfu.c
index 7e7d84f..393fcae 100644
--- a/board/emulation/common/qemu_dfu.c
+++ b/board/emulation/common/qemu_dfu.c
@@ -3,7 +3,6 @@
* Copyright (c) 2020 Linaro Limited
*/
-#include <common.h>
#include <dfu.h>
#include <env.h>
#include <memalign.h>
diff --git a/board/emulation/common/qemu_mtdparts.c b/board/emulation/common/qemu_mtdparts.c
index 60212e9..c150127 100644
--- a/board/emulation/common/qemu_mtdparts.c
+++ b/board/emulation/common/qemu_mtdparts.c
@@ -3,7 +3,6 @@
* Copyright (c) 2020 Linaro Limited
*/
-#include <common.h>
#include <dm.h>
#include <mtd.h>
diff --git a/board/emulation/qemu-arm/qemu-arm.c b/board/emulation/qemu-arm/qemu-arm.c
index ecfd19f..6095cb0 100644
--- a/board/emulation/qemu-arm/qemu-arm.c
+++ b/board/emulation/qemu-arm/qemu-arm.c
@@ -3,7 +3,7 @@
* Copyright (c) 2017 Tuomas Tynkkynen
*/
-#include <common.h>
+#include <config.h>
#include <cpu_func.h>
#include <dm.h>
#include <efi.h>
diff --git a/board/emulation/qemu-ppce500/qemu-ppce500.c b/board/emulation/qemu-ppce500/qemu-ppce500.c
index 2213616..58e5d5e 100644
--- a/board/emulation/qemu-ppce500/qemu-ppce500.c
+++ b/board/emulation/qemu-ppce500/qemu-ppce500.c
@@ -4,7 +4,7 @@
* Copyright (C) 2021, Bin Meng <bmeng.cn@gmail.com>
*/
-#include <common.h>
+#include <config.h>
#include <command.h>
#include <cpu_func.h>
#include <dm.h>
diff --git a/board/emulation/qemu-riscv/qemu-riscv.c b/board/emulation/qemu-riscv/qemu-riscv.c
index 181abbb..e5193e3 100644
--- a/board/emulation/qemu-riscv/qemu-riscv.c
+++ b/board/emulation/qemu-riscv/qemu-riscv.c
@@ -3,7 +3,6 @@
* Copyright (C) 2018, Bin Meng <bmeng.cn@gmail.com>
*/
-#include <common.h>
#include <dm.h>
#include <dm/ofnode.h>
#include <env.h>
@@ -31,12 +30,6 @@
int board_init(void)
{
- /*
- * Make sure virtio bus is enumerated so that peripherals
- * on the virtio bus can be discovered by their drivers
- */
- virtio_init();
-
return 0;
}
@@ -46,6 +39,12 @@
if (CONFIG_IS_ENABLED(USB_KEYBOARD))
usb_init();
+ /*
+ * Make sure virtio bus is enumerated so that peripherals
+ * on the virtio bus can be discovered by their drivers
+ */
+ virtio_init();
+
return 0;
}
diff --git a/board/emulation/qemu-x86/Kconfig b/board/emulation/qemu-x86/Kconfig
index 9a06118..b2a4e08 100644
--- a/board/emulation/qemu-x86/Kconfig
+++ b/board/emulation/qemu-x86/Kconfig
@@ -18,7 +18,8 @@
select X86_RESET_VECTOR
select QEMU
select QFW_PIO if CMD_QFW
- select BOARD_ROMSIZE_KB_1024
+ select BOARD_ROMSIZE_KB_1024 if TARGET_QEMU_X86
+ select BOARD_ROMSIZE_KB_2048 if TARGET_QEMU_X86_64
imply VIRTIO_PCI
imply VIRTIO_NET
imply VIRTIO_BLK
diff --git a/board/engicam/common/board.c b/board/engicam/common/board.c
index df9149e..8e0477c 100644
--- a/board/engicam/common/board.c
+++ b/board/engicam/common/board.c
@@ -5,7 +5,6 @@
* Author: Jagan Teki <jagan@amarulasolutions.com>
*/
-#include <common.h>
#include <command.h>
#include <env.h>
#include <hang.h>
diff --git a/board/engicam/common/spl.c b/board/engicam/common/spl.c
index f1ccdc3..8bc80ee 100644
--- a/board/engicam/common/spl.c
+++ b/board/engicam/common/spl.c
@@ -5,7 +5,6 @@
* Author: Jagan Teki <jagan@amarulasolutions.com>
*/
-#include <common.h>
#include <image.h>
#include <init.h>
#include <serial.h>
diff --git a/board/engicam/imx6q/imx6q.c b/board/engicam/imx6q/imx6q.c
index e6c888f..d799fe6 100644
--- a/board/engicam/imx6q/imx6q.c
+++ b/board/engicam/imx6q/imx6q.c
@@ -5,7 +5,6 @@
* Author: Jagan Teki <jagan@amarulasolutions.com>
*/
-#include <common.h>
#include <asm/io.h>
#include <asm/gpio.h>
diff --git a/board/engicam/imx6ul/imx6ul.c b/board/engicam/imx6ul/imx6ul.c
index 412d6c3..24d6544 100644
--- a/board/engicam/imx6ul/imx6ul.c
+++ b/board/engicam/imx6ul/imx6ul.c
@@ -5,7 +5,6 @@
* Author: Jagan Teki <jagan@amarulasolutions.com>
*/
-#include <common.h>
#include <mmc.h>
#include <asm/io.h>
diff --git a/board/engicam/imx8mm/icore_mx8mm.c b/board/engicam/imx8mm/icore_mx8mm.c
index 320388f..2363375 100644
--- a/board/engicam/imx8mm/icore_mx8mm.c
+++ b/board/engicam/imx8mm/icore_mx8mm.c
@@ -5,7 +5,6 @@
* Author: Jagan Teki <jagan@amarulasolutions.com>
*/
-#include <common.h>
#include <miiphy.h>
#include <netdev.h>
diff --git a/board/engicam/imx8mm/lpddr4_timing.c b/board/engicam/imx8mm/lpddr4_timing.c
index 8212127..fcd45c1 100644
--- a/board/engicam/imx8mm/lpddr4_timing.c
+++ b/board/engicam/imx8mm/lpddr4_timing.c
@@ -6,7 +6,6 @@
* Align with uboot-imx_v2018.03_4.14.78_1.0.0_ga
*/
-#include <common.h>
#include <asm/arch/ddr.h>
#include <asm/arch/lpddr4_define.h>
diff --git a/board/engicam/imx8mm/spl.c b/board/engicam/imx8mm/spl.c
index af9044a..d51ae24 100644
--- a/board/engicam/imx8mm/spl.c
+++ b/board/engicam/imx8mm/spl.c
@@ -5,7 +5,6 @@
* Author: Jagan Teki <jagan@amarulasolutions.com>
*/
-#include <common.h>
#include <hang.h>
#include <init.h>
#include <log.h>
diff --git a/board/engicam/imx8mp/icore_mx8mp.c b/board/engicam/imx8mp/icore_mx8mp.c
index 5f820cc..e2ed70c 100644
--- a/board/engicam/imx8mp/icore_mx8mp.c
+++ b/board/engicam/imx8mp/icore_mx8mp.c
@@ -8,7 +8,6 @@
* Jagan Teki <jagan@amarulasolutions.com>
*/
-#include <common.h>
#include <env.h>
#include <errno.h>
#include <init.h>
diff --git a/board/engicam/imx8mp/spl.c b/board/engicam/imx8mp/spl.c
index 36b83aa..cd31aa6 100644
--- a/board/engicam/imx8mp/spl.c
+++ b/board/engicam/imx8mp/spl.c
@@ -8,7 +8,6 @@
* Jagan Teki <jagan@amarulasolutions.com>
*/
-#include <common.h>
#include <hang.h>
#include <init.h>
#include <log.h>
diff --git a/board/engicam/stm32mp1/spl.c b/board/engicam/stm32mp1/spl.c
index 2b7779c..bb2bd44 100644
--- a/board/engicam/stm32mp1/spl.c
+++ b/board/engicam/stm32mp1/spl.c
@@ -5,7 +5,7 @@
* Copyright (C) 2020 Amarula Solutions(India)
*/
-#include <common.h>
+#include <linux/types.h>
/* board early initialisation in board_f: need to use global variable */
static u32 opp_voltage_mv __section(".data");
diff --git a/board/engicam/stm32mp1/stm32mp1.c b/board/engicam/stm32mp1/stm32mp1.c
index 5223e9b..bc2af66 100644
--- a/board/engicam/stm32mp1/stm32mp1.c
+++ b/board/engicam/stm32mp1/stm32mp1.c
@@ -6,7 +6,6 @@
* Author: Jagan Teki <jagan@amarulasolutions.com>
*/
-#include <common.h>
#include <env.h>
#include <env_internal.h>
#include <syscon.h>
diff --git a/board/esd/meesc/meesc.c b/board/esd/meesc/meesc.c
index 9e36210..dce69ab 100644
--- a/board/esd/meesc/meesc.c
+++ b/board/esd/meesc/meesc.c
@@ -9,7 +9,7 @@
* esd electronic system design gmbh <www.esd.eu>
*/
-#include <common.h>
+#include <config.h>
#include <env.h>
#include <init.h>
#include <net.h>
diff --git a/board/firefly/firefly-rk3288/firefly-rk3288.c b/board/firefly/firefly-rk3288/firefly-rk3288.c
index 95d8b00..8e67ab4 100644
--- a/board/firefly/firefly-rk3288/firefly-rk3288.c
+++ b/board/firefly/firefly-rk3288/firefly-rk3288.c
@@ -3,7 +3,6 @@
* (C) Copyright 2015 Google, Inc
*/
-#include <common.h>
#include <hang.h>
#include <led.h>
#include <log.h>
diff --git a/board/firefly/firefly-rk3308/MAINTAINERS b/board/firefly/firefly-rk3308/MAINTAINERS
index e584038..b70ff52 100644
--- a/board/firefly/firefly-rk3308/MAINTAINERS
+++ b/board/firefly/firefly-rk3308/MAINTAINERS
@@ -4,3 +4,4 @@
F: board/firefly/firefly-rk3308/
F: configs/roc-cc-rk3308_defconfig
F: include/configs/firefly_rk3308.h
+F: arch/arm/dts/rk3308-roc-cc*
diff --git a/board/firefly/firefly-rk3308/roc_cc_rk3308.c b/board/firefly/firefly-rk3308/roc_cc_rk3308.c
index 99a52a7..404bdc6 100644
--- a/board/firefly/firefly-rk3308/roc_cc_rk3308.c
+++ b/board/firefly/firefly-rk3308/roc_cc_rk3308.c
@@ -3,9 +3,8 @@
* (C) Copyright 2019 Rockchip Electronics Co., Ltd
*/
-#include <common.h>
#include <adc.h>
-#include <asm/arch/grf_rk3308.h>
+#include <asm/arch-rockchip/grf_rk3308.h>
#include <asm/arch-rockchip/hardware.h>
#include <linux/bitops.h>
diff --git a/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c b/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c
index 590519b..a149e4f 100644
--- a/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c
+++ b/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c
@@ -3,7 +3,6 @@
* (C) Copyright 2016 Rockchip Electronics Co., Ltd
*/
-#include <common.h>
#include <dm.h>
#include <env.h>
#include <log.h>
diff --git a/board/freescale/common/cadmus.c b/board/freescale/common/cadmus.c
index e7e07ff..6f66ed6 100644
--- a/board/freescale/common/cadmus.c
+++ b/board/freescale/common/cadmus.c
@@ -4,8 +4,9 @@
*/
-#include <common.h>
+#include <config.h>
#include <clock_legacy.h>
+#include <linux/types.h>
/*
* CADMUS Board System Registers
diff --git a/board/freescale/common/cds_pci_ft.c b/board/freescale/common/cds_pci_ft.c
index dc2d628..56b01e3 100644
--- a/board/freescale/common/cds_pci_ft.c
+++ b/board/freescale/common/cds_pci_ft.c
@@ -3,7 +3,6 @@
* Copyright 2004 Freescale Semiconductor.
*/
-#include <common.h>
#include <linux/libfdt.h>
#include <fdt_support.h>
#include "cadmus.h"
diff --git a/board/freescale/common/cds_via.c b/board/freescale/common/cds_via.c
index 6184472..6fc3a21 100644
--- a/board/freescale/common/cds_via.c
+++ b/board/freescale/common/cds_via.c
@@ -3,7 +3,6 @@
* Copyright 2006 Freescale Semiconductor.
*/
-#include <common.h>
#include <pci.h>
/* Config the VIA chip */
diff --git a/board/freescale/common/cmd_esbc_validate.c b/board/freescale/common/cmd_esbc_validate.c
index 6c09626..d4192e5 100644
--- a/board/freescale/common/cmd_esbc_validate.c
+++ b/board/freescale/common/cmd_esbc_validate.c
@@ -3,10 +3,10 @@
* Copyright 2015 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <command.h>
#include <env.h>
#include <fsl_validate.h>
+#include <vsprintf.h>
int do_esbc_halt(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[])
diff --git a/board/freescale/common/emc2305.c b/board/freescale/common/emc2305.c
index 9a75c5a..50252bb 100644
--- a/board/freescale/common/emc2305.c
+++ b/board/freescale/common/emc2305.c
@@ -4,7 +4,6 @@
*
*/
-#include <common.h>
#include <command.h>
#include <i2c.h>
#include <asm/global_data.h>
diff --git a/board/freescale/common/fman.c b/board/freescale/common/fman.c
index 3583031..650ecc7 100644
--- a/board/freescale/common/fman.c
+++ b/board/freescale/common/fman.c
@@ -3,7 +3,6 @@
* Copyright 2011-2015 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <linux/libfdt.h>
#include <linux/libfdt_env.h>
#include <fdt_support.h>
diff --git a/board/freescale/common/fsl_chain_of_trust.c b/board/freescale/common/fsl_chain_of_trust.c
index 87ed814..27a3392 100644
--- a/board/freescale/common/fsl_chain_of_trust.c
+++ b/board/freescale/common/fsl_chain_of_trust.c
@@ -4,7 +4,7 @@
* Copyright 2022 NXP
*/
-#include <common.h>
+#include <config.h>
#include <dm.h>
#include <env.h>
#include <init.h>
diff --git a/board/freescale/common/fsl_validate.c b/board/freescale/common/fsl_validate.c
index bfe6357..e03434d 100644
--- a/board/freescale/common/fsl_validate.c
+++ b/board/freescale/common/fsl_validate.c
@@ -4,7 +4,7 @@
* Copyright 2021-2022 NXP
*/
-#include <common.h>
+#include <config.h>
#include <dm.h>
#include <fsl_validate.h>
#include <fsl_secboot_err.h>
diff --git a/board/freescale/common/i2c_common.c b/board/freescale/common/i2c_common.c
index 119ed3c..20705ec 100644
--- a/board/freescale/common/i2c_common.c
+++ b/board/freescale/common/i2c_common.c
@@ -5,7 +5,7 @@
* Copyright 2021 Microsoft Corporation
*/
-#include <common.h>
+#include <stdio.h>
#include <i2c.h>
#include "i2c_common.h"
diff --git a/board/freescale/common/i2c_mux.c b/board/freescale/common/i2c_mux.c
index 54f89e2..89151cc 100644
--- a/board/freescale/common/i2c_mux.c
+++ b/board/freescale/common/i2c_mux.c
@@ -5,14 +5,15 @@
* Copyright 2021 Microsoft Corporation
*/
-#include <common.h>
+#include <config.h>
#include <i2c.h>
+#include <stdio.h>
#include "i2c_common.h"
#include "i2c_mux.h"
/*
* A new Kconfig option for something that used to always be built should be
- * “default y”.
+ * "default y".
*/
#ifdef CONFIG_FSL_USE_PCA9547_MUX
diff --git a/board/freescale/common/ics307_clk.c b/board/freescale/common/ics307_clk.c
index 5f95571..af30faa 100644
--- a/board/freescale/common/ics307_clk.c
+++ b/board/freescale/common/ics307_clk.c
@@ -3,7 +3,7 @@
* Copyright 2010-2011 Freescale Semiconductor, Inc.
*/
-#include <common.h>
+#include <config.h>
#include <clock_legacy.h>
#include <log.h>
#include <asm/io.h>
diff --git a/board/freescale/common/ls102xa_stream_id.c b/board/freescale/common/ls102xa_stream_id.c
index f754cf4..bf76274 100644
--- a/board/freescale/common/ls102xa_stream_id.c
+++ b/board/freescale/common/ls102xa_stream_id.c
@@ -3,7 +3,7 @@
* Copyright 2014 Freescale Semiconductor
*/
-#include <common.h>
+#include <config.h>
#include <asm/io.h>
#include <asm/arch/ls102xa_stream_id.h>
diff --git a/board/freescale/common/mc34vr500.c b/board/freescale/common/mc34vr500.c
index d6b4c65..cf14b29 100644
--- a/board/freescale/common/mc34vr500.c
+++ b/board/freescale/common/mc34vr500.c
@@ -4,7 +4,6 @@
* Hou Zhiqiang <Zhiqiang.Hou@freescale.com>
*/
-#include <common.h>
#include <errno.h>
#include <i2c.h>
#include <log.h>
diff --git a/board/freescale/common/mmc.c b/board/freescale/common/mmc.c
index 8cd5079..00e4f36 100644
--- a/board/freescale/common/mmc.c
+++ b/board/freescale/common/mmc.c
@@ -4,8 +4,8 @@
* Copyright 2018-2022 NXP
*/
-#include <common.h>
#include <command.h>
+#include <vsprintf.h>
#include <asm/arch/sys_proto.h>
#include <linux/errno.h>
#include <asm/io.h>
diff --git a/board/freescale/common/ngpixis.c b/board/freescale/common/ngpixis.c
index 7be1cce..74c3458 100644
--- a/board/freescale/common/ngpixis.c
+++ b/board/freescale/common/ngpixis.c
@@ -29,7 +29,6 @@
* boot from the alternate bank.
*/
-#include <common.h>
#include <command.h>
#include <asm/io.h>
diff --git a/board/freescale/common/ns_access.c b/board/freescale/common/ns_access.c
index a95d15c..c46e87f 100644
--- a/board/freescale/common/ns_access.c
+++ b/board/freescale/common/ns_access.c
@@ -3,7 +3,7 @@
* Copyright 2014 Freescale Semiconductor
*/
-#include <common.h>
+#include <config.h>
#include <log.h>
#include <asm/cache.h>
#include <asm/io.h>
diff --git a/board/freescale/common/p_corenet/law.c b/board/freescale/common/p_corenet/law.c
index 1a1e934..83818d6 100644
--- a/board/freescale/common/p_corenet/law.c
+++ b/board/freescale/common/p_corenet/law.c
@@ -6,7 +6,7 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
+#include <config.h>
#include <asm/fsl_law.h>
#include <asm/mmu.h>
diff --git a/board/freescale/common/p_corenet/tlb.c b/board/freescale/common/p_corenet/tlb.c
index 1a2d9cb..cebdedf 100644
--- a/board/freescale/common/p_corenet/tlb.c
+++ b/board/freescale/common/p_corenet/tlb.c
@@ -6,8 +6,9 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
+#include <config.h>
#include <asm/mmu.h>
+#include <asm/ppc.h>
struct fsl_e_tlb_entry tlb_table[] = {
/* TLB 0 - for temp stack in cache */
diff --git a/board/freescale/common/pfuze.c b/board/freescale/common/pfuze.c
index a928882..0d7a94f 100644
--- a/board/freescale/common/pfuze.c
+++ b/board/freescale/common/pfuze.c
@@ -3,7 +3,6 @@
* Copyright 2014 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <errno.h>
#include <power/pmic.h>
#include <power/pfuze100_pmic.h>
diff --git a/board/freescale/common/qixis.c b/board/freescale/common/qixis.c
index da2c1de..6400ac0 100644
--- a/board/freescale/common/qixis.c
+++ b/board/freescale/common/qixis.c
@@ -7,7 +7,7 @@
* This file provides support for the QIXIS of some Freescale reference boards.
*/
-#include <common.h>
+#include <config.h>
#include <command.h>
#include <asm/io.h>
#include <linux/compiler.h>
diff --git a/board/freescale/common/sdhc_boot.c b/board/freescale/common/sdhc_boot.c
index a1c7a94..5ee730c 100644
--- a/board/freescale/common/sdhc_boot.c
+++ b/board/freescale/common/sdhc_boot.c
@@ -3,7 +3,6 @@
* Copyright 2011 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <mmc.h>
#include <malloc.h>
diff --git a/board/freescale/common/sys_eeprom.c b/board/freescale/common/sys_eeprom.c
index 64139d4..ec3c9e3 100644
--- a/board/freescale/common/sys_eeprom.c
+++ b/board/freescale/common/sys_eeprom.c
@@ -6,7 +6,6 @@
* Timur Tabi (timur@freescale.com)
*/
-#include <common.h>
#include <command.h>
#include <env.h>
#include <i2c.h>
diff --git a/board/freescale/common/vid.c b/board/freescale/common/vid.c
index fc5d400..84cb43f 100644
--- a/board/freescale/common/vid.c
+++ b/board/freescale/common/vid.c
@@ -5,12 +5,13 @@
* Copyright 2020 Stephen Carlson <stcarlso@linux.microsoft.com>
*/
-#include <common.h>
+#include <config.h>
#include <command.h>
#include <env.h>
#include <i2c.h>
#include <irq_func.h>
#include <log.h>
+#include <vsprintf.h>
#include <asm/io.h>
#ifdef CONFIG_FSL_LSCH2
#include <asm/arch/immap_lsch2.h>
diff --git a/board/freescale/imx8mm_evk/imx8mm_evk.c b/board/freescale/imx8mm_evk/imx8mm_evk.c
index e0975fc..4c4436a 100644
--- a/board/freescale/imx8mm_evk/imx8mm_evk.c
+++ b/board/freescale/imx8mm_evk/imx8mm_evk.c
@@ -3,7 +3,6 @@
* Copyright 2018 NXP
*/
-#include <common.h>
#include <env.h>
#include <init.h>
#include <miiphy.h>
diff --git a/board/freescale/imx8mm_evk/spl.c b/board/freescale/imx8mm_evk/spl.c
index 3543781..cd251d2 100644
--- a/board/freescale/imx8mm_evk/spl.c
+++ b/board/freescale/imx8mm_evk/spl.c
@@ -3,7 +3,6 @@
* Copyright 2019, 2021 NXP
*/
-#include <common.h>
#include <command.h>
#include <cpu_func.h>
#include <hang.h>
diff --git a/board/freescale/imx8mn_evk/imx8mn_evk.c b/board/freescale/imx8mn_evk/imx8mn_evk.c
index e35d505..6b6fb0a 100644
--- a/board/freescale/imx8mn_evk/imx8mn_evk.c
+++ b/board/freescale/imx8mn_evk/imx8mn_evk.c
@@ -3,7 +3,6 @@
* Copyright 2019 NXP
*/
-#include <common.h>
#include <env.h>
#include <init.h>
#include <asm/global_data.h>
diff --git a/board/freescale/imx8mn_evk/spl.c b/board/freescale/imx8mn_evk/spl.c
index dd54fa9..231b928 100644
--- a/board/freescale/imx8mn_evk/spl.c
+++ b/board/freescale/imx8mn_evk/spl.c
@@ -4,7 +4,6 @@
*
*/
-#include <common.h>
#include <command.h>
#include <cpu_func.h>
#include <hang.h>
diff --git a/board/freescale/imx8mp_evk/spl.c b/board/freescale/imx8mp_evk/spl.c
index 9dd2cbc..12da1b2 100644
--- a/board/freescale/imx8mp_evk/spl.c
+++ b/board/freescale/imx8mp_evk/spl.c
@@ -4,7 +4,6 @@
*
*/
-#include <common.h>
#include <hang.h>
#include <init.h>
#include <log.h>
diff --git a/board/freescale/imx8mq_evk/imx8mq_evk.c b/board/freescale/imx8mq_evk/imx8mq_evk.c
index e577e4d..ab920a4 100644
--- a/board/freescale/imx8mq_evk/imx8mq_evk.c
+++ b/board/freescale/imx8mq_evk/imx8mq_evk.c
@@ -3,7 +3,6 @@
* Copyright 2018 NXP
*/
-#include <common.h>
#include <env.h>
#include <init.h>
#include <malloc.h>
diff --git a/board/freescale/imx8mq_evk/lpddr4_timing.c b/board/freescale/imx8mq_evk/lpddr4_timing.c
index 46bc7f8..e9559e3 100644
--- a/board/freescale/imx8mq_evk/lpddr4_timing.c
+++ b/board/freescale/imx8mq_evk/lpddr4_timing.c
@@ -4,7 +4,6 @@
*/
#include <linux/kernel.h>
-#include <common.h>
#include <asm/arch/ddr.h>
#include <asm/arch/lpddr4_define.h>
diff --git a/board/freescale/imx8mq_evk/lpddr4_timing_b0.c b/board/freescale/imx8mq_evk/lpddr4_timing_b0.c
index ec68eda..5d8f280 100644
--- a/board/freescale/imx8mq_evk/lpddr4_timing_b0.c
+++ b/board/freescale/imx8mq_evk/lpddr4_timing_b0.c
@@ -4,7 +4,6 @@
*/
#include <linux/kernel.h>
-#include <common.h>
#include <asm/arch/ddr.h>
#include <asm/arch/lpddr4_define.h>
diff --git a/board/freescale/imx8mq_evk/spl.c b/board/freescale/imx8mq_evk/spl.c
index 818cdd6..a346305 100644
--- a/board/freescale/imx8mq_evk/spl.c
+++ b/board/freescale/imx8mq_evk/spl.c
@@ -4,7 +4,7 @@
*
*/
-#include <common.h>
+#include <config.h>
#include <hang.h>
#include <image.h>
#include <init.h>
diff --git a/board/freescale/imx8qm_mek/imx8qm_mek.c b/board/freescale/imx8qm_mek/imx8qm_mek.c
index 2b209c8..72527f7 100644
--- a/board/freescale/imx8qm_mek/imx8qm_mek.c
+++ b/board/freescale/imx8qm_mek/imx8qm_mek.c
@@ -3,7 +3,6 @@
* Copyright 2018 NXP
*/
-#include <common.h>
#include <cpu_func.h>
#include <env.h>
#include <errno.h>
diff --git a/board/freescale/imx8qm_mek/spl.c b/board/freescale/imx8qm_mek/spl.c
index 17fd437..ad78683 100644
--- a/board/freescale/imx8qm_mek/spl.c
+++ b/board/freescale/imx8qm_mek/spl.c
@@ -4,7 +4,6 @@
*
*/
-#include <common.h>
#include <dm.h>
#include <image.h>
#include <init.h>
diff --git a/board/freescale/imx8qxp_mek/imx8qxp_mek.c b/board/freescale/imx8qxp_mek/imx8qxp_mek.c
index 833bee5..adb9556 100644
--- a/board/freescale/imx8qxp_mek/imx8qxp_mek.c
+++ b/board/freescale/imx8qxp_mek/imx8qxp_mek.c
@@ -3,7 +3,6 @@
* Copyright 2018 NXP
*/
-#include <common.h>
#include <cpu_func.h>
#include <env.h>
#include <errno.h>
diff --git a/board/freescale/imx8qxp_mek/spl.c b/board/freescale/imx8qxp_mek/spl.c
index 462c43c..05e3c0a 100644
--- a/board/freescale/imx8qxp_mek/spl.c
+++ b/board/freescale/imx8qxp_mek/spl.c
@@ -4,7 +4,6 @@
*
*/
-#include <common.h>
#include <dm.h>
#include <image.h>
#include <init.h>
diff --git a/board/freescale/imx8ulp_evk/imx8ulp_evk.c b/board/freescale/imx8ulp_evk/imx8ulp_evk.c
index dd04d59..0af6106 100644
--- a/board/freescale/imx8ulp_evk/imx8ulp_evk.c
+++ b/board/freescale/imx8ulp_evk/imx8ulp_evk.c
@@ -3,7 +3,6 @@
* Copyright 2020 NXP
*/
-#include <common.h>
#include <miiphy.h>
#include <netdev.h>
#include <asm/arch/imx8ulp-pins.h>
diff --git a/board/freescale/imx8ulp_evk/spl.c b/board/freescale/imx8ulp_evk/spl.c
index c49b5be..d123b21 100644
--- a/board/freescale/imx8ulp_evk/spl.c
+++ b/board/freescale/imx8ulp_evk/spl.c
@@ -3,7 +3,6 @@
* Copyright 2021 NXP
*/
-#include <common.h>
#include <init.h>
#include <spl.h>
#include <asm/io.h>
diff --git a/board/freescale/imx93_evk/imx93_evk.c b/board/freescale/imx93_evk/imx93_evk.c
index c54dc9d..341831a 100644
--- a/board/freescale/imx93_evk/imx93_evk.c
+++ b/board/freescale/imx93_evk/imx93_evk.c
@@ -3,7 +3,6 @@
* Copyright 2022 NXP
*/
-#include <common.h>
#include <env.h>
#include <init.h>
#include <miiphy.h>
diff --git a/board/freescale/imx93_evk/spl.c b/board/freescale/imx93_evk/spl.c
index 2fd5559..e580713 100644
--- a/board/freescale/imx93_evk/spl.c
+++ b/board/freescale/imx93_evk/spl.c
@@ -3,7 +3,6 @@
* Copyright 2022 NXP
*/
-#include <common.h>
#include <command.h>
#include <cpu_func.h>
#include <hang.h>
@@ -116,12 +115,12 @@
preloader_console_init();
- ret = imx9_probe_mu(NULL, NULL);
+ ret = imx9_probe_mu();
if (ret) {
printf("Fail to init Sentinel API\n");
} else {
- printf("SOC: 0x%x\n", gd->arch.soc_rev);
- printf("LC: 0x%x\n", gd->arch.lifecycle);
+ debug("SOC: 0x%x\n", gd->arch.soc_rev);
+ debug("LC: 0x%x\n", gd->arch.lifecycle);
}
power_init_board();
diff --git a/board/freescale/imxrt1020-evk/imxrt1020-evk.c b/board/freescale/imxrt1020-evk/imxrt1020-evk.c
index 785da60..42a0a67 100644
--- a/board/freescale/imxrt1020-evk/imxrt1020-evk.c
+++ b/board/freescale/imxrt1020-evk/imxrt1020-evk.c
@@ -4,7 +4,6 @@
* Author(s): Giulio Benetti <giulio.benetti@benettiengineering.com>
*/
-#include <common.h>
#include <dm.h>
#include <init.h>
#include <log.h>
diff --git a/board/freescale/imxrt1050-evk/imxrt1050-evk.c b/board/freescale/imxrt1050-evk/imxrt1050-evk.c
index 4cc3def..46a6449 100644
--- a/board/freescale/imxrt1050-evk/imxrt1050-evk.c
+++ b/board/freescale/imxrt1050-evk/imxrt1050-evk.c
@@ -4,7 +4,6 @@
* Author(s): Giulio Benetti <giulio.benetti@benettiengineering.com>
*/
-#include <common.h>
#include <dm.h>
#include <init.h>
#include <log.h>
diff --git a/board/freescale/imxrt1170-evk/imxrt1170-evk.c b/board/freescale/imxrt1170-evk/imxrt1170-evk.c
index 4b82ee5..e10b883 100644
--- a/board/freescale/imxrt1170-evk/imxrt1170-evk.c
+++ b/board/freescale/imxrt1170-evk/imxrt1170-evk.c
@@ -4,7 +4,6 @@
* Author(s): Giulio Benetti <giulio.benetti@benettiengineering.com>
*/
-#include <common.h>
#include <dm.h>
#include <init.h>
#include <log.h>
diff --git a/board/freescale/ls1012afrdm/eth.c b/board/freescale/ls1012afrdm/eth.c
index d2df935..c431e5e 100644
--- a/board/freescale/ls1012afrdm/eth.c
+++ b/board/freescale/ls1012afrdm/eth.c
@@ -4,7 +4,6 @@
* Copyright 2017 NXP
*/
-#include <common.h>
#include <dm.h>
#include <net.h>
#include <asm/io.h>
diff --git a/board/freescale/ls1012afrdm/ls1012afrdm.c b/board/freescale/ls1012afrdm/ls1012afrdm.c
index 271072b..dae2cf0 100644
--- a/board/freescale/ls1012afrdm/ls1012afrdm.c
+++ b/board/freescale/ls1012afrdm/ls1012afrdm.c
@@ -3,7 +3,7 @@
* Copyright 2017-2018, 2021 NXP
*/
-#include <common.h>
+#include <config.h>
#include <fdt_support.h>
#include <i2c.h>
#include <asm/cache.h>
diff --git a/board/freescale/ls1012aqds/eth.c b/board/freescale/ls1012aqds/eth.c
index 38267ac..d5e87c5 100644
--- a/board/freescale/ls1012aqds/eth.c
+++ b/board/freescale/ls1012aqds/eth.c
@@ -4,7 +4,7 @@
* Copyright 2017 NXP
*/
-#include <common.h>
+#include <config.h>
#include <dm.h>
#include <asm/io.h>
#include <netdev.h>
diff --git a/board/freescale/ls1012aqds/ls1012aqds.c b/board/freescale/ls1012aqds/ls1012aqds.c
index a5ea8d6..7d56eb0 100644
--- a/board/freescale/ls1012aqds/ls1012aqds.c
+++ b/board/freescale/ls1012aqds/ls1012aqds.c
@@ -4,7 +4,7 @@
* Copyright 2021 NXP
*/
-#include <common.h>
+#include <config.h>
#include <i2c.h>
#include <fdt_support.h>
#include <asm/cache.h>
diff --git a/board/freescale/ls1012ardb/eth.c b/board/freescale/ls1012ardb/eth.c
index 5c66127..71cb298 100644
--- a/board/freescale/ls1012ardb/eth.c
+++ b/board/freescale/ls1012ardb/eth.c
@@ -4,7 +4,7 @@
* Copyright 2017 NXP
*/
-#include <common.h>
+#include <config.h>
#include <dm.h>
#include <net.h>
#include <asm/io.h>
diff --git a/board/freescale/ls1012ardb/ls1012ardb.c b/board/freescale/ls1012ardb/ls1012ardb.c
index 18f9208..7f8001b 100644
--- a/board/freescale/ls1012ardb/ls1012ardb.c
+++ b/board/freescale/ls1012ardb/ls1012ardb.c
@@ -4,7 +4,7 @@
* Copyright 2021 NXP
*/
-#include <common.h>
+#include <config.h>
#include <command.h>
#include <fdt_support.h>
#include <hang.h>
diff --git a/board/freescale/ls1021aiot/ls1021aiot.c b/board/freescale/ls1021aiot/ls1021aiot.c
index d6f22bd..7abc412 100644
--- a/board/freescale/ls1021aiot/ls1021aiot.c
+++ b/board/freescale/ls1021aiot/ls1021aiot.c
@@ -4,7 +4,7 @@
* Copyright 2021 NXP
*/
-#include <common.h>
+#include <config.h>
#include <clock_legacy.h>
#include <fdt_support.h>
#include <init.h>
diff --git a/board/freescale/ls1021aqds/ddr.c b/board/freescale/ls1021aqds/ddr.c
index 4e70acc..5b0f236 100644
--- a/board/freescale/ls1021aqds/ddr.c
+++ b/board/freescale/ls1021aqds/ddr.c
@@ -3,7 +3,7 @@
* Copyright 2014 Freescale Semiconductor, Inc.
*/
-#include <common.h>
+#include <config.h>
#include <fsl_ddr_sdram.h>
#include <fsl_ddr_dimm_params.h>
#include <init.h>
diff --git a/board/freescale/ls1028a/ddr.c b/board/freescale/ls1028a/ddr.c
index 3e976da..c406f24 100644
--- a/board/freescale/ls1028a/ddr.c
+++ b/board/freescale/ls1028a/ddr.c
@@ -3,7 +3,6 @@
* Copyright 2019 NXP
*/
-#include <common.h>
#include <fsl_ddr_sdram.h>
#include <fsl_ddr_dimm_params.h>
#include <asm/global_data.h>
diff --git a/board/freescale/ls1028a/ls1028a.c b/board/freescale/ls1028a/ls1028a.c
index 7f181ab..e01b5a8 100644
--- a/board/freescale/ls1028a/ls1028a.c
+++ b/board/freescale/ls1028a/ls1028a.c
@@ -3,7 +3,7 @@
* Copyright 2019-2022 NXP
*/
-#include <common.h>
+#include <config.h>
#include <display_options.h>
#include <init.h>
#include <malloc.h>
diff --git a/board/freescale/ls1043aqds/ddr.c b/board/freescale/ls1043aqds/ddr.c
index 23947bd..2a9717d 100644
--- a/board/freescale/ls1043aqds/ddr.c
+++ b/board/freescale/ls1043aqds/ddr.c
@@ -3,7 +3,6 @@
* Copyright 2015 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <fsl_ddr_sdram.h>
#include <fsl_ddr_dimm_params.h>
#ifdef CONFIG_FSL_DEEP_SLEEP
diff --git a/board/freescale/ls1043aqds/eth.c b/board/freescale/ls1043aqds/eth.c
index cd1f83e..5a8ca27 100644
--- a/board/freescale/ls1043aqds/eth.c
+++ b/board/freescale/ls1043aqds/eth.c
@@ -4,7 +4,7 @@
* Copyright 2019 NXP
*/
-#include <common.h>
+#include <config.h>
#include <log.h>
#include <net.h>
#include <asm/io.h>
diff --git a/board/freescale/ls1043aqds/ls1043aqds.c b/board/freescale/ls1043aqds/ls1043aqds.c
index b87da41..fdf011e 100644
--- a/board/freescale/ls1043aqds/ls1043aqds.c
+++ b/board/freescale/ls1043aqds/ls1043aqds.c
@@ -4,7 +4,7 @@
* Copyright 2019-2020 NXP
*/
-#include <common.h>
+#include <config.h>
#include <clock_legacy.h>
#include <i2c.h>
#include <fdt_support.h>
diff --git a/board/freescale/ls1043ardb/cpld.c b/board/freescale/ls1043ardb/cpld.c
index 9db3aa5..bda2f3a 100644
--- a/board/freescale/ls1043ardb/cpld.c
+++ b/board/freescale/ls1043ardb/cpld.c
@@ -5,7 +5,7 @@
* Freescale LS1043ARDB board-specific CPLD controlling supports.
*/
-#include <common.h>
+#include <config.h>
#include <command.h>
#include <asm/io.h>
#include "cpld.h"
diff --git a/board/freescale/ls1043ardb/ddr.c b/board/freescale/ls1043ardb/ddr.c
index 4d2fce3..187925e 100644
--- a/board/freescale/ls1043ardb/ddr.c
+++ b/board/freescale/ls1043ardb/ddr.c
@@ -3,7 +3,6 @@
* Copyright 2015 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <fsl_ddr_sdram.h>
#include <fsl_ddr_dimm_params.h>
#include <asm/global_data.h>
diff --git a/board/freescale/ls1043ardb/eth.c b/board/freescale/ls1043ardb/eth.c
index cc95214..cacc49c 100644
--- a/board/freescale/ls1043ardb/eth.c
+++ b/board/freescale/ls1043ardb/eth.c
@@ -2,7 +2,7 @@
/*
* Copyright 2015 Freescale Semiconductor, Inc.
*/
-#include <common.h>
+#include <config.h>
#include <net.h>
#include <asm/io.h>
#include <netdev.h>
diff --git a/board/freescale/ls1046afrwy/ddr.c b/board/freescale/ls1046afrwy/ddr.c
index 256397b..b08caee 100644
--- a/board/freescale/ls1046afrwy/ddr.c
+++ b/board/freescale/ls1046afrwy/ddr.c
@@ -3,7 +3,6 @@
* Copyright 2019 NXP
*/
-#include <common.h>
#include <fsl_ddr_sdram.h>
#include <asm/global_data.h>
diff --git a/board/freescale/ls1046afrwy/eth.c b/board/freescale/ls1046afrwy/eth.c
index d1a2bfe..8efc7f6 100644
--- a/board/freescale/ls1046afrwy/eth.c
+++ b/board/freescale/ls1046afrwy/eth.c
@@ -2,7 +2,7 @@
/*
* Copyright 2019 NXP
*/
-#include <common.h>
+#include <config.h>
#include <fdt_support.h>
#include <net.h>
#include <asm/io.h>
diff --git a/board/freescale/ls1046afrwy/ls1046afrwy.c b/board/freescale/ls1046afrwy/ls1046afrwy.c
index 899c22a..8889c24 100644
--- a/board/freescale/ls1046afrwy/ls1046afrwy.c
+++ b/board/freescale/ls1046afrwy/ls1046afrwy.c
@@ -3,7 +3,7 @@
* Copyright 2019, 2021 NXP
*/
-#include <common.h>
+#include <config.h>
#include <i2c.h>
#include <fdt_support.h>
#include <init.h>
diff --git a/board/freescale/ls1046aqds/ddr.c b/board/freescale/ls1046aqds/ddr.c
index 9a96de2..ac1b604 100644
--- a/board/freescale/ls1046aqds/ddr.c
+++ b/board/freescale/ls1046aqds/ddr.c
@@ -3,7 +3,6 @@
* Copyright 2016 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <fsl_ddr_sdram.h>
#include <fsl_ddr_dimm_params.h>
#ifdef CONFIG_FSL_DEEP_SLEEP
diff --git a/board/freescale/ls1046aqds/eth.c b/board/freescale/ls1046aqds/eth.c
index bbf8b8c..cd3500c 100644
--- a/board/freescale/ls1046aqds/eth.c
+++ b/board/freescale/ls1046aqds/eth.c
@@ -4,7 +4,7 @@
* Copyright 2018-2020 NXP
*/
-#include <common.h>
+#include <config.h>
#include <log.h>
#include <net.h>
#include <asm/io.h>
diff --git a/board/freescale/ls1046aqds/ls1046aqds.c b/board/freescale/ls1046aqds/ls1046aqds.c
index 2faac54..a83b217 100644
--- a/board/freescale/ls1046aqds/ls1046aqds.c
+++ b/board/freescale/ls1046aqds/ls1046aqds.c
@@ -4,7 +4,7 @@
* Copyright 2019-2021 NXP
*/
-#include <common.h>
+#include <config.h>
#include <clock_legacy.h>
#include <i2c.h>
#include <fdt_support.h>
diff --git a/board/freescale/ls1046ardb/cpld.c b/board/freescale/ls1046ardb/cpld.c
index ee19d4f..7f8ca2e 100644
--- a/board/freescale/ls1046ardb/cpld.c
+++ b/board/freescale/ls1046ardb/cpld.c
@@ -5,7 +5,7 @@
* Freescale LS1046ARDB board-specific CPLD controlling supports.
*/
-#include <common.h>
+#include <config.h>
#include <command.h>
#include <asm/io.h>
#include "cpld.h"
diff --git a/board/freescale/ls1046ardb/ddr.c b/board/freescale/ls1046ardb/ddr.c
index befb556..6835302 100644
--- a/board/freescale/ls1046ardb/ddr.c
+++ b/board/freescale/ls1046ardb/ddr.c
@@ -3,7 +3,6 @@
* Copyright 2016 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <fsl_ddr_sdram.h>
#include <fsl_ddr_dimm_params.h>
#include <asm/global_data.h>
diff --git a/board/freescale/ls1046ardb/eth.c b/board/freescale/ls1046ardb/eth.c
index bbc22a3..fee8e0e 100644
--- a/board/freescale/ls1046ardb/eth.c
+++ b/board/freescale/ls1046ardb/eth.c
@@ -2,7 +2,7 @@
/*
* Copyright 2016 Freescale Semiconductor, Inc.
*/
-#include <common.h>
+#include <config.h>
#include <fdt_support.h>
#include <net.h>
#include <asm/io.h>
diff --git a/board/freescale/ls1046ardb/ls1046ardb.c b/board/freescale/ls1046ardb/ls1046ardb.c
index 26e69db..0492f0a 100644
--- a/board/freescale/ls1046ardb/ls1046ardb.c
+++ b/board/freescale/ls1046ardb/ls1046ardb.c
@@ -4,7 +4,7 @@
* Copyright 2021 NXP
*/
-#include <common.h>
+#include <config.h>
#include <i2c.h>
#include <fdt_support.h>
#include <init.h>
diff --git a/board/freescale/ls1088a/ddr.c b/board/freescale/ls1088a/ddr.c
index 9e0941c..d2e239c 100644
--- a/board/freescale/ls1088a/ddr.c
+++ b/board/freescale/ls1088a/ddr.c
@@ -3,7 +3,6 @@
* Copyright 2017 NXP
*/
-#include <common.h>
#include <fsl_ddr_sdram.h>
#include <fsl_ddr_dimm_params.h>
#include <log.h>
diff --git a/board/freescale/ls1088a/ls1088a.c b/board/freescale/ls1088a/ls1088a.c
index 98a91c4..58951f2 100644
--- a/board/freescale/ls1088a/ls1088a.c
+++ b/board/freescale/ls1088a/ls1088a.c
@@ -2,7 +2,7 @@
/*
* Copyright 2017-2022 NXP
*/
-#include <common.h>
+#include <config.h>
#include <clock_legacy.h>
#include <display_options.h>
#include <env.h>
diff --git a/board/freescale/ls2080aqds/ddr.c b/board/freescale/ls2080aqds/ddr.c
index 2767d05..2986ffb 100644
--- a/board/freescale/ls2080aqds/ddr.c
+++ b/board/freescale/ls2080aqds/ddr.c
@@ -3,7 +3,6 @@
* Copyright 2015 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <fsl_ddr_sdram.h>
#include <fsl_ddr_dimm_params.h>
#include <log.h>
diff --git a/board/freescale/ls2080aqds/ls2080aqds.c b/board/freescale/ls2080aqds/ls2080aqds.c
index 5c94c83..4c8d070 100644
--- a/board/freescale/ls2080aqds/ls2080aqds.c
+++ b/board/freescale/ls2080aqds/ls2080aqds.c
@@ -3,7 +3,7 @@
* Copyright 2015 Freescale Semiconductor
* Copyright 2021 NXP
*/
-#include <common.h>
+#include <config.h>
#include <clock_legacy.h>
#include <display_options.h>
#include <env.h>
diff --git a/board/freescale/ls2080ardb/ddr.c b/board/freescale/ls2080ardb/ddr.c
index 07fa847..ec34b42 100644
--- a/board/freescale/ls2080ardb/ddr.c
+++ b/board/freescale/ls2080ardb/ddr.c
@@ -3,7 +3,6 @@
* Copyright 2015 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <fsl_ddr_sdram.h>
#include <fsl_ddr_dimm_params.h>
#include <log.h>
diff --git a/board/freescale/ls2080ardb/ls2080ardb.c b/board/freescale/ls2080ardb/ls2080ardb.c
index 5c30de8..6f824f5 100644
--- a/board/freescale/ls2080ardb/ls2080ardb.c
+++ b/board/freescale/ls2080ardb/ls2080ardb.c
@@ -3,7 +3,7 @@
* Copyright 2015 Freescale Semiconductor
* Copyright 2017, 2021 NXP
*/
-#include <common.h>
+#include <config.h>
#include <clock_legacy.h>
#include <display_options.h>
#include <env.h>
diff --git a/board/freescale/lx2160a/ddr.c b/board/freescale/lx2160a/ddr.c
index 7ab7a9e..637e43a 100644
--- a/board/freescale/lx2160a/ddr.c
+++ b/board/freescale/lx2160a/ddr.c
@@ -3,7 +3,6 @@
* Copyright 2018 NXP
*/
-#include <common.h>
#include <fsl_ddr_sdram.h>
#include <fsl_ddr_dimm_params.h>
#include <asm/global_data.h>
diff --git a/board/freescale/lx2160a/eth_lx2160ardb.c b/board/freescale/lx2160a/eth_lx2160ardb.c
index c5dfefe..90e7c91 100644
--- a/board/freescale/lx2160a/eth_lx2160ardb.c
+++ b/board/freescale/lx2160a/eth_lx2160ardb.c
@@ -4,7 +4,6 @@
*
*/
-#include <common.h>
#include <netdev.h>
#include <exports.h>
#include <fsl-mc/fsl_mc.h>
diff --git a/board/freescale/lx2160a/lx2160a.c b/board/freescale/lx2160a/lx2160a.c
index b3187a1..3aa984d 100644
--- a/board/freescale/lx2160a/lx2160a.c
+++ b/board/freescale/lx2160a/lx2160a.c
@@ -3,7 +3,7 @@
* Copyright 2018-2021 NXP
*/
-#include <common.h>
+#include <config.h>
#include <clock_legacy.h>
#include <display_options.h>
#include <dm.h>
diff --git a/board/freescale/m5208evbe/m5208evbe.c b/board/freescale/m5208evbe/m5208evbe.c
index 6125c9e..b202b80 100644
--- a/board/freescale/m5208evbe/m5208evbe.c
+++ b/board/freescale/m5208evbe/m5208evbe.c
@@ -8,7 +8,6 @@
*/
#include <config.h>
-#include <common.h>
#include <init.h>
#include <asm/global_data.h>
#include <asm/immap.h>
diff --git a/board/freescale/m5235evb/m5235evb.c b/board/freescale/m5235evb/m5235evb.c
index 44161a0..65cde56 100644
--- a/board/freescale/m5235evb/m5235evb.c
+++ b/board/freescale/m5235evb/m5235evb.c
@@ -8,7 +8,6 @@
*/
#include <config.h>
-#include <common.h>
#include <init.h>
#include <asm/global_data.h>
#include <asm/immap.h>
diff --git a/board/freescale/m5249evb/m5249evb.c b/board/freescale/m5249evb/m5249evb.c
index d67db24..717dc08 100644
--- a/board/freescale/m5249evb/m5249evb.c
+++ b/board/freescale/m5249evb/m5249evb.c
@@ -4,7 +4,7 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
+#include <config.h>
#include <command.h>
#include <init.h>
#include <malloc.h>
diff --git a/board/freescale/m5253demo/flash.c b/board/freescale/m5253demo/flash.c
index eeb9cfd..334518a 100644
--- a/board/freescale/m5253demo/flash.c
+++ b/board/freescale/m5253demo/flash.c
@@ -7,10 +7,11 @@
* TsiChung Liew (Tsi-Chung.Liew@freescale.com)
*/
-#include <common.h>
+#include <config.h>
#include <flash.h>
#include <init.h>
#include <irq_func.h>
+#include <time.h>
#include <asm/immap.h>
diff --git a/board/freescale/m5253demo/m5253demo.c b/board/freescale/m5253demo/m5253demo.c
index c1cff52..d0b01f8 100644
--- a/board/freescale/m5253demo/m5253demo.c
+++ b/board/freescale/m5253demo/m5253demo.c
@@ -7,7 +7,7 @@
* Hayden Fraser (Hayden.Fraser@freescale.com)
*/
-#include <common.h>
+#include <config.h>
#include <init.h>
#include <net.h>
#include <asm/global_data.h>
diff --git a/board/freescale/m5272c3/m5272c3.c b/board/freescale/m5272c3/m5272c3.c
index 3c20a23..d1286ba 100644
--- a/board/freescale/m5272c3/m5272c3.c
+++ b/board/freescale/m5272c3/m5272c3.c
@@ -6,7 +6,7 @@
* Copyright (C) 2012 Freescale Semiconductor, Inc. All Rights Reserved.
*/
-#include <common.h>
+#include <config.h>
#include <init.h>
#include <asm/global_data.h>
#include <asm/immap.h>
diff --git a/board/freescale/m5275evb/m5275evb.c b/board/freescale/m5275evb/m5275evb.c
index 00fa35c..e1d94fc 100644
--- a/board/freescale/m5275evb/m5275evb.c
+++ b/board/freescale/m5275evb/m5275evb.c
@@ -8,7 +8,7 @@
* Copyright (C) 2012 Freescale Semiconductor, Inc. All Rights Reserved.
*/
-#include <common.h>
+#include <config.h>
#include <init.h>
#include <asm/global_data.h>
#include <asm/immap.h>
diff --git a/board/freescale/m5282evb/m5282evb.c b/board/freescale/m5282evb/m5282evb.c
index 53e0f20..81da6e2 100644
--- a/board/freescale/m5282evb/m5282evb.c
+++ b/board/freescale/m5282evb/m5282evb.c
@@ -4,7 +4,7 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
+#include <config.h>
#include <init.h>
#include <asm/global_data.h>
#include <asm/immap.h>
diff --git a/board/freescale/m53017evb/m53017evb.c b/board/freescale/m53017evb/m53017evb.c
index 76ebc0a..196d56d 100644
--- a/board/freescale/m53017evb/m53017evb.c
+++ b/board/freescale/m53017evb/m53017evb.c
@@ -8,7 +8,6 @@
*/
#include <config.h>
-#include <common.h>
#include <init.h>
#include <asm/global_data.h>
#include <asm/immap.h>
diff --git a/board/freescale/m5329evb/m5329evb.c b/board/freescale/m5329evb/m5329evb.c
index b278dbf..26d5f3b 100644
--- a/board/freescale/m5329evb/m5329evb.c
+++ b/board/freescale/m5329evb/m5329evb.c
@@ -8,7 +8,6 @@
*/
#include <config.h>
-#include <common.h>
#include <init.h>
#include <asm/global_data.h>
#include <asm/immap.h>
diff --git a/board/freescale/m5329evb/nand.c b/board/freescale/m5329evb/nand.c
index d921eef..a250d61 100644
--- a/board/freescale/m5329evb/nand.c
+++ b/board/freescale/m5329evb/nand.c
@@ -8,7 +8,6 @@
*/
#include <config.h>
-#include <common.h>
#include <asm/io.h>
#include <asm/immap.h>
diff --git a/board/freescale/m5373evb/m5373evb.c b/board/freescale/m5373evb/m5373evb.c
index 0e9eec3..d6fdf41 100644
--- a/board/freescale/m5373evb/m5373evb.c
+++ b/board/freescale/m5373evb/m5373evb.c
@@ -8,7 +8,6 @@
*/
#include <config.h>
-#include <common.h>
#include <init.h>
#include <asm/global_data.h>
#include <asm/immap.h>
diff --git a/board/freescale/m5373evb/nand.c b/board/freescale/m5373evb/nand.c
index 6d825a6..e7c08d2 100644
--- a/board/freescale/m5373evb/nand.c
+++ b/board/freescale/m5373evb/nand.c
@@ -8,7 +8,6 @@
*/
#include <config.h>
-#include <common.h>
#include <asm/io.h>
#include <asm/immap.h>
diff --git a/board/freescale/mpc837xerdb/mpc837xerdb.c b/board/freescale/mpc837xerdb/mpc837xerdb.c
index 97884a3..5529974 100644
--- a/board/freescale/mpc837xerdb/mpc837xerdb.c
+++ b/board/freescale/mpc837xerdb/mpc837xerdb.c
@@ -5,7 +5,7 @@
* Joe D'Abbraccio <joe.d'abbraccio@freescale.com>
*/
-#include <common.h>
+#include <config.h>
#include <env.h>
#include <hwconfig.h>
#include <i2c.h>
diff --git a/board/freescale/mpc8548cds/ddr.c b/board/freescale/mpc8548cds/ddr.c
index b6c1847..14202cd 100644
--- a/board/freescale/mpc8548cds/ddr.c
+++ b/board/freescale/mpc8548cds/ddr.c
@@ -3,7 +3,6 @@
* Copyright 2008 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <fsl_ddr_sdram.h>
#include <fsl_ddr_dimm_params.h>
diff --git a/board/freescale/mpc8548cds/law.c b/board/freescale/mpc8548cds/law.c
index 7b6ef5b..2334870 100644
--- a/board/freescale/mpc8548cds/law.c
+++ b/board/freescale/mpc8548cds/law.c
@@ -6,7 +6,7 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
+#include <config.h>
#include <asm/fsl_law.h>
#include <asm/mmu.h>
diff --git a/board/freescale/mpc8548cds/mpc8548cds.c b/board/freescale/mpc8548cds/mpc8548cds.c
index ec6e3a2..7810010 100644
--- a/board/freescale/mpc8548cds/mpc8548cds.c
+++ b/board/freescale/mpc8548cds/mpc8548cds.c
@@ -5,7 +5,7 @@
* (C) Copyright 2002 Scott McNutt <smcnutt@artesyncp.com>
*/
-#include <common.h>
+#include <config.h>
#include <display_options.h>
#include <init.h>
#include <net.h>
diff --git a/board/freescale/mpc8548cds/tlb.c b/board/freescale/mpc8548cds/tlb.c
index 994a32d..0b2afa8 100644
--- a/board/freescale/mpc8548cds/tlb.c
+++ b/board/freescale/mpc8548cds/tlb.c
@@ -6,8 +6,9 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
+#include <config.h>
#include <asm/mmu.h>
+#include <asm/ppc.h>
struct fsl_e_tlb_entry tlb_table[] = {
/* TLB 0 - for temp stack in cache */
diff --git a/board/freescale/mx23evk/mx23evk.c b/board/freescale/mx23evk/mx23evk.c
index df4fb39..fbc8fbd 100644
--- a/board/freescale/mx23evk/mx23evk.c
+++ b/board/freescale/mx23evk/mx23evk.c
@@ -11,7 +11,6 @@
* on behalf of DENX Software Engineering GmbH
*/
-#include <common.h>
#include <init.h>
#include <asm/global_data.h>
#include <asm/gpio.h>
diff --git a/board/freescale/mx23evk/spl_boot.c b/board/freescale/mx23evk/spl_boot.c
index 14e9b4a..a4c39a3 100644
--- a/board/freescale/mx23evk/spl_boot.c
+++ b/board/freescale/mx23evk/spl_boot.c
@@ -6,7 +6,6 @@
* on behalf of DENX Software Engineering GmbH
*/
-#include <common.h>
#include <config.h>
#include <asm/io.h>
#include <asm/arch/iomux-mx23.h>
diff --git a/board/freescale/mx28evk/iomux.c b/board/freescale/mx28evk/iomux.c
index cc0c858..b84b045 100644
--- a/board/freescale/mx28evk/iomux.c
+++ b/board/freescale/mx28evk/iomux.c
@@ -6,7 +6,6 @@
* on behalf of DENX Software Engineering GmbH
*/
-#include <common.h>
#include <config.h>
#include <asm/io.h>
#include <asm/arch/iomux-mx28.h>
diff --git a/board/freescale/mx28evk/mx28evk.c b/board/freescale/mx28evk/mx28evk.c
index 88c3bf3..ada5729 100644
--- a/board/freescale/mx28evk/mx28evk.c
+++ b/board/freescale/mx28evk/mx28evk.c
@@ -11,7 +11,6 @@
* on behalf of DENX Software Engineering GmbH
*/
-#include <common.h>
#include <init.h>
#include <net.h>
#include <asm/global_data.h>
diff --git a/board/freescale/mx51evk/mx51evk.c b/board/freescale/mx51evk/mx51evk.c
index 95edb35..6945684 100644
--- a/board/freescale/mx51evk/mx51evk.c
+++ b/board/freescale/mx51evk/mx51evk.c
@@ -3,7 +3,7 @@
* (C) Copyright 2009 Freescale Semiconductor, Inc.
*/
-#include <common.h>
+#include <config.h>
#include <init.h>
#include <asm/global_data.h>
#include <asm/io.h>
diff --git a/board/freescale/mx53loco/mx53loco.c b/board/freescale/mx53loco/mx53loco.c
index d418cd8..2d8f5da 100644
--- a/board/freescale/mx53loco/mx53loco.c
+++ b/board/freescale/mx53loco/mx53loco.c
@@ -4,7 +4,7 @@
* Jason Liu <r64343@freescale.com>
*/
-#include <common.h>
+#include <config.h>
#include <init.h>
#include <log.h>
#include <asm/global_data.h>
diff --git a/board/freescale/mx6memcal/mx6memcal.c b/board/freescale/mx6memcal/mx6memcal.c
index 0dfd7de..17095c3 100644
--- a/board/freescale/mx6memcal/mx6memcal.c
+++ b/board/freescale/mx6memcal/mx6memcal.c
@@ -7,7 +7,6 @@
* Author: Eric Nelson <eric@nelint.com>
*/
-#include <common.h>
#include <init.h>
#include <asm/arch/sys_proto.h>
#include <asm/global_data.h>
diff --git a/board/freescale/mx6memcal/spl.c b/board/freescale/mx6memcal/spl.c
index 61d0ca3..bc9c425 100644
--- a/board/freescale/mx6memcal/spl.c
+++ b/board/freescale/mx6memcal/spl.c
@@ -4,7 +4,6 @@
* Author: Eric Nelson <eric@nelint.com>
*/
-#include <common.h>
#include <cpu_func.h>
#include <init.h>
#include <asm/global_data.h>
diff --git a/board/freescale/mx6sabreauto/mx6sabreauto.c b/board/freescale/mx6sabreauto/mx6sabreauto.c
index 77e9200..e782543 100644
--- a/board/freescale/mx6sabreauto/mx6sabreauto.c
+++ b/board/freescale/mx6sabreauto/mx6sabreauto.c
@@ -5,7 +5,6 @@
* Author: Fabio Estevam <fabio.estevam@freescale.com>
*/
-#include <common.h>
#include <image.h>
#include <init.h>
#include <net.h>
diff --git a/board/freescale/mx6slevk/mx6slevk.c b/board/freescale/mx6slevk/mx6slevk.c
index e9ac571..d37d8a4 100644
--- a/board/freescale/mx6slevk/mx6slevk.c
+++ b/board/freescale/mx6slevk/mx6slevk.c
@@ -21,7 +21,6 @@
#include <asm/io.h>
#include <asm/sections.h>
#include <linux/sizes.h>
-#include <common.h>
#include <fsl_esdhc_imx.h>
#include <i2c.h>
#include <mmc.h>
diff --git a/board/freescale/mx6sllevk/mx6sllevk.c b/board/freescale/mx6sllevk/mx6sllevk.c
index 10a0009..7114444 100644
--- a/board/freescale/mx6sllevk/mx6sllevk.c
+++ b/board/freescale/mx6sllevk/mx6sllevk.c
@@ -15,7 +15,6 @@
#include <asm/mach-imx/iomux-v3.h>
#include <asm/mach-imx/boot_mode.h>
#include <asm/io.h>
-#include <common.h>
#include <linux/sizes.h>
#include <mmc.h>
#include <power/pmic.h>
diff --git a/board/freescale/mx6sxsabreauto/mx6sxsabreauto.c b/board/freescale/mx6sxsabreauto/mx6sxsabreauto.c
index 84cc51e..6176f73 100644
--- a/board/freescale/mx6sxsabreauto/mx6sxsabreauto.c
+++ b/board/freescale/mx6sxsabreauto/mx6sxsabreauto.c
@@ -20,7 +20,7 @@
#include <asm/io.h>
#include <linux/delay.h>
#include <linux/sizes.h>
-#include <common.h>
+#include <config.h>
#include <fsl_esdhc_imx.h>
#include <miiphy.h>
#include <netdev.h>
diff --git a/board/freescale/mx6sxsabresd/mx6sxsabresd.c b/board/freescale/mx6sxsabresd/mx6sxsabresd.c
index e7958df..e3353fe 100644
--- a/board/freescale/mx6sxsabresd/mx6sxsabresd.c
+++ b/board/freescale/mx6sxsabresd/mx6sxsabresd.c
@@ -21,7 +21,6 @@
#include <env.h>
#include <linux/delay.h>
#include <linux/sizes.h>
-#include <common.h>
#include <fsl_esdhc_imx.h>
#include <mmc.h>
#include <i2c.h>
diff --git a/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c b/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c
index 534b16c..6b0665a 100644
--- a/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c
+++ b/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c
@@ -19,7 +19,7 @@
#include <asm/mach-imx/mxc_i2c.h>
#include <asm/io.h>
#include <asm/sections.h>
-#include <common.h>
+#include <config.h>
#include <env.h>
#include <fsl_esdhc_imx.h>
#include <i2c.h>
diff --git a/board/freescale/mx6ullevk/mx6ullevk.c b/board/freescale/mx6ullevk/mx6ullevk.c
index de45f8b..189edde 100644
--- a/board/freescale/mx6ullevk/mx6ullevk.c
+++ b/board/freescale/mx6ullevk/mx6ullevk.c
@@ -15,7 +15,7 @@
#include <asm/mach-imx/iomux-v3.h>
#include <asm/mach-imx/boot_mode.h>
#include <asm/io.h>
-#include <common.h>
+#include <config.h>
#include <env.h>
#include <fsl_esdhc_imx.h>
#include <linux/sizes.h>
diff --git a/board/freescale/mx7dsabresd/mx7dsabresd.c b/board/freescale/mx7dsabresd/mx7dsabresd.c
index 4fe23b5..3db167c 100644
--- a/board/freescale/mx7dsabresd/mx7dsabresd.c
+++ b/board/freescale/mx7dsabresd/mx7dsabresd.c
@@ -15,7 +15,6 @@
#include <asm/io.h>
#include <linux/delay.h>
#include <linux/sizes.h>
-#include <common.h>
#include <fsl_esdhc_imx.h>
#include <mmc.h>
#include <miiphy.h>
diff --git a/board/freescale/mx7ulp_evk/mx7ulp_evk.c b/board/freescale/mx7ulp_evk/mx7ulp_evk.c
index 01e3213..af68e57 100644
--- a/board/freescale/mx7ulp_evk/mx7ulp_evk.c
+++ b/board/freescale/mx7ulp_evk/mx7ulp_evk.c
@@ -3,7 +3,6 @@
* Copyright (C) 2016 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <fdt_support.h>
#include <init.h>
#include <asm/global_data.h>
diff --git a/board/freescale/p1010rdb/ddr.c b/board/freescale/p1010rdb/ddr.c
index b423ec8..43a0936 100644
--- a/board/freescale/p1010rdb/ddr.c
+++ b/board/freescale/p1010rdb/ddr.c
@@ -3,7 +3,6 @@
* Copyright 2010-2011 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <vsprintf.h>
#include <asm/global_data.h>
#include <asm/mmu.h>
diff --git a/board/freescale/p1010rdb/law.c b/board/freescale/p1010rdb/law.c
index 13fc2fa..a7d80f2 100644
--- a/board/freescale/p1010rdb/law.c
+++ b/board/freescale/p1010rdb/law.c
@@ -3,7 +3,7 @@
* Copyright 2010-2011 Freescale Semiconductor, Inc.
*/
-#include <common.h>
+#include <config.h>
#include <asm/fsl_law.h>
#include <asm/mmu.h>
diff --git a/board/freescale/p1010rdb/p1010rdb.c b/board/freescale/p1010rdb/p1010rdb.c
index d32274b..ab00314 100644
--- a/board/freescale/p1010rdb/p1010rdb.c
+++ b/board/freescale/p1010rdb/p1010rdb.c
@@ -4,7 +4,7 @@
* Copyright 2020 NXP
*/
-#include <common.h>
+#include <config.h>
#include <command.h>
#include <image.h>
#include <init.h>
diff --git a/board/freescale/p1010rdb/spl.c b/board/freescale/p1010rdb/spl.c
index e450f62..fc26cef 100644
--- a/board/freescale/p1010rdb/spl.c
+++ b/board/freescale/p1010rdb/spl.c
@@ -2,7 +2,7 @@
/* Copyright 2013 Freescale Semiconductor, Inc.
*/
-#include <common.h>
+#include <config.h>
#include <clock_legacy.h>
#include <console.h>
#include <env.h>
diff --git a/board/freescale/p1010rdb/spl_minimal.c b/board/freescale/p1010rdb/spl_minimal.c
index 8f0dec4..8cd79c6 100644
--- a/board/freescale/p1010rdb/spl_minimal.c
+++ b/board/freescale/p1010rdb/spl_minimal.c
@@ -2,7 +2,7 @@
/*
* Copyright 2011 Freescale Semiconductor, Inc.
*/
-#include <common.h>
+#include <config.h>
#include <clock_legacy.h>
#include <init.h>
#include <mpc85xx.h>
diff --git a/board/freescale/p1010rdb/tlb.c b/board/freescale/p1010rdb/tlb.c
index 265cde8..44aceba 100644
--- a/board/freescale/p1010rdb/tlb.c
+++ b/board/freescale/p1010rdb/tlb.c
@@ -3,8 +3,9 @@
* Copyright 2010-2011 Freescale Semiconductor, Inc.
*/
-#include <common.h>
+#include <config.h>
#include <asm/mmu.h>
+#include <asm/ppc.h>
struct fsl_e_tlb_entry tlb_table[] = {
/* TLB 0 - for temp stack in cache */
diff --git a/board/freescale/p1_p2_rdb_pc/ddr.c b/board/freescale/p1_p2_rdb_pc/ddr.c
index 5f16779..8622a5a 100644
--- a/board/freescale/p1_p2_rdb_pc/ddr.c
+++ b/board/freescale/p1_p2_rdb_pc/ddr.c
@@ -3,11 +3,12 @@
* Copyright 2010-2011 Freescale Semiconductor, Inc.
*/
-#include <common.h>
+#include <config.h>
#include <vsprintf.h>
+#include <linux/string.h>
#include <asm/mmu.h>
#include <asm/immap_85xx.h>
-#include <asm/processor.h>
+#include <asm/ppc.h>
#include <fsl_ddr_sdram.h>
#include <fsl_ddr_dimm_params.h>
#include <asm/io.h>
diff --git a/board/freescale/p1_p2_rdb_pc/law.c b/board/freescale/p1_p2_rdb_pc/law.c
index 6085984..4959407 100644
--- a/board/freescale/p1_p2_rdb_pc/law.c
+++ b/board/freescale/p1_p2_rdb_pc/law.c
@@ -3,7 +3,7 @@
* Copyright 2010-2011 Freescale Semiconductor, Inc.
*/
-#include <common.h>
+#include <config.h>
#include <asm/fsl_law.h>
#include <asm/mmu.h>
diff --git a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
index 602b7f0..399ff72 100644
--- a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
+++ b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
@@ -4,7 +4,7 @@
* Copyright 2020 NXP
*/
-#include <common.h>
+#include <config.h>
#include <command.h>
#include <env.h>
#include <hang.h>
diff --git a/board/freescale/p1_p2_rdb_pc/spl.c b/board/freescale/p1_p2_rdb_pc/spl.c
index 6c3f828..b07f481 100644
--- a/board/freescale/p1_p2_rdb_pc/spl.c
+++ b/board/freescale/p1_p2_rdb_pc/spl.c
@@ -3,7 +3,7 @@
* Copyright 2013 Freescale Semiconductor, Inc.
*/
-#include <common.h>
+#include <config.h>
#include <clock_legacy.h>
#include <console.h>
#include <env.h>
diff --git a/board/freescale/p1_p2_rdb_pc/spl_minimal.c b/board/freescale/p1_p2_rdb_pc/spl_minimal.c
index f9e0b5b..511bcf5 100644
--- a/board/freescale/p1_p2_rdb_pc/spl_minimal.c
+++ b/board/freescale/p1_p2_rdb_pc/spl_minimal.c
@@ -3,7 +3,7 @@
* Copyright 2011 Freescale Semiconductor, Inc.
*/
-#include <common.h>
+#include <config.h>
#include <clock_legacy.h>
#include <init.h>
#include <ns16550.h>
diff --git a/board/freescale/p1_p2_rdb_pc/tlb.c b/board/freescale/p1_p2_rdb_pc/tlb.c
index 9477396..ae0b7ad 100644
--- a/board/freescale/p1_p2_rdb_pc/tlb.c
+++ b/board/freescale/p1_p2_rdb_pc/tlb.c
@@ -3,8 +3,9 @@
* Copyright 2010-2011 Freescale Semiconductor, Inc.
*/
-#include <common.h>
+#include <config.h>
#include <asm/mmu.h>
+#include <asm/ppc.h>
struct fsl_e_tlb_entry tlb_table[] = {
/* TLB 0 - for temp stack in cache */
diff --git a/board/freescale/p2041rdb/cpld.c b/board/freescale/p2041rdb/cpld.c
index a1908b8..915a8b9 100644
--- a/board/freescale/p2041rdb/cpld.c
+++ b/board/freescale/p2041rdb/cpld.c
@@ -11,7 +11,6 @@
* CPLD_BASE - The virtual address of the base of the CPLD register map
*/
-#include <common.h>
#include <command.h>
#include <asm/io.h>
diff --git a/board/freescale/p2041rdb/ddr.c b/board/freescale/p2041rdb/ddr.c
index 910058c..b8b765a 100644
--- a/board/freescale/p2041rdb/ddr.c
+++ b/board/freescale/p2041rdb/ddr.c
@@ -3,7 +3,6 @@
* Copyright 2011 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <i2c.h>
#include <hwconfig.h>
#include <init.h>
diff --git a/board/freescale/p2041rdb/eth.c b/board/freescale/p2041rdb/eth.c
index c0d0553..6585086 100644
--- a/board/freescale/p2041rdb/eth.c
+++ b/board/freescale/p2041rdb/eth.c
@@ -12,7 +12,7 @@
* and serdes protocol selection.
*/
-#include <common.h>
+#include <config.h>
#include <net.h>
#include <netdev.h>
#include <asm/fsl_serdes.h>
diff --git a/board/freescale/p2041rdb/p2041rdb.c b/board/freescale/p2041rdb/p2041rdb.c
index 575259b..d5b71f7 100644
--- a/board/freescale/p2041rdb/p2041rdb.c
+++ b/board/freescale/p2041rdb/p2041rdb.c
@@ -3,7 +3,7 @@
* Copyright 2011,2012 Freescale Semiconductor, Inc.
*/
-#include <common.h>
+#include <config.h>
#include <clock_legacy.h>
#include <command.h>
#include <env.h>
diff --git a/board/freescale/t102xrdb/cpld.c b/board/freescale/t102xrdb/cpld.c
index 17a6226..cc933cc 100644
--- a/board/freescale/t102xrdb/cpld.c
+++ b/board/freescale/t102xrdb/cpld.c
@@ -7,7 +7,7 @@
* The following macros need to be defined:
*/
-#include <common.h>
+#include <config.h>
#include <command.h>
#include <asm/io.h>
#include "cpld.h"
diff --git a/board/freescale/t102xrdb/ddr.c b/board/freescale/t102xrdb/ddr.c
index 1b41739..f8d504f 100644
--- a/board/freescale/t102xrdb/ddr.c
+++ b/board/freescale/t102xrdb/ddr.c
@@ -3,7 +3,7 @@
* Copyright 2014 Freescale Semiconductor, Inc.
*/
-#include <common.h>
+#include <config.h>
#include <i2c.h>
#include <hwconfig.h>
#include <init.h>
diff --git a/board/freescale/t102xrdb/eth_t102xrdb.c b/board/freescale/t102xrdb/eth_t102xrdb.c
index ad78f72..7185a0a 100644
--- a/board/freescale/t102xrdb/eth_t102xrdb.c
+++ b/board/freescale/t102xrdb/eth_t102xrdb.c
@@ -5,7 +5,7 @@
* Shengzhou Liu <Shengzhou.Liu@freescale.com>
*/
-#include <common.h>
+#include <config.h>
#include <command.h>
#include <fdt_support.h>
#include <net.h>
diff --git a/board/freescale/t102xrdb/law.c b/board/freescale/t102xrdb/law.c
index d636bef..81caa96 100644
--- a/board/freescale/t102xrdb/law.c
+++ b/board/freescale/t102xrdb/law.c
@@ -3,7 +3,7 @@
* Copyright 2014 Freescale Semiconductor, Inc.
*/
-#include <common.h>
+#include <config.h>
#include <asm/fsl_law.h>
#include <asm/mmu.h>
diff --git a/board/freescale/t102xrdb/spl.c b/board/freescale/t102xrdb/spl.c
index 9faf259..de6cdda 100644
--- a/board/freescale/t102xrdb/spl.c
+++ b/board/freescale/t102xrdb/spl.c
@@ -2,7 +2,7 @@
/* Copyright 2014 Freescale Semiconductor, Inc.
*/
-#include <common.h>
+#include <config.h>
#include <clock_legacy.h>
#include <console.h>
#include <env_internal.h>
diff --git a/board/freescale/t102xrdb/t102xrdb.c b/board/freescale/t102xrdb/t102xrdb.c
index 73f9d3a..0a29e27 100644
--- a/board/freescale/t102xrdb/t102xrdb.c
+++ b/board/freescale/t102xrdb/t102xrdb.c
@@ -4,7 +4,7 @@
* Copyright 2020-2023 NXP
*/
-#include <common.h>
+#include <config.h>
#include <command.h>
#include <env.h>
#include <fdt_support.h>
diff --git a/board/freescale/t102xrdb/tlb.c b/board/freescale/t102xrdb/tlb.c
index 2519a9e..008bd6e 100644
--- a/board/freescale/t102xrdb/tlb.c
+++ b/board/freescale/t102xrdb/tlb.c
@@ -3,8 +3,9 @@
* Copyright 2014 Freescale Semiconductor, Inc.
*/
-#include <common.h>
+#include <config.h>
#include <asm/mmu.h>
+#include <asm/ppc.h>
struct fsl_e_tlb_entry tlb_table[] = {
/* TLB 0 - for temp stack in cache */
diff --git a/board/freescale/t104xrdb/cpld.c b/board/freescale/t104xrdb/cpld.c
index 9ac57bb..c2d526a 100644
--- a/board/freescale/t104xrdb/cpld.c
+++ b/board/freescale/t104xrdb/cpld.c
@@ -10,7 +10,7 @@
* CFG_SYS_CPLD_BASE-The virtual address of the base of the CPLD register map
*/
-#include <common.h>
+#include <config.h>
#include <command.h>
#include <asm/io.h>
diff --git a/board/freescale/t104xrdb/ddr.c b/board/freescale/t104xrdb/ddr.c
index 02ddb66..bab6848 100644
--- a/board/freescale/t104xrdb/ddr.c
+++ b/board/freescale/t104xrdb/ddr.c
@@ -4,7 +4,7 @@
* Copyright 2021 NXP
*/
-#include <common.h>
+#include <config.h>
#include <i2c.h>
#include <hwconfig.h>
#include <init.h>
diff --git a/board/freescale/t104xrdb/eth.c b/board/freescale/t104xrdb/eth.c
index 5eca938..d5c084e 100644
--- a/board/freescale/t104xrdb/eth.c
+++ b/board/freescale/t104xrdb/eth.c
@@ -3,7 +3,7 @@
* Copyright 2014 Freescale Semiconductor, Inc.
*/
-#include <common.h>
+#include <config.h>
#include <net.h>
#include <netdev.h>
#include <asm/fsl_serdes.h>
diff --git a/board/freescale/t104xrdb/law.c b/board/freescale/t104xrdb/law.c
index a0d6eb5..d34641c 100644
--- a/board/freescale/t104xrdb/law.c
+++ b/board/freescale/t104xrdb/law.c
@@ -3,7 +3,7 @@
* Copyright 2013 Freescale Semiconductor, Inc.
*/
-#include <common.h>
+#include <config.h>
#include <asm/fsl_law.h>
#include <asm/mmu.h>
diff --git a/board/freescale/t104xrdb/spl.c b/board/freescale/t104xrdb/spl.c
index dd8283f..e02a1f9 100644
--- a/board/freescale/t104xrdb/spl.c
+++ b/board/freescale/t104xrdb/spl.c
@@ -2,7 +2,7 @@
/* Copyright 2013 Freescale Semiconductor, Inc.
*/
-#include <common.h>
+#include <config.h>
#include <clock_legacy.h>
#include <console.h>
#include <env_internal.h>
diff --git a/board/freescale/t104xrdb/t104xrdb.c b/board/freescale/t104xrdb/t104xrdb.c
index b308049..ef4dfef 100644
--- a/board/freescale/t104xrdb/t104xrdb.c
+++ b/board/freescale/t104xrdb/t104xrdb.c
@@ -4,7 +4,7 @@
* Copyright 2023 NXP
*/
-#include <common.h>
+#include <config.h>
#include <command.h>
#include <env.h>
#include <fdt_support.h>
diff --git a/board/freescale/t104xrdb/tlb.c b/board/freescale/t104xrdb/tlb.c
index 10be580..24bc83f 100644
--- a/board/freescale/t104xrdb/tlb.c
+++ b/board/freescale/t104xrdb/tlb.c
@@ -3,8 +3,9 @@
* Copyright 2013 Freescale Semiconductor, Inc.
*/
-#include <common.h>
+#include <config.h>
#include <asm/mmu.h>
+#include <asm/ppc.h>
struct fsl_e_tlb_entry tlb_table[] = {
/* TLB 0 - for temp stack in cache */
diff --git a/board/freescale/t208xqds/ddr.c b/board/freescale/t208xqds/ddr.c
index 56471b3..9076fbb 100644
--- a/board/freescale/t208xqds/ddr.c
+++ b/board/freescale/t208xqds/ddr.c
@@ -3,7 +3,6 @@
* Copyright 2013 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <i2c.h>
#include <hwconfig.h>
#include <init.h>
diff --git a/board/freescale/t208xqds/eth_t208xqds.c b/board/freescale/t208xqds/eth_t208xqds.c
index 569b193..9f29922 100644
--- a/board/freescale/t208xqds/eth_t208xqds.c
+++ b/board/freescale/t208xqds/eth_t208xqds.c
@@ -6,7 +6,7 @@
* Shengzhou Liu <Shengzhou.Liu@freescale.com>
*/
-#include <common.h>
+#include <config.h>
#include <command.h>
#include <fdt_support.h>
#include <log.h>
diff --git a/board/freescale/t208xqds/law.c b/board/freescale/t208xqds/law.c
index 3cdd493..287f465 100644
--- a/board/freescale/t208xqds/law.c
+++ b/board/freescale/t208xqds/law.c
@@ -6,7 +6,7 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
+#include <config.h>
#include <asm/fsl_law.h>
#include <asm/mmu.h>
diff --git a/board/freescale/t208xqds/spl.c b/board/freescale/t208xqds/spl.c
index 8866be5..44ad4e6 100644
--- a/board/freescale/t208xqds/spl.c
+++ b/board/freescale/t208xqds/spl.c
@@ -2,7 +2,7 @@
/* Copyright 2013 Freescale Semiconductor, Inc.
*/
-#include <common.h>
+#include <config.h>
#include <clock_legacy.h>
#include <console.h>
#include <env_internal.h>
diff --git a/board/freescale/t208xqds/t208xqds.c b/board/freescale/t208xqds/t208xqds.c
index 8be55e5..5e71da0 100644
--- a/board/freescale/t208xqds/t208xqds.c
+++ b/board/freescale/t208xqds/t208xqds.c
@@ -4,7 +4,7 @@
* Copyright 2020 NXP
*/
-#include <common.h>
+#include <config.h>
#include <clock_legacy.h>
#include <command.h>
#include <env.h>
diff --git a/board/freescale/t208xqds/tlb.c b/board/freescale/t208xqds/tlb.c
index 3d220af..f99d51c 100644
--- a/board/freescale/t208xqds/tlb.c
+++ b/board/freescale/t208xqds/tlb.c
@@ -6,8 +6,9 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
+#include <config.h>
#include <asm/mmu.h>
+#include <asm/ppc.h>
struct fsl_e_tlb_entry tlb_table[] = {
/* TLB 0 - for temp stack in cache */
diff --git a/board/freescale/t208xrdb/cpld.c b/board/freescale/t208xrdb/cpld.c
index 933fa0d..d2226af 100644
--- a/board/freescale/t208xrdb/cpld.c
+++ b/board/freescale/t208xrdb/cpld.c
@@ -5,8 +5,9 @@
* Freescale T2080RDB board-specific CPLD controlling supports.
*/
-#include <common.h>
+#include <config.h>
#include <command.h>
+#include <asm/io.h>
#include "cpld.h"
u8 cpld_read(unsigned int reg)
diff --git a/board/freescale/t208xrdb/ddr.c b/board/freescale/t208xrdb/ddr.c
index 1fbab36..fe98f62 100644
--- a/board/freescale/t208xrdb/ddr.c
+++ b/board/freescale/t208xrdb/ddr.c
@@ -3,7 +3,6 @@
* Copyright 2014 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <i2c.h>
#include <hwconfig.h>
#include <init.h>
diff --git a/board/freescale/t208xrdb/eth_t208xrdb.c b/board/freescale/t208xrdb/eth_t208xrdb.c
index e4592ea..5223ecc 100644
--- a/board/freescale/t208xrdb/eth_t208xrdb.c
+++ b/board/freescale/t208xrdb/eth_t208xrdb.c
@@ -6,7 +6,6 @@
* Shengzhou Liu <Shengzhou.Liu@freescale.com>
*/
-#include <common.h>
#include <command.h>
#include <fdt_support.h>
#include <net.h>
diff --git a/board/freescale/t208xrdb/law.c b/board/freescale/t208xrdb/law.c
index 53a1369..e1f570a8 100644
--- a/board/freescale/t208xrdb/law.c
+++ b/board/freescale/t208xrdb/law.c
@@ -6,7 +6,7 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
+#include <config.h>
#include <asm/fsl_law.h>
#include <asm/mmu.h>
diff --git a/board/freescale/t208xrdb/spl.c b/board/freescale/t208xrdb/spl.c
index 130cb88..df3b9c6 100644
--- a/board/freescale/t208xrdb/spl.c
+++ b/board/freescale/t208xrdb/spl.c
@@ -2,7 +2,7 @@
/* Copyright 2013 Freescale Semiconductor, Inc.
*/
-#include <common.h>
+#include <config.h>
#include <clock_legacy.h>
#include <console.h>
#include <env_internal.h>
diff --git a/board/freescale/t208xrdb/t208xrdb.c b/board/freescale/t208xrdb/t208xrdb.c
index e33e5d0..d93edf0 100644
--- a/board/freescale/t208xrdb/t208xrdb.c
+++ b/board/freescale/t208xrdb/t208xrdb.c
@@ -4,7 +4,7 @@
* Copyright 2021-2023 NXP
*/
-#include <common.h>
+#include <config.h>
#include <command.h>
#include <env.h>
#include <fdt_support.h>
diff --git a/board/freescale/t208xrdb/tlb.c b/board/freescale/t208xrdb/tlb.c
index 688a208..df58315 100644
--- a/board/freescale/t208xrdb/tlb.c
+++ b/board/freescale/t208xrdb/tlb.c
@@ -6,8 +6,9 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
+#include <config.h>
#include <asm/mmu.h>
+#include <asm/ppc.h>
struct fsl_e_tlb_entry tlb_table[] = {
/* TLB 0 - for temp stack in cache */
diff --git a/board/freescale/t4rdb/cpld.c b/board/freescale/t4rdb/cpld.c
index 8b10120..cd14d58 100644
--- a/board/freescale/t4rdb/cpld.c
+++ b/board/freescale/t4rdb/cpld.c
@@ -14,7 +14,7 @@
*
*/
-#include <common.h>
+#include <config.h>
#include <command.h>
#include <asm/io.h>
diff --git a/board/freescale/t4rdb/ddr.c b/board/freescale/t4rdb/ddr.c
index 57cbde1..5b60b50 100644
--- a/board/freescale/t4rdb/ddr.c
+++ b/board/freescale/t4rdb/ddr.c
@@ -3,7 +3,6 @@
* Copyright 2014 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <i2c.h>
#include <hwconfig.h>
#include <init.h>
diff --git a/board/freescale/t4rdb/eth.c b/board/freescale/t4rdb/eth.c
index 2e52543..e764636 100644
--- a/board/freescale/t4rdb/eth.c
+++ b/board/freescale/t4rdb/eth.c
@@ -5,7 +5,7 @@
* Chunhe Lan <Chunhe.Lan@freescale.com>
*/
-#include <common.h>
+#include <config.h>
#include <command.h>
#include <fdt_support.h>
#include <net.h>
diff --git a/board/freescale/t4rdb/law.c b/board/freescale/t4rdb/law.c
index 43eeb88..c43ac0f 100644
--- a/board/freescale/t4rdb/law.c
+++ b/board/freescale/t4rdb/law.c
@@ -3,7 +3,7 @@
* Copyright 2014 Freescale Semiconductor, Inc.
*/
-#include <common.h>
+#include <config.h>
#include <asm/fsl_law.h>
#include <asm/mmu.h>
diff --git a/board/freescale/t4rdb/spl.c b/board/freescale/t4rdb/spl.c
index 779457d..9d2472d 100644
--- a/board/freescale/t4rdb/spl.c
+++ b/board/freescale/t4rdb/spl.c
@@ -5,7 +5,7 @@
* Author: Chunhe Lan <Chunhe.Lan@freescale.com>
*/
-#include <common.h>
+#include <config.h>
#include <clock_legacy.h>
#include <console.h>
#include <env_internal.h>
diff --git a/board/freescale/t4rdb/t4240rdb.c b/board/freescale/t4rdb/t4240rdb.c
index ab71776..5cacfd2 100644
--- a/board/freescale/t4rdb/t4240rdb.c
+++ b/board/freescale/t4rdb/t4240rdb.c
@@ -4,7 +4,7 @@
* Copyright 2023 NXP
*/
-#include <common.h>
+#include <config.h>
#include <command.h>
#include <env.h>
#include <fdt_support.h>
diff --git a/board/freescale/t4rdb/tlb.c b/board/freescale/t4rdb/tlb.c
index f5af893..1fb9d41 100644
--- a/board/freescale/t4rdb/tlb.c
+++ b/board/freescale/t4rdb/tlb.c
@@ -3,8 +3,9 @@
* Copyright 2014 Freescale Semiconductor, Inc.
*/
-#include <common.h>
+#include <config.h>
#include <asm/mmu.h>
+#include <asm/ppc.h>
struct fsl_e_tlb_entry tlb_table[] = {
/* TLB 0 - for temp stack in cache */
diff --git a/board/freescale/vf610twr/vf610twr.c b/board/freescale/vf610twr/vf610twr.c
index 98cb014..80a798a 100644
--- a/board/freescale/vf610twr/vf610twr.c
+++ b/board/freescale/vf610twr/vf610twr.c
@@ -3,7 +3,6 @@
* Copyright 2013 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <init.h>
#include <asm/global_data.h>
#include <asm/io.h>
diff --git a/board/friendlyarm/nanopi2/board.c b/board/friendlyarm/nanopi2/board.c
index 393c5a4..c8cbc5a 100644
--- a/board/friendlyarm/nanopi2/board.c
+++ b/board/friendlyarm/nanopi2/board.c
@@ -5,7 +5,6 @@
*/
#include <config.h>
-#include <common.h>
#include <command.h>
#include <fdt_support.h>
#include <log.h>
diff --git a/board/friendlyarm/nanopi2/hwrev.c b/board/friendlyarm/nanopi2/hwrev.c
index 585e08c..cd9c241 100644
--- a/board/friendlyarm/nanopi2/hwrev.c
+++ b/board/friendlyarm/nanopi2/hwrev.c
@@ -5,7 +5,6 @@
*/
#include <config.h>
-#include <common.h>
#include <i2c.h>
#include <asm/io.h>
diff --git a/board/friendlyarm/nanopi2/lcds.c b/board/friendlyarm/nanopi2/lcds.c
index 7303e53..b373673 100644
--- a/board/friendlyarm/nanopi2/lcds.c
+++ b/board/friendlyarm/nanopi2/lcds.c
@@ -4,7 +4,6 @@
*/
#include <config.h>
-#include <common.h>
#include <errno.h>
#include <fdtdec.h>
#include <fdt_support.h>
diff --git a/board/friendlyarm/nanopi2/onewire.c b/board/friendlyarm/nanopi2/onewire.c
index 4f0b1e3..31cc871 100644
--- a/board/friendlyarm/nanopi2/onewire.c
+++ b/board/friendlyarm/nanopi2/onewire.c
@@ -5,7 +5,6 @@
*/
#include <config.h>
-#include <common.h>
#include <errno.h>
#include <asm/io.h>
#include <asm/arch/clk.h>
diff --git a/board/friendlyelec/nanopc-t6-rk3588/Makefile b/board/friendlyelec/nanopc-t6-rk3588/Makefile
deleted file mode 100644
index c1c49b1..0000000
--- a/board/friendlyelec/nanopc-t6-rk3588/Makefile
+++ /dev/null
@@ -1,6 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-#
-# Copyright (c) 2023 Rockchip Electronics Co,. Ltd.
-#
-
-obj-y += nanopc-t6-rk3588.o
diff --git a/board/friendlyelec/nanopc-t6-rk3588/nanopc-t6-rk3588.c b/board/friendlyelec/nanopc-t6-rk3588/nanopc-t6-rk3588.c
deleted file mode 100644
index 99bbef9..0000000
--- a/board/friendlyelec/nanopc-t6-rk3588/nanopc-t6-rk3588.c
+++ /dev/null
@@ -1,39 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (c) 2023 Rockchip Electronics Co,. Ltd.
- */
-
-#include <fdtdec.h>
-#include <fdt_support.h>
-
-#ifdef CONFIG_OF_BOARD_SETUP
-int nanopc_t6_add_reserved_memory_fdt_nodes(void *new_blob)
-{
- struct fdt_memory gap1 = {
- .start = 0x3fc000000,
- .end = 0x3fc4fffff,
- };
- struct fdt_memory gap2 = {
- .start = 0x3fff00000,
- .end = 0x3ffffffff,
- };
- unsigned long flags = FDTDEC_RESERVED_MEMORY_NO_MAP;
- unsigned int ret;
-
- /*
- * Inject the reserved-memory nodes into the DTS
- */
- ret = fdtdec_add_reserved_memory(new_blob, "gap1", &gap1, NULL, 0,
- NULL, flags);
- if (ret)
- return ret;
-
- return fdtdec_add_reserved_memory(new_blob, "gap2", &gap2, NULL, 0,
- NULL, flags);
-}
-
-int ft_board_setup(void *blob, struct bd_info *bd)
-{
- return nanopc_t6_add_reserved_memory_fdt_nodes(blob);
-}
-#endif
diff --git a/board/gardena/smart-gateway-at91sam/board.c b/board/gardena/smart-gateway-at91sam/board.c
index d9dfb25..2b5b284 100644
--- a/board/gardena/smart-gateway-at91sam/board.c
+++ b/board/gardena/smart-gateway-at91sam/board.c
@@ -4,7 +4,7 @@
* Copyright (C) 2019 Stefan Roese <sr@denx.de>
*/
-#include <common.h>
+#include <config.h>
#include <debug_uart.h>
#include <env.h>
#include <init.h>
diff --git a/board/gardena/smart-gateway-at91sam/spl.c b/board/gardena/smart-gateway-at91sam/spl.c
index 2807c4e..fb3ec48 100644
--- a/board/gardena/smart-gateway-at91sam/spl.c
+++ b/board/gardena/smart-gateway-at91sam/spl.c
@@ -4,7 +4,7 @@
* Copyright (C) 2019 Stefan Roese <sr@denx.de>
*/
-#include <common.h>
+#include <config.h>
#include <nand.h>
#include <spl.h>
#include <asm/arch/at91sam9x5_matrix.h>
diff --git a/board/gardena/smart-gateway-mt7688/board.c b/board/gardena/smart-gateway-mt7688/board.c
index 0cfde91..c6b14be 100644
--- a/board/gardena/smart-gateway-mt7688/board.c
+++ b/board/gardena/smart-gateway-mt7688/board.c
@@ -3,7 +3,6 @@
* Copyright (C) 2018 Stefan Roese <sr@denx.de>
*/
-#include <common.h>
#include <command.h>
#include <env.h>
#include <env_internal.h>
diff --git a/board/gateworks/gw_ventana/common.c b/board/gateworks/gw_ventana/common.c
index 74328b2..891d1b5 100644
--- a/board/gateworks/gw_ventana/common.c
+++ b/board/gateworks/gw_ventana/common.c
@@ -5,7 +5,6 @@
* Author: Tim Harvey <tharvey@gateworks.com>
*/
-#include <common.h>
#include <env.h>
#include <fsl_esdhc_imx.h>
#include <hwconfig.h>
diff --git a/board/gateworks/gw_ventana/eeprom.c b/board/gateworks/gw_ventana/eeprom.c
index e622a9b..b37f197 100644
--- a/board/gateworks/gw_ventana/eeprom.c
+++ b/board/gateworks/gw_ventana/eeprom.c
@@ -5,7 +5,6 @@
*/
#include <command.h>
-#include <common.h>
#include <gsc.h>
#include <hexdump.h>
#include <i2c.h>
diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c
index 683def7..21a908c 100644
--- a/board/gateworks/gw_ventana/gw_ventana.c
+++ b/board/gateworks/gw_ventana/gw_ventana.c
@@ -6,7 +6,6 @@
*/
#include <command.h>
-#include <common.h>
#include <fdt_support.h>
#include <gsc.h>
#include <hwconfig.h>
diff --git a/board/gateworks/gw_ventana/gw_ventana_spl.c b/board/gateworks/gw_ventana/gw_ventana_spl.c
index 2f046c9..3de4727 100644
--- a/board/gateworks/gw_ventana/gw_ventana_spl.c
+++ b/board/gateworks/gw_ventana/gw_ventana_spl.c
@@ -4,7 +4,7 @@
* Author: Tim Harvey <tharvey@gateworks.com>
*/
-#include <common.h>
+#include <config.h>
#include <env.h>
#include <gsc.h>
#include <hang.h>
diff --git a/board/gateworks/venice/eeprom.c b/board/gateworks/venice/eeprom.c
index 241be4e..afaabf3 100644
--- a/board/gateworks/venice/eeprom.c
+++ b/board/gateworks/venice/eeprom.c
@@ -3,7 +3,6 @@
* Copyright 2021 Gateworks Corporation
*/
-#include <common.h>
#include <gsc.h>
#include <hexdump.h>
#include <i2c.h>
diff --git a/board/gateworks/venice/lpddr4_timing_imx8mm.c b/board/gateworks/venice/lpddr4_timing_imx8mm.c
index 78b431d..3f2c090 100644
--- a/board/gateworks/venice/lpddr4_timing_imx8mm.c
+++ b/board/gateworks/venice/lpddr4_timing_imx8mm.c
@@ -6,7 +6,6 @@
*/
#include <linux/kernel.h>
-#include <common.h>
#include <asm/arch/ddr.h>
#include <asm/arch/lpddr4_define.h>
diff --git a/board/gateworks/venice/spl.c b/board/gateworks/venice/spl.c
index b0a315b..f10d310 100644
--- a/board/gateworks/venice/spl.c
+++ b/board/gateworks/venice/spl.c
@@ -3,7 +3,6 @@
* Copyright 2021 Gateworks Corporation
*/
-#include <common.h>
#include <cpu_func.h>
#include <hang.h>
#include <i2c.h>
diff --git a/board/gateworks/venice/venice.c b/board/gateworks/venice/venice.c
index f54f118..5b105d7 100644
--- a/board/gateworks/venice/venice.c
+++ b/board/gateworks/venice/venice.c
@@ -230,6 +230,7 @@
int ft_board_setup(void *fdt, struct bd_info *bd)
{
const char *base_model = eeprom_get_baseboard_model();
+ const char *path;
char pcbrev;
int off;
@@ -238,10 +239,10 @@
if (!strncmp(base_model, "GW73", 4)) {
pcbrev = get_pcb_rev(base_model);
+ path = fdt_get_alias(fdt, "ethernet1");
- if (pcbrev > 'B' && pcbrev < 'E') {
- printf("adjusting dt for %s\n", base_model);
-
+ if (pcbrev > 'B' && pcbrev < 'E' && path && !strncmp(path, "/soc@0/pcie@", 12)) {
+ printf("adjusting %s pcie\n", base_model);
/*
* revC/D/E has PCIe 4-port switch which changes
* ethernet1 PCIe GbE:
diff --git a/board/gdsys/a38x/controlcenterdc.c b/board/gdsys/a38x/controlcenterdc.c
index 0f620c2..4abb3e4 100644
--- a/board/gdsys/a38x/controlcenterdc.c
+++ b/board/gdsys/a38x/controlcenterdc.c
@@ -4,7 +4,7 @@
* Copyright (C) 2016 Mario Six <mario.six@gdsys.cc>
*/
-#include <common.h>
+#include <config.h>
#include <command.h>
#include <dm.h>
#include <event.h>
diff --git a/board/gdsys/a38x/dt_helpers.c b/board/gdsys/a38x/dt_helpers.c
index 61d30c2..a12e115 100644
--- a/board/gdsys/a38x/dt_helpers.c
+++ b/board/gdsys/a38x/dt_helpers.c
@@ -4,7 +4,6 @@
* Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc
*/
-#include <common.h>
#include <i2c.h>
#include <fdt_support.h>
#include <asm-generic/gpio.h>
diff --git a/board/gdsys/a38x/hre.c b/board/gdsys/a38x/hre.c
index d16233e..f303793 100644
--- a/board/gdsys/a38x/hre.c
+++ b/board/gdsys/a38x/hre.c
@@ -4,7 +4,6 @@
* Reinhard Pfau, Guntermann & Drunck GmbH, reinhard.pfau@gdsys.cc
*/
-#include <common.h>
#include <log.h>
#include <malloc.h>
#include <fs.h>
diff --git a/board/gdsys/a38x/hydra.c b/board/gdsys/a38x/hydra.c
index 495a976..970d508 100644
--- a/board/gdsys/a38x/hydra.c
+++ b/board/gdsys/a38x/hydra.c
@@ -1,8 +1,8 @@
-#include <common.h>
#include <command.h>
#include <console.h> /* ctrlc */
#include <pci.h>
#include <asm/io.h>
+#include <mach/soc.h>
#include "hydra.h"
diff --git a/board/gdsys/a38x/ihs_phys.c b/board/gdsys/a38x/ihs_phys.c
index 60a5c37..690a296 100644
--- a/board/gdsys/a38x/ihs_phys.c
+++ b/board/gdsys/a38x/ihs_phys.c
@@ -1,4 +1,3 @@
-#include <common.h>
#include <dm.h>
#include <miiphy.h>
#include <asm-generic/gpio.h>
diff --git a/board/gdsys/a38x/keyprogram.c b/board/gdsys/a38x/keyprogram.c
index 7020fae..15c36e2 100644
--- a/board/gdsys/a38x/keyprogram.c
+++ b/board/gdsys/a38x/keyprogram.c
@@ -4,7 +4,6 @@
* Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc
*/
-#include <common.h>
#include <command.h>
#include <env.h>
#include <tpm-v1.h>
diff --git a/board/gdsys/common/cmd_ioloop.c b/board/gdsys/common/cmd_ioloop.c
index 1412421..fb6313f 100644
--- a/board/gdsys/common/cmd_ioloop.c
+++ b/board/gdsys/common/cmd_ioloop.c
@@ -4,7 +4,6 @@
* Dirk Eibach, Guntermann & Drunck GmbH, dirk.eibach@gdsys.cc
*/
-#include <common.h>
#include <command.h>
#include <console.h>
#include <linux/bitops.h>
diff --git a/board/gdsys/common/dp501.c b/board/gdsys/common/dp501.c
index 9ca69eb..7698e76 100644
--- a/board/gdsys/common/dp501.c
+++ b/board/gdsys/common/dp501.c
@@ -8,7 +8,6 @@
#ifdef CONFIG_GDSYS_LEGACY_DRIVERS
-#include <common.h>
#include <asm/io.h>
#include <errno.h>
#include <i2c.h>
diff --git a/board/gdsys/common/ihs_mdio.c b/board/gdsys/common/ihs_mdio.c
index 5f1215e..a814566 100644
--- a/board/gdsys/common/ihs_mdio.c
+++ b/board/gdsys/common/ihs_mdio.c
@@ -4,7 +4,6 @@
* Dirk Eibach, Guntermann & Drunck GmbH, dirk.eibach@gdsys.cc
*/
-#include <common.h>
#include <linux/delay.h>
#include <miiphy.h>
diff --git a/board/gdsys/common/ioep-fpga.c b/board/gdsys/common/ioep-fpga.c
index 7292d7a..f01b48b 100644
--- a/board/gdsys/common/ioep-fpga.c
+++ b/board/gdsys/common/ioep-fpga.c
@@ -6,7 +6,6 @@
#ifdef CONFIG_GDSYS_LEGACY_DRIVERS
-#include <common.h>
#include <gdsys_fpga.h>
#include <linux/bitops.h>
diff --git a/board/gdsys/common/osd.c b/board/gdsys/common/osd.c
index dc548ef..bd9c5ca 100644
--- a/board/gdsys/common/osd.c
+++ b/board/gdsys/common/osd.c
@@ -6,7 +6,6 @@
#ifdef CONFIG_GDSYS_LEGACY_DRIVERS
-#include <common.h>
#include <command.h>
#include <i2c.h>
#include <malloc.h>
diff --git a/board/gdsys/common/osd_cmd.c b/board/gdsys/common/osd_cmd.c
index 6a9c0b4..39e64f5 100644
--- a/board/gdsys/common/osd_cmd.c
+++ b/board/gdsys/common/osd_cmd.c
@@ -9,7 +9,6 @@
* Dirk Eibach, Guntermann & Drunck GmbH, eibach@gdsys.de
*/
-#include <common.h>
#include <command.h>
#include <dm.h>
#include <hexdump.h>
diff --git a/board/gdsys/mpc8308/gazerbeam.c b/board/gdsys/mpc8308/gazerbeam.c
index cc608c4..05e4d84 100644
--- a/board/gdsys/mpc8308/gazerbeam.c
+++ b/board/gdsys/mpc8308/gazerbeam.c
@@ -5,7 +5,6 @@
* SPDX-License-Identifier: GPL-2.0+
*/
-#include <common.h>
#include <command.h>
#include <dm.h>
#include <env.h>
diff --git a/board/gdsys/mpc8308/mpc8308.c b/board/gdsys/mpc8308/mpc8308.c
index 0f90f8a..42c45ec 100644
--- a/board/gdsys/mpc8308/mpc8308.c
+++ b/board/gdsys/mpc8308/mpc8308.c
@@ -4,7 +4,6 @@
* Dirk Eibach, Guntermann & Drunck GmbH, dirk.eibach@gdsys.cc
*/
-#include <common.h>
#include <command.h>
#include <init.h>
#include <asm/processor.h>
diff --git a/board/gdsys/mpc8308/sdram.c b/board/gdsys/mpc8308/sdram.c
index 4fac146..2933de0 100644
--- a/board/gdsys/mpc8308/sdram.c
+++ b/board/gdsys/mpc8308/sdram.c
@@ -13,7 +13,7 @@
#ifndef CONFIG_MPC83XX_SDRAM
-#include <common.h>
+#include <config.h>
#include <init.h>
#include <mpc83xx.h>
#include <spd_sdram.h>
diff --git a/board/ge/b1x5v2/b1x5v2.c b/board/ge/b1x5v2/b1x5v2.c
index a2cbd15..031773b 100644
--- a/board/ge/b1x5v2/b1x5v2.c
+++ b/board/ge/b1x5v2/b1x5v2.c
@@ -17,7 +17,6 @@
#include <asm/io.h>
#include <asm/mach-imx/video.h>
#include <command.h>
-#include <common.h>
#include <i2c.h>
#include <input.h>
#include <ipu_pixfmt.h>
diff --git a/board/ge/common/ge_rtc.c b/board/ge/common/ge_rtc.c
index 6437afc..5c62ecc 100644
--- a/board/ge/common/ge_rtc.c
+++ b/board/ge/common/ge_rtc.c
@@ -3,7 +3,6 @@
* Copyright 2017 General Electric Company
*/
-#include <common.h>
#include <env.h>
#include <dm/uclass.h>
#include <rtc.h>
diff --git a/board/ge/common/vpd_reader.h b/board/ge/common/vpd_reader.h
index 0c51dc5..d32c18d 100644
--- a/board/ge/common/vpd_reader.h
+++ b/board/ge/common/vpd_reader.h
@@ -3,7 +3,7 @@
* Copyright 2016 General Electric Company
*/
-#include "common.h"
+#include <linux/types.h>
struct vpd_cache;
diff --git a/board/ge/mx53ppd/mx53ppd.c b/board/ge/mx53ppd/mx53ppd.c
index cc462d5..9396d43 100644
--- a/board/ge/mx53ppd/mx53ppd.c
+++ b/board/ge/mx53ppd/mx53ppd.c
@@ -8,7 +8,6 @@
* Jason Liu <r64343@freescale.com>
*/
-#include <common.h>
#include <init.h>
#include <asm/global_data.h>
#include <asm/io.h>
diff --git a/board/ge/mx53ppd/mx53ppd_video.c b/board/ge/mx53ppd/mx53ppd_video.c
index 4e2c6eb..eb4dd75 100644
--- a/board/ge/mx53ppd/mx53ppd_video.c
+++ b/board/ge/mx53ppd/mx53ppd_video.c
@@ -8,7 +8,6 @@
* Fabio Estevam <fabio.estevam@freescale.com>
*/
-#include <common.h>
#include <dm.h>
#include <linux/list.h>
#include <asm/arch/iomux-mx53.h>
diff --git a/board/google/chromebook_coral/coral.c b/board/google/chromebook_coral/coral.c
index 9d9168d..7b2724c 100644
--- a/board/google/chromebook_coral/coral.c
+++ b/board/google/chromebook_coral/coral.c
@@ -5,7 +5,6 @@
#define LOG_CATEGORY UCLASS_SYSINFO
-#include <common.h>
#include <bloblist.h>
#include <command.h>
#include <cros_ec.h>
diff --git a/board/google/imx8mq_phanbell/imx8mq_phanbell.c b/board/google/imx8mq_phanbell/imx8mq_phanbell.c
index d0a740d..9544d6d 100644
--- a/board/google/imx8mq_phanbell/imx8mq_phanbell.c
+++ b/board/google/imx8mq_phanbell/imx8mq_phanbell.c
@@ -3,7 +3,6 @@
* Copyright 2020 NXP
*/
-#include <common.h>
#include <env.h>
#include <init.h>
#include <malloc.h>
diff --git a/board/google/imx8mq_phanbell/spl.c b/board/google/imx8mq_phanbell/spl.c
index 83de5bf..cfba930 100644
--- a/board/google/imx8mq_phanbell/spl.c
+++ b/board/google/imx8mq_phanbell/spl.c
@@ -4,7 +4,7 @@
*
*/
-#include <common.h>
+#include <config.h>
#include <hang.h>
#include <asm/global_data.h>
#include <asm/io.h>
diff --git a/board/google/veyron/veyron.c b/board/google/veyron/veyron.c
index 32dbcdc..53c3435 100644
--- a/board/google/veyron/veyron.c
+++ b/board/google/veyron/veyron.c
@@ -4,7 +4,6 @@
*/
#include <clk.h>
-#include <common.h>
#include <dm.h>
#include <init.h>
#include <log.h>
diff --git a/board/grinn/chiliboard/board.c b/board/grinn/chiliboard/board.c
index 64b32ca..8313b37 100644
--- a/board/grinn/chiliboard/board.c
+++ b/board/grinn/chiliboard/board.c
@@ -4,7 +4,7 @@
* Copyright (C) 2017, Grinn - http://grinn-global.com/
*/
-#include <common.h>
+#include <config.h>
#include <init.h>
#include <net.h>
#include <asm/arch/chilisom.h>
diff --git a/board/grinn/liteboard/board.c b/board/grinn/liteboard/board.c
index cf1d7ce..07bb5b7 100644
--- a/board/grinn/liteboard/board.c
+++ b/board/grinn/liteboard/board.c
@@ -4,7 +4,6 @@
* Copyright (C) 2016 Grinn
*/
-#include <common.h>
#include <command.h>
#include <init.h>
#include <asm/arch/clock.h>
diff --git a/board/highbank/ahci.c b/board/highbank/ahci.c
index 9c05727..899c502 100644
--- a/board/highbank/ahci.c
+++ b/board/highbank/ahci.c
@@ -3,7 +3,6 @@
* Copyright 2012 Calxeda, Inc.
*/
-#include <common.h>
#include <ahci.h>
#include <asm/io.h>
#include <linux/delay.h>
diff --git a/board/highbank/hb_sregs.c b/board/highbank/hb_sregs.c
index d9dd2c2..94052f7 100644
--- a/board/highbank/hb_sregs.c
+++ b/board/highbank/hb_sregs.c
@@ -10,7 +10,6 @@
* Copyright (C) 2019 Arm Ltd.
*/
-#include <common.h>
#include <dm.h>
#include <dm/lists.h>
diff --git a/board/highbank/highbank.c b/board/highbank/highbank.c
index 7f67d1e..f3df83e 100644
--- a/board/highbank/highbank.c
+++ b/board/highbank/highbank.c
@@ -3,7 +3,6 @@
* Copyright 2010-2011 Calxeda, Inc.
*/
-#include <common.h>
#include <ahci.h>
#include <cpu_func.h>
#include <env.h>
diff --git a/board/hisilicon/hikey/hikey.c b/board/hisilicon/hikey/hikey.c
index c9a2d60..95a831e 100644
--- a/board/hisilicon/hikey/hikey.c
+++ b/board/hisilicon/hikey/hikey.c
@@ -3,7 +3,6 @@
* (C) Copyright 2015 Linaro
* Peter Griffin <peter.griffin@linaro.org>
*/
-#include <common.h>
#include <cpu_func.h>
#include <dm.h>
#include <fdt_support.h>
diff --git a/board/hisilicon/hikey960/hikey960.c b/board/hisilicon/hikey960/hikey960.c
index f41fabb..5029f4e 100644
--- a/board/hisilicon/hikey960/hikey960.c
+++ b/board/hisilicon/hikey960/hikey960.c
@@ -4,7 +4,6 @@
* Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
*/
-#include <common.h>
#include <cpu_func.h>
#include <dm.h>
#include <errno.h>
diff --git a/board/hisilicon/poplar/poplar.c b/board/hisilicon/poplar/poplar.c
index b89e7e8..c3ea080 100644
--- a/board/hisilicon/poplar/poplar.c
+++ b/board/hisilicon/poplar/poplar.c
@@ -4,7 +4,6 @@
* Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
*/
-#include <common.h>
#include <cpu_func.h>
#include <dm.h>
#include <init.h>
diff --git a/board/hoperun/hihope-rzg2/hihope-rzg2.c b/board/hoperun/hihope-rzg2/hihope-rzg2.c
index 68d3d30..0966e25 100644
--- a/board/hoperun/hihope-rzg2/hihope-rzg2.c
+++ b/board/hoperun/hihope-rzg2/hihope-rzg2.c
@@ -6,7 +6,6 @@
* Copyright (C) 2021 Renesas Electronics Corporation
*/
-#include <common.h>
#include <asm/global_data.h>
#include <asm/io.h>
#include <asm/processor.h>
diff --git a/board/imgtec/boston/checkboard.c b/board/imgtec/boston/checkboard.c
index c246a7b..b0f7d32 100644
--- a/board/imgtec/boston/checkboard.c
+++ b/board/imgtec/boston/checkboard.c
@@ -3,7 +3,6 @@
* Copyright (C) 2016 Imagination Technologies
*/
-#include <common.h>
#include <init.h>
#include <asm/io.h>
diff --git a/board/imgtec/boston/ddr.c b/board/imgtec/boston/ddr.c
index cecf454..55356d1 100644
--- a/board/imgtec/boston/ddr.c
+++ b/board/imgtec/boston/ddr.c
@@ -3,7 +3,7 @@
* Copyright (C) 2016 Imagination Technologies
*/
-#include <common.h>
+#include <config.h>
#include <init.h>
#include <asm/global_data.h>
diff --git a/board/imgtec/boston/dt.c b/board/imgtec/boston/dt.c
index bf772ff..874a21c 100644
--- a/board/imgtec/boston/dt.c
+++ b/board/imgtec/boston/dt.c
@@ -3,7 +3,6 @@
* Copyright (C) 2016 Imagination Technologies
*/
-#include <common.h>
#include <fdt_support.h>
#include <asm/global_data.h>
diff --git a/board/imgtec/ci20/ci20.c b/board/imgtec/ci20/ci20.c
index 89f5e7a..4e26838 100644
--- a/board/imgtec/ci20/ci20.c
+++ b/board/imgtec/ci20/ci20.c
@@ -6,7 +6,6 @@
* Author: Paul Burton <paul.burton@imgtec.com>
*/
-#include <common.h>
#include <env.h>
#include <init.h>
#include <net.h>
diff --git a/board/imgtec/malta/superio.c b/board/imgtec/malta/superio.c
index aba11e2..edd5c20 100644
--- a/board/imgtec/malta/superio.c
+++ b/board/imgtec/malta/superio.c
@@ -6,7 +6,6 @@
* Setup code for the FDC37M817 super I/O controller
*/
-#include <common.h>
#include <asm/io.h>
#define SIO_CONF_PORT 0x3f0
diff --git a/board/imgtec/xilfpga/xilfpga.c b/board/imgtec/xilfpga/xilfpga.c
index 7122692..e50ee8e 100644
--- a/board/imgtec/xilfpga/xilfpga.c
+++ b/board/imgtec/xilfpga/xilfpga.c
@@ -8,7 +8,7 @@
*
*/
-#include <common.h>
+#include <config.h>
#include <init.h>
#include <asm/global_data.h>
diff --git a/board/intel/cherryhill/cherryhill.c b/board/intel/cherryhill/cherryhill.c
index c037d5b..b4378af 100644
--- a/board/intel/cherryhill/cherryhill.c
+++ b/board/intel/cherryhill/cherryhill.c
@@ -3,7 +3,6 @@
* Copyright (C) 2017, Bin Meng <bmeng.cn@gmail.com>
*/
-#include <common.h>
#include <asm/arch/gpio.h>
#include <asm/fsp1/fsp_support.h>
diff --git a/board/intel/cougarcanyon2/cougarcanyon2.c b/board/intel/cougarcanyon2/cougarcanyon2.c
index 7f61ef8..e5cda06 100644
--- a/board/intel/cougarcanyon2/cougarcanyon2.c
+++ b/board/intel/cougarcanyon2/cougarcanyon2.c
@@ -3,7 +3,6 @@
* Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <init.h>
diff --git a/board/intel/crownbay/crownbay.c b/board/intel/crownbay/crownbay.c
index 55095de..036beb1 100644
--- a/board/intel/crownbay/crownbay.c
+++ b/board/intel/crownbay/crownbay.c
@@ -3,7 +3,6 @@
* Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
*/
-#include <common.h>
#include <init.h>
#include <asm/ibmpc.h>
#include <asm/pnp_def.h>
diff --git a/board/intel/edison/edison.c b/board/intel/edison/edison.c
index 11e7f74..911ffda 100644
--- a/board/intel/edison/edison.c
+++ b/board/intel/edison/edison.c
@@ -2,7 +2,6 @@
/*
* Copyright (c) 2017 Intel Corporation
*/
-#include <common.h>
#include <env.h>
#include <init.h>
#include <mmc.h>
diff --git a/board/intel/galileo/galileo.c b/board/intel/galileo/galileo.c
index 341b627..19e5d09 100644
--- a/board/intel/galileo/galileo.c
+++ b/board/intel/galileo/galileo.c
@@ -3,7 +3,6 @@
* Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
*/
-#include <common.h>
#include <asm/io.h>
#include <asm/arch/device.h>
#include <asm/arch/quark.h>
diff --git a/board/intel/minnowmax/minnowmax.c b/board/intel/minnowmax/minnowmax.c
index b02e3f0..cdc2e0b 100644
--- a/board/intel/minnowmax/minnowmax.c
+++ b/board/intel/minnowmax/minnowmax.c
@@ -3,7 +3,6 @@
* Copyright (C) 2015, Google, Inc
*/
-#include <common.h>
#include <dm.h>
#include <init.h>
#include <log.h>
diff --git a/board/intel/slimbootloader/slimbootloader.c b/board/intel/slimbootloader/slimbootloader.c
index b20ddf0..f92c0b5 100644
--- a/board/intel/slimbootloader/slimbootloader.c
+++ b/board/intel/slimbootloader/slimbootloader.c
@@ -3,7 +3,6 @@
* Copyright (C) 2019 Intel Corporation <www.intel.com>
*/
-#include <common.h>
#include <init.h>
int board_early_init_r(void)
diff --git a/board/inversepath/usbarmory/usbarmory.c b/board/inversepath/usbarmory/usbarmory.c
index f3a0de3..fbed8ab 100644
--- a/board/inversepath/usbarmory/usbarmory.c
+++ b/board/inversepath/usbarmory/usbarmory.c
@@ -7,7 +7,7 @@
* Andrej Rosano <andrej@inversepath.com>
*/
-#include <common.h>
+#include <config.h>
#include <command.h>
#include <fs.h>
#include <init.h>
diff --git a/board/iomega/iconnect/iconnect.c b/board/iomega/iconnect/iconnect.c
index 0387160..00b0898 100644
--- a/board/iomega/iconnect/iconnect.c
+++ b/board/iomega/iconnect/iconnect.c
@@ -6,7 +6,6 @@
* Luka Perkov <luka@openwrt.org>
*/
-#include <common.h>
#include <init.h>
#include <netdev.h>
#include <asm/arch/cpu.h>
diff --git a/board/isee/igep003x/board.c b/board/isee/igep003x/board.c
index 7dbb080..7cd26ce 100644
--- a/board/isee/igep003x/board.c
+++ b/board/isee/igep003x/board.c
@@ -5,7 +5,7 @@
* Copyright (C) 2013-2017, ISEE 2007 SL - http://www.isee.biz/
*/
-#include <common.h>
+#include <config.h>
#include <env.h>
#include <errno.h>
#include <init.h>
diff --git a/board/isee/igep003x/mux.c b/board/isee/igep003x/mux.c
index 550e3b3..1a40c00 100644
--- a/board/isee/igep003x/mux.c
+++ b/board/isee/igep003x/mux.c
@@ -11,7 +11,6 @@
* GNU General Public License for more details.
*/
-#include <common.h>
#include <asm/arch/sys_proto.h>
#include <asm/arch/hardware.h>
#include <asm/arch/mux.h>
diff --git a/board/isee/igep00x0/common.c b/board/isee/igep00x0/common.c
index 3fdf83e..2584d2e 100644
--- a/board/isee/igep00x0/common.c
+++ b/board/isee/igep00x0/common.c
@@ -1,6 +1,5 @@
// SPDX-License-Identifier: GPL-2.0+
-#include <common.h>
#include <twl4030.h>
#include <asm/global_data.h>
#include <asm/io.h>
diff --git a/board/isee/igep00x0/igep00x0.c b/board/isee/igep00x0/igep00x0.c
index 0f0a9c5..8a3f290 100644
--- a/board/isee/igep00x0/igep00x0.c
+++ b/board/isee/igep00x0/igep00x0.c
@@ -3,7 +3,7 @@
* (C) Copyright 2010
* ISEE 2007 SL, <www.iseebcn.com>
*/
-#include <common.h>
+#include <config.h>
#include <env.h>
#include <init.h>
#include <malloc.h>
diff --git a/board/k+p/kp_imx53/kp_id_rev.c b/board/k+p/kp_imx53/kp_id_rev.c
index 9f93cf0..cbfe94e 100644
--- a/board/k+p/kp_imx53/kp_id_rev.c
+++ b/board/k+p/kp_imx53/kp_id_rev.c
@@ -9,11 +9,11 @@
* Daniel Gericke <daniel.gericke@tqs.de>
*/
-#include <common.h>
#include <env.h>
#include <i2c.h>
#include "kp_id_rev.h"
#include <net.h>
+#include <vsprintf.h>
static int eeprom_has_been_read;
static struct id_eeprom eeprom;
diff --git a/board/k+p/kp_imx53/kp_imx53.c b/board/k+p/kp_imx53/kp_imx53.c
index 7c3a695..efb7b49 100644
--- a/board/k+p/kp_imx53/kp_imx53.c
+++ b/board/k+p/kp_imx53/kp_imx53.c
@@ -4,7 +4,6 @@
* Lukasz Majewski, DENX Software Engineering, lukma@denx.de
*/
-#include <common.h>
#include <init.h>
#include <asm/global_data.h>
#include <asm/io.h>
diff --git a/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c b/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c
index e6877e4..e089519 100644
--- a/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c
+++ b/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c
@@ -5,7 +5,6 @@
* Copyright (C) 2018 Lukasz Majewski <lukma@denx.de>
*/
-#include <common.h>
#include <init.h>
#include <asm/arch/clock.h>
#include <asm/arch/crm_regs.h>
diff --git a/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc_spl.c b/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc_spl.c
index 5490243..6a5e252 100644
--- a/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc_spl.c
+++ b/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc_spl.c
@@ -5,7 +5,6 @@
* Copyright (C) 2018 Lukasz Majewski <lukma@denx.de>
*/
-#include <common.h>
#include <init.h>
#include <log.h>
#include <asm/arch/clock.h>
diff --git a/board/keymile/common/common.c b/board/keymile/common/common.c
index 991022a..9358c25 100644
--- a/board/keymile/common/common.c
+++ b/board/keymile/common/common.c
@@ -7,7 +7,7 @@
* Holger Brunck, Keymile GmbH Hannover, holger.brunck@keymile.com
*/
-#include <common.h>
+#include <config.h>
#include <env.h>
#include <ioports.h>
#include <command.h>
diff --git a/board/keymile/common/ivm.c b/board/keymile/common/ivm.c
index 67db0c5..f01fe44 100644
--- a/board/keymile/common/ivm.c
+++ b/board/keymile/common/ivm.c
@@ -4,10 +4,11 @@
* Holger Brunck, Keymile GmbH Hannover, holger.brunck@keymile.com
*/
-#include <common.h>
#include <cli_hush.h>
#include <env.h>
#include <i2c.h>
+#include <stdio.h>
+#include <vsprintf.h>
#include "common.h"
#define MAC_STR_SZ 20
diff --git a/board/keymile/common/qrio.c b/board/keymile/common/qrio.c
index b433f69..c829948 100644
--- a/board/keymile/common/qrio.c
+++ b/board/keymile/common/qrio.c
@@ -4,7 +4,7 @@
* Valentin Longchamp <valentin.longchamp@keymile.com>
*/
-#include <common.h>
+#include <config.h>
#include <asm/io.h>
#include <linux/bitops.h>
diff --git a/board/keymile/km83xx/km83xx.c b/board/keymile/km83xx/km83xx.c
index acd1310..40718aa 100644
--- a/board/keymile/km83xx/km83xx.c
+++ b/board/keymile/km83xx/km83xx.c
@@ -13,7 +13,7 @@
* Heiko Schocher, DENX Software Engineering, hs@denx.de.
*/
-#include <common.h>
+#include <config.h>
#include <env.h>
#include <event.h>
#include <fdt_support.h>
diff --git a/board/keymile/kmcent2/tlb.c b/board/keymile/kmcent2/tlb.c
index 41b24e3..77e11e9 100644
--- a/board/keymile/kmcent2/tlb.c
+++ b/board/keymile/kmcent2/tlb.c
@@ -7,7 +7,7 @@
*/
#include <asm/mmu.h>
-#include <asm/u-boot.h>
+#include <asm/ppc.h>
struct fsl_e_tlb_entry tlb_table[] = {
/* TLB 0 - for temp stack in cache */
diff --git a/board/keymile/pg-wcom-ls102xa/ddr.c b/board/keymile/pg-wcom-ls102xa/ddr.c
index 556d39d..51938a1 100644
--- a/board/keymile/pg-wcom-ls102xa/ddr.c
+++ b/board/keymile/pg-wcom-ls102xa/ddr.c
@@ -4,7 +4,7 @@
* Copyright 2020 Hitachi Power Grids. All rights reserved.
*/
-#include <common.h>
+#include <config.h>
#include <fsl_ddr_sdram.h>
#include <fsl_ddr_dimm_params.h>
#include <asm/io.h>
diff --git a/board/keymile/secu1/socfpga.c b/board/keymile/secu1/socfpga.c
index 6a4cb21..1a626c5 100644
--- a/board/keymile/secu1/socfpga.c
+++ b/board/keymile/secu1/socfpga.c
@@ -2,7 +2,6 @@
/*
* Copyright (C) 2017-2020 Hitachi Power Grids
*/
-#include <common.h>
#include <i2c.h>
#include <asm/gpio.h>
diff --git a/board/kobol/helios4/helios4.c b/board/kobol/helios4/helios4.c
index 9c5b687..4c8407b 100644
--- a/board/kobol/helios4/helios4.c
+++ b/board/kobol/helios4/helios4.c
@@ -4,7 +4,7 @@
* based on board/solidrun/clearfog/clearfog.c
*/
-#include <common.h>
+#include <config.h>
#include <i2c.h>
#include <init.h>
#include <miiphy.h>
diff --git a/board/kontron/pitx_imx8m/pitx_imx8m.c b/board/kontron/pitx_imx8m/pitx_imx8m.c
index 4548e7c..a908aee 100644
--- a/board/kontron/pitx_imx8m/pitx_imx8m.c
+++ b/board/kontron/pitx_imx8m/pitx_imx8m.c
@@ -1,7 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+
#include "pitx_misc.h"
-#include <common.h>
#include <efi.h>
#include <efi_loader.h>
#include <init.h>
diff --git a/board/kontron/pitx_imx8m/spl.c b/board/kontron/pitx_imx8m/spl.c
index a247803..475e52f 100644
--- a/board/kontron/pitx_imx8m/spl.c
+++ b/board/kontron/pitx_imx8m/spl.c
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+
-#include <common.h>
+#include <config.h>
#include <errno.h>
#include <fsl_esdhc_imx.h>
#include <hang.h>
diff --git a/board/kontron/sl-mx8mm/lpddr4_timing.c b/board/kontron/sl-mx8mm/lpddr4_timing.c
index 74b79c7..851aeef 100644
--- a/board/kontron/sl-mx8mm/lpddr4_timing.c
+++ b/board/kontron/sl-mx8mm/lpddr4_timing.c
@@ -4,7 +4,6 @@
*/
#include <linux/kernel.h>
-#include <common.h>
#include <asm/arch/ddr.h>
#include <asm/arch/lpddr4_define.h>
diff --git a/board/kontron/sl28/cmds.c b/board/kontron/sl28/cmds.c
index 08a22b5..7851361 100644
--- a/board/kontron/sl28/cmds.c
+++ b/board/kontron/sl28/cmds.c
@@ -5,10 +5,11 @@
* Copyright (c) 2020 Kontron Europe GmbH
*/
-#include <common.h>
#include <command.h>
#include <i2c.h>
+#include <vsprintf.h>
#include <linux/delay.h>
+#include <linux/errno.h>
#define CPLD_I2C_ADDR 0x4a
#define REG_UFM_CTRL 0x02
diff --git a/board/kontron/sl28/common.c b/board/kontron/sl28/common.c
index 331de29..d8d0172 100644
--- a/board/kontron/sl28/common.c
+++ b/board/kontron/sl28/common.c
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+
-#include <common.h>
+#include <config.h>
#include <asm/global_data.h>
#include <asm/io.h>
diff --git a/board/kontron/sl28/ddr.c b/board/kontron/sl28/ddr.c
index 315d9f9..9b881fd 100644
--- a/board/kontron/sl28/ddr.c
+++ b/board/kontron/sl28/ddr.c
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+
-#include <common.h>
+#include <config.h>
#include <asm/global_data.h>
#include <asm/io.h>
#include <fsl_ddr_sdram.h>
diff --git a/board/kontron/sl28/sl28.c b/board/kontron/sl28/sl28.c
index 4ab221c..adfec8b 100644
--- a/board/kontron/sl28/sl28.c
+++ b/board/kontron/sl28/sl28.c
@@ -1,6 +1,5 @@
// SPDX-License-Identifier: GPL-2.0+
-#include <common.h>
#include <dm.h>
#include <malloc.h>
#include <efi.h>
diff --git a/board/kontron/sl28/spl.c b/board/kontron/sl28/spl.c
index ffaf517..45a4fc6 100644
--- a/board/kontron/sl28/spl.c
+++ b/board/kontron/sl28/spl.c
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+
-#include <common.h>
+#include <config.h>
#include <asm/io.h>
#include <asm/spl.h>
#include <asm/arch-fsl-layerscape/fsl_serdes.h>
@@ -47,15 +47,14 @@
switch (variant) {
case 1:
- return strcmp(name, "fsl-ls1028a-kontron-sl28-var1");
+ return strcmp(name, "freescale/fsl-ls1028a-kontron-sl28-var1");
case 2:
- return strcmp(name, "fsl-ls1028a-kontron-sl28-var2");
- case 3:
- return strcmp(name, "fsl-ls1028a-kontron-sl28-var3");
+ return strcmp(name, "freescale/fsl-ls1028a-kontron-sl28-var2");
case 4:
- return strcmp(name, "fsl-ls1028a-kontron-sl28-var4");
+ return strcmp(name, "freescale/fsl-ls1028a-kontron-sl28-var4");
+ case 3:
default:
- return strcmp(name, "fsl-ls1028a-kontron-sl28");
+ return strcmp(name, "freescale/fsl-ls1028a-kontron-sl28");
}
}
diff --git a/board/kontron/sl28/spl_atf.c b/board/kontron/sl28/spl_atf.c
index a9cd685..0710316 100644
--- a/board/kontron/sl28/spl_atf.c
+++ b/board/kontron/sl28/spl_atf.c
@@ -5,7 +5,7 @@
* Copyright (c) 2020 Michael Walle <michael@walle.cc>
*/
-#include <common.h>
+#include <config.h>
#include <asm/global_data.h>
#include <asm/io.h>
#include <atf_common.h>
diff --git a/board/kosagi/novena/novena.c b/board/kosagi/novena/novena.c
index f009a8a..3220727 100644
--- a/board/kosagi/novena/novena.c
+++ b/board/kosagi/novena/novena.c
@@ -5,7 +5,6 @@
* Copyright (C) 2014 Marek Vasut <marex@denx.de>
*/
-#include <common.h>
#include <display_options.h>
#include <dm.h>
#include <eeprom.h>
diff --git a/board/kosagi/novena/novena_spl.c b/board/kosagi/novena/novena_spl.c
index 24c0fb2..008418b 100644
--- a/board/kosagi/novena/novena_spl.c
+++ b/board/kosagi/novena/novena_spl.c
@@ -5,7 +5,7 @@
* Copyright (C) 2014 Marek Vasut <marex@denx.de>
*/
-#include <common.h>
+#include <config.h>
#include <clock_legacy.h>
#include <init.h>
#include <asm/io.h>
diff --git a/board/kosagi/novena/video.c b/board/kosagi/novena/video.c
index a96a877..be5a737 100644
--- a/board/kosagi/novena/video.c
+++ b/board/kosagi/novena/video.c
@@ -9,7 +9,6 @@
* Copyright (C) 2014 Marek Vasut <marex@denx.de>
*/
-#include <common.h>
#include <log.h>
#include <linux/delay.h>
#include <linux/errno.h>
diff --git a/board/l+g/vinco/vinco.c b/board/l+g/vinco/vinco.c
index b3c176d..066d315 100644
--- a/board/l+g/vinco/vinco.c
+++ b/board/l+g/vinco/vinco.c
@@ -9,7 +9,7 @@
* Gregory CLEMENT <gregory.clement@free-electrons.com>
*/
-#include <common.h>
+#include <config.h>
#include <init.h>
#include <asm/global_data.h>
#include <asm/io.h>
diff --git a/board/lego/ev3/legoev3.c b/board/lego/ev3/legoev3.c
index 43afe59..1a15366 100644
--- a/board/lego/ev3/legoev3.c
+++ b/board/lego/ev3/legoev3.c
@@ -12,7 +12,7 @@
* Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
*/
-#include <common.h>
+#include <config.h>
#include <env.h>
#include <i2c.h>
#include <init.h>
diff --git a/board/lg/sniper/sniper.c b/board/lg/sniper/sniper.c
index 86032d7..88d5d08 100644
--- a/board/lg/sniper/sniper.c
+++ b/board/lg/sniper/sniper.c
@@ -6,7 +6,6 @@
*/
#include <config.h>
-#include <common.h>
#include <dm.h>
#include <env.h>
#include <fastboot.h>
diff --git a/board/liebherr/display5/display5.c b/board/liebherr/display5/display5.c
index e3a59db..a0bbd03 100644
--- a/board/liebherr/display5/display5.c
+++ b/board/liebherr/display5/display5.c
@@ -4,7 +4,6 @@
* Lukasz Majewski, DENX Software Engineering, lukma@denx.de
*/
-#include <common.h>
#include <dm.h>
#include <fdt_support.h>
#include <init.h>
diff --git a/board/liebherr/display5/spl.c b/board/liebherr/display5/spl.c
index 97928e9..819d3ac 100644
--- a/board/liebherr/display5/spl.c
+++ b/board/liebherr/display5/spl.c
@@ -4,7 +4,6 @@
* Lukasz Majewski, DENX Software Engineering, lukma@denx.de
*/
-#include <common.h>
#include <cpu_func.h>
#include <env.h>
#include <image.h>
diff --git a/board/liebherr/mccmon6/mccmon6.c b/board/liebherr/mccmon6/mccmon6.c
index 1b49526..fef915b 100644
--- a/board/liebherr/mccmon6/mccmon6.c
+++ b/board/liebherr/mccmon6/mccmon6.c
@@ -4,7 +4,6 @@
* Lukasz Majewski, DENX Software Engineering, lukma@denx.de
*/
-#include <common.h>
#include <env.h>
#include <init.h>
#include <serial.h>
diff --git a/board/liebherr/xea/spl_xea.c b/board/liebherr/xea/spl_xea.c
index 6cf8f83..88c157e 100644
--- a/board/liebherr/xea/spl_xea.c
+++ b/board/liebherr/xea/spl_xea.c
@@ -12,7 +12,6 @@
* on behalf of DENX Software Engineering GmbH
*/
-#include <common.h>
#include <config.h>
#include <asm/io.h>
#include <asm/arch/iomux-mx28.h>
diff --git a/board/liebherr/xea/xea.c b/board/liebherr/xea/xea.c
index 0a6fd7f..9ade356 100644
--- a/board/liebherr/xea/xea.c
+++ b/board/liebherr/xea/xea.c
@@ -13,7 +13,6 @@
*
*/
-#include <common.h>
#include <fdt_support.h>
#include <init.h>
#include <log.h>
diff --git a/board/logicpd/am3517evm/am3517evm.c b/board/logicpd/am3517evm/am3517evm.c
index e69a73f..e6ca310 100644
--- a/board/logicpd/am3517evm/am3517evm.c
+++ b/board/logicpd/am3517evm/am3517evm.c
@@ -10,7 +10,6 @@
* Texas Instruments Incorporated - https://www.ti.com/
*/
-#include <common.h>
#include <dm.h>
#include <init.h>
#include <net.h>
diff --git a/board/logicpd/imx6/imx6logic.c b/board/logicpd/imx6/imx6logic.c
index 0d53548..589136f 100644
--- a/board/logicpd/imx6/imx6logic.c
+++ b/board/logicpd/imx6/imx6logic.c
@@ -8,7 +8,6 @@
* and updates by Jagan Teki <jagan@amarulasolutions.com>
*/
-#include <common.h>
#include <env.h>
#include <init.h>
#include <miiphy.h>
diff --git a/board/logicpd/omap3som/omap3logic.c b/board/logicpd/omap3som/omap3logic.c
index 8699282..a9fe619 100644
--- a/board/logicpd/omap3som/omap3logic.c
+++ b/board/logicpd/omap3som/omap3logic.c
@@ -10,7 +10,7 @@
* Richard Woodruff <r-woodruff2@ti.com>
* Syed Mohammed Khasim <khasim@ti.com>
*/
-#include <common.h>
+#include <config.h>
#include <dm.h>
#include <init.h>
#include <net.h>
diff --git a/board/maxbcm/maxbcm.c b/board/maxbcm/maxbcm.c
index aad3dc8..e011520 100644
--- a/board/maxbcm/maxbcm.c
+++ b/board/maxbcm/maxbcm.c
@@ -3,7 +3,6 @@
* Copyright (C) 2014 Stefan Roese <sr@denx.de>
*/
-#include <common.h>
#include <init.h>
#include <miiphy.h>
#include <asm/global_data.h>
diff --git a/board/mediatek/mt7622/mt7622_rfb.c b/board/mediatek/mt7622/mt7622_rfb.c
index 2cc73bc..e7f492a 100644
--- a/board/mediatek/mt7622/mt7622_rfb.c
+++ b/board/mediatek/mt7622/mt7622_rfb.c
@@ -4,7 +4,6 @@
* Author: Sam Shih <sam.shih@mediatek.com>
*/
-#include <common.h>
#include <config.h>
#include <env.h>
#include <init.h>
diff --git a/board/mediatek/mt7623/mt7623_rfb.c b/board/mediatek/mt7623/mt7623_rfb.c
index ec10f77..c78eaa0 100644
--- a/board/mediatek/mt7623/mt7623_rfb.c
+++ b/board/mediatek/mt7623/mt7623_rfb.c
@@ -3,7 +3,7 @@
* Copyright (C) 2018 MediaTek Inc.
*/
-#include <common.h>
+#include <config.h>
#include <mmc.h>
#include <asm/global_data.h>
diff --git a/board/mediatek/mt7629/mt7629_rfb.c b/board/mediatek/mt7629/mt7629_rfb.c
index 55f7696..0271918 100644
--- a/board/mediatek/mt7629/mt7629_rfb.c
+++ b/board/mediatek/mt7629/mt7629_rfb.c
@@ -3,7 +3,7 @@
* Copyright (C) 2018 MediaTek Inc.
*/
-#include <common.h>
+#include <config.h>
#include <asm/global_data.h>
DECLARE_GLOBAL_DATA_PTR;
diff --git a/board/mediatek/mt8183/mt8183_pumpkin.c b/board/mediatek/mt8183/mt8183_pumpkin.c
index db613eb..1b87369 100644
--- a/board/mediatek/mt8183/mt8183_pumpkin.c
+++ b/board/mediatek/mt8183/mt8183_pumpkin.c
@@ -4,7 +4,6 @@
* Author: Fabien Parent <fparent@baylibre.com>
*/
-#include <common.h>
#include <dm.h>
#include <net.h>
diff --git a/board/mediatek/mt8512/mt8512.c b/board/mediatek/mt8512/mt8512.c
index ac3adb8..d2f557f 100644
--- a/board/mediatek/mt8512/mt8512.c
+++ b/board/mediatek/mt8512/mt8512.c
@@ -3,7 +3,6 @@
* Copyright (C) 2019 MediaTek Inc.
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <wdt.h>
diff --git a/board/mediatek/mt8516/mt8516_pumpkin.c b/board/mediatek/mt8516/mt8516_pumpkin.c
index 42f3863..930bfec 100644
--- a/board/mediatek/mt8516/mt8516_pumpkin.c
+++ b/board/mediatek/mt8516/mt8516_pumpkin.c
@@ -3,7 +3,6 @@
* Copyright (C) 2019 BayLibre SAS
*/
-#include <common.h>
#include <dm.h>
#include <net.h>
diff --git a/board/mediatek/mt8518/mt8518_ap1.c b/board/mediatek/mt8518/mt8518_ap1.c
index e03da63..745cfda 100644
--- a/board/mediatek/mt8518/mt8518_ap1.c
+++ b/board/mediatek/mt8518/mt8518_ap1.c
@@ -3,7 +3,7 @@
* Copyright (C) 2019 MediaTek Inc.
*/
-#include <common.h>
+#include <config.h>
#include <dm.h>
#include <init.h>
#include <log.h>
diff --git a/board/menlo/m53menlo/m53menlo.c b/board/menlo/m53menlo/m53menlo.c
index b8dffb0..79351f4 100644
--- a/board/menlo/m53menlo/m53menlo.c
+++ b/board/menlo/m53menlo/m53menlo.c
@@ -6,7 +6,6 @@
* Copyright (C) 2014-2017 Olaf Mandel <o.mandel@menlosystems.com>
*/
-#include <common.h>
#include <dm.h>
#include <init.h>
#include <malloc.h>
diff --git a/board/menlo/mx8menlo/mx8menlo.c b/board/menlo/mx8menlo/mx8menlo.c
index 18f5fd5..f47b45c 100644
--- a/board/menlo/mx8menlo/mx8menlo.c
+++ b/board/menlo/mx8menlo/mx8menlo.c
@@ -3,7 +3,6 @@
* Copyright 2021-2022 Marek Vasut <marex@denx.de>
*/
-#include <common.h>
#include <asm/arch/clock.h>
#include <asm/arch/imx8mm_pins.h>
#include <asm/arch/sys_proto.h>
diff --git a/board/microchip/mpfs_icicle/mpfs_icicle.c b/board/microchip/mpfs_icicle/mpfs_icicle.c
index 0f5f829..7beac33 100644
--- a/board/microchip/mpfs_icicle/mpfs_icicle.c
+++ b/board/microchip/mpfs_icicle/mpfs_icicle.c
@@ -4,7 +4,6 @@
* Padmarao Begari <padmarao.begari@microchip.com>
*/
-#include <common.h>
#include <dm.h>
#include <env.h>
#include <init.h>
diff --git a/board/microchip/pic32mzda/pic32mzda.c b/board/microchip/pic32mzda/pic32mzda.c
index 3c2203d..848a1ae 100644
--- a/board/microchip/pic32mzda/pic32mzda.c
+++ b/board/microchip/pic32mzda/pic32mzda.c
@@ -7,7 +7,6 @@
*
*/
-#include <common.h>
#include <dm.h>
#include <clk.h>
#include <init.h>
diff --git a/board/mikrotik/crs3xx-98dx3236/crs3xx-98dx3236.c b/board/mikrotik/crs3xx-98dx3236/crs3xx-98dx3236.c
index 315169b..ae1c586 100644
--- a/board/mikrotik/crs3xx-98dx3236/crs3xx-98dx3236.c
+++ b/board/mikrotik/crs3xx-98dx3236/crs3xx-98dx3236.c
@@ -3,7 +3,6 @@
* Copyright (C) 2015 Stefan Roese <sr@denx.de>
*/
-#include <common.h>
#include <i2c.h>
#include <init.h>
#include <asm/global_data.h>
diff --git a/board/mntre/imx8mq_reform2/imx8mq_reform2.c b/board/mntre/imx8mq_reform2/imx8mq_reform2.c
index be5c506..ebc490e 100644
--- a/board/mntre/imx8mq_reform2/imx8mq_reform2.c
+++ b/board/mntre/imx8mq_reform2/imx8mq_reform2.c
@@ -4,7 +4,6 @@
* Copyright (C) 2018, Boundary Devices <info@boundarydevices.com>
*/
-#include <common.h>
#include <env.h>
#include <init.h>
#include <malloc.h>
diff --git a/board/mntre/imx8mq_reform2/spl.c b/board/mntre/imx8mq_reform2/spl.c
index 5120c62..48a7835 100644
--- a/board/mntre/imx8mq_reform2/spl.c
+++ b/board/mntre/imx8mq_reform2/spl.c
@@ -5,7 +5,7 @@
* SPDX-License-Identifier: GPL-2.0+
*/
-#include <common.h>
+#include <config.h>
#include <hang.h>
#include <image.h>
#include <init.h>
diff --git a/board/msc/sm2s_imx8mp/sm2s_imx8mp.c b/board/msc/sm2s_imx8mp/sm2s_imx8mp.c
index 6ccbf02..b1ce014 100644
--- a/board/msc/sm2s_imx8mp/sm2s_imx8mp.c
+++ b/board/msc/sm2s_imx8mp/sm2s_imx8mp.c
@@ -7,7 +7,6 @@
* Copyright 2021 Collabora Ltd.
*/
-#include <common.h>
#include <errno.h>
#include <miiphy.h>
#include <netdev.h>
diff --git a/board/msc/sm2s_imx8mp/spl.c b/board/msc/sm2s_imx8mp/spl.c
index ed7a1b7..b1b5561 100644
--- a/board/msc/sm2s_imx8mp/spl.c
+++ b/board/msc/sm2s_imx8mp/spl.c
@@ -7,7 +7,7 @@
* Copyright 2021 Collabora Ltd.
*/
-#include <common.h>
+#include <config.h>
#include <cpu_func.h>
#include <fsl_esdhc_imx.h>
#include <hang.h>
diff --git a/board/mscc/common/spi.c b/board/mscc/common/spi.c
index 45b9649..cb43ad6 100644
--- a/board/mscc/common/spi.c
+++ b/board/mscc/common/spi.c
@@ -3,7 +3,6 @@
* Copyright (c) 2018 Microsemi Coprporation
*/
-#include <common.h>
#include <asm/io.h>
#include <spi.h>
#include <linux/bitops.h>
diff --git a/board/mscc/jr2/jr2.c b/board/mscc/jr2/jr2.c
index 84b95be..acaeb46 100644
--- a/board/mscc/jr2/jr2.c
+++ b/board/mscc/jr2/jr2.c
@@ -3,7 +3,7 @@
* Copyright (c) 2018 Microsemi Corporation
*/
-#include <common.h>
+#include <config.h>
#include <image.h>
#include <init.h>
#include <asm/io.h>
diff --git a/board/mscc/luton/luton.c b/board/mscc/luton/luton.c
index 48170b3..f9ea26e 100644
--- a/board/mscc/luton/luton.c
+++ b/board/mscc/luton/luton.c
@@ -3,7 +3,7 @@
* Copyright (c) 2018 Microsemi Corporation
*/
-#include <common.h>
+#include <config.h>
#include <image.h>
#include <init.h>
#include <asm/global_data.h>
diff --git a/board/mscc/ocelot/ocelot.c b/board/mscc/ocelot/ocelot.c
index d69db04..4cec25b 100644
--- a/board/mscc/ocelot/ocelot.c
+++ b/board/mscc/ocelot/ocelot.c
@@ -3,7 +3,7 @@
* Copyright (c) 2018 Microsemi Corporation
*/
-#include <common.h>
+#include <config.h>
#include <image.h>
#include <init.h>
#include <log.h>
diff --git a/board/mscc/serval/serval.c b/board/mscc/serval/serval.c
index 99d5f5b..951c24d 100644
--- a/board/mscc/serval/serval.c
+++ b/board/mscc/serval/serval.c
@@ -3,7 +3,7 @@
* Copyright (c) 2018 Microsemi Corporation
*/
-#include <common.h>
+#include <config.h>
#include <image.h>
#include <init.h>
#include <asm/global_data.h>
diff --git a/board/mscc/servalt/servalt.c b/board/mscc/servalt/servalt.c
index 4999316..9055b73 100644
--- a/board/mscc/servalt/servalt.c
+++ b/board/mscc/servalt/servalt.c
@@ -3,7 +3,7 @@
* Copyright (c) 2018 Microsemi Corporation
*/
-#include <common.h>
+#include <config.h>
#include <image.h>
#include <init.h>
#include <asm/global_data.h>
diff --git a/board/myir/mys_6ulx/spl.c b/board/myir/mys_6ulx/spl.c
index 3cf14e2..4414487 100644
--- a/board/myir/mys_6ulx/spl.c
+++ b/board/myir/mys_6ulx/spl.c
@@ -4,7 +4,7 @@
* Author: Parthiban Nallathambi <parthiban@linumiz.com>
*/
-#include <common.h>
+#include <config.h>
#include <init.h>
#include <spl.h>
#include <asm/arch/clock.h>
diff --git a/board/netgear/dgnd3700v2/dgnd3700v2.c b/board/netgear/dgnd3700v2/dgnd3700v2.c
index cfc3529..9cf3a2f 100644
--- a/board/netgear/dgnd3700v2/dgnd3700v2.c
+++ b/board/netgear/dgnd3700v2/dgnd3700v2.c
@@ -3,7 +3,6 @@
* Copyright (C) 2018 Álvaro Fernández Rojas <noltari@gmail.com>
*/
-#include <common.h>
#include <init.h>
#include <asm/io.h>
#include <linux/bitops.h>
diff --git a/board/novtech/meerkat96/meerkat96.c b/board/novtech/meerkat96/meerkat96.c
index 1edebe5..ca3b069 100644
--- a/board/novtech/meerkat96/meerkat96.c
+++ b/board/novtech/meerkat96/meerkat96.c
@@ -12,7 +12,6 @@
#include <asm/global_data.h>
#include <asm/mach-imx/iomux-v3.h>
#include <asm/io.h>
-#include <common.h>
#include <linux/sizes.h>
DECLARE_GLOBAL_DATA_PTR;
diff --git a/board/nuvoton/arbel_evb/arbel_evb.c b/board/nuvoton/arbel_evb/arbel_evb.c
index 8fc56c1..1f51921 100644
--- a/board/nuvoton/arbel_evb/arbel_evb.c
+++ b/board/nuvoton/arbel_evb/arbel_evb.c
@@ -3,7 +3,6 @@
* Copyright (c) 2022 Nuvoton Technology Corp.
*/
-#include <common.h>
#include <dm.h>
#include <asm/io.h>
#include <asm/arch/gcr.h>
@@ -27,6 +26,15 @@
return 0;
}
+phys_size_t get_effective_memsize(void)
+{
+ /* Use bank0 only */
+ if (gd->ram_size > DRAM_2GB_SIZE)
+ return DRAM_2GB_SIZE;
+
+ return gd->ram_size;
+}
+
int dram_init(void)
{
struct npcm_gcr *gcr = (struct npcm_gcr *)NPCM_GCR_BA;
@@ -70,21 +78,16 @@
gd->bd->bi_dram[1].start = DRAM_4GB_SIZE;
gd->bd->bi_dram[1].size = DRAM_2GB_SIZE -
(DRAM_4GB_SIZE - DRAM_4GB_ECC_SIZE);
- /* use bank0 only */
- gd->ram_size = DRAM_2GB_SIZE;
break;
case DRAM_4GB_SIZE:
gd->bd->bi_dram[0].size = DRAM_2GB_SIZE;
gd->bd->bi_dram[1].start = DRAM_4GB_SIZE;
gd->bd->bi_dram[1].size = DRAM_2GB_SIZE;
- /* use bank0 only */
- gd->ram_size = DRAM_2GB_SIZE;
break;
default:
gd->bd->bi_dram[0].size = DRAM_1GB_SIZE;
gd->bd->bi_dram[1].start = 0;
gd->bd->bi_dram[1].size = 0;
- gd->ram_size = DRAM_1GB_SIZE;
break;
}
diff --git a/board/nuvoton/poleg_evb/poleg_evb.c b/board/nuvoton/poleg_evb/poleg_evb.c
index 7421911..3c4e5aa 100644
--- a/board/nuvoton/poleg_evb/poleg_evb.c
+++ b/board/nuvoton/poleg_evb/poleg_evb.c
@@ -4,7 +4,6 @@
* Copyright (c) 2021 Nuvoton Technology Corp.
*/
-#include <common.h>
#include <dm.h>
#include <env.h>
#include <asm/io.h>
@@ -21,7 +20,6 @@
int dram_init(void)
{
- char value[32];
struct npcm_gcr *gcr = (struct npcm_gcr *)NPCM_GCR_BA;
int ramsize = (readl(&gcr->intcr3) >> 8) & 0x7;
@@ -47,17 +45,31 @@
break;
}
- if (gd->ram_size > 0) {
- sprintf(value, "%ldM", (gd->ram_size / 0x100000));
- env_set("mem", value);
- }
-
return 0;
}
int last_stage_init(void)
{
- board_set_console();
+
+ char value[32];
+ struct udevice *dev = gd->cur_serial_dev;
+
+ if (gd->ram_size > 0) {
+ sprintf(value, "%ldM", (gd->ram_size / 0x100000));
+ env_set("mem", value);
+ }
+
+ if (dev && (dev->seq_ >= 0)) {
+ void *addr;
+ addr = dev_read_addr_ptr(dev);
+ if (addr) {
+ sprintf(value, "uart8250,mmio32,0x%x", (u32)addr);
+ env_set("earlycon", value);
+ }
+ sprintf(value, "ttyS%d,115200n8", dev->seq_);
+ env_set("console", value);
+ board_set_console();
+ }
return 0;
}
diff --git a/board/nvidia/beaver/beaver-spl.c b/board/nvidia/beaver/beaver-spl.c
index b5d0c14..c6956ff 100644
--- a/board/nvidia/beaver/beaver-spl.c
+++ b/board/nvidia/beaver/beaver-spl.c
@@ -7,7 +7,6 @@
* Svyatoslav Ryhel <clamor95@gmail.com>
*/
-#include <common.h>
#include <asm/arch-tegra/tegra_i2c.h>
#include <linux/delay.h>
diff --git a/board/nvidia/cardhu/cardhu-spl.c b/board/nvidia/cardhu/cardhu-spl.c
index de2fa30..80912a6 100644
--- a/board/nvidia/cardhu/cardhu-spl.c
+++ b/board/nvidia/cardhu/cardhu-spl.c
@@ -7,7 +7,6 @@
* Svyatoslav Ryhel <clamor95@gmail.com>
*/
-#include <common.h>
#include <asm/arch-tegra/tegra_i2c.h>
#include <linux/delay.h>
diff --git a/board/nvidia/cardhu/cardhu.c b/board/nvidia/cardhu/cardhu.c
index 6848e34..ab0dc61 100644
--- a/board/nvidia/cardhu/cardhu.c
+++ b/board/nvidia/cardhu/cardhu.c
@@ -4,7 +4,6 @@
* NVIDIA Corporation <www.nvidia.com>
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <asm/arch/pinmux.h>
diff --git a/board/nvidia/dalmore/dalmore.c b/board/nvidia/dalmore/dalmore.c
index 72511e4..c00c634 100644
--- a/board/nvidia/dalmore/dalmore.c
+++ b/board/nvidia/dalmore/dalmore.c
@@ -3,7 +3,6 @@
* Copyright (c) 2010-2013, NVIDIA CORPORATION. All rights reserved.
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <asm/arch/pinmux.h>
diff --git a/board/nvidia/harmony/harmony.c b/board/nvidia/harmony/harmony.c
index 5223679..da14e09 100644
--- a/board/nvidia/harmony/harmony.c
+++ b/board/nvidia/harmony/harmony.c
@@ -4,7 +4,6 @@
* NVIDIA Corporation <www.nvidia.com>
*/
-#include <common.h>
#include <asm/io.h>
#include <asm/arch/clock.h>
#include <asm/arch/funcmux.h>
diff --git a/board/nvidia/jetson-tk1/jetson-tk1.c b/board/nvidia/jetson-tk1/jetson-tk1.c
index 7f3cdd7..da6edb4 100644
--- a/board/nvidia/jetson-tk1/jetson-tk1.c
+++ b/board/nvidia/jetson-tk1/jetson-tk1.c
@@ -4,7 +4,6 @@
* NVIDIA Corporation <www.nvidia.com>
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <linux/printk.h>
diff --git a/board/nvidia/nyan-big/nyan-big.c b/board/nvidia/nyan-big/nyan-big.c
index 06a36f8..e15f31d 100644
--- a/board/nvidia/nyan-big/nyan-big.c
+++ b/board/nvidia/nyan-big/nyan-big.c
@@ -4,7 +4,6 @@
* NVIDIA Corporation <www.nvidia.com>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <log.h>
diff --git a/board/nvidia/p2371-0000/p2371-0000.c b/board/nvidia/p2371-0000/p2371-0000.c
index b819b04..edf2b1a 100644
--- a/board/nvidia/p2371-0000/p2371-0000.c
+++ b/board/nvidia/p2371-0000/p2371-0000.c
@@ -4,7 +4,6 @@
* NVIDIA Corporation <www.nvidia.com>
*/
-#include <common.h>
#include <i2c.h>
#include <log.h>
#include <asm/arch/gpio.h>
diff --git a/board/nvidia/p2371-2180/p2371-2180.c b/board/nvidia/p2371-2180/p2371-2180.c
index 816c7be..5f203d8 100644
--- a/board/nvidia/p2371-2180/p2371-2180.c
+++ b/board/nvidia/p2371-2180/p2371-2180.c
@@ -4,7 +4,6 @@
* NVIDIA Corporation <www.nvidia.com>
*/
-#include <common.h>
#include <env.h>
#include <fdtdec.h>
#include <i2c.h>
diff --git a/board/nvidia/p2571/p2571.c b/board/nvidia/p2571/p2571.c
index a4c4259..4056f98 100644
--- a/board/nvidia/p2571/p2571.c
+++ b/board/nvidia/p2571/p2571.c
@@ -4,7 +4,6 @@
* NVIDIA Corporation <www.nvidia.com>
*/
-#include <common.h>
#include <i2c.h>
#include <log.h>
#include <asm/arch/gpio.h>
diff --git a/board/nvidia/p2771-0000/p2771-0000.c b/board/nvidia/p2771-0000/p2771-0000.c
index 5ff89c4..12eaa7a 100644
--- a/board/nvidia/p2771-0000/p2771-0000.c
+++ b/board/nvidia/p2771-0000/p2771-0000.c
@@ -3,7 +3,6 @@
* Copyright (c) 2016, NVIDIA CORPORATION
*/
-#include <common.h>
#include <env.h>
#include <fdtdec.h>
#include <i2c.h>
diff --git a/board/nvidia/p3450-0000/p3450-0000.c b/board/nvidia/p3450-0000/p3450-0000.c
index fb1a224..530c438 100644
--- a/board/nvidia/p3450-0000/p3450-0000.c
+++ b/board/nvidia/p3450-0000/p3450-0000.c
@@ -5,7 +5,6 @@
*
*/
-#include <common.h>
#include <fdtdec.h>
#include <i2c.h>
#include <linux/bitops.h>
diff --git a/board/nvidia/seaboard/seaboard.c b/board/nvidia/seaboard/seaboard.c
index 8297511..a646dcc 100644
--- a/board/nvidia/seaboard/seaboard.c
+++ b/board/nvidia/seaboard/seaboard.c
@@ -4,7 +4,6 @@
* NVIDIA Corporation <www.nvidia.com>
*/
-#include <common.h>
#include <asm/io.h>
#include <asm/mach-types.h>
#include <asm/arch/tegra.h>
diff --git a/board/nvidia/venice2/as3722_init.c b/board/nvidia/venice2/as3722_init.c
index 395bdd9..b89e037 100644
--- a/board/nvidia/venice2/as3722_init.c
+++ b/board/nvidia/venice2/as3722_init.c
@@ -4,7 +4,6 @@
* NVIDIA Corporation <www.nvidia.com>
*/
-#include <common.h>
#include <log.h>
#include <asm/io.h>
#include <asm/arch-tegra/tegra_i2c.h>
diff --git a/board/nvidia/venice2/venice2.c b/board/nvidia/venice2/venice2.c
index d89bbe5..fa10cda 100644
--- a/board/nvidia/venice2/venice2.c
+++ b/board/nvidia/venice2/venice2.c
@@ -4,7 +4,7 @@
* NVIDIA Corporation <www.nvidia.com>
*/
-#include <common.h>
+#include <linux/kernel.h>
#include <asm/arch/gpio.h>
#include <asm/arch/pinmux.h>
#include "pinmux-config-venice2.h"
diff --git a/board/olimex/mx23_olinuxino/mx23_olinuxino.c b/board/olimex/mx23_olinuxino/mx23_olinuxino.c
index bdd5fcd..b2bb667 100644
--- a/board/olimex/mx23_olinuxino/mx23_olinuxino.c
+++ b/board/olimex/mx23_olinuxino/mx23_olinuxino.c
@@ -5,7 +5,6 @@
* Copyright (C) 2013 Marek Vasut <marex@denx.de>
*/
-#include <common.h>
#include <init.h>
#include <asm/global_data.h>
#include <asm/gpio.h>
diff --git a/board/olimex/mx23_olinuxino/spl_boot.c b/board/olimex/mx23_olinuxino/spl_boot.c
index 248176c..eb85ce9 100644
--- a/board/olimex/mx23_olinuxino/spl_boot.c
+++ b/board/olimex/mx23_olinuxino/spl_boot.c
@@ -5,7 +5,6 @@
* Copyright (C) 2013 Marek Vasut <marex@denx.de>
*/
-#include <common.h>
#include <config.h>
#include <asm/io.h>
#include <asm/arch/iomux-mx23.h>
diff --git a/board/openpiton/riscv64/openpiton-riscv64.c b/board/openpiton/riscv64/openpiton-riscv64.c
index f2282d1..4c957e8 100644
--- a/board/openpiton/riscv64/openpiton-riscv64.c
+++ b/board/openpiton/riscv64/openpiton-riscv64.c
@@ -8,7 +8,6 @@
* Pragnesh Patel <pragnesh.patel@sifive.com>
* Tianrui Wei <tianrui-wei@outlook.com>
*/
-#include <common.h>
#include <init.h>
#include <configs/openpiton-riscv64.h>
#include <dm.h>
diff --git a/board/out4/o4-imx6ull-nano/o4-imx6ull-nano.c b/board/out4/o4-imx6ull-nano/o4-imx6ull-nano.c
index edb200e..10469ae 100644
--- a/board/out4/o4-imx6ull-nano/o4-imx6ull-nano.c
+++ b/board/out4/o4-imx6ull-nano/o4-imx6ull-nano.c
@@ -5,7 +5,6 @@
#include <asm/arch/sys_proto.h>
#include <asm/global_data.h>
#include <asm/mach-imx/boot_mode.h>
-#include <common.h>
#include <env.h>
DECLARE_GLOBAL_DATA_PTR;
diff --git a/board/phytec/common/Kconfig b/board/phytec/common/Kconfig
index 3b1c5aa..1077f0f 100644
--- a/board/phytec/common/Kconfig
+++ b/board/phytec/common/Kconfig
@@ -11,3 +11,21 @@
help
Support of I2C EEPROM based SoM detection. Supported
for PHYTEC i.MX8MM/i.MX8MP boards
+
+config PHYTEC_AM62_SOM_DETECTION
+ bool "Support SoM detection for AM62x PHYTEC platforms"
+ depends on (TARGET_PHYCORE_AM62X_A53 || TARGET_PHYCORE_AM62X_R5) && \
+ PHYTEC_SOM_DETECTION
+ default y
+ help
+ Support of I2C EEPROM based SoM detection. Supported
+ for PHYTEC AM62x boards.
+
+config PHYTEC_AM64_SOM_DETECTION
+ bool "Support SoM detection for AM64x PHYTEC platforms"
+ depends on (TARGET_PHYCORE_AM64X_A53 || TARGET_PHYCORE_AM64X_R5) && \
+ PHYTEC_SOM_DETECTION
+ default y
+ help
+ Support of I2C EEPROM based SoM detection. Supported
+ for PHYTEC AM64x boards.
diff --git a/board/phytec/common/Makefile b/board/phytec/common/Makefile
index 35c8174..3feb00f 100644
--- a/board/phytec/common/Makefile
+++ b/board/phytec/common/Makefile
@@ -8,4 +8,5 @@
endif
obj-y += phytec_som_detection.o
+obj-$(CONFIG_ARCH_K3) += am6_som_detection.o
obj-$(CONFIG_ARCH_IMX8M) += imx8m_som_detection.o
diff --git a/board/phytec/common/am6_som_detection.c b/board/phytec/common/am6_som_detection.c
new file mode 100644
index 0000000..2e9884d
--- /dev/null
+++ b/board/phytec/common/am6_som_detection.c
@@ -0,0 +1,159 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2024 PHYTEC Messtechnik GmbH
+ * Author: Daniel Schultz <d.schultz@phytec.de>
+ */
+
+#include <asm/arch/hardware.h>
+
+#include "am6_som_detection.h"
+
+extern struct phytec_eeprom_data eeprom_data;
+
+#if IS_ENABLED(CONFIG_PHYTEC_AM62_SOM_DETECTION) || \
+ IS_ENABLED(CONFIG_PHYTEC_AM64_SOM_DETECTION)
+
+/* Check if the SoM is actually one of the following products:
+ * - phyCORE-AM62x
+ * - phyCORE-AM64x
+ *
+ * Returns 0 in case it's a known SoM. Otherwise, returns -1.
+ */
+int phytec_am6_detect(struct phytec_eeprom_data *data)
+{
+ char *opt;
+ u8 som;
+
+ if (!data)
+ data = &eeprom_data;
+
+ /* We cannot do the check for early API revisions */
+ if (!data->valid || data->payload.api_rev < PHYTEC_API_REV2)
+ return -1;
+
+ som = data->payload.data.data_api2.som_no;
+ debug("%s: som id: %u\n", __func__, som);
+
+ opt = phytec_get_opt(data);
+ if (!opt)
+ return -1;
+
+ if (som == PHYTEC_AM62X_SOM && soc_is_am62x())
+ return 0;
+
+ if (som == PHYTEC_AM64X_SOM && soc_is_am64x())
+ return 0;
+
+ return -1;
+}
+
+static u8 phytec_check_opt(struct phytec_eeprom_data *data, u8 option)
+{
+ char *opt;
+
+ if (!data)
+ data = &eeprom_data;
+
+ if (!data->valid || data->payload.api_rev < PHYTEC_API_REV2)
+ return PHYTEC_EEPROM_INVAL;
+
+ if (option > 8)
+ return PHYTEC_EEPROM_INVAL;
+
+ opt = phytec_get_opt(data);
+ if (opt)
+ return PHYTEC_GET_OPTION(opt[option]);
+ return PHYTEC_EEPROM_INVAL;
+}
+
+/*
+ * Reads LPDDR4 ram size from EEPROM.
+ *
+ * returns:
+ * - The size
+ * - PHYTEC_EEPROM_INVAL when the data is invalid.
+ */
+u8 __maybe_unused phytec_get_am62_ddr_size(struct phytec_eeprom_data *data)
+{
+ u8 ddr_id = phytec_check_opt(data, 3);
+
+ pr_debug("%s: ddr id: %u\n", __func__, ddr_id);
+ return ddr_id;
+}
+
+/*
+ * Reads SPI-NOR flash size and type from EEPROM.
+ *
+ * returns:
+ * - PHYTEC_EEPROM_VALUE_X if no SPI is poulated.
+ * - Otherwise a board depended code for the size.
+ * - PHYTEC_EEPROM_INVAL when the data is invalid.
+ */
+u8 __maybe_unused phytec_get_am62_spi(struct phytec_eeprom_data *data)
+{
+ u8 spi = phytec_check_opt(data, 5);
+
+ pr_debug("%s: spi: %u\n", __func__, spi);
+ return spi;
+}
+
+/*
+ * Reads Ethernet phy information from EEPROM.
+ *
+ * returns:
+ * - 0x0 no ethernet phy is populated.
+ * - 0x1 if 10/100/1000 MBit Phy is populated.
+ * - PHYTEC_EEPROM_INVAL when the data is invalid.
+ */
+u8 __maybe_unused phytec_get_am62_eth(struct phytec_eeprom_data *data)
+{
+ u8 eth = phytec_check_opt(data, 6);
+
+ pr_debug("%s: eth: %u\n", __func__, eth);
+ return eth;
+}
+
+/*
+ * Reads RTC information from EEPROM.
+ *
+ * returns:
+ * - 0 if no RTC is poulated.
+ * - 1 if it is populated.
+ * - PHYTEC_EEPROM_INVAL when the data is invalid.
+ */
+u8 __maybe_unused phytec_get_am62_rtc(struct phytec_eeprom_data *data)
+{
+ u8 rtc = phytec_check_opt(data, 7);
+
+ pr_debug("%s: rtc: %u\n", __func__, rtc);
+ return rtc;
+}
+
+#else
+
+inline int __maybe_unused phytec_am62_detect(struct phytec_eeprom_data *data)
+{
+ return -1;
+}
+
+inline u8 __maybe_unused
+phytec_get_am62_ddr_size(struct phytec_eeprom_data *data)
+{
+ return PHYTEC_EEPROM_INVAL;
+}
+
+inline u8 __maybe_unused phytec_get_am62_spi(struct phytec_eeprom_data *data)
+{
+ return PHYTEC_EEPROM_INVAL;
+}
+
+inline u8 __maybe_unused phytec_get_am62_eth(struct phytec_eeprom_data *data)
+{
+ return PHYTEC_EEPROM_INVAL;
+}
+
+inline u8 __maybe_unused phytec_get_am62_rtc(struct phytec_eeprom_data *data)
+{
+ return PHYTEC_EEPROM_INVAL;
+}
+#endif
diff --git a/board/phytec/common/am6_som_detection.h b/board/phytec/common/am6_som_detection.h
new file mode 100644
index 0000000..032f9da
--- /dev/null
+++ b/board/phytec/common/am6_som_detection.h
@@ -0,0 +1,36 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * Copyright (C) 2024 PHYTEC Messtechnik GmbH
+ * Author: Daniel Schultz <d.schultz@phytec.de>
+ */
+
+#ifndef _PHYTEC_AM6_SOM_DETECTION_H
+#define _PHYTEC_AM6_SOM_DETECTION_H
+
+#include "phytec_som_detection.h"
+
+#define PHYTEC_AM62X_SOM 71
+#define PHYTEC_AM64X_SOM 72
+#define PHYTEC_EEPROM_VALUE_X 0x21
+#define PHYTEC_EEPROM_NOR_FLASH_64MB_QSPI 0xC
+
+int __maybe_unused phytec_am6_detect(struct phytec_eeprom_data *data);
+u8 __maybe_unused phytec_get_am6_ddr_size(struct phytec_eeprom_data *data);
+u8 __maybe_unused phytec_get_am6_spi(struct phytec_eeprom_data *data);
+u8 __maybe_unused phytec_get_am6_eth(struct phytec_eeprom_data *data);
+u8 __maybe_unused phytec_get_am6_rtc(struct phytec_eeprom_data *data);
+
+static inline int phytec_am6_is_qspi(struct phytec_eeprom_data *data)
+{
+ u8 spi = phytec_get_am6_spi(data);
+
+ if (spi == PHYTEC_EEPROM_VALUE_X)
+ return 0;
+ return spi <= PHYTEC_EEPROM_NOR_FLASH_64MB_QSPI;
+}
+
+static inline int phytec_am6_is_ospi(struct phytec_eeprom_data *data)
+{
+ return phytec_get_am6_spi(data) > PHYTEC_EEPROM_NOR_FLASH_64MB_QSPI;
+}
+#endif /* _PHYTEC_AM6_SOM_DETECTION_H */
diff --git a/board/phytec/common/imx8m_som_detection.c b/board/phytec/common/imx8m_som_detection.c
index 214b75d..bfd60ff 100644
--- a/board/phytec/common/imx8m_som_detection.c
+++ b/board/phytec/common/imx8m_som_detection.c
@@ -4,7 +4,6 @@
* Author: Teresa Remmet <t.remmet@phytec.de>
*/
-#include <common.h>
#include <asm/arch/sys_proto.h>
#include <dm/device.h>
#include <dm/uclass.h>
@@ -34,10 +33,10 @@
data = &eeprom_data;
/* We can not do the check for early API revisions */
- if (data->api_rev < PHYTEC_API_REV2)
+ if (!data->valid || data->payload.api_rev < PHYTEC_API_REV2)
return -1;
- som = data->data.data_api2.som_no;
+ som = data->payload.data.data_api2.som_no;
debug("%s: som id: %u\n", __func__, som);
opt = phytec_get_opt(data);
@@ -75,6 +74,9 @@
if (!data)
data = &eeprom_data;
+ if (!data->valid || data->payload.api_rev < PHYTEC_API_REV2)
+ return PHYTEC_EEPROM_INVAL;
+
opt = phytec_get_opt(data);
if (opt)
ddr_id = PHYTEC_GET_OPTION(opt[2]);
@@ -99,7 +101,7 @@
if (!data)
data = &eeprom_data;
- if (data->api_rev < PHYTEC_API_REV2)
+ if (!data->valid || data->payload.api_rev < PHYTEC_API_REV2)
return PHYTEC_EEPROM_INVAL;
opt = phytec_get_opt(data);
@@ -126,7 +128,7 @@
if (!data)
data = &eeprom_data;
- if (data->api_rev < PHYTEC_API_REV2)
+ if (!data->valid || data->payload.api_rev < PHYTEC_API_REV2)
return PHYTEC_EEPROM_INVAL;
opt = phytec_get_opt(data);
@@ -154,7 +156,7 @@
if (!data)
data = &eeprom_data;
- if (data->api_rev < PHYTEC_API_REV2)
+ if (!data->valid || data->payload.api_rev < PHYTEC_API_REV2)
return PHYTEC_EEPROM_INVAL;
opt = phytec_get_opt(data);
diff --git a/board/phytec/common/phytec_som_detection.c b/board/phytec/common/phytec_som_detection.c
index a56e0f6..b14bb3d 100644
--- a/board/phytec/common/phytec_som_detection.c
+++ b/board/phytec/common/phytec_som_detection.c
@@ -4,11 +4,12 @@
* Author: Teresa Remmet <t.remmet@phytec.de>
*/
-#include <common.h>
#include <dm/device.h>
#include <dm/uclass.h>
#include <i2c.h>
#include <u-boot/crc.h>
+#include <malloc.h>
+#include <extension_board.h>
#include "phytec_som_detection.h"
@@ -51,7 +52,8 @@
{
int ret, i;
unsigned int crc;
- int *ptr;
+ u8 *ptr;
+ const unsigned int payload_size = sizeof(struct phytec_eeprom_payload);
if (!data)
data = &eeprom_data;
@@ -62,14 +64,13 @@
ret = i2c_get_chip_for_busnum(bus_num, addr, 2, &dev);
if (ret) {
pr_err("%s: i2c EEPROM not found: %i.\n", __func__, ret);
- return ret;
+ goto err;
}
- ret = dm_i2c_read(dev, 0, (uint8_t *)data,
- sizeof(struct phytec_eeprom_data));
+ ret = dm_i2c_read(dev, 0, (uint8_t *)data, payload_size);
if (ret) {
- pr_err("%s: Unable to read EEPROM data\n", __func__);
- return ret;
+ pr_err("%s: Unable to read EEPROM data: %i\n", __func__, ret);
+ goto err;
}
#else
i2c_set_bus_num(bus_num);
@@ -77,36 +78,44 @@
sizeof(struct phytec_eeprom_data));
#endif
- if (data->api_rev == 0xff) {
+ if (data->payload.api_rev == 0xff) {
pr_err("%s: EEPROM is not flashed. Prototype?\n", __func__);
- return -EINVAL;
+ ret = -EINVAL;
+ goto err;
}
- ptr = (int *)data;
- for (i = 0; i < sizeof(struct phytec_eeprom_data); i++)
+ ptr = (u8 *)data;
+ for (i = 0; i < payload_size; ++i)
if (ptr[i] != 0x0)
break;
- if (i == sizeof(struct phytec_eeprom_data)) {
+ if (i == payload_size) {
pr_err("%s: EEPROM data is all zero. Erased?\n", __func__);
- return -EINVAL;
+ ret = -EINVAL;
+ goto err;
}
/* We are done here for early revisions */
- if (data->api_rev <= PHYTEC_API_REV1)
+ if (data->payload.api_rev <= PHYTEC_API_REV1) {
+ data->valid = true;
return 0;
+ }
- crc = crc8(0, (const unsigned char *)data,
- sizeof(struct phytec_eeprom_data));
+ crc = crc8(0, (const unsigned char *)&data->payload, payload_size);
debug("%s: crc: %x\n", __func__, crc);
if (crc) {
- pr_err("%s: CRC mismatch. EEPROM data is not usable\n",
+ pr_err("%s: CRC mismatch. EEPROM data is not usable.\n",
__func__);
- return -EINVAL;
+ ret = -EINVAL;
+ goto err;
}
+ data->valid = true;
return 0;
+err:
+ data->valid = false;
+ return ret;
}
void __maybe_unused phytec_print_som_info(struct phytec_eeprom_data *data)
@@ -118,10 +127,10 @@
if (!data)
data = &eeprom_data;
- if (data->api_rev < PHYTEC_API_REV2)
+ if (!data->valid || data->payload.api_rev < PHYTEC_API_REV2)
return;
- api2 = &data->data.data_api2;
+ api2 = &data->payload.data.data_api2;
/* Calculate PCB subrevision */
pcb_sub_rev = api2->pcb_sub_opt_rev & 0x0f;
@@ -180,10 +189,13 @@
if (!data)
data = &eeprom_data;
- if (data->api_rev < PHYTEC_API_REV2)
- opt = data->data.data_api0.opt;
+ if (!data->valid)
+ return NULL;
+
+ if (data->payload.api_rev < PHYTEC_API_REV2)
+ opt = data->payload.data.data_api0.opt;
else
- opt = data->data.data_api2.opt;
+ opt = data->payload.data.data_api2.opt;
return opt;
}
@@ -195,10 +207,10 @@
if (!data)
data = &eeprom_data;
- if (data->api_rev < PHYTEC_API_REV2)
+ if (!data->valid || data->payload.api_rev < PHYTEC_API_REV2)
return PHYTEC_EEPROM_INVAL;
- api2 = &data->data.data_api2;
+ api2 = &data->payload.data.data_api2;
return api2->pcb_rev;
}
@@ -207,12 +219,35 @@
{
if (!data)
data = &eeprom_data;
- if (data->api_rev < PHYTEC_API_REV2)
+
+ if (!data->valid || data->payload.api_rev < PHYTEC_API_REV2)
return PHYTEC_EEPROM_INVAL;
- return data->data.data_api2.som_type;
+ return data->payload.data.data_api2.som_type;
}
+#if IS_ENABLED(CONFIG_CMD_EXTENSION)
+struct extension *phytec_add_extension(const char *name, const char *overlay,
+ const char *other)
+{
+ struct extension *extension;
+
+ if (strlen(overlay) > sizeof(extension->overlay)) {
+ pr_err("Overlay name %s is longer than %lu.\n", overlay,
+ sizeof(extension->overlay));
+ return NULL;
+ }
+
+ extension = calloc(1, sizeof(struct extension));
+ snprintf(extension->name, sizeof(extension->name), name);
+ snprintf(extension->overlay, sizeof(extension->overlay), overlay);
+ snprintf(extension->other, sizeof(extension->other), other);
+ snprintf(extension->owner, sizeof(extension->owner), "PHYTEC");
+
+ return extension;
+}
+#endif /* IS_ENABLED(CONFIG_CMD_EXTENSION) */
+
#else
inline int phytec_eeprom_data_setup(struct phytec_eeprom_data *data,
@@ -253,4 +288,13 @@
return PHYTEC_EEPROM_INVAL;
}
+#if IS_ENABLED(CONFIG_CMD_EXTENSION)
+inline struct extension *phytec_add_extension(const char *name,
+ const char *overlay,
+ const char *other)
+{
+ return NULL;
+}
+#endif /* IS_ENABLED(CONFIG_CMD_EXTENSION) */
+
#endif /* IS_ENABLED(CONFIG_PHYTEC_SOM_DETECTION) */
diff --git a/board/phytec/common/phytec_som_detection.h b/board/phytec/common/phytec_som_detection.h
index 7edbfa3..0ad5c14 100644
--- a/board/phytec/common/phytec_som_detection.h
+++ b/board/phytec/common/phytec_som_detection.h
@@ -55,7 +55,7 @@
u8 crc8; /* checksum */
} __packed;
-struct phytec_eeprom_data {
+struct phytec_eeprom_payload {
u8 api_rev;
union {
struct phytec_api0_data data_api0;
@@ -63,17 +63,27 @@
} data;
} __packed;
+struct phytec_eeprom_data {
+ struct phytec_eeprom_payload payload;
+ bool valid;
+};
+
int phytec_eeprom_data_setup_fallback(struct phytec_eeprom_data *data,
int bus_num, int addr,
int addr_fallback);
int phytec_eeprom_data_setup(struct phytec_eeprom_data *data,
int bus_num, int addr);
-int phytec_eeprom_data_init(struct phytec_eeprom_data *data,
- int bus_num, int addr);
+int phytec_eeprom_data_init(struct phytec_eeprom_data *data, int bus_num,
+ int addr);
void __maybe_unused phytec_print_som_info(struct phytec_eeprom_data *data);
char * __maybe_unused phytec_get_opt(struct phytec_eeprom_data *data);
u8 __maybe_unused phytec_get_rev(struct phytec_eeprom_data *data);
u8 __maybe_unused phytec_get_som_type(struct phytec_eeprom_data *data);
+#if IS_ENABLED(CONFIG_CMD_EXTENSION)
+struct extension *phytec_add_extension(const char *name, const char *overlay,
+ const char *other);
+#endif /* IS_ENABLED(CONFIG_CMD_EXTENSION) */
+
#endif /* _PHYTEC_SOM_DETECTION_H */
diff --git a/board/phytec/pcl063/spl.c b/board/phytec/pcl063/spl.c
index b6d459f..b98c46d 100644
--- a/board/phytec/pcl063/spl.c
+++ b/board/phytec/pcl063/spl.c
@@ -6,7 +6,7 @@
* Copyright (C) 2015-2016 Stefan Roese <sr@denx.de>
*/
-#include <common.h>
+#include <config.h>
#include <init.h>
#include <spl.h>
#include <asm/arch/clock.h>
diff --git a/board/phytec/pcm052/pcm052.c b/board/phytec/pcm052/pcm052.c
index 0f72359..20f2aac 100644
--- a/board/phytec/pcm052/pcm052.c
+++ b/board/phytec/pcm052/pcm052.c
@@ -6,7 +6,6 @@
* Copyright 2013 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <init.h>
#include <asm/global_data.h>
#include <asm/io.h>
diff --git a/board/phytec/pcm058/pcm058.c b/board/phytec/pcm058/pcm058.c
index b37c6fe..ecc5b75 100644
--- a/board/phytec/pcm058/pcm058.c
+++ b/board/phytec/pcm058/pcm058.c
@@ -9,7 +9,6 @@
* Both NAND and eMMC cannot be set because they share the
* same pins (SD4)
*/
-#include <common.h>
#include <init.h>
#include <net.h>
#include <asm/arch/crm_regs.h>
diff --git a/board/phytec/phycore_am335x_r2/board.c b/board/phytec/phycore_am335x_r2/board.c
index 5700eff..2022525 100644
--- a/board/phytec/phycore_am335x_r2/board.c
+++ b/board/phytec/phycore_am335x_r2/board.c
@@ -10,7 +10,7 @@
* Copyright (C) 2019 DENX Software Engineering GmbH
*/
-#include <common.h>
+#include <config.h>
#include <init.h>
#include <spl.h>
#include <asm/arch/cpu.h>
diff --git a/board/phytec/phycore_am335x_r2/mux.c b/board/phytec/phycore_am335x_r2/mux.c
index 7091c98..bb1c48d 100644
--- a/board/phytec/phycore_am335x_r2/mux.c
+++ b/board/phytec/phycore_am335x_r2/mux.c
@@ -6,7 +6,6 @@
* Copyright (C) 2019 DENX Software Engineering GmbH
*/
-#include <common.h>
#include <asm/arch/sys_proto.h>
#include <asm/arch/hardware.h>
#include <asm/arch/mux.h>
diff --git a/board/phytec/phycore_am62x/Kconfig b/board/phytec/phycore_am62x/Kconfig
index b64c345..1de8850 100644
--- a/board/phytec/phycore_am62x/Kconfig
+++ b/board/phytec/phycore_am62x/Kconfig
@@ -14,6 +14,8 @@
config SYS_CONFIG_NAME
default "phycore_am62x"
+source "board/phytec/common/Kconfig"
+
endif
if TARGET_PHYCORE_AM62X_R5
@@ -30,4 +32,6 @@
config SPL_LDSCRIPT
default "arch/arm/mach-omap2/u-boot-spl.lds"
+source "board/phytec/common/Kconfig"
+
endif
diff --git a/board/phytec/phycore_am62x/MAINTAINERS b/board/phytec/phycore_am62x/MAINTAINERS
index 884e9c6..02ac88e 100644
--- a/board/phytec/phycore_am62x/MAINTAINERS
+++ b/board/phytec/phycore_am62x/MAINTAINERS
@@ -3,9 +3,7 @@
W: https://www.phytec.com/product/phycore-am62x
S: Maintained
F: arch/arm/dts/k3-am62-phycore-som-ddr4-2gb.dtsi
-F: arch/arm/dts/k3-am62-phycore-som.dtsi
F: arch/arm/dts/k3-am625-phyboard-lyra-rdk-u-boot.dtsi
-F: arch/arm/dts/k3-am625-phyboard-lyra-rdk.dts
F: arch/arm/dts/k3-am625-phycore-som-binman.dtsi
F: arch/arm/dts/k3-am625-r5-phycore-som-2gb.dts
F: board/phytec/phycore_am62x/
diff --git a/board/phytec/phycore_am62x/phycore-am62x.c b/board/phytec/phycore_am62x/phycore-am62x.c
index 91a2401..618b4c3 100644
--- a/board/phytec/phycore_am62x/phycore-am62x.c
+++ b/board/phytec/phycore_am62x/phycore-am62x.c
@@ -57,3 +57,67 @@
MCU_CTRL_DEVICE_CLKOUT_32K_CTRL);
}
#endif
+
+#if IS_ENABLED(CONFIG_ENV_IS_IN_FAT) || IS_ENABLED(CONFIG_ENV_IS_IN_MMC)
+int mmc_get_env_dev(void)
+{
+ u32 boot_device = get_boot_device();
+
+ switch (boot_device) {
+ case BOOT_DEVICE_MMC1:
+ return 0;
+ case BOOT_DEVICE_MMC2:
+ return 1;
+ };
+
+ return CONFIG_SYS_MMC_ENV_DEV;
+}
+#endif
+
+enum env_location env_get_location(enum env_operation op, int prio)
+{
+ u32 boot_device = get_boot_device();
+
+ if (prio)
+ return ENVL_UNKNOWN;
+
+ switch (boot_device) {
+ case BOOT_DEVICE_MMC1:
+ case BOOT_DEVICE_MMC2:
+ if (CONFIG_IS_ENABLED(ENV_IS_IN_FAT))
+ return ENVL_FAT;
+ if (CONFIG_IS_ENABLED(ENV_IS_IN_MMC))
+ return ENVL_MMC;
+ case BOOT_DEVICE_SPI:
+ if (CONFIG_IS_ENABLED(ENV_IS_IN_SPI_FLASH))
+ return ENVL_SPI_FLASH;
+ default:
+ return ENVL_NOWHERE;
+ };
+}
+
+#if IS_ENABLED(CONFIG_BOARD_LATE_INIT)
+int board_late_init(void)
+{
+ u32 boot_device = get_boot_device();
+
+ switch (boot_device) {
+ case BOOT_DEVICE_MMC1:
+ env_set_ulong("mmcdev", 0);
+ env_set("boot", "mmc");
+ break;
+ case BOOT_DEVICE_MMC2:
+ env_set_ulong("mmcdev", 1);
+ env_set("boot", "mmc");
+ break;
+ case BOOT_DEVICE_SPI:
+ env_set("boot", "spi");
+ break;
+ case BOOT_DEVICE_ETHERNET:
+ env_set("boot", "net");
+ break;
+ };
+
+ return 0;
+}
+#endif
diff --git a/board/phytec/phycore_am64x/Kconfig b/board/phytec/phycore_am64x/Kconfig
index 427adb6..829526c 100644
--- a/board/phytec/phycore_am64x/Kconfig
+++ b/board/phytec/phycore_am64x/Kconfig
@@ -17,6 +17,8 @@
config SYS_CONFIG_NAME
default "phycore_am64x"
+source "board/phytec/common/Kconfig"
+
endif
if TARGET_PHYCORE_AM64X_R5
@@ -30,4 +32,6 @@
config SYS_CONFIG_NAME
default "phycore_am64x"
+source "board/phytec/common/Kconfig"
+
endif
diff --git a/board/phytec/phycore_am64x/MAINTAINERS b/board/phytec/phycore_am64x/MAINTAINERS
index caa9bbc..f5294db 100644
--- a/board/phytec/phycore_am64x/MAINTAINERS
+++ b/board/phytec/phycore_am64x/MAINTAINERS
@@ -3,9 +3,7 @@
W: https://www.phytec.com/product/phycore-am64x
S: Maintained
F: arch/arm/dts/k3-am64-phycore-som-ddr4-2gb.dtsi
-F: arch/arm/dts/k3-am64-phycore-som.dtsi
F: arch/arm/dts/k3-am642-phyboard-electra-rdk-u-boot.dtsi
-F: arch/arm/dts/k3-am642-phyboard-electra-rdk.dts
F: arch/arm/dts/k3-am642-phycore-som-binman.dtsi
F: arch/arm/dts/k3-am642-r5-phycore-som-2gb.dts
F: board/phytec/phycore_am64x
diff --git a/board/phytec/phycore_imx8mm/phycore-imx8mm.c b/board/phytec/phycore_imx8mm/phycore-imx8mm.c
index ef64729..06cffbc 100644
--- a/board/phytec/phycore_imx8mm/phycore-imx8mm.c
+++ b/board/phytec/phycore_imx8mm/phycore-imx8mm.c
@@ -4,7 +4,6 @@
* Author: Teresa Remmet <t.remmet@phytec.de>
*/
-#include <common.h>
#include <asm/arch/sys_proto.h>
#include <asm/global_data.h>
#include <asm/io.h>
diff --git a/board/phytec/phycore_imx8mm/spl.c b/board/phytec/phycore_imx8mm/spl.c
index 690a51f..8d85859 100644
--- a/board/phytec/phycore_imx8mm/spl.c
+++ b/board/phytec/phycore_imx8mm/spl.c
@@ -4,7 +4,6 @@
* Author: Teresa Remmet <t.remmet@phytec.de>
*/
-#include <common.h>
#include <asm/arch/clock.h>
#include <asm/arch/ddr.h>
#include <asm/arch/imx8mm_pins.h>
diff --git a/board/phytec/phycore_imx8mp/phycore-imx8mp.c b/board/phytec/phycore_imx8mp/phycore-imx8mp.c
index dbdd6bb..3568359 100644
--- a/board/phytec/phycore_imx8mp/phycore-imx8mp.c
+++ b/board/phytec/phycore_imx8mp/phycore-imx8mp.c
@@ -4,7 +4,6 @@
* Author: Teresa Remmet <t.remmet@phytec.de>
*/
-#include <common.h>
#include <asm/arch/sys_proto.h>
#include <asm/global_data.h>
#include <asm/io.h>
diff --git a/board/phytec/phycore_imx8mp/spl.c b/board/phytec/phycore_imx8mp/spl.c
index df15802..352f803 100644
--- a/board/phytec/phycore_imx8mp/spl.c
+++ b/board/phytec/phycore_imx8mp/spl.c
@@ -4,7 +4,6 @@
* Author: Teresa Remmet <t.remmet@phytec.de>
*/
-#include <common.h>
#include <asm/arch/clock.h>
#include <asm/arch/ddr.h>
#include <asm/arch/imx8mp_pins.h>
diff --git a/board/phytec/phycore_imx93/spl.c b/board/phytec/phycore_imx93/spl.c
index 16303fc..5efa38a 100644
--- a/board/phytec/phycore_imx93/spl.c
+++ b/board/phytec/phycore_imx93/spl.c
@@ -122,12 +122,12 @@
preloader_console_init();
- ret = imx9_probe_mu(NULL, NULL);
+ ret = imx9_probe_mu();
if (ret) {
printf("Fail to init ELE API\n");
} else {
- printf("SOC: 0x%x\n", gd->arch.soc_rev);
- printf("LC: 0x%x\n", gd->arch.lifecycle);
+ debug("SOC: 0x%x\n", gd->arch.soc_rev);
+ debug("LC: 0x%x\n", gd->arch.lifecycle);
}
clock_init();
diff --git a/board/phytec/phycore_rk3288/MAINTAINERS b/board/phytec/phycore_rk3288/MAINTAINERS
index 60471d4..e3b0af9 100644
--- a/board/phytec/phycore_rk3288/MAINTAINERS
+++ b/board/phytec/phycore_rk3288/MAINTAINERS
@@ -1,9 +1,7 @@
phyCORE-RK3288
M: Wadim Egorov <w.egorov@phytec.de>
S: Maintained
-F: arch/arm/dts/rk3288-phycore-rdk.dts
F: arch/arm/dts/rk3288-phycore-rdk-u-boot.dtsi
-F: arch/arm/dts/rk3288-phycore-som.dtsi
F: board/phytec/phycore_rk3288
F: include/configs/phycore_rk3288.h
F: configs/phycore-rk3288_defconfig
diff --git a/board/phytec/phycore_rk3288/phycore-rk3288.c b/board/phytec/phycore_rk3288/phycore-rk3288.c
index 3f49f39..a970634 100644
--- a/board/phytec/phycore_rk3288/phycore-rk3288.c
+++ b/board/phytec/phycore_rk3288/phycore-rk3288.c
@@ -4,13 +4,11 @@
* Author: Wadim Egorov <w.egorov@phytec.de>
*/
-#include <eeprom.h>
#include <init.h>
#include <log.h>
#include <net.h>
#include <asm/global_data.h>
#include <asm/io.h>
-#include <common.h>
#include <dm.h>
#include <env.h>
#include <env_internal.h>
diff --git a/board/phytium/durian/durian.c b/board/phytium/durian/durian.c
index 0a4048d..01e210f 100644
--- a/board/phytium/durian/durian.c
+++ b/board/phytium/durian/durian.c
@@ -5,7 +5,6 @@
* liuhao <liuhao@phytium.com.cn>
*/
-#include <common.h>
#include <command.h>
#include <cpu_func.h>
#include <event.h>
diff --git a/board/phytium/pe2201/pe2201.c b/board/phytium/pe2201/pe2201.c
index 0e837b0..fbbf678 100644
--- a/board/phytium/pe2201/pe2201.c
+++ b/board/phytium/pe2201/pe2201.c
@@ -12,7 +12,6 @@
#include <asm/io.h>
#include <linux/arm-smccc.h>
#include <scsi.h>
-#include <asm/u-boot.h>
#include "cpu.h"
DECLARE_GLOBAL_DATA_PTR;
diff --git a/board/phytium/pomelo/pomelo.c b/board/phytium/pomelo/pomelo.c
index 960e491..0ea335e 100644
--- a/board/phytium/pomelo/pomelo.c
+++ b/board/phytium/pomelo/pomelo.c
@@ -14,7 +14,6 @@
#include <linux/arm-smccc.h>
#include <scsi.h>
#include <init.h>
-#include <asm/u-boot.h>
#include "cpu.h"
DECLARE_GLOBAL_DATA_PTR;
diff --git a/board/pine64/quartzpro64-rk3588/Makefile b/board/pine64/quartzpro64-rk3588/Makefile
deleted file mode 100644
index 47819d9..0000000
--- a/board/pine64/quartzpro64-rk3588/Makefile
+++ /dev/null
@@ -1,3 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-
-obj-y += quartzpro64-rk3588.o
diff --git a/board/pine64/quartzpro64-rk3588/quartzpro64-rk3588.c b/board/pine64/quartzpro64-rk3588/quartzpro64-rk3588.c
deleted file mode 100644
index bda804a..0000000
--- a/board/pine64/quartzpro64-rk3588/quartzpro64-rk3588.c
+++ /dev/null
@@ -1,39 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright 2023 Google, Inc
- */
-
-#include <fdtdec.h>
-#include <fdt_support.h>
-
-#ifdef CONFIG_OF_BOARD_SETUP
-int quartzpro64_add_reserved_memory_fdt_nodes(void *new_blob)
-{
- struct fdt_memory gap1 = {
- .start = 0x3fc000000,
- .end = 0x3fc4fffff,
- };
- struct fdt_memory gap2 = {
- .start = 0x3fff00000,
- .end = 0x3ffffffff,
- };
- unsigned long flags = FDTDEC_RESERVED_MEMORY_NO_MAP;
- unsigned int ret;
-
- /*
- * Inject the reserved-memory nodes into the DTS
- */
- ret = fdtdec_add_reserved_memory(new_blob, "gap1", &gap1, NULL, 0,
- NULL, flags);
- if (ret)
- return ret;
-
- return fdtdec_add_reserved_memory(new_blob, "gap2", &gap2, NULL, 0,
- NULL, flags);
-}
-
-int ft_board_setup(void *blob, struct bd_info *bd)
-{
- return quartzpro64_add_reserved_memory_fdt_nodes(blob);
-}
-#endif
diff --git a/board/polyhex/imx8mp_debix_model_a/imx8mp_debix_model_a.c b/board/polyhex/imx8mp_debix_model_a/imx8mp_debix_model_a.c
index 14b94c9..112770b 100644
--- a/board/polyhex/imx8mp_debix_model_a/imx8mp_debix_model_a.c
+++ b/board/polyhex/imx8mp_debix_model_a/imx8mp_debix_model_a.c
@@ -11,7 +11,6 @@
#include <asm/global_data.h>
#include <asm/mach-imx/gpio.h>
#include <asm/mach-imx/iomux-v3.h>
-#include <common.h>
#include <env.h>
#include <errno.h>
#include <init.h>
diff --git a/board/polyhex/imx8mp_debix_model_a/spl.c b/board/polyhex/imx8mp_debix_model_a/spl.c
index eb904e1..6cbd181 100644
--- a/board/polyhex/imx8mp_debix_model_a/spl.c
+++ b/board/polyhex/imx8mp_debix_model_a/spl.c
@@ -11,7 +11,6 @@
#include <asm/global_data.h>
#include <asm/mach-imx/boot_mode.h>
#include <asm/sections.h>
-#include <common.h>
#include <dm/device.h>
#include <dm/uclass.h>
#include <hang.h>
diff --git a/board/purism/librem5/librem5.c b/board/purism/librem5/librem5.c
index d0249e7..a3c4215 100644
--- a/board/purism/librem5/librem5.c
+++ b/board/purism/librem5/librem5.c
@@ -4,7 +4,6 @@
* Copyright 2021 Purism
*/
-#include <common.h>
#include <malloc.h>
#include <errno.h>
#include <asm/io.h>
diff --git a/board/purism/librem5/lpddr4_timing.c b/board/purism/librem5/lpddr4_timing.c
index 46bc7f8..e9559e3 100644
--- a/board/purism/librem5/lpddr4_timing.c
+++ b/board/purism/librem5/lpddr4_timing.c
@@ -4,7 +4,6 @@
*/
#include <linux/kernel.h>
-#include <common.h>
#include <asm/arch/ddr.h>
#include <asm/arch/lpddr4_define.h>
diff --git a/board/purism/librem5/lpddr4_timing_b0.c b/board/purism/librem5/lpddr4_timing_b0.c
index ec68eda..5d8f280 100644
--- a/board/purism/librem5/lpddr4_timing_b0.c
+++ b/board/purism/librem5/lpddr4_timing_b0.c
@@ -4,7 +4,6 @@
*/
#include <linux/kernel.h>
-#include <common.h>
#include <asm/arch/ddr.h>
#include <asm/arch/lpddr4_define.h>
diff --git a/board/purism/librem5/spl.c b/board/purism/librem5/spl.c
index 9aadc55..ed57554 100644
--- a/board/purism/librem5/spl.c
+++ b/board/purism/librem5/spl.c
@@ -4,7 +4,7 @@
* Copyright 2021 Purism
*/
-#include <common.h>
+#include <config.h>
#include <asm/io.h>
#include <errno.h>
#include <asm/io.h>
diff --git a/board/qca/ap121/ap121.c b/board/qca/ap121/ap121.c
index 60a2e19..6bb1260 100644
--- a/board/qca/ap121/ap121.c
+++ b/board/qca/ap121/ap121.c
@@ -3,7 +3,6 @@
* Copyright (C) 2015-2016 Wills Wang <wills.wang@live.com>
*/
-#include <common.h>
#include <init.h>
#include <asm/io.h>
#include <asm/addrspace.h>
diff --git a/board/qca/ap143/ap143.c b/board/qca/ap143/ap143.c
index ac65054..b88de9c 100644
--- a/board/qca/ap143/ap143.c
+++ b/board/qca/ap143/ap143.c
@@ -3,7 +3,6 @@
* Copyright (C) 2015-2016 Wills Wang <wills.wang@live.com>
*/
-#include <common.h>
#include <init.h>
#include <asm/io.h>
#include <asm/addrspace.h>
diff --git a/board/qca/ap152/ap152.c b/board/qca/ap152/ap152.c
index 82458c3..5358728 100644
--- a/board/qca/ap152/ap152.c
+++ b/board/qca/ap152/ap152.c
@@ -3,7 +3,6 @@
* Copyright (C) 2018 Rosy Song <rosysong@rosinson.com>
*/
-#include <common.h>
#include <init.h>
#include <asm/io.h>
#include <asm/addrspace.h>
diff --git a/board/qualcomm/dragonboard410c/dragonboard410c.c b/board/qualcomm/dragonboard410c/dragonboard410c.c
index fbbfc0e..bd2e213 100644
--- a/board/qualcomm/dragonboard410c/dragonboard410c.c
+++ b/board/qualcomm/dragonboard410c/dragonboard410c.c
@@ -6,7 +6,6 @@
*/
#include <button.h>
-#include <common.h>
#include <cpu_func.h>
#include <dm.h>
#include <dm/pinctrl.h>
diff --git a/board/qualcomm/dragonboard820c/dragonboard820c.c b/board/qualcomm/dragonboard820c/dragonboard820c.c
index ac7de71..d3333a5 100644
--- a/board/qualcomm/dragonboard820c/dragonboard820c.c
+++ b/board/qualcomm/dragonboard820c/dragonboard820c.c
@@ -13,7 +13,6 @@
#include <asm/global_data.h>
#include <linux/arm-smccc.h>
#include <linux/psci.h>
-#include <common.h>
#include <dm.h>
#include <asm/io.h>
#include <linux/bitops.h>
diff --git a/board/radxa/rock2/MAINTAINERS b/board/radxa/rock2/MAINTAINERS
index 5328fd7..af974c9 100644
--- a/board/radxa/rock2/MAINTAINERS
+++ b/board/radxa/rock2/MAINTAINERS
@@ -1,9 +1,7 @@
FIREFLY
M: Simon Glass <sjg@chromium.org>
S: Maintained
-F: arch/arm/dts/rk3288-rock2-som.dtsi
-F: arch/arm/dts/rk3288-rock2-square.dts
-F: arch/arm/dts/rk3288-rock2-square-u-boot.dtsi
+F: arch/arm/dts/rk3288-rock2*
F: board/radxa/rock2
F: include/configs/rock2.h
F: configs/rock2_defconfig
diff --git a/board/radxa/rock5a-rk3588s/Makefile b/board/radxa/rock5a-rk3588s/Makefile
deleted file mode 100644
index 48dd512..0000000
--- a/board/radxa/rock5a-rk3588s/Makefile
+++ /dev/null
@@ -1,6 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-#
-# Copyright (c) 2023 Collabora Ltd.
-#
-
-obj-y += rock5a-rk3588s.o
diff --git a/board/radxa/rock5a-rk3588s/rock5a-rk3588s.c b/board/radxa/rock5a-rk3588s/rock5a-rk3588s.c
deleted file mode 100644
index 2d7a8c0..0000000
--- a/board/radxa/rock5a-rk3588s/rock5a-rk3588s.c
+++ /dev/null
@@ -1,39 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (c) 2023 Collabora Ltd.
- */
-
-#include <fdtdec.h>
-#include <fdt_support.h>
-
-#ifdef CONFIG_OF_BOARD_SETUP
-int rock5a_add_reserved_memory_fdt_nodes(void *new_blob)
-{
- struct fdt_memory gap1 = {
- .start = 0x3fc000000,
- .end = 0x3fc4fffff,
- };
- struct fdt_memory gap2 = {
- .start = 0x3fff00000,
- .end = 0x3ffffffff,
- };
- unsigned long flags = FDTDEC_RESERVED_MEMORY_NO_MAP;
- unsigned int ret;
-
- /*
- * Inject the reserved-memory nodes into the DTS
- */
- ret = fdtdec_add_reserved_memory(new_blob, "gap1", &gap1, NULL, 0,
- NULL, flags);
- if (ret)
- return ret;
-
- return fdtdec_add_reserved_memory(new_blob, "gap2", &gap2, NULL, 0,
- NULL, flags);
-}
-
-int ft_board_setup(void *blob, struct bd_info *bd)
-{
- return rock5a_add_reserved_memory_fdt_nodes(blob);
-}
-#endif
diff --git a/board/radxa/rock5b-rk3588/Makefile b/board/radxa/rock5b-rk3588/Makefile
deleted file mode 100644
index 95d8135..0000000
--- a/board/radxa/rock5b-rk3588/Makefile
+++ /dev/null
@@ -1,6 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-#
-# Copyright (c) 2022 Collabora Ltd.
-#
-
-obj-y += rock5b-rk3588.o
diff --git a/board/radxa/rock5b-rk3588/rock5b-rk3588.c b/board/radxa/rock5b-rk3588/rock5b-rk3588.c
deleted file mode 100644
index 5c3b52b9..0000000
--- a/board/radxa/rock5b-rk3588/rock5b-rk3588.c
+++ /dev/null
@@ -1,39 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (c) 2023 Collabora Ltd.
- */
-
-#include <fdtdec.h>
-#include <fdt_support.h>
-
-#ifdef CONFIG_OF_BOARD_SETUP
-int rock5b_add_reserved_memory_fdt_nodes(void *new_blob)
-{
- struct fdt_memory gap1 = {
- .start = 0x3fc000000,
- .end = 0x3fc4fffff,
- };
- struct fdt_memory gap2 = {
- .start = 0x3fff00000,
- .end = 0x3ffffffff,
- };
- unsigned long flags = FDTDEC_RESERVED_MEMORY_NO_MAP;
- unsigned int ret;
-
- /*
- * Inject the reserved-memory nodes into the DTS
- */
- ret = fdtdec_add_reserved_memory(new_blob, "gap1", &gap1, NULL, 0,
- NULL, flags);
- if (ret)
- return ret;
-
- return fdtdec_add_reserved_memory(new_blob, "gap2", &gap2, NULL, 0,
- NULL, flags);
-}
-
-int ft_board_setup(void *blob, struct bd_info *bd)
-{
- return rock5b_add_reserved_memory_fdt_nodes(blob);
-}
-#endif
diff --git a/board/raidsonic/ib62x0/ib62x0.c b/board/raidsonic/ib62x0/ib62x0.c
index f9bc076..8d1d549 100644
--- a/board/raidsonic/ib62x0/ib62x0.c
+++ b/board/raidsonic/ib62x0/ib62x0.c
@@ -6,7 +6,6 @@
* Simon Baatz <gmbnomis@gmail.com>
*/
-#include <common.h>
#include <init.h>
#include <miiphy.h>
#include <asm/global_data.h>
diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c
index 2851ebc..d996eb0 100644
--- a/board/raspberrypi/rpi/rpi.c
+++ b/board/raspberrypi/rpi/rpi.c
@@ -3,7 +3,6 @@
* (C) Copyright 2012-2016 Stephen Warren
*/
-#include <common.h>
#include <config.h>
#include <dm.h>
#include <env.h>
diff --git a/board/renesas/falcon/falcon.c b/board/renesas/falcon/falcon.c
index 27fccac..c88257d 100644
--- a/board/renesas/falcon/falcon.c
+++ b/board/renesas/falcon/falcon.c
@@ -14,7 +14,6 @@
#include <asm/processor.h>
#include <linux/errno.h>
#include <asm/system.h>
-#include <asm/u-boot.h>
DECLARE_GLOBAL_DATA_PTR;
diff --git a/board/renesas/grpeach/grpeach.c b/board/renesas/grpeach/grpeach.c
index c475c3f..88f65c3 100644
--- a/board/renesas/grpeach/grpeach.c
+++ b/board/renesas/grpeach/grpeach.c
@@ -10,7 +10,6 @@
#include <asm/global_data.h>
#include <asm/io.h>
#include <asm/arch/sys_proto.h>
-#include <asm/u-boot.h>
#define RZA1_WDT_BASE 0xfcfe0000
#define WTCSR 0x00
diff --git a/board/renesas/salvator-x/salvator-x.c b/board/renesas/salvator-x/salvator-x.c
index 8c47246..2c8860b 100644
--- a/board/renesas/salvator-x/salvator-x.c
+++ b/board/renesas/salvator-x/salvator-x.c
@@ -79,15 +79,15 @@
u32 cpu_type = renesas_get_cpu_type();
if ((cpu_type == RENESAS_CPU_TYPE_R8A7795) &&
- !strcmp(name, "r8a77950-salvator-x-u-boot"))
+ !strcmp(name, "r8a77951-salvator-x"))
return 0;
if ((cpu_type == RENESAS_CPU_TYPE_R8A7796) &&
- !strcmp(name, "r8a77960-salvator-x-u-boot"))
+ !strcmp(name, "r8a77960-salvator-x"))
return 0;
if ((cpu_type == RENESAS_CPU_TYPE_R8A77965) &&
- !strcmp(name, "r8a77965-salvator-x-u-boot"))
+ !strcmp(name, "r8a77965-salvator-x"))
return 0;
return -1;
diff --git a/board/renesas/ulcb/ulcb.c b/board/renesas/ulcb/ulcb.c
index 8f5de21..64f01b1 100644
--- a/board/renesas/ulcb/ulcb.c
+++ b/board/renesas/ulcb/ulcb.c
@@ -70,15 +70,15 @@
u32 cpu_type = renesas_get_cpu_type();
if ((cpu_type == RENESAS_CPU_TYPE_R8A7795) &&
- !strcmp(name, "r8a77950-ulcb-u-boot"))
+ !strcmp(name, "r8a77951-ulcb"))
return 0;
if ((cpu_type == RENESAS_CPU_TYPE_R8A7796) &&
- !strcmp(name, "r8a77960-ulcb-u-boot"))
+ !strcmp(name, "r8a77960-ulcb"))
return 0;
if ((cpu_type == RENESAS_CPU_TYPE_R8A77965) &&
- !strcmp(name, "r8a77965-ulcb-u-boot"))
+ !strcmp(name, "r8a77965-ulcb"))
return 0;
return -1;
diff --git a/board/rockchip/evb_rk3036/evb_rk3036.c b/board/rockchip/evb_rk3036/evb_rk3036.c
index 8c60646..a080503 100644
--- a/board/rockchip/evb_rk3036/evb_rk3036.c
+++ b/board/rockchip/evb_rk3036/evb_rk3036.c
@@ -3,7 +3,6 @@
* (C) Copyright 2015 Rockchip Electronics Co., Ltd
*/
-#include <common.h>
#include <dm.h>
#include <asm/io.h>
#include <asm/arch-rockchip/uart.h>
diff --git a/board/rockchip/evb_rk3308/MAINTAINERS b/board/rockchip/evb_rk3308/MAINTAINERS
index fe2c5f0..abffbb1 100644
--- a/board/rockchip/evb_rk3308/MAINTAINERS
+++ b/board/rockchip/evb_rk3308/MAINTAINERS
@@ -4,10 +4,11 @@
F: board/rockchip/evb_rk3308
F: include/configs/evb_rk3308.h
F: configs/evb-rk3308_defconfig
+F: arch/arm/dts/rk3308-evb*
ROCK-PI-S
M: Akash Gajjar <gajjar04akash@gmail.com>
+R: Jonas Karlman <jonas@kwiboo.se>
S: Maintained
F: configs/rock-pi-s-rk3308_defconfig
-F: arch/arm/dts/rk3308-rock-pi-s.dts
-F: arch/arm/dts/rk3308-rock-pi-s-u-boot.dtsi
+F: arch/arm/dts/rk3308-rock-pi-s*
diff --git a/board/rockchip/evb_rk3308/evb_rk3308.c b/board/rockchip/evb_rk3308/evb_rk3308.c
index e0c96fd..c895da9 100644
--- a/board/rockchip/evb_rk3308/evb_rk3308.c
+++ b/board/rockchip/evb_rk3308/evb_rk3308.c
@@ -3,7 +3,6 @@
* (C) Copyright 2018 Rockchip Electronics Co., Ltd
*/
-#include <common.h>
#include <adc.h>
#include <asm/global_data.h>
diff --git a/board/rockchip/evb_rk3588/Makefile b/board/rockchip/evb_rk3588/Makefile
deleted file mode 100644
index 240d2ec..0000000
--- a/board/rockchip/evb_rk3588/Makefile
+++ /dev/null
@@ -1,6 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-#
-# Copyright (c) 2023 Rockchip Electronics Co,. Ltd.
-#
-
-obj-y += evb-rk3588.o
diff --git a/board/rockchip/evb_rk3588/evb-rk3588.c b/board/rockchip/evb_rk3588/evb-rk3588.c
deleted file mode 100644
index caf94d8..0000000
--- a/board/rockchip/evb_rk3588/evb-rk3588.c
+++ /dev/null
@@ -1,39 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (c) 2023 Rockchip Electronics Co,. Ltd.
- */
-
-#include <fdtdec.h>
-#include <fdt_support.h>
-
-#ifdef CONFIG_OF_BOARD_SETUP
-static int rk3588_add_reserved_memory_fdt_nodes(void *new_blob)
-{
- struct fdt_memory gap1 = {
- .start = 0x3fc000000,
- .end = 0x3fc4fffff,
- };
- struct fdt_memory gap2 = {
- .start = 0x3fff00000,
- .end = 0x3ffffffff,
- };
- unsigned long flags = FDTDEC_RESERVED_MEMORY_NO_MAP;
- unsigned int ret;
-
- /*
- * Inject the reserved-memory nodes into the DTS
- */
- ret = fdtdec_add_reserved_memory(new_blob, "gap1", &gap1, NULL, 0,
- NULL, flags);
- if (ret)
- return ret;
-
- return fdtdec_add_reserved_memory(new_blob, "gap2", &gap2, NULL, 0,
- NULL, flags);
-}
-
-int ft_board_setup(void *blob, struct bd_info *bd)
-{
- return rk3588_add_reserved_memory_fdt_nodes(blob);
-}
-#endif
diff --git a/board/rockchip/evb_rv1108/evb_rv1108.c b/board/rockchip/evb_rv1108/evb_rv1108.c
index 0d7a486..48b9d8f 100644
--- a/board/rockchip/evb_rv1108/evb_rv1108.c
+++ b/board/rockchip/evb_rv1108/evb_rv1108.c
@@ -4,7 +4,6 @@
* Authors: Andy Yan <andy.yan@rock-chips.com>
*/
-#include <common.h>
#include <init.h>
#include <syscon.h>
#include <asm/global_data.h>
diff --git a/board/rockchip/kylin_rk3036/kylin_rk3036.c b/board/rockchip/kylin_rk3036/kylin_rk3036.c
index 0ca91cd..c452b13 100644
--- a/board/rockchip/kylin_rk3036/kylin_rk3036.c
+++ b/board/rockchip/kylin_rk3036/kylin_rk3036.c
@@ -3,7 +3,6 @@
* (C) Copyright 2015 Rockchip Electronics Co., Ltd
*/
-#include <common.h>
#include <dm.h>
#include <env.h>
#include <init.h>
diff --git a/board/rockchip/tinker_rk3288/tinker-rk3288.c b/board/rockchip/tinker_rk3288/tinker-rk3288.c
index eff3a00..e966e9f 100644
--- a/board/rockchip/tinker_rk3288/tinker-rk3288.c
+++ b/board/rockchip/tinker_rk3288/tinker-rk3288.c
@@ -3,9 +3,7 @@
* (C) Copyright 2016 Rockchip Electronics Co., Ltd
*/
-#include <common.h>
#include <dm.h>
-#include <eeprom.h>
#include <env.h>
#include <i2c_eeprom.h>
#include <init.h>
diff --git a/board/rockchip/toybrick_rk3588/Makefile b/board/rockchip/toybrick_rk3588/Makefile
deleted file mode 100644
index 75d4d94..0000000
--- a/board/rockchip/toybrick_rk3588/Makefile
+++ /dev/null
@@ -1,6 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-#
-# Copyright (c) 2024 Rockchip Electronics Co,. Ltd.
-#
-
-obj-y += toybrick-rk3588.o
diff --git a/board/rockchip/toybrick_rk3588/toybrick-rk3588.c b/board/rockchip/toybrick_rk3588/toybrick-rk3588.c
deleted file mode 100644
index e3217f7..0000000
--- a/board/rockchip/toybrick_rk3588/toybrick-rk3588.c
+++ /dev/null
@@ -1,39 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (c) 2024 Rockchip Electronics Co,. Ltd.
- */
-
-#include <fdtdec.h>
-#include <fdt_support.h>
-
-#ifdef CONFIG_OF_BOARD_SETUP
-static int rk3588_add_reserved_memory_fdt_nodes(void *new_blob)
-{
- struct fdt_memory gap1 = {
- .start = 0x3fc000000,
- .end = 0x3fc4fffff,
- };
- struct fdt_memory gap2 = {
- .start = 0x3fff00000,
- .end = 0x3ffffffff,
- };
- unsigned long flags = FDTDEC_RESERVED_MEMORY_NO_MAP;
- int ret;
-
- /*
- * Inject the reserved-memory nodes into the DTS
- */
- ret = fdtdec_add_reserved_memory(new_blob, "gap1", &gap1, NULL, 0,
- NULL, flags);
- if (ret)
- return ret;
-
- return fdtdec_add_reserved_memory(new_blob, "gap2", &gap2, NULL, 0,
- NULL, flags);
-}
-
-int ft_board_setup(void *blob, struct bd_info *bd)
-{
- return rk3588_add_reserved_memory_fdt_nodes(blob);
-}
-#endif
diff --git a/board/ronetix/imx7-cm/imx7-cm.c b/board/ronetix/imx7-cm/imx7-cm.c
index c23097f..a1f3f3c 100644
--- a/board/ronetix/imx7-cm/imx7-cm.c
+++ b/board/ronetix/imx7-cm/imx7-cm.c
@@ -15,7 +15,6 @@
#include <asm/mach-imx/iomux-v3.h>
#include <asm/mach-imx/mxc_i2c.h>
#include <asm/io.h>
-#include <common.h>
#include <i2c.h>
#include <miiphy.h>
#include <power/pmic.h>
diff --git a/board/ronetix/imx7-cm/spl.c b/board/ronetix/imx7-cm/spl.c
index b94cfd6..136de3c 100644
--- a/board/ronetix/imx7-cm/spl.c
+++ b/board/ronetix/imx7-cm/spl.c
@@ -5,7 +5,6 @@
* Author: Ilko Iliev <iliev@ronetix.at>
*/
-#include <common.h>
#include <cpu_func.h>
#include <init.h>
#include <asm/arch/clock.h>
diff --git a/board/ronetix/imx8mq-cm/imx8mq_cm.c b/board/ronetix/imx8mq-cm/imx8mq_cm.c
index 9805a3a..fbee2c3 100644
--- a/board/ronetix/imx8mq-cm/imx8mq_cm.c
+++ b/board/ronetix/imx8mq-cm/imx8mq_cm.c
@@ -3,7 +3,6 @@
* Copyright 2018 NXP
*/
-#include <common.h>
#include <miiphy.h>
#include <asm-generic/gpio.h>
#include <asm/arch/imx8mq_pins.h>
diff --git a/board/ronetix/imx8mq-cm/lpddr4_timing.c b/board/ronetix/imx8mq-cm/lpddr4_timing.c
index 685600e..a7ad937 100644
--- a/board/ronetix/imx8mq-cm/lpddr4_timing.c
+++ b/board/ronetix/imx8mq-cm/lpddr4_timing.c
@@ -4,7 +4,6 @@
*/
#include <linux/kernel.h>
-#include <common.h>
#include <asm/arch/ddr.h>
#include <asm/arch/lpddr4_define.h>
diff --git a/board/ronetix/imx8mq-cm/spl.c b/board/ronetix/imx8mq-cm/spl.c
index 1c675bc..ee0ad20 100644
--- a/board/ronetix/imx8mq-cm/spl.c
+++ b/board/ronetix/imx8mq-cm/spl.c
@@ -4,7 +4,7 @@
*
*/
-#include <common.h>
+#include <config.h>
#include <hang.h>
#include <init.h>
#include <asm/arch/ddr.h>
diff --git a/board/ronetix/pm9261/pm9261.c b/board/ronetix/pm9261/pm9261.c
index 07febe6..ee57874 100644
--- a/board/ronetix/pm9261/pm9261.c
+++ b/board/ronetix/pm9261/pm9261.c
@@ -7,7 +7,7 @@
* Copyright (C) 2009 Jean-Christopher PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
*/
-#include <common.h>
+#include <config.h>
#include <init.h>
#include <vsprintf.h>
#include <asm/global_data.h>
diff --git a/board/ronetix/pm9263/pm9263.c b/board/ronetix/pm9263/pm9263.c
index 76f62dd..1de1bd6 100644
--- a/board/ronetix/pm9263/pm9263.c
+++ b/board/ronetix/pm9263/pm9263.c
@@ -7,7 +7,7 @@
* Copyright (C) 2009 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
*/
-#include <common.h>
+#include <config.h>
#include <init.h>
#include <asm/global_data.h>
#include <linux/sizes.h>
diff --git a/board/ronetix/pm9g45/pm9g45.c b/board/ronetix/pm9g45/pm9g45.c
index aa5c80a..5d5edd9 100644
--- a/board/ronetix/pm9g45/pm9g45.c
+++ b/board/ronetix/pm9g45/pm9g45.c
@@ -10,7 +10,7 @@
* Lead Tech Design <www.leadtechdesign.com>
*/
-#include <common.h>
+#include <config.h>
#include <init.h>
#include <asm/global_data.h>
#include <linux/sizes.h>
diff --git a/board/samsung/arndale/arndale.c b/board/samsung/arndale/arndale.c
index 3ebf600..e70b4a8 100644
--- a/board/samsung/arndale/arndale.c
+++ b/board/samsung/arndale/arndale.c
@@ -3,7 +3,7 @@
* Copyright (C) 2013 Samsung Electronics
*/
-#include <common.h>
+#include <config.h>
#include <cpu_func.h>
#include <init.h>
#include <log.h>
diff --git a/board/samsung/arndale/arndale_spl.c b/board/samsung/arndale/arndale_spl.c
index 6ad0273..c40ca7f 100644
--- a/board/samsung/arndale/arndale_spl.c
+++ b/board/samsung/arndale/arndale_spl.c
@@ -3,7 +3,6 @@
* Copyright (c) 2012 The Chromium OS Authors.
*/
-#include <common.h>
#include <asm/arch/spl.h>
#define SIGNATURE 0xdeadbeef
diff --git a/board/samsung/common/board.c b/board/samsung/common/board.c
index 5a71982..eed1c24 100644
--- a/board/samsung/common/board.c
+++ b/board/samsung/common/board.c
@@ -4,7 +4,7 @@
* Rajeshwari Shinde <rajeshwari.s@samsung.com>
*/
-#include <common.h>
+#include <config.h>
#include <cros_ec.h>
#include <env.h>
#include <errno.h>
diff --git a/board/samsung/common/exynos5-dt-types.c b/board/samsung/common/exynos5-dt-types.c
index 9294d36..8328bf4 100644
--- a/board/samsung/common/exynos5-dt-types.c
+++ b/board/samsung/common/exynos5-dt-types.c
@@ -4,7 +4,7 @@
* Przemyslaw Marczak <p.marczak@samsung.com>
*/
-#include <common.h>
+#include <config.h>
#include <adc.h>
#include <dm.h>
#include <errno.h>
diff --git a/board/samsung/common/exynos5-dt.c b/board/samsung/common/exynos5-dt.c
index b3e87c9..56862bc 100644
--- a/board/samsung/common/exynos5-dt.c
+++ b/board/samsung/common/exynos5-dt.c
@@ -3,7 +3,7 @@
* Copyright (C) 2012 Samsung Electronics
*/
-#include <common.h>
+#include <config.h>
#include <dm.h>
#include <dwc3-uboot.h>
#include <env.h>
diff --git a/board/samsung/common/gadget.c b/board/samsung/common/gadget.c
index 9487f9e..c1b4342 100644
--- a/board/samsung/common/gadget.c
+++ b/board/samsung/common/gadget.c
@@ -4,7 +4,7 @@
* Lukasz Majewski <l.majewski@samsung.com>
*/
-#include <common.h>
+#include <linux/string.h>
#include <linux/usb/ch9.h>
#define EXYNOS_G_DNL_THOR_VENDOR_NUM 0x04E8
diff --git a/board/samsung/common/misc.c b/board/samsung/common/misc.c
index cc114aa..c134a9d 100644
--- a/board/samsung/common/misc.c
+++ b/board/samsung/common/misc.c
@@ -4,7 +4,7 @@
* Przemyslaw Marczak <p.marczak@samsung.com>
*/
-#include <common.h>
+#include <config.h>
#include <command.h>
#include <env.h>
#include <libtizen.h>
diff --git a/board/samsung/common/sromc.c b/board/samsung/common/sromc.c
index 76e37df..689ac8f 100644
--- a/board/samsung/common/sromc.c
+++ b/board/samsung/common/sromc.c
@@ -5,7 +5,6 @@
#define LOG_CATEGORY UCLASS_ETH
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <asm/arch/pinmux.h>
diff --git a/board/samsung/goni/goni.c b/board/samsung/goni/goni.c
index c8f5a15..a1047f3 100644
--- a/board/samsung/goni/goni.c
+++ b/board/samsung/goni/goni.c
@@ -5,7 +5,6 @@
* Kyungmin Park <kyungmin.park@samsung.com>
*/
-#include <common.h>
#include <init.h>
#include <log.h>
#include <asm/global_data.h>
diff --git a/board/samsung/goni/onenand.c b/board/samsung/goni/onenand.c
index c67c107..6c7a036 100644
--- a/board/samsung/goni/onenand.c
+++ b/board/samsung/goni/onenand.c
@@ -4,7 +4,7 @@
* Kyungmin Park <kyungmin.park@samsung.com>
*/
-#include <common.h>
+#include <config.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/onenand.h>
#include <linux/mtd/samsung_onenand.h>
diff --git a/board/samsung/odroid/odroid.c b/board/samsung/odroid/odroid.c
index 99e5613..84d6d91 100644
--- a/board/samsung/odroid/odroid.c
+++ b/board/samsung/odroid/odroid.c
@@ -4,7 +4,7 @@
* Przemyslaw Marczak <p.marczak@samsung.com>
*/
-#include <common.h>
+#include <config.h>
#include <log.h>
#include <asm/arch/pinmux.h>
#include <asm/arch/power.h>
diff --git a/board/samsung/origen/origen.c b/board/samsung/origen/origen.c
index ddf6a2b..c474a7e 100644
--- a/board/samsung/origen/origen.c
+++ b/board/samsung/origen/origen.c
@@ -3,7 +3,6 @@
* Copyright (C) 2011 Samsung Electronics
*/
-#include <common.h>
#include <asm/io.h>
#include <asm/gpio.h>
#include <asm/arch/cpu.h>
diff --git a/board/samsung/smdk5250/smdk5250_spl.c b/board/samsung/smdk5250/smdk5250_spl.c
index b0ef34d..1c78cb6 100644
--- a/board/samsung/smdk5250/smdk5250_spl.c
+++ b/board/samsung/smdk5250/smdk5250_spl.c
@@ -3,7 +3,6 @@
* Copyright (c) 2012 The Chromium OS Authors.
*/
-#include <common.h>
#include <asm/arch/cpu.h>
#include <asm/arch/spl.h>
#include <asm/arch/clk.h>
diff --git a/board/samsung/smdk5420/smdk5420_spl.c b/board/samsung/smdk5420/smdk5420_spl.c
index 84126f5..ccf8b25 100644
--- a/board/samsung/smdk5420/smdk5420_spl.c
+++ b/board/samsung/smdk5420/smdk5420_spl.c
@@ -3,7 +3,6 @@
* Copyright (C) 2013 The Chromium OS Authors.
*/
-#include <common.h>
#include <asm/arch/cpu.h>
#include <asm/arch/spl.h>
#include <asm/arch/clk.h>
diff --git a/board/samsung/smdkc100/onenand.c b/board/samsung/smdkc100/onenand.c
index 04dc04a..86ec550 100644
--- a/board/samsung/smdkc100/onenand.c
+++ b/board/samsung/smdkc100/onenand.c
@@ -4,7 +4,6 @@
* Kyungmin Park <kyungmin.park@samsung.com>
*/
-#include <common.h>
#include <linux/compat.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/onenand.h>
diff --git a/board/samsung/smdkc100/smdkc100.c b/board/samsung/smdkc100/smdkc100.c
index 4f46911..7d0b0fc 100644
--- a/board/samsung/smdkc100/smdkc100.c
+++ b/board/samsung/smdkc100/smdkc100.c
@@ -5,7 +5,7 @@
* Kyungmin Park <kyungmin.park@samsung.com>
*/
-#include <common.h>
+#include <config.h>
#include <init.h>
#include <net.h>
#include <asm/global_data.h>
diff --git a/board/samsung/smdkv310/smdkv310.c b/board/samsung/smdkv310/smdkv310.c
index 47483a2..5a4874b 100644
--- a/board/samsung/smdkv310/smdkv310.c
+++ b/board/samsung/smdkv310/smdkv310.c
@@ -3,7 +3,7 @@
* Copyright (C) 2011 Samsung Electronics
*/
-#include <common.h>
+#include <config.h>
#include <init.h>
#include <log.h>
#include <net.h>
diff --git a/board/samsung/trats/trats.c b/board/samsung/trats/trats.c
index 6a3e5b2..6efc6f3 100644
--- a/board/samsung/trats/trats.c
+++ b/board/samsung/trats/trats.c
@@ -6,7 +6,6 @@
* Donghwa Lee <dh09.lee@samsung.com>
*/
-#include <common.h>
#include <env.h>
#include <log.h>
#include <asm/io.h>
diff --git a/board/samsung/trats2/trats2.c b/board/samsung/trats2/trats2.c
index 81ccc12..612575a 100644
--- a/board/samsung/trats2/trats2.c
+++ b/board/samsung/trats2/trats2.c
@@ -5,7 +5,6 @@
* Piotr Wilczek <p.wilczek@samsung.com>
*/
-#include <common.h>
#include <log.h>
#include <asm/gpio.h>
#include <asm/arch/pinmux.h>
diff --git a/board/samsung/universal_c210/onenand.c b/board/samsung/universal_c210/onenand.c
index 265a2cd..ba56e86 100644
--- a/board/samsung/universal_c210/onenand.c
+++ b/board/samsung/universal_c210/onenand.c
@@ -4,7 +4,7 @@
* Kyungmin Park <kyungmin.park@samsung.com>
*/
-#include <common.h>
+#include <config.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/onenand.h>
#include <linux/mtd/samsung_onenand.h>
diff --git a/board/samsung/universal_c210/universal.c b/board/samsung/universal_c210/universal.c
index 2d61dff..6bed724 100644
--- a/board/samsung/universal_c210/universal.c
+++ b/board/samsung/universal_c210/universal.c
@@ -5,7 +5,6 @@
* Kyungmin Park <kyungmin.park@samsung.com>
*/
-#include <common.h>
#include <env.h>
#include <log.h>
#include <spi.h>
diff --git a/board/schneider/hmibsc/MAINTAINERS b/board/schneider/hmibsc/MAINTAINERS
new file mode 100644
index 0000000..0f31bbd
--- /dev/null
+++ b/board/schneider/hmibsc/MAINTAINERS
@@ -0,0 +1,6 @@
+HMIBSC BOARD
+M: Sumit Garg <sumit.garg@linaro.org>
+S: Maintained
+F: board/schneider/hmibsc/
+F: include/configs/hmibsc.h
+F: configs/hmibsc_defconfig
diff --git a/board/schneider/hmibsc/hmibsc.env b/board/schneider/hmibsc/hmibsc.env
new file mode 100644
index 0000000..da3d892
--- /dev/null
+++ b/board/schneider/hmibsc/hmibsc.env
@@ -0,0 +1,40 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+
+loadaddr=0x90000000
+bootcmd=
+ echo "Booting RAUC A/B system";
+ setenv devtype mmc; setenv devnum 0;
+ test -n "${BOOT_ORDER}" || setenv BOOT_ORDER "A B";
+ test -n "${BOOT_A_LEFT}" || setenv BOOT_A_LEFT 3;
+ test -n "${BOOT_B_LEFT}" || setenv BOOT_B_LEFT 3;
+ setenv raucslot;
+ for BOOT_SLOT in "${BOOT_ORDER}"; do
+ if test "x${raucslot}" != "x"; then
+ echo "skip remaining slots...";
+ elif test "x${BOOT_SLOT}" = "xA"; then
+ if test ${BOOT_A_LEFT} -gt 0; then
+ setexpr BOOT_A_LEFT ${BOOT_A_LEFT} - 1;
+ echo "Found valid RAUC slot A";
+ setenv raucslot "rauc.slot=A";
+ setenv raucpart A; setenv distro_bootpart 6;
+ fi;
+ elif test "x${BOOT_SLOT}" = "xB"; then
+ if test ${BOOT_B_LEFT} -gt 0; then
+ setexpr BOOT_B_LEFT ${BOOT_B_LEFT} - 1;
+ echo "Found valid RAUC slot B";
+ setenv raucslot "rauc.slot=B";
+ setenv raucpart B; setenv distro_bootpart 7;
+ fi;
+ fi;
+ done;
+ if test -n "${raucslot}"; then
+ setenv bootargs console=ttyMSM1 root=PARTLABEL=rootfs_${raucpart} rw rootwait ${raucslot};
+ saveenv;
+ else
+ echo "No valid RAUC slot found. Resetting tries to 3";
+ setenv BOOT_A_LEFT 3;
+ setenv BOOT_B_LEFT 3;
+ saveenv;
+ reset;
+ fi;
+ load ${devtype} ${devnum}:${distro_bootpart} ${loadaddr} /boot/fitImage && bootm;
diff --git a/board/schneider/rzn1-snarc/rzn1.c b/board/schneider/rzn1-snarc/rzn1.c
index 09241c3..e1d5b5b 100644
--- a/board/schneider/rzn1-snarc/rzn1.c
+++ b/board/schneider/rzn1-snarc/rzn1.c
@@ -1,6 +1,5 @@
// SPDX-License-Identifier: GPL-2.0+
-#include <common.h>
#include <dm.h>
#include <ram.h>
#include <asm/global_data.h>
diff --git a/board/seeed/linkit-smart-7688/board.c b/board/seeed/linkit-smart-7688/board.c
index bf7c69e..91fa08f 100644
--- a/board/seeed/linkit-smart-7688/board.c
+++ b/board/seeed/linkit-smart-7688/board.c
@@ -3,7 +3,6 @@
* Copyright (C) 2018 Stefan Roese <sr@denx.de>
*/
-#include <common.h>
#include <init.h>
#include <asm/io.h>
#include <linux/bitops.h>
diff --git a/board/seeed/npi_imx6ull/spl.c b/board/seeed/npi_imx6ull/spl.c
index b29da2c..2312d8f 100644
--- a/board/seeed/npi_imx6ull/spl.c
+++ b/board/seeed/npi_imx6ull/spl.c
@@ -4,7 +4,7 @@
* Author: Navin Sankar Velliangiri <navin@linumiz.com>
*/
-#include <common.h>
+#include <config.h>
#include <init.h>
#include <spl.h>
#include <asm/arch/clock.h>
diff --git a/board/siemens/capricorn/board.c b/board/siemens/capricorn/board.c
index 0d66a75..53dac8b 100644
--- a/board/siemens/capricorn/board.c
+++ b/board/siemens/capricorn/board.c
@@ -5,7 +5,6 @@
* Copyright 2019 Siemens AG
*
*/
-#include <common.h>
#include <command.h>
#include <dm.h>
#include <env.h>
@@ -156,14 +155,14 @@
* 0: internal clock
* 1: external clock ---> your choice for RMII
*
- * CLKDIV_SEL: it controls a div by 2 on the internal clock path à
- * it should be don’t care when using external clock
+ * CLKDIV_SEL: it controls a div by 2 on the internal clock path a
+ * it should be don't care when using external clock
* 0: non-divided clock
* 1: clock divided by 2
* 50_DISABLE or 125_DISABLE:
- * it’s used to disable the clock tree going outside the chip
+ * it's used to disable the clock tree going outside the chip
* when reference clock is generated internally.
- * It should be don’t care when reference clock is provided
+ * It should be don't care when reference clock is provided
* externally.
* 0: clock is enabled
* 1: clock is disabled
diff --git a/board/siemens/capricorn/spl.c b/board/siemens/capricorn/spl.c
index e160c61..696b5eb 100644
--- a/board/siemens/capricorn/spl.c
+++ b/board/siemens/capricorn/spl.c
@@ -5,7 +5,6 @@
* Copyright 2019 Siemens AG
*
*/
-#include <common.h>
#include <init.h>
#include <spl.h>
#include <dm.h>
diff --git a/board/siemens/corvus/board.c b/board/siemens/corvus/board.c
index 569b86d..7d73d1f 100644
--- a/board/siemens/corvus/board.c
+++ b/board/siemens/corvus/board.c
@@ -10,7 +10,7 @@
* Lead Tech Design <www.leadtechdesign.com>
*/
-#include <common.h>
+#include <config.h>
#include <dm.h>
#include <init.h>
#include <log.h>
diff --git a/board/siemens/iot2050/board.c b/board/siemens/iot2050/board.c
index 0b0686e..ed292c3 100644
--- a/board/siemens/iot2050/board.c
+++ b/board/siemens/iot2050/board.c
@@ -8,7 +8,7 @@
* Jan Kiszka <jan.kiszka@siemens.com>
*/
-#include <common.h>
+#include <config.h>
#include <bootstage.h>
#include <dm.h>
#include <fdt_support.h>
diff --git a/board/siemens/smartweb/smartweb.c b/board/siemens/smartweb/smartweb.c
index 15044c7..946fbc3 100644
--- a/board/siemens/smartweb/smartweb.c
+++ b/board/siemens/smartweb/smartweb.c
@@ -15,7 +15,7 @@
* DENX Software Engineering GmbH
*/
-#include <common.h>
+#include <config.h>
#include <dm.h>
#include <init.h>
#include <net.h>
diff --git a/board/siemens/taurus/taurus.c b/board/siemens/taurus/taurus.c
index ad44a7c..bda12a9 100644
--- a/board/siemens/taurus/taurus.c
+++ b/board/siemens/taurus/taurus.c
@@ -12,7 +12,7 @@
*/
#include <command.h>
-#include <common.h>
+#include <config.h>
#include <dm.h>
#include <env.h>
#include <init.h>
diff --git a/board/sifive/unleashed/spl.c b/board/sifive/unleashed/spl.c
index fe27316..9df9c68 100644
--- a/board/sifive/unleashed/spl.c
+++ b/board/sifive/unleashed/spl.c
@@ -27,9 +27,9 @@
{
int ret;
- ret = spl_soc_init();
+ ret = spl_dram_init();
if (ret) {
- debug("FU540 SPL init failed: %d\n", ret);
+ debug("FU540 DRAM init failed: %d\n", ret);
return ret;
}
diff --git a/board/sifive/unmatched/spl.c b/board/sifive/unmatched/spl.c
index e69bed9..6fc1d80 100644
--- a/board/sifive/unmatched/spl.c
+++ b/board/sifive/unmatched/spl.c
@@ -134,9 +134,9 @@
{
int ret;
- ret = spl_soc_init();
+ ret = spl_dram_init();
if (ret) {
- debug("HiFive Unmatched FU740 SPL init failed: %d\n", ret);
+ debug("HiFive Unmatched FU740 DRAM init failed: %d\n", ret);
goto end;
}
diff --git a/board/silinux/ek874/ek874.c b/board/silinux/ek874/ek874.c
index 6dc804a..a3fe6f9 100644
--- a/board/silinux/ek874/ek874.c
+++ b/board/silinux/ek874/ek874.c
@@ -6,8 +6,8 @@
* Copyright (C) 2021 Renesas Electronics Corporation
*/
-#include <common.h>
#include <asm/global_data.h>
+#include <asm/u-boot.h>
#include <asm/io.h>
#define RST_BASE 0xE6160000
diff --git a/board/sipeed/maix/maix.c b/board/sipeed/maix/maix.c
index 06653b5..08077a1 100644
--- a/board/sipeed/maix/maix.c
+++ b/board/sipeed/maix/maix.c
@@ -3,7 +3,7 @@
* Copyright (C) 2019-20 Sean Anderson <seanga2@gmail.com>
*/
-#include <common.h>
+#include <config.h>
#include <clk.h>
#include <dm.h>
#include <fdt_support.h>
diff --git a/board/skyworth/hc2910-2aghd05/hc2910-2aghd05.c b/board/skyworth/hc2910-2aghd05/hc2910-2aghd05.c
index abad5ef..22be10d 100644
--- a/board/skyworth/hc2910-2aghd05/hc2910-2aghd05.c
+++ b/board/skyworth/hc2910-2aghd05/hc2910-2aghd05.c
@@ -3,7 +3,6 @@
* Board init file for Skyworth HC2910 2AGHD05
*/
-#include <common.h>
#include <fdtdec.h>
#include <init.h>
#include <asm/system.h>
diff --git a/board/socionext/developerbox/developerbox.c b/board/socionext/developerbox/developerbox.c
index 062e4a7..556a9ed 100644
--- a/board/socionext/developerbox/developerbox.c
+++ b/board/socionext/developerbox/developerbox.c
@@ -9,7 +9,7 @@
#include <asm/armv8/mmu.h>
#include <asm/global_data.h>
#include <asm/io.h>
-#include <common.h>
+#include <config.h>
#include <efi.h>
#include <efi_loader.h>
#include <env_internal.h>
diff --git a/board/socrates/ddr.c b/board/socrates/ddr.c
index 3a94f7b..bf4894e 100644
--- a/board/socrates/ddr.c
+++ b/board/socrates/ddr.c
@@ -3,7 +3,6 @@
* Copyright 2008 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <fsl_ddr_sdram.h>
#include <fsl_ddr_dimm_params.h>
diff --git a/board/socrates/law.c b/board/socrates/law.c
index e4427ec..446fdbc 100644
--- a/board/socrates/law.c
+++ b/board/socrates/law.c
@@ -9,7 +9,7 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
+#include <config.h>
#include <asm/fsl_law.h>
#include <asm/mmu.h>
diff --git a/board/socrates/nand.c b/board/socrates/nand.c
index b1e38c5..517a4a0 100644
--- a/board/socrates/nand.c
+++ b/board/socrates/nand.c
@@ -4,7 +4,7 @@
* Sergei Poselenov, Emcraft Systems, sposelenov@emcraft.com.
*/
-#include <common.h>
+#include <config.h>
#if defined(CFG_SYS_NAND_BASE)
#include <nand.h>
diff --git a/board/socrates/sdram.c b/board/socrates/sdram.c
index 61402a5..d0415d2 100644
--- a/board/socrates/sdram.c
+++ b/board/socrates/sdram.c
@@ -4,7 +4,7 @@
* Sergei Poselenov, Emcraft Systems, sposelenov@emcraft.com.
*/
-#include <common.h>
+#include <config.h>
#include <init.h>
#include <asm/processor.h>
#include <asm/immap_85xx.h>
diff --git a/board/socrates/socrates.c b/board/socrates/socrates.c
index 1d63c81..6e6e276 100644
--- a/board/socrates/socrates.c
+++ b/board/socrates/socrates.c
@@ -10,7 +10,7 @@
* (C) Copyright 2002 Scott McNutt <smcnutt@artesyncp.com>
*/
-#include <common.h>
+#include <config.h>
#include <clock_legacy.h>
#include <env.h>
#include <init.h>
diff --git a/board/socrates/tlb.c b/board/socrates/tlb.c
index 631f6c3..0cc6757 100644
--- a/board/socrates/tlb.c
+++ b/board/socrates/tlb.c
@@ -9,8 +9,9 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
+#include <config.h>
#include <asm/mmu.h>
+#include <asm/ppc.h>
struct fsl_e_tlb_entry tlb_table[] = {
/* TLB 0 - for temp stack in cache */
diff --git a/board/softing/vining_2000/vining_2000.c b/board/softing/vining_2000/vining_2000.c
index 4483bd7..a0dbf97 100644
--- a/board/softing/vining_2000/vining_2000.c
+++ b/board/softing/vining_2000/vining_2000.c
@@ -24,7 +24,7 @@
#include <linux/bitops.h>
#include <linux/delay.h>
#include <linux/sizes.h>
-#include <common.h>
+#include <config.h>
#include <fsl_esdhc_imx.h>
#include <mmc.h>
#include <i2c.h>
diff --git a/board/softing/vining_fpga/socfpga.c b/board/softing/vining_fpga/socfpga.c
index b3f9550..2483fbc 100644
--- a/board/softing/vining_fpga/socfpga.c
+++ b/board/softing/vining_fpga/socfpga.c
@@ -3,7 +3,7 @@
* Copyright (C) 2012 Altera Corporation <www.altera.com>
*/
-#include <common.h>
+#include <config.h>
#include <eeprom.h>
#include <env.h>
#include <init.h>
diff --git a/board/solidrun/clearfog/clearfog.c b/board/solidrun/clearfog/clearfog.c
index 6977db0..2dbd071 100644
--- a/board/solidrun/clearfog/clearfog.c
+++ b/board/solidrun/clearfog/clearfog.c
@@ -3,7 +3,7 @@
* Copyright (C) 2015 Stefan Roese <sr@denx.de>
*/
-#include <common.h>
+#include <config.h>
#include <env.h>
#include <i2c.h>
#include <init.h>
diff --git a/board/solidrun/common/tlv_data.c b/board/solidrun/common/tlv_data.c
index cf58248..b808660 100644
--- a/board/solidrun/common/tlv_data.c
+++ b/board/solidrun/common/tlv_data.c
@@ -3,9 +3,9 @@
* Copyright 2020 SolidRun
*/
-#include <common.h>
#include <compiler.h>
#include <tlv_eeprom.h>
+#include <linux/kernel.h>
#include "tlv_data.h"
#define SR_TLV_CODE_RAM_SIZE 0x81
diff --git a/board/solidrun/mx6cuboxi/mx6cuboxi.c b/board/solidrun/mx6cuboxi/mx6cuboxi.c
index 7dffb96..3406ba8 100644
--- a/board/solidrun/mx6cuboxi/mx6cuboxi.c
+++ b/board/solidrun/mx6cuboxi/mx6cuboxi.c
@@ -15,7 +15,7 @@
* Ported to SolidRun microSOM by Rabeeh Khoury <rabeeh@solid-run.com>
*/
-#include <common.h>
+#include <config.h>
#include <image.h>
#include <init.h>
#include <log.h>
@@ -378,37 +378,6 @@
return (mmc_get_op_cond(mmc, true) < 0) ? 0 : 1;
}
-/* Override the default implementation, DT model is not accurate */
-int checkboard(void)
-{
- request_detect_gpios();
-
- switch (board_type()) {
- case CUBOXI:
- puts("Board: MX6 Cubox-i");
- break;
- case HUMMINGBOARD:
- puts("Board: MX6 HummingBoard");
- break;
- case HUMMINGBOARD2:
- puts("Board: MX6 HummingBoard2");
- break;
- case UNKNOWN:
- default:
- puts("Board: Unknown\n");
- goto out;
- }
-
- if (is_rev_15_som())
- puts(" (som rev 1.5)\n");
- else
- puts("\n");
-
- free_detect_gpios();
-out:
- return 0;
-}
-
static int find_ethernet_phy(void)
{
struct mii_dev *bus = NULL;
@@ -502,12 +471,15 @@
switch (board_type()) {
case CUBOXI:
env_set("board_name", "CUBOXI");
+ puts("Board: MX6 Cubox-i");
break;
case HUMMINGBOARD:
env_set("board_name", "HUMMINGBOARD");
+ puts("Board: MX6 HummingBoard");
break;
case HUMMINGBOARD2:
env_set("board_name", "HUMMINGBOARD2");
+ puts("Board: MX6 HummingBoard2");
break;
case UNKNOWN:
default:
@@ -519,8 +491,12 @@
else
env_set("board_rev", "MX6DL");
- if (is_rev_15_som())
+ if (is_rev_15_som()) {
env_set("som_rev", "V15");
+ puts(" (som rev 1.5)\n");
+ } else {
+ puts("\n");
+ }
if (has_emmc())
env_set("has_emmc", "yes");
diff --git a/board/somlabs/visionsom-6ull/visionsom-6ull.c b/board/somlabs/visionsom-6ull/visionsom-6ull.c
index 38d14f6..0ecb5c3 100644
--- a/board/somlabs/visionsom-6ull/visionsom-6ull.c
+++ b/board/somlabs/visionsom-6ull/visionsom-6ull.c
@@ -17,7 +17,6 @@
#include <asm/mach-imx/iomux-v3.h>
#include <asm/mach-imx/mxc_i2c.h>
#include <asm/io.h>
-#include <common.h>
#include <env.h>
#include <fsl_esdhc_imx.h>
#include <i2c.h>
diff --git a/board/sophgo/milkv_duo/Kconfig b/board/sophgo/milkv_duo/Kconfig
index 2a458f2..040a748 100644
--- a/board/sophgo/milkv_duo/Kconfig
+++ b/board/sophgo/milkv_duo/Kconfig
@@ -7,7 +7,7 @@
default "sophgo"
config SYS_CPU
- default "generic"
+ default "cv1800b"
config SYS_CONFIG_NAME
default "milkv_duo"
@@ -23,6 +23,6 @@
config BOARD_SPECIFIC_OPTIONS
def_bool y
- select GENERIC_RISCV
+ select SOPHGO_CV1800B
endif
diff --git a/board/sophgo/milkv_duo/Makefile b/board/sophgo/milkv_duo/Makefile
index a087013..d0525eb 100644
--- a/board/sophgo/milkv_duo/Makefile
+++ b/board/sophgo/milkv_duo/Makefile
@@ -2,4 +2,5 @@
#
# Copyright (c) 2024, Kongyang Liu <seashell11234455@gmail.com>
-obj-y := board.o
+obj-y += board.o
+obj-$(CONFIG_NET) += ethernet.o
diff --git a/board/sophgo/milkv_duo/board.c b/board/sophgo/milkv_duo/board.c
index eaa47be..9adbb08 100644
--- a/board/sophgo/milkv_duo/board.c
+++ b/board/sophgo/milkv_duo/board.c
@@ -3,7 +3,17 @@
* Copyright (c) 2024, Kongyang Liu <seashell11234455@gmail.com>
*/
+#include <dm/lists.h>
+
+#include "ethernet.h"
+
int board_init(void)
{
+ if (IS_ENABLED(CONFIG_SYSRESET_CV1800B))
+ device_bind_driver(gd->dm_root, "cv1800b_sysreset", "sysreset", NULL);
+
+ if (IS_ENABLED(CONFIG_NET))
+ cv1800b_ephy_init();
+
return 0;
}
diff --git a/board/sophgo/milkv_duo/ethernet.c b/board/sophgo/milkv_duo/ethernet.c
new file mode 100644
index 0000000..e997ce1
--- /dev/null
+++ b/board/sophgo/milkv_duo/ethernet.c
@@ -0,0 +1,79 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2024, Kongyang Liu <seashell11234455@gmail.com>
+ */
+
+#include <linux/io.h>
+#include <linux/bitops.h>
+#include <linux/mii.h>
+
+#define REG_EPHY_TOP_WRAP (u32 *)0x03009800
+#define REG_EPHY_BASE (u32 *)0x03009000
+
+#define REG_EPHY_CTL REG_EPHY_TOP_WRAP
+#define REG_EPHY_APB_RW_SEL REG_EPHY_TOP_WRAP + 1
+
+/* Page 0 register */
+#define REG_PHY_ID1 REG_EPHY_BASE + MII_PHYSID1
+#define REG_PHY_ID2 REG_EPHY_BASE + MII_PHYSID2
+#define REG_PHY_PAGE_SEL REG_EPHY_BASE + 0x1f
+
+/* Page 5 register */
+#define REG_PD_EN_CTL REG_EPHY_BASE + 0x10
+
+/* REG_EPHY_CTL */
+#define REG_EPHY_SHUTDOWN BIT(0)
+#define REG_EPHY_ANA_RST_N BIT(1)
+#define REG_EPHY_DIG_RST_N BIT(2)
+#define REG_EPHY_MAIN_RST_N BIT(3)
+
+/* REG_PD_EN_CTL */
+#define REG_EN_ETH_TXRT BIT(0)
+#define REG_EN_ETH_CLK100M BIT(1)
+#define REG_EN_ETH_CLK125M BIT(2)
+#define REG_EN_ETH_PLL_LCKDET BIT(3)
+#define REG_EN_ETH_RXADC BIT(4)
+#define REG_EN_ETH_RXPGA BIT(5)
+#define REG_EN_ETH_RXRT BIT(6)
+#define REG_EN_ETH_TXCROSSOVER BIT(7)
+#define REG_PD_ETH_PLL BIT(8)
+#define REG_PD_ETH_TXDAC BIT(9)
+#define REG_PD_ETH_TXDACBST BIT(10)
+#define REG_PD_ETH_TXECHO BIT(11)
+#define REG_PD_ETH_TXDRV_NMOS BIT(12)
+#define REG_PD_ETH_TXLDO BIT(13)
+
+void cv1800b_ephy_init(void)
+{
+ u32 reg;
+ u32 phy_id = 1;
+
+ /* enable direct memory access for phy register */
+ writel(1, REG_EPHY_APB_RW_SEL);
+
+ reg = readl(REG_EPHY_CTL);
+ reg &= ~REG_EPHY_SHUTDOWN;
+ reg |= REG_EPHY_ANA_RST_N | REG_EPHY_DIG_RST_N | REG_EPHY_MAIN_RST_N;
+ writel(reg, REG_EPHY_CTL);
+
+ /* switch to page 5 */
+ writel(5 << 8, REG_PHY_PAGE_SEL);
+ reg = readl(REG_PD_EN_CTL);
+ reg &= ~(REG_PD_ETH_TXLDO | REG_PD_ETH_TXDRV_NMOS | REG_PD_ETH_TXDAC | REG_PD_ETH_PLL);
+ reg |= REG_EN_ETH_TXRT | REG_EN_ETH_CLK100M | REG_EN_ETH_CLK125M
+ | REG_EN_ETH_PLL_LCKDET | REG_EN_ETH_RXADC | REG_EN_ETH_RXPGA | REG_EN_ETH_RXRT;
+ writel(reg, REG_PD_EN_CTL);
+
+ /* switch to page 0 */
+ writel(0 << 8, REG_PHY_PAGE_SEL);
+ /*
+ * As the phy_id in the cv1800b PHY register is initialized to 0, it
+ * is necessary to manually initialize the phy_id to an arbitrary
+ * value so that it could corresponds to the generic PHY driver.
+ */
+ writel(phy_id >> 16, REG_PHY_ID1);
+ writel(phy_id & 0xffff, REG_PHY_ID2);
+
+ /* switch to MDIO control */
+ writel(0, REG_EPHY_APB_RW_SEL);
+}
diff --git a/board/sophgo/milkv_duo/ethernet.h b/board/sophgo/milkv_duo/ethernet.h
new file mode 100644
index 0000000..7b21f1b
--- /dev/null
+++ b/board/sophgo/milkv_duo/ethernet.h
@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (c) 2024, Kongyang Liu <seashell11234455@gmail.com>
+ */
+
+#ifndef __CV1800B_ETHERNET_H
+#define __CV1800B_ETHERNET_H
+
+void cv1800b_ephy_init(void);
+
+#endif
diff --git a/board/sr1500/socfpga.c b/board/sr1500/socfpga.c
index d9125a7..5603ef2 100644
--- a/board/sr1500/socfpga.c
+++ b/board/sr1500/socfpga.c
@@ -3,7 +3,6 @@
* Copyright (C) 2015 Stefan Roese <sr@denx.de>
*/
-#include <common.h>
#include <init.h>
#include <asm/arch/reset_manager.h>
#include <asm/gpio.h>
diff --git a/board/st/common/cmd_stboard.c b/board/st/common/cmd_stboard.c
index cb103e6..50da063 100644
--- a/board/st/common/cmd_stboard.c
+++ b/board/st/common/cmd_stboard.c
@@ -9,7 +9,7 @@
* - "Commercial Product Name" (CPN): type of product board (DKX, EVX)
* associated to the board ID "MBxxxx"
* - "Finished Good" or "Finish Good" (FG):
- * effective content of the product without chip STM32MP1xx (LCD, Wifi,…)
+ * effective content of the product without chip STM32MP1xx (LCD, Wifi,...)
* - BOM: cost variant for same FG (for example, several provider of the same
* component)
*
@@ -30,7 +30,6 @@
*/
#ifndef CONFIG_SPL_BUILD
-#include <common.h>
#include <command.h>
#include <console.h>
#include <misc.h>
diff --git a/board/st/common/stm32mp_dfu.c b/board/st/common/stm32mp_dfu.c
index 77edb86..1db8e45 100644
--- a/board/st/common/stm32mp_dfu.c
+++ b/board/st/common/stm32mp_dfu.c
@@ -3,7 +3,6 @@
* Copyright (C) 2020, STMicroelectronics - All Rights Reserved
*/
-#include <common.h>
#include <blk.h>
#include <dm.h>
#include <dfu.h>
diff --git a/board/st/common/stm32mp_dfu_virt.c b/board/st/common/stm32mp_dfu_virt.c
index f0f9960..4049d72 100644
--- a/board/st/common/stm32mp_dfu_virt.c
+++ b/board/st/common/stm32mp_dfu_virt.c
@@ -3,7 +3,6 @@
* Copyright (C) 2023, STMicroelectronics - All Rights Reserved
*/
-#include <common.h>
#include <dfu.h>
#include <dm.h>
#include <misc.h>
diff --git a/board/st/common/stpmic1.c b/board/st/common/stpmic1.c
index 969ad48..45c2bb5 100644
--- a/board/st/common/stpmic1.c
+++ b/board/st/common/stpmic1.c
@@ -5,7 +5,6 @@
#define LOG_CATEGORY LOGC_BOARD
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <asm/io.h>
diff --git a/board/st/common/stusb160x.c b/board/st/common/stusb160x.c
index f0385e5..e1ad8b0 100644
--- a/board/st/common/stusb160x.c
+++ b/board/st/common/stusb160x.c
@@ -8,7 +8,6 @@
#define LOG_CATEGORY UCLASS_I2C_GENERIC
-#include <common.h>
#include <dm.h>
#include <i2c.h>
diff --git a/board/st/stih410-b2260/board.c b/board/st/stih410-b2260/board.c
index 8281757..a912712 100644
--- a/board/st/stih410-b2260/board.c
+++ b/board/st/stih410-b2260/board.c
@@ -4,7 +4,6 @@
* Author(s): Patrice Chotard, <patrice.chotard@foss.st.com> for STMicroelectronics.
*/
-#include <common.h>
#include <cpu_func.h>
#include <init.h>
#include <asm/cache.h>
diff --git a/board/st/stm32f429-discovery/led.c b/board/st/stm32f429-discovery/led.c
index 8dda6a9..4b80383 100644
--- a/board/st/stm32f429-discovery/led.c
+++ b/board/st/stm32f429-discovery/led.c
@@ -4,7 +4,6 @@
* Kamil Lulko, <kamil.lulko@gmail.com>
*/
-#include <common.h>
#include <status_led.h>
#include <asm-generic/gpio.h>
diff --git a/board/st/stm32f429-discovery/stm32f429-discovery.c b/board/st/stm32f429-discovery/stm32f429-discovery.c
index 55e464c..22d751b 100644
--- a/board/st/stm32f429-discovery/stm32f429-discovery.c
+++ b/board/st/stm32f429-discovery/stm32f429-discovery.c
@@ -10,7 +10,6 @@
* Kamil Lulko, <kamil.lulko@gmail.com>
*/
-#include <common.h>
#include <dm.h>
#include <env.h>
#include <init.h>
diff --git a/board/st/stm32f429-evaluation/stm32f429-evaluation.c b/board/st/stm32f429-evaluation/stm32f429-evaluation.c
index 25472f0..db59ebb 100644
--- a/board/st/stm32f429-evaluation/stm32f429-evaluation.c
+++ b/board/st/stm32f429-evaluation/stm32f429-evaluation.c
@@ -4,7 +4,6 @@
* Author(s): Patrice Chotard, <patrice.chotard@foss.st.com> for STMicroelectronics.
*/
-#include <common.h>
#include <dm.h>
#include <env.h>
#include <init.h>
diff --git a/board/st/stm32f469-discovery/stm32f469-discovery.c b/board/st/stm32f469-discovery/stm32f469-discovery.c
index 9ed6c1e..134d207 100644
--- a/board/st/stm32f469-discovery/stm32f469-discovery.c
+++ b/board/st/stm32f469-discovery/stm32f469-discovery.c
@@ -4,7 +4,6 @@
* Author(s): Patrice CHOTARD, <patrice.chotard@foss.st.com> for STMicroelectronics.
*/
-#include <common.h>
#include <dm.h>
#include <env.h>
#include <init.h>
diff --git a/board/st/stm32f746-disco/stm32f746-disco.c b/board/st/stm32f746-disco/stm32f746-disco.c
index 0f96660..6d86e4f 100644
--- a/board/st/stm32f746-disco/stm32f746-disco.c
+++ b/board/st/stm32f746-disco/stm32f746-disco.c
@@ -4,7 +4,7 @@
* Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics.
*/
-#include <common.h>
+#include <config.h>
#include <dm.h>
#include <init.h>
#include <log.h>
diff --git a/board/st/stm32h743-disco/stm32h743-disco.c b/board/st/stm32h743-disco/stm32h743-disco.c
index 4ca5e84..35ef9ff 100644
--- a/board/st/stm32h743-disco/stm32h743-disco.c
+++ b/board/st/stm32h743-disco/stm32h743-disco.c
@@ -4,7 +4,6 @@
* Author(s): Patrice Chotard, <patrice.chotard@foss.st.com> for STMicroelectronics.
*/
-#include <common.h>
#include <dm.h>
#include <init.h>
#include <log.h>
diff --git a/board/st/stm32h743-eval/stm32h743-eval.c b/board/st/stm32h743-eval/stm32h743-eval.c
index 4ca5e84..35ef9ff 100644
--- a/board/st/stm32h743-eval/stm32h743-eval.c
+++ b/board/st/stm32h743-eval/stm32h743-eval.c
@@ -4,7 +4,6 @@
* Author(s): Patrice Chotard, <patrice.chotard@foss.st.com> for STMicroelectronics.
*/
-#include <common.h>
#include <dm.h>
#include <init.h>
#include <log.h>
diff --git a/board/st/stm32h750-art-pi/stm32h750-art-pi.c b/board/st/stm32h750-art-pi/stm32h750-art-pi.c
index 0d39ce8..75aa4d1 100644
--- a/board/st/stm32h750-art-pi/stm32h750-art-pi.c
+++ b/board/st/stm32h750-art-pi/stm32h750-art-pi.c
@@ -4,7 +4,6 @@
* Author(s): Dillon Min <dillon.minfei@gmail.com>
*/
-#include <common.h>
#include <dm.h>
#include <init.h>
#include <log.h>
diff --git a/board/st/stm32mp1/spl.c b/board/st/stm32mp1/spl.c
index 8b4a529..d63dffd 100644
--- a/board/st/stm32mp1/spl.c
+++ b/board/st/stm32mp1/spl.c
@@ -4,7 +4,6 @@
*/
#include <config.h>
-#include <common.h>
#include <power/pmic.h>
#include <power/stpmic1.h>
#include <asm/arch/sys_proto.h>
diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c
index a17c314..97532a8 100644
--- a/board/st/stm32mp1/stm32mp1.c
+++ b/board/st/stm32mp1/stm32mp1.c
@@ -5,9 +5,9 @@
#define LOG_CATEGORY LOGC_BOARD
-#include <common.h>
#include <adc.h>
#include <bootm.h>
+#include <button.h>
#include <clk.h>
#include <config.h>
#include <dm.h>
@@ -38,6 +38,7 @@
#include <asm/gpio.h>
#include <asm/arch/stm32.h>
#include <asm/arch/sys_proto.h>
+#include <dm/device-internal.h>
#include <dm/ofnode.h>
#include <jffs2/load_kernel.h>
#include <linux/bitops.h>
@@ -52,12 +53,10 @@
/* SYSCFG registers */
#define SYSCFG_BOOTR 0x00
-#define SYSCFG_PMCSETR 0x04
#define SYSCFG_IOCTRLSETR 0x18
#define SYSCFG_ICNR 0x1C
#define SYSCFG_CMPCR 0x20
#define SYSCFG_CMPENSETR 0x24
-#define SYSCFG_PMCCLRR 0x44
#define SYSCFG_BOOTR_BOOT_MASK GENMASK(2, 0)
#define SYSCFG_BOOTR_BOOTPD_SHIFT 4
@@ -73,16 +72,6 @@
#define SYSCFG_CMPENSETR_MPU_EN BIT(0)
-#define SYSCFG_PMCSETR_ETH_CLK_SEL BIT(16)
-#define SYSCFG_PMCSETR_ETH_REF_CLK_SEL BIT(17)
-
-#define SYSCFG_PMCSETR_ETH_SELMII BIT(20)
-
-#define SYSCFG_PMCSETR_ETH_SEL_MASK GENMASK(23, 21)
-#define SYSCFG_PMCSETR_ETH_SEL_GMII_MII 0
-#define SYSCFG_PMCSETR_ETH_SEL_RGMII BIT(21)
-#define SYSCFG_PMCSETR_ETH_SEL_RMII BIT(23)
-
#define USB_LOW_THRESHOLD_UV 200000
#define USB_WARNING_LOW_THRESHOLD_UV 660000
#define USB_START_LOW_THRESHOLD_UV 1230000
@@ -150,45 +139,55 @@
static void board_key_check(void)
{
- ofnode node;
- struct gpio_desc gpio;
+ struct udevice *button1 = NULL, *button2 = NULL;
enum forced_boot_mode boot_mode = BOOT_NORMAL;
+ int ret;
+
+ if (!IS_ENABLED(CONFIG_BUTTON))
+ return;
if (!IS_ENABLED(CONFIG_FASTBOOT) && !IS_ENABLED(CONFIG_CMD_STM32PROG))
return;
- node = ofnode_path("/config");
- if (!ofnode_valid(node)) {
- log_debug("no /config node?\n");
- return;
- }
- if (IS_ENABLED(CONFIG_FASTBOOT)) {
- if (gpio_request_by_name_nodev(node, "st,fastboot-gpios", 0,
- &gpio, GPIOD_IS_IN)) {
- log_debug("could not find a /config/st,fastboot-gpios\n");
- } else {
- udelay(20);
- if (dm_gpio_get_value(&gpio)) {
- log_notice("Fastboot key pressed, ");
- boot_mode = BOOT_FASTBOOT;
- }
+ if (IS_ENABLED(CONFIG_CMD_STM32PROG))
+ button_get_by_label("User-1", &button1);
- dm_gpio_free(NULL, &gpio);
+ if (IS_ENABLED(CONFIG_FASTBOOT))
+ button_get_by_label("User-2", &button2);
+
+ if (!button1 && !button2)
+ return;
+
+ if (button2) {
+ if (button_get_state(button2) == BUTTON_ON) {
+ log_notice("Fastboot key pressed, ");
+ boot_mode = BOOT_FASTBOOT;
}
+ /*
+ * On some boards, same gpio is shared betwwen gpio-keys and
+ * leds, remove the button device to free the gpio for led
+ * usage
+ */
+ ret = device_remove(button2, DM_REMOVE_NORMAL);
+ if (ret)
+ log_err("Can't remove button2 (%d)\n", ret);
}
- if (IS_ENABLED(CONFIG_CMD_STM32PROG)) {
- if (gpio_request_by_name_nodev(node, "st,stm32prog-gpios", 0,
- &gpio, GPIOD_IS_IN)) {
- log_debug("could not find a /config/st,stm32prog-gpios\n");
- } else {
- udelay(20);
- if (dm_gpio_get_value(&gpio)) {
- log_notice("STM32Programmer key pressed, ");
- boot_mode = BOOT_STM32PROG;
- }
- dm_gpio_free(NULL, &gpio);
+
+ if (button1) {
+ if (button_get_state(button1) == BUTTON_ON) {
+ log_notice("STM32Programmer key pressed, ");
+ boot_mode = BOOT_STM32PROG;
}
+ /*
+ * On some boards, same gpio is shared betwwen gpio-keys and
+ * leds, remove the button device to free the gpio for led
+ * usage
+ */
+ ret = device_remove(button1, DM_REMOVE_NORMAL);
+ if (ret)
+ log_err("Can't remove button1 (%d)\n", ret);
}
+
if (boot_mode != BOOT_NORMAL) {
log_notice("entering download mode...\n");
clrsetbits_le32(TAMP_BOOT_CONTEXT,
@@ -742,76 +741,6 @@
setup_led(LEDST_OFF);
}
-/* eth init function : weak called in eqos driver */
-int board_interface_eth_init(struct udevice *dev,
- phy_interface_t interface_type)
-{
- u8 *syscfg;
- u32 value;
- bool eth_clk_sel_reg = false;
- bool eth_ref_clk_sel_reg = false;
-
- /* Gigabit Ethernet 125MHz clock selection. */
- eth_clk_sel_reg = dev_read_bool(dev, "st,eth-clk-sel");
-
- /* Ethernet 50Mhz RMII clock selection */
- eth_ref_clk_sel_reg =
- dev_read_bool(dev, "st,eth-ref-clk-sel");
-
- syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
-
- if (!syscfg)
- return -ENODEV;
-
- switch (interface_type) {
- case PHY_INTERFACE_MODE_MII:
- value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII |
- SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
- log_debug("PHY_INTERFACE_MODE_MII\n");
- break;
- case PHY_INTERFACE_MODE_GMII:
- if (eth_clk_sel_reg)
- value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII |
- SYSCFG_PMCSETR_ETH_CLK_SEL;
- else
- value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII;
- log_debug("PHY_INTERFACE_MODE_GMII\n");
- break;
- case PHY_INTERFACE_MODE_RMII:
- if (eth_ref_clk_sel_reg)
- value = SYSCFG_PMCSETR_ETH_SEL_RMII |
- SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
- else
- value = SYSCFG_PMCSETR_ETH_SEL_RMII;
- log_debug("PHY_INTERFACE_MODE_RMII\n");
- break;
- case PHY_INTERFACE_MODE_RGMII:
- case PHY_INTERFACE_MODE_RGMII_ID:
- case PHY_INTERFACE_MODE_RGMII_RXID:
- case PHY_INTERFACE_MODE_RGMII_TXID:
- if (eth_clk_sel_reg)
- value = SYSCFG_PMCSETR_ETH_SEL_RGMII |
- SYSCFG_PMCSETR_ETH_CLK_SEL;
- else
- value = SYSCFG_PMCSETR_ETH_SEL_RGMII;
- log_debug("PHY_INTERFACE_MODE_RGMII\n");
- break;
- default:
- log_debug("Do not manage %d interface\n",
- interface_type);
- /* Do not manage others interfaces */
- return -EINVAL;
- }
-
- /* clear and set ETH configuration bits */
- writel(SYSCFG_PMCSETR_ETH_SEL_MASK | SYSCFG_PMCSETR_ETH_SELMII |
- SYSCFG_PMCSETR_ETH_REF_CLK_SEL | SYSCFG_PMCSETR_ETH_CLK_SEL,
- syscfg + SYSCFG_PMCCLRR);
- writel(value, syscfg + SYSCFG_PMCSETR);
-
- return 0;
-}
-
enum env_location env_get_location(enum env_operation op, int prio)
{
u32 bootmode = get_bootmode();
diff --git a/board/starfive/visionfive2/spl.c b/board/starfive/visionfive2/spl.c
index 1b49945..ca61b5b 100644
--- a/board/starfive/visionfive2/spl.c
+++ b/board/starfive/visionfive2/spl.c
@@ -4,7 +4,6 @@
* Author: Yanhong Wang<yanhong.wang@starfivetech.com>
*/
-#include <common.h>
#include <asm/arch/eeprom.h>
#include <asm/arch/gpio.h>
#include <asm/arch/regs.h>
@@ -27,6 +26,26 @@
const char *value;
};
+static const struct starfive_vf2_pro milk_v_mars[] = {
+ {"/soc/ethernet@16030000", "starfive,tx-use-rgmii-clk", NULL},
+ {"/soc/ethernet@16040000", "starfive,tx-use-rgmii-clk", NULL},
+
+ {"/soc/ethernet@16030000/mdio/ethernet-phy@0",
+ "motorcomm,tx-clk-adj-enabled", NULL},
+ {"/soc/ethernet@16030000/mdio/ethernet-phy@0",
+ "motorcomm,tx-clk-100-inverted", NULL},
+ {"/soc/ethernet@16030000/mdio/ethernet-phy@0",
+ "motorcomm,tx-clk-1000-inverted", NULL},
+ {"/soc/ethernet@16030000/mdio/ethernet-phy@0",
+ "motorcomm,rx-clk-drv-microamp", "3970"},
+ {"/soc/ethernet@16030000/mdio/ethernet-phy@0",
+ "motorcomm,rx-data-drv-microamp", "2910"},
+ {"/soc/ethernet@16030000/mdio/ethernet-phy@0",
+ "rx-internal-delay-ps", "1900"},
+ {"/soc/ethernet@16030000/mdio/ethernet-phy@0",
+ "tx-internal-delay-ps", "1500"},
+};
+
static const struct starfive_vf2_pro starfive_vera[] = {
{"/soc/ethernet@16030000/mdio/ethernet-phy@0", "rx-internal-delay-ps",
"1900"},
@@ -67,6 +86,49 @@
"tx-internal-delay-ps", "0"},
};
+void spl_fdt_fixup_mars(void *fdt)
+{
+ static const char compat[] = "milkv,mars\0starfive,jh7110";
+ u32 phandle;
+ u8 i;
+ int offset;
+ int ret;
+
+ fdt_setprop(fdt, fdt_path_offset(fdt, "/"), "compatible", compat, sizeof(compat));
+ fdt_setprop_string(fdt, fdt_path_offset(fdt, "/"), "model",
+ "Milk-V Mars");
+
+ /* gmac0 */
+ offset = fdt_path_offset(fdt, "/soc/clock-controller@17000000");
+ phandle = fdt_get_phandle(fdt, offset);
+ offset = fdt_path_offset(fdt, "/soc/ethernet@16030000");
+
+ fdt_setprop_u32(fdt, offset, "assigned-clocks", phandle);
+ fdt_appendprop_u32(fdt, offset, "assigned-clocks", JH7110_AONCLK_GMAC0_TX);
+ fdt_setprop_u32(fdt, offset, "assigned-clock-parents", phandle);
+ fdt_appendprop_u32(fdt, offset, "assigned-clock-parents",
+ JH7110_AONCLK_GMAC0_RMII_RTX);
+
+ /* gmac1 */
+ fdt_setprop_string(fdt, fdt_path_offset(fdt, "/soc/ethernet@16040000"),
+ "status", "disabled");
+
+ for (i = 0; i < ARRAY_SIZE(milk_v_mars); i++) {
+ offset = fdt_path_offset(fdt, milk_v_mars[i].path);
+
+ if (milk_v_mars[i].value)
+ ret = fdt_setprop_u32(fdt, offset, milk_v_mars[i].name,
+ dectoul(milk_v_mars[i].value, NULL));
+ else
+ ret = fdt_setprop_empty(fdt, offset, milk_v_mars[i].name);
+
+ if (ret) {
+ pr_err("%s set prop %s fail.\n", __func__, milk_v_mars[i].name);
+ break;
+ }
+ }
+}
+
void spl_fdt_fixup_version_a(void *fdt)
{
static const char compat[] = "starfive,visionfive-2-v1.2a\0starfive,jh7110";
@@ -167,22 +229,34 @@
void spl_perform_fixups(struct spl_image_info *spl_image)
{
u8 version;
+ const char *product_id;
- version = get_pcb_revision_from_eeprom();
- switch (version) {
- case 'a':
- case 'A':
- spl_fdt_fixup_version_a(spl_image->fdt_addr);
- break;
+ product_id = get_product_id_from_eeprom();
+ if (!product_id) {
+ pr_err("Can't read EEPROM\n");
+ return;
+ }
+ if (!strncmp(product_id, "MARS", 4)) {
+ spl_fdt_fixup_mars(spl_image->fdt_addr);
+ } else if (!strncmp(product_id, "VF7110", 6)) {
+ version = get_pcb_revision_from_eeprom();
+ switch (version) {
+ case 'a':
+ case 'A':
+ spl_fdt_fixup_version_a(spl_image->fdt_addr);
+ break;
- case 'b':
- case 'B':
- default:
- spl_fdt_fixup_version_b(spl_image->fdt_addr);
+ case 'b':
+ case 'B':
+ default:
+ spl_fdt_fixup_version_b(spl_image->fdt_addr);
break;
+ };
+ } else {
+ pr_err("Unknown product %s\n", product_id);
};
- /* Update the memory size which read form eeprom or DT */
+ /* Update the memory size which read from eeprom or DT */
fdt_fixup_memory(spl_image->fdt_addr, 0x40000000, gd->ram_size);
}
@@ -211,9 +285,9 @@
jh7110_jtag_init();
- ret = spl_soc_init();
+ ret = spl_dram_init();
if (ret) {
- debug("JH7110 SPL init failed: %d\n", ret);
+ debug("JH7110 DRAM init failed: %d\n", ret);
return ret;
}
diff --git a/board/starfive/visionfive2/starfive_visionfive2.c b/board/starfive/visionfive2/starfive_visionfive2.c
index 78e118d..a86bca5 100644
--- a/board/starfive/visionfive2/starfive_visionfive2.c
+++ b/board/starfive/visionfive2/starfive_visionfive2.c
@@ -4,11 +4,11 @@
* Author: Yanhong Wang<yanhong.wang@starfivetech.com>
*/
-#include <common.h>
#include <cpu_func.h>
#include <dm.h>
#include <fdt_support.h>
#include <env.h>
+#include <log.h>
#include <asm/arch/eeprom.h>
#include <asm/io.h>
#include <asm/sections.h>
@@ -17,6 +17,8 @@
DECLARE_GLOBAL_DATA_PTR;
#define JH7110_L2_PREFETCHER_BASE_ADDR 0x2030000
#define JH7110_L2_PREFETCHER_HART_OFFSET 0x2000
+#define FDTFILE_MILK_V_MARS \
+ "starfive/jh7110-milkv-mars.dtb"
#define FDTFILE_VISIONFIVE2_1_2A \
"starfive/jh7110-starfive-visionfive-2-v1.2a.dtb"
#define FDTFILE_VISIONFIVE2_1_3B \
@@ -48,20 +50,38 @@
{
u8 version;
const char *fdtfile;
+ const char *product_id;
- version = get_pcb_revision_from_eeprom();
- switch (version) {
- case 'a':
- case 'A':
- fdtfile = FDTFILE_VISIONFIVE2_1_2A;
- break;
+ fdtfile = env_get("fdtfile");
+ if (fdtfile)
+ return;
- case 'b':
- case 'B':
- default:
- fdtfile = FDTFILE_VISIONFIVE2_1_3B;
- break;
- };
+ product_id = get_product_id_from_eeprom();
+ if (!product_id) {
+ log_err("Can't read EEPROM\n");
+ return;
+ }
+ if (!strncmp(product_id, "MARS", 4)) {
+ fdtfile = FDTFILE_MILK_V_MARS;
+ } else if (!strncmp(product_id, "VF7110", 6)) {
+ version = get_pcb_revision_from_eeprom();
+
+ switch (version) {
+ case 'a':
+ case 'A':
+ fdtfile = FDTFILE_VISIONFIVE2_1_2A;
+ break;
+
+ case 'b':
+ case 'B':
+ default:
+ fdtfile = FDTFILE_VISIONFIVE2_1_3B;
+ break;
+ }
+ } else {
+ log_err("Unknown product\n");
+ return;
+ }
env_set("fdtfile", fdtfile);
}
diff --git a/board/starfive/visionfive2/visionfive2-i2c-eeprom.c b/board/starfive/visionfive2/visionfive2-i2c-eeprom.c
index c36de1a..5095a0e 100644
--- a/board/starfive/visionfive2/visionfive2-i2c-eeprom.c
+++ b/board/starfive/visionfive2/visionfive2-i2c-eeprom.c
@@ -4,7 +4,6 @@
* Author: Yanhong Wang<yanhong.wang@starfivetech.com>
*/
-#include <common.h>
#include <command.h>
#include <env.h>
#include <i2c.h>
@@ -405,6 +404,14 @@
update_crc();
}
+const char *get_product_id_from_eeprom(void)
+{
+ if (read_eeprom())
+ return NULL;
+
+ return pbuf.eeprom.atom1.data.pstr;
+}
+
int do_mac(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
{
char *cmd;
@@ -496,7 +503,7 @@
* "<product>-<date>-<DDR&eMMC>-<serial_number>"
* <date>: 4Byte, should be the output of `date +%y%W`
* <DDR&eMMC>: 8Byte, "D008" means 8GB, "D01T" means 1TB;
- * "E000" means no eMMC，"E032" means 32GB, "E01T" means 1TB.
+ * "E000" means no eMMC, "E032" means 32GB, "E01T" means 1TB.
* <serial_number>: 8Byte, the Unique Identifier of board in hex.
*/
if (!env_get("serial#"))
@@ -526,7 +533,7 @@
* get_ddr_size_from_eeprom - get the DDR size
* pstr: VF7110A1-2228-D008E000-00000001
* VF7110A1/VF7110B1 : VisionFive JH7110A /VisionFive JH7110B
- * D008: 8GB LPDDR4
+ * D008: 8GB LPDDR4
* E000: No emmc device, ECxx: include emmc device, xx: Capacity size[GB]
* return: the field of 'D008E000'
*/
diff --git a/board/ste/stemmy/stemmy.c b/board/ste/stemmy/stemmy.c
index 060d562..826c002 100644
--- a/board/ste/stemmy/stemmy.c
+++ b/board/ste/stemmy/stemmy.c
@@ -2,12 +2,12 @@
/*
* Copyright (C) 2019 Stephan Gerhold <stephan@gerhold.net>
*/
-#include <common.h>
#include <env.h>
#include <fdt_support.h>
#include <init.h>
#include <log.h>
#include <stdlib.h>
+#include <linux/errno.h>
#include <asm/global_data.h>
#include <asm/setup.h>
#include <asm/system.h>
diff --git a/board/storopack/smegw01/smegw01.c b/board/storopack/smegw01/smegw01.c
index 345191b..910feed 100644
--- a/board/storopack/smegw01/smegw01.c
+++ b/board/storopack/smegw01/smegw01.c
@@ -12,7 +12,6 @@
#include <asm/mach-imx/hab.h>
#include <asm/mach-imx/iomux-v3.h>
#include <asm/io.h>
-#include <common.h>
#include <env.h>
#include <env_internal.h>
#include <asm/arch/crm_regs.h>
diff --git a/board/sunxi/board.c b/board/sunxi/board.c
index 8c12c8d..ed86f1d 100644
--- a/board/sunxi/board.c
+++ b/board/sunxi/board.c
@@ -10,7 +10,6 @@
* Some board init for the Allwinner A10-evb board.
*/
-#include <common.h>
#include <clock_legacy.h>
#include <dm.h>
#include <env.h>
@@ -186,7 +185,7 @@
return ENVL_UNKNOWN;
}
-/* add board specific code here */
+/* called only from U-Boot proper */
int board_init(void)
{
__maybe_unused int id_pfr1, ret;
@@ -226,13 +225,6 @@
if (ret)
return ret;
-#if CONFIG_IS_ENABLED(DM_I2C)
- /*
- * Temporary workaround for enabling I2C clocks until proper sunxi DM
- * clk, reset and pinctrl drivers land.
- */
- i2c_init_board();
-#endif
eth_init_board();
return 0;
diff --git a/board/sunxi/chip.c b/board/sunxi/chip.c
index eeee631..270af25 100644
--- a/board/sunxi/chip.c
+++ b/board/sunxi/chip.c
@@ -5,7 +5,6 @@
* Based on initial code from Maxime Ripard
*/
-#include <common.h>
#include <malloc.h>
#include <dm.h>
#include <w1.h>
diff --git a/board/sunxi/dram_sun4i_auto.c b/board/sunxi/dram_sun4i_auto.c
index 547d1c0..4b78919 100644
--- a/board/sunxi/dram_sun4i_auto.c
+++ b/board/sunxi/dram_sun4i_auto.c
@@ -1,4 +1,3 @@
-#include <common.h>
#include <init.h>
#include <asm/arch/dram.h>
diff --git a/board/sunxi/dram_sun5i_auto.c b/board/sunxi/dram_sun5i_auto.c
index 517506c..8976e3b 100644
--- a/board/sunxi/dram_sun5i_auto.c
+++ b/board/sunxi/dram_sun5i_auto.c
@@ -1,6 +1,5 @@
/* DRAM parameters for auto dram configuration on sun5i and sun7i */
-#include <common.h>
#include <init.h>
#include <asm/arch/dram.h>
diff --git a/board/sunxi/gmac.c b/board/sunxi/gmac.c
index 2a88530..710e821 100644
--- a/board/sunxi/gmac.c
+++ b/board/sunxi/gmac.c
@@ -1,4 +1,3 @@
-#include <common.h>
#include <netdev.h>
#include <miiphy.h>
#include <asm/io.h>
diff --git a/board/sysam/amcore/amcore.c b/board/sysam/amcore/amcore.c
index 086421d..d5aa1f0 100644
--- a/board/sysam/amcore/amcore.c
+++ b/board/sysam/amcore/amcore.c
@@ -7,7 +7,7 @@
* This file copies memory testdram() from sandburst/common/sb_common.c
*/
-#include <common.h>
+#include <config.h>
#include <init.h>
#include <asm/global_data.h>
#include <asm/immap.h>
diff --git a/board/sysam/stmark2/stmark2.c b/board/sysam/stmark2/stmark2.c
index 475e3ed..7818f26 100644
--- a/board/sysam/stmark2/stmark2.c
+++ b/board/sysam/stmark2/stmark2.c
@@ -5,7 +5,7 @@
* (C) Copyright 2017 Angelo Dureghello <angelo@sysam.it>
*/
-#include <common.h>
+#include <config.h>
#include <init.h>
#include <spi.h>
#include <asm/global_data.h>
diff --git a/board/tcl/sl50/board.c b/board/tcl/sl50/board.c
index 3f7d42f..2e54ede 100644
--- a/board/tcl/sl50/board.c
+++ b/board/tcl/sl50/board.c
@@ -7,7 +7,7 @@
* Copyright (C) 2011, Texas Instruments, Incorporated - https://www.ti.com/
*/
-#include <common.h>
+#include <config.h>
#include <env.h>
#include <errno.h>
#include <init.h>
diff --git a/board/tcl/sl50/mux.c b/board/tcl/sl50/mux.c
index ab90881..6d89c4a 100644
--- a/board/tcl/sl50/mux.c
+++ b/board/tcl/sl50/mux.c
@@ -5,7 +5,6 @@
* Copyright (C) 2011, Texas Instruments, Incorporated - https://www.ti.com/
*/
-#include <common.h>
#include <asm/arch/sys_proto.h>
#include <asm/arch/hardware.h>
#include <asm/arch/mux.h>
diff --git a/board/technexion/pico-imx6/pico-imx6.c b/board/technexion/pico-imx6/pico-imx6.c
index 6b9c4f4..03170b1 100644
--- a/board/technexion/pico-imx6/pico-imx6.c
+++ b/board/technexion/pico-imx6/pico-imx6.c
@@ -6,7 +6,6 @@
* Author: Fabio Estevam <festevam@gmail.com>
*/
-#include <common.h>
#include <env.h>
#include <init.h>
#include <net.h>
diff --git a/board/technexion/pico-imx6/spl.c b/board/technexion/pico-imx6/spl.c
index 3b36bb8..50f5177 100644
--- a/board/technexion/pico-imx6/spl.c
+++ b/board/technexion/pico-imx6/spl.c
@@ -6,7 +6,6 @@
* Fabio Estevam <festevam@gmail.com>
*/
-#include <common.h>
#include <image.h>
#include <init.h>
#include <asm/arch/clock.h>
diff --git a/board/technexion/pico-imx6ul/pico-imx6ul.c b/board/technexion/pico-imx6ul/pico-imx6ul.c
index 682c88d..10dcf80 100644
--- a/board/technexion/pico-imx6ul/pico-imx6ul.c
+++ b/board/technexion/pico-imx6ul/pico-imx6ul.c
@@ -17,7 +17,6 @@
#include <asm/gpio.h>
#include <asm/mach-imx/iomux-v3.h>
#include <asm/io.h>
-#include <common.h>
#include <miiphy.h>
#include <linux/delay.h>
#include <linux/sizes.h>
diff --git a/board/technexion/pico-imx6ul/spl.c b/board/technexion/pico-imx6ul/spl.c
index ff56fd8..67484e6 100644
--- a/board/technexion/pico-imx6ul/spl.c
+++ b/board/technexion/pico-imx6ul/spl.c
@@ -1,6 +1,5 @@
// SPDX-License-Identifier: GPL-2.0+
-#include <common.h>
#include <cpu_func.h>
#include <hang.h>
#include <init.h>
diff --git a/board/technexion/pico-imx7d/pico-imx7d.c b/board/technexion/pico-imx7d/pico-imx7d.c
index b12941c..d0f739c 100644
--- a/board/technexion/pico-imx7d/pico-imx7d.c
+++ b/board/technexion/pico-imx7d/pico-imx7d.c
@@ -15,7 +15,6 @@
#include <asm/mach-imx/iomux-v3.h>
#include <asm/mach-imx/boot_mode.h>
#include <asm/io.h>
-#include <common.h>
#include <miiphy.h>
#include <power/pmic.h>
#include <power/pfuze3000_pmic.h>
diff --git a/board/technexion/pico-imx7d/spl.c b/board/technexion/pico-imx7d/spl.c
index 0192eaf..8f219f7 100644
--- a/board/technexion/pico-imx7d/spl.c
+++ b/board/technexion/pico-imx7d/spl.c
@@ -5,7 +5,7 @@
* Author: Richard Hu <richard.hu@technexion.com>
*/
-#include <common.h>
+#include <config.h>
#include <cpu_func.h>
#include <init.h>
#include <asm/arch/clock.h>
diff --git a/board/technexion/pico-imx8mq/lpddr4_timing_1gb.c b/board/technexion/pico-imx8mq/lpddr4_timing_1gb.c
index 97b9ee2..cd8ba59 100644
--- a/board/technexion/pico-imx8mq/lpddr4_timing_1gb.c
+++ b/board/technexion/pico-imx8mq/lpddr4_timing_1gb.c
@@ -7,7 +7,6 @@
*/
#include <linux/kernel.h>
-#include <common.h>
#include <asm/arch/ddr.h>
#include <asm/arch/lpddr4_define.h>
diff --git a/board/technexion/pico-imx8mq/lpddr4_timing_2gb.c b/board/technexion/pico-imx8mq/lpddr4_timing_2gb.c
index 1572a50..3f66238 100644
--- a/board/technexion/pico-imx8mq/lpddr4_timing_2gb.c
+++ b/board/technexion/pico-imx8mq/lpddr4_timing_2gb.c
@@ -7,7 +7,6 @@
*/
#include <linux/kernel.h>
-#include <common.h>
#include <asm/arch/ddr.h>
#include <asm/arch/lpddr4_define.h>
diff --git a/board/technexion/pico-imx8mq/lpddr4_timing_3gb.c b/board/technexion/pico-imx8mq/lpddr4_timing_3gb.c
index 3fc60a3..2f037ab 100644
--- a/board/technexion/pico-imx8mq/lpddr4_timing_3gb.c
+++ b/board/technexion/pico-imx8mq/lpddr4_timing_3gb.c
@@ -7,7 +7,6 @@
*/
#include <linux/kernel.h>
-#include <common.h>
#include <asm/arch/ddr.h>
#include <asm/arch/lpddr4_define.h>
diff --git a/board/technexion/pico-imx8mq/lpddr4_timing_4gb.c b/board/technexion/pico-imx8mq/lpddr4_timing_4gb.c
index 93b3423..336ac4c 100644
--- a/board/technexion/pico-imx8mq/lpddr4_timing_4gb.c
+++ b/board/technexion/pico-imx8mq/lpddr4_timing_4gb.c
@@ -7,7 +7,6 @@
*/
#include <linux/kernel.h>
-#include <common.h>
#include <asm/arch/ddr.h>
#include <asm/arch/lpddr4_define.h>
diff --git a/board/technexion/pico-imx8mq/pico-imx8mq.c b/board/technexion/pico-imx8mq/pico-imx8mq.c
index 2be3206..1659db1 100644
--- a/board/technexion/pico-imx8mq/pico-imx8mq.c
+++ b/board/technexion/pico-imx8mq/pico-imx8mq.c
@@ -3,7 +3,6 @@
* Copyright 2018 NXP
*/
-#include <common.h>
#include <env.h>
#include <init.h>
#include <malloc.h>
diff --git a/board/technexion/pico-imx8mq/spl.c b/board/technexion/pico-imx8mq/spl.c
index 1a9c799..c9d68b4 100644
--- a/board/technexion/pico-imx8mq/spl.c
+++ b/board/technexion/pico-imx8mq/spl.c
@@ -3,7 +3,6 @@
* Copyright 2018 NXP
*/
-#include <common.h>
#include <hang.h>
#include <init.h>
#include <log.h>
diff --git a/board/terasic/de1-soc/socfpga.c b/board/terasic/de1-soc/socfpga.c
index 22fbee4..8d17f44 100644
--- a/board/terasic/de1-soc/socfpga.c
+++ b/board/terasic/de1-soc/socfpga.c
@@ -2,7 +2,6 @@
/*
* Copyright (C) 2012 Altera Corporation <www.altera.com>
*/
-#include <common.h>
#include <spl.h>
void board_boot_order(u32 *spl_boot_list)
diff --git a/board/thead/th1520_lpi4a/board.c b/board/thead/th1520_lpi4a/board.c
index 16c3e45..bb83e75 100644
--- a/board/thead/th1520_lpi4a/board.c
+++ b/board/thead/th1520_lpi4a/board.c
@@ -4,7 +4,6 @@
*
*/
-#include <common.h>
#include <cpu_func.h>
int board_init(void)
diff --git a/board/theadorable/fpga.c b/board/theadorable/fpga.c
index bc8379c..56d3647 100644
--- a/board/theadorable/fpga.c
+++ b/board/theadorable/fpga.c
@@ -3,10 +3,10 @@
* Copyright (C) 2016 Stefan Roese <sr@denx.de>
*/
-#include <common.h>
#include <altera.h>
#include <errno.h>
#include <log.h>
+#include <time.h>
#include <asm/gpio.h>
#include <asm/io.h>
#include <asm/arch/cpu.h>
diff --git a/board/theadorable/theadorable.c b/board/theadorable/theadorable.c
index 144f122..cca5c3d 100644
--- a/board/theadorable/theadorable.c
+++ b/board/theadorable/theadorable.c
@@ -3,7 +3,6 @@
* Copyright (C) 2015-2019 Stefan Roese <sr@denx.de>
*/
-#include <common.h>
#include <command.h>
#include <console.h>
#include <dm.h>
diff --git a/board/theobroma-systems/ringneck_px30/ringneck-px30.c b/board/theobroma-systems/ringneck_px30/ringneck-px30.c
index bfebfe5..c48de73 100644
--- a/board/theobroma-systems/ringneck_px30/ringneck-px30.c
+++ b/board/theobroma-systems/ringneck_px30/ringneck-px30.c
@@ -58,9 +58,9 @@
mdelay(1);
- ret = gpio_direction_output(STM32_RST, 1);
+ ret = gpio_direction_input(STM32_RST);
if (ret) {
- debug("Failed to configure STM32_RST as output high\n");
+ debug("Failed to configure STM32_RST as input\n");
return;
}
}
diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c
index 34f987c..34f4a91 100644
--- a/board/ti/am335x/board.c
+++ b/board/ti/am335x/board.c
@@ -7,7 +7,7 @@
* Copyright (C) 2011, Texas Instruments, Incorporated - https://www.ti.com/
*/
-#include <common.h>
+#include <config.h>
#include <dm.h>
#include <env.h>
#include <errno.h>
diff --git a/board/ti/am335x/board.h b/board/ti/am335x/board.h
index 1284c16..b0a3842 100644
--- a/board/ti/am335x/board.h
+++ b/board/ti/am335x/board.h
@@ -10,6 +10,8 @@
#ifndef _BOARD_H_
#define _BOARD_H_
+#include <linux/string.h>
+
/**
* AM335X (EMIF_4D) EMIF REG_COS_COUNT_1, REG_COS_COUNT_2, and
* REG_PR_OLD_COUNT values to avoid LCDC DMA FIFO underflows and Frame
diff --git a/board/ti/am335x/mux.c b/board/ti/am335x/mux.c
index 0bad154..960de15 100644
--- a/board/ti/am335x/mux.c
+++ b/board/ti/am335x/mux.c
@@ -13,7 +13,7 @@
* GNU General Public License for more details.
*/
-#include <common.h>
+#include <config.h>
#include <asm/arch/sys_proto.h>
#include <asm/arch/hardware.h>
#include <asm/arch/mux.h>
diff --git a/board/ti/am43xx/board.c b/board/ti/am43xx/board.c
index a4679a2..40b7fcf 100644
--- a/board/ti/am43xx/board.c
+++ b/board/ti/am43xx/board.c
@@ -7,8 +7,7 @@
* Copyright (C) 2013, Texas Instruments, Incorporated - https://www.ti.com/
*/
-#include <common.h>
-#include <eeprom.h>
+#include <config.h>
#include <asm/global_data.h>
#include <dm/uclass.h>
#include <env.h>
diff --git a/board/ti/am43xx/board.h b/board/ti/am43xx/board.h
index 37a169a..b1025bd 100644
--- a/board/ti/am43xx/board.h
+++ b/board/ti/am43xx/board.h
@@ -11,6 +11,7 @@
#ifndef _BOARD_H_
#define _BOARD_H_
+#include <linux/string.h>
#include <asm/arch/omap.h>
#define DEV_ATTR_MAX_OFFSET 5
diff --git a/board/ti/am43xx/mux.c b/board/ti/am43xx/mux.c
index 463f1cc..2fcccbd 100644
--- a/board/ti/am43xx/mux.c
+++ b/board/ti/am43xx/mux.c
@@ -5,7 +5,6 @@
* Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
*/
-#include <common.h>
#include <asm/arch/sys_proto.h>
#include <asm/arch/mux.h>
#include "../common/board_detect.h"
diff --git a/board/ti/am57xx/board.c b/board/ti/am57xx/board.c
index b004a89..4866888 100644
--- a/board/ti/am57xx/board.c
+++ b/board/ti/am57xx/board.c
@@ -7,7 +7,7 @@
* Based on board/ti/dra7xx/evm.c
*/
-#include <common.h>
+#include <config.h>
#include <env.h>
#include <fastboot.h>
#include <fdt_support.h>
diff --git a/board/ti/am65x/am65x.env b/board/ti/am65x/am65x.env
index 814374d..631997e 100644
--- a/board/ti/am65x/am65x.env
+++ b/board/ti/am65x/am65x.env
@@ -27,3 +27,7 @@
args_ubi=setenv bootargs console=${console} ${optargs}
rootfstype=ubifs root=ubi0:rootfs rw ubi.mtd=ospi.rootfs
+#if CONFIG_TI_ICSSG_PRUETH
+storage_interface=mmc
+fw_dev_part=1:2
+#endif
diff --git a/board/ti/am65x/evm.c b/board/ti/am65x/evm.c
index 3109c9a..07073a5 100644
--- a/board/ti/am65x/evm.c
+++ b/board/ti/am65x/evm.c
@@ -91,10 +91,13 @@
#ifdef CONFIG_SPL_LOAD_FIT
int board_fit_config_name_match(const char *name)
{
-#ifdef CONFIG_TARGET_AM654_A53_EVM
- if (!strcmp(name, "k3-am654-base-board"))
+ if (IS_ENABLED(CONFIG_TI_ICSSG_PRUETH) &&
+ strcmp(name, "k3-am654-icssg2") == 0)
return 0;
-#endif
+
+ if (IS_ENABLED(CONFIG_TARGET_AM654_A53_EVM) &&
+ strcmp(name, "k3-am654-base-board") == 0)
+ return 0;
return -1;
}
diff --git a/board/ti/common/board_detect.c b/board/ti/common/board_detect.c
index 38e23cc..ea21d48 100644
--- a/board/ti/common/board_detect.c
+++ b/board/ti/common/board_detect.c
@@ -7,10 +7,9 @@
* Steve Kipisz
*/
-#include <common.h>
-#include <eeprom.h>
#include <log.h>
#include <net.h>
+#include <linux/types.h>
#include <asm/arch/hardware.h>
#include <asm/omap_common.h>
#include <dm/uclass.h>
diff --git a/board/ti/common/cape_detect.c b/board/ti/common/cape_detect.c
index 2e6105c..da805be 100644
--- a/board/ti/common/cape_detect.c
+++ b/board/ti/common/cape_detect.c
@@ -4,10 +4,11 @@
* Köry Maincent, Bootlin, <kory.maincent@bootlin.com>
*/
-#include <common.h>
+#include <stdio.h>
#include <malloc.h>
#include <i2c.h>
#include <extension_board.h>
+#include <vsprintf.h>
#include "cape_detect.h"
diff --git a/board/ti/dra7xx/evm.c b/board/ti/dra7xx/evm.c
index a8a216d..2b1db25 100644
--- a/board/ti/dra7xx/evm.c
+++ b/board/ti/dra7xx/evm.c
@@ -9,7 +9,7 @@
* Aneesh V <aneesh@ti.com>
* Steve Sakoman <steve@sakoman.com>
*/
-#include <common.h>
+#include <config.h>
#include <env.h>
#include <fdt_support.h>
#include <fastboot.h>
diff --git a/board/ti/j721e/evm.c b/board/ti/j721e/evm.c
index 9dc3ed6..539eaf4 100644
--- a/board/ti/j721e/evm.c
+++ b/board/ti/j721e/evm.c
@@ -465,10 +465,13 @@
}
if (IS_ENABLED(CONFIG_ESM_K3)) {
- ret = uclass_get_device_by_driver(UCLASS_MISC,
- DM_DRIVER_GET(k3_esm), &dev);
+ ret = uclass_get_device_by_name(UCLASS_MISC, "esm@700000", &dev);
if (ret)
- printf("ESM init failed: %d\n", ret);
+ printf("MISC init for esm@700000 failed: %d\n", ret);
+
+ ret = uclass_get_device_by_name(UCLASS_MISC, "esm@40800000", &dev);
+ if (ret)
+ printf("MISC init for esm@40800000 failed: %d\n", ret);
}
if (IS_ENABLED(CONFIG_ESM_PMIC)) {
diff --git a/board/ti/ks2_evm/board.c b/board/ti/ks2_evm/board.c
index 5dcda12..c6735d3 100644
--- a/board/ti/ks2_evm/board.c
+++ b/board/ti/ks2_evm/board.c
@@ -6,7 +6,7 @@
* Texas Instruments Incorporated, <www.ti.com>
*/
-#include <common.h>
+#include <config.h>
#include <asm/global_data.h>
#include "board.h"
#include <env.h>
diff --git a/board/ti/ks2_evm/board_k2e.c b/board/ti/ks2_evm/board_k2e.c
index 39abb24..4385be4 100644
--- a/board/ti/ks2_evm/board_k2e.c
+++ b/board/ti/ks2_evm/board_k2e.c
@@ -6,7 +6,6 @@
* Texas Instruments Incorporated, <www.ti.com>
*/
-#include <common.h>
#include <image.h>
#include <init.h>
#include <asm/arch/ddr3.h>
diff --git a/board/ti/ks2_evm/board_k2g.c b/board/ti/ks2_evm/board_k2g.c
index 5229afa..d07b77d 100644
--- a/board/ti/ks2_evm/board_k2g.c
+++ b/board/ti/ks2_evm/board_k2g.c
@@ -5,8 +5,7 @@
* (C) Copyright 2015
* Texas Instruments Incorporated, <www.ti.com>
*/
-#include <common.h>
-#include <eeprom.h>
+#include <config.h>
#include <env.h>
#include <hang.h>
#include <image.h>
diff --git a/board/ti/ks2_evm/board_k2hk.c b/board/ti/ks2_evm/board_k2hk.c
index 12c4649..2b5d2d7 100644
--- a/board/ti/ks2_evm/board_k2hk.c
+++ b/board/ti/ks2_evm/board_k2hk.c
@@ -6,7 +6,6 @@
* Texas Instruments Incorporated, <www.ti.com>
*/
-#include <common.h>
#include <image.h>
#include <init.h>
#include <asm/arch/clock.h>
diff --git a/board/ti/ks2_evm/board_k2l.c b/board/ti/ks2_evm/board_k2l.c
index f759ee3..1971bc9 100644
--- a/board/ti/ks2_evm/board_k2l.c
+++ b/board/ti/ks2_evm/board_k2l.c
@@ -6,7 +6,6 @@
* Texas Instruments Incorporated, <www.ti.com>
*/
-#include <common.h>
#include <image.h>
#include <init.h>
#include <asm/arch/ddr3.h>
diff --git a/board/ti/ks2_evm/ddr3_cfg.c b/board/ti/ks2_evm/ddr3_cfg.c
index 0ade752..fe350fe 100644
--- a/board/ti/ks2_evm/ddr3_cfg.c
+++ b/board/ti/ks2_evm/ddr3_cfg.c
@@ -6,7 +6,6 @@
* Texas Instruments Incorporated, <www.ti.com>
*/
-#include <common.h>
#include <asm/arch/ddr3.h>
#include "ddr3_cfg.h"
diff --git a/board/ti/ks2_evm/ddr3_k2e.c b/board/ti/ks2_evm/ddr3_k2e.c
index 95fe3a9..2830532 100644
--- a/board/ti/ks2_evm/ddr3_k2e.c
+++ b/board/ti/ks2_evm/ddr3_k2e.c
@@ -6,7 +6,6 @@
* Texas Instruments Incorporated, <www.ti.com>
*/
-#include <common.h>
#include "ddr3_cfg.h"
#include <asm/arch/ddr3.h>
diff --git a/board/ti/ks2_evm/ddr3_k2g.c b/board/ti/ks2_evm/ddr3_k2g.c
index 3000d724..ef39e07 100644
--- a/board/ti/ks2_evm/ddr3_k2g.c
+++ b/board/ti/ks2_evm/ddr3_k2g.c
@@ -6,7 +6,6 @@
* Texas Instruments Incorporated, <www.ti.com>
*/
-#include <common.h>
#include "ddr3_cfg.h"
#include <asm/arch/ddr3.h>
#include <asm/arch/hardware.h>
diff --git a/board/ti/ks2_evm/ddr3_k2hk.c b/board/ti/ks2_evm/ddr3_k2hk.c
index 198c5da..05c050c 100644
--- a/board/ti/ks2_evm/ddr3_k2hk.c
+++ b/board/ti/ks2_evm/ddr3_k2hk.c
@@ -6,7 +6,6 @@
* Texas Instruments Incorporated, <www.ti.com>
*/
-#include <common.h>
#include "ddr3_cfg.h"
#include <asm/arch/ddr3.h>
#include <asm/arch/hardware.h>
diff --git a/board/ti/ks2_evm/ddr3_k2l.c b/board/ti/ks2_evm/ddr3_k2l.c
index 805bf81..aa6d45f 100644
--- a/board/ti/ks2_evm/ddr3_k2l.c
+++ b/board/ti/ks2_evm/ddr3_k2l.c
@@ -6,7 +6,6 @@
* Texas Instruments Incorporated, <www.ti.com>
*/
-#include <common.h>
#include "ddr3_cfg.h"
#include <asm/arch/ddr3.h>
diff --git a/board/ti/omap3evm/evm.c b/board/ti/omap3evm/evm.c
index a4d6a01..4eb08ad 100644
--- a/board/ti/omap3evm/evm.c
+++ b/board/ti/omap3evm/evm.c
@@ -10,7 +10,7 @@
* Richard Woodruff <r-woodruff2@ti.com>
* Syed Mohammed Khasim <khasim@ti.com>
*/
-#include <common.h>
+#include <config.h>
#include <dm.h>
#include <env.h>
#include <init.h>
diff --git a/board/ti/panda/panda.c b/board/ti/panda/panda.c
index 2209318..e47d3a9 100644
--- a/board/ti/panda/panda.c
+++ b/board/ti/panda/panda.c
@@ -4,7 +4,6 @@
* Texas Instruments Incorporated, <www.ti.com>
* Steve Sakoman <steve@sakoman.com>
*/
-#include <common.h>
#include <init.h>
#include <log.h>
#include <net.h>
diff --git a/board/ti/sdp4430/cmd_bat.c b/board/ti/sdp4430/cmd_bat.c
index 6c1e6ca..6bf44d9 100644
--- a/board/ti/sdp4430/cmd_bat.c
+++ b/board/ti/sdp4430/cmd_bat.c
@@ -3,7 +3,6 @@
* Copyright (C) 2010 Texas Instruments
*/
-#include <common.h>
#include <command.h>
#ifdef CONFIG_CMD_BAT
diff --git a/board/ti/sdp4430/sdp.c b/board/ti/sdp4430/sdp.c
index 2c9ae79..1a71390 100644
--- a/board/ti/sdp4430/sdp.c
+++ b/board/ti/sdp4430/sdp.c
@@ -5,7 +5,6 @@
* Aneesh V <aneesh@ti.com>
* Steve Sakoman <steve@sakoman.com>
*/
-#include <common.h>
#include <init.h>
#include <net.h>
#include <twl6030.h>
diff --git a/board/timll/devkit3250/devkit3250.c b/board/timll/devkit3250/devkit3250.c
index efef855..f0c0f03 100644
--- a/board/timll/devkit3250/devkit3250.c
+++ b/board/timll/devkit3250/devkit3250.c
@@ -5,7 +5,7 @@
* Copyright (C) 2011-2015 Vladimir Zapolskiy <vz@mleia.com>
*/
-#include <common.h>
+#include <config.h>
#include <init.h>
#include <asm/arch/sys_proto.h>
#include <asm/arch/clk.h>
diff --git a/board/timll/devkit3250/devkit3250_spl.c b/board/timll/devkit3250/devkit3250_spl.c
index 12e8ae9..07a367c 100644
--- a/board/timll/devkit3250/devkit3250_spl.c
+++ b/board/timll/devkit3250/devkit3250_spl.c
@@ -5,7 +5,6 @@
* (C) Copyright 2015 Vladimir Zapolskiy <vz@mleia.com>
*/
-#include <common.h>
#include <asm/io.h>
#include <asm/arch/sys_proto.h>
#include <asm/arch/cpu.h>
diff --git a/board/timll/devkit8000/devkit8000.c b/board/timll/devkit8000/devkit8000.c
index 06009d8..ad404f7 100644
--- a/board/timll/devkit8000/devkit8000.c
+++ b/board/timll/devkit8000/devkit8000.c
@@ -15,7 +15,7 @@
* Syed Mohammed Khasim <khasim@ti.com>
*
*/
-#include <common.h>
+#include <config.h>
#include <dm.h>
#include <env.h>
#include <init.h>
diff --git a/board/toradex/apalis-imx8/apalis-imx8.c b/board/toradex/apalis-imx8/apalis-imx8.c
index 0f993e6..72d67d9 100644
--- a/board/toradex/apalis-imx8/apalis-imx8.c
+++ b/board/toradex/apalis-imx8/apalis-imx8.c
@@ -3,7 +3,6 @@
* Copyright 2019 Toradex
*/
-#include <common.h>
#include <cpu_func.h>
#include <init.h>
#include <asm/global_data.h>
diff --git a/board/toradex/apalis-tk1/apalis-tk1.c b/board/toradex/apalis-tk1/apalis-tk1.c
index ee87d9f..4557ed1 100644
--- a/board/toradex/apalis-tk1/apalis-tk1.c
+++ b/board/toradex/apalis-tk1/apalis-tk1.c
@@ -3,7 +3,6 @@
* Copyright (c) 2016-2018 Toradex, Inc.
*/
-#include <common.h>
#include <dm.h>
#include <env.h>
#include <init.h>
diff --git a/board/toradex/apalis-tk1/as3722_init.c b/board/toradex/apalis-tk1/as3722_init.c
index e9bd102..8971f7a 100644
--- a/board/toradex/apalis-tk1/as3722_init.c
+++ b/board/toradex/apalis-tk1/as3722_init.c
@@ -3,7 +3,6 @@
* Copyright (c) 2012-2016 Toradex, Inc.
*/
-#include <common.h>
#include <log.h>
#include <asm/io.h>
#include <asm/arch-tegra/tegra_i2c.h>
diff --git a/board/toradex/apalis_imx6/apalis_imx6.c b/board/toradex/apalis_imx6/apalis_imx6.c
index 0da2453..2dcc042 100644
--- a/board/toradex/apalis_imx6/apalis_imx6.c
+++ b/board/toradex/apalis_imx6/apalis_imx6.c
@@ -6,7 +6,7 @@
* copied from nitrogen6x
*/
-#include <common.h>
+#include <config.h>
#include <cpu_func.h>
#include <dm.h>
#include <image.h>
diff --git a/board/toradex/apalis_imx6/do_fuse.c b/board/toradex/apalis_imx6/do_fuse.c
index 6991b1b..b404b01 100644
--- a/board/toradex/apalis_imx6/do_fuse.c
+++ b/board/toradex/apalis_imx6/do_fuse.c
@@ -7,7 +7,6 @@
* Helpers for i.MX OTP fusing during module production
*/
-#include <common.h>
#ifndef CONFIG_SPL_BUILD
#include <command.h>
#include <console.h>
diff --git a/board/toradex/apalis_imx6/pf0100.c b/board/toradex/apalis_imx6/pf0100.c
index c89052f..157aaec 100644
--- a/board/toradex/apalis_imx6/pf0100.c
+++ b/board/toradex/apalis_imx6/pf0100.c
@@ -7,7 +7,6 @@
* Helpers for Freescale PMIC PF0100
*/
-#include <common.h>
#include <command.h>
#include <i2c.h>
#include <asm/arch/imx-regs.h>
diff --git a/board/toradex/apalis_t30/apalis_t30-spl.c b/board/toradex/apalis_t30/apalis_t30-spl.c
index 6e54464..2504945 100644
--- a/board/toradex/apalis_t30/apalis_t30-spl.c
+++ b/board/toradex/apalis_t30/apalis_t30-spl.c
@@ -7,7 +7,6 @@
* Svyatoslav Ryhel <clamor95@gmail.com>
*/
-#include <common.h>
#include <asm/arch-tegra/tegra_i2c.h>
#include <linux/delay.h>
diff --git a/board/toradex/apalis_t30/apalis_t30.c b/board/toradex/apalis_t30/apalis_t30.c
index b10beb4..02e8f8e 100644
--- a/board/toradex/apalis_t30/apalis_t30.c
+++ b/board/toradex/apalis_t30/apalis_t30.c
@@ -4,7 +4,6 @@
* Marcel Ziswiler <marcel@ziswiler.com>
*/
-#include <common.h>
#include <env.h>
#include <init.h>
#include <log.h>
diff --git a/board/toradex/colibri-imx6ull/colibri-imx6ull.c b/board/toradex/colibri-imx6ull/colibri-imx6ull.c
index 9b9fb34..7bfe200 100644
--- a/board/toradex/colibri-imx6ull/colibri-imx6ull.c
+++ b/board/toradex/colibri-imx6ull/colibri-imx6ull.c
@@ -2,7 +2,7 @@
/*
* Copyright (C) 2018-2019 Toradex AG
*/
-#include <common.h>
+#include <config.h>
#include <init.h>
#include <asm/global_data.h>
#include <linux/delay.h>
diff --git a/board/toradex/colibri-imx8x/colibri-imx8x.c b/board/toradex/colibri-imx8x/colibri-imx8x.c
index 3565785..2a71e7b 100644
--- a/board/toradex/colibri-imx8x/colibri-imx8x.c
+++ b/board/toradex/colibri-imx8x/colibri-imx8x.c
@@ -3,7 +3,6 @@
* Copyright 2019 Toradex
*/
-#include <common.h>
#include <cpu_func.h>
#include <init.h>
#include <asm/global_data.h>
diff --git a/board/toradex/colibri_imx6/colibri_imx6.c b/board/toradex/colibri_imx6/colibri_imx6.c
index ce19a9c..34e82c2 100644
--- a/board/toradex/colibri_imx6/colibri_imx6.c
+++ b/board/toradex/colibri_imx6/colibri_imx6.c
@@ -6,7 +6,7 @@
* copied from nitrogen6x
*/
-#include <common.h>
+#include <config.h>
#include <cpu_func.h>
#include <dm.h>
#include <env.h>
diff --git a/board/toradex/colibri_imx6/do_fuse.c b/board/toradex/colibri_imx6/do_fuse.c
index 6991b1b..b404b01 100644
--- a/board/toradex/colibri_imx6/do_fuse.c
+++ b/board/toradex/colibri_imx6/do_fuse.c
@@ -7,7 +7,6 @@
* Helpers for i.MX OTP fusing during module production
*/
-#include <common.h>
#ifndef CONFIG_SPL_BUILD
#include <command.h>
#include <console.h>
diff --git a/board/toradex/colibri_imx6/pf0100.c b/board/toradex/colibri_imx6/pf0100.c
index 8f08d8c..58b7bc3 100644
--- a/board/toradex/colibri_imx6/pf0100.c
+++ b/board/toradex/colibri_imx6/pf0100.c
@@ -7,7 +7,6 @@
* Helpers for Freescale PMIC PF0100
*/
-#include <common.h>
#include <command.h>
#include <i2c.h>
#include <asm/arch/imx-regs.h>
diff --git a/board/toradex/colibri_imx7/colibri_imx7.c b/board/toradex/colibri_imx7/colibri_imx7.c
index c37c5e0..e966ffb 100644
--- a/board/toradex/colibri_imx7/colibri_imx7.c
+++ b/board/toradex/colibri_imx7/colibri_imx7.c
@@ -3,7 +3,6 @@
* Copyright (C) 2016-2018 Toradex AG
*/
-#include <common.h>
#include <cpu_func.h>
#include <init.h>
#include <net.h>
diff --git a/board/toradex/colibri_t20/colibri_t20.c b/board/toradex/colibri_t20/colibri_t20.c
index 97e33d0..6425fa8 100644
--- a/board/toradex/colibri_t20/colibri_t20.c
+++ b/board/toradex/colibri_t20/colibri_t20.c
@@ -3,7 +3,6 @@
* Copyright (C) 2012 Lucas Stach
*/
-#include <common.h>
#include <env.h>
#include <fdt_support.h>
#include <init.h>
diff --git a/board/toradex/colibri_t30/colibri_t30-spl.c b/board/toradex/colibri_t30/colibri_t30-spl.c
index 6e54464..2504945 100644
--- a/board/toradex/colibri_t30/colibri_t30-spl.c
+++ b/board/toradex/colibri_t30/colibri_t30-spl.c
@@ -7,7 +7,6 @@
* Svyatoslav Ryhel <clamor95@gmail.com>
*/
-#include <common.h>
#include <asm/arch-tegra/tegra_i2c.h>
#include <linux/delay.h>
diff --git a/board/toradex/colibri_t30/colibri_t30.c b/board/toradex/colibri_t30/colibri_t30.c
index 0da247d..342673a 100644
--- a/board/toradex/colibri_t30/colibri_t30.c
+++ b/board/toradex/colibri_t30/colibri_t30.c
@@ -4,7 +4,6 @@
* Stefan Agner <stefan@agner.ch>
*/
-#include <common.h>
#include <env.h>
#include <init.h>
#include <asm/arch/gp_padctrl.h>
diff --git a/board/toradex/colibri_vf/colibri_vf.c b/board/toradex/colibri_vf/colibri_vf.c
index 3592000..87f8239 100644
--- a/board/toradex/colibri_vf/colibri_vf.c
+++ b/board/toradex/colibri_vf/colibri_vf.c
@@ -6,7 +6,6 @@
* Copyright 2013 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <init.h>
#include <asm/global_data.h>
diff --git a/board/toradex/common/tdx-cfg-block.c b/board/toradex/common/tdx-cfg-block.c
index dcf00d2..2225cef 100644
--- a/board/toradex/common/tdx-cfg-block.c
+++ b/board/toradex/common/tdx-cfg-block.c
@@ -3,7 +3,7 @@
* Copyright (c) 2016-2020 Toradex
*/
-#include <common.h>
+#include <config.h>
#include <asm/global_data.h>
#include "tdx-cfg-block.h"
#include "tdx-eeprom.h"
diff --git a/board/toradex/common/tdx-common.c b/board/toradex/common/tdx-common.c
index 9f09788..a6b45cd 100644
--- a/board/toradex/common/tdx-common.c
+++ b/board/toradex/common/tdx-common.c
@@ -4,7 +4,7 @@
*/
#include <dm.h>
-#include <common.h>
+#include <config.h>
#include <env.h>
#include <g_dnl.h>
#include <init.h>
diff --git a/board/toradex/verdin-am62/MAINTAINERS b/board/toradex/verdin-am62/MAINTAINERS
index 4e75980..3e30d1d 100644
--- a/board/toradex/verdin-am62/MAINTAINERS
+++ b/board/toradex/verdin-am62/MAINTAINERS
@@ -1,12 +1,8 @@
Verdin AM62
F: arch/arm/dts/k3-am625-verdin-lpddr4-1600MTs.dtsi
F: arch/arm/dts/k3-am625-verdin-r5.dts
-F: arch/arm/dts/k3-am625-verdin-wifi-dev.dts
F: arch/arm/dts/k3-am625-verdin-wifi-dev-binman.dtsi
F: arch/arm/dts/k3-am625-verdin-wifi-dev-u-boot.dtsi
-F: arch/arm/dts/k3-am62-verdin-dev.dtsi
-F: arch/arm/dts/k3-am62-verdin.dtsi
-F: arch/arm/dts/k3-am62-verdin-wifi.dtsi
F: board/toradex/verdin-am62/
F: configs/verdin-am62_a53_defconfig
F: configs/verdin-am62_r5_defconfig
diff --git a/board/toradex/verdin-imx8mm/MAINTAINERS b/board/toradex/verdin-imx8mm/MAINTAINERS
index 8217bbc..d567f0e 100644
--- a/board/toradex/verdin-imx8mm/MAINTAINERS
+++ b/board/toradex/verdin-imx8mm/MAINTAINERS
@@ -2,10 +2,6 @@
M: Marcel Ziswiler <marcel.ziswiler@toradex.com>
W: https://www.toradex.com/computer-on-modules/verdin-arm-family/nxp-imx-8m-mini
S: Maintained
-F: arch/arm/dts/imx8mm-verdin.dtsi
-F: arch/arm/dts/imx8mm-verdin-dev.dtsi
-F: arch/arm/dts/imx8mm-verdin-wifi.dtsi
-F: arch/arm/dts/imx8mm-verdin-wifi-dev.dts
F: arch/arm/dts/imx8mm-verdin-wifi-dev-u-boot.dtsi
F: board/toradex/verdin-imx8mm/
F: board/toradex/common/
diff --git a/board/toradex/verdin-imx8mm/spl.c b/board/toradex/verdin-imx8mm/spl.c
index afa3686..1020078 100644
--- a/board/toradex/verdin-imx8mm/spl.c
+++ b/board/toradex/verdin-imx8mm/spl.c
@@ -3,7 +3,6 @@
* Copyright 2020 Toradex
*/
-#include <common.h>
#include <command.h>
#include <image.h>
#include <init.h>
diff --git a/board/toradex/verdin-imx8mm/verdin-imx8mm.c b/board/toradex/verdin-imx8mm/verdin-imx8mm.c
index 55c0265..020ee67 100644
--- a/board/toradex/verdin-imx8mm/verdin-imx8mm.c
+++ b/board/toradex/verdin-imx8mm/verdin-imx8mm.c
@@ -3,7 +3,7 @@
* Copyright 2020-2021 Toradex
*/
-#include <common.h>
+#include <config.h>
#include <init.h>
#include <asm/arch/clock.h>
#include <asm/arch/sys_proto.h>
diff --git a/board/toradex/verdin-imx8mp/MAINTAINERS b/board/toradex/verdin-imx8mp/MAINTAINERS
index 85d6be8..9fe76d8 100644
--- a/board/toradex/verdin-imx8mp/MAINTAINERS
+++ b/board/toradex/verdin-imx8mp/MAINTAINERS
@@ -1,8 +1,4 @@
Verdin iMX8M Plus
-F: arch/arm/dts/imx8mp-verdin.dtsi
-F: arch/arm/dts/imx8mp-verdin-dev.dtsi
-F: arch/arm/dts/imx8mp-verdin-wifi.dtsi
-F: arch/arm/dts/imx8mp-verdin-wifi-dev.dts
F: arch/arm/dts/imx8mp-verdin-wifi-dev-u-boot.dtsi
F: board/toradex/verdin-imx8mp/
F: board/toradex/common/
diff --git a/board/toradex/verdin-imx8mp/spl.c b/board/toradex/verdin-imx8mp/spl.c
index 73729a4..8628112 100644
--- a/board/toradex/verdin-imx8mp/spl.c
+++ b/board/toradex/verdin-imx8mp/spl.c
@@ -3,7 +3,6 @@
* Copyright 2022 Toradex
*/
-#include <common.h>
#include <hang.h>
#include <init.h>
#include <log.h>
diff --git a/board/toradex/verdin-imx8mp/verdin-imx8mp.c b/board/toradex/verdin-imx8mp/verdin-imx8mp.c
index e16a771..e57ec3b 100644
--- a/board/toradex/verdin-imx8mp/verdin-imx8mp.c
+++ b/board/toradex/verdin-imx8mp/verdin-imx8mp.c
@@ -3,7 +3,7 @@
* Copyright 2022 Toradex
*/
-#include <common.h>
+#include <config.h>
#include <asm/arch/clock.h>
#include <asm/arch/imx8mp_pins.h>
#include <asm/arch/sys_proto.h>
diff --git a/board/tplink/wdr4300/wdr4300.c b/board/tplink/wdr4300/wdr4300.c
index f2de039..3ae0dc4 100644
--- a/board/tplink/wdr4300/wdr4300.c
+++ b/board/tplink/wdr4300/wdr4300.c
@@ -3,7 +3,6 @@
* Copyright (C) 2016 Marek Vasut <marex@denx.de>
*/
-#include <common.h>
#include <init.h>
#include <asm/io.h>
#include <asm/addrspace.h>
diff --git a/board/tq/tqma6/tqma6.c b/board/tq/tqma6/tqma6.c
index 1c2228c..92142c1 100644
--- a/board/tq/tqma6/tqma6.c
+++ b/board/tq/tqma6/tqma6.c
@@ -21,7 +21,6 @@
#include <asm/io.h>
#include <asm/mach-imx/mxc_i2c.h>
#include <asm/mach-imx/spi.h>
-#include <common.h>
#include <fsl_esdhc_imx.h>
#include <linux/libfdt.h>
#include <i2c.h>
diff --git a/board/tq/tqma6/tqma6_mba6.c b/board/tq/tqma6/tqma6_mba6.c
index 52851dd..877539e 100644
--- a/board/tq/tqma6/tqma6_mba6.c
+++ b/board/tq/tqma6/tqma6_mba6.c
@@ -20,7 +20,6 @@
#include <asm/gpio.h>
#include <asm/mach-imx/mxc_i2c.h>
-#include <common.h>
#include <fsl_esdhc_imx.h>
#include <linux/libfdt.h>
#include <malloc.h>
diff --git a/board/tq/tqma6/tqma6_wru4.c b/board/tq/tqma6/tqma6_wru4.c
index 5d23991..21c7101 100644
--- a/board/tq/tqma6/tqma6_wru4.c
+++ b/board/tq/tqma6/tqma6_wru4.c
@@ -23,7 +23,6 @@
#include <asm/mach-imx/boot_mode.h>
#include <asm/mach-imx/mxc_i2c.h>
-#include <common.h>
#include <fsl_esdhc_imx.h>
#include <linux/libfdt.h>
#include <malloc.h>
diff --git a/board/traverse/common/ten64_controller.c b/board/traverse/common/ten64_controller.c
index d6ef8a8..63b72c4 100644
--- a/board/traverse/common/ten64_controller.c
+++ b/board/traverse/common/ten64_controller.c
@@ -5,7 +5,6 @@
*
*/
-#include <common.h>
#include <dm.h>
#include <misc.h>
#include <i2c.h>
diff --git a/board/traverse/ten64/eth_ten64.c b/board/traverse/ten64/eth_ten64.c
index 3f96e57..c5f7ace 100644
--- a/board/traverse/ten64/eth_ten64.c
+++ b/board/traverse/ten64/eth_ten64.c
@@ -3,7 +3,6 @@
* Copyright 2017 NXP
* Copyright 2019-2021 Traverse Technologies Australia
*/
-#include <common.h>
#include <command.h>
#include <netdev.h>
#include <malloc.h>
diff --git a/board/traverse/ten64/ten64.c b/board/traverse/ten64/ten64.c
index 6ff5312..d41bd2e 100644
--- a/board/traverse/ten64/ten64.c
+++ b/board/traverse/ten64/ten64.c
@@ -4,7 +4,7 @@
* Copyright 2017-2018 NXP
* Copyright 2019-2021 Traverse Technologies
*/
-#include <common.h>
+#include <config.h>
#include <display_options.h>
#include <dm/uclass.h>
#include <env.h>
diff --git a/board/turing/turing-rk1-rk3588/Makefile b/board/turing/turing-rk1-rk3588/Makefile
deleted file mode 100644
index a979d80..0000000
--- a/board/turing/turing-rk1-rk3588/Makefile
+++ /dev/null
@@ -1,6 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-#
-# Copyright (c) 2023 Rockchip Electronics Co,. Ltd.
-#
-
-obj-y += turing-rk1-rk3588.o
diff --git a/board/turing/turing-rk1-rk3588/turing-rk1-rk3588.c b/board/turing/turing-rk1-rk3588/turing-rk1-rk3588.c
deleted file mode 100644
index e2338a2..0000000
--- a/board/turing/turing-rk1-rk3588/turing-rk1-rk3588.c
+++ /dev/null
@@ -1,39 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (c) 2023 Rockchip Electronics Co,. Ltd.
- */
-
-#include <fdtdec.h>
-#include <fdt_support.h>
-
-#ifdef CONFIG_OF_BOARD_SETUP
-int turing_rk1_add_reserved_memory_fdt_nodes(void *new_blob)
-{
- struct fdt_memory gap1 = {
- .start = 0x3fc000000,
- .end = 0x3fc4fffff,
- };
- struct fdt_memory gap2 = {
- .start = 0x3fff00000,
- .end = 0x3ffffffff,
- };
- unsigned long flags = FDTDEC_RESERVED_MEMORY_NO_MAP;
- unsigned int ret;
-
- /*
- * Inject the reserved-memory nodes into the DTS
- */
- ret = fdtdec_add_reserved_memory(new_blob, "gap1", &gap1, NULL, 0,
- NULL, flags);
- if (ret)
- return ret;
-
- return fdtdec_add_reserved_memory(new_blob, "gap2", &gap2, NULL, 0,
- NULL, flags);
-}
-
-int ft_board_setup(void *blob, struct bd_info *bd)
-{
- return turing_rk1_add_reserved_memory_fdt_nodes(blob);
-}
-#endif
diff --git a/board/udoo/neo/neo.c b/board/udoo/neo/neo.c
index d99d93b..b435b72 100644
--- a/board/udoo/neo/neo.c
+++ b/board/udoo/neo/neo.c
@@ -29,7 +29,6 @@
#include <spl.h>
#include <linux/delay.h>
#include <linux/sizes.h>
-#include <common.h>
#include <i2c.h>
#include <power/pmic.h>
#include <power/pfuze3000_pmic.h>
diff --git a/board/udoo/udoo_spl.c b/board/udoo/udoo_spl.c
index 647380e..6c47753 100644
--- a/board/udoo/udoo_spl.c
+++ b/board/udoo/udoo_spl.c
@@ -6,7 +6,6 @@
* Based on board/wandboard/spl.c
*/
-#include <common.h>
#include <init.h>
#include <asm/arch/clock.h>
#include <asm/arch/imx-regs.h>
diff --git a/board/variscite/dart_6ul/spl.c b/board/variscite/dart_6ul/spl.c
index 1dff69c..6d17563 100644
--- a/board/variscite/dart_6ul/spl.c
+++ b/board/variscite/dart_6ul/spl.c
@@ -4,7 +4,7 @@
* Copyright (C) 2019 Parthiban Nallathambi <parthitce@gmail.com>
*/
-#include <common.h>
+#include <config.h>
#include <init.h>
#include <spl.h>
#include <asm/arch/clock.h>
diff --git a/board/variscite/imx8mn_var_som/imx8mn_var_som.c b/board/variscite/imx8mn_var_som/imx8mn_var_som.c
index 994fd4f..532d8d6 100644
--- a/board/variscite/imx8mn_var_som/imx8mn_var_som.c
+++ b/board/variscite/imx8mn_var_som/imx8mn_var_som.c
@@ -5,7 +5,6 @@
* Copyright 2023 DimOnOff Inc.
*/
-#include <common.h>
#include <dm.h>
#include <env.h>
#include <fdtdec.h>
diff --git a/board/variscite/imx93_var_som/spl.c b/board/variscite/imx93_var_som/spl.c
index 36e1721..8852aea 100644
--- a/board/variscite/imx93_var_som/spl.c
+++ b/board/variscite/imx93_var_som/spl.c
@@ -121,12 +121,12 @@
preloader_console_init();
- ret = imx9_probe_mu(NULL, NULL);
+ ret = imx9_probe_mu();
if (ret) {
printf("Fail to init ELE API\n");
} else {
- printf("SOC: 0x%x\n", gd->arch.soc_rev);
- printf("LC: 0x%x\n", gd->arch.lifecycle);
+ debug("SOC: 0x%x\n", gd->arch.soc_rev);
+ debug("LC: 0x%x\n", gd->arch.lifecycle);
}
power_init_board();
diff --git a/board/vscom/baltos/board.c b/board/vscom/baltos/board.c
index bc7dc58..2c91e9f 100644
--- a/board/vscom/baltos/board.c
+++ b/board/vscom/baltos/board.c
@@ -7,7 +7,7 @@
* Copyright (C) 2011, Texas Instruments, Incorporated - https://www.ti.com/
*/
-#include <common.h>
+#include <config.h>
#include <env.h>
#include <errno.h>
#include <init.h>
diff --git a/board/vscom/baltos/mux.c b/board/vscom/baltos/mux.c
index 7b99cf0..77b142f 100644
--- a/board/vscom/baltos/mux.c
+++ b/board/vscom/baltos/mux.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <common.h>
#include <asm/arch/sys_proto.h>
#include <asm/arch/hardware.h>
#include <asm/arch/mux.h>
diff --git a/board/wandboard/spl.c b/board/wandboard/spl.c
index 717e02a..9ce2785 100644
--- a/board/wandboard/spl.c
+++ b/board/wandboard/spl.c
@@ -5,7 +5,7 @@
* Richard Hu <hakahu@gmail.com>
*/
-#include <common.h>
+#include <config.h>
#include <init.h>
#include <asm/arch/clock.h>
#include <asm/arch/imx-regs.h>
diff --git a/board/wandboard/wandboard.c b/board/wandboard/wandboard.c
index 8be62c8..a48ef33 100644
--- a/board/wandboard/wandboard.c
+++ b/board/wandboard/wandboard.c
@@ -6,7 +6,6 @@
* Author: Fabio Estevam <fabio.estevam@freescale.com>
*/
-#include <common.h>
#include <image.h>
#include <init.h>
#include <log.h>
diff --git a/board/warp7/warp7.c b/board/warp7/warp7.c
index ead52d5..4cd3ff0 100644
--- a/board/warp7/warp7.c
+++ b/board/warp7/warp7.c
@@ -15,7 +15,6 @@
#include <asm/mach-imx/hab.h>
#include <asm/mach-imx/iomux-v3.h>
#include <asm/io.h>
-#include <common.h>
#include <env.h>
#include <asm/arch/crm_regs.h>
#include <netdev.h>
diff --git a/board/work-microwave/work_92105/work_92105.c b/board/work-microwave/work_92105/work_92105.c
index c8e791a..9a23688 100644
--- a/board/work-microwave/work_92105/work_92105.c
+++ b/board/work-microwave/work_92105/work_92105.c
@@ -6,7 +6,7 @@
* Written-by: Albert ARIBAUD <albert.aribaud@3adev.fr>
*/
-#include <common.h>
+#include <config.h>
#include <init.h>
#include <asm/global_data.h>
#include <asm/io.h>
diff --git a/board/work-microwave/work_92105/work_92105_display.c b/board/work-microwave/work_92105/work_92105_display.c
index 64dd5d4..d4ab229 100644
--- a/board/work-microwave/work_92105/work_92105_display.c
+++ b/board/work-microwave/work_92105/work_92105_display.c
@@ -10,7 +10,6 @@
* MAX518 I2C DACs and native LPC32xx GPO 15.
*/
-#include <common.h>
#include <command.h>
#include <log.h>
#include <asm/arch/sys_proto.h>
diff --git a/board/work-microwave/work_92105/work_92105_spl.c b/board/work-microwave/work_92105/work_92105_spl.c
index d940114..3f91221 100644
--- a/board/work-microwave/work_92105/work_92105_spl.c
+++ b/board/work-microwave/work_92105/work_92105_spl.c
@@ -6,7 +6,6 @@
* Written-by: Albert ARIBAUD <albert.aribaud@3adev.fr>
*/
-#include <common.h>
#include <asm/io.h>
#include <asm/arch/sys_proto.h>
#include <asm/arch/cpu.h>
diff --git a/board/xen/xenguest_arm64/xenguest_arm64.c b/board/xen/xenguest_arm64/xenguest_arm64.c
index 1d2946f..4c3b9c9 100644
--- a/board/xen/xenguest_arm64/xenguest_arm64.c
+++ b/board/xen/xenguest_arm64/xenguest_arm64.c
@@ -7,7 +7,6 @@
* (C) 2020 EPAM Systems Inc
*/
-#include <common.h>
#include <log.h>
#include <cpu_func.h>
#include <dm.h>
diff --git a/board/xilinx/Kconfig b/board/xilinx/Kconfig
index 843198f..5c4ad8f 100644
--- a/board/xilinx/Kconfig
+++ b/board/xilinx/Kconfig
@@ -45,6 +45,7 @@
default 0x1000 if ARCH_VERSAL || ARCH_VERSAL_NET
default 0x8000 if MICROBLAZE
default 0x100000 if ARCH_ZYNQ || ARCH_ZYNQMP
+ default 0x23000000 if TARGET_XILINX_MBV
depends on OF_BOARD || OF_SEPARATE
help
Offset in the memory where the board configuration DTB is placed.
diff --git a/board/xilinx/common/board.c b/board/xilinx/common/board.c
index 9641ed3..30a8137 100644
--- a/board/xilinx/common/board.c
+++ b/board/xilinx/common/board.c
@@ -6,12 +6,12 @@
* Michal Simek <michal.simek@amd.com>
*/
-#include <common.h>
#include <efi.h>
#include <efi_loader.h>
#include <env.h>
#include <image.h>
#include <init.h>
+#include <jffs2/load_kernel.h>
#include <lmb.h>
#include <log.h>
#include <asm/global_data.h>
@@ -20,6 +20,7 @@
#include <i2c.h>
#include <linux/sizes.h>
#include <malloc.h>
+#include <mtd_node.h>
#include "board.h"
#include <dm.h>
#include <i2c_eeprom.h>
@@ -43,7 +44,7 @@
.image_index = 1,
},
#endif
-#if defined(XILINX_UBOOT_IMAGE_GUID)
+#if defined(XILINX_UBOOT_IMAGE_GUID) && defined(CONFIG_SPL_FS_LOAD_PAYLOAD_NAME)
{
.image_type_id = XILINX_UBOOT_IMAGE_GUID,
.fw_name = u"XILINX-UBOOT",
@@ -103,10 +104,14 @@
for (i = 0; i < size; i++) {
byte = eeprom[i];
- /* Remove all non printable chars but ignore MAC address */
- if ((i < offsetof(struct xilinx_legacy_format, eth_mac) ||
- i >= offsetof(struct xilinx_legacy_format, unused1)) &&
- (byte < '!' || byte > '~')) {
+ /* Ignore MAC address */
+ if (i >= offsetof(struct xilinx_legacy_format, eth_mac) &&
+ i < offsetof(struct xilinx_legacy_format, unused1)) {
+ continue;
+ }
+
+ /* Remove all non printable chars */
+ if (byte < '!' || byte > '~') {
eeprom[i] = 0;
continue;
}
@@ -358,6 +363,14 @@
void *fdt_blob;
*err = 0;
+
+ if (IS_ENABLED(CONFIG_TARGET_XILINX_MBV)) {
+ fdt_blob = (void *)CONFIG_XILINX_OF_BOARD_DTB_ADDR;
+
+ if (fdt_magic(fdt_blob) == FDT_MAGIC)
+ return fdt_blob;
+ }
+
if (!IS_ENABLED(CONFIG_SPL_BUILD) &&
!IS_ENABLED(CONFIG_VERSAL_NO_DDR) &&
!IS_ENABLED(CONFIG_ZYNQMP_NO_DDR)) {
@@ -693,6 +706,13 @@
u8 buf[MAX_RAND_SIZE];
int nodeoffset, ret;
+ static const struct node_info nodes[] = {
+ { "arm,pl353-nand-r2p1", MTD_DEV_TYPE_NAND, },
+ };
+
+ if (IS_ENABLED(CONFIG_FDT_FIXUP_PARTITIONS) && IS_ENABLED(CONFIG_NAND_ZYNQ))
+ fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes));
+
if (uclass_get_device(UCLASS_RNG, 0, &dev) || !dev) {
debug("No RNG device\n");
return 0;
diff --git a/board/xilinx/common/cpu-info.c b/board/xilinx/common/cpu-info.c
index bfe7f5b..765bb24 100644
--- a/board/xilinx/common/cpu-info.c
+++ b/board/xilinx/common/cpu-info.c
@@ -4,7 +4,6 @@
* Michal Simek <michal.simek@amd.com>
*/
-#include <common.h>
#include <init.h>
#include <soc.h>
diff --git a/board/xilinx/common/fru.c b/board/xilinx/common/fru.c
index 12b2131..8cf307e 100644
--- a/board/xilinx/common/fru.c
+++ b/board/xilinx/common/fru.c
@@ -3,7 +3,6 @@
* (C) Copyright 2019 - 2020 Xilinx, Inc.
*/
-#include <common.h>
#include <command.h>
#include <fdtdec.h>
#include <malloc.h>
diff --git a/board/xilinx/common/fru_ops.c b/board/xilinx/common/fru_ops.c
index 167252c..610293b 100644
--- a/board/xilinx/common/fru_ops.c
+++ b/board/xilinx/common/fru_ops.c
@@ -4,13 +4,13 @@
* (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc.
*/
-#include <common.h>
#include <cpu_func.h>
#include <env.h>
#include <fdtdec.h>
#include <log.h>
#include <malloc.h>
#include <net.h>
+#include <linux/errno.h>
#include <asm/io.h>
#include <asm/arch/hardware.h>
diff --git a/board/xilinx/mbv/Kconfig b/board/xilinx/mbv/Kconfig
index d2dec39..a3a6f21 100644
--- a/board/xilinx/mbv/Kconfig
+++ b/board/xilinx/mbv/Kconfig
@@ -10,15 +10,25 @@
default "generic"
config TEXT_BASE
- default 0x80000000 if !RISCV_SMODE
- default 0x80400000 if RISCV_SMODE && ARCH_RV32I
+ default 0x21200000
+
+config SPL_TEXT_BASE
+ default 0x20000000
+
+config SPL_OPENSBI_LOAD_ADDR
+ hex
+ default 0x20200000
config BOARD_SPECIFIC_OPTIONS
def_bool y
select GENERIC_RISCV
+ select SUPPORT_SPL
imply BOARD_LATE_INIT
+ imply SPL_RAM_SUPPORT
+ imply SPL_RAM_DEVICE
imply CMD_SBI
imply CMD_PING
+ imply OF_HAS_PRIOR_STAGE
source "board/xilinx/Kconfig"
diff --git a/board/xilinx/mbv/board.c b/board/xilinx/mbv/board.c
index ccf4395..c478f7e 100644
--- a/board/xilinx/mbv/board.c
+++ b/board/xilinx/mbv/board.c
@@ -5,7 +5,17 @@
* Michal Simek <michal.simek@amd.com>
*/
+#include <spl.h>
+
int board_init(void)
{
return 0;
}
+
+#ifdef CONFIG_SPL
+u32 spl_boot_device(void)
+{
+ /* RISC-V QEMU only supports RAM as SPL boot device */
+ return BOOT_DEVICE_RAM;
+}
+#endif
diff --git a/board/xilinx/versal-net/board.c b/board/xilinx/versal-net/board.c
index 990ca16..88e10fa 100644
--- a/board/xilinx/versal-net/board.c
+++ b/board/xilinx/versal-net/board.c
@@ -6,7 +6,6 @@
* Michal Simek <michal.simek@amd.com>
*/
-#include <common.h>
#include <cpu_func.h>
#include <fdtdec.h>
#include <init.h>
@@ -371,3 +370,35 @@
void reset_cpu(void)
{
}
+
+#if defined(CONFIG_ENV_IS_NOWHERE)
+enum env_location env_get_location(enum env_operation op, int prio)
+{
+ u8 bootmode = versal_net_get_bootmode();
+
+ if (prio)
+ return ENVL_UNKNOWN;
+
+ switch (bootmode) {
+ case EMMC_MODE:
+ case SD_MODE:
+ case SD1_LSHFT_MODE:
+ case SD_MODE1:
+ if (IS_ENABLED(CONFIG_ENV_IS_IN_FAT))
+ return ENVL_FAT;
+ if (IS_ENABLED(CONFIG_ENV_IS_IN_EXT4))
+ return ENVL_EXT4;
+ return ENVL_NOWHERE;
+ case OSPI_MODE:
+ case QSPI_MODE_24BIT:
+ case QSPI_MODE_32BIT:
+ if (IS_ENABLED(CONFIG_ENV_IS_IN_SPI_FLASH))
+ return ENVL_SPI_FLASH;
+ return ENVL_NOWHERE;
+ case JTAG_MODE:
+ case SELECTMAP_MODE:
+ default:
+ return ENVL_NOWHERE;
+ }
+}
+#endif
diff --git a/board/xilinx/versal-net/cmds.c b/board/xilinx/versal-net/cmds.c
index b18a71f..4d52084 100644
--- a/board/xilinx/versal-net/cmds.c
+++ b/board/xilinx/versal-net/cmds.c
@@ -7,10 +7,10 @@
#include <cpu_func.h>
#include <command.h>
-#include <common.h>
#include <log.h>
#include <memalign.h>
#include <versalpl.h>
+#include <vsprintf.h>
#include <zynqmp_firmware.h>
/**
diff --git a/board/xilinx/versal/board.c b/board/xilinx/versal/board.c
index 8c2e614..77ba783 100644
--- a/board/xilinx/versal/board.c
+++ b/board/xilinx/versal/board.c
@@ -5,7 +5,6 @@
*/
#include <command.h>
-#include <common.h>
#include <cpu_func.h>
#include <env.h>
#include <fdtdec.h>
@@ -291,6 +290,7 @@
{
}
+#if defined(CONFIG_ENV_IS_NOWHERE)
enum env_location env_get_location(enum env_operation op, int prio)
{
u32 bootmode = versal_get_bootmode();
@@ -320,3 +320,4 @@
return ENVL_NOWHERE;
}
}
+#endif
diff --git a/board/xilinx/versal/cmds.c b/board/xilinx/versal/cmds.c
index 2a74e49..c787935 100644
--- a/board/xilinx/versal/cmds.c
+++ b/board/xilinx/versal/cmds.c
@@ -6,10 +6,10 @@
#include <cpu_func.h>
#include <command.h>
-#include <common.h>
#include <log.h>
#include <memalign.h>
#include <versalpl.h>
+#include <vsprintf.h>
#include <zynqmp_firmware.h>
static int do_versal_load_pdi(struct cmd_tbl *cmdtp, int flag, int argc,
diff --git a/board/xilinx/zynq/board.c b/board/xilinx/zynq/board.c
index 6c36591..b9a9111 100644
--- a/board/xilinx/zynq/board.c
+++ b/board/xilinx/zynq/board.c
@@ -4,7 +4,7 @@
* (C) Copyright 2013 - 2018 Xilinx, Inc.
*/
-#include <common.h>
+#include <config.h>
#include <debug_uart.h>
#include <dfu.h>
#include <init.h>
diff --git a/board/xilinx/zynq/bootimg.c b/board/xilinx/zynq/bootimg.c
index 2f55078..79bec3a 100644
--- a/board/xilinx/zynq/bootimg.c
+++ b/board/xilinx/zynq/bootimg.c
@@ -3,7 +3,6 @@
* Copyright (C) 2018 Xilinx, Inc.
*/
-#include <common.h>
#include <log.h>
#include <part.h>
#include <asm/global_data.h>
diff --git a/board/xilinx/zynq/cmds.c b/board/xilinx/zynq/cmds.c
index d7c7b2f..05ecb75 100644
--- a/board/xilinx/zynq/cmds.c
+++ b/board/xilinx/zynq/cmds.c
@@ -3,7 +3,6 @@
* Copyright (C) 2018 Xilinx, Inc.
*/
-#include <common.h>
#include <command.h>
#include <log.h>
#include <asm/global_data.h>
diff --git a/board/xilinx/zynqmp/cmds.c b/board/xilinx/zynqmp/cmds.c
index 9524688..bf39c54 100644
--- a/board/xilinx/zynqmp/cmds.c
+++ b/board/xilinx/zynqmp/cmds.c
@@ -4,13 +4,14 @@
* Siva Durga Prasad Paladugu <siva.durga.prasad.paladugu@amd.com>>
*/
-#include <common.h>
#include <command.h>
#include <cpu_func.h>
#include <env.h>
#include <malloc.h>
#include <memalign.h>
+#include <vsprintf.h>
#include <zynqmp_firmware.h>
+#include <linux/errno.h>
#include <asm/arch/hardware.h>
#include <asm/arch/sys_proto.h>
#include <asm/io.h>
diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c
index ba49eb7..c4050af 100644
--- a/board/xilinx/zynqmp/zynqmp.c
+++ b/board/xilinx/zynqmp/zynqmp.c
@@ -4,7 +4,7 @@
* Michal Simek <michal.simek@amd.com>
*/
-#include <common.h>
+#include <config.h>
#include <command.h>
#include <cpu_func.h>
#include <debug_uart.h>
@@ -588,6 +588,7 @@
return bootseq;
}
+#if defined(CONFIG_ENV_IS_NOWHERE)
enum env_location env_get_location(enum env_operation op, int prio)
{
u32 bootmode = zynqmp_get_bootmode();
@@ -621,11 +622,37 @@
return ENVL_NOWHERE;
}
}
+#endif
#if defined(CONFIG_SET_DFU_ALT_INFO)
#define DFU_ALT_BUF_LEN SZ_1K
+static void mtd_found_part(u32 *base, u32 *size)
+{
+ struct mtd_info *part, *mtd;
+
+ mtd_probe_devices();
+
+ mtd = get_mtd_device_nm("nor0");
+ if (!IS_ERR_OR_NULL(mtd)) {
+ list_for_each_entry(part, &mtd->partitions, node) {
+ debug("0x%012llx-0x%012llx : \"%s\"\n",
+ part->offset, part->offset + part->size,
+ part->name);
+
+ if (*base >= part->offset &&
+ *base < part->offset + part->size) {
+ debug("Found my partition: %d/%s\n",
+ part->index, part->name);
+ *base = part->offset;
+ *size = part->size;
+ break;
+ }
+ }
+ }
+}
+
void set_dfu_alt_info(char *interface, char *devstr)
{
int multiboot, bootseq = 0, len = 0;
@@ -661,21 +688,38 @@
len += snprintf(buf + len, DFU_ALT_BUF_LEN, ".bin fat %d 1",
bootseq);
#if defined(CONFIG_SPL_FS_LOAD_PAYLOAD_NAME)
- len += snprintf(buf + len, DFU_ALT_BUF_LEN, ";%s fat %d 1",
- CONFIG_SPL_FS_LOAD_PAYLOAD_NAME, bootseq);
+ if (strlen(CONFIG_SPL_FS_LOAD_PAYLOAD_NAME))
+ len += snprintf(buf + len, DFU_ALT_BUF_LEN,
+ ";%s fat %d 1",
+ CONFIG_SPL_FS_LOAD_PAYLOAD_NAME,
+ bootseq);
#endif
break;
case QSPI_MODE_24BIT:
case QSPI_MODE_32BIT:
- len += snprintf(buf + len, DFU_ALT_BUF_LEN,
- "sf 0:0=boot.bin raw %x 0x1500000",
- multiboot * SZ_32K);
-#if defined(CONFIG_SPL_FS_LOAD_PAYLOAD_NAME) && defined(CONFIG_SYS_SPI_U_BOOT_OFFS)
- len += snprintf(buf + len, DFU_ALT_BUF_LEN,
- ";%s raw 0x%x 0x500000",
- CONFIG_SPL_FS_LOAD_PAYLOAD_NAME,
- multiboot * SZ_32K + CONFIG_SYS_SPI_U_BOOT_OFFS);
+ {
+ u32 base = multiboot * SZ_32K;
+ u32 size = 0x1500000;
+ u32 limit = size;
+
+ mtd_found_part(&base, &limit);
+
+#if defined(CONFIG_SYS_SPI_U_BOOT_OFFS)
+ size = limit;
+ limit = CONFIG_SYS_SPI_U_BOOT_OFFS;
#endif
+
+ len += snprintf(buf + len, DFU_ALT_BUF_LEN,
+ "sf 0:0=boot.bin raw 0x%x 0x%x",
+ base, limit);
+#if defined(CONFIG_SPL_FS_LOAD_PAYLOAD_NAME) && defined(CONFIG_SYS_SPI_U_BOOT_OFFS)
+ if (strlen(CONFIG_SPL_FS_LOAD_PAYLOAD_NAME))
+ len += snprintf(buf + len, DFU_ALT_BUF_LEN,
+ ";%s raw 0x%x 0x%x",
+ CONFIG_SPL_FS_LOAD_PAYLOAD_NAME,
+ base + limit, size - limit);
+#endif
+ }
break;
default:
return;
diff --git a/board/xilinx/zynqmp/zynqmp_kria.env b/board/xilinx/zynqmp/zynqmp_kria.env
index 0f940bd..846eceb 100644
--- a/board/xilinx/zynqmp/zynqmp_kria.env
+++ b/board/xilinx/zynqmp/zynqmp_kria.env
@@ -17,6 +17,7 @@
bootcmd_usb1=devnum=1; run usb_boot
bootcmd_usb2=devnum=2; run usb_boot
bootcmd_usb3=devnum=3; run usb_boot
+bootcmd_usb4=devnum=4; run usb_boot
bootdelay=2
bootfstype=fat
bootm_low=0
@@ -44,7 +45,8 @@
preboot=setenv boot_targets; setenv modeboot; run board_setup
# SOM specific boot methods
-som_cc_boot=if test ${card1_name} = SCK-KV-G; then setenv boot_targets mmc1 usb0 usb1 usb2 usb3 pxe dhcp && run distro_bootcmd; elif test ${card1_name} = SCK-KR-G; then setenv boot_targets usb0 usb1 usb2 usb3 pxe dhcp && run distro_bootcmd; else test ${card1_name} = SCK-KD-G; setenv boot_targets usb0 usb1 usb2 usb3 pxe dhcp && run distro_bootcmd; fi;"
+usb_boot_devices='usb0 usb1 usb2 usb3 usb4'
+som_cc_boot=if test ${card1_name} = SCK-KV-G; then setenv boot_targets mmc1 ${usb_boot_devices} pxe dhcp jtag && run distro_bootcmd; elif test ${card1_name} = SCK-KR-G; then setenv boot_targets ${usb_boot_devices} pxe dhcp jtag && run distro_bootcmd; else test ${card1_name} = SCK-KD-G; setenv boot_targets ${usb_boot_devices} pxe dhcp jtag && run distro_bootcmd; fi;"
som_mmc_boot=setenv boot_targets mmc0 && run distro_bootcmd
k26_starter=SMK-K26-XCL2G
diff --git a/board/xilinx/zynqmp_r5/board.c b/board/xilinx/zynqmp_r5/board.c
index 5c5a2e9..0c62b00 100644
--- a/board/xilinx/zynqmp_r5/board.c
+++ b/board/xilinx/zynqmp_r5/board.c
@@ -3,9 +3,9 @@
* (C) Copyright 2018 Xilinx, Inc. (Michal Simek)
*/
-#include <common.h>
#include <fdtdec.h>
#include <init.h>
+#include <linux/errno.h>
int board_init(void)
{
diff --git a/board/zyxel/nsa310s/nsa310s.c b/board/zyxel/nsa310s/nsa310s.c
index b3ea660..d018b57 100644
--- a/board/zyxel/nsa310s/nsa310s.c
+++ b/board/zyxel/nsa310s/nsa310s.c
@@ -4,7 +4,6 @@
* Copyright (C) 2015 Gerald Kerma <dreagle@doukki.net>
*/
-#include <common.h>
#include <init.h>
#include <netdev.h>
#include <asm/arch/cpu.h>
diff --git a/board/zyxel/nsa325/nsa325.c b/board/zyxel/nsa325/nsa325.c
index f5f63ee..38340b3 100644
--- a/board/zyxel/nsa325/nsa325.c
+++ b/board/zyxel/nsa325/nsa325.c
@@ -14,7 +14,6 @@
* Marvell Semiconductor <www.marvell.com>
*/
-#include <common.h>
#include <asm/arch/soc.h>
#include <asm/arch/mpp.h>
#include <netdev.h>
diff --git a/boot/Kconfig b/boot/Kconfig
index 3d7aabd..6f3096c 100644
--- a/boot/Kconfig
+++ b/boot/Kconfig
@@ -558,6 +558,16 @@
This provides a way to try out standard boot on an existing boot flow.
+config BOOTMETH_EFI_BOOTMGR
+ bool "Bootdev support for EFI boot manager"
+ depends on EFI_BOOTMGR
+ select BOOTMETH_GLOBAL
+ default y
+ help
+ Enable booting via the UEFI boot manager. Based on the EFI variables
+ the EFI binary to be launched is determined. To set the EFI variables
+ use the eficonfig command.
+
config BOOTMETH_VBE
bool "Bootdev support for Verified Boot for Embedded"
depends on FIT
@@ -745,7 +755,6 @@
config MEASURE_IGNORE_LOG
bool "Ignore the existing event log"
- default n
help
On platforms that use an event log memory region that persists
through system resets and are the first stage bootloader, then
diff --git a/boot/Makefile b/boot/Makefile
index f0a279c..84ccfea 100644
--- a/boot/Makefile
+++ b/boot/Makefile
@@ -34,8 +34,8 @@
obj-$(CONFIG_$(SPL_TPL_)BOOTMETH_SANDBOX) += bootmeth_sandbox.o
obj-$(CONFIG_$(SPL_TPL_)BOOTMETH_SCRIPT) += bootmeth_script.o
obj-$(CONFIG_$(SPL_TPL_)CEDIT) += cedit.o
+obj-$(CONFIG_$(SPL_TPL_)BOOTMETH_EFI_BOOTMGR) += bootmeth_efi_mgr.o
ifdef CONFIG_$(SPL_TPL_)BOOTSTD_FULL
-obj-$(CONFIG_EFI_BOOTMGR) += bootmeth_efi_mgr.o
obj-$(CONFIG_$(SPL_TPL_)EXPO) += bootflow_menu.o
obj-$(CONFIG_$(SPL_TPL_)BOOTSTD) += bootflow_menu.o
endif
diff --git a/boot/android_ab.c b/boot/android_ab.c
index 1e5aa81..143f373 100644
--- a/boot/android_ab.c
+++ b/boot/android_ab.c
@@ -2,7 +2,6 @@
/*
* Copyright (C) 2017 The Android Open Source Project
*/
-#include <common.h>
#include <android_ab.h>
#include <android_bootloader_message.h>
#include <blk.h>
diff --git a/boot/boot_fit.c b/boot/boot_fit.c
index 9d39412..4dcaf95 100644
--- a/boot/boot_fit.c
+++ b/boot/boot_fit.c
@@ -7,7 +7,6 @@
*/
#include <boot_fit.h>
-#include <common.h>
#include <errno.h>
#include <image.h>
#include <log.h>
diff --git a/boot/bootdev-uclass.c b/boot/bootdev-uclass.c
index 46815ea..7c7bba0 100644
--- a/boot/bootdev-uclass.c
+++ b/boot/bootdev-uclass.c
@@ -6,7 +6,6 @@
#define LOG_CATEGORY UCLASS_BOOTSTD
-#include <common.h>
#include <dm.h>
#include <bootdev.h>
#include <bootflow.h>
diff --git a/boot/bootflow.c b/boot/bootflow.c
index 68bf993..9aa3179 100644
--- a/boot/bootflow.c
+++ b/boot/bootflow.c
@@ -6,7 +6,6 @@
#define LOG_CATEGORY UCLASS_BOOTSTD
-#include <common.h>
#include <bootdev.h>
#include <bootflow.h>
#include <bootmeth.h>
diff --git a/boot/bootflow_menu.c b/boot/bootflow_menu.c
index 16f9cd8..143ef84 100644
--- a/boot/bootflow_menu.c
+++ b/boot/bootflow_menu.c
@@ -8,7 +8,6 @@
#define LOG_CATEGORY UCLASS_BOOTSTD
-#include <common.h>
#include <bootflow.h>
#include <bootstd.h>
#include <cli.h>
diff --git a/boot/bootm.c b/boot/bootm.c
index d071537..6fa8eda 100644
--- a/boot/bootm.c
+++ b/boot/bootm.c
@@ -5,7 +5,6 @@
*/
#ifndef USE_HOSTCC
-#include <common.h>
#include <bootm.h>
#include <bootstage.h>
#include <cli.h>
@@ -242,13 +241,13 @@
#ifdef CONFIG_LMB
static void boot_start_lmb(struct bootm_headers *images)
{
- ulong mem_start;
+ phys_addr_t mem_start;
phys_size_t mem_size;
mem_start = env_get_bootm_low();
mem_size = env_get_bootm_size();
- lmb_init_and_reserve_range(&images->lmb, (phys_addr_t)mem_start,
+ lmb_init_and_reserve_range(&images->lmb, mem_start,
mem_size, NULL);
}
#else
diff --git a/boot/bootm_os.c b/boot/bootm_os.c
index ccde72d..15297dd 100644
--- a/boot/bootm_os.c
+++ b/boot/bootm_os.c
@@ -4,7 +4,6 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
#include <bootm.h>
#include <bootstage.h>
#include <cpu_func.h>
diff --git a/boot/bootmeth-uclass.c b/boot/bootmeth-uclass.c
index 1d157d5..c0abade 100644
--- a/boot/bootmeth-uclass.c
+++ b/boot/bootmeth-uclass.c
@@ -6,7 +6,6 @@
#define LOG_CATEGORY UCLASS_BOOTSTD
-#include <common.h>
#include <blk.h>
#include <bootflow.h>
#include <bootmeth.h>
diff --git a/boot/bootmeth_cros.c b/boot/bootmeth_cros.c
index cd72db8..645b8be 100644
--- a/boot/bootmeth_cros.c
+++ b/boot/bootmeth_cros.c
@@ -8,7 +8,6 @@
#define LOG_CATEGORY UCLASS_BOOTSTD
-#include <common.h>
#include <blk.h>
#include <bootdev.h>
#include <bootflow.h>
@@ -432,9 +431,9 @@
}
if (IS_ENABLED(CONFIG_X86)) {
- ret = zboot_start(map_to_sysmem(bflow->buf), bflow->size, 0, 0,
- map_to_sysmem(bflow->x86_setup),
- bflow->cmdline);
+ ret = zboot_run(map_to_sysmem(bflow->buf), bflow->size, 0, 0,
+ map_to_sysmem(bflow->x86_setup),
+ bflow->cmdline);
} else {
ret = bootm_boot_start(map_to_sysmem(bflow->buf),
bflow->cmdline);
diff --git a/boot/bootmeth_efi.c b/boot/bootmeth_efi.c
index c4eb331..c7035c0 100644
--- a/boot/bootmeth_efi.c
+++ b/boot/bootmeth_efi.c
@@ -8,12 +8,12 @@
#define LOG_CATEGORY UCLASS_BOOTSTD
-#include <common.h>
#include <bootdev.h>
#include <bootflow.h>
#include <bootmeth.h>
#include <command.h>
#include <dm.h>
+#include <efi_default_filename.h>
#include <efi_loader.h>
#include <fs.h>
#include <malloc.h>
@@ -23,43 +23,7 @@
#include <pxe_utils.h>
#include <linux/sizes.h>
-#define EFI_DIRNAME "efi/boot/"
-
-/**
- * get_efi_leafname() - Get the leaf name for the EFI file we expect
- *
- * @str: Place to put leaf name for this architecture, e.g. "bootaa64.efi".
- * Must have at least 16 bytes of space
- * @max_len: Length of @str, must be >=16
- */
-static int get_efi_leafname(char *str, int max_len)
-{
- const char *base;
-
- if (max_len < 16)
- return log_msg_ret("spc", -ENOSPC);
- if (IS_ENABLED(CONFIG_ARM64))
- base = "bootaa64";
- else if (IS_ENABLED(CONFIG_ARM))
- base = "bootarm";
- else if (IS_ENABLED(CONFIG_X86_RUN_32BIT))
- base = "bootia32";
- else if (IS_ENABLED(CONFIG_X86_RUN_64BIT))
- base = "bootx64";
- else if (IS_ENABLED(CONFIG_ARCH_RV32I))
- base = "bootriscv32";
- else if (IS_ENABLED(CONFIG_ARCH_RV64I))
- base = "bootriscv64";
- else if (IS_ENABLED(CONFIG_SANDBOX))
- base = "bootsbox";
- else
- return -EINVAL;
-
- strcpy(str, base);
- strcat(str, ".efi");
-
- return 0;
-}
+#define EFI_DIRNAME "/EFI/BOOT/"
static int get_efi_pxe_arch(void)
{
@@ -259,10 +223,7 @@
return -ENOENT;
strcpy(fname, EFI_DIRNAME);
- ret = get_efi_leafname(fname + strlen(fname),
- sizeof(fname) - strlen(fname));
- if (ret)
- return log_msg_ret("leaf", ret);
+ strcat(fname, BOOTEFI_NAME);
if (bflow->blk)
desc = dev_get_uclass_plat(bflow->blk);
@@ -489,7 +450,7 @@
{ }
};
-U_BOOT_DRIVER(bootmeth_efi) = {
+U_BOOT_DRIVER(bootmeth_4efi) = {
.name = "bootmeth_efi",
.id = UCLASS_BOOTMETH,
.of_match = distro_efi_bootmeth_ids,
diff --git a/boot/bootmeth_efi_mgr.c b/boot/bootmeth_efi_mgr.c
index ed29d7e..23ae1e6 100644
--- a/boot/bootmeth_efi_mgr.c
+++ b/boot/bootmeth_efi_mgr.c
@@ -8,7 +8,6 @@
#define LOG_CATEGORY UCLASS_BOOTSTD
-#include <common.h>
#include <bootdev.h>
#include <bootflow.h>
#include <bootmeth.h>
@@ -114,7 +113,7 @@
{ }
};
-U_BOOT_DRIVER(bootmeth_efi_mgr) = {
+U_BOOT_DRIVER(bootmeth_3efi_mgr) = {
.name = "bootmeth_efi_mgr",
.id = UCLASS_BOOTMETH,
.of_match = efi_mgr_bootmeth_ids,
diff --git a/boot/bootmeth_extlinux.c b/boot/bootmeth_extlinux.c
index ae0ad1d..9b55686 100644
--- a/boot/bootmeth_extlinux.c
+++ b/boot/bootmeth_extlinux.c
@@ -8,7 +8,6 @@
#define LOG_CATEGORY UCLASS_BOOTSTD
-#include <common.h>
#include <bootdev.h>
#include <bootflow.h>
#include <bootmeth.h>
diff --git a/boot/bootmeth_pxe.c b/boot/bootmeth_pxe.c
index 8d489a1..03d2589 100644
--- a/boot/bootmeth_pxe.c
+++ b/boot/bootmeth_pxe.c
@@ -8,7 +8,6 @@
#define LOG_CATEGORY UCLASS_BOOTSTD
-#include <common.h>
#include <bootdev.h>
#include <bootflow.h>
#include <bootmeth.h>
@@ -184,7 +183,7 @@
{ }
};
-U_BOOT_DRIVER(bootmeth_pxe) = {
+U_BOOT_DRIVER(bootmeth_zpxe) = {
.name = "bootmeth_pxe",
.id = UCLASS_BOOTMETH,
.of_match = extlinux_bootmeth_pxe_ids,
diff --git a/boot/bootmeth_qfw.c b/boot/bootmeth_qfw.c
index 8ebbc3e..dfaa944 100644
--- a/boot/bootmeth_qfw.c
+++ b/boot/bootmeth_qfw.c
@@ -8,7 +8,6 @@
#define LOG_CATEGORY UCLASS_BOOTSTD
-#include <common.h>
#include <command.h>
#include <bootdev.h>
#include <bootflow.h>
diff --git a/boot/bootmeth_sandbox.c b/boot/bootmeth_sandbox.c
index aabc57e..0bc8f68 100644
--- a/boot/bootmeth_sandbox.c
+++ b/boot/bootmeth_sandbox.c
@@ -8,7 +8,6 @@
#define LOG_CATEGORY UCLASS_BOOTSTD
-#include <common.h>
#include <bootdev.h>
#include <bootflow.h>
#include <bootmeth.h>
diff --git a/boot/bootmeth_script.c b/boot/bootmeth_script.c
index 06340e4..0e05d28 100644
--- a/boot/bootmeth_script.c
+++ b/boot/bootmeth_script.c
@@ -8,7 +8,6 @@
#define LOG_CATEGORY UCLASS_BOOTSTD
-#include <common.h>
#include <blk.h>
#include <bootflow.h>
#include <bootmeth.h>
diff --git a/boot/bootretry.c b/boot/bootretry.c
index 8d850df..587b2de 100644
--- a/boot/bootretry.c
+++ b/boot/bootretry.c
@@ -4,12 +4,13 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
+#include <stdio.h>
#include <bootretry.h>
#include <cli.h>
#include <env.h>
#include <errno.h>
#include <time.h>
+#include <vsprintf.h>
#include <watchdog.h>
static uint64_t endtime; /* must be set, default is instant timeout */
diff --git a/boot/bootstd-uclass.c b/boot/bootstd-uclass.c
index 81555d3..5de8efc 100644
--- a/boot/bootstd-uclass.c
+++ b/boot/bootstd-uclass.c
@@ -6,7 +6,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <bootflow.h>
#include <bootstd.h>
#include <dm.h>
diff --git a/boot/cedit.c b/boot/cedit.c
index 8c654db..c29a2be 100644
--- a/boot/cedit.c
+++ b/boot/cedit.c
@@ -8,7 +8,6 @@
#define LOG_CATEGORY LOGC_EXPO
-#include <common.h>
#include <abuf.h>
#include <cedit.h>
#include <cli.h>
diff --git a/boot/common_fit.c b/boot/common_fit.c
index cde2dc4..a2f9b8d 100644
--- a/boot/common_fit.c
+++ b/boot/common_fit.c
@@ -4,7 +4,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <errno.h>
#include <image.h>
#include <log.h>
diff --git a/boot/expo.c b/boot/expo.c
index cadb6a0..ed01483 100644
--- a/boot/expo.c
+++ b/boot/expo.c
@@ -8,7 +8,6 @@
#define LOG_CATEGORY LOGC_EXPO
-#include <common.h>
#include <dm.h>
#include <expo.h>
#include <malloc.h>
diff --git a/boot/expo_build.c b/boot/expo_build.c
index 04d88a2..a4df798 100644
--- a/boot/expo_build.c
+++ b/boot/expo_build.c
@@ -8,7 +8,6 @@
#define LOG_CATEGORY LOGC_EXPO
-#include <common.h>
#include <expo.h>
#include <fdtdec.h>
#include <log.h>
diff --git a/boot/fdt_simplefb.c b/boot/fdt_simplefb.c
index 069ced7..5341554 100644
--- a/boot/fdt_simplefb.c
+++ b/boot/fdt_simplefb.c
@@ -6,12 +6,13 @@
* Stephen Warren <swarren@wwwdotorg.org>
*/
-#include <common.h>
#include <dm.h>
#include <fdt_support.h>
#include <asm/global_data.h>
#include <linux/libfdt.h>
#include <video.h>
+#include <spl.h>
+#include <bloblist.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -26,15 +27,29 @@
struct udevice *dev;
int ret;
- ret = uclass_first_device_err(UCLASS_VIDEO, &dev);
- if (ret)
- return ret;
- uc_priv = dev_get_uclass_priv(dev);
- plat = dev_get_uclass_plat(dev);
- xsize = uc_priv->xsize;
- ysize = uc_priv->ysize;
- bpix = uc_priv->bpix;
- fb_base = plat->base;
+ if (IS_ENABLED(CONFIG_SPL_VIDEO_HANDOFF) && spl_phase() > PHASE_SPL) {
+ struct video_handoff *ho;
+
+ ho = bloblist_find(BLOBLISTT_U_BOOT_VIDEO, sizeof(*ho));
+ if (!ho)
+ return log_msg_ret("Missing video bloblist", -ENOENT);
+
+ xsize = ho->xsize;
+ ysize = ho->ysize;
+ bpix = ho->bpix;
+ fb_base = ho->fb;
+ } else {
+ ret = uclass_first_device_err(UCLASS_VIDEO, &dev);
+ if (ret)
+ return ret;
+ uc_priv = dev_get_uclass_priv(dev);
+ plat = dev_get_uclass_plat(dev);
+ xsize = uc_priv->xsize;
+ ysize = uc_priv->ysize;
+ bpix = uc_priv->bpix;
+ fb_base = plat->base;
+ }
+
switch (bpix) {
case 4: /* VIDEO_BPP16 */
name = "r5g6b5";
@@ -91,7 +106,6 @@
#if IS_ENABLED(CONFIG_VIDEO)
int fdt_simplefb_enable_and_mem_rsv(void *blob)
{
- struct fdt_memory mem;
int ret;
/* nothing to do when video is not active */
@@ -102,15 +116,6 @@
if (ret)
return ret;
- /* nothing to do when the frame buffer is not defined */
- if (gd->video_bottom == gd->video_top)
- return 0;
-
- /* reserved with no-map tag the video buffer */
- mem.start = gd->video_bottom;
- mem.end = gd->video_top - 1;
-
- return fdtdec_add_reserved_memory(blob, "framebuffer", &mem, NULL, 0, NULL,
- FDTDEC_RESERVED_MEMORY_NO_MAP);
+ return fdt_add_fb_mem_rsv(blob);
}
#endif
diff --git a/boot/fdt_support.c b/boot/fdt_support.c
index 090d82e..874ca4d 100644
--- a/boot/fdt_support.c
+++ b/boot/fdt_support.c
@@ -6,7 +6,6 @@
* Copyright 2010-2011 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <abuf.h>
#include <env.h>
#include <log.h>
@@ -17,11 +16,15 @@
#include <linux/ctype.h>
#include <linux/types.h>
#include <asm/global_data.h>
+#include <asm/unaligned.h>
#include <linux/libfdt.h>
#include <fdt_support.h>
#include <exports.h>
#include <fdtdec.h>
#include <version.h>
+#include <video.h>
+
+DECLARE_GLOBAL_DATA_PTR;
/**
* fdt_getprop_u32_default_node - Return a node's property or a default
@@ -421,13 +424,13 @@
for (i = 0; i < n; i++) {
if (address_cells == 2)
- *(fdt64_t *)p = cpu_to_fdt64(address[i]);
+ put_unaligned_be64(address[i], p);
else
*(fdt32_t *)p = cpu_to_fdt32(address[i]);
p += 4 * address_cells;
if (size_cells == 2)
- *(fdt64_t *)p = cpu_to_fdt64(size[i]);
+ put_unaligned_be64(size[i], p);
else
*(fdt32_t *)p = cpu_to_fdt32(size[i]);
p += 4 * size_cells;
@@ -2042,6 +2045,24 @@
return 0;
}
+#if CONFIG_IS_ENABLED(VIDEO)
+int fdt_add_fb_mem_rsv(void *blob)
+{
+ struct fdt_memory mem;
+
+ /* nothing to do when the frame buffer is not defined */
+ if (gd->video_bottom == gd->video_top)
+ return 0;
+
+ /* reserved with no-map tag the video buffer */
+ mem.start = gd->video_bottom;
+ mem.end = gd->video_top - 1;
+
+ return fdtdec_add_reserved_memory(blob, "framebuffer", &mem, NULL, 0, NULL,
+ FDTDEC_RESERVED_MEMORY_NO_MAP);
+}
+#endif
+
/*
* Update native-mode in display-timings from display environment variable.
* The node to update are specified by path.
diff --git a/boot/image-android-dt.c b/boot/image-android-dt.c
index fb01419..3b25018 100644
--- a/boot/image-android-dt.c
+++ b/boot/image-android-dt.c
@@ -6,7 +6,6 @@
#include <image-android-dt.h>
#include <dt_table.h>
-#include <common.h>
#include <linux/libfdt.h>
#include <mapmem.h>
diff --git a/boot/image-android.c b/boot/image-android.c
index 88e40bc..ddd8ffd 100644
--- a/boot/image-android.c
+++ b/boot/image-android.c
@@ -3,7 +3,6 @@
* Copyright (c) 2011 Sebastian Andrzej Siewior <bigeasy@linutronix.de>
*/
-#include <common.h>
#include <env.h>
#include <image.h>
#include <image-android-dt.h>
diff --git a/boot/image-board.c b/boot/image-board.c
index 75f6906..b7884b8 100644
--- a/boot/image-board.c
+++ b/boot/image-board.c
@@ -8,7 +8,7 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
+#include <config.h>
#include <bootstage.h>
#include <cpu_func.h>
#include <display_options.h>
@@ -107,14 +107,12 @@
}
U_BOOT_ENV_CALLBACK(loadaddr, on_loadaddr);
-ulong env_get_bootm_low(void)
+phys_addr_t env_get_bootm_low(void)
{
char *s = env_get("bootm_low");
- if (s) {
- ulong tmp = hextoul(s, NULL);
- return tmp;
- }
+ if (s)
+ return simple_strtoull(s, NULL, 16);
#if defined(CFG_SYS_SDRAM_BASE)
return CFG_SYS_SDRAM_BASE;
@@ -127,14 +125,12 @@
phys_size_t env_get_bootm_size(void)
{
- phys_size_t tmp, size;
- phys_addr_t start;
+ phys_addr_t start, low;
+ phys_size_t size;
char *s = env_get("bootm_size");
- if (s) {
- tmp = (phys_size_t)simple_strtoull(s, NULL, 16);
- return tmp;
- }
+ if (s)
+ return simple_strtoull(s, NULL, 16);
start = gd->ram_base;
size = gd->ram_size;
@@ -144,22 +140,19 @@
s = env_get("bootm_low");
if (s)
- tmp = (phys_size_t)simple_strtoull(s, NULL, 16);
+ low = simple_strtoull(s, NULL, 16);
else
- tmp = start;
+ low = start;
- return size - (tmp - start);
+ return size - (low - start);
}
phys_size_t env_get_bootm_mapsize(void)
{
- phys_size_t tmp;
char *s = env_get("bootm_mapsize");
- if (s) {
- tmp = (phys_size_t)simple_strtoull(s, NULL, 16);
- return tmp;
- }
+ if (s)
+ return simple_strtoull(s, NULL, 16);
#if defined(CFG_SYS_BOOTMAPSZ)
return CFG_SYS_BOOTMAPSZ;
@@ -538,7 +531,7 @@
ulong *initrd_start, ulong *initrd_end)
{
char *s;
- ulong initrd_high;
+ phys_addr_t initrd_high;
int initrd_copy_to_ram = 1;
s = env_get("initrd_high");
@@ -553,8 +546,8 @@
initrd_high = env_get_bootm_mapsize() + env_get_bootm_low();
}
- debug("## initrd_high = 0x%08lx, copy_to_ram = %d\n",
- initrd_high, initrd_copy_to_ram);
+ debug("## initrd_high = 0x%llx, copy_to_ram = %d\n",
+ (u64)initrd_high, initrd_copy_to_ram);
if (rd_data) {
if (!initrd_copy_to_ram) { /* zero-copy ramdisk support */
diff --git a/boot/image-cipher.c b/boot/image-cipher.c
index b906148..9d389f2 100644
--- a/boot/image-cipher.c
+++ b/boot/image-cipher.c
@@ -7,7 +7,6 @@
#include "mkimage.h"
#include <time.h>
#else
-#include <common.h>
#include <malloc.h>
#include <asm/global_data.h>
DECLARE_GLOBAL_DATA_PTR;
diff --git a/boot/image-fdt.c b/boot/image-fdt.c
index 5e4aa9d..56dd768 100644
--- a/boot/image-fdt.c
+++ b/boot/image-fdt.c
@@ -8,7 +8,6 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
#include <command.h>
#include <fdt_support.h>
#include <fdtdec.h>
@@ -158,11 +157,10 @@
*/
int boot_relocate_fdt(struct lmb *lmb, char **of_flat_tree, ulong *of_size)
{
+ u64 start, size, usable, addr, low, mapsize;
void *fdt_blob = *of_flat_tree;
void *of_start = NULL;
- u64 start, size, usable;
char *fdt_high;
- ulong mapsize, low;
ulong of_len = 0;
int bank;
int err;
@@ -185,7 +183,6 @@
fdt_high = env_get("fdt_high");
if (fdt_high) {
ulong desired_addr = hextoul(fdt_high, NULL);
- ulong addr;
if (desired_addr == ~0UL) {
/* All ones means use fdt in place */
@@ -217,14 +214,14 @@
if (start + size < low)
continue;
- usable = min(start + size, (u64)(low + mapsize));
-
/*
* At least part of this DRAM bank is usable, try
- * using it for LMB allocation.
+ * using the DRAM bank up to 'usable' address limit
+ * for LMB allocation.
*/
- of_start = map_sysmem((ulong)lmb_alloc_base(lmb,
- of_len, 0x1000, usable), of_len);
+ usable = min(start + size, low + mapsize);
+ addr = lmb_alloc_base(lmb, of_len, 0x1000, usable);
+ of_start = map_sysmem(addr, of_len);
/* Allocation succeeded, use this block. */
if (of_start != NULL)
break;
@@ -233,7 +230,7 @@
* Reduce the mapping size in the next bank
* by the size of attempt in current bank.
*/
- mapsize -= usable - max(start, (u64)low);
+ mapsize -= usable - max(start, low);
if (!mapsize)
break;
}
diff --git a/boot/image-fit-sig.c b/boot/image-fit-sig.c
index 1236989..fe328df 100644
--- a/boot/image-fit-sig.c
+++ b/boot/image-fit-sig.c
@@ -7,7 +7,6 @@
#include "mkimage.h"
#include <time.h>
#else
-#include <common.h>
#include <log.h>
#include <malloc.h>
#include <asm/global_data.h>
diff --git a/boot/image-fit.c b/boot/image-fit.c
index 89e3775..fb03cab 100644
--- a/boot/image-fit.c
+++ b/boot/image-fit.c
@@ -19,7 +19,6 @@
#else
#include <linux/compiler.h>
#include <linux/sizes.h>
-#include <common.h>
#include <errno.h>
#include <log.h>
#include <mapmem.h>
diff --git a/boot/image-pre-load.c b/boot/image-pre-load.c
index b504ab4..cc19017 100644
--- a/boot/image-pre-load.c
+++ b/boot/image-pre-load.c
@@ -3,7 +3,6 @@
* Copyright (C) 2021 Philippe Reynes <philippe.reynes@softathome.com>
*/
-#include <common.h>
#include <asm/global_data.h>
DECLARE_GLOBAL_DATA_PTR;
#include <image.h>
diff --git a/boot/image-sig.c b/boot/image-sig.c
index 0421a61..6bc7486 100644
--- a/boot/image-sig.c
+++ b/boot/image-sig.c
@@ -3,7 +3,6 @@
* Copyright (c) 2013, Google Inc.
*/
-#include <common.h>
#include <log.h>
#include <malloc.h>
#include <asm/global_data.h>
diff --git a/boot/image.c b/boot/image.c
index 073931c..eb12e4b 100644
--- a/boot/image.c
+++ b/boot/image.c
@@ -7,7 +7,6 @@
*/
#ifndef USE_HOSTCC
-#include <common.h>
#include <env.h>
#include <display_options.h>
#include <init.h>
diff --git a/boot/pxe_utils.c b/boot/pxe_utils.c
index 9620562..4b22bb6 100644
--- a/boot/pxe_utils.c
+++ b/boot/pxe_utils.c
@@ -4,7 +4,6 @@
* Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved.
*/
-#include <common.h>
#include <command.h>
#include <dm.h>
#include <env.h>
@@ -21,9 +20,7 @@
#include <errno.h>
#include <linux/list.h>
-#ifdef CONFIG_DM_RNG
#include <rng.h>
-#endif
#include <splash.h>
#include <asm/io.h>
@@ -323,7 +320,7 @@
static void label_boot_kaslrseed(void)
{
-#ifdef CONFIG_DM_RNG
+#if CONFIG_IS_ENABLED(DM_RNG)
ulong fdt_addr;
struct fdt_header *working_fdt;
size_t n = 0x8;
diff --git a/boot/scene.c b/boot/scene.c
index d4dfb49..ac976aa 100644
--- a/boot/scene.c
+++ b/boot/scene.c
@@ -8,7 +8,6 @@
#define LOG_CATEGORY LOGC_EXPO
-#include <common.h>
#include <dm.h>
#include <expo.h>
#include <malloc.h>
diff --git a/boot/scene_menu.c b/boot/scene_menu.c
index 6399416..80bd745 100644
--- a/boot/scene_menu.c
+++ b/boot/scene_menu.c
@@ -8,7 +8,6 @@
#define LOG_CATEGORY LOGC_EXPO
-#include <common.h>
#include <dm.h>
#include <expo.h>
#include <malloc.h>
diff --git a/boot/scene_textline.c b/boot/scene_textline.c
index 6ea072a..bba8663 100644
--- a/boot/scene_textline.c
+++ b/boot/scene_textline.c
@@ -8,10 +8,12 @@
#define LOG_CATEGORY LOGC_EXPO
-#include <common.h>
#include <expo.h>
#include <menu.h>
+#include <log.h>
#include <video_console.h>
+#include <linux/errno.h>
+#include <linux/string.h>
#include "scene_internal.h"
int scene_textline(struct scene *scn, const char *name, uint id, uint max_chars,
diff --git a/boot/vbe.c b/boot/vbe.c
index 52b3283..00673de 100644
--- a/boot/vbe.c
+++ b/boot/vbe.c
@@ -6,7 +6,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <bootmeth.h>
#include <bootstd.h>
#include <dm.h>
diff --git a/boot/vbe_request.c b/boot/vbe_request.c
index 917251a..a1350c1 100644
--- a/boot/vbe_request.c
+++ b/boot/vbe_request.c
@@ -8,7 +8,6 @@
#define LOG_CATEGORY LOGC_BOOT
-#include <common.h>
#include <dm.h>
#include <event.h>
#include <image.h>
@@ -36,7 +35,7 @@
u32 size;
int ret;
- if (!IS_ENABLED(CONFIG_DM_RNG))
+ if (!CONFIG_IS_ENABLED(DM_RNG))
return -ENOTSUPP;
if (ofnode_read_u32(node, "vbe,size", &size)) {
diff --git a/boot/vbe_simple.c b/boot/vbe_simple.c
index 12682ab..189e86d 100644
--- a/boot/vbe_simple.c
+++ b/boot/vbe_simple.c
@@ -8,7 +8,6 @@
#define LOG_CATEGORY LOGC_BOOT
-#include <common.h>
#include <bootdev.h>
#include <bootflow.h>
#include <bootmeth.h>
diff --git a/boot/vbe_simple_fw.c b/boot/vbe_simple_fw.c
index d59a704..4d6da94 100644
--- a/boot/vbe_simple_fw.c
+++ b/boot/vbe_simple_fw.c
@@ -8,7 +8,6 @@
#define LOG_CATEGORY LOGC_BOOT
-#include <common.h>
#include <bloblist.h>
#include <bootdev.h>
#include <bootflow.h>
diff --git a/boot/vbe_simple_os.c b/boot/vbe_simple_os.c
index 84626cd..b4126d8 100644
--- a/boot/vbe_simple_os.c
+++ b/boot/vbe_simple_os.c
@@ -8,7 +8,6 @@
#define LOG_CATEGORY LOGC_BOOT
-#include <common.h>
#include <dm.h>
#include <bootflow.h>
#include <vbe.h>
diff --git a/cmd/2048.c b/cmd/2048.c
index fa60aa9..42cd171 100644
--- a/cmd/2048.c
+++ b/cmd/2048.c
@@ -3,10 +3,10 @@
/* Console version of the game "2048" for GNU/Linux */
-#include <common.h>
#include <cli.h>
#include <command.h>
#include <rand.h>
+#include <vsprintf.h>
#include <linux/delay.h>
#define SIZE 4
diff --git a/cmd/Kconfig b/cmd/Kconfig
index 61e280f..c06fec3 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -446,7 +446,7 @@
for testing that EFI is working at a basic level, and for bringing
up EFI support on a new architecture.
-source lib/efi_selftest/Kconfig
+source "lib/efi_selftest/Kconfig"
endif
config CMD_BOOTMENU
@@ -492,7 +492,6 @@
config CMD_ELF_FDT_SETUP
bool "Flattened Device Tree setup in bootelf cmd"
- default n
depends on CMD_ELF
select LIB_LIBFDT
select LMB
@@ -540,6 +539,7 @@
config CMD_IMLS
bool "imls"
+ depends on MTD_NOR_FLASH || FLASH_CFI_DRIVER
help
List all images found in flash
@@ -612,6 +612,8 @@
config CMD_ZBOOT
bool "zboot - x86 boot command"
+ depends on ZBOOT
+ default y
help
With x86 machines it is common to boot a bzImage file which
contains both a kernel and a setup.bin file. The latter includes
@@ -740,7 +742,8 @@
config CMD_BLOBLIST
bool "bloblist"
- default y if BLOBLIST
+ depends on BLOBLIST
+ default y
help
Show information about the bloblist, a collection of binary blobs
held in memory that persist between SPL and U-Boot. In the case of
@@ -829,7 +832,7 @@
config SYS_EEPROM_PAGE_WRITE_BITS
int "Number of bits used to address bytes in a single page"
- depends on CMD_EEPROM
+ depends on CMD_EEPROM || ENV_IS_IN_EEPROM
default 8
help
The EEPROM page size is 2^SYS_EEPROM_PAGE_WRITE_BITS.
@@ -1021,8 +1024,8 @@
- Displaying the arm_ffa device info
config CMD_ARMFLASH
- #depends on FLASH_CFI_DRIVER
bool "armflash"
+ depends on FLASH_CFI_DRIVER
help
ARM Ltd reference designs flash partition access
@@ -1165,6 +1168,7 @@
config CMD_FPGAD
bool "fpgad - dump FPGA registers"
+ depends on GDSYS_LEGACY_DRIVERS
help
(legacy, needs conversion to driver model)
Provides a way to dump FPGA registers by calling the board-specific
@@ -1394,7 +1398,9 @@
config CMD_OPTEE_RPMB
bool "Enable read/write support on RPMB via OPTEE"
- depends on SUPPORT_EMMC_RPMB && OPTEE
+ depends on (SUPPORT_EMMC_RPMB && OPTEE) || SANDBOX_TEE
+ default y if SANDBOX_TEE
+ select OPTEE_TA_AVB if SANDBOX_TEE
help
Enable the commands for reading, writing persistent named values
in the Replay Protection Memory Block partition in eMMC by
@@ -1407,6 +1413,13 @@
help
MTD commands support.
+config CMD_MTD_OTP
+ bool "mtd otp"
+ depends on CMD_MTD
+ select HEXDUMP
+ help
+ MTD commands for OTP access.
+
config CMD_MUX
bool "mux"
depends on MULTIPLEXER
@@ -1591,6 +1604,7 @@
config CMD_TSI148
bool "tsi148 - Command to access tsi148 device"
+ depends on DM_PCI_COMPAT
help
This provides various sub-commands to initialise and configure the
Turndra tsi148 device. See the command help for full details.
@@ -1604,6 +1618,7 @@
config CMD_UNIVERSE
bool "universe - Command to set up the Turndra Universe controller"
+ depends on DM_PCI_COMPAT
help
This allows setting up the VMEbus provided by this controller.
See the command help for full details.
@@ -2612,7 +2627,6 @@
config CMD_SCMI
bool "Enable scmi command"
depends on SCMI_FIRMWARE
- default n
help
This command provides user interfaces to several SCMI (System
Control and Management Interface) protocols available on Arm
@@ -2878,8 +2892,8 @@
Enables a command to control using of function tracing within
U-Boot. This allows recording of call traces including timing
information. The command can write data to memory for exporting
- for analysis (e.g. using bootchart). See doc/README.trace for full
- details.
+ for analysis (e.g. using bootchart). See doc/develop/trace.rst
+ for full details.
config CMD_AVB
bool "avb - Android Verified Boot 2.0 operations"
diff --git a/cmd/ab_select.c b/cmd/ab_select.c
index bfb67b8..faeb838 100644
--- a/cmd/ab_select.c
+++ b/cmd/ab_select.c
@@ -3,7 +3,6 @@
* Copyright (C) 2017 The Android Open Source Project
*/
-#include <common.h>
#include <android_ab.h>
#include <command.h>
#include <env.h>
diff --git a/cmd/abootimg.c b/cmd/abootimg.c
index 2653b55..88c77d9 100644
--- a/cmd/abootimg.c
+++ b/cmd/abootimg.c
@@ -5,7 +5,6 @@
*/
#include <android_image.h>
-#include <common.h>
#include <command.h>
#include <image.h>
#include <mapmem.h>
diff --git a/cmd/acpi.c b/cmd/acpi.c
index 928e5dc..094d9d4 100644
--- a/cmd/acpi.c
+++ b/cmd/acpi.c
@@ -3,7 +3,6 @@
* Copyright 2019 Google LLC
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <command.h>
#include <display_options.h>
#include <log.h>
@@ -11,6 +10,7 @@
#include <acpi/acpi_table.h>
#include <asm/acpi_table.h>
#include <asm/global_data.h>
+#include <linux/errno.h>
#include <dm/acpi.h>
DECLARE_GLOBAL_DATA_PTR;
diff --git a/cmd/adc.c b/cmd/adc.c
index 4cb18b6..f87f978 100644
--- a/cmd/adc.c
+++ b/cmd/adc.c
@@ -3,7 +3,6 @@
* Copyright (C) 2018 BayLibre, SAS
* Author: Neil Armstrong <narmstrong@baylibre.com>
*/
-#include <common.h>
#include <command.h>
#include <dm.h>
#include <adc.h>
diff --git a/cmd/addrmap.c b/cmd/addrmap.c
index bd23549..f7e4d92 100644
--- a/cmd/addrmap.c
+++ b/cmd/addrmap.c
@@ -3,7 +3,6 @@
* Copyright (C) 2021, Bin Meng <bmeng.cn@gmail.com>
*/
-#include <common.h>
#include <command.h>
#include <addr_map.h>
diff --git a/cmd/adtimg.c b/cmd/adtimg.c
index f4b5cbf..53f3376 100644
--- a/cmd/adtimg.c
+++ b/cmd/adtimg.c
@@ -7,8 +7,8 @@
#include <command.h>
#include <env.h>
+#include <vsprintf.h>
#include <image-android-dt.h>
-#include <common.h>
#define OPT_INDEX "--index"
diff --git a/cmd/aes.c b/cmd/aes.c
index 1264675..87ad1ab 100644
--- a/cmd/aes.c
+++ b/cmd/aes.c
@@ -5,13 +5,13 @@
* Command for en/de-crypting block of memory with AES-[128/192/256]-CBC cipher.
*/
-#include <common.h>
#include <command.h>
#include <uboot_aes.h>
#include <malloc.h>
#include <asm/byteorder.h>
#include <linux/compiler.h>
#include <mapmem.h>
+#include <vsprintf.h>
u32 aes_get_key_len(char *command)
{
diff --git a/cmd/arm/exception64.c b/cmd/arm/exception64.c
index 589a231..73d6c20 100644
--- a/cmd/arm/exception64.c
+++ b/cmd/arm/exception64.c
@@ -5,7 +5,6 @@
* Copyright (c) 2018, Heinrich Schuchardt <xypron.glpk@gmx.de>
*/
-#include <common.h>
#include <command.h>
#include <linux/bitops.h>
diff --git a/cmd/armffa.c b/cmd/armffa.c
index 9585150..181e31b 100644
--- a/cmd/armffa.c
+++ b/cmd/armffa.c
@@ -5,7 +5,6 @@
* Authors:
* Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
*/
-#include <common.h>
#include <arm_ffa.h>
#include <command.h>
#include <dm.h>
diff --git a/cmd/armflash.c b/cmd/armflash.c
index fdaea5a..e292cf8 100644
--- a/cmd/armflash.c
+++ b/cmd/armflash.c
@@ -5,10 +5,10 @@
*
* Support for ARM Flash Partitions
*/
-#include <common.h>
#include <command.h>
#include <console.h>
#include <flash.h>
+#include <vsprintf.h>
#include <asm/io.h>
#define MAX_REGIONS 4
diff --git a/cmd/axi.c b/cmd/axi.c
index 5620891..3dbea04 100644
--- a/cmd/axi.c
+++ b/cmd/axi.c
@@ -9,7 +9,6 @@
* SPDX-License-Identifier: GPL-2.0+
*/
-#include <common.h>
#include <axi.h>
#include <command.h>
#include <console.h>
diff --git a/cmd/bcb.c b/cmd/bcb.c
index f3b9256..fe6d6cb 100644
--- a/cmd/bcb.c
+++ b/cmd/bcb.c
@@ -8,12 +8,12 @@
#include <android_bootloader_message.h>
#include <bcb.h>
#include <command.h>
-#include <common.h>
#include <display_options.h>
#include <log.h>
#include <part.h>
#include <malloc.h>
#include <memalign.h>
+#include <vsprintf.h>
#include <linux/err.h>
enum bcb_cmd {
diff --git a/cmd/bdinfo.c b/cmd/bdinfo.c
index 79106ca..437ac4e 100644
--- a/cmd/bdinfo.c
+++ b/cmd/bdinfo.c
@@ -6,7 +6,6 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
#include <command.h>
#include <dm.h>
#include <env.h>
diff --git a/cmd/bind.c b/cmd/bind.c
index be0d4d2..3a59eef 100644
--- a/cmd/bind.c
+++ b/cmd/bind.c
@@ -3,7 +3,6 @@
* Copyright (c) 2018 JJ Hiblot <jjhiblot@ti.com>
*/
-#include <common.h>
#include <command.h>
#include <dm.h>
#include <dm/device-internal.h>
diff --git a/cmd/binop.c b/cmd/binop.c
index 592e914..10d91b5 100644
--- a/cmd/binop.c
+++ b/cmd/binop.c
@@ -1,11 +1,11 @@
// SPDX-License-Identifier: GPL-2.0+
-#include <common.h>
#include <command.h>
#include <env.h>
#include <hexdump.h>
#include <malloc.h>
#include <mapmem.h>
+#include <vsprintf.h>
#include <linux/ctype.h>
enum {
diff --git a/cmd/blk_common.c b/cmd/blk_common.c
index 02ac928..4c05a4e 100644
--- a/cmd/blk_common.c
+++ b/cmd/blk_common.c
@@ -8,10 +8,10 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
#include <blk.h>
#include <command.h>
#include <mapmem.h>
+#include <vsprintf.h>
int blk_common_cmd(int argc, char *const argv[], enum uclass_id uclass_id,
int *cur_devnump)
diff --git a/cmd/blkcache.c b/cmd/blkcache.c
index 1456654..dbd03df 100644
--- a/cmd/blkcache.c
+++ b/cmd/blkcache.c
@@ -6,9 +6,9 @@
*/
#include <command.h>
#include <config.h>
-#include <common.h>
#include <malloc.h>
#include <part.h>
+#include <vsprintf.h>
static int blkc_show(struct cmd_tbl *cmdtp, int flag,
int argc, char *const argv[])
diff --git a/cmd/blkmap.c b/cmd/blkmap.c
index ef74ebc..164f80f 100644
--- a/cmd/blkmap.c
+++ b/cmd/blkmap.c
@@ -6,7 +6,6 @@
#include <blk.h>
#include <blkmap.h>
-#include <common.h>
#include <command.h>
#include <malloc.h>
#include <dm/device.h>
diff --git a/cmd/blob.c b/cmd/blob.c
index 7c77c41..a3c1dc4 100644
--- a/cmd/blob.c
+++ b/cmd/blob.c
@@ -4,9 +4,9 @@
* Command for encapsulating/decapsulating blob of memory.
*/
-#include <common.h>
#include <command.h>
#include <malloc.h>
+#include <vsprintf.h>
#include <asm/byteorder.h>
#include <linux/compiler.h>
#if defined(CONFIG_ARCH_MX6) || defined(CONFIG_ARCH_MX7) || \
diff --git a/cmd/bloblist.c b/cmd/bloblist.c
index 26548ec..333ae55 100644
--- a/cmd/bloblist.c
+++ b/cmd/bloblist.c
@@ -6,7 +6,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <bloblist.h>
#include <command.h>
#include <asm/global_data.h>
diff --git a/cmd/bmp.c b/cmd/bmp.c
index 8f43a40..3b61844 100644
--- a/cmd/bmp.c
+++ b/cmd/bmp.c
@@ -8,7 +8,6 @@
* BMP handling routines
*/
-#include <common.h>
#include <command.h>
#include <image.h>
#include <mapmem.h>
diff --git a/cmd/boot.c b/cmd/boot.c
index 14839c1..23496ca 100644
--- a/cmd/boot.c
+++ b/cmd/boot.c
@@ -7,9 +7,9 @@
/*
* Misc boot support
*/
-#include <common.h>
#include <command.h>
#include <net.h>
+#include <vsprintf.h>
#ifdef CONFIG_CMD_GO
diff --git a/cmd/bootcount.c b/cmd/bootcount.c
index 30ce5db..5e3b66e 100644
--- a/cmd/bootcount.c
+++ b/cmd/bootcount.c
@@ -1,6 +1,5 @@
// SPDX-License-Identifier: GPL-2.0+
-#include <common.h>
#include <command.h>
#include <bootcount.h>
diff --git a/cmd/bootdev.c b/cmd/bootdev.c
index 471189c..fa7285b 100644
--- a/cmd/bootdev.c
+++ b/cmd/bootdev.c
@@ -6,7 +6,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <bootdev.h>
#include <bootflow.h>
#include <bootstd.h>
diff --git a/cmd/bootefi.c b/cmd/bootefi.c
index 578dbb1..c1454ff 100644
--- a/cmd/bootefi.c
+++ b/cmd/bootefi.c
@@ -107,7 +107,6 @@
/* Execute the test */
ret = EFI_CALL(efi_selftest(&image_obj->header, &systab));
- efi_restore_gd();
free(loaded_image_info->load_options);
efi_free_pool(test_device_path);
efi_free_pool(test_image_path);
diff --git a/cmd/bootflow.c b/cmd/bootflow.c
index be5d7d8..1588f27 100644
--- a/cmd/bootflow.c
+++ b/cmd/bootflow.c
@@ -6,7 +6,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <bootdev.h>
#include <bootflow.h>
#include <bootm.h>
diff --git a/cmd/booti.c b/cmd/booti.c
index 898df0f..62b19e8 100644
--- a/cmd/booti.c
+++ b/cmd/booti.c
@@ -4,7 +4,6 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
#include <bootm.h>
#include <command.h>
#include <image.h>
@@ -74,7 +73,7 @@
unmap_sysmem((void *)ld);
ret = booti_setup(ld, &relocated_addr, &image_size, false);
- if (ret || IS_ENABLED(CONFIG_SANDBOX))
+ if (ret)
return 1;
/* Handle BOOTM_STATE_LOADOS */
diff --git a/cmd/bootm.c b/cmd/bootm.c
index 9737a2d..545b0c3 100644
--- a/cmd/bootm.c
+++ b/cmd/bootm.c
@@ -7,7 +7,6 @@
/*
* Boot support
*/
-#include <common.h>
#include <bootm.h>
#include <command.h>
#include <env.h>
diff --git a/cmd/bootmenu.c b/cmd/bootmenu.c
index 78184fc..977a04b 100644
--- a/cmd/bootmenu.c
+++ b/cmd/bootmenu.c
@@ -5,7 +5,6 @@
#include <charset.h>
#include <cli.h>
-#include <common.h>
#include <command.h>
#include <ansi.h>
#include <efi_config.h>
diff --git a/cmd/bootmeth.c b/cmd/bootmeth.c
index f5b0134..ebf8b7e 100644
--- a/cmd/bootmeth.c
+++ b/cmd/bootmeth.c
@@ -6,7 +6,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <bootdev.h>
#include <bootmeth.h>
#include <bootstd.h>
diff --git a/cmd/bootstage.c b/cmd/bootstage.c
index 77a4bc6..5246924 100644
--- a/cmd/bootstage.c
+++ b/cmd/bootstage.c
@@ -3,9 +3,9 @@
* Copyright (c) 2012, Google Inc. All rights reserved.
*/
-#include <common.h>
#include <bootstage.h>
#include <command.h>
+#include <vsprintf.h>
static int do_bootstage_report(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[])
diff --git a/cmd/bootz.c b/cmd/bootz.c
index b6bb4aa..55837a7 100644
--- a/cmd/bootz.c
+++ b/cmd/bootz.c
@@ -4,7 +4,6 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
#include <bootm.h>
#include <command.h>
#include <image.h>
diff --git a/cmd/broadcom/chimp_boot.c b/cmd/broadcom/chimp_boot.c
index 16f2b61..ae0a811 100644
--- a/cmd/broadcom/chimp_boot.c
+++ b/cmd/broadcom/chimp_boot.c
@@ -3,7 +3,6 @@
* Copyright 2020 Broadcom
*/
-#include <common.h>
#include <command.h>
#include <broadcom/chimp.h>
diff --git a/cmd/broadcom/chimp_handshake.c b/cmd/broadcom/chimp_handshake.c
index a90a73a..e274267 100644
--- a/cmd/broadcom/chimp_handshake.c
+++ b/cmd/broadcom/chimp_handshake.c
@@ -3,7 +3,6 @@
* Copyright 2020 Broadcom
*/
-#include <common.h>
#include <command.h>
#include <broadcom/chimp.h>
diff --git a/cmd/broadcom/nitro_image_load.c b/cmd/broadcom/nitro_image_load.c
index 93b5cb4..289b184 100644
--- a/cmd/broadcom/nitro_image_load.c
+++ b/cmd/broadcom/nitro_image_load.c
@@ -3,8 +3,8 @@
* Copyright 2020 Broadcom
*/
-#include <common.h>
#include <command.h>
+#include <vsprintf.h>
#define FW_IMAGE_SIG 0xff123456
#define CFG_IMAGE_SIG 0xcf54321a
diff --git a/cmd/btrfs.c b/cmd/btrfs.c
index 2843835..69d1b1f 100644
--- a/cmd/btrfs.c
+++ b/cmd/btrfs.c
@@ -3,7 +3,6 @@
* 2017 by Marek Behún <kabel@kernel.org>
*/
-#include <common.h>
#include <command.h>
#include <btrfs.h>
#include <fs.h>
diff --git a/cmd/button.c b/cmd/button.c
index 1b45d0a..3e6db3f 100644
--- a/cmd/button.c
+++ b/cmd/button.c
@@ -5,7 +5,6 @@
* Based on led.c
*/
-#include <common.h>
#include <command.h>
#include <dm.h>
#include <button.h>
diff --git a/cmd/cache.c b/cmd/cache.c
index b68d45b..0254ff1 100644
--- a/cmd/cache.c
+++ b/cmd/cache.c
@@ -7,7 +7,6 @@
/*
* Cache support: switch on or off, get status
*/
-#include <common.h>
#include <command.h>
#include <cpu_func.h>
#include <linux/compiler.h>
diff --git a/cmd/cat.c b/cmd/cat.c
index 18aa6ca..6828b7b 100644
--- a/cmd/cat.c
+++ b/cmd/cat.c
@@ -4,7 +4,6 @@
* Roger Knecht <rknecht@pm.de>
*/
-#include <common.h>
#include <command.h>
#include <fs.h>
#include <malloc.h>
diff --git a/cmd/cbfs.c b/cmd/cbfs.c
index 3cfc9eb..c103546 100644
--- a/cmd/cbfs.c
+++ b/cmd/cbfs.c
@@ -6,10 +6,10 @@
/*
* CBFS commands
*/
-#include <common.h>
#include <command.h>
#include <env.h>
#include <cbfs.h>
+#include <vsprintf.h>
static int do_cbfs_init(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[])
diff --git a/cmd/cedit.c b/cmd/cedit.c
index 6352e63..fec67a8 100644
--- a/cmd/cedit.c
+++ b/cmd/cedit.c
@@ -6,7 +6,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <abuf.h>
#include <cedit.h>
#include <command.h>
diff --git a/cmd/clk.c b/cmd/clk.c
index 7bbcbfe..6fda6ef 100644
--- a/cmd/clk.c
+++ b/cmd/clk.c
@@ -2,7 +2,6 @@
/*
* Copyright (C) 2013 Xilinx, Inc.
*/
-#include <common.h>
#include <command.h>
#include <clk.h>
#if defined(CONFIG_DM) && defined(CONFIG_CLK)
diff --git a/cmd/clone.c b/cmd/clone.c
index a906207..1f3cff1 100644
--- a/cmd/clone.c
+++ b/cmd/clone.c
@@ -4,11 +4,11 @@
*
*/
-#include <common.h>
#include <command.h>
#include <malloc.h>
#include <part.h>
#include <blk.h>
+#include <time.h>
#include <vsprintf.h>
#define BUFSIZE (1 * 1024 * 1024)
diff --git a/cmd/cls.c b/cmd/cls.c
index 80d0558..4bee8a1 100644
--- a/cmd/cls.c
+++ b/cmd/cls.c
@@ -5,7 +5,6 @@
*
* cls - clear screen command
*/
-#include <common.h>
#include <command.h>
#include <console.h>
#include <dm.h>
diff --git a/cmd/config.c b/cmd/config.c
index cf30841..f0d2033 100644
--- a/cmd/config.c
+++ b/cmd/config.c
@@ -3,7 +3,6 @@
* Copyright (C) 2017 Masahiro Yamada <yamada.masahiro@socionext.com>
*/
-#include <common.h>
#include <command.h>
#include <gzip.h>
#include <malloc.h>
diff --git a/cmd/conitrace.c b/cmd/conitrace.c
index 9a1bc35..6cc1133 100644
--- a/cmd/conitrace.c
+++ b/cmd/conitrace.c
@@ -5,7 +5,6 @@
*
* Copyright (c) 2018, Heinrich Schuchardt <xypron.glpk@gmx.de>
*/
-#include <common.h>
#include <command.h>
#include <linux/delay.h>
diff --git a/cmd/console.c b/cmd/console.c
index 58c2cf1..12fc920 100644
--- a/cmd/console.c
+++ b/cmd/console.c
@@ -7,7 +7,6 @@
/*
* Boot support
*/
-#include <common.h>
#include <command.h>
#include <iomux.h>
#include <stdio_dev.h>
diff --git a/cmd/cpu.c b/cmd/cpu.c
index 245a82f..9e32306 100644
--- a/cmd/cpu.c
+++ b/cmd/cpu.c
@@ -5,7 +5,6 @@
* Copyright (c) 2017 Álvaro Fernández Rojas <noltari@gmail.com>
*/
-#include <common.h>
#include <command.h>
#include <cpu.h>
#include <display_options.h>
diff --git a/cmd/cramfs.c b/cmd/cramfs.c
index 57e2afa..b57e281 100644
--- a/cmd/cramfs.c
+++ b/cmd/cramfs.c
@@ -10,7 +10,6 @@
/*
* CRAMFS support
*/
-#include <common.h>
#include <command.h>
#include <env.h>
#include <image.h>
diff --git a/cmd/cros_ec.c b/cmd/cros_ec.c
index 90921ce..7b60e41 100644
--- a/cmd/cros_ec.c
+++ b/cmd/cros_ec.c
@@ -6,7 +6,6 @@
* Copyright (c) 2016 National Instruments Corp
*/
-#include <common.h>
#include <command.h>
#include <cros_ec.h>
#include <dm.h>
diff --git a/cmd/cyclic.c b/cmd/cyclic.c
index ad7fc3b..40e966d 100644
--- a/cmd/cyclic.c
+++ b/cmd/cyclic.c
@@ -8,11 +8,12 @@
* Copyright (C) 2022 Stefan Roese <sr@denx.de>
*/
-#include <common.h>
#include <command.h>
#include <cyclic.h>
#include <div64.h>
#include <malloc.h>
+#include <time.h>
+#include <vsprintf.h>
#include <linux/delay.h>
struct cyclic_demo_info {
diff --git a/cmd/date.c b/cmd/date.c
index 4f98b47..755adec 100644
--- a/cmd/date.c
+++ b/cmd/date.c
@@ -7,7 +7,6 @@
/*
* RTC, Date & Time support: get and set date & time
*/
-#include <common.h>
#include <command.h>
#include <dm.h>
#include <rtc.h>
diff --git a/cmd/demo.c b/cmd/demo.c
index ebd5a24..5c422ac 100644
--- a/cmd/demo.c
+++ b/cmd/demo.c
@@ -6,7 +6,6 @@
* Pavel Herrmann <morpheus.ibis@gmail.com>
*/
-#include <common.h>
#include <command.h>
#include <dm.h>
#include <dm-demo.h>
diff --git a/cmd/dfu.c b/cmd/dfu.c
index d7bfb53..46f0190 100644
--- a/cmd/dfu.c
+++ b/cmd/dfu.c
@@ -10,7 +10,6 @@
* Lukasz Majewski <l.majewski@samsung.com>
*/
-#include <common.h>
#include <command.h>
#include <watchdog.h>
#include <dfu.h>
diff --git a/cmd/diag.c b/cmd/diag.c
index f51536d..c6da5aa 100644
--- a/cmd/diag.c
+++ b/cmd/diag.c
@@ -7,7 +7,6 @@
/*
* Diagnostics support
*/
-#include <common.h>
#include <command.h>
#include <post.h>
diff --git a/cmd/disk.c b/cmd/disk.c
index 92eaa02..2efc3ca 100644
--- a/cmd/disk.c
+++ b/cmd/disk.c
@@ -3,7 +3,6 @@
* (C) Copyright 2000-2011
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
#include <bootstage.h>
#include <command.h>
#include <cpu_func.h>
diff --git a/cmd/dm.c b/cmd/dm.c
index fb605c2..ec9cfd8 100644
--- a/cmd/dm.c
+++ b/cmd/dm.c
@@ -6,7 +6,6 @@
* Marek Vasut <marex@denx.de>
*/
-#include <common.h>
#include <command.h>
#include <dm/root.h>
#include <dm/util.h>
diff --git a/cmd/echo.c b/cmd/echo.c
index fda844e..973213a 100644
--- a/cmd/echo.c
+++ b/cmd/echo.c
@@ -4,7 +4,6 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
#include <command.h>
static int do_echo(struct cmd_tbl *cmdtp, int flag, int argc,
diff --git a/cmd/eeprom.c b/cmd/eeprom.c
index 322765a..26f3750 100644
--- a/cmd/eeprom.c
+++ b/cmd/eeprom.c
@@ -19,12 +19,12 @@
*
*/
-#include <common.h>
#include <config.h>
#include <command.h>
#include <eeprom.h>
#include <i2c.h>
#include <eeprom_layout.h>
+#include <vsprintf.h>
#include <linux/delay.h>
#ifndef I2C_RXTX_LEN
diff --git a/cmd/efi.c b/cmd/efi.c
index 6cd5361..6bed2d7 100644
--- a/cmd/efi.c
+++ b/cmd/efi.c
@@ -4,7 +4,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <command.h>
#include <efi.h>
#include <efi_api.h>
diff --git a/cmd/efi_common.c b/cmd/efi_common.c
index 1aa2351..c46764e 100644
--- a/cmd/efi_common.c
+++ b/cmd/efi_common.c
@@ -6,7 +6,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <efi.h>
#include <efi_api.h>
#include <uuid.h>
diff --git a/cmd/eficonfig.c b/cmd/eficonfig.c
index 8234e60..4164cb4 100644
--- a/cmd/eficonfig.c
+++ b/cmd/eficonfig.c
@@ -7,7 +7,6 @@
#include <ansi.h>
#include <cli.h>
-#include <common.h>
#include <charset.h>
#include <efi_loader.h>
#include <efi_load_initrd.h>
@@ -1419,7 +1418,7 @@
}
bo->initrd_info.current_path = calloc(1, EFICONFIG_FILE_PATH_BUF_SIZE);
- if (!bo->file_info.current_path) {
+ if (!bo->initrd_info.current_path) {
ret = EFI_OUT_OF_RESOURCES;
goto out;
}
diff --git a/cmd/eficonfig_sbkey.c b/cmd/eficonfig_sbkey.c
index caca274..b3325a5 100644
--- a/cmd/eficonfig_sbkey.c
+++ b/cmd/eficonfig_sbkey.c
@@ -6,7 +6,6 @@
*/
#include <ansi.h>
-#include <common.h>
#include <charset.h>
#include <hexdump.h>
#include <log.h>
diff --git a/cmd/efidebug.c b/cmd/efidebug.c
index a587860..e978e74 100644
--- a/cmd/efidebug.c
+++ b/cmd/efidebug.c
@@ -6,7 +6,6 @@
*/
#include <charset.h>
-#include <common.h>
#include <command.h>
#include <dm/device.h>
#include <efi_dt_fixup.h>
@@ -1397,6 +1396,8 @@
ret = efi_bootmgr_load(&image, &load_options);
printf("efi_bootmgr_load() returned: %ld\n", ret & ~EFI_ERROR_MASK);
+ if (ret != EFI_SUCCESS)
+ return CMD_RET_SUCCESS;
/* We call efi_start_image() even if error for test purpose. */
ret = EFI_CALL(efi_start_image(image, &exit_data_size, &exit_data));
@@ -1404,8 +1405,6 @@
if (ret && exit_data)
efi_free_pool(exit_data);
- efi_restore_gd();
-
free(load_options);
return CMD_RET_SUCCESS;
}
diff --git a/cmd/elf.c b/cmd/elf.c
index df4354d..a02361f 100644
--- a/cmd/elf.c
+++ b/cmd/elf.c
@@ -4,7 +4,6 @@
* All rights reserved.
*/
-#include <common.h>
#include <command.h>
#include <cpu_func.h>
#include <elf.h>
diff --git a/cmd/ethsw.c b/cmd/ethsw.c
index f8b8a79..4bf49ac 100644
--- a/cmd/ethsw.c
+++ b/cmd/ethsw.c
@@ -5,13 +5,13 @@
* Ethernet Switch commands
*/
-#include <common.h>
#include <command.h>
#include <env.h>
#include <errno.h>
#include <env_flags.h>
#include <ethsw.h>
#include <net.h>
+#include <vsprintf.h>
static const char *ethsw_name;
diff --git a/cmd/event.c b/cmd/event.c
index f6cdb55..00c8287 100644
--- a/cmd/event.c
+++ b/cmd/event.c
@@ -6,7 +6,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <command.h>
#include <event.h>
diff --git a/cmd/exit.c b/cmd/exit.c
index 7bf241e..d125ec1 100644
--- a/cmd/exit.c
+++ b/cmd/exit.c
@@ -4,8 +4,8 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
#include <command.h>
+#include <vsprintf.h>
static int do_exit(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[])
diff --git a/cmd/ext2.c b/cmd/ext2.c
index a0ce0cf..45c8b35 100644
--- a/cmd/ext2.c
+++ b/cmd/ext2.c
@@ -19,7 +19,6 @@
/*
* Ext2fs support
*/
-#include <common.h>
#include <command.h>
#include <fs.h>
diff --git a/cmd/ext4.c b/cmd/ext4.c
index 4791b69..40d1fe3 100644
--- a/cmd/ext4.c
+++ b/cmd/ext4.c
@@ -25,7 +25,6 @@
* file in uboot. Added ext4fs ls load and write support.
*/
-#include <common.h>
#include <part.h>
#include <config.h>
#include <command.h>
diff --git a/cmd/extension_board.c b/cmd/extension_board.c
index 2b672d8..f43bf68 100644
--- a/cmd/extension_board.c
+++ b/cmd/extension_board.c
@@ -4,7 +4,6 @@
* Köry Maincent, Bootlin, <kory.maincent@bootlin.com>
*/
-#include <common.h>
#include <bootdev.h>
#include <command.h>
#include <dm.h>
diff --git a/cmd/fastboot.c b/cmd/fastboot.c
index c3c1923..d4cfc0c 100644
--- a/cmd/fastboot.c
+++ b/cmd/fastboot.c
@@ -6,7 +6,6 @@
* (C) Copyright 2014 Linaro, Ltd.
* Rob Herring <robh@kernel.org>
*/
-#include <common.h>
#include <command.h>
#include <console.h>
#include <g_dnl.h>
diff --git a/cmd/fat.c b/cmd/fat.c
index 69ce1fa..ad0e5ed 100644
--- a/cmd/fat.c
+++ b/cmd/fat.c
@@ -7,7 +7,6 @@
/*
* Boot support
*/
-#include <common.h>
#include <command.h>
#include <mapmem.h>
#include <fat.h>
diff --git a/cmd/fdt.c b/cmd/fdt.c
index 331564c..d16b141 100644
--- a/cmd/fdt.c
+++ b/cmd/fdt.c
@@ -7,7 +7,6 @@
* Matthew McClintock <msm@freescale.com>
*/
-#include <common.h>
#include <command.h>
#include <env.h>
#include <image.h>
diff --git a/cmd/flash.c b/cmd/flash.c
index f4f85ec..de0e04f 100644
--- a/cmd/flash.c
+++ b/cmd/flash.c
@@ -7,9 +7,9 @@
/*
* FLASH support
*/
-#include <common.h>
#include <command.h>
#include <log.h>
+#include <vsprintf.h>
#include <uuid.h>
#if defined(CONFIG_CMD_MTDPARTS)
diff --git a/cmd/font.c b/cmd/font.c
index cb39c88..ebde094 100644
--- a/cmd/font.c
+++ b/cmd/font.c
@@ -6,7 +6,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <command.h>
#include <dm.h>
#include <video.h>
diff --git a/cmd/fpga.c b/cmd/fpga.c
index 8c64e957..93f1409 100644
--- a/cmd/fpga.c
+++ b/cmd/fpga.c
@@ -7,7 +7,6 @@
/*
* FPGA support
*/
-#include <common.h>
#include <command.h>
#include <env.h>
#include <fpga.h>
diff --git a/cmd/fpgad.c b/cmd/fpgad.c
index dfc6220..b4bfaa1 100644
--- a/cmd/fpgad.c
+++ b/cmd/fpgad.c
@@ -8,10 +8,10 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
#include <command.h>
#include <console.h>
#include <display_options.h>
+#include <vsprintf.h>
#include <gdsys_fpga.h>
diff --git a/cmd/fs.c b/cmd/fs.c
index 46cb43d..3d7e06d 100644
--- a/cmd/fs.c
+++ b/cmd/fs.c
@@ -5,7 +5,6 @@
* Inspired by cmd_ext_common.c, cmd_fat.c.
*/
-#include <common.h>
#include <command.h>
#include <fs.h>
diff --git a/cmd/fs_uuid.c b/cmd/fs_uuid.c
index 5dc94aa..5f7770d 100644
--- a/cmd/fs_uuid.c
+++ b/cmd/fs_uuid.c
@@ -5,7 +5,6 @@
* Copyright (C) 2014, Bachmann electronic GmbH
*/
-#include <common.h>
#include <command.h>
#include <fs.h>
diff --git a/cmd/fuse.c b/cmd/fuse.c
index f884c89..598ef49 100644
--- a/cmd/fuse.c
+++ b/cmd/fuse.c
@@ -8,11 +8,11 @@
* Martha Marx <mmarx@silicontkx.com>
*/
-#include <common.h>
#include <command.h>
#include <console.h>
#include <fuse.h>
#include <mapmem.h>
+#include <vsprintf.h>
#include <linux/errno.h>
static int strtou32(const char *str, unsigned int base, u32 *result)
diff --git a/cmd/gettime.c b/cmd/gettime.c
index 2e74e02..fc307ef 100644
--- a/cmd/gettime.c
+++ b/cmd/gettime.c
@@ -11,8 +11,8 @@
/*
* Get Timer overflows after 2^32 / CONFIG_SYS_HZ (32Khz) = 131072 sec
*/
-#include <common.h>
#include <command.h>
+#include <time.h>
static int do_gettime(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[])
diff --git a/cmd/gpio.c b/cmd/gpio.c
index dab6f70..7a43dc6 100644
--- a/cmd/gpio.c
+++ b/cmd/gpio.c
@@ -6,7 +6,6 @@
* Licensed under the GPL-2 or later.
*/
-#include <common.h>
#include <command.h>
#include <errno.h>
#include <dm.h>
diff --git a/cmd/gpt.c b/cmd/gpt.c
index d7e9652..36b112d 100644
--- a/cmd/gpt.c
+++ b/cmd/gpt.c
@@ -10,7 +10,6 @@
* author: Piotr Wilczek <p.wilczek@samsung.com>
*/
-#include <common.h>
#include <blk.h>
#include <env.h>
#include <log.h>
@@ -643,6 +642,10 @@
free(str_disk_guid);
free(partitions);
+ /* initialize partition table */
+ if (blk_enabled())
+ part_init(blk_dev_desc);
+
return ret;
}
diff --git a/cmd/hash.c b/cmd/hash.c
index 5534a73..60d482b 100644
--- a/cmd/hash.c
+++ b/cmd/hash.c
@@ -9,7 +9,6 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
#include <command.h>
#include <hash.h>
#include <linux/ctype.h>
diff --git a/cmd/help.c b/cmd/help.c
index 9f8393e..56579e2 100644
--- a/cmd/help.c
+++ b/cmd/help.c
@@ -4,7 +4,6 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
#include <command.h>
static int do_help(struct cmd_tbl *cmdtp, int flag, int argc,
diff --git a/cmd/history.c b/cmd/history.c
index b6bf467..8972986 100644
--- a/cmd/history.c
+++ b/cmd/history.c
@@ -4,7 +4,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <command.h>
#include <cli.h>
diff --git a/cmd/host.c b/cmd/host.c
index c33c2a9..e03576b 100644
--- a/cmd/host.c
+++ b/cmd/host.c
@@ -3,7 +3,6 @@
* Copyright (c) 2012, Google Inc.
*/
-#include <common.h>
#include <command.h>
#include <dm.h>
#include <fs.h>
diff --git a/cmd/i2c.c b/cmd/i2c.c
index 8083156..7dac0a9 100644
--- a/cmd/i2c.c
+++ b/cmd/i2c.c
@@ -64,7 +64,6 @@
* Adapted from cmd_mem.c which is copyright Wolfgang Denk (wd@denx.de).
*/
-#include <common.h>
#include <bootretry.h>
#include <cli.h>
#include <command.h>
diff --git a/cmd/ide.c b/cmd/ide.c
index ddc87d3..036489f 100644
--- a/cmd/ide.c
+++ b/cmd/ide.c
@@ -8,7 +8,6 @@
* IDE support
*/
-#include <common.h>
#include <blk.h>
#include <dm.h>
#include <config.h>
diff --git a/cmd/ini.c b/cmd/ini.c
index 35de237..9639901 100644
--- a/cmd/ini.c
+++ b/cmd/ini.c
@@ -11,9 +11,9 @@
* http://code.google.com/p/inih/
*/
-#include <common.h>
#include <command.h>
#include <env.h>
+#include <vsprintf.h>
#include <linux/ctype.h>
#include <linux/string.h>
diff --git a/cmd/io.c b/cmd/io.c
index 2de1111..617373d 100644
--- a/cmd/io.c
+++ b/cmd/io.c
@@ -7,9 +7,9 @@
* IO space access commands.
*/
-#include <common.h>
#include <command.h>
#include <display_options.h>
+#include <vsprintf.h>
#include <asm/io.h>
/* Display values from last command */
diff --git a/cmd/iotrace.c b/cmd/iotrace.c
index f28359e..0a041ed 100644
--- a/cmd/iotrace.c
+++ b/cmd/iotrace.c
@@ -3,9 +3,9 @@
* Copyright (c) 2014 Google, Inc
*/
-#include <common.h>
#include <command.h>
#include <iotrace.h>
+#include <vsprintf.h>
static void do_print_stats(void)
{
diff --git a/cmd/irq.c b/cmd/irq.c
index 1d3e28c..655aba5 100644
--- a/cmd/irq.c
+++ b/cmd/irq.c
@@ -3,7 +3,6 @@
* Copyright 2008 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <config.h>
#include <command.h>
#include <irq_func.h>
diff --git a/cmd/itest.c b/cmd/itest.c
index 74414cb..b79512a 100644
--- a/cmd/itest.c
+++ b/cmd/itest.c
@@ -11,11 +11,11 @@
* A few parts were lifted from bash 'test' command
*/
-#include <common.h>
#include <config.h>
#include <command.h>
#include <env.h>
#include <mapmem.h>
+#include <vsprintf.h>
#include <asm/io.h>
diff --git a/cmd/jffs2.c b/cmd/jffs2.c
index e00fcc2..89d336f 100644
--- a/cmd/jffs2.c
+++ b/cmd/jffs2.c
@@ -70,7 +70,6 @@
/*
* JFFS2/CRAMFS support
*/
-#include <common.h>
#include <command.h>
#include <env.h>
#if defined(CONFIG_CMD_FLASH)
diff --git a/cmd/kaslrseed.c b/cmd/kaslrseed.c
index 9acb8e1..e0d3c7f 100644
--- a/cmd/kaslrseed.c
+++ b/cmd/kaslrseed.c
@@ -6,7 +6,6 @@
* Copyright (c) 2021, Chris Morgan <macromorgan@hotmail.com>
*/
-#include <common.h>
#include <command.h>
#include <dm.h>
#include <hexdump.h>
diff --git a/cmd/led.c b/cmd/led.c
index 48a02ba..4256b34 100644
--- a/cmd/led.c
+++ b/cmd/led.c
@@ -4,7 +4,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <command.h>
#include <dm.h>
#include <led.h>
diff --git a/cmd/legacy-mtd-utils.c b/cmd/legacy-mtd-utils.c
index 5903a90..1a52710 100644
--- a/cmd/legacy-mtd-utils.c
+++ b/cmd/legacy-mtd-utils.c
@@ -1,6 +1,5 @@
// SPDX-License-Identifier: GPL-2.0+
-#include <common.h>
#include <jffs2/jffs2.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
diff --git a/cmd/legacy_led.c b/cmd/legacy_led.c
index 5256255..50de7e8 100644
--- a/cmd/legacy_led.c
+++ b/cmd/legacy_led.c
@@ -9,10 +9,9 @@
* Ulf Samuelsson <ulf.samuelsson@atmel.com>
*/
-#include <common.h>
-#include <config.h>
#include <command.h>
#include <status_led.h>
+#include <vsprintf.h>
struct led_tbl_s {
char *string; /* String for use in the command */
diff --git a/cmd/license.c b/cmd/license.c
index 15411b5..161663f 100644
--- a/cmd/license.c
+++ b/cmd/license.c
@@ -4,7 +4,6 @@
* Author: Harald Welte <laforge@openmoko.org>
*/
-#include <common.h>
#include <command.h>
#include <gzip.h>
#include <malloc.h>
diff --git a/cmd/load.c b/cmd/load.c
index 540361b..ace1c52 100644
--- a/cmd/load.c
+++ b/cmd/load.c
@@ -7,7 +7,6 @@
/*
* Serial up- and download support
*/
-#include <common.h>
#include <command.h>
#include <console.h>
#include <cpu_func.h>
diff --git a/cmd/log.c b/cmd/log.c
index c9a23e4..519ec76 100644
--- a/cmd/log.c
+++ b/cmd/log.c
@@ -4,7 +4,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <command.h>
#include <dm.h>
#include <getopt.h>
diff --git a/cmd/lsblk.c b/cmd/lsblk.c
index d214daf..7c00bfd 100644
--- a/cmd/lsblk.c
+++ b/cmd/lsblk.c
@@ -4,7 +4,6 @@
* Niel Fourie, DENX Software Engineering, lusus@denx.de.
*/
-#include <common.h>
#include <blk.h>
#include <command.h>
#include <dm.h>
diff --git a/cmd/lzmadec.c b/cmd/lzmadec.c
index 81924da..c40b969 100644
--- a/cmd/lzmadec.c
+++ b/cmd/lzmadec.c
@@ -9,10 +9,10 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
#include <command.h>
#include <env.h>
#include <mapmem.h>
+#include <vsprintf.h>
#include <asm/io.h>
#include <lzma/LzmaTools.h>
diff --git a/cmd/mbr.c b/cmd/mbr.c
index ec99b66..7e1f92a 100644
--- a/cmd/mbr.c
+++ b/cmd/mbr.c
@@ -8,11 +8,11 @@
* based on the gpt command.
*/
-#include <common.h>
#include <blk.h>
#include <command.h>
#include <malloc.h>
#include <part.h>
+#include <vsprintf.h>
/**
* extract_val() - Extract a value from the key=value pair list
diff --git a/cmd/mdio.c b/cmd/mdio.c
index 3c74326..c0a8708 100644
--- a/cmd/mdio.c
+++ b/cmd/mdio.c
@@ -8,7 +8,6 @@
* MDIO Commands
*/
-#include <common.h>
#include <command.h>
#include <dm.h>
#include <miiphy.h>
diff --git a/cmd/mem.c b/cmd/mem.c
index 768057e..4989d27 100644
--- a/cmd/mem.c
+++ b/cmd/mem.c
@@ -10,7 +10,6 @@
* Copied from FADS ROM, Dan Malek (dmalek@jlc.net)
*/
-#include <common.h>
#include <console.h>
#include <bootretry.h>
#include <cli.h>
@@ -24,6 +23,7 @@
#include <log.h>
#include <mapmem.h>
#include <rand.h>
+#include <time.h>
#include <watchdog.h>
#include <asm/global_data.h>
#include <asm/io.h>
diff --git a/cmd/meson/sm.c b/cmd/meson/sm.c
index de9a242..b69f812 100644
--- a/cmd/meson/sm.c
+++ b/cmd/meson/sm.c
@@ -9,11 +9,11 @@
*/
#include <command.h>
-#include <common.h>
#include <env.h>
#include <asm/arch/sm.h>
#include <stdlib.h>
#include <display_options.h>
+#include <vsprintf.h>
static int do_sm_serial(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[])
diff --git a/cmd/mii.c b/cmd/mii.c
index fab420e..ce37248 100644
--- a/cmd/mii.c
+++ b/cmd/mii.c
@@ -8,7 +8,6 @@
* MII Utilities
*/
-#include <common.h>
#include <command.h>
#include <dm.h>
#include <miiphy.h>
diff --git a/cmd/misc.c b/cmd/misc.c
index ec32b41..792d972 100644
--- a/cmd/misc.c
+++ b/cmd/misc.c
@@ -8,7 +8,6 @@
* A command interface to access misc devices with MISC uclass driver APIs.
*/
-#include <common.h>
#include <command.h>
#include <dm.h>
#include <errno.h>
diff --git a/cmd/mmc.c b/cmd/mmc.c
index 2d5430a..7244a90 100644
--- a/cmd/mmc.c
+++ b/cmd/mmc.c
@@ -4,7 +4,6 @@
* Kyle Harris, kharris@nexus-tech.net
*/
-#include <common.h>
#include <blk.h>
#include <command.h>
#include <console.h>
@@ -14,6 +13,7 @@
#include <part.h>
#include <sparse_format.h>
#include <image-sparse.h>
+#include <vsprintf.h>
static int curr_device = -1;
diff --git a/cmd/mp.c b/cmd/mp.c
index 1b4373f..b9b5e01 100644
--- a/cmd/mp.c
+++ b/cmd/mp.c
@@ -3,9 +3,9 @@
* Copyright 2008-2009 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <command.h>
#include <cpu_func.h>
+#include <vsprintf.h>
static int cpu_status_all(void)
{
diff --git a/cmd/mtd.c b/cmd/mtd.c
index 9083a68..795aaa2 100644
--- a/cmd/mtd.c
+++ b/cmd/mtd.c
@@ -9,8 +9,10 @@
*/
#include <command.h>
-#include <common.h>
#include <console.h>
+#if CONFIG_IS_ENABLED(CMD_MTD_OTP)
+#include <hexdump.h>
+#endif
#include <malloc.h>
#include <mapmem.h>
#include <mtd.h>
@@ -202,6 +204,221 @@
return true;
}
+#if CONFIG_IS_ENABLED(CMD_MTD_OTP)
+static int do_mtd_otp_read(struct cmd_tbl *cmdtp, int flag, int argc,
+ char *const argv[])
+{
+ struct mtd_info *mtd;
+ size_t retlen;
+ off_t from;
+ size_t len;
+ bool user;
+ int ret;
+ u8 *buf;
+
+ if (argc != 5)
+ return CMD_RET_USAGE;
+
+ if (!strcmp(argv[2], "u"))
+ user = true;
+ else if (!strcmp(argv[2], "f"))
+ user = false;
+ else
+ return CMD_RET_USAGE;
+
+ mtd = get_mtd_by_name(argv[1]);
+ if (IS_ERR_OR_NULL(mtd))
+ return CMD_RET_FAILURE;
+
+ from = simple_strtoul(argv[3], NULL, 0);
+ len = simple_strtoul(argv[4], NULL, 0);
+
+ ret = CMD_RET_FAILURE;
+
+ buf = malloc(len);
+ if (!buf)
+ goto put_mtd;
+
+ printf("Reading %s OTP from 0x%lx, %zu bytes\n",
+ user ? "user" : "factory", from, len);
+
+ if (user)
+ ret = mtd_read_user_prot_reg(mtd, from, len, &retlen, buf);
+ else
+ ret = mtd_read_fact_prot_reg(mtd, from, len, &retlen, buf);
+ if (ret) {
+ free(buf);
+ pr_err("OTP read failed: %d\n", ret);
+ ret = CMD_RET_FAILURE;
+ goto put_mtd;
+ }
+
+ if (retlen != len)
+ pr_err("OTP read returns %zu, but %zu expected\n",
+ retlen, len);
+
+ print_hex_dump("", 0, 16, 1, buf, retlen, true);
+
+ free(buf);
+
+ ret = CMD_RET_SUCCESS;
+
+put_mtd:
+ put_mtd_device(mtd);
+
+ return ret;
+}
+
+static int do_mtd_otp_lock(struct cmd_tbl *cmdtp, int flag, int argc,
+ char *const argv[])
+{
+ struct mtd_info *mtd;
+ off_t from;
+ size_t len;
+ int ret;
+
+ if (argc != 4)
+ return CMD_RET_USAGE;
+
+ mtd = get_mtd_by_name(argv[1]);
+ if (IS_ERR_OR_NULL(mtd))
+ return CMD_RET_FAILURE;
+
+ from = simple_strtoul(argv[2], NULL, 0);
+ len = simple_strtoul(argv[3], NULL, 0);
+
+ ret = mtd_lock_user_prot_reg(mtd, from, len);
+ if (ret) {
+ pr_err("OTP lock failed: %d\n", ret);
+ ret = CMD_RET_FAILURE;
+ goto put_mtd;
+ }
+
+ ret = CMD_RET_SUCCESS;
+
+put_mtd:
+ put_mtd_device(mtd);
+
+ return ret;
+}
+
+static int do_mtd_otp_write(struct cmd_tbl *cmdtp, int flag, int argc,
+ char *const argv[])
+{
+ struct mtd_info *mtd;
+ size_t retlen;
+ size_t binlen;
+ u8 *binbuf;
+ off_t from;
+ int ret;
+
+ if (argc != 4)
+ return CMD_RET_USAGE;
+
+ mtd = get_mtd_by_name(argv[1]);
+ if (IS_ERR_OR_NULL(mtd))
+ return CMD_RET_FAILURE;
+
+ from = simple_strtoul(argv[2], NULL, 0);
+ binlen = strlen(argv[3]) / 2;
+
+ ret = CMD_RET_FAILURE;
+ binbuf = malloc(binlen);
+ if (!binbuf)
+ goto put_mtd;
+
+ hex2bin(binbuf, argv[3], binlen);
+
+ printf("Will write:\n");
+
+ print_hex_dump("", 0, 16, 1, binbuf, binlen, true);
+
+ printf("to 0x%lx\n", from);
+
+ printf("Continue (y/n)?\n");
+
+ if (confirm_yesno() != 1) {
+ pr_err("OTP write canceled\n");
+ ret = CMD_RET_SUCCESS;
+ goto put_mtd;
+ }
+
+ ret = mtd_write_user_prot_reg(mtd, from, binlen, &retlen, binbuf);
+ if (ret) {
+ pr_err("OTP write failed: %d\n", ret);
+ ret = CMD_RET_FAILURE;
+ goto put_mtd;
+ }
+
+ if (retlen != binlen)
+ pr_err("OTP write returns %zu, but %zu expected\n",
+ retlen, binlen);
+
+ ret = CMD_RET_SUCCESS;
+
+put_mtd:
+ free(binbuf);
+ put_mtd_device(mtd);
+
+ return ret;
+}
+
+static int do_mtd_otp_info(struct cmd_tbl *cmdtp, int flag, int argc,
+ char *const argv[])
+{
+ struct otp_info otp_info;
+ struct mtd_info *mtd;
+ size_t retlen;
+ bool user;
+ int ret;
+
+ if (argc != 3)
+ return CMD_RET_USAGE;
+
+ if (!strcmp(argv[2], "u"))
+ user = true;
+ else if (!strcmp(argv[2], "f"))
+ user = false;
+ else
+ return CMD_RET_USAGE;
+
+ mtd = get_mtd_by_name(argv[1]);
+ if (IS_ERR_OR_NULL(mtd))
+ return CMD_RET_FAILURE;
+
+ if (user)
+ ret = mtd_get_user_prot_info(mtd, sizeof(otp_info), &retlen,
+ &otp_info);
+ else
+ ret = mtd_get_fact_prot_info(mtd, sizeof(otp_info), &retlen,
+ &otp_info);
+ if (ret) {
+ pr_err("OTP info failed: %d\n", ret);
+ ret = CMD_RET_FAILURE;
+ goto put_mtd;
+ }
+
+ if (retlen != sizeof(otp_info)) {
+ pr_err("OTP info returns %zu, but %zu expected\n",
+ retlen, sizeof(otp_info));
+ ret = CMD_RET_FAILURE;
+ goto put_mtd;
+ }
+
+ printf("%s OTP region info:\n", user ? "User" : "Factory");
+ printf("\tstart: %u\n", otp_info.start);
+ printf("\tlength: %u\n", otp_info.length);
+ printf("\tlocked: %u\n", otp_info.locked);
+
+ ret = CMD_RET_SUCCESS;
+
+put_mtd:
+ put_mtd_device(mtd);
+
+ return ret;
+}
+#endif
+
static int do_mtd_list(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[])
{
@@ -551,6 +768,12 @@
"\n"
"Specific functions:\n"
"mtd bad <name>\n"
+#if CONFIG_IS_ENABLED(CMD_MTD_OTP)
+ "mtd otpread <name> [u|f] <off> <size>\n"
+ "mtd otpwrite <name> <off> <hex string>\n"
+ "mtd otplock <name> <off> <size>\n"
+ "mtd otpinfo <name> [u|f]\n"
+#endif
"\n"
"With:\n"
"\t<name>: NAND partition/chip name (or corresponding DM device name or OF path)\n"
@@ -561,10 +784,20 @@
"\t<size>: length of the operation in bytes (default: the entire device)\n"
"\t\t* must be a multiple of a block for erase\n"
"\t\t* must be a multiple of a page otherwise (special case: default is a page with dump)\n"
+#if CONFIG_IS_ENABLED(CMD_MTD_OTP)
+ "\t<hex string>: hex string without '0x' and spaces. Example: ABCD1234\n"
+ "\t[u|f]: user or factory OTP region\n"
+#endif
"\n"
"The .dontskipff option forces writing empty pages, don't use it if unsure.\n");
U_BOOT_CMD_WITH_SUBCMDS(mtd, "MTD utils", mtd_help_text,
+#if CONFIG_IS_ENABLED(CMD_MTD_OTP)
+ U_BOOT_SUBCMD_MKENT(otpread, 5, 1, do_mtd_otp_read),
+ U_BOOT_SUBCMD_MKENT(otpwrite, 4, 1, do_mtd_otp_write),
+ U_BOOT_SUBCMD_MKENT(otplock, 4, 1, do_mtd_otp_lock),
+ U_BOOT_SUBCMD_MKENT(otpinfo, 3, 1, do_mtd_otp_info),
+#endif
U_BOOT_SUBCMD_MKENT(list, 1, 1, do_mtd_list),
U_BOOT_SUBCMD_MKENT_COMPLETE(read, 5, 0, do_mtd_io,
mtd_name_complete),
diff --git a/cmd/mtdparts.c b/cmd/mtdparts.c
index b31db73..f57d84d 100644
--- a/cmd/mtdparts.c
+++ b/cmd/mtdparts.c
@@ -70,7 +70,6 @@
*
*/
-#include <common.h>
#include <command.h>
#include <env.h>
#include <log.h>
diff --git a/cmd/mux.c b/cmd/mux.c
index 388fb08..2f6c08b 100644
--- a/cmd/mux.c
+++ b/cmd/mux.c
@@ -6,7 +6,6 @@
* Author: Pratyush Yadav <p.yadav@ti.com>
*/
-#include <common.h>
#include <command.h>
#include <errno.h>
#include <dm.h>
diff --git a/cmd/mvebu/bubt.c b/cmd/mvebu/bubt.c
index 744b1c2..e3f21dd 100644
--- a/cmd/mvebu/bubt.c
+++ b/cmd/mvebu/bubt.c
@@ -5,7 +5,6 @@
*/
#include <config.h>
-#include <common.h>
#include <command.h>
#include <env.h>
#include <image.h>
diff --git a/cmd/mvebu/comphy_rx_training.c b/cmd/mvebu/comphy_rx_training.c
index 4ee8f54..5653877 100644
--- a/cmd/mvebu/comphy_rx_training.c
+++ b/cmd/mvebu/comphy_rx_training.c
@@ -5,7 +5,6 @@
* SPDX-License-Identifier: GPL-2.0
*/
-#include <common.h>
#include <command.h>
#include <console.h>
#include <dm.h>
diff --git a/cmd/nand.c b/cmd/nand.c
index fe834c4..5a328e0 100644
--- a/cmd/nand.c
+++ b/cmd/nand.c
@@ -23,7 +23,6 @@
* only
*/
-#include <common.h>
#include <bootstage.h>
#include <image.h>
#include <asm/cache.h>
diff --git a/cmd/net.c b/cmd/net.c
index d407d83..b206ff5 100644
--- a/cmd/net.c
+++ b/cmd/net.c
@@ -9,7 +9,6 @@
/*
* Boot support
*/
-#include <common.h>
#include <bootstage.h>
#include <command.h>
#include <dm.h>
diff --git a/cmd/nvedit.c b/cmd/nvedit.c
index e77338f..98a687b 100644
--- a/cmd/nvedit.c
+++ b/cmd/nvedit.c
@@ -23,7 +23,7 @@
* environment. After that, we use a hash table.
*/
-#include <common.h>
+#include <config.h>
#include <cli.h>
#include <command.h>
#include <console.h>
diff --git a/cmd/nvedit_efi.c b/cmd/nvedit_efi.c
index 7a30b5c..64ae2ad 100644
--- a/cmd/nvedit_efi.c
+++ b/cmd/nvedit_efi.c
@@ -6,7 +6,6 @@
*/
#include <charset.h>
-#include <common.h>
#include <command.h>
#include <efi_loader.h>
#include <efi_variable.h>
diff --git a/cmd/nvme.c b/cmd/nvme.c
index 09d5f43..f2c9acb 100644
--- a/cmd/nvme.c
+++ b/cmd/nvme.c
@@ -4,7 +4,6 @@
* Copyright (C) 2017 Bin Meng <bmeng.cn@gmail.com>
*/
-#include <common.h>
#include <blk.h>
#include <command.h>
#include <dm.h>
diff --git a/cmd/onenand.c b/cmd/onenand.c
index fad7815..6e808ce 100644
--- a/cmd/onenand.c
+++ b/cmd/onenand.c
@@ -9,7 +9,6 @@
* published by the Free Software Foundation.
*/
-#include <common.h>
#include <command.h>
#include <malloc.h>
#include <linux/printk.h>
diff --git a/cmd/optee_rpmb.c b/cmd/optee_rpmb.c
index e0e44bb..b155278 100644
--- a/cmd/optee_rpmb.c
+++ b/cmd/optee_rpmb.c
@@ -4,7 +4,6 @@
*/
#include <command.h>
-#include <common.h>
#include <env.h>
#include <errno.h>
#include <image.h>
@@ -87,8 +86,10 @@
rc = tee_shm_alloc(tee, name_size,
TEE_SHM_ALLOC, &shm_name);
- if (rc)
- return -ENOMEM;
+ if (rc) {
+ rc = -ENOMEM;
+ goto close_session;
+ }
rc = tee_shm_alloc(tee, buffer_size,
TEE_SHM_ALLOC, &shm_buf);
@@ -125,6 +126,9 @@
tee_shm_free(shm_buf);
free_name:
tee_shm_free(shm_name);
+close_session:
+ tee_close_session(tee, session);
+ tee = NULL;
return rc;
}
@@ -139,17 +143,20 @@
struct tee_param param[2];
size_t name_size = strlen(name) + 1;
+ if (!value_size)
+ return -EINVAL;
+
if (!tee) {
if (avb_ta_open_session())
return -ENODEV;
}
- if (!value_size)
- return -EINVAL;
rc = tee_shm_alloc(tee, name_size,
TEE_SHM_ALLOC, &shm_name);
- if (rc)
- return -ENOMEM;
+ if (rc) {
+ rc = -ENOMEM;
+ goto close_session;
+ }
rc = tee_shm_alloc(tee, value_size,
TEE_SHM_ALLOC, &shm_buf);
@@ -178,6 +185,9 @@
tee_shm_free(shm_buf);
free_name:
tee_shm_free(shm_name);
+close_session:
+ tee_close_session(tee, session);
+ tee = NULL;
return rc;
}
diff --git a/cmd/osd.c b/cmd/osd.c
index 210bc5d..5671338 100644
--- a/cmd/osd.c
+++ b/cmd/osd.c
@@ -9,7 +9,6 @@
* Dirk Eibach, Guntermann & Drunck GmbH, eibach@gdsys.de
*/
-#include <common.h>
#include <command.h>
#include <dm.h>
#include <hexdump.h>
diff --git a/cmd/panic.c b/cmd/panic.c
index f13b3f0..7c0affa 100644
--- a/cmd/panic.c
+++ b/cmd/panic.c
@@ -3,7 +3,7 @@
* Copyright (c) 2020 Theobroma Systems Design und Consulting GmbH
*/
-#include <common.h>
+#include <vsprintf.h>
#include <command.h>
static int do_panic(struct cmd_tbl *cmdtp, int flag, int argc,
diff --git a/cmd/part.c b/cmd/part.c
index c75f85a..d140a1e 100644
--- a/cmd/part.c
+++ b/cmd/part.c
@@ -15,7 +15,6 @@
* Pavel Bartusek <pba@sysgo.com>
*/
-#include <common.h>
#include <config.h>
#include <command.h>
#include <env.h>
diff --git a/cmd/pcap.c b/cmd/pcap.c
index a014920..8d61096 100644
--- a/cmd/pcap.c
+++ b/cmd/pcap.c
@@ -4,8 +4,8 @@
* Ramon Fried <rfried.dev@gmail.com>
*/
-#include <common.h>
#include <command.h>
+#include <vsprintf.h>
#include <net.h>
#include <net/pcap.h>
diff --git a/cmd/pci.c b/cmd/pci.c
index d89e71c..3c0aed5 100644
--- a/cmd/pci.c
+++ b/cmd/pci.c
@@ -12,7 +12,6 @@
* PCI routines
*/
-#include <common.h>
#include <bootretry.h>
#include <cli.h>
#include <command.h>
diff --git a/cmd/pci_mps.c b/cmd/pci_mps.c
index 98161da..19e71db 100644
--- a/cmd/pci_mps.c
+++ b/cmd/pci_mps.c
@@ -6,7 +6,6 @@
* PCI Express Maximum Packet Size (MPS) configuration
*/
-#include <common.h>
#include <bootretry.h>
#include <cli.h>
#include <command.h>
diff --git a/cmd/pinmux.c b/cmd/pinmux.c
index 105f01e..01f3e4a 100644
--- a/cmd/pinmux.c
+++ b/cmd/pinmux.c
@@ -3,7 +3,6 @@
* Copyright (C) 2018, STMicroelectronics - All Rights Reserved
*/
-#include <common.h>
#include <command.h>
#include <dm.h>
#include <errno.h>
diff --git a/cmd/pmc.c b/cmd/pmc.c
index 9a3ba2b..1a3416f 100644
--- a/cmd/pmc.c
+++ b/cmd/pmc.c
@@ -5,7 +5,6 @@
* Copyright 2019 Google LLC
*/
-#include <common.h>
#include <command.h>
#include <dm.h>
#include <power/acpi_pmc.h>
diff --git a/cmd/pmic.c b/cmd/pmic.c
index c9e9730..3ad1b8a 100644
--- a/cmd/pmic.c
+++ b/cmd/pmic.c
@@ -3,7 +3,6 @@
* Copyright (C) 2014-2015 Samsung Electronics
* Przemyslaw Marczak <p.marczak@samsung.com>
*/
-#include <common.h>
#include <command.h>
#include <errno.h>
#include <dm.h>
diff --git a/cmd/printf.c b/cmd/printf.c
index 0c6887e..a1727ac 100644
--- a/cmd/printf.c
+++ b/cmd/printf.c
@@ -84,12 +84,12 @@
* We try to be compatible.
*/
-#include <common.h>
#include <ctype.h>
#include <errno.h>
#include <stddef.h>
#include <stdio.h>
#include <stdlib.h>
+#include <vsprintf.h>
#define WANT_HEX_ESCAPES 0
#define PRINT_CONVERSION_ERROR 1
diff --git a/cmd/pvblock.c b/cmd/pvblock.c
index 1b604c3..3a83ac9 100644
--- a/cmd/pvblock.c
+++ b/cmd/pvblock.c
@@ -6,7 +6,6 @@
*/
#include <blk.h>
-#include <common.h>
#include <command.h>
/* Current I/O Device */
diff --git a/cmd/pxe.c b/cmd/pxe.c
index 21134eb..ae02c28 100644
--- a/cmd/pxe.c
+++ b/cmd/pxe.c
@@ -4,12 +4,12 @@
* Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved.
*/
-#include <common.h>
#include <command.h>
#include <fs.h>
#include <net.h>
#include <net6.h>
#include <malloc.h>
+#include <vsprintf.h>
#include "pxe_utils.h"
diff --git a/cmd/qfw.c b/cmd/qfw.c
index 1b8c775..1b10811 100644
--- a/cmd/qfw.c
+++ b/cmd/qfw.c
@@ -3,7 +3,6 @@
* (C) Copyright 2015 Miao Yan <yanmiaobest@gmail.com>
*/
-#include <common.h>
#include <command.h>
#include <env.h>
#include <errno.h>
diff --git a/cmd/read.c b/cmd/read.c
index 1218e7a..af54bd1 100644
--- a/cmd/read.c
+++ b/cmd/read.c
@@ -8,10 +8,10 @@
* Software Foundation.
*/
-#include <common.h>
#include <command.h>
#include <mapmem.h>
#include <part.h>
+#include <vsprintf.h>
static int
do_rw(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
diff --git a/cmd/reginfo.c b/cmd/reginfo.c
index c8a04b1..53b8bc4 100644
--- a/cmd/reginfo.c
+++ b/cmd/reginfo.c
@@ -4,7 +4,6 @@
* Subodh Nijsure, SkyStream Networks, snijsure@skystream.com
*/
-#include <common.h>
#include <command.h>
#include <asm/ppc.h>
diff --git a/cmd/regulator.c b/cmd/regulator.c
index 635a9ad..da29809 100644
--- a/cmd/regulator.c
+++ b/cmd/regulator.c
@@ -3,7 +3,6 @@
* Copyright (C) 2014-2015 Samsung Electronics
* Przemyslaw Marczak <p.marczak@samsung.com>
*/
-#include <common.h>
#include <command.h>
#include <errno.h>
#include <dm.h>
diff --git a/cmd/remoteproc.c b/cmd/remoteproc.c
index ea8724a..3c5b6a0 100644
--- a/cmd/remoteproc.c
+++ b/cmd/remoteproc.c
@@ -3,7 +3,6 @@
* (C) Copyright 2015
* Texas Instruments Incorporated - https://www.ti.com/
*/
-#include <common.h>
#include <command.h>
#include <dm.h>
#include <errno.h>
diff --git a/cmd/riscv/sbi.c b/cmd/riscv/sbi.c
index bd9d9c4..a231604 100644
--- a/cmd/riscv/sbi.c
+++ b/cmd/riscv/sbi.c
@@ -5,7 +5,6 @@
* Copyright (c) 2020, Heinrich Schuchardt <xypron.glpk@gmx.de>
*/
-#include <common.h>
#include <command.h>
#include <asm/sbi.h>
@@ -29,6 +28,8 @@
{ 6, "Coffer" },
{ 7, "Xen Project" },
{ 8, "PolarFire Hart Software Services" },
+ { 9, "coreboot" },
+ { 10, "oreboot" },
};
static struct sbi_ext extensions[] = {
@@ -54,6 +55,7 @@
{ SBI_EXT_NACL, "Nested Acceleration Extension" },
{ SBI_EXT_STA, "Steal-time Accounting Extension" },
{ SBI_EXT_DBTR, "Debug Trigger Extension" },
+ { SBI_EXT_SSE, "Supervisor Software Events" },
};
static int do_sbi(struct cmd_tbl *cmdtp, int flag, int argc,
diff --git a/cmd/rkmtd.c b/cmd/rkmtd.c
index 5b80427..a870c11 100644
--- a/cmd/rkmtd.c
+++ b/cmd/rkmtd.c
@@ -8,7 +8,6 @@
* Copyright (C) 2023 Johan Jonker <jbx6244@gmail.com>
*/
-#include <common.h>
#include <blk.h>
#include <command.h>
#include <dm.h>
diff --git a/cmd/rng.c b/cmd/rng.c
index b073a6c..2fb7202 100644
--- a/cmd/rng.c
+++ b/cmd/rng.c
@@ -4,7 +4,6 @@
*
* Copyright (c) 2019, Heinrich Schuchardt <xypron.glpk@gmx.de>
*/
-#include <common.h>
#include <command.h>
#include <dm.h>
#include <hexdump.h>
@@ -17,7 +16,7 @@
u8 buf[64];
int devnum;
struct udevice *dev;
- int ret = CMD_RET_SUCCESS;
+ int ret = CMD_RET_SUCCESS, err;
if (argc == 2 && !strcmp(argv[1], "list")) {
int idx = 0;
@@ -62,8 +61,9 @@
n = min(n, sizeof(buf));
- if (dm_rng_read(dev, buf, n)) {
- printf("Reading RNG failed\n");
+ err = dm_rng_read(dev, buf, n);
+ if (err) {
+ puts(err == -EINTR ? "Abort\n" : "Reading RNG failed\n");
ret = CMD_RET_FAILURE;
} else {
print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, buf, n);
diff --git a/cmd/rockusb.c b/cmd/rockusb.c
index 0708856..48497aa 100644
--- a/cmd/rockusb.c
+++ b/cmd/rockusb.c
@@ -3,7 +3,6 @@
* Copyright (C) 2017 Eddie Cai <eddie.cai.linux@gmail.com>
*/
-#include <common.h>
#include <command.h>
#include <console.h>
#include <g_dnl.h>
diff --git a/cmd/rtc.c b/cmd/rtc.c
index a344cfa..a931fd9 100644
--- a/cmd/rtc.c
+++ b/cmd/rtc.c
@@ -1,6 +1,5 @@
// SPDX-License-Identifier: GPL-2.0+
-#include <common.h>
#include <command.h>
#include <display_options.h>
#include <dm.h>
diff --git a/cmd/sata.c b/cmd/sata.c
index 9c9fe11..8b923f9 100644
--- a/cmd/sata.c
+++ b/cmd/sata.c
@@ -9,7 +9,6 @@
* Dave Liu <daveliu@freescale.com>
*/
-#include <common.h>
#include <ahci.h>
#include <blk.h>
#include <dm.h>
diff --git a/cmd/sb.c b/cmd/sb.c
index 0d55818..1aa5921 100644
--- a/cmd/sb.c
+++ b/cmd/sb.c
@@ -4,7 +4,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <command.h>
#include <dm.h>
#include <spl.h>
diff --git a/cmd/scp03.c b/cmd/scp03.c
index 2b8d5ae..9c749d1 100644
--- a/cmd/scp03.c
+++ b/cmd/scp03.c
@@ -4,7 +4,6 @@
*
*/
-#include <common.h>
#include <command.h>
#include <env.h>
#include <scp03.h>
diff --git a/cmd/scsi.c b/cmd/scsi.c
index c501d7f..c286bdc 100644
--- a/cmd/scsi.c
+++ b/cmd/scsi.c
@@ -7,7 +7,6 @@
/*
* SCSI support.
*/
-#include <common.h>
#include <blk.h>
#include <command.h>
#include <scsi.h>
diff --git a/cmd/seama.c b/cmd/seama.c
index 3aafb43..3c8e819 100644
--- a/cmd/seama.c
+++ b/cmd/seama.c
@@ -4,7 +4,6 @@
* Support for the "SEAttle iMAge" SEAMA NAND image format
*/
-#include <common.h>
#include <command.h>
#include <nand.h>
diff --git a/cmd/setexpr.c b/cmd/setexpr.c
index ab76824..e111b8b 100644
--- a/cmd/setexpr.c
+++ b/cmd/setexpr.c
@@ -8,7 +8,6 @@
* This file provides a shell like 'expr' function to return.
*/
-#include <common.h>
#include <config.h>
#include <command.h>
#include <ctype.h>
@@ -16,6 +15,8 @@
#include <log.h>
#include <malloc.h>
#include <mapmem.h>
+#include <vsprintf.h>
+#include <linux/errno.h>
#include <linux/sizes.h>
#include "printf.h"
diff --git a/cmd/sf.c b/cmd/sf.c
index 730996c..f43a2e0 100644
--- a/cmd/sf.c
+++ b/cmd/sf.c
@@ -5,7 +5,6 @@
* Copyright (C) 2008 Atmel Corporation
*/
-#include <common.h>
#include <command.h>
#include <display_options.h>
#include <div64.h>
@@ -14,6 +13,7 @@
#include <malloc.h>
#include <mapmem.h>
#include <spi.h>
+#include <time.h>
#include <spi_flash.h>
#include <asm/cache.h>
#include <jffs2/jffs2.h>
@@ -135,8 +135,9 @@
}
flash = NULL;
if (use_dt) {
- spi_flash_probe_bus_cs(bus, cs, &new);
- flash = dev_get_uclass_priv(new);
+ ret = spi_flash_probe_bus_cs(bus, cs, &new);
+ if (!ret)
+ flash = dev_get_uclass_priv(new);
} else {
flash = spi_flash_probe(bus, cs, speed, mode);
}
diff --git a/cmd/sha1sum.c b/cmd/sha1sum.c
index bcc665a..52aa26c 100644
--- a/cmd/sha1sum.c
+++ b/cmd/sha1sum.c
@@ -7,7 +7,6 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
#include <command.h>
#include <hash.h>
#include <u-boot/sha1.h>
diff --git a/cmd/sleep.c b/cmd/sleep.c
index c741b4a..7616fed 100644
--- a/cmd/sleep.c
+++ b/cmd/sleep.c
@@ -4,9 +4,10 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
#include <command.h>
#include <console.h>
+#include <time.h>
+#include <vsprintf.h>
#include <linux/delay.h>
static int do_sleep(struct cmd_tbl *cmdtp, int flag, int argc,
diff --git a/cmd/smccc.c b/cmd/smccc.c
index fb80431..3a4d885 100644
--- a/cmd/smccc.c
+++ b/cmd/smccc.c
@@ -4,8 +4,8 @@
* Michalis Pappas <mpappas@fastmail.fm>
*/
#include <asm/psci.h>
-#include <common.h>
#include <command.h>
+#include <vsprintf.h>
#include <linux/arm-smccc.h>
#include <linux/compiler.h>
#include <linux/psci.h>
diff --git a/cmd/sound.c b/cmd/sound.c
index 0b7f959..08bf741 100644
--- a/cmd/sound.c
+++ b/cmd/sound.c
@@ -4,7 +4,6 @@
* Rajeshwari Shinde <rajeshwari.s@samsung.com>
*/
-#include <common.h>
#include <command.h>
#include <dm.h>
#include <fdtdec.h>
diff --git a/cmd/source.c b/cmd/source.c
index 0ba9736..c9b5f8e 100644
--- a/cmd/source.c
+++ b/cmd/source.c
@@ -14,7 +14,6 @@
/* #define DEBUG */
-#include <common.h>
#include <command.h>
#include <env.h>
#include <image.h>
diff --git a/cmd/spi.c b/cmd/spi.c
index f30018f..ea30c85 100644
--- a/cmd/spi.c
+++ b/cmd/spi.c
@@ -8,7 +8,6 @@
* SPI Read/Write Utilities
*/
-#include <common.h>
#include <command.h>
#include <dm.h>
#include <errno.h>
diff --git a/cmd/spl.c b/cmd/spl.c
index 8a2ded7..d1f47c7 100644
--- a/cmd/spl.c
+++ b/cmd/spl.c
@@ -4,7 +4,6 @@
* Corscience GmbH & Co. KG - Simon Schwarz <schwarz@corscience.de>
*/
-#include <common.h>
#include <command.h>
#include <cmd_spl.h>
#include <env.h>
diff --git a/cmd/stackprot_test.c b/cmd/stackprot_test.c
index f347028..e7ff4a0 100644
--- a/cmd/stackprot_test.c
+++ b/cmd/stackprot_test.c
@@ -3,7 +3,6 @@
* Copyright 2021 Broadcom
*/
-#include <common.h>
#include <command.h>
static int do_test_stackprot_fail(struct cmd_tbl *cmdtp, int flag, int argc,
diff --git a/cmd/strings.c b/cmd/strings.c
index bf348af..5bcb0f2 100644
--- a/cmd/strings.c
+++ b/cmd/strings.c
@@ -7,8 +7,8 @@
*/
#include <config.h>
-#include <common.h>
#include <command.h>
+#include <vsprintf.h>
static char *start_addr, *last_addr;
diff --git a/cmd/sysboot.c b/cmd/sysboot.c
index 63a7806..0ea08fd 100644
--- a/cmd/sysboot.c
+++ b/cmd/sysboot.c
@@ -1,10 +1,10 @@
// SPDX-License-Identifier: GPL-2.0+
-#include <common.h>
#include <command.h>
#include <env.h>
#include <fs.h>
#include <pxe_utils.h>
+#include <vsprintf.h>
/**
* struct sysboot_info - useful information for sysboot helpers
@@ -77,6 +77,10 @@
if (argc < 6) {
filename = env_get("bootfile");
+ if (!filename) {
+ printf("Specify a filename or set the ${bootfile} environment variable\n");
+ return 1;
+ }
} else {
filename = argv[5];
env_set("bootfile", filename);
diff --git a/cmd/temperature.c b/cmd/temperature.c
index 420965d..41e422f 100644
--- a/cmd/temperature.c
+++ b/cmd/temperature.c
@@ -5,7 +5,6 @@
* Written by Robert Marko <robert.marko@sartura.hr>
*/
-#include <common.h>
#include <command.h>
#include <dm.h>
#include <thermal.h>
diff --git a/cmd/terminal.c b/cmd/terminal.c
index 9e32a41..369a755 100644
--- a/cmd/terminal.c
+++ b/cmd/terminal.c
@@ -7,7 +7,6 @@
/*
* Boot support
*/
-#include <common.h>
#include <command.h>
#include <stdio_dev.h>
#include <serial.h>
diff --git a/cmd/test.c b/cmd/test.c
index fa7c48f..b4c3eab 100644
--- a/cmd/test.c
+++ b/cmd/test.c
@@ -4,10 +4,10 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
#include <command.h>
#include <fs.h>
#include <log.h>
+#include <vsprintf.h>
#define OP_INVALID 0
#define OP_NOT 1
diff --git a/cmd/thordown.c b/cmd/thordown.c
index 48e22b3..70061bf 100644
--- a/cmd/thordown.c
+++ b/cmd/thordown.c
@@ -6,7 +6,6 @@
* All rights reserved.
*/
-#include <common.h>
#include <command.h>
#include <thor.h>
#include <dfu.h>
diff --git a/cmd/ti/ddr3.c b/cmd/ti/ddr3.c
index bbd406f..70ce53d 100644
--- a/cmd/ti/ddr3.c
+++ b/cmd/ti/ddr3.c
@@ -12,7 +12,6 @@
#include <asm/arch/hardware.h>
#include <asm/cache.h>
#include <asm/emif.h>
-#include <common.h>
#include <command.h>
#include <asm/global_data.h>
diff --git a/cmd/ti/pd.c b/cmd/ti/pd.c
index a0492a5..305023a 100644
--- a/cmd/ti/pd.c
+++ b/cmd/ti/pd.c
@@ -5,7 +5,6 @@
* Copyright (C) 2020 Texas Instruments Incorporated, <www.ti.com>
*/
-#include <common.h>
#include <command.h>
#include <dm.h>
#include <k3-dev.h>
diff --git a/cmd/time.c b/cmd/time.c
index db8c189..eee6084 100644
--- a/cmd/time.c
+++ b/cmd/time.c
@@ -3,7 +3,6 @@
* Copyright (c) 2011 The Chromium OS Authors.
*/
-#include <common.h>
#include <command.h>
static void report_time(ulong cycles)
diff --git a/cmd/timer.c b/cmd/timer.c
index 551be5d..04fcd84 100644
--- a/cmd/timer.c
+++ b/cmd/timer.c
@@ -4,8 +4,8 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
#include <command.h>
+#include <time.h>
static int do_timer(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[])
diff --git a/cmd/tlv_eeprom.c b/cmd/tlv_eeprom.c
index 57cfd35..0aec752 100644
--- a/cmd/tlv_eeprom.c
+++ b/cmd/tlv_eeprom.c
@@ -9,7 +9,6 @@
* Copyright (C) 2014,2016 david_yang <david_yang@accton.com>
*/
-#include <common.h>
#include <command.h>
#include <dm.h>
#include <i2c.h>
diff --git a/cmd/tpm-common.c b/cmd/tpm-common.c
index a7dc23d..1cd57f9 100644
--- a/cmd/tpm-common.c
+++ b/cmd/tpm-common.c
@@ -3,7 +3,6 @@
* Copyright (c) 2013 The Chromium OS Authors.
*/
-#include <common.h>
#include <command.h>
#include <dm.h>
#include <env.h>
diff --git a/cmd/tpm-v1.c b/cmd/tpm-v1.c
index 1b1efcd..6e019d1 100644
--- a/cmd/tpm-v1.c
+++ b/cmd/tpm-v1.c
@@ -3,10 +3,10 @@
* Copyright (c) 2013 The Chromium OS Authors.
*/
-#include <common.h>
#include <command.h>
#include <env.h>
#include <malloc.h>
+#include <vsprintf.h>
#include <asm/unaligned.h>
#include <tpm-common.h>
#include <tpm-v1.h>
diff --git a/cmd/tpm-v2.c b/cmd/tpm-v2.c
index 7e479b9..99c540b 100644
--- a/cmd/tpm-v2.c
+++ b/cmd/tpm-v2.c
@@ -4,7 +4,6 @@
* Author: Miquel Raynal <miquel.raynal@bootlin.com>
*/
-#include <common.h>
#include <command.h>
#include <dm.h>
#include <log.h>
diff --git a/cmd/tpm_test.c b/cmd/tpm_test.c
index c7fa6e7..9c8b1c7 100644
--- a/cmd/tpm_test.c
+++ b/cmd/tpm_test.c
@@ -3,10 +3,10 @@
* Copyright (c) 2015 Google, Inc
*/
-#include <common.h>
#include <command.h>
#include <cpu_func.h>
#include <log.h>
+#include <time.h>
#include <tpm-v1.h>
#include <linux/printk.h>
#include "tpm-user-utils.h"
diff --git a/cmd/trace.c b/cmd/trace.c
index 2e3ee1d..937e6a6 100644
--- a/cmd/trace.c
+++ b/cmd/trace.c
@@ -3,11 +3,11 @@
* Copyright (c) 2011 The Chromium OS Authors.
*/
-#include <common.h>
#include <command.h>
#include <env.h>
#include <mapmem.h>
#include <trace.h>
+#include <vsprintf.h>
#include <asm/io.h>
static int get_args(int argc, char *const argv[], char **buff,
diff --git a/cmd/tsi148.c b/cmd/tsi148.c
index 0d849d9..113b4e6 100644
--- a/cmd/tsi148.c
+++ b/cmd/tsi148.c
@@ -7,10 +7,10 @@
* (C) Copyright 2003 Stefan Roese, stefan.roese@esd-electronics.com
*/
-#include <common.h>
#include <command.h>
#include <log.h>
#include <malloc.h>
+#include <vsprintf.h>
#include <asm/io.h>
#include <pci.h>
diff --git a/cmd/ubi.c b/cmd/ubi.c
index 0a6a80b..8c1b5df 100644
--- a/cmd/ubi.c
+++ b/cmd/ubi.c
@@ -11,7 +11,6 @@
* published by the Free Software Foundation.
*/
-#include <common.h>
#include <command.h>
#include <env.h>
#include <exports.h>
diff --git a/cmd/ubifs.c b/cmd/ubifs.c
index 2a035bc..8fd3903 100644
--- a/cmd/ubifs.c
+++ b/cmd/ubifs.c
@@ -11,11 +11,11 @@
#undef DEBUG
-#include <common.h>
#include <config.h>
#include <command.h>
#include <log.h>
#include <ubifs_uboot.h>
+#include <vsprintf.h>
static int ubifs_initialized;
static int ubifs_mounted;
diff --git a/cmd/ufs.c b/cmd/ufs.c
index 536bd85..6e21fbb 100644
--- a/cmd/ufs.c
+++ b/cmd/ufs.c
@@ -5,9 +5,9 @@
* Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com
*
*/
-#include <common.h>
#include <command.h>
#include <ufs.h>
+#include <vsprintf.h>
static int do_ufs(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
{
diff --git a/cmd/universe.c b/cmd/universe.c
index fb3a32d..d1a7128 100644
--- a/cmd/universe.c
+++ b/cmd/universe.c
@@ -3,9 +3,9 @@
* (C) Copyright 2003 Stefan Roese, stefan.roese@esd-electronics.com
*/
-#include <common.h>
#include <command.h>
#include <malloc.h>
+#include <vsprintf.h>
#include <asm/io.h>
#include <pci.h>
diff --git a/cmd/unlz4.c b/cmd/unlz4.c
index 5f20838..fc52001 100644
--- a/cmd/unlz4.c
+++ b/cmd/unlz4.c
@@ -4,9 +4,9 @@
* FUJITSU COMPUTERTECHNOLOGIES LIMITED. All rights reserved.
*/
-#include <common.h>
#include <command.h>
#include <env.h>
+#include <vsprintf.h>
#include <u-boot/lz4.h>
static int do_unlz4(struct cmd_tbl *cmdtp, int flag, int argc,
diff --git a/cmd/unzip.c b/cmd/unzip.c
index bc6cee0..e7a3f98 100644
--- a/cmd/unzip.c
+++ b/cmd/unzip.c
@@ -4,12 +4,12 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
#include <command.h>
#include <env.h>
#include <gzip.h>
#include <mapmem.h>
#include <part.h>
+#include <vsprintf.h>
static int do_unzip(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[])
diff --git a/cmd/usb.c b/cmd/usb.c
index 23253f2..3a3764a 100644
--- a/cmd/usb.c
+++ b/cmd/usb.c
@@ -10,7 +10,6 @@
* project.
*/
-#include <common.h>
#include <blk.h>
#include <bootstage.h>
#include <command.h>
diff --git a/cmd/usb_gadget_sdp.c b/cmd/usb_gadget_sdp.c
index cbdda73..39259a3 100644
--- a/cmd/usb_gadget_sdp.c
+++ b/cmd/usb_gadget_sdp.c
@@ -6,7 +6,6 @@
* Author: Stefan Agner <stefan.agner@toradex.com>
*/
-#include <common.h>
#include <command.h>
#include <g_dnl.h>
#include <sdp.h>
diff --git a/cmd/usb_mass_storage.c b/cmd/usb_mass_storage.c
index 751701f..47e8b70 100644
--- a/cmd/usb_mass_storage.c
+++ b/cmd/usb_mass_storage.c
@@ -6,7 +6,6 @@
* Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved.
*/
-#include <common.h>
#include <blk.h>
#include <command.h>
#include <console.h>
diff --git a/cmd/vbe.c b/cmd/vbe.c
index 0e84b0e..423d9e5 100644
--- a/cmd/vbe.c
+++ b/cmd/vbe.c
@@ -6,7 +6,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <bloblist.h>
#include <bootmeth.h>
#include <bootstd.h>
diff --git a/cmd/version.c b/cmd/version.c
index d99a44f..53db1a0 100644
--- a/cmd/version.c
+++ b/cmd/version.c
@@ -4,7 +4,6 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
#include <command.h>
#include <display_options.h>
#include <version_string.h>
diff --git a/cmd/video.c b/cmd/video.c
index 942f81c..91bd6de 100644
--- a/cmd/video.c
+++ b/cmd/video.c
@@ -6,7 +6,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <command.h>
#include <dm.h>
#include <video.h>
diff --git a/cmd/virtio.c b/cmd/virtio.c
index 019e317..a42a563 100644
--- a/cmd/virtio.c
+++ b/cmd/virtio.c
@@ -4,7 +4,6 @@
* Copyright (C) 2018, Bin Meng <bmeng.cn@gmail.com>
*/
-#include <common.h>
#include <blk.h>
#include <command.h>
#include <dm.h>
diff --git a/cmd/w1.c b/cmd/w1.c
index 3209e65..e462e78 100644
--- a/cmd/w1.c
+++ b/cmd/w1.c
@@ -4,7 +4,6 @@
* Microchip Technology, Inc.
* Eugen Hristev <eugen.hristev@microchip.com>
*/
-#include <common.h>
#include <command.h>
#include <dm.h>
#include <w1.h>
diff --git a/cmd/wdt.c b/cmd/wdt.c
index b9fdf7a..c7a06cc 100644
--- a/cmd/wdt.c
+++ b/cmd/wdt.c
@@ -5,7 +5,6 @@
* Copyright (c) 2019 Michael Walle <michael@walle.cc>
*/
-#include <common.h>
#include <command.h>
#include <dm.h>
#include <wdt.h>
diff --git a/cmd/wol.c b/cmd/wol.c
index f0d6343..45d4ae3 100644
--- a/cmd/wol.c
+++ b/cmd/wol.c
@@ -7,9 +7,9 @@
/*
* Wake-on-LAN support
*/
-#include <common.h>
#include <command.h>
#include <net.h>
+#include <vsprintf.h>
#if defined(CONFIG_CMD_WOL)
void wol_set_timeout(ulong);
diff --git a/cmd/x86/Makefile b/cmd/x86/Makefile
index 5f82204..b1f39d3 100644
--- a/cmd/x86/Makefile
+++ b/cmd/x86/Makefile
@@ -5,3 +5,4 @@
obj-$(CONFIG_CMD_EXCEPTION) += exception.o
obj-$(CONFIG_USE_HOB) += hob.o
obj-$(CONFIG_HAVE_FSP) += fsp.o
+obj-$(CONFIG_CMD_ZBOOT) += zboot.o
diff --git a/cmd/x86/cbsysinfo.c b/cmd/x86/cbsysinfo.c
index 84822a3..7ca2e13 100644
--- a/cmd/x86/cbsysinfo.c
+++ b/cmd/x86/cbsysinfo.c
@@ -4,7 +4,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <asm/cb_sysinfo.h>
#include <command.h>
#include <console.h>
diff --git a/cmd/x86/fsp.c b/cmd/x86/fsp.c
index 82e4415..2620ab8 100644
--- a/cmd/x86/fsp.c
+++ b/cmd/x86/fsp.c
@@ -3,7 +3,6 @@
* Copyright (C) 2014-2015, Bin Meng <bmeng.cn@gmail.com>
*/
-#include <common.h>
#include <command.h>
#include <asm/fsp/fsp_support.h>
#include <asm/global_data.h>
diff --git a/cmd/x86/hob.c b/cmd/x86/hob.c
index 04d092d..2dd3080 100644
--- a/cmd/x86/hob.c
+++ b/cmd/x86/hob.c
@@ -3,7 +3,6 @@
* Copyright (C) 2014-2015, Bin Meng <bmeng.cn@gmail.com>
*/
-#include <common.h>
#include <command.h>
#include <efi.h>
#include <uuid.h>
diff --git a/cmd/x86/mtrr.c b/cmd/x86/mtrr.c
index 6ad7a12..b2afb59 100644
--- a/cmd/x86/mtrr.c
+++ b/cmd/x86/mtrr.c
@@ -3,9 +3,9 @@
* (C) Copyright 2014 Google, Inc
*/
-#include <common.h>
#include <command.h>
#include <log.h>
+#include <vsprintf.h>
#include <asm/msr.h>
#include <asm/mp.h>
#include <asm/mtrr.h>
diff --git a/cmd/x86/zboot.c b/cmd/x86/zboot.c
new file mode 100644
index 0000000..addf28c
--- /dev/null
+++ b/cmd/x86/zboot.c
@@ -0,0 +1,182 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2011 The Chromium OS Authors.
+ * (C) Copyright 2002
+ * Daniel Engström, Omicron Ceti AB, <daniel@omicron.se>
+ */
+
+#include <command.h>
+#include <mapmem.h>
+#include <vsprintf.h>
+#include <asm/zimage.h>
+
+static int do_zboot_start(struct cmd_tbl *cmdtp, int flag, int argc,
+ char *const argv[])
+{
+ ulong bzimage_addr = 0, bzimage_size, initrd_addr, initrd_size;
+ ulong base_addr;
+ const char *s, *cmdline;
+
+ /* argv[1] holds the address of the bzImage */
+ s = cmd_arg1(argc, argv) ? : env_get("fileaddr");
+ if (s)
+ bzimage_addr = hextoul(s, NULL);
+ bzimage_size = argc > 2 ? hextoul(argv[2], NULL) : 0;
+ initrd_addr = argc > 3 ? hextoul(argv[3], NULL) : 0;
+ initrd_size = argc > 4 ? hextoul(argv[4], NULL) : 0;
+ base_addr = argc > 5 ? hextoul(argv[5], NULL) : 0;
+ cmdline = argc > 6 ? env_get(argv[6]) : NULL;
+
+ zboot_start(bzimage_addr, bzimage_size, initrd_addr, initrd_size,
+ base_addr, cmdline);
+
+ return 0;
+}
+
+static int do_zboot_load(struct cmd_tbl *cmdtp, int flag, int argc,
+ char *const argv[])
+{
+ int ret;
+
+ ret = zboot_load();
+ if (ret)
+ return ret;
+
+ return 0;
+}
+
+static int do_zboot_setup(struct cmd_tbl *cmdtp, int flag, int argc,
+ char *const argv[])
+{
+ if (!state.base_ptr) {
+ printf("base is not set: use 'zboot load' first\n");
+ return CMD_RET_FAILURE;
+ }
+ if (zboot_setup()) {
+ puts("Setting up boot parameters failed ...\n");
+ return CMD_RET_FAILURE;
+ }
+
+ if (zboot_setup())
+ return CMD_RET_FAILURE;
+
+ return 0;
+}
+
+static int do_zboot_info(struct cmd_tbl *cmdtp, int flag, int argc,
+ char *const argv[])
+{
+ zboot_info();
+
+ return 0;
+}
+
+static int do_zboot_go(struct cmd_tbl *cmdtp, int flag, int argc,
+ char *const argv[])
+{
+ int ret;
+
+ ret = zboot_go();
+ if (ret) {
+ printf("Kernel returned! (err=%d)\n", ret);
+ return CMD_RET_FAILURE;
+ }
+
+ return 0;
+}
+
+static int do_zboot_dump(struct cmd_tbl *cmdtp, int flag, int argc,
+ char *const argv[])
+{
+ struct boot_params *base_ptr = state.base_ptr;
+
+ if (argc > 1)
+ base_ptr = (void *)hextoul(argv[1], NULL);
+ if (!base_ptr) {
+ printf("No zboot setup_base\n");
+ return CMD_RET_FAILURE;
+ }
+ zimage_dump(base_ptr, true);
+
+ return 0;
+}
+
+/* Note: This defines the complete_zboot() function */
+U_BOOT_SUBCMDS(zboot,
+ U_BOOT_CMD_MKENT(start, 8, 1, do_zboot_start, "", ""),
+ U_BOOT_CMD_MKENT(load, 1, 1, do_zboot_load, "", ""),
+ U_BOOT_CMD_MKENT(setup, 1, 1, do_zboot_setup, "", ""),
+ U_BOOT_CMD_MKENT(info, 1, 1, do_zboot_info, "", ""),
+ U_BOOT_CMD_MKENT(go, 1, 1, do_zboot_go, "", ""),
+ U_BOOT_CMD_MKENT(dump, 2, 1, do_zboot_dump, "", ""),
+)
+
+int do_zboot_states(struct cmd_tbl *cmdtp, int flag, int argc,
+ char *const argv[], int state_mask)
+{
+ int ret;
+
+ if (flag & ZBOOT_STATE_START)
+ ret = do_zboot_start(cmdtp, flag, argc, argv);
+ if (!ret && (flag & ZBOOT_STATE_LOAD))
+ ret = do_zboot_load(cmdtp, flag, argc, argv);
+ if (!ret && (flag & ZBOOT_STATE_SETUP))
+ ret = do_zboot_setup(cmdtp, flag, argc, argv);
+ if (!ret && (flag & ZBOOT_STATE_INFO))
+ ret = do_zboot_info(cmdtp, flag, argc, argv);
+ if (!ret && (flag & ZBOOT_STATE_GO))
+ ret = do_zboot_go(cmdtp, flag, argc, argv);
+ if (ret)
+ return ret;
+
+ return 0;
+}
+
+int do_zboot_parent(struct cmd_tbl *cmdtp, int flag, int argc,
+ char *const argv[], int *repeatable)
+{
+ /* determine if we have a sub command */
+ if (argc > 1) {
+ char *endp;
+
+ hextoul(argv[1], &endp);
+ /*
+ * endp pointing to nul means that argv[1] was just a valid
+ * number, so pass it along to the normal processing
+ */
+ if (*endp)
+ return do_zboot(cmdtp, flag, argc, argv, repeatable);
+ }
+
+ do_zboot_states(cmdtp, flag, argc, argv, ZBOOT_STATE_START |
+ ZBOOT_STATE_LOAD | ZBOOT_STATE_SETUP |
+ ZBOOT_STATE_INFO | ZBOOT_STATE_GO);
+
+ return CMD_RET_FAILURE;
+}
+
+U_BOOT_CMDREP_COMPLETE(
+ zboot, 8, do_zboot_parent, "Boot bzImage",
+ "[addr] [size] [initrd addr] [initrd size] [setup] [cmdline]\n"
+ " addr - The optional starting address of the bzimage.\n"
+ " If not set it defaults to the environment\n"
+ " variable \"fileaddr\".\n"
+ " size - The optional size of the bzimage. Defaults to\n"
+ " zero.\n"
+ " initrd addr - The address of the initrd image to use, if any.\n"
+ " initrd size - The size of the initrd image to use, if any.\n"
+ " setup - The address of the kernel setup region, if this\n"
+ " is not at addr\n"
+ " cmdline - Environment variable containing the kernel\n"
+ " command line, to override U-Boot's normal\n"
+ " cmdline generation\n"
+ "\n"
+ "Sub-commands to do part of the zboot sequence:\n"
+ "\tstart [addr [arg ...]] - specify arguments\n"
+ "\tload - load OS image\n"
+ "\tsetup - set up table\n"
+ "\tinfo - show summary info\n"
+ "\tgo - start OS\n"
+ "\tdump [addr] - dump info (optional address of boot params)",
+ complete_zboot
+);
diff --git a/cmd/ximg.c b/cmd/ximg.c
index 0e7eead..1467484 100644
--- a/cmd/ximg.c
+++ b/cmd/ximg.c
@@ -11,7 +11,6 @@
/*
* Multi Image extract
*/
-#include <common.h>
#include <command.h>
#include <cpu_func.h>
#include <env.h>
diff --git a/cmd/xxd.c b/cmd/xxd.c
index 446ac19..8ae05f9 100644
--- a/cmd/xxd.c
+++ b/cmd/xxd.c
@@ -4,7 +4,6 @@
* Roger Knecht <rknecht@pm.de>
*/
-#include <common.h>
#include <command.h>
#include <display_options.h>
#include <fs.h>
diff --git a/cmd/yaffs2.c b/cmd/yaffs2.c
index 27fbd1b..d0724d9 100644
--- a/cmd/yaffs2.c
+++ b/cmd/yaffs2.c
@@ -13,7 +13,6 @@
* ...
*/
-#include <common.h>
#include <config.h>
#include <command.h>
diff --git a/cmd/zfs.c b/cmd/zfs.c
index 6ef1b56..2f83153 100644
--- a/cmd/zfs.c
+++ b/cmd/zfs.c
@@ -8,7 +8,6 @@
* made from existing GRUB Sources by Sun, GNU and others.
*/
-#include <common.h>
#include <part.h>
#include <config.h>
#include <command.h>
diff --git a/cmd/zip.c b/cmd/zip.c
index 08afd62..2d25542 100644
--- a/cmd/zip.c
+++ b/cmd/zip.c
@@ -4,10 +4,10 @@
* Lei Wen <leiwen@marvell.com>, Marvell Inc.
*/
-#include <common.h>
#include <command.h>
#include <env.h>
#include <gzip.h>
+#include <vsprintf.h>
static int do_zip(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
{
diff --git a/common/Kconfig b/common/Kconfig
index 0283701..5e3070e 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -231,7 +231,7 @@
default 0x2f000000 if ARCH_SUNXI && MACH_SUN9I
default 0x4f000000 if ARCH_SUNXI && !MACH_SUN9I
default 0x0f000000 if ROCKCHIP_RK3288
- default 0x0f200000 if ROCKCHIP_RK3399
+ default 0x0f200000 if ROCKCHIP_RK3399 || ROCKCHIP_RK3328
help
This sets the start address of the pre-console buffer. This must
be in available memory and is accessed before relocation and
diff --git a/common/autoboot.c b/common/autoboot.c
index 6f0aeae..898a57b 100644
--- a/common/autoboot.c
+++ b/common/autoboot.c
@@ -4,13 +4,14 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
+#include <config.h>
#include <autoboot.h>
#include <bootretry.h>
#include <cli.h>
#include <command.h>
#include <console.h>
#include <env.h>
+#include <errno.h>
#include <fdtdec.h>
#include <hash.h>
#include <log.h>
diff --git a/common/bloblist.c b/common/bloblist.c
index ad06d7a..11d6422 100644
--- a/common/bloblist.c
+++ b/common/bloblist.c
@@ -6,7 +6,6 @@
#define LOG_CATEGORY LOGC_BLOBLIST
-#include <common.h>
#include <bloblist.h>
#include <display_options.h>
#include <log.h>
diff --git a/common/board_f.c b/common/board_f.c
index 8bada6f..212ffb3 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -9,7 +9,7 @@
* Marius Groeger <mgroeger@sysgo.de>
*/
-#include <common.h>
+#include <config.h>
#include <bloblist.h>
#include <bootstage.h>
#include <clock_legacy.h>
@@ -718,6 +718,7 @@
return 0;
}
+void mcheck_on_ramrelocation(size_t offset);
static int setup_reloc(void)
{
if (!(gd->flags & GD_FLG_SKIP_RELOC)) {
@@ -743,6 +744,9 @@
if (gd->flags & GD_FLG_SKIP_RELOC) {
debug("Skipping relocation due to flag\n");
} else {
+#ifdef MCHECK_HEAP_PROTECTION
+ mcheck_on_ramrelocation(gd->reloc_off);
+#endif
debug("Relocation Offset is: %08lx\n", gd->reloc_off);
debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
diff --git a/common/board_info.c b/common/board_info.c
index f4c385a..33c260b 100644
--- a/common/board_info.c
+++ b/common/board_info.c
@@ -1,6 +1,5 @@
// SPDX-License-Identifier: GPL-2.0+
-#include <common.h>
#include <dm.h>
#include <init.h>
#include <sysinfo.h>
diff --git a/common/board_r.c b/common/board_r.c
index da0b80f..c823cd2 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -9,7 +9,7 @@
* Marius Groeger <mgroeger@sysgo.de>
*/
-#include <common.h>
+#include <config.h>
#include <api.h>
#include <bootstage.h>
#include <cpu_func.h>
diff --git a/common/bootstage.c b/common/bootstage.c
index 0e6d807..fb6befc 100644
--- a/common/bootstage.c
+++ b/common/bootstage.c
@@ -11,7 +11,6 @@
#define LOG_CATEGORY LOGC_BOOT
-#include <common.h>
#include <bootstage.h>
#include <hang.h>
#include <log.h>
diff --git a/common/bouncebuf.c b/common/bouncebuf.c
index 934b83f..b2f87e4 100644
--- a/common/bouncebuf.c
+++ b/common/bouncebuf.c
@@ -5,7 +5,6 @@
* Copyright (C) 2012 Marek Vasut <marex@denx.de>
*/
-#include <common.h>
#include <cpu_func.h>
#include <log.h>
#include <malloc.h>
diff --git a/common/cli.c b/common/cli.c
index a349382..4694a35 100644
--- a/common/cli.c
+++ b/common/cli.c
@@ -10,7 +10,7 @@
#define pr_fmt(fmt) "cli: %s: " fmt, __func__
-#include <common.h>
+#include <ansi.h>
#include <bootstage.h>
#include <cli.h>
#include <cli_hush.h>
@@ -336,4 +336,7 @@
#if defined(CONFIG_HUSH_INIT_VAR)
hush_init_var();
#endif
+
+ if (CONFIG_IS_ENABLED(VIDEO_ANSI))
+ printf(ANSI_CURSOR_SHOW "\n");
}
diff --git a/common/cli_getch.c b/common/cli_getch.c
index 0ee7908..a5ed6eb 100644
--- a/common/cli_getch.c
+++ b/common/cli_getch.c
@@ -6,8 +6,10 @@
* Copyright 2022 Google LLC
*/
-#include <common.h>
#include <cli.h>
+#include <stdio.h>
+#include <string.h>
+#include <linux/errno.h>
/**
* enum cli_esc_state_t - indicates what to do with an escape character
diff --git a/common/cli_hush.c b/common/cli_hush.c
index 9cda97f..96a9820 100644
--- a/common/cli_hush.c
+++ b/common/cli_hush.c
@@ -75,7 +75,6 @@
#define __U_BOOT__
#ifdef __U_BOOT__
-#include <common.h> /* readline */
#include <env.h>
#include <malloc.h> /* malloc, free, realloc*/
#include <linux/ctype.h> /* isalpha, isdigit */
diff --git a/common/cli_readline.c b/common/cli_readline.c
index cf4339d..4cb82b4 100644
--- a/common/cli_readline.c
+++ b/common/cli_readline.c
@@ -8,7 +8,6 @@
* JinHua Luo, GuangDong Linux Center, <luo.jinhua@gd-linux.com>
*/
-#include <common.h>
#include <bootretry.h>
#include <cli.h>
#include <command.h>
@@ -16,6 +15,7 @@
#include <malloc.h>
#include <time.h>
#include <watchdog.h>
+#include <linux/errno.h>
#include <asm/global_data.h>
DECLARE_GLOBAL_DATA_PTR;
diff --git a/common/cli_simple.c b/common/cli_simple.c
index f89ba92..266c444 100644
--- a/common/cli_simple.c
+++ b/common/cli_simple.c
@@ -8,7 +8,6 @@
* JinHua Luo, GuangDong Linux Center, <luo.jinhua@gd-linux.com>
*/
-#include <common.h>
#include <bootretry.h>
#include <cli.h>
#include <command.h>
diff --git a/common/command.c b/common/command.c
index af8ffdb..3f69139 100644
--- a/common/command.c
+++ b/common/command.c
@@ -8,7 +8,7 @@
* Command Processor Table
*/
-#include <common.h>
+#include <config.h>
#include <compiler.h>
#include <command.h>
#include <console.h>
@@ -16,6 +16,7 @@
#include <image.h>
#include <log.h>
#include <mapmem.h>
+#include <time.h>
#include <asm/global_data.h>
#include <linux/ctype.h>
diff --git a/common/console.c b/common/console.c
index aa3053b..63f7800 100644
--- a/common/console.c
+++ b/common/console.c
@@ -4,7 +4,6 @@
* Paolo Scaffardi, AIRVENT SAM s.p.a - RIMINI(ITALY), arsenio@tin.it
*/
-#include <common.h>
#include <console.h>
#include <debug_uart.h>
#include <display_options.h>
diff --git a/common/cros_ec.c b/common/cros_ec.c
index 249d1f1..9ccc8fa 100644
--- a/common/cros_ec.c
+++ b/common/cros_ec.c
@@ -8,7 +8,6 @@
* Software Foundation.
*/
-#include <common.h>
#include <cros_ec.h>
#include <dm.h>
#include <errno.h>
diff --git a/common/ddr_spd.c b/common/ddr_spd.c
index 58dc9b3..2f6eb99 100644
--- a/common/ddr_spd.c
+++ b/common/ddr_spd.c
@@ -3,8 +3,8 @@
* Copyright 2008-2014 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <ddr_spd.h>
+#include <stdio.h>
/* used for ddr1 and ddr2 spd */
static int
diff --git a/common/dfu.c b/common/dfu.c
index 0d154e8..1af8194 100644
--- a/common/dfu.c
+++ b/common/dfu.c
@@ -10,7 +10,6 @@
* Lukasz Majewski <l.majewski@samsung.com>
*/
-#include <common.h>
#include <command.h>
#include <log.h>
#include <watchdog.h>
diff --git a/common/dlmalloc.c b/common/dlmalloc.c
index de3f042..9549c59 100644
--- a/common/dlmalloc.c
+++ b/common/dlmalloc.c
@@ -12,7 +12,6 @@
#define DEBUG
#endif
-#include <common.h>
#include <log.h>
#include <asm/global_data.h>
@@ -32,6 +31,21 @@
DECLARE_GLOBAL_DATA_PTR;
+#ifdef MCHECK_HEAP_PROTECTION
+ #define STATIC_IF_MCHECK static
+ #undef MALLOC_COPY
+ #undef MALLOC_ZERO
+static inline void MALLOC_ZERO(void *p, size_t sz) { memset(p, 0, sz); }
+static inline void MALLOC_COPY(void *dest, const void *src, size_t sz) { memcpy(dest, src, sz); }
+#else
+ #define STATIC_IF_MCHECK
+ #define mALLOc_impl mALLOc
+ #define fREe_impl fREe
+ #define rEALLOc_impl rEALLOc
+ #define mEMALIGn_impl mEMALIGn
+ #define cALLOc_impl cALLOc
+#endif
+
/*
Emulation of sbrk for WIN32
All code within the ifdef WIN32 is untested by me.
@@ -1270,10 +1284,11 @@
*/
+STATIC_IF_MCHECK
#if __STD_C
-Void_t* mALLOc(size_t bytes)
+Void_t* mALLOc_impl(size_t bytes)
#else
-Void_t* mALLOc(bytes) size_t bytes;
+Void_t* mALLOc_impl(bytes) size_t bytes;
#endif
{
mchunkptr victim; /* inspected/selected chunk */
@@ -1555,10 +1570,11 @@
*/
+STATIC_IF_MCHECK
#if __STD_C
-void fREe(Void_t* mem)
+void fREe_impl(Void_t* mem)
#else
-void fREe(mem) Void_t* mem;
+void fREe_impl(mem) Void_t* mem;
#endif
{
mchunkptr p; /* chunk corresponding to mem */
@@ -1696,10 +1712,11 @@
*/
+STATIC_IF_MCHECK
#if __STD_C
-Void_t* rEALLOc(Void_t* oldmem, size_t bytes)
+Void_t* rEALLOc_impl(Void_t* oldmem, size_t bytes)
#else
-Void_t* rEALLOc(oldmem, bytes) Void_t* oldmem; size_t bytes;
+Void_t* rEALLOc_impl(oldmem, bytes) Void_t* oldmem; size_t bytes;
#endif
{
INTERNAL_SIZE_T nb; /* padded request size */
@@ -1725,7 +1742,7 @@
#ifdef REALLOC_ZERO_BYTES_FREES
if (!bytes) {
- fREe(oldmem);
+ fREe_impl(oldmem);
return NULL;
}
#endif
@@ -1733,7 +1750,7 @@
if ((long)bytes < 0) return NULL;
/* realloc of null is supposed to be same as malloc */
- if (oldmem == NULL) return mALLOc(bytes);
+ if (oldmem == NULL) return mALLOc_impl(bytes);
#if CONFIG_IS_ENABLED(SYS_MALLOC_F)
if (!(gd->flags & GD_FLG_FULL_MALLOC_INIT)) {
@@ -1758,7 +1775,7 @@
/* Note the extra SIZE_SZ overhead. */
if(oldsize - SIZE_SZ >= nb) return oldmem; /* do nothing */
/* Must alloc, copy, free. */
- newmem = mALLOc(bytes);
+ newmem = mALLOc_impl(bytes);
if (!newmem)
return NULL; /* propagate failure */
MALLOC_COPY(newmem, oldmem, oldsize - 2*SIZE_SZ);
@@ -1869,7 +1886,7 @@
/* Must allocate */
- newmem = mALLOc (bytes);
+ newmem = mALLOc_impl (bytes);
if (newmem == NULL) /* propagate failure */
return NULL;
@@ -1886,7 +1903,7 @@
/* Otherwise copy, free, and exit */
MALLOC_COPY(newmem, oldmem, oldsize - SIZE_SZ);
- fREe(oldmem);
+ fREe_impl(oldmem);
return newmem;
} else {
VALGRIND_RESIZEINPLACE_BLOCK(oldmem, 0, bytes, SIZE_SZ);
@@ -1905,7 +1922,7 @@
set_inuse_bit_at_offset(remainder, remainder_size);
VALGRIND_MALLOCLIKE_BLOCK(chunk2mem(remainder), remainder_size, SIZE_SZ,
false);
- fREe(chunk2mem(remainder)); /* let free() deal with it */
+ fREe_impl(chunk2mem(remainder)); /* let free() deal with it */
}
else
{
@@ -1939,10 +1956,11 @@
*/
+STATIC_IF_MCHECK
#if __STD_C
-Void_t* mEMALIGn(size_t alignment, size_t bytes)
+Void_t* mEMALIGn_impl(size_t alignment, size_t bytes)
#else
-Void_t* mEMALIGn(alignment, bytes) size_t alignment; size_t bytes;
+Void_t* mEMALIGn_impl(alignment, bytes) size_t alignment; size_t bytes;
#endif
{
INTERNAL_SIZE_T nb; /* padded request size */
@@ -1965,7 +1983,7 @@
/* If need less alignment than we give anyway, just relay to malloc */
- if (alignment <= MALLOC_ALIGNMENT) return mALLOc(bytes);
+ if (alignment <= MALLOC_ALIGNMENT) return mALLOc_impl(bytes);
/* Otherwise, ensure that it is at least a minimum chunk size */
@@ -1974,7 +1992,7 @@
/* Call malloc with worst case padding to hit alignment. */
nb = request2size(bytes);
- m = (char*)(mALLOc(nb + alignment + MINSIZE));
+ m = (char*)(mALLOc_impl(nb + alignment + MINSIZE));
/*
* The attempt to over-allocate (with a size large enough to guarantee the
@@ -1990,7 +2008,7 @@
* Use bytes not nb, since mALLOc internally calls request2size too, and
* each call increases the size to allocate, to account for the header.
*/
- m = (char*)(mALLOc(bytes));
+ m = (char*)(mALLOc_impl(bytes));
/* Aligned -> return it */
if ((((unsigned long)(m)) % alignment) == 0)
return m;
@@ -1998,10 +2016,10 @@
* Otherwise, try again, requesting enough extra space to be able to
* acquire alignment.
*/
- fREe(m);
+ fREe_impl(m);
/* Add in extra bytes to match misalignment of unexpanded allocation */
extra = alignment - (((unsigned long)(m)) % alignment);
- m = (char*)(mALLOc(bytes + extra));
+ m = (char*)(mALLOc_impl(bytes + extra));
/*
* m might not be the same as before. Validate that the previous value of
* extra still works for the current value of m.
@@ -2010,7 +2028,7 @@
if (m) {
extra2 = alignment - (((unsigned long)(m)) % alignment);
if (extra2 > extra) {
- fREe(m);
+ fREe_impl(m);
m = NULL;
}
}
@@ -2060,7 +2078,7 @@
set_head(newp, newsize | PREV_INUSE);
set_inuse_bit_at_offset(newp, newsize);
set_head_size(p, leadsize);
- fREe(chunk2mem(p));
+ fREe_impl(chunk2mem(p));
p = newp;
VALGRIND_MALLOCLIKE_BLOCK(chunk2mem(p), bytes, SIZE_SZ, false);
@@ -2078,7 +2096,7 @@
set_head_size(p, nb);
VALGRIND_MALLOCLIKE_BLOCK(chunk2mem(remainder), remainder_size, SIZE_SZ,
false);
- fREe(chunk2mem(remainder));
+ fREe_impl(chunk2mem(remainder));
}
check_inuse_chunk(p);
@@ -2126,10 +2144,11 @@
*/
+STATIC_IF_MCHECK
#if __STD_C
-Void_t* cALLOc(size_t n, size_t elem_size)
+Void_t* cALLOc_impl(size_t n, size_t elem_size)
#else
-Void_t* cALLOc(n, elem_size) size_t n; size_t elem_size;
+Void_t* cALLOc_impl(n, elem_size) size_t n; size_t elem_size;
#endif
{
mchunkptr p;
@@ -2145,7 +2164,7 @@
INTERNAL_SIZE_T oldtopsize = chunksize(top);
#endif
#endif
- Void_t* mem = mALLOc (sz);
+ Void_t* mem = mALLOc_impl (sz);
if ((long)n < 0) return NULL;
@@ -2205,6 +2224,90 @@
#endif
+#ifdef MCHECK_HEAP_PROTECTION
+ #include "mcheck_core.inc.h"
+ #if !__STD_C
+ #error "must have __STD_C"
+ #endif
+
+Void_t *mALLOc(size_t bytes)
+{
+ mcheck_pedantic_prehook();
+ size_t fullsz = mcheck_alloc_prehook(bytes);
+ void *p = mALLOc_impl(fullsz);
+
+ if (!p)
+ return p;
+ return mcheck_alloc_posthook(p, bytes);
+}
+
+void fREe(Void_t *mem) { fREe_impl(mcheck_free_prehook(mem)); }
+
+Void_t *rEALLOc(Void_t *oldmem, size_t bytes)
+{
+ mcheck_pedantic_prehook();
+ if (bytes == 0) {
+ if (oldmem)
+ fREe(oldmem);
+ return NULL;
+ }
+
+ if (oldmem == NULL)
+ return mALLOc(bytes);
+
+ void *p = mcheck_reallocfree_prehook(oldmem);
+ size_t newsz = mcheck_alloc_prehook(bytes);
+
+ p = rEALLOc_impl(p, newsz);
+ if (!p)
+ return p;
+ return mcheck_alloc_noclean_posthook(p, bytes);
+}
+
+Void_t *mEMALIGn(size_t alignment, size_t bytes)
+{
+ mcheck_pedantic_prehook();
+ size_t fullsz = mcheck_memalign_prehook(alignment, bytes);
+ void *p = mEMALIGn_impl(alignment, fullsz);
+
+ if (!p)
+ return p;
+ return mcheck_memalign_posthook(alignment, p, bytes);
+}
+
+// pvALLOc, vALLOc - redirect to mEMALIGn, defined here, so they need no wrapping.
+
+Void_t *cALLOc(size_t n, size_t elem_size)
+{
+ mcheck_pedantic_prehook();
+ // NB: here is no overflow check.
+ size_t fullsz = mcheck_alloc_prehook(n * elem_size);
+ void *p = cALLOc_impl(1, fullsz);
+
+ if (!p)
+ return p;
+ return mcheck_alloc_noclean_posthook(p, n * elem_size);
+}
+
+// mcheck API {
+int mcheck_pedantic(mcheck_abortfunc_t f)
+{
+ mcheck_initialize(f, 1);
+ return 0;
+}
+
+int mcheck(mcheck_abortfunc_t f)
+{
+ mcheck_initialize(f, 0);
+ return 0;
+}
+
+void mcheck_check_all(void) { mcheck_pedantic_check(); }
+
+enum mcheck_status mprobe(void *__ptr) { return mcheck_mprobe(__ptr); }
+// mcheck API }
+#endif
+
/*
diff --git a/common/edid.c b/common/edid.c
index 556c4e3..865ba9d 100644
--- a/common/edid.c
+++ b/common/edid.c
@@ -9,7 +9,6 @@
* Copyright (C) Nalin Dahyabhai <bigfun@pobox.com>
*/
-#include <common.h>
#include <edid.h>
#include <errno.h>
#include <fdtdec.h>
diff --git a/common/eeprom/eeprom_field.c b/common/eeprom/eeprom_field.c
index f56eebe..3bacb1a 100644
--- a/common/eeprom/eeprom_field.c
+++ b/common/eeprom/eeprom_field.c
@@ -6,7 +6,8 @@
* Igor Grinberg <grinberg@compulab.co.il>
*/
-#include <common.h>
+#include <stdio.h>
+#include <vsprintf.h>
#include <linux/string.h>
#include <eeprom_field.h>
diff --git a/common/eeprom/eeprom_layout.c b/common/eeprom/eeprom_layout.c
index 5a9be1d..1a425c1 100644
--- a/common/eeprom/eeprom_layout.c
+++ b/common/eeprom/eeprom_layout.c
@@ -6,8 +6,8 @@
* Igor Grinberg <grinberg@compulab.co.il>
*/
-#include <common.h>
#include <linux/kernel.h>
+#include <linux/string.h>
#include <eeprom_layout.h>
#include <eeprom_field.h>
diff --git a/common/event.c b/common/event.c
index 16c2ba6..dda569d 100644
--- a/common/event.c
+++ b/common/event.c
@@ -9,13 +9,13 @@
#define LOG_CATEGORY LOGC_EVENT
-#include <common.h>
#include <event.h>
#include <event_internal.h>
#include <log.h>
#include <linker_lists.h>
#include <malloc.h>
#include <asm/global_data.h>
+#include <linux/errno.h>
#include <linux/list.h>
#include <relocate.h>
diff --git a/common/exports.c b/common/exports.c
index 20d8b75..48b084c 100644
--- a/common/exports.c
+++ b/common/exports.c
@@ -1,4 +1,3 @@
-#include <common.h>
#include <command.h>
#include <exports.h>
#include <malloc.h>
diff --git a/common/flash.c b/common/flash.c
index 848f44e..24ddc8b 100644
--- a/common/flash.c
+++ b/common/flash.c
@@ -6,10 +6,10 @@
/* #define DEBUG */
-#include <common.h>
#include <flash.h>
#include <log.h>
#include <uuid.h>
+#include <linux/string.h>
#include <mtd/cfi_flash.h>
diff --git a/common/hash.c b/common/hash.c
index 3d6b84d..ac63803 100644
--- a/common/hash.c
+++ b/common/hash.c
@@ -10,7 +10,6 @@
*/
#ifndef USE_HOSTCC
-#include <common.h>
#include <command.h>
#include <env.h>
#include <log.h>
diff --git a/common/hwconfig.c b/common/hwconfig.c
index cac0b63..afaa6cb 100644
--- a/common/hwconfig.c
+++ b/common/hwconfig.c
@@ -10,7 +10,6 @@
#ifndef HWCONFIG_TEST
#include <config.h>
-#include <common.h>
#include <env.h>
#include <exports.h>
#include <hwconfig.h>
diff --git a/common/init/board_init.c b/common/init/board_init.c
index ed2365d..a06ec1c 100644
--- a/common/init/board_init.c
+++ b/common/init/board_init.c
@@ -6,7 +6,7 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
+#include <config.h>
#include <bootstage.h>
#include <init.h>
#include <asm/global_data.h>
diff --git a/common/init/handoff.c b/common/init/handoff.c
index d0be1bb..a7cd065 100644
--- a/common/init/handoff.c
+++ b/common/init/handoff.c
@@ -5,7 +5,6 @@
* Copyright 2018 Google, Inc
*/
-#include <common.h>
#include <handoff.h>
#include <asm/global_data.h>
diff --git a/common/iomux.c b/common/iomux.c
index c428f71..1224c15 100644
--- a/common/iomux.c
+++ b/common/iomux.c
@@ -4,7 +4,6 @@
* Gary Jennejohn, DENX Software Engineering GmbH, garyj@denx.de.
*/
-#include <common.h>
#include <console.h>
#include <serial.h>
#include <malloc.h>
diff --git a/common/iotrace.c b/common/iotrace.c
index 63d0cca..a0a5613 100644
--- a/common/iotrace.c
+++ b/common/iotrace.c
@@ -5,7 +5,6 @@
#define IOTRACE_IMPL
-#include <common.h>
#include <mapmem.h>
#include <time.h>
#include <asm/global_data.h>
diff --git a/common/kallsyms.c b/common/kallsyms.c
index 13344e6..49b3897 100644
--- a/common/kallsyms.c
+++ b/common/kallsyms.c
@@ -5,7 +5,6 @@
* Licensed under the GPL-2 or later.
*/
-#include <common.h>
/* We need the weak marking as this symbol is provided specially */
extern const char system_map[] __attribute__((weak));
diff --git a/common/kgdb.c b/common/kgdb.c
index 29b09fc..01a09f1 100644
--- a/common/kgdb.c
+++ b/common/kgdb.c
@@ -87,7 +87,6 @@
*
****************************************************************************/
-#include <common.h>
#include <asm/ptrace.h>
#include <kgdb.h>
diff --git a/common/kgdb_stubs.c b/common/kgdb_stubs.c
index 66aed7c..256d886 100644
--- a/common/kgdb_stubs.c
+++ b/common/kgdb_stubs.c
@@ -7,7 +7,6 @@
* Licensed under the GPL-2 or later.
*/
-#include <common.h>
#include <cpu_func.h>
#include <kgdb.h>
#include <serial.h>
diff --git a/common/log.c b/common/log.c
index 42d35f0..dfee250 100644
--- a/common/log.c
+++ b/common/log.c
@@ -6,7 +6,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <display_options.h>
#include <log.h>
#include <malloc.h>
diff --git a/common/log_console.c b/common/log_console.c
index bb091ce..c27101b 100644
--- a/common/log_console.c
+++ b/common/log_console.c
@@ -6,7 +6,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <log.h>
#include <asm/global_data.h>
diff --git a/common/log_syslog.c b/common/log_syslog.c
index 53c4def..d01bb74 100644
--- a/common/log_syslog.c
+++ b/common/log_syslog.c
@@ -5,7 +5,6 @@
* Copyright (c) 2020, Heinrich Schuchardt <xypron.glpk@gmx.de>
*/
-#include <common.h>
#include <log.h>
#include <net.h>
#include <asm/global_data.h>
diff --git a/common/main.c b/common/main.c
index 82d3aaf..b0b6e74 100644
--- a/common/main.c
+++ b/common/main.c
@@ -6,7 +6,6 @@
/* #define DEBUG */
-#include <common.h>
#include <autoboot.h>
#include <button.h>
#include <bootstage.h>
diff --git a/common/malloc_simple.c b/common/malloc_simple.c
index 0a004d4..4e6d795 100644
--- a/common/malloc_simple.c
+++ b/common/malloc_simple.c
@@ -7,7 +7,6 @@
#define LOG_CATEGORY LOGC_ALLOC
-#include <common.h>
#include <log.h>
#include <malloc.h>
#include <mapmem.h>
diff --git a/common/mcheck_core.inc.h b/common/mcheck_core.inc.h
new file mode 100644
index 0000000..6902140
--- /dev/null
+++ b/common/mcheck_core.inc.h
@@ -0,0 +1,304 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2024 Free Software Foundation, Inc.
+ * Written by Eugene Uriev, based on glibc 2.0 prototype of Mike Haertel.
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Library General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * Library General Public License for more details.
+ * <https://www.gnu.org/licenses/>
+ */
+
+/*
+ * TL;DR: this is a porting of glibc mcheck into U-Boot
+ *
+ * This file contains no entities for external linkage.
+ * So mcheck protection may be used in parallel, e.g. for "malloc_simple(..)" and "malloc(..)".
+ * To do so, the file should be shared/include twice, - without linkage conflicts.
+ * I.e. "core"-part is shared as a source, but not as a binary.
+ * Maybe some optimization here make sense, to engage more binary sharing too.
+ * But, currently I strive to keep it as simple, as possible.
+ * And this, programmers'-only, mode don't pretend to be main.
+ *
+ * This library is aware of U-Boot specific. It's also aware of ARM alignment concerns.
+ * Unlike glibc-clients, U-Boot has limited malloc-usage, and only one thread.
+ * So it's better to make the protection heavier.
+ * Thus overflow canary here is greater, than glibc's one. Underflow canary is bigger too.
+ * U-Boot also allows to use fixed-size heap-registry, instead of double-linked list in glibc.
+ *
+ * Heavy canary allows to catch not only memset(..)-errors,
+ * but overflow/underflow of struct-array access:
+ * {
+ * struct mystruct* p = malloc(sizeof(struct mystruct) * N);
+ * p[-1].field1 = 0;
+ * p[N].field2 = 13;
+ * }
+ * TODO: In order to guarantee full coverage of that kind of errors, a user can add variable-size
+ * canaries here. So pre- and post-canary with size >= reqested_size, could be provided
+ * (with the price of 3x heap-usage). Therefore, it would catch 100% of changes beyond
+ * an array, for index(+1/-1) errors.
+ *
+ * U-Boot is a BL, not an OS with a lib. Activity of the library is set not in runtime,
+ * rather in compile-time, by MCHECK_HEAP_PROTECTION macro. That guarantees that
+ * we haven't missed first malloc.
+ */
+
+/*
+ * Testing
+ * This library had been successfully tested for U-Boot @ ARM SoC chip / 64bits.
+ * Proven for both default and pedantic mode: confirms U-Boot to be clean, and catches
+ * intentional/testing corruptions. Working with malloc_trim is not tested.
+ */
+#ifndef _MCHECKCORE_INC_H
+#define _MCHECKCORE_INC_H 1
+#include "mcheck.h"
+
+#if defined(MCHECK_HEAP_PROTECTION)
+#define mcheck_flood memset
+
+// these are from /dev/random:
+#define MAGICWORD 0x99ccf430fa562a05ULL
+#define MAGICFREE 0x4875e63c0c6fc08eULL
+#define MAGICTAIL 0x918dbcd7df78dcd6ULL
+#define MALLOCFLOOD ((char)0xb6)
+#define FREEFLOOD ((char)0xf5)
+#define PADDINGFLOOD ((char)0x58)
+
+// my normal run demands 4427-6449 chunks:
+#define REGISTRY_SZ 6608
+#define CANARY_DEPTH 2
+
+// avoid problems with BSS at early stage:
+static char mcheck_pedantic_flag __section(".data") = 0;
+static void *mcheck_registry[REGISTRY_SZ] __section(".data") = {0};
+static size_t mcheck_chunk_count __section(".data") = 0;
+static size_t mcheck_chunk_count_max __section(".data") = 0;
+
+typedef unsigned long long mcheck_elem;
+typedef struct {
+ mcheck_elem elems[CANARY_DEPTH];
+} mcheck_canary;
+struct mcheck_hdr {
+ size_t size; /* Exact size requested by user. */
+ size_t aln_skip; /* Ignored bytes, before the mcheck_hdr, to fulfill alignment */
+ mcheck_canary canary; /* Magic number to check header integrity. */
+};
+
+static void mcheck_default_abort(enum mcheck_status status, const void *p)
+{
+ const char *msg;
+
+ switch (status) {
+ case MCHECK_OK:
+ msg = "memory is consistent, library is buggy\n";
+ break;
+ case MCHECK_HEAD:
+ msg = "memory clobbered before allocated block\n";
+ break;
+ case MCHECK_TAIL:
+ msg = "memory clobbered past end of allocated block\n";
+ break;
+ case MCHECK_FREE:
+ msg = "block freed twice\n";
+ break;
+ default:
+ msg = "bogus mcheck_status, library is buggy\n";
+ break;
+ }
+ printf("\n\nmcheck: %p:%s!!! [%zu]\n\n", p, msg, mcheck_chunk_count_max);
+}
+
+static mcheck_abortfunc_t mcheck_abortfunc = &mcheck_default_abort;
+
+static inline size_t allign_size_up(size_t sz, size_t grain)
+{
+ return (sz + grain - 1) & ~(grain - 1);
+}
+
+#define mcheck_allign_customer_size(SZ) allign_size_up(SZ, sizeof(mcheck_elem))
+#define mcheck_evaluate_memalign_prefix_size(ALIGN) allign_size_up(sizeof(struct mcheck_hdr), ALIGN)
+
+static enum mcheck_status mcheck_OnNok(enum mcheck_status status, const void *p)
+{
+ (*mcheck_abortfunc)(status, p);
+ return status;
+}
+
+static enum mcheck_status mcheck_checkhdr(const struct mcheck_hdr *hdr)
+{
+ int i;
+
+ for (i = 0; i < CANARY_DEPTH; ++i)
+ if (hdr->canary.elems[i] == MAGICFREE)
+ return mcheck_OnNok(MCHECK_FREE, hdr + 1);
+
+ for (i = 0; i < CANARY_DEPTH; ++i)
+ if (hdr->canary.elems[i] != MAGICWORD)
+ return mcheck_OnNok(MCHECK_HEAD, hdr + 1);
+
+ const size_t payload_size = hdr->size;
+ const size_t payload_size_aligned = mcheck_allign_customer_size(payload_size);
+ const size_t padd_size = payload_size_aligned - hdr->size;
+
+ const char *payload = (const char *)&hdr[1];
+
+ for (i = 0; i < padd_size; ++i)
+ if (payload[payload_size + i] != PADDINGFLOOD)
+ return mcheck_OnNok(MCHECK_TAIL, hdr + 1);
+
+ const mcheck_canary *tail = (const mcheck_canary *)&payload[payload_size_aligned];
+
+ for (i = 0; i < CANARY_DEPTH; ++i)
+ if (tail->elems[i] != MAGICTAIL)
+ return mcheck_OnNok(MCHECK_TAIL, hdr + 1);
+ return MCHECK_OK;
+}
+
+enum { KEEP_CONTENT = 0, CLEAN_CONTENT, ANY_ALIGNMENT = 1 };
+static void *mcheck_free_helper(void *ptr, int clean_content)
+{
+ if (!ptr)
+ return ptr;
+
+ struct mcheck_hdr *hdr = &((struct mcheck_hdr *)ptr)[-1];
+ int i;
+
+ mcheck_checkhdr(hdr);
+ for (i = 0; i < CANARY_DEPTH; ++i)
+ hdr->canary.elems[i] = MAGICFREE;
+
+ if (clean_content)
+ mcheck_flood(ptr, FREEFLOOD, mcheck_allign_customer_size(hdr->size));
+
+ for (i = 0; i < REGISTRY_SZ; ++i)
+ if (mcheck_registry[i] == hdr) {
+ mcheck_registry[i] = 0;
+ break;
+ }
+
+ --mcheck_chunk_count;
+ return (char *)hdr - hdr->aln_skip;
+}
+
+static void *mcheck_free_prehook(void *ptr) { return mcheck_free_helper(ptr, CLEAN_CONTENT); }
+static void *mcheck_reallocfree_prehook(void *ptr) { return mcheck_free_helper(ptr, KEEP_CONTENT); }
+
+static size_t mcheck_alloc_prehook(size_t sz)
+{
+ sz = mcheck_allign_customer_size(sz);
+ return sizeof(struct mcheck_hdr) + sz + sizeof(mcheck_canary);
+}
+
+static void *mcheck_allocated_helper(void *altoghether_ptr, size_t customer_sz,
+ size_t alignment, int clean_content)
+{
+ const size_t slop = alignment ?
+ mcheck_evaluate_memalign_prefix_size(alignment) - sizeof(struct mcheck_hdr) : 0;
+ struct mcheck_hdr *hdr = (struct mcheck_hdr *)((char *)altoghether_ptr + slop);
+ int i;
+
+ hdr->size = customer_sz;
+ hdr->aln_skip = slop;
+ for (i = 0; i < CANARY_DEPTH; ++i)
+ hdr->canary.elems[i] = MAGICWORD;
+
+ char *payload = (char *)&hdr[1];
+
+ if (clean_content)
+ mcheck_flood(payload, MALLOCFLOOD, customer_sz);
+
+ const size_t customer_size_aligned = mcheck_allign_customer_size(customer_sz);
+
+ mcheck_flood(payload + customer_sz, PADDINGFLOOD, customer_size_aligned - customer_sz);
+
+ mcheck_canary *tail = (mcheck_canary *)&payload[customer_size_aligned];
+
+ for (i = 0; i < CANARY_DEPTH; ++i)
+ tail->elems[i] = MAGICTAIL;
+
+ ++mcheck_chunk_count;
+ if (mcheck_chunk_count > mcheck_chunk_count_max)
+ mcheck_chunk_count_max = mcheck_chunk_count;
+
+ for (i = 0; i < REGISTRY_SZ; ++i)
+ if (!mcheck_registry[i]) {
+ mcheck_registry[i] = hdr;
+ return payload; // normal end
+ }
+
+ static char *overflow_msg = "\n\n\nERROR: mcheck registry overflow, pedantic check would be incomplete!!\n\n\n\n";
+
+ printf("%s", overflow_msg);
+ overflow_msg = "(mcheck registry full)";
+ return payload;
+}
+
+static void *mcheck_alloc_posthook(void *altoghether_ptr, size_t customer_sz)
+{
+ return mcheck_allocated_helper(altoghether_ptr, customer_sz, ANY_ALIGNMENT, CLEAN_CONTENT);
+}
+
+static void *mcheck_alloc_noclean_posthook(void *altoghether_ptr, size_t customer_sz)
+{
+ return mcheck_allocated_helper(altoghether_ptr, customer_sz, ANY_ALIGNMENT, KEEP_CONTENT);
+}
+
+static size_t mcheck_memalign_prehook(size_t alig, size_t sz)
+{
+ return mcheck_evaluate_memalign_prefix_size(alig) + sz + sizeof(mcheck_canary);
+}
+
+static void *mcheck_memalign_posthook(size_t alignment, void *altoghether_ptr, size_t customer_sz)
+{
+ return mcheck_allocated_helper(altoghether_ptr, customer_sz, alignment, CLEAN_CONTENT);
+}
+
+static enum mcheck_status mcheck_mprobe(void *ptr)
+{
+ struct mcheck_hdr *hdr = &((struct mcheck_hdr *)ptr)[-1];
+
+ return mcheck_checkhdr(hdr);
+}
+
+static void mcheck_pedantic_check(void)
+{
+ int i;
+
+ for (i = 0; i < REGISTRY_SZ; ++i)
+ if (mcheck_registry[i])
+ mcheck_checkhdr(mcheck_registry[i]);
+}
+
+static void mcheck_pedantic_prehook(void)
+{
+ if (mcheck_pedantic_flag)
+ mcheck_pedantic_check();
+}
+
+static void mcheck_initialize(mcheck_abortfunc_t new_func, char pedantic_flag)
+{
+ mcheck_abortfunc = (new_func) ? new_func : &mcheck_default_abort;
+ mcheck_pedantic_flag = pedantic_flag;
+}
+
+void mcheck_on_ramrelocation(size_t offset)
+{
+ char *p;
+ int i;
+ // Simple, but inaccurate strategy: drop the pre-reloc heap
+ for (i = 0; i < REGISTRY_SZ; ++i)
+ if ((p = mcheck_registry[i]) != NULL ) {
+ printf("mcheck, WRN: forgetting %p chunk\n", p);
+ mcheck_registry[i] = 0;
+ }
+
+ mcheck_chunk_count = 0;
+}
+#endif
+#endif
diff --git a/common/memsize.c b/common/memsize.c
index d646df8..8610957 100644
--- a/common/memsize.c
+++ b/common/memsize.c
@@ -4,7 +4,7 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
+#include <config.h>
#include <init.h>
#include <asm/global_data.h>
#include <cpu_func.h>
diff --git a/common/menu.c b/common/menu.c
index b55cf7b..e484249 100644
--- a/common/menu.c
+++ b/common/menu.c
@@ -5,7 +5,6 @@
*/
#include <ansi.h>
-#include <common.h>
#include <cli.h>
#include <malloc.h>
#include <errno.h>
diff --git a/common/miiphyutil.c b/common/miiphyutil.c
index 194c84e..9b8744e 100644
--- a/common/miiphyutil.c
+++ b/common/miiphyutil.c
@@ -9,7 +9,6 @@
* channel.
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <miiphy.h>
diff --git a/common/s_record.c b/common/s_record.c
index 2b7651f..486dd93 100644
--- a/common/s_record.c
+++ b/common/s_record.c
@@ -4,7 +4,6 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
#include <s_record.h>
static int hex1_bin (char c);
diff --git a/common/scp03.c b/common/scp03.c
index 09ef7b5..54b1bd5 100644
--- a/common/scp03.c
+++ b/common/scp03.c
@@ -4,10 +4,11 @@
*
*/
-#include <common.h>
#include <scp03.h>
#include <tee.h>
#include <tee/optee_ta_scp03.h>
+#include <linux/errno.h>
+#include <linux/string.h>
static int scp03_enable(bool provision)
{
diff --git a/common/spl/spl.c b/common/spl/spl.c
index e06bc75..9a879e9 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -6,7 +6,7 @@
* Aneesh V <aneesh@ti.com>
*/
-#include <common.h>
+#include <config.h>
#include <bloblist.h>
#include <binman_sym.h>
#include <bootstage.h>
@@ -23,7 +23,6 @@
#include <system-constants.h>
#include <asm/global_data.h>
#include <asm-generic/gpio.h>
-#include <asm/u-boot.h>
#include <nand.h>
#include <fat.h>
#include <u-boot/crc.h>
diff --git a/common/spl/spl_atf.c b/common/spl/spl_atf.c
index 3bdd013..0b1c981 100644
--- a/common/spl/spl_atf.c
+++ b/common/spl/spl_atf.c
@@ -9,7 +9,6 @@
* Copyright (C) 2017 Theobroma Systems Design und Consulting GmbH
*/
-#include <common.h>
#include <atf_common.h>
#include <cpu_func.h>
#include <errno.h>
diff --git a/common/spl/spl_blk_fs.c b/common/spl/spl_blk_fs.c
index 04eac6f..bc551c5 100644
--- a/common/spl/spl_blk_fs.c
+++ b/common/spl/spl_blk_fs.c
@@ -5,7 +5,6 @@
*
*/
-#include <common.h>
#include <spl.h>
#include <spl_load.h>
#include <image.h>
diff --git a/common/spl/spl_bootrom.c b/common/spl/spl_bootrom.c
index 0eefd39..e172a2d 100644
--- a/common/spl/spl_bootrom.c
+++ b/common/spl/spl_bootrom.c
@@ -3,7 +3,6 @@
* Copyright (C) 2017 Theobroma Systems Design und Consulting GmH
*/
-#include <common.h>
#include <spl.h>
__weak int board_return_to_bootrom(struct spl_image_info *spl_image,
diff --git a/common/spl/spl_dfu.c b/common/spl/spl_dfu.c
index 8a779da..e9f381c 100644
--- a/common/spl/spl_dfu.c
+++ b/common/spl/spl_dfu.c
@@ -5,7 +5,6 @@
*
* Ravi B <ravibabu@ti.com>
*/
-#include <common.h>
#include <env.h>
#include <spl.h>
#include <linux/compiler.h>
diff --git a/common/spl/spl_ext.c b/common/spl/spl_ext.c
index 2be6f04..76f49a5 100644
--- a/common/spl/spl_ext.c
+++ b/common/spl/spl_ext.c
@@ -1,11 +1,9 @@
// SPDX-License-Identifier: GPL-2.0+
-#include <common.h>
#include <env.h>
#include <part.h>
#include <spl.h>
#include <spl_load.h>
-#include <asm/u-boot.h>
#include <ext4fs.h>
#include <errno.h>
#include <image.h>
diff --git a/common/spl/spl_fat.c b/common/spl/spl_fat.c
index a52f9e1..bd8aab2 100644
--- a/common/spl/spl_fat.c
+++ b/common/spl/spl_fat.c
@@ -8,12 +8,10 @@
* FAT Image Functions copied from spl_mmc.c
*/
-#include <common.h>
#include <env.h>
#include <log.h>
#include <spl.h>
#include <spl_load.h>
-#include <asm/u-boot.h>
#include <fat.h>
#include <errno.h>
#include <image.h>
diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index e5195d4..988125b 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -4,7 +4,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <errno.h>
#include <fpga.h>
#include <gzip.h>
diff --git a/common/spl/spl_imx_container.c b/common/spl/spl_imx_container.c
index b4ea924..2c31777 100644
--- a/common/spl/spl_imx_container.c
+++ b/common/spl/spl_imx_container.c
@@ -4,7 +4,6 @@
*/
#define LOG_CATEGORY LOGC_ARCH
-#include <common.h>
#include <stdlib.h>
#include <errno.h>
#include <imx_container.h>
diff --git a/common/spl/spl_legacy.c b/common/spl/spl_legacy.c
index 08687ca..a778934 100644
--- a/common/spl/spl_legacy.c
+++ b/common/spl/spl_legacy.c
@@ -3,7 +3,6 @@
* Copyright (C) 2020 Stefan Roese <sr@denx.de>
*/
-#include <common.h>
#include <image.h>
#include <log.h>
#include <malloc.h>
diff --git a/common/spl/spl_mmc.c b/common/spl/spl_mmc.c
index 3d032bb..ccab0be 100644
--- a/common/spl/spl_mmc.c
+++ b/common/spl/spl_mmc.c
@@ -5,7 +5,6 @@
*
* Aneesh V <aneesh@ti.com>
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <part.h>
@@ -13,7 +12,6 @@
#include <spl_load.h>
#include <linux/compiler.h>
#include <errno.h>
-#include <asm/u-boot.h>
#include <errno.h>
#include <mmc.h>
#include <image.h>
diff --git a/common/spl/spl_nand.c b/common/spl/spl_nand.c
index 3b0a152..5631fa6 100644
--- a/common/spl/spl_nand.c
+++ b/common/spl/spl_nand.c
@@ -3,7 +3,6 @@
* Copyright (C) 2011
* Corscience GmbH & Co. KG - Simon Schwarz <schwarz@corscience.de>
*/
-#include <common.h>
#include <config.h>
#include <fdt_support.h>
#include <image.h>
diff --git a/common/spl/spl_net.c b/common/spl/spl_net.c
index 898f9df..be7278b 100644
--- a/common/spl/spl_net.c
+++ b/common/spl/spl_net.c
@@ -6,7 +6,6 @@
* (C) Copyright 2012
* Ilya Yanok <ilya.yanok@gmail.com>
*/
-#include <common.h>
#include <env.h>
#include <errno.h>
#include <image.h>
diff --git a/common/spl/spl_nor.c b/common/spl/spl_nor.c
index 7074511..ed76b5e 100644
--- a/common/spl/spl_nor.c
+++ b/common/spl/spl_nor.c
@@ -3,7 +3,7 @@
* Copyright (C) 2012 Stefan Roese <sr@denx.de>
*/
-#include <common.h>
+#include <config.h>
#include <image.h>
#include <imx_container.h>
#include <log.h>
diff --git a/common/spl/spl_nvme.c b/common/spl/spl_nvme.c
index c8774d6..0e15a3c 100644
--- a/common/spl/spl_nvme.c
+++ b/common/spl/spl_nvme.c
@@ -5,7 +5,6 @@
*
*/
-#include <common.h>
#include <spl.h>
#include <nvme.h>
diff --git a/common/spl/spl_onenand.c b/common/spl/spl_onenand.c
index 53a8c6d..f6f6528 100644
--- a/common/spl/spl_onenand.c
+++ b/common/spl/spl_onenand.c
@@ -7,7 +7,6 @@
* Copyright (C) 2011
* Corscience GmbH & Co. KG - Simon Schwarz <schwarz@corscience.de>
*/
-#include <common.h>
#include <config.h>
#include <image.h>
#include <log.h>
diff --git a/common/spl/spl_opensbi.c b/common/spl/spl_opensbi.c
index ec62aab..5a26d7c 100644
--- a/common/spl/spl_opensbi.c
+++ b/common/spl/spl_opensbi.c
@@ -5,7 +5,6 @@
*
* Based on common/spl/spl_atf.c
*/
-#include <common.h>
#include <cpu_func.h>
#include <errno.h>
#include <hang.h>
diff --git a/common/spl/spl_ram.c b/common/spl/spl_ram.c
index 8aeda23..5a23841 100644
--- a/common/spl/spl_ram.c
+++ b/common/spl/spl_ram.c
@@ -9,7 +9,6 @@
* Michal Simek <michal.simek@amd.com>
* Stefan Agner <stefan.agner@toradex.com>
*/
-#include <common.h>
#include <binman_sym.h>
#include <image.h>
#include <log.h>
diff --git a/common/spl/spl_sata.c b/common/spl/spl_sata.c
index 32746ce..67fc620 100644
--- a/common/spl/spl_sata.c
+++ b/common/spl/spl_sata.c
@@ -8,9 +8,7 @@
* Derived work from spl_usb.c
*/
-#include <common.h>
#include <spl.h>
-#include <asm/u-boot.h>
#include <sata.h>
#include <scsi.h>
#include <errno.h>
diff --git a/common/spl/spl_sdp.c b/common/spl/spl_sdp.c
index 9143c27..9ca80bd 100644
--- a/common/spl/spl_sdp.c
+++ b/common/spl/spl_sdp.c
@@ -4,7 +4,6 @@
* Author: Stefan Agner <stefan.agner@toradex.com>
*/
-#include <common.h>
#include <log.h>
#include <spl.h>
#include <usb.h>
diff --git a/common/spl/spl_semihosting.c b/common/spl/spl_semihosting.c
index 941fa91..2047248 100644
--- a/common/spl/spl_semihosting.c
+++ b/common/spl/spl_semihosting.c
@@ -3,7 +3,6 @@
* Copyright (C) 2022 Sean Anderson <sean.anderson@seco.com>
*/
-#include <common.h>
#include <image.h>
#include <log.h>
#include <semihosting.h>
diff --git a/common/spl/spl_spi.c b/common/spl/spl_spi.c
index 89de73c..8ab4803 100644
--- a/common/spl/spl_spi.c
+++ b/common/spl/spl_spi.c
@@ -8,7 +8,7 @@
* Heiko Schocher, DENX Software Engineering, hs@denx.de.
*/
-#include <common.h>
+#include <config.h>
#include <image.h>
#include <imx_container.h>
#include <log.h>
diff --git a/common/spl/spl_ubi.c b/common/spl/spl_ubi.c
index d7ab9ef..a8d3f43 100644
--- a/common/spl/spl_ubi.c
+++ b/common/spl/spl_ubi.c
@@ -4,7 +4,6 @@
* Ladislav Michl <ladis@linux-mips.org>
*/
-#include <common.h>
#include <config.h>
#include <image.h>
#include <nand.h>
diff --git a/common/spl/spl_usb.c b/common/spl/spl_usb.c
index 479e2dc..932da56 100644
--- a/common/spl/spl_usb.c
+++ b/common/spl/spl_usb.c
@@ -8,10 +8,8 @@
* Derived work from spl_mmc.c
*/
-#include <common.h>
#include <log.h>
#include <spl.h>
-#include <asm/u-boot.h>
#include <errno.h>
#include <usb.h>
#include <fat.h>
diff --git a/common/spl/spl_xip.c b/common/spl/spl_xip.c
index 959915f..1465c3e 100644
--- a/common/spl/spl_xip.c
+++ b/common/spl/spl_xip.c
@@ -4,7 +4,7 @@
* Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics.
*/
-#include <common.h>
+#include <config.h>
#include <image.h>
#include <log.h>
#include <spl.h>
diff --git a/common/spl/spl_ymodem.c b/common/spl/spl_ymodem.c
index 1faaa2c..4c7222a 100644
--- a/common/spl/spl_ymodem.c
+++ b/common/spl/spl_ymodem.c
@@ -8,13 +8,11 @@
*
* Matt Porter <mporter@ti.com>
*/
-#include <common.h>
#include <gzip.h>
#include <image.h>
#include <log.h>
#include <spl.h>
#include <xyzModem.h>
-#include <asm/u-boot.h>
#include <linux/libfdt.h>
#define BUF_SIZE 1024
diff --git a/common/splash.c b/common/splash.c
index 6820db6..c559129 100644
--- a/common/splash.c
+++ b/common/splash.c
@@ -20,11 +20,12 @@
*
*/
-#include <common.h>
#include <display_options.h>
#include <env.h>
#include <splash.h>
#include <video.h>
+#include <vsprintf.h>
+#include <linux/kernel.h>
static struct splash_location default_splash_locations[] = {
{
diff --git a/common/splash_source.c b/common/splash_source.c
index 2ce0768..5b27116 100644
--- a/common/splash_source.c
+++ b/common/splash_source.c
@@ -5,7 +5,6 @@
* Authors: Igor Grinberg <grinberg@compulab.co.il>
*/
-#include <common.h>
#include <bmp_layout.h>
#include <command.h>
#include <env.h>
diff --git a/common/stackprot.c b/common/stackprot.c
index 6495951..4e3297b 100644
--- a/common/stackprot.c
+++ b/common/stackprot.c
@@ -3,7 +3,6 @@
* Copyright 2021 Broadcom
*/
-#include <common.h>
#include <asm/global_data.h>
DECLARE_GLOBAL_DATA_PTR;
diff --git a/common/stdio.c b/common/stdio.c
index e3354f0..a61220c 100644
--- a/common/stdio.c
+++ b/common/stdio.c
@@ -9,7 +9,6 @@
*/
#include <config.h>
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <log.h>
diff --git a/common/update.c b/common/update.c
index ec302ca..eb0b60a 100644
--- a/common/update.c
+++ b/common/update.c
@@ -6,7 +6,6 @@
* Bartlomiej Sieka <tur@semihalf.com>
*/
-#include <common.h>
#include <cpu_func.h>
#include <image.h>
#include <linux/printk.h>
diff --git a/common/usb.c b/common/usb.c
index 836506d..84b10f5 100644
--- a/common/usb.c
+++ b/common/usb.c
@@ -25,9 +25,9 @@
*
* For each transfer (except "Interrupt") we wait for completion.
*/
-#include <common.h>
#include <command.h>
#include <dm.h>
+#include <dm/device_compat.h>
#include <log.h>
#include <malloc.h>
#include <memalign.h>
@@ -1084,6 +1084,54 @@
return 0;
}
+static int usb_device_is_ignored(u16 id_vendor, u16 id_product)
+{
+ ulong vid, pid;
+ char *end;
+ const char *cur = NULL;
+
+ /* ignore list depends on env support */
+ if (!CONFIG_IS_ENABLED(ENV_SUPPORT))
+ return 0;
+
+ cur = env_get("usb_ignorelist");
+
+ /* parse "usb_ignorelist" strictly */
+ while (cur && cur[0] != '\0') {
+ vid = simple_strtoul(cur, &end, 0);
+ /*
+ * If strtoul did not parse a single digit or the next char is
+ * not ':' the ignore list is malformed.
+ */
+ if (cur == end || end[0] != ':')
+ return -EINVAL;
+
+ cur = end + 1;
+ pid = simple_strtoul(cur, &end, 0);
+ /* Consider '*' as wildcard for the product ID */
+ if (cur == end && end[0] == '*') {
+ pid = U16_MAX + 1;
+ end++;
+ }
+ /*
+ * The ignore list is malformed if no product ID / wildcard was
+ * parsed or entries are not separated by ',' or terminated with
+ * '\0'.
+ */
+ if (cur == end || (end[0] != ',' && end[0] != '\0'))
+ return -EINVAL;
+
+ if (id_vendor == vid && (pid > U16_MAX || id_product == pid))
+ return -ENODEV;
+
+ if (end[0] == '\0')
+ break;
+ cur = end + 1;
+ }
+
+ return 0;
+}
+
int usb_select_config(struct usb_device *dev)
{
unsigned char *tmpbuf = NULL;
@@ -1099,6 +1147,27 @@
le16_to_cpus(&dev->descriptor.idProduct);
le16_to_cpus(&dev->descriptor.bcdDevice);
+ /* ignore devices from usb_ignorelist */
+ err = usb_device_is_ignored(dev->descriptor.idVendor,
+ dev->descriptor.idProduct);
+ if (err == -ENODEV) {
+ debug("Ignoring USB device 0x%x:0x%x\n",
+ dev->descriptor.idVendor, dev->descriptor.idProduct);
+ return err;
+ } else if (err == -EINVAL) {
+ /*
+ * Continue on "usb_ignorelist" parsing errors. The list is
+ * parsed for each device returning the error would result in
+ * ignoring all USB devices.
+ * Since the parsing error is independent of the probed device
+ * report errors with printf instead of dev_err.
+ */
+ printf("usb_ignorelist parse error in \"%s\"\n",
+ env_get("usb_ignorelist"));
+ } else if (err < 0) {
+ return err;
+ }
+
/*
* Kingston DT Ultimate 32GB USB 3.0 seems to be extremely sensitive
* about this first Get Descriptor request. If there are any other
diff --git a/common/usb_hub.c b/common/usb_hub.c
index 2e054eb..807f490 100644
--- a/common/usb_hub.c
+++ b/common/usb_hub.c
@@ -21,7 +21,6 @@
* Probes device for being a hub and configurate it
*/
-#include <common.h>
#include <command.h>
#include <dm.h>
#include <env.h>
@@ -29,6 +28,7 @@
#include <log.h>
#include <malloc.h>
#include <memalign.h>
+#include <time.h>
#include <asm/processor.h>
#include <asm/unaligned.h>
#include <linux/ctype.h>
diff --git a/common/usb_kbd.c b/common/usb_kbd.c
index 4cbc9ac..f3b4a3c 100644
--- a/common/usb_kbd.c
+++ b/common/usb_kbd.c
@@ -6,7 +6,6 @@
* Part of this source has been derived from the Linux USB
* project.
*/
-#include <common.h>
#include <console.h>
#include <dm.h>
#include <env.h>
@@ -15,6 +14,7 @@
#include <malloc.h>
#include <memalign.h>
#include <stdio_dev.h>
+#include <time.h>
#include <watchdog.h>
#include <asm/byteorder.h>
#ifdef CONFIG_SANDBOX
@@ -24,6 +24,18 @@
#include <usb.h>
/*
+ * USB vendor and product IDs used for quirks.
+ */
+#define USB_VENDOR_ID_APPLE 0x05ac
+#define USB_DEVICE_ID_APPLE_MAGIC_KEYBOARD_2021 0x029c
+#define USB_DEVICE_ID_APPLE_MAGIC_KEYBOARD_FINGERPRINT_2021 0x029a
+#define USB_DEVICE_ID_APPLE_MAGIC_KEYBOARD_NUMPAD_2021 0x029f
+
+#define USB_VENDOR_ID_KEYCHRON 0x3434
+
+#define USB_HID_QUIRK_POLL_NO_REPORT_IDLE BIT(0)
+
+/*
* If overwrite_console returns 1, the stdin, stderr and stdout
* are switched to the serial port, else the settings in the
* environment are used
@@ -106,6 +118,8 @@
unsigned long last_report;
struct int_queue *intq;
+ uint32_t ifnum;
+
uint32_t repeat_delay;
uint32_t usb_in_pointer;
@@ -150,8 +164,8 @@
*/
static void usb_kbd_setled(struct usb_device *dev)
{
- struct usb_interface *iface = &dev->config.if_desc[0];
struct usb_kbd_pdata *data = dev->privptr;
+ struct usb_interface *iface = &dev->config.if_desc[data->ifnum];
ALLOC_ALIGN_BUFFER(uint32_t, leds, 1, USB_DMA_MINALIGN);
*leds = data->flags & USB_KBD_LEDMASK;
@@ -365,7 +379,7 @@
#if defined(CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP)
struct usb_interface *iface;
struct usb_kbd_pdata *data = dev->privptr;
- iface = &dev->config.if_desc[0];
+ iface = &dev->config.if_desc[data->ifnum];
usb_get_report(dev, iface->desc.bInterfaceNumber,
1, 0, data->new, USB_KBD_BOOT_REPORT_SIZE);
if (memcmp(data->old, data->new, USB_KBD_BOOT_REPORT_SIZE)) {
@@ -464,6 +478,7 @@
struct usb_interface *iface;
struct usb_endpoint_descriptor *ep;
struct usb_kbd_pdata *data;
+ unsigned int quirks = 0;
int epNum;
if (dev->descriptor.bNumConfigurations != 1)
@@ -496,6 +511,15 @@
debug("USB KBD: found interrupt EP: 0x%x\n", ep->bEndpointAddress);
+ switch (dev->descriptor.idVendor) {
+ case USB_VENDOR_ID_APPLE:
+ case USB_VENDOR_ID_KEYCHRON:
+ quirks |= USB_HID_QUIRK_POLL_NO_REPORT_IDLE;
+ break;
+ default:
+ break;
+ }
+
data = malloc(sizeof(struct usb_kbd_pdata));
if (!data) {
printf("USB KBD: Error allocating private data\n");
@@ -509,6 +533,8 @@
data->new = memalign(USB_DMA_MINALIGN,
roundup(USB_KBD_BOOT_REPORT_SIZE, USB_DMA_MINALIGN));
+ data->ifnum = ifnum;
+
/* Insert private data into USB device structure */
dev->privptr = data;
@@ -534,6 +560,14 @@
usb_set_idle(dev, iface->desc.bInterfaceNumber, 0, 0);
#endif
+ /*
+ * Apple and Keychron keyboards do not report the device state. Reports
+ * are only returned during key presses.
+ */
+ if (quirks & USB_HID_QUIRK_POLL_NO_REPORT_IDLE) {
+ debug("USB KBD: quirk: skip testing device state\n");
+ return 1;
+ }
debug("USB KBD: enable interrupt pipe...\n");
#ifdef CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE
data->intq = create_int_queue(dev, data->intpipe, 1,
@@ -561,10 +595,17 @@
{
char *stdinname;
struct stdio_dev usb_kbd_dev;
+ unsigned int ifnum;
+ unsigned int max_ifnum = min((unsigned int)USB_MAX_ACTIVE_INTERFACES,
+ (unsigned int)dev->config.no_of_if);
int error;
/* Try probing the keyboard */
- if (usb_kbd_probe_dev(dev, 0) != 1)
+ for (ifnum = 0; ifnum < max_ifnum; ifnum++) {
+ if (usb_kbd_probe_dev(dev, ifnum) == 1)
+ break;
+ }
+ if (ifnum >= max_ifnum)
return -ENOENT;
/* Register the keyboard */
@@ -731,6 +772,18 @@
.bInterfaceSubClass = USB_SUB_HID_BOOT,
.bInterfaceProtocol = USB_PROT_HID_KEYBOARD,
},
+ {
+ USB_DEVICE(USB_VENDOR_ID_APPLE,
+ USB_DEVICE_ID_APPLE_MAGIC_KEYBOARD_2021),
+ },
+ {
+ USB_DEVICE(USB_VENDOR_ID_APPLE,
+ USB_DEVICE_ID_APPLE_MAGIC_KEYBOARD_FINGERPRINT_2021),
+ },
+ {
+ USB_DEVICE(USB_VENDOR_ID_APPLE,
+ USB_DEVICE_ID_APPLE_MAGIC_KEYBOARD_NUMPAD_2021),
+ },
{ } /* Terminating entry */
};
diff --git a/common/usb_onboard_hub.c b/common/usb_onboard_hub.c
index 89e18a2..68a04ac 100644
--- a/common/usb_onboard_hub.c
+++ b/common/usb_onboard_hub.c
@@ -7,7 +7,6 @@
* Mostly inspired by Linux kernel v6.1 onboard_usb_hub driver
*/
-#include <common.h>
#include <dm.h>
#include <dm/device_compat.h>
#include <power/regulator.h>
diff --git a/common/usb_storage.c b/common/usb_storage.c
index 774d5bd..a79ed2e 100644
--- a/common/usb_storage.c
+++ b/common/usb_storage.c
@@ -32,7 +32,6 @@
*/
-#include <common.h>
#include <blk.h>
#include <bootdev.h>
#include <command.h>
diff --git a/common/xyzModem.c b/common/xyzModem.c
index fb319f7..9feb240 100644
--- a/common/xyzModem.c
+++ b/common/xyzModem.c
@@ -21,12 +21,13 @@
*
*==========================================================================
*/
-#include <common.h>
#include <xyzModem.h>
#include <stdarg.h>
+#include <time.h>
#include <u-boot/crc.h>
#include <watchdog.h>
#include <env.h>
+#include <vsprintf.h>
/* Assumption - run xyzModem protocol over the console port */
diff --git a/configs/CMPC885_defconfig b/configs/CMPC885_defconfig
index bbe8d5b..11c24f7 100644
--- a/configs/CMPC885_defconfig
+++ b/configs/CMPC885_defconfig
@@ -50,6 +50,7 @@
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MTD=y
CONFIG_CMD_NAND=y
+CONFIG_CMD_TEMPERATURE=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_MII_INIT=y
@@ -107,6 +108,8 @@
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_MPC8XX_SPI=y
+CONFIG_DM_THERMAL=y
+CONFIG_TI_LM74_THERMAL=y
CONFIG_WDT=y
CONFIG_WDT_MPC8xxx_BME=y
# CONFIG_REGEX is not set
diff --git a/configs/CMPCPRO_defconfig b/configs/CMPCPRO_defconfig
index cefed63..f8f5c9f 100644
--- a/configs/CMPCPRO_defconfig
+++ b/configs/CMPCPRO_defconfig
@@ -134,6 +134,7 @@
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MTD=y
CONFIG_CMD_NAND=y
+CONFIG_CMD_TEMPERATURE=y
CONFIG_CMD_DHCP=y
CONFIG_BOOTP_BOOTFILESIZE=y
CONFIG_CMD_MII=y
@@ -197,6 +198,8 @@
CONFIG_MPC8XXX_SPI=y
CONFIG_SYSRESET=y
CONFIG_SYSRESET_MPC83XX=y
+CONFIG_DM_THERMAL=y
+CONFIG_TI_LM74_THERMAL=y
CONFIG_WDT=y
CONFIG_WDT_MPC8xxx=y
# CONFIG_REGEX is not set
diff --git a/configs/MCR3000_defconfig b/configs/MCR3000_defconfig
index 8a88fb4..f2eac2c 100644
--- a/configs/MCR3000_defconfig
+++ b/configs/MCR3000_defconfig
@@ -2,6 +2,7 @@
CONFIG_TEXT_BASE=0x4000000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x2000
+CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="mcr3000"
CONFIG_SYS_MONITOR_LEN=327680
CONFIG_SYS_CLK_FREQ=132000000
@@ -46,6 +47,7 @@
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MTD=y
CONFIG_CMD_NAND=y
+CONFIG_CMD_TEMPERATURE=y
# CONFIG_CMD_ECHO is not set
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SOURCE is not set
@@ -91,6 +93,7 @@
CONFIG_SYS_BR7_PRELIM_BOOL=y
CONFIG_SYS_BR7_PRELIM=0x1C000001
CONFIG_SYS_OR7_PRELIM=0xFFFF810A
+CONFIG_MPC8XX_GPIO=y
# CONFIG_MMC is not set
CONFIG_MTD=y
CONFIG_DM_MTD=y
@@ -102,6 +105,11 @@
CONFIG_MTD_RAW_NAND=y
CONFIG_MPC8XX_FEC=y
CONFIG_DM_SERIAL=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_MPC8XX_SPI=y
+CONFIG_DM_THERMAL=y
+CONFIG_TI_LM74_THERMAL=y
CONFIG_WDT=y
CONFIG_WDT_MPC8xxx_BME=y
CONFIG_LZMA=y
diff --git a/configs/SBx81LIFKW_defconfig b/configs/SBx81LIFKW_defconfig
index cc17a8b..c4625bf 100644
--- a/configs/SBx81LIFKW_defconfig
+++ b/configs/SBx81LIFKW_defconfig
@@ -35,6 +35,7 @@
CONFIG_MTDPARTS_DEFAULT="mtdparts=spi0.0:768K(boot)ro,256K(boot-env),14M(user),1M(errlog)"
CONFIG_DOS_PARTITION=y
CONFIG_OF_CONTROL=y
+# CONFIG_OF_UPSTREAM is not set
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_ENV_SPI_MAX_HZ=20000000
diff --git a/configs/SBx81LIFXCAT_defconfig b/configs/SBx81LIFXCAT_defconfig
index 0612723..01e50af 100644
--- a/configs/SBx81LIFXCAT_defconfig
+++ b/configs/SBx81LIFXCAT_defconfig
@@ -36,6 +36,7 @@
CONFIG_MTDPARTS_DEFAULT="mtdparts=spi0.0:768K(boot)ro,256K(boot-env),14M(user),1M(errlog)"
CONFIG_DOS_PARTITION=y
CONFIG_OF_CONTROL=y
+# CONFIG_OF_UPSTREAM is not set
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_ENV_SPI_MAX_HZ=20000000
diff --git a/configs/ae350_rv32_falcon_defconfig b/configs/ae350_rv32_falcon_defconfig
index 9050e32..a8f3c00 100644
--- a/configs/ae350_rv32_falcon_defconfig
+++ b/configs/ae350_rv32_falcon_defconfig
@@ -8,6 +8,7 @@
CONFIG_DEFAULT_DEVICE_TREE="ae350_32"
CONFIG_SYS_MONITOR_LEN=786432
CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000000
+CONFIG_SPL_BSS_START_ADDR=0x400000
CONFIG_SPL=y
CONFIG_SYS_LOAD_ADDR=0x100000
CONFIG_TARGET_ANDES_AE350=y
@@ -25,7 +26,6 @@
CONFIG_DISPLAY_BOARDINFO=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_MAX_SIZE=0x100000
-CONFIG_SPL_BSS_START_ADDR=0x400000
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_CACHE=y
CONFIG_SPL_PAYLOAD_ARGS_ADDR=0x01700000
diff --git a/configs/ae350_rv32_falcon_xip_defconfig b/configs/ae350_rv32_falcon_xip_defconfig
index bebdef5..0f9a7b0 100644
--- a/configs/ae350_rv32_falcon_xip_defconfig
+++ b/configs/ae350_rv32_falcon_xip_defconfig
@@ -9,6 +9,7 @@
CONFIG_SPL_TEXT_BASE=0x80000000
CONFIG_SYS_MONITOR_LEN=786432
CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000000
+CONFIG_SPL_BSS_START_ADDR=0x400000
CONFIG_SPL=y
CONFIG_SYS_LOAD_ADDR=0x100000
CONFIG_TARGET_ANDES_AE350=y
@@ -26,7 +27,6 @@
CONFIG_DISPLAY_BOARDINFO=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_MAX_SIZE=0x100000
-CONFIG_SPL_BSS_START_ADDR=0x400000
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_CACHE=y
CONFIG_SPL_PAYLOAD_ARGS_ADDR=0x01700000
diff --git a/configs/ae350_rv32_spl_defconfig b/configs/ae350_rv32_spl_defconfig
index 321025b..76711b9 100644
--- a/configs/ae350_rv32_spl_defconfig
+++ b/configs/ae350_rv32_spl_defconfig
@@ -8,6 +8,7 @@
CONFIG_DEFAULT_DEVICE_TREE="ae350_32"
CONFIG_SYS_MONITOR_LEN=786432
CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000000
+CONFIG_SPL_BSS_START_ADDR=0x400000
CONFIG_SPL=y
CONFIG_SYS_LOAD_ADDR=0x100000
CONFIG_TARGET_ANDES_AE350=y
@@ -25,7 +26,6 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_MISC_INIT_R=y
CONFIG_SPL_MAX_SIZE=0x100000
-CONFIG_SPL_BSS_START_ADDR=0x400000
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_CACHE=y
CONFIG_SPL_OPENSBI_SCRATCH_OPTIONS=0x0
diff --git a/configs/ae350_rv32_spl_xip_defconfig b/configs/ae350_rv32_spl_xip_defconfig
index 0ca40a5..39db36c 100644
--- a/configs/ae350_rv32_spl_xip_defconfig
+++ b/configs/ae350_rv32_spl_xip_defconfig
@@ -9,6 +9,7 @@
CONFIG_SPL_TEXT_BASE=0x80000000
CONFIG_SYS_MONITOR_LEN=786432
CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000000
+CONFIG_SPL_BSS_START_ADDR=0x400000
CONFIG_SPL=y
CONFIG_SYS_LOAD_ADDR=0x100000
CONFIG_TARGET_ANDES_AE350=y
@@ -26,7 +27,6 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_MISC_INIT_R=y
CONFIG_SPL_MAX_SIZE=0x100000
-CONFIG_SPL_BSS_START_ADDR=0x400000
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_CACHE=y
CONFIG_SPL_OPENSBI_SCRATCH_OPTIONS=0x0
diff --git a/configs/ae350_rv64_falcon_defconfig b/configs/ae350_rv64_falcon_defconfig
index 423fa7b..1cd978e 100644
--- a/configs/ae350_rv64_falcon_defconfig
+++ b/configs/ae350_rv64_falcon_defconfig
@@ -7,6 +7,7 @@
CONFIG_ENV_SECT_SIZE=0x1000
CONFIG_DEFAULT_DEVICE_TREE="ae350_64"
CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000000
+CONFIG_SPL_BSS_START_ADDR=0x400000
CONFIG_SPL=y
CONFIG_SYS_LOAD_ADDR=0x100000
CONFIG_TARGET_ANDES_AE350=y
@@ -25,7 +26,6 @@
CONFIG_DISPLAY_BOARDINFO=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_MAX_SIZE=0x100000
-CONFIG_SPL_BSS_START_ADDR=0x400000
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_CACHE=y
CONFIG_SPL_PAYLOAD_ARGS_ADDR=0x01700000
diff --git a/configs/ae350_rv64_falcon_xip_defconfig b/configs/ae350_rv64_falcon_xip_defconfig
index 6ddb81b..7a1f880 100644
--- a/configs/ae350_rv64_falcon_xip_defconfig
+++ b/configs/ae350_rv64_falcon_xip_defconfig
@@ -8,6 +8,7 @@
CONFIG_DEFAULT_DEVICE_TREE="ae350_64"
CONFIG_SPL_TEXT_BASE=0x80000000
CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000000
+CONFIG_SPL_BSS_START_ADDR=0x400000
CONFIG_SPL=y
CONFIG_SYS_LOAD_ADDR=0x100000
CONFIG_TARGET_ANDES_AE350=y
@@ -26,7 +27,6 @@
CONFIG_DISPLAY_BOARDINFO=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_MAX_SIZE=0x100000
-CONFIG_SPL_BSS_START_ADDR=0x400000
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_CACHE=y
CONFIG_SPL_PAYLOAD_ARGS_ADDR=0x01700000
diff --git a/configs/ae350_rv64_spl_defconfig b/configs/ae350_rv64_spl_defconfig
index e274f89..c70413c 100644
--- a/configs/ae350_rv64_spl_defconfig
+++ b/configs/ae350_rv64_spl_defconfig
@@ -7,6 +7,7 @@
CONFIG_ENV_SECT_SIZE=0x1000
CONFIG_DEFAULT_DEVICE_TREE="ae350_64"
CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000000
+CONFIG_SPL_BSS_START_ADDR=0x400000
CONFIG_SPL=y
CONFIG_SYS_LOAD_ADDR=0x100000
CONFIG_TARGET_ANDES_AE350=y
@@ -25,7 +26,6 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_MISC_INIT_R=y
CONFIG_SPL_MAX_SIZE=0x100000
-CONFIG_SPL_BSS_START_ADDR=0x400000
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_CACHE=y
CONFIG_SPL_OPENSBI_SCRATCH_OPTIONS=0x0
diff --git a/configs/ae350_rv64_spl_xip_defconfig b/configs/ae350_rv64_spl_xip_defconfig
index 0f7fb71..279923c 100644
--- a/configs/ae350_rv64_spl_xip_defconfig
+++ b/configs/ae350_rv64_spl_xip_defconfig
@@ -8,6 +8,7 @@
CONFIG_DEFAULT_DEVICE_TREE="ae350_64"
CONFIG_SPL_TEXT_BASE=0x80000000
CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000000
+CONFIG_SPL_BSS_START_ADDR=0x400000
CONFIG_SPL=y
CONFIG_SYS_LOAD_ADDR=0x100000
CONFIG_TARGET_ANDES_AE350=y
@@ -26,7 +27,6 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_MISC_INIT_R=y
CONFIG_SPL_MAX_SIZE=0x100000
-CONFIG_SPL_BSS_START_ADDR=0x400000
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_CACHE=y
CONFIG_SPL_OPENSBI_SCRATCH_OPTIONS=0x0
diff --git a/configs/alt_defconfig b/configs/alt_defconfig
index e4007ab..c9ca22c 100644
--- a/configs/alt_defconfig
+++ b/configs/alt_defconfig
@@ -16,7 +16,7 @@
CONFIG_ENV_OFFSET=0xC0000
CONFIG_ENV_SECT_SIZE=0x40000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="r8a7794-alt-u-boot"
+CONFIG_DEFAULT_DEVICE_TREE="renesas/r8a7794-alt"
CONFIG_SPL_TEXT_BASE=0xe6300000
CONFIG_ARCH_RENESAS_BOARD_STRING="Alt"
CONFIG_R8A7794=y
diff --git a/configs/am62ax_evm_a53_defconfig b/configs/am62ax_evm_a53_defconfig
index 41ffcfd..c4556f5 100644
--- a/configs/am62ax_evm_a53_defconfig
+++ b/configs/am62ax_evm_a53_defconfig
@@ -15,6 +15,10 @@
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x80a00000
+CONFIG_SPL_BSS_MAX_SIZE=0x80000
+CONFIG_SPL_STACK_R=y
CONFIG_SPL_FS_FAT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
@@ -25,11 +29,7 @@
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_MAX_SIZE=0x58000
CONFIG_SPL_PAD_TO=0x0
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x80a00000
-CONFIG_SPL_BSS_MAX_SIZE=0x80000
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
-CONFIG_SPL_STACK_R=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1400
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img"
diff --git a/configs/am62ax_evm_r5_defconfig b/configs/am62ax_evm_r5_defconfig
index 8dd8f08..44ccb6b 100644
--- a/configs/am62ax_evm_r5_defconfig
+++ b/configs/am62ax_evm_r5_defconfig
@@ -17,6 +17,10 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_SPL_SYS_MALLOC_F_LEN=0x7145
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x43c3b000
+CONFIG_SPL_BSS_MAX_SIZE=0x3000
+CONFIG_SPL_STACK_R=y
CONFIG_SPL_SIZE_LIMIT=0x3A7F0
CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x3500
CONFIG_SPL_FS_FAT=y
@@ -28,12 +32,8 @@
CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y
CONFIG_SPL_MAX_SIZE=0x3B000
CONFIG_SPL_PAD_TO=0x0
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x43c3b000
-CONFIG_SPL_BSS_MAX_SIZE=0x3000
CONFIG_SPL_SYS_REPORT_STACK_F_USAGE=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
-CONFIG_SPL_STACK_R=y
CONFIG_SPL_SEPARATE_BSS=y
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
diff --git a/configs/am62px_evm_a53_defconfig b/configs/am62px_evm_a53_defconfig
index 2621abb..9f40c9a 100644
--- a/configs/am62px_evm_a53_defconfig
+++ b/configs/am62px_evm_a53_defconfig
@@ -1,6 +1,5 @@
CONFIG_ARM=y
CONFIG_ARCH_K3=y
-CONFIG_TI_SECURE_DEVICE=y
CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
@@ -14,7 +13,6 @@
CONFIG_ENV_SIZE=0x40000
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
-CONFIG_OF_UPSTREAM=y
CONFIG_DEFAULT_DEVICE_TREE="ti/k3-am62p5-sk"
CONFIG_SPL_TEXT_BASE=0x80080000
CONFIG_OF_LIBFDT_OVERLAY=y
@@ -22,6 +20,10 @@
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x80a00000
+CONFIG_SPL_BSS_MAX_SIZE=0x80000
+CONFIG_SPL_STACK_R=y
CONFIG_SPL_FS_FAT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
@@ -30,15 +32,10 @@
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000
CONFIG_BOOTSTD_FULL=y
-CONFIG_BOOTSTD_DEFAULTS=y
CONFIG_BOOTCOMMAND="run envboot; bootflow scan -lb"
CONFIG_SPL_MAX_SIZE=0x58000
CONFIG_SPL_PAD_TO=0x0
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x80a00000
-CONFIG_SPL_BSS_MAX_SIZE=0x80000
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
-CONFIG_SPL_STACK_R=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1400
CONFIG_SPL_DMA=y
@@ -46,7 +43,6 @@
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img"
CONFIG_SPL_I2C=y
CONFIG_SPL_DM_MAILBOX=y
-CONFIG_SPL_MTD_SUPPORT=y
CONFIG_SPL_DM_SPI_FLASH=y
CONFIG_SPL_POWER_DOMAIN=y
CONFIG_SPL_RAM_SUPPORT=y
@@ -57,10 +53,10 @@
CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000
CONFIG_SPL_THERMAL=y
CONFIG_SPL_YMODEM_SUPPORT=y
-CONFIG_SYS_MAXARGS=64
+CONFIG_CMD_BOOTEFI_SELFTEST=y
+CONFIG_CMD_NVEDIT_EFI=y
CONFIG_CMD_CLK=y
CONFIG_CMD_DFU=y
-CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
@@ -69,12 +65,15 @@
CONFIG_CMD_REMOTEPROC=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
+CONFIG_CMD_EFIDEBUG=y
CONFIG_CMD_TIME=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_MTDPARTS=y
CONFIG_CMD_UBI=y
+CONFIG_MMC_SPEED_MODE_SET=y
CONFIG_OF_CONTROL=y
CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_UPSTREAM=y
CONFIG_MULTI_DTB_FIT=y
CONFIG_SPL_MULTI_DTB_FIT=y
CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y
@@ -115,6 +114,8 @@
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_MMC_IO_VOLTAGE=y
CONFIG_SPL_MMC_IO_VOLTAGE=y
+CONFIG_MMC_UHS_SUPPORT=y
+CONFIG_SPL_MMC_UHS_SUPPORT=y
CONFIG_MMC_HS400_SUPPORT=y
CONFIG_SPL_MMC_HS400_SUPPORT=y
CONFIG_MMC_SDHCI=y
@@ -148,6 +149,8 @@
CONFIG_REMOTEPROC_TI_K3_DSP=y
CONFIG_REMOTEPROC_TI_K3_R5F=y
CONFIG_RESET_TI_SCI=y
+CONFIG_DM_RTC=y
+CONFIG_RTC_EMULATION=y
CONFIG_DM_SERIAL=y
CONFIG_SOC_DEVICE=y
CONFIG_SOC_DEVICE_TI_K3=y
@@ -175,3 +178,4 @@
CONFIG_USB_GADGET_PRODUCT_NUM=0x6165
CONFIG_SPL_DFU=y
CONFIG_FS_FAT_MAX_CLUSTSIZE=16384
+CONFIG_EFI_SET_TIME=y
diff --git a/configs/am62px_evm_r5_defconfig b/configs/am62px_evm_r5_defconfig
index 2550516..b365c7e 100644
--- a/configs/am62px_evm_r5_defconfig
+++ b/configs/am62px_evm_r5_defconfig
@@ -1,6 +1,5 @@
CONFIG_ARM=y
CONFIG_ARCH_K3=y
-CONFIG_TI_SECURE_DEVICE=y
CONFIG_SYS_MALLOC_F_LEN=0x9000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
@@ -20,6 +19,11 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_SPL_SYS_MALLOC_F_LEN=0x8000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x43c4b000
+CONFIG_SPL_BSS_MAX_SIZE=0x3000
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x200000
CONFIG_SPL_SIZE_LIMIT=0x3C000
CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x5000
CONFIG_SPL_FS_FAT=y
@@ -33,24 +37,14 @@
CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y
CONFIG_SPL_MAX_SIZE=0x3B000
CONFIG_SPL_PAD_TO=0x0
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x43c4b000
-CONFIG_SPL_BSS_MAX_SIZE=0x3000
CONFIG_SPL_SYS_REPORT_STACK_F_USAGE=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
-CONFIG_SPL_STACK_R=y
-CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x200000
CONFIG_SPL_SEPARATE_BSS=y
-CONFIG_SYS_SPL_MALLOC=y
-CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y
-CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x84000000
-CONFIG_SYS_SPL_MALLOC_SIZE=0x1000000
CONFIG_SPL_EARLY_BSS=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x400
CONFIG_SPL_DMA=y
CONFIG_SPL_DM_MAILBOX=y
-CONFIG_SPL_MTD_SUPPORT=y
CONFIG_SPL_DM_SPI_FLASH=y
CONFIG_SPL_DM_RESET=y
CONFIG_SPL_POWER_DOMAIN=y
diff --git a/configs/am62x_beagleplay_a53_defconfig b/configs/am62x_beagleplay_a53_defconfig
index d9751bc..4f1be1d 100644
--- a/configs/am62x_beagleplay_a53_defconfig
+++ b/configs/am62x_beagleplay_a53_defconfig
@@ -17,6 +17,10 @@
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x80c80000
+CONFIG_SPL_BSS_MAX_SIZE=0x80000
+CONFIG_SPL_STACK_R=y
CONFIG_SPL_SIZE_LIMIT=0x40000
CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x800
CONFIG_SPL_FS_FAT=y
@@ -34,12 +38,8 @@
CONFIG_BOOTCOMMAND="run set_led_state_start_load; run envboot; bootflow scan -lb;run set_led_state_fail_load"
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_MAX_SIZE=0x58000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x80c80000
-CONFIG_SPL_BSS_MAX_SIZE=0x80000
CONFIG_SPL_SYS_REPORT_STACK_F_USAGE=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
-CONFIG_SPL_STACK_R=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1400
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img"
@@ -47,10 +47,13 @@
CONFIG_SPL_DM_MAILBOX=y
CONFIG_SPL_POWER_DOMAIN=y
CONFIG_SPL_YMODEM_SUPPORT=y
+CONFIG_CMD_BOOTEFI_SELFTEST=y
+CONFIG_CMD_NVEDIT_EFI=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPIO_READ=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_EFIDEBUG=y
CONFIG_CMD_PMIC=y
CONFIG_CMD_REGULATOR=y
CONFIG_OF_CONTROL=y
@@ -88,9 +91,9 @@
CONFIG_MMC_SDHCI_AM654=y
CONFIG_PHY_REALTEK=y
CONFIG_PHY_TI=y
+CONFIG_DM_ETH_PHY=y
CONFIG_TI_AM65_CPSW_NUSS=y
CONFIG_PHY=y
-CONFIG_DM_ETH_PHY=y
CONFIG_PINCTRL=y
CONFIG_SPL_PINCTRL=y
CONFIG_PINCTRL_SINGLE=y
@@ -105,6 +108,8 @@
CONFIG_K3_SYSTEM_CONTROLLER=y
CONFIG_REMOTEPROC_TI_K3_ARM64=y
CONFIG_RESET_TI_SCI=y
+CONFIG_DM_RTC=y
+CONFIG_RTC_EMULATION=y
CONFIG_DM_SERIAL=y
CONFIG_SOC_DEVICE=y
CONFIG_SOC_DEVICE_TI_K3=y
@@ -115,3 +120,4 @@
CONFIG_EXT4_WRITE=y
CONFIG_FS_FAT_MAX_CLUSTSIZE=16384
CONFIG_LZO=y
+CONFIG_EFI_SET_TIME=y
diff --git a/configs/am62x_beagleplay_r5_defconfig b/configs/am62x_beagleplay_r5_defconfig
index 9413c85..d0cc4f5 100644
--- a/configs/am62x_beagleplay_r5_defconfig
+++ b/configs/am62x_beagleplay_r5_defconfig
@@ -20,6 +20,10 @@
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_SPL_SYS_MALLOC_F_LEN=0x7000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x43c3b000
+CONFIG_SPL_BSS_MAX_SIZE=0x3000
+CONFIG_SPL_STACK_R=y
CONFIG_SPL_SIZE_LIMIT=0x3A7F0
CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x3500
CONFIG_SPL_FS_FAT=y
@@ -32,13 +36,9 @@
CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y
CONFIG_SPL_MAX_SIZE=0x3B000
CONFIG_SPL_PAD_TO=0x0
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x43c3b000
-CONFIG_SPL_BSS_MAX_SIZE=0x3000
CONFIG_SPL_SYS_REPORT_STACK_F_USAGE=y
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
-CONFIG_SPL_STACK_R=y
CONFIG_SPL_SEPARATE_BSS=y
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
diff --git a/configs/am62x_evm_a53_defconfig b/configs/am62x_evm_a53_defconfig
index 4c1e4d7..6c708dc 100644
--- a/configs/am62x_evm_a53_defconfig
+++ b/configs/am62x_evm_a53_defconfig
@@ -17,6 +17,10 @@
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x80c80000
+CONFIG_SPL_BSS_MAX_SIZE=0x80000
+CONFIG_SPL_STACK_R=y
CONFIG_SPL_SIZE_LIMIT=0x40000
CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x800
CONFIG_SPL_FS_FAT=y
@@ -29,15 +33,11 @@
CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000
CONFIG_BOOTSTD_FULL=y
CONFIG_SYS_BOOTM_LEN=0x800000
-CONFIG_BOOTCOMMAND="run envboot; bootflow scan -lb"
+CONFIG_BOOTCOMMAND="run findfdt; run envboot; bootflow scan -lb"
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_MAX_SIZE=0x58000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x80c80000
-CONFIG_SPL_BSS_MAX_SIZE=0x80000
CONFIG_SPL_SYS_REPORT_STACK_F_USAGE=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
-CONFIG_SPL_STACK_R=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1400
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img"
@@ -49,7 +49,11 @@
CONFIG_SPL_SPI_LOAD=y
CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000
CONFIG_SPL_YMODEM_SUPPORT=y
+CONFIG_CMD_BOOTEFI_SELFTEST=y
+CONFIG_CMD_NVEDIT_EFI=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_EFIDEBUG=y
+CONFIG_MMC_SPEED_MODE_SET=y
CONFIG_OF_CONTROL=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_MULTI_DTB_FIT=y
@@ -93,6 +97,8 @@
CONFIG_K3_SYSTEM_CONTROLLER=y
CONFIG_REMOTEPROC_TI_K3_ARM64=y
CONFIG_RESET_TI_SCI=y
+CONFIG_DM_RTC=y
+CONFIG_RTC_EMULATION=y
CONFIG_DM_SERIAL=y
CONFIG_SOC_DEVICE=y
CONFIG_SOC_DEVICE_TI_K3=y
@@ -104,3 +110,4 @@
CONFIG_SPL_SYSRESET=y
CONFIG_SYSRESET_TI_SCI=y
CONFIG_FS_FAT_MAX_CLUSTSIZE=16384
+CONFIG_EFI_SET_TIME=y
diff --git a/configs/am62x_evm_r5_defconfig b/configs/am62x_evm_r5_defconfig
index 3e4d3a7..6482414 100644
--- a/configs/am62x_evm_r5_defconfig
+++ b/configs/am62x_evm_r5_defconfig
@@ -22,6 +22,11 @@
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_SPL_SYS_MALLOC_F_LEN=0x7000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x43c3b000
+CONFIG_SPL_BSS_MAX_SIZE=0x3000
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x200000
CONFIG_SPL_SIZE_LIMIT=0x3A7F0
CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x3500
CONFIG_SPL_FS_FAT=y
@@ -35,12 +40,8 @@
CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y
CONFIG_SPL_MAX_SIZE=0x3B000
CONFIG_SPL_PAD_TO=0x0
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x43c3b000
-CONFIG_SPL_BSS_MAX_SIZE=0x3000
CONFIG_SPL_SYS_REPORT_STACK_F_USAGE=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
-CONFIG_SPL_STACK_R=y
CONFIG_SPL_SEPARATE_BSS=y
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
diff --git a/configs/am64x_evm_a53_defconfig b/configs/am64x_evm_a53_defconfig
index b7057be..e000549 100644
--- a/configs/am64x_evm_a53_defconfig
+++ b/configs/am64x_evm_a53_defconfig
@@ -24,6 +24,10 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x80a00000
+CONFIG_SPL_BSS_MAX_SIZE=0x80000
+CONFIG_SPL_STACK_R=y
CONFIG_SPL_FS_FAT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
@@ -35,16 +39,12 @@
CONFIG_BOOTCOMMAND="run envboot; bootflow scan -lb"
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_MAX_SIZE=0x180000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x80a00000
-CONFIG_SPL_BSS_MAX_SIZE=0x80000
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
-CONFIG_SPL_STACK_R=y
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_SYS_MALLOC_SIZE=0x800000
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
-CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1400
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1800
CONFIG_SPL_DMA=y
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_ETH=y
@@ -63,17 +63,22 @@
CONFIG_SYS_SPI_U_BOOT_OFFS=0x300000
CONFIG_SPL_THERMAL=y
CONFIG_SPL_YMODEM_SUPPORT=y
+CONFIG_CMD_BOOTEFI_SELFTEST=y
CONFIG_CMD_ASKENV=y
+CONFIG_CMD_NVEDIT_EFI=y
CONFIG_CMD_DFU=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
+CONFIG_CMD_EFIDEBUG=y
CONFIG_CMD_TIME=y
CONFIG_CMD_PMIC=y
CONFIG_CMD_REGULATOR=y
+CONFIG_MMC_SPEED_MODE_SET=y
CONFIG_OF_CONTROL=y
CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_UPSTREAM=y
CONFIG_OF_LIST="ti/k3-am642-evm ti/k3-am642-sk"
CONFIG_MULTI_DTB_FIT=y
CONFIG_SPL_MULTI_DTB_FIT=y
@@ -139,6 +144,8 @@
CONFIG_K3_SYSTEM_CONTROLLER=y
CONFIG_REMOTEPROC_TI_K3_ARM64=y
CONFIG_RESET_TI_SCI=y
+CONFIG_DM_RTC=y
+CONFIG_RTC_EMULATION=y
CONFIG_DM_SERIAL=y
CONFIG_SOC_DEVICE=y
CONFIG_SOC_DEVICE_TI_K3=y
@@ -170,4 +177,4 @@
CONFIG_USB_FUNCTION_MASS_STORAGE=y
CONFIG_SPL_DFU=y
CONFIG_FS_FAT_MAX_CLUSTSIZE=16384
-CONFIG_OF_UPSTREAM=y
+CONFIG_EFI_SET_TIME=y
diff --git a/configs/am64x_evm_r5_defconfig b/configs/am64x_evm_r5_defconfig
index 555d69b..96475d4 100644
--- a/configs/am64x_evm_r5_defconfig
+++ b/configs/am64x_evm_r5_defconfig
@@ -22,6 +22,11 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x7019b800
+CONFIG_SPL_BSS_MAX_SIZE=0x4000
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x400000
CONFIG_SPL_SIZE_LIMIT=0x190000
CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x4000
CONFIG_SPL_FS_FAT=y
@@ -36,14 +41,9 @@
CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y
CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y
CONFIG_SPL_MAX_SIZE=0x180000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x7019b800
-CONFIG_SPL_BSS_MAX_SIZE=0x4000
CONFIG_SPL_SYS_REPORT_STACK_F_USAGE=y
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
-CONFIG_SPL_STACK_R=y
-CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x400000
CONFIG_SPL_SEPARATE_BSS=y
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
@@ -51,7 +51,7 @@
CONFIG_SPL_SYS_MALLOC_SIZE=0x1000000
CONFIG_SPL_EARLY_BSS=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
-CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x400
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x800
CONFIG_SPL_DMA=y
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_ETH=y
diff --git a/configs/am65x_evm_a53_defconfig b/configs/am65x_evm_a53_defconfig
index 500335f..ee79ade 100644
--- a/configs/am65x_evm_a53_defconfig
+++ b/configs/am65x_evm_a53_defconfig
@@ -22,6 +22,10 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x80a00000
+CONFIG_SPL_BSS_MAX_SIZE=0x80000
+CONFIG_SPL_STACK_R=y
CONFIG_ENV_OFFSET_REDUND=0x6A0000
CONFIG_SPL_FS_FAT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
@@ -37,11 +41,7 @@
CONFIG_BOOTCOMMAND="run findfdt; run distro_bootcmd; run init_${boot}; run boot_rprocs; if test ${boot_fit} -eq 1; then run get_fit_${boot}; run get_overlaystring; run run_fit; else; run get_kern_${boot}; run get_fdt_${boot}; run get_overlay_${boot}; run run_kern; fi;"
CONFIG_LOGLEVEL=7
CONFIG_SPL_MAX_SIZE=0x58000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x80a00000
-CONFIG_SPL_BSS_MAX_SIZE=0x80000
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
-CONFIG_SPL_STACK_R=y
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_SYS_MALLOC_SIZE=0x800000
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
@@ -68,11 +68,13 @@
CONFIG_CMD_MMC=y
CONFIG_CMD_PCI=y
CONFIG_CMD_REMOTEPROC=y
+CONFIG_SPL_LOAD_FIT_APPLY_OVERLAY=y
CONFIG_CMD_USB=y
CONFIG_CMD_TIME=y
CONFIG_MTDIDS_DEFAULT="nor0=47040000.spi.0"
CONFIG_MTDPARTS_DEFAULT="mtdparts=47040000.spi.0:512k(ospi.tiboot3),2m(ospi.tispl),4m(ospi.u-boot),128k(ospi.env),128k(ospi.env.backup),1m(ospi.sysfw),-@8m(ospi.rootfs)"
CONFIG_CMD_UBI=y
+CONFIG_MMC_SPEED_MODE_SET=y
# CONFIG_ISO_PARTITION is not set
CONFIG_OF_CONTROL=y
CONFIG_SPL_OF_CONTROL=y
@@ -128,6 +130,7 @@
CONFIG_E1000=y
CONFIG_CMD_E1000=y
CONFIG_TI_AM65_CPSW_NUSS=y
+CONFIG_TI_ICSSG_PRUETH=y
CONFIG_PCI_KEYSTONE=y
CONFIG_PHY=y
CONFIG_SPL_PHY=y
diff --git a/configs/am65x_evm_r5_defconfig b/configs/am65x_evm_r5_defconfig
index d6e85db..4fc9c39 100644
--- a/configs/am65x_evm_r5_defconfig
+++ b/configs/am65x_evm_r5_defconfig
@@ -21,6 +21,10 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x41c7effc
+CONFIG_SPL_BSS_MAX_SIZE=0xc00
+CONFIG_SPL_STACK_R=y
CONFIG_SPL_SIZE_LIMIT=0x7ec00
CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x2000
CONFIG_SPL_FS_FAT=y
@@ -35,11 +39,7 @@
CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y
CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y
CONFIG_SPL_MAX_SIZE=0x58000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x41c7effc
-CONFIG_SPL_BSS_MAX_SIZE=0xc00
CONFIG_SPL_SYS_REPORT_STACK_F_USAGE=y
-CONFIG_SPL_STACK_R=y
CONFIG_SPL_SEPARATE_BSS=y
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
diff --git a/configs/am65x_evm_r5_usbdfu_defconfig b/configs/am65x_evm_r5_usbdfu_defconfig
index 09f0c6a..953487c 100644
--- a/configs/am65x_evm_r5_usbdfu_defconfig
+++ b/configs/am65x_evm_r5_usbdfu_defconfig
@@ -19,6 +19,10 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x41c7effc
+CONFIG_SPL_BSS_MAX_SIZE=0xc00
+CONFIG_SPL_STACK_R=y
CONFIG_SPL_SIZE_LIMIT=0x7ec00
CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x2000
CONFIG_SPL_LIBDISK_SUPPORT=y
@@ -31,11 +35,7 @@
CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y
CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y
CONFIG_SPL_MAX_SIZE=0x58000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x41c7effc
-CONFIG_SPL_BSS_MAX_SIZE=0xc00
CONFIG_SPL_SYS_REPORT_STACK_F_USAGE=y
-CONFIG_SPL_STACK_R=y
CONFIG_SPL_SEPARATE_BSS=y
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
diff --git a/configs/am65x_evm_r5_usbmsc_defconfig b/configs/am65x_evm_r5_usbmsc_defconfig
index 4d95ab6..0151761 100644
--- a/configs/am65x_evm_r5_usbmsc_defconfig
+++ b/configs/am65x_evm_r5_usbmsc_defconfig
@@ -19,6 +19,10 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x41c7effc
+CONFIG_SPL_BSS_MAX_SIZE=0xc00
+CONFIG_SPL_STACK_R=y
CONFIG_SPL_SIZE_LIMIT=0x7ec00
CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x2000
CONFIG_SPL_FS_FAT=y
@@ -31,11 +35,7 @@
CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y
CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y
CONFIG_SPL_MAX_SIZE=0x58000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x41c7effc
-CONFIG_SPL_BSS_MAX_SIZE=0xc00
CONFIG_SPL_SYS_REPORT_STACK_F_USAGE=y
-CONFIG_SPL_STACK_R=y
CONFIG_SPL_SEPARATE_BSS=y
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
diff --git a/configs/anbernic-rgxx3-rk3566_defconfig b/configs/anbernic-rgxx3-rk3566_defconfig
index c8c9238..fcade91 100644
--- a/configs/anbernic-rgxx3-rk3566_defconfig
+++ b/configs/anbernic-rgxx3-rk3566_defconfig
@@ -3,12 +3,9 @@
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SPL_GPIO=y
-CONFIG_NR_DRAM_BANKS=2
CONFIG_DEFAULT_DEVICE_TREE="rk3566-anbernic-rgxx3"
CONFIG_ROCKCHIP_RK3568=y
-CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
CONFIG_ROCKCHIP_RK8XX_DISABLE_BOOT_ON_POWERON=y
-CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_TARGET_ANBERNIC_RGXX3_RK3566=y
CONFIG_DEBUG_UART_BASE=0xFE660000
@@ -70,8 +67,6 @@
CONFIG_PWM_ROCKCHIP=y
CONFIG_SPL_RAM=y
# CONFIG_RAM_ROCKCHIP_DEBUG is not set
-CONFIG_DM_RNG=y
-CONFIG_RNG_ROCKCHIP=y
# CONFIG_RNG_SMCCC_TRNG is not set
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
diff --git a/configs/apple_m1_defconfig b/configs/apple_m1_defconfig
index e00d72e..20d2cff 100644
--- a/configs/apple_m1_defconfig
+++ b/configs/apple_m1_defconfig
@@ -3,13 +3,16 @@
CONFIG_DEFAULT_DEVICE_TREE="t8103-j274"
CONFIG_SYS_LOAD_ADDR=0x0
CONFIG_SYS_BOOTM_LEN=0x800000
+CONFIG_BOOTCOMMAND="bootflow scan -b"
CONFIG_USE_PREBOOT=y
CONFIG_SYS_CBSIZE=256
CONFIG_SYS_PBSIZE=276
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_BOARD_LATE_INIT=y
+CONFIG_CMD_SELECT_FONT=y
# CONFIG_NET is not set
+CONFIG_SYS_64BIT_LBA=y
CONFIG_APPLE_SPI_KEYB=y
# CONFIG_MMC is not set
CONFIG_NVME_APPLE=y
@@ -18,6 +21,7 @@
CONFIG_USB_XHCI_PCI=y
CONFIG_USB_DWC3=y
CONFIG_USB_KEYBOARD=y
+CONFIG_VIDEO_FONT_16X32=y
CONFIG_SYS_WHITE_ON_BLACK=y
CONFIG_NO_FB_CLEAR=y
CONFIG_VIDEO_SIMPLE=y
diff --git a/configs/arbel_evb_defconfig b/configs/arbel_evb_defconfig
index 45fafe7..08753ae 100644
--- a/configs/arbel_evb_defconfig
+++ b/configs/arbel_evb_defconfig
@@ -80,7 +80,6 @@
CONFIG_PINCTRL_NPCM8XX=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_NPCM8XX=y
-CONFIG_RESET_SYSCON=y
CONFIG_RNG_NPCM=y
CONFIG_DM_SERIAL=y
CONFIG_NPCM_SERIAL=y
@@ -90,8 +89,6 @@
CONFIG_NPCM_PSPI=y
CONFIG_TEE=y
CONFIG_OPTEE=y
-CONFIG_TIMER=y
-CONFIG_NPCM_TIMER=y
CONFIG_TPM2_FTPM_TEE=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/axm_defconfig b/configs/axm_defconfig
index 1a892a9..8588f8c 100644
--- a/configs/axm_defconfig
+++ b/configs/axm_defconfig
@@ -21,6 +21,9 @@
CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20-taurus"
CONFIG_SPL_STACK=0x304000
CONFIG_SPL_SYS_MALLOC_F_LEN=0x1000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x3e00
+CONFIG_SPL_BSS_MAX_SIZE=0x600
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0xfffff200
CONFIG_DEBUG_UART_CLOCK=18432000
@@ -39,9 +42,6 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_MAX_SIZE=0x3e00
CONFIG_SPL_PAD_TO=0x20000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x3e00
-CONFIG_SPL_BSS_MAX_SIZE=0x600
# CONFIG_SPL_LEGACY_IMAGE_FORMAT is not set
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
diff --git a/configs/bananapi-cm4-cm4io_defconfig b/configs/bananapi-cm4-cm4io_defconfig
index 116147f..cb78dab 100644
--- a/configs/bananapi-cm4-cm4io_defconfig
+++ b/configs/bananapi-cm4-cm4io_defconfig
@@ -6,7 +6,7 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="meson-g12b-bananapi-cm4-cm4io"
+CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-g12b-bananapi-cm4-cm4io"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_MESON_G12A=y
diff --git a/configs/bananapi-m2-pro_defconfig b/configs/bananapi-m2-pro_defconfig
index 755bccb..196bc40 100644
--- a/configs/bananapi-m2-pro_defconfig
+++ b/configs/bananapi-m2-pro_defconfig
@@ -6,7 +6,7 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="meson-sm1-bananapi-m2-pro"
+CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-sm1-bananapi-m2-pro"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_MESON_G12A=y
diff --git a/configs/bananapi-m2s_defconfig b/configs/bananapi-m2s_defconfig
index af8dace..7b137d5 100644
--- a/configs/bananapi-m2s_defconfig
+++ b/configs/bananapi-m2s_defconfig
@@ -6,7 +6,7 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="meson-g12b-a311d-bananapi-m2s"
+CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-g12b-a311d-bananapi-m2s"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_MESON_G12A=y
diff --git a/configs/bananapi-m5_defconfig b/configs/bananapi-m5_defconfig
index 6de5d5f..99ed7c9 100644
--- a/configs/bananapi-m5_defconfig
+++ b/configs/bananapi-m5_defconfig
@@ -6,7 +6,7 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="meson-sm1-bananapi-m5"
+CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-sm1-bananapi-m5"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_MESON_G12A=y
diff --git a/configs/beelink-gsking-x_defconfig b/configs/beelink-gsking-x_defconfig
index 99e36e9..c1e60ed 100644
--- a/configs/beelink-gsking-x_defconfig
+++ b/configs/beelink-gsking-x_defconfig
@@ -7,7 +7,7 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="meson-g12b-gsking-x"
+CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-g12b-gsking-x"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_MESON_G12A=y
diff --git a/configs/beelink-gt1-ultimate_defconfig b/configs/beelink-gt1-ultimate_defconfig
index 00fdad8..0e30e13 100644
--- a/configs/beelink-gt1-ultimate_defconfig
+++ b/configs/beelink-gt1-ultimate_defconfig
@@ -6,7 +6,7 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="meson-gxm-gt1-ultimate"
+CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-gxm-gt1-ultimate"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_MESON_GXM=y
diff --git a/configs/beelink-gtking_defconfig b/configs/beelink-gtking_defconfig
index 5c21d8e..0b644f0 100644
--- a/configs/beelink-gtking_defconfig
+++ b/configs/beelink-gtking_defconfig
@@ -7,7 +7,7 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="meson-g12b-gtking"
+CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-g12b-gtking"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_MESON_G12A=y
diff --git a/configs/beelink-gtkingpro_defconfig b/configs/beelink-gtkingpro_defconfig
index 37bb4cd..a694617 100644
--- a/configs/beelink-gtkingpro_defconfig
+++ b/configs/beelink-gtkingpro_defconfig
@@ -7,7 +7,7 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="meson-g12b-gtking-pro"
+CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-g12b-gtking-pro"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_MESON_G12A=y
diff --git a/configs/bitmain_antminer_s9_defconfig b/configs/bitmain_antminer_s9_defconfig
index 494c018..4bade84 100644
--- a/configs/bitmain_antminer_s9_defconfig
+++ b/configs/bitmain_antminer_s9_defconfig
@@ -12,6 +12,10 @@
CONFIG_SPL_STACK_R_ADDR=0x200000
CONFIG_SYS_BOOTCOUNT_ADDR=0xEFFFFF0
CONFIG_SPL_STACK=0xfffffe00
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x100000
+CONFIG_SPL_BSS_MAX_SIZE=0x100000
+CONFIG_SPL_STACK_R=y
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0xe0001000
CONFIG_SYS_LOAD_ADDR=0x0
@@ -30,11 +34,7 @@
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_CLOCKS=y
CONFIG_SPL_MAX_SIZE=0x30000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x100000
-CONFIG_SPL_BSS_MAX_SIZE=0x100000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
-CONFIG_SPL_STACK_R=y
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_SYS_MALLOC_SIZE=0x2000000
CONFIG_HUSH_PARSER=y
diff --git a/configs/blanche_defconfig b/configs/blanche_defconfig
index af7622a..a2823a6 100644
--- a/configs/blanche_defconfig
+++ b/configs/blanche_defconfig
@@ -12,7 +12,7 @@
CONFIG_ENV_OFFSET=0x40000
CONFIG_ENV_SECT_SIZE=0x40000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="r8a7792-blanche-u-boot"
+CONFIG_DEFAULT_DEVICE_TREE="renesas/r8a7792-blanche"
CONFIG_ARCH_RENESAS_BOARD_STRING="Blanche"
CONFIG_R8A7792=y
CONFIG_TARGET_BLANCHE=y
diff --git a/configs/bpi-r2-pro-rk3568_defconfig b/configs/bpi-r2-pro-rk3568_defconfig
index 5cc9524..a0caa36 100644
--- a/configs/bpi-r2-pro-rk3568_defconfig
+++ b/configs/bpi-r2-pro-rk3568_defconfig
@@ -2,7 +2,6 @@
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_NR_DRAM_BANKS=2
CONFIG_DEFAULT_DEVICE_TREE="rk3568-bpi-r2-pro"
CONFIG_ROCKCHIP_RK3568=y
CONFIG_SPL_SERIAL=y
@@ -15,7 +14,6 @@
CONFIG_FIT_VERBOSE=y
CONFIG_SPL_FIT_SIGNATURE=y
CONFIG_SPL_LOAD_FIT=y
-CONFIG_BOOTSTD_FULL=y
CONFIG_LEGACY_IMAGE_FORMAT=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-bpi-r2-pro.dtb"
# CONFIG_DISPLAY_CPUINFO is not set
diff --git a/configs/cgtqmx8_defconfig b/configs/cgtqmx8_defconfig
index 47f51e0..24dfdae 100644
--- a/configs/cgtqmx8_defconfig
+++ b/configs/cgtqmx8_defconfig
@@ -17,6 +17,9 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x13e000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x128000
+CONFIG_SPL_BSS_MAX_SIZE=0x1000
CONFIG_SPL=y
CONFIG_SYS_LOAD_ADDR=0x80280000
CONFIG_REMAKE_ELF=y
@@ -33,9 +36,6 @@
CONFIG_LOG=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_MAX_SIZE=0x1f000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x128000
-CONFIG_SPL_BSS_MAX_SIZE=0x1000
# CONFIG_SPL_BINMAN_UBOOT_SYMBOLS is not set
CONFIG_SPL_BOARD_INIT=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
diff --git a/configs/chromebit_mickey_defconfig b/configs/chromebit_mickey_defconfig
index c413647..e5d805d 100644
--- a/configs/chromebit_mickey_defconfig
+++ b/configs/chromebit_mickey_defconfig
@@ -17,6 +17,8 @@
CONFIG_TARGET_CHROMEBIT_MICKEY=y
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_SPL_STACK=0xff718000
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
CONFIG_DEBUG_UART_BASE=0xff690000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SPL_SPI_FLASH_SUPPORT=y
@@ -36,8 +38,6 @@
CONFIG_SPL_NO_BSS_LIMIT=y
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
-CONFIG_SPL_STACK_R=y
-CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
CONFIG_SPL_SPI_LOAD=y
CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
diff --git a/configs/chromebook_bob_defconfig b/configs/chromebook_bob_defconfig
index d032194..55d4470 100644
--- a/configs/chromebook_bob_defconfig
+++ b/configs/chromebook_bob_defconfig
@@ -17,6 +17,11 @@
CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000
# CONFIG_SPL_MMC is not set
CONFIG_SPL_STACK=0xff8effff
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0xff8e0000
+CONFIG_SPL_BSS_MAX_SIZE=0x10000
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
CONFIG_DEBUG_UART_BASE=0xff1a0000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SPL_SPI_FLASH_SUPPORT=y
@@ -32,14 +37,9 @@
CONFIG_BLOBLIST_SIZE=0x1000
CONFIG_SPL_MAX_SIZE=0x2e000
CONFIG_SPL_PAD_TO=0x7f8000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0xff8e0000
-CONFIG_SPL_BSS_MAX_SIZE=0x10000
CONFIG_HANDOFF=y
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
-CONFIG_SPL_STACK_R=y
-CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
CONFIG_SPL_SPI_LOAD=y
CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
diff --git a/configs/chromebook_jerry_defconfig b/configs/chromebook_jerry_defconfig
index 4b80d6a..9bc5953 100644
--- a/configs/chromebook_jerry_defconfig
+++ b/configs/chromebook_jerry_defconfig
@@ -16,6 +16,8 @@
# CONFIG_SPL_MMC is not set
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_SPL_STACK=0xff718000
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
CONFIG_DEBUG_UART_BASE=0xff690000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SPL_SPI_FLASH_SUPPORT=y
@@ -35,8 +37,6 @@
CONFIG_SPL_NO_BSS_LIMIT=y
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
-CONFIG_SPL_STACK_R=y
-CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
CONFIG_SPL_SPI_LOAD=y
CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
diff --git a/configs/chromebook_kevin_defconfig b/configs/chromebook_kevin_defconfig
index 120c11c..48ee8b9 100644
--- a/configs/chromebook_kevin_defconfig
+++ b/configs/chromebook_kevin_defconfig
@@ -18,6 +18,11 @@
# CONFIG_SPL_MMC is not set
CONFIG_TARGET_CHROMEBOOK_KEVIN=y
CONFIG_SPL_STACK=0xff8effff
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0xff8e0000
+CONFIG_SPL_BSS_MAX_SIZE=0x10000
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
CONFIG_DEBUG_UART_BASE=0xff1a0000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SPL_SPI_FLASH_SUPPORT=y
@@ -33,14 +38,9 @@
CONFIG_BLOBLIST_SIZE=0x1000
CONFIG_SPL_MAX_SIZE=0x2e000
CONFIG_SPL_PAD_TO=0x7f8000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0xff8e0000
-CONFIG_SPL_BSS_MAX_SIZE=0x10000
CONFIG_HANDOFF=y
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
-CONFIG_SPL_STACK_R=y
-CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
CONFIG_SPL_SPI_LOAD=y
CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
diff --git a/configs/chromebook_minnie_defconfig b/configs/chromebook_minnie_defconfig
index 126b8ce..26fa05e 100644
--- a/configs/chromebook_minnie_defconfig
+++ b/configs/chromebook_minnie_defconfig
@@ -17,6 +17,8 @@
CONFIG_TARGET_CHROMEBOOK_MINNIE=y
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_SPL_STACK=0xff718000
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
CONFIG_DEBUG_UART_BASE=0xff690000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SPL_SPI_FLASH_SUPPORT=y
@@ -36,8 +38,6 @@
CONFIG_SPL_NO_BSS_LIMIT=y
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
-CONFIG_SPL_STACK_R=y
-CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
CONFIG_SPL_SPI_LOAD=y
CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
diff --git a/configs/chromebook_speedy_defconfig b/configs/chromebook_speedy_defconfig
index 2346c83..5deb09b 100644
--- a/configs/chromebook_speedy_defconfig
+++ b/configs/chromebook_speedy_defconfig
@@ -17,6 +17,8 @@
CONFIG_TARGET_CHROMEBOOK_SPEEDY=y
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_SPL_STACK=0xff718000
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
CONFIG_DEBUG_UART_BASE=0xff690000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SPL_SPI_FLASH_SUPPORT=y
@@ -36,8 +38,6 @@
CONFIG_SPL_NO_BSS_LIMIT=y
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
-CONFIG_SPL_STACK_R=y
-CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
CONFIG_SPL_SPI_LOAD=y
CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
diff --git a/configs/ci20_mmc_defconfig b/configs/ci20_mmc_defconfig
index 07c5a26..39f3384 100644
--- a/configs/ci20_mmc_defconfig
+++ b/configs/ci20_mmc_defconfig
@@ -12,6 +12,8 @@
CONFIG_SYS_MONITOR_LEN=524288
CONFIG_SPL_MMC=y
CONFIG_SPL_STACK=0xf4008000
+CONFIG_SPL_BSS_START_ADDR=0xf4004000
+CONFIG_SPL_BSS_MAX_SIZE=0x2000
CONFIG_SPL=y
CONFIG_SYS_LOAD_ADDR=0x81000000
CONFIG_ARCH_JZ47XX=y
@@ -28,8 +30,6 @@
CONFIG_MISC_INIT_R=y
CONFIG_SYS_MALLOC_BOOTPARAMS=y
CONFIG_SPL_MAX_SIZE=0x2e00
-CONFIG_SPL_BSS_START_ADDR=0xf4004000
-CONFIG_SPL_BSS_MAX_SIZE=0x2000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
# CONFIG_SPL_BANNER_PRINT is not set
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
diff --git a/configs/cl-som-imx7_defconfig b/configs/cl-som-imx7_defconfig
index 38177a7..217617e 100644
--- a/configs/cl-som-imx7_defconfig
+++ b/configs/cl-som-imx7_defconfig
@@ -16,6 +16,8 @@
CONFIG_SYS_MONITOR_LEN=409600
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_MAX_SIZE=0x100000
CONFIG_SPL=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI=y
@@ -29,8 +31,6 @@
CONFIG_SYS_PBSIZE=543
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_MAX_SIZE=0xe000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_MAX_SIZE=0x100000
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x80
diff --git a/configs/clearfog_defconfig b/configs/clearfog_defconfig
index db2f266..9bbc723 100644
--- a/configs/clearfog_defconfig
+++ b/configs/clearfog_defconfig
@@ -14,6 +14,9 @@
CONFIG_SPL_TEXT_BASE=0x40000030
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0x4002c000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x40023000
+CONFIG_SPL_BSS_MAX_SIZE=0x4000
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0xf1012000
CONFIG_DEBUG_UART_CLOCK=250000000
@@ -28,9 +31,6 @@
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SPL_MAX_SIZE=0x22fd0
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x40023000
-CONFIG_SPL_BSS_MAX_SIZE=0x4000
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_I2C=y
diff --git a/configs/clearfog_sata_defconfig b/configs/clearfog_sata_defconfig
index c7e7491..9ddd5d2 100644
--- a/configs/clearfog_sata_defconfig
+++ b/configs/clearfog_sata_defconfig
@@ -14,6 +14,9 @@
CONFIG_SPL_TEXT_BASE=0x40000030
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0x4002c000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x40023000
+CONFIG_SPL_BSS_MAX_SIZE=0x4000
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0xf1012000
CONFIG_DEBUG_UART_CLOCK=250000000
@@ -28,9 +31,6 @@
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SPL_MAX_SIZE=0x22fd0
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x40023000
-CONFIG_SPL_BSS_MAX_SIZE=0x4000
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_I2C=y
diff --git a/configs/clearfog_spi_defconfig b/configs/clearfog_spi_defconfig
index 8d3dd01..4175fdb17 100644
--- a/configs/clearfog_spi_defconfig
+++ b/configs/clearfog_spi_defconfig
@@ -14,6 +14,9 @@
CONFIG_SPL_TEXT_BASE=0x40000030
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0x4002c000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x40023000
+CONFIG_SPL_BSS_MAX_SIZE=0x4000
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0xf1012000
CONFIG_DEBUG_UART_CLOCK=250000000
@@ -28,9 +31,6 @@
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SPL_MAX_SIZE=0x22fd0
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x40023000
-CONFIG_SPL_BSS_MAX_SIZE=0x4000
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_I2C=y
diff --git a/configs/colibri-imx6ull_defconfig b/configs/colibri-imx6ull_defconfig
index fc10d7f..4a0ff02 100644
--- a/configs/colibri-imx6ull_defconfig
+++ b/configs/colibri-imx6ull_defconfig
@@ -18,6 +18,7 @@
CONFIG_FIT_VERBOSE=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=1
+CONFIG_OF_ENV_SETUP=y
CONFIG_BOOTCOMMAND="run ubiboot || run distro_bootcmd;"
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="test -n ${fdtfile} || setenv fdtfile imx6ull-colibri${variant}-${fdt_board}.dtb"
diff --git a/configs/colibri_imx7_defconfig b/configs/colibri_imx7_defconfig
index 16f923b..47c2ffc 100644
--- a/configs/colibri_imx7_defconfig
+++ b/configs/colibri_imx7_defconfig
@@ -19,6 +19,7 @@
CONFIG_FIT_VERBOSE=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=1
+CONFIG_OF_ENV_SETUP=y
CONFIG_BOOTCOMMAND="run ubiboot ; echo ; echo ubiboot failed ; run distro_bootcmd;"
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="test -n ${fdtfile} || setenv fdtfile ${soc}-colibri-${fdt_board}.dtb "
@@ -99,12 +100,12 @@
CONFIG_PMIC_RN5T567=y
CONFIG_MXC_UART=y
CONFIG_IMX_THERMAL=y
-CONFIG_IMX_WATCHDOG=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_MANUFACTURER="Toradex"
CONFIG_USB_GADGET_VENDOR_NUM=0x1b67
CONFIG_USB_GADGET_PRODUCT_NUM=0x4000
-CONFIG_WDT=y
CONFIG_CI_UDC=y
+CONFIG_IMX_WATCHDOG=y
+CONFIG_WDT=y
diff --git a/configs/colibri_imx7_emmc_defconfig b/configs/colibri_imx7_emmc_defconfig
index 7c6a725..001f2f9 100644
--- a/configs/colibri_imx7_emmc_defconfig
+++ b/configs/colibri_imx7_emmc_defconfig
@@ -85,12 +85,12 @@
CONFIG_PMIC_RN5T567=y
CONFIG_MXC_UART=y
CONFIG_IMX_THERMAL=y
-CONFIG_IMX_WATCHDOG=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_MANUFACTURER="Toradex"
CONFIG_USB_GADGET_VENDOR_NUM=0x1b67
CONFIG_USB_GADGET_PRODUCT_NUM=0x4000
-CONFIG_WDT=y
CONFIG_CI_UDC=y
+CONFIG_IMX_WATCHDOG=y
+CONFIG_WDT=y
diff --git a/configs/controlcenterdc_defconfig b/configs/controlcenterdc_defconfig
index 351d392..cf7499b 100644
--- a/configs/controlcenterdc_defconfig
+++ b/configs/controlcenterdc_defconfig
@@ -17,6 +17,9 @@
CONFIG_SPL_TEXT_BASE=0x40000030
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0x40031000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x40028000
+CONFIG_SPL_BSS_MAX_SIZE=0x4000
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0xf1012000
CONFIG_DEBUG_UART_CLOCK=250000000
@@ -36,9 +39,6 @@
CONFIG_BOARD_LATE_INIT=y
CONFIG_LAST_STAGE_INIT=y
CONFIG_SPL_MAX_SIZE=0x27fd0
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x40028000
-CONFIG_SPL_BSS_MAX_SIZE=0x4000
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
diff --git a/configs/coolpi-4b-rk3588s_defconfig b/configs/coolpi-4b-rk3588s_defconfig
index a0fe370..2608bb6 100644
--- a/configs/coolpi-4b-rk3588s_defconfig
+++ b/configs/coolpi-4b-rk3588s_defconfig
@@ -2,7 +2,6 @@
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_NR_DRAM_BANKS=2
CONFIG_SF_DEFAULT_SPEED=24000000
CONFIG_SF_DEFAULT_MODE=0x2000
CONFIG_DEFAULT_DEVICE_TREE="rk3588s-coolpi-4b"
@@ -23,7 +22,6 @@
CONFIG_SPL_FIT_SIGNATURE=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_LEGACY_IMAGE_FORMAT=y
-CONFIG_OF_BOARD_SETUP=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588s-coolpi-4b.dtb"
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
diff --git a/configs/coolpi-cm5-evb-rk3588_defconfig b/configs/coolpi-cm5-evb-rk3588_defconfig
index fc17660..c5bb7a4 100644
--- a/configs/coolpi-cm5-evb-rk3588_defconfig
+++ b/configs/coolpi-cm5-evb-rk3588_defconfig
@@ -2,7 +2,6 @@
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_NR_DRAM_BANKS=2
CONFIG_SF_DEFAULT_SPEED=24000000
CONFIG_SF_DEFAULT_MODE=0x2000
CONFIG_DEFAULT_DEVICE_TREE="rk3588-coolpi-cm5-evb"
@@ -23,7 +22,6 @@
CONFIG_SPL_FIT_SIGNATURE=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_LEGACY_IMAGE_FORMAT=y
-CONFIG_OF_BOARD_SETUP=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-coolpi-cm5-evb.dtb"
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
diff --git a/configs/coreboot64_defconfig b/configs/coreboot64_defconfig
index dab5eaf..da42ad0 100644
--- a/configs/coreboot64_defconfig
+++ b/configs/coreboot64_defconfig
@@ -16,6 +16,7 @@
CONFIG_SHOW_BOOT_PROGRESS=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro"
+CONFIG_BOOTCOMMAND="bootflow scan -l; if bootflow menu; then cls; bootflow boot; fi"
CONFIG_SYS_PBSIZE=532
CONFIG_PRE_CONSOLE_BUFFER=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
@@ -59,6 +60,7 @@
CONFIG_SOUND=y
CONFIG_SOUND_I8254=y
CONFIG_VIDEO_COPY=y
+CONFIG_CONSOLE_TRUETYPE=y
CONFIG_CONSOLE_SCROLL_LINES=5
CONFIG_SPL_ACPI=y
CONFIG_CMD_DHRYSTONE=y
diff --git a/configs/coreboot_defconfig b/configs/coreboot_defconfig
index c846dfc..0b103ef 100644
--- a/configs/coreboot_defconfig
+++ b/configs/coreboot_defconfig
@@ -14,6 +14,7 @@
CONFIG_SHOW_BOOT_PROGRESS=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro"
+CONFIG_BOOTCOMMAND="bootflow scan -l; if bootflow menu; then cls; bootflow boot; fi"
CONFIG_PRE_CONSOLE_BUFFER=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_LOG=y
@@ -53,6 +54,7 @@
CONFIG_SOUND=y
CONFIG_SOUND_I8254=y
CONFIG_VIDEO_COPY=y
+CONFIG_CONSOLE_TRUETYPE=y
CONFIG_CONSOLE_SCROLL_LINES=5
CONFIG_CMD_DHRYSTONE=y
# CONFIG_GZIP is not set
diff --git a/configs/corvus_defconfig b/configs/corvus_defconfig
index 3f05730..65e24b7 100644
--- a/configs/corvus_defconfig
+++ b/configs/corvus_defconfig
@@ -21,6 +21,9 @@
CONFIG_SPL_TEXT_BASE=0x300000
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0x4000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x3000
+CONFIG_SPL_BSS_MAX_SIZE=0x800
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x180000
CONFIG_SYS_LOAD_ADDR=0x70000000
@@ -36,9 +39,6 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_MAX_SIZE=0x3000
CONFIG_SPL_PAD_TO=0x20000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x3000
-CONFIG_SPL_BSS_MAX_SIZE=0x800
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_NAND_SUPPORT=y
diff --git a/configs/d2net_v2_defconfig b/configs/d2net_v2_defconfig
index bb1bcb0..69658a2 100644
--- a/configs/d2net_v2_defconfig
+++ b/configs/d2net_v2_defconfig
@@ -11,7 +11,7 @@
CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_OFFSET=0x70000
CONFIG_ENV_SECT_SIZE=0x10000
-CONFIG_DEFAULT_DEVICE_TREE="kirkwood-d2net"
+CONFIG_DEFAULT_DEVICE_TREE="marvell/kirkwood-d2net"
CONFIG_IDENT_STRING=" D2 v2"
CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_ENV_ADDR=0x70000
diff --git a/configs/da850evm_defconfig b/configs/da850evm_defconfig
index 8130575..1095a76 100644
--- a/configs/da850evm_defconfig
+++ b/configs/da850evm_defconfig
@@ -22,6 +22,8 @@
CONFIG_SPL_TEXT_BASE=0x80000000
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0x8001ff00
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0xc0000000
CONFIG_SPL=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI=y
@@ -40,8 +42,6 @@
CONFIG_HWCONFIG=y
CONFIG_MISC_INIT_R=y
CONFIG_SPL_PAD_TO=0x8000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0xc0000000
CONFIG_SPL_FOOTPRINT_LIMIT=y
CONFIG_SPL_MAX_FOOTPRINT=0x8000
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
diff --git a/configs/da850evm_nand_defconfig b/configs/da850evm_nand_defconfig
index 330f881..1f22b65 100644
--- a/configs/da850evm_nand_defconfig
+++ b/configs/da850evm_nand_defconfig
@@ -19,6 +19,8 @@
CONFIG_SPL_TEXT_BASE=0x80000000
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0x8001ff00
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0xc0000000
CONFIG_SPL=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI=y
@@ -36,8 +38,6 @@
CONFIG_CLOCKS=y
CONFIG_HWCONFIG=y
CONFIG_SPL_PAD_TO=0x8000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0xc0000000
CONFIG_SPL_FOOTPRINT_LIMIT=y
CONFIG_SPL_MAX_FOOTPRINT=0x8000
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
diff --git a/configs/db-88f6720_defconfig b/configs/db-88f6720_defconfig
index f30d878..33b8b80 100644
--- a/configs/db-88f6720_defconfig
+++ b/configs/db-88f6720_defconfig
@@ -15,6 +15,9 @@
CONFIG_SPL_TEXT_BASE=0x40000030
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0x4002c000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x40020000
+CONFIG_SPL_BSS_MAX_SIZE=0x4000
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0xf1012000
CONFIG_DEBUG_UART_CLOCK=250000000
@@ -27,9 +30,6 @@
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SPL_MAX_SIZE=0x1ffd0
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x40020000
-CONFIG_SPL_BSS_MAX_SIZE=0x4000
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_I2C=y
diff --git a/configs/db-88f6820-amc_defconfig b/configs/db-88f6820-amc_defconfig
index f67737a..540a348 100644
--- a/configs/db-88f6820-amc_defconfig
+++ b/configs/db-88f6820-amc_defconfig
@@ -15,6 +15,9 @@
CONFIG_SPL_TEXT_BASE=0x40000030
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0x4002c000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x40023000
+CONFIG_SPL_BSS_MAX_SIZE=0x4000
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0xf1012000
CONFIG_DEBUG_UART_CLOCK=200000000
@@ -29,9 +32,6 @@
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SPL_MAX_SIZE=0x22fd0
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x40023000
-CONFIG_SPL_BSS_MAX_SIZE=0x4000
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_I2C=y
diff --git a/configs/db-88f6820-amc_nand_defconfig b/configs/db-88f6820-amc_nand_defconfig
index b6b772e..4d4cf36 100644
--- a/configs/db-88f6820-amc_nand_defconfig
+++ b/configs/db-88f6820-amc_nand_defconfig
@@ -17,6 +17,9 @@
CONFIG_SPL_TEXT_BASE=0x40000030
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0x4002c000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x40023000
+CONFIG_SPL_BSS_MAX_SIZE=0x4000
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0xf1012000
CONFIG_DEBUG_UART_CLOCK=200000000
@@ -31,9 +34,6 @@
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SPL_MAX_SIZE=0x22fd0
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x40023000
-CONFIG_SPL_BSS_MAX_SIZE=0x4000
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_I2C=y
diff --git a/configs/db-88f6820-gp_defconfig b/configs/db-88f6820-gp_defconfig
index cc98e35..4f98ee4 100644
--- a/configs/db-88f6820-gp_defconfig
+++ b/configs/db-88f6820-gp_defconfig
@@ -15,6 +15,9 @@
CONFIG_SPL_TEXT_BASE=0x40000030
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0x4002c000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x40023000
+CONFIG_SPL_BSS_MAX_SIZE=0x4000
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0xf1012000
CONFIG_DEBUG_UART_CLOCK=250000000
@@ -28,9 +31,6 @@
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SPL_MAX_SIZE=0x22fd0
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x40023000
-CONFIG_SPL_BSS_MAX_SIZE=0x4000
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_I2C=y
diff --git a/configs/db-mv784mp-gp_defconfig b/configs/db-mv784mp-gp_defconfig
index 5d78b14..d776693 100644
--- a/configs/db-mv784mp-gp_defconfig
+++ b/configs/db-mv784mp-gp_defconfig
@@ -15,6 +15,9 @@
CONFIG_SPL_TEXT_BASE=0x40004030
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0x4002c000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x40020000
+CONFIG_SPL_BSS_MAX_SIZE=0x4000
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0xf1012000
CONFIG_DEBUG_UART_CLOCK=250000000
@@ -28,9 +31,6 @@
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SPL_MAX_SIZE=0x1bfd0
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x40020000
-CONFIG_SPL_BSS_MAX_SIZE=0x4000
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_I2C=y
diff --git a/configs/deneb_defconfig b/configs/deneb_defconfig
index c27f061..4b9b073 100644
--- a/configs/deneb_defconfig
+++ b/configs/deneb_defconfig
@@ -19,6 +19,9 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x13e000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x128000
+CONFIG_SPL_BSS_MAX_SIZE=0x1000
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x2000
CONFIG_IDENT_STRING=" ##v01.06"
@@ -41,9 +44,6 @@
CONFIG_LOG=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_MAX_SIZE=0x1f000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x128000
-CONFIG_SPL_BSS_MAX_SIZE=0x1000
CONFIG_SPL_BOARD_INIT=y
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
# CONFIG_SPL_LEGACY_IMAGE_FORMAT is not set
diff --git a/configs/devkit8000_defconfig b/configs/devkit8000_defconfig
index db357e1..7653fbb 100644
--- a/configs/devkit8000_defconfig
+++ b/configs/devkit8000_defconfig
@@ -11,13 +11,13 @@
CONFIG_TARGET_DEVKIT8000=y
CONFIG_SYS_MONITOR_LEN=262144
CONFIG_SPL_SYS_MALLOC_F_LEN=0x400
+CONFIG_SPL_BSS_START_ADDR=0x80000500
CONFIG_SPL=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTCOMMAND="run autoboot"
CONFIG_USE_PREBOOT=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_SPL_MAX_SIZE=0xec00
-CONFIG_SPL_BSS_START_ADDR=0x80000500
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
diff --git a/configs/dns325_defconfig b/configs/dns325_defconfig
index edfe92c..b85f7ca 100644
--- a/configs/dns325_defconfig
+++ b/configs/dns325_defconfig
@@ -10,7 +10,7 @@
CONFIG_TARGET_DNS325=y
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0xE0000
-CONFIG_DEFAULT_DEVICE_TREE="kirkwood-dns325"
+CONFIG_DEFAULT_DEVICE_TREE="marvell/kirkwood-dns325"
CONFIG_IDENT_STRING="\nD-Link DNS-325"
CONFIG_SYS_LOAD_ADDR=0x800000
# CONFIG_SYS_MALLOC_F is not set
diff --git a/configs/dockstar_defconfig b/configs/dockstar_defconfig
index 719fa39..7b5f194 100644
--- a/configs/dockstar_defconfig
+++ b/configs/dockstar_defconfig
@@ -13,7 +13,7 @@
CONFIG_TARGET_DOCKSTAR=y
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0x80000
-CONFIG_DEFAULT_DEVICE_TREE="kirkwood-dockstar"
+CONFIG_DEFAULT_DEVICE_TREE="marvell/kirkwood-dockstar"
CONFIG_IDENT_STRING="\nSeagate FreeAgent DockStar"
CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_BOOTDELAY=3
diff --git a/configs/draco-etamin_defconfig b/configs/draco-etamin_defconfig
index 7424e2b..ba3f381 100644
--- a/configs/draco-etamin_defconfig
+++ b/configs/draco-etamin_defconfig
@@ -16,6 +16,7 @@
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_BOOTCOUNT_BOOTLIMIT=3
+CONFIG_SPL_BSS_START_ADDR=0x80000000
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0xB80000
CONFIG_SPL_FS_FAT=y
@@ -33,7 +34,6 @@
CONFIG_SYS_PBSIZE=1049
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
-CONFIG_SPL_BSS_START_ADDR=0x80000000
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x80208000
diff --git a/configs/draco-rastaban_defconfig b/configs/draco-rastaban_defconfig
index 6fdf12a..43d29f5 100644
--- a/configs/draco-rastaban_defconfig
+++ b/configs/draco-rastaban_defconfig
@@ -14,6 +14,7 @@
CONFIG_TARGET_RASTABAN=y
CONFIG_SPL_SERIAL=y
CONFIG_BOOTCOUNT_BOOTLIMIT=3
+CONFIG_SPL_BSS_START_ADDR=0x80000000
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x2E0000
CONFIG_SPL_FS_FAT=y
@@ -31,7 +32,6 @@
CONFIG_SYS_PBSIZE=1049
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
-CONFIG_SPL_BSS_START_ADDR=0x80000000
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x80208000
diff --git a/configs/draco-thuban_defconfig b/configs/draco-thuban_defconfig
index e22d03a..b457b22 100644
--- a/configs/draco-thuban_defconfig
+++ b/configs/draco-thuban_defconfig
@@ -14,6 +14,7 @@
CONFIG_TARGET_THUBAN=y
CONFIG_SPL_SERIAL=y
CONFIG_BOOTCOUNT_BOOTLIMIT=3
+CONFIG_SPL_BSS_START_ADDR=0x80000000
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x2E0000
CONFIG_SPL_FS_FAT=y
@@ -31,7 +32,6 @@
CONFIG_SYS_PBSIZE=1049
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_BOARDINFO is not set
-CONFIG_SPL_BSS_START_ADDR=0x80000000
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x80208000
diff --git a/configs/dragonboard410c_defconfig b/configs/dragonboard410c_defconfig
index 260a834..9ef04fd 100644
--- a/configs/dragonboard410c_defconfig
+++ b/configs/dragonboard410c_defconfig
@@ -9,7 +9,7 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x8007fff0
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x0
-CONFIG_DEFAULT_DEVICE_TREE="apq8016-sbc"
+CONFIG_DEFAULT_DEVICE_TREE="qcom/apq8016-sbc"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_IDENT_STRING="\nQualcomm-DragonBoard 410C"
CONFIG_SYS_LOAD_ADDR=0x80080000
diff --git a/configs/dragonboard820c_defconfig b/configs/dragonboard820c_defconfig
index ebc80eb..f6b2cb0 100644
--- a/configs/dragonboard820c_defconfig
+++ b/configs/dragonboard820c_defconfig
@@ -7,7 +7,7 @@
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x8007fff0
CONFIG_ENV_SIZE=0x4000
-CONFIG_DEFAULT_DEVICE_TREE="apq8096-db820c"
+CONFIG_DEFAULT_DEVICE_TREE="qcom/apq8096-db820c"
CONFIG_IDENT_STRING="\nQualcomm-DragonBoard 820C"
CONFIG_SYS_LOAD_ADDR=0x80080000
CONFIG_DISTRO_DEFAULTS=y
diff --git a/configs/dreamplug_defconfig b/configs/dreamplug_defconfig
index 02a2635..8518eab 100644
--- a/configs/dreamplug_defconfig
+++ b/configs/dreamplug_defconfig
@@ -13,7 +13,7 @@
CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_OFFSET=0x100000
CONFIG_ENV_SECT_SIZE=0x10000
-CONFIG_DEFAULT_DEVICE_TREE="kirkwood-dreamplug"
+CONFIG_DEFAULT_DEVICE_TREE="marvell/kirkwood-dreamplug"
CONFIG_IDENT_STRING="\nMarvell-DreamPlug"
CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_ENV_ADDR=0x100000
diff --git a/configs/ds109_defconfig b/configs/ds109_defconfig
index 304c098..ef805ec 100644
--- a/configs/ds109_defconfig
+++ b/configs/ds109_defconfig
@@ -14,7 +14,7 @@
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0x3D0000
CONFIG_ENV_SECT_SIZE=0x10000
-CONFIG_DEFAULT_DEVICE_TREE="kirkwood-ds109"
+CONFIG_DEFAULT_DEVICE_TREE="marvell/kirkwood-ds109"
CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_ENV_ADDR=0x3D0000
# CONFIG_SYS_MALLOC_F is not set
diff --git a/configs/ds116_defconfig b/configs/ds116_defconfig
index df641c9..1fc7380 100644
--- a/configs/ds116_defconfig
+++ b/configs/ds116_defconfig
@@ -20,6 +20,9 @@
CONFIG_SPL_TEXT_BASE=0x40000030
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0x4002c000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x40023000
+CONFIG_SPL_BSS_MAX_SIZE=0x4000
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0xf1012000
CONFIG_DEBUG_UART_CLOCK=250000000
@@ -35,9 +38,6 @@
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SPL_MAX_SIZE=0x22fd0
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x40023000
-CONFIG_SPL_BSS_MAX_SIZE=0x4000
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_I2C=y
diff --git a/configs/ds414_defconfig b/configs/ds414_defconfig
index 7b367e1..ecf9501 100644
--- a/configs/ds414_defconfig
+++ b/configs/ds414_defconfig
@@ -19,6 +19,9 @@
CONFIG_SPL_TEXT_BASE=0x40004030
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0x4002c000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x40020000
+CONFIG_SPL_BSS_MAX_SIZE=0x4000
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0xf1012000
CONFIG_DEBUG_UART_CLOCK=250000000
@@ -34,9 +37,6 @@
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_MISC_INIT_R=y
CONFIG_SPL_MAX_SIZE=0x1bfd0
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x40020000
-CONFIG_SPL_BSS_MAX_SIZE=0x4000
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_I2C=y
diff --git a/configs/elgin-rv1108_defconfig b/configs/elgin-rv1108_defconfig
index 446c9c9b..59b88a8 100644
--- a/configs/elgin-rv1108_defconfig
+++ b/configs/elgin-rv1108_defconfig
@@ -56,7 +56,6 @@
CONFIG_USB_OHCI_GENERIC=y
CONFIG_USB_DWC2=y
CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_PRODUCT_NUM=0x110a
CONFIG_USB_GADGET_DWC2_OTG=y
CONFIG_RANDOM_UUID=y
CONFIG_ERRNO_STR=y
diff --git a/configs/endeavoru_defconfig b/configs/endeavoru_defconfig
index 2662250..3230d36 100644
--- a/configs/endeavoru_defconfig
+++ b/configs/endeavoru_defconfig
@@ -1,5 +1,4 @@
CONFIG_ARM=y
-CONFIG_SYS_L2CACHE_OFF=y
CONFIG_ARCH_TEGRA=y
CONFIG_SUPPORT_PASSING_ATAGS=y
CONFIG_CMDLINE_TAG=y
@@ -15,12 +14,13 @@
CONFIG_TARGET_ENDEAVORU=y
CONFIG_CMD_EBTUPDATE=y
CONFIG_SYS_LOAD_ADDR=0x82000000
+CONFIG_BUTTON_CMD=y
CONFIG_BOOTDELAY=0
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_KEYED_CTRLC=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_SYSTEM_SETUP=y
-CONFIG_BOOTCOMMAND="if run check_button; then bootmenu; fi; run bootcmd_mmc0; poweroff;"
+CONFIG_BOOTCOMMAND="bootflow scan; poweroff"
CONFIG_SYS_PBSIZE=2084
CONFIG_SPL_FOOTPRINT_LIMIT=y
CONFIG_SPL_MAX_FOOTPRINT=0x8000
diff --git a/configs/evb-ast2600_defconfig b/configs/evb-ast2600_defconfig
index 314d5d3..e6a4e4d 100644
--- a/configs/evb-ast2600_defconfig
+++ b/configs/evb-ast2600_defconfig
@@ -20,6 +20,11 @@
CONFIG_DM_RESET=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK_R_ADDR=0x83000000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x83000000
+CONFIG_SPL_BSS_MAX_SIZE=0x1000000
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000000
CONFIG_SPL_SIZE_LIMIT=0x10000
CONFIG_SPL=y
# CONFIG_ARMV7_NONSEC is not set
@@ -40,12 +45,7 @@
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y
CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x83000000
-CONFIG_SPL_BSS_MAX_SIZE=0x1000000
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
-CONFIG_SPL_STACK_R=y
-CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000000
CONFIG_SPL_SEPARATE_BSS=y
CONFIG_SPL_FIT_IMAGE_TINY=y
CONFIG_SPL_DM_RESET=y
diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index d75329d..07c56a4 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -16,9 +16,13 @@
CONFIG_TARGET_EVB_PX30=y
CONFIG_TPL_LIBGENERIC_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC=y
+CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
CONFIG_SPL_STACK_R_ADDR=0x600000
CONFIG_SPL_STACK=0x400000
-CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x4000000
+CONFIG_SPL_BSS_MAX_SIZE=0x4000
+CONFIG_SPL_STACK_R=y
CONFIG_DEBUG_UART_BASE=0xFF160000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x800800
@@ -34,13 +38,9 @@
CONFIG_MISC_INIT_R=y
CONFIG_SPL_MAX_SIZE=0x20000
CONFIG_SPL_PAD_TO=0x7f8000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x4000000
-CONFIG_SPL_BSS_MAX_SIZE=0x4000
CONFIG_SPL_BOOTROM_SUPPORT=y
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
-CONFIG_SPL_STACK_R=y
CONFIG_SPL_ATF=y
# CONFIG_TPL_FRAMEWORK is not set
# CONFIG_TPL_BANNER_PRINT is not set
diff --git a/configs/evb-px5_defconfig b/configs/evb-px5_defconfig
index 5f32c92..ccd3883 100644
--- a/configs/evb-px5_defconfig
+++ b/configs/evb-px5_defconfig
@@ -17,6 +17,10 @@
CONFIG_TARGET_EVB_PX5=y
CONFIG_SPL_STACK_R_ADDR=0x600000
CONFIG_SPL_STACK=0x188000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x400000
+CONFIG_SPL_BSS_MAX_SIZE=0x20000
+CONFIG_SPL_STACK_R=y
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0xFF1c0000
CONFIG_DEBUG_UART_CLOCK=24000000
@@ -37,13 +41,9 @@
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SPL_MAX_SIZE=0x40000
CONFIG_SPL_PAD_TO=0x7f8000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x400000
-CONFIG_SPL_BSS_MAX_SIZE=0x20000
CONFIG_SPL_BOOTROM_SUPPORT=y
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
-CONFIG_SPL_STACK_R=y
CONFIG_SPL_ATF=y
CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
CONFIG_TPL=y
diff --git a/configs/evb-rk3036_defconfig b/configs/evb-rk3036_defconfig
index e21bea9..94ee21e 100644
--- a/configs/evb-rk3036_defconfig
+++ b/configs/evb-rk3036_defconfig
@@ -16,6 +16,7 @@
CONFIG_ROCKCHIP_RK3036=y
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_SPL_STACK=0x10081fff
+CONFIG_SPL_STACK_R=y
CONFIG_DEBUG_UART_BASE=0x20068000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x60800800
@@ -28,7 +29,6 @@
# CONFIG_SPL_FRAMEWORK is not set
CONFIG_SPL_PAD_TO=0x7f8000
CONFIG_SPL_NO_BSS_LIMIT=y
-CONFIG_SPL_STACK_R=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig
index d632fd7..69dd880 100644
--- a/configs/evb-rk3229_defconfig
+++ b/configs/evb-rk3229_defconfig
@@ -14,6 +14,7 @@
CONFIG_ROCKCHIP_RK322X=y
CONFIG_TARGET_EVB_RK3229=y
CONFIG_SPL_STACK_R_ADDR=0x60600000
+CONFIG_SPL_STACK_R=y
CONFIG_DEBUG_UART_BASE=0x11030000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x61800800
@@ -30,7 +31,6 @@
CONFIG_SPL_PAD_TO=0x7f8000
CONFIG_SPL_NO_BSS_LIMIT=y
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
-CONFIG_SPL_STACK_R=y
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB_MASS_STORAGE=y
diff --git a/configs/evb-rk3288_defconfig b/configs/evb-rk3288_defconfig
index 31dad12..6407f22 100644
--- a/configs/evb-rk3288_defconfig
+++ b/configs/evb-rk3288_defconfig
@@ -16,6 +16,8 @@
CONFIG_TARGET_EVB_RK3288=y
CONFIG_SPL_STACK_R_ADDR=0x04000000
CONFIG_SPL_STACK=0xff718000
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
CONFIG_SPL_SIZE_LIMIT=0x4b000
CONFIG_DEBUG_UART_BASE=0xff690000
CONFIG_DEBUG_UART_CLOCK=24000000
@@ -34,8 +36,6 @@
CONFIG_SPL_NO_BSS_LIMIT=y
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
-CONFIG_SPL_STACK_R=y
-CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
CONFIG_SPL_OPTEE_IMAGE=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
diff --git a/configs/evb-rk3308_defconfig b/configs/evb-rk3308_defconfig
index d57b2f6..04a94e1 100644
--- a/configs/evb-rk3308_defconfig
+++ b/configs/evb-rk3308_defconfig
@@ -3,43 +3,35 @@
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
CONFIG_DEFAULT_DEVICE_TREE="rk3308-evb"
+CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_ROCKCHIP_RK3308=y
-CONFIG_SPL_DRIVERS_MISC=y
CONFIG_TARGET_EVB_RK3308=y
-CONFIG_DEBUG_UART_BASE=0xFF0C0000
+CONFIG_DEBUG_UART_BASE=0xFF0E0000
CONFIG_DEBUG_UART_CLOCK=24000000
+# CONFIG_DEBUG_UART_BOARD_INIT is not set
CONFIG_SYS_LOAD_ADDR=0xc00800
CONFIG_DEBUG_UART=y
CONFIG_ANDROID_BOOT_IMAGE=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
-CONFIG_BOOTDELAY=0
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3308-evb.dtb"
-CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_CPUINFO is not set
-CONFIG_SPL_MAX_SIZE=0x20000
+CONFIG_SPL_MAX_SIZE=0x40000
CONFIG_SPL_PAD_TO=0x7f8000
-# CONFIG_CMD_BDI is not set
-# CONFIG_CMD_CONSOLE is not set
-# CONFIG_CMD_ELF is not set
-# CONFIG_CMD_IMI is not set
-# CONFIG_CMD_XIMG is not set
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
-# CONFIG_CMD_LOADB is not set
-# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
+CONFIG_CMD_ROCKUSB=y
CONFIG_CMD_USB_MASS_STORAGE=y
-# CONFIG_CMD_ITEST is not set
-# CONFIG_CMD_SETEXPR is not set
-# CONFIG_CMD_SLEEP is not set
-# CONFIG_SPL_DOS_PARTITION is not set
-# CONFIG_ISO_PARTITION is not set
-CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
+CONFIG_CMD_RNG=y
+CONFIG_CMD_KASLRSEED=y
+CONFIG_CMD_REGULATOR=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_LIVE=y
-CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
@@ -50,9 +42,11 @@
CONFIG_SUPPORT_EMMC_RPMB=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_PHY_REALTEK=y
+CONFIG_DM_ETH_PHY=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_GMAC_ROCKCHIP=y
-CONFIG_PHY=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
CONFIG_PINCTRL=y
CONFIG_REGULATOR_PWM=y
CONFIG_DM_REGULATOR_FIXED=y
@@ -61,15 +55,15 @@
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550_MEM32=y
+CONFIG_SYSINFO=y
CONFIG_SYSRESET=y
CONFIG_USB=y
+CONFIG_DM_USB_GADGET=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
-CONFIG_USB_DWC2=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_DWC2_OTG=y
CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_SPL_TINY_MEMSET=y
+CONFIG_USB_FUNCTION_ROCKUSB=y
CONFIG_LZO=y
CONFIG_ERRNO_STR=y
-# CONFIG_EFI_LOADER is not set
diff --git a/configs/evb-rk3328_defconfig b/configs/evb-rk3328_defconfig
index 75a0e0f..53ad677 100644
--- a/configs/evb-rk3328_defconfig
+++ b/configs/evb-rk3328_defconfig
@@ -57,6 +57,7 @@
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
+# CONFIG_ROCKCHIP_IODOMAIN is not set
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_PHY_MOTORCOMM=y
diff --git a/configs/evb-rk3568_defconfig b/configs/evb-rk3568_defconfig
index 6e8061f..e71d670 100644
--- a/configs/evb-rk3568_defconfig
+++ b/configs/evb-rk3568_defconfig
@@ -2,7 +2,6 @@
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_NR_DRAM_BANKS=2
CONFIG_DEFAULT_DEVICE_TREE="rk3568-evb"
CONFIG_ROCKCHIP_RK3568=y
CONFIG_SPL_SERIAL=y
@@ -32,7 +31,7 @@
# CONFIG_SPL_DOS_PARTITION is not set
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_LIVE=y
-CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SPL_REGMAP=y
CONFIG_SPL_SYSCON=y
@@ -49,6 +48,7 @@
CONFIG_PHY_REALTEK=y
CONFIG_DWC_ETH_QOS=y
CONFIG_DWC_ETH_QOS_ROCKCHIP=y
+CONFIG_SPL_PINCTRL=y
CONFIG_DM_PMIC=y
CONFIG_PMIC_RK8XX=y
CONFIG_REGULATOR_RK8XX=y
diff --git a/configs/evb-rk3588_defconfig b/configs/evb-rk3588_defconfig
index c8db04c..a8c32c4 100644
--- a/configs/evb-rk3588_defconfig
+++ b/configs/evb-rk3588_defconfig
@@ -2,7 +2,6 @@
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_NR_DRAM_BANKS=2
CONFIG_DEFAULT_DEVICE_TREE="rk3588-evb1-v10"
CONFIG_ROCKCHIP_RK3588=y
CONFIG_SPL_SERIAL=y
@@ -16,7 +15,6 @@
CONFIG_SPL_FIT_SIGNATURE=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_LEGACY_IMAGE_FORMAT=y
-CONFIG_OF_BOARD_SETUP=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-evb1-v10.dtb"
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
@@ -33,7 +31,8 @@
# CONFIG_SPL_DOS_PARTITION is not set
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_LIVE=y
-CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SPL_REGMAP=y
CONFIG_SPL_SYSCON=y
CONFIG_SPL_CLK=y
@@ -52,7 +51,7 @@
CONFIG_PHY_ROCKCHIP_INNO_USB2=y
CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
CONFIG_PHY_ROCKCHIP_USBDP=y
-CONFIG_REGULATOR_PWM=y
+CONFIG_SPL_PINCTRL=y
CONFIG_PWM_ROCKCHIP=y
CONFIG_SPL_RAM=y
CONFIG_BAUDRATE=1500000
diff --git a/configs/evb-rv1108_defconfig b/configs/evb-rv1108_defconfig
index 1c62149..25453fb 100644
--- a/configs/evb-rv1108_defconfig
+++ b/configs/evb-rv1108_defconfig
@@ -49,7 +49,6 @@
CONFIG_USB_OHCI_GENERIC=y
CONFIG_USB_DWC2=y
CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_PRODUCT_NUM=0x110a
CONFIG_USB_GADGET_DWC2_OTG=y
CONFIG_RANDOM_UUID=y
CONFIG_ERRNO_STR=y
diff --git a/configs/ficus-rk3399_defconfig b/configs/ficus-rk3399_defconfig
index 4859042..618f6ba 100644
--- a/configs/ficus-rk3399_defconfig
+++ b/configs/ficus-rk3399_defconfig
@@ -13,6 +13,11 @@
CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000
CONFIG_TARGET_ROCK960_RK3399=y
CONFIG_SPL_STACK=0xff8effff
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0xff8e0000
+CONFIG_SPL_BSS_MAX_SIZE=0x10000
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
CONFIG_DEBUG_UART_BASE=0xFF1A0000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x800800
@@ -20,13 +25,8 @@
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SPL_MAX_SIZE=0x2e000
CONFIG_SPL_PAD_TO=0x7f8000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0xff8e0000
-CONFIG_SPL_BSS_MAX_SIZE=0x10000
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
-CONFIG_SPL_STACK_R=y
-CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GPT=y
diff --git a/configs/firefly-px30_defconfig b/configs/firefly-px30_defconfig
index 11a3baa..e5377dc 100644
--- a/configs/firefly-px30_defconfig
+++ b/configs/firefly-px30_defconfig
@@ -17,9 +17,13 @@
CONFIG_DEBUG_UART_CHANNEL=1
CONFIG_TPL_LIBGENERIC_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC=y
+CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
CONFIG_SPL_STACK_R_ADDR=0x600000
CONFIG_SPL_STACK=0x400000
-CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x4000000
+CONFIG_SPL_BSS_MAX_SIZE=0x4000
+CONFIG_SPL_STACK_R=y
CONFIG_DEBUG_UART_BASE=0xFF160000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x800800
@@ -35,13 +39,9 @@
CONFIG_MISC_INIT_R=y
CONFIG_SPL_MAX_SIZE=0x20000
CONFIG_SPL_PAD_TO=0x7f8000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x4000000
-CONFIG_SPL_BSS_MAX_SIZE=0x4000
CONFIG_SPL_BOOTROM_SUPPORT=y
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
-CONFIG_SPL_STACK_R=y
CONFIG_SPL_ATF=y
# CONFIG_TPL_FRAMEWORK is not set
# CONFIG_TPL_BANNER_PRINT is not set
diff --git a/configs/firefly-rk3288_defconfig b/configs/firefly-rk3288_defconfig
index 4860298..03ee04e 100644
--- a/configs/firefly-rk3288_defconfig
+++ b/configs/firefly-rk3288_defconfig
@@ -16,6 +16,8 @@
CONFIG_TARGET_FIREFLY_RK3288=y
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_SPL_STACK=0xff718000
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
CONFIG_SPL_SIZE_LIMIT=0x40000
CONFIG_DEBUG_UART_BASE=0xff690000
CONFIG_DEBUG_UART_CLOCK=24000000
@@ -30,8 +32,6 @@
CONFIG_SPL_PAD_TO=0x7f8000
CONFIG_SPL_NO_BSS_LIMIT=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
-CONFIG_SPL_STACK_R=y
-CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
diff --git a/configs/gardena-smart-gateway-at91sam_defconfig b/configs/gardena-smart-gateway-at91sam_defconfig
index ceb48df..3b9466c 100644
--- a/configs/gardena-smart-gateway-at91sam_defconfig
+++ b/configs/gardena-smart-gateway-at91sam_defconfig
@@ -20,6 +20,9 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0x308000
CONFIG_SPL_SYS_MALLOC_F_LEN=0x1000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x20000000
+CONFIG_SPL_BSS_MAX_SIZE=0x80000
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0xfffff200
CONFIG_DEBUG_UART_CLOCK=132000000
@@ -39,9 +42,6 @@
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_SPL_MAX_SIZE=0x7000
CONFIG_SPL_PAD_TO=0x40000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x20000000
-CONFIG_SPL_BSS_MAX_SIZE=0x80000
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_SYS_MALLOC=y
diff --git a/configs/gardena-smart-gateway-mt7688_defconfig b/configs/gardena-smart-gateway-mt7688_defconfig
index d72e826..f4642e3 100644
--- a/configs/gardena-smart-gateway-mt7688_defconfig
+++ b/configs/gardena-smart-gateway-mt7688_defconfig
@@ -11,6 +11,8 @@
CONFIG_SPL_SERIAL=y
CONFIG_SYS_BOOTCOUNT_ADDR=0xb000006c
CONFIG_SPL_SYS_MALLOC_F_LEN=0x80000
+CONFIG_SPL_BSS_START_ADDR=0x80010000
+CONFIG_SPL_BSS_MAX_SIZE=0x10000
CONFIG_SPL=y
CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y
CONFIG_ENV_OFFSET_REDUND=0xB0000
@@ -41,8 +43,6 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SYS_MALLOC_BOOTPARAMS=y
CONFIG_SPL_MAX_SIZE=0x10000
-CONFIG_SPL_BSS_START_ADDR=0x80010000
-CONFIG_SPL_BSS_MAX_SIZE=0x10000
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_NOR_SUPPORT=y
CONFIG_HUSH_PARSER=y
diff --git a/configs/generic-rk3568_defconfig b/configs/generic-rk3568_defconfig
index e7d5e55..033702f 100644
--- a/configs/generic-rk3568_defconfig
+++ b/configs/generic-rk3568_defconfig
@@ -2,18 +2,22 @@
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_NR_DRAM_BANKS=2
+CONFIG_SF_DEFAULT_SPEED=24000000
CONFIG_DEFAULT_DEVICE_TREE="rk3568-generic"
CONFIG_ROCKCHIP_RK3568=y
+CONFIG_ROCKCHIP_SPI_IMAGE=y
CONFIG_SPL_SERIAL=y
CONFIG_DEBUG_UART_BASE=0xFE660000
CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI=y
CONFIG_SYS_LOAD_ADDR=0xc00800
CONFIG_DEBUG_UART=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_SPL_FIT_SIGNATURE=y
CONFIG_SPL_LOAD_FIT=y
+# CONFIG_BOOTMETH_VBE is not set
CONFIG_LEGACY_IMAGE_FORMAT=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-generic.dtb"
# CONFIG_DISPLAY_CPUINFO is not set
@@ -21,19 +25,27 @@
CONFIG_SPL_MAX_SIZE=0x40000
CONFIG_SPL_PAD_TO=0x7f8000
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x60000
CONFIG_SPL_ATF=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_ROCKUSB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_SPL_DOS_PARTITION is not set
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_LIVE=y
CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+# CONFIG_NET is not set
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SPL_REGMAP=y
CONFIG_SPL_SYSCON=y
+# CONFIG_ADC is not set
CONFIG_SPL_CLK=y
+# CONFIG_USB_FUNCTION_FASTBOOT is not set
CONFIG_ROCKCHIP_GPIO=y
CONFIG_MISC=y
# CONFIG_ROCKCHIP_IODOMAIN is not set
@@ -43,10 +55,27 @@
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_SF_DEFAULT_BUS=4
+CONFIG_SPI_FLASH_SFDP_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SILICONKAISER=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_SPI_FLASH_XMC=y
+CONFIG_SPI_FLASH_XTX=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
CONFIG_SPL_PINCTRL=y
CONFIG_SPL_RAM=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550_MEM32=y
+CONFIG_ROCKCHIP_SFC=y
CONFIG_SYSRESET=y
+CONFIG_SYSRESET_PSCI=y
+CONFIG_USB=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_USB_FUNCTION_ROCKUSB=y
CONFIG_ERRNO_STR=y
diff --git a/configs/generic-rk3588_defconfig b/configs/generic-rk3588_defconfig
index b50f4f8..87a1717 100644
--- a/configs/generic-rk3588_defconfig
+++ b/configs/generic-rk3588_defconfig
@@ -2,7 +2,6 @@
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_NR_DRAM_BANKS=2
CONFIG_DEFAULT_DEVICE_TREE="rk3588-generic"
CONFIG_ROCKCHIP_RK3588=y
CONFIG_SPL_SERIAL=y
@@ -15,8 +14,8 @@
CONFIG_FIT_VERBOSE=y
CONFIG_SPL_FIT_SIGNATURE=y
CONFIG_SPL_LOAD_FIT=y
+# CONFIG_BOOTMETH_VBE is not set
CONFIG_LEGACY_IMAGE_FORMAT=y
-CONFIG_OF_BOARD_SETUP=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-generic.dtb"
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
@@ -27,15 +26,21 @@
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_ROCKUSB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_SPL_DOS_PARTITION is not set
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_LIVE=y
CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+# CONFIG_NET is not set
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SPL_REGMAP=y
CONFIG_SPL_SYSCON=y
+# CONFIG_ADC is not set
CONFIG_SPL_CLK=y
+# CONFIG_USB_FUNCTION_FASTBOOT is not set
CONFIG_ROCKCHIP_GPIO=y
CONFIG_MISC=y
CONFIG_SUPPORT_EMMC_RPMB=y
@@ -44,10 +49,19 @@
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PHY_ROCKCHIP_USBDP=y
CONFIG_SPL_PINCTRL=y
CONFIG_SPL_RAM=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSRESET=y
+CONFIG_SYSRESET_PSCI=y
+CONFIG_USB=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_USB_FUNCTION_ROCKUSB=y
CONFIG_ERRNO_STR=y
diff --git a/configs/giedi_defconfig b/configs/giedi_defconfig
index 1c20af5..c7390d1 100644
--- a/configs/giedi_defconfig
+++ b/configs/giedi_defconfig
@@ -19,6 +19,9 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x13e000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x128000
+CONFIG_SPL_BSS_MAX_SIZE=0x1000
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x2000
CONFIG_IDENT_STRING=" ##v01.07"
@@ -41,9 +44,6 @@
CONFIG_LOG=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_MAX_SIZE=0x1f000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x128000
-CONFIG_SPL_BSS_MAX_SIZE=0x1000
CONFIG_SPL_BOARD_INIT=y
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
# CONFIG_SPL_LEGACY_IMAGE_FORMAT is not set
diff --git a/configs/goflexhome_defconfig b/configs/goflexhome_defconfig
index d577d58..53b2ce9 100644
--- a/configs/goflexhome_defconfig
+++ b/configs/goflexhome_defconfig
@@ -13,7 +13,7 @@
CONFIG_TARGET_GOFLEXHOME=y
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0xC0000
-CONFIG_DEFAULT_DEVICE_TREE="kirkwood-goflexnet"
+CONFIG_DEFAULT_DEVICE_TREE="marvell/kirkwood-goflexnet"
CONFIG_IDENT_STRING="\nSeagate GoFlex Home"
CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_BOOTDELAY=3
diff --git a/configs/gose_defconfig b/configs/gose_defconfig
index 1eadf7c..0f76ae1 100644
--- a/configs/gose_defconfig
+++ b/configs/gose_defconfig
@@ -16,7 +16,7 @@
CONFIG_ENV_OFFSET=0xC0000
CONFIG_ENV_SECT_SIZE=0x40000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="r8a7793-gose-u-boot"
+CONFIG_DEFAULT_DEVICE_TREE="renesas/r8a7793-gose"
CONFIG_SPL_TEXT_BASE=0xe6300000
CONFIG_ARCH_RENESAS_BOARD_STRING="Gose"
CONFIG_R8A7793=y
diff --git a/configs/grouper_common_defconfig b/configs/grouper_common_defconfig
index 2346cd6..001f5b8 100644
--- a/configs/grouper_common_defconfig
+++ b/configs/grouper_common_defconfig
@@ -1,5 +1,4 @@
CONFIG_ARM=y
-CONFIG_SYS_L2CACHE_OFF=y
CONFIG_ARCH_TEGRA=y
CONFIG_SUPPORT_PASSING_ATAGS=y
CONFIG_CMDLINE_TAG=y
@@ -15,12 +14,13 @@
CONFIG_TARGET_GROUPER=y
CONFIG_CMD_EBTUPDATE=y
CONFIG_SYS_LOAD_ADDR=0x82000000
+CONFIG_BUTTON_CMD=y
CONFIG_BOOTDELAY=0
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_KEYED_CTRLC=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_SYSTEM_SETUP=y
-CONFIG_BOOTCOMMAND="if run check_button; then bootmenu; fi; run bootcmd_mmc0; poweroff;"
+CONFIG_BOOTCOMMAND="bootflow scan; poweroff"
CONFIG_SYS_PBSIZE=2084
CONFIG_SPL_FOOTPRINT_LIMIT=y
CONFIG_SPL_MAX_FOOTPRINT=0x8000
diff --git a/configs/grpeach_defconfig b/configs/grpeach_defconfig
index eef3bad..70a8008 100644
--- a/configs/grpeach_defconfig
+++ b/configs/grpeach_defconfig
@@ -11,7 +11,7 @@
CONFIG_ENV_OFFSET=0x80000
CONFIG_ENV_SECT_SIZE=0x10000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="r7s72100-gr-peach-u-boot"
+CONFIG_DEFAULT_DEVICE_TREE="renesas/r7s72100-gr-peach"
CONFIG_RZA1=y
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_SYS_MONITOR_LEN=524288
diff --git a/configs/guruplug_defconfig b/configs/guruplug_defconfig
index 7cb649e..5371ee4 100644
--- a/configs/guruplug_defconfig
+++ b/configs/guruplug_defconfig
@@ -10,7 +10,7 @@
CONFIG_TARGET_GURUPLUG=y
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0xE0000
-CONFIG_DEFAULT_DEVICE_TREE="kirkwood-guruplug-server-plus"
+CONFIG_DEFAULT_DEVICE_TREE="marvell/kirkwood-guruplug-server-plus"
CONFIG_IDENT_STRING="\nMarvell-GuruPlug"
CONFIG_SYS_LOAD_ADDR=0x800000
# CONFIG_SYS_MALLOC_F is not set
diff --git a/configs/gwventana_emmc_defconfig b/configs/gwventana_emmc_defconfig
index f6db7de..ad99474 100644
--- a/configs/gwventana_emmc_defconfig
+++ b/configs/gwventana_emmc_defconfig
@@ -21,6 +21,7 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x18000000
+CONFIG_SPL_STACK_R=y
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0xD1400
CONFIG_CMD_HDMIDETECT=y
@@ -45,7 +46,6 @@
CONFIG_MISC_INIT_R=y
CONFIG_PCI_INIT_R=y
CONFIG_SPL_BOARD_INIT=y
-CONFIG_SPL_STACK_R=y
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_FIT_IMAGE_TINY=y
CONFIG_SPL_DMA=y
diff --git a/configs/gwventana_nand_defconfig b/configs/gwventana_nand_defconfig
index 0c86cfd..96c64c8 100644
--- a/configs/gwventana_nand_defconfig
+++ b/configs/gwventana_nand_defconfig
@@ -21,6 +21,7 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x18000000
+CONFIG_SPL_STACK_R=y
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x1080000
CONFIG_CMD_HDMIDETECT=y
@@ -45,7 +46,6 @@
CONFIG_MISC_INIT_R=y
CONFIG_PCI_INIT_R=y
CONFIG_SPL_BOARD_INIT=y
-CONFIG_SPL_STACK_R=y
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_FIT_IMAGE_TINY=y
CONFIG_SPL_DMA=y
diff --git a/configs/helios4_defconfig b/configs/helios4_defconfig
index 72d1d77..c4c5d48 100644
--- a/configs/helios4_defconfig
+++ b/configs/helios4_defconfig
@@ -14,6 +14,9 @@
CONFIG_SPL_TEXT_BASE=0x40000030
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0x4002c000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x40023000
+CONFIG_SPL_BSS_MAX_SIZE=0x4000
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0xf1012000
CONFIG_DEBUG_UART_CLOCK=250000000
@@ -28,9 +31,6 @@
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SPL_MAX_SIZE=0x22fd0
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x40023000
-CONFIG_SPL_BSS_MAX_SIZE=0x4000
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_I2C=y
diff --git a/configs/hihope_rzg2_defconfig b/configs/hihope_rzg2_defconfig
index a2c7e78..149ce0b 100644
--- a/configs/hihope_rzg2_defconfig
+++ b/configs/hihope_rzg2_defconfig
@@ -7,7 +7,7 @@
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0xFFFE0000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="r8a774a1-hihope-rzg2m-u-boot"
+CONFIG_DEFAULT_DEVICE_TREE="renesas/r8a774a1-hihope-rzg2m"
CONFIG_RCAR_GEN3=y
CONFIG_TARGET_HIHOPE_RZG2=y
CONFIG_SYS_MONITOR_LEN=1048576
@@ -40,7 +40,7 @@
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_OF_CONTROL=y
-CONFIG_OF_LIST="r8a774a1-hihope-rzg2m-u-boot r8a774b1-hihope-rzg2n-u-boot r8a774e1-hihope-rzg2h-u-boot"
+CONFIG_OF_LIST="renesas/r8a774a1-hihope-rzg2m renesas/r8a774b1-hihope-rzg2n renesas/r8a774e1-hihope-rzg2h"
CONFIG_MULTI_DTB_FIT_LZO=y
CONFIG_MULTI_DTB_FIT_USER_DEFINED_AREA=y
CONFIG_ENV_OVERWRITE=y
diff --git a/configs/hmibsc_defconfig b/configs/hmibsc_defconfig
new file mode 100644
index 0000000..a076898
--- /dev/null
+++ b/configs/hmibsc_defconfig
@@ -0,0 +1,87 @@
+CONFIG_ARM=y
+CONFIG_SYS_VENDOR="schneider"
+CONFIG_SYS_BOARD="hmibsc"
+CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK=y
+CONFIG_ARCH_SNAPDRAGON=y
+CONFIG_TEXT_BASE=0x8f600000
+CONFIG_SYS_MALLOC_LEN=0x802000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x8007fff0
+CONFIG_ENV_SIZE=0x2000
+CONFIG_ENV_OFFSET=0x0
+CONFIG_DEFAULT_DEVICE_TREE="apq8016-schneider-hmibsc"
+# CONFIG_OF_UPSTREAM is not set
+CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_IDENT_STRING="\nSchneider Electric-HMIBSC"
+CONFIG_SYS_LOAD_ADDR=0x80080000
+CONFIG_REMAKE_ELF=y
+# CONFIG_ANDROID_BOOT_IMAGE is not set
+CONFIG_FIT=y
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_CBSIZE=2048
+# CONFIG_DISPLAY_CPUINFO is not set
+# CONFIG_DISPLAY_BOARDINFO is not set
+CONFIG_SYS_PROMPT="hmibsc => "
+CONFIG_SYS_MAXARGS=64
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_FS_GENERIC=y
+# CONFIG_CMD_IMI is not set
+CONFIG_CMD_MD5SUM=y
+CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PART=y
+CONFIG_CMD_USB=y
+CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_TIMER=y
+CONFIG_CMD_ENV_FLAGS=y
+CONFIG_CMD_ENV_EXISTS=y
+CONFIG_CMD_NVEDIT_INFO=y
+CONFIG_ENV_WRITEABLE_LIST=y
+CONFIG_ENV_ACCESS_IGNORE_FORCE=y
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_SYS_MMC_ENV_PART=2
+CONFIG_BUTTON_QCOM_PMIC=y
+CONFIG_CLK=y
+CONFIG_CLK_QCOM_APQ8016=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_FASTBOOT_BUF_ADDR=0x91000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+CONFIG_MSM_GPIO=y
+CONFIG_QCOM_PMIC_GPIO=y
+CONFIG_LED=y
+CONFIG_LED_GPIO=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_MSM=y
+CONFIG_PHY=y
+CONFIG_PINCTRL=y
+CONFIG_PINCONF=y
+CONFIG_PINCTRL_QCOM_APQ8016=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_QCOM=y
+CONFIG_MSM_SERIAL=y
+CONFIG_SPMI_MSM=y
+CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_MSM=y
+CONFIG_USB_ULPI_VIEWPORT=y
+CONFIG_USB_ULPI=y
+CONFIG_USB_HOST_ETHER=y
+CONFIG_USB_ETHER_ASIX=y
+CONFIG_USB_ETHER_ASIX88179=y
+CONFIG_USB_ETHER_MCS7830=y
+CONFIG_USB_ETHER_SMSC95XX=y
+CONFIG_PHYLIB=y
+CONFIG_USB_ETHER_LAN75XX=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_VENDOR_NUM=0x18d1
+CONFIG_USB_GADGET_PRODUCT_NUM=0xd00d
+CONFIG_CI_UDC=y
diff --git a/configs/ib62x0_defconfig b/configs/ib62x0_defconfig
index 074384e..32b0e1c 100644
--- a/configs/ib62x0_defconfig
+++ b/configs/ib62x0_defconfig
@@ -10,7 +10,7 @@
CONFIG_TARGET_IB62X0=y
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0xE0000
-CONFIG_DEFAULT_DEVICE_TREE="kirkwood-ib62x0"
+CONFIG_DEFAULT_DEVICE_TREE="marvell/kirkwood-ib62x0"
CONFIG_IDENT_STRING=" RaidSonic ICY BOX IB-NAS62x0"
CONFIG_SYS_LOAD_ADDR=0x800000
# CONFIG_SYS_MALLOC_F is not set
diff --git a/configs/iconnect_defconfig b/configs/iconnect_defconfig
index f7b74c4..45ffbd9 100644
--- a/configs/iconnect_defconfig
+++ b/configs/iconnect_defconfig
@@ -13,7 +13,7 @@
CONFIG_TARGET_ICONNECT=y
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0x80000
-CONFIG_DEFAULT_DEVICE_TREE="kirkwood-iconnect"
+CONFIG_DEFAULT_DEVICE_TREE="marvell/kirkwood-iconnect"
CONFIG_IDENT_STRING=" Iomega iConnect"
CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_PCI=y
diff --git a/configs/imx6ulz_smm_m2_defconfig b/configs/imx6ulz_smm_m2_defconfig
index ce957d9..064758c 100644
--- a/configs/imx6ulz_smm_m2_defconfig
+++ b/configs/imx6ulz_smm_m2_defconfig
@@ -14,6 +14,7 @@
CONFIG_DEFAULT_DEVICE_TREE="imx6ulz-bsh-smm-m2"
CONFIG_SPL_TEXT_BASE=0x00908000
CONFIG_SPL_SERIAL=y
+CONFIG_SPL_BSS_START_ADDR=0x84100000
CONFIG_SPL=y
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
@@ -22,7 +23,6 @@
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=3
CONFIG_BOARD_LATE_INIT=y
-CONFIG_SPL_BSS_START_ADDR=0x84100000
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_DMA=y
CONFIG_SPL_MTD=y
diff --git a/configs/imx7_cm_defconfig b/configs/imx7_cm_defconfig
index 62dda1a..a04008c 100644
--- a/configs/imx7_cm_defconfig
+++ b/configs/imx7_cm_defconfig
@@ -17,6 +17,8 @@
CONFIG_SYS_MONITOR_LEN=409600
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_MAX_SIZE=0x100000
CONFIG_SPL=y
CONFIG_ARMV7_BOOT_SEC_DEFAULT=y
CONFIG_IMX_RDC=y
@@ -27,8 +29,6 @@
CONFIG_SYS_PBSIZE=532
# CONFIG_BOARD_EARLY_INIT_F is not set
CONFIG_SPL_MAX_SIZE=0xe000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_MAX_SIZE=0x100000
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_I2C=y
CONFIG_SYS_MAXARGS=32
diff --git a/configs/imx8mm-cl-iot-gate-optee_defconfig b/configs/imx8mm-cl-iot-gate-optee_defconfig
index c011f4f..f5bb50c 100644
--- a/configs/imx8mm-cl-iot-gate-optee_defconfig
+++ b/configs/imx8mm-cl-iot-gate-optee_defconfig
@@ -16,6 +16,9 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x920000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x910000
+CONFIG_SPL_BSS_MAX_SIZE=0x2000
CONFIG_SPL=y
CONFIG_SYS_LOAD_ADDR=0x40480000
CONFIG_FIT=y
@@ -28,9 +31,6 @@
CONFIG_SYS_CBSIZE=2048
CONFIG_SYS_PBSIZE=2074
CONFIG_BOARD_LATE_INIT=y
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x910000
-CONFIG_SPL_BSS_MAX_SIZE=0x2000
CONFIG_SPL_BOARD_INIT=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_SYS_MALLOC=y
diff --git a/configs/imx8mm-cl-iot-gate_defconfig b/configs/imx8mm-cl-iot-gate_defconfig
index 6afdb39..b36ad7c 100644
--- a/configs/imx8mm-cl-iot-gate_defconfig
+++ b/configs/imx8mm-cl-iot-gate_defconfig
@@ -17,6 +17,9 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x920000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x910000
+CONFIG_SPL_BSS_MAX_SIZE=0x2000
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x204000
CONFIG_SYS_LOAD_ADDR=0x40480000
@@ -30,9 +33,6 @@
CONFIG_SYS_CBSIZE=2048
CONFIG_SYS_PBSIZE=2074
CONFIG_BOARD_LATE_INIT=y
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x910000
-CONFIG_SPL_BSS_MAX_SIZE=0x2000
CONFIG_SPL_BOARD_INIT=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_SYS_MALLOC=y
diff --git a/configs/imx8mm-icore-mx8mm-ctouch2_defconfig b/configs/imx8mm-icore-mx8mm-ctouch2_defconfig
index 0f81a69..d4e9d9f 100644
--- a/configs/imx8mm-icore-mx8mm-ctouch2_defconfig
+++ b/configs/imx8mm-icore-mx8mm-ctouch2_defconfig
@@ -16,6 +16,9 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x920000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x910000
+CONFIG_SPL_BSS_MAX_SIZE=0x2000
CONFIG_SPL=y
CONFIG_SYS_LOAD_ADDR=0x40480000
CONFIG_FIT=y
@@ -27,9 +30,6 @@
CONFIG_DEFAULT_FDT_FILE="imx8mm-icore-mx8mm-ctouch2.dtb"
CONFIG_SYS_CBSIZE=2048
CONFIG_SYS_PBSIZE=2074
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x910000
-CONFIG_SPL_BSS_MAX_SIZE=0x2000
CONFIG_SPL_BOARD_INIT=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_SYS_MALLOC=y
diff --git a/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig b/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig
index c2321e1..c85a141 100644
--- a/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig
+++ b/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig
@@ -16,6 +16,9 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x920000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x910000
+CONFIG_SPL_BSS_MAX_SIZE=0x2000
CONFIG_SPL=y
CONFIG_SYS_LOAD_ADDR=0x40480000
CONFIG_FIT=y
@@ -27,9 +30,6 @@
CONFIG_DEFAULT_FDT_FILE="imx8mm-icore-mx8mm-edimm2.2.dtb"
CONFIG_SYS_CBSIZE=2048
CONFIG_SYS_PBSIZE=2074
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x910000
-CONFIG_SPL_BSS_MAX_SIZE=0x2000
CONFIG_SPL_BOARD_INIT=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_SYS_MALLOC=y
diff --git a/configs/imx8mm-mx8menlo_defconfig b/configs/imx8mm-mx8menlo_defconfig
index 1ed7f0a..e9b18ac 100644
--- a/configs/imx8mm-mx8menlo_defconfig
+++ b/configs/imx8mm-mx8menlo_defconfig
@@ -19,6 +19,9 @@
CONFIG_BOOTCOUNT_BOOTLIMIT=3
CONFIG_SYS_BOOTCOUNT_ADDR=0x30370090
CONFIG_SPL_STACK=0x920000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x910000
+CONFIG_SPL_BSS_MAX_SIZE=0x2000
CONFIG_SPL=y
CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y
CONFIG_ENV_OFFSET_REDUND=0xFFFFDE00
@@ -39,9 +42,6 @@
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_BOARD_LATE_INIT=y
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x910000
-CONFIG_SPL_BSS_MAX_SIZE=0x2000
CONFIG_SPL_BOARD_INIT=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_SYS_MALLOC=y
diff --git a/configs/imx8mm-phygate-tauri-l_defconfig b/configs/imx8mm-phygate-tauri-l_defconfig
index 252eeb9..cb292dd 100644
--- a/configs/imx8mm-phygate-tauri-l_defconfig
+++ b/configs/imx8mm-phygate-tauri-l_defconfig
@@ -16,6 +16,9 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x920000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x910000
+CONFIG_SPL_BSS_MAX_SIZE=0x2000
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x3E0000
CONFIG_SYS_LOAD_ADDR=0x40480000
@@ -29,9 +32,6 @@
CONFIG_SYS_CBSIZE=2048
CONFIG_SYS_PBSIZE=2074
CONFIG_BOARD_LATE_INIT=y
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x910000
-CONFIG_SPL_BSS_MAX_SIZE=0x2000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
diff --git a/configs/imx8mm_beacon_defconfig b/configs/imx8mm_beacon_defconfig
index b926798..e3dcbfe 100644
--- a/configs/imx8mm_beacon_defconfig
+++ b/configs/imx8mm_beacon_defconfig
@@ -10,7 +10,7 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xFFFFDE00
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="imx8mm-beacon-kit"
+CONFIG_DEFAULT_DEVICE_TREE="freescale/imx8mm-beacon-kit"
CONFIG_SPL_TEXT_BASE=0x7E1000
CONFIG_TARGET_IMX8MM_BEACON=y
CONFIG_SYS_MONITOR_LEN=524288
@@ -18,6 +18,9 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x920000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x910000
+CONFIG_SPL_BSS_MAX_SIZE=0x2000
CONFIG_SPL=y
CONFIG_SYS_LOAD_ADDR=0x40480000
CONFIG_FIT=y
@@ -30,9 +33,6 @@
CONFIG_DEFAULT_FDT_FILE="imx8mm-beacon-kit.dtb"
CONFIG_SYS_CBSIZE=2048
CONFIG_SYS_PBSIZE=2074
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x910000
-CONFIG_SPL_BSS_MAX_SIZE=0x2000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
diff --git a/configs/imx8mm_beacon_fspi_defconfig b/configs/imx8mm_beacon_fspi_defconfig
index 341ea47..0aca853 100644
--- a/configs/imx8mm_beacon_fspi_defconfig
+++ b/configs/imx8mm_beacon_fspi_defconfig
@@ -11,13 +11,16 @@
CONFIG_ENV_OFFSET=0xFFFFDE00
CONFIG_IMX_CONFIG="board/freescale/imx8mm_evk/imximage-8mm-lpddr4-fspi.cfg"
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="imx8mm-beacon-kit"
+CONFIG_DEFAULT_DEVICE_TREE="freescale/imx8mm-beacon-kit"
CONFIG_SPL_TEXT_BASE=0x7E2000
CONFIG_TARGET_IMX8MM_BEACON=y
CONFIG_SYS_MONITOR_LEN=524288
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x920000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x910000
+CONFIG_SPL_BSS_MAX_SIZE=0x2000
CONFIG_SPL=y
CONFIG_SYS_LOAD_ADDR=0x40480000
CONFIG_FIT=y
@@ -32,9 +35,6 @@
CONFIG_SYS_PBSIZE=2074
CONFIG_SPL_MAX_SIZE=0x25000
CONFIG_SPL_PAD_TO=0x0
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x910000
-CONFIG_SPL_BSS_MAX_SIZE=0x2000
CONFIG_SPL_BOARD_INIT=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_SYS_MALLOC=y
diff --git a/configs/imx8mm_data_modul_edm_sbc_defconfig b/configs/imx8mm_data_modul_edm_sbc_defconfig
index bb18338..53249f4 100644
--- a/configs/imx8mm_data_modul_edm_sbc_defconfig
+++ b/configs/imx8mm_data_modul_edm_sbc_defconfig
@@ -23,6 +23,9 @@
CONFIG_BOOTCOUNT_BOOTLIMIT=3
CONFIG_SYS_BOOTCOUNT_ADDR=0x30370090
CONFIG_SPL_STACK=0x920000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x910000
+CONFIG_SPL_BSS_MAX_SIZE=0x2000
CONFIG_SPL=y
CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y
CONFIG_ENV_OFFSET_REDUND=0xFFFC0000
@@ -48,9 +51,6 @@
CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_BOARD_LATE_INIT=y
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x910000
-CONFIG_SPL_BSS_MAX_SIZE=0x2000
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
CONFIG_SPL_LEGACY_IMAGE_FORMAT=y
CONFIG_SPL_LEGACY_IMAGE_CRC_CHECK=y
diff --git a/configs/imx8mm_evk_defconfig b/configs/imx8mm_evk_defconfig
index e41facd..ff33d15 100644
--- a/configs/imx8mm_evk_defconfig
+++ b/configs/imx8mm_evk_defconfig
@@ -16,6 +16,9 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x920000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x910000
+CONFIG_SPL_BSS_MAX_SIZE=0x2000
CONFIG_SPL=y
CONFIG_SYS_LOAD_ADDR=0x40480000
CONFIG_FIT=y
@@ -26,9 +29,6 @@
CONFIG_SYS_CBSIZE=2048
CONFIG_SYS_PBSIZE=2074
CONFIG_BOARD_LATE_INIT=y
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x910000
-CONFIG_SPL_BSS_MAX_SIZE=0x2000
CONFIG_SPL_BOARD_INIT=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_SYS_MALLOC=y
diff --git a/configs/imx8mm_evk_fspi_defconfig b/configs/imx8mm_evk_fspi_defconfig
index 3aaf7a4..a57dc47 100644
--- a/configs/imx8mm_evk_fspi_defconfig
+++ b/configs/imx8mm_evk_fspi_defconfig
@@ -19,6 +19,9 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x920000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x910000
+CONFIG_SPL_BSS_MAX_SIZE=0x2000
CONFIG_SPL=y
CONFIG_SYS_LOAD_ADDR=0x40480000
CONFIG_FIT=y
@@ -30,9 +33,6 @@
CONFIG_SYS_PBSIZE=2074
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_MAX_SIZE=0x25000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x910000
-CONFIG_SPL_BSS_MAX_SIZE=0x2000
CONFIG_SPL_BOARD_INIT=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_SYS_MALLOC=y
diff --git a/configs/imx8mm_phg_defconfig b/configs/imx8mm_phg_defconfig
index fb7cc33..e14dcdf 100644
--- a/configs/imx8mm_phg_defconfig
+++ b/configs/imx8mm_phg_defconfig
@@ -16,6 +16,9 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x920000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x910000
+CONFIG_SPL_BSS_MAX_SIZE=0x2000
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x204000
CONFIG_SYS_LOAD_ADDR=0x40480000
@@ -27,9 +30,6 @@
CONFIG_SYS_CBSIZE=2048
CONFIG_SYS_PBSIZE=2074
CONFIG_BOARD_LATE_INIT=y
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x910000
-CONFIG_SPL_BSS_MAX_SIZE=0x2000
CONFIG_SPL_BOARD_INIT=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_SYS_MALLOC=y
diff --git a/configs/imx8mm_venice_defconfig b/configs/imx8mm_venice_defconfig
index cb6b97d..f4d999b 100644
--- a/configs/imx8mm_venice_defconfig
+++ b/configs/imx8mm_venice_defconfig
@@ -12,14 +12,19 @@
CONFIG_SPL_TEXT_BASE=0x7E1000
CONFIG_TARGET_IMX8MM_VENICE=y
CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_DM_RESET=y
CONFIG_SYS_MONITOR_LEN=524288
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x920000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x910000
+CONFIG_SPL_BSS_MAX_SIZE=0x2000
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x3f8000
CONFIG_SYS_LOAD_ADDR=0x48200000
+CONFIG_PCI=y
CONFIG_SYS_MEMTEST_START=0x40000000
CONFIG_SYS_MEMTEST_END=0x80000000
CONFIG_FIT=y
@@ -34,9 +39,6 @@
CONFIG_SYS_CBSIZE=2048
CONFIG_SYS_PBSIZE=2074
CONFIG_BOARD_LATE_INIT=y
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x910000
-CONFIG_SPL_BSS_MAX_SIZE=0x2000
CONFIG_SPL_BOARD_INIT=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_SYS_MALLOC=y
@@ -60,14 +62,19 @@
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
+CONFIG_CMD_DHCP6=y
+CONFIG_CMD_TFTPPUT=y
CONFIG_SYS_DISABLE_AUTOLOAD=y
+CONFIG_CMD_WGET=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
CONFIG_CMD_UUID=y
CONFIG_CMD_PMIC=y
CONFIG_CMD_REGULATOR=y
+CONFIG_CMD_TPM=y
CONFIG_CMD_EXT4_WRITE=y
# CONFIG_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
@@ -83,6 +90,8 @@
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_IP_DEFRAG=y
CONFIG_TFTP_BLOCKSIZE=4096
+CONFIG_PROT_TCP_SACK=y
+CONFIG_IPV6=y
CONFIG_SPL_DM=y
CONFIG_SPL_CLK_COMPOSITE_CCF=y
CONFIG_CLK_COMPOSITE_CCF=y
@@ -114,6 +123,9 @@
CONFIG_FEC_MXC=y
CONFIG_KSZ9477=y
CONFIG_MII=y
+CONFIG_NVME_PCI=y
+CONFIG_PCIE_DW_IMX=y
+CONFIG_PHY_IMX8M_PCIE=y
CONFIG_PINCTRL=y
CONFIG_SPL_PINCTRL=y
CONFIG_PINCTRL_IMX8M=y
@@ -124,17 +136,22 @@
CONFIG_SPL_DM_PMIC_BD71837=y
CONFIG_DM_PMIC_MP5416=y
CONFIG_SPL_DM_PMIC_MP5416=y
-CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
+# CONFIG_DM_RNG is not set
CONFIG_DM_SERIAL=y
CONFIG_MXC_UART=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_MXC_SPI=y
CONFIG_SYSRESET=y
CONFIG_SPL_SYSRESET=y
CONFIG_SYSRESET_PSCI=y
CONFIG_SYSRESET_WATCHDOG=y
CONFIG_DM_THERMAL=y
CONFIG_IMX_TMU=y
+# CONFIG_TPM_V1 is not set
+CONFIG_TPM2_TIS_SPI=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_HOST_ETHER=y
@@ -152,4 +169,7 @@
CONFIG_CI_UDC=y
CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_IMX_WATCHDOG=y
+CONFIG_TPM=y
+# CONFIG_SPL_SHA512 is not set
+# CONFIG_SPL_SHA384 is not set
CONFIG_HEXDUMP=y
diff --git a/configs/imx8mn_beacon_2g_defconfig b/configs/imx8mn_beacon_2g_defconfig
index 2d4cd1f..1129d80 100644
--- a/configs/imx8mn_beacon_2g_defconfig
+++ b/configs/imx8mn_beacon_2g_defconfig
@@ -11,7 +11,7 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xFFFFDE00
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="imx8mn-beacon-kit"
+CONFIG_DEFAULT_DEVICE_TREE="freescale/imx8mn-beacon-kit"
CONFIG_SPL_TEXT_BASE=0x912000
CONFIG_TARGET_IMX8MN_BEACON=y
CONFIG_IMX8MN_BEACON_2GB_LPDDR=y
@@ -21,6 +21,9 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x980000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x950000
+CONFIG_SPL_BSS_MAX_SIZE=0x2000
CONFIG_SPL=y
CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000
CONFIG_SYS_LOAD_ADDR=0x42000000
@@ -38,9 +41,6 @@
CONFIG_SYS_CBSIZE=2048
CONFIG_SYS_PBSIZE=2074
CONFIG_SPL_MAX_SIZE=0x25000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x950000
-CONFIG_SPL_BSS_MAX_SIZE=0x2000
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_BOOTROM_SUPPORT=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
diff --git a/configs/imx8mn_beacon_defconfig b/configs/imx8mn_beacon_defconfig
index ec93301..f4af998 100644
--- a/configs/imx8mn_beacon_defconfig
+++ b/configs/imx8mn_beacon_defconfig
@@ -11,7 +11,7 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xFFFFDE00
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="imx8mn-beacon-kit"
+CONFIG_DEFAULT_DEVICE_TREE="freescale/imx8mn-beacon-kit"
CONFIG_SPL_TEXT_BASE=0x912000
CONFIG_TARGET_IMX8MN_BEACON=y
CONFIG_OF_LIBFDT_OVERLAY=y
@@ -20,6 +20,9 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x980000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x950000
+CONFIG_SPL_BSS_MAX_SIZE=0x2000
CONFIG_SPL=y
CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000
CONFIG_SYS_LOAD_ADDR=0x42000000
@@ -37,9 +40,6 @@
CONFIG_SYS_CBSIZE=2048
CONFIG_SYS_PBSIZE=2074
CONFIG_SPL_MAX_SIZE=0x25000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x950000
-CONFIG_SPL_BSS_MAX_SIZE=0x2000
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_BOOTROM_SUPPORT=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
diff --git a/configs/imx8mn_beacon_fspi_defconfig b/configs/imx8mn_beacon_fspi_defconfig
index 458afba..cecde44 100644
--- a/configs/imx8mn_beacon_fspi_defconfig
+++ b/configs/imx8mn_beacon_fspi_defconfig
@@ -11,7 +11,7 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xFFFFDE00
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="imx8mn-beacon-kit"
+CONFIG_DEFAULT_DEVICE_TREE="freescale/imx8mn-beacon-kit"
CONFIG_SPL_TEXT_BASE=0x912000
CONFIG_TARGET_IMX8MN_BEACON=y
CONFIG_OF_LIBFDT_OVERLAY=y
@@ -20,6 +20,9 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x980000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x950000
+CONFIG_SPL_BSS_MAX_SIZE=0x2000
CONFIG_SPL=y
CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000
CONFIG_SYS_LOAD_ADDR=0x42000000
@@ -37,9 +40,6 @@
CONFIG_SYS_CBSIZE=2048
CONFIG_SYS_PBSIZE=2074
CONFIG_SPL_MAX_SIZE=0x25000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x950000
-CONFIG_SPL_BSS_MAX_SIZE=0x2000
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_BOOTROM_SUPPORT=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
diff --git a/configs/imx8mn_bsh_smm_s2_defconfig b/configs/imx8mn_bsh_smm_s2_defconfig
index 8c28b92..0e0a548 100644
--- a/configs/imx8mn_bsh_smm_s2_defconfig
+++ b/configs/imx8mn_bsh_smm_s2_defconfig
@@ -17,6 +17,9 @@
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x980000
CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x950000
+CONFIG_SPL_BSS_MAX_SIZE=0x2000
CONFIG_SPL=y
CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000
CONFIG_SYS_LOAD_ADDR=0x40480000
@@ -32,9 +35,6 @@
CONFIG_ARCH_MISC_INIT=y
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_MAX_SIZE=0x25000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x950000
-CONFIG_SPL_BSS_MAX_SIZE=0x2000
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_BOOTROM_SUPPORT=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
diff --git a/configs/imx8mn_bsh_smm_s2pro_defconfig b/configs/imx8mn_bsh_smm_s2pro_defconfig
index 3b55f6f..f739569 100644
--- a/configs/imx8mn_bsh_smm_s2pro_defconfig
+++ b/configs/imx8mn_bsh_smm_s2pro_defconfig
@@ -18,6 +18,9 @@
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x980000
CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x950000
+CONFIG_SPL_BSS_MAX_SIZE=0x2000
CONFIG_SPL=y
CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000
CONFIG_SYS_LOAD_ADDR=0x40480000
@@ -33,9 +36,6 @@
CONFIG_ARCH_MISC_INIT=y
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_MAX_SIZE=0x25000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x950000
-CONFIG_SPL_BSS_MAX_SIZE=0x2000
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_BOOTROM_SUPPORT=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
diff --git a/configs/imx8mn_ddr4_evk_defconfig b/configs/imx8mn_ddr4_evk_defconfig
index 56b8880..82e3ce1 100644
--- a/configs/imx8mn_ddr4_evk_defconfig
+++ b/configs/imx8mn_ddr4_evk_defconfig
@@ -16,6 +16,9 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x980000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x950000
+CONFIG_SPL_BSS_MAX_SIZE=0x2000
CONFIG_SPL=y
CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000
CONFIG_SYS_LOAD_ADDR=0x42000000
@@ -31,9 +34,6 @@
CONFIG_ARCH_MISC_INIT=y
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_MAX_SIZE=0x25000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x950000
-CONFIG_SPL_BSS_MAX_SIZE=0x2000
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_BOOTROM_SUPPORT=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
diff --git a/configs/imx8mn_evk_defconfig b/configs/imx8mn_evk_defconfig
index 91b7586..2402e9e 100644
--- a/configs/imx8mn_evk_defconfig
+++ b/configs/imx8mn_evk_defconfig
@@ -16,6 +16,9 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x980000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x950000
+CONFIG_SPL_BSS_MAX_SIZE=0x2000
CONFIG_SPL=y
CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000
CONFIG_SYS_LOAD_ADDR=0x42000000
@@ -31,9 +34,6 @@
CONFIG_ARCH_MISC_INIT=y
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_MAX_SIZE=0x25000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x950000
-CONFIG_SPL_BSS_MAX_SIZE=0x2000
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_BOOTROM_SUPPORT=y
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
diff --git a/configs/imx8mn_var_som_defconfig b/configs/imx8mn_var_som_defconfig
index 6057d13..218415f 100644
--- a/configs/imx8mn_var_som_defconfig
+++ b/configs/imx8mn_var_som_defconfig
@@ -19,6 +19,9 @@
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x980000
CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x950000
+CONFIG_SPL_BSS_MAX_SIZE=0x2000
CONFIG_SPL=y
CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000
CONFIG_SYS_LOAD_ADDR=0x40480000
@@ -36,9 +39,6 @@
CONFIG_BOARD_TYPES=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_SPL_MAX_SIZE=0x25000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x950000
-CONFIG_SPL_BSS_MAX_SIZE=0x2000
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_BOOTROM_SUPPORT=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
diff --git a/configs/imx8mn_venice_defconfig b/configs/imx8mn_venice_defconfig
index 0a4fba5..b65fef0 100644
--- a/configs/imx8mn_venice_defconfig
+++ b/configs/imx8mn_venice_defconfig
@@ -17,6 +17,9 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x980000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x950000
+CONFIG_SPL_BSS_MAX_SIZE=0x2000
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x3f8000
CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000
@@ -36,9 +39,6 @@
CONFIG_SYS_PBSIZE=2074
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_MAX_SIZE=0x25000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x950000
-CONFIG_SPL_BSS_MAX_SIZE=0x2000
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_BOOTROM_SUPPORT=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
@@ -65,18 +65,21 @@
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
+CONFIG_CMD_DHCP6=y
+CONFIG_CMD_TFTPPUT=y
CONFIG_SYS_DISABLE_AUTOLOAD=y
+CONFIG_CMD_WGET=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
CONFIG_CMD_UUID=y
CONFIG_CMD_PMIC=y
CONFIG_CMD_REGULATOR=y
+CONFIG_CMD_TPM=y
CONFIG_CMD_EXT4_WRITE=y
# CONFIG_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_OF_CONTROL=y
CONFIG_SPL_OF_CONTROL=y
-CONFIG_OF_LIST="freescale/imx8mn-venice-gw7902"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
CONFIG_SYS_MMC_ENV_DEV=2
@@ -86,6 +89,8 @@
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_IP_DEFRAG=y
CONFIG_TFTP_BLOCKSIZE=4096
+CONFIG_PROT_TCP_SACK=y
+CONFIG_IPV6=y
CONFIG_SPL_DM=y
CONFIG_SPL_CLK_IMX8MN=y
CONFIG_CLK_IMX8MN=y
@@ -128,14 +133,20 @@
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
+# CONFIG_DM_RNG is not set
CONFIG_DM_SERIAL=y
CONFIG_MXC_UART=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_MXC_SPI=y
CONFIG_SYSRESET=y
CONFIG_SPL_SYSRESET=y
CONFIG_SYSRESET_PSCI=y
CONFIG_SYSRESET_WATCHDOG=y
CONFIG_DM_THERMAL=y
CONFIG_IMX_TMU=y
+# CONFIG_TPM_V1 is not set
+CONFIG_TPM2_TIS_SPI=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_HOST_ETHER=y
@@ -153,4 +164,7 @@
CONFIG_CI_UDC=y
CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_IMX_WATCHDOG=y
+CONFIG_TPM=y
+# CONFIG_SPL_SHA512 is not set
+# CONFIG_SPL_SHA384 is not set
CONFIG_HEXDUMP=y
diff --git a/configs/imx8mp-icore-mx8mp-edimm2.2_defconfig b/configs/imx8mp-icore-mx8mp-edimm2.2_defconfig
index 83d7d18..3a62272 100644
--- a/configs/imx8mp-icore-mx8mp-edimm2.2_defconfig
+++ b/configs/imx8mp-icore-mx8mp-edimm2.2_defconfig
@@ -19,6 +19,9 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x960000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x98fc00
+CONFIG_SPL_BSS_MAX_SIZE=0x400
CONFIG_SPL=y
CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000
CONFIG_SYS_LOAD_ADDR=0x40480000
@@ -33,9 +36,6 @@
CONFIG_SYS_PBSIZE=2074
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_MAX_SIZE=0x26000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x98fc00
-CONFIG_SPL_BSS_MAX_SIZE=0x400
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_BOOTROM_SUPPORT=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
diff --git a/configs/imx8mp_beacon_defconfig b/configs/imx8mp_beacon_defconfig
index 9d09dd4..b0dcbc7 100644
--- a/configs/imx8mp_beacon_defconfig
+++ b/configs/imx8mp_beacon_defconfig
@@ -12,14 +12,18 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xFFFFDE00
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="imx8mp-beacon-kit"
+CONFIG_DEFAULT_DEVICE_TREE="freescale/imx8mp-beacon-kit"
CONFIG_SPL_TEXT_BASE=0x920000
CONFIG_TARGET_IMX8MP_BEACON=y
+CONFIG_DM_RESET=y
CONFIG_SYS_MONITOR_LEN=524288
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x960000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x98fc00
+CONFIG_SPL_BSS_MAX_SIZE=0x400
CONFIG_SPL=y
CONFIG_ARMV8_SPL_EXCEPTION_VECTORS=y
CONFIG_ARMV8_SET_SMPEN=y
@@ -27,6 +31,7 @@
CONFIG_ARMV8_EA_EL3_FIRST=y
CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000
CONFIG_SYS_LOAD_ADDR=0x40480000
+CONFIG_PCI=y
# CONFIG_ANDROID_BOOT_IMAGE is not set
CONFIG_FIT=y
CONFIG_FIT_EXTERNAL_OFFSET=0x3000
@@ -40,9 +45,6 @@
CONFIG_SYS_PBSIZE=2074
# CONFIG_SYS_DEVICE_NULLDEV is not set
CONFIG_SPL_MAX_SIZE=0x26000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x98fc00
-CONFIG_SPL_BSS_MAX_SIZE=0x400
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_BOOTROM_SUPPORT=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
@@ -65,6 +67,7 @@
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_SDP=y
CONFIG_CMD_USB_MASS_STORAGE=y
@@ -118,8 +121,11 @@
CONFIG_FEC_MXC=y
CONFIG_RGMII=y
CONFIG_MII=y
+CONFIG_NVME_PCI=y
+CONFIG_PCIE_DW_IMX=y
CONFIG_PHY=y
CONFIG_PHY_IMX8MQ_USB=y
+CONFIG_PHY_IMX8M_PCIE=y
CONFIG_PINCTRL=y
CONFIG_SPL_PINCTRL=y
CONFIG_PINCTRL_IMX8M=y
@@ -129,7 +135,6 @@
CONFIG_DM_PMIC=y
CONFIG_DM_PMIC_PCA9450=y
CONFIG_SPL_DM_PMIC_PCA9450=y
-CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_PCA9450=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
diff --git a/configs/imx8mp_data_modul_edm_sbc_defconfig b/configs/imx8mp_data_modul_edm_sbc_defconfig
index 51cfca0..209d896 100644
--- a/configs/imx8mp_data_modul_edm_sbc_defconfig
+++ b/configs/imx8mp_data_modul_edm_sbc_defconfig
@@ -24,6 +24,9 @@
CONFIG_BOOTCOUNT_BOOTLIMIT=3
CONFIG_SYS_BOOTCOUNT_ADDR=0x30370090
CONFIG_SPL_STACK=0x96fc00
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x96fc00
+CONFIG_SPL_BSS_MAX_SIZE=0x400
CONFIG_SPL=y
CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y
CONFIG_DEBUG_UART_BASE=0x30880000
@@ -55,9 +58,6 @@
CONFIG_ARCH_MISC_INIT=y
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_MAX_SIZE=0x25000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x96fc00
-CONFIG_SPL_BSS_MAX_SIZE=0x400
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_BOOTROM_SUPPORT=y
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
diff --git a/configs/imx8mp_debix_model_a_defconfig b/configs/imx8mp_debix_model_a_defconfig
index 5092ac2..70126c9 100644
--- a/configs/imx8mp_debix_model_a_defconfig
+++ b/configs/imx8mp_debix_model_a_defconfig
@@ -16,6 +16,9 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x960000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x98fc00
+CONFIG_SPL_BSS_MAX_SIZE=0x400
CONFIG_SPL=y
CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000
CONFIG_SYS_LOAD_ADDR=0x40480000
@@ -30,9 +33,6 @@
CONFIG_SYS_PBSIZE=2074
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_MAX_SIZE=0x26000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x98fc00
-CONFIG_SPL_BSS_MAX_SIZE=0x400
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_BOOTROM_SUPPORT=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
diff --git a/configs/imx8mp_dhcom_pdk2_defconfig b/configs/imx8mp_dhcom_pdk2_defconfig
index 50a7d19..76f2fe8 100644
--- a/configs/imx8mp_dhcom_pdk2_defconfig
+++ b/configs/imx8mp_dhcom_pdk2_defconfig
@@ -24,6 +24,9 @@
CONFIG_BOOTCOUNT_BOOTLIMIT=3
CONFIG_SYS_BOOTCOUNT_ADDR=0x30370090
CONFIG_SPL_STACK=0x96fc00
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x96fc00
+CONFIG_SPL_BSS_MAX_SIZE=0x400
CONFIG_SPL=y
CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y
CONFIG_DEBUG_UART_BASE=0x30860000
@@ -53,9 +56,6 @@
CONFIG_ARCH_MISC_INIT=y
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_MAX_SIZE=0x26000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x96fc00
-CONFIG_SPL_BSS_MAX_SIZE=0x400
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_BOOTROM_SUPPORT=y
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
diff --git a/configs/imx8mp_dhcom_pdk3_defconfig b/configs/imx8mp_dhcom_pdk3_defconfig
index f9444ec..5b338f2 100644
--- a/configs/imx8mp_dhcom_pdk3_defconfig
+++ b/configs/imx8mp_dhcom_pdk3_defconfig
@@ -23,6 +23,9 @@
CONFIG_BOOTCOUNT_BOOTLIMIT=3
CONFIG_SYS_BOOTCOUNT_ADDR=0x30370090
CONFIG_SPL_STACK=0x96fc00
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x96fc00
+CONFIG_SPL_BSS_MAX_SIZE=0x400
CONFIG_SPL=y
CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y
CONFIG_DEBUG_UART_BASE=0x30860000
@@ -31,6 +34,7 @@
CONFIG_IMX_BOOTAUX=y
CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000
CONFIG_SYS_LOAD_ADDR=0x50000000
+CONFIG_PCI=y
CONFIG_DEBUG_UART=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
CONFIG_FIT=y
@@ -54,9 +58,6 @@
CONFIG_ARCH_MISC_INIT=y
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_MAX_SIZE=0x26000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x96fc00
-CONFIG_SPL_BSS_MAX_SIZE=0x400
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_BOOTROM_SUPPORT=y
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
@@ -104,6 +105,7 @@
CONFIG_CMD_BKOPS_ENABLE=y
CONFIG_CMD_MTD=y
CONFIG_CMD_PART=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_READ=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
@@ -216,7 +218,10 @@
CONFIG_FEC_MXC=y
CONFIG_RGMII=y
CONFIG_MII=y
+CONFIG_NVME_PCI=y
+CONFIG_PCIE_DW_IMX=y
CONFIG_PHY_IMX8MQ_USB=y
+CONFIG_PHY_IMX8M_PCIE=y
CONFIG_PINCTRL=y
CONFIG_SPL_PINCTRL=y
CONFIG_PINCTRL_IMX8M=y
diff --git a/configs/imx8mp_evk_defconfig b/configs/imx8mp_evk_defconfig
index 7e5dfce..d907aed 100644
--- a/configs/imx8mp_evk_defconfig
+++ b/configs/imx8mp_evk_defconfig
@@ -16,6 +16,9 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x960000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x98fc00
+CONFIG_SPL_BSS_MAX_SIZE=0x400
CONFIG_SPL=y
CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000
CONFIG_SYS_LOAD_ADDR=0x40480000
@@ -30,9 +33,6 @@
CONFIG_SYS_PBSIZE=2074
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_MAX_SIZE=0x26000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x98fc00
-CONFIG_SPL_BSS_MAX_SIZE=0x400
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_BOOTROM_SUPPORT=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
diff --git a/configs/imx8mp_rsb3720a1_4G_defconfig b/configs/imx8mp_rsb3720a1_4G_defconfig
index 14e6a3f..393a131 100644
--- a/configs/imx8mp_rsb3720a1_4G_defconfig
+++ b/configs/imx8mp_rsb3720a1_4G_defconfig
@@ -22,6 +22,9 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x960000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x98fc00
+CONFIG_SPL_BSS_MAX_SIZE=0x400
CONFIG_SPL=y
CONFIG_IMX_BOOTAUX=y
CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000
@@ -42,9 +45,6 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_MAX_SIZE=0x26000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x98fc00
-CONFIG_SPL_BSS_MAX_SIZE=0x400
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_BOOTROM_SUPPORT=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
diff --git a/configs/imx8mp_rsb3720a1_6G_defconfig b/configs/imx8mp_rsb3720a1_6G_defconfig
index fecdaed..6dd51a3 100644
--- a/configs/imx8mp_rsb3720a1_6G_defconfig
+++ b/configs/imx8mp_rsb3720a1_6G_defconfig
@@ -22,6 +22,9 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x960000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x98fc00
+CONFIG_SPL_BSS_MAX_SIZE=0x400
CONFIG_SPL=y
CONFIG_IMX_BOOTAUX=y
CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000
@@ -42,9 +45,6 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_MAX_SIZE=0x26000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x98fc00
-CONFIG_SPL_BSS_MAX_SIZE=0x400
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_BOOTROM_SUPPORT=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
diff --git a/configs/imx8mp_venice_defconfig b/configs/imx8mp_venice_defconfig
index 6e4addc..df93774 100644
--- a/configs/imx8mp_venice_defconfig
+++ b/configs/imx8mp_venice_defconfig
@@ -18,6 +18,9 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x960000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x98fc00
+CONFIG_SPL_BSS_MAX_SIZE=0x400
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x3f8000
CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000
@@ -38,9 +41,6 @@
CONFIG_SYS_PBSIZE=2074
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_MAX_SIZE=0x26000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x98fc00
-CONFIG_SPL_BSS_MAX_SIZE=0x400
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_BOOTROM_SUPPORT=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
@@ -67,12 +67,16 @@
CONFIG_CMD_MMC=y
CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
+CONFIG_CMD_DHCP6=y
+CONFIG_CMD_TFTPPUT=y
CONFIG_SYS_DISABLE_AUTOLOAD=y
+CONFIG_CMD_WGET=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
CONFIG_CMD_UUID=y
CONFIG_CMD_PMIC=y
CONFIG_CMD_REGULATOR=y
+CONFIG_CMD_TPM=y
CONFIG_CMD_EXT4_WRITE=y
# CONFIG_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
@@ -86,9 +90,9 @@
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_IP_DEFRAG=y
CONFIG_TFTP_BLOCKSIZE=4096
+CONFIG_PROT_TCP_SACK=y
+CONFIG_IPV6=y
CONFIG_SPL_DM=y
-CONFIG_REGMAP=y
-CONFIG_SYSCON=y
CONFIG_CLK_COMPOSITE_CCF=y
CONFIG_CLK_IMX8MP=y
CONFIG_GPIO_HOG=y
@@ -132,17 +136,22 @@
CONFIG_SPL_DM_PMIC_BD71837=y
CONFIG_DM_PMIC_MP5416=y
CONFIG_SPL_DM_PMIC_MP5416=y
-CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
+# CONFIG_DM_RNG is not set
CONFIG_DM_SERIAL=y
CONFIG_MXC_UART=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_MXC_SPI=y
CONFIG_SYSRESET=y
CONFIG_SPL_SYSRESET=y
CONFIG_SYSRESET_PSCI=y
CONFIG_SYSRESET_WATCHDOG=y
CONFIG_DM_THERMAL=y
CONFIG_IMX_TMU=y
+# CONFIG_TPM_V1 is not set
+CONFIG_TPM2_TIS_SPI=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
@@ -160,4 +169,7 @@
CONFIG_USB_ETHER_RTL8152=y
CONFIG_USB_ETHER_SMSC95XX=y
CONFIG_IMX_WATCHDOG=y
+CONFIG_TPM=y
+# CONFIG_SPL_SHA512 is not set
+# CONFIG_SPL_SHA384 is not set
CONFIG_HEXDUMP=y
diff --git a/configs/imx8mq_cm_defconfig b/configs/imx8mq_cm_defconfig
index a5f8f0b..5eb96d3 100644
--- a/configs/imx8mq_cm_defconfig
+++ b/configs/imx8mq_cm_defconfig
@@ -18,6 +18,9 @@
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0x187ff0
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x180000
+CONFIG_SPL_BSS_MAX_SIZE=0x2000
CONFIG_SPL=y
CONFIG_IMX_BOOTAUX=y
CONFIG_SYS_LOAD_ADDR=0x40480000
@@ -31,9 +34,6 @@
CONFIG_SYS_PBSIZE=1050
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_MAX_SIZE=0x1f000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x180000
-CONFIG_SPL_BSS_MAX_SIZE=0x2000
CONFIG_SPL_BOARD_INIT=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_SYS_MALLOC=y
diff --git a/configs/imx8mq_evk_defconfig b/configs/imx8mq_evk_defconfig
index 3a2d88a..3c1701a 100644
--- a/configs/imx8mq_evk_defconfig
+++ b/configs/imx8mq_evk_defconfig
@@ -20,6 +20,9 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x187ff0
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x180000
+CONFIG_SPL_BSS_MAX_SIZE=0x2000
CONFIG_SPL=y
CONFIG_IMX_BOOTAUX=y
CONFIG_SYS_LOAD_ADDR=0x40480000
@@ -33,9 +36,6 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_MAX_SIZE=0x1f000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x180000
-CONFIG_SPL_BSS_MAX_SIZE=0x2000
CONFIG_SPL_BOARD_INIT=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_SYS_MALLOC=y
diff --git a/configs/imx8mq_phanbell_defconfig b/configs/imx8mq_phanbell_defconfig
index 3ac4b21..3a3fb75 100644
--- a/configs/imx8mq_phanbell_defconfig
+++ b/configs/imx8mq_phanbell_defconfig
@@ -20,6 +20,9 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x187ff0
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x180000
+CONFIG_SPL_BSS_MAX_SIZE=0x2000
CONFIG_SPL=y
CONFIG_IMX_BOOTAUX=y
CONFIG_SYS_LOAD_ADDR=0x40480000
@@ -34,9 +37,6 @@
CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else booti ${loadaddr} - ${fdt_addr}; fi"
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_MAX_SIZE=0x2b000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x180000
-CONFIG_SPL_BSS_MAX_SIZE=0x2000
CONFIG_SPL_BOARD_INIT=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_SYS_MALLOC=y
diff --git a/configs/imx8mq_reform2_defconfig b/configs/imx8mq_reform2_defconfig
index 283d6d9..1844e3c 100644
--- a/configs/imx8mq_reform2_defconfig
+++ b/configs/imx8mq_reform2_defconfig
@@ -20,6 +20,9 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x187ff0
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x180000
+CONFIG_SPL_BSS_MAX_SIZE=0x2000
CONFIG_SPL=y
CONFIG_IMX_BOOTAUX=y
CONFIG_SYS_LOAD_ADDR=0x40480000
@@ -36,9 +39,6 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_MAX_SIZE=0x1f000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x180000
-CONFIG_SPL_BSS_MAX_SIZE=0x2000
CONFIG_SPL_BOARD_INIT=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_SYS_MALLOC=y
diff --git a/configs/imx8qm_dmsse20a1_defconfig b/configs/imx8qm_dmsse20a1_defconfig
index 333115d..43d8205 100644
--- a/configs/imx8qm_dmsse20a1_defconfig
+++ b/configs/imx8qm_dmsse20a1_defconfig
@@ -21,6 +21,9 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x13e000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x128000
+CONFIG_SPL_BSS_MAX_SIZE=0x1000
CONFIG_SPL=y
CONFIG_SYS_LOAD_ADDR=0x80280000
CONFIG_REMAKE_ELF=y
@@ -36,9 +39,6 @@
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_MAX_SIZE=0x1f000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x128000
-CONFIG_SPL_BSS_MAX_SIZE=0x1000
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
diff --git a/configs/imx8qm_mek_defconfig b/configs/imx8qm_mek_defconfig
index f353c16..bf02d3e 100644
--- a/configs/imx8qm_mek_defconfig
+++ b/configs/imx8qm_mek_defconfig
@@ -19,6 +19,9 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x13e000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x128000
+CONFIG_SPL_BSS_MAX_SIZE=0x1000
CONFIG_SPL=y
CONFIG_SYS_LOAD_ADDR=0x80280000
CONFIG_REMAKE_ELF=y
@@ -34,9 +37,6 @@
CONFIG_LOG=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_MAX_SIZE=0x1f000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x128000
-CONFIG_SPL_BSS_MAX_SIZE=0x1000
CONFIG_SPL_BOARD_INIT=y
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
# CONFIG_SPL_LEGACY_IMAGE_FORMAT is not set
diff --git a/configs/imx8qm_rom7720_a1_4G_defconfig b/configs/imx8qm_rom7720_a1_4G_defconfig
index f0b109b..bee6964 100644
--- a/configs/imx8qm_rom7720_a1_4G_defconfig
+++ b/configs/imx8qm_rom7720_a1_4G_defconfig
@@ -16,6 +16,9 @@
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x128000
+CONFIG_SPL_BSS_MAX_SIZE=0x1000
CONFIG_SPL=y
CONFIG_SYS_LOAD_ADDR=0x80280000
CONFIG_REMAKE_ELF=y
@@ -30,9 +33,6 @@
CONFIG_LOG=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_MAX_SIZE=0x1f000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x128000
-CONFIG_SPL_BSS_MAX_SIZE=0x1000
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_POWER_DOMAIN=y
CONFIG_SPL_WATCHDOG=y
diff --git a/configs/imx8qxp_mek_defconfig b/configs/imx8qxp_mek_defconfig
index da7cb05..d6b79f5 100644
--- a/configs/imx8qxp_mek_defconfig
+++ b/configs/imx8qxp_mek_defconfig
@@ -19,6 +19,9 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x13e000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x128000
+CONFIG_SPL_BSS_MAX_SIZE=0x1000
CONFIG_SPL=y
CONFIG_SYS_LOAD_ADDR=0x80280000
CONFIG_REMAKE_ELF=y
@@ -35,9 +38,6 @@
CONFIG_LOG=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_MAX_SIZE=0x1f000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x128000
-CONFIG_SPL_BSS_MAX_SIZE=0x1000
CONFIG_SPL_BOARD_INIT=y
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
# CONFIG_SPL_LEGACY_IMAGE_FORMAT is not set
diff --git a/configs/imx8ulp_evk_defconfig b/configs/imx8ulp_evk_defconfig
index a7085ce..721c4cb 100644
--- a/configs/imx8ulp_evk_defconfig
+++ b/configs/imx8ulp_evk_defconfig
@@ -17,6 +17,9 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x22050000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x22048000
+CONFIG_SPL_BSS_MAX_SIZE=0x2000
CONFIG_SPL=y
CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x88000000
CONFIG_SYS_LOAD_ADDR=0x80480000
@@ -32,9 +35,6 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_MAX_SIZE=0x25000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x22048000
-CONFIG_SPL_BSS_MAX_SIZE=0x2000
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_BOOTROM_SUPPORT=y
CONFIG_SPL_LOAD_IMX_CONTAINER=y
diff --git a/configs/imx93-phyboard-segin_defconfig b/configs/imx93-phyboard-segin_defconfig
index 54215c5..e3eb002 100644
--- a/configs/imx93-phyboard-segin_defconfig
+++ b/configs/imx93-phyboard-segin_defconfig
@@ -20,6 +20,9 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x20519dd0
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x2051a000
+CONFIG_SPL_BSS_MAX_SIZE=0x2000
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x720000
CONFIG_CMD_DEKBLOB=y
@@ -36,9 +39,6 @@
CONFIG_SYS_PBSIZE=2074
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_MAX_SIZE=0x26000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x2051a000
-CONFIG_SPL_BSS_MAX_SIZE=0x2000
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_BOOTROM_SUPPORT=y
CONFIG_SPL_LOAD_IMX_CONTAINER=y
diff --git a/configs/imx93_11x11_evk_defconfig b/configs/imx93_11x11_evk_defconfig
index 6361347..5ad770f 100644
--- a/configs/imx93_11x11_evk_defconfig
+++ b/configs/imx93_11x11_evk_defconfig
@@ -10,13 +10,16 @@
CONFIG_ENV_OFFSET=0x700000
CONFIG_IMX_CONFIG="arch/arm/mach-imx/imx9/imximage.cfg"
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="imx93-11x11-evk"
+CONFIG_DEFAULT_DEVICE_TREE="freescale/imx93-11x11-evk"
CONFIG_SPL_TEXT_BASE=0x2049A000
CONFIG_TARGET_IMX93_11X11_EVK=y
CONFIG_SYS_MONITOR_LEN=524288
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x20519dd0
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x2051a000
+CONFIG_SPL_BSS_MAX_SIZE=0x2000
CONFIG_SPL=y
CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x88000000
CONFIG_SYS_LOAD_ADDR=0x80400000
@@ -30,9 +33,6 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_MAX_SIZE=0x26000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x2051a000
-CONFIG_SPL_BSS_MAX_SIZE=0x2000
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_BOOTROM_SUPPORT=y
CONFIG_SPL_LOAD_IMX_CONTAINER=y
diff --git a/configs/imx93_11x11_evk_ld_defconfig b/configs/imx93_11x11_evk_ld_defconfig
index 4e3bbdd..abda6d1 100644
--- a/configs/imx93_11x11_evk_ld_defconfig
+++ b/configs/imx93_11x11_evk_ld_defconfig
@@ -10,7 +10,7 @@
CONFIG_ENV_OFFSET=0x400000
CONFIG_IMX_CONFIG="arch/arm/mach-imx/imx9/imximage.cfg"
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="imx93-11x11-evk"
+CONFIG_DEFAULT_DEVICE_TREE="freescale/imx93-11x11-evk"
CONFIG_SPL_TEXT_BASE=0x2049A000
CONFIG_IMX9_LOW_DRIVE_MODE=y
CONFIG_TARGET_IMX93_11X11_EVK=y
@@ -18,6 +18,9 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x20519dd0
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x2051a000
+CONFIG_SPL_BSS_MAX_SIZE=0x2000
CONFIG_SPL=y
CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x88000000
CONFIG_SYS_LOAD_ADDR=0x80400000
@@ -31,9 +34,6 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_MAX_SIZE=0x26000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x2051a000
-CONFIG_SPL_BSS_MAX_SIZE=0x2000
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_BOOTROM_SUPPORT=y
CONFIG_SPL_LOAD_IMX_CONTAINER=y
diff --git a/configs/imx93_var_som_defconfig b/configs/imx93_var_som_defconfig
index 996cad4..e39d7dc 100644
--- a/configs/imx93_var_som_defconfig
+++ b/configs/imx93_var_som_defconfig
@@ -18,6 +18,9 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x20519dd0
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x2051a000
+CONFIG_SPL_BSS_MAX_SIZE=0x2000
CONFIG_SPL=y
CONFIG_CMD_DEKBLOB=y
CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x88000000
@@ -37,9 +40,6 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_MAX_SIZE=0x26000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x2051a000
-CONFIG_SPL_BSS_MAX_SIZE=0x2000
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_BOOTROM_SUPPORT=y
CONFIG_SPL_LOAD_IMX_CONTAINER=y
diff --git a/configs/inetspace_v2_defconfig b/configs/inetspace_v2_defconfig
index 2e8e3f3..3fa7790 100644
--- a/configs/inetspace_v2_defconfig
+++ b/configs/inetspace_v2_defconfig
@@ -11,7 +11,7 @@
CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_OFFSET=0x70000
CONFIG_ENV_SECT_SIZE=0x10000
-CONFIG_DEFAULT_DEVICE_TREE="kirkwood-is2"
+CONFIG_DEFAULT_DEVICE_TREE="marvell/kirkwood-is2"
CONFIG_IDENT_STRING=" IS v2"
CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_ENV_ADDR=0x70000
diff --git a/configs/iot2050_defconfig b/configs/iot2050_defconfig
index 484f8e4..e0c2b14 100644
--- a/configs/iot2050_defconfig
+++ b/configs/iot2050_defconfig
@@ -23,6 +23,10 @@
CONFIG_DM_RESET=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x80a00000
+CONFIG_SPL_BSS_MAX_SIZE=0x80000
+CONFIG_SPL_STACK_R=y
CONFIG_ENV_OFFSET_REDUND=0x6a0000
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI=y
@@ -44,12 +48,8 @@
CONFIG_SYS_PBSIZE=1050
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_SPL_MAX_SIZE=0x58000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x80a00000
-CONFIG_SPL_BSS_MAX_SIZE=0x80000
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
-CONFIG_SPL_STACK_R=y
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_SYS_MALLOC_SIZE=0x800000
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
diff --git a/configs/j7200_evm_a72_defconfig b/configs/j7200_evm_a72_defconfig
index 0f2e83d..fe8e84c 100644
--- a/configs/j7200_evm_a72_defconfig
+++ b/configs/j7200_evm_a72_defconfig
@@ -23,6 +23,10 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x80a00000
+CONFIG_SPL_BSS_MAX_SIZE=0x80000
+CONFIG_SPL_STACK_R=y
CONFIG_SPL_FS_FAT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
@@ -37,12 +41,8 @@
CONFIG_BOOTCOMMAND="run envboot; bootflow scan -lb"
CONFIG_LOGLEVEL=7
CONFIG_SPL_MAX_SIZE=0xc0000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x80a00000
-CONFIG_SPL_BSS_MAX_SIZE=0x80000
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
-CONFIG_SPL_STACK_R=y
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_SYS_MALLOC_SIZE=0x800000
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
diff --git a/configs/j7200_evm_r5_defconfig b/configs/j7200_evm_r5_defconfig
index d5b44e3..e023af2 100644
--- a/configs/j7200_evm_r5_defconfig
+++ b/configs/j7200_evm_r5_defconfig
@@ -22,6 +22,10 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x41cf5bfc
+CONFIG_SPL_BSS_MAX_SIZE=0xa000
+CONFIG_SPL_STACK_R=y
CONFIG_SPL_FS_FAT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
@@ -33,11 +37,7 @@
CONFIG_USE_BOOTCOMMAND=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_SPL_MAX_SIZE=0xc0000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x41cf5bfc
-CONFIG_SPL_BSS_MAX_SIZE=0xa000
CONFIG_SPL_BOARD_INIT=y
-CONFIG_SPL_STACK_R=y
CONFIG_SPL_SEPARATE_BSS=y
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
diff --git a/configs/j721e_beagleboneai64_a72_defconfig b/configs/j721e_beagleboneai64_a72_defconfig
index c100ec4..a354876 100644
--- a/configs/j721e_beagleboneai64_a72_defconfig
+++ b/configs/j721e_beagleboneai64_a72_defconfig
@@ -21,6 +21,10 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x80a00000
+CONFIG_SPL_BSS_MAX_SIZE=0x80000
+CONFIG_SPL_STACK_R=y
CONFIG_SPL_FS_FAT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
# CONFIG_PSCI_RESET is not set
@@ -37,11 +41,7 @@
CONFIG_LOGLEVEL=7
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_MAX_SIZE=0xc0000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x80a00000
-CONFIG_SPL_BSS_MAX_SIZE=0x80000
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
-CONFIG_SPL_STACK_R=y
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_SYS_MALLOC_SIZE=0x800000
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
@@ -57,7 +57,9 @@
CONFIG_SPL_RAM_SUPPORT=y
CONFIG_SPL_RAM_DEVICE=y
CONFIG_SPL_YMODEM_SUPPORT=y
+CONFIG_CMD_BOOTEFI_SELFTEST=y
CONFIG_CMD_ASKENV=y
+CONFIG_CMD_NVEDIT_EFI=y
CONFIG_CMD_DFU=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPIO_READ=y
@@ -67,6 +69,7 @@
CONFIG_CMD_REMOTEPROC=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
+CONFIG_CMD_EFIDEBUG=y
CONFIG_CMD_TIME=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_MMC_SPEED_MODE_SET=y
@@ -143,6 +146,8 @@
CONFIG_REMOTEPROC_TI_K3_DSP=y
CONFIG_REMOTEPROC_TI_K3_R5F=y
CONFIG_RESET_TI_SCI=y
+CONFIG_DM_RTC=y
+CONFIG_RTC_EMULATION=y
CONFIG_SCSI=y
CONFIG_DM_SERIAL=y
CONFIG_SOC_DEVICE=y
@@ -166,3 +171,4 @@
CONFIG_USB_GADGET_PRODUCT_NUM=0x6163
CONFIG_SPL_DFU=y
CONFIG_LZO=y
+CONFIG_EFI_SET_TIME=y
diff --git a/configs/j721e_beagleboneai64_r5_defconfig b/configs/j721e_beagleboneai64_r5_defconfig
index eab7a60..314161b 100644
--- a/configs/j721e_beagleboneai64_r5_defconfig
+++ b/configs/j721e_beagleboneai64_r5_defconfig
@@ -19,6 +19,10 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x41cf59f0
+CONFIG_SPL_BSS_MAX_SIZE=0xa000
+CONFIG_SPL_STACK_R=y
CONFIG_SPL_SIZE_LIMIT=0xf59f0
CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x4000
CONFIG_SPL_FS_FAT=y
@@ -32,10 +36,6 @@
CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y
CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y
CONFIG_SPL_MAX_SIZE=0xf59f0
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x41cf59f0
-CONFIG_SPL_BSS_MAX_SIZE=0xa000
-CONFIG_SPL_STACK_R=y
CONFIG_SPL_SEPARATE_BSS=y
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
diff --git a/configs/j721e_evm_a72_defconfig b/configs/j721e_evm_a72_defconfig
index 019ddcc..3d8e939 100644
--- a/configs/j721e_evm_a72_defconfig
+++ b/configs/j721e_evm_a72_defconfig
@@ -22,6 +22,10 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x80a00000
+CONFIG_SPL_BSS_MAX_SIZE=0x80000
+CONFIG_SPL_STACK_R=y
CONFIG_SPL_FS_FAT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
@@ -36,12 +40,8 @@
CONFIG_BOOTCOMMAND="run envboot; bootflow scan -lb"
CONFIG_LOGLEVEL=7
CONFIG_SPL_MAX_SIZE=0xc0000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x80a00000
-CONFIG_SPL_BSS_MAX_SIZE=0x80000
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
-CONFIG_SPL_STACK_R=y
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_SYS_MALLOC_SIZE=0x800000
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
@@ -63,7 +63,9 @@
CONFIG_SPL_SPI_LOAD=y
CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000
CONFIG_SPL_YMODEM_SUPPORT=y
+CONFIG_CMD_BOOTEFI_SELFTEST=y
CONFIG_CMD_ASKENV=y
+CONFIG_CMD_NVEDIT_EFI=y
CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
@@ -75,6 +77,7 @@
CONFIG_CMD_UFS=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
+CONFIG_CMD_EFIDEBUG=y
CONFIG_CMD_TIME=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_MTDIDS_DEFAULT="nor0=47040000.spi.0,nor0=47034000.hyperbus"
@@ -174,6 +177,8 @@
CONFIG_REMOTEPROC_TI_K3_DSP=y
CONFIG_REMOTEPROC_TI_K3_R5F=y
CONFIG_RESET_TI_SCI=y
+CONFIG_DM_RTC=y
+CONFIG_RTC_EMULATION=y
CONFIG_SCSI=y
CONFIG_DM_SERIAL=y
CONFIG_SOC_DEVICE=y
@@ -204,3 +209,4 @@
CONFIG_UFS=y
CONFIG_CADENCE_UFS=y
CONFIG_TI_J721E_UFS=y
+CONFIG_EFI_SET_TIME=y
diff --git a/configs/j721e_evm_r5_defconfig b/configs/j721e_evm_r5_defconfig
index 4d4b96d..cea48b2 100644
--- a/configs/j721e_evm_r5_defconfig
+++ b/configs/j721e_evm_r5_defconfig
@@ -21,6 +21,10 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x41cf59f0
+CONFIG_SPL_BSS_MAX_SIZE=0xa000
+CONFIG_SPL_STACK_R=y
CONFIG_SPL_SIZE_LIMIT=0xf59f0
CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x4000
CONFIG_SPL_FS_FAT=y
@@ -37,11 +41,7 @@
CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y
CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y
CONFIG_SPL_MAX_SIZE=0xf59f0
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x41cf59f0
-CONFIG_SPL_BSS_MAX_SIZE=0xa000
CONFIG_SPL_BOARD_INIT=y
-CONFIG_SPL_STACK_R=y
CONFIG_SPL_SEPARATE_BSS=y
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
diff --git a/configs/j721s2_evm_a72_defconfig b/configs/j721s2_evm_a72_defconfig
index 92f6941..19cd44b 100644
--- a/configs/j721s2_evm_a72_defconfig
+++ b/configs/j721s2_evm_a72_defconfig
@@ -21,6 +21,10 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x80a00000
+CONFIG_SPL_BSS_MAX_SIZE=0x80000
+CONFIG_SPL_STACK_R=y
CONFIG_SPL_FS_FAT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
@@ -34,12 +38,8 @@
CONFIG_BOOTCOMMAND="run envboot; run distro_bootcmd;"
CONFIG_LOGLEVEL=7
CONFIG_SPL_MAX_SIZE=0xc0000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x80a00000
-CONFIG_SPL_BSS_MAX_SIZE=0x80000
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
-CONFIG_SPL_STACK_R=y
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_SYS_MALLOC_SIZE=0x800000
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
diff --git a/configs/j721s2_evm_r5_defconfig b/configs/j721s2_evm_r5_defconfig
index cb6b4a4..5ef5247 100644
--- a/configs/j721s2_evm_r5_defconfig
+++ b/configs/j721s2_evm_r5_defconfig
@@ -20,6 +20,11 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x41c76000
+CONFIG_SPL_BSS_MAX_SIZE=0xa000
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x140000
CONFIG_SPL_SIZE_LIMIT=0x80000
CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x4000
CONFIG_SPL_FS_FAT=y
@@ -35,14 +40,9 @@
CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y
CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y
CONFIG_SPL_MAX_SIZE=0xc0000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x41c76000
-CONFIG_SPL_BSS_MAX_SIZE=0xa000
CONFIG_SPL_SYS_REPORT_STACK_F_USAGE=y
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
-CONFIG_SPL_STACK_R=y
-CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x140000
CONFIG_SPL_SEPARATE_BSS=y
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
diff --git a/configs/j784s4_evm_a72_defconfig b/configs/j784s4_evm_a72_defconfig
index 6c62403..bb9603b 100644
--- a/configs/j784s4_evm_a72_defconfig
+++ b/configs/j784s4_evm_a72_defconfig
@@ -1,6 +1,5 @@
CONFIG_ARM=y
CONFIG_ARCH_K3=y
-CONFIG_TI_SECURE_DEVICE=y
CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
@@ -14,7 +13,6 @@
CONFIG_ENV_SIZE=0x20000
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
-CONFIG_OF_UPSTREAM=y
CONFIG_DEFAULT_DEVICE_TREE="ti/k3-j784s4-evm"
CONFIG_SPL_TEXT_BASE=0x80080000
CONFIG_OF_LIBFDT_OVERLAY=y
@@ -23,6 +21,10 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x80a00000
+CONFIG_SPL_BSS_MAX_SIZE=0x80000
+CONFIG_SPL_STACK_R=y
CONFIG_SPL_FS_FAT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
@@ -30,19 +32,11 @@
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000
CONFIG_BOOTSTD_FULL=y
-CONFIG_BOOTSTD_DEFAULTS=y
CONFIG_BOOTCOMMAND="run envboot; bootflow scan -lb"
-CONFIG_BOARD_LATE_INIT=y
CONFIG_LOGLEVEL=7
CONFIG_SPL_MAX_SIZE=0xc0000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x80a00000
-CONFIG_SPL_BSS_MAX_SIZE=0x80000
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
-CONFIG_SPL_STACK_R=y
-CONFIG_SYS_SPL_MALLOC=y
-CONFIG_SYS_SPL_MALLOC_SIZE=0x800000
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1400
CONFIG_SPL_DMA=y
@@ -50,18 +44,15 @@
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img"
CONFIG_SPL_I2C=y
CONFIG_SPL_DM_MAILBOX=y
-CONFIG_SPL_MTD_SUPPORT=y
CONFIG_SPL_DM_SPI_FLASH=y
CONFIG_SPL_DM_RESET=y
CONFIG_SPL_POWER_DOMAIN=y
CONFIG_SPL_RAM_SUPPORT=y
CONFIG_SPL_RAM_DEVICE=y
-CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y
CONFIG_SPL_SPI_LOAD=y
CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000
CONFIG_SPL_THERMAL=y
CONFIG_SPL_YMODEM_SUPPORT=y
-CONFIG_SYS_MAXARGS=64
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
@@ -72,8 +63,8 @@
CONFIG_CMD_EXT4_WRITE=y
CONFIG_OF_CONTROL=y
CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_UPSTREAM=y
CONFIG_SPL_MULTI_DTB_FIT=y
-CONFIG_OF_LIST="ti/k3-j784s4-evm"
CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y
CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
@@ -145,7 +136,6 @@
CONFIG_SPL_RAM=y
CONFIG_RESET_TI_SCI=y
CONFIG_SCSI=y
-CONFIG_DM_SCSI=y
CONFIG_DM_SERIAL=y
CONFIG_SOC_DEVICE=y
CONFIG_SOC_DEVICE_TI_K3=y
diff --git a/configs/j784s4_evm_r5_defconfig b/configs/j784s4_evm_r5_defconfig
index 50a52b9..f5fe743 100644
--- a/configs/j784s4_evm_r5_defconfig
+++ b/configs/j784s4_evm_r5_defconfig
@@ -1,6 +1,5 @@
CONFIG_ARM=y
CONFIG_ARCH_K3=y
-CONFIG_TI_SECURE_DEVICE=y
CONFIG_SYS_MALLOC_F_LEN=0x10000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
@@ -21,6 +20,11 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x41c76000
+CONFIG_SPL_BSS_MAX_SIZE=0xa000
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x140000
CONFIG_SPL_SIZE_LIMIT=0x80000
CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x4000
CONFIG_SPL_FS_FAT=y
@@ -29,23 +33,15 @@
CONFIG_SPL_SPI=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_USE_BOOTCOMMAND=y
CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y
CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y
CONFIG_SPL_MAX_SIZE=0xc0000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x41c76000
-CONFIG_SPL_BSS_MAX_SIZE=0xa000
CONFIG_SPL_SYS_REPORT_STACK_F_USAGE=y
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
-CONFIG_SPL_STACK_R=y
-CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x140000
CONFIG_SPL_SEPARATE_BSS=y
-CONFIG_SYS_SPL_MALLOC=y
-CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y
-CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x84000000
-CONFIG_SYS_SPL_MALLOC_SIZE=0x1000000
CONFIG_SPL_EARLY_BSS=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x400
@@ -54,21 +50,17 @@
CONFIG_SPL_FS_EXT4=y
CONFIG_SPL_I2C=y
CONFIG_SPL_DM_MAILBOX=y
-CONFIG_SPL_MTD_SUPPORT=y
CONFIG_SPL_DM_SPI_FLASH=y
CONFIG_SPL_DM_RESET=y
CONFIG_SPL_POWER_DOMAIN=y
CONFIG_SPL_RAM_SUPPORT=y
CONFIG_SPL_RAM_DEVICE=y
CONFIG_SPL_REMOTEPROC=y
-CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y
CONFIG_SPL_SPI_LOAD=y
CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000
CONFIG_SPL_THERMAL=y
CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_HUSH_PARSER=y
-CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
CONFIG_CMD_TIME=y
@@ -76,7 +68,6 @@
CONFIG_OF_CONTROL=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_SPL_MULTI_DTB_FIT=y
-CONFIG_SPL_OF_LIST="k3-j784s4-r5-evm"
CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SPL_DM=y
diff --git a/configs/jaguar-rk3588_defconfig b/configs/jaguar-rk3588_defconfig
index 3233b75..f29505e 100644
--- a/configs/jaguar-rk3588_defconfig
+++ b/configs/jaguar-rk3588_defconfig
@@ -3,7 +3,6 @@
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SPL_GPIO=y
-CONFIG_NR_DRAM_BANKS=2
CONFIG_SF_DEFAULT_SPEED=24000000
CONFIG_SF_DEFAULT_MODE=0x2000
CONFIG_ENV_SIZE=0x1f000
diff --git a/configs/jethub_j100_defconfig b/configs/jethub_j100_defconfig
index 8632454..9de6b4b 100644
--- a/configs/jethub_j100_defconfig
+++ b/configs/jethub_j100_defconfig
@@ -8,7 +8,7 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="meson-axg-jethome-jethub-j100"
+CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-axg-jethome-jethub-j100"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_MESON_AXG=y
diff --git a/configs/jethub_j80_defconfig b/configs/jethub_j80_defconfig
index ca0808f..8530687 100644
--- a/configs/jethub_j80_defconfig
+++ b/configs/jethub_j80_defconfig
@@ -8,7 +8,7 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="meson-gxl-s905w-jethome-jethub-j80"
+CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-gxl-s905w-jethome-jethub-j80"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_MESON_GXL=y
diff --git a/configs/k2e_evm_defconfig b/configs/k2e_evm_defconfig
index 8dbdf1f..8d6cb24 100644
--- a/configs/k2e_evm_defconfig
+++ b/configs/k2e_evm_defconfig
@@ -22,6 +22,9 @@
CONFIG_SPL_TEXT_BASE=0xC100000
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0xc1223f4
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0xc10fff8
+CONFIG_SPL_BSS_MAX_SIZE=0x8000
CONFIG_SPL=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI=y
@@ -32,9 +35,6 @@
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_MAX_SIZE=0xfff8
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0xc10fff8
-CONFIG_SPL_BSS_MAX_SIZE=0x8000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_SYS_MALLOC_SIZE=0x8000
diff --git a/configs/k2g_evm_defconfig b/configs/k2g_evm_defconfig
index eed1884..88965e2 100644
--- a/configs/k2g_evm_defconfig
+++ b/configs/k2g_evm_defconfig
@@ -21,6 +21,9 @@
CONFIG_SPL_TEXT_BASE=0xC0A0000
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0xc0c23f4
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0xc0afff8
+CONFIG_SPL_BSS_MAX_SIZE=0x8000
CONFIG_SPL=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI=y
@@ -31,9 +34,6 @@
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_MAX_SIZE=0xfff8
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0xc0afff8
-CONFIG_SPL_BSS_MAX_SIZE=0x8000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_SYS_MALLOC_SIZE=0x8000
diff --git a/configs/k2hk_evm_defconfig b/configs/k2hk_evm_defconfig
index 6ed1772..4da75d1 100644
--- a/configs/k2hk_evm_defconfig
+++ b/configs/k2hk_evm_defconfig
@@ -22,6 +22,9 @@
CONFIG_SPL_TEXT_BASE=0xC200000
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0xc2223f4
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0xc20fff8
+CONFIG_SPL_BSS_MAX_SIZE=0x8000
CONFIG_SPL=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI=y
@@ -32,9 +35,6 @@
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_MAX_SIZE=0xfff8
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0xc20fff8
-CONFIG_SPL_BSS_MAX_SIZE=0x8000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_SYS_MALLOC_SIZE=0x8000
diff --git a/configs/k2l_evm_defconfig b/configs/k2l_evm_defconfig
index d642a68..c4534f0 100644
--- a/configs/k2l_evm_defconfig
+++ b/configs/k2l_evm_defconfig
@@ -22,6 +22,9 @@
CONFIG_SPL_TEXT_BASE=0xC100000
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0xc1223f4
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0xc10fff8
+CONFIG_SPL_BSS_MAX_SIZE=0x8000
CONFIG_SPL=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI=y
@@ -32,9 +35,6 @@
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_MAX_SIZE=0xfff8
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0xc10fff8
-CONFIG_SPL_BSS_MAX_SIZE=0x8000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_SYS_MALLOC_SIZE=0x8000
diff --git a/configs/khadas-vim2_defconfig b/configs/khadas-vim2_defconfig
index 59ef337..50f8b30 100644
--- a/configs/khadas-vim2_defconfig
+++ b/configs/khadas-vim2_defconfig
@@ -6,7 +6,7 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="meson-gxm-khadas-vim2"
+CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-gxm-khadas-vim2"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_MESON_GXM=y
diff --git a/configs/khadas-vim3_android_ab_defconfig b/configs/khadas-vim3_android_ab_defconfig
index ee62fe3..37b8d6a 100644
--- a/configs/khadas-vim3_android_ab_defconfig
+++ b/configs/khadas-vim3_android_ab_defconfig
@@ -10,7 +10,7 @@
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0x0
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="meson-g12b-a311d-khadas-vim3"
+CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-g12b-a311d-khadas-vim3"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_MESON_G12A=y
diff --git a/configs/khadas-vim3_android_defconfig b/configs/khadas-vim3_android_defconfig
index cecbe50..55d59dd 100644
--- a/configs/khadas-vim3_android_defconfig
+++ b/configs/khadas-vim3_android_defconfig
@@ -10,7 +10,7 @@
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0x0
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="meson-g12b-a311d-khadas-vim3"
+CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-g12b-a311d-khadas-vim3"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_MESON_G12A=y
diff --git a/configs/khadas-vim3_defconfig b/configs/khadas-vim3_defconfig
index 5df4b92..32579b8 100644
--- a/configs/khadas-vim3_defconfig
+++ b/configs/khadas-vim3_defconfig
@@ -7,7 +7,7 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="meson-g12b-a311d-khadas-vim3"
+CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-g12b-a311d-khadas-vim3"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_MESON_G12A=y
diff --git a/configs/khadas-vim3l_android_ab_defconfig b/configs/khadas-vim3l_android_ab_defconfig
index ec4e0dc..95e7027 100644
--- a/configs/khadas-vim3l_android_ab_defconfig
+++ b/configs/khadas-vim3l_android_ab_defconfig
@@ -10,7 +10,7 @@
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0x0
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="meson-sm1-khadas-vim3l"
+CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-sm1-khadas-vim3l"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_MESON_G12A=y
diff --git a/configs/khadas-vim3l_android_defconfig b/configs/khadas-vim3l_android_defconfig
index 206f8de..6372d11 100644
--- a/configs/khadas-vim3l_android_defconfig
+++ b/configs/khadas-vim3l_android_defconfig
@@ -10,7 +10,7 @@
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0x0
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="meson-sm1-khadas-vim3l"
+CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-sm1-khadas-vim3l"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_MESON_G12A=y
diff --git a/configs/khadas-vim3l_defconfig b/configs/khadas-vim3l_defconfig
index de8fdd8..b9f4690 100644
--- a/configs/khadas-vim3l_defconfig
+++ b/configs/khadas-vim3l_defconfig
@@ -7,7 +7,7 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="meson-sm1-khadas-vim3l"
+CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-sm1-khadas-vim3l"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_MESON_G12A=y
diff --git a/configs/khadas-vim_defconfig b/configs/khadas-vim_defconfig
index 5ed7c1a..ac00e89 100644
--- a/configs/khadas-vim_defconfig
+++ b/configs/khadas-vim_defconfig
@@ -6,7 +6,7 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="meson-gxl-s905x-khadas-vim"
+CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-gxl-s905x-khadas-vim"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_MESON_GXL=y
diff --git a/configs/koelsch_defconfig b/configs/koelsch_defconfig
index 963e02d..a912e58 100644
--- a/configs/koelsch_defconfig
+++ b/configs/koelsch_defconfig
@@ -16,7 +16,7 @@
CONFIG_ENV_OFFSET=0xC0000
CONFIG_ENV_SECT_SIZE=0x40000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="r8a7791-koelsch-u-boot"
+CONFIG_DEFAULT_DEVICE_TREE="renesas/r8a7791-koelsch"
CONFIG_SPL_TEXT_BASE=0xe6300000
CONFIG_ARCH_RENESAS_BOARD_STRING="Koelsch"
CONFIG_R8A7791=y
diff --git a/configs/kontron-sl-mx8mm_defconfig b/configs/kontron-sl-mx8mm_defconfig
index 50c5590..f257028 100644
--- a/configs/kontron-sl-mx8mm_defconfig
+++ b/configs/kontron-sl-mx8mm_defconfig
@@ -20,6 +20,9 @@
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_BOOTCOUNT_BOOTLIMIT=3
CONFIG_SPL_STACK=0x91fff0
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x910000
+CONFIG_SPL_BSS_MAX_SIZE=0x2000
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x1F0000
CONFIG_SPL_SPI_FLASH_SUPPORT=y
@@ -35,9 +38,6 @@
CONFIG_SYS_PBSIZE=276
CONFIG_BOARD_TYPES=y
CONFIG_BOARD_LATE_INIT=y
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x910000
-CONFIG_SPL_BSS_MAX_SIZE=0x2000
CONFIG_SPL_BOARD_INIT=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_SYS_MALLOC=y
diff --git a/configs/kontron_pitx_imx8m_defconfig b/configs/kontron_pitx_imx8m_defconfig
index 02fc696..e2a87c4 100644
--- a/configs/kontron_pitx_imx8m_defconfig
+++ b/configs/kontron_pitx_imx8m_defconfig
@@ -20,6 +20,9 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x187ff0
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x180000
+CONFIG_SPL_BSS_MAX_SIZE=0x2000
CONFIG_SPL=y
CONFIG_IMX_BOOTAUX=y
CONFIG_SYS_LOAD_ADDR=0x42000000
@@ -36,9 +39,6 @@
CONFIG_BOARD_LATE_INIT=y
CONFIG_MISC_INIT_R=y
CONFIG_SPL_MAX_SIZE=0x1f000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x180000
-CONFIG_SPL_BSS_MAX_SIZE=0x2000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
diff --git a/configs/kontron_sl28_defconfig b/configs/kontron_sl28_defconfig
index 639c5c6..a1d5f89 100644
--- a/configs/kontron_sl28_defconfig
+++ b/configs/kontron_sl28_defconfig
@@ -11,7 +11,7 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x3e0000
CONFIG_ENV_SECT_SIZE=0x10000
-CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1028a-kontron-sl28"
+CONFIG_DEFAULT_DEVICE_TREE="freescale/fsl-ls1028a-kontron-sl28"
CONFIG_SPL_TEXT_BASE=0x18010000
CONFIG_SYS_FSL_SDHC_CLK_DIV=1
CONFIG_OF_LIBFDT_OVERLAY=y
@@ -19,6 +19,9 @@
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0x18009ff0
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x80100000
+CONFIG_SPL_BSS_MAX_SIZE=0x100000
CONFIG_SPL_SIZE_LIMIT=0x20000
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x3f0000
@@ -45,9 +48,6 @@
# CONFIG_HWCONFIG is not set
CONFIG_PCI_INIT_R=y
CONFIG_SPL_MAX_SIZE=0x20000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x80100000
-CONFIG_SPL_BSS_MAX_SIZE=0x100000
CONFIG_SPL_BOARD_INIT=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_SYS_MALLOC=y
@@ -73,7 +73,8 @@
CONFIG_CMD_RNG=y
CONFIG_OF_CONTROL=y
CONFIG_SPL_OF_CONTROL=y
-CONFIG_OF_LIST="fsl-ls1028a-kontron-sl28 fsl-ls1028a-kontron-sl28-var1 fsl-ls1028a-kontron-sl28-var2 fsl-ls1028a-kontron-sl28-var3 fsl-ls1028a-kontron-sl28-var4"
+CONFIG_OF_UPSTREAM=y
+CONFIG_OF_LIST="freescale/fsl-ls1028a-kontron-sl28 freescale/fsl-ls1028a-kontron-sl28-var1 freescale/fsl-ls1028a-kontron-sl28-var2 freescale/fsl-ls1028a-kontron-sl28-var4"
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
diff --git a/configs/kylin-rk3036_defconfig b/configs/kylin-rk3036_defconfig
index ed4f2ba..b9b50e8c 100644
--- a/configs/kylin-rk3036_defconfig
+++ b/configs/kylin-rk3036_defconfig
@@ -18,6 +18,7 @@
CONFIG_TARGET_KYLIN_RK3036=y
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_SPL_STACK=0x10081fff
+CONFIG_SPL_STACK_R=y
CONFIG_DEBUG_UART_BASE=0x20068000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x60800800
@@ -30,7 +31,6 @@
# CONFIG_SPL_FRAMEWORK is not set
CONFIG_SPL_PAD_TO=0x7f8000
CONFIG_SPL_NO_BSS_LIMIT=y
-CONFIG_SPL_STACK_R=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
diff --git a/configs/lager_defconfig b/configs/lager_defconfig
index 605909e..03f29b8 100644
--- a/configs/lager_defconfig
+++ b/configs/lager_defconfig
@@ -16,7 +16,7 @@
CONFIG_ENV_OFFSET=0xC0000
CONFIG_ENV_SECT_SIZE=0x40000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="r8a7790-lager-u-boot"
+CONFIG_DEFAULT_DEVICE_TREE="renesas/r8a7790-lager"
CONFIG_SPL_TEXT_BASE=0xe6300000
CONFIG_ARCH_RENESAS_BOARD_STRING="Lager"
CONFIG_R8A7790=y
diff --git a/configs/librem5_defconfig b/configs/librem5_defconfig
index 1dd0836..6999a68 100644
--- a/configs/librem5_defconfig
+++ b/configs/librem5_defconfig
@@ -20,6 +20,9 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x187ff0
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x180000
+CONFIG_SPL_BSS_MAX_SIZE=0x2000
CONFIG_SPL=y
CONFIG_IMX_BOOTAUX=y
CONFIG_SYS_LOAD_ADDR=0x40480000
@@ -37,9 +40,6 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_MAX_SIZE=0x25000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x180000
-CONFIG_SPL_BSS_MAX_SIZE=0x2000
CONFIG_SPL_BOARD_INIT=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_SYS_MALLOC=y
diff --git a/configs/libretech-ac_defconfig b/configs/libretech-ac_defconfig
index f0ab195..6ad0457 100644
--- a/configs/libretech-ac_defconfig
+++ b/configs/libretech-ac_defconfig
@@ -9,7 +9,7 @@
CONFIG_ENV_OFFSET=0xFFFF0000
CONFIG_ENV_SECT_SIZE=0x10000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="meson-gxl-s805x-libretech-ac"
+CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-gxl-s805x-libretech-ac"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_MESON_GXL=y
diff --git a/configs/libretech-cc_defconfig b/configs/libretech-cc_defconfig
index bb1a37a..beb919c 100644
--- a/configs/libretech-cc_defconfig
+++ b/configs/libretech-cc_defconfig
@@ -6,7 +6,7 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="meson-gxl-s905x-libretech-cc"
+CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-gxl-s905x-libretech-cc"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_MESON_GXL=y
diff --git a/configs/libretech-cc_v2_defconfig b/configs/libretech-cc_v2_defconfig
index 8949e24..6859dfd 100644
--- a/configs/libretech-cc_v2_defconfig
+++ b/configs/libretech-cc_v2_defconfig
@@ -8,7 +8,7 @@
CONFIG_ENV_OFFSET=0xFFFF0000
CONFIG_ENV_SECT_SIZE=0x10000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="meson-gxl-s905x-libretech-cc-v2"
+CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-gxl-s905x-libretech-cc-v2"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_MESON_GXL=y
@@ -41,7 +41,6 @@
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_SARADC_MESON=y
CONFIG_DFU_RAM=y
CONFIG_MMC_MESON_GX=y
CONFIG_MTD=y
diff --git a/configs/libretech-s905d-pc_defconfig b/configs/libretech-s905d-pc_defconfig
index a5dc311..0adc0af 100644
--- a/configs/libretech-s905d-pc_defconfig
+++ b/configs/libretech-s905d-pc_defconfig
@@ -9,7 +9,7 @@
CONFIG_ENV_OFFSET=0xFFFF0000
CONFIG_ENV_SECT_SIZE=0x10000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="meson-gxl-s905d-libretech-pc"
+CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-gxl-s905d-libretech-pc"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_MESON_GXL=y
diff --git a/configs/libretech-s912-pc_defconfig b/configs/libretech-s912-pc_defconfig
index 68f462e..cbce0cf 100644
--- a/configs/libretech-s912-pc_defconfig
+++ b/configs/libretech-s912-pc_defconfig
@@ -8,7 +8,7 @@
CONFIG_ENV_OFFSET=0xFFFF0000
CONFIG_ENV_SECT_SIZE=0x10000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="meson-gxm-s912-libretech-pc"
+CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-gxm-s912-libretech-pc"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_MESON_GXM=y
diff --git a/configs/linkit-smart-7688_defconfig b/configs/linkit-smart-7688_defconfig
index f218292..69494f5 100644
--- a/configs/linkit-smart-7688_defconfig
+++ b/configs/linkit-smart-7688_defconfig
@@ -10,6 +10,8 @@
CONFIG_DEFAULT_DEVICE_TREE="linkit-smart-7688"
CONFIG_SPL_SERIAL=y
CONFIG_SPL_SYS_MALLOC_F_LEN=0x40000
+CONFIG_SPL_BSS_START_ADDR=0x80010000
+CONFIG_SPL_BSS_MAX_SIZE=0x10000
CONFIG_SPL=y
CONFIG_SYS_LOAD_ADDR=0x80100000
CONFIG_ARCH_MTMIPS=y
@@ -33,8 +35,6 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SYS_MALLOC_BOOTPARAMS=y
CONFIG_SPL_MAX_SIZE=0x10000
-CONFIG_SPL_BSS_START_ADDR=0x80010000
-CONFIG_SPL_BSS_MAX_SIZE=0x10000
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_NOR_SUPPORT=y
CONFIG_HUSH_PARSER=y
diff --git a/configs/lion-rk3368_defconfig b/configs/lion-rk3368_defconfig
index 32d34bc..a4a7f1a 100644
--- a/configs/lion-rk3368_defconfig
+++ b/configs/lion-rk3368_defconfig
@@ -14,6 +14,11 @@
CONFIG_TPL_LIBGENERIC_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x188000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x400000
+CONFIG_SPL_BSS_MAX_SIZE=0x20000
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0xFF180000
CONFIG_DEBUG_UART_CLOCK=24000000
@@ -33,14 +38,9 @@
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SPL_MAX_SIZE=0x40000
CONFIG_SPL_PAD_TO=0x7f8000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x400000
-CONFIG_SPL_BSS_MAX_SIZE=0x20000
CONFIG_SPL_BOOTROM_SUPPORT=y
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
-CONFIG_SPL_STACK_R=y
-CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200
CONFIG_SPL_ATF=y
CONFIG_TPL=y
diff --git a/configs/ls1021aiot_sdcard_defconfig b/configs/ls1021aiot_sdcard_defconfig
index 7ea28bb..2354f41 100644
--- a/configs/ls1021aiot_sdcard_defconfig
+++ b/configs/ls1021aiot_sdcard_defconfig
@@ -18,6 +18,9 @@
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0x1001d000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x80100000
+CONFIG_SPL_BSS_MAX_SIZE=0x80000
CONFIG_SPL=y
CONFIG_SYS_LOAD_ADDR=0x82000000
CONFIG_PCI=y
@@ -41,9 +44,6 @@
CONFIG_ID_EEPROM=y
CONFIG_SPL_MAX_SIZE=0x1a000
CONFIG_SPL_PAD_TO=0x1c000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x80100000
-CONFIG_SPL_BSS_MAX_SIZE=0x80000
CONFIG_SPL_FSL_PBL=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_SYS_MALLOC=y
diff --git a/configs/ls1021aqds_nand_defconfig b/configs/ls1021aqds_nand_defconfig
index a45b4d9..136ca9a 100644
--- a/configs/ls1021aqds_nand_defconfig
+++ b/configs/ls1021aqds_nand_defconfig
@@ -20,6 +20,9 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x1001d000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x80100000
+CONFIG_SPL_BSS_MAX_SIZE=0x80000
CONFIG_SPL=y
CONFIG_SYS_LOAD_ADDR=0x82000000
CONFIG_PCI=y
@@ -52,9 +55,6 @@
CONFIG_ID_EEPROM=y
CONFIG_SPL_MAX_SIZE=0x1a000
CONFIG_SPL_PAD_TO=0x1c000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x80100000
-CONFIG_SPL_BSS_MAX_SIZE=0x80000
CONFIG_SPL_FSL_PBL=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_SYS_MALLOC=y
diff --git a/configs/ls1021aqds_sdcard_ifc_defconfig b/configs/ls1021aqds_sdcard_ifc_defconfig
index 9ab19f1..befb4ae 100644
--- a/configs/ls1021aqds_sdcard_ifc_defconfig
+++ b/configs/ls1021aqds_sdcard_ifc_defconfig
@@ -21,6 +21,9 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x1001d000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x80100000
+CONFIG_SPL_BSS_MAX_SIZE=0x80000
CONFIG_SPL=y
CONFIG_SYS_LOAD_ADDR=0x82000000
CONFIG_PCI=y
@@ -51,9 +54,6 @@
CONFIG_ID_EEPROM=y
CONFIG_SPL_MAX_SIZE=0x1a000
CONFIG_SPL_PAD_TO=0x1c000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x80100000
-CONFIG_SPL_BSS_MAX_SIZE=0x80000
CONFIG_SPL_FSL_PBL=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_SYS_MALLOC=y
diff --git a/configs/ls1021aqds_sdcard_qspi_defconfig b/configs/ls1021aqds_sdcard_qspi_defconfig
index 31496ee..db06a03 100644
--- a/configs/ls1021aqds_sdcard_qspi_defconfig
+++ b/configs/ls1021aqds_sdcard_qspi_defconfig
@@ -21,6 +21,9 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x1001d000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x80100000
+CONFIG_SPL_BSS_MAX_SIZE=0x80000
CONFIG_SPL=y
CONFIG_SYS_LOAD_ADDR=0x82000000
CONFIG_PCI=y
@@ -50,9 +53,6 @@
CONFIG_ID_EEPROM=y
CONFIG_SPL_MAX_SIZE=0x1a000
CONFIG_SPL_PAD_TO=0x1c000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x80100000
-CONFIG_SPL_BSS_MAX_SIZE=0x80000
CONFIG_SPL_FSL_PBL=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_SYS_MALLOC=y
diff --git a/configs/ls1021atsn_sdcard_defconfig b/configs/ls1021atsn_sdcard_defconfig
index e4b72d3..e5d8eeb 100644
--- a/configs/ls1021atsn_sdcard_defconfig
+++ b/configs/ls1021atsn_sdcard_defconfig
@@ -18,6 +18,9 @@
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0x1001d000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x80100000
+CONFIG_SPL_BSS_MAX_SIZE=0x80000
CONFIG_SPL=y
CONFIG_SYS_LOAD_ADDR=0x82000000
CONFIG_PCI=y
@@ -44,9 +47,6 @@
CONFIG_ID_EEPROM=y
CONFIG_SPL_MAX_SIZE=0x1a000
CONFIG_SPL_PAD_TO=0x1c000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x80100000
-CONFIG_SPL_BSS_MAX_SIZE=0x80000
CONFIG_SPL_FSL_PBL=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_SYS_MALLOC=y
diff --git a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig
index 148d030..dc0e507 100644
--- a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig
+++ b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig
@@ -20,6 +20,9 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x1001d000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x80100000
+CONFIG_SPL_BSS_MAX_SIZE=0x80000
CONFIG_SPL=y
CONFIG_SYS_LOAD_ADDR=0x82000000
CONFIG_PCI=y
@@ -52,9 +55,6 @@
CONFIG_SYS_EEPROM_BUS_NUM=1
CONFIG_SPL_MAX_SIZE=0x1a000
CONFIG_SPL_PAD_TO=0x1c000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x80100000
-CONFIG_SPL_BSS_MAX_SIZE=0x80000
CONFIG_SPL_FSL_PBL=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_SYS_MALLOC=y
diff --git a/configs/ls1021atwr_sdcard_ifc_defconfig b/configs/ls1021atwr_sdcard_ifc_defconfig
index b5a6ca5..9980d61 100644
--- a/configs/ls1021atwr_sdcard_ifc_defconfig
+++ b/configs/ls1021atwr_sdcard_ifc_defconfig
@@ -20,6 +20,9 @@
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0x1001d000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x80100000
+CONFIG_SPL_BSS_MAX_SIZE=0x80000
CONFIG_SPL=y
CONFIG_SYS_LOAD_ADDR=0x82000000
CONFIG_PCI=y
@@ -53,9 +56,6 @@
CONFIG_SYS_EEPROM_BUS_NUM=1
CONFIG_SPL_MAX_SIZE=0x1a000
CONFIG_SPL_PAD_TO=0x1c000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x80100000
-CONFIG_SPL_BSS_MAX_SIZE=0x80000
CONFIG_SPL_FSL_PBL=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_SYS_MALLOC=y
diff --git a/configs/ls1021atwr_sdcard_qspi_defconfig b/configs/ls1021atwr_sdcard_qspi_defconfig
index 41f7a0d..ed92e34 100644
--- a/configs/ls1021atwr_sdcard_qspi_defconfig
+++ b/configs/ls1021atwr_sdcard_qspi_defconfig
@@ -20,6 +20,9 @@
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0x1001d000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x80100000
+CONFIG_SPL_BSS_MAX_SIZE=0x80000
CONFIG_SPL=y
CONFIG_SYS_LOAD_ADDR=0x82000000
CONFIG_PCI=y
@@ -54,9 +57,6 @@
CONFIG_SYS_EEPROM_BUS_NUM=1
CONFIG_SPL_MAX_SIZE=0x1a000
CONFIG_SPL_PAD_TO=0x1c000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x80100000
-CONFIG_SPL_BSS_MAX_SIZE=0x80000
CONFIG_SPL_FSL_PBL=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_SYS_MALLOC=y
diff --git a/configs/ls2080aqds_nand_defconfig b/configs/ls2080aqds_nand_defconfig
index 3093f70..06e4154 100644
--- a/configs/ls2080aqds_nand_defconfig
+++ b/configs/ls2080aqds_nand_defconfig
@@ -18,6 +18,9 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x18009ff0
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x80100000
+CONFIG_SPL_BSS_MAX_SIZE=0x100000
CONFIG_SPL=y
CONFIG_PCI=y
CONFIG_AHCI=y
@@ -39,9 +42,6 @@
CONFIG_RESET_PHY_R=y
CONFIG_SPL_MAX_SIZE=0x16000
CONFIG_SPL_PAD_TO=0x20000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x80100000
-CONFIG_SPL_BSS_MAX_SIZE=0x100000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_ENV_SUPPORT=y
diff --git a/configs/ls2080ardb_nand_defconfig b/configs/ls2080ardb_nand_defconfig
index d335b33..f1009e1 100644
--- a/configs/ls2080ardb_nand_defconfig
+++ b/configs/ls2080ardb_nand_defconfig
@@ -18,6 +18,9 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x18009ff0
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x80100000
+CONFIG_SPL_BSS_MAX_SIZE=0x100000
CONFIG_SPL=y
CONFIG_PCI=y
CONFIG_AHCI=y
@@ -45,9 +48,6 @@
CONFIG_RESET_PHY_R=y
CONFIG_SPL_MAX_SIZE=0x16000
CONFIG_SPL_PAD_TO=0x80000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x80100000
-CONFIG_SPL_BSS_MAX_SIZE=0x100000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_ENV_SUPPORT=y
diff --git a/configs/lschlv2_defconfig b/configs/lschlv2_defconfig
index 99bdbc1..ad06007 100644
--- a/configs/lschlv2_defconfig
+++ b/configs/lschlv2_defconfig
@@ -15,7 +15,7 @@
CONFIG_ENV_OFFSET=0x70000
CONFIG_ENV_SECT_SIZE=0x10000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="kirkwood-lschlv2"
+CONFIG_DEFAULT_DEVICE_TREE="marvell/kirkwood-lschlv2"
CONFIG_IDENT_STRING=" LS-CHLv2"
CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_HAS_BOARD_SIZE_LIMIT=y
diff --git a/configs/lsxhl_defconfig b/configs/lsxhl_defconfig
index bb0a5dd..b2d9f0c 100644
--- a/configs/lsxhl_defconfig
+++ b/configs/lsxhl_defconfig
@@ -16,7 +16,7 @@
CONFIG_ENV_OFFSET=0x70000
CONFIG_ENV_SECT_SIZE=0x10000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="kirkwood-lsxhl"
+CONFIG_DEFAULT_DEVICE_TREE="marvell/kirkwood-lsxhl"
CONFIG_IDENT_STRING=" LS-XHL"
CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_HAS_BOARD_SIZE_LIMIT=y
diff --git a/configs/lubancat-2-rk3568_defconfig b/configs/lubancat-2-rk3568_defconfig
index 1c50a0c..ea67b6a 100644
--- a/configs/lubancat-2-rk3568_defconfig
+++ b/configs/lubancat-2-rk3568_defconfig
@@ -2,7 +2,6 @@
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_NR_DRAM_BANKS=2
CONFIG_DEFAULT_DEVICE_TREE="rk3568-lubancat-2"
CONFIG_ROCKCHIP_RK3568=y
CONFIG_SPL_SERIAL=y
diff --git a/configs/maxbcm_defconfig b/configs/maxbcm_defconfig
index 40be03c..9906099 100644
--- a/configs/maxbcm_defconfig
+++ b/configs/maxbcm_defconfig
@@ -15,6 +15,9 @@
CONFIG_SPL_TEXT_BASE=0x40004030
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0x4002c000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x40020000
+CONFIG_SPL_BSS_MAX_SIZE=0x4000
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0xf1012000
CONFIG_DEBUG_UART_CLOCK=250000000
@@ -26,9 +29,6 @@
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SPL_MAX_SIZE=0x1bfd0
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x40020000
-CONFIG_SPL_BSS_MAX_SIZE=0x4000
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_I2C=y
diff --git a/configs/milkv_duo_defconfig b/configs/milkv_duo_defconfig
index 548adf1..0cb2922 100644
--- a/configs/milkv_duo_defconfig
+++ b/configs/milkv_duo_defconfig
@@ -17,6 +17,26 @@
CONFIG_SYS_PBSIZE=544
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="milkv_duo# "
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PART=y
+CONFIG_CMD_POWEROFF=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_PXE=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
CONFIG_ENV_OVERWRITE=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_MMC=y
+CONFIG_MMC_IO_VOLTAGE=y
+CONFIG_MMC_UHS_SUPPORT=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_ADMA=y
+CONFIG_MMC_SDHCI_CV1800B=y
+CONFIG_ETH_DESIGNWARE=y
CONFIG_SYS_NS16550=y
CONFIG_SYS_NS16550_MEM32=y
+CONFIG_SYSRESET=y
+CONFIG_SYSRESET_CV1800B=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI=y
+CONFIG_CV1800B_SPIF=y
diff --git a/configs/miqi-rk3288_defconfig b/configs/miqi-rk3288_defconfig
index 374d21e..9e653c7 100644
--- a/configs/miqi-rk3288_defconfig
+++ b/configs/miqi-rk3288_defconfig
@@ -17,6 +17,8 @@
CONFIG_TARGET_MIQI_RK3288=y
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_SPL_STACK=0xff718000
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
CONFIG_DEBUG_UART_BASE=0xff690000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x800800
@@ -30,8 +32,6 @@
CONFIG_SPL_PAD_TO=0x7f8000
CONFIG_SPL_NO_BSS_LIMIT=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
-CONFIG_SPL_STACK_R=y
-CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
diff --git a/configs/mk808_defconfig b/configs/mk808_defconfig
index cc3906f..9a342d3 100644
--- a/configs/mk808_defconfig
+++ b/configs/mk808_defconfig
@@ -24,6 +24,8 @@
CONFIG_TARGET_MK808=y
CONFIG_SPL_STACK_R_ADDR=0x70000000
CONFIG_SPL_STACK=0x1008ffff
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x200000
CONFIG_DEBUG_UART_BASE=0x20064000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SPL_FS_FAT=y
@@ -43,8 +45,6 @@
CONFIG_SPL_PAD_TO=0x7f8000
CONFIG_SPL_NO_BSS_LIMIT=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
-CONFIG_SPL_STACK_R=y
-CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x200000
CONFIG_SPL_SEPARATE_BSS=y
CONFIG_SPL_FS_EXT4=y
CONFIG_SYS_MMCSD_FS_BOOT_PARTITION=2
diff --git a/configs/msc_sm2s_imx8mp_defconfig b/configs/msc_sm2s_imx8mp_defconfig
index 88b97ad..dc5a45f 100644
--- a/configs/msc_sm2s_imx8mp_defconfig
+++ b/configs/msc_sm2s_imx8mp_defconfig
@@ -16,6 +16,9 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x960000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x0098FC00
+CONFIG_SPL_BSS_MAX_SIZE=0x400
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x204000
CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000
@@ -32,9 +35,6 @@
CONFIG_SYS_CBSIZE=2048
CONFIG_SYS_PBSIZE=2074
CONFIG_SPL_MAX_SIZE=0x26000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x0098FC00
-CONFIG_SPL_BSS_MAX_SIZE=0x400
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_BOOTROM_SUPPORT=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
diff --git a/configs/mt7620_mt7530_rfb_defconfig b/configs/mt7620_mt7530_rfb_defconfig
index 6dc7c22..20f62fa 100644
--- a/configs/mt7620_mt7530_rfb_defconfig
+++ b/configs/mt7620_mt7530_rfb_defconfig
@@ -10,6 +10,8 @@
CONFIG_DEFAULT_DEVICE_TREE="mediatek,mt7620-mt7530-rfb"
CONFIG_SPL_SERIAL=y
CONFIG_SPL_SYS_MALLOC_F_LEN=0x40000
+CONFIG_SPL_BSS_START_ADDR=0x80010000
+CONFIG_SPL_BSS_MAX_SIZE=0x10000
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0xb0000c00
CONFIG_DEBUG_UART_CLOCK=40000000
@@ -27,8 +29,6 @@
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
CONFIG_SYS_MALLOC_BOOTPARAMS=y
CONFIG_SPL_MAX_SIZE=0x10000
-CONFIG_SPL_BSS_START_ADDR=0x80010000
-CONFIG_SPL_BSS_MAX_SIZE=0x10000
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_NOR_SUPPORT=y
# CONFIG_CMD_ELF is not set
diff --git a/configs/mt7620_rfb_defconfig b/configs/mt7620_rfb_defconfig
index b17b2cd..bf9d711 100644
--- a/configs/mt7620_rfb_defconfig
+++ b/configs/mt7620_rfb_defconfig
@@ -10,6 +10,8 @@
CONFIG_DEFAULT_DEVICE_TREE="mediatek,mt7620-rfb"
CONFIG_SPL_SERIAL=y
CONFIG_SPL_SYS_MALLOC_F_LEN=0x40000
+CONFIG_SPL_BSS_START_ADDR=0x80010000
+CONFIG_SPL_BSS_MAX_SIZE=0x10000
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0xb0000c00
CONFIG_DEBUG_UART_CLOCK=40000000
@@ -26,8 +28,6 @@
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
CONFIG_SYS_MALLOC_BOOTPARAMS=y
CONFIG_SPL_MAX_SIZE=0x10000
-CONFIG_SPL_BSS_START_ADDR=0x80010000
-CONFIG_SPL_BSS_MAX_SIZE=0x10000
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_NOR_SUPPORT=y
# CONFIG_CMD_ELF is not set
diff --git a/configs/mt7621_nand_rfb_defconfig b/configs/mt7621_nand_rfb_defconfig
index 7f0a24b..7e12c04 100644
--- a/configs/mt7621_nand_rfb_defconfig
+++ b/configs/mt7621_nand_rfb_defconfig
@@ -8,6 +8,8 @@
CONFIG_DEFAULT_DEVICE_TREE="mediatek,mt7621-nand-rfb"
CONFIG_SPL_SERIAL=y
CONFIG_SPL_SYS_MALLOC_F_LEN=0x100000
+CONFIG_SPL_BSS_START_ADDR=0x80140000
+CONFIG_SPL_BSS_MAX_SIZE=0x80000
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0xbe000c00
CONFIG_DEBUG_UART_CLOCK=50000000
@@ -27,8 +29,6 @@
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_SPL_MAX_SIZE=0x30000
-CONFIG_SPL_BSS_START_ADDR=0x80140000
-CONFIG_SPL_BSS_MAX_SIZE=0x80000
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_SPL_NAND_BASE=y
diff --git a/configs/mt7621_rfb_defconfig b/configs/mt7621_rfb_defconfig
index 43d00d3..ec5996a 100644
--- a/configs/mt7621_rfb_defconfig
+++ b/configs/mt7621_rfb_defconfig
@@ -10,6 +10,8 @@
CONFIG_SPL_SERIAL=y
CONFIG_TPL_SYS_MALLOC_F_LEN=0x1000
CONFIG_SPL_SYS_MALLOC_F_LEN=0x40000
+CONFIG_SPL_BSS_START_ADDR=0x80140000
+CONFIG_SPL_BSS_MAX_SIZE=0x80000
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0xbe000c00
CONFIG_DEBUG_UART_CLOCK=50000000
@@ -27,8 +29,6 @@
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_SPL_MAX_SIZE=0x30000
-CONFIG_SPL_BSS_START_ADDR=0x80140000
-CONFIG_SPL_BSS_MAX_SIZE=0x80000
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_NOR_SUPPORT=y
CONFIG_TPL=y
diff --git a/configs/mt7628_rfb_defconfig b/configs/mt7628_rfb_defconfig
index 85b32a7..351e6a1 100644
--- a/configs/mt7628_rfb_defconfig
+++ b/configs/mt7628_rfb_defconfig
@@ -10,6 +10,8 @@
CONFIG_DEFAULT_DEVICE_TREE="mediatek,mt7628-rfb"
CONFIG_SPL_SERIAL=y
CONFIG_SPL_SYS_MALLOC_F_LEN=0x40000
+CONFIG_SPL_BSS_START_ADDR=0x80010000
+CONFIG_SPL_BSS_MAX_SIZE=0x10000
CONFIG_SPL=y
CONFIG_SYS_LOAD_ADDR=0x80010000
CONFIG_ARCH_MTMIPS=y
@@ -26,8 +28,6 @@
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_SYS_MALLOC_BOOTPARAMS=y
CONFIG_SPL_MAX_SIZE=0x10000
-CONFIG_SPL_BSS_START_ADDR=0x80010000
-CONFIG_SPL_BSS_MAX_SIZE=0x10000
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_NOR_SUPPORT=y
# CONFIG_CMD_ELF is not set
diff --git a/configs/mt7629_rfb_defconfig b/configs/mt7629_rfb_defconfig
index 7868b02..bccbbcc 100644
--- a/configs/mt7629_rfb_defconfig
+++ b/configs/mt7629_rfb_defconfig
@@ -16,6 +16,7 @@
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x40800000
CONFIG_SPL_STACK=0x106000
+CONFIG_SPL_STACK_R=y
CONFIG_SYS_LOAD_ADDR=0x42007f1c
CONFIG_SPL_PAYLOAD="u-boot-lzma.img"
CONFIG_BUILD_TARGET="u-boot-mtk.bin"
@@ -33,7 +34,6 @@
CONFIG_SPL_MAX_FOOTPRINT=0x10000
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
-CONFIG_SPL_STACK_R=y
CONFIG_SPL_NOR_SUPPORT=y
CONFIG_SPL_WATCHDOG=y
CONFIG_HUSH_PARSER=y
diff --git a/configs/mx6cuboxi_defconfig b/configs/mx6cuboxi_defconfig
index 27ceb22..e3aba71 100644
--- a/configs/mx6cuboxi_defconfig
+++ b/configs/mx6cuboxi_defconfig
@@ -28,6 +28,7 @@
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="if hdmidet; then usb start; setenv stdin serial,usbkbd; setenv stdout serial,vidconsole; setenv stderr serial,vidconsole; else setenv stdin serial; setenv stdout serial; setenv stderr serial; fi;"
CONFIG_SYS_PBSIZE=532
+# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_FS_EXT4=y
diff --git a/configs/n2350_defconfig b/configs/n2350_defconfig
index fde14f0..5e13d2c 100644
--- a/configs/n2350_defconfig
+++ b/configs/n2350_defconfig
@@ -20,6 +20,9 @@
CONFIG_SPL_TEXT_BASE=0x40000030
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0x4002c000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x40023000
+CONFIG_SPL_BSS_MAX_SIZE=0x4000
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0xf1012000
CONFIG_DEBUG_UART_CLOCK=250000000
@@ -36,9 +39,6 @@
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SPL_MAX_SIZE=0x22fd0
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x40023000
-CONFIG_SPL_BSS_MAX_SIZE=0x4000
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_I2C=y
diff --git a/configs/nanopc-t6-rk3588_defconfig b/configs/nanopc-t6-rk3588_defconfig
index 5c7bc0b..738dda0 100644
--- a/configs/nanopc-t6-rk3588_defconfig
+++ b/configs/nanopc-t6-rk3588_defconfig
@@ -3,7 +3,6 @@
CONFIG_SYS_HAS_NONCACHED_MEMORY=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_NR_DRAM_BANKS=2
CONFIG_SF_DEFAULT_SPEED=24000000
CONFIG_SF_DEFAULT_MODE=0x2000
CONFIG_DEFAULT_DEVICE_TREE="rk3588-nanopc-t6"
@@ -23,7 +22,6 @@
CONFIG_SPL_FIT_SIGNATURE=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_LEGACY_IMAGE_FORMAT=y
-CONFIG_OF_BOARD_SETUP=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-nanopc-t6.dtb"
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
diff --git a/configs/nanopi-r5c-rk3568_defconfig b/configs/nanopi-r5c-rk3568_defconfig
index 0f1a946..00743b7 100644
--- a/configs/nanopi-r5c-rk3568_defconfig
+++ b/configs/nanopi-r5c-rk3568_defconfig
@@ -3,7 +3,6 @@
CONFIG_SYS_HAS_NONCACHED_MEMORY=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_NR_DRAM_BANKS=2
CONFIG_DEFAULT_DEVICE_TREE="rk3568-nanopi-r5c"
CONFIG_ROCKCHIP_RK3568=y
CONFIG_SPL_SERIAL=y
diff --git a/configs/nanopi-r5s-rk3568_defconfig b/configs/nanopi-r5s-rk3568_defconfig
index 4ebf0cc..91e3a19 100644
--- a/configs/nanopi-r5s-rk3568_defconfig
+++ b/configs/nanopi-r5s-rk3568_defconfig
@@ -3,7 +3,6 @@
CONFIG_SYS_HAS_NONCACHED_MEMORY=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_NR_DRAM_BANKS=2
CONFIG_DEFAULT_DEVICE_TREE="rk3568-nanopi-r5s"
CONFIG_ROCKCHIP_RK3568=y
CONFIG_SPL_SERIAL=y
diff --git a/configs/nas220_defconfig b/configs/nas220_defconfig
index f01b26f..4ea342a 100644
--- a/configs/nas220_defconfig
+++ b/configs/nas220_defconfig
@@ -10,7 +10,7 @@
CONFIG_TARGET_NAS220=y
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0xA0000
-CONFIG_DEFAULT_DEVICE_TREE="kirkwood-blackarmor-nas220"
+CONFIG_DEFAULT_DEVICE_TREE="marvell/kirkwood-blackarmor-nas220"
CONFIG_IDENT_STRING="\nNAS 220"
CONFIG_SYS_LOAD_ADDR=0x800000
# CONFIG_SYS_MALLOC_F is not set
diff --git a/configs/net2big_v2_defconfig b/configs/net2big_v2_defconfig
index dda627a..39cbc33 100644
--- a/configs/net2big_v2_defconfig
+++ b/configs/net2big_v2_defconfig
@@ -12,7 +12,7 @@
CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_OFFSET=0x70000
CONFIG_ENV_SECT_SIZE=0x10000
-CONFIG_DEFAULT_DEVICE_TREE="kirkwood-net2big"
+CONFIG_DEFAULT_DEVICE_TREE="marvell/kirkwood-net2big"
CONFIG_IDENT_STRING=" 2Big v2"
CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_ENV_ADDR=0x70000
diff --git a/configs/netspace_lite_v2_defconfig b/configs/netspace_lite_v2_defconfig
index 742e620..cd416cb 100644
--- a/configs/netspace_lite_v2_defconfig
+++ b/configs/netspace_lite_v2_defconfig
@@ -12,7 +12,7 @@
CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_OFFSET=0x70000
CONFIG_ENV_SECT_SIZE=0x10000
-CONFIG_DEFAULT_DEVICE_TREE="kirkwood-ns2lite"
+CONFIG_DEFAULT_DEVICE_TREE="marvell/kirkwood-ns2lite"
CONFIG_IDENT_STRING=" NS v2 Lite"
CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_ENV_ADDR=0x70000
diff --git a/configs/netspace_max_v2_defconfig b/configs/netspace_max_v2_defconfig
index 7779e68..6a3d929 100644
--- a/configs/netspace_max_v2_defconfig
+++ b/configs/netspace_max_v2_defconfig
@@ -12,7 +12,7 @@
CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_OFFSET=0x70000
CONFIG_ENV_SECT_SIZE=0x10000
-CONFIG_DEFAULT_DEVICE_TREE="kirkwood-ns2max"
+CONFIG_DEFAULT_DEVICE_TREE="marvell/kirkwood-ns2max"
CONFIG_IDENT_STRING=" NS Max v2"
CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_ENV_ADDR=0x70000
diff --git a/configs/netspace_mini_v2_defconfig b/configs/netspace_mini_v2_defconfig
index 9e3614b..e25631b 100644
--- a/configs/netspace_mini_v2_defconfig
+++ b/configs/netspace_mini_v2_defconfig
@@ -12,7 +12,7 @@
CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_OFFSET=0x70000
CONFIG_ENV_SECT_SIZE=0x10000
-CONFIG_DEFAULT_DEVICE_TREE="kirkwood-ns2mini"
+CONFIG_DEFAULT_DEVICE_TREE="marvell/kirkwood-ns2mini"
CONFIG_IDENT_STRING=" NS v2 Mini"
CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_ENV_ADDR=0x70000
diff --git a/configs/netspace_v2_defconfig b/configs/netspace_v2_defconfig
index 1583a0a..b6ac2a8 100644
--- a/configs/netspace_v2_defconfig
+++ b/configs/netspace_v2_defconfig
@@ -12,7 +12,7 @@
CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_OFFSET=0x70000
CONFIG_ENV_SECT_SIZE=0x10000
-CONFIG_DEFAULT_DEVICE_TREE="kirkwood-ns2"
+CONFIG_DEFAULT_DEVICE_TREE="marvell/kirkwood-ns2"
CONFIG_IDENT_STRING=" NS v2"
CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_ENV_ADDR=0x70000
diff --git a/configs/neu6a-io-rk3588_defconfig b/configs/neu6a-io-rk3588_defconfig
index 307a540..5619855 100644
--- a/configs/neu6a-io-rk3588_defconfig
+++ b/configs/neu6a-io-rk3588_defconfig
@@ -2,7 +2,6 @@
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_NR_DRAM_BANKS=2
CONFIG_DEFAULT_DEVICE_TREE="rk3588-edgeble-neu6a-io"
CONFIG_ROCKCHIP_RK3588=y
CONFIG_SPL_SERIAL=y
@@ -13,11 +12,13 @@
CONFIG_DEBUG_UART=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_FIT_SIGNATURE=y
CONFIG_SPL_LOAD_FIT=y
+CONFIG_LEGACY_IMAGE_FORMAT=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-edgeble-neu6a-io.dtb"
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
-CONFIG_SPL_MAX_SIZE=0x20000
+CONFIG_SPL_MAX_SIZE=0x40000
CONFIG_SPL_PAD_TO=0x7f8000
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
CONFIG_SPL_ATF=y
@@ -28,6 +29,7 @@
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_LIVE=y
CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SPL_REGMAP=y
CONFIG_SPL_SYSCON=y
CONFIG_SPL_CLK=y
@@ -40,10 +42,11 @@
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_ROCKCHIP=y
-CONFIG_REGULATOR_PWM=y
+CONFIG_SPL_PINCTRL=y
CONFIG_PWM_ROCKCHIP=y
CONFIG_SPL_RAM=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSRESET=y
CONFIG_ERRNO_STR=y
diff --git a/configs/neu6b-io-rk3588_defconfig b/configs/neu6b-io-rk3588_defconfig
index 9ef2bb2..40baec3 100644
--- a/configs/neu6b-io-rk3588_defconfig
+++ b/configs/neu6b-io-rk3588_defconfig
@@ -2,7 +2,6 @@
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_NR_DRAM_BANKS=2
CONFIG_DEFAULT_DEVICE_TREE="rk3588-edgeble-neu6b-io"
CONFIG_ROCKCHIP_RK3588=y
CONFIG_SPL_SERIAL=y
@@ -13,11 +12,13 @@
CONFIG_DEBUG_UART=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_FIT_SIGNATURE=y
CONFIG_SPL_LOAD_FIT=y
+CONFIG_LEGACY_IMAGE_FORMAT=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-edgeble-neu6b-io.dtb"
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
-CONFIG_SPL_MAX_SIZE=0x20000
+CONFIG_SPL_MAX_SIZE=0x40000
CONFIG_SPL_PAD_TO=0x7f8000
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
CONFIG_SPL_ATF=y
@@ -28,6 +29,7 @@
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_LIVE=y
CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SPL_REGMAP=y
CONFIG_SPL_SYSCON=y
CONFIG_SPL_CLK=y
@@ -40,10 +42,11 @@
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_ROCKCHIP=y
-CONFIG_REGULATOR_PWM=y
+CONFIG_SPL_PINCTRL=y
CONFIG_PWM_ROCKCHIP=y
CONFIG_SPL_RAM=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSRESET=y
CONFIG_ERRNO_STR=y
diff --git a/configs/nsa310s_defconfig b/configs/nsa310s_defconfig
index 89d8b18..e859a43 100644
--- a/configs/nsa310s_defconfig
+++ b/configs/nsa310s_defconfig
@@ -13,7 +13,7 @@
CONFIG_TARGET_NSA310S=y
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0xE0000
-CONFIG_DEFAULT_DEVICE_TREE="kirkwood-nsa310s"
+CONFIG_DEFAULT_DEVICE_TREE="marvell/kirkwood-nsa310s"
CONFIG_DEBUG_UART_BASE=0xf1012000
CONFIG_DEBUG_UART_CLOCK=166666667
CONFIG_IDENT_STRING="\nZyXEL NSA310S/320S 1/2-Bay Power Media Server"
diff --git a/configs/nsa325_defconfig b/configs/nsa325_defconfig
index 5da4a00..88a8900 100644
--- a/configs/nsa325_defconfig
+++ b/configs/nsa325_defconfig
@@ -13,7 +13,7 @@
CONFIG_TARGET_NSA325=y
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0xC0000
-CONFIG_DEFAULT_DEVICE_TREE="kirkwood-nsa325"
+CONFIG_DEFAULT_DEVICE_TREE="marvell/kirkwood-nsa325"
CONFIG_IDENT_STRING="\nZyXEL NSA325 2-Bay Power Media Server"
CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_PCI=y
diff --git a/configs/odroid-c4_defconfig b/configs/odroid-c4_defconfig
index fe1f861..4ef1e68 100644
--- a/configs/odroid-c4_defconfig
+++ b/configs/odroid-c4_defconfig
@@ -7,7 +7,7 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="meson-sm1-odroid-c4"
+CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-sm1-odroid-c4"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_MESON_G12A=y
diff --git a/configs/odroid-go-ultra_defconfig b/configs/odroid-go-ultra_defconfig
index 49d628b..06437fe 100644
--- a/configs/odroid-go-ultra_defconfig
+++ b/configs/odroid-go-ultra_defconfig
@@ -7,7 +7,7 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="meson-g12b-odroid-go-ultra"
+CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-g12b-odroid-go-ultra"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_MESON_G12A=y
diff --git a/configs/odroid-go2_defconfig b/configs/odroid-go2_defconfig
index eb759e0..99d7149 100644
--- a/configs/odroid-go2_defconfig
+++ b/configs/odroid-go2_defconfig
@@ -19,9 +19,13 @@
CONFIG_DEBUG_UART_CHANNEL=1
CONFIG_TPL_LIBGENERIC_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC=y
+CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
CONFIG_SPL_STACK_R_ADDR=0x600000
CONFIG_SPL_STACK=0x400000
-CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x4000000
+CONFIG_SPL_BSS_MAX_SIZE=0x4000
+CONFIG_SPL_STACK_R=y
CONFIG_DEBUG_UART_BASE=0xFF160000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x800800
@@ -39,13 +43,9 @@
CONFIG_MISC_INIT_R=y
CONFIG_SPL_MAX_SIZE=0x20000
CONFIG_SPL_PAD_TO=0x7f8000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x4000000
-CONFIG_SPL_BSS_MAX_SIZE=0x4000
CONFIG_SPL_BOOTROM_SUPPORT=y
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
-CONFIG_SPL_STACK_R=y
CONFIG_SPL_I2C=y
CONFIG_SPL_POWER=y
CONFIG_SPL_ATF=y
diff --git a/configs/odroid-hc4_defconfig b/configs/odroid-hc4_defconfig
index 7720ab5..60233fb 100644
--- a/configs/odroid-hc4_defconfig
+++ b/configs/odroid-hc4_defconfig
@@ -7,7 +7,7 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="meson-sm1-odroid-hc4"
+CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-sm1-odroid-hc4"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_MESON_G12A=y
diff --git a/configs/odroid-m1-rk3568_defconfig b/configs/odroid-m1-rk3568_defconfig
index b5ed9e4..e749f9a 100644
--- a/configs/odroid-m1-rk3568_defconfig
+++ b/configs/odroid-m1-rk3568_defconfig
@@ -2,7 +2,6 @@
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_NR_DRAM_BANKS=2
CONFIG_SF_DEFAULT_SPEED=24000000
CONFIG_SF_DEFAULT_MODE=0x1000
CONFIG_DEFAULT_DEVICE_TREE="rk3568-odroid-m1"
diff --git a/configs/odroid-n2_defconfig b/configs/odroid-n2_defconfig
index 9694f04..a4cc766 100644
--- a/configs/odroid-n2_defconfig
+++ b/configs/odroid-n2_defconfig
@@ -7,7 +7,7 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="meson-g12b-odroid-n2"
+CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-g12b-odroid-n2"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_MESON_G12A=y
diff --git a/configs/odroid-n2l_defconfig b/configs/odroid-n2l_defconfig
index 673e0cf..3f657d1 100644
--- a/configs/odroid-n2l_defconfig
+++ b/configs/odroid-n2l_defconfig
@@ -7,7 +7,7 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="meson-g12b-odroid-n2l"
+CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-g12b-odroid-n2l"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_MESON_G12A=y
diff --git a/configs/omapl138_lcdk_defconfig b/configs/omapl138_lcdk_defconfig
index c7483b8..947a6c6 100644
--- a/configs/omapl138_lcdk_defconfig
+++ b/configs/omapl138_lcdk_defconfig
@@ -23,6 +23,8 @@
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0x8001ff00
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0xc0000000
CONFIG_SPL=y
CONFIG_SYS_LOAD_ADDR=0xc0700000
CONFIG_DYNAMIC_SYS_CLK_FREQ=y
@@ -35,8 +37,6 @@
CONFIG_CLOCKS=y
CONFIG_MISC_INIT_R=y
CONFIG_SPL_PAD_TO=0x8000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0xc0000000
CONFIG_SPL_FOOTPRINT_LIMIT=y
CONFIG_SPL_MAX_FOOTPRINT=0x8000
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
diff --git a/configs/openpiton_riscv64_spl_defconfig b/configs/openpiton_riscv64_spl_defconfig
index 12b423f..a08040d 100644
--- a/configs/openpiton_riscv64_spl_defconfig
+++ b/configs/openpiton_riscv64_spl_defconfig
@@ -8,6 +8,7 @@
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_SPL_STACK=0x83fffe80
CONFIG_SPL_SYS_MALLOC_F_LEN=0x100000
+CONFIG_SPL_BSS_START_ADDR=0x82000000
CONFIG_SPL=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SYS_LOAD_ADDR=0x87000000
@@ -28,7 +29,6 @@
CONFIG_SYS_CBSIZE=256
CONFIG_SYS_PBSIZE=284
CONFIG_SPL_MAX_SIZE=0x100000
-CONFIG_SPL_BSS_START_ADDR=0x82000000
# CONFIG_SPL_LEGACY_IMAGE_FORMAT is not set
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
diff --git a/configs/openrd_base_defconfig b/configs/openrd_base_defconfig
index 29a14e0..057dd28 100644
--- a/configs/openrd_base_defconfig
+++ b/configs/openrd_base_defconfig
@@ -11,7 +11,7 @@
CONFIG_TARGET_OPENRD=y
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0x80000
-CONFIG_DEFAULT_DEVICE_TREE="kirkwood-openrd-base"
+CONFIG_DEFAULT_DEVICE_TREE="marvell/kirkwood-openrd-base"
CONFIG_IDENT_STRING="\nOpenRD-Base"
CONFIG_SYS_LOAD_ADDR=0x800000
# CONFIG_SYS_MALLOC_F is not set
diff --git a/configs/openrd_client_defconfig b/configs/openrd_client_defconfig
index a95a435..05e4292 100644
--- a/configs/openrd_client_defconfig
+++ b/configs/openrd_client_defconfig
@@ -12,7 +12,7 @@
CONFIG_BOARD_IS_OPENRD_CLIENT=y
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0x80000
-CONFIG_DEFAULT_DEVICE_TREE="kirkwood-openrd-client"
+CONFIG_DEFAULT_DEVICE_TREE="marvell/kirkwood-openrd-client"
CONFIG_IDENT_STRING="\nOpenRD-Client"
CONFIG_SYS_LOAD_ADDR=0x800000
# CONFIG_SYS_MALLOC_F is not set
diff --git a/configs/openrd_ultimate_defconfig b/configs/openrd_ultimate_defconfig
index e3f5294..6e13c6e 100644
--- a/configs/openrd_ultimate_defconfig
+++ b/configs/openrd_ultimate_defconfig
@@ -12,7 +12,7 @@
CONFIG_BOARD_IS_OPENRD_ULTIMATE=y
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0x80000
-CONFIG_DEFAULT_DEVICE_TREE="kirkwood-openrd-ultimate"
+CONFIG_DEFAULT_DEVICE_TREE="marvell/kirkwood-openrd-ultimate"
CONFIG_IDENT_STRING="\nOpenRD-Ultimate"
CONFIG_SYS_LOAD_ADDR=0x800000
# CONFIG_SYS_MALLOC_F is not set
diff --git a/configs/orangepi-5-plus-rk3588_defconfig b/configs/orangepi-5-plus-rk3588_defconfig
index d6e23c1..ba80053 100644
--- a/configs/orangepi-5-plus-rk3588_defconfig
+++ b/configs/orangepi-5-plus-rk3588_defconfig
@@ -3,7 +3,6 @@
CONFIG_SYS_HAS_NONCACHED_MEMORY=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_NR_DRAM_BANKS=2
CONFIG_SF_DEFAULT_SPEED=24000000
CONFIG_SF_DEFAULT_MODE=0x2000
CONFIG_DEFAULT_DEVICE_TREE="rk3588-orangepi-5-plus"
@@ -24,7 +23,6 @@
CONFIG_SPL_FIT_SIGNATURE=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_LEGACY_IMAGE_FORMAT=y
-CONFIG_OF_BOARD_SETUP=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-orangepi-5-plus.dtb"
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
diff --git a/configs/orangepi-5-rk3588s_defconfig b/configs/orangepi-5-rk3588s_defconfig
index e6b3da1..d61f85a 100644
--- a/configs/orangepi-5-rk3588s_defconfig
+++ b/configs/orangepi-5-rk3588s_defconfig
@@ -2,7 +2,6 @@
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_NR_DRAM_BANKS=2
CONFIG_SF_DEFAULT_SPEED=24000000
CONFIG_SF_DEFAULT_MODE=0x2000
CONFIG_DEFAULT_DEVICE_TREE="rk3588s-orangepi-5"
@@ -23,7 +22,6 @@
CONFIG_SPL_FIT_SIGNATURE=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_LEGACY_IMAGE_FORMAT=y
-CONFIG_OF_BOARD_SETUP=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588s-orangepi-5.dtb"
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
diff --git a/configs/p212_defconfig b/configs/p212_defconfig
index 6b73607..9cf22ca 100644
--- a/configs/p212_defconfig
+++ b/configs/p212_defconfig
@@ -6,7 +6,7 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="meson-gxl-s905x-p212"
+CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-gxl-s905x-p212"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_MESON_GXL=y
diff --git a/configs/paz00_defconfig b/configs/paz00_defconfig
index 5c1c47e..4f0725f 100644
--- a/configs/paz00_defconfig
+++ b/configs/paz00_defconfig
@@ -35,6 +35,7 @@
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_MMC_ENV_PART=2
+CONFIG_SYS_I2C_TEGRA=y
CONFIG_DM_PMIC=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
diff --git a/configs/phycore-imx8mm_defconfig b/configs/phycore-imx8mm_defconfig
index 19d6aa8..22d4190 100644
--- a/configs/phycore-imx8mm_defconfig
+++ b/configs/phycore-imx8mm_defconfig
@@ -17,6 +17,9 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x920000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x910000
+CONFIG_SPL_BSS_MAX_SIZE=0x2000
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x3E0000
CONFIG_SYS_LOAD_ADDR=0x40480000
@@ -30,9 +33,6 @@
CONFIG_SYS_CBSIZE=2048
CONFIG_SYS_PBSIZE=2074
CONFIG_BOARD_LATE_INIT=y
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x910000
-CONFIG_SPL_BSS_MAX_SIZE=0x2000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
diff --git a/configs/phycore-imx8mp_defconfig b/configs/phycore-imx8mp_defconfig
index 6c67f14..e9a287c 100644
--- a/configs/phycore-imx8mp_defconfig
+++ b/configs/phycore-imx8mp_defconfig
@@ -18,6 +18,9 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x960000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x98fc00
+CONFIG_SPL_BSS_MAX_SIZE=0x400
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x3e0000
CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000
@@ -31,9 +34,6 @@
CONFIG_SYS_PBSIZE=2074
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_MAX_SIZE=0x26000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x98fc00
-CONFIG_SPL_BSS_MAX_SIZE=0x400
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_BOOTROM_SUPPORT=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
diff --git a/configs/phycore-rk3288_defconfig b/configs/phycore-rk3288_defconfig
index ce999e4..87b259b 100644
--- a/configs/phycore-rk3288_defconfig
+++ b/configs/phycore-rk3288_defconfig
@@ -8,7 +8,7 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000
CONFIG_SF_DEFAULT_SPEED=20000000
CONFIG_ENV_OFFSET=0x3F8000
-CONFIG_DEFAULT_DEVICE_TREE="rk3288-phycore-rdk"
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3288-phycore-rdk"
CONFIG_SPL_TEXT_BASE=0xff704000
CONFIG_SYS_MONITOR_LEN=614400
CONFIG_ROCKCHIP_RK3288=y
@@ -16,6 +16,8 @@
CONFIG_TARGET_PHYCORE_RK3288=y
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_SPL_STACK=0xff718000
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
CONFIG_DEBUG_UART_BASE=0xff690000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x800800
@@ -31,8 +33,6 @@
CONFIG_SPL_PAD_TO=0x7f8000
CONFIG_SPL_NO_BSS_LIMIT=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
-CONFIG_SPL_STACK_R=y
-CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
@@ -48,6 +48,7 @@
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_UPSTREAM=y
CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
diff --git a/configs/phycore_am62x_a53_defconfig b/configs/phycore_am62x_a53_defconfig
index 552b7e9..fd36edc 100644
--- a/configs/phycore_am62x_a53_defconfig
+++ b/configs/phycore_am62x_a53_defconfig
@@ -12,13 +12,17 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xFFFFD000
CONFIG_SPL_DM_SPI=y
-CONFIG_DEFAULT_DEVICE_TREE="k3-am625-phyboard-lyra-rdk"
+CONFIG_DEFAULT_DEVICE_TREE="ti/k3-am625-phyboard-lyra-rdk"
CONFIG_SPL_TEXT_BASE=0x80080000
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x80c80000
+CONFIG_SPL_BSS_MAX_SIZE=0x80000
+CONFIG_SPL_STACK_R=y
CONFIG_SPL_SIZE_LIMIT=0x40000
CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x800
CONFIG_SPL_FS_FAT=y
@@ -33,13 +37,10 @@
CONFIG_SYS_BOOTM_LEN=0x800000
CONFIG_BOOTCOMMAND="run mmcboot; bootflow scan -lb"
CONFIG_DEFAULT_FDT_FILE="oftree"
+CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_MAX_SIZE=0x58000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x80c80000
-CONFIG_SPL_BSS_MAX_SIZE=0x80000
CONFIG_SPL_SYS_REPORT_STACK_F_USAGE=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
-CONFIG_SPL_STACK_R=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1400
CONFIG_SPL_ENV_SUPPORT=y
diff --git a/configs/phycore_am62x_r5_defconfig b/configs/phycore_am62x_r5_defconfig
index bd28e14..389672d 100644
--- a/configs/phycore_am62x_r5_defconfig
+++ b/configs/phycore_am62x_r5_defconfig
@@ -22,6 +22,11 @@
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_SPL_SYS_MALLOC_F_LEN=0x7000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x43c3b000
+CONFIG_SPL_BSS_MAX_SIZE=0x3000
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x200000
CONFIG_SPL_SIZE_LIMIT=0x3A7F0
CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x3500
CONFIG_SPL_FS_FAT=y
@@ -35,13 +40,8 @@
CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y
CONFIG_SPL_MAX_SIZE=0x3B000
CONFIG_SPL_PAD_TO=0x0
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x43c3b000
-CONFIG_SPL_BSS_MAX_SIZE=0x3000
CONFIG_SPL_SYS_REPORT_STACK_F_USAGE=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
-CONFIG_SPL_STACK_R=y
-CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x200000
CONFIG_SPL_SEPARATE_BSS=y
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
diff --git a/configs/phycore_am64x_a53_defconfig b/configs/phycore_am64x_a53_defconfig
index f3085c0..1a93597 100644
--- a/configs/phycore_am64x_a53_defconfig
+++ b/configs/phycore_am64x_a53_defconfig
@@ -16,7 +16,7 @@
CONFIG_ENV_OFFSET=0xFFFFD000
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
-CONFIG_DEFAULT_DEVICE_TREE="k3-am642-phyboard-electra-rdk"
+CONFIG_DEFAULT_DEVICE_TREE="ti/k3-am642-phyboard-electra-rdk"
CONFIG_SPL_TEXT_BASE=0x80080000
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
@@ -24,6 +24,10 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x80a00000
+CONFIG_SPL_BSS_MAX_SIZE=0x80000
+CONFIG_SPL_STACK_R=y
CONFIG_SPL_FS_FAT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
@@ -35,12 +39,8 @@
CONFIG_BOOTCOMMAND="run mmcboot; bootflow scan -lb"
CONFIG_DEFAULT_FDT_FILE="oftree"
CONFIG_SPL_MAX_SIZE=0x180000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x80a00000
-CONFIG_SPL_BSS_MAX_SIZE=0x80000
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
-CONFIG_SPL_STACK_R=y
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_SYS_MALLOC_SIZE=0x800000
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
diff --git a/configs/phycore_am64x_r5_defconfig b/configs/phycore_am64x_r5_defconfig
index 74e6e83..61d784f 100644
--- a/configs/phycore_am64x_r5_defconfig
+++ b/configs/phycore_am64x_r5_defconfig
@@ -22,6 +22,10 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x7019b800
+CONFIG_SPL_BSS_MAX_SIZE=0x4000
+CONFIG_SPL_STACK_R=y
CONFIG_SPL_SIZE_LIMIT=0x190000
CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x4000
CONFIG_SPL_FS_FAT=y
@@ -36,13 +40,9 @@
CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y
CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y
CONFIG_SPL_MAX_SIZE=0x180000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x7019b800
-CONFIG_SPL_BSS_MAX_SIZE=0x4000
CONFIG_SPL_SYS_REPORT_STACK_F_USAGE=y
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
-CONFIG_SPL_STACK_R=y
CONFIG_SPL_SEPARATE_BSS=y
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
diff --git a/configs/pico-dwarf-imx7d_defconfig b/configs/pico-dwarf-imx7d_defconfig
index 2e32a7e..9d5241a 100644
--- a/configs/pico-dwarf-imx7d_defconfig
+++ b/configs/pico-dwarf-imx7d_defconfig
@@ -13,6 +13,8 @@
CONFIG_SYS_MONITOR_LEN=409600
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_MAX_SIZE=0x100000
CONFIG_SPL=y
CONFIG_ARMV7_BOOT_SEC_DEFAULT=y
CONFIG_IMX_RDC=y
@@ -25,8 +27,6 @@
CONFIG_SYS_PBSIZE=532
# CONFIG_CONSOLE_MUX is not set
CONFIG_SPL_MAX_SIZE=0xe000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_MAX_SIZE=0x100000
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SYS_MAXARGS=32
# CONFIG_CMD_BOOTD is not set
diff --git a/configs/pico-hobbit-imx7d_defconfig b/configs/pico-hobbit-imx7d_defconfig
index 42abda0..690139c 100644
--- a/configs/pico-hobbit-imx7d_defconfig
+++ b/configs/pico-hobbit-imx7d_defconfig
@@ -13,6 +13,8 @@
CONFIG_SYS_MONITOR_LEN=409600
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_MAX_SIZE=0x100000
CONFIG_SPL=y
CONFIG_ARMV7_BOOT_SEC_DEFAULT=y
CONFIG_IMX_RDC=y
@@ -25,8 +27,6 @@
CONFIG_SYS_PBSIZE=532
# CONFIG_CONSOLE_MUX is not set
CONFIG_SPL_MAX_SIZE=0xe000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_MAX_SIZE=0x100000
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SYS_MAXARGS=32
# CONFIG_CMD_BOOTD is not set
diff --git a/configs/pico-imx7d_bl33_defconfig b/configs/pico-imx7d_bl33_defconfig
index 154c2db..1327523 100644
--- a/configs/pico-imx7d_bl33_defconfig
+++ b/configs/pico-imx7d_bl33_defconfig
@@ -13,6 +13,8 @@
CONFIG_SYS_MONITOR_LEN=409600
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_MAX_SIZE=0x100000
CONFIG_SPL=y
CONFIG_ARMV7_BOOT_SEC_DEFAULT=y
CONFIG_SYS_MEMTEST_START=0x80000000
@@ -27,8 +29,6 @@
CONFIG_SYS_PBSIZE=532
# CONFIG_CONSOLE_MUX is not set
CONFIG_SPL_MAX_SIZE=0xe000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_MAX_SIZE=0x100000
CONFIG_SPL_SYS_MALLOC=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_MAXARGS=32
diff --git a/configs/pico-imx7d_defconfig b/configs/pico-imx7d_defconfig
index 3202894..6009b1c 100644
--- a/configs/pico-imx7d_defconfig
+++ b/configs/pico-imx7d_defconfig
@@ -13,6 +13,8 @@
CONFIG_SYS_MONITOR_LEN=409600
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_MAX_SIZE=0x100000
CONFIG_SPL=y
CONFIG_ARMV7_BOOT_SEC_DEFAULT=y
CONFIG_IMX_RDC=y
@@ -25,8 +27,6 @@
CONFIG_SYS_PBSIZE=532
# CONFIG_CONSOLE_MUX is not set
CONFIG_SPL_MAX_SIZE=0xe000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_MAX_SIZE=0x100000
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SYS_MAXARGS=32
# CONFIG_CMD_BOOTD is not set
diff --git a/configs/pico-imx8mq_defconfig b/configs/pico-imx8mq_defconfig
index ebd43b5..cf91eb5 100644
--- a/configs/pico-imx8mq_defconfig
+++ b/configs/pico-imx8mq_defconfig
@@ -20,6 +20,9 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x187ff0
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x180000
+CONFIG_SPL_BSS_MAX_SIZE=0x2000
CONFIG_SPL=y
CONFIG_IMX_BOOTAUX=y
CONFIG_SYS_LOAD_ADDR=0x40480000
@@ -34,9 +37,6 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_MAX_SIZE=0x1f000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x180000
-CONFIG_SPL_BSS_MAX_SIZE=0x2000
CONFIG_SPL_BOARD_INIT=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_SYS_MALLOC=y
diff --git a/configs/pico-nymph-imx7d_defconfig b/configs/pico-nymph-imx7d_defconfig
index 2e32a7e..9d5241a 100644
--- a/configs/pico-nymph-imx7d_defconfig
+++ b/configs/pico-nymph-imx7d_defconfig
@@ -13,6 +13,8 @@
CONFIG_SYS_MONITOR_LEN=409600
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_MAX_SIZE=0x100000
CONFIG_SPL=y
CONFIG_ARMV7_BOOT_SEC_DEFAULT=y
CONFIG_IMX_RDC=y
@@ -25,8 +27,6 @@
CONFIG_SYS_PBSIZE=532
# CONFIG_CONSOLE_MUX is not set
CONFIG_SPL_MAX_SIZE=0xe000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_MAX_SIZE=0x100000
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SYS_MAXARGS=32
# CONFIG_CMD_BOOTD is not set
diff --git a/configs/pico-pi-imx7d_defconfig b/configs/pico-pi-imx7d_defconfig
index 1c2ba26..28c46ab 100644
--- a/configs/pico-pi-imx7d_defconfig
+++ b/configs/pico-pi-imx7d_defconfig
@@ -13,6 +13,8 @@
CONFIG_SYS_MONITOR_LEN=409600
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_MAX_SIZE=0x100000
CONFIG_SPL=y
CONFIG_ARMV7_BOOT_SEC_DEFAULT=y
CONFIG_IMX_RDC=y
@@ -25,8 +27,6 @@
CONFIG_SYS_PBSIZE=532
# CONFIG_CONSOLE_MUX is not set
CONFIG_SPL_MAX_SIZE=0xe000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_MAX_SIZE=0x100000
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SYS_MAXARGS=32
# CONFIG_CMD_BOOTD is not set
diff --git a/configs/pinetab2-rk3566_defconfig b/configs/pinetab2-rk3566_defconfig
index bc7a77a..ad237ed 100644
--- a/configs/pinetab2-rk3566_defconfig
+++ b/configs/pinetab2-rk3566_defconfig
@@ -3,7 +3,7 @@
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SPL_GPIO=y
-CONFIG_NR_DRAM_BANKS=2
+CONFIG_SF_DEFAULT_SPEED=24000000
CONFIG_SF_DEFAULT_MODE=0x1000
CONFIG_DEFAULT_DEVICE_TREE="rk3566-pinetab2-v2.0"
CONFIG_ROCKCHIP_RK3568=y
@@ -99,7 +99,6 @@
CONFIG_USB_ETHER_ASIX88179=y
CONFIG_USB_ETHER_RTL8152=y
CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_PRODUCT_NUM=0x350a
CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_USB_FUNCTION_ROCKUSB=y
CONFIG_ERRNO_STR=y
diff --git a/configs/pogo_e02_defconfig b/configs/pogo_e02_defconfig
index e53ccf3..880cb20 100644
--- a/configs/pogo_e02_defconfig
+++ b/configs/pogo_e02_defconfig
@@ -13,7 +13,7 @@
CONFIG_TARGET_POGO_E02=y
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0xC0000
-CONFIG_DEFAULT_DEVICE_TREE="kirkwood-pogo_e02"
+CONFIG_DEFAULT_DEVICE_TREE="marvell/kirkwood-pogo_e02"
CONFIG_IDENT_STRING="\nPogo E02"
CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_BOOTDELAY=3
diff --git a/configs/pogo_v4_defconfig b/configs/pogo_v4_defconfig
index 95e22b3..50046e8 100644
--- a/configs/pogo_v4_defconfig
+++ b/configs/pogo_v4_defconfig
@@ -12,7 +12,7 @@
CONFIG_TARGET_POGO_V4=y
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0xC0000
-CONFIG_DEFAULT_DEVICE_TREE="kirkwood-pogoplug-series-4"
+CONFIG_DEFAULT_DEVICE_TREE="marvell/kirkwood-pogoplug-series-4"
CONFIG_IDENT_STRING="\nPogoplug V4"
CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_PCI=y
diff --git a/configs/popmetal-rk3288_defconfig b/configs/popmetal-rk3288_defconfig
index 09af09e..92f93f6 100644
--- a/configs/popmetal-rk3288_defconfig
+++ b/configs/popmetal-rk3288_defconfig
@@ -16,6 +16,8 @@
CONFIG_TARGET_POPMETAL_RK3288=y
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_SPL_STACK=0xff718000
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
CONFIG_DEBUG_UART_BASE=0xff690000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x800800
@@ -30,8 +32,6 @@
CONFIG_SPL_PAD_TO=0x7f8000
CONFIG_SPL_NO_BSS_LIMIT=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
-CONFIG_SPL_STACK_R=y
-CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
diff --git a/configs/porter_defconfig b/configs/porter_defconfig
index 021e521..170ca3a 100644
--- a/configs/porter_defconfig
+++ b/configs/porter_defconfig
@@ -16,7 +16,7 @@
CONFIG_ENV_OFFSET=0xC0000
CONFIG_ENV_SECT_SIZE=0x40000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="r8a7791-porter-u-boot"
+CONFIG_DEFAULT_DEVICE_TREE="renesas/r8a7791-porter"
CONFIG_SPL_TEXT_BASE=0xe6300000
CONFIG_ARCH_RENESAS_BOARD_STRING="Porter"
CONFIG_R8A7791=y
diff --git a/configs/puma-rk3399_defconfig b/configs/puma-rk3399_defconfig
index c2759e1..14a7bc8 100644
--- a/configs/puma-rk3399_defconfig
+++ b/configs/puma-rk3399_defconfig
@@ -17,6 +17,11 @@
CONFIG_ROCKCHIP_SPI_IMAGE=y
CONFIG_TARGET_PUMA_RK3399=y
CONFIG_SPL_STACK=0xff8effff
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0xff8e0000
+CONFIG_SPL_BSS_MAX_SIZE=0x10000
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
CONFIG_DEBUG_UART_BASE=0xFF180000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SPL_SPI_FLASH_SUPPORT=y
@@ -27,13 +32,8 @@
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SPL_MAX_SIZE=0x2e000
CONFIG_SPL_PAD_TO=0x7f8000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0xff8e0000
-CONFIG_SPL_BSS_MAX_SIZE=0x10000
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
-CONFIG_SPL_STACK_R=y
-CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200
CONFIG_SPL_I2C=y
CONFIG_SPL_POWER=y
diff --git a/configs/px30-core-ctouch2-of10-px30_defconfig b/configs/px30-core-ctouch2-of10-px30_defconfig
index d96fd14..a2801ec 100644
--- a/configs/px30-core-ctouch2-of10-px30_defconfig
+++ b/configs/px30-core-ctouch2-of10-px30_defconfig
@@ -17,9 +17,13 @@
CONFIG_DEBUG_UART_CHANNEL=1
CONFIG_TPL_LIBGENERIC_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC=y
+CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
CONFIG_SPL_STACK_R_ADDR=0x600000
CONFIG_SPL_STACK=0x400000
-CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x4000000
+CONFIG_SPL_BSS_MAX_SIZE=0x4000
+CONFIG_SPL_STACK_R=y
CONFIG_DEBUG_UART_BASE=0xFF160000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x800800
@@ -35,13 +39,9 @@
CONFIG_MISC_INIT_R=y
CONFIG_SPL_MAX_SIZE=0x20000
CONFIG_SPL_PAD_TO=0x7f8000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x4000000
-CONFIG_SPL_BSS_MAX_SIZE=0x4000
CONFIG_SPL_BOOTROM_SUPPORT=y
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
-CONFIG_SPL_STACK_R=y
CONFIG_SPL_ATF=y
# CONFIG_TPL_FRAMEWORK is not set
# CONFIG_TPL_BANNER_PRINT is not set
diff --git a/configs/px30-core-ctouch2-px30_defconfig b/configs/px30-core-ctouch2-px30_defconfig
index ac2af6d..cc33e27 100644
--- a/configs/px30-core-ctouch2-px30_defconfig
+++ b/configs/px30-core-ctouch2-px30_defconfig
@@ -17,9 +17,13 @@
CONFIG_DEBUG_UART_CHANNEL=1
CONFIG_TPL_LIBGENERIC_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC=y
+CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
CONFIG_SPL_STACK_R_ADDR=0x600000
CONFIG_SPL_STACK=0x400000
-CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x4000000
+CONFIG_SPL_BSS_MAX_SIZE=0x4000
+CONFIG_SPL_STACK_R=y
CONFIG_DEBUG_UART_BASE=0xFF160000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x800800
@@ -35,13 +39,9 @@
CONFIG_MISC_INIT_R=y
CONFIG_SPL_MAX_SIZE=0x20000
CONFIG_SPL_PAD_TO=0x7f8000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x4000000
-CONFIG_SPL_BSS_MAX_SIZE=0x4000
CONFIG_SPL_BOOTROM_SUPPORT=y
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
-CONFIG_SPL_STACK_R=y
CONFIG_SPL_ATF=y
# CONFIG_TPL_FRAMEWORK is not set
# CONFIG_TPL_BANNER_PRINT is not set
diff --git a/configs/px30-core-edimm2.2-px30_defconfig b/configs/px30-core-edimm2.2-px30_defconfig
index a49bb40..99e1b2f 100644
--- a/configs/px30-core-edimm2.2-px30_defconfig
+++ b/configs/px30-core-edimm2.2-px30_defconfig
@@ -17,9 +17,13 @@
CONFIG_DEBUG_UART_CHANNEL=1
CONFIG_TPL_LIBGENERIC_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC=y
+CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
CONFIG_SPL_STACK_R_ADDR=0x600000
CONFIG_SPL_STACK=0x400000
-CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x4000000
+CONFIG_SPL_BSS_MAX_SIZE=0x4000
+CONFIG_SPL_STACK_R=y
CONFIG_DEBUG_UART_BASE=0xFF160000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x800800
@@ -35,13 +39,9 @@
CONFIG_MISC_INIT_R=y
CONFIG_SPL_MAX_SIZE=0x20000
CONFIG_SPL_PAD_TO=0x7f8000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x4000000
-CONFIG_SPL_BSS_MAX_SIZE=0x4000
CONFIG_SPL_BOOTROM_SUPPORT=y
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
-CONFIG_SPL_STACK_R=y
CONFIG_SPL_ATF=y
# CONFIG_TPL_FRAMEWORK is not set
# CONFIG_TPL_BANNER_PRINT is not set
diff --git a/configs/pxm2_defconfig b/configs/pxm2_defconfig
index 64fed8b..366d8fc 100644
--- a/configs/pxm2_defconfig
+++ b/configs/pxm2_defconfig
@@ -17,6 +17,7 @@
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_BOOTCOUNT_BOOTLIMIT=3
+CONFIG_SPL_BSS_START_ADDR=0x80000000
CONFIG_SPL=y
CONFIG_SPL_FS_FAT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
@@ -37,7 +38,6 @@
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_ARCH_MISC_INIT=y
-CONFIG_SPL_BSS_START_ADDR=0x80000000
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x80208000
diff --git a/configs/qcom_defconfig b/configs/qcom_defconfig
index cbc612b..80ad3b3 100644
--- a/configs/qcom_defconfig
+++ b/configs/qcom_defconfig
@@ -2,8 +2,9 @@
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_POSITION_INDEPENDENT=y
CONFIG_ARCH_SNAPDRAGON=y
-CONFIG_DEFAULT_DEVICE_TREE="sdm845-db845c"
-CONFIG_SYS_LOAD_ADDR=0x0
+CONFIG_DEFAULT_DEVICE_TREE="qcom/sdm845-db845c"
+CONFIG_SYS_LOAD_ADDR=0xA0000000
+CONFIG_SYS_INIT_SP_BSS_OFFSET=1572864
CONFIG_BUTTON_CMD=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
@@ -18,32 +19,71 @@
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_CMD_BOOTMENU=y
+CONFIG_CMD_EEPROM=y
+CONFIG_SYS_I2C_EEPROM_BUS=2
+CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=5
+# CONFIG_CMD_BIND is not set
CONFIG_CMD_CLK=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_UFS=y
CONFIG_CMD_USB=y
CONFIG_CMD_CAT=y
CONFIG_CMD_BMP=y
CONFIG_CMD_LOG=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_BUTTON_QCOM_PMIC=y
CONFIG_CLK=y
+CONFIG_CLK_QCOM_QCM2290=y
CONFIG_CLK_QCOM_QCS404=y
CONFIG_CLK_QCOM_SDM845=y
+CONFIG_CLK_QCOM_SM6115=y
+CONFIG_CLK_QCOM_SM8250=y
+CONFIG_CLK_QCOM_SM8550=y
+CONFIG_CLK_QCOM_SM8650=y
CONFIG_MSM_GPIO=y
CONFIG_QCOM_PMIC_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_QUP=y
+CONFIG_SYS_I2C_GENI=y
+CONFIG_I2C_MUX=y
CONFIG_DM_KEYBOARD=y
CONFIG_BUTTON_KEYBOARD=y
+CONFIG_IOMMU=y
+CONFIG_QCOM_HYP_SMMU=y
+CONFIG_MISC=y
+CONFIG_NVMEM=y
+CONFIG_I2C_EEPROM=y
CONFIG_MMC_HS200_SUPPORT=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ADMA=y
CONFIG_MMC_SDHCI_MSM=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
+CONFIG_DM_MDIO=y
+CONFIG_DM_ETH_PHY=y
+CONFIG_DWC_ETH_QOS=y
+CONFIG_DWC_ETH_QOS_QCOM=y
+CONFIG_RGMII=y
CONFIG_PHY=y
+CONFIG_PHY_QCOM_QUSB2=y
+CONFIG_PHY_QCOM_USB_SNPS_FEMTO_V2=y
+CONFIG_PHY_QCOM_SNPS_EUSB2=y
CONFIG_PINCTRL=y
+CONFIG_PINCTRL_QCOM_QCM2290=y
CONFIG_PINCTRL_QCOM_QCS404=y
CONFIG_PINCTRL_QCOM_SDM845=y
+CONFIG_PINCTRL_QCOM_SM6115=y
+CONFIG_PINCTRL_QCOM_SM8250=y
+CONFIG_PINCTRL_QCOM_SM8550=y
+CONFIG_PINCTRL_QCOM_SM8650=y
CONFIG_DM_PMIC=y
CONFIG_PMIC_QCOM=y
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_FIXED=y
CONFIG_SCSI=y
CONFIG_MSM_SERIAL=y
CONFIG_MSM_GENI_SERIAL=y
@@ -54,6 +94,10 @@
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_USB_FUNCTION_MASS_STORAGE=y
CONFIG_UFS=y
CONFIG_VIDEO=y
# CONFIG_VIDEO_FONT_8X16 is not set
@@ -62,28 +106,5 @@
CONFIG_NO_FB_CLEAR=y
CONFIG_VIDEO_SIMPLE=y
CONFIG_HEXDUMP=y
-# CONFIG_GENERATE_SMBIOS_TABLE is not set
+CONFIG_GENERATE_SMBIOS_TABLE=y
CONFIG_LMB_MAX_REGIONS=64
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_EEPROM=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_PING=y
-CONFIG_DM_ETH=y
-CONFIG_DM_ETH_PHY=y
-CONFIG_DM_MDIO=y
-CONFIG_DWC_ETH_QOS=y
-CONFIG_DWC_ETH_QOS_QCOM=y
-CONFIG_RGMII=y
-CONFIG_PHY_MICREL=y
-CONFIG_PHY_MICREL_KSZ90X1=y
-CONFIG_MISC=y
-CONFIG_NVMEM=y
-CONFIG_DM_I2C=y
-CONFIG_I2C_SUPPORT=y
-CONFIG_I2C_MUX=y
-CONFIG_I2C_EEPROM=y
-CONFIG_SYS_I2C=y
-CONFIG_SYS_I2C_QUP=y
-CONFIG_SYS_I2C_EEPROM_BUS=2
-CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
-CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=5
diff --git a/configs/qemu-riscv32_spl_defconfig b/configs/qemu-riscv32_spl_defconfig
index 4ff8ec8..dd774a0 100644
--- a/configs/qemu-riscv32_spl_defconfig
+++ b/configs/qemu-riscv32_spl_defconfig
@@ -6,6 +6,7 @@
CONFIG_ENV_SIZE=0x20000
CONFIG_DEFAULT_DEVICE_TREE="qemu-virt32"
CONFIG_SYS_MONITOR_LEN=786432
+CONFIG_SPL_BSS_START_ADDR=0x84000000
CONFIG_SPL=y
CONFIG_SYS_LOAD_ADDR=0x80200000
CONFIG_TARGET_QEMU_VIRT=y
@@ -18,7 +19,6 @@
CONFIG_DISPLAY_CPUINFO=y
CONFIG_DISPLAY_BOARDINFO=y
CONFIG_SPL_MAX_SIZE=0x100000
-CONFIG_SPL_BSS_START_ADDR=0x84000000
CONFIG_SPL_SYS_MALLOC=y
# CONFIG_CMD_MII is not set
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
diff --git a/configs/qemu-riscv64_spl_defconfig b/configs/qemu-riscv64_spl_defconfig
index f663a13..220b5fe 100644
--- a/configs/qemu-riscv64_spl_defconfig
+++ b/configs/qemu-riscv64_spl_defconfig
@@ -5,6 +5,7 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000
CONFIG_ENV_SIZE=0x20000
CONFIG_DEFAULT_DEVICE_TREE="qemu-virt64"
+CONFIG_SPL_BSS_START_ADDR=0x84000000
CONFIG_SPL=y
CONFIG_SYS_LOAD_ADDR=0x80200000
CONFIG_TARGET_QEMU_VIRT=y
@@ -17,7 +18,6 @@
CONFIG_DISPLAY_CPUINFO=y
CONFIG_DISPLAY_BOARDINFO=y
CONFIG_SPL_MAX_SIZE=0x100000
-CONFIG_SPL_BSS_START_ADDR=0x84000000
CONFIG_SPL_SYS_MALLOC=y
# CONFIG_CMD_MII is not set
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
diff --git a/configs/qemu-x86_64_defconfig b/configs/qemu-x86_64_defconfig
index 451af0b..008eb46 100644
--- a/configs/qemu-x86_64_defconfig
+++ b/configs/qemu-x86_64_defconfig
@@ -6,7 +6,7 @@
CONFIG_MAX_CPUS=2
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="qemu-x86_i440fx"
-CONFIG_SPL_TEXT_BASE=0xfffd8000
+CONFIG_SPL_TEXT_BASE=0xfffd4000
CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000
CONFIG_DEBUG_UART_BASE=0x3f8
CONFIG_DEBUG_UART_CLOCK=1843200
@@ -17,7 +17,7 @@
CONFIG_SMP=y
CONFIG_GENERATE_PIRQ_TABLE=y
CONFIG_GENERATE_MP_TABLE=y
-CONFIG_X86_OFFSET_U_BOOT=0xfff00000
+CONFIG_X86_OFFSET_U_BOOT=0xffe00000
CONFIG_SYS_MONITOR_BASE=0x01110000
CONFIG_FIT=y
CONFIG_SPL_LOAD_FIT=y
@@ -80,6 +80,7 @@
CONFIG_SYS_NS16550_PORT_MAPPED=y
CONFIG_SPI=y
CONFIG_USB_KEYBOARD=y
+CONFIG_CONSOLE_TRUETYPE=y
CONFIG_FRAMEBUFFER_SET_VESA_MODE=y
CONFIG_FRAMEBUFFER_VESA_MODE_USER=y
CONFIG_FRAMEBUFFER_VESA_MODE=0x144
diff --git a/configs/qemu-x86_defconfig b/configs/qemu-x86_defconfig
index b2a221b..947d15c 100644
--- a/configs/qemu-x86_defconfig
+++ b/configs/qemu-x86_defconfig
@@ -57,6 +57,7 @@
CONFIG_SYS_NS16550_PORT_MAPPED=y
CONFIG_SPI=y
CONFIG_USB_KEYBOARD=y
+CONFIG_CONSOLE_TRUETYPE=y
CONFIG_FRAMEBUFFER_SET_VESA_MODE=y
CONFIG_FRAMEBUFFER_VESA_MODE_USER=y
CONFIG_FRAMEBUFFER_VESA_MODE=0x144
diff --git a/configs/quartz64-a-rk3566_defconfig b/configs/quartz64-a-rk3566_defconfig
index fef8043..535e34f 100644
--- a/configs/quartz64-a-rk3566_defconfig
+++ b/configs/quartz64-a-rk3566_defconfig
@@ -3,7 +3,6 @@
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SPL_GPIO=y
-CONFIG_NR_DRAM_BANKS=2
CONFIG_SF_DEFAULT_SPEED=24000000
CONFIG_SF_DEFAULT_MODE=0x2000
CONFIG_DEFAULT_DEVICE_TREE="rk3566-quartz64-a"
diff --git a/configs/quartz64-b-rk3566_defconfig b/configs/quartz64-b-rk3566_defconfig
index bb541ed..e197def 100644
--- a/configs/quartz64-b-rk3566_defconfig
+++ b/configs/quartz64-b-rk3566_defconfig
@@ -2,7 +2,6 @@
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_NR_DRAM_BANKS=2
CONFIG_SF_DEFAULT_SPEED=24000000
CONFIG_SF_DEFAULT_MODE=0x2000
CONFIG_DEFAULT_DEVICE_TREE="rk3566-quartz64-b"
diff --git a/configs/quartzpro64-rk3588_defconfig b/configs/quartzpro64-rk3588_defconfig
index b2a66d3..33cbda8 100644
--- a/configs/quartzpro64-rk3588_defconfig
+++ b/configs/quartzpro64-rk3588_defconfig
@@ -3,7 +3,6 @@
CONFIG_SYS_HAS_NONCACHED_MEMORY=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_NR_DRAM_BANKS=2
CONFIG_DEFAULT_DEVICE_TREE="rk3588-quartzpro64"
CONFIG_ROCKCHIP_RK3588=y
CONFIG_SPL_SERIAL=y
@@ -19,7 +18,6 @@
CONFIG_SPL_FIT_SIGNATURE=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_LEGACY_IMAGE_FORMAT=y
-CONFIG_OF_BOARD_SETUP=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-quartzpro64.dtb"
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
@@ -64,7 +62,6 @@
CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
CONFIG_PHY_ROCKCHIP_USBDP=y
CONFIG_SPL_PINCTRL=y
-CONFIG_REGULATOR_PWM=y
CONFIG_PWM_ROCKCHIP=y
CONFIG_SPL_RAM=y
CONFIG_SCSI=y
diff --git a/configs/r8a77970_eagle_defconfig b/configs/r8a77970_eagle_defconfig
index 62fa7e1..09ea1c5 100644
--- a/configs/r8a77970_eagle_defconfig
+++ b/configs/r8a77970_eagle_defconfig
@@ -9,12 +9,15 @@
CONFIG_ENV_OFFSET=0x700000
CONFIG_ENV_SECT_SIZE=0x40000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="r8a77970-eagle-u-boot"
+CONFIG_DEFAULT_DEVICE_TREE="renesas/r8a77970-eagle"
CONFIG_SPL_TEXT_BASE=0xe6318000
CONFIG_RCAR_GEN3=y
CONFIG_TARGET_EAGLE=y
CONFIG_SYS_MONITOR_LEN=1048576
CONFIG_SPL_STACK=0xe6304000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0xe631f000
+CONFIG_SPL_BSS_MAX_SIZE=0x1000
CONFIG_SYS_LOAD_ADDR=0x58000000
CONFIG_REMAKE_ELF=y
CONFIG_FIT=y
@@ -25,9 +28,6 @@
CONFIG_DEFAULT_FDT_FILE="r8a77970-eagle.dtb"
CONFIG_SYS_PBSIZE=2068
CONFIG_SYS_MALLOC_BOOTPARAMS=y
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0xe631f000
-CONFIG_SPL_BSS_MAX_SIZE=0x1000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
diff --git a/configs/r8a77970_v3msk_defconfig b/configs/r8a77970_v3msk_defconfig
index b340872..089c754 100644
--- a/configs/r8a77970_v3msk_defconfig
+++ b/configs/r8a77970_v3msk_defconfig
@@ -9,13 +9,16 @@
CONFIG_ENV_OFFSET=0x700000
CONFIG_ENV_SECT_SIZE=0x40000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="r8a77970-v3msk-u-boot"
+CONFIG_DEFAULT_DEVICE_TREE="renesas/r8a77970-v3msk"
CONFIG_SPL_TEXT_BASE=0xe6318000
CONFIG_RCAR_GEN3=y
CONFIG_R8A77970=y
CONFIG_TARGET_V3MSK=y
CONFIG_SYS_MONITOR_LEN=1048576
CONFIG_SPL_STACK=0xe6304000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0xe631f000
+CONFIG_SPL_BSS_MAX_SIZE=0x1000
CONFIG_SYS_LOAD_ADDR=0x58000000
CONFIG_REMAKE_ELF=y
CONFIG_FIT=y
@@ -25,9 +28,6 @@
CONFIG_DEFAULT_FDT_FILE="r8a77970-v3msk.dtb"
CONFIG_SYS_PBSIZE=2068
CONFIG_SYS_MALLOC_BOOTPARAMS=y
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0xe631f000
-CONFIG_SPL_BSS_MAX_SIZE=0x1000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
diff --git a/configs/r8a77980_condor_defconfig b/configs/r8a77980_condor_defconfig
index 8a50195..9f5212f 100644
--- a/configs/r8a77980_condor_defconfig
+++ b/configs/r8a77980_condor_defconfig
@@ -8,12 +8,15 @@
CONFIG_ENV_OFFSET=0x700000
CONFIG_ENV_SECT_SIZE=0x40000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="r8a77980-condor-u-boot"
+CONFIG_DEFAULT_DEVICE_TREE="renesas/r8a77980-condor"
CONFIG_SPL_TEXT_BASE=0xe6318000
CONFIG_RCAR_GEN3=y
CONFIG_TARGET_CONDOR=y
CONFIG_SYS_MONITOR_LEN=1048576
CONFIG_SPL_STACK=0xe6304000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0xe631f000
+CONFIG_SPL_BSS_MAX_SIZE=0x1000
CONFIG_SYS_LOAD_ADDR=0x58000000
CONFIG_REMAKE_ELF=y
CONFIG_FIT=y
@@ -25,9 +28,6 @@
CONFIG_SYS_PBSIZE=2068
# CONFIG_BOARD_EARLY_INIT_F is not set
CONFIG_SYS_MALLOC_BOOTPARAMS=y
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0xe631f000
-CONFIG_SPL_BSS_MAX_SIZE=0x1000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
diff --git a/configs/r8a77980_v3hsk_defconfig b/configs/r8a77980_v3hsk_defconfig
index 8d67b7f..8c85f42 100644
--- a/configs/r8a77980_v3hsk_defconfig
+++ b/configs/r8a77980_v3hsk_defconfig
@@ -8,13 +8,16 @@
CONFIG_ENV_OFFSET=0x700000
CONFIG_ENV_SECT_SIZE=0x40000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="r8a77980-v3hsk-u-boot"
+CONFIG_DEFAULT_DEVICE_TREE="renesas/r8a77980-v3hsk"
CONFIG_SPL_TEXT_BASE=0xe6318000
CONFIG_RCAR_GEN3=y
CONFIG_R8A77980=y
CONFIG_TARGET_V3HSK=y
CONFIG_SYS_MONITOR_LEN=1048576
CONFIG_SPL_STACK=0xe6304000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0xe631f000
+CONFIG_SPL_BSS_MAX_SIZE=0x1000
CONFIG_SYS_LOAD_ADDR=0x58000000
CONFIG_REMAKE_ELF=y
CONFIG_FIT=y
@@ -24,9 +27,6 @@
CONFIG_SYS_PBSIZE=2068
# CONFIG_BOARD_EARLY_INIT_F is not set
CONFIG_SYS_MALLOC_BOOTPARAMS=y
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0xe631f000
-CONFIG_SPL_BSS_MAX_SIZE=0x1000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
diff --git a/configs/r8a77990_ebisu_defconfig b/configs/r8a77990_ebisu_defconfig
index 28fa30e..3960a25 100644
--- a/configs/r8a77990_ebisu_defconfig
+++ b/configs/r8a77990_ebisu_defconfig
@@ -8,12 +8,15 @@
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0xFFFE0000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="r8a77990-ebisu-u-boot"
+CONFIG_DEFAULT_DEVICE_TREE="renesas/r8a77990-ebisu"
CONFIG_SPL_TEXT_BASE=0xe6318000
CONFIG_RCAR_GEN3=y
CONFIG_TARGET_EBISU=y
CONFIG_SYS_MONITOR_LEN=1048576
CONFIG_SPL_STACK=0xe6304000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0xe631f000
+CONFIG_SPL_BSS_MAX_SIZE=0x1000
CONFIG_SYS_LOAD_ADDR=0x58000000
CONFIG_REMAKE_ELF=y
CONFIG_SYS_MONITOR_BASE=0x00000000
@@ -26,9 +29,6 @@
CONFIG_SYS_PBSIZE=2068
# CONFIG_BOARD_EARLY_INIT_F is not set
CONFIG_SYS_MALLOC_BOOTPARAMS=y
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0xe631f000
-CONFIG_SPL_BSS_MAX_SIZE=0x1000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
diff --git a/configs/r8a77995_draak_defconfig b/configs/r8a77995_draak_defconfig
index 6443206..01f5b13 100644
--- a/configs/r8a77995_draak_defconfig
+++ b/configs/r8a77995_draak_defconfig
@@ -8,12 +8,15 @@
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0xFFFE0000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="r8a77995-draak-u-boot"
+CONFIG_DEFAULT_DEVICE_TREE="renesas/r8a77995-draak"
CONFIG_SPL_TEXT_BASE=0xe6318000
CONFIG_RCAR_GEN3=y
CONFIG_TARGET_DRAAK=y
CONFIG_SYS_MONITOR_LEN=1048576
CONFIG_SPL_STACK=0xe6304000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0xe631f000
+CONFIG_SPL_BSS_MAX_SIZE=0x1000
CONFIG_SYS_LOAD_ADDR=0x58000000
CONFIG_REMAKE_ELF=y
CONFIG_SYS_MONITOR_BASE=0x00000000
@@ -25,9 +28,6 @@
CONFIG_DEFAULT_FDT_FILE="r8a77995-draak.dtb"
CONFIG_SYS_PBSIZE=2068
CONFIG_SYS_MALLOC_BOOTPARAMS=y
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0xe631f000
-CONFIG_SPL_BSS_MAX_SIZE=0x1000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
diff --git a/configs/r8a779a0_falcon_defconfig b/configs/r8a779a0_falcon_defconfig
index 04a5600..40097f9 100644
--- a/configs/r8a779a0_falcon_defconfig
+++ b/configs/r8a779a0_falcon_defconfig
@@ -8,7 +8,7 @@
CONFIG_ENV_OFFSET=0xC00000
CONFIG_ENV_SECT_SIZE=0x40000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="r8a779a0-falcon-u-boot"
+CONFIG_DEFAULT_DEVICE_TREE="renesas/r8a779a0-falcon"
CONFIG_RCAR_GEN4=y
CONFIG_TARGET_FALCON=y
CONFIG_SYS_MONITOR_LEN=1048576
diff --git a/configs/r8a779f0_spider_defconfig b/configs/r8a779f0_spider_defconfig
index 54e0928..9ab46a4 100644
--- a/configs/r8a779f0_spider_defconfig
+++ b/configs/r8a779f0_spider_defconfig
@@ -6,7 +6,7 @@
CONFIG_ENV_OFFSET=0xD00000
CONFIG_ENV_SECT_SIZE=0x40000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="r8a779f0-spider-u-boot"
+CONFIG_DEFAULT_DEVICE_TREE="renesas/r8a779f0-spider"
CONFIG_RCAR_GEN4=y
CONFIG_TARGET_SPIDER=y
CONFIG_SYS_MONITOR_LEN=1048576
diff --git a/configs/r8a779g0_whitehawk_defconfig b/configs/r8a779g0_whitehawk_defconfig
index 1489c32..abc9a3b 100644
--- a/configs/r8a779g0_whitehawk_defconfig
+++ b/configs/r8a779g0_whitehawk_defconfig
@@ -5,7 +5,7 @@
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0xFFFE0000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="r8a779g0-white-hawk-u-boot"
+CONFIG_DEFAULT_DEVICE_TREE="renesas/r8a779g0-white-hawk"
CONFIG_RCAR_GEN4=y
CONFIG_TARGET_WHITEHAWK=y
CONFIG_SYS_MONITOR_LEN=1048576
diff --git a/configs/r8a779h0_grayhawk_defconfig b/configs/r8a779h0_grayhawk_defconfig
index 84401eb..6bd872f 100644
--- a/configs/r8a779h0_grayhawk_defconfig
+++ b/configs/r8a779h0_grayhawk_defconfig
@@ -5,7 +5,7 @@
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0xFFFE0000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="r8a779h0-gray-hawk-u-boot"
+CONFIG_DEFAULT_DEVICE_TREE="r8a779h0-gray-hawk"
CONFIG_RCAR_GEN4=y
CONFIG_TARGET_GRAYHAWK=y
CONFIG_SYS_MONITOR_LEN=1048576
@@ -39,6 +39,7 @@
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_OF_CONTROL=y
+# CONFIG_OF_UPSTREAM is not set
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_MMC_ENV_PART=2
diff --git a/configs/radxa-cm3-io-rk3566_defconfig b/configs/radxa-cm3-io-rk3566_defconfig
index bf61db4..d23ab57 100644
--- a/configs/radxa-cm3-io-rk3566_defconfig
+++ b/configs/radxa-cm3-io-rk3566_defconfig
@@ -2,7 +2,6 @@
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_NR_DRAM_BANKS=2
CONFIG_DEFAULT_DEVICE_TREE="rk3566-radxa-cm3-io"
CONFIG_ROCKCHIP_RK3568=y
CONFIG_SPL_SERIAL=y
diff --git a/configs/radxa-e25-rk3568_defconfig b/configs/radxa-e25-rk3568_defconfig
index 43aa8ec..dbb77b8 100644
--- a/configs/radxa-e25-rk3568_defconfig
+++ b/configs/radxa-e25-rk3568_defconfig
@@ -3,7 +3,6 @@
CONFIG_SYS_HAS_NONCACHED_MEMORY=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_NR_DRAM_BANKS=2
CONFIG_DEFAULT_DEVICE_TREE="rk3568-radxa-e25"
CONFIG_ROCKCHIP_RK3568=y
CONFIG_SPL_SERIAL=y
diff --git a/configs/radxa-zero2_defconfig b/configs/radxa-zero2_defconfig
index b795681..92e0a88 100644
--- a/configs/radxa-zero2_defconfig
+++ b/configs/radxa-zero2_defconfig
@@ -6,7 +6,7 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="meson-g12b-radxa-zero2"
+CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-g12b-radxa-zero2"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_MESON_G12A=y
diff --git a/configs/radxa-zero_defconfig b/configs/radxa-zero_defconfig
index 103ff8a..5179c58 100644
--- a/configs/radxa-zero_defconfig
+++ b/configs/radxa-zero_defconfig
@@ -6,7 +6,7 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="meson-g12a-radxa-zero"
+CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-g12a-radxa-zero"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_MESON_G12A=y
diff --git a/configs/rcar3_salvator-x_defconfig b/configs/rcar3_salvator-x_defconfig
index a69bb43..45d2446 100644
--- a/configs/rcar3_salvator-x_defconfig
+++ b/configs/rcar3_salvator-x_defconfig
@@ -6,12 +6,15 @@
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0xFFFE0000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="r8a77950-salvator-x-u-boot"
+CONFIG_DEFAULT_DEVICE_TREE="renesas/r8a77951-salvator-x"
CONFIG_SPL_TEXT_BASE=0xe6338000
CONFIG_RCAR_GEN3=y
CONFIG_TARGET_SALVATOR_X=y
CONFIG_SYS_MONITOR_LEN=1048576
CONFIG_SPL_STACK=0xe6304000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0xe633f000
+CONFIG_SPL_BSS_MAX_SIZE=0x1000
CONFIG_SYS_LOAD_ADDR=0x58000000
CONFIG_PCI=y
CONFIG_REMAKE_ELF=y
@@ -21,13 +24,10 @@
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_USE_BOOTARGS=y
CONFIG_USE_BOOTCOMMAND=y
-CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a77950-salvator-x.dtb; booti 0x48080000 - 0x48000000"
-CONFIG_DEFAULT_FDT_FILE="r8a77950-salvator-x.dtb"
+CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a77951-salvator-x.dtb; booti 0x48080000 - 0x48000000"
+CONFIG_DEFAULT_FDT_FILE="r8a77951-salvator-x.dtb"
CONFIG_SYS_PBSIZE=2068
CONFIG_SYS_MALLOC_BOOTPARAMS=y
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0xe633f000
-CONFIG_SPL_BSS_MAX_SIZE=0x1000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
@@ -48,7 +48,7 @@
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_OF_CONTROL=y
-CONFIG_OF_LIST="r8a77950-salvator-x-u-boot r8a77960-salvator-x-u-boot r8a77965-salvator-x-u-boot"
+CONFIG_OF_LIST="renesas/r8a77951-salvator-x renesas/r8a77960-salvator-x renesas/r8a77965-salvator-x"
CONFIG_MULTI_DTB_FIT_LZO=y
CONFIG_MULTI_DTB_FIT_USER_DEFINED_AREA=y
CONFIG_OF_DTB_PROPS_REMOVE=y
diff --git a/configs/rcar3_ulcb_defconfig b/configs/rcar3_ulcb_defconfig
index 5bd3697..b5d8121 100644
--- a/configs/rcar3_ulcb_defconfig
+++ b/configs/rcar3_ulcb_defconfig
@@ -7,12 +7,15 @@
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0xFFFE0000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="r8a77950-ulcb-u-boot"
+CONFIG_DEFAULT_DEVICE_TREE="renesas/r8a77951-ulcb"
CONFIG_SPL_TEXT_BASE=0xe6338000
CONFIG_RCAR_GEN3=y
CONFIG_TARGET_ULCB=y
CONFIG_SYS_MONITOR_LEN=1048576
CONFIG_SPL_STACK=0xe6304000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0xe633f000
+CONFIG_SPL_BSS_MAX_SIZE=0x1000
CONFIG_SYS_LOAD_ADDR=0x58000000
CONFIG_REMAKE_ELF=y
CONFIG_SYS_MONITOR_BASE=0x00000000
@@ -20,13 +23,10 @@
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_USE_BOOTARGS=y
CONFIG_USE_BOOTCOMMAND=y
-CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a77950-ulcb.dtb; booti 0x48080000 - 0x48000000"
-CONFIG_DEFAULT_FDT_FILE="r8a77950-ulcb.dtb"
+CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a77951-ulcb.dtb; booti 0x48080000 - 0x48000000"
+CONFIG_DEFAULT_FDT_FILE="r8a77951-ulcb.dtb"
CONFIG_SYS_PBSIZE=2068
CONFIG_SYS_MALLOC_BOOTPARAMS=y
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0xe633f000
-CONFIG_SPL_BSS_MAX_SIZE=0x1000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
@@ -46,7 +46,7 @@
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_OF_CONTROL=y
-CONFIG_OF_LIST="r8a77950-ulcb-u-boot r8a77960-ulcb-u-boot r8a77965-ulcb-u-boot"
+CONFIG_OF_LIST="renesas/r8a77951-ulcb renesas/r8a77960-ulcb renesas/r8a77965-ulcb"
CONFIG_MULTI_DTB_FIT_LZO=y
CONFIG_MULTI_DTB_FIT_USER_DEFINED_AREA=y
CONFIG_OF_DTB_PROPS_REMOVE=y
diff --git a/configs/renesas_rzg2l_smarc_defconfig b/configs/renesas_rzg2l_smarc_defconfig
index e4e597f..7a1224b 100644
--- a/configs/renesas_rzg2l_smarc_defconfig
+++ b/configs/renesas_rzg2l_smarc_defconfig
@@ -9,7 +9,7 @@
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0xFFFE0000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="r9a07g044l2-smarc"
+CONFIG_DEFAULT_DEVICE_TREE="renesas/r9a07g044l2-smarc"
CONFIG_RZG2L=y
CONFIG_SYS_MONITOR_LEN=1048576
CONFIG_SYS_LOAD_ADDR=0x58000000
diff --git a/configs/ringneck-px30_defconfig b/configs/ringneck-px30_defconfig
index b314636..67a44ed 100644
--- a/configs/ringneck-px30_defconfig
+++ b/configs/ringneck-px30_defconfig
@@ -17,9 +17,13 @@
CONFIG_TARGET_RINGNECK_PX30=y
CONFIG_TPL_LIBGENERIC_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC=y
+CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
CONFIG_SPL_STACK_R_ADDR=0x600000
CONFIG_SPL_STACK=0x400000
-CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x4000000
+CONFIG_SPL_BSS_MAX_SIZE=0x4000
+CONFIG_SPL_STACK_R=y
CONFIG_DEBUG_UART_BASE=0xFF030000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x800800
@@ -35,14 +39,10 @@
CONFIG_MISC_INIT_R=y
CONFIG_SPL_MAX_SIZE=0x20000
CONFIG_SPL_PAD_TO=0x0
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x4000000
-CONFIG_SPL_BSS_MAX_SIZE=0x4000
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_BOOTROM_SUPPORT=y
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
-CONFIG_SPL_STACK_R=y
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200
CONFIG_SPL_ATF=y
diff --git a/configs/roc-cc-rk3308_defconfig b/configs/roc-cc-rk3308_defconfig
index 5e8f51e..ef58bd6 100644
--- a/configs/roc-cc-rk3308_defconfig
+++ b/configs/roc-cc-rk3308_defconfig
@@ -2,10 +2,11 @@
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="rk3308-roc-cc"
+CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_ROCKCHIP_RK3308=y
-CONFIG_SPL_DRIVERS_MISC=y
CONFIG_TARGET_ROC_RK3308_CC=y
CONFIG_DEBUG_UART_BASE=0xFF0C0000
CONFIG_DEBUG_UART_CLOCK=24000000
@@ -14,32 +15,23 @@
CONFIG_ANDROID_BOOT_IMAGE=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
-CONFIG_BOOTDELAY=0
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3308-roc-cc.dtb"
-CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_CPUINFO is not set
-CONFIG_SPL_MAX_SIZE=0x20000
+CONFIG_SPL_MAX_SIZE=0x40000
CONFIG_SPL_PAD_TO=0x7f8000
-# CONFIG_CMD_BDI is not set
-# CONFIG_CMD_CONSOLE is not set
-# CONFIG_CMD_ELF is not set
-# CONFIG_CMD_IMI is not set
-# CONFIG_CMD_XIMG is not set
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
-# CONFIG_CMD_LOADB is not set
-# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
+CONFIG_CMD_ROCKUSB=y
CONFIG_CMD_USB_MASS_STORAGE=y
-# CONFIG_CMD_ITEST is not set
-# CONFIG_CMD_SETEXPR is not set
-# CONFIG_CMD_SLEEP is not set
-# CONFIG_SPL_DOS_PARTITION is not set
-# CONFIG_ISO_PARTITION is not set
-CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
+CONFIG_CMD_RNG=y
+CONFIG_CMD_KASLRSEED=y
+CONFIG_CMD_REGULATOR=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_LIVE=y
-CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
@@ -50,26 +42,30 @@
CONFIG_SUPPORT_EMMC_RPMB=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_PHY_REALTEK=y
+CONFIG_DM_ETH_PHY=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_GMAC_ROCKCHIP=y
-CONFIG_PHY=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
CONFIG_PINCTRL=y
CONFIG_REGULATOR_PWM=y
CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_SPL_DM_REGULATOR_FIXED=y
+CONFIG_DM_REGULATOR_GPIO=y
CONFIG_PWM_ROCKCHIP=y
CONFIG_RAM=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550_MEM32=y
+CONFIG_SYSINFO=y
CONFIG_SYSRESET=y
CONFIG_USB=y
+CONFIG_DM_USB_GADGET=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
-CONFIG_USB_DWC2=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_DWC2_OTG=y
CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_SPL_TINY_MEMSET=y
+CONFIG_USB_FUNCTION_ROCKUSB=y
CONFIG_LZO=y
CONFIG_ERRNO_STR=y
-# CONFIG_EFI_LOADER is not set
diff --git a/configs/roc-cc-rk3328_defconfig b/configs/roc-cc-rk3328_defconfig
index 6526d26..1dbd39e 100644
--- a/configs/roc-cc-rk3328_defconfig
+++ b/configs/roc-cc-rk3328_defconfig
@@ -62,6 +62,7 @@
CONFIG_PHY_GIGE=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_GMAC_ROCKCHIP=y
+CONFIG_PHY_ROCKCHIP_INNO_HDMI=y
CONFIG_PHY_ROCKCHIP_INNO_USB2=y
CONFIG_PINCTRL=y
CONFIG_SPL_PINCTRL=y
@@ -94,6 +95,10 @@
CONFIG_USB_DWC2=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_GENERIC=y
+CONFIG_VIDEO=y
+CONFIG_DISPLAY=y
+CONFIG_VIDEO_ROCKCHIP=y
+CONFIG_DISPLAY_ROCKCHIP_HDMI=y
CONFIG_SPL_TINY_MEMSET=y
CONFIG_TPL_TINY_MEMSET=y
CONFIG_ERRNO_STR=y
diff --git a/configs/rock-3a-rk3568_defconfig b/configs/rock-3a-rk3568_defconfig
index c161bc9..b06b57f 100644
--- a/configs/rock-3a-rk3568_defconfig
+++ b/configs/rock-3a-rk3568_defconfig
@@ -2,7 +2,6 @@
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_NR_DRAM_BANKS=2
CONFIG_SF_DEFAULT_SPEED=24000000
CONFIG_SF_DEFAULT_MODE=0x2000
CONFIG_DEFAULT_DEVICE_TREE="rk3568-rock-3a"
diff --git a/configs/rock-pi-4-rk3399_defconfig b/configs/rock-pi-4-rk3399_defconfig
index bca44be..315b8b8 100644
--- a/configs/rock-pi-4-rk3399_defconfig
+++ b/configs/rock-pi-4-rk3399_defconfig
@@ -3,25 +3,30 @@
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
CONFIG_NR_DRAM_BANKS=1
+CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_DEFAULT_DEVICE_TREE="rk3399-rock-pi-4a"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_ROCKCHIP_RK3399=y
+CONFIG_ROCKCHIP_SPI_IMAGE=y
CONFIG_TARGET_ROCKPI4_RK3399=y
CONFIG_DEBUG_UART_BASE=0xFF1A0000
CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI=y
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_PCI=y
CONFIG_DEBUG_UART=y
# CONFIG_ANDROID_BOOT_IMAGE is not set
CONFIG_SPL_FIT_SIGNATURE=y
-CONFIG_LEGACY_IMAGE_FORMAT=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock-pi-4a.dtb"
CONFIG_DISPLAY_BOARDINFO_LATE=y
-CONFIG_SPL_MAX_SIZE=0x2e000
+CONFIG_SPL_MAX_SIZE=0x40000
CONFIG_SPL_PAD_TO=0x7f8000
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0xE0000
CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
CONFIG_TPL=y
CONFIG_CMD_BOOTZ=y
@@ -40,14 +45,20 @@
CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_DFU_MMC=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_ROCKCHIP_IODOMAIN=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_SF_DEFAULT_BUS=1
+CONFIG_SPI_FLASH_SFDP_SUPPORT=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_SPI_FLASH_XTX=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_GMAC_ROCKCHIP=y
CONFIG_NVME_PCI=y
@@ -61,6 +72,7 @@
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550_MEM32=y
+CONFIG_ROCKCHIP_SPI=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
@@ -81,7 +93,6 @@
CONFIG_DISPLAY=y
CONFIG_VIDEO_ROCKCHIP=y
CONFIG_DISPLAY_ROCKCHIP_HDMI=y
-CONFIG_SPL_TINY_MEMSET=y
CONFIG_ERRNO_STR=y
CONFIG_EFI_CAPSULE_ON_DISK=y
CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y
diff --git a/configs/rock-pi-n8-rk3288_defconfig b/configs/rock-pi-n8-rk3288_defconfig
index 695effc..4c09b91 100644
--- a/configs/rock-pi-n8-rk3288_defconfig
+++ b/configs/rock-pi-n8-rk3288_defconfig
@@ -17,6 +17,8 @@
CONFIG_TARGET_EVB_RK3288=y
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_SPL_STACK=0xff718000
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
CONFIG_DEBUG_UART_BASE=0xff690000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x800800
@@ -29,8 +31,6 @@
CONFIG_SPL_PAD_TO=0x7f8000
CONFIG_SPL_NO_BSS_LIMIT=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
-CONFIG_SPL_STACK_R=y
-CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
CONFIG_CMD_SPL=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
diff --git a/configs/rock-pi-s-rk3308_defconfig b/configs/rock-pi-s-rk3308_defconfig
index 1e9cd2c..37a124e 100644
--- a/configs/rock-pi-s-rk3308_defconfig
+++ b/configs/rock-pi-s-rk3308_defconfig
@@ -6,7 +6,6 @@
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_ROCKCHIP_RK3308=y
-CONFIG_SPL_DRIVERS_MISC=y
CONFIG_TARGET_EVB_RK3308=y
CONFIG_DEBUG_UART_BASE=0xFF0A0000
CONFIG_DEBUG_UART_CLOCK=24000000
@@ -17,30 +16,22 @@
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3308-rock-pi-s.dtb"
-CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_CPUINFO is not set
-CONFIG_SPL_MAX_SIZE=0x20000
+CONFIG_SPL_MAX_SIZE=0x40000
CONFIG_SPL_PAD_TO=0x7f8000
-# CONFIG_CMD_BDI is not set
-# CONFIG_CMD_CONSOLE is not set
-# CONFIG_CMD_ELF is not set
-# CONFIG_CMD_IMI is not set
-# CONFIG_CMD_XIMG is not set
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
-# CONFIG_CMD_LOADB is not set
-# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
+CONFIG_CMD_ROCKUSB=y
CONFIG_CMD_USB_MASS_STORAGE=y
-# CONFIG_CMD_ITEST is not set
-# CONFIG_CMD_SETEXPR is not set
-# CONFIG_CMD_SLEEP is not set
-# CONFIG_SPL_DOS_PARTITION is not set
-# CONFIG_ISO_PARTITION is not set
-CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
+CONFIG_CMD_RNG=y
+CONFIG_CMD_KASLRSEED=y
+CONFIG_CMD_REGULATOR=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_LIVE=y
-CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
@@ -51,9 +42,11 @@
CONFIG_SUPPORT_EMMC_RPMB=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_PHY_REALTEK=y
+CONFIG_DM_ETH_PHY=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_GMAC_ROCKCHIP=y
-CONFIG_PHY=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
CONFIG_PINCTRL=y
CONFIG_REGULATOR_PWM=y
CONFIG_DM_REGULATOR_FIXED=y
@@ -62,15 +55,15 @@
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550_MEM32=y
+CONFIG_SYSINFO=y
CONFIG_SYSRESET=y
CONFIG_USB=y
+CONFIG_DM_USB_GADGET=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
-CONFIG_USB_DWC2=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_DWC2_OTG=y
CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_SPL_TINY_MEMSET=y
+CONFIG_USB_FUNCTION_ROCKUSB=y
CONFIG_LZO=y
CONFIG_ERRNO_STR=y
-# CONFIG_EFI_LOADER is not set
diff --git a/configs/rock2_defconfig b/configs/rock2_defconfig
index 3ebfb4e..2f6799c 100644
--- a/configs/rock2_defconfig
+++ b/configs/rock2_defconfig
@@ -16,6 +16,8 @@
CONFIG_TARGET_ROCK2=y
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_SPL_STACK=0xff718000
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
CONFIG_DEBUG_UART_BASE=0xff690000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x800800
@@ -30,8 +32,6 @@
CONFIG_SPL_PAD_TO=0x7f8000
CONFIG_SPL_NO_BSS_LIMIT=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
-CONFIG_SPL_STACK_R=y
-CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
diff --git a/configs/rock5a-rk3588s_defconfig b/configs/rock5a-rk3588s_defconfig
index ebe2d4a..01df911 100644
--- a/configs/rock5a-rk3588s_defconfig
+++ b/configs/rock5a-rk3588s_defconfig
@@ -2,7 +2,6 @@
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_NR_DRAM_BANKS=2
CONFIG_DEFAULT_DEVICE_TREE="rk3588s-rock-5a"
CONFIG_ROCKCHIP_RK3588=y
CONFIG_SPL_SERIAL=y
@@ -16,7 +15,6 @@
CONFIG_SPL_FIT_SIGNATURE=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_LEGACY_IMAGE_FORMAT=y
-CONFIG_OF_BOARD_SETUP=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588s-rock-5a.dtb"
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
diff --git a/configs/rock5b-rk3588_defconfig b/configs/rock5b-rk3588_defconfig
index 58c7c44..9e14b14 100644
--- a/configs/rock5b-rk3588_defconfig
+++ b/configs/rock5b-rk3588_defconfig
@@ -3,7 +3,6 @@
CONFIG_SYS_HAS_NONCACHED_MEMORY=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_NR_DRAM_BANKS=2
CONFIG_SF_DEFAULT_SPEED=24000000
CONFIG_SF_DEFAULT_MODE=0x2000
CONFIG_DEFAULT_DEVICE_TREE="rk3588-rock-5b"
@@ -24,7 +23,6 @@
CONFIG_SPL_FIT_SIGNATURE=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_LEGACY_IMAGE_FORMAT=y
-CONFIG_OF_BOARD_SETUP=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-rock-5b.dtb"
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
@@ -75,7 +73,6 @@
CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
CONFIG_PHY_ROCKCHIP_USBDP=y
CONFIG_SPL_PINCTRL=y
-CONFIG_REGULATOR_PWM=y
CONFIG_PWM_ROCKCHIP=y
CONFIG_SPL_RAM=y
CONFIG_SCSI=y
@@ -102,7 +99,6 @@
CONFIG_USB_ETHER_RTL8152=y
CONFIG_USB_ETHER_SMSC95XX=y
CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_PRODUCT_NUM=0x350b
CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_USB_FUNCTION_ROCKUSB=y
CONFIG_ERRNO_STR=y
diff --git a/configs/rock_defconfig b/configs/rock_defconfig
index b3fa76f..2b5334c 100644
--- a/configs/rock_defconfig
+++ b/configs/rock_defconfig
@@ -18,6 +18,8 @@
CONFIG_TARGET_ROCK=y
CONFIG_SPL_STACK_R_ADDR=0x60080000
CONFIG_SPL_STACK=0x10087fff
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
CONFIG_DEBUG_UART_BASE=0x20064000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x60800800
@@ -30,8 +32,6 @@
CONFIG_SPL_PAD_TO=0x7f8000
CONFIG_SPL_NO_BSS_LIMIT=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
-CONFIG_SPL_STACK_R=y
-CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SPI=y
diff --git a/configs/rut_defconfig b/configs/rut_defconfig
index be00808..7e78f1d 100644
--- a/configs/rut_defconfig
+++ b/configs/rut_defconfig
@@ -17,6 +17,7 @@
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_BOOTCOUNT_BOOTLIMIT=3
+CONFIG_SPL_BSS_START_ADDR=0x80000000
CONFIG_SPL=y
CONFIG_SPL_FS_FAT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
@@ -37,7 +38,6 @@
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_ARCH_MISC_INIT=y
-CONFIG_SPL_BSS_START_ADDR=0x80000000
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x80208000
diff --git a/configs/rzg2_beacon_defconfig b/configs/rzg2_beacon_defconfig
index f4b63ad..4aabb1f 100644
--- a/configs/rzg2_beacon_defconfig
+++ b/configs/rzg2_beacon_defconfig
@@ -5,7 +5,7 @@
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ENV_OFFSET=0x0
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="r8a774a1-beacon-rzg2m-kit"
+CONFIG_DEFAULT_DEVICE_TREE="renesas/r8a774a1-beacon-rzg2m-kit"
CONFIG_RCAR_GEN3=y
CONFIG_TARGET_BEACON_RZG2M=y
CONFIG_SYS_MONITOR_LEN=1048576
@@ -39,7 +39,7 @@
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_OF_CONTROL=y
-CONFIG_OF_LIST="r8a774a1-beacon-rzg2m-kit r8a774b1-beacon-rzg2n-kit r8a774e1-beacon-rzg2h-kit"
+CONFIG_OF_LIST="renesas/r8a774a1-beacon-rzg2m-kit renesas/r8a774b1-beacon-rzg2n-kit renesas/r8a774e1-beacon-rzg2h-kit"
CONFIG_MULTI_DTB_FIT_LZO=y
CONFIG_MULTI_DTB_FIT_USER_DEFINED_AREA=y
CONFIG_ENV_OVERWRITE=y
diff --git a/configs/rzn1_snarc_defconfig b/configs/rzn1_snarc_defconfig
index 29a96d1..c7f3e27 100644
--- a/configs/rzn1_snarc_defconfig
+++ b/configs/rzn1_snarc_defconfig
@@ -16,6 +16,7 @@
# CONFIG_SYS_ALT_MEMTEST_BITFLIP is not set
CONFIG_CMD_CLK=y
CONFIG_OF_CONTROL=y
+# CONFIG_OF_UPSTREAM is not set
CONFIG_RAM=y
CONFIG_CADENCE_DDR_CTRL=y
CONFIG_SYS_NS16550=y
diff --git a/configs/s400_defconfig b/configs/s400_defconfig
index 8e22c95..d75d296 100644
--- a/configs/s400_defconfig
+++ b/configs/s400_defconfig
@@ -6,7 +6,7 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="meson-axg-s400"
+CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-axg-s400"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_MESON_AXG=y
diff --git a/configs/sama5d27_giantboard_defconfig b/configs/sama5d27_giantboard_defconfig
index 6637d15..283c930 100644
--- a/configs/sama5d27_giantboard_defconfig
+++ b/configs/sama5d27_giantboard_defconfig
@@ -20,6 +20,9 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x218000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x20000000
+CONFIG_SPL_BSS_MAX_SIZE=0x80000
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0xf8020000
CONFIG_DEBUG_UART_CLOCK=82000000
@@ -44,9 +47,6 @@
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_MISC_INIT_R=y
CONFIG_SPL_MAX_SIZE=0x10000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x20000000
-CONFIG_SPL_BSS_MAX_SIZE=0x80000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_SYS_MALLOC_SIZE=0x80000
diff --git a/configs/sama5d27_som1_ek_mmc1_defconfig b/configs/sama5d27_som1_ek_mmc1_defconfig
index b8c794c..89622c0 100644
--- a/configs/sama5d27_som1_ek_mmc1_defconfig
+++ b/configs/sama5d27_som1_ek_mmc1_defconfig
@@ -20,6 +20,9 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x218000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x20000000
+CONFIG_SPL_BSS_MAX_SIZE=0x80000
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0xf8020000
CONFIG_DEBUG_UART_CLOCK=82000000
@@ -41,9 +44,6 @@
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_MISC_INIT_R=y
CONFIG_SPL_MAX_SIZE=0x10000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x20000000
-CONFIG_SPL_BSS_MAX_SIZE=0x80000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_SYS_MALLOC_SIZE=0x80000
diff --git a/configs/sama5d27_som1_ek_mmc_defconfig b/configs/sama5d27_som1_ek_mmc_defconfig
index 03448ec..ef6f9fb 100644
--- a/configs/sama5d27_som1_ek_mmc_defconfig
+++ b/configs/sama5d27_som1_ek_mmc_defconfig
@@ -21,6 +21,9 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x218000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x20000000
+CONFIG_SPL_BSS_MAX_SIZE=0x80000
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0xf8020000
CONFIG_DEBUG_UART_CLOCK=82000000
@@ -42,9 +45,6 @@
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_MISC_INIT_R=y
CONFIG_SPL_MAX_SIZE=0x10000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x20000000
-CONFIG_SPL_BSS_MAX_SIZE=0x80000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_SYS_MALLOC_SIZE=0x80000
diff --git a/configs/sama5d27_som1_ek_qspiflash_defconfig b/configs/sama5d27_som1_ek_qspiflash_defconfig
index 349f3a7..0693a5b 100644
--- a/configs/sama5d27_som1_ek_qspiflash_defconfig
+++ b/configs/sama5d27_som1_ek_qspiflash_defconfig
@@ -21,6 +21,9 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x218000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x20000000
+CONFIG_SPL_BSS_MAX_SIZE=0x80000
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0xf8020000
CONFIG_DEBUG_UART_CLOCK=82000000
@@ -40,9 +43,6 @@
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_MISC_INIT_R=y
CONFIG_SPL_MAX_SIZE=0x10000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x20000000
-CONFIG_SPL_BSS_MAX_SIZE=0x80000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_SYS_MALLOC_SIZE=0x80000
diff --git a/configs/sama5d27_wlsom1_ek_mmc_defconfig b/configs/sama5d27_wlsom1_ek_mmc_defconfig
index 25e95d5..89a5bcd 100644
--- a/configs/sama5d27_wlsom1_ek_mmc_defconfig
+++ b/configs/sama5d27_wlsom1_ek_mmc_defconfig
@@ -19,6 +19,9 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x218000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x20000000
+CONFIG_SPL_BSS_MAX_SIZE=0x80000
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0xf801c000
CONFIG_DEBUG_UART_CLOCK=82000000
@@ -41,9 +44,6 @@
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_MISC_INIT_R=y
CONFIG_SPL_MAX_SIZE=0x10000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x20000000
-CONFIG_SPL_BSS_MAX_SIZE=0x80000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_SYS_MALLOC_SIZE=0x80000
diff --git a/configs/sama5d27_wlsom1_ek_qspiflash_defconfig b/configs/sama5d27_wlsom1_ek_qspiflash_defconfig
index 9c319d2..a070445 100644
--- a/configs/sama5d27_wlsom1_ek_qspiflash_defconfig
+++ b/configs/sama5d27_wlsom1_ek_qspiflash_defconfig
@@ -19,6 +19,9 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x218000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x20000000
+CONFIG_SPL_BSS_MAX_SIZE=0x80000
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0xf801c000
CONFIG_DEBUG_UART_CLOCK=82000000
@@ -41,9 +44,6 @@
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_MISC_INIT_R=y
CONFIG_SPL_MAX_SIZE=0x10000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x20000000
-CONFIG_SPL_BSS_MAX_SIZE=0x80000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_SYS_MALLOC_SIZE=0x80000
diff --git a/configs/sama5d2_icp_mmc_defconfig b/configs/sama5d2_icp_mmc_defconfig
index faf1f43..6b9fa27 100644
--- a/configs/sama5d2_icp_mmc_defconfig
+++ b/configs/sama5d2_icp_mmc_defconfig
@@ -19,6 +19,9 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x218000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x20000000
+CONFIG_SPL_BSS_MAX_SIZE=0x80000
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0xf801c000
CONFIG_DEBUG_UART_CLOCK=83000000
@@ -41,9 +44,6 @@
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_MISC_INIT_R=y
CONFIG_SPL_MAX_SIZE=0x10000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x20000000
-CONFIG_SPL_BSS_MAX_SIZE=0x80000
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_SYS_MALLOC=y
diff --git a/configs/sama5d2_xplained_emmc_defconfig b/configs/sama5d2_xplained_emmc_defconfig
index 90e64bf..e242347 100644
--- a/configs/sama5d2_xplained_emmc_defconfig
+++ b/configs/sama5d2_xplained_emmc_defconfig
@@ -20,6 +20,9 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x218000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x20000000
+CONFIG_SPL_BSS_MAX_SIZE=0x80000
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0xf8020000
CONFIG_DEBUG_UART_CLOCK=83000000
@@ -41,9 +44,6 @@
CONFIG_SYS_PBSIZE=276
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SPL_MAX_SIZE=0x10000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x20000000
-CONFIG_SPL_BSS_MAX_SIZE=0x80000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_SYS_MALLOC_SIZE=0x80000
diff --git a/configs/sama5d2_xplained_mmc_defconfig b/configs/sama5d2_xplained_mmc_defconfig
index c9b8681..40d9858 100644
--- a/configs/sama5d2_xplained_mmc_defconfig
+++ b/configs/sama5d2_xplained_mmc_defconfig
@@ -21,6 +21,9 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x218000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x20000000
+CONFIG_SPL_BSS_MAX_SIZE=0x80000
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0xf8020000
CONFIG_DEBUG_UART_CLOCK=83000000
@@ -43,9 +46,6 @@
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_MISC_INIT_R=y
CONFIG_SPL_MAX_SIZE=0x10000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x20000000
-CONFIG_SPL_BSS_MAX_SIZE=0x80000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_SYS_MALLOC_SIZE=0x80000
diff --git a/configs/sama5d2_xplained_qspiflash_defconfig b/configs/sama5d2_xplained_qspiflash_defconfig
index d1cdb90..36aaa83 100644
--- a/configs/sama5d2_xplained_qspiflash_defconfig
+++ b/configs/sama5d2_xplained_qspiflash_defconfig
@@ -21,6 +21,9 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x218000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x20000000
+CONFIG_SPL_BSS_MAX_SIZE=0x80000
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0xf8020000
CONFIG_DEBUG_UART_CLOCK=83000000
@@ -44,9 +47,6 @@
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_MISC_INIT_R=y
CONFIG_SPL_MAX_SIZE=0x10000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x20000000
-CONFIG_SPL_BSS_MAX_SIZE=0x80000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_SYS_MALLOC_SIZE=0x80000
diff --git a/configs/sama5d2_xplained_spiflash_defconfig b/configs/sama5d2_xplained_spiflash_defconfig
index 4807f4f..9fd254e 100644
--- a/configs/sama5d2_xplained_spiflash_defconfig
+++ b/configs/sama5d2_xplained_spiflash_defconfig
@@ -23,6 +23,9 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x218000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x20000000
+CONFIG_SPL_BSS_MAX_SIZE=0x80000
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0xf8020000
CONFIG_DEBUG_UART_CLOCK=83000000
@@ -45,9 +48,6 @@
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_MISC_INIT_R=y
CONFIG_SPL_MAX_SIZE=0x10000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x20000000
-CONFIG_SPL_BSS_MAX_SIZE=0x80000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_SYS_MALLOC_SIZE=0x80000
diff --git a/configs/sama5d3_xplained_mmc_defconfig b/configs/sama5d3_xplained_mmc_defconfig
index 7d0ed1b..5fb7aa6 100644
--- a/configs/sama5d3_xplained_mmc_defconfig
+++ b/configs/sama5d3_xplained_mmc_defconfig
@@ -20,6 +20,9 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x318000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x20000000
+CONFIG_SPL_BSS_MAX_SIZE=0x80000
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0xffffee00
CONFIG_DEBUG_UART_CLOCK=132000000
@@ -40,9 +43,6 @@
CONFIG_SYS_PBSIZE=276
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SPL_MAX_SIZE=0x18000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x20000000
-CONFIG_SPL_BSS_MAX_SIZE=0x80000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_SYS_MALLOC_SIZE=0x80000
diff --git a/configs/sama5d3_xplained_nandflash_defconfig b/configs/sama5d3_xplained_nandflash_defconfig
index 756ffd1..054e52e 100644
--- a/configs/sama5d3_xplained_nandflash_defconfig
+++ b/configs/sama5d3_xplained_nandflash_defconfig
@@ -18,6 +18,9 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x318000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x20000000
+CONFIG_SPL_BSS_MAX_SIZE=0x80000
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0xffffee00
CONFIG_DEBUG_UART_CLOCK=132000000
@@ -37,9 +40,6 @@
CONFIG_SYS_PBSIZE=276
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SPL_MAX_SIZE=0x18000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x20000000
-CONFIG_SPL_BSS_MAX_SIZE=0x80000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_SYS_MALLOC_SIZE=0x80000
diff --git a/configs/sama5d3xek_mmc_defconfig b/configs/sama5d3xek_mmc_defconfig
index 82541c2..0072ce4 100644
--- a/configs/sama5d3xek_mmc_defconfig
+++ b/configs/sama5d3xek_mmc_defconfig
@@ -20,6 +20,9 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x318000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x20000000
+CONFIG_SPL_BSS_MAX_SIZE=0x80000
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0xffffee00
CONFIG_DEBUG_UART_CLOCK=132000000
@@ -42,9 +45,6 @@
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SPL_MAX_SIZE=0x18000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x20000000
-CONFIG_SPL_BSS_MAX_SIZE=0x80000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_SYS_MALLOC_SIZE=0x80000
diff --git a/configs/sama5d3xek_nandflash_defconfig b/configs/sama5d3xek_nandflash_defconfig
index a886664..0c00293 100644
--- a/configs/sama5d3xek_nandflash_defconfig
+++ b/configs/sama5d3xek_nandflash_defconfig
@@ -18,6 +18,9 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x318000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x20000000
+CONFIG_SPL_BSS_MAX_SIZE=0x80000
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0xffffee00
CONFIG_DEBUG_UART_CLOCK=132000000
@@ -39,9 +42,6 @@
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SPL_MAX_SIZE=0x18000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x20000000
-CONFIG_SPL_BSS_MAX_SIZE=0x80000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_SYS_MALLOC_SIZE=0x80000
diff --git a/configs/sama5d3xek_spiflash_defconfig b/configs/sama5d3xek_spiflash_defconfig
index 25a330a..95624a1 100644
--- a/configs/sama5d3xek_spiflash_defconfig
+++ b/configs/sama5d3xek_spiflash_defconfig
@@ -22,6 +22,9 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x318000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x20000000
+CONFIG_SPL_BSS_MAX_SIZE=0x80000
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0xffffee00
CONFIG_DEBUG_UART_CLOCK=132000000
@@ -42,9 +45,6 @@
CONFIG_SYS_PBSIZE=276
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SPL_MAX_SIZE=0x18000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x20000000
-CONFIG_SPL_BSS_MAX_SIZE=0x80000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_SYS_MALLOC_SIZE=0x80000
diff --git a/configs/sama5d4_xplained_mmc_defconfig b/configs/sama5d4_xplained_mmc_defconfig
index 280f7ee..40440c5 100644
--- a/configs/sama5d4_xplained_mmc_defconfig
+++ b/configs/sama5d4_xplained_mmc_defconfig
@@ -21,6 +21,9 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x218000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x20000000
+CONFIG_SPL_BSS_MAX_SIZE=0x80000
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0xfc00c000
CONFIG_DEBUG_UART_CLOCK=100000000
@@ -42,9 +45,6 @@
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_MISC_INIT_R=y
CONFIG_SPL_MAX_SIZE=0x18000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x20000000
-CONFIG_SPL_BSS_MAX_SIZE=0x80000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_SYS_MALLOC_SIZE=0x80000
diff --git a/configs/sama5d4_xplained_nandflash_defconfig b/configs/sama5d4_xplained_nandflash_defconfig
index f956104..abdde54 100644
--- a/configs/sama5d4_xplained_nandflash_defconfig
+++ b/configs/sama5d4_xplained_nandflash_defconfig
@@ -19,6 +19,9 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x218000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x20000000
+CONFIG_SPL_BSS_MAX_SIZE=0x80000
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0xfc00c000
CONFIG_DEBUG_UART_CLOCK=100000000
@@ -39,9 +42,6 @@
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_MISC_INIT_R=y
CONFIG_SPL_MAX_SIZE=0x18000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x20000000
-CONFIG_SPL_BSS_MAX_SIZE=0x80000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_SYS_MALLOC_SIZE=0x80000
diff --git a/configs/sama5d4_xplained_spiflash_defconfig b/configs/sama5d4_xplained_spiflash_defconfig
index 754cde6..f814a94 100644
--- a/configs/sama5d4_xplained_spiflash_defconfig
+++ b/configs/sama5d4_xplained_spiflash_defconfig
@@ -23,6 +23,9 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x218000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x20000000
+CONFIG_SPL_BSS_MAX_SIZE=0x80000
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0xfc00c000
CONFIG_DEBUG_UART_CLOCK=100000000
@@ -44,9 +47,6 @@
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_MISC_INIT_R=y
CONFIG_SPL_MAX_SIZE=0x18000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x20000000
-CONFIG_SPL_BSS_MAX_SIZE=0x80000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_SYS_MALLOC_SIZE=0x80000
diff --git a/configs/sama5d4ek_mmc_defconfig b/configs/sama5d4ek_mmc_defconfig
index 780b295..3d3cc2d 100644
--- a/configs/sama5d4ek_mmc_defconfig
+++ b/configs/sama5d4ek_mmc_defconfig
@@ -20,6 +20,9 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x218000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x20000000
+CONFIG_SPL_BSS_MAX_SIZE=0x80000
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0xfc00c000
CONFIG_DEBUG_UART_CLOCK=88000000
@@ -42,9 +45,6 @@
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SPL_MAX_SIZE=0x18000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x20000000
-CONFIG_SPL_BSS_MAX_SIZE=0x80000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_SYS_MALLOC_SIZE=0x80000
diff --git a/configs/sama5d4ek_nandflash_defconfig b/configs/sama5d4ek_nandflash_defconfig
index 8f66d8e..551c87e 100644
--- a/configs/sama5d4ek_nandflash_defconfig
+++ b/configs/sama5d4ek_nandflash_defconfig
@@ -18,6 +18,9 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x218000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x20000000
+CONFIG_SPL_BSS_MAX_SIZE=0x80000
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0xfc00c000
CONFIG_DEBUG_UART_CLOCK=88000000
@@ -39,9 +42,6 @@
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SPL_MAX_SIZE=0x18000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x20000000
-CONFIG_SPL_BSS_MAX_SIZE=0x80000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_SYS_MALLOC_SIZE=0x80000
diff --git a/configs/sama5d4ek_spiflash_defconfig b/configs/sama5d4ek_spiflash_defconfig
index d132f85..5b4628a 100644
--- a/configs/sama5d4ek_spiflash_defconfig
+++ b/configs/sama5d4ek_spiflash_defconfig
@@ -22,6 +22,9 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x218000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x20000000
+CONFIG_SPL_BSS_MAX_SIZE=0x80000
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0xfc00c000
CONFIG_DEBUG_UART_CLOCK=88000000
@@ -42,9 +45,6 @@
CONFIG_SYS_PBSIZE=276
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SPL_MAX_SIZE=0x18000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x20000000
-CONFIG_SPL_BSS_MAX_SIZE=0x80000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_SYS_MALLOC_SIZE=0x80000
diff --git a/configs/sama7g54_curiosity_mmc_defconfig b/configs/sama7g54_curiosity_mmc_defconfig
index fa363682..00a091d 100644
--- a/configs/sama7g54_curiosity_mmc_defconfig
+++ b/configs/sama7g54_curiosity_mmc_defconfig
@@ -117,7 +117,6 @@
CONFIG_SYSRESET_AT91=y
CONFIG_TIMER=y
CONFIG_MCHP_PIT64B_TIMER=y
-CONFIG_FAT_WRITE=y
CONFIG_CMD_DHRYSTONE=y
# CONFIG_EFI_LOADER is not set
CONFIG_PHANDLE_CHECK_SEQ=y
diff --git a/configs/sama7g54_curiosity_nandflash_defconfig b/configs/sama7g54_curiosity_nandflash_defconfig
index 331bb8d..0b2116d 100644
--- a/configs/sama7g54_curiosity_nandflash_defconfig
+++ b/configs/sama7g54_curiosity_nandflash_defconfig
@@ -8,7 +8,6 @@
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x60044000
CONFIG_SF_DEFAULT_SPEED=50000000
-CONFIG_ENV_SECT_SIZE=0x1000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="at91-sama7g54_curiosity"
CONFIG_OF_LIBFDT_OVERLAY=y
diff --git a/configs/sandbox64_defconfig b/configs/sandbox64_defconfig
index a62faf7..2bd4eea 100644
--- a/configs/sandbox64_defconfig
+++ b/configs/sandbox64_defconfig
@@ -135,7 +135,6 @@
CONFIG_DM_DEMO=y
CONFIG_DM_DEMO_SIMPLE=y
CONFIG_DM_DEMO_SHAPE=y
-CONFIG_DFU_SF=y
CONFIG_FASTBOOT_FLASH=y
CONFIG_FASTBOOT_FLASH_MMC_DEV=0
CONFIG_ARM_FFA_TRANSPORT=y
@@ -268,12 +267,8 @@
CONFIG_TPM=y
CONFIG_ERRNO_STR=y
CONFIG_GETOPT=y
-CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y
-CONFIG_EFI_CAPSULE_ON_DISK=y
-CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y
CONFIG_EFI_SECURE_BOOT=y
CONFIG_TEST_FDTDEC=y
-CONFIG_FWU_MULTI_BANK_UPDATE=y
CONFIG_UNIT_TEST=y
CONFIG_UT_TIME=y
CONFIG_UT_DM=y
diff --git a/configs/sandbox_noinst_defconfig b/configs/sandbox_noinst_defconfig
index 137b3c6..f372301 100644
--- a/configs/sandbox_noinst_defconfig
+++ b/configs/sandbox_noinst_defconfig
@@ -281,8 +281,6 @@
CONFIG_ZSTD=y
CONFIG_SPL_LZMA=y
CONFIG_ERRNO_STR=y
-CONFIG_EFI_CAPSULE_ON_DISK=y
-CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y
CONFIG_UNIT_TEST=y
CONFIG_SPL_UNIT_TEST=y
CONFIG_UT_TIME=y
diff --git a/configs/sandbox_spl_defconfig b/configs/sandbox_spl_defconfig
index d0cd91e..f7b92dc 100644
--- a/configs/sandbox_spl_defconfig
+++ b/configs/sandbox_spl_defconfig
@@ -249,8 +249,6 @@
CONFIG_SPL_LZMA=y
CONFIG_ERRNO_STR=y
CONFIG_SPL_HEXDUMP=y
-CONFIG_EFI_CAPSULE_ON_DISK=y
-CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y
CONFIG_UNIT_TEST=y
CONFIG_SPL_UNIT_TEST=y
CONFIG_UT_TIME=y
diff --git a/configs/sandbox_vpl_defconfig b/configs/sandbox_vpl_defconfig
index b138b35..72483d8 100644
--- a/configs/sandbox_vpl_defconfig
+++ b/configs/sandbox_vpl_defconfig
@@ -252,8 +252,6 @@
CONFIG_ZSTD=y
# CONFIG_VPL_LZMA is not set
CONFIG_ERRNO_STR=y
-CONFIG_EFI_CAPSULE_ON_DISK=y
-CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y
CONFIG_UNIT_TEST=y
CONFIG_SPL_UNIT_TEST=y
CONFIG_UT_TIME=y
diff --git a/configs/sei510_defconfig b/configs/sei510_defconfig
index c4a49fb..791979e 100644
--- a/configs/sei510_defconfig
+++ b/configs/sei510_defconfig
@@ -10,7 +10,7 @@
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0xFFFF0000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="meson-g12a-sei510"
+CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-g12a-sei510"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_MESON_G12A=y
diff --git a/configs/sei610_defconfig b/configs/sei610_defconfig
index ae254c6..ce53743 100644
--- a/configs/sei610_defconfig
+++ b/configs/sei610_defconfig
@@ -10,7 +10,7 @@
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0xFFFF0000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="meson-sm1-sei610"
+CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-sm1-sei610"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_MESON_G12A=y
diff --git a/configs/sheevaplug_defconfig b/configs/sheevaplug_defconfig
index 0af87dc..b673b3f 100644
--- a/configs/sheevaplug_defconfig
+++ b/configs/sheevaplug_defconfig
@@ -13,7 +13,7 @@
CONFIG_TARGET_SHEEVAPLUG=y
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0x80000
-CONFIG_DEFAULT_DEVICE_TREE="kirkwood-sheevaplug"
+CONFIG_DEFAULT_DEVICE_TREE="marvell/kirkwood-sheevaplug"
CONFIG_IDENT_STRING="\nMarvell-Sheevaplug"
CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_HAS_BOARD_SIZE_LIMIT=y
diff --git a/configs/sifive_unleashed_defconfig b/configs/sifive_unleashed_defconfig
index f68171c..2365cc7 100644
--- a/configs/sifive_unleashed_defconfig
+++ b/configs/sifive_unleashed_defconfig
@@ -10,6 +10,7 @@
CONFIG_DM_RESET=y
CONFIG_SPL_MMC=y
CONFIG_SPL_STACK=0x81cfe70
+CONFIG_SPL_BSS_START_ADDR=0x85000000
CONFIG_SPL=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI=y
@@ -30,7 +31,6 @@
CONFIG_DISPLAY_BOARDINFO=y
CONFIG_MISC_INIT_R=y
CONFIG_SPL_MAX_SIZE=0x100000
-CONFIG_SPL_BSS_START_ADDR=0x85000000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_DM_SPI_FLASH=y
diff --git a/configs/sifive_unmatched_defconfig b/configs/sifive_unmatched_defconfig
index 7c6c5b4..47dbf12 100644
--- a/configs/sifive_unmatched_defconfig
+++ b/configs/sifive_unmatched_defconfig
@@ -11,6 +11,7 @@
CONFIG_DM_RESET=y
CONFIG_SPL_MMC=y
CONFIG_SPL_STACK=0x81cfe60
+CONFIG_SPL_BSS_START_ADDR=0x85000000
CONFIG_SPL=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI=y
@@ -36,7 +37,6 @@
CONFIG_ID_EEPROM=y
CONFIG_PCI_INIT_R=y
CONFIG_SPL_MAX_SIZE=0x100000
-CONFIG_SPL_BSS_START_ADDR=0x85000000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_DM_SPI_FLASH=y
diff --git a/configs/silinux_ek874_defconfig b/configs/silinux_ek874_defconfig
index 0f0aca3..4c6009d 100644
--- a/configs/silinux_ek874_defconfig
+++ b/configs/silinux_ek874_defconfig
@@ -9,12 +9,15 @@
CONFIG_ENV_OFFSET=0x3F0000
CONFIG_ENV_SECT_SIZE=0x10000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="r8a774c0-ek874-u-boot"
+CONFIG_DEFAULT_DEVICE_TREE="renesas/r8a774c0-ek874"
CONFIG_SPL_TEXT_BASE=0xe6318000
CONFIG_RCAR_GEN3=y
CONFIG_TARGET_SILINUX_EK874=y
CONFIG_SYS_MONITOR_LEN=1048576
CONFIG_SPL_STACK=0xe6304000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0xe631f000
+CONFIG_SPL_BSS_MAX_SIZE=0x1000
CONFIG_SYS_LOAD_ADDR=0x58000000
CONFIG_REMAKE_ELF=y
CONFIG_FIT=y
@@ -27,9 +30,6 @@
CONFIG_SYS_PBSIZE=2068
# CONFIG_BOARD_EARLY_INIT_F is not set
CONFIG_SYS_MALLOC_BOOTPARAMS=y
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0xe631f000
-CONFIG_SPL_BSS_MAX_SIZE=0x1000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
diff --git a/configs/silk_defconfig b/configs/silk_defconfig
index 939ccc9..2e4fab8 100644
--- a/configs/silk_defconfig
+++ b/configs/silk_defconfig
@@ -16,7 +16,7 @@
CONFIG_ENV_OFFSET=0xC0000
CONFIG_ENV_SECT_SIZE=0x40000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="r8a7794-silk-u-boot"
+CONFIG_DEFAULT_DEVICE_TREE="renesas/r8a7794-silk"
CONFIG_SPL_TEXT_BASE=0xe6300000
CONFIG_ARCH_RENESAS_BOARD_STRING="Silk"
CONFIG_R8A7794=y
diff --git a/configs/smartweb_defconfig b/configs/smartweb_defconfig
index 6668523..af08354 100644
--- a/configs/smartweb_defconfig
+++ b/configs/smartweb_defconfig
@@ -19,6 +19,9 @@
CONFIG_DEFAULT_DEVICE_TREE="at91sam9260-smartweb"
CONFIG_SPL_STACK=0x301000
CONFIG_SPL_SYS_MALLOC_F_LEN=0x400
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x20000000
+CONFIG_SPL_BSS_MAX_SIZE=0x4000
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x180000
CONFIG_SYS_LOAD_ADDR=0x22000000
@@ -37,9 +40,6 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_MAX_SIZE=0x1000
CONFIG_SPL_PAD_TO=0x20000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x20000000
-CONFIG_SPL_BSS_MAX_SIZE=0x4000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_SYS_MALLOC_SIZE=0x460000
diff --git a/configs/sniper_defconfig b/configs/sniper_defconfig
index 1afc6da..0243b15 100644
--- a/configs/sniper_defconfig
+++ b/configs/sniper_defconfig
@@ -10,6 +10,7 @@
CONFIG_SPL_TEXT_BASE=0x40200000
CONFIG_TARGET_SNIPER=y
CONFIG_SPL_STACK=0x4020fffc
+CONFIG_SPL_BSS_START_ADDR=0x80000000
CONFIG_SPL=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTCOMMAND="setenv boot_mmc_part ${kernel_mmc_part}; if test reboot-${reboot-mode} = reboot-r; then echo recovery; setenv boot_mmc_part ${recovery_mmc_part}; fi; if test reboot-${reboot-mode} = reboot-b; then echo fastboot; fastboot 0; fi; part start mmc ${boot_mmc_dev} ${boot_mmc_part} boot_mmc_start; part size mmc ${boot_mmc_dev} ${boot_mmc_part} boot_mmc_size; mmc dev ${boot_mmc_dev}; mmc read ${kernel_addr_r} ${boot_mmc_start} ${boot_mmc_size} && bootm ${kernel_addr_r};"
@@ -17,7 +18,6 @@
CONFIG_SYS_PBSIZE=538
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_SPL_MAX_SIZE=0xec00
-CONFIG_SPL_BSS_START_ADDR=0x80000000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
diff --git a/configs/socfpga_agilex5_defconfig b/configs/socfpga_agilex5_defconfig
index f39954a..dc1cef3 100644
--- a/configs/socfpga_agilex5_defconfig
+++ b/configs/socfpga_agilex5_defconfig
@@ -1,55 +1,55 @@
CONFIG_ARM=y
-CONFIG_SPL_LDSCRIPT="arch/arm/mach-socfpga/u-boot-spl-soc64.lds"
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x04000000
CONFIG_ARCH_SOCFPGA=y
CONFIG_TEXT_BASE=0x80200000
-CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_NR_DRAM_BANKS=2
+CONFIG_SPL_LDSCRIPT="arch/arm/mach-socfpga/u-boot-spl-soc64.lds"
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80300000
+CONFIG_SF_DEFAULT_MODE=0x2003
CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_OFFSET=0x04100000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="socfpga_agilex5_socdk"
+CONFIG_DM_RESET=y
+CONFIG_SPL_STACK=0x7f000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0xbff00000
+CONFIG_SPL_BSS_MAX_SIZE=0x100000
CONFIG_TARGET_SOCFPGA_AGILEX5_SOCDK=y
CONFIG_IDENT_STRING="socfpga_agilex5"
CONFIG_SPL_FS_FAT=y
-CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_LOAD_ADDR=0x82000000
CONFIG_FIT=y
CONFIG_SPL_FIT_SIGNATURE=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x82000000
-# CONFIG_USE_SPL_FIT_GENERATOR is not set
+CONFIG_LEGACY_IMAGE_FORMAT=y
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_QSPI_BOOT=y
CONFIG_BOOTDELAY=5
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 initrd=0x90000000 root=/dev/ram0 rw init=/sbin/init ramdisk_size=10000000 earlycon panic=-1 nosmp kvm-arm.mode=nvhe"
-CONFIG_LEGACY_IMAGE_FORMAT=y
+CONFIG_SPL_MAX_SIZE=0x40000
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
-CONFIG_SPL_CRC32=y
+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_CACHE=y
+CONFIG_SPL_SPI_FLASH_MTD=y
+CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x04000000
CONFIG_SPL_ATF=y
CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
CONFIG_SYS_PROMPT="SOCFPGA_AGILEX5 # "
+CONFIG_SYS_MAXARGS=32
CONFIG_CMD_NVEDIT_SELECT=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
-CONFIG_CMD_SF=y
-CONFIG_DOS_PARTITION=y
-CONFIG_SPL_DOS_PARTITION=y
-CONFIG_SPL_SYS_DISABLE_DCACHE_OPS=y
CONFIG_CMD_MTD=y
-# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
+CONFIG_CMD_WDT=y
CONFIG_CMD_CACHE=y
-CONFIG_SPL_SPI_FLASH_MTD=y
-CONFIG_SPI_FLASH_MTD=y
-CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_CMD_TIMER=y
CONFIG_CMD_UBI=y
-CONFIG_CMD_UBIFS=y
-CONFIG_MTD_UBI=y
-CONFIG_MTD_UBI_WL_THRESHOLD=4096
-CONFIG_MTD_UBI_BEB_LIMIT=20
# CONFIG_ISO_PARTITION is not set
# CONFIG_EFI_PARTITION is not set
CONFIG_OF_LIST=""
@@ -57,60 +57,34 @@
CONFIG_ENV_UBI_PART="root"
CONFIG_ENV_UBI_VOLUME="env"
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_USE_BOOTFILE=y
+CONFIG_BOOTFILE="kernel.itb"
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SPL_ALTERA_SDRAM=y
-CONFIG_FPGA_INTEL_PR=y
CONFIG_DWAPB_GPIO=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_DW=y
CONFIG_MISC=y
-CONFIG_MTD=y
CONFIG_DM_MTD=y
-CONFIG_SF_DEFAULT_MODE=0x2003
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y
-CONFIG_UBI_SILENCE_MSG=y
-CONFIG_DM_ETH=y
+# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
+CONFIG_SPI_FLASH_MTD=y
CONFIG_RGMII=y
-CONFIG_DM_RESET=y
CONFIG_SYS_NS16550_MEM32=y
CONFIG_SPI=y
CONFIG_CADENCE_QSPI=y
CONFIG_DESIGNWARE_SPI=y
-CONFIG_USB=y
-CONFIG_USB_DWC2=y
-CONFIG_USB_XHCI_HCD=y
-CONFIG_UBIFS_SILENCE_MSG=y
-# CONFIG_SPL_USE_TINY_PRINTF is not set
-CONFIG_PANIC_HANG=y
-CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_LOAD_ADDR=0x82000000
-CONFIG_WDT=y
-CONFIG_CMD_WDT=y
-CONFIG_DESIGNWARE_WATCHDOG=y
-CONFIG_SPL_WDT=y
-CONFIG_WATCHDOG_AUTOSTART=n
CONFIG_TIMER=y
CONFIG_DESIGNWARE_APB_TIMER=y
-CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
-CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80300000
-CONFIG_SPL_MAX_SIZE=0x40000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0xbff00000
-# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
-CONFIG_SPL_STACK=0x7f000
-CONFIG_SYS_SPL_MALLOC=y
-CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y
-CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0xbfa00000
-CONFIG_SYS_SPL_MALLOC_SIZE=0x500000
-CONFIG_SPL_BSS_MAX_SIZE=0x100000
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_DWC2=y
+# CONFIG_WATCHDOG_AUTOSTART is not set
+CONFIG_DESIGNWARE_WATCHDOG=y
+CONFIG_WDT=y
+# CONFIG_SPL_USE_TINY_PRINTF is not set
+CONFIG_PANIC_HANG=y
+CONFIG_SPL_CRC32=y
# CONFIG_EFI_LOADER is not set
-CONFIG_I3C=y
-CONFIG_DW_I3C_MASTER=y
-CONFIG_CMD_I3C=y
-CONFIG_SYS_MAXARGS=32
-CONFIG_CMD_TIMER=y
-# CONFIG_BOOTFILE="Image" is not set for CONFIG_SPL_ATF=y
-CONFIG_USE_BOOTFILE=y
-CONFIG_BOOTFILE="kernel.itb"
diff --git a/configs/socfpga_agilex_atf_defconfig b/configs/socfpga_agilex_atf_defconfig
index ad4cb23..4fc5c79 100644
--- a/configs/socfpga_agilex_atf_defconfig
+++ b/configs/socfpga_agilex_atf_defconfig
@@ -15,6 +15,9 @@
CONFIG_SPL_TEXT_BASE=0xFFE00000
CONFIG_DM_RESET=y
CONFIG_SPL_STACK=0xffe3f000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x3ff00000
+CONFIG_SPL_BSS_MAX_SIZE=0x100000
CONFIG_TARGET_SOCFPGA_AGILEX_SOCDK=y
CONFIG_IDENT_STRING="socfpga_agilex"
CONFIG_SPL_FS_FAT=y
@@ -32,9 +35,6 @@
CONFIG_BOOTCOMMAND="run fatscript; run mmcfitload; run mmcfitboot"
CONFIG_SYS_PBSIZE=2082
CONFIG_SPL_MAX_SIZE=0x40000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x3ff00000
-CONFIG_SPL_BSS_MAX_SIZE=0x100000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
diff --git a/configs/socfpga_agilex_defconfig b/configs/socfpga_agilex_defconfig
index 25fac31..03d15ef 100644
--- a/configs/socfpga_agilex_defconfig
+++ b/configs/socfpga_agilex_defconfig
@@ -14,6 +14,9 @@
CONFIG_SPL_TEXT_BASE=0xFFE00000
CONFIG_DM_RESET=y
CONFIG_SPL_STACK=0xffe3f000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x3ff00000
+CONFIG_SPL_BSS_MAX_SIZE=0x100000
CONFIG_TARGET_SOCFPGA_AGILEX_SOCDK=y
CONFIG_IDENT_STRING="socfpga_agilex"
CONFIG_SPL_FS_FAT=y
@@ -30,9 +33,6 @@
CONFIG_BOOTCOMMAND="run fatscript; run mmcload; run linux_qspi_enable; run mmcboot"
CONFIG_SYS_PBSIZE=2082
CONFIG_SPL_MAX_SIZE=0x40000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x3ff00000
-CONFIG_SPL_BSS_MAX_SIZE=0x100000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
diff --git a/configs/socfpga_agilex_vab_defconfig b/configs/socfpga_agilex_vab_defconfig
index c15cc5b..83a808f 100644
--- a/configs/socfpga_agilex_vab_defconfig
+++ b/configs/socfpga_agilex_vab_defconfig
@@ -15,6 +15,9 @@
CONFIG_SPL_TEXT_BASE=0xFFE00000
CONFIG_DM_RESET=y
CONFIG_SPL_STACK=0xffe3f000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x3ff00000
+CONFIG_SPL_BSS_MAX_SIZE=0x100000
CONFIG_SOCFPGA_SECURE_VAB_AUTH=y
CONFIG_TARGET_SOCFPGA_AGILEX_SOCDK=y
CONFIG_IDENT_STRING="socfpga_agilex"
@@ -33,9 +36,6 @@
CONFIG_BOOTCOMMAND="run fatscript; run mmcfitload; run mmcfitboot"
CONFIG_SYS_PBSIZE=2082
CONFIG_SPL_MAX_SIZE=0x40000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x3ff00000
-CONFIG_SPL_BSS_MAX_SIZE=0x100000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
diff --git a/configs/socfpga_chameleonv3_defconfig b/configs/socfpga_chameleonv3_defconfig
index 6ea61ca..0298336 100644
--- a/configs/socfpga_chameleonv3_defconfig
+++ b/configs/socfpga_chameleonv3_defconfig
@@ -6,6 +6,7 @@
CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria10_chameleonv3_480_2"
CONFIG_SPL_TEXT_BASE=0xFFE00000
CONFIG_SPL_DRIVERS_MISC=y
+CONFIG_SOCFPGA_ARRIA10_ALWAYS_REPROGRAM=y
CONFIG_TARGET_SOCFPGA_CHAMELEONV3=y
CONFIG_SPL_FS_FAT=y
CONFIG_FIT=y
diff --git a/configs/socfpga_n5x_atf_defconfig b/configs/socfpga_n5x_atf_defconfig
index 923c202..2cf6716 100644
--- a/configs/socfpga_n5x_atf_defconfig
+++ b/configs/socfpga_n5x_atf_defconfig
@@ -15,6 +15,9 @@
CONFIG_SPL_TEXT_BASE=0xFFE00000
CONFIG_DM_RESET=y
CONFIG_SPL_STACK=0xffe3f000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x3ff00000
+CONFIG_SPL_BSS_MAX_SIZE=0x100000
CONFIG_TARGET_SOCFPGA_N5X_SOCDK=y
CONFIG_IDENT_STRING="socfpga_n5x"
CONFIG_SPL_FS_FAT=y
@@ -31,9 +34,6 @@
CONFIG_BOOTCOMMAND="run fatscript; run mmcfitload; run mmcfitboot"
CONFIG_SYS_PBSIZE=2079
CONFIG_SPL_MAX_SIZE=0x40000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x3ff00000
-CONFIG_SPL_BSS_MAX_SIZE=0x100000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
diff --git a/configs/socfpga_n5x_defconfig b/configs/socfpga_n5x_defconfig
index e856b04..967f756 100644
--- a/configs/socfpga_n5x_defconfig
+++ b/configs/socfpga_n5x_defconfig
@@ -14,6 +14,9 @@
CONFIG_SPL_TEXT_BASE=0xFFE00000
CONFIG_DM_RESET=y
CONFIG_SPL_STACK=0xffe3f000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x3ff00000
+CONFIG_SPL_BSS_MAX_SIZE=0x100000
CONFIG_TARGET_SOCFPGA_N5X_SOCDK=y
CONFIG_IDENT_STRING="socfpga_n5x"
CONFIG_SPL_FS_FAT=y
@@ -27,9 +30,6 @@
CONFIG_BOOTCOMMAND="run fatscript; run mmcload; run linux_qspi_enable; run mmcboot"
CONFIG_SYS_PBSIZE=2079
CONFIG_SPL_MAX_SIZE=0x40000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x3ff00000
-CONFIG_SPL_BSS_MAX_SIZE=0x100000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
diff --git a/configs/socfpga_n5x_vab_defconfig b/configs/socfpga_n5x_vab_defconfig
index 0f10333..53bdb4c 100644
--- a/configs/socfpga_n5x_vab_defconfig
+++ b/configs/socfpga_n5x_vab_defconfig
@@ -15,6 +15,9 @@
CONFIG_SPL_TEXT_BASE=0xFFE00000
CONFIG_DM_RESET=y
CONFIG_SPL_STACK=0xffe3f000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x3ff00000
+CONFIG_SPL_BSS_MAX_SIZE=0x100000
CONFIG_SOCFPGA_SECURE_VAB_AUTH=y
CONFIG_TARGET_SOCFPGA_N5X_SOCDK=y
CONFIG_IDENT_STRING="socfpga_n5x"
@@ -32,9 +35,6 @@
CONFIG_BOOTCOMMAND="run fatscript; run mmcfitload; run mmcfitboot"
CONFIG_SYS_PBSIZE=2079
CONFIG_SPL_MAX_SIZE=0x40000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x3ff00000
-CONFIG_SPL_BSS_MAX_SIZE=0x100000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
diff --git a/configs/socfpga_stratix10_atf_defconfig b/configs/socfpga_stratix10_atf_defconfig
index 92a8b2e..6d126a6 100644
--- a/configs/socfpga_stratix10_atf_defconfig
+++ b/configs/socfpga_stratix10_atf_defconfig
@@ -15,6 +15,9 @@
CONFIG_SPL_TEXT_BASE=0xFFE00000
CONFIG_DM_RESET=y
CONFIG_SPL_STACK=0xffe3f000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x3ff00000
+CONFIG_SPL_BSS_MAX_SIZE=0x100000
CONFIG_TARGET_SOCFPGA_STRATIX10_SOCDK=y
CONFIG_IDENT_STRING="socfpga_stratix10"
CONFIG_SPL_FS_FAT=y
@@ -32,9 +35,6 @@
CONFIG_BOOTCOMMAND="run fatscript; run mmcfitload; run mmcfitboot"
CONFIG_SYS_PBSIZE=2085
CONFIG_SPL_MAX_SIZE=0x40000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x3ff00000
-CONFIG_SPL_BSS_MAX_SIZE=0x100000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
diff --git a/configs/socfpga_stratix10_defconfig b/configs/socfpga_stratix10_defconfig
index de4c8fe..be7f747 100644
--- a/configs/socfpga_stratix10_defconfig
+++ b/configs/socfpga_stratix10_defconfig
@@ -14,6 +14,9 @@
CONFIG_SPL_TEXT_BASE=0xFFE00000
CONFIG_DM_RESET=y
CONFIG_SPL_STACK=0xffe3f000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x3ff00000
+CONFIG_SPL_BSS_MAX_SIZE=0x100000
CONFIG_TARGET_SOCFPGA_STRATIX10_SOCDK=y
CONFIG_IDENT_STRING="socfpga_stratix10"
CONFIG_SPL_FS_FAT=y
@@ -32,9 +35,6 @@
CONFIG_BOOTCOMMAND="run fatscript; run mmcload; run linux_qspi_enable; run mmcboot"
CONFIG_SYS_PBSIZE=2085
CONFIG_SPL_MAX_SIZE=0x40000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x3ff00000
-CONFIG_SPL_BSS_MAX_SIZE=0x100000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
diff --git a/configs/soquartz-blade-rk3566_defconfig b/configs/soquartz-blade-rk3566_defconfig
index b9ac6b9..9d565c1 100644
--- a/configs/soquartz-blade-rk3566_defconfig
+++ b/configs/soquartz-blade-rk3566_defconfig
@@ -2,7 +2,6 @@
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_NR_DRAM_BANKS=2
CONFIG_DEFAULT_DEVICE_TREE="rk3566-soquartz-blade"
CONFIG_ROCKCHIP_RK3568=y
CONFIG_SPL_SERIAL=y
diff --git a/configs/soquartz-cm4-rk3566_defconfig b/configs/soquartz-cm4-rk3566_defconfig
index e87a639..fe2c771 100644
--- a/configs/soquartz-cm4-rk3566_defconfig
+++ b/configs/soquartz-cm4-rk3566_defconfig
@@ -2,7 +2,6 @@
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_NR_DRAM_BANKS=2
CONFIG_DEFAULT_DEVICE_TREE="rk3566-soquartz-cm4"
CONFIG_ROCKCHIP_RK3568=y
CONFIG_SPL_SERIAL=y
diff --git a/configs/soquartz-model-a-rk3566_defconfig b/configs/soquartz-model-a-rk3566_defconfig
index b2c1684..db9eee2 100644
--- a/configs/soquartz-model-a-rk3566_defconfig
+++ b/configs/soquartz-model-a-rk3566_defconfig
@@ -2,7 +2,6 @@
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_NR_DRAM_BANKS=2
CONFIG_DEFAULT_DEVICE_TREE="rk3566-soquartz-model-a"
CONFIG_ROCKCHIP_RK3568=y
CONFIG_SPL_SERIAL=y
diff --git a/configs/starfive_visionfive2_defconfig b/configs/starfive_visionfive2_defconfig
index 7a3f1d4..3bbd1db 100644
--- a/configs/starfive_visionfive2_defconfig
+++ b/configs/starfive_visionfive2_defconfig
@@ -16,6 +16,8 @@
CONFIG_SPL_MMC=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x8180000
+CONFIG_SPL_BSS_START_ADDR=0x8040000
+CONFIG_SPL_BSS_MAX_SIZE=0x10000
CONFIG_SPL=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI=y
@@ -40,7 +42,6 @@
CONFIG_BOOTARGS="console=ttyS0,115200 debug rootwait earlycon=sbi"
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="nvme scan; usb start; setenv fdt_addr ${fdtcontroladdr}; fdt addr ${fdtcontroladdr};"
-CONFIG_DEFAULT_FDT_FILE="starfive/jh7110-starfive-visionfive-2.dtb"
CONFIG_SYS_CBSIZE=256
CONFIG_SYS_PBSIZE=276
CONFIG_DISPLAY_CPUINFO=y
@@ -50,8 +51,6 @@
CONFIG_PCI_INIT_R=y
CONFIG_SPL_MAX_SIZE=0x40000
CONFIG_SPL_PAD_TO=0x0
-CONFIG_SPL_BSS_START_ADDR=0x8040000
-CONFIG_SPL_BSS_MAX_SIZE=0x10000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
diff --git a/configs/stm32mp13_defconfig b/configs/stm32mp13_defconfig
index c893e27..caaabf3 100644
--- a/configs/stm32mp13_defconfig
+++ b/configs/stm32mp13_defconfig
@@ -15,6 +15,7 @@
CONFIG_SYS_LOAD_ADDR=0xc2000000
CONFIG_SYS_MEMTEST_START=0xc0000000
CONFIG_SYS_MEMTEST_END=0xc4000000
+# CONFIG_ANDROID_BOOT_IMAGE is not set
CONFIG_FIT=y
CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_DISTRO_DEFAULTS=y
@@ -51,8 +52,17 @@
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_MMC_ENV_DEV=-1
CONFIG_ENV_MMC_USE_DT=y
+CONFIG_BUTTON=y
+CONFIG_BUTTON_GPIO=y
CONFIG_CLK_SCMI=y
CONFIG_SET_DFU_ALT_INFO=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_FASTBOOT_BUF_ADDR=0xc0000000
+CONFIG_FASTBOOT_BUF_SIZE=0x02000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
+CONFIG_FASTBOOT_CMD_OEM_PARTCONF=y
CONFIG_GPIO_HOG=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_STM32F7=y
@@ -92,7 +102,6 @@
CONFIG_USB_GADGET_VENDOR_NUM=0x0483
CONFIG_USB_GADGET_PRODUCT_NUM=0x5720
CONFIG_USB_GADGET_DWC2_OTG=y
-CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_ERRNO_STR=y
# CONFIG_LMB_USE_MAX_REGIONS is not set
CONFIG_LMB_MEMORY_REGIONS=2
diff --git a/configs/stm32mp15_basic_defconfig b/configs/stm32mp15_basic_defconfig
index 005f1d5..2e22bf8 100644
--- a/configs/stm32mp15_basic_defconfig
+++ b/configs/stm32mp15_basic_defconfig
@@ -97,6 +97,8 @@
CONFIG_USE_SERVERIP=y
CONFIG_SERVERIP="192.168.1.1"
CONFIG_STM32_ADC=y
+CONFIG_BUTTON=y
+CONFIG_BUTTON_GPIO=y
CONFIG_SET_DFU_ALT_INFO=y
CONFIG_USB_FUNCTION_FASTBOOT=y
CONFIG_FASTBOOT_BUF_ADDR=0xC0000000
diff --git a/configs/stm32mp15_defconfig b/configs/stm32mp15_defconfig
index 3302b30..ffe7512 100644
--- a/configs/stm32mp15_defconfig
+++ b/configs/stm32mp15_defconfig
@@ -69,6 +69,8 @@
CONFIG_USE_SERVERIP=y
CONFIG_SERVERIP="192.168.1.1"
CONFIG_STM32_ADC=y
+CONFIG_BUTTON=y
+CONFIG_BUTTON_GPIO=y
CONFIG_CLK_SCMI=y
CONFIG_SET_DFU_ALT_INFO=y
CONFIG_USB_FUNCTION_FASTBOOT=y
diff --git a/configs/stm32mp15_dhcom_basic_defconfig b/configs/stm32mp15_dhcom_basic_defconfig
index eb6e367..8442f0b 100644
--- a/configs/stm32mp15_dhcom_basic_defconfig
+++ b/configs/stm32mp15_dhcom_basic_defconfig
@@ -164,6 +164,8 @@
CONFIG_SPL_DM_USB_GADGET=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_GENERIC=y
CONFIG_USB_DWC2=y
CONFIG_USB_HOST_ETHER=y
CONFIG_USB_ETHER_ASIX=y
diff --git a/configs/stm32mp15_dhcor_basic_defconfig b/configs/stm32mp15_dhcor_basic_defconfig
index ab92924..91b64f7 100644
--- a/configs/stm32mp15_dhcor_basic_defconfig
+++ b/configs/stm32mp15_dhcor_basic_defconfig
@@ -164,6 +164,8 @@
CONFIG_SPL_DM_USB_GADGET=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_GENERIC=y
CONFIG_USB_DWC2=y
CONFIG_USB_HOST_ETHER=y
CONFIG_USB_ETHER_ASIX=y
diff --git a/configs/stm32mp15_trusted_defconfig b/configs/stm32mp15_trusted_defconfig
index 84b0854..74deaab 100644
--- a/configs/stm32mp15_trusted_defconfig
+++ b/configs/stm32mp15_trusted_defconfig
@@ -70,6 +70,8 @@
CONFIG_USE_SERVERIP=y
CONFIG_SERVERIP="192.168.1.1"
CONFIG_STM32_ADC=y
+CONFIG_BUTTON=y
+CONFIG_BUTTON_GPIO=y
CONFIG_CLK_SCMI=y
CONFIG_SET_DFU_ALT_INFO=y
CONFIG_USB_FUNCTION_FASTBOOT=y
diff --git a/configs/stout_defconfig b/configs/stout_defconfig
index 1022ee9..ee87ea5 100644
--- a/configs/stout_defconfig
+++ b/configs/stout_defconfig
@@ -16,7 +16,7 @@
CONFIG_ENV_OFFSET=0xC0000
CONFIG_ENV_SECT_SIZE=0x40000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="r8a7790-stout-u-boot"
+CONFIG_DEFAULT_DEVICE_TREE="renesas/r8a7790-stout"
CONFIG_SPL_TEXT_BASE=0xe6300000
CONFIG_ARCH_RENESAS_BOARD_STRING="Stout"
CONFIG_R8A7790=y
diff --git a/configs/syzygy_hub_defconfig b/configs/syzygy_hub_defconfig
index 0d547d1..f96ab04 100644
--- a/configs/syzygy_hub_defconfig
+++ b/configs/syzygy_hub_defconfig
@@ -9,6 +9,10 @@
CONFIG_DEFAULT_DEVICE_TREE="zynq-syzygy-hub"
CONFIG_SPL_STACK_R_ADDR=0x200000
CONFIG_SPL_STACK=0xfffffe00
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x100000
+CONFIG_SPL_BSS_MAX_SIZE=0x100000
+CONFIG_SPL_STACK_R=y
CONFIG_SPL=y
CONFIG_SYS_LOAD_ADDR=0x0
CONFIG_DEBUG_UART=y
@@ -25,11 +29,7 @@
CONFIG_SYS_PBSIZE=2071
CONFIG_CLOCKS=y
CONFIG_SPL_MAX_SIZE=0x30000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x100000
-CONFIG_SPL_BSS_MAX_SIZE=0x100000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
-CONFIG_SPL_STACK_R=y
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_SYS_MALLOC_SIZE=0x2000000
CONFIG_SPL_FS_LOAD_ARGS_NAME="system.dtb"
diff --git a/configs/taurus_defconfig b/configs/taurus_defconfig
index 8679b90..52d90f5 100644
--- a/configs/taurus_defconfig
+++ b/configs/taurus_defconfig
@@ -23,6 +23,9 @@
CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20-taurus"
CONFIG_SPL_STACK=0x304000
CONFIG_SPL_SYS_MALLOC_F_LEN=0x1000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x3e00
+CONFIG_SPL_BSS_MAX_SIZE=0x600
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0xfffff200
CONFIG_DEBUG_UART_CLOCK=18432000
@@ -43,9 +46,6 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_MAX_SIZE=0x3e00
CONFIG_SPL_PAD_TO=0x20000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x3e00
-CONFIG_SPL_BSS_MAX_SIZE=0x600
# CONFIG_SPL_LEGACY_IMAGE_FORMAT is not set
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
diff --git a/configs/theadorable_debug_defconfig b/configs/theadorable_debug_defconfig
index e3444fc..ed468b8 100644
--- a/configs/theadorable_debug_defconfig
+++ b/configs/theadorable_debug_defconfig
@@ -16,6 +16,9 @@
CONFIG_SPL_TEXT_BASE=0x40004030
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0x4002c000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x40020000
+CONFIG_SPL_BSS_MAX_SIZE=0x4000
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0xf1012000
CONFIG_DEBUG_UART_CLOCK=250000000
@@ -33,9 +36,6 @@
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SPL_MAX_SIZE=0x1bfd0
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x40020000
-CONFIG_SPL_BSS_MAX_SIZE=0x4000
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_I2C=y
diff --git a/configs/tinker-rk3288_defconfig b/configs/tinker-rk3288_defconfig
index edb6294..855cf41 100644
--- a/configs/tinker-rk3288_defconfig
+++ b/configs/tinker-rk3288_defconfig
@@ -17,6 +17,8 @@
CONFIG_TARGET_TINKER_RK3288=y
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_SPL_STACK=0xff718000
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
CONFIG_SPL_SIZE_LIMIT=0x4b000
CONFIG_DEBUG_UART_BASE=0xff690000
CONFIG_DEBUG_UART_CLOCK=24000000
@@ -31,8 +33,6 @@
CONFIG_SPL_PAD_TO=0x7f8000
CONFIG_SPL_NO_BSS_LIMIT=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
-CONFIG_SPL_STACK_R=y
-CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
CONFIG_SPL_I2C=y
CONFIG_SPL_POWER=y
CONFIG_CMD_GPIO=y
diff --git a/configs/tinker-s-rk3288_defconfig b/configs/tinker-s-rk3288_defconfig
index 499094b..2a2e122 100644
--- a/configs/tinker-s-rk3288_defconfig
+++ b/configs/tinker-s-rk3288_defconfig
@@ -17,6 +17,8 @@
CONFIG_TARGET_TINKER_RK3288=y
CONFIG_SPL_STACK_R_ADDR=0x800000
CONFIG_SPL_STACK=0xff718000
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x300000
CONFIG_SPL_SIZE_LIMIT=0x4b000
CONFIG_DEBUG_UART_BASE=0xff690000
CONFIG_DEBUG_UART_CLOCK=24000000
@@ -31,8 +33,6 @@
CONFIG_SPL_PAD_TO=0x7f8000
CONFIG_SPL_NO_BSS_LIMIT=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
-CONFIG_SPL_STACK_R=y
-CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x300000
CONFIG_SPL_I2C=y
CONFIG_SPL_POWER=y
CONFIG_CMD_GPIO=y
diff --git a/configs/topic_miami_defconfig b/configs/topic_miami_defconfig
index 79e107f..638d730 100644
--- a/configs/topic_miami_defconfig
+++ b/configs/topic_miami_defconfig
@@ -11,6 +11,10 @@
CONFIG_DEFAULT_DEVICE_TREE="zynq-topic-miami"
CONFIG_SPL_STACK_R_ADDR=0x200000
CONFIG_SPL_STACK=0xfffffe00
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x100000
+CONFIG_SPL_BSS_MAX_SIZE=0x100000
+CONFIG_SPL_STACK_R=y
CONFIG_SPL=y
CONFIG_DEBUG_UART_CLOCK=100000000
CONFIG_BOOT_INIT_FILE="board/topic/zynq/zynq-topic-miami/ps7_regs.txt"
@@ -29,11 +33,7 @@
CONFIG_SYS_PBSIZE=2077
CONFIG_CLOCKS=y
CONFIG_SPL_MAX_SIZE=0x30000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x100000
-CONFIG_SPL_BSS_MAX_SIZE=0x100000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
-CONFIG_SPL_STACK_R=y
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_SYS_MALLOC_SIZE=0x2000000
CONFIG_SPL_SPI_LOAD=y
diff --git a/configs/topic_miamilite_defconfig b/configs/topic_miamilite_defconfig
index 0168cf8..af47fab 100644
--- a/configs/topic_miamilite_defconfig
+++ b/configs/topic_miamilite_defconfig
@@ -11,6 +11,10 @@
CONFIG_DEFAULT_DEVICE_TREE="zynq-topic-miamilite"
CONFIG_SPL_STACK_R_ADDR=0x200000
CONFIG_SPL_STACK=0xfffffe00
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x100000
+CONFIG_SPL_BSS_MAX_SIZE=0x100000
+CONFIG_SPL_STACK_R=y
CONFIG_SPL=y
CONFIG_DEBUG_UART_CLOCK=100000000
CONFIG_BOOT_INIT_FILE="board/topic/zynq/zynq-topic-miamilite/ps7_regs.txt"
@@ -29,11 +33,7 @@
CONFIG_SYS_PBSIZE=2077
CONFIG_CLOCKS=y
CONFIG_SPL_MAX_SIZE=0x30000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x100000
-CONFIG_SPL_BSS_MAX_SIZE=0x100000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
-CONFIG_SPL_STACK_R=y
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_SYS_MALLOC_SIZE=0x2000000
CONFIG_SPL_SPI_LOAD=y
diff --git a/configs/topic_miamiplus_defconfig b/configs/topic_miamiplus_defconfig
index 3030963..ad32174 100644
--- a/configs/topic_miamiplus_defconfig
+++ b/configs/topic_miamiplus_defconfig
@@ -11,6 +11,10 @@
CONFIG_DEFAULT_DEVICE_TREE="zynq-topic-miamiplus"
CONFIG_SPL_STACK_R_ADDR=0x200000
CONFIG_SPL_STACK=0xfffffe00
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x100000
+CONFIG_SPL_BSS_MAX_SIZE=0x100000
+CONFIG_SPL_STACK_R=y
CONFIG_SPL=y
CONFIG_DEBUG_UART_CLOCK=100000000
CONFIG_BOOT_INIT_FILE="board/topic/zynq/zynq-topic-miamiplus/ps7_regs.txt"
@@ -29,11 +33,7 @@
CONFIG_SYS_PBSIZE=2077
CONFIG_CLOCKS=y
CONFIG_SPL_MAX_SIZE=0x30000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x100000
-CONFIG_SPL_BSS_MAX_SIZE=0x100000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
-CONFIG_SPL_STACK_R=y
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_SYS_MALLOC_SIZE=0x2000000
CONFIG_SPL_SPI_LOAD=y
diff --git a/configs/toybrick-rk3588_defconfig b/configs/toybrick-rk3588_defconfig
index 6ee92e9..76bfa50 100644
--- a/configs/toybrick-rk3588_defconfig
+++ b/configs/toybrick-rk3588_defconfig
@@ -2,7 +2,6 @@
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_NR_DRAM_BANKS=2
CONFIG_DEFAULT_DEVICE_TREE="rk3588-toybrick-x0"
CONFIG_ROCKCHIP_RK3588=y
CONFIG_SPL_SERIAL=y
@@ -16,7 +15,6 @@
CONFIG_SPL_FIT_SIGNATURE=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_LEGACY_IMAGE_FORMAT=y
-CONFIG_OF_BOARD_SETUP=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-toybrick-x0.dtb"
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
@@ -33,8 +31,9 @@
# CONFIG_SPL_DOS_PARTITION is not set
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_LIVE=y
-CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_ENV_IS_IN_MMC=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SPL_REGMAP=y
CONFIG_SPL_SYSCON=y
CONFIG_SPL_CLK=y
@@ -53,7 +52,7 @@
CONFIG_DWC_ETH_QOS=y
CONFIG_DWC_ETH_QOS_ROCKCHIP=y
CONFIG_PHY_ROCKCHIP_INNO_USB2=y
-CONFIG_REGULATOR_PWM=y
+CONFIG_SPL_PINCTRL=y
CONFIG_PWM_ROCKCHIP=y
CONFIG_SPL_RAM=y
CONFIG_BAUDRATE=1500000
diff --git a/configs/transformer_t30_defconfig b/configs/transformer_t30_defconfig
index 61fe3d3..11a552d 100644
--- a/configs/transformer_t30_defconfig
+++ b/configs/transformer_t30_defconfig
@@ -1,5 +1,4 @@
CONFIG_ARM=y
-CONFIG_SYS_L2CACHE_OFF=y
CONFIG_ARCH_TEGRA=y
CONFIG_SUPPORT_PASSING_ATAGS=y
CONFIG_CMDLINE_TAG=y
@@ -15,12 +14,13 @@
CONFIG_TARGET_TRANSFORMER_T30=y
CONFIG_CMD_EBTUPDATE=y
CONFIG_SYS_LOAD_ADDR=0x82000000
+CONFIG_BUTTON_CMD=y
CONFIG_BOOTDELAY=0
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_KEYED_CTRLC=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_SYSTEM_SETUP=y
-CONFIG_BOOTCOMMAND="setenv skip_boot 0; setenv gpio_button 150; if run check_button; then poweroff; fi; setenv gpio_button 131; if run check_button; then bootmenu; fi; if test ${skip_boot} -eq 1; then; else run bootcmd_usb0; run bootcmd_mmc1; run bootcmd_mmc0; poweroff; fi"
+CONFIG_BOOTCOMMAND="setenv boot_targets usb mmc1 mmc0; bootflow scan; poweroff"
CONFIG_SYS_PBSIZE=2084
CONFIG_SPL_FOOTPRINT_LIMIT=y
CONFIG_SPL_MAX_FOOTPRINT=0x8000
@@ -71,7 +71,6 @@
CONFIG_DM_REGULATOR_TPS65911=y
CONFIG_PWM_TEGRA=y
CONFIG_SYS_NS16550=y
-CONFIG_TEGRA20_SLINK=y
CONFIG_SYSRESET_TPS65910=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/turing-rk1-rk3588_defconfig b/configs/turing-rk1-rk3588_defconfig
index 07f7b84..038b147 100644
--- a/configs/turing-rk1-rk3588_defconfig
+++ b/configs/turing-rk1-rk3588_defconfig
@@ -3,7 +3,6 @@
CONFIG_SYS_HAS_NONCACHED_MEMORY=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
-CONFIG_NR_DRAM_BANKS=2
CONFIG_SF_DEFAULT_SPEED=24000000
CONFIG_SF_DEFAULT_MODE=0x2000
CONFIG_DEFAULT_DEVICE_TREE="rk3588-turing-rk1"
@@ -24,7 +23,6 @@
CONFIG_SPL_FIT_SIGNATURE=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_LEGACY_IMAGE_FORMAT=y
-CONFIG_OF_BOARD_SETUP=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-turing-rk1.dtb"
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
@@ -81,7 +79,6 @@
CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
CONFIG_PHY_ROCKCHIP_USBDP=y
CONFIG_SPL_PINCTRL=y
-CONFIG_REGULATOR_PWM=y
CONFIG_PWM_ROCKCHIP=y
CONFIG_SPL_RAM=y
CONFIG_SCSI=y
@@ -91,7 +88,6 @@
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_XHCI_PCI=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
@@ -109,7 +105,6 @@
CONFIG_USB_ETHER_RTL8152=y
CONFIG_USB_ETHER_SMSC95XX=y
CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_PRODUCT_NUM=0x350b
CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_USB_FUNCTION_ROCKUSB=y
CONFIG_ERRNO_STR=y
diff --git a/configs/turris_omnia_defconfig b/configs/turris_omnia_defconfig
index 2914840..9753e27 100644
--- a/configs/turris_omnia_defconfig
+++ b/configs/turris_omnia_defconfig
@@ -21,6 +21,9 @@
CONFIG_SPL_TEXT_BASE=0x40000030
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0x4002c000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x40023000
+CONFIG_SPL_BSS_MAX_SIZE=0x4000
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0xf1012000
CONFIG_DEBUG_UART_CLOCK=250000000
@@ -31,6 +34,7 @@
CONFIG_OF_BOARD_FIXUP=y
CONFIG_SYS_MEMTEST_START=0x00800000
CONFIG_SYS_MEMTEST_END=0x00ffffff
+CONFIG_LTO=y
CONFIG_HAS_BOARD_SIZE_LIMIT=y
CONFIG_BOARD_SIZE_LIMIT=983040
CONFIG_FIT=y
@@ -45,9 +49,6 @@
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_MISC_INIT_R=y
CONFIG_SPL_MAX_SIZE=0x22fd0
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x40023000
-CONFIG_SPL_BSS_MAX_SIZE=0x4000
CONFIG_SPL_BOARD_INIT=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_ENV_SUPPORT=y
@@ -64,6 +65,7 @@
CONFIG_CMD_MMC=y
CONFIG_CMD_MTD=y
CONFIG_CMD_PCI=y
+CONFIG_CMD_POWEROFF=y
CONFIG_CMD_SATA=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
@@ -71,6 +73,7 @@
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
+CONFIG_CMD_RNG=y
CONFIG_CMD_AES=y
CONFIG_CMD_HASH=y
CONFIG_CMD_BTRFS=y
@@ -105,6 +108,7 @@
CONFIG_PCI_MVEBU=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_ARMADA_38X=y
+CONFIG_DM_RNG=y
CONFIG_DM_RTC=y
CONFIG_RTC_ARMADA38X=y
CONFIG_SERIAL_PROBE_ALL=y
@@ -112,6 +116,8 @@
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550=y
CONFIG_KIRKWOOD_SPI=y
+CONFIG_SYSRESET=y
+CONFIG_SYSRESET_CMD_POWEROFF=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/u200_defconfig b/configs/u200_defconfig
index 21c90e7..879ae0d 100644
--- a/configs/u200_defconfig
+++ b/configs/u200_defconfig
@@ -6,7 +6,7 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="meson-g12a-u200"
+CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-g12a-u200"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_MESON_G12A=y
diff --git a/configs/uniphier_ld4_sld8_defconfig b/configs/uniphier_ld4_sld8_defconfig
index 1e74d83..56ab20d 100644
--- a/configs/uniphier_ld4_sld8_defconfig
+++ b/configs/uniphier_ld4_sld8_defconfig
@@ -11,6 +11,7 @@
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0x100000
+CONFIG_SPL_BSS_MAX_SIZE=0x2000
CONFIG_SPL=y
CONFIG_MICRO_SUPPORT_CARD=y
CONFIG_SYS_LOAD_ADDR=0x85000000
@@ -24,7 +25,6 @@
CONFIG_LOGLEVEL=6
CONFIG_SPL_MAX_SIZE=0x10000
CONFIG_SPL_PAD_TO=0x20000
-CONFIG_SPL_BSS_MAX_SIZE=0x2000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_SPL_NOR_SUPPORT=y
diff --git a/configs/uniphier_v7_defconfig b/configs/uniphier_v7_defconfig
index 0c83824..7e1e2a9 100644
--- a/configs/uniphier_v7_defconfig
+++ b/configs/uniphier_v7_defconfig
@@ -11,6 +11,7 @@
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0x100000
+CONFIG_SPL_BSS_MAX_SIZE=0x2000
CONFIG_SPL=y
CONFIG_MICRO_SUPPORT_CARD=y
CONFIG_SYS_LOAD_ADDR=0x85000000
@@ -24,7 +25,6 @@
CONFIG_LOGLEVEL=6
CONFIG_SPL_MAX_SIZE=0x10000
CONFIG_SPL_PAD_TO=0x20000
-CONFIG_SPL_BSS_MAX_SIZE=0x2000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_SPL_NOR_SUPPORT=y
diff --git a/configs/verdin-am62_a53_defconfig b/configs/verdin-am62_a53_defconfig
index 15424fe..03730b4 100644
--- a/configs/verdin-am62_a53_defconfig
+++ b/configs/verdin-am62_a53_defconfig
@@ -14,7 +14,7 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xFFFFDE00
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="k3-am625-verdin-wifi-dev"
+CONFIG_DEFAULT_DEVICE_TREE="ti/k3-am625-verdin-wifi-dev"
CONFIG_SPL_TEXT_BASE=0x80080000
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
@@ -22,6 +22,10 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x80c80000
+CONFIG_SPL_BSS_MAX_SIZE=0x80000
+CONFIG_SPL_STACK_R=y
CONFIG_SPL_SIZE_LIMIT=0x40000
CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x800
CONFIG_SPL_FS_FAT=y
@@ -44,13 +48,9 @@
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_MAX_SIZE=0x58000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x80c80000
-CONFIG_SPL_BSS_MAX_SIZE=0x80000
CONFIG_SPL_SYS_REPORT_STACK_F_USAGE=y
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
-CONFIG_SPL_STACK_R=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1400
CONFIG_SPL_DMA=y
diff --git a/configs/verdin-am62_r5_defconfig b/configs/verdin-am62_r5_defconfig
index 5b4b81c..06c63fa 100644
--- a/configs/verdin-am62_r5_defconfig
+++ b/configs/verdin-am62_r5_defconfig
@@ -19,6 +19,11 @@
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_SPL_SYS_MALLOC_F_LEN=0x7000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x43c3b000
+CONFIG_SPL_BSS_MAX_SIZE=0x3000
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x200000
CONFIG_SPL_SIZE_LIMIT=0x3A7F0
CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x3500
CONFIG_SPL_LIBDISK_SUPPORT=y
@@ -29,13 +34,8 @@
CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y
CONFIG_SPL_MAX_SIZE=0x3B000
CONFIG_SPL_PAD_TO=0x0
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x43c3b000
-CONFIG_SPL_BSS_MAX_SIZE=0x3000
CONFIG_SPL_SYS_REPORT_STACK_F_USAGE=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
-CONFIG_SPL_STACK_R=y
-CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x200000
CONFIG_SPL_SEPARATE_BSS=y
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
diff --git a/configs/verdin-imx8mm_defconfig b/configs/verdin-imx8mm_defconfig
index afa42c1..ef7f3b1 100644
--- a/configs/verdin-imx8mm_defconfig
+++ b/configs/verdin-imx8mm_defconfig
@@ -8,7 +8,7 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xFFFFDE00
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="imx8mm-verdin-wifi-dev"
+CONFIG_DEFAULT_DEVICE_TREE="freescale/imx8mm-verdin-wifi-dev"
CONFIG_SPL_TEXT_BASE=0x7E1000
CONFIG_TARGET_VERDIN_IMX8MM=y
CONFIG_OF_LIBFDT_OVERLAY=y
@@ -17,6 +17,9 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x920000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x910000
+CONFIG_SPL_BSS_MAX_SIZE=0x2000
CONFIG_SPL=y
CONFIG_IMX_BOOTAUX=y
CONFIG_SYS_LOAD_ADDR=0x48200000
@@ -38,9 +41,6 @@
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_BOARD_LATE_INIT=y
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x910000
-CONFIG_SPL_BSS_MAX_SIZE=0x2000
CONFIG_SPL_BOARD_INIT=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_SYS_MALLOC=y
diff --git a/configs/verdin-imx8mp_defconfig b/configs/verdin-imx8mp_defconfig
index b619440..fca91f7 100644
--- a/configs/verdin-imx8mp_defconfig
+++ b/configs/verdin-imx8mp_defconfig
@@ -12,7 +12,7 @@
CONFIG_SYS_I2C_MXC_I2C3=y
CONFIG_SYS_I2C_MXC_I2C4=y
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="imx8mp-verdin-wifi-dev"
+CONFIG_DEFAULT_DEVICE_TREE="freescale/imx8mp-verdin-wifi-dev"
CONFIG_SPL_TEXT_BASE=0x920000
CONFIG_TARGET_VERDIN_IMX8MP=y
CONFIG_OF_LIBFDT_OVERLAY=y
@@ -23,6 +23,9 @@
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK=0x960000
CONFIG_SPL_SYS_MALLOC_F_LEN=0x4000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x98fc00
+CONFIG_SPL_BSS_MAX_SIZE=0x400
CONFIG_SPL=y
CONFIG_IMX_BOOTAUX=y
CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000
@@ -49,9 +52,6 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_LATE_INIT=y
CONFIG_SPL_MAX_SIZE=0x26000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x98fc00
-CONFIG_SPL_BSS_MAX_SIZE=0x400
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_BOOTROM_SUPPORT=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
@@ -105,8 +105,6 @@
CONFIG_IP_DEFRAG=y
CONFIG_TFTP_BLOCKSIZE=4096
CONFIG_SPL_DM=y
-CONFIG_REGMAP=y
-CONFIG_SYSCON=y
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_BOOTCOUNT_ENV=y
CONFIG_CLK_COMPOSITE_CCF=y
@@ -161,7 +159,6 @@
CONFIG_IMX8M_POWER_DOMAIN=y
CONFIG_IMX8MP_HSIOMIX_BLKCTRL=y
CONFIG_POWER_PCA9450=y
-CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
CONFIG_SPL_POWER_I2C=y
diff --git a/configs/vocore2_defconfig b/configs/vocore2_defconfig
index 17634ff..04b093d 100644
--- a/configs/vocore2_defconfig
+++ b/configs/vocore2_defconfig
@@ -10,6 +10,8 @@
CONFIG_DEFAULT_DEVICE_TREE="vocore_vocore2"
CONFIG_SYS_BOOTCOUNT_ADDR=0xb000006c
CONFIG_SPL_SYS_MALLOC_F_LEN=0x40000
+CONFIG_SPL_BSS_START_ADDR=0x80010000
+CONFIG_SPL_BSS_MAX_SIZE=0x10000
CONFIG_SPL=y
CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y
CONFIG_SYS_LOAD_ADDR=0x80100000
@@ -35,8 +37,6 @@
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SYS_MALLOC_BOOTPARAMS=y
CONFIG_SPL_MAX_SIZE=0x10000
-CONFIG_SPL_BSS_START_ADDR=0x80010000
-CONFIG_SPL_BSS_MAX_SIZE=0x10000
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_NOR_SUPPORT=y
CONFIG_HUSH_PARSER=y
diff --git a/configs/vyasa-rk3288_defconfig b/configs/vyasa-rk3288_defconfig
index 02f2d74..42c06d1 100644
--- a/configs/vyasa-rk3288_defconfig
+++ b/configs/vyasa-rk3288_defconfig
@@ -18,6 +18,8 @@
CONFIG_TARGET_VYASA_RK3288=y
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_SPL_STACK=0xff718000
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
CONFIG_DEBUG_UART_BASE=0xff690000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0x800800
@@ -30,8 +32,6 @@
CONFIG_SPL_PAD_TO=0x7f8000
CONFIG_SPL_NO_BSS_LIMIT=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
-CONFIG_SPL_STACK_R=y
-CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
CONFIG_SPL_OS_BOOT=y
CONFIG_SPL_PAYLOAD_ARGS_ADDR=0xffe5000
CONFIG_SPL_FALCON_BOOT_MMCSD=y
diff --git a/configs/wetek-core2_defconfig b/configs/wetek-core2_defconfig
index 01ffb8b..c4b126c 100644
--- a/configs/wetek-core2_defconfig
+++ b/configs/wetek-core2_defconfig
@@ -6,7 +6,7 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="meson-gxm-wetek-core2"
+CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-gxm-wetek-core2"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_MESON_GXM=y
diff --git a/configs/x3_t30_defconfig b/configs/x3_t30_defconfig
index 7af68bd..c489d59 100644
--- a/configs/x3_t30_defconfig
+++ b/configs/x3_t30_defconfig
@@ -1,5 +1,4 @@
CONFIG_ARM=y
-CONFIG_SYS_L2CACHE_OFF=y
CONFIG_ARCH_TEGRA=y
CONFIG_SUPPORT_PASSING_ATAGS=y
CONFIG_CMDLINE_TAG=y
@@ -16,12 +15,13 @@
CONFIG_TEGRA_ENABLE_UARTD=y
CONFIG_CMD_EBTUPDATE=y
CONFIG_SYS_LOAD_ADDR=0x82000000
+CONFIG_BUTTON_CMD=y
CONFIG_BOOTDELAY=0
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_KEYED_CTRLC=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_SYSTEM_SETUP=y
-CONFIG_BOOTCOMMAND="if run check_button; then bootmenu; fi; run bootcmd_mmc1; run bootcmd_mmc0; poweroff;"
+CONFIG_BOOTCOMMAND="bootflow scan; poweroff"
CONFIG_SYS_PBSIZE=2084
CONFIG_SPL_FOOTPRINT_LIMIT=y
CONFIG_SPL_MAX_FOOTPRINT=0x8000
diff --git a/configs/x530_defconfig b/configs/x530_defconfig
index a55379a..3cd8ef5 100644
--- a/configs/x530_defconfig
+++ b/configs/x530_defconfig
@@ -16,6 +16,9 @@
CONFIG_SPL_TEXT_BASE=0x40000030
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK=0x4002c000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x40023000
+CONFIG_SPL_BSS_MAX_SIZE=0x4000
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0xf1012000
CONFIG_DEBUG_UART_CLOCK=250000000
@@ -33,9 +36,6 @@
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_MISC_INIT_R=y
CONFIG_SPL_MAX_SIZE=0x22fd0
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x40023000
-CONFIG_SPL_BSS_MAX_SIZE=0x4000
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
diff --git a/configs/xilinx_mbv32_defconfig b/configs/xilinx_mbv32_defconfig
index 2689495..9364dce 100644
--- a/configs/xilinx_mbv32_defconfig
+++ b/configs/xilinx_mbv32_defconfig
@@ -1,30 +1,43 @@
CONFIG_RISCV=y
-CONFIG_TEXT_BASE=0x21200000
-CONFIG_SYS_MALLOC_LEN=0x800000
+CONFIG_SYS_MALLOC_LEN=0xe00000
CONFIG_NR_DRAM_BANKS=1
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
-CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20200000
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x21200000
CONFIG_ENV_SIZE=0x20000
CONFIG_DEFAULT_DEVICE_TREE="xilinx-mbv32"
+CONFIG_SPL_STACK=0x20200000
+CONFIG_SPL_BSS_START_ADDR=0x24000000
+CONFIG_SPL_BSS_MAX_SIZE=0x80000
+CONFIG_SPL_SIZE_LIMIT=0x40000
+CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0x40600000
CONFIG_DEBUG_UART_CLOCK=1000000
CONFIG_SYS_CLK_FREQ=100000000
CONFIG_BOOT_SCRIPT_OFFSET=0x0
-CONFIG_SYS_LOAD_ADDR=0x80200000
+CONFIG_SYS_LOAD_ADDR=0x20200000
CONFIG_DEBUG_UART=y
CONFIG_TARGET_XILINX_MBV=y
+# CONFIG_SPL_SMP is not set
+CONFIG_REMAKE_ELF=y
CONFIG_FIT=y
+CONFIG_SPL_LOAD_FIT_ADDRESS=0x20200000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_DISPLAY_CPUINFO=y
CONFIG_DISPLAY_BOARDINFO=y
# CONFIG_BOARD_LATE_INIT is not set
+CONFIG_SPL_MAX_SIZE=0x40000
+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
+CONFIG_SPL_SYS_MALLOC=y
+CONFIG_SPL_SYS_MALLOC_SIZE=0x800000
# CONFIG_CMD_MII is not set
CONFIG_CMD_TIMER=y
-CONFIG_OF_EMBED=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_DM_MTD=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_DEBUG_UART_SKIP_INIT=y
CONFIG_XILINX_UARTLITE=y
CONFIG_XILINX_TIMER=y
+# CONFIG_BINMAN_FDT is not set
CONFIG_PANIC_HANG=y
+CONFIG_SPL_GZIP=y
diff --git a/configs/xilinx_mbv32_smode_defconfig b/configs/xilinx_mbv32_smode_defconfig
index c724d1b..6b57cc1 100644
--- a/configs/xilinx_mbv32_smode_defconfig
+++ b/configs/xilinx_mbv32_smode_defconfig
@@ -1,27 +1,40 @@
CONFIG_RISCV=y
-CONFIG_TEXT_BASE=0x21200000
-CONFIG_SYS_MALLOC_LEN=0x800000
+CONFIG_SYS_MALLOC_LEN=0xe00000
CONFIG_NR_DRAM_BANKS=1
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
-CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20200000
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x21200000
CONFIG_ENV_SIZE=0x20000
CONFIG_DEFAULT_DEVICE_TREE="xilinx-mbv32"
+CONFIG_SPL_STACK=0x20200000
+CONFIG_SPL_BSS_START_ADDR=0x24000000
+CONFIG_SPL_BSS_MAX_SIZE=0x80000
+CONFIG_SPL_SIZE_LIMIT=0x40000
+CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0x40600000
CONFIG_DEBUG_UART_CLOCK=1000000
CONFIG_SYS_CLK_FREQ=100000000
CONFIG_BOOT_SCRIPT_OFFSET=0x0
-CONFIG_SYS_LOAD_ADDR=0x80200000
+CONFIG_SYS_LOAD_ADDR=0x20200000
CONFIG_TARGET_XILINX_MBV=y
+CONFIG_SPL_OPENSBI_LOAD_ADDR=0x20100000
CONFIG_RISCV_SMODE=y
+# CONFIG_SPL_SMP is not set
+CONFIG_REMAKE_ELF=y
CONFIG_FIT=y
+CONFIG_SPL_LOAD_FIT_ADDRESS=0x20200000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_DISPLAY_CPUINFO=y
CONFIG_DISPLAY_BOARDINFO=y
# CONFIG_BOARD_LATE_INIT is not set
+CONFIG_SPL_MAX_SIZE=0x40000
+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
+CONFIG_SPL_SYS_MALLOC=y
+CONFIG_SPL_SYS_MALLOC_SIZE=0x800000
+CONFIG_SPL_OPENSBI_SCRATCH_OPTIONS=0x2
# CONFIG_CMD_MII is not set
CONFIG_CMD_TIMER=y
-CONFIG_OF_EMBED=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_DM_MTD=y
CONFIG_DEBUG_UART_UARTLITE=y
CONFIG_DEBUG_UART_ANNOUNCE=y
@@ -29,4 +42,6 @@
CONFIG_XILINX_UARTLITE=y
# CONFIG_RISCV_TIMER is not set
CONFIG_XILINX_TIMER=y
+# CONFIG_BINMAN_FDT is not set
CONFIG_PANIC_HANG=y
+CONFIG_SPL_GZIP=y
diff --git a/configs/xilinx_versal_net_virt_defconfig b/configs/xilinx_versal_net_virt_defconfig
index 29cebe2..40c6a29 100644
--- a/configs/xilinx_versal_net_virt_defconfig
+++ b/configs/xilinx_versal_net_virt_defconfig
@@ -60,6 +60,9 @@
CONFIG_OF_BOARD=y
CONFIG_DTB_RESELECT=y
CONFIG_MULTI_DTB_FIT=y
+CONFIG_ENV_IS_NOWHERE=y
+CONFIG_ENV_IS_IN_FAT=y
+CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_NET_RANDOM_ETHADDR=y
diff --git a/configs/xilinx_zynq_virt_defconfig b/configs/xilinx_zynq_virt_defconfig
index 708cfe9..f30fbdf 100644
--- a/configs/xilinx_zynq_virt_defconfig
+++ b/configs/xilinx_zynq_virt_defconfig
@@ -10,6 +10,10 @@
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_SPL_STACK_R_ADDR=0x200000
CONFIG_SPL_STACK=0xfffffe00
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x100000
+CONFIG_SPL_BSS_MAX_SIZE=0x100000
+CONFIG_SPL_STACK_R=y
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0xE40000
CONFIG_CMD_FRU=y
@@ -34,11 +38,7 @@
CONFIG_SYS_PBSIZE=2071
CONFIG_CLOCKS=y
CONFIG_SPL_MAX_SIZE=0x30000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x100000
-CONFIG_SPL_BSS_MAX_SIZE=0x100000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
-CONFIG_SPL_STACK_R=y
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_SYS_MALLOC_SIZE=0x2000000
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img"
diff --git a/configs/xilinx_zynqmp_kria_defconfig b/configs/xilinx_zynqmp_kria_defconfig
index 7cb8b62..ba42f0c 100644
--- a/configs/xilinx_zynqmp_kria_defconfig
+++ b/configs/xilinx_zynqmp_kria_defconfig
@@ -15,6 +15,8 @@
CONFIG_DM_RESET=y
CONFIG_SPL_STACK_R_ADDR=0x18000000
CONFIG_SPL_STACK=0xfffffffc
+CONFIG_SPL_BSS_MAX_SIZE=0x80000
+CONFIG_SPL_STACK_R=y
CONFIG_SPL_SIZE_LIMIT=0x2a000
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x2220000
@@ -40,9 +42,7 @@
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_CLOCKS=y
CONFIG_SPL_MAX_SIZE=0x40000
-CONFIG_SPL_BSS_MAX_SIZE=0x80000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
-CONFIG_SPL_STACK_R=y
CONFIG_SPL_FS_LOAD_KERNEL_NAME=""
CONFIG_SPL_FS_LOAD_ARGS_NAME=""
CONFIG_SPL_FPGA=y
@@ -155,7 +155,6 @@
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y
CONFIG_DM_MTD=y
-CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_STMICRO=y
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
CONFIG_SPI_FLASH_MTD=y
diff --git a/configs/xilinx_zynqmp_mini_emmc0_defconfig b/configs/xilinx_zynqmp_mini_emmc0_defconfig
index bf34832..49c7235 100644
--- a/configs/xilinx_zynqmp_mini_emmc0_defconfig
+++ b/configs/xilinx_zynqmp_mini_emmc0_defconfig
@@ -12,6 +12,7 @@
CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-emmc0"
CONFIG_SPL_STACK=0xfffffffc
CONFIG_SPL_SYS_MALLOC_F_LEN=0x600
+CONFIG_SPL_BSS_MAX_SIZE=0x80000
CONFIG_SPL=y
CONFIG_SYS_LOAD_ADDR=0x8000000
CONFIG_REMAKE_ELF=y
@@ -26,7 +27,6 @@
# CONFIG_BOARD_LATE_INIT is not set
CONFIG_CLOCKS=y
CONFIG_SPL_MAX_SIZE=0x40000
-CONFIG_SPL_BSS_MAX_SIZE=0x80000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
diff --git a/configs/xilinx_zynqmp_mini_emmc1_defconfig b/configs/xilinx_zynqmp_mini_emmc1_defconfig
index af70ccf..1ef89f5 100644
--- a/configs/xilinx_zynqmp_mini_emmc1_defconfig
+++ b/configs/xilinx_zynqmp_mini_emmc1_defconfig
@@ -12,6 +12,7 @@
CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-emmc1"
CONFIG_SPL_STACK=0xfffffffc
CONFIG_SPL_SYS_MALLOC_F_LEN=0x600
+CONFIG_SPL_BSS_MAX_SIZE=0x80000
CONFIG_SPL=y
CONFIG_SYS_LOAD_ADDR=0x8000000
CONFIG_REMAKE_ELF=y
@@ -26,7 +27,6 @@
# CONFIG_BOARD_LATE_INIT is not set
CONFIG_CLOCKS=y
CONFIG_SPL_MAX_SIZE=0x40000
-CONFIG_SPL_BSS_MAX_SIZE=0x80000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
diff --git a/configs/xilinx_zynqmp_mini_qspi_defconfig b/configs/xilinx_zynqmp_mini_qspi_defconfig
index 096feeb..957ae07 100644
--- a/configs/xilinx_zynqmp_mini_qspi_defconfig
+++ b/configs/xilinx_zynqmp_mini_qspi_defconfig
@@ -10,6 +10,7 @@
CONFIG_ENV_SIZE=0x80
CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-qspi"
CONFIG_SPL_STACK=0xfffffffc
+CONFIG_SPL_BSS_MAX_SIZE=0x80000
CONFIG_SPL=y
# CONFIG_SPL_FS_FAT is not set
# CONFIG_SPL_LIBDISK_SUPPORT is not set
@@ -29,7 +30,6 @@
# CONFIG_BOARD_LATE_INIT is not set
CONFIG_CLOCKS=y
CONFIG_SPL_MAX_SIZE=0x40000
-CONFIG_SPL_BSS_MAX_SIZE=0x80000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
diff --git a/configs/xilinx_zynqmp_virt_defconfig b/configs/xilinx_zynqmp_virt_defconfig
index 18931cf..ee87beb 100644
--- a/configs/xilinx_zynqmp_virt_defconfig
+++ b/configs/xilinx_zynqmp_virt_defconfig
@@ -10,6 +10,8 @@
CONFIG_DM_RESET=y
CONFIG_SPL_STACK_R_ADDR=0x18000000
CONFIG_SPL_STACK=0xfffffffc
+CONFIG_SPL_BSS_MAX_SIZE=0x80000
+CONFIG_SPL_STACK_R=y
CONFIG_SPL_SIZE_LIMIT=0x2a000
CONFIG_SPL=y
CONFIG_ENV_OFFSET_REDUND=0x1E80000
@@ -34,9 +36,7 @@
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_CLOCKS=y
CONFIG_SPL_MAX_SIZE=0x40000
-CONFIG_SPL_BSS_MAX_SIZE=0x80000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
-CONFIG_SPL_STACK_R=y
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x20000000
diff --git a/configs/zynq_cse_nand_defconfig b/configs/zynq_cse_nand_defconfig
index 0dbc804..48473d7 100644
--- a/configs/zynq_cse_nand_defconfig
+++ b/configs/zynq_cse_nand_defconfig
@@ -12,6 +12,10 @@
CONFIG_DEFAULT_DEVICE_TREE="zynq-cse-nand"
CONFIG_SPL_STACK_R_ADDR=0x200000
CONFIG_SPL_STACK=0xfffffe00
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x20000
+CONFIG_SPL_BSS_MAX_SIZE=0x8000
+CONFIG_SPL_STACK_R=y
CONFIG_SPL=y
# CONFIG_SPL_FS_FAT is not set
# CONFIG_SPL_LIBDISK_SUPPORT is not set
@@ -27,11 +31,7 @@
# CONFIG_BOARD_LATE_INIT is not set
CONFIG_CLOCKS=y
CONFIG_SPL_MAX_SIZE=0x30000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x20000
-CONFIG_SPL_BSS_MAX_SIZE=0x8000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
-CONFIG_SPL_STACK_R=y
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x200000
diff --git a/configs/zynq_cse_nor_defconfig b/configs/zynq_cse_nor_defconfig
index d95f760..9f2b738 100644
--- a/configs/zynq_cse_nor_defconfig
+++ b/configs/zynq_cse_nor_defconfig
@@ -12,6 +12,10 @@
CONFIG_DEFAULT_DEVICE_TREE="zynq-cse-nor"
CONFIG_SPL_STACK_R_ADDR=0x200000
CONFIG_SPL_STACK=0xfffffe00
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x20000
+CONFIG_SPL_BSS_MAX_SIZE=0x8000
+CONFIG_SPL_STACK_R=y
CONFIG_SPL=y
# CONFIG_SPL_FS_FAT is not set
# CONFIG_SPL_LIBDISK_SUPPORT is not set
@@ -27,11 +31,7 @@
# CONFIG_BOARD_LATE_INIT is not set
CONFIG_CLOCKS=y
CONFIG_SPL_MAX_SIZE=0x30000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x20000
-CONFIG_SPL_BSS_MAX_SIZE=0x8000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
-CONFIG_SPL_STACK_R=y
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x200000
diff --git a/configs/zynq_cse_qspi_defconfig b/configs/zynq_cse_qspi_defconfig
index dd7f978..5b861bd 100644
--- a/configs/zynq_cse_qspi_defconfig
+++ b/configs/zynq_cse_qspi_defconfig
@@ -13,6 +13,10 @@
CONFIG_DEFAULT_DEVICE_TREE="zynq-cse-qspi-single"
CONFIG_SPL_STACK_R_ADDR=0x200000
CONFIG_SPL_STACK=0xfffffe00
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x20000
+CONFIG_SPL_BSS_MAX_SIZE=0x8000
+CONFIG_SPL_STACK_R=y
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0x0
CONFIG_DEBUG_UART_CLOCK=0
@@ -34,11 +38,7 @@
# CONFIG_BOARD_LATE_INIT is not set
CONFIG_CLOCKS=y
CONFIG_SPL_MAX_SIZE=0x30000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x20000
-CONFIG_SPL_BSS_MAX_SIZE=0x8000
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
-CONFIG_SPL_STACK_R=y
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x200000
diff --git a/disk/disk-uclass.c b/disk/disk-uclass.c
index efe4bf1..ee3cc44 100644
--- a/disk/disk-uclass.c
+++ b/disk/disk-uclass.c
@@ -8,7 +8,6 @@
#define LOG_CATEGORY UCLASS_PARTITION
-#include <common.h>
#include <blk.h>
#include <dm.h>
#include <log.h>
diff --git a/disk/part.c b/disk/part.c
index 36b8820..bc93252 100644
--- a/disk/part.c
+++ b/disk/part.c
@@ -4,7 +4,6 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
#include <blk.h>
#include <command.h>
#include <env.h>
@@ -14,6 +13,7 @@
#include <malloc.h>
#include <part.h>
#include <ubifs_uboot.h>
+#include <dm/uclass.h>
#undef PART_DEBUG
@@ -305,50 +305,8 @@
CONFIG_IS_ENABLED(ISO_PARTITION) || \
CONFIG_IS_ENABLED(AMIGA_PARTITION) || \
CONFIG_IS_ENABLED(EFI_PARTITION)
- puts ("\nPartition Map for ");
- switch (desc->uclass_id) {
- case UCLASS_IDE:
- puts ("IDE");
- break;
- case UCLASS_AHCI:
- puts ("SATA");
- break;
- case UCLASS_SCSI:
- puts ("SCSI");
- break;
- case UCLASS_USB:
- puts ("USB");
- break;
- case UCLASS_MMC:
- puts ("MMC");
- break;
- case UCLASS_HOST:
- puts ("HOST");
- break;
- case UCLASS_NVME:
- puts ("NVMe");
- break;
- case UCLASS_PVBLOCK:
- puts("PV BLOCK");
- break;
- case UCLASS_RKMTD:
- puts("RKMTD");
- break;
- case UCLASS_VIRTIO:
- puts("VirtIO");
- break;
- case UCLASS_EFI_MEDIA:
- puts("EFI");
- break;
- case UCLASS_BLKMAP:
- puts("BLKMAP");
- break;
- default:
- printf("UNKNOWN(%d)", desc->uclass_id);
- break;
- }
- printf (" device %d -- Partition Type: %s\n\n",
- desc->devnum, type);
+ printf("\nPartition Map for %s device %d -- Partition Type: %s\n\n",
+ uclass_get_name(desc->uclass_id), desc->devnum, type);
#endif /* any CONFIG_..._PARTITION */
}
@@ -717,8 +675,11 @@
for (i = 1; i < part_drv->max_entries; i++) {
ret = part_drv->get_info(desc, i, info);
if (ret != 0) {
- /* no more entries in table */
- break;
+ /*
+ * Partition with this index can't be obtained, but
+ * further partitions might be, so keep checking.
+ */
+ continue;
}
if (strcmp(name, (const char *)info->name) == 0) {
/* matched */
diff --git a/disk/part_amiga.c b/disk/part_amiga.c
index 65e30fe..9b0f2fe 100644
--- a/disk/part_amiga.c
+++ b/disk/part_amiga.c
@@ -4,12 +4,12 @@
* Hans-Joerg Frieden, Hyperion Entertainment
* Hans-JoergF@hyperion-entertainment.com
*/
-#include <common.h>
#include <command.h>
#include <env.h>
#include <ide.h>
#include "part_amiga.h"
#include <part.h>
+#include <vsprintf.h>
#undef AMIGA_DEBUG
diff --git a/disk/part_dos.c b/disk/part_dos.c
index 567ead7..e6b5295 100644
--- a/disk/part_dos.c
+++ b/disk/part_dos.c
@@ -13,11 +13,11 @@
* http://developer.apple.com/techpubs/mac/Devices/Devices-126.html#MARKER-14-92
*/
-#include <common.h>
#include <blk.h>
#include <command.h>
#include <ide.h>
#include <memalign.h>
+#include <vsprintf.h>
#include <asm/unaligned.h>
#include <linux/compiler.h>
#include "part_dos.h"
diff --git a/disk/part_efi.c b/disk/part_efi.c
index 4ce9243..b1a03bd 100644
--- a/disk/part_efi.c
+++ b/disk/part_efi.c
@@ -12,7 +12,6 @@
#define LOG_CATEGORY LOGC_FS
-#include <common.h>
#include <blk.h>
#include <log.h>
#include <part.h>
diff --git a/disk/part_iso.c b/disk/part_iso.c
index 6ac6d95..6e05b2f 100644
--- a/disk/part_iso.c
+++ b/disk/part_iso.c
@@ -4,7 +4,6 @@
* Denis Peter, MPL AG Switzerland, d.peter@mpl.ch.
*/
-#include <common.h>
#include <blk.h>
#include <command.h>
#include <part.h>
diff --git a/disk/part_mac.c b/disk/part_mac.c
index db5e203..81a6582 100644
--- a/disk/part_mac.c
+++ b/disk/part_mac.c
@@ -12,7 +12,6 @@
* http://developer.apple.com/techpubs/mac/Devices/Devices-126.html#MARKER-14-92
*/
-#include <common.h>
#include <command.h>
#include <log.h>
#include <memalign.h>
diff --git a/doc/android/fastboot.rst b/doc/android/fastboot.rst
index 05d8f77..6f92cd2 100644
--- a/doc/android/fastboot.rst
+++ b/doc/android/fastboot.rst
@@ -30,6 +30,7 @@
- ``oem bootbus`` - this executes ``mmc bootbus %x %s`` to configure eMMC
- ``oem run`` - this executes an arbitrary U-Boot command
- ``oem console`` - this dumps U-Boot console record buffer
+- ``oem board`` - this executes a custom board function which is defined by the vendor
Support for both eMMC and NAND devices is included.
@@ -246,6 +247,23 @@
(``if``, ``while``, etc.). The exit code of ``fastboot`` will reflect the exit
code of the command you ran.
+Running Custom Vendor Code
+^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+U-Boot allows you to execute custom fastboot logic, which can be defined
+in board/ files. It can still be used for production devices with verified
+boot, because the vendor defines logic at compile time by implementing
+fastboot_oem_board() function. The attacker will not be able to execute
+custom commands / code. For example, this can be useful for custom flashing
+or erasing protocols::
+
+ $ fastboot stage bootloader.img
+ $ fastboot oem board:write_bootloader
+
+In this case, ``cmd_parameter`` argument of the function ``fastboot_oem_board()``
+will contain string "write_bootloader" and ``data`` argument is a pointer to
+fastboot input buffer, which contains the contents of bootloader.img file.
+
References
----------
diff --git a/doc/board/amlogic/jethub-j100.rst b/doc/board/amlogic/jethub-j100.rst
index 86acdaf..cbf1ea7 100644
--- a/doc/board/amlogic/jethub-j100.rst
+++ b/doc/board/amlogic/jethub-j100.rst
@@ -1,9 +1,9 @@
.. SPDX-License-Identifier: GPL-2.0+
-U-Boot for JetHub J100 (A113X)
-==============================
+U-Boot for JetHub J100/J110 (A113X)
+===================================
-JetHome Jethub D1 (http://jethome.ru/jethub-d1) is a home automation controller device
+JetHome Jethub D1/D1+ (http://jethome.ru/jethub-d1p) is a home automation controller device
manufactured by JetHome with the following specifications:
- Amlogic A113X (ARM Cortex-A53) quad-core up to 1.5GHz
@@ -23,7 +23,10 @@
The basic version also has:
- - TI CC2538 + CC2592 Zigbee Wireless with upto 20dBm output power and Zigbee 3.0
+ - Zigbee module one from:
+ - TI CC2538 + CC2592 Zigbee 3.0 Wireless
+ - TI CC2652P1 Zigbee 3.0 Wireless
+ - Silicon Labs EFT32MG21 Zigbee 3.0/Thread Wireless
- 1 x 1-Wire
- 2 x RS-485
- 4 x dry contact digital GPIO inputs
diff --git a/doc/board/index.rst b/doc/board/index.rst
index f0a11f8..428faa8 100644
--- a/doc/board/index.rst
+++ b/doc/board/index.rst
@@ -42,6 +42,7 @@
renesas/index
rockchip/index
samsung/index
+ schneider/index
sielaff/index
siemens/index
sifive/index
diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst
index 5dd5ea7..9a726e9 100644
--- a/doc/board/rockchip/rockchip.rst
+++ b/doc/board/rockchip/rockchip.rst
@@ -131,6 +131,8 @@
- Turing Machines RK1 (turing-rk1-rk3588)
- Xunlong Orange Pi 5 (orangepi-5-rk3588s)
- Xunlong Orange Pi 5 Plus (orangepi-5-plus-rk3588)
+ - Yanyi Tech CoolPi 4 Model B (coolpi-4b-rk3588s)
+ - Yanyi Tech CoolPi CM5 EVB (coolpi-cm5-evb-rk3588)
* rv1108
- Rockchip Evb-rv1108 (evb-rv1108)
diff --git a/doc/board/schneider/hmibsc.rst b/doc/board/schneider/hmibsc.rst
new file mode 100644
index 0000000..f09fb5a
--- /dev/null
+++ b/doc/board/schneider/hmibsc.rst
@@ -0,0 +1,45 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. sectionauthor:: Sumit Garg <sumit.garg@linaro.org>
+
+HMIBSC
+======
+
+The HMIBSC is an IIoT Edge Box Core board based on the Qualcomm APQ8016E SoC.
+More information can be found on the `SE product page`_.
+
+U-Boot can be used as a replacement for Qualcomm's original Android bootloader
+(a fork of Little Kernel/LK). Like LK, it is installed directly into the ``aboot``
+partition. Note that the U-Boot port used to be loaded as an Android boot image
+through LK. This is no longer the case, now U-Boot can replace LK entirely.
+
+.. _SE product page: https://www.se.com/us/en/product/HMIBSCEA53D1L0T/iiot-edge-box-core-harmony-ipc-emmc-dc-linux-tpm/
+
+Build steps
+-----------
+
+First, setup ``CROSS_COMPILE`` for aarch64. Then, build U-Boot for ``hmibsc``::
+
+ $ export CROSS_COMPILE=<aarch64 toolchain prefix>
+ $ make hmibsc_defconfig
+ $ make
+
+This will build ``u-boot.elf`` in the configured output directory.
+
+Installation
+------------
+
+Although the HMIBSC does not have secure boot set up by default, the firmware
+still expects firmware ELF images to be "signed". The signature does not provide
+any security in this case, but it provides the firmware with some required
+metadata.
+
+To "sign" ``u-boot.elf`` you can use e.g. `qtestsign`_::
+
+ $ ./qtestsign.py aboot u-boot.elf
+
+Then install the resulting ``u-boot-test-signed.mbn`` to the ``aboot`` partition
+on your device, e.g. with ``fastboot flash aboot u-boot-test-signed.mbn``.
+
+U-Boot should be running after a reboot (``fastboot reboot``).
+
+.. _qtestsign: https://github.com/msm8916-mainline/qtestsign
diff --git a/doc/board/schneider/index.rst b/doc/board/schneider/index.rst
new file mode 100644
index 0000000..55792ed
--- /dev/null
+++ b/doc/board/schneider/index.rst
@@ -0,0 +1,9 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Schneider Electric
+==================
+
+.. toctree::
+ :maxdepth: 2
+
+ hmibsc
diff --git a/doc/board/starfive/index.rst b/doc/board/starfive/index.rst
index 0c52dc7..2762bf7 100644
--- a/doc/board/starfive/index.rst
+++ b/doc/board/starfive/index.rst
@@ -6,4 +6,5 @@
.. toctree::
:maxdepth: 1
+ milk-v_mars.rst
visionfive2
diff --git a/doc/board/starfive/milk-v_mars.rst b/doc/board/starfive/milk-v_mars.rst
new file mode 100644
index 0000000..554932e
--- /dev/null
+++ b/doc/board/starfive/milk-v_mars.rst
@@ -0,0 +1,111 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Milk-V Mars
+===========
+
+U-Boot for the Milk-V Mars uses the same U-Boot binaries as the VisionFive 2
+board. In U-Boot SPL the actual board is detected and the device-tree patched
+accordingly.
+
+Building
+~~~~~~~~
+
+1. Add the RISC-V toolchain to your PATH.
+2. Setup ARCH & cross compilation environment variable:
+
+.. code-block:: none
+
+ export CROSS_COMPILE=<riscv64 toolchain prefix>
+
+The M-mode software OpenSBI provides the supervisor binary interface (SBI) and
+is responsible for the switch to S-Mode. It is a prerequisite to build U-Boot.
+Support for the JH7110 was introduced in OpenSBI 1.2. It is recommended to use
+a current release.
+
+.. code-block:: console
+
+ git clone https://github.com/riscv/opensbi.git
+ cd opensbi
+ make PLATFORM=generic FW_TEXT_START=0x40000000 FW_OPTIONS=0
+
+Now build the U-Boot SPL and U-Boot proper.
+
+.. code-block:: console
+
+ cd <U-Boot-dir>
+ make starfive_visionfive2_defconfig
+ make OPENSBI=$(opensbi_dir)/build/platform/generic/firmware/fw_dynamic.bin
+
+This will generate the U-Boot SPL image (spl/u-boot-spl.bin.normal.out) as well
+as the FIT image (u-boot.itb) with OpenSBI and U-Boot.
+
+Device-tree selection
+~~~~~~~~~~~~~~~~~~~~~
+
+Depending on the board version U-Boot set variable $fdtfile to either
+starfive/jh7110-starfive-visionfive-2-v1.2a.dtb or
+starfive/jh7110-starfive-visionfive-2-v1.3b.dtb.
+
+To overrule this selection the variable can be set manually and saved in the
+environment
+
+::
+
+ setenv fdtfile my_device-tree.dtb
+ env save
+
+or the configuration variable CONFIG_DEFAULT_FDT_FILE can be used to set to
+provide a default value.
+
+Boot source selection
+~~~~~~~~~~~~~~~~~~~~~
+
+The board provides the DIP switches MSEL[1:0] to select the boot device out of
+SPI flash, eMMC, SD-card, UART. To select booting from SD-card set the DIP
+switches MSEL[1:0] to 10.
+
+Preparing the SD-Card
+~~~~~~~~~~~~~~~~~~~~~
+
+The device firmware loads U-Boot SPL (u-boot-spl.bin.normal.out) from the
+partition with type GUID 2E54B353-1271-4842-806F-E436D6AF6985. You are free
+to choose any partition number.
+
+With the default configuration U-Boot SPL loads the U-Boot FIT image
+(u-boot.itb) from partition 2 (CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=0x2).
+When formatting it is recommended to use GUID
+BC13C2FF-59E6-4262-A352-B275FD6F7172 for this partition.
+
+The FIT image (u-boot.itb) is a combination of OpenSBI's fw_dynamic.bin,
+u-boot-nodtb.bin and the device tree blob.
+
+Format the SD card (make sure the disk has GPT, otherwise use gdisk to switch)
+
+.. code-block:: bash
+
+ sudo sgdisk --clear \
+ --set-alignment=2 \
+ --new=1:4096:8191 --change-name=1:spl --typecode=1:2E54B353-1271-4842-806F-E436D6AF6985\
+ --new=2:8192:16383 --change-name=2:uboot --typecode=2:BC13C2FF-59E6-4262-A352-B275FD6F7172 \
+ --new=3:16384:1654784 --change-name=3:system --typecode=3:EBD0A0A2-B9E5-4433-87C0-68B6B72699C7 \
+ /dev/sdb
+
+Copy U-Boot to the SD card
+
+.. code-block:: bash
+
+ sudo dd if=u-boot-spl.bin.normal.out of=/dev/sdb1
+ sudo dd if=u-boot.itb of=/dev/sdb2
+
+ sudo mount /dev/sdb3 /mnt/
+ sudo cp u-boot-spl.bin.normal.out /mnt/
+ sudo cp u-boot.itb /mnt/
+ sudo cp Image.gz /mnt/
+ sudo cp initramfs.cpio.gz /mnt/
+ sudo cp jh7110-starfive-visionfive-2.dtb /mnt/
+ sudo umount /mnt
+
+Booting
+~~~~~~~
+
+Once you plugin the sdcard and power up, you should see the U-Boot prompt.
diff --git a/doc/board/starfive/visionfive2.rst b/doc/board/starfive/visionfive2.rst
index abda8ac..2c68df3 100644
--- a/doc/board/starfive/visionfive2.rst
+++ b/doc/board/starfive/visionfive2.rst
@@ -71,6 +71,24 @@
This will generate the U-Boot SPL image (spl/u-boot-spl.bin.normal.out) as well
as the FIT image (u-boot.itb) with OpenSBI and U-Boot.
+Device-tree selection
+~~~~~~~~~~~~~~~~~~~~~
+
+Depending on the board version U-Boot set variable $fdtfile to either
+starfive/jh7110-starfive-visionfive-2-v1.2a.dtb or
+starfive/jh7110-starfive-visionfive-2-v1.3b.dtb.
+
+To overrule this selection the variable can be set manually and saved in the
+environment
+
+::
+
+ setenv fdtfile my_device-tree.dtb
+ env save
+
+or the configuration variable CONFIG_DEFAULT_FDT_FILE can be used to provide
+a default value.
+
Flashing
~~~~~~~~
diff --git a/doc/build/docker.rst b/doc/build/docker.rst
index 953d1b2..45659b3 100644
--- a/doc/build/docker.rst
+++ b/doc/build/docker.rst
@@ -11,4 +11,4 @@
.. code-block:: bash
- sudo docker pull trini/u-boot-gitlab-ci-runner:bionic-20200807-02Sep2020
+ sudo docker pull trini/u-boot-gitlab-ci-runner:jammy-20240227-14Mar2024
diff --git a/doc/build/gen_compile_commands.rst b/doc/build/gen_compile_commands.rst
index 50305ce..d503764 100644
--- a/doc/build/gen_compile_commands.rst
+++ b/doc/build/gen_compile_commands.rst
@@ -42,7 +42,7 @@
other than it's default one (compile_commands.json).
Compatible IDEs
-===============
+---------------
Several popular integrated development environments (IDEs) support the use
of JSON compilation databases for C/C++ development, making it easier to
@@ -73,7 +73,7 @@
code navigation.
Usage
-=====
+-----
For further details on the script's options, please refer to its help message,
as in the example below.
diff --git a/doc/develop/codingstyle.rst b/doc/develop/codingstyle.rst
index f6248cd..fa3cd6a 100644
--- a/doc/develop/codingstyle.rst
+++ b/doc/develop/codingstyle.rst
@@ -110,9 +110,8 @@
You should follow this ordering in U-Boot. In all cases, they should be listed
in alphabetical order. First comes headers which are located directly in our
-top-level include diretory. This excludes the common.h header file which is to
-be removed. Second are headers within subdirectories, Finally directory-local
-includes should be listed. See this example:
+top-level include diretory. Second are headers within subdirectories, Finally
+directory-local includes should be listed. See this example:
.. code-block:: C
@@ -129,9 +128,6 @@
``#ifndef USE_HOSTCC`` to avoid including U-Boot specific include files. See
common/image.c for an example.
-If you encounter code which still uses <common.h> a patch to remove that and
-replace it with any required include files directly is much appreciated.
-
If your file uses driver model, include <dm.h> in the C file. Do not include
dm.h in a header file. Try to use forward declarations (e.g. ``struct
udevice``) instead.
diff --git a/doc/develop/release_cycle.rst b/doc/develop/release_cycle.rst
index 8d4c112..64757b4 100644
--- a/doc/develop/release_cycle.rst
+++ b/doc/develop/release_cycle.rst
@@ -19,6 +19,9 @@
* After the merge window closes, no new features may be added to allow for a
release candidate phase which is intended to fix bugs and regressions.
+* To help with late pull requests, the **next** branch will open when the
+ second release candidate is published.
+
*Note:* While we try to adhere to the release schedule, we will
not hesitate and take the liberty to delay a release if there are
good reasons, for example if there are known bugs or other technical
@@ -50,10 +53,9 @@
* U-Boot v2024.04 was released on Tue 02 April 2024.
-* The Merge Window for the next release (v2024.07) is **open** until the -rc1
- release on Mon 22 April 2024.
+* The Merge Window for the next release (v2024.07) is **closed**.
-* The next branch is now **closed**.
+* The next branch is now **open**.
* Release "v2024.07" is scheduled for 01 July 2024.
@@ -63,11 +65,11 @@
.. The following commented out dates are for when release candidates are
planned to be tagged.
-.. For the next scheduled release, release candidates were made on::
+For the next scheduled release, release candidates were made on::
-.. * U-Boot v2024.07-rc1 was released on Mon 22 April 2024.
+* U-Boot v2024.07-rc1 was released on Mon 22 April 2024.
-.. * U-Boot v2024.07-rc2 was released on Tue 06 May 2024.
+* U-Boot v2024.07-rc2 was released on Mon 06 May 2024.
.. * U-Boot v2024.07-rc3 was released on Mon 20 May 2024.
diff --git a/doc/develop/tests_sandbox.rst b/doc/develop/tests_sandbox.rst
index bfd3bdb..7292307 100644
--- a/doc/develop/tests_sandbox.rst
+++ b/doc/develop/tests_sandbox.rst
@@ -28,8 +28,8 @@
- test/image/test-imagetools.sh - multi-file images
- test/py/tests/test-fit.py - FIT images
- - tracing: test/trace/test-trace.sh tests the tracing system (see
- README.trace)
+ - tracing: test/trace/test-trace.sh tests the tracing system
+ (see :doc:`trace`).
- verified boot: test/py/tests/test_vboot.py
If you change or enhance any U-Boot subsystem, you should write or expand a
diff --git a/doc/develop/tests_writing.rst b/doc/develop/tests_writing.rst
index bb1145d..44b544f 100644
--- a/doc/develop/tests_writing.rst
+++ b/doc/develop/tests_writing.rst
@@ -281,7 +281,6 @@
Create a new file in test/ or a subdirectory and define a macro to register the
suite. For example::
- #include <common.h>
#include <console.h>
#include <mapmem.h>
#include <dm/test.h>
diff --git a/doc/device-tree-bindings/serial/msm-serial.txt b/doc/device-tree-bindings/serial/msm-serial.txt
deleted file mode 100644
index dca9957..0000000
--- a/doc/device-tree-bindings/serial/msm-serial.txt
+++ /dev/null
@@ -1,10 +0,0 @@
-Qualcomm UART (Data Mover mode)
-
-Required properties:
-- compatible: must be "qcom,msm-uartdm-v1.4"
-- reg: start address and size of the registers
-- clock: interface clock (must accept baudrate as a frequency)
-
-Optional properties:
-- bit-rate: Data Mover bit rate register value
- (If not defined then 0xCC is used as default)
diff --git a/doc/device-tree-bindings/sysreset/ti,sci-sysreset.txt b/doc/device-tree-bindings/sysreset/ti,sci-sysreset.txt
deleted file mode 100644
index 02704c6..0000000
--- a/doc/device-tree-bindings/sysreset/ti,sci-sysreset.txt
+++ /dev/null
@@ -1,29 +0,0 @@
-Texas Instruments TI SCI System Reset Controller
-================================================
-
-Some TI SoCs contain a system controller (like the SYSFW, etc...) that is
-responsible for controlling the state of the IPs that are present.
-Communication between the host processor running an OS and the system
-controller happens through a protocol known as TI SCI [1].
-
-[1] http://processors.wiki.ti.com/index.php/TISCI
-
-System Reset Controller Node
-============================
-The sysreset controller node represents the reset for the overall SoC
-which is managed by the SYSFW. Because this relies on the TI SCI protocol
-to communicate with the SYSFW it must be a child of the sysfw node.
-
-Required Properties:
---------------------
- - compatible: Must be "ti,sci-sysreset"
-
-Example (AM65x):
-----------------
- sysfw: sysfw {
- compatible = "ti,am654-system-controller";
- ...
- k3_sysreset: sysreset-controller {
- compatible = "ti,sci-sysreset";
- };
- };
diff --git a/doc/sphinx/requirements.txt b/doc/sphinx/requirements.txt
index 840c6ce..5b4df36 100644
--- a/doc/sphinx/requirements.txt
+++ b/doc/sphinx/requirements.txt
@@ -3,7 +3,7 @@
certifi==2023.11.17
charset-normalizer==3.3.2
docutils==0.20.1
-idna==3.6
+idna==3.7
imagesize==1.4.1
Jinja2==3.1.3
MarkupSafe==2.1.3
diff --git a/doc/usage/cmd/env.rst b/doc/usage/cmd/env.rst
index a7e2169..9629f97 100644
--- a/doc/usage/cmd/env.rst
+++ b/doc/usage/cmd/env.rst
@@ -16,18 +16,18 @@
env default [-f] (-a | var [...])
env delete [-f] var [...]
env edit name
+ env erase
env exists name
env export [-t | -b | -c] [-s size] addr [var ...]
env flags
env grep [-e] [-n | -v | -b] string [...]
env import [-d] [-t [-r] | -b | -c] addr [size] [var ...]
env info [-d] [-p] [-q]
+ env load
env print [-a | name ...]
env print -e [-guid guid] [-n] [name ...]
env run var [...]
env save
- env erase
- env load
env select [target]
env set [-f] name [value]
env set -e [-nv][-bs][-rt][-at][-a][-i addr:size][-v] name [value]
@@ -40,11 +40,12 @@
The next commands are kept as alias and for compatibility:
++ :doc:`askenv <askenv>` = *env ask*
+ *editenv* = *env edit*
+ *grepenv* = *env grep*
-+ *setenv* = *env set*
-+ *askenv* = *env ask*
++ :doc:`printenv <printenv>` = *env print*
+ *run* = *env run*
++ *setenv* = *env set*
Ask
~~~
@@ -103,6 +104,11 @@
name
name of the variable.
+Erase
+~~~~~
+
+The *env erase* command erases the U-Boot environment.
+
Exists
~~~~~~
@@ -204,6 +210,11 @@
quiet output, use only for command result, by example with
'test' command.
+Load
+~~~~
+
+The *env load* command loads the U-Boot environment from persistent storage.
+
Print
~~~~~
@@ -215,7 +226,7 @@
\-a
all U-Boot environment, when 'name' is absent.
\-e
- print UEFI variables, all by default when 'name'.
+ print UEFI variables, all by default if 'name' is not provided.
\-guid guid
print only the UEFI variables matching this GUID (any by default)
with guid format = "xxxxxxxx-xxxx-xxxx-xxxx-xxxxxxxxxxxx".
@@ -235,16 +246,6 @@
The *env save* command saves the U-Boot environment in persistent storage.
-Erase
-~~~~~
-
-The *env erase* command erases the U-Boot environment.
-
-Load
-~~~~
-
-The *env load* command loads the U-Boot environment from persistent storage.
-
Select
~~~~~~
@@ -350,15 +351,15 @@
exists
CONFIG_CMD_ENV_EXISTS
-flags
- CONFIG_CMD_ENV_FLAGS
-
erase
CONFIG_CMD_ERASEENV
export
CONFIG_CMD_EXPORTENV
+flags
+ CONFIG_CMD_ENV_FLAGS
+
grep
CONFIG_CMD_GREPENV, CONFIG_REGEX for '-e' option
@@ -371,6 +372,10 @@
load
CONFIG_CMD_NVEDIT_LOAD
+print
+ CONFIG_CMD_NVEDIT_EFI for UEFI variables support ('-e' option),
+ additionally CONFIG_HEXDUMP to display content of UEFI variables
+
run
CONFIG_CMD_RUN
@@ -380,5 +385,5 @@
select
CONFIG_CMD_NVEDIT_SELECT
-set, print
- CONFIG_CMD_NVEDIT_EFI for '-e' option
+set
+ CONFIG_CMD_NVEDIT_EFI for UEFI variables support ('-e' option)
diff --git a/doc/usage/cmd/itest.rst b/doc/usage/cmd/itest.rst
index ab933db..9c307fb 100644
--- a/doc/usage/cmd/itest.rst
+++ b/doc/usage/cmd/itest.rst
@@ -86,6 +86,8 @@
Postfix .s causes a string compare. The string '0xa1234' is alphabetically
smaller than '0xb'.
+::
+
=> if itest.s 0xa1234 < 0xb; then echo true; else echo false; fi
true
diff --git a/doc/usage/environment.rst b/doc/usage/environment.rst
index ebf75fa..7d4b448 100644
--- a/doc/usage/environment.rst
+++ b/doc/usage/environment.rst
@@ -366,6 +366,19 @@
This means the count of blocks we can receive before
sending ack to server.
+usb_ignorelist
+ Ignore USB devices to prevent binding them to an USB device driver. This can
+ be used to ignore devices are for some reason undesirable or causes crashes
+ u-boot's USB stack.
+ An example for undesired behavior is the keyboard emulation of security keys
+ like Yubikeys. U-boot currently supports only a single USB keyboard device
+ so try to probe an useful keyboard device. The default environment blocks
+ Yubico devices as common devices emulating keyboards.
+ Devices are matched by idVendor and idProduct. The variable contains a comma
+ separated list of idVendor:idProduct pairs as hexadecimal numbers joined
+ by a colon. '*' functions as a wildcard for idProduct to block all devices
+ with the specified idVendor.
+
vlan
When set to a value < 4095 the traffic over
Ethernet is encapsulated/received over 802.1q
diff --git a/doc/usage/partitions.rst b/doc/usage/partitions.rst
index 628469b..acf4573 100644
--- a/doc/usage/partitions.rst
+++ b/doc/usage/partitions.rst
@@ -44,9 +44,20 @@
<devtype><devletter><partnum>
devtype
- A device type like ``mmcsd`` or ``hd``. See the
- ``part_set_generic_name`` function in ``disk/part.c`` for a
- complete list.
+ The devtype field is set in dependence of the device class:
+
+ ======= ===============
+ devtype device class
+ ======= ===============
+ hd IDE or SATA
+ sd SCSI
+ usbd USB
+ mmcsd eMMC or SD-card
+ xx others
+ ======= ===============
+
+ See the ``part_set_generic_name`` function in ``disk/part.c``
+ for the complete list.
devletter
The device number as an offset from ``a``. For example, device
diff --git a/drivers/Makefile b/drivers/Makefile
index bf73b77..9195daf 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -126,7 +126,7 @@
obj-$(CONFIG_MACH_PIC32) += ddr/microchip/
obj-$(CONFIG_FUZZ) += fuzz/
obj-$(CONFIG_DM_HWSPINLOCK) += hwspinlock/
-obj-$(CONFIG_DM_RNG) += rng/
+obj-$(CONFIG_$(SPL_TPL_)DM_RNG) += rng/
endif
obj-y += soc/
diff --git a/drivers/adc/adc-uclass.c b/drivers/adc/adc-uclass.c
index 1b35bf2..16600be 100644
--- a/drivers/adc/adc-uclass.c
+++ b/drivers/adc/adc-uclass.c
@@ -6,7 +6,6 @@
#define LOG_CATEGORY UCLASS_ADC
-#include <common.h>
#include <errno.h>
#include <div64.h>
#include <dm.h>
diff --git a/drivers/adc/exynos-adc.c b/drivers/adc/exynos-adc.c
index 2bda733..ecc564c 100644
--- a/drivers/adc/exynos-adc.c
+++ b/drivers/adc/exynos-adc.c
@@ -3,7 +3,6 @@
* Copyright (C) 2015 Samsung Electronics
* Przemyslaw Marczak <p.marczak@samsung.com>
*/
-#include <common.h>
#include <errno.h>
#include <dm.h>
#include <adc.h>
diff --git a/drivers/adc/imx93-adc.c b/drivers/adc/imx93-adc.c
index 41d04e0..f593fb6 100644
--- a/drivers/adc/imx93-adc.c
+++ b/drivers/adc/imx93-adc.c
@@ -6,7 +6,6 @@
* Originally based on NXP linux-imx kernel v5.15 drivers/iio/adc/imx93_adc.c
*/
-#include <common.h>
#include <errno.h>
#include <dm.h>
#include <linux/bitfield.h>
diff --git a/drivers/adc/meson-saradc.c b/drivers/adc/meson-saradc.c
index c15c7fe..60e3489 100644
--- a/drivers/adc/meson-saradc.c
+++ b/drivers/adc/meson-saradc.c
@@ -7,7 +7,6 @@
* Amlogic Meson Successive Approximation Register (SAR) A/D Converter
*/
-#include <common.h>
#include <adc.h>
#include <clk.h>
#include <dm.h>
diff --git a/drivers/adc/rockchip-saradc.c b/drivers/adc/rockchip-saradc.c
index 10ded1b..f6832ab 100644
--- a/drivers/adc/rockchip-saradc.c
+++ b/drivers/adc/rockchip-saradc.c
@@ -5,7 +5,6 @@
* Rockchip SARADC driver for U-Boot
*/
-#include <common.h>
#include <adc.h>
#include <clk.h>
#include <dm.h>
diff --git a/drivers/adc/sandbox.c b/drivers/adc/sandbox.c
index 43cad34..24d4af6 100644
--- a/drivers/adc/sandbox.c
+++ b/drivers/adc/sandbox.c
@@ -3,7 +3,6 @@
* Copyright (C) 2015 Samsung Electronics
* Przemyslaw Marczak <p.marczak@samsung.com>
*/
-#include <common.h>
#include <errno.h>
#include <dm.h>
#include <adc.h>
diff --git a/drivers/adc/stm32-adc-core.c b/drivers/adc/stm32-adc-core.c
index 6c17696..af340b8 100644
--- a/drivers/adc/stm32-adc-core.c
+++ b/drivers/adc/stm32-adc-core.c
@@ -6,7 +6,6 @@
* Originally based on the Linux kernel v4.18 drivers/iio/adc/stm32-adc-core.c.
*/
-#include <common.h>
#include <dm.h>
#include <asm/io.h>
#include <dm/device_compat.h>
diff --git a/drivers/adc/stm32-adc.c b/drivers/adc/stm32-adc.c
index 1fba707..d50f00f 100644
--- a/drivers/adc/stm32-adc.c
+++ b/drivers/adc/stm32-adc.c
@@ -6,7 +6,6 @@
* Originally based on the Linux kernel v4.18 drivers/iio/adc/stm32-adc.c.
*/
-#include <common.h>
#include <adc.h>
#include <dm.h>
#include <asm/io.h>
diff --git a/drivers/ata/ahci-pci.c b/drivers/ata/ahci-pci.c
index 5356b9d..f2102aa 100644
--- a/drivers/ata/ahci-pci.c
+++ b/drivers/ata/ahci-pci.c
@@ -3,7 +3,6 @@
* Copyright (C) 2017, Bin Meng <bmeng.cn@gmail.com>
*/
-#include <common.h>
#include <ahci.h>
#include <scsi.h>
#include <dm.h>
diff --git a/drivers/ata/ahci-uclass.c b/drivers/ata/ahci-uclass.c
index d398b50..7affb3f 100644
--- a/drivers/ata/ahci-uclass.c
+++ b/drivers/ata/ahci-uclass.c
@@ -6,7 +6,6 @@
#define LOG_CATEGORY UCLASS_AHCI
-#include <common.h>
#include <ahci.h>
#include <dm.h>
diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c
index 04ddc33..ac86929 100644
--- a/drivers/ata/ahci.c
+++ b/drivers/ata/ahci.c
@@ -8,10 +8,10 @@
*
* This driver provides a SCSI interface to SATA.
*/
-#include <common.h>
#include <blk.h>
#include <cpu_func.h>
#include <log.h>
+#include <time.h>
#include <linux/bitops.h>
#include <linux/delay.h>
diff --git a/drivers/ata/ahci_mvebu.c b/drivers/ata/ahci_mvebu.c
index f05150d..f6e2d6b 100644
--- a/drivers/ata/ahci_mvebu.c
+++ b/drivers/ata/ahci_mvebu.c
@@ -3,7 +3,6 @@
* Copyright (C) 2016 Stefan Roese <sr@denx.de>
*/
-#include <common.h>
#include <ahci.h>
#include <dm.h>
#include <log.h>
diff --git a/drivers/ata/ahci_sunxi.c b/drivers/ata/ahci_sunxi.c
index 9064774..6cf5cee 100644
--- a/drivers/ata/ahci_sunxi.c
+++ b/drivers/ata/ahci_sunxi.c
@@ -1,4 +1,3 @@
-#include <common.h>
#include <ahci.h>
#include <dm.h>
#include <log.h>
diff --git a/drivers/ata/dwc_ahci.c b/drivers/ata/dwc_ahci.c
index 15fd3e3..b480cde 100644
--- a/drivers/ata/dwc_ahci.c
+++ b/drivers/ata/dwc_ahci.c
@@ -8,7 +8,6 @@
* Author: Mugunthan V N <mugunthanvnm@ti.com>
*/
-#include <common.h>
#include <dm.h>
#include <ahci.h>
#include <scsi.h>
diff --git a/drivers/ata/dwc_ahsata.c b/drivers/ata/dwc_ahsata.c
index b4d4e39..a29d641 100644
--- a/drivers/ata/dwc_ahsata.c
+++ b/drivers/ata/dwc_ahsata.c
@@ -4,7 +4,6 @@
* Terry Lv <r65388@freescale.com>
*/
-#include <common.h>
#include <ahci.h>
#include <blk.h>
#include <cpu_func.h>
diff --git a/drivers/ata/fsl_sata.c b/drivers/ata/fsl_sata.c
index 969bc19..4990148 100644
--- a/drivers/ata/fsl_sata.c
+++ b/drivers/ata/fsl_sata.c
@@ -5,7 +5,6 @@
* Author: Dave Liu <daveliu@freescale.com>
*/
-#include <common.h>
#include <ahci.h>
#include <blk.h>
#include <command.h>
diff --git a/drivers/ata/libata.c b/drivers/ata/libata.c
index 47e2c5c..ef659cb 100644
--- a/drivers/ata/libata.c
+++ b/drivers/ata/libata.c
@@ -5,9 +5,9 @@
* port from the libata of linux kernel
*/
-#include <common.h>
#include <compiler.h>
#include <libata.h>
+#include <stdio.h>
u64 ata_id_n_sectors(u16 *id)
{
diff --git a/drivers/ata/mtk_ahci.c b/drivers/ata/mtk_ahci.c
index 2c5227d..53aabee 100644
--- a/drivers/ata/mtk_ahci.c
+++ b/drivers/ata/mtk_ahci.c
@@ -8,7 +8,6 @@
* Author: Frank Wunderlich <frank-w@public-files.de>
*/
-#include <common.h>
#include <ahci.h>
#include <asm/global_data.h>
#include <asm/io.h>
diff --git a/drivers/ata/sata.c b/drivers/ata/sata.c
index 784d9bbe..84437d3 100644
--- a/drivers/ata/sata.c
+++ b/drivers/ata/sata.c
@@ -9,7 +9,6 @@
* Dave Liu <daveliu@freescale.com>
*/
-#include <common.h>
#include <ahci.h>
#include <blk.h>
#include <dm.h>
diff --git a/drivers/ata/sata_bootdev.c b/drivers/ata/sata_bootdev.c
index f638493..a5ca6f6 100644
--- a/drivers/ata/sata_bootdev.c
+++ b/drivers/ata/sata_bootdev.c
@@ -5,7 +5,6 @@
* Copyright 2023 Tony Dinh <mibodhi@gmail.com>
*/
-#include <common.h>
#include <ahci.h>
#include <bootdev.h>
#include <dm.h>
diff --git a/drivers/ata/sata_ceva.c b/drivers/ata/sata_ceva.c
index 7769d4f..a81b316 100644
--- a/drivers/ata/sata_ceva.c
+++ b/drivers/ata/sata_ceva.c
@@ -3,7 +3,6 @@
* (C) Copyright 2015 - 2016 Xilinx, Inc.
* Michal Simek <michal.simek@amd.com>
*/
-#include <common.h>
#include <dm.h>
#include <ahci.h>
#include <generic-phy.h>
diff --git a/drivers/ata/sata_mv.c b/drivers/ata/sata_mv.c
index 94d7369..ac78760 100644
--- a/drivers/ata/sata_mv.c
+++ b/drivers/ata/sata_mv.c
@@ -31,7 +31,6 @@
* No port multiplier support
*/
-#include <common.h>
#include <ahci.h>
#include <blk.h>
#include <bootdev.h>
@@ -46,6 +45,7 @@
#include <libata.h>
#include <malloc.h>
#include <sata.h>
+#include <time.h>
#include <linux/bitops.h>
#include <linux/delay.h>
#include <linux/errno.h>
diff --git a/drivers/ata/sata_sil.c b/drivers/ata/sata_sil.c
index 43a91a7..5b80f62 100644
--- a/drivers/ata/sata_sil.c
+++ b/drivers/ata/sata_sil.c
@@ -5,7 +5,6 @@
* Author: Tang Yuantian <b29983@freescale.com>
*/
-#include <common.h>
#include <blk.h>
#include <cpu_func.h>
#include <dm.h>
diff --git a/drivers/axi/axi-emul-uclass.c b/drivers/axi/axi-emul-uclass.c
index e6f3ef0..bea0b04 100644
--- a/drivers/axi/axi-emul-uclass.c
+++ b/drivers/axi/axi-emul-uclass.c
@@ -6,7 +6,6 @@
#define LOG_CATEGORY UCLASS_AXI_EMUL
-#include <common.h>
#include <axi.h>
#include <dm.h>
#include <log.h>
diff --git a/drivers/axi/axi-uclass.c b/drivers/axi/axi-uclass.c
index 41551ae..fa2475c 100644
--- a/drivers/axi/axi-uclass.c
+++ b/drivers/axi/axi-uclass.c
@@ -6,7 +6,6 @@
#define LOG_CATEGORY UCLASS_AXI
-#include <common.h>
#include <dm.h>
#include <axi.h>
diff --git a/drivers/axi/axi_sandbox.c b/drivers/axi/axi_sandbox.c
index b91c91f..6f698a4 100644
--- a/drivers/axi/axi_sandbox.c
+++ b/drivers/axi/axi_sandbox.c
@@ -4,7 +4,6 @@
* Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc
*/
-#include <common.h>
#include <axi.h>
#include <dm.h>
#include <asm/axi.h>
diff --git a/drivers/axi/ihs_axi.c b/drivers/axi/ihs_axi.c
index a7e9761..a37dd1e 100644
--- a/drivers/axi/ihs_axi.c
+++ b/drivers/axi/ihs_axi.c
@@ -7,7 +7,6 @@
* Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc
*/
-#include <common.h>
#include <axi.h>
#include <dm.h>
#include <log.h>
diff --git a/drivers/axi/sandbox_store.c b/drivers/axi/sandbox_store.c
index ef349a5..b9413c7 100644
--- a/drivers/axi/sandbox_store.c
+++ b/drivers/axi/sandbox_store.c
@@ -4,7 +4,6 @@
* Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc
*/
-#include <common.h>
#include <axi.h>
#include <dm.h>
#include <log.h>
diff --git a/drivers/bios_emulator/atibios.c b/drivers/bios_emulator/atibios.c
index 7ebead6..d544ffb 100644
--- a/drivers/bios_emulator/atibios.c
+++ b/drivers/bios_emulator/atibios.c
@@ -45,7 +45,6 @@
* Jason ported this file to u-boot to run the ATI video card
* BIOS in u-boot.
****************************************************************************/
-#include <common.h>
#include <compiler.h>
#include <bios_emul.h>
#include <errno.h>
diff --git a/drivers/bios_emulator/besys.c b/drivers/bios_emulator/besys.c
index 02c4286..690fb5a 100644
--- a/drivers/bios_emulator/besys.c
+++ b/drivers/bios_emulator/besys.c
@@ -48,7 +48,6 @@
****************************************************************************/
#define __io
-#include <common.h>
#include <asm/io.h>
#include "biosemui.h"
diff --git a/drivers/bios_emulator/bios.c b/drivers/bios_emulator/bios.c
index 9596a1f..7f883da 100644
--- a/drivers/bios_emulator/bios.c
+++ b/drivers/bios_emulator/bios.c
@@ -42,7 +42,6 @@
****************************************************************************/
#define __io
-#include <common.h>
#include <asm/io.h>
#include "biosemui.h"
diff --git a/drivers/bios_emulator/biosemu.c b/drivers/bios_emulator/biosemu.c
index 82befba..ba43284 100644
--- a/drivers/bios_emulator/biosemu.c
+++ b/drivers/bios_emulator/biosemu.c
@@ -46,7 +46,6 @@
****************************************************************************/
#include <malloc.h>
-#include <common.h>
#include "biosemui.h"
BE_sysEnv _BE_env = {{0}};
diff --git a/drivers/bios_emulator/x86emu/debug.c b/drivers/bios_emulator/x86emu/debug.c
index 95f3cc0..b426dc3 100644
--- a/drivers/bios_emulator/x86emu/debug.c
+++ b/drivers/bios_emulator/x86emu/debug.c
@@ -38,7 +38,6 @@
****************************************************************************/
#include <stdarg.h>
-#include <common.h>
#include <linux/ctype.h>
#include <linux/printk.h>
#include "x86emu/x86emui.h"
diff --git a/drivers/bios_emulator/x86emu/decode.c b/drivers/bios_emulator/x86emu/decode.c
index e2028ea..7e188d5 100644
--- a/drivers/bios_emulator/x86emu/decode.c
+++ b/drivers/bios_emulator/x86emu/decode.c
@@ -36,7 +36,6 @@
* instruction decoding and accessess of immediate data via IP. etc.
*
****************************************************************************/
-#include <common.h>
#include <linux/printk.h>
#include "x86emu/x86emui.h"
diff --git a/drivers/bios_emulator/x86emu/ops.c b/drivers/bios_emulator/x86emu/ops.c
index 8c1a146..57422ec 100644
--- a/drivers/bios_emulator/x86emu/ops.c
+++ b/drivers/bios_emulator/x86emu/ops.c
@@ -72,7 +72,6 @@
*
****************************************************************************/
-#include <common.h>
#include <linux/printk.h>
#include "x86emu/x86emui.h"
diff --git a/drivers/bios_emulator/x86emu/ops2.c b/drivers/bios_emulator/x86emu/ops2.c
index 6cd1ac3..32fecb3 100644
--- a/drivers/bios_emulator/x86emu/ops2.c
+++ b/drivers/bios_emulator/x86emu/ops2.c
@@ -41,7 +41,6 @@
*
****************************************************************************/
-#include <common.h>
#include <linux/compiler.h>
#include <linux/printk.h>
#include "x86emu/x86emui.h"
diff --git a/drivers/bios_emulator/x86emu/prim_ops.c b/drivers/bios_emulator/x86emu/prim_ops.c
index 5f6c795..b3cccb1 100644
--- a/drivers/bios_emulator/x86emu/prim_ops.c
+++ b/drivers/bios_emulator/x86emu/prim_ops.c
@@ -97,7 +97,6 @@
*
****************************************************************************/
-#include <common.h>
#define PRIM_OPS_NO_REDEFINE_ASM
#include "x86emu/x86emui.h"
diff --git a/drivers/bios_emulator/x86emu/sys.c b/drivers/bios_emulator/x86emu/sys.c
index f966524..483ecd5 100644
--- a/drivers/bios_emulator/x86emu/sys.c
+++ b/drivers/bios_emulator/x86emu/sys.c
@@ -39,7 +39,6 @@
*
****************************************************************************/
-#include <common.h>
#include <linux/printk.h>
#include "x86emu/x86emui.h"
diff --git a/drivers/block/blk-uclass.c b/drivers/block/blk-uclass.c
index 77066da..512c952 100644
--- a/drivers/block/blk-uclass.c
+++ b/drivers/block/blk-uclass.c
@@ -6,7 +6,6 @@
#define LOG_CATEGORY UCLASS_BLK
-#include <common.h>
#include <blk.h>
#include <dm.h>
#include <log.h>
diff --git a/drivers/block/blk_legacy.c b/drivers/block/blk_legacy.c
index 5bf1d04..f369321 100644
--- a/drivers/block/blk_legacy.c
+++ b/drivers/block/blk_legacy.c
@@ -4,7 +4,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <blk.h>
#include <part.h>
#include <linux/err.h>
diff --git a/drivers/block/blkcache.c b/drivers/block/blkcache.c
index 26bcbea..0e69160 100644
--- a/drivers/block/blkcache.c
+++ b/drivers/block/blkcache.c
@@ -4,7 +4,6 @@
* Author: Eric Nelson<eric@nelint.com>
*
*/
-#include <common.h>
#include <blk.h>
#include <log.h>
#include <malloc.h>
diff --git a/drivers/block/blkmap.c b/drivers/block/blkmap.c
index 2120140..34eed13 100644
--- a/drivers/block/blkmap.c
+++ b/drivers/block/blkmap.c
@@ -4,7 +4,6 @@
* Author: Tobias Waldekranz <tobias@waldekranz.com>
*/
-#include <common.h>
#include <blk.h>
#include <blkmap.h>
#include <dm.h>
diff --git a/drivers/block/efi-media-uclass.c b/drivers/block/efi-media-uclass.c
index e012f6f..dc5e4f5 100644
--- a/drivers/block/efi-media-uclass.c
+++ b/drivers/block/efi-media-uclass.c
@@ -5,7 +5,6 @@
* Copyright 2021 Google LLC
*/
-#include <common.h>
#include <dm.h>
UCLASS_DRIVER(efi_media) = {
diff --git a/drivers/block/efi_blk.c b/drivers/block/efi_blk.c
index 917a19f..9766cd6 100644
--- a/drivers/block/efi_blk.c
+++ b/drivers/block/efi_blk.c
@@ -8,7 +8,6 @@
* Copyright 2021 Google LLC
*/
-#include <common.h>
#include <blk.h>
#include <dm.h>
#include <efi.h>
diff --git a/drivers/block/host-uclass.c b/drivers/block/host-uclass.c
index b3647e3..cf42bd1 100644
--- a/drivers/block/host-uclass.c
+++ b/drivers/block/host-uclass.c
@@ -9,7 +9,6 @@
#define LOG_CATEGORY UCLASS_HOST
-#include <common.h>
#include <blk.h>
#include <dm.h>
#include <malloc.h>
diff --git a/drivers/block/host_dev.c b/drivers/block/host_dev.c
index 5231343..b3ff3cd 100644
--- a/drivers/block/host_dev.c
+++ b/drivers/block/host_dev.c
@@ -9,7 +9,6 @@
#define LOG_CATEGORY UCLASS_HOST
-#include <common.h>
#include <blk.h>
#include <bootdev.h>
#include <dm.h>
diff --git a/drivers/block/ide.c b/drivers/block/ide.c
index c698f9c..b16623d 100644
--- a/drivers/block/ide.c
+++ b/drivers/block/ide.c
@@ -6,7 +6,6 @@
#define LOG_CATEGORY UCLASS_IDE
-#include <common.h>
#include <ata.h>
#include <blk.h>
#include <bootdev.h>
diff --git a/drivers/block/sandbox.c b/drivers/block/sandbox.c
index be4e02c..ec34f1a 100644
--- a/drivers/block/sandbox.c
+++ b/drivers/block/sandbox.c
@@ -3,7 +3,6 @@
* Copyright (C) 2013 Henrik Nordstrom <henrik@henriknordstrom.net>
*/
-#include <common.h>
#include <blk.h>
#include <dm.h>
#include <fdtdec.h>
diff --git a/drivers/block/sb_efi_media.c b/drivers/block/sb_efi_media.c
index 52af155..3255db0 100644
--- a/drivers/block/sb_efi_media.c
+++ b/drivers/block/sb_efi_media.c
@@ -5,7 +5,6 @@
* Copyright 2021 Google LLC
*/
-#include <common.h>
#include <dm.h>
static const struct udevice_id sandbox_efi_media_ids[] = {
diff --git a/drivers/bootcount/bootcount-uclass.c b/drivers/bootcount/bootcount-uclass.c
index 5a369c8..0178c18 100644
--- a/drivers/bootcount/bootcount-uclass.c
+++ b/drivers/bootcount/bootcount-uclass.c
@@ -5,7 +5,6 @@
#define LOG_CATEGORY UCLASS_BOOTCOUNT
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <bootcount.h>
diff --git a/drivers/bootcount/bootcount_at91.c b/drivers/bootcount/bootcount_at91.c
index c4ab5ce..1a06db1 100644
--- a/drivers/bootcount/bootcount_at91.c
+++ b/drivers/bootcount/bootcount_at91.c
@@ -1,6 +1,5 @@
// SPDX-License-Identifier: GPL-2.0+
-#include <common.h>
#include <asm/io.h>
#include <asm/arch/hardware.h>
#include <asm/arch/at91_gpbr.h>
diff --git a/drivers/bootcount/bootcount_env.c b/drivers/bootcount/bootcount_env.c
index b75c900..960cd71 100644
--- a/drivers/bootcount/bootcount_env.c
+++ b/drivers/bootcount/bootcount_env.c
@@ -4,7 +4,6 @@
* Heiko Schocher, DENX Software Engineering, hs@denx.de.
*/
-#include <common.h>
#include <env.h>
void bootcount_store(ulong a)
diff --git a/drivers/bootcount/bootcount_ram.c b/drivers/bootcount/bootcount_ram.c
index 8cc30cf..33e157b 100644
--- a/drivers/bootcount/bootcount_ram.c
+++ b/drivers/bootcount/bootcount_ram.c
@@ -4,7 +4,6 @@
* Heiko Schocher, DENX Software Engineering, hs@denx.de.
*/
-#include <common.h>
#include <cpu_func.h>
#include <asm/cache.h>
#include <asm/global_data.h>
diff --git a/drivers/bootcount/bootcount_syscon.c b/drivers/bootcount/bootcount_syscon.c
index f80d870..5dbc13c 100644
--- a/drivers/bootcount/bootcount_syscon.c
+++ b/drivers/bootcount/bootcount_syscon.c
@@ -3,7 +3,6 @@
* Copyright (c) Vaisala Oyj. All rights reserved.
*/
-#include <common.h>
#include <bootcount.h>
#include <dm.h>
#include <dm/device_compat.h>
diff --git a/drivers/bootcount/i2c-eeprom.c b/drivers/bootcount/i2c-eeprom.c
index 709be09..12c4304 100644
--- a/drivers/bootcount/i2c-eeprom.c
+++ b/drivers/bootcount/i2c-eeprom.c
@@ -4,7 +4,6 @@
* (C) Copyright 2019 GE
*/
-#include <common.h>
#include <bootcount.h>
#include <dm.h>
#include <i2c_eeprom.h>
diff --git a/drivers/bootcount/pmic_pfuze100.c b/drivers/bootcount/pmic_pfuze100.c
index df046f1b..8c529f5 100644
--- a/drivers/bootcount/pmic_pfuze100.c
+++ b/drivers/bootcount/pmic_pfuze100.c
@@ -8,7 +8,6 @@
* This works only, if the PMIC is not connected to a battery.
*/
-#include <common.h>
#include <bootcount.h>
#include <dm.h>
#include <power/pmic.h>
diff --git a/drivers/bootcount/rtc.c b/drivers/bootcount/rtc.c
index 483caaa..b131946 100644
--- a/drivers/bootcount/rtc.c
+++ b/drivers/bootcount/rtc.c
@@ -3,7 +3,6 @@
* (C) Copyright 2018 Theobroma Systems Design und Consulting GmbH
*/
-#include <common.h>
#include <bootcount.h>
#include <dm.h>
#include <log.h>
diff --git a/drivers/bootcount/spi-flash.c b/drivers/bootcount/spi-flash.c
index 03050e6..155d032 100644
--- a/drivers/bootcount/spi-flash.c
+++ b/drivers/bootcount/spi-flash.c
@@ -4,7 +4,6 @@
* (C) Copyright 2019 GE
*/
-#include <common.h>
#include <bootcount.h>
#include <dm.h>
#include <spi_flash.h>
diff --git a/drivers/bus/ti-pwmss.c b/drivers/bus/ti-pwmss.c
index 265b4cf..d1f6f3b 100644
--- a/drivers/bus/ti-pwmss.c
+++ b/drivers/bus/ti-pwmss.c
@@ -5,7 +5,6 @@
* Copyright (C) 2020 Dario Binacchi <dariobin@libero.it>
*/
-#include <common.h>
#include <dm.h>
static const struct udevice_id ti_pwmss_ids[] = {
diff --git a/drivers/bus/ti-sysc.c b/drivers/bus/ti-sysc.c
index 778c065..5f9f0a0 100644
--- a/drivers/bus/ti-sysc.c
+++ b/drivers/bus/ti-sysc.c
@@ -5,7 +5,6 @@
* Copyright (C) 2020 Dario Binacchi <dariobin@libero.it>
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <dm/device_compat.h>
diff --git a/drivers/button/button-adc.c b/drivers/button/button-adc.c
index 9c24c96..da7ddf2 100644
--- a/drivers/button/button-adc.c
+++ b/drivers/button/button-adc.c
@@ -5,7 +5,6 @@
* Author: Marek Szyprowski <m.szyprowski@samsung.com>
*/
-#include <common.h>
#include <adc.h>
#include <button.h>
#include <log.h>
diff --git a/drivers/button/button-gpio.c b/drivers/button/button-gpio.c
index 7b5b3af..43b82d9 100644
--- a/drivers/button/button-gpio.c
+++ b/drivers/button/button-gpio.c
@@ -3,7 +3,6 @@
* Copyright (C) 2020 Philippe Reynes <philippe.reynes@softathome.com>
*/
-#include <common.h>
#include <button.h>
#include <dm.h>
#include <dm/lists.h>
diff --git a/drivers/button/button-qcom-pmic.c b/drivers/button/button-qcom-pmic.c
index bad445e..ad7fed3 100644
--- a/drivers/button/button-qcom-pmic.c
+++ b/drivers/button/button-qcom-pmic.c
@@ -19,6 +19,13 @@
#define REG_TYPE 0x4
#define REG_SUBTYPE 0x5
+struct qcom_pmic_btn_data {
+ char *compatible;
+ unsigned int status_bit;
+ int code;
+ char *label;
+};
+
struct qcom_pmic_btn_priv {
u32 base;
u32 status_bit;
@@ -27,11 +34,10 @@
};
#define PON_INT_RT_STS 0x10
-#define KPDPWR_ON_INT_BIT 0
-#define RESIN_ON_INT_BIT 1
-
-#define NODE_IS_PWRKEY(node) (!strncmp(ofnode_get_name(node), "pwrkey", strlen("pwrkey")))
-#define NODE_IS_RESIN(node) (!strncmp(ofnode_get_name(node), "resin", strlen("resin")))
+#define PON_KPDPWR_N_SET 0
+#define PON_RESIN_N_SET 1
+#define PON_GEN3_RESIN_N_SET 6
+#define PON_GEN3_KPDPWR_N_SET 7
static enum button_state_t qcom_pwrkey_get_state(struct udevice *dev)
{
@@ -52,10 +58,51 @@
return priv->code;
}
+static const struct qcom_pmic_btn_data qcom_pmic_btn_data_table[] = {
+ {
+ .compatible = "qcom,pm8941-pwrkey",
+ .status_bit = PON_KPDPWR_N_SET,
+ .code = KEY_ENTER,
+ .label = "pwrkey",
+ },
+ {
+ .compatible = "qcom,pm8941-resin",
+ .status_bit = PON_RESIN_N_SET,
+ .code = KEY_DOWN,
+ .label = "vol_down",
+ },
+ {
+ .compatible = "qcom,pmk8350-pwrkey",
+ .status_bit = PON_GEN3_KPDPWR_N_SET,
+ .code = KEY_ENTER,
+ .label = "pwrkey",
+ },
+ {
+ .compatible = "qcom,pmk8350-resin",
+ .status_bit = PON_GEN3_RESIN_N_SET,
+ .code = KEY_DOWN,
+ .label = "vol_down",
+ },
+};
+
+static const struct qcom_pmic_btn_data *button_qcom_pmic_match(ofnode node)
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(qcom_pmic_btn_data_table); ++i) {
+ if (ofnode_device_is_compatible(node,
+ qcom_pmic_btn_data_table[i].compatible))
+ return &qcom_pmic_btn_data_table[i];
+ }
+
+ return NULL;
+}
+
static int qcom_pwrkey_probe(struct udevice *dev)
{
struct button_uc_plat *uc_plat = dev_get_uclass_plat(dev);
struct qcom_pmic_btn_priv *priv = dev_get_priv(dev);
+ const struct qcom_pmic_btn_data *btn_data;
ofnode node = dev_ofnode(dev);
int ret;
u64 base;
@@ -64,6 +111,14 @@
if (!uc_plat->label)
return 0;
+ /* Get the data for the node compatible */
+ btn_data = button_qcom_pmic_match(node);
+ if (!btn_data)
+ return -EINVAL;
+
+ priv->status_bit = btn_data->status_bit;
+ priv->code = btn_data->code;
+
/* the pwrkey and resin nodes are children of the "pon" node, get the
* PMIC device to use in pmic_reg_* calls.
*/
@@ -87,23 +142,10 @@
ret = pmic_reg_read(priv->pmic, priv->base + REG_SUBTYPE);
if (ret < 0 || (ret & 0x7) == 0) {
- printf("%s: unexpected PMCI function subtype %d\n", dev->name, ret);
+ printf("%s: unexpected PMIC function subtype %d\n", dev->name, ret);
return -ENXIO;
}
- if (NODE_IS_PWRKEY(node)) {
- priv->status_bit = 0;
- priv->code = KEY_ENTER;
- } else if (NODE_IS_RESIN(node)) {
- priv->status_bit = 1;
- priv->code = KEY_DOWN;
- } else {
- /* Should not get here! */
- printf("Invalid pon node '%s' should be 'pwrkey' or 'resin'\n",
- ofnode_get_name(node));
- return -EINVAL;
- }
-
return 0;
}
@@ -114,12 +156,20 @@
int ret;
dev_for_each_subnode(node, parent) {
+ const struct qcom_pmic_btn_data *btn_data;
struct button_uc_plat *uc_plat;
const char *label;
if (!ofnode_is_enabled(node))
continue;
+ /* Get the data for the node compatible */
+ btn_data = button_qcom_pmic_match(node);
+ if (!btn_data) {
+ debug("Unknown button node '%s'\n", ofnode_get_name(node));
+ continue;
+ }
+
ret = device_bind_driver_to_node(parent, "qcom_pwrkey",
ofnode_get_name(node),
node, &dev);
@@ -128,15 +178,7 @@
return ret;
}
uc_plat = dev_get_uclass_plat(dev);
- if (NODE_IS_PWRKEY(node)) {
- uc_plat->label = "pwrkey";
- } else if (NODE_IS_RESIN(node)) {
- uc_plat->label = "vol_down";
- } else {
- debug("Unknown button node '%s' should be 'pwrkey' or 'resin'\n",
- ofnode_get_name(node));
- device_unbind(dev);
- }
+ uc_plat->label = btn_data->label;
}
return 0;
@@ -151,6 +193,7 @@
{ .compatible = "qcom,pm8916-pon" },
{ .compatible = "qcom,pm8941-pon" },
{ .compatible = "qcom,pm8998-pon" },
+ { .compatible = "qcom,pmk8350-pon" },
{ }
};
diff --git a/drivers/button/button-uclass.c b/drivers/button/button-uclass.c
index 032191d..cda2433 100644
--- a/drivers/button/button-uclass.c
+++ b/drivers/button/button-uclass.c
@@ -7,7 +7,6 @@
#define LOG_CATEGORY UCLASS_BUTTON
-#include <common.h>
#include <button.h>
#include <dm.h>
#include <dm/uclass-internal.h>
diff --git a/drivers/cache/cache-l2x0.c b/drivers/cache/cache-l2x0.c
index 560f4c9..c7bdd9d 100644
--- a/drivers/cache/cache-l2x0.c
+++ b/drivers/cache/cache-l2x0.c
@@ -2,7 +2,6 @@
/*
* Copyright (C) 2019 Intel Corporation <www.intel.com>
*/
-#include <common.h>
#include <command.h>
#include <dm.h>
diff --git a/drivers/cache/cache-sifive-ccache.c b/drivers/cache/cache-sifive-ccache.c
index 521df40..cc00b80 100644
--- a/drivers/cache/cache-sifive-ccache.c
+++ b/drivers/cache/cache-sifive-ccache.c
@@ -3,7 +3,6 @@
* Copyright (C) 2021 SiFive
*/
-#include <common.h>
#include <cache.h>
#include <dm.h>
#include <asm/io.h>
diff --git a/drivers/cache/cache-uclass.c b/drivers/cache/cache-uclass.c
index 0c13dbd..300e7bc 100644
--- a/drivers/cache/cache-uclass.c
+++ b/drivers/cache/cache-uclass.c
@@ -5,7 +5,6 @@
#define LOG_CATEGORY UCLASS_CACHE
-#include <common.h>
#include <cache.h>
#include <dm.h>
diff --git a/drivers/cache/cache-v5l2.c b/drivers/cache/cache-v5l2.c
index fe3f939..f0b8ecc 100644
--- a/drivers/cache/cache-v5l2.c
+++ b/drivers/cache/cache-v5l2.c
@@ -4,7 +4,6 @@
* Rick Chen, Andes Technology Corporation <rick@andestech.com>
*/
-#include <common.h>
#include <command.h>
#include <cache.h>
#include <dm.h>
diff --git a/drivers/cache/sandbox_cache.c b/drivers/cache/sandbox_cache.c
index 955dfc8..2e20b83 100644
--- a/drivers/cache/sandbox_cache.c
+++ b/drivers/cache/sandbox_cache.c
@@ -3,7 +3,6 @@
* Copyright (C) 2019 Intel Corporation <www.intel.com>
*/
-#include <common.h>
#include <cache.h>
#include <dm.h>
#include <errno.h>
diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
index d8c619a..9acbc47 100644
--- a/drivers/clk/Kconfig
+++ b/drivers/clk/Kconfig
@@ -57,27 +57,27 @@
Enable this to support the clocks
config SPL_CLK_CCF
- bool "SPL Common Clock Framework [CCF] support "
+ bool "SPL Common Clock Framework [CCF] support"
depends on SPL
help
Enable this option if you want to (re-)use the Linux kernel's Common
Clock Framework [CCF] code in U-Boot's SPL.
config SPL_CLK_COMPOSITE_CCF
- bool "SPL Common Clock Framework [CCF] composite clk support "
+ bool "SPL Common Clock Framework [CCF] composite clk support"
depends on SPL_CLK_CCF
help
Enable this option if you want to (re-)use the Linux kernel's Common
Clock Framework [CCF] composite code in U-Boot's SPL.
config CLK_CCF
- bool "Common Clock Framework [CCF] support "
+ bool "Common Clock Framework [CCF] support"
help
Enable this option if you want to (re-)use the Linux kernel's Common
Clock Framework [CCF] code in U-Boot's clock driver.
config CLK_COMPOSITE_CCF
- bool "Common Clock Framework [CCF] composite clk support "
+ bool "Common Clock Framework [CCF] composite clk support"
depends on CLK_CCF
help
Enable this option if you want to (re-)use the Linux kernel's Common
@@ -164,7 +164,7 @@
Enable this to support the clocks on Octeon MIPS platforms.
config SANDBOX_CLK_CCF
- bool "Sandbox Common Clock Framework [CCF] support "
+ bool "Sandbox Common Clock Framework [CCF] support"
depends on SANDBOX
select CLK_CCF
help
diff --git a/drivers/clk/altera/clk-agilex.c b/drivers/clk/altera/clk-agilex.c
index cca6d67..bdc7be0 100644
--- a/drivers/clk/altera/clk-agilex.c
+++ b/drivers/clk/altera/clk-agilex.c
@@ -3,7 +3,6 @@
* Copyright (C) 2019 Intel Corporation <www.intel.com>
*/
-#include <common.h>
#include <log.h>
#include <asm/global_data.h>
#include <asm/io.h>
diff --git a/drivers/clk/altera/clk-agilex5.c b/drivers/clk/altera/clk-agilex5.c
index 92f2abd..72b9234 100644
--- a/drivers/clk/altera/clk-agilex5.c
+++ b/drivers/clk/altera/clk-agilex5.c
@@ -15,7 +15,6 @@
#include <asm/global_data.h>
#include <asm/io.h>
#include <asm/system.h>
-#include <asm/u-boot.h>
#include <dm/lists.h>
#include <dm/util.h>
#include <linux/bitops.h>
diff --git a/drivers/clk/altera/clk-arria10.c b/drivers/clk/altera/clk-arria10.c
index 578597a..1840f73 100644
--- a/drivers/clk/altera/clk-arria10.c
+++ b/drivers/clk/altera/clk-arria10.c
@@ -3,7 +3,6 @@
* Copyright (C) 2018 Marek Vasut <marex@denx.de>
*/
-#include <common.h>
#include <malloc.h>
#include <asm/io.h>
#include <clk-uclass.h>
diff --git a/drivers/clk/altera/clk-mem-n5x.c b/drivers/clk/altera/clk-mem-n5x.c
index 9bbe2cd..b75f52d 100644
--- a/drivers/clk/altera/clk-mem-n5x.c
+++ b/drivers/clk/altera/clk-mem-n5x.c
@@ -3,7 +3,6 @@
* Copyright (C) 2020-2022 Intel Corporation <www.intel.com>
*/
-#include <common.h>
#include <asm/arch/clock_manager.h>
#include <asm/global_data.h>
#include <asm/io.h>
diff --git a/drivers/clk/altera/clk-n5x.c b/drivers/clk/altera/clk-n5x.c
index 3fa19e0..3e25610 100644
--- a/drivers/clk/altera/clk-n5x.c
+++ b/drivers/clk/altera/clk-n5x.c
@@ -3,7 +3,6 @@
* Copyright (C) 2020-2022 Intel Corporation <www.intel.com>
*/
-#include <common.h>
#include <asm/arch/clock_manager.h>
#include <asm/global_data.h>
#include <asm/io.h>
diff --git a/drivers/clk/aspeed/clk_ast2500.c b/drivers/clk/aspeed/clk_ast2500.c
index dc446ce..a330dcd 100644
--- a/drivers/clk/aspeed/clk_ast2500.c
+++ b/drivers/clk/aspeed/clk_ast2500.c
@@ -3,7 +3,6 @@
* (C) Copyright 2016 Google, Inc
*/
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <log.h>
diff --git a/drivers/clk/aspeed/clk_ast2600.c b/drivers/clk/aspeed/clk_ast2600.c
index a159093..535010b 100644
--- a/drivers/clk/aspeed/clk_ast2600.c
+++ b/drivers/clk/aspeed/clk_ast2600.c
@@ -3,7 +3,6 @@
* Copyright (C) ASPEED Technology Inc.
*/
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <asm/io.h>
diff --git a/drivers/clk/at91/clk-generic.c b/drivers/clk/at91/clk-generic.c
index 87738b7..c410cd2 100644
--- a/drivers/clk/at91/clk-generic.c
+++ b/drivers/clk/at91/clk-generic.c
@@ -8,7 +8,6 @@
*
* Based on drivers/clk/at91/clk-generated.c from Linux.
*/
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <linux/io.h>
diff --git a/drivers/clk/at91/clk-main.c b/drivers/clk/at91/clk-main.c
index 025c7a7..09daae9 100644
--- a/drivers/clk/at91/clk-main.c
+++ b/drivers/clk/at91/clk-main.c
@@ -10,7 +10,6 @@
*/
#include <asm/processor.h>
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <linux/clk-provider.h>
diff --git a/drivers/clk/at91/clk-master.c b/drivers/clk/at91/clk-master.c
index aec0bca..d28775d 100644
--- a/drivers/clk/at91/clk-master.c
+++ b/drivers/clk/at91/clk-master.c
@@ -11,7 +11,6 @@
#include <asm/processor.h>
#include <clk-uclass.h>
-#include <common.h>
#include <div64.h>
#include <dm.h>
#include <linux/clk-provider.h>
diff --git a/drivers/clk/at91/clk-peripheral.c b/drivers/clk/at91/clk-peripheral.c
index 52cbc52..08d7e7d 100644
--- a/drivers/clk/at91/clk-peripheral.c
+++ b/drivers/clk/at91/clk-peripheral.c
@@ -8,7 +8,6 @@
*
* Based on drivers/clk/at91/clk-peripheral.c from Linux.
*/
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <linux/io.h>
diff --git a/drivers/clk/at91/clk-programmable.c b/drivers/clk/at91/clk-programmable.c
index 868de4b..d0b1465 100644
--- a/drivers/clk/at91/clk-programmable.c
+++ b/drivers/clk/at91/clk-programmable.c
@@ -8,7 +8,6 @@
*
* Based on drivers/clk/at91/clk-programmable.c from Linux.
*/
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <linux/clk-provider.h>
diff --git a/drivers/clk/at91/clk-sam9x60-pll.c b/drivers/clk/at91/clk-sam9x60-pll.c
index 383f79c..a30035e 100644
--- a/drivers/clk/at91/clk-sam9x60-pll.c
+++ b/drivers/clk/at91/clk-sam9x60-pll.c
@@ -11,7 +11,6 @@
*/
#include <asm/processor.h>
-#include <common.h>
#include <clk-uclass.h>
#include <div64.h>
#include <dm.h>
diff --git a/drivers/clk/at91/clk-system.c b/drivers/clk/at91/clk-system.c
index 82f79e7..3545b0b 100644
--- a/drivers/clk/at91/clk-system.c
+++ b/drivers/clk/at91/clk-system.c
@@ -9,7 +9,6 @@
* Based on drivers/clk/at91/clk-system.c from Linux.
*/
#include <asm/processor.h>
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <linux/io.h>
diff --git a/drivers/clk/at91/clk-utmi.c b/drivers/clk/at91/clk-utmi.c
index 7c8bcfb..84784ae 100644
--- a/drivers/clk/at91/clk-utmi.c
+++ b/drivers/clk/at91/clk-utmi.c
@@ -9,7 +9,6 @@
* Based on drivers/clk/at91/clk-utmi.c from Linux.
*/
#include <asm/processor.h>
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <linux/clk-provider.h>
diff --git a/drivers/clk/at91/compat.c b/drivers/clk/at91/compat.c
index ee67093..1d738f1 100644
--- a/drivers/clk/at91/compat.c
+++ b/drivers/clk/at91/compat.c
@@ -6,7 +6,7 @@
*
* Author: Claudiu Beznea <claudiu.beznea@microchip.com>
*/
-#include <common.h>
+#include <config.h>
#include <clk-uclass.h>
#include <dm.h>
#include <asm/global_data.h>
diff --git a/drivers/clk/at91/pmc.c b/drivers/clk/at91/pmc.c
index 87d2069..aa4bc8f 100644
--- a/drivers/clk/at91/pmc.c
+++ b/drivers/clk/at91/pmc.c
@@ -4,7 +4,6 @@
* Wenyou.Yang <wenyou.yang@atmel.com>
*/
-#include <common.h>
#include <asm/io.h>
#include <clk-uclass.h>
#include <linux/clk-provider.h>
diff --git a/drivers/clk/at91/sam9x60.c b/drivers/clk/at91/sam9x60.c
index d858c86..b7d64bd 100644
--- a/drivers/clk/at91/sam9x60.c
+++ b/drivers/clk/at91/sam9x60.c
@@ -7,7 +7,6 @@
* Based on sam9x60.c on Linux.
*/
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <dt-bindings/clk/at91.h>
diff --git a/drivers/clk/at91/sama7g5.c b/drivers/clk/at91/sama7g5.c
index 3e62fb1..63b2c64 100644
--- a/drivers/clk/at91/sama7g5.c
+++ b/drivers/clk/at91/sama7g5.c
@@ -9,7 +9,6 @@
* Based on drivers/clk/at91/sama7g5.c from Linux.
*/
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <dt-bindings/clk/at91.h>
diff --git a/drivers/clk/at91/sckc.c b/drivers/clk/at91/sckc.c
index 43136ab..6d6f125 100644
--- a/drivers/clk/at91/sckc.c
+++ b/drivers/clk/at91/sckc.c
@@ -7,7 +7,6 @@
* Author: Claudiu Beznea <claudiu.beznea@microchip.com>
*/
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <dt-bindings/clk/at91.h>
diff --git a/drivers/clk/clk-cdce9xx.c b/drivers/clk/clk-cdce9xx.c
index b8700f5..e5f74e7 100644
--- a/drivers/clk/clk-cdce9xx.c
+++ b/drivers/clk/clk-cdce9xx.c
@@ -8,7 +8,6 @@
* Based on Linux kernel clk-cdce925.c.
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <clk-uclass.h>
diff --git a/drivers/clk/clk-composite.c b/drivers/clk/clk-composite.c
index d2e5a1a..199ca6e 100644
--- a/drivers/clk/clk-composite.c
+++ b/drivers/clk/clk-composite.c
@@ -6,7 +6,6 @@
#define LOG_CATEGORY UCLASS_CLK
-#include <common.h>
#include <clk.h>
#include <clk-uclass.h>
#include <log.h>
diff --git a/drivers/clk/clk-divider.c b/drivers/clk/clk-divider.c
index 2ad682b..aa210e3 100644
--- a/drivers/clk/clk-divider.c
+++ b/drivers/clk/clk-divider.c
@@ -11,7 +11,6 @@
#define LOG_CATEGORY UCLASS_CLK
-#include <common.h>
#include <asm/io.h>
#include <malloc.h>
#include <clk-uclass.h>
diff --git a/drivers/clk/clk-fixed-factor.c b/drivers/clk/clk-fixed-factor.c
index 2a44678..068798c 100644
--- a/drivers/clk/clk-fixed-factor.c
+++ b/drivers/clk/clk-fixed-factor.c
@@ -8,7 +8,6 @@
#define LOG_CATEGORY UCLASS_CLK
-#include <common.h>
#include <clk.h>
#include <clk-uclass.h>
#include <div64.h>
diff --git a/drivers/clk/clk-gate.c b/drivers/clk/clk-gate.c
index cfd90b7..bf1c6a9 100644
--- a/drivers/clk/clk-gate.c
+++ b/drivers/clk/clk-gate.c
@@ -9,7 +9,6 @@
#define LOG_CATEGORY UCLASS_CLK
-#include <common.h>
#include <clk.h>
#include <log.h>
#include <clk-uclass.h>
diff --git a/drivers/clk/clk-hsdk-cgu.c b/drivers/clk/clk-hsdk-cgu.c
index 85074f1..5365505 100644
--- a/drivers/clk/clk-hsdk-cgu.c
+++ b/drivers/clk/clk-hsdk-cgu.c
@@ -9,7 +9,6 @@
* warranty of any kind, whether express or implied.
*/
-#include <common.h>
#include <clk-uclass.h>
#include <div64.h>
#include <dm.h>
diff --git a/drivers/clk/clk-mux.c b/drivers/clk/clk-mux.c
index f410518..39e01c3 100644
--- a/drivers/clk/clk-mux.c
+++ b/drivers/clk/clk-mux.c
@@ -23,7 +23,6 @@
#define LOG_CATEGORY UCLASS_CLK
-#include <common.h>
#include <clk.h>
#include <clk-uclass.h>
#include <log.h>
diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c
index ed6e60b..4c832f1 100644
--- a/drivers/clk/clk-uclass.c
+++ b/drivers/clk/clk-uclass.c
@@ -8,7 +8,6 @@
#define LOG_CATEGORY UCLASS_CLK
-#include <common.h>
#include <clk.h>
#include <clk-uclass.h>
#include <dm.h>
diff --git a/drivers/clk/clk-xlnx-clock-wizard.c b/drivers/clk/clk-xlnx-clock-wizard.c
index a10a843..4a3f50c 100644
--- a/drivers/clk/clk-xlnx-clock-wizard.c
+++ b/drivers/clk/clk-xlnx-clock-wizard.c
@@ -7,7 +7,6 @@
* Author: Zhengxun Li <zhengxunli@mxic.com.tw>
*/
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <div64.h>
diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
index 6ede1b4..b8c2e8d 100644
--- a/drivers/clk/clk.c
+++ b/drivers/clk/clk.c
@@ -6,7 +6,6 @@
#define LOG_CATEGORY UCLASS_CLK
-#include <common.h>
#include <clk.h>
#include <clk-uclass.h>
#include <log.h>
diff --git a/drivers/clk/clk_bcm6345.c b/drivers/clk/clk_bcm6345.c
index 8c22ed2..0b41872 100644
--- a/drivers/clk/clk_bcm6345.c
+++ b/drivers/clk/clk_bcm6345.c
@@ -6,7 +6,6 @@
* Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
*/
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <errno.h>
diff --git a/drivers/clk/clk_boston.c b/drivers/clk/clk_boston.c
index 4bcf911..030ff7c 100644
--- a/drivers/clk/clk_boston.c
+++ b/drivers/clk/clk_boston.c
@@ -3,7 +3,6 @@
* Copyright (C) 2016 Imagination Technologies
*/
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <dt-bindings/clock/boston-clock.h>
diff --git a/drivers/clk/clk_fixed_factor.c b/drivers/clk/clk_fixed_factor.c
index 6c1139e..1d740cf 100644
--- a/drivers/clk/clk_fixed_factor.c
+++ b/drivers/clk/clk_fixed_factor.c
@@ -7,7 +7,6 @@
#define LOG_CATEGORY UCLASS_CLK
-#include <common.h>
#include <clk-uclass.h>
#include <div64.h>
#include <dm.h>
diff --git a/drivers/clk/clk_fixed_rate.c b/drivers/clk/clk_fixed_rate.c
index b5e78c7..d1da05c 100644
--- a/drivers/clk/clk_fixed_rate.c
+++ b/drivers/clk/clk_fixed_rate.c
@@ -5,7 +5,6 @@
#define LOG_CATEGORY UCLASS_CLK
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <log.h>
diff --git a/drivers/clk/clk_k210.c b/drivers/clk/clk_k210.c
index 7432ae8..d1a6cde 100644
--- a/drivers/clk/clk_k210.c
+++ b/drivers/clk/clk_k210.c
@@ -4,7 +4,6 @@
*/
#define LOG_CATEGORY UCLASS_CLK
-#include <common.h>
#include <clk.h>
#include <clk-uclass.h>
#include <div64.h>
diff --git a/drivers/clk/clk_pic32.c b/drivers/clk/clk_pic32.c
index a77d0e7..885aa83 100644
--- a/drivers/clk/clk_pic32.c
+++ b/drivers/clk/clk_pic32.c
@@ -4,7 +4,6 @@
*
*/
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <div64.h>
diff --git a/drivers/clk/clk_sandbox.c b/drivers/clk/clk_sandbox.c
index 73d943f..8dd77f1 100644
--- a/drivers/clk/clk_sandbox.c
+++ b/drivers/clk/clk_sandbox.c
@@ -3,7 +3,6 @@
* (C) Copyright 2015 Google, Inc
*/
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <errno.h>
diff --git a/drivers/clk/clk_sandbox_ccf.c b/drivers/clk/clk_sandbox_ccf.c
index 38184e2..f96a15c 100644
--- a/drivers/clk/clk_sandbox_ccf.c
+++ b/drivers/clk/clk_sandbox_ccf.c
@@ -6,7 +6,6 @@
* Common Clock Framework [CCF] driver for Sandbox
*/
-#include <common.h>
#include <dm.h>
#include <clk.h>
#include <malloc.h>
diff --git a/drivers/clk/clk_sandbox_test.c b/drivers/clk/clk_sandbox_test.c
index c224dc1..8735021 100644
--- a/drivers/clk/clk_sandbox_test.c
+++ b/drivers/clk/clk_sandbox_test.c
@@ -3,7 +3,6 @@
* Copyright (c) 2016, NVIDIA CORPORATION.
*/
-#include <common.h>
#include <dm.h>
#include <clk.h>
#include <malloc.h>
diff --git a/drivers/clk/clk_scmi.c b/drivers/clk/clk_scmi.c
index 34a4936..e42d203 100644
--- a/drivers/clk/clk_scmi.c
+++ b/drivers/clk/clk_scmi.c
@@ -5,7 +5,6 @@
#define LOG_CATEGORY UCLASS_CLK
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <scmi_agent.h>
diff --git a/drivers/clk/clk_versaclock.c b/drivers/clk/clk_versaclock.c
index bbe7225..9ccaf13 100644
--- a/drivers/clk/clk_versaclock.c
+++ b/drivers/clk/clk_versaclock.c
@@ -5,7 +5,6 @@
* Derived from code Copyright (C) 2017 Marek Vasut <marek.vasut@gmail.com>
*/
-#include <common.h>
#include <clk.h>
#include <clk-uclass.h>
#include <dm.h>
diff --git a/drivers/clk/clk_versal.c b/drivers/clk/clk_versal.c
index 42ab032..35ee56d 100644
--- a/drivers/clk/clk_versal.c
+++ b/drivers/clk/clk_versal.c
@@ -4,7 +4,6 @@
* Siva Durga Prasad Paladugu <siva.durga.prasad.paladugu@amd.com>>
*/
-#include <common.h>
#include <log.h>
#include <asm/cache.h>
#include <asm/ptrace.h>
diff --git a/drivers/clk/clk_vexpress_osc.c b/drivers/clk/clk_vexpress_osc.c
index 3b1e020..2e0e7bb 100644
--- a/drivers/clk/clk_vexpress_osc.c
+++ b/drivers/clk/clk_vexpress_osc.c
@@ -5,7 +5,6 @@
*
*/
#define DEBUG
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <log.h>
diff --git a/drivers/clk/clk_zynq.c b/drivers/clk/clk_zynq.c
index e3cefe2..b62b464 100644
--- a/drivers/clk/clk_zynq.c
+++ b/drivers/clk/clk_zynq.c
@@ -7,7 +7,6 @@
* Copyright (C) 2013 Xilinx, Inc. All rights reserved.
*/
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <log.h>
diff --git a/drivers/clk/clk_zynqmp.c b/drivers/clk/clk_zynqmp.c
index e23f7da..5999926 100644
--- a/drivers/clk/clk_zynqmp.c
+++ b/drivers/clk/clk_zynqmp.c
@@ -5,7 +5,6 @@
* Copyright (C) 2016 Xilinx, Inc.
*/
-#include <common.h>
#include <log.h>
#include <malloc.h>
#include <dm/device_compat.h>
diff --git a/drivers/clk/exynos/clk-exynos7420.c b/drivers/clk/exynos/clk-exynos7420.c
index 9caa932..3aa751b 100644
--- a/drivers/clk/exynos/clk-exynos7420.c
+++ b/drivers/clk/exynos/clk-exynos7420.c
@@ -5,7 +5,6 @@
* Thomas Abraham <thomas.ab@samsung.com>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <clk-uclass.h>
diff --git a/drivers/clk/exynos/clk-exynos850.c b/drivers/clk/exynos/clk-exynos850.c
index cf94a3e..0c09ba0 100644
--- a/drivers/clk/exynos/clk-exynos850.c
+++ b/drivers/clk/exynos/clk-exynos850.c
@@ -10,6 +10,13 @@
#include <dt-bindings/clock/exynos850.h>
#include "clk.h"
+enum exynos850_cmu_id {
+ CMU_TOP,
+ CMU_PERI,
+ CMU_CORE,
+ CMU_HSI,
+};
+
/* ---- CMU_TOP ------------------------------------------------------------- */
/* Register Offset definitions for CMU_TOP (0x120e0000) */
@@ -19,9 +26,23 @@
#define PLL_CON3_PLL_SHARED0 0x014c
#define PLL_CON0_PLL_SHARED1 0x0180
#define PLL_CON3_PLL_SHARED1 0x018c
+#define CLK_CON_MUX_MUX_CLKCMU_CORE_BUS 0x1014
+#define CLK_CON_MUX_MUX_CLKCMU_CORE_CCI 0x1018
+#define CLK_CON_MUX_MUX_CLKCMU_CORE_MMC_EMBD 0x101c
+#define CLK_CON_MUX_MUX_CLKCMU_CORE_SSS 0x1020
+#define CLK_CON_MUX_MUX_CLKCMU_HSI_BUS 0x103c
+#define CLK_CON_MUX_MUX_CLKCMU_HSI_MMC_CARD 0x1040
+#define CLK_CON_MUX_MUX_CLKCMU_HSI_USB20DRD 0x1044
#define CLK_CON_MUX_MUX_CLKCMU_PERI_BUS 0x1070
#define CLK_CON_MUX_MUX_CLKCMU_PERI_IP 0x1074
#define CLK_CON_MUX_MUX_CLKCMU_PERI_UART 0x1078
+#define CLK_CON_DIV_CLKCMU_CORE_BUS 0x1820
+#define CLK_CON_DIV_CLKCMU_CORE_CCI 0x1824
+#define CLK_CON_DIV_CLKCMU_CORE_MMC_EMBD 0x1828
+#define CLK_CON_DIV_CLKCMU_CORE_SSS 0x182c
+#define CLK_CON_DIV_CLKCMU_HSI_BUS 0x1848
+#define CLK_CON_DIV_CLKCMU_HSI_MMC_CARD 0x184c
+#define CLK_CON_DIV_CLKCMU_HSI_USB20DRD 0x1850
#define CLK_CON_DIV_CLKCMU_PERI_BUS 0x187c
#define CLK_CON_DIV_CLKCMU_PERI_IP 0x1880
#define CLK_CON_DIV_CLKCMU_PERI_UART 0x1884
@@ -31,10 +52,49 @@
#define CLK_CON_DIV_PLL_SHARED1_DIV2 0x1898
#define CLK_CON_DIV_PLL_SHARED1_DIV3 0x189c
#define CLK_CON_DIV_PLL_SHARED1_DIV4 0x18a0
+#define CLK_CON_GAT_GATE_CLKCMU_CORE_BUS 0x201c
+#define CLK_CON_GAT_GATE_CLKCMU_CORE_CCI 0x2020
+#define CLK_CON_GAT_GATE_CLKCMU_CORE_MMC_EMBD 0x2024
+#define CLK_CON_GAT_GATE_CLKCMU_CORE_SSS 0x2028
+#define CLK_CON_GAT_GATE_CLKCMU_HSI_BUS 0x2044
+#define CLK_CON_GAT_GATE_CLKCMU_HSI_MMC_CARD 0x2048
+#define CLK_CON_GAT_GATE_CLKCMU_HSI_USB20DRD 0x204c
#define CLK_CON_GAT_GATE_CLKCMU_PERI_BUS 0x2080
#define CLK_CON_GAT_GATE_CLKCMU_PERI_IP 0x2084
#define CLK_CON_GAT_GATE_CLKCMU_PERI_UART 0x2088
+/* List of parent clocks for Muxes in CMU_TOP: for PURECLKCOMP */
+PNAME(mout_shared0_pll_p) = { "clock-oscclk", "fout_shared0_pll" };
+PNAME(mout_shared1_pll_p) = { "clock-oscclk", "fout_shared1_pll" };
+PNAME(mout_mmc_pll_p) = { "clock-oscclk", "fout_mmc_pll" };
+/* List of parent clocks for Muxes in CMU_TOP: for CMU_CORE */
+PNAME(mout_core_bus_p) = { "dout_shared1_div2", "dout_shared0_div3",
+ "dout_shared1_div3", "dout_shared0_div4" };
+PNAME(mout_core_cci_p) = { "dout_shared0_div2", "dout_shared1_div2",
+ "dout_shared0_div3", "dout_shared1_div3" };
+PNAME(mout_core_mmc_embd_p) = { "clock-oscclk", "dout_shared0_div2",
+ "dout_shared1_div2", "dout_shared0_div3",
+ "dout_shared1_div3", "mout_mmc_pll",
+ "clock-oscclk", "clock-oscclk" };
+PNAME(mout_core_sss_p) = { "dout_shared0_div3", "dout_shared1_div3",
+ "dout_shared0_div4", "dout_shared1_div4" };
+/* List of parent clocks for Muxes in CMU_TOP: for CMU_HSI */
+PNAME(mout_hsi_bus_p) = { "dout_shared0_div2", "dout_shared1_div2" };
+PNAME(mout_hsi_mmc_card_p) = { "clock-oscclk", "dout_shared0_div2",
+ "dout_shared1_div2", "dout_shared0_div3",
+ "dout_shared1_div3", "mout_mmc_pll",
+ "clock-oscclk", "clock-oscclk" };
+PNAME(mout_hsi_usb20drd_p) = { "clock-oscclk", "dout_shared0_div4",
+ "dout_shared1_div4", "clock-oscclk" };
+/* List of parent clocks for Muxes in CMU_TOP: for CMU_PERI */
+PNAME(mout_peri_bus_p) = { "dout_shared0_div4", "dout_shared1_div4" };
+PNAME(mout_peri_uart_p) = { "clock-oscclk", "dout_shared0_div4",
+ "dout_shared1_div4", "clock-oscclk" };
+PNAME(mout_peri_ip_p) = { "clock-oscclk", "dout_shared0_div4",
+ "dout_shared1_div4", "clock-oscclk" };
+
+/* PURECLKCOMP */
+
static const struct samsung_pll_clock top_pure_pll_clks[] = {
PLL(pll_0822x, CLK_FOUT_SHARED0_PLL, "fout_shared0_pll", "clock-oscclk",
PLL_CON3_PLL_SHARED0),
@@ -44,17 +104,6 @@
PLL_CON3_PLL_MMC),
};
-/* List of parent clocks for Muxes in CMU_TOP */
-PNAME(mout_shared0_pll_p) = { "clock-oscclk", "fout_shared0_pll" };
-PNAME(mout_shared1_pll_p) = { "clock-oscclk", "fout_shared1_pll" };
-PNAME(mout_mmc_pll_p) = { "clock-oscclk", "fout_mmc_pll" };
-/* List of parent clocks for Muxes in CMU_TOP: for CMU_PERI */
-PNAME(mout_peri_bus_p) = { "dout_shared0_div4", "dout_shared1_div4" };
-PNAME(mout_peri_uart_p) = { "clock-oscclk", "dout_shared0_div4",
- "dout_shared1_div4", "clock-oscclk" };
-PNAME(mout_peri_ip_p) = { "clock-oscclk", "dout_shared0_div4",
- "dout_shared1_div4", "clock-oscclk" };
-
static const struct samsung_mux_clock top_pure_mux_clks[] = {
MUX(CLK_MOUT_SHARED0_PLL, "mout_shared0_pll", mout_shared0_pll_p,
PLL_CON0_PLL_SHARED0, 4, 1),
@@ -64,15 +113,6 @@
PLL_CON0_PLL_MMC, 4, 1),
};
-static const struct samsung_mux_clock top_peri_mux_clks[] = {
- MUX(CLK_MOUT_PERI_BUS, "mout_peri_bus", mout_peri_bus_p,
- CLK_CON_MUX_MUX_CLKCMU_PERI_BUS, 0, 1),
- MUX(CLK_MOUT_PERI_UART, "mout_peri_uart", mout_peri_uart_p,
- CLK_CON_MUX_MUX_CLKCMU_PERI_UART, 0, 2),
- MUX(CLK_MOUT_PERI_IP, "mout_peri_ip", mout_peri_ip_p,
- CLK_CON_MUX_MUX_CLKCMU_PERI_IP, 0, 2),
-};
-
static const struct samsung_div_clock top_pure_div_clks[] = {
DIV(CLK_DOUT_SHARED0_DIV3, "dout_shared0_div3", "mout_shared0_pll",
CLK_CON_DIV_PLL_SHARED0_DIV3, 0, 2),
@@ -88,13 +128,79 @@
CLK_CON_DIV_PLL_SHARED1_DIV4, 0, 1),
};
-static const struct samsung_div_clock top_peri_div_clks[] = {
- DIV(CLK_DOUT_PERI_BUS, "dout_peri_bus", "gout_peri_bus",
- CLK_CON_DIV_CLKCMU_PERI_BUS, 0, 4),
- DIV(CLK_DOUT_PERI_UART, "dout_peri_uart", "gout_peri_uart",
- CLK_CON_DIV_CLKCMU_PERI_UART, 0, 4),
- DIV(CLK_DOUT_PERI_IP, "dout_peri_ip", "gout_peri_ip",
- CLK_CON_DIV_CLKCMU_PERI_IP, 0, 4),
+/* CORE */
+
+static const struct samsung_mux_clock top_core_mux_clks[] = {
+ MUX(CLK_MOUT_CORE_BUS, "mout_core_bus", mout_core_bus_p,
+ CLK_CON_MUX_MUX_CLKCMU_CORE_BUS, 0, 2),
+ MUX(CLK_MOUT_CORE_CCI, "mout_core_cci", mout_core_cci_p,
+ CLK_CON_MUX_MUX_CLKCMU_CORE_CCI, 0, 2),
+ MUX(CLK_MOUT_CORE_MMC_EMBD, "mout_core_mmc_embd", mout_core_mmc_embd_p,
+ CLK_CON_MUX_MUX_CLKCMU_CORE_MMC_EMBD, 0, 3),
+ MUX(CLK_MOUT_CORE_SSS, "mout_core_sss", mout_core_sss_p,
+ CLK_CON_MUX_MUX_CLKCMU_CORE_SSS, 0, 2),
+};
+
+static const struct samsung_gate_clock top_core_gate_clks[] = {
+ GATE(CLK_GOUT_CORE_BUS, "gout_core_bus", "mout_core_bus",
+ CLK_CON_GAT_GATE_CLKCMU_CORE_BUS, 21, 0, 0),
+ GATE(CLK_GOUT_CORE_CCI, "gout_core_cci", "mout_core_cci",
+ CLK_CON_GAT_GATE_CLKCMU_CORE_CCI, 21, 0, 0),
+ GATE(CLK_GOUT_CORE_MMC_EMBD, "gout_core_mmc_embd", "mout_core_mmc_embd",
+ CLK_CON_GAT_GATE_CLKCMU_CORE_MMC_EMBD, 21, 0, 0),
+ GATE(CLK_GOUT_CORE_SSS, "gout_core_sss", "mout_core_sss",
+ CLK_CON_GAT_GATE_CLKCMU_CORE_SSS, 21, 0, 0),
+};
+
+static const struct samsung_div_clock top_core_div_clks[] = {
+ DIV(CLK_DOUT_CORE_BUS, "dout_core_bus", "gout_core_bus",
+ CLK_CON_DIV_CLKCMU_CORE_BUS, 0, 4),
+ DIV(CLK_DOUT_CORE_CCI, "dout_core_cci", "gout_core_cci",
+ CLK_CON_DIV_CLKCMU_CORE_CCI, 0, 4),
+ DIV(CLK_DOUT_CORE_MMC_EMBD, "dout_core_mmc_embd", "gout_core_mmc_embd",
+ CLK_CON_DIV_CLKCMU_CORE_MMC_EMBD, 0, 9),
+ DIV(CLK_DOUT_CORE_SSS, "dout_core_sss", "gout_core_sss",
+ CLK_CON_DIV_CLKCMU_CORE_SSS, 0, 4),
+};
+
+/* HSI */
+
+static const struct samsung_mux_clock top_hsi_mux_clks[] = {
+ MUX(CLK_MOUT_HSI_BUS, "mout_hsi_bus", mout_hsi_bus_p,
+ CLK_CON_MUX_MUX_CLKCMU_HSI_BUS, 0, 1),
+ MUX(CLK_MOUT_HSI_MMC_CARD, "mout_hsi_mmc_card", mout_hsi_mmc_card_p,
+ CLK_CON_MUX_MUX_CLKCMU_HSI_MMC_CARD, 0, 3),
+ MUX(CLK_MOUT_HSI_USB20DRD, "mout_hsi_usb20drd", mout_hsi_usb20drd_p,
+ CLK_CON_MUX_MUX_CLKCMU_HSI_USB20DRD, 0, 2),
+};
+
+static const struct samsung_gate_clock top_hsi_gate_clks[] = {
+ GATE(CLK_GOUT_HSI_BUS, "gout_hsi_bus", "mout_hsi_bus",
+ CLK_CON_GAT_GATE_CLKCMU_HSI_BUS, 21, 0, 0),
+ GATE(CLK_GOUT_HSI_MMC_CARD, "gout_hsi_mmc_card", "mout_hsi_mmc_card",
+ CLK_CON_GAT_GATE_CLKCMU_HSI_MMC_CARD, 21, 0, 0),
+ GATE(CLK_GOUT_HSI_USB20DRD, "gout_hsi_usb20drd", "mout_hsi_usb20drd",
+ CLK_CON_GAT_GATE_CLKCMU_HSI_USB20DRD, 21, 0, 0),
+};
+
+static const struct samsung_div_clock top_hsi_div_clks[] = {
+ DIV(CLK_DOUT_HSI_BUS, "dout_hsi_bus", "gout_hsi_bus",
+ CLK_CON_DIV_CLKCMU_HSI_BUS, 0, 4),
+ DIV(CLK_DOUT_HSI_MMC_CARD, "dout_hsi_mmc_card", "gout_hsi_mmc_card",
+ CLK_CON_DIV_CLKCMU_HSI_MMC_CARD, 0, 9),
+ DIV(CLK_DOUT_HSI_USB20DRD, "dout_hsi_usb20drd", "gout_hsi_usb20drd",
+ CLK_CON_DIV_CLKCMU_HSI_USB20DRD, 0, 4),
+};
+
+/* PERI */
+
+static const struct samsung_mux_clock top_peri_mux_clks[] = {
+ MUX(CLK_MOUT_PERI_BUS, "mout_peri_bus", mout_peri_bus_p,
+ CLK_CON_MUX_MUX_CLKCMU_PERI_BUS, 0, 1),
+ MUX(CLK_MOUT_PERI_UART, "mout_peri_uart", mout_peri_uart_p,
+ CLK_CON_MUX_MUX_CLKCMU_PERI_UART, 0, 2),
+ MUX(CLK_MOUT_PERI_IP, "mout_peri_ip", mout_peri_ip_p,
+ CLK_CON_MUX_MUX_CLKCMU_PERI_IP, 0, 2),
};
static const struct samsung_gate_clock top_peri_gate_clks[] = {
@@ -106,12 +212,31 @@
CLK_CON_GAT_GATE_CLKCMU_PERI_IP, 21, 0, 0),
};
+static const struct samsung_div_clock top_peri_div_clks[] = {
+ DIV(CLK_DOUT_PERI_BUS, "dout_peri_bus", "gout_peri_bus",
+ CLK_CON_DIV_CLKCMU_PERI_BUS, 0, 4),
+ DIV(CLK_DOUT_PERI_UART, "dout_peri_uart", "gout_peri_uart",
+ CLK_CON_DIV_CLKCMU_PERI_UART, 0, 4),
+ DIV(CLK_DOUT_PERI_IP, "dout_peri_ip", "gout_peri_ip",
+ CLK_CON_DIV_CLKCMU_PERI_IP, 0, 4),
+};
+
static const struct samsung_clk_group top_cmu_clks[] = {
/* CMU_TOP_PURECLKCOMP */
{ S_CLK_PLL, top_pure_pll_clks, ARRAY_SIZE(top_pure_pll_clks) },
{ S_CLK_MUX, top_pure_mux_clks, ARRAY_SIZE(top_pure_mux_clks) },
{ S_CLK_DIV, top_pure_div_clks, ARRAY_SIZE(top_pure_div_clks) },
+ /* CMU_TOP clocks for CMU_CORE */
+ { S_CLK_MUX, top_core_mux_clks, ARRAY_SIZE(top_core_mux_clks) },
+ { S_CLK_GATE, top_core_gate_clks, ARRAY_SIZE(top_core_gate_clks) },
+ { S_CLK_DIV, top_core_div_clks, ARRAY_SIZE(top_core_div_clks) },
+
+ /* CMU_TOP clocks for CMU_HSI */
+ { S_CLK_MUX, top_hsi_mux_clks, ARRAY_SIZE(top_hsi_mux_clks) },
+ { S_CLK_GATE, top_hsi_gate_clks, ARRAY_SIZE(top_hsi_gate_clks) },
+ { S_CLK_DIV, top_hsi_div_clks, ARRAY_SIZE(top_hsi_div_clks) },
+
/* CMU_TOP clocks for CMU_PERI */
{ S_CLK_MUX, top_peri_mux_clks, ARRAY_SIZE(top_peri_mux_clks) },
{ S_CLK_GATE, top_peri_gate_clks, ARRAY_SIZE(top_peri_gate_clks) },
@@ -120,7 +245,7 @@
static int exynos850_cmu_top_probe(struct udevice *dev)
{
- return samsung_cmu_register_one(dev, top_cmu_clks,
+ return samsung_cmu_register_one(dev, CMU_TOP, top_cmu_clks,
ARRAY_SIZE(top_cmu_clks));
}
@@ -129,11 +254,13 @@
{ }
};
+SAMSUNG_CLK_OPS(exynos850_cmu_top, CMU_TOP);
+
U_BOOT_DRIVER(exynos850_cmu_top) = {
.name = "exynos850-cmu-top",
.id = UCLASS_CLK,
.of_match = exynos850_cmu_top_ids,
- .ops = &ccf_clk_ops,
+ .ops = &exynos850_cmu_top_clk_ops,
.probe = exynos850_cmu_top_probe,
.flags = DM_FLAG_PRE_RELOC,
};
@@ -171,7 +298,8 @@
static int exynos850_cmu_peri_probe(struct udevice *dev)
{
- return samsung_register_cmu(dev, peri_cmu_clks, exynos850_cmu_top);
+ return samsung_register_cmu(dev, CMU_PERI, peri_cmu_clks,
+ exynos850_cmu_top);
}
static const struct udevice_id exynos850_cmu_peri_ids[] = {
@@ -179,11 +307,149 @@
{ }
};
+SAMSUNG_CLK_OPS(exynos850_cmu_peri, CMU_PERI);
+
U_BOOT_DRIVER(exynos850_cmu_peri) = {
.name = "exynos850-cmu-peri",
.id = UCLASS_CLK,
.of_match = exynos850_cmu_peri_ids,
- .ops = &ccf_clk_ops,
+ .ops = &exynos850_cmu_peri_clk_ops,
.probe = exynos850_cmu_peri_probe,
.flags = DM_FLAG_PRE_RELOC,
};
+
+/* ---- CMU_CORE ------------------------------------------------------------ */
+
+/* Register Offset definitions for CMU_CORE (0x12000000) */
+#define PLL_CON0_MUX_CLKCMU_CORE_BUS_USER 0x0600
+#define PLL_CON0_MUX_CLKCMU_CORE_MMC_EMBD_USER 0x0620
+#define CLK_CON_DIV_DIV_CLK_CORE_BUSP 0x1800
+#define CLK_CON_GAT_GOUT_CORE_MMC_EMBD_I_ACLK 0x20e8
+#define CLK_CON_GAT_GOUT_CORE_MMC_EMBD_SDCLKIN 0x20ec
+
+/* List of parent clocks for Muxes in CMU_CORE */
+PNAME(mout_core_bus_user_p) = { "clock-oscclk", "dout_core_bus" };
+PNAME(mout_core_mmc_embd_user_p) = { "clock-oscclk",
+ "dout_core_mmc_embd" };
+
+static const struct samsung_mux_clock core_mux_clks[] = {
+ MUX(CLK_MOUT_CORE_BUS_USER, "mout_core_bus_user", mout_core_bus_user_p,
+ PLL_CON0_MUX_CLKCMU_CORE_BUS_USER, 4, 1),
+ MUX_F(CLK_MOUT_CORE_MMC_EMBD_USER, "mout_core_mmc_embd_user",
+ mout_core_mmc_embd_user_p, PLL_CON0_MUX_CLKCMU_CORE_MMC_EMBD_USER,
+ 4, 1, CLK_SET_RATE_PARENT, 0),
+};
+
+static const struct samsung_div_clock core_div_clks[] = {
+ DIV(CLK_DOUT_CORE_BUSP, "dout_core_busp", "mout_core_bus_user",
+ CLK_CON_DIV_DIV_CLK_CORE_BUSP, 0, 2),
+};
+
+static const struct samsung_gate_clock core_gate_clks[] = {
+ GATE(CLK_GOUT_MMC_EMBD_ACLK, "gout_mmc_embd_aclk", "dout_core_busp",
+ CLK_CON_GAT_GOUT_CORE_MMC_EMBD_I_ACLK, 21, 0, 0),
+ GATE(CLK_GOUT_MMC_EMBD_SDCLKIN, "gout_mmc_embd_sdclkin",
+ "mout_core_mmc_embd_user", CLK_CON_GAT_GOUT_CORE_MMC_EMBD_SDCLKIN,
+ 21, CLK_SET_RATE_PARENT, 0),
+};
+
+static const struct samsung_clk_group core_cmu_clks[] = {
+ { S_CLK_MUX, core_mux_clks, ARRAY_SIZE(core_mux_clks) },
+ { S_CLK_DIV, core_div_clks, ARRAY_SIZE(core_div_clks) },
+ { S_CLK_GATE, core_gate_clks, ARRAY_SIZE(core_gate_clks) },
+};
+
+static int exynos850_cmu_core_probe(struct udevice *dev)
+{
+ return samsung_register_cmu(dev, CMU_CORE, core_cmu_clks,
+ exynos850_cmu_top);
+}
+
+static const struct udevice_id exynos850_cmu_core_ids[] = {
+ { .compatible = "samsung,exynos850-cmu-core" },
+ { }
+};
+
+SAMSUNG_CLK_OPS(exynos850_cmu_core, CMU_CORE);
+
+U_BOOT_DRIVER(exynos850_cmu_core) = {
+ .name = "exynos850-cmu-core",
+ .id = UCLASS_CLK,
+ .of_match = exynos850_cmu_core_ids,
+ .ops = &exynos850_cmu_core_clk_ops,
+ .probe = exynos850_cmu_core_probe,
+ .flags = DM_FLAG_PRE_RELOC,
+};
+
+/* ---- CMU_HSI ------------------------------------------------------------- */
+
+/* Register Offset definitions for CMU_HSI (0x13400000) */
+#define PLL_CON0_MUX_CLKCMU_HSI_BUS_USER 0x0600
+#define PLL_CON0_MUX_CLKCMU_HSI_MMC_CARD_USER 0x0610
+#define PLL_CON0_MUX_CLKCMU_HSI_USB20DRD_USER 0x0620
+#define CLK_CON_GAT_HSI_USB20DRD_TOP_I_REF_CLK_50 0x200c
+#define CLK_CON_GAT_HSI_USB20DRD_TOP_I_PHY_REFCLK_26 0x2010
+#define CLK_CON_GAT_GOUT_HSI_MMC_CARD_I_ACLK 0x2024
+#define CLK_CON_GAT_GOUT_HSI_MMC_CARD_SDCLKIN 0x2028
+#define CLK_CON_GAT_GOUT_HSI_USB20DRD_TOP_ACLK_PHYCTRL_20 0x203c
+#define CLK_CON_GAT_GOUT_HSI_USB20DRD_TOP_BUS_CLK_EARLY 0x2040
+
+/* List of parent clocks for Muxes in CMU_HSI */
+PNAME(mout_hsi_bus_user_p) = { "clock-oscclk", "dout_hsi_bus" };
+PNAME(mout_hsi_mmc_card_user_p) = { "clock-oscclk", "dout_hsi_mmc_card" };
+PNAME(mout_hsi_usb20drd_user_p) = { "clock-oscclk", "dout_hsi_usb20drd" };
+
+static const struct samsung_mux_clock hsi_mux_clks[] __initconst = {
+ MUX(CLK_MOUT_HSI_BUS_USER, "mout_hsi_bus_user", mout_hsi_bus_user_p,
+ PLL_CON0_MUX_CLKCMU_HSI_BUS_USER, 4, 1),
+ MUX_F(CLK_MOUT_HSI_MMC_CARD_USER, "mout_hsi_mmc_card_user",
+ mout_hsi_mmc_card_user_p, PLL_CON0_MUX_CLKCMU_HSI_MMC_CARD_USER,
+ 4, 1, CLK_SET_RATE_PARENT, 0),
+ MUX(CLK_MOUT_HSI_USB20DRD_USER, "mout_hsi_usb20drd_user",
+ mout_hsi_usb20drd_user_p, PLL_CON0_MUX_CLKCMU_HSI_USB20DRD_USER,
+ 4, 1),
+};
+
+static const struct samsung_gate_clock hsi_gate_clks[] __initconst = {
+ GATE(CLK_GOUT_USB_REF_CLK, "gout_usb_ref", "mout_hsi_usb20drd_user",
+ CLK_CON_GAT_HSI_USB20DRD_TOP_I_REF_CLK_50, 21, 0, 0),
+ GATE(CLK_GOUT_USB_PHY_REF_CLK, "gout_usb_phy_ref", "clock-oscclk",
+ CLK_CON_GAT_HSI_USB20DRD_TOP_I_PHY_REFCLK_26, 21, 0, 0),
+ GATE(CLK_GOUT_MMC_CARD_ACLK, "gout_mmc_card_aclk", "mout_hsi_bus_user",
+ CLK_CON_GAT_GOUT_HSI_MMC_CARD_I_ACLK, 21, 0, 0),
+ GATE(CLK_GOUT_MMC_CARD_SDCLKIN, "gout_mmc_card_sdclkin",
+ "mout_hsi_mmc_card_user",
+ CLK_CON_GAT_GOUT_HSI_MMC_CARD_SDCLKIN, 21, CLK_SET_RATE_PARENT, 0),
+ GATE(CLK_GOUT_USB_PHY_ACLK, "gout_usb_phy_aclk", "mout_hsi_bus_user",
+ CLK_CON_GAT_GOUT_HSI_USB20DRD_TOP_ACLK_PHYCTRL_20, 21, 0, 0),
+ GATE(CLK_GOUT_USB_BUS_EARLY_CLK, "gout_usb_bus_early",
+ "mout_hsi_bus_user",
+ CLK_CON_GAT_GOUT_HSI_USB20DRD_TOP_BUS_CLK_EARLY, 21, 0, 0),
+};
+
+static const struct samsung_clk_group hsi_cmu_clks[] = {
+ { S_CLK_MUX, hsi_mux_clks, ARRAY_SIZE(hsi_mux_clks) },
+ { S_CLK_GATE, hsi_gate_clks, ARRAY_SIZE(hsi_gate_clks) },
+};
+
+static int exynos850_cmu_hsi_probe(struct udevice *dev)
+{
+ return samsung_register_cmu(dev, CMU_HSI, hsi_cmu_clks,
+ exynos850_cmu_hsi);
+}
+
+static const struct udevice_id exynos850_cmu_hsi_ids[] = {
+ { .compatible = "samsung,exynos850-cmu-hsi" },
+ { }
+};
+
+SAMSUNG_CLK_OPS(exynos850_cmu_hsi, CMU_HSI);
+
+U_BOOT_DRIVER(exynos850_cmu_hsi) = {
+ .name = "exynos850-cmu-hsi",
+ .id = UCLASS_CLK,
+ .of_match = exynos850_cmu_hsi_ids,
+ .ops = &exynos850_cmu_hsi_clk_ops,
+ .probe = exynos850_cmu_hsi_probe,
+ .flags = DM_FLAG_PRE_RELOC,
+};
diff --git a/drivers/clk/exynos/clk-pll.c b/drivers/clk/exynos/clk-pll.c
index 4aacbc2..542d577 100644
--- a/drivers/clk/exynos/clk-pll.c
+++ b/drivers/clk/exynos/clk-pll.c
@@ -136,7 +136,7 @@
return clk;
}
-void samsung_clk_register_pll(void __iomem *base,
+void samsung_clk_register_pll(void __iomem *base, unsigned int cmu_id,
const struct samsung_pll_clock *clk_list,
unsigned int nr_clk)
{
@@ -145,10 +145,12 @@
for (cnt = 0; cnt < nr_clk; cnt++) {
struct clk *clk;
const struct samsung_pll_clock *pll_clk;
+ unsigned long clk_id;
pll_clk = &clk_list[cnt];
clk = _samsung_clk_register_pll(base, pll_clk);
- clk_dm(pll_clk->id, clk);
+ clk_id = SAMSUNG_TO_CLK_ID(cmu_id, pll_clk->id);
+ clk_dm(clk_id, clk);
}
}
diff --git a/drivers/clk/exynos/clk-pll.h b/drivers/clk/exynos/clk-pll.h
index bd79309..bdc94e7 100644
--- a/drivers/clk/exynos/clk-pll.h
+++ b/drivers/clk/exynos/clk-pll.h
@@ -15,9 +15,15 @@
#include <linux/clk-provider.h>
+struct samsung_pll_clock;
+
enum samsung_pll_type {
pll_0822x,
pll_0831x,
};
+void samsung_clk_register_pll(void __iomem *base, unsigned int cmu_id,
+ const struct samsung_pll_clock *clk_list,
+ unsigned int nr_clk);
+
#endif /* __EXYNOS_CLK_PLL_H */
diff --git a/drivers/clk/exynos/clk.c b/drivers/clk/exynos/clk.c
index 430767f..943e8bd 100644
--- a/drivers/clk/exynos/clk.c
+++ b/drivers/clk/exynos/clk.c
@@ -10,61 +10,67 @@
#include <dm.h>
#include "clk.h"
-void samsung_clk_register_mux(void __iomem *base,
- const struct samsung_mux_clock *clk_list,
- unsigned int nr_clk)
+static void samsung_clk_register_mux(void __iomem *base, unsigned int cmu_id,
+ const struct samsung_mux_clock *clk_list,
+ unsigned int nr_clk)
{
unsigned int cnt;
for (cnt = 0; cnt < nr_clk; cnt++) {
struct clk *clk;
const struct samsung_mux_clock *m;
+ unsigned long clk_id;
m = &clk_list[cnt];
clk = clk_register_mux(NULL, m->name, m->parent_names,
m->num_parents, m->flags, base + m->offset, m->shift,
m->width, m->mux_flags);
- clk_dm(m->id, clk);
+ clk_id = SAMSUNG_TO_CLK_ID(cmu_id, m->id);
+ clk_dm(clk_id, clk);
}
}
-void samsung_clk_register_div(void __iomem *base,
- const struct samsung_div_clock *clk_list,
- unsigned int nr_clk)
+static void samsung_clk_register_div(void __iomem *base, unsigned int cmu_id,
+ const struct samsung_div_clock *clk_list,
+ unsigned int nr_clk)
{
unsigned int cnt;
for (cnt = 0; cnt < nr_clk; cnt++) {
struct clk *clk;
const struct samsung_div_clock *d;
+ unsigned long clk_id;
d = &clk_list[cnt];
clk = clk_register_divider(NULL, d->name, d->parent_name,
d->flags, base + d->offset, d->shift,
d->width, d->div_flags);
- clk_dm(d->id, clk);
+ clk_id = SAMSUNG_TO_CLK_ID(cmu_id, d->id);
+ clk_dm(clk_id, clk);
}
}
-void samsung_clk_register_gate(void __iomem *base,
- const struct samsung_gate_clock *clk_list,
- unsigned int nr_clk)
+static void samsung_clk_register_gate(void __iomem *base, unsigned int cmu_id,
+ const struct samsung_gate_clock *clk_list,
+ unsigned int nr_clk)
{
unsigned int cnt;
for (cnt = 0; cnt < nr_clk; cnt++) {
struct clk *clk;
const struct samsung_gate_clock *g;
+ unsigned long clk_id;
g = &clk_list[cnt];
clk = clk_register_gate(NULL, g->name, g->parent_name,
g->flags, base + g->offset, g->bit_idx,
g->gate_flags, NULL);
- clk_dm(g->id, clk);
+ clk_id = SAMSUNG_TO_CLK_ID(cmu_id, g->id);
+ clk_dm(clk_id, clk);
}
}
-typedef void (*samsung_clk_register_fn)(void __iomem *base,
+typedef void (*samsung_clk_register_fn)(void __iomem *base, unsigned int cmu_id,
const void *clk_list,
unsigned int nr_clk);
@@ -78,34 +84,37 @@
/**
* samsung_cmu_register_clocks() - Register provided clock groups
* @base: Base address of CMU registers
+ * @cmu_id: CMU index number
* @clk_groups: list of clock groups
* @nr_groups: count of clock groups in @clk_groups
*
* Having the array of clock groups @clk_groups makes it possible to keep a
* correct clocks registration order.
*/
-void samsung_cmu_register_clocks(void __iomem *base,
- const struct samsung_clk_group *clk_groups,
- unsigned int nr_groups)
+static void samsung_cmu_register_clocks(void __iomem *base, unsigned int cmu_id,
+ const struct samsung_clk_group *clk_groups,
+ unsigned int nr_groups)
{
unsigned int i;
for (i = 0; i < nr_groups; i++) {
const struct samsung_clk_group *g = &clk_groups[i];
- samsung_clk_register_fns[g->type](base, g->clk_list, g->nr_clk);
+ samsung_clk_register_fns[g->type](base, cmu_id,
+ g->clk_list, g->nr_clk);
}
}
/**
* samsung_cmu_register_one - Register all CMU clocks
* @dev: CMU device
+ * @cmu_id: CMU index number
* @clk_groups: list of CMU clock groups
* @nr_groups: count of CMU clock groups in @clk_groups
*
* Return: 0 on success or negative value on error.
*/
-int samsung_cmu_register_one(struct udevice *dev,
+int samsung_cmu_register_one(struct udevice *dev, unsigned int cmu_id,
const struct samsung_clk_group *clk_groups,
unsigned int nr_groups)
{
@@ -115,7 +124,7 @@
if (!base)
return -EINVAL;
- samsung_cmu_register_clocks(base, clk_groups, nr_groups);
+ samsung_cmu_register_clocks(base, cmu_id, clk_groups, nr_groups);
return 0;
}
diff --git a/drivers/clk/exynos/clk.h b/drivers/clk/exynos/clk.h
index 91a51b8..ed0a395 100644
--- a/drivers/clk/exynos/clk.h
+++ b/drivers/clk/exynos/clk.h
@@ -13,6 +13,51 @@
#include <linux/clk-provider.h>
#include "clk-pll.h"
+#define _SAMSUNG_CLK_OPS(_name, _cmu) \
+static int _name##_of_xlate(struct clk *clk, \
+ struct ofnode_phandle_args *args) \
+{ \
+ if (args->args_count > 1) { \
+ debug("Invalid args_count: %d\n", args->args_count); \
+ return -EINVAL; \
+ } \
+ \
+ if (args->args_count) \
+ clk->id = SAMSUNG_TO_CLK_ID(_cmu, args->args[0]); \
+ else \
+ clk->id = 0; \
+ \
+ return 0; \
+} \
+ \
+static const struct clk_ops _name##_clk_ops = { \
+ .set_rate = ccf_clk_set_rate, \
+ .get_rate = ccf_clk_get_rate, \
+ .set_parent = ccf_clk_set_parent, \
+ .enable = ccf_clk_enable, \
+ .disable = ccf_clk_disable, \
+ .of_xlate = _name##_of_xlate, \
+}
+
+/**
+ * SAMSUNG_CLK_OPS - Define clock operations structure for specified CMU.
+ * @name: name of generated structure
+ * @cmu: CMU index
+ *
+ * Like ccf_clk_ops, but with custom .of_xlate callback.
+ */
+#define SAMSUNG_CLK_OPS(name, cmu) _SAMSUNG_CLK_OPS(name, cmu)
+
+/**
+ * SAMSUNG_TO_CLK_ID - Calculate a global clock index.
+ * @_cmu: CMU index
+ * @_id: local clock index (unique across @_cmu)
+ *
+ * Return: A global clock index unique across all CMUs.
+ * Keeps a range of 256 available clocks for every CMU.
+ */
+#define SAMSUNG_TO_CLK_ID(_cmu, _id) (((_cmu) << 8) | ((_id) & 0xff))
+
/**
* struct samsung_mux_clock - information about mux clock
* @id: platform specific id of the clock
@@ -179,29 +224,14 @@
unsigned int nr_clk;
};
-void samsung_clk_register_mux(void __iomem *base,
- const struct samsung_mux_clock *clk_list,
- unsigned int nr_clk);
-void samsung_clk_register_div(void __iomem *base,
- const struct samsung_div_clock *clk_list,
- unsigned int nr_clk);
-void samsung_clk_register_gate(void __iomem *base,
- const struct samsung_gate_clock *clk_list,
- unsigned int nr_clk);
-void samsung_clk_register_pll(void __iomem *base,
- const struct samsung_pll_clock *clk_list,
- unsigned int nr_clk);
-
-void samsung_cmu_register_clocks(void __iomem *base,
- const struct samsung_clk_group *clk_groups,
- unsigned int nr_groups);
-int samsung_cmu_register_one(struct udevice *dev,
+int samsung_cmu_register_one(struct udevice *dev, unsigned int cmu_id,
const struct samsung_clk_group *clk_groups,
unsigned int nr_groups);
/**
* samsung_register_cmu - Register CMU clocks ensuring parent CMU is present
* @dev: CMU device
+ * @cmu_id: CMU index number
* @clk_groups: list of CMU clock groups
* @parent_drv: name of parent CMU driver
*
@@ -210,7 +240,7 @@
*
* Return: 0 on success or negative value on error.
*/
-#define samsung_register_cmu(dev, clk_groups, parent_drv) \
+#define samsung_register_cmu(dev, cmu_id, clk_groups, parent_drv) \
({ \
struct udevice *__parent; \
int __ret; \
@@ -220,8 +250,8 @@
if (__ret || !__parent) \
__ret = -ENOENT; \
else \
- __ret = samsung_cmu_register_one(dev, clk_groups, \
- ARRAY_SIZE(clk_groups)); \
+ __ret = samsung_cmu_register_one(dev, cmu_id, \
+ clk_groups, ARRAY_SIZE(clk_groups)); \
__ret; \
})
diff --git a/drivers/clk/ics8n3qv01.c b/drivers/clk/ics8n3qv01.c
index 33fb6ed..9c61a84 100644
--- a/drivers/clk/ics8n3qv01.c
+++ b/drivers/clk/ics8n3qv01.c
@@ -9,7 +9,6 @@
* Dirk Eibach, Guntermann & Drunck GmbH, eibach@gdsys.de
*/
-#include <common.h>
#include <dm.h>
#include <clk-uclass.h>
#include <i2c.h>
diff --git a/drivers/clk/imx/clk-composite-8m.c b/drivers/clk/imx/clk-composite-8m.c
index 4941567..45f1bca 100644
--- a/drivers/clk/imx/clk-composite-8m.c
+++ b/drivers/clk/imx/clk-composite-8m.c
@@ -3,7 +3,6 @@
* Copyright 2019 NXP
*/
-#include <common.h>
#include <log.h>
#include <asm/io.h>
#include <malloc.h>
diff --git a/drivers/clk/imx/clk-composite-93.c b/drivers/clk/imx/clk-composite-93.c
index 6d71c0c..2cf20be 100644
--- a/drivers/clk/imx/clk-composite-93.c
+++ b/drivers/clk/imx/clk-composite-93.c
@@ -4,7 +4,6 @@
*
* Peng Fan <peng.fan@nxp.com>
*/
-#include <common.h>
#include <log.h>
#include <asm/io.h>
#include <malloc.h>
diff --git a/drivers/clk/imx/clk-fracn-gppll.c b/drivers/clk/imx/clk-fracn-gppll.c
index 9228f27..8f42a5c 100644
--- a/drivers/clk/imx/clk-fracn-gppll.c
+++ b/drivers/clk/imx/clk-fracn-gppll.c
@@ -3,7 +3,6 @@
* Copyright 2021 NXP
*/
-#include <common.h>
#include <asm/io.h>
#include <malloc.h>
#include <clk-uclass.h>
diff --git a/drivers/clk/imx/clk-gate-93.c b/drivers/clk/imx/clk-gate-93.c
index bc85741..d7f2640 100644
--- a/drivers/clk/imx/clk-gate-93.c
+++ b/drivers/clk/imx/clk-gate-93.c
@@ -5,7 +5,6 @@
* Peng Fan <peng.fan@nxp.com>
*/
-#include <common.h>
#include <asm/io.h>
#include <malloc.h>
#include <clk-uclass.h>
diff --git a/drivers/clk/imx/clk-gate2.c b/drivers/clk/imx/clk-gate2.c
index da27230..65fa6b5 100644
--- a/drivers/clk/imx/clk-gate2.c
+++ b/drivers/clk/imx/clk-gate2.c
@@ -14,7 +14,6 @@
*
*/
-#include <common.h>
#include <asm/io.h>
#include <malloc.h>
#include <clk-uclass.h>
diff --git a/drivers/clk/imx/clk-imx6q.c b/drivers/clk/imx/clk-imx6q.c
index 67825af..ba9923d 100644
--- a/drivers/clk/imx/clk-imx6q.c
+++ b/drivers/clk/imx/clk-imx6q.c
@@ -4,7 +4,6 @@
* Lukasz Majewski, DENX Software Engineering, lukma@denx.de
*/
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <log.h>
diff --git a/drivers/clk/imx/clk-imx8.c b/drivers/clk/imx/clk-imx8.c
index d39b87b..96cf5fe 100644
--- a/drivers/clk/imx/clk-imx8.c
+++ b/drivers/clk/imx/clk-imx8.c
@@ -4,7 +4,6 @@
* Peng Fan <peng.fan@nxp.com>
*/
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <log.h>
diff --git a/drivers/clk/imx/clk-imx8mm.c b/drivers/clk/imx/clk-imx8mm.c
index b5c253e..70e2e53 100644
--- a/drivers/clk/imx/clk-imx8mm.c
+++ b/drivers/clk/imx/clk-imx8mm.c
@@ -4,7 +4,6 @@
* Peng Fan <peng.fan@nxp.com>
*/
-#include <common.h>
#include <clk.h>
#include <clk-uclass.h>
#include <dm.h>
@@ -66,6 +65,17 @@
static const char *imx8mm_i2c4_sels[] = {"clock-osc-24m", "sys_pll1_160m", "sys_pll2_50m", "sys_pll3_out", "audio_pll1_out",
"video_pll1_out", "audio_pll2_out", "sys_pll1_133m", };
+#if CONFIG_IS_ENABLED(PCIE_DW_IMX)
+static const char *imx8mm_pcie1_ctrl_sels[] = {"clock-osc-24m", "sys_pll2_250m", "sys_pll2_200m", "sys_pll1_266m",
+ "sys_pll1_800m", "sys_pll2_500m", "sys_pll2_333m", "sys_pll3_out", };
+
+static const char *imx8mm_pcie1_phy_sels[] = {"clock-osc-24m", "sys_pll2_100m", "sys_pll2_500m", "clk_ext1", "clk_ext2",
+ "clk_ext3", "clk_ext4", "sys_pll1_400m", };
+
+static const char *imx8mm_pcie1_aux_sels[] = {"clock-osc-24m", "sys_pll2_200m", "sys_pll2_50m", "sys_pll3_out",
+ "sys_pll2_100m", "sys_pll1_80m", "sys_pll1_160m", "sys_pll1_200m", };
+#endif
+
#ifndef CONFIG_SPL_BUILD
static const char *imx8mm_pwm1_sels[] = {"clock-osc-24m", "sys_pll2_100m", "sys_pll1_160m", "sys_pll1_40m",
"sys_pll3_out", "clk_ext1", "sys_pll1_80m", "video_pll1_out", };
@@ -256,6 +266,17 @@
imx8m_clk_composite("usb_bus", imx8mm_usb_bus_sels, base + 0x8b80));
/* IP */
+#if CONFIG_IS_ENABLED(PCIE_DW_IMX)
+ clk_dm(IMX8MM_CLK_PCIE1_CTRL,
+ imx8m_clk_composite("pcie1_ctrl", imx8mm_pcie1_ctrl_sels,
+ base + 0xa300));
+ clk_dm(IMX8MM_CLK_PCIE1_PHY,
+ imx8m_clk_composite("pcie1_phy", imx8mm_pcie1_phy_sels,
+ base + 0xa380));
+ clk_dm(IMX8MM_CLK_PCIE1_AUX,
+ imx8m_clk_composite("pcie1_aux", imx8mm_pcie1_aux_sels,
+ base + 0xa400));
+#endif
clk_dm(IMX8MM_CLK_USDHC1,
imx8m_clk_composite("usdhc1", imx8mm_usdhc1_sels,
base + 0xac00));
@@ -339,6 +360,11 @@
imx_clk_gate4("pwm4_root_clk", "pwm4", base + 0x42b0, 0));
#endif
+#if CONFIG_IS_ENABLED(PCIE_DW_IMX)
+ clk_dm(IMX8MM_CLK_PCIE1_ROOT,
+ imx_clk_gate4("pcie1_root_clk", "pcie1_ctrl", base + 0x4250, 0));
+#endif
+
#if CONFIG_IS_ENABLED(DM_SPI)
clk_dm(IMX8MM_CLK_ECSPI1,
imx8m_clk_composite("ecspi1", imx8mm_ecspi1_sels, base + 0xb280));
diff --git a/drivers/clk/imx/clk-imx8mn.c b/drivers/clk/imx/clk-imx8mn.c
index 457acb8..ed9e16d 100644
--- a/drivers/clk/imx/clk-imx8mn.c
+++ b/drivers/clk/imx/clk-imx8mn.c
@@ -4,7 +4,6 @@
* Peng Fan <peng.fan@nxp.com>
*/
-#include <common.h>
#include <clk.h>
#include <clk-uclass.h>
#include <dm.h>
diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c
index 7dfc829..1f498b6 100644
--- a/drivers/clk/imx/clk-imx8mp.c
+++ b/drivers/clk/imx/clk-imx8mp.c
@@ -4,7 +4,6 @@
* Peng Fan <peng.fan@nxp.com>
*/
-#include <common.h>
#include <clk.h>
#include <clk-uclass.h>
#include <dm.h>
diff --git a/drivers/clk/imx/clk-imx8mq.c b/drivers/clk/imx/clk-imx8mq.c
index cf197df..ed4acd7 100644
--- a/drivers/clk/imx/clk-imx8mq.c
+++ b/drivers/clk/imx/clk-imx8mq.c
@@ -5,7 +5,6 @@
* Peng Fan <peng.fan@nxp.com>
*/
-#include <common.h>
#include <clk.h>
#include <clk-uclass.h>
#include <dm.h>
diff --git a/drivers/clk/imx/clk-imx8qm.c b/drivers/clk/imx/clk-imx8qm.c
index 01e33de..62fed7e 100644
--- a/drivers/clk/imx/clk-imx8qm.c
+++ b/drivers/clk/imx/clk-imx8qm.c
@@ -4,7 +4,6 @@
* Peng Fan <peng.fan@nxp.com>
*/
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <log.h>
diff --git a/drivers/clk/imx/clk-imx8qxp.c b/drivers/clk/imx/clk-imx8qxp.c
index d900d4c..18bdc08 100644
--- a/drivers/clk/imx/clk-imx8qxp.c
+++ b/drivers/clk/imx/clk-imx8qxp.c
@@ -4,7 +4,6 @@
* Peng Fan <peng.fan@nxp.com>
*/
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <log.h>
diff --git a/drivers/clk/imx/clk-imx93.c b/drivers/clk/imx/clk-imx93.c
index ce10d79..ede36c4 100644
--- a/drivers/clk/imx/clk-imx93.c
+++ b/drivers/clk/imx/clk-imx93.c
@@ -3,7 +3,6 @@
* Copyright 2021 NXP.
*/
-#include <common.h>
#include <clk.h>
#include <clk-uclass.h>
#include <dm.h>
@@ -289,7 +288,7 @@
clk_dm(IMX93_CLK_SYS_PLL_PFD2_DIV2,
imx_clk_fixed_factor("sys_pll_pfd2_div2", "sys_pll_pfd2", 1, 2));
- base = (void *)ANATOP_BASE_ADDR;
+ anatop_base = (void *)ANATOP_BASE_ADDR;
clk_dm(IMX93_CLK_ARM_PLL,
imx_clk_fracn_gppll_integer("arm_pll", "clock-osc-24m",
diff --git a/drivers/clk/imx/clk-imxrt1020.c b/drivers/clk/imx/clk-imxrt1020.c
index dc91ac5..c80b029 100644
--- a/drivers/clk/imx/clk-imxrt1020.c
+++ b/drivers/clk/imx/clk-imxrt1020.c
@@ -4,7 +4,6 @@
* Author(s): Giulio Benetti <giulio.benetti@benettiengineering.com>
*/
-#include <common.h>
#include <clk.h>
#include <clk-uclass.h>
#include <dm.h>
diff --git a/drivers/clk/imx/clk-imxrt1050.c b/drivers/clk/imx/clk-imxrt1050.c
index d40635d..754f394 100644
--- a/drivers/clk/imx/clk-imxrt1050.c
+++ b/drivers/clk/imx/clk-imxrt1050.c
@@ -4,7 +4,6 @@
* Author(s): Giulio Benetti <giulio.benetti@benettiengineering.com>
*/
-#include <common.h>
#include <clk.h>
#include <clk-uclass.h>
#include <dm.h>
diff --git a/drivers/clk/imx/clk-imxrt1170.c b/drivers/clk/imx/clk-imxrt1170.c
index 077dd1b..20b9dc3 100644
--- a/drivers/clk/imx/clk-imxrt1170.c
+++ b/drivers/clk/imx/clk-imxrt1170.c
@@ -4,7 +4,6 @@
* Author(s): Jesse Taube <Mr.Bossman075@gmail.com>
*/
-#include <common.h>
#include <clk.h>
#include <clk-uclass.h>
#include <dm.h>
diff --git a/drivers/clk/imx/clk-pfd.c b/drivers/clk/imx/clk-pfd.c
index b8be316..378cdff 100644
--- a/drivers/clk/imx/clk-pfd.c
+++ b/drivers/clk/imx/clk-pfd.c
@@ -14,7 +14,6 @@
* http://www.gnu.org/copyleft/gpl.html
*/
-#include <common.h>
#include <asm/io.h>
#include <malloc.h>
#include <clk-uclass.h>
diff --git a/drivers/clk/imx/clk-pll14xx.c b/drivers/clk/imx/clk-pll14xx.c
index 1cb685e..3911e03 100644
--- a/drivers/clk/imx/clk-pll14xx.c
+++ b/drivers/clk/imx/clk-pll14xx.c
@@ -5,7 +5,6 @@
* Peng Fan <peng.fan@nxp.com>
*/
-#include <common.h>
#include <asm/io.h>
#include <malloc.h>
#include <clk-uclass.h>
diff --git a/drivers/clk/imx/clk-pllv3.c b/drivers/clk/imx/clk-pllv3.c
index fad306a..c6692f2 100644
--- a/drivers/clk/imx/clk-pllv3.c
+++ b/drivers/clk/imx/clk-pllv3.c
@@ -4,7 +4,6 @@
* Lukasz Majewski, DENX Software Engineering, lukma@denx.de
*/
-#include <common.h>
#include <asm/io.h>
#include <div64.h>
#include <malloc.h>
diff --git a/drivers/clk/intel/clk_intel.c b/drivers/clk/intel/clk_intel.c
index 46ccbb1..a677a7c 100644
--- a/drivers/clk/intel/clk_intel.c
+++ b/drivers/clk/intel/clk_intel.c
@@ -4,7 +4,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <dm.h>
#include <clk-uclass.h>
#include <dt-bindings/clock/intel-clock.h>
diff --git a/drivers/clk/mediatek/clk-mt7622.c b/drivers/clk/mediatek/clk-mt7622.c
index 259ea33..2beb630 100644
--- a/drivers/clk/mediatek/clk-mt7622.c
+++ b/drivers/clk/mediatek/clk-mt7622.c
@@ -6,7 +6,6 @@
* Author: Ryder Lee <ryder.lee@mediatek.com>
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <asm/arch-mediatek/reset.h>
diff --git a/drivers/clk/mediatek/clk-mt7623.c b/drivers/clk/mediatek/clk-mt7623.c
index 0c7411e..5072c99 100644
--- a/drivers/clk/mediatek/clk-mt7623.c
+++ b/drivers/clk/mediatek/clk-mt7623.c
@@ -6,7 +6,6 @@
* Author: Ryder Lee <ryder.lee@mediatek.com>
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <asm/arch-mediatek/reset.h>
diff --git a/drivers/clk/mediatek/clk-mt7629.c b/drivers/clk/mediatek/clk-mt7629.c
index 31b6fa0..0c796a1 100644
--- a/drivers/clk/mediatek/clk-mt7629.c
+++ b/drivers/clk/mediatek/clk-mt7629.c
@@ -6,7 +6,6 @@
* Author: Ryder Lee <ryder.lee@mediatek.com>
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <asm/arch-mediatek/reset.h>
diff --git a/drivers/clk/mediatek/clk-mt8183.c b/drivers/clk/mediatek/clk-mt8183.c
index 17e653a..9612a62 100644
--- a/drivers/clk/mediatek/clk-mt8183.c
+++ b/drivers/clk/mediatek/clk-mt8183.c
@@ -8,7 +8,6 @@
* Author: Weiyi Lu <weiyi.lu@mediatek.com>
*/
-#include <common.h>
#include <dm.h>
#include <asm/io.h>
#include <dt-bindings/clock/mt8183-clk.h>
diff --git a/drivers/clk/mediatek/clk-mt8512.c b/drivers/clk/mediatek/clk-mt8512.c
index 193e069..ab27067 100644
--- a/drivers/clk/mediatek/clk-mt8512.c
+++ b/drivers/clk/mediatek/clk-mt8512.c
@@ -6,7 +6,6 @@
* Author: Chen Zhong <chen.zhong@mediatek.com>
*/
-#include <common.h>
#include <dm.h>
#include <asm/io.h>
#include <dt-bindings/clock/mt8512-clk.h>
diff --git a/drivers/clk/mediatek/clk-mt8516.c b/drivers/clk/mediatek/clk-mt8516.c
index 29f7062..623f884 100644
--- a/drivers/clk/mediatek/clk-mt8516.c
+++ b/drivers/clk/mediatek/clk-mt8516.c
@@ -6,7 +6,6 @@
* Author: Fabien Parent <fparent@baylibre.com>
*/
-#include <common.h>
#include <dm.h>
#include <asm/io.h>
#include <dt-bindings/clock/mt8516-clk.h>
diff --git a/drivers/clk/mediatek/clk-mt8518.c b/drivers/clk/mediatek/clk-mt8518.c
index 2386514..ba8cc58 100644
--- a/drivers/clk/mediatek/clk-mt8518.c
+++ b/drivers/clk/mediatek/clk-mt8518.c
@@ -6,7 +6,6 @@
* Author: Chen Zhong <chen.zhong@mediatek.com>
*/
-#include <common.h>
#include <dm.h>
#include <asm/io.h>
#include <dt-bindings/clock/mt8518-clk.h>
diff --git a/drivers/clk/mediatek/clk-mtk.c b/drivers/clk/mediatek/clk-mtk.c
index 4303300..d2c45be 100644
--- a/drivers/clk/mediatek/clk-mtk.c
+++ b/drivers/clk/mediatek/clk-mtk.c
@@ -6,7 +6,6 @@
* Author: Ryder Lee <ryder.lee@mediatek.com>
*/
-#include <common.h>
#include <clk-uclass.h>
#include <div64.h>
#include <dm.h>
diff --git a/drivers/clk/meson/a1.c b/drivers/clk/meson/a1.c
index 5220a33..a1b8d79 100644
--- a/drivers/clk/meson/a1.c
+++ b/drivers/clk/meson/a1.c
@@ -4,7 +4,6 @@
* Author: Igor Prusov <ivprusov@salutedevices.com>
*/
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <regmap.h>
diff --git a/drivers/clk/meson/axg-ao.c b/drivers/clk/meson/axg-ao.c
index 311ffc1..6ccf521 100644
--- a/drivers/clk/meson/axg-ao.c
+++ b/drivers/clk/meson/axg-ao.c
@@ -1,6 +1,5 @@
// SPDX-License-Identifier: GPL-2.0+
-#include <common.h>
#include <log.h>
#include <asm/io.h>
#include <clk-uclass.h>
diff --git a/drivers/clk/meson/axg.c b/drivers/clk/meson/axg.c
index d6da59d..c421a62 100644
--- a/drivers/clk/meson/axg.c
+++ b/drivers/clk/meson/axg.c
@@ -5,7 +5,6 @@
* Author: Neil Armstrong <narmstrong@baylibre.com>
*/
-#include <common.h>
#include <log.h>
#include <asm/arch/clock-axg.h>
#include <asm/io.h>
diff --git a/drivers/clk/meson/g12a-ao.c b/drivers/clk/meson/g12a-ao.c
index 1a855a6..61d489c 100644
--- a/drivers/clk/meson/g12a-ao.c
+++ b/drivers/clk/meson/g12a-ao.c
@@ -1,6 +1,5 @@
// SPDX-License-Identifier: GPL-2.0+
-#include <common.h>
#include <log.h>
#include <asm/io.h>
#include <clk-uclass.h>
diff --git a/drivers/clk/meson/g12a.c b/drivers/clk/meson/g12a.c
index e4fed8d..5d7faaa 100644
--- a/drivers/clk/meson/g12a.c
+++ b/drivers/clk/meson/g12a.c
@@ -5,7 +5,6 @@
* Author: Neil Armstrong <narmstrong@baylibre.com>
*/
-#include <common.h>
#include <log.h>
#include <asm/arch/clock-g12a.h>
#include <asm/io.h>
diff --git a/drivers/clk/meson/gxbb.c b/drivers/clk/meson/gxbb.c
index e379540..72ad4fd 100644
--- a/drivers/clk/meson/gxbb.c
+++ b/drivers/clk/meson/gxbb.c
@@ -5,7 +5,6 @@
* Author: Neil Armstrong <narmstrong@baylibre.com>
*/
-#include <common.h>
#include <log.h>
#include <asm/arch/clock-gx.h>
#include <asm/io.h>
diff --git a/drivers/clk/microchip/mpfs_clk.c b/drivers/clk/microchip/mpfs_clk.c
index 08f8bfc..0a82777 100644
--- a/drivers/clk/microchip/mpfs_clk.c
+++ b/drivers/clk/microchip/mpfs_clk.c
@@ -3,7 +3,6 @@
* Copyright (C) 2020 Microchip Technology Inc.
* Padmarao Begari <padmarao.begari@microchip.com>
*/
-#include <common.h>
#include <clk.h>
#include <clk-uclass.h>
#include <dm.h>
diff --git a/drivers/clk/microchip/mpfs_clk_cfg.c b/drivers/clk/microchip/mpfs_clk_cfg.c
index 5739fd6..5e8fb99 100644
--- a/drivers/clk/microchip/mpfs_clk_cfg.c
+++ b/drivers/clk/microchip/mpfs_clk_cfg.c
@@ -3,7 +3,6 @@
* Copyright (C) 2020 Microchip Technology Inc.
* Padmarao Begari <padmarao.begari@microchip.com>
*/
-#include <common.h>
#include <clk.h>
#include <clk-uclass.h>
#include <asm/io.h>
diff --git a/drivers/clk/microchip/mpfs_clk_msspll.c b/drivers/clk/microchip/mpfs_clk_msspll.c
index f37c0d8..d0e7b1f 100644
--- a/drivers/clk/microchip/mpfs_clk_msspll.c
+++ b/drivers/clk/microchip/mpfs_clk_msspll.c
@@ -2,7 +2,6 @@
/*
* Copyright (C) 2022 Microchip Technology Inc.
*/
-#include <common.h>
#include <clk.h>
#include <clk-uclass.h>
#include <asm/io.h>
diff --git a/drivers/clk/microchip/mpfs_clk_periph.c b/drivers/clk/microchip/mpfs_clk_periph.c
index ddeccb9..41c6df4 100644
--- a/drivers/clk/microchip/mpfs_clk_periph.c
+++ b/drivers/clk/microchip/mpfs_clk_periph.c
@@ -3,7 +3,6 @@
* Copyright (C) 2020 Microchip Technology Inc.
* Padmarao Begari <padmarao.begari@microchip.com>
*/
-#include <common.h>
#include <clk.h>
#include <clk-uclass.h>
#include <asm/io.h>
diff --git a/drivers/clk/mpc83xx_clk.c b/drivers/clk/mpc83xx_clk.c
index cc73445..a29ad0d 100644
--- a/drivers/clk/mpc83xx_clk.c
+++ b/drivers/clk/mpc83xx_clk.c
@@ -4,7 +4,6 @@
* Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc
*/
-#include <common.h>
#include <clk-uclass.h>
#include <clock_legacy.h>
#include <command.h>
diff --git a/drivers/clk/mtmips/clk-mt7628.c b/drivers/clk/mtmips/clk-mt7628.c
index 4d3ac84..2e263fb 100644
--- a/drivers/clk/mtmips/clk-mt7628.c
+++ b/drivers/clk/mtmips/clk-mt7628.c
@@ -5,7 +5,6 @@
* Author: Weijie Gao <weijie.gao@mediatek.com>
*/
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <dt-bindings/clock/mt7628-clk.h>
diff --git a/drivers/clk/mvebu/armada-37xx-periph.c b/drivers/clk/mvebu/armada-37xx-periph.c
index f5c9bd7..3033039 100644
--- a/drivers/clk/mvebu/armada-37xx-periph.c
+++ b/drivers/clk/mvebu/armada-37xx-periph.c
@@ -8,7 +8,6 @@
* Gregory CLEMENT <gregory.clement@free-electrons.com>
*/
-#include <common.h>
#include <malloc.h>
#include <clk-uclass.h>
#include <clk.h>
diff --git a/drivers/clk/mvebu/armada-37xx-tbg.c b/drivers/clk/mvebu/armada-37xx-tbg.c
index 846a73c..c1bab84 100644
--- a/drivers/clk/mvebu/armada-37xx-tbg.c
+++ b/drivers/clk/mvebu/armada-37xx-tbg.c
@@ -8,7 +8,6 @@
* Gregory CLEMENT <gregory.clement@free-electrons.com>
*/
-#include <common.h>
#include <clk-uclass.h>
#include <clk.h>
#include <dm.h>
diff --git a/drivers/clk/owl/clk_owl.c b/drivers/clk/owl/clk_owl.c
index 678fdd5..513112c 100644
--- a/drivers/clk/owl/clk_owl.c
+++ b/drivers/clk/owl/clk_owl.c
@@ -6,7 +6,6 @@
* Copyright (C) 2018 Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
*/
-#include <common.h>
#include <dm.h>
#include "clk_owl.h"
#include <asm/io.h>
diff --git a/drivers/clk/qcom/Kconfig b/drivers/clk/qcom/Kconfig
index 0df0d18..45d63c6 100644
--- a/drivers/clk/qcom/Kconfig
+++ b/drivers/clk/qcom/Kconfig
@@ -2,7 +2,7 @@
config CLK_QCOM
bool
- depends on CLK && DM_RESET
+ depends on CLK && DM_RESET && POWER_DOMAIN
def_bool n
menu "Qualcomm clock drivers"
@@ -31,6 +31,14 @@
on the Snapdragon IPQ4019 SoC. This driver supports the clocks
and resets exposed by the GCC hardware block.
+config CLK_QCOM_QCM2290
+ bool "Qualcomm QCM2290 GCC"
+ select CLK_QCOM
+ help
+ Say Y here to enable support for the Global Clock Controller
+ on the Snapdragon QCM2290 SoC. This driver supports the clocks
+ and resets exposed by the GCC hardware block.
+
config CLK_QCOM_QCS404
bool "Qualcomm QCS404 GCC"
select CLK_QCOM
@@ -47,6 +55,37 @@
on the Snapdragon 845 SoC. This driver supports the clocks
and resets exposed by the GCC hardware block.
+config CLK_QCOM_SM6115
+ bool "Qualcomm SM6115 GCC"
+ select CLK_QCOM
+ help
+ Say Y here to enable support for the Global Clock Controller
+ on the Snapdragon SM6115 SoC. This driver supports the clocks
+ and resets exposed by the GCC hardware block.
+
+config CLK_QCOM_SM8250
+ bool "Qualcomm SM8250 GCC"
+ select CLK_QCOM
+ help
+ Say Y here to enable support for the Global Clock Controller
+ on the Snapdragon SM8250 SoC. This driver supports the clocks
+
+config CLK_QCOM_SM8550
+ bool "Qualcomm SM8550 GCC"
+ select CLK_QCOM
+ help
+ Say Y here to enable support for the Global Clock Controller
+ on the Snapdragon SM8550 SoC. This driver supports the clocks
+ and resets exposed by the GCC hardware block.
+
+config CLK_QCOM_SM8650
+ bool "Qualcomm SM8650 GCC"
+ select CLK_QCOM
+ help
+ Say Y here to enable support for the Global Clock Controller
+ on the Snapdragon SM8650 SoC. This driver supports the clocks
+ and resets exposed by the GCC hardware block.
+
endmenu
endif
diff --git a/drivers/clk/qcom/Makefile b/drivers/clk/qcom/Makefile
index cb179fd..dec20e4 100644
--- a/drivers/clk/qcom/Makefile
+++ b/drivers/clk/qcom/Makefile
@@ -7,4 +7,9 @@
obj-$(CONFIG_CLK_QCOM_APQ8016) += clock-apq8016.o
obj-$(CONFIG_CLK_QCOM_APQ8096) += clock-apq8096.o
obj-$(CONFIG_CLK_QCOM_IPQ4019) += clock-ipq4019.o
+obj-$(CONFIG_CLK_QCOM_QCM2290) += clock-qcm2290.o
obj-$(CONFIG_CLK_QCOM_QCS404) += clock-qcs404.o
+obj-$(CONFIG_CLK_QCOM_SM6115) += clock-sm6115.o
+obj-$(CONFIG_CLK_QCOM_SM8250) += clock-sm8250.o
+obj-$(CONFIG_CLK_QCOM_SM8550) += clock-sm8550.o
+obj-$(CONFIG_CLK_QCOM_SM8650) += clock-sm8650.o
diff --git a/drivers/clk/qcom/clock-apq8016.c b/drivers/clk/qcom/clock-apq8016.c
index e6647f7..41fe4d8 100644
--- a/drivers/clk/qcom/clock-apq8016.c
+++ b/drivers/clk/qcom/clock-apq8016.c
@@ -7,7 +7,6 @@
* Based on Little Kernel driver, simplified
*/
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <errno.h>
@@ -23,11 +22,7 @@
#define APCS_CLOCK_BRANCH_ENA_VOTE (0x45004)
#define SDCC_BCR(n) ((n * 0x1000) + 0x41000)
-#define SDCC_CMD_RCGR(n) ((n * 0x1000) + 0x41004)
-#define SDCC_CFG_RCGR(n) ((n * 0x1000) + 0x41008)
-#define SDCC_M(n) ((n * 0x1000) + 0x4100C)
-#define SDCC_N(n) ((n * 0x1000) + 0x41010)
-#define SDCC_D(n) ((n * 0x1000) + 0x41014)
+#define SDCC_CMD_RCGR(n) (((n + 1) * 0x1000) + 0x41004)
#define SDCC_APPS_CBCR(n) ((n * 0x1000) + 0x41018)
#define SDCC_AHB_CBCR(n) ((n * 0x1000) + 0x4101C)
@@ -35,34 +30,14 @@
#define BLSP1_AHB_CBCR 0x1008
/* Uart clock control registers */
-#define BLSP1_UART2_BCR (0x3028)
+#define BLSP1_UART1_APPS_CBCR (0x203C)
+#define BLSP1_UART1_APPS_CMD_RCGR (0x2044)
#define BLSP1_UART2_APPS_CBCR (0x302C)
#define BLSP1_UART2_APPS_CMD_RCGR (0x3034)
-#define BLSP1_UART2_APPS_CFG_RCGR (0x3038)
-#define BLSP1_UART2_APPS_M (0x303C)
-#define BLSP1_UART2_APPS_N (0x3040)
-#define BLSP1_UART2_APPS_D (0x3044)
/* GPLL0 clock control registers */
#define GPLL0_STATUS_ACTIVE BIT(17)
-static const struct bcr_regs sdc_regs[] = {
- {
- .cfg_rcgr = SDCC_CFG_RCGR(1),
- .cmd_rcgr = SDCC_CMD_RCGR(1),
- .M = SDCC_M(1),
- .N = SDCC_N(1),
- .D = SDCC_D(1),
- },
- {
- .cfg_rcgr = SDCC_CFG_RCGR(2),
- .cmd_rcgr = SDCC_CMD_RCGR(2),
- .M = SDCC_M(2),
- .N = SDCC_N(2),
- .D = SDCC_D(2),
- }
-};
-
static struct pll_vote_clk gpll0_vote_clk = {
.status = GPLL0_STATUS,
.status_bit = GPLL0_STATUS_ACTIVE,
@@ -77,7 +52,7 @@
};
/* SDHCI */
-static int clk_init_sdc(struct msm_clk_priv *priv, int slot, uint rate)
+static int apq8016_clk_init_sdc(struct msm_clk_priv *priv, int slot, uint rate)
{
int div = 15; /* 100MHz default */
@@ -86,7 +61,7 @@
clk_enable_cbc(priv->base + SDCC_AHB_CBCR(slot));
/* 800Mhz/div, gpll0 */
- clk_rcg_set_rate_mnd(priv->base, &sdc_regs[slot], div, 0, 0,
+ clk_rcg_set_rate_mnd(priv->base, SDCC_CMD_RCGR(slot), div, 0, 0,
CFG_CLK_SRC_GPLL0, 8);
clk_enable_gpll0(priv->base, &gpll0_vote_clk);
clk_enable_cbc(priv->base + SDCC_APPS_CBCR(slot));
@@ -94,29 +69,36 @@
return rate;
}
-static const struct bcr_regs uart2_regs = {
- .cfg_rcgr = BLSP1_UART2_APPS_CFG_RCGR,
- .cmd_rcgr = BLSP1_UART2_APPS_CMD_RCGR,
- .M = BLSP1_UART2_APPS_M,
- .N = BLSP1_UART2_APPS_N,
- .D = BLSP1_UART2_APPS_D,
-};
-
/* UART: 115200 */
-int apq8016_clk_init_uart(phys_addr_t base)
+int apq8016_clk_init_uart(phys_addr_t base, unsigned long id)
{
+ u32 cmd_rcgr, apps_cbcr;
+
+ switch (id) {
+ case GCC_BLSP1_UART1_APPS_CLK:
+ cmd_rcgr = BLSP1_UART1_APPS_CMD_RCGR;
+ apps_cbcr = BLSP1_UART1_APPS_CBCR;
+ break;
+ case GCC_BLSP1_UART2_APPS_CLK:
+ cmd_rcgr = BLSP1_UART2_APPS_CMD_RCGR;
+ apps_cbcr = BLSP1_UART2_APPS_CBCR;
+ break;
+ default:
+ return 0;
+ }
+
/* Enable AHB clock */
clk_enable_vote_clk(base, &gcc_blsp1_ahb_clk);
/* 7372800 uart block clock @ GPLL0 */
- clk_rcg_set_rate_mnd(base, &uart2_regs, 1, 144, 15625,
- CFG_CLK_SRC_GPLL0, 16);
+ clk_rcg_set_rate_mnd(base, cmd_rcgr, 1, 144, 15625, CFG_CLK_SRC_GPLL0,
+ 16);
/* Vote for gpll0 clock */
clk_enable_gpll0(base, &gpll0_vote_clk);
/* Enable core clk */
- clk_enable_cbc(base + BLSP1_UART2_APPS_CBCR);
+ clk_enable_cbc(base + apps_cbcr);
return 0;
}
@@ -127,14 +109,13 @@
switch (clk->id) {
case GCC_SDCC1_APPS_CLK: /* SDC1 */
- return clk_init_sdc(priv, 0, rate);
- break;
+ return apq8016_clk_init_sdc(priv, 0, rate);
case GCC_SDCC2_APPS_CLK: /* SDC2 */
- return clk_init_sdc(priv, 1, rate);
- break;
+ return apq8016_clk_init_sdc(priv, 1, rate);
+ case GCC_BLSP1_UART1_APPS_CLK: /* UART1 */
case GCC_BLSP1_UART2_APPS_CLK: /* UART2 */
- return apq8016_clk_init_uart(priv->base);
- break;
+ apq8016_clk_init_uart(priv->base, clk->id);
+ return 7372800;
default:
return 0;
}
diff --git a/drivers/clk/qcom/clock-apq8096.c b/drivers/clk/qcom/clock-apq8096.c
index a473161..c77d691 100644
--- a/drivers/clk/qcom/clock-apq8096.c
+++ b/drivers/clk/qcom/clock-apq8096.c
@@ -7,7 +7,6 @@
* Based on Little Kernel driver, simplified
*/
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <errno.h>
@@ -26,31 +25,15 @@
#define SDCC2_APPS_CBCR (0x14004) /* branch control */
#define SDCC2_AHB_CBCR (0x14008)
#define SDCC2_CMD_RCGR (0x14010)
-#define SDCC2_CFG_RCGR (0x14014)
-#define SDCC2_M (0x14018)
-#define SDCC2_N (0x1401C)
-#define SDCC2_D (0x14020)
#define BLSP2_AHB_CBCR (0x25004)
#define BLSP2_UART2_APPS_CBCR (0x29004)
#define BLSP2_UART2_APPS_CMD_RCGR (0x2900C)
-#define BLSP2_UART2_APPS_CFG_RCGR (0x29010)
-#define BLSP2_UART2_APPS_M (0x29014)
-#define BLSP2_UART2_APPS_N (0x29018)
-#define BLSP2_UART2_APPS_D (0x2901C)
/* GPLL0 clock control registers */
#define GPLL0_STATUS_ACTIVE BIT(30)
#define APCS_GPLL_ENA_VOTE_GPLL0 BIT(0)
-static const struct bcr_regs sdc_regs = {
- .cfg_rcgr = SDCC2_CFG_RCGR,
- .cmd_rcgr = SDCC2_CMD_RCGR,
- .M = SDCC2_M,
- .N = SDCC2_N,
- .D = SDCC2_D,
-};
-
static const struct pll_vote_clk gpll0_vote_clk = {
.status = GPLL0_STATUS,
.status_bit = GPLL0_STATUS_ACTIVE,
@@ -69,7 +52,7 @@
int div = 5;
clk_enable_cbc(priv->base + SDCC2_AHB_CBCR);
- clk_rcg_set_rate_mnd(priv->base, &sdc_regs, div, 0, 0,
+ clk_rcg_set_rate_mnd(priv->base, SDCC2_CMD_RCGR, div, 0, 0,
CFG_CLK_SRC_GPLL0, 8);
clk_enable_gpll0(priv->base, &gpll0_vote_clk);
clk_enable_cbc(priv->base + SDCC2_APPS_CBCR);
@@ -77,21 +60,13 @@
return rate;
}
-static const struct bcr_regs uart2_regs = {
- .cfg_rcgr = BLSP2_UART2_APPS_CFG_RCGR,
- .cmd_rcgr = BLSP2_UART2_APPS_CMD_RCGR,
- .M = BLSP2_UART2_APPS_M,
- .N = BLSP2_UART2_APPS_N,
- .D = BLSP2_UART2_APPS_D,
-};
-
static int clk_init_uart(struct msm_clk_priv *priv)
{
/* Enable AHB clock */
clk_enable_vote_clk(priv->base, &gcc_blsp2_ahb_clk);
/* 7372800 uart block clock @ GPLL0 */
- clk_rcg_set_rate_mnd(priv->base, &uart2_regs, 1, 192, 15625,
+ clk_rcg_set_rate_mnd(priv->base, BLSP2_UART2_APPS_CMD_RCGR, 1, 192, 15625,
CFG_CLK_SRC_GPLL0, 16);
/* Vote for gpll0 clock */
diff --git a/drivers/clk/qcom/clock-ipq4019.c b/drivers/clk/qcom/clock-ipq4019.c
index d693776..0e6d93b 100644
--- a/drivers/clk/qcom/clock-ipq4019.c
+++ b/drivers/clk/qcom/clock-ipq4019.c
@@ -9,7 +9,6 @@
*/
#include <clk-uclass.h>
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <dt-bindings/clock/qcom,gcc-ipq4019.h>
@@ -21,7 +20,7 @@
switch (clk->id) {
case GCC_BLSP1_UART1_APPS_CLK: /*UART1*/
/* This clock is already initialized by SBL1 */
- return 0;
+ return 1843200;
default:
return -EINVAL;
}
diff --git a/drivers/clk/qcom/clock-qcm2290.c b/drivers/clk/qcom/clock-qcm2290.c
new file mode 100644
index 0000000..c78705c
--- /dev/null
+++ b/drivers/clk/qcom/clock-qcm2290.c
@@ -0,0 +1,192 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Clock drivers for Qualcomm qcm2290
+ *
+ * (C) Copyright 2024 Linaro Ltd.
+ */
+
+#include <clk-uclass.h>
+#include <dm.h>
+#include <linux/delay.h>
+#include <asm/io.h>
+#include <linux/bug.h>
+#include <linux/bitops.h>
+#include <dt-bindings/clock/qcom,gcc-qcm2290.h>
+
+#include "clock-qcom.h"
+
+#define QUPV3_WRAP0_S4_CMD_RCGR 0x1f608
+#define SDCC2_APPS_CLK_CMD_RCGR 0x1e00c
+
+static const struct freq_tbl ftbl_gcc_qupv3_wrap0_s0_clk_src[] = {
+ F(7372800, CFG_CLK_SRC_GPLL0_AUX2, 1, 384, 15625),
+ F(14745600, CFG_CLK_SRC_GPLL0_AUX2, 1, 768, 15625),
+ F(19200000, CFG_CLK_SRC_CXO, 1, 0, 0),
+ F(29491200, CFG_CLK_SRC_GPLL0_AUX2, 1, 1536, 15625),
+ F(32000000, CFG_CLK_SRC_GPLL0_AUX2, 1, 8, 75),
+ F(48000000, CFG_CLK_SRC_GPLL0_AUX2, 1, 4, 25),
+ F(64000000, CFG_CLK_SRC_GPLL0_AUX2, 1, 16, 75),
+ F(75000000, CFG_CLK_SRC_GPLL0_AUX2, 4, 0, 0),
+ F(80000000, CFG_CLK_SRC_GPLL0_AUX2, 1, 4, 15),
+ F(96000000, CFG_CLK_SRC_GPLL0_AUX2, 1, 8, 25),
+ F(100000000, CFG_CLK_SRC_GPLL0_AUX2, 3, 0, 0),
+ F(102400000, CFG_CLK_SRC_GPLL0_AUX2, 1, 128, 375),
+ F(112000000, CFG_CLK_SRC_GPLL0_AUX2, 1, 28, 75),
+ F(117964800, CFG_CLK_SRC_GPLL0_AUX2, 1, 6144, 15625),
+ F(120000000, CFG_CLK_SRC_GPLL0_AUX2, 2.5, 0, 0),
+ F(128000000, CFG_CLK_SRC_GPLL6, 3, 0, 0),
+ {}
+};
+
+static const struct freq_tbl ftbl_gcc_sdcc2_apps_clk_src[] = {
+ F(400000, CFG_CLK_SRC_CXO, 12, 1, 4),
+ F(19200000, CFG_CLK_SRC_CXO, 1, 0, 0),
+ F(25000000, CFG_CLK_SRC_GPLL0_AUX2, 12, 0, 0),
+ F(50000000, CFG_CLK_SRC_GPLL0_AUX2, 6, 0, 0),
+ F(100000000, CFG_CLK_SRC_GPLL0_AUX2, 3, 0, 0),
+ F(202000000, CFG_CLK_SRC_GPLL7, 4, 0, 0), // 6.5, 1, 4
+ {}
+};
+
+static const struct pll_vote_clk gpll7_clk = {
+ .status = 0x7000,
+ .status_bit = BIT(31),
+ .ena_vote = 0x79000,
+ .vote_bit = BIT(7),
+};
+
+static const struct gate_clk qcm2290_clks[] = {
+ GATE_CLK(GCC_AHB2PHY_USB_CLK, 0x1d008, 0x00000001),
+ GATE_CLK(GCC_CFG_NOC_USB3_PRIM_AXI_CLK, 0x1a084, 0x00000001),
+ GATE_CLK(GCC_QUPV3_WRAP0_CORE_2X_CLK, 0x7900c, 0x00000200),
+ GATE_CLK(GCC_QUPV3_WRAP0_CORE_CLK, 0x7900c, 0x00000100),
+ GATE_CLK(GCC_QUPV3_WRAP0_S0_CLK, 0x7900c, 0x00000400),
+ GATE_CLK(GCC_QUPV3_WRAP0_S1_CLK, 0x7900c, 0x00000800),
+ GATE_CLK(GCC_QUPV3_WRAP0_S2_CLK, 0x7900c, 0x00001000),
+ GATE_CLK(GCC_QUPV3_WRAP0_S3_CLK, 0x7900c, 0x00002000),
+ GATE_CLK(GCC_QUPV3_WRAP0_S4_CLK, 0x7900c, 0x00004000),
+ GATE_CLK(GCC_QUPV3_WRAP0_S5_CLK, 0x7900c, 0x00008000),
+ GATE_CLK(GCC_QUPV3_WRAP_0_M_AHB_CLK, 0x7900c, 0x00000040),
+ GATE_CLK(GCC_QUPV3_WRAP_0_S_AHB_CLK, 0x7900c, 0x00000080),
+ GATE_CLK(GCC_SDCC1_AHB_CLK, 0x38008, 0x00000001),
+ GATE_CLK(GCC_SDCC1_APPS_CLK, 0x38004, 0x00000001),
+ GATE_CLK(GCC_SDCC1_ICE_CORE_CLK, 0x3800c, 0x00000001),
+ GATE_CLK(GCC_SDCC2_AHB_CLK, 0x1e008, 0x00000001),
+ GATE_CLK(GCC_SDCC2_APPS_CLK, 0x1e004, 0x00000001),
+ GATE_CLK(GCC_SYS_NOC_CPUSS_AHB_CLK, 0x79004, 0x00000001),
+ GATE_CLK(GCC_SYS_NOC_USB3_PRIM_AXI_CLK, 0x1a080, 0x00000001),
+ GATE_CLK(GCC_USB30_PRIM_MASTER_CLK, 0x1a010, 0x00000001),
+ GATE_CLK(GCC_USB30_PRIM_MOCK_UTMI_CLK, 0x1a018, 0x00000001),
+ GATE_CLK(GCC_USB30_PRIM_SLEEP_CLK, 0x1a014, 0x00000001),
+ GATE_CLK(GCC_USB3_PRIM_CLKREF_CLK, 0x9f000, 0x00000001),
+ GATE_CLK(GCC_USB3_PRIM_PHY_COM_AUX_CLK, 0x1a054, 0x00000001),
+ GATE_CLK(GCC_USB3_PRIM_PHY_PIPE_CLK, 0x1a058, 0x00000001),
+};
+
+static ulong qcm2290_set_rate(struct clk *clk, ulong rate)
+{
+ struct msm_clk_priv *priv = dev_get_priv(clk->dev);
+ const struct freq_tbl *freq;
+
+ debug("%s: clk %s rate %lu\n", __func__, clk->dev->name, rate);
+
+ switch (clk->id) {
+ case GCC_QUPV3_WRAP0_S4_CLK: /*UART2*/
+ freq = qcom_find_freq(ftbl_gcc_qupv3_wrap0_s0_clk_src, rate);
+ clk_rcg_set_rate_mnd(priv->base, QUPV3_WRAP0_S4_CMD_RCGR,
+ freq->pre_div, freq->m, freq->n, freq->src,
+ 16);
+ return 0;
+ case GCC_SDCC2_APPS_CLK:
+ /* Enable GPLL7 so we can point SDCC2_APPS_CLK_SRC RCG at it */
+ clk_enable_gpll0(priv->base, &gpll7_clk);
+ freq = qcom_find_freq(ftbl_gcc_sdcc2_apps_clk_src, rate);
+ WARN(freq->src != CFG_CLK_SRC_GPLL7,
+ "SDCC2_APPS_CLK_SRC not set to GPLL7, requested rate %lu\n",
+ rate);
+ clk_rcg_set_rate_mnd(priv->base, SDCC2_APPS_CLK_CMD_RCGR,
+ freq->pre_div, freq->m, freq->n, freq->src,
+ 8);
+ return freq->freq;
+ case GCC_SDCC1_APPS_CLK:
+ /* The firmware turns this on for us and always sets it to this rate */
+ return 384000000;
+ default:
+ return 0;
+ }
+}
+
+static int qcm2290_enable(struct clk *clk)
+{
+ struct msm_clk_priv *priv = dev_get_priv(clk->dev);
+
+ if (priv->data->num_clks < clk->id) {
+ debug("%s: unknown clk id %lu\n", __func__, clk->id);
+ return 0;
+ }
+
+ debug("%s: clk %s\n", __func__, qcm2290_clks[clk->id].name);
+
+ switch (clk->id) {
+ case GCC_USB30_PRIM_MASTER_CLK:
+ qcom_gate_clk_en(priv, GCC_USB3_PRIM_PHY_COM_AUX_CLK);
+ qcom_gate_clk_en(priv, GCC_USB3_PRIM_CLKREF_CLK);
+ break;
+ }
+
+ qcom_gate_clk_en(priv, clk->id);
+
+ return 0;
+}
+
+static const struct qcom_reset_map qcm2290_gcc_resets[] = {
+ [GCC_CAMSS_OPE_BCR] = { 0x55000 },
+ [GCC_CAMSS_TFE_BCR] = { 0x52000 },
+ [GCC_CAMSS_TOP_BCR] = { 0x58000 },
+ [GCC_GPU_BCR] = { 0x36000 },
+ [GCC_MMSS_BCR] = { 0x17000 },
+ [GCC_PDM_BCR] = { 0x20000 },
+ [GCC_QUPV3_WRAPPER_0_BCR] = { 0x1f000 },
+ [GCC_QUSB2PHY_PRIM_BCR] = { 0x1c000 },
+ [GCC_SDCC1_BCR] = { 0x38000 },
+ [GCC_SDCC2_BCR] = { 0x1e000 },
+ [GCC_USB30_PRIM_BCR] = { 0x1a000 },
+ [GCC_USB3_PHY_PRIM_SP0_BCR] = { 0x1b000 },
+ [GCC_USB3PHY_PHY_PRIM_SP0_BCR] = { 0x1b008 },
+ [GCC_USB_PHY_CFG_AHB2PHY_BCR] = { 0x1d000 },
+ [GCC_VCODEC0_BCR] = { 0x58094 },
+ [GCC_VENUS_BCR] = { 0x58078 },
+ [GCC_VIDEO_INTERFACE_BCR] = { 0x6e000 },
+};
+
+static const struct qcom_power_map qcm2290_gdscs[] = {
+ [GCC_USB30_PRIM_GDSC] = { 0x1a004 },
+};
+
+static struct msm_clk_data qcm2290_gcc_data = {
+ .resets = qcm2290_gcc_resets,
+ .num_resets = ARRAY_SIZE(qcm2290_gcc_resets),
+ .clks = qcm2290_clks,
+ .num_clks = ARRAY_SIZE(qcm2290_clks),
+ .power_domains = qcm2290_gdscs,
+ .num_power_domains = ARRAY_SIZE(qcm2290_gdscs),
+
+ .enable = qcm2290_enable,
+ .set_rate = qcm2290_set_rate,
+};
+
+static const struct udevice_id gcc_qcm2290_of_match[] = {
+ {
+ .compatible = "qcom,gcc-qcm2290",
+ .data = (ulong)&qcm2290_gcc_data,
+ },
+ {}
+};
+
+U_BOOT_DRIVER(gcc_qcm2290) = {
+ .name = "gcc_qcm2290",
+ .id = UCLASS_NOP,
+ .of_match = gcc_qcm2290_of_match,
+ .bind = qcom_cc_bind,
+ .flags = DM_FLAG_PRE_RELOC,
+};
diff --git a/drivers/clk/qcom/clock-qcom.c b/drivers/clk/qcom/clock-qcom.c
index 729d190..3a9cf2a 100644
--- a/drivers/clk/qcom/clock-qcom.c
+++ b/drivers/clk/qcom/clock-qcom.c
@@ -12,7 +12,6 @@
* Based on Little Kernel driver, simplified
*/
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <dm/device-internal.h>
@@ -22,7 +21,9 @@
#include <linux/bug.h>
#include <linux/delay.h>
#include <linux/bitops.h>
+#include <linux/iopoll.h>
#include <reset-uclass.h>
+#include <power-domain-uclass.h>
#include "clock-qcom.h"
@@ -30,6 +31,13 @@
#define CBCR_BRANCH_ENABLE_BIT BIT(0)
#define CBCR_BRANCH_OFF_BIT BIT(31)
+#define GDSC_SW_COLLAPSE_MASK BIT(0)
+#define GDSC_POWER_DOWN_COMPLETE BIT(15)
+#define GDSC_POWER_UP_COMPLETE BIT(16)
+#define GDSC_PWR_ON_MASK BIT(31)
+#define CFG_GDSCR_OFFSET 0x4
+#define GDSC_STATUS_POLL_TIMEOUT_US 1500
+
/* Enable clock controlled by CBC soft macro */
void clk_enable_cbc(phys_addr_t cbcr)
{
@@ -95,7 +103,7 @@
* root set rate for clocks with half integer and MND divider
* div should be pre-calculated ((div * 2) - 1)
*/
-void clk_rcg_set_rate_mnd(phys_addr_t base, const struct bcr_regs *regs,
+void clk_rcg_set_rate_mnd(phys_addr_t base, uint32_t cmd_rcgr,
int div, int m, int n, int source, u8 mnd_width)
{
u32 cfg;
@@ -111,12 +119,12 @@
debug("m %#x n %#x d %#x div %#x mask %#x\n", m_val, n_val, d_val, div, mask);
/* Program MND values */
- writel(m_val & mask, base + regs->M);
- writel(n_val & mask, base + regs->N);
- writel(d_val & mask, base + regs->D);
+ writel(m_val & mask, base + cmd_rcgr + RCG_M_REG);
+ writel(n_val & mask, base + cmd_rcgr + RCG_N_REG);
+ writel(d_val & mask, base + cmd_rcgr + RCG_D_REG);
/* setup src select and divider */
- cfg = readl(base + regs->cfg_rcgr);
+ cfg = readl(base + cmd_rcgr + RCG_CFG_REG);
cfg &= ~(CFG_SRC_SEL_MASK | CFG_MODE_MASK | CFG_HW_CLK_CTRL_MASK |
CFG_SRC_DIV_MASK);
cfg |= source & CFG_SRC_SEL_MASK; /* Select clock source */
@@ -127,20 +135,20 @@
if (n && n != m)
cfg |= CFG_MODE_DUAL_EDGE;
- writel(cfg, base + regs->cfg_rcgr); /* Write new clock configuration */
+ writel(cfg, base + cmd_rcgr + RCG_CFG_REG); /* Write new clock configuration */
/* Inform h/w to start using the new config. */
- clk_bcr_update(base + regs->cmd_rcgr);
+ clk_bcr_update(base + cmd_rcgr);
}
/* root set rate for clocks with half integer and mnd_width=0 */
-void clk_rcg_set_rate(phys_addr_t base, const struct bcr_regs *regs, int div,
+void clk_rcg_set_rate(phys_addr_t base, uint32_t cmd_rcgr, int div,
int source)
{
u32 cfg;
/* setup src select and divider */
- cfg = readl(base + regs->cfg_rcgr);
+ cfg = readl(base + cmd_rcgr + RCG_CFG_REG);
cfg &= ~(CFG_SRC_SEL_MASK | CFG_MODE_MASK | CFG_HW_CLK_CTRL_MASK);
cfg |= source & CFG_CLK_SRC_MASK; /* Select clock source */
@@ -151,10 +159,10 @@
if (div)
cfg |= (2 * div - 1) & CFG_SRC_DIV_MASK;
- writel(cfg, base + regs->cfg_rcgr); /* Write new clock configuration */
+ writel(cfg, base + cmd_rcgr + RCG_CFG_REG); /* Write new clock configuration */
/* Inform h/w to start using the new config. */
- clk_bcr_update(base + regs->cmd_rcgr);
+ clk_bcr_update(base + cmd_rcgr);
}
const struct freq_tbl *qcom_find_freq(const struct freq_tbl *f, uint rate)
@@ -218,12 +226,13 @@
.ops = &msm_clk_ops,
.priv_auto = sizeof(struct msm_clk_priv),
.probe = msm_clk_probe,
+ .flags = DM_FLAG_PRE_RELOC | DM_FLAG_DEFAULT_PD_CTRL_OFF,
};
int qcom_cc_bind(struct udevice *parent)
{
struct msm_clk_data *data = (struct msm_clk_data *)dev_get_driver_data(parent);
- struct udevice *clkdev, *rstdev;
+ struct udevice *clkdev = NULL, *rstdev = NULL, *pwrdev;
struct driver *drv;
int ret;
@@ -238,20 +247,41 @@
if (ret)
return ret;
- /* Bail out early if resets are not specified for this platform */
- if (!data->resets)
- return ret;
+ if (data->resets) {
+ /* Get a handle to the common reset handler */
+ drv = lists_driver_lookup_name("qcom_reset");
+ if (!drv) {
+ ret = -ENOENT;
+ goto unbind_clkdev;
+ }
- /* Get a handle to the common reset handler */
- drv = lists_driver_lookup_name("qcom_reset");
- if (!drv)
- return -ENOENT;
+ /* Register the reset controller */
+ ret = device_bind_with_driver_data(parent, drv, "qcom_reset", (ulong)data,
+ dev_ofnode(parent), &rstdev);
+ if (ret)
+ goto unbind_clkdev;
+ }
- /* Register the reset controller */
- ret = device_bind_with_driver_data(parent, drv, "qcom_reset", (ulong)data,
- dev_ofnode(parent), &rstdev);
- if (ret)
- device_unbind(clkdev);
+ if (data->power_domains) {
+ /* Get a handle to the common power domain handler */
+ drv = lists_driver_lookup_name("qcom_power");
+ if (!drv) {
+ ret = -ENOENT;
+ goto unbind_rstdev;
+ }
+ /* Register the power domain controller */
+ ret = device_bind_with_driver_data(parent, drv, "qcom_power", (ulong)data,
+ dev_ofnode(parent), &pwrdev);
+ if (ret)
+ goto unbind_rstdev;
+ }
+
+ return 0;
+
+unbind_rstdev:
+ device_unbind(rstdev);
+unbind_clkdev:
+ device_unbind(clkdev);
return ret;
}
@@ -306,3 +336,80 @@
.ops = &qcom_reset_ops,
.probe = qcom_reset_probe,
};
+
+static int qcom_power_set(struct power_domain *pwr, bool on)
+{
+ struct msm_clk_data *data = (struct msm_clk_data *)dev_get_driver_data(pwr->dev);
+ void __iomem *base = dev_get_priv(pwr->dev);
+ const struct qcom_power_map *map;
+ u32 value;
+ int ret;
+
+ if (pwr->id >= data->num_power_domains)
+ return -ENODEV;
+
+ map = &data->power_domains[pwr->id];
+
+ if (!map->reg)
+ return -ENODEV;
+
+ value = readl(base + map->reg);
+
+ if (on)
+ value &= ~GDSC_SW_COLLAPSE_MASK;
+ else
+ value |= GDSC_SW_COLLAPSE_MASK;
+
+ writel(value, base + map->reg);
+
+ if (on)
+ ret = readl_poll_timeout(base + map->reg + CFG_GDSCR_OFFSET,
+ value,
+ (value & GDSC_POWER_UP_COMPLETE) ||
+ (value & GDSC_PWR_ON_MASK),
+ GDSC_STATUS_POLL_TIMEOUT_US);
+
+ else
+ ret = readl_poll_timeout(base + map->reg + CFG_GDSCR_OFFSET,
+ value,
+ (value & GDSC_POWER_DOWN_COMPLETE) ||
+ !(value & GDSC_PWR_ON_MASK),
+ GDSC_STATUS_POLL_TIMEOUT_US);
+
+
+ if (ret == -ETIMEDOUT)
+ printf("WARNING: GDSC %lu is stuck during power on/off\n",
+ pwr->id);
+ return ret;
+}
+
+static int qcom_power_on(struct power_domain *pwr)
+{
+ return qcom_power_set(pwr, true);
+}
+
+static int qcom_power_off(struct power_domain *pwr)
+{
+ return qcom_power_set(pwr, false);
+}
+
+static const struct power_domain_ops qcom_power_ops = {
+ .on = qcom_power_on,
+ .off = qcom_power_off,
+};
+
+static int qcom_power_probe(struct udevice *dev)
+{
+ /* Set our priv pointer to the base address */
+ dev_set_priv(dev, (void *)dev_read_addr(dev));
+
+ return 0;
+}
+
+U_BOOT_DRIVER(qcom_power) = {
+ .name = "qcom_power",
+ .id = UCLASS_POWER_DOMAIN,
+ .ops = &qcom_power_ops,
+ .probe = qcom_power_probe,
+ .flags = DM_FLAG_PRE_RELOC,
+};
diff --git a/drivers/clk/qcom/clock-qcom.h b/drivers/clk/qcom/clock-qcom.h
index 01088c1..f6445c8 100644
--- a/drivers/clk/qcom/clock-qcom.h
+++ b/drivers/clk/qcom/clock-qcom.h
@@ -9,9 +9,19 @@
#define CFG_CLK_SRC_CXO (0 << 8)
#define CFG_CLK_SRC_GPLL0 (1 << 8)
+#define CFG_CLK_SRC_GPLL0_AUX2 (2 << 8)
+#define CFG_CLK_SRC_GPLL9 (2 << 8)
+#define CFG_CLK_SRC_GPLL6 (4 << 8)
+#define CFG_CLK_SRC_GPLL7 (3 << 8)
+#define CFG_CLK_SRC_GPLL4 (5 << 8)
#define CFG_CLK_SRC_GPLL0_EVEN (6 << 8)
#define CFG_CLK_SRC_MASK (7 << 8)
+#define RCG_CFG_REG 0x4
+#define RCG_M_REG 0x8
+#define RCG_N_REG 0xc
+#define RCG_D_REG 0x10
+
struct pll_vote_clk {
uintptr_t status;
int status_bit;
@@ -24,13 +34,6 @@
uintptr_t ena_vote;
int vote_bit;
};
-struct bcr_regs {
- uintptr_t cfg_rcgr;
- uintptr_t cmd_rcgr;
- uintptr_t M;
- uintptr_t N;
- uintptr_t D;
-};
struct freq_tbl {
uint freq;
@@ -59,9 +62,15 @@
u8 bit;
};
+struct qcom_power_map {
+ unsigned int reg;
+};
+
struct clk;
struct msm_clk_data {
+ const struct qcom_power_map *power_domains;
+ unsigned long num_power_domains;
const struct qcom_reset_map *resets;
unsigned long num_resets;
const struct gate_clk *clks;
@@ -82,9 +91,9 @@
void clk_enable_cbc(phys_addr_t cbcr);
void clk_enable_vote_clk(phys_addr_t base, const struct vote_clk *vclk);
const struct freq_tbl *qcom_find_freq(const struct freq_tbl *f, uint rate);
-void clk_rcg_set_rate_mnd(phys_addr_t base, const struct bcr_regs *regs,
+void clk_rcg_set_rate_mnd(phys_addr_t base, uint32_t cmd_rcgr,
int div, int m, int n, int source, u8 mnd_width);
-void clk_rcg_set_rate(phys_addr_t base, const struct bcr_regs *regs, int div,
+void clk_rcg_set_rate(phys_addr_t base, uint32_t cmd_rcgr, int div,
int source);
static inline void qcom_gate_clk_en(const struct msm_clk_priv *priv, unsigned long id)
diff --git a/drivers/clk/qcom/clock-qcs404.c b/drivers/clk/qcom/clock-qcs404.c
index 958312b..70a1f64 100644
--- a/drivers/clk/qcom/clock-qcs404.c
+++ b/drivers/clk/qcom/clock-qcs404.c
@@ -5,7 +5,6 @@
* (C) Copyright 2022 Sumit Garg <sumit.garg@linaro.org>
*/
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <errno.h>
@@ -28,35 +27,22 @@
#define BLSP1_UART2_BCR (0x3028)
#define BLSP1_UART2_APPS_CBCR (0x302C)
#define BLSP1_UART2_APPS_CMD_RCGR (0x3034)
-#define BLSP1_UART2_APPS_CFG_RCGR (0x3038)
-#define BLSP1_UART2_APPS_M (0x303C)
-#define BLSP1_UART2_APPS_N (0x3040)
-#define BLSP1_UART2_APPS_D (0x3044)
/* I2C controller clock control registerss */
#define BLSP1_QUP0_I2C_APPS_CBCR (0x6028)
#define BLSP1_QUP0_I2C_APPS_CMD_RCGR (0x602C)
-#define BLSP1_QUP0_I2C_APPS_CFG_RCGR (0x6030)
#define BLSP1_QUP1_I2C_APPS_CBCR (0x2008)
#define BLSP1_QUP1_I2C_APPS_CMD_RCGR (0x200C)
-#define BLSP1_QUP1_I2C_APPS_CFG_RCGR (0x2010)
#define BLSP1_QUP2_I2C_APPS_CBCR (0x3010)
#define BLSP1_QUP2_I2C_APPS_CMD_RCGR (0x3000)
-#define BLSP1_QUP2_I2C_APPS_CFG_RCGR (0x3004)
#define BLSP1_QUP3_I2C_APPS_CBCR (0x4020)
#define BLSP1_QUP3_I2C_APPS_CMD_RCGR (0x4000)
-#define BLSP1_QUP3_I2C_APPS_CFG_RCGR (0x4004)
#define BLSP1_QUP4_I2C_APPS_CBCR (0x5020)
#define BLSP1_QUP4_I2C_APPS_CMD_RCGR (0x5000)
-#define BLSP1_QUP4_I2C_APPS_CFG_RCGR (0x5004)
/* SD controller clock control registers */
#define SDCC_BCR(n) (((n) * 0x1000) + 0x41000)
-#define SDCC_CMD_RCGR(n) (((n) * 0x1000) + 0x41004)
-#define SDCC_CFG_RCGR(n) (((n) * 0x1000) + 0x41008)
-#define SDCC_M(n) (((n) * 0x1000) + 0x4100C)
-#define SDCC_N(n) (((n) * 0x1000) + 0x41010)
-#define SDCC_D(n) (((n) * 0x1000) + 0x41014)
+#define SDCC_CMD_RCGR(n) (((n + 1) * 0x1000) + 0x41004)
#define SDCC_APPS_CBCR(n) (((n) * 0x1000) + 0x41018)
#define SDCC_AHB_CBCR(n) (((n) * 0x1000) + 0x4101C)
@@ -70,10 +56,6 @@
#define USB30_MOCK_UTMI_CMD_RCGR (0x3901C)
#define USB30_MOCK_UTMI_CFG_RCGR (0x39020)
#define USB30_MASTER_CMD_RCGR (0x39028)
-#define USB30_MASTER_CFG_RCGR (0x3902C)
-#define USB30_MASTER_M (0x39030)
-#define USB30_MASTER_N (0x39034)
-#define USB30_MASTER_D (0x39038)
#define USB2A_PHY_SLEEP_CBCR (0x4102C)
#define USB_HS_PHY_CFG_AHB_CBCR (0x41030)
@@ -83,12 +65,7 @@
#define ETH_SLAVE_AHB_CBCR (0x4e00c)
#define ETH_AXI_CBCR (0x4e010)
#define EMAC_PTP_CMD_RCGR (0x4e014)
-#define EMAC_PTP_CFG_RCGR (0x4e018)
#define EMAC_CMD_RCGR (0x4e01c)
-#define EMAC_CFG_RCGR (0x4e020)
-#define EMAC_M (0x4e024)
-#define EMAC_N (0x4e028)
-#define EMAC_D (0x4e02c)
/* GPLL0 clock control registers */
@@ -103,22 +80,6 @@
.vote_bit = BIT(10) | BIT(5) | BIT(4),
};
-static const struct bcr_regs uart2_regs = {
- .cfg_rcgr = BLSP1_UART2_APPS_CFG_RCGR,
- .cmd_rcgr = BLSP1_UART2_APPS_CMD_RCGR,
- .M = BLSP1_UART2_APPS_M,
- .N = BLSP1_UART2_APPS_N,
- .D = BLSP1_UART2_APPS_D,
-};
-
-static const struct bcr_regs sdc_regs = {
- .cfg_rcgr = SDCC_CFG_RCGR(1),
- .cmd_rcgr = SDCC_CMD_RCGR(1),
- .M = SDCC_M(1),
- .N = SDCC_N(1),
- .D = SDCC_D(1),
-};
-
static struct pll_vote_clk gpll0_vote_clk = {
.status = GPLL0_STATUS,
.status_bit = GPLL0_STATUS_ACTIVE,
@@ -133,60 +94,6 @@
.vote_bit = BIT(1),
};
-static const struct bcr_regs usb30_master_regs = {
- .cfg_rcgr = USB30_MASTER_CFG_RCGR,
- .cmd_rcgr = USB30_MASTER_CMD_RCGR,
- .M = USB30_MASTER_M,
- .N = USB30_MASTER_N,
- .D = USB30_MASTER_D,
-};
-
-static const struct bcr_regs emac_regs = {
- .cfg_rcgr = EMAC_CFG_RCGR,
- .cmd_rcgr = EMAC_CMD_RCGR,
- .M = EMAC_M,
- .N = EMAC_N,
- .D = EMAC_D,
-};
-
-static const struct bcr_regs emac_ptp_regs = {
- .cfg_rcgr = EMAC_PTP_CFG_RCGR,
- .cmd_rcgr = EMAC_PTP_CMD_RCGR,
- .M = EMAC_M,
- .N = EMAC_N,
- .D = EMAC_D,
-};
-
-static const struct bcr_regs blsp1_qup0_i2c_apps_regs = {
- .cmd_rcgr = BLSP1_QUP0_I2C_APPS_CMD_RCGR,
- .cfg_rcgr = BLSP1_QUP0_I2C_APPS_CFG_RCGR,
- /* mnd_width = 0 */
-};
-
-static const struct bcr_regs blsp1_qup1_i2c_apps_regs = {
- .cmd_rcgr = BLSP1_QUP1_I2C_APPS_CMD_RCGR,
- .cfg_rcgr = BLSP1_QUP1_I2C_APPS_CFG_RCGR,
- /* mnd_width = 0 */
-};
-
-static const struct bcr_regs blsp1_qup2_i2c_apps_regs = {
- .cmd_rcgr = BLSP1_QUP2_I2C_APPS_CMD_RCGR,
- .cfg_rcgr = BLSP1_QUP2_I2C_APPS_CFG_RCGR,
- /* mnd_width = 0 */
-};
-
-static const struct bcr_regs blsp1_qup3_i2c_apps_regs = {
- .cmd_rcgr = BLSP1_QUP3_I2C_APPS_CMD_RCGR,
- .cfg_rcgr = BLSP1_QUP3_I2C_APPS_CFG_RCGR,
- /* mnd_width = 0 */
-};
-
-static const struct bcr_regs blsp1_qup4_i2c_apps_regs = {
- .cmd_rcgr = BLSP1_QUP4_I2C_APPS_CMD_RCGR,
- .cfg_rcgr = BLSP1_QUP4_I2C_APPS_CFG_RCGR,
- /* mnd_width = 0 */
-};
-
static ulong qcs404_clk_set_rate(struct clk *clk, ulong rate)
{
struct msm_clk_priv *priv = dev_get_priv(clk->dev);
@@ -194,29 +101,29 @@
switch (clk->id) {
case GCC_BLSP1_UART2_APPS_CLK:
/* UART: 1843200Hz for a fixed 115200 baudrate (19200000 * (12/125)) */
- clk_rcg_set_rate_mnd(priv->base, &uart2_regs, 0, 12, 125,
+ clk_rcg_set_rate_mnd(priv->base, BLSP1_UART2_APPS_CMD_RCGR, 0, 12, 125,
CFG_CLK_SRC_CXO, 16);
clk_enable_cbc(priv->base + BLSP1_UART2_APPS_CBCR);
return 1843200;
case GCC_SDCC1_APPS_CLK:
/* SDCC1: 200MHz */
- clk_rcg_set_rate_mnd(priv->base, &sdc_regs, 7, 0, 0,
+ clk_rcg_set_rate_mnd(priv->base, SDCC_CMD_RCGR(0), 7, 0, 0,
CFG_CLK_SRC_GPLL0, 8);
clk_enable_gpll0(priv->base, &gpll0_vote_clk);
clk_enable_cbc(priv->base + SDCC_APPS_CBCR(1));
return rate;
case GCC_ETH_RGMII_CLK:
if (rate == 250000000)
- clk_rcg_set_rate_mnd(priv->base, &emac_regs, 3, 0, 0,
+ clk_rcg_set_rate_mnd(priv->base, EMAC_CMD_RCGR, 3, 0, 0,
CFG_CLK_SRC_GPLL1, 8);
else if (rate == 125000000)
- clk_rcg_set_rate_mnd(priv->base, &emac_regs, 7, 0, 0,
+ clk_rcg_set_rate_mnd(priv->base, EMAC_CMD_RCGR, 7, 0, 0,
CFG_CLK_SRC_GPLL1, 8);
else if (rate == 50000000)
- clk_rcg_set_rate_mnd(priv->base, &emac_regs, 19, 0, 0,
+ clk_rcg_set_rate_mnd(priv->base, EMAC_CMD_RCGR, 19, 0, 0,
CFG_CLK_SRC_GPLL1, 8);
else if (rate == 5000000)
- clk_rcg_set_rate_mnd(priv->base, &emac_regs, 3, 1, 50,
+ clk_rcg_set_rate_mnd(priv->base, EMAC_CMD_RCGR, 3, 1, 50,
CFG_CLK_SRC_GPLL1, 8);
return rate;
}
@@ -237,7 +144,7 @@
switch (clk->id) {
case GCC_USB30_MASTER_CLK:
clk_enable_cbc(priv->base + USB30_MASTER_CBCR);
- clk_rcg_set_rate_mnd(priv->base, &usb30_master_regs, 7, 0, 0,
+ clk_rcg_set_rate_mnd(priv->base, USB30_MASTER_CMD_RCGR, 7, 0, 0,
CFG_CLK_SRC_GPLL0, 8);
break;
case GCC_SYS_NOC_USB3_CLK:
@@ -259,14 +166,14 @@
/* SPEED_1000: freq -> 250MHz */
clk_enable_cbc(priv->base + ETH_PTP_CBCR);
clk_enable_gpll0(priv->base, &gpll1_vote_clk);
- clk_rcg_set_rate_mnd(priv->base, &emac_ptp_regs, 3, 0, 0,
+ clk_rcg_set_rate_mnd(priv->base, EMAC_PTP_CMD_RCGR, 3, 0, 0,
CFG_CLK_SRC_GPLL1, 8);
break;
case GCC_ETH_RGMII_CLK:
/* SPEED_1000: freq -> 250MHz */
clk_enable_cbc(priv->base + ETH_RGMII_CBCR);
clk_enable_gpll0(priv->base, &gpll1_vote_clk);
- clk_rcg_set_rate_mnd(priv->base, &emac_regs, 3, 0, 0,
+ clk_rcg_set_rate_mnd(priv->base, EMAC_CMD_RCGR, 3, 0, 0,
CFG_CLK_SRC_GPLL1, 8);
break;
case GCC_ETH_SLAVE_AHB_CLK:
@@ -280,27 +187,27 @@
break;
case GCC_BLSP1_QUP0_I2C_APPS_CLK:
clk_enable_cbc(priv->base + BLSP1_QUP0_I2C_APPS_CBCR);
- clk_rcg_set_rate(priv->base, &blsp1_qup0_i2c_apps_regs, 0,
+ clk_rcg_set_rate(priv->base, BLSP1_QUP0_I2C_APPS_CMD_RCGR, 0,
CFG_CLK_SRC_CXO);
break;
case GCC_BLSP1_QUP1_I2C_APPS_CLK:
clk_enable_cbc(priv->base + BLSP1_QUP1_I2C_APPS_CBCR);
- clk_rcg_set_rate(priv->base, &blsp1_qup1_i2c_apps_regs, 0,
+ clk_rcg_set_rate(priv->base, BLSP1_QUP1_I2C_APPS_CMD_RCGR, 0,
CFG_CLK_SRC_CXO);
break;
case GCC_BLSP1_QUP2_I2C_APPS_CLK:
clk_enable_cbc(priv->base + BLSP1_QUP2_I2C_APPS_CBCR);
- clk_rcg_set_rate(priv->base, &blsp1_qup2_i2c_apps_regs, 0,
+ clk_rcg_set_rate(priv->base, BLSP1_QUP2_I2C_APPS_CMD_RCGR, 0,
CFG_CLK_SRC_CXO);
break;
case GCC_BLSP1_QUP3_I2C_APPS_CLK:
clk_enable_cbc(priv->base + BLSP1_QUP3_I2C_APPS_CBCR);
- clk_rcg_set_rate(priv->base, &blsp1_qup3_i2c_apps_regs, 0,
+ clk_rcg_set_rate(priv->base, BLSP1_QUP3_I2C_APPS_CMD_RCGR, 0,
CFG_CLK_SRC_CXO);
break;
case GCC_BLSP1_QUP4_I2C_APPS_CLK:
clk_enable_cbc(priv->base + BLSP1_QUP4_I2C_APPS_CBCR);
- clk_rcg_set_rate(priv->base, &blsp1_qup4_i2c_apps_regs, 0,
+ clk_rcg_set_rate(priv->base, BLSP1_QUP4_I2C_APPS_CMD_RCGR, 0,
CFG_CLK_SRC_CXO);
break;
case GCC_SDCC1_AHB_CLK:
diff --git a/drivers/clk/qcom/clock-sdm845.c b/drivers/clk/qcom/clock-sdm845.c
index 36ffee7..f41f8c9 100644
--- a/drivers/clk/qcom/clock-sdm845.c
+++ b/drivers/clk/qcom/clock-sdm845.c
@@ -8,7 +8,6 @@
* Based on Little Kernel driver, simplified
*/
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <linux/delay.h>
@@ -19,13 +18,12 @@
#include "clock-qcom.h"
-#define SE9_AHB_CBCR 0x25004
-#define SE9_UART_APPS_CBCR 0x29004
#define SE9_UART_APPS_CMD_RCGR 0x18148
-#define SE9_UART_APPS_CFG_RCGR 0x1814C
-#define SE9_UART_APPS_M 0x18150
-#define SE9_UART_APPS_N 0x18154
-#define SE9_UART_APPS_D 0x18158
+
+#define USB30_PRIM_MASTER_CLK_CMD_RCGR 0xf018
+#define USB30_PRIM_MOCK_UTMI_CLK_CMD_RCGR 0xf030
+#define USB3_PRIM_PHY_AUX_CMD_RCGR 0xf05c
+#define SDCC2_APPS_CLK_CMD_RCGR 0x1400c
static const struct freq_tbl ftbl_gcc_qupv3_wrap0_s0_clk_src[] = {
F(7372800, CFG_CLK_SRC_GPLL0_EVEN, 1, 384, 15625),
@@ -46,12 +44,15 @@
{ }
};
-static const struct bcr_regs uart2_regs = {
- .cfg_rcgr = SE9_UART_APPS_CFG_RCGR,
- .cmd_rcgr = SE9_UART_APPS_CMD_RCGR,
- .M = SE9_UART_APPS_M,
- .N = SE9_UART_APPS_N,
- .D = SE9_UART_APPS_D,
+static const struct freq_tbl ftbl_gcc_sdcc2_apps_clk_src[] = {
+ F(400000, CFG_CLK_SRC_CXO, 12, 1, 4),
+ F(9600000, CFG_CLK_SRC_CXO, 2, 0, 0),
+ F(19200000, CFG_CLK_SRC_CXO, 1, 0, 0),
+ F(25000000, CFG_CLK_SRC_GPLL0_EVEN, 12, 0, 0),
+ F(50000000, CFG_CLK_SRC_GPLL0_EVEN, 6, 0, 0),
+ F(100000000, CFG_CLK_SRC_GPLL0, 6, 0, 0),
+ F(201500000, CFG_CLK_SRC_GPLL4, 4, 0, 0),
+ { }
};
static ulong sdm845_clk_set_rate(struct clk *clk, ulong rate)
@@ -62,15 +63,22 @@
switch (clk->id) {
case GCC_QUPV3_WRAP1_S1_CLK: /* UART9 */
freq = qcom_find_freq(ftbl_gcc_qupv3_wrap0_s0_clk_src, rate);
- clk_rcg_set_rate_mnd(priv->base, &uart2_regs,
+ clk_rcg_set_rate_mnd(priv->base, SE9_UART_APPS_CMD_RCGR,
freq->pre_div, freq->m, freq->n, freq->src, 16);
return freq->freq;
+ case GCC_SDCC2_APPS_CLK:
+ freq = qcom_find_freq(ftbl_gcc_sdcc2_apps_clk_src, rate);
+ clk_rcg_set_rate_mnd(priv->base, SDCC2_APPS_CLK_CMD_RCGR,
+ freq->pre_div, freq->m, freq->n, freq->src, 8);
+ return freq->freq;
default:
return 0;
}
}
static const struct gate_clk sdm845_clks[] = {
+ GATE_CLK(GCC_AGGRE_USB3_SEC_AXI_CLK, 0x82020, 0x00000001),
+ GATE_CLK(GCC_CFG_NOC_USB3_SEC_AXI_CLK, 0x05030, 0x00000001),
GATE_CLK(GCC_QUPV3_WRAP0_S0_CLK, 0x5200c, 0x00000400),
GATE_CLK(GCC_QUPV3_WRAP0_S1_CLK, 0x5200c, 0x00000800),
GATE_CLK(GCC_QUPV3_WRAP0_S2_CLK, 0x5200c, 0x00001000),
@@ -135,6 +143,25 @@
debug("%s: clk %s\n", __func__, sdm845_clks[clk->id].name);
+ switch (clk->id) {
+ case GCC_USB30_PRIM_MASTER_CLK:
+ qcom_gate_clk_en(priv, GCC_USB_PHY_CFG_AHB2PHY_CLK);
+ /* These numbers are just pulled from the frequency tables in the Linux driver */
+ clk_rcg_set_rate_mnd(priv->base, USB30_PRIM_MASTER_CLK_CMD_RCGR,
+ (4.5 * 2) - 1, 0, 0, 1 << 8, 8);
+ clk_rcg_set_rate_mnd(priv->base, USB30_PRIM_MOCK_UTMI_CLK_CMD_RCGR,
+ 1, 0, 0, 0, 8);
+ clk_rcg_set_rate_mnd(priv->base, USB3_PRIM_PHY_AUX_CMD_RCGR,
+ 1, 0, 0, 0, 8);
+ break;
+ case GCC_USB30_SEC_MASTER_CLK:
+ qcom_gate_clk_en(priv, GCC_USB3_SEC_PHY_AUX_CLK);
+
+ qcom_gate_clk_en(priv, GCC_USB3_SEC_CLKREF_CLK);
+ qcom_gate_clk_en(priv, GCC_USB3_SEC_PHY_COM_AUX_CLK);
+ break;
+ }
+
qcom_gate_clk_en(priv, clk->id);
return 0;
@@ -160,11 +187,29 @@
[GCC_USB_PHY_CFG_AHB2PHY_BCR] = { 0x6a000 },
};
+static const struct qcom_power_map sdm845_gdscs[] = {
+ [PCIE_0_GDSC] = { 0x6b004 },
+ [PCIE_1_GDSC] = { 0x8d004 },
+ [UFS_CARD_GDSC] = { 0x75004 },
+ [UFS_PHY_GDSC] = { 0x77004 },
+ [USB30_PRIM_GDSC] = { 0xf004 },
+ [USB30_SEC_GDSC] = { 0x10004 },
+ [HLOS1_VOTE_AGGRE_NOC_MMU_AUDIO_TBU_GDSC] = { 0x7d030 },
+ [HLOS1_VOTE_AGGRE_NOC_MMU_PCIE_TBU_GDSC] = { 0x7d03c },
+ [HLOS1_VOTE_AGGRE_NOC_MMU_TBU1_GDSC] = { 0x7d034 },
+ [HLOS1_VOTE_AGGRE_NOC_MMU_TBU2_GDSC] = { 0x7d038 },
+ [HLOS1_VOTE_MMNOC_MMU_TBU_HF0_GDSC] = { 0x7d040 },
+ [HLOS1_VOTE_MMNOC_MMU_TBU_HF1_GDSC] = { 0x7d048 },
+ [HLOS1_VOTE_MMNOC_MMU_TBU_SF_GDSC] = { 0x7d044 },
+};
+
static struct msm_clk_data sdm845_clk_data = {
.resets = sdm845_gcc_resets,
.num_resets = ARRAY_SIZE(sdm845_gcc_resets),
.clks = sdm845_clks,
.num_clks = ARRAY_SIZE(sdm845_clks),
+ .power_domains = sdm845_gdscs,
+ .num_power_domains = ARRAY_SIZE(sdm845_gdscs),
.enable = sdm845_clk_enable,
.set_rate = sdm845_clk_set_rate,
@@ -183,5 +228,5 @@
.id = UCLASS_NOP,
.of_match = gcc_sdm845_of_match,
.bind = qcom_cc_bind,
- .flags = DM_FLAG_PRE_RELOC,
+ .flags = DM_FLAG_PRE_RELOC | DM_FLAG_DEFAULT_PD_CTRL_OFF,
};
diff --git a/drivers/clk/qcom/clock-sm6115.c b/drivers/clk/qcom/clock-sm6115.c
new file mode 100644
index 0000000..8314a0d
--- /dev/null
+++ b/drivers/clk/qcom/clock-sm6115.c
@@ -0,0 +1,199 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Clock drivers for Qualcomm sm6115 (and sm4250/qrb4210)
+ *
+ * Copyright (c) 2024 Linaro Ltd.
+ *
+ */
+
+#include <clk-uclass.h>
+#include <dm.h>
+#include <linux/delay.h>
+#include <asm/io.h>
+#include <linux/bitops.h>
+#include <linux/bug.h>
+#include <dt-bindings/clock/qcom,gcc-sm6115.h>
+
+#include "clock-qcom.h"
+
+#define QUPV3_WRAP0_S4_CMD_RCGR 0x1f608
+#define SDCC1_APPS_CLK_CMD_RCGR 0x38028
+#define SDCC2_APPS_CLK_CMD_RCGR 0x1e00c
+
+static const struct freq_tbl ftbl_gcc_qupv3_wrap0_s0_clk_src[] = {
+ F(7372800, CFG_CLK_SRC_GPLL0_AUX2, 1, 384, 15625),
+ F(14745600, CFG_CLK_SRC_GPLL0_AUX2, 1, 768, 15625),
+ F(19200000, CFG_CLK_SRC_CXO, 1, 0, 0),
+ F(29491200, CFG_CLK_SRC_GPLL0_AUX2, 1, 1536, 15625),
+ F(32000000, CFG_CLK_SRC_GPLL0_AUX2, 1, 8, 75),
+ F(48000000, CFG_CLK_SRC_GPLL0_AUX2, 1, 4, 25),
+ F(64000000, CFG_CLK_SRC_GPLL0_AUX2, 1, 16, 75),
+ F(75000000, CFG_CLK_SRC_GPLL0_AUX2, 4, 0, 0),
+ F(80000000, CFG_CLK_SRC_GPLL0_AUX2, 1, 4, 15),
+ F(96000000, CFG_CLK_SRC_GPLL0_AUX2, 1, 8, 25),
+ F(100000000, CFG_CLK_SRC_GPLL0_AUX2, 3, 0, 0),
+ F(102400000, CFG_CLK_SRC_GPLL0_AUX2, 1, 128, 375),
+ F(112000000, CFG_CLK_SRC_GPLL0_AUX2, 1, 28, 75),
+ F(117964800, CFG_CLK_SRC_GPLL0_AUX2, 1, 6144, 15625),
+ F(120000000, CFG_CLK_SRC_GPLL0_AUX2, 2.5, 0, 0),
+ F(128000000, CFG_CLK_SRC_GPLL6, 3, 0, 0),
+ {}
+};
+
+static const struct freq_tbl ftbl_gcc_sdcc2_apps_clk_src[] = {
+ F(400000, CFG_CLK_SRC_CXO, 12, 1, 4),
+ F(19200000, CFG_CLK_SRC_CXO, 1, 0, 0),
+ F(25000000, CFG_CLK_SRC_GPLL0_AUX2, 12, 0, 0),
+ F(50000000, CFG_CLK_SRC_GPLL0_AUX2, 6, 0, 0),
+ F(100000000, CFG_CLK_SRC_GPLL0_AUX2, 3, 0, 0),
+ F(200000000, CFG_CLK_SRC_GPLL0, 3, 0, 0),
+ {}
+};
+
+static const struct pll_vote_clk gpll0_clk = {
+ .status = 0,
+ .status_bit = BIT(31),
+ .ena_vote = 0x79000,
+ .vote_bit = BIT(0),
+};
+
+static const struct gate_clk sm6115_clks[] = {
+ GATE_CLK(GCC_CFG_NOC_USB3_PRIM_AXI_CLK, 0x1a084, 0x00000001),
+ GATE_CLK(GCC_QUPV3_WRAP0_CORE_2X_CLK, 0x7900c, 0x00000200),
+ GATE_CLK(GCC_QUPV3_WRAP0_CORE_CLK, 0x7900c, 0x00000100),
+ GATE_CLK(GCC_QUPV3_WRAP0_S0_CLK, 0x7900c, 0x00000400),
+ GATE_CLK(GCC_QUPV3_WRAP0_S1_CLK, 0x7900c, 0x00000800),
+ GATE_CLK(GCC_QUPV3_WRAP0_S2_CLK, 0x7900c, 0x00001000),
+ GATE_CLK(GCC_QUPV3_WRAP0_S3_CLK, 0x7900c, 0x00002000),
+ GATE_CLK(GCC_QUPV3_WRAP0_S4_CLK, 0x7900c, 0x00004000),
+ GATE_CLK(GCC_QUPV3_WRAP0_S5_CLK, 0x7900c, 0x00008000),
+ GATE_CLK(GCC_QUPV3_WRAP_0_M_AHB_CLK, 0x7900c, 0x00000040),
+ GATE_CLK(GCC_QUPV3_WRAP_0_S_AHB_CLK, 0x7900c, 0x00000080),
+ GATE_CLK(GCC_SDCC1_AHB_CLK, 0x38008, 0x00000001),
+ GATE_CLK(GCC_SDCC1_APPS_CLK, 0x38004, 0x00000001),
+ GATE_CLK(GCC_SDCC1_ICE_CORE_CLK, 0x3800c, 0x00000001),
+ GATE_CLK(GCC_SDCC2_AHB_CLK, 0x1e008, 0x00000001),
+ GATE_CLK(GCC_SDCC2_APPS_CLK, 0x1e004, 0x00000001),
+ GATE_CLK(GCC_SYS_NOC_CPUSS_AHB_CLK, 0x79004, 0x00000001),
+ GATE_CLK(GCC_SYS_NOC_UFS_PHY_AXI_CLK, 0x45098, 0x00000001),
+ GATE_CLK(GCC_SYS_NOC_USB3_PRIM_AXI_CLK, 0x1a080, 0x00000001),
+ GATE_CLK(GCC_UFS_PHY_AHB_CLK, 0x45014, 0x00000001),
+ GATE_CLK(GCC_UFS_PHY_AXI_CLK, 0x45010, 0x00000001),
+ GATE_CLK(GCC_UFS_PHY_ICE_CORE_CLK, 0x45044, 0x00000001),
+ GATE_CLK(GCC_UFS_PHY_PHY_AUX_CLK, 0x45078, 0x00000001),
+ GATE_CLK(GCC_UFS_PHY_RX_SYMBOL_0_CLK, 0x4501c, 0x00000001),
+ GATE_CLK(GCC_UFS_PHY_TX_SYMBOL_0_CLK, 0x45018, 0x00000001),
+ GATE_CLK(GCC_UFS_PHY_UNIPRO_CORE_CLK, 0x45040, 0x00000001),
+ GATE_CLK(GCC_USB30_PRIM_MASTER_CLK, 0x1a010, 0x00000001),
+ GATE_CLK(GCC_USB30_PRIM_MOCK_UTMI_CLK, 0x1a018, 0x00000001),
+ GATE_CLK(GCC_USB30_PRIM_SLEEP_CLK, 0x1a014, 0x00000001),
+ GATE_CLK(GCC_USB3_PRIM_CLKREF_CLK, 0x9f000, 0x00000001),
+ GATE_CLK(GCC_USB3_PRIM_PHY_COM_AUX_CLK, 0x1a054, 0x00000001),
+ GATE_CLK(GCC_USB3_PRIM_PHY_PIPE_CLK, 0x1a058, 0x00000001),
+ GATE_CLK(GCC_AHB2PHY_USB_CLK, 0x1d008, 0x00000001),
+ GATE_CLK(GCC_UFS_CLKREF_CLK, 0x8c000, 0x00000001),
+};
+
+static ulong sm6115_set_rate(struct clk *clk, ulong rate)
+{
+ struct msm_clk_priv *priv = dev_get_priv(clk->dev);
+ const struct freq_tbl *freq;
+
+ debug("%s: clk %s rate %lu\n", __func__, sm6115_clks[clk->id].name,
+ rate);
+
+ switch (clk->id) {
+ case GCC_QUPV3_WRAP0_S4_CLK: /*UART2*/
+ freq = qcom_find_freq(ftbl_gcc_qupv3_wrap0_s0_clk_src, rate);
+ clk_rcg_set_rate_mnd(priv->base, QUPV3_WRAP0_S4_CMD_RCGR,
+ freq->pre_div, freq->m, freq->n, freq->src,
+ 16);
+ return 0;
+ case GCC_SDCC2_APPS_CLK:
+ /* Enable GPLL7 so we can point SDCC2_APPS_CLK_SRC RCG at it */
+ clk_enable_gpll0(priv->base, &gpll0_clk);
+ freq = qcom_find_freq(ftbl_gcc_sdcc2_apps_clk_src, rate);
+ WARN(freq->src != CFG_CLK_SRC_GPLL0,
+ "SDCC2_APPS_CLK_SRC not set to GPLL0, requested rate %lu\n",
+ rate);
+ clk_rcg_set_rate_mnd(priv->base, SDCC2_APPS_CLK_CMD_RCGR,
+ freq->pre_div, freq->m, freq->n, freq->src,
+ 8);
+ return freq->freq;
+ case GCC_SDCC1_APPS_CLK:
+ /* The firmware turns this on for us and always sets it to this rate */
+ return 384000000;
+ default:
+ return rate;
+ }
+}
+
+static int sm6115_enable(struct clk *clk)
+{
+ struct msm_clk_priv *priv = dev_get_priv(clk->dev);
+
+ if (priv->data->num_clks < clk->id) {
+ debug("%s: unknown clk id %lu\n", __func__, clk->id);
+ return 0;
+ }
+
+ debug("%s: clk %s\n", __func__, sm6115_clks[clk->id].name);
+
+ switch (clk->id) {
+ case GCC_USB30_PRIM_MASTER_CLK:
+ qcom_gate_clk_en(priv, GCC_USB3_PRIM_PHY_COM_AUX_CLK);
+ qcom_gate_clk_en(priv, GCC_USB3_PRIM_CLKREF_CLK);
+ break;
+ }
+
+ qcom_gate_clk_en(priv, clk->id);
+
+ return 0;
+}
+
+static const struct qcom_reset_map sm6115_gcc_resets[] = {
+ [GCC_QUSB2PHY_PRIM_BCR] = { 0x1c000 },
+ [GCC_QUSB2PHY_SEC_BCR] = { 0x1c004 },
+ [GCC_SDCC1_BCR] = { 0x38000 },
+ [GCC_SDCC2_BCR] = { 0x1e000 },
+ [GCC_UFS_PHY_BCR] = { 0x45000 },
+ [GCC_USB30_PRIM_BCR] = { 0x1a000 },
+ [GCC_USB_PHY_CFG_AHB2PHY_BCR] = { 0x1d000 },
+ [GCC_USB3PHY_PHY_PRIM_SP0_BCR] = { 0x1b008 },
+ [GCC_USB3_PHY_PRIM_SP0_BCR] = { 0x1b000 },
+ [GCC_VCODEC0_BCR] = { 0x58094 },
+ [GCC_VENUS_BCR] = { 0x58078 },
+ [GCC_VIDEO_INTERFACE_BCR] = { 0x6e000 },
+};
+
+static const struct qcom_power_map sm6115_gdscs[] = {
+ [GCC_USB30_PRIM_GDSC] = { 0x1a004 },
+};
+
+static struct msm_clk_data sm6115_gcc_data = {
+ .resets = sm6115_gcc_resets,
+ .num_resets = ARRAY_SIZE(sm6115_gcc_resets),
+ .clks = sm6115_clks,
+ .num_clks = ARRAY_SIZE(sm6115_clks),
+ .power_domains = sm6115_gdscs,
+ .num_power_domains = ARRAY_SIZE(sm6115_gdscs),
+
+ .enable = sm6115_enable,
+ .set_rate = sm6115_set_rate,
+};
+
+static const struct udevice_id gcc_sm6115_of_match[] = {
+ {
+ .compatible = "qcom,gcc-sm6115",
+ .data = (ulong)&sm6115_gcc_data,
+ },
+ {}
+};
+
+U_BOOT_DRIVER(gcc_sm6115) = {
+ .name = "gcc_sm6115",
+ .id = UCLASS_NOP,
+ .of_match = gcc_sm6115_of_match,
+ .bind = qcom_cc_bind,
+ .flags = DM_FLAG_PRE_RELOC,
+};
diff --git a/drivers/clk/qcom/clock-sm8250.c b/drivers/clk/qcom/clock-sm8250.c
new file mode 100644
index 0000000..af10fc1
--- /dev/null
+++ b/drivers/clk/qcom/clock-sm8250.c
@@ -0,0 +1,282 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Clock drivers for Qualcomm sm8250
+ *
+ * (C) Copyright 2024 Linaro Ltd.
+ */
+
+#include <clk-uclass.h>
+#include <dm.h>
+#include <linux/delay.h>
+#include <asm/io.h>
+#include <linux/bug.h>
+#include <linux/bitops.h>
+#include <dt-bindings/clock/qcom,gcc-sm8250.h>
+
+#include "clock-qcom.h"
+
+#define GCC_SE12_UART_RCG_REG 0x184D0
+#define GCC_SDCC2_APPS_CLK_SRC_REG 0x1400c
+
+#define APCS_GPLL0_ENA_VOTE 0x79000
+#define APCS_GPLL9_STATUS 0x1c000
+#define APCS_GPLLX_ENA_REG 0x52018
+
+#define USB30_PRIM_MASTER_CLK_CMD_RCGR 0xf020
+#define USB30_PRIM_MOCK_UTMI_CLK_CMD_RCGR 0xf038
+#define USB3_PRIM_PHY_AUX_CMD_RCGR 0xf064
+
+static const struct freq_tbl ftbl_gcc_qupv3_wrap1_s4_clk_src[] = {
+ F(7372800, CFG_CLK_SRC_GPLL0_EVEN, 1, 384, 15625),
+ F(14745600, CFG_CLK_SRC_GPLL0_EVEN, 1, 768, 15625),
+ F(19200000, CFG_CLK_SRC_CXO, 1, 0, 0),
+ F(29491200, CFG_CLK_SRC_GPLL0_EVEN, 1, 1536, 15625),
+ F(32000000, CFG_CLK_SRC_GPLL0_EVEN, 1, 8, 75),
+ F(48000000, CFG_CLK_SRC_GPLL0_EVEN, 1, 4, 25),
+ F(50000000, CFG_CLK_SRC_GPLL0_EVEN, 6, 0, 0),
+ F(64000000, CFG_CLK_SRC_GPLL0_EVEN, 1, 16, 75),
+ F(75000000, CFG_CLK_SRC_GPLL0_EVEN, 4, 0, 0),
+ F(80000000, CFG_CLK_SRC_GPLL0_EVEN, 1, 4, 15),
+ F(96000000, CFG_CLK_SRC_GPLL0_EVEN, 1, 8, 25),
+ F(100000000, CFG_CLK_SRC_GPLL0, 6, 0, 0),
+ {}
+};
+
+static const struct freq_tbl ftbl_gcc_sdcc2_apps_clk_src[] = {
+ F(400000, CFG_CLK_SRC_CXO, 12, 1, 4),
+ F(19200000, CFG_CLK_SRC_CXO, 1, 0, 0),
+ F(25000000, CFG_CLK_SRC_GPLL0_EVEN, 12, 0, 0),
+ F(50000000, CFG_CLK_SRC_GPLL0_EVEN, 6, 0, 0),
+ F(100000000, CFG_CLK_SRC_GPLL0, 6, 0, 0),
+ F(202000000, CFG_CLK_SRC_GPLL9, 4, 0, 0),
+ {}
+};
+
+static struct pll_vote_clk gpll9_vote_clk = {
+ .status = APCS_GPLL9_STATUS,
+ .status_bit = BIT(31),
+ .ena_vote = APCS_GPLLX_ENA_REG,
+ .vote_bit = BIT(9),
+};
+
+static ulong sm8250_set_rate(struct clk *clk, ulong rate)
+{
+ struct msm_clk_priv *priv = dev_get_priv(clk->dev);
+ const struct freq_tbl *freq;
+
+ if (clk->id < priv->data->num_clks)
+ debug("%s: %s, requested rate=%ld\n", __func__,
+ priv->data->clks[clk->id].name, rate);
+
+ switch (clk->id) {
+ case GCC_QUPV3_WRAP1_S4_CLK: /*UART2*/
+ freq = qcom_find_freq(ftbl_gcc_qupv3_wrap1_s4_clk_src, rate);
+ clk_rcg_set_rate_mnd(priv->base, GCC_SE12_UART_RCG_REG,
+ freq->pre_div, freq->m, freq->n, freq->src,
+ 16);
+
+ return freq->freq;
+ case GCC_SDCC2_APPS_CLK:
+ /* Enable GPLL9 so that we can point SDCC2_APPS_CLK_SRC at it */
+ clk_enable_gpll0(priv->base, &gpll9_vote_clk);
+ freq = qcom_find_freq(ftbl_gcc_sdcc2_apps_clk_src, rate);
+ printf("%s: got freq %u\n", __func__, freq->freq);
+ WARN(freq->src != CFG_CLK_SRC_GPLL9,
+ "SDCC2_APPS_CLK_SRC not set to GPLL9, requested rate %lu\n",
+ rate);
+ clk_rcg_set_rate_mnd(priv->base, GCC_SDCC2_APPS_CLK_SRC_REG,
+ freq->pre_div, freq->m, freq->n,
+ CFG_CLK_SRC_GPLL9, 8);
+
+ return rate;
+ default:
+ return 0;
+ }
+}
+
+static const struct gate_clk sm8250_clks[] = {
+ GATE_CLK(GCC_AGGRE_UFS_CARD_AXI_CLK, 0x750cc, 0x00000001),
+ GATE_CLK(GCC_AGGRE_UFS_PHY_AXI_CLK, 0x770cc, 0x00000001),
+ GATE_CLK(GCC_AGGRE_USB3_PRIM_AXI_CLK, 0x0f080, 0x00000001),
+ GATE_CLK(GCC_AGGRE_USB3_SEC_AXI_CLK, 0x10080, 0x00000001),
+ GATE_CLK(GCC_CFG_NOC_USB3_PRIM_AXI_CLK, 0x0f07c, 0x00000001),
+ GATE_CLK(GCC_CFG_NOC_USB3_SEC_AXI_CLK, 0x1007c, 0x00000001),
+ GATE_CLK(GCC_QMIP_CAMERA_NRT_AHB_CLK, 0x0b018, 0x00000001),
+ GATE_CLK(GCC_QMIP_CAMERA_RT_AHB_CLK, 0x0b01c, 0x00000001),
+ GATE_CLK(GCC_QMIP_DISP_AHB_CLK, 0x0b020, 0x00000001),
+ GATE_CLK(GCC_QMIP_VIDEO_CVP_AHB_CLK, 0x0b010, 0x00000001),
+ GATE_CLK(GCC_QMIP_VIDEO_VCODEC_AHB_CLK, 0x0b014, 0x00000001),
+ GATE_CLK(GCC_QUPV3_WRAP0_CORE_2X_CLK, 0x52008, 0x00000200),
+ GATE_CLK(GCC_QUPV3_WRAP0_CORE_CLK, 0x52008, 0x00000100),
+ GATE_CLK(GCC_QUPV3_WRAP0_S0_CLK, 0x52008, 0x00000400),
+ GATE_CLK(GCC_QUPV3_WRAP0_S1_CLK, 0x52008, 0x00000800),
+ GATE_CLK(GCC_QUPV3_WRAP0_S2_CLK, 0x52008, 0x00001000),
+ GATE_CLK(GCC_QUPV3_WRAP0_S3_CLK, 0x52008, 0x00002000),
+ GATE_CLK(GCC_QUPV3_WRAP0_S4_CLK, 0x52008, 0x00004000),
+ GATE_CLK(GCC_QUPV3_WRAP0_S5_CLK, 0x52008, 0x00008000),
+ GATE_CLK(GCC_QUPV3_WRAP0_S6_CLK, 0x52008, 0x00010000),
+ GATE_CLK(GCC_QUPV3_WRAP0_S7_CLK, 0x52008, 0x00020000),
+ GATE_CLK(GCC_QUPV3_WRAP1_CORE_2X_CLK, 0x52008, 0x00040000),
+ GATE_CLK(GCC_QUPV3_WRAP1_CORE_CLK, 0x52008, 0x00080000),
+ GATE_CLK(GCC_QUPV3_WRAP1_S0_CLK, 0x52008, 0x00400000),
+ GATE_CLK(GCC_QUPV3_WRAP1_S1_CLK, 0x52008, 0x00800000),
+ GATE_CLK(GCC_QUPV3_WRAP1_S2_CLK, 0x52008, 0x01000000),
+ GATE_CLK(GCC_QUPV3_WRAP1_S3_CLK, 0x52008, 0x02000000),
+ GATE_CLK(GCC_QUPV3_WRAP1_S4_CLK, 0x52008, 0x04000000),
+ GATE_CLK(GCC_QUPV3_WRAP1_S5_CLK, 0x52008, 0x08000000),
+ GATE_CLK(GCC_QUPV3_WRAP2_CORE_2X_CLK, 0x52010, 0x00000008),
+ GATE_CLK(GCC_QUPV3_WRAP2_CORE_CLK, 0x52010, 0x00000001),
+ GATE_CLK(GCC_QUPV3_WRAP2_S0_CLK, 0x52010, 0x00000010),
+ GATE_CLK(GCC_QUPV3_WRAP2_S1_CLK, 0x52010, 0x00000020),
+ GATE_CLK(GCC_QUPV3_WRAP2_S2_CLK, 0x52010, 0x00000040),
+ GATE_CLK(GCC_QUPV3_WRAP2_S3_CLK, 0x52010, 0x00000080),
+ GATE_CLK(GCC_QUPV3_WRAP2_S4_CLK, 0x52010, 0x00000100),
+ GATE_CLK(GCC_QUPV3_WRAP2_S5_CLK, 0x52010, 0x00000200),
+ GATE_CLK(GCC_QUPV3_WRAP_0_M_AHB_CLK, 0x52008, 0x00000040),
+ GATE_CLK(GCC_QUPV3_WRAP_0_S_AHB_CLK, 0x52008, 0x00000080),
+ GATE_CLK(GCC_QUPV3_WRAP_1_M_AHB_CLK, 0x52008, 0x00100000),
+ GATE_CLK(GCC_QUPV3_WRAP_1_S_AHB_CLK, 0x52008, 0x00200000),
+ GATE_CLK(GCC_QUPV3_WRAP_2_M_AHB_CLK, 0x52010, 0x00000004),
+ GATE_CLK(GCC_QUPV3_WRAP_2_S_AHB_CLK, 0x52010, 0x00000002),
+ GATE_CLK(GCC_SDCC2_AHB_CLK, 0x14008, 0x00000001),
+ GATE_CLK(GCC_SDCC2_APPS_CLK, 0x14004, 0x00000001),
+ GATE_CLK(GCC_SDCC4_AHB_CLK, 0x16008, 0x00000001),
+ GATE_CLK(GCC_SDCC4_APPS_CLK, 0x16004, 0x00000001),
+ GATE_CLK(GCC_UFS_CARD_AHB_CLK, 0x75018, 0x00000001),
+ GATE_CLK(GCC_UFS_CARD_AXI_CLK, 0x75010, 0x00000001),
+ GATE_CLK(GCC_UFS_CARD_ICE_CORE_CLK, 0x75064, 0x00000001),
+ GATE_CLK(GCC_UFS_CARD_PHY_AUX_CLK, 0x7509c, 0x00000001),
+ GATE_CLK(GCC_UFS_CARD_RX_SYMBOL_0_CLK, 0x75020, 0x00000001),
+ GATE_CLK(GCC_UFS_CARD_RX_SYMBOL_1_CLK, 0x750b8, 0x00000001),
+ GATE_CLK(GCC_UFS_CARD_TX_SYMBOL_0_CLK, 0x7501c, 0x00000001),
+ GATE_CLK(GCC_UFS_CARD_UNIPRO_CORE_CLK, 0x7505c, 0x00000001),
+ GATE_CLK(GCC_UFS_PHY_AHB_CLK, 0x77018, 0x00000001),
+ GATE_CLK(GCC_UFS_PHY_AXI_CLK, 0x77010, 0x00000001),
+ GATE_CLK(GCC_UFS_PHY_ICE_CORE_CLK, 0x77064, 0x00000001),
+ GATE_CLK(GCC_UFS_PHY_PHY_AUX_CLK, 0x7709c, 0x00000001),
+ GATE_CLK(GCC_UFS_PHY_RX_SYMBOL_0_CLK, 0x77020, 0x00000001),
+ GATE_CLK(GCC_UFS_PHY_RX_SYMBOL_1_CLK, 0x770b8, 0x00000001),
+ GATE_CLK(GCC_UFS_PHY_TX_SYMBOL_0_CLK, 0x7701c, 0x00000001),
+ GATE_CLK(GCC_UFS_PHY_UNIPRO_CORE_CLK, 0x7705c, 0x00000001),
+ GATE_CLK(GCC_USB30_PRIM_MASTER_CLK, 0x0f010, 0x00000001),
+ GATE_CLK(GCC_USB30_PRIM_MOCK_UTMI_CLK, 0x0f01c, 0x00000001),
+ GATE_CLK(GCC_USB30_PRIM_SLEEP_CLK, 0x0f018, 0x00000001),
+ GATE_CLK(GCC_USB30_SEC_MASTER_CLK, 0x10010, 0x00000001),
+ GATE_CLK(GCC_USB30_SEC_MOCK_UTMI_CLK, 0x1001c, 0x00000001),
+ GATE_CLK(GCC_USB30_SEC_SLEEP_CLK, 0x10018, 0x00000001),
+ GATE_CLK(GCC_USB3_PRIM_PHY_AUX_CLK, 0x0f054, 0x00000001),
+ GATE_CLK(GCC_USB3_PRIM_PHY_COM_AUX_CLK, 0x0f058, 0x00000001),
+ GATE_CLK(GCC_USB3_PRIM_PHY_PIPE_CLK, 0x0f05c, 0x00000001),
+ GATE_CLK(GCC_USB3_SEC_CLKREF_EN, 0x8c010, 0x00000001),
+ GATE_CLK(GCC_USB3_SEC_PHY_AUX_CLK, 0x10054, 0x00000001),
+ GATE_CLK(GCC_USB3_SEC_PHY_COM_AUX_CLK, 0x10058, 0x00000001),
+ GATE_CLK(GCC_USB3_SEC_PHY_PIPE_CLK, 0x1005c, 0x00000001),
+};
+
+static int sm8250_enable(struct clk *clk)
+{
+ struct msm_clk_priv *priv = dev_get_priv(clk->dev);
+
+ if (priv->data->num_clks < clk->id) {
+ debug("%s: unknown clk id %lu\n", __func__, clk->id);
+ return 0;
+ }
+
+ debug("%s: clk %s\n", __func__, sm8250_clks[clk->id].name);
+
+ switch (clk->id) {
+ case GCC_USB30_PRIM_MASTER_CLK:
+ qcom_gate_clk_en(priv, GCC_USB3_PRIM_PHY_AUX_CLK);
+ qcom_gate_clk_en(priv, GCC_USB3_PRIM_PHY_COM_AUX_CLK);
+ break;
+ case GCC_USB30_SEC_MASTER_CLK:
+ qcom_gate_clk_en(priv, GCC_USB3_SEC_PHY_AUX_CLK);
+ qcom_gate_clk_en(priv, GCC_USB3_SEC_PHY_COM_AUX_CLK);
+ break;
+ }
+
+ qcom_gate_clk_en(priv, clk->id);
+
+ return 0;
+}
+
+static const struct qcom_reset_map sm8250_gcc_resets[] = {
+ [GCC_GPU_BCR] = { 0x71000 },
+ [GCC_MMSS_BCR] = { 0xb000 },
+ [GCC_NPU_BWMON_BCR] = { 0x73000 },
+ [GCC_NPU_BCR] = { 0x4d000 },
+ [GCC_PCIE_0_BCR] = { 0x6b000 },
+ [GCC_PCIE_0_LINK_DOWN_BCR] = { 0x6c014 },
+ [GCC_PCIE_0_NOCSR_COM_PHY_BCR] = { 0x6c020 },
+ [GCC_PCIE_0_PHY_BCR] = { 0x6c01c },
+ [GCC_PCIE_0_PHY_NOCSR_COM_PHY_BCR] = { 0x6c028 },
+ [GCC_PCIE_1_BCR] = { 0x8d000 },
+ [GCC_PCIE_1_LINK_DOWN_BCR] = { 0x8e014 },
+ [GCC_PCIE_1_NOCSR_COM_PHY_BCR] = { 0x8e020 },
+ [GCC_PCIE_1_PHY_BCR] = { 0x8e01c },
+ [GCC_PCIE_1_PHY_NOCSR_COM_PHY_BCR] = { 0x8e000 },
+ [GCC_PCIE_2_BCR] = { 0x6000 },
+ [GCC_PCIE_2_LINK_DOWN_BCR] = { 0x1f014 },
+ [GCC_PCIE_2_NOCSR_COM_PHY_BCR] = { 0x1f020 },
+ [GCC_PCIE_2_PHY_BCR] = { 0x1f01c },
+ [GCC_PCIE_2_PHY_NOCSR_COM_PHY_BCR] = { 0x1f028 },
+ [GCC_PCIE_PHY_BCR] = { 0x6f000 },
+ [GCC_PCIE_PHY_CFG_AHB_BCR] = { 0x6f00c },
+ [GCC_PCIE_PHY_COM_BCR] = { 0x6f010 },
+ [GCC_PDM_BCR] = { 0x33000 },
+ [GCC_PRNG_BCR] = { 0x34000 },
+ [GCC_QUPV3_WRAPPER_0_BCR] = { 0x17000 },
+ [GCC_QUPV3_WRAPPER_1_BCR] = { 0x18000 },
+ [GCC_QUPV3_WRAPPER_2_BCR] = { 0x1e000 },
+ [GCC_QUSB2PHY_PRIM_BCR] = { 0x12000 },
+ [GCC_QUSB2PHY_SEC_BCR] = { 0x12004 },
+ [GCC_SDCC2_BCR] = { 0x14000 },
+ [GCC_SDCC4_BCR] = { 0x16000 },
+ [GCC_TSIF_BCR] = { 0x36000 },
+ [GCC_UFS_CARD_BCR] = { 0x75000 },
+ [GCC_UFS_PHY_BCR] = { 0x77000 },
+ [GCC_USB30_PRIM_BCR] = { 0xf000 },
+ [GCC_USB30_SEC_BCR] = { 0x10000 },
+ [GCC_USB3_DP_PHY_PRIM_BCR] = { 0x50008 },
+ [GCC_USB3_DP_PHY_SEC_BCR] = { 0x50014 },
+ [GCC_USB3_PHY_PRIM_BCR] = { 0x50000 },
+ [GCC_USB3_PHY_SEC_BCR] = { 0x5000c },
+ [GCC_USB3PHY_PHY_PRIM_BCR] = { 0x50004 },
+ [GCC_USB3PHY_PHY_SEC_BCR] = { 0x50010 },
+ [GCC_USB_PHY_CFG_AHB2PHY_BCR] = { 0x6a000 },
+};
+
+static const struct qcom_power_map sm8250_gdscs[] = {
+ [PCIE_0_GDSC] = { 0x6b004 }, [PCIE_1_GDSC] = { 0x8d004 },
+ [PCIE_2_GDSC] = { 0x6004 }, [UFS_CARD_GDSC] = { 0x75004 },
+ [UFS_PHY_GDSC] = { 0x77004 }, [USB30_PRIM_GDSC] = { 0xf004 },
+ [USB30_SEC_GDSC] = { 0x10004 },
+};
+
+static struct msm_clk_data qcs404_gcc_data = {
+ .resets = sm8250_gcc_resets,
+ .num_resets = ARRAY_SIZE(sm8250_gcc_resets),
+ .clks = sm8250_clks,
+ .num_clks = ARRAY_SIZE(sm8250_clks),
+ .power_domains = sm8250_gdscs,
+ .num_power_domains = ARRAY_SIZE(sm8250_gdscs),
+
+ .enable = sm8250_enable,
+ .set_rate = sm8250_set_rate,
+};
+
+static const struct udevice_id gcc_sm8250_of_match[] = {
+ {
+ .compatible = "qcom,gcc-sm8250",
+ .data = (ulong)&qcs404_gcc_data,
+ },
+ {}
+};
+
+U_BOOT_DRIVER(gcc_sm8250) = {
+ .name = "gcc_sm8250",
+ .id = UCLASS_NOP,
+ .of_match = gcc_sm8250_of_match,
+ .bind = qcom_cc_bind,
+ .flags = DM_FLAG_PRE_RELOC,
+};
diff --git a/drivers/clk/qcom/clock-sm8550.c b/drivers/clk/qcom/clock-sm8550.c
new file mode 100644
index 0000000..c024992
--- /dev/null
+++ b/drivers/clk/qcom/clock-sm8550.c
@@ -0,0 +1,335 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Clock drivers for Qualcomm sm8550
+ *
+ * (C) Copyright 2024 Linaro Ltd.
+ */
+
+#include <clk-uclass.h>
+#include <dm.h>
+#include <linux/delay.h>
+#include <errno.h>
+#include <asm/io.h>
+#include <linux/bug.h>
+#include <linux/bitops.h>
+#include <dt-bindings/clock/qcom,sm8550-gcc.h>
+#include <dt-bindings/clock/qcom,sm8550-tcsr.h>
+
+#include "clock-qcom.h"
+
+/* On-board TCXO, TOFIX get from DT */
+#define TCXO_RATE 38400000
+
+/* bi_tcxo_div2 divided after RPMh output */
+#define TCXO_DIV2_RATE (TCXO_RATE / 2)
+
+static const struct freq_tbl ftbl_gcc_qupv3_wrap1_s2_clk_src[] = {
+ F(7372800, CFG_CLK_SRC_GPLL0_EVEN, 1, 384, 15625),
+ F(14745600, CFG_CLK_SRC_GPLL0_EVEN, 1, 768, 15625),
+ F(19200000, CFG_CLK_SRC_CXO, 1, 0, 0),
+ F(29491200, CFG_CLK_SRC_GPLL0_EVEN, 1, 1536, 15625),
+ F(32000000, CFG_CLK_SRC_GPLL0_EVEN, 1, 8, 75),
+ F(48000000, CFG_CLK_SRC_GPLL0_EVEN, 1, 4, 25),
+ F(51200000, CFG_CLK_SRC_GPLL0_EVEN, 1, 64, 375),
+ F(64000000, CFG_CLK_SRC_GPLL0_EVEN, 1, 16, 75),
+ F(75000000, CFG_CLK_SRC_GPLL0_EVEN, 4, 0, 0),
+ F(80000000, CFG_CLK_SRC_GPLL0_EVEN, 1, 4, 15),
+ F(96000000, CFG_CLK_SRC_GPLL0_EVEN, 1, 8, 25),
+ F(100000000, CFG_CLK_SRC_GPLL0, 6, 0, 0),
+ { }
+};
+
+static const struct freq_tbl ftbl_gcc_sdcc2_apps_clk_src[] = {
+ F(400000, CFG_CLK_SRC_CXO, 12, 1, 4),
+ F(25000000, CFG_CLK_SRC_GPLL0_EVEN, 12, 0, 0),
+ F(37500000, CFG_CLK_SRC_GPLL0_EVEN, 8, 0, 0),
+ F(50000000, CFG_CLK_SRC_GPLL0_EVEN, 6, 0, 0),
+ F(100000000, CFG_CLK_SRC_GPLL0_EVEN, 3, 0, 0),
+ /* TOFIX F(202000000, CFG_CLK_SRC_GPLL9, 4, 0, 0), */
+ { }
+};
+
+static const struct freq_tbl ftbl_gcc_usb30_prim_master_clk_src[] = {
+ F(66666667, CFG_CLK_SRC_GPLL0_EVEN, 4.5, 0, 0),
+ F(133333333, CFG_CLK_SRC_GPLL0, 4.5, 0, 0),
+ F(200000000, CFG_CLK_SRC_GPLL0, 3, 0, 0),
+ F(240000000, CFG_CLK_SRC_GPLL0, 2.5, 0, 0),
+ { }
+};
+
+static ulong sm8550_set_rate(struct clk *clk, ulong rate)
+{
+ struct msm_clk_priv *priv = dev_get_priv(clk->dev);
+ const struct freq_tbl *freq;
+
+ switch (clk->id) {
+ case GCC_QUPV3_WRAP1_S7_CLK: /* UART7 */
+ freq = qcom_find_freq(ftbl_gcc_qupv3_wrap1_s2_clk_src, rate);
+ clk_rcg_set_rate_mnd(priv->base, 0x18898,
+ freq->pre_div, freq->m, freq->n, freq->src, 16);
+ return freq->freq;
+ case GCC_SDCC2_APPS_CLK:
+ freq = qcom_find_freq(ftbl_gcc_sdcc2_apps_clk_src, rate);
+ clk_rcg_set_rate_mnd(priv->base, 0x14018,
+ freq->pre_div, freq->m, freq->n, freq->src, 8);
+ return freq->freq;
+ case GCC_USB30_PRIM_MASTER_CLK:
+ freq = qcom_find_freq(ftbl_gcc_usb30_prim_master_clk_src, rate);
+ clk_rcg_set_rate_mnd(priv->base, 0x3902c,
+ freq->pre_div, freq->m, freq->n, freq->src, 8);
+ return freq->freq;
+ case GCC_USB30_PRIM_MOCK_UTMI_CLK:
+ clk_rcg_set_rate(priv->base, 0x39044, 0, 0);
+ return TCXO_DIV2_RATE;
+ case GCC_USB3_PRIM_PHY_AUX_CLK_SRC:
+ clk_rcg_set_rate(priv->base, 0x39070, 0, 0);
+ return TCXO_DIV2_RATE;
+ default:
+ return 0;
+ }
+}
+
+static const struct gate_clk sm8550_clks[] = {
+ GATE_CLK(GCC_AGGRE_NOC_PCIE_AXI_CLK, 0x52000, BIT(12)),
+ GATE_CLK(GCC_AGGRE_UFS_PHY_AXI_CLK, 0x770e4, BIT(0)),
+ GATE_CLK(GCC_AGGRE_UFS_PHY_AXI_HW_CTL_CLK, 0x770e4, BIT(1)),
+ GATE_CLK(GCC_AGGRE_USB3_PRIM_AXI_CLK, 0x3908c, BIT(0)),
+ GATE_CLK(GCC_CNOC_PCIE_SF_AXI_CLK, 0x52008, BIT(6)),
+ GATE_CLK(GCC_DDRSS_GPU_AXI_CLK, 0x71154, BIT(0)),
+ GATE_CLK(GCC_DDRSS_PCIE_SF_QTB_CLK, 0x52000, BIT(19)),
+ GATE_CLK(GCC_PCIE_0_AUX_CLK, 0x52008, BIT(3)),
+ GATE_CLK(GCC_PCIE_0_CFG_AHB_CLK, 0x52008, BIT(2)),
+ GATE_CLK(GCC_PCIE_0_MSTR_AXI_CLK, 0x52008, BIT(1)),
+ GATE_CLK(GCC_PCIE_0_PHY_RCHNG_CLK, 0x52000, BIT(22)),
+ GATE_CLK(GCC_PCIE_0_PIPE_CLK, 0x52008, BIT(4)),
+ GATE_CLK(GCC_PCIE_0_SLV_AXI_CLK, 0x52008, BIT(0)),
+ GATE_CLK(GCC_PCIE_0_SLV_Q2A_AXI_CLK, 0x52008, BIT(5)),
+ GATE_CLK(GCC_PCIE_1_AUX_CLK, 0x52000, BIT(29)),
+ GATE_CLK(GCC_PCIE_1_CFG_AHB_CLK, 0x52000, BIT(28)),
+ GATE_CLK(GCC_PCIE_1_MSTR_AXI_CLK, 0x52000, BIT(27)),
+ GATE_CLK(GCC_PCIE_1_PHY_AUX_CLK, 0x52000, BIT(24)),
+ GATE_CLK(GCC_PCIE_1_PHY_RCHNG_CLK, 0x52000, BIT(23)),
+ GATE_CLK(GCC_PCIE_1_PIPE_CLK, 0x52000, BIT(30)),
+ GATE_CLK(GCC_PCIE_1_SLV_AXI_CLK, 0x52000, BIT(26)),
+ GATE_CLK(GCC_PCIE_1_SLV_Q2A_AXI_CLK, 0x52000, BIT(25)),
+ GATE_CLK(GCC_QUPV3_I2C_CORE_CLK, 0x52008, BIT(8)),
+ GATE_CLK(GCC_QUPV3_I2C_S0_CLK, 0x52008, BIT(10)),
+ GATE_CLK(GCC_QUPV3_I2C_S1_CLK, 0x52008, BIT(11)),
+ GATE_CLK(GCC_QUPV3_I2C_S2_CLK, 0x52008, BIT(12)),
+ GATE_CLK(GCC_QUPV3_I2C_S3_CLK, 0x52008, BIT(13)),
+ GATE_CLK(GCC_QUPV3_I2C_S4_CLK, 0x52008, BIT(14)),
+ GATE_CLK(GCC_QUPV3_I2C_S5_CLK, 0x52008, BIT(15)),
+ GATE_CLK(GCC_QUPV3_I2C_S6_CLK, 0x52008, BIT(16)),
+ GATE_CLK(GCC_QUPV3_I2C_S7_CLK, 0x52008, BIT(17)),
+ GATE_CLK(GCC_QUPV3_I2C_S8_CLK, 0x52010, BIT(14)),
+ GATE_CLK(GCC_QUPV3_I2C_S9_CLK, 0x52010, BIT(15)),
+ GATE_CLK(GCC_QUPV3_I2C_S_AHB_CLK, 0x52008, BIT(7)),
+ GATE_CLK(GCC_QUPV3_WRAP1_CORE_2X_CLK, 0x52008, BIT(18)),
+ GATE_CLK(GCC_QUPV3_WRAP1_CORE_CLK, 0x52008, BIT(19)),
+ GATE_CLK(GCC_QUPV3_WRAP1_S0_CLK, 0x52008, BIT(22)),
+ GATE_CLK(GCC_QUPV3_WRAP1_S1_CLK, 0x52008, BIT(23)),
+ GATE_CLK(GCC_QUPV3_WRAP1_S2_CLK, 0x52008, BIT(24)),
+ GATE_CLK(GCC_QUPV3_WRAP1_S3_CLK, 0x52008, BIT(25)),
+ GATE_CLK(GCC_QUPV3_WRAP1_S4_CLK, 0x52008, BIT(26)),
+ GATE_CLK(GCC_QUPV3_WRAP1_S5_CLK, 0x52008, BIT(27)),
+ GATE_CLK(GCC_QUPV3_WRAP1_S6_CLK, 0x52008, BIT(28)),
+ GATE_CLK(GCC_QUPV3_WRAP1_S7_CLK, 0x52010, BIT(16)),
+ GATE_CLK(GCC_QUPV3_WRAP2_CORE_2X_CLK, 0x52010, BIT(3)),
+ GATE_CLK(GCC_QUPV3_WRAP2_CORE_CLK, 0x52010, BIT(0)),
+ GATE_CLK(GCC_QUPV3_WRAP2_S0_CLK, 0x52010, BIT(4)),
+ GATE_CLK(GCC_QUPV3_WRAP2_S1_CLK, 0x52010, BIT(5)),
+ GATE_CLK(GCC_QUPV3_WRAP2_S2_CLK, 0x52010, BIT(6)),
+ GATE_CLK(GCC_QUPV3_WRAP2_S3_CLK, 0x52010, BIT(7)),
+ GATE_CLK(GCC_QUPV3_WRAP2_S4_CLK, 0x52010, BIT(8)),
+ GATE_CLK(GCC_QUPV3_WRAP2_S5_CLK, 0x52010, BIT(9)),
+ GATE_CLK(GCC_QUPV3_WRAP2_S6_CLK, 0x52010, BIT(10)),
+ GATE_CLK(GCC_QUPV3_WRAP2_S7_CLK, 0x52010, BIT(17)),
+ GATE_CLK(GCC_QUPV3_WRAP_1_M_AHB_CLK, 0x52008, BIT(20)),
+ GATE_CLK(GCC_QUPV3_WRAP_1_S_AHB_CLK, 0x52008, BIT(21)),
+ GATE_CLK(GCC_QUPV3_WRAP_2_M_AHB_CLK, 0x52010, BIT(2)),
+ GATE_CLK(GCC_QUPV3_WRAP_2_S_AHB_CLK, 0x52010, BIT(1)),
+ GATE_CLK(GCC_SDCC2_AHB_CLK, 0x14010, BIT(0)),
+ GATE_CLK(GCC_SDCC2_APPS_CLK, 0x14004, BIT(0)),
+ GATE_CLK(GCC_UFS_PHY_AHB_CLK, 0x77024, BIT(0)),
+ GATE_CLK(GCC_UFS_PHY_AXI_CLK, 0x77018, BIT(0)),
+ GATE_CLK(GCC_UFS_PHY_AXI_HW_CTL_CLK, 0x77018, BIT(1)),
+ GATE_CLK(GCC_UFS_PHY_ICE_CORE_CLK, 0x77074, BIT(0)),
+ GATE_CLK(GCC_UFS_PHY_ICE_CORE_HW_CTL_CLK, 0x77074, BIT(1)),
+ GATE_CLK(GCC_UFS_PHY_PHY_AUX_CLK, 0x770b0, BIT(0)),
+ GATE_CLK(GCC_UFS_PHY_PHY_AUX_HW_CTL_CLK, 0x770b0, BIT(1)),
+ GATE_CLK(GCC_UFS_PHY_RX_SYMBOL_0_CLK, 0x7702c, BIT(0)),
+ GATE_CLK(GCC_UFS_PHY_RX_SYMBOL_1_CLK, 0x770cc, BIT(0)),
+ GATE_CLK(GCC_UFS_PHY_TX_SYMBOL_0_CLK, 0x77028, BIT(0)),
+ GATE_CLK(GCC_UFS_PHY_UNIPRO_CORE_CLK, 0x77068, BIT(0)),
+ GATE_CLK(GCC_UFS_PHY_UNIPRO_CORE_HW_CTL_CLK, 0x77068, BIT(1)),
+ GATE_CLK(GCC_USB30_PRIM_MASTER_CLK, 0x39018, BIT(0)),
+ GATE_CLK(GCC_USB30_PRIM_MOCK_UTMI_CLK, 0x39028, BIT(0)),
+ GATE_CLK(GCC_USB30_PRIM_SLEEP_CLK, 0x39024, BIT(0)),
+ GATE_CLK(GCC_USB3_PRIM_PHY_AUX_CLK, 0x39060, BIT(0)),
+ GATE_CLK(GCC_USB3_PRIM_PHY_COM_AUX_CLK, 0x39064, BIT(0)),
+ GATE_CLK(GCC_USB3_PRIM_PHY_PIPE_CLK, 0x39068, BIT(0)),
+};
+
+static int sm8550_enable(struct clk *clk)
+{
+ struct msm_clk_priv *priv = dev_get_priv(clk->dev);
+
+ switch (clk->id) {
+ case GCC_AGGRE_USB3_PRIM_AXI_CLK:
+ qcom_gate_clk_en(priv, GCC_USB30_PRIM_MASTER_CLK);
+ fallthrough;
+ case GCC_USB30_PRIM_MASTER_CLK:
+ qcom_gate_clk_en(priv, GCC_USB3_PRIM_PHY_AUX_CLK);
+ qcom_gate_clk_en(priv, GCC_USB3_PRIM_PHY_COM_AUX_CLK);
+ break;
+ }
+
+ qcom_gate_clk_en(priv, clk->id);
+
+ return 0;
+}
+
+static const struct qcom_reset_map sm8550_gcc_resets[] = {
+ [GCC_CAMERA_BCR] = { 0x26000 },
+ [GCC_DISPLAY_BCR] = { 0x27000 },
+ [GCC_GPU_BCR] = { 0x71000 },
+ [GCC_PCIE_0_BCR] = { 0x6b000 },
+ [GCC_PCIE_0_LINK_DOWN_BCR] = { 0x6c014 },
+ [GCC_PCIE_0_NOCSR_COM_PHY_BCR] = { 0x6c020 },
+ [GCC_PCIE_0_PHY_BCR] = { 0x6c01c },
+ [GCC_PCIE_0_PHY_NOCSR_COM_PHY_BCR] = { 0x6c028 },
+ [GCC_PCIE_1_BCR] = { 0x8d000 },
+ [GCC_PCIE_1_LINK_DOWN_BCR] = { 0x8e014 },
+ [GCC_PCIE_1_NOCSR_COM_PHY_BCR] = { 0x8e020 },
+ [GCC_PCIE_1_PHY_BCR] = { 0x8e01c },
+ [GCC_PCIE_1_PHY_NOCSR_COM_PHY_BCR] = { 0x8e024 },
+ [GCC_PCIE_PHY_BCR] = { 0x6f000 },
+ [GCC_PCIE_PHY_CFG_AHB_BCR] = { 0x6f00c },
+ [GCC_PCIE_PHY_COM_BCR] = { 0x6f010 },
+ [GCC_PDM_BCR] = { 0x33000 },
+ [GCC_QUPV3_WRAPPER_1_BCR] = { 0x18000 },
+ [GCC_QUPV3_WRAPPER_2_BCR] = { 0x1e000 },
+ [GCC_QUPV3_WRAPPER_I2C_BCR] = { 0x17000 },
+ [GCC_QUSB2PHY_PRIM_BCR] = { 0x12000 },
+ [GCC_QUSB2PHY_SEC_BCR] = { 0x12004 },
+ [GCC_SDCC2_BCR] = { 0x14000 },
+ [GCC_SDCC4_BCR] = { 0x16000 },
+ [GCC_UFS_PHY_BCR] = { 0x77000 },
+ [GCC_USB30_PRIM_BCR] = { 0x39000 },
+ [GCC_USB3_DP_PHY_PRIM_BCR] = { 0x50008 },
+ [GCC_USB3_DP_PHY_SEC_BCR] = { 0x50014 },
+ [GCC_USB3_PHY_PRIM_BCR] = { 0x50000 },
+ [GCC_USB3_PHY_SEC_BCR] = { 0x5000c },
+ [GCC_USB3PHY_PHY_PRIM_BCR] = { 0x50004 },
+ [GCC_USB3PHY_PHY_SEC_BCR] = { 0x50010 },
+ [GCC_USB_PHY_CFG_AHB2PHY_BCR] = { 0x6a000 },
+ [GCC_VIDEO_AXI0_CLK_ARES] = { 0x32018, 2 },
+ [GCC_VIDEO_AXI1_CLK_ARES] = { 0x32024, 2 },
+ [GCC_VIDEO_BCR] = { 0x32000 },
+};
+
+static const struct qcom_power_map sm8550_gdscs[] = {
+ [PCIE_0_GDSC] = { 0x6b004 },
+ [PCIE_0_PHY_GDSC] = { 0x6c000 },
+ [PCIE_1_GDSC] = { 0x8d004 },
+ [PCIE_1_PHY_GDSC] = { 0x8e000 },
+ [UFS_PHY_GDSC] = { 0x77004 },
+ [UFS_MEM_PHY_GDSC] = { 0x9e000 },
+ [USB30_PRIM_GDSC] = { 0x39004 },
+ [USB3_PHY_GDSC] = { 0x50018 },
+};
+
+static struct msm_clk_data sm8550_gcc_data = {
+ .resets = sm8550_gcc_resets,
+ .num_resets = ARRAY_SIZE(sm8550_gcc_resets),
+ .clks = sm8550_clks,
+ .num_clks = ARRAY_SIZE(sm8550_clks),
+ .power_domains = sm8550_gdscs,
+ .num_power_domains = ARRAY_SIZE(sm8550_gdscs),
+
+ .enable = sm8550_enable,
+ .set_rate = sm8550_set_rate,
+};
+
+static const struct udevice_id gcc_sm8550_of_match[] = {
+ {
+ .compatible = "qcom,sm8550-gcc",
+ .data = (ulong)&sm8550_gcc_data,
+ },
+ { }
+};
+
+U_BOOT_DRIVER(gcc_sm8550) = {
+ .name = "gcc_sm8550",
+ .id = UCLASS_NOP,
+ .of_match = gcc_sm8550_of_match,
+ .bind = qcom_cc_bind,
+ .flags = DM_FLAG_PRE_RELOC | DM_FLAG_DEFAULT_PD_CTRL_OFF,
+};
+
+/* TCSRCC */
+
+static const struct gate_clk sm8550_tcsr_clks[] = {
+ GATE_CLK(TCSR_PCIE_0_CLKREF_EN, 0x15100, BIT(0)),
+ GATE_CLK(TCSR_PCIE_1_CLKREF_EN, 0x15114, BIT(0)),
+ GATE_CLK(TCSR_UFS_CLKREF_EN, 0x15110, BIT(0)),
+ GATE_CLK(TCSR_UFS_PAD_CLKREF_EN, 0x15104, BIT(0)),
+ GATE_CLK(TCSR_USB2_CLKREF_EN, 0x15118, BIT(0)),
+ GATE_CLK(TCSR_USB3_CLKREF_EN, 0x15108, BIT(0)),
+};
+
+static struct msm_clk_data sm8550_tcsrcc_data = {
+ .clks = sm8550_tcsr_clks,
+ .num_clks = ARRAY_SIZE(sm8550_tcsr_clks),
+};
+
+static int tcsrcc_sm8550_clk_enable(struct clk *clk)
+{
+ struct msm_clk_priv *priv = dev_get_priv(clk->dev);
+
+ qcom_gate_clk_en(priv, clk->id);
+
+ return 0;
+}
+
+static ulong tcsrcc_sm8550_clk_get_rate(struct clk *clk)
+{
+ return TCXO_RATE;
+}
+
+static int tcsrcc_sm8550_clk_probe(struct udevice *dev)
+{
+ struct msm_clk_data *data = (struct msm_clk_data *)dev_get_driver_data(dev);
+ struct msm_clk_priv *priv = dev_get_priv(dev);
+
+ priv->base = dev_read_addr(dev);
+ if (priv->base == FDT_ADDR_T_NONE)
+ return -EINVAL;
+
+ priv->data = data;
+
+ return 0;
+}
+
+static struct clk_ops tcsrcc_sm8550_clk_ops = {
+ .enable = tcsrcc_sm8550_clk_enable,
+ .get_rate = tcsrcc_sm8550_clk_get_rate,
+};
+
+static const struct udevice_id tcsrcc_sm8550_of_match[] = {
+ {
+ .compatible = "qcom,sm8550-tcsr",
+ .data = (ulong)&sm8550_tcsrcc_data,
+ },
+ { }
+};
+
+U_BOOT_DRIVER(tcsrcc_sm8550) = {
+ .name = "tcsrcc_sm8550",
+ .id = UCLASS_CLK,
+ .of_match = tcsrcc_sm8550_of_match,
+ .ops = &tcsrcc_sm8550_clk_ops,
+ .priv_auto = sizeof(struct msm_clk_priv),
+ .probe = tcsrcc_sm8550_clk_probe,
+ .flags = DM_FLAG_PRE_RELOC | DM_FLAG_DEFAULT_PD_CTRL_OFF,
+};
diff --git a/drivers/clk/qcom/clock-sm8650.c b/drivers/clk/qcom/clock-sm8650.c
new file mode 100644
index 0000000..0ce83e9
--- /dev/null
+++ b/drivers/clk/qcom/clock-sm8650.c
@@ -0,0 +1,332 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Clock drivers for Qualcomm sm8650
+ *
+ * (C) Copyright 2024 Linaro Ltd.
+ */
+
+#include <clk-uclass.h>
+#include <dm.h>
+#include <linux/delay.h>
+#include <errno.h>
+#include <asm/io.h>
+#include <linux/bug.h>
+#include <linux/bitops.h>
+#include <dt-bindings/clock/qcom,sm8650-gcc.h>
+#include <dt-bindings/clock/qcom,sm8650-tcsr.h>
+
+#include "clock-qcom.h"
+
+/* On-board TCXO, TOFIX get from DT */
+#define TCXO_RATE 38400000
+
+/* bi_tcxo_div2 divided after RPMh output */
+#define TCXO_DIV2_RATE (TCXO_RATE / 2)
+
+static const struct freq_tbl ftbl_gcc_qupv3_wrap1_s3_clk_src[] = {
+ F(7372800, CFG_CLK_SRC_GPLL0_EVEN, 1, 384, 15625),
+ F(14745600, CFG_CLK_SRC_GPLL0_EVEN, 1, 768, 15625),
+ F(19200000, CFG_CLK_SRC_CXO, 1, 0, 0),
+ F(29491200, CFG_CLK_SRC_GPLL0_EVEN, 1, 1536, 15625),
+ F(32000000, CFG_CLK_SRC_GPLL0_EVEN, 1, 8, 75),
+ F(48000000, CFG_CLK_SRC_GPLL0_EVEN, 1, 4, 25),
+ F(64000000, CFG_CLK_SRC_GPLL0_EVEN, 1, 16, 75),
+ F(75000000, CFG_CLK_SRC_GPLL0_EVEN, 4, 0, 0),
+ F(80000000, CFG_CLK_SRC_GPLL0_EVEN, 1, 4, 15),
+ F(96000000, CFG_CLK_SRC_GPLL0_EVEN, 1, 8, 25),
+ F(100000000, CFG_CLK_SRC_GPLL0, 6, 0, 0),
+ { }
+};
+
+static const struct freq_tbl ftbl_gcc_sdcc2_apps_clk_src[] = {
+ F(400000, CFG_CLK_SRC_CXO, 12, 1, 4),
+ F(25000000, CFG_CLK_SRC_GPLL0_EVEN, 12, 0, 0),
+ F(100000000, CFG_CLK_SRC_GPLL0_EVEN, 3, 0, 0),
+ /* TOFIX F(202000000, CFG_CLK_SRC_GPLL9, 4, 0, 0), */
+ { }
+};
+
+static const struct freq_tbl ftbl_gcc_usb30_prim_master_clk_src[] = {
+ F(66666667, CFG_CLK_SRC_GPLL0_EVEN, 4.5, 0, 0),
+ F(133333333, CFG_CLK_SRC_GPLL0, 4.5, 0, 0),
+ F(200000000, CFG_CLK_SRC_GPLL0, 3, 0, 0),
+ F(240000000, CFG_CLK_SRC_GPLL0, 2.5, 0, 0),
+ { }
+};
+
+static ulong sm8650_set_rate(struct clk *clk, ulong rate)
+{
+ struct msm_clk_priv *priv = dev_get_priv(clk->dev);
+ const struct freq_tbl *freq;
+
+ switch (clk->id) {
+ case GCC_QUPV3_WRAP2_S7_CLK: /* UART15 */
+ freq = qcom_find_freq(ftbl_gcc_qupv3_wrap1_s3_clk_src, rate);
+ clk_rcg_set_rate_mnd(priv->base, 0x1e898,
+ freq->pre_div, freq->m, freq->n, freq->src, 16);
+ return freq->freq;
+ case GCC_SDCC2_APPS_CLK:
+ freq = qcom_find_freq(ftbl_gcc_sdcc2_apps_clk_src, rate);
+ clk_rcg_set_rate_mnd(priv->base, 0x14018,
+ freq->pre_div, freq->m, freq->n, freq->src, 8);
+ return freq->freq;
+ case GCC_USB30_PRIM_MASTER_CLK:
+ freq = qcom_find_freq(ftbl_gcc_usb30_prim_master_clk_src, rate);
+ clk_rcg_set_rate_mnd(priv->base, 0x3902c,
+ freq->pre_div, freq->m, freq->n, freq->src, 8);
+ return freq->freq;
+ case GCC_USB30_PRIM_MOCK_UTMI_CLK:
+ clk_rcg_set_rate(priv->base, 0x39044, 0, 0);
+ return TCXO_DIV2_RATE;
+ case GCC_USB3_PRIM_PHY_AUX_CLK_SRC:
+ clk_rcg_set_rate(priv->base, 0x39070, 0, 0);
+ return TCXO_DIV2_RATE;
+ default:
+ return 0;
+ }
+}
+
+static const struct gate_clk sm8650_clks[] = {
+ GATE_CLK(GCC_AGGRE_NOC_PCIE_AXI_CLK, 0x52000, BIT(12)),
+ GATE_CLK(GCC_AGGRE_UFS_PHY_AXI_CLK, 0x770e4, BIT(0)),
+ GATE_CLK(GCC_AGGRE_UFS_PHY_AXI_HW_CTL_CLK, 0x770e4, BIT(1)),
+ GATE_CLK(GCC_AGGRE_USB3_PRIM_AXI_CLK, 0x3908c, BIT(0)),
+ GATE_CLK(GCC_CNOC_PCIE_SF_AXI_CLK, 0x52008, BIT(6)),
+ GATE_CLK(GCC_DDRSS_GPU_AXI_CLK, 0x71154, BIT(0)),
+ GATE_CLK(GCC_DDRSS_PCIE_SF_QTB_CLK, 0x52000, BIT(19)),
+ GATE_CLK(GCC_PCIE_0_AUX_CLK, 0x52008, BIT(3)),
+ GATE_CLK(GCC_PCIE_0_CFG_AHB_CLK, 0x52008, BIT(2)),
+ GATE_CLK(GCC_PCIE_0_MSTR_AXI_CLK, 0x52008, BIT(1)),
+ GATE_CLK(GCC_PCIE_0_PHY_RCHNG_CLK, 0x52000, BIT(22)),
+ GATE_CLK(GCC_PCIE_0_PIPE_CLK, 0x52008, BIT(4)),
+ GATE_CLK(GCC_PCIE_0_SLV_AXI_CLK, 0x52008, BIT(0)),
+ GATE_CLK(GCC_PCIE_0_SLV_Q2A_AXI_CLK, 0x52008, BIT(5)),
+ GATE_CLK(GCC_PCIE_1_AUX_CLK, 0x52000, BIT(29)),
+ GATE_CLK(GCC_PCIE_1_CFG_AHB_CLK, 0x52000, BIT(28)),
+ GATE_CLK(GCC_PCIE_1_MSTR_AXI_CLK, 0x52000, BIT(27)),
+ GATE_CLK(GCC_PCIE_1_PHY_AUX_CLK, 0x52000, BIT(24)),
+ GATE_CLK(GCC_PCIE_1_PHY_RCHNG_CLK, 0x52000, BIT(23)),
+ GATE_CLK(GCC_PCIE_1_PIPE_CLK, 0x52000, BIT(30)),
+ GATE_CLK(GCC_PCIE_1_SLV_AXI_CLK, 0x52000, BIT(26)),
+ GATE_CLK(GCC_PCIE_1_SLV_Q2A_AXI_CLK, 0x52000, BIT(25)),
+ GATE_CLK(GCC_QUPV3_I2C_CORE_CLK, 0x52008, BIT(8)),
+ GATE_CLK(GCC_QUPV3_I2C_S0_CLK, 0x52008, BIT(10)),
+ GATE_CLK(GCC_QUPV3_I2C_S1_CLK, 0x52008, BIT(11)),
+ GATE_CLK(GCC_QUPV3_I2C_S2_CLK, 0x52008, BIT(12)),
+ GATE_CLK(GCC_QUPV3_I2C_S3_CLK, 0x52008, BIT(13)),
+ GATE_CLK(GCC_QUPV3_I2C_S4_CLK, 0x52008, BIT(14)),
+ GATE_CLK(GCC_QUPV3_I2C_S5_CLK, 0x52008, BIT(15)),
+ GATE_CLK(GCC_QUPV3_I2C_S6_CLK, 0x52008, BIT(16)),
+ GATE_CLK(GCC_QUPV3_I2C_S7_CLK, 0x52008, BIT(17)),
+ GATE_CLK(GCC_QUPV3_I2C_S8_CLK, 0x52010, BIT(14)),
+ GATE_CLK(GCC_QUPV3_I2C_S9_CLK, 0x52010, BIT(15)),
+ GATE_CLK(GCC_QUPV3_I2C_S_AHB_CLK, 0x52008, BIT(7)),
+ GATE_CLK(GCC_QUPV3_WRAP1_CORE_2X_CLK, 0x52008, BIT(18)),
+ GATE_CLK(GCC_QUPV3_WRAP1_CORE_CLK, 0x52008, BIT(19)),
+ GATE_CLK(GCC_QUPV3_WRAP1_S0_CLK, 0x52008, BIT(22)),
+ GATE_CLK(GCC_QUPV3_WRAP1_S1_CLK, 0x52008, BIT(23)),
+ GATE_CLK(GCC_QUPV3_WRAP1_S2_CLK, 0x52008, BIT(24)),
+ GATE_CLK(GCC_QUPV3_WRAP1_S3_CLK, 0x52008, BIT(25)),
+ GATE_CLK(GCC_QUPV3_WRAP1_S4_CLK, 0x52008, BIT(26)),
+ GATE_CLK(GCC_QUPV3_WRAP1_S5_CLK, 0x52008, BIT(27)),
+ GATE_CLK(GCC_QUPV3_WRAP1_S6_CLK, 0x52008, BIT(28)),
+ GATE_CLK(GCC_QUPV3_WRAP1_S7_CLK, 0x52010, BIT(16)),
+ GATE_CLK(GCC_QUPV3_WRAP2_CORE_2X_CLK, 0x52010, BIT(3)),
+ GATE_CLK(GCC_QUPV3_WRAP2_CORE_CLK, 0x52010, BIT(0)),
+ GATE_CLK(GCC_QUPV3_WRAP2_S0_CLK, 0x52010, BIT(4)),
+ GATE_CLK(GCC_QUPV3_WRAP2_S1_CLK, 0x52010, BIT(5)),
+ GATE_CLK(GCC_QUPV3_WRAP2_S2_CLK, 0x52010, BIT(6)),
+ GATE_CLK(GCC_QUPV3_WRAP2_S3_CLK, 0x52010, BIT(7)),
+ GATE_CLK(GCC_QUPV3_WRAP2_S4_CLK, 0x52010, BIT(8)),
+ GATE_CLK(GCC_QUPV3_WRAP2_S5_CLK, 0x52010, BIT(9)),
+ GATE_CLK(GCC_QUPV3_WRAP2_S6_CLK, 0x52010, BIT(10)),
+ GATE_CLK(GCC_QUPV3_WRAP2_S7_CLK, 0x52010, BIT(17)),
+ GATE_CLK(GCC_QUPV3_WRAP_1_M_AHB_CLK, 0x52008, BIT(20)),
+ GATE_CLK(GCC_QUPV3_WRAP_1_S_AHB_CLK, 0x52008, BIT(21)),
+ GATE_CLK(GCC_QUPV3_WRAP_2_M_AHB_CLK, 0x52010, BIT(2)),
+ GATE_CLK(GCC_QUPV3_WRAP_2_S_AHB_CLK, 0x52010, BIT(1)),
+ GATE_CLK(GCC_SDCC2_AHB_CLK, 0x14010, BIT(0)),
+ GATE_CLK(GCC_SDCC2_APPS_CLK, 0x14004, BIT(0)),
+ GATE_CLK(GCC_UFS_PHY_AHB_CLK, 0x77024, BIT(0)),
+ GATE_CLK(GCC_UFS_PHY_AXI_CLK, 0x77018, BIT(0)),
+ GATE_CLK(GCC_UFS_PHY_AXI_HW_CTL_CLK, 0x77018, BIT(1)),
+ GATE_CLK(GCC_UFS_PHY_ICE_CORE_CLK, 0x77074, BIT(0)),
+ GATE_CLK(GCC_UFS_PHY_ICE_CORE_HW_CTL_CLK, 0x77074, BIT(1)),
+ GATE_CLK(GCC_UFS_PHY_PHY_AUX_CLK, 0x770b0, BIT(0)),
+ GATE_CLK(GCC_UFS_PHY_PHY_AUX_HW_CTL_CLK, 0x770b0, BIT(1)),
+ GATE_CLK(GCC_UFS_PHY_RX_SYMBOL_0_CLK, 0x7702c, BIT(0)),
+ GATE_CLK(GCC_UFS_PHY_RX_SYMBOL_1_CLK, 0x770cc, BIT(0)),
+ GATE_CLK(GCC_UFS_PHY_TX_SYMBOL_0_CLK, 0x77028, BIT(0)),
+ GATE_CLK(GCC_UFS_PHY_UNIPRO_CORE_CLK, 0x77068, BIT(0)),
+ GATE_CLK(GCC_UFS_PHY_UNIPRO_CORE_HW_CTL_CLK, 0x77068, BIT(1)),
+ GATE_CLK(GCC_USB30_PRIM_MASTER_CLK, 0x39018, BIT(0)),
+ GATE_CLK(GCC_USB30_PRIM_MOCK_UTMI_CLK, 0x39028, BIT(0)),
+ GATE_CLK(GCC_USB30_PRIM_SLEEP_CLK, 0x39024, BIT(0)),
+ GATE_CLK(GCC_USB3_PRIM_PHY_AUX_CLK, 0x39060, BIT(0)),
+ GATE_CLK(GCC_USB3_PRIM_PHY_COM_AUX_CLK, 0x39064, BIT(0)),
+ GATE_CLK(GCC_USB3_PRIM_PHY_PIPE_CLK, 0x39068, BIT(0)),
+};
+
+static int sm8650_enable(struct clk *clk)
+{
+ struct msm_clk_priv *priv = dev_get_priv(clk->dev);
+
+ switch (clk->id) {
+ case GCC_AGGRE_USB3_PRIM_AXI_CLK:
+ qcom_gate_clk_en(priv, GCC_USB30_PRIM_MASTER_CLK);
+ fallthrough;
+ case GCC_USB30_PRIM_MASTER_CLK:
+ qcom_gate_clk_en(priv, GCC_USB3_PRIM_PHY_AUX_CLK);
+ qcom_gate_clk_en(priv, GCC_USB3_PRIM_PHY_COM_AUX_CLK);
+ break;
+ }
+
+ qcom_gate_clk_en(priv, clk->id);
+
+ return 0;
+}
+
+static const struct qcom_reset_map sm8650_gcc_resets[] = {
+ [GCC_CAMERA_BCR] = { 0x26000 },
+ [GCC_DISPLAY_BCR] = { 0x27000 },
+ [GCC_GPU_BCR] = { 0x71000 },
+ [GCC_PCIE_0_BCR] = { 0x6b000 },
+ [GCC_PCIE_0_LINK_DOWN_BCR] = { 0x6c014 },
+ [GCC_PCIE_0_NOCSR_COM_PHY_BCR] = { 0x6c020 },
+ [GCC_PCIE_0_PHY_BCR] = { 0x6c01c },
+ [GCC_PCIE_0_PHY_NOCSR_COM_PHY_BCR] = { 0x6c028 },
+ [GCC_PCIE_1_BCR] = { 0x8d000 },
+ [GCC_PCIE_1_LINK_DOWN_BCR] = { 0x8e014 },
+ [GCC_PCIE_1_NOCSR_COM_PHY_BCR] = { 0x8e020 },
+ [GCC_PCIE_1_PHY_BCR] = { 0x8e01c },
+ [GCC_PCIE_1_PHY_NOCSR_COM_PHY_BCR] = { 0x8e024 },
+ [GCC_PCIE_PHY_BCR] = { 0x6f000 },
+ [GCC_PCIE_PHY_CFG_AHB_BCR] = { 0x6f00c },
+ [GCC_PCIE_PHY_COM_BCR] = { 0x6f010 },
+ [GCC_PDM_BCR] = { 0x33000 },
+ [GCC_QUPV3_WRAPPER_1_BCR] = { 0x18000 },
+ [GCC_QUPV3_WRAPPER_2_BCR] = { 0x1e000 },
+ [GCC_QUPV3_WRAPPER_3_BCR] = { 0x19000 },
+ [GCC_QUPV3_WRAPPER_I2C_BCR] = { 0x17000 },
+ [GCC_QUSB2PHY_PRIM_BCR] = { 0x12000 },
+ [GCC_QUSB2PHY_SEC_BCR] = { 0x12004 },
+ [GCC_SDCC2_BCR] = { 0x14000 },
+ [GCC_SDCC4_BCR] = { 0x16000 },
+ [GCC_UFS_PHY_BCR] = { 0x77000 },
+ [GCC_USB30_PRIM_BCR] = { 0x39000 },
+ [GCC_USB3_DP_PHY_PRIM_BCR] = { 0x50008 },
+ [GCC_USB3_DP_PHY_SEC_BCR] = { 0x50014 },
+ [GCC_USB3_PHY_PRIM_BCR] = { 0x50000 },
+ [GCC_USB3_PHY_SEC_BCR] = { 0x5000c },
+ [GCC_USB3PHY_PHY_PRIM_BCR] = { 0x50004 },
+ [GCC_USB3PHY_PHY_SEC_BCR] = { 0x50010 },
+ [GCC_VIDEO_AXI0_CLK_ARES] = { 0x32018, 2 },
+ [GCC_VIDEO_AXI1_CLK_ARES] = { 0x32024, 2 },
+ [GCC_VIDEO_BCR] = { 0x32000 },
+};
+
+static const struct qcom_power_map sm8650_gdscs[] = {
+ [PCIE_0_GDSC] = { 0x6b004 },
+ [PCIE_0_PHY_GDSC] = { 0x6c000 },
+ [PCIE_1_GDSC] = { 0x8d004 },
+ [PCIE_1_PHY_GDSC] = { 0x8e000 },
+ [UFS_PHY_GDSC] = { 0x77004 },
+ [UFS_MEM_PHY_GDSC] = { 0x9e000 },
+ [USB30_PRIM_GDSC] = { 0x39004 },
+ [USB3_PHY_GDSC] = { 0x50018 },
+};
+
+static struct msm_clk_data sm8650_gcc_data = {
+ .resets = sm8650_gcc_resets,
+ .num_resets = ARRAY_SIZE(sm8650_gcc_resets),
+ .clks = sm8650_clks,
+ .num_clks = ARRAY_SIZE(sm8650_clks),
+ .power_domains = sm8650_gdscs,
+ .num_power_domains = ARRAY_SIZE(sm8650_gdscs),
+
+ .enable = sm8650_enable,
+ .set_rate = sm8650_set_rate,
+};
+
+static const struct udevice_id gcc_sm8650_of_match[] = {
+ {
+ .compatible = "qcom,sm8650-gcc",
+ .data = (ulong)&sm8650_gcc_data,
+ },
+ { }
+};
+
+U_BOOT_DRIVER(gcc_sm8650) = {
+ .name = "gcc_sm8650",
+ .id = UCLASS_NOP,
+ .of_match = gcc_sm8650_of_match,
+ .bind = qcom_cc_bind,
+ .flags = DM_FLAG_PRE_RELOC | DM_FLAG_DEFAULT_PD_CTRL_OFF,
+};
+
+/* TCSRCC */
+
+static const struct gate_clk sm8650_tcsr_clks[] = {
+ GATE_CLK(TCSR_PCIE_0_CLKREF_EN, 0x31100, BIT(0)),
+ GATE_CLK(TCSR_PCIE_1_CLKREF_EN, 0x31114, BIT(0)),
+ GATE_CLK(TCSR_UFS_CLKREF_EN, 0x31110, BIT(0)),
+ GATE_CLK(TCSR_UFS_PAD_CLKREF_EN, 0x31104, BIT(0)),
+ GATE_CLK(TCSR_USB2_CLKREF_EN, 0x31118, BIT(0)),
+ GATE_CLK(TCSR_USB3_CLKREF_EN, 0x31108, BIT(0)),
+};
+
+static struct msm_clk_data sm8650_tcsrcc_data = {
+ .clks = sm8650_tcsr_clks,
+ .num_clks = ARRAY_SIZE(sm8650_tcsr_clks),
+};
+
+static int tcsrcc_sm8650_clk_enable(struct clk *clk)
+{
+ struct msm_clk_priv *priv = dev_get_priv(clk->dev);
+
+ qcom_gate_clk_en(priv, clk->id);
+
+ return 0;
+}
+
+static ulong tcsrcc_sm8650_clk_get_rate(struct clk *clk)
+{
+ return TCXO_RATE;
+}
+
+static int tcsrcc_sm8650_clk_probe(struct udevice *dev)
+{
+ struct msm_clk_data *data = (struct msm_clk_data *)dev_get_driver_data(dev);
+ struct msm_clk_priv *priv = dev_get_priv(dev);
+
+ priv->base = dev_read_addr(dev);
+ if (priv->base == FDT_ADDR_T_NONE)
+ return -EINVAL;
+
+ priv->data = data;
+
+ return 0;
+}
+
+static struct clk_ops tcsrcc_sm8650_clk_ops = {
+ .enable = tcsrcc_sm8650_clk_enable,
+ .get_rate = tcsrcc_sm8650_clk_get_rate,
+};
+
+static const struct udevice_id tcsrcc_sm8650_of_match[] = {
+ {
+ .compatible = "qcom,sm8650-tcsr",
+ .data = (ulong)&sm8650_tcsrcc_data,
+ },
+ { }
+};
+
+U_BOOT_DRIVER(tcsrcc_sm8650) = {
+ .name = "tcsrcc_sm8650",
+ .id = UCLASS_CLK,
+ .of_match = tcsrcc_sm8650_of_match,
+ .ops = &tcsrcc_sm8650_clk_ops,
+ .priv_auto = sizeof(struct msm_clk_priv),
+ .probe = tcsrcc_sm8650_clk_probe,
+ .flags = DM_FLAG_PRE_RELOC | DM_FLAG_DEFAULT_PD_CTRL_OFF,
+};
diff --git a/drivers/clk/renesas/rzg2l-cpg.c b/drivers/clk/renesas/rzg2l-cpg.c
index dba0099..c8735d8 100644
--- a/drivers/clk/renesas/rzg2l-cpg.c
+++ b/drivers/clk/renesas/rzg2l-cpg.c
@@ -313,9 +313,9 @@
/*
* As per the HW manual, we should not directly switch from 533 MHz to
- * 400 MHz and vice versa. To change the setting from 2’b01 (533 MHz)
- * to 2’b10 (400 MHz) or vice versa, Switch to 2’b11 (266 MHz) first,
- * and then switch to the target setting (2’b01 (533 MHz) or 2’b10
+ * 400 MHz and vice versa. To change the setting from 2'b01 (533 MHz)
+ * to 2'b10 (400 MHz) or vice versa, Switch to 2'b11 (266 MHz) first,
+ * and then switch to the target setting (2'b01 (533 MHz) or 2'b10
* (400 MHz)).
*/
if (new_sel != SEL_SDHI_266MHz && prev_sel != SEL_SDHI_266MHz) {
diff --git a/drivers/clk/rockchip/clk_pll.c b/drivers/clk/rockchip/clk_pll.c
index 66f8bb1..44c6f14 100644
--- a/drivers/clk/rockchip/clk_pll.c
+++ b/drivers/clk/rockchip/clk_pll.c
@@ -2,7 +2,6 @@
/*
* (C) Copyright 2018-2019 Rockchip Electronics Co., Ltd
*/
- #include <common.h>
#include <bitfield.h>
#include <clk-uclass.h>
#include <dm.h>
diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index 2875c15..d7825c6 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -3,7 +3,6 @@
* (C) Copyright 2017 Rockchip Electronics Co., Ltd
*/
-#include <common.h>
#include <bitfield.h>
#include <clk-uclass.h>
#include <dm.h>
diff --git a/drivers/clk/rockchip/clk_rk3036.c b/drivers/clk/rockchip/clk_rk3036.c
index 6238b14..274428f 100644
--- a/drivers/clk/rockchip/clk_rk3036.c
+++ b/drivers/clk/rockchip/clk_rk3036.c
@@ -3,7 +3,6 @@
* (C) Copyright 2015 Google, Inc
*/
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <errno.h>
diff --git a/drivers/clk/rockchip/clk_rk3066.c b/drivers/clk/rockchip/clk_rk3066.c
index f83335d..f7dea78 100644
--- a/drivers/clk/rockchip/clk_rk3066.c
+++ b/drivers/clk/rockchip/clk_rk3066.c
@@ -5,7 +5,6 @@
*/
#include <bitfield.h>
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <dt-structs.h>
diff --git a/drivers/clk/rockchip/clk_rk3128.c b/drivers/clk/rockchip/clk_rk3128.c
index 182754e..a072855 100644
--- a/drivers/clk/rockchip/clk_rk3128.c
+++ b/drivers/clk/rockchip/clk_rk3128.c
@@ -3,7 +3,6 @@
* (C) Copyright 2017 Rockchip Electronics Co., Ltd
*/
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <errno.h>
diff --git a/drivers/clk/rockchip/clk_rk3188.c b/drivers/clk/rockchip/clk_rk3188.c
index f98b46a..f569a10 100644
--- a/drivers/clk/rockchip/clk_rk3188.c
+++ b/drivers/clk/rockchip/clk_rk3188.c
@@ -4,7 +4,6 @@
* (C) Copyright 2016 Heiko Stuebner <heiko@sntech.de>
*/
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <dt-structs.h>
diff --git a/drivers/clk/rockchip/clk_rk322x.c b/drivers/clk/rockchip/clk_rk322x.c
index 9371c4f..9b71fd8 100644
--- a/drivers/clk/rockchip/clk_rk322x.c
+++ b/drivers/clk/rockchip/clk_rk322x.c
@@ -3,7 +3,6 @@
* (C) Copyright 2017 Rockchip Electronics Co., Ltd
*/
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <errno.h>
diff --git a/drivers/clk/rockchip/clk_rk3288.c b/drivers/clk/rockchip/clk_rk3288.c
index 0b7eefa..432a792 100644
--- a/drivers/clk/rockchip/clk_rk3288.c
+++ b/drivers/clk/rockchip/clk_rk3288.c
@@ -3,7 +3,6 @@
* (C) Copyright 2015 Google, Inc
*/
-#include <common.h>
#include <bitfield.h>
#include <clk-uclass.h>
#include <div64.h>
diff --git a/drivers/clk/rockchip/clk_rk3308.c b/drivers/clk/rockchip/clk_rk3308.c
index 7755b01..e73bb67 100644
--- a/drivers/clk/rockchip/clk_rk3308.c
+++ b/drivers/clk/rockchip/clk_rk3308.c
@@ -2,7 +2,6 @@
/*
* (C) Copyright 2017-2019 Rockchip Electronics Co., Ltd
*/
-#include <common.h>
#include <bitfield.h>
#include <clk-uclass.h>
#include <dm.h>
@@ -12,8 +11,8 @@
#include <malloc.h>
#include <syscon.h>
#include <asm/global_data.h>
-#include <asm/arch/cru_rk3308.h>
#include <asm/arch-rockchip/clock.h>
+#include <asm/arch-rockchip/cru_rk3308.h>
#include <asm/arch-rockchip/hardware.h>
#include <dm/device-internal.h>
#include <dm/lists.h>
@@ -65,6 +64,57 @@
RK3308_MODE_CON, 6, 10, 0, NULL),
};
+/*
+ *
+ * rational_best_approximation(31415, 10000,
+ * (1 << 8) - 1, (1 << 5) - 1, &n, &d);
+ *
+ * you may look at given_numerator as a fixed point number,
+ * with the fractional part size described in given_denominator.
+ *
+ * for theoretical background, see:
+ * http://en.wikipedia.org/wiki/Continued_fraction
+ */
+static void rational_best_approximation(unsigned long given_numerator,
+ unsigned long given_denominator,
+ unsigned long max_numerator,
+ unsigned long max_denominator,
+ unsigned long *best_numerator,
+ unsigned long *best_denominator)
+{
+ unsigned long n, d, n0, d0, n1, d1;
+
+ n = given_numerator;
+ d = given_denominator;
+ n0 = 0;
+ d1 = 0;
+ n1 = 1;
+ d0 = 1;
+ for (;;) {
+ unsigned long t, a;
+
+ if (n1 > max_numerator || d1 > max_denominator) {
+ n1 = n0;
+ d1 = d0;
+ break;
+ }
+ if (d == 0)
+ break;
+ t = d;
+ a = n / d;
+ d = n % d;
+ n = t;
+ t = n0 + a * n1;
+ n0 = n1;
+ n1 = t;
+ t = d0 + a * d1;
+ d0 = d1;
+ d1 = t;
+ }
+ *best_numerator = n1;
+ *best_denominator = d1;
+}
+
static ulong rk3308_armclk_set_clk(struct rk3308_clk_priv *priv, ulong hz)
{
struct rk3308_cru *cru = priv->cru;
@@ -832,6 +882,44 @@
return rk3308_crypto_get_clk(priv, clk_id);
}
+static ulong rk3308_rtc32k_get_clk(struct rk3308_clk_priv *priv, ulong clk_id)
+{
+ struct rk3308_cru *cru = priv->cru;
+ unsigned long m, n;
+ u32 con, fracdiv;
+
+ con = readl(&cru->clksel_con[2]);
+ if ((con & CLK_RTC32K_SEL_MASK) >> CLK_RTC32K_SEL_SHIFT !=
+ CLK_RTC32K_FRAC_DIV)
+ return -EINVAL;
+
+ fracdiv = readl(&cru->clksel_con[3]);
+ m = fracdiv & CLK_RTC32K_FRAC_NUMERATOR_MASK;
+ m >>= CLK_RTC32K_FRAC_NUMERATOR_SHIFT;
+ n = fracdiv & CLK_RTC32K_FRAC_DENOMINATOR_MASK;
+ n >>= CLK_RTC32K_FRAC_DENOMINATOR_SHIFT;
+
+ return OSC_HZ * m / n;
+}
+
+static ulong rk3308_rtc32k_set_clk(struct rk3308_clk_priv *priv, ulong clk_id,
+ ulong hz)
+{
+ struct rk3308_cru *cru = priv->cru;
+ unsigned long m, n, val;
+
+ rational_best_approximation(hz, OSC_HZ,
+ GENMASK(16 - 1, 0),
+ GENMASK(16 - 1, 0),
+ &m, &n);
+ val = m << CLK_RTC32K_FRAC_NUMERATOR_SHIFT | n;
+ writel(val, &cru->clksel_con[3]);
+ rk_clrsetreg(&cru->clksel_con[2], CLK_RTC32K_SEL_MASK,
+ CLK_RTC32K_FRAC_DIV << CLK_RTC32K_SEL_SHIFT);
+
+ return rk3308_rtc32k_get_clk(priv, clk_id);
+}
+
static ulong rk3308_clk_get_rate(struct clk *clk)
{
struct rk3308_clk_priv *priv = dev_get_priv(clk->dev);
@@ -912,6 +1000,9 @@
case SCLK_CRYPTO_APK:
rate = rk3308_crypto_get_clk(priv, clk->id);
break;
+ case SCLK_RTC32K:
+ rate = rk3308_rtc32k_get_clk(priv, clk->id);
+ break;
default:
return -ENOENT;
}
@@ -990,6 +1081,11 @@
case SCLK_CRYPTO_APK:
ret = rk3308_crypto_set_clk(priv, clk->id, rate);
break;
+ case SCLK_RTC32K:
+ ret = rk3308_rtc32k_set_clk(priv, clk->id, rate);
+ break;
+ case USB480M:
+ return 0;
default:
return -ENOENT;
}
@@ -1022,6 +1118,8 @@
switch (clk->id) {
case SCLK_MAC:
return rk3308_mac_set_parent(clk, parent);
+ case USB480M:
+ return 0;
default:
break;
}
diff --git a/drivers/clk/rockchip/clk_rk3328.c b/drivers/clk/rockchip/clk_rk3328.c
index cfec1d9..4b94d63 100644
--- a/drivers/clk/rockchip/clk_rk3328.c
+++ b/drivers/clk/rockchip/clk_rk3328.c
@@ -3,7 +3,6 @@
* (C) Copyright 2017 Rockchip Electronics Co., Ltd
*/
-#include <common.h>
#include <bitfield.h>
#include <clk-uclass.h>
#include <dm.h>
@@ -178,6 +177,10 @@
CLK_I2C3_DIV_CON_SHIFT = 8,
CLK_I2C2_PLL_SEL_SHIFT = 7,
CLK_I2C2_DIV_CON_SHIFT = 0,
+
+ /* CLKSEL_CON40 */
+ CLK_HDMIPHY_DIV_CON_SHIFT = 3,
+ CLK_HDMIPHY_DIV_CON_MASK = 0x7 << CLK_HDMIPHY_DIV_CON_SHIFT,
};
#define VCO_MAX_KHZ (3200 * (MHz / KHz))
@@ -580,6 +583,96 @@
return rk3328_spi_get_clk(cru);
}
+#ifndef CONFIG_SPL_BUILD
+static ulong rk3328_vop_get_clk(struct rk3328_clk_priv *priv, ulong clk_id)
+{
+ struct rk3328_cru *cru = priv->cru;
+ u32 div, con, parent;
+
+ switch (clk_id) {
+ case ACLK_VOP_PRE:
+ con = readl(&cru->clksel_con[39]);
+ div = (con & ACLK_VOP_DIV_CON_MASK) >> ACLK_VOP_DIV_CON_SHIFT;
+ parent = GPLL_HZ;
+ break;
+ case ACLK_VIO_PRE:
+ con = readl(&cru->clksel_con[37]);
+ div = (con & ACLK_VIO_DIV_CON_MASK) >> ACLK_VIO_DIV_CON_SHIFT;
+ parent = GPLL_HZ;
+ break;
+ case DCLK_LCDC:
+ con = readl(&cru->clksel_con[40]);
+ div = (con & DCLK_LCDC_DIV_CON_MASK) >> DCLK_LCDC_DIV_CON_SHIFT;
+ parent = GPLL_HZ;
+ break;
+ default:
+ printf("%s: Unsupported vop get clk#%ld\n", __func__, clk_id);
+ return -ENOENT;
+ }
+
+ return DIV_TO_RATE(parent, div);
+}
+
+static ulong rk3328_vop_set_clk(struct rk3328_clk_priv *priv,
+ ulong clk_id, uint hz)
+{
+ struct rk3328_cru *cru = priv->cru;
+ int src_clk_div;
+ u32 con, parent;
+
+ src_clk_div = DIV_ROUND_UP(GPLL_HZ, hz);
+ assert(src_clk_div - 1 < 31);
+
+ switch (clk_id) {
+ case ACLK_VOP_PRE:
+ rk_clrsetreg(&cru->clksel_con[39],
+ ACLK_VOP_PLL_SEL_MASK | ACLK_VOP_DIV_CON_MASK,
+ ACLK_VOP_PLL_SEL_CPLL << ACLK_VOP_PLL_SEL_SHIFT |
+ (src_clk_div - 1) << ACLK_VOP_DIV_CON_SHIFT);
+ break;
+ case ACLK_VIO_PRE:
+ rk_clrsetreg(&cru->clksel_con[37],
+ ACLK_VIO_PLL_SEL_MASK | ACLK_VIO_DIV_CON_MASK,
+ ACLK_VIO_PLL_SEL_CPLL << ACLK_VIO_PLL_SEL_SHIFT |
+ (src_clk_div - 1) << ACLK_VIO_DIV_CON_SHIFT);
+ break;
+ case DCLK_LCDC:
+ con = readl(&cru->clksel_con[40]);
+ con = (con & DCLK_LCDC_SEL_MASK) >> DCLK_LCDC_SEL_SHIFT;
+ if (con) {
+ parent = readl(&cru->clksel_con[40]);
+ parent = (parent & DCLK_LCDC_PLL_SEL_MASK) >>
+ DCLK_LCDC_PLL_SEL_SHIFT;
+ if (parent)
+ src_clk_div = DIV_ROUND_UP(GPLL_HZ, hz);
+ else
+ src_clk_div = DIV_ROUND_UP(GPLL_HZ, hz);
+
+ rk_clrsetreg(&cru->clksel_con[40],
+ DCLK_LCDC_DIV_CON_MASK,
+ (src_clk_div - 1) <<
+ DCLK_LCDC_DIV_CON_SHIFT);
+ }
+ break;
+ default:
+ printf("%s: Unable to set vop clk#%ld\n", __func__, clk_id);
+ return -EINVAL;
+ }
+
+ return rk3328_vop_get_clk(priv, clk_id);
+}
+#endif
+
+static ulong rk3328_hdmiphy_get_clk(struct rk3328_cru *cru)
+{
+ u32 div, con;
+
+ con = readl(&cru->clksel_con[40]);
+ div = (con & CLK_HDMIPHY_DIV_CON_MASK) >> CLK_HDMIPHY_DIV_CON_SHIFT;
+
+ return DIV_TO_RATE(GPLL_HZ, div);
+}
+
static ulong rk3328_clk_get_rate(struct clk *clk)
{
struct rk3328_clk_priv *priv = dev_get_priv(clk->dev);
@@ -609,6 +702,9 @@
case SCLK_SPI:
rate = rk3328_spi_get_clk(priv->cru);
break;
+ case PCLK_HDMIPHY:
+ rate = rk3328_hdmiphy_get_clk(priv->cru);
+ break;
default:
return -ENOENT;
}
@@ -648,7 +744,13 @@
case SCLK_SPI:
ret = rk3328_spi_set_clk(priv->cru, rate);
break;
+#ifndef CONFIG_SPL_BUILD
case DCLK_LCDC:
+ case ACLK_VOP_PRE:
+ case ACLK_VIO_PRE:
+ rate = rk3328_vop_set_clk(priv, clk->id, rate);
+ break;
+#endif
case SCLK_PDM:
case SCLK_RTC32K:
case SCLK_UART0:
@@ -663,11 +765,9 @@
case ACLK_PERI_PRE:
case HCLK_PERI:
case PCLK_PERI:
- case ACLK_VIO_PRE:
case HCLK_VIO_PRE:
case ACLK_RGA_PRE:
case SCLK_RGA:
- case ACLK_VOP_PRE:
case ACLK_RKVDEC_PRE:
case ACLK_RKVENC:
case ACLK_VPU_PRE:
diff --git a/drivers/clk/rockchip/clk_rk3368.c b/drivers/clk/rockchip/clk_rk3368.c
index 1c5dfaa..d894398 100644
--- a/drivers/clk/rockchip/clk_rk3368.c
+++ b/drivers/clk/rockchip/clk_rk3368.c
@@ -5,7 +5,6 @@
* (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
*/
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <dt-structs.h>
diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index 80f65a2..cc414c3 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -4,7 +4,6 @@
* (C) 2017 Theobroma Systems Design und Consulting GmbH
*/
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <dt-structs.h>
diff --git a/drivers/clk/rockchip/clk_rk3568.c b/drivers/clk/rockchip/clk_rk3568.c
index 57ef27d..3556350 100644
--- a/drivers/clk/rockchip/clk_rk3568.c
+++ b/drivers/clk/rockchip/clk_rk3568.c
@@ -4,7 +4,6 @@
* Author: Elaine Zhang <zhangqing@rock-chips.com>
*/
-#include <common.h>
#include <bitfield.h>
#include <clk-uclass.h>
#include <dm.h>
@@ -1527,28 +1526,20 @@
struct rk3568_cru *cru = priv->cru;
int src_clk;
- switch (rate) {
- case OSC_HZ:
- src_clk = SCLK_SFC_SEL_24M;
- break;
- case 50 * MHz:
- src_clk = SCLK_SFC_SEL_50M;
- break;
- case 75 * MHz:
- src_clk = SCLK_SFC_SEL_75M;
- break;
- case 100 * MHz:
- src_clk = SCLK_SFC_SEL_100M;
- break;
- case 125 * MHz:
- src_clk = SCLK_SFC_SEL_125M;
- break;
- case 150 * MHz:
+ if (rate >= 150 * MHz)
src_clk = SCLK_SFC_SEL_150M;
- break;
- default:
+ else if (rate >= 125 * MHz)
+ src_clk = SCLK_SFC_SEL_125M;
+ else if (rate >= 100 * MHz)
+ src_clk = SCLK_SFC_SEL_100M;
+ else if (rate >= 75 * MHz)
+ src_clk = SCLK_SFC_SEL_75M;
+ else if (rate >= 50 * MHz)
+ src_clk = SCLK_SFC_SEL_50M;
+ else if (rate >= OSC_HZ)
+ src_clk = SCLK_SFC_SEL_24M;
+ else
return -ENOENT;
- }
rk_clrsetreg(&cru->clksel_con[28],
SCLK_SFC_SEL_MASK,
@@ -2417,6 +2408,8 @@
case BCLK_EMMC:
rate = rk3568_emmc_get_bclk(priv);
break;
+ case CLK_USB3OTG0_REF:
+ case CLK_USB3OTG1_REF:
case TCLK_EMMC:
rate = OSC_HZ;
break;
@@ -2596,6 +2589,8 @@
case BCLK_EMMC:
ret = rk3568_emmc_set_bclk(priv, rate);
break;
+ case CLK_USB3OTG0_REF:
+ case CLK_USB3OTG1_REF:
case TCLK_EMMC:
ret = OSC_HZ;
break;
diff --git a/drivers/clk/rockchip/clk_rk3588.c b/drivers/clk/rockchip/clk_rk3588.c
index 8f33843..ceae08a 100644
--- a/drivers/clk/rockchip/clk_rk3588.c
+++ b/drivers/clk/rockchip/clk_rk3588.c
@@ -4,7 +4,6 @@
* Author: Elaine Zhang <zhangqing@rock-chips.com>
*/
-#include <common.h>
#include <bitfield.h>
#include <clk-uclass.h>
#include <dm.h>
@@ -1569,6 +1568,9 @@
case DCLK_DECOM:
rate = rk3588_mmc_get_clk(priv, clk->id);
break;
+ case REF_CLK_USB3OTG0:
+ case REF_CLK_USB3OTG1:
+ case REF_CLK_USB3OTG2:
case TMCLK_EMMC:
case TCLK_WDT0:
rate = OSC_HZ;
@@ -1734,6 +1736,9 @@
case DCLK_DECOM:
ret = rk3588_mmc_set_clk(priv, clk->id, rate);
break;
+ case REF_CLK_USB3OTG0:
+ case REF_CLK_USB3OTG1:
+ case REF_CLK_USB3OTG2:
case TMCLK_EMMC:
case TCLK_WDT0:
ret = OSC_HZ;
diff --git a/drivers/clk/rockchip/clk_rv1108.c b/drivers/clk/rockchip/clk_rv1108.c
index fc442f7..75202a6 100644
--- a/drivers/clk/rockchip/clk_rv1108.c
+++ b/drivers/clk/rockchip/clk_rv1108.c
@@ -4,7 +4,6 @@
* Author: Andy Yan <andy.yan@rock-chips.com>
*/
-#include <common.h>
#include <bitfield.h>
#include <clk-uclass.h>
#include <dm.h>
diff --git a/drivers/clk/rockchip/clk_rv1126.c b/drivers/clk/rockchip/clk_rv1126.c
index cfdfcbd..aeeea95 100644
--- a/drivers/clk/rockchip/clk_rv1126.c
+++ b/drivers/clk/rockchip/clk_rv1126.c
@@ -5,7 +5,6 @@
* Author: Finley Xiao <finley.xiao@rock-chips.com>
*/
-#include <common.h>
#include <bitfield.h>
#include <clk-uclass.h>
#include <dm.h>
diff --git a/drivers/clk/sifive/sifive-prci.c b/drivers/clk/sifive/sifive-prci.c
index c8fb600..5ea8606 100644
--- a/drivers/clk/sifive/sifive-prci.c
+++ b/drivers/clk/sifive/sifive-prci.c
@@ -22,7 +22,6 @@
* https://github.com/riscv/riscv-linux/commit/999529edf517ed75b56659d456d221b2ee56bb60
*/
-#include <common.h>
#include <clk-uclass.h>
#include <clk.h>
#include <dm.h>
diff --git a/drivers/clk/starfive/clk-jh7110-pll.c b/drivers/clk/starfive/clk-jh7110-pll.c
index 1568a1f..5810358 100644
--- a/drivers/clk/starfive/clk-jh7110-pll.c
+++ b/drivers/clk/starfive/clk-jh7110-pll.c
@@ -6,7 +6,6 @@
* Xingyu Wu <xingyu.wu@starfivetech.com>
*/
-#include <common.h>
#include <asm/io.h>
#include <malloc.h>
#include <clk-uclass.h>
diff --git a/drivers/clk/starfive/clk-jh7110.c b/drivers/clk/starfive/clk-jh7110.c
index a386948..191da75 100644
--- a/drivers/clk/starfive/clk-jh7110.c
+++ b/drivers/clk/starfive/clk-jh7110.c
@@ -6,7 +6,6 @@
* Xingyu Wu <xingyu.wu@starfivetech.com>
*/
-#include <common.h>
#include <clk.h>
#include <clk-uclass.h>
#include <dm.h>
diff --git a/drivers/clk/stm32/clk-stm32-core.c b/drivers/clk/stm32/clk-stm32-core.c
index 37e996e..cad07cc 100644
--- a/drivers/clk/stm32/clk-stm32-core.c
+++ b/drivers/clk/stm32/clk-stm32-core.c
@@ -6,7 +6,6 @@
#define LOG_CATEGORY UCLASS_CLK
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <log.h>
diff --git a/drivers/clk/stm32/clk-stm32-core.h b/drivers/clk/stm32/clk-stm32-core.h
index 53c2b46..f9ef070 100644
--- a/drivers/clk/stm32/clk-stm32-core.h
+++ b/drivers/clk/stm32/clk-stm32-core.h
@@ -178,7 +178,7 @@
* ------------------------------ ----------
* Each peripheral requires a bus interface clock, named ckg_bus_perx
- * (for peripheral ‘x’).
+ * (for peripheral `x').
* Some peripherals (SAI, UART...) need also a dedicated clock for their
* communication interface, this clock is generally asynchronous with respect to
* the bus interface clock, and is named kernel clock (ckg_ker_perx).
@@ -188,16 +188,16 @@
* the bus or the Kernel was enable.
*
* Example:
- * 1) enable the bus clock
- * --> bus_clk ref_counting = 1, gate_ref_count = 1
- * 2) enable the kernel clock
- * --> perx_ker_ck ref_counting = 1, gate_ref_count = 2
- * 3) disable kernel clock
- * ---> perx_ker_ck ref_counting = 0, gate_ref_count = 1
- * ==> then i will not gate because gate_ref_count > 0
- * 4) disable bus clock
- * --> bus_clk ref_counting = 0, gate_ref_count = 0
- * ==> then i can gate (write in the register) because
+ * 1) enable the bus clock
+ * --> bus_clk ref_counting = 1, gate_ref_count = 1
+ * 2) enable the kernel clock
+ * --> perx_ker_ck ref_counting = 1, gate_ref_count = 2
+ * 3) disable kernel clock
+ * ---> perx_ker_ck ref_counting = 0, gate_ref_count = 1
+ * ==> then i will not gate because gate_ref_count > 0
+ * 4) disable bus clock
+ * --> bus_clk ref_counting = 0, gate_ref_count = 0
+ * ==> then i can gate (write in the register) because
* gate_ref_count = 0
*/
diff --git a/drivers/clk/stm32/clk-stm32f.c b/drivers/clk/stm32/clk-stm32f.c
index d68c75e..fceb3c4 100644
--- a/drivers/clk/stm32/clk-stm32f.c
+++ b/drivers/clk/stm32/clk-stm32f.c
@@ -6,7 +6,6 @@
#define LOG_CATEGORY UCLASS_CLK
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <log.h>
diff --git a/drivers/clk/stm32/clk-stm32h7.c b/drivers/clk/stm32/clk-stm32h7.c
index d440c28..a554eda 100644
--- a/drivers/clk/stm32/clk-stm32h7.c
+++ b/drivers/clk/stm32/clk-stm32h7.c
@@ -6,7 +6,6 @@
#define LOG_CATEGORY UCLASS_CLK
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <log.h>
diff --git a/drivers/clk/stm32/clk-stm32mp1.c b/drivers/clk/stm32/clk-stm32mp1.c
index 6f000c8..204ac17 100644
--- a/drivers/clk/stm32/clk-stm32mp1.c
+++ b/drivers/clk/stm32/clk-stm32mp1.c
@@ -5,7 +5,6 @@
#define LOG_CATEGORY UCLASS_CLK
-#include <common.h>
#include <clk-uclass.h>
#include <div64.h>
#include <dm.h>
diff --git a/drivers/clk/stm32/clk-stm32mp13.c b/drivers/clk/stm32/clk-stm32mp13.c
index 5174ae5..362dba1 100644
--- a/drivers/clk/stm32/clk-stm32mp13.c
+++ b/drivers/clk/stm32/clk-stm32mp13.c
@@ -7,7 +7,6 @@
#define LOG_CATEGORY UCLASS_CLK
#include <clk-uclass.h>
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <asm/io.h>
diff --git a/drivers/clk/sunxi/clk_a10.c b/drivers/clk/sunxi/clk_a10.c
index f27306f..19fe248 100644
--- a/drivers/clk/sunxi/clk_a10.c
+++ b/drivers/clk/sunxi/clk_a10.c
@@ -4,7 +4,6 @@
* Author: Jagan Teki <jagan@amarulasolutions.com>
*/
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <errno.h>
diff --git a/drivers/clk/sunxi/clk_a10s.c b/drivers/clk/sunxi/clk_a10s.c
index 16ac589..f771369 100644
--- a/drivers/clk/sunxi/clk_a10s.c
+++ b/drivers/clk/sunxi/clk_a10s.c
@@ -4,7 +4,6 @@
* Author: Jagan Teki <jagan@amarulasolutions.com>
*/
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <errno.h>
diff --git a/drivers/clk/sunxi/clk_a23.c b/drivers/clk/sunxi/clk_a23.c
index 45d5ba7..fdee434 100644
--- a/drivers/clk/sunxi/clk_a23.c
+++ b/drivers/clk/sunxi/clk_a23.c
@@ -4,7 +4,6 @@
* Author: Jagan Teki <jagan@amarulasolutions.com>
*/
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <errno.h>
diff --git a/drivers/clk/sunxi/clk_a31.c b/drivers/clk/sunxi/clk_a31.c
index 6ca8000..04f76a7 100644
--- a/drivers/clk/sunxi/clk_a31.c
+++ b/drivers/clk/sunxi/clk_a31.c
@@ -4,7 +4,6 @@
* Author: Jagan Teki <jagan@amarulasolutions.com>
*/
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <errno.h>
diff --git a/drivers/clk/sunxi/clk_a64.c b/drivers/clk/sunxi/clk_a64.c
index fd26cd4..f1b01d2 100644
--- a/drivers/clk/sunxi/clk_a64.c
+++ b/drivers/clk/sunxi/clk_a64.c
@@ -4,7 +4,6 @@
* Author: Jagan Teki <jagan@amarulasolutions.com>
*/
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <errno.h>
diff --git a/drivers/clk/sunxi/clk_a80.c b/drivers/clk/sunxi/clk_a80.c
index c5834f4..6751af8 100644
--- a/drivers/clk/sunxi/clk_a80.c
+++ b/drivers/clk/sunxi/clk_a80.c
@@ -4,7 +4,6 @@
* Author: Jagan Teki <jagan@amarulasolutions.com>
*/
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <errno.h>
diff --git a/drivers/clk/sunxi/clk_a83t.c b/drivers/clk/sunxi/clk_a83t.c
index 760d98c..d8621a3 100644
--- a/drivers/clk/sunxi/clk_a83t.c
+++ b/drivers/clk/sunxi/clk_a83t.c
@@ -4,7 +4,6 @@
* Author: Jagan Teki <jagan@amarulasolutions.com>
*/
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <errno.h>
diff --git a/drivers/clk/sunxi/clk_d1.c b/drivers/clk/sunxi/clk_d1.c
index 9dae761..b990a11 100644
--- a/drivers/clk/sunxi/clk_d1.c
+++ b/drivers/clk/sunxi/clk_d1.c
@@ -3,7 +3,6 @@
* Copyright (C) 2021 Samuel Holland <samuel@sholland.org>
*/
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <errno.h>
diff --git a/drivers/clk/sunxi/clk_f1c100s.c b/drivers/clk/sunxi/clk_f1c100s.c
index 7b4c3ce..e229569 100644
--- a/drivers/clk/sunxi/clk_f1c100s.c
+++ b/drivers/clk/sunxi/clk_f1c100s.c
@@ -3,7 +3,6 @@
* Copyright (C) 2019 George Hilliard <thirtythreeforty@gmail.com>.
*/
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <errno.h>
diff --git a/drivers/clk/sunxi/clk_h3.c b/drivers/clk/sunxi/clk_h3.c
index 32bc95f..ce55cae 100644
--- a/drivers/clk/sunxi/clk_h3.c
+++ b/drivers/clk/sunxi/clk_h3.c
@@ -4,7 +4,6 @@
* Author: Jagan Teki <jagan@amarulasolutions.com>
*/
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <errno.h>
diff --git a/drivers/clk/sunxi/clk_h6.c b/drivers/clk/sunxi/clk_h6.c
index 071fd58..1b7bd9d 100644
--- a/drivers/clk/sunxi/clk_h6.c
+++ b/drivers/clk/sunxi/clk_h6.c
@@ -4,7 +4,6 @@
* Author: Jagan Teki <jagan@amarulasolutions.com>
*/
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <errno.h>
diff --git a/drivers/clk/sunxi/clk_h616.c b/drivers/clk/sunxi/clk_h616.c
index 113dcff..b1e999e 100644
--- a/drivers/clk/sunxi/clk_h616.c
+++ b/drivers/clk/sunxi/clk_h616.c
@@ -3,7 +3,6 @@
* Copyright (C) 2021 Jernej Skrabec <jernej.skrabec@siol.net>
*/
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <errno.h>
diff --git a/drivers/clk/sunxi/clk_r40.c b/drivers/clk/sunxi/clk_r40.c
index 0fef6f3..721debd 100644
--- a/drivers/clk/sunxi/clk_r40.c
+++ b/drivers/clk/sunxi/clk_r40.c
@@ -4,7 +4,6 @@
* Author: Jagan Teki <jagan@amarulasolutions.com>
*/
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <errno.h>
diff --git a/drivers/clk/sunxi/clk_sunxi.c b/drivers/clk/sunxi/clk_sunxi.c
index 1782cff..2ef4f45 100644
--- a/drivers/clk/sunxi/clk_sunxi.c
+++ b/drivers/clk/sunxi/clk_sunxi.c
@@ -4,7 +4,6 @@
* Author: Jagan Teki <jagan@amarulasolutions.com>
*/
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <errno.h>
diff --git a/drivers/clk/sunxi/clk_v3s.c b/drivers/clk/sunxi/clk_v3s.c
index 6524c13..85410e2 100644
--- a/drivers/clk/sunxi/clk_v3s.c
+++ b/drivers/clk/sunxi/clk_v3s.c
@@ -4,7 +4,6 @@
* Author: Jagan Teki <jagan@amarulasolutions.com>
*/
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <errno.h>
diff --git a/drivers/clk/tegra/tegra-car-clk.c b/drivers/clk/tegra/tegra-car-clk.c
index c5214b9..1d61f8d 100644
--- a/drivers/clk/tegra/tegra-car-clk.c
+++ b/drivers/clk/tegra/tegra-car-clk.c
@@ -3,7 +3,6 @@
* Copyright (c) 2016, NVIDIA CORPORATION.
*/
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <log.h>
diff --git a/drivers/clk/tegra/tegra186-clk.c b/drivers/clk/tegra/tegra186-clk.c
index 5a98a3f..ec52326 100644
--- a/drivers/clk/tegra/tegra186-clk.c
+++ b/drivers/clk/tegra/tegra186-clk.c
@@ -3,7 +3,6 @@
* Copyright (c) 2016, NVIDIA CORPORATION.
*/
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <log.h>
diff --git a/drivers/clk/ti/clk-am3-dpll-x2.c b/drivers/clk/ti/clk-am3-dpll-x2.c
index 3cf279d..1b0b981 100644
--- a/drivers/clk/ti/clk-am3-dpll-x2.c
+++ b/drivers/clk/ti/clk-am3-dpll-x2.c
@@ -7,7 +7,6 @@
* Loosely based on Linux kernel drivers/clk/ti/dpll.c
*/
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <dm/device_compat.h>
diff --git a/drivers/clk/ti/clk-am3-dpll.c b/drivers/clk/ti/clk-am3-dpll.c
index 398a011..21ec01f 100644
--- a/drivers/clk/ti/clk-am3-dpll.c
+++ b/drivers/clk/ti/clk-am3-dpll.c
@@ -7,7 +7,6 @@
* Loosely based on Linux kernel drivers/clk/ti/dpll.c
*/
-#include <common.h>
#include <clk.h>
#include <clk-uclass.h>
#include <div64.h>
diff --git a/drivers/clk/ti/clk-ctrl.c b/drivers/clk/ti/clk-ctrl.c
index 8926e57..c5c97dc 100644
--- a/drivers/clk/ti/clk-ctrl.c
+++ b/drivers/clk/ti/clk-ctrl.c
@@ -5,7 +5,6 @@
* Copyright (C) 2020 Dario Binacchi <dariobin@libero.it>
*/
-#include <common.h>
#include <dm.h>
#include <dm/device_compat.h>
#include <clk-uclass.h>
diff --git a/drivers/clk/ti/clk-divider.c b/drivers/clk/ti/clk-divider.c
index 15941f1..40a742d 100644
--- a/drivers/clk/ti/clk-divider.c
+++ b/drivers/clk/ti/clk-divider.c
@@ -7,7 +7,6 @@
* Loosely based on Linux kernel drivers/clk/ti/divider.c
*/
-#include <common.h>
#include <clk.h>
#include <clk-uclass.h>
#include <div64.h>
diff --git a/drivers/clk/ti/clk-gate.c b/drivers/clk/ti/clk-gate.c
index eb15f62..873ceb8 100644
--- a/drivers/clk/ti/clk-gate.c
+++ b/drivers/clk/ti/clk-gate.c
@@ -7,7 +7,6 @@
* Loosely based on Linux kernel drivers/clk/ti/gate.c
*/
-#include <common.h>
#include <dm.h>
#include <dm/device_compat.h>
#include <clk-uclass.h>
diff --git a/drivers/clk/ti/clk-k3-pll.c b/drivers/clk/ti/clk-k3-pll.c
index 8323e6e..b3a1b4c 100644
--- a/drivers/clk/ti/clk-k3-pll.c
+++ b/drivers/clk/ti/clk-k3-pll.c
@@ -6,7 +6,6 @@
* Tero Kristo <t-kristo@ti.com>
*/
-#include <common.h>
#include <asm/io.h>
#include <dm.h>
#include <div64.h>
diff --git a/drivers/clk/ti/clk-k3.c b/drivers/clk/ti/clk-k3.c
index 7aa162c..41e5022 100644
--- a/drivers/clk/ti/clk-k3.c
+++ b/drivers/clk/ti/clk-k3.c
@@ -6,7 +6,6 @@
* Tero Kristo <t-kristo@ti.com>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <soc.h>
diff --git a/drivers/clk/ti/clk-mux.c b/drivers/clk/ti/clk-mux.c
index 215241b..db53934 100644
--- a/drivers/clk/ti/clk-mux.c
+++ b/drivers/clk/ti/clk-mux.c
@@ -7,7 +7,6 @@
* Based on Linux kernel drivers/clk/ti/mux.c
*/
-#include <common.h>
#include <dm.h>
#include <dm/device_compat.h>
#include <clk-uclass.h>
diff --git a/drivers/clk/ti/clk-sci.c b/drivers/clk/ti/clk-sci.c
index 9e5760d..e374bd3 100644
--- a/drivers/clk/ti/clk-sci.c
+++ b/drivers/clk/ti/clk-sci.c
@@ -8,7 +8,6 @@
* Loosely based on Linux kernel sci-clk.c...
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <clk-uclass.h>
diff --git a/drivers/clk/ti/clk.c b/drivers/clk/ti/clk.c
index 6e5cc90..28cd151 100644
--- a/drivers/clk/ti/clk.c
+++ b/drivers/clk/ti/clk.c
@@ -5,7 +5,6 @@
* Copyright (C) 2020 Dario Binacchi <dariobin@libero.it>
*/
-#include <common.h>
#include <dm.h>
#include <fdtdec.h>
#include <regmap.h>
diff --git a/drivers/clk/ti/omap4-cm.c b/drivers/clk/ti/omap4-cm.c
index 3cdc9b2..a30ce9d 100644
--- a/drivers/clk/ti/omap4-cm.c
+++ b/drivers/clk/ti/omap4-cm.c
@@ -5,7 +5,6 @@
* Copyright (C) 2020 Dario Binacchi <dariobin@libero.it>
*/
-#include <common.h>
#include <dm.h>
#include <dm/lists.h>
diff --git a/drivers/clk/uniphier/clk-uniphier-core.c b/drivers/clk/uniphier/clk-uniphier-core.c
index c31e596..33369c9 100644
--- a/drivers/clk/uniphier/clk-uniphier-core.c
+++ b/drivers/clk/uniphier/clk-uniphier-core.c
@@ -4,7 +4,6 @@
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*/
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <dm/device_compat.h>
diff --git a/drivers/core/acpi.c b/drivers/core/acpi.c
index 0ebd288..9f78422 100644
--- a/drivers/core/acpi.c
+++ b/drivers/core/acpi.c
@@ -8,7 +8,6 @@
#define LOG_CATEOGRY LOGC_ACPI
-#include <common.h>
#include <display_options.h>
#include <dm.h>
#include <log.h>
diff --git a/drivers/core/device-remove.c b/drivers/core/device-remove.c
index a86b932..437080e 100644
--- a/drivers/core/device-remove.c
+++ b/drivers/core/device-remove.c
@@ -10,7 +10,6 @@
#define LOG_CATEGORY LOGC_DM
-#include <common.h>
#include <errno.h>
#include <log.h>
#include <malloc.h>
diff --git a/drivers/core/device.c b/drivers/core/device.c
index bf7f261..18e2bd0 100644
--- a/drivers/core/device.c
+++ b/drivers/core/device.c
@@ -8,8 +8,8 @@
* Pavel Herrmann <morpheus.ibis@gmail.com>
*/
-#include <common.h>
#include <cpu_func.h>
+#include <errno.h>
#include <event.h>
#include <log.h>
#include <asm/global_data.h>
diff --git a/drivers/core/devres.c b/drivers/core/devres.c
index 78914bd..8df08b9 100644
--- a/drivers/core/devres.c
+++ b/drivers/core/devres.c
@@ -9,7 +9,6 @@
#define LOG_CATEGORY LOGC_DEVRES
-#include <common.h>
#include <log.h>
#include <malloc.h>
#include <linux/compat.h>
diff --git a/drivers/core/dump.c b/drivers/core/dump.c
index 8411248..5ec30d5 100644
--- a/drivers/core/dump.c
+++ b/drivers/core/dump.c
@@ -3,7 +3,6 @@
* Copyright (c) 2015 Google, Inc
*/
-#include <common.h>
#include <dm.h>
#include <malloc.h>
#include <mapmem.h>
diff --git a/drivers/core/fdtaddr.c b/drivers/core/fdtaddr.c
index 5f27d25..6be8ea0 100644
--- a/drivers/core/fdtaddr.c
+++ b/drivers/core/fdtaddr.c
@@ -8,7 +8,6 @@
* Pavel Herrmann <morpheus.ibis@gmail.com>
*/
-#include <common.h>
#include <dm.h>
#include <fdt_support.h>
#include <log.h>
diff --git a/drivers/core/lists.c b/drivers/core/lists.c
index 8034a8f..2839a9b 100644
--- a/drivers/core/lists.c
+++ b/drivers/core/lists.c
@@ -8,7 +8,6 @@
#define LOG_CATEGORY LOGC_DM
-#include <common.h>
#include <errno.h>
#include <log.h>
#include <dm/device.h>
diff --git a/drivers/core/of_access.c b/drivers/core/of_access.c
index c8db743..41f2e09 100644
--- a/drivers/core/of_access.c
+++ b/drivers/core/of_access.c
@@ -19,7 +19,6 @@
* Linux version.
*/
-#include <common.h>
#include <log.h>
#include <malloc.h>
#include <asm/global_data.h>
diff --git a/drivers/core/of_addr.c b/drivers/core/of_addr.c
index b3b3d7c..d7913ab 100644
--- a/drivers/core/of_addr.c
+++ b/drivers/core/of_addr.c
@@ -6,7 +6,6 @@
* Copyright (c) 2017 Google, Inc
*/
-#include <common.h>
#include <log.h>
#include <linux/bug.h>
#include <linux/libfdt.h>
diff --git a/drivers/core/of_extra.c b/drivers/core/of_extra.c
index 59ce917..a3ebe9e 100644
--- a/drivers/core/of_extra.c
+++ b/drivers/core/of_extra.c
@@ -4,7 +4,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <log.h>
#include <linux/libfdt.h>
#include <dm/of_access.h>
diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c
index 21a233f..9a5eaaa 100644
--- a/drivers/core/ofnode.c
+++ b/drivers/core/ofnode.c
@@ -6,7 +6,6 @@
#define LOG_CATEGORY LOGC_DT
-#include <common.h>
#include <dm.h>
#include <fdtdec.h>
#include <fdt_support.h>
diff --git a/drivers/core/read.c b/drivers/core/read.c
index 1a4a95c..55c19f3 100644
--- a/drivers/core/read.c
+++ b/drivers/core/read.c
@@ -4,7 +4,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <dm.h>
#include <dm/of_access.h>
#include <mapmem.h>
diff --git a/drivers/core/read_extra.c b/drivers/core/read_extra.c
index 5138348..5a0153a 100644
--- a/drivers/core/read_extra.c
+++ b/drivers/core/read_extra.c
@@ -4,7 +4,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <dm.h>
#include <dm/of_addr.h>
#include <dm/read.h>
diff --git a/drivers/core/regmap.c b/drivers/core/regmap.c
index dd32328..7ff7834 100644
--- a/drivers/core/regmap.c
+++ b/drivers/core/regmap.c
@@ -6,7 +6,6 @@
#define LOG_CATEGORY LOGC_DM
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <log.h>
diff --git a/drivers/core/root.c b/drivers/core/root.c
index d4ae652..4bfd08f 100644
--- a/drivers/core/root.c
+++ b/drivers/core/root.c
@@ -8,7 +8,6 @@
#define LOG_CATEGORY UCLASS_ROOT
-#include <common.h>
#include <errno.h>
#include <fdtdec.h>
#include <log.h>
diff --git a/drivers/core/simple-bus.c b/drivers/core/simple-bus.c
index 6022e75..f402bb5 100644
--- a/drivers/core/simple-bus.c
+++ b/drivers/core/simple-bus.c
@@ -5,7 +5,6 @@
#define LOG_CATEGORY UCLASS_SIMPLE_BUS
-#include <common.h>
#include <asm/global_data.h>
#include <dm.h>
#include <dm/simple_bus.h>
diff --git a/drivers/core/simple-pm-bus.c b/drivers/core/simple-pm-bus.c
index 1bb0d86..f38372e 100644
--- a/drivers/core/simple-pm-bus.c
+++ b/drivers/core/simple-pm-bus.c
@@ -3,7 +3,6 @@
* Copyright (C) 2020 Sean Anderson <seanga2@gmail.com>
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
diff --git a/drivers/core/syscon-uclass.c b/drivers/core/syscon-uclass.c
index a47b8bd..f0e69d7 100644
--- a/drivers/core/syscon-uclass.c
+++ b/drivers/core/syscon-uclass.c
@@ -6,7 +6,6 @@
#define LOG_CATEGORY UCLASS_SYSCON
-#include <common.h>
#include <log.h>
#include <syscon.h>
#include <dm.h>
diff --git a/drivers/core/uclass.c b/drivers/core/uclass.c
index e46d571..762536e 100644
--- a/drivers/core/uclass.c
+++ b/drivers/core/uclass.c
@@ -8,7 +8,6 @@
#define LOG_CATEGORY LOGC_DM
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <log.h>
diff --git a/drivers/core/util.c b/drivers/core/util.c
index 81497df..108a3bc 100644
--- a/drivers/core/util.c
+++ b/drivers/core/util.c
@@ -3,7 +3,6 @@
* Copyright (c) 2013 Google, Inc
*/
-#include <common.h>
#include <dm/device.h>
#include <dm/ofnode.h>
#include <dm/read.h>
diff --git a/drivers/cpu/at91_cpu.c b/drivers/cpu/at91_cpu.c
index 34a3f61..b45cc6c 100644
--- a/drivers/cpu/at91_cpu.c
+++ b/drivers/cpu/at91_cpu.c
@@ -5,7 +5,6 @@
* Author: Claudiu Beznea <claudiu.beznea@microchip.com>
*/
-#include <common.h>
#include <cpu.h>
#include <dm.h>
#include <div64.h>
diff --git a/drivers/cpu/bmips_cpu.c b/drivers/cpu/bmips_cpu.c
index 3dd04fa..db624ee 100644
--- a/drivers/cpu/bmips_cpu.c
+++ b/drivers/cpu/bmips_cpu.c
@@ -7,7 +7,6 @@
* Copyright (C) 2009 Florian Fainelli <florian@openwrt.org>
*/
-#include <common.h>
#include <cpu.h>
#include <display_options.h>
#include <dm.h>
diff --git a/drivers/cpu/cpu-uclass.c b/drivers/cpu/cpu-uclass.c
index 9772578..16f8f2e 100644
--- a/drivers/cpu/cpu-uclass.c
+++ b/drivers/cpu/cpu-uclass.c
@@ -6,7 +6,6 @@
#define LOG_CATEGORY UCLASS_CPU
-#include <common.h>
#include <cpu.h>
#include <dm.h>
#include <errno.h>
diff --git a/drivers/cpu/cpu_sandbox.c b/drivers/cpu/cpu_sandbox.c
index 2e871fe3..e65e1bd 100644
--- a/drivers/cpu/cpu_sandbox.c
+++ b/drivers/cpu/cpu_sandbox.c
@@ -4,7 +4,6 @@
* Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc
*/
-#include <common.h>
#include <dm.h>
#include <cpu.h>
diff --git a/drivers/cpu/imx8_cpu.c b/drivers/cpu/imx8_cpu.c
index 98ff95f..4781a56 100644
--- a/drivers/cpu/imx8_cpu.c
+++ b/drivers/cpu/imx8_cpu.c
@@ -3,7 +3,6 @@
* Copyright 2019 NXP
*/
-#include <common.h>
#include <cpu.h>
#include <dm.h>
#include <thermal.h>
diff --git a/drivers/cpu/imx9_cpu.c b/drivers/cpu/imx9_cpu.c
deleted file mode 100644
index 66534fe..0000000
--- a/drivers/cpu/imx9_cpu.c
+++ /dev/null
@@ -1,224 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright 2019 NXP
- */
-
-#include <common.h>
-#include <cpu.h>
-#include <dm.h>
-#include <thermal.h>
-#include <asm/global_data.h>
-#include <asm/system.h>
-#include <firmware/linux/imx/sci/sci.h>
-#include <asm/arch/sys_proto.h>
-#include <asm/arch-imx/cpu.h>
-#include <asm/armv8/cpu.h>
-#include <linux/bitops.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-struct cpu_imx_plat {
- const char *name;
- const char *rev;
- const char *type;
- u32 cpu_rsrc;
- u32 cpurev;
- u32 freq_mhz;
- u32 mpidr;
-};
-
-const char *get_imx9_type(u32 imxtype)
-{
- switch (imxtype) {
- case MXC_CPU_IMX93:
- return "93";
- default:
- return "??";
- }
-}
-
-const char *get_imx9_rev(u32 rev)
-{
- switch (rev) {
- case CHIP_REV_1_0:
- return "1.";
- case CHIP_REV_B:
- return "B";
- case CHIP_REV_C:
- return "C";
- default:
- return "?";
- }
-}
-
-static void set_core_data(struct udevice *dev)
-{
- struct cpu_imx_plat *plat = dev_get_plat(dev);
-
- if (device_is_compatible(dev, "arm,cortex-a35"))
- plat->name = "A35";
- else
- plat->name = "?";
-}
-
-#if IS_ENABLED(CONFIG_IMX_SCU_THERMAL)
-static int cpu_imx_get_temp(struct cpu_imx_plat *plat)
-{
- struct udevice *thermal_dev;
- int cpu_tmp, ret;
- int idx = 1; /* use "cpu-thermal0" device */
-
- if (plat->cpu_rsrc == SC_R_A72)
- idx = 2; /* use "cpu-thermal1" device */
-
- ret = uclass_get_device(UCLASS_THERMAL, idx, &thermal_dev);
- if (!ret) {
- ret = thermal_get_temp(thermal_dev, &cpu_tmp);
- if (ret)
- return 0xdeadbeef;
- } else {
- return 0xdeadbeef;
- }
-
- return cpu_tmp;
-}
-#else
-static int cpu_imx_get_temp(struct cpu_imx_plat *plat)
-{
- return 0;
-}
-#endif
-
-int cpu_imx_get_desc(const struct udevice *dev, char *buf, int size)
-{
- struct cpu_imx_plat *plat = dev_get_plat(dev);
- int ret, temp;
-
- if (size < 100)
- return -ENOSPC;
-
- ret = snprintf(buf, size, "NXP i.MX8%s Rev%s %s at %u MHz",
- plat->type, plat->rev, plat->name, plat->freq_mhz);
-
- if (IS_ENABLED(CONFIG_IMX_SCU_THERMAL)) {
- temp = cpu_imx_get_temp(plat);
- buf = buf + ret;
- size = size - ret;
- if (temp != 0xdeadbeef)
- ret = snprintf(buf, size, " at %dC", temp);
- else
- ret = snprintf(buf, size, " - invalid sensor data");
- }
-
- snprintf(buf + ret, size - ret, "\n");
-
- return 0;
-}
-
-static int cpu_imx_get_info(const struct udevice *dev, struct cpu_info *info)
-{
- struct cpu_imx_plat *plat = dev_get_plat(dev);
-
- info->cpu_freq = plat->freq_mhz * 1000;
- info->features = BIT(CPU_FEAT_L1_CACHE) | BIT(CPU_FEAT_MMU);
- return 0;
-}
-
-static int cpu_imx_get_count(const struct udevice *dev)
-{
- ofnode node;
- int num = 0;
-
- ofnode_for_each_subnode(node, dev_ofnode(dev->parent)) {
- const char *device_type;
-
- if (!ofnode_is_enabled(node))
- continue;
-
- device_type = ofnode_read_string(node, "device_type");
- if (!device_type)
- continue;
-
- if (!strcmp(device_type, "cpu"))
- num++;
- }
-
- return num;
-}
-
-static int cpu_imx_get_vendor(const struct udevice *dev, char *buf, int size)
-{
- snprintf(buf, size, "NXP");
- return 0;
-}
-
-static int cpu_imx_is_current(struct udevice *dev)
-{
- struct cpu_imx_plat *plat = dev_get_plat(dev);
-
- if (plat->mpidr == (read_mpidr() & 0xffff))
- return 1;
-
- return 0;
-}
-
-static const struct cpu_ops cpu_imx9_ops = {
- .get_desc = cpu_imx_get_desc,
- .get_info = cpu_imx_get_info,
- .get_count = cpu_imx_get_count,
- .get_vendor = cpu_imx_get_vendor,
- .is_current = cpu_imx_is_current,
-};
-
-static const struct udevice_id cpu_imx9_ids[] = {
- { .compatible = "arm,cortex-a35" },
- { .compatible = "arm,cortex-a53" },
- { .compatible = "arm,cortex-a72" },
- { }
-};
-
-static ulong imx9_get_cpu_rate(struct udevice *dev)
-{
- struct cpu_imx_plat *plat = dev_get_plat(dev);
- ulong rate;
- int ret;
-
- ret = sc_pm_get_clock_rate(-1, plat->cpu_rsrc, SC_PM_CLK_CPU,
- (sc_pm_clock_rate_t *)&rate);
- if (ret) {
- printf("Could not read CPU frequency: %d\n", ret);
- return 0;
- }
-
- return rate;
-}
-
-static int imx9_cpu_probe(struct udevice *dev)
-{
- struct cpu_imx_plat *plat = dev_get_plat(dev);
- u32 cpurev;
-
- set_core_data(dev);
- cpurev = get_cpu_rev();
- plat->cpurev = cpurev;
- plat->rev = get_imx9_rev(cpurev & 0xFFF);
- plat->type = get_imx9_type((cpurev & 0xFF000) >> 12);
- plat->freq_mhz = imx9_get_cpu_rate(dev) / 1000000;
- plat->mpidr = dev_read_addr(dev);
- if (plat->mpidr == FDT_ADDR_T_NONE) {
- printf("%s: Failed to get CPU reg property\n", __func__);
- return -EINVAL;
- }
-
- return 0;
-}
-
-U_BOOT_DRIVER(cpu_imx9_drv) = {
- .name = "imx9x_cpu",
- .id = UCLASS_CPU,
- .of_match = cpu_imx9_ids,
- .ops = &cpu_imx9_ops,
- .probe = imx9_cpu_probe,
- .plat_auto = sizeof(struct cpu_imx_plat),
- .flags = DM_FLAG_PRE_RELOC,
-};
diff --git a/drivers/cpu/microblaze_cpu.c b/drivers/cpu/microblaze_cpu.c
index a229f69..4e24ada 100644
--- a/drivers/cpu/microblaze_cpu.c
+++ b/drivers/cpu/microblaze_cpu.c
@@ -2,7 +2,6 @@
/*
* Copyright (C) 2022, Ovidiu Panait <ovpanait@gmail.com>
*/
-#include <common.h>
#include <cpu.h>
#include <dm.h>
#include <asm/cpuinfo.h>
diff --git a/drivers/cpu/mpc83xx_cpu.c b/drivers/cpu/mpc83xx_cpu.c
index e451c11..9a7b5fd 100644
--- a/drivers/cpu/mpc83xx_cpu.c
+++ b/drivers/cpu/mpc83xx_cpu.c
@@ -4,7 +4,6 @@
* Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc
*/
-#include <common.h>
#include <bitfield.h>
#include <clk.h>
#include <cpu.h>
diff --git a/drivers/cpu/riscv_cpu.c b/drivers/cpu/riscv_cpu.c
index 5d1026b..4f2958a 100644
--- a/drivers/cpu/riscv_cpu.c
+++ b/drivers/cpu/riscv_cpu.c
@@ -5,7 +5,6 @@
*/
#include <clk.h>
-#include <common.h>
#include <cpu.h>
#include <dm.h>
#include <errno.h>
@@ -21,13 +20,13 @@
static int riscv_cpu_get_desc(const struct udevice *dev, char *buf, int size)
{
- const char *isa;
+ const char *cpu;
- isa = dev_read_string(dev, "riscv,isa");
- if (size < (strlen(isa) + 1))
+ cpu = dev_read_string(dev, "compatible");
+ if (size < (strlen(cpu) + 1))
return -ENOSPC;
- strcpy(buf, isa);
+ strcpy(buf, cpu);
return 0;
}
diff --git a/drivers/crypto/Kconfig b/drivers/crypto/Kconfig
index 12ef84c..8b49997 100644
--- a/drivers/crypto/Kconfig
+++ b/drivers/crypto/Kconfig
@@ -1,11 +1,11 @@
menu "Hardware crypto devices"
-source drivers/crypto/hash/Kconfig
+source "drivers/crypto/hash/Kconfig"
-source drivers/crypto/fsl/Kconfig
+source "drivers/crypto/fsl/Kconfig"
-source drivers/crypto/aspeed/Kconfig
+source "drivers/crypto/aspeed/Kconfig"
-source drivers/crypto/nuvoton/Kconfig
+source "drivers/crypto/nuvoton/Kconfig"
endmenu
diff --git a/drivers/crypto/ace_sha.c b/drivers/crypto/ace_sha.c
index 261d3ef..0e43e82 100644
--- a/drivers/crypto/ace_sha.c
+++ b/drivers/crypto/ace_sha.c
@@ -3,10 +3,12 @@
* Advanced Crypto Engine - SHA Firmware
* Copyright (c) 2012 Samsung Electronics
*/
-#include <common.h>
+
+#include <config.h>
#include "ace_sha.h"
#include <log.h>
#include <rand.h>
+#include <linux/string.h>
#ifdef CONFIG_SHA_HW_ACCEL
#include <u-boot/sha256.h>
diff --git a/drivers/crypto/ace_sha.h b/drivers/crypto/ace_sha.h
index ad9e81a..efc791a 100644
--- a/drivers/crypto/ace_sha.h
+++ b/drivers/crypto/ace_sha.h
@@ -8,6 +8,8 @@
#ifndef __ACE_SHA_H
#define __ACE_SHA_H
+#include <linux/types.h>
+
struct exynos_ace_sfr {
unsigned int fc_intstat; /* base + 0 */
unsigned int fc_intenset;
diff --git a/drivers/crypto/aspeed/aspeed_acry.c b/drivers/crypto/aspeed/aspeed_acry.c
index 47a007f..e3f81eb 100644
--- a/drivers/crypto/aspeed/aspeed_acry.c
+++ b/drivers/crypto/aspeed/aspeed_acry.c
@@ -3,7 +3,6 @@
* Copyright 2021 ASPEED Technology Inc.
*/
#include <config.h>
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <asm/types.h>
diff --git a/drivers/crypto/aspeed/aspeed_hace.c b/drivers/crypto/aspeed/aspeed_hace.c
index 6b6c8fa..17cc30a 100644
--- a/drivers/crypto/aspeed/aspeed_hace.c
+++ b/drivers/crypto/aspeed/aspeed_hace.c
@@ -3,7 +3,6 @@
* Copyright 2021 ASPEED Technology Inc.
*/
#include <config.h>
-#include <common.h>
#include <dm.h>
#include <clk.h>
#include <log.h>
diff --git a/drivers/crypto/fsl/Kconfig b/drivers/crypto/fsl/Kconfig
index 294e1c8..9ed5663 100644
--- a/drivers/crypto/fsl/Kconfig
+++ b/drivers/crypto/fsl/Kconfig
@@ -69,7 +69,7 @@
driver is used.
config FSL_CAAM_RNG
- bool "Enable Random Number Generator support"
+ bool "Enable CAAM Random Number Generator support"
depends on DM_RNG
default y
help
@@ -78,10 +78,17 @@
using the prediction resistance flag which means the DRGB is
reseeded from the TRNG every time random data is generated.
+config SPL_FSL_CAAM_RNG
+ bool "Enable CAAM Random Number Generator support in SPL"
+ depends on SPL_DM_RNG
+ help
+ This option is an SPL-variant of the FSL_CAAM_RNG option.
+ See the help of FSL_CAAM_RNG for details.
+
endif
config FSL_DCP_RNG
- bool "Enable Random Number Generator support"
+ bool "Enable DCP Random Number Generator support"
depends on DM_RNG
help
Enable support for the hardware based random number generator
diff --git a/drivers/crypto/fsl/Makefile b/drivers/crypto/fsl/Makefile
index 7a2543e..4fbce51 100644
--- a/drivers/crypto/fsl/Makefile
+++ b/drivers/crypto/fsl/Makefile
@@ -6,6 +6,6 @@
obj-$(CONFIG_FSL_CAAM) += jr.o fsl_hash.o jobdesc.o error.o
obj-$(CONFIG_CMD_BLOB)$(CONFIG_IMX_CAAM_DEK_ENCAP) += fsl_blob.o
obj-$(CONFIG_RSA_FREESCALE_EXP) += fsl_rsa.o
-obj-$(CONFIG_FSL_CAAM_RNG) += rng.o
+obj-$(CONFIG_$(SPL_TPL_)FSL_CAAM_RNG) += rng.o
obj-$(CONFIG_FSL_DCP_RNG) += dcp_rng.o
obj-$(CONFIG_FSL_MFGPROT) += fsl_mfgprot.o
diff --git a/drivers/crypto/fsl/dcp_rng.c b/drivers/crypto/fsl/dcp_rng.c
index 3170696..6b19c17 100644
--- a/drivers/crypto/fsl/dcp_rng.c
+++ b/drivers/crypto/fsl/dcp_rng.c
@@ -7,7 +7,6 @@
* Based on RNGC driver in drivers/char/hw_random/imx-rngc.c in Linux
*/
-#include <common.h>
#include <cpu_func.h>
#include <dm.h>
#include <rng.h>
diff --git a/drivers/crypto/fsl/error.c b/drivers/crypto/fsl/error.c
index c765749..7b232d9 100644
--- a/drivers/crypto/fsl/error.c
+++ b/drivers/crypto/fsl/error.c
@@ -7,9 +7,9 @@
* Derived from error.c file in linux drivers/crypto/caam
*/
-#include <common.h>
#include <log.h>
#include <malloc.h>
+#include <vsprintf.h>
#include "desc.h"
#include "jr.h"
diff --git a/drivers/crypto/fsl/fsl_blob.c b/drivers/crypto/fsl/fsl_blob.c
index 9b6e4bc..0ecd6be 100644
--- a/drivers/crypto/fsl/fsl_blob.c
+++ b/drivers/crypto/fsl/fsl_blob.c
@@ -4,7 +4,6 @@
*
*/
-#include <common.h>
#include <cpu_func.h>
#include <log.h>
#include <malloc.h>
diff --git a/drivers/crypto/fsl/fsl_hash.c b/drivers/crypto/fsl/fsl_hash.c
index f22f24b..79b32e2 100644
--- a/drivers/crypto/fsl/fsl_hash.c
+++ b/drivers/crypto/fsl/fsl_hash.c
@@ -4,7 +4,6 @@
* Copyright 2021 NXP
*/
-#include <common.h>
#include <cpu_func.h>
#include <log.h>
#include <malloc.h>
diff --git a/drivers/crypto/fsl/fsl_mfgprot.c b/drivers/crypto/fsl/fsl_mfgprot.c
index 29af79f..7c22f8e 100644
--- a/drivers/crypto/fsl/fsl_mfgprot.c
+++ b/drivers/crypto/fsl/fsl_mfgprot.c
@@ -4,7 +4,6 @@
* Copyright 2017 NXP
*/
-#include <common.h>
#include <errno.h>
#include <fsl_sec.h>
#include <memalign.h>
diff --git a/drivers/crypto/fsl/fsl_rsa.c b/drivers/crypto/fsl/fsl_rsa.c
index 335b7fe..125a72a 100644
--- a/drivers/crypto/fsl/fsl_rsa.c
+++ b/drivers/crypto/fsl/fsl_rsa.c
@@ -5,7 +5,6 @@
*/
#include <config.h>
-#include <common.h>
#include <cpu_func.h>
#include <dm.h>
#include <log.h>
diff --git a/drivers/crypto/fsl/jobdesc.c b/drivers/crypto/fsl/jobdesc.c
index d32c1fe..5519173 100644
--- a/drivers/crypto/fsl/jobdesc.c
+++ b/drivers/crypto/fsl/jobdesc.c
@@ -8,7 +8,7 @@
*
*/
-#include <common.h>
+#include <config.h>
#include <cpu_func.h>
#include <fsl_sec.h>
#include "desc_constr.h"
diff --git a/drivers/crypto/fsl/jr.c b/drivers/crypto/fsl/jr.c
index 203f162..27e2480 100644
--- a/drivers/crypto/fsl/jr.c
+++ b/drivers/crypto/fsl/jr.c
@@ -6,7 +6,7 @@
* Based on CAAM driver in drivers/crypto/caam in Linux
*/
-#include <common.h>
+#include <config.h>
#include <cpu_func.h>
#include <linux/kernel.h>
#include <log.h>
@@ -787,7 +787,7 @@
}
#if CONFIG_IS_ENABLED(OF_CONTROL)
if (ofnode_valid(scu_node)) {
- if (IS_ENABLED(CONFIG_DM_RNG)) {
+ if (CONFIG_IS_ENABLED(DM_RNG)) {
ret = device_bind_driver(NULL, "caam-rng", "caam-rng", NULL);
if (ret)
printf("Couldn't bind rng driver (%d)\n", ret);
@@ -810,7 +810,7 @@
return -1;
}
- if (IS_ENABLED(CONFIG_DM_RNG)) {
+ if (CONFIG_IS_ENABLED(DM_RNG)) {
ret = device_bind_driver(NULL, "caam-rng", "caam-rng",
NULL);
if (ret)
diff --git a/drivers/crypto/fsl/rng.c b/drivers/crypto/fsl/rng.c
index 0636494..786a710 100644
--- a/drivers/crypto/fsl/rng.c
+++ b/drivers/crypto/fsl/rng.c
@@ -7,7 +7,6 @@
*/
#include <asm/cache.h>
-#include <common.h>
#include <cpu_func.h>
#include <dm.h>
#include <rng.h>
diff --git a/drivers/crypto/fsl/sec.c b/drivers/crypto/fsl/sec.c
index 9de30a6..e9c39dd 100644
--- a/drivers/crypto/fsl/sec.c
+++ b/drivers/crypto/fsl/sec.c
@@ -3,7 +3,7 @@
* Copyright 2014 Freescale Semiconductor, Inc.
*/
-#include <common.h>
+#include <config.h>
#include <linux/libfdt.h>
#include <fdt_support.h>
#if CONFIG_SYS_FSL_SEC_COMPAT == 2 || CONFIG_SYS_FSL_SEC_COMPAT >= 4
diff --git a/drivers/crypto/hash/hash-uclass.c b/drivers/crypto/hash/hash-uclass.c
index 446eb9e..5d9f1e0 100644
--- a/drivers/crypto/hash/hash-uclass.c
+++ b/drivers/crypto/hash/hash-uclass.c
@@ -6,7 +6,6 @@
#define LOG_CATEGORY UCLASS_HASH
-#include <common.h>
#include <dm.h>
#include <asm/global_data.h>
#include <u-boot/hash.h>
diff --git a/drivers/crypto/hash/hash_sw.c b/drivers/crypto/hash/hash_sw.c
index d8065d6..ffd4ab1 100644
--- a/drivers/crypto/hash/hash_sw.c
+++ b/drivers/crypto/hash/hash_sw.c
@@ -4,7 +4,6 @@
* Author: ChiaWei Wang <chiawei_wang@aspeedtech.com>
*/
#include <config.h>
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <malloc.h>
diff --git a/drivers/crypto/nuvoton/npcm_aes.c b/drivers/crypto/nuvoton/npcm_aes.c
index 6493ea1..8d3a30e 100644
--- a/drivers/crypto/nuvoton/npcm_aes.c
+++ b/drivers/crypto/nuvoton/npcm_aes.c
@@ -3,13 +3,13 @@
* Copyright (c) 2021 Nuvoton Technology Corp.
*/
-#include <common.h>
#include <dm.h>
#include <uboot_aes.h>
#include <asm/io.h>
#include <asm/arch/aes.h>
#include <asm/arch/otp.h>
#include <malloc.h>
+#include <time.h>
#define ONE_SECOND 0xC00000
diff --git a/drivers/crypto/nuvoton/npcm_sha.c b/drivers/crypto/nuvoton/npcm_sha.c
index 7ebdfa1..f06be86 100644
--- a/drivers/crypto/nuvoton/npcm_sha.c
+++ b/drivers/crypto/nuvoton/npcm_sha.c
@@ -3,7 +3,6 @@
* Copyright (c) 2022 Nuvoton Technology Corp.
*/
-#include <common.h>
#include <dm.h>
#include <hash.h>
#include <malloc.h>
diff --git a/drivers/crypto/rsa_mod_exp/mod_exp_sw.c b/drivers/crypto/rsa_mod_exp/mod_exp_sw.c
index 7bed444..4f59adc 100644
--- a/drivers/crypto/rsa_mod_exp/mod_exp_sw.c
+++ b/drivers/crypto/rsa_mod_exp/mod_exp_sw.c
@@ -5,7 +5,6 @@
*/
#include <config.h>
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <u-boot/rsa-mod-exp.h>
diff --git a/drivers/crypto/rsa_mod_exp/mod_exp_uclass.c b/drivers/crypto/rsa_mod_exp/mod_exp_uclass.c
index 057cc74..107500d 100644
--- a/drivers/crypto/rsa_mod_exp/mod_exp_uclass.c
+++ b/drivers/crypto/rsa_mod_exp/mod_exp_uclass.c
@@ -6,7 +6,6 @@
#define LOG_CATEGORY UCLASS_MOD_EXP
-#include <common.h>
#include <dm.h>
#include <asm/global_data.h>
#include <u-boot/rsa-mod-exp.h>
diff --git a/drivers/ddr/altera/sdram_agilex.c b/drivers/ddr/altera/sdram_agilex.c
index 65ecdd0..7f2cccb 100644
--- a/drivers/ddr/altera/sdram_agilex.c
+++ b/drivers/ddr/altera/sdram_agilex.c
@@ -4,7 +4,6 @@
*
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <div64.h>
diff --git a/drivers/ddr/altera/sdram_arria10.c b/drivers/ddr/altera/sdram_arria10.c
index 8ef5fa4..bd2af94 100644
--- a/drivers/ddr/altera/sdram_arria10.c
+++ b/drivers/ddr/altera/sdram_arria10.c
@@ -3,7 +3,6 @@
* Copyright (C) 2017 Intel Corporation <www.intel.com>
*/
-#include <common.h>
#include <cpu_func.h>
#include <errno.h>
#include <fdtdec.h>
diff --git a/drivers/ddr/altera/sdram_gen5.c b/drivers/ddr/altera/sdram_gen5.c
index 34d2a27..46c53e7 100644
--- a/drivers/ddr/altera/sdram_gen5.c
+++ b/drivers/ddr/altera/sdram_gen5.c
@@ -2,7 +2,6 @@
/*
* Copyright Altera Corporation (C) 2014-2015
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <div64.h>
diff --git a/drivers/ddr/altera/sdram_n5x.c b/drivers/ddr/altera/sdram_n5x.c
index d903944..db09986 100644
--- a/drivers/ddr/altera/sdram_n5x.c
+++ b/drivers/ddr/altera/sdram_n5x.c
@@ -4,7 +4,6 @@
*
*/
-#include <common.h>
#include <clk.h>
#include <div64.h>
#include <dm.h>
diff --git a/drivers/ddr/altera/sdram_s10.c b/drivers/ddr/altera/sdram_s10.c
index 4d36fb4..4ac4c79 100644
--- a/drivers/ddr/altera/sdram_s10.c
+++ b/drivers/ddr/altera/sdram_s10.c
@@ -4,7 +4,6 @@
*
*/
-#include <common.h>
#include <cpu_func.h>
#include <dm.h>
#include <errno.h>
diff --git a/drivers/ddr/altera/sdram_soc64.c b/drivers/ddr/altera/sdram_soc64.c
index 4716abf..9e57c2e 100644
--- a/drivers/ddr/altera/sdram_soc64.c
+++ b/drivers/ddr/altera/sdram_soc64.c
@@ -4,7 +4,6 @@
*
*/
-#include <common.h>
#include <cpu_func.h>
#include <dm.h>
#include <errno.h>
diff --git a/drivers/ddr/altera/sequencer.c b/drivers/ddr/altera/sequencer.c
index e402f29..7636e71 100644
--- a/drivers/ddr/altera/sequencer.c
+++ b/drivers/ddr/altera/sequencer.c
@@ -3,8 +3,8 @@
* Copyright Altera Corporation (C) 2012-2015
*/
-#include <common.h>
#include <log.h>
+#include <linux/string.h>
#include <asm/io.h>
#include <asm/arch/sdram.h>
#include <errno.h>
diff --git a/drivers/ddr/altera/sequencer.h b/drivers/ddr/altera/sequencer.h
index c72a683..618ba00 100644
--- a/drivers/ddr/altera/sequencer.h
+++ b/drivers/ddr/altera/sequencer.h
@@ -6,6 +6,8 @@
#ifndef _SEQUENCER_H_
#define _SEQUENCER_H_
+#include <config.h>
+
#define RW_MGR_NUM_DM_PER_WRITE_GROUP (seq->rwcfg->mem_data_mask_width \
/ seq->rwcfg->mem_if_write_dqs_width)
#define RW_MGR_NUM_TRUE_DM_PER_WRITE_GROUP ( \
diff --git a/drivers/ddr/fsl/arm_ddr_gen3.c b/drivers/ddr/fsl/arm_ddr_gen3.c
index 9dada5e..9f9aea8 100644
--- a/drivers/ddr/fsl/arm_ddr_gen3.c
+++ b/drivers/ddr/fsl/arm_ddr_gen3.c
@@ -5,7 +5,7 @@
* Derived from mpc85xx_ddr_gen3.c, removed all workarounds
*/
-#include <common.h>
+#include <config.h>
#include <log.h>
#include <asm/io.h>
#include <fsl_ddr_sdram.h>
diff --git a/drivers/ddr/fsl/ctrl_regs.c b/drivers/ddr/fsl/ctrl_regs.c
index 8f8c2c8..9a25192 100644
--- a/drivers/ddr/fsl/ctrl_regs.c
+++ b/drivers/ddr/fsl/ctrl_regs.c
@@ -10,12 +10,13 @@
* Author: James Yang [at freescale.com]
*/
-#include <common.h>
+#include <config.h>
#include <fsl_ddr_sdram.h>
#include <fsl_errata.h>
#include <fsl_ddr.h>
#include <fsl_immap.h>
#include <log.h>
+#include <linux/string.h>
#include <asm/bitops.h>
#include <asm/io.h>
#if defined(CONFIG_FSL_LSCH2) || defined(CONFIG_FSL_LSCH3) || \
diff --git a/drivers/ddr/fsl/ddr1_dimm_params.c b/drivers/ddr/fsl/ddr1_dimm_params.c
index e5481ea..cc87a95 100644
--- a/drivers/ddr/fsl/ddr1_dimm_params.c
+++ b/drivers/ddr/fsl/ddr1_dimm_params.c
@@ -3,7 +3,6 @@
* Copyright 2008 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <fsl_ddr_sdram.h>
#include <log.h>
#include <asm/bitops.h>
diff --git a/drivers/ddr/fsl/ddr2_dimm_params.c b/drivers/ddr/fsl/ddr2_dimm_params.c
index 3b78118..5674685 100644
--- a/drivers/ddr/fsl/ddr2_dimm_params.c
+++ b/drivers/ddr/fsl/ddr2_dimm_params.c
@@ -3,9 +3,9 @@
* Copyright 2008 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <fsl_ddr_sdram.h>
#include <log.h>
+#include <linux/string.h>
#include <asm/bitops.h>
#include <fsl_ddr.h>
diff --git a/drivers/ddr/fsl/ddr3_dimm_params.c b/drivers/ddr/fsl/ddr3_dimm_params.c
index 1f8db90..c30ecda 100644
--- a/drivers/ddr/fsl/ddr3_dimm_params.c
+++ b/drivers/ddr/fsl/ddr3_dimm_params.c
@@ -8,7 +8,7 @@
* JEDEC standard No.21-C 4_01_02_11R18.pdf
*/
-#include <common.h>
+#include <linux/string.h>
#include <fsl_ddr_sdram.h>
#include <log.h>
diff --git a/drivers/ddr/fsl/ddr4_dimm_params.c b/drivers/ddr/fsl/ddr4_dimm_params.c
index ea79162..75e3bfe 100644
--- a/drivers/ddr/fsl/ddr4_dimm_params.c
+++ b/drivers/ddr/fsl/ddr4_dimm_params.c
@@ -10,10 +10,10 @@
*
*/
-#include <common.h>
#include <fsl_ddr_sdram.h>
#include <log.h>
#include <linux/bug.h>
+#include <linux/string.h>
#include <fsl_ddr.h>
diff --git a/drivers/ddr/fsl/fsl_ddr_gen4.c b/drivers/ddr/fsl/fsl_ddr_gen4.c
index f8d1468..31c58d9 100644
--- a/drivers/ddr/fsl/fsl_ddr_gen4.c
+++ b/drivers/ddr/fsl/fsl_ddr_gen4.c
@@ -4,7 +4,7 @@
* Copyright 2021 NXP
*/
-#include <common.h>
+#include <config.h>
#include <env.h>
#include <log.h>
#include <asm/io.h>
diff --git a/drivers/ddr/fsl/fsl_mmdc.c b/drivers/ddr/fsl/fsl_mmdc.c
index 28f2219..7812b1b 100644
--- a/drivers/ddr/fsl/fsl_mmdc.c
+++ b/drivers/ddr/fsl/fsl_mmdc.c
@@ -7,7 +7,7 @@
* Generic driver for Freescale MMDC(Multi Mode DDR Controller).
*/
-#include <common.h>
+#include <config.h>
#include <fsl_mmdc.h>
#include <asm/io.h>
#include <linux/delay.h>
diff --git a/drivers/ddr/fsl/interactive.c b/drivers/ddr/fsl/interactive.c
index eb2f06e..94a5e44 100644
--- a/drivers/ddr/fsl/interactive.c
+++ b/drivers/ddr/fsl/interactive.c
@@ -11,11 +11,11 @@
* York Sun [at freescale.com]
*/
-#include <common.h>
#include <cli.h>
#include <command.h>
#include <env.h>
#include <log.h>
+#include <vsprintf.h>
#include <asm/bitops.h>
#include <linux/ctype.h>
#include <asm/types.h>
diff --git a/drivers/ddr/fsl/lc_common_dimm_params.c b/drivers/ddr/fsl/lc_common_dimm_params.c
index 5e4ad56..aaf9800 100644
--- a/drivers/ddr/fsl/lc_common_dimm_params.c
+++ b/drivers/ddr/fsl/lc_common_dimm_params.c
@@ -4,7 +4,6 @@
* Copyright 2017-2021 NXP Semiconductor
*/
-#include <common.h>
#include <fsl_ddr_sdram.h>
#include <log.h>
#include <asm/bitops.h>
diff --git a/drivers/ddr/fsl/main.c b/drivers/ddr/fsl/main.c
index cd33271..31091bb 100644
--- a/drivers/ddr/fsl/main.c
+++ b/drivers/ddr/fsl/main.c
@@ -10,7 +10,7 @@
* Author: James Yang [at freescale.com]
*/
-#include <common.h>
+#include <config.h>
#include <display_options.h>
#include <dm.h>
#include <i2c.h>
diff --git a/drivers/ddr/fsl/mpc85xx_ddr_gen1.c b/drivers/ddr/fsl/mpc85xx_ddr_gen1.c
index 16186bd..a852075 100644
--- a/drivers/ddr/fsl/mpc85xx_ddr_gen1.c
+++ b/drivers/ddr/fsl/mpc85xx_ddr_gen1.c
@@ -3,7 +3,7 @@
* Copyright 2008 Freescale Semiconductor, Inc.
*/
-#include <common.h>
+#include <config.h>
#include <log.h>
#include <asm/io.h>
#include <fsl_ddr_sdram.h>
diff --git a/drivers/ddr/fsl/mpc85xx_ddr_gen2.c b/drivers/ddr/fsl/mpc85xx_ddr_gen2.c
index b830e7c..00b4b37 100644
--- a/drivers/ddr/fsl/mpc85xx_ddr_gen2.c
+++ b/drivers/ddr/fsl/mpc85xx_ddr_gen2.c
@@ -3,9 +3,9 @@
* Copyright 2008-2011 Freescale Semiconductor, Inc.
*/
-#include <common.h>
+#include <config.h>
#include <asm/io.h>
-#include <asm/processor.h>
+#include <asm/ppc.h>
#include <fsl_ddr_sdram.h>
#include <linux/delay.h>
diff --git a/drivers/ddr/fsl/mpc85xx_ddr_gen3.c b/drivers/ddr/fsl/mpc85xx_ddr_gen3.c
index 1c4a1ca..b0a61fa 100644
--- a/drivers/ddr/fsl/mpc85xx_ddr_gen3.c
+++ b/drivers/ddr/fsl/mpc85xx_ddr_gen3.c
@@ -3,9 +3,10 @@
* Copyright 2008-2020 Freescale Semiconductor, Inc.
*/
-#include <common.h>
+#include <config.h>
#include <log.h>
#include <asm/io.h>
+#include <asm/ppc.h>
#include <fsl_ddr_sdram.h>
#include <asm/processor.h>
#include <linux/delay.h>
diff --git a/drivers/ddr/fsl/options.c b/drivers/ddr/fsl/options.c
index 7cff823..852a5d0 100644
--- a/drivers/ddr/fsl/options.c
+++ b/drivers/ddr/fsl/options.c
@@ -4,16 +4,19 @@
* Copyright 2017-2018 NXP Semiconductor
*/
-#include <common.h>
+#include <config.h>
#include <env.h>
#include <hwconfig.h>
#include <fsl_ddr_sdram.h>
#include <log.h>
+#include <vsprintf.h>
#include <fsl_ddr.h>
#if defined(CONFIG_FSL_LSCH2) || defined(CONFIG_FSL_LSCH3) || \
defined(CONFIG_ARM)
#include <asm/arch/clock.h>
+#else
+#include <asm/ppc.h>
#endif
/*
diff --git a/drivers/ddr/fsl/util.c b/drivers/ddr/fsl/util.c
index 6005139..0a73170 100644
--- a/drivers/ddr/fsl/util.c
+++ b/drivers/ddr/fsl/util.c
@@ -4,9 +4,10 @@
* Copyright 2021 NXP
*/
-#include <common.h>
+#include <config.h>
#ifdef CONFIG_PPC
#include <asm/fsl_law.h>
+#include <asm/ppc.h>
#endif
#include <div64.h>
#include <linux/delay.h>
diff --git a/drivers/ddr/imx/imx8m/ddr_init.c b/drivers/ddr/imx/imx8m/ddr_init.c
index 52a4aa6..e9209ce8 100644
--- a/drivers/ddr/imx/imx8m/ddr_init.c
+++ b/drivers/ddr/imx/imx8m/ddr_init.c
@@ -3,7 +3,6 @@
* Copyright 2018-2019 NXP
*/
-#include <common.h>
#include <errno.h>
#include <log.h>
#include <asm/io.h>
diff --git a/drivers/ddr/imx/imx8ulp/Kconfig b/drivers/ddr/imx/imx8ulp/Kconfig
index 5448c33..005f581 100644
--- a/drivers/ddr/imx/imx8ulp/Kconfig
+++ b/drivers/ddr/imx/imx8ulp/Kconfig
@@ -5,7 +5,7 @@
bool "imx8m dram"
config IMX8ULP_DRAM_PHY_PLL_BYPASS
- bool "Enable the DDR PHY PLL bypass mode, so PHY clock is from DDR_CLK "
+ bool "Enable the DDR PHY PLL bypass mode, so PHY clock is from DDR_CLK"
depends on IMX8ULP_DRAM
config SAVED_DRAM_TIMING_BASE
diff --git a/drivers/ddr/imx/imx8ulp/ddr_init.c b/drivers/ddr/imx/imx8ulp/ddr_init.c
index c362a2d..172e260 100644
--- a/drivers/ddr/imx/imx8ulp/ddr_init.c
+++ b/drivers/ddr/imx/imx8ulp/ddr_init.c
@@ -2,7 +2,6 @@
/*
* Copyright 2021 NXP
*/
-#include <common.h>
#include <asm/io.h>
#include <asm/arch/clock.h>
#include <asm/arch/ddr.h>
diff --git a/drivers/ddr/imx/imx9/ddr_init.c b/drivers/ddr/imx/imx9/ddr_init.c
index 7a33388..5b0ad77 100644
--- a/drivers/ddr/imx/imx9/ddr_init.c
+++ b/drivers/ddr/imx/imx9/ddr_init.c
@@ -3,7 +3,6 @@
* Copyright 2022 NXP
*/
-#include <common.h>
#include <errno.h>
#include <log.h>
#include <asm/io.h>
@@ -11,6 +10,7 @@
#include <asm/arch/clock.h>
#include <asm/arch/sys_proto.h>
#include <linux/delay.h>
+#include <linux/string.h>
static unsigned int g_cdd_rr_max[4];
static unsigned int g_cdd_rw_max[4];
diff --git a/drivers/ddr/imx/phy/ddrphy_train.c b/drivers/ddr/imx/phy/ddrphy_train.c
index cd905f9..ccc10df 100644
--- a/drivers/ddr/imx/phy/ddrphy_train.c
+++ b/drivers/ddr/imx/phy/ddrphy_train.c
@@ -3,7 +3,6 @@
* Copyright 2018 NXP
*/
-#include <common.h>
#include <log.h>
#include <linux/kernel.h>
#include <asm/arch/ddr.h>
diff --git a/drivers/ddr/imx/phy/ddrphy_utils.c b/drivers/ddr/imx/phy/ddrphy_utils.c
index 45e1a70..cf5bdad 100644
--- a/drivers/ddr/imx/phy/ddrphy_utils.c
+++ b/drivers/ddr/imx/phy/ddrphy_utils.c
@@ -3,7 +3,6 @@
* Copyright 2018 NXP
*/
-#include <common.h>
#include <errno.h>
#include <log.h>
#include <asm/io.h>
diff --git a/drivers/ddr/imx/phy/helper.c b/drivers/ddr/imx/phy/helper.c
index b9b2403..c1fc800 100644
--- a/drivers/ddr/imx/phy/helper.c
+++ b/drivers/ddr/imx/phy/helper.c
@@ -3,7 +3,6 @@
* Copyright 2018 NXP
*/
-#include <common.h>
#include <binman_sym.h>
#include <log.h>
#include <spl.h>
diff --git a/drivers/ddr/marvell/axp/ddr3_dfs.c b/drivers/ddr/marvell/axp/ddr3_dfs.c
index 2a45966..985835e 100644
--- a/drivers/ddr/marvell/axp/ddr3_dfs.c
+++ b/drivers/ddr/marvell/axp/ddr3_dfs.c
@@ -3,7 +3,6 @@
* Copyright (C) Marvell International Ltd. and its affiliates
*/
-#include <common.h>
#include <i2c.h>
#include <spl.h>
#include <asm/io.h>
diff --git a/drivers/ddr/marvell/axp/ddr3_dqs.c b/drivers/ddr/marvell/axp/ddr3_dqs.c
index 0db9421..bda0d7e 100644
--- a/drivers/ddr/marvell/axp/ddr3_dqs.c
+++ b/drivers/ddr/marvell/axp/ddr3_dqs.c
@@ -3,7 +3,6 @@
* Copyright (C) Marvell International Ltd. and its affiliates
*/
-#include <common.h>
#include <i2c.h>
#include <log.h>
#include <spl.h>
diff --git a/drivers/ddr/marvell/axp/ddr3_hw_training.c b/drivers/ddr/marvell/axp/ddr3_hw_training.c
index 35d98fa..bb3e1be 100644
--- a/drivers/ddr/marvell/axp/ddr3_hw_training.c
+++ b/drivers/ddr/marvell/axp/ddr3_hw_training.c
@@ -3,7 +3,6 @@
* Copyright (C) Marvell International Ltd. and its affiliates
*/
-#include <common.h>
#include <i2c.h>
#include <log.h>
#include <spl.h>
diff --git a/drivers/ddr/marvell/axp/ddr3_init.c b/drivers/ddr/marvell/axp/ddr3_init.c
index a9dcb74..23c6d11 100644
--- a/drivers/ddr/marvell/axp/ddr3_init.c
+++ b/drivers/ddr/marvell/axp/ddr3_init.c
@@ -3,7 +3,6 @@
* Copyright (C) Marvell International Ltd. and its affiliates
*/
-#include <common.h>
#include <i2c.h>
#include <log.h>
#include <spl.h>
diff --git a/drivers/ddr/marvell/axp/ddr3_pbs.c b/drivers/ddr/marvell/axp/ddr3_pbs.c
index 069a42fb..2322900 100644
--- a/drivers/ddr/marvell/axp/ddr3_pbs.c
+++ b/drivers/ddr/marvell/axp/ddr3_pbs.c
@@ -3,7 +3,6 @@
* Copyright (C) Marvell International Ltd. and its affiliates
*/
-#include <common.h>
#include <i2c.h>
#include <spl.h>
#include <asm/io.h>
diff --git a/drivers/ddr/marvell/axp/ddr3_read_leveling.c b/drivers/ddr/marvell/axp/ddr3_read_leveling.c
index 30a5c35..db7003f 100644
--- a/drivers/ddr/marvell/axp/ddr3_read_leveling.c
+++ b/drivers/ddr/marvell/axp/ddr3_read_leveling.c
@@ -3,7 +3,6 @@
* Copyright (C) Marvell International Ltd. and its affiliates
*/
-#include <common.h>
#include <i2c.h>
#include <log.h>
#include <spl.h>
diff --git a/drivers/ddr/marvell/axp/ddr3_sdram.c b/drivers/ddr/marvell/axp/ddr3_sdram.c
index 0b150b2..f8fee26 100644
--- a/drivers/ddr/marvell/axp/ddr3_sdram.c
+++ b/drivers/ddr/marvell/axp/ddr3_sdram.c
@@ -3,7 +3,6 @@
* Copyright (C) Marvell International Ltd. and its affiliates
*/
-#include <common.h>
#include <i2c.h>
#include <spl.h>
#include <asm/io.h>
diff --git a/drivers/ddr/marvell/axp/ddr3_spd.c b/drivers/ddr/marvell/axp/ddr3_spd.c
index 4763403..c169a8e 100644
--- a/drivers/ddr/marvell/axp/ddr3_spd.c
+++ b/drivers/ddr/marvell/axp/ddr3_spd.c
@@ -3,7 +3,6 @@
* Copyright (C) Marvell International Ltd. and its affiliates
*/
-#include <common.h>
#include <i2c.h>
#include <spl.h>
#include <asm/io.h>
diff --git a/drivers/ddr/marvell/axp/ddr3_write_leveling.c b/drivers/ddr/marvell/axp/ddr3_write_leveling.c
index d4add44..ea7bac5 100644
--- a/drivers/ddr/marvell/axp/ddr3_write_leveling.c
+++ b/drivers/ddr/marvell/axp/ddr3_write_leveling.c
@@ -3,7 +3,6 @@
* Copyright (C) Marvell International Ltd. and its affiliates
*/
-#include <common.h>
#include <i2c.h>
#include <log.h>
#include <spl.h>
diff --git a/drivers/ddr/marvell/axp/xor.c b/drivers/ddr/marvell/axp/xor.c
index 76aea96..6ecacfe 100644
--- a/drivers/ddr/marvell/axp/xor.c
+++ b/drivers/ddr/marvell/axp/xor.c
@@ -3,7 +3,6 @@
* Copyright (C) Marvell International Ltd. and its affiliates
*/
-#include <common.h>
#include <i2c.h>
#include <log.h>
#include <spl.h>
diff --git a/drivers/ddr/microchip/ddr2.c b/drivers/ddr/microchip/ddr2.c
index 149b607..bfba5d2 100644
--- a/drivers/ddr/microchip/ddr2.c
+++ b/drivers/ddr/microchip/ddr2.c
@@ -3,7 +3,6 @@
* (c) 2015 Paul Thacker <paul.thacker@microchip.com>
*
*/
-#include <common.h>
#include <wait_bit.h>
#include <linux/kernel.h>
#include <linux/bitops.h>
diff --git a/drivers/demo/demo-pdata.c b/drivers/demo/demo-pdata.c
index 818f775..7371199 100644
--- a/drivers/demo/demo-pdata.c
+++ b/drivers/demo/demo-pdata.c
@@ -3,7 +3,6 @@
* Copyright (c) 2013 Google, Inc
*/
-#include <common.h>
#include <dm.h>
#include <dm-demo.h>
diff --git a/drivers/demo/demo-shape.c b/drivers/demo/demo-shape.c
index b6b29bc..3ccd5bc 100644
--- a/drivers/demo/demo-shape.c
+++ b/drivers/demo/demo-shape.c
@@ -3,7 +3,6 @@
* Copyright (c) 2013 Google, Inc
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <fdtdec.h>
diff --git a/drivers/demo/demo-simple.c b/drivers/demo/demo-simple.c
index 28b271f..944d589 100644
--- a/drivers/demo/demo-simple.c
+++ b/drivers/demo/demo-simple.c
@@ -6,7 +6,6 @@
* Pavel Herrmann <morpheus.ibis@gmail.com>
*/
-#include <common.h>
#include <dm.h>
#include <dm-demo.h>
#include <mapmem.h>
diff --git a/drivers/demo/demo-uclass.c b/drivers/demo/demo-uclass.c
index 09f9a47..d7b1305 100644
--- a/drivers/demo/demo-uclass.c
+++ b/drivers/demo/demo-uclass.c
@@ -6,7 +6,6 @@
* Pavel Herrmann <morpheus.ibis@gmail.com>
*/
-#include <common.h>
#include <dm.h>
#include <dm-demo.h>
#include <errno.h>
diff --git a/drivers/dfu/dfu.c b/drivers/dfu/dfu.c
index 2adf26e..540d48f 100644
--- a/drivers/dfu/dfu.c
+++ b/drivers/dfu/dfu.c
@@ -6,7 +6,6 @@
* author: Lukasz Majewski <l.majewski@samsung.com>
*/
-#include <common.h>
#include <env.h>
#include <errno.h>
#include <log.h>
diff --git a/drivers/dfu/dfu_alt.c b/drivers/dfu/dfu_alt.c
index ece3d22..e913293 100644
--- a/drivers/dfu/dfu_alt.c
+++ b/drivers/dfu/dfu_alt.c
@@ -4,7 +4,6 @@
* Lukasz Majewski <l.majewski@majess.pl>
*/
-#include <common.h>
#include <log.h>
#include <malloc.h>
#include <errno.h>
diff --git a/drivers/dfu/dfu_mmc.c b/drivers/dfu/dfu_mmc.c
index 12c54e9..cfa6334 100644
--- a/drivers/dfu/dfu_mmc.c
+++ b/drivers/dfu/dfu_mmc.c
@@ -6,7 +6,6 @@
* author: Lukasz Majewski <l.majewski@samsung.com>
*/
-#include <common.h>
#include <log.h>
#include <malloc.h>
#include <errno.h>
diff --git a/drivers/dfu/dfu_mtd.c b/drivers/dfu/dfu_mtd.c
index 4855869..c36ac09 100644
--- a/drivers/dfu/dfu_mtd.c
+++ b/drivers/dfu/dfu_mtd.c
@@ -7,7 +7,6 @@
* Based on dfu_nand.c
*/
-#include <common.h>
#include <dfu.h>
#include <mtd.h>
#include <linux/err.h>
diff --git a/drivers/dfu/dfu_nand.c b/drivers/dfu/dfu_nand.c
index 08e8cf5..940cfef 100644
--- a/drivers/dfu/dfu_nand.c
+++ b/drivers/dfu/dfu_nand.c
@@ -9,7 +9,6 @@
* author: Lukasz Majewski <l.majewski@samsung.com>
*/
-#include <common.h>
#include <log.h>
#include <malloc.h>
#include <errno.h>
diff --git a/drivers/dfu/dfu_ram.c b/drivers/dfu/dfu_ram.c
index c4f4bd2..043acbf 100644
--- a/drivers/dfu/dfu_ram.c
+++ b/drivers/dfu/dfu_ram.c
@@ -8,7 +8,6 @@
* author: Lukasz Majewski <l.majewski@samsung.com>
*/
-#include <common.h>
#include <malloc.h>
#include <mapmem.h>
#include <errno.h>
diff --git a/drivers/dfu/dfu_sf.c b/drivers/dfu/dfu_sf.c
index 2dae159..7c1c0f9 100644
--- a/drivers/dfu/dfu_sf.c
+++ b/drivers/dfu/dfu_sf.c
@@ -3,7 +3,6 @@
* Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved.
*/
-#include <common.h>
#include <malloc.h>
#include <errno.h>
#include <div64.h>
diff --git a/drivers/dfu/dfu_virt.c b/drivers/dfu/dfu_virt.c
index 29f7a08..2c31445 100644
--- a/drivers/dfu/dfu_virt.c
+++ b/drivers/dfu/dfu_virt.c
@@ -2,7 +2,6 @@
/*
* Copyright (C) 2019, STMicroelectronics - All Rights Reserved
*/
-#include <common.h>
#include <dfu.h>
#include <errno.h>
#include <log.h>
diff --git a/drivers/dma/apbh_dma.c b/drivers/dma/apbh_dma.c
index da988f6..331815c 100644
--- a/drivers/dma/apbh_dma.c
+++ b/drivers/dma/apbh_dma.c
@@ -15,7 +15,6 @@
#include <asm/cache.h>
#include <linux/list.h>
-#include <common.h>
#include <malloc.h>
#include <linux/errno.h>
#include <asm/io.h>
diff --git a/drivers/dma/bcm6348-iudma.c b/drivers/dma/bcm6348-iudma.c
index 33c7b98..fd3a353 100644
--- a/drivers/dma/bcm6348-iudma.c
+++ b/drivers/dma/bcm6348-iudma.c
@@ -15,7 +15,6 @@
* Copyright (C) 2010 Broadcom Corporation
*/
-#include <common.h>
#include <clk.h>
#include <cpu_func.h>
#include <dm.h>
diff --git a/drivers/dma/dma-uclass.c b/drivers/dma/dma-uclass.c
index 0c1d88e..2c76ba3 100644
--- a/drivers/dma/dma-uclass.c
+++ b/drivers/dma/dma-uclass.c
@@ -11,7 +11,6 @@
#define LOG_CATEGORY UCLASS_DMA
-#include <common.h>
#include <cpu_func.h>
#include <dm.h>
#include <log.h>
diff --git a/drivers/dma/fsl_dma.c b/drivers/dma/fsl_dma.c
index 700df22..0cd9bcb 100644
--- a/drivers/dma/fsl_dma.c
+++ b/drivers/dma/fsl_dma.c
@@ -9,7 +9,6 @@
*/
#include <config.h>
-#include <common.h>
#include <asm/io.h>
#include <asm/fsl_dma.h>
diff --git a/drivers/dma/keystone_nav.c b/drivers/dma/keystone_nav.c
index 9a5ba79..c84db45 100644
--- a/drivers/dma/keystone_nav.c
+++ b/drivers/dma/keystone_nav.c
@@ -5,10 +5,10 @@
* (C) Copyright 2012-2014
* Texas Instruments Incorporated, <www.ti.com>
*/
-#include <common.h>
#include <asm/io.h>
#include <asm/ti-common/keystone_nav.h>
#include <linux/delay.h>
+#include <linux/string.h>
struct qm_config qm_memmap = {
.stat_cfg = KS2_QM_QUEUE_STATUS_BASE,
diff --git a/drivers/dma/lpc32xx_dma.c b/drivers/dma/lpc32xx_dma.c
index 0efdfd0..f15b675 100644
--- a/drivers/dma/lpc32xx_dma.c
+++ b/drivers/dma/lpc32xx_dma.c
@@ -7,9 +7,9 @@
* Copyright (c) 2015 Tyco Fire Protection Products.
*/
-#include <common.h>
#include <errno.h>
#include <init.h>
+#include <time.h>
#include <asm/arch/dma.h>
#include <asm/arch/cpu.h>
#include <asm/arch/clk.h>
diff --git a/drivers/dma/sandbox-dma-test.c b/drivers/dma/sandbox-dma-test.c
index a19e5e3..0290b93 100644
--- a/drivers/dma/sandbox-dma-test.c
+++ b/drivers/dma/sandbox-dma-test.c
@@ -7,7 +7,6 @@
* Author: Grygorii Strashko <grygorii.strashko@ti.com>
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <malloc.h>
diff --git a/drivers/dma/ti-edma3.c b/drivers/dma/ti-edma3.c
index 31ffff0..d64059f 100644
--- a/drivers/dma/ti-edma3.c
+++ b/drivers/dma/ti-edma3.c
@@ -10,7 +10,6 @@
#include <asm/cache.h>
#include <asm/io.h>
-#include <common.h>
#include <dm.h>
#include <dma-uclass.h>
#include <linux/dma-mapping.h>
diff --git a/drivers/dma/ti/k3-udma.c b/drivers/dma/ti/k3-udma.c
index ef3074a..8e11d81 100644
--- a/drivers/dma/ti/k3-udma.c
+++ b/drivers/dma/ti/k3-udma.c
@@ -5,7 +5,6 @@
*/
#define pr_fmt(fmt) "udma: " fmt
-#include <common.h>
#include <cpu_func.h>
#include <log.h>
#include <asm/cache.h>
diff --git a/drivers/dma/xilinx_dpdma.c b/drivers/dma/xilinx_dpdma.c
index d4ee21d..1d615ec 100644
--- a/drivers/dma/xilinx_dpdma.c
+++ b/drivers/dma/xilinx_dpdma.c
@@ -3,7 +3,6 @@
* Copyright (C) 2021 Xilinx Inc.
*/
-#include <common.h>
#include <cpu_func.h>
#include <dm.h>
#include <dma.h>
diff --git a/drivers/extcon/extcon-max14526.c b/drivers/extcon/extcon-max14526.c
index a33b5ef..2d2166b 100644
--- a/drivers/extcon/extcon-max14526.c
+++ b/drivers/extcon/extcon-max14526.c
@@ -3,7 +3,6 @@
* Copyright (c) 2022 Svyatoslav Ryhel <clamor95@gmail.com>
*/
-#include <common.h>
#include <dm.h>
#include <i2c.h>
#include <linux/delay.h>
diff --git a/drivers/extcon/extcon-uclass.c b/drivers/extcon/extcon-uclass.c
index 9dd22b5..1a59287 100644
--- a/drivers/extcon/extcon-uclass.c
+++ b/drivers/extcon/extcon-uclass.c
@@ -5,7 +5,6 @@
#define LOG_CATEGORY UCLASS_EXTCON
-#include <common.h>
#include <extcon.h>
#include <dm.h>
diff --git a/drivers/fastboot/Kconfig b/drivers/fastboot/Kconfig
index 5e5855a..7020757 100644
--- a/drivers/fastboot/Kconfig
+++ b/drivers/fastboot/Kconfig
@@ -13,6 +13,10 @@
More information about the protocol and usecases:
https://android.googlesource.com/platform/system/core/+/refs/heads/master/fastboot/
+ Note that enabling CMDLINE is recommended since fastboot allows U-Boot
+ commands to be executed on request. The CMDLINE option is required
+ for anything other than simply booting the OS.
+
config USB_FUNCTION_FASTBOOT
bool "Enable USB fastboot gadget"
depends on USB_GADGET
@@ -249,6 +253,13 @@
Add support for the "oem console" command to input and read console
record buffer.
+config FASTBOOT_OEM_BOARD
+ bool "Enable the 'oem board' command"
+ help
+ This extends the fastboot protocol with an "oem board" command. This
+ command allows running vendor custom code defined in board/ files.
+ Otherwise, it will do nothing and send fastboot fail.
+
endif # FASTBOOT
endmenu
diff --git a/drivers/fastboot/fb_command.c b/drivers/fastboot/fb_command.c
index f95f4e4..e4484d6 100644
--- a/drivers/fastboot/fb_command.c
+++ b/drivers/fastboot/fb_command.c
@@ -3,7 +3,6 @@
* Copyright (C) 2016 The Android Open Source Project
*/
-#include <common.h>
#include <command.h>
#include <console.h>
#include <env.h>
@@ -13,6 +12,7 @@
#include <fb_nand.h>
#include <part.h>
#include <stdlib.h>
+#include <vsprintf.h>
#include <linux/printk.h>
/**
@@ -42,6 +42,7 @@
static void oem_partconf(char *, char *);
static void oem_bootbus(char *, char *);
static void oem_console(char *, char *);
+static void oem_board(char *, char *);
static void run_ucmd(char *, char *);
static void run_acmd(char *, char *);
@@ -113,6 +114,10 @@
.command = "oem console",
.dispatch = CONFIG_IS_ENABLED(FASTBOOT_CMD_OEM_CONSOLE, (oem_console), (NULL))
},
+ [FASTBOOT_COMMAND_OEM_BOARD] = {
+ .command = "oem board",
+ .dispatch = CONFIG_IS_ENABLED(FASTBOOT_OEM_BOARD, (oem_board), (NULL))
+ },
[FASTBOOT_COMMAND_UCMD] = {
.command = "UCmd",
.dispatch = CONFIG_IS_ENABLED(FASTBOOT_UUU_SUPPORT, (run_ucmd), (NULL))
@@ -542,3 +547,28 @@
else
fastboot_response(FASTBOOT_MULTIRESPONSE_START, response, NULL);
}
+
+/**
+ * fastboot_oem_board() - Execute the OEM board command. This is default
+ * weak implementation, which may be overwritten in board/ files.
+ *
+ * @cmd_parameter: Pointer to command parameter
+ * @data: Pointer to fastboot input buffer
+ * @size: Size of the fastboot input buffer
+ * @response: Pointer to fastboot response buffer
+ */
+void __weak fastboot_oem_board(char *cmd_parameter, void *data, u32 size, char *response)
+{
+ fastboot_fail("oem board function not defined", response);
+}
+
+/**
+ * oem_board() - Execute the OEM board command
+ *
+ * @cmd_parameter: Pointer to command parameter
+ * @response: Pointer to fastboot response buffer
+ */
+static void __maybe_unused oem_board(char *cmd_parameter, char *response)
+{
+ fastboot_oem_board(cmd_parameter, (void *)fastboot_buf_addr, image_size, response);
+}
diff --git a/drivers/fastboot/fb_common.c b/drivers/fastboot/fb_common.c
index 3576b06..12ffb46 100644
--- a/drivers/fastboot/fb_common.c
+++ b/drivers/fastboot/fb_common.c
@@ -11,11 +11,11 @@
*/
#include <bcb.h>
-#include <common.h>
#include <command.h>
#include <env.h>
#include <fastboot.h>
#include <net.h>
+#include <vsprintf.h>
/**
* fastboot_buf_addr - base address of the fastboot download buffer
diff --git a/drivers/fastboot/fb_getvar.c b/drivers/fastboot/fb_getvar.c
index f65519c..93cbd59 100644
--- a/drivers/fastboot/fb_getvar.c
+++ b/drivers/fastboot/fb_getvar.c
@@ -3,7 +3,6 @@
* Copyright (C) 2016 The Android Open Source Project
*/
-#include <common.h>
#include <env.h>
#include <fastboot.h>
#include <fastboot-internal.h>
@@ -12,6 +11,7 @@
#include <fs.h>
#include <part.h>
#include <version.h>
+#include <vsprintf.h>
#include <linux/printk.h>
static void getvar_version(char *var_parameter, char *response);
diff --git a/drivers/fastboot/fb_mmc.c b/drivers/fastboot/fb_mmc.c
index 060918e..f11eb66 100644
--- a/drivers/fastboot/fb_mmc.c
+++ b/drivers/fastboot/fb_mmc.c
@@ -4,7 +4,6 @@
*/
#include <config.h>
-#include <common.h>
#include <blk.h>
#include <env.h>
#include <fastboot.h>
diff --git a/drivers/fastboot/fb_nand.c b/drivers/fastboot/fb_nand.c
index bbe26dd..afc64fd 100644
--- a/drivers/fastboot/fb_nand.c
+++ b/drivers/fastboot/fb_nand.c
@@ -5,7 +5,6 @@
*/
#include <config.h>
-#include <common.h>
#include <blk.h>
#include <fastboot.h>
diff --git a/drivers/firmware/arm-ffa/arm-ffa-uclass.c b/drivers/firmware/arm-ffa/arm-ffa-uclass.c
index f1e91d1..e0767fc 100644
--- a/drivers/firmware/arm-ffa/arm-ffa-uclass.c
+++ b/drivers/firmware/arm-ffa/arm-ffa-uclass.c
@@ -5,7 +5,6 @@
* Authors:
* Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
*/
-#include <common.h>
#include <arm_ffa.h>
#include <arm_ffa_priv.h>
#include <dm.h>
diff --git a/drivers/firmware/arm-ffa/arm-ffa.c b/drivers/firmware/arm-ffa/arm-ffa.c
index ee0bf9a..94e6105 100644
--- a/drivers/firmware/arm-ffa/arm-ffa.c
+++ b/drivers/firmware/arm-ffa/arm-ffa.c
@@ -6,7 +6,6 @@
* Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
*/
-#include <common.h>
#include <arm_ffa.h>
#include <arm_ffa_priv.h>
#include <dm.h>
diff --git a/drivers/firmware/arm-ffa/ffa-emul-uclass.c b/drivers/firmware/arm-ffa/ffa-emul-uclass.c
index 4bf9f60..1521d9b 100644
--- a/drivers/firmware/arm-ffa/ffa-emul-uclass.c
+++ b/drivers/firmware/arm-ffa/ffa-emul-uclass.c
@@ -5,7 +5,6 @@
* Authors:
* Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
*/
-#include <common.h>
#include <dm.h>
#include <mapmem.h>
#include <string.h>
diff --git a/drivers/firmware/arm-ffa/sandbox_ffa.c b/drivers/firmware/arm-ffa/sandbox_ffa.c
index 1114242..44b32a8 100644
--- a/drivers/firmware/arm-ffa/sandbox_ffa.c
+++ b/drivers/firmware/arm-ffa/sandbox_ffa.c
@@ -5,7 +5,6 @@
* Authors:
* Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
*/
-#include <common.h>
#include <arm_ffa.h>
#include <dm.h>
#include <log.h>
diff --git a/drivers/firmware/firmware-sandbox.c b/drivers/firmware/firmware-sandbox.c
index d970d75..226b5cf 100644
--- a/drivers/firmware/firmware-sandbox.c
+++ b/drivers/firmware/firmware-sandbox.c
@@ -5,7 +5,6 @@
* Copyright (C) 2018 Xilinx, Inc.
*/
-#include <common.h>
#include <dm.h>
static const struct udevice_id generic_sandbox_firmware_ids[] = {
diff --git a/drivers/firmware/firmware-uclass.c b/drivers/firmware/firmware-uclass.c
index e83a147..84caf25 100644
--- a/drivers/firmware/firmware-uclass.c
+++ b/drivers/firmware/firmware-uclass.c
@@ -2,7 +2,6 @@
#define LOG_CATEGORY UCLASS_FIRMWARE
-#include <common.h>
#include <dm.h>
/* Firmware access is platform-dependent. No generic code in uclass */
diff --git a/drivers/firmware/firmware-zynqmp.c b/drivers/firmware/firmware-zynqmp.c
index dfad798..f99507d 100644
--- a/drivers/firmware/firmware-zynqmp.c
+++ b/drivers/firmware/firmware-zynqmp.c
@@ -5,7 +5,6 @@
* Copyright (C) 2018-2019 Xilinx, Inc.
*/
-#include <common.h>
#include <cpu_func.h>
#include <dm.h>
#include <dm/device_compat.h>
diff --git a/drivers/firmware/psci.c b/drivers/firmware/psci.c
index 03544d7..c32c3f5 100644
--- a/drivers/firmware/psci.c
+++ b/drivers/firmware/psci.c
@@ -6,7 +6,6 @@
* Copyright (C) 2015 ARM Limited
*/
-#include <common.h>
#include <command.h>
#include <dm.h>
#include <efi_loader.h>
diff --git a/drivers/firmware/scmi/base.c b/drivers/firmware/scmi/base.c
index 1d41a8a..f4e3974 100644
--- a/drivers/firmware/scmi/base.c
+++ b/drivers/firmware/scmi/base.c
@@ -6,7 +6,6 @@
* author: AKASHI Takahiro <takahiro.akashi@linaro.org>
*/
-#include <common.h>
#include <dm.h>
#include <scmi_agent.h>
#include <scmi_protocols.h>
diff --git a/drivers/firmware/scmi/mailbox_agent.c b/drivers/firmware/scmi/mailbox_agent.c
index 7ad3e8d..6d4497f 100644
--- a/drivers/firmware/scmi/mailbox_agent.c
+++ b/drivers/firmware/scmi/mailbox_agent.c
@@ -5,7 +5,6 @@
#define LOG_CATEGORY UCLASS_SCMI_AGENT
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <mailbox.h>
diff --git a/drivers/firmware/scmi/optee_agent.c b/drivers/firmware/scmi/optee_agent.c
index 48dbb88..631625d 100644
--- a/drivers/firmware/scmi/optee_agent.c
+++ b/drivers/firmware/scmi/optee_agent.c
@@ -5,7 +5,6 @@
#define LOG_CATEGORY UCLASS_SCMI_AGENT
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <scmi_agent.h>
diff --git a/drivers/firmware/scmi/sandbox-scmi_agent.c b/drivers/firmware/scmi/sandbox-scmi_agent.c
index cc9011c..19be280 100644
--- a/drivers/firmware/scmi/sandbox-scmi_agent.c
+++ b/drivers/firmware/scmi/sandbox-scmi_agent.c
@@ -5,7 +5,6 @@
#define LOG_CATEGORY UCLASS_SCMI_AGENT
-#include <common.h>
#include <dm.h>
#include <malloc.h>
#include <scmi_agent.h>
diff --git a/drivers/firmware/scmi/sandbox-scmi_devices.c b/drivers/firmware/scmi/sandbox-scmi_devices.c
index 603e2bb..96c2922 100644
--- a/drivers/firmware/scmi/sandbox-scmi_devices.c
+++ b/drivers/firmware/scmi/sandbox-scmi_devices.c
@@ -5,7 +5,6 @@
#define LOG_CATEGORY UCLASS_MISC
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <log.h>
diff --git a/drivers/firmware/scmi/scmi_agent-uclass.c b/drivers/firmware/scmi/scmi_agent-uclass.c
index 0f1003e..8c907c3 100644
--- a/drivers/firmware/scmi/scmi_agent-uclass.c
+++ b/drivers/firmware/scmi/scmi_agent-uclass.c
@@ -5,7 +5,6 @@
#define LOG_CATEGORY UCLASS_SCMI_AGENT
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <scmi_agent.h>
diff --git a/drivers/firmware/scmi/smccc_agent.c b/drivers/firmware/scmi/smccc_agent.c
index 972c6ad..ac35d07 100644
--- a/drivers/firmware/scmi/smccc_agent.c
+++ b/drivers/firmware/scmi/smccc_agent.c
@@ -5,7 +5,6 @@
#define LOG_CATEGORY UCLASS_SCMI_AGENT
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <scmi_agent.h>
diff --git a/drivers/firmware/scmi/smt.c b/drivers/firmware/scmi/smt.c
index 509ed61..67d2f45 100644
--- a/drivers/firmware/scmi/smt.c
+++ b/drivers/firmware/scmi/smt.c
@@ -6,7 +6,6 @@
#define LOG_CATEGORY UCLASS_SCMI_AGENT
-#include <common.h>
#include <cpu_func.h>
#include <dm.h>
#include <dm/device_compat.h>
diff --git a/drivers/firmware/ti_sci.c b/drivers/firmware/ti_sci.c
index ee09218..8ce0f46 100644
--- a/drivers/firmware/ti_sci.c
+++ b/drivers/firmware/ti_sci.c
@@ -7,7 +7,6 @@
* Lokesh Vutla <lokeshvutla@ti.com>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <log.h>
@@ -16,6 +15,7 @@
#include <dm/device.h>
#include <dm/device_compat.h>
#include <dm/devres.h>
+#include <dm/lists.h>
#include <linux/bitops.h>
#include <linux/compat.h>
#include <linux/err.h>
@@ -2840,6 +2840,12 @@
INIT_LIST_HEAD(&info->dev_list);
+ if (IS_ENABLED(CONFIG_SYSRESET_TI_SCI)) {
+ ret = device_bind_driver(dev, "ti-sci-sysreset", "sysreset", NULL);
+ if (ret)
+ dev_warn(dev, "cannot bind SYSRESET (ret = %d)\n", ret);
+ }
+
return 0;
}
diff --git a/drivers/fpga/ACEX1K.c b/drivers/fpga/ACEX1K.c
index 4c00cdf..cb7877a 100644
--- a/drivers/fpga/ACEX1K.c
+++ b/drivers/fpga/ACEX1K.c
@@ -9,7 +9,7 @@
#define LOG_CATEGORY UCLASS_FPGA
-#include <common.h> /* core U-Boot definitions */
+#include <config.h> /* core U-Boot definitions */
#include <console.h>
#include <log.h>
#include <ACEX1K.h> /* ACEX device family */
diff --git a/drivers/fpga/altera.c b/drivers/fpga/altera.c
index 6a4f0cb..ae06f01 100644
--- a/drivers/fpga/altera.c
+++ b/drivers/fpga/altera.c
@@ -12,7 +12,6 @@
/*
* Altera FPGA support
*/
-#include <common.h>
#include <errno.h>
#include <ACEX1K.h>
#include <log.h>
diff --git a/drivers/fpga/cyclon2.c b/drivers/fpga/cyclon2.c
index 6e8a313..7e78d6e 100644
--- a/drivers/fpga/cyclon2.c
+++ b/drivers/fpga/cyclon2.c
@@ -7,8 +7,9 @@
#define LOG_CATEGORY UCLASS_FPGA
-#include <common.h> /* core U-Boot definitions */
+#include <config.h> /* core U-Boot definitions */
#include <log.h>
+#include <time.h>
#include <altera.h>
#include <ACEX1K.h> /* ACEX device family */
#include <linux/delay.h>
diff --git a/drivers/fpga/fpga.c b/drivers/fpga/fpga.c
index 81e6d8f..38ba6c2 100644
--- a/drivers/fpga/fpga.c
+++ b/drivers/fpga/fpga.c
@@ -5,7 +5,6 @@
*/
/* Generic FPGA support */
-#include <common.h> /* core U-Boot definitions */
#include <init.h>
#include <log.h>
#include <xilinx.h> /* xilinx specific definitions */
diff --git a/drivers/fpga/intel_sdm_mb.c b/drivers/fpga/intel_sdm_mb.c
index 903d143..45caef4 100644
--- a/drivers/fpga/intel_sdm_mb.c
+++ b/drivers/fpga/intel_sdm_mb.c
@@ -3,14 +3,16 @@
* Copyright (C) 2018 Intel Corporation <www.intel.com>
*/
-#include <common.h>
#include <altera.h>
#include <log.h>
+#include <time.h>
#include <watchdog.h>
#include <asm/arch/mailbox_s10.h>
#include <asm/arch/smc_api.h>
#include <linux/delay.h>
+#include <linux/errno.h>
#include <linux/intel-smc.h>
+#include <linux/string.h>
#define RECONFIG_STATUS_POLL_RESP_TIMEOUT_MS 60000
#define RECONFIG_STATUS_INTERVAL_DELAY_US 1000000
diff --git a/drivers/fpga/ivm_core.c b/drivers/fpga/ivm_core.c
index adc6091..b9cecdd 100644
--- a/drivers/fpga/ivm_core.c
+++ b/drivers/fpga/ivm_core.c
@@ -29,7 +29,6 @@
* the ispVMLCOUNT function
*/
-#include <common.h>
#include <log.h>
#include <linux/string.h>
#include <malloc.h>
diff --git a/drivers/fpga/lattice.c b/drivers/fpga/lattice.c
index e292d99..036580c 100644
--- a/drivers/fpga/lattice.c
+++ b/drivers/fpga/lattice.c
@@ -10,7 +10,6 @@
* Copyright 2009 Lattice Semiconductor Corp.
*/
-#include <common.h>
#include <log.h>
#include <malloc.h>
#include <fpga.h>
diff --git a/drivers/fpga/socfpga.c b/drivers/fpga/socfpga.c
index d73414d..bb98c0e 100644
--- a/drivers/fpga/socfpga.c
+++ b/drivers/fpga/socfpga.c
@@ -4,7 +4,7 @@
* All rights reserved.
*/
-#include <common.h>
+#include <config.h>
#include <asm/io.h>
#include <linux/errno.h>
#include <asm/arch/fpga_manager.h>
diff --git a/drivers/fpga/socfpga_arria10.c b/drivers/fpga/socfpga_arria10.c
index 96b1950..e9822b2 100644
--- a/drivers/fpga/socfpga_arria10.c
+++ b/drivers/fpga/socfpga_arria10.c
@@ -13,7 +13,6 @@
#include <asm/arch/misc.h>
#include <altera.h>
#include <asm/arch/pinmux.h>
-#include <common.h>
#include <dm.h>
#include <dm/ofnode.h>
#include <errno.h>
diff --git a/drivers/fpga/socfpga_gen5.c b/drivers/fpga/socfpga_gen5.c
index d73474f..9473f05 100644
--- a/drivers/fpga/socfpga_gen5.c
+++ b/drivers/fpga/socfpga_gen5.c
@@ -4,7 +4,7 @@
* All rights reserved.
*/
-#include <common.h>
+#include <config.h>
#include <asm/io.h>
#include <linux/errno.h>
#include <asm/arch/fpga_manager.h>
diff --git a/drivers/fpga/spartan2.c b/drivers/fpga/spartan2.c
index 6eef87b..9cd6cb7 100644
--- a/drivers/fpga/spartan2.c
+++ b/drivers/fpga/spartan2.c
@@ -6,7 +6,7 @@
#define LOG_CATEGORY UCLASS_FPGA
-#include <common.h> /* core U-Boot definitions */
+#include <config.h> /* core U-Boot definitions */
#include <log.h>
#include <spartan2.h> /* Spartan-II device family */
diff --git a/drivers/fpga/spartan3.c b/drivers/fpga/spartan3.c
index e892fa5..b4d87d4 100644
--- a/drivers/fpga/spartan3.c
+++ b/drivers/fpga/spartan3.c
@@ -11,8 +11,9 @@
#define LOG_CATEGORY UCLASS_FPGA
-#include <common.h> /* core U-Boot definitions */
+#include <config.h> /* core U-Boot definitions */
#include <log.h>
+#include <time.h>
#include <spartan3.h> /* Spartan-II device family */
/* Note: The assumption is that we cannot possibly run fast enough to
diff --git a/drivers/fpga/stratixII.c b/drivers/fpga/stratixII.c
index b450a81..73fecd9 100644
--- a/drivers/fpga/stratixII.c
+++ b/drivers/fpga/stratixII.c
@@ -4,7 +4,6 @@
* Eran Liberty, Extricom , eran.liberty@gmail.com
*/
-#include <common.h> /* core U-Boot definitions */
#include <altera.h>
#include <linux/delay.h>
diff --git a/drivers/fpga/stratixv.c b/drivers/fpga/stratixv.c
index abae3b5..372f16d 100644
--- a/drivers/fpga/stratixv.c
+++ b/drivers/fpga/stratixv.c
@@ -3,7 +3,6 @@
* Copyright (C) 2016 Stefan Roese <sr@denx.de>
*/
-#include <common.h>
#include <altera.h>
#include <log.h>
#include <spi.h>
diff --git a/drivers/fpga/versalpl.c b/drivers/fpga/versalpl.c
index be58db5..1957e8d 100644
--- a/drivers/fpga/versalpl.c
+++ b/drivers/fpga/versalpl.c
@@ -4,7 +4,6 @@
* Siva Durga Prasad Paladugu <siva.durga.prasad.paladugu@amd.com>>
*/
-#include <common.h>
#include <cpu_func.h>
#include <log.h>
#include <asm/arch/sys_proto.h>
diff --git a/drivers/fpga/virtex2.c b/drivers/fpga/virtex2.c
index 3ded27f..8e2c12b 100644
--- a/drivers/fpga/virtex2.c
+++ b/drivers/fpga/virtex2.c
@@ -14,7 +14,7 @@
#define LOG_CATEGORY UCLASS_FPGA
-#include <common.h>
+#include <config.h>
#include <console.h>
#include <log.h>
#include <virtex2.h>
diff --git a/drivers/fpga/xilinx.c b/drivers/fpga/xilinx.c
index 8170c33..c465132 100644
--- a/drivers/fpga/xilinx.c
+++ b/drivers/fpga/xilinx.c
@@ -11,13 +11,13 @@
* Xilinx FPGA support
*/
-#include <common.h>
#include <fpga.h>
#include <log.h>
#include <virtex2.h>
#include <spartan2.h>
#include <spartan3.h>
#include <zynqpl.h>
+#include <linux/string.h>
/* Local Static Functions */
static int xilinx_validate(xilinx_desc *desc, char *fn);
diff --git a/drivers/fpga/zynqmppl.c b/drivers/fpga/zynqmppl.c
index 2656f5f..2b62bbb 100644
--- a/drivers/fpga/zynqmppl.c
+++ b/drivers/fpga/zynqmppl.c
@@ -6,7 +6,6 @@
*/
#include <console.h>
-#include <common.h>
#include <compiler.h>
#include <cpu_func.h>
#include <fpga.h>
diff --git a/drivers/fpga/zynqpl.c b/drivers/fpga/zynqpl.c
index a2e3b30..57467b4 100644
--- a/drivers/fpga/zynqpl.c
+++ b/drivers/fpga/zynqpl.c
@@ -6,10 +6,11 @@
* Joe Hershberger <joe.hershberger@ni.com>
*/
-#include <common.h>
+#include <config.h>
#include <console.h>
#include <cpu_func.h>
#include <log.h>
+#include <time.h>
#include <asm/cache.h>
#include <asm/io.h>
#include <fs.h>
diff --git a/drivers/fuzz/fuzzing_engine-uclass.c b/drivers/fuzz/fuzzing_engine-uclass.c
index b16f1c4..08ce3ed 100644
--- a/drivers/fuzz/fuzzing_engine-uclass.c
+++ b/drivers/fuzz/fuzzing_engine-uclass.c
@@ -6,7 +6,6 @@
#define LOG_CATEGORY UCLASS_FUZZING_ENGINE
-#include <common.h>
#include <dm.h>
#include <fuzzing_engine.h>
diff --git a/drivers/fuzz/sandbox_fuzzing_engine.c b/drivers/fuzz/sandbox_fuzzing_engine.c
index ebb938e..6774024 100644
--- a/drivers/fuzz/sandbox_fuzzing_engine.c
+++ b/drivers/fuzz/sandbox_fuzzing_engine.c
@@ -4,7 +4,6 @@
* Written by Andrew Scull <ascull@google.com>
*/
-#include <common.h>
#include <dm.h>
#include <fuzzing_engine.h>
#include <asm/fuzzing_engine.h>
diff --git a/drivers/fwu-mdata/fwu-mdata-uclass.c b/drivers/fwu-mdata/fwu-mdata-uclass.c
index 0a8edaa..bab7a7e 100644
--- a/drivers/fwu-mdata/fwu-mdata-uclass.c
+++ b/drivers/fwu-mdata/fwu-mdata-uclass.c
@@ -5,7 +5,6 @@
#define LOG_CATEGORY UCLASS_FWU_MDATA
-#include <common.h>
#include <dm.h>
#include <efi_loader.h>
#include <fwu.h>
diff --git a/drivers/gpio/74x164_gpio.c b/drivers/gpio/74x164_gpio.c
index 7a7cfe8..331428c 100644
--- a/drivers/gpio/74x164_gpio.c
+++ b/drivers/gpio/74x164_gpio.c
@@ -8,7 +8,6 @@
*
*/
-#include <common.h>
#include <errno.h>
#include <dm.h>
#include <fdtdec.h>
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index a7fb1eb..b050585 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -665,13 +665,6 @@
8-bit gpo expander, all gpo lines are controlled by writing
value into data register.
-config TURRIS_OMNIA_MCU
- bool "Turris Omnia MCU GPIO driver"
- depends on DM_GPIO
- default y if TARGET_TURRIS_OMNIA
- help
- Support for GPIOs on MCU connected to Turris Omnia via i2c.
-
config FTGPIO010
bool "Faraday Technology FTGPIO010 driver"
depends on DM_GPIO
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index 9071170..4a29315 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -73,7 +73,6 @@
obj-$(CONFIG_SL28CPLD_GPIO) += sl28cpld-gpio.o
obj-$(CONFIG_ZYNQMP_GPIO_MODEPIN) += zynqmp_gpio_modepin.o
obj-$(CONFIG_SLG7XL45106_I2C_GPO) += gpio_slg7xl45106.o
-obj-$(CONFIG_$(SPL_TPL_)TURRIS_OMNIA_MCU) += turris_omnia_mcu.o
obj-$(CONFIG_FTGPIO010) += ftgpio010.o
obj-$(CONFIG_ADP5585_GPIO) += adp5585_gpio.o
obj-$(CONFIG_RZG2L_GPIO) += rzg2l-gpio.o
diff --git a/drivers/gpio/altera_pio.c b/drivers/gpio/altera_pio.c
index edc5a80..7ba1595 100644
--- a/drivers/gpio/altera_pio.c
+++ b/drivers/gpio/altera_pio.c
@@ -4,7 +4,6 @@
* Copyright (C) 2011 Missing Link Electronics
* Joachim Foerster <joachim@missinglinkelectronics.com>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <malloc.h>
diff --git a/drivers/gpio/at91_gpio.c b/drivers/gpio/at91_gpio.c
index f80f4af..50a6981 100644
--- a/drivers/gpio/at91_gpio.c
+++ b/drivers/gpio/at91_gpio.c
@@ -8,7 +8,6 @@
*/
#include <config.h>
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <malloc.h>
diff --git a/drivers/gpio/atmel_pio4.c b/drivers/gpio/atmel_pio4.c
index be1dd75..65d064b 100644
--- a/drivers/gpio/atmel_pio4.c
+++ b/drivers/gpio/atmel_pio4.c
@@ -5,7 +5,6 @@
* Copyright (C) 2015 Atmel Corporation
* Wenyou.Yang <wenyou.yang@atmel.com>
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <fdtdec.h>
diff --git a/drivers/gpio/axp_gpio.c b/drivers/gpio/axp_gpio.c
index af66316..6e632c8 100644
--- a/drivers/gpio/axp_gpio.c
+++ b/drivers/gpio/axp_gpio.c
@@ -5,7 +5,6 @@
* X-Powers AXP Power Management ICs gpio driver
*/
-#include <common.h>
#include <asm/arch/pmic_bus.h>
#include <asm/gpio.h>
#include <axp_pmic.h>
diff --git a/drivers/gpio/bcm2835_gpio.c b/drivers/gpio/bcm2835_gpio.c
index 704a6fa..ccf84fd 100644
--- a/drivers/gpio/bcm2835_gpio.c
+++ b/drivers/gpio/bcm2835_gpio.c
@@ -4,7 +4,6 @@
* <vikram186@gmail.com>
*/
-#include <common.h>
#include <dm.h>
#include <dm/pinctrl.h>
#include <errno.h>
diff --git a/drivers/gpio/bcm6345_gpio.c b/drivers/gpio/bcm6345_gpio.c
index e031f71..e76c84e 100644
--- a/drivers/gpio/bcm6345_gpio.c
+++ b/drivers/gpio/bcm6345_gpio.c
@@ -7,7 +7,6 @@
* Copyright (C) 2008-2011 Florian Fainelli <florian@openwrt.org>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <asm/gpio.h>
diff --git a/drivers/gpio/cortina_gpio.c b/drivers/gpio/cortina_gpio.c
index 72ef523..e0ea14c 100644
--- a/drivers/gpio/cortina_gpio.c
+++ b/drivers/gpio/cortina_gpio.c
@@ -5,7 +5,6 @@
* GPIO Driver for Cortina Access CAxxxx Line of SoCs
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <asm/io.h>
diff --git a/drivers/gpio/da8xx_gpio.c b/drivers/gpio/da8xx_gpio.c
index b310f2d..1ccb9e6 100644
--- a/drivers/gpio/da8xx_gpio.c
+++ b/drivers/gpio/da8xx_gpio.c
@@ -6,7 +6,6 @@
* Laurence Withers <lwithers@guralp.com>
*/
-#include <common.h>
#include <dm.h>
#include <fdtdec.h>
#include <malloc.h>
diff --git a/drivers/gpio/ftgpio010.c b/drivers/gpio/ftgpio010.c
index 6c091d4..4cb550a 100644
--- a/drivers/gpio/ftgpio010.c
+++ b/drivers/gpio/ftgpio010.c
@@ -3,7 +3,6 @@
* Faraday Technology's FTGPIO010 controller.
*/
-#include <common.h>
#include <dm.h>
#include <asm/io.h>
#include <asm/gpio.h>
diff --git a/drivers/gpio/gpio-aspeed.c b/drivers/gpio/gpio-aspeed.c
index 1c3d187..c5608f4 100644
--- a/drivers/gpio/gpio-aspeed.c
+++ b/drivers/gpio/gpio-aspeed.c
@@ -6,7 +6,6 @@
*
* Implementation extracted from the Linux kernel and adapted for u-boot.
*/
-#include <common.h>
#include <asm/io.h>
#include <asm/gpio.h>
diff --git a/drivers/gpio/gpio-fxl6408.c b/drivers/gpio/gpio-fxl6408.c
index ca7aa14..c8d2dff 100644
--- a/drivers/gpio/gpio-fxl6408.c
+++ b/drivers/gpio/gpio-fxl6408.c
@@ -37,7 +37,6 @@
#include <asm-generic/gpio.h>
#include <asm/global_data.h>
-#include <common.h>
#include <dm.h>
#include <dm/device_compat.h>
#include <dt-bindings/gpio/gpio.h>
diff --git a/drivers/gpio/gpio-rcar.c b/drivers/gpio/gpio-rcar.c
index 7077850..d1a3993 100644
--- a/drivers/gpio/gpio-rcar.c
+++ b/drivers/gpio/gpio-rcar.c
@@ -3,7 +3,6 @@
* Copyright (C) 2017 Marek Vasut <marek.vasut@gmail.com>
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <malloc.h>
diff --git a/drivers/gpio/gpio-rza1.c b/drivers/gpio/gpio-rza1.c
index f14be87..8c3fe61 100644
--- a/drivers/gpio/gpio-rza1.c
+++ b/drivers/gpio/gpio-rza1.c
@@ -3,7 +3,6 @@
* Copyright (C) 2019 Marek Vasut <marek.vasut@gmail.com>
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <errno.h>
diff --git a/drivers/gpio/gpio-uclass.c b/drivers/gpio/gpio-uclass.c
index 4234cd9..92ce68d 100644
--- a/drivers/gpio/gpio-uclass.c
+++ b/drivers/gpio/gpio-uclass.c
@@ -5,7 +5,6 @@
#define LOG_CATEGORY UCLASS_GPIO
-#include <common.h>
#include <dm.h>
#include <dt-structs.h>
#include <log.h>
diff --git a/drivers/gpio/gpio-uniphier.c b/drivers/gpio/gpio-uniphier.c
index 61c705b..033fb4b 100644
--- a/drivers/gpio/gpio-uniphier.c
+++ b/drivers/gpio/gpio-uniphier.c
@@ -4,7 +4,6 @@
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*/
-#include <common.h>
#include <dm.h>
#include <linux/bitops.h>
#include <linux/io.h>
diff --git a/drivers/gpio/gpio_slg7xl45106.c b/drivers/gpio/gpio_slg7xl45106.c
index 4ad06c1..a7c9ff5 100644
--- a/drivers/gpio/gpio_slg7xl45106.c
+++ b/drivers/gpio/gpio_slg7xl45106.c
@@ -5,7 +5,6 @@
* Copyright (C) 2021 Xilinx, Inc.
*/
-#include <common.h>
#include <errno.h>
#include <asm/io.h>
#include <asm/gpio.h>
diff --git a/drivers/gpio/hi6220_gpio.c b/drivers/gpio/hi6220_gpio.c
index e287c31..7ceb5f4 100644
--- a/drivers/gpio/hi6220_gpio.c
+++ b/drivers/gpio/hi6220_gpio.c
@@ -4,7 +4,6 @@
* Peter Griffin <peter.griffin@linaro.org>
*/
-#include <common.h>
#include <dm.h>
#include <asm/gpio.h>
#include <asm/io.h>
diff --git a/drivers/gpio/hsdk-creg-gpio.c b/drivers/gpio/hsdk-creg-gpio.c
index 66f8441..734b31d 100644
--- a/drivers/gpio/hsdk-creg-gpio.c
+++ b/drivers/gpio/hsdk-creg-gpio.c
@@ -12,7 +12,6 @@
#include <log.h>
#include <asm-generic/gpio.h>
#include <asm/io.h>
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <linux/bitops.h>
diff --git a/drivers/gpio/imx_rgpio2p.c b/drivers/gpio/imx_rgpio2p.c
index 175e460..fc1d418 100644
--- a/drivers/gpio/imx_rgpio2p.c
+++ b/drivers/gpio/imx_rgpio2p.c
@@ -5,7 +5,6 @@
* RGPIO2P driver for the Freescale i.MX7ULP.
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <fdtdec.h>
@@ -21,6 +20,12 @@
#define GPIO_PER_BANK 32
+struct imx_rgpio2p_soc_data {
+ bool have_dual_base;
+};
+
+#define IMX8ULP_GPIO_BASE_OFF 0x40
+
struct imx_rgpio2p_data {
struct gpio_regs *regs;
};
@@ -165,6 +170,9 @@
static int imx_rgpio2p_bind(struct udevice *dev)
{
struct imx_rgpio2p_plat *plat = dev_get_plat(dev);
+ struct imx_rgpio2p_soc_data *data =
+ (struct imx_rgpio2p_soc_data *)dev_get_driver_data(dev);
+ bool dual_base = data->have_dual_base;
fdt_addr_t addr;
/*
@@ -176,9 +184,26 @@
if (plat)
return 0;
- addr = devfdt_get_addr_index(dev, 1);
- if (addr == FDT_ADDR_T_NONE)
- return -EINVAL;
+ /*
+ * Handle legacy compatible combinations which used two reg values
+ * for the i.MX8ULP and i.MX93.
+ */
+ if (device_is_compatible(dev, "fsl,imx7ulp-gpio") &&
+ (device_is_compatible(dev, "fsl,imx93-gpio") ||
+ (device_is_compatible(dev, "fsl,imx8ulp-gpio"))))
+ dual_base = true;
+
+ if (dual_base) {
+ addr = devfdt_get_addr_index(dev, 1);
+ if (addr == FDT_ADDR_T_NONE)
+ return -EINVAL;
+ } else {
+ addr = devfdt_get_addr_index(dev, 0);
+ if (addr == FDT_ADDR_T_NONE)
+ return -EINVAL;
+
+ addr += IMX8ULP_GPIO_BASE_OFF;
+ }
/*
* TODO:
@@ -202,9 +227,17 @@
return 0;
}
+static struct imx_rgpio2p_soc_data imx7ulp_data = {
+ .have_dual_base = true,
+};
+
+static struct imx_rgpio2p_soc_data imx8ulp_data = {
+ .have_dual_base = false,
+};
static const struct udevice_id imx_rgpio2p_ids[] = {
- { .compatible = "fsl,imx7ulp-gpio" },
+ { .compatible = "fsl,imx7ulp-gpio", .data = (ulong)&imx7ulp_data },
+ { .compatible = "fsl,imx8ulp-gpio", .data = (ulong)&imx8ulp_data },
{ }
};
diff --git a/drivers/gpio/intel_broadwell_gpio.c b/drivers/gpio/intel_broadwell_gpio.c
index 20af35d..53ed0a3 100644
--- a/drivers/gpio/intel_broadwell_gpio.c
+++ b/drivers/gpio/intel_broadwell_gpio.c
@@ -3,7 +3,6 @@
* Copyright (c) 2012 The Chromium OS Authors.
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <fdtdec.h>
diff --git a/drivers/gpio/intel_gpio.c b/drivers/gpio/intel_gpio.c
index 4a3ec6d..0ab6e8a 100644
--- a/drivers/gpio/intel_gpio.c
+++ b/drivers/gpio/intel_gpio.c
@@ -5,7 +5,6 @@
#define LOG_CATEGORY UCLASS_GPIO
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <fdtdec.h>
diff --git a/drivers/gpio/intel_ich6_gpio.c b/drivers/gpio/intel_ich6_gpio.c
index 2ed0d0b..096bc3b 100644
--- a/drivers/gpio/intel_ich6_gpio.c
+++ b/drivers/gpio/intel_ich6_gpio.c
@@ -28,7 +28,6 @@
#define LOG_CATEGORY UCLASS_GPIO
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <fdtdec.h>
diff --git a/drivers/gpio/iproc_gpio.c b/drivers/gpio/iproc_gpio.c
index 7187d32..8688f12 100644
--- a/drivers/gpio/iproc_gpio.c
+++ b/drivers/gpio/iproc_gpio.c
@@ -3,7 +3,6 @@
* Copyright (C) 2020 Broadcom
*/
-#include <common.h>
#include <errno.h>
#include <asm/gpio.h>
#include <asm/io.h>
diff --git a/drivers/gpio/kw_gpio.c b/drivers/gpio/kw_gpio.c
index a157697..e183f55 100644
--- a/drivers/gpio/kw_gpio.c
+++ b/drivers/gpio/kw_gpio.c
@@ -12,7 +12,6 @@
* Dieter Kiermaier dk-arm-linux@gmx.de
*/
-#include <common.h>
#include <linux/bitops.h>
#include <asm/io.h>
#include <asm/arch/soc.h>
diff --git a/drivers/gpio/lpc32xx_gpio.c b/drivers/gpio/lpc32xx_gpio.c
index de66c76..2b537e0 100644
--- a/drivers/gpio/lpc32xx_gpio.c
+++ b/drivers/gpio/lpc32xx_gpio.c
@@ -6,7 +6,6 @@
* Written-by: Albert ARIBAUD <albert.aribaud@3adev.fr>
*/
-#include <common.h>
#include <asm/io.h>
#include <asm/arch-lpc32xx/cpu.h>
#include <asm/arch-lpc32xx/gpio.h>
diff --git a/drivers/gpio/max7320_gpio.c b/drivers/gpio/max7320_gpio.c
index 647aed9..f733cc9 100644
--- a/drivers/gpio/max7320_gpio.c
+++ b/drivers/gpio/max7320_gpio.c
@@ -7,7 +7,6 @@
*
*/
-#include <common.h>
#include <dm.h>
#include <i2c.h>
#include <asm-generic/gpio.h>
diff --git a/drivers/gpio/mcp230xx_gpio.c b/drivers/gpio/mcp230xx_gpio.c
index df99fde..42e7fe9 100644
--- a/drivers/gpio/mcp230xx_gpio.c
+++ b/drivers/gpio/mcp230xx_gpio.c
@@ -7,7 +7,6 @@
#define LOG_CATEGORY UCLASS_GPIO
-#include <common.h>
#include <errno.h>
#include <dm.h>
#include <i2c.h>
diff --git a/drivers/gpio/mpc83xx_spisel_boot.c b/drivers/gpio/mpc83xx_spisel_boot.c
index fd26a36..2be8c73 100644
--- a/drivers/gpio/mpc83xx_spisel_boot.c
+++ b/drivers/gpio/mpc83xx_spisel_boot.c
@@ -5,7 +5,6 @@
* GPIO driver to set/clear SPISEL_BOOT pin on mpc83xx.
*/
-#include <common.h>
#include <log.h>
#include <dm.h>
#include <mapmem.h>
diff --git a/drivers/gpio/mpc8xx_gpio.c b/drivers/gpio/mpc8xx_gpio.c
index 2f65346..e2b12f8 100644
--- a/drivers/gpio/mpc8xx_gpio.c
+++ b/drivers/gpio/mpc8xx_gpio.c
@@ -10,7 +10,6 @@
* Copyright 2010 eXMeritus, A Boeing Company
*/
-#include <common.h>
#include <asm/io.h>
#include <dm.h>
#include <mapmem.h>
diff --git a/drivers/gpio/mpc8xxx_gpio.c b/drivers/gpio/mpc8xxx_gpio.c
index f7ffd89..e9bd38f 100644
--- a/drivers/gpio/mpc8xxx_gpio.c
+++ b/drivers/gpio/mpc8xxx_gpio.c
@@ -9,7 +9,6 @@
* Copyright 2020-2021 NXP
*/
-#include <common.h>
#include <dm.h>
#include <mapmem.h>
#include <asm/gpio.h>
diff --git a/drivers/gpio/mscc_sgpio.c b/drivers/gpio/mscc_sgpio.c
index c97e440..5a40304 100644
--- a/drivers/gpio/mscc_sgpio.c
+++ b/drivers/gpio/mscc_sgpio.c
@@ -7,7 +7,6 @@
* Copyright (c) 2018 Microsemi Corporation
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <asm/gpio.h>
diff --git a/drivers/gpio/msm_gpio.c b/drivers/gpio/msm_gpio.c
index 5e57b0c..2fb266f 100644
--- a/drivers/gpio/msm_gpio.c
+++ b/drivers/gpio/msm_gpio.c
@@ -5,7 +5,6 @@
* (C) Copyright 2015 Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <asm/global_data.h>
@@ -35,19 +34,19 @@
#define GPIO_IN_OUT_REG(dev, x) \
(GPIO_CONFIG_REG(dev, x) + 0x4)
-static int msm_gpio_direction_input(struct udevice *dev, unsigned int gpio)
+static void msm_gpio_direction_input(struct udevice *dev, unsigned int gpio)
{
struct msm_gpio_bank *priv = dev_get_priv(dev);
/* Always NOP for special pins, assume they're in the correct state */
if (qcom_is_special_pin(priv->pin_data, gpio))
- return 0;
+ return;
/* Disable OE bit */
clrsetbits_le32(priv->base + GPIO_CONFIG_REG(dev, gpio),
GPIO_OE_MASK, GPIO_OE_DISABLE);
- return 0;
+ return;
}
static int msm_gpio_set_value(struct udevice *dev, unsigned int gpio, int value)
@@ -84,6 +83,23 @@
return 0;
}
+static int msm_gpio_set_flags(struct udevice *dev, unsigned int gpio, ulong flags)
+{
+ if (flags & GPIOD_IS_OUT_ACTIVE) {
+ return msm_gpio_direction_output(dev, gpio, 1);
+ } else if (flags & GPIOD_IS_OUT) {
+ return msm_gpio_direction_output(dev, gpio, 0);
+ } else if (flags & GPIOD_IS_IN) {
+ msm_gpio_direction_input(dev, gpio);
+ if (flags & GPIOD_PULL_UP)
+ return msm_gpio_set_value(dev, gpio, 1);
+ else if (flags & GPIOD_PULL_DOWN)
+ return msm_gpio_set_value(dev, gpio, 0);
+ }
+
+ return 0;
+}
+
static int msm_gpio_get_value(struct udevice *dev, unsigned int gpio)
{
struct msm_gpio_bank *priv = dev_get_priv(dev);
@@ -110,10 +126,8 @@
}
static const struct dm_gpio_ops gpio_msm_ops = {
- .direction_input = msm_gpio_direction_input,
- .direction_output = msm_gpio_direction_output,
+ .set_flags = msm_gpio_set_flags,
.get_value = msm_gpio_get_value,
- .set_value = msm_gpio_set_value,
.get_function = msm_gpio_get_function,
};
diff --git a/drivers/gpio/mt7621_gpio.c b/drivers/gpio/mt7621_gpio.c
index 43bb4df..63a2023 100644
--- a/drivers/gpio/mt7621_gpio.c
+++ b/drivers/gpio/mt7621_gpio.c
@@ -7,7 +7,6 @@
* Copyright (C) 2013 John Crispin <blogic@openwrt.org>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <fdtdec.h>
diff --git a/drivers/gpio/mvebu_gpio.c b/drivers/gpio/mvebu_gpio.c
index f706a6d..0d82380 100644
--- a/drivers/gpio/mvebu_gpio.c
+++ b/drivers/gpio/mvebu_gpio.c
@@ -3,7 +3,6 @@
* Copyright (C) 2016 Stefan Roese <sr@denx.de>
*/
-#include <common.h>
#include <dm.h>
#include <dm/pinctrl.h>
#include <asm/gpio.h>
diff --git a/drivers/gpio/mxc_gpio.c b/drivers/gpio/mxc_gpio.c
index 1dec4e3..cac6b32 100644
--- a/drivers/gpio/mxc_gpio.c
+++ b/drivers/gpio/mxc_gpio.c
@@ -6,7 +6,6 @@
* Copyright (C) 2011
* Stefano Babic, DENX Software Engineering, <sbabic@denx.de>
*/
-#include <common.h>
#include <errno.h>
#include <dm.h>
#include <malloc.h>
diff --git a/drivers/gpio/mxs_gpio.c b/drivers/gpio/mxs_gpio.c
index 1356f89..80910c9 100644
--- a/drivers/gpio/mxs_gpio.c
+++ b/drivers/gpio/mxs_gpio.c
@@ -6,7 +6,6 @@
* on behalf of DENX Software Engineering GmbH
*/
-#include <common.h>
#include <log.h>
#include <malloc.h>
#include <asm/global_data.h>
diff --git a/drivers/gpio/nmk_gpio.c b/drivers/gpio/nmk_gpio.c
index e1bb41b..c2716e7 100644
--- a/drivers/gpio/nmk_gpio.c
+++ b/drivers/gpio/nmk_gpio.c
@@ -1,7 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+
/* Copyright (C) 2019 Stephan Gerhold */
-#include <common.h>
#include <dm.h>
#include <asm/gpio.h>
#include <asm/io.h>
diff --git a/drivers/gpio/npcm_gpio.c b/drivers/gpio/npcm_gpio.c
index 98e5dc7..da3b3ff 100644
--- a/drivers/gpio/npcm_gpio.c
+++ b/drivers/gpio/npcm_gpio.c
@@ -3,7 +3,6 @@
* Copyright (c) 2022 Nuvoton Technology Corp.
*/
-#include <common.h>
#include <dm.h>
#include <asm/gpio.h>
#include <linux/io.h>
diff --git a/drivers/gpio/nx_gpio.c b/drivers/gpio/nx_gpio.c
index e2565d7..741b2ff 100644
--- a/drivers/gpio/nx_gpio.c
+++ b/drivers/gpio/nx_gpio.c
@@ -4,7 +4,6 @@
* DeokJin, Lee <truevirtue@nexell.co.kr>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <malloc.h>
diff --git a/drivers/gpio/omap_gpio.c b/drivers/gpio/omap_gpio.c
index 50c4f75..1aceafc 100644
--- a/drivers/gpio/omap_gpio.c
+++ b/drivers/gpio/omap_gpio.c
@@ -17,7 +17,6 @@
* Copyright (C) 2003-2005 Nokia Corporation
* Written by Juha Yrjölä <juha.yrjola@nokia.com>
*/
-#include <common.h>
#include <dm.h>
#include <fdtdec.h>
#include <asm/global_data.h>
diff --git a/drivers/gpio/pca953x.c b/drivers/gpio/pca953x.c
index b5ed352..fc4dcf9 100644
--- a/drivers/gpio/pca953x.c
+++ b/drivers/gpio/pca953x.c
@@ -8,10 +8,11 @@
* pca9539, etc)
*/
-#include <common.h>
+#include <config.h>
#include <command.h>
#include <i2c.h>
#include <pca953x.h>
+#include <vsprintf.h>
/* Default to an address that hopefully won't corrupt other i2c devices */
#ifndef CFG_SYS_I2C_PCA953X_ADDR
diff --git a/drivers/gpio/pca953x_gpio.c b/drivers/gpio/pca953x_gpio.c
index b0c66d1..80ebaad 100644
--- a/drivers/gpio/pca953x_gpio.c
+++ b/drivers/gpio/pca953x_gpio.c
@@ -18,7 +18,6 @@
* 2. Support Polarity Inversion
*/
-#include <common.h>
#include <errno.h>
#include <dm.h>
#include <fdtdec.h>
diff --git a/drivers/gpio/pcf8575_gpio.c b/drivers/gpio/pcf8575_gpio.c
index f38e215..10ae86e 100644
--- a/drivers/gpio/pcf8575_gpio.c
+++ b/drivers/gpio/pcf8575_gpio.c
@@ -17,7 +17,6 @@
*
*/
-#include <common.h>
#include <dm.h>
#include <i2c.h>
#include <log.h>
diff --git a/drivers/gpio/pic32_gpio.c b/drivers/gpio/pic32_gpio.c
index 975a2af..d8edfef 100644
--- a/drivers/gpio/pic32_gpio.c
+++ b/drivers/gpio/pic32_gpio.c
@@ -4,7 +4,6 @@
* Purna Chandra Mandal <purna.mandal@microchip.com>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <malloc.h>
diff --git a/drivers/gpio/qcom_pmic_gpio.c b/drivers/gpio/qcom_pmic_gpio.c
index 14a8210..80fee84 100644
--- a/drivers/gpio/qcom_pmic_gpio.c
+++ b/drivers/gpio/qcom_pmic_gpio.c
@@ -5,7 +5,6 @@
* (C) Copyright 2015 Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
*/
-#include <common.h>
#include <dm.h>
#include <dm/device-internal.h>
#include <dm/lists.h>
@@ -35,6 +34,8 @@
#define REG_SUBTYPE_GPIOC_8CH 0xd
#define REG_SUBTYPE_GPIO_LV 0x10
#define REG_SUBTYPE_GPIO_MV 0x11
+#define REG_SUBTYPE_GPIO_LV_VIN2 0x12
+#define REG_SUBTYPE_GPIO_MV_VIN3 0x13
#define REG_STATUS 0x08
#define REG_STATUS_VAL_MASK 0x1
@@ -322,9 +323,20 @@
return log_msg_ret("bad type", -ENXIO);
val = pmic_reg_read(plat->pmic, plat->pid + REG_SUBTYPE);
- if (val != REG_SUBTYPE_GPIO_4CH && val != REG_SUBTYPE_GPIOC_4CH &&
- val != REG_SUBTYPE_GPIO_LV && val != REG_SUBTYPE_GPIO_MV)
+ switch (val) {
+ case REG_SUBTYPE_GPIO_4CH:
+ case REG_SUBTYPE_GPIOC_4CH:
+ plat->lv_mv_type = false;
+ break;
+ case REG_SUBTYPE_GPIO_LV:
+ case REG_SUBTYPE_GPIO_MV:
+ case REG_SUBTYPE_GPIO_LV_VIN2:
+ case REG_SUBTYPE_GPIO_MV_VIN3:
+ plat->lv_mv_type = true;
+ break;
+ default:
return log_msg_ret("bad subtype", -ENXIO);
+ }
plat->lv_mv_type = val == REG_SUBTYPE_GPIO_LV ||
val == REG_SUBTYPE_GPIO_MV;
@@ -351,6 +363,9 @@
{ .compatible = "qcom,pm8994-gpio" }, /* 22 GPIO's */
{ .compatible = "qcom,pm8998-gpio", .data = QCOM_PMIC_QUIRK_READONLY },
{ .compatible = "qcom,pms405-gpio" },
+ { .compatible = "qcom,pm6125-gpio", .data = QCOM_PMIC_QUIRK_READONLY },
+ { .compatible = "qcom,pm8150-gpio", .data = QCOM_PMIC_QUIRK_READONLY },
+ { .compatible = "qcom,pm8550-gpio", .data = QCOM_PMIC_QUIRK_READONLY },
{ }
};
diff --git a/drivers/gpio/qe_gpio.c b/drivers/gpio/qe_gpio.c
index 16e8d1e..ac6e682 100644
--- a/drivers/gpio/qe_gpio.c
+++ b/drivers/gpio/qe_gpio.c
@@ -4,7 +4,6 @@
* Christophe Leroy <christophe.leroy@csgroup.eu>
*/
-#include <common.h>
#include <dm.h>
#include <mapmem.h>
#include <asm/gpio.h>
diff --git a/drivers/gpio/rk_gpio.c b/drivers/gpio/rk_gpio.c
index 2e901ac..24ba12d 100644
--- a/drivers/gpio/rk_gpio.c
+++ b/drivers/gpio/rk_gpio.c
@@ -6,7 +6,6 @@
* Peter, Software Engineering, <superpeter.cai@gmail.com>.
*/
-#include <common.h>
#include <dm.h>
#include <syscon.h>
#include <linux/errno.h>
diff --git a/drivers/gpio/s5p_gpio.c b/drivers/gpio/s5p_gpio.c
index 06ed585..83e65aa 100644
--- a/drivers/gpio/s5p_gpio.c
+++ b/drivers/gpio/s5p_gpio.c
@@ -4,7 +4,6 @@
* Minkyu Kang <mk7.kang@samsung.com>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <fdtdec.h>
diff --git a/drivers/gpio/sandbox.c b/drivers/gpio/sandbox.c
index 305f9a6..f5be278 100644
--- a/drivers/gpio/sandbox.c
+++ b/drivers/gpio/sandbox.c
@@ -3,7 +3,6 @@
* Copyright (c) 2011 The Chromium OS Authors.
*/
-#include <common.h>
#include <dm.h>
#include <fdtdec.h>
#include <log.h>
diff --git a/drivers/gpio/sandbox_test.c b/drivers/gpio/sandbox_test.c
index c76e199..4699a97 100644
--- a/drivers/gpio/sandbox_test.c
+++ b/drivers/gpio/sandbox_test.c
@@ -5,7 +5,6 @@
* Copyright 2021 Google LLC
*/
-#include <common.h>
#include <dm.h>
#include <asm-generic/gpio.h>
diff --git a/drivers/gpio/sh_pfc.c b/drivers/gpio/sh_pfc.c
index 2495d6c..9f6051c 100644
--- a/drivers/gpio/sh_pfc.c
+++ b/drivers/gpio/sh_pfc.c
@@ -9,7 +9,6 @@
* for more details.
*/
-#include <common.h>
#include <log.h>
#include <malloc.h>
#include <asm/bitops.h>
diff --git a/drivers/gpio/sifive-gpio.c b/drivers/gpio/sifive-gpio.c
index 151f484..90f5912 100644
--- a/drivers/gpio/sifive-gpio.c
+++ b/drivers/gpio/sifive-gpio.c
@@ -5,7 +5,6 @@
* Copyright (C) 2019 SiFive, Inc.
*/
-#include <common.h>
#include <dm.h>
#include <asm/arch/gpio.h>
#include <asm/io.h>
diff --git a/drivers/gpio/sl28cpld-gpio.c b/drivers/gpio/sl28cpld-gpio.c
index 700fc3d..e85f926 100644
--- a/drivers/gpio/sl28cpld-gpio.c
+++ b/drivers/gpio/sl28cpld-gpio.c
@@ -5,7 +5,6 @@
* Copyright (c) 2021 Michael Walle <michael@walle.cc>
*/
-#include <common.h>
#include <dm.h>
#include <asm/gpio.h>
#include <sl28cpld.h>
diff --git a/drivers/gpio/stm32_gpio.c b/drivers/gpio/stm32_gpio.c
index 7a2ca91..b8eb554 100644
--- a/drivers/gpio/stm32_gpio.c
+++ b/drivers/gpio/stm32_gpio.c
@@ -6,7 +6,6 @@
#define LOG_CATEGORY UCLASS_GPIO
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <fdtdec.h>
diff --git a/drivers/gpio/sunxi_gpio.c b/drivers/gpio/sunxi_gpio.c
index e4463a2..5e86474 100644
--- a/drivers/gpio/sunxi_gpio.c
+++ b/drivers/gpio/sunxi_gpio.c
@@ -9,7 +9,6 @@
* Tom Cubie <tangliang@allwinnertech.com>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <fdtdec.h>
diff --git a/drivers/gpio/tca642x.c b/drivers/gpio/tca642x.c
index b07496e..1d45b50 100644
--- a/drivers/gpio/tca642x.c
+++ b/drivers/gpio/tca642x.c
@@ -20,7 +20,7 @@
* MA 02111-1307 USA
*/
-#include <common.h>
+#include <config.h>
#include <command.h>
#include <i2c.h>
#include <tca642x.h>
diff --git a/drivers/gpio/tegra186_gpio.c b/drivers/gpio/tegra186_gpio.c
index 94a20d1..01b8245 100644
--- a/drivers/gpio/tegra186_gpio.c
+++ b/drivers/gpio/tegra186_gpio.c
@@ -4,7 +4,6 @@
* (based on tegra_gpio.c)
*/
-#include <common.h>
#include <dm.h>
#include <malloc.h>
#include <errno.h>
diff --git a/drivers/gpio/tegra_gpio.c b/drivers/gpio/tegra_gpio.c
index 55105f2..0c40d36 100644
--- a/drivers/gpio/tegra_gpio.c
+++ b/drivers/gpio/tegra_gpio.c
@@ -10,7 +10,6 @@
* Tom Warren (twarren@nvidia.com)
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <malloc.h>
diff --git a/drivers/gpio/turris_omnia_mcu.c b/drivers/gpio/turris_omnia_mcu.c
deleted file mode 100644
index 2d2bf2d..0000000
--- a/drivers/gpio/turris_omnia_mcu.c
+++ /dev/null
@@ -1,316 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-// (C) 2022 Pali Rohár <pali@kernel.org>
-
-#include <common.h>
-#include <dm.h>
-#include <i2c.h>
-#include <asm/gpio.h>
-#include <linux/log2.h>
-
-enum commands_e {
- CMD_GET_STATUS_WORD = 0x01,
- CMD_GENERAL_CONTROL = 0x02,
-
- /* available if STS_FEATURES_SUPPORTED bit set in status word */
- CMD_GET_FEATURES = 0x10,
-
- /* available if FEAT_EXT_CMDS bit is set in features */
- CMD_GET_EXT_STATUS_DWORD = 0x11,
-
- /* available if FEAT_EXT_CMDS and FEAT_PERIPH_MCU bits are set in featurs */
- CMD_EXT_CONTROL = 0x12,
- CMD_GET_EXT_CONTROL_STATUS = 0x13,
-};
-
-/* CMD_GET_STATUS_WORD */
-enum sts_word_e {
- STS_MCU_TYPE_MASK = GENMASK(1, 0),
- STS_MCU_TYPE_STM32 = 0,
- STS_MCU_TYPE_GD32 = 1,
- STS_MCU_TYPE_MKL = 2,
- STS_FEATURES_SUPPORTED = BIT(2),
- STS_USER_REGULATOR_NOT_SUPPORTED = BIT(3),
- STS_CARD_DET = BIT(4),
- STS_MSATA_IND = BIT(5),
- STS_USB30_OVC = BIT(6),
- STS_USB31_OVC = BIT(7),
- STS_USB30_PWRON = BIT(8),
- STS_USB31_PWRON = BIT(9),
- STS_ENABLE_4V5 = BIT(10),
- STS_BUTTON_MODE = BIT(11),
- STS_BUTTON_PRESSED = BIT(12),
- STS_BUTTON_COUNTER_MASK = GENMASK(15, 13)
-};
-
-/* CMD_GENERAL_CONTROL */
-enum ctl_byte_e {
- CTL_LIGHT_RST = BIT(0),
- CTL_HARD_RST = BIT(1),
- /*CTL_RESERVED = BIT(2),*/
- CTL_USB30_PWRON = BIT(3),
- CTL_USB31_PWRON = BIT(4),
- CTL_ENABLE_4V5 = BIT(5),
- CTL_BUTTON_MODE = BIT(6),
- CTL_BOOTLOADER = BIT(7)
-};
-
-/* CMD_GET_FEATURES */
-enum features_e {
- FEAT_PERIPH_MCU = BIT(0),
- FEAT_EXT_CMDS = BIT(1),
-};
-
-struct turris_omnia_mcu_info {
- u16 features;
-};
-
-static int turris_omnia_mcu_get_function(struct udevice *dev, uint offset)
-{
- struct turris_omnia_mcu_info *info = dev_get_plat(dev);
-
- switch (offset) {
- /* bank 0 */
- case 0 ... 15:
- switch (offset) {
- case ilog2(STS_USB30_PWRON):
- case ilog2(STS_USB31_PWRON):
- case ilog2(STS_ENABLE_4V5):
- case ilog2(STS_BUTTON_MODE):
- return GPIOF_OUTPUT;
- default:
- return GPIOF_INPUT;
- }
-
- /* bank 1 - supported only when FEAT_EXT_CMDS is set */
- case (16 + 0) ... (16 + 31):
- if (!(info->features & FEAT_EXT_CMDS))
- return -EINVAL;
- return GPIOF_INPUT;
-
- /* bank 2 - supported only when FEAT_EXT_CMDS and FEAT_PERIPH_MCU is set */
- case (16 + 32 + 0) ... (16 + 32 + 15):
- if (!(info->features & FEAT_EXT_CMDS))
- return -EINVAL;
- if (!(info->features & FEAT_PERIPH_MCU))
- return -EINVAL;
- return GPIOF_OUTPUT;
-
- default:
- return -EINVAL;
- }
-}
-
-static int turris_omnia_mcu_get_value(struct udevice *dev, uint offset)
-{
- struct turris_omnia_mcu_info *info = dev_get_plat(dev);
- u8 val16[2];
- u8 val32[4];
- int ret;
-
- switch (offset) {
- /* bank 0 */
- case 0 ... 15:
- ret = dm_i2c_read(dev, CMD_GET_STATUS_WORD, val16, 2);
- if (ret)
- return ret;
- return ((((u16)val16[1] << 8) | val16[0]) >> offset) & 0x1;
-
- /* bank 1 - supported only when FEAT_EXT_CMDS is set */
- case (16 + 0) ... (16 + 31):
- if (!(info->features & FEAT_EXT_CMDS))
- return -EINVAL;
- ret = dm_i2c_read(dev, CMD_GET_EXT_STATUS_DWORD, val32, 4);
- if (ret)
- return ret;
- return ((((u32)val32[3] << 24) | ((u32)val32[2] << 16) |
- ((u32)val32[1] << 8) | val32[0]) >> (offset - 16)) & 0x1;
-
- /* bank 2 - supported only when FEAT_EXT_CMDS and FEAT_PERIPH_MCU is set */
- case (16 + 32 + 0) ... (16 + 32 + 15):
- if (!(info->features & FEAT_EXT_CMDS))
- return -EINVAL;
- if (!(info->features & FEAT_PERIPH_MCU))
- return -EINVAL;
- ret = dm_i2c_read(dev, CMD_GET_EXT_CONTROL_STATUS, val16, 2);
- if (ret)
- return ret;
- return ((((u16)val16[1] << 8) | val16[0]) >> (offset - 16 - 32)) & 0x1;
-
- default:
- return -EINVAL;
- }
-}
-
-static int turris_omnia_mcu_set_value(struct udevice *dev, uint offset, int value)
-{
- struct turris_omnia_mcu_info *info = dev_get_plat(dev);
- u8 val16[2];
- u8 val32[4];
-
- switch (offset) {
- /* bank 0 */
- case 0 ... 15:
- switch (offset) {
- case ilog2(STS_USB30_PWRON):
- val16[1] = CTL_USB30_PWRON;
- break;
- case ilog2(STS_USB31_PWRON):
- val16[1] = CTL_USB31_PWRON;
- break;
- case ilog2(STS_ENABLE_4V5):
- val16[1] = CTL_ENABLE_4V5;
- break;
- case ilog2(STS_BUTTON_MODE):
- val16[1] = CTL_BUTTON_MODE;
- break;
- default:
- return -EINVAL;
- }
- val16[0] = value ? val16[1] : 0;
- return dm_i2c_write(dev, CMD_GENERAL_CONTROL, val16, sizeof(val16));
-
- /* bank 2 - supported only when FEAT_EXT_CMDS and FEAT_PERIPH_MCU is set */
- case (16 + 32 + 0) ... (16 + 32 + 15):
- if (!(info->features & FEAT_EXT_CMDS))
- return -EINVAL;
- if (!(info->features & FEAT_PERIPH_MCU))
- return -EINVAL;
- val32[3] = BIT(offset - 16 - 32) >> 8;
- val32[2] = BIT(offset - 16 - 32) & 0xff;
- val32[1] = value ? val32[3] : 0;
- val32[0] = value ? val32[2] : 0;
- return dm_i2c_write(dev, CMD_EXT_CONTROL, val32, sizeof(val32));
-
- default:
- return -EINVAL;
- }
-}
-
-static int turris_omnia_mcu_direction_input(struct udevice *dev, uint offset)
-{
- int ret;
-
- ret = turris_omnia_mcu_get_function(dev, offset);
- if (ret < 0)
- return ret;
- else if (ret != GPIOF_INPUT)
- return -EOPNOTSUPP;
-
- return 0;
-}
-
-static int turris_omnia_mcu_direction_output(struct udevice *dev, uint offset, int value)
-{
- int ret;
-
- ret = turris_omnia_mcu_get_function(dev, offset);
- if (ret < 0)
- return ret;
- else if (ret != GPIOF_OUTPUT)
- return -EOPNOTSUPP;
-
- return turris_omnia_mcu_set_value(dev, offset, value);
-}
-
-static int turris_omnia_mcu_xlate(struct udevice *dev, struct gpio_desc *desc,
- struct ofnode_phandle_args *args)
-{
- uint bank, gpio, flags, offset;
- int ret;
-
- if (args->args_count != 3)
- return -EINVAL;
-
- bank = args->args[0];
- gpio = args->args[1];
- flags = args->args[2];
-
- switch (bank) {
- case 0:
- if (gpio >= 16)
- return -EINVAL;
- offset = gpio;
- break;
- case 1:
- if (gpio >= 32)
- return -EINVAL;
- offset = 16 + gpio;
- break;
- case 2:
- if (gpio >= 16)
- return -EINVAL;
- offset = 16 + 32 + gpio;
- break;
- default:
- return -EINVAL;
- }
-
- ret = turris_omnia_mcu_get_function(dev, offset);
- if (ret < 0)
- return ret;
-
- desc->offset = offset;
- desc->flags = gpio_flags_xlate(flags);
-
- return 0;
-}
-
-static const struct dm_gpio_ops turris_omnia_mcu_ops = {
- .direction_input = turris_omnia_mcu_direction_input,
- .direction_output = turris_omnia_mcu_direction_output,
- .get_value = turris_omnia_mcu_get_value,
- .set_value = turris_omnia_mcu_set_value,
- .get_function = turris_omnia_mcu_get_function,
- .xlate = turris_omnia_mcu_xlate,
-};
-
-static int turris_omnia_mcu_probe(struct udevice *dev)
-{
- struct turris_omnia_mcu_info *info = dev_get_plat(dev);
- struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
- u16 status;
- u8 val[2];
- int ret;
-
- ret = dm_i2c_read(dev, CMD_GET_STATUS_WORD, val, 2);
- if (ret) {
- printf("Error: turris_omnia_mcu CMD_GET_STATUS_WORD failed: %d\n", ret);
- return ret;
- }
-
- status = ((u16)val[1] << 8) | val[0];
-
- if (status & STS_FEATURES_SUPPORTED) {
- ret = dm_i2c_read(dev, CMD_GET_FEATURES, val, 2);
- if (ret) {
- printf("Error: turris_omnia_mcu CMD_GET_FEATURES failed: %d\n", ret);
- return ret;
- }
- info->features = ((u16)val[1] << 8) | val[0];
- }
-
- uc_priv->bank_name = "mcu_";
-
- if ((info->features & FEAT_EXT_CMDS) && (info->features & FEAT_PERIPH_MCU))
- uc_priv->gpio_count = 16 + 32 + 16;
- else if (info->features & FEAT_EXT_CMDS)
- uc_priv->gpio_count = 16 + 32;
- else
- uc_priv->gpio_count = 16;
-
- return 0;
-}
-
-static const struct udevice_id turris_omnia_mcu_ids[] = {
- { .compatible = "cznic,turris-omnia-mcu" },
- { }
-};
-
-U_BOOT_DRIVER(turris_omnia_mcu) = {
- .name = "turris-omnia-mcu",
- .id = UCLASS_GPIO,
- .ops = &turris_omnia_mcu_ops,
- .probe = turris_omnia_mcu_probe,
- .plat_auto = sizeof(struct turris_omnia_mcu_info),
- .of_match = turris_omnia_mcu_ids,
-};
diff --git a/drivers/gpio/vybrid_gpio.c b/drivers/gpio/vybrid_gpio.c
index 339392d..5b4bba9 100644
--- a/drivers/gpio/vybrid_gpio.c
+++ b/drivers/gpio/vybrid_gpio.c
@@ -4,7 +4,6 @@
* Bhuvanchandra DV, Toradex, Inc.
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <fdtdec.h>
diff --git a/drivers/gpio/xilinx_gpio.c b/drivers/gpio/xilinx_gpio.c
index fa8d630..c0a9237 100644
--- a/drivers/gpio/xilinx_gpio.c
+++ b/drivers/gpio/xilinx_gpio.c
@@ -3,7 +3,6 @@
* Copyright (c) 2013 - 2018 Xilinx, Michal Simek
*/
-#include <common.h>
#include <errno.h>
#include <log.h>
#include <malloc.h>
diff --git a/drivers/gpio/zynq_gpio.c b/drivers/gpio/zynq_gpio.c
index 71a5612..7db58c7 100644
--- a/drivers/gpio/zynq_gpio.c
+++ b/drivers/gpio/zynq_gpio.c
@@ -8,7 +8,6 @@
* Copyright (C) 2009 - 2014 Xilinx, Inc.
*/
-#include <common.h>
#include <asm/gpio.h>
#include <asm/io.h>
#include <linux/bitops.h>
diff --git a/drivers/gpio/zynqmp_gpio_modepin.c b/drivers/gpio/zynqmp_gpio_modepin.c
index e9565ff..8aaffaf 100644
--- a/drivers/gpio/zynqmp_gpio_modepin.c
+++ b/drivers/gpio/zynqmp_gpio_modepin.c
@@ -5,7 +5,6 @@
* Copyright (C) 2021 Xilinx, Inc.
*/
-#include <common.h>
#include <errno.h>
#include <asm/io.h>
#include <asm/gpio.h>
diff --git a/drivers/hwspinlock/hwspinlock-uclass.c b/drivers/hwspinlock/hwspinlock-uclass.c
index e9a4d7f..ea93efc 100644
--- a/drivers/hwspinlock/hwspinlock-uclass.c
+++ b/drivers/hwspinlock/hwspinlock-uclass.c
@@ -5,7 +5,6 @@
#define LOG_CATEGORY UCLASS_HWSPINLOCK
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <hwspinlock.h>
diff --git a/drivers/hwspinlock/sandbox_hwspinlock.c b/drivers/hwspinlock/sandbox_hwspinlock.c
index be920f5..fcda555 100644
--- a/drivers/hwspinlock/sandbox_hwspinlock.c
+++ b/drivers/hwspinlock/sandbox_hwspinlock.c
@@ -3,7 +3,6 @@
* Copyright (C) 2018, STMicroelectronics - All Rights Reserved
*/
-#include <common.h>
#include <dm.h>
#include <hwspinlock.h>
#include <asm/state.h>
diff --git a/drivers/hwspinlock/stm32_hwspinlock.c b/drivers/hwspinlock/stm32_hwspinlock.c
index 346b138..5273b9b 100644
--- a/drivers/hwspinlock/stm32_hwspinlock.c
+++ b/drivers/hwspinlock/stm32_hwspinlock.c
@@ -5,7 +5,6 @@
#define LOG_CATEGORY UCLASS_HWSPINLOCK
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <hwspinlock.h>
diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig
index 59c635a..34b0211 100644
--- a/drivers/i2c/Kconfig
+++ b/drivers/i2c/Kconfig
@@ -638,6 +638,16 @@
Technical Reference Manual, chapter "6.1 Qualcomm Universal
Peripherals Engine (QUP)".
+config SYS_I2C_GENI
+ bool "Qualcomm Generic Interface (GENI) I2C controller"
+ depends on ARCH_SNAPDRAGON
+ help
+ Support for the Qualcomm Generic Interface (GENI) I2C interface.
+ The Generic Interface (GENI) is a firmware based Qualcomm Universal
+ Peripherals (QUP) Serial Engine (SE) Wrapper which can support multiple
+ bus protocols depending on the firmware type loaded at early boot time
+ based on system configuration.
+
config SYS_I2C_S3C24X0
bool "Samsung I2C driver"
depends on (ARCH_EXYNOS4 || ARCH_EXYNOS5) && DM_I2C
diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile
index 692f63b..00b9052 100644
--- a/drivers/i2c/Makefile
+++ b/drivers/i2c/Makefile
@@ -20,6 +20,7 @@
obj-$(CONFIG_SYS_I2C_DW) += designware_i2c.o
obj-$(CONFIG_SYS_I2C_DW_PCI) += designware_i2c_pci.o
obj-$(CONFIG_SYS_I2C_FSL) += fsl_i2c.o
+obj-$(CONFIG_SYS_I2C_GENI) += geni_i2c.o
obj-$(CONFIG_SYS_I2C_IHS) += ihs_i2c.o
obj-$(CONFIG_SYS_I2C_INTEL) += intel_i2c.o
obj-$(CONFIG_SYS_I2C_IMX_LPI2C) += imx_lpi2c.o
diff --git a/drivers/i2c/acpi_i2c.c b/drivers/i2c/acpi_i2c.c
index 142f411..82cb5db 100644
--- a/drivers/i2c/acpi_i2c.c
+++ b/drivers/i2c/acpi_i2c.c
@@ -3,7 +3,6 @@
* Copyright 2019 Google LLC
*/
-#include <common.h>
#include <dm.h>
#include <i2c.h>
#include <log.h>
diff --git a/drivers/i2c/ast2600_i2c.c b/drivers/i2c/ast2600_i2c.c
index e566b01..9d1d706 100644
--- a/drivers/i2c/ast2600_i2c.c
+++ b/drivers/i2c/ast2600_i2c.c
@@ -2,7 +2,6 @@
/*
* Copyright ASPEED Technology Inc.
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <errno.h>
diff --git a/drivers/i2c/ast_i2c.c b/drivers/i2c/ast_i2c.c
index 1c1d556..02ee406 100644
--- a/drivers/i2c/ast_i2c.c
+++ b/drivers/i2c/ast_i2c.c
@@ -5,7 +5,6 @@
* Copyright 2017 Google, Inc.
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <errno.h>
diff --git a/drivers/i2c/at91_i2c.c b/drivers/i2c/at91_i2c.c
index b7a2588..cfae36c 100644
--- a/drivers/i2c/at91_i2c.c
+++ b/drivers/i2c/at91_i2c.c
@@ -8,7 +8,6 @@
#include <malloc.h>
#include <asm/global_data.h>
#include <asm/io.h>
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <errno.h>
diff --git a/drivers/i2c/cros_ec_ldo.c b/drivers/i2c/cros_ec_ldo.c
index c593540..dfe823c 100644
--- a/drivers/i2c/cros_ec_ldo.c
+++ b/drivers/i2c/cros_ec_ldo.c
@@ -4,7 +4,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <dm.h>
#include <cros_ec.h>
#include <errno.h>
diff --git a/drivers/i2c/cros_ec_tunnel.c b/drivers/i2c/cros_ec_tunnel.c
index 75828b6..2d610e0 100644
--- a/drivers/i2c/cros_ec_tunnel.c
+++ b/drivers/i2c/cros_ec_tunnel.c
@@ -4,7 +4,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <dm.h>
#include <cros_ec.h>
#include <errno.h>
diff --git a/drivers/i2c/davinci_i2c.c b/drivers/i2c/davinci_i2c.c
index 25ef937..3913274 100644
--- a/drivers/i2c/davinci_i2c.c
+++ b/drivers/i2c/davinci_i2c.c
@@ -11,7 +11,7 @@
* Please see doc/driver-model/i2c-howto.rst for instructions.
*/
-#include <common.h>
+#include <config.h>
#include <i2c.h>
#include <dm.h>
#include <log.h>
diff --git a/drivers/i2c/designware_i2c.c b/drivers/i2c/designware_i2c.c
index 29cf633..e8c1623 100644
--- a/drivers/i2c/designware_i2c.c
+++ b/drivers/i2c/designware_i2c.c
@@ -4,7 +4,6 @@
* Vipin Kumar, STMicroelectronics, vipin.kumar@st.com.
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <i2c.h>
diff --git a/drivers/i2c/designware_i2c_pci.c b/drivers/i2c/designware_i2c_pci.c
index 28495a3..11c9867 100644
--- a/drivers/i2c/designware_i2c_pci.c
+++ b/drivers/i2c/designware_i2c_pci.c
@@ -5,7 +5,6 @@
* Copyright 2019 Google Inc
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <spl.h>
diff --git a/drivers/i2c/exynos_hs_i2c.c b/drivers/i2c/exynos_hs_i2c.c
index a7349e0..9a364fd 100644
--- a/drivers/i2c/exynos_hs_i2c.c
+++ b/drivers/i2c/exynos_hs_i2c.c
@@ -6,7 +6,6 @@
* David Mueller, ELSOFT AG, d.mueller@elsoft.ch
*/
-#include <common.h>
#include <dm.h>
#include <i2c.h>
#include <log.h>
diff --git a/drivers/i2c/fsl_i2c.c b/drivers/i2c/fsl_i2c.c
index d9d8ee8..bac14fb 100644
--- a/drivers/i2c/fsl_i2c.c
+++ b/drivers/i2c/fsl_i2c.c
@@ -6,7 +6,7 @@
* Changes for multibus/multiadapter I2C support.
*/
-#include <common.h>
+#include <config.h>
#include <command.h>
#include <i2c.h> /* Functional interface */
#include <log.h>
diff --git a/drivers/i2c/geni_i2c.c b/drivers/i2c/geni_i2c.c
new file mode 100644
index 0000000..eabf5c7
--- /dev/null
+++ b/drivers/i2c/geni_i2c.c
@@ -0,0 +1,575 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2024, Linaro Limited
+ * Author: Neil Armstrong <neil.armstrong@linaro.org>
+ *
+ * Based on Linux driver: drivers/i2c/busses/i2c-qcom-geni.c
+ */
+
+#include <log.h>
+#include <dm/device.h>
+#include <dm/read.h>
+#include <dm/device_compat.h>
+#include <linux/delay.h>
+#include <linux/errno.h>
+#include <linux/err.h>
+#include <linux/bitops.h>
+#include <asm/io.h>
+#include <i2c.h>
+#include <fdtdec.h>
+#include <clk.h>
+#include <reset.h>
+#include <time.h>
+#include <soc/qcom/geni-se.h>
+
+#define SE_I2C_TX_TRANS_LEN 0x26c
+#define SE_I2C_RX_TRANS_LEN 0x270
+#define SE_I2C_SCL_COUNTERS 0x278
+
+#define SE_I2C_ERR (M_CMD_OVERRUN_EN | M_ILLEGAL_CMD_EN | M_CMD_FAILURE_EN |\
+ M_GP_IRQ_1_EN | M_GP_IRQ_3_EN | M_GP_IRQ_4_EN)
+#define SE_I2C_ABORT BIT(1)
+
+/* M_CMD OP codes for I2C */
+#define I2C_WRITE 0x1
+#define I2C_READ 0x2
+#define I2C_WRITE_READ 0x3
+#define I2C_ADDR_ONLY 0x4
+#define I2C_BUS_CLEAR 0x6
+#define I2C_STOP_ON_BUS 0x7
+/* M_CMD params for I2C */
+#define PRE_CMD_DELAY BIT(0)
+#define TIMESTAMP_BEFORE BIT(1)
+#define STOP_STRETCH BIT(2)
+#define TIMESTAMP_AFTER BIT(3)
+#define POST_COMMAND_DELAY BIT(4)
+#define IGNORE_ADD_NACK BIT(6)
+#define READ_FINISHED_WITH_ACK BIT(7)
+#define BYPASS_ADDR_PHASE BIT(8)
+#define SLV_ADDR_MSK GENMASK(15, 9)
+#define SLV_ADDR_SHFT 9
+/* I2C SCL COUNTER fields */
+#define HIGH_COUNTER_MSK GENMASK(29, 20)
+#define HIGH_COUNTER_SHFT 20
+#define LOW_COUNTER_MSK GENMASK(19, 10)
+#define LOW_COUNTER_SHFT 10
+#define CYCLE_COUNTER_MSK GENMASK(9, 0)
+
+#define I2C_PACK_TX BIT(0)
+#define I2C_PACK_RX BIT(1)
+
+#define PACKING_BYTES_PW 4
+
+#define GENI_I2C_IS_MASTER_HUB BIT(0)
+
+#define I2C_TIMEOUT_MS 100
+
+struct geni_i2c_clk_fld {
+ u32 clk_freq_out;
+ u8 clk_div;
+ u8 t_high_cnt;
+ u8 t_low_cnt;
+ u8 t_cycle_cnt;
+};
+
+struct geni_i2c_priv {
+ fdt_addr_t wrapper;
+ phys_addr_t base;
+ struct clk core;
+ struct clk se;
+ u32 tx_wm;
+ bool is_master_hub;
+ const struct geni_i2c_clk_fld *clk_fld;
+};
+
+/*
+ * Hardware uses the underlying formula to calculate time periods of
+ * SCL clock cycle. Firmware uses some additional cycles excluded from the
+ * below formula and it is confirmed that the time periods are within
+ * specification limits.
+ *
+ * time of high period of SCL: t_high = (t_high_cnt * clk_div) / source_clock
+ * time of low period of SCL: t_low = (t_low_cnt * clk_div) / source_clock
+ * time of full period of SCL: t_cycle = (t_cycle_cnt * clk_div) / source_clock
+ * clk_freq_out = t / t_cycle
+ * source_clock = 19.2 MHz
+ */
+static const struct geni_i2c_clk_fld geni_i2c_clk_map[] = {
+ {I2C_SPEED_STANDARD_RATE, 7, 10, 11, 26},
+ {I2C_SPEED_FAST_RATE, 2, 5, 12, 24},
+ {I2C_SPEED_FAST_PLUS_RATE, 1, 3, 9, 18},
+};
+
+static int geni_i2c_clk_map_idx(struct geni_i2c_priv *geni, unsigned int clk_freq)
+{
+ const struct geni_i2c_clk_fld *itr = geni_i2c_clk_map;
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(geni_i2c_clk_map); i++, itr++) {
+ if (itr->clk_freq_out == clk_freq) {
+ geni->clk_fld = itr;
+ return 0;
+ }
+ }
+
+ return -EINVAL;
+}
+
+static void geni_i2c_setup_m_cmd(struct geni_i2c_priv *geni, u32 cmd, u32 params)
+{
+ u32 m_cmd;
+
+ m_cmd = (cmd << M_OPCODE_SHFT) | (params & M_PARAMS_MSK);
+ writel(m_cmd, geni->base + SE_GENI_M_CMD0);
+}
+
+static void qcom_geni_i2c_conf(struct geni_i2c_priv *geni)
+{
+ const struct geni_i2c_clk_fld *itr = geni->clk_fld;
+ u32 val;
+
+ writel(0, geni->base + SE_GENI_CLK_SEL);
+
+ val = (itr->clk_div << CLK_DIV_SHFT) | SER_CLK_EN;
+ writel(val, geni->base + GENI_SER_M_CLK_CFG);
+
+ val = itr->t_high_cnt << HIGH_COUNTER_SHFT;
+ val |= itr->t_low_cnt << LOW_COUNTER_SHFT;
+ val |= itr->t_cycle_cnt;
+ writel(val, geni->base + SE_I2C_SCL_COUNTERS);
+
+ writel(0xffffffff, geni->base + SE_GENI_M_IRQ_CLEAR);
+}
+
+static int geni_i2c_fifo_tx_fill(struct geni_i2c_priv *geni, struct i2c_msg *msg)
+{
+ ulong start = get_timer(0);
+ ulong cur_xfer = 0;
+ int i;
+
+ while (get_timer(start) < I2C_TIMEOUT_MS) {
+ u32 status = readl(geni->base + SE_GENI_M_IRQ_STATUS);
+
+ if (status & (M_CMD_ABORT_EN |
+ M_CMD_OVERRUN_EN |
+ M_ILLEGAL_CMD_EN |
+ M_CMD_FAILURE_EN |
+ M_GP_IRQ_1_EN |
+ M_GP_IRQ_3_EN |
+ M_GP_IRQ_4_EN)) {
+ writel(status, geni->base + SE_GENI_M_IRQ_CLEAR);
+ writel(0, geni->base + SE_GENI_TX_WATERMARK_REG);
+ return -EREMOTEIO;
+ }
+
+ if ((status & M_TX_FIFO_WATERMARK_EN) == 0) {
+ udelay(1);
+ goto skip_fill;
+ }
+
+ for (i = 0; i < geni->tx_wm; i++) {
+ u32 temp, tx = 0;
+ unsigned int p = 0;
+
+ while (cur_xfer < msg->len && p < sizeof(tx)) {
+ temp = msg->buf[cur_xfer++];
+ tx |= temp << (p * 8);
+ p++;
+ }
+
+ writel(tx, geni->base + SE_GENI_TX_FIFOn);
+
+ if (cur_xfer == msg->len) {
+ writel(0, geni->base + SE_GENI_TX_WATERMARK_REG);
+ break;
+ }
+ }
+
+skip_fill:
+ writel(status, geni->base + SE_GENI_M_IRQ_CLEAR);
+
+ if (status & M_CMD_DONE_EN)
+ return 0;
+ }
+
+ return -ETIMEDOUT;
+}
+
+static int geni_i2c_fifo_rx_drain(struct geni_i2c_priv *geni, struct i2c_msg *msg)
+{
+ ulong start = get_timer(0);
+ ulong cur_xfer = 0;
+ int i;
+
+ while (get_timer(start) < I2C_TIMEOUT_MS) {
+ u32 status = readl(geni->base + SE_GENI_M_IRQ_STATUS);
+ u32 rxstatus = readl(geni->base + SE_GENI_RX_FIFO_STATUS);
+ u32 rxcnt = rxstatus & RX_FIFO_WC_MSK;
+
+ if (status & (M_CMD_ABORT_EN |
+ M_CMD_FAILURE_EN |
+ M_CMD_OVERRUN_EN |
+ M_ILLEGAL_CMD_EN |
+ M_GP_IRQ_1_EN |
+ M_GP_IRQ_3_EN |
+ M_GP_IRQ_4_EN)) {
+ writel(status, geni->base + SE_GENI_M_IRQ_CLEAR);
+ return -EREMOTEIO;
+ }
+
+ if ((status & (M_RX_FIFO_WATERMARK_EN | M_RX_FIFO_LAST_EN)) == 0) {
+ udelay(1);
+ goto skip_drain;
+ }
+
+ for (i = 0; cur_xfer < msg->len && i < rxcnt; i++) {
+ u32 rx = readl(geni->base + SE_GENI_RX_FIFOn);
+ unsigned int p = 0;
+
+ while (cur_xfer < msg->len && p < sizeof(rx)) {
+ msg->buf[cur_xfer++] = rx & 0xff;
+ rx >>= 8;
+ p++;
+ }
+ }
+
+skip_drain:
+ writel(status, geni->base + SE_GENI_M_IRQ_CLEAR);
+
+ if (status & M_CMD_DONE_EN)
+ return 0;
+ }
+
+ return -ETIMEDOUT;
+}
+
+static int geni_i2c_xfer_tx(struct geni_i2c_priv *geni, struct i2c_msg *msg, u32 params)
+{
+ writel(msg->len, geni->base + SE_I2C_TX_TRANS_LEN);
+ geni_i2c_setup_m_cmd(geni, I2C_WRITE, params);
+ writel(1, geni->base + SE_GENI_TX_WATERMARK_REG);
+
+ return geni_i2c_fifo_tx_fill(geni, msg);
+}
+
+static int geni_i2c_xfer_rx(struct geni_i2c_priv *geni, struct i2c_msg *msg, u32 params)
+{
+ writel(msg->len, geni->base + SE_I2C_RX_TRANS_LEN);
+ geni_i2c_setup_m_cmd(geni, I2C_READ, params);
+
+ return geni_i2c_fifo_rx_drain(geni, msg);
+}
+
+static int geni_i2c_xfer(struct udevice *bus, struct i2c_msg msgs[], int num)
+{
+ struct geni_i2c_priv *geni = dev_get_priv(bus);
+ int i, ret = 0;
+
+ qcom_geni_i2c_conf(geni);
+
+ for (i = 0; i < num; i++) {
+ struct i2c_msg *msg = &msgs[i];
+ u32 m_param = i < (num - 1) ? STOP_STRETCH : 0;
+
+ m_param |= ((msg->addr << SLV_ADDR_SHFT) & SLV_ADDR_MSK);
+
+ if (msg->flags & I2C_M_RD)
+ ret = geni_i2c_xfer_rx(geni, msg, m_param);
+ else
+ ret = geni_i2c_xfer_tx(geni, msg, m_param);
+
+ if (ret)
+ break;
+ }
+
+ if (ret) {
+ if (ret == -ETIMEDOUT) {
+ u32 status;
+
+ writel(M_GENI_CMD_ABORT, geni->base + SE_GENI_M_CMD_CTRL_REG);
+
+ /* Wait until Abort has finished */
+ do {
+ status = readl(geni->base + SE_GENI_M_IRQ_STATUS);
+ } while ((status & M_CMD_ABORT_EN) == 0);
+
+ writel(status, geni->base + SE_GENI_M_IRQ_STATUS);
+ }
+
+ return ret;
+ }
+
+ return 0;
+}
+
+static int geni_i2c_enable_clocks(struct udevice *dev, struct geni_i2c_priv *geni)
+{
+ int ret;
+
+ if (geni->is_master_hub) {
+ ret = clk_enable(&geni->core);
+ if (ret) {
+ dev_err(dev, "clk_enable core failed %d\n", ret);
+ return ret;
+ }
+ }
+
+ ret = clk_enable(&geni->se);
+ if (ret) {
+ dev_err(dev, "clk_enable se failed %d\n", ret);
+ return ret;
+ }
+
+ return 0;
+}
+
+static int geni_i2c_disable_clocks(struct udevice *dev, struct geni_i2c_priv *geni)
+{
+ int ret;
+
+ if (geni->is_master_hub) {
+ ret = clk_disable(&geni->core);
+ if (ret) {
+ dev_err(dev, "clk_enable core failed %d\n", ret);
+ return ret;
+ }
+ }
+
+ ret = clk_disable(&geni->se);
+ if (ret) {
+ dev_err(dev, "clk_enable se failed %d\n", ret);
+ return ret;
+ }
+
+ return 0;
+}
+
+#define NUM_PACKING_VECTORS 4
+#define PACKING_START_SHIFT 5
+#define PACKING_DIR_SHIFT 4
+#define PACKING_LEN_SHIFT 1
+#define PACKING_STOP_BIT BIT(0)
+#define PACKING_VECTOR_SHIFT 10
+static void geni_i2c_config_packing(struct geni_i2c_priv *geni, int bpw,
+ int pack_words, bool msb_to_lsb,
+ bool tx_cfg, bool rx_cfg)
+{
+ u32 cfg0, cfg1, cfg[NUM_PACKING_VECTORS] = {0};
+ int len;
+ int temp_bpw = bpw;
+ int idx_start = msb_to_lsb ? bpw - 1 : 0;
+ int idx = idx_start;
+ int idx_delta = msb_to_lsb ? -BITS_PER_BYTE : BITS_PER_BYTE;
+ int ceil_bpw = ALIGN(bpw, BITS_PER_BYTE);
+ int iter = (ceil_bpw * pack_words) / BITS_PER_BYTE;
+ int i;
+
+ if (iter <= 0 || iter > NUM_PACKING_VECTORS)
+ return;
+
+ for (i = 0; i < iter; i++) {
+ len = min_t(int, temp_bpw, BITS_PER_BYTE) - 1;
+ cfg[i] = idx << PACKING_START_SHIFT;
+ cfg[i] |= msb_to_lsb << PACKING_DIR_SHIFT;
+ cfg[i] |= len << PACKING_LEN_SHIFT;
+
+ if (temp_bpw <= BITS_PER_BYTE) {
+ idx = ((i + 1) * BITS_PER_BYTE) + idx_start;
+ temp_bpw = bpw;
+ } else {
+ idx = idx + idx_delta;
+ temp_bpw = temp_bpw - BITS_PER_BYTE;
+ }
+ }
+ cfg[iter - 1] |= PACKING_STOP_BIT;
+ cfg0 = cfg[0] | (cfg[1] << PACKING_VECTOR_SHIFT);
+ cfg1 = cfg[2] | (cfg[3] << PACKING_VECTOR_SHIFT);
+
+ if (tx_cfg) {
+ writel(cfg0, geni->base + SE_GENI_TX_PACKING_CFG0);
+ writel(cfg1, geni->base + SE_GENI_TX_PACKING_CFG1);
+ }
+ if (rx_cfg) {
+ writel(cfg0, geni->base + SE_GENI_RX_PACKING_CFG0);
+ writel(cfg1, geni->base + SE_GENI_RX_PACKING_CFG1);
+ }
+
+ /*
+ * Number of protocol words in each FIFO entry
+ * 0 - 4x8, four words in each entry, max word size of 8 bits
+ * 1 - 2x16, two words in each entry, max word size of 16 bits
+ * 2 - 1x32, one word in each entry, max word size of 32 bits
+ * 3 - undefined
+ */
+ if (pack_words || bpw == 32)
+ writel(bpw / 16, geni->base + SE_GENI_BYTE_GRAN);
+}
+
+static void geni_i2c_init(struct geni_i2c_priv *geni, unsigned int tx_depth)
+{
+ u32 val;
+
+ writel(0, geni->base + SE_GSI_EVENT_EN);
+ writel(0xffffffff, geni->base + SE_GENI_M_IRQ_CLEAR);
+ writel(0xffffffff, geni->base + SE_GENI_S_IRQ_CLEAR);
+ writel(0xffffffff, geni->base + SE_IRQ_EN);
+
+ val = readl(geni->base + GENI_CGC_CTRL);
+ val |= DEFAULT_CGC_EN;
+ writel(val, geni->base + GENI_CGC_CTRL);
+
+ writel(DEFAULT_IO_OUTPUT_CTRL_MSK, geni->base + GENI_OUTPUT_CTRL);
+ writel(FORCE_DEFAULT, geni->base + GENI_FORCE_DEFAULT_REG);
+
+ val = readl(geni->base + SE_IRQ_EN);
+ val |= GENI_M_IRQ_EN | GENI_S_IRQ_EN;
+ writel(val, geni->base + SE_IRQ_EN);
+
+ val = readl(geni->base + SE_GENI_DMA_MODE_EN);
+ val &= ~GENI_DMA_MODE_EN;
+ writel(val, geni->base + SE_GENI_DMA_MODE_EN);
+
+ writel(0, geni->base + SE_GSI_EVENT_EN);
+
+ writel(tx_depth - 1, geni->base + SE_GENI_RX_WATERMARK_REG);
+ writel(tx_depth, geni->base + SE_GENI_RX_RFR_WATERMARK_REG);
+
+ val = readl(geni->base + SE_GENI_M_IRQ_EN);
+ val |= M_COMMON_GENI_M_IRQ_EN;
+ val |= M_CMD_DONE_EN | M_TX_FIFO_WATERMARK_EN;
+ val |= M_RX_FIFO_WATERMARK_EN | M_RX_FIFO_LAST_EN;
+ writel(val, geni->base + SE_GENI_M_IRQ_EN);
+
+ val = readl(geni->base + SE_GENI_S_IRQ_EN);
+ val |= S_COMMON_GENI_S_IRQ_EN;
+ writel(val, geni->base + SE_GENI_S_IRQ_EN);
+}
+
+static u32 geni_i2c_get_tx_fifo_depth(struct geni_i2c_priv *geni)
+{
+ u32 val, hw_version, hw_major, hw_minor, tx_fifo_depth_mask;
+
+ hw_version = readl(geni->wrapper + QUP_HW_VER_REG);
+ hw_major = GENI_SE_VERSION_MAJOR(hw_version);
+ hw_minor = GENI_SE_VERSION_MINOR(hw_version);
+
+ if ((hw_major == 3 && hw_minor >= 10) || hw_major > 3)
+ tx_fifo_depth_mask = TX_FIFO_DEPTH_MSK_256_BYTES;
+ else
+ tx_fifo_depth_mask = TX_FIFO_DEPTH_MSK;
+
+ val = readl(geni->base + SE_HW_PARAM_0);
+
+ return (val & tx_fifo_depth_mask) >> TX_FIFO_DEPTH_SHFT;
+}
+
+static int geni_i2c_probe(struct udevice *dev)
+{
+ ofnode parent_node = ofnode_get_parent(dev_ofnode(dev));
+ struct geni_i2c_priv *geni = dev_get_priv(dev);
+ u32 proto, tx_depth, fifo_disable;
+ int ret;
+
+ geni->is_master_hub = dev_get_driver_data(dev) & GENI_I2C_IS_MASTER_HUB;
+
+ geni->wrapper = ofnode_get_addr(parent_node);
+ if (geni->wrapper == FDT_ADDR_T_NONE)
+ return -EINVAL;
+
+ geni->base = (phys_addr_t)dev_read_addr_ptr(dev);
+ if (!geni->base)
+ return -EINVAL;
+
+ if (geni->is_master_hub) {
+ ret = clk_get_by_name(dev, "core", &geni->core);
+ if (ret) {
+ dev_err(dev, "clk_get_by_name(core) failed: %d\n", ret);
+ return ret;
+ }
+ }
+
+ ret = clk_get_by_name(dev, "se", &geni->se);
+ if (ret) {
+ dev_err(dev, "clk_get_by_name(se) failed: %d\n", ret);
+ return ret;
+ }
+
+ geni_i2c_enable_clocks(dev, geni);
+
+ proto = readl(geni->base + GENI_FW_REVISION_RO);
+ proto &= FW_REV_PROTOCOL_MSK;
+ proto >>= FW_REV_PROTOCOL_SHFT;
+
+ if (proto != GENI_SE_I2C) {
+ dev_err(dev, "Invalid proto %d\n", proto);
+ geni_i2c_disable_clocks(dev, geni);
+ return -ENXIO;
+ }
+
+ fifo_disable = readl(geni->base + GENI_IF_DISABLE_RO) & FIFO_IF_DISABLE;
+ if (fifo_disable) {
+ geni_i2c_disable_clocks(dev, geni);
+ dev_err(dev, "FIFO mode disabled, DMA mode unsupported\n");
+ return -ENXIO;
+ }
+
+ if (!geni->is_master_hub) {
+ tx_depth = geni_i2c_get_tx_fifo_depth(geni);
+ if (!tx_depth) {
+ geni_i2c_disable_clocks(dev, geni);
+ dev_err(dev, "Invalid TX FIFO depth\n");
+ return -ENXIO;
+ }
+ } else {
+ tx_depth = 16;
+ }
+ geni->tx_wm = tx_depth - 1;
+
+ geni_i2c_init(geni, tx_depth);
+ geni_i2c_config_packing(geni, BITS_PER_BYTE,
+ PACKING_BYTES_PW, true, true, true);
+
+ /* Setup for standard rate */
+ return geni_i2c_clk_map_idx(geni, I2C_SPEED_STANDARD_RATE);
+}
+
+static int geni_i2c_set_bus_speed(struct udevice *dev, unsigned int clk_freq)
+{
+ struct geni_i2c_priv *geni = dev_get_priv(dev);
+
+ return geni_i2c_clk_map_idx(geni, clk_freq);
+}
+
+static const struct dm_i2c_ops geni_i2c_ops = {
+ .xfer = geni_i2c_xfer,
+ .set_bus_speed = geni_i2c_set_bus_speed,
+};
+
+static const struct udevice_id geni_i2c_ids[] = {
+ { .compatible = "qcom,geni-i2c" },
+ { .compatible = "qcom,geni-i2c-master-hub", .data = GENI_I2C_IS_MASTER_HUB},
+ {}
+};
+
+U_BOOT_DRIVER(i2c_geni) = {
+ .name = "i2c_geni",
+ .id = UCLASS_I2C,
+ .of_match = geni_i2c_ids,
+ .probe = geni_i2c_probe,
+ .priv_auto = sizeof(struct geni_i2c_priv),
+ .ops = &geni_i2c_ops,
+};
+
+static const struct udevice_id geni_i2c_master_hub_ids[] = {
+ { .compatible = "qcom,geni-se-i2c-master-hub" },
+ { }
+};
+
+U_BOOT_DRIVER(geni_i2c_master_hub) = {
+ .name = "geni-se-master-hub",
+ .id = UCLASS_NOP,
+ .of_match = geni_i2c_master_hub_ids,
+ .bind = dm_scan_fdt_dev,
+ .flags = DM_FLAG_PRE_RELOC | DM_FLAG_DEFAULT_PD_CTRL_OFF,
+};
diff --git a/drivers/i2c/i2c-cdns.c b/drivers/i2c/i2c-cdns.c
index 935b2ac..3f7cf85 100644
--- a/drivers/i2c/i2c-cdns.c
+++ b/drivers/i2c/i2c-cdns.c
@@ -7,7 +7,6 @@
* with added driver-model support and code cleanup.
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <linux/bitops.h>
diff --git a/drivers/i2c/i2c-cortina.c b/drivers/i2c/i2c-cortina.c
index 960ae8c..96f9571 100644
--- a/drivers/i2c/i2c-cortina.c
+++ b/drivers/i2c/i2c-cortina.c
@@ -4,12 +4,12 @@
* Arthur Li, Cortina Access, arthur.li@cortina-access.com.
*/
-#include <common.h>
#include <i2c.h>
#include <log.h>
#include <asm/io.h>
#include <dm.h>
#include <mapmem.h>
+#include <time.h>
#include "i2c-cortina.h"
static void set_speed(struct i2c_regs *regs, int i2c_spd)
diff --git a/drivers/i2c/i2c-emul-uclass.c b/drivers/i2c/i2c-emul-uclass.c
index d421ddf..0954d53 100644
--- a/drivers/i2c/i2c-emul-uclass.c
+++ b/drivers/i2c/i2c-emul-uclass.c
@@ -5,7 +5,6 @@
#define LOG_CATEGORY UCLASS_I2C_EMUL
-#include <common.h>
#include <dm.h>
#include <i2c.h>
#include <log.h>
diff --git a/drivers/i2c/i2c-gpio.c b/drivers/i2c/i2c-gpio.c
index 5fc3cfe..e0a575f 100644
--- a/drivers/i2c/i2c-gpio.c
+++ b/drivers/i2c/i2c-gpio.c
@@ -5,7 +5,6 @@
* This file is based on: drivers/i2c/soft-i2c.c,
* with added driver-model support and code cleanup.
*/
-#include <common.h>
#include <errno.h>
#include <dm.h>
#include <i2c.h>
diff --git a/drivers/i2c/i2c-microchip.c b/drivers/i2c/i2c-microchip.c
index d453e24..7887478 100644
--- a/drivers/i2c/i2c-microchip.c
+++ b/drivers/i2c/i2c-microchip.c
@@ -6,7 +6,6 @@
* Padmarao Begari <padmarao.begari@microchip.com>
* Conor Dooley <conor.dooley@microchip.com>
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <i2c.h>
diff --git a/drivers/i2c/i2c-uclass.c b/drivers/i2c/i2c-uclass.c
index 98f9585..380a9f8 100644
--- a/drivers/i2c/i2c-uclass.c
+++ b/drivers/i2c/i2c-uclass.c
@@ -5,7 +5,6 @@
#define LOG_CATEGORY UCLASS_I2C
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <i2c.h>
diff --git a/drivers/i2c/i2c-versatile.c b/drivers/i2c/i2c-versatile.c
index 0a1a85d..a8f0a17 100644
--- a/drivers/i2c/i2c-versatile.c
+++ b/drivers/i2c/i2c-versatile.c
@@ -5,7 +5,6 @@
*
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <i2c.h>
diff --git a/drivers/i2c/i2c_core.c b/drivers/i2c/i2c_core.c
index fe0cd75..7c43a55 100644
--- a/drivers/i2c/i2c_core.c
+++ b/drivers/i2c/i2c_core.c
@@ -7,7 +7,7 @@
*
* Multibus/multiadapter I2C core functions (wrappers)
*/
-#include <common.h>
+#include <config.h>
#include <i2c.h>
#include <linker_lists.h>
#include <asm/global_data.h>
diff --git a/drivers/i2c/ihs_i2c.c b/drivers/i2c/ihs_i2c.c
index d715714..dc88cd1 100644
--- a/drivers/i2c/ihs_i2c.c
+++ b/drivers/i2c/ihs_i2c.c
@@ -4,7 +4,6 @@
* Dirk Eibach, Guntermann & Drunck GmbH, dirk.eibach@gdsys.cc
*/
-#include <common.h>
#include <i2c.h>
#include <dm.h>
#include <regmap.h>
diff --git a/drivers/i2c/imx_lpi2c.c b/drivers/i2c/imx_lpi2c.c
index ad9293c..6c0d8eb 100644
--- a/drivers/i2c/imx_lpi2c.c
+++ b/drivers/i2c/imx_lpi2c.c
@@ -3,7 +3,6 @@
* Copyright 2016 Freescale Semiconductors, Inc.
*/
-#include <common.h>
#include <errno.h>
#include <log.h>
#include <asm/io.h>
diff --git a/drivers/i2c/intel_i2c.c b/drivers/i2c/intel_i2c.c
index 4fc6f1a..d8ceea1 100644
--- a/drivers/i2c/intel_i2c.c
+++ b/drivers/i2c/intel_i2c.c
@@ -7,11 +7,11 @@
* Copyright (C) 2016 Stefan Roese <sr@denx.de>
*/
-#include <common.h>
#include <dm.h>
#include <i2c.h>
#include <log.h>
#include <pci.h>
+#include <time.h>
#include <asm/io.h>
/* PCI Configuration Space (D31:F3): SMBus */
diff --git a/drivers/i2c/iproc_i2c.c b/drivers/i2c/iproc_i2c.c
index 39af49c..6570f64 100644
--- a/drivers/i2c/iproc_i2c.c
+++ b/drivers/i2c/iproc_i2c.c
@@ -6,7 +6,6 @@
#include <asm/global_data.h>
#include <asm/io.h>
-#include <common.h>
#include <config.h>
#include <dm.h>
#include <linux/printk.h>
diff --git a/drivers/i2c/lpc32xx_i2c.c b/drivers/i2c/lpc32xx_i2c.c
index 496f4fe..a4e42e6 100644
--- a/drivers/i2c/lpc32xx_i2c.c
+++ b/drivers/i2c/lpc32xx_i2c.c
@@ -6,7 +6,7 @@
* Written-by: Albert ARIBAUD - 3ADEV <albert.aribaud@3adev.fr>
*/
-#include <common.h>
+#include <config.h>
#include <log.h>
#include <asm/io.h>
#include <i2c.h>
diff --git a/drivers/i2c/meson_i2c.c b/drivers/i2c/meson_i2c.c
index 434e346..19f1b6b 100644
--- a/drivers/i2c/meson_i2c.c
+++ b/drivers/i2c/meson_i2c.c
@@ -2,7 +2,6 @@
/*
* (C) Copyright 2017 - Beniamino Galvani <b.galvani@gmail.com>
*/
-#include <common.h>
#include <log.h>
#include <asm/io.h>
#include <clk.h>
diff --git a/drivers/i2c/muxes/i2c-arb-gpio-challenge.c b/drivers/i2c/muxes/i2c-arb-gpio-challenge.c
index ad730e0..a83d7cb 100644
--- a/drivers/i2c/muxes/i2c-arb-gpio-challenge.c
+++ b/drivers/i2c/muxes/i2c-arb-gpio-challenge.c
@@ -4,12 +4,12 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <i2c.h>
#include <log.h>
#include <malloc.h>
+#include <time.h>
#include <asm/global_data.h>
#include <asm/gpio.h>
#include <linux/delay.h>
diff --git a/drivers/i2c/muxes/i2c-mux-gpio.c b/drivers/i2c/muxes/i2c-mux-gpio.c
index 4ca2061..f212bd1 100644
--- a/drivers/i2c/muxes/i2c-mux-gpio.c
+++ b/drivers/i2c/muxes/i2c-mux-gpio.c
@@ -10,7 +10,6 @@
#include <asm/global_data.h>
#include <asm/io.h>
#include <asm-generic/gpio.h>
-#include <common.h>
#include <dm.h>
#include <dm/device_compat.h>
#include <dm/devres.h>
diff --git a/drivers/i2c/muxes/i2c-mux-uclass.c b/drivers/i2c/muxes/i2c-mux-uclass.c
index a5d1bb0..d1999d2 100644
--- a/drivers/i2c/muxes/i2c-mux-uclass.c
+++ b/drivers/i2c/muxes/i2c-mux-uclass.c
@@ -6,7 +6,6 @@
#define LOG_CATEGORY UCLASS_I2C_MUX
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <i2c.h>
diff --git a/drivers/i2c/muxes/pca954x.c b/drivers/i2c/muxes/pca954x.c
index 0034dfb..b4e3e16 100644
--- a/drivers/i2c/muxes/pca954x.c
+++ b/drivers/i2c/muxes/pca954x.c
@@ -5,7 +5,6 @@
* Written by Michal Simek
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <i2c.h>
diff --git a/drivers/i2c/mv_i2c.c b/drivers/i2c/mv_i2c.c
index 5bc9cd7..949cc45 100644
--- a/drivers/i2c/mv_i2c.c
+++ b/drivers/i2c/mv_i2c.c
@@ -16,7 +16,6 @@
* Murray.Jensen@cmst.csiro.au, 27-Jan-01.
*/
-#include <common.h>
#include <dm.h>
#include <i2c.h>
#include <log.h>
diff --git a/drivers/i2c/mvtwsi.c b/drivers/i2c/mvtwsi.c
index c38330f..44e8e19 100644
--- a/drivers/i2c/mvtwsi.c
+++ b/drivers/i2c/mvtwsi.c
@@ -7,7 +7,7 @@
* Copyright (c) 2010 Albert Aribaud.
*/
-#include <common.h>
+#include <config.h>
#include <i2c.h>
#include <log.h>
#include <asm/global_data.h>
diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c
index d501133..0acdaf7 100644
--- a/drivers/i2c/mxc_i2c.c
+++ b/drivers/i2c/mxc_i2c.c
@@ -14,7 +14,7 @@
*
*/
-#include <common.h>
+#include <config.h>
#include <log.h>
#include <asm/arch/clock.h>
#include <asm/arch/imx-regs.h>
diff --git a/drivers/i2c/nx_i2c.c b/drivers/i2c/nx_i2c.c
index 07cda0f..8562dd8 100644
--- a/drivers/i2c/nx_i2c.c
+++ b/drivers/i2c/nx_i2c.c
@@ -1,8 +1,8 @@
-#include <common.h>
#include <errno.h>
#include <dm.h>
#include <i2c.h>
#include <log.h>
+#include <time.h>
#include <asm/arch/nexell.h>
#include <asm/arch/reset.h>
#include <asm/arch/clk.h>
diff --git a/drivers/i2c/ocores_i2c.c b/drivers/i2c/ocores_i2c.c
index fff8511..cf714d2 100644
--- a/drivers/i2c/ocores_i2c.c
+++ b/drivers/i2c/ocores_i2c.c
@@ -12,7 +12,6 @@
* Andreas Larsson <andreas@gaisler.com>
*/
-#include <common.h>
#include <asm/global_data.h>
#include <asm/io.h>
#include <clk.h>
diff --git a/drivers/i2c/omap24xx_i2c.c b/drivers/i2c/omap24xx_i2c.c
index 6fc9d1e..ebe472e 100644
--- a/drivers/i2c/omap24xx_i2c.c
+++ b/drivers/i2c/omap24xx_i2c.c
@@ -38,7 +38,6 @@
*
*/
-#include <common.h>
#include <dm.h>
#include <i2c.h>
#include <log.h>
diff --git a/drivers/i2c/qup_i2c.c b/drivers/i2c/qup_i2c.c
index 5ae3ccc..26707d6 100644
--- a/drivers/i2c/qup_i2c.c
+++ b/drivers/i2c/qup_i2c.c
@@ -9,7 +9,6 @@
#include <init.h>
#include <env.h>
-#include <common.h>
#include <log.h>
#include <dm/device_compat.h>
#include <linux/delay.h>
diff --git a/drivers/i2c/rcar_i2c.c b/drivers/i2c/rcar_i2c.c
index ff9a2d8..f0f9b2a 100644
--- a/drivers/i2c/rcar_i2c.c
+++ b/drivers/i2c/rcar_i2c.c
@@ -11,7 +11,6 @@
* Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <i2c.h>
diff --git a/drivers/i2c/rcar_iic.c b/drivers/i2c/rcar_iic.c
index f0e5091..2aa0f5f 100644
--- a/drivers/i2c/rcar_iic.c
+++ b/drivers/i2c/rcar_iic.c
@@ -9,7 +9,6 @@
* Copyright (C) 2011, 2013 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <i2c.h>
diff --git a/drivers/i2c/rk_i2c.c b/drivers/i2c/rk_i2c.c
index 9927af9..fa16726 100644
--- a/drivers/i2c/rk_i2c.c
+++ b/drivers/i2c/rk_i2c.c
@@ -6,7 +6,6 @@
* Peter, Software Engineering, <superpeter.cai@gmail.com>.
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <errno.h>
diff --git a/drivers/i2c/s3c24x0_i2c.c b/drivers/i2c/s3c24x0_i2c.c
index 505e20b..72d2ab0 100644
--- a/drivers/i2c/s3c24x0_i2c.c
+++ b/drivers/i2c/s3c24x0_i2c.c
@@ -4,10 +4,10 @@
* David Mueller, ELSOFT AG, d.mueller@elsoft.ch
*/
-#include <common.h>
#include <errno.h>
#include <dm.h>
#include <fdtdec.h>
+#include <time.h>
#if defined(CONFIG_ARCH_EXYNOS4) || defined(CONFIG_ARCH_EXYNOS5)
#include <log.h>
#include <asm/arch/clk.h>
diff --git a/drivers/i2c/sandbox_i2c.c b/drivers/i2c/sandbox_i2c.c
index c99e6de..74bb5e9 100644
--- a/drivers/i2c/sandbox_i2c.c
+++ b/drivers/i2c/sandbox_i2c.c
@@ -5,7 +5,6 @@
* Copyright (c) 2014 Google, Inc
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <i2c.h>
diff --git a/drivers/i2c/sh_i2c.c b/drivers/i2c/sh_i2c.c
index 3335d94..ab81610 100644
--- a/drivers/i2c/sh_i2c.c
+++ b/drivers/i2c/sh_i2c.c
@@ -7,7 +7,6 @@
* Please see doc/driver-model/i2c-howto.rst for instructions.
*/
-#include <common.h>
#include <i2c.h>
#include <log.h>
#include <asm/global_data.h>
diff --git a/drivers/i2c/soft_i2c.c b/drivers/i2c/soft_i2c.c
index ed8ba47..1f2afc6 100644
--- a/drivers/i2c/soft_i2c.c
+++ b/drivers/i2c/soft_i2c.c
@@ -15,7 +15,7 @@
* Please see doc/driver-model/i2c-howto.rst for instructions.
*/
-#include <common.h>
+#include <config.h>
#if defined(CONFIG_AT91FAMILY)
#include <asm/io.h>
#include <asm/arch/hardware.h>
diff --git a/drivers/i2c/stm32f7_i2c.c b/drivers/i2c/stm32f7_i2c.c
index f42e08a..3f51b1d 100644
--- a/drivers/i2c/stm32f7_i2c.c
+++ b/drivers/i2c/stm32f7_i2c.c
@@ -5,7 +5,6 @@
#define LOG_CATEGORY UCLASS_I2C
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <i2c.h>
diff --git a/drivers/i2c/sun6i_p2wi.c b/drivers/i2c/sun6i_p2wi.c
index b8e07a5..c927c0e 100644
--- a/drivers/i2c/sun6i_p2wi.c
+++ b/drivers/i2c/sun6i_p2wi.c
@@ -15,7 +15,6 @@
#include <axp_pmic.h>
#include <clk.h>
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <i2c.h>
diff --git a/drivers/i2c/sun8i_rsb.c b/drivers/i2c/sun8i_rsb.c
index f36f2c7..2197f18 100644
--- a/drivers/i2c/sun8i_rsb.c
+++ b/drivers/i2c/sun8i_rsb.c
@@ -10,7 +10,6 @@
#include <axp_pmic.h>
#include <clk.h>
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <i2c.h>
diff --git a/drivers/i2c/tegra186_bpmp_i2c.c b/drivers/i2c/tegra186_bpmp_i2c.c
index 588f6bd..d30eb52 100644
--- a/drivers/i2c/tegra186_bpmp_i2c.c
+++ b/drivers/i2c/tegra186_bpmp_i2c.c
@@ -3,7 +3,6 @@
* Copyright (c) 2016, NVIDIA CORPORATION.
*/
-#include <common.h>
#include <dm.h>
#include <i2c.h>
#include <log.h>
diff --git a/drivers/i2c/tegra_i2c.c b/drivers/i2c/tegra_i2c.c
index 57d77d5..3c324bd 100644
--- a/drivers/i2c/tegra_i2c.c
+++ b/drivers/i2c/tegra_i2c.c
@@ -5,7 +5,6 @@
* NVIDIA Corporation <www.nvidia.com>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <i2c.h>
diff --git a/drivers/i2c/xilinx_xiic.c b/drivers/i2c/xilinx_xiic.c
index 72199a6..056024e 100644
--- a/drivers/i2c/xilinx_xiic.c
+++ b/drivers/i2c/xilinx_xiic.c
@@ -9,7 +9,6 @@
* Copyright (c) 2009-2010 Intel Corporation
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <i2c.h>
diff --git a/drivers/input/apple_spi_kbd.c b/drivers/input/apple_spi_kbd.c
index 7cf12f4..5b30cec 100644
--- a/drivers/input/apple_spi_kbd.c
+++ b/drivers/input/apple_spi_kbd.c
@@ -3,7 +3,6 @@
* Copyright (C) 2021 Mark Kettenis <kettenis@openbsd.org>
*/
-#include <common.h>
#include <dm.h>
#include <keyboard.h>
#include <spi.h>
diff --git a/drivers/input/button_kbd.c b/drivers/input/button_kbd.c
index 74fadfc..0a917ac 100644
--- a/drivers/input/button_kbd.c
+++ b/drivers/input/button_kbd.c
@@ -4,7 +4,6 @@
*/
#include <stdlib.h>
-#include <common.h>
#include <dm.h>
#include <fdtdec.h>
#include <input.h>
@@ -34,7 +33,8 @@
{
struct button_kbd_priv *priv = dev_get_priv(dev);
int i = 0;
- struct udevice *button_gpio_devp;
+ struct udevice *button_gpio_devp, *next_devp;
+ struct uclass *uc;
uclass_foreach_dev_probe(UCLASS_BUTTON, button_gpio_devp) {
struct button_uc_plat *uc_plat = dev_get_uclass_plat(button_gpio_devp);
@@ -46,6 +46,21 @@
i++;
}
+ if (uclass_get(UCLASS_BUTTON, &uc))
+ return -ENOENT;
+
+ /*
+ * Unbind any buttons that failed to probe so we don't iterate over
+ * them when polling.
+ */
+ uclass_foreach_dev_safe(button_gpio_devp, next_devp, uc) {
+ if (!(dev_get_flags(button_gpio_devp) & DM_FLAG_ACTIVATED)) {
+ log_warning("Button %s failed to probe\n",
+ button_gpio_devp->name);
+ device_unbind(button_gpio_devp);
+ }
+ }
+
priv->button_size = i;
priv->old_state = calloc(i, sizeof(int));
diff --git a/drivers/input/cros_ec_keyb.c b/drivers/input/cros_ec_keyb.c
index c485346..0917ee2 100644
--- a/drivers/input/cros_ec_keyb.c
+++ b/drivers/input/cros_ec_keyb.c
@@ -5,7 +5,6 @@
* Copyright (c) 2012 The Chromium OS Authors.
*/
-#include <common.h>
#include <cros_ec.h>
#include <dm.h>
#include <errno.h>
diff --git a/drivers/input/i8042.c b/drivers/input/i8042.c
index e6070ca..9bf2105 100644
--- a/drivers/input/i8042.c
+++ b/drivers/input/i8042.c
@@ -8,7 +8,6 @@
#define LOG_CATEGORY UCLASS_KEYBOARD
-#include <common.h>
#include <dm.h>
#include <env.h>
#include <errno.h>
diff --git a/drivers/input/input.c b/drivers/input/input.c
index 8a6506e..3f146fb 100644
--- a/drivers/input/input.c
+++ b/drivers/input/input.c
@@ -6,13 +6,13 @@
* (C) Copyright 2004 DENX Software Engineering, Wolfgang Denk, wd@denx.de
*/
-#include <common.h>
#include <console.h>
#include <dm.h>
#include <env.h>
#include <errno.h>
#include <log.h>
#include <stdio_dev.h>
+#include <time.h>
#include <input.h>
#ifdef CONFIG_DM_KEYBOARD
#include <keyboard.h>
diff --git a/drivers/input/key_matrix.c b/drivers/input/key_matrix.c
index e2fb2e1..2e63166 100644
--- a/drivers/input/key_matrix.c
+++ b/drivers/input/key_matrix.c
@@ -6,7 +6,6 @@
* (C) Copyright 2004 DENX Software Engineering, Wolfgang Denk, wd@denx.de
*/
-#include <common.h>
#include <dm.h>
#include <key_matrix.h>
#include <log.h>
diff --git a/drivers/input/keyboard-uclass.c b/drivers/input/keyboard-uclass.c
index aefc8e8..df9ee8f 100644
--- a/drivers/input/keyboard-uclass.c
+++ b/drivers/input/keyboard-uclass.c
@@ -5,7 +5,6 @@
#define LOG_CATEGORY UCLASS_KEYBOARD
-#include <common.h>
#include <dm.h>
#include <keyboard.h>
#include <log.h>
diff --git a/drivers/input/tegra-kbc.c b/drivers/input/tegra-kbc.c
index d4741a7..fc13975 100644
--- a/drivers/input/tegra-kbc.c
+++ b/drivers/input/tegra-kbc.c
@@ -4,7 +4,6 @@
* NVIDIA Corporation <www.nvidia.com>
*/
-#include <common.h>
#include <dm.h>
#include <fdtdec.h>
#include <input.h>
@@ -13,6 +12,7 @@
#include <log.h>
#include <stdio_dev.h>
#include <tegra-kbc.h>
+#include <time.h>
#include <asm/io.h>
#include <asm/arch/clock.h>
#include <asm/arch/funcmux.h>
diff --git a/drivers/iommu/apple_dart.c b/drivers/iommu/apple_dart.c
index 6ecd843..9327dea 100644
--- a/drivers/iommu/apple_dart.c
+++ b/drivers/iommu/apple_dart.c
@@ -3,7 +3,6 @@
* Copyright (C) 2021 Mark Kettenis <kettenis@openbsd.org>
*/
-#include <common.h>
#include <cpu_func.h>
#include <dm.h>
#include <iommu.h>
diff --git a/drivers/iommu/iommu-uclass.c b/drivers/iommu/iommu-uclass.c
index dff3239..bb31cd5 100644
--- a/drivers/iommu/iommu-uclass.c
+++ b/drivers/iommu/iommu-uclass.c
@@ -5,7 +5,6 @@
#define LOG_CATEGORY UCLASS_IOMMU
-#include <common.h>
#include <dm.h>
#include <iommu.h>
#include <malloc.h>
diff --git a/drivers/iommu/qcom-hyp-smmu.c b/drivers/iommu/qcom-hyp-smmu.c
index f2b39de..7b646d8 100644
--- a/drivers/iommu/qcom-hyp-smmu.c
+++ b/drivers/iommu/qcom-hyp-smmu.c
@@ -381,6 +381,7 @@
static const struct udevice_id qcom_smmu500_ids[] = {
{ .compatible = "qcom,sdm845-smmu-500" },
+ { .compatible = "qcom,smmu-500", },
{ /* sentinel */ }
};
diff --git a/drivers/iommu/sandbox_iommu.c b/drivers/iommu/sandbox_iommu.c
index 6ceb7fd..e37976f 100644
--- a/drivers/iommu/sandbox_iommu.c
+++ b/drivers/iommu/sandbox_iommu.c
@@ -3,7 +3,6 @@
* Copyright (C) 2021 Mark Kettenis <kettenis@openbsd.org>
*/
-#include <common.h>
#include <dm.h>
#include <iommu.h>
#include <lmb.h>
diff --git a/drivers/led/led-uclass.c b/drivers/led/led-uclass.c
index a4be56f..f37bf6a 100644
--- a/drivers/led/led-uclass.c
+++ b/drivers/led/led-uclass.c
@@ -6,7 +6,6 @@
#define LOG_CATEGORY UCLASS_LED
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <led.h>
diff --git a/drivers/led/led_bcm6328.c b/drivers/led/led_bcm6328.c
index f59a92f..dcc5741 100644
--- a/drivers/led/led_bcm6328.c
+++ b/drivers/led/led_bcm6328.c
@@ -3,7 +3,6 @@
* Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <led.h>
diff --git a/drivers/led/led_bcm6358.c b/drivers/led/led_bcm6358.c
index 25aa399..b1373ab 100644
--- a/drivers/led/led_bcm6358.c
+++ b/drivers/led/led_bcm6358.c
@@ -3,7 +3,6 @@
* Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <led.h>
diff --git a/drivers/led/led_bcm6753.c b/drivers/led/led_bcm6753.c
index 2466d93..170caf7 100644
--- a/drivers/led/led_bcm6753.c
+++ b/drivers/led/led_bcm6753.c
@@ -6,7 +6,6 @@
* drivers/led/led_bcm6858.c
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <led.h>
diff --git a/drivers/led/led_bcm6858.c b/drivers/led/led_bcm6858.c
index 397dc0d..a6efdcf 100644
--- a/drivers/led/led_bcm6858.c
+++ b/drivers/led/led_bcm6858.c
@@ -7,7 +7,6 @@
* drivers/led/led_bcm6358.c
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <led.h>
diff --git a/drivers/led/led_cortina.c b/drivers/led/led_cortina.c
index bcbe78d..2d3ad32 100644
--- a/drivers/led/led_cortina.c
+++ b/drivers/led/led_cortina.c
@@ -6,7 +6,6 @@
*
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <led.h>
diff --git a/drivers/led/led_gpio.c b/drivers/led/led_gpio.c
index 71421de..ce22fb4 100644
--- a/drivers/led/led_gpio.c
+++ b/drivers/led/led_gpio.c
@@ -4,7 +4,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <led.h>
diff --git a/drivers/led/led_lp5562.c b/drivers/led/led_lp5562.c
index 431d7e1..0c5f9bc 100644
--- a/drivers/led/led_lp5562.c
+++ b/drivers/led/led_lp5562.c
@@ -125,9 +125,9 @@
/*
* Data sheet says "Delay between consecutive I2C writes to
- * ENABLE register (00h) need to be longer than 488 μs
+ * ENABLE register (00h) need to be longer than 488 us
* (typical)." and "Delay between consecutive I2C writes to
- * OP_MODE register need to be longer than 153 μs (typ)."
+ * OP_MODE register need to be longer than 153 us (typ)."
*
* The linux driver does usleep_range(500, 600) and
* usleep_range(200, 300), respectively.
diff --git a/drivers/led/led_pwm.c b/drivers/led/led_pwm.c
index ae6de30..15dd836 100644
--- a/drivers/led/led_pwm.c
+++ b/drivers/led/led_pwm.c
@@ -4,7 +4,6 @@
* Author: Ivan Vozvakhov <i.vozvakhov@vk.team>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <led.h>
diff --git a/drivers/mailbox/apple-mbox.c b/drivers/mailbox/apple-mbox.c
index 30c8e2f..2ee4973 100644
--- a/drivers/mailbox/apple-mbox.c
+++ b/drivers/mailbox/apple-mbox.c
@@ -3,7 +3,6 @@
* Copyright (C) 2021 Mark Kettenis <kettenis@openbsd.org>
*/
-#include <common.h>
#include <dm.h>
#include <mailbox-uclass.h>
#include <asm/io.h>
diff --git a/drivers/mailbox/k3-sec-proxy.c b/drivers/mailbox/k3-sec-proxy.c
index 05f6b17..5eafe46 100644
--- a/drivers/mailbox/k3-sec-proxy.c
+++ b/drivers/mailbox/k3-sec-proxy.c
@@ -6,7 +6,6 @@
* Lokesh Vutla <lokeshvutla@ti.com>
*/
-#include <common.h>
#include <log.h>
#include <malloc.h>
#include <asm/global_data.h>
diff --git a/drivers/mailbox/mailbox-uclass.c b/drivers/mailbox/mailbox-uclass.c
index 85ba8c5..4bf4987 100644
--- a/drivers/mailbox/mailbox-uclass.c
+++ b/drivers/mailbox/mailbox-uclass.c
@@ -5,7 +5,6 @@
#define LOG_CATEGORY UCLASS_MAILBOX
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <mailbox.h>
diff --git a/drivers/mailbox/sandbox-mbox-test.c b/drivers/mailbox/sandbox-mbox-test.c
index ffd4674..a2cfde2 100644
--- a/drivers/mailbox/sandbox-mbox-test.c
+++ b/drivers/mailbox/sandbox-mbox-test.c
@@ -3,7 +3,6 @@
* Copyright (c) 2016, NVIDIA CORPORATION.
*/
-#include <common.h>
#include <dm.h>
#include <mailbox.h>
#include <malloc.h>
diff --git a/drivers/mailbox/sandbox-mbox.c b/drivers/mailbox/sandbox-mbox.c
index 87d38de..87e06e4 100644
--- a/drivers/mailbox/sandbox-mbox.c
+++ b/drivers/mailbox/sandbox-mbox.c
@@ -3,7 +3,6 @@
* Copyright (c) 2016, NVIDIA CORPORATION.
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <mailbox-uclass.h>
diff --git a/drivers/mailbox/stm32-ipcc.c b/drivers/mailbox/stm32-ipcc.c
index 046e1a8..dda1087 100644
--- a/drivers/mailbox/stm32-ipcc.c
+++ b/drivers/mailbox/stm32-ipcc.c
@@ -5,7 +5,6 @@
#define LOG_CATEGORY UCLASS_MAILBOX
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <log.h>
diff --git a/drivers/mailbox/tegra-hsp.c b/drivers/mailbox/tegra-hsp.c
index 08c51c4..bfd4d7c 100644
--- a/drivers/mailbox/tegra-hsp.c
+++ b/drivers/mailbox/tegra-hsp.c
@@ -3,7 +3,6 @@
* Copyright (c) 2016, NVIDIA CORPORATION.
*/
-#include <common.h>
#include <log.h>
#include <malloc.h>
#include <asm/io.h>
diff --git a/drivers/mailbox/zynqmp-ipi.c b/drivers/mailbox/zynqmp-ipi.c
index eb86847..4df6973 100644
--- a/drivers/mailbox/zynqmp-ipi.c
+++ b/drivers/mailbox/zynqmp-ipi.c
@@ -5,7 +5,6 @@
* Copyright (C) 2018-2019 Xilinx, Inc.
*/
-#include <common.h>
#include <log.h>
#include <asm/io.h>
#include <asm/system.h>
diff --git a/drivers/memory/stm32-fmc2-ebi.c b/drivers/memory/stm32-fmc2-ebi.c
index a722a38..713dead 100644
--- a/drivers/memory/stm32-fmc2-ebi.c
+++ b/drivers/memory/stm32-fmc2-ebi.c
@@ -5,7 +5,6 @@
#define LOG_CATEGORY UCLASS_NOP
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <reset.h>
@@ -22,8 +21,15 @@
#define FMC2_BCR(x) ((x) * 0x8 + FMC2_BCR1)
#define FMC2_BTR(x) ((x) * 0x8 + FMC2_BTR1)
#define FMC2_PCSCNTR 0x20
+#define FMC2_CFGR 0x20
+#define FMC2_SR 0x84
#define FMC2_BWTR1 0x104
#define FMC2_BWTR(x) ((x) * 0x8 + FMC2_BWTR1)
+#define FMC2_SECCFGR 0x300
+#define FMC2_CIDCFGR0 0x30c
+#define FMC2_CIDCFGR(x) ((x) * 0x8 + FMC2_CIDCFGR0)
+#define FMC2_SEMCR0 0x310
+#define FMC2_SEMCR(x) ((x) * 0x8 + FMC2_SEMCR0)
/* Register: FMC2_BCR1 */
#define FMC2_BCR1_CCLKEN BIT(20)
@@ -44,6 +50,7 @@
#define FMC2_BCR_ASYNCWAIT BIT(15)
#define FMC2_BCR_CPSIZE GENMASK(18, 16)
#define FMC2_BCR_CBURSTRW BIT(19)
+#define FMC2_BCR_CSCOUNT GENMASK(21, 20)
#define FMC2_BCR_NBLSET GENMASK(23, 22)
/* Register: FMC2_BTRx/FMC2_BWTRx */
@@ -60,8 +67,28 @@
#define FMC2_PCSCNTR_CSCOUNT GENMASK(15, 0)
#define FMC2_PCSCNTR_CNTBEN(x) BIT((x) + 16)
+/* Register: FMC2_CFGR */
+#define FMC2_CFGR_CLKDIV GENMASK(19, 16)
+#define FMC2_CFGR_CCLKEN BIT(20)
+#define FMC2_CFGR_FMC2EN BIT(31)
+
+/* Register: FMC2_SR */
+#define FMC2_SR_ISOST GENMASK(1, 0)
+
+/* Register: FMC2_CIDCFGR */
+#define FMC2_CIDCFGR_CFEN BIT(0)
+#define FMC2_CIDCFGR_SEMEN BIT(1)
+#define FMC2_CIDCFGR_SCID GENMASK(6, 4)
+#define FMC2_CIDCFGR_SEMWLC1 BIT(17)
+
+/* Register: FMC2_SEMCR */
+#define FMC2_SEMCR_SEM_MUTEX BIT(0)
+#define FMC2_SEMCR_SEMCID GENMASK(6, 4)
+
#define FMC2_MAX_EBI_CE 4
#define FMC2_MAX_BANKS 5
+#define FMC2_MAX_RESOURCES 6
+#define FMC2_CID1 1
#define FMC2_BCR_CPSIZE_0 0x0
#define FMC2_BCR_CPSIZE_128 0x1
@@ -76,6 +103,11 @@
#define FMC2_BCR_MTYP_PSRAM 0x1
#define FMC2_BCR_MTYP_NOR 0x2
+#define FMC2_BCR_CSCOUNT_0 0x0
+#define FMC2_BCR_CSCOUNT_1 0x1
+#define FMC2_BCR_CSCOUNT_64 0x2
+#define FMC2_BCR_CSCOUNT_256 0x3
+
#define FMC2_BXTR_EXTMOD_A 0x0
#define FMC2_BXTR_EXTMOD_B 0x1
#define FMC2_BXTR_EXTMOD_C 0x2
@@ -90,6 +122,7 @@
#define FMC2_BTR_CLKDIV_MAX 0xf
#define FMC2_BTR_DATLAT_MAX 0xf
#define FMC2_PCSCNTR_CSCOUNT_MAX 0xff
+#define FMC2_CFGR_CLKDIV_MAX 0xf
enum stm32_fmc2_ebi_bank {
FMC2_EBI1 = 0,
@@ -103,7 +136,8 @@
FMC2_REG_BCR = 1,
FMC2_REG_BTR,
FMC2_REG_BWTR,
- FMC2_REG_PCSCNTR
+ FMC2_REG_PCSCNTR,
+ FMC2_REG_CFGR
};
enum stm32_fmc2_ebi_transaction_type {
@@ -134,10 +168,30 @@
FMC2_CPSIZE_1024 = 1024
};
+enum stm32_fmc2_ebi_cscount {
+ FMC2_CSCOUNT_0 = 0,
+ FMC2_CSCOUNT_1 = 1,
+ FMC2_CSCOUNT_64 = 64,
+ FMC2_CSCOUNT_256 = 256
+};
+
+struct stm32_fmc2_ebi;
+
+struct stm32_fmc2_ebi_data {
+ const struct stm32_fmc2_prop *child_props;
+ unsigned int nb_child_props;
+ u32 fmc2_enable_reg;
+ u32 fmc2_enable_bit;
+ int (*nwait_used_by_ctrls)(struct stm32_fmc2_ebi *ebi);
+ int (*check_rif)(struct stm32_fmc2_ebi *ebi, u32 resource);
+};
+
struct stm32_fmc2_ebi {
struct clk clk;
fdt_addr_t io_base;
+ const struct stm32_fmc2_ebi_data *data;
u8 bank_assigned;
+ bool access_granted;
};
/*
@@ -209,6 +263,28 @@
return -EINVAL;
}
+static int stm32_fmc2_ebi_mp25_check_cclk(struct stm32_fmc2_ebi *ebi,
+ const struct stm32_fmc2_prop *prop,
+ int cs)
+{
+ if (!ebi->access_granted)
+ return -EACCES;
+
+ return stm32_fmc2_ebi_check_sync_trans(ebi, prop, cs);
+}
+
+static int stm32_fmc2_ebi_mp25_check_clk_period(struct stm32_fmc2_ebi *ebi,
+ const struct stm32_fmc2_prop *prop,
+ int cs)
+{
+ u32 cfgr = readl(ebi->io_base + FMC2_CFGR);
+
+ if (cfgr & FMC2_CFGR_CCLKEN && !ebi->access_granted)
+ return -EACCES;
+
+ return stm32_fmc2_ebi_check_sync_trans(ebi, prop, cs);
+}
+
static int stm32_fmc2_ebi_check_async_trans(struct stm32_fmc2_ebi *ebi,
const struct stm32_fmc2_prop *prop,
int cs)
@@ -296,6 +372,24 @@
return DIV_ROUND_UP(nb_clk_cycles, clk_period);
}
+static u32 stm32_fmc2_ebi_mp25_ns_to_clk_period(struct stm32_fmc2_ebi *ebi,
+ int cs, u32 setup)
+{
+ u32 nb_clk_cycles = stm32_fmc2_ebi_ns_to_clock_cycles(ebi, cs, setup);
+ u32 cfgr = readl(ebi->io_base + FMC2_CFGR);
+ u32 clk_period;
+
+ if (cfgr & FMC2_CFGR_CCLKEN) {
+ clk_period = FIELD_GET(FMC2_CFGR_CLKDIV, cfgr) + 1;
+ } else {
+ u32 btr = readl(ebi->io_base + FMC2_BTR(cs));
+
+ clk_period = FIELD_GET(FMC2_BTR_CLKDIV, btr) + 1;
+ }
+
+ return DIV_ROUND_UP(nb_clk_cycles, clk_period);
+}
+
static int stm32_fmc2_ebi_get_reg(int reg_type, int cs, u32 *reg)
{
switch (reg_type) {
@@ -311,6 +405,9 @@
case FMC2_REG_PCSCNTR:
*reg = FMC2_PCSCNTR;
break;
+ case FMC2_REG_CFGR:
+ *reg = FMC2_CFGR;
+ break;
default:
return -EINVAL;
}
@@ -649,6 +746,26 @@
return 0;
}
+static int stm32_fmc2_ebi_mp25_set_clk_period(struct stm32_fmc2_ebi *ebi,
+ const struct stm32_fmc2_prop *prop,
+ int cs, u32 setup)
+{
+ u32 cfgr = readl(ebi->io_base + FMC2_CFGR);
+ u32 val;
+
+ if (cfgr & FMC2_CFGR_CCLKEN) {
+ val = setup ? clamp_val(setup - 1, 1, FMC2_CFGR_CLKDIV_MAX) : 1;
+ val = FIELD_PREP(FMC2_CFGR_CLKDIV, val);
+ clrsetbits_le32(ebi->io_base + FMC2_CFGR, FMC2_CFGR_CLKDIV, val);
+ } else {
+ val = setup ? clamp_val(setup - 1, 1, FMC2_BTR_CLKDIV_MAX) : 1;
+ val = FIELD_PREP(FMC2_BTR_CLKDIV, val);
+ clrsetbits_le32(ebi->io_base + FMC2_BTR(cs), FMC2_BTR_CLKDIV, val);
+ }
+
+ return 0;
+}
+
static int stm32_fmc2_ebi_set_data_latency(struct stm32_fmc2_ebi *ebi,
const struct stm32_fmc2_prop *prop,
int cs, u32 setup)
@@ -689,6 +806,27 @@
return 0;
}
+static int stm32_fmc2_ebi_mp25_set_max_low_pulse(struct stm32_fmc2_ebi *ebi,
+ const struct stm32_fmc2_prop *prop,
+ int cs, u32 setup)
+{
+ u32 val;
+
+ if (setup == FMC2_CSCOUNT_0)
+ val = FIELD_PREP(FMC2_BCR_CSCOUNT, FMC2_BCR_CSCOUNT_0);
+ else if (setup == FMC2_CSCOUNT_1)
+ val = FIELD_PREP(FMC2_BCR_CSCOUNT, FMC2_BCR_CSCOUNT_1);
+ else if (setup <= FMC2_CSCOUNT_64)
+ val = FIELD_PREP(FMC2_BCR_CSCOUNT, FMC2_BCR_CSCOUNT_64);
+ else
+ val = FIELD_PREP(FMC2_BCR_CSCOUNT, FMC2_BCR_CSCOUNT_256);
+
+ clrsetbits_le32(ebi->io_base + FMC2_BCR(cs),
+ FMC2_BCR_CSCOUNT, val);
+
+ return 0;
+}
+
static const struct stm32_fmc2_prop stm32_fmc2_child_props[] = {
/* st,fmc2-ebi-cs-trans-type must be the first property */
{
@@ -854,6 +992,235 @@
},
};
+static const struct stm32_fmc2_prop stm32_fmc2_mp25_child_props[] = {
+ /* st,fmc2-ebi-cs-trans-type must be the first property */
+ {
+ .name = "st,fmc2-ebi-cs-transaction-type",
+ .mprop = true,
+ .set = stm32_fmc2_ebi_set_trans_type,
+ },
+ {
+ .name = "st,fmc2-ebi-cs-cclk-enable",
+ .bprop = true,
+ .reg_type = FMC2_REG_CFGR,
+ .reg_mask = FMC2_CFGR_CCLKEN,
+ .check = stm32_fmc2_ebi_mp25_check_cclk,
+ .set = stm32_fmc2_ebi_set_bit_field,
+ },
+ {
+ .name = "st,fmc2-ebi-cs-mux-enable",
+ .bprop = true,
+ .reg_type = FMC2_REG_BCR,
+ .reg_mask = FMC2_BCR_MUXEN,
+ .check = stm32_fmc2_ebi_check_mux,
+ .set = stm32_fmc2_ebi_set_bit_field,
+ },
+ {
+ .name = "st,fmc2-ebi-cs-buswidth",
+ .reset_val = FMC2_BUSWIDTH_16,
+ .set = stm32_fmc2_ebi_set_buswidth,
+ },
+ {
+ .name = "st,fmc2-ebi-cs-waitpol-high",
+ .bprop = true,
+ .reg_type = FMC2_REG_BCR,
+ .reg_mask = FMC2_BCR_WAITPOL,
+ .set = stm32_fmc2_ebi_set_bit_field,
+ },
+ {
+ .name = "st,fmc2-ebi-cs-waitcfg-enable",
+ .bprop = true,
+ .reg_type = FMC2_REG_BCR,
+ .reg_mask = FMC2_BCR_WAITCFG,
+ .check = stm32_fmc2_ebi_check_waitcfg,
+ .set = stm32_fmc2_ebi_set_bit_field,
+ },
+ {
+ .name = "st,fmc2-ebi-cs-wait-enable",
+ .bprop = true,
+ .reg_type = FMC2_REG_BCR,
+ .reg_mask = FMC2_BCR_WAITEN,
+ .check = stm32_fmc2_ebi_check_sync_trans,
+ .set = stm32_fmc2_ebi_set_bit_field,
+ },
+ {
+ .name = "st,fmc2-ebi-cs-asyncwait-enable",
+ .bprop = true,
+ .reg_type = FMC2_REG_BCR,
+ .reg_mask = FMC2_BCR_ASYNCWAIT,
+ .check = stm32_fmc2_ebi_check_async_trans,
+ .set = stm32_fmc2_ebi_set_bit_field,
+ },
+ {
+ .name = "st,fmc2-ebi-cs-cpsize",
+ .check = stm32_fmc2_ebi_check_cpsize,
+ .set = stm32_fmc2_ebi_set_cpsize,
+ },
+ {
+ .name = "st,fmc2-ebi-cs-byte-lane-setup-ns",
+ .calculate = stm32_fmc2_ebi_ns_to_clock_cycles,
+ .set = stm32_fmc2_ebi_set_bl_setup,
+ },
+ {
+ .name = "st,fmc2-ebi-cs-address-setup-ns",
+ .reg_type = FMC2_REG_BTR,
+ .reset_val = FMC2_BXTR_ADDSET_MAX,
+ .check = stm32_fmc2_ebi_check_async_trans,
+ .calculate = stm32_fmc2_ebi_ns_to_clock_cycles,
+ .set = stm32_fmc2_ebi_set_address_setup,
+ },
+ {
+ .name = "st,fmc2-ebi-cs-address-hold-ns",
+ .reg_type = FMC2_REG_BTR,
+ .reset_val = FMC2_BXTR_ADDHLD_MAX,
+ .check = stm32_fmc2_ebi_check_address_hold,
+ .calculate = stm32_fmc2_ebi_ns_to_clock_cycles,
+ .set = stm32_fmc2_ebi_set_address_hold,
+ },
+ {
+ .name = "st,fmc2-ebi-cs-data-setup-ns",
+ .reg_type = FMC2_REG_BTR,
+ .reset_val = FMC2_BXTR_DATAST_MAX,
+ .check = stm32_fmc2_ebi_check_async_trans,
+ .calculate = stm32_fmc2_ebi_ns_to_clock_cycles,
+ .set = stm32_fmc2_ebi_set_data_setup,
+ },
+ {
+ .name = "st,fmc2-ebi-cs-bus-turnaround-ns",
+ .reg_type = FMC2_REG_BTR,
+ .reset_val = FMC2_BXTR_BUSTURN_MAX + 1,
+ .calculate = stm32_fmc2_ebi_ns_to_clock_cycles,
+ .set = stm32_fmc2_ebi_set_bus_turnaround,
+ },
+ {
+ .name = "st,fmc2-ebi-cs-data-hold-ns",
+ .reg_type = FMC2_REG_BTR,
+ .check = stm32_fmc2_ebi_check_async_trans,
+ .calculate = stm32_fmc2_ebi_ns_to_clock_cycles,
+ .set = stm32_fmc2_ebi_set_data_hold,
+ },
+ {
+ .name = "st,fmc2-ebi-cs-clk-period-ns",
+ .reset_val = FMC2_CFGR_CLKDIV_MAX + 1,
+ .check = stm32_fmc2_ebi_mp25_check_clk_period,
+ .calculate = stm32_fmc2_ebi_ns_to_clock_cycles,
+ .set = stm32_fmc2_ebi_mp25_set_clk_period,
+ },
+ {
+ .name = "st,fmc2-ebi-cs-data-latency-ns",
+ .check = stm32_fmc2_ebi_check_sync_trans,
+ .calculate = stm32_fmc2_ebi_mp25_ns_to_clk_period,
+ .set = stm32_fmc2_ebi_set_data_latency,
+ },
+ {
+ .name = "st,fmc2-ebi-cs-write-address-setup-ns",
+ .reg_type = FMC2_REG_BWTR,
+ .reset_val = FMC2_BXTR_ADDSET_MAX,
+ .check = stm32_fmc2_ebi_check_async_trans,
+ .calculate = stm32_fmc2_ebi_ns_to_clock_cycles,
+ .set = stm32_fmc2_ebi_set_address_setup,
+ },
+ {
+ .name = "st,fmc2-ebi-cs-write-address-hold-ns",
+ .reg_type = FMC2_REG_BWTR,
+ .reset_val = FMC2_BXTR_ADDHLD_MAX,
+ .check = stm32_fmc2_ebi_check_address_hold,
+ .calculate = stm32_fmc2_ebi_ns_to_clock_cycles,
+ .set = stm32_fmc2_ebi_set_address_hold,
+ },
+ {
+ .name = "st,fmc2-ebi-cs-write-data-setup-ns",
+ .reg_type = FMC2_REG_BWTR,
+ .reset_val = FMC2_BXTR_DATAST_MAX,
+ .check = stm32_fmc2_ebi_check_async_trans,
+ .calculate = stm32_fmc2_ebi_ns_to_clock_cycles,
+ .set = stm32_fmc2_ebi_set_data_setup,
+ },
+ {
+ .name = "st,fmc2-ebi-cs-write-bus-turnaround-ns",
+ .reg_type = FMC2_REG_BWTR,
+ .reset_val = FMC2_BXTR_BUSTURN_MAX + 1,
+ .calculate = stm32_fmc2_ebi_ns_to_clock_cycles,
+ .set = stm32_fmc2_ebi_set_bus_turnaround,
+ },
+ {
+ .name = "st,fmc2-ebi-cs-write-data-hold-ns",
+ .reg_type = FMC2_REG_BWTR,
+ .check = stm32_fmc2_ebi_check_async_trans,
+ .calculate = stm32_fmc2_ebi_ns_to_clock_cycles,
+ .set = stm32_fmc2_ebi_set_data_hold,
+ },
+ {
+ .name = "st,fmc2-ebi-cs-max-low-pulse-ns",
+ .calculate = stm32_fmc2_ebi_ns_to_clock_cycles,
+ .set = stm32_fmc2_ebi_mp25_set_max_low_pulse,
+ },
+};
+
+static int stm32_fmc2_ebi_mp25_check_rif(struct stm32_fmc2_ebi *ebi, u32 resource)
+{
+ u32 seccfgr, cidcfgr, semcr;
+ int cid;
+
+ if (resource >= FMC2_MAX_RESOURCES)
+ return -EINVAL;
+
+ seccfgr = readl(ebi->io_base + FMC2_SECCFGR);
+ if (seccfgr & BIT(resource)) {
+ if (resource)
+ log_err("resource %d is configured as secure\n",
+ resource);
+
+ return -EACCES;
+ }
+
+ cidcfgr = readl(ebi->io_base + FMC2_CIDCFGR(resource));
+ if (!(cidcfgr & FMC2_CIDCFGR_CFEN))
+ /* CID filtering is turned off: access granted */
+ return 0;
+
+ if (!(cidcfgr & FMC2_CIDCFGR_SEMEN)) {
+ /* Static CID mode */
+ cid = FIELD_GET(FMC2_CIDCFGR_SCID, cidcfgr);
+ if (cid != FMC2_CID1) {
+ if (resource)
+ log_err("static CID%d set for resource %d\n",
+ cid, resource);
+
+ return -EACCES;
+ }
+
+ return 0;
+ }
+
+ /* Pass-list with semaphore mode */
+ if (!(cidcfgr & FMC2_CIDCFGR_SEMWLC1)) {
+ if (resource)
+ log_err("CID1 is block-listed for resource %d\n",
+ resource);
+
+ return -EACCES;
+ }
+
+ semcr = readl(ebi->io_base + FMC2_SEMCR(resource));
+ if (!(semcr & FMC2_SEMCR_SEM_MUTEX)) {
+ setbits_le32(ebi->io_base + FMC2_SEMCR(resource),
+ FMC2_SEMCR_SEM_MUTEX);
+ semcr = readl(ebi->io_base + FMC2_SEMCR(resource));
+ }
+
+ cid = FIELD_GET(FMC2_SEMCR_SEMCID, semcr);
+ if (cid != FMC2_CID1) {
+ if (resource)
+ log_err("resource %d is already used by CID%d\n",
+ resource, cid);
+
+ return -EACCES;
+ }
+
+ return 0;
+}
+
static int stm32_fmc2_ebi_parse_prop(struct stm32_fmc2_ebi *ebi,
ofnode node,
const struct stm32_fmc2_prop *prop,
@@ -915,7 +1282,7 @@
}
/* NWAIT signal can not be connected to EBI controller and NAND controller */
-static bool stm32_fmc2_ebi_nwait_used_by_ctrls(struct stm32_fmc2_ebi *ebi)
+static int stm32_fmc2_ebi_nwait_used_by_ctrls(struct stm32_fmc2_ebi *ebi)
{
unsigned int cs;
u32 bcr;
@@ -926,16 +1293,22 @@
bcr = readl(ebi->io_base + FMC2_BCR(cs));
if ((bcr & FMC2_BCR_WAITEN || bcr & FMC2_BCR_ASYNCWAIT) &&
- ebi->bank_assigned & BIT(FMC2_NAND))
- return true;
+ ebi->bank_assigned & BIT(FMC2_NAND)) {
+ log_err("NWAIT signal connected to EBI and NAND controllers\n");
+ return -EINVAL;
+ }
}
- return false;
+ return 0;
}
static void stm32_fmc2_ebi_enable(struct stm32_fmc2_ebi *ebi)
{
- setbits_le32(ebi->io_base + FMC2_BCR1, FMC2_BCR1_FMC2EN);
+ if (!ebi->access_granted)
+ return;
+
+ setbits_le32(ebi->io_base + ebi->data->fmc2_enable_reg,
+ ebi->data->fmc2_enable_bit);
}
static int stm32_fmc2_ebi_setup_cs(struct stm32_fmc2_ebi *ebi,
@@ -946,8 +1319,8 @@
stm32_fmc2_ebi_disable_bank(ebi, cs);
- for (i = 0; i < ARRAY_SIZE(stm32_fmc2_child_props); i++) {
- const struct stm32_fmc2_prop *p = &stm32_fmc2_child_props[i];
+ for (i = 0; i < ebi->data->nb_child_props; i++) {
+ const struct stm32_fmc2_prop *p = &ebi->data->child_props[i];
ret = stm32_fmc2_ebi_parse_prop(ebi, node, p, cs);
if (ret) {
@@ -987,6 +1360,14 @@
return -EINVAL;
}
+ if (ebi->data->check_rif) {
+ ret = ebi->data->check_rif(ebi, bank + 1);
+ if (ret) {
+ dev_err(dev, "bank access failed: %d\n", bank);
+ return ret;
+ }
+ }
+
if (bank < FMC2_MAX_EBI_CE) {
ret = stm32_fmc2_ebi_setup_cs(ebi, child, bank);
if (ret) {
@@ -1004,9 +1385,10 @@
return -ENODEV;
}
- if (stm32_fmc2_ebi_nwait_used_by_ctrls(ebi)) {
- dev_err(dev, "NWAIT signal connected to EBI and NAND controllers\n");
- return -EINVAL;
+ if (ebi->data->nwait_used_by_ctrls) {
+ ret = ebi->data->nwait_used_by_ctrls(ebi);
+ if (ret)
+ return ret;
}
stm32_fmc2_ebi_enable(ebi);
@@ -1020,6 +1402,10 @@
struct reset_ctl reset;
int ret;
+ ebi->data = (void *)dev_get_driver_data(dev);
+ if (!ebi->data)
+ return -EINVAL;
+
ebi->io_base = dev_read_addr(dev);
if (ebi->io_base == FDT_ADDR_T_NONE)
return -EINVAL;
@@ -1039,11 +1425,49 @@
reset_deassert(&reset);
}
+ /* Check if CFGR register can be modified */
+ ebi->access_granted = true;
+ if (ebi->data->check_rif) {
+ ret = ebi->data->check_rif(ebi, 0);
+ if (ret) {
+ ebi->access_granted = false;
+
+ /* In case of CFGR is secure, just check that the FMC2 is enabled */
+ if (readl(ebi->io_base + FMC2_SR) & FMC2_SR_ISOST) {
+ dev_err(dev, "FMC2 is not ready to be used.\n");
+ return -EACCES;
+ }
+ }
+ }
+
return stm32_fmc2_ebi_parse_dt(dev, ebi);
}
+static const struct stm32_fmc2_ebi_data stm32_fmc2_ebi_mp1_data = {
+ .child_props = stm32_fmc2_child_props,
+ .nb_child_props = ARRAY_SIZE(stm32_fmc2_child_props),
+ .fmc2_enable_reg = FMC2_BCR1,
+ .fmc2_enable_bit = FMC2_BCR1_FMC2EN,
+ .nwait_used_by_ctrls = stm32_fmc2_ebi_nwait_used_by_ctrls,
+};
+
+static const struct stm32_fmc2_ebi_data stm32_fmc2_ebi_mp25_data = {
+ .child_props = stm32_fmc2_mp25_child_props,
+ .nb_child_props = ARRAY_SIZE(stm32_fmc2_mp25_child_props),
+ .fmc2_enable_reg = FMC2_CFGR,
+ .fmc2_enable_bit = FMC2_CFGR_FMC2EN,
+ .check_rif = stm32_fmc2_ebi_mp25_check_rif,
+};
+
static const struct udevice_id stm32_fmc2_ebi_match[] = {
- {.compatible = "st,stm32mp1-fmc2-ebi"},
+ {
+ .compatible = "st,stm32mp1-fmc2-ebi",
+ .data = (ulong)&stm32_fmc2_ebi_mp1_data,
+ },
+ {
+ .compatible = "st,stm32mp25-fmc2-ebi",
+ .data = (ulong)&stm32_fmc2_ebi_mp25_data,
+ },
{ /* Sentinel */ }
};
diff --git a/drivers/memory/ti-aemif.c b/drivers/memory/ti-aemif.c
index 41325eb..29131f5 100644
--- a/drivers/memory/ti-aemif.c
+++ b/drivers/memory/ti-aemif.c
@@ -6,7 +6,6 @@
* Texas Instruments Incorporated, <www.ti.com>
*/
-#include <common.h>
#include <asm/arch/hardware.h>
#include <asm/ti-common/ti-aemif.h>
diff --git a/drivers/memory/ti-gpmc.c b/drivers/memory/ti-gpmc.c
index 8877b8f..8af48e1 100644
--- a/drivers/memory/ti-gpmc.c
+++ b/drivers/memory/ti-gpmc.c
@@ -7,7 +7,6 @@
#include <asm/io.h>
#include <clk.h>
-#include <common.h>
#include <dm.h>
#include <dm/device-internal.h>
#include <dm/device_compat.h>
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index 98043fc..6009d55 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -104,7 +104,7 @@
config ROCKCHIP_IODOMAIN
bool "Rockchip IO-domain driver support"
depends on DM_REGULATOR && ARCH_ROCKCHIP
- default y if ROCKCHIP_RK3568
+ default y if ROCKCHIP_RK3328 || ROCKCHIP_RK3568
help
Enable support for IO-domains in Rockchip SoCs. It is necessary
for the IO-domain setting of the SoC to match the voltage supplied
@@ -505,6 +505,17 @@
model. This should only be enabled for testing as it is not useful for
anything else.
+config TURRIS_OMNIA_MCU
+ bool "Enable Turris Omnia MCU driver"
+ depends on DM_I2C
+ depends on DM_GPIO
+ depends on DM_RNG
+ depends on SYSRESET
+ default y if TARGET_TURRIS_OMNIA
+ help
+ This enables support for Turris Omnia MCU connected GPIOs and
+ board power off.
+
config USB_HUB_USB251XB
tristate "USB251XB Hub Controller Configuration Driver"
depends on I2C
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index 1522f6c..e53d52c 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -81,6 +81,7 @@
obj-$(CONFIG_TEGRA186_BPMP) += tegra186_bpmp.o
obj-$(CONFIG_TEGRA_CAR) += tegra_car.o
obj-$(CONFIG_TEST_DRV) += test_drv.o
+obj-$(CONFIG_$(SPL_TPL_)TURRIS_OMNIA_MCU) += turris_omnia_mcu.o
obj-$(CONFIG_TWL4030_LED) += twl4030_led.o
obj-$(CONFIG_VEXPRESS_CONFIG) += vexpress_config.o
obj-$(CONFIG_WINBOND_W83627) += winbond_w83627.o
@@ -90,4 +91,4 @@
obj-$(CONFIG_ESM_K3) += k3_esm.o
obj-$(CONFIG_ESM_PMIC) += esm_pmic.o
obj-$(CONFIG_SL28CPLD) += sl28cpld.o
-obj-$(CONFIG_SPL_SOCFPGA_SEC_REG) += socfpga_dtreg.o
+obj-$(CONFIG_SPL_SOCFPGA_DT_REG) += socfpga_dtreg.o
diff --git a/drivers/misc/altera_sysid.c b/drivers/misc/altera_sysid.c
index 878df12..21e64fa 100644
--- a/drivers/misc/altera_sysid.c
+++ b/drivers/misc/altera_sysid.c
@@ -4,7 +4,6 @@
* Scott McNutt <smcnutt@psyent.com>
*/
-#include <common.h>
#include <command.h>
#include <dm.h>
#include <errno.h>
diff --git a/drivers/misc/atsha204a-i2c.c b/drivers/misc/atsha204a-i2c.c
index 707daa9..3b9046d 100644
--- a/drivers/misc/atsha204a-i2c.c
+++ b/drivers/misc/atsha204a-i2c.c
@@ -10,7 +10,6 @@
* published by the Free Software Foundation.
*/
-#include <common.h>
#include <dm.h>
#include <i2c.h>
#include <errno.h>
diff --git a/drivers/misc/cbmem_console.c b/drivers/misc/cbmem_console.c
index ba3a599..8220add 100644
--- a/drivers/misc/cbmem_console.c
+++ b/drivers/misc/cbmem_console.c
@@ -3,8 +3,8 @@
* Copyright (C) 2011 The ChromiumOS Authors. All rights reserved.
*/
-#include <common.h>
#include <console.h>
+#include <linux/string.h>
#include <asm/cb_sysinfo.h>
void cbmemc_putc(struct stdio_dev *dev, char data)
diff --git a/drivers/misc/cros_ec.c b/drivers/misc/cros_ec.c
index 9c1e6a5..fabe496 100644
--- a/drivers/misc/cros_ec.c
+++ b/drivers/misc/cros_ec.c
@@ -15,7 +15,6 @@
#define LOG_CATEGORY UCLASS_CROS_EC
-#include <common.h>
#include <command.h>
#include <dm.h>
#include <i2c.h>
@@ -24,6 +23,7 @@
#include <log.h>
#include <malloc.h>
#include <spi.h>
+#include <time.h>
#include <linux/delay.h>
#include <linux/errno.h>
#include <asm/io.h>
diff --git a/drivers/misc/cros_ec_i2c.c b/drivers/misc/cros_ec_i2c.c
index a1b78a3..5516aa8 100644
--- a/drivers/misc/cros_ec_i2c.c
+++ b/drivers/misc/cros_ec_i2c.c
@@ -12,7 +12,6 @@
* KBC.
*/
-#include <common.h>
#include <dm.h>
#include <i2c.h>
#include <cros_ec.h>
diff --git a/drivers/misc/cros_ec_lpc.c b/drivers/misc/cros_ec_lpc.c
index 1a8a813..e2a3226 100644
--- a/drivers/misc/cros_ec_lpc.c
+++ b/drivers/misc/cros_ec_lpc.c
@@ -12,11 +12,11 @@
* KBC.
*/
-#include <common.h>
#include <dm.h>
#include <command.h>
#include <cros_ec.h>
#include <log.h>
+#include <time.h>
#include <asm/io.h>
#ifdef DEBUG_TRACE
diff --git a/drivers/misc/cros_ec_sandbox.c b/drivers/misc/cros_ec_sandbox.c
index 1201535..1cad51d 100644
--- a/drivers/misc/cros_ec_sandbox.c
+++ b/drivers/misc/cros_ec_sandbox.c
@@ -7,7 +7,6 @@
#define LOG_CATEGORY UCLASS_CROS_EC
-#include <common.h>
#include <cros_ec.h>
#include <dm.h>
#include <ec_commands.h>
@@ -17,6 +16,7 @@
#include <os.h>
#include <u-boot/sha256.h>
#include <spi.h>
+#include <time.h>
#include <asm/malloc.h>
#include <asm/state.h>
#include <asm/sdl.h>
diff --git a/drivers/misc/cros_ec_spi.c b/drivers/misc/cros_ec_spi.c
index 591ff30..e86791c 100644
--- a/drivers/misc/cros_ec_spi.c
+++ b/drivers/misc/cros_ec_spi.c
@@ -12,12 +12,12 @@
* KBC.
*/
-#include <common.h>
#include <cros_ec.h>
#include <dm.h>
#include <errno.h>
#include <log.h>
#include <spi.h>
+#include <time.h>
int cros_ec_spi_packet(struct udevice *udev, int out_bytes, int in_bytes)
{
diff --git a/drivers/misc/ds4510.c b/drivers/misc/ds4510.c
index 9340596..302015e 100644
--- a/drivers/misc/ds4510.c
+++ b/drivers/misc/ds4510.c
@@ -8,7 +8,6 @@
* and 4 programmable non-volatile GPIO pins.
*/
-#include <common.h>
#include <i2c.h>
#include <command.h>
#include <linux/delay.h>
diff --git a/drivers/misc/esm_pmic.c b/drivers/misc/esm_pmic.c
index a518f75..1963c86 100644
--- a/drivers/misc/esm_pmic.c
+++ b/drivers/misc/esm_pmic.c
@@ -7,7 +7,6 @@
*
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <power/pmic.h>
diff --git a/drivers/misc/fs_loader.c b/drivers/misc/fs_loader.c
index 1ffc199..66803f4 100644
--- a/drivers/misc/fs_loader.c
+++ b/drivers/misc/fs_loader.c
@@ -6,7 +6,6 @@
#define LOG_CATEGORY UCLASS_FS_FIRMWARE_LOADER
-#include <common.h>
#include <dm.h>
#include <env.h>
#include <errno.h>
diff --git a/drivers/misc/fsl_devdis.c b/drivers/misc/fsl_devdis.c
index 179053a..2c3d234 100644
--- a/drivers/misc/fsl_devdis.c
+++ b/drivers/misc/fsl_devdis.c
@@ -3,7 +3,7 @@
* Copyright 2015 Freescale Semiconductor, Inc.
* Author: Zhuoyu Zhang <Zhuoyu.Zhang@freescale.com>
*/
-#include <common.h>
+#include <config.h>
#include <asm/io.h>
#include <asm/arch-ls102xa/immap_ls102xa.h>
#include <asm/arch-ls102xa/config.h>
diff --git a/drivers/misc/fsl_ifc.c b/drivers/misc/fsl_ifc.c
index f165b8c..93f41da 100644
--- a/drivers/misc/fsl_ifc.c
+++ b/drivers/misc/fsl_ifc.c
@@ -4,7 +4,7 @@
* Author: Dipen Dudhat <dipen.dudhat@freescale.com>
*/
-#include <common.h>
+#include <config.h>
#include <fsl_ifc.h>
#include <part.h>
diff --git a/drivers/misc/fsl_iim.c b/drivers/misc/fsl_iim.c
index 85cc3c2..65468a6 100644
--- a/drivers/misc/fsl_iim.c
+++ b/drivers/misc/fsl_iim.c
@@ -8,7 +8,6 @@
* Martha Marx <mmarx@silicontkx.com>
*/
-#include <common.h>
#include <fuse.h>
#include <linux/delay.h>
#include <linux/errno.h>
diff --git a/drivers/misc/fsl_portals.c b/drivers/misc/fsl_portals.c
index 6b83128..e7c0df7 100644
--- a/drivers/misc/fsl_portals.c
+++ b/drivers/misc/fsl_portals.c
@@ -4,7 +4,7 @@
* Copyright 2017 NXP
*/
-#include <common.h>
+#include <config.h>
#include <log.h>
#include <linux/libfdt.h>
#include <fdt_support.h>
diff --git a/drivers/misc/fsl_sec_mon.c b/drivers/misc/fsl_sec_mon.c
index 3597ee2..7518089 100644
--- a/drivers/misc/fsl_sec_mon.c
+++ b/drivers/misc/fsl_sec_mon.c
@@ -3,7 +3,7 @@
* Copyright 2015 Freescale Semiconductor, Inc.
*/
-#include <common.h>
+#include <config.h>
#include <fsl_sec_mon.h>
#include <linux/delay.h>
diff --git a/drivers/misc/gdsys_ioep.c b/drivers/misc/gdsys_ioep.c
index 145cfa2..d4916a2 100644
--- a/drivers/misc/gdsys_ioep.c
+++ b/drivers/misc/gdsys_ioep.c
@@ -11,7 +11,6 @@
* SPDX-License-Identifier: GPL-2.0+
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <misc.h>
diff --git a/drivers/misc/gdsys_rxaui_ctrl.c b/drivers/misc/gdsys_rxaui_ctrl.c
index 8f5cbe4..d4cd63c 100644
--- a/drivers/misc/gdsys_rxaui_ctrl.c
+++ b/drivers/misc/gdsys_rxaui_ctrl.c
@@ -7,7 +7,6 @@
* Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc
*/
-#include <common.h>
#include <dm.h>
#include <regmap.h>
#include <misc.h>
diff --git a/drivers/misc/gdsys_soc.c b/drivers/misc/gdsys_soc.c
index 27e7dc4..0adbb8d 100644
--- a/drivers/misc/gdsys_soc.c
+++ b/drivers/misc/gdsys_soc.c
@@ -4,7 +4,6 @@
* Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <dm/lists.h>
diff --git a/drivers/misc/gpio_led.c b/drivers/misc/gpio_led.c
index 30679f8..e636899 100644
--- a/drivers/misc/gpio_led.c
+++ b/drivers/misc/gpio_led.c
@@ -5,7 +5,6 @@
* Licensed under the GPL-2 or later.
*/
-#include <common.h>
#include <status_led.h>
#include <asm/gpio.h>
diff --git a/drivers/misc/i2c_eeprom.c b/drivers/misc/i2c_eeprom.c
index 9111bd7..10f0173 100644
--- a/drivers/misc/i2c_eeprom.c
+++ b/drivers/misc/i2c_eeprom.c
@@ -5,8 +5,6 @@
#define LOG_CATEGORY UCLASS_I2C_EEPROM
-#include <common.h>
-#include <eeprom.h>
#include <linux/delay.h>
#include <linux/err.h>
#include <linux/kernel.h>
diff --git a/drivers/misc/i2c_eeprom_emul.c b/drivers/misc/i2c_eeprom_emul.c
index 6f32087..3ad2e04 100644
--- a/drivers/misc/i2c_eeprom_emul.c
+++ b/drivers/misc/i2c_eeprom_emul.c
@@ -5,7 +5,6 @@
* Copyright (c) 2014 Google, Inc
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <i2c.h>
diff --git a/drivers/misc/ihs_fpga.c b/drivers/misc/ihs_fpga.c
index a0fece9..fe196b6 100644
--- a/drivers/misc/ihs_fpga.c
+++ b/drivers/misc/ihs_fpga.c
@@ -9,7 +9,6 @@
* Dirk Eibach, Guntermann & Drunck GmbH, eibach@gdsys.de
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <regmap.h>
diff --git a/drivers/misc/imx8/fuse.c b/drivers/misc/imx8/fuse.c
index b81f73f..90d251a 100644
--- a/drivers/misc/imx8/fuse.c
+++ b/drivers/misc/imx8/fuse.c
@@ -3,7 +3,6 @@
* Copyright 2019 NXP
*/
-#include <common.h>
#include <console.h>
#include <errno.h>
#include <fuse.h>
diff --git a/drivers/misc/imx8/scu.c b/drivers/misc/imx8/scu.c
index 798800a..bbd7e24 100644
--- a/drivers/misc/imx8/scu.c
+++ b/drivers/misc/imx8/scu.c
@@ -5,7 +5,6 @@
* Peng Fan <peng.fan@nxp.com>
*/
-#include <common.h>
#include <log.h>
#include <asm/global_data.h>
#include <asm/io.h>
diff --git a/drivers/misc/imx8/scu_api.c b/drivers/misc/imx8/scu_api.c
index 6e2c678..591d71b 100644
--- a/drivers/misc/imx8/scu_api.c
+++ b/drivers/misc/imx8/scu_api.c
@@ -5,7 +5,6 @@
* Peng Fan <peng.fan@nxp.com>
*/
-#include <common.h>
#include <hang.h>
#include <malloc.h>
#include <asm/global_data.h>
diff --git a/drivers/misc/imx_ele/ele_api.c b/drivers/misc/imx_ele/ele_api.c
index e0ec22c..3745504 100644
--- a/drivers/misc/imx_ele/ele_api.c
+++ b/drivers/misc/imx_ele/ele_api.c
@@ -4,7 +4,6 @@
*
*/
-#include <common.h>
#include <hang.h>
#include <malloc.h>
#include <asm/io.h>
diff --git a/drivers/misc/imx_ele/ele_mu.c b/drivers/misc/imx_ele/ele_mu.c
index 053cdcf..0cf81f3 100644
--- a/drivers/misc/imx_ele/ele_mu.c
+++ b/drivers/misc/imx_ele/ele_mu.c
@@ -3,7 +3,6 @@
* Copyright 2020-2022 NXP
*/
-#include <common.h>
#include <asm/io.h>
#include <dm.h>
#include <dm/lists.h>
diff --git a/drivers/misc/imx_ele/fuse.c b/drivers/misc/imx_ele/fuse.c
index 4e4dcb4..d12539c 100644
--- a/drivers/misc/imx_ele/fuse.c
+++ b/drivers/misc/imx_ele/fuse.c
@@ -3,7 +3,6 @@
* Copyright 2020 NXP
*/
-#include <common.h>
#include <console.h>
#include <errno.h>
#include <fuse.h>
diff --git a/drivers/misc/irq-uclass.c b/drivers/misc/irq-uclass.c
index 7b79ed2..79eb7c2 100644
--- a/drivers/misc/irq-uclass.c
+++ b/drivers/misc/irq-uclass.c
@@ -6,7 +6,6 @@
#define LOG_CATEGORY UCLASS_IRQ
-#include <common.h>
#include <dm.h>
#include <dt-structs.h>
#include <irq.h>
diff --git a/drivers/misc/irq_sandbox.c b/drivers/misc/irq_sandbox.c
index 8b5573f..5d176f6 100644
--- a/drivers/misc/irq_sandbox.c
+++ b/drivers/misc/irq_sandbox.c
@@ -5,7 +5,6 @@
* Copyright 2019 Google LLC
*/
-#include <common.h>
#include <dm.h>
#include <irq.h>
#include <acpi/acpi_device.h>
diff --git a/drivers/misc/irq_sandbox_test.c b/drivers/misc/irq_sandbox_test.c
index 95c45c2..3669b86 100644
--- a/drivers/misc/irq_sandbox_test.c
+++ b/drivers/misc/irq_sandbox_test.c
@@ -5,7 +5,6 @@
* Copyright 2021 Google LLC
*/
-#include <common.h>
#include <dm.h>
#include <irq.h>
#include <asm/irq.h>
diff --git a/drivers/misc/jz4780_efuse.c b/drivers/misc/jz4780_efuse.c
index 1fba327..5c92de2 100644
--- a/drivers/misc/jz4780_efuse.c
+++ b/drivers/misc/jz4780_efuse.c
@@ -6,7 +6,6 @@
* Author: Alex Smith <alex.smith@imgtec.com>
*/
-#include <common.h>
#include <asm/io.h>
#include <asm/unaligned.h>
#include <errno.h>
diff --git a/drivers/misc/k3_avs.c b/drivers/misc/k3_avs.c
index 0d29eff..87471cc 100644
--- a/drivers/misc/k3_avs.c
+++ b/drivers/misc/k3_avs.c
@@ -7,7 +7,6 @@
*
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <asm/io.h>
diff --git a/drivers/misc/k3_esm.c b/drivers/misc/k3_esm.c
index f6ac18b..fa3d656 100644
--- a/drivers/misc/k3_esm.c
+++ b/drivers/misc/k3_esm.c
@@ -7,7 +7,6 @@
*
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <asm/io.h>
diff --git a/drivers/misc/ls2_sfp.c b/drivers/misc/ls2_sfp.c
index 5351c7e..8cb6e99 100644
--- a/drivers/misc/ls2_sfp.c
+++ b/drivers/misc/ls2_sfp.c
@@ -12,7 +12,6 @@
*/
#define LOG_CATEGORY UCLASS_MISC
-#include <common.h>
#include <clk.h>
#include <fuse.h>
#include <misc.h>
diff --git a/drivers/misc/microchip_flexcom.c b/drivers/misc/microchip_flexcom.c
index e0a6f2d..c5ddeca 100644
--- a/drivers/misc/microchip_flexcom.c
+++ b/drivers/misc/microchip_flexcom.c
@@ -4,7 +4,6 @@
* Author: Eugen Hristev <eugen.hristev@microchip.com>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <log.h>
diff --git a/drivers/misc/misc-uclass.c b/drivers/misc/misc-uclass.c
index cfe9d56..1389e14 100644
--- a/drivers/misc/misc-uclass.c
+++ b/drivers/misc/misc-uclass.c
@@ -5,7 +5,6 @@
#define LOG_CATEGORY UCLASS_MISC
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <misc.h>
diff --git a/drivers/misc/misc_sandbox.c b/drivers/misc/misc_sandbox.c
index 31cde2d..2473419 100644
--- a/drivers/misc/misc_sandbox.c
+++ b/drivers/misc/misc_sandbox.c
@@ -4,7 +4,6 @@
* Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc
*/
-#include <common.h>
#include <dm.h>
#include <misc.h>
diff --git a/drivers/misc/mpc83xx_serdes.c b/drivers/misc/mpc83xx_serdes.c
index 93c87e9..cf9aa9b 100644
--- a/drivers/misc/mpc83xx_serdes.c
+++ b/drivers/misc/mpc83xx_serdes.c
@@ -9,7 +9,6 @@
* Copyright (C) 2008 MontaVista Software, Inc.
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <mapmem.h>
diff --git a/drivers/misc/mxc_ocotp.c b/drivers/misc/mxc_ocotp.c
index 8ee18f2..d1674ca 100644
--- a/drivers/misc/mxc_ocotp.c
+++ b/drivers/misc/mxc_ocotp.c
@@ -11,7 +11,6 @@
* Copyright (C) 2011 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <fuse.h>
#include <linux/delay.h>
#include <linux/errno.h>
diff --git a/drivers/misc/mxs_ocotp.c b/drivers/misc/mxs_ocotp.c
index facc720..6432c62 100644
--- a/drivers/misc/mxs_ocotp.c
+++ b/drivers/misc/mxs_ocotp.c
@@ -11,7 +11,6 @@
* etc.) which would make common driver an ifdef nightmare :-(
*/
-#include <common.h>
#include <fuse.h>
#include <linux/delay.h>
#include <linux/errno.h>
diff --git a/drivers/misc/npcm_host_intf.c b/drivers/misc/npcm_host_intf.c
index 79f57f5..58bab88 100644
--- a/drivers/misc/npcm_host_intf.c
+++ b/drivers/misc/npcm_host_intf.c
@@ -4,7 +4,6 @@
* Copyright (c) 2022 Nuvoton Technology Corp.
*/
-#include <common.h>
#include <dm.h>
#include <regmap.h>
#include <syscon.h>
diff --git a/drivers/misc/npcm_otp.c b/drivers/misc/npcm_otp.c
index 0802972..adb6135 100644
--- a/drivers/misc/npcm_otp.c
+++ b/drivers/misc/npcm_otp.c
@@ -4,7 +4,6 @@
*/
#include <clk.h>
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <fuse.h>
diff --git a/drivers/misc/nuvoton_nct6102d.c b/drivers/misc/nuvoton_nct6102d.c
index daf5019..a3ca037 100644
--- a/drivers/misc/nuvoton_nct6102d.c
+++ b/drivers/misc/nuvoton_nct6102d.c
@@ -3,7 +3,6 @@
* Copyright (C) 2016 Stefan Roese <sr@denx.de>
*/
-#include <common.h>
#include <nuvoton_nct6102d.h>
#include <asm/io.h>
#include <asm/pnp_def.h>
diff --git a/drivers/misc/nvmem.c b/drivers/misc/nvmem.c
index 5a2bd1f..d0cb0a3 100644
--- a/drivers/misc/nvmem.c
+++ b/drivers/misc/nvmem.c
@@ -3,7 +3,6 @@
* Copyright (C) 2022 Sean Anderson <sean.anderson@seco.com>
*/
-#include <common.h>
#include <i2c_eeprom.h>
#include <linker_lists.h>
#include <misc.h>
diff --git a/drivers/misc/p2sb-uclass.c b/drivers/misc/p2sb-uclass.c
index f24857a..016c807 100644
--- a/drivers/misc/p2sb-uclass.c
+++ b/drivers/misc/p2sb-uclass.c
@@ -8,7 +8,6 @@
#define LOG_CATEGORY UCLASS_P2SB
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <malloc.h>
diff --git a/drivers/misc/p2sb_emul.c b/drivers/misc/p2sb_emul.c
index 51f8716..3dac6bd 100644
--- a/drivers/misc/p2sb_emul.c
+++ b/drivers/misc/p2sb_emul.c
@@ -8,7 +8,6 @@
#define LOG_CATEGORY UCLASS_MISC
-#include <common.h>
#include <axi.h>
#include <dm.h>
#include <log.h>
diff --git a/drivers/misc/p2sb_sandbox.c b/drivers/misc/p2sb_sandbox.c
index d80bca2..9f3cd14 100644
--- a/drivers/misc/p2sb_sandbox.c
+++ b/drivers/misc/p2sb_sandbox.c
@@ -7,7 +7,6 @@
#define LOG_CATEGORY UCLASS_P2SB
-#include <common.h>
#include <dm.h>
#include <asm/io.h>
#include <p2sb.h>
diff --git a/drivers/misc/pca9551_led.c b/drivers/misc/pca9551_led.c
index cdc4390..040d0d5 100644
--- a/drivers/misc/pca9551_led.c
+++ b/drivers/misc/pca9551_led.c
@@ -3,7 +3,6 @@
* Copyright (C) 2015 Stefan Roese <sr@denx.de>
*/
-#include <common.h>
#include <errno.h>
#include <i2c.h>
#include <status_led.h>
diff --git a/drivers/misc/pwrseq-uclass.c b/drivers/misc/pwrseq-uclass.c
index a0f24e1..bddc3c3 100644
--- a/drivers/misc/pwrseq-uclass.c
+++ b/drivers/misc/pwrseq-uclass.c
@@ -5,7 +5,6 @@
#define LOG_CATEGORY UCLASS_PWRSEQ
-#include <common.h>
#include <dm.h>
#include <pwrseq.h>
diff --git a/drivers/misc/qfw.c b/drivers/misc/qfw.c
index db98619..0e002ac 100644
--- a/drivers/misc/qfw.c
+++ b/drivers/misc/qfw.c
@@ -6,7 +6,6 @@
#define LOG_CATEGORY UCLASS_QFW
-#include <common.h>
#include <acpi/acpi_table.h>
#include <bootdev.h>
#include <bootflow.h>
diff --git a/drivers/misc/rockchip-efuse.c b/drivers/misc/rockchip-efuse.c
index 2f96b79..c743014 100644
--- a/drivers/misc/rockchip-efuse.c
+++ b/drivers/misc/rockchip-efuse.c
@@ -6,7 +6,6 @@
* Written by Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
*/
-#include <common.h>
#include <asm/io.h>
#include <command.h>
#include <display_options.h>
diff --git a/drivers/misc/rockchip-io-domain.c b/drivers/misc/rockchip-io-domain.c
index 0ffea32..04d4d07 100644
--- a/drivers/misc/rockchip-io-domain.c
+++ b/drivers/misc/rockchip-io-domain.c
@@ -27,6 +27,10 @@
#define MAX_VOLTAGE_1_8 1980000
#define MAX_VOLTAGE_3_3 3600000
+#define RK3328_SOC_CON4 0x410
+#define RK3328_SOC_CON4_VCCIO2 BIT(7)
+#define RK3328_SOC_VCCIO2_SUPPLY_NUM 1
+
#define RK3399_PMUGRF_CON0 0x180
#define RK3399_PMUGRF_CON0_VSEL BIT(8)
#define RK3399_PMUGRF_VSEL_SUPPLY_NUM 9
@@ -95,6 +99,22 @@
return regmap_write(grf, offset, val);
}
+static int rk3328_iodomain_write(struct regmap *grf, uint offset, int idx, int uV)
+{
+ int ret = rockchip_iodomain_write(grf, offset, idx, uV);
+
+ if (!ret && idx == RK3328_SOC_VCCIO2_SUPPLY_NUM) {
+ /*
+ * set vccio2 iodomain to also use this framework
+ * instead of a special gpio.
+ */
+ u32 val = RK3328_SOC_CON4_VCCIO2 | (RK3328_SOC_CON4_VCCIO2 << 16);
+ ret = regmap_write(grf, RK3328_SOC_CON4, val);
+ }
+
+ return ret;
+}
+
static int rk3399_pmu_iodomain_write(struct regmap *grf, uint offset, int idx, int uV)
{
int ret = rockchip_iodomain_write(grf, offset, idx, uV);
@@ -111,6 +131,20 @@
return ret;
}
+static const struct rockchip_iodomain_soc_data soc_data_rk3328 = {
+ .grf_offset = 0x410,
+ .supply_names = {
+ "vccio1-supply",
+ "vccio2-supply",
+ "vccio3-supply",
+ "vccio4-supply",
+ "vccio5-supply",
+ "vccio6-supply",
+ "pmuio-supply",
+ },
+ .write = rk3328_iodomain_write,
+};
+
static const struct rockchip_iodomain_soc_data soc_data_rk3399 = {
.grf_offset = 0xe640,
.supply_names = {
@@ -157,6 +191,10 @@
static const struct udevice_id rockchip_iodomain_ids[] = {
{
+ .compatible = "rockchip,rk3328-io-voltage-domain",
+ .data = (ulong)&soc_data_rk3328,
+ },
+ {
.compatible = "rockchip,rk3399-io-voltage-domain",
.data = (ulong)&soc_data_rk3399,
},
diff --git a/drivers/misc/rockchip-otp.c b/drivers/misc/rockchip-otp.c
index 4f75708..2123c31 100644
--- a/drivers/misc/rockchip-otp.c
+++ b/drivers/misc/rockchip-otp.c
@@ -3,7 +3,6 @@
* Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
*/
-#include <common.h>
#include <asm/io.h>
#include <command.h>
#include <display_options.h>
diff --git a/drivers/misc/sandbox_adder.c b/drivers/misc/sandbox_adder.c
index 3ea33e4..de1c635 100644
--- a/drivers/misc/sandbox_adder.c
+++ b/drivers/misc/sandbox_adder.c
@@ -7,7 +7,6 @@
#define LOG_CATEGORY UCLASS_MISC
-#include <common.h>
#include <axi.h>
#include <dm.h>
#include <misc.h>
diff --git a/drivers/misc/sifive-otp.c b/drivers/misc/sifive-otp.c
index a624a35..7fbcd37 100644
--- a/drivers/misc/sifive-otp.c
+++ b/drivers/misc/sifive-otp.c
@@ -17,7 +17,6 @@
* Right now first 1KiB is used to store only serial number.
*/
-#include <common.h>
#include <dm/device.h>
#include <dm/read.h>
#include <linux/bitops.h>
diff --git a/drivers/misc/sl28cpld.c b/drivers/misc/sl28cpld.c
index 01ef1c6..1c61b00 100644
--- a/drivers/misc/sl28cpld.c
+++ b/drivers/misc/sl28cpld.c
@@ -3,7 +3,6 @@
* Copyright (c) 2021 Michael Walle <michael@walle.cc>
*/
-#include <common.h>
#include <dm.h>
#include <i2c.h>
diff --git a/drivers/misc/smsc_lpc47m.c b/drivers/misc/smsc_lpc47m.c
index bda064f..1b15907 100644
--- a/drivers/misc/smsc_lpc47m.c
+++ b/drivers/misc/smsc_lpc47m.c
@@ -3,7 +3,6 @@
* Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
*/
-#include <common.h>
#include <asm/io.h>
#include <asm/pnp_def.h>
diff --git a/drivers/misc/smsc_sio1007.c b/drivers/misc/smsc_sio1007.c
index 3b7b1c8..6d99aa6 100644
--- a/drivers/misc/smsc_sio1007.c
+++ b/drivers/misc/smsc_sio1007.c
@@ -3,7 +3,6 @@
* Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
*/
-#include <common.h>
#include <asm/io.h>
#include <errno.h>
#include <smsc_sio1007.h>
diff --git a/drivers/misc/spltest_sandbox.c b/drivers/misc/spltest_sandbox.c
index 6b9701a..3011a22 100644
--- a/drivers/misc/spltest_sandbox.c
+++ b/drivers/misc/spltest_sandbox.c
@@ -4,7 +4,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <dm.h>
#include <dt-structs.h>
diff --git a/drivers/misc/status_led.c b/drivers/misc/status_led.c
index a6e9c03..3b1baa4 100644
--- a/drivers/misc/status_led.c
+++ b/drivers/misc/status_led.c
@@ -4,8 +4,8 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
#include <status_led.h>
+#include <linux/types.h>
/*
* The purpose of this code is to signal the operational status of a
diff --git a/drivers/misc/stm32_rcc.c b/drivers/misc/stm32_rcc.c
index c1e5428..0dd827e 100644
--- a/drivers/misc/stm32_rcc.c
+++ b/drivers/misc/stm32_rcc.c
@@ -6,7 +6,6 @@
#define LOG_CATEGORY UCLASS_NOP
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <misc.h>
diff --git a/drivers/misc/stm32mp_fuse.c b/drivers/misc/stm32mp_fuse.c
index 9fd6c36..34be6c2 100644
--- a/drivers/misc/stm32mp_fuse.c
+++ b/drivers/misc/stm32mp_fuse.c
@@ -3,7 +3,6 @@
* Copyright (C) 2018, STMicroelectronics - All Rights Reserved
*/
-#include <common.h>
#include <command.h>
#include <fuse.h>
#include <misc.h>
diff --git a/drivers/misc/swap_case.c b/drivers/misc/swap_case.c
index ee5c12b..d4a5620 100644
--- a/drivers/misc/swap_case.c
+++ b/drivers/misc/swap_case.c
@@ -6,7 +6,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <log.h>
diff --git a/drivers/misc/syscon_sandbox.c b/drivers/misc/syscon_sandbox.c
index d5cef188..6adb415 100644
--- a/drivers/misc/syscon_sandbox.c
+++ b/drivers/misc/syscon_sandbox.c
@@ -4,7 +4,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <syscon.h>
diff --git a/drivers/misc/tegra186_bpmp.c b/drivers/misc/tegra186_bpmp.c
index fecac9c..a1585b8 100644
--- a/drivers/misc/tegra186_bpmp.c
+++ b/drivers/misc/tegra186_bpmp.c
@@ -3,7 +3,6 @@
* Copyright (c) 2016, NVIDIA CORPORATION.
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <malloc.h>
diff --git a/drivers/misc/tegra_car.c b/drivers/misc/tegra_car.c
index 0ddbb3c..497ec18 100644
--- a/drivers/misc/tegra_car.c
+++ b/drivers/misc/tegra_car.c
@@ -3,7 +3,6 @@
* Copyright (c) 2016, NVIDIA CORPORATION.
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <dm/lists.h>
diff --git a/drivers/misc/test_drv.c b/drivers/misc/test_drv.c
index 9276182..9b1e357 100644
--- a/drivers/misc/test_drv.c
+++ b/drivers/misc/test_drv.c
@@ -3,7 +3,6 @@
* Copyright (c) 2014 Google, Inc
*/
-#include <common.h>
#include <dm.h>
#include <dm/test.h>
#include <asm/global_data.h>
diff --git a/drivers/misc/turris_omnia_mcu.c b/drivers/misc/turris_omnia_mcu.c
new file mode 100644
index 0000000..be77acb
--- /dev/null
+++ b/drivers/misc/turris_omnia_mcu.c
@@ -0,0 +1,410 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2022 Pali Rohár <pali@kernel.org>
+ * Copyright (C) 2024 Marek Behún <kabel@kernel.org>
+ */
+
+#include <console.h>
+#include <dm.h>
+#include <dm/lists.h>
+#include <i2c.h>
+#include <rng.h>
+#include <sysreset.h>
+#include <turris-omnia-mcu-interface.h>
+#include <asm/byteorder.h>
+#include <asm/gpio.h>
+#include <linux/delay.h>
+#include <linux/log2.h>
+
+#define CMD_TRNG_MAX_ENTROPY_LEN 64
+
+struct turris_omnia_mcu_info {
+ u32 features;
+};
+
+static int omnia_gpio_get_function(struct udevice *dev, uint offset)
+{
+ struct turris_omnia_mcu_info *info = dev_get_priv(dev->parent);
+
+ switch (offset) {
+ /* bank 0 */
+ case 0 ... 15:
+ switch (offset) {
+ case ilog2(STS_USB30_PWRON):
+ case ilog2(STS_USB31_PWRON):
+ case ilog2(STS_ENABLE_4V5):
+ case ilog2(STS_BUTTON_MODE):
+ return GPIOF_OUTPUT;
+ default:
+ return GPIOF_INPUT;
+ }
+
+ /* bank 1 - supported only when FEAT_EXT_CMDS is set */
+ case (16 + 0) ... (16 + 31):
+ if (!(info->features & FEAT_EXT_CMDS))
+ return -EINVAL;
+ return GPIOF_INPUT;
+
+ /* bank 2 - supported only when FEAT_EXT_CMDS and FEAT_PERIPH_MCU is set */
+ case (16 + 32 + 0) ... (16 + 32 + 15):
+ if (!(info->features & FEAT_EXT_CMDS))
+ return -EINVAL;
+ if (!(info->features & FEAT_PERIPH_MCU))
+ return -EINVAL;
+ return GPIOF_OUTPUT;
+
+ default:
+ return -EINVAL;
+ }
+}
+
+static int omnia_gpio_get_value(struct udevice *dev, uint offset)
+{
+ struct turris_omnia_mcu_info *info = dev_get_priv(dev->parent);
+ u32 val32;
+ u16 val16;
+ int ret;
+
+ switch (offset) {
+ /* bank 0 */
+ case 0 ... 15:
+ ret = dm_i2c_read(dev->parent, CMD_GET_STATUS_WORD,
+ (void *)&val16, sizeof(val16));
+ if (ret)
+ return ret;
+
+ return !!(le16_to_cpu(val16) & BIT(offset));
+
+ /* bank 1 - supported only when FEAT_EXT_CMDS is set */
+ case (16 + 0) ... (16 + 31):
+ if (!(info->features & FEAT_EXT_CMDS))
+ return -EINVAL;
+
+ ret = dm_i2c_read(dev->parent, CMD_GET_EXT_STATUS_DWORD,
+ (void *)&val32, sizeof(val32));
+ if (ret)
+ return ret;
+
+ return !!(le32_to_cpu(val32) & BIT(offset - 16));
+
+ /* bank 2 - supported only when FEAT_EXT_CMDS and FEAT_PERIPH_MCU is set */
+ case (16 + 32 + 0) ... (16 + 32 + 15):
+ if (!(info->features & FEAT_EXT_CMDS))
+ return -EINVAL;
+ if (!(info->features & FEAT_PERIPH_MCU))
+ return -EINVAL;
+
+ ret = dm_i2c_read(dev->parent, CMD_GET_EXT_CONTROL_STATUS,
+ (void *)&val16, sizeof(val16));
+ if (ret)
+ return ret;
+
+ return !!(le16_to_cpu(val16) & BIT(offset - 16 - 32));
+
+ default:
+ return -EINVAL;
+ }
+}
+
+static int omnia_gpio_set_value(struct udevice *dev, uint offset, int value)
+{
+ struct turris_omnia_mcu_info *info = dev_get_priv(dev->parent);
+ u16 valmask16[2];
+ u8 valmask8[2];
+
+ switch (offset) {
+ /* bank 0 */
+ case 0 ... 15:
+ switch (offset) {
+ case ilog2(STS_USB30_PWRON):
+ valmask8[1] = CTL_USB30_PWRON;
+ break;
+ case ilog2(STS_USB31_PWRON):
+ valmask8[1] = CTL_USB31_PWRON;
+ break;
+ case ilog2(STS_ENABLE_4V5):
+ valmask8[1] = CTL_ENABLE_4V5;
+ break;
+ case ilog2(STS_BUTTON_MODE):
+ valmask8[1] = CTL_BUTTON_MODE;
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ valmask8[0] = value ? valmask8[1] : 0;
+
+ return dm_i2c_write(dev->parent, CMD_GENERAL_CONTROL, valmask8,
+ sizeof(valmask8));
+
+ /* bank 2 - supported only when FEAT_EXT_CMDS and FEAT_PERIPH_MCU is set */
+ case (16 + 32 + 0) ... (16 + 32 + 15):
+ if (!(info->features & FEAT_EXT_CMDS))
+ return -EINVAL;
+ if (!(info->features & FEAT_PERIPH_MCU))
+ return -EINVAL;
+
+ valmask16[1] = cpu_to_le16(BIT(offset - 16 - 32));
+ valmask16[0] = value ? valmask16[1] : 0;
+
+ return dm_i2c_write(dev->parent, CMD_EXT_CONTROL,
+ (void *)valmask16, sizeof(valmask16));
+
+ default:
+ return -EINVAL;
+ }
+}
+
+static int omnia_gpio_direction_input(struct udevice *dev, uint offset)
+{
+ int ret;
+
+ ret = omnia_gpio_get_function(dev, offset);
+ if (ret < 0)
+ return ret;
+ else if (ret != GPIOF_INPUT)
+ return -EOPNOTSUPP;
+
+ return 0;
+}
+
+static int omnia_gpio_direction_output(struct udevice *dev, uint offset, int value)
+{
+ int ret;
+
+ ret = omnia_gpio_get_function(dev, offset);
+ if (ret < 0)
+ return ret;
+ else if (ret != GPIOF_OUTPUT)
+ return -EOPNOTSUPP;
+
+ return omnia_gpio_set_value(dev, offset, value);
+}
+
+static int omnia_gpio_xlate(struct udevice *dev, struct gpio_desc *desc,
+ struct ofnode_phandle_args *args)
+{
+ uint bank, gpio, flags, offset;
+ int ret;
+
+ if (args->args_count != 3)
+ return -EINVAL;
+
+ bank = args->args[0];
+ gpio = args->args[1];
+ flags = args->args[2];
+
+ switch (bank) {
+ case 0:
+ if (gpio >= 16)
+ return -EINVAL;
+ offset = gpio;
+ break;
+ case 1:
+ if (gpio >= 32)
+ return -EINVAL;
+ offset = 16 + gpio;
+ break;
+ case 2:
+ if (gpio >= 16)
+ return -EINVAL;
+ offset = 16 + 32 + gpio;
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ ret = omnia_gpio_get_function(dev, offset);
+ if (ret < 0)
+ return ret;
+
+ desc->offset = offset;
+ desc->flags = gpio_flags_xlate(flags);
+
+ return 0;
+}
+
+static const struct dm_gpio_ops omnia_gpio_ops = {
+ .direction_input = omnia_gpio_direction_input,
+ .direction_output = omnia_gpio_direction_output,
+ .get_value = omnia_gpio_get_value,
+ .set_value = omnia_gpio_set_value,
+ .get_function = omnia_gpio_get_function,
+ .xlate = omnia_gpio_xlate,
+};
+
+static int omnia_gpio_probe(struct udevice *dev)
+{
+ struct turris_omnia_mcu_info *info = dev_get_priv(dev->parent);
+ struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
+
+ uc_priv->bank_name = "mcu_";
+
+ if ((info->features & FEAT_EXT_CMDS) && (info->features & FEAT_PERIPH_MCU))
+ uc_priv->gpio_count = 16 + 32 + 16;
+ else if (info->features & FEAT_EXT_CMDS)
+ uc_priv->gpio_count = 16 + 32;
+ else
+ uc_priv->gpio_count = 16;
+
+ return 0;
+}
+
+U_BOOT_DRIVER(turris_omnia_mcu_gpio) = {
+ .name = "turris-omnia-mcu-gpio",
+ .id = UCLASS_GPIO,
+ .ops = &omnia_gpio_ops,
+ .probe = omnia_gpio_probe,
+};
+
+static int omnia_sysreset_request(struct udevice *dev, enum sysreset_t type)
+{
+ struct {
+ u16 magic;
+ u16 arg;
+ u32 csum;
+ } __packed args;
+
+ if (type != SYSRESET_POWER_OFF)
+ return -EPROTONOSUPPORT;
+
+ args.magic = CMD_POWER_OFF_MAGIC;
+ args.arg = CMD_POWER_OFF_POWERON_BUTTON;
+ args.csum = 0xba3b7212;
+
+ return dm_i2c_write(dev->parent, CMD_POWER_OFF, (void *)&args,
+ sizeof(args));
+}
+
+static const struct sysreset_ops omnia_sysreset_ops = {
+ .request = omnia_sysreset_request,
+};
+
+U_BOOT_DRIVER(turris_omnia_mcu_sysreset) = {
+ .name = "turris-omnia-mcu-sysreset",
+ .id = UCLASS_SYSRESET,
+ .ops = &omnia_sysreset_ops,
+};
+
+static int omnia_rng_read(struct udevice *dev, void *data, size_t count)
+{
+ u8 buf[1 + CMD_TRNG_MAX_ENTROPY_LEN];
+ size_t len;
+ int ret;
+
+ while (count) {
+ ret = dm_i2c_read(dev->parent, CMD_TRNG_COLLECT_ENTROPY, buf,
+ sizeof(buf));
+ if (ret)
+ return ret;
+
+ len = min_t(size_t, buf[0],
+ min_t(size_t, CMD_TRNG_MAX_ENTROPY_LEN, count));
+
+ if (!len) {
+ /* wait 500ms (fail if interrupted), then try again */
+ for (int i = 0; i < 5; ++i) {
+ mdelay(100);
+ if (ctrlc())
+ return -EINTR;
+ }
+ continue;
+ }
+
+ memcpy(data, &buf[1], len);
+ data += len;
+ count -= len;
+ }
+
+ return 0;
+}
+
+static const struct dm_rng_ops omnia_rng_ops = {
+ .read = omnia_rng_read,
+};
+
+U_BOOT_DRIVER(turris_omnia_mcu_trng) = {
+ .name = "turris-omnia-mcu-trng",
+ .id = UCLASS_RNG,
+ .ops = &omnia_rng_ops,
+};
+
+static int turris_omnia_mcu_bind(struct udevice *dev)
+{
+ /* bind MCU GPIOs as a child device */
+ return device_bind_driver_to_node(dev, "turris-omnia-mcu-gpio",
+ "turris-omnia-mcu-gpio",
+ dev_ofnode(dev), NULL);
+}
+
+static int turris_omnia_mcu_probe(struct udevice *dev)
+{
+ struct turris_omnia_mcu_info *info = dev_get_priv(dev);
+ u32 dword;
+ u16 word;
+ int ret;
+
+ ret = dm_i2c_read(dev, CMD_GET_STATUS_WORD, (void *)&word, sizeof(word));
+ if (ret < 0) {
+ printf("Error: turris_omnia_mcu CMD_GET_STATUS_WORD failed: %d\n",
+ ret);
+ return ret;
+ }
+
+ if (le16_to_cpu(word) & STS_FEATURES_SUPPORTED) {
+ /* try read 32-bit features */
+ ret = dm_i2c_read(dev, CMD_GET_FEATURES, (void *)&dword,
+ sizeof(dword));
+ if (ret < 0) {
+ /* try read 16-bit features */
+ ret = dm_i2c_read(dev, CMD_GET_FEATURES, (void *)&word,
+ sizeof(word));
+ if (ret < 0) {
+ printf("Error: turris_omnia_mcu CMD_GET_FEATURES failed: %d\n",
+ ret);
+ return ret;
+ }
+
+ info->features = le16_to_cpu(word);
+ } else {
+ info->features = le32_to_cpu(dword);
+ if (info->features & FEAT_FROM_BIT_16_INVALID)
+ info->features &= GENMASK(15, 0);
+ }
+ }
+
+ /* bind sysreset if poweroff is supported */
+ if (info->features & FEAT_POWEROFF_WAKEUP) {
+ ret = device_bind_driver_to_node(dev,
+ "turris-omnia-mcu-sysreset",
+ "turris-omnia-mcu-sysreset",
+ dev_ofnode(dev), NULL);
+ if (ret < 0)
+ return ret;
+ }
+
+ /* bind rng if trng is supported */
+ if (info->features & FEAT_TRNG) {
+ ret = device_bind_driver_to_node(dev, "turris-omnia-mcu-trng",
+ "turris-omnia-mcu-trng",
+ dev_ofnode(dev), NULL);
+ if (ret < 0)
+ return ret;
+ }
+
+ return 0;
+}
+
+static const struct udevice_id turris_omnia_mcu_ids[] = {
+ { .compatible = "cznic,turris-omnia-mcu" },
+ { }
+};
+
+U_BOOT_DRIVER(turris_omnia_mcu) = {
+ .name = "turris-omnia-mcu",
+ .id = UCLASS_MISC,
+ .bind = turris_omnia_mcu_bind,
+ .probe = turris_omnia_mcu_probe,
+ .priv_auto = sizeof(struct turris_omnia_mcu_info),
+ .of_match = turris_omnia_mcu_ids,
+};
diff --git a/drivers/misc/usb251xb.c b/drivers/misc/usb251xb.c
index 92e92ba..daba2c2 100644
--- a/drivers/misc/usb251xb.c
+++ b/drivers/misc/usb251xb.c
@@ -10,7 +10,6 @@
* https://patchwork.kernel.org/patch/9257715/
*/
-#include <common.h>
#include <asm/gpio.h>
#include <dm.h>
#include <dm/device_compat.h>
diff --git a/drivers/misc/vexpress_config.c b/drivers/misc/vexpress_config.c
index 99aad14..e7655ce 100644
--- a/drivers/misc/vexpress_config.c
+++ b/drivers/misc/vexpress_config.c
@@ -4,7 +4,6 @@
* Author: Liviu Dudau <liviu.dudau@foss.arm.com>
*
*/
-#include <common.h>
#include <dm.h>
#include <malloc.h>
#include <dm/read.h>
diff --git a/drivers/misc/winbond_w83627.c b/drivers/misc/winbond_w83627.c
index 3838b3f..87b9043 100644
--- a/drivers/misc/winbond_w83627.c
+++ b/drivers/misc/winbond_w83627.c
@@ -3,7 +3,6 @@
* Copyright (C) 2016 Stefan Roese <sr@denx.de>
*/
-#include <common.h>
#include <asm/io.h>
#include <asm/pnp_def.h>
diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
index cef0579..d094479 100644
--- a/drivers/mmc/Kconfig
+++ b/drivers/mmc/Kconfig
@@ -20,11 +20,19 @@
config MMC_PWRSEQ
bool "HW reset support for eMMC"
- depends on PWRSEQ
+ depends on PWRSEQ && DM_GPIO
help
- Ths select Hardware reset support aka pwrseq-emmc for eMMC
+ This select Hardware reset support aka pwrseq-emmc for eMMC
devices.
+config SPL_MMC_PWRSEQ
+ bool "HW reset support for eMMC in SPL"
+ depends on SPL_PWRSEQ && SPL_DM_GPIO
+ default y if MMC_PWRSEQ
+ help
+ This select Hardware reset support aka pwrseq-emmc for eMMC
+ devices in SPL.
+
config MMC_BROKEN_CD
bool "Poll for broken card detection case"
help
@@ -79,11 +87,12 @@
config ARM_PL180_MMCI
bool "ARM AMBA Multimedia Card Interface and compatible support"
+ depends on DM_MMC
help
This selects the ARM(R) AMBA(R) PrimeCell Multimedia Card
Interface (PL180, PL181 and compatible) support.
If you have an ARM(R) platform with a Multimedia Card slot,
- say Y or M here.
+ say Y here.
config MMC_QUIRKS
bool "Enable quirks"
@@ -138,9 +147,16 @@
support. For eMMC this not mandatory, but not enabling this option may
prevent the driver of using the faster modes.
+config MMC_SUPPORTS_TUNING
+ bool
+
+config SPL_MMC_SUPPORTS_TUNING
+ bool
+
config MMC_UHS_SUPPORT
bool "enable UHS support"
depends on MMC_IO_VOLTAGE
+ select MMC_SUPPORTS_TUNING
help
The Ultra High Speed (UHS) bus is available on some SDHC and SDXC
cards. The IO voltage must be switchable from 3.3v to 1.8v. The bus
@@ -149,6 +165,7 @@
config SPL_MMC_UHS_SUPPORT
bool "enable UHS support in SPL"
depends on SPL_MMC_IO_VOLTAGE
+ select SPL_MMC_SUPPORTS_TUNING
help
The Ultra High Speed (UHS) bus is available on some SDHC and SDXC
cards. The IO voltage must be switchable from 3.3v to 1.8v. The bus
@@ -184,6 +201,7 @@
config MMC_HS200_SUPPORT
bool "enable HS200 support"
+ select MMC_SUPPORTS_TUNING
help
The HS200 mode is support by some eMMC. The bus frequency is up to
200MHz. This mode requires tuning the IO.
@@ -191,6 +209,7 @@
config SPL_MMC_HS200_SUPPORT
bool "enable HS200 support in SPL"
depends on SPL_MMC
+ select SPL_MMC_SUPPORTS_TUNING
help
The HS200 mode is support by some eMMC. The bus frequency is up to
200MHz. This mode requires tuning the IO.
@@ -338,6 +357,7 @@
bool "Marvell Octeon Multimedia Card Interface support"
depends on (ARCH_OCTEON || ARCH_OCTEONTX || ARCH_OCTEONTX2)
depends on DM_MMC
+ select MMC_SUPPORTS_TUNING if ARCH_OCTEONTX2
help
This selects the Octeon Multimedia card Interface.
If you have an OcteonTX/TX2 or MIPS Octeon board with a
@@ -495,6 +515,24 @@
This enables support for the ADMA (Advanced DMA) defined
in the SD Host Controller Standard Specification Version 3.00 in SPL.
+config MMC_SDHCI_ADMA_FORCE_32BIT
+ bool "Force 32 bit mode for ADMA on 64 bit platforms"
+ help
+ This forces SDHCI ADMA to be built for 32 bit descriptors, even
+ on a 64 bit platform where they would otherwise be assumed to
+ be 64 bits. This is necessary for certain hardware platforms
+ that are 64-bit but include only 32-bit support within the selected
+ SD host controller IP.
+
+config MMC_SDHCI_ADMA_64BIT
+ bool "Use SHDCI ADMA with 64 bit descriptors"
+ depends on !MMC_SDHCI_ADMA_FORCE_32BIT
+ default y if DMA_ADDR_T_64BIT
+ help
+ This selects 64 bit descriptors for SDHCI ADMA. It is enabled by
+ default on 64 bit systems, but can be disabled if one of these
+ systems includes 32-bit ADMA.
+
config FIXED_SDHCI_ALIGNED_BUFFER
hex "SDRAM address for fixed buffer"
depends on SPL && MVEBU_SPL_BOOT_DEVICE_MMC
@@ -568,6 +606,19 @@
If unsure, say N.
+config MMC_SDHCI_CV1800B
+ bool "SDHCI support for the CV1800B SD/SDIO/eMMC controller"
+ depends on BLK && DM_MMC
+ depends on MMC_SDHCI
+ depends on OF_CONTROL
+ help
+ This selects the CV1800B SD/SDIO/eMMC driver.
+
+ If you have a controller with this interface,
+ say Y here.
+
+ If unsure, say N.
+
config MMC_SDHCI_AM654
bool "SDHCI Controller on TI's Am654 devices"
depends on ARCH_K3
@@ -586,7 +637,7 @@
This selects the iProc SD/MMC controller.
If you have a Broadcom IPROC platform with SD or MMC devices,
- say Y or M here.
+ say Y here.
If unsure, say N.
@@ -597,7 +648,7 @@
help
This selects the Secure Digital Host Controller Interface (SDHCI)
Needed by some Fujitsu/Socionext SoC for MMC / SD / SDIO support.
- If you have a controller with this interface, say Y or M here.
+ If you have a controller with this interface, say Y here.
If unsure, say N.
config MMC_SDHCI_KONA
@@ -791,7 +842,7 @@
help
This selects support for the SD/MMC controller on STM32H7 SoCs.
If you have a board based on such a SoC and with a SD/MMC slot,
- say Y or M here.
+ say Y here.
config FTSDC010
bool "Ftsdc010 SD/MMC controller Support"
@@ -811,7 +862,7 @@
depends on OF_CONTROL
help
This selects the MediaTek(R) Secure digital and Multimedia card Interface.
- If you have a machine with a integrated SD/MMC card reader, say Y or M here.
+ If you have a machine with a integrated SD/MMC card reader, say Y here.
This is needed if support for any SD/SDIO/MMC devices is required.
If unsure, say N.
diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile
index e9cf1fc..72c3fb6 100644
--- a/drivers/mmc/Makefile
+++ b/drivers/mmc/Makefile
@@ -11,7 +11,7 @@
endif
obj-$(CONFIG_$(SPL_TPL_)MMC_WRITE) += mmc_write.o
-obj-$(CONFIG_MMC_PWRSEQ) += mmc-pwrseq.o
+obj-$(CONFIG_$(SPL_)MMC_PWRSEQ) += mmc-pwrseq.o
obj-$(CONFIG_MMC_SDHCI_ADMA_HELPERS) += sdhci-adma.o
ifndef CONFIG_$(SPL_)BLK
@@ -60,6 +60,7 @@
obj-$(CONFIG_MMC_SDHCI_BCM2835) += bcm2835_sdhci.o
obj-$(CONFIG_MMC_SDHCI_BCMSTB) += bcmstb_sdhci.o
obj-$(CONFIG_MMC_SDHCI_CADENCE) += sdhci-cadence.o
+obj-$(CONFIG_MMC_SDHCI_CV1800B) += cv1800b_sdhci.o
obj-$(CONFIG_MMC_SDHCI_AM654) += am654_sdhci.o
obj-$(CONFIG_MMC_SDHCI_IPROC) += iproc_sdhci.o
obj-$(CONFIG_MMC_SDHCI_KONA) += kona_sdhci.o
diff --git a/drivers/mmc/am654_sdhci.c b/drivers/mmc/am654_sdhci.c
index 05595bd..48fac7a 100644
--- a/drivers/mmc/am654_sdhci.c
+++ b/drivers/mmc/am654_sdhci.c
@@ -6,7 +6,6 @@
*/
#include <clk.h>
-#include <common.h>
#include <dm.h>
#include <malloc.h>
#include <mmc.h>
@@ -85,6 +84,8 @@
#define AM654_SDHCI_MIN_FREQ 400000
#define CLOCK_TOO_SLOW_HZ 50000000
+#define ENABLE 0x1
+
struct am654_sdhci_plat {
struct mmc_config cfg;
struct mmc mmc;
@@ -92,11 +93,13 @@
bool non_removable;
u32 otap_del_sel[MMC_MODES_END];
u32 itap_del_sel[MMC_MODES_END];
+ u32 itap_del_ena[MMC_MODES_END];
u32 trm_icp;
u32 drv_strength;
u32 strb_sel;
u32 clkbuf_sel;
u32 flags;
+ bool dll_enable;
#define DLL_PRESENT BIT(0)
#define IOMUX_PRESENT BIT(1)
#define FREQSEL_2_BIT BIT(2)
@@ -110,6 +113,12 @@
u32 capability;
};
+struct window {
+ u8 start;
+ u8 end;
+ u8 length;
+};
+
static const struct timing_data td[] = {
[MMC_LEGACY] = {"ti,otap-del-sel-legacy",
"ti,itap-del-sel-legacy",
@@ -216,8 +225,10 @@
}
static void am654_sdhci_write_itapdly(struct am654_sdhci_plat *plat,
- u32 itapdly)
+ u32 itapdly, u32 enable)
{
+ regmap_update_bits(plat->base, PHY_CTRL4, ITAPDLYENA_MASK,
+ enable << ITAPDLYENA_SHIFT);
/* Set ITAPCHGWIN before writing to ITAPDLY */
regmap_update_bits(plat->base, PHY_CTRL4, ITAPCHGWIN_MASK,
1 << ITAPCHGWIN_SHIFT);
@@ -235,7 +246,8 @@
mask = SELDLYTXCLK_MASK | SELDLYRXCLK_MASK;
regmap_update_bits(plat->base, PHY_CTRL5, mask, val);
- am654_sdhci_write_itapdly(plat, plat->itap_del_sel[mode]);
+ am654_sdhci_write_itapdly(plat, plat->itap_del_sel[mode],
+ plat->itap_del_ena[mode]);
}
static int am654_sdhci_set_ios_post(struct sdhci_host *host)
@@ -276,12 +288,22 @@
regmap_update_bits(plat->base, PHY_CTRL4, mask, val);
- if (mode > UHS_SDR25 && speed >= CLOCK_TOO_SLOW_HZ) {
+ if ((mode > UHS_SDR25 || mode == MMC_DDR_52) && speed >= CLOCK_TOO_SLOW_HZ) {
ret = am654_sdhci_setup_dll(plat, speed);
if (ret)
return ret;
+
+ plat->dll_enable = true;
+ if (mode == MMC_HS_400) {
+ plat->itap_del_ena[mode] = ENABLE;
+ plat->itap_del_sel[mode] = plat->itap_del_sel[mode - 1];
+ }
+
+ am654_sdhci_write_itapdly(plat, plat->itap_del_sel[mode],
+ plat->itap_del_ena[mode]);
} else {
am654_sdhci_setup_delay_chain(plat, mode);
+ plat->dll_enable = false;
}
regmap_update_bits(plat->base, PHY_CTRL5, CLKBUFSEL_MASK,
@@ -374,46 +396,110 @@
writeb(val, host->ioaddr + reg);
}
-#ifdef MMC_SUPPORTS_TUNING
-#define ITAP_MAX 32
+#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING)
+#define ITAPDLY_LENGTH 32
+#define ITAPDLY_LAST_INDEX (ITAPDLY_LENGTH - 1)
+
+static u32 am654_sdhci_calculate_itap(struct udevice *dev, struct window
+ *fail_window, u8 num_fails, bool circular_buffer)
+{
+ u8 itap = 0, start_fail = 0, end_fail = 0, pass_length = 0;
+ u8 first_fail_start = 0, last_fail_end = 0;
+ struct window pass_window = {0, 0, 0};
+ int prev_fail_end = -1;
+ u8 i;
+
+ if (!num_fails)
+ return ITAPDLY_LAST_INDEX >> 1;
+
+ if (fail_window->length == ITAPDLY_LENGTH) {
+ dev_err(dev, "No passing ITAPDLY, return 0\n");
+ return 0;
+ }
+
+ first_fail_start = fail_window->start;
+ last_fail_end = fail_window[num_fails - 1].end;
+
+ for (i = 0; i < num_fails; i++) {
+ start_fail = fail_window[i].start;
+ end_fail = fail_window[i].end;
+ pass_length = start_fail - (prev_fail_end + 1);
+
+ if (pass_length > pass_window.length) {
+ pass_window.start = prev_fail_end + 1;
+ pass_window.length = pass_length;
+ }
+ prev_fail_end = end_fail;
+ }
+
+ if (!circular_buffer)
+ pass_length = ITAPDLY_LAST_INDEX - last_fail_end;
+ else
+ pass_length = ITAPDLY_LAST_INDEX - last_fail_end + first_fail_start;
+
+ if (pass_length > pass_window.length) {
+ pass_window.start = last_fail_end + 1;
+ pass_window.length = pass_length;
+ }
+
+ if (!circular_buffer)
+ itap = pass_window.start + (pass_window.length >> 1);
+ else
+ itap = (pass_window.start + (pass_window.length >> 1)) % ITAPDLY_LENGTH;
+
+ return (itap > ITAPDLY_LAST_INDEX) ? ITAPDLY_LAST_INDEX >> 1 : itap;
+}
+
static int am654_sdhci_execute_tuning(struct mmc *mmc, u8 opcode)
{
struct udevice *dev = mmc->dev;
struct am654_sdhci_plat *plat = dev_get_plat(dev);
- int cur_val, prev_val = 1, fail_len = 0, pass_window = 0, pass_len;
- u32 itap;
+ struct window fail_window[ITAPDLY_LENGTH];
+ int mode = mmc->selected_mode;
+ u8 curr_pass, itap;
+ u8 fail_index = 0;
+ u8 prev_pass = 1;
+
+ memset(fail_window, 0, sizeof(fail_window));
/* Enable ITAPDLY */
- regmap_update_bits(plat->base, PHY_CTRL4, ITAPDLYENA_MASK,
- 1 << ITAPDLYENA_SHIFT);
+ plat->itap_del_ena[mode] = ENABLE;
- for (itap = 0; itap < ITAP_MAX; itap++) {
- am654_sdhci_write_itapdly(plat, itap);
+ for (itap = 0; itap < ITAPDLY_LENGTH; itap++) {
+ am654_sdhci_write_itapdly(plat, itap, plat->itap_del_ena[mode]);
- cur_val = !mmc_send_tuning(mmc, opcode, NULL);
- if (cur_val && !prev_val)
- pass_window = itap;
+ curr_pass = !mmc_send_tuning(mmc, opcode);
- if (!cur_val)
- fail_len++;
+ if (!curr_pass && prev_pass)
+ fail_window[fail_index].start = itap;
- prev_val = cur_val;
+ if (!curr_pass) {
+ fail_window[fail_index].end = itap;
+ fail_window[fail_index].length++;
+ }
+
+ if (curr_pass && !prev_pass)
+ fail_index++;
+
+ prev_pass = curr_pass;
}
- /*
- * Having determined the length of the failing window and start of
- * the passing window calculate the length of the passing window and
- * set the final value halfway through it considering the range as a
- * circular buffer
- */
- pass_len = ITAP_MAX - fail_len;
- itap = (pass_window + (pass_len >> 1)) % ITAP_MAX;
- am654_sdhci_write_itapdly(plat, itap);
+
+ if (fail_window[fail_index].length != 0)
+ fail_index++;
+
+ itap = am654_sdhci_calculate_itap(dev, fail_window, fail_index,
+ plat->dll_enable);
+
+ /* Save ITAPDLY */
+ plat->itap_del_sel[mode] = itap;
+
+ am654_sdhci_write_itapdly(plat, itap, plat->itap_del_ena[mode]);
return 0;
}
#endif
const struct sdhci_ops am654_sdhci_ops = {
-#ifdef MMC_SUPPORTS_TUNING
+#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING)
.platform_execute_tuning = am654_sdhci_execute_tuning,
#endif
.deferred_probe = am654_sdhci_deferred_probe,
@@ -442,12 +528,29 @@
{
struct udevice *dev = host->mmc->dev;
struct am654_sdhci_plat *plat = dev_get_plat(dev);
- u32 otap_del_sel, mask, val;
+ int mode = host->mmc->selected_mode;
+ u32 otap_del_sel;
+ u32 itap_del_ena;
+ u32 itap_del_sel;
+ u32 mask, val;
- otap_del_sel = plat->otap_del_sel[host->mmc->selected_mode];
+ otap_del_sel = plat->otap_del_sel[mode];
+
mask = OTAPDLYENA_MASK | OTAPDLYSEL_MASK;
- val = (1 << OTAPDLYENA_SHIFT) | (otap_del_sel << OTAPDLYSEL_SHIFT);
+ val = (1 << OTAPDLYENA_SHIFT) |
+ (otap_del_sel << OTAPDLYSEL_SHIFT);
+
+ itap_del_ena = plat->itap_del_ena[mode];
+ itap_del_sel = plat->itap_del_sel[mode];
+
+ mask |= ITAPDLYENA_MASK | ITAPDLYSEL_MASK;
+ val |= (itap_del_ena << ITAPDLYENA_SHIFT) |
+ (itap_del_sel << ITAPDLYSEL_SHIFT);
+
+ regmap_update_bits(plat->base, PHY_CTRL4, ITAPCHGWIN_MASK,
+ 1 << ITAPCHGWIN_SHIFT);
regmap_update_bits(plat->base, PHY_CTRL4, mask, val);
+ regmap_update_bits(plat->base, PHY_CTRL4, ITAPCHGWIN_MASK, 0);
regmap_update_bits(plat->base, PHY_CTRL5, CLKBUFSEL_MASK,
plat->clkbuf_sel);
@@ -456,7 +559,7 @@
}
const struct sdhci_ops j721e_4bit_sdhci_ops = {
-#ifdef MMC_SUPPORTS_TUNING
+#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING)
.platform_execute_tuning = am654_sdhci_execute_tuning,
#endif
.deferred_probe = am654_sdhci_deferred_probe,
@@ -501,7 +604,7 @@
* Remove the corresponding capability if an otap-del-sel
* value is not found
*/
- for (i = MMC_HS; i <= MMC_HS_400; i++) {
+ for (i = MMC_LEGACY; i <= MMC_HS_400; i++) {
ret = dev_read_u32(dev, td[i].otap_binding,
&plat->otap_del_sel[i]);
if (ret) {
@@ -513,9 +616,13 @@
cfg->host_caps &= ~td[i].capability;
}
- if (td[i].itap_binding)
- dev_read_u32(dev, td[i].itap_binding,
- &plat->itap_del_sel[i]);
+ if (td[i].itap_binding) {
+ ret = dev_read_u32(dev, td[i].itap_binding,
+ &plat->itap_del_sel[i]);
+
+ if (!ret)
+ plat->itap_del_ena[i] = ENABLE;
+ }
}
return 0;
diff --git a/drivers/mmc/arm_pl180_mmci.c b/drivers/mmc/arm_pl180_mmci.c
index 5cf5502..f00b0ff 100644
--- a/drivers/mmc/arm_pl180_mmci.c
+++ b/drivers/mmc/arm_pl180_mmci.c
@@ -11,13 +11,13 @@
/* #define DEBUG */
-#include "common.h"
#include <clk.h>
#include <errno.h>
#include <log.h>
#include <malloc.h>
#include <mmc.h>
#include <dm/device_compat.h>
+#include <dm.h>
#include <asm/io.h>
#include <asm-generic/gpio.h>
@@ -25,8 +25,6 @@
#include "arm_pl180_mmci.h"
#include <linux/delay.h>
-#ifdef CONFIG_DM_MMC
-#include <dm.h>
#define MMC_CLOCK_MAX 48000000
#define MMC_CLOCK_MIN 400000
@@ -34,7 +32,6 @@
struct mmc_config cfg;
struct mmc mmc;
};
-#endif
static int wait_for_command_end(struct mmc *dev, struct mmc_cmd *cmd)
{
@@ -231,6 +228,7 @@
u32 blksz = 0;
u32 data_ctrl = 0;
u32 data_len = (u32) (data->blocks * data->blocksize);
+ assert(data_len < U16_MAX); /* should be ensured by arm_pl180_get_b_max */
if (!host->version2) {
blksz = (ffs(data->blocksize) - 1);
@@ -358,65 +356,14 @@
return 0;
}
-#ifndef CONFIG_DM_MMC
-/* MMC uses open drain drivers in the enumeration phase */
-static int mmc_host_reset(struct mmc *dev)
+static int arm_pl180_get_b_max(struct udevice *dev, void *dst, lbaint_t blkcnt)
{
- struct pl180_mmc_host *host = dev->priv;
+ struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
+ struct mmc *mmc = upriv->mmc;
- writel(host->pwr_init, &host->base->power);
-
- return 0;
+ return U16_MAX / mmc->read_bl_len;
}
-static const struct mmc_ops arm_pl180_mmci_ops = {
- .send_cmd = host_request,
- .set_ios = host_set_ios,
- .init = mmc_host_reset,
-};
-
-/*
- * mmc_host_init - initialize the mmc controller.
- * Set initial clock and power for mmc slot.
- * Initialize mmc struct and register with mmc framework.
- */
-
-int arm_pl180_mmci_init(struct pl180_mmc_host *host, struct mmc **mmc)
-{
- u32 sdi_u32;
-
- writel(host->pwr_init, &host->base->power);
- writel(host->clkdiv_init, &host->base->clock);
- udelay(CLK_CHANGE_DELAY);
-
- /* Disable mmc interrupts */
- sdi_u32 = readl(&host->base->mask0) & ~SDI_MASK0_MASK;
- writel(sdi_u32, &host->base->mask0);
-
- host->cfg.name = host->name;
- host->cfg.ops = &arm_pl180_mmci_ops;
-
- /* TODO remove the duplicates */
- host->cfg.host_caps = host->caps;
- host->cfg.voltages = host->voltages;
- host->cfg.f_min = host->clock_min;
- host->cfg.f_max = host->clock_max;
- if (host->b_max != 0)
- host->cfg.b_max = host->b_max;
- else
- host->cfg.b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
-
- *mmc = mmc_create(&host->cfg, host);
- if (!*mmc)
- return -1;
- debug("registered mmc interface number is:%d\n",
- (*mmc)->block_dev.devnum);
-
- return 0;
-}
-#endif
-
-#ifdef CONFIG_DM_MMC
static void arm_pl180_mmc_init(struct pl180_mmc_host *host)
{
u32 sdi_u32;
@@ -477,7 +424,7 @@
host->version2 = true;
break;
default:
- host->version2 = true;
+ host->version2 = false; /* ARM variant */
}
gpio_request_by_name(dev, "cd-gpios", 0, &host->cd_gpio, GPIOD_IS_IN);
@@ -531,6 +478,7 @@
.send_cmd = dm_host_request,
.set_ios = dm_host_set_ios,
.get_cd = dm_mmc_getcd,
+ .get_b_max = arm_pl180_get_b_max,
};
static int arm_pl180_mmc_of_to_plat(struct udevice *dev)
@@ -561,4 +509,3 @@
.priv_auto = sizeof(struct pl180_mmc_host),
.plat_auto = sizeof(struct arm_pl180_mmc_plat),
};
-#endif
diff --git a/drivers/mmc/aspeed_sdhci.c b/drivers/mmc/aspeed_sdhci.c
index c9626c6..87a6f66 100644
--- a/drivers/mmc/aspeed_sdhci.c
+++ b/drivers/mmc/aspeed_sdhci.c
@@ -4,7 +4,6 @@
* Eddie James <eajames@linux.ibm.com>
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <malloc.h>
diff --git a/drivers/mmc/atmel_sdhci.c b/drivers/mmc/atmel_sdhci.c
index d92bad9..0b26519 100644
--- a/drivers/mmc/atmel_sdhci.c
+++ b/drivers/mmc/atmel_sdhci.c
@@ -4,7 +4,6 @@
* Wenyou.Yang <wenyou.yang@atmel.com>
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <malloc.h>
diff --git a/drivers/mmc/bcm2835_sdhci.c b/drivers/mmc/bcm2835_sdhci.c
index 5e48394..598a51d 100644
--- a/drivers/mmc/bcm2835_sdhci.c
+++ b/drivers/mmc/bcm2835_sdhci.c
@@ -36,7 +36,6 @@
* Inspired by sdhci-pci.c, by Pierre Ossman
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <malloc.h>
diff --git a/drivers/mmc/bcm2835_sdhost.c b/drivers/mmc/bcm2835_sdhost.c
index 5c23c03..7201274 100644
--- a/drivers/mmc/bcm2835_sdhost.c
+++ b/drivers/mmc/bcm2835_sdhost.c
@@ -30,7 +30,6 @@
* sdhci.c and sdhci-pci.c by Pierre Ossman
*/
#include <clk.h>
-#include <common.h>
#include <dm.h>
#include <mmc.h>
#include <asm/arch/msg.h>
diff --git a/drivers/mmc/bcmstb_sdhci.c b/drivers/mmc/bcmstb_sdhci.c
index 49846ad..7bddbeb 100644
--- a/drivers/mmc/bcmstb_sdhci.c
+++ b/drivers/mmc/bcmstb_sdhci.c
@@ -6,7 +6,6 @@
* Author: Thomas Fitzsimmons <fitzsim@fitzsim.org>
*/
-#include <common.h>
#include <dm.h>
#include <mach/sdhci.h>
#include <malloc.h>
diff --git a/drivers/mmc/ca_dw_mmc.c b/drivers/mmc/ca_dw_mmc.c
index a17ed8c..54a2ba4 100644
--- a/drivers/mmc/ca_dw_mmc.c
+++ b/drivers/mmc/ca_dw_mmc.c
@@ -4,7 +4,6 @@
* Arthur Li <arthur.li@cortina-access.com>
*/
-#include <common.h>
#include <dwmmc.h>
#include <fdtdec.h>
#include <asm/global_data.h>
diff --git a/drivers/mmc/cv1800b_sdhci.c b/drivers/mmc/cv1800b_sdhci.c
new file mode 100644
index 0000000..4e75051
--- /dev/null
+++ b/drivers/mmc/cv1800b_sdhci.c
@@ -0,0 +1,118 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2024, Kongyang Liu <seashell11234455@gmail.com>
+ */
+
+#include <dm.h>
+#include <mmc.h>
+#include <sdhci.h>
+#include <linux/delay.h>
+
+#define SDHCI_PHY_TX_RX_DLY 0x240
+#define MMC_MAX_CLOCK 375000000
+#define TUNE_MAX_PHCODE 128
+
+#define PHY_TX_SRC_INVERT BIT(8)
+
+struct cv1800b_sdhci_plat {
+ struct mmc_config cfg;
+ struct mmc mmc;
+};
+
+static void cv1800b_set_tap_delay(struct sdhci_host *host, u16 tap)
+{
+ sdhci_writel(host, PHY_TX_SRC_INVERT | tap << 16, SDHCI_PHY_TX_RX_DLY);
+}
+
+static void cv1800b_sdhci_reset(struct sdhci_host *host, u8 mask)
+{
+ sdhci_writeb(host, mask, SDHCI_SOFTWARE_RESET);
+ while (sdhci_readb(host, SDHCI_SOFTWARE_RESET) & mask)
+ udelay(10);
+}
+
+static int cv1800b_execute_tuning(struct mmc *mmc, u8 opcode)
+{
+ struct sdhci_host *host = dev_get_priv(mmc->dev);
+
+ u16 tap;
+
+ int current_size = 0;
+ int max_size = 0;
+ int max_window = 0;
+
+ for (tap = 0; tap < TUNE_MAX_PHCODE; tap++) {
+ cv1800b_set_tap_delay(host, tap);
+
+ if (mmc_send_tuning(host->mmc, opcode)) {
+ current_size = 0;
+ } else {
+ current_size++;
+ if (current_size > max_size) {
+ max_size = current_size;
+ max_window = tap;
+ }
+ }
+ }
+
+ cv1800b_sdhci_reset(host, SDHCI_RESET_CMD | SDHCI_RESET_DATA);
+
+ cv1800b_set_tap_delay(host, max_window - max_size / 2);
+
+ return 0;
+}
+
+const struct sdhci_ops cv1800b_sdhci_sd_ops = {
+ .platform_execute_tuning = cv1800b_execute_tuning,
+};
+
+static int cv1800b_sdhci_bind(struct udevice *dev)
+{
+ struct cv1800b_sdhci_plat *plat = dev_get_plat(dev);
+
+ return sdhci_bind(dev, &plat->mmc, &plat->cfg);
+}
+
+static int cv1800b_sdhci_probe(struct udevice *dev)
+{
+ struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
+ struct cv1800b_sdhci_plat *plat = dev_get_plat(dev);
+ struct sdhci_host *host = dev_get_priv(dev);
+ int ret;
+
+ host->name = dev->name;
+ host->ioaddr = devfdt_get_addr_ptr(dev);
+
+ upriv->mmc = &plat->mmc;
+ host->mmc = &plat->mmc;
+ host->mmc->priv = host;
+ host->mmc->dev = dev;
+ host->ops = &cv1800b_sdhci_sd_ops;
+ host->max_clk = MMC_MAX_CLOCK;
+
+ ret = mmc_of_parse(dev, &plat->cfg);
+ if (ret)
+ return ret;
+
+ ret = sdhci_setup_cfg(&plat->cfg, host, 0, 200000);
+ if (ret)
+ return ret;
+
+ return sdhci_probe(dev);
+}
+
+static const struct udevice_id cv1800b_sdhci_match[] = {
+ { .compatible = "sophgo,cv1800b-dwcmshc" },
+ { }
+};
+
+U_BOOT_DRIVER(cv1800b_sdhci) = {
+ .name = "sdhci-cv1800b",
+ .id = UCLASS_MMC,
+ .of_match = cv1800b_sdhci_match,
+ .bind = cv1800b_sdhci_bind,
+ .probe = cv1800b_sdhci_probe,
+ .priv_auto = sizeof(struct sdhci_host),
+ .plat_auto = sizeof(struct cv1800b_sdhci_plat),
+ .ops = &sdhci_ops,
+};
diff --git a/drivers/mmc/davinci_mmc.c b/drivers/mmc/davinci_mmc.c
index 3a3d23a..5107fcd 100644
--- a/drivers/mmc/davinci_mmc.c
+++ b/drivers/mmc/davinci_mmc.c
@@ -6,7 +6,6 @@
*/
#include <config.h>
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <mmc.h>
diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
index 400066f..e6107c7 100644
--- a/drivers/mmc/dw_mmc.c
+++ b/drivers/mmc/dw_mmc.c
@@ -6,7 +6,6 @@
*/
#include <bouncebuf.h>
-#include <common.h>
#include <cpu_func.h>
#include <errno.h>
#include <log.h>
@@ -262,8 +261,8 @@
while (dwmci_readl(host, DWMCI_STATUS) & DWMCI_BUSY) {
if (get_timer(start) > timeout) {
- debug("%s: Timeout on data busy\n", __func__);
- return -ETIMEDOUT;
+ debug("%s: Timeout on data busy, continue anyway\n", __func__);
+ break;
}
}
diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c
index 2f849c4..a51f762 100644
--- a/drivers/mmc/exynos_dw_mmc.c
+++ b/drivers/mmc/exynos_dw_mmc.c
@@ -4,7 +4,6 @@
* Jaehoon Chung <jh80.chung@samsung.com>
*/
-#include <common.h>
#include <dwmmc.h>
#include <fdtdec.h>
#include <asm/global_data.h>
diff --git a/drivers/mmc/f_sdh30.c b/drivers/mmc/f_sdh30.c
index 3d587a4..f47cf84 100644
--- a/drivers/mmc/f_sdh30.c
+++ b/drivers/mmc/f_sdh30.c
@@ -5,7 +5,6 @@
* Copyright 2021 Socionext, Inc.
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <malloc.h>
diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index d506666..0c66980 100644
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -10,7 +10,6 @@
*/
#include <config.h>
-#include <common.h>
#include <command.h>
#include <cpu_func.h>
#include <errno.h>
@@ -252,7 +251,7 @@
priv->adma_desc_table) {
debug("Using ADMA2\n");
/* prefer ADMA2 if it is available */
- sdhci_prepare_adma_table(priv->adma_desc_table, data,
+ sdhci_prepare_adma_table(NULL, priv->adma_desc_table, data,
priv->dma_addr);
adma_addr = virt_to_phys(priv->adma_desc_table);
@@ -1102,7 +1101,7 @@
return esdhc_init_common(priv, &plat->mmc);
}
-#ifdef MMC_SUPPORTS_TUNING
+#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING)
static int fsl_esdhc_execute_tuning(struct udevice *dev, uint32_t opcode)
{
struct fsl_esdhc_plat *plat = dev_get_plat(dev);
@@ -1123,7 +1122,7 @@
esdhc_write32(®s->irqstaten, IRQSTATEN_BRR);
for (i = 0; i < MAX_TUNING_LOOP; i++) {
- mmc_send_tuning(mmc, opcode, NULL);
+ mmc_send_tuning(mmc, opcode);
mdelay(1);
val = esdhc_read32(®s->autoc12err);
@@ -1175,7 +1174,7 @@
.get_cd = fsl_esdhc_get_cd,
.send_cmd = fsl_esdhc_send_cmd,
.set_ios = fsl_esdhc_set_ios,
-#ifdef MMC_SUPPORTS_TUNING
+#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING)
.execute_tuning = fsl_esdhc_execute_tuning,
#endif
.reinit = fsl_esdhc_reinit,
diff --git a/drivers/mmc/fsl_esdhc_imx.c b/drivers/mmc/fsl_esdhc_imx.c
index 7c39c86..a9b8d7d 100644
--- a/drivers/mmc/fsl_esdhc_imx.c
+++ b/drivers/mmc/fsl_esdhc_imx.c
@@ -11,7 +11,6 @@
*/
#include <config.h>
-#include <common.h>
#include <command.h>
#include <clk.h>
#include <cpu_func.h>
@@ -635,7 +634,7 @@
priv->clock = clock;
}
-#ifdef MMC_SUPPORTS_TUNING
+#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING)
static int esdhc_change_pinstate(struct udevice *dev)
{
struct fsl_esdhc_priv *priv = dev_get_priv(dev);
@@ -882,7 +881,7 @@
esdhc_write32(®s->mixctrl, val);
/* We are using STD tuning, no need to check return value */
- mmc_send_tuning(mmc, opcode, NULL);
+ mmc_send_tuning(mmc, opcode);
ctrl = esdhc_read32(®s->autoc12err);
if ((!(ctrl & MIX_CTRL_EXE_TUNE)) &&
@@ -913,7 +912,7 @@
int ret __maybe_unused;
u32 clock;
-#ifdef MMC_SUPPORTS_TUNING
+#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING)
/*
* call esdhc_set_timing() before update the clock rate,
* This is because current we support DDR and SDR mode,
@@ -951,7 +950,7 @@
esdhc_setbits32(®s->sysctl, SYSCTL_PEREN | SYSCTL_CKEN);
}
-#ifdef MMC_SUPPORTS_TUNING
+#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING)
/*
* For HS400/HS400ES mode, make sure set the strobe dll in the
* target clock rate. So call esdhc_set_strobe_dll() after the
@@ -1618,7 +1617,7 @@
.get_cd = fsl_esdhc_get_cd,
.send_cmd = fsl_esdhc_send_cmd,
.set_ios = fsl_esdhc_set_ios,
-#ifdef MMC_SUPPORTS_TUNING
+#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING)
.execute_tuning = fsl_esdhc_execute_tuning,
#endif
#if CONFIG_IS_ENABLED(MMC_HS400_ES_SUPPORT)
diff --git a/drivers/mmc/fsl_esdhc_spl.c b/drivers/mmc/fsl_esdhc_spl.c
index 6d7c0cf..1a11258 100644
--- a/drivers/mmc/fsl_esdhc_spl.c
+++ b/drivers/mmc/fsl_esdhc_spl.c
@@ -3,7 +3,7 @@
* Copyright 2013 Freescale Semiconductor, Inc.
*/
-#include <common.h>
+#include <config.h>
#include <cpu_func.h>
#include <hang.h>
#include <mmc.h>
diff --git a/drivers/mmc/ftsdc010_mci.c b/drivers/mmc/ftsdc010_mci.c
index cabb747..11e4426 100644
--- a/drivers/mmc/ftsdc010_mci.c
+++ b/drivers/mmc/ftsdc010_mci.c
@@ -9,7 +9,6 @@
* Author: Rick Chen (rick@andestech.com)
*/
-#include <common.h>
#include <clk.h>
#include <log.h>
#include <malloc.h>
diff --git a/drivers/mmc/gen_atmel_mci.c b/drivers/mmc/gen_atmel_mci.c
index 3ee9955..6a531fa 100644
--- a/drivers/mmc/gen_atmel_mci.c
+++ b/drivers/mmc/gen_atmel_mci.c
@@ -8,7 +8,7 @@
* Copyright (C) 2004-2006 Atmel Corporation
*/
-#include <common.h>
+#include <config.h>
#include <clk.h>
#include <display_options.h>
#include <dm.h>
diff --git a/drivers/mmc/hi6220_dw_mmc.c b/drivers/mmc/hi6220_dw_mmc.c
index 71962cd..c68a915 100644
--- a/drivers/mmc/hi6220_dw_mmc.c
+++ b/drivers/mmc/hi6220_dw_mmc.c
@@ -4,16 +4,24 @@
* peter.griffin <peter.griffin@linaro.org>
*/
-#include <common.h>
+#include <clk.h>
#include <dm.h>
#include <dwmmc.h>
#include <errno.h>
#include <fdtdec.h>
#include <malloc.h>
+#include <reset.h>
#include <asm/global_data.h>
+#include <dm/device_compat.h>
DECLARE_GLOBAL_DATA_PTR;
+enum hi6220_dwmmc_clk_type {
+ HI6220_DWMMC_CLK_BIU,
+ HI6220_DWMMC_CLK_CIU,
+ HI6220_DWMMC_CLK_CNT,
+};
+
struct hi6220_dwmmc_plat {
struct mmc_config cfg;
struct mmc mmc;
@@ -21,18 +29,43 @@
struct hi6220_dwmmc_priv_data {
struct dwmci_host host;
+ struct clk *clks[HI6220_DWMMC_CLK_CNT];
+ struct reset_ctl_bulk rsts;
};
struct hisi_mmc_data {
unsigned int clock;
bool use_fifo;
+ u32 fifoth_val;
};
static int hi6220_dwmmc_of_to_plat(struct udevice *dev)
{
struct hi6220_dwmmc_priv_data *priv = dev_get_priv(dev);
struct dwmci_host *host = &priv->host;
+ int ret;
+ if (CONFIG_IS_ENABLED(CLK) && CONFIG_IS_ENABLED(DM_RESET)) {
+ priv->clks[HI6220_DWMMC_CLK_BIU] = devm_clk_get(dev, "biu");
+ if (IS_ERR(priv->clks[HI6220_DWMMC_CLK_BIU])) {
+ ret = PTR_ERR(priv->clks[HI6220_DWMMC_CLK_BIU]);
+ dev_err(dev, "Failed to get BIU clock(ret = %d).\n", ret);
+ return log_msg_ret("clk", ret);
+ }
+
+ priv->clks[HI6220_DWMMC_CLK_CIU] = devm_clk_get(dev, "ciu");
+ if (IS_ERR(priv->clks[HI6220_DWMMC_CLK_CIU])) {
+ ret = PTR_ERR(priv->clks[HI6220_DWMMC_CLK_CIU]);
+ dev_err(dev, "Failed to get CIU clock(ret = %d).\n", ret);
+ return log_msg_ret("clk", ret);
+ }
+
+ ret = reset_get_bulk(dev, &priv->rsts);
+ if (ret) {
+ dev_err(dev, "Failed to get resets(ret = %d)", ret);
+ return log_msg_ret("rst", ret);
+ }
+ }
host->name = dev->name;
host->ioaddr = dev_read_addr_ptr(dev);
host->buswidth = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
@@ -56,16 +89,43 @@
struct hi6220_dwmmc_priv_data *priv = dev_get_priv(dev);
struct dwmci_host *host = &priv->host;
struct hisi_mmc_data *mmc_data;
+ int ret;
mmc_data = (struct hisi_mmc_data *)dev_get_driver_data(dev);
- /* Use default bus speed due to absence of clk driver */
host->bus_hz = mmc_data->clock;
+ if (CONFIG_IS_ENABLED(CLK) && CONFIG_IS_ENABLED(DM_RESET)) {
+ ret = clk_prepare_enable(priv->clks[HI6220_DWMMC_CLK_BIU]);
+ if (ret) {
+ dev_err(dev, "Failed to enable biu clock(ret = %d).\n", ret);
+ return log_msg_ret("clk", ret);
+ }
+
+ ret = clk_prepare_enable(priv->clks[HI6220_DWMMC_CLK_CIU]);
+ if (ret) {
+ dev_err(dev, "Failed to enable ciu clock(ret = %d).\n", ret);
+ return log_msg_ret("clk", ret);
+ }
+
+ ret = reset_deassert_bulk(&priv->rsts);
+ if (ret) {
+ dev_err(dev, "Failed to deassert resets(ret = %d).\n", ret);
+ return log_msg_ret("rst", ret);
+ }
+
+ host->bus_hz = clk_get_rate(priv->clks[HI6220_DWMMC_CLK_CIU]);
+ if (host->bus_hz <= 0) {
+ dev_err(dev, "Failed to get ciu clock rate(ret = %d).\n", ret);
+ return log_msg_ret("clk", ret);
+ }
+ }
+ dev_dbg(dev, "bus clock rate: %d.\n", host->bus_hz);
dwmci_setup_cfg(&plat->cfg, host, host->bus_hz, 400000);
host->mmc = &plat->mmc;
host->fifo_mode = mmc_data->use_fifo;
+ host->fifoth_val = mmc_data->fifoth_val;
host->mmc->priv = &priv->host;
upriv->mmc = host->mmc;
host->mmc->dev = dev;
@@ -95,13 +155,20 @@
.use_fifo = false,
};
+static const struct hisi_mmc_data hi3798mv2x_mmc_data = {
+ .clock = 50000000,
+ .use_fifo = false,
+ // FIFO depth is 256
+ .fifoth_val = MSIZE(4) | RX_WMARK(0x7f) | TX_WMARK(0x80),
+};
+
static const struct udevice_id hi6220_dwmmc_ids[] = {
{ .compatible = "hisilicon,hi6220-dw-mshc",
.data = (ulong)&hi6220_mmc_data },
{ .compatible = "hisilicon,hi3798cv200-dw-mshc",
.data = (ulong)&hi6220_mmc_data },
{ .compatible = "hisilicon,hi3798mv200-dw-mshc",
- .data = (ulong)&hi6220_mmc_data },
+ .data = (ulong)&hi3798mv2x_mmc_data },
{ .compatible = "hisilicon,hi3660-dw-mshc",
.data = (ulong)&hi3660_mmc_data },
{ }
diff --git a/drivers/mmc/iproc_sdhci.c b/drivers/mmc/iproc_sdhci.c
index 11d86ad..7ab74ff 100644
--- a/drivers/mmc/iproc_sdhci.c
+++ b/drivers/mmc/iproc_sdhci.c
@@ -4,7 +4,6 @@
*
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <malloc.h>
diff --git a/drivers/mmc/jz_mmc.c b/drivers/mmc/jz_mmc.c
index 61e48ee..fc10bb2 100644
--- a/drivers/mmc/jz_mmc.c
+++ b/drivers/mmc/jz_mmc.c
@@ -6,7 +6,6 @@
* Author: Paul Burton <paul.burton@imgtec.com>
*/
-#include <common.h>
#include <malloc.h>
#include <mmc.h>
#include <asm/global_data.h>
diff --git a/drivers/mmc/kona_sdhci.c b/drivers/mmc/kona_sdhci.c
index 2bbe673..83f1412 100644
--- a/drivers/mmc/kona_sdhci.c
+++ b/drivers/mmc/kona_sdhci.c
@@ -3,7 +3,6 @@
* Copyright 2013 Broadcom Corporation.
*/
-#include <common.h>
#include <malloc.h>
#include <sdhci.h>
#include <linux/delay.h>
diff --git a/drivers/mmc/meson_gx_mmc.c b/drivers/mmc/meson_gx_mmc.c
index fcf4f03..5852b24 100644
--- a/drivers/mmc/meson_gx_mmc.c
+++ b/drivers/mmc/meson_gx_mmc.c
@@ -3,7 +3,6 @@
* (C) Copyright 2016 Carlo Caione <carlo@caione.org>
*/
-#include <common.h>
#include <clk.h>
#include <cpu_func.h>
#include <dm.h>
@@ -288,7 +287,7 @@
mmc_set_clock(mmc, cfg->f_min, MMC_CLK_ENABLE);
-#ifdef CONFIG_MMC_PWRSEQ
+#if CONFIG_IS_ENABLED(MMC_PWRSEQ)
/* Enable power if needed */
ret = mmc_pwrseq_get_power(dev, cfg);
if (!ret) {
diff --git a/drivers/mmc/mmc-pwrseq.c b/drivers/mmc/mmc-pwrseq.c
index 2539f61..a1c9624 100644
--- a/drivers/mmc/mmc-pwrseq.c
+++ b/drivers/mmc/mmc-pwrseq.c
@@ -4,7 +4,6 @@
* Jaehoon Chung <jh80.chung@samsung.com>
*/
-#include <common.h>
#include <dm.h>
#include <mmc.h>
#include <pwrseq.h>
diff --git a/drivers/mmc/mmc-uclass.c b/drivers/mmc/mmc-uclass.c
index 3284568..da6a39b 100644
--- a/drivers/mmc/mmc-uclass.c
+++ b/drivers/mmc/mmc-uclass.c
@@ -7,7 +7,6 @@
#define LOG_CATEGORY UCLASS_MMC
-#include <common.h>
#include <bootdev.h>
#include <log.h>
#include <mmc.h>
@@ -112,7 +111,7 @@
return dm_mmc_get_cd(mmc->dev);
}
-#ifdef MMC_SUPPORTS_TUNING
+#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING)
static int dm_mmc_execute_tuning(struct udevice *dev, uint opcode)
{
struct dm_mmc_ops *ops = mmc_get_ops(dev);
@@ -124,7 +123,13 @@
int mmc_execute_tuning(struct mmc *mmc, uint opcode)
{
- return dm_mmc_execute_tuning(mmc->dev, opcode);
+ int ret;
+
+ mmc->tuning = true;
+ ret = dm_mmc_execute_tuning(mmc->dev, opcode);
+ mmc->tuning = false;
+
+ return ret;
}
#endif
@@ -251,11 +256,14 @@
if (dev_read_bool(dev, "mmc-hs200-1_2v"))
cfg->host_caps |= MMC_CAP(MMC_HS_200);
if (dev_read_bool(dev, "mmc-hs400-1_8v"))
- cfg->host_caps |= MMC_CAP(MMC_HS_400);
+ cfg->host_caps |= MMC_CAP(MMC_HS_400) | MMC_CAP(MMC_HS_200);
if (dev_read_bool(dev, "mmc-hs400-1_2v"))
- cfg->host_caps |= MMC_CAP(MMC_HS_400);
+ cfg->host_caps |= MMC_CAP(MMC_HS_400) | MMC_CAP(MMC_HS_200);
if (dev_read_bool(dev, "mmc-hs400-enhanced-strobe"))
cfg->host_caps |= MMC_CAP(MMC_HS_400_ES);
+ if (dev_read_bool(dev, "no-mmc-hs400"))
+ cfg->host_caps &= ~(MMC_CAP(MMC_HS_400) |
+ MMC_CAP(MMC_HS_400_ES));
if (dev_read_bool(dev, "non-removable")) {
cfg->host_caps |= MMC_CAP_NONREMOVABLE;
@@ -494,10 +502,7 @@
if (ret) {
debug("Probing %s failed (err=%d)\n", dev->name, ret);
- if (CONFIG_IS_ENABLED(MMC_UHS_SUPPORT) ||
- CONFIG_IS_ENABLED(MMC_HS200_SUPPORT) ||
- CONFIG_IS_ENABLED(MMC_HS400_SUPPORT))
- mmc_deinit(mmc);
+ mmc_deinit(mmc);
return ret;
}
@@ -505,9 +510,6 @@
return 0;
}
-#if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT) || \
- CONFIG_IS_ENABLED(MMC_HS200_SUPPORT) || \
- CONFIG_IS_ENABLED(MMC_HS400_SUPPORT)
static int mmc_blk_remove(struct udevice *dev)
{
struct udevice *mmc_dev = dev_get_parent(dev);
@@ -516,7 +518,6 @@
return mmc_deinit(mmc);
}
-#endif
static const struct blk_ops mmc_blk_ops = {
.read = mmc_bread,
@@ -532,12 +533,8 @@
.id = UCLASS_BLK,
.ops = &mmc_blk_ops,
.probe = mmc_blk_probe,
-#if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT) || \
- CONFIG_IS_ENABLED(MMC_HS200_SUPPORT) || \
- CONFIG_IS_ENABLED(MMC_HS400_SUPPORT)
.remove = mmc_blk_remove,
.flags = DM_FLAG_OS_PREPARE,
-#endif
};
#endif /* CONFIG_BLK */
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index d96db7a..b18dc33 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -8,7 +8,6 @@
*/
#include <config.h>
-#include <common.h>
#include <blk.h>
#include <command.h>
#include <dm.h>
@@ -17,6 +16,7 @@
#include <errno.h>
#include <mmc.h>
#include <part.h>
+#include <time.h>
#include <linux/bitops.h>
#include <linux/delay.h>
#include <linux/printk.h>
@@ -24,6 +24,7 @@
#include <malloc.h>
#include <memalign.h>
#include <linux/list.h>
+#include <linux/printk.h>
#include <div64.h>
#include "mmc_private.h"
@@ -329,7 +330,7 @@
MMC_QUIRK_RETRY_SET_BLOCKLEN, 4);
}
-#ifdef MMC_SUPPORTS_TUNING
+#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING)
static const u8 tuning_blk_pattern_4bit[] = {
0xff, 0x0f, 0xff, 0x00, 0xff, 0xcc, 0xc3, 0xcc,
0xc3, 0x3c, 0xcc, 0xff, 0xfe, 0xff, 0xfe, 0xef,
@@ -360,7 +361,7 @@
0xff, 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee,
};
-int mmc_send_tuning(struct mmc *mmc, u32 opcode, int *cmd_error)
+int mmc_send_tuning(struct mmc *mmc, u32 opcode)
{
struct mmc_cmd cmd;
struct mmc_data data;
@@ -1570,13 +1571,20 @@
return 0;
}
#endif
-/* frequency bases */
-/* divided by 10 to be nice to platforms without floating point */
+/*
+ * TRAN_SPEED bits 0:2 encode the frequency unit:
+ * 0 = 100KHz, 1 = 1MHz, 2 = 10MHz, 3 = 100MHz, values 4 - 7 are reserved.
+ * The values in fbase[] are divided by 10 to avoid floats in multiplier[].
+ */
static const int fbase[] = {
10000,
100000,
1000000,
10000000,
+ 0, /* reserved */
+ 0, /* reserved */
+ 0, /* reserved */
+ 0, /* reserved */
};
/* Multiplier values for TRAN_SPEED. Multiplied by 10 to be nice
@@ -1614,7 +1622,7 @@
}
#if !CONFIG_IS_ENABLED(DM_MMC)
-#ifdef MMC_SUPPORTS_TUNING
+#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING)
static int mmc_execute_tuning(struct mmc *mmc, uint opcode)
{
return -ENOTSUPP;
@@ -1695,7 +1703,7 @@
struct mode_width_tuning {
enum bus_mode mode;
uint widths;
-#ifdef MMC_SUPPORTS_TUNING
+#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING)
uint tuning;
#endif
};
@@ -1736,7 +1744,7 @@
#if !CONFIG_IS_ENABLED(MMC_TINY)
static const struct mode_width_tuning sd_modes_by_pref[] = {
#if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT)
-#ifdef MMC_SUPPORTS_TUNING
+#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING)
{
.mode = UHS_SDR104,
.widths = MMC_MODE_4BIT | MMC_MODE_1BIT,
@@ -1839,7 +1847,7 @@
mmc_set_clock(mmc, mmc->tran_speed,
MMC_CLK_ENABLE);
-#ifdef MMC_SUPPORTS_TUNING
+#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING)
/* execute tuning if needed */
if (mwt->tuning && !mmc_host_is_spi(mmc)) {
err = mmc_execute_tuning(mmc,
@@ -2027,9 +2035,9 @@
mmc_set_clock(mmc, mmc->tran_speed, false);
/* execute tuning if needed */
- mmc->hs400_tuning = 1;
+ mmc->hs400_tuning = true;
err = mmc_execute_tuning(mmc, MMC_CMD_SEND_TUNING_BLOCK_HS200);
- mmc->hs400_tuning = 0;
+ mmc->hs400_tuning = false;
if (err) {
debug("tuning failed\n");
return err;
@@ -2217,7 +2225,7 @@
mmc_select_mode(mmc, mwt->mode);
mmc_set_clock(mmc, mmc->tran_speed,
MMC_CLK_ENABLE);
-#ifdef MMC_SUPPORTS_TUNING
+#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING)
/* execute tuning if needed */
if (mwt->tuning) {
@@ -2250,6 +2258,16 @@
return -ENOTSUPP;
}
+#else
+static int sd_select_mode_and_width(struct mmc *mmc, uint card_caps)
+{
+ return 0;
+};
+
+static int mmc_select_mode_and_width(struct mmc *mmc, uint card_caps)
+{
+ return 0;
+};
#endif
#if CONFIG_IS_ENABLED(MMC_TINY)
@@ -2560,6 +2578,8 @@
mult = multipliers[((cmd.response[0] >> 3) & 0xf)];
mmc->legacy_speed = freq * mult;
+ if (!mmc->legacy_speed)
+ log_debug("TRAN_SPEED: reserved value");
mmc_select_mode(mmc, MMC_LEGACY);
mmc->dsr_imp = ((cmd.response[1] >> 12) & 0x1);
@@ -3010,13 +3030,15 @@
return err;
}
-#if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT) || \
- CONFIG_IS_ENABLED(MMC_HS200_SUPPORT) || \
- CONFIG_IS_ENABLED(MMC_HS400_SUPPORT)
int mmc_deinit(struct mmc *mmc)
{
u32 caps_filtered;
+ if (!CONFIG_IS_ENABLED(MMC_UHS_SUPPORT) &&
+ !CONFIG_IS_ENABLED(MMC_HS200_SUPPORT) &&
+ !CONFIG_IS_ENABLED(MMC_HS400_SUPPORT))
+ return 0;
+
if (!mmc->has_init)
return 0;
@@ -3034,7 +3056,6 @@
return mmc_select_mode_and_width(mmc, caps_filtered);
}
}
-#endif
int mmc_set_dsr(struct mmc *mmc, u16 val)
{
diff --git a/drivers/mmc/mmc_boot.c b/drivers/mmc/mmc_boot.c
index 0a74b1f..367c957 100644
--- a/drivers/mmc/mmc_boot.c
+++ b/drivers/mmc/mmc_boot.c
@@ -4,7 +4,6 @@
* Written by Amar <amarendra.xt@samsung.com>
*/
-#include <common.h>
#include <log.h>
#include <mmc.h>
#include "mmc_private.h"
diff --git a/drivers/mmc/mmc_bootdev.c b/drivers/mmc/mmc_bootdev.c
index 55ecead..5a1688b 100644
--- a/drivers/mmc/mmc_bootdev.c
+++ b/drivers/mmc/mmc_bootdev.c
@@ -6,7 +6,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <bootdev.h>
#include <dm.h>
#include <mmc.h>
diff --git a/drivers/mmc/mmc_legacy.c b/drivers/mmc/mmc_legacy.c
index a101ee4..a87d227 100644
--- a/drivers/mmc/mmc_legacy.c
+++ b/drivers/mmc/mmc_legacy.c
@@ -5,7 +5,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <log.h>
#include <malloc.h>
#include <mmc.h>
diff --git a/drivers/mmc/mmc_spi.c b/drivers/mmc/mmc_spi.c
index bcea800..675e642 100644
--- a/drivers/mmc/mmc_spi.c
+++ b/drivers/mmc/mmc_spi.c
@@ -6,7 +6,6 @@
*
* Licensed under the GPL-2 or later.
*/
-#include <common.h>
#include <errno.h>
#include <log.h>
#include <malloc.h>
diff --git a/drivers/mmc/mmc_write.c b/drivers/mmc/mmc_write.c
index a6f9338..c023d15 100644
--- a/drivers/mmc/mmc_write.c
+++ b/drivers/mmc/mmc_write.c
@@ -7,7 +7,6 @@
*/
#include <config.h>
-#include <common.h>
#include <blk.h>
#include <dm.h>
#include <part.h>
diff --git a/drivers/mmc/msm_sdhci.c b/drivers/mmc/msm_sdhci.c
index 059cb3d..4ce0de6 100644
--- a/drivers/mmc/msm_sdhci.c
+++ b/drivers/mmc/msm_sdhci.c
@@ -7,7 +7,6 @@
* Based on Linux driver
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <malloc.h>
@@ -33,9 +32,6 @@
#define SDCC_MCI_STATUS2_MCI_ACT 0x1
#define SDCC_MCI_HC_MODE 0x78
-/* Non standard (?) SDHCI register */
-#define SDHCI_VENDOR_SPEC_CAPABILITIES0 0x11c
-
struct msm_sdhc_plat {
struct mmc_config cfg;
struct mmc mmc;
@@ -49,6 +45,8 @@
struct msm_sdhc_variant_info {
bool mci_removed;
+
+ u32 core_vendor_spec_capabilities0;
};
DECLARE_GLOBAL_DATA_PTR;
@@ -63,7 +61,7 @@
ret = ofnode_read_u32(node, "clock-frequency", (uint *)(&clk_rate));
if (ret)
- clk_rate = 400000;
+ clk_rate = 201500000;
ret = clk_get_bulk(dev, &prv->clks);
if (ret) {
@@ -174,6 +172,8 @@
core_minor = core_version & SDCC_VERSION_MINOR_MASK;
+ log_debug("SDCC version %d.%d\n", core_major, core_minor);
+
/*
* Support for some capabilities is not advertised by newer
* controller versions and must be explicitly enabled.
@@ -181,7 +181,7 @@
if (core_major >= 1 && core_minor != 0x11 && core_minor != 0x12) {
caps = readl(host->ioaddr + SDHCI_CAPABILITIES);
caps |= SDHCI_CAN_VDD_300 | SDHCI_CAN_DO_8BIT;
- writel(caps, host->ioaddr + SDHCI_VENDOR_SPEC_CAPABILITIES0);
+ writel(caps, host->ioaddr + var_info->core_vendor_spec_capabilities0);
}
ret = mmc_of_parse(dev, &plat->cfg);
@@ -207,7 +207,7 @@
var_info = (void *)dev_get_driver_data(dev);
/* Disable host-controller mode */
- if (!var_info->mci_removed)
+ if (!var_info->mci_removed && priv->base)
writel(0, priv->base + SDCC_MCI_HC_MODE);
clk_release_bulk(&priv->clks);
@@ -217,21 +217,31 @@
static int msm_of_to_plat(struct udevice *dev)
{
- struct udevice *parent = dev->parent;
struct msm_sdhc *priv = dev_get_priv(dev);
+ const struct msm_sdhc_variant_info *var_info;
struct sdhci_host *host = &priv->host;
- int node = dev_of_offset(dev);
+ int ret;
+
+ var_info = (void*)dev_get_driver_data(dev);
host->name = strdup(dev->name);
host->ioaddr = dev_read_addr_ptr(dev);
- host->bus_width = fdtdec_get_int(gd->fdt_blob, node, "bus-width", 4);
- host->index = fdtdec_get_uint(gd->fdt_blob, node, "index", 0);
- priv->base = (void *)fdtdec_get_addr_size_auto_parent(gd->fdt_blob,
- dev_of_offset(parent), node, "reg", 1, NULL, false);
- if (priv->base == (void *)FDT_ADDR_T_NONE ||
- host->ioaddr == (void *)FDT_ADDR_T_NONE)
+ ret = dev_read_u32(dev, "bus-width", &host->bus_width);
+ if (ret)
+ host->bus_width = 4;
+ ret = dev_read_u32(dev, "index", &host->index);
+ if (ret)
+ host->index = 0;
+ priv->base = dev_read_addr_index_ptr(dev, 1);
+
+ if (!host->ioaddr)
return -EINVAL;
+ if (!var_info->mci_removed && !priv->base) {
+ printf("msm_sdhci: MCI base address not found\n");
+ return -EINVAL;
+ }
+
return 0;
}
@@ -244,10 +254,14 @@
static const struct msm_sdhc_variant_info msm_sdhc_mci_var = {
.mci_removed = false,
+
+ .core_vendor_spec_capabilities0 = 0x11c,
};
static const struct msm_sdhc_variant_info msm_sdhc_v5_var = {
.mci_removed = true,
+
+ .core_vendor_spec_capabilities0 = 0x21c,
};
static const struct udevice_id msm_mmc_ids[] = {
diff --git a/drivers/mmc/mtk-sd.c b/drivers/mmc/mtk-sd.c
index 5a0c61d..3a92582 100644
--- a/drivers/mmc/mtk-sd.c
+++ b/drivers/mmc/mtk-sd.c
@@ -7,7 +7,6 @@
*/
#include <clk.h>
-#include <common.h>
#include <dm.h>
#include <mmc.h>
#include <errno.h>
@@ -1011,7 +1010,7 @@
#endif
}
-#ifdef MMC_SUPPORTS_TUNING
+#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING)
static u32 test_delay_bit(u32 delay, u32 bit)
{
bit %= PAD_DELAY_MAX;
@@ -1131,7 +1130,7 @@
i << PAD_CMD_TUNE_RX_DLY3_S);
for (j = 0; j < 3; j++) {
- mmc_send_tuning(mmc, opcode, &cmd_err);
+ cmd_err = mmc_send_tuning(mmc, opcode);
if (!cmd_err) {
cmd_delay |= (1 << i);
} else {
@@ -1181,7 +1180,7 @@
i << MSDC_PAD_TUNE_CMDRDLY_S);
for (j = 0; j < 3; j++) {
- mmc_send_tuning(mmc, opcode, &cmd_err);
+ cmd_err = mmc_send_tuning(mmc, opcode);
if (!cmd_err) {
rise_delay |= (1 << i);
} else {
@@ -1203,7 +1202,7 @@
i << MSDC_PAD_TUNE_CMDRDLY_S);
for (j = 0; j < 3; j++) {
- mmc_send_tuning(mmc, opcode, &cmd_err);
+ cmd_err = mmc_send_tuning(mmc, opcode);
if (!cmd_err) {
fall_delay |= (1 << i);
} else {
@@ -1238,7 +1237,7 @@
clrsetbits_le32(tune_reg, MSDC_PAD_TUNE_CMDRRDLY_M,
i << MSDC_PAD_TUNE_CMDRRDLY_S);
- mmc_send_tuning(mmc, opcode, &cmd_err);
+ cmd_err = mmc_send_tuning(mmc, opcode);
if (!cmd_err)
internal_delay |= (1 << i);
}
@@ -1264,7 +1263,6 @@
struct msdc_delay_phase final_rise_delay, final_fall_delay = { 0, };
u8 final_delay, final_maxlen;
void __iomem *tune_reg = &host->base->pad_tune;
- int cmd_err;
int i, ret;
if (host->dev_comp->pad_tune0)
@@ -1277,10 +1275,10 @@
clrsetbits_le32(tune_reg, MSDC_PAD_TUNE_DATRRDLY_M,
i << MSDC_PAD_TUNE_DATRRDLY_S);
- ret = mmc_send_tuning(mmc, opcode, &cmd_err);
+ ret = mmc_send_tuning(mmc, opcode);
if (!ret) {
rise_delay |= (1 << i);
- } else if (cmd_err) {
+ } else {
/* in this case, retune response is needed */
ret = msdc_tune_response(dev, opcode);
if (ret)
@@ -1300,10 +1298,10 @@
clrsetbits_le32(tune_reg, MSDC_PAD_TUNE_DATRRDLY_M,
i << MSDC_PAD_TUNE_DATRRDLY_S);
- ret = mmc_send_tuning(mmc, opcode, &cmd_err);
+ ret = mmc_send_tuning(mmc, opcode);
if (!ret) {
fall_delay |= (1 << i);
- } else if (cmd_err) {
+ } else {
/* in this case, retune response is needed */
ret = msdc_tune_response(dev, opcode);
if (ret)
@@ -1362,7 +1360,7 @@
for (i = 0; i < PAD_DELAY_MAX; i++) {
msdc_set_cmd_delay(host, i);
msdc_set_data_delay(host, i);
- ret = mmc_send_tuning(mmc, opcode, NULL);
+ ret = mmc_send_tuning(mmc, opcode);
if (!ret)
rise_delay |= (1 << i);
}
@@ -1378,7 +1376,7 @@
for (i = 0; i < PAD_DELAY_MAX; i++) {
msdc_set_cmd_delay(host, i);
msdc_set_data_delay(host, i);
- ret = mmc_send_tuning(mmc, opcode, NULL);
+ ret = mmc_send_tuning(mmc, opcode);
if (!ret)
fall_delay |= (1 << i);
}
@@ -1761,7 +1759,7 @@
.set_ios = msdc_ops_set_ios,
.get_cd = msdc_ops_get_cd,
.get_wp = msdc_ops_get_wp,
-#ifdef MMC_SUPPORTS_TUNING
+#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING)
.execute_tuning = msdc_execute_tuning,
#endif
.wait_dat0 = msdc_ops_wait_dat0,
diff --git a/drivers/mmc/mv_sdhci.c b/drivers/mmc/mv_sdhci.c
index dbdd671..2da5334 100644
--- a/drivers/mmc/mv_sdhci.c
+++ b/drivers/mmc/mv_sdhci.c
@@ -3,7 +3,6 @@
* Marvell SD Host Controller Interface
*/
-#include <common.h>
#include <dm.h>
#include <malloc.h>
#include <sdhci.h>
diff --git a/drivers/mmc/mvebu_mmc.c b/drivers/mmc/mvebu_mmc.c
index fea55c6..5af1953 100644
--- a/drivers/mmc/mvebu_mmc.c
+++ b/drivers/mmc/mvebu_mmc.c
@@ -7,7 +7,6 @@
* Written-by: Maen Suleiman, Gerald Kerma
*/
-#include <common.h>
#include <errno.h>
#include <log.h>
#include <malloc.h>
diff --git a/drivers/mmc/mxcmmc.c b/drivers/mmc/mxcmmc.c
index 0057273..1acea6f 100644
--- a/drivers/mmc/mxcmmc.c
+++ b/drivers/mmc/mxcmmc.c
@@ -17,7 +17,6 @@
*/
#include <config.h>
-#include <common.h>
#include <command.h>
#include <mmc.h>
#include <part.h>
diff --git a/drivers/mmc/mxsmmc.c b/drivers/mmc/mxsmmc.c
index 35a8e21..95390a5 100644
--- a/drivers/mmc/mxsmmc.c
+++ b/drivers/mmc/mxsmmc.c
@@ -20,7 +20,6 @@
* Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
*/
-#include <common.h>
#include <log.h>
#include <malloc.h>
#include <mmc.h>
diff --git a/drivers/mmc/nexell_dw_mmc.c b/drivers/mmc/nexell_dw_mmc.c
index 2723e48..2e1ce54 100644
--- a/drivers/mmc/nexell_dw_mmc.c
+++ b/drivers/mmc/nexell_dw_mmc.c
@@ -6,7 +6,6 @@
* (C) Copyright 2019 Stefan Bosch <stefan_b@posteo.net>
*/
-#include <common.h>
#include <dm.h>
#include <dt-structs.h>
#include <dwmmc.h>
diff --git a/drivers/mmc/npcm_sdhci.c b/drivers/mmc/npcm_sdhci.c
index d63521d..dff4732 100644
--- a/drivers/mmc/npcm_sdhci.c
+++ b/drivers/mmc/npcm_sdhci.c
@@ -3,7 +3,6 @@
* Copyright (c) 2022 Nuvoton Technology Corp.
*/
-#include <common.h>
#include <dm.h>
#include <sdhci.h>
#include <clk.h>
diff --git a/drivers/mmc/octeontx_hsmmc.c b/drivers/mmc/octeontx_hsmmc.c
index 4ee62df..3b5e122 100644
--- a/drivers/mmc/octeontx_hsmmc.c
+++ b/drivers/mmc/octeontx_hsmmc.c
@@ -794,7 +794,7 @@
u8 desired_ctype = 0;
if (IS_MMC(mmc)) {
-#ifdef MMC_SUPPORTS_TUNING
+#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING)
if (cmd->cmdidx == MMC_CMD_SEND_TUNING_BLOCK_HS200) {
if (cmd->resp_type == MMC_RSP_R1)
cr.rtype_xor = 1;
@@ -1631,7 +1631,7 @@
return octeontx_mmc_send_cmd(dev_to_mmc(dev), cmd, data);
}
-#ifdef MMC_SUPPORTS_TUNING
+#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING)
static int octeontx_mmc_test_cmd(struct mmc *mmc, u32 opcode, int *statp)
{
struct mmc_cmd cmd;
@@ -1653,6 +1653,12 @@
return err;
}
+static int octeontx_mmc_send_tuning(struct mmc *mmc, u32 opcode, int *error)
+{
+ *error = 0;
+ return mmc_send_tuning(mmc, opcode);
+}
+
static int octeontx_mmc_test_get_ext_csd(struct mmc *mmc, u32 opcode,
int *statp)
{
@@ -2006,7 +2012,7 @@
{ "CMD_IN", 48, octeontx_mmc_test_cmd, MMC_CMD_SEND_STATUS,
false, false, false, 2, },
/* { "CMD_OUT", 32, octeontx_mmc_test_cmd, MMC_CMD_SEND_STATUS, },*/
- { "DATA_IN(HS200)", 16, mmc_send_tuning,
+ { "DATA_IN(HS200)", 16, octeontx_mmc_send_tuning,
MMC_CMD_SEND_TUNING_BLOCK_HS200, false, true, false, 2, },
{ "DATA_IN", 16, octeontx_mmc_test_get_ext_csd, 0, false, false,
true, 2, },
@@ -2415,12 +2421,12 @@
return 0;
}
-#else /* MMC_SUPPORTS_TUNING */
+#else /* CONFIG_MMC_SUPPORTS_TUNING */
static void octeontx_mmc_set_emm_timing(struct mmc *mmc,
union mio_emm_timing emm_timing)
{
}
-#endif /* MMC_SUPPORTS_TUNING */
+#endif /* CONFIG_MMC_SUPPORTS_TUNING */
/**
* Calculate the clock period with rounding up
@@ -2567,7 +2573,7 @@
err = octeontx_mmc_configure_delay(mmc);
-#ifdef MMC_SUPPORTS_TUNING
+#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING)
if (!err && mmc->selected_mode == MMC_HS_400 && !slot->hs400_tuned) {
debug("%s: Tuning HS400 mode\n", __func__);
err = octeontx_tune_hs400(mmc);
@@ -3770,7 +3776,7 @@
.set_ios = octeontx_mmc_set_ios,
.get_cd = octeontx_mmc_get_cd,
.get_wp = octeontx_mmc_get_wp,
-#ifdef MMC_SUPPORTS_TUNING
+#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING)
.execute_tuning = octeontx_mmc_execute_tuning,
#endif
};
diff --git a/drivers/mmc/omap_hsmmc.c b/drivers/mmc/omap_hsmmc.c
index a2595d1..2b7f9fc 100644
--- a/drivers/mmc/omap_hsmmc.c
+++ b/drivers/mmc/omap_hsmmc.c
@@ -23,7 +23,6 @@
*/
#include <config.h>
-#include <common.h>
#include <cpu_func.h>
#include <log.h>
#include <malloc.h>
@@ -577,7 +576,7 @@
return val;
}
-#ifdef MMC_SUPPORTS_TUNING
+#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING)
static void omap_hsmmc_disable_tuning(struct mmc *mmc)
{
struct hsmmc *mmc_base;
@@ -666,7 +665,7 @@
while (phase_delay <= MAX_PHASE_DELAY) {
omap_hsmmc_set_dll(mmc, phase_delay);
- cur_match = !mmc_send_tuning(mmc, opcode, NULL);
+ cur_match = !mmc_send_tuning(mmc, opcode);
if (cur_match) {
if (prev_match) {
@@ -731,7 +730,7 @@
*/
for (i = 3; i <= 10; i++) {
omap_hsmmc_set_dll(mmc, phase_delay + i);
- if (mmc_send_tuning(mmc, opcode, NULL)) {
+ if (mmc_send_tuning(mmc, opcode)) {
if (temperature < 10000)
phase_delay += i + 6;
else if (temperature < 20000)
@@ -749,7 +748,7 @@
for (i = 2; i >= -10; i--) {
omap_hsmmc_set_dll(mmc, phase_delay + i);
- if (mmc_send_tuning(mmc, opcode, NULL)) {
+ if (mmc_send_tuning(mmc, opcode)) {
if (temperature < 10000)
phase_delay += i + 12;
else if (temperature < 20000)
@@ -1518,7 +1517,7 @@
.get_cd = omap_hsmmc_getcd,
.get_wp = omap_hsmmc_getwp,
#endif
-#ifdef MMC_SUPPORTS_TUNING
+#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING)
.execute_tuning = omap_hsmmc_execute_tuning,
#endif
.wait_dat0 = omap_hsmmc_wait_dat0,
diff --git a/drivers/mmc/owl_mmc.c b/drivers/mmc/owl_mmc.c
index e84171a..bd4906f 100644
--- a/drivers/mmc/owl_mmc.c
+++ b/drivers/mmc/owl_mmc.c
@@ -11,7 +11,6 @@
* channel, and those special bits used in this driver is picked from vendor
* source exclusively for MMC/SD.
*/
-#include <common.h>
#include <clk.h>
#include <cpu_func.h>
#include <dm.h>
diff --git a/drivers/mmc/pci_mmc.c b/drivers/mmc/pci_mmc.c
index 4d163cc..d446c55 100644
--- a/drivers/mmc/pci_mmc.c
+++ b/drivers/mmc/pci_mmc.c
@@ -4,7 +4,6 @@
* Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <log.h>
diff --git a/drivers/mmc/piton_mmc.c b/drivers/mmc/piton_mmc.c
index a330bbf..fed1f84 100644
--- a/drivers/mmc/piton_mmc.c
+++ b/drivers/mmc/piton_mmc.c
@@ -11,7 +11,6 @@
#include <asm/gpio.h>
#include <asm/io.h>
-#include <common.h>
#include <div64.h>
#include <dm.h>
#include <errno.h>
diff --git a/drivers/mmc/renesas-sdhi.c b/drivers/mmc/renesas-sdhi.c
index 20b1e92..23db2a7 100644
--- a/drivers/mmc/renesas-sdhi.c
+++ b/drivers/mmc/renesas-sdhi.c
@@ -568,8 +568,8 @@
struct mmc *mmc = upriv->mmc;
unsigned int tap_num;
unsigned int taps = 0;
- int i, ret = 0;
- u32 caps;
+ int i, ret = 0, sret;
+ u32 caps, reg;
/* Only supported on Renesas RCar */
if (!(priv->caps & TMIO_SD_CAP_RCAR_UHS))
@@ -605,15 +605,15 @@
caps = priv->caps;
priv->caps &= ~TMIO_SD_CAP_DMA_INTERNAL;
- ret = mmc_send_tuning(mmc, opcode, NULL);
+ ret = mmc_send_tuning(mmc, opcode);
priv->caps = caps;
if (ret == 0)
taps |= BIT(i);
- ret = renesas_sdhi_compare_scc_data(priv);
- if (ret == 0)
+ reg = renesas_sdhi_compare_scc_data(priv);
+ if (reg == 0)
priv->smpcmp |= BIT(i);
mdelay(1);
@@ -624,9 +624,9 @@
* eMMC.
*/
if (ret && (opcode == MMC_CMD_SEND_TUNING_BLOCK_HS200)) {
- ret = mmc_send_stop_transmission(mmc, false);
- if (ret < 0)
- dev_dbg(dev, "Tuning abort fail (%d)\n", ret);
+ sret = mmc_send_stop_transmission(mmc, false);
+ if (sret < 0)
+ dev_dbg(dev, "Tuning abort fail (%d)\n", sret);
}
}
@@ -798,9 +798,12 @@
#if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT) || \
CONFIG_IS_ENABLED(MMC_HS200_SUPPORT) || \
CONFIG_IS_ENABLED(MMC_HS400_SUPPORT)
+ struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
struct tmio_sd_priv *priv = dev_get_priv(dev);
+ struct mmc *mmc = upriv->mmc;
- renesas_sdhi_check_scc_error(dev);
+ if (!mmc->tuning)
+ renesas_sdhi_check_scc_error(dev);
if (cmd->cmdidx == MMC_CMD_SEND_STATUS)
renesas_sdhi_adjust_hs400_mode_enable(priv);
diff --git a/drivers/mmc/rockchip_dw_mmc.c b/drivers/mmc/rockchip_dw_mmc.c
index 72c820e..1a10b70 100644
--- a/drivers/mmc/rockchip_dw_mmc.c
+++ b/drivers/mmc/rockchip_dw_mmc.c
@@ -3,7 +3,6 @@
* Copyright (c) 2013 Google, Inc
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <dt-structs.h>
@@ -145,7 +144,7 @@
host->fifo_mode = priv->fifo_mode;
-#ifdef CONFIG_MMC_PWRSEQ
+#if CONFIG_IS_ENABLED(MMC_PWRSEQ)
/* Enable power if needed */
ret = mmc_pwrseq_get_power(dev, &plat->cfg);
if (!ret) {
diff --git a/drivers/mmc/rockchip_sdhci.c b/drivers/mmc/rockchip_sdhci.c
index 706fb12..35667b8 100644
--- a/drivers/mmc/rockchip_sdhci.c
+++ b/drivers/mmc/rockchip_sdhci.c
@@ -5,7 +5,6 @@
* Rockchip SD Host Controller Interface
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <dm/ofnode.h>
@@ -391,6 +390,8 @@
static int rk3568_sdhci_set_ios_post(struct sdhci_host *host)
{
struct mmc *mmc = host->mmc;
+ struct rockchip_sdhc_plat *plat = dev_get_plat(mmc->dev);
+ struct mmc_config *cfg = &plat->cfg;
u32 reg;
reg = sdhci_readw(host, SDHCI_HOST_CONTROL2);
@@ -437,6 +438,20 @@
sdhci_writew(host, reg, DWCMSHC_EMMC_EMMC_CTRL);
+ /*
+ * Reading more than 4 blocks with a single CMD18 command in PIO mode
+ * triggers Data End Bit Error using a slower mode than HS200. Limit to
+ * reading max 4 blocks in one command when using PIO mode.
+ */
+ if (!(host->flags & USE_DMA)) {
+ if (mmc->selected_mode == MMC_HS_200 ||
+ mmc->selected_mode == MMC_HS_400 ||
+ mmc->selected_mode == MMC_HS_400_ES)
+ cfg->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
+ else
+ cfg->b_max = 4;
+ }
+
return 0;
}
@@ -598,16 +613,6 @@
dev_read_bool(dev, "u-boot,spl-fifo-mode"))
host->flags &= ~USE_DMA;
- /*
- * Reading more than 4 blocks with a single CMD18 command in PIO mode
- * triggers Data End Bit Error on RK3568 and RK3588. Limit to reading
- * max 4 blocks in one command when using PIO mode.
- */
- if (!(host->flags & USE_DMA) &&
- (device_is_compatible(dev, "rockchip,rk3568-dwcmshc") ||
- device_is_compatible(dev, "rockchip,rk3588-dwcmshc")))
- cfg->b_max = 4;
-
return sdhci_probe(dev);
}
diff --git a/drivers/mmc/rpmb.c b/drivers/mmc/rpmb.c
index b68d985..0658ce2 100644
--- a/drivers/mmc/rpmb.c
+++ b/drivers/mmc/rpmb.c
@@ -8,7 +8,6 @@
*/
#include <config.h>
-#include <common.h>
#include <log.h>
#include <memalign.h>
#include <mmc.h>
diff --git a/drivers/mmc/s5p_sdhci.c b/drivers/mmc/s5p_sdhci.c
index 3b74fea..80dbb38 100644
--- a/drivers/mmc/s5p_sdhci.c
+++ b/drivers/mmc/s5p_sdhci.c
@@ -4,7 +4,6 @@
* Jaehoon Chung <jh80.chung@samsung.com>
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <malloc.h>
diff --git a/drivers/mmc/sandbox_mmc.c b/drivers/mmc/sandbox_mmc.c
index 0ba7940..a24520f 100644
--- a/drivers/mmc/sandbox_mmc.c
+++ b/drivers/mmc/sandbox_mmc.c
@@ -4,7 +4,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <fdtdec.h>
diff --git a/drivers/mmc/sdhci-adma.c b/drivers/mmc/sdhci-adma.c
index 8213223..fdb189d 100644
--- a/drivers/mmc/sdhci-adma.c
+++ b/drivers/mmc/sdhci-adma.c
@@ -3,15 +3,15 @@
* SDHCI ADMA2 helper functions.
*/
-#include <common.h>
#include <cpu_func.h>
#include <sdhci.h>
#include <malloc.h>
#include <asm/cache.h>
-static void sdhci_adma_desc(struct sdhci_adma_desc *desc,
- dma_addr_t addr, u16 len, bool end)
+void sdhci_adma_write_desc(struct sdhci_host *host, void **next_desc,
+ dma_addr_t addr, int len, bool end)
{
+ struct sdhci_adma_desc *desc = *next_desc;
u8 attr;
attr = ADMA_DESC_ATTR_VALID | ADMA_DESC_TRANSFER_DATA;
@@ -19,17 +19,30 @@
attr |= ADMA_DESC_ATTR_END;
desc->attr = attr;
- desc->len = len;
+ desc->len = len & 0xffff;
desc->reserved = 0;
desc->addr_lo = lower_32_bits(addr);
-#ifdef CONFIG_DMA_ADDR_T_64BIT
+#ifdef CONFIG_MMC_SDHCI_ADMA_64BIT
desc->addr_hi = upper_32_bits(addr);
#endif
+
+ *next_desc += ADMA_DESC_LEN;
+}
+
+static inline void __sdhci_adma_write_desc(struct sdhci_host *host,
+ void **desc, dma_addr_t addr,
+ int len, bool end)
+{
+ if (host && host->ops && host->ops->adma_write_desc)
+ host->ops->adma_write_desc(host, desc, addr, len, end);
+ else
+ sdhci_adma_write_desc(host, desc, addr, len, end);
}
/**
* sdhci_prepare_adma_table() - Populate the ADMA table
*
+ * @host: Pointer to the sdhci_host
* @table: Pointer to the ADMA table
* @data: Pointer to MMC data
* @addr: DMA address to write to or read from
@@ -39,25 +52,26 @@
* Please note, that the table size depends on CONFIG_SYS_MMC_MAX_BLK_COUNT and
* we don't have to check for overflow.
*/
-void sdhci_prepare_adma_table(struct sdhci_adma_desc *table,
- struct mmc_data *data, dma_addr_t addr)
+void sdhci_prepare_adma_table(struct sdhci_host *host,
+ struct sdhci_adma_desc *table,
+ struct mmc_data *data, dma_addr_t start_addr)
{
+ dma_addr_t addr = start_addr;
uint trans_bytes = data->blocksize * data->blocks;
- uint desc_count = DIV_ROUND_UP(trans_bytes, ADMA_MAX_LEN);
- struct sdhci_adma_desc *desc = table;
- int i = desc_count;
+ void *next_desc = table;
+ int i = DIV_ROUND_UP(trans_bytes, ADMA_MAX_LEN);
while (--i) {
- sdhci_adma_desc(desc, addr, ADMA_MAX_LEN, false);
+ __sdhci_adma_write_desc(host, &next_desc, addr,
+ ADMA_MAX_LEN, false);
addr += ADMA_MAX_LEN;
trans_bytes -= ADMA_MAX_LEN;
- desc++;
}
- sdhci_adma_desc(desc, addr, trans_bytes, true);
+ __sdhci_adma_write_desc(host, &next_desc, addr, trans_bytes, true);
- flush_cache((dma_addr_t)table,
- ROUND(desc_count * sizeof(struct sdhci_adma_desc),
+ flush_cache((phys_addr_t)table,
+ ROUND(next_desc - (void *)table,
ARCH_DMA_MINALIGN));
}
diff --git a/drivers/mmc/sdhci-cadence.c b/drivers/mmc/sdhci-cadence.c
index 327a05a..07ec35a0 100644
--- a/drivers/mmc/sdhci-cadence.c
+++ b/drivers/mmc/sdhci-cadence.c
@@ -4,7 +4,6 @@
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*/
-#include <common.h>
#include <dm.h>
#include <asm/global_data.h>
#include <dm/device_compat.h>
@@ -224,7 +223,7 @@
for (i = 0; i < SDHCI_CDNS_MAX_TUNING_LOOP; i++) {
if (sdhci_cdns_set_tune_val(plat, i) ||
- mmc_send_tuning(mmc, opcode, NULL)) { /* bad */
+ mmc_send_tuning(mmc, opcode)) { /* bad */
cur_streak = 0;
} else { /* good */
cur_streak++;
@@ -274,7 +273,7 @@
host->ops = &sdhci_cdns_ops;
host->quirks |= SDHCI_QUIRK_WAIT_SEND_CMD;
sdhci_cdns_mmc_ops = sdhci_ops;
-#ifdef MMC_SUPPORTS_TUNING
+#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING)
sdhci_cdns_mmc_ops.execute_tuning = sdhci_cdns_execute_tuning;
#endif
diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
index 0178ed8..560b7e8 100644
--- a/drivers/mmc/sdhci.c
+++ b/drivers/mmc/sdhci.c
@@ -7,7 +7,6 @@
* Murray.Jensen@cmst.csiro.au, 27-Jan-01.
*/
-#include <common.h>
#include <cpu_func.h>
#include <dm.h>
#include <errno.h>
@@ -15,6 +14,7 @@
#include <malloc.h>
#include <mmc.h>
#include <sdhci.h>
+#include <time.h>
#include <asm/cache.h>
#include <linux/bitops.h>
#include <linux/delay.h>
@@ -111,7 +111,7 @@
}
#if CONFIG_IS_ENABLED(MMC_SDHCI_ADMA)
else if (host->flags & (USE_ADMA | USE_ADMA64)) {
- sdhci_prepare_adma_table(host->adma_desc_table, data,
+ sdhci_prepare_adma_table(host, host->adma_desc_table, data,
host->start_addr);
sdhci_writel(host, lower_32_bits(host->adma_addr),
@@ -351,7 +351,7 @@
return -ECOMM;
}
-#if defined(CONFIG_DM_MMC) && defined(MMC_SUPPORTS_TUNING)
+#if defined(CONFIG_DM_MMC) && CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING)
static int sdhci_execute_tuning(struct udevice *dev, uint opcode)
{
int err;
@@ -848,7 +848,7 @@
.set_ios = sdhci_set_ios,
.get_cd = sdhci_get_cd,
.deferred_probe = sdhci_deferred_probe,
-#ifdef MMC_SUPPORTS_TUNING
+#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING)
.execute_tuning = sdhci_execute_tuning,
#endif
.wait_dat0 = sdhci_wait_dat0,
@@ -897,14 +897,15 @@
__func__);
return -EINVAL;
}
- host->adma_desc_table = sdhci_adma_init();
- host->adma_addr = (dma_addr_t)host->adma_desc_table;
+ if (!host->adma_desc_table) {
+ host->adma_desc_table = sdhci_adma_init();
+ host->adma_addr = virt_to_phys(host->adma_desc_table);
+ }
-#ifdef CONFIG_DMA_ADDR_T_64BIT
- host->flags |= USE_ADMA64;
-#else
- host->flags |= USE_ADMA;
-#endif
+ if (IS_ENABLED(CONFIG_MMC_SDHCI_ADMA_64BIT))
+ host->flags |= USE_ADMA64;
+ else
+ host->flags |= USE_ADMA;
#endif
if (host->quirks & SDHCI_QUIRK_REG32_RW)
host->version =
@@ -929,6 +930,15 @@
debug("%s, caps_1: 0x%x\n", __func__, caps_1);
host->clk_mul = (caps_1 & SDHCI_CLOCK_MUL_MASK) >>
SDHCI_CLOCK_MUL_SHIFT;
+
+ /*
+ * In case the value in Clock Multiplier is 0, then programmable
+ * clock mode is not supported, otherwise the actual clock
+ * multiplier is one more than the value of Clock Multiplier
+ * in the Capabilities Register.
+ */
+ if (host->clk_mul)
+ host->clk_mul += 1;
}
if (host->max_clk == 0) {
diff --git a/drivers/mmc/sh_mmcif.c b/drivers/mmc/sh_mmcif.c
index 76dc1c6..06a30d5 100644
--- a/drivers/mmc/sh_mmcif.c
+++ b/drivers/mmc/sh_mmcif.c
@@ -6,7 +6,6 @@
*/
#include <config.h>
-#include <common.h>
#include <log.h>
#include <watchdog.h>
#include <command.h>
diff --git a/drivers/mmc/snps_dw_mmc.c b/drivers/mmc/snps_dw_mmc.c
index 0134399..9bdbe50 100644
--- a/drivers/mmc/snps_dw_mmc.c
+++ b/drivers/mmc/snps_dw_mmc.c
@@ -7,7 +7,6 @@
* Author: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <dwmmc.h>
diff --git a/drivers/mmc/socfpga_dw_mmc.c b/drivers/mmc/socfpga_dw_mmc.c
index 387cb8b..f738019 100644
--- a/drivers/mmc/socfpga_dw_mmc.c
+++ b/drivers/mmc/socfpga_dw_mmc.c
@@ -3,7 +3,6 @@
* (C) Copyright 2013 Altera Corporation <www.altera.com>
*/
-#include <common.h>
#include <log.h>
#include <asm/arch/clock_manager.h>
#include <asm/arch/secure_reg_helper.h>
diff --git a/drivers/mmc/sti_sdhci.c b/drivers/mmc/sti_sdhci.c
index 23a1dd4..91018b7 100644
--- a/drivers/mmc/sti_sdhci.c
+++ b/drivers/mmc/sti_sdhci.c
@@ -4,7 +4,6 @@
* Author(s): Patrice Chotard, <patrice.chotard@foss.st.com> for STMicroelectronics.
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <mmc.h>
diff --git a/drivers/mmc/stm32_sdmmc2.c b/drivers/mmc/stm32_sdmmc2.c
index a2b111a..9483fb5 100644
--- a/drivers/mmc/stm32_sdmmc2.c
+++ b/drivers/mmc/stm32_sdmmc2.c
@@ -6,7 +6,6 @@
#define LOG_CATEGORY UCLASS_MMC
-#include <common.h>
#include <clk.h>
#include <cpu_func.h>
#include <dm.h>
@@ -220,9 +219,9 @@
if (data->flags & MMC_DATA_READ) {
data_ctrl |= SDMMC_DCTRL_DTDIR;
- idmabase0 = (u32)data->dest;
+ idmabase0 = (u32)(long)data->dest;
} else {
- idmabase0 = (u32)data->src;
+ idmabase0 = (u32)(long)data->src;
}
/* Set the SDMMC DataLength value */
@@ -463,8 +462,8 @@
stm32_sdmmc2_start_cmd(dev, cmd, cmdat, &ctx);
- dev_dbg(dev, "send cmd %d data: 0x%x @ 0x%x\n",
- cmd->cmdidx, data ? ctx.data_length : 0, (unsigned int)data);
+ dev_dbg(dev, "send cmd %d data: 0x%x @ 0x%p\n",
+ cmd->cmdidx, data ? ctx.data_length : 0, data);
ret = stm32_sdmmc2_end_cmd(dev, cmd, &ctx);
@@ -789,6 +788,7 @@
static const struct udevice_id stm32_sdmmc2_ids[] = {
{ .compatible = "st,stm32-sdmmc2" },
+ { .compatible = "st,stm32mp25-sdmmc2" },
{ }
};
diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c
index 714706d..0b56d14 100644
--- a/drivers/mmc/sunxi_mmc.c
+++ b/drivers/mmc/sunxi_mmc.c
@@ -13,7 +13,6 @@
* proper DM_MMC implementation at the end.
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <log.h>
diff --git a/drivers/mmc/tangier_sdhci.c b/drivers/mmc/tangier_sdhci.c
index 1156427..ae65c31 100644
--- a/drivers/mmc/tangier_sdhci.c
+++ b/drivers/mmc/tangier_sdhci.c
@@ -2,7 +2,6 @@
/*
* Copyright (c) 2017 Intel Corporation
*/
-#include <common.h>
#include <dm.h>
#include <dm/device.h>
#include <linux/io.h>
diff --git a/drivers/mmc/tegra_mmc.c b/drivers/mmc/tegra_mmc.c
index c01fb3d..5ed7f01 100644
--- a/drivers/mmc/tegra_mmc.c
+++ b/drivers/mmc/tegra_mmc.c
@@ -7,7 +7,6 @@
*/
#include <bouncebuf.h>
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <log.h>
diff --git a/drivers/mmc/tmio-common.c b/drivers/mmc/tmio-common.c
index 890c496..0b39612 100644
--- a/drivers/mmc/tmio-common.c
+++ b/drivers/mmc/tmio-common.c
@@ -4,7 +4,6 @@
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*/
-#include <common.h>
#include <clk.h>
#include <cpu_func.h>
#include <fdtdec.h>
@@ -299,7 +298,13 @@
struct tmio_sd_priv *priv = dev_get_priv(dev);
long wait = 1000000 + 10 * blocks;
- while (!(tmio_sd_readl(priv, TMIO_SD_DMA_INFO1) & flag)) {
+ for (;;) {
+ if (tmio_sd_readl(priv, TMIO_SD_DMA_INFO1) & flag)
+ break;
+
+ if (tmio_sd_readl(priv, TMIO_SD_INFO1) & TMIO_SD_INFO1_CMP)
+ break;
+
if (wait-- < 0) {
dev_err(dev, "timeout during DMA\n");
return -ETIMEDOUT;
diff --git a/drivers/mmc/uniphier-sd.c b/drivers/mmc/uniphier-sd.c
index 8cde430..5b3650d 100644
--- a/drivers/mmc/uniphier-sd.c
+++ b/drivers/mmc/uniphier-sd.c
@@ -4,7 +4,6 @@
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*/
-#include <common.h>
#include <clk.h>
#include <fdtdec.h>
#include <malloc.h>
diff --git a/drivers/mmc/xenon_sdhci.c b/drivers/mmc/xenon_sdhci.c
index 27dbe04..0e4902f 100644
--- a/drivers/mmc/xenon_sdhci.c
+++ b/drivers/mmc/xenon_sdhci.c
@@ -14,7 +14,6 @@
* Stefan Roese <sr@denx.de>
*/
-#include <common.h>
#include <dm.h>
#include <fdtdec.h>
#include <asm/global_data.h>
diff --git a/drivers/mmc/zynq_sdhci.c b/drivers/mmc/zynq_sdhci.c
index 935540d..898be5a 100644
--- a/drivers/mmc/zynq_sdhci.c
+++ b/drivers/mmc/zynq_sdhci.c
@@ -7,7 +7,6 @@
*/
#include <clk.h>
-#include <common.h>
#include <dm.h>
#include <fdtdec.h>
#include <linux/delay.h>
diff --git a/drivers/mtd/altera_qspi.c b/drivers/mtd/altera_qspi.c
index d31391f..c266158 100644
--- a/drivers/mtd/altera_qspi.c
+++ b/drivers/mtd/altera_qspi.c
@@ -3,7 +3,6 @@
* Copyright (C) 2015 Thomas Chou <thomas@wytron.com.tw>
*/
-#include <common.h>
#include <console.h>
#include <dm.h>
#include <errno.h>
diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
index 8ade794..a7826e8 100644
--- a/drivers/mtd/cfi_flash.c
+++ b/drivers/mtd/cfi_flash.c
@@ -16,7 +16,7 @@
/* The DEBUG define must be before common to enable debugging */
/* #define DEBUG */
-#include <common.h>
+#include <config.h>
#include <console.h>
#include <dm.h>
#include <env.h>
@@ -26,6 +26,7 @@
#include <init.h>
#include <irq_func.h>
#include <log.h>
+#include <time.h>
#include <asm/global_data.h>
#include <asm/processor.h>
#include <asm/io.h>
diff --git a/drivers/mtd/cfi_mtd.c b/drivers/mtd/cfi_mtd.c
index bf4473b..b14d477 100644
--- a/drivers/mtd/cfi_mtd.c
+++ b/drivers/mtd/cfi_mtd.c
@@ -5,7 +5,6 @@
* Written by: Piotr Ziecik <kosmo@semihalf.com>
*/
-#include <common.h>
#include <dma.h>
#include <flash.h>
#include <malloc.h>
diff --git a/drivers/mtd/hbmc-am654.c b/drivers/mtd/hbmc-am654.c
index 8161087..599beda 100644
--- a/drivers/mtd/hbmc-am654.c
+++ b/drivers/mtd/hbmc-am654.c
@@ -3,7 +3,6 @@
// Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com/
// Author: Vignesh Raghavendra <vigneshr@ti.com>
-#include <common.h>
#include <asm/io.h>
#include <dm.h>
#include <regmap.h>
diff --git a/drivers/mtd/jedec_flash.c b/drivers/mtd/jedec_flash.c
index 859c7fd..a832f34 100644
--- a/drivers/mtd/jedec_flash.c
+++ b/drivers/mtd/jedec_flash.c
@@ -11,7 +11,6 @@
/* The DEBUG define must be before common to enable debugging */
/*#define DEBUG*/
-#include <common.h>
#include <flash.h>
#include <log.h>
#include <asm/processor.h>
diff --git a/drivers/mtd/mtd-uclass.c b/drivers/mtd/mtd-uclass.c
index 0743fe7..720bd82 100644
--- a/drivers/mtd/mtd-uclass.c
+++ b/drivers/mtd/mtd-uclass.c
@@ -5,7 +5,6 @@
#define LOG_CATEGORY UCLASS_MTD
-#include <common.h>
#include <dm.h>
#include <dm/device-internal.h>
#include <errno.h>
diff --git a/drivers/mtd/mtd_uboot.c b/drivers/mtd/mtd_uboot.c
index 14ce726..69cb3b5 100644
--- a/drivers/mtd/mtd_uboot.c
+++ b/drivers/mtd/mtd_uboot.c
@@ -3,7 +3,6 @@
* (C) Copyright 2014
* Heiko Schocher, DENX Software Engineering, hs@denx.de.
*/
-#include <common.h>
#include <env.h>
#include <log.h>
#include <malloc.h>
diff --git a/drivers/mtd/mtdpart.c b/drivers/mtd/mtdpart.c
index 4886392..be1d19b 100644
--- a/drivers/mtd/mtdpart.c
+++ b/drivers/mtd/mtdpart.c
@@ -19,7 +19,6 @@
#include <linux/kmod.h>
#endif
-#include <common.h>
#include <malloc.h>
#include <linux/bug.h>
#include <linux/errno.h>
diff --git a/drivers/mtd/nand/bbt.c b/drivers/mtd/nand/bbt.c
index 972aec6..4ff0999 100644
--- a/drivers/mtd/nand/bbt.c
+++ b/drivers/mtd/nand/bbt.c
@@ -9,7 +9,6 @@
#define pr_fmt(fmt) "nand-bbt: " fmt
-#include <common.h>
#include <dm/devres.h>
#include <linux/bitops.h>
#include <linux/mtd/nand.h>
diff --git a/drivers/mtd/nand/core.c b/drivers/mtd/nand/core.c
index f6d9c58..472ad0b 100644
--- a/drivers/mtd/nand/core.c
+++ b/drivers/mtd/nand/core.c
@@ -9,7 +9,6 @@
#define pr_fmt(fmt) "nand: " fmt
-#include <common.h>
#include <watchdog.h>
#ifndef __UBOOT__
#include <linux/compat.h>
diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig
index bb9994b..9f3f126 100644
--- a/drivers/mtd/nand/raw/Kconfig
+++ b/drivers/mtd/nand/raw/Kconfig
@@ -1,6 +1,6 @@
-
menuconfig MTD_RAW_NAND
bool "Raw NAND Device Support"
+
if MTD_RAW_NAND
config SYS_NAND_SELF_INIT
@@ -49,12 +49,12 @@
depends on NAND_ARASAN || NAND_DAVINCI || NAND_KIRKWOOD
config DM_NAND_ATMEL
- bool "Support Atmel NAND controller with DM support"
- select SYS_NAND_SELF_INIT
- imply SYS_NAND_USE_FLASH_BBT
- help
- Enable this driver for NAND flash platforms using an Atmel NAND
- controller.
+ bool "Support Atmel NAND controller with DM support"
+ select SYS_NAND_SELF_INIT
+ imply SYS_NAND_USE_FLASH_BBT
+ help
+ Enable this driver for NAND flash platforms using an Atmel NAND
+ controller.
config NAND_ATMEL
bool "Support Atmel NAND controller"
@@ -133,35 +133,35 @@
Enable support for broadcom nand driver on bcm6753.
config NAND_BRCMNAND_68360
- bool "Support Broadcom NAND controller on bcm68360"
- depends on NAND_BRCMNAND && BCM6856
- help
- Enable support for broadcom nand driver on bcm68360.
+ bool "Support Broadcom NAND controller on bcm68360"
+ depends on NAND_BRCMNAND && BCM6856
+ help
+ Enable support for broadcom nand driver on bcm68360.
config NAND_BRCMNAND_6838
- bool "Support Broadcom NAND controller on bcm6838"
- depends on NAND_BRCMNAND && ARCH_BMIPS && SOC_BMIPS_BCM6838
- help
- Enable support for broadcom nand driver on bcm6838.
+ bool "Support Broadcom NAND controller on bcm6838"
+ depends on NAND_BRCMNAND && ARCH_BMIPS && SOC_BMIPS_BCM6838
+ help
+ Enable support for broadcom nand driver on bcm6838.
config NAND_BRCMNAND_6858
- bool "Support Broadcom NAND controller on bcm6858"
- depends on NAND_BRCMNAND && BCM6858
- help
- Enable support for broadcom nand driver on bcm6858.
+ bool "Support Broadcom NAND controller on bcm6858"
+ depends on NAND_BRCMNAND && BCM6858
+ help
+ Enable support for broadcom nand driver on bcm6858.
config NAND_BRCMNAND_63158
- bool "Support Broadcom NAND controller on bcm63158"
- depends on NAND_BRCMNAND && BCM63158
- help
- Enable support for broadcom nand driver on bcm63158.
+ bool "Support Broadcom NAND controller on bcm63158"
+ depends on NAND_BRCMNAND && BCM63158
+ help
+ Enable support for broadcom nand driver on bcm63158.
config NAND_BRCMNAND_IPROC
- bool "Support Broadcom NAND controller on the iproc family"
- depends on NAND_BRCMNAND
- help
- Enable support for broadcom nand driver on the Broadcom
- iproc family such as Northstar (BCM5301x, BCM4708...)
+ bool "Support Broadcom NAND controller on the iproc family"
+ depends on NAND_BRCMNAND
+ help
+ Enable support for broadcom nand driver on the Broadcom
+ iproc family such as Northstar (BCM5301x, BCM4708...)
config NAND_DAVINCI
bool "Support TI Davinci NAND controller"
@@ -413,10 +413,10 @@
if NAND_VF610_NFC
config NAND_VF610_NFC_DT
- bool "Support Vybrid's vf610 NAND controller as a DT device"
- depends on OF_CONTROL && DM_MTD
- help
- Enable the driver for Vybrid's vf610 NAND flash on platforms
+ bool "Support Vybrid's vf610 NAND controller as a DT device"
+ depends on OF_CONTROL && DM_MTD
+ help
+ Enable the driver for Vybrid's vf610 NAND flash on platforms
using device tree.
choice
@@ -472,11 +472,11 @@
select SPL_NAND_SUPPORT
select SPL_SYS_NAND_SELF_INIT
imply CMD_NAND
- ---help---
- Enable support for NAND. This option enables the standard and
- SPL drivers.
- The SPL driver only supports reading from the NAND using DMA
- transfers.
+ help
+ Enable support for NAND. This option enables the standard and
+ SPL drivers.
+ The SPL driver only supports reading from the NAND using DMA
+ transfers.
if NAND_SUNXI
@@ -504,6 +504,15 @@
controller. This uses the hardware ECC for read and
write operations.
+config NAND_MESON
+ bool "Meson NAND support"
+ select SYS_NAND_SELF_INIT
+ depends on DM_MTD && ARCH_MESON
+ imply CMD_NAND
+ help
+ This enables Nand driver support for Meson raw NAND flash
+ controller.
+
config NAND_MXC
bool "MXC NAND support"
depends on CPU_ARM926EJS || CPU_ARM1136 || MX5
@@ -577,16 +586,16 @@
select SYS_NAND_SELF_INIT
imply CMD_NAND
help
- This enables Nand flash controller hardware found on the OcteonTX
- processors.
+ This enables Nand flash controller hardware found on the OcteonTX
+ processors.
config NAND_OCTEONTX_HW_ECC
bool "Support Hardware ECC for OcteonTX NAND controller"
depends on NAND_OCTEONTX
default y
help
- This enables Hardware BCH engine found on the OcteonTX processors to
- support ECC for NAND flash controller.
+ This enables Hardware BCH engine found on the OcteonTX processors to
+ support ECC for NAND flash controller.
config NAND_STM32_FMC2
bool "Support for NAND controller on STM32MP SoCs"
@@ -751,37 +760,37 @@
config SYS_NAND_U_BOOT_LOCATIONS
bool "Define U-Boot binaries locations in NAND"
help
- Enable CONFIG_SYS_NAND_U_BOOT_OFFS though Kconfig.
- This option should not be enabled when compiling U-Boot for boards
- defining CONFIG_SYS_NAND_U_BOOT_OFFS in their include/configs/<board>.h
- file.
+ Enable CONFIG_SYS_NAND_U_BOOT_OFFS though Kconfig.
+ This option should not be enabled when compiling U-Boot for boards
+ defining CONFIG_SYS_NAND_U_BOOT_OFFS in their include/configs/<board>.h
+ file.
config SYS_NAND_U_BOOT_OFFS
hex "Location in NAND to read U-Boot from"
default 0x800000 if NAND_SUNXI
depends on SYS_NAND_U_BOOT_LOCATIONS
help
- Set the offset from the start of the nand where u-boot should be
- loaded from.
+ Set the offset from the start of the nand where u-boot should be
+ loaded from.
config SYS_NAND_U_BOOT_OFFS_REDUND
hex "Location in NAND to read U-Boot from"
default SYS_NAND_U_BOOT_OFFS
depends on SYS_NAND_U_BOOT_LOCATIONS
help
- Set the offset from the start of the nand where the redundant u-boot
- should be loaded from.
+ Set the offset from the start of the nand where the redundant u-boot
+ should be loaded from.
config SPL_NAND_AM33XX_BCH
bool "Enables SPL-NAND driver which supports ELM based"
depends on SPL_NAND_SUPPORT && NAND_OMAP_GPMC && !OMAP34XX
default y
- help
+ help
Hardware ECC correction. This is useful for platforms which have ELM
hardware engine and use NAND boot mode.
Some legacy platforms like OMAP3xx do not have in-built ELM h/w engine,
so those platforms should use CONFIG_SPL_NAND_SIMPLE for enabling
- SPL-NAND driver with software ECC correction support.
+ SPL-NAND driver with software ECC correction support.
config SPL_NAND_DENALI
bool "Support Denali NAND controller for SPL"
@@ -810,6 +819,6 @@
bool "In SPL, read the OOB first and then the data from NAND"
depends on SPL_NAND_SIMPLE
-endif
+endif # if SPL
-endif # if NAND
+endif # if MTD_RAW_NAND
diff --git a/drivers/mtd/nand/raw/Makefile b/drivers/mtd/nand/raw/Makefile
index ddbba89..46fead6 100644
--- a/drivers/mtd/nand/raw/Makefile
+++ b/drivers/mtd/nand/raw/Makefile
@@ -61,6 +61,7 @@
obj-$(CONFIG_NAND_LPC32XX_MLC) += lpc32xx_nand_mlc.o
obj-$(CONFIG_NAND_LPC32XX_SLC) += lpc32xx_nand_slc.o
obj-$(CONFIG_NAND_VF610_NFC) += vf610_nfc.o
+obj-$(CONFIG_NAND_MESON) += meson_nand.o
obj-$(CONFIG_NAND_MXC) += mxc_nand.o
obj-$(CONFIG_NAND_MXS) += mxs_nand.o
obj-$(CONFIG_NAND_MXS_DT) += mxs_nand_dt.o
diff --git a/drivers/mtd/nand/raw/am335x_spl_bch.c b/drivers/mtd/nand/raw/am335x_spl_bch.c
index 6831af9..64d8ce0 100644
--- a/drivers/mtd/nand/raw/am335x_spl_bch.c
+++ b/drivers/mtd/nand/raw/am335x_spl_bch.c
@@ -9,7 +9,7 @@
* Stefan Roese, DENX Software Engineering, sr@denx.de.
*/
-#include <common.h>
+#include <config.h>
#include <nand.h>
#include <system-constants.h>
#include <asm/io.h>
diff --git a/drivers/mtd/nand/raw/arasan_nfc.c b/drivers/mtd/nand/raw/arasan_nfc.c
index 1476640..4f013ef 100644
--- a/drivers/mtd/nand/raw/arasan_nfc.c
+++ b/drivers/mtd/nand/raw/arasan_nfc.c
@@ -5,7 +5,6 @@
* Copyright (C) 2014 - 2015 Xilinx, Inc.
*/
-#include <common.h>
#include <malloc.h>
#include <asm/io.h>
#include <linux/delay.h>
@@ -1232,7 +1231,8 @@
struct nand_config *nand = &info->config;
struct mtd_info *mtd;
ofnode child;
- int err = -1;
+ int ret;
+ const char *str;
info->reg = dev_read_addr_ptr(dev);
mtd = nand_to_mtd(nand_chip);
@@ -1258,9 +1258,16 @@
writel(0x0, &info->reg->pgm_reg);
/* first scan to find the device and get the page size */
- if (nand_scan_ident(mtd, CONFIG_SYS_NAND_MAX_CHIPS, NULL)) {
+ ret = nand_scan_ident(mtd, CONFIG_SYS_NAND_MAX_CHIPS, NULL);
+ if (ret) {
printf("%s: nand_scan_ident failed\n", __func__);
- goto fail;
+ return ret;
+ }
+
+ str = ofnode_read_string(nand_chip->flash_node, "nand-ecc-mode");
+ if (!str || strcmp(str, "hw") != 0) {
+ printf("%s ecc mode is not supported\n", str);
+ return -EINVAL;
}
nand_chip->ecc.mode = NAND_ECC_HW;
@@ -1282,26 +1289,26 @@
nand_chip->ecc.bytes = 0;
nand_chip->ecc.layout = &ondie_nand_oob_64;
} else {
- if (arasan_nand_ecc_init(mtd)) {
+ ret = arasan_nand_ecc_init(mtd);
+ if (ret) {
printf("%s: nand_ecc_init failed\n", __func__);
- goto fail;
+ return ret;
}
}
- if (nand_scan_tail(mtd)) {
+ ret = nand_scan_tail(mtd);
+ if (ret) {
printf("%s: nand_scan_tail failed\n", __func__);
- goto fail;
+ return ret;
}
- if (nand_register(0, mtd)) {
+ ret = nand_register(0, mtd);
+ if (ret) {
printf("Nand Register Fail\n");
- goto fail;
+ return ret;
}
- return 0;
-fail:
- free(nand);
- return err;
+ return ret;
}
static const struct udevice_id arasan_nand_dt_ids[] = {
diff --git a/drivers/mtd/nand/raw/atmel/nand-controller.c b/drivers/mtd/nand/raw/atmel/nand-controller.c
index 0e04414..ee4ec6d 100644
--- a/drivers/mtd/nand/raw/atmel/nand-controller.c
+++ b/drivers/mtd/nand/raw/atmel/nand-controller.c
@@ -1267,7 +1267,7 @@
return ret;
/*
- * The write cycle timing is directly matching tWC, but is also
+ * The read cycle timing is directly matching tRC, but is also
* dependent on the setup and hold timings we calculated earlier,
* which gives:
*
@@ -1429,8 +1429,6 @@
return nc->caps->ops->setup_data_interface(nand, csline, conf);
}
-#define NAND_KEEP_TIMINGS 0x00800000
-
static void atmel_nand_init(struct atmel_nand_controller *nc,
struct atmel_nand *nand)
{
diff --git a/drivers/mtd/nand/raw/atmel_nand.c b/drivers/mtd/nand/raw/atmel_nand.c
index 6d94e7a..4dbf7b4 100644
--- a/drivers/mtd/nand/raw/atmel_nand.c
+++ b/drivers/mtd/nand/raw/atmel_nand.c
@@ -10,7 +10,7 @@
* (C) Copyright 2012 ATMEL, Hong Xu
*/
-#include <common.h>
+#include <config.h>
#include <log.h>
#include <system-constants.h>
#include <asm/gpio.h>
diff --git a/drivers/mtd/nand/raw/brcmnand/bcm63158_nand.c b/drivers/mtd/nand/raw/brcmnand/bcm63158_nand.c
index 4e6d99f..3f59fbb 100644
--- a/drivers/mtd/nand/raw/brcmnand/bcm63158_nand.c
+++ b/drivers/mtd/nand/raw/brcmnand/bcm63158_nand.c
@@ -1,6 +1,5 @@
// SPDX-License-Identifier: GPL-2.0+
-#include <common.h>
#include <asm/io.h>
#include <memalign.h>
#include <nand.h>
diff --git a/drivers/mtd/nand/raw/brcmnand/bcm6368_nand.c b/drivers/mtd/nand/raw/brcmnand/bcm6368_nand.c
index 6164989..d54de0b 100644
--- a/drivers/mtd/nand/raw/brcmnand/bcm6368_nand.c
+++ b/drivers/mtd/nand/raw/brcmnand/bcm6368_nand.c
@@ -1,6 +1,5 @@
// SPDX-License-Identifier: GPL-2.0+
-#include <common.h>
#include <asm/io.h>
#include <memalign.h>
#include <nand.h>
diff --git a/drivers/mtd/nand/raw/brcmnand/bcm6753_nand.c b/drivers/mtd/nand/raw/brcmnand/bcm6753_nand.c
index feae66e..a101222 100644
--- a/drivers/mtd/nand/raw/brcmnand/bcm6753_nand.c
+++ b/drivers/mtd/nand/raw/brcmnand/bcm6753_nand.c
@@ -1,6 +1,5 @@
// SPDX-License-Identifier: GPL-2.0+
-#include <common.h>
#include <asm/io.h>
#include <memalign.h>
#include <nand.h>
diff --git a/drivers/mtd/nand/raw/brcmnand/bcm68360_nand.c b/drivers/mtd/nand/raw/brcmnand/bcm68360_nand.c
index dbd85af..385642d 100644
--- a/drivers/mtd/nand/raw/brcmnand/bcm68360_nand.c
+++ b/drivers/mtd/nand/raw/brcmnand/bcm68360_nand.c
@@ -1,6 +1,5 @@
// SPDX-License-Identifier: GPL-2.0+
-#include <common.h>
#include <asm/io.h>
#include <memalign.h>
#include <nand.h>
diff --git a/drivers/mtd/nand/raw/brcmnand/bcm6838_nand.c b/drivers/mtd/nand/raw/brcmnand/bcm6838_nand.c
index ef36496..407898d 100644
--- a/drivers/mtd/nand/raw/brcmnand/bcm6838_nand.c
+++ b/drivers/mtd/nand/raw/brcmnand/bcm6838_nand.c
@@ -1,6 +1,5 @@
// SPDX-License-Identifier: GPL-2.0+
-#include <common.h>
#include <asm/io.h>
#include <memalign.h>
#include <nand.h>
diff --git a/drivers/mtd/nand/raw/brcmnand/bcm6858_nand.c b/drivers/mtd/nand/raw/brcmnand/bcm6858_nand.c
index 027fdd3..564c678 100644
--- a/drivers/mtd/nand/raw/brcmnand/bcm6858_nand.c
+++ b/drivers/mtd/nand/raw/brcmnand/bcm6858_nand.c
@@ -1,6 +1,5 @@
// SPDX-License-Identifier: GPL-2.0+
-#include <common.h>
#include <asm/io.h>
#include <memalign.h>
#include <nand.h>
diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
index efbf9a3..b7bf7cc 100644
--- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c
+++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
@@ -12,7 +12,6 @@
* GNU General Public License for more details.
*/
-#include <common.h>
#include <asm/io.h>
#include <memalign.h>
#include <nand.h>
diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand_compat.c b/drivers/mtd/nand/raw/brcmnand/brcmnand_compat.c
index a6acf55..b3b3df5 100644
--- a/drivers/mtd/nand/raw/brcmnand/brcmnand_compat.c
+++ b/drivers/mtd/nand/raw/brcmnand/brcmnand_compat.c
@@ -1,6 +1,5 @@
// SPDX-License-Identifier: GPL-2.0+
-#include <common.h>
#include <dm.h>
#include <malloc.h>
#include <dm/devres.h>
diff --git a/drivers/mtd/nand/raw/brcmnand/iproc_nand.c b/drivers/mtd/nand/raw/brcmnand/iproc_nand.c
index 69711d9..430d6c9 100644
--- a/drivers/mtd/nand/raw/brcmnand/iproc_nand.c
+++ b/drivers/mtd/nand/raw/brcmnand/iproc_nand.c
@@ -4,7 +4,6 @@
* Copyright (C) 2015 Broadcom Corporation
*/
-#include <common.h>
#include <asm/io.h>
#include <memalign.h>
#include <nand.h>
diff --git a/drivers/mtd/nand/raw/cortina_nand.c b/drivers/mtd/nand/raw/cortina_nand.c
index b7be660..06918a4 100644
--- a/drivers/mtd/nand/raw/cortina_nand.c
+++ b/drivers/mtd/nand/raw/cortina_nand.c
@@ -3,7 +3,6 @@
* Copyright (c) 2020, Cortina Access Inc..
*/
-#include <common.h>
#include <linux/delay.h>
#include <linux/bitops.h>
#include <linux/sizes.h>
diff --git a/drivers/mtd/nand/raw/davinci_nand.c b/drivers/mtd/nand/raw/davinci_nand.c
index 71bbb82..d4daf06 100644
--- a/drivers/mtd/nand/raw/davinci_nand.c
+++ b/drivers/mtd/nand/raw/davinci_nand.c
@@ -28,7 +28,7 @@
-
*/
-#include <common.h>
+#include <config.h>
#include <log.h>
#include <linux/mtd/rawnand.h>
#include <asm/io.h>
diff --git a/drivers/mtd/nand/raw/denali.c b/drivers/mtd/nand/raw/denali.c
index c827f80..b240111 100644
--- a/drivers/mtd/nand/raw/denali.c
+++ b/drivers/mtd/nand/raw/denali.c
@@ -5,7 +5,6 @@
* Copyright (C) 2009-2010, Intel Corporation and its suppliers.
*/
-#include <common.h>
#include <dm.h>
#include <malloc.h>
#include <nand.h>
diff --git a/drivers/mtd/nand/raw/denali_spl.c b/drivers/mtd/nand/raw/denali_spl.c
index 165a233..b1e2c9d 100644
--- a/drivers/mtd/nand/raw/denali_spl.c
+++ b/drivers/mtd/nand/raw/denali_spl.c
@@ -4,7 +4,7 @@
* Copyright (C) 2014-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
*/
-#include <common.h>
+#include <config.h>
#include <log.h>
#include <asm/io.h>
#include <asm/unaligned.h>
diff --git a/drivers/mtd/nand/raw/fsl_elbc_nand.c b/drivers/mtd/nand/raw/fsl_elbc_nand.c
index 7853c3f..157330c 100644
--- a/drivers/mtd/nand/raw/fsl_elbc_nand.c
+++ b/drivers/mtd/nand/raw/fsl_elbc_nand.c
@@ -7,7 +7,7 @@
* Scott Wood <scottwood@freescale.com>
*/
-#include <common.h>
+#include <config.h>
#include <command.h>
#include <malloc.h>
#include <nand.h>
diff --git a/drivers/mtd/nand/raw/fsl_elbc_spl.c b/drivers/mtd/nand/raw/fsl_elbc_spl.c
index 26aaab08..17b8ef7 100644
--- a/drivers/mtd/nand/raw/fsl_elbc_spl.c
+++ b/drivers/mtd/nand/raw/fsl_elbc_spl.c
@@ -9,7 +9,7 @@
* Author: Scott Wood <scottwood@freescale.com>
*/
-#include <common.h>
+#include <config.h>
#include <cpu_func.h>
#include <linux/mtd/rawnand.h>
#include <asm/io.h>
diff --git a/drivers/mtd/nand/raw/fsl_ifc_nand.c b/drivers/mtd/nand/raw/fsl_ifc_nand.c
index 1d7c1fd..857d50e 100644
--- a/drivers/mtd/nand/raw/fsl_ifc_nand.c
+++ b/drivers/mtd/nand/raw/fsl_ifc_nand.c
@@ -6,7 +6,7 @@
* Authors: Dipen Dudhat <Dipen.Dudhat@freescale.com>
*/
-#include <common.h>
+#include <config.h>
#include <command.h>
#include <malloc.h>
#include <nand.h>
diff --git a/drivers/mtd/nand/raw/fsl_ifc_spl.c b/drivers/mtd/nand/raw/fsl_ifc_spl.c
index 69d26f1..c2ebee9 100644
--- a/drivers/mtd/nand/raw/fsl_ifc_spl.c
+++ b/drivers/mtd/nand/raw/fsl_ifc_spl.c
@@ -6,7 +6,7 @@
* Author: Dipen Dudhat <dipen.dudhat@freescale.com>
*/
-#include <common.h>
+#include <config.h>
#include <cpu_func.h>
#include <asm/io.h>
#include <fsl_ifc.h>
diff --git a/drivers/mtd/nand/raw/kirkwood_nand.c b/drivers/mtd/nand/raw/kirkwood_nand.c
index 621d2d2..cd182be 100644
--- a/drivers/mtd/nand/raw/kirkwood_nand.c
+++ b/drivers/mtd/nand/raw/kirkwood_nand.c
@@ -5,7 +5,6 @@
* Written-by: Prafulla Wadaskar <prafulla@marvell.com>
*/
-#include <common.h>
#include <linux/mtd/rawnand.h>
#include <asm/io.h>
#include <asm/arch/soc.h>
diff --git a/drivers/mtd/nand/raw/kmeter1_nand.c b/drivers/mtd/nand/raw/kmeter1_nand.c
index dfe73d6..e9398eb 100644
--- a/drivers/mtd/nand/raw/kmeter1_nand.c
+++ b/drivers/mtd/nand/raw/kmeter1_nand.c
@@ -4,7 +4,7 @@
* Heiko Schocher, DENX Software Engineering, hs@denx.de
*/
-#include <common.h>
+#include <config.h>
#include <nand.h>
#include <asm/io.h>
#include <linux/delay.h>
diff --git a/drivers/mtd/nand/raw/lpc32xx_nand_mlc.c b/drivers/mtd/nand/raw/lpc32xx_nand_mlc.c
index f8ae216..c89661b 100644
--- a/drivers/mtd/nand/raw/lpc32xx_nand_mlc.c
+++ b/drivers/mtd/nand/raw/lpc32xx_nand_mlc.c
@@ -19,7 +19,7 @@
* should not rely on the ECC validity.
*/
-#include <common.h>
+#include <config.h>
#include <nand.h>
#include <linux/delay.h>
#include <linux/errno.h>
diff --git a/drivers/mtd/nand/raw/lpc32xx_nand_slc.c b/drivers/mtd/nand/raw/lpc32xx_nand_slc.c
index b21a0b9..4d643bc 100644
--- a/drivers/mtd/nand/raw/lpc32xx_nand_slc.c
+++ b/drivers/mtd/nand/raw/lpc32xx_nand_slc.c
@@ -10,7 +10,7 @@
* Author: Kevin Wells
*/
-#include <common.h>
+#include <config.h>
#include <log.h>
#include <nand.h>
#include <linux/bug.h>
diff --git a/drivers/mtd/nand/raw/meson_nand.c b/drivers/mtd/nand/raw/meson_nand.c
new file mode 100644
index 0000000..12499a7
--- /dev/null
+++ b/drivers/mtd/nand/raw/meson_nand.c
@@ -0,0 +1,1247 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Amlogic Meson Nand Flash Controller Driver
+ *
+ * Copyright (c) 2018 Amlogic, inc.
+ * Author: Liang Yang <liang.yang@amlogic.com>
+ *
+ * Copyright (c) 2023 SaluteDevices, Inc.
+ * Author: Arseniy Krasnov <avkrasnov@salutedevices.com>
+ */
+
+#include <nand.h>
+#include <asm/io.h>
+#include <dm.h>
+#include <dm/device_compat.h>
+#include <dm/ofnode.h>
+#include <dm/uclass.h>
+#include <linux/bug.h>
+#include <linux/clk-provider.h>
+#include <linux/delay.h>
+#include <linux/dma-mapping.h>
+#include <linux/iopoll.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/rawnand.h>
+#include <linux/sizes.h>
+
+#define NFC_CMD_IDLE (0xc << 14)
+#define NFC_CMD_CLE (0x5 << 14)
+#define NFC_CMD_ALE (0x6 << 14)
+#define NFC_CMD_DWR (0x4 << 14)
+#define NFC_CMD_DRD (0x8 << 14)
+#define NFC_CMD_ADL ((0 << 16) | (3 << 20))
+#define NFC_CMD_ADH ((1 << 16) | (3 << 20))
+#define NFC_CMD_AIL ((2 << 16) | (3 << 20))
+#define NFC_CMD_AIH ((3 << 16) | (3 << 20))
+#define NFC_CMD_SEED ((8 << 16) | (3 << 20))
+#define NFC_CMD_M2N ((0 << 17) | (2 << 20))
+#define NFC_CMD_N2M ((1 << 17) | (2 << 20))
+#define NFC_CMD_RB BIT(20)
+#define NFC_CMD_SCRAMBLER_ENABLE BIT(19)
+#define NFC_CMD_SCRAMBLER_DISABLE 0
+#define NFC_CMD_SHORTMODE_DISABLE 0
+#define NFC_CMD_RB_INT BIT(14)
+#define NFC_CMD_RB_INT_NO_PIN ((0xb << 10) | BIT(18) | BIT(16))
+
+#define NFC_CMD_GET_SIZE(x) (((x) >> 22) & GENMASK(4, 0))
+
+#define NFC_REG_CMD 0x00
+#define NFC_REG_CFG 0x04
+#define NFC_REG_DADR 0x08
+#define NFC_REG_IADR 0x0c
+#define NFC_REG_BUF 0x10
+#define NFC_REG_INFO 0x14
+#define NFC_REG_DC 0x18
+#define NFC_REG_ADR 0x1c
+#define NFC_REG_DL 0x20
+#define NFC_REG_DH 0x24
+#define NFC_REG_CADR 0x28
+#define NFC_REG_SADR 0x2c
+#define NFC_REG_PINS 0x30
+#define NFC_REG_VER 0x38
+
+#define CMDRWGEN(cmd_dir, ran, bch, short_mode, page_size, pages) \
+ ( \
+ (cmd_dir) | \
+ (ran) | \
+ ((bch) << 14) | \
+ ((short_mode) << 13) | \
+ (((page_size) & 0x7f) << 6) | \
+ ((pages) & 0x3f) \
+ )
+
+#define GENCMDDADDRL(adl, addr) ((adl) | ((addr) & 0xffff))
+#define GENCMDDADDRH(adh, addr) ((adh) | (((addr) >> 16) & 0xffff))
+#define GENCMDIADDRL(ail, addr) ((ail) | ((addr) & 0xffff))
+#define GENCMDIADDRH(aih, addr) ((aih) | (((addr) >> 16) & 0xffff))
+
+#define DMA_DIR(dir) ((dir) ? NFC_CMD_N2M : NFC_CMD_M2N)
+
+#define ECC_CHECK_RETURN_FF -1
+
+#define NAND_CE0 (0xe << 10)
+#define NAND_CE1 (0xd << 10)
+
+#define DMA_BUSY_TIMEOUT_US 1000000
+#define CMD_DRAIN_TIMEOUT_US 1000
+#define ECC_POLL_TIMEOUT_US 15
+
+#define MAX_CE_NUM 2
+
+/* eMMC clock register, misc control */
+#define CLK_SELECT_NAND BIT(31)
+#define CLK_ALWAYS_ON_NAND BIT(24)
+#define CLK_ENABLE_VALUE 0x245
+
+#define DIRREAD 1
+#define DIRWRITE 0
+
+#define ECC_PARITY_BCH8_512B 14
+#define ECC_COMPLETE BIT(31)
+#define ECC_ERR_CNT(x) (((x) >> 24) & GENMASK(5, 0))
+#define ECC_ZERO_CNT(x) (((x) >> 16) & GENMASK(5, 0))
+#define ECC_UNCORRECTABLE 0x3f
+
+#define PER_INFO_BYTE 8
+
+#define NFC_SEND_CMD(host, cmd) \
+ (writel((cmd), (host)->reg_base + NFC_REG_CMD))
+
+#define NFC_GET_CMD(host) \
+ (readl((host)->reg_base + NFC_REG_CMD))
+
+#define NFC_CMDFIFO_SIZE(host) ((NFC_GET_CMD((host)) >> 22) & GENMASK(4, 0))
+
+#define NFC_CMD_MAKE_IDLE(ce, delay) ((ce) | NFC_CMD_IDLE | ((delay) & 0x3ff))
+#define NFC_CMD_MAKE_DRD(ce, size) ((ce) | NFC_CMD_DRD | (size))
+#define NFC_CMD_MAKE_DWR(ce, data) ((ce) | NFC_CMD_DWR | ((data) & 0xff))
+#define NFC_CMD_MAKE_CLE(ce, cmd_val) ((ce) | NFC_CMD_CLE | ((cmd_val) & 0xff))
+#define NFC_CMD_MAKE_ALE(ce, addr) ((ce) | NFC_CMD_ALE | ((addr) & 0xff))
+
+#define NAND_TWB_TIME_CYCLE 10
+
+#define NFC_DEV_READY_TICK_MAX 5000
+
+/* Both values are recommended by vendor, as the most
+ * tested with almost all SLC NAND flash. Second value
+ * could be calculated dynamically from timing parameters,
+ * but we need both values for initial start of the NAND
+ * controller (e.g. before NAND subsystem processes timings),
+ * so use hardcoded constants.
+ */
+#define NFC_DEFAULT_BUS_CYCLE 6
+#define NFC_DEFAULT_BUS_TIMING 7
+
+#define NFC_SEED_OFFSET 0xc2
+#define NFC_SEED_MASK 0x7fff
+
+#define DMA_ADDR_ALIGN 8
+
+struct meson_nfc_nand_chip {
+ struct list_head node;
+ struct nand_chip nand;
+
+ u32 bch_mode;
+ u8 *data_buf;
+ __le64 *info_buf;
+ u32 nsels;
+ u8 sels[];
+};
+
+struct meson_nfc_param {
+ u32 chip_select;
+ u32 rb_select;
+};
+
+struct meson_nfc {
+ void __iomem *reg_base;
+ void __iomem *reg_clk;
+ struct list_head chips;
+ struct meson_nfc_param param;
+ struct udevice *dev;
+ dma_addr_t daddr;
+ dma_addr_t iaddr;
+ u32 data_bytes;
+ u32 info_bytes;
+ u64 assigned_cs;
+};
+
+struct meson_nand_ecc {
+ u32 bch;
+ u32 strength;
+ u32 size;
+};
+
+enum {
+ NFC_ECC_BCH8_512 = 1,
+ NFC_ECC_BCH8_1K,
+ NFC_ECC_BCH24_1K,
+ NFC_ECC_BCH30_1K,
+ NFC_ECC_BCH40_1K,
+ NFC_ECC_BCH50_1K,
+ NFC_ECC_BCH60_1K,
+};
+
+#define MESON_ECC_DATA(b, s, sz) { .bch = (b), .strength = (s), .size = (sz) }
+
+static struct meson_nand_ecc meson_ecc[] = {
+ MESON_ECC_DATA(NFC_ECC_BCH8_512, 8, 512),
+ MESON_ECC_DATA(NFC_ECC_BCH8_1K, 8, 1024),
+};
+
+static int meson_nand_calc_ecc_bytes(int step_size, int strength)
+{
+ int ecc_bytes;
+
+ if (step_size == 512 && strength == 8)
+ return ECC_PARITY_BCH8_512B;
+
+ ecc_bytes = DIV_ROUND_UP(strength * fls(step_size * 8), 8);
+ ecc_bytes = ALIGN(ecc_bytes, 2);
+
+ return ecc_bytes;
+}
+
+static struct meson_nfc_nand_chip *to_meson_nand(struct nand_chip *nand)
+{
+ return container_of(nand, struct meson_nfc_nand_chip, nand);
+}
+
+static void meson_nfc_nand_select_chip(struct mtd_info *mtd, int chip)
+{
+ struct nand_chip *nand = mtd_to_nand(mtd);
+ struct meson_nfc_nand_chip *meson_chip = to_meson_nand(nand);
+ struct meson_nfc *nfc = nand_get_controller_data(nand);
+
+ nfc->param.chip_select = meson_chip->sels[chip] ? NAND_CE1 : NAND_CE0;
+}
+
+static void meson_nfc_cmd_idle(struct meson_nfc *nfc, u32 time)
+{
+ writel(NFC_CMD_MAKE_IDLE(nfc->param.chip_select, time),
+ nfc->reg_base + NFC_REG_CMD);
+}
+
+static void meson_nfc_cmd_seed(const struct meson_nfc *nfc, u32 seed)
+{
+ writel(NFC_CMD_SEED | (NFC_SEED_OFFSET + (seed & NFC_SEED_MASK)),
+ nfc->reg_base + NFC_REG_CMD);
+}
+
+static void meson_nfc_cmd_access(struct nand_chip *nand, bool raw, bool dir,
+ int scrambler)
+{
+ struct mtd_info *mtd = nand_to_mtd(nand);
+ const struct meson_nfc *nfc = nand_get_controller_data(mtd_to_nand(mtd));
+ const struct meson_nfc_nand_chip *meson_chip = to_meson_nand(nand);
+ u32 bch = meson_chip->bch_mode, cmd;
+ int len = mtd->writesize, pagesize, pages;
+
+ pagesize = nand->ecc.size;
+
+ if (raw) {
+ len = mtd->writesize + mtd->oobsize;
+ cmd = len | scrambler | DMA_DIR(dir);
+ writel(cmd, nfc->reg_base + NFC_REG_CMD);
+ return;
+ }
+
+ pages = len / nand->ecc.size;
+
+ cmd = CMDRWGEN(DMA_DIR(dir), scrambler, bch,
+ NFC_CMD_SHORTMODE_DISABLE, pagesize, pages);
+
+ writel(cmd, nfc->reg_base + NFC_REG_CMD);
+}
+
+static void meson_nfc_drain_cmd(struct meson_nfc *nfc)
+{
+ /*
+ * Insert two commands to make sure all valid commands are finished.
+ *
+ * The Nand flash controller is designed as two stages pipleline -
+ * a) fetch and b) execute.
+ * There might be cases when the driver see command queue is empty,
+ * but the Nand flash controller still has two commands buffered,
+ * one is fetched into NFC request queue (ready to run), and another
+ * is actively executing. So pushing 2 "IDLE" commands guarantees that
+ * the pipeline is emptied.
+ */
+ meson_nfc_cmd_idle(nfc, 0);
+ meson_nfc_cmd_idle(nfc, 0);
+}
+
+static int meson_nfc_wait_cmd_finish(const struct meson_nfc *nfc,
+ unsigned int timeout_us)
+{
+ u32 cmd_size = 0;
+
+ /* wait cmd fifo is empty */
+ return readl_relaxed_poll_timeout(nfc->reg_base + NFC_REG_CMD, cmd_size,
+ !NFC_CMD_GET_SIZE(cmd_size),
+ timeout_us);
+}
+
+static int meson_nfc_wait_dma_finish(struct meson_nfc *nfc)
+{
+ meson_nfc_drain_cmd(nfc);
+
+ return meson_nfc_wait_cmd_finish(nfc, DMA_BUSY_TIMEOUT_US);
+}
+
+static u8 *meson_nfc_oob_ptr(struct nand_chip *nand, int i)
+{
+ const struct meson_nfc_nand_chip *meson_chip = to_meson_nand(nand);
+ int len;
+
+ len = nand->ecc.size * (i + 1) + (nand->ecc.bytes + 2) * i;
+
+ return meson_chip->data_buf + len;
+}
+
+static u8 *meson_nfc_data_ptr(struct nand_chip *nand, int i)
+{
+ const struct meson_nfc_nand_chip *meson_chip = to_meson_nand(nand);
+ int len, temp;
+
+ temp = nand->ecc.size + nand->ecc.bytes;
+ len = (temp + 2) * i;
+
+ return meson_chip->data_buf + len;
+}
+
+static void meson_nfc_get_data_oob(struct nand_chip *nand,
+ u8 *buf, u8 *oobbuf)
+{
+ u8 *dsrc, *osrc;
+ int i, oob_len;
+
+ oob_len = nand->ecc.bytes + 2;
+ for (i = 0; i < nand->ecc.steps; i++) {
+ if (buf) {
+ dsrc = meson_nfc_data_ptr(nand, i);
+ memcpy(buf, dsrc, nand->ecc.size);
+ buf += nand->ecc.size;
+ }
+
+ if (oobbuf) {
+ osrc = meson_nfc_oob_ptr(nand, i);
+ memcpy(oobbuf, osrc, oob_len);
+ oobbuf += oob_len;
+ }
+ }
+}
+
+static void meson_nfc_set_data_oob(struct nand_chip *nand,
+ const u8 *buf, u8 *oobbuf)
+{
+ int i, oob_len;
+
+ oob_len = nand->ecc.bytes + 2;
+ for (i = 0; i < nand->ecc.steps; i++) {
+ u8 *osrc;
+
+ if (buf) {
+ u8 *dsrc;
+
+ dsrc = meson_nfc_data_ptr(nand, i);
+ memcpy(dsrc, buf, nand->ecc.size);
+ buf += nand->ecc.size;
+ }
+
+ osrc = meson_nfc_oob_ptr(nand, i);
+ memcpy(osrc, oobbuf, oob_len);
+ oobbuf += oob_len;
+ }
+}
+
+static void meson_nfc_set_user_byte(struct nand_chip *nand, const u8 *oob_buf)
+{
+ struct meson_nfc_nand_chip *meson_chip = to_meson_nand(nand);
+ int i, count;
+
+ for (i = 0, count = 0; i < nand->ecc.steps; i++, count += (2 + nand->ecc.bytes)) {
+ __le64 *info = &meson_chip->info_buf[i];
+
+ *info |= oob_buf[count];
+ *info |= oob_buf[count + 1] << 8;
+ }
+}
+
+static void meson_nfc_get_user_byte(struct nand_chip *nand, u8 *oob_buf)
+{
+ struct meson_nfc_nand_chip *meson_chip = to_meson_nand(nand);
+ int i, count;
+
+ for (i = 0, count = 0; i < nand->ecc.steps; i++, count += (2 + nand->ecc.bytes)) {
+ const __le64 *info = &meson_chip->info_buf[i];
+
+ oob_buf[count] = *info;
+ oob_buf[count + 1] = *info >> 8;
+ }
+}
+
+static int meson_nfc_ecc_correct(struct nand_chip *nand, u32 *bitflips,
+ u64 *correct_bitmap)
+{
+ struct mtd_info *mtd = nand_to_mtd(nand);
+ int ret = 0, i;
+
+ for (i = 0; i < nand->ecc.steps; i++) {
+ struct meson_nfc_nand_chip *meson_chip = to_meson_nand(nand);
+ const __le64 *info = &meson_chip->info_buf[i];
+
+ if (ECC_ERR_CNT(*info) != ECC_UNCORRECTABLE) {
+ mtd->ecc_stats.corrected += ECC_ERR_CNT(*info);
+ *bitflips = max_t(u32, *bitflips, ECC_ERR_CNT(*info));
+ *correct_bitmap |= BIT_ULL(i);
+ continue;
+ }
+
+ if ((nand->options & NAND_NEED_SCRAMBLING) &&
+ ECC_ZERO_CNT(*info) < nand->ecc.strength) {
+ mtd->ecc_stats.corrected += ECC_ZERO_CNT(*info);
+ *bitflips = max_t(u32, *bitflips,
+ ECC_ZERO_CNT(*info));
+ ret = ECC_CHECK_RETURN_FF;
+ } else {
+ ret = -EBADMSG;
+ }
+ }
+
+ return ret;
+}
+
+static int meson_nfc_dma_buffer_setup(struct nand_chip *nand, void *databuf,
+ int datalen, void *infobuf, int infolen,
+ enum dma_data_direction dir)
+{
+ struct meson_nfc *nfc = nand_get_controller_data(nand);
+ int ret;
+ u32 cmd;
+
+ nfc->daddr = dma_map_single(databuf, datalen, DMA_BIDIRECTIONAL);
+ ret = dma_mapping_error(nfc->dev, nfc->daddr);
+ if (ret)
+ return ret;
+
+ cmd = GENCMDDADDRL(NFC_CMD_ADL, nfc->daddr);
+ writel(cmd, nfc->reg_base + NFC_REG_CMD);
+
+ cmd = GENCMDDADDRH(NFC_CMD_ADH, nfc->daddr);
+ writel(cmd, nfc->reg_base + NFC_REG_CMD);
+
+ if (infobuf) {
+ nfc->iaddr = dma_map_single(infobuf, infolen,
+ DMA_BIDIRECTIONAL);
+ ret = dma_mapping_error(nfc->dev, nfc->iaddr);
+ if (ret) {
+ dma_unmap_single(nfc->daddr, datalen, dir);
+ return ret;
+ }
+
+ nfc->info_bytes = infolen;
+ cmd = GENCMDIADDRL(NFC_CMD_AIL, nfc->iaddr);
+ writel(cmd, nfc->reg_base + NFC_REG_CMD);
+
+ cmd = GENCMDIADDRH(NFC_CMD_AIH, nfc->iaddr);
+ writel(cmd, nfc->reg_base + NFC_REG_CMD);
+ }
+
+ return 0;
+}
+
+static void meson_nfc_dma_buffer_release(struct nand_chip *nand,
+ int datalen, int infolen,
+ enum dma_data_direction dir)
+{
+ struct meson_nfc *nfc = nand_get_controller_data(nand);
+
+ dma_unmap_single(nfc->daddr, datalen, dir);
+
+ if (infolen) {
+ dma_unmap_single(nfc->iaddr, infolen, dir);
+ nfc->info_bytes = 0;
+ }
+}
+
+static void meson_nfc_read_buf(struct mtd_info *mtd, u8 *buf, int size)
+{
+ struct nand_chip *nand = mtd_to_nand(mtd);
+ struct meson_nfc *nfc = nand_get_controller_data(nand);
+ struct meson_nfc_nand_chip *meson_chip = to_meson_nand(nand);
+ u8 *dma_buf;
+ int ret;
+ u32 cmd;
+
+ if ((uintptr_t)buf % DMA_ADDR_ALIGN) {
+ unsigned long tmp_addr;
+
+ dma_buf = dma_alloc_coherent(size, &tmp_addr);
+ if (!dma_buf)
+ return;
+ } else {
+ dma_buf = buf;
+ }
+
+ ret = meson_nfc_dma_buffer_setup(nand, dma_buf, size, meson_chip->info_buf,
+ PER_INFO_BYTE, DMA_FROM_DEVICE);
+ if (ret) {
+ pr_err("Failed to setup DMA buffer %p/%p\n", dma_buf,
+ meson_chip->info_buf);
+ return;
+ }
+
+ cmd = NFC_CMD_N2M | size;
+ writel(cmd, nfc->reg_base + NFC_REG_CMD);
+
+ meson_nfc_drain_cmd(nfc);
+ meson_nfc_wait_cmd_finish(nfc, CMD_DRAIN_TIMEOUT_US);
+ meson_nfc_dma_buffer_release(nand, size, PER_INFO_BYTE, DMA_FROM_DEVICE);
+
+ if (buf != dma_buf) {
+ memcpy(buf, dma_buf, size);
+ dma_free_coherent(dma_buf);
+ }
+}
+
+static void meson_nfc_write_buf(struct mtd_info *mtd, const u8 *buf, int size)
+{
+ struct nand_chip *nand = mtd_to_nand(mtd);
+ struct meson_nfc *nfc = nand_get_controller_data(nand);
+ u8 *dma_buf;
+ int ret;
+ u32 cmd;
+
+ if ((uintptr_t)buf % DMA_ADDR_ALIGN) {
+ unsigned long tmp_addr;
+
+ dma_buf = dma_alloc_coherent(size, &tmp_addr);
+ if (!dma_buf)
+ return;
+
+ memcpy(dma_buf, buf, size);
+ } else {
+ dma_buf = (u8 *)buf;
+ }
+
+ ret = meson_nfc_dma_buffer_setup(nand, (void *)dma_buf, size, NULL,
+ 0, DMA_TO_DEVICE);
+ if (ret) {
+ pr_err("Failed to setup DMA buffer %p\n", dma_buf);
+ return;
+ }
+
+ cmd = NFC_CMD_M2N | size;
+ writel(cmd, nfc->reg_base + NFC_REG_CMD);
+
+ meson_nfc_drain_cmd(nfc);
+ meson_nfc_wait_cmd_finish(nfc, CMD_DRAIN_TIMEOUT_US);
+ meson_nfc_dma_buffer_release(nand, size, 0, DMA_TO_DEVICE);
+
+ if (buf != dma_buf)
+ dma_free_coherent(dma_buf);
+}
+
+static int meson_nfc_write_page_sub(struct nand_chip *nand,
+ int page, bool raw)
+{
+ const struct mtd_info *mtd = nand_to_mtd(nand);
+ struct meson_nfc_nand_chip *meson_chip = to_meson_nand(nand);
+ struct meson_nfc *nfc = nand_get_controller_data(nand);
+ int data_len, info_len;
+ int ret;
+ u32 cmd;
+
+ data_len = mtd->writesize + mtd->oobsize;
+ info_len = nand->ecc.steps * PER_INFO_BYTE;
+
+ ret = meson_nfc_dma_buffer_setup(nand, meson_chip->data_buf,
+ data_len, meson_chip->info_buf,
+ info_len, DMA_TO_DEVICE);
+ if (ret) {
+ pr_err("Failed to setup DMA buffer %p/%p\n",
+ meson_chip->data_buf, meson_chip->info_buf);
+ return ret;
+ }
+
+ if (nand->options & NAND_NEED_SCRAMBLING) {
+ meson_nfc_cmd_seed(nfc, page);
+ meson_nfc_cmd_access(nand, raw, DIRWRITE,
+ NFC_CMD_SCRAMBLER_ENABLE);
+ } else {
+ meson_nfc_cmd_access(nand, raw, DIRWRITE,
+ NFC_CMD_SCRAMBLER_DISABLE);
+ }
+
+ cmd = nfc->param.chip_select | NFC_CMD_CLE | NAND_CMD_PAGEPROG;
+ writel(cmd, nfc->reg_base + NFC_REG_CMD);
+
+ meson_nfc_dma_buffer_release(nand, data_len, info_len, DMA_TO_DEVICE);
+
+ return 0;
+}
+
+static int meson_nfc_write_page_raw(struct mtd_info *mtd, struct nand_chip *chip,
+ const u8 *buf, int oob_required, int page)
+{
+ meson_nfc_set_data_oob(chip, buf, oob_required ? chip->oob_poi : NULL);
+
+ return meson_nfc_write_page_sub(chip, page, true);
+}
+
+static int meson_nfc_write_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,
+ const u8 *buf, int oob_required, int page)
+{
+ struct meson_nfc_nand_chip *meson_chip = to_meson_nand(chip);
+
+ if (buf)
+ memcpy(meson_chip->data_buf, buf, mtd->writesize);
+
+ memset(meson_chip->info_buf, 0, chip->ecc.steps * PER_INFO_BYTE);
+
+ if (oob_required)
+ meson_nfc_set_user_byte(chip, chip->oob_poi);
+
+ return meson_nfc_write_page_sub(chip, page, false);
+}
+
+static void meson_nfc_check_ecc_pages_valid(struct meson_nfc *nfc,
+ struct nand_chip *nand, bool raw)
+{
+ struct meson_nfc_nand_chip *meson_chip = to_meson_nand(nand);
+ __le64 *info;
+ u32 neccpages;
+ int ret;
+
+ neccpages = raw ? 1 : nand->ecc.steps;
+ info = &meson_chip->info_buf[neccpages - 1];
+ do {
+ udelay(ECC_POLL_TIMEOUT_US);
+ /* info is updated by nfc dma engine*/
+ rmb();
+ invalidate_dcache_range(nfc->iaddr, nfc->iaddr + nfc->info_bytes);
+ ret = *info & ECC_COMPLETE;
+ } while (!ret);
+}
+
+static int meson_nfc_read_page_sub(struct nand_chip *nand,
+ int page, bool raw)
+{
+ struct mtd_info *mtd = nand_to_mtd(nand);
+ struct meson_nfc *nfc = nand_get_controller_data(nand);
+ struct meson_nfc_nand_chip *meson_chip = to_meson_nand(nand);
+ u32 data_len, info_len;
+ int ret;
+
+ data_len = mtd->writesize + mtd->oobsize;
+ info_len = nand->ecc.steps * PER_INFO_BYTE;
+
+ ret = meson_nfc_dma_buffer_setup(nand, meson_chip->data_buf, data_len,
+ meson_chip->info_buf, info_len,
+ DMA_FROM_DEVICE);
+ if (ret)
+ return ret;
+
+ if (nand->options & NAND_NEED_SCRAMBLING) {
+ meson_nfc_cmd_seed(nfc, page);
+ meson_nfc_cmd_access(nand, raw, DIRREAD,
+ NFC_CMD_SCRAMBLER_ENABLE);
+ } else {
+ meson_nfc_cmd_access(nand, raw, DIRREAD,
+ NFC_CMD_SCRAMBLER_DISABLE);
+ }
+
+ meson_nfc_wait_dma_finish(nfc);
+ meson_nfc_check_ecc_pages_valid(nfc, nand, raw);
+
+ meson_nfc_dma_buffer_release(nand, data_len, info_len,
+ DMA_FROM_DEVICE);
+
+ return 0;
+}
+
+static int meson_nfc_read_page_raw(struct mtd_info *mtd, struct nand_chip *chip,
+ u8 *buf, int oob_required, int page)
+{
+ int ret;
+
+ ret = meson_nfc_read_page_sub(chip, page, true);
+ if (ret)
+ return ret;
+
+ meson_nfc_get_data_oob(chip, buf, oob_required ? chip->oob_poi : NULL);
+
+ return 0;
+}
+
+static int meson_nfc_read_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,
+ u8 *buf, int oob_required, int page)
+{
+ const struct meson_nfc_nand_chip *meson_chip = to_meson_nand(chip);
+ u64 correct_bitmap = 0;
+ u32 bitflips = 0;
+ int ret;
+
+ ret = meson_nfc_read_page_sub(chip, page, false);
+ if (ret)
+ return ret;
+
+ if (oob_required)
+ meson_nfc_get_user_byte(chip, chip->oob_poi);
+
+ ret = meson_nfc_ecc_correct(chip, &bitflips, &correct_bitmap);
+
+ if (ret == ECC_CHECK_RETURN_FF) {
+ if (buf)
+ memset(buf, 0xff, mtd->writesize);
+
+ if (oob_required)
+ memset(chip->oob_poi, 0xff, mtd->oobsize);
+ } else if (ret < 0) {
+ struct nand_ecc_ctrl *ecc;
+ int i;
+
+ if ((chip->options & NAND_NEED_SCRAMBLING) || !buf) {
+ mtd->ecc_stats.failed++;
+ return bitflips;
+ }
+
+ chip->cmdfunc(mtd, NAND_CMD_READ0, 0, page);
+
+ ret = meson_nfc_read_page_raw(mtd, chip, buf, 1, page);
+ if (ret)
+ return ret;
+
+ ecc = &chip->ecc;
+
+ for (i = 0; i < chip->ecc.steps ; i++) {
+ u8 *data = buf + i * ecc->size;
+ u8 *oob = chip->oob_poi + i * (ecc->bytes + 2);
+
+ if (correct_bitmap & BIT_ULL(i))
+ continue;
+
+ ret = nand_check_erased_ecc_chunk(data, ecc->size,
+ oob, ecc->bytes + 2,
+ NULL, 0,
+ ecc->strength);
+ if (ret < 0) {
+ mtd->ecc_stats.failed++;
+ } else {
+ mtd->ecc_stats.corrected += ret;
+ bitflips = max_t(u32, bitflips, ret);
+ }
+ }
+ } else if (buf && buf != meson_chip->data_buf) {
+ memcpy(buf, meson_chip->data_buf, mtd->writesize);
+ }
+
+ return bitflips;
+}
+
+static int meson_nfc_read_oob_raw(struct mtd_info *mtd, struct nand_chip *chip,
+ int page)
+{
+ int ret;
+
+ ret = nand_read_page_op(chip, page, 0, NULL, 0);
+ if (ret)
+ return ret;
+
+ return meson_nfc_read_page_raw(mtd, chip, NULL, 1, page);
+}
+
+static int meson_nfc_read_oob(struct mtd_info *mtd, struct nand_chip *chip,
+ int page)
+{
+ int ret;
+
+ ret = nand_read_page_op(chip, page, 0, NULL, 0);
+ if (ret)
+ return ret;
+
+ return meson_nfc_read_page_hwecc(mtd, chip, NULL, 1, page);
+}
+
+static int meson_nfc_write_oob_raw(struct mtd_info *mtd, struct nand_chip *chip,
+ int page)
+{
+ int ret;
+
+ ret = nand_prog_page_begin_op(chip, page, 0, NULL, 0);
+ if (ret)
+ return ret;
+
+ ret = meson_nfc_write_page_raw(mtd, chip, NULL, 1, page);
+ if (ret)
+ return ret;
+
+ return nand_prog_page_end_op(chip);
+}
+
+static int meson_nfc_write_oob(struct mtd_info *mtd, struct nand_chip *chip,
+ int page)
+{
+ int ret;
+
+ ret = nand_prog_page_begin_op(chip, page, 0, NULL, 0);
+ if (ret)
+ return ret;
+
+ ret = meson_nfc_write_page_hwecc(mtd, chip, NULL, 1, page);
+ if (ret)
+ return ret;
+
+ return nand_prog_page_end_op(chip);
+}
+
+static void meson_nfc_nand_cmd_function(struct mtd_info *mtd, unsigned int command,
+ int column, int page_addr)
+{
+ struct nand_chip *chip = mtd_to_nand(mtd);
+
+ chip->cmd_ctrl(mtd, command, NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE);
+
+ if (column != -1 || page_addr != -1) {
+ int ctrl = NAND_CTRL_CHANGE | NAND_NCE | NAND_ALE;
+
+ /* Serially input address */
+ if (column != -1) {
+ /* Adjust columns for 16 bit buswidth */
+ if (chip->options & NAND_BUSWIDTH_16 &&
+ !nand_opcode_8bits(command))
+ column >>= 1;
+
+ chip->cmd_ctrl(mtd, column, ctrl);
+ ctrl &= ~NAND_CTRL_CHANGE;
+ /* Only output a single addr cycle for 8bits
+ * opcodes.
+ */
+ if (!nand_opcode_8bits(command))
+ chip->cmd_ctrl(mtd, column >> 8, ctrl);
+ }
+
+ if (page_addr != -1) {
+ chip->cmd_ctrl(mtd, page_addr, ctrl);
+ chip->cmd_ctrl(mtd, page_addr >> 8, NAND_NCE |
+ NAND_ALE);
+ /* One more address cycle for devices > 128MiB */
+ if (chip->chipsize > SZ_128M)
+ chip->cmd_ctrl(mtd, page_addr >> 16,
+ NAND_NCE | NAND_ALE);
+ }
+
+ switch (command) {
+ case NAND_CMD_READ0:
+ chip->cmd_ctrl(mtd, NAND_CMD_READSTART,
+ NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE);
+ fallthrough;
+ case NAND_CMD_PARAM:
+ nand_wait_ready(mtd);
+ nand_exit_status_op(chip);
+ }
+ }
+}
+
+static void meson_nfc_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
+{
+ struct nand_chip *nand = mtd_to_nand(mtd);
+ struct meson_nfc *nfc = nand_get_controller_data(nand);
+
+ if (cmd == NAND_CMD_NONE)
+ return;
+
+ if (ctrl & NAND_CLE)
+ cmd = NFC_CMD_MAKE_CLE(nfc->param.chip_select, cmd);
+ else
+ cmd = NFC_CMD_MAKE_ALE(nfc->param.chip_select, cmd);
+
+ writel(cmd, nfc->reg_base + NFC_REG_CMD);
+}
+
+static void meson_nfc_wait_cmd_fifo(struct meson_nfc *nfc)
+{
+ while ((NFC_GET_CMD(nfc) >> 22) & GENMASK(4, 0))
+ ;
+}
+
+static u8 meson_nfc_nand_read_byte(struct mtd_info *mtd)
+{
+ struct nand_chip *nand = mtd_to_nand(mtd);
+ struct meson_nfc *nfc = nand_get_controller_data(nand);
+
+ writel(NFC_CMD_MAKE_DRD(nfc->param.chip_select, 0), nfc->reg_base + NFC_REG_CMD);
+
+ meson_nfc_cmd_idle(nfc, NAND_TWB_TIME_CYCLE);
+ meson_nfc_cmd_idle(nfc, 0);
+ meson_nfc_cmd_idle(nfc, 0);
+
+ meson_nfc_wait_cmd_fifo(nfc);
+
+ return readl(nfc->reg_base + NFC_REG_BUF);
+}
+
+static void meson_nfc_nand_write_byte(struct mtd_info *mtd, u8 val)
+{
+ struct nand_chip *nand = mtd_to_nand(mtd);
+ struct meson_nfc *nfc = nand_get_controller_data(nand);
+
+ meson_nfc_cmd_idle(nfc, NAND_TWB_TIME_CYCLE);
+
+ writel(NFC_CMD_MAKE_DWR(nfc->param.chip_select, val), nfc->reg_base + NFC_REG_CMD);
+
+ meson_nfc_cmd_idle(nfc, NAND_TWB_TIME_CYCLE);
+ meson_nfc_cmd_idle(nfc, 0);
+ meson_nfc_cmd_idle(nfc, 0);
+
+ meson_nfc_wait_cmd_fifo(nfc);
+}
+
+static int meson_nfc_dev_ready(struct mtd_info *mtd)
+{
+ struct nand_chip *chip = mtd_to_nand(mtd);
+ unsigned int time_out_cnt = 0;
+
+ chip->select_chip(mtd, 0);
+
+ chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1);
+
+ do {
+ int status;
+
+ status = (int)chip->read_byte(mtd);
+ if (status & NAND_STATUS_READY)
+ break;
+ } while (time_out_cnt++ < NFC_DEV_READY_TICK_MAX);
+
+ return time_out_cnt != NFC_DEV_READY_TICK_MAX;
+}
+
+static int meson_chip_buffer_init(struct nand_chip *nand)
+{
+ const struct mtd_info *mtd = nand_to_mtd(nand);
+ struct meson_nfc_nand_chip *meson_chip = to_meson_nand(nand);
+ u32 page_bytes, info_bytes, nsectors;
+ unsigned long tmp_addr;
+
+ nsectors = mtd->writesize / nand->ecc.size;
+
+ page_bytes = mtd->writesize + mtd->oobsize;
+ info_bytes = nsectors * PER_INFO_BYTE;
+
+ meson_chip->data_buf = dma_alloc_coherent(page_bytes, &tmp_addr);
+ if (!meson_chip->data_buf)
+ return -ENOMEM;
+
+ meson_chip->info_buf = dma_alloc_coherent(info_bytes, &tmp_addr);
+ if (!meson_chip->info_buf) {
+ dma_free_coherent(meson_chip->data_buf);
+ return -ENOMEM;
+ }
+
+ return 0;
+}
+
+static const int axg_stepinfo_strengths[] = { 8 };
+static const struct nand_ecc_step_info axg_stepinfo_1024 = {
+ .stepsize = 1024,
+ .strengths = axg_stepinfo_strengths,
+ .nstrengths = ARRAY_SIZE(axg_stepinfo_strengths)
+};
+
+static const struct nand_ecc_step_info axg_stepinfo_512 = {
+ .stepsize = 512,
+ .strengths = axg_stepinfo_strengths,
+ .nstrengths = ARRAY_SIZE(axg_stepinfo_strengths)
+};
+
+static const struct nand_ecc_step_info axg_stepinfo[] = { axg_stepinfo_1024, axg_stepinfo_512 };
+
+static const struct nand_ecc_caps meson_axg_ecc_caps = {
+ .stepinfos = axg_stepinfo,
+ .nstepinfos = ARRAY_SIZE(axg_stepinfo),
+ .calc_ecc_bytes = meson_nand_calc_ecc_bytes,
+};
+
+/*
+ * OOB layout:
+ *
+ * For ECC with 512 bytes step size:
+ * 0x00: AA AA BB BB BB BB BB BB BB BB BB BB BB BB BB BB
+ * 0x10: AA AA CC CC CC CC CC CC CC CC CC CC CC CC CC CC
+ * 0x20:
+ * 0x30:
+ *
+ * For ECC with 1024 bytes step size:
+ * 0x00: AA AA BB BB BB BB BB BB BB BB BB BB BB BB BB BB
+ * 0x10: AA AA CC CC CC CC CC CC CC CC CC CC CC CC CC CC
+ * 0x20: AA AA DD DD DD DD DD DD DD DD DD DD DD DD DD DD
+ * 0x30: AA AA EE EE EE EE EE EE EE EE EE EE EE EE EE EE
+ *
+ * AA - user bytes.
+ * BB, CC, DD, EE - ECC code bytes for each step.
+ */
+static struct nand_ecclayout nand_oob;
+
+static void meson_nfc_init_nand_oob(struct nand_chip *nand)
+{
+ int section_size = 2 + nand->ecc.bytes;
+ int i;
+ int k;
+
+ nand_oob.eccbytes = nand->ecc.steps * nand->ecc.bytes;
+ k = 0;
+
+ for (i = 0; i < nand->ecc.steps; i++) {
+ int j;
+
+ for (j = 0; j < nand->ecc.bytes; j++)
+ nand_oob.eccpos[k++] = (i * section_size) + 2 + j;
+
+ nand_oob.oobfree[i].offset = (i * section_size);
+ nand_oob.oobfree[i].length = 2;
+ }
+
+ nand_oob.oobavail = 2 * nand->ecc.steps;
+ nand->ecc.layout = &nand_oob;
+}
+
+static int meson_nfc_init_ecc(struct nand_chip *nand, ofnode node)
+{
+ const struct mtd_info *mtd = nand_to_mtd(nand);
+ int ret;
+ int i;
+
+ ret = nand_check_ecc_caps(nand, &meson_axg_ecc_caps, mtd->oobsize - 2);
+ if (ret)
+ return ret;
+
+ for (i = 0; i < ARRAY_SIZE(meson_ecc); i++) {
+ if (meson_ecc[i].strength == nand->ecc.strength &&
+ meson_ecc[i].size == nand->ecc.size) {
+ struct meson_nfc_nand_chip *meson_chip = to_meson_nand(nand);
+
+ nand->ecc.steps = mtd->writesize / nand->ecc.size;
+ meson_chip->bch_mode = meson_ecc[i].bch;
+
+ meson_nfc_init_nand_oob(nand);
+
+ return 0;
+ }
+ }
+
+ return -EINVAL;
+}
+
+static int meson_nfc_nand_chip_init(struct udevice *dev, struct meson_nfc *nfc,
+ ofnode node)
+{
+ struct meson_nfc_nand_chip *meson_chip;
+ struct nand_chip *nand;
+ struct mtd_info *mtd;
+ u32 cs[MAX_CE_NUM];
+ u32 nsels;
+ int ret;
+ int i;
+
+ if (!ofnode_get_property(node, "reg", &nsels)) {
+ dev_err(dev, "\"reg\" property is not found\n");
+ return -ENODEV;
+ }
+
+ nsels /= sizeof(u32);
+ if (nsels >= MAX_CE_NUM) {
+ dev_err(dev, "invalid size of CS array, max is %d\n",
+ MAX_CE_NUM);
+ return -EINVAL;
+ }
+
+ ret = ofnode_read_u32_array(node, "reg", cs, nsels);
+ if (ret < 0) {
+ dev_err(dev, "failed to read \"reg\" property\n");
+ return ret;
+ }
+
+ for (i = 0; i < nsels; i++) {
+ if (test_and_set_bit(cs[i], &nfc->assigned_cs)) {
+ dev_err(dev, "CS %d already assigned\n", cs[i]);
+ return -EINVAL;
+ }
+ }
+
+ meson_chip = malloc(sizeof(*meson_chip) + nsels * sizeof(meson_chip->sels[0]));
+ if (!meson_chip) {
+ dev_err(dev, "failed to allocate memory for chip\n");
+ return -ENOMEM;
+ }
+
+ meson_chip->nsels = nsels;
+ nand = &meson_chip->nand;
+
+ nand->flash_node = node;
+ nand_set_controller_data(nand, nfc);
+ /* Set the driver entry points for MTD */
+ nand->cmdfunc = meson_nfc_nand_cmd_function;
+ nand->cmd_ctrl = meson_nfc_cmd_ctrl;
+ nand->select_chip = meson_nfc_nand_select_chip;
+ nand->read_byte = meson_nfc_nand_read_byte;
+ nand->write_byte = meson_nfc_nand_write_byte;
+ nand->dev_ready = meson_nfc_dev_ready;
+
+ /* Buffer read/write routines */
+ nand->read_buf = meson_nfc_read_buf;
+ nand->write_buf = meson_nfc_write_buf;
+ nand->options |= NAND_NO_SUBPAGE_WRITE;
+
+ nand->ecc.mode = NAND_ECC_HW;
+ nand->ecc.hwctl = NULL;
+ nand->ecc.read_page = meson_nfc_read_page_hwecc;
+ nand->ecc.write_page = meson_nfc_write_page_hwecc;
+ nand->ecc.read_page_raw = meson_nfc_read_page_raw;
+ nand->ecc.write_page_raw = meson_nfc_write_page_raw;
+
+ nand->ecc.read_oob = meson_nfc_read_oob;
+ nand->ecc.write_oob = meson_nfc_write_oob;
+ nand->ecc.read_oob_raw = meson_nfc_read_oob_raw;
+ nand->ecc.write_oob_raw = meson_nfc_write_oob_raw;
+
+ nand->ecc.algo = NAND_ECC_BCH;
+
+ mtd = nand_to_mtd(nand);
+
+ ret = nand_scan_ident(mtd, 1, NULL);
+ if (ret) {
+ dev_err(dev, "'nand_scan_ident()' failed: %d\n", ret);
+ goto err_chip_free;
+ }
+
+ ret = meson_nfc_init_ecc(nand, node);
+ if (ret) {
+ dev_err(dev, "failed to init ECC settings: %d\n", ret);
+ goto err_chip_free;
+ }
+
+ ret = meson_chip_buffer_init(nand);
+ if (ret) {
+ dev_err(dev, "failed to init DMA buffers: %d\n", ret);
+ goto err_chip_free;
+ }
+
+ /* 'nand_scan_tail()' needs ECC parameters to be already
+ * set and correct.
+ */
+ ret = nand_scan_tail(mtd);
+ if (ret) {
+ dev_err(dev, "'nand_scan_tail()' failed: %d\n", ret);
+ goto err_chip_buf_free;
+ }
+
+ ret = nand_register(0, mtd);
+ if (ret) {
+ dev_err(dev, "'nand_register()' failed: %d\n", ret);
+ goto err_chip_buf_free;
+ }
+
+ list_add_tail(&meson_chip->node, &nfc->chips);
+
+ return 0;
+
+err_chip_buf_free:
+ dma_free_coherent(meson_chip->info_buf);
+ dma_free_coherent(meson_chip->data_buf);
+
+err_chip_free:
+ free(meson_chip);
+
+ return ret;
+}
+
+static int meson_nfc_nand_chips_init(struct udevice *dev,
+ struct meson_nfc *nfc)
+{
+ ofnode parent = dev_ofnode(dev);
+ ofnode node;
+
+ ofnode_for_each_subnode(node, parent) {
+ int ret = meson_nfc_nand_chip_init(dev, nfc, node);
+
+ if (ret)
+ return ret;
+ }
+
+ return 0;
+}
+
+static void meson_nfc_clk_init(struct meson_nfc *nfc)
+{
+ u32 bus_cycle = NFC_DEFAULT_BUS_CYCLE;
+ u32 bus_timing = NFC_DEFAULT_BUS_TIMING;
+ u32 bus_cfg_val;
+
+ writel(CLK_ALWAYS_ON_NAND | CLK_SELECT_NAND | CLK_ENABLE_VALUE, nfc->reg_clk);
+ writel(0, nfc->reg_base + NFC_REG_CFG);
+
+ bus_cfg_val = (((bus_cycle - 1) & 31) | ((bus_timing & 31) << 5));
+ writel(bus_cfg_val, nfc->reg_base + NFC_REG_CFG);
+ writel(BIT(31), nfc->reg_base + NFC_REG_CMD);
+}
+
+static int meson_probe(struct udevice *dev)
+{
+ struct meson_nfc *nfc = dev_get_priv(dev);
+ void *addr;
+ int ret;
+
+ addr = dev_read_addr_ptr(dev);
+ if (!addr) {
+ dev_err(dev, "base register address not found\n");
+ return -EINVAL;
+ }
+
+ nfc->reg_base = addr;
+
+ addr = dev_read_addr_index_ptr(dev, 1);
+ if (!addr) {
+ dev_err(dev, "clk register address not found\n");
+ return -EINVAL;
+ }
+
+ nfc->reg_clk = addr;
+ nfc->dev = dev;
+
+ meson_nfc_clk_init(nfc);
+
+ ret = meson_nfc_nand_chips_init(dev, nfc);
+ if (ret) {
+ dev_err(nfc->dev, "failed to init chips\n");
+ return ret;
+ }
+
+ return 0;
+}
+
+static const struct udevice_id meson_nand_dt_ids[] = {
+ {.compatible = "amlogic,meson-axg-nfc",},
+ { /* sentinel */ }
+};
+
+U_BOOT_DRIVER(meson_nand) = {
+ .name = "meson_nand",
+ .id = UCLASS_MTD,
+ .of_match = meson_nand_dt_ids,
+ .probe = meson_probe,
+ .priv_auto = sizeof(struct meson_nfc),
+};
+
+void board_nand_init(void)
+{
+ struct udevice *dev;
+ int ret;
+
+ ret = uclass_get_device_by_driver(UCLASS_MTD,
+ DM_DRIVER_GET(meson_nand), &dev);
+
+ if (ret && ret != -ENODEV)
+ pr_err("Failed to initialize: %d\n", ret);
+}
diff --git a/drivers/mtd/nand/raw/mxc_nand.c b/drivers/mtd/nand/raw/mxc_nand.c
index dbdc5b0..0750b38 100644
--- a/drivers/mtd/nand/raw/mxc_nand.c
+++ b/drivers/mtd/nand/raw/mxc_nand.c
@@ -5,7 +5,7 @@
* Copyright 2009 Ilya Yanok, <yanok@emcraft.com>
*/
-#include <common.h>
+#include <config.h>
#include <log.h>
#include <nand.h>
#include <linux/delay.h>
diff --git a/drivers/mtd/nand/raw/mxc_nand_spl.c b/drivers/mtd/nand/raw/mxc_nand_spl.c
index a855c99..c587284 100644
--- a/drivers/mtd/nand/raw/mxc_nand_spl.c
+++ b/drivers/mtd/nand/raw/mxc_nand_spl.c
@@ -10,7 +10,7 @@
* Stefan Roese, DENX Software Engineering, sr at denx.de.
*/
-#include <common.h>
+#include <config.h>
#include <hang.h>
#include <nand.h>
#include <system-constants.h>
diff --git a/drivers/mtd/nand/raw/mxic_nand.c b/drivers/mtd/nand/raw/mxic_nand.c
index 6abdc24..0e54b5f 100644
--- a/drivers/mtd/nand/raw/mxic_nand.c
+++ b/drivers/mtd/nand/raw/mxic_nand.c
@@ -6,7 +6,6 @@
* Zhengxun Li <zhengxunli@mxic.com.tw>
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <malloc.h>
diff --git a/drivers/mtd/nand/raw/mxs_nand.c b/drivers/mtd/nand/raw/mxs_nand.c
index fd65772..11b0247 100644
--- a/drivers/mtd/nand/raw/mxs_nand.c
+++ b/drivers/mtd/nand/raw/mxs_nand.c
@@ -13,7 +13,6 @@
* Copyright 2017-2019 NXP
*/
-#include <common.h>
#include <clk.h>
#include <cpu_func.h>
#include <dm.h>
diff --git a/drivers/mtd/nand/raw/mxs_nand_spl.c b/drivers/mtd/nand/raw/mxs_nand_spl.c
index f7d3f02..c8e0643 100644
--- a/drivers/mtd/nand/raw/mxs_nand_spl.c
+++ b/drivers/mtd/nand/raw/mxs_nand_spl.c
@@ -4,7 +4,6 @@
* Copyright 2019 NXP
* Author: Tim Harvey <tharvey@gateworks.com>
*/
-#include <common.h>
#include <log.h>
#include <nand.h>
#include <malloc.h>
diff --git a/drivers/mtd/nand/raw/nand.c b/drivers/mtd/nand/raw/nand.c
index b591170..3605449 100644
--- a/drivers/mtd/nand/raw/nand.c
+++ b/drivers/mtd/nand/raw/nand.c
@@ -5,7 +5,7 @@
* Ladislav Michl <michl@2n.cz>
*/
-#include <common.h>
+#include <config.h>
#include <nand.h>
#include <errno.h>
#include <linux/mtd/concat.h>
diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c
index c40a0f2..18b95ca 100644
--- a/drivers/mtd/nand/raw/nand_base.c
+++ b/drivers/mtd/nand/raw/nand_base.c
@@ -28,7 +28,6 @@
*/
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
-#include <common.h>
#include <log.h>
#include <malloc.h>
#include <watchdog.h>
@@ -4118,7 +4117,7 @@
*/
void nand_decode_ext_id(struct nand_chip *chip)
{
- struct mtd_info *mtd = &chip->mtd;
+ struct mtd_info *mtd = nand_to_mtd(chip);
int extid;
/* The 3rd id byte holds MLC / multichip data */
chip->bits_per_cell = nand_get_bits_per_cell(chip->id.data[2]);
@@ -4185,7 +4184,7 @@
*/
static void nand_decode_id(struct nand_chip *chip, struct nand_flash_dev *type)
{
- struct mtd_info *mtd = &chip->mtd;
+ struct mtd_info *mtd = nand_to_mtd(chip);
mtd->erasesize = type->erasesize;
mtd->writesize = type->pagesize;
@@ -4265,7 +4264,7 @@
int nand_detect(struct nand_chip *chip, int *maf_id,
int *dev_id, struct nand_flash_dev *type)
{
- struct mtd_info *mtd = &chip->mtd;
+ struct mtd_info *mtd = nand_to_mtd(chip);
const struct nand_manufacturer *manufacturer_desc;
int busw, ret;
u8 *id_data = chip->id.data;
diff --git a/drivers/mtd/nand/raw/nand_bbt.c b/drivers/mtd/nand/raw/nand_bbt.c
index cd45187..1fb8535 100644
--- a/drivers/mtd/nand/raw/nand_bbt.c
+++ b/drivers/mtd/nand/raw/nand_bbt.c
@@ -57,7 +57,6 @@
*
*/
-#include <common.h>
#include <log.h>
#include <malloc.h>
#include <dm/devres.h>
diff --git a/drivers/mtd/nand/raw/nand_bch.c b/drivers/mtd/nand/raw/nand_bch.c
index bb48ebb..f317cc2 100644
--- a/drivers/mtd/nand/raw/nand_bch.c
+++ b/drivers/mtd/nand/raw/nand_bch.c
@@ -7,7 +7,6 @@
*
*/
-#include <common.h>
#include <log.h>
#include <dm/devres.h>
#include <linux/printk.h>
diff --git a/drivers/mtd/nand/raw/nand_ecc.c b/drivers/mtd/nand/raw/nand_ecc.c
index 2bc329b..0530ccb 100644
--- a/drivers/mtd/nand/raw/nand_ecc.c
+++ b/drivers/mtd/nand/raw/nand_ecc.c
@@ -22,7 +22,6 @@
* this file might be covered by the GNU General Public License.
*/
-#include <common.h>
#include <linux/errno.h>
#include <linux/mtd/mtd.h>
diff --git a/drivers/mtd/nand/raw/nand_ids.c b/drivers/mtd/nand/raw/nand_ids.c
index 22ea5e2..4f46378 100644
--- a/drivers/mtd/nand/raw/nand_ids.c
+++ b/drivers/mtd/nand/raw/nand_ids.c
@@ -6,7 +6,6 @@
* published by the Free Software Foundation.
*
*/
-#include <common.h>
#include <linux/mtd/rawnand.h>
#include <linux/sizes.h>
@@ -62,7 +61,7 @@
{ .id = {0xad, 0xde, 0x94, 0xda, 0x74, 0xc4} },
SZ_8K, SZ_8K, SZ_2M, NAND_NEED_SCRAMBLING, 6, 640,
NAND_ECC_INFO(40, SZ_1K), 4 },
- {"H27QCG8T2E5R‐BCF 64G 3.3V 8-bit",
+ {"H27QCG8T2E5R-BCF 64G 3.3V 8-bit",
{ .id = {0xad, 0xde, 0x14, 0xa7, 0x42, 0x4a} },
SZ_16K, SZ_8K, SZ_4M, NAND_NEED_SCRAMBLING, 6, 1664,
NAND_ECC_INFO(56, SZ_1K), 1 },
diff --git a/drivers/mtd/nand/raw/nand_spl_load.c b/drivers/mtd/nand/raw/nand_spl_load.c
index 7ac9bf4..87af675 100644
--- a/drivers/mtd/nand/raw/nand_spl_load.c
+++ b/drivers/mtd/nand/raw/nand_spl_load.c
@@ -4,7 +4,7 @@
* Heiko Schocher, DENX Software Engineering, hs@denx.de.
*/
-#include <common.h>
+#include <config.h>
#include <nand.h>
/*
diff --git a/drivers/mtd/nand/raw/nand_spl_simple.c b/drivers/mtd/nand/raw/nand_spl_simple.c
index 80d6e0e..c0956ab 100644
--- a/drivers/mtd/nand/raw/nand_spl_simple.c
+++ b/drivers/mtd/nand/raw/nand_spl_simple.c
@@ -4,7 +4,7 @@
* Stefan Roese, DENX Software Engineering, sr@denx.de.
*/
-#include <common.h>
+#include <config.h>
#include <nand.h>
#include <system-constants.h>
#include <asm/io.h>
diff --git a/drivers/mtd/nand/raw/nand_timings.c b/drivers/mtd/nand/raw/nand_timings.c
index e6aa790..c1bac1d 100644
--- a/drivers/mtd/nand/raw/nand_timings.c
+++ b/drivers/mtd/nand/raw/nand_timings.c
@@ -8,7 +8,6 @@
* published by the Free Software Foundation.
*
*/
-#include <common.h>
#include <linux/err.h>
#include <linux/kernel.h>
#include <linux/mtd/rawnand.h>
diff --git a/drivers/mtd/nand/raw/nand_util.c b/drivers/mtd/nand/raw/nand_util.c
index 72cc24f..fda4239 100644
--- a/drivers/mtd/nand/raw/nand_util.c
+++ b/drivers/mtd/nand/raw/nand_util.c
@@ -18,7 +18,6 @@
* Copyright 2010 Freescale Semiconductor
*/
-#include <common.h>
#include <command.h>
#include <log.h>
#include <watchdog.h>
diff --git a/drivers/mtd/nand/raw/omap_elm.c b/drivers/mtd/nand/raw/omap_elm.c
index 015ec9b..61751b9 100644
--- a/drivers/mtd/nand/raw/omap_elm.c
+++ b/drivers/mtd/nand/raw/omap_elm.c
@@ -12,7 +12,6 @@
* sets in uboot
*/
-#include <common.h>
#include <asm/io.h>
#include <linux/errno.h>
#include <asm/arch/hardware.h>
diff --git a/drivers/mtd/nand/raw/omap_gpmc.c b/drivers/mtd/nand/raw/omap_gpmc.c
index 2f8fa7d..92a92ad 100644
--- a/drivers/mtd/nand/raw/omap_gpmc.c
+++ b/drivers/mtd/nand/raw/omap_gpmc.c
@@ -4,7 +4,7 @@
* Rohit Choraria <rohitkc@ti.com>
*/
-#include <common.h>
+#include <config.h>
#include <log.h>
#include <system-constants.h>
#include <asm/io.h>
diff --git a/drivers/mtd/nand/raw/pxa3xx_nand.c b/drivers/mtd/nand/raw/pxa3xx_nand.c
index 1d9a6d1..17c5601 100644
--- a/drivers/mtd/nand/raw/pxa3xx_nand.c
+++ b/drivers/mtd/nand/raw/pxa3xx_nand.c
@@ -6,7 +6,6 @@
* Copyright © 2006 Marvell International Ltd.
*/
-#include <common.h>
#include <malloc.h>
#include <fdtdec.h>
#include <nand.h>
diff --git a/drivers/mtd/nand/raw/rockchip_nfc.c b/drivers/mtd/nand/raw/rockchip_nfc.c
index 088cc7f..f730e15 100644
--- a/drivers/mtd/nand/raw/rockchip_nfc.c
+++ b/drivers/mtd/nand/raw/rockchip_nfc.c
@@ -5,7 +5,6 @@
* Author: Yifeng Zhao <yifeng.zhao@rock-chips.com>
*/
-#include <common.h>
#include <asm/io.h>
#include <clk.h>
#include <dm.h>
diff --git a/drivers/mtd/nand/raw/stm32_fmc2_nand.c b/drivers/mtd/nand/raw/stm32_fmc2_nand.c
index 3528824..083ea4c 100644
--- a/drivers/mtd/nand/raw/stm32_fmc2_nand.c
+++ b/drivers/mtd/nand/raw/stm32_fmc2_nand.c
@@ -6,7 +6,6 @@
#define LOG_CATEGORY UCLASS_MTD
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <log.h>
@@ -34,7 +33,7 @@
#define FMC2_RB_DELAY_US 30
/* Max chip enable */
-#define FMC2_MAX_CE 2
+#define FMC2_MAX_CE 4
/* Timings */
#define FMC2_THIZ 1
@@ -160,6 +159,11 @@
return container_of(chip, struct stm32_fmc2_nand, chip);
}
+struct stm32_fmc2_nfc_data {
+ int max_ncs;
+ struct udevice *(*get_cdev)(struct udevice *dev);
+};
+
struct stm32_fmc2_nfc {
struct nand_hw_control base;
struct stm32_fmc2_nand nand;
@@ -169,6 +173,7 @@
fdt_addr_t cmd_base[FMC2_MAX_CE];
fdt_addr_t addr_base[FMC2_MAX_CE];
struct clk clk;
+ const struct stm32_fmc2_nfc_data *data;
u8 cs_assigned;
int cs_sel;
@@ -815,7 +820,7 @@
}
for (i = 0; i < nand->ncs; i++) {
- if (cs[i] >= FMC2_MAX_CE) {
+ if (cs[i] >= nfc->data->max_ncs) {
log_err("Invalid reg value: %d\n", nand->cs_used[i]);
return -EINVAL;
}
@@ -906,10 +911,18 @@
spin_lock_init(&nfc->controller.lock);
init_waitqueue_head(&nfc->controller.wq);
- cdev = stm32_fmc2_nfc_get_cdev(dev);
- if (!cdev)
+ nfc->data = (void *)dev_get_driver_data(dev);
+ if (!nfc->data)
return -EINVAL;
+ if (nfc->data->get_cdev) {
+ cdev = nfc->data->get_cdev(dev);
+ if (!cdev)
+ return -EINVAL;
+ } else {
+ cdev = dev->parent;
+ }
+
ret = stm32_fmc2_nfc_parse_dt(dev, nfc);
if (ret)
return ret;
@@ -921,7 +934,7 @@
if (dev == cdev)
start_region = 1;
- for (chip_cs = 0, mem_region = start_region; chip_cs < FMC2_MAX_CE;
+ for (chip_cs = 0, mem_region = start_region; chip_cs < nfc->data->max_ncs;
chip_cs++, mem_region += 3) {
if (!(nfc->cs_assigned & BIT(chip_cs)))
continue;
@@ -1033,9 +1046,28 @@
return nand_register(0, mtd);
}
+static const struct stm32_fmc2_nfc_data stm32_fmc2_nfc_mp1_data = {
+ .max_ncs = 2,
+ .get_cdev = stm32_fmc2_nfc_get_cdev,
+};
+
+static const struct stm32_fmc2_nfc_data stm32_fmc2_nfc_mp25_data = {
+ .max_ncs = 4,
+};
+
static const struct udevice_id stm32_fmc2_nfc_match[] = {
- { .compatible = "st,stm32mp15-fmc2" },
- { .compatible = "st,stm32mp1-fmc2-nfc" },
+ {
+ .compatible = "st,stm32mp15-fmc2",
+ .data = (ulong)&stm32_fmc2_nfc_mp1_data,
+ },
+ {
+ .compatible = "st,stm32mp1-fmc2-nfc",
+ .data = (ulong)&stm32_fmc2_nfc_mp1_data,
+ },
+ {
+ .compatible = "st,stm32mp25-fmc2-nfc",
+ .data = (ulong)&stm32_fmc2_nfc_mp25_data,
+ },
{ /* Sentinel */ }
};
diff --git a/drivers/mtd/nand/raw/sunxi_nand.c b/drivers/mtd/nand/raw/sunxi_nand.c
index 0b5b74d..34197bb 100644
--- a/drivers/mtd/nand/raw/sunxi_nand.c
+++ b/drivers/mtd/nand/raw/sunxi_nand.c
@@ -25,7 +25,6 @@
*/
#include <clk.h>
-#include <common.h>
#include <dm.h>
#include <malloc.h>
#include <memalign.h>
diff --git a/drivers/mtd/nand/raw/sunxi_nand_spl.c b/drivers/mtd/nand/raw/sunxi_nand_spl.c
index c9b8c78..040138e 100644
--- a/drivers/mtd/nand/raw/sunxi_nand_spl.c
+++ b/drivers/mtd/nand/raw/sunxi_nand_spl.c
@@ -6,7 +6,6 @@
#include <asm/arch/clock.h>
#include <asm/io.h>
-#include <common.h>
#include <config.h>
#include <nand.h>
#include <linux/bitops.h>
diff --git a/drivers/mtd/nand/raw/tegra_nand.c b/drivers/mtd/nand/raw/tegra_nand.c
index 6086ecd..8285f87 100644
--- a/drivers/mtd/nand/raw/tegra_nand.c
+++ b/drivers/mtd/nand/raw/tegra_nand.c
@@ -6,7 +6,6 @@
* (C) Copyright 2006 DENX Software Engineering
*/
-#include <common.h>
#include <log.h>
#include <asm/global_data.h>
#include <asm/io.h>
diff --git a/drivers/mtd/nand/raw/vf610_nfc.c b/drivers/mtd/nand/raw/vf610_nfc.c
index d2363a0..1026595 100644
--- a/drivers/mtd/nand/raw/vf610_nfc.c
+++ b/drivers/mtd/nand/raw/vf610_nfc.c
@@ -21,7 +21,7 @@
* - HW ECC: Only 24 and 32-bit error correction implemented.
*/
-#include <common.h>
+#include <config.h>
#include <malloc.h>
#include <dm/device_compat.h>
#include <linux/printk.h>
diff --git a/drivers/mtd/nand/raw/zynq_nand.c b/drivers/mtd/nand/raw/zynq_nand.c
index bacaf13..5f90171 100644
--- a/drivers/mtd/nand/raw/zynq_nand.c
+++ b/drivers/mtd/nand/raw/zynq_nand.c
@@ -6,7 +6,6 @@
* This driver is based on plat_nand.c and mxc_nand.c drivers
*/
-#include <common.h>
#include <log.h>
#include <malloc.h>
#include <asm/io.h>
diff --git a/drivers/mtd/nand/spi/Makefile b/drivers/mtd/nand/spi/Makefile
index f172f47..65b836b 100644
--- a/drivers/mtd/nand/spi/Makefile
+++ b/drivers/mtd/nand/spi/Makefile
@@ -1,5 +1,5 @@
# SPDX-License-Identifier: GPL-2.0
spinand-objs := core.o esmt.o gigadevice.o macronix.o micron.o paragon.o
-spinand-objs += toshiba.o winbond.o
+spinand-objs += toshiba.o winbond.o xtx.o
obj-$(CONFIG_MTD_SPI_NAND) += spinand.o
diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c
index 8ca3345..ef50237 100644
--- a/drivers/mtd/nand/spi/core.c
+++ b/drivers/mtd/nand/spi/core.c
@@ -21,7 +21,6 @@
#include <linux/spi/spi.h>
#include <linux/spi/spi-mem.h>
#else
-#include <common.h>
#include <errno.h>
#include <watchdog.h>
#include <spi.h>
@@ -829,6 +828,7 @@
&toshiba_spinand_manufacturer,
&winbond_spinand_manufacturer,
&esmt_c8_spinand_manufacturer,
+ &xtx_spinand_manufacturer,
};
static int spinand_manufacturer_match(struct spinand_device *spinand,
diff --git a/drivers/mtd/nand/spi/xtx.c b/drivers/mtd/nand/spi/xtx.c
new file mode 100644
index 0000000..aee1849
--- /dev/null
+++ b/drivers/mtd/nand/spi/xtx.c
@@ -0,0 +1,266 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Author:
+ * Felix Matouschek <felix@matouschek.org>
+ */
+
+#include <linux/bitfield.h>
+#ifndef __UBOOT__
+#include <linux/device.h>
+#include <linux/kernel.h>
+#endif
+#include <linux/mtd/spinand.h>
+
+#define SPINAND_MFR_XTX 0x0B
+
+#define XT26G0XA_STATUS_ECC_MASK GENMASK(5, 2)
+#define XT26G0XA_STATUS_ECC_NO_DETECTED (0 << 2)
+#define XT26G0XA_STATUS_ECC_8_CORRECTED (3 << 4)
+#define XT26G0XA_STATUS_ECC_UNCOR_ERROR (2 << 4)
+
+#define XT26XXXD_STATUS_ECC3_ECC2_MASK GENMASK(7, 6)
+#define XT26XXXD_STATUS_ECC_NO_DETECTED (0)
+#define XT26XXXD_STATUS_ECC_1_7_CORRECTED (1)
+#define XT26XXXD_STATUS_ECC_8_CORRECTED (3)
+#define XT26XXXD_STATUS_ECC_UNCOR_ERROR (2)
+
+static SPINAND_OP_VARIANTS(read_cache_variants,
+ SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 1, NULL, 0),
+ SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
+ SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0),
+ SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
+ SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
+ SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
+
+static SPINAND_OP_VARIANTS(write_cache_variants,
+ SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
+ SPINAND_PROG_LOAD(true, 0, NULL, 0));
+
+static SPINAND_OP_VARIANTS(update_cache_variants,
+ SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
+ SPINAND_PROG_LOAD(false, 0, NULL, 0));
+
+static int xt26g0xa_ooblayout_ecc(struct mtd_info *mtd, int section,
+ struct mtd_oob_region *region)
+{
+ if (section)
+ return -ERANGE;
+
+ region->offset = 48;
+ region->length = 16;
+
+ return 0;
+}
+
+static int xt26g0xa_ooblayout_free(struct mtd_info *mtd, int section,
+ struct mtd_oob_region *region)
+{
+ if (section)
+ return -ERANGE;
+
+ region->offset = 1;
+ region->length = 47;
+
+ return 0;
+}
+
+static const struct mtd_ooblayout_ops xt26g0xa_ooblayout = {
+ .ecc = xt26g0xa_ooblayout_ecc,
+ .rfree = xt26g0xa_ooblayout_free,
+};
+
+static int xt26g0xa_ecc_get_status(struct spinand_device *spinand,
+ u8 status)
+{
+ status = status & XT26G0XA_STATUS_ECC_MASK;
+
+ switch (status) {
+ case XT26G0XA_STATUS_ECC_NO_DETECTED:
+ return 0;
+ case XT26G0XA_STATUS_ECC_8_CORRECTED:
+ return 8;
+ case XT26G0XA_STATUS_ECC_UNCOR_ERROR:
+ return -EBADMSG;
+ default:
+ break;
+ }
+
+ /* At this point values greater than (2 << 4) are invalid */
+ if (status > XT26G0XA_STATUS_ECC_UNCOR_ERROR)
+ return -EINVAL;
+
+ /* (1 << 2) through (7 << 2) are 1-7 corrected errors */
+ return status >> 2;
+}
+
+static int xt26xxxd_ooblayout_ecc(struct mtd_info *mtd, int section,
+ struct mtd_oob_region *region)
+{
+ if (section)
+ return -ERANGE;
+
+ region->offset = mtd->oobsize / 2;
+ region->length = mtd->oobsize / 2;
+
+ return 0;
+}
+
+static int xt26xxxd_ooblayout_free(struct mtd_info *mtd, int section,
+ struct mtd_oob_region *region)
+{
+ if (section)
+ return -ERANGE;
+
+ region->offset = 2;
+ region->length = mtd->oobsize / 2 - 2;
+
+ return 0;
+}
+
+static const struct mtd_ooblayout_ops xt26xxxd_ooblayout = {
+ .ecc = xt26xxxd_ooblayout_ecc,
+ .rfree = xt26xxxd_ooblayout_free,
+};
+
+static int xt26xxxd_ecc_get_status(struct spinand_device *spinand,
+ u8 status)
+{
+ switch (FIELD_GET(STATUS_ECC_MASK, status)) {
+ case XT26XXXD_STATUS_ECC_NO_DETECTED:
+ return 0;
+ case XT26XXXD_STATUS_ECC_UNCOR_ERROR:
+ return -EBADMSG;
+ case XT26XXXD_STATUS_ECC_1_7_CORRECTED:
+ return 4 + FIELD_GET(XT26XXXD_STATUS_ECC3_ECC2_MASK, status);
+ case XT26XXXD_STATUS_ECC_8_CORRECTED:
+ return 8;
+ default:
+ break;
+ }
+
+ return -EINVAL;
+}
+
+static const struct spinand_info xtx_spinand_table[] = {
+ SPINAND_INFO("XT26G01A",
+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0xE1),
+ NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
+ NAND_ECCREQ(8, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ SPINAND_HAS_QE_BIT,
+ SPINAND_ECCINFO(&xt26g0xa_ooblayout,
+ xt26g0xa_ecc_get_status)),
+ SPINAND_INFO("XT26G02A",
+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0xE2),
+ NAND_MEMORG(1, 2048, 64, 64, 2048, 40, 1, 1, 1),
+ NAND_ECCREQ(8, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ SPINAND_HAS_QE_BIT,
+ SPINAND_ECCINFO(&xt26g0xa_ooblayout,
+ xt26g0xa_ecc_get_status)),
+ SPINAND_INFO("XT26G04A",
+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0xE3),
+ NAND_MEMORG(1, 2048, 64, 128, 2048, 40, 1, 1, 1),
+ NAND_ECCREQ(8, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ SPINAND_HAS_QE_BIT,
+ SPINAND_ECCINFO(&xt26g0xa_ooblayout,
+ xt26g0xa_ecc_get_status)),
+ SPINAND_INFO("XT26G01D",
+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x31),
+ NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),
+ NAND_ECCREQ(8, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ 0,
+ SPINAND_ECCINFO(&xt26xxxd_ooblayout,
+ xt26xxxd_ecc_get_status)),
+ SPINAND_INFO("XT26G11D",
+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x34),
+ NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),
+ NAND_ECCREQ(8, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ 0,
+ SPINAND_ECCINFO(&xt26xxxd_ooblayout,
+ xt26xxxd_ecc_get_status)),
+ SPINAND_INFO("XT26Q01D",
+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x51),
+ NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),
+ NAND_ECCREQ(8, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ 0,
+ SPINAND_ECCINFO(&xt26xxxd_ooblayout,
+ xt26xxxd_ecc_get_status)),
+ SPINAND_INFO("XT26G02D",
+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x32),
+ NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1),
+ NAND_ECCREQ(8, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ 0,
+ SPINAND_ECCINFO(&xt26xxxd_ooblayout,
+ xt26xxxd_ecc_get_status)),
+ SPINAND_INFO("XT26G12D",
+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x35),
+ NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1),
+ NAND_ECCREQ(8, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ 0,
+ SPINAND_ECCINFO(&xt26xxxd_ooblayout,
+ xt26xxxd_ecc_get_status)),
+ SPINAND_INFO("XT26Q02D",
+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x52),
+ NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1),
+ NAND_ECCREQ(8, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ 0,
+ SPINAND_ECCINFO(&xt26xxxd_ooblayout,
+ xt26xxxd_ecc_get_status)),
+ SPINAND_INFO("XT26G04D",
+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x33),
+ NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1),
+ NAND_ECCREQ(8, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ 0,
+ SPINAND_ECCINFO(&xt26xxxd_ooblayout,
+ xt26xxxd_ecc_get_status)),
+ SPINAND_INFO("XT26Q04D",
+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x53),
+ NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1),
+ NAND_ECCREQ(8, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ 0,
+ SPINAND_ECCINFO(&xt26xxxd_ooblayout,
+ xt26xxxd_ecc_get_status)),
+};
+
+static const struct spinand_manufacturer_ops xtx_spinand_manuf_ops = {
+};
+
+const struct spinand_manufacturer xtx_spinand_manufacturer = {
+ .id = SPINAND_MFR_XTX,
+ .name = "XTX",
+ .chips = xtx_spinand_table,
+ .nchips = ARRAY_SIZE(xtx_spinand_table),
+ .ops = &xtx_spinand_manuf_ops,
+};
diff --git a/drivers/mtd/nvmxip/nvmxip-uclass.c b/drivers/mtd/nvmxip/nvmxip-uclass.c
index 9a316d1..95dfa58 100644
--- a/drivers/mtd/nvmxip/nvmxip-uclass.c
+++ b/drivers/mtd/nvmxip/nvmxip-uclass.c
@@ -6,7 +6,6 @@
* Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#if CONFIG_IS_ENABLED(SANDBOX64)
diff --git a/drivers/mtd/nvmxip/nvmxip.c b/drivers/mtd/nvmxip/nvmxip.c
index 0bd98d6..229938d 100644
--- a/drivers/mtd/nvmxip/nvmxip.c
+++ b/drivers/mtd/nvmxip/nvmxip.c
@@ -6,7 +6,6 @@
* Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <mapmem.h>
diff --git a/drivers/mtd/nvmxip/nvmxip_qspi.c b/drivers/mtd/nvmxip/nvmxip_qspi.c
index 4d74711..460887c 100644
--- a/drivers/mtd/nvmxip/nvmxip_qspi.c
+++ b/drivers/mtd/nvmxip/nvmxip_qspi.c
@@ -6,7 +6,6 @@
* Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
*/
-#include <common.h>
#include <dm.h>
#include <fdt_support.h>
#include <linux/errno.h>
diff --git a/drivers/mtd/onenand/onenand_base.c b/drivers/mtd/onenand/onenand_base.c
index 762b01c..edecb84 100644
--- a/drivers/mtd/onenand/onenand_base.c
+++ b/drivers/mtd/onenand/onenand_base.c
@@ -19,7 +19,6 @@
* published by the Free Software Foundation.
*/
-#include <common.h>
#include <log.h>
#include <watchdog.h>
#include <dm/devres.h>
diff --git a/drivers/mtd/onenand/onenand_bbt.c b/drivers/mtd/onenand/onenand_bbt.c
index cc1e449..6af1cb2 100644
--- a/drivers/mtd/onenand/onenand_bbt.c
+++ b/drivers/mtd/onenand/onenand_bbt.c
@@ -14,7 +14,6 @@
* published by the Free Software Foundation.
*/
-#include <common.h>
#include <log.h>
#include <linux/compat.h>
#include <linux/mtd/mtd.h>
diff --git a/drivers/mtd/onenand/onenand_spl.c b/drivers/mtd/onenand/onenand_spl.c
index 2699958..a9d54a2 100644
--- a/drivers/mtd/onenand/onenand_spl.c
+++ b/drivers/mtd/onenand/onenand_spl.c
@@ -7,9 +7,10 @@
* Kyungmin Park <kyungmin.park@samsung.com>
*/
-#include <common.h>
+#include <config.h>
#include <asm/io.h>
#include <linux/bitops.h>
+#include <linux/string.h>
#include <linux/mtd/onenand_regs.h>
#include <onenand_uboot.h>
diff --git a/drivers/mtd/onenand/onenand_uboot.c b/drivers/mtd/onenand/onenand_uboot.c
index ecacabe..db0ac6c 100644
--- a/drivers/mtd/onenand/onenand_uboot.c
+++ b/drivers/mtd/onenand/onenand_uboot.c
@@ -13,7 +13,7 @@
* OneNAND initialization at U-Boot
*/
-#include <common.h>
+#include <config.h>
#include <display_options.h>
#include <linux/compat.h>
#include <linux/mtd/mtd.h>
diff --git a/drivers/mtd/onenand/samsung.c b/drivers/mtd/onenand/samsung.c
index c415e51..ccfdad4 100644
--- a/drivers/mtd/onenand/samsung.c
+++ b/drivers/mtd/onenand/samsung.c
@@ -9,7 +9,6 @@
* Emulate the pseudo BufferRAM
*/
-#include <common.h>
#include <malloc.h>
#include <linux/compat.h>
#include <linux/mtd/mtd.h>
diff --git a/drivers/mtd/renesas_rpc_hf.c b/drivers/mtd/renesas_rpc_hf.c
index 979b64d..8dcffde 100644
--- a/drivers/mtd/renesas_rpc_hf.c
+++ b/drivers/mtd/renesas_rpc_hf.c
@@ -7,7 +7,6 @@
* Copyright (C) 2017 Marek Vasut <marek.vasut@gmail.com>
*/
-#include <common.h>
#include <malloc.h>
#include <asm/io.h>
#include <clk.h>
diff --git a/drivers/mtd/spi/Kconfig b/drivers/mtd/spi/Kconfig
index d068b78..bedc4e9 100644
--- a/drivers/mtd/spi/Kconfig
+++ b/drivers/mtd/spi/Kconfig
@@ -246,7 +246,7 @@
to erasing whole blocks (32/64 KiB).
Changing a small part of the flash's contents is usually faster with
small sectors. On the other hand erasing should be faster when using
- 64 KiB block instead of 16 × 4 KiB sectors.
+ 64 KiB block instead of 16 x 4 KiB sectors.
Please note that some tools/drivers/filesystems may not work with
4096 B erase size (e.g. UBIFS requires 15 KiB as a minimum).
diff --git a/drivers/mtd/spi/fsl_espi_spl.c b/drivers/mtd/spi/fsl_espi_spl.c
index cdbdbd6..73eea92 100644
--- a/drivers/mtd/spi/fsl_espi_spl.c
+++ b/drivers/mtd/spi/fsl_espi_spl.c
@@ -3,7 +3,7 @@
* Copyright 2013 Freescale Semiconductor, Inc.
*/
-#include <common.h>
+#include <config.h>
#include <cpu_func.h>
#include <hang.h>
#include <spi_flash.h>
diff --git a/drivers/mtd/spi/sandbox.c b/drivers/mtd/spi/sandbox.c
index 4fe5471..2d5a16b 100644
--- a/drivers/mtd/spi/sandbox.c
+++ b/drivers/mtd/spi/sandbox.c
@@ -10,7 +10,6 @@
#define LOG_CATEGORY UCLASS_SPI_FLASH
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <malloc.h>
diff --git a/drivers/mtd/spi/sf-uclass.c b/drivers/mtd/spi/sf-uclass.c
index 2da0cf0..a4d15bd 100644
--- a/drivers/mtd/spi/sf-uclass.c
+++ b/drivers/mtd/spi/sf-uclass.c
@@ -5,7 +5,6 @@
#define LOG_CATEGORY UCLASS_SPI_FLASH
-#include <common.h>
#include <bootdev.h>
#include <dm.h>
#include <log.h>
diff --git a/drivers/mtd/spi/sf_bootdev.c b/drivers/mtd/spi/sf_bootdev.c
index d6b47b1..017a74a 100644
--- a/drivers/mtd/spi/sf_bootdev.c
+++ b/drivers/mtd/spi/sf_bootdev.c
@@ -5,7 +5,6 @@
* Copyright 2022 Google LLC
*/
-#include <common.h>
#include <bootdev.h>
#include <bootflow.h>
#include <bootmeth.h>
diff --git a/drivers/mtd/spi/sf_dataflash.c b/drivers/mtd/spi/sf_dataflash.c
index 6a0d953..6db2418 100644
--- a/drivers/mtd/spi/sf_dataflash.c
+++ b/drivers/mtd/spi/sf_dataflash.c
@@ -6,7 +6,6 @@
* Haikun Wang (haikun.wang@freescale.com)
*/
-#include <common.h>
#include <display_options.h>
#include <dm.h>
#include <errno.h>
diff --git a/drivers/mtd/spi/sf_mtd.c b/drivers/mtd/spi/sf_mtd.c
index 071b25a..7342f26 100644
--- a/drivers/mtd/spi/sf_mtd.c
+++ b/drivers/mtd/spi/sf_mtd.c
@@ -3,7 +3,6 @@
* Copyright (C) 2012-2014 Daniel Schwierzeck, daniel.schwierzeck@gmail.com
*/
-#include <common.h>
#include <malloc.h>
#include <linux/errno.h>
#include <linux/mtd/mtd.h>
diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c
index de6516f..7100b64 100644
--- a/drivers/mtd/spi/sf_probe.c
+++ b/drivers/mtd/spi/sf_probe.c
@@ -7,7 +7,6 @@
* Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc.
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <linux/mtd/spi-nor.h>
diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
index f86003c..982dd25 100644
--- a/drivers/mtd/spi/spi-nor-core.c
+++ b/drivers/mtd/spi/spi-nor-core.c
@@ -9,7 +9,6 @@
* Synced from Linux v4.19
*/
-#include <common.h>
#include <display_options.h>
#include <log.h>
#include <watchdog.h>
diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
index 4e83b8c..684206e 100644
--- a/drivers/mtd/spi/spi-nor-ids.c
+++ b/drivers/mtd/spi/spi-nor-ids.c
@@ -6,7 +6,6 @@
* Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/
*/
-#include <common.h>
#include <spi.h>
#include <spi_flash.h>
diff --git a/drivers/mtd/spi/spi-nor-tiny.c b/drivers/mtd/spi/spi-nor-tiny.c
index 0719fe8..5755c5e 100644
--- a/drivers/mtd/spi/spi-nor-tiny.c
+++ b/drivers/mtd/spi/spi-nor-tiny.c
@@ -9,7 +9,6 @@
* Synced from Linux v4.19
*/
-#include <common.h>
#include <log.h>
#include <dm/device_compat.h>
#include <linux/err.h>
diff --git a/drivers/mtd/stm32_flash.c b/drivers/mtd/stm32_flash.c
index 4523344..ec83be6 100644
--- a/drivers/mtd/stm32_flash.c
+++ b/drivers/mtd/stm32_flash.c
@@ -4,7 +4,7 @@
* Kamil Lulko, <kamil.lulko@gmail.com>
*/
-#include <common.h>
+#include <config.h>
#include <flash.h>
#include <asm/io.h>
#include <asm/arch/stm32.h>
diff --git a/drivers/mtd/ubispl/ubispl.c b/drivers/mtd/ubispl/ubispl.c
index b58d8e8..90a7c4c 100644
--- a/drivers/mtd/ubispl/ubispl.c
+++ b/drivers/mtd/ubispl/ubispl.c
@@ -7,7 +7,6 @@
* Copyright (c) International Business Machines Corp., 2006
*/
-#include <common.h>
#include <errno.h>
#include <linux/bug.h>
#include <u-boot/crc.h>
diff --git a/drivers/mux/mmio.c b/drivers/mux/mmio.c
index 00e0282..e112545 100644
--- a/drivers/mux/mmio.c
+++ b/drivers/mux/mmio.c
@@ -6,7 +6,6 @@
* Copyright (C) 2017 Pengutronix, Philipp Zabel <kernel@pengutronix.de>
* Copyright (C) 2019 Texas Instrument, Jean-jacques Hiblot <jjhiblot@ti.com>
*/
-#include <common.h>
#include <dm.h>
#include <mux-internal.h>
#include <regmap.h>
diff --git a/drivers/mux/mux-uclass.c b/drivers/mux/mux-uclass.c
index 8833888..8a3e7a8 100644
--- a/drivers/mux/mux-uclass.c
+++ b/drivers/mux/mux-uclass.c
@@ -13,7 +13,6 @@
#define LOG_CATEGORY UCLASS_MUX
-#include <common.h>
#include <dm.h>
#include <mux-internal.h>
#include <dm/device-internal.h>
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index 6677366..dc34045 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -23,6 +23,7 @@
obj-$(CONFIG_DWC_ETH_QOS_ROCKCHIP) += dwc_eth_qos_rockchip.o
obj-$(CONFIG_DWC_ETH_QOS_QCOM) += dwc_eth_qos_qcom.o
obj-$(CONFIG_DWC_ETH_QOS_STARFIVE) += dwc_eth_qos_starfive.o
+obj-$(CONFIG_DWC_ETH_QOS_STM32) += dwc_eth_qos_stm32.o
obj-$(CONFIG_E1000) += e1000.o
obj-$(CONFIG_E1000_SPI) += e1000_spi.o
obj-$(CONFIG_EEPRO100) += eepro100.o
diff --git a/drivers/net/ag7xxx.c b/drivers/net/ag7xxx.c
index da1f3f4..059a65d 100644
--- a/drivers/net/ag7xxx.c
+++ b/drivers/net/ag7xxx.c
@@ -6,7 +6,6 @@
* Copyright (C) 2019 Rosy Song <rosysong@rosinson.com>
*/
-#include <common.h>
#include <clock_legacy.h>
#include <cpu_func.h>
#include <dm.h>
diff --git a/drivers/net/altera_tse.c b/drivers/net/altera_tse.c
index e234093..c57aafd 100644
--- a/drivers/net/altera_tse.c
+++ b/drivers/net/altera_tse.c
@@ -8,7 +8,6 @@
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
-#include <common.h>
#include <cpu_func.h>
#include <dm.h>
#include <errno.h>
diff --git a/drivers/net/aspeed_mdio.c b/drivers/net/aspeed_mdio.c
index a99715a..f2e4392 100644
--- a/drivers/net/aspeed_mdio.c
+++ b/drivers/net/aspeed_mdio.c
@@ -7,7 +7,6 @@
* This file is inspired from the Linux kernel driver drivers/net/phy/mdio-aspeed.c
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <miiphy.h>
diff --git a/drivers/net/bcm-sf2-eth-gmac.c b/drivers/net/bcm-sf2-eth-gmac.c
index cbe1e85..ba244b4 100644
--- a/drivers/net/bcm-sf2-eth-gmac.c
+++ b/drivers/net/bcm-sf2-eth-gmac.c
@@ -11,7 +11,6 @@
#endif
#include <config.h>
-#include <common.h>
#include <cpu_func.h>
#include <log.h>
#include <malloc.h>
diff --git a/drivers/net/bcm-sf2-eth.c b/drivers/net/bcm-sf2-eth.c
index 1524f5c..c10719c 100644
--- a/drivers/net/bcm-sf2-eth.c
+++ b/drivers/net/bcm-sf2-eth.c
@@ -3,7 +3,6 @@
* Copyright 2014 Broadcom Corporation.
*/
-#include <common.h>
#include <log.h>
#include <malloc.h>
#include <net.h>
diff --git a/drivers/net/bcm6348-eth.c b/drivers/net/bcm6348-eth.c
index 15a94f6..f87db4a 100644
--- a/drivers/net/bcm6348-eth.c
+++ b/drivers/net/bcm6348-eth.c
@@ -6,7 +6,6 @@
* Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <dma.h>
diff --git a/drivers/net/bcm6368-eth.c b/drivers/net/bcm6368-eth.c
index 9679a45..0601fcc 100644
--- a/drivers/net/bcm6368-eth.c
+++ b/drivers/net/bcm6368-eth.c
@@ -6,7 +6,6 @@
* Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <dma.h>
diff --git a/drivers/net/bnxt/bnxt.c b/drivers/net/bnxt/bnxt.c
index 1c9a996..25fbcd7 100644
--- a/drivers/net/bnxt/bnxt.c
+++ b/drivers/net/bnxt/bnxt.c
@@ -3,7 +3,6 @@
* Copyright 2019-2021 Broadcom.
*/
-#include <common.h>
#include <asm/io.h>
#include <dm.h>
diff --git a/drivers/net/calxedaxgmac.c b/drivers/net/calxedaxgmac.c
index eb1e2a7..ebb3994 100644
--- a/drivers/net/calxedaxgmac.c
+++ b/drivers/net/calxedaxgmac.c
@@ -3,7 +3,6 @@
* Copyright 2010-2011 Calxeda, Inc.
*/
-#include <common.h>
#include <malloc.h>
#include <net.h>
#include <linux/compiler.h>
diff --git a/drivers/net/cortina_ni.c b/drivers/net/cortina_ni.c
index ef6ecd8..7902688 100644
--- a/drivers/net/cortina_ni.c
+++ b/drivers/net/cortina_ni.c
@@ -7,7 +7,6 @@
* Ethernet MAC Driver for all supported CAxxxx SoCs
*/
-#include <common.h>
#include <command.h>
#include <malloc.h>
#include <net.h>
diff --git a/drivers/net/dc2114x.c b/drivers/net/dc2114x.c
index 4e7af95..ce028f4 100644
--- a/drivers/net/dc2114x.c
+++ b/drivers/net/dc2114x.c
@@ -1,6 +1,5 @@
// SPDX-License-Identifier: GPL-2.0+
-#include <common.h>
#include <asm/io.h>
#include <dm.h>
#include <malloc.h>
diff --git a/drivers/net/designware.c b/drivers/net/designware.c
index c222197..07b0f49 100644
--- a/drivers/net/designware.c
+++ b/drivers/net/designware.c
@@ -8,7 +8,6 @@
* Designware ethernet IP driver for U-Boot
*/
-#include <common.h>
#include <clk.h>
#include <cpu_func.h>
#include <dm.h>
@@ -352,6 +351,11 @@
(phydev->duplex) ? "full" : "half",
(phydev->port == PORT_FIBRE) ? ", fiber mode" : "");
+#ifdef CONFIG_ARCH_NPCM8XX
+ /* Pass all Multicast Frames */
+ setbits_le32(&mac_p->framefilt, BIT(4));
+
+#endif
return 0;
}
@@ -554,6 +558,11 @@
ulong desc_start = (ulong)desc_p;
ulong desc_end = desc_start +
roundup(sizeof(*desc_p), ARCH_DMA_MINALIGN);
+ ulong data_start = desc_p->dmamac_addr;
+ ulong data_end = data_start + roundup(CFG_ETH_BUFSIZE, ARCH_DMA_MINALIGN);
+
+ /* Invalidate the descriptor buffer data */
+ invalidate_dcache_range(data_start, data_end);
/*
* Make the current descriptor valid again and go to
@@ -861,6 +870,7 @@
{ .compatible = "amlogic,meson6-dwmac" },
{ .compatible = "st,stm32-dwmac" },
{ .compatible = "snps,arc-dwmac-3.70a" },
+ { .compatible = "sophgo,cv1800b-dwmac" },
{ }
};
diff --git a/drivers/net/dm9000x.c b/drivers/net/dm9000x.c
index bec8d67..9e17f0b 100644
--- a/drivers/net/dm9000x.c
+++ b/drivers/net/dm9000x.c
@@ -49,7 +49,6 @@
* TODO: external MII is not functional, only internal at the moment.
*/
-#include <common.h>
#include <command.h>
#include <dm.h>
#include <malloc.h>
diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c
index 9b3bce1..67ac86f 100644
--- a/drivers/net/dwc_eth_qos.c
+++ b/drivers/net/dwc_eth_qos.c
@@ -29,7 +29,6 @@
#define LOG_CATEGORY UCLASS_ETH
-#include <common.h>
#include <clk.h>
#include <cpu_func.h>
#include <dm.h>
@@ -159,7 +158,7 @@
ret = eqos_mdio_wait_idle(eqos);
if (ret) {
- pr_err("MDIO not idle at entry");
+ pr_err("MDIO not idle at entry\n");
return ret;
}
@@ -179,7 +178,7 @@
ret = eqos_mdio_wait_idle(eqos);
if (ret) {
- pr_err("MDIO read didn't complete");
+ pr_err("MDIO read didn't complete\n");
return ret;
}
@@ -203,7 +202,7 @@
ret = eqos_mdio_wait_idle(eqos);
if (ret) {
- pr_err("MDIO not idle at entry");
+ pr_err("MDIO not idle at entry\n");
return ret;
}
@@ -225,7 +224,7 @@
ret = eqos_mdio_wait_idle(eqos);
if (ret) {
- pr_err("MDIO read didn't complete");
+ pr_err("MDIO read didn't complete\n");
return ret;
}
@@ -242,37 +241,37 @@
ret = clk_enable(&eqos->clk_slave_bus);
if (ret < 0) {
- pr_err("clk_enable(clk_slave_bus) failed: %d", ret);
+ pr_err("clk_enable(clk_slave_bus) failed: %d\n", ret);
goto err;
}
ret = clk_enable(&eqos->clk_master_bus);
if (ret < 0) {
- pr_err("clk_enable(clk_master_bus) failed: %d", ret);
+ pr_err("clk_enable(clk_master_bus) failed: %d\n", ret);
goto err_disable_clk_slave_bus;
}
ret = clk_enable(&eqos->clk_rx);
if (ret < 0) {
- pr_err("clk_enable(clk_rx) failed: %d", ret);
+ pr_err("clk_enable(clk_rx) failed: %d\n", ret);
goto err_disable_clk_master_bus;
}
ret = clk_enable(&eqos->clk_ptp_ref);
if (ret < 0) {
- pr_err("clk_enable(clk_ptp_ref) failed: %d", ret);
+ pr_err("clk_enable(clk_ptp_ref) failed: %d\n", ret);
goto err_disable_clk_rx;
}
ret = clk_set_rate(&eqos->clk_ptp_ref, 125 * 1000 * 1000);
if (ret < 0) {
- pr_err("clk_set_rate(clk_ptp_ref) failed: %d", ret);
+ pr_err("clk_set_rate(clk_ptp_ref) failed: %d\n", ret);
goto err_disable_clk_ptp_ref;
}
ret = clk_enable(&eqos->clk_tx);
if (ret < 0) {
- pr_err("clk_enable(clk_tx) failed: %d", ret);
+ pr_err("clk_enable(clk_tx) failed: %d\n", ret);
goto err_disable_clk_ptp_ref;
}
#endif
@@ -295,58 +294,6 @@
#endif
}
-static int eqos_start_clks_stm32(struct udevice *dev)
-{
-#ifdef CONFIG_CLK
- struct eqos_priv *eqos = dev_get_priv(dev);
- int ret;
-
- debug("%s(dev=%p):\n", __func__, dev);
-
- ret = clk_enable(&eqos->clk_master_bus);
- if (ret < 0) {
- pr_err("clk_enable(clk_master_bus) failed: %d", ret);
- goto err;
- }
-
- ret = clk_enable(&eqos->clk_rx);
- if (ret < 0) {
- pr_err("clk_enable(clk_rx) failed: %d", ret);
- goto err_disable_clk_master_bus;
- }
-
- ret = clk_enable(&eqos->clk_tx);
- if (ret < 0) {
- pr_err("clk_enable(clk_tx) failed: %d", ret);
- goto err_disable_clk_rx;
- }
-
- if (clk_valid(&eqos->clk_ck) && !eqos->clk_ck_enabled) {
- ret = clk_enable(&eqos->clk_ck);
- if (ret < 0) {
- pr_err("clk_enable(clk_ck) failed: %d", ret);
- goto err_disable_clk_tx;
- }
- eqos->clk_ck_enabled = true;
- }
-#endif
-
- debug("%s: OK\n", __func__);
- return 0;
-
-#ifdef CONFIG_CLK
-err_disable_clk_tx:
- clk_disable(&eqos->clk_tx);
-err_disable_clk_rx:
- clk_disable(&eqos->clk_rx);
-err_disable_clk_master_bus:
- clk_disable(&eqos->clk_master_bus);
-err:
- debug("%s: FAILED: %d\n", __func__, ret);
- return ret;
-#endif
-}
-
static int eqos_stop_clks_tegra186(struct udevice *dev)
{
#ifdef CONFIG_CLK
@@ -365,22 +312,6 @@
return 0;
}
-static int eqos_stop_clks_stm32(struct udevice *dev)
-{
-#ifdef CONFIG_CLK
- struct eqos_priv *eqos = dev_get_priv(dev);
-
- debug("%s(dev=%p):\n", __func__, dev);
-
- clk_disable(&eqos->clk_tx);
- clk_disable(&eqos->clk_rx);
- clk_disable(&eqos->clk_master_bus);
-#endif
-
- debug("%s: OK\n", __func__);
- return 0;
-}
-
static int eqos_start_resets_tegra186(struct udevice *dev)
{
struct eqos_priv *eqos = dev_get_priv(dev);
@@ -390,7 +321,7 @@
ret = dm_gpio_set_value(&eqos->phy_reset_gpio, 1);
if (ret < 0) {
- pr_err("dm_gpio_set_value(phy_reset, assert) failed: %d", ret);
+ pr_err("dm_gpio_set_value(phy_reset, assert) failed: %d\n", ret);
return ret;
}
@@ -398,13 +329,13 @@
ret = dm_gpio_set_value(&eqos->phy_reset_gpio, 0);
if (ret < 0) {
- pr_err("dm_gpio_set_value(phy_reset, deassert) failed: %d", ret);
+ pr_err("dm_gpio_set_value(phy_reset, deassert) failed: %d\n", ret);
return ret;
}
ret = reset_assert(&eqos->reset_ctl);
if (ret < 0) {
- pr_err("reset_assert() failed: %d", ret);
+ pr_err("reset_assert() failed: %d\n", ret);
return ret;
}
@@ -412,7 +343,7 @@
ret = reset_deassert(&eqos->reset_ctl);
if (ret < 0) {
- pr_err("reset_deassert() failed: %d", ret);
+ pr_err("reset_deassert() failed: %d\n", ret);
return ret;
}
@@ -448,14 +379,14 @@
ret = wait_for_bit_le32(&eqos->tegra186_regs->auto_cal_status,
EQOS_AUTO_CAL_STATUS_ACTIVE, true, 10, false);
if (ret) {
- pr_err("calibrate didn't start");
+ pr_err("calibrate didn't start\n");
goto failed;
}
ret = wait_for_bit_le32(&eqos->tegra186_regs->auto_cal_status,
EQOS_AUTO_CAL_STATUS_ACTIVE, false, 10, false);
if (ret) {
- pr_err("calibrate didn't finish");
+ pr_err("calibrate didn't finish\n");
goto failed;
}
@@ -493,17 +424,6 @@
#endif
}
-static ulong eqos_get_tick_clk_rate_stm32(struct udevice *dev)
-{
-#ifdef CONFIG_CLK
- struct eqos_priv *eqos = dev_get_priv(dev);
-
- return clk_get_rate(&eqos->clk_master_bus);
-#else
- return 0;
-#endif
-}
-
static int eqos_set_full_duplex(struct udevice *dev)
{
struct eqos_priv *eqos = dev_get_priv(dev);
@@ -586,13 +506,13 @@
rate = 2.5 * 1000 * 1000;
break;
default:
- pr_err("invalid speed %d", eqos->phy->speed);
+ pr_err("invalid speed %d\n", eqos->phy->speed);
return -EINVAL;
}
ret = clk_set_rate(&eqos->clk_tx, rate);
if (ret < 0) {
- pr_err("clk_set_rate(tx_clk, %lu) failed: %d", rate, ret);
+ pr_err("clk_set_rate(tx_clk, %lu) failed: %d\n", rate, ret);
return ret;
}
#endif
@@ -613,7 +533,7 @@
else
ret = eqos_set_half_duplex(dev);
if (ret < 0) {
- pr_err("eqos_set_*_duplex() failed: %d", ret);
+ pr_err("eqos_set_*_duplex() failed: %d\n", ret);
return ret;
}
@@ -631,32 +551,32 @@
ret = eqos_set_mii_speed_10(dev);
break;
default:
- pr_err("invalid speed %d", eqos->phy->speed);
+ pr_err("invalid speed %d\n", eqos->phy->speed);
return -EINVAL;
}
if (ret < 0) {
- pr_err("eqos_set_*mii_speed*() failed: %d", ret);
+ pr_err("eqos_set_*mii_speed*() failed: %d\n", ret);
return ret;
}
if (en_calibration) {
ret = eqos->config->ops->eqos_calibrate_pads(dev);
if (ret < 0) {
- pr_err("eqos_calibrate_pads() failed: %d",
+ pr_err("eqos_calibrate_pads() failed: %d\n",
ret);
return ret;
}
} else {
ret = eqos->config->ops->eqos_disable_calibration(dev);
if (ret < 0) {
- pr_err("eqos_disable_calibration() failed: %d",
+ pr_err("eqos_disable_calibration() failed: %d\n",
ret);
return ret;
}
}
ret = eqos->config->ops->eqos_set_tx_clk_speed(dev);
if (ret < 0) {
- pr_err("eqos_set_tx_clk_speed() failed: %d", ret);
+ pr_err("eqos_set_tx_clk_speed() failed: %d\n", ret);
return ret;
}
@@ -755,7 +675,7 @@
ret = eqos->config->ops->eqos_start_resets(dev);
if (ret < 0) {
- pr_err("eqos_start_resets() failed: %d", ret);
+ pr_err("eqos_start_resets() failed: %d\n", ret);
goto err;
}
@@ -773,13 +693,13 @@
EQOS_DMA_MODE_SWR, false,
eqos->config->swr_wait, false);
if (ret) {
- pr_err("EQOS_DMA_MODE_SWR stuck");
+ pr_err("EQOS_DMA_MODE_SWR stuck\n");
goto err_stop_resets;
}
ret = eqos->config->ops->eqos_calibrate_pads(dev);
if (ret < 0) {
- pr_err("eqos_calibrate_pads() failed: %d", ret);
+ pr_err("eqos_calibrate_pads() failed: %d\n", ret);
goto err_stop_resets;
}
@@ -812,7 +732,7 @@
}
if (!eqos->phy) {
- pr_err("phy_connect() failed");
+ pr_err("phy_connect() failed\n");
ret = -ENODEV;
goto err_stop_resets;
}
@@ -820,7 +740,7 @@
if (eqos->max_speed) {
ret = phy_set_supported(eqos->phy, eqos->max_speed);
if (ret) {
- pr_err("phy_set_supported() failed: %d", ret);
+ pr_err("phy_set_supported() failed: %d\n", ret);
goto err_shutdown_phy;
}
}
@@ -828,26 +748,26 @@
eqos->phy->node = eqos->phy_of_node;
ret = phy_config(eqos->phy);
if (ret < 0) {
- pr_err("phy_config() failed: %d", ret);
+ pr_err("phy_config() failed: %d\n", ret);
goto err_shutdown_phy;
}
}
ret = phy_startup(eqos->phy);
if (ret < 0) {
- pr_err("phy_startup() failed: %d", ret);
+ pr_err("phy_startup() failed: %d\n", ret);
goto err_shutdown_phy;
}
if (!eqos->phy->link) {
- pr_err("No link");
+ pr_err("No link\n");
ret = -EAGAIN;
goto err_shutdown_phy;
}
ret = eqos_adjust_link(dev);
if (ret < 0) {
- pr_err("eqos_adjust_link() failed: %d", ret);
+ pr_err("eqos_adjust_link() failed: %d\n", ret);
goto err_shutdown_phy;
}
@@ -1090,7 +1010,7 @@
err_stop_resets:
eqos->config->ops->eqos_stop_resets(dev);
err:
- pr_err("FAILED: %d", ret);
+ pr_err("FAILED: %d\n", ret);
return ret;
}
@@ -1217,7 +1137,7 @@
struct eqos_priv *eqos = dev_get_priv(dev);
u32 idx, idx_mask = eqos->desc_per_cacheline - 1;
uchar *packet_expected;
- struct eqos_desc *rx_desc;
+ struct eqos_desc *rx_desc = NULL;
debug("%s(packet=%p, length=%d)\n", __func__, packet, length);
@@ -1361,7 +1281,7 @@
ret = reset_get_by_name(dev, "eqos", &eqos->reset_ctl);
if (ret) {
- pr_err("reset_get_by_name(rst) failed: %d", ret);
+ pr_err("reset_get_by_name(rst) failed: %d\n", ret);
return ret;
}
@@ -1369,37 +1289,37 @@
&eqos->phy_reset_gpio,
GPIOD_IS_OUT | GPIOD_IS_OUT_ACTIVE);
if (ret) {
- pr_err("gpio_request_by_name(phy reset) failed: %d", ret);
+ pr_err("gpio_request_by_name(phy reset) failed: %d\n", ret);
goto err_free_reset_eqos;
}
ret = clk_get_by_name(dev, "slave_bus", &eqos->clk_slave_bus);
if (ret) {
- pr_err("clk_get_by_name(slave_bus) failed: %d", ret);
+ pr_err("clk_get_by_name(slave_bus) failed: %d\n", ret);
goto err_free_gpio_phy_reset;
}
ret = clk_get_by_name(dev, "master_bus", &eqos->clk_master_bus);
if (ret) {
- pr_err("clk_get_by_name(master_bus) failed: %d", ret);
+ pr_err("clk_get_by_name(master_bus) failed: %d\n", ret);
goto err_free_gpio_phy_reset;
}
ret = clk_get_by_name(dev, "rx", &eqos->clk_rx);
if (ret) {
- pr_err("clk_get_by_name(rx) failed: %d", ret);
+ pr_err("clk_get_by_name(rx) failed: %d\n", ret);
goto err_free_gpio_phy_reset;
}
ret = clk_get_by_name(dev, "ptp_ref", &eqos->clk_ptp_ref);
if (ret) {
- pr_err("clk_get_by_name(ptp_ref) failed: %d", ret);
+ pr_err("clk_get_by_name(ptp_ref) failed: %d\n", ret);
goto err_free_gpio_phy_reset;
}
ret = clk_get_by_name(dev, "tx", &eqos->clk_tx);
if (ret) {
- pr_err("clk_get_by_name(tx) failed: %d", ret);
+ pr_err("clk_get_by_name(tx) failed: %d\n", ret);
goto err_free_gpio_phy_reset;
}
@@ -1415,57 +1335,6 @@
return ret;
}
-static int eqos_probe_resources_stm32(struct udevice *dev)
-{
- struct eqos_priv *eqos = dev_get_priv(dev);
- int ret;
- phy_interface_t interface;
-
- debug("%s(dev=%p):\n", __func__, dev);
-
- interface = eqos->config->interface(dev);
-
- if (interface == PHY_INTERFACE_MODE_NA) {
- pr_err("Invalid PHY interface\n");
- return -EINVAL;
- }
-
- ret = board_interface_eth_init(dev, interface);
- if (ret)
- return -EINVAL;
-
- ret = clk_get_by_name(dev, "stmmaceth", &eqos->clk_master_bus);
- if (ret) {
- pr_err("clk_get_by_name(master_bus) failed: %d", ret);
- goto err_probe;
- }
-
- ret = clk_get_by_name(dev, "mac-clk-rx", &eqos->clk_rx);
- if (ret) {
- pr_err("clk_get_by_name(rx) failed: %d", ret);
- goto err_probe;
- }
-
- ret = clk_get_by_name(dev, "mac-clk-tx", &eqos->clk_tx);
- if (ret) {
- pr_err("clk_get_by_name(tx) failed: %d", ret);
- goto err_probe;
- }
-
- /* Get ETH_CLK clocks (optional) */
- ret = clk_get_by_name(dev, "eth-ck", &eqos->clk_ck);
- if (ret)
- pr_warn("No phy clock provided %d", ret);
-
- debug("%s: OK\n", __func__);
- return 0;
-
-err_probe:
-
- debug("%s: returns %d\n", __func__, ret);
- return ret;
-}
-
static phy_interface_t eqos_get_interface_tegra186(const struct udevice *dev)
{
return PHY_INTERFACE_MODE_MII;
@@ -1484,12 +1353,6 @@
return 0;
}
-static int eqos_remove_resources_stm32(struct udevice *dev)
-{
- debug("%s(dev=%p):\n", __func__, dev);
- return 0;
-}
-
static int eqos_probe(struct udevice *dev)
{
struct eqos_priv *eqos = dev_get_priv(dev);
@@ -1502,7 +1365,7 @@
eqos->regs = dev_read_addr(dev);
if (eqos->regs == FDT_ADDR_T_NONE) {
- pr_err("dev_read_addr() failed");
+ pr_err("dev_read_addr() failed\n");
return -ENODEV;
}
eqos->mac_regs = (void *)(eqos->regs + EQOS_MAC_REGS_BASE);
@@ -1514,19 +1377,19 @@
ret = eqos_probe_resources_core(dev);
if (ret < 0) {
- pr_err("eqos_probe_resources_core() failed: %d", ret);
+ pr_err("eqos_probe_resources_core() failed: %d\n", ret);
return ret;
}
ret = eqos->config->ops->eqos_probe_resources(dev);
if (ret < 0) {
- pr_err("eqos_probe_resources() failed: %d", ret);
+ pr_err("eqos_probe_resources() failed: %d\n", ret);
goto err_remove_resources_core;
}
ret = eqos->config->ops->eqos_start_clks(dev);
if (ret < 0) {
- pr_err("eqos_start_clks() failed: %d", ret);
+ pr_err("eqos_start_clks() failed: %d\n", ret);
goto err_remove_resources_tegra;
}
@@ -1536,7 +1399,7 @@
if (!eqos->mii) {
eqos->mii = mdio_alloc();
if (!eqos->mii) {
- pr_err("mdio_alloc() failed");
+ pr_err("mdio_alloc() failed\n");
ret = -ENOMEM;
goto err_stop_clks;
}
@@ -1547,7 +1410,7 @@
ret = mdio_register(eqos->mii);
if (ret < 0) {
- pr_err("mdio_register() failed: %d", ret);
+ pr_err("mdio_register() failed: %d\n", ret);
goto err_free_mdio;
}
}
@@ -1633,35 +1496,6 @@
.ops = &eqos_tegra186_ops
};
-static struct eqos_ops eqos_stm32_ops = {
- .eqos_inval_desc = eqos_inval_desc_generic,
- .eqos_flush_desc = eqos_flush_desc_generic,
- .eqos_inval_buffer = eqos_inval_buffer_generic,
- .eqos_flush_buffer = eqos_flush_buffer_generic,
- .eqos_probe_resources = eqos_probe_resources_stm32,
- .eqos_remove_resources = eqos_remove_resources_stm32,
- .eqos_stop_resets = eqos_null_ops,
- .eqos_start_resets = eqos_null_ops,
- .eqos_stop_clks = eqos_stop_clks_stm32,
- .eqos_start_clks = eqos_start_clks_stm32,
- .eqos_calibrate_pads = eqos_null_ops,
- .eqos_disable_calibration = eqos_null_ops,
- .eqos_set_tx_clk_speed = eqos_null_ops,
- .eqos_get_enetaddr = eqos_null_ops,
- .eqos_get_tick_clk_rate = eqos_get_tick_clk_rate_stm32
-};
-
-static const struct eqos_config __maybe_unused eqos_stm32_config = {
- .reg_access_always_ok = false,
- .mdio_wait = 10000,
- .swr_wait = 50,
- .config_mac = EQOS_MAC_RXQ_CTRL0_RXQ0EN_ENABLED_AV,
- .config_mac_mdio = EQOS_MAC_MDIO_ADDRESS_CR_250_300,
- .axi_bus_width = EQOS_AXI_WIDTH_64,
- .interface = dev_read_phy_mode,
- .ops = &eqos_stm32_ops
-};
-
static const struct udevice_id eqos_ids[] = {
#if IS_ENABLED(CONFIG_DWC_ETH_QOS_TEGRA186)
{
@@ -1671,8 +1505,12 @@
#endif
#if IS_ENABLED(CONFIG_DWC_ETH_QOS_STM32)
{
+ .compatible = "st,stm32mp13-dwmac",
+ .data = (ulong)&eqos_stm32mp13_config
+ },
+ {
.compatible = "st,stm32mp1-dwmac",
- .data = (ulong)&eqos_stm32_config
+ .data = (ulong)&eqos_stm32mp15_config
},
#endif
#if IS_ENABLED(CONFIG_DWC_ETH_QOS_IMX)
diff --git a/drivers/net/dwc_eth_qos.h b/drivers/net/dwc_eth_qos.h
index e3222e1..8b3d0d4 100644
--- a/drivers/net/dwc_eth_qos.h
+++ b/drivers/net/dwc_eth_qos.h
@@ -290,4 +290,6 @@
extern struct eqos_config eqos_imx_config;
extern struct eqos_config eqos_rockchip_config;
extern struct eqos_config eqos_qcom_config;
+extern struct eqos_config eqos_stm32mp13_config;
+extern struct eqos_config eqos_stm32mp15_config;
extern struct eqos_config eqos_jh7110_config;
diff --git a/drivers/net/dwc_eth_qos_imx.c b/drivers/net/dwc_eth_qos_imx.c
index 9c4e390..d6bed27 100644
--- a/drivers/net/dwc_eth_qos_imx.c
+++ b/drivers/net/dwc_eth_qos_imx.c
@@ -3,7 +3,6 @@
* Copyright 2022 NXP
*/
-#include <common.h>
#include <clk.h>
#include <cpu_func.h>
#include <dm.h>
diff --git a/drivers/net/dwc_eth_qos_qcom.c b/drivers/net/dwc_eth_qos_qcom.c
index 8178138..77d6263 100644
--- a/drivers/net/dwc_eth_qos_qcom.c
+++ b/drivers/net/dwc_eth_qos_qcom.c
@@ -5,7 +5,6 @@
* Qcom DWMAC specific glue layer
*/
-#include <common.h>
#include <asm/global_data.h>
#include <asm/gpio.h>
#include <asm/io.h>
diff --git a/drivers/net/dwc_eth_qos_rockchip.c b/drivers/net/dwc_eth_qos_rockchip.c
index fa9e513..c4557e5 100644
--- a/drivers/net/dwc_eth_qos_rockchip.c
+++ b/drivers/net/dwc_eth_qos_rockchip.c
@@ -8,7 +8,6 @@
* part in order to simplify future porting of fixes and support for other SoCs.
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <dm/device_compat.h>
diff --git a/drivers/net/dwc_eth_qos_starfive.c b/drivers/net/dwc_eth_qos_starfive.c
index 5be8ac0..09e714c 100644
--- a/drivers/net/dwc_eth_qos_starfive.c
+++ b/drivers/net/dwc_eth_qos_starfive.c
@@ -4,7 +4,6 @@
* Author: Yanhong Wang<yanhong.wang@starfivetech.com>
*/
-#include <common.h>
#include <asm/cache.h>
#include <asm/gpio.h>
#include <clk.h>
diff --git a/drivers/net/dwc_eth_qos_stm32.c b/drivers/net/dwc_eth_qos_stm32.c
new file mode 100644
index 0000000..fbc08bb
--- /dev/null
+++ b/drivers/net/dwc_eth_qos_stm32.c
@@ -0,0 +1,325 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2024, Marek Vasut <marex@denx.de>
+ *
+ * This is code moved from drivers/net/dwc_eth_qos.c , which is:
+ * Copyright (c) 2016, NVIDIA CORPORATION.
+ */
+
+#include <asm/cache.h>
+#include <asm/gpio.h>
+#include <asm/io.h>
+#include <clk.h>
+#include <cpu_func.h>
+#include <dm.h>
+#include <dm/device_compat.h>
+#include <errno.h>
+#include <eth_phy.h>
+#include <log.h>
+#include <malloc.h>
+#include <memalign.h>
+#include <miiphy.h>
+#include <net.h>
+#include <netdev.h>
+#include <phy.h>
+#include <regmap.h>
+#include <reset.h>
+#include <syscon.h>
+#include <wait_bit.h>
+#include <linux/bitfield.h>
+#include <linux/delay.h>
+
+#include "dwc_eth_qos.h"
+
+/* SYSCFG registers */
+#define SYSCFG_PMCSETR 0x04
+#define SYSCFG_PMCCLRR_MP13 0x08
+#define SYSCFG_PMCCLRR_MP15 0x44
+
+#define SYSCFG_PMCSETR_ETH1_MASK GENMASK(23, 16)
+#define SYSCFG_PMCSETR_ETH2_MASK GENMASK(31, 24)
+
+#define SYSCFG_PMCSETR_ETH_CLK_SEL BIT(16)
+#define SYSCFG_PMCSETR_ETH_REF_CLK_SEL BIT(17)
+
+/* STM32MP15xx specific bit */
+#define SYSCFG_PMCSETR_ETH_SELMII BIT(20)
+
+#define SYSCFG_PMCSETR_ETH_SEL_MASK GENMASK(23, 21)
+#define SYSCFG_PMCSETR_ETH_SEL_GMII_MII 0x0
+#define SYSCFG_PMCSETR_ETH_SEL_RGMII 0x1
+#define SYSCFG_PMCSETR_ETH_SEL_RMII 0x4
+
+static ulong eqos_get_tick_clk_rate_stm32(struct udevice *dev)
+{
+ struct eqos_priv __maybe_unused *eqos = dev_get_priv(dev);
+
+ if (!CONFIG_IS_ENABLED(CLK))
+ return 0;
+
+ return clk_get_rate(&eqos->clk_master_bus);
+}
+
+static int eqos_start_clks_stm32(struct udevice *dev)
+{
+ struct eqos_priv __maybe_unused *eqos = dev_get_priv(dev);
+ int ret;
+
+ if (!CONFIG_IS_ENABLED(CLK))
+ return 0;
+
+ dev_dbg(dev, "%s:\n", __func__);
+
+ ret = clk_enable(&eqos->clk_master_bus);
+ if (ret < 0) {
+ dev_err(dev, "clk_enable(clk_master_bus) failed: %d\n", ret);
+ goto err;
+ }
+
+ ret = clk_enable(&eqos->clk_rx);
+ if (ret < 0) {
+ dev_err(dev, "clk_enable(clk_rx) failed: %d\n", ret);
+ goto err_disable_clk_master_bus;
+ }
+
+ ret = clk_enable(&eqos->clk_tx);
+ if (ret < 0) {
+ dev_err(dev, "clk_enable(clk_tx) failed: %d\n", ret);
+ goto err_disable_clk_rx;
+ }
+
+ if (clk_valid(&eqos->clk_ck) && !eqos->clk_ck_enabled) {
+ ret = clk_enable(&eqos->clk_ck);
+ if (ret < 0) {
+ dev_err(dev, "clk_enable(clk_ck) failed: %d\n", ret);
+ goto err_disable_clk_tx;
+ }
+ eqos->clk_ck_enabled = true;
+ }
+
+ dev_dbg(dev, "%s: OK\n", __func__);
+ return 0;
+
+err_disable_clk_tx:
+ clk_disable(&eqos->clk_tx);
+err_disable_clk_rx:
+ clk_disable(&eqos->clk_rx);
+err_disable_clk_master_bus:
+ clk_disable(&eqos->clk_master_bus);
+err:
+ dev_dbg(dev, "%s: FAILED: %d\n", __func__, ret);
+
+ return ret;
+}
+
+static int eqos_stop_clks_stm32(struct udevice *dev)
+{
+ struct eqos_priv __maybe_unused *eqos = dev_get_priv(dev);
+
+ if (!CONFIG_IS_ENABLED(CLK))
+ return 0;
+
+ dev_dbg(dev, "%s:\n", __func__);
+
+ clk_disable(&eqos->clk_tx);
+ clk_disable(&eqos->clk_rx);
+ clk_disable(&eqos->clk_master_bus);
+
+ dev_dbg(dev, "%s: OK\n", __func__);
+
+ return 0;
+}
+
+static int eqos_probe_syscfg_stm32(struct udevice *dev,
+ phy_interface_t interface_type)
+{
+ /* Ethernet 50MHz RMII clock selection. */
+ const bool eth_ref_clk_sel = dev_read_bool(dev, "st,eth-ref-clk-sel");
+ /* SoC is STM32MP13xx with two ethernet MACs */
+ const bool is_mp13 = device_is_compatible(dev, "st,stm32mp13-dwmac");
+ /* Gigabit Ethernet 125MHz clock selection. */
+ const bool eth_clk_sel = dev_read_bool(dev, "st,eth-clk-sel");
+ /* Ethernet clock source is RCC. */
+ const bool ext_phyclk = dev_read_bool(dev, "st,ext-phyclk");
+ struct regmap *regmap;
+ u32 regmap_mask;
+ u32 value;
+
+ regmap = syscon_regmap_lookup_by_phandle(dev, "st,syscon");
+ if (IS_ERR(regmap))
+ return PTR_ERR(regmap);
+
+ regmap_mask = dev_read_u32_index_default(dev, "st,syscon", 2,
+ SYSCFG_PMCSETR_ETH1_MASK);
+
+ switch (interface_type) {
+ case PHY_INTERFACE_MODE_MII:
+ dev_dbg(dev, "PHY_INTERFACE_MODE_MII\n");
+ value = FIELD_PREP(SYSCFG_PMCSETR_ETH_SEL_MASK,
+ SYSCFG_PMCSETR_ETH_SEL_GMII_MII);
+ /*
+ * STM32MP15xx supports both MII and GMII, STM32MP13xx MII only.
+ * SYSCFG_PMCSETR ETH_SELMII is present only on STM32MP15xx and
+ * acts as a selector between 0:GMII and 1:MII. As STM32MP13xx
+ * supports only MII, ETH_SELMII is not present.
+ */
+ if (!is_mp13) /* Select MII mode on STM32MP15xx */
+ value |= SYSCFG_PMCSETR_ETH_SELMII;
+ break;
+ case PHY_INTERFACE_MODE_GMII: /* STM32MP15xx only */
+ dev_dbg(dev, "PHY_INTERFACE_MODE_GMII\n");
+ value = FIELD_PREP(SYSCFG_PMCSETR_ETH_SEL_MASK,
+ SYSCFG_PMCSETR_ETH_SEL_GMII_MII);
+ /*
+ * If eth_clk_sel is set, use internal ETH_CLKx clock from RCC,
+ * otherwise use external clock from IO pin (requires matching
+ * GPIO block AF setting of that pin).
+ */
+ if (eth_clk_sel || ext_phyclk)
+ value |= SYSCFG_PMCSETR_ETH_CLK_SEL;
+ break;
+ case PHY_INTERFACE_MODE_RMII:
+ dev_dbg(dev, "PHY_INTERFACE_MODE_RMII\n");
+ value = FIELD_PREP(SYSCFG_PMCSETR_ETH_SEL_MASK,
+ SYSCFG_PMCSETR_ETH_SEL_RMII);
+ /*
+ * If eth_ref_clk_sel is set, use internal clock from RCC,
+ * otherwise use external clock from ETHn_RX_CLK/ETHn_REF_CLK
+ * IO pin (requires matching GPIO block AF setting of that
+ * pin).
+ */
+ if (eth_ref_clk_sel || ext_phyclk)
+ value |= SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
+ break;
+ case PHY_INTERFACE_MODE_RGMII:
+ case PHY_INTERFACE_MODE_RGMII_ID:
+ case PHY_INTERFACE_MODE_RGMII_RXID:
+ case PHY_INTERFACE_MODE_RGMII_TXID:
+ dev_dbg(dev, "PHY_INTERFACE_MODE_RGMII\n");
+ value = FIELD_PREP(SYSCFG_PMCSETR_ETH_SEL_MASK,
+ SYSCFG_PMCSETR_ETH_SEL_RGMII);
+ /*
+ * If eth_clk_sel is set, use internal ETH_CLKx clock from RCC,
+ * otherwise use external clock from ETHx_CLK125 pin (requires
+ * matching GPIO block AF setting of that pin).
+ */
+ if (eth_clk_sel || ext_phyclk)
+ value |= SYSCFG_PMCSETR_ETH_CLK_SEL;
+ break;
+ default:
+ dev_dbg(dev, "Do not manage %d interface\n",
+ interface_type);
+ /* Do not manage others interfaces */
+ return -EINVAL;
+ }
+
+ /* Shift value at correct ethernet MAC offset in SYSCFG_PMCSETR */
+ value <<= ffs(regmap_mask) - ffs(SYSCFG_PMCSETR_ETH1_MASK);
+
+ /* Update PMCCLRR (clear register) */
+ regmap_write(regmap, is_mp13 ?
+ SYSCFG_PMCCLRR_MP13 : SYSCFG_PMCCLRR_MP15,
+ regmap_mask);
+
+ return regmap_update_bits(regmap, SYSCFG_PMCSETR, regmap_mask, value);
+}
+
+static int eqos_probe_resources_stm32(struct udevice *dev)
+{
+ struct eqos_priv *eqos = dev_get_priv(dev);
+ phy_interface_t interface;
+ int ret;
+
+ dev_dbg(dev, "%s:\n", __func__);
+
+ interface = eqos->config->interface(dev);
+
+ if (interface == PHY_INTERFACE_MODE_NA) {
+ dev_err(dev, "Invalid PHY interface\n");
+ return -EINVAL;
+ }
+
+ ret = eqos_probe_syscfg_stm32(dev, interface);
+ if (ret)
+ return -EINVAL;
+
+ ret = clk_get_by_name(dev, "stmmaceth", &eqos->clk_master_bus);
+ if (ret) {
+ dev_err(dev, "clk_get_by_name(master_bus) failed: %d\n", ret);
+ goto err_probe;
+ }
+
+ ret = clk_get_by_name(dev, "mac-clk-rx", &eqos->clk_rx);
+ if (ret) {
+ dev_err(dev, "clk_get_by_name(rx) failed: %d\n", ret);
+ goto err_probe;
+ }
+
+ ret = clk_get_by_name(dev, "mac-clk-tx", &eqos->clk_tx);
+ if (ret) {
+ dev_err(dev, "clk_get_by_name(tx) failed: %d\n", ret);
+ goto err_probe;
+ }
+
+ /* Get ETH_CLK clocks (optional) */
+ ret = clk_get_by_name(dev, "eth-ck", &eqos->clk_ck);
+ if (ret)
+ dev_warn(dev, "No phy clock provided %d\n", ret);
+
+ dev_dbg(dev, "%s: OK\n", __func__);
+
+ return 0;
+
+err_probe:
+
+ dev_dbg(dev, "%s: returns %d\n", __func__, ret);
+
+ return ret;
+}
+
+static int eqos_remove_resources_stm32(struct udevice *dev)
+{
+ dev_dbg(dev, "%s:\n", __func__);
+
+ return 0;
+}
+
+static struct eqos_ops eqos_stm32_ops = {
+ .eqos_inval_desc = eqos_inval_desc_generic,
+ .eqos_flush_desc = eqos_flush_desc_generic,
+ .eqos_inval_buffer = eqos_inval_buffer_generic,
+ .eqos_flush_buffer = eqos_flush_buffer_generic,
+ .eqos_probe_resources = eqos_probe_resources_stm32,
+ .eqos_remove_resources = eqos_remove_resources_stm32,
+ .eqos_stop_resets = eqos_null_ops,
+ .eqos_start_resets = eqos_null_ops,
+ .eqos_stop_clks = eqos_stop_clks_stm32,
+ .eqos_start_clks = eqos_start_clks_stm32,
+ .eqos_calibrate_pads = eqos_null_ops,
+ .eqos_disable_calibration = eqos_null_ops,
+ .eqos_set_tx_clk_speed = eqos_null_ops,
+ .eqos_get_enetaddr = eqos_null_ops,
+ .eqos_get_tick_clk_rate = eqos_get_tick_clk_rate_stm32
+};
+
+struct eqos_config __maybe_unused eqos_stm32mp13_config = {
+ .reg_access_always_ok = false,
+ .mdio_wait = 10000,
+ .swr_wait = 50,
+ .config_mac = EQOS_MAC_RXQ_CTRL0_RXQ0EN_ENABLED_DCB,
+ .config_mac_mdio = EQOS_MAC_MDIO_ADDRESS_CR_250_300,
+ .axi_bus_width = EQOS_AXI_WIDTH_32,
+ .interface = dev_read_phy_mode,
+ .ops = &eqos_stm32_ops
+};
+
+struct eqos_config __maybe_unused eqos_stm32mp15_config = {
+ .reg_access_always_ok = false,
+ .mdio_wait = 10000,
+ .swr_wait = 50,
+ .config_mac = EQOS_MAC_RXQ_CTRL0_RXQ0EN_ENABLED_AV,
+ .config_mac_mdio = EQOS_MAC_MDIO_ADDRESS_CR_250_300,
+ .axi_bus_width = EQOS_AXI_WIDTH_64,
+ .interface = dev_read_phy_mode,
+ .ops = &eqos_stm32_ops
+};
diff --git a/drivers/net/dwmac_meson8b.c b/drivers/net/dwmac_meson8b.c
index 871171e..fde4aab 100644
--- a/drivers/net/dwmac_meson8b.c
+++ b/drivers/net/dwmac_meson8b.c
@@ -3,7 +3,6 @@
* Copyright (C) 2021 BayLibre, SAS
*/
-#include <common.h>
#include <asm/io.h>
#include <dm.h>
#include <phy.h>
diff --git a/drivers/net/dwmac_s700.c b/drivers/net/dwmac_s700.c
index 744b58b..969d247 100644
--- a/drivers/net/dwmac_s700.c
+++ b/drivers/net/dwmac_s700.c
@@ -5,7 +5,6 @@
* Actions DWMAC specific glue layer
*/
-#include <common.h>
#include <asm/global_data.h>
#include <asm/io.h>
#include <dm.h>
diff --git a/drivers/net/dwmac_socfpga.c b/drivers/net/dwmac_socfpga.c
index 82fdff5..bba3fc4 100644
--- a/drivers/net/dwmac_socfpga.c
+++ b/drivers/net/dwmac_socfpga.c
@@ -5,7 +5,6 @@
* Altera SoCFPGA EMAC extras
*/
-#include <common.h>
#include <asm/arch/secure_reg_helper.h>
#include <asm/arch/system_manager.h>
#include <asm/io.h>
diff --git a/drivers/net/e1000.c b/drivers/net/e1000.c
index 4e7ba66..663d900 100644
--- a/drivers/net/e1000.c
+++ b/drivers/net/e1000.c
@@ -29,7 +29,6 @@
* Copyright 2011 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <command.h>
#include <cpu_func.h>
#include <dm.h>
diff --git a/drivers/net/e1000_spi.c b/drivers/net/e1000_spi.c
index 69adf28..1e830b9 100644
--- a/drivers/net/e1000_spi.c
+++ b/drivers/net/e1000_spi.c
@@ -1,9 +1,9 @@
-#include <common.h>
#include <command.h>
#include <console.h>
#include <linux/delay.h>
#include "e1000.h"
#include <malloc.h>
+#include <vsprintf.h>
#include <linux/compiler.h>
/*-----------------------------------------------------------------------
diff --git a/drivers/net/eepro100.c b/drivers/net/eepro100.c
index 38d96ab..d18a8d5 100644
--- a/drivers/net/eepro100.c
+++ b/drivers/net/eepro100.c
@@ -4,7 +4,7 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
+#include <config.h>
#include <asm/io.h>
#include <cpu_func.h>
#include <malloc.h>
diff --git a/drivers/net/eth-phy-uclass.c b/drivers/net/eth-phy-uclass.c
index 9d1e8d3..1dae268 100644
--- a/drivers/net/eth-phy-uclass.c
+++ b/drivers/net/eth-phy-uclass.c
@@ -5,7 +5,6 @@
#define LOG_CATEGORY UCLASS_ETH_PHY
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <net.h>
diff --git a/drivers/net/ethoc.c b/drivers/net/ethoc.c
index 13fad81..dc7e6f1 100644
--- a/drivers/net/ethoc.c
+++ b/drivers/net/ethoc.c
@@ -9,7 +9,6 @@
* Copyright (C) 2016 Cadence Design Systems Inc.
*/
-#include <common.h>
#include <cpu_func.h>
#include <dm.h>
#include <log.h>
diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c
index 90af18f..0a0d92b 100644
--- a/drivers/net/fec_mxc.c
+++ b/drivers/net/fec_mxc.c
@@ -7,7 +7,6 @@
* (C) Copyright 2007 Pengutronix, Juergen Beisert <j.beisert@pengutronix.de>
*/
-#include <common.h>
#include <cpu_func.h>
#include <dm.h>
#include <env.h>
diff --git a/drivers/net/fm/b4860.c b/drivers/net/fm/b4860.c
index 1c5543e..46a0d38 100644
--- a/drivers/net/fm/b4860.c
+++ b/drivers/net/fm/b4860.c
@@ -3,7 +3,7 @@
* Copyright 2012 Freescale Semiconductor, Inc.
* Roy Zang <tie-fei.zang@freescale.com>
*/
-#include <common.h>
+#include <config.h>
#include <env.h>
#include <phy.h>
#include <fm_eth.h>
diff --git a/drivers/net/fm/dtsec.c b/drivers/net/fm/dtsec.c
index c51a65c..371d9f0 100644
--- a/drivers/net/fm/dtsec.c
+++ b/drivers/net/fm/dtsec.c
@@ -3,7 +3,6 @@
* Copyright 2009-2011 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <asm/types.h>
#include <asm/io.h>
#include <fsl_dtsec.h>
diff --git a/drivers/net/fm/eth.c b/drivers/net/fm/eth.c
index 9fd26de..19f3f0f 100644
--- a/drivers/net/fm/eth.c
+++ b/drivers/net/fm/eth.c
@@ -4,7 +4,7 @@
* Copyright 2020 NXP
* Dave Liu <daveliu@freescale.com>
*/
-#include <common.h>
+#include <config.h>
#include <log.h>
#include <part.h>
#include <asm/io.h>
diff --git a/drivers/net/fm/ls1043.c b/drivers/net/fm/ls1043.c
index 3db5c90..41b7576 100644
--- a/drivers/net/fm/ls1043.c
+++ b/drivers/net/fm/ls1043.c
@@ -2,7 +2,7 @@
/*
* Copyright 2015 Freescale Semiconductor, Inc.
*/
-#include <common.h>
+#include <config.h>
#include <phy.h>
#include <fm_eth.h>
#include <asm/io.h>
diff --git a/drivers/net/fm/ls1046.c b/drivers/net/fm/ls1046.c
index 3b0ee98..56c5c68 100644
--- a/drivers/net/fm/ls1046.c
+++ b/drivers/net/fm/ls1046.c
@@ -2,7 +2,7 @@
/*
* Copyright 2016 Freescale Semiconductor, Inc.
*/
-#include <common.h>
+#include <config.h>
#include <phy.h>
#include <fm_eth.h>
#include <asm/io.h>
diff --git a/drivers/net/fm/memac.c b/drivers/net/fm/memac.c
index eeb67a3..37b5462 100644
--- a/drivers/net/fm/memac.c
+++ b/drivers/net/fm/memac.c
@@ -7,7 +7,6 @@
/* MAXFRM - maximum frame length */
#define MAXFRM_MASK 0x0000ffff
-#include <common.h>
#include <log.h>
#include <phy.h>
#include <asm/types.h>
diff --git a/drivers/net/fm/memac_phy.c b/drivers/net/fm/memac_phy.c
index e0b62b9..26425d9 100644
--- a/drivers/net/fm/memac_phy.c
+++ b/drivers/net/fm/memac_phy.c
@@ -5,7 +5,6 @@
* Roy Zang <tie-fei.zang@freescale.com>
* Some part is taken from tsec.c
*/
-#include <common.h>
#include <miiphy.h>
#include <phy.h>
#include <asm/io.h>
diff --git a/drivers/net/fm/p1023.c b/drivers/net/fm/p1023.c
index 9013b27..362bc9f 100644
--- a/drivers/net/fm/p1023.c
+++ b/drivers/net/fm/p1023.c
@@ -2,7 +2,7 @@
/*
* Copyright 2011 Freescale Semiconductor, Inc.
*/
-#include <common.h>
+#include <config.h>
#include <phy.h>
#include <fm_eth.h>
#include <asm/io.h>
diff --git a/drivers/net/fm/p4080.c b/drivers/net/fm/p4080.c
index 7ad9932..6e63e33 100644
--- a/drivers/net/fm/p4080.c
+++ b/drivers/net/fm/p4080.c
@@ -2,7 +2,7 @@
/*
* Copyright 2011 Freescale Semiconductor, Inc.
*/
-#include <common.h>
+#include <config.h>
#include <phy.h>
#include <fm_eth.h>
#include <asm/io.h>
diff --git a/drivers/net/fm/p5020.c b/drivers/net/fm/p5020.c
index f931491..4fc1f72 100644
--- a/drivers/net/fm/p5020.c
+++ b/drivers/net/fm/p5020.c
@@ -2,7 +2,7 @@
/*
* Copyright 2011 Freescale Semiconductor, Inc.
*/
-#include <common.h>
+#include <config.h>
#include <phy.h>
#include <fm_eth.h>
#include <asm/io.h>
diff --git a/drivers/net/fm/p5040.c b/drivers/net/fm/p5040.c
index ef9f4bc..f6ae947 100644
--- a/drivers/net/fm/p5040.c
+++ b/drivers/net/fm/p5040.c
@@ -2,7 +2,7 @@
/*
* Copyright 2011 Freescale Semiconductor, Inc.
*/
-#include <common.h>
+#include <config.h>
#include <phy.h>
#include <fm_eth.h>
#include <asm/io.h>
diff --git a/drivers/net/fm/t1024.c b/drivers/net/fm/t1024.c
index 70ab461..18d71e7 100644
--- a/drivers/net/fm/t1024.c
+++ b/drivers/net/fm/t1024.c
@@ -4,7 +4,7 @@
* Shengzhou Liu <Shengzhou.Liu@freescale.com>
*/
-#include <common.h>
+#include <config.h>
#include <phy.h>
#include <fm_eth.h>
#include <asm/immap_85xx.h>
diff --git a/drivers/net/fm/t1040.c b/drivers/net/fm/t1040.c
index 5c260be..dafa6d6 100644
--- a/drivers/net/fm/t1040.c
+++ b/drivers/net/fm/t1040.c
@@ -2,7 +2,7 @@
/*
* Copyright 2013 Freescale Semiconductor, Inc.
*/
-#include <common.h>
+#include <config.h>
#include <phy.h>
#include <fm_eth.h>
#include <asm/io.h>
diff --git a/drivers/net/fm/t2080.c b/drivers/net/fm/t2080.c
index 6174934..390ca0a 100644
--- a/drivers/net/fm/t2080.c
+++ b/drivers/net/fm/t2080.c
@@ -5,7 +5,7 @@
* Shengzhou Liu <Shengzhou.Liu@freescale.com>
*/
-#include <common.h>
+#include <config.h>
#include <phy.h>
#include <fm_eth.h>
#include <asm/immap_85xx.h>
diff --git a/drivers/net/fm/t4240.c b/drivers/net/fm/t4240.c
index f0a02bf..df76073 100644
--- a/drivers/net/fm/t4240.c
+++ b/drivers/net/fm/t4240.c
@@ -3,7 +3,7 @@
* Copyright 2012 Freescale Semiconductor, Inc.
* Roy Zang <tie-fei.zang@freescale.com>
*/
-#include <common.h>
+#include <config.h>
#include <phy.h>
#include <fm_eth.h>
#include <asm/io.h>
diff --git a/drivers/net/fm/tgec.c b/drivers/net/fm/tgec.c
index 9cc9f3f..f7b51ce 100644
--- a/drivers/net/fm/tgec.c
+++ b/drivers/net/fm/tgec.c
@@ -7,7 +7,6 @@
/* MAXFRM - maximum frame length */
#define MAXFRM_MASK 0x0000ffff
-#include <common.h>
#include <phy.h>
#include <asm/types.h>
#include <asm/io.h>
diff --git a/drivers/net/fm/tgec_phy.c b/drivers/net/fm/tgec_phy.c
index 22225c2..f6c8f80 100644
--- a/drivers/net/fm/tgec_phy.c
+++ b/drivers/net/fm/tgec_phy.c
@@ -4,7 +4,6 @@
* Andy Fleming <afleming@gmail.com>
* Some part is taken from tsec.c
*/
-#include <common.h>
#include <miiphy.h>
#include <phy.h>
#include <asm/io.h>
diff --git a/drivers/net/fsl-mc/mc.c b/drivers/net/fsl-mc/mc.c
index f5c5057..c2869ce 100644
--- a/drivers/net/fsl-mc/mc.c
+++ b/drivers/net/fsl-mc/mc.c
@@ -3,7 +3,7 @@
* Copyright 2014 Freescale Semiconductor, Inc.
* Copyright 2017-2018, 2020-2021 NXP
*/
-#include <common.h>
+#include <config.h>
#include <command.h>
#include <cpu_func.h>
#include <env.h>
diff --git a/drivers/net/fsl-mc/mc_sys.c b/drivers/net/fsl-mc/mc_sys.c
index 4d32516..482fb04 100644
--- a/drivers/net/fsl-mc/mc_sys.c
+++ b/drivers/net/fsl-mc/mc_sys.c
@@ -8,7 +8,6 @@
#include <fsl-mc/fsl_mc_sys.h>
#include <fsl-mc/fsl_mc_cmd.h>
-#include <common.h>
#include <errno.h>
#include <asm/io.h>
#include <linux/delay.h>
diff --git a/drivers/net/fsl_enetc.c b/drivers/net/fsl_enetc.c
index 1fd5089..a6b0baf 100644
--- a/drivers/net/fsl_enetc.c
+++ b/drivers/net/fsl_enetc.c
@@ -4,7 +4,6 @@
* Copyright 2017-2021 NXP
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <fdt_support.h>
diff --git a/drivers/net/fsl_enetc_mdio.c b/drivers/net/fsl_enetc_mdio.c
index 50ad76d..2d5fcbb 100644
--- a/drivers/net/fsl_enetc_mdio.c
+++ b/drivers/net/fsl_enetc_mdio.c
@@ -4,7 +4,6 @@
* Copyright 2019 NXP
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <pci.h>
diff --git a/drivers/net/fsl_ls_mdio.c b/drivers/net/fsl_ls_mdio.c
index fce7393..e3c37d9 100644
--- a/drivers/net/fsl_ls_mdio.c
+++ b/drivers/net/fsl_ls_mdio.c
@@ -3,7 +3,6 @@
* Copyright 2020 NXP
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <miiphy.h>
diff --git a/drivers/net/fsl_mdio.c b/drivers/net/fsl_mdio.c
index 5fd11db..a0f1c59 100644
--- a/drivers/net/fsl_mdio.c
+++ b/drivers/net/fsl_mdio.c
@@ -5,7 +5,6 @@
* Mingkai Hu <Mingkai.hu@freescale.com>
*/
-#include <common.h>
#include <miiphy.h>
#include <phy.h>
#include <fsl_mdio.h>
diff --git a/drivers/net/ftgmac100.c b/drivers/net/ftgmac100.c
index 9b536fd..8781e50 100644
--- a/drivers/net/ftgmac100.c
+++ b/drivers/net/ftgmac100.c
@@ -11,7 +11,6 @@
* Copyright (C) 2018, IBM Corporation.
*/
-#include <common.h>
#include <clk.h>
#include <reset.h>
#include <cpu_func.h>
diff --git a/drivers/net/ftmac100.c b/drivers/net/ftmac100.c
index fae3adc..199a072 100644
--- a/drivers/net/ftmac100.c
+++ b/drivers/net/ftmac100.c
@@ -7,7 +7,6 @@
*/
#include <config.h>
-#include <common.h>
#include <cpu_func.h>
#include <env.h>
#include <malloc.h>
diff --git a/drivers/net/gmac_rockchip.c b/drivers/net/gmac_rockchip.c
index c1bae3f..d63e2db 100644
--- a/drivers/net/gmac_rockchip.c
+++ b/drivers/net/gmac_rockchip.c
@@ -5,7 +5,6 @@
* Rockchip GMAC ethernet IP driver for U-Boot
*/
-#include <common.h>
#include <dm.h>
#include <clk.h>
#include <log.h>
@@ -19,7 +18,7 @@
#include <asm/arch-rockchip/grf_px30.h>
#include <asm/arch-rockchip/grf_rk322x.h>
#include <asm/arch-rockchip/grf_rk3288.h>
-#include <asm/arch-rk3308/grf_rk3308.h>
+#include <asm/arch-rockchip/grf_rk3308.h>
#include <asm/arch-rockchip/grf_rk3328.h>
#include <asm/arch-rockchip/grf_rk3368.h>
#include <asm/arch-rockchip/grf_rk3399.h>
@@ -739,7 +738,7 @@
.data = (ulong)&rk3228_gmac_ops },
{ .compatible = "rockchip,rk3288-gmac",
.data = (ulong)&rk3288_gmac_ops },
- { .compatible = "rockchip,rk3308-mac",
+ { .compatible = "rockchip,rk3308-gmac",
.data = (ulong)&rk3308_gmac_ops },
{ .compatible = "rockchip,rk3328-gmac",
.data = (ulong)&rk3328_gmac_ops },
diff --git a/drivers/net/higmacv300.c b/drivers/net/higmacv300.c
index 1862235..6b88f6f 100644
--- a/drivers/net/higmacv300.c
+++ b/drivers/net/higmacv300.c
@@ -8,7 +8,6 @@
#include <malloc.h>
#include <asm/cache.h>
#include <asm/io.h>
-#include <common.h>
#include <console.h>
#include <linux/bitops.h>
#include <linux/bug.h>
diff --git a/drivers/net/ks8851_mll.c b/drivers/net/ks8851_mll.c
index 518548e..cc2e826 100644
--- a/drivers/net/ks8851_mll.c
+++ b/drivers/net/ks8851_mll.c
@@ -6,7 +6,6 @@
#include <log.h>
#include <asm/io.h>
-#include <common.h>
#include <command.h>
#include <malloc.h>
#include <net.h>
diff --git a/drivers/net/ldpaa_eth/ldpaa_eth.c b/drivers/net/ldpaa_eth/ldpaa_eth.c
index 87fbada..b72198c 100644
--- a/drivers/net/ldpaa_eth/ldpaa_eth.c
+++ b/drivers/net/ldpaa_eth/ldpaa_eth.c
@@ -4,7 +4,6 @@
* Copyright 2017, 2023 NXP
*/
-#include <common.h>
#include <cpu_func.h>
#include <dm/device_compat.h>
#include <fsl-mc/fsl_dpmac.h>
diff --git a/drivers/net/ldpaa_eth/ldpaa_wriop.c b/drivers/net/ldpaa_eth/ldpaa_wriop.c
index adecb81..a803b8f 100644
--- a/drivers/net/ldpaa_eth/ldpaa_wriop.c
+++ b/drivers/net/ldpaa_eth/ldpaa_wriop.c
@@ -3,7 +3,6 @@
* Copyright (C) 2015 Freescale Semiconductor
*/
-#include <common.h>
#include <asm/io.h>
#include <asm/types.h>
#include <malloc.h>
diff --git a/drivers/net/ldpaa_eth/ls1088a.c b/drivers/net/ldpaa_eth/ls1088a.c
index 32bcb51..2727fb0 100644
--- a/drivers/net/ldpaa_eth/ls1088a.c
+++ b/drivers/net/ldpaa_eth/ls1088a.c
@@ -2,7 +2,7 @@
/*
* Copyright 2017 NXP
*/
-#include <common.h>
+#include <config.h>
#include <phy.h>
#include <fsl-mc/ldpaa_wriop.h>
#include <asm/io.h>
diff --git a/drivers/net/ldpaa_eth/ls2080a.c b/drivers/net/ldpaa_eth/ls2080a.c
index 845a36b..0501755 100644
--- a/drivers/net/ldpaa_eth/ls2080a.c
+++ b/drivers/net/ldpaa_eth/ls2080a.c
@@ -2,7 +2,7 @@
/*
* Copyright 2015 Freescale Semiconductor, Inc.
*/
-#include <common.h>
+#include <config.h>
#include <phy.h>
#include <fsl-mc/ldpaa_wriop.h>
#include <asm/io.h>
diff --git a/drivers/net/ldpaa_eth/lx2160a.c b/drivers/net/ldpaa_eth/lx2160a.c
index c2641a9..25ae684 100644
--- a/drivers/net/ldpaa_eth/lx2160a.c
+++ b/drivers/net/ldpaa_eth/lx2160a.c
@@ -2,7 +2,7 @@
/*
* Copyright 2018, 2020 NXP
*/
-#include <common.h>
+#include <config.h>
#include <phy.h>
#include <fsl-mc/ldpaa_wriop.h>
#include <asm/io.h>
diff --git a/drivers/net/macb.c b/drivers/net/macb.c
index bca014c..cbf5f60 100644
--- a/drivers/net/macb.c
+++ b/drivers/net/macb.c
@@ -2,7 +2,6 @@
/*
* Copyright (C) 2005-2006 Atmel Corporation
*/
-#include <common.h>
#include <clk.h>
#include <cpu_func.h>
#include <dm.h>
diff --git a/drivers/net/mcffec.c b/drivers/net/mcffec.c
index ec1fae9..04b711e 100644
--- a/drivers/net/mcffec.c
+++ b/drivers/net/mcffec.c
@@ -10,7 +10,7 @@
* (C) 2019 Angelo Dureghello <angelo.dureghello@timesys.com>
*/
-#include <common.h>
+#include <config.h>
#include <env.h>
#include <hang.h>
#include <malloc.h>
diff --git a/drivers/net/mcfmii.c b/drivers/net/mcfmii.c
index eae2065..9bf8870 100644
--- a/drivers/net/mcfmii.c
+++ b/drivers/net/mcfmii.c
@@ -4,7 +4,6 @@
* TsiChung Liew (Tsi-Chung.Liew@freescale.com)
*/
-#include <common.h>
#include <config.h>
#include <net.h>
#include <netdev.h>
diff --git a/drivers/net/mdio-ipq4019.c b/drivers/net/mdio-ipq4019.c
index 50134b4..c824c3d 100644
--- a/drivers/net/mdio-ipq4019.c
+++ b/drivers/net/mdio-ipq4019.c
@@ -11,7 +11,6 @@
*/
#include <asm/io.h>
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <linux/bitops.h>
diff --git a/drivers/net/mpc8xx_fec.c b/drivers/net/mpc8xx_fec.c
index 7833773..c44fa6a 100644
--- a/drivers/net/mpc8xx_fec.c
+++ b/drivers/net/mpc8xx_fec.c
@@ -4,7 +4,6 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
#include <command.h>
#include <hang.h>
#include <malloc.h>
diff --git a/drivers/net/mscc_eswitch/jr2_switch.c b/drivers/net/mscc_eswitch/jr2_switch.c
index 7157428..925888e 100644
--- a/drivers/net/mscc_eswitch/jr2_switch.c
+++ b/drivers/net/mscc_eswitch/jr2_switch.c
@@ -3,7 +3,6 @@
* Copyright (c) 2018 Microsemi Corporation
*/
-#include <common.h>
#include <config.h>
#include <dm.h>
#include <malloc.h>
diff --git a/drivers/net/mscc_eswitch/luton_switch.c b/drivers/net/mscc_eswitch/luton_switch.c
index 5e4f00c..2f3d091 100644
--- a/drivers/net/mscc_eswitch/luton_switch.c
+++ b/drivers/net/mscc_eswitch/luton_switch.c
@@ -3,7 +3,6 @@
* Copyright (c) 2019 Microsemi Corporation
*/
-#include <common.h>
#include <config.h>
#include <dm.h>
#include <malloc.h>
diff --git a/drivers/net/mscc_eswitch/ocelot_switch.c b/drivers/net/mscc_eswitch/ocelot_switch.c
index 7ea1f55..30bb4b5 100644
--- a/drivers/net/mscc_eswitch/ocelot_switch.c
+++ b/drivers/net/mscc_eswitch/ocelot_switch.c
@@ -3,7 +3,6 @@
* Copyright (c) 2018 Microsemi Corporation
*/
-#include <common.h>
#include <config.h>
#include <dm.h>
#include <log.h>
diff --git a/drivers/net/mscc_eswitch/serval_switch.c b/drivers/net/mscc_eswitch/serval_switch.c
index be06e48..8eab41d 100644
--- a/drivers/net/mscc_eswitch/serval_switch.c
+++ b/drivers/net/mscc_eswitch/serval_switch.c
@@ -3,7 +3,6 @@
* Copyright (c) 2019 Microsemi Corporation
*/
-#include <common.h>
#include <config.h>
#include <dm.h>
#include <log.h>
diff --git a/drivers/net/mscc_eswitch/servalt_switch.c b/drivers/net/mscc_eswitch/servalt_switch.c
index 2d2329c..61547d7 100644
--- a/drivers/net/mscc_eswitch/servalt_switch.c
+++ b/drivers/net/mscc_eswitch/servalt_switch.c
@@ -3,7 +3,6 @@
* Copyright (c) 2019 Microsemi Corporation
*/
-#include <common.h>
#include <config.h>
#include <dm.h>
#include <malloc.h>
diff --git a/drivers/net/mt7628-eth.c b/drivers/net/mt7628-eth.c
index b95de47..fc8a6bb 100644
--- a/drivers/net/mt7628-eth.c
+++ b/drivers/net/mt7628-eth.c
@@ -13,7 +13,6 @@
* copyrights here, so I can't add them here.
*/
-#include <common.h>
#include <cpu_func.h>
#include <dm.h>
#include <log.h>
diff --git a/drivers/net/mtk_eth.c b/drivers/net/mtk_eth.c
index 75e7bcf..94f17a9 100644
--- a/drivers/net/mtk_eth.c
+++ b/drivers/net/mtk_eth.c
@@ -6,7 +6,6 @@
* Author: Mark Lee <mark-mc.lee@mediatek.com>
*/
-#include <common.h>
#include <cpu_func.h>
#include <dm.h>
#include <log.h>
diff --git a/drivers/net/mv88e6xxx.c b/drivers/net/mv88e6xxx.c
index 8fbbc1c..557b6b2 100644
--- a/drivers/net/mv88e6xxx.c
+++ b/drivers/net/mv88e6xxx.c
@@ -23,7 +23,6 @@
* on the mv88e6176 via an SGMII interface.
*/
-#include <common.h>
#include <dm/device.h>
#include <dm/device_compat.h>
#include <dm/device-internal.h>
diff --git a/drivers/net/mvgbe.c b/drivers/net/mvgbe.c
index 3587ca2..17b62bb 100644
--- a/drivers/net/mvgbe.c
+++ b/drivers/net/mvgbe.c
@@ -11,7 +11,6 @@
* Copyright (C) 2002 rabeeh@galileo.co.il
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <net.h>
diff --git a/drivers/net/mvmdio.c b/drivers/net/mvmdio.c
index 5ebcfe1..3315e06 100644
--- a/drivers/net/mvmdio.c
+++ b/drivers/net/mvmdio.c
@@ -4,7 +4,6 @@
* Author: Ken Ma<make@marvell.com>
*/
-#include <common.h>
#include <dm.h>
#include <dm/device-internal.h>
#include <dm/lists.h>
diff --git a/drivers/net/mvneta.c b/drivers/net/mvneta.c
index 2493347..f014d39 100644
--- a/drivers/net/mvneta.c
+++ b/drivers/net/mvneta.c
@@ -12,7 +12,6 @@
* Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
*/
-#include <common.h>
#include <cpu_func.h>
#include <dm.h>
#include <log.h>
diff --git a/drivers/net/mvpp2.c b/drivers/net/mvpp2.c
index 1cd5430..d19a79d 100644
--- a/drivers/net/mvpp2.c
+++ b/drivers/net/mvpp2.c
@@ -13,7 +13,6 @@
* warranty of any kind, whether express or implied.
*/
-#include <common.h>
#include <cpu_func.h>
#include <dm.h>
#include <asm/cache.h>
diff --git a/drivers/net/netconsole.c b/drivers/net/netconsole.c
index 151bc55..1943de8 100644
--- a/drivers/net/netconsole.c
+++ b/drivers/net/netconsole.c
@@ -4,12 +4,12 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
#include <command.h>
#include <env.h>
#include <log.h>
#include <stdio_dev.h>
#include <net.h>
+#include <vsprintf.h>
#ifndef CFG_NETCONSOLE_BUFFER_SIZE
#define CFG_NETCONSOLE_BUFFER_SIZE 512
diff --git a/drivers/net/npcm750_eth.c b/drivers/net/npcm750_eth.c
index 2028f4a..f0ec6c5 100644
--- a/drivers/net/npcm750_eth.c
+++ b/drivers/net/npcm750_eth.c
@@ -3,7 +3,6 @@
* Copyright (c) 2021 Nuvoton Technology Corp.
*/
-#include <common.h>
#include <cpu_func.h>
#include <dm.h>
#include <errno.h>
diff --git a/drivers/net/pch_gbe.c b/drivers/net/pch_gbe.c
index ecf8c28..adeca3d 100644
--- a/drivers/net/pch_gbe.c
+++ b/drivers/net/pch_gbe.c
@@ -5,7 +5,6 @@
* Intel Platform Controller Hub EG20T (codename Topcliff) GMAC Driver
*/
-#include <common.h>
#include <cpu_func.h>
#include <dm.h>
#include <errno.h>
diff --git a/drivers/net/pcnet.c b/drivers/net/pcnet.c
index a1f3c2b..180a96a 100644
--- a/drivers/net/pcnet.c
+++ b/drivers/net/pcnet.c
@@ -6,7 +6,6 @@
* Linux driver pcnet32.c written 1996-1999 by Thomas Bogendoerfer.
*/
-#include <common.h>
#include <cpu_func.h>
#include <dm.h>
#include <log.h>
diff --git a/drivers/net/pfe_eth/pfe_cmd.c b/drivers/net/pfe_eth/pfe_cmd.c
index 2fe0db0..99c2a8d 100644
--- a/drivers/net/pfe_eth/pfe_cmd.c
+++ b/drivers/net/pfe_eth/pfe_cmd.c
@@ -9,7 +9,6 @@
* @brief PFE utility commands
*/
-#include <common.h>
#include <command.h>
#include <log.h>
#include <linux/delay.h>
diff --git a/drivers/net/pfe_eth/pfe_eth.c b/drivers/net/pfe_eth/pfe_eth.c
index ab532c5..e24a6f9 100644
--- a/drivers/net/pfe_eth/pfe_eth.c
+++ b/drivers/net/pfe_eth/pfe_eth.c
@@ -4,7 +4,7 @@
* Copyright 2017 NXP
*/
-#include <common.h>
+#include <config.h>
#include <dm.h>
#include <log.h>
#include <malloc.h>
diff --git a/drivers/net/pfe_eth/pfe_mdio.c b/drivers/net/pfe_eth/pfe_mdio.c
index ff48726..ce2f76e 100644
--- a/drivers/net/pfe_eth/pfe_mdio.c
+++ b/drivers/net/pfe_eth/pfe_mdio.c
@@ -3,7 +3,7 @@
* Copyright 2015-2016 Freescale Semiconductor, Inc.
* Copyright 2017 NXP
*/
-#include <common.h>
+#include <config.h>
#include <dm.h>
#include <log.h>
#include <malloc.h>
diff --git a/drivers/net/phy/adin.c b/drivers/net/phy/adin.c
index 0970449..ce44881 100644
--- a/drivers/net/phy/adin.c
+++ b/drivers/net/phy/adin.c
@@ -6,7 +6,6 @@
* Copyright 2022 Variscite Ltd.
* Copyright 2022 Josua Mayer <josua@solid-run.com>
*/
-#include <common.h>
#include <phy.h>
#include <linux/bitops.h>
#include <linux/bitfield.h>
diff --git a/drivers/net/phy/aquantia.c b/drivers/net/phy/aquantia.c
index a958e88..4517a6b 100644
--- a/drivers/net/phy/aquantia.c
+++ b/drivers/net/phy/aquantia.c
@@ -6,7 +6,6 @@
* Copyright 2018, 2021 NXP
*/
#include <config.h>
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <net.h>
diff --git a/drivers/net/phy/atheros.c b/drivers/net/phy/atheros.c
index abb7bdf..61525f6 100644
--- a/drivers/net/phy/atheros.c
+++ b/drivers/net/phy/atheros.c
@@ -6,7 +6,6 @@
* author Andy Fleming
* Copyright (c) 2019 Michael Walle <michael@walle.cc>
*/
-#include <common.h>
#include <phy.h>
#include <dm/device_compat.h>
#include <linux/bitfield.h>
diff --git a/drivers/net/phy/b53.c b/drivers/net/phy/b53.c
index 26e8e2f..e953630 100644
--- a/drivers/net/phy/b53.c
+++ b/drivers/net/phy/b53.c
@@ -22,7 +22,6 @@
* cover other switches would be trivial.
*/
-#include <common.h>
#include <command.h>
#include <linux/bitops.h>
#include <linux/delay.h>
diff --git a/drivers/net/phy/broadcom.c b/drivers/net/phy/broadcom.c
index ecccb7c..0a49015 100644
--- a/drivers/net/phy/broadcom.c
+++ b/drivers/net/phy/broadcom.c
@@ -5,7 +5,6 @@
* Copyright 2010-2011 Freescale Semiconductor, Inc.
* author Andy Fleming
*/
-#include <common.h>
#include <phy.h>
#include <linux/delay.h>
diff --git a/drivers/net/phy/ca_phy.c b/drivers/net/phy/ca_phy.c
index edef218..5b2c67d 100644
--- a/drivers/net/phy/ca_phy.c
+++ b/drivers/net/phy/ca_phy.c
@@ -8,7 +8,6 @@
*/
#include <config.h>
-#include <common.h>
#include <log.h>
#include <malloc.h>
#include <linux/ctype.h>
diff --git a/drivers/net/phy/cortina.c b/drivers/net/phy/cortina.c
index 1cf8b28..d043e85 100644
--- a/drivers/net/phy/cortina.c
+++ b/drivers/net/phy/cortina.c
@@ -8,7 +8,6 @@
*/
#include <config.h>
-#include <common.h>
#include <log.h>
#include <malloc.h>
#include <linux/ctype.h>
diff --git a/drivers/net/phy/davicom.c b/drivers/net/phy/davicom.c
index 31ffa1a..72d6681 100644
--- a/drivers/net/phy/davicom.c
+++ b/drivers/net/phy/davicom.c
@@ -5,7 +5,6 @@
* Copyright 2010-2011 Freescale Semiconductor, Inc.
* author Andy Fleming
*/
-#include <common.h>
#include <phy.h>
#define MIIM_DM9161_SCR 0x10
diff --git a/drivers/net/phy/dp83867.c b/drivers/net/phy/dp83867.c
index b672603..772cde1 100644
--- a/drivers/net/phy/dp83867.c
+++ b/drivers/net/phy/dp83867.c
@@ -3,7 +3,6 @@
* TI PHY drivers
*
*/
-#include <common.h>
#include <log.h>
#include <phy.h>
#include <dm/devres.h>
diff --git a/drivers/net/phy/dp83869.c b/drivers/net/phy/dp83869.c
index f9d4782..b6fb5ad 100644
--- a/drivers/net/phy/dp83869.c
+++ b/drivers/net/phy/dp83869.c
@@ -4,7 +4,6 @@
*
*/
-#include <common.h>
#include <phy.h>
#include <linux/compat.h>
#include <malloc.h>
diff --git a/drivers/net/phy/ethernet_id.c b/drivers/net/phy/ethernet_id.c
index 4dfdee6..2f8454c 100644
--- a/drivers/net/phy/ethernet_id.c
+++ b/drivers/net/phy/ethernet_id.c
@@ -5,7 +5,6 @@
* Copyright (C) 2022 Xilinx, Inc.
*/
-#include <common.h>
#include <dm/device_compat.h>
#include <dm/device-internal.h>
#include <dm/lists.h>
diff --git a/drivers/net/phy/fixed.c b/drivers/net/phy/fixed.c
index 2f0823b..11d3616 100644
--- a/drivers/net/phy/fixed.c
+++ b/drivers/net/phy/fixed.c
@@ -6,7 +6,6 @@
*/
#include <config.h>
-#include <common.h>
#include <malloc.h>
#include <phy.h>
#include <dm.h>
diff --git a/drivers/net/phy/generic_10g.c b/drivers/net/phy/generic_10g.c
index 34ac51e..38dc9a8 100644
--- a/drivers/net/phy/generic_10g.c
+++ b/drivers/net/phy/generic_10g.c
@@ -7,7 +7,6 @@
*
* Based loosely off of Linux's PHY Lib
*/
-#include <common.h>
#include <miiphy.h>
#include <phy.h>
diff --git a/drivers/net/phy/intel_xway.c b/drivers/net/phy/intel_xway.c
index 9d1b97d..fe50eec 100644
--- a/drivers/net/phy/intel_xway.c
+++ b/drivers/net/phy/intel_xway.c
@@ -1,5 +1,4 @@
// SPDX-License-Identifier: GPL-2.0+
-#include <common.h>
#include <phy.h>
#include <linux/bitfield.h>
diff --git a/drivers/net/phy/lxt.c b/drivers/net/phy/lxt.c
index 2094003..a817c58 100644
--- a/drivers/net/phy/lxt.c
+++ b/drivers/net/phy/lxt.c
@@ -5,7 +5,6 @@
* Copyright 2010-2011 Freescale Semiconductor, Inc.
* author Andy Fleming
*/
-#include <common.h>
#include <phy.h>
/* LXT971 Status 2 registers */
diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy/marvell.c
index 0a90f71..b0a0b7f 100644
--- a/drivers/net/phy/marvell.c
+++ b/drivers/net/phy/marvell.c
@@ -5,7 +5,6 @@
* Copyright 2010-2011 Freescale Semiconductor, Inc.
* author Andy Fleming
*/
-#include <common.h>
#include <errno.h>
#include <marvell_phy.h>
#include <phy.h>
diff --git a/drivers/net/phy/marvell10g.c b/drivers/net/phy/marvell10g.c
index 9e64672..8c95bcb 100644
--- a/drivers/net/phy/marvell10g.c
+++ b/drivers/net/phy/marvell10g.c
@@ -22,7 +22,6 @@
* If both the fiber and copper ports are connected, the first to gain
* link takes priority and the other port is completely locked out.
*/
-#include <common.h>
#include <console.h>
#include <dm/device_compat.h>
#include <dm/devres.h>
diff --git a/drivers/net/phy/meson-gxl.c b/drivers/net/phy/meson-gxl.c
index b49c9b5..d43b476 100644
--- a/drivers/net/phy/meson-gxl.c
+++ b/drivers/net/phy/meson-gxl.c
@@ -7,7 +7,6 @@
* Author: Neil Armstrong <narmstrong@baylibre.com>
*/
#include <config.h>
-#include <common.h>
#include <linux/bitops.h>
#include <dm.h>
#include <phy.h>
diff --git a/drivers/net/phy/micrel_ksz8xxx.c b/drivers/net/phy/micrel_ksz8xxx.c
index b0f3abc..a9a6446 100644
--- a/drivers/net/phy/micrel_ksz8xxx.c
+++ b/drivers/net/phy/micrel_ksz8xxx.c
@@ -6,7 +6,6 @@
* author Andy Fleming
* (C) 2012 NetModule AG, David Andrey, added KSZ9031
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <fdtdec.h>
diff --git a/drivers/net/phy/micrel_ksz90x1.c b/drivers/net/phy/micrel_ksz90x1.c
index ffc3c98..556d75e 100644
--- a/drivers/net/phy/micrel_ksz90x1.c
+++ b/drivers/net/phy/micrel_ksz90x1.c
@@ -8,7 +8,6 @@
* (C) Copyright 2017 Adaptrum, Inc.
* Written by Alexandru Gagniuc <alex.g@adaptrum.com> for Adaptrum, Inc.
*/
-#include <common.h>
#include <dm.h>
#include <env.h>
#include <errno.h>
diff --git a/drivers/net/phy/miiphybb.c b/drivers/net/phy/miiphybb.c
index cf71f7d..083d9d3 100644
--- a/drivers/net/phy/miiphybb.c
+++ b/drivers/net/phy/miiphybb.c
@@ -12,7 +12,6 @@
* channel.
*/
-#include <common.h>
#include <ioports.h>
#include <ppc_asm.tmpl>
#include <miiphy.h>
diff --git a/drivers/net/phy/motorcomm.c b/drivers/net/phy/motorcomm.c
index a2c763c..a96430c 100644
--- a/drivers/net/phy/motorcomm.c
+++ b/drivers/net/phy/motorcomm.c
@@ -6,7 +6,6 @@
*/
#include <config.h>
-#include <common.h>
#include <malloc.h>
#include <phy.h>
#include <linux/bitfield.h>
diff --git a/drivers/net/phy/mv88e61xx.c b/drivers/net/phy/mv88e61xx.c
index 8577810..ecc10f7 100644
--- a/drivers/net/phy/mv88e61xx.c
+++ b/drivers/net/phy/mv88e61xx.c
@@ -29,7 +29,6 @@
* changes may be required.
*/
-#include <common.h>
#include <log.h>
#include <linux/bitops.h>
#include <linux/delay.h>
diff --git a/drivers/net/phy/mv88e6352.c b/drivers/net/phy/mv88e6352.c
index 5606076..6284298 100644
--- a/drivers/net/phy/mv88e6352.c
+++ b/drivers/net/phy/mv88e6352.c
@@ -4,7 +4,6 @@
* Valentin Lontgchamp, Keymile AG, valentin.longchamp@keymile.com
*/
-#include <common.h>
#include <command.h>
#include <log.h>
#include <miiphy.h>
diff --git a/drivers/net/phy/natsemi.c b/drivers/net/phy/natsemi.c
index 6b9e99e..f7e514e 100644
--- a/drivers/net/phy/natsemi.c
+++ b/drivers/net/phy/natsemi.c
@@ -5,7 +5,6 @@
* Copyright 2010-2011 Freescale Semiconductor, Inc.
* author Andy Fleming
*/
-#include <common.h>
#include <phy.h>
/* NatSemi DP83630 */
diff --git a/drivers/net/phy/ncsi.c b/drivers/net/phy/ncsi.c
index 2bca116..a1de438 100644
--- a/drivers/net/phy/ncsi.c
+++ b/drivers/net/phy/ncsi.c
@@ -5,7 +5,6 @@
* Copyright (C) 2019, IBM Corporation.
*/
-#include <common.h>
#include <log.h>
#include <malloc.h>
#include <phy.h>
diff --git a/drivers/net/phy/nxp-c45-tja11xx.c b/drivers/net/phy/nxp-c45-tja11xx.c
index f24fc5b..a1e4c3d 100644
--- a/drivers/net/phy/nxp-c45-tja11xx.c
+++ b/drivers/net/phy/nxp-c45-tja11xx.c
@@ -5,7 +5,6 @@
* Copyright 2021 NXP
* Author: Radu Pirea <radu-nicolae.pirea@oss.nxp.com>
*/
-#include <common.h>
#include <dm.h>
#include <dm/devres.h>
#include <linux/delay.h>
diff --git a/drivers/net/phy/nxp-tja11xx.c b/drivers/net/phy/nxp-tja11xx.c
index 471b0e3..a61471f 100644
--- a/drivers/net/phy/nxp-tja11xx.c
+++ b/drivers/net/phy/nxp-tja11xx.c
@@ -6,7 +6,6 @@
* Copyright (C) 2018 Marek Vasut <marex@denx.de>
*/
-#include <common.h>
#include <linux/bitops.h>
#include <linux/delay.h>
#include <linux/iopoll.h>
diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c
index 270176c..fbf85d9 100644
--- a/drivers/net/phy/phy.c
+++ b/drivers/net/phy/phy.c
@@ -7,7 +7,6 @@
*
* Based loosely off of Linux's PHY Lib
*/
-#include <common.h>
#include <console.h>
#include <dm.h>
#include <log.h>
diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c
index 7e1036b..30f35cc 100644
--- a/drivers/net/phy/realtek.c
+++ b/drivers/net/phy/realtek.c
@@ -6,7 +6,6 @@
* author Andy Fleming
* Copyright 2016 Karsten Merker <merker@debian.org>
*/
-#include <common.h>
#include <linux/bitops.h>
#include <phy.h>
#include <linux/delay.h>
diff --git a/drivers/net/phy/smsc.c b/drivers/net/phy/smsc.c
index 056b607..0d823f5 100644
--- a/drivers/net/phy/smsc.c
+++ b/drivers/net/phy/smsc.c
@@ -9,7 +9,6 @@
* Some code copied from linux kernel
* Copyright (c) 2006 Herbert Valerio Riedel <hvr@gnu.org>
*/
-#include <common.h>
#include <miiphy.h>
/* This code does not check the partner abilities. */
diff --git a/drivers/net/phy/teranetics.c b/drivers/net/phy/teranetics.c
index 15f2c12..b393119 100644
--- a/drivers/net/phy/teranetics.c
+++ b/drivers/net/phy/teranetics.c
@@ -5,7 +5,6 @@
* Copyright 2010-2011 Freescale Semiconductor, Inc.
* author Andy Fleming
*/
-#include <common.h>
#include <phy.h>
#include <linux/delay.h>
diff --git a/drivers/net/phy/vitesse.c b/drivers/net/phy/vitesse.c
index c5cf0d7..4867d19 100644
--- a/drivers/net/phy/vitesse.c
+++ b/drivers/net/phy/vitesse.c
@@ -6,7 +6,6 @@
* Original Author: Andy Fleming
* Add vsc8662 phy support - Priyanka Jain
*/
-#include <common.h>
#include <miiphy.h>
/* Cicada Auxiliary Control/Status Register */
diff --git a/drivers/net/phy/xilinx_gmii2rgmii.c b/drivers/net/phy/xilinx_gmii2rgmii.c
index e2969bc..e44b7b7 100644
--- a/drivers/net/phy/xilinx_gmii2rgmii.c
+++ b/drivers/net/phy/xilinx_gmii2rgmii.c
@@ -5,7 +5,6 @@
* Copyright (C) 2018 Xilinx, Inc.
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <phy.h>
diff --git a/drivers/net/phy/xilinx_phy.c b/drivers/net/phy/xilinx_phy.c
index c07c780..a59e17d 100644
--- a/drivers/net/phy/xilinx_phy.c
+++ b/drivers/net/phy/xilinx_phy.c
@@ -6,7 +6,6 @@
*/
#include <config.h>
-#include <common.h>
#include <log.h>
#include <phy.h>
#include <dm.h>
diff --git a/drivers/net/pic32_eth.c b/drivers/net/pic32_eth.c
index 1333a3a..eea3c48 100644
--- a/drivers/net/pic32_eth.c
+++ b/drivers/net/pic32_eth.c
@@ -3,7 +3,6 @@
* (c) 2015 Purna Chandra Mandal <purna.mandal@microchip.com>
*
*/
-#include <common.h>
#include <cpu_func.h>
#include <errno.h>
#include <dm.h>
diff --git a/drivers/net/pic32_mdio.c b/drivers/net/pic32_mdio.c
index d4049cf..8610f9a 100644
--- a/drivers/net/pic32_mdio.c
+++ b/drivers/net/pic32_mdio.c
@@ -5,7 +5,6 @@
* Copyright 2015 Microchip Inc.
* Purna Chandra Mandal <purna.mandal@microchip.com>
*/
-#include <common.h>
#include <phy.h>
#include <miiphy.h>
#include <errno.h>
diff --git a/drivers/net/qe/dm_qe_uec.c b/drivers/net/qe/dm_qe_uec.c
index 6d1509d..ac3aedd 100644
--- a/drivers/net/qe/dm_qe_uec.c
+++ b/drivers/net/qe/dm_qe_uec.c
@@ -7,7 +7,6 @@
* Copyright (C) 2020 Heiko Schocher <hs@denx.de>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <memalign.h>
diff --git a/drivers/net/qe/dm_qe_uec_phy.c b/drivers/net/qe/dm_qe_uec_phy.c
index a0bcc8d..8c0168b 100644
--- a/drivers/net/qe/dm_qe_uec_phy.c
+++ b/drivers/net/qe/dm_qe_uec_phy.c
@@ -8,7 +8,6 @@
* Copyright (C) 2020 Heiko Schocher <hs@denx.de>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <miiphy.h>
diff --git a/drivers/net/qe/uccf.c b/drivers/net/qe/uccf.c
index 00848a1..badf4e5 100644
--- a/drivers/net/qe/uccf.c
+++ b/drivers/net/qe/uccf.c
@@ -7,6 +7,7 @@
*/
#include <malloc.h>
+#include <stdio.h>
#include <linux/errno.h>
#include <asm/io.h>
#include <linux/immap_qe.h>
diff --git a/drivers/net/qe/uccf.h b/drivers/net/qe/uccf.h
index 99f8458..e60bbe2 100644
--- a/drivers/net/qe/uccf.h
+++ b/drivers/net/qe/uccf.h
@@ -9,8 +9,8 @@
#ifndef __UCCF_H__
#define __UCCF_H__
-#include "common.h"
-#include "linux/immap_qe.h"
+#include <linux/types.h>
+#include <linux/immap_qe.h>
#include <fsl_qe.h>
/* Fast or Giga ethernet */
diff --git a/drivers/net/ravb.c b/drivers/net/ravb.c
index 4764bca..f1401d2 100644
--- a/drivers/net/ravb.c
+++ b/drivers/net/ravb.c
@@ -8,7 +8,6 @@
* Based on the SuperH Ethernet driver.
*/
-#include <common.h>
#include <clk.h>
#include <cpu_func.h>
#include <dm.h>
diff --git a/drivers/net/rswitch.c b/drivers/net/rswitch.c
index 5a69ca1..8e1b6e2 100644
--- a/drivers/net/rswitch.c
+++ b/drivers/net/rswitch.c
@@ -9,7 +9,6 @@
#include <asm/io.h>
#include <clk.h>
-#include <common.h>
#include <dm.h>
#include <dm/device-internal.h>
#include <dm/device_compat.h>
diff --git a/drivers/net/rtl8139.c b/drivers/net/rtl8139.c
index d8f24ec..2e0afad 100644
--- a/drivers/net/rtl8139.c
+++ b/drivers/net/rtl8139.c
@@ -68,7 +68,6 @@
*
*/
-#include <common.h>
#include <cpu_func.h>
#include <dm.h>
#include <log.h>
diff --git a/drivers/net/rtl8169.c b/drivers/net/rtl8169.c
index 93e83661..e80aebc 100644
--- a/drivers/net/rtl8169.c
+++ b/drivers/net/rtl8169.c
@@ -39,7 +39,6 @@
* 26 August 2006 Mihai Georgian <u-boot@linuxnotincluded.org.uk>
* Modified to use le32_to_cpu and cpu_to_le32 properly
*/
-#include <common.h>
#include <cpu_func.h>
#include <dm.h>
#include <errno.h>
diff --git a/drivers/net/sandbox-raw-bus.c b/drivers/net/sandbox-raw-bus.c
index fb1ba5a..15670d6 100644
--- a/drivers/net/sandbox-raw-bus.c
+++ b/drivers/net/sandbox-raw-bus.c
@@ -4,7 +4,6 @@
* Copyright (c) 2018 Joe Hershberger <joe.hershberger@ni.com>
*/
-#include <common.h>
#include <asm/eth-raw-os.h>
#include <dm.h>
#include <errno.h>
diff --git a/drivers/net/sandbox-raw.c b/drivers/net/sandbox-raw.c
index 99eb7a3..1d71671 100644
--- a/drivers/net/sandbox-raw.c
+++ b/drivers/net/sandbox-raw.c
@@ -8,7 +8,6 @@
#include <log.h>
#include <asm/eth-raw-os.h>
-#include <common.h>
#include <dm.h>
#include <env.h>
#include <malloc.h>
diff --git a/drivers/net/sandbox.c b/drivers/net/sandbox.c
index 13022ad..fe3627d 100644
--- a/drivers/net/sandbox.c
+++ b/drivers/net/sandbox.c
@@ -6,7 +6,6 @@
* Joe Hershberger <joe.hershberger@ni.com>
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <malloc.h>
diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c
index 7b1f59d..f1ce994 100644
--- a/drivers/net/sh_eth.c
+++ b/drivers/net/sh_eth.c
@@ -9,7 +9,6 @@
*/
#include <config.h>
-#include <common.h>
#include <cpu_func.h>
#include <env.h>
#include <log.h>
diff --git a/drivers/net/sja1105.c b/drivers/net/sja1105.c
index 48f044c..0ba84a4 100644
--- a/drivers/net/sja1105.c
+++ b/drivers/net/sja1105.c
@@ -8,7 +8,6 @@
* Ported from Linux (drivers/net/dsa/sja1105/).
*/
-#include <common.h>
#include <dm/device_compat.h>
#include <linux/bitops.h>
#include <linux/bitrev.h>
diff --git a/drivers/net/smc911x.c b/drivers/net/smc911x.c
index 616b7ce..f39ba40 100644
--- a/drivers/net/smc911x.c
+++ b/drivers/net/smc911x.c
@@ -5,7 +5,6 @@
* (c) 2007 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de>
*/
-#include <common.h>
#include <command.h>
#include <malloc.h>
#include <net.h>
diff --git a/drivers/net/sun8i_emac.c b/drivers/net/sun8i_emac.c
index 8bff4fe..f4b9779 100644
--- a/drivers/net/sun8i_emac.c
+++ b/drivers/net/sun8i_emac.c
@@ -16,7 +16,6 @@
#include <asm/global_data.h>
#include <asm/gpio.h>
#include <asm/io.h>
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <fdt_support.h>
diff --git a/drivers/net/sunxi_emac.c b/drivers/net/sunxi_emac.c
index f546ad1..3dee849 100644
--- a/drivers/net/sunxi_emac.c
+++ b/drivers/net/sunxi_emac.c
@@ -5,7 +5,6 @@
* (C) Copyright 2012, Stefan Roese <sr@denx.de>
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <log.h>
diff --git a/drivers/net/ti/Kconfig b/drivers/net/ti/Kconfig
index 72eccc9..ddfa95a 100644
--- a/drivers/net/ti/Kconfig
+++ b/drivers/net/ti/Kconfig
@@ -57,3 +57,16 @@
help
This driver supports the TI CPSW MDIO interface found in various
TI SoCs.
+
+config TI_ICSSG_PRUETH
+ bool "TI Gigabit PRU Ethernet driver"
+ depends on ARCH_K3
+ imply DM_MDIO
+ imply MISC_INIT_R
+ imply MISC
+ imply MDIO_TI_CPSW
+ select PHYLIB
+ select FS_LOADER
+ help
+ Support Gigabit Ethernet ports over the ICSSG PRU Subsystem
+ This subsystem is available starting with the AM65 platform.
diff --git a/drivers/net/ti/Makefile b/drivers/net/ti/Makefile
index 30c4c4b..b2b3aa3 100644
--- a/drivers/net/ti/Makefile
+++ b/drivers/net/ti/Makefile
@@ -7,3 +7,4 @@
obj-$(CONFIG_DRIVER_TI_KEYSTONE_NET) += keystone_net.o cpsw_mdio.o
obj-$(CONFIG_TI_AM65_CPSW_NUSS) += am65-cpsw-nuss.o
obj-$(CONFIG_MDIO_TI_CPSW) += cpsw_mdio.o
+obj-$(CONFIG_TI_ICSSG_PRUETH) += icssg_prueth.o icssg_classifier.o icssg_config.o icssg_queues.o
diff --git a/drivers/net/ti/am65-cpsw-nuss.c b/drivers/net/ti/am65-cpsw-nuss.c
index d68ed67..335c8be 100644
--- a/drivers/net/ti/am65-cpsw-nuss.c
+++ b/drivers/net/ti/am65-cpsw-nuss.c
@@ -6,7 +6,6 @@
*
*/
-#include <common.h>
#include <malloc.h>
#include <asm/cache.h>
#include <asm/gpio.h>
@@ -664,7 +663,7 @@
struct am65_cpsw_priv *priv = dev_get_priv(dev);
struct eth_pdata *pdata = dev_get_plat(dev);
struct am65_cpsw_common *cpsw_common;
- char portname[15];
+ char portname[32];
int ret;
priv->dev = dev;
@@ -672,7 +671,7 @@
cpsw_common = dev_get_priv(dev->parent);
priv->cpsw_common = cpsw_common;
- sprintf(portname, "%s%s", dev->parent->name, dev->name);
+ snprintf(portname, sizeof(portname), "%s%s", dev->parent->name, dev->name);
device_set_name(dev, portname);
ret = am65_cpsw_ofdata_parse_phy(dev);
diff --git a/drivers/net/ti/cpsw-common.c b/drivers/net/ti/cpsw-common.c
index d542827..3e66d7c 100644
--- a/drivers/net/ti/cpsw-common.c
+++ b/drivers/net/ti/cpsw-common.c
@@ -5,7 +5,6 @@
* Copyright (C) 2016, Texas Instruments, Incorporated
*/
-#include <common.h>
#include <dm.h>
#include <fdt_support.h>
#include <asm/global_data.h>
diff --git a/drivers/net/ti/cpsw.c b/drivers/net/ti/cpsw.c
index 9a5e964..d7746f4 100644
--- a/drivers/net/ti/cpsw.c
+++ b/drivers/net/ti/cpsw.c
@@ -5,7 +5,6 @@
* Copyright (C) 2010-2018 Texas Instruments Incorporated - https://www.ti.com/
*/
-#include <common.h>
#include <command.h>
#include <cpu_func.h>
#include <log.h>
diff --git a/drivers/net/ti/cpsw_mdio.c b/drivers/net/ti/cpsw_mdio.c
index f1b1eba..9e0083c 100644
--- a/drivers/net/ti/cpsw_mdio.c
+++ b/drivers/net/ti/cpsw_mdio.c
@@ -6,7 +6,6 @@
*/
#include <clk.h>
-#include <common.h>
#include <dm/device_compat.h>
#include <log.h>
#include <malloc.h>
diff --git a/drivers/net/ti/davinci_emac.c b/drivers/net/ti/davinci_emac.c
index 034877a..03a1a7a 100644
--- a/drivers/net/ti/davinci_emac.c
+++ b/drivers/net/ti/davinci_emac.c
@@ -21,7 +21,7 @@
* ver. 1.0: Sep 2005, Anant Gole - Created EMAC version for uBoot.
* ver 1.1: Nov 2005, Anant Gole - Extended the RX logic for multiple descriptors
*/
-#include <common.h>
+#include <config.h>
#include <command.h>
#include <cpu_func.h>
#include <log.h>
diff --git a/drivers/net/ti/icss_mii_rt.h b/drivers/net/ti/icss_mii_rt.h
new file mode 100644
index 0000000..fd95d4d
--- /dev/null
+++ b/drivers/net/ti/icss_mii_rt.h
@@ -0,0 +1,192 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+
+/* PRU-ICSS MII_RT register definitions
+ *
+ * Copyright (C) 2015-2024 Texas Instruments Incorporated - https://www.ti.com
+ */
+
+#ifndef __NET_PRUSS_MII_RT_H__
+#define __NET_PRUSS_MII_RT_H__
+
+#include <regmap.h>
+
+/* PRUSS_MII_RT Registers */
+#define PRUSS_MII_RT_RXCFG0 0x0
+#define PRUSS_MII_RT_RXCFG1 0x4
+#define PRUSS_MII_RT_TXCFG0 0x10
+#define PRUSS_MII_RT_TXCFG1 0x14
+#define PRUSS_MII_RT_TX_CRC0 0x20
+#define PRUSS_MII_RT_TX_CRC1 0x24
+#define PRUSS_MII_RT_TX_IPG0 0x30
+#define PRUSS_MII_RT_TX_IPG1 0x34
+#define PRUSS_MII_RT_PRS0 0x38
+#define PRUSS_MII_RT_PRS1 0x3c
+#define PRUSS_MII_RT_RX_FRMS0 0x40
+#define PRUSS_MII_RT_RX_FRMS1 0x44
+#define PRUSS_MII_RT_RX_PCNT0 0x48
+#define PRUSS_MII_RT_RX_PCNT1 0x4c
+#define PRUSS_MII_RT_RX_ERR0 0x50
+#define PRUSS_MII_RT_RX_ERR1 0x54
+
+/* PRUSS_MII_RT_RXCFG0/1 bits */
+#define PRUSS_MII_RT_RXCFG_RX_ENABLE BIT(0)
+#define PRUSS_MII_RT_RXCFG_RX_DATA_RDY_MODE_DIS BIT(1)
+#define PRUSS_MII_RT_RXCFG_RX_CUT_PREAMBLE BIT(2)
+#define PRUSS_MII_RT_RXCFG_RX_MUX_SEL BIT(3)
+#define PRUSS_MII_RT_RXCFG_RX_L2_EN BIT(4)
+#define PRUSS_MII_RT_RXCFG_RX_BYTE_SWAP BIT(5)
+#define PRUSS_MII_RT_RXCFG_RX_AUTO_FWD_PRE BIT(6)
+#define PRUSS_MII_RT_RXCFG_RX_L2_EOF_SCLR_DIS BIT(9)
+
+/* PRUSS_MII_RT_TXCFG0/1 bits */
+#define PRUSS_MII_RT_TXCFG_TX_ENABLE BIT(0)
+#define PRUSS_MII_RT_TXCFG_TX_AUTO_PREAMBLE BIT(1)
+#define PRUSS_MII_RT_TXCFG_TX_EN_MODE BIT(2)
+#define PRUSS_MII_RT_TXCFG_TX_BYTE_SWAP BIT(3)
+#define PRUSS_MII_RT_TXCFG_TX_MUX_SEL BIT(8)
+#define PRUSS_MII_RT_TXCFG_PRE_TX_AUTO_SEQUENCE BIT(9)
+#define PRUSS_MII_RT_TXCFG_PRE_TX_AUTO_ESC_ERR BIT(10)
+#define PRUSS_MII_RT_TXCFG_TX_32_MODE_EN BIT(11)
+#define PRUSS_MII_RT_TXCFG_TX_IPG_WIRE_CLK_EN BIT(12) /* SR2.0 onwards */
+
+#define PRUSS_MII_RT_TXCFG_TX_START_DELAY_SHIFT 16
+#define PRUSS_MII_RT_TXCFG_TX_START_DELAY_MASK GENMASK(25, 16)
+
+#define PRUSS_MII_RT_TXCFG_TX_CLK_DELAY_SHIFT 28
+#define PRUSS_MII_RT_TXCFG_TX_CLK_DELAY_MASK GENMASK(30, 28)
+
+/* PRUSS_MII_RT_TX_IPG0/1 bits */
+#define PRUSS_MII_RT_TX_IPG_IPG_SHIFT 0
+#define PRUSS_MII_RT_TX_IPG_IPG_MASK GENMASK(9, 0)
+
+/* PRUSS_MII_RT_PRS0/1 bits */
+#define PRUSS_MII_RT_PRS_COL BIT(0)
+#define PRUSS_MII_RT_PRS_CRS BIT(1)
+
+/* PRUSS_MII_RT_RX_FRMS0/1 bits */
+#define PRUSS_MII_RT_RX_FRMS_MIN_FRM_SHIFT 0
+#define PRUSS_MII_RT_RX_FRMS_MIN_FRM_MASK GENMASK(15, 0)
+
+#define PRUSS_MII_RT_RX_FRMS_MAX_FRM_SHIFT 16
+#define PRUSS_MII_RT_RX_FRMS_MAX_FRM_MASK GENMASK(31, 16)
+
+/* Min/Max in MII_RT_RX_FRMS */
+/* For EMAC and Switch */
+#define PRUSS_MII_RT_RX_FRMS_MAX (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN)
+#define PRUSS_MII_RT_RX_FRMS_MIN_FRM (64)
+
+/* for HSR and PRP */
+#define PRUSS_MII_RT_RX_FRMS_MAX_FRM_LRE (PRUSS_MII_RT_RX_FRMS_MAX + \
+ ICSS_LRE_TAG_RCT_SIZE)
+/* PRUSS_MII_RT_RX_PCNT0/1 bits */
+#define PRUSS_MII_RT_RX_PCNT_MIN_PCNT_SHIFT 0
+#define PRUSS_MII_RT_RX_PCNT_MIN_PCNT_MASK GENMASK(3, 0)
+
+#define PRUSS_MII_RT_RX_PCNT_MAX_PCNT_SHIFT 4
+#define PRUSS_MII_RT_RX_PCNT_MAX_PCNT_MASK GENMASK(7, 4)
+
+/* PRUSS_MII_RT_RX_ERR0/1 bits */
+#define PRUSS_MII_RT_RX_ERR_MIN_PCNT_ERR BIT(0)
+#define PRUSS_MII_RT_RX_ERR_MAX_PCNT_ERR BIT(1)
+#define PRUSS_MII_RT_RX_ERR_MIN_FRM_ERR BIT(2)
+#define PRUSS_MII_RT_RX_ERR_MAX_FRM_ERR BIT(3)
+
+#define ICSSG_CFG_OFFSET 0
+#define RGMII_CFG_OFFSET 4
+
+/* Constant to choose between MII0 and MII1 */
+#define ICSS_MII0 0
+#define ICSS_MII1 1
+
+/* ICSSG_CFG Register bits */
+#define ICSSG_CFG_SGMII_MODE BIT(16)
+#define ICSSG_CFG_TX_PRU_EN BIT(11)
+#define ICSSG_CFG_RX_SFD_TX_SOF_EN BIT(10)
+#define ICSSG_CFG_RTU_PRU_PSI_SHARE_EN BIT(9)
+#define ICSSG_CFG_IEP1_TX_EN BIT(8)
+#define ICSSG_CFG_MII1_MODE GENMASK(6, 5)
+#define ICSSG_CFG_MII1_MODE_SHIFT 5
+#define ICSSG_CFG_MII0_MODE GENMASK(4, 3)
+#define ICSSG_CFG_MII0_MODE_SHIFT 3
+#define ICSSG_CFG_RX_L2_G_EN BIT(2)
+#define ICSSG_CFG_TX_L2_EN BIT(1)
+#define ICSSG_CFG_TX_L1_EN BIT(0)
+
+enum mii_mode { MII_MODE_MII = 0, MII_MODE_RGMII, MII_MODE_SGMII };
+
+/* RGMII CFG Register bits */
+#define RGMII_CFG_INBAND_EN_MII0 BIT(16)
+#define RGMII_CFG_GIG_EN_MII0 BIT(17)
+#define RGMII_CFG_INBAND_EN_MII1 BIT(20)
+#define RGMII_CFG_GIG_EN_MII1 BIT(21)
+#define RGMII_CFG_FULL_DUPLEX_MII0 BIT(18)
+#define RGMII_CFG_FULL_DUPLEX_MII1 BIT(22)
+#define RGMII_CFG_SPEED_MII0 GENMASK(2, 1)
+#define RGMII_CFG_SPEED_MII1 GENMASK(6, 5)
+#define RGMII_CFG_SPEED_MII0_SHIFT 1
+#define RGMII_CFG_SPEED_MII1_SHIFT 5
+#define RGMII_CFG_FULLDUPLEX_MII0 BIT(3)
+#define RGMII_CFG_FULLDUPLEX_MII1 BIT(7)
+#define RGMII_CFG_FULLDUPLEX_MII0_SHIFT 3
+#define RGMII_CFG_FULLDUPLEX_MII1_SHIFT 7
+#define RGMII_CFG_SPEED_10M 0
+#define RGMII_CFG_SPEED_100M 1
+#define RGMII_CFG_SPEED_1G 2
+
+static inline void icssg_mii_update_ipg(struct regmap *mii_rt, int mii, u32 ipg)
+{
+ u32 val;
+
+ if (mii == ICSS_MII0) {
+ regmap_write(mii_rt, PRUSS_MII_RT_TX_IPG0, ipg);
+ } else {
+ /* Errata workaround: IEP1 is not read by h/w unless IEP0 is written */
+ regmap_read(mii_rt, PRUSS_MII_RT_TX_IPG0, &val);
+ regmap_write(mii_rt, PRUSS_MII_RT_TX_IPG1, ipg);
+ regmap_write(mii_rt, PRUSS_MII_RT_TX_IPG0, val);
+ }
+}
+
+static inline void icssg_update_rgmii_cfg(struct regmap *miig_rt, int speed,
+ bool full_duplex, int slice, struct prueth_priv *priv)
+{
+ u32 gig_en_mask, gig_val = 0, full_duplex_mask, full_duplex_val = 0;
+ u32 inband_en_mask, inband_val = 0;
+
+ gig_en_mask = (slice == ICSS_MII0) ? RGMII_CFG_GIG_EN_MII0 :
+ RGMII_CFG_GIG_EN_MII1;
+ if (speed == SPEED_1000)
+ gig_val = gig_en_mask;
+ regmap_update_bits(miig_rt, RGMII_CFG_OFFSET, gig_en_mask, gig_val);
+
+ inband_en_mask = (slice == ICSS_MII0) ? RGMII_CFG_INBAND_EN_MII0 :
+ RGMII_CFG_INBAND_EN_MII1;
+ if (speed == SPEED_10 && phy_interface_is_rgmii(priv->phydev))
+ inband_val = inband_en_mask;
+ regmap_update_bits(miig_rt, RGMII_CFG_OFFSET, inband_en_mask, inband_val);
+
+ full_duplex_mask = (slice == ICSS_MII0) ? RGMII_CFG_FULL_DUPLEX_MII0 :
+ RGMII_CFG_FULL_DUPLEX_MII1;
+ if (full_duplex)
+ full_duplex_val = full_duplex_mask;
+ regmap_update_bits(miig_rt, RGMII_CFG_OFFSET, full_duplex_mask,
+ full_duplex_val);
+}
+
+static inline void icssg_miig_set_interface_mode(struct regmap *miig_rt, int mii, int phy_if)
+{
+ u32 val, mask, shift;
+
+ mask = mii == ICSS_MII0 ? ICSSG_CFG_MII0_MODE : ICSSG_CFG_MII1_MODE;
+ shift = mii == ICSS_MII0 ? ICSSG_CFG_MII0_MODE_SHIFT : ICSSG_CFG_MII1_MODE_SHIFT;
+
+ val = MII_MODE_RGMII;
+ if (phy_if == PHY_INTERFACE_MODE_MII)
+ val = MII_MODE_MII;
+
+ val <<= shift;
+ regmap_update_bits(miig_rt, ICSSG_CFG_OFFSET, mask, val);
+ regmap_read(miig_rt, ICSSG_CFG_OFFSET, &val);
+}
+
+#endif /* __NET_PRUSS_MII_RT_H__ */
diff --git a/drivers/net/ti/icssg_classifier.c b/drivers/net/ti/icssg_classifier.c
new file mode 100644
index 0000000..e510a1c
--- /dev/null
+++ b/drivers/net/ti/icssg_classifier.c
@@ -0,0 +1,376 @@
+// SPDX-License-Identifier: GPL-2.0
+/* Texas Instruments ICSSG Ethernet Driver
+ *
+ * Copyright (C) 2018-2024 Texas Instruments Incorporated - https://www.ti.com/
+ *
+ */
+
+#include <dm/ofnode.h>
+#include <regmap.h>
+
+#define ICSSG_NUM_CLASSIFIERS 16
+#define ICSSG_NUM_FT1_SLOTS 8
+#define ICSSG_NUM_FT3_SLOTS 16
+
+#define ICSSG_NUM_CLASSIFIERS_IN_USE 1
+
+/* Filter 1 - FT1 */
+#define FT1_NUM_SLOTS 8
+#define FT1_SLOT_SIZE 0x10 /* bytes */
+
+/* offsets from FT1 slot base i.e. slot 1 start */
+#define FT1_DA0 0x0
+#define FT1_DA1 0x4
+#define FT1_DA0_MASK 0x8
+#define FT1_DA1_MASK 0xc
+
+#define FT1_N_REG(slize, n, reg) (offs[slice].ft1_slot_base + FT1_SLOT_SIZE * (n) + (reg))
+
+#define FT1_LEN_MASK GENMASK(19, 16)
+#define FT1_LEN_SHIFT 16
+#define FT1_LEN(len) (((len) << FT1_LEN_SHIFT) & FT1_LEN_MASK)
+
+#define FT1_START_MASK GENMASK(14, 0)
+#define FT1_START(start) ((start) & FT1_START_MASK)
+
+#define FT1_MATCH_SLOT(n) (GENMASK(23, 16) & (BIT(n) << 16))
+
+enum ft1_cfg_type {
+ FT1_CFG_TYPE_DISABLED = 0,
+ FT1_CFG_TYPE_EQ,
+ FT1_CFG_TYPE_GT,
+ FT1_CFG_TYPE_LT,
+};
+
+#define FT1_CFG_SHIFT(n) (2 * (n))
+#define FT1_CFG_MASK(n) (0x3 << FT1_CFG_SHIFT((n)))
+
+/* Filter 3 - FT3 */
+#define FT3_NUM_SLOTS 16
+#define FT3_SLOT_SIZE 0x20 /* bytes */
+
+/* offsets from FT3 slot n's base */
+#define FT3_START 0
+#define FT3_START_AUTO 0x4
+#define FT3_START_OFFSET 0x8
+#define FT3_JUMP_OFFSET 0xc
+#define FT3_LEN 0x10
+#define FT3_CFG 0x14
+#define FT3_T 0x18
+#define FT3_T_MASK 0x1c
+
+#define FT3_N_REG(slize, n, reg) \
+ (offs[slice].ft3_slot_base + FT3_SLOT_SIZE * (n) + (reg))
+
+/* offsets from rx_class n's base */
+#define RX_CLASS_AND_EN 0
+#define RX_CLASS_OR_EN 0x4
+
+#define RX_CLASS_NUM_SLOTS 16
+#define RX_CLASS_EN_SIZE 0x8 /* bytes */
+
+#define RX_CLASS_N_REG(slice, n, reg) \
+ (offs[slice].rx_class_base + RX_CLASS_EN_SIZE * (n) + (reg))
+
+/* RX Class Gates */
+#define RX_CLASS_GATES_SIZE 0x4 /* bytes */
+
+#define RX_CLASS_GATES_N_REG(slice, n) \
+ (offs[slice].rx_class_gates_base + RX_CLASS_GATES_SIZE * (n))
+
+#define RX_CLASS_GATES_ALLOW_MASK BIT(6)
+#define RX_CLASS_GATES_RAW_MASK BIT(5)
+#define RX_CLASS_GATES_PHASE_MASK BIT(4)
+
+/* RX Class traffic data matching bits */
+#define RX_CLASS_FT_UC BIT(31)
+#define RX_CLASS_FT_MC BIT(30)
+#define RX_CLASS_FT_BC BIT(29)
+#define RX_CLASS_FT_FW BIT(28)
+#define RX_CLASS_FT_RCV BIT(27)
+#define RX_CLASS_FT_VLAN BIT(26)
+#define RX_CLASS_FT_DA_P BIT(25)
+#define RX_CLASS_FT_DA_I BIT(24)
+#define RX_CLASS_FT_FT1_MATCH_MASK GENMASK(23, 16)
+#define RX_CLASS_FT_FT1_MATCH_SHIFT 16
+#define RX_CLASS_FT_FT3_MATCH_MASK GENMASK(15, 0)
+#define RX_CLASS_FT_FT3_MATCH_SHIFT 0
+
+#define RX_CLASS_FT_FT1_MATCH(slot) \
+ ((BIT(slot) << RX_CLASS_FT_FT1_MATCH_SHIFT) & \
+ RX_CLASS_FT_FT1_MATCH_MASK)
+
+enum rx_class_sel_type {
+ RX_CLASS_SEL_TYPE_OR = 0,
+ RX_CLASS_SEL_TYPE_AND = 1,
+ RX_CLASS_SEL_TYPE_OR_AND_AND = 2,
+ RX_CLASS_SEL_TYPE_OR_OR_AND = 3,
+};
+
+#define FT1_CFG_SHIFT(n) (2 * (n))
+#define FT1_CFG_MASK(n) (0x3 << FT1_CFG_SHIFT((n)))
+
+#define RX_CLASS_SEL_SHIFT(n) (2 * (n))
+#define RX_CLASS_SEL_MASK(n) (0x3 << RX_CLASS_SEL_SHIFT((n)))
+
+#define ICSSG_CFG_OFFSET 0
+#define MAC_INTERFACE_0 0x18
+#define MAC_INTERFACE_1 0x1c
+
+#define ICSSG_CFG_RX_L2_G_EN BIT(2)
+
+/* these are register offsets per PRU */
+struct miig_rt_offsets {
+ u32 mac0;
+ u32 mac1;
+ u32 ft1_start_len;
+ u32 ft1_cfg;
+ u32 ft1_slot_base;
+ u32 ft3_slot_base;
+ u32 ft3_p_base;
+ u32 ft_rx_ptr;
+ u32 rx_class_base;
+ u32 rx_class_cfg1;
+ u32 rx_class_cfg2;
+ u32 rx_class_gates_base;
+ u32 rx_green;
+ u32 rx_rate_cfg_base;
+ u32 rx_rate_src_sel0;
+ u32 rx_rate_src_sel1;
+ u32 tx_rate_cfg_base;
+ u32 stat_base;
+ u32 tx_hsr_tag;
+ u32 tx_hsr_seq;
+ u32 tx_vlan_type;
+ u32 tx_vlan_ins;
+};
+
+static struct miig_rt_offsets offs[] = {
+ /* PRU0 */
+ {
+ 0x8,
+ 0xc,
+ 0x80,
+ 0x84,
+ 0x88,
+ 0x108,
+ 0x308,
+ 0x408,
+ 0x40c,
+ 0x48c,
+ 0x490,
+ 0x494,
+ 0x4d4,
+ 0x4e4,
+ 0x504,
+ 0x508,
+ 0x50c,
+ 0x54c,
+ 0x63c,
+ 0x640,
+ 0x644,
+ 0x648,
+ },
+ /* PRU1 */
+ {
+ 0x10,
+ 0x14,
+ 0x64c,
+ 0x650,
+ 0x654,
+ 0x6d4,
+ 0x8d4,
+ 0x9d4,
+ 0x9d8,
+ 0xa58,
+ 0xa5c,
+ 0xa60,
+ 0xaa0,
+ 0xab0,
+ 0xad0,
+ 0xad4,
+ 0xad8,
+ 0xb18,
+ 0xc08,
+ 0xc0c,
+ 0xc10,
+ 0xc14,
+ },
+};
+
+static inline u32 addr_to_da0(const u8 *addr)
+{
+ return (u32)(addr[0] | addr[1] << 8 |
+ addr[2] << 16 | addr[3] << 24);
+};
+
+static inline u32 addr_to_da1(const u8 *addr)
+{
+ return (u32)(addr[4] | addr[5] << 8);
+};
+
+static void rx_class_ft1_set_start_len(struct regmap *miig_rt, int slice,
+ u16 start, u8 len)
+{
+ u32 offset, val;
+
+ offset = offs[slice].ft1_start_len;
+ val = FT1_LEN(len) | FT1_START(start);
+ regmap_write(miig_rt, offset, val);
+}
+
+static void rx_class_ft1_set_da(struct regmap *miig_rt, int slice,
+ int n, const u8 *addr)
+{
+ u32 offset;
+
+ offset = FT1_N_REG(slice, n, FT1_DA0);
+ regmap_write(miig_rt, offset, addr_to_da0(addr));
+ offset = FT1_N_REG(slice, n, FT1_DA1);
+ regmap_write(miig_rt, offset, addr_to_da1(addr));
+}
+
+static void rx_class_ft1_set_da_mask(struct regmap *miig_rt, int slice,
+ int n, const u8 *addr)
+{
+ u32 offset;
+
+ offset = FT1_N_REG(slice, n, FT1_DA0_MASK);
+ regmap_write(miig_rt, offset, addr_to_da0(addr));
+ offset = FT1_N_REG(slice, n, FT1_DA1_MASK);
+ regmap_write(miig_rt, offset, addr_to_da1(addr));
+}
+
+static void rx_class_ft1_cfg_set_type(struct regmap *miig_rt, int slice, int n,
+ enum ft1_cfg_type type)
+{
+ u32 offset;
+
+ offset = offs[slice].ft1_cfg;
+ regmap_update_bits(miig_rt, offset, FT1_CFG_MASK(n),
+ type << FT1_CFG_SHIFT(n));
+}
+
+static void rx_class_sel_set_type(struct regmap *miig_rt, int slice, int n,
+ enum rx_class_sel_type type)
+{
+ u32 offset;
+
+ offset = offs[slice].rx_class_cfg1;
+ regmap_update_bits(miig_rt, offset, RX_CLASS_SEL_MASK(n),
+ type << RX_CLASS_SEL_SHIFT(n));
+}
+
+static void rx_class_set_and(struct regmap *miig_rt, int slice, int n,
+ u32 data)
+{
+ u32 offset;
+
+ offset = RX_CLASS_N_REG(slice, n, RX_CLASS_AND_EN);
+ regmap_write(miig_rt, offset, data);
+}
+
+static void rx_class_set_or(struct regmap *miig_rt, int slice, int n,
+ u32 data)
+{
+ u32 offset;
+
+ offset = RX_CLASS_N_REG(slice, n, RX_CLASS_OR_EN);
+ regmap_write(miig_rt, offset, data);
+}
+
+void icssg_class_set_host_mac_addr(struct regmap *miig_rt, u8 *mac)
+{
+ regmap_write(miig_rt, MAC_INTERFACE_0, addr_to_da0(mac));
+ regmap_write(miig_rt, MAC_INTERFACE_1, addr_to_da1(mac));
+}
+
+void icssg_class_set_mac_addr(struct regmap *miig_rt, int slice, u8 *mac)
+{
+ regmap_write(miig_rt, offs[slice].mac0, addr_to_da0(mac));
+ regmap_write(miig_rt, offs[slice].mac1, addr_to_da1(mac));
+}
+
+void icssg_class_disable_n(struct regmap *miig_rt, int slice, int n)
+{
+ u32 data, offset;
+
+ /* AND_EN = 0 */
+ rx_class_set_and(miig_rt, slice, n, 0);
+ /* OR_EN = 0 */
+ rx_class_set_or(miig_rt, slice, n, 0);
+
+ /* set CFG1 to OR */
+ rx_class_sel_set_type(miig_rt, slice, n, RX_CLASS_SEL_TYPE_OR);
+
+ /* configure gate */
+ offset = RX_CLASS_GATES_N_REG(slice, n);
+ regmap_read(miig_rt, offset, &data);
+ /* clear class_raw so we go through filters */
+ data &= ~RX_CLASS_GATES_RAW_MASK;
+ /* set allow and phase mask */
+ data |= RX_CLASS_GATES_ALLOW_MASK | RX_CLASS_GATES_PHASE_MASK;
+ regmap_write(miig_rt, offset, data);
+}
+
+/* disable all RX traffic */
+void icssg_class_disable(struct regmap *miig_rt, int slice)
+{
+ int n;
+
+ /* Enable RX_L2_G */
+ regmap_update_bits(miig_rt, ICSSG_CFG_OFFSET, ICSSG_CFG_RX_L2_G_EN,
+ ICSSG_CFG_RX_L2_G_EN);
+
+ for (n = 0; n < ICSSG_NUM_CLASSIFIERS; n++)
+ icssg_class_disable_n(miig_rt, slice, n);
+
+ /* FT1 Disabled */
+ for (n = 0; n < ICSSG_NUM_FT1_SLOTS; n++) {
+ u8 addr[] = { 0, 0, 0, 0, 0, 0, };
+
+ rx_class_ft1_cfg_set_type(miig_rt, slice, n,
+ FT1_CFG_TYPE_DISABLED);
+ rx_class_ft1_set_da(miig_rt, slice, n, addr);
+ rx_class_ft1_set_da_mask(miig_rt, slice, n, addr);
+ }
+
+ /* clear CFG2 */
+ regmap_write(miig_rt, offs[slice].rx_class_cfg2, 0);
+}
+
+void icssg_class_default(struct regmap *miig_rt, int slice, bool allmulti)
+{
+ u32 data;
+
+ /* defaults */
+ icssg_class_disable(miig_rt, slice);
+
+ /* Setup Classifier */
+ /* match on Broadcast or MAC_PRU address */
+ data = RX_CLASS_FT_BC | RX_CLASS_FT_DA_P;
+
+ /* multicast? */
+ if (allmulti)
+ data |= RX_CLASS_FT_MC;
+
+ rx_class_set_or(miig_rt, slice, 0, data);
+
+ /* set CFG1 for OR_OR_AND for classifier */
+ rx_class_sel_set_type(miig_rt, slice, 0,
+ RX_CLASS_SEL_TYPE_OR_OR_AND);
+
+ /* clear CFG2 */
+ regmap_write(miig_rt, offs[slice].rx_class_cfg2, 0);
+}
+
+/* required for SR2 for SAV check */
+void icssg_ft1_set_mac_addr(struct regmap *miig_rt, int slice, u8 *mac_addr)
+{
+ u8 mask_addr[] = { 0, 0, 0, 0, 0, 0, };
+
+ rx_class_ft1_set_start_len(miig_rt, slice, 6, 6);
+ rx_class_ft1_set_da(miig_rt, slice, 0, mac_addr);
+ rx_class_ft1_set_da_mask(miig_rt, slice, 0, mask_addr);
+ rx_class_ft1_cfg_set_type(miig_rt, slice, 0, FT1_CFG_TYPE_EQ);
+}
diff --git a/drivers/net/ti/icssg_config.c b/drivers/net/ti/icssg_config.c
new file mode 100644
index 0000000..5f132d0
--- /dev/null
+++ b/drivers/net/ti/icssg_config.c
@@ -0,0 +1,474 @@
+// SPDX-License-Identifier: GPL-2.0
+/* ICSSG Ethernet driver
+ *
+ * Copyright (C) 2018-2024 Texas Instruments Incorporated - https://www.ti.com
+ */
+
+#include <phy.h>
+#include "icssg_prueth.h"
+#include "icssg_switch_map.h"
+#include "icss_mii_rt.h"
+#include <dm/device_compat.h>
+#include <linux/iopoll.h>
+
+/* TX IPG Values to be set for 100M and 1G link speeds. These values are
+ * in ocp_clk cycles. So need change if ocp_clk is changed for a specific
+ * h/w design.
+ */
+
+/* SR2.0 IPG is in rgmii_clk (125MHz) clock cycles + 1 */
+#define MII_RT_TX_IPG_100M 0x17
+#define MII_RT_TX_IPG_1G 0xb
+
+#define ICSSG_QUEUES_MAX 64
+#define ICSSG_QUEUE_OFFSET 0xd00
+#define ICSSG_QUEUE_PEEK_OFFSET 0xe00
+#define ICSSG_QUEUE_CNT_OFFSET 0xe40
+#define ICSSG_QUEUE_RESET_OFFSET 0xf40
+
+#define ICSSG_NUM_TX_QUEUES 8
+
+#define RECYCLE_Q_SLICE0 16
+#define RECYCLE_Q_SLICE1 17
+
+#define ICSSG_NUM_OTHER_QUEUES 5 /* port, host and special queues */
+
+#define PORT_HI_Q_SLICE0 32
+#define PORT_LO_Q_SLICE0 33
+#define HOST_HI_Q_SLICE0 34
+#define HOST_LO_Q_SLICE0 35
+#define HOST_SPL_Q_SLICE0 40 /* Special Queue */
+
+#define PORT_HI_Q_SLICE1 36
+#define PORT_LO_Q_SLICE1 37
+#define HOST_HI_Q_SLICE1 38
+#define HOST_LO_Q_SLICE1 39
+#define HOST_SPL_Q_SLICE1 41 /* Special Queue */
+
+#define MII_RXCFG_DEFAULT (PRUSS_MII_RT_RXCFG_RX_ENABLE | \
+ PRUSS_MII_RT_RXCFG_RX_DATA_RDY_MODE_DIS | \
+ PRUSS_MII_RT_RXCFG_RX_L2_EN | \
+ PRUSS_MII_RT_RXCFG_RX_L2_EOF_SCLR_DIS)
+
+#define MII_TXCFG_DEFAULT (PRUSS_MII_RT_TXCFG_TX_ENABLE | \
+ PRUSS_MII_RT_TXCFG_TX_AUTO_PREAMBLE | \
+ PRUSS_MII_RT_TXCFG_TX_32_MODE_EN | \
+ PRUSS_MII_RT_TXCFG_TX_IPG_WIRE_CLK_EN)
+
+#define ICSSG_CFG_DEFAULT (ICSSG_CFG_TX_L1_EN | \
+ ICSSG_CFG_TX_L2_EN | ICSSG_CFG_RX_L2_G_EN | \
+ ICSSG_CFG_TX_PRU_EN | /* SR2.0 only */ \
+ ICSSG_CFG_SGMII_MODE)
+
+#define FDB_GEN_CFG1 0x60
+#define SMEM_VLAN_OFFSET 8
+#define SMEM_VLAN_OFFSET_MASK GENMASK(25, 8)
+
+#define FDB_GEN_CFG2 0x64
+#define FDB_VLAN_EN BIT(6)
+#define FDB_HOST_EN BIT(2)
+#define FDB_PRU1_EN BIT(1)
+#define FDB_PRU0_EN BIT(0)
+#define FDB_EN_ALL (FDB_PRU0_EN | FDB_PRU1_EN | \
+ FDB_HOST_EN | FDB_VLAN_EN)
+
+struct map {
+ int queue;
+ u32 pd_addr_start;
+ u32 flags;
+ bool special;
+};
+
+struct map hwq_map[2][ICSSG_NUM_OTHER_QUEUES] = {
+ {
+ { PORT_HI_Q_SLICE0, PORT_DESC0_HI, 0x200000, 0 },
+ { PORT_LO_Q_SLICE0, PORT_DESC0_LO, 0, 0 },
+ { HOST_HI_Q_SLICE0, HOST_DESC0_HI, 0x200000, 0 },
+ { HOST_LO_Q_SLICE0, HOST_DESC0_LO, 0, 0 },
+ { HOST_SPL_Q_SLICE0, HOST_SPPD0, 0x400000, 1 },
+ },
+ {
+ { PORT_HI_Q_SLICE1, PORT_DESC1_HI, 0xa00000, 0 },
+ { PORT_LO_Q_SLICE1, PORT_DESC1_LO, 0x800000, 0 },
+ { HOST_HI_Q_SLICE1, HOST_DESC1_HI, 0xa00000, 0 },
+ { HOST_LO_Q_SLICE1, HOST_DESC1_LO, 0x800000, 0 },
+ { HOST_SPL_Q_SLICE1, HOST_SPPD1, 0xc00000, 1 },
+ },
+};
+
+static void icssg_config_mii_init(struct prueth_priv *priv, int slice)
+{
+ struct prueth *prueth = priv->prueth;
+ struct regmap *mii_rt = prueth->mii_rt;
+ u32 txcfg_reg, pcnt_reg;
+ u32 txcfg;
+
+ txcfg_reg = (slice == ICSS_MII0) ? PRUSS_MII_RT_TXCFG0 :
+ PRUSS_MII_RT_TXCFG1;
+ pcnt_reg = (slice == ICSS_MII0) ? PRUSS_MII_RT_RX_PCNT0 :
+ PRUSS_MII_RT_RX_PCNT1;
+
+ txcfg = MII_TXCFG_DEFAULT;
+
+ if (prueth->phy_interface == PHY_INTERFACE_MODE_MII && slice == ICSS_MII0)
+ txcfg |= PRUSS_MII_RT_TXCFG_TX_MUX_SEL;
+ else if (prueth->phy_interface != PHY_INTERFACE_MODE_MII && slice == ICSS_MII1)
+ txcfg |= PRUSS_MII_RT_TXCFG_TX_MUX_SEL;
+
+ regmap_write(mii_rt, txcfg_reg, txcfg);
+ regmap_write(mii_rt, pcnt_reg, 0x1);
+}
+
+static void icssg_miig_queues_init(struct prueth_priv *priv, int slice)
+{
+ struct prueth *prueth = priv->prueth;
+ void __iomem *smem = (void __iomem *)prueth->shram.pa;
+ struct regmap *miig_rt = prueth->miig_rt;
+ int queue = 0, i, j;
+ u8 pd[ICSSG_SPECIAL_PD_SIZE];
+ u32 *pdword;
+
+ /* reset hwqueues */
+ if (slice)
+ queue = ICSSG_NUM_TX_QUEUES;
+
+ for (i = 0; i < ICSSG_NUM_TX_QUEUES; i++) {
+ regmap_write(miig_rt, ICSSG_QUEUE_RESET_OFFSET, queue);
+ queue++;
+ }
+
+ queue = slice ? RECYCLE_Q_SLICE1 : RECYCLE_Q_SLICE0;
+ regmap_write(miig_rt, ICSSG_QUEUE_RESET_OFFSET, queue);
+
+ for (i = 0; i < ICSSG_NUM_OTHER_QUEUES; i++) {
+ regmap_write(miig_rt, ICSSG_QUEUE_RESET_OFFSET,
+ hwq_map[slice][i].queue);
+ }
+
+ /* initialize packet descriptors in SMEM */
+ /* push pakcet descriptors to hwqueues */
+
+ pdword = (u32 *)pd;
+ for (j = 0; j < ICSSG_NUM_OTHER_QUEUES; j++) {
+ struct map *mp;
+ int pd_size, num_pds;
+ u32 pdaddr;
+
+ mp = &hwq_map[slice][j];
+ if (mp->special) {
+ pd_size = ICSSG_SPECIAL_PD_SIZE;
+ num_pds = ICSSG_NUM_SPECIAL_PDS;
+ } else {
+ pd_size = ICSSG_NORMAL_PD_SIZE;
+ num_pds = ICSSG_NUM_NORMAL_PDS;
+ }
+
+ for (i = 0; i < num_pds; i++) {
+ memset(pd, 0, pd_size);
+
+ pdword[0] &= cpu_to_le32(ICSSG_FLAG_MASK);
+ pdword[0] |= cpu_to_le32(mp->flags);
+ pdaddr = mp->pd_addr_start + i * pd_size;
+
+ memcpy_toio(smem + pdaddr, pd, pd_size);
+ queue = mp->queue;
+ regmap_write(miig_rt, ICSSG_QUEUE_OFFSET + 4 * queue,
+ pdaddr);
+ }
+ }
+}
+
+void icssg_config_ipg(struct prueth_priv *priv, int speed, int mii)
+{
+ struct prueth *prueth = priv->prueth;
+
+ switch (speed) {
+ case SPEED_1000:
+ icssg_mii_update_ipg(prueth->mii_rt, mii, MII_RT_TX_IPG_1G);
+ break;
+ case SPEED_100:
+ icssg_mii_update_ipg(prueth->mii_rt, mii, MII_RT_TX_IPG_100M);
+ break;
+ default:
+ /* Other links speeds not supported */
+ pr_err("Unsupported link speed\n");
+ return;
+ }
+}
+
+static void emac_r30_cmd_init(struct prueth_priv *priv)
+{
+ struct prueth *prueth = priv->prueth;
+ struct icssg_r30_cmd *p;
+ int i;
+
+ p = (struct icssg_r30_cmd *)(prueth->dram[priv->port_id].pa + MGR_R30_CMD_OFFSET);
+
+ for (i = 0; i < 4; i++)
+ writel(EMAC_NONE, &p->cmd[i]);
+}
+
+static int emac_r30_is_done(struct prueth_priv *priv)
+{
+ struct prueth *prueth = priv->prueth;
+ const struct icssg_r30_cmd *p;
+ int i;
+ u32 cmd;
+
+ p = (const struct icssg_r30_cmd *)(prueth->dram[priv->port_id].pa + MGR_R30_CMD_OFFSET);
+
+ for (i = 0; i < 4; i++) {
+ cmd = readl(&p->cmd[i]);
+ if (cmd != EMAC_NONE)
+ return 0;
+ }
+
+ return 1;
+}
+
+static int prueth_emac_buffer_setup(struct prueth_priv *priv)
+{
+ struct prueth *prueth = priv->prueth;
+ struct icssg_buffer_pool_cfg *bpool_cfg;
+ struct icssg_rxq_ctx *rxq_ctx;
+ int slice = priv->port_id;
+ u32 addr;
+ int i;
+
+ /* Layout to have 64KB aligned buffer pool
+ * |BPOOL0|BPOOL1|RX_CTX0|RX_CTX1|
+ */
+
+ addr = lower_32_bits(prueth->sram_pa);
+ if (slice)
+ addr += PRUETH_NUM_BUF_POOLS * PRUETH_EMAC_BUF_POOL_SIZE;
+
+ if (addr % SZ_64K) {
+ dev_warn(prueth->dev, "buffer pool needs to be 64KB aligned\n");
+ return -EINVAL;
+ }
+
+ bpool_cfg = (struct icssg_buffer_pool_cfg *)(prueth->dram[priv->port_id].pa + BUFFER_POOL_0_ADDR_OFFSET);
+ /* workaround for f/w bug. bpool 0 needs to be initilalized */
+ bpool_cfg[0].addr = cpu_to_le32(addr);
+ bpool_cfg[0].len = 0;
+
+ for (i = PRUETH_EMAC_BUF_POOL_START;
+ i < (PRUETH_EMAC_BUF_POOL_START + PRUETH_NUM_BUF_POOLS);
+ i++) {
+ bpool_cfg[i].addr = cpu_to_le32(addr);
+ bpool_cfg[i].len = cpu_to_le32(PRUETH_EMAC_BUF_POOL_SIZE);
+ addr += PRUETH_EMAC_BUF_POOL_SIZE;
+ }
+
+ if (!slice)
+ addr += PRUETH_NUM_BUF_POOLS * PRUETH_EMAC_BUF_POOL_SIZE;
+ else
+ addr += PRUETH_EMAC_RX_CTX_BUF_SIZE * 2;
+
+ rxq_ctx = (struct icssg_rxq_ctx *)(prueth->dram[priv->port_id].pa + HOST_RX_Q_PRE_CONTEXT_OFFSET);
+
+ for (i = 0; i < 3; i++)
+ rxq_ctx->start[i] = cpu_to_le32(addr);
+
+ addr += PRUETH_EMAC_RX_CTX_BUF_SIZE;
+ rxq_ctx->end = cpu_to_le32(addr);
+
+ /* Express RX buffer queue */
+ rxq_ctx = (struct icssg_rxq_ctx *)(prueth->dram[priv->port_id].pa + HOST_RX_Q_EXP_CONTEXT_OFFSET);
+ for (i = 0; i < 3; i++)
+ rxq_ctx->start[i] = cpu_to_le32(addr);
+
+ addr += PRUETH_EMAC_RX_CTX_BUF_SIZE;
+ rxq_ctx->end = cpu_to_le32(addr);
+
+ return 0;
+}
+
+static void icssg_init_emac_mode(struct prueth *prueth)
+{
+ u8 mac[6] = { 0 };
+
+ regmap_update_bits(prueth->miig_rt, FDB_GEN_CFG1, SMEM_VLAN_OFFSET_MASK, 0);
+ regmap_write(prueth->miig_rt, FDB_GEN_CFG2, 0);
+ /* Clear host MAC address */
+ icssg_class_set_host_mac_addr(prueth->miig_rt, mac);
+}
+
+int icssg_config(struct prueth_priv *priv)
+{
+ struct prueth *prueth = priv->prueth;
+ void *config = (void *)(prueth->dram[priv->port_id].pa + ICSSG_CONFIG_OFFSET);
+ u8 *cfg_byte_ptr = config;
+ struct icssg_flow_cfg *flow_cfg;
+ u32 mask;
+ int ret;
+
+ int slice = priv->port_id;
+
+ icssg_init_emac_mode(prueth);
+
+ memset_io(config, 0, TAS_GATE_MASK_LIST0);
+ icssg_miig_queues_init(priv, slice);
+
+ prueth->speed = SPEED_1000;
+ prueth->duplex = DUPLEX_FULL;
+ if (!phy_interface_is_rgmii(priv->phydev)) {
+ prueth->speed = SPEED_100;
+ prueth->duplex = DUPLEX_FULL;
+ }
+
+ regmap_update_bits(prueth->miig_rt, ICSSG_CFG_OFFSET,
+ ICSSG_CFG_DEFAULT, ICSSG_CFG_DEFAULT);
+ icssg_miig_set_interface_mode(prueth->miig_rt, ICSS_MII0, prueth->phy_interface);
+ icssg_miig_set_interface_mode(prueth->miig_rt, ICSS_MII1, prueth->phy_interface);
+ icssg_config_mii_init(priv, slice);
+
+ icssg_config_ipg(priv, SPEED_1000, slice);
+ icssg_update_rgmii_cfg(prueth->miig_rt, SPEED_1000, true, slice, priv);
+
+ /* set GPI mode */
+ pruss_cfg_gpimode(prueth->pruss, slice, PRUSS_GPI_MODE_MII);
+
+ /* enable XFR shift for PRU and RTU */
+ mask = PRUSS_SPP_XFER_SHIFT_EN | PRUSS_SPP_RTU_XFR_SHIFT_EN;
+ pruss_cfg_update(prueth->pruss, PRUSS_CFG_SPP, mask, mask);
+
+ flow_cfg = config + PSI_L_REGULAR_FLOW_ID_BASE_OFFSET;
+ flow_cfg->rx_base_flow = prueth->dma_rx.id;
+ flow_cfg->mgm_base_flow = 0;
+ *(cfg_byte_ptr + SPL_PKT_DEFAULT_PRIORITY) = 0;
+ *(cfg_byte_ptr + QUEUE_NUM_UNTAGGED) = 0x0;
+
+ ret = prueth_emac_buffer_setup(priv);
+
+ if (ret)
+ return ret;
+
+ emac_r30_cmd_init(priv);
+ return 0;
+}
+
+/* commands to program ICSSG R30 registers */
+static struct icssg_r30_cmd emac_r32_bitmask[] = {
+ {{0xffff0004, 0xffff0100, 0xffff0004, EMAC_NONE}}, /* EMAC_PORT_DISABLE */
+ {{0xfffb0040, 0xfeff0200, 0xfeff0200, EMAC_NONE}}, /* EMAC_PORT_BLOCK */
+ {{0xffbb0000, 0xfcff0000, 0xdcfb0000, EMAC_NONE}}, /* EMAC_PORT_FORWARD */
+ {{0xffbb0000, 0xfcff0000, 0xfcff2000, EMAC_NONE}}, /* EMAC_PORT_FORWARD_WO_LEARNING */
+ {{0xffff0001, EMAC_NONE, EMAC_NONE, EMAC_NONE}}, /* ACCEPT ALL */
+ {{0xfffe0002, EMAC_NONE, EMAC_NONE, EMAC_NONE}}, /* ACCEPT TAGGED */
+ {{0xfffc0000, EMAC_NONE, EMAC_NONE, EMAC_NONE}}, /* ACCEPT UNTAGGED and PRIO */
+ {{EMAC_NONE, 0xffff0020, EMAC_NONE, EMAC_NONE}}, /* TAS Trigger List change */
+ {{EMAC_NONE, 0xdfff1000, EMAC_NONE, EMAC_NONE}}, /* TAS set state ENABLE*/
+ {{EMAC_NONE, 0xefff2000, EMAC_NONE, EMAC_NONE}}, /* TAS set state RESET*/
+ {{EMAC_NONE, 0xcfff0000, EMAC_NONE, EMAC_NONE}}, /* TAS set state DISABLE*/
+ {{EMAC_NONE, EMAC_NONE, 0xffff0400, EMAC_NONE}}, /* UC flooding ENABLE*/
+ {{EMAC_NONE, EMAC_NONE, 0xfbff0000, EMAC_NONE}}, /* UC flooding DISABLE*/
+ {{EMAC_NONE, EMAC_NONE, 0xffff0800, EMAC_NONE}}, /* MC flooding ENABLE*/
+ {{EMAC_NONE, EMAC_NONE, 0xf7ff0000, EMAC_NONE}}, /* MC flooding DISABLE*/
+ {{EMAC_NONE, 0xffff4000, EMAC_NONE, EMAC_NONE}}, /* Preemption on Tx ENABLE*/
+ {{EMAC_NONE, 0xbfff0000, EMAC_NONE, EMAC_NONE}} /* Preemption on Tx DISABLE*/
+};
+
+int emac_set_port_state(struct prueth_priv *priv,
+ enum icssg_port_state_cmd cmd)
+{
+ struct prueth *prueth = priv->prueth;
+ struct icssg_r30_cmd *p;
+ int ret = -ETIMEDOUT;
+ int timeout = 10;
+ int i;
+
+ p = (struct icssg_r30_cmd *)(prueth->dram[priv->port_id].pa + MGR_R30_CMD_OFFSET);
+
+ if (cmd >= ICSSG_EMAC_PORT_MAX_COMMANDS) {
+ dev_err(prueth->dev, "invalid port command\n");
+ return -EINVAL;
+ }
+
+ for (i = 0; i < 4; i++)
+ writel(emac_r32_bitmask[cmd].cmd[i], &p->cmd[i]);
+
+ /* wait for done */
+ while (timeout) {
+ if (emac_r30_is_done(priv)) {
+ ret = 0;
+ break;
+ }
+
+ udelay(2000);
+ timeout--;
+ }
+
+ if (ret == -ETIMEDOUT)
+ dev_err(prueth->dev, "timeout waiting for command done\n");
+
+ return ret;
+}
+
+int icssg_send_fdb_msg(struct prueth_priv *priv, struct mgmt_cmd *cmd,
+ struct mgmt_cmd_rsp *rsp)
+{
+ struct prueth *prueth = priv->prueth;
+ int slice = priv->port_id;
+ int ret, addr;
+
+ addr = icssg_queue_pop(prueth, slice == 0 ?
+ ICSSG_CMD_POP_SLICE0 : ICSSG_CMD_POP_SLICE1);
+ if (addr < 0)
+ return addr;
+
+ /* First 4 bytes have FW owned buffer linking info which should
+ * not be touched
+ */
+ memcpy_toio((void __iomem *)prueth->shram.pa + addr + 4, cmd, sizeof(*cmd));
+ icssg_queue_push(prueth, slice == 0 ?
+ ICSSG_CMD_PUSH_SLICE0 : ICSSG_CMD_PUSH_SLICE1, addr);
+ ret = read_poll_timeout(icssg_queue_pop, addr, addr >= 0,
+ 2000, 20000000, prueth, slice == 0 ?
+ ICSSG_RSP_POP_SLICE0 : ICSSG_RSP_POP_SLICE1);
+
+ if (ret) {
+ dev_err(prueth->dev, "Timedout sending HWQ message\n");
+ return ret;
+ }
+
+ memcpy_fromio(rsp, (void __iomem *)prueth->shram.pa + addr, sizeof(*rsp));
+ /* Return buffer back for to pool */
+ icssg_queue_push(prueth, slice == 0 ?
+ ICSSG_RSP_PUSH_SLICE0 : ICSSG_RSP_PUSH_SLICE1, addr);
+
+ return 0;
+}
+
+int emac_fdb_flow_id_updated(struct prueth_priv *priv)
+{
+ struct mgmt_cmd_rsp fdb_cmd_rsp = { 0 };
+ struct prueth *prueth = priv->prueth;
+ struct mgmt_cmd fdb_cmd = { 0 };
+ int slice = priv->port_id;
+ int ret = 0;
+
+ fdb_cmd.header = ICSSG_FW_MGMT_CMD_HEADER;
+ fdb_cmd.type = ICSSG_FW_MGMT_FDB_CMD_TYPE_RX_FLOW;
+ fdb_cmd.seqnum = ++(prueth->icssg_hwcmdseq);
+ fdb_cmd.param = 0;
+
+ fdb_cmd.param |= (slice << 4);
+ fdb_cmd.cmd_args[0] = 0;
+
+ ret = icssg_send_fdb_msg(priv, &fdb_cmd, &fdb_cmd_rsp);
+ if (ret)
+ return ret;
+
+ if (fdb_cmd.seqnum != fdb_cmd_rsp.seqnum) {
+ dev_err(prueth->dev, "seqnum doesn't match, cmd.seqnum %d != rsp.seqnum %d\n",
+ fdb_cmd.seqnum, fdb_cmd_rsp.seqnum);
+ return -EINVAL;
+ }
+
+ if (fdb_cmd_rsp.status == 1)
+ return 0;
+
+ return -EINVAL;
+}
diff --git a/drivers/net/ti/icssg_config.h b/drivers/net/ti/icssg_config.h
new file mode 100644
index 0000000..d388484
--- /dev/null
+++ b/drivers/net/ti/icssg_config.h
@@ -0,0 +1,195 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/* Texas Instruments ICSSG Ethernet driver
+ *
+ * Copyright (C) 2018-2024 Texas Instruments Incorporated - https://www.ti.com/
+ *
+ */
+
+#ifndef __NET_TI_ICSSG_CONFIG_H
+#define __NET_TI_ICSSG_CONFIG_H
+
+struct icssg_buffer_pool_cfg {
+ __le32 addr;
+ __le32 len;
+} __packed;
+
+struct icssg_flow_cfg {
+ __le16 rx_base_flow;
+ __le16 mgm_base_flow;
+} __packed;
+
+/* Config area lies in shared RAM */
+#define ICSSG_CONFIG_OFFSET_SLICE0 0
+#define ICSSG_CONFIG_OFFSET_SLICE1 0x8000
+
+/* pstate speed/duplex command to set speed and duplex settings
+ * in firmware.
+ * Command format : 0x8102ssPN. ss - sequence number: currently not
+ * used by driver, P - port number: For switch, N - Speed/Duplex state
+ * - Possible values of N:
+ * 0x0 - 10Mbps/Half duplex ;
+ * 0x8 - 10Mbps/Full duplex ;
+ * 0x2 - 100Mbps/Half duplex;
+ * 0xa - 100Mbps/Full duplex;
+ * 0xc - 1Gbps/Full duplex;
+ * NOTE: The above are same as bits [3..1](slice 0) or bits [8..6](slice 1) of
+ * RGMII CFG register. So suggested to read the register to populate the command
+ * bits.
+ */
+#define ICSSG_PSTATE_SPEED_DUPLEX_CMD 0x81020000
+#define ICSSG_PSTATE_FULL_DUPLEX BIT(3)
+#define ICSSG_PSTATE_SPEED_100 BIT(1)
+#define ICSSG_PSTATE_SPEED_1000 BIT(2)
+
+/* Flow IDs used in config structure to firmware. Should match with
+ * flow_id in struct dma for rx channels.
+ */
+#define ICSSG_RX_CHAN_FLOW_ID 0 /* flow id for host port */
+#define ICSSG_RX_MGM_CHAN_FLOW_ID 1 /* flow id for command response */
+
+/* Used to notify the FW of the current link speed */
+#define PORT_LINK_SPEED_OFFSET 0x00A8
+
+#define FW_LINK_SPEED_1G (0x00)
+#define FW_LINK_SPEED_100M (0x01)
+#define FW_LINK_SPEED_10M (0x02)
+#define FW_LINK_SPEED_HD (0x80)
+
+#define PRUETH_PKT_TYPE_CMD 0x10
+#define PRUETH_NAV_PS_DATA_SIZE 16 /* Protocol specific data size */
+#define PRUETH_NAV_SW_DATA_SIZE 16 /* SW related data size */
+#define PRUETH_MAX_RX_FLOWS 1 /* excluding default flow */
+#define PRUETH_RX_FLOW_DATA 0 /* FIXME: f/w bug to change to highest priority flow */
+
+#define PRUETH_EMAC_BUF_POOL_SIZE SZ_8K
+#define PRUETH_EMAC_POOLS_PER_SLICE 24
+#define PRUETH_EMAC_BUF_POOL_START 8
+#define PRUETH_NUM_BUF_POOLS 8
+#define PRUETH_EMAC_RX_CTX_BUF_SIZE SZ_16K /* per slice */
+#define MSMC_RAM_SIZE (2 * (PRUETH_EMAC_BUF_POOL_SIZE * PRUETH_NUM_BUF_POOLS + \
+ PRUETH_EMAC_RX_CTX_BUF_SIZE))
+
+struct icssg_rxq_ctx {
+ __le32 start[3];
+ __le32 end;
+} __packed;
+
+/* Load time Fiwmware Configuration */
+
+#define ICSSG_FW_MGMT_CMD_HEADER 0x81
+#define ICSSG_FW_MGMT_FDB_CMD_TYPE 0x03
+#define ICSSG_FW_MGMT_CMD_TYPE 0x04
+#define ICSSG_FW_MGMT_PKT 0x80000000
+#define ICSSG_FW_MGMT_FDB_CMD_TYPE_RX_FLOW 0x05
+
+struct icssg_r30_cmd {
+ u32 cmd[4];
+} __packed;
+
+enum icssg_port_state_cmd {
+ ICSSG_EMAC_PORT_DISABLE = 0,
+ ICSSG_EMAC_PORT_BLOCK,
+ ICSSG_EMAC_PORT_FORWARD,
+ ICSSG_EMAC_PORT_FORWARD_WO_LEARNING,
+ ICSSG_EMAC_PORT_ACCEPT_ALL,
+ ICSSG_EMAC_PORT_ACCEPT_TAGGED,
+ ICSSG_EMAC_PORT_ACCEPT_UNTAGGED_N_PRIO,
+ ICSSG_EMAC_PORT_TAS_TRIGGER,
+ ICSSG_EMAC_PORT_TAS_ENABLE,
+ ICSSG_EMAC_PORT_TAS_RESET,
+ ICSSG_EMAC_PORT_TAS_DISABLE,
+ ICSSG_EMAC_PORT_UC_FLOODING_ENABLE,
+ ICSSG_EMAC_PORT_UC_FLOODING_DISABLE,
+ ICSSG_EMAC_PORT_MC_FLOODING_ENABLE,
+ ICSSG_EMAC_PORT_MC_FLOODING_DISABLE,
+ ICSSG_EMAC_PORT_PREMPT_TX_ENABLE,
+ ICSSG_EMAC_PORT_PREMPT_TX_DISABLE,
+ ICSSG_EMAC_PORT_MAX_COMMANDS
+};
+
+#define EMAC_NONE 0xffff0000
+#define EMAC_PRU0_P_DI 0xffff0004
+#define EMAC_PRU1_P_DI 0xffff0040
+#define EMAC_TX_P_DI 0xffff0100
+
+#define EMAC_PRU0_P_EN 0xfffb0000
+#define EMAC_PRU1_P_EN 0xffbf0000
+#define EMAC_TX_P_EN 0xfeff0000
+
+#define EMAC_P_BLOCK 0xffff0040
+#define EMAC_TX_P_BLOCK 0xffff0200
+#define EMAC_P_UNBLOCK 0xffbf0000
+#define EMAC_TX_P_UNBLOCK 0xfdff0000
+#define EMAC_LEAN_EN 0xfff70000
+#define EMAC_LEAN_DI 0xffff0008
+
+#define EMAC_ACCEPT_ALL 0xffff0001
+#define EMAC_ACCEPT_TAG 0xfffe0002
+#define EMAC_ACCEPT_PRIOR 0xfffc0000
+
+/* Config area lies in DRAM */
+#define ICSSG_CONFIG_OFFSET 0x0
+
+#define ICSSG_NUM_NORMAL_PDS 64
+#define ICSSG_NUM_SPECIAL_PDS 16
+
+#define ICSSG_NORMAL_PD_SIZE 8
+#define ICSSG_SPECIAL_PD_SIZE 20
+
+#define ICSSG_FLAG_MASK 0xff00ffff
+
+struct icssg_setclock_desc {
+ u8 request;
+ u8 restore;
+ u8 acknowledgment;
+ u8 cmp_status;
+ u32 margin;
+ u32 cyclecounter0_set;
+ u32 cyclecounter1_set;
+ u32 iepcount_set;
+ u32 rsvd1;
+ u32 rsvd2;
+ u32 CMP0_current;
+ u32 iepcount_current;
+ u32 difference;
+ u32 cyclecounter0_new;
+ u32 cyclecounter1_new;
+ u32 CMP0_new;
+} __packed;
+
+struct mgmt_cmd {
+ u8 param;
+ u8 seqnum;
+ u8 type;
+ u8 header;
+ u32 cmd_args[3];
+} __packed;
+
+struct mgmt_cmd_rsp {
+ u32 reserved;
+ u8 status;
+ u8 seqnum;
+ u8 type;
+ u8 header;
+ u32 cmd_args[3];
+} __packed;
+
+#define ICSSG_CMD_POP_SLICE0 56
+#define ICSSG_CMD_POP_SLICE1 60
+
+#define ICSSG_CMD_PUSH_SLICE0 57
+#define ICSSG_CMD_PUSH_SLICE1 61
+
+#define ICSSG_RSP_POP_SLICE0 58
+#define ICSSG_RSP_POP_SLICE1 62
+
+#define ICSSG_RSP_PUSH_SLICE0 56
+#define ICSSG_RSP_PUSH_SLICE1 60
+
+#define ICSSG_TS_POP_SLICE0 59
+#define ICSSG_TS_POP_SLICE1 63
+
+#define ICSSG_TS_PUSH_SLICE0 40
+#define ICSSG_TS_PUSH_SLICE1 41
+
+#endif /* __NET_TI_ICSSG_CONFIG_H */
diff --git a/drivers/net/ti/icssg_prueth.c b/drivers/net/ti/icssg_prueth.c
new file mode 100644
index 0000000..2639f96
--- /dev/null
+++ b/drivers/net/ti/icssg_prueth.c
@@ -0,0 +1,691 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Texas Instruments K3 AM65 PRU Ethernet Driver
+ *
+ * Copyright (C) 2018-2024 Texas Instruments Incorporated - https://www.ti.com/
+ *
+ */
+
+#include <asm/io.h>
+#include <asm/processor.h>
+#include <clk.h>
+#include <dm/lists.h>
+#include <dm/device.h>
+#include <dma-uclass.h>
+#include <dm/of_access.h>
+#include <dm/pinctrl.h>
+#include <fs_loader.h>
+#include <miiphy.h>
+#include <net.h>
+#include <phy.h>
+#include <power-domain.h>
+#include <linux/soc/ti/ti-udma.h>
+#include <regmap.h>
+#include <remoteproc.h>
+#include <syscon.h>
+#include <soc.h>
+#include <linux/pruss_driver.h>
+#include <dm/device_compat.h>
+
+#include "icssg_prueth.h"
+#include "icss_mii_rt.h"
+
+#define ICSS_SLICE0 0
+#define ICSS_SLICE1 1
+
+#ifdef PKTSIZE_ALIGN
+#define UDMA_RX_BUF_SIZE PKTSIZE_ALIGN
+#else
+#define UDMA_RX_BUF_SIZE ALIGN(PKTSIZE, ARCH_DMA_MINALIGN)
+#endif
+
+#ifdef PKTBUFSRX
+#define UDMA_RX_DESC_NUM PKTBUFSRX
+#else
+#define UDMA_RX_DESC_NUM 4
+#endif
+
+/* Config region lies in shared RAM */
+#define ICSS_CONFIG_OFFSET_SLICE0 0
+#define ICSS_CONFIG_OFFSET_SLICE1 0x8000
+
+/* Firmware flags */
+#define ICSS_SET_RUN_FLAG_VLAN_ENABLE BIT(0) /* switch only */
+#define ICSS_SET_RUN_FLAG_FLOOD_UNICAST BIT(1) /* switch only */
+#define ICSS_SET_RUN_FLAG_PROMISC BIT(2) /* MAC only */
+#define ICSS_SET_RUN_FLAG_MULTICAST_PROMISC BIT(3) /* MAC only */
+
+/* CTRLMMR_ICSSG_RGMII_CTRL register bits */
+#define ICSSG_CTRL_RGMII_ID_MODE BIT(24)
+
+/* Management packet type */
+#define PRUETH_PKT_TYPE_CMD 0x10
+
+/* Number of PRU Cores per Slice */
+#define ICSSG_NUM_PRU_CORES 3
+
+static int icssg_gmii_select(struct prueth_priv *priv)
+{
+ struct phy_device *phydev = priv->phydev;
+
+ if (phydev->interface != PHY_INTERFACE_MODE_MII &&
+ phydev->interface < PHY_INTERFACE_MODE_RGMII &&
+ phydev->interface > PHY_INTERFACE_MODE_RGMII_TXID) {
+ dev_err(priv->dev, "PHY mode unsupported %s\n",
+ phy_string_for_interface(phydev->interface));
+ return -EINVAL;
+ }
+
+ /* AM65 SR2.0 has TX Internal delay always enabled by hardware
+ * and it is not possible to disable TX Internal delay. The below
+ * switch case block describes how we handle different phy modes
+ * based on hardware restriction.
+ */
+ switch (phydev->interface) {
+ case PHY_INTERFACE_MODE_RGMII_ID:
+ phydev->interface = PHY_INTERFACE_MODE_RGMII_RXID;
+ break;
+ case PHY_INTERFACE_MODE_RGMII_TXID:
+ phydev->interface = PHY_INTERFACE_MODE_RGMII;
+ break;
+ case PHY_INTERFACE_MODE_RGMII:
+ case PHY_INTERFACE_MODE_RGMII_RXID:
+ dev_err(priv->dev, "RGMII mode without TX delay is not supported");
+ return -EINVAL;
+ default:
+ break;
+ }
+
+ return 0;
+}
+
+static int icssg_phy_init(struct udevice *dev)
+{
+ struct prueth_priv *priv = dev_get_priv(dev);
+ struct phy_device *phydev;
+ u32 supported = PHY_GBIT_FEATURES;
+ int ret;
+
+ phydev = dm_eth_phy_connect(dev);
+ if (!phydev) {
+ dev_err(dev, "phy_connect() failed\n");
+ return -ENODEV;
+ }
+
+ /* disable unsupported features */
+ supported &= ~(PHY_10BT_FEATURES |
+ SUPPORTED_100baseT_Half |
+ SUPPORTED_1000baseT_Half |
+ SUPPORTED_Pause |
+ SUPPORTED_Asym_Pause);
+
+ phydev->supported &= supported;
+ phydev->advertising = phydev->supported;
+ priv->phydev = phydev;
+
+ ret = icssg_gmii_select(priv);
+ if (ret)
+ goto out;
+
+ ret = phy_config(phydev);
+ if (ret < 0)
+ dev_err(dev, "phy_config() failed: %d", ret);
+out:
+ return ret;
+}
+
+static void icssg_config_set_speed(struct prueth_priv *priv, int speed)
+{
+ struct prueth *prueth = priv->prueth;
+ u8 fw_speed;
+
+ switch (speed) {
+ case SPEED_1000:
+ fw_speed = FW_LINK_SPEED_1G;
+ break;
+ case SPEED_100:
+ fw_speed = FW_LINK_SPEED_100M;
+ break;
+ case SPEED_10:
+ fw_speed = FW_LINK_SPEED_10M;
+ break;
+ default:
+ /* Other links speeds not supported */
+ dev_err(priv->dev, "Unsupported link speed\n");
+ return;
+ }
+
+ writeb(fw_speed, prueth->dram[priv->port_id].pa + PORT_LINK_SPEED_OFFSET);
+}
+
+static int icssg_update_link(struct prueth_priv *priv)
+{
+ struct phy_device *phy = priv->phydev;
+ struct prueth *prueth = priv->prueth;
+ bool gig_en = false, full_duplex = false;
+
+ if (phy->link) { /* link up */
+ if (phy->speed == SPEED_1000)
+ gig_en = true;
+ if (phy->duplex == DUPLEX_FULL)
+ full_duplex = true;
+ /* Set the RGMII cfg for gig en and full duplex */
+ icssg_update_rgmii_cfg(prueth->miig_rt, phy->speed, full_duplex,
+ priv->port_id, priv);
+ /* update the Tx IPG based on 100M/1G speed */
+ icssg_config_ipg(priv, phy->speed, priv->port_id);
+
+ /* Send command to firmware to update Speed setting */
+ icssg_config_set_speed(priv, phy->speed);
+
+ /* Enable PORT FORWARDING */
+ emac_set_port_state(priv, ICSSG_EMAC_PORT_FORWARD);
+
+ printf("link up on port %d, speed %d, %s duplex\n",
+ priv->port_id, phy->speed,
+ (phy->duplex == DUPLEX_FULL) ? "full" : "half");
+ } else {
+ emac_set_port_state(priv, ICSSG_EMAC_PORT_DISABLE);
+ printf("link down on port %d\n", priv->port_id);
+ }
+
+ return phy->link;
+}
+
+struct icssg_firmwares {
+ char *pru;
+ char *rtu;
+ char *txpru;
+};
+
+static struct icssg_firmwares icssg_emac_firmwares[] = {
+ {
+ .pru = "/lib/firmware/ti-pruss/am65x-sr2-pru0-prueth-fw.elf",
+ .rtu = "/lib/firmware/ti-pruss/am65x-sr2-rtu0-prueth-fw.elf",
+ .txpru = "/lib/firmware/ti-pruss/am65x-sr2-txpru0-prueth-fw.elf",
+ },
+ {
+ .pru = "/lib/firmware/ti-pruss/am65x-sr2-pru1-prueth-fw.elf",
+ .rtu = "/lib/firmware/ti-pruss/am65x-sr2-rtu1-prueth-fw.elf",
+ .txpru = "/lib/firmware/ti-pruss/am65x-sr2-txpru1-prueth-fw.elf",
+ }
+};
+
+static int icssg_start_pru_cores(struct udevice *dev)
+{
+ struct prueth_priv *priv = dev_get_priv(dev);
+ struct prueth *prueth = priv->prueth;
+ struct icssg_firmwares *firmwares;
+ struct udevice *rproc_dev = NULL;
+ int ret, slice;
+ u32 phandle;
+ u8 index;
+
+ slice = priv->port_id;
+ index = slice * ICSSG_NUM_PRU_CORES;
+ firmwares = icssg_emac_firmwares;
+
+ ofnode_read_u32_index(dev_ofnode(prueth->dev), "ti,prus", index, &phandle);
+ ret = uclass_get_device_by_phandle_id(UCLASS_REMOTEPROC, phandle, &rproc_dev);
+ if (ret) {
+ dev_err(dev, "Unknown remote processor with phandle '0x%x' requested(%d)\n",
+ phandle, ret);
+ return ret;
+ }
+
+ prueth->pru_core_id = dev_seq(rproc_dev);
+ ret = rproc_set_firmware(rproc_dev, firmwares[slice].pru);
+ if (ret)
+ return ret;
+
+ ret = rproc_boot(rproc_dev);
+ if (ret) {
+ dev_err(dev, "failed to boot PRU%d: %d\n", slice, ret);
+ return -EINVAL;
+ }
+
+ ofnode_read_u32_index(dev_ofnode(prueth->dev), "ti,prus", index + 1, &phandle);
+ ret = uclass_get_device_by_phandle_id(UCLASS_REMOTEPROC, phandle, &rproc_dev);
+ if (ret) {
+ dev_err(dev, "Unknown remote processor with phandle '0x%x' requested(%d)\n",
+ phandle, ret);
+ goto halt_pru;
+ }
+
+ prueth->rtu_core_id = dev_seq(rproc_dev);
+ ret = rproc_set_firmware(rproc_dev, firmwares[slice].rtu);
+ if (ret)
+ goto halt_pru;
+
+ ret = rproc_boot(rproc_dev);
+ if (ret) {
+ dev_err(dev, "failed to boot RTU%d: %d\n", slice, ret);
+ goto halt_pru;
+ }
+
+ ofnode_read_u32_index(dev_ofnode(prueth->dev), "ti,prus", index + 2, &phandle);
+ ret = uclass_get_device_by_phandle_id(UCLASS_REMOTEPROC, phandle, &rproc_dev);
+ if (ret) {
+ dev_err(dev, "Unknown remote processor with phandle '0x%x' requested(%d)\n",
+ phandle, ret);
+ goto halt_rtu;
+ }
+
+ prueth->txpru_core_id = dev_seq(rproc_dev);
+ ret = rproc_set_firmware(rproc_dev, firmwares[slice].txpru);
+ if (ret)
+ goto halt_rtu;
+
+ ret = rproc_boot(rproc_dev);
+ if (ret) {
+ dev_err(dev, "failed to boot TXPRU%d: %d\n", slice, ret);
+ goto halt_rtu;
+ }
+
+ return 0;
+
+halt_rtu:
+ rproc_stop(prueth->rtu_core_id);
+
+halt_pru:
+ rproc_stop(prueth->pru_core_id);
+ return ret;
+}
+
+static int icssg_stop_pru_cores(struct udevice *dev)
+{
+ struct prueth_priv *priv = dev_get_priv(dev);
+ struct prueth *prueth = priv->prueth;
+
+ rproc_stop(prueth->pru_core_id);
+ rproc_stop(prueth->rtu_core_id);
+ rproc_stop(prueth->txpru_core_id);
+
+ return 0;
+}
+
+static int prueth_start(struct udevice *dev)
+{
+ struct ti_udma_drv_chan_cfg_data *dma_rx_cfg_data;
+ struct eth_pdata *pdata = dev_get_plat(dev);
+ struct prueth_priv *priv = dev_get_priv(dev);
+ struct prueth *prueth = priv->prueth;
+ struct icssg_flow_cfg *flow_cfg;
+ u8 *hwaddr = pdata->enetaddr;
+ char chn_name[16];
+ void *config;
+ int ret, i;
+
+ icssg_class_set_mac_addr(prueth->miig_rt, priv->port_id, hwaddr);
+ icssg_ft1_set_mac_addr(prueth->miig_rt, priv->port_id, hwaddr);
+ icssg_class_default(prueth->miig_rt, priv->port_id, 0);
+
+ /* Set Load time configuration */
+ icssg_config(priv);
+
+ ret = icssg_start_pru_cores(dev);
+ if (ret)
+ return ret;
+
+ /* To differentiate channels for SLICE0 vs SLICE1 */
+ snprintf(chn_name, sizeof(chn_name), "tx%d-0", priv->port_id);
+
+ ret = dma_get_by_name(prueth->dev, chn_name, &prueth->dma_tx);
+ if (ret)
+ dev_err(dev, "TX dma get failed %d\n", ret);
+
+ snprintf(chn_name, sizeof(chn_name), "rx%d", priv->port_id);
+ ret = dma_get_by_name(prueth->dev, chn_name, &prueth->dma_rx);
+ if (ret)
+ dev_err(dev, "RX dma get failed %d\n", ret);
+
+ for (i = 0; i < UDMA_RX_DESC_NUM; i++) {
+ ret = dma_prepare_rcv_buf(&prueth->dma_rx,
+ net_rx_packets[i],
+ UDMA_RX_BUF_SIZE);
+ if (ret)
+ dev_err(dev, "RX dma add buf failed %d\n", ret);
+ }
+
+ ret = dma_enable(&prueth->dma_tx);
+ if (ret) {
+ dev_err(dev, "TX dma_enable failed %d\n", ret);
+ goto tx_fail;
+ }
+
+ ret = dma_enable(&prueth->dma_rx);
+ if (ret) {
+ dev_err(dev, "RX dma_enable failed %d\n", ret);
+ goto rx_fail;
+ }
+
+ /* check if the rx_flow_id of dma_rx is as expected since
+ * driver hardcode that value in config struct to firmware
+ * in probe. Just add this sanity check to catch any change
+ * to rx channel assignment in the future.
+ */
+ dma_get_cfg(&prueth->dma_rx, 0, (void **)&dma_rx_cfg_data);
+ config = (void *)(prueth->dram[priv->port_id].pa + ICSSG_CONFIG_OFFSET);
+
+ flow_cfg = config + PSI_L_REGULAR_FLOW_ID_BASE_OFFSET;
+ writew(dma_rx_cfg_data->flow_id_base, &flow_cfg->rx_base_flow);
+ writew(0, &flow_cfg->mgm_base_flow);
+
+ dev_info(dev, "K3 ICSSG: rflow_id_base: %u, chn_name = %s\n",
+ dma_rx_cfg_data->flow_id_base, chn_name);
+
+ ret = emac_fdb_flow_id_updated(priv);
+ if (ret) {
+ dev_err(dev, "Failed to update Rx Flow ID %d", ret);
+ goto phy_fail;
+ }
+
+ ret = phy_startup(priv->phydev);
+ if (ret) {
+ dev_err(dev, "phy_startup failed\n");
+ goto phy_fail;
+ }
+
+ ret = icssg_update_link(priv);
+ if (!ret) {
+ ret = -ENODEV;
+ goto phy_shut;
+ }
+
+ return 0;
+
+phy_shut:
+ phy_shutdown(priv->phydev);
+phy_fail:
+ dma_disable(&prueth->dma_rx);
+ dma_free(&prueth->dma_rx);
+rx_fail:
+ dma_disable(&prueth->dma_tx);
+ dma_free(&prueth->dma_tx);
+
+tx_fail:
+ icssg_class_disable(prueth->miig_rt, priv->port_id);
+
+ return ret;
+}
+
+static int prueth_send(struct udevice *dev, void *packet, int length)
+{
+ struct prueth_priv *priv = dev_get_priv(dev);
+ struct prueth *prueth = priv->prueth;
+ int ret;
+
+ ret = dma_send(&prueth->dma_tx, packet, length, NULL);
+
+ return ret;
+}
+
+static int prueth_recv(struct udevice *dev, int flags, uchar **packetp)
+{
+ struct prueth_priv *priv = dev_get_priv(dev);
+ struct prueth *prueth = priv->prueth;
+ int ret;
+
+ /* try to receive a new packet */
+ ret = dma_receive(&prueth->dma_rx, (void **)packetp, NULL);
+
+ return ret;
+}
+
+static int prueth_free_pkt(struct udevice *dev, uchar *packet, int length)
+{
+ struct prueth_priv *priv = dev_get_priv(dev);
+ struct prueth *prueth = priv->prueth;
+ int ret = 0;
+
+ if (length > 0) {
+ u32 pkt = prueth->rx_next % UDMA_RX_DESC_NUM;
+
+ dev_dbg(dev, "%s length:%d pkt:%u\n", __func__, length, pkt);
+
+ ret = dma_prepare_rcv_buf(&prueth->dma_rx,
+ net_rx_packets[pkt],
+ UDMA_RX_BUF_SIZE);
+ prueth->rx_next++;
+ }
+
+ return ret;
+}
+
+static void prueth_stop(struct udevice *dev)
+{
+ struct prueth_priv *priv = dev_get_priv(dev);
+ struct prueth *prueth = priv->prueth;
+
+ phy_shutdown(priv->phydev);
+
+ dma_disable(&prueth->dma_tx);
+ dma_disable(&prueth->dma_rx);
+
+ icssg_stop_pru_cores(dev);
+
+ dma_free(&prueth->dma_tx);
+ dma_free(&prueth->dma_rx);
+}
+
+static const struct eth_ops prueth_ops = {
+ .start = prueth_start,
+ .send = prueth_send,
+ .recv = prueth_recv,
+ .free_pkt = prueth_free_pkt,
+ .stop = prueth_stop,
+};
+
+static int icssg_ofdata_parse_phy(struct udevice *dev)
+{
+ struct prueth_priv *priv = dev_get_priv(dev);
+
+ dev_read_u32(dev, "reg", &priv->port_id);
+ priv->phy_interface = dev_read_phy_mode(dev);
+ if (priv->phy_interface == PHY_INTERFACE_MODE_NA) {
+ dev_err(dev, "Invalid PHY mode '%s', port %u\n",
+ phy_string_for_interface(priv->phy_interface),
+ priv->port_id);
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static int prueth_port_probe(struct udevice *dev)
+{
+ struct prueth_priv *priv = dev_get_priv(dev);
+ struct prueth *prueth;
+ char portname[15];
+ int ret;
+
+ priv->dev = dev;
+ prueth = dev_get_priv(dev->parent);
+ priv->prueth = prueth;
+
+ sprintf(portname, "%s-%s", dev->parent->name, dev->name);
+
+ device_set_name(dev, portname);
+
+ ret = icssg_ofdata_parse_phy(dev);
+ if (ret)
+ goto out;
+
+ ret = icssg_phy_init(dev);
+ if (ret)
+ goto out;
+
+ ret = pruss_request_mem_region(prueth->pruss,
+ priv->port_id ? PRUSS_MEM_DRAM1 : PRUSS_MEM_DRAM0,
+ &prueth->dram[priv->port_id]);
+ if (ret) {
+ dev_err(dev, "could not request DRAM%d region\n", priv->port_id);
+ return ret;
+ }
+out:
+ return ret;
+}
+
+static int prueth_probe(struct udevice *dev)
+{
+ ofnode node, pruss_node, mdio_node, sram_node, curr_sram_node;
+ struct prueth *prueth = dev_get_priv(dev);
+ u32 phandle, err, sp, prev_end_addr;
+ struct udevice **prussdev = NULL;
+ ofnode eth_ports_node, eth_node;
+ struct udevice *port_dev;
+ int ret = 0;
+
+ prueth->dev = dev;
+
+ err = ofnode_read_u32(dev_ofnode(dev), "ti,prus", &phandle);
+ if (err)
+ return err;
+
+ node = ofnode_get_by_phandle(phandle);
+ if (!ofnode_valid(node))
+ return -EINVAL;
+
+ pruss_node = ofnode_get_parent(node);
+ ret = device_get_global_by_ofnode(pruss_node, prussdev);
+ if (ret)
+ dev_err(dev, "error getting the pruss dev\n");
+ prueth->pruss = *prussdev;
+
+ ret = pruss_request_mem_region(*prussdev, PRUSS_MEM_SHRD_RAM2,
+ &prueth->shram);
+ if (ret)
+ return ret;
+
+ ret = pruss_request_tm_region(*prussdev, &prueth->tmaddr);
+ if (ret)
+ return ret;
+
+ prueth->miig_rt = syscon_regmap_lookup_by_phandle(dev, "ti,mii-g-rt");
+ if (!prueth->miig_rt) {
+ dev_err(dev, "couldn't get mii-g-rt syscon regmap\n");
+ return -ENODEV;
+ }
+
+ prueth->mii_rt = syscon_regmap_lookup_by_phandle(dev, "ti,mii-rt");
+ if (!prueth->mii_rt) {
+ dev_err(dev, "couldn't get mii-rt syscon regmap\n");
+ return -ENODEV;
+ }
+
+ ret = ofnode_read_u32(dev_ofnode(dev), "sram", &sp);
+ if (ret) {
+ dev_err(dev, "sram node fetch failed %d\n", ret);
+ return ret;
+ }
+
+ sram_node = ofnode_get_by_phandle(sp);
+ if (!ofnode_valid(sram_node))
+ return -EINVAL;
+
+ prev_end_addr = ofnode_get_addr(sram_node);
+
+ ofnode_for_each_subnode(curr_sram_node, sram_node) {
+ u32 start_addr, size, end_addr, avail;
+ const char *name;
+
+ name = ofnode_get_name(curr_sram_node);
+ start_addr = ofnode_get_addr(curr_sram_node);
+ size = ofnode_get_size(curr_sram_node);
+ end_addr = start_addr + size;
+ avail = start_addr - prev_end_addr;
+
+ if (avail > MSMC_RAM_SIZE)
+ break;
+
+ prev_end_addr = end_addr;
+ }
+
+ prueth->sram_pa = prev_end_addr;
+ if (prueth->sram_pa % SZ_64K != 0) {
+ /* This is constraint for SR2.0 firmware */
+ dev_err(dev, "sram address needs to be 64KB aligned\n");
+ return -EINVAL;
+ }
+ dev_dbg(dev, "sram: addr %x size %x\n", prueth->sram_pa, MSMC_RAM_SIZE);
+
+ mdio_node = ofnode_find_subnode(pruss_node, "mdio");
+ prueth->mdio_base = ofnode_get_addr(mdio_node);
+ ofnode_read_u32(mdio_node, "bus_freq", &prueth->mdio_freq);
+
+ ret = clk_get_by_name_nodev(mdio_node, "fck", &prueth->mdiofck);
+ if (ret) {
+ dev_err(dev, "failed to get clock %d\n", ret);
+ return ret;
+ }
+
+ ret = clk_enable(&prueth->mdiofck);
+ if (ret) {
+ dev_err(dev, "clk_enable failed %d\n", ret);
+ return ret;
+ }
+
+ eth_ports_node = dev_read_subnode(dev, "ethernet-ports");
+ if (!ofnode_valid(eth_ports_node))
+ return -ENOENT;
+
+ ofnode_for_each_subnode(eth_node, eth_ports_node) {
+ const char *node_name;
+ u32 port_id;
+ bool disabled;
+
+ node_name = ofnode_get_name(eth_node);
+ disabled = !ofnode_is_enabled(eth_node);
+ ret = ofnode_read_u32(eth_node, "reg", &port_id);
+ if (ret)
+ dev_err(dev, "%s: error reading port_id (%d)\n", node_name, ret);
+
+ if (port_id >= PRUETH_NUM_MACS) {
+ dev_err(dev, "%s: invalid port_id (%d)\n", node_name, port_id);
+ return -EINVAL;
+ }
+
+ if (port_id < 0)
+ continue;
+ if (disabled)
+ continue;
+
+ ret = device_bind_driver_to_node(dev, "prueth_port",
+ ofnode_get_name(eth_node),
+ eth_node, &port_dev);
+ if (ret) {
+ dev_err(dev, "Failed to bind to %s node\n", ofnode_get_name(eth_node));
+ goto out;
+ }
+ }
+
+ return 0;
+out:
+ clk_disable(&prueth->mdiofck);
+
+ return ret;
+}
+
+static const struct udevice_id prueth_ids[] = {
+ { .compatible = "ti,am654-icssg-prueth" },
+ { .compatible = "ti,am642-icssg-prueth" },
+ { }
+};
+
+U_BOOT_DRIVER(prueth) = {
+ .name = "prueth",
+ .id = UCLASS_MISC,
+ .of_match = prueth_ids,
+ .probe = prueth_probe,
+ .priv_auto = sizeof(struct prueth),
+};
+
+U_BOOT_DRIVER(prueth_port) = {
+ .name = "prueth_port",
+ .id = UCLASS_ETH,
+ .probe = prueth_port_probe,
+ .ops = &prueth_ops,
+ .priv_auto = sizeof(struct prueth_priv),
+ .plat_auto = sizeof(struct eth_pdata),
+ .flags = DM_FLAG_ALLOC_PRIV_DMA,
+};
diff --git a/drivers/net/ti/icssg_prueth.h b/drivers/net/ti/icssg_prueth.h
new file mode 100644
index 0000000..c69cfd4
--- /dev/null
+++ b/drivers/net/ti/icssg_prueth.h
@@ -0,0 +1,97 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/* Texas Instruments K3 AM65 Ethernet Switch SubSystem Driver
+ *
+ * Copyright (C) 2018-2024 Texas Instruments Incorporated - https://www.ti.com/
+ *
+ */
+
+#ifndef __NET_TI_ICSSG_PRUETH_H
+#define __NET_TI_ICSSG_PRUETH_H
+
+#include <asm/io.h>
+#include <clk.h>
+#include <dm/lists.h>
+#include <dm/ofnode.h>
+#include <dm/device.h>
+#include <dma-uclass.h>
+#include <regmap.h>
+#include <linux/sizes.h>
+#include <linux/pruss_driver.h>
+#include "icssg_config.h"
+#include "icssg_switch_map.h"
+
+void icssg_class_set_mac_addr(struct regmap *miig_rt, int slice, u8 *mac);
+void icssg_class_set_host_mac_addr(struct regmap *miig_rt, u8 *mac);
+void icssg_class_disable(struct regmap *miig_rt, int slice);
+void icssg_class_default(struct regmap *miig_rt, int slice, bool allmulti);
+void icssg_ft1_set_mac_addr(struct regmap *miig_rt, int slice, u8 *mac_addr);
+
+enum prueth_mac {
+ PRUETH_MAC0 = 0,
+ PRUETH_MAC1,
+ PRUETH_NUM_MACS,
+};
+
+enum prueth_port {
+ PRUETH_PORT_HOST = 0, /* host side port */
+ PRUETH_PORT_MII0, /* physical port MII 0 */
+ PRUETH_PORT_MII1, /* physical port MII 1 */
+};
+
+struct prueth {
+ struct udevice *dev;
+ struct udevice *pruss;
+ struct regmap *miig_rt;
+ struct regmap *mii_rt;
+ fdt_addr_t mdio_base;
+ struct pruss_mem_region shram;
+ struct pruss_mem_region dram[PRUETH_NUM_MACS];
+ phys_addr_t tmaddr;
+ struct mii_dev *bus;
+ u32 sram_pa;
+ ofnode eth_node[PRUETH_NUM_MACS];
+ u32 mdio_freq;
+ int phy_interface;
+ struct clk mdiofck;
+ struct dma dma_tx;
+ struct dma dma_rx;
+ struct dma dma_rx_mgm;
+ u32 rx_next;
+ u32 rx_pend;
+ int slice;
+ bool mdio_manual_mode;
+ int speed;
+ int duplex;
+ u8 pru_core_id;
+ u8 rtu_core_id;
+ u8 txpru_core_id;
+ u8 icssg_hwcmdseq;
+};
+
+struct prueth_priv {
+ struct udevice *dev;
+ struct prueth *prueth;
+ u32 port_id;
+ struct phy_device *phydev;
+ bool has_phy;
+ ofnode phy_node;
+ u32 phy_addr;
+ int phy_interface;
+};
+
+/* config helpers */
+void icssg_config_ipg(struct prueth_priv *priv, int speed, int mii);
+int icssg_config(struct prueth_priv *priv);
+int emac_set_port_state(struct prueth_priv *priv, enum icssg_port_state_cmd cmd);
+
+/* Buffer queue helpers */
+int icssg_queue_pop(struct prueth *prueth, u8 queue);
+void icssg_queue_push(struct prueth *prueth, int queue, u16 addr);
+u32 icssg_queue_level(struct prueth *prueth, int queue);
+
+/* FDB helpers */
+int icssg_send_fdb_msg(struct prueth_priv *priv, struct mgmt_cmd *cmd,
+ struct mgmt_cmd_rsp *rsp);
+int emac_fdb_flow_id_updated(struct prueth_priv *priv);
+
+#endif /* __NET_TI_ICSSG_PRUETH_H */
diff --git a/drivers/net/ti/icssg_queues.c b/drivers/net/ti/icssg_queues.c
new file mode 100644
index 0000000..fc4d33d
--- /dev/null
+++ b/drivers/net/ti/icssg_queues.c
@@ -0,0 +1,51 @@
+// SPDX-License-Identifier: GPL-2.0
+/* ICSSG Buffer queue helpers
+ *
+ * Copyright (C) 2018-2024 Texas Instruments Incorporated - https://www.ti.com
+ */
+
+#include <dm/ofnode.h>
+#include <regmap.h>
+#include "icssg_prueth.h"
+
+#define ICSSG_QUEUES_MAX 64
+#define ICSSG_QUEUE_OFFSET 0xd00
+#define ICSSG_QUEUE_PEEK_OFFSET 0xe00
+#define ICSSG_QUEUE_CNT_OFFSET 0xe40
+#define ICSSG_QUEUE_RESET_OFFSET 0xf40
+
+int icssg_queue_pop(struct prueth *prueth, u8 queue)
+{
+ u32 val, cnt;
+
+ if (queue >= ICSSG_QUEUES_MAX)
+ return -EINVAL;
+
+ regmap_read(prueth->miig_rt, ICSSG_QUEUE_CNT_OFFSET + 4 * queue, &cnt);
+ if (!cnt)
+ return -EINVAL;
+
+ regmap_read(prueth->miig_rt, ICSSG_QUEUE_OFFSET + 4 * queue, &val);
+
+ return val;
+}
+
+void icssg_queue_push(struct prueth *prueth, int queue, u16 addr)
+{
+ if (queue >= ICSSG_QUEUES_MAX)
+ return;
+
+ regmap_write(prueth->miig_rt, ICSSG_QUEUE_OFFSET + 4 * queue, addr);
+}
+
+u32 icssg_queue_level(struct prueth *prueth, int queue)
+{
+ u32 reg;
+
+ if (queue >= ICSSG_QUEUES_MAX)
+ return 0;
+
+ regmap_read(prueth->miig_rt, ICSSG_QUEUE_CNT_OFFSET + 4 * queue, ®);
+
+ return reg;
+}
diff --git a/drivers/net/ti/icssg_switch_map.h b/drivers/net/ti/icssg_switch_map.h
new file mode 100644
index 0000000..b62c514
--- /dev/null
+++ b/drivers/net/ti/icssg_switch_map.h
@@ -0,0 +1,209 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/* Texas Instruments ICSSG Ethernet driver
+ *
+ * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/
+ *
+ */
+
+#ifndef __NET_TI_ICSSG_SWITCH_MAP_H
+#define __NET_TI_ICSSG_SWITCH_MAP_H
+
+/*Time after which FDB entries are checked for aged out values. Value in nanoseconds*/
+#define FDB_AGEING_TIMEOUT_OFFSET 0x0014
+
+/*default VLAN tag for Host Port*/
+#define HOST_PORT_DF_VLAN_OFFSET 0x001C
+
+/*Same as HOST_PORT_DF_VLAN_OFFSET*/
+#define EMAC_ICSSG_SWITCH_PORT0_DEFAULT_VLAN_OFFSET HOST_PORT_DF_VLAN_OFFSET
+
+/*default VLAN tag for P1 Port*/
+#define P1_PORT_DF_VLAN_OFFSET 0x0020
+
+/*Same as P1_PORT_DF_VLAN_OFFSET*/
+#define EMAC_ICSSG_SWITCH_PORT1_DEFAULT_VLAN_OFFSET P1_PORT_DF_VLAN_OFFSET
+
+/*default VLAN tag for P2 Port*/
+#define P2_PORT_DF_VLAN_OFFSET 0x0024
+
+/*Same as P2_PORT_DF_VLAN_OFFSET*/
+#define EMAC_ICSSG_SWITCH_PORT2_DEFAULT_VLAN_OFFSET P2_PORT_DF_VLAN_OFFSET
+
+/*VLAN-FID Table offset. 4096 VIDs. 2B per VID = 8KB = 0x2000*/
+#define VLAN_STATIC_REG_TABLE_OFFSET 0x0100
+
+/*VLAN-FID Table offset for EMAC*/
+#define EMAC_ICSSG_SWITCH_DEFAULT_VLAN_TABLE_OFFSET VLAN_STATIC_REG_TABLE_OFFSET
+
+/*packet descriptor Q reserved memory*/
+#define PORT_DESC0_HI 0x2104
+
+/*packet descriptor Q reserved memory*/
+#define PORT_DESC0_LO 0x2F6C
+
+/*packet descriptor Q reserved memory*/
+#define PORT_DESC1_HI 0x3DD4
+
+/*packet descriptor Q reserved memory*/
+#define PORT_DESC1_LO 0x4C3C
+
+/*packet descriptor Q reserved memory*/
+#define HOST_DESC0_HI 0x5AA4
+
+/*packet descriptor Q reserved memory*/
+#define HOST_DESC0_LO 0x5F0C
+
+/*packet descriptor Q reserved memory*/
+#define HOST_DESC1_HI 0x6374
+
+/*packet descriptor Q reserved memory*/
+#define HOST_DESC1_LO 0x67DC
+
+/*special packet descriptor Q reserved memory*/
+#define HOST_SPPD0 0x7AAC
+
+/*special packet descriptor Q reserved memory*/
+#define HOST_SPPD1 0x7EAC
+
+/*_Small_Description_*/
+#define TIMESYNC_FW_WC_CYCLECOUNT_OFFSET 0x83EC
+
+/*IEP count hi roll over count*/
+#define TIMESYNC_FW_WC_HI_ROLLOVER_COUNT_OFFSET 0x83F4
+
+/*_Small_Description_*/
+#define TIMESYNC_FW_WC_COUNT_HI_SW_OFFSET_OFFSET 0x83F8
+
+/*Set clock descriptor*/
+#define TIMESYNC_FW_WC_SETCLOCK_DESC_OFFSET 0x83FC
+
+/*_Small_Description_*/
+#define TIMESYNC_FW_WC_SYNCOUT_REDUCTION_FACTOR_OFFSET 0x843C
+
+/*_Small_Description_*/
+#define TIMESYNC_FW_WC_SYNCOUT_REDUCTION_COUNT_OFFSET 0x8440
+
+/*_Small_Description_*/
+#define TIMESYNC_FW_WC_SYNCOUT_START_TIME_CYCLECOUNT_OFFSET 0x8444
+
+/*Control variable to generate SYNC1*/
+#define TIMESYNC_FW_WC_ISOM_PIN_SIGNAL_EN_OFFSET 0x844C
+
+/*SystemTime Sync0 periodicity*/
+#define TIMESYNC_FW_ST_SYNCOUT_PERIOD_OFFSET 0x8450
+
+/*pktTxDelay for P1 = link speed dependent p1 mac delay + p1 phy delay*/
+#define TIMESYNC_FW_WC_PKTTXDELAY_P1_OFFSET 0x8454
+
+/*pktTxDelay for P2 = link speed dependent p2 mac delay + p2 phy delay*/
+#define TIMESYNC_FW_WC_PKTTXDELAY_P2_OFFSET 0x8458
+
+/*Set clock operation done signal for next task*/
+#define TIMESYNC_FW_SIG_PNFW_OFFSET 0x845C
+
+/*Set clock operation done signal for next task*/
+#define TIMESYNC_FW_SIG_TIMESYNCFW_OFFSET 0x8460
+
+/*New list is copied at this time*/
+#define TAS_CONFIG_CHANGE_TIME 0x000C
+
+/*config change error counter*/
+#define TAS_CONFIG_CHANGE_ERROR_COUNTER 0x0014
+
+/*TAS List update pending flag*/
+#define TAS_CONFIG_PENDING 0x0018
+
+/*TAS list update trigger flag*/
+#define TAS_CONFIG_CHANGE 0x0019
+
+/*List length for new TAS schedule*/
+#define TAS_ADMIN_LIST_LENGTH 0x001A
+
+/*Currently active TAS list index*/
+#define TAS_ACTIVE_LIST_INDEX 0x001B
+
+/*Cycle time for the new TAS schedule*/
+#define TAS_ADMIN_CYCLE_TIME 0x001C
+
+/*Cycle counts remaining till the TAS list update*/
+#define TAS_CONFIG_CHANGE_CYCLE_COUNT 0x0020
+
+/*Base Flow ID for sending packets to Host for Slice0*/
+#define PSI_L_REGULAR_FLOW_ID_BASE_OFFSET 0x0024
+
+/*Same as PSI_L_REGULAR_FLOW_ID_BASE_OFFSET*/
+#define EMAC_ICSSG_SWITCH_PSI_L_REGULAR_FLOW_ID_BASE_OFFSET PSI_L_REGULAR_FLOW_ID_BASE_OFFSET
+
+/*Base Flow ID for sending mgmt and Tx TS to Host for Slice0*/
+#define PSI_L_MGMT_FLOW_ID_OFFSET 0x0026
+
+/*Same as PSI_L_MGMT_FLOW_ID_OFFSET*/
+#define EMAC_ICSSG_SWITCH_PSI_L_MGMT_FLOW_ID_BASE_OFFSET PSI_L_MGMT_FLOW_ID_OFFSET
+
+/*Queue number for Special packets written here*/
+#define SPL_PKT_DEFAULT_PRIORITY 0x0028
+
+/*Express Preemptible Queue Mask*/
+#define EXPRESS_PRE_EMPTIVE_Q_MASK 0x0029
+
+/*Port1/Port2 Default Queue number for untagged packets, only 1B is used*/
+#define QUEUE_NUM_UNTAGGED 0x002A
+
+/*Stores the table used for priority regeneration. 1B per PCP/Queue*/
+#define PORT_Q_PRIORITY_REGEN_OFFSET 0x002C
+
+/* For marking Packet as priority/express (this feature is disabled) or
+ * cut-through/S&F.
+ */
+#define EXPRESS_PRE_EMPTIVE_Q_MAP 0x0034
+
+/*Stores the table used for priority mapping. 1B per PCP/Queue*/
+#define PORT_Q_PRIORITY_MAPPING_OFFSET 0x003C
+
+/*TAS gate mask for windows list0*/
+#define TAS_GATE_MASK_LIST0 0x0100
+
+/*TAS gate mask for windows list1*/
+#define TAS_GATE_MASK_LIST1 0x0350
+
+/*Memory to Enable/Disable Preemption on TX side*/
+#define PRE_EMPTION_ENABLE_TX 0x05A0
+
+/*Active State of Preemption on TX side*/
+#define PRE_EMPTION_ACTIVE_TX 0x05A1
+
+/*Memory to Enable/Disable Verify State Machine Preemption*/
+#define PRE_EMPTION_ENABLE_VERIFY 0x05A2
+
+/*Verify Status of State Machine*/
+#define PRE_EMPTION_VERIFY_STATUS 0x05A3
+
+/*Non Final Fragment Size supported by Link Partner*/
+#define PRE_EMPTION_ADD_FRAG_SIZE_REMOTE 0x05A4
+
+/*Non Final Fragment Size supported by Firmware*/
+#define PRE_EMPTION_ADD_FRAG_SIZE_LOCAL 0x05A6
+
+/*Time in ms the State machine waits for respond packet*/
+#define PRE_EMPTION_VERIFY_TIME 0x05A8
+
+/*Memory used for R30 related management commands*/
+#define MGR_R30_CMD_OFFSET 0x05AC
+
+/*HW Buffer Pool0 base address*/
+#define BUFFER_POOL_0_ADDR_OFFSET 0x05BC
+
+/*16B for Host Egress MSMC Q (Pre-emptible) context*/
+#define HOST_RX_Q_PRE_CONTEXT_OFFSET 0x0684
+
+/*Buffer for 8 FDB entries to be added by 'Add Multiple FDB entries IOCTL*/
+#define FDB_CMD_BUFFER 0x0894
+
+/*16B for Host Egress MSMC Q (Express) context*/
+#define HOST_RX_Q_EXP_CONTEXT_OFFSET 0x0940
+
+/*Start of 32 bits PA_STAT counters*/
+#define PA_STAT_32b_START_OFFSET 0x0080
+
+#endif
+/* __NET_TI_ICSSG_SWITCH_MAP_H */
diff --git a/drivers/net/ti/keystone_net.c b/drivers/net/ti/keystone_net.c
index 43dbf3f..c6e5bf2 100644
--- a/drivers/net/ti/keystone_net.c
+++ b/drivers/net/ti/keystone_net.c
@@ -5,7 +5,6 @@
* (C) Copyright 2012-2014
* Texas Instruments Incorporated, <www.ti.com>
*/
-#include <common.h>
#include <command.h>
#include <console.h>
#include <asm/global_data.h>
diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c
index 8833e30..6481ee2 100644
--- a/drivers/net/tsec.c
+++ b/drivers/net/tsec.c
@@ -8,7 +8,6 @@
*/
#include <config.h>
-#include <common.h>
#include <dm.h>
#include <malloc.h>
#include <net.h>
diff --git a/drivers/net/vsc7385.c b/drivers/net/vsc7385.c
index 09883f0..bd1869d 100644
--- a/drivers/net/vsc7385.c
+++ b/drivers/net/vsc7385.c
@@ -13,7 +13,6 @@
*/
#include <config.h>
-#include <common.h>
#include <console.h>
#include <log.h>
#include <asm/io.h>
diff --git a/drivers/net/xilinx_axi_emac.c b/drivers/net/xilinx_axi_emac.c
index ef151ee..a1a39f6 100644
--- a/drivers/net/xilinx_axi_emac.c
+++ b/drivers/net/xilinx_axi_emac.c
@@ -7,7 +7,6 @@
*/
#include <config.h>
-#include <common.h>
#include <cpu_func.h>
#include <display_options.h>
#include <dm.h>
diff --git a/drivers/net/xilinx_axi_mrmac.c b/drivers/net/xilinx_axi_mrmac.c
index 410fb25..5556519 100644
--- a/drivers/net/xilinx_axi_mrmac.c
+++ b/drivers/net/xilinx_axi_mrmac.c
@@ -9,7 +9,6 @@
*/
#include <config.h>
-#include <common.h>
#include <cpu_func.h>
#include <dm.h>
#include <log.h>
diff --git a/drivers/net/xilinx_emaclite.c b/drivers/net/xilinx_emaclite.c
index 16ba915..c25ac2e 100644
--- a/drivers/net/xilinx_emaclite.c
+++ b/drivers/net/xilinx_emaclite.c
@@ -6,7 +6,6 @@
* Michal SIMEK <monstr@monstr.eu>
*/
-#include <common.h>
#include <log.h>
#include <net.h>
#include <config.h>
diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c
index 7c57d32..b41ee95 100644
--- a/drivers/net/zynq_gem.c
+++ b/drivers/net/zynq_gem.c
@@ -9,7 +9,6 @@
*/
#include <clk.h>
-#include <common.h>
#include <cpu_func.h>
#include <dm.h>
#include <generic-phy.h>
diff --git a/drivers/nvme/nvme-uclass.c b/drivers/nvme/nvme-uclass.c
index f3af6a2..44c88ad 100644
--- a/drivers/nvme/nvme-uclass.c
+++ b/drivers/nvme/nvme-uclass.c
@@ -6,7 +6,6 @@
#define LOG_CATEGORY UCLASS_NVME
-#include <common.h>
#include <bootdev.h>
#include <dm.h>
#include <init.h>
diff --git a/drivers/nvme/nvme.c b/drivers/nvme/nvme.c
index 59a139b..7c58ceb 100644
--- a/drivers/nvme/nvme.c
+++ b/drivers/nvme/nvme.c
@@ -4,7 +4,6 @@
* Copyright (C) 2017 Bin Meng <bmeng.cn@gmail.com>
*/
-#include <common.h>
#include <blk.h>
#include <bootdev.h>
#include <cpu_func.h>
diff --git a/drivers/nvme/nvme_apple.c b/drivers/nvme/nvme_apple.c
index 819b748..7e75385 100644
--- a/drivers/nvme/nvme_apple.c
+++ b/drivers/nvme/nvme_apple.c
@@ -3,7 +3,6 @@
* (C) Copyright 2021 Mark Kettenis <kettenis@openbsd.org>
*/
-#include <common.h>
#include <dm.h>
#include <mailbox.h>
#include <mapmem.h>
diff --git a/drivers/nvme/nvme_pci.c b/drivers/nvme/nvme_pci.c
index 5bb43d2..c24f8cf 100644
--- a/drivers/nvme/nvme_pci.c
+++ b/drivers/nvme/nvme_pci.c
@@ -4,7 +4,6 @@
* Copyright (C) 2017 Bin Meng <bmeng.cn@gmail.com>
*/
-#include <common.h>
#include <dm.h>
#include <init.h>
#include <pci.h>
diff --git a/drivers/nvme/nvme_show.c b/drivers/nvme/nvme_show.c
index 72cbac8..1581023 100644
--- a/drivers/nvme/nvme_show.c
+++ b/drivers/nvme/nvme_show.c
@@ -4,7 +4,6 @@
* Copyright (C) 2017 Bin Meng <bmeng.cn@gmail.com>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <memalign.h>
diff --git a/drivers/pch/pch-uclass.c b/drivers/pch/pch-uclass.c
index af028f9..9af2475 100644
--- a/drivers/pch/pch-uclass.c
+++ b/drivers/pch/pch-uclass.c
@@ -6,7 +6,6 @@
#define LOG_CATEGORY UCLASS_PCH
-#include <common.h>
#include <dm.h>
#include <pch.h>
diff --git a/drivers/pch/pch7.c b/drivers/pch/pch7.c
index 5fb35a1..4ef82a7 100644
--- a/drivers/pch/pch7.c
+++ b/drivers/pch/pch7.c
@@ -3,7 +3,6 @@
* Copyright (C) 2014 Google, Inc
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <pch.h>
diff --git a/drivers/pch/pch9.c b/drivers/pch/pch9.c
index 3137eb2..24b0465 100644
--- a/drivers/pch/pch9.c
+++ b/drivers/pch/pch9.c
@@ -5,7 +5,6 @@
#define LOG_CATEGORY UCLASS_PCH
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <pch.h>
diff --git a/drivers/pch/sandbox_pch.c b/drivers/pch/sandbox_pch.c
index 37c3689..aa82dca 100644
--- a/drivers/pch/sandbox_pch.c
+++ b/drivers/pch/sandbox_pch.c
@@ -3,7 +3,6 @@
* Copyright 2018 Google LLC
*/
-#include <common.h>
#include <dm.h>
#include <pch.h>
diff --git a/drivers/pci/pci-aardvark.c b/drivers/pci/pci-aardvark.c
index af0e55c..f5db4bd 100644
--- a/drivers/pci/pci-aardvark.c
+++ b/drivers/pci/pci-aardvark.c
@@ -25,7 +25,6 @@
*
*/
-#include <common.h>
#include <dm.h>
#include <pci.h>
#include <asm/io.h>
diff --git a/drivers/pci/pci-emul-uclass.c b/drivers/pci/pci-emul-uclass.c
index a0b8afb..166ee9f 100644
--- a/drivers/pci/pci-emul-uclass.c
+++ b/drivers/pci/pci-emul-uclass.c
@@ -4,7 +4,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <dm.h>
#include <fdtdec.h>
#include <log.h>
diff --git a/drivers/pci/pci-rcar-gen2.c b/drivers/pci/pci-rcar-gen2.c
index b81eb35..12c31e7 100644
--- a/drivers/pci/pci-rcar-gen2.c
+++ b/drivers/pci/pci-rcar-gen2.c
@@ -5,7 +5,7 @@
* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
*/
-#include <common.h>
+#include <config.h>
#include <asm/io.h>
#include <clk.h>
#include <dm.h>
diff --git a/drivers/pci/pci-rcar-gen3.c b/drivers/pci/pci-rcar-gen3.c
index 1252ef7..7687824 100644
--- a/drivers/pci/pci-rcar-gen3.c
+++ b/drivers/pci/pci-rcar-gen3.c
@@ -15,7 +15,6 @@
* Author: Phil Edworthy <phil.edworthy@renesas.com>
*/
-#include <common.h>
#include <asm/io.h>
#include <clk.h>
#include <dm.h>
diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c
index 1a48256..6571e65 100644
--- a/drivers/pci/pci-uclass.c
+++ b/drivers/pci/pci-uclass.c
@@ -6,7 +6,6 @@
#define LOG_CATEGORY UCLASS_PCI
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <init.h>
diff --git a/drivers/pci/pci_auto.c b/drivers/pci/pci_auto.c
index 0123036..90f8188 100644
--- a/drivers/pci/pci_auto.c
+++ b/drivers/pci/pci_auto.c
@@ -8,7 +8,7 @@
* Copyright (c) 2021 Maciej W. Rozycki <macro@orcam.me.uk>
*/
-#include <common.h>
+#include <config.h>
#include <dm.h>
#include <errno.h>
#include <log.h>
diff --git a/drivers/pci/pci_auto_common.c b/drivers/pci/pci_auto_common.c
index 2f4aff0..cfa818e 100644
--- a/drivers/pci/pci_auto_common.c
+++ b/drivers/pci/pci_auto_common.c
@@ -11,7 +11,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <log.h>
diff --git a/drivers/pci/pci_common.c b/drivers/pci/pci_common.c
index a182512..a57cf11 100644
--- a/drivers/pci/pci_common.c
+++ b/drivers/pci/pci_common.c
@@ -9,7 +9,6 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
#include <dm.h>
#include <env.h>
#include <errno.h>
diff --git a/drivers/pci/pci_compat.c b/drivers/pci/pci_compat.c
index 9dddca8..8233925 100644
--- a/drivers/pci/pci_compat.c
+++ b/drivers/pci/pci_compat.c
@@ -4,7 +4,6 @@
*
* Copyright (C) 2014 Google, Inc
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <log.h>
diff --git a/drivers/pci/pci_ftpci100.c b/drivers/pci/pci_ftpci100.c
index a177544..43275b3 100644
--- a/drivers/pci/pci_ftpci100.c
+++ b/drivers/pci/pci_ftpci100.c
@@ -1,6 +1,5 @@
// SPDX-License-Identifier: GPL-2.0-or-later
-#include <common.h>
#include <pci.h>
#include <dm.h>
#include <asm/io.h>
diff --git a/drivers/pci/pci_mpc85xx.c b/drivers/pci/pci_mpc85xx.c
index 249cfe6..c07feba 100644
--- a/drivers/pci/pci_mpc85xx.c
+++ b/drivers/pci/pci_mpc85xx.c
@@ -4,7 +4,6 @@
* Heiko Schocher, DENX Software Engineering, hs@denx.de.
*
*/
-#include <common.h>
#include <asm/bitops.h>
#include <pci.h>
#include <dm.h>
diff --git a/drivers/pci/pci_mvebu.c b/drivers/pci/pci_mvebu.c
index 8355955..7781551 100644
--- a/drivers/pci/pci_mvebu.c
+++ b/drivers/pci/pci_mvebu.c
@@ -10,7 +10,6 @@
* Pali Rohár <pali@kernel.org>
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <malloc.h>
diff --git a/drivers/pci/pci_rom.c b/drivers/pci/pci_rom.c
index 438583a..78e5de9 100644
--- a/drivers/pci/pci_rom.c
+++ b/drivers/pci/pci_rom.c
@@ -24,7 +24,6 @@
#define LOG_CATEGORY UCLASS_PCI
-#include <common.h>
#include <bios_emul.h>
#include <bloblist.h>
#include <bootstage.h>
@@ -36,6 +35,7 @@
#include <pci.h>
#include <pci_rom.h>
#include <spl.h>
+#include <time.h>
#include <vesa.h>
#include <video.h>
#include <acpi/acpi_s3.h>
diff --git a/drivers/pci/pci_sandbox.c b/drivers/pci/pci_sandbox.c
index ca44d00..fed0850 100644
--- a/drivers/pci/pci_sandbox.c
+++ b/drivers/pci/pci_sandbox.c
@@ -4,7 +4,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <dm.h>
#include <fdtdec.h>
#include <log.h>
diff --git a/drivers/pci/pci_sh7751.c b/drivers/pci/pci_sh7751.c
index c1be56c..3cd01e9 100644
--- a/drivers/pci/pci_sh7751.c
+++ b/drivers/pci/pci_sh7751.c
@@ -5,7 +5,7 @@
* (C) 2007,2008 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
*/
-#include <common.h>
+#include <config.h>
#include <dm.h>
#include <pci.h>
#include <asm/processor.h>
diff --git a/drivers/pci/pci_tegra.c b/drivers/pci/pci_tegra.c
index d6374a5..bb8832c 100644
--- a/drivers/pci/pci_tegra.c
+++ b/drivers/pci/pci_tegra.c
@@ -11,7 +11,6 @@
#define pr_fmt(fmt) "tegra-pcie: " fmt
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <errno.h>
diff --git a/drivers/pci/pci_x86.c b/drivers/pci/pci_x86.c
index 8d03693..ab76166 100644
--- a/drivers/pci/pci_x86.c
+++ b/drivers/pci/pci_x86.c
@@ -3,7 +3,6 @@
* Copyright (c) 2015 Google, Inc
*/
-#include <common.h>
#include <dm.h>
#include <pci.h>
#include <asm/pci.h>
diff --git a/drivers/pci/pcie_apple.c b/drivers/pci/pcie_apple.c
index 21bafba..6a8e715 100644
--- a/drivers/pci/pcie_apple.c
+++ b/drivers/pci/pcie_apple.c
@@ -16,7 +16,6 @@
* Author: Marc Zyngier <maz@kernel.org>
*/
-#include <common.h>
#include <dm.h>
#include <dm/device_compat.h>
#include <dm/devres.h>
diff --git a/drivers/pci/pcie_brcmstb.c b/drivers/pci/pcie_brcmstb.c
index cd45f0b..f978c64 100644
--- a/drivers/pci/pcie_brcmstb.c
+++ b/drivers/pci/pcie_brcmstb.c
@@ -12,7 +12,6 @@
* Copyright (C) 2020 Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
*/
-#include <common.h>
#include <errno.h>
#include <dm.h>
#include <dm/ofnode.h>
diff --git a/drivers/pci/pcie_dw_common.c b/drivers/pci/pcie_dw_common.c
index 74fb6df..0673e51 100644
--- a/drivers/pci/pcie_dw_common.c
+++ b/drivers/pci/pcie_dw_common.c
@@ -8,7 +8,6 @@
* Copyright (C) 2018 Texas Instruments, Inc
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <pci.h>
diff --git a/drivers/pci/pcie_dw_imx.c b/drivers/pci/pcie_dw_imx.c
index a2ee228..fdb4637 100644
--- a/drivers/pci/pcie_dw_imx.c
+++ b/drivers/pci/pcie_dw_imx.c
@@ -56,6 +56,18 @@
struct udevice *vpcie;
};
+struct pcie_chip_info {
+ const char *gpr;
+};
+
+static const struct pcie_chip_info imx8mm_chip_info = {
+ .gpr = "fsl,imx8mm-iomuxc-gpr",
+};
+
+static const struct pcie_chip_info imx8mp_chip_info = {
+ .gpr = "fsl,imx8mp-iomuxc-gpr",
+};
+
static void pcie_dw_configure(struct pcie_dw_imx *priv, u32 cap_speed)
{
dw_pcie_dbi_write_enable(&priv->dw, true);
@@ -242,6 +254,7 @@
static int pcie_dw_imx_of_to_plat(struct udevice *dev)
{
+ struct pcie_chip_info *info = (void *)dev_get_driver_data(dev);
struct pcie_dw_imx *priv = dev_get_priv(dev);
ofnode gpr;
int ret;
@@ -287,7 +300,7 @@
goto err_phy;
}
- gpr = ofnode_by_compatible(ofnode_null(), "fsl,imx8mp-iomuxc-gpr");
+ gpr = ofnode_by_compatible(ofnode_null(), info->gpr);
if (ofnode_equal(gpr, ofnode_null())) {
dev_err(dev, "unable to find GPR node\n");
ret = -ENODEV;
@@ -322,7 +335,8 @@
};
static const struct udevice_id pcie_dw_imx_ids[] = {
- { .compatible = "fsl,imx8mp-pcie" },
+ { .compatible = "fsl,imx8mm-pcie", .data = (ulong)&imx8mm_chip_info, },
+ { .compatible = "fsl,imx8mp-pcie", .data = (ulong)&imx8mp_chip_info, },
{ }
};
diff --git a/drivers/pci/pcie_dw_meson.c b/drivers/pci/pcie_dw_meson.c
index f953797..bb78e78 100644
--- a/drivers/pci/pcie_dw_meson.c
+++ b/drivers/pci/pcie_dw_meson.c
@@ -9,7 +9,6 @@
* Copyright (c) 2021 Rockchip, Inc.
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <generic-phy.h>
diff --git a/drivers/pci/pcie_dw_mvebu.c b/drivers/pci/pcie_dw_mvebu.c
index c41f3f1..43b9191 100644
--- a/drivers/pci/pcie_dw_mvebu.c
+++ b/drivers/pci/pcie_dw_mvebu.c
@@ -10,10 +10,11 @@
* - drivers/pci/pcie_xilinx.c
*/
-#include <common.h>
+#include <config.h>
#include <dm.h>
#include <log.h>
#include <pci.h>
+#include <time.h>
#include <asm/global_data.h>
#include <asm/io.h>
#include <asm-generic/gpio.h>
diff --git a/drivers/pci/pcie_dw_rockchip.c b/drivers/pci/pcie_dw_rockchip.c
index bc4635f..1bad51f 100644
--- a/drivers/pci/pcie_dw_rockchip.c
+++ b/drivers/pci/pcie_dw_rockchip.c
@@ -5,7 +5,6 @@
* Copyright (c) 2021 Rockchip, Inc.
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <generic-phy.h>
diff --git a/drivers/pci/pcie_dw_sifive.c b/drivers/pci/pcie_dw_sifive.c
index fac3f18..6285edf 100644
--- a/drivers/pci/pcie_dw_sifive.c
+++ b/drivers/pci/pcie_dw_sifive.c
@@ -14,7 +14,6 @@
#include <asm/io.h>
#include <asm-generic/gpio.h>
#include <clk.h>
-#include <common.h>
#include <dm.h>
#include <dm/device_compat.h>
#include <generic-phy.h>
diff --git a/drivers/pci/pcie_dw_ti.c b/drivers/pci/pcie_dw_ti.c
index 4195a02..78a5d03 100644
--- a/drivers/pci/pcie_dw_ti.c
+++ b/drivers/pci/pcie_dw_ti.c
@@ -3,7 +3,6 @@
* Copyright (C) 2018 Texas Instruments, Inc
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <pci.h>
diff --git a/drivers/pci/pcie_ecam_generic.c b/drivers/pci/pcie_ecam_generic.c
index f5bc6e3..3cb2bbb 100644
--- a/drivers/pci/pcie_ecam_generic.c
+++ b/drivers/pci/pcie_ecam_generic.c
@@ -7,7 +7,6 @@
* Copyright (C) 2016 Imagination Technologies
*/
-#include <common.h>
#include <dm.h>
#include <pci.h>
#include <linux/ioport.h>
diff --git a/drivers/pci/pcie_ecam_synquacer.c b/drivers/pci/pcie_ecam_synquacer.c
index e3e2289..fc855df 100644
--- a/drivers/pci/pcie_ecam_synquacer.c
+++ b/drivers/pci/pcie_ecam_synquacer.c
@@ -8,7 +8,6 @@
* Copyright (C) 2021 Linaro Ltd.
*/
-#include <common.h>
#include <dm.h>
#include <pci.h>
#include <log.h>
diff --git a/drivers/pci/pcie_fsl.c b/drivers/pci/pcie_fsl.c
index ec917ee..18af23c 100644
--- a/drivers/pci/pcie_fsl.c
+++ b/drivers/pci/pcie_fsl.c
@@ -6,7 +6,7 @@
* Author: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
*/
-#include <common.h>
+#include <config.h>
#include <dm.h>
#include <malloc.h>
#include <mapmem.h>
diff --git a/drivers/pci/pcie_fsl_fixup.c b/drivers/pci/pcie_fsl_fixup.c
index f4e2278..9187e7a 100644
--- a/drivers/pci/pcie_fsl_fixup.c
+++ b/drivers/pci/pcie_fsl_fixup.c
@@ -6,7 +6,6 @@
* Author: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
*/
-#include <common.h>
#ifdef CONFIG_OF_BOARD_SETUP
#include <dm.h>
#include <fdt_support.h>
diff --git a/drivers/pci/pcie_imx.c b/drivers/pci/pcie_imx.c
index 78f2c7d..11c4ccb 100644
--- a/drivers/pci/pcie_imx.c
+++ b/drivers/pci/pcie_imx.c
@@ -17,7 +17,6 @@
* those too in order to have a single modern PCIe iMX driver.
*/
-#include <common.h>
#include <init.h>
#include <log.h>
#include <malloc.h>
diff --git a/drivers/pci/pcie_intel_fpga.c b/drivers/pci/pcie_intel_fpga.c
index 60195cf..959fd36 100644
--- a/drivers/pci/pcie_intel_fpga.c
+++ b/drivers/pci/pcie_intel_fpga.c
@@ -6,7 +6,6 @@
*
*/
-#include <common.h>
#include <dm.h>
#include <pci.h>
#include <asm/global_data.h>
diff --git a/drivers/pci/pcie_iproc.c b/drivers/pci/pcie_iproc.c
index d6d3a9e..360ef1b 100644
--- a/drivers/pci/pcie_iproc.c
+++ b/drivers/pci/pcie_iproc.c
@@ -4,7 +4,6 @@
*
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <generic-phy.h>
diff --git a/drivers/pci/pcie_layerscape.c b/drivers/pci/pcie_layerscape.c
index 3c7c4ca..1be3309 100644
--- a/drivers/pci/pcie_layerscape.c
+++ b/drivers/pci/pcie_layerscape.c
@@ -5,7 +5,6 @@
* Layerscape PCIe driver
*/
-#include <common.h>
#include <log.h>
#include <asm/global_data.h>
#include <asm/io.h>
diff --git a/drivers/pci/pcie_layerscape_ep.c b/drivers/pci/pcie_layerscape_ep.c
index 83f7eeb..3520488 100644
--- a/drivers/pci/pcie_layerscape_ep.c
+++ b/drivers/pci/pcie_layerscape_ep.c
@@ -4,7 +4,7 @@
* Layerscape PCIe EP driver
*/
-#include <common.h>
+#include <config.h>
#include <asm/arch/fsl_serdes.h>
#include <dm.h>
#include <asm/global_data.h>
diff --git a/drivers/pci/pcie_layerscape_fixup.c b/drivers/pci/pcie_layerscape_fixup.c
index c519835..ec4a7e7 100644
--- a/drivers/pci/pcie_layerscape_fixup.c
+++ b/drivers/pci/pcie_layerscape_fixup.c
@@ -5,7 +5,6 @@
* Layerscape PCIe driver
*/
-#include <common.h>
#include <dm.h>
#include <init.h>
#include <log.h>
diff --git a/drivers/pci/pcie_layerscape_fixup_common.c b/drivers/pci/pcie_layerscape_fixup_common.c
index 095874a..f37e37f 100644
--- a/drivers/pci/pcie_layerscape_fixup_common.c
+++ b/drivers/pci/pcie_layerscape_fixup_common.c
@@ -7,10 +7,10 @@
*
*/
-#include <common.h>
#include <init.h>
#include <asm/arch/clock.h>
#include <asm/arch/soc.h>
+#include <linux/errno.h>
#include <linux/libfdt.h>
#include <fdt_support.h>
#include "pcie_layerscape_fixup_common.h"
diff --git a/drivers/pci/pcie_layerscape_gen4.c b/drivers/pci/pcie_layerscape_gen4.c
index 021c975..57dc91f 100644
--- a/drivers/pci/pcie_layerscape_gen4.c
+++ b/drivers/pci/pcie_layerscape_gen4.c
@@ -6,7 +6,7 @@
* Author: Hou Zhiqiang <Minder.Hou@gmail.com>
*/
-#include <common.h>
+#include <config.h>
#include <log.h>
#include <asm/arch/fsl_serdes.h>
#include <pci.h>
diff --git a/drivers/pci/pcie_layerscape_gen4_fixup.c b/drivers/pci/pcie_layerscape_gen4_fixup.c
index b2a45bf..60c4338 100644
--- a/drivers/pci/pcie_layerscape_gen4_fixup.c
+++ b/drivers/pci/pcie_layerscape_gen4_fixup.c
@@ -7,7 +7,6 @@
*
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <pci.h>
diff --git a/drivers/pci/pcie_layerscape_rc.c b/drivers/pci/pcie_layerscape_rc.c
index 6a5bf88..e7913d4 100644
--- a/drivers/pci/pcie_layerscape_rc.c
+++ b/drivers/pci/pcie_layerscape_rc.c
@@ -4,7 +4,6 @@
* Layerscape PCIe driver
*/
-#include <common.h>
#include <asm/arch/fsl_serdes.h>
#include <pci.h>
#include <asm/global_data.h>
diff --git a/drivers/pci/pcie_mediatek.c b/drivers/pci/pcie_mediatek.c
index f0f34b5..04d8cc2 100644
--- a/drivers/pci/pcie_mediatek.c
+++ b/drivers/pci/pcie_mediatek.c
@@ -7,7 +7,6 @@
* Honghui Zhang <honghui.zhang@mediatek.com>
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <generic-phy.h>
diff --git a/drivers/pci/pcie_phytium.c b/drivers/pci/pcie_phytium.c
index 3bd1f5c..94de89b 100644
--- a/drivers/pci/pcie_phytium.c
+++ b/drivers/pci/pcie_phytium.c
@@ -7,7 +7,6 @@
* Copyright (C) 2019
*/
-#include <common.h>
#include <dm.h>
#include <pci.h>
#include <asm/global_data.h>
diff --git a/drivers/pci/pcie_plda_common.c b/drivers/pci/pcie_plda_common.c
index cd74bb4..622a5ce 100644
--- a/drivers/pci/pcie_plda_common.c
+++ b/drivers/pci/pcie_plda_common.c
@@ -6,7 +6,6 @@
*
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <pci.h>
diff --git a/drivers/pci/pcie_rockchip.c b/drivers/pci/pcie_rockchip.c
index 624841e..19f9e58 100644
--- a/drivers/pci/pcie_rockchip.c
+++ b/drivers/pci/pcie_rockchip.c
@@ -11,7 +11,6 @@
* Bits taken from Linux Rockchip PCIe host controller.
*/
-#include <common.h>
#include <dm.h>
#include <dm/device_compat.h>
#include <generic-phy.h>
diff --git a/drivers/pci/pcie_starfive_jh7110.c b/drivers/pci/pcie_starfive_jh7110.c
index 903a544..569fbfd 100644
--- a/drivers/pci/pcie_starfive_jh7110.c
+++ b/drivers/pci/pcie_starfive_jh7110.c
@@ -7,7 +7,6 @@
*
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <pci.h>
diff --git a/drivers/pci/pcie_uniphier.c b/drivers/pci/pcie_uniphier.c
index f2edea9..d1170b5 100644
--- a/drivers/pci/pcie_uniphier.c
+++ b/drivers/pci/pcie_uniphier.c
@@ -5,7 +5,6 @@
*/
#include <clk.h>
-#include <common.h>
#include <dm.h>
#include <dm/device_compat.h>
#include <generic-phy.h>
diff --git a/drivers/pci/pcie_xilinx.c b/drivers/pci/pcie_xilinx.c
index 3db460b..a674ab0 100644
--- a/drivers/pci/pcie_xilinx.c
+++ b/drivers/pci/pcie_xilinx.c
@@ -5,7 +5,6 @@
* Copyright (C) 2016 Imagination Technologies
*/
-#include <common.h>
#include <dm.h>
#include <pci.h>
#include <linux/bitops.h>
diff --git a/drivers/pci_endpoint/pci_ep-uclass.c b/drivers/pci_endpoint/pci_ep-uclass.c
index 6ee4cfb..902d1a5 100644
--- a/drivers/pci_endpoint/pci_ep-uclass.c
+++ b/drivers/pci_endpoint/pci_ep-uclass.c
@@ -11,7 +11,6 @@
#define LOG_CATEGORY UCLASS_PCI_EP
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <asm/global_data.h>
diff --git a/drivers/pci_endpoint/pcie-cadence-ep.c b/drivers/pci_endpoint/pcie-cadence-ep.c
index d58c649..e02ea14 100644
--- a/drivers/pci_endpoint/pcie-cadence-ep.c
+++ b/drivers/pci_endpoint/pcie-cadence-ep.c
@@ -4,7 +4,6 @@
* Written by Ramon Fried <ramon.fried@gmail.com>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <pci_ep.h>
diff --git a/drivers/pci_endpoint/sandbox-pci_ep.c b/drivers/pci_endpoint/sandbox-pci_ep.c
index de148cd..aa623fa 100644
--- a/drivers/pci_endpoint/sandbox-pci_ep.c
+++ b/drivers/pci_endpoint/sandbox-pci_ep.c
@@ -3,7 +3,6 @@
* Copyright (c) 2019 Ramon Fried <ramon.fried@gmail.com>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <pci.h>
diff --git a/drivers/phy/allwinner/phy-sun4i-usb.c b/drivers/phy/allwinner/phy-sun4i-usb.c
index 6624e91..b9306c9 100644
--- a/drivers/phy/allwinner/phy-sun4i-usb.c
+++ b/drivers/phy/allwinner/phy-sun4i-usb.c
@@ -10,7 +10,6 @@
* SPDX-License-Identifier: GPL-2.0+
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <log.h>
diff --git a/drivers/phy/bcm6318-usbh-phy.c b/drivers/phy/bcm6318-usbh-phy.c
index a2fa446..d715541 100644
--- a/drivers/phy/bcm6318-usbh-phy.c
+++ b/drivers/phy/bcm6318-usbh-phy.c
@@ -7,7 +7,6 @@
* Copyright 2013 Florian Fainelli <florian@openwrt.org>
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <generic-phy.h>
diff --git a/drivers/phy/bcm6348-usbh-phy.c b/drivers/phy/bcm6348-usbh-phy.c
index 857fb57..ffb37b6 100644
--- a/drivers/phy/bcm6348-usbh-phy.c
+++ b/drivers/phy/bcm6348-usbh-phy.c
@@ -7,7 +7,6 @@
* Copyright 2013 Florian Fainelli <florian@openwrt.org>
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <generic-phy.h>
diff --git a/drivers/phy/bcm6358-usbh-phy.c b/drivers/phy/bcm6358-usbh-phy.c
index bfdcfb0..a8d2460 100644
--- a/drivers/phy/bcm6358-usbh-phy.c
+++ b/drivers/phy/bcm6358-usbh-phy.c
@@ -7,7 +7,6 @@
* Copyright 2013 Florian Fainelli <florian@openwrt.org>
*/
-#include <common.h>
#include <dm.h>
#include <generic-phy.h>
#include <log.h>
diff --git a/drivers/phy/bcm6368-usbh-phy.c b/drivers/phy/bcm6368-usbh-phy.c
index 1a2870d..5bee130 100644
--- a/drivers/phy/bcm6368-usbh-phy.c
+++ b/drivers/phy/bcm6368-usbh-phy.c
@@ -7,7 +7,6 @@
* Copyright 2013 Florian Fainelli <florian@openwrt.org>
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <generic-phy.h>
diff --git a/drivers/phy/cadence/phy-cadence-sierra.c b/drivers/phy/cadence/phy-cadence-sierra.c
index 4bb8a0c..f5e23f3 100644
--- a/drivers/phy/cadence/phy-cadence-sierra.c
+++ b/drivers/phy/cadence/phy-cadence-sierra.c
@@ -11,7 +11,6 @@
* Jean-Jacques Hiblot <jjhiblot@ti.com>
*
*/
-#include <common.h>
#include <clk.h>
#include <linux/delay.h>
#include <linux/clk-provider.h>
diff --git a/drivers/phy/cadence/phy-cadence-torrent.c b/drivers/phy/cadence/phy-cadence-torrent.c
index ef924e7..d4e8ece 100644
--- a/drivers/phy/cadence/phy-cadence-torrent.c
+++ b/drivers/phy/cadence/phy-cadence-torrent.c
@@ -10,7 +10,6 @@
*
*/
-#include <common.h>
#include <clk.h>
#include <generic-phy.h>
#include <reset.h>
diff --git a/drivers/phy/keystone-usb-phy.c b/drivers/phy/keystone-usb-phy.c
index 3bb9c08..cfc1520 100644
--- a/drivers/phy/keystone-usb-phy.c
+++ b/drivers/phy/keystone-usb-phy.c
@@ -4,7 +4,6 @@
* Written by Jean-Jacques Hiblot <jjhiblot@ti.com>
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <dm/device.h>
diff --git a/drivers/phy/marvell/comphy_a3700.c b/drivers/phy/marvell/comphy_a3700.c
index c490dc6..bca325d 100644
--- a/drivers/phy/marvell/comphy_a3700.c
+++ b/drivers/phy/marvell/comphy_a3700.c
@@ -3,7 +3,6 @@
* Copyright (C) 2015-2016 Marvell International Ltd.
*/
-#include <common.h>
#include <fdt_support.h>
#include <log.h>
#include <asm/global_data.h>
diff --git a/drivers/phy/marvell/comphy_core.c b/drivers/phy/marvell/comphy_core.c
index 7272dfb..a666a4e 100644
--- a/drivers/phy/marvell/comphy_core.c
+++ b/drivers/phy/marvell/comphy_core.c
@@ -5,7 +5,6 @@
* Copyright (C) 2016 Stefan Roese <sr@denx.de>
*/
-#include <common.h>
#include <dm.h>
#include <fdtdec.h>
#include <asm/global_data.h>
diff --git a/drivers/phy/marvell/comphy_cp110.c b/drivers/phy/marvell/comphy_cp110.c
index bb15fba..b8cdedf 100644
--- a/drivers/phy/marvell/comphy_cp110.c
+++ b/drivers/phy/marvell/comphy_cp110.c
@@ -3,7 +3,6 @@
* Copyright (C) 2015-2016 Marvell International Ltd.
*/
-#include <common.h>
#include <fdtdec.h>
#include <log.h>
#include <asm/global_data.h>
@@ -12,6 +11,7 @@
#include <asm/arch/cpu.h>
#include <asm/arch/soc.h>
#include <linux/delay.h>
+#include <linux/errno.h>
#include <linux/printk.h>
#include "comphy_core.h"
diff --git a/drivers/phy/marvell/comphy_mux.c b/drivers/phy/marvell/comphy_mux.c
index 10981d2..a8aa37f 100644
--- a/drivers/phy/marvell/comphy_mux.c
+++ b/drivers/phy/marvell/comphy_mux.c
@@ -3,7 +3,6 @@
* Copyright (C) 2015-2016 Marvell International Ltd.
*/
-#include <common.h>
#include <log.h>
#include <asm/io.h>
diff --git a/drivers/phy/meson-axg-mipi-dphy.c b/drivers/phy/meson-axg-mipi-dphy.c
index faa1d9d..3f89de1 100644
--- a/drivers/phy/meson-axg-mipi-dphy.c
+++ b/drivers/phy/meson-axg-mipi-dphy.c
@@ -7,7 +7,6 @@
* Author: Neil Armstrong <narmstrong@baylibre.com>
*/
-#include <common.h>
#include <log.h>
#include <malloc.h>
#include <asm/io.h>
diff --git a/drivers/phy/meson-axg-mipi-pcie-analog.c b/drivers/phy/meson-axg-mipi-pcie-analog.c
index 236ea1c..731917c 100644
--- a/drivers/phy/meson-axg-mipi-pcie-analog.c
+++ b/drivers/phy/meson-axg-mipi-pcie-analog.c
@@ -7,7 +7,6 @@
* Author: Neil Armstrong <narmstrong@baylibre.com>
*/
-#include <common.h>
#include <log.h>
#include <malloc.h>
#include <asm/io.h>
diff --git a/drivers/phy/meson-g12a-usb2.c b/drivers/phy/meson-g12a-usb2.c
index 3958d24..8cded12 100644
--- a/drivers/phy/meson-g12a-usb2.c
+++ b/drivers/phy/meson-g12a-usb2.c
@@ -7,7 +7,6 @@
* Author: Neil Armstrong <narmstron@baylibre.com>
*/
-#include <common.h>
#include <log.h>
#include <malloc.h>
#include <asm/io.h>
diff --git a/drivers/phy/meson-g12a-usb3-pcie.c b/drivers/phy/meson-g12a-usb3-pcie.c
index 1eaff41..4d18386 100644
--- a/drivers/phy/meson-g12a-usb3-pcie.c
+++ b/drivers/phy/meson-g12a-usb3-pcie.c
@@ -7,7 +7,6 @@
* Author: Neil Armstrong <narmstron@baylibre.com>
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <malloc.h>
diff --git a/drivers/phy/meson-gxbb-usb2.c b/drivers/phy/meson-gxbb-usb2.c
index 725b056..4c88ccf 100644
--- a/drivers/phy/meson-gxbb-usb2.c
+++ b/drivers/phy/meson-gxbb-usb2.c
@@ -8,7 +8,6 @@
* Author: Beniamino Galvani <b.galvani@gmail.com>
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <generic-phy.h>
diff --git a/drivers/phy/meson-gxl-usb2.c b/drivers/phy/meson-gxl-usb2.c
index d633eff..92c2851 100644
--- a/drivers/phy/meson-gxl-usb2.c
+++ b/drivers/phy/meson-gxl-usb2.c
@@ -7,7 +7,6 @@
* Author: Neil Armstrong <narmstron@baylibre.com>
*/
-#include <common.h>
#include <malloc.h>
#include <asm/io.h>
#include <bitfield.h>
diff --git a/drivers/phy/mt76x8-usb-phy.c b/drivers/phy/mt76x8-usb-phy.c
index 4069208..99f8a22 100644
--- a/drivers/phy/mt76x8-usb-phy.c
+++ b/drivers/phy/mt76x8-usb-phy.c
@@ -7,7 +7,6 @@
*/
#include <clk.h>
-#include <common.h>
#include <dm.h>
#include <generic-phy.h>
#include <log.h>
diff --git a/drivers/phy/nop-phy.c b/drivers/phy/nop-phy.c
index c53e321..286171c 100644
--- a/drivers/phy/nop-phy.c
+++ b/drivers/phy/nop-phy.c
@@ -5,7 +5,6 @@
*/
#include <clk.h>
-#include <common.h>
#include <dm.h>
#include <dm/device.h>
#include <dm/device_compat.h>
diff --git a/drivers/phy/omap-usb2-phy.c b/drivers/phy/omap-usb2-phy.c
index d3d3806..2be0178 100644
--- a/drivers/phy/omap-usb2-phy.c
+++ b/drivers/phy/omap-usb2-phy.c
@@ -6,7 +6,6 @@
* Written by Jean-Jacques Hiblot <jjhiblot@ti.com>
*/
-#include <common.h>
#include <asm/global_data.h>
#include <asm/io.h>
#include <dm.h>
diff --git a/drivers/phy/phy-ab8500-usb.c b/drivers/phy/phy-ab8500-usb.c
index 3d3d48c..5de7b6f 100644
--- a/drivers/phy/phy-ab8500-usb.c
+++ b/drivers/phy/phy-ab8500-usb.c
@@ -1,7 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+
/* Copyright (C) 2019 Stephan Gerhold */
-#include <common.h>
#include <dm.h>
#include <generic-phy.h>
#include <linux/bitops.h>
diff --git a/drivers/phy/phy-apple-atc.c b/drivers/phy/phy-apple-atc.c
index 15c5b8a..78eedf6 100644
--- a/drivers/phy/phy-apple-atc.c
+++ b/drivers/phy/phy-apple-atc.c
@@ -3,7 +3,6 @@
* Copyright (C) 2022 Mark Kettenis <kettenis@openbsd.org>
*/
-#include <common.h>
#include <dm.h>
#include <dm/device-internal.h>
#include <generic-phy.h>
diff --git a/drivers/phy/phy-bcm-sr-pcie.c b/drivers/phy/phy-bcm-sr-pcie.c
index cf33bab..97859a0 100644
--- a/drivers/phy/phy-bcm-sr-pcie.c
+++ b/drivers/phy/phy-bcm-sr-pcie.c
@@ -3,7 +3,6 @@
* Copyright (C) 2019 Broadcom
*/
-#include <common.h>
#include <dm.h>
#include <generic-phy.h>
#include <asm/io.h>
diff --git a/drivers/phy/phy-core-mipi-dphy.c b/drivers/phy/phy-core-mipi-dphy.c
index bb61816..8fb985a 100644
--- a/drivers/phy/phy-core-mipi-dphy.c
+++ b/drivers/phy/phy-core-mipi-dphy.c
@@ -4,8 +4,8 @@
* Copyright (C) 2018 Cadence Design Systems Inc.
*/
-#include <common.h>
#include <div64.h>
+#include <linux/kernel.h>
#include <linux/time.h>
#include <phy-mipi-dphy.h>
diff --git a/drivers/phy/phy-da8xx-usb.c b/drivers/phy/phy-da8xx-usb.c
index d025188..cf26aaa 100644
--- a/drivers/phy/phy-da8xx-usb.c
+++ b/drivers/phy/phy-da8xx-usb.c
@@ -6,9 +6,9 @@
* DT support added by: Adam Ford <aford173@gmail.com>
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
+#include <time.h>
#include <dm/device-internal.h>
#include <dm/lists.h>
#include <asm/arch/hardware.h>
diff --git a/drivers/phy/phy-imx8mq-usb.c b/drivers/phy/phy-imx8mq-usb.c
index e5e96e7..7576304 100644
--- a/drivers/phy/phy-imx8mq-usb.c
+++ b/drivers/phy/phy-imx8mq-usb.c
@@ -4,7 +4,6 @@
*
*/
-#include <common.h>
#include <asm/io.h>
#include <dm.h>
#include <errno.h>
diff --git a/drivers/phy/phy-mtk-tphy.c b/drivers/phy/phy-mtk-tphy.c
index ea9edf2..6f9ac15 100644
--- a/drivers/phy/phy-mtk-tphy.c
+++ b/drivers/phy/phy-mtk-tphy.c
@@ -5,7 +5,6 @@
* Ryder Lee <ryder.lee@mediatek.com>
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <generic-phy.h>
diff --git a/drivers/phy/phy-npcm-usb.c b/drivers/phy/phy-npcm-usb.c
index 24eba66..028fedf 100644
--- a/drivers/phy/phy-npcm-usb.c
+++ b/drivers/phy/phy-npcm-usb.c
@@ -3,7 +3,6 @@
* Copyright (c) 2021 Nuvoton Technology Corp.
*/
-#include <common.h>
#include <dm.h>
#include <generic-phy.h>
#include <regmap.h>
diff --git a/drivers/phy/phy-rcar-gen2.c b/drivers/phy/phy-rcar-gen2.c
index e528c4e..f9428c7 100644
--- a/drivers/phy/phy-rcar-gen2.c
+++ b/drivers/phy/phy-rcar-gen2.c
@@ -5,7 +5,6 @@
* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
*/
-#include <common.h>
#include <clk.h>
#include <div64.h>
#include <dm.h>
diff --git a/drivers/phy/phy-rcar-gen3.c b/drivers/phy/phy-rcar-gen3.c
index 03c747b..7c292ca 100644
--- a/drivers/phy/phy-rcar-gen3.c
+++ b/drivers/phy/phy-rcar-gen3.c
@@ -5,7 +5,6 @@
* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
*/
-#include <common.h>
#include <clk.h>
#include <div64.h>
#include <dm.h>
diff --git a/drivers/phy/phy-stm32-usbphyc.c b/drivers/phy/phy-stm32-usbphyc.c
index 000e495..8d643b7 100644
--- a/drivers/phy/phy-stm32-usbphyc.c
+++ b/drivers/phy/phy-stm32-usbphyc.c
@@ -5,7 +5,6 @@
#define LOG_CATEGORY UCLASS_PHY
-#include <common.h>
#include <clk.h>
#include <clk-uclass.h>
#include <div64.h>
diff --git a/drivers/phy/phy-ti-am654.c b/drivers/phy/phy-ti-am654.c
index 70a746d..c3d9972 100644
--- a/drivers/phy/phy-ti-am654.c
+++ b/drivers/phy/phy-ti-am654.c
@@ -6,7 +6,6 @@
* Author: Kishon Vijay Abraham I <kishon@ti.com>
*/
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <log.h>
diff --git a/drivers/phy/phy-uclass.c b/drivers/phy/phy-uclass.c
index 0dcfe25..acdcda1 100644
--- a/drivers/phy/phy-uclass.c
+++ b/drivers/phy/phy-uclass.c
@@ -6,7 +6,6 @@
#define LOG_CATEGORY UCLASS_PHY
-#include <common.h>
#include <dm.h>
#include <dm/device_compat.h>
#include <dm/devres.h>
diff --git a/drivers/phy/phy-zynqmp.c b/drivers/phy/phy-zynqmp.c
index d1288bb..7049e74 100644
--- a/drivers/phy/phy-zynqmp.c
+++ b/drivers/phy/phy-zynqmp.c
@@ -9,7 +9,6 @@
* Author: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
*/
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <generic-phy.h>
diff --git a/drivers/phy/qcom/Kconfig b/drivers/phy/qcom/Kconfig
index f4ca174..3aae181 100644
--- a/drivers/phy/qcom/Kconfig
+++ b/drivers/phy/qcom/Kconfig
@@ -12,6 +12,29 @@
help
Support for the USB PHY-s on Qualcomm IPQ40xx SoC-s.
+config PHY_QCOM_QUSB2
+ tristate "Qualcomm USB QUSB2 PHY driver"
+ depends on PHY && ARCH_SNAPDRAGON
+ help
+ Enable this to support the Super-Speed USB transceiver on various
+ Qualcomm chipsets.
+
+config PHY_QCOM_USB_SNPS_FEMTO_V2
+ tristate "Qualcomm SNPS FEMTO USB HS PHY v2"
+ depends on PHY && ARCH_SNAPDRAGON
+ help
+ Enable this to support the Qualcomm Synopsys DesignWare Core 7nm
+ High-Speed PHY driver. This driver supports the Hi-Speed PHY which
+ is usually paired with Synopsys DWC3 USB IPs on MSM SOCs.
+
+config PHY_QCOM_SNPS_EUSB2
+ tristate "Qualcomm Synopsys eUSB2 High-Speed PHY"
+ depends on PHY && ARCH_SNAPDRAGON
+ help
+ Enable this to support the Qualcomm Synopsys DesignWare eUSB2
+ High-Speed PHY driver. This driver supports the Hi-Speed PHY which
+ is usually paired with Synopsys DWC3 USB IPs on MSM SOCs.
+
config PHY_QCOM_USB_HS_28NM
tristate "Qualcomm 28nm High-Speed PHY"
depends on PHY && ARCH_SNAPDRAGON
diff --git a/drivers/phy/qcom/Makefile b/drivers/phy/qcom/Makefile
index 2113f17..a515306 100644
--- a/drivers/phy/qcom/Makefile
+++ b/drivers/phy/qcom/Makefile
@@ -1,4 +1,7 @@
obj-$(CONFIG_PHY_QCOM_IPQ4019_USB) += phy-qcom-ipq4019-usb.o
obj-$(CONFIG_MSM8916_USB_PHY) += msm8916-usbh-phy.o
+obj-$(CONFIG_PHY_QCOM_QUSB2) += phy-qcom-qusb2.o
+obj-$(CONFIG_PHY_QCOM_USB_SNPS_FEMTO_V2) += phy-qcom-snps-femto-v2.o
+obj-$(CONFIG_PHY_QCOM_SNPS_EUSB2) += phy-qcom-snps-eusb2.o
obj-$(CONFIG_PHY_QCOM_USB_HS_28NM) += phy-qcom-usb-hs-28nm.o
obj-$(CONFIG_PHY_QCOM_USB_SS) += phy-qcom-usb-ss.o
diff --git a/drivers/phy/qcom/msm8916-usbh-phy.c b/drivers/phy/qcom/msm8916-usbh-phy.c
index f52046f..4b435aa 100644
--- a/drivers/phy/qcom/msm8916-usbh-phy.c
+++ b/drivers/phy/qcom/msm8916-usbh-phy.c
@@ -3,7 +3,6 @@
* Copyright (C) 2018 Ramon Fried <ramon.fried@gmail.com>
*/
-#include <common.h>
#include <dm.h>
#include <generic-phy.h>
#include <linux/bitops.h>
diff --git a/drivers/phy/qcom/phy-qcom-ipq4019-usb.c b/drivers/phy/qcom/phy-qcom-ipq4019-usb.c
index 5808489..3b64732 100644
--- a/drivers/phy/qcom/phy-qcom-ipq4019-usb.c
+++ b/drivers/phy/qcom/phy-qcom-ipq4019-usb.c
@@ -8,7 +8,6 @@
*/
#include <clk.h>
-#include <common.h>
#include <dm.h>
#include <generic-phy.h>
#include <log.h>
diff --git a/drivers/phy/qcom/phy-qcom-qusb2.c b/drivers/phy/qcom/phy-qcom-qusb2.c
new file mode 100644
index 0000000..c91ba18
--- /dev/null
+++ b/drivers/phy/qcom/phy-qcom-qusb2.c
@@ -0,0 +1,429 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2023 Bhupesh Sharma <bhupesh.sharma@linaro.org>
+ *
+ * Based on Linux driver
+ */
+
+#include <dm.h>
+#include <generic-phy.h>
+#include <linux/bitops.h>
+#include <asm/io.h>
+#include <reset.h>
+#include <clk.h>
+#include <linux/delay.h>
+
+#include <dt-bindings/phy/phy-qcom-qusb2.h>
+
+#define QUSB2PHY_PLL 0x0
+#define QUSB2PHY_PLL_TEST 0x04
+#define CLK_REF_SEL BIT(7)
+
+#define QUSB2PHY_PLL_TUNE 0x08
+#define QUSB2PHY_PLL_USER_CTL1 0x0c
+#define QUSB2PHY_PLL_USER_CTL2 0x10
+#define QUSB2PHY_PLL_AUTOPGM_CTL1 0x1c
+#define QUSB2PHY_PLL_PWR_CTRL 0x18
+
+/* QUSB2PHY_PLL_STATUS register bits */
+#define PLL_LOCKED BIT(5)
+
+/* QUSB2PHY_PLL_COMMON_STATUS_ONE register bits */
+#define CORE_READY_STATUS BIT(0)
+
+/* QUSB2PHY_PORT_POWERDOWN register bits */
+#define CLAMP_N_EN BIT(5)
+#define FREEZIO_N BIT(1)
+#define POWER_DOWN BIT(0)
+
+/* QUSB2PHY_PWR_CTRL1 register bits */
+#define PWR_CTRL1_VREF_SUPPLY_TRIM BIT(5)
+#define PWR_CTRL1_CLAMP_N_EN BIT(1)
+
+#define QUSB2PHY_REFCLK_ENABLE BIT(0)
+
+#define PHY_CLK_SCHEME_SEL BIT(0)
+
+/* QUSB2PHY_INTR_CTRL register bits */
+#define DMSE_INTR_HIGH_SEL BIT(4)
+#define DPSE_INTR_HIGH_SEL BIT(3)
+#define CHG_DET_INTR_EN BIT(2)
+#define DMSE_INTR_EN BIT(1)
+#define DPSE_INTR_EN BIT(0)
+
+/* QUSB2PHY_PLL_CORE_INPUT_OVERRIDE register bits */
+#define CORE_PLL_EN_FROM_RESET BIT(4)
+#define CORE_RESET BIT(5)
+#define CORE_RESET_MUX BIT(6)
+
+/* QUSB2PHY_IMP_CTRL1 register bits */
+#define IMP_RES_OFFSET_MASK GENMASK(5, 0)
+#define IMP_RES_OFFSET_SHIFT 0x0
+
+/* QUSB2PHY_PLL_BIAS_CONTROL_2 register bits */
+#define BIAS_CTRL2_RES_OFFSET_MASK GENMASK(5, 0)
+#define BIAS_CTRL2_RES_OFFSET_SHIFT 0x0
+
+/* QUSB2PHY_CHG_CONTROL_2 register bits */
+#define CHG_CTRL2_OFFSET_MASK GENMASK(5, 4)
+#define CHG_CTRL2_OFFSET_SHIFT 0x4
+
+/* QUSB2PHY_PORT_TUNE1 register bits */
+#define HSTX_TRIM_MASK GENMASK(7, 4)
+#define HSTX_TRIM_SHIFT 0x4
+#define PREEMPH_WIDTH_HALF_BIT BIT(2)
+#define PREEMPHASIS_EN_MASK GENMASK(1, 0)
+#define PREEMPHASIS_EN_SHIFT 0x0
+
+/* QUSB2PHY_PORT_TUNE2 register bits */
+#define HSDISC_TRIM_MASK GENMASK(1, 0)
+#define HSDISC_TRIM_SHIFT 0x0
+
+#define QUSB2PHY_PLL_ANALOG_CONTROLS_TWO 0x04
+#define QUSB2PHY_PLL_CLOCK_INVERTERS 0x18c
+#define QUSB2PHY_PLL_CMODE 0x2c
+#define QUSB2PHY_PLL_LOCK_DELAY 0x184
+#define QUSB2PHY_PLL_DIGITAL_TIMERS_TWO 0xb4
+#define QUSB2PHY_PLL_BIAS_CONTROL_1 0x194
+#define QUSB2PHY_PLL_BIAS_CONTROL_2 0x198
+#define QUSB2PHY_PWR_CTRL2 0x214
+#define QUSB2PHY_IMP_CTRL1 0x220
+#define QUSB2PHY_IMP_CTRL2 0x224
+#define QUSB2PHY_CHG_CTRL2 0x23c
+
+struct qusb2_phy_init_tbl {
+ unsigned int offset;
+ unsigned int val;
+ /*
+ * register part of layout ?
+ * if yes, then offset gives index in the reg-layout
+ */
+ int in_layout;
+};
+
+struct qusb2_phy_cfg {
+ const struct qusb2_phy_init_tbl *tbl;
+ /* number of entries in the table */
+ unsigned int tbl_num;
+ /* offset to PHY_CLK_SCHEME register in TCSR map */
+ unsigned int clk_scheme_offset;
+
+ /* array of registers with different offsets */
+ const unsigned int *regs;
+ unsigned int mask_core_ready;
+ unsigned int disable_ctrl;
+ unsigned int autoresume_en;
+
+ /* true if PHY has PLL_TEST register to select clk_scheme */
+ bool has_pll_test;
+
+ /* true if TUNE1 register must be updated by fused value, else TUNE2 */
+ bool update_tune1_with_efuse;
+
+ /* true if PHY has PLL_CORE_INPUT_OVERRIDE register to reset PLL */
+ bool has_pll_override;
+};
+
+/* set of registers with offsets different per-PHY */
+enum qusb2phy_reg_layout {
+ QUSB2PHY_PLL_CORE_INPUT_OVERRIDE,
+ QUSB2PHY_PLL_STATUS,
+ QUSB2PHY_PORT_TUNE1,
+ QUSB2PHY_PORT_TUNE2,
+ QUSB2PHY_PORT_TUNE3,
+ QUSB2PHY_PORT_TUNE4,
+ QUSB2PHY_PORT_TUNE5,
+ QUSB2PHY_PORT_TEST1,
+ QUSB2PHY_PORT_TEST2,
+ QUSB2PHY_PORT_POWERDOWN,
+ QUSB2PHY_INTR_CTRL,
+};
+
+#define QUSB2_PHY_INIT_CFG(o, v) \
+ { \
+ .offset = o, .val = v, \
+ }
+
+#define QUSB2_PHY_INIT_CFG_L(o, v) \
+ { \
+ .offset = o, .val = v, .in_layout = 1, \
+ }
+
+static const struct qusb2_phy_init_tbl sm6115_init_tbl[] = {
+ QUSB2_PHY_INIT_CFG_L(QUSB2PHY_PORT_TUNE1, 0xf8),
+ QUSB2_PHY_INIT_CFG_L(QUSB2PHY_PORT_TUNE2, 0x53),
+ QUSB2_PHY_INIT_CFG_L(QUSB2PHY_PORT_TUNE3, 0x81),
+ QUSB2_PHY_INIT_CFG_L(QUSB2PHY_PORT_TUNE4, 0x17),
+
+ QUSB2_PHY_INIT_CFG(QUSB2PHY_PLL_TUNE, 0x30),
+ QUSB2_PHY_INIT_CFG(QUSB2PHY_PLL_USER_CTL1, 0x79),
+ QUSB2_PHY_INIT_CFG(QUSB2PHY_PLL_USER_CTL2, 0x21),
+
+ QUSB2_PHY_INIT_CFG_L(QUSB2PHY_PORT_TEST2, 0x14),
+
+ QUSB2_PHY_INIT_CFG(QUSB2PHY_PLL_AUTOPGM_CTL1, 0x9f),
+ QUSB2_PHY_INIT_CFG(QUSB2PHY_PLL_PWR_CTRL, 0x00),
+};
+
+static const unsigned int sm6115_regs_layout[] = {
+ [QUSB2PHY_PLL_STATUS] = 0x38, [QUSB2PHY_PORT_TUNE1] = 0x80,
+ [QUSB2PHY_PORT_TUNE2] = 0x84, [QUSB2PHY_PORT_TUNE3] = 0x88,
+ [QUSB2PHY_PORT_TUNE4] = 0x8c, [QUSB2PHY_PORT_TUNE5] = 0x90,
+ [QUSB2PHY_PORT_TEST1] = 0xb8, [QUSB2PHY_PORT_TEST2] = 0x9c,
+ [QUSB2PHY_PORT_POWERDOWN] = 0xb4, [QUSB2PHY_INTR_CTRL] = 0xbc,
+};
+
+static const struct qusb2_phy_init_tbl qusb2_v2_init_tbl[] = {
+ QUSB2_PHY_INIT_CFG(QUSB2PHY_PLL_ANALOG_CONTROLS_TWO, 0x03),
+ QUSB2_PHY_INIT_CFG(QUSB2PHY_PLL_CLOCK_INVERTERS, 0x7c),
+ QUSB2_PHY_INIT_CFG(QUSB2PHY_PLL_CMODE, 0x80),
+ QUSB2_PHY_INIT_CFG(QUSB2PHY_PLL_LOCK_DELAY, 0x0a),
+ QUSB2_PHY_INIT_CFG(QUSB2PHY_PLL_DIGITAL_TIMERS_TWO, 0x19),
+ QUSB2_PHY_INIT_CFG(QUSB2PHY_PLL_BIAS_CONTROL_1, 0x40),
+ QUSB2_PHY_INIT_CFG(QUSB2PHY_PLL_BIAS_CONTROL_2, 0x20),
+ QUSB2_PHY_INIT_CFG(QUSB2PHY_PWR_CTRL2, 0x21),
+ QUSB2_PHY_INIT_CFG(QUSB2PHY_IMP_CTRL1, 0x0),
+ QUSB2_PHY_INIT_CFG(QUSB2PHY_IMP_CTRL2, 0x58),
+
+ QUSB2_PHY_INIT_CFG_L(QUSB2PHY_PORT_TUNE1, 0x30),
+ QUSB2_PHY_INIT_CFG_L(QUSB2PHY_PORT_TUNE2, 0x29),
+ QUSB2_PHY_INIT_CFG_L(QUSB2PHY_PORT_TUNE3, 0xca),
+ QUSB2_PHY_INIT_CFG_L(QUSB2PHY_PORT_TUNE4, 0x04),
+ QUSB2_PHY_INIT_CFG_L(QUSB2PHY_PORT_TUNE5, 0x03),
+
+ QUSB2_PHY_INIT_CFG(QUSB2PHY_CHG_CTRL2, 0x0),
+};
+
+static const unsigned int qusb2_v2_regs_layout[] = {
+ [QUSB2PHY_PLL_CORE_INPUT_OVERRIDE] = 0xa8,
+ [QUSB2PHY_PLL_STATUS] = 0x1a0,
+ [QUSB2PHY_PORT_TUNE1] = 0x240,
+ [QUSB2PHY_PORT_TUNE2] = 0x244,
+ [QUSB2PHY_PORT_TUNE3] = 0x248,
+ [QUSB2PHY_PORT_TUNE4] = 0x24c,
+ [QUSB2PHY_PORT_TUNE5] = 0x250,
+ [QUSB2PHY_PORT_TEST1] = 0x254,
+ [QUSB2PHY_PORT_TEST2] = 0x258,
+ [QUSB2PHY_PORT_POWERDOWN] = 0x210,
+ [QUSB2PHY_INTR_CTRL] = 0x230,
+};
+
+static const struct qusb2_phy_cfg sm6115_phy_cfg = {
+ .tbl = sm6115_init_tbl,
+ .tbl_num = ARRAY_SIZE(sm6115_init_tbl),
+ .regs = sm6115_regs_layout,
+
+ .has_pll_test = true,
+ .disable_ctrl = (CLAMP_N_EN | FREEZIO_N | POWER_DOWN),
+ .mask_core_ready = PLL_LOCKED,
+ .autoresume_en = BIT(3),
+};
+
+static const struct qusb2_phy_cfg qusb2_v2_phy_cfg = {
+ .tbl = qusb2_v2_init_tbl,
+ .tbl_num = ARRAY_SIZE(qusb2_v2_init_tbl),
+ .regs = qusb2_v2_regs_layout,
+
+ .disable_ctrl = (PWR_CTRL1_VREF_SUPPLY_TRIM | PWR_CTRL1_CLAMP_N_EN |
+ POWER_DOWN),
+ .mask_core_ready = CORE_READY_STATUS,
+ .has_pll_override = true,
+ .autoresume_en = BIT(0),
+ .update_tune1_with_efuse = true,
+};
+
+/**
+ * struct qusb2_phy - structure holding qusb2 phy attributes
+ *
+ * @phy: generic phy
+ * @base: iomapped memory space for qubs2 phy
+ *
+ * @cfg_ahb_clk: AHB2PHY interface clock
+ * @phy_rst: phy reset control
+ *
+ * @cfg: phy config data
+ * @has_se_clk_scheme: indicate if PHY has single-ended ref clock scheme
+ */
+struct qusb2_phy {
+ struct phy *phy;
+ void __iomem *base;
+
+ struct clk cfg_ahb_clk;
+ struct reset_ctl phy_rst;
+
+ const struct qusb2_phy_cfg *cfg;
+ bool has_se_clk_scheme;
+};
+
+static inline void qusb2_phy_configure(void __iomem *base,
+ const unsigned int *regs,
+ const struct qusb2_phy_init_tbl tbl[],
+ int num)
+{
+ int i;
+
+ for (i = 0; i < num; i++) {
+ if (tbl[i].in_layout)
+ writel(tbl[i].val, base + regs[tbl[i].offset]);
+ else
+ writel(tbl[i].val, base + tbl[i].offset);
+ }
+}
+
+static int qusb2phy_do_reset(struct qusb2_phy *qphy)
+{
+ int ret;
+
+ ret = reset_assert(&qphy->phy_rst);
+ if (ret)
+ return ret;
+
+ udelay(500);
+
+ ret = reset_deassert(&qphy->phy_rst);
+ if (ret)
+ return ret;
+
+ return 0;
+}
+
+static int qusb2phy_power_on(struct phy *phy)
+{
+ struct qusb2_phy *qphy = dev_get_priv(phy->dev);
+ const struct qusb2_phy_cfg *cfg = qphy->cfg;
+ int ret;
+ u32 val;
+
+ ret = qusb2phy_do_reset(qphy);
+ if (ret)
+ return ret;
+
+ /* Disable the PHY */
+ setbits_le32(qphy->base + cfg->regs[QUSB2PHY_PORT_POWERDOWN],
+ qphy->cfg->disable_ctrl);
+
+ if (cfg->has_pll_test) {
+ /* save reset value to override reference clock scheme later */
+ val = readl(qphy->base + QUSB2PHY_PLL_TEST);
+ }
+
+ qusb2_phy_configure(qphy->base, cfg->regs, cfg->tbl, cfg->tbl_num);
+
+ /* Enable the PHY */
+ clrbits_le32(qphy->base + cfg->regs[QUSB2PHY_PORT_POWERDOWN],
+ POWER_DOWN);
+
+ /* Required to get phy pll lock successfully */
+ udelay(150);
+
+ if (cfg->has_pll_test) {
+ val |= CLK_REF_SEL;
+
+ writel(val, qphy->base + QUSB2PHY_PLL_TEST);
+
+ /* ensure above write is through */
+ readl(qphy->base + QUSB2PHY_PLL_TEST);
+ }
+
+ /* Required to get phy pll lock successfully */
+ udelay(100);
+
+ val = readb(qphy->base + cfg->regs[QUSB2PHY_PLL_STATUS]);
+ if (!(val & cfg->mask_core_ready)) {
+ pr_err("QUSB2PHY pll lock failed: status reg = %x\n", val);
+ ret = -EBUSY;
+ return ret;
+ }
+
+ return 0;
+}
+
+static int qusb2phy_power_off(struct phy *phy)
+{
+ struct qusb2_phy *qphy = dev_get_priv(phy->dev);
+
+ /* Disable the PHY */
+ setbits_le32(qphy->base + qphy->cfg->regs[QUSB2PHY_PORT_POWERDOWN],
+ qphy->cfg->disable_ctrl);
+
+ reset_assert(&qphy->phy_rst);
+
+ clk_disable(&qphy->cfg_ahb_clk);
+
+ return 0;
+}
+
+static int qusb2phy_clk_init(struct udevice *dev, struct qusb2_phy *qphy)
+{
+ int ret;
+
+ /* We ignore the ref clock as we currently lack a driver for rpmcc/rpmhcc where
+ * it usually comes from - we assume it's always on.
+ */
+ ret = clk_get_by_name(dev, "cfg_ahb", &qphy->cfg_ahb_clk);
+ if (ret == -ENOSYS || ret == -ENOENT)
+ return 0;
+ if (ret)
+ return ret;
+
+ ret = clk_enable(&qphy->cfg_ahb_clk);
+ if (ret)
+ return ret;
+
+ return 0;
+}
+
+static int qusb2phy_probe(struct udevice *dev)
+{
+ struct qusb2_phy *qphy = dev_get_priv(dev);
+ int ret;
+
+ qphy->base = (void __iomem *)dev_read_addr(dev);
+ if (IS_ERR(qphy->base))
+ return PTR_ERR(qphy->base);
+
+ ret = qusb2phy_clk_init(dev, qphy);
+ if (ret) {
+ printf("%s: Couldn't get clocks: %d\n", __func__, ret);
+ return ret;
+ }
+
+ ret = reset_get_by_index(dev, 0, &qphy->phy_rst);
+ if (ret) {
+ printf("%s: Couldn't get resets: %d\n", __func__, ret);
+ return ret;
+ }
+
+ qphy->cfg = (const struct qusb2_phy_cfg *)dev_get_driver_data(dev);
+ if (!qphy->cfg) {
+ printf("%s: Couldn't get driver data\n", __func__);
+ return -EINVAL;
+ }
+
+ debug("%s success qusb phy cfg %p\n", __func__, qphy->cfg);
+ return 0;
+}
+
+static struct phy_ops qusb2phy_ops = {
+ .power_on = qusb2phy_power_on,
+ .power_off = qusb2phy_power_off,
+};
+
+static const struct udevice_id qusb2phy_ids[] = {
+ { .compatible = "qcom,qusb2-phy" },
+ { .compatible = "qcom,qcm2290-qusb2-phy",
+ .data = (ulong)&sm6115_phy_cfg },
+ { .compatible = "qcom,sm6115-qusb2-phy",
+ .data = (ulong)&sm6115_phy_cfg },
+ { .compatible = "qcom,qusb2-v2-phy", .data = (ulong)&qusb2_v2_phy_cfg },
+ {}
+};
+
+U_BOOT_DRIVER(qcom_qusb2_phy) = {
+ .name = "qcom-qusb2-phy",
+ .id = UCLASS_PHY,
+ .of_match = qusb2phy_ids,
+ .ops = &qusb2phy_ops,
+ .probe = qusb2phy_probe,
+ .priv_auto = sizeof(struct qusb2_phy),
+};
diff --git a/drivers/phy/qcom/phy-qcom-snps-eusb2.c b/drivers/phy/qcom/phy-qcom-snps-eusb2.c
new file mode 100644
index 0000000..b2655ac
--- /dev/null
+++ b/drivers/phy/qcom/phy-qcom-snps-eusb2.c
@@ -0,0 +1,366 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2023-2024, Linaro Limited
+ *
+ * Based on the Linux phy-qcom-snps-eusb2.c driver
+ */
+
+#include <clk.h>
+#include <clk-uclass.h>
+#include <dm.h>
+#include <dm/device_compat.h>
+#include <dm/devres.h>
+#include <generic-phy.h>
+#include <malloc.h>
+#include <reset.h>
+
+#include <asm/io.h>
+#include <linux/bitops.h>
+#include <linux/bitfield.h>
+#include <linux/clk-provider.h>
+#include <linux/delay.h>
+
+#define USB_PHY_UTMI_CTRL0 (0x3c)
+#define SLEEPM BIT(0)
+#define OPMODE_MASK GENMASK(4, 3)
+#define OPMODE_NONDRIVING BIT(3)
+
+#define USB_PHY_UTMI_CTRL5 (0x50)
+#define POR BIT(1)
+
+#define USB_PHY_HS_PHY_CTRL_COMMON0 (0x54)
+#define PHY_ENABLE BIT(0)
+#define SIDDQ_SEL BIT(1)
+#define SIDDQ BIT(2)
+#define RETENABLEN BIT(3)
+#define FSEL_MASK GENMASK(6, 4)
+#define FSEL_19_2_MHZ_VAL (0x0)
+#define FSEL_38_4_MHZ_VAL (0x4)
+
+#define USB_PHY_CFG_CTRL_1 (0x58)
+#define PHY_CFG_PLL_CPBIAS_CNTRL_MASK GENMASK(7, 1)
+
+#define USB_PHY_CFG_CTRL_2 (0x5c)
+#define PHY_CFG_PLL_FB_DIV_7_0_MASK GENMASK(7, 0)
+#define DIV_7_0_19_2_MHZ_VAL (0x90)
+#define DIV_7_0_38_4_MHZ_VAL (0xc8)
+
+#define USB_PHY_CFG_CTRL_3 (0x60)
+#define PHY_CFG_PLL_FB_DIV_11_8_MASK GENMASK(3, 0)
+#define DIV_11_8_19_2_MHZ_VAL (0x1)
+#define DIV_11_8_38_4_MHZ_VAL (0x0)
+
+#define PHY_CFG_PLL_REF_DIV GENMASK(7, 4)
+#define PLL_REF_DIV_VAL (0x0)
+
+#define USB_PHY_HS_PHY_CTRL2 (0x64)
+#define VBUSVLDEXT0 BIT(0)
+#define USB2_SUSPEND_N BIT(2)
+#define USB2_SUSPEND_N_SEL BIT(3)
+#define VBUS_DET_EXT_SEL BIT(4)
+
+#define USB_PHY_CFG_CTRL_4 (0x68)
+#define PHY_CFG_PLL_GMP_CNTRL_MASK GENMASK(1, 0)
+#define PHY_CFG_PLL_INT_CNTRL_MASK GENMASK(7, 2)
+
+#define USB_PHY_CFG_CTRL_5 (0x6c)
+#define PHY_CFG_PLL_PROP_CNTRL_MASK GENMASK(4, 0)
+#define PHY_CFG_PLL_VREF_TUNE_MASK GENMASK(7, 6)
+
+#define USB_PHY_CFG_CTRL_6 (0x70)
+#define PHY_CFG_PLL_VCO_CNTRL_MASK GENMASK(2, 0)
+
+#define USB_PHY_CFG_CTRL_7 (0x74)
+
+#define USB_PHY_CFG_CTRL_8 (0x78)
+#define PHY_CFG_TX_FSLS_VREF_TUNE_MASK GENMASK(1, 0)
+#define PHY_CFG_TX_FSLS_VREG_BYPASS BIT(2)
+#define PHY_CFG_TX_HS_VREF_TUNE_MASK GENMASK(5, 3)
+#define PHY_CFG_TX_HS_XV_TUNE_MASK GENMASK(7, 6)
+
+#define USB_PHY_CFG_CTRL_9 (0x7c)
+#define PHY_CFG_TX_PREEMP_TUNE_MASK GENMASK(2, 0)
+#define PHY_CFG_TX_RES_TUNE_MASK GENMASK(4, 3)
+#define PHY_CFG_TX_RISE_TUNE_MASK GENMASK(6, 5)
+#define PHY_CFG_RCAL_BYPASS BIT(7)
+
+#define USB_PHY_CFG_CTRL_10 (0x80)
+
+#define USB_PHY_CFG0 (0x94)
+#define DATAPATH_CTRL_OVERRIDE_EN BIT(0)
+#define CMN_CTRL_OVERRIDE_EN BIT(1)
+
+#define UTMI_PHY_CMN_CTRL0 (0x98)
+#define TESTBURNIN BIT(6)
+
+#define USB_PHY_FSEL_SEL (0xb8)
+#define FSEL_SEL BIT(0)
+
+#define USB_PHY_APB_ACCESS_CMD (0x130)
+#define RW_ACCESS BIT(0)
+#define APB_START_CMD BIT(1)
+#define APB_LOGIC_RESET BIT(2)
+
+#define USB_PHY_APB_ACCESS_STATUS (0x134)
+#define ACCESS_DONE BIT(0)
+#define TIMED_OUT BIT(1)
+#define ACCESS_ERROR BIT(2)
+#define ACCESS_IN_PROGRESS BIT(3)
+
+#define USB_PHY_APB_ADDRESS (0x138)
+#define APB_REG_ADDR_MASK GENMASK(7, 0)
+
+#define USB_PHY_APB_WRDATA_LSB (0x13c)
+#define APB_REG_WRDATA_7_0_MASK GENMASK(3, 0)
+
+#define USB_PHY_APB_WRDATA_MSB (0x140)
+#define APB_REG_WRDATA_15_8_MASK GENMASK(7, 4)
+
+#define USB_PHY_APB_RDDATA_LSB (0x144)
+#define APB_REG_RDDATA_7_0_MASK GENMASK(3, 0)
+
+#define USB_PHY_APB_RDDATA_MSB (0x148)
+#define APB_REG_RDDATA_15_8_MASK GENMASK(7, 4)
+
+struct qcom_snps_eusb2_phy_priv {
+ void __iomem *base;
+ struct clk *ref_clk;
+ struct reset_ctl_bulk resets;
+};
+
+static void qcom_snps_eusb2_hsphy_write_mask(void __iomem *base, u32 offset,
+ u32 mask, u32 val)
+{
+ u32 reg;
+
+ reg = readl_relaxed(base + offset);
+ reg &= ~mask;
+ reg |= val & mask;
+ writel_relaxed(reg, base + offset);
+
+ /* Ensure above write is completed */
+ readl_relaxed(base + offset);
+}
+
+static void qcom_eusb2_default_parameters(struct qcom_snps_eusb2_phy_priv *qcom_snps_eusb2)
+{
+ /* default parameters: tx pre-emphasis */
+ qcom_snps_eusb2_hsphy_write_mask(qcom_snps_eusb2->base, USB_PHY_CFG_CTRL_9,
+ PHY_CFG_TX_PREEMP_TUNE_MASK,
+ FIELD_PREP(PHY_CFG_TX_PREEMP_TUNE_MASK, 0));
+
+ /* tx rise/fall time */
+ qcom_snps_eusb2_hsphy_write_mask(qcom_snps_eusb2->base, USB_PHY_CFG_CTRL_9,
+ PHY_CFG_TX_RISE_TUNE_MASK,
+ FIELD_PREP(PHY_CFG_TX_RISE_TUNE_MASK, 0x2));
+
+ /* source impedance adjustment */
+ qcom_snps_eusb2_hsphy_write_mask(qcom_snps_eusb2->base, USB_PHY_CFG_CTRL_9,
+ PHY_CFG_TX_RES_TUNE_MASK,
+ FIELD_PREP(PHY_CFG_TX_RES_TUNE_MASK, 0x1));
+
+ /* dc voltage level adjustement */
+ qcom_snps_eusb2_hsphy_write_mask(qcom_snps_eusb2->base, USB_PHY_CFG_CTRL_8,
+ PHY_CFG_TX_HS_VREF_TUNE_MASK,
+ FIELD_PREP(PHY_CFG_TX_HS_VREF_TUNE_MASK, 0x3));
+
+ /* transmitter HS crossover adjustement */
+ qcom_snps_eusb2_hsphy_write_mask(qcom_snps_eusb2->base, USB_PHY_CFG_CTRL_8,
+ PHY_CFG_TX_HS_XV_TUNE_MASK,
+ FIELD_PREP(PHY_CFG_TX_HS_XV_TUNE_MASK, 0x0));
+}
+
+static int qcom_eusb2_ref_clk_init(struct qcom_snps_eusb2_phy_priv *qcom_snps_eusb2)
+{
+ unsigned long ref_clk_freq = clk_get_rate(qcom_snps_eusb2->ref_clk);
+
+ switch (ref_clk_freq) {
+ case 19200000:
+ qcom_snps_eusb2_hsphy_write_mask(qcom_snps_eusb2->base, USB_PHY_HS_PHY_CTRL_COMMON0,
+ FSEL_MASK,
+ FIELD_PREP(FSEL_MASK, FSEL_19_2_MHZ_VAL));
+
+ qcom_snps_eusb2_hsphy_write_mask(qcom_snps_eusb2->base, USB_PHY_CFG_CTRL_2,
+ PHY_CFG_PLL_FB_DIV_7_0_MASK,
+ DIV_7_0_19_2_MHZ_VAL);
+
+ qcom_snps_eusb2_hsphy_write_mask(qcom_snps_eusb2->base, USB_PHY_CFG_CTRL_3,
+ PHY_CFG_PLL_FB_DIV_11_8_MASK,
+ DIV_11_8_19_2_MHZ_VAL);
+ break;
+
+ case 38400000:
+ qcom_snps_eusb2_hsphy_write_mask(qcom_snps_eusb2->base, USB_PHY_HS_PHY_CTRL_COMMON0,
+ FSEL_MASK,
+ FIELD_PREP(FSEL_MASK, FSEL_38_4_MHZ_VAL));
+
+ qcom_snps_eusb2_hsphy_write_mask(qcom_snps_eusb2->base, USB_PHY_CFG_CTRL_2,
+ PHY_CFG_PLL_FB_DIV_7_0_MASK,
+ DIV_7_0_38_4_MHZ_VAL);
+
+ qcom_snps_eusb2_hsphy_write_mask(qcom_snps_eusb2->base, USB_PHY_CFG_CTRL_3,
+ PHY_CFG_PLL_FB_DIV_11_8_MASK,
+ DIV_11_8_38_4_MHZ_VAL);
+ break;
+
+ default:
+ printf("%s: unsupported ref_clk_freq:%lu\n", __func__, ref_clk_freq);
+ return -EINVAL;
+ }
+
+ qcom_snps_eusb2_hsphy_write_mask(qcom_snps_eusb2->base, USB_PHY_CFG_CTRL_3,
+ PHY_CFG_PLL_REF_DIV, PLL_REF_DIV_VAL);
+
+ return 0;
+}
+
+static int qcom_snps_eusb2_usb_init(struct phy *phy)
+{
+ struct qcom_snps_eusb2_phy_priv *qcom_snps_eusb2 = dev_get_priv(phy->dev);
+ int ret;
+
+ qcom_snps_eusb2_hsphy_write_mask(qcom_snps_eusb2->base, USB_PHY_CFG0,
+ CMN_CTRL_OVERRIDE_EN, CMN_CTRL_OVERRIDE_EN);
+
+ qcom_snps_eusb2_hsphy_write_mask(qcom_snps_eusb2->base, USB_PHY_UTMI_CTRL5, POR, POR);
+
+ qcom_snps_eusb2_hsphy_write_mask(qcom_snps_eusb2->base, USB_PHY_HS_PHY_CTRL_COMMON0,
+ PHY_ENABLE | RETENABLEN, PHY_ENABLE | RETENABLEN);
+
+ qcom_snps_eusb2_hsphy_write_mask(qcom_snps_eusb2->base, USB_PHY_APB_ACCESS_CMD,
+ APB_LOGIC_RESET, APB_LOGIC_RESET);
+
+ qcom_snps_eusb2_hsphy_write_mask(qcom_snps_eusb2->base, UTMI_PHY_CMN_CTRL0, TESTBURNIN, 0);
+
+ qcom_snps_eusb2_hsphy_write_mask(qcom_snps_eusb2->base, USB_PHY_FSEL_SEL,
+ FSEL_SEL, FSEL_SEL);
+
+ /* update ref_clk related registers */
+ ret = qcom_eusb2_ref_clk_init(qcom_snps_eusb2);
+ if (ret)
+ return ret;
+
+ qcom_snps_eusb2_hsphy_write_mask(qcom_snps_eusb2->base, USB_PHY_CFG_CTRL_1,
+ PHY_CFG_PLL_CPBIAS_CNTRL_MASK,
+ FIELD_PREP(PHY_CFG_PLL_CPBIAS_CNTRL_MASK, 0x1));
+
+ qcom_snps_eusb2_hsphy_write_mask(qcom_snps_eusb2->base, USB_PHY_CFG_CTRL_4,
+ PHY_CFG_PLL_INT_CNTRL_MASK,
+ FIELD_PREP(PHY_CFG_PLL_INT_CNTRL_MASK, 0x8));
+
+ qcom_snps_eusb2_hsphy_write_mask(qcom_snps_eusb2->base, USB_PHY_CFG_CTRL_4,
+ PHY_CFG_PLL_GMP_CNTRL_MASK,
+ FIELD_PREP(PHY_CFG_PLL_GMP_CNTRL_MASK, 0x1));
+
+ qcom_snps_eusb2_hsphy_write_mask(qcom_snps_eusb2->base, USB_PHY_CFG_CTRL_5,
+ PHY_CFG_PLL_PROP_CNTRL_MASK,
+ FIELD_PREP(PHY_CFG_PLL_PROP_CNTRL_MASK, 0x10));
+
+ qcom_snps_eusb2_hsphy_write_mask(qcom_snps_eusb2->base, USB_PHY_CFG_CTRL_6,
+ PHY_CFG_PLL_VCO_CNTRL_MASK,
+ FIELD_PREP(PHY_CFG_PLL_VCO_CNTRL_MASK, 0x0));
+
+ qcom_snps_eusb2_hsphy_write_mask(qcom_snps_eusb2->base, USB_PHY_CFG_CTRL_5,
+ PHY_CFG_PLL_VREF_TUNE_MASK,
+ FIELD_PREP(PHY_CFG_PLL_VREF_TUNE_MASK, 0x1));
+
+ qcom_snps_eusb2_hsphy_write_mask(qcom_snps_eusb2->base, USB_PHY_HS_PHY_CTRL2,
+ VBUS_DET_EXT_SEL, VBUS_DET_EXT_SEL);
+
+ /* set default parameters */
+ qcom_eusb2_default_parameters(qcom_snps_eusb2);
+
+ qcom_snps_eusb2_hsphy_write_mask(qcom_snps_eusb2->base, USB_PHY_HS_PHY_CTRL2,
+ USB2_SUSPEND_N_SEL | USB2_SUSPEND_N,
+ USB2_SUSPEND_N_SEL | USB2_SUSPEND_N);
+
+ qcom_snps_eusb2_hsphy_write_mask(qcom_snps_eusb2->base, USB_PHY_UTMI_CTRL0, SLEEPM, SLEEPM);
+
+ qcom_snps_eusb2_hsphy_write_mask(qcom_snps_eusb2->base, USB_PHY_HS_PHY_CTRL_COMMON0,
+ SIDDQ_SEL, SIDDQ_SEL);
+
+ qcom_snps_eusb2_hsphy_write_mask(qcom_snps_eusb2->base, USB_PHY_HS_PHY_CTRL_COMMON0,
+ SIDDQ, 0);
+
+ qcom_snps_eusb2_hsphy_write_mask(qcom_snps_eusb2->base, USB_PHY_UTMI_CTRL5, POR, 0);
+
+ qcom_snps_eusb2_hsphy_write_mask(qcom_snps_eusb2->base, USB_PHY_HS_PHY_CTRL2,
+ USB2_SUSPEND_N_SEL, 0);
+
+ return 0;
+}
+
+static int qcom_snps_eusb2_phy_power_on(struct phy *phy)
+{
+ struct qcom_snps_eusb2_phy_priv *qcom_snps_eusb2 = dev_get_priv(phy->dev);
+ int ret;
+
+ /* TODO Repeater */
+
+ clk_prepare_enable(qcom_snps_eusb2->ref_clk);
+
+ ret = reset_deassert_bulk(&qcom_snps_eusb2->resets);
+ if (ret)
+ return ret;
+
+ ret = qcom_snps_eusb2_usb_init(phy);
+ if (ret)
+ return ret;
+
+ return 0;
+}
+
+static int qcom_snps_eusb2_phy_power_off(struct phy *phy)
+{
+ struct qcom_snps_eusb2_phy_priv *qcom_snps_eusb2 = dev_get_priv(phy->dev);
+
+ reset_assert_bulk(&qcom_snps_eusb2->resets);
+ clk_disable_unprepare(qcom_snps_eusb2->ref_clk);
+
+ return 0;
+}
+
+static int qcom_snps_eusb2_phy_probe(struct udevice *dev)
+{
+ struct qcom_snps_eusb2_phy_priv *qcom_snps_eusb2 = dev_get_priv(dev);
+ int ret;
+
+ qcom_snps_eusb2->base = (void __iomem *)dev_read_addr(dev);
+ if (IS_ERR(qcom_snps_eusb2->base))
+ return PTR_ERR(qcom_snps_eusb2->base);
+
+ qcom_snps_eusb2->ref_clk = devm_clk_get(dev, "ref");
+ if (IS_ERR(qcom_snps_eusb2->ref_clk)) {
+ printf("%s: failed to get ref clk %d\n", __func__, ret);
+ return PTR_ERR(qcom_snps_eusb2->ref_clk);
+ }
+
+ ret = reset_get_bulk(dev, &qcom_snps_eusb2->resets);
+ if (ret < 0) {
+ printf("failed to get resets, ret = %d\n", ret);
+ return ret;
+ }
+
+ return 0;
+}
+
+static struct phy_ops qcom_snps_eusb2_phy_ops = {
+ .power_on = qcom_snps_eusb2_phy_power_on,
+ .power_off = qcom_snps_eusb2_phy_power_off,
+};
+
+static const struct udevice_id qcom_snps_eusb2_phy_ids[] = {
+ {
+ .compatible = "qcom,sm8550-snps-eusb2-phy",
+ },
+ {}
+};
+
+U_BOOT_DRIVER(qcom_usb_qcom_snps_eusb2) = {
+ .name = "qcom-snps-eusb2-hsphy",
+ .id = UCLASS_PHY,
+ .of_match = qcom_snps_eusb2_phy_ids,
+ .ops = &qcom_snps_eusb2_phy_ops,
+ .probe = qcom_snps_eusb2_phy_probe,
+ .priv_auto = sizeof(struct qcom_snps_eusb2_phy_priv),
+};
diff --git a/drivers/phy/qcom/phy-qcom-snps-femto-v2.c b/drivers/phy/qcom/phy-qcom-snps-femto-v2.c
new file mode 100644
index 0000000..04f0f0e
--- /dev/null
+++ b/drivers/phy/qcom/phy-qcom-snps-femto-v2.c
@@ -0,0 +1,202 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2020, The Linux Foundation. All rights reserved.
+ * Copyright (C) 2023 Bhupesh Sharma <bhupesh.sharma@linaro.org>
+ *
+ * Based on Linux driver
+ */
+
+#include <dm.h>
+#include <dm/device_compat.h>
+#include <dm/devres.h>
+#include <generic-phy.h>
+#include <malloc.h>
+#include <reset.h>
+
+#include <asm/io.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
+#include <linux/iopoll.h>
+
+#define USB2_PHY_USB_PHY_UTMI_CTRL0 (0x3c)
+#define SLEEPM BIT(0)
+#define OPMODE_MASK GENMASK(4, 3)
+#define OPMODE_NORMAL (0x00)
+#define OPMODE_NONDRIVING BIT(3)
+#define TERMSEL BIT(5)
+
+#define USB2_PHY_USB_PHY_UTMI_CTRL5 (0x50)
+#define POR BIT(1)
+
+#define USB2_PHY_USB_PHY_HS_PHY_CTRL_COMMON0 (0x54)
+#define SIDDQ BIT(2)
+#define RETENABLEN BIT(3)
+#define FSEL_MASK GENMASK(6, 4)
+#define FSEL_DEFAULT (0x3 << 4)
+
+#define USB2_PHY_USB_PHY_HS_PHY_CTRL_COMMON1 (0x58)
+#define VBUSVLDEXTSEL0 BIT(4)
+#define PLLBTUNE BIT(5)
+
+#define USB2_PHY_USB_PHY_HS_PHY_CTRL_COMMON2 (0x5c)
+#define VREGBYPASS BIT(0)
+
+#define USB2_PHY_USB_PHY_HS_PHY_CTRL1 (0x60)
+#define VBUSVLDEXT0 BIT(0)
+
+#define USB2_PHY_USB_PHY_HS_PHY_CTRL2 (0x64)
+#define USB2_AUTO_RESUME BIT(0)
+#define USB2_SUSPEND_N BIT(2)
+#define USB2_SUSPEND_N_SEL BIT(3)
+
+#define USB2_PHY_USB_PHY_CFG0 (0x94)
+#define UTMI_PHY_DATAPATH_CTRL_OVERRIDE_EN BIT(0)
+#define UTMI_PHY_CMN_CTRL_OVERRIDE_EN BIT(1)
+
+#define USB2_PHY_USB_PHY_REFCLK_CTRL (0xa0)
+#define REFCLK_SEL_MASK GENMASK(1, 0)
+#define REFCLK_SEL_DEFAULT (0x2 << 0)
+
+struct qcom_snps_hsphy {
+ void __iomem *base;
+ struct reset_ctl_bulk resets;
+};
+
+/*
+ * We should just be able to use clrsetbits_le32() here, but this results
+ * in crashes on some boards. This is suspected to be because of some bus
+ * arbitration quirks with the PHY (i.e. it takes several bus clock cycles
+ * for the write to actually go through). The readl_relaxed() at the end will
+ * block until the write is completed (and all registers updated), and thus
+ * ensure that we don't access the PHY registers when they're in an
+ * undetermined state.
+ */
+static inline void qcom_snps_hsphy_write_mask(void __iomem *base, u32 offset,
+ u32 mask, u32 val)
+{
+ u32 reg;
+
+ reg = readl_relaxed(base + offset);
+
+ reg &= ~mask;
+ reg |= val & mask;
+ writel_relaxed(reg, base + offset);
+
+ /* Ensure above write is completed */
+ readl_relaxed(base + offset);
+}
+
+static int qcom_snps_hsphy_usb_init(struct phy *phy)
+{
+ struct qcom_snps_hsphy *priv = dev_get_priv(phy->dev);
+
+ qcom_snps_hsphy_write_mask(priv->base, USB2_PHY_USB_PHY_CFG0,
+ UTMI_PHY_CMN_CTRL_OVERRIDE_EN,
+ UTMI_PHY_CMN_CTRL_OVERRIDE_EN);
+ qcom_snps_hsphy_write_mask(priv->base, USB2_PHY_USB_PHY_UTMI_CTRL5, POR,
+ POR);
+ qcom_snps_hsphy_write_mask(priv->base,
+ USB2_PHY_USB_PHY_HS_PHY_CTRL_COMMON0, FSEL_MASK, 0);
+ qcom_snps_hsphy_write_mask(priv->base,
+ USB2_PHY_USB_PHY_HS_PHY_CTRL_COMMON1,
+ PLLBTUNE, PLLBTUNE);
+ qcom_snps_hsphy_write_mask(priv->base, USB2_PHY_USB_PHY_REFCLK_CTRL,
+ REFCLK_SEL_DEFAULT, REFCLK_SEL_MASK);
+ qcom_snps_hsphy_write_mask(priv->base,
+ USB2_PHY_USB_PHY_HS_PHY_CTRL_COMMON1,
+ VBUSVLDEXTSEL0, VBUSVLDEXTSEL0);
+ qcom_snps_hsphy_write_mask(priv->base, USB2_PHY_USB_PHY_HS_PHY_CTRL1,
+ VBUSVLDEXT0, VBUSVLDEXT0);
+
+ qcom_snps_hsphy_write_mask(priv->base,
+ USB2_PHY_USB_PHY_HS_PHY_CTRL_COMMON2,
+ VREGBYPASS, VREGBYPASS);
+
+ qcom_snps_hsphy_write_mask(priv->base, USB2_PHY_USB_PHY_HS_PHY_CTRL2,
+ USB2_SUSPEND_N_SEL | USB2_SUSPEND_N,
+ USB2_SUSPEND_N_SEL | USB2_SUSPEND_N);
+
+ qcom_snps_hsphy_write_mask(priv->base, USB2_PHY_USB_PHY_UTMI_CTRL0,
+ SLEEPM, SLEEPM);
+
+ qcom_snps_hsphy_write_mask(
+ priv->base, USB2_PHY_USB_PHY_HS_PHY_CTRL_COMMON0, SIDDQ, 0);
+
+ qcom_snps_hsphy_write_mask(priv->base, USB2_PHY_USB_PHY_UTMI_CTRL5, POR,
+ 0);
+
+ qcom_snps_hsphy_write_mask(priv->base, USB2_PHY_USB_PHY_HS_PHY_CTRL2,
+ USB2_SUSPEND_N_SEL, 0);
+
+ qcom_snps_hsphy_write_mask(priv->base, USB2_PHY_USB_PHY_CFG0,
+ UTMI_PHY_CMN_CTRL_OVERRIDE_EN, 0);
+
+ return 0;
+}
+
+static int qcom_snps_hsphy_power_on(struct phy *phy)
+{
+ struct qcom_snps_hsphy *priv = dev_get_priv(phy->dev);
+ int ret;
+
+ ret = reset_deassert_bulk(&priv->resets);
+ if (ret)
+ return ret;
+
+ ret = qcom_snps_hsphy_usb_init(phy);
+ if (ret)
+ return ret;
+
+ return 0;
+}
+
+static int qcom_snps_hsphy_power_off(struct phy *phy)
+{
+ struct qcom_snps_hsphy *priv = dev_get_priv(phy->dev);
+
+ reset_assert_bulk(&priv->resets);
+
+ return 0;
+}
+
+static int qcom_snps_hsphy_phy_probe(struct udevice *dev)
+{
+ struct qcom_snps_hsphy *priv = dev_get_priv(dev);
+ int ret;
+
+ priv->base = dev_read_addr_ptr(dev);
+ if (IS_ERR(priv->base))
+ return PTR_ERR(priv->base);
+
+ ret = reset_get_bulk(dev, &priv->resets);
+ if (ret < 0) {
+ printf("failed to get resets, ret = %d\n", ret);
+ return ret;
+ }
+
+ reset_deassert_bulk(&priv->resets);
+
+ return 0;
+}
+
+static struct phy_ops qcom_snps_hsphy_phy_ops = {
+ .power_on = qcom_snps_hsphy_power_on,
+ .power_off = qcom_snps_hsphy_power_off,
+};
+
+static const struct udevice_id qcom_snps_hsphy_phy_ids[] = {
+ { .compatible = "qcom,sm8150-usb-hs-phy" },
+ { .compatible = "qcom,usb-snps-hs-5nm-phy" },
+ { .compatible = "qcom,usb-snps-hs-7nm-phy" },
+ { .compatible = "qcom,usb-snps-femto-v2-phy" },
+ {}
+};
+
+U_BOOT_DRIVER(qcom_usb_qcom_snps_hsphy) = {
+ .name = "qcom-snps-hsphy",
+ .id = UCLASS_PHY,
+ .of_match = qcom_snps_hsphy_phy_ids,
+ .ops = &qcom_snps_hsphy_phy_ops,
+ .probe = qcom_snps_hsphy_phy_probe,
+ .priv_auto = sizeof(struct qcom_snps_hsphy),
+};
diff --git a/drivers/phy/qcom/phy-qcom-usb-hs-28nm.c b/drivers/phy/qcom/phy-qcom-usb-hs-28nm.c
index 05a9a2c..c344809 100644
--- a/drivers/phy/qcom/phy-qcom-usb-hs-28nm.c
+++ b/drivers/phy/qcom/phy-qcom-usb-hs-28nm.c
@@ -5,7 +5,6 @@
* Based on Linux driver
*/
-#include <common.h>
#include <dm.h>
#include <generic-phy.h>
#include <reset.h>
diff --git a/drivers/phy/qcom/phy-qcom-usb-ss.c b/drivers/phy/qcom/phy-qcom-usb-ss.c
index 1b03a3c..270d09d 100644
--- a/drivers/phy/qcom/phy-qcom-usb-ss.c
+++ b/drivers/phy/qcom/phy-qcom-usb-ss.c
@@ -5,7 +5,6 @@
* Based on Linux driver
*/
-#include <common.h>
#include <dm.h>
#include <generic-phy.h>
#include <linux/bitops.h>
diff --git a/drivers/phy/renesas/r8a779f0-ether-serdes.c b/drivers/phy/renesas/r8a779f0-ether-serdes.c
index bd1fdd3..40284ef 100644
--- a/drivers/phy/renesas/r8a779f0-ether-serdes.c
+++ b/drivers/phy/renesas/r8a779f0-ether-serdes.c
@@ -7,7 +7,6 @@
#include <asm/io.h>
#include <clk-uclass.h>
#include <clk.h>
-#include <common.h>
#include <div64.h>
#include <dm.h>
#include <dm/device_compat.h>
diff --git a/drivers/phy/rockchip/Kconfig b/drivers/phy/rockchip/Kconfig
index 0247d93..8012833 100644
--- a/drivers/phy/rockchip/Kconfig
+++ b/drivers/phy/rockchip/Kconfig
@@ -12,6 +12,13 @@
help
Support for Rockchip MIPI DPHY with Innosilicon IP block.
+config PHY_ROCKCHIP_INNO_HDMI
+ bool "Rockchip INNO HDMI PHY Driver"
+ depends on ARCH_ROCKCHIP
+ select PHY
+ help
+ Enable this to support the Rockchip Innosilicon HDMI PHY.
+
config PHY_ROCKCHIP_INNO_USB2
bool "Rockchip INNO USB2PHY Driver"
depends on ARCH_ROCKCHIP
diff --git a/drivers/phy/rockchip/Makefile b/drivers/phy/rockchip/Makefile
index 7fdbd10..0420017 100644
--- a/drivers/phy/rockchip/Makefile
+++ b/drivers/phy/rockchip/Makefile
@@ -3,6 +3,7 @@
# Copyright (C) 2020 Amarula Solutions(India)
#
+obj-$(CONFIG_PHY_ROCKCHIP_INNO_HDMI) += phy-rockchip-inno-hdmi.o
obj-$(CONFIG_PHY_ROCKCHIP_INNO_USB2) += phy-rockchip-inno-usb2.o
obj-$(CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY) += phy-rockchip-naneng-combphy.o
obj-$(CONFIG_PHY_ROCKCHIP_PCIE) += phy-rockchip-pcie.o
diff --git a/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c b/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c
new file mode 100644
index 0000000..3bb1a25
--- /dev/null
+++ b/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c
@@ -0,0 +1,885 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Rockchip Innosilicon HDMI PHY
+ *
+ * Copyright (c) 2023 Edgeble AI Technologies Pvt. Ltd.
+ * Copyright (c) 2017 Rockchip Electronics Co. Ltd.
+ */
+
+#include <clk-uclass.h>
+#include <dm.h>
+#include <div64.h>
+#include <dm/device_compat.h>
+#include <dm/device-internal.h>
+#include <dm/lists.h>
+#include <generic-phy.h>
+#include <asm/io.h>
+#include <linux/delay.h>
+#include <linux/iopoll.h>
+
+#define UPDATE(x, h, l) (((x) << (l)) & GENMASK((h), (l)))
+
+/* REG: 0x01 */
+#define RK3328_BYPASS_RXSENSE_EN BIT(2)
+#define RK3328_BYPASS_POWERON_EN BIT(1)
+#define RK3328_BYPASS_PLLPD_EN BIT(0)
+/* REG: 0x02 */
+#define RK3328_INT_POL_HIGH BIT(7)
+#define RK3328_BYPASS_PDATA_EN BIT(4)
+#define RK3328_PDATA_EN BIT(0)
+/* REG:0x05 */
+#define RK3328_INT_TMDS_CLK(x) UPDATE(x, 7, 4)
+#define RK3328_INT_TMDS_D2(x) UPDATE(x, 3, 0)
+/* REG:0x07 */
+#define RK3328_INT_TMDS_D1(x) UPDATE(x, 7, 4)
+#define RK3328_INT_TMDS_D0(x) UPDATE(x, 3, 0)
+/* for all RK3328_INT_TMDS_*, ESD_DET as defined in 0xc8-0xcb */
+#define RK3328_INT_AGND_LOW_PULSE_LOCKED BIT(3)
+#define RK3328_INT_RXSENSE_LOW_PULSE_LOCKED BIT(2)
+#define RK3328_INT_VSS_AGND_ESD_DET BIT(1)
+#define RK3328_INT_AGND_VSS_ESD_DET BIT(0)
+/* REG: 0xa0 */
+#define RK3328_PCLK_VCO_DIV_5_MASK BIT(1)
+#define RK3328_PCLK_VCO_DIV_5(x) UPDATE(x, 1, 1)
+#define RK3328_PRE_PLL_POWER_DOWN BIT(0)
+/* REG: 0xa1 */
+#define RK3328_PRE_PLL_PRE_DIV_MASK GENMASK(5, 0)
+#define RK3328_PRE_PLL_PRE_DIV(x) UPDATE(x, 5, 0)
+/* REG: 0xa2 */
+/* unset means center spread */
+#define RK3328_SPREAD_SPECTRUM_MOD_DOWN BIT(7)
+#define RK3328_SPREAD_SPECTRUM_MOD_DISABLE BIT(6)
+#define RK3328_PRE_PLL_FRAC_DIV_DISABLE UPDATE(3, 5, 4)
+#define RK3328_PRE_PLL_FB_DIV_11_8_MASK GENMASK(3, 0)
+#define RK3328_PRE_PLL_FB_DIV_11_8(x) UPDATE((x) >> 8, 3, 0)
+/* REG: 0xa3 */
+#define RK3328_PRE_PLL_FB_DIV_7_0(x) UPDATE(x, 7, 0)
+/* REG: 0xa4*/
+#define RK3328_PRE_PLL_TMDSCLK_DIV_C_MASK GENMASK(1, 0)
+#define RK3328_PRE_PLL_TMDSCLK_DIV_C(x) UPDATE(x, 1, 0)
+#define RK3328_PRE_PLL_TMDSCLK_DIV_B_MASK GENMASK(3, 2)
+#define RK3328_PRE_PLL_TMDSCLK_DIV_B(x) UPDATE(x, 3, 2)
+#define RK3328_PRE_PLL_TMDSCLK_DIV_A_MASK GENMASK(5, 4)
+#define RK3328_PRE_PLL_TMDSCLK_DIV_A(x) UPDATE(x, 5, 4)
+/* REG: 0xa5 */
+#define RK3328_PRE_PLL_PCLK_DIV_B_SHIFT 5
+#define RK3328_PRE_PLL_PCLK_DIV_B_MASK GENMASK(6, 5)
+#define RK3328_PRE_PLL_PCLK_DIV_B(x) UPDATE(x, 6, 5)
+#define RK3328_PRE_PLL_PCLK_DIV_A_MASK GENMASK(4, 0)
+#define RK3328_PRE_PLL_PCLK_DIV_A(x) UPDATE(x, 4, 0)
+/* REG: 0xa6 */
+#define RK3328_PRE_PLL_PCLK_DIV_C_SHIFT 5
+#define RK3328_PRE_PLL_PCLK_DIV_C_MASK GENMASK(6, 5)
+#define RK3328_PRE_PLL_PCLK_DIV_C(x) UPDATE(x, 6, 5)
+#define RK3328_PRE_PLL_PCLK_DIV_D_MASK GENMASK(4, 0)
+#define RK3328_PRE_PLL_PCLK_DIV_D(x) UPDATE(x, 4, 0)
+/* REG: 0xa9 */
+#define RK3328_PRE_PLL_LOCK_STATUS BIT(0)
+/* REG: 0xaa */
+#define RK3328_POST_PLL_POST_DIV_ENABLE GENMASK(3, 2)
+#define RK3328_POST_PLL_REFCLK_SEL_TMDS BIT(1)
+#define RK3328_POST_PLL_POWER_DOWN BIT(0)
+/* REG:0xab */
+#define RK3328_POST_PLL_FB_DIV_8(x) UPDATE((x) >> 8, 7, 7)
+#define RK3328_POST_PLL_PRE_DIV(x) UPDATE(x, 4, 0)
+/* REG: 0xac */
+#define RK3328_POST_PLL_FB_DIV_7_0(x) UPDATE(x, 7, 0)
+/* REG: 0xad */
+#define RK3328_POST_PLL_POST_DIV_MASK GENMASK(1, 0)
+#define RK3328_POST_PLL_POST_DIV_2 0x0
+#define RK3328_POST_PLL_POST_DIV_4 0x1
+#define RK3328_POST_PLL_POST_DIV_8 0x3
+/* REG: 0xaf */
+#define RK3328_POST_PLL_LOCK_STATUS BIT(0)
+/* REG: 0xb0 */
+#define RK3328_BANDGAP_ENABLE BIT(2)
+/* REG: 0xb2 */
+#define RK3328_TMDS_CLK_DRIVER_EN BIT(3)
+#define RK3328_TMDS_D2_DRIVER_EN BIT(2)
+#define RK3328_TMDS_D1_DRIVER_EN BIT(1)
+#define RK3328_TMDS_D0_DRIVER_EN BIT(0)
+#define RK3328_TMDS_DRIVER_ENABLE (RK3328_TMDS_CLK_DRIVER_EN | \
+ RK3328_TMDS_D2_DRIVER_EN | \
+ RK3328_TMDS_D1_DRIVER_EN | \
+ RK3328_TMDS_D0_DRIVER_EN)
+/* REG:0xc5 */
+#define RK3328_BYPASS_TERM_RESISTOR_CALIB BIT(7)
+#define RK3328_TERM_RESISTOR_CALIB_SPEED_14_8(x) UPDATE((x) >> 8, 6, 0)
+/* REG:0xc6 */
+#define RK3328_TERM_RESISTOR_CALIB_SPEED_7_0(x) UPDATE(x, 7, 0)
+/* REG:0xc7 */
+#define RK3328_TERM_RESISTOR_50 UPDATE(0, 2, 1)
+#define RK3328_TERM_RESISTOR_62_5 UPDATE(1, 2, 1)
+#define RK3328_TERM_RESISTOR_75 UPDATE(2, 2, 1)
+#define RK3328_TERM_RESISTOR_100 UPDATE(3, 2, 1)
+/* REG 0xc8 - 0xcb */
+#define RK3328_ESD_DETECT_MASK GENMASK(7, 6)
+#define RK3328_ESD_DETECT_340MV (0x0 << 6)
+#define RK3328_ESD_DETECT_280MV (0x1 << 6)
+#define RK3328_ESD_DETECT_260MV (0x2 << 6)
+#define RK3328_ESD_DETECT_240MV (0x3 << 6)
+/* resistors can be used in parallel */
+#define RK3328_TMDS_TERM_RESIST_MASK GENMASK(5, 0)
+#define RK3328_TMDS_TERM_RESIST_75 BIT(5)
+#define RK3328_TMDS_TERM_RESIST_150 BIT(4)
+#define RK3328_TMDS_TERM_RESIST_300 BIT(3)
+#define RK3328_TMDS_TERM_RESIST_600 BIT(2)
+#define RK3328_TMDS_TERM_RESIST_1000 BIT(1)
+#define RK3328_TMDS_TERM_RESIST_2000 BIT(0)
+/* REG: 0xd1 */
+#define RK3328_PRE_PLL_FRAC_DIV_23_16(x) UPDATE((x) >> 16, 7, 0)
+/* REG: 0xd2 */
+#define RK3328_PRE_PLL_FRAC_DIV_15_8(x) UPDATE((x) >> 8, 7, 0)
+/* REG: 0xd3 */
+#define RK3328_PRE_PLL_FRAC_DIV_7_0(x) UPDATE(x, 7, 0)
+
+struct phy_config {
+ unsigned long tmdsclock;
+ u8 regs[14];
+};
+
+struct pre_pll_config {
+ unsigned long pixclock;
+ unsigned long tmdsclock;
+ u8 prediv;
+ u16 fbdiv;
+ u8 tmds_div_a;
+ u8 tmds_div_b;
+ u8 tmds_div_c;
+ u8 pclk_div_a;
+ u8 pclk_div_b;
+ u8 pclk_div_c;
+ u8 pclk_div_d;
+ u8 vco_div_5_en;
+ u32 fracdiv;
+};
+
+struct post_pll_config {
+ unsigned long tmdsclock;
+ u8 prediv;
+ u16 fbdiv;
+ u8 postdiv;
+ u8 version;
+};
+
+struct inno_hdmi_phy_plat_ops {
+ void (*init)(struct phy *phy);
+ int (*power_on)(struct phy *phy, const struct post_pll_config *cfg,
+ const struct phy_config *phy_cfg);
+ void (*power_off)(struct phy *phy);
+ void (*clk_enable)(struct phy *phy);
+ void (*clk_disable)(struct phy *phy);
+ unsigned long (*clk_recalc_rate)(struct phy *phy,
+ unsigned long parent_rate);
+ long (*clk_round_rate)(struct phy *phy, unsigned long rate);
+ int (*clk_set_rate)(struct phy *phy, unsigned long rate,
+ unsigned long parent_rate);
+};
+
+enum inno_hdmi_phy_type {
+ INNO_HDMI_PHY_RK3328,
+};
+
+struct inno_hdmi_phy_data {
+ enum inno_hdmi_phy_type phy_type;
+ const struct inno_hdmi_phy_plat_ops *plat_ops;
+ const struct phy_config *phy_cfg_table;
+};
+
+struct inno_hdmi_phy {
+ struct udevice *dev;
+ ofnode node;
+ void *regs;
+
+ struct clk refoclk;
+ struct clk sysclk;
+ unsigned long tmdsclock;
+ unsigned long pixclock;
+ u32 bus_width;
+ struct phy_config *phy_cfg;
+ const struct inno_hdmi_phy_data *data;
+};
+
+static const struct pre_pll_config pre_pll_cfg_table[] = {
+ { 25175000, 25175000, 3, 125, 3, 1, 1, 1, 3, 3, 4, 0, 0xe00000},
+ { 25175000, 31468750, 1, 41, 0, 3, 3, 1, 3, 3, 4, 0, 0xf5554f},
+ { 27000000, 27000000, 1, 36, 0, 3, 3, 1, 2, 3, 4, 0, 0x0},
+ { 27000000, 33750000, 1, 45, 0, 3, 3, 1, 3, 3, 4, 0, 0x0},
+ { 31500000, 31500000, 1, 42, 0, 3, 3, 1, 2, 3, 4, 0, 0x0},
+ { 31500000, 39375000, 1, 105, 1, 3, 3, 10, 0, 3, 4, 0, 0x0},
+ { 33750000, 33750000, 1, 45, 0, 3, 3, 1, 2, 3, 4, 0, 0x0},
+ { 33750000, 42187500, 1, 169, 2, 3, 3, 15, 0, 3, 4, 0, 0x0},
+ { 35500000, 35500000, 1, 71, 2, 2, 2, 6, 0, 3, 4, 0, 0x0},
+ { 35500000, 44375000, 1, 74, 3, 1, 1, 25, 0, 1, 1, 0, 0x0},
+ { 36000000, 36000000, 1, 36, 2, 1, 1, 1, 1, 3, 4, 0, 0x0},
+ { 36000000, 45000000, 1, 45, 2, 1, 1, 15, 0, 1, 1, 0, 0x0},
+ { 40000000, 40000000, 1, 40, 2, 1, 1, 1, 1, 3, 4, 0, 0x0},
+ { 40000000, 50000000, 1, 50, 2, 1, 1, 15, 0, 1, 1, 0, 0x0},
+ { 49500000, 49500000, 1, 66, 0, 3, 3, 1, 2, 3, 4, 0, 0x0},
+ { 49500000, 61875000, 1, 165, 1, 3, 3, 10, 0, 3, 4, 0, 0x0},
+ { 50000000, 50000000, 1, 50, 2, 1, 1, 1, 1, 3, 4, 0, 0x0},
+ { 50000000, 62500000, 1, 125, 2, 2, 2, 15, 0, 2, 2, 0, 0x0},
+ { 54000000, 54000000, 1, 36, 0, 2, 2, 1, 0, 3, 4, 0, 0x0},
+ { 54000000, 67500000, 1, 45, 0, 2, 2, 1, 3, 2, 2, 0, 0x0},
+ { 56250000, 56250000, 1, 75, 0, 3, 3, 1, 2, 3, 4, 0, 0x0},
+ { 56250000, 70312500, 1, 117, 3, 1, 1, 25, 0, 1, 1, 0, 0x0},
+ { 59341000, 59341000, 1, 118, 2, 2, 2, 6, 0, 3, 4, 0, 0xae978d},
+ { 59341000, 74176250, 2, 148, 2, 1, 1, 15, 0, 1, 1, 0, 0x5a3d70},
+ { 59400000, 59400000, 1, 99, 3, 1, 1, 1, 3, 3, 4, 0, 0x0},
+ { 59400000, 74250000, 1, 99, 0, 3, 3, 1, 3, 3, 4, 0, 0x0},
+ { 65000000, 65000000, 1, 65, 2, 1, 1, 1, 1, 3, 4, 0, 0x0},
+ { 65000000, 81250000, 3, 325, 0, 3, 3, 1, 3, 3, 4, 0, 0x0},
+ { 68250000, 68250000, 1, 91, 0, 3, 3, 1, 2, 3, 4, 0, 0x0},
+ { 68250000, 85312500, 1, 142, 3, 1, 1, 25, 0, 1, 1, 0, 0x0},
+ { 71000000, 71000000, 1, 71, 2, 1, 1, 1, 1, 3, 4, 0, 0x0},
+ { 71000000, 88750000, 3, 355, 0, 3, 3, 1, 3, 3, 4, 0, 0x0},
+ { 72000000, 72000000, 1, 36, 2, 0, 0, 1, 1, 2, 2, 0, 0x0},
+ { 72000000, 90000000, 1, 60, 0, 2, 2, 1, 3, 2, 2, 0, 0x0},
+ { 73250000, 73250000, 3, 293, 0, 3, 3, 1, 2, 3, 4, 0, 0x0},
+ { 73250000, 91562500, 1, 61, 0, 2, 2, 1, 3, 2, 2, 0, 0x0},
+ { 74176000, 74176000, 1, 37, 2, 0, 0, 1, 1, 2, 2, 0, 0x16872b},
+ { 74176000, 92720000, 2, 185, 2, 1, 1, 15, 0, 1, 1, 0, 0x70a3d7},
+ { 74250000, 74250000, 1, 99, 0, 3, 3, 1, 2, 3, 4, 0, 0x0},
+ { 74250000, 92812500, 4, 495, 0, 3, 3, 1, 3, 3, 4, 0, 0x0},
+ { 75000000, 75000000, 1, 50, 0, 2, 2, 1, 0, 3, 4, 0, 0x0},
+ { 75000000, 93750000, 1, 125, 0, 3, 3, 1, 3, 3, 4, 0, 0x0},
+ { 78750000, 78750000, 1, 105, 0, 3, 3, 1, 2, 3, 4, 0, 0x0},
+ { 78750000, 98437500, 1, 164, 3, 1, 1, 25, 0, 1, 1, 0, 0x0},
+ { 79500000, 79500000, 1, 53, 0, 2, 2, 1, 0, 3, 4, 0, 0x0},
+ { 79500000, 99375000, 1, 199, 2, 2, 2, 15, 0, 2, 2, 0, 0x0},
+ { 83500000, 83500000, 2, 167, 2, 1, 1, 1, 1, 3, 4, 0, 0x0},
+ { 83500000, 104375000, 1, 104, 2, 1, 1, 15, 0, 1, 1, 0, 0x600000},
+ { 85500000, 85500000, 1, 57, 0, 2, 2, 1, 0, 3, 4, 0, 0x0},
+ { 85500000, 106875000, 1, 178, 3, 1, 1, 25, 0, 1, 1, 0, 0x0},
+ { 85750000, 85750000, 3, 343, 0, 3, 3, 1, 2, 3, 4, 0, 0x0},
+ { 85750000, 107187500, 1, 143, 0, 3, 3, 1, 3, 3, 4, 0, 0x0},
+ { 88750000, 88750000, 3, 355, 0, 3, 3, 1, 2, 3, 4, 0, 0x0},
+ { 88750000, 110937500, 1, 110, 2, 1, 1, 15, 0, 1, 1, 0, 0xf00000},
+ { 94500000, 94500000, 1, 63, 0, 2, 2, 1, 0, 3, 4, 0, 0x0},
+ { 94500000, 118125000, 1, 197, 3, 1, 1, 25, 0, 1, 1, 0, 0x0},
+ {101000000, 101000000, 1, 101, 2, 1, 1, 1, 1, 3, 4, 0, 0x0},
+ {101000000, 126250000, 1, 42, 0, 1, 1, 1, 3, 1, 1, 0, 0x0},
+ {102250000, 102250000, 4, 409, 2, 1, 1, 1, 1, 3, 4, 0, 0x0},
+ {102250000, 127812500, 1, 128, 2, 1, 1, 15, 0, 1, 1, 0, 0x0},
+ {106500000, 106500000, 1, 71, 0, 2, 2, 1, 0, 3, 4, 0, 0x0},
+ {106500000, 133125000, 1, 133, 2, 1, 1, 15, 0, 1, 1, 0, 0x0},
+ {108000000, 108000000, 1, 36, 0, 1, 1, 1, 0, 2, 2, 0, 0x0},
+ {108000000, 135000000, 1, 45, 0, 1, 1, 1, 3, 1, 1, 0, 0x0},
+ {115500000, 115500000, 1, 77, 0, 2, 2, 1, 0, 3, 4, 0, 0x0},
+ {115500000, 144375000, 1, 48, 0, 1, 1, 1, 3, 1, 1, 0, 0x0},
+ {117500000, 117500000, 2, 235, 2, 1, 1, 1, 1, 3, 4, 0, 0x0},
+ {117500000, 146875000, 1, 49, 0, 1, 1, 1, 3, 1, 1, 0, 0x0},
+ {119000000, 119000000, 1, 119, 2, 1, 1, 1, 1, 3, 4, 0, 0x0},
+ {119000000, 148750000, 3, 148, 0, 1, 1, 1, 3, 1, 1, 0, 0xc00000},
+ {121750000, 121750000, 4, 487, 2, 1, 1, 1, 1, 3, 4, 0, 0x0},
+ {121750000, 152187500, 1, 203, 0, 3, 3, 1, 3, 3, 4, 0, 0x0},
+ {122500000, 122500000, 2, 245, 2, 1, 1, 1, 1, 3, 4, 0, 0x0},
+ {122500000, 153125000, 1, 51, 0, 1, 1, 1, 3, 1, 1, 0, 0x0},
+ {135000000, 135000000, 1, 45, 0, 1, 1, 1, 0, 2, 2, 0, 0x0},
+ {135000000, 168750000, 1, 169, 2, 1, 1, 15, 0, 1, 1, 0, 0x0},
+ {136750000, 136750000, 1, 68, 2, 0, 0, 1, 1, 2, 2, 0, 0x600000},
+ {136750000, 170937500, 1, 113, 0, 2, 2, 1, 3, 2, 2, 0, 0xf5554f},
+ {140250000, 140250000, 2, 187, 0, 2, 2, 1, 0, 3, 4, 0, 0x0},
+ {140250000, 175312500, 1, 117, 0, 2, 2, 1, 3, 2, 2, 0, 0x0},
+ {146250000, 146250000, 2, 195, 0, 2, 2, 1, 0, 3, 4, 0, 0x0},
+ {146250000, 182812500, 1, 61, 0, 1, 1, 1, 3, 1, 1, 0, 0x0},
+ {148250000, 148250000, 3, 222, 2, 0, 0, 1, 1, 2, 2, 0, 0x600000},
+ {148250000, 185312500, 1, 123, 0, 2, 2, 1, 3, 2, 2, 0, 0x8aaab0},
+ {148352000, 148352000, 2, 148, 2, 0, 0, 1, 1, 2, 2, 0, 0x5a1cac},
+ {148352000, 185440000, 3, 185, 0, 1, 1, 1, 3, 1, 1, 0, 0x70a3d7},
+ {148500000, 148500000, 1, 99, 0, 2, 2, 1, 0, 3, 4, 0, 0x0},
+ {148500000, 185625000, 4, 495, 0, 2, 2, 1, 3, 2, 2, 0, 0x0},
+ {154000000, 154000000, 1, 77, 2, 0, 0, 1, 1, 2, 2, 0, 0x0},
+ {154000000, 192500000, 1, 64, 0, 1, 1, 1, 3, 1, 1, 0, 0x0},
+ {156000000, 156000000, 1, 52, 0, 1, 1, 1, 0, 2, 2, 0, 0x0},
+ {156000000, 195000000, 1, 65, 0, 1, 1, 1, 3, 1, 1, 0, 0x0},
+ {156750000, 156750000, 2, 209, 0, 2, 2, 1, 0, 3, 4, 0, 0x0},
+ {156750000, 195937500, 1, 196, 2, 1, 1, 15, 0, 1, 1, 0, 0x0},
+ {157000000, 157000000, 2, 157, 2, 0, 0, 1, 1, 2, 2, 0, 0x0},
+ {157000000, 196250000, 1, 131, 0, 2, 2, 1, 3, 2, 2, 0, 0x0},
+ {157500000, 157500000, 1, 105, 0, 2, 2, 1, 0, 3, 4, 0, 0x0},
+ {157500000, 196875000, 1, 197, 2, 1, 1, 15, 0, 1, 1, 0, 0x0},
+ {162000000, 162000000, 1, 54, 0, 1, 1, 1, 0, 2, 2, 0, 0x0},
+ {162000000, 202500000, 2, 135, 0, 1, 1, 1, 3, 1, 1, 0, 0x0},
+ {175500000, 175500000, 1, 117, 0, 2, 2, 1, 0, 3, 4, 0, 0x0},
+ {175500000, 219375000, 1, 73, 0, 1, 1, 1, 3, 1, 1, 0, 0x0},
+ {179500000, 179500000, 3, 359, 0, 2, 2, 1, 0, 3, 4, 0, 0x0},
+ {179500000, 224375000, 1, 75, 0, 1, 1, 1, 3, 1, 1, 0, 0x0},
+ {182750000, 182750000, 1, 91, 2, 0, 0, 1, 1, 2, 2, 0, 0x600000},
+ {182750000, 228437500, 1, 152, 0, 2, 2, 1, 3, 2, 2, 0, 0x4aaab0},
+ {182750000, 228437500, 1, 152, 0, 2, 2, 1, 3, 2, 2, 0, 0x4aaab0},
+ {187000000, 187000000, 2, 187, 2, 0, 0, 1, 1, 2, 2, 0, 0x0},
+ {187000000, 233750000, 1, 39, 0, 0, 0, 1, 3, 0, 0, 1, 0x0},
+ {187250000, 187250000, 3, 280, 2, 0, 0, 1, 1, 2, 2, 0, 0xe00000},
+ {187250000, 234062500, 1, 156, 0, 2, 2, 1, 3, 2, 2, 0, 0xaaab0},
+ {189000000, 189000000, 1, 63, 0, 1, 1, 1, 0, 2, 2, 0, 0x0},
+ {189000000, 236250000, 1, 79, 0, 1, 1, 1, 3, 1, 1, 0, 0x0},
+ {193250000, 193250000, 3, 289, 2, 0, 0, 1, 1, 2, 2, 0, 0xe00000},
+ {193250000, 241562500, 1, 161, 0, 2, 2, 1, 3, 2, 2, 0, 0xaaab0},
+ {202500000, 202500000, 2, 135, 0, 1, 1, 1, 0, 2, 2, 0, 0x0},
+ {202500000, 253125000, 1, 169, 0, 2, 2, 1, 3, 2, 2, 0, 0x0},
+ {204750000, 204750000, 4, 273, 0, 1, 1, 1, 0, 2, 2, 0, 0x0},
+ {204750000, 255937500, 1, 171, 0, 2, 2, 1, 3, 2, 2, 0, 0x0},
+ {208000000, 208000000, 1, 104, 2, 0, 0, 1, 1, 2, 2, 0, 0x0},
+ {208000000, 260000000, 1, 173, 0, 2, 2, 1, 3, 2, 2, 0, 0x0},
+ {214750000, 214750000, 1, 107, 2, 0, 0, 1, 1, 2, 2, 0, 0x600000},
+ {214750000, 268437500, 1, 178, 0, 2, 2, 1, 3, 2, 2, 0, 0xf5554f},
+ {218250000, 218250000, 4, 291, 0, 1, 1, 1, 0, 2, 2, 0, 0x0},
+ {218250000, 272812500, 1, 91, 0, 1, 1, 1, 3, 1, 1, 0, 0x0},
+ {229500000, 229500000, 2, 153, 0, 1, 1, 1, 0, 2, 2, 0, 0x0},
+ {229500000, 286875000, 1, 191, 0, 2, 2, 1, 3, 2, 2, 0, 0x0},
+ {234000000, 234000000, 1, 39, 0, 0, 0, 1, 0, 1, 1, 0, 0x0},
+ {234000000, 292500000, 1, 195, 0, 2, 2, 1, 3, 2, 2, 0, 0x0},
+ {241500000, 241500000, 2, 161, 0, 1, 1, 1, 0, 2, 2, 0, 0x0},
+ {241500000, 301875000, 1, 201, 0, 2, 2, 1, 3, 2, 2, 0, 0x0},
+ {245250000, 245250000, 4, 327, 0, 1, 1, 1, 0, 2, 2, 0, 0x0},
+ {245250000, 306562500, 1, 51, 0, 0, 0, 1, 3, 0, 0, 1, 0x0},
+ {245500000, 245500000, 4, 491, 2, 0, 0, 1, 1, 2, 2, 0, 0x0},
+ {245500000, 306875000, 1, 51, 0, 0, 0, 1, 3, 0, 0, 1, 0x0},
+ {261000000, 261000000, 1, 87, 0, 1, 1, 1, 0, 2, 2, 0, 0x0},
+ {261000000, 326250000, 1, 109, 0, 1, 1, 1, 3, 1, 1, 0, 0x0},
+ {268250000, 268250000, 9, 402, 0, 0, 0, 1, 0, 1, 1, 0, 0x600000},
+ {268250000, 335312500, 1, 111, 0, 1, 1, 1, 3, 1, 1, 0, 0xc5554f},
+ {268500000, 268500000, 2, 179, 0, 1, 1, 1, 0, 2, 2, 0, 0x0},
+ {268500000, 335625000, 1, 56, 0, 0, 0, 1, 3, 0, 0, 1, 0x0},
+ {281250000, 281250000, 4, 375, 0, 1, 1, 1, 0, 2, 2, 0, 0x0},
+ {281250000, 351562500, 1, 117, 0, 3, 1, 1, 3, 1, 1, 0, 0x0},
+ {288000000, 288000000, 1, 48, 0, 0, 0, 1, 0, 1, 1, 0, 0x0},
+ {288000000, 360000000, 1, 60, 0, 2, 0, 1, 3, 0, 0, 1, 0x0},
+ {296703000, 296703000, 1, 49, 0, 0, 0, 1, 0, 1, 1, 0, 0x7353f7},
+ {296703000, 370878750, 1, 123, 0, 3, 1, 1, 3, 1, 1, 0, 0xa051eb},
+ {297000000, 297000000, 1, 99, 0, 1, 1, 1, 0, 2, 2, 0, 0x0},
+ {297000000, 371250000, 4, 495, 0, 3, 1, 1, 3, 1, 1, 0, 0x0},
+ {312250000, 312250000, 9, 468, 0, 0, 0, 1, 0, 1, 1, 0, 0x600000},
+ {312250000, 390312500, 1, 130, 0, 3, 1, 1, 3, 1, 1, 0, 0x1aaab0},
+ {317000000, 317000000, 3, 317, 0, 1, 1, 1, 0, 2, 2, 0, 0x0},
+ {317000000, 396250000, 1, 66, 0, 2, 0, 1, 3, 0, 0, 1, 0x0},
+ {319750000, 319750000, 3, 159, 0, 0, 0, 1, 0, 1, 1, 0, 0xe00000},
+ {319750000, 399687500, 3, 199, 0, 2, 0, 1, 3, 0, 0, 1, 0xd80000},
+ {333250000, 333250000, 9, 499, 0, 0, 0, 1, 0, 1, 1, 0, 0xe00000},
+ {333250000, 416562500, 1, 138, 0, 3, 1, 1, 3, 1, 1, 0, 0xdaaab0},
+ {348500000, 348500000, 9, 522, 0, 2, 0, 1, 0, 1, 1, 0, 0xc00000},
+ {348500000, 435625000, 1, 145, 0, 3, 1, 1, 3, 1, 1, 0, 0x35554f},
+ {356500000, 356500000, 9, 534, 0, 2, 0, 1, 0, 1, 1, 0, 0xc00000},
+ {356500000, 445625000, 1, 148, 0, 3, 1, 1, 3, 1, 1, 0, 0x8aaab0},
+ {380500000, 380500000, 9, 570, 0, 2, 0, 1, 0, 1, 1, 0, 0xc00000},
+ {380500000, 475625000, 1, 158, 0, 3, 1, 1, 3, 1, 1, 0, 0x8aaab0},
+ {443250000, 443250000, 1, 73, 0, 2, 0, 1, 0, 1, 1, 0, 0xe00000},
+ {443250000, 554062500, 1, 92, 0, 2, 0, 1, 3, 0, 0, 1, 0x580000},
+ {505250000, 505250000, 9, 757, 0, 2, 0, 1, 0, 1, 1, 0, 0xe00000},
+ {552750000, 552750000, 3, 276, 0, 2, 0, 1, 0, 1, 1, 0, 0x600000},
+ {593407000, 296703500, 3, 296, 0, 1, 1, 1, 0, 1, 1, 0, 0xb41893},
+ {593407000, 370879375, 4, 494, 0, 3, 1, 1, 3, 0, 0, 1, 0x817e4a},
+ {593407000, 593407000, 3, 296, 0, 2, 0, 1, 0, 1, 1, 0, 0xb41893},
+ {594000000, 297000000, 1, 99, 0, 1, 1, 1, 0, 1, 1, 0, 0x0},
+ {594000000, 371250000, 4, 495, 0, 3, 1, 1, 3, 0, 0, 1, 0x0},
+ {594000000, 594000000, 1, 99, 0, 2, 0, 1, 0, 1, 1, 0, 0x0},
+ { /* sentinel */ }
+};
+
+static const struct post_pll_config post_pll_cfg_table[] = {
+ {33750000, 1, 40, 8, 1},
+ {33750000, 1, 80, 8, 2},
+ {74250000, 1, 40, 8, 1},
+ {74250000, 18, 80, 8, 2},
+ {148500000, 2, 40, 4, 3},
+ {297000000, 4, 40, 2, 3},
+ {594000000, 8, 40, 1, 3},
+ { /* sentinel */ }
+};
+
+/* phy tuning values for an undocumented set of registers */
+static const struct phy_config rk3328_phy_cfg[] = {
+ { 165000000, {
+ 0x07, 0x0a, 0x0a, 0x0a, 0x00, 0x00, 0x08, 0x08, 0x08,
+ 0x00, 0xac, 0xcc, 0xcc, 0xcc,
+ },
+ }, {
+ 340000000, {
+ 0x0b, 0x0d, 0x0d, 0x0d, 0x07, 0x15, 0x08, 0x08, 0x08,
+ 0x3f, 0xac, 0xcc, 0xcd, 0xdd,
+ },
+ }, {
+ 594000000, {
+ 0x10, 0x1a, 0x1a, 0x1a, 0x07, 0x15, 0x08, 0x08, 0x08,
+ 0x00, 0xac, 0xcc, 0xcc, 0xcc,
+ },
+ }, { /* sentinel */ },
+};
+
+static inline void inno_write(struct inno_hdmi_phy *inno, u32 reg, u8 val)
+{
+ writel(val, inno->regs + (reg * 4));
+}
+
+static inline u8 inno_read(struct inno_hdmi_phy *inno, u32 reg)
+{
+ u32 val;
+
+ val = readl(inno->regs + (reg * 4));
+
+ return val;
+}
+
+static inline void inno_update_bits(struct inno_hdmi_phy *inno, u8 reg,
+ u8 mask, u8 val)
+{
+ u32 tmp, orig;
+
+ orig = inno_read(inno, reg);
+ tmp = orig & ~mask;
+ tmp |= val & mask;
+ inno_write(inno, reg, tmp);
+}
+
+#define inno_poll(reg, val, cond, sleep_us, timeout_us) \
+ readl_poll_sleep_timeout((reg) * 4, val, cond, sleep_us, timeout_us)
+
+static unsigned long inno_hdmi_phy_get_tmdsclk(struct inno_hdmi_phy *inno,
+ unsigned long rate)
+{
+ int bus_width = inno->bus_width;
+
+ switch (bus_width) {
+ case 4:
+ case 5:
+ case 6:
+ case 10:
+ case 12:
+ case 16:
+ return (u64)rate * bus_width / 8;
+ default:
+ return rate;
+ }
+}
+
+static
+unsigned long inno_hdmi_phy_rk3328_clk_recalc_rate(struct phy *phy,
+ unsigned long parent_rate)
+{
+ struct inno_hdmi_phy *inno = dev_get_priv(phy->dev);
+ unsigned long frac;
+ u8 nd, no_a, no_b, no_d;
+ u64 vco;
+ u16 nf;
+
+ nd = inno_read(inno, 0xa1) & RK3328_PRE_PLL_PRE_DIV_MASK;
+ nf = ((inno_read(inno, 0xa2) & RK3328_PRE_PLL_FB_DIV_11_8_MASK) << 8);
+ nf |= inno_read(inno, 0xa3);
+ vco = parent_rate * nf;
+
+ if (!(inno_read(inno, 0xa2) & RK3328_PRE_PLL_FRAC_DIV_DISABLE)) {
+ frac = inno_read(inno, 0xd3) |
+ (inno_read(inno, 0xd2) << 8) |
+ (inno_read(inno, 0xd1) << 16);
+ vco += DIV_ROUND_CLOSEST(parent_rate * frac, (1 << 24));
+ }
+
+ if (inno_read(inno, 0xa0) & RK3328_PCLK_VCO_DIV_5_MASK) {
+ do_div(vco, nd * 5);
+ } else {
+ no_a = inno_read(inno, 0xa5) & RK3328_PRE_PLL_PCLK_DIV_A_MASK;
+ no_b = inno_read(inno, 0xa5) & RK3328_PRE_PLL_PCLK_DIV_B_MASK;
+ no_b >>= RK3328_PRE_PLL_PCLK_DIV_B_SHIFT;
+ no_b += 2;
+ no_d = inno_read(inno, 0xa6) & RK3328_PRE_PLL_PCLK_DIV_D_MASK;
+
+ do_div(vco, (nd * (no_a == 1 ? no_b : no_a) * no_d * 2));
+ }
+
+ inno->pixclock = DIV_ROUND_CLOSEST((unsigned long)vco, 1000) * 1000;
+
+ dev_info(phy->dev, "rate %lu vco %llu\n", inno->pixclock, vco);
+
+ return inno->pixclock;
+}
+
+static long inno_hdmi_phy_rk3328_clk_round_rate(struct phy *phy,
+ unsigned long rate)
+{
+ const struct pre_pll_config *cfg = pre_pll_cfg_table;
+
+ rate = (rate / 1000) * 1000;
+
+ for (; cfg->pixclock != 0; cfg++)
+ if (cfg->pixclock == rate)
+ break;
+
+ if (cfg->pixclock == 0)
+ return -EINVAL;
+
+ return cfg->pixclock;
+}
+
+static const
+struct pre_pll_config *inno_hdmi_phy_get_pre_pll_cfg(struct inno_hdmi_phy *inno,
+ unsigned long rate)
+{
+ const struct pre_pll_config *cfg = pre_pll_cfg_table;
+ unsigned long tmdsclock = inno_hdmi_phy_get_tmdsclk(inno, rate);
+
+ for (; cfg->pixclock != 0; cfg++)
+ if (cfg->pixclock == rate && cfg->tmdsclock == tmdsclock)
+ break;
+
+ if (cfg->pixclock == 0)
+ return ERR_PTR(-EINVAL);
+
+ return cfg;
+}
+
+static int
+inno_hdmi_phy_rk3328_clk_set_rate(struct phy *phy,
+ unsigned long rate,
+ unsigned long parent_rate)
+{
+ struct inno_hdmi_phy *inno = dev_get_priv(phy->dev);
+ unsigned long tmdsclock = inno_hdmi_phy_get_tmdsclk(inno, rate);
+ const struct pre_pll_config *cfg;
+ u32 val;
+ int ret;
+
+ dev_info(phy->dev, "rate %lu tmdsclk %lu\n", rate, tmdsclock);
+
+ if (inno->pixclock == rate && inno->tmdsclock == tmdsclock)
+ return 0;
+
+ cfg = inno_hdmi_phy_get_pre_pll_cfg(inno, rate);
+ if (IS_ERR(cfg))
+ return PTR_ERR(cfg);
+
+ inno_update_bits(inno, 0xa0, RK3328_PRE_PLL_POWER_DOWN,
+ RK3328_PRE_PLL_POWER_DOWN);
+
+ /* Configure pre-pll */
+ inno_update_bits(inno, 0xa0, RK3328_PCLK_VCO_DIV_5_MASK,
+ RK3328_PCLK_VCO_DIV_5(cfg->vco_div_5_en));
+ inno_write(inno, 0xa1, RK3328_PRE_PLL_PRE_DIV(cfg->prediv));
+
+ val = RK3328_SPREAD_SPECTRUM_MOD_DISABLE;
+ if (!cfg->fracdiv)
+ val |= RK3328_PRE_PLL_FRAC_DIV_DISABLE;
+ inno_write(inno, 0xa2, RK3328_PRE_PLL_FB_DIV_11_8(cfg->fbdiv) | val);
+ inno_write(inno, 0xa3, RK3328_PRE_PLL_FB_DIV_7_0(cfg->fbdiv));
+ inno_write(inno, 0xa5, RK3328_PRE_PLL_PCLK_DIV_A(cfg->pclk_div_a) |
+ RK3328_PRE_PLL_PCLK_DIV_B(cfg->pclk_div_b));
+ inno_write(inno, 0xa6, RK3328_PRE_PLL_PCLK_DIV_C(cfg->pclk_div_c) |
+ RK3328_PRE_PLL_PCLK_DIV_D(cfg->pclk_div_d));
+ inno_write(inno, 0xa4, RK3328_PRE_PLL_TMDSCLK_DIV_C(cfg->tmds_div_c) |
+ RK3328_PRE_PLL_TMDSCLK_DIV_A(cfg->tmds_div_a) |
+ RK3328_PRE_PLL_TMDSCLK_DIV_B(cfg->tmds_div_b));
+ inno_write(inno, 0xd3, RK3328_PRE_PLL_FRAC_DIV_7_0(cfg->fracdiv));
+ inno_write(inno, 0xd2, RK3328_PRE_PLL_FRAC_DIV_15_8(cfg->fracdiv));
+ inno_write(inno, 0xd1, RK3328_PRE_PLL_FRAC_DIV_23_16(cfg->fracdiv));
+
+ inno_update_bits(inno, 0xa0, RK3328_PRE_PLL_POWER_DOWN, 0);
+
+ /* Wait for Pre-PLL lock */
+ ret = inno_poll(0xa9, val, val & RK3328_PRE_PLL_LOCK_STATUS,
+ 1000, 10000);
+ if (ret) {
+ dev_err(phy->dev, "Pre-PLL locking failed\n");
+ return ret;
+ }
+
+ inno->pixclock = rate;
+ inno->tmdsclock = tmdsclock;
+
+ return 0;
+}
+
+static void inno_hdmi_phy_rk3328_clk_enable(struct phy *phy)
+{
+ struct inno_hdmi_phy *inno = dev_get_priv(phy->dev);
+
+ inno_update_bits(inno, 0xa0, RK3328_PRE_PLL_POWER_DOWN, 0);
+}
+
+static void inno_hdmi_phy_rk3328_clk_disable(struct phy *phy)
+{
+ struct inno_hdmi_phy *inno = dev_get_priv(phy->dev);
+
+ inno_update_bits(inno, 0xa0, RK3328_PRE_PLL_POWER_DOWN,
+ RK3328_PRE_PLL_POWER_DOWN);
+}
+
+static int
+inno_hdmi_phy_rk3328_power_on(struct phy *phy,
+ const struct post_pll_config *cfg,
+ const struct phy_config *phy_cfg)
+{
+ struct inno_hdmi_phy *inno = dev_get_priv(phy->dev);
+ int ret;
+ u32 v;
+
+ inno_update_bits(inno, 0x02, RK3328_PDATA_EN, 0);
+ inno_update_bits(inno, 0xaa, RK3328_POST_PLL_POWER_DOWN,
+ RK3328_POST_PLL_POWER_DOWN);
+
+ inno_write(inno, 0xac, RK3328_POST_PLL_FB_DIV_7_0(cfg->fbdiv));
+ if (cfg->postdiv == 1) {
+ inno_write(inno, 0xab, RK3328_POST_PLL_FB_DIV_8(cfg->fbdiv) |
+ RK3328_POST_PLL_PRE_DIV(cfg->prediv));
+ inno_write(inno, 0xaa, RK3328_POST_PLL_REFCLK_SEL_TMDS |
+ RK3328_POST_PLL_POWER_DOWN);
+ } else {
+ v = (cfg->postdiv / 2) - 1;
+ v &= RK3328_POST_PLL_POST_DIV_MASK;
+ inno_write(inno, 0xad, v);
+ inno_write(inno, 0xab, RK3328_POST_PLL_FB_DIV_8(cfg->fbdiv) |
+ RK3328_POST_PLL_PRE_DIV(cfg->prediv));
+ inno_write(inno, 0xaa, RK3328_POST_PLL_POST_DIV_ENABLE |
+ RK3328_POST_PLL_REFCLK_SEL_TMDS |
+ RK3328_POST_PLL_POWER_DOWN);
+ }
+
+ for (v = 0; v < 14; v++)
+ inno_write(inno, 0xb5 + v, phy_cfg->regs[v]);
+
+ /* set ESD detection threshold for TMDS CLK, D2, D1 and D0 */
+ for (v = 0; v < 4; v++)
+ inno_update_bits(inno, 0xc8 + v, RK3328_ESD_DETECT_MASK,
+ RK3328_ESD_DETECT_340MV);
+
+ if (phy_cfg->tmdsclock > 340000000) {
+ /* Set termination resistor to 100ohm */
+ v = clk_get_rate(&inno->sysclk) / 100000;
+ inno_write(inno, 0xc5, RK3328_TERM_RESISTOR_CALIB_SPEED_14_8(v)
+ | RK3328_BYPASS_TERM_RESISTOR_CALIB);
+ inno_write(inno, 0xc6, RK3328_TERM_RESISTOR_CALIB_SPEED_7_0(v));
+ inno_write(inno, 0xc7, RK3328_TERM_RESISTOR_100);
+ inno_update_bits(inno, 0xc5,
+ RK3328_BYPASS_TERM_RESISTOR_CALIB, 0);
+ } else {
+ inno_write(inno, 0xc5, RK3328_BYPASS_TERM_RESISTOR_CALIB);
+
+ /* clk termination resistor is 50ohm (parallel resistors) */
+ if (phy_cfg->tmdsclock > 165000000)
+ inno_update_bits(inno, 0xc8,
+ RK3328_TMDS_TERM_RESIST_MASK,
+ RK3328_TMDS_TERM_RESIST_75 |
+ RK3328_TMDS_TERM_RESIST_150);
+
+ /* data termination resistor for D2, D1 and D0 is 150ohm */
+ for (v = 0; v < 3; v++)
+ inno_update_bits(inno, 0xc9 + v,
+ RK3328_TMDS_TERM_RESIST_MASK,
+ RK3328_TMDS_TERM_RESIST_150);
+ }
+
+ inno_update_bits(inno, 0xaa, RK3328_POST_PLL_POWER_DOWN, 0);
+ inno_update_bits(inno, 0xb0, RK3328_BANDGAP_ENABLE,
+ RK3328_BANDGAP_ENABLE);
+ inno_update_bits(inno, 0xb2, RK3328_TMDS_DRIVER_ENABLE,
+ RK3328_TMDS_DRIVER_ENABLE);
+
+ /* Wait for post PLL lock */
+ ret = inno_poll(0xaf, v, v & RK3328_POST_PLL_LOCK_STATUS,
+ 1000, 10000);
+ if (ret) {
+ dev_err(phy->dev, "Post-PLL locking failed\n");
+ return ret;
+ }
+
+ if (phy_cfg->tmdsclock > 340000000)
+ mdelay(100);
+
+ inno_update_bits(inno, 0x02, RK3328_PDATA_EN, RK3328_PDATA_EN);
+
+ /* Enable PHY IRQ */
+ inno_write(inno, 0x05, RK3328_INT_TMDS_CLK(RK3328_INT_VSS_AGND_ESD_DET)
+ | RK3328_INT_TMDS_D2(RK3328_INT_VSS_AGND_ESD_DET));
+ inno_write(inno, 0x07, RK3328_INT_TMDS_D1(RK3328_INT_VSS_AGND_ESD_DET)
+ | RK3328_INT_TMDS_D0(RK3328_INT_VSS_AGND_ESD_DET));
+
+ return 0;
+}
+
+static void inno_hdmi_phy_rk3328_power_off(struct phy *phy)
+{
+ struct inno_hdmi_phy *inno = dev_get_priv(phy->dev);
+
+ inno_update_bits(inno, 0xb2, RK3328_TMDS_DRIVER_ENABLE, 0);
+ inno_update_bits(inno, 0xb0, RK3328_BANDGAP_ENABLE, 0);
+ inno_update_bits(inno, 0xaa, RK3328_POST_PLL_POWER_DOWN,
+ RK3328_POST_PLL_POWER_DOWN);
+
+ /* Disable PHY IRQ */
+ inno_write(inno, 0x05, 0);
+ inno_write(inno, 0x07, 0);
+}
+
+static void inno_hdmi_phy_rk3328_init(struct phy *phy)
+{
+ struct inno_hdmi_phy *inno = dev_get_priv(phy->dev);
+ const struct inno_hdmi_phy_plat_ops *plat_ops = inno->data->plat_ops;
+
+ /*
+ * Use phy internal register control
+ * rxsense/poweron/pllpd/pdataen signal.
+ */
+ inno_write(inno, 0x01, RK3328_BYPASS_RXSENSE_EN |
+ RK3328_BYPASS_POWERON_EN |
+ RK3328_BYPASS_PLLPD_EN);
+ inno_write(inno, 0x02, RK3328_INT_POL_HIGH | RK3328_BYPASS_PDATA_EN |
+ RK3328_PDATA_EN);
+
+ /* Disable phy irq */
+ inno_write(inno, 0x05, 0);
+ inno_write(inno, 0x07, 0);
+
+ if (plat_ops->clk_recalc_rate)
+ plat_ops->clk_recalc_rate(phy, clk_get_rate(&inno->refoclk));
+
+ if (plat_ops->clk_round_rate)
+ plat_ops->clk_round_rate(phy, inno->pixclock);
+}
+
+static const struct inno_hdmi_phy_plat_ops rk3328_hdmi_phy_plat_ops = {
+ .init = inno_hdmi_phy_rk3328_init,
+ .power_on = inno_hdmi_phy_rk3328_power_on,
+ .power_off = inno_hdmi_phy_rk3328_power_off,
+ .clk_enable = inno_hdmi_phy_rk3328_clk_enable,
+ .clk_disable = inno_hdmi_phy_rk3328_clk_disable,
+ .clk_recalc_rate = inno_hdmi_phy_rk3328_clk_recalc_rate,
+ .clk_round_rate = inno_hdmi_phy_rk3328_clk_round_rate,
+ .clk_set_rate = inno_hdmi_phy_rk3328_clk_set_rate,
+};
+
+static int inno_hdmi_phy_power_on(struct phy *phy)
+{
+ struct inno_hdmi_phy *inno = dev_get_priv(phy->dev);
+ const struct post_pll_config *cfg = post_pll_cfg_table;
+ const struct phy_config *phy_cfg = inno->data->phy_cfg_table;
+ u32 tmdsclock = inno_hdmi_phy_get_tmdsclk(inno, inno->pixclock);
+ const struct inno_hdmi_phy_plat_ops *plat_ops = inno->data->plat_ops;
+ int ret;
+
+ if (!tmdsclock) {
+ dev_err(phy->dev, "TMDS clock is zero!\n");
+ return -EINVAL;
+ }
+
+ if (!plat_ops->power_on)
+ return -EINVAL;
+
+ dev_info(phy->dev, "TMDS clock = %d\n", tmdsclock);
+
+ for (; cfg->tmdsclock != ~0UL; cfg++)
+ if (tmdsclock <= cfg->tmdsclock)
+ break;
+
+ for (; phy_cfg->tmdsclock != ~0UL; phy_cfg++)
+ if (tmdsclock <= phy_cfg->tmdsclock)
+ break;
+
+ if (cfg->tmdsclock == 0 || phy_cfg->tmdsclock == 0)
+ return -EINVAL;
+
+ if (plat_ops->clk_set_rate) {
+ ret = plat_ops->clk_set_rate(phy, inno->pixclock, 24000000);
+ if (ret)
+ return ret;
+ }
+
+ if (plat_ops->clk_enable)
+ plat_ops->clk_enable(phy);
+
+ if (plat_ops->power_on) {
+ ret = plat_ops->power_on(phy, cfg, phy_cfg);
+ if (ret) {
+ if (plat_ops->clk_disable)
+ plat_ops->clk_disable(phy);
+ return ret;
+ }
+ }
+
+ return 0;
+}
+
+static int inno_hdmi_phy_power_off(struct phy *phy)
+{
+ struct inno_hdmi_phy *inno = dev_get_priv(phy->dev);
+ const struct inno_hdmi_phy_plat_ops *plat_ops = inno->data->plat_ops;
+
+ if (!plat_ops->power_off)
+ return -EINVAL;
+
+ plat_ops->power_off(phy);
+
+ if (plat_ops->clk_disable)
+ plat_ops->clk_disable(phy);
+
+ inno->tmdsclock = 0;
+
+ return 0;
+}
+
+static int inno_hdmi_phy_init(struct phy *phy)
+{
+ struct inno_hdmi_phy *inno = dev_get_priv(phy->dev);
+
+ if (inno->data->plat_ops->init)
+ inno->data->plat_ops->init(phy);
+
+ return 0;
+}
+
+static struct phy_ops inno_hdmi_phy_ops = {
+ .init = inno_hdmi_phy_init,
+ .power_on = inno_hdmi_phy_power_on,
+ .power_off = inno_hdmi_phy_power_off,
+};
+
+static int inno_hdmi_phy_probe(struct udevice *dev)
+{
+ struct inno_hdmi_phy *inno = dev_get_priv(dev);
+ int ret;
+
+ inno->regs = dev_read_addr_ptr(dev);
+ if (!inno->regs)
+ return -ENOMEM;
+
+ inno->data = (const struct inno_hdmi_phy_data *)dev_get_driver_data(dev);
+ if (!inno->data)
+ return -EINVAL;
+
+ inno->bus_width = 8;
+
+ ret = clk_get_by_name(dev, "refoclk", &inno->refoclk);
+ if (ret) {
+ dev_err(dev, "failed to get the refoclk (ret=%d)\n", ret);
+ return ret;
+ }
+
+ ret = clk_get_by_name(dev, "sysclk", &inno->sysclk);
+ if (ret) {
+ dev_err(dev, "failed to get the sysclk (ret=%d)\n", ret);
+ return ret;
+ }
+
+ return 0;
+}
+
+static const struct inno_hdmi_phy_data rk3328_inno_hdmi_phy_drv_data = {
+ .phy_type = INNO_HDMI_PHY_RK3328,
+ .plat_ops = &rk3328_hdmi_phy_plat_ops,
+ .phy_cfg_table = rk3328_phy_cfg,
+};
+
+static const struct udevice_id inno_hdmi_phy_ids[] = {
+ {
+ .compatible = "rockchip,rk3328-hdmi-phy",
+ .data = (ulong)&rk3328_inno_hdmi_phy_drv_data,
+ },
+ { /* sentile */ }
+};
+
+U_BOOT_DRIVER(inno_hdmi_phy) = {
+ .name = "inno_hdmi_phy",
+ .id = UCLASS_PHY,
+ .of_match = inno_hdmi_phy_ids,
+ .ops = &inno_hdmi_phy_ops,
+ .probe = inno_hdmi_phy_probe,
+ .priv_auto = sizeof(struct inno_hdmi_phy),
+};
diff --git a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
index d392aed..43f6e02 100644
--- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
@@ -329,6 +329,22 @@
return ret;
}
+static const struct rockchip_usb2phy_cfg rk3308_phy_cfgs[] = {
+ {
+ .reg = 0x100,
+ .clkout_ctl = { 0x0108, 4, 4, 1, 0 },
+ .port_cfgs = {
+ [USB2PHY_PORT_OTG] = {
+ .phy_sus = { 0x0100, 1, 0, 2, 1 },
+ },
+ [USB2PHY_PORT_HOST] = {
+ .phy_sus = { 0x0104, 1, 0, 2, 1 },
+ }
+ },
+ },
+ { /* sentinel */ }
+};
+
static const struct rockchip_usb2phy_cfg rk3328_usb2phy_cfgs[] = {
{
.reg = 0x100,
@@ -443,6 +459,10 @@
static const struct udevice_id rockchip_usb2phy_ids[] = {
{
+ .compatible = "rockchip,rk3308-usb2phy",
+ .data = (ulong)&rk3308_phy_cfgs,
+ },
+ {
.compatible = "rockchip,rk3328-usb2phy",
.data = (ulong)&rk3328_usb2phy_cfgs,
},
diff --git a/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c b/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c
index 9ca66bf..3ad339b 100644
--- a/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c
+++ b/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c
@@ -5,7 +5,6 @@
* Copyright (C) 2021 Rockchip Electronics Co., Ltd.
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <dm/lists.h>
diff --git a/drivers/phy/rockchip/phy-rockchip-pcie.c b/drivers/phy/rockchip/phy-rockchip-pcie.c
index 44ca4bc..6600370 100644
--- a/drivers/phy/rockchip/phy-rockchip-pcie.c
+++ b/drivers/phy/rockchip/phy-rockchip-pcie.c
@@ -7,7 +7,6 @@
* Copyright (C) 2016 ROCKCHIP, Inc.
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <asm/global_data.h>
diff --git a/drivers/phy/rockchip/phy-rockchip-snps-pcie3.c b/drivers/phy/rockchip/phy-rockchip-snps-pcie3.c
index a4392da..2737bd8 100644
--- a/drivers/phy/rockchip/phy-rockchip-snps-pcie3.c
+++ b/drivers/phy/rockchip/phy-rockchip-snps-pcie3.c
@@ -5,7 +5,6 @@
* Copyright (C) 2021 Rockchip Electronics Co., Ltd.
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <generic-phy.h>
diff --git a/drivers/phy/rockchip/phy-rockchip-typec.c b/drivers/phy/rockchip/phy-rockchip-typec.c
index 47c69dd..c7459db 100644
--- a/drivers/phy/rockchip/phy-rockchip-typec.c
+++ b/drivers/phy/rockchip/phy-rockchip-typec.c
@@ -8,7 +8,6 @@
* Kever Yang <kever.yang@rock-chips.com>
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <asm/global_data.h>
diff --git a/drivers/phy/rockchip/phy-rockchip-usbdp.c b/drivers/phy/rockchip/phy-rockchip-usbdp.c
index baf9252..5bcc766 100644
--- a/drivers/phy/rockchip/phy-rockchip-usbdp.c
+++ b/drivers/phy/rockchip/phy-rockchip-usbdp.c
@@ -5,7 +5,6 @@
* Copyright (C) 2021 Rockchip Electronics Co., Ltd
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <dm/device_compat.h>
diff --git a/drivers/phy/sandbox-phy.c b/drivers/phy/sandbox-phy.c
index 7e123da..b159147 100644
--- a/drivers/phy/sandbox-phy.c
+++ b/drivers/phy/sandbox-phy.c
@@ -4,7 +4,6 @@
* Written by Jean-Jacques Hiblot <jjhiblot@ti.com>
*/
-#include <common.h>
#include <dm.h>
#include <generic-phy.h>
diff --git a/drivers/phy/socionext/phy-uniphier-pcie.c b/drivers/phy/socionext/phy-uniphier-pcie.c
index d352c4c..91208df 100644
--- a/drivers/phy/socionext/phy-uniphier-pcie.c
+++ b/drivers/phy/socionext/phy-uniphier-pcie.c
@@ -4,7 +4,6 @@
* Copyright 2019-2021 Socionext, Inc.
*/
-#include <common.h>
#include <dm.h>
#include <generic-phy.h>
#include <linux/bitops.h>
diff --git a/drivers/phy/socionext/phy-uniphier-usb3.c b/drivers/phy/socionext/phy-uniphier-usb3.c
index 1d65b0b..1d65c1f 100644
--- a/drivers/phy/socionext/phy-uniphier-usb3.c
+++ b/drivers/phy/socionext/phy-uniphier-usb3.c
@@ -4,7 +4,6 @@
* Copyright 2019-2023 Socionext, Inc.
*/
-#include <common.h>
#include <dm.h>
#include <generic-phy.h>
diff --git a/drivers/phy/sti_usb_phy.c b/drivers/phy/sti_usb_phy.c
index 9e5ac9b..2447e89 100644
--- a/drivers/phy/sti_usb_phy.c
+++ b/drivers/phy/sti_usb_phy.c
@@ -4,7 +4,6 @@
* Author(s): Patrice Chotard, <patrice.chotard@foss.st.com> for STMicroelectronics.
*/
-#include <common.h>
#include <log.h>
#include <asm/global_data.h>
#include <asm/io.h>
diff --git a/drivers/phy/ti-pipe3-phy.c b/drivers/phy/ti-pipe3-phy.c
index 29a35ae..62f6cc2 100644
--- a/drivers/phy/ti-pipe3-phy.c
+++ b/drivers/phy/ti-pipe3-phy.c
@@ -4,7 +4,6 @@
* Written by Jean-Jacques Hiblot <jjhiblot@ti.com>
*/
-#include <common.h>
#include <dm.h>
#include <dm/device.h>
#include <generic-phy.h>
diff --git a/drivers/phy/ti/phy-j721e-wiz.c b/drivers/phy/ti/phy-j721e-wiz.c
index daf62f5..c69a342 100644
--- a/drivers/phy/ti/phy-j721e-wiz.c
+++ b/drivers/phy/ti/phy-j721e-wiz.c
@@ -4,7 +4,6 @@
* Jean-Jacques Hiblot <jjhiblot@ti.com>
*/
-#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <dm/device_compat.h>
diff --git a/drivers/pinctrl/aspeed/pinctrl_ast2500.c b/drivers/pinctrl/aspeed/pinctrl_ast2500.c
index 93920a6..9e7c347 100644
--- a/drivers/pinctrl/aspeed/pinctrl_ast2500.c
+++ b/drivers/pinctrl/aspeed/pinctrl_ast2500.c
@@ -3,7 +3,6 @@
* Copyright 2017 Google, Inc
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <log.h>
diff --git a/drivers/pinctrl/aspeed/pinctrl_ast2600.c b/drivers/pinctrl/aspeed/pinctrl_ast2600.c
index 8a4f970..bc12590 100644
--- a/drivers/pinctrl/aspeed/pinctrl_ast2600.c
+++ b/drivers/pinctrl/aspeed/pinctrl_ast2600.c
@@ -3,7 +3,6 @@
* Copyright (C) ASPEED Technology Inc.
*/
-#include <common.h>
#include <errno.h>
#include <asm/arch/pinctrl.h>
#include <asm/arch/scu_ast2600.h>
diff --git a/drivers/pinctrl/ath79/pinctrl_ar933x.c b/drivers/pinctrl/ath79/pinctrl_ar933x.c
index eb673a9..61e37a2 100644
--- a/drivers/pinctrl/ath79/pinctrl_ar933x.c
+++ b/drivers/pinctrl/ath79/pinctrl_ar933x.c
@@ -3,7 +3,6 @@
* Copyright (C) 2015-2016 Wills Wang <wills.wang@live.com>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <log.h>
diff --git a/drivers/pinctrl/ath79/pinctrl_qca953x.c b/drivers/pinctrl/ath79/pinctrl_qca953x.c
index 0d53426..e4f695f 100644
--- a/drivers/pinctrl/ath79/pinctrl_qca953x.c
+++ b/drivers/pinctrl/ath79/pinctrl_qca953x.c
@@ -3,7 +3,6 @@
* Copyright (C) 2015-2016 Wills Wang <wills.wang@live.com>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <log.h>
diff --git a/drivers/pinctrl/broadcom/pinctrl-bcm283x.c b/drivers/pinctrl/broadcom/pinctrl-bcm283x.c
index e949cb7..cf9350c 100644
--- a/drivers/pinctrl/broadcom/pinctrl-bcm283x.c
+++ b/drivers/pinctrl/broadcom/pinctrl-bcm283x.c
@@ -10,7 +10,6 @@
* https://spdx.org/licenses
*/
-#include <common.h>
#include <config.h>
#include <errno.h>
#include <dm.h>
diff --git a/drivers/pinctrl/broadcom/pinctrl-bcm6838.c b/drivers/pinctrl/broadcom/pinctrl-bcm6838.c
index 58f28a1..7d0c09a 100644
--- a/drivers/pinctrl/broadcom/pinctrl-bcm6838.c
+++ b/drivers/pinctrl/broadcom/pinctrl-bcm6838.c
@@ -1,6 +1,5 @@
// SPDX-License-Identifier: GPL-2.0
-#include <common.h>
#include <dm.h>
#include <regmap.h>
#include <syscon.h>
diff --git a/drivers/pinctrl/exynos/pinctrl-exynos.c b/drivers/pinctrl/exynos/pinctrl-exynos.c
index 8a045cd..b393127 100644
--- a/drivers/pinctrl/exynos/pinctrl-exynos.c
+++ b/drivers/pinctrl/exynos/pinctrl-exynos.c
@@ -6,7 +6,6 @@
*/
#include <log.h>
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <asm/io.h>
diff --git a/drivers/pinctrl/exynos/pinctrl-exynos7420.c b/drivers/pinctrl/exynos/pinctrl-exynos7420.c
index 77d510d..8fdf607 100644
--- a/drivers/pinctrl/exynos/pinctrl-exynos7420.c
+++ b/drivers/pinctrl/exynos/pinctrl-exynos7420.c
@@ -5,7 +5,6 @@
* Thomas Abraham <thomas.ab@samsung.com>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <asm/io.h>
diff --git a/drivers/pinctrl/exynos/pinctrl-exynos78x0.c b/drivers/pinctrl/exynos/pinctrl-exynos78x0.c
index 1b696fd..61b9844 100644
--- a/drivers/pinctrl/exynos/pinctrl-exynos78x0.c
+++ b/drivers/pinctrl/exynos/pinctrl-exynos78x0.c
@@ -9,7 +9,6 @@
* Thomas Abraham <thomas.ab@samsung.com>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <asm/io.h>
diff --git a/drivers/pinctrl/intel/pinctrl.c b/drivers/pinctrl/intel/pinctrl.c
index 1607000..6cfe83a 100644
--- a/drivers/pinctrl/intel/pinctrl.c
+++ b/drivers/pinctrl/intel/pinctrl.c
@@ -16,7 +16,6 @@
#define LOG_CATEGORY UCLASS_GPIO
-#include <common.h>
#include <dm.h>
#include <irq.h>
#include <log.h>
diff --git a/drivers/pinctrl/intel/pinctrl_apl.c b/drivers/pinctrl/intel/pinctrl_apl.c
index 181a6ff..e554d28 100644
--- a/drivers/pinctrl/intel/pinctrl_apl.c
+++ b/drivers/pinctrl/intel/pinctrl_apl.c
@@ -8,7 +8,6 @@
#define LOG_CATEGORY UCLASS_GPIO
-#include <common.h>
#include <dm.h>
#include <dt-structs.h>
#include <log.h>
diff --git a/drivers/pinctrl/mediatek/pinctrl-mtk-common.c b/drivers/pinctrl/mediatek/pinctrl-mtk-common.c
index 0baef57..37fc28b 100644
--- a/drivers/pinctrl/mediatek/pinctrl-mtk-common.c
+++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common.c
@@ -4,7 +4,6 @@
* Author: Ryder Lee <ryder.lee@mediatek.com>
*/
-#include <common.h>
#include <dm.h>
#include <dm/device-internal.h>
#include <dm/lists.h>
diff --git a/drivers/pinctrl/meson/pinctrl-meson-a1.c b/drivers/pinctrl/meson/pinctrl-meson-a1.c
index 30cf3bc..7e9ac63 100644
--- a/drivers/pinctrl/meson/pinctrl-meson-a1.c
+++ b/drivers/pinctrl/meson/pinctrl-meson-a1.c
@@ -6,7 +6,6 @@
* Author: Igor Prusov <ivprusov@sberdevices.ru>
*/
-#include <common.h>
#include <dm.h>
#include <dm/pinctrl.h>
#include <dt-bindings/gpio/meson-a1-gpio.h>
diff --git a/drivers/pinctrl/meson/pinctrl-meson-axg-pmx.c b/drivers/pinctrl/meson/pinctrl-meson-axg-pmx.c
index cfe94cf..52c726c 100644
--- a/drivers/pinctrl/meson/pinctrl-meson-axg-pmx.c
+++ b/drivers/pinctrl/meson/pinctrl-meson-axg-pmx.c
@@ -6,7 +6,6 @@
#include <log.h>
#include <asm/gpio.h>
-#include <common.h>
#include <dm.h>
#include <dm/pinctrl.h>
#include <linux/io.h>
diff --git a/drivers/pinctrl/meson/pinctrl-meson-axg.c b/drivers/pinctrl/meson/pinctrl-meson-axg.c
index 820a6c9..94e09cd 100644
--- a/drivers/pinctrl/meson/pinctrl-meson-axg.c
+++ b/drivers/pinctrl/meson/pinctrl-meson-axg.c
@@ -7,7 +7,6 @@
* Author: Xingyu Chen <xingyu.chen@amlogic.com>
*/
-#include <common.h>
#include <dm.h>
#include <dm/pinctrl.h>
#include <dt-bindings/gpio/meson-axg-gpio.h>
diff --git a/drivers/pinctrl/meson/pinctrl-meson-g12a.c b/drivers/pinctrl/meson/pinctrl-meson-g12a.c
index 90a4f80..24f47f8 100644
--- a/drivers/pinctrl/meson/pinctrl-meson-g12a.c
+++ b/drivers/pinctrl/meson/pinctrl-meson-g12a.c
@@ -8,7 +8,6 @@
* Author: Yixun Lan <yixun.lan@amlogic.com>
*/
-#include <common.h>
#include <dm.h>
#include <dm/pinctrl.h>
#include <dt-bindings/gpio/meson-g12a-gpio.h>
diff --git a/drivers/pinctrl/meson/pinctrl-meson-gx-pmx.c b/drivers/pinctrl/meson/pinctrl-meson-gx-pmx.c
index 99502d8..396b3a0 100644
--- a/drivers/pinctrl/meson/pinctrl-meson-gx-pmx.c
+++ b/drivers/pinctrl/meson/pinctrl-meson-gx-pmx.c
@@ -5,7 +5,6 @@
#include <log.h>
#include <asm/gpio.h>
-#include <common.h>
#include <dm.h>
#include <dm/pinctrl.h>
#include <linux/bitops.h>
diff --git a/drivers/pinctrl/meson/pinctrl-meson-gxbb.c b/drivers/pinctrl/meson/pinctrl-meson-gxbb.c
index 93a895c..03ae1f9 100644
--- a/drivers/pinctrl/meson/pinctrl-meson-gxbb.c
+++ b/drivers/pinctrl/meson/pinctrl-meson-gxbb.c
@@ -6,7 +6,6 @@
* Copyright (C) 2016 Endless Mobile, Inc.
*/
-#include <common.h>
#include <dm.h>
#include <dm/pinctrl.h>
#include <dt-bindings/gpio/meson-gxbb-gpio.h>
diff --git a/drivers/pinctrl/meson/pinctrl-meson-gxl.c b/drivers/pinctrl/meson/pinctrl-meson-gxl.c
index a44145e..16517f9 100644
--- a/drivers/pinctrl/meson/pinctrl-meson-gxl.c
+++ b/drivers/pinctrl/meson/pinctrl-meson-gxl.c
@@ -6,7 +6,6 @@
* Copyright (C) 2016 Endless Mobile, Inc.
*/
-#include <common.h>
#include <dm.h>
#include <dm/pinctrl.h>
#include <dt-bindings/gpio/meson-gxl-gpio.h>
diff --git a/drivers/pinctrl/meson/pinctrl-meson.c b/drivers/pinctrl/meson/pinctrl-meson.c
index ee362d8..babf1bc 100644
--- a/drivers/pinctrl/meson/pinctrl-meson.c
+++ b/drivers/pinctrl/meson/pinctrl-meson.c
@@ -3,7 +3,6 @@
* (C) Copyright 2016 - Beniamino Galvani <b.galvani@gmail.com>
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <malloc.h>
diff --git a/drivers/pinctrl/mscc/mscc-common.c b/drivers/pinctrl/mscc/mscc-common.c
index 307ed1d..2af5587 100644
--- a/drivers/pinctrl/mscc/mscc-common.c
+++ b/drivers/pinctrl/mscc/mscc-common.c
@@ -10,7 +10,6 @@
#include <asm/gpio.h>
#include <asm/system.h>
-#include <common.h>
#include <config.h>
#include <dm.h>
#include <dm/device-internal.h>
diff --git a/drivers/pinctrl/mscc/pinctrl-jr2.c b/drivers/pinctrl/mscc/pinctrl-jr2.c
index cb34058..4ef4040 100644
--- a/drivers/pinctrl/mscc/pinctrl-jr2.c
+++ b/drivers/pinctrl/mscc/pinctrl-jr2.c
@@ -6,7 +6,6 @@
* Copyright (c) 2018 Microsemi Corporation
*/
-#include <common.h>
#include <config.h>
#include <dm.h>
#include <dm/device-internal.h>
diff --git a/drivers/pinctrl/mscc/pinctrl-luton.c b/drivers/pinctrl/mscc/pinctrl-luton.c
index 325c9a9..7707350 100644
--- a/drivers/pinctrl/mscc/pinctrl-luton.c
+++ b/drivers/pinctrl/mscc/pinctrl-luton.c
@@ -7,7 +7,6 @@
* Copyright (c) 2018 Microsemi Corporation
*/
-#include <common.h>
#include <config.h>
#include <dm.h>
#include <dm/device-internal.h>
diff --git a/drivers/pinctrl/mscc/pinctrl-ocelot.c b/drivers/pinctrl/mscc/pinctrl-ocelot.c
index 57e2ef0..826388c 100644
--- a/drivers/pinctrl/mscc/pinctrl-ocelot.c
+++ b/drivers/pinctrl/mscc/pinctrl-ocelot.c
@@ -10,7 +10,6 @@
#include <asm/gpio.h>
#include <asm/system.h>
-#include <common.h>
#include <config.h>
#include <dm.h>
#include <dm/device-internal.h>
diff --git a/drivers/pinctrl/mscc/pinctrl-serval.c b/drivers/pinctrl/mscc/pinctrl-serval.c
index a6b9796..2081cd6 100644
--- a/drivers/pinctrl/mscc/pinctrl-serval.c
+++ b/drivers/pinctrl/mscc/pinctrl-serval.c
@@ -6,7 +6,6 @@
* Copyright (c) 2019 Microsemi Corporation
*/
-#include <common.h>
#include <config.h>
#include <dm.h>
#include <dm/device-internal.h>
diff --git a/drivers/pinctrl/mscc/pinctrl-servalt.c b/drivers/pinctrl/mscc/pinctrl-servalt.c
index 8e86785..efa4e26 100644
--- a/drivers/pinctrl/mscc/pinctrl-servalt.c
+++ b/drivers/pinctrl/mscc/pinctrl-servalt.c
@@ -6,7 +6,6 @@
* Copyright (c) 2019 Microsemi Corporation
*/
-#include <common.h>
#include <config.h>
#include <dm.h>
#include <dm/device-internal.h>
diff --git a/drivers/pinctrl/mtmips/pinctrl-mt7628.c b/drivers/pinctrl/mtmips/pinctrl-mt7628.c
index 79c63c7..dc7acec 100644
--- a/drivers/pinctrl/mtmips/pinctrl-mt7628.c
+++ b/drivers/pinctrl/mtmips/pinctrl-mt7628.c
@@ -5,7 +5,6 @@
* Author: Weijie Gao <weijie.gao@mediatek.com>
*/
-#include <common.h>
#include <dm.h>
#include <asm/global_data.h>
#include <dm/pinctrl.h>
diff --git a/drivers/pinctrl/mtmips/pinctrl-mtmips-common.c b/drivers/pinctrl/mtmips/pinctrl-mtmips-common.c
index 869b781..bab34e9 100644
--- a/drivers/pinctrl/mtmips/pinctrl-mtmips-common.c
+++ b/drivers/pinctrl/mtmips/pinctrl-mtmips-common.c
@@ -5,7 +5,6 @@
* Author: Weijie Gao <weijie.gao@mediatek.com>
*/
-#include <common.h>
#include <dm.h>
#include <malloc.h>
#include <dm/pinctrl.h>
diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
index e834ddd..6403629 100644
--- a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
+++ b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
@@ -16,7 +16,6 @@
* https://spdx.org/licenses
*/
-#include <common.h>
#include <config.h>
#include <dm.h>
#include <malloc.h>
diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-38x.c b/drivers/pinctrl/mvebu/pinctrl-armada-38x.c
index 252151f..78184d2 100644
--- a/drivers/pinctrl/mvebu/pinctrl-armada-38x.c
+++ b/drivers/pinctrl/mvebu/pinctrl-armada-38x.c
@@ -1,7 +1,6 @@
// SPDX-License-Identifier: GPL-2.0-or-later
// (C) 2022 Pali Rohár <pali@kernel.org>
-#include <common.h>
#include <config.h>
#include <dm.h>
#include <dm/devres.h>
diff --git a/drivers/pinctrl/mvebu/pinctrl-mvebu.c b/drivers/pinctrl/mvebu/pinctrl-mvebu.c
index fd49a97..0d5fa4c 100644
--- a/drivers/pinctrl/mvebu/pinctrl-mvebu.c
+++ b/drivers/pinctrl/mvebu/pinctrl-mvebu.c
@@ -4,7 +4,6 @@
* https://spdx.org/licenses
*/
-#include <common.h>
#include <config.h>
#include <fdtdec.h>
#include <errno.h>
diff --git a/drivers/pinctrl/nexell/pinctrl-nexell.c b/drivers/pinctrl/nexell/pinctrl-nexell.c
index 20497a7..d5be7ba 100644
--- a/drivers/pinctrl/nexell/pinctrl-nexell.c
+++ b/drivers/pinctrl/nexell/pinctrl-nexell.c
@@ -5,7 +5,6 @@
* Bongyu, KOO <freestyle@nexell.co.kr>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <asm/global_data.h>
diff --git a/drivers/pinctrl/nexell/pinctrl-s5pxx18.c b/drivers/pinctrl/nexell/pinctrl-s5pxx18.c
index 863eb14..e7d0994 100644
--- a/drivers/pinctrl/nexell/pinctrl-s5pxx18.c
+++ b/drivers/pinctrl/nexell/pinctrl-s5pxx18.c
@@ -7,7 +7,6 @@
* (C) Copyright 2019 Stefan Bosch <stefan_b@posteo.net>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <asm/global_data.h>
diff --git a/drivers/pinctrl/nxp/pinctrl-imx.c b/drivers/pinctrl/nxp/pinctrl-imx.c
index 1596dcc..ff466c4 100644
--- a/drivers/pinctrl/nxp/pinctrl-imx.c
+++ b/drivers/pinctrl/nxp/pinctrl-imx.c
@@ -3,7 +3,6 @@
* Copyright (C) 2016 Peng Fan <van.freenix@gmail.com>
*/
-#include <common.h>
#include <malloc.h>
#include <mapmem.h>
#include <asm/global_data.h>
diff --git a/drivers/pinctrl/nxp/pinctrl-imx5.c b/drivers/pinctrl/nxp/pinctrl-imx5.c
index b32b748..6b690fd 100644
--- a/drivers/pinctrl/nxp/pinctrl-imx5.c
+++ b/drivers/pinctrl/nxp/pinctrl-imx5.c
@@ -4,7 +4,6 @@
* Copyright (C) 2016 Peng Fan <van.freenix@gmail.com>
*/
-#include <common.h>
#include <dm.h>
#include <dm/pinctrl.h>
diff --git a/drivers/pinctrl/nxp/pinctrl-imx6.c b/drivers/pinctrl/nxp/pinctrl-imx6.c
index 6994dbb..322eec8 100644
--- a/drivers/pinctrl/nxp/pinctrl-imx6.c
+++ b/drivers/pinctrl/nxp/pinctrl-imx6.c
@@ -4,7 +4,6 @@
* Copyright (C) 2016 Peng Fan <van.freenix@gmail.com>
*/
-#include <common.h>
#include <dm.h>
#include <dm/pinctrl.h>
diff --git a/drivers/pinctrl/nxp/pinctrl-imx7.c b/drivers/pinctrl/nxp/pinctrl-imx7.c
index 77ddb8e..a8275e2 100644
--- a/drivers/pinctrl/nxp/pinctrl-imx7.c
+++ b/drivers/pinctrl/nxp/pinctrl-imx7.c
@@ -3,7 +3,6 @@
* Copyright (C) 2016 Peng Fan <van.freenix@gmail.com>
*/
-#include <common.h>
#include <dm.h>
#include <dm/pinctrl.h>
diff --git a/drivers/pinctrl/nxp/pinctrl-imx7ulp.c b/drivers/pinctrl/nxp/pinctrl-imx7ulp.c
index 6da9ff7..7ea2dbe 100644
--- a/drivers/pinctrl/nxp/pinctrl-imx7ulp.c
+++ b/drivers/pinctrl/nxp/pinctrl-imx7ulp.c
@@ -5,7 +5,6 @@
* Peng Fan <peng.fan@nxp.com>
*/
-#include <common.h>
#include <dm.h>
#include <dm/pinctrl.h>
diff --git a/drivers/pinctrl/nxp/pinctrl-imx8.c b/drivers/pinctrl/nxp/pinctrl-imx8.c
index 46af44e..4e9a9ea 100644
--- a/drivers/pinctrl/nxp/pinctrl-imx8.c
+++ b/drivers/pinctrl/nxp/pinctrl-imx8.c
@@ -3,7 +3,6 @@
* Copyright 2018 NXP
*/
-#include <common.h>
#include <asm/global_data.h>
#include <dm/device.h>
#include <dm/pinctrl.h>
diff --git a/drivers/pinctrl/nxp/pinctrl-imx8ulp.c b/drivers/pinctrl/nxp/pinctrl-imx8ulp.c
index 4e8fa08..73d3c00 100644
--- a/drivers/pinctrl/nxp/pinctrl-imx8ulp.c
+++ b/drivers/pinctrl/nxp/pinctrl-imx8ulp.c
@@ -4,7 +4,6 @@
*
*/
-#include <common.h>
#include <dm.h>
#include <dm/pinctrl.h>
diff --git a/drivers/pinctrl/nxp/pinctrl-imxrt.c b/drivers/pinctrl/nxp/pinctrl-imxrt.c
index 53b70da..23f07f8 100644
--- a/drivers/pinctrl/nxp/pinctrl-imxrt.c
+++ b/drivers/pinctrl/nxp/pinctrl-imxrt.c
@@ -4,7 +4,6 @@
* Author(s): Giulio Benetti <giulio.benetti@benettiengineering.com>
*/
-#include <common.h>
#include <dm.h>
#include <dm/pinctrl.h>
diff --git a/drivers/pinctrl/nxp/pinctrl-mxs.c b/drivers/pinctrl/nxp/pinctrl-mxs.c
index eb90e28..85ab5fd 100644
--- a/drivers/pinctrl/nxp/pinctrl-mxs.c
+++ b/drivers/pinctrl/nxp/pinctrl-mxs.c
@@ -4,7 +4,6 @@
* Lukasz Majewski, DENX Software Engineering, lukma@denx.de
*/
-#include <common.h>
#include <log.h>
#include <asm/global_data.h>
#include <dm/device_compat.h>
diff --git a/drivers/pinctrl/nxp/pinctrl-scu.c b/drivers/pinctrl/nxp/pinctrl-scu.c
index 4959834..42d5c96 100644
--- a/drivers/pinctrl/nxp/pinctrl-scu.c
+++ b/drivers/pinctrl/nxp/pinctrl-scu.c
@@ -3,7 +3,6 @@
* Copyright 2018-2019 NXP
*/
-#include <common.h>
#include <errno.h>
#include <linux/bitops.h>
#include <asm/io.h>
diff --git a/drivers/pinctrl/nxp/pinctrl-vf610.c b/drivers/pinctrl/nxp/pinctrl-vf610.c
index 14e2e9d..adf3073 100644
--- a/drivers/pinctrl/nxp/pinctrl-vf610.c
+++ b/drivers/pinctrl/nxp/pinctrl-vf610.c
@@ -4,7 +4,6 @@
* Lukasz Majewski, DENX Software Engineering, lukma@denx.de
*/
-#include <common.h>
#include <dm.h>
#include <dm/pinctrl.h>
diff --git a/drivers/pinctrl/pinctrl-apple.c b/drivers/pinctrl/pinctrl-apple.c
index 6247635..f373afd 100644
--- a/drivers/pinctrl/pinctrl-apple.c
+++ b/drivers/pinctrl/pinctrl-apple.c
@@ -3,7 +3,6 @@
* (C) Copyright 2021 Mark Kettenis <kettenis@openbsd.org>
*/
-#include <common.h>
#include <dm.h>
#include <dm/device-internal.h>
#include <dm/pinctrl.h>
diff --git a/drivers/pinctrl/pinctrl-at91-pio4.c b/drivers/pinctrl/pinctrl-at91-pio4.c
index 84b3986..c697a4c 100644
--- a/drivers/pinctrl/pinctrl-at91-pio4.c
+++ b/drivers/pinctrl/pinctrl-at91-pio4.c
@@ -6,7 +6,6 @@
* Wenyou.Yang <wenyou.yang@atmel.com>
*/
-#include <common.h>
#include <dm.h>
#include <asm/global_data.h>
#include <dm/device-internal.h>
diff --git a/drivers/pinctrl/pinctrl-at91.c b/drivers/pinctrl/pinctrl-at91.c
index b7aab12..5038cb5 100644
--- a/drivers/pinctrl/pinctrl-at91.c
+++ b/drivers/pinctrl/pinctrl-at91.c
@@ -6,7 +6,6 @@
* Wenyou.Yang <wenyou.yang@atmel.com>
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <asm/global_data.h>
diff --git a/drivers/pinctrl/pinctrl-generic.c b/drivers/pinctrl/pinctrl-generic.c
index 8909b57..2464acf 100644
--- a/drivers/pinctrl/pinctrl-generic.c
+++ b/drivers/pinctrl/pinctrl-generic.c
@@ -3,7 +3,6 @@
* Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
*/
-#include <common.h>
#include <dm.h>
#include <dm/device_compat.h>
#include <linux/compat.h>
diff --git a/drivers/pinctrl/pinctrl-k210.c b/drivers/pinctrl/pinctrl-k210.c
index ee35dfe..dad0366 100644
--- a/drivers/pinctrl/pinctrl-k210.c
+++ b/drivers/pinctrl/pinctrl-k210.c
@@ -3,7 +3,6 @@
* Copyright (C) 2020 Sean Anderson <seanga2@gmail.com>
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <dm/pinctrl.h>
diff --git a/drivers/pinctrl/pinctrl-qe-io.c b/drivers/pinctrl/pinctrl-qe-io.c
index dc0be7c..61db927 100644
--- a/drivers/pinctrl/pinctrl-qe-io.c
+++ b/drivers/pinctrl/pinctrl-qe-io.c
@@ -6,7 +6,6 @@
* based on source code of Shlomi Gridish
*/
-#include <common.h>
#include <linux/errno.h>
#include <asm/io.h>
#include <asm/immap_83xx.h>
diff --git a/drivers/pinctrl/pinctrl-sandbox.c b/drivers/pinctrl/pinctrl-sandbox.c
index 7765977..a5d0566 100644
--- a/drivers/pinctrl/pinctrl-sandbox.c
+++ b/drivers/pinctrl/pinctrl-sandbox.c
@@ -4,7 +4,6 @@
* Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
*/
-#include <common.h>
#include <dm.h>
#include <dm/pinctrl.h>
#include <dt-bindings/pinctrl/sandbox-pinmux.h>
diff --git a/drivers/pinctrl/pinctrl-single.c b/drivers/pinctrl/pinctrl-single.c
index d1db377..a3802d2 100644
--- a/drivers/pinctrl/pinctrl-single.c
+++ b/drivers/pinctrl/pinctrl-single.c
@@ -4,7 +4,6 @@
* Copyright (C) 2021 Dario Binacchi <dariobin@libero.it>
*/
-#include <common.h>
#include <mapmem.h>
#include <dm.h>
#include <dm/device_compat.h>
diff --git a/drivers/pinctrl/pinctrl-sti.c b/drivers/pinctrl/pinctrl-sti.c
index 1ff7ea0..4996b69 100644
--- a/drivers/pinctrl/pinctrl-sti.c
+++ b/drivers/pinctrl/pinctrl-sti.c
@@ -6,7 +6,6 @@
* Author(s): Patrice Chotard, <patrice.chotard@foss.st.com> for STMicroelectronics.
*/
-#include <common.h>
#include <bitfield.h>
#include <dm.h>
#include <errno.h>
diff --git a/drivers/pinctrl/pinctrl-stmfx.c b/drivers/pinctrl/pinctrl-stmfx.c
index 509e2a8..61f335c 100644
--- a/drivers/pinctrl/pinctrl-stmfx.c
+++ b/drivers/pinctrl/pinctrl-stmfx.c
@@ -8,7 +8,6 @@
#define LOG_CATEGORY UCLASS_PINCTRL
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <i2c.h>
diff --git a/drivers/pinctrl/pinctrl-uclass.c b/drivers/pinctrl/pinctrl-uclass.c
index fe2ba50..d9bda74 100644
--- a/drivers/pinctrl/pinctrl-uclass.c
+++ b/drivers/pinctrl/pinctrl-uclass.c
@@ -5,7 +5,6 @@
#define LOG_CATEGORY UCLASS_PINCTRL
-#include <common.h>
#include <malloc.h>
#include <asm/global_data.h>
#include <dm/device_compat.h>
diff --git a/drivers/pinctrl/pinctrl-zynqmp.c b/drivers/pinctrl/pinctrl-zynqmp.c
index eb17a42..6fa203a 100644
--- a/drivers/pinctrl/pinctrl-zynqmp.c
+++ b/drivers/pinctrl/pinctrl-zynqmp.c
@@ -8,7 +8,6 @@
* Copyright (C) 2021 Xilinx, Inc. All rights reserved.
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <malloc.h>
diff --git a/drivers/pinctrl/pinctrl_pic32.c b/drivers/pinctrl/pinctrl_pic32.c
index 54d97ac..9f38b56 100644
--- a/drivers/pinctrl/pinctrl_pic32.c
+++ b/drivers/pinctrl/pinctrl_pic32.c
@@ -4,7 +4,6 @@
* Copyright (c) 2015 Microchip Technology Inc.
* Written by Purna Chandra Mandal <purna.mandal@microchip.com>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <log.h>
diff --git a/drivers/pinctrl/pinctrl_stm32.c b/drivers/pinctrl/pinctrl_stm32.c
index 7120b8e..eada100 100644
--- a/drivers/pinctrl/pinctrl_stm32.c
+++ b/drivers/pinctrl/pinctrl_stm32.c
@@ -5,7 +5,6 @@
#define LOG_CATEGORY UCLASS_PINCTRL
-#include <common.h>
#include <dm.h>
#include <hwspinlock.h>
#include <log.h>
diff --git a/drivers/pinctrl/qcom/Kconfig b/drivers/pinctrl/qcom/Kconfig
index 2fe6398..b326fa8 100644
--- a/drivers/pinctrl/qcom/Kconfig
+++ b/drivers/pinctrl/qcom/Kconfig
@@ -1,4 +1,4 @@
-if ARCH_SNAPDRAGON
+if ARCH_SNAPDRAGON || ARCH_IPQ40XX
config PINCTRL_QCOM
depends on PINCTRL_GENERIC
@@ -27,6 +27,13 @@
Say Y here to enable support for pinctrl on the IPQ4019 SoC,
as well as the associated GPIO driver.
+config PINCTRL_QCOM_QCM2290
+ bool "Qualcomm QCM2290 GCC"
+ select PINCTRL_QCOM
+ help
+ Say Y here to enable support for pinctrl on the Snapdragon QCM2290 SoC,
+ as well as the associated GPIO driver.
+
config PINCTRL_QCOM_QCS404
bool "Qualcomm QCS404 GCC"
select PINCTRL_QCOM
@@ -41,6 +48,33 @@
Say Y here to enable support for pinctrl on the Snapdragon 845 SoC,
as well as the associated GPIO driver.
+config PINCTRL_QCOM_SM6115
+ bool "Qualcomm SM6115 GCC"
+ select PINCTRL_QCOM
+ help
+ Say Y here to enable support for pinctrl on the Snapdragon SM6115 SoC,
+ as well as the associated GPIO driver.
+
+config PINCTRL_QCOM_SM8250
+ bool "Qualcomm SM8250 GCC"
+ select PINCTRL_QCOM
+ help
+ Say Y here to enable support for pinctrl on the Snapdragon SM8250 SoC,
+ as well as the associated GPIO driver.
+
+config PINCTRL_QCOM_SM8550
+ bool "Qualcomm SM8550 GCC"
+ select PINCTRL_QCOM
+ help
+ Say Y here to enable support for pinctrl on the Snapdragon SM8550 SoC,
+ as well as the associated GPIO driver.
+
+config PINCTRL_QCOM_SM8650
+ bool "Qualcomm SM8650 GCC"
+ select PINCTRL_QCOM
+ help
+ Say Y here to enable support for pinctrl on the Snapdragon SM8650 SoC,
+
endmenu
endif
diff --git a/drivers/pinctrl/qcom/Makefile b/drivers/pinctrl/qcom/Makefile
index 6d9aca6..4f1d967 100644
--- a/drivers/pinctrl/qcom/Makefile
+++ b/drivers/pinctrl/qcom/Makefile
@@ -6,5 +6,10 @@
obj-$(CONFIG_PINCTRL_QCOM_APQ8016) += pinctrl-apq8016.o
obj-$(CONFIG_PINCTRL_QCOM_IPQ4019) += pinctrl-ipq4019.o
obj-$(CONFIG_PINCTRL_QCOM_APQ8096) += pinctrl-apq8096.o
+obj-$(CONFIG_PINCTRL_QCOM_QCM2290) += pinctrl-qcm2290.o
obj-$(CONFIG_PINCTRL_QCOM_QCS404) += pinctrl-qcs404.o
obj-$(CONFIG_PINCTRL_QCOM_SDM845) += pinctrl-sdm845.o
+obj-$(CONFIG_PINCTRL_QCOM_SM6115) += pinctrl-sm6115.o
+obj-$(CONFIG_PINCTRL_QCOM_SM8250) += pinctrl-sm8250.o
+obj-$(CONFIG_PINCTRL_QCOM_SM8550) += pinctrl-sm8550.o
+obj-$(CONFIG_PINCTRL_QCOM_SM8650) += pinctrl-sm8650.o
diff --git a/drivers/pinctrl/qcom/pinctrl-apq8016.c b/drivers/pinctrl/qcom/pinctrl-apq8016.c
index db0e212..0c74378 100644
--- a/drivers/pinctrl/qcom/pinctrl-apq8016.c
+++ b/drivers/pinctrl/qcom/pinctrl-apq8016.c
@@ -6,7 +6,6 @@
*
*/
-#include <common.h>
#include <dm.h>
#include "pinctrl-qcom.h"
@@ -29,6 +28,8 @@
};
static const struct pinctrl_function msm_pinctrl_functions[] = {
+ {"gpio", 0},
+ {"blsp_uart1", 2},
{"blsp_uart2", 2},
};
@@ -49,7 +50,8 @@
}
}
-static unsigned int apq8016_get_function_mux(unsigned int selector)
+static unsigned int apq8016_get_function_mux(__maybe_unused unsigned int pin,
+ unsigned int selector)
{
return msm_pinctrl_functions[selector].val;
}
diff --git a/drivers/pinctrl/qcom/pinctrl-apq8096.c b/drivers/pinctrl/qcom/pinctrl-apq8096.c
index 880df8f..132ece8 100644
--- a/drivers/pinctrl/qcom/pinctrl-apq8096.c
+++ b/drivers/pinctrl/qcom/pinctrl-apq8096.c
@@ -6,7 +6,6 @@
*
*/
-#include <common.h>
#include <dm.h>
#include "pinctrl-qcom.h"
@@ -44,7 +43,8 @@
}
}
-static unsigned int apq8096_get_function_mux(unsigned int selector)
+static unsigned int apq8096_get_function_mux(__maybe_unused unsigned int pin,
+ unsigned int selector)
{
return msm_pinctrl_functions[selector].val;
}
diff --git a/drivers/pinctrl/qcom/pinctrl-ipq4019.c b/drivers/pinctrl/qcom/pinctrl-ipq4019.c
index 74c04ab..3215c67 100644
--- a/drivers/pinctrl/qcom/pinctrl-ipq4019.c
+++ b/drivers/pinctrl/qcom/pinctrl-ipq4019.c
@@ -7,26 +7,297 @@
* Author: Robert Marko <robert.marko@sartura.hr>
*/
-#include <common.h>
#include <dm.h>
#include "pinctrl-qcom.h"
#define MAX_PIN_NAME_LEN 32
static char pin_name[MAX_PIN_NAME_LEN] __section(".data");
-static const struct pinctrl_function msm_pinctrl_functions[] = {
- {"gpio", 0},
- {"blsp_uart0_0", 1}, /* Only for GPIO:16,17 */
- {"blsp_uart0_1", 2}, /* Only for GPIO:60,61 */
- {"blsp_uart1", 1},
- {"blsp_spi0_0", 1}, /* Only for GPIO:12,13,14,15 */
- {"blsp_spi0_1", 2}, /* Only for GPIO:54,55,56,57 */
- {"blsp_spi1", 2},
- {"mdio_0", 1}, /* Only for GPIO6 */
- {"mdio_1", 2}, /* Only for GPIO53 */
- {"mdc_0", 1}, /* Only for GPIO7 */
- {"mdc_1", 2}, /* Only for GPIO52 */
+
+enum ipq4019_functions {
+ qca_mux_gpio,
+ qca_mux_aud_pin,
+ qca_mux_audio_pwm,
+ qca_mux_blsp_i2c0,
+ qca_mux_blsp_i2c1,
+ qca_mux_blsp_spi0,
+ qca_mux_blsp_spi1,
+ qca_mux_blsp_uart0,
+ qca_mux_blsp_uart1,
+ qca_mux_chip_rst,
+ qca_mux_i2s_rx,
+ qca_mux_i2s_spdif_in,
+ qca_mux_i2s_spdif_out,
+ qca_mux_i2s_td,
+ qca_mux_i2s_tx,
+ qca_mux_jtag,
+ qca_mux_led0,
+ qca_mux_led1,
+ qca_mux_led2,
+ qca_mux_led3,
+ qca_mux_led4,
+ qca_mux_led5,
+ qca_mux_led6,
+ qca_mux_led7,
+ qca_mux_led8,
+ qca_mux_led9,
+ qca_mux_led10,
+ qca_mux_led11,
+ qca_mux_mdc,
+ qca_mux_mdio,
+ qca_mux_pcie,
+ qca_mux_pmu,
+ qca_mux_prng_rosc,
+ qca_mux_qpic,
+ qca_mux_rgmii,
+ qca_mux_rmii,
+ qca_mux_sdio,
+ qca_mux_smart0,
+ qca_mux_smart1,
+ qca_mux_smart2,
+ qca_mux_smart3,
+ qca_mux_tm,
+ qca_mux_wifi0,
+ qca_mux_wifi1,
+ qca_mux_NA,
};
+
+#define QCA_PIN_FUNCTION(fname) \
+ [qca_mux_##fname] = {#fname, qca_mux_##fname}
+
+static const struct pinctrl_function msm_pinctrl_functions[] = {
+ QCA_PIN_FUNCTION(aud_pin),
+ QCA_PIN_FUNCTION(audio_pwm),
+ QCA_PIN_FUNCTION(blsp_i2c0),
+ QCA_PIN_FUNCTION(blsp_i2c1),
+ QCA_PIN_FUNCTION(blsp_spi0),
+ QCA_PIN_FUNCTION(blsp_spi1),
+ QCA_PIN_FUNCTION(blsp_uart0),
+ QCA_PIN_FUNCTION(blsp_uart1),
+ QCA_PIN_FUNCTION(chip_rst),
+ QCA_PIN_FUNCTION(gpio),
+ QCA_PIN_FUNCTION(i2s_rx),
+ QCA_PIN_FUNCTION(i2s_spdif_in),
+ QCA_PIN_FUNCTION(i2s_spdif_out),
+ QCA_PIN_FUNCTION(i2s_td),
+ QCA_PIN_FUNCTION(i2s_tx),
+ QCA_PIN_FUNCTION(jtag),
+ QCA_PIN_FUNCTION(led0),
+ QCA_PIN_FUNCTION(led1),
+ QCA_PIN_FUNCTION(led2),
+ QCA_PIN_FUNCTION(led3),
+ QCA_PIN_FUNCTION(led4),
+ QCA_PIN_FUNCTION(led5),
+ QCA_PIN_FUNCTION(led6),
+ QCA_PIN_FUNCTION(led7),
+ QCA_PIN_FUNCTION(led8),
+ QCA_PIN_FUNCTION(led9),
+ QCA_PIN_FUNCTION(led10),
+ QCA_PIN_FUNCTION(led11),
+ QCA_PIN_FUNCTION(mdc),
+ QCA_PIN_FUNCTION(mdio),
+ QCA_PIN_FUNCTION(pcie),
+ QCA_PIN_FUNCTION(pmu),
+ QCA_PIN_FUNCTION(prng_rosc),
+ QCA_PIN_FUNCTION(qpic),
+ QCA_PIN_FUNCTION(rgmii),
+ QCA_PIN_FUNCTION(rmii),
+ QCA_PIN_FUNCTION(sdio),
+ QCA_PIN_FUNCTION(smart0),
+ QCA_PIN_FUNCTION(smart1),
+ QCA_PIN_FUNCTION(smart2),
+ QCA_PIN_FUNCTION(smart3),
+ QCA_PIN_FUNCTION(tm),
+ QCA_PIN_FUNCTION(wifi0),
+ QCA_PIN_FUNCTION(wifi1),
+};
+
+typedef unsigned int msm_pin_function[15];
+
+#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10, f11, f12, f13, f14) \
+ [id] = { qca_mux_gpio, /* gpio mode */ \
+ qca_mux_##f1, \
+ qca_mux_##f2, \
+ qca_mux_##f3, \
+ qca_mux_##f4, \
+ qca_mux_##f5, \
+ qca_mux_##f6, \
+ qca_mux_##f7, \
+ qca_mux_##f8, \
+ qca_mux_##f9, \
+ qca_mux_##f10, \
+ qca_mux_##f11, \
+ qca_mux_##f12, \
+ qca_mux_##f13, \
+ qca_mux_##f14 \
+ }
+
+static const msm_pin_function ipq4019_pin_functions[] = {
+ PINGROUP(0, jtag, smart0, i2s_rx, NA, NA, NA, NA, NA, NA, NA, NA, NA,
+ NA, NA),
+ PINGROUP(1, jtag, smart0, i2s_rx, NA, NA, NA, NA, NA, NA, NA, NA, NA,
+ NA, NA),
+ PINGROUP(2, jtag, smart0, i2s_rx, NA, NA, NA, NA, NA, NA, NA, NA, NA,
+ NA, NA),
+ PINGROUP(3, jtag, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(4, jtag, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(5, jtag, smart0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
+ NA),
+ PINGROUP(6, mdio, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(7, mdc, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(8, blsp_uart1, NA, NA, smart1, NA, NA, NA, NA, NA, NA, NA,
+ NA, NA, NA),
+ PINGROUP(9, blsp_uart1, NA, NA, smart1, NA, NA, NA, NA, NA, NA, NA,
+ NA, NA, NA),
+ PINGROUP(10, blsp_uart1, NA, NA, blsp_i2c0, NA, NA, NA, NA, NA, NA, NA,
+ NA, NA, NA),
+ PINGROUP(11, blsp_uart1, NA, NA, blsp_i2c0, NA, NA, NA, NA, NA, NA, NA,
+ NA, NA, NA),
+ PINGROUP(12, blsp_spi0, blsp_i2c1, NA, NA, NA, NA, NA, NA, NA, NA, NA,
+ NA, NA, NA),
+ PINGROUP(13, blsp_spi0, blsp_i2c1, NA, NA, NA, NA, NA, NA, NA, NA, NA,
+ NA, NA, NA),
+ PINGROUP(14, blsp_spi0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
+ NA),
+ PINGROUP(15, blsp_spi0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
+ NA),
+ PINGROUP(16, blsp_uart0, led0, smart1, NA, NA, NA, NA, NA, NA, NA, NA,
+ NA, NA, NA),
+ PINGROUP(17, blsp_uart0, led1, smart1, NA, NA, NA, NA, NA, NA, NA, NA,
+ NA, NA, NA),
+ PINGROUP(18, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(19, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(20, blsp_i2c0, i2s_rx, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
+ NA, NA),
+ PINGROUP(21, blsp_i2c0, i2s_rx, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
+ NA, NA),
+ PINGROUP(22, rgmii, i2s_rx, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
+ NA),
+ PINGROUP(23, sdio, rgmii, i2s_rx, NA, NA, NA, NA, NA, NA, NA, NA, NA,
+ NA, NA),
+ PINGROUP(24, sdio, rgmii, i2s_tx, NA, NA, NA, NA, NA, NA, NA, NA, NA,
+ NA, NA),
+ PINGROUP(25, sdio, rgmii, i2s_tx, NA, NA, NA, NA, NA, NA, NA, NA, NA,
+ NA, NA),
+ PINGROUP(26, sdio, rgmii, i2s_tx, NA, NA, NA, NA, NA, NA, NA, NA, NA,
+ NA, NA),
+ PINGROUP(27, sdio, rgmii, i2s_td, NA, NA, NA, NA, NA, NA, NA, NA, NA,
+ NA, NA),
+ PINGROUP(28, sdio, rgmii, i2s_td, NA, NA, NA, NA, NA, NA, NA, NA, NA,
+ NA, NA),
+ PINGROUP(29, sdio, rgmii, i2s_td, NA, NA, NA, NA, NA, NA, NA, NA, NA,
+ NA, NA),
+ PINGROUP(30, sdio, rgmii, audio_pwm, NA, NA, NA, NA, NA, NA, NA, NA,
+ NA, NA, NA),
+ PINGROUP(31, sdio, rgmii, audio_pwm, NA, NA, NA, NA, NA, NA, NA, NA,
+ NA, NA, NA),
+ PINGROUP(32, sdio, rgmii, audio_pwm, NA, NA, NA, NA, NA, NA, NA, NA,
+ NA, NA, NA),
+ PINGROUP(33, rgmii, audio_pwm, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
+ NA, NA),
+ PINGROUP(34, blsp_i2c1, i2s_spdif_in, NA, NA, NA, NA, NA, NA, NA, NA,
+ NA, NA, NA, NA),
+ PINGROUP(35, blsp_i2c1, i2s_spdif_out, NA, NA, NA, NA, NA, NA, NA, NA,
+ NA, NA, NA, NA),
+ PINGROUP(36, rmii, led2, led0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
+ NA),
+ PINGROUP(37, rmii, wifi0, wifi1, led1, NA, NA, NA, NA, NA, NA, NA, NA,
+ NA, NA),
+ PINGROUP(38, rmii, led2, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
+ NA),
+ PINGROUP(39, rmii, pcie, led3, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
+ NA),
+ PINGROUP(40, rmii, wifi0, wifi1, smart2, led4, NA, NA, NA, NA, NA, NA,
+ NA, NA, NA),
+ PINGROUP(41, rmii, wifi0, wifi1, smart2, NA, NA, NA, NA, NA, NA, NA,
+ NA, NA, NA),
+ PINGROUP(42, rmii, wifi0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
+ NA),
+ PINGROUP(43, rmii, wifi1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
+ NA),
+ PINGROUP(44, rmii, blsp_spi1, smart0, led5, NA, NA, NA, NA, NA, NA, NA,
+ NA, NA, NA),
+ PINGROUP(45, rmii, blsp_spi1, blsp_spi0, smart0, led6, NA, NA, NA, NA,
+ NA, NA, NA, NA, NA),
+ PINGROUP(46, rmii, blsp_spi1, smart0, led7, NA, NA, NA, NA, NA, NA, NA,
+ NA, NA, NA),
+ PINGROUP(47, rmii, blsp_spi1, smart0, led8, NA, NA, NA, NA, NA, NA, NA,
+ NA, NA, NA),
+ PINGROUP(48, rmii, aud_pin, smart2, led9, NA, NA, NA, NA, NA, NA, NA,
+ NA, NA, NA),
+ PINGROUP(49, rmii, aud_pin, smart2, led10, NA, NA, NA, NA, NA, NA, NA,
+ NA, NA, NA),
+ PINGROUP(50, rmii, aud_pin, wifi0, wifi1, led11, NA, NA, NA, NA, NA,
+ NA, NA, NA, NA),
+ PINGROUP(51, rmii, aud_pin, wifi0, wifi1, NA, NA, NA, NA, NA, NA, NA,
+ NA, NA, NA),
+ PINGROUP(52, qpic, mdc, pcie, i2s_tx, NA, NA, NA, tm, wifi0, wifi1, NA,
+ NA, NA, NA),
+ PINGROUP(53, qpic, mdio, i2s_tx, prng_rosc, NA, tm, wifi0, wifi1, NA,
+ NA, NA, NA, NA, NA),
+ PINGROUP(54, qpic, blsp_spi0, i2s_td, NA, pmu, NA, NA, NA, tm, NA, NA,
+ NA, NA, NA),
+ PINGROUP(55, qpic, blsp_spi0, i2s_td, NA, pmu, NA, NA, NA, tm, NA, NA,
+ NA, NA, NA),
+ PINGROUP(56, qpic, blsp_spi0, i2s_td, NA, NA, tm, wifi0, wifi1, NA, NA,
+ NA, NA, NA, NA),
+ PINGROUP(57, qpic, blsp_spi0, i2s_tx, NA, NA, tm, wifi0, wifi1, NA, NA,
+ NA, NA, NA, NA),
+ PINGROUP(58, qpic, led2, blsp_i2c0, smart3, smart1, i2s_rx, NA, NA, tm,
+ wifi0, wifi1, NA, NA, NA),
+ PINGROUP(59, qpic, blsp_i2c0, smart3, smart1, i2s_spdif_in, NA, NA, NA,
+ NA, NA, tm, NA, NA, NA),
+ PINGROUP(60, qpic, blsp_uart0, smart1, smart3, led0, i2s_tx, i2s_rx,
+ NA, NA, NA, NA, NA, tm, NA),
+ PINGROUP(61, qpic, blsp_uart0, smart1, smart3, led1, i2s_tx, i2s_rx,
+ NA, NA, NA, NA, NA, tm, NA),
+ PINGROUP(62, qpic, chip_rst, NA, NA, i2s_spdif_out, NA, NA, NA, NA, NA,
+ tm, NA, NA, NA),
+ PINGROUP(63, qpic, NA, NA, NA, i2s_td, i2s_rx, i2s_spdif_out,
+ i2s_spdif_in, NA, NA, NA, NA, tm, NA),
+ PINGROUP(64, qpic, audio_pwm, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
+ NA, NA),
+ PINGROUP(65, qpic, audio_pwm, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
+ NA, NA),
+ PINGROUP(66, qpic, audio_pwm, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
+ NA, NA),
+ PINGROUP(67, qpic, audio_pwm, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
+ NA, NA),
+ PINGROUP(68, qpic, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(69, qpic, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(70, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(71, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(72, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(73, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(74, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(75, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(76, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(77, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(78, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(79, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(80, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(81, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(82, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(83, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(84, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(85, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(86, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(87, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(88, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(89, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(90, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(91, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(92, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(93, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(94, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(95, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(96, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(97, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
+ PINGROUP(98, wifi0, wifi1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA,
+ NA),
+ PINGROUP(99, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
+};
+
static const char *ipq4019_get_function_name(struct udevice *dev,
unsigned int selector)
{
@@ -36,13 +307,22 @@
static const char *ipq4019_get_pin_name(struct udevice *dev,
unsigned int selector)
{
- snprintf(pin_name, MAX_PIN_NAME_LEN, "GPIO_%u", selector);
+ snprintf(pin_name, MAX_PIN_NAME_LEN, "gpio%u", selector);
return pin_name;
}
-static unsigned int ipq4019_get_function_mux(unsigned int selector)
+static unsigned int ipq4019_get_function_mux(unsigned int pin,
+ unsigned int selector)
{
- return msm_pinctrl_functions[selector].val;
+ unsigned int i;
+ const msm_pin_function *func = ipq4019_pin_functions + pin;
+
+ for (i = 0; i < 15; i++)
+ if ((*func)[i] == selector)
+ return i;
+
+ pr_err("Can't find requested function for pin %u pin\n", pin);
+ return -EINVAL;
}
static const struct msm_pinctrl_data ipq4019_data = {
@@ -67,4 +347,5 @@
.of_match = msm_pinctrl_ids,
.ops = &msm_pinctrl_ops,
.bind = msm_pinctrl_bind,
+ .flags = DM_FLAG_PRE_RELOC,
};
diff --git a/drivers/pinctrl/qcom/pinctrl-qcm2290.c b/drivers/pinctrl/qcom/pinctrl-qcm2290.c
new file mode 100644
index 0000000..af969e1
--- /dev/null
+++ b/drivers/pinctrl/qcom/pinctrl-qcm2290.c
@@ -0,0 +1,70 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Qualcomm qcm2290 pinctrl
+ *
+ * (C) Copyright 2024 Linaro Ltd.
+ *
+ */
+
+#include <dm.h>
+
+#include "pinctrl-qcom.h"
+
+#define MAX_PIN_NAME_LEN 32
+static char pin_name[MAX_PIN_NAME_LEN] __section(".data");
+
+static const struct pinctrl_function msm_pinctrl_functions[] = {
+ { "qup4", 1 },
+ { "gpio", 0 },
+};
+
+static const char *qcm2290_get_function_name(struct udevice *dev, unsigned int selector)
+{
+ return msm_pinctrl_functions[selector].name;
+}
+
+static const char *qcm2290_get_pin_name(struct udevice *dev, unsigned int selector)
+{
+ static const char *const special_pins_names[] = {
+ "sdc1_rclk", "sdc1_clk", "sdc1_cmd", "sdc1_data",
+ "sdc2_clk", "sdc2_cmd", "sdc2_data",
+ };
+
+ if (selector >= 127 && selector <= 133)
+ snprintf(pin_name, MAX_PIN_NAME_LEN, special_pins_names[selector - 127]);
+ else
+ snprintf(pin_name, MAX_PIN_NAME_LEN, "gpio%u", selector);
+
+ return pin_name;
+}
+
+static unsigned int qcm2290_get_function_mux(__maybe_unused unsigned int pin, unsigned int selector)
+{
+ return msm_pinctrl_functions[selector].val;
+}
+
+struct msm_pinctrl_data qcm2290_data = {
+ .pin_data = {
+ .pin_count = 133,
+ .special_pins_start = 127,
+ },
+ .functions_count = ARRAY_SIZE(msm_pinctrl_functions),
+ .get_function_name = qcm2290_get_function_name,
+ .get_function_mux = qcm2290_get_function_mux,
+ .get_pin_name = qcm2290_get_pin_name,
+};
+
+static const struct udevice_id msm_pinctrl_ids[] = {
+ {
+ .compatible = "qcom,qcm2290-tlmm",
+ .data = (ulong)&qcm2290_data
+ },
+ { /* Sentinel */ } };
+
+U_BOOT_DRIVER(pinctrl_qcm2290) = {
+ .name = "pinctrl_qcm2290",
+ .id = UCLASS_NOP,
+ .of_match = msm_pinctrl_ids,
+ .ops = &msm_pinctrl_ops,
+ .bind = msm_pinctrl_bind,
+};
diff --git a/drivers/pinctrl/qcom/pinctrl-qcom.c b/drivers/pinctrl/qcom/pinctrl-qcom.c
index ee0624d..3c3336e 100644
--- a/drivers/pinctrl/qcom/pinctrl-qcom.c
+++ b/drivers/pinctrl/qcom/pinctrl-qcom.c
@@ -6,7 +6,6 @@
*
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <asm/io.h>
@@ -29,15 +28,24 @@
#define GPIO_CONFIG_REG(priv, x) \
(qcom_pin_offset((priv)->data->pin_data.pin_offsets, x))
-#define TLMM_GPIO_PULL_MASK GENMASK(1, 0)
-#define TLMM_FUNC_SEL_MASK GENMASK(5, 2)
-#define TLMM_DRV_STRENGTH_MASK GENMASK(8, 6)
-#define TLMM_GPIO_DISABLE BIT(9)
+#define GPIO_IN_OUT_REG(priv, x) \
+ (GPIO_CONFIG_REG(priv, x) + 0x4)
+
+#define TLMM_GPIO_PULL_MASK GENMASK(1, 0)
+#define TLMM_FUNC_SEL_MASK GENMASK(5, 2)
+#define TLMM_DRV_STRENGTH_MASK GENMASK(8, 6)
+#define TLMM_GPIO_OUTPUT_MASK BIT(1)
+#define TLMM_GPIO_OE_MASK BIT(9)
+
+/* GPIO register shifts. */
+#define GPIO_OUT_SHIFT 1
static const struct pinconf_param msm_conf_params[] = {
{ "drive-strength", PIN_CONFIG_DRIVE_STRENGTH, 2 },
{ "bias-disable", PIN_CONFIG_BIAS_DISABLE, 0 },
{ "bias-pull-up", PIN_CONFIG_BIAS_PULL_UP, 3 },
+ { "output-high", PIN_CONFIG_OUTPUT, 1, },
+ { "output-low", PIN_CONFIG_OUTPUT, 0, },
};
static int msm_get_functions_count(struct udevice *dev)
@@ -83,14 +91,14 @@
unsigned int func_selector)
{
struct msm_pinctrl_priv *priv = dev_get_priv(dev);
+ u32 func = priv->data->get_function_mux(pin_selector, func_selector);
/* Always NOP for special pins, assume they're in the correct state */
if (qcom_is_special_pin(&priv->data->pin_data, pin_selector))
return 0;
clrsetbits_le32(priv->base + GPIO_CONFIG_REG(priv, pin_selector),
- TLMM_FUNC_SEL_MASK | TLMM_GPIO_DISABLE,
- priv->data->get_function_mux(func_selector) << 2);
+ TLMM_FUNC_SEL_MASK | TLMM_GPIO_OE_MASK, func << 2);
return 0;
}
@@ -117,6 +125,12 @@
clrsetbits_le32(priv->base + GPIO_CONFIG_REG(priv, pin_selector),
TLMM_GPIO_PULL_MASK, argument);
break;
+ case PIN_CONFIG_OUTPUT:
+ writel(argument << GPIO_OUT_SHIFT,
+ priv->base + GPIO_IN_OUT_REG(priv, pin_selector));
+ setbits_le32(priv->base + GPIO_CONFIG_REG(priv, pin_selector),
+ TLMM_GPIO_OE_MASK);
+ break;
default:
return 0;
}
diff --git a/drivers/pinctrl/qcom/pinctrl-qcom.h b/drivers/pinctrl/qcom/pinctrl-qcom.h
index 07f2eae..49b7bfb 100644
--- a/drivers/pinctrl/qcom/pinctrl-qcom.h
+++ b/drivers/pinctrl/qcom/pinctrl-qcom.h
@@ -18,7 +18,8 @@
int functions_count;
const char *(*get_function_name)(struct udevice *dev,
unsigned int selector);
- unsigned int (*get_function_mux)(unsigned int selector);
+ unsigned int (*get_function_mux)(unsigned int pin,
+ unsigned int selector);
const char *(*get_pin_name)(struct udevice *dev,
unsigned int selector);
};
diff --git a/drivers/pinctrl/qcom/pinctrl-qcs404.c b/drivers/pinctrl/qcom/pinctrl-qcs404.c
index 3a2d468..fb6defa 100644
--- a/drivers/pinctrl/qcom/pinctrl-qcs404.c
+++ b/drivers/pinctrl/qcom/pinctrl-qcs404.c
@@ -5,7 +5,6 @@
* (C) Copyright 2022 Sumit Garg <sumit.garg@linaro.org>
*/
-#include <common.h>
#include <dm.h>
#include "pinctrl-qcom.h"
@@ -94,7 +93,8 @@
}
}
-static unsigned int qcs404_get_function_mux(unsigned int selector)
+static unsigned int qcs404_get_function_mux(__maybe_unused unsigned int pin,
+ unsigned int selector)
{
return msm_pinctrl_functions[selector].val;
}
diff --git a/drivers/pinctrl/qcom/pinctrl-sdm845.c b/drivers/pinctrl/qcom/pinctrl-sdm845.c
index 76bd8c4..f1a23f5 100644
--- a/drivers/pinctrl/qcom/pinctrl-sdm845.c
+++ b/drivers/pinctrl/qcom/pinctrl-sdm845.c
@@ -7,7 +7,6 @@
*
*/
-#include <common.h>
#include <dm.h>
#include "pinctrl-qcom.h"
@@ -66,11 +65,23 @@
static const char *sdm845_get_pin_name(struct udevice *dev,
unsigned int selector)
{
- snprintf(pin_name, MAX_PIN_NAME_LEN, "gpio%u", selector);
+ static const char *special_pins_names[] = {
+ "ufs_reset",
+ "sdc2_clk",
+ "sdc2_cmd",
+ "sdc2_data",
+ };
+
+ if (selector >= 150 && selector <= 154)
+ snprintf(pin_name, MAX_PIN_NAME_LEN, special_pins_names[selector - 150]);
+ else
+ snprintf(pin_name, MAX_PIN_NAME_LEN, "gpio%u", selector);
+
return pin_name;
}
-static unsigned int sdm845_get_function_mux(unsigned int selector)
+static unsigned int sdm845_get_function_mux(__maybe_unused unsigned int pin,
+ unsigned int selector)
{
return msm_pinctrl_functions[selector].val;
}
diff --git a/drivers/pinctrl/qcom/pinctrl-sm6115.c b/drivers/pinctrl/qcom/pinctrl-sm6115.c
new file mode 100644
index 0000000..f07f39f
--- /dev/null
+++ b/drivers/pinctrl/qcom/pinctrl-sm6115.c
@@ -0,0 +1,200 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Qualcomm sm6115 pinctrl
+ *
+ * (C) Copyright 2024 Linaro Ltd.
+ *
+ */
+
+#include <dm.h>
+
+#include "pinctrl-qcom.h"
+
+#define WEST 0x00000000
+#define SOUTH 0x00400000
+#define EAST 0x00800000
+
+#define MAX_PIN_NAME_LEN 32
+static char pin_name[MAX_PIN_NAME_LEN] __section(".data");
+
+static const struct pinctrl_function msm_pinctrl_functions[] = {
+ { "qup4", 1 },
+ { "gpio", 0 },
+};
+
+static const unsigned int sm6115_pin_offsets[] = {
+ [0] = WEST,
+ [1] = WEST,
+ [2] = WEST,
+ [3] = WEST,
+ [4] = WEST,
+ [5] = WEST,
+ [6] = WEST,
+ [7] = WEST,
+ [8] = EAST,
+ [9] = EAST,
+ [10] = EAST,
+ [11] = EAST,
+ [12] = WEST,
+ [13] = WEST,
+ [14] = WEST,
+ [15] = WEST,
+ [16] = WEST,
+ [17] = WEST,
+ [18] = EAST,
+ [19] = EAST,
+ [20] = EAST,
+ [21] = EAST,
+ [22] = EAST,
+ [23] = EAST,
+ [24] = EAST,
+ [25] = EAST,
+ [26] = EAST,
+ [27] = EAST,
+ [28] = EAST,
+ [29] = EAST,
+ [30] = EAST,
+ [31] = EAST,
+ [32] = EAST,
+ [33] = EAST,
+ [34] = EAST,
+ [35] = EAST,
+ [36] = EAST,
+ [37] = EAST,
+ [38] = EAST,
+ [39] = EAST,
+ [40] = EAST,
+ [41] = EAST,
+ [42] = EAST,
+ [43] = EAST,
+ [44] = EAST,
+ [45] = EAST,
+ [46] = EAST,
+ [47] = EAST,
+ [48] = EAST,
+ [49] = EAST,
+ [50] = EAST,
+ [51] = EAST,
+ [52] = EAST,
+ [53] = EAST,
+ [54] = EAST,
+ [55] = EAST,
+ [56] = EAST,
+ [57] = EAST,
+ [58] = EAST,
+ [59] = EAST,
+ [60] = EAST,
+ [61] = EAST,
+ [62] = EAST,
+ [63] = EAST,
+ [64] = EAST,
+ [65] = WEST,
+ [66] = WEST,
+ [67] = WEST,
+ [68] = WEST,
+ [69] = WEST,
+ [70] = WEST,
+ [71] = WEST,
+ [72] = SOUTH,
+ [73] = SOUTH,
+ [74] = SOUTH,
+ [75] = SOUTH,
+ [76] = SOUTH,
+ [77] = SOUTH,
+ [78] = SOUTH,
+ [79] = SOUTH,
+ [80] = WEST,
+ [81] = WEST,
+ [82] = WEST,
+ [83] = WEST,
+ [84] = WEST,
+ [85] = WEST,
+ [86] = WEST,
+ [87] = EAST,
+ [88] = EAST,
+ [89] = WEST,
+ [90] = EAST,
+ [91] = EAST,
+ [92] = WEST,
+ [93] = WEST,
+ [94] = WEST,
+ [95] = WEST,
+ [96] = WEST,
+ [97] = WEST,
+ [98] = SOUTH,
+ [99] = SOUTH,
+ [100] = SOUTH,
+ [101] = SOUTH,
+ [102] = SOUTH,
+ [103] = SOUTH,
+ [104] = SOUTH,
+ [105] = SOUTH,
+ [106] = SOUTH,
+ [107] = SOUTH,
+ [108] = SOUTH,
+ [109] = SOUTH,
+ [110] = SOUTH,
+ [111] = SOUTH,
+ [112] = SOUTH,
+ /* Special pins */
+ [113] = 0,
+ [114] = 0,
+ [115] = 0,
+ [116] = 0,
+ [117] = 0,
+ [118] = 0,
+ [119] = 0,
+ [120] = 0,
+};
+
+static const char *sm6115_get_function_name(struct udevice *dev, unsigned int selector)
+{
+ return msm_pinctrl_functions[selector].name;
+}
+
+static const char *sm6115_get_pin_name(struct udevice *dev, unsigned int selector)
+{
+ static const char *special_pins_names[] = {
+ "ufs_reset", "sdc1_rclk", "sdc1_clk", "sdc1_cmd",
+ "sdc1_data", "sdc2_clk", "sdc2_cmd", "sdc2_data",
+ };
+
+ if (selector >= 113 && selector <= 120)
+ snprintf(pin_name, MAX_PIN_NAME_LEN, special_pins_names[selector - 113]);
+ else
+ snprintf(pin_name, MAX_PIN_NAME_LEN, "gpio%u", selector);
+
+ return pin_name;
+}
+
+static unsigned int sm6115_get_function_mux(__maybe_unused unsigned int pin, unsigned int selector)
+{
+ return msm_pinctrl_functions[selector].val;
+}
+
+struct msm_pinctrl_data sm6115_data = {
+ .pin_data = {
+ .pin_offsets = sm6115_pin_offsets,
+ .pin_count = ARRAY_SIZE(sm6115_pin_offsets),
+ .special_pins_start = 113,
+ },
+ .functions_count = ARRAY_SIZE(msm_pinctrl_functions),
+ .get_function_name = sm6115_get_function_name,
+ .get_function_mux = sm6115_get_function_mux,
+ .get_pin_name = sm6115_get_pin_name,
+};
+
+static const struct udevice_id msm_pinctrl_ids[] = {
+ {
+ .compatible = "qcom,sm6115-tlmm",
+ .data = (ulong)&sm6115_data
+ },
+ { /* Sentinel */ } };
+
+U_BOOT_DRIVER(pinctrl_sm6115) = {
+ .name = "pinctrl_sm6115",
+ .id = UCLASS_NOP,
+ .of_match = msm_pinctrl_ids,
+ .ops = &msm_pinctrl_ops,
+ .bind = msm_pinctrl_bind,
+};
diff --git a/drivers/pinctrl/qcom/pinctrl-sm8250.c b/drivers/pinctrl/qcom/pinctrl-sm8250.c
new file mode 100644
index 0000000..dac24f1
--- /dev/null
+++ b/drivers/pinctrl/qcom/pinctrl-sm8250.c
@@ -0,0 +1,99 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Qualcomm sm8250 pinctrl
+ *
+ * (C) Copyright 2024 Linaro Ltd.
+ *
+ */
+
+#include <dm.h>
+
+#include "pinctrl-qcom.h"
+
+#define WEST 0x00000000
+#define SOUTH 0x00400000
+#define NORTH 0x00800000
+
+#define MAX_PIN_NAME_LEN 32
+static char pin_name[MAX_PIN_NAME_LEN] __section(".data");
+
+static const struct pinctrl_function msm_pinctrl_functions[] = { { "qup12", 1 },
+ { "gpio", 0 },
+ { "sdc2_clk", 0 } };
+
+static const unsigned int sm8250_pin_offsets[] = {
+ [0] = SOUTH, [1] = SOUTH, [2] = SOUTH, [3] = SOUTH, [4] = NORTH, [5] = NORTH,
+ [6] = NORTH, [7] = NORTH, [8] = NORTH, [9] = NORTH, [10] = NORTH, [11] = NORTH,
+ [12] = NORTH, [13] = NORTH, [14] = NORTH, [15] = NORTH, [16] = NORTH, [17] = NORTH,
+ [18] = NORTH, [19] = NORTH, [20] = NORTH, [21] = NORTH, [22] = NORTH, [23] = NORTH,
+ [24] = SOUTH, [25] = SOUTH, [26] = SOUTH, [27] = SOUTH, [28] = NORTH, [29] = NORTH,
+ [30] = NORTH, [31] = NORTH, [32] = SOUTH, [33] = SOUTH, [34] = SOUTH, [35] = SOUTH,
+ [36] = SOUTH, [37] = SOUTH, [38] = SOUTH, [39] = SOUTH, [40] = SOUTH, [41] = SOUTH,
+ [42] = SOUTH, [43] = SOUTH, [44] = SOUTH, [45] = SOUTH, [46] = SOUTH, [47] = SOUTH,
+ [48] = SOUTH, [49] = SOUTH, [50] = SOUTH, [51] = SOUTH, [52] = SOUTH, [53] = SOUTH,
+ [54] = SOUTH, [55] = SOUTH, [56] = SOUTH, [57] = SOUTH, [58] = SOUTH, [59] = SOUTH,
+ [60] = SOUTH, [61] = SOUTH, [62] = SOUTH, [63] = SOUTH, [64] = SOUTH, [65] = SOUTH,
+ [66] = NORTH, [67] = NORTH, [68] = NORTH, [69] = SOUTH, [70] = SOUTH, [71] = SOUTH,
+ [72] = SOUTH, [73] = SOUTH, [74] = SOUTH, [75] = SOUTH, [76] = SOUTH, [77] = NORTH,
+ [78] = NORTH, [79] = NORTH, [80] = NORTH, [81] = NORTH, [82] = NORTH, [83] = NORTH,
+ [84] = NORTH, [85] = SOUTH, [86] = SOUTH, [87] = SOUTH, [88] = SOUTH, [89] = SOUTH,
+ [90] = SOUTH, [91] = SOUTH, [92] = NORTH, [93] = NORTH, [94] = NORTH, [95] = NORTH,
+ [96] = NORTH, [97] = NORTH, [98] = NORTH, [99] = NORTH, [100] = NORTH, [101] = NORTH,
+ [102] = NORTH, [103] = NORTH, [104] = NORTH, [105] = NORTH, [106] = NORTH, [107] = NORTH,
+ [108] = NORTH, [109] = NORTH, [110] = NORTH, [111] = NORTH, [112] = NORTH, [113] = NORTH,
+ [114] = NORTH, [115] = NORTH, [116] = NORTH, [117] = NORTH, [118] = NORTH, [119] = NORTH,
+ [120] = NORTH, [121] = NORTH, [122] = NORTH, [123] = NORTH, [124] = NORTH, [125] = SOUTH,
+ [126] = SOUTH, [127] = SOUTH, [128] = SOUTH, [129] = SOUTH, [130] = SOUTH, [131] = SOUTH,
+ [132] = SOUTH, [133] = WEST, [134] = WEST, [135] = WEST, [136] = WEST, [137] = WEST,
+ [138] = WEST, [139] = WEST, [140] = WEST, [141] = WEST, [142] = WEST, [143] = WEST,
+ [144] = WEST, [145] = WEST, [146] = WEST, [147] = WEST, [148] = WEST, [149] = WEST,
+ [150] = WEST, [151] = WEST, [152] = WEST, [153] = WEST, [154] = WEST, [155] = WEST,
+ [156] = WEST, [157] = WEST, [158] = WEST, [159] = WEST, [160] = WEST, [161] = WEST,
+ [162] = WEST, [163] = WEST, [164] = WEST, [165] = WEST, [166] = WEST, [167] = WEST,
+ [168] = WEST, [169] = WEST, [170] = WEST, [171] = WEST, [172] = WEST, [173] = WEST,
+ [174] = WEST, [175] = WEST, [176] = WEST, [177] = WEST, [178] = WEST, [179] = WEST,
+ [180] = 0, [181] = 0, [182] = 0, [183] = 0,
+};
+
+static const char *sm8250_get_function_name(struct udevice *dev, unsigned int selector)
+{
+ return msm_pinctrl_functions[selector].name;
+}
+
+static const char *sm8250_get_pin_name(struct udevice *dev, unsigned int selector)
+{
+ snprintf(pin_name, MAX_PIN_NAME_LEN, "gpio%u", selector);
+ return pin_name;
+}
+
+static unsigned int sm8250_get_function_mux(__maybe_unused unsigned int pin, unsigned int selector)
+{
+ return msm_pinctrl_functions[selector].val;
+}
+
+static struct msm_pinctrl_data sm8250_data = {
+ .pin_data = {
+ .pin_offsets = sm8250_pin_offsets,
+ .pin_count = ARRAY_SIZE(sm8250_pin_offsets),
+ .special_pins_start = 180,
+ },
+ .functions_count = ARRAY_SIZE(msm_pinctrl_functions),
+ .get_function_name = sm8250_get_function_name,
+ .get_function_mux = sm8250_get_function_mux,
+ .get_pin_name = sm8250_get_pin_name,
+};
+
+static const struct udevice_id msm_pinctrl_ids[] = {
+ {
+ .compatible = "qcom,sm8250-pinctrl",
+ .data = (ulong)&sm8250_data
+ },
+ { /* Sentinel */ } };
+
+U_BOOT_DRIVER(pinctrl_sm8250) = {
+ .name = "pinctrl_sm8250",
+ .id = UCLASS_NOP,
+ .of_match = msm_pinctrl_ids,
+ .ops = &msm_pinctrl_ops,
+ .bind = msm_pinctrl_bind,
+};
diff --git a/drivers/pinctrl/qcom/pinctrl-sm8550.c b/drivers/pinctrl/qcom/pinctrl-sm8550.c
new file mode 100644
index 0000000..7265cb7
--- /dev/null
+++ b/drivers/pinctrl/qcom/pinctrl-sm8550.c
@@ -0,0 +1,74 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Qualcomm sm8550 pinctrl
+ *
+ * (C) Copyright 2024 Linaro Ltd.
+ *
+ */
+
+#include <dm.h>
+
+#include "pinctrl-qcom.h"
+
+#define MAX_PIN_NAME_LEN 32
+static char pin_name[MAX_PIN_NAME_LEN] __section(".data");
+
+static const struct pinctrl_function msm_pinctrl_functions[] = {
+ {"qup1_se7", 1},
+ {"gpio", 0},
+};
+
+static const char *sm8550_get_function_name(struct udevice *dev,
+ unsigned int selector)
+{
+ return msm_pinctrl_functions[selector].name;
+}
+
+static const char *sm8550_get_pin_name(struct udevice *dev,
+ unsigned int selector)
+{
+ static const char *special_pins_names[] = {
+ "ufs_reset",
+ "sdc2_clk",
+ "sdc2_cmd",
+ "sdc2_data",
+ };
+
+ if (selector >= 210 && selector <= 213)
+ snprintf(pin_name, MAX_PIN_NAME_LEN, special_pins_names[selector - 210]);
+ else
+ snprintf(pin_name, MAX_PIN_NAME_LEN, "gpio%u", selector);
+
+ return pin_name;
+}
+
+static unsigned int sm8550_get_function_mux(__maybe_unused unsigned int pin,
+ unsigned int selector)
+{
+ return msm_pinctrl_functions[selector].val;
+}
+
+static struct msm_pinctrl_data sm8550_data = {
+ .pin_data = {
+ .pin_count = 214,
+ .special_pins_start = 210,
+ },
+ .functions_count = ARRAY_SIZE(msm_pinctrl_functions),
+ .get_function_name = sm8550_get_function_name,
+ .get_function_mux = sm8550_get_function_mux,
+ .get_pin_name = sm8550_get_pin_name,
+};
+
+static const struct udevice_id msm_pinctrl_ids[] = {
+ { .compatible = "qcom,sm8550-tlmm", .data = (ulong)&sm8550_data },
+ { /* Sentinel */ }
+};
+
+U_BOOT_DRIVER(pinctrl_sm8550) = {
+ .name = "pinctrl_sm8550",
+ .id = UCLASS_NOP,
+ .of_match = msm_pinctrl_ids,
+ .ops = &msm_pinctrl_ops,
+ .bind = msm_pinctrl_bind,
+};
+
diff --git a/drivers/pinctrl/qcom/pinctrl-sm8650.c b/drivers/pinctrl/qcom/pinctrl-sm8650.c
new file mode 100644
index 0000000..d6cc1bb
--- /dev/null
+++ b/drivers/pinctrl/qcom/pinctrl-sm8650.c
@@ -0,0 +1,74 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Qualcomm sm8650 pinctrl
+ *
+ * (C) Copyright 2024 Linaro Ltd.
+ *
+ */
+
+#include <dm.h>
+
+#include "pinctrl-qcom.h"
+
+#define MAX_PIN_NAME_LEN 32
+static char pin_name[MAX_PIN_NAME_LEN] __section(".data");
+
+static const struct pinctrl_function msm_pinctrl_functions[] = {
+ {"qup2_se7", 1},
+ {"gpio", 0},
+};
+
+static const char *sm8650_get_function_name(struct udevice *dev,
+ unsigned int selector)
+{
+ return msm_pinctrl_functions[selector].name;
+}
+
+static const char *sm8650_get_pin_name(struct udevice *dev,
+ unsigned int selector)
+{
+ static const char *special_pins_names[] = {
+ "ufs_reset",
+ "sdc2_clk",
+ "sdc2_cmd",
+ "sdc2_data",
+ };
+
+ if (selector >= 210 && selector <= 213)
+ snprintf(pin_name, MAX_PIN_NAME_LEN, special_pins_names[selector - 210]);
+ else
+ snprintf(pin_name, MAX_PIN_NAME_LEN, "gpio%u", selector);
+
+ return pin_name;
+}
+
+static unsigned int sm8650_get_function_mux(__maybe_unused unsigned int pin,
+ unsigned int selector)
+{
+ return msm_pinctrl_functions[selector].val;
+}
+
+static struct msm_pinctrl_data sm8650_data = {
+ .pin_data = {
+ .pin_count = 214,
+ .special_pins_start = 210,
+ },
+ .functions_count = ARRAY_SIZE(msm_pinctrl_functions),
+ .get_function_name = sm8650_get_function_name,
+ .get_function_mux = sm8650_get_function_mux,
+ .get_pin_name = sm8650_get_pin_name,
+};
+
+static const struct udevice_id msm_pinctrl_ids[] = {
+ { .compatible = "qcom,sm8650-tlmm", .data = (ulong)&sm8650_data },
+ { /* Sentinel */ }
+};
+
+U_BOOT_DRIVER(pinctrl_sm8650) = {
+ .name = "pinctrl_sm8650",
+ .id = UCLASS_NOP,
+ .of_match = msm_pinctrl_ids,
+ .ops = &msm_pinctrl_ops,
+ .bind = msm_pinctrl_bind,
+};
+
diff --git a/drivers/pinctrl/rockchip/pinctrl-px30.c b/drivers/pinctrl/rockchip/pinctrl-px30.c
index 2c35491..cc7885b 100644
--- a/drivers/pinctrl/rockchip/pinctrl-px30.c
+++ b/drivers/pinctrl/rockchip/pinctrl-px30.c
@@ -3,7 +3,6 @@
* (C) Copyright 2019 Rockchip Electronics Co., Ltd
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <dm/pinctrl.h>
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3036.c b/drivers/pinctrl/rockchip/pinctrl-rk3036.c
index afcd343..b14386c 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3036.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3036.c
@@ -3,7 +3,6 @@
* (C) Copyright 2019 Rockchip Electronics Co., Ltd
*/
-#include <common.h>
#include <dm.h>
#include <dm/pinctrl.h>
#include <regmap.h>
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3066.c b/drivers/pinctrl/rockchip/pinctrl-rk3066.c
index 598b632..60e088a 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3066.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3066.c
@@ -3,7 +3,6 @@
* (C) Copyright 2021 Rockchip Electronics Co., Ltd
*/
-#include <common.h>
#include <dm.h>
#include <dm/pinctrl.h>
#include <regmap.h>
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3128.c b/drivers/pinctrl/rockchip/pinctrl-rk3128.c
index 355c45e..d00fc3d 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3128.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3128.c
@@ -3,7 +3,6 @@
* (C) Copyright 2019 Rockchip Electronics Co., Ltd
*/
-#include <common.h>
#include <dm.h>
#include <dm/pinctrl.h>
#include <regmap.h>
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3188.c b/drivers/pinctrl/rockchip/pinctrl-rk3188.c
index 9a982cb..83db51f 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3188.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3188.c
@@ -3,7 +3,6 @@
* (C) Copyright 2019 Rockchip Electronics Co., Ltd
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <dm/pinctrl.h>
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk322x.c b/drivers/pinctrl/rockchip/pinctrl-rk322x.c
index 351406d..b804597 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk322x.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk322x.c
@@ -3,7 +3,6 @@
* (C) Copyright 2019 Rockchip Electronics Co., Ltd
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <dm/pinctrl.h>
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3288.c b/drivers/pinctrl/rockchip/pinctrl-rk3288.c
index a976b7a..3870c1b 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3288.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3288.c
@@ -3,7 +3,6 @@
* (C) Copyright 2019 Rockchip Electronics Co., Ltd
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <dm/pinctrl.h>
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3308.c b/drivers/pinctrl/rockchip/pinctrl-rk3308.c
index f9ac634..2cd91b1 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3308.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3308.c
@@ -3,7 +3,6 @@
* (C) Copyright 2019 Rockchip Electronics Co., Ltd
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <dm/pinctrl.h>
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3328.c b/drivers/pinctrl/rockchip/pinctrl-rk3328.c
index 65a7500..47c2e92 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3328.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3328.c
@@ -3,7 +3,6 @@
* (C) Copyright 2019 Rockchip Electronics Co., Ltd
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <dm/pinctrl.h>
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3368.c b/drivers/pinctrl/rockchip/pinctrl-rk3368.c
index ba867a8..9ae06ed 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3368.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3368.c
@@ -3,7 +3,6 @@
* (C) Copyright 2019 Rockchip Electronics Co., Ltd
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <dm/pinctrl.h>
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3399.c b/drivers/pinctrl/rockchip/pinctrl-rk3399.c
index ae78557..b7a5092 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3399.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3399.c
@@ -3,7 +3,6 @@
* (C) Copyright 2019 Rockchip Electronics Co., Ltd
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <dm/pinctrl.h>
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3568.c b/drivers/pinctrl/rockchip/pinctrl-rk3568.c
index 1d43919..5deedc6 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3568.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3568.c
@@ -3,7 +3,6 @@
* (C) Copyright 2020 Rockchip Electronics Co., Ltd
*/
-#include <common.h>
#include <dm.h>
#include <dm/pinctrl.h>
#include <regmap.h>
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3588.c b/drivers/pinctrl/rockchip/pinctrl-rk3588.c
index 548cf09..98ababc 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3588.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3588.c
@@ -3,7 +3,6 @@
* (C) Copyright 2021 Rockchip Electronics Co., Ltd
*/
-#include <common.h>
#include <dm.h>
#include <dm/pinctrl.h>
#include <regmap.h>
diff --git a/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c b/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c
index 8ef0899..3e74e2f 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c
@@ -3,7 +3,6 @@
* (C) Copyright 2019 Rockchip Electronics Co., Ltd
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <dm/pinctrl.h>
diff --git a/drivers/pinctrl/rockchip/pinctrl-rv1108.c b/drivers/pinctrl/rockchip/pinctrl-rv1108.c
index 5b70b50..3eff5f5 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rv1108.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rv1108.c
@@ -3,7 +3,6 @@
* (C) Copyright 2019 Rockchip Electronics Co., Ltd
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <dm/pinctrl.h>
diff --git a/drivers/pinctrl/rockchip/pinctrl-rv1126.c b/drivers/pinctrl/rockchip/pinctrl-rv1126.c
index eefb8b1..efa2408 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rv1126.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rv1126.c
@@ -3,7 +3,6 @@
* (C) Copyright 2020 Rockchip Electronics Co., Ltd
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <dm/pinctrl.h>
diff --git a/drivers/pinctrl/starfive/pinctrl-starfive.c b/drivers/pinctrl/starfive/pinctrl-starfive.c
index 9b09cc2..95b1a75 100644
--- a/drivers/pinctrl/starfive/pinctrl-starfive.c
+++ b/drivers/pinctrl/starfive/pinctrl-starfive.c
@@ -7,7 +7,6 @@
* Author: Jianlong Huang <jianlong.huang@starfivetech.com>
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <dm/device-internal.h>
diff --git a/drivers/pinctrl/tegra/funcmux-tegra114.c b/drivers/pinctrl/tegra/funcmux-tegra114.c
index 23a27c8..23e9e23 100644
--- a/drivers/pinctrl/tegra/funcmux-tegra114.c
+++ b/drivers/pinctrl/tegra/funcmux-tegra114.c
@@ -5,7 +5,6 @@
/* Tegra114 high-level function multiplexing */
-#include <common.h>
#include <log.h>
#include <asm/arch/clock.h>
#include <asm/arch/funcmux.h>
diff --git a/drivers/pinctrl/tegra/funcmux-tegra124.c b/drivers/pinctrl/tegra/funcmux-tegra124.c
index e7ad85f..b041cea 100644
--- a/drivers/pinctrl/tegra/funcmux-tegra124.c
+++ b/drivers/pinctrl/tegra/funcmux-tegra124.c
@@ -6,7 +6,6 @@
/* Tegra124 high-level function multiplexing */
-#include <common.h>
#include <log.h>
#include <asm/arch/clock.h>
#include <asm/arch/funcmux.h>
diff --git a/drivers/pinctrl/tegra/funcmux-tegra20.c b/drivers/pinctrl/tegra/funcmux-tegra20.c
index 90fe0cb..b8c9132 100644
--- a/drivers/pinctrl/tegra/funcmux-tegra20.c
+++ b/drivers/pinctrl/tegra/funcmux-tegra20.c
@@ -4,7 +4,6 @@
*/
/* Tegra20 high-level function multiplexing */
-#include <common.h>
#include <log.h>
#include <asm/arch/clock.h>
#include <asm/arch/funcmux.h>
diff --git a/drivers/pinctrl/tegra/funcmux-tegra210.c b/drivers/pinctrl/tegra/funcmux-tegra210.c
index 30d994a..d52b615 100644
--- a/drivers/pinctrl/tegra/funcmux-tegra210.c
+++ b/drivers/pinctrl/tegra/funcmux-tegra210.c
@@ -6,7 +6,6 @@
/* Tegra210 high-level function multiplexing */
-#include <common.h>
#include <log.h>
#include <asm/arch/clock.h>
#include <asm/arch/funcmux.h>
diff --git a/drivers/pinctrl/tegra/funcmux-tegra30.c b/drivers/pinctrl/tegra/funcmux-tegra30.c
index c3ee787..e31b859 100644
--- a/drivers/pinctrl/tegra/funcmux-tegra30.c
+++ b/drivers/pinctrl/tegra/funcmux-tegra30.c
@@ -5,7 +5,6 @@
/* Tegra30 high-level function multiplexing */
-#include <common.h>
#include <log.h>
#include <asm/arch/clock.h>
#include <asm/arch/funcmux.h>
diff --git a/drivers/pinctrl/tegra/pinmux-common.c b/drivers/pinctrl/tegra/pinmux-common.c
index 16b03bf..5266c8d 100644
--- a/drivers/pinctrl/tegra/pinmux-common.c
+++ b/drivers/pinctrl/tegra/pinmux-common.c
@@ -4,7 +4,6 @@
* Copyright (c) 2011 The Chromium OS Authors.
*/
-#include <common.h>
#include <log.h>
#include <asm/io.h>
#include <asm/arch/pinmux.h>
diff --git a/drivers/pinctrl/tegra/pinmux-tegra114.c b/drivers/pinctrl/tegra/pinmux-tegra114.c
index 1179660..15c6b65 100644
--- a/drivers/pinctrl/tegra/pinmux-tegra114.c
+++ b/drivers/pinctrl/tegra/pinmux-tegra114.c
@@ -3,7 +3,6 @@
* Copyright (c) 2010-2014, NVIDIA CORPORATION. All rights reserved.
*/
-#include <common.h>
#include <asm/io.h>
#include <asm/arch/pinmux.h>
diff --git a/drivers/pinctrl/tegra/pinmux-tegra124.c b/drivers/pinctrl/tegra/pinmux-tegra124.c
index 261ce64..6d5b720 100644
--- a/drivers/pinctrl/tegra/pinmux-tegra124.c
+++ b/drivers/pinctrl/tegra/pinmux-tegra124.c
@@ -3,7 +3,6 @@
* Copyright (c) 2013-2014, NVIDIA CORPORATION. All rights reserved.
*/
-#include <common.h>
#include <asm/io.h>
#include <asm/arch/pinmux.h>
diff --git a/drivers/pinctrl/tegra/pinmux-tegra20.c b/drivers/pinctrl/tegra/pinmux-tegra20.c
index 0af39e7..c1f8647 100644
--- a/drivers/pinctrl/tegra/pinmux-tegra20.c
+++ b/drivers/pinctrl/tegra/pinmux-tegra20.c
@@ -5,7 +5,6 @@
/* Tegra20 pin multiplexing functions */
-#include <common.h>
#include <asm/io.h>
#include <asm/arch/pinmux.h>
diff --git a/drivers/pinctrl/tegra/pinmux-tegra30.c b/drivers/pinctrl/tegra/pinmux-tegra30.c
index d11b2aa..59ce9ce 100644
--- a/drivers/pinctrl/tegra/pinmux-tegra30.c
+++ b/drivers/pinctrl/tegra/pinmux-tegra30.c
@@ -3,7 +3,6 @@
* Copyright (c) 2010-2014, NVIDIA CORPORATION. All rights reserved.
*/
-#include <common.h>
#include <asm/io.h>
#include <asm/arch/pinmux.h>
diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c
index bdca3f2..eafb654 100644
--- a/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c
+++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c
@@ -4,7 +4,6 @@
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*/
-#include <common.h>
#include <dm.h>
#include <dm/device_compat.h>
#include <linux/bitops.h>
diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c
index a1a3cd7..778a989 100644
--- a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c
+++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c
@@ -4,7 +4,6 @@
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*/
-#include <common.h>
#include <dm.h>
#include <dm/pinctrl.h>
diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c
index 7a92a46..3ef1015 100644
--- a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c
+++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c
@@ -4,7 +4,6 @@
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*/
-#include <common.h>
#include <dm.h>
#include <dm/pinctrl.h>
diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c
index d33e4d7..9302e309 100644
--- a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c
+++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c
@@ -4,7 +4,6 @@
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*/
-#include <common.h>
#include <dm.h>
#include <dm/pinctrl.h>
diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c
index 0e3eb13..f7c5bf3 100644
--- a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c
+++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c
@@ -4,7 +4,6 @@
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*/
-#include <common.h>
#include <dm.h>
#include <dm/pinctrl.h>
diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c
index 7ba2266..2704a50 100644
--- a/drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c
+++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c
@@ -4,7 +4,6 @@
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*/
-#include <common.h>
#include <dm.h>
#include <dm/pinctrl.h>
diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c
index 9ce2e2c..655ec6e 100644
--- a/drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c
+++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c
@@ -4,7 +4,6 @@
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*/
-#include <common.h>
#include <dm.h>
#include <dm/pinctrl.h>
diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c
index e8c2018..226272c 100644
--- a/drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c
+++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c
@@ -4,7 +4,6 @@
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*/
-#include <common.h>
#include <dm.h>
#include <dm/pinctrl.h>
diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-pxs3.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-pxs3.c
index 8a8f126..8df13ca 100644
--- a/drivers/pinctrl/uniphier/pinctrl-uniphier-pxs3.c
+++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-pxs3.c
@@ -5,7 +5,6 @@
* Author: Dai Okamura <dai.okamura@socionext.com>
*/
-#include <common.h>
#include <dm.h>
#include <dm/pinctrl.h>
diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c
index 04c06fb..c045ae9 100644
--- a/drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c
+++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c
@@ -4,7 +4,6 @@
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*/
-#include <common.h>
#include <dm.h>
#include <dm/pinctrl.h>
diff --git a/drivers/power/acpi_pmc/acpi-pmc-uclass.c b/drivers/power/acpi_pmc/acpi-pmc-uclass.c
index 34446a3..c289ced 100644
--- a/drivers/power/acpi_pmc/acpi-pmc-uclass.c
+++ b/drivers/power/acpi_pmc/acpi-pmc-uclass.c
@@ -5,7 +5,6 @@
#define LOG_CATEGORY UCLASS_ACPI_PMC
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <spl.h>
diff --git a/drivers/power/acpi_pmc/pmc_emul.c b/drivers/power/acpi_pmc/pmc_emul.c
index 8015031..8eff3d9 100644
--- a/drivers/power/acpi_pmc/pmc_emul.c
+++ b/drivers/power/acpi_pmc/pmc_emul.c
@@ -6,7 +6,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <pci.h>
diff --git a/drivers/power/acpi_pmc/sandbox.c b/drivers/power/acpi_pmc/sandbox.c
index 8cf03f7..ed1bb19 100644
--- a/drivers/power/acpi_pmc/sandbox.c
+++ b/drivers/power/acpi_pmc/sandbox.c
@@ -7,7 +7,6 @@
#define LOG_CATEGORY UCLASS_ACPI_PMC
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <asm/io.h>
diff --git a/drivers/power/axp152.c b/drivers/power/axp152.c
index a93987c..5a62382 100644
--- a/drivers/power/axp152.c
+++ b/drivers/power/axp152.c
@@ -3,8 +3,8 @@
* (C) Copyright 2012
* Henrik Nordstrom <henrik@henriknordstrom.net>
*/
-#include <common.h>
#include <command.h>
+#include <linux/errno.h>
#include <asm/arch/pmic_bus.h>
#include <axp_pmic.h>
diff --git a/drivers/power/axp209.c b/drivers/power/axp209.c
index 3447b9f..6ae4169 100644
--- a/drivers/power/axp209.c
+++ b/drivers/power/axp209.c
@@ -4,11 +4,11 @@
* Henrik Nordstrom <henrik@henriknordstrom.net>
*/
-#include <common.h>
#include <command.h>
#include <asm/arch/pmic_bus.h>
#include <axp_pmic.h>
#include <linux/delay.h>
+#include <linux/errno.h>
#ifdef CONFIG_AXP_ALDO3_VOLT_SLOPE_08
# define AXP209_VRC_SLOPE AXP209_VRC_LDO3_800uV_uS
diff --git a/drivers/power/axp221.c b/drivers/power/axp221.c
index d251c31..c22ca03 100644
--- a/drivers/power/axp221.c
+++ b/drivers/power/axp221.c
@@ -9,7 +9,6 @@
* (C) Copyright 2013 Oliver Schinagl <oliver@schinagl.nl>
*/
-#include <common.h>
#include <command.h>
#include <errno.h>
#include <asm/arch/pmic_bus.h>
diff --git a/drivers/power/axp305.c b/drivers/power/axp305.c
index 049ef07..0312ad9 100644
--- a/drivers/power/axp305.c
+++ b/drivers/power/axp305.c
@@ -9,7 +9,6 @@
* (C) Copyright 2013 Oliver Schinagl <oliver@schinagl.nl>
*/
-#include <common.h>
#include <command.h>
#include <errno.h>
#include <asm/arch/pmic_bus.h>
diff --git a/drivers/power/axp313.c b/drivers/power/axp313.c
index bbc9e91..09ecb5b 100644
--- a/drivers/power/axp313.c
+++ b/drivers/power/axp313.c
@@ -10,7 +10,6 @@
* (C) Copyright 2013 Oliver Schinagl <oliver@schinagl.nl>
*/
-#include <common.h>
#include <command.h>
#include <errno.h>
#include <asm/arch/pmic_bus.h>
diff --git a/drivers/power/axp809.c b/drivers/power/axp809.c
index d327a58..9e38e1a 100644
--- a/drivers/power/axp809.c
+++ b/drivers/power/axp809.c
@@ -10,7 +10,6 @@
* (C) Copyright 2013 Oliver Schinagl <oliver@schinagl.nl>
*/
-#include <common.h>
#include <command.h>
#include <errno.h>
#include <asm/arch/pmic_bus.h>
diff --git a/drivers/power/axp818.c b/drivers/power/axp818.c
index 08286ea..83ae6ec 100644
--- a/drivers/power/axp818.c
+++ b/drivers/power/axp818.c
@@ -10,7 +10,6 @@
* (C) Copyright 2013 Oliver Schinagl <oliver@schinagl.nl>
*/
-#include <common.h>
#include <command.h>
#include <errno.h>
#include <asm/arch/pmic_bus.h>
diff --git a/drivers/power/domain/apple-pmgr.c b/drivers/power/domain/apple-pmgr.c
index 402c5b1..bf99406 100644
--- a/drivers/power/domain/apple-pmgr.c
+++ b/drivers/power/domain/apple-pmgr.c
@@ -3,7 +3,6 @@
* Copyright (C) 2021 Mark Kettenis <kettenis@openbsd.org>
*/
-#include <common.h>
#include <asm/io.h>
#include <dm.h>
#include <dm/device-internal.h>
diff --git a/drivers/power/domain/bcm6328-power-domain.c b/drivers/power/domain/bcm6328-power-domain.c
index 80144dd..36b5a93 100644
--- a/drivers/power/domain/bcm6328-power-domain.c
+++ b/drivers/power/domain/bcm6328-power-domain.c
@@ -3,7 +3,6 @@
* Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com>
*/
-#include <common.h>
#include <dm.h>
#include <malloc.h>
#include <power-domain-uclass.h>
diff --git a/drivers/power/domain/imx8-power-domain-legacy.c b/drivers/power/domain/imx8-power-domain-legacy.c
index c8ca266..713a51d 100644
--- a/drivers/power/domain/imx8-power-domain-legacy.c
+++ b/drivers/power/domain/imx8-power-domain-legacy.c
@@ -3,7 +3,6 @@
* Copyright 2017 NXP
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <malloc.h>
diff --git a/drivers/power/domain/imx8-power-domain.c b/drivers/power/domain/imx8-power-domain.c
index b45e468..e8dcc05 100644
--- a/drivers/power/domain/imx8-power-domain.c
+++ b/drivers/power/domain/imx8-power-domain.c
@@ -4,7 +4,6 @@
*/
#define DEBUG
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <malloc.h>
diff --git a/drivers/power/domain/imx8m-power-domain.c b/drivers/power/domain/imx8m-power-domain.c
index df5d7d6..8b6870c 100644
--- a/drivers/power/domain/imx8m-power-domain.c
+++ b/drivers/power/domain/imx8m-power-domain.c
@@ -3,7 +3,6 @@
* Copyright 2017 NXP
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <malloc.h>
diff --git a/drivers/power/domain/imx8mp-hsiomix.c b/drivers/power/domain/imx8mp-hsiomix.c
index 6188a04..455ad53 100644
--- a/drivers/power/domain/imx8mp-hsiomix.c
+++ b/drivers/power/domain/imx8mp-hsiomix.c
@@ -3,7 +3,6 @@
* Copyright (C) 2022 Marek Vasut <marex@denx.de>
*/
-#include <common.h>
#include <asm/io.h>
#include <clk.h>
#include <clk-uclass.h>
diff --git a/drivers/power/domain/meson-ee-pwrc.c b/drivers/power/domain/meson-ee-pwrc.c
index 676fded..20e9f32 100644
--- a/drivers/power/domain/meson-ee-pwrc.c
+++ b/drivers/power/domain/meson-ee-pwrc.c
@@ -4,7 +4,6 @@
* Author: Neil Armstrong <narmstrong@baylibre.com>
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <malloc.h>
diff --git a/drivers/power/domain/meson-gx-pwrc-vpu.c b/drivers/power/domain/meson-gx-pwrc-vpu.c
index 612660c..1c56e85 100644
--- a/drivers/power/domain/meson-gx-pwrc-vpu.c
+++ b/drivers/power/domain/meson-gx-pwrc-vpu.c
@@ -6,7 +6,6 @@
* Author: Neil Armstrong <narmstrong@baylibre.com>
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <malloc.h>
diff --git a/drivers/power/domain/mtk-power-domain.c b/drivers/power/domain/mtk-power-domain.c
index 3b84147..2d1ba18 100644
--- a/drivers/power/domain/mtk-power-domain.c
+++ b/drivers/power/domain/mtk-power-domain.c
@@ -5,7 +5,6 @@
*/
#include <clk.h>
-#include <common.h>
#include <dm.h>
#include <malloc.h>
#include <power-domain-uclass.h>
diff --git a/drivers/power/domain/power-domain-uclass.c b/drivers/power/domain/power-domain-uclass.c
index f6286c7..938bd8c 100644
--- a/drivers/power/domain/power-domain-uclass.c
+++ b/drivers/power/domain/power-domain-uclass.c
@@ -5,7 +5,6 @@
#define LOG_CATEGORY UCLASS_POWER_DOMAIN
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <malloc.h>
diff --git a/drivers/power/domain/sandbox-power-domain-test.c b/drivers/power/domain/sandbox-power-domain-test.c
index 1bf52f1..08c15ef 100644
--- a/drivers/power/domain/sandbox-power-domain-test.c
+++ b/drivers/power/domain/sandbox-power-domain-test.c
@@ -3,7 +3,6 @@
* Copyright (c) 2016, NVIDIA CORPORATION.
*/
-#include <common.h>
#include <dm.h>
#include <malloc.h>
#include <power-domain.h>
diff --git a/drivers/power/domain/sandbox-power-domain.c b/drivers/power/domain/sandbox-power-domain.c
index 04a0710..9dd490b 100644
--- a/drivers/power/domain/sandbox-power-domain.c
+++ b/drivers/power/domain/sandbox-power-domain.c
@@ -3,7 +3,6 @@
* Copyright (c) 2016, NVIDIA CORPORATION.
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <malloc.h>
diff --git a/drivers/power/domain/tegra186-power-domain.c b/drivers/power/domain/tegra186-power-domain.c
index 46da541..334c460 100644
--- a/drivers/power/domain/tegra186-power-domain.c
+++ b/drivers/power/domain/tegra186-power-domain.c
@@ -3,7 +3,6 @@
* Copyright (c) 2016, NVIDIA CORPORATION.
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <malloc.h>
diff --git a/drivers/power/domain/ti-power-domain.c b/drivers/power/domain/ti-power-domain.c
index 8996c40..b059dd3 100644
--- a/drivers/power/domain/ti-power-domain.c
+++ b/drivers/power/domain/ti-power-domain.c
@@ -7,7 +7,6 @@
*/
#include <asm/io.h>
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <power-domain-uclass.h>
diff --git a/drivers/power/domain/ti-sci-power-domain.c b/drivers/power/domain/ti-sci-power-domain.c
index 8d6abe1..0a9f498 100644
--- a/drivers/power/domain/ti-sci-power-domain.c
+++ b/drivers/power/domain/ti-sci-power-domain.c
@@ -8,7 +8,6 @@
* Loosely based on Linux kernel ti_sci_pm_domains.c...
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <log.h>
diff --git a/drivers/power/domain/zynqmp-power-domain.c b/drivers/power/domain/zynqmp-power-domain.c
index 5ee9e02..ac93934 100644
--- a/drivers/power/domain/zynqmp-power-domain.c
+++ b/drivers/power/domain/zynqmp-power-domain.c
@@ -3,7 +3,6 @@
* Copyright (c) 2021, Xilinx. Inc.
*/
-#include <common.h>
#include <dm.h>
#include <dm/device_compat.h>
#include <log.h>
diff --git a/drivers/power/exynos-tmu.c b/drivers/power/exynos-tmu.c
index 6d62f6c..21c2fab 100644
--- a/drivers/power/exynos-tmu.c
+++ b/drivers/power/exynos-tmu.c
@@ -17,11 +17,12 @@
* MA 02111-1307 USA
*/
-#include <common.h>
#include <errno.h>
#include <fdtdec.h>
#include <log.h>
+#include <time.h>
#include <tmu.h>
+#include <asm/io.h>
#include <asm/arch/tmu.h>
#include <asm/arch/power.h>
diff --git a/drivers/power/mt6323.c b/drivers/power/mt6323.c
index 354817a..dd6cbcf 100644
--- a/drivers/power/mt6323.c
+++ b/drivers/power/mt6323.c
@@ -3,7 +3,6 @@
* Copyright (C) 2019 Frank Wunderlich <frank-w@public-files.de>
*/
-#include <common.h>
#include <command.h>
#include <asm/io.h>
#include <linux/delay.h>
diff --git a/drivers/power/pmic/ab8500.c b/drivers/power/pmic/ab8500.c
index 1f64f21..9ba0967 100644
--- a/drivers/power/pmic/ab8500.c
+++ b/drivers/power/pmic/ab8500.c
@@ -7,7 +7,6 @@
* Copyright (C) ST-Ericsson SA 2010
*/
-#include <common.h>
#include <dm.h>
#include <regmap.h>
#include <syscon.h>
diff --git a/drivers/power/pmic/act8846.c b/drivers/power/pmic/act8846.c
index 8f0f5a6..3058ef0 100644
--- a/drivers/power/pmic/act8846.c
+++ b/drivers/power/pmic/act8846.c
@@ -4,7 +4,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <fdtdec.h>
diff --git a/drivers/power/pmic/as3722.c b/drivers/power/pmic/as3722.c
index c7dd970..9b0f4fb 100644
--- a/drivers/power/pmic/as3722.c
+++ b/drivers/power/pmic/as3722.c
@@ -5,7 +5,6 @@
#define pr_fmt(fmt) "as3722: " fmt
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <fdtdec.h>
diff --git a/drivers/power/pmic/as3722_gpio.c b/drivers/power/pmic/as3722_gpio.c
index 987fbdf..52d8bd0 100644
--- a/drivers/power/pmic/as3722_gpio.c
+++ b/drivers/power/pmic/as3722_gpio.c
@@ -3,7 +3,6 @@
* Copyright (C) 2014 NVIDIA Corporation
*/
-#include <common.h>
#include <dm.h>
#include <asm/gpio.h>
#include <linux/printk.h>
diff --git a/drivers/power/pmic/bd71837.c b/drivers/power/pmic/bd71837.c
index ee6ae78..a5df257 100644
--- a/drivers/power/pmic/bd71837.c
+++ b/drivers/power/pmic/bd71837.c
@@ -3,7 +3,6 @@
* Copyright 2018 NXP
*/
-#include <common.h>
#include <errno.h>
#include <dm.h>
#include <i2c.h>
diff --git a/drivers/power/pmic/da9063.c b/drivers/power/pmic/da9063.c
index ca95b82..7bd3df3 100644
--- a/drivers/power/pmic/da9063.c
+++ b/drivers/power/pmic/da9063.c
@@ -4,7 +4,6 @@
* Martin Fuzzey <martin.fuzzey@flowbird.group>
*/
-#include <common.h>
#include <fdtdec.h>
#include <errno.h>
#include <dm.h>
diff --git a/drivers/power/pmic/fan53555.c b/drivers/power/pmic/fan53555.c
index d556b9a..95bf600 100644
--- a/drivers/power/pmic/fan53555.c
+++ b/drivers/power/pmic/fan53555.c
@@ -3,7 +3,6 @@
* (C) 2018 Theobroma Systems Design und Consulting GmbH
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <dm/device-internal.h>
diff --git a/drivers/power/pmic/i2c_pmic_emul.c b/drivers/power/pmic/i2c_pmic_emul.c
index f0a0374..6e81b9c34 100644
--- a/drivers/power/pmic/i2c_pmic_emul.c
+++ b/drivers/power/pmic/i2c_pmic_emul.c
@@ -4,7 +4,6 @@
* Przemyslaw Marczak <p.marczak@samsung.com>
*/
-#include <common.h>
#include <errno.h>
#include <dm.h>
#include <i2c.h>
diff --git a/drivers/power/pmic/lp873x.c b/drivers/power/pmic/lp873x.c
index fda5bc1..2c8fa4e 100644
--- a/drivers/power/pmic/lp873x.c
+++ b/drivers/power/pmic/lp873x.c
@@ -4,7 +4,6 @@
* Keerthy <j-keerthy@ti.com>
*/
-#include <common.h>
#include <fdtdec.h>
#include <errno.h>
#include <dm.h>
diff --git a/drivers/power/pmic/lp87565.c b/drivers/power/pmic/lp87565.c
index 904e02c..c2ff75b 100644
--- a/drivers/power/pmic/lp87565.c
+++ b/drivers/power/pmic/lp87565.c
@@ -4,7 +4,6 @@
* Keerthy <j-keerthy@ti.com>
*/
-#include <common.h>
#include <fdtdec.h>
#include <errno.h>
#include <dm.h>
diff --git a/drivers/power/pmic/max77686.c b/drivers/power/pmic/max77686.c
index 7e6f7d1..bfe57b3 100644
--- a/drivers/power/pmic/max77686.c
+++ b/drivers/power/pmic/max77686.c
@@ -4,7 +4,6 @@
* Przemyslaw Marczak <p.marczak@samsung.com>
*/
-#include <common.h>
#include <fdtdec.h>
#include <errno.h>
#include <dm.h>
diff --git a/drivers/power/pmic/max8997.c b/drivers/power/pmic/max8997.c
index 504a63b..4afa6c8 100644
--- a/drivers/power/pmic/max8997.c
+++ b/drivers/power/pmic/max8997.c
@@ -4,7 +4,6 @@
* Jaehoon Chung <jh80.chung@samsung.com>
*/
-#include <common.h>
#include <dm.h>
#include <i2c.h>
#include <linux/printk.h>
diff --git a/drivers/power/pmic/max8998.c b/drivers/power/pmic/max8998.c
index d155474..0566902 100644
--- a/drivers/power/pmic/max8998.c
+++ b/drivers/power/pmic/max8998.c
@@ -4,7 +4,6 @@
* Jaehoon Chung <jh80.chung@samsung.com>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <i2c.h>
diff --git a/drivers/power/pmic/mc34708.c b/drivers/power/pmic/mc34708.c
index 40d7322..43badb5 100644
--- a/drivers/power/pmic/mc34708.c
+++ b/drivers/power/pmic/mc34708.c
@@ -5,7 +5,6 @@
*
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <fsl_pmic.h>
diff --git a/drivers/power/pmic/mp5416.c b/drivers/power/pmic/mp5416.c
index 6180adf..9d44f0a 100644
--- a/drivers/power/pmic/mp5416.c
+++ b/drivers/power/pmic/mp5416.c
@@ -2,7 +2,6 @@
/*
* Copyright 2020 Gateworks Corporation
*/
-#include <common.h>
#include <errno.h>
#include <dm.h>
#include <i2c.h>
diff --git a/drivers/power/pmic/palmas.c b/drivers/power/pmic/palmas.c
index e340a32..f676bf6 100644
--- a/drivers/power/pmic/palmas.c
+++ b/drivers/power/pmic/palmas.c
@@ -4,7 +4,6 @@
* Keerthy <j-keerthy@ti.com>
*/
-#include <common.h>
#include <fdtdec.h>
#include <errno.h>
#include <dm.h>
diff --git a/drivers/power/pmic/pca9450.c b/drivers/power/pmic/pca9450.c
index 0bbe98c..07af627 100644
--- a/drivers/power/pmic/pca9450.c
+++ b/drivers/power/pmic/pca9450.c
@@ -3,7 +3,6 @@
* Copyright 2019 NXP
*/
-#include <common.h>
#include <fdtdec.h>
#include <errno.h>
#include <dm.h>
diff --git a/drivers/power/pmic/pfuze100.c b/drivers/power/pmic/pfuze100.c
index 15420ac..9e09805 100644
--- a/drivers/power/pmic/pfuze100.c
+++ b/drivers/power/pmic/pfuze100.c
@@ -4,7 +4,6 @@
* Peng Fan <Peng.Fan@freescale.com>
*/
-#include <common.h>
#include <fdtdec.h>
#include <errno.h>
#include <dm.h>
diff --git a/drivers/power/pmic/pmic-uclass.c b/drivers/power/pmic/pmic-uclass.c
index 0e2f5e1..bb45981 100644
--- a/drivers/power/pmic/pmic-uclass.c
+++ b/drivers/power/pmic/pmic-uclass.c
@@ -6,7 +6,6 @@
#define LOG_CATEGORY UCLASS_PMIC
-#include <common.h>
#include <fdtdec.h>
#include <errno.h>
#include <dm.h>
diff --git a/drivers/power/pmic/pmic_hi6553.c b/drivers/power/pmic/pmic_hi6553.c
index 80b9078..0530501 100644
--- a/drivers/power/pmic/pmic_hi6553.c
+++ b/drivers/power/pmic/pmic_hi6553.c
@@ -4,7 +4,6 @@
* Peter Griffin <peter.griffin@linaro.org>
*/
#include <asm/io.h>
-#include <common.h>
#include <linux/delay.h>
#include <power/pmic.h>
#include <power/max8997_muic.h>
diff --git a/drivers/power/pmic/pmic_ltc3676.c b/drivers/power/pmic/pmic_ltc3676.c
index af94f37..145a631 100644
--- a/drivers/power/pmic/pmic_ltc3676.c
+++ b/drivers/power/pmic/pmic_ltc3676.c
@@ -4,7 +4,6 @@
* Tim Harvey <tharvey@gateworks.com>
*/
-#include <common.h>
#include <errno.h>
#include <i2c.h>
#include <power/pmic.h>
diff --git a/drivers/power/pmic/pmic_mc34vr500.c b/drivers/power/pmic/pmic_mc34vr500.c
index 9dd1c46..0dfdfbd 100644
--- a/drivers/power/pmic/pmic_mc34vr500.c
+++ b/drivers/power/pmic/pmic_mc34vr500.c
@@ -4,7 +4,6 @@
* Hou Zhiqiang <Zhiqiang.Hou@freescale.com>
*/
-#include <common.h>
#include <errno.h>
#include <i2c.h>
#include <power/pmic.h>
diff --git a/drivers/power/pmic/pmic_pca9450.c b/drivers/power/pmic/pmic_pca9450.c
index 8c4d0a9..12500ba 100644
--- a/drivers/power/pmic/pmic_pca9450.c
+++ b/drivers/power/pmic/pmic_pca9450.c
@@ -3,7 +3,6 @@
* Copyright 2019 NXP
*/
-#include <common.h>
#include <errno.h>
#include <i2c.h>
#include <power/pmic.h>
diff --git a/drivers/power/pmic/pmic_pfuze100.c b/drivers/power/pmic/pmic_pfuze100.c
index 5115b55..a266709 100644
--- a/drivers/power/pmic/pmic_pfuze100.c
+++ b/drivers/power/pmic/pmic_pfuze100.c
@@ -4,7 +4,6 @@
* Tim Harvey <tharvey@gateworks.com>
*/
-#include <common.h>
#include <errno.h>
#include <i2c.h>
#include <power/pmic.h>
diff --git a/drivers/power/pmic/pmic_pfuze3000.c b/drivers/power/pmic/pmic_pfuze3000.c
index a6d9725..602c474 100644
--- a/drivers/power/pmic/pmic_pfuze3000.c
+++ b/drivers/power/pmic/pmic_pfuze3000.c
@@ -4,7 +4,6 @@
* Peng Fan <Peng.Fan@freescale.com>
*/
-#include <common.h>
#include <errno.h>
#include <i2c.h>
#include <power/pmic.h>
diff --git a/drivers/power/pmic/pmic_qcom.c b/drivers/power/pmic/pmic_qcom.c
index f2ac649..92d0a95 100644
--- a/drivers/power/pmic/pmic_qcom.c
+++ b/drivers/power/pmic/pmic_qcom.c
@@ -4,7 +4,6 @@
*
* (C) Copyright 2015 Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
*/
-#include <common.h>
#include <dm.h>
#include <power/pmic.h>
#include <spmi/spmi.h>
diff --git a/drivers/power/pmic/pmic_tps62362.c b/drivers/power/pmic/pmic_tps62362.c
index 6426d14..4f0e406d 100644
--- a/drivers/power/pmic/pmic_tps62362.c
+++ b/drivers/power/pmic/pmic_tps62362.c
@@ -4,7 +4,6 @@
* Author: Felipe Balbi <balbi@ti.com>
*/
-#include <common.h>
#include <i2c.h>
#include <linux/errno.h>
#include <power/pmic.h>
diff --git a/drivers/power/pmic/pmic_tps65217.c b/drivers/power/pmic/pmic_tps65217.c
index ccbf223..bd44e0d 100644
--- a/drivers/power/pmic/pmic_tps65217.c
+++ b/drivers/power/pmic/pmic_tps65217.c
@@ -4,7 +4,6 @@
* Texas Instruments, <www.ti.com>
*/
-#include <common.h>
#include <i2c.h>
#include <dm.h>
#include <errno.h>
diff --git a/drivers/power/pmic/pmic_tps65218.c b/drivers/power/pmic/pmic_tps65218.c
index 6717490..49d07e9 100644
--- a/drivers/power/pmic/pmic_tps65218.c
+++ b/drivers/power/pmic/pmic_tps65218.c
@@ -4,7 +4,6 @@
* Texas Instruments, <www.ti.com>
*/
-#include <common.h>
#include <i2c.h>
#include <linux/errno.h>
#include <power/pmic.h>
diff --git a/drivers/power/pmic/pmic_tps65910.c b/drivers/power/pmic/pmic_tps65910.c
index e3de730..df9bb66 100644
--- a/drivers/power/pmic/pmic_tps65910.c
+++ b/drivers/power/pmic/pmic_tps65910.c
@@ -4,7 +4,6 @@
* Texas Instruments, <www.ti.com>
*/
-#include <common.h>
#include <i2c.h>
#include <power/tps65910.h>
diff --git a/drivers/power/pmic/pmic_tps65910_dm.c b/drivers/power/pmic/pmic_tps65910_dm.c
index ecf836e..de8d805 100644
--- a/drivers/power/pmic/pmic_tps65910_dm.c
+++ b/drivers/power/pmic/pmic_tps65910_dm.c
@@ -3,7 +3,6 @@
* Copyright (C) EETS GmbH, 2017, Felix Brack <f.brack@eets.ch>
*/
-#include <common.h>
#include <dm.h>
#include <dm/lists.h>
#include <i2c.h>
diff --git a/drivers/power/pmic/rk8xx.c b/drivers/power/pmic/rk8xx.c
index 3a8261d..12ff26a 100644
--- a/drivers/power/pmic/rk8xx.c
+++ b/drivers/power/pmic/rk8xx.c
@@ -4,7 +4,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <dm.h>
#include <dm/lists.h>
#include <errno.h>
diff --git a/drivers/power/pmic/rn5t567.c b/drivers/power/pmic/rn5t567.c
index 9d103dd..0124d84 100644
--- a/drivers/power/pmic/rn5t567.c
+++ b/drivers/power/pmic/rn5t567.c
@@ -4,7 +4,6 @@
* Stefan Agner <stefan.agner@toradex.com>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <fdtdec.h>
diff --git a/drivers/power/pmic/s2mps11.c b/drivers/power/pmic/s2mps11.c
index 5ff4f20..1778001 100644
--- a/drivers/power/pmic/s2mps11.c
+++ b/drivers/power/pmic/s2mps11.c
@@ -4,7 +4,6 @@
* Przemyslaw Marczak <p.marczak@samsung.com>
*/
-#include <common.h>
#include <fdtdec.h>
#include <errno.h>
#include <dm.h>
diff --git a/drivers/power/pmic/s5m8767.c b/drivers/power/pmic/s5m8767.c
index eea072a..799d001 100644
--- a/drivers/power/pmic/s5m8767.c
+++ b/drivers/power/pmic/s5m8767.c
@@ -3,7 +3,6 @@
* Copyright (C) 2015 Google, Inc
*/
-#include <common.h>
#include <fdtdec.h>
#include <errno.h>
#include <dm.h>
diff --git a/drivers/power/pmic/sandbox.c b/drivers/power/pmic/sandbox.c
index 14b8245..ddc11d6 100644
--- a/drivers/power/pmic/sandbox.c
+++ b/drivers/power/pmic/sandbox.c
@@ -6,7 +6,6 @@
#define LOG_CATEGORY UCLASS_PMIC
-#include <common.h>
#include <fdtdec.h>
#include <errno.h>
#include <dm.h>
diff --git a/drivers/power/pmic/stpmic1.c b/drivers/power/pmic/stpmic1.c
index 8701d4f..c99a0c2 100644
--- a/drivers/power/pmic/stpmic1.c
+++ b/drivers/power/pmic/stpmic1.c
@@ -3,7 +3,6 @@
* Copyright (C) 2018, STMicroelectronics - All Rights Reserved
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <i2c.h>
diff --git a/drivers/power/pmic/tps65090.c b/drivers/power/pmic/tps65090.c
index 2a04d59..ad2ab34 100644
--- a/drivers/power/pmic/tps65090.c
+++ b/drivers/power/pmic/tps65090.c
@@ -4,7 +4,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <fdtdec.h>
diff --git a/drivers/power/pmic/tps65219.c b/drivers/power/pmic/tps65219.c
index 9462afe..0716af0 100644
--- a/drivers/power/pmic/tps65219.c
+++ b/drivers/power/pmic/tps65219.c
@@ -4,7 +4,6 @@
* Author: Neil Armstrong <narmstrong@baylibre.com>
*/
-#include <common.h>
#include <fdtdec.h>
#include <errno.h>
#include <dm.h>
diff --git a/drivers/power/pmic/tps65941.c b/drivers/power/pmic/tps65941.c
index 727b427..c3490db 100644
--- a/drivers/power/pmic/tps65941.c
+++ b/drivers/power/pmic/tps65941.c
@@ -4,7 +4,6 @@
* Keerthy <j-keerthy@ti.com>
*/
-#include <common.h>
#include <fdtdec.h>
#include <errno.h>
#include <dm.h>
@@ -75,6 +74,10 @@
{ .compatible = "ti,tps659412", .data = TPS659411 },
{ .compatible = "ti,tps659413", .data = TPS659413 },
{ .compatible = "ti,lp876441", .data = LP876441 },
+ { .compatible = "ti,tps65224", .data = TPS65224 },
+ { .compatible = "ti,tps6594-q1", .data = TPS659411 },
+ { .compatible = "ti,tps6593-q1", .data = TPS659413 },
+ { .compatible = "ti,lp8764-q1", .data = LP876441 },
{ }
};
diff --git a/drivers/power/power_core.c b/drivers/power/power_core.c
index 4f7ba09..1caf9f0 100644
--- a/drivers/power/power_core.c
+++ b/drivers/power/power_core.c
@@ -9,7 +9,6 @@
* (C) Copyright 2008-2009 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <command.h>
#include <log.h>
#include <malloc.h>
diff --git a/drivers/power/power_dialog.c b/drivers/power/power_dialog.c
index ad7aaf3..a5c7ea3 100644
--- a/drivers/power/power_dialog.c
+++ b/drivers/power/power_dialog.c
@@ -4,7 +4,7 @@
* Lukasz Majewski <l.majewski@samsung.com>
*/
-#include <common.h>
+#include <config.h>
#include <log.h>
#include <power/pmic.h>
#include <dialog_pmic.h>
diff --git a/drivers/power/power_fsl.c b/drivers/power/power_fsl.c
index 9dc930f..a10a14a 100644
--- a/drivers/power/power_fsl.c
+++ b/drivers/power/power_fsl.c
@@ -4,7 +4,7 @@
* Lukasz Majewski <l.majewski@samsung.com>
*/
-#include <common.h>
+#include <config.h>
#include <spi.h>
#include <power/pmic.h>
#include <fsl_pmic.h>
diff --git a/drivers/power/power_i2c.c b/drivers/power/power_i2c.c
index b67ac2f..a871fc4 100644
--- a/drivers/power/power_i2c.c
+++ b/drivers/power/power_i2c.c
@@ -10,7 +10,6 @@
* (C) Copyright 2019 NXP
*/
-#include <common.h>
#include <log.h>
#include <linux/types.h>
#include <power/pmic.h>
diff --git a/drivers/power/power_spi.c b/drivers/power/power_spi.c
index 1eaf977..5442731 100644
--- a/drivers/power/power_spi.c
+++ b/drivers/power/power_spi.c
@@ -9,7 +9,6 @@
* (C) Copyright 2008-2009 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <linux/types.h>
#include <power/pmic.h>
#include <spi.h>
diff --git a/drivers/power/regulator/act8846.c b/drivers/power/regulator/act8846.c
index bdce973..d3e72da 100644
--- a/drivers/power/regulator/act8846.c
+++ b/drivers/power/regulator/act8846.c
@@ -8,7 +8,6 @@
* zyw <zyw@rock-chips.com>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <power/act8846_pmic.h>
diff --git a/drivers/power/regulator/anatop_regulator.c b/drivers/power/regulator/anatop_regulator.c
index 096a156..824a753 100644
--- a/drivers/power/regulator/anatop_regulator.c
+++ b/drivers/power/regulator/anatop_regulator.c
@@ -4,7 +4,6 @@
* Copyright (C) 2021 Linaro
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <log.h>
diff --git a/drivers/power/regulator/as3722_regulator.c b/drivers/power/regulator/as3722_regulator.c
index ec0776b..8d60965 100644
--- a/drivers/power/regulator/as3722_regulator.c
+++ b/drivers/power/regulator/as3722_regulator.c
@@ -6,7 +6,6 @@
* Placeholder regulator driver for as3722.
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <log.h>
diff --git a/drivers/power/regulator/bd71837.c b/drivers/power/regulator/bd71837.c
index 913ed88..59aec1a 100644
--- a/drivers/power/regulator/bd71837.c
+++ b/drivers/power/regulator/bd71837.c
@@ -5,7 +5,6 @@
* ROHM BD71837 regulator driver
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <linux/bitops.h>
diff --git a/drivers/power/regulator/da9063.c b/drivers/power/regulator/da9063.c
index 8df1abc..5d566b0 100644
--- a/drivers/power/regulator/da9063.c
+++ b/drivers/power/regulator/da9063.c
@@ -4,7 +4,6 @@
* Martin Fuzzey <martin.fuzzey@flowbird.group>
*/
-#include <common.h>
#include <dm.h>
#include <linux/bitops.h>
#include <power/da9063_pmic.h>
diff --git a/drivers/power/regulator/fan53555.c b/drivers/power/regulator/fan53555.c
index fa8d88f..5cba58f 100644
--- a/drivers/power/regulator/fan53555.c
+++ b/drivers/power/regulator/fan53555.c
@@ -3,7 +3,6 @@
* (C) 2018 Theobroma Systems Design und Consulting GmbH
*/
-#include <common.h>
#include <bitfield.h>
#include <errno.h>
#include <dm.h>
diff --git a/drivers/power/regulator/fixed.c b/drivers/power/regulator/fixed.c
index 590c288..98c89bf 100644
--- a/drivers/power/regulator/fixed.c
+++ b/drivers/power/regulator/fixed.c
@@ -5,7 +5,6 @@
* Przemyslaw Marczak <p.marczak@samsung.com>
*/
-#include <common.h>
#include <clk.h>
#include <errno.h>
#include <dm.h>
diff --git a/drivers/power/regulator/gpio-regulator.c b/drivers/power/regulator/gpio-regulator.c
index 74137b7..38b2253 100644
--- a/drivers/power/regulator/gpio-regulator.c
+++ b/drivers/power/regulator/gpio-regulator.c
@@ -4,7 +4,6 @@
* Keerthy <j-keerthy@ti.com>
*/
-#include <common.h>
#include <fdtdec.h>
#include <errno.h>
#include <dm.h>
diff --git a/drivers/power/regulator/lp873x_regulator.c b/drivers/power/regulator/lp873x_regulator.c
index c326f8e..c59d771 100644
--- a/drivers/power/regulator/lp873x_regulator.c
+++ b/drivers/power/regulator/lp873x_regulator.c
@@ -6,7 +6,6 @@
* Keerthy <j-keerthy@ti.com>
*/
-#include <common.h>
#include <fdtdec.h>
#include <errno.h>
#include <dm.h>
diff --git a/drivers/power/regulator/lp87565_regulator.c b/drivers/power/regulator/lp87565_regulator.c
index 6bbc831..d622d95 100644
--- a/drivers/power/regulator/lp87565_regulator.c
+++ b/drivers/power/regulator/lp87565_regulator.c
@@ -6,7 +6,6 @@
* Keerthy <j-keerthy@ti.com>
*/
-#include <common.h>
#include <fdtdec.h>
#include <errno.h>
#include <dm.h>
diff --git a/drivers/power/regulator/max77686.c b/drivers/power/regulator/max77686.c
index 3a20803..4e0ba12 100644
--- a/drivers/power/regulator/max77686.c
+++ b/drivers/power/regulator/max77686.c
@@ -6,7 +6,6 @@
* Przemyslaw Marczak <p.marczak@samsung.com>
*/
-#include <common.h>
#include <fdtdec.h>
#include <errno.h>
#include <dm.h>
diff --git a/drivers/power/regulator/npcm8xx_regulator.c b/drivers/power/regulator/npcm8xx_regulator.c
index fcd1058..30d1b89 100644
--- a/drivers/power/regulator/npcm8xx_regulator.c
+++ b/drivers/power/regulator/npcm8xx_regulator.c
@@ -3,7 +3,6 @@
* Copyright (c) 2022 Nuvoton Technology Corp.
*/
-#include <common.h>
#include <dm.h>
#include <asm/io.h>
#include <dm/device_compat.h>
diff --git a/drivers/power/regulator/palmas_regulator.c b/drivers/power/regulator/palmas_regulator.c
index d615e94..2286eac 100644
--- a/drivers/power/regulator/palmas_regulator.c
+++ b/drivers/power/regulator/palmas_regulator.c
@@ -6,7 +6,6 @@
* Keerthy <j-keerthy@ti.com>
*/
-#include <common.h>
#include <fdtdec.h>
#include <errno.h>
#include <dm.h>
diff --git a/drivers/power/regulator/pbias_regulator.c b/drivers/power/regulator/pbias_regulator.c
index cf4e285..8f599ca 100644
--- a/drivers/power/regulator/pbias_regulator.c
+++ b/drivers/power/regulator/pbias_regulator.c
@@ -4,7 +4,6 @@
* Jean-Jacques Hiblot <jjhiblot@ti.com>
*/
-#include <common.h>
#include <errno.h>
#include <dm.h>
#include <log.h>
diff --git a/drivers/power/regulator/pca9450.c b/drivers/power/regulator/pca9450.c
index 7ca20d1..9faf1ea 100644
--- a/drivers/power/regulator/pca9450.c
+++ b/drivers/power/regulator/pca9450.c
@@ -7,7 +7,6 @@
* ROHM BD71837 regulator driver
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <linux/bitops.h>
diff --git a/drivers/power/regulator/pfuze100.c b/drivers/power/regulator/pfuze100.c
index 1d92668..bf3a701 100644
--- a/drivers/power/regulator/pfuze100.c
+++ b/drivers/power/regulator/pfuze100.c
@@ -5,7 +5,6 @@
* Peng Fan <peng.fan@nxp.com>
*/
-#include <common.h>
#include <fdtdec.h>
#include <errno.h>
#include <dm.h>
diff --git a/drivers/power/regulator/pwm_regulator.c b/drivers/power/regulator/pwm_regulator.c
index ca59f3a..ff738fa 100644
--- a/drivers/power/regulator/pwm_regulator.c
+++ b/drivers/power/regulator/pwm_regulator.c
@@ -7,7 +7,6 @@
* Author: Lee Jones <lee.jones@linaro.org>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <log.h>
diff --git a/drivers/power/regulator/regulator-uclass.c b/drivers/power/regulator/regulator-uclass.c
index 77d101f..66fd531 100644
--- a/drivers/power/regulator/regulator-uclass.c
+++ b/drivers/power/regulator/regulator-uclass.c
@@ -6,7 +6,6 @@
#define LOG_CATEGORY UCLASS_REGULATOR
-#include <common.h>
#include <errno.h>
#include <dm.h>
#include <log.h>
diff --git a/drivers/power/regulator/regulator_common.c b/drivers/power/regulator/regulator_common.c
index 0116fa0..e3565d3 100644
--- a/drivers/power/regulator/regulator_common.c
+++ b/drivers/power/regulator/regulator_common.c
@@ -4,7 +4,6 @@
* Sven Schwermer <sven.svenschwermer@disruptive-technologies.com>
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <asm/gpio.h>
diff --git a/drivers/power/regulator/rk8xx.c b/drivers/power/regulator/rk8xx.c
index 1bd4605..bf3af78 100644
--- a/drivers/power/regulator/rk8xx.c
+++ b/drivers/power/regulator/rk8xx.c
@@ -8,7 +8,6 @@
* zyw <zyw@rock-chips.com>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <log.h>
diff --git a/drivers/power/regulator/s2mps11_regulator.c b/drivers/power/regulator/s2mps11_regulator.c
index 987a1f9..96de550 100644
--- a/drivers/power/regulator/s2mps11_regulator.c
+++ b/drivers/power/regulator/s2mps11_regulator.c
@@ -4,7 +4,6 @@
* Jaehoon Chung <jh80.chung@samsung.com>
*/
-#include <common.h>
#include <fdtdec.h>
#include <errno.h>
#include <dm.h>
diff --git a/drivers/power/regulator/s5m8767.c b/drivers/power/regulator/s5m8767.c
index 2357583..0dcf099 100644
--- a/drivers/power/regulator/s5m8767.c
+++ b/drivers/power/regulator/s5m8767.c
@@ -3,7 +3,6 @@
* Copyright (C) 2015 Google, Inc
*/
-#include <common.h>
#include <fdtdec.h>
#include <errno.h>
#include <dm.h>
diff --git a/drivers/power/regulator/sandbox.c b/drivers/power/regulator/sandbox.c
index 71ef0c5..80a68f5 100644
--- a/drivers/power/regulator/sandbox.c
+++ b/drivers/power/regulator/sandbox.c
@@ -4,7 +4,6 @@
* Przemyslaw Marczak <p.marczak@samsung.com>
*/
-#include <common.h>
#include <fdtdec.h>
#include <errno.h>
#include <dm.h>
diff --git a/drivers/power/regulator/scmi_regulator.c b/drivers/power/regulator/scmi_regulator.c
index 9c72c35..99f6506 100644
--- a/drivers/power/regulator/scmi_regulator.c
+++ b/drivers/power/regulator/scmi_regulator.c
@@ -5,7 +5,6 @@
#define LOG_CATEGORY UCLASS_REGULATOR
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <scmi_agent.h>
diff --git a/drivers/power/regulator/stm32-vrefbuf.c b/drivers/power/regulator/stm32-vrefbuf.c
index c37998a..dd8a33f 100644
--- a/drivers/power/regulator/stm32-vrefbuf.c
+++ b/drivers/power/regulator/stm32-vrefbuf.c
@@ -8,7 +8,6 @@
#define LOG_CATEGORY UCLASS_REGULATOR
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <asm/io.h>
diff --git a/drivers/power/regulator/stpmic1.c b/drivers/power/regulator/stpmic1.c
index 4839d83..b5ffa1c 100644
--- a/drivers/power/regulator/stpmic1.c
+++ b/drivers/power/regulator/stpmic1.c
@@ -4,7 +4,6 @@
* Author: Christophe Kerello <christophe.kerello@st.com>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <linux/delay.h>
diff --git a/drivers/power/regulator/tps62360_regulator.c b/drivers/power/regulator/tps62360_regulator.c
index 7014b19..9acc6b9 100644
--- a/drivers/power/regulator/tps62360_regulator.c
+++ b/drivers/power/regulator/tps62360_regulator.c
@@ -4,7 +4,6 @@
* Tero Kristo <t-kristo@ti.com>
*/
-#include <common.h>
#include <dm.h>
#include <i2c.h>
#include <dm/device_compat.h>
diff --git a/drivers/power/regulator/tps65090_regulator.c b/drivers/power/regulator/tps65090_regulator.c
index fa15e61..2d414de 100644
--- a/drivers/power/regulator/tps65090_regulator.c
+++ b/drivers/power/regulator/tps65090_regulator.c
@@ -3,10 +3,10 @@
* Copyright (c) 2015 Google, Inc
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <log.h>
+#include <time.h>
#include <linux/delay.h>
#include <power/pmic.h>
#include <power/regulator.h>
diff --git a/drivers/power/regulator/tps65219_regulator.c b/drivers/power/regulator/tps65219_regulator.c
index f87d07e..b7124fe 100644
--- a/drivers/power/regulator/tps65219_regulator.c
+++ b/drivers/power/regulator/tps65219_regulator.c
@@ -5,7 +5,6 @@
*
*/
-#include <common.h>
#include <fdtdec.h>
#include <errno.h>
#include <dm.h>
diff --git a/drivers/power/regulator/tps65910_regulator.c b/drivers/power/regulator/tps65910_regulator.c
index a4b9d44..562fd7d 100644
--- a/drivers/power/regulator/tps65910_regulator.c
+++ b/drivers/power/regulator/tps65910_regulator.c
@@ -3,7 +3,6 @@
* Copyright (C) EETS GmbH, 2017, Felix Brack <f.brack@eets.ch>
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <linux/printk.h>
diff --git a/drivers/power/regulator/tps65941_regulator.c b/drivers/power/regulator/tps65941_regulator.c
index b041126..bc4d153 100644
--- a/drivers/power/regulator/tps65941_regulator.c
+++ b/drivers/power/regulator/tps65941_regulator.c
@@ -6,7 +6,6 @@
* Keerthy <j-keerthy@ti.com>
*/
-#include <common.h>
#include <fdtdec.h>
#include <errno.h>
#include <dm.h>
@@ -16,6 +15,38 @@
#include <power/regulator.h>
#include <power/tps65941.h>
+/* Single Phase Buck IDs */
+#define TPS65941_BUCK_ID_1 1
+#define TPS65941_BUCK_ID_2 2
+#define TPS65941_BUCK_ID_3 3
+#define TPS65941_BUCK_ID_4 4
+#define TPS65941_BUCK_ID_5 5
+
+/* Multi Phase Buck IDs */
+#define TPS65941_BUCK_ID_12 12
+#define TPS65941_BUCK_ID_34 34
+#define TPS65941_BUCK_ID_123 123
+#define TPS65941_BUCK_ID_1234 1234
+
+/* LDO IDs */
+#define TPS65941_LDO_ID_1 1
+#define TPS65941_LDO_ID_2 2
+#define TPS65941_LDO_ID_3 3
+#define TPS65941_LDO_ID_4 4
+
+#define TPS65941_BUCK_CONV_OPS_IDX 0
+#define TPS65941_LDO_CONV_OPS_IDX 0
+#define TPS65224_LDO_CONV_OPS_IDX 1
+#define TPS65224_BUCK_CONV_OPS_IDX 1
+
+struct tps65941_reg_conv_ops {
+ int volt_mask;
+ int (*volt2val)(int idx, int uV);
+ int (*val2volt)(int idx, int volt);
+ int slew_mask;
+ int (*lookup_slew)(int id);
+};
+
static const char tps65941_buck_ctrl[TPS65941_BUCK_NUM] = {0x4, 0x6, 0x8, 0xA,
0xC};
static const char tps65941_buck_vout[TPS65941_BUCK_NUM] = {0xE, 0x10, 0x12,
@@ -25,6 +56,11 @@
static const char tps65941_ldo_vout[TPS65941_BUCK_NUM] = {0x23, 0x24, 0x25,
0x26};
+static inline int tps65941_get_chip_id(struct udevice *dev)
+{
+ return dev->parent->driver_data;
+}
+
static int tps65941_buck_enable(struct udevice *dev, int op, bool *enable)
{
int ret;
@@ -60,7 +96,7 @@
return 0;
}
-static int tps65941_buck_volt2val(int uV)
+static int tps65941_buck_volt2val(__maybe_unused int idx, int uV)
{
if (uV > TPS65941_BUCK_VOLT_MAX)
return -EINVAL;
@@ -76,7 +112,7 @@
return -EINVAL;
}
-static int tps65941_buck_val2volt(int val)
+static int tps65941_buck_val2volt(__maybe_unused int idx, int val)
{
if (val > TPS65941_BUCK_VOLT_MAX_HEX)
return -EINVAL;
@@ -116,11 +152,151 @@
}
}
+static int tps65224_buck_volt2val(int idx, int uV)
+{
+ /* This functions maps a value which is in micro Volts to the VSET value.
+ * The mapping is as per the datasheet of TPS65224.
+ */
+
+ if (uV > TPS65224_BUCK_VOLT_MAX)
+ return -EINVAL;
+
+ if (idx > 0) {
+ /* Buck2, Buck3 and Buck4 of TPS65224 has a different schema in
+ * converting b/w micro_volt and VSET hex values
+ *
+ * VSET value starts from 0x00 for 0.5V, and for every increment
+ * in VSET value the output voltage increases by 25mV. This is upto
+ * 1.15V where VSET is 0x1A.
+ *
+ * For 0x1B the output voltage is 1.2V, and for every increment of
+ * VSET the output voltage increases by 50mV upto the max voltage of
+ * 3.3V
+ *
+ * | Voltage Ranges | VSET Ranges | Voltage Step |
+ * +-----------------+--------------+--------------+
+ * | 0.5V to 1.50V | 0x00 to 0x1A | 25mV |
+ * | 1.2V to 3.3V | 0x1B to 0x45 | 50mV |
+ */
+ if (uV >= 1200000)
+ return (uV - 1200000) / 50000 + 0x1B;
+ else if (uV >= 500000)
+ return (uV - 500000) / 25000;
+ else
+ return -EINVAL;
+ }
+
+ /* Buck1 and Buck12(dual phase) has a different mapping b/w output
+ * voltage and VSET value.
+ *
+ * | Voltage Ranges | VSET Ranges | Voltage Step |
+ * +-----------------+--------------+--------------+
+ * | 0.5V to 0.58V | 0xA to 0xE | 20mV |
+ * | 0.6V to 1.095V | 0xF to 0x72 | 5mV |
+ * | 1.1V to 1.65V | 0x73 to 0xAA | 10mV |
+ * | 1.6V to 3.3V | 0xAB to 0xFD | 20mV |
+ *
+ */
+ if (uV >= 1660000)
+ return (uV - 1660000) / 20000 + 0xAB;
+ else if (uV >= 1100000)
+ return (uV - 1100000) / 10000 + 0x73;
+ else if (uV >= 600000)
+ return (uV - 600000) / 5000 + 0x0F;
+ else if (uV >= 500000)
+ return (uV - 500000) / 20000 + 0x0A;
+ else
+ return -EINVAL;
+}
+
+static int tps65224_buck_val2volt(int idx, int val)
+{
+ /* This function does the opposite to the tps65224_buck_volt2val function
+ * described above.
+ * This maps the VSET value to micro volts. Please refer to the ranges
+ * mentioned the comments of tps65224_buck_volt2val.
+ */
+
+ if (idx > 0) {
+ if (val > TPS65224_BUCK234_VOLT_MAX_HEX)
+ return -EINVAL;
+ else if (val >= 0x1B)
+ return 1200000 + (val - 0x1B) * 50000;
+ else if (val >= 0x00)
+ return 500000 + (val - 0x00) * 25000;
+ else
+ return -EINVAL;
+ }
+
+ if (val > TPS65224_BUCK1_VOLT_MAX_HEX)
+ return -EINVAL;
+ else if (val >= 0xAB)
+ return 1660000 + (val - 0xAB) * 20000;
+ else if (val >= 0x73)
+ return 1100000 + (val - 0x73) * 10000;
+ else if (val >= 0xF)
+ return 600000 + (val - 0xF) * 5000;
+ else if (val >= 0xA)
+ return 500000 + (val - 0xA) * 20000;
+ else
+ return -EINVAL;
+}
+
+int tps65224_lookup_slew(int id)
+{
+ switch (id) {
+ case 0:
+ return 10000;
+ case 1:
+ return 5000;
+ case 2:
+ return 2500;
+ case 3:
+ return 1250;
+ default:
+ return -1;
+ }
+}
+
+static const struct tps65941_reg_conv_ops buck_conv_ops[] = {
+ [TPS65941_BUCK_CONV_OPS_IDX] = {
+ .volt_mask = TPS65941_BUCK_VOLT_MASK,
+ .volt2val = tps65941_buck_volt2val,
+ .val2volt = tps65941_buck_val2volt,
+ .slew_mask = TP65941_BUCK_CONF_SLEW_MASK,
+ .lookup_slew = tps65941_lookup_slew,
+ },
+ [TPS65224_BUCK_CONV_OPS_IDX] = {
+ .volt_mask = TPS65941_BUCK_VOLT_MASK,
+ .volt2val = tps65224_buck_volt2val,
+ .val2volt = tps65224_buck_val2volt,
+ .slew_mask = TPS65224_BUCK_CONF_SLEW_MASK,
+ .lookup_slew = tps65224_lookup_slew,
+ },
+};
+
static int tps65941_buck_val(struct udevice *dev, int op, int *uV)
{
unsigned int hex, adr;
- int ret, delta, uwait, slew;
+ int ret, delta, uwait, slew, idx;
struct dm_regulator_uclass_plat *uc_pdata;
+ const struct tps65941_reg_conv_ops *conv_ops;
+ ulong chip_id;
+
+ idx = dev->driver_data;
+ chip_id = tps65941_get_chip_id(dev);
+ if (chip_id == TPS65224) {
+ /* idx is the buck id number as per devicetree node which will be same
+ * as the regulator name in the datasheet.
+ * The idx for buck1. buck2, buck3, buck4, buck12 will be 1, 2, 3, 4
+ * and 12 respectively.
+ * In the driver the numbering is from 0. Hence the -1.
+ */
+ idx = (idx == TPS65941_BUCK_ID_12) ? 0 : (idx - 1);
+ conv_ops = &buck_conv_ops[TPS65224_BUCK_CONV_OPS_IDX];
+ } else {
+ conv_ops = &buck_conv_ops[TPS65941_BUCK_CONV_OPS_IDX];
+ }
uc_pdata = dev_get_uclass_plat(dev);
@@ -133,8 +309,8 @@
if (ret < 0)
return ret;
- ret &= TPS65941_BUCK_VOLT_MASK;
- ret = tps65941_buck_val2volt(ret);
+ ret &= conv_ops->volt_mask;
+ ret = conv_ops->val2volt(idx, ret);
if (ret < 0)
return ret;
@@ -156,14 +332,14 @@
if (slew < 0)
return ret;
- slew &= TP65941_BUCK_CONF_SLEW_MASK;
- slew = tps65941_lookup_slew(slew);
+ slew &= conv_ops->slew_mask;
+ slew = conv_ops->lookup_slew(slew);
if (slew <= 0)
return ret;
uwait = delta / slew;
- hex = tps65941_buck_volt2val(*uV);
+ hex = conv_ops->volt2val(idx, *uV);
if (hex < 0)
return hex;
@@ -212,7 +388,7 @@
return 0;
}
-static int tps65941_ldo_val2volt(int val)
+static int tps65941_ldo_val2volt(__maybe_unused int idx, int val)
{
if (val > TPS65941_LDO_VOLT_MAX_HEX || val < TPS65941_LDO_VOLT_MIN_HEX)
return -EINVAL;
@@ -222,11 +398,98 @@
return -EINVAL;
}
+static int tps65224_ldo_volt2val(int idx, int uV)
+{
+ int base = TPS65224_LDO1_VOLT_MIN;
+ int max = TPS65224_LDO1_VOLT_MAX;
+ int offset = TPS65224_LDO1_VOLT_MIN_HEX;
+ int step = TPS65224_LDO_STEP;
+
+ if (idx > 0) {
+ base = TPS65224_LDO23_VOLT_MIN;
+ max = TPS65224_LDO23_VOLT_MAX;
+ offset = TPS65224_LDO23_VOLT_MIN_HEX;
+ }
+
+ if (uV > max)
+ return -EINVAL;
+ else if (uV >= base)
+ return (uV - base) / step + offset;
+ else
+ return -EINVAL;
+}
+
+static int tps65224_ldo_val2volt(int idx, int val)
+{
+ int reg_base = TPS65224_LDO1_VOLT_MIN_HEX;
+ int reg_max = TPS65224_LDO1_VOLT_MAX_HEX;
+ int base = TPS65224_LDO1_VOLT_MIN;
+ int max = TPS65224_LDO1_VOLT_MAX;
+ int step = TPS65224_LDO_STEP;
+ /* In LDOx_VOUT reg the BIT0 is reserved and the
+ * vout value is stored from BIT1 to BIT7.
+ * Hence the below bit shit is done.
+ */
+ int mask = TPS65224_LDO_VOLT_MASK >> 1;
+
+ if (idx > 0) {
+ base = TPS65224_LDO23_VOLT_MIN;
+ max = TPS65224_LDO23_VOLT_MAX;
+ reg_base = TPS65224_LDO23_VOLT_MIN_HEX;
+ reg_max = TPS65224_LDO23_VOLT_MAX_HEX;
+ }
+
+ /* The VSET register of LDO has its 0th bit as reserved
+ * hence shifting the value to right by 1 bit.
+ */
+ val = val >> 1;
+
+ if (val < 0 || val > mask)
+ return -EINVAL;
+
+ if (val <= reg_base)
+ return base;
+
+ if (val >= reg_max)
+ return max;
+
+ return base + (step * (val - reg_base));
+}
+
+static const struct tps65941_reg_conv_ops ldo_conv_ops[] = {
+ [TPS65941_LDO_CONV_OPS_IDX] = {
+ .volt_mask = TPS65941_LDO_VOLT_MASK,
+ .volt2val = tps65941_buck_volt2val,
+ .val2volt = tps65941_ldo_val2volt,
+ },
+ [TPS65224_LDO_CONV_OPS_IDX] = {
+ .volt_mask = TPS65224_LDO_VOLT_MASK,
+ .volt2val = tps65224_ldo_volt2val,
+ .val2volt = tps65224_ldo_val2volt,
+ },
+};
+
static int tps65941_ldo_val(struct udevice *dev, int op, int *uV)
{
unsigned int hex, adr;
- int ret;
+ int ret, ret_volt, idx;
struct dm_regulator_uclass_plat *uc_pdata;
+ const struct tps65941_reg_conv_ops *conv_ops;
+ ulong chip_id;
+
+ chip_id = tps65941_get_chip_id(dev);
+ idx = dev->driver_data;
+ if (chip_id == TPS65224) {
+ /* idx is the ldo id number as per devicetree node which will be same
+ * as the regulator name in the datasheet.
+ * The idx for ldo1, ldo2, ldo3 will be 1, 2 & 3 respectively.
+ * In the driver the numbering is from 0. Hence the -1.
+ */
+ idx = idx - 1;
+ conv_ops = &ldo_conv_ops[TPS65224_LDO_CONV_OPS_IDX];
+ } else {
+ conv_ops = &ldo_conv_ops[TPS65941_LDO_CONV_OPS_IDX];
+ }
uc_pdata = dev_get_uclass_plat(dev);
@@ -239,22 +502,37 @@
if (ret < 0)
return ret;
- ret &= TPS65941_LDO_VOLT_MASK;
- ret = tps65941_ldo_val2volt(ret);
- if (ret < 0)
- return ret;
+ ret &= conv_ops->volt_mask;
+ ret_volt = conv_ops->val2volt(idx, ret);
+ if (ret_volt < 0)
+ return ret_volt;
if (op == PMIC_OP_GET) {
- *uV = ret;
+ *uV = ret_volt;
return 0;
}
- hex = tps65941_buck_volt2val(*uV);
+ /* TPS65224 LDO1 in BYPASS mode only supports 2.2V min to 3.6V max */
+ if (chip_id == TPS65224 && idx == 0 && (ret & BIT(TPS65224_LDO_BYP_CONFIG)) &&
+ *uV < TPS65224_LDO1_VOLT_BYP_MIN)
+ return -EINVAL;
+
+ /* TPS65224 LDO2 & LDO3 in BYPASS mode supports 1.5V min to 5.5V max */
+ if (chip_id == TPS65224 && idx > 0 && (ret & BIT(TPS65224_LDO_BYP_CONFIG)) &&
+ *uV < TPS65224_LDO23_VOLT_BYP_MIN)
+ return -EINVAL;
+
+ hex = conv_ops->volt2val(idx, *uV);
if (hex < 0)
return hex;
- ret &= 0x0;
- ret = hex;
+ if (chip_id == TPS65224) {
+ hex = hex << TPS65941_LDO_MODE_MASK;
+ ret &= ~TPS65224_LDO_VOLT_MASK;
+ ret |= hex;
+ } else {
+ ret = hex;
+ }
ret = pmic_reg_write(dev->parent, adr, ret);
@@ -265,15 +543,27 @@
{
struct dm_regulator_uclass_plat *uc_pdata;
int idx;
+ ulong chip_id;
+
+ chip_id = tps65941_get_chip_id(dev);
uc_pdata = dev_get_uclass_plat(dev);
uc_pdata->type = REGULATOR_TYPE_LDO;
idx = dev->driver_data;
- if (idx == 1 || idx == 2 || idx == 3 || idx == 4) {
+ switch (idx) {
+ case TPS65941_LDO_ID_1:
+ case TPS65941_LDO_ID_2:
+ case TPS65941_LDO_ID_3:
debug("Single phase regulator\n");
- } else {
- printf("Wrong ID for regulator\n");
+ break;
+ case TPS65941_LDO_ID_4:
+ if (chip_id != TPS65224) {
+ debug("Single phase regulator\n");
+ break;
+ }
+ default:
+ pr_err("Wrong ID for regulator\n");
return -EINVAL;
}
@@ -287,23 +577,51 @@
{
struct dm_regulator_uclass_plat *uc_pdata;
int idx;
+ ulong chip_id;
+
+ chip_id = tps65941_get_chip_id(dev);
uc_pdata = dev_get_uclass_plat(dev);
uc_pdata->type = REGULATOR_TYPE_BUCK;
idx = dev->driver_data;
- if (idx == 1 || idx == 2 || idx == 3 || idx == 4 || idx == 5) {
+ switch (idx) {
+ case TPS65941_BUCK_ID_1:
+ case TPS65941_BUCK_ID_2:
+ case TPS65941_BUCK_ID_3:
+ case TPS65941_BUCK_ID_4:
debug("Single phase regulator\n");
- } else if (idx == 12) {
+ break;
+ case TPS65941_BUCK_ID_5:
+ if (chip_id != TPS65224) {
+ debug("Single phase regulator\n");
+ } else {
+ pr_err("Wrong ID for regulator\n");
+ return -EINVAL;
+ }
+ break;
+ case TPS65941_BUCK_ID_12:
idx = 1;
- } else if (idx == 34) {
- idx = 3;
- } else if (idx == 123) {
- idx = 1;
- } else if (idx == 1234) {
- idx = 1;
- } else {
- printf("Wrong ID for regulator\n");
+ break;
+ case TPS65941_BUCK_ID_123:
+ case TPS65941_BUCK_ID_1234:
+ if (chip_id != TPS65224) {
+ idx = 1;
+ } else {
+ pr_err("Wrong ID for regulator\n");
+ return -EINVAL;
+ }
+ break;
+ case TPS65941_BUCK_ID_34:
+ if (chip_id != TPS65224) {
+ idx = 3;
+ } else {
+ pr_err("Wrong ID for regulator\n");
+ return -EINVAL;
+ }
+ break;
+ default:
+ pr_err("Wrong ID for regulator\n");
return -EINVAL;
}
diff --git a/drivers/power/sy8106a.c b/drivers/power/sy8106a.c
index 45f4793..fb6028d 100644
--- a/drivers/power/sy8106a.c
+++ b/drivers/power/sy8106a.c
@@ -3,7 +3,6 @@
* (C) Copyright 2016
* Jelle van der Waa <jelle@vdwaa.nl>
*/
-#include <common.h>
#include <i2c.h>
#include <sy8106a.h>
diff --git a/drivers/power/tps6586x.c b/drivers/power/tps6586x.c
index 37f1c45..4034a9b 100644
--- a/drivers/power/tps6586x.c
+++ b/drivers/power/tps6586x.c
@@ -4,12 +4,12 @@
* (C) Copyright 2010,2011 NVIDIA Corporation <www.nvidia.com>
*/
-#include <common.h>
#include <log.h>
#include <tps6586x.h>
#include <asm/io.h>
#include <i2c.h>
#include <linux/delay.h>
+#include <linux/errno.h>
static struct udevice *tps6586x_dev;
diff --git a/drivers/pwm/cros_ec_pwm.c b/drivers/pwm/cros_ec_pwm.c
index 4a39c31..b89f00f 100644
--- a/drivers/pwm/cros_ec_pwm.c
+++ b/drivers/pwm/cros_ec_pwm.c
@@ -1,6 +1,5 @@
// SPDX-License-Identifier: GPL-2.0+
-#include <common.h>
#include <cros_ec.h>
#include <dm.h>
#include <errno.h>
diff --git a/drivers/pwm/exynos_pwm.c b/drivers/pwm/exynos_pwm.c
index 609025d..5ded609 100644
--- a/drivers/pwm/exynos_pwm.c
+++ b/drivers/pwm/exynos_pwm.c
@@ -3,7 +3,6 @@
* Copyright 2016 Google Inc.
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <pwm.h>
diff --git a/drivers/pwm/pwm-aspeed.c b/drivers/pwm/pwm-aspeed.c
index b03472d..ebc9d9a 100644
--- a/drivers/pwm/pwm-aspeed.c
+++ b/drivers/pwm/pwm-aspeed.c
@@ -38,7 +38,6 @@
* This improvement can disable/enable through PWM_ASPEED_CTRL_DUTY_SYNC_DISABLE.
*/
-#include <common.h>
#include <div64.h>
#include <dm.h>
#include <pwm.h>
diff --git a/drivers/pwm/pwm-at91.c b/drivers/pwm/pwm-at91.c
index 3ff1fb6..ffc3718 100644
--- a/drivers/pwm/pwm-at91.c
+++ b/drivers/pwm/pwm-at91.c
@@ -9,7 +9,6 @@
* Based on drivers/pwm/pwm-atmel.c from Linux.
*/
#include <clk.h>
-#include <common.h>
#include <div64.h>
#include <dm.h>
#include <linux/bitops.h>
diff --git a/drivers/pwm/pwm-cadence-ttc.c b/drivers/pwm/pwm-cadence-ttc.c
index d9f6736..7676288 100644
--- a/drivers/pwm/pwm-cadence-ttc.c
+++ b/drivers/pwm/pwm-cadence-ttc.c
@@ -6,7 +6,6 @@
#define LOG_CATEGORY UCLASS_PWM
#include <clk.h>
-#include <common.h>
#include <div64.h>
#include <dm.h>
#include <log.h>
diff --git a/drivers/pwm/pwm-imx.c b/drivers/pwm/pwm-imx.c
index 8fbb40c..320ea7c 100644
--- a/drivers/pwm/pwm-imx.c
+++ b/drivers/pwm/pwm-imx.c
@@ -6,7 +6,6 @@
* Basic support for the pwm module on imx6.
*/
-#include <common.h>
#include <div64.h>
#include <dm.h>
#include <log.h>
diff --git a/drivers/pwm/pwm-meson.c b/drivers/pwm/pwm-meson.c
index 6095972..c2597d8 100644
--- a/drivers/pwm/pwm-meson.c
+++ b/drivers/pwm/pwm-meson.c
@@ -16,7 +16,6 @@
* current period to complete first).
*/
-#include <common.h>
#include <clk.h>
#include <div64.h>
#include <dm.h>
diff --git a/drivers/pwm/pwm-mtk.c b/drivers/pwm/pwm-mtk.c
index ad845ed..9776a41 100644
--- a/drivers/pwm/pwm-mtk.c
+++ b/drivers/pwm/pwm-mtk.c
@@ -5,7 +5,6 @@
* Author: Sam Shih <sam.shih@mediatek.com>
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <pwm.h>
diff --git a/drivers/pwm/pwm-sifive.c b/drivers/pwm/pwm-sifive.c
index b9813a3..e9777c7 100644
--- a/drivers/pwm/pwm-sifive.c
+++ b/drivers/pwm/pwm-sifive.c
@@ -12,7 +12,6 @@
* - The hardware generates only inverted output.
*/
-#include <common.h>
#include <clk.h>
#include <div64.h>
#include <dm.h>
diff --git a/drivers/pwm/pwm-ti-ehrpwm.c b/drivers/pwm/pwm-ti-ehrpwm.c
index fefa3c6..563109e 100644
--- a/drivers/pwm/pwm-ti-ehrpwm.c
+++ b/drivers/pwm/pwm-ti-ehrpwm.c
@@ -7,7 +7,6 @@
* Based on Linux kernel drivers/pwm/pwm-tiehrpwm.c
*/
-#include <common.h>
#include <clk.h>
#include <div64.h>
#include <dm.h>
diff --git a/drivers/pwm/pwm-uclass.c b/drivers/pwm/pwm-uclass.c
index 648d075..6543db1 100644
--- a/drivers/pwm/pwm-uclass.c
+++ b/drivers/pwm/pwm-uclass.c
@@ -6,7 +6,6 @@
#define LOG_CATEGORY UCLASS_PWM
-#include <common.h>
#include <dm.h>
#include <pwm.h>
diff --git a/drivers/pwm/rk_pwm.c b/drivers/pwm/rk_pwm.c
index 1858d59..0a64eb0 100644
--- a/drivers/pwm/rk_pwm.c
+++ b/drivers/pwm/rk_pwm.c
@@ -4,7 +4,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <clk.h>
#include <div64.h>
#include <dm.h>
diff --git a/drivers/pwm/sandbox_pwm.c b/drivers/pwm/sandbox_pwm.c
index 4df15f0..0d79860 100644
--- a/drivers/pwm/sandbox_pwm.c
+++ b/drivers/pwm/sandbox_pwm.c
@@ -4,7 +4,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <pwm.h>
diff --git a/drivers/pwm/sunxi_pwm.c b/drivers/pwm/sunxi_pwm.c
index bb1bec0..2140a05 100644
--- a/drivers/pwm/sunxi_pwm.c
+++ b/drivers/pwm/sunxi_pwm.c
@@ -3,7 +3,6 @@
* Copyright (c) 2017-2018 Vasily Khoruzhick <anarsoul@gmail.com>
*/
-#include <common.h>
#include <div64.h>
#include <dm.h>
#include <log.h>
diff --git a/drivers/pwm/tegra_pwm.c b/drivers/pwm/tegra_pwm.c
index 8703470..e3f1417 100644
--- a/drivers/pwm/tegra_pwm.c
+++ b/drivers/pwm/tegra_pwm.c
@@ -3,7 +3,6 @@
* Copyright 2016 Google Inc.
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <pwm.h>
diff --git a/drivers/ram/aspeed/sdram_ast2500.c b/drivers/ram/aspeed/sdram_ast2500.c
index dc466a8..0d6ab79 100644
--- a/drivers/ram/aspeed/sdram_ast2500.c
+++ b/drivers/ram/aspeed/sdram_ast2500.c
@@ -5,7 +5,7 @@
* Copyright 2016 Google, Inc
*/
-#include <common.h>
+#include <config.h>
#include <clk.h>
#include <dm.h>
#include <errno.h>
diff --git a/drivers/ram/aspeed/sdram_ast2600.c b/drivers/ram/aspeed/sdram_ast2600.c
index d463933..55e80fb 100644
--- a/drivers/ram/aspeed/sdram_ast2600.c
+++ b/drivers/ram/aspeed/sdram_ast2600.c
@@ -2,7 +2,7 @@
/*
* Copyright (C) ASPEED Technology Inc.
*/
-#include <common.h>
+#include <config.h>
#include <clk.h>
#include <dm.h>
#include <errno.h>
diff --git a/drivers/ram/bmips_ram.c b/drivers/ram/bmips_ram.c
index 9804524..760bebd 100644
--- a/drivers/ram/bmips_ram.c
+++ b/drivers/ram/bmips_ram.c
@@ -7,7 +7,6 @@
* Copyright (C) 2009 Florian Fainelli <florian@openwrt.org>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <init.h>
diff --git a/drivers/ram/cadence/ddr_ctrl.c b/drivers/ram/cadence/ddr_ctrl.c
index 3e5959a..0fa60e7 100644
--- a/drivers/ram/cadence/ddr_ctrl.c
+++ b/drivers/ram/cadence/ddr_ctrl.c
@@ -24,7 +24,6 @@
* bandwidth allocated to each AXI slave can be set.
*/
-#include <common.h>
#include <linux/delay.h>
#include <linux/sizes.h>
#include <asm/io.h>
diff --git a/drivers/ram/imxrt_sdram.c b/drivers/ram/imxrt_sdram.c
index 6a15242..3df106c 100644
--- a/drivers/ram/imxrt_sdram.c
+++ b/drivers/ram/imxrt_sdram.c
@@ -4,7 +4,6 @@
* Author(s): Giulio Benetti <giulio.benetti@benettiengineering.com>
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <dm/device_compat.h>
diff --git a/drivers/ram/k3-am654-ddrss.c b/drivers/ram/k3-am654-ddrss.c
index cff8ffc..21ff9d7 100644
--- a/drivers/ram/k3-am654-ddrss.c
+++ b/drivers/ram/k3-am654-ddrss.c
@@ -6,7 +6,6 @@
* Lokesh Vutla <lokeshvutla@ti.com>
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <log.h>
diff --git a/drivers/ram/k3-ddrss/k3-ddrss.c b/drivers/ram/k3-ddrss/k3-ddrss.c
index a5c9b82..525b6d5 100644
--- a/drivers/ram/k3-ddrss/k3-ddrss.c
+++ b/drivers/ram/k3-ddrss/k3-ddrss.c
@@ -5,7 +5,6 @@
* Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/
*/
-#include <common.h>
#include <config.h>
#include <clk.h>
#include <div64.h>
diff --git a/drivers/ram/mediatek/ddr3-mt7629.c b/drivers/ram/mediatek/ddr3-mt7629.c
index f65fcf1..c27c459 100644
--- a/drivers/ram/mediatek/ddr3-mt7629.c
+++ b/drivers/ram/mediatek/ddr3-mt7629.c
@@ -8,7 +8,7 @@
*/
#include <clk.h>
-#include <common.h>
+#include <config.h>
#include <dm.h>
#include <ram.h>
#include <asm/io.h>
diff --git a/drivers/ram/mpc83xx_sdram.c b/drivers/ram/mpc83xx_sdram.c
index 11676d4..28a6632 100644
--- a/drivers/ram/mpc83xx_sdram.c
+++ b/drivers/ram/mpc83xx_sdram.c
@@ -4,7 +4,6 @@
* Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc
*/
-#include <common.h>
#include <dm.h>
#include <init.h>
#include <log.h>
diff --git a/drivers/ram/ram-uclass.c b/drivers/ram/ram-uclass.c
index 4e21240..a33d583 100644
--- a/drivers/ram/ram-uclass.c
+++ b/drivers/ram/ram-uclass.c
@@ -6,7 +6,6 @@
#define LOG_CATEGORY UCLASS_RAM
-#include <common.h>
#include <ram.h>
#include <dm.h>
#include <errno.h>
diff --git a/drivers/ram/renesas/rzn1/ddr_async.c b/drivers/ram/renesas/rzn1/ddr_async.c
index 7a81497..4d470aa 100644
--- a/drivers/ram/renesas/rzn1/ddr_async.c
+++ b/drivers/ram/renesas/rzn1/ddr_async.c
@@ -7,7 +7,6 @@
*
* Copyright (C) 2015 Renesas Electronics Europe Ltd
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <dm/device_compat.h>
diff --git a/drivers/ram/rockchip/dmc-rk3368.c b/drivers/ram/rockchip/dmc-rk3368.c
index 5279bf0..42114a5 100644
--- a/drivers/ram/rockchip/dmc-rk3368.c
+++ b/drivers/ram/rockchip/dmc-rk3368.c
@@ -3,7 +3,7 @@
* (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
*/
-#include <common.h>
+#include <config.h>
#include <clk.h>
#include <dm.h>
#include <hang.h>
diff --git a/drivers/ram/rockchip/sdram_common.c b/drivers/ram/rockchip/sdram_common.c
index 60fc90d..b7a8fce 100644
--- a/drivers/ram/rockchip/sdram_common.c
+++ b/drivers/ram/rockchip/sdram_common.c
@@ -3,7 +3,7 @@
* (C) Copyright 2018 Rockchip Electronics Co., Ltd.
*/
-#include <common.h>
+#include <config.h>
#include <debug_uart.h>
#include <ram.h>
#include <asm/io.h>
diff --git a/drivers/ram/rockchip/sdram_pctl_px30.c b/drivers/ram/rockchip/sdram_pctl_px30.c
index e5c80fb..3ec98af 100644
--- a/drivers/ram/rockchip/sdram_pctl_px30.c
+++ b/drivers/ram/rockchip/sdram_pctl_px30.c
@@ -3,7 +3,6 @@
* (C) Copyright 2018 Rockchip Electronics Co., Ltd.
*/
-#include <common.h>
#include <ram.h>
#include <asm/io.h>
#include <asm/arch-rockchip/sdram.h>
diff --git a/drivers/ram/rockchip/sdram_phy_px30.c b/drivers/ram/rockchip/sdram_phy_px30.c
index f7f6de1..5416eef 100644
--- a/drivers/ram/rockchip/sdram_phy_px30.c
+++ b/drivers/ram/rockchip/sdram_phy_px30.c
@@ -3,7 +3,6 @@
* (C) Copyright 2018 Rockchip Electronics Co., Ltd.
*/
-#include <common.h>
#include <ram.h>
#include <asm/io.h>
#include <asm/arch-rockchip/sdram.h>
diff --git a/drivers/ram/rockchip/sdram_px30.c b/drivers/ram/rockchip/sdram_px30.c
index 21498e8..37e6212 100644
--- a/drivers/ram/rockchip/sdram_px30.c
+++ b/drivers/ram/rockchip/sdram_px30.c
@@ -3,7 +3,7 @@
* (C) Copyright 2018 Rockchip Electronics Co., Ltd.
*/
-#include <common.h>
+#include <config.h>
#include <debug_uart.h>
#include <dm.h>
#include <init.h>
diff --git a/drivers/ram/rockchip/sdram_rk3066.c b/drivers/ram/rockchip/sdram_rk3066.c
index 562cf54..a280e2d 100644
--- a/drivers/ram/rockchip/sdram_rk3066.c
+++ b/drivers/ram/rockchip/sdram_rk3066.c
@@ -6,7 +6,7 @@
* Adapted from the very similar rk3188 ddr init.
*/
-#include <common.h>
+#include <config.h>
#include <clk.h>
#include <dm.h>
#include <dt-structs.h>
diff --git a/drivers/ram/rockchip/sdram_rk3128.c b/drivers/ram/rockchip/sdram_rk3128.c
index ded6539..66611f8 100644
--- a/drivers/ram/rockchip/sdram_rk3128.c
+++ b/drivers/ram/rockchip/sdram_rk3128.c
@@ -3,7 +3,7 @@
* (C) Copyright 2017 Rockchip Electronics Co., Ltd.
*/
-#include <common.h>
+#include <config.h>
#include <dm.h>
#include <log.h>
#include <ram.h>
diff --git a/drivers/ram/rockchip/sdram_rk3188.c b/drivers/ram/rockchip/sdram_rk3188.c
index e1b28c6..618bce5 100644
--- a/drivers/ram/rockchip/sdram_rk3188.c
+++ b/drivers/ram/rockchip/sdram_rk3188.c
@@ -6,7 +6,7 @@
* Adapted from the very similar rk3288 ddr init.
*/
-#include <common.h>
+#include <config.h>
#include <clk.h>
#include <dm.h>
#include <dt-structs.h>
diff --git a/drivers/ram/rockchip/sdram_rk322x.c b/drivers/ram/rockchip/sdram_rk322x.c
index 5fc23c1..a48a509 100644
--- a/drivers/ram/rockchip/sdram_rk322x.c
+++ b/drivers/ram/rockchip/sdram_rk322x.c
@@ -2,7 +2,7 @@
/*
* (C) Copyright 2017 Rockchip Electronics Co., Ltd
*/
-#include <common.h>
+#include <config.h>
#include <clk.h>
#include <dm.h>
#include <dt-structs.h>
diff --git a/drivers/ram/rockchip/sdram_rk3288.c b/drivers/ram/rockchip/sdram_rk3288.c
index 242d564..c9f61e9 100644
--- a/drivers/ram/rockchip/sdram_rk3288.c
+++ b/drivers/ram/rockchip/sdram_rk3288.c
@@ -6,7 +6,7 @@
* Adapted from coreboot.
*/
-#include <common.h>
+#include <config.h>
#include <clk.h>
#include <dm.h>
#include <dt-structs.h>
diff --git a/drivers/ram/rockchip/sdram_rk3308.c b/drivers/ram/rockchip/sdram_rk3308.c
index 10828e8..8071997 100644
--- a/drivers/ram/rockchip/sdram_rk3308.c
+++ b/drivers/ram/rockchip/sdram_rk3308.c
@@ -3,12 +3,12 @@
* (C) Copyright 2019 Rockchip Electronics Co., Ltd.
*/
-#include <common.h>
+#include <config.h>
#include <dm.h>
#include <ram.h>
#include <syscon.h>
-#include <asm/arch/grf_rk3308.h>
#include <asm/arch-rockchip/clock.h>
+#include <asm/arch-rockchip/grf_rk3308.h>
#include <asm/arch-rockchip/sdram.h>
struct dram_info {
diff --git a/drivers/ram/rockchip/sdram_rk3328.c b/drivers/ram/rockchip/sdram_rk3328.c
index b5ca8ca..99690d6 100644
--- a/drivers/ram/rockchip/sdram_rk3328.c
+++ b/drivers/ram/rockchip/sdram_rk3328.c
@@ -2,7 +2,7 @@
/*
* (C) Copyright 2017 Rockchip Electronics Co., Ltd.
*/
-#include <common.h>
+#include <config.h>
#include <clk.h>
#include <debug_uart.h>
#include <dm.h>
diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c
index 02cc4a3..ef9a182 100644
--- a/drivers/ram/rockchip/sdram_rk3399.c
+++ b/drivers/ram/rockchip/sdram_rk3399.c
@@ -5,7 +5,7 @@
* Adapted from coreboot.
*/
-#include <common.h>
+#include <config.h>
#include <clk.h>
#include <dm.h>
#include <dt-structs.h>
diff --git a/drivers/ram/rockchip/sdram_rk3568.c b/drivers/ram/rockchip/sdram_rk3568.c
index f661615..a252d5c 100644
--- a/drivers/ram/rockchip/sdram_rk3568.c
+++ b/drivers/ram/rockchip/sdram_rk3568.c
@@ -3,7 +3,7 @@
* (C) Copyright 2021 Rockchip Electronics Co., Ltd.
*/
-#include <common.h>
+#include <config.h>
#include <dm.h>
#include <ram.h>
#include <syscon.h>
diff --git a/drivers/ram/rockchip/sdram_rk3588.c b/drivers/ram/rockchip/sdram_rk3588.c
index cf56e2a..a144b43 100644
--- a/drivers/ram/rockchip/sdram_rk3588.c
+++ b/drivers/ram/rockchip/sdram_rk3588.c
@@ -3,7 +3,7 @@
* (C) Copyright 2021 Rockchip Electronics Co., Ltd.
*/
-#include <common.h>
+#include <config.h>
#include <dm.h>
#include <ram.h>
#include <syscon.h>
diff --git a/drivers/ram/rockchip/sdram_rv1126.c b/drivers/ram/rockchip/sdram_rv1126.c
index 849e15a..4fbb088 100644
--- a/drivers/ram/rockchip/sdram_rv1126.c
+++ b/drivers/ram/rockchip/sdram_rv1126.c
@@ -4,7 +4,7 @@
* Copyright (c) 2022 Edgeble AI Technologies Pvt. Ltd.
*/
-#include <common.h>
+#include <config.h>
#include <debug_uart.h>
#include <dm.h>
#include <ram.h>
diff --git a/drivers/ram/sandbox_ram.c b/drivers/ram/sandbox_ram.c
index 910dce6..2097da5 100644
--- a/drivers/ram/sandbox_ram.c
+++ b/drivers/ram/sandbox_ram.c
@@ -4,7 +4,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <ram.h>
diff --git a/drivers/ram/sifive/sifive_ddr.c b/drivers/ram/sifive/sifive_ddr.c
index 4bd69a6..bd2f438 100644
--- a/drivers/ram/sifive/sifive_ddr.c
+++ b/drivers/ram/sifive/sifive_ddr.c
@@ -6,7 +6,6 @@
* Pragnesh Patel <pragnesh.patel@sifive.com>
*/
-#include <common.h>
#include <dm.h>
#include <fdtdec.h>
#include <init.h>
diff --git a/drivers/ram/starfive/ddrcsr_boot.c b/drivers/ram/starfive/ddrcsr_boot.c
index f2dd55f..6764b3e 100644
--- a/drivers/ram/starfive/ddrcsr_boot.c
+++ b/drivers/ram/starfive/ddrcsr_boot.c
@@ -4,7 +4,6 @@
* Author: Yanhong Wang<yanhong.wang@starfivetech.com>
*/
-#include <common.h>
#include <asm/io.h>
#include <asm/arch/regs.h>
#include <linux/delay.h>
diff --git a/drivers/ram/starfive/ddrphy_start.c b/drivers/ram/starfive/ddrphy_start.c
index 479b6ef..efe3f8a 100644
--- a/drivers/ram/starfive/ddrphy_start.c
+++ b/drivers/ram/starfive/ddrphy_start.c
@@ -4,7 +4,6 @@
* Author: Yanhong Wang<yanhong.wang@starfivetech.com>
*/
-#include <common.h>
#include <asm/io.h>
#include "starfive_ddr.h"
diff --git a/drivers/ram/starfive/ddrphy_train.c b/drivers/ram/starfive/ddrphy_train.c
index 0740f49..0aff1e8 100644
--- a/drivers/ram/starfive/ddrphy_train.c
+++ b/drivers/ram/starfive/ddrphy_train.c
@@ -4,7 +4,7 @@
* Author: Yanhong Wang<yanhong.wang@starfivetech.com>
*/
-#include <common.h>
+#include <linux/kernel.h>
#include <asm/io.h>
static const u32 ddr_train_data[] = {
diff --git a/drivers/ram/starfive/ddrphy_utils.c b/drivers/ram/starfive/ddrphy_utils.c
index 1c9fe0a..d6dd6ee 100644
--- a/drivers/ram/starfive/ddrphy_utils.c
+++ b/drivers/ram/starfive/ddrphy_utils.c
@@ -4,7 +4,7 @@
* Author: Yanhong Wang<yanhong.wang@starfivetech.com>
*/
-#include <common.h>
+#include <linux/kernel.h>
#include <asm/io.h>
static const u32 ddr_phy_data[] = {
diff --git a/drivers/ram/starfive/starfive_ddr.c b/drivers/ram/starfive/starfive_ddr.c
index a0a3d6b..b31ed3b 100644
--- a/drivers/ram/starfive/starfive_ddr.c
+++ b/drivers/ram/starfive/starfive_ddr.c
@@ -4,7 +4,6 @@
* Author: Yanhong Wang<yanhong.wang@starfivetech.com>
*/
-#include <common.h>
#include <asm/arch/regs.h>
#include <asm/io.h>
#include <clk.h>
diff --git a/drivers/ram/starfive/starfive_ddr.h b/drivers/ram/starfive/starfive_ddr.h
index d0ec1c1..c29d26b 100644
--- a/drivers/ram/starfive/starfive_ddr.h
+++ b/drivers/ram/starfive/starfive_ddr.h
@@ -7,6 +7,8 @@
#ifndef __STARFIVE_DDR_H__
#define __STARFIVE_DDR_H__
+#include <linux/kernel.h>
+
#define SEC_CTRL_ADDR 0x1000
#define PHY_BASE_ADDR 0x800
#define PHY_AC_BASE_ADDR 0x1000
diff --git a/drivers/ram/stm32_sdram.c b/drivers/ram/stm32_sdram.c
index 891f413..10dc05d 100644
--- a/drivers/ram/stm32_sdram.c
+++ b/drivers/ram/stm32_sdram.c
@@ -6,7 +6,6 @@
#define LOG_CATEGORY UCLASS_RAM
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <init.h>
diff --git a/drivers/ram/stm32mp1/stm32mp1_ddr.c b/drivers/ram/stm32mp1/stm32mp1_ddr.c
index 8ee4e24..d7834b3 100644
--- a/drivers/ram/stm32mp1/stm32mp1_ddr.c
+++ b/drivers/ram/stm32mp1/stm32mp1_ddr.c
@@ -5,7 +5,6 @@
#define LOG_CATEGORY UCLASS_RAM
-#include <common.h>
#include <clk.h>
#include <log.h>
#include <ram.h>
diff --git a/drivers/ram/stm32mp1/stm32mp1_interactive.c b/drivers/ram/stm32mp1/stm32mp1_interactive.c
index 2c19847..6340afb 100644
--- a/drivers/ram/stm32mp1/stm32mp1_interactive.c
+++ b/drivers/ram/stm32mp1/stm32mp1_interactive.c
@@ -5,7 +5,6 @@
#define LOG_CATEGORY UCLASS_RAM
-#include <common.h>
#include <command.h>
#include <console.h>
#include <cli.h>
diff --git a/drivers/ram/stm32mp1/stm32mp1_ram.c b/drivers/ram/stm32mp1/stm32mp1_ram.c
index a82b1db..debc458 100644
--- a/drivers/ram/stm32mp1/stm32mp1_ram.c
+++ b/drivers/ram/stm32mp1/stm32mp1_ram.c
@@ -5,7 +5,6 @@
#define LOG_CATEGORY UCLASS_RAM
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <init.h>
diff --git a/drivers/ram/stm32mp1/stm32mp1_tests.c b/drivers/ram/stm32mp1/stm32mp1_tests.c
index c5f3354..6108faa 100644
--- a/drivers/ram/stm32mp1/stm32mp1_tests.c
+++ b/drivers/ram/stm32mp1/stm32mp1_tests.c
@@ -5,7 +5,6 @@
#define LOG_CATEGORY UCLASS_RAM
-#include <common.h>
#include <console.h>
#include <init.h>
#include <log.h>
diff --git a/drivers/ram/sunxi/dram_sun20i_d1.c b/drivers/ram/sunxi/dram_sun20i_d1.c
index 3837928..a179403 100644
--- a/drivers/ram/sunxi/dram_sun20i_d1.c
+++ b/drivers/ram/sunxi/dram_sun20i_d1.c
@@ -13,7 +13,7 @@
*/
#include <asm/io.h>
-#include <common.h>
+#include <config.h>
#ifdef CONFIG_RAM
#include <dm.h>
#include <ram.h>
diff --git a/drivers/reboot-mode/Kconfig b/drivers/reboot-mode/Kconfig
index d57baac..bb51893 100644
--- a/drivers/reboot-mode/Kconfig
+++ b/drivers/reboot-mode/Kconfig
@@ -24,6 +24,7 @@
config DM_REBOOT_MODE_RTC
bool "Use RTC as reboot mode backend"
+ depends on DM_RTC
depends on DM_REBOOT_MODE
help
Use RTC non volatile memory to control the reboot mode. This will allow users to boot
diff --git a/drivers/reboot-mode/reboot-mode-gpio.c b/drivers/reboot-mode/reboot-mode-gpio.c
index 3051747..22ee40c 100644
--- a/drivers/reboot-mode/reboot-mode-gpio.c
+++ b/drivers/reboot-mode/reboot-mode-gpio.c
@@ -3,7 +3,6 @@
* Copyright (c), Vaisala Oyj
*/
-#include <common.h>
#include <asm/gpio.h>
#include <dm.h>
#include <dm/devres.h>
diff --git a/drivers/reboot-mode/reboot-mode-nvmem.c b/drivers/reboot-mode/reboot-mode-nvmem.c
index da41ca4..b9af242 100644
--- a/drivers/reboot-mode/reboot-mode-nvmem.c
+++ b/drivers/reboot-mode/reboot-mode-nvmem.c
@@ -3,7 +3,6 @@
* Copyright (C) 2022 Sean Anderson <sean.anderson@seco.com>
*/
-#include <common.h>
#include <dm.h>
#include <nvmem.h>
#include <reboot-mode/reboot-mode.h>
diff --git a/drivers/reboot-mode/reboot-mode-rtc.c b/drivers/reboot-mode/reboot-mode-rtc.c
index 972d0cd..4f4ad63 100644
--- a/drivers/reboot-mode/reboot-mode-rtc.c
+++ b/drivers/reboot-mode/reboot-mode-rtc.c
@@ -3,7 +3,6 @@
* Copyright (c), Vaisala Oyj
*/
-#include <common.h>
#include <dm.h>
#include <dm/device_compat.h>
#include <reboot-mode/reboot-mode-rtc.h>
diff --git a/drivers/reboot-mode/reboot-mode-uclass.c b/drivers/reboot-mode/reboot-mode-uclass.c
index 2b38aa2..7cbe02e 100644
--- a/drivers/reboot-mode/reboot-mode-uclass.c
+++ b/drivers/reboot-mode/reboot-mode-uclass.c
@@ -3,7 +3,6 @@
* Copyright (c), Vaisala Oyj
*/
-#include <common.h>
#include <dm.h>
#include <dm/device_compat.h>
#include <dm/devres.h>
diff --git a/drivers/remoteproc/ipu_rproc.c b/drivers/remoteproc/ipu_rproc.c
index 996e658..2ca78b5 100644
--- a/drivers/remoteproc/ipu_rproc.c
+++ b/drivers/remoteproc/ipu_rproc.c
@@ -8,7 +8,6 @@
* Keerthy <j-keerthy@ti.com>
*/
-#include <common.h>
#include <hang.h>
#include <cpu_func.h>
#include <dm.h>
diff --git a/drivers/remoteproc/k3_system_controller.c b/drivers/remoteproc/k3_system_controller.c
index 071de40..71238a6 100644
--- a/drivers/remoteproc/k3_system_controller.c
+++ b/drivers/remoteproc/k3_system_controller.c
@@ -6,7 +6,6 @@
* Lokesh Vutla <lokeshvutla@ti.com>
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <remoteproc.h>
diff --git a/drivers/remoteproc/pru_rproc.c b/drivers/remoteproc/pru_rproc.c
index 6ec55e2..115c342 100644
--- a/drivers/remoteproc/pru_rproc.c
+++ b/drivers/remoteproc/pru_rproc.c
@@ -6,7 +6,6 @@
* Keerthy <j-keerthy@ti.com>
*/
-#include <common.h>
#include <dm.h>
#include <elf.h>
#include <dm/of_access.h>
diff --git a/drivers/remoteproc/rproc-elf-loader.c b/drivers/remoteproc/rproc-elf-loader.c
index 5e070e5..ab1836b 100644
--- a/drivers/remoteproc/rproc-elf-loader.c
+++ b/drivers/remoteproc/rproc-elf-loader.c
@@ -2,7 +2,6 @@
/*
* Copyright (C) 2019, STMicroelectronics - All Rights Reserved
*/
-#include <common.h>
#include <cpu_func.h>
#include <dm.h>
#include <elf.h>
diff --git a/drivers/remoteproc/rproc-uclass.c b/drivers/remoteproc/rproc-uclass.c
index aa7f758..3ba2b40 100644
--- a/drivers/remoteproc/rproc-uclass.c
+++ b/drivers/remoteproc/rproc-uclass.c
@@ -7,7 +7,6 @@
#define LOG_CATEGORY UCLASS_REMOTEPROC
#define pr_fmt(fmt) "%s: " fmt, __func__
-#include <common.h>
#include <elf.h>
#include <errno.h>
#include <log.h>
diff --git a/drivers/remoteproc/sandbox_testproc.c b/drivers/remoteproc/sandbox_testproc.c
index f76f68e..ad575a7 100644
--- a/drivers/remoteproc/sandbox_testproc.c
+++ b/drivers/remoteproc/sandbox_testproc.c
@@ -4,7 +4,6 @@
* Texas Instruments Incorporated - https://www.ti.com/
*/
#define pr_fmt(fmt) "%s: " fmt, __func__
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <log.h>
diff --git a/drivers/remoteproc/stm32_copro.c b/drivers/remoteproc/stm32_copro.c
index 3e322c4..f45da9a 100644
--- a/drivers/remoteproc/stm32_copro.c
+++ b/drivers/remoteproc/stm32_copro.c
@@ -4,7 +4,6 @@
*/
#define LOG_CATEGORY UCLASS_REMOTEPROC
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <fdtdec.h>
diff --git a/drivers/remoteproc/ti_k3_arm64_rproc.c b/drivers/remoteproc/ti_k3_arm64_rproc.c
index 767493c..d3eb957 100644
--- a/drivers/remoteproc/ti_k3_arm64_rproc.c
+++ b/drivers/remoteproc/ti_k3_arm64_rproc.c
@@ -7,7 +7,6 @@
*
*/
-#include <common.h>
#include <dm.h>
#include <remoteproc.h>
#include <errno.h>
diff --git a/drivers/remoteproc/ti_k3_dsp_rproc.c b/drivers/remoteproc/ti_k3_dsp_rproc.c
index e790406..57fe103 100644
--- a/drivers/remoteproc/ti_k3_dsp_rproc.c
+++ b/drivers/remoteproc/ti_k3_dsp_rproc.c
@@ -7,7 +7,6 @@
* Suman Anna <s-anna@ti.com>
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <malloc.h>
diff --git a/drivers/remoteproc/ti_k3_r5f_rproc.c b/drivers/remoteproc/ti_k3_r5f_rproc.c
index 631e548..b55b1dc 100644
--- a/drivers/remoteproc/ti_k3_r5f_rproc.c
+++ b/drivers/remoteproc/ti_k3_r5f_rproc.c
@@ -7,7 +7,6 @@
* Suman Anna <s-anna@ti.com>
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <malloc.h>
diff --git a/drivers/remoteproc/ti_power_proc.c b/drivers/remoteproc/ti_power_proc.c
index f55df4a..cf150af 100644
--- a/drivers/remoteproc/ti_power_proc.c
+++ b/drivers/remoteproc/ti_power_proc.c
@@ -4,7 +4,6 @@
* Texas Instruments Incorporated - https://www.ti.com/
*/
#define pr_fmt(fmt) "%s: " fmt, __func__
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <fdtdec.h>
diff --git a/drivers/reset/reset-ast2500.c b/drivers/reset/reset-ast2500.c
index d9cecf3..0ed5396 100644
--- a/drivers/reset/reset-ast2500.c
+++ b/drivers/reset/reset-ast2500.c
@@ -4,7 +4,6 @@
* Copyright 2020 ASPEED Technology Inc.
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <misc.h>
diff --git a/drivers/reset/reset-ast2600.c b/drivers/reset/reset-ast2600.c
index 1732a45..ec7b9b6 100644
--- a/drivers/reset/reset-ast2600.c
+++ b/drivers/reset/reset-ast2600.c
@@ -3,7 +3,6 @@
* Copyright 2020 ASPEED Technology Inc.
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <misc.h>
diff --git a/drivers/reset/reset-bcm6345.c b/drivers/reset/reset-bcm6345.c
index 5383f59..6f14057 100644
--- a/drivers/reset/reset-bcm6345.c
+++ b/drivers/reset/reset-bcm6345.c
@@ -6,7 +6,6 @@
* Copyright (C) 2012 Jonas Gorski <jonas.gorski@gmail.com>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <log.h>
diff --git a/drivers/reset/reset-dra7.c b/drivers/reset/reset-dra7.c
index 05101a9..2f0ec4c 100644
--- a/drivers/reset/reset-dra7.c
+++ b/drivers/reset/reset-dra7.c
@@ -7,7 +7,6 @@
*/
#include <asm/io.h>
-#include <common.h>
#include <dm.h>
#include <reset-uclass.h>
#include <dm/device_compat.h>
diff --git a/drivers/reset/reset-hisilicon.c b/drivers/reset/reset-hisilicon.c
index 85e02b2..aca54cd 100644
--- a/drivers/reset/reset-hisilicon.c
+++ b/drivers/reset/reset-hisilicon.c
@@ -6,7 +6,6 @@
#include <log.h>
#include <malloc.h>
#include <asm/io.h>
-#include <common.h>
#include <dm.h>
#include <dt-bindings/reset/ti-syscon.h>
#include <reset-uclass.h>
diff --git a/drivers/reset/reset-hsdk.c b/drivers/reset/reset-hsdk.c
index 74b1173..747e73b 100644
--- a/drivers/reset/reset-hsdk.c
+++ b/drivers/reset/reset-hsdk.c
@@ -8,7 +8,6 @@
#include <log.h>
#include <asm/io.h>
-#include <common.h>
#include <dm.h>
#include <linux/bitops.h>
#include <linux/iopoll.h>
diff --git a/drivers/reset/reset-imx7.c b/drivers/reset/reset-imx7.c
index a3b3132..65a352b 100644
--- a/drivers/reset/reset-imx7.c
+++ b/drivers/reset/reset-imx7.c
@@ -6,7 +6,6 @@
#include <log.h>
#include <malloc.h>
#include <asm/io.h>
-#include <common.h>
#include <dm.h>
#include <dt-bindings/reset/imx7-reset.h>
#include <dt-bindings/reset/imx8mp-reset.h>
diff --git a/drivers/reset/reset-jh7110.c b/drivers/reset/reset-jh7110.c
index d6bdf6b..adf722d 100644
--- a/drivers/reset/reset-jh7110.c
+++ b/drivers/reset/reset-jh7110.c
@@ -5,7 +5,6 @@
*
*/
-#include <common.h>
#include <dm.h>
#include <dm/ofnode.h>
#include <dt-bindings/reset/starfive,jh7110-crg.h>
diff --git a/drivers/reset/reset-mediatek.c b/drivers/reset/reset-mediatek.c
index 97ed221..4b3afab 100644
--- a/drivers/reset/reset-mediatek.c
+++ b/drivers/reset/reset-mediatek.c
@@ -6,7 +6,6 @@
* Weijie Gao <weijie.gao@mediatek.com>
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <malloc.h>
diff --git a/drivers/reset/reset-meson.c b/drivers/reset/reset-meson.c
index 9d0c8b3..6337cda 100644
--- a/drivers/reset/reset-meson.c
+++ b/drivers/reset/reset-meson.c
@@ -6,7 +6,6 @@
* Author: Neil Armstrong <narmstrong@baylibre.com>
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <malloc.h>
diff --git a/drivers/reset/reset-mtmips.c b/drivers/reset/reset-mtmips.c
index 7bb8469..2db6766 100644
--- a/drivers/reset/reset-mtmips.c
+++ b/drivers/reset/reset-mtmips.c
@@ -5,7 +5,6 @@
* Author: Weijie Gao <weijie.gao@mediatek.com>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <log.h>
diff --git a/drivers/reset/reset-raspberrypi.c b/drivers/reset/reset-raspberrypi.c
index 804e32b..1792f08 100644
--- a/drivers/reset/reset-raspberrypi.c
+++ b/drivers/reset/reset-raspberrypi.c
@@ -4,7 +4,6 @@
*
* Copyright (C) 2020 Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
*/
-#include <common.h>
#include <dm.h>
#include <reset-uclass.h>
#include <asm/arch/msg.h>
diff --git a/drivers/reset/reset-rockchip.c b/drivers/reset/reset-rockchip.c
index 6cabaa1..876eb7d 100644
--- a/drivers/reset/reset-rockchip.c
+++ b/drivers/reset/reset-rockchip.c
@@ -3,7 +3,6 @@
* (C) Copyright 2017 Rockchip Electronics Co., Ltd
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <malloc.h>
diff --git a/drivers/reset/reset-scmi.c b/drivers/reset/reset-scmi.c
index b76711f..6dc1fcb 100644
--- a/drivers/reset/reset-scmi.c
+++ b/drivers/reset/reset-scmi.c
@@ -5,7 +5,6 @@
#define LOG_CATEGORY UCLASS_RESET
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <reset-uclass.h>
diff --git a/drivers/reset/reset-sifive.c b/drivers/reset/reset-sifive.c
index 23513b2..65f8571 100644
--- a/drivers/reset/reset-sifive.c
+++ b/drivers/reset/reset-sifive.c
@@ -4,7 +4,6 @@
* Author: Sagar Kadam <sagar.kadam@sifive.com>
*/
-#include <common.h>
#include <dm.h>
#include <reset-uclass.h>
#include <asm/io.h>
diff --git a/drivers/reset/reset-socfpga.c b/drivers/reset/reset-socfpga.c
index 6e3f03e..866437f 100644
--- a/drivers/reset/reset-socfpga.c
+++ b/drivers/reset/reset-socfpga.c
@@ -12,7 +12,6 @@
* Maxime Ripard <maxime.ripard@free-electrons.com>
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <malloc.h>
diff --git a/drivers/reset/reset-sunxi.c b/drivers/reset/reset-sunxi.c
index e484d1f..fd47e1f 100644
--- a/drivers/reset/reset-sunxi.c
+++ b/drivers/reset/reset-sunxi.c
@@ -4,7 +4,6 @@
* Author: Jagan Teki <jagan@amarulasolutions.com>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <log.h>
diff --git a/drivers/reset/reset-syscon.c b/drivers/reset/reset-syscon.c
index ff387ab..5be8c94 100644
--- a/drivers/reset/reset-syscon.c
+++ b/drivers/reset/reset-syscon.c
@@ -3,7 +3,6 @@
* Copyright (C) 2020 Sean Anderson
*/
-#include <common.h>
#include <dm.h>
#include <regmap.h>
#include <reset.h>
diff --git a/drivers/reset/reset-ti-sci.c b/drivers/reset/reset-ti-sci.c
index fd654a0..e69bcd4 100644
--- a/drivers/reset/reset-ti-sci.c
+++ b/drivers/reset/reset-ti-sci.c
@@ -8,7 +8,6 @@
* Loosely based on Linux kernel reset-ti-sci.c...
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <log.h>
diff --git a/drivers/reset/reset-uclass.c b/drivers/reset/reset-uclass.c
index b972faf..fe4cebf 100644
--- a/drivers/reset/reset-uclass.c
+++ b/drivers/reset/reset-uclass.c
@@ -5,7 +5,6 @@
#define LOG_CATEGORY UCLASS_RESET
-#include <common.h>
#include <dm.h>
#include <fdtdec.h>
#include <log.h>
diff --git a/drivers/reset/reset-uniphier.c b/drivers/reset/reset-uniphier.c
index 35e3cce..49b001f 100644
--- a/drivers/reset/reset-uniphier.c
+++ b/drivers/reset/reset-uniphier.c
@@ -5,7 +5,6 @@
* Author: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <malloc.h>
diff --git a/drivers/reset/reset-zynqmp.c b/drivers/reset/reset-zynqmp.c
index 87b4df5..b9c4f09 100644
--- a/drivers/reset/reset-zynqmp.c
+++ b/drivers/reset/reset-zynqmp.c
@@ -5,7 +5,6 @@
#define LOG_CATEGORY UCLASS_RESET
-#include <common.h>
#include <dm.h>
#include <dm/device_compat.h>
#include <reset-uclass.h>
diff --git a/drivers/reset/rst-rk3588.c b/drivers/reset/rst-rk3588.c
index 2c524e4..eae2eb1 100644
--- a/drivers/reset/rst-rk3588.c
+++ b/drivers/reset/rst-rk3588.c
@@ -5,7 +5,6 @@
* Author: Sebastian Reichel <sebastian.reichel@collabora.com>
*/
-#include <common.h>
#include <dm.h>
#include <asm/arch-rockchip/clock.h>
#include <dt-bindings/reset/rockchip,rk3588-cru.h>
diff --git a/drivers/reset/sandbox-reset-test.c b/drivers/reset/sandbox-reset-test.c
index 51b7981..dfacb76 100644
--- a/drivers/reset/sandbox-reset-test.c
+++ b/drivers/reset/sandbox-reset-test.c
@@ -3,7 +3,6 @@
* Copyright (c) 2016, NVIDIA CORPORATION.
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <malloc.h>
diff --git a/drivers/reset/sandbox-reset.c b/drivers/reset/sandbox-reset.c
index 97b1b92..adf9eed 100644
--- a/drivers/reset/sandbox-reset.c
+++ b/drivers/reset/sandbox-reset.c
@@ -3,7 +3,6 @@
* Copyright (c) 2016, NVIDIA CORPORATION.
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <malloc.h>
diff --git a/drivers/reset/sti-reset.c b/drivers/reset/sti-reset.c
index 5305270..412a0c5 100644
--- a/drivers/reset/sti-reset.c
+++ b/drivers/reset/sti-reset.c
@@ -4,7 +4,6 @@
* Author(s): Patrice Chotard, <patrice.chotard@foss.st.com> for STMicroelectronics.
*/
-#include <common.h>
#include <errno.h>
#include <log.h>
#include <malloc.h>
diff --git a/drivers/reset/stm32-reset.c b/drivers/reset/stm32-reset.c
index 0bbde29..9d4f361 100644
--- a/drivers/reset/stm32-reset.c
+++ b/drivers/reset/stm32-reset.c
@@ -6,7 +6,6 @@
#define LOG_CATEGORY UCLASS_RESET
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <log.h>
diff --git a/drivers/reset/tegra-car-reset.c b/drivers/reset/tegra-car-reset.c
index 501e9ca..e3ecc8d 100644
--- a/drivers/reset/tegra-car-reset.c
+++ b/drivers/reset/tegra-car-reset.c
@@ -3,7 +3,6 @@
* Copyright (c) 2016, NVIDIA CORPORATION.
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <malloc.h>
diff --git a/drivers/reset/tegra186-reset.c b/drivers/reset/tegra186-reset.c
index d43da45..8962422 100644
--- a/drivers/reset/tegra186-reset.c
+++ b/drivers/reset/tegra186-reset.c
@@ -3,7 +3,6 @@
* Copyright (c) 2016, NVIDIA CORPORATION.
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <malloc.h>
diff --git a/drivers/rng/Kconfig b/drivers/rng/Kconfig
index cd72852..5758ae1 100644
--- a/drivers/rng/Kconfig
+++ b/drivers/rng/Kconfig
@@ -6,6 +6,13 @@
This interface is used to initialise the rng device and to
read the random seed from the device.
+config SPL_DM_RNG
+ bool "Driver support for Random Number Generator devices in SPL"
+ depends on SPL_DM
+ help
+ This option is an SPL-variant of the DM_RNG option.
+ See the help of DM_RNG for details.
+
if DM_RNG
config RNG_MESON
diff --git a/drivers/rng/Makefile b/drivers/rng/Makefile
index ecae1a3..c1f1c61 100644
--- a/drivers/rng/Makefile
+++ b/drivers/rng/Makefile
@@ -3,7 +3,7 @@
# Copyright (c) 2019, Linaro Limited
#
-obj-$(CONFIG_DM_RNG) += rng-uclass.o
+obj-$(CONFIG_$(SPL_TPL_)DM_RNG) += rng-uclass.o
obj-$(CONFIG_RNG_MESON) += meson-rng.o
obj-$(CONFIG_RNG_SANDBOX) += sandbox_rng.o
obj-$(CONFIG_RNG_MSM) += msm_rng.o
diff --git a/drivers/rng/stm32_rng.c b/drivers/rng/stm32_rng.c
index 61d5ed6..44e8a46 100644
--- a/drivers/rng/stm32_rng.c
+++ b/drivers/rng/stm32_rng.c
@@ -74,7 +74,7 @@
* Extracts from the STM32 RNG specification when RNG supports CONDRST.
*
* When a noise source (or seed) error occurs, the RNG stops generating
- * random numbers and sets to “1” both SEIS and SECS bits to indicate
+ * random numbers and sets to "1" both SEIS and SECS bits to indicate
* that a seed error occurred. (...)
*
* 1. Software reset by writing CONDRST at 1 and at 0 (see bitfield
@@ -127,12 +127,12 @@
* Extracts from the STM32 RNG specification, when CONDRST is not supported
*
* When a noise source (or seed) error occurs, the RNG stops generating
- * random numbers and sets to “1” both SEIS and SECS bits to indicate
+ * random numbers and sets to "1" both SEIS and SECS bits to indicate
* that a seed error occurred. (...)
*
* The following sequence shall be used to fully recover from a seed
* error after the RNG initialization:
- * 1. Clear the SEIS bit by writing it to “0”.
+ * 1. Clear the SEIS bit by writing it to "0".
* 2. Read out 12 words from the RNG_DR register, and discard each of
* them in order to clean the pipeline.
* 3. Confirm that SEIS is still cleared. Random number generation is
diff --git a/drivers/rtc/abx80x.c b/drivers/rtc/abx80x.c
index 823aff0..1235b84 100644
--- a/drivers/rtc/abx80x.c
+++ b/drivers/rtc/abx80x.c
@@ -12,7 +12,6 @@
*
*/
-#include <common.h>
#include <dm.h>
#include <i2c.h>
#include <rtc.h>
diff --git a/drivers/rtc/davinci.c b/drivers/rtc/davinci.c
index c7ce41b..a20b73e 100644
--- a/drivers/rtc/davinci.c
+++ b/drivers/rtc/davinci.c
@@ -4,7 +4,6 @@
* Heiko Schocher <hs@denx.de>
* Copyright (C) 2021 Dario Binacchi <dariobin@libero.it>
*/
-#include <common.h>
#include <command.h>
#include <dm.h>
#include <clk.h>
diff --git a/drivers/rtc/ds1307.c b/drivers/rtc/ds1307.c
index 0e9d3d2..ba06ff9 100644
--- a/drivers/rtc/ds1307.c
+++ b/drivers/rtc/ds1307.c
@@ -13,7 +13,7 @@
* based on ds1337.c
*/
-#include <common.h>
+#include <config.h>
#include <command.h>
#include <dm.h>
#include <log.h>
diff --git a/drivers/rtc/ds1337.c b/drivers/rtc/ds1337.c
index 2c780ab..7eccf1c 100644
--- a/drivers/rtc/ds1337.c
+++ b/drivers/rtc/ds1337.c
@@ -11,7 +11,7 @@
* DS1337 Real Time Clock (RTC).
*/
-#include <common.h>
+#include <config.h>
#include <command.h>
#include <dm.h>
#include <log.h>
diff --git a/drivers/rtc/ds1374.c b/drivers/rtc/ds1374.c
index 89442f9..895dbba 100644
--- a/drivers/rtc/ds1374.c
+++ b/drivers/rtc/ds1374.c
@@ -13,7 +13,7 @@
* based on ds1337.c
*/
-#include <common.h>
+#include <config.h>
#include <command.h>
#include <rtc.h>
#include <i2c.h>
diff --git a/drivers/rtc/ds3231.c b/drivers/rtc/ds3231.c
index bd32ed2..d6267d6 100644
--- a/drivers/rtc/ds3231.c
+++ b/drivers/rtc/ds3231.c
@@ -14,7 +14,7 @@
* copied from ds1337.c
*/
-#include <common.h>
+#include <config.h>
#include <command.h>
#include <dm.h>
#include <log.h>
diff --git a/drivers/rtc/ds3232.c b/drivers/rtc/ds3232.c
index 16501cf..7314ba21 100644
--- a/drivers/rtc/ds3232.c
+++ b/drivers/rtc/ds3232.c
@@ -3,7 +3,6 @@
* (C) Copyright 2019, Vaisala Oyj
*/
-#include <common.h>
#include <command.h>
#include <dm.h>
#include <i2c.h>
diff --git a/drivers/rtc/emul_rtc.c b/drivers/rtc/emul_rtc.c
index 6f47d82..97a8d9b 100644
--- a/drivers/rtc/emul_rtc.c
+++ b/drivers/rtc/emul_rtc.c
@@ -5,11 +5,11 @@
* This driver emulates a real time clock based on timer ticks.
*/
-#include <common.h>
#include <div64.h>
#include <dm.h>
#include <env.h>
#include <rtc.h>
+#include <time.h>
#include <timestamp.h>
/**
diff --git a/drivers/rtc/goldfish_rtc.c b/drivers/rtc/goldfish_rtc.c
index 1ace990..3231eb0 100644
--- a/drivers/rtc/goldfish_rtc.c
+++ b/drivers/rtc/goldfish_rtc.c
@@ -72,7 +72,7 @@
return 0;
}
-int goldfish_rtc_probe(struct udevice *dev)
+static int goldfish_rtc_probe(struct udevice *dev)
{
struct goldfish_rtc *priv = dev_get_priv(dev);
fdt_addr_t addr;
diff --git a/drivers/rtc/ht1380.c b/drivers/rtc/ht1380.c
index 85fcee3..c202261 100644
--- a/drivers/rtc/ht1380.c
+++ b/drivers/rtc/ht1380.c
@@ -15,7 +15,6 @@
*
*/
-#include <common.h>
#include <dm.h>
#include <rtc.h>
#include <bcd.h>
diff --git a/drivers/rtc/i2c_rtc_emul.c b/drivers/rtc/i2c_rtc_emul.c
index c307d60..ea11c72 100644
--- a/drivers/rtc/i2c_rtc_emul.c
+++ b/drivers/rtc/i2c_rtc_emul.c
@@ -13,7 +13,6 @@
* time-keeping. It does not change the system time.
*/
-#include <common.h>
#include <dm.h>
#include <i2c.h>
#include <log.h>
diff --git a/drivers/rtc/isl1208.c b/drivers/rtc/isl1208.c
index 59a60b7..83db505 100644
--- a/drivers/rtc/isl1208.c
+++ b/drivers/rtc/isl1208.c
@@ -11,7 +11,6 @@
* ISL1208 Real Time Clock (RTC).
*/
-#include <common.h>
#include <command.h>
#include <dm.h>
#include <rtc.h>
diff --git a/drivers/rtc/m41t62.c b/drivers/rtc/m41t62.c
index 891fe09..7bfea9e 100644
--- a/drivers/rtc/m41t62.c
+++ b/drivers/rtc/m41t62.c
@@ -16,7 +16,7 @@
/* #define DEBUG */
-#include <common.h>
+#include <config.h>
#include <command.h>
#include <dm.h>
#include <log.h>
diff --git a/drivers/rtc/mc13xxx-rtc.c b/drivers/rtc/mc13xxx-rtc.c
index 6c2aef8..9e396bc 100644
--- a/drivers/rtc/mc13xxx-rtc.c
+++ b/drivers/rtc/mc13xxx-rtc.c
@@ -3,7 +3,6 @@
* Copyright (C) 2008, Guennadi Liakhovetski <lg@denx.de>
*/
-#include <common.h>
#include <rtc.h>
#include <spi.h>
#include <power/pmic.h>
diff --git a/drivers/rtc/mc146818.c b/drivers/rtc/mc146818.c
index 03ce081..c0d86c6 100644
--- a/drivers/rtc/mc146818.c
+++ b/drivers/rtc/mc146818.c
@@ -8,7 +8,6 @@
* Date & Time support for the MC146818 (PIXX4) RTC
*/
-#include <common.h>
#include <command.h>
#include <dm.h>
#include <rtc.h>
diff --git a/drivers/rtc/mcfrtc.c b/drivers/rtc/mcfrtc.c
index d2ac889..b5cc6b9 100644
--- a/drivers/rtc/mcfrtc.c
+++ b/drivers/rtc/mcfrtc.c
@@ -4,7 +4,6 @@
* TsiChung Liew (Tsi-Chung.Liew@freescale.com)
*/
-#include <common.h>
#include <command.h>
#include <rtc.h>
diff --git a/drivers/rtc/mvrtc.c b/drivers/rtc/mvrtc.c
index 50240d5..f070c68 100644
--- a/drivers/rtc/mvrtc.c
+++ b/drivers/rtc/mvrtc.c
@@ -8,7 +8,6 @@
* Date & Time support for Marvell Integrated RTC
*/
-#include <common.h>
#include <command.h>
#include <dm.h>
#include <rtc.h>
diff --git a/drivers/rtc/mxsrtc.c b/drivers/rtc/mxsrtc.c
index be899a9..69d22a4 100644
--- a/drivers/rtc/mxsrtc.c
+++ b/drivers/rtc/mxsrtc.c
@@ -6,7 +6,6 @@
* on behalf of DENX Software Engineering GmbH
*/
-#include <common.h>
#include <rtc.h>
#include <asm/io.h>
#include <asm/arch/imx-regs.h>
diff --git a/drivers/rtc/pcf2127.c b/drivers/rtc/pcf2127.c
index 2f3fafb..27a340f 100644
--- a/drivers/rtc/pcf2127.c
+++ b/drivers/rtc/pcf2127.c
@@ -5,7 +5,6 @@
/* #define DEBUG */
-#include <common.h>
#include <command.h>
#include <dm.h>
#include <i2c.h>
diff --git a/drivers/rtc/pcf8563.c b/drivers/rtc/pcf8563.c
index 91a4124..03bef68 100644
--- a/drivers/rtc/pcf8563.c
+++ b/drivers/rtc/pcf8563.c
@@ -10,7 +10,7 @@
/* #define DEBUG */
-#include <common.h>
+#include <config.h>
#include <command.h>
#include <dm.h>
#include <log.h>
diff --git a/drivers/rtc/pl031.c b/drivers/rtc/pl031.c
index a1d3766..855ee91 100644
--- a/drivers/rtc/pl031.c
+++ b/drivers/rtc/pl031.c
@@ -6,7 +6,6 @@
* reference linux-2.6.20.6/drivers/rtc/rtc-pl031.c
*/
-#include <common.h>
#include <command.h>
#include <dm.h>
#include <errno.h>
diff --git a/drivers/rtc/pt7c4338.c b/drivers/rtc/pt7c4338.c
index e0a7bd3..79df078 100644
--- a/drivers/rtc/pt7c4338.c
+++ b/drivers/rtc/pt7c4338.c
@@ -18,7 +18,7 @@
* It has 56 bytes of nonvolatile RAM.
*/
-#include <common.h>
+#include <config.h>
#include <command.h>
#include <dm.h>
#include <log.h>
diff --git a/drivers/rtc/rtc-uclass.c b/drivers/rtc/rtc-uclass.c
index e5ae6ea..8f6c0c6 100644
--- a/drivers/rtc/rtc-uclass.c
+++ b/drivers/rtc/rtc-uclass.c
@@ -6,7 +6,6 @@
#define LOG_CATEGORY UCLASS_RTC
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <log.h>
diff --git a/drivers/rtc/rv3029.c b/drivers/rtc/rv3029.c
index 3afe5b2..a82acec 100644
--- a/drivers/rtc/rv3029.c
+++ b/drivers/rtc/rv3029.c
@@ -7,10 +7,8 @@
* Michael Buesch <m@bues.ch>
*/
-#include <common.h>
#include <command.h>
#include <dm.h>
-#include <eeprom.h>
#include <i2c.h>
#include <log.h>
#include <rtc.h>
diff --git a/drivers/rtc/rv8803.c b/drivers/rtc/rv8803.c
index 06a4ae8..82b4372 100644
--- a/drivers/rtc/rv8803.c
+++ b/drivers/rtc/rv8803.c
@@ -10,7 +10,6 @@
*
*/
-#include <common.h>
#include <command.h>
#include <dm.h>
#include <log.h>
diff --git a/drivers/rtc/rx8010sj.c b/drivers/rtc/rx8010sj.c
index bf93b55..0d778f4 100644
--- a/drivers/rtc/rx8010sj.c
+++ b/drivers/rtc/rx8010sj.c
@@ -17,7 +17,7 @@
*/
#include <command.h>
-#include <common.h>
+#include <config.h>
#include <dm.h>
#include <i2c.h>
#include <rtc.h>
diff --git a/drivers/rtc/rx8025.c b/drivers/rtc/rx8025.c
index 1394c23..c789524 100644
--- a/drivers/rtc/rx8025.c
+++ b/drivers/rtc/rx8025.c
@@ -8,7 +8,6 @@
* Epson RX8025 RTC driver.
*/
-#include <common.h>
#include <command.h>
#include <dm.h>
#include <i2c.h>
diff --git a/drivers/rtc/s35392a.c b/drivers/rtc/s35392a.c
index 80f55c8..03fb9a0 100644
--- a/drivers/rtc/s35392a.c
+++ b/drivers/rtc/s35392a.c
@@ -18,7 +18,6 @@
*/
#include <command.h>
-#include <common.h>
#include <dm.h>
#include <i2c.h>
#include <linux/bitrev.h>
diff --git a/drivers/rtc/sandbox_rtc.c b/drivers/rtc/sandbox_rtc.c
index 657e5c7..4404501 100644
--- a/drivers/rtc/sandbox_rtc.c
+++ b/drivers/rtc/sandbox_rtc.c
@@ -4,7 +4,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <dm.h>
#include <i2c.h>
#include <rtc.h>
diff --git a/drivers/rtc/stm32_rtc.c b/drivers/rtc/stm32_rtc.c
index ec7584c..ee70c11 100644
--- a/drivers/rtc/stm32_rtc.c
+++ b/drivers/rtc/stm32_rtc.c
@@ -5,7 +5,6 @@
#define LOG_CATEGORY UCLASS_RTC
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <malloc.h>
diff --git a/drivers/rtc/zynqmp_rtc.c b/drivers/rtc/zynqmp_rtc.c
index ab9b93c..15122a0 100644
--- a/drivers/rtc/zynqmp_rtc.c
+++ b/drivers/rtc/zynqmp_rtc.c
@@ -5,7 +5,6 @@
#define LOG_CATEGORY UCLASS_RTC
-#include <common.h>
#include <dm.h>
#include <rtc.h>
#include <asm/io.h>
diff --git a/drivers/scsi/sandbox_scsi.c b/drivers/scsi/sandbox_scsi.c
index a7ac33c..544a024 100644
--- a/drivers/scsi/sandbox_scsi.c
+++ b/drivers/scsi/sandbox_scsi.c
@@ -9,7 +9,6 @@
#define LOG_CATEGORY UCLASS_SCSI
-#include <common.h>
#include <dm.h>
#include <os.h>
#include <malloc.h>
diff --git a/drivers/scsi/scsi-uclass.c b/drivers/scsi/scsi-uclass.c
index a7c1eaf..1ee8236 100644
--- a/drivers/scsi/scsi-uclass.c
+++ b/drivers/scsi/scsi-uclass.c
@@ -10,7 +10,6 @@
#define LOG_CATEGORY UCLASS_SCSI
-#include <common.h>
#include <dm.h>
#include <scsi.h>
diff --git a/drivers/scsi/scsi.c b/drivers/scsi/scsi.c
index 79ee400..73cb835 100644
--- a/drivers/scsi/scsi.c
+++ b/drivers/scsi/scsi.c
@@ -6,7 +6,6 @@
#define LOG_CATEGORY UCLASS_SCSI
-#include <common.h>
#include <blk.h>
#include <bootdev.h>
#include <bootstage.h>
diff --git a/drivers/scsi/scsi_bootdev.c b/drivers/scsi/scsi_bootdev.c
index 218221f..28e4612 100644
--- a/drivers/scsi/scsi_bootdev.c
+++ b/drivers/scsi/scsi_bootdev.c
@@ -6,7 +6,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <bootdev.h>
#include <dm.h>
#include <init.h>
diff --git a/drivers/scsi/scsi_emul.c b/drivers/scsi/scsi_emul.c
index 6b8468f..d1bb926 100644
--- a/drivers/scsi/scsi_emul.c
+++ b/drivers/scsi/scsi_emul.c
@@ -11,7 +11,6 @@
#define LOG_CATEGORY UCLASS_SCSI
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <scsi.h>
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index 8b19e26..1fe4607 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -321,7 +321,7 @@
config DEBUG_UART_MSM
bool "Qualcomm QUP UART debug"
- depends on ARCH_SNAPDRAGON
+ depends on ARCH_SNAPDRAGON || ARCH_IPQ40XX
help
Select this to enable a debug UART using the serial_msm driver. You
will need to provide parameters to make this work. The driver will
diff --git a/drivers/serial/altera_jtag_uart.c b/drivers/serial/altera_jtag_uart.c
index 9e39da7..3f706e1 100644
--- a/drivers/serial/altera_jtag_uart.c
+++ b/drivers/serial/altera_jtag_uart.c
@@ -4,7 +4,6 @@
* Scott McNutt <smcnutt@psyent.com>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <serial.h>
diff --git a/drivers/serial/altera_uart.c b/drivers/serial/altera_uart.c
index 3592048..3c13ef2 100644
--- a/drivers/serial/altera_uart.c
+++ b/drivers/serial/altera_uart.c
@@ -4,7 +4,6 @@
* Scott McNutt <smcnutt@psyent.com>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <serial.h>
diff --git a/drivers/serial/arm_dcc.c b/drivers/serial/arm_dcc.c
index a402a12..66af136 100644
--- a/drivers/serial/arm_dcc.c
+++ b/drivers/serial/arm_dcc.c
@@ -15,7 +15,6 @@
* this file might be covered by the GNU General Public License.
*/
-#include <common.h>
#include <dm.h>
#include <serial.h>
diff --git a/drivers/serial/atmel_usart.c b/drivers/serial/atmel_usart.c
index 9827c00..7e45a80 100644
--- a/drivers/serial/atmel_usart.c
+++ b/drivers/serial/atmel_usart.c
@@ -5,7 +5,6 @@
* Modified to support C structur SoC access by
* Andreas Bießmann <biessmann@corscience.de>
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <errno.h>
diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c
index 6deb1d8..4963385 100644
--- a/drivers/serial/ns16550.c
+++ b/drivers/serial/ns16550.c
@@ -5,7 +5,7 @@
*/
#include <clock_legacy.h>
-#include <common.h>
+#include <config.h>
#include <clk.h>
#include <dm.h>
#include <errno.h>
diff --git a/drivers/serial/sandbox.c b/drivers/serial/sandbox.c
index f6ac3d2..ec0068e 100644
--- a/drivers/serial/sandbox.c
+++ b/drivers/serial/sandbox.c
@@ -9,7 +9,6 @@
* U-Boot.
*/
-#include <common.h>
#include <console.h>
#include <dm.h>
#include <os.h>
diff --git a/drivers/serial/serial-uclass.c b/drivers/serial/serial-uclass.c
index e4fa393..84f02f7 100644
--- a/drivers/serial/serial-uclass.c
+++ b/drivers/serial/serial-uclass.c
@@ -5,7 +5,7 @@
#define LOG_CATEGORY UCLASS_SERIAL
-#include <common.h>
+#include <config.h>
#include <dm.h>
#include <env_internal.h>
#include <errno.h>
diff --git a/drivers/serial/serial.c b/drivers/serial/serial.c
index 787edd5..dc4bb06 100644
--- a/drivers/serial/serial.c
+++ b/drivers/serial/serial.c
@@ -4,7 +4,7 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
+#include <config.h>
#include <env_internal.h>
#include <hang.h>
#include <serial.h>
diff --git a/drivers/serial/serial_ar933x.c b/drivers/serial/serial_ar933x.c
index 4f91634..4d92752 100644
--- a/drivers/serial/serial_ar933x.c
+++ b/drivers/serial/serial_ar933x.c
@@ -3,7 +3,6 @@
* Copyright (C) 2015-2016 Wills Wang <wills.wang@live.com>
*/
-#include <common.h>
#include <clock_legacy.h>
#include <dm.h>
#include <div64.h>
diff --git a/drivers/serial/serial_arc.c b/drivers/serial/serial_arc.c
index c2fc8a9..c0930cf 100644
--- a/drivers/serial/serial_arc.c
+++ b/drivers/serial/serial_arc.c
@@ -7,7 +7,6 @@
*
*/
-#include <common.h>
#include <dm.h>
#include <serial.h>
#include <asm/global_data.h>
diff --git a/drivers/serial/serial_bcm283x_mu.c b/drivers/serial/serial_bcm283x_mu.c
index 7585f79..7fa2624 100644
--- a/drivers/serial/serial_bcm283x_mu.c
+++ b/drivers/serial/serial_bcm283x_mu.c
@@ -14,7 +14,6 @@
/* Simple U-Boot driver for the BCM283x mini UART */
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <watchdog.h>
diff --git a/drivers/serial/serial_bcm283x_pl011.c b/drivers/serial/serial_bcm283x_pl011.c
index 09a9868..2abc1c4 100644
--- a/drivers/serial/serial_bcm283x_pl011.c
+++ b/drivers/serial/serial_bcm283x_pl011.c
@@ -3,7 +3,6 @@
* Copyright (c) 2018 Alexander Graf <agraf@suse.de>
*/
-#include <common.h>
#include <dm.h>
#include <asm/gpio.h>
#include <dm/pinctrl.h>
diff --git a/drivers/serial/serial_coreboot.c b/drivers/serial/serial_coreboot.c
index 23066e4..b1f69f6 100644
--- a/drivers/serial/serial_coreboot.c
+++ b/drivers/serial/serial_coreboot.c
@@ -7,7 +7,6 @@
#define LOG_CATGEGORY UCLASS_SERIAL
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <ns16550.h>
diff --git a/drivers/serial/serial_cortina.c b/drivers/serial/serial_cortina.c
index 6dc81a7..3ae8fb4 100644
--- a/drivers/serial/serial_cortina.c
+++ b/drivers/serial/serial_cortina.c
@@ -5,7 +5,6 @@
*
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <watchdog.h>
diff --git a/drivers/serial/serial_efi.c b/drivers/serial/serial_efi.c
index 0067576..5733eaaf 100644
--- a/drivers/serial/serial_efi.c
+++ b/drivers/serial/serial_efi.c
@@ -4,7 +4,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <debug_uart.h>
#include <dm.h>
#include <efi.h>
diff --git a/drivers/serial/serial_htif.c b/drivers/serial/serial_htif.c
index 5d2bf0a..2a93bbb 100644
--- a/drivers/serial/serial_htif.c
+++ b/drivers/serial/serial_htif.c
@@ -3,7 +3,6 @@
* Copyright (C) 2022 Ventana Micro Systems Inc.
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <fdtdec.h>
diff --git a/drivers/serial/serial_intel_mid.c b/drivers/serial/serial_intel_mid.c
index bbf1905..4b528e4 100644
--- a/drivers/serial/serial_intel_mid.c
+++ b/drivers/serial/serial_intel_mid.c
@@ -3,7 +3,6 @@
* Copyright (c) 2017 Intel Corporation
*/
-#include <common.h>
#include <dm.h>
#include <ns16550.h>
#include <serial.h>
diff --git a/drivers/serial/serial_linflexuart.c b/drivers/serial/serial_linflexuart.c
index b449e55..ff66e69 100644
--- a/drivers/serial/serial_linflexuart.c
+++ b/drivers/serial/serial_linflexuart.c
@@ -3,7 +3,6 @@
* (C) Copyright 2013-2016 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <watchdog.h>
diff --git a/drivers/serial/serial_lpuart.c b/drivers/serial/serial_lpuart.c
index ce08a6b..a06e6dc 100644
--- a/drivers/serial/serial_lpuart.c
+++ b/drivers/serial/serial_lpuart.c
@@ -4,7 +4,6 @@
* Copyright 2013 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <clock_legacy.h>
#include <clk.h>
#include <dm.h>
@@ -109,28 +108,35 @@
}
#if CONFIG_IS_ENABLED(CLK)
-static int get_lpuart_clk_rate(struct udevice *dev, u32 *clk)
+static int get_lpuart_clk_rate(struct udevice *dev, u32 *clk_rate)
{
- struct clk per_clk;
+ struct lpuart_serial_plat *plat = dev_get_plat(dev);
+ struct clk clk;
ulong rate;
int ret;
+ char *name;
- ret = clk_get_by_name(dev, "per", &per_clk);
+ if (plat->devtype == DEV_MX7ULP)
+ name = "ipg";
+ else
+ name = "per";
+
+ ret = clk_get_by_name(dev, name, &clk);
if (ret) {
- dev_err(dev, "Failed to get per clk: %d\n", ret);
+ dev_err(dev, "Failed to get clk: %d\n", ret);
return ret;
}
- rate = clk_get_rate(&per_clk);
+ rate = clk_get_rate(&clk);
if ((long)rate <= 0) {
- dev_err(dev, "Failed to get per clk rate: %ld\n", (long)rate);
+ dev_err(dev, "Failed to get clk rate: %ld\n", (long)rate);
return ret;
}
- *clk = rate;
+ *clk_rate = rate;
return 0;
}
#else
-static inline int get_lpuart_clk_rate(struct udevice *dev, u32 *clk)
+static inline int get_lpuart_clk_rate(struct udevice *dev, u32 *clk_rate)
{ return -ENOSYS; }
#endif
@@ -479,19 +485,22 @@
static int lpuart_serial_probe(struct udevice *dev)
{
#if CONFIG_IS_ENABLED(CLK)
+ struct lpuart_serial_plat *plat = dev_get_plat(dev);
struct clk per_clk;
struct clk ipg_clk;
int ret;
- ret = clk_get_by_name(dev, "per", &per_clk);
- if (!ret) {
- ret = clk_enable(&per_clk);
- if (ret) {
- dev_err(dev, "Failed to enable per clk: %d\n", ret);
- return ret;
+ if (plat->devtype != DEV_MX7ULP) {
+ ret = clk_get_by_name(dev, "per", &per_clk);
+ if (!ret) {
+ ret = clk_enable(&per_clk);
+ if (ret) {
+ dev_err(dev, "Failed to enable per clk: %d\n", ret);
+ return ret;
+ }
+ } else {
+ debug("%s: Failed to get per clk: %d\n", __func__, ret);
}
- } else {
- debug("%s: Failed to get per clk: %d\n", __func__, ret);
}
ret = clk_get_by_name(dev, "ipg", &ipg_clk);
diff --git a/drivers/serial/serial_mcf.c b/drivers/serial/serial_mcf.c
index bb2afd0..7614357 100644
--- a/drivers/serial/serial_mcf.c
+++ b/drivers/serial/serial_mcf.c
@@ -15,7 +15,6 @@
* as serial console interface.
*/
-#include <common.h>
#include <dm.h>
#include <asm/global_data.h>
#include <dm/platform_data/serial_coldfire.h>
diff --git a/drivers/serial/serial_meson.c b/drivers/serial/serial_meson.c
index be5f380..bb79b97 100644
--- a/drivers/serial/serial_meson.c
+++ b/drivers/serial/serial_meson.c
@@ -3,7 +3,6 @@
* (C) Copyright 2016 Beniamino Galvani <b.galvani@gmail.com>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <fdtdec.h>
diff --git a/drivers/serial/serial_mpc8xx.c b/drivers/serial/serial_mpc8xx.c
index d82760c..9ce3fc3 100644
--- a/drivers/serial/serial_mpc8xx.c
+++ b/drivers/serial/serial_mpc8xx.c
@@ -4,7 +4,6 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
#include <command.h>
#include <dm.h>
#include <serial.h>
diff --git a/drivers/serial/serial_msm.c b/drivers/serial/serial_msm.c
index ac4280c..757e5ea 100644
--- a/drivers/serial/serial_msm.c
+++ b/drivers/serial/serial_msm.c
@@ -8,7 +8,6 @@
* Based on Linux driver.
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <errno.h>
@@ -32,6 +31,16 @@
#define UARTDM_RXFS_BUF_MASK 0x7
#define UARTDM_MR1 0x00
#define UARTDM_MR2 0x04
+/*
+ * This is documented on page 1817 of the apq8016e technical reference manual.
+ * section 6.2.5.3.26
+ *
+ * The upper nybble contains the bit clock divider for the RX pin, the lower
+ * nybble defines the TX pin. In almost all cases these should be the same value.
+ *
+ * The baud rate is the core clock frequency divided by the fixed divider value
+ * programmed into this register (defined in calc_csr_bitrate()).
+ */
#define UARTDM_CSR 0xA0
#define UARTDM_SR 0xA4 /* Status register */
@@ -53,10 +62,10 @@
#define UARTDM_TF 0x100 /* UART Transmit FIFO register */
#define UARTDM_RF 0x140 /* UART Receive FIFO register */
-#define UART_DM_CLK_RX_TX_BIT_RATE 0xCC
-#define MSM_BOOT_UART_DM_8_N_1_MODE 0x34
-#define MSM_BOOT_UART_DM_CMD_RESET_RX 0x10
-#define MSM_BOOT_UART_DM_CMD_RESET_TX 0x20
+#define MSM_BOOT_UART_DM_8_N_1_MODE 0x34
+#define MSM_BOOT_UART_DM_CMD_RESET_RX 0x10
+#define MSM_BOOT_UART_DM_CMD_RESET_TX 0x20
+#define MSM_UART_MR1_RX_RDY_CTL BIT(7)
DECLARE_GLOBAL_DATA_PTR;
@@ -64,7 +73,7 @@
phys_addr_t base;
unsigned chars_cnt; /* number of buffered chars */
uint32_t chars_buf; /* buffered chars */
- uint32_t clk_bit_rate; /* data mover mode bit rate register value */
+ uint32_t clk_rate; /* core clock rate */
};
static int msm_serial_fetch(struct udevice *dev)
@@ -156,33 +165,63 @@
.getc = msm_serial_getc,
};
-static int msm_uart_clk_init(struct udevice *dev)
+static long msm_uart_clk_init(struct udevice *dev)
{
- uint clk_rate = fdtdec_get_uint(gd->fdt_blob, dev_of_offset(dev),
- "clock-frequency", 115200);
+ struct msm_serial_data *priv = dev_get_priv(dev);
struct clk clk;
int ret;
+ long rate;
ret = clk_get_by_name(dev, "core", &clk);
if (ret < 0) {
pr_warn("%s: Failed to get clock: %d\n", __func__, ret);
- return ret;
+ return 0;
}
- ret = clk_set_rate(&clk, clk_rate);
- if (ret < 0)
- return ret;
+ rate = clk_set_rate(&clk, priv->clk_rate);
- return 0;
+ return rate;
+}
+
+static int calc_csr_bitrate(struct msm_serial_data *priv)
+{
+ /* This table is from the TRE. See the definition of UARTDM_CSR */
+ unsigned int csr_div_table[] = {24576, 12288, 6144, 3072, 1536, 768, 512, 384,
+ 256, 192, 128, 96, 64, 48, 32, 16};
+ int i = ARRAY_SIZE(csr_div_table) - 1;
+ /* Currently we only support one baudrate */
+ int baud = 115200;
+
+ for (; i >= 0; i--) {
+ int x = priv->clk_rate / csr_div_table[i];
+
+ if (x == baud)
+ /* Duplicate the configuration for RX
+ * as the lower nybble only configures TX
+ */
+ return i + (i << 4);
+ }
+
+ return -EINVAL;
}
static void uart_dm_init(struct msm_serial_data *priv)
{
/* Delay initialization for a bit to let pins stabilize if necessary */
mdelay(5);
+ int bitrate = calc_csr_bitrate(priv);
+ if (bitrate < 0) {
+ log_warning("Couldn't calculate bit clock divider! Using default\n");
+ /* This happens to be the value used on MSM8916 for the hardcoded clockrate
+ * in clock-apq8016. It's at least a better guess than a value we *know*
+ * is wrong...
+ */
+ bitrate = 0xCC;
+ }
- writel(priv->clk_bit_rate, priv->base + UARTDM_CSR);
- writel(0x0, priv->base + UARTDM_MR1);
+ writel(bitrate, priv->base + UARTDM_CSR);
+ /* Enable RS232 flow control to support RS232 db9 connector */
+ writel(MSM_UART_MR1_RX_RDY_CTL, priv->base + UARTDM_MR1);
writel(MSM_BOOT_UART_DM_8_N_1_MODE, priv->base + UARTDM_MR2);
writel(MSM_BOOT_UART_DM_CMD_RESET_RX, priv->base + UARTDM_CR);
writel(MSM_BOOT_UART_DM_CMD_RESET_TX, priv->base + UARTDM_CR);
@@ -192,16 +231,25 @@
}
static int msm_serial_probe(struct udevice *dev)
{
- int ret;
struct msm_serial_data *priv = dev_get_priv(dev);
+ long rate;
/* No need to reinitialize the UART after relocation */
if (gd->flags & GD_FLG_RELOC)
return 0;
- ret = msm_uart_clk_init(dev);
- if (ret)
- return ret;
+ rate = msm_uart_clk_init(dev);
+ if (rate < 0)
+ return rate;
+ if (!rate) {
+ log_err("Got core clock rate of 0... Please fix your clock driver\n");
+ return -EINVAL;
+ }
+
+ /* Update the clock rate to the actual programmed rate returned by the
+ * clock driver
+ */
+ priv->clk_rate = rate;
uart_dm_init(priv);
@@ -211,13 +259,18 @@
static int msm_serial_of_to_plat(struct udevice *dev)
{
struct msm_serial_data *priv = dev_get_priv(dev);
+ int ret;
priv->base = dev_read_addr(dev);
if (priv->base == FDT_ADDR_T_NONE)
return -EINVAL;
- priv->clk_bit_rate = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
- "bit-rate", UART_DM_CLK_RX_TX_BIT_RATE);
+ ret = dev_read_u32(dev, "clock-frequency", &priv->clk_rate);
+ if (ret < 0) {
+ log_debug("No clock frequency specified, using default rate\n");
+ /* Default for APQ8016 */
+ priv->clk_rate = 7372800;
+ }
return 0;
}
@@ -242,18 +295,23 @@
static struct msm_serial_data init_serial_data = {
.base = CONFIG_VAL(DEBUG_UART_BASE),
- .clk_rate = 7372800,
+ .clk_rate = CONFIG_VAL(DEBUG_UART_CLOCK),
};
#include <debug_uart.h>
/* Uncomment to turn on UART clocks when debugging U-Boot as aboot on MSM8916 */
-//int apq8016_clk_init_uart(phys_addr_t gcc_base);
+//int apq8016_clk_init_uart(phys_addr_t gcc_base, unsigned long id);
static inline void _debug_uart_init(void)
{
- /* Uncomment to turn on UART clocks when debugging U-Boot as aboot on MSM8916 */
- //apq8016_clk_init_uart(0x1800000);
+ /*
+ * Uncomment to turn on UART clocks when debugging U-Boot as aboot
+ * on MSM8916. Supported debug UART clock IDs:
+ * - db410c: GCC_BLSP1_UART2_APPS_CLK
+ * - HMIBSC: GCC_BLSP1_UART1_APPS_CLK
+ */
+ //apq8016_clk_init_uart(0x1800000, <uart_clk_id>);
uart_dm_init(&init_serial_data);
}
diff --git a/drivers/serial/serial_msm_geni.c b/drivers/serial/serial_msm_geni.c
index e5c3dcf..cb6c09f 100644
--- a/drivers/serial/serial_msm_geni.c
+++ b/drivers/serial/serial_msm_geni.c
@@ -9,7 +9,6 @@
#include <asm/io.h>
#include <clk.h>
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <linux/delay.h>
@@ -603,7 +602,20 @@
.priv_auto = sizeof(struct msm_serial_data),
.probe = msm_serial_probe,
.ops = &msm_serial_ops,
- .flags = DM_FLAG_PRE_RELOC,
+ .flags = DM_FLAG_PRE_RELOC | DM_FLAG_DEFAULT_PD_CTRL_OFF,
+};
+
+static const struct udevice_id geniqup_ids[] = {
+ { .compatible = "qcom,geni-se-qup" },
+ { }
+};
+
+U_BOOT_DRIVER(geni_se_qup) = {
+ .name = "geni-se-qup",
+ .id = UCLASS_NOP,
+ .of_match = geniqup_ids,
+ .bind = dm_scan_fdt_dev,
+ .flags = DM_FLAG_PRE_RELOC | DM_FLAG_DEFAULT_PD_CTRL_OFF,
};
#ifdef CONFIG_DEBUG_UART_MSM_GENI
diff --git a/drivers/serial/serial_mtk.c b/drivers/serial/serial_mtk.c
index f146f2b..3f569c6 100644
--- a/drivers/serial/serial_mtk.c
+++ b/drivers/serial/serial_mtk.c
@@ -7,7 +7,7 @@
*/
#include <clk.h>
-#include <common.h>
+#include <config.h>
#include <div64.h>
#include <dm.h>
#include <dm/device_compat.h>
diff --git a/drivers/serial/serial_mvebu_a3700.c b/drivers/serial/serial_mvebu_a3700.c
index b2017c6..1a0b85e 100644
--- a/drivers/serial/serial_mvebu_a3700.c
+++ b/drivers/serial/serial_mvebu_a3700.c
@@ -4,7 +4,6 @@
* Copyright (C) 2021 Pali Rohár <pali@kernel.org>
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <serial.h>
diff --git a/drivers/serial/serial_mxc.c b/drivers/serial/serial_mxc.c
index cc85a50..c5fd740 100644
--- a/drivers/serial/serial_mxc.c
+++ b/drivers/serial/serial_mxc.c
@@ -3,7 +3,6 @@
* (c) 2007 Sascha Hauer <s.hauer@pengutronix.de>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <watchdog.h>
diff --git a/drivers/serial/serial_mxs.c b/drivers/serial/serial_mxs.c
index 3659948..071bd09 100644
--- a/drivers/serial/serial_mxs.c
+++ b/drivers/serial/serial_mxs.c
@@ -2,7 +2,6 @@
/*
* Copyright (C) 2023 Marek Vasut <marex@denx.de>
*/
-#include <common.h>
#include <dm.h>
#include <malloc.h>
#include <serial.h>
diff --git a/drivers/serial/serial_npcm.c b/drivers/serial/serial_npcm.c
index 6bf3a94..661daf1 100644
--- a/drivers/serial/serial_npcm.c
+++ b/drivers/serial/serial_npcm.c
@@ -3,7 +3,6 @@
* Copyright (c) 2021 Nuvoton Technology Corp.
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <serial.h>
diff --git a/drivers/serial/serial_ns16550.c b/drivers/serial/serial_ns16550.c
index 4014f68..577864b 100644
--- a/drivers/serial/serial_ns16550.c
+++ b/drivers/serial/serial_ns16550.c
@@ -4,7 +4,7 @@
* Rob Taylor, Flying Pig Systems. robt@flyingpig.com.
*/
-#include <common.h>
+#include <config.h>
#include <clock_legacy.h>
#include <ns16550.h>
#include <serial.h>
diff --git a/drivers/serial/serial_nulldev.c b/drivers/serial/serial_nulldev.c
index f3ca7f5..78a9e0b 100644
--- a/drivers/serial/serial_nulldev.c
+++ b/drivers/serial/serial_nulldev.c
@@ -3,7 +3,6 @@
* Copyright (c) 2015 National Instruments
*/
-#include <common.h>
#include <dm.h>
#include <serial.h>
diff --git a/drivers/serial/serial_omap.c b/drivers/serial/serial_omap.c
index 49ced8f..9467265 100644
--- a/drivers/serial/serial_omap.c
+++ b/drivers/serial/serial_omap.c
@@ -6,7 +6,7 @@
* Lokesh Vutla <lokeshvutla@ti.com>
*/
-#include <common.h>
+#include <config.h>
#include <dm.h>
#include <dt-structs.h>
#include <log.h>
diff --git a/drivers/serial/serial_owl.c b/drivers/serial/serial_owl.c
index 3b79578..8ce8aa3 100644
--- a/drivers/serial/serial_owl.c
+++ b/drivers/serial/serial_owl.c
@@ -6,7 +6,6 @@
* Copyright (C) 2018 Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <errno.h>
diff --git a/drivers/serial/serial_pic32.c b/drivers/serial/serial_pic32.c
index 0a03a9a..a49c413 100644
--- a/drivers/serial/serial_pic32.c
+++ b/drivers/serial/serial_pic32.c
@@ -3,7 +3,6 @@
* (c) 2015 Paul Thacker <paul.thacker@microchip.com>
*
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <malloc.h>
diff --git a/drivers/serial/serial_pl01x.c b/drivers/serial/serial_pl01x.c
index f04c21e..80c3596 100644
--- a/drivers/serial/serial_pl01x.c
+++ b/drivers/serial/serial_pl01x.c
@@ -10,7 +10,6 @@
/* Simple U-Boot driver for the PrimeCell PL010/PL011 UARTs */
-#include <common.h>
#include <asm/global_data.h>
/* For get_bus_freq() */
#include <clock_legacy.h>
diff --git a/drivers/serial/serial_rockchip.c b/drivers/serial/serial_rockchip.c
index f4e9422..8a15173 100644
--- a/drivers/serial/serial_rockchip.c
+++ b/drivers/serial/serial_rockchip.c
@@ -3,7 +3,6 @@
* Copyright (c) 2015 Google, Inc
*/
-#include <common.h>
#include <debug_uart.h>
#include <dm.h>
#include <dt-structs.h>
diff --git a/drivers/serial/serial_s5p4418_pl011.c b/drivers/serial/serial_s5p4418_pl011.c
index e4492e6..1fb954e 100644
--- a/drivers/serial/serial_s5p4418_pl011.c
+++ b/drivers/serial/serial_s5p4418_pl011.c
@@ -3,7 +3,6 @@
* Copyright (C) 2022 Stefan Bosch <stefan_b@posteo.net>
*/
-#include <common.h>
#include <dm.h>
#include <asm/arch/clk.h>
#include <asm/arch/reset.h>
diff --git a/drivers/serial/serial_semihosting.c b/drivers/serial/serial_semihosting.c
index cfa1ec3..56a5ec7 100644
--- a/drivers/serial/serial_semihosting.c
+++ b/drivers/serial/serial_semihosting.c
@@ -3,7 +3,6 @@
* Copyright (C) 2022 Sean Anderson <sean.anderson@seco.com>
*/
-#include <common.h>
#include <dm.h>
#include <malloc.h>
#include <serial.h>
diff --git a/drivers/serial/serial_sifive.c b/drivers/serial/serial_sifive.c
index c449f3f..e47828e 100644
--- a/drivers/serial/serial_sifive.c
+++ b/drivers/serial/serial_sifive.c
@@ -3,7 +3,6 @@
* Copyright (C) 2018 Anup Patel <anup@brainfault.org>
*/
-#include <common.h>
#include <clk.h>
#include <debug_uart.h>
#include <dm.h>
diff --git a/drivers/serial/serial_sti_asc.c b/drivers/serial/serial_sti_asc.c
index 40381b5..ef68e58 100644
--- a/drivers/serial/serial_sti_asc.c
+++ b/drivers/serial/serial_sti_asc.c
@@ -6,7 +6,6 @@
* Author(s): Patrice Chotard, <patrice.chotard@foss.st.com> for STMicroelectronics.
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <serial.h>
diff --git a/drivers/serial/serial_stm32.c b/drivers/serial/serial_stm32.c
index fb03954..1ee5814 100644
--- a/drivers/serial/serial_stm32.c
+++ b/drivers/serial/serial_stm32.c
@@ -6,7 +6,6 @@
#define LOG_CATEGORY UCLASS_SERIAL
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <log.h>
diff --git a/drivers/serial/serial_uniphier.c b/drivers/serial/serial_uniphier.c
index 27e4b92..a566ba7 100644
--- a/drivers/serial/serial_uniphier.c
+++ b/drivers/serial/serial_uniphier.c
@@ -5,7 +5,6 @@
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*/
-#include <common.h>
#include <dm.h>
#include <linux/bitfield.h>
#include <linux/bitops.h>
diff --git a/drivers/serial/serial_xen.c b/drivers/serial/serial_xen.c
index ab318b0..e05805f 100644
--- a/drivers/serial/serial_xen.c
+++ b/drivers/serial/serial_xen.c
@@ -3,7 +3,6 @@
* (C) 2018 NXP
* (C) 2020 EPAM Systems Inc.
*/
-#include <common.h>
#include <cpu_func.h>
#include <dm.h>
#include <serial.h>
diff --git a/drivers/serial/serial_xuartlite.c b/drivers/serial/serial_xuartlite.c
index b6197da..eb23410 100644
--- a/drivers/serial/serial_xuartlite.c
+++ b/drivers/serial/serial_xuartlite.c
@@ -8,7 +8,6 @@
*/
#include <config.h>
-#include <common.h>
#include <dm.h>
#include <asm/io.h>
#include <linux/bitops.h>
@@ -23,7 +22,7 @@
#define ULITE_CONTROL_RST_TX 0x01
#define ULITE_CONTROL_RST_RX 0x02
-static bool little_endian;
+static bool little_endian __section(".data");
struct uartlite {
unsigned int rx_fifo;
diff --git a/drivers/serial/serial_zynq.c b/drivers/serial/serial_zynq.c
index 1847d1f..55f13c0 100644
--- a/drivers/serial/serial_zynq.c
+++ b/drivers/serial/serial_zynq.c
@@ -5,7 +5,6 @@
*/
#include <clk.h>
-#include <common.h>
#include <debug_uart.h>
#include <dm.h>
#include <errno.h>
diff --git a/drivers/serial/usbtty.c b/drivers/serial/usbtty.c
index ecb6ba8..ae3ac80 100644
--- a/drivers/serial/usbtty.c
+++ b/drivers/serial/usbtty.c
@@ -7,7 +7,6 @@
* Bryan O'Donoghue, bodonoghue@codehermit.ie
*/
-#include <common.h>
#include <config.h>
#include <circbuf.h>
#include <env.h>
diff --git a/drivers/sm/meson-sm.c b/drivers/sm/meson-sm.c
index 15b3b0e..87eba14 100644
--- a/drivers/sm/meson-sm.c
+++ b/drivers/sm/meson-sm.c
@@ -5,7 +5,6 @@
* Author: Alexey Romanov <avromanov@salutedevices.com>
*/
-#include <common.h>
#include <dm.h>
#include <regmap.h>
#include <sm.h>
diff --git a/drivers/sm/sandbox-sm.c b/drivers/sm/sandbox-sm.c
index 109ddb2..a95e685 100644
--- a/drivers/sm/sandbox-sm.c
+++ b/drivers/sm/sandbox-sm.c
@@ -5,7 +5,6 @@
* Author: Alexey Romanov <avromanov@salutedevices.com>
*/
-#include <common.h>
#include <sm.h>
#include <sm-uclass.h>
#include <sandbox-sm.h>
diff --git a/drivers/sm/sm-uclass.c b/drivers/sm/sm-uclass.c
index 6a8b702..abca005 100644
--- a/drivers/sm/sm-uclass.c
+++ b/drivers/sm/sm-uclass.c
@@ -5,7 +5,6 @@
* Author: Alexey Romanov <avromanov@salutedevices.com>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <sm-uclass.h>
diff --git a/drivers/smem/msm_smem.c b/drivers/smem/msm_smem.c
index 17ee6c8..ccd145f 100644
--- a/drivers/smem/msm_smem.c
+++ b/drivers/smem/msm_smem.c
@@ -5,7 +5,6 @@
* Copyright (c) 2018, Ramon Fried <ramon.fried@gmail.com>
*/
-#include <common.h>
#include <errno.h>
#include <dm.h>
#include <asm/global_data.h>
diff --git a/drivers/smem/sandbox_smem.c b/drivers/smem/sandbox_smem.c
index 7397e44..fec98e5 100644
--- a/drivers/smem/sandbox_smem.c
+++ b/drivers/smem/sandbox_smem.c
@@ -3,7 +3,6 @@
* Copyright (c) 2018 Ramon Fried <ramon.fried@gmail.com>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <smem.h>
diff --git a/drivers/smem/smem-uclass.c b/drivers/smem/smem-uclass.c
index 8469076..4dea5cc 100644
--- a/drivers/smem/smem-uclass.c
+++ b/drivers/smem/smem-uclass.c
@@ -5,7 +5,6 @@
#define LOG_CATEGORY UCLASS_SMEM
-#include <common.h>
#include <dm.h>
#include <smem.h>
diff --git a/drivers/soc/soc-uclass.c b/drivers/soc/soc-uclass.c
index 8b3044f..744cdda 100644
--- a/drivers/soc/soc-uclass.c
+++ b/drivers/soc/soc-uclass.c
@@ -6,7 +6,6 @@
#define LOG_CATEGORY UCLASS_SOC
-#include <common.h>
#include <soc.h>
#include <dm.h>
#include <errno.h>
diff --git a/drivers/soc/soc_sandbox.c b/drivers/soc/soc_sandbox.c
index 15fdd99..8d621e8 100644
--- a/drivers/soc/soc_sandbox.c
+++ b/drivers/soc/soc_sandbox.c
@@ -6,7 +6,6 @@
* Dave Gerlach <d-gerlach@ti.com>
*/
-#include <common.h>
#include <dm.h>
#include <soc.h>
diff --git a/drivers/soc/soc_ti_k3.c b/drivers/soc/soc_ti_k3.c
index 3a4e58b..b585e47 100644
--- a/drivers/soc/soc_ti_k3.c
+++ b/drivers/soc/soc_ti_k3.c
@@ -4,7 +4,6 @@
* Dave Gerlach <d-gerlach@ti.com>
*/
-#include <common.h>
#include <dm.h>
#include <soc.h>
diff --git a/drivers/soc/soc_xilinx_versal.c b/drivers/soc/soc_xilinx_versal.c
index 3d8c25c..7427f84 100644
--- a/drivers/soc/soc_xilinx_versal.c
+++ b/drivers/soc/soc_xilinx_versal.c
@@ -5,7 +5,6 @@
* Copyright (C) 2021 Xilinx, Inc.
*/
-#include <common.h>
#include <dm.h>
#include <soc.h>
#include <zynqmp_firmware.h>
diff --git a/drivers/soc/soc_xilinx_versal_net.c b/drivers/soc/soc_xilinx_versal_net.c
index 146d068..d64fc36 100644
--- a/drivers/soc/soc_xilinx_versal_net.c
+++ b/drivers/soc/soc_xilinx_versal_net.c
@@ -5,7 +5,6 @@
* Copyright (C) 2022, Advanced Micro Devices, Inc.
*/
-#include <common.h>
#include <dm.h>
#include <soc.h>
#include <zynqmp_firmware.h>
diff --git a/drivers/soc/soc_xilinx_zynqmp.c b/drivers/soc/soc_xilinx_zynqmp.c
index 786825d..a2d5b82 100644
--- a/drivers/soc/soc_xilinx_zynqmp.c
+++ b/drivers/soc/soc_xilinx_zynqmp.c
@@ -9,7 +9,6 @@
* Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
*/
-#include <common.h>
#include <dm.h>
#include <dm/device_compat.h>
#include <asm/cache.h>
@@ -44,6 +43,7 @@
ZYNQMP_VARIANT_DR = BIT(3),
ZYNQMP_VARIANT_DR_SE = BIT(4),
ZYNQMP_VARIANT_EG_SE = BIT(5),
+ ZYNQMP_VARIANT_TEG = BIT(6),
};
struct zynqmp_device {
@@ -75,6 +75,11 @@
.variants = ZYNQMP_VARIANT_EG | ZYNQMP_VARIANT_CG,
},
{
+ .id = 0x04718093,
+ .device = 3,
+ .variants = ZYNQMP_VARIANT_TEG,
+ },
+ {
.id = 0x04721093,
.device = 4,
.variants = ZYNQMP_VARIANT_EG | ZYNQMP_VARIANT_CG |
@@ -299,6 +304,8 @@
strlcat(priv->machine, "dr", sizeof(priv->machine));
} else if (device->variants & ZYNQMP_VARIANT_DR_SE) {
strlcat(priv->machine, "dr_SE", sizeof(priv->machine));
+ } else if (device->variants & ZYNQMP_VARIANT_TEG) {
+ strlcat(priv->machine, "teg", sizeof(priv->machine));
}
return 0;
diff --git a/drivers/soc/ti/k3-navss-ringacc.c b/drivers/soc/ti/k3-navss-ringacc.c
index 7a2fbb0..d3f3d47 100644
--- a/drivers/soc/ti/k3-navss-ringacc.c
+++ b/drivers/soc/ti/k3-navss-ringacc.c
@@ -5,7 +5,6 @@
* Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com
*/
-#include <common.h>
#include <cpu_func.h>
#include <log.h>
#include <asm/cache.h>
@@ -418,7 +417,7 @@
k3_ringacc_ring_reconfig_qmode_sci(
ring, K3_NAV_RINGACC_RING_MODE_RING);
/*
- * 4. Ring the doorbell 2**22 – ringOcc times.
+ * 4. Ring the doorbell 2**22 - ringOcc times.
* This will wrap the internal UDMAP ring state occupancy
* counter (which is 21-bits wide) to 0.
*/
diff --git a/drivers/soc/ti/keystone_serdes.c b/drivers/soc/ti/keystone_serdes.c
index 0e1bf8f..b196179 100644
--- a/drivers/soc/ti/keystone_serdes.c
+++ b/drivers/soc/ti/keystone_serdes.c
@@ -7,7 +7,6 @@
*/
#include <errno.h>
-#include <common.h>
#include <asm/io.h>
#include <asm/ti-common/keystone_serdes.h>
#include <linux/bitops.h>
diff --git a/drivers/soc/ti/pruss.c b/drivers/soc/ti/pruss.c
index 4613909..8df8140 100644
--- a/drivers/soc/ti/pruss.c
+++ b/drivers/soc/ti/pruss.c
@@ -5,7 +5,6 @@
* Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/
*/
-#include <common.h>
#include <dm.h>
#include <dm/of_access.h>
#include <errno.h>
diff --git a/drivers/sound/broadwell_i2s.c b/drivers/sound/broadwell_i2s.c
index 7f754e6..bc44b5e 100644
--- a/drivers/sound/broadwell_i2s.c
+++ b/drivers/sound/broadwell_i2s.c
@@ -9,7 +9,6 @@
#define LOG_CATEGORY UCLASS_I2S
-#include <common.h>
#include <dm.h>
#include <i2s.h>
#include <log.h>
diff --git a/drivers/sound/broadwell_sound.c b/drivers/sound/broadwell_sound.c
index 6e083fe..473f8d8 100644
--- a/drivers/sound/broadwell_sound.c
+++ b/drivers/sound/broadwell_sound.c
@@ -8,7 +8,6 @@
#define LOG_CATEGORY UCLASS_SOUND
-#include <common.h>
#include <audio_codec.h>
#include <dm.h>
#include <i2s.h>
diff --git a/drivers/sound/codec-uclass.c b/drivers/sound/codec-uclass.c
index 2cb233b..1c15606 100644
--- a/drivers/sound/codec-uclass.c
+++ b/drivers/sound/codec-uclass.c
@@ -6,7 +6,6 @@
#define LOG_CATEGORY UCLASS_AUDIO_CODEC
-#include <common.h>
#include <dm.h>
#include <audio_codec.h>
diff --git a/drivers/sound/da7219.c b/drivers/sound/da7219.c
index c1edef4..5b9b3f6 100644
--- a/drivers/sound/da7219.c
+++ b/drivers/sound/da7219.c
@@ -6,7 +6,6 @@
* Parts taken from coreboot
*/
-#include <common.h>
#include <dm.h>
#include <i2c.h>
#include <irq.h>
diff --git a/drivers/sound/hda_codec.c b/drivers/sound/hda_codec.c
index af6148e..da8bde6 100644
--- a/drivers/sound/hda_codec.c
+++ b/drivers/sound/hda_codec.c
@@ -7,7 +7,6 @@
#define LOG_CATEGORY UCLASS_SOUND
-#include <common.h>
#include <dm.h>
#include <hda_codec.h>
#include <log.h>
diff --git a/drivers/sound/i2s-uclass.c b/drivers/sound/i2s-uclass.c
index fc4f686..6263c4d 100644
--- a/drivers/sound/i2s-uclass.c
+++ b/drivers/sound/i2s-uclass.c
@@ -6,7 +6,6 @@
#define LOG_CATEGORY UCLASS_I2S
-#include <common.h>
#include <dm.h>
#include <i2s.h>
diff --git a/drivers/sound/i8254_beep.c b/drivers/sound/i8254_beep.c
index 5572dc4..7234ad4 100644
--- a/drivers/sound/i8254_beep.c
+++ b/drivers/sound/i8254_beep.c
@@ -3,7 +3,6 @@
* Copyright 2018 Google LLC
*/
-#include <common.h>
#include <dm.h>
#include <sound.h>
#include <asm/i8254.h>
diff --git a/drivers/sound/ivybridge_sound.c b/drivers/sound/ivybridge_sound.c
index d982219..aeeba1d 100644
--- a/drivers/sound/ivybridge_sound.c
+++ b/drivers/sound/ivybridge_sound.c
@@ -12,7 +12,6 @@
#define LOG_CATEGORY UCLASS_SOUND
-#include <common.h>
#include <dm.h>
#include <hda_codec.h>
#include <log.h>
diff --git a/drivers/sound/max98088.c b/drivers/sound/max98088.c
index c0463b8..d903764 100644
--- a/drivers/sound/max98088.c
+++ b/drivers/sound/max98088.c
@@ -8,7 +8,6 @@
* following the changes made in max98095.c
*/
-#include <common.h>
#include <audio_codec.h>
#include <div64.h>
#include <dm.h>
diff --git a/drivers/sound/max98090.c b/drivers/sound/max98090.c
index a798762..18a3ffa 100644
--- a/drivers/sound/max98090.c
+++ b/drivers/sound/max98090.c
@@ -5,7 +5,6 @@
* Copyright 2011 Maxim Integrated Products
*/
-#include <common.h>
#include <audio_codec.h>
#include <div64.h>
#include <dm.h>
diff --git a/drivers/sound/max98095.c b/drivers/sound/max98095.c
index d0f701a..96e772c 100644
--- a/drivers/sound/max98095.c
+++ b/drivers/sound/max98095.c
@@ -7,7 +7,6 @@
* Modified for U-Boot by R. Chandrasekar (rcsekar@samsung.com)
*/
-#include <common.h>
#include <audio_codec.h>
#include <dm.h>
#include <div64.h>
diff --git a/drivers/sound/max98357a.c b/drivers/sound/max98357a.c
index bdf6dc2..da56ffd 100644
--- a/drivers/sound/max98357a.c
+++ b/drivers/sound/max98357a.c
@@ -6,7 +6,6 @@
* Parts taken from coreboot
*/
-#include <common.h>
#include <audio_codec.h>
#include <dm.h>
#include <log.h>
diff --git a/drivers/sound/maxim_codec.c b/drivers/sound/maxim_codec.c
index 6553d95..98f094c 100644
--- a/drivers/sound/maxim_codec.c
+++ b/drivers/sound/maxim_codec.c
@@ -5,7 +5,6 @@
* Copyright 2011 Maxim Integrated Products
*/
-#include <common.h>
#include <div64.h>
#include <i2c.h>
#include <i2s.h>
diff --git a/drivers/sound/rockchip_i2s.c b/drivers/sound/rockchip_i2s.c
index 4e9e68a..5078dfb 100644
--- a/drivers/sound/rockchip_i2s.c
+++ b/drivers/sound/rockchip_i2s.c
@@ -7,7 +7,6 @@
#define LOG_CATEGORY UCLASS_I2S
-#include <common.h>
#include <dm.h>
#include <i2s.h>
#include <log.h>
diff --git a/drivers/sound/rockchip_sound.c b/drivers/sound/rockchip_sound.c
index 94058e6..418d2ef 100644
--- a/drivers/sound/rockchip_sound.c
+++ b/drivers/sound/rockchip_sound.c
@@ -6,7 +6,6 @@
#define LOG_CATEGORY UCLASS_SOUND
-#include <common.h>
#include <audio_codec.h>
#include <clk.h>
#include <dm.h>
diff --git a/drivers/sound/rt5677.c b/drivers/sound/rt5677.c
index b655bb4..b5c997c 100644
--- a/drivers/sound/rt5677.c
+++ b/drivers/sound/rt5677.c
@@ -5,7 +5,6 @@
#define LOG_CATEGORY UCLASS_SOUND
-#include <common.h>
#include <audio_codec.h>
#include <dm.h>
#include <i2c.h>
diff --git a/drivers/sound/samsung-i2s.c b/drivers/sound/samsung-i2s.c
index dc5a278..42175fd 100644
--- a/drivers/sound/samsung-i2s.c
+++ b/drivers/sound/samsung-i2s.c
@@ -4,11 +4,11 @@
* R. Chandrasekar <rcsekar@samsung.com>
*/
-#include <common.h>
#include <dm.h>
#include <i2s.h>
#include <log.h>
#include <sound.h>
+#include <time.h>
#include <asm/arch/clk.h>
#include <asm/arch/pinmux.h>
#include <asm/arch/i2s-regs.h>
diff --git a/drivers/sound/samsung_sound.c b/drivers/sound/samsung_sound.c
index 473cedf..9150ad4 100644
--- a/drivers/sound/samsung_sound.c
+++ b/drivers/sound/samsung_sound.c
@@ -4,7 +4,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <audio_codec.h>
#include <dm.h>
#include <i2s.h>
diff --git a/drivers/sound/sandbox.c b/drivers/sound/sandbox.c
index c6cbd81..31ae153 100644
--- a/drivers/sound/sandbox.c
+++ b/drivers/sound/sandbox.c
@@ -5,7 +5,6 @@
#define LOG_CATEGORY UCLASS_SOUND
-#include <common.h>
#include <audio_codec.h>
#include <dm.h>
#include <i2s.h>
diff --git a/drivers/sound/sound-uclass.c b/drivers/sound/sound-uclass.c
index 2ffc4fc..b8a3dab 100644
--- a/drivers/sound/sound-uclass.c
+++ b/drivers/sound/sound-uclass.c
@@ -6,7 +6,6 @@
#define LOG_CATEGORY UCLASS_SOUND
-#include <common.h>
#include <dm.h>
#include <i2s.h>
#include <log.h>
diff --git a/drivers/sound/sound.c b/drivers/sound/sound.c
index c0fc50c..4fde298 100644
--- a/drivers/sound/sound.c
+++ b/drivers/sound/sound.c
@@ -4,9 +4,9 @@
* R. Chandrasekar <rcsekar@samsung.com>
*/
-#include <common.h>
#include <log.h>
#include <sound.h>
+#include <linux/string.h>
void sound_create_square_wave(uint sample_rate, unsigned short *data, int size,
uint freq, uint channels)
diff --git a/drivers/sound/tegra_ahub.c b/drivers/sound/tegra_ahub.c
index 495a29c..8f1b0c0 100644
--- a/drivers/sound/tegra_ahub.c
+++ b/drivers/sound/tegra_ahub.c
@@ -7,11 +7,11 @@
#define LOG_CATEGORY UCLASS_MISC
-#include <common.h>
#include <dm.h>
#include <i2s.h>
#include <log.h>
#include <misc.h>
+#include <time.h>
#include <asm/io.h>
#include <asm/arch-tegra/tegra_ahub.h>
#include <asm/arch-tegra/tegra_i2s.h>
diff --git a/drivers/sound/tegra_i2s.c b/drivers/sound/tegra_i2s.c
index 932f737..357aac3 100644
--- a/drivers/sound/tegra_i2s.c
+++ b/drivers/sound/tegra_i2s.c
@@ -5,7 +5,6 @@
*/
#define LOG_CATEGORY UCLASS_I2S
-#include <common.h>
#include <dm.h>
#include <i2s.h>
#include <log.h>
diff --git a/drivers/sound/tegra_sound.c b/drivers/sound/tegra_sound.c
index aef6a2e..152c929 100644
--- a/drivers/sound/tegra_sound.c
+++ b/drivers/sound/tegra_sound.c
@@ -6,7 +6,6 @@
#define LOG_CATEGORY UCLASS_I2S
-#include <common.h>
#include <audio_codec.h>
#include <dm.h>
#include <i2s.h>
diff --git a/drivers/sound/wm8994.c b/drivers/sound/wm8994.c
index fd64647..6b3091a 100644
--- a/drivers/sound/wm8994.c
+++ b/drivers/sound/wm8994.c
@@ -3,7 +3,6 @@
* Copyright (C) 2012 Samsung Electronics
* R. Chandrasekar <rcsekar@samsung.com>
*/
-#include <common.h>
#include <audio_codec.h>
#include <dm.h>
#include <div64.h>
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 69b184b..35030ab 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -168,6 +168,14 @@
Enable the ColdFire SPI driver. This driver can be used on
some m68k SoCs.
+config CV1800B_SPIF
+ bool "Sophgo cv1800b SPI Flash Controller driver"
+ depends on SPI_MEM
+ help
+ Enable the Sophgo cv1800b SPI Flash Controller driver. This driver
+ can be used to access the SPI NOR flash on platforms embedding this
+ Sophgo cv1800b IP core.
+
config DAVINCI_SPI
bool "Davinci & Keystone SPI driver"
depends on ARCH_DAVINCI || ARCH_KEYSTONE
@@ -262,7 +270,7 @@
config MPC8XX_SPI
bool "MPC8XX SPI Driver"
- depends on MPC8xx
+ depends on MPC8xx && DM_GPIO
help
Enable support for SPI on MPC8XX
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index 14bdb97..32d7bf7 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -30,6 +30,7 @@
obj-$(CONFIG_BCMSTB_SPI) += bcmstb_spi.o
obj-$(CONFIG_CF_SPI) += cf_spi.o
obj-$(CONFIG_CORTINA_SFLASH) += ca_sflash.o
+obj-$(CONFIG_CV1800B_SPIF) += cv1800b_spif.o
obj-$(CONFIG_DAVINCI_SPI) += davinci_spi.o
obj-$(CONFIG_DESIGNWARE_SPI) += designware_spi.o
obj-$(CONFIG_EXYNOS_SPI) += exynos_spi.o
diff --git a/drivers/spi/altera_spi.c b/drivers/spi/altera_spi.c
index 989679e..8e227d1 100644
--- a/drivers/spi/altera_spi.c
+++ b/drivers/spi/altera_spi.c
@@ -6,7 +6,6 @@
* Copyright (c) 2005-2008 Analog Devices Inc.
* Copyright (C) 2010 Thomas Chou <thomas@wytron.com.tw>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <log.h>
diff --git a/drivers/spi/apple_spi.c b/drivers/spi/apple_spi.c
index f35f5af..5f94e9f 100644
--- a/drivers/spi/apple_spi.c
+++ b/drivers/spi/apple_spi.c
@@ -4,7 +4,6 @@
* Copyright The Asahi Linux Contributors
*/
-#include <common.h>
#include <dm.h>
#include <clk.h>
#include <spi.h>
diff --git a/drivers/spi/atcspi200_spi.c b/drivers/spi/atcspi200_spi.c
index 70cb242..929bf90 100644
--- a/drivers/spi/atcspi200_spi.c
+++ b/drivers/spi/atcspi200_spi.c
@@ -6,7 +6,6 @@
* Author: Rick Chen (rick@andestech.com)
*/
-#include <common.h>
#include <clk.h>
#include <log.h>
#include <malloc.h>
diff --git a/drivers/spi/ath79_spi.c b/drivers/spi/ath79_spi.c
index 205567e..faefac7 100644
--- a/drivers/spi/ath79_spi.c
+++ b/drivers/spi/ath79_spi.c
@@ -3,7 +3,6 @@
* Copyright (C) 2015-2016 Wills Wang <wills.wang@live.com>
*/
-#include <common.h>
#include <clock_legacy.h>
#include <spi.h>
#include <dm.h>
diff --git a/drivers/spi/atmel-quadspi.c b/drivers/spi/atmel-quadspi.c
index bd73e4f..3efb661 100644
--- a/drivers/spi/atmel-quadspi.c
+++ b/drivers/spi/atmel-quadspi.c
@@ -12,7 +12,6 @@
#include <malloc.h>
#include <asm/io.h>
#include <clk.h>
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <fdtdec.h>
diff --git a/drivers/spi/atmel_spi.c b/drivers/spi/atmel_spi.c
index d4f0c4c..79f0100 100644
--- a/drivers/spi/atmel_spi.c
+++ b/drivers/spi/atmel_spi.c
@@ -2,7 +2,6 @@
/*
* Copyright (C) 2007 Atmel Corporation
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <fdtdec.h>
diff --git a/drivers/spi/bcm63xx_hsspi.c b/drivers/spi/bcm63xx_hsspi.c
index 23ac5bb..1aa43fd 100644
--- a/drivers/spi/bcm63xx_hsspi.c
+++ b/drivers/spi/bcm63xx_hsspi.c
@@ -7,7 +7,6 @@
* Copyright (C) 2012-2013 Jonas Gorski <jogo@openwrt.org>
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <log.h>
diff --git a/drivers/spi/bcm63xx_spi.c b/drivers/spi/bcm63xx_spi.c
index 889ac1f..595b41c 100644
--- a/drivers/spi/bcm63xx_spi.c
+++ b/drivers/spi/bcm63xx_spi.c
@@ -7,7 +7,6 @@
* Copyright (C) 2010 Tanguy Bouzeloc <tanguy.bouzeloc@efixo.com>
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <log.h>
diff --git a/drivers/spi/bcmbca_hsspi.c b/drivers/spi/bcmbca_hsspi.c
index af45882..eff9e11 100644
--- a/drivers/spi/bcmbca_hsspi.c
+++ b/drivers/spi/bcmbca_hsspi.c
@@ -8,7 +8,6 @@
* Copyright (C) 2021 Broadcom Ltd
*/
-#include <common.h>
#include <asm/io.h>
#include <clk.h>
#include <spi.h>
diff --git a/drivers/spi/ca_sflash.c b/drivers/spi/ca_sflash.c
index 38bddd3..a99a8a4 100644
--- a/drivers/spi/ca_sflash.c
+++ b/drivers/spi/ca_sflash.c
@@ -7,7 +7,6 @@
* Author: PengPeng Chen <pengpeng.chen@cortina-access.com>
*/
-#include <common.h>
#include <malloc.h>
#include <clk.h>
#include <dm.h>
diff --git a/drivers/spi/cadence_ospi_versal.c b/drivers/spi/cadence_ospi_versal.c
index c2be307..222f828 100644
--- a/drivers/spi/cadence_ospi_versal.c
+++ b/drivers/spi/cadence_ospi_versal.c
@@ -6,7 +6,6 @@
*/
#include <clk.h>
-#include <common.h>
#include <memalign.h>
#include <wait_bit.h>
#include <asm/io.h>
diff --git a/drivers/spi/cadence_qspi.c b/drivers/spi/cadence_qspi.c
index f4593c4..75e5223 100644
--- a/drivers/spi/cadence_qspi.c
+++ b/drivers/spi/cadence_qspi.c
@@ -4,7 +4,6 @@
* Altera Corporation <www.altera.com>
*/
-#include <common.h>
#include <clk.h>
#include <log.h>
#include <dm.h>
diff --git a/drivers/spi/cadence_qspi_apb.c b/drivers/spi/cadence_qspi_apb.c
index fb90532..93ab2b5 100644
--- a/drivers/spi/cadence_qspi_apb.c
+++ b/drivers/spi/cadence_qspi_apb.c
@@ -25,7 +25,6 @@
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
-#include <common.h>
#include <log.h>
#include <asm/io.h>
#include <dma.h>
diff --git a/drivers/spi/cf_spi.c b/drivers/spi/cf_spi.c
index 1a841b5..8234468 100644
--- a/drivers/spi/cf_spi.c
+++ b/drivers/spi/cf_spi.c
@@ -13,7 +13,6 @@
* TODO: fsl_dspi.c should work as a driver for the DSPI module.
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <asm/global_data.h>
diff --git a/drivers/spi/cv1800b_spif.c b/drivers/spi/cv1800b_spif.c
new file mode 100644
index 0000000..9c077f3
--- /dev/null
+++ b/drivers/spi/cv1800b_spif.c
@@ -0,0 +1,321 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2024, Kongyang Liu <seashell11234455@gmail.com>
+ */
+
+#include <clk.h>
+#include <dm.h>
+#include <linux/bitops.h>
+#include <linux/io.h>
+#include <linux/kernel.h>
+#include <spi-mem.h>
+#include <spi.h>
+#include <spi_flash.h>
+#include <wait_bit.h>
+
+#define CV1800B_SPI_CTRL_SCK_DIV_MASK GENMASK(10, 0)
+#define CV1800B_SPI_CTRL_CPHA BIT(12)
+#define CV1800B_SPI_CTRL_CPOL BIT(13)
+
+#define CV1800B_SPI_CE_MANUAL BIT(0)
+#define CV1800B_SPI_CE_MANUAL_EN BIT(1)
+#define CV1800B_SPI_CE_ENABLE (CV1800B_SPI_CE_MANUAL | \
+ CV1800B_SPI_CE_MANUAL_EN)
+#define CV1800B_SPI_CE_DISABLE CV1800B_SPI_CE_MANUAL_EN
+#define CV1800B_SPI_CE_HARDWARE 0
+
+#define CV1800B_SPI_DLY_CTRL_NEG_SAMPLE BIT(14)
+
+#define CV1800B_SPI_TRAN_MODE_RX BIT(0)
+#define CV1800B_SPI_TRAN_MODE_TX BIT(1)
+#define CV1800B_SPI_TRAN_FAST_MODE BIT(3)
+#define CV1800B_SPI_TRAN_BUS_WIDTH_1_BIT 0x0
+#define CV1800B_SPI_TRAN_BUS_WIDTH_2_BIT BIT(4)
+#define CV1800B_SPI_TRAN_BUS_WIDTH_4_BIT BIT(5)
+#define CV1800B_SPI_TRAN_ADDR_3_BYTES (3 << 8)
+#define CV1800B_SPI_TRAN_ADDR_4_BYTES (4 << 8)
+#define CV1800B_SPI_TRAN_WITH_CMD BIT(11)
+#define CV1800B_SPI_TRAN_GO_BUSY BIT(15)
+#define CV1800B_SPI_TRAN_DUMMY_CYC_MASK GENMASK(19, 16)
+#define CV1800B_SPI_TRAN_DUMMY_CYC_OFFSET 16
+#define CV1800B_SPI_TRAN_BYTE4_EN BIT(20)
+#define CV1800B_SPI_TRAN_BYTE4_CMD BIT(21)
+
+#define CV1800B_SPI_FF_PT_AVAILABLE_MASK GENMASK(3, 0)
+
+#define CV1800B_SPI_INT_TRAN_DONE BIT(0)
+#define CV1800B_SPI_INT_RD_FIFO BIT(2)
+#define CV1800B_SPI_INT_WR_FIFO BIT(3)
+
+#define CV1800B_FIFO_CAPACITY 8
+#define CV1800B_DEFAULT_DIV 4
+
+struct cv1800b_spif_regs {
+ u32 spi_ctrl;
+ u32 ce_ctrl;
+ u32 dly_ctrl;
+ u32 dmmr_ctrl;
+ u32 tran_csr;
+ u32 tran_num;
+ u32 ff_port;
+ u32 reserved0;
+ u32 ff_pt;
+ u32 reserved1;
+ u32 int_sts;
+ u32 int_en;
+};
+
+struct cv1800b_spi_priv {
+ struct cv1800b_spif_regs *regs;
+ uint clk_freq;
+ uint mode;
+ int div;
+};
+
+static int cv1800b_spi_probe(struct udevice *bus)
+{
+ struct cv1800b_spi_priv *priv = dev_get_priv(bus);
+ struct clk clkdev;
+ int ret;
+
+ priv->regs = (struct cv1800b_spif_regs *)dev_read_addr_ptr(bus);
+ if (priv->regs == 0)
+ return -EINVAL;
+
+ ret = clk_get_by_index(bus, 0, &clkdev);
+ if (ret)
+ return ret;
+ priv->clk_freq = clk_get_rate(&clkdev);
+
+ /* DMMR mode is enabled by default, disable it */
+ writel(0, &priv->regs->dmmr_ctrl);
+
+ return 0;
+}
+
+static void cv1800b_spi_config_dmmr(struct cv1800b_spi_priv *priv, struct spi_nor *flash)
+{
+ struct cv1800b_spif_regs *regs = priv->regs;
+ u32 read_cmd = flash->read_opcode;
+ u32 val;
+
+ val = CV1800B_SPI_TRAN_MODE_RX | CV1800B_SPI_TRAN_WITH_CMD;
+
+ switch (read_cmd) {
+ case SPINOR_OP_READ_4B:
+ case SPINOR_OP_READ_FAST_4B:
+ case SPINOR_OP_READ_1_1_2_4B:
+ case SPINOR_OP_READ_1_1_4_4B:
+ val |= CV1800B_SPI_TRAN_ADDR_4_BYTES |
+ CV1800B_SPI_TRAN_BYTE4_EN | CV1800B_SPI_TRAN_BYTE4_CMD;
+ break;
+ case SPINOR_OP_READ:
+ case SPINOR_OP_READ_FAST:
+ case SPINOR_OP_READ_1_1_2:
+ case SPINOR_OP_READ_1_1_4:
+ val |= CV1800B_SPI_TRAN_ADDR_3_BYTES;
+ break;
+ }
+
+ switch (read_cmd) {
+ case SPINOR_OP_READ_FAST:
+ case SPINOR_OP_READ_FAST_4B:
+ val |= CV1800B_SPI_TRAN_FAST_MODE;
+ break;
+ }
+
+ switch (read_cmd) {
+ case SPINOR_OP_READ_1_1_2:
+ case SPINOR_OP_READ_1_1_2_4B:
+ val |= CV1800B_SPI_TRAN_BUS_WIDTH_2_BIT;
+ break;
+ case SPINOR_OP_READ_1_1_4:
+ case SPINOR_OP_READ_1_1_4_4B:
+ val |= CV1800B_SPI_TRAN_BUS_WIDTH_4_BIT;
+ break;
+ }
+
+ val |= (flash->read_dummy & CV1800B_SPI_TRAN_DUMMY_CYC_MASK)
+ << CV1800B_SPI_TRAN_DUMMY_CYC_OFFSET;
+ writel(val, ®s->tran_csr);
+}
+
+static void cv1800b_set_clk_div(struct cv1800b_spi_priv *priv, u32 div)
+{
+ struct cv1800b_spif_regs *regs = priv->regs;
+ u32 neg_sample = 0;
+
+ clrsetbits_le32(®s->spi_ctrl, CV1800B_SPI_CTRL_SCK_DIV_MASK, div);
+
+ if (div < CV1800B_DEFAULT_DIV)
+ neg_sample = CV1800B_SPI_DLY_CTRL_NEG_SAMPLE;
+ clrsetbits_le32(®s->dly_ctrl, CV1800B_SPI_DLY_CTRL_NEG_SAMPLE, neg_sample);
+}
+
+static int cv1800b_spi_transfer(struct cv1800b_spi_priv *priv,
+ u8 *din, const u8 *dout, uint len, ulong flags)
+{
+ struct cv1800b_spif_regs *regs = priv->regs;
+ u32 tran_csr;
+ u32 xfer_size, off;
+ u32 fifo_cnt;
+ u32 interrupt_mask;
+
+ if (din) {
+ /* Slow down on receiving */
+ cv1800b_set_clk_div(priv, CV1800B_DEFAULT_DIV);
+ interrupt_mask = CV1800B_SPI_INT_RD_FIFO;
+ } else {
+ interrupt_mask = CV1800B_SPI_INT_WR_FIFO;
+ }
+
+ writel(0, ®s->ff_pt);
+ writel(len, ®s->tran_num);
+
+ tran_csr = CV1800B_SPI_TRAN_GO_BUSY;
+ if (din) {
+ tran_csr |= CV1800B_SPI_TRAN_MODE_RX;
+ } else {
+ tran_csr |= CV1800B_SPI_TRAN_MODE_TX;
+ if (!(flags & SPI_XFER_BEGIN) && (priv->mode & SPI_TX_QUAD))
+ tran_csr |= CV1800B_SPI_TRAN_BUS_WIDTH_4_BIT;
+ }
+ writel(tran_csr, ®s->tran_csr);
+
+ wait_for_bit_le32(®s->int_sts, interrupt_mask, true, 3000, false);
+
+ off = 0;
+ while (off < len) {
+ xfer_size = min_t(u32, len - off, CV1800B_FIFO_CAPACITY);
+
+ fifo_cnt = readl(®s->ff_pt) & CV1800B_SPI_FF_PT_AVAILABLE_MASK;
+ if (din)
+ xfer_size = min(xfer_size, fifo_cnt);
+ else
+ xfer_size = min(xfer_size, CV1800B_FIFO_CAPACITY - fifo_cnt);
+
+ while (xfer_size--) {
+ if (din)
+ din[off++] = readb(®s->ff_port);
+ else
+ writeb(dout[off++], ®s->ff_port);
+ }
+ }
+
+ wait_for_bit_le32(®s->int_sts, CV1800B_SPI_INT_TRAN_DONE, true, 3000, false);
+ writel(0, ®s->ff_pt);
+ clrbits_le32(®s->int_sts, CV1800B_SPI_INT_TRAN_DONE | interrupt_mask);
+
+ if (din)
+ cv1800b_set_clk_div(priv, priv->div);
+ return 0;
+}
+
+static int cv1800b_spi_xfer(struct udevice *dev, unsigned int bitlen,
+ const void *dout, void *din, unsigned long flags)
+{
+ struct udevice *bus = dev->parent;
+ struct cv1800b_spi_priv *priv = dev_get_priv(bus);
+ struct cv1800b_spif_regs *regs = priv->regs;
+
+ if (bitlen == 0)
+ goto out;
+
+ if (bitlen % 8) {
+ flags |= SPI_XFER_END;
+ goto out;
+ }
+
+ if (flags & SPI_XFER_BEGIN)
+ writel(CV1800B_SPI_CE_DISABLE, ®s->ce_ctrl);
+
+ if (din || dout)
+ cv1800b_spi_transfer(priv, din, dout, bitlen / 8, flags);
+
+out:
+ if (flags & SPI_XFER_END)
+ writel(CV1800B_SPI_CE_ENABLE, ®s->ce_ctrl);
+ return 0;
+}
+
+static int cv1800b_spi_set_speed(struct udevice *bus, uint speed)
+{
+ struct cv1800b_spi_priv *priv = dev_get_priv(bus);
+
+ priv->div = DIV_ROUND_CLOSEST(priv->clk_freq, speed * 2) - 1;
+ if (priv->div <= 0)
+ priv->div = CV1800B_DEFAULT_DIV;
+
+ cv1800b_set_clk_div(priv, priv->div);
+
+ return 0;
+}
+
+static int cv1800b_spi_set_mode(struct udevice *bus, uint mode)
+{
+ struct cv1800b_spi_priv *priv = dev_get_priv(bus);
+ struct cv1800b_spif_regs *regs = priv->regs;
+ u32 val = 0;
+
+ if (mode & SPI_CPHA)
+ val |= CV1800B_SPI_CTRL_CPHA;
+ if (mode & SPI_CPOL)
+ val |= CV1800B_SPI_CTRL_CPOL;
+ clrsetbits_le32(®s->spi_ctrl, CV1800B_SPI_CTRL_CPHA | CV1800B_SPI_CTRL_CPOL, val);
+
+ priv->mode = mode;
+
+ return 0;
+}
+
+static int cv1800b_spi_exec_op(struct spi_slave *slave, const struct spi_mem_op *op)
+{
+ struct udevice *bus = slave->dev->parent;
+ struct cv1800b_spi_priv *priv = dev_get_priv(bus);
+ struct cv1800b_spif_regs *regs = priv->regs;
+ struct spi_nor *flash = dev_get_uclass_priv(slave->dev);
+ u32 old_tran_csr;
+
+ if (!(op->data.nbytes > 0 && op->data.dir == SPI_MEM_DATA_IN) ||
+ !(op->addr.nbytes > 0 && op->addr.nbytes <= 4))
+ return -ENOTSUPP;
+
+ old_tran_csr = readl(®s->tran_csr);
+ writel(CV1800B_SPI_CE_HARDWARE, ®s->ce_ctrl);
+
+ cv1800b_spi_config_dmmr(priv, flash);
+
+ writel(1, ®s->dmmr_ctrl);
+ memcpy(op->data.buf.in, (void *)priv->regs + op->addr.val, op->data.nbytes);
+ writel(0, ®s->dmmr_ctrl);
+
+ writel(CV1800B_SPI_CE_ENABLE, ®s->ce_ctrl);
+ writel(old_tran_csr, ®s->tran_csr);
+
+ return 0;
+}
+
+static const struct spi_controller_mem_ops cv1800b_spi_mem_ops = {
+ .exec_op = cv1800b_spi_exec_op,
+};
+
+static const struct dm_spi_ops cv1800b_spi_ops = {
+ .xfer = cv1800b_spi_xfer,
+ .mem_ops = &cv1800b_spi_mem_ops,
+ .set_speed = cv1800b_spi_set_speed,
+ .set_mode = cv1800b_spi_set_mode,
+};
+
+static const struct udevice_id cv1800b_spi_ids[] = {
+ { .compatible = "sophgo,cv1800b-spif" },
+ { }
+};
+
+U_BOOT_DRIVER(cv1800b_spi) = {
+ .name = "cv1800b_spif",
+ .id = UCLASS_SPI,
+ .of_match = cv1800b_spi_ids,
+ .ops = &cv1800b_spi_ops,
+ .priv_auto = sizeof(struct cv1800b_spi_priv),
+ .probe = cv1800b_spi_probe,
+};
diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c
index 25f5e9f..04c134b 100644
--- a/drivers/spi/davinci_spi.c
+++ b/drivers/spi/davinci_spi.c
@@ -8,7 +8,7 @@
* Copyright (C) 2007 Atmel Corporation
*/
-#include <common.h>
+#include <config.h>
#include <log.h>
#include <spi.h>
#include <malloc.h>
diff --git a/drivers/spi/designware_spi.c b/drivers/spi/designware_spi.c
index 22a79da..6bd48b1 100644
--- a/drivers/spi/designware_spi.c
+++ b/drivers/spi/designware_spi.c
@@ -11,7 +11,6 @@
*/
#define LOG_CATEGORY UCLASS_SPI
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <dm/device_compat.h>
diff --git a/drivers/spi/exynos_spi.c b/drivers/spi/exynos_spi.c
index 1bcc3ad..1b9bf00 100644
--- a/drivers/spi/exynos_spi.c
+++ b/drivers/spi/exynos_spi.c
@@ -4,7 +4,6 @@
* Padmavathi Venna <padma.v@samsung.com>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <log.h>
diff --git a/drivers/spi/fsl_dspi.c b/drivers/spi/fsl_dspi.c
index 9b3d5a9..1d4d90c 100644
--- a/drivers/spi/fsl_dspi.c
+++ b/drivers/spi/fsl_dspi.c
@@ -11,7 +11,6 @@
#include <asm/global_data.h>
#include <linux/math64.h>
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <log.h>
diff --git a/drivers/spi/fsl_espi.c b/drivers/spi/fsl_espi.c
index b1d964d..2638ed2 100644
--- a/drivers/spi/fsl_espi.c
+++ b/drivers/spi/fsl_espi.c
@@ -8,7 +8,7 @@
* Chuanhua Han (chuanhua.han@nxp.com)
*/
-#include <common.h>
+#include <config.h>
#include <log.h>
#include <linux/bitops.h>
#include <linux/delay.h>
diff --git a/drivers/spi/fsl_qspi.c b/drivers/spi/fsl_qspi.c
index 3f97730..8a0a53c 100644
--- a/drivers/spi/fsl_qspi.c
+++ b/drivers/spi/fsl_qspi.c
@@ -23,7 +23,6 @@
* Transition to spi-mem in spi-fsl-qspi.c
*/
-#include <common.h>
#include <dm.h>
#include <dm/device_compat.h>
#include <log.h>
diff --git a/drivers/spi/ich.c b/drivers/spi/ich.c
index 9142ffd..e48ca65 100644
--- a/drivers/spi/ich.c
+++ b/drivers/spi/ich.c
@@ -7,7 +7,6 @@
#define LOG_CATEGORY UCLASS_SPI
-#include <common.h>
#include <bootstage.h>
#include <div64.h>
#include <dm.h>
diff --git a/drivers/spi/iproc_qspi.c b/drivers/spi/iproc_qspi.c
index b5c2743..09f30c2 100644
--- a/drivers/spi/iproc_qspi.c
+++ b/drivers/spi/iproc_qspi.c
@@ -3,7 +3,6 @@
* Copyright 2020-2021 Broadcom
*/
-#include <common.h>
#include <dm.h>
#include <spi.h>
#include <spi-mem.h>
diff --git a/drivers/spi/kirkwood_spi.c b/drivers/spi/kirkwood_spi.c
index 2bb7390..095cbea 100644
--- a/drivers/spi/kirkwood_spi.c
+++ b/drivers/spi/kirkwood_spi.c
@@ -7,7 +7,7 @@
* Derived from drivers/spi/mpc8xxx_spi.c
*/
-#include <common.h>
+#include <config.h>
#include <dm.h>
#include <log.h>
#include <malloc.h>
diff --git a/drivers/spi/meson_spifc.c b/drivers/spi/meson_spifc.c
index d99a151..d7ebb6b 100644
--- a/drivers/spi/meson_spifc.c
+++ b/drivers/spi/meson_spifc.c
@@ -7,7 +7,6 @@
* Amlogic Meson SPI Flash Controller driver
*/
-#include <common.h>
#include <log.h>
#include <spi.h>
#include <clk.h>
diff --git a/drivers/spi/microchip_coreqspi.c b/drivers/spi/microchip_coreqspi.c
index 5fe0c8e..234b168 100644
--- a/drivers/spi/microchip_coreqspi.c
+++ b/drivers/spi/microchip_coreqspi.c
@@ -5,7 +5,6 @@
* Naga Sureshkumar Relli <nagasuresh.relli@microchip.com>
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <log.h>
diff --git a/drivers/spi/mpc8xx_spi.c b/drivers/spi/mpc8xx_spi.c
index 5c8d760..7e72fb9 100644
--- a/drivers/spi/mpc8xx_spi.c
+++ b/drivers/spi/mpc8xx_spi.c
@@ -16,8 +16,8 @@
*
*/
-#include <common.h>
#include <dm.h>
+#include <malloc.h>
#include <mpc8xx.h>
#include <spi.h>
#include <linux/delay.h>
@@ -29,7 +29,8 @@
#define CPM_SPI_BASE_RX CPM_SPI_BASE
#define CPM_SPI_BASE_TX (CPM_SPI_BASE + sizeof(cbd_t))
-#define MAX_BUFFER 0x104
+#define MAX_BUFFER 0x8000 /* Max possible is 0xffff. We want power of 2 */
+#define MIN_HWORD_XFER 64 /* Minimum size for 16 bits transfer */
struct mpc8xx_priv {
spi_t __iomem *spi;
@@ -37,6 +38,8 @@
int max_cs;
};
+static char dummy_buffer[MAX_BUFFER];
+
static int mpc8xx_spi_set_mode(struct udevice *dev, uint mod)
{
return 0;
@@ -44,6 +47,21 @@
static int mpc8xx_spi_set_speed(struct udevice *dev, uint speed)
{
+ immap_t __iomem *immr = (immap_t __iomem *)CONFIG_SYS_IMMR;
+ cpm8xx_t __iomem *cp = &immr->im_cpm;
+ u8 pm = (gd->arch.brg_clk - 1) / (speed * 16);
+
+ if (pm > 16) {
+ setbits_be16(&cp->cp_spmode, SPMODE_DIV16);
+ pm /= 16;
+ if (pm > 16)
+ pm = 16;
+ } else {
+ clrbits_be16(&cp->cp_spmode, SPMODE_DIV16);
+ }
+
+ clrsetbits_be16(&cp->cp_spmode, SPMODE_PM(0xf), SPMODE_PM(pm));
+
return 0;
}
@@ -101,10 +119,6 @@
while (in_be16(&cp->cp_cpcr) & CPM_CR_FLG)
;
-/* 5 */
- /* Set SDMA configuration register */
- out_be32(&immr->im_siu_conf.sc_sdcr, 0x0001);
-
/* 6 */
/* Set to big endian. */
out_8(&spi->spi_tfcr, SMC_EB);
@@ -145,37 +159,52 @@
dm_gpio_set_value(&priv->gpios[platdata->cs], 0);
}
-static int mpc8xx_spi_xfer(struct udevice *dev, unsigned int bitlen,
- const void *dout, void *din, unsigned long flags)
+static int mpc8xx_spi_xfer_one(struct udevice *dev, size_t count,
+ const void *dout, void *din)
{
immap_t __iomem *immr = (immap_t __iomem *)CONFIG_SYS_IMMR;
cpm8xx_t __iomem *cp = &immr->im_cpm;
cbd_t __iomem *tbdf, *rbdf;
+ void *bufout, *bufin;
+ u16 spmode_len;
int tm;
- size_t count = (bitlen + 7) / 8;
-
- if (count > MAX_BUFFER)
- return -EINVAL;
tbdf = (cbd_t __iomem *)&cp->cp_dpmem[CPM_SPI_BASE_TX];
rbdf = (cbd_t __iomem *)&cp->cp_dpmem[CPM_SPI_BASE_RX];
- /* Set CS for device */
- if (flags & SPI_XFER_BEGIN)
- mpc8xx_spi_cs_activate(dev);
+ if (!(count & 1) && count >= MIN_HWORD_XFER) {
+ spmode_len = SPMODE_LEN(16);
+ if (dout) {
+ int i;
+
+ bufout = malloc(count);
+ for (i = 0; i < count; i += 2)
+ *(u16 *)(bufout + i) = swab16(*(u16 *)(dout + i));
+ } else {
+ bufout = NULL;
+ }
+ if (din)
+ bufin = malloc(count);
+ else
+ bufin = NULL;
+ } else {
+ spmode_len = SPMODE_LEN(8);
+ bufout = (void *)dout;
+ bufin = din;
+ }
/* Setting tx bd status and data length */
- out_be32(&tbdf->cbd_bufaddr, (ulong)dout);
+ out_be32(&tbdf->cbd_bufaddr, bufout ? (ulong)bufout : (ulong)dummy_buffer);
out_be16(&tbdf->cbd_sc, BD_SC_READY | BD_SC_LAST | BD_SC_WRAP);
out_be16(&tbdf->cbd_datlen, count);
/* Setting rx bd status and data length */
- out_be32(&rbdf->cbd_bufaddr, (ulong)din);
+ out_be32(&rbdf->cbd_bufaddr, bufin ? (ulong)bufin : (ulong)dummy_buffer);
out_be16(&rbdf->cbd_sc, BD_SC_EMPTY | BD_SC_WRAP);
out_be16(&rbdf->cbd_datlen, 0); /* rx length has no significance */
- clrsetbits_be16(&cp->cp_spmode, ~SPMODE_LOOP, SPMODE_REV | SPMODE_MSTR |
- SPMODE_EN | SPMODE_LEN(8) | SPMODE_PM(0x8));
+ clrsetbits_be16(&cp->cp_spmode, ~(SPMODE_LOOP | SPMODE_PM(0xf) | SPMODE_DIV16),
+ SPMODE_REV | SPMODE_MSTR | SPMODE_EN | spmode_len);
out_8(&cp->cp_spim, 0); /* Mask all SPI events */
out_8(&cp->cp_spie, SPI_EMASK); /* Clear all SPI events */
@@ -196,13 +225,56 @@
}
if (tm >= 1000)
- printf("*** spi_xfer: Time out while xferring to/from SPI!\n");
+ return -ETIMEDOUT;
+ if (!(count & 1) && count > MIN_HWORD_XFER) {
+ if (dout)
+ free(bufout);
+ if (din) {
+ int i;
+
+ bufout = malloc(count);
+ for (i = 0; i < count; i += 2)
+ *(u16 *)(din + i) = swab16(*(u16 *)(bufin + i));
+ free(bufin);
+ }
+ }
+
+ return 0;
+}
+
+static int mpc8xx_spi_xfer(struct udevice *dev, unsigned int bitlen,
+ const void *dout, void *din, unsigned long flags)
+{
+ size_t count = (bitlen + 7) / 8;
+ size_t offset = 0;
+ int ret = 0;
+
+ if (!din && !dout)
+ return -EINVAL;
+
+ /* Set CS for device */
+ if (flags & SPI_XFER_BEGIN)
+ mpc8xx_spi_cs_activate(dev);
+
+ while (count > 0 && !ret) {
+ size_t chunk = min(count, (size_t)MAX_BUFFER);
+ const void *out = dout ? dout + offset : NULL;
+ void *in = din ? din + offset : NULL;
+
+ ret = mpc8xx_spi_xfer_one(dev, chunk, out, in);
+
+ offset += chunk;
+ count -= chunk;
+ }
/* Clear CS for device */
if (flags & SPI_XFER_END)
mpc8xx_spi_cs_deactivate(dev);
- return 0;
+ if (ret)
+ printf("*** spi_xfer: Time out while xferring to/from SPI!\n");
+
+ return ret;
}
static int mpc8xx_spi_ofdata_to_platdata(struct udevice *dev)
diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c
index 7d15390..cd624f4 100644
--- a/drivers/spi/mpc8xxx_spi.c
+++ b/drivers/spi/mpc8xxx_spi.c
@@ -4,7 +4,6 @@
* With help from the common/soft_spi and arch/powerpc/cpu/mpc8260 drivers
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <errno.h>
diff --git a/drivers/spi/mscc_bb_spi.c b/drivers/spi/mscc_bb_spi.c
index 95bea0d..ad4daeb 100644
--- a/drivers/spi/mscc_bb_spi.c
+++ b/drivers/spi/mscc_bb_spi.c
@@ -5,7 +5,6 @@
* Copyright (c) 2018 Microsemi Corporation
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <log.h>
diff --git a/drivers/spi/mt7621_spi.c b/drivers/spi/mt7621_spi.c
index 3d00809..e46942d 100644
--- a/drivers/spi/mt7621_spi.c
+++ b/drivers/spi/mt7621_spi.c
@@ -8,7 +8,6 @@
* Copyright (C) 2014-2015 Felix Fietkau <nbd@nbd.name>
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <log.h>
diff --git a/drivers/spi/mtk_snfi_spi.c b/drivers/spi/mtk_snfi_spi.c
index 3decb37..830424b 100644
--- a/drivers/spi/mtk_snfi_spi.c
+++ b/drivers/spi/mtk_snfi_spi.c
@@ -5,7 +5,6 @@
* Author: Weijie Gao <weijie.gao@mediatek.com>
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <errno.h>
diff --git a/drivers/spi/mtk_snor.c b/drivers/spi/mtk_snor.c
index 4b7d4a6..f202b2f 100644
--- a/drivers/spi/mtk_snor.c
+++ b/drivers/spi/mtk_snor.c
@@ -7,7 +7,6 @@
// Some parts are based on drivers/spi/spi-mtk-nor.c of linux version
#include <clk.h>
-#include <common.h>
#include <cpu_func.h>
#include <dm.h>
#include <dm/device.h>
diff --git a/drivers/spi/mvebu_a3700_spi.c b/drivers/spi/mvebu_a3700_spi.c
index bba2383..fde9b14 100644
--- a/drivers/spi/mvebu_a3700_spi.c
+++ b/drivers/spi/mvebu_a3700_spi.c
@@ -5,7 +5,6 @@
* Copyright (C) 2016 Stefan Roese <sr@denx.de>
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <malloc.h>
diff --git a/drivers/spi/mxc_spi.c b/drivers/spi/mxc_spi.c
index e291092..ff61a14 100644
--- a/drivers/spi/mxc_spi.c
+++ b/drivers/spi/mxc_spi.c
@@ -3,7 +3,7 @@
* Copyright (C) 2008, Guennadi Liakhovetski <lg@denx.de>
*/
-#include <common.h>
+#include <config.h>
#include <clk.h>
#include <dm.h>
#include <log.h>
diff --git a/drivers/spi/mxs_spi.c b/drivers/spi/mxs_spi.c
index 773e26b..ad9e490 100644
--- a/drivers/spi/mxs_spi.c
+++ b/drivers/spi/mxs_spi.c
@@ -12,7 +12,6 @@
* GPIO driven chipselects are not supported.
*/
-#include <common.h>
#include <dm.h>
#include <dt-structs.h>
#include <cpu_func.h>
diff --git a/drivers/spi/npcm_pspi.c b/drivers/spi/npcm_pspi.c
index eb14185..7708a96 100644
--- a/drivers/spi/npcm_pspi.c
+++ b/drivers/spi/npcm_pspi.c
@@ -3,10 +3,10 @@
* Copyright (c) 2021 Nuvoton Technology.
*/
-#include <common.h>
#include <dm.h>
#include <spi.h>
#include <clk.h>
+#include <reset.h>
#include <asm/gpio.h>
#include <linux/iopoll.h>
@@ -194,6 +194,7 @@
{
struct npcm_pspi_priv *priv = dev_get_priv(bus);
int node = dev_of_offset(bus);
+ struct reset_ctl reset;
int ret;
ret = clk_get_by_index(bus, 0, &priv->clk);
@@ -205,6 +206,14 @@
gpio_request_by_name_nodev(offset_to_ofnode(node), "cs-gpios", 0,
&priv->cs_gpio, GPIOD_IS_OUT| GPIOD_ACTIVE_LOW);
+ /* Reset HW */
+ ret = reset_get_by_index(bus, 0, &reset);
+ if (!ret) {
+ reset_assert(&reset);
+ udelay(5);
+ reset_deassert(&reset);
+ }
+
return 0;
}
diff --git a/drivers/spi/nxp_fspi.c b/drivers/spi/nxp_fspi.c
index 5db27f9..fefdaaa 100644
--- a/drivers/spi/nxp_fspi.c
+++ b/drivers/spi/nxp_fspi.c
@@ -33,7 +33,6 @@
* Frieder Schrempf <frieder.schrempf@kontron.de>
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <dm/device_compat.h>
diff --git a/drivers/spi/omap3_spi.c b/drivers/spi/omap3_spi.c
index 5cce6ba..3d82fc7 100644
--- a/drivers/spi/omap3_spi.c
+++ b/drivers/spi/omap3_spi.c
@@ -16,9 +16,9 @@
* Modified by Ruslan Araslanov <ruslan.araslanov@vitecmm.com>
*/
-#include <common.h>
#include <dm.h>
#include <spi.h>
+#include <time.h>
#include <malloc.h>
#include <asm/global_data.h>
#include <asm/io.h>
diff --git a/drivers/spi/pic32_spi.c b/drivers/spi/pic32_spi.c
index 45f07f0..e11ae7f 100644
--- a/drivers/spi/pic32_spi.c
+++ b/drivers/spi/pic32_spi.c
@@ -6,7 +6,6 @@
* Purna Chandra Mandal <purna.mandal@microchip.com>
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <log.h>
diff --git a/drivers/spi/pl022_spi.c b/drivers/spi/pl022_spi.c
index e2b49eb..1e20701 100644
--- a/drivers/spi/pl022_spi.c
+++ b/drivers/spi/pl022_spi.c
@@ -10,7 +10,6 @@
*/
#include <clk.h>
-#include <common.h>
#include <dm.h>
#include <dm/device_compat.h>
#include <fdtdec.h>
diff --git a/drivers/spi/renesas_rpc_spi.c b/drivers/spi/renesas_rpc_spi.c
index 8aff223..e6b602c 100644
--- a/drivers/spi/renesas_rpc_spi.c
+++ b/drivers/spi/renesas_rpc_spi.c
@@ -5,7 +5,6 @@
* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
*/
-#include <common.h>
#include <asm/global_data.h>
#include <asm/io.h>
#include <clk.h>
diff --git a/drivers/spi/rk_spi.c b/drivers/spi/rk_spi.c
index c8694fd..4571dc9 100644
--- a/drivers/spi/rk_spi.c
+++ b/drivers/spi/rk_spi.c
@@ -10,7 +10,6 @@
* Peter, Software Engineering, <superpeter.cai@gmail.com>.
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <dt-structs.h>
diff --git a/drivers/spi/sandbox_spi.c b/drivers/spi/sandbox_spi.c
index f844597..4cc0161 100644
--- a/drivers/spi/sandbox_spi.c
+++ b/drivers/spi/sandbox_spi.c
@@ -10,7 +10,6 @@
#define LOG_CATEGORY UCLASS_SPI
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <malloc.h>
diff --git a/drivers/spi/sh_qspi.c b/drivers/spi/sh_qspi.c
index 7259499..b7364a6 100644
--- a/drivers/spi/sh_qspi.c
+++ b/drivers/spi/sh_qspi.c
@@ -8,7 +8,6 @@
#define LOG_CATEGORY UCLASS_SPI
-#include <common.h>
#include <console.h>
#include <malloc.h>
#include <spi.h>
diff --git a/drivers/spi/soft_spi.c b/drivers/spi/soft_spi.c
index 0fa1433..9bdb4a5 100644
--- a/drivers/spi/soft_spi.c
+++ b/drivers/spi/soft_spi.c
@@ -9,7 +9,6 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <fdtdec.h>
diff --git a/drivers/spi/spi-aspeed-smc.c b/drivers/spi/spi-aspeed-smc.c
index 7d5f101..d91d58d 100644
--- a/drivers/spi/spi-aspeed-smc.c
+++ b/drivers/spi/spi-aspeed-smc.c
@@ -12,7 +12,6 @@
#include <asm/io.h>
#include <clk.h>
-#include <common.h>
#include <dm.h>
#include <dm/device_compat.h>
#include <linux/bitops.h>
diff --git a/drivers/spi/spi-emul-uclass.c b/drivers/spi/spi-emul-uclass.c
index 64bc19c..d92f36b 100644
--- a/drivers/spi/spi-emul-uclass.c
+++ b/drivers/spi/spi-emul-uclass.c
@@ -5,7 +5,6 @@
#define LOG_CATEGORY UCLASS_SPI_EMUL
-#include <common.h>
#include <dm.h>
#include <spi.h>
#include <spi_flash.h>
diff --git a/drivers/spi/spi-mem.c b/drivers/spi/spi-mem.c
index b7eca58..3579b7d 100644
--- a/drivers/spi/spi-mem.c
+++ b/drivers/spi/spi-mem.c
@@ -13,7 +13,6 @@
#include <linux/pm_runtime.h>
#include "internals.h"
#else
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <malloc.h>
diff --git a/drivers/spi/spi-mxic.c b/drivers/spi/spi-mxic.c
index f663b9d..b98bcd9 100644
--- a/drivers/spi/spi-mxic.c
+++ b/drivers/spi/spi-mxic.c
@@ -6,7 +6,6 @@
* zhengxunli <zhengxunli@mxic.com.tw>
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <errno.h>
diff --git a/drivers/spi/spi-qup.c b/drivers/spi/spi-qup.c
index 572cef1..836c550 100644
--- a/drivers/spi/spi-qup.c
+++ b/drivers/spi/spi-qup.c
@@ -15,7 +15,6 @@
#include <asm/gpio.h>
#include <asm/io.h>
#include <clk.h>
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <linux/delay.h>
diff --git a/drivers/spi/spi-sifive.c b/drivers/spi/spi-sifive.c
index ea372a0..0c8666c 100644
--- a/drivers/spi/spi-sifive.c
+++ b/drivers/spi/spi-sifive.c
@@ -6,7 +6,6 @@
* SiFive SPI controller driver (master mode only)
*/
-#include <common.h>
#include <dm.h>
#include <dm/device_compat.h>
#include <malloc.h>
diff --git a/drivers/spi/spi-sn-f-ospi.c b/drivers/spi/spi-sn-f-ospi.c
index e3633a5..fc82791 100644
--- a/drivers/spi/spi-sn-f-ospi.c
+++ b/drivers/spi/spi-sn-f-ospi.c
@@ -5,7 +5,6 @@
*/
#include <clk.h>
-#include <common.h>
#include <dm.h>
#include <dm/device_compat.h>
#include <linux/bitfield.h>
diff --git a/drivers/spi/spi-sunxi.c b/drivers/spi/spi-sunxi.c
index 9ec6b35..13725ee 100644
--- a/drivers/spi/spi-sunxi.c
+++ b/drivers/spi/spi-sunxi.c
@@ -18,7 +18,6 @@
* SPDX-License-Identifier: GPL-2.0+
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <log.h>
diff --git a/drivers/spi/spi-synquacer.c b/drivers/spi/spi-synquacer.c
index 553f968..eb522fd 100644
--- a/drivers/spi/spi-synquacer.c
+++ b/drivers/spi/spi-synquacer.c
@@ -6,7 +6,6 @@
*/
#include <clk.h>
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <time.h>
diff --git a/drivers/spi/spi-uclass.c b/drivers/spi/spi-uclass.c
index f4795e6..6e28172 100644
--- a/drivers/spi/spi-uclass.c
+++ b/drivers/spi/spi-uclass.c
@@ -5,7 +5,6 @@
#define LOG_CATEGORY UCLASS_SPI
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <log.h>
diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c
index 22910de..50a076a 100644
--- a/drivers/spi/spi.c
+++ b/drivers/spi/spi.c
@@ -3,7 +3,6 @@
* Copyright (c) 2011 The Chromium OS Authors.
*/
-#include <common.h>
#include <fdtdec.h>
#include <malloc.h>
#include <spi.h>
diff --git a/drivers/spi/stm32_qspi.c b/drivers/spi/stm32_qspi.c
index 2ffa201..2812a4d 100644
--- a/drivers/spi/stm32_qspi.c
+++ b/drivers/spi/stm32_qspi.c
@@ -9,7 +9,6 @@
#define LOG_CATEGORY UCLASS_SPI
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <log.h>
diff --git a/drivers/spi/stm32_spi.c b/drivers/spi/stm32_spi.c
index ddb410a..97b83b1 100644
--- a/drivers/spi/stm32_spi.c
+++ b/drivers/spi/stm32_spi.c
@@ -7,7 +7,6 @@
#define LOG_CATEGORY UCLASS_SPI
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <errno.h>
diff --git a/drivers/spi/tegra114_spi.c b/drivers/spi/tegra114_spi.c
index f0256d8..57f1a8f 100644
--- a/drivers/spi/tegra114_spi.c
+++ b/drivers/spi/tegra114_spi.c
@@ -5,7 +5,6 @@
* Copyright (c) 2010-2013 NVIDIA Corporation
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <time.h>
diff --git a/drivers/spi/tegra20_sflash.c b/drivers/spi/tegra20_sflash.c
index 10e38cf..1911480 100644
--- a/drivers/spi/tegra20_sflash.c
+++ b/drivers/spi/tegra20_sflash.c
@@ -5,7 +5,6 @@
* With more help from omap3_spi SPI driver
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <log.h>
diff --git a/drivers/spi/tegra20_slink.c b/drivers/spi/tegra20_slink.c
index d0e7885..d54a504 100644
--- a/drivers/spi/tegra20_slink.c
+++ b/drivers/spi/tegra20_slink.c
@@ -5,7 +5,6 @@
* Copyright (c) 2010-2013 NVIDIA Corporation
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <time.h>
diff --git a/drivers/spi/tegra210_qspi.c b/drivers/spi/tegra210_qspi.c
index 5c8c185..b969a79 100644
--- a/drivers/spi/tegra210_qspi.c
+++ b/drivers/spi/tegra210_qspi.c
@@ -6,7 +6,6 @@
*
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <time.h>
diff --git a/drivers/spi/ti_qspi.c b/drivers/spi/ti_qspi.c
index 99acb10..a16412e 100644
--- a/drivers/spi/ti_qspi.c
+++ b/drivers/spi/ti_qspi.c
@@ -5,7 +5,6 @@
* Copyright (C) 2013, Texas Instruments, Incorporated
*/
-#include <common.h>
#include <cpu_func.h>
#include <log.h>
#include <asm/cache.h>
diff --git a/drivers/spi/uniphier_spi.c b/drivers/spi/uniphier_spi.c
index 6402acb..8f2c0fb 100644
--- a/drivers/spi/uniphier_spi.c
+++ b/drivers/spi/uniphier_spi.c
@@ -5,7 +5,6 @@
*/
#include <clk.h>
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <time.h>
diff --git a/drivers/spi/xilinx_spi.c b/drivers/spi/xilinx_spi.c
index 94ddf49..0e7fa3a 100644
--- a/drivers/spi/xilinx_spi.c
+++ b/drivers/spi/xilinx_spi.c
@@ -13,7 +13,6 @@
*/
#include <config.h>
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <log.h>
diff --git a/drivers/spi/zynq_qspi.c b/drivers/spi/zynq_qspi.c
index cb52c0f..b71b9a6 100644
--- a/drivers/spi/zynq_qspi.c
+++ b/drivers/spi/zynq_qspi.c
@@ -7,7 +7,6 @@
*/
#include <clk.h>
-#include <common.h>
#include <dm.h>
#include <dm/device_compat.h>
#include <log.h>
diff --git a/drivers/spi/zynq_spi.c b/drivers/spi/zynq_spi.c
index b3e0858..ebcb5b6 100644
--- a/drivers/spi/zynq_spi.c
+++ b/drivers/spi/zynq_spi.c
@@ -6,7 +6,6 @@
* Xilinx Zynq PS SPI controller driver (master mode only)
*/
-#include <common.h>
#include <dm.h>
#include <dm/device_compat.h>
#include <log.h>
diff --git a/drivers/spi/zynqmp_gqspi.c b/drivers/spi/zynqmp_gqspi.c
index a323994..61349a4 100644
--- a/drivers/spi/zynqmp_gqspi.c
+++ b/drivers/spi/zynqmp_gqspi.c
@@ -7,7 +7,6 @@
#define LOG_CATEGORY UCLASS_SPI
-#include <common.h>
#include <cpu_func.h>
#include <log.h>
#include <asm/arch/sys_proto.h>
diff --git a/drivers/spmi/spmi-msm.c b/drivers/spmi/spmi-msm.c
index 5fe8a70..b0d6226 100644
--- a/drivers/spmi/spmi-msm.c
+++ b/drivers/spmi/spmi-msm.c
@@ -7,7 +7,6 @@
* Loosely based on Little Kernel driver
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <fdtdec.h>
@@ -23,13 +22,19 @@
#define PMIC_ARB_VERSION_V2_MIN 0x20010000
#define PMIC_ARB_VERSION_V3_MIN 0x30000000
#define PMIC_ARB_VERSION_V5_MIN 0x50000000
+#define PMIC_ARB_VERSION_V7_MIN 0x70000000
#define APID_MAP_OFFSET_V1_V2_V3 (0x800)
#define APID_MAP_OFFSET_V5 (0x900)
+#define APID_MAP_OFFSET_V7 (0x2000)
#define ARB_CHANNEL_OFFSET(n) (0x4 * (n))
#define SPMI_CH_OFFSET(chnl) ((chnl) * 0x8000)
#define SPMI_V5_OBS_CH_OFFSET(chnl) ((chnl) * 0x80)
+#define SPMI_V7_OBS_CH_OFFSET(chnl) ((chnl) * 0x20)
#define SPMI_V5_RW_CH_OFFSET(chnl) ((chnl) * 0x10000)
+#define SPMI_V7_RW_CH_OFFSET(chnl) ((chnl) * 0x1000)
+
+#define SPMI_OWNERSHIP_PERIPH2OWNER(x) ((x) & 0x7)
#define SPMI_REG_CMD0 0x0
#define SPMI_REG_CONFIG 0x4
@@ -49,14 +54,20 @@
#define SPMI_STATUS_DONE 0x1
#define SPMI_MAX_CHANNELS 128
+#define SPMI_MAX_CHANNELS_V5 512
+#define SPMI_MAX_CHANNELS_V7 1024
#define SPMI_MAX_SLAVES 16
#define SPMI_MAX_PERIPH 256
+#define SPMI_CHANNEL_READ_ONLY BIT(31)
+#define SPMI_CHANNEL_MASK 0xffff
+
enum arb_ver {
V1 = 1,
V2,
V3,
- V5 = 5
+ V5 = 5,
+ V7 = 7
};
/*
@@ -72,12 +83,25 @@
phys_addr_t arb_chnl; /* ARB channel mapping base */
phys_addr_t spmi_chnls; /* SPMI channels */
phys_addr_t spmi_obs; /* SPMI observer */
+ phys_addr_t spmi_cnfg; /* SPMI config */
+ u32 owner; /* Current owner */
+ unsigned int max_channels; /* Max channels */
/* SPMI channel map */
- uint8_t channel_map[SPMI_MAX_SLAVES][SPMI_MAX_PERIPH];
+ uint32_t channel_map[SPMI_MAX_SLAVES][SPMI_MAX_PERIPH];
/* SPMI bus arbiter version */
u32 arb_ver;
};
+static u32 pmic_arb_fmt_cmd_v1(u8 opc, u8 sid, u8 pid, u8 off)
+{
+ return (opc << 27) | (sid << 20) | (pid << 12) | (off << 4) | 1;
+}
+
+static u32 pmic_arb_fmt_cmd_v2(u8 opc, u8 off)
+{
+ return (opc << 27) | (off << 4) | 1;
+}
+
static int msm_spmi_write(struct udevice *dev, int usid, int pid, int off,
uint8_t val)
{
@@ -90,35 +114,53 @@
return -EIO;
if (pid >= SPMI_MAX_PERIPH)
return -EIO;
+ if (priv->channel_map[usid][pid] & SPMI_CHANNEL_READ_ONLY)
+ return -EPERM;
- channel = priv->channel_map[usid][pid];
+ channel = priv->channel_map[usid][pid] & SPMI_CHANNEL_MASK;
- /* Disable IRQ mode for the current channel*/
- writel(0x0,
- priv->spmi_chnls + SPMI_CH_OFFSET(channel) + SPMI_REG_CONFIG);
+ dev_dbg(dev, "[%d:%d] %s: channel %d\n", usid, pid, __func__, channel);
- /* Write single byte */
- writel(val, priv->spmi_chnls + SPMI_CH_OFFSET(channel) + SPMI_REG_WDATA);
-
- /* Prepare write command */
- reg |= SPMI_CMD_EXT_REG_WRITE_LONG << SPMI_CMD_OPCODE_SHIFT;
- reg |= (usid << SPMI_CMD_SLAVE_ID_SHIFT);
- reg |= (pid << SPMI_CMD_ADDR_SHIFT);
- reg |= (off << SPMI_CMD_ADDR_OFFSET_SHIFT);
- reg |= 1; /* byte count */
-
- if (priv->arb_ver == V5)
- ch_offset = SPMI_V5_RW_CH_OFFSET(channel);
- else
+ switch (priv->arb_ver) {
+ case V1:
ch_offset = SPMI_CH_OFFSET(channel);
+ reg = pmic_arb_fmt_cmd_v1(SPMI_CMD_EXT_REG_WRITE_LONG,
+ usid, pid, off);
+ break;
+
+ case V2:
+ ch_offset = SPMI_CH_OFFSET(channel);
+
+ reg = pmic_arb_fmt_cmd_v2(SPMI_CMD_EXT_REG_WRITE_LONG, off);
+ break;
+
+ case V5:
+ ch_offset = SPMI_V5_RW_CH_OFFSET(channel);
+
+ reg = pmic_arb_fmt_cmd_v2(SPMI_CMD_EXT_REG_WRITE_LONG, off);
+ break;
+
+ case V7:
+ ch_offset = SPMI_V7_RW_CH_OFFSET(channel);
+
+ reg = pmic_arb_fmt_cmd_v2(SPMI_CMD_EXT_REG_WRITE_LONG, off);
+ break;
+ }
+
+ /* Disable IRQ mode for the current channel*/
+ writel(0x0, priv->spmi_chnls + ch_offset + SPMI_REG_CONFIG);
+
+ /* Write single byte */
+ writel(val, priv->spmi_chnls + ch_offset + SPMI_REG_WDATA);
+
/* Send write command */
- writel(reg, priv->spmi_chnls + SPMI_CH_OFFSET(channel) + SPMI_REG_CMD0);
+ writel(reg, priv->spmi_chnls + ch_offset + SPMI_REG_CMD0);
/* Wait till CMD DONE status */
reg = 0;
while (!reg) {
- reg = readl(priv->spmi_chnls + SPMI_CH_OFFSET(channel) +
+ reg = readl(priv->spmi_chnls + ch_offset +
SPMI_REG_STATUS);
}
@@ -142,23 +184,44 @@
if (pid >= SPMI_MAX_PERIPH)
return -EIO;
- channel = priv->channel_map[usid][pid];
+ channel = priv->channel_map[usid][pid] & SPMI_CHANNEL_MASK;
- if (priv->arb_ver == V5)
- ch_offset = SPMI_V5_OBS_CH_OFFSET(channel);
- else
+ dev_dbg(dev, "[%d:%d] %s: channel %d\n", usid, pid, __func__, channel);
+
+ switch (priv->arb_ver) {
+ case V1:
ch_offset = SPMI_CH_OFFSET(channel);
+ /* Prepare read command */
+ reg = pmic_arb_fmt_cmd_v1(SPMI_CMD_EXT_REG_READ_LONG,
+ usid, pid, off);
+ break;
+
+ case V2:
+ ch_offset = SPMI_CH_OFFSET(channel);
+
+ /* Prepare read command */
+ reg = pmic_arb_fmt_cmd_v2(SPMI_CMD_EXT_REG_READ_LONG, off);
+ break;
+
+ case V5:
+ ch_offset = SPMI_V5_OBS_CH_OFFSET(channel);
+
+ /* Prepare read command */
+ reg = pmic_arb_fmt_cmd_v2(SPMI_CMD_EXT_REG_READ_LONG, off);
+ break;
+
+ case V7:
+ ch_offset = SPMI_V7_OBS_CH_OFFSET(channel);
+
+ /* Prepare read command */
+ reg = pmic_arb_fmt_cmd_v2(SPMI_CMD_EXT_REG_READ_LONG, off);
+ break;
+ }
+
/* Disable IRQ mode for the current channel*/
writel(0x0, priv->spmi_obs + ch_offset + SPMI_REG_CONFIG);
- /* Prepare read command */
- reg |= SPMI_CMD_EXT_REG_READ_LONG << SPMI_CMD_OPCODE_SHIFT;
- reg |= (usid << SPMI_CMD_SLAVE_ID_SHIFT);
- reg |= (pid << SPMI_CMD_ADDR_SHIFT);
- reg |= (off << SPMI_CMD_ADDR_OFFSET_SHIFT);
- reg |= 1; /* byte count */
-
/* Request read */
writel(reg, priv->spmi_obs + ch_offset + SPMI_REG_CMD0);
@@ -193,18 +256,29 @@
core_addr = dev_read_addr_name(dev, "core");
priv->spmi_chnls = dev_read_addr_name(dev, "chnls");
priv->spmi_obs = dev_read_addr_name(dev, "obsrvr");
+ dev_read_u32(dev, "qcom,ee", &priv->owner);
hw_ver = readl(core_addr + PMIC_ARB_VERSION);
if (hw_ver < PMIC_ARB_VERSION_V3_MIN) {
priv->arb_ver = V2;
priv->arb_chnl = core_addr + APID_MAP_OFFSET_V1_V2_V3;
+ priv->max_channels = SPMI_MAX_CHANNELS;
} else if (hw_ver < PMIC_ARB_VERSION_V5_MIN) {
priv->arb_ver = V3;
priv->arb_chnl = core_addr + APID_MAP_OFFSET_V1_V2_V3;
- } else {
+ priv->max_channels = SPMI_MAX_CHANNELS;
+ } else if (hw_ver < PMIC_ARB_VERSION_V7_MIN) {
priv->arb_ver = V5;
priv->arb_chnl = core_addr + APID_MAP_OFFSET_V5;
+ priv->max_channels = SPMI_MAX_CHANNELS;
+ priv->spmi_cnfg = dev_read_addr_name(dev, "cnfg");
+ } else {
+ /* TOFIX: handle second bus */
+ priv->arb_ver = V7;
+ priv->arb_chnl = core_addr + APID_MAP_OFFSET_V7;
+ priv->max_channels = SPMI_MAX_CHANNELS_V7;
+ priv->spmi_cnfg = dev_read_addr_name(dev, "cnfg");
}
dev_dbg(dev, "PMIC Arb Version-%d (%#x)\n", hw_ver >> 28, hw_ver);
@@ -218,12 +292,21 @@
dev_dbg(dev, "priv->spmi_chnls address (%#08llx)\n", priv->spmi_chnls);
dev_dbg(dev, "priv->spmi_obs address (%#08llx)\n", priv->spmi_obs);
/* Scan peripherals connected to each SPMI channel */
- for (i = 0; i < SPMI_MAX_PERIPH; i++) {
+ for (i = 0; i < priv->max_channels; i++) {
uint32_t periph = readl(priv->arb_chnl + ARB_CHANNEL_OFFSET(i));
uint8_t slave_id = (periph & 0xf0000) >> 16;
uint8_t pid = (periph & 0xff00) >> 8;
priv->channel_map[slave_id][pid] = i;
+
+ /* Mark channels read-only when from different owner */
+ if (priv->arb_ver == V5 || priv->arb_ver == V7) {
+ uint32_t cnfg = readl(priv->spmi_cnfg + ARB_CHANNEL_OFFSET(i));
+ uint8_t owner = SPMI_OWNERSHIP_PERIPH2OWNER(cnfg);
+
+ if (owner != priv->owner)
+ priv->channel_map[slave_id][pid] |= SPMI_CHANNEL_READ_ONLY;
+ }
}
return 0;
}
diff --git a/drivers/spmi/spmi-sandbox.c b/drivers/spmi/spmi-sandbox.c
index f677294..992b08d 100644
--- a/drivers/spmi/spmi-sandbox.c
+++ b/drivers/spmi/spmi-sandbox.c
@@ -7,7 +7,6 @@
* (C) Copyright 2015 Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <spmi/spmi.h>
diff --git a/drivers/spmi/spmi-uclass.c b/drivers/spmi/spmi-uclass.c
index 9d9f46a..34fe8f6 100644
--- a/drivers/spmi/spmi-uclass.c
+++ b/drivers/spmi/spmi-uclass.c
@@ -7,7 +7,6 @@
#define LOG_CATEGORY UCLASS_SPMI
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <spmi/spmi.h>
diff --git a/drivers/sysinfo/gazerbeam.c b/drivers/sysinfo/gazerbeam.c
index c1fae6c..a3c9d53 100644
--- a/drivers/sysinfo/gazerbeam.c
+++ b/drivers/sysinfo/gazerbeam.c
@@ -4,7 +4,6 @@
* Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc
*/
-#include <common.h>
#include <dm.h>
#include <sysinfo.h>
#include <i2c.h>
diff --git a/drivers/sysinfo/gpio.c b/drivers/sysinfo/gpio.c
index 82f9030..aaca318 100644
--- a/drivers/sysinfo/gpio.c
+++ b/drivers/sysinfo/gpio.c
@@ -3,7 +3,6 @@
* Copyright (C) 2021 Sean Anderson <sean.anderson@seco.com>
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <sysinfo.h>
diff --git a/drivers/sysinfo/rcar3.c b/drivers/sysinfo/rcar3.c
index 7b12798..37e2ccc 100644
--- a/drivers/sysinfo/rcar3.c
+++ b/drivers/sysinfo/rcar3.c
@@ -3,7 +3,6 @@
* Copyright (C) 2021 Marek Vasut <marek.vasut+renesas@gmail.com>
*/
-#include <common.h>
#include <dm.h>
#include <i2c_eeprom.h>
#include <log.h>
diff --git a/drivers/sysinfo/sandbox.c b/drivers/sysinfo/sandbox.c
index d270a26..d397209 100644
--- a/drivers/sysinfo/sandbox.c
+++ b/drivers/sysinfo/sandbox.c
@@ -4,7 +4,6 @@
* Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc
*/
-#include <common.h>
#include <dm.h>
#include <sysinfo.h>
diff --git a/drivers/sysinfo/smbios.c b/drivers/sysinfo/smbios.c
index 80ebd19..a7ac8e3 100644
--- a/drivers/sysinfo/smbios.c
+++ b/drivers/sysinfo/smbios.c
@@ -4,7 +4,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <dm.h>
#include <sysinfo.h>
diff --git a/drivers/sysinfo/sysinfo-uclass.c b/drivers/sysinfo/sysinfo-uclass.c
index 10194d0..d77d1e3 100644
--- a/drivers/sysinfo/sysinfo-uclass.c
+++ b/drivers/sysinfo/sysinfo-uclass.c
@@ -6,7 +6,6 @@
#define LOG_CATEGORY UCLASS_SYSINFO
-#include <common.h>
#include <dm.h>
#include <sysinfo.h>
diff --git a/drivers/sysreset/Kconfig b/drivers/sysreset/Kconfig
index 49c0787..b64bfad 100644
--- a/drivers/sysreset/Kconfig
+++ b/drivers/sysreset/Kconfig
@@ -59,6 +59,11 @@
endif
+config SYSRESET_CV1800B
+ bool "Enable support for Sophgo cv1800b System Reset"
+ help
+ Enable system reset support for Sophgo cv1800b SoC.
+
config POWEROFF_GPIO
bool "Enable support for GPIO poweroff driver"
depends on DM_GPIO
diff --git a/drivers/sysreset/Makefile b/drivers/sysreset/Makefile
index e0e7322..d59299a 100644
--- a/drivers/sysreset/Makefile
+++ b/drivers/sysreset/Makefile
@@ -7,6 +7,7 @@
obj-$(CONFIG_ARCH_ROCKCHIP) += sysreset_rockchip.o
obj-$(CONFIG_ARCH_STI) += sysreset_sti.o
obj-$(CONFIG_SANDBOX) += sysreset_sandbox.o
+obj-$(CONFIG_SYSRESET_CV1800B) += sysreset_cv1800b.o
obj-$(CONFIG_POWEROFF_GPIO) += poweroff_gpio.o
obj-$(CONFIG_SYSRESET_GPIO) += sysreset_gpio.o
obj-$(CONFIG_$(SPL_TPL_)SYSRESET_MAX77663) += sysreset_max77663.o
diff --git a/drivers/sysreset/poweroff_gpio.c b/drivers/sysreset/poweroff_gpio.c
index ad04e4b..d922002 100644
--- a/drivers/sysreset/poweroff_gpio.c
+++ b/drivers/sysreset/poweroff_gpio.c
@@ -11,7 +11,6 @@
* Copyright (C) 2012 Jamie Lentin
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <log.h>
diff --git a/drivers/sysreset/sysreset-ti-sci.c b/drivers/sysreset/sysreset-ti-sci.c
index 5fc05c4..451fc5d 100644
--- a/drivers/sysreset/sysreset-ti-sci.c
+++ b/drivers/sysreset/sysreset-ti-sci.c
@@ -6,7 +6,6 @@
* Andreas Dannenberg <dannenberg@ti.com>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <log.h>
@@ -60,15 +59,9 @@
.request = ti_sci_sysreset_request,
};
-static const struct udevice_id ti_sci_sysreset_of_match[] = {
- { .compatible = "ti,sci-sysreset", },
- { /* sentinel */ },
-};
-
U_BOOT_DRIVER(ti_sci_sysreset) = {
.name = "ti-sci-sysreset",
.id = UCLASS_SYSRESET,
- .of_match = ti_sci_sysreset_of_match,
.probe = ti_sci_sysreset_probe,
.priv_auto = sizeof(struct ti_sci_sysreset_data),
.ops = &ti_sci_sysreset_ops,
diff --git a/drivers/sysreset/sysreset-uclass.c b/drivers/sysreset/sysreset-uclass.c
index 6151b5f..0abb404 100644
--- a/drivers/sysreset/sysreset-uclass.c
+++ b/drivers/sysreset/sysreset-uclass.c
@@ -6,7 +6,6 @@
#define LOG_CATEGORY UCLASS_SYSRESET
-#include <common.h>
#include <command.h>
#include <cpu_func.h>
#include <dm.h>
diff --git a/drivers/sysreset/sysreset_ast.c b/drivers/sysreset/sysreset_ast.c
index 92fad96..ef09440 100644
--- a/drivers/sysreset/sysreset_ast.c
+++ b/drivers/sysreset/sysreset_ast.c
@@ -3,7 +3,6 @@
* (C) Copyright 2016 Google, Inc
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <log.h>
diff --git a/drivers/sysreset/sysreset_at91.c b/drivers/sysreset/sysreset_at91.c
index fc85f31..457042c 100644
--- a/drivers/sysreset/sysreset_at91.c
+++ b/drivers/sysreset/sysreset_at91.c
@@ -7,7 +7,6 @@
#include <asm/io.h>
#include <asm/arch/at91_rstc.h>
#include <clk.h>
-#include <common.h>
#include <cpu_func.h>
#include <dm.h>
#include <dm/device_compat.h>
diff --git a/drivers/sysreset/sysreset_cv1800b.c b/drivers/sysreset/sysreset_cv1800b.c
new file mode 100644
index 0000000..9cd6277
--- /dev/null
+++ b/drivers/sysreset/sysreset_cv1800b.c
@@ -0,0 +1,64 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2024, Kongyang Liu <seashell11234455@gmail.com>
+ */
+
+#include <dm.h>
+#include <stdbool.h>
+#include <sysreset.h>
+#include <wait_bit.h>
+#include <linux/io.h>
+#include <linux/errno.h>
+
+#define REG_RTC_BASE (void *)0x05026000
+#define REG_RTC_CTRL_BASE (void *)0x05025000
+#define REG_RTC_EN_SHDN_REQ (REG_RTC_BASE + 0xc0)
+#define REG_RTC_EN_PWR_CYC_REQ (REG_RTC_BASE + 0xc8)
+#define REG_RTC_EN_WARM_RST_REQ (REG_RTC_BASE + 0xcc)
+#define REG_RTC_CTRL_UNLOCKKEY (REG_RTC_CTRL_BASE + 0x4)
+#define REG_RTC_CTRL (REG_RTC_CTRL_BASE + 0x8)
+
+#define CTRL_UNLOCKKEY_MAGIC 0xAB18
+
+/* REG_RTC_CTRL */
+#define BIT_REQ_SHDN BIT(0)
+#define BIT_REQ_PWR_CYC BIT(3)
+#define BIT_REQ_WARM_RST BIT(4)
+
+static struct {
+ void *pre_req_reg;
+ u32 req_bit;
+} reset_info[SYSRESET_COUNT] = {
+ [SYSRESET_WARM] = { REG_RTC_EN_WARM_RST_REQ, BIT_REQ_WARM_RST },
+ [SYSRESET_COLD] = { REG_RTC_EN_WARM_RST_REQ, BIT_REQ_WARM_RST },
+ [SYSRESET_POWER] = { REG_RTC_EN_PWR_CYC_REQ, BIT_REQ_PWR_CYC },
+ [SYSRESET_POWER_OFF] = { REG_RTC_EN_SHDN_REQ, BIT_REQ_SHDN },
+};
+
+static int cv1800b_sysreset_request(struct udevice *dev, enum sysreset_t type)
+{
+ u32 reg;
+
+ writel(1, reset_info[type].pre_req_reg);
+ writel(CTRL_UNLOCKKEY_MAGIC, REG_RTC_CTRL_UNLOCKKEY);
+ reg = readl(REG_RTC_CTRL);
+ writel(0xFFFF0800 | reset_info[type].req_bit, REG_RTC_CTRL);
+
+ return -EINPROGRESS;
+}
+
+static struct sysreset_ops cv1800b_sysreset = {
+ .request = cv1800b_sysreset_request,
+};
+
+static const struct udevice_id cv1800b_sysreset_ids[] = {
+ { .compatible = "sophgo,cv1800b-sysreset", },
+ {},
+};
+
+U_BOOT_DRIVER(sysreset_cv1800b) = {
+ .name = "cv1800b_sysreset",
+ .id = UCLASS_SYSRESET,
+ .ops = &cv1800b_sysreset,
+ .of_match = cv1800b_sysreset_ids
+};
diff --git a/drivers/sysreset/sysreset_gpio.c b/drivers/sysreset/sysreset_gpio.c
index de42b59..4701884 100644
--- a/drivers/sysreset/sysreset_gpio.c
+++ b/drivers/sysreset/sysreset_gpio.c
@@ -3,7 +3,6 @@
* Copyright (C) 2018 Xilinx, Inc. - Michal Simek
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <log.h>
diff --git a/drivers/sysreset/sysreset_microblaze.c b/drivers/sysreset/sysreset_microblaze.c
index 83a7f77..b81d82f 100644
--- a/drivers/sysreset/sysreset_microblaze.c
+++ b/drivers/sysreset/sysreset_microblaze.c
@@ -3,7 +3,6 @@
* Copyright (C) 2018 Xilinx, Inc. - Michal Simek
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <sysreset.h>
diff --git a/drivers/sysreset/sysreset_mpc83xx.c b/drivers/sysreset/sysreset_mpc83xx.c
index ca48328..dca4929 100644
--- a/drivers/sysreset/sysreset_mpc83xx.c
+++ b/drivers/sysreset/sysreset_mpc83xx.c
@@ -4,7 +4,6 @@
* Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc
*/
-#include <common.h>
#include <command.h>
#include <dm.h>
#include <log.h>
diff --git a/drivers/sysreset/sysreset_octeon.c b/drivers/sysreset/sysreset_octeon.c
index ebdea6a..c162237 100644
--- a/drivers/sysreset/sysreset_octeon.c
+++ b/drivers/sysreset/sysreset_octeon.c
@@ -3,7 +3,6 @@
* Copyright (C) 2020 Stefan Roese <sr@denx.de>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <sysreset.h>
diff --git a/drivers/sysreset/sysreset_psci.c b/drivers/sysreset/sysreset_psci.c
index aa09d0b..89b4f2d 100644
--- a/drivers/sysreset/sysreset_psci.c
+++ b/drivers/sysreset/sysreset_psci.c
@@ -3,7 +3,6 @@
* Copyright (C) 2017 Masahiro Yamada <yamada.masahiro@socionext.com>
*/
-#include <common.h>
#include <dm.h>
#include <sysreset.h>
#include <linux/errno.h>
diff --git a/drivers/sysreset/sysreset_resetctl.c b/drivers/sysreset/sysreset_resetctl.c
index 25bd5c9..fbe3999 100644
--- a/drivers/sysreset/sysreset_resetctl.c
+++ b/drivers/sysreset/sysreset_resetctl.c
@@ -5,7 +5,6 @@
* Author: Weijie Gao <weijie.gao@mediatek.com>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <sysreset.h>
diff --git a/drivers/sysreset/sysreset_rockchip.c b/drivers/sysreset/sysreset_rockchip.c
index f353f9b..00308f9 100644
--- a/drivers/sysreset/sysreset_rockchip.c
+++ b/drivers/sysreset/sysreset_rockchip.c
@@ -3,7 +3,6 @@
* (C) Copyright 2017 Rockchip Electronics Co., Ltd
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <sysreset.h>
diff --git a/drivers/sysreset/sysreset_sandbox.c b/drivers/sysreset/sysreset_sandbox.c
index c12eda8..93179f9 100644
--- a/drivers/sysreset/sysreset_sandbox.c
+++ b/drivers/sysreset/sysreset_sandbox.c
@@ -4,7 +4,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <sysreset.h>
diff --git a/drivers/sysreset/sysreset_sbi.c b/drivers/sysreset/sysreset_sbi.c
index 5e8090d..4581912 100644
--- a/drivers/sysreset/sysreset_sbi.c
+++ b/drivers/sysreset/sysreset_sbi.c
@@ -3,7 +3,6 @@
* Copyright 2021, Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <log.h>
diff --git a/drivers/sysreset/sysreset_socfpga.c b/drivers/sysreset/sysreset_socfpga.c
index 9b62dd5..a07b0f4 100644
--- a/drivers/sysreset/sysreset_socfpga.c
+++ b/drivers/sysreset/sysreset_socfpga.c
@@ -4,7 +4,6 @@
* Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <sysreset.h>
diff --git a/drivers/sysreset/sysreset_socfpga_soc64.c b/drivers/sysreset/sysreset_socfpga_soc64.c
index 9837aad..6f44792 100644
--- a/drivers/sysreset/sysreset_socfpga_soc64.c
+++ b/drivers/sysreset/sysreset_socfpga_soc64.c
@@ -4,7 +4,6 @@
* Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <sysreset.h>
diff --git a/drivers/sysreset/sysreset_sti.c b/drivers/sysreset/sysreset_sti.c
index edd90aa..110b7e2 100644
--- a/drivers/sysreset/sysreset_sti.c
+++ b/drivers/sysreset/sysreset_sti.c
@@ -4,7 +4,6 @@
* Author(s): Patrice Chotard, <patrice.chotard@foss.st.com> for STMicroelectronics.
*/
-#include <common.h>
#include <dm.h>
#include <regmap.h>
#include <syscon.h>
diff --git a/drivers/sysreset/sysreset_syscon.c b/drivers/sysreset/sysreset_syscon.c
index e468dac..57144fa 100644
--- a/drivers/sysreset/sysreset_syscon.c
+++ b/drivers/sysreset/sysreset_syscon.c
@@ -7,7 +7,6 @@
* Author: Feng Kan <fkan@apm.com>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <regmap.h>
diff --git a/drivers/sysreset/sysreset_watchdog.c b/drivers/sysreset/sysreset_watchdog.c
index 6db5aa7..49c061e 100644
--- a/drivers/sysreset/sysreset_watchdog.c
+++ b/drivers/sysreset/sysreset_watchdog.c
@@ -3,7 +3,6 @@
* Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com>
*/
-#include <common.h>
#include <dm.h>
#include <dm/device-internal.h>
#include <errno.h>
diff --git a/drivers/sysreset/sysreset_x86.c b/drivers/sysreset/sysreset_x86.c
index dc772b5..c2f28c6 100644
--- a/drivers/sysreset/sysreset_x86.c
+++ b/drivers/sysreset/sysreset_x86.c
@@ -5,7 +5,6 @@
* Generic reset driver for x86 processor
*/
-#include <common.h>
#include <dm.h>
#include <efi_loader.h>
#include <pch.h>
diff --git a/drivers/sysreset/sysreset_xtfpga.c b/drivers/sysreset/sysreset_xtfpga.c
index 84fbc79..ab71ea1 100644
--- a/drivers/sysreset/sysreset_xtfpga.c
+++ b/drivers/sysreset/sysreset_xtfpga.c
@@ -5,7 +5,7 @@
* (C) Copyright 2016 Cadence Design Systems Inc.
*/
-#include <common.h>
+#include <config.h>
#include <dm.h>
#include <errno.h>
#include <sysreset.h>
diff --git a/drivers/tee/broadcom/chimp_optee.c b/drivers/tee/broadcom/chimp_optee.c
index 37f9b09..bd146ef 100644
--- a/drivers/tee/broadcom/chimp_optee.c
+++ b/drivers/tee/broadcom/chimp_optee.c
@@ -3,9 +3,10 @@
* Copyright 2020 Broadcom.
*/
-#include <common.h>
#include <tee.h>
#include <broadcom/chimp.h>
+#include <linux/errno.h>
+#include <string.h>
#ifdef CONFIG_CHIMP_OPTEE
diff --git a/drivers/tee/optee/Kconfig b/drivers/tee/optee/Kconfig
index 9dc65b0..db0bcfa 100644
--- a/drivers/tee/optee/Kconfig
+++ b/drivers/tee/optee/Kconfig
@@ -19,7 +19,7 @@
default y
help
Enables support for the AVB Trusted Application (TA) in OP-TEE.
- The TA can support the "avb" subcommands "read_rb", "write"rb"
+ The TA can support the "avb" subcommands "read_rb", "write_rb"
and "is_unlocked".
config OPTEE_TA_RPC_TEST
diff --git a/drivers/tee/optee/core.c b/drivers/tee/optee/core.c
index 47f845c..5fc0505 100644
--- a/drivers/tee/optee/core.c
+++ b/drivers/tee/optee/core.c
@@ -3,7 +3,6 @@
* Copyright (c) 2018-2020 Linaro Limited
*/
-#include <common.h>
#include <cpu_func.h>
#include <dm.h>
#include <dm/device_compat.h>
diff --git a/drivers/tee/optee/i2c.c b/drivers/tee/optee/i2c.c
index ef4e10f..e3fb998 100644
--- a/drivers/tee/optee/i2c.c
+++ b/drivers/tee/optee/i2c.c
@@ -3,7 +3,6 @@
* Copyright (c) 2020 Foundries.io Ltd
*/
-#include <common.h>
#include <dm.h>
#include <i2c.h>
#include <tee.h>
diff --git a/drivers/tee/optee/rpmb.c b/drivers/tee/optee/rpmb.c
index 5bc1375..bacced6 100644
--- a/drivers/tee/optee/rpmb.c
+++ b/drivers/tee/optee/rpmb.c
@@ -3,7 +3,6 @@
* Copyright (c) 2018 Linaro Limited
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <tee.h>
diff --git a/drivers/tee/optee/supplicant.c b/drivers/tee/optee/supplicant.c
index f9dd874..8a426f5 100644
--- a/drivers/tee/optee/supplicant.c
+++ b/drivers/tee/optee/supplicant.c
@@ -3,10 +3,10 @@
* Copyright (c) 2018, Linaro Limited
*/
-#include <common.h>
#include <log.h>
#include <malloc.h>
#include <tee.h>
+#include <linux/errno.h>
#include <linux/types.h>
#include "optee_msg.h"
diff --git a/drivers/tee/sandbox.c b/drivers/tee/sandbox.c
index ec66401..86b16a3 100644
--- a/drivers/tee/sandbox.c
+++ b/drivers/tee/sandbox.c
@@ -2,7 +2,7 @@
/*
* Copyright (C) 2018 Linaro Limited
*/
-#include <common.h>
+
#include <dm.h>
#include <sandboxtee.h>
#include <tee.h>
@@ -174,7 +174,7 @@
uint slot;
u64 val;
char *value;
- u32 value_sz;
+ u32 value_sz, tmp_sz;
switch (func) {
case TA_AVB_CMD_READ_ROLLBACK_INDEX:
@@ -267,8 +267,12 @@
if (!ep)
return TEE_ERROR_ITEM_NOT_FOUND;
- value_sz = strlen(ep->data) + 1;
- memcpy(value, ep->data, value_sz);
+ tmp_sz = strlen(ep->data) + 1;
+ if (value_sz < tmp_sz)
+ return TEE_ERROR_SHORT_BUFFER;
+
+ memcpy(value, ep->data, tmp_sz);
+ params[1].u.memref.size = tmp_sz;
return TEE_SUCCESS;
case TA_AVB_CMD_WRITE_PERSIST_VALUE:
diff --git a/drivers/tee/tee-uclass.c b/drivers/tee/tee-uclass.c
index 52412a4..0194d73 100644
--- a/drivers/tee/tee-uclass.c
+++ b/drivers/tee/tee-uclass.c
@@ -5,7 +5,6 @@
#define LOG_CATEGORY UCLASS_TEE
-#include <common.h>
#include <cpu_func.h>
#include <dm.h>
#include <log.h>
diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
index 681b621..440eb64 100644
--- a/drivers/thermal/Kconfig
+++ b/drivers/thermal/Kconfig
@@ -41,4 +41,10 @@
Enable thermal support for for the Texas Instruments DRA752 SoC family.
The driver supports reading CPU temperature.
+config TI_LM74_THERMAL
+ bool "Temperature sensor driver for TI LM74 chip"
+ help
+ Enable thermal support for the Texas Instruments LM74 chip.
+ The driver supports reading CPU temperature.
+
endif # if DM_THERMAL
diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile
index 8acc7d2..b5ab0fc 100644
--- a/drivers/thermal/Makefile
+++ b/drivers/thermal/Makefile
@@ -9,3 +9,4 @@
obj-$(CONFIG_IMX_SCU_THERMAL) += imx_scu_thermal.o
obj-$(CONFIG_TI_DRA7_THERMAL) += ti-bandgap.o
obj-$(CONFIG_IMX_TMU) += imx_tmu.o
+obj-$(CONFIG_TI_LM74_THERMAL) += ti-lm74.o
diff --git a/drivers/thermal/imx_scu_thermal.c b/drivers/thermal/imx_scu_thermal.c
index 3ec131c..fc2b0e2 100644
--- a/drivers/thermal/imx_scu_thermal.c
+++ b/drivers/thermal/imx_scu_thermal.c
@@ -4,7 +4,6 @@
*/
#include <config.h>
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <log.h>
diff --git a/drivers/thermal/imx_thermal.c b/drivers/thermal/imx_thermal.c
index 2f6343e..ea1fcc3 100644
--- a/drivers/thermal/imx_thermal.c
+++ b/drivers/thermal/imx_thermal.c
@@ -6,7 +6,6 @@
*/
#include <config.h>
-#include <common.h>
#include <div64.h>
#include <fuse.h>
#include <log.h>
diff --git a/drivers/thermal/imx_tmu.c b/drivers/thermal/imx_tmu.c
index ea6c832..70d002a 100644
--- a/drivers/thermal/imx_tmu.c
+++ b/drivers/thermal/imx_tmu.c
@@ -5,7 +5,6 @@
*/
#include <config.h>
-#include <common.h>
#include <asm/global_data.h>
#include <asm/io.h>
#include <asm/arch/clock.h>
diff --git a/drivers/thermal/thermal-uclass.c b/drivers/thermal/thermal-uclass.c
index 700df8a..f0fe912 100644
--- a/drivers/thermal/thermal-uclass.c
+++ b/drivers/thermal/thermal-uclass.c
@@ -5,7 +5,6 @@
#define LOG_CATEGORY UCLASS_THERMAL
-#include <common.h>
#include <dm.h>
#include <thermal.h>
#include <errno.h>
diff --git a/drivers/thermal/thermal_sandbox.c b/drivers/thermal/thermal_sandbox.c
index acc364f..9af0d02 100644
--- a/drivers/thermal/thermal_sandbox.c
+++ b/drivers/thermal/thermal_sandbox.c
@@ -6,13 +6,12 @@
* Sandbox driver for the thermal uclass.
*/
-#include <common.h>
#include <dm.h>
#include <thermal.h>
int sandbox_thermal_get_temp(struct udevice *dev, int *temp)
{
- /* Simply return 100°C */
+ /* Simply return 100 deg C */
*temp = 100;
return 0;
diff --git a/drivers/thermal/ti-lm74.c b/drivers/thermal/ti-lm74.c
new file mode 100644
index 0000000..7d56f75
--- /dev/null
+++ b/drivers/thermal/ti-lm74.c
@@ -0,0 +1,52 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * TI LM74 temperature sensor driver
+ *
+ * Copyright (C) 2024 CS GROUP France
+ *
+ */
+
+#include <dm.h>
+#include <thermal.h>
+#include <spi.h>
+
+static int ti_lm74_get_temp(struct udevice *dev, int *temp)
+{
+ char buf[2];
+ s16 raw;
+ int ret;
+
+ ret = dm_spi_claim_bus(dev);
+ if (ret)
+ return ret;
+
+ ret = dm_spi_xfer(dev, 16, NULL, buf, SPI_XFER_BEGIN | SPI_XFER_END);
+
+ dm_spi_release_bus(dev);
+ if (ret)
+ return ret;
+
+ raw = ((buf[0] << 8) + buf[1]) >> 3;
+
+ *temp = (((int)raw * 125) + 1000) / 2000;
+
+ return 0;
+}
+
+static struct dm_thermal_ops ti_lm74_ops = {
+ .get_temp = ti_lm74_get_temp,
+};
+
+static const struct udevice_id of_ti_lm74_match[] = {
+ {
+ .compatible = "ti,lm74",
+ },
+ {},
+};
+
+U_BOOT_DRIVER(ti_bandgap_thermal) = {
+ .name = "ti_lm74_thermal",
+ .id = UCLASS_THERMAL,
+ .ops = &ti_lm74_ops,
+ .of_match = of_ti_lm74_match,
+};
diff --git a/drivers/timer/altera_timer.c b/drivers/timer/altera_timer.c
index 040dc65..ece246c 100644
--- a/drivers/timer/altera_timer.c
+++ b/drivers/timer/altera_timer.c
@@ -7,7 +7,6 @@
* Scott McNutt <smcnutt@psyent.com>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <timer.h>
diff --git a/drivers/timer/andes_plmt_timer.c b/drivers/timer/andes_plmt_timer.c
index 42dd4b6..20baaf6 100644
--- a/drivers/timer/andes_plmt_timer.c
+++ b/drivers/timer/andes_plmt_timer.c
@@ -8,7 +8,6 @@
* associated with timer tick.
*/
-#include <common.h>
#include <dm.h>
#include <timer.h>
#include <asm/io.h>
diff --git a/drivers/timer/arc_timer.c b/drivers/timer/arc_timer.c
index 497f8a0..413bcc3 100644
--- a/drivers/timer/arc_timer.c
+++ b/drivers/timer/arc_timer.c
@@ -3,7 +3,6 @@
* Copyright (C) 2016 Synopsys, Inc. All rights reserved.
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <timer.h>
diff --git a/drivers/timer/arm_global_timer.c b/drivers/timer/arm_global_timer.c
index 2e50d9f..b805792 100644
--- a/drivers/timer/arm_global_timer.c
+++ b/drivers/timer/arm_global_timer.c
@@ -6,7 +6,7 @@
* ARM Cortext A9 global timer driver
*/
-#include <common.h>
+#include <config.h>
#include <dm.h>
#include <clk.h>
#include <timer.h>
diff --git a/drivers/timer/arm_twd_timer.c b/drivers/timer/arm_twd_timer.c
index 40ccd16..2b2f359 100644
--- a/drivers/timer/arm_twd_timer.c
+++ b/drivers/timer/arm_twd_timer.c
@@ -27,7 +27,6 @@
* Alex Zuepke <azu@sysgo.de>
*/
-#include <common.h>
#include <dm.h>
#include <fdtdec.h>
#include <timer.h>
diff --git a/drivers/timer/ast_timer.c b/drivers/timer/ast_timer.c
index 78adc96..6601cab 100644
--- a/drivers/timer/ast_timer.c
+++ b/drivers/timer/ast_timer.c
@@ -3,7 +3,6 @@
* Copyright 2016 Google Inc.
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <timer.h>
diff --git a/drivers/timer/atmel_pit_timer.c b/drivers/timer/atmel_pit_timer.c
index 5cf46f2..0a367a5 100644
--- a/drivers/timer/atmel_pit_timer.c
+++ b/drivers/timer/atmel_pit_timer.c
@@ -4,7 +4,6 @@
* Wenyou.Yang <wenyou.yang@microchip.com>
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <timer.h>
diff --git a/drivers/timer/atmel_tcb_timer.c b/drivers/timer/atmel_tcb_timer.c
index 8c17987..3a328b2 100644
--- a/drivers/timer/atmel_tcb_timer.c
+++ b/drivers/timer/atmel_tcb_timer.c
@@ -5,7 +5,6 @@
* Author: Clément Léger <clement.leger@bootlin.com>
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <timer.h>
diff --git a/drivers/timer/cadence-ttc.c b/drivers/timer/cadence-ttc.c
index 2eff450..3cffb1b 100644
--- a/drivers/timer/cadence-ttc.c
+++ b/drivers/timer/cadence-ttc.c
@@ -3,7 +3,6 @@
* Copyright (C) 2018 Xilinx, Inc. (Michal Simek)
*/
-#include <common.h>
#include <bootstage.h>
#include <dm.h>
#include <errno.h>
diff --git a/drivers/timer/dw-apb-timer.c b/drivers/timer/dw-apb-timer.c
index 0607f75..77ccb98 100644
--- a/drivers/timer/dw-apb-timer.c
+++ b/drivers/timer/dw-apb-timer.c
@@ -5,7 +5,6 @@
* Copyright (C) 2018 Marek Vasut <marex@denx.de>
*/
-#include <common.h>
#include <dm.h>
#include <clk.h>
#include <dt-structs.h>
diff --git a/drivers/timer/fttmr010_timer.c b/drivers/timer/fttmr010_timer.c
index b6289e6..c41bbfc 100644
--- a/drivers/timer/fttmr010_timer.c
+++ b/drivers/timer/fttmr010_timer.c
@@ -5,7 +5,6 @@
*
* 23/08/2022 Port to DM
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <timer.h>
diff --git a/drivers/timer/imx-gpt-timer.c b/drivers/timer/imx-gpt-timer.c
index 9c3b64a..07b9fdb 100644
--- a/drivers/timer/imx-gpt-timer.c
+++ b/drivers/timer/imx-gpt-timer.c
@@ -4,7 +4,7 @@
* Author(s): Giulio Benetti <giulio.benetti@benettiengineering.com>
*/
-#include <common.h>
+#include <config.h>
#include <clk.h>
#include <dm.h>
#include <fdtdec.h>
diff --git a/drivers/timer/mchp-pit64b-timer.c b/drivers/timer/mchp-pit64b-timer.c
index c9806d7..1a5b2e6 100644
--- a/drivers/timer/mchp-pit64b-timer.c
+++ b/drivers/timer/mchp-pit64b-timer.c
@@ -7,7 +7,6 @@
* Author: Claudiu Beznea <claudiu.beznea@microchip.com>
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <timer.h>
diff --git a/drivers/timer/mpc83xx_timer.c b/drivers/timer/mpc83xx_timer.c
index 7814cb6..9da7447 100644
--- a/drivers/timer/mpc83xx_timer.c
+++ b/drivers/timer/mpc83xx_timer.c
@@ -4,7 +4,7 @@
* Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc
*/
-#include <common.h>
+#include <config.h>
#include <clk.h>
#include <dm.h>
#include <irq_func.h>
diff --git a/drivers/timer/mtk_timer.c b/drivers/timer/mtk_timer.c
index 223e63f..8216c28 100644
--- a/drivers/timer/mtk_timer.c
+++ b/drivers/timer/mtk_timer.c
@@ -7,7 +7,6 @@
*/
#include <clk.h>
-#include <common.h>
#include <dm.h>
#include <timer.h>
#include <asm/io.h>
diff --git a/drivers/timer/nomadik-mtu-timer.c b/drivers/timer/nomadik-mtu-timer.c
index 4d24de1..9a05582 100644
--- a/drivers/timer/nomadik-mtu-timer.c
+++ b/drivers/timer/nomadik-mtu-timer.c
@@ -12,7 +12,6 @@
* Copyright (C) 2010 Linus Walleij for ST-Ericsson
*/
-#include <common.h>
#include <dm.h>
#include <timer.h>
#include <asm/io.h>
diff --git a/drivers/timer/npcm-timer.c b/drivers/timer/npcm-timer.c
index 4562a6f..9463fd2 100644
--- a/drivers/timer/npcm-timer.c
+++ b/drivers/timer/npcm-timer.c
@@ -3,7 +3,6 @@
* Copyright (c) 2022 Nuvoton Technology Corp.
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <timer.h>
diff --git a/drivers/timer/omap-timer.c b/drivers/timer/omap-timer.c
index 9b6d97d..fda6356 100644
--- a/drivers/timer/omap-timer.c
+++ b/drivers/timer/omap-timer.c
@@ -5,7 +5,6 @@
* Copyright (C) 2015, Texas Instruments, Incorporated
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <timer.h>
diff --git a/drivers/timer/orion-timer.c b/drivers/timer/orion-timer.c
index 9cab27f..821b681 100644
--- a/drivers/timer/orion-timer.c
+++ b/drivers/timer/orion-timer.c
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+
#include <asm/io.h>
-#include <common.h>
+#include <config.h>
#include <div64.h>
#include <dm/device.h>
#include <dm/fdtaddr.h>
diff --git a/drivers/timer/ostm_timer.c b/drivers/timer/ostm_timer.c
index 3bf0d46..314f956 100644
--- a/drivers/timer/ostm_timer.c
+++ b/drivers/timer/ostm_timer.c
@@ -5,7 +5,6 @@
* Copyright (C) 2019 Marek Vasut <marek.vasut@gmail.com>
*/
-#include <common.h>
#include <clock_legacy.h>
#include <malloc.h>
#include <asm/global_data.h>
diff --git a/drivers/timer/riscv_aclint_timer.c b/drivers/timer/riscv_aclint_timer.c
index 73fb879..35da1ea 100644
--- a/drivers/timer/riscv_aclint_timer.c
+++ b/drivers/timer/riscv_aclint_timer.c
@@ -4,7 +4,7 @@
* Copyright (C) 2018, Bin Meng <bmeng.cn@gmail.com>
*/
-#include <common.h>
+#include <config.h>
#include <clk.h>
#include <div64.h>
#include <dm.h>
diff --git a/drivers/timer/riscv_timer.c b/drivers/timer/riscv_timer.c
index 169c03d..1f4980c 100644
--- a/drivers/timer/riscv_timer.c
+++ b/drivers/timer/riscv_timer.c
@@ -10,7 +10,7 @@
* This driver provides generic timer support for S-mode U-Boot.
*/
-#include <common.h>
+#include <config.h>
#include <div64.h>
#include <dm.h>
#include <errno.h>
diff --git a/drivers/timer/rockchip_timer.c b/drivers/timer/rockchip_timer.c
index e66c49a..96c010f 100644
--- a/drivers/timer/rockchip_timer.c
+++ b/drivers/timer/rockchip_timer.c
@@ -3,7 +3,6 @@
* Copyright (C) 2017 Theobroma Systems Design und Consulting GmbH
*/
-#include <common.h>
#include <bootstage.h>
#include <dm.h>
#include <init.h>
diff --git a/drivers/timer/sandbox_timer.c b/drivers/timer/sandbox_timer.c
index 1da7e0c..e8b54a0 100644
--- a/drivers/timer/sandbox_timer.c
+++ b/drivers/timer/sandbox_timer.c
@@ -3,7 +3,6 @@
* Copyright (C) 2015 Thomas Chou <thomas@wytron.com.tw>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <timer.h>
diff --git a/drivers/timer/sp804_timer.c b/drivers/timer/sp804_timer.c
index 8fd4afb..a254e29 100644
--- a/drivers/timer/sp804_timer.c
+++ b/drivers/timer/sp804_timer.c
@@ -4,7 +4,6 @@
* Copyright (C) 2022 Arm Ltd.
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <init.h>
diff --git a/drivers/timer/starfive-timer.c b/drivers/timer/starfive-timer.c
index 6ac7d7f..6b79c88 100644
--- a/drivers/timer/starfive-timer.c
+++ b/drivers/timer/starfive-timer.c
@@ -4,7 +4,6 @@
* Author: Kuan Lim Lee <kuanlim.lee@starfivetech.com>
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <time.h>
diff --git a/drivers/timer/stm32_timer.c b/drivers/timer/stm32_timer.c
index 1213a14..1dc21c5 100644
--- a/drivers/timer/stm32_timer.c
+++ b/drivers/timer/stm32_timer.c
@@ -6,7 +6,7 @@
#define LOG_CATEGORY UCLASS_TIMER
-#include <common.h>
+#include <config.h>
#include <clk.h>
#include <dm.h>
#include <fdtdec.h>
diff --git a/drivers/timer/tegra-timer.c b/drivers/timer/tegra-timer.c
index a867c64..3545424 100644
--- a/drivers/timer/tegra-timer.c
+++ b/drivers/timer/tegra-timer.c
@@ -3,7 +3,6 @@
* Copyright (C) 2022 Svyatoslav Ryhel <clamor95@gmail.com>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <timer.h>
diff --git a/drivers/timer/timer-uclass.c b/drivers/timer/timer-uclass.c
index 60ff655..8305f06 100644
--- a/drivers/timer/timer-uclass.c
+++ b/drivers/timer/timer-uclass.c
@@ -5,7 +5,6 @@
#define LOG_CATEGORY UCLASS_TIMER
-#include <common.h>
#include <clk.h>
#include <cpu.h>
#include <dm.h>
diff --git a/drivers/timer/tsc_timer.c b/drivers/timer/tsc_timer.c
index f86a0b8..80c084f 100644
--- a/drivers/timer/tsc_timer.c
+++ b/drivers/timer/tsc_timer.c
@@ -6,7 +6,6 @@
* arch/x86/kernel/tsc_msr.c and arch/x86/kernel/tsc.c
*/
-#include <common.h>
#include <bootstage.h>
#include <dm.h>
#include <log.h>
diff --git a/drivers/timer/xilinx-timer.c b/drivers/timer/xilinx-timer.c
index 172fd9f..54148aa 100644
--- a/drivers/timer/xilinx-timer.c
+++ b/drivers/timer/xilinx-timer.c
@@ -7,7 +7,6 @@
* Michal SIMEK <monstr@monstr.eu>
*/
-#include <common.h>
#include <dm.h>
#include <timer.h>
#include <regmap.h>
diff --git a/drivers/tpm/cr50_i2c.c b/drivers/tpm/cr50_i2c.c
index acf4c78..08ec179 100644
--- a/drivers/tpm/cr50_i2c.c
+++ b/drivers/tpm/cr50_i2c.c
@@ -7,12 +7,12 @@
#define LOG_CATEGORY UCLASS_TPM
-#include <common.h>
#include <dm.h>
#include <i2c.h>
#include <irq.h>
#include <log.h>
#include <spl.h>
+#include <time.h>
#include <tpm-common.h>
#include <tpm-v2.h>
#include <acpi/acpigen.h>
diff --git a/drivers/tpm/sandbox_common.c b/drivers/tpm/sandbox_common.c
index 7e0b250..596e015 100644
--- a/drivers/tpm/sandbox_common.c
+++ b/drivers/tpm/sandbox_common.c
@@ -7,7 +7,6 @@
#define LOG_CATEGORY UCLASS_TPM
-#include <common.h>
#include <tpm-v1.h>
#include <tpm-v2.h>
#include <asm/unaligned.h>
diff --git a/drivers/tpm/tpm-uclass.c b/drivers/tpm/tpm-uclass.c
index b2286f7..0fade2d 100644
--- a/drivers/tpm/tpm-uclass.c
+++ b/drivers/tpm/tpm-uclass.c
@@ -6,9 +6,9 @@
#define LOG_CATEGORY UCLASS_TPM
-#include <common.h>
#include <dm.h>
#include <log.h>
+#include <time.h>
#include <tpm_api.h>
#include <tpm-v1.h>
#include <tpm-v2.h>
diff --git a/drivers/tpm/tpm2_ftpm_tee.c b/drivers/tpm/tpm2_ftpm_tee.c
index c61ff2c..f2ced50 100644
--- a/drivers/tpm/tpm2_ftpm_tee.c
+++ b/drivers/tpm/tpm2_ftpm_tee.c
@@ -13,7 +13,6 @@
* https://github.com/microsoft/ms-tpm-20-ref/tree/master/Samples/ARM32-FirmwareTPM/optee_ta/fTPM
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <tpm-v2.h>
diff --git a/drivers/tpm/tpm2_tis_core.c b/drivers/tpm/tpm2_tis_core.c
index 81b9210..680a640 100644
--- a/drivers/tpm/tpm2_tis_core.c
+++ b/drivers/tpm/tpm2_tis_core.c
@@ -5,8 +5,8 @@
* Based on the Linux TIS core interface and U-Boot original SPI TPM driver
*/
-#include <common.h>
#include <dm.h>
+#include <time.h>
#include <tpm-v2.h>
#include <linux/delay.h>
#include <linux/unaligned/be_byteshift.h>
diff --git a/drivers/tpm/tpm2_tis_i2c.c b/drivers/tpm/tpm2_tis_i2c.c
index 99d1cf21..93efccc 100644
--- a/drivers/tpm/tpm2_tis_i2c.c
+++ b/drivers/tpm/tpm2_tis_i2c.c
@@ -3,7 +3,6 @@
* Copyright 2022 IBM Corp.
*/
-#include <common.h>
#include <dm.h>
#include <fdtdec.h>
#include <i2c.h>
diff --git a/drivers/tpm/tpm2_tis_mmio.c b/drivers/tpm/tpm2_tis_mmio.c
index a646ce4..dee5503 100644
--- a/drivers/tpm/tpm2_tis_mmio.c
+++ b/drivers/tpm/tpm2_tis_mmio.c
@@ -5,7 +5,6 @@
* Specifications at www.trustedcomputinggroup.org
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <tpm-v2.h>
diff --git a/drivers/tpm/tpm2_tis_sandbox.c b/drivers/tpm/tpm2_tis_sandbox.c
index d15a28d..50e308e 100644
--- a/drivers/tpm/tpm2_tis_sandbox.c
+++ b/drivers/tpm/tpm2_tis_sandbox.c
@@ -4,7 +4,6 @@
* Author: Miquel Raynal <miquel.raynal@bootlin.com>
*/
-#include <common.h>
#include <dm.h>
#include <tpm-v2.h>
#include <asm/state.h>
diff --git a/drivers/tpm/tpm2_tis_spi.c b/drivers/tpm/tpm2_tis_spi.c
index de9cf8f..28079b5 100644
--- a/drivers/tpm/tpm2_tis_spi.c
+++ b/drivers/tpm/tpm2_tis_spi.c
@@ -13,11 +13,11 @@
* It is based on the U-Boot driver tpm_tis_infineon_i2c.c.
*/
-#include <common.h>
#include <dm.h>
#include <fdtdec.h>
#include <log.h>
#include <spi.h>
+#include <time.h>
#include <tpm-v2.h>
#include <linux/bitops.h>
#include <linux/delay.h>
diff --git a/drivers/tpm/tpm_atmel_twi.c b/drivers/tpm/tpm_atmel_twi.c
index fd2a45d..05dd665 100644
--- a/drivers/tpm/tpm_atmel_twi.c
+++ b/drivers/tpm/tpm_atmel_twi.c
@@ -5,11 +5,11 @@
* Written by Dirk Eibach <dirk.eibach@gdsys.cc>
*/
-#include <common.h>
#include <display_options.h>
#include <dm.h>
#include <tpm-v1.h>
#include <i2c.h>
+#include <time.h>
#include <asm/unaligned.h>
#include <linux/delay.h>
diff --git a/drivers/tpm/tpm_tis_infineon.c b/drivers/tpm/tpm_tis_infineon.c
index 16f4af0..e2f6238 100644
--- a/drivers/tpm/tpm_tis_infineon.c
+++ b/drivers/tpm/tpm_tis_infineon.c
@@ -19,11 +19,11 @@
* Version: 2.1.1
*/
-#include <common.h>
#include <dm.h>
#include <fdtdec.h>
#include <i2c.h>
#include <log.h>
+#include <time.h>
#include <tpm-v1.h>
#include <linux/delay.h>
#include <linux/errno.h>
diff --git a/drivers/tpm/tpm_tis_lpc.c b/drivers/tpm/tpm_tis_lpc.c
index 13a133d..dec7acb 100644
--- a/drivers/tpm/tpm_tis_lpc.c
+++ b/drivers/tpm/tpm_tis_lpc.c
@@ -12,7 +12,6 @@
* slb9635), so this driver provides access to locality 0 only.
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <mapmem.h>
diff --git a/drivers/tpm/tpm_tis_sandbox.c b/drivers/tpm/tpm_tis_sandbox.c
index 7350e1c..2bc7dc8 100644
--- a/drivers/tpm/tpm_tis_sandbox.c
+++ b/drivers/tpm/tpm_tis_sandbox.c
@@ -3,7 +3,6 @@
* Copyright (c) 2013 Google, Inc
*/
-#include <common.h>
#include <display_options.h>
#include <dm.h>
#include <tpm-v1.h>
diff --git a/drivers/tpm/tpm_tis_st33zp24_i2c.c b/drivers/tpm/tpm_tis_st33zp24_i2c.c
index e0eeabb..1a265b2 100644
--- a/drivers/tpm/tpm_tis_st33zp24_i2c.c
+++ b/drivers/tpm/tpm_tis_st33zp24_i2c.c
@@ -12,7 +12,6 @@
* STMicroelectronics Protocol Stack Specification version 1.2.0.
*/
-#include <common.h>
#include <dm.h>
#include <fdtdec.h>
#include <i2c.h>
diff --git a/drivers/tpm/tpm_tis_st33zp24_spi.c b/drivers/tpm/tpm_tis_st33zp24_spi.c
index f0de8a6..2cf6903 100644
--- a/drivers/tpm/tpm_tis_st33zp24_spi.c
+++ b/drivers/tpm/tpm_tis_st33zp24_spi.c
@@ -12,7 +12,6 @@
* STMicroelectronics Protocol Stack Specification version 1.2.0.
*/
-#include <common.h>
#include <dm.h>
#include <fdtdec.h>
#include <log.h>
diff --git a/drivers/ufs/cdns-platform.c b/drivers/ufs/cdns-platform.c
index d1f3469..510a6a6 100644
--- a/drivers/ufs/cdns-platform.c
+++ b/drivers/ufs/cdns-platform.c
@@ -6,7 +6,6 @@
*/
#include <clk.h>
-#include <common.h>
#include <dm.h>
#include <ufs.h>
#include <asm/io.h>
diff --git a/drivers/ufs/ti-j721e-ufs.c b/drivers/ufs/ti-j721e-ufs.c
index 1860e0d..c5c0861 100644
--- a/drivers/ufs/ti-j721e-ufs.c
+++ b/drivers/ufs/ti-j721e-ufs.c
@@ -5,7 +5,6 @@
#include <asm/io.h>
#include <clk.h>
-#include <common.h>
#include <dm.h>
#include <dm/device_compat.h>
#include <linux/bitops.h>
diff --git a/drivers/ufs/ufs-pci.c b/drivers/ufs/ufs-pci.c
index ad41358..871f3f5 100644
--- a/drivers/ufs/ufs-pci.c
+++ b/drivers/ufs/ufs-pci.c
@@ -4,7 +4,6 @@
* Author: Bin Meng <bmeng@tinylab.org>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <pci.h>
diff --git a/drivers/ufs/ufs-uclass.c b/drivers/ufs/ufs-uclass.c
index 92fcdf4..334bfcf 100644
--- a/drivers/ufs/ufs-uclass.c
+++ b/drivers/ufs/ufs-uclass.c
@@ -7,7 +7,6 @@
#define LOG_CATEGORY UCLASS_UFS
-#include <common.h>
#include "ufs.h"
#include <dm.h>
diff --git a/drivers/ufs/ufs.c b/drivers/ufs/ufs.c
index e4400f3..be64bf9 100644
--- a/drivers/ufs/ufs.c
+++ b/drivers/ufs/ufs.c
@@ -10,7 +10,6 @@
#include <bouncebuf.h>
#include <charset.h>
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <dm/device_compat.h>
diff --git a/drivers/ufs/ufs.h b/drivers/ufs/ufs.h
index 816a5ce..43042c2 100644
--- a/drivers/ufs/ufs.h
+++ b/drivers/ufs/ufs.h
@@ -2,6 +2,7 @@
#ifndef __UFS_H
#define __UFS_H
+#include <linux/types.h>
#include "unipro.h"
struct udevice;
diff --git a/drivers/usb/cdns3/cdns3-ti.c b/drivers/usb/cdns3/cdns3-ti.c
index 2e44aad..ac07226 100644
--- a/drivers/usb/cdns3/cdns3-ti.c
+++ b/drivers/usb/cdns3/cdns3-ti.c
@@ -5,7 +5,6 @@
* Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <dm/device_compat.h>
diff --git a/drivers/usb/cdns3/core.c b/drivers/usb/cdns3/core.c
index 12a741c..b4e9316 100644
--- a/drivers/usb/cdns3/core.c
+++ b/drivers/usb/cdns3/core.c
@@ -11,7 +11,6 @@
* Roger Quadros <rogerq@ti.com>
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <dm/device-internal.h>
diff --git a/drivers/usb/common/common.c b/drivers/usb/common/common.c
index 7137a56..13e9a61 100644
--- a/drivers/usb/common/common.c
+++ b/drivers/usb/common/common.c
@@ -6,7 +6,6 @@
* Texas Instruments Incorporated, <www.ti.com>
*/
-#include <common.h>
#include <dm.h>
#include <asm/global_data.h>
#include <linux/printk.h>
diff --git a/drivers/usb/common/fsl-dt-fixup.c b/drivers/usb/common/fsl-dt-fixup.c
index 00b8cd3..6a68bd7 100644
--- a/drivers/usb/common/fsl-dt-fixup.c
+++ b/drivers/usb/common/fsl-dt-fixup.c
@@ -7,7 +7,6 @@
* Author: Tor Krill tor@excito.com
*/
-#include <common.h>
#include <log.h>
#include <usb.h>
#include <asm/io.h>
diff --git a/drivers/usb/common/fsl-errata.c b/drivers/usb/common/fsl-errata.c
index 9eb1d23..89ae73f 100644
--- a/drivers/usb/common/fsl-errata.c
+++ b/drivers/usb/common/fsl-errata.c
@@ -5,7 +5,6 @@
* Copyright 2013 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <hwconfig.h>
#include <fsl_errata.h>
#include<fsl_usb.h>
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index 96e850b..c443d56 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -13,7 +13,6 @@
* commit cd72f890d2 : usb: dwc3: core: enable phy suspend quirk on non-FPGA
*/
-#include <common.h>
#include <clk.h>
#include <cpu_func.h>
#include <malloc.h>
diff --git a/drivers/usb/dwc3/dwc3-generic.c b/drivers/usb/dwc3/dwc3-generic.c
index 7a00529..8db678e 100644
--- a/drivers/usb/dwc3/dwc3-generic.c
+++ b/drivers/usb/dwc3/dwc3-generic.c
@@ -7,7 +7,6 @@
* Based on dwc3-omap.c.
*/
-#include <common.h>
#include <cpu_func.h>
#include <log.h>
#include <dm.h>
diff --git a/drivers/usb/dwc3/dwc3-layerscape.c b/drivers/usb/dwc3/dwc3-layerscape.c
index c32df23..ff83bf7 100644
--- a/drivers/usb/dwc3/dwc3-layerscape.c
+++ b/drivers/usb/dwc3/dwc3-layerscape.c
@@ -7,7 +7,6 @@
* Based on dwc3-generic.c.
*/
-#include <common.h>
#include <dm.h>
#include <dm/device_compat.h>
#include <dm/device-internal.h>
diff --git a/drivers/usb/dwc3/dwc3-meson-g12a.c b/drivers/usb/dwc3/dwc3-meson-g12a.c
index 1a3e935..21e4f63 100644
--- a/drivers/usb/dwc3/dwc3-meson-g12a.c
+++ b/drivers/usb/dwc3/dwc3-meson-g12a.c
@@ -6,7 +6,6 @@
* Author: Neil Armstrong <narmstrong@baylibre.com>
*/
-#include <common.h>
#include <log.h>
#include <dm.h>
#include <dm/device-internal.h>
diff --git a/drivers/usb/dwc3/dwc3-meson-gxl.c b/drivers/usb/dwc3/dwc3-meson-gxl.c
index 2ce9157..3e693c5 100644
--- a/drivers/usb/dwc3/dwc3-meson-gxl.c
+++ b/drivers/usb/dwc3/dwc3-meson-gxl.c
@@ -7,7 +7,6 @@
*/
#define DEBUG
-#include <common.h>
#include <dm.h>
#include <dm/device-internal.h>
#include <dm/lists.h>
diff --git a/drivers/usb/dwc3/dwc3-omap.c b/drivers/usb/dwc3/dwc3-omap.c
index 53c4d48..4b219c3 100644
--- a/drivers/usb/dwc3/dwc3-omap.c
+++ b/drivers/usb/dwc3/dwc3-omap.c
@@ -13,7 +13,6 @@
* commit 7ee2566ff5 : usb: dwc3: dwc3-omap: get rid of ->prepare()/->complete()
*/
-#include <common.h>
#include <malloc.h>
#include <asm/io.h>
#include <dm.h>
diff --git a/drivers/usb/dwc3/ep0.c b/drivers/usb/dwc3/ep0.c
index 1133cf8..117d38a 100644
--- a/drivers/usb/dwc3/ep0.c
+++ b/drivers/usb/dwc3/ep0.c
@@ -12,7 +12,6 @@
*
* commit c00552ebaf : Merge 3.18-rc7 into usb-next
*/
-#include <common.h>
#include <cpu_func.h>
#include <dm.h>
#include <dm/device_compat.h>
diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c
index 406d36c..4de007c 100644
--- a/drivers/usb/dwc3/gadget.c
+++ b/drivers/usb/dwc3/gadget.c
@@ -13,7 +13,6 @@
* commit 8e74475b0e : usb: dwc3: gadget: use udc-core's reset notifier
*/
-#include <common.h>
#include <cpu_func.h>
#include <log.h>
#include <malloc.h>
diff --git a/drivers/usb/dwc3/samsung_usb_phy.c b/drivers/usb/dwc3/samsung_usb_phy.c
index abbd413..0a77130 100644
--- a/drivers/usb/dwc3/samsung_usb_phy.c
+++ b/drivers/usb/dwc3/samsung_usb_phy.c
@@ -7,7 +7,7 @@
* Author: Joonyoung Shim <jy0922.shim@samsung.com>
*/
-#include <common.h>
+#include <asm/io.h>
#include <asm/arch/power.h>
#include <asm/arch/xhci-exynos.h>
#include <linux/delay.h>
diff --git a/drivers/usb/dwc3/ti_usb_phy.c b/drivers/usb/dwc3/ti_usb_phy.c
index 8ae1308..f0ecdea 100644
--- a/drivers/usb/dwc3/ti_usb_phy.c
+++ b/drivers/usb/dwc3/ti_usb_phy.c
@@ -16,7 +16,6 @@
* and remove" for phy-omap-usb2.c
*/
-#include <common.h>
#include <malloc.h>
#include <ti-usb-phy-uboot.h>
#include <dm/device_compat.h>
diff --git a/drivers/usb/emul/sandbox_flash.c b/drivers/usb/emul/sandbox_flash.c
index 7c5c1ab..24420e3 100644
--- a/drivers/usb/emul/sandbox_flash.c
+++ b/drivers/usb/emul/sandbox_flash.c
@@ -6,7 +6,6 @@
#define LOG_CATEGORY UCLASS_USB
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <malloc.h>
diff --git a/drivers/usb/emul/sandbox_hub.c b/drivers/usb/emul/sandbox_hub.c
index 084cc16..3b3e59f 100644
--- a/drivers/usb/emul/sandbox_hub.c
+++ b/drivers/usb/emul/sandbox_hub.c
@@ -4,7 +4,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <usb.h>
diff --git a/drivers/usb/emul/sandbox_keyb.c b/drivers/usb/emul/sandbox_keyb.c
index 5ec1e98..db76988 100644
--- a/drivers/usb/emul/sandbox_keyb.c
+++ b/drivers/usb/emul/sandbox_keyb.c
@@ -4,7 +4,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <os.h>
diff --git a/drivers/usb/emul/usb-emul-uclass.c b/drivers/usb/emul/usb-emul-uclass.c
index b31dc95..cdc18d6 100644
--- a/drivers/usb/emul/usb-emul-uclass.c
+++ b/drivers/usb/emul/usb-emul-uclass.c
@@ -6,7 +6,6 @@
#define LOG_CATEGORY UCLASS_USB_EMUL
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <usb.h>
diff --git a/drivers/usb/eth/asix.c b/drivers/usb/eth/asix.c
index 26dd312..c5a01ec 100644
--- a/drivers/usb/eth/asix.c
+++ b/drivers/usb/eth/asix.c
@@ -5,7 +5,6 @@
* Patched for AX88772B by Antmicro Ltd <www.antmicro.com>
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <net.h>
diff --git a/drivers/usb/eth/asix88179.c b/drivers/usb/eth/asix88179.c
index 2e737e6..7bfd285 100644
--- a/drivers/usb/eth/asix88179.c
+++ b/drivers/usb/eth/asix88179.c
@@ -5,7 +5,6 @@
* from the Linux AX88179_178a driver
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <usb.h>
diff --git a/drivers/usb/eth/mcs7830.c b/drivers/usb/eth/mcs7830.c
index d94204f..199fb7a 100644
--- a/drivers/usb/eth/mcs7830.c
+++ b/drivers/usb/eth/mcs7830.c
@@ -9,7 +9,6 @@
* MOSCHIP MCS7830 based (7730/7830/7832) USB 2.0 Ethernet Devices
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <log.h>
diff --git a/drivers/usb/eth/r8152.c b/drivers/usb/eth/r8152.c
index 3c866f4..e3f20e0 100644
--- a/drivers/usb/eth/r8152.c
+++ b/drivers/usb/eth/r8152.c
@@ -4,7 +4,6 @@
*
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <log.h>
diff --git a/drivers/usb/eth/r8152_fw.c b/drivers/usb/eth/r8152_fw.c
index a41abed..3159f30 100644
--- a/drivers/usb/eth/r8152_fw.c
+++ b/drivers/usb/eth/r8152_fw.c
@@ -3,7 +3,6 @@
* Copyright (c) 2015 Realtek Semiconductor Corp. All rights reserved.
*
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <linux/bitops.h>
diff --git a/drivers/usb/eth/smsc95xx.c b/drivers/usb/eth/smsc95xx.c
index de6586e..b4fcb2c 100644
--- a/drivers/usb/eth/smsc95xx.c
+++ b/drivers/usb/eth/smsc95xx.c
@@ -6,7 +6,6 @@
* Copyright (C) 2007-2008 SMSC (Steve Glendinning)
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <log.h>
diff --git a/drivers/usb/eth/usb_ether.c b/drivers/usb/eth/usb_ether.c
index 2e9af54..8bba3e0 100644
--- a/drivers/usb/eth/usb_ether.c
+++ b/drivers/usb/eth/usb_ether.c
@@ -3,7 +3,6 @@
* Copyright (c) 2011 The Chromium OS Authors.
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <log.h>
diff --git a/drivers/usb/gadget/at91_udc.c b/drivers/usb/gadget/at91_udc.c
index e573a03..86b2cbf 100644
--- a/drivers/usb/gadget/at91_udc.c
+++ b/drivers/usb/gadget/at91_udc.c
@@ -13,7 +13,6 @@
#undef VERBOSE_DEBUG
#undef PACKET_TRACE
-#include <common.h>
#include <dm/devres.h>
#include <linux/bug.h>
#include <linux/err.h>
diff --git a/drivers/usb/gadget/atmel_usba_udc.c b/drivers/usb/gadget/atmel_usba_udc.c
index 4c42074..f99553d 100644
--- a/drivers/usb/gadget/atmel_usba_udc.c
+++ b/drivers/usb/gadget/atmel_usba_udc.c
@@ -7,7 +7,6 @@
* Bo Shen <voice.shen@atmel.com>
*/
-#include <common.h>
#include <linux/bitops.h>
#include <linux/errno.h>
#include <asm/gpio.h>
diff --git a/drivers/usb/gadget/bcm_udc_otg_phy.c b/drivers/usb/gadget/bcm_udc_otg_phy.c
index c89cd57..98751910 100644
--- a/drivers/usb/gadget/bcm_udc_otg_phy.c
+++ b/drivers/usb/gadget/bcm_udc_otg_phy.c
@@ -4,7 +4,6 @@
*/
#include <config.h>
-#include <common.h>
#include <asm/io.h>
#include <asm/arch/sysmap.h>
#include <asm/kona-common/clk.h>
diff --git a/drivers/usb/gadget/ci_udc.c b/drivers/usb/gadget/ci_udc.c
index 750d471..bbe03cf 100644
--- a/drivers/usb/gadget/ci_udc.c
+++ b/drivers/usb/gadget/ci_udc.c
@@ -7,7 +7,6 @@
* Murray.Jensen@cmst.csiro.au, 27-Jan-01.
*/
-#include <common.h>
#include <command.h>
#include <config.h>
#include <cpu_func.h>
diff --git a/drivers/usb/gadget/config.c b/drivers/usb/gadget/config.c
index e967826..1363ef9 100644
--- a/drivers/usb/gadget/config.c
+++ b/drivers/usb/gadget/config.c
@@ -8,7 +8,6 @@
* Remy Bohmer <linux@bohmer.net>
*/
-#include <common.h>
#include <asm/unaligned.h>
#include <linux/errno.h>
#include <linux/list.h>
diff --git a/drivers/usb/gadget/dwc2_udc_otg.c b/drivers/usb/gadget/dwc2_udc_otg.c
index 27082f5..6bd395a 100644
--- a/drivers/usb/gadget/dwc2_udc_otg.c
+++ b/drivers/usb/gadget/dwc2_udc_otg.c
@@ -17,7 +17,6 @@
* Lukasz Majewski <l.majewski@samsumg.com>
*/
#undef DEBUG
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <generic-phy.h>
diff --git a/drivers/usb/gadget/dwc2_udc_otg_phy.c b/drivers/usb/gadget/dwc2_udc_otg_phy.c
index 7f8e956..c7eea7b 100644
--- a/drivers/usb/gadget/dwc2_udc_otg_phy.c
+++ b/drivers/usb/gadget/dwc2_udc_otg_phy.c
@@ -17,7 +17,6 @@
* Lukasz Majewski <l.majewski@samsumg.com>
*/
-#include <common.h>
#include <linux/delay.h>
#include <linux/errno.h>
#include <linux/list.h>
diff --git a/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c b/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c
index 1c34b75..16b2a03 100644
--- a/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c
+++ b/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c
@@ -17,7 +17,6 @@
* Lukasz Majewski <l.majewski@samsumg.com>
*/
-#include <common.h>
#include <cpu_func.h>
#include <log.h>
#include <linux/bug.h>
diff --git a/drivers/usb/gadget/ep0.c b/drivers/usb/gadget/ep0.c
index c256cc3..9d08640 100644
--- a/drivers/usb/gadget/ep0.c
+++ b/drivers/usb/gadget/ep0.c
@@ -36,7 +36,6 @@
* XXX
*/
-#include <common.h>
#include <serial.h>
#include <usbdevice.h>
diff --git a/drivers/usb/gadget/epautoconf.c b/drivers/usb/gadget/epautoconf.c
index bb0d297..0a70035 100644
--- a/drivers/usb/gadget/epautoconf.c
+++ b/drivers/usb/gadget/epautoconf.c
@@ -8,7 +8,6 @@
* Remy Bohmer <linux@bohmer.net>
*/
-#include <common.h>
#include <linux/usb/ch9.h>
#include <linux/errno.h>
#include <linux/usb/gadget.h>
diff --git a/drivers/usb/gadget/ether.c b/drivers/usb/gadget/ether.c
index 36618f0..b8b29d3 100644
--- a/drivers/usb/gadget/ether.c
+++ b/drivers/usb/gadget/ether.c
@@ -7,7 +7,6 @@
* Copyright (C) 2008 Nokia Corporation
*/
-#include <common.h>
#include <console.h>
#include <env.h>
#include <log.h>
diff --git a/drivers/usb/gadget/f_acm.c b/drivers/usb/gadget/f_acm.c
index ba21612..f18c6a0 100644
--- a/drivers/usb/gadget/f_acm.c
+++ b/drivers/usb/gadget/f_acm.c
@@ -10,7 +10,6 @@
*/
#include <circbuf.h>
-#include <common.h>
#include <console.h>
#include <errno.h>
#include <g_dnl.h>
diff --git a/drivers/usb/gadget/f_dfu.c b/drivers/usb/gadget/f_dfu.c
index 44877df..ca8b36e 100644
--- a/drivers/usb/gadget/f_dfu.c
+++ b/drivers/usb/gadget/f_dfu.c
@@ -16,7 +16,6 @@
#include <env.h>
#include <errno.h>
-#include <common.h>
#include <log.h>
#include <malloc.h>
diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c
index 09e740c..8df0e3f 100644
--- a/drivers/usb/gadget/f_fastboot.c
+++ b/drivers/usb/gadget/f_fastboot.c
@@ -11,7 +11,6 @@
*/
#include <command.h>
#include <config.h>
-#include <common.h>
#include <env.h>
#include <errno.h>
#include <fastboot.h>
diff --git a/drivers/usb/gadget/f_mass_storage.c b/drivers/usb/gadget/f_mass_storage.c
index ef90c7e..89a96db 100644
--- a/drivers/usb/gadget/f_mass_storage.c
+++ b/drivers/usb/gadget/f_mass_storage.c
@@ -244,7 +244,6 @@
#include <hexdump.h>
#include <log.h>
#include <malloc.h>
-#include <common.h>
#include <console.h>
#include <g_dnl.h>
#include <dm/devres.h>
diff --git a/drivers/usb/gadget/f_rockusb.c b/drivers/usb/gadget/f_rockusb.c
index 98a7ffa..d679cda 100644
--- a/drivers/usb/gadget/f_rockusb.c
+++ b/drivers/usb/gadget/f_rockusb.c
@@ -6,7 +6,6 @@
*/
#include <command.h>
#include <config.h>
-#include <common.h>
#include <env.h>
#include <errno.h>
#include <log.h>
diff --git a/drivers/usb/gadget/f_sdp.c b/drivers/usb/gadget/f_sdp.c
index ca2760c..8949691 100644
--- a/drivers/usb/gadget/f_sdp.c
+++ b/drivers/usb/gadget/f_sdp.c
@@ -17,7 +17,6 @@
*/
#include <errno.h>
-#include <common.h>
#include <console.h>
#include <env.h>
#include <log.h>
diff --git a/drivers/usb/gadget/f_thor.c b/drivers/usb/gadget/f_thor.c
index 0e7529d..5437211 100644
--- a/drivers/usb/gadget/f_thor.c
+++ b/drivers/usb/gadget/f_thor.c
@@ -15,7 +15,6 @@
*/
#include <command.h>
-#include <common.h>
#include <console.h>
#include <dm.h>
#include <errno.h>
diff --git a/drivers/usb/gadget/g_dnl.c b/drivers/usb/gadget/g_dnl.c
index afb7b74..b5b5f5d 100644
--- a/drivers/usb/gadget/g_dnl.c
+++ b/drivers/usb/gadget/g_dnl.c
@@ -6,7 +6,6 @@
* Lukasz Majewski <l.majewski@samsung.com>
*/
-#include <common.h>
#include <log.h>
#include <malloc.h>
diff --git a/drivers/usb/gadget/max3420_udc.c b/drivers/usb/gadget/max3420_udc.c
index fa655c9..5a227c0 100644
--- a/drivers/usb/gadget/max3420_udc.c
+++ b/drivers/usb/gadget/max3420_udc.c
@@ -1,6 +1,5 @@
// SPDX-License-Identifier: GPL-2.0+
-#include <common.h>
#include <linux/errno.h>
#include <linux/delay.h>
#include <asm/gpio.h>
diff --git a/drivers/usb/gadget/rndis.c b/drivers/usb/gadget/rndis.c
index e7276cc..5e6e5a0 100644
--- a/drivers/usb/gadget/rndis.c
+++ b/drivers/usb/gadget/rndis.c
@@ -18,7 +18,6 @@
* updates to merge with Linux 2.6, better match RNDIS spec
*/
-#include <common.h>
#include <log.h>
#include <net.h>
#include <malloc.h>
diff --git a/drivers/usb/gadget/udc/udc-core.c b/drivers/usb/gadget/udc/udc-core.c
index ba658d9..6bb419a 100644
--- a/drivers/usb/gadget/udc/udc-core.c
+++ b/drivers/usb/gadget/udc/udc-core.c
@@ -19,7 +19,6 @@
#include <malloc.h>
#include <asm/cache.h>
#include <linux/dma-mapping.h>
-#include <common.h>
#include <dm.h>
#include <dm/device-internal.h>
#include <linux/usb/ch9.h>
diff --git a/drivers/usb/gadget/udc/udc-uclass.c b/drivers/usb/gadget/udc/udc-uclass.c
index 30ee1ca..5dc23a5 100644
--- a/drivers/usb/gadget/udc/udc-uclass.c
+++ b/drivers/usb/gadget/udc/udc-uclass.c
@@ -6,7 +6,6 @@
#define LOG_CATEGORY UCLASS_USB_GADGET_GENERIC
-#include <common.h>
#include <dm.h>
#include <dm/device-internal.h>
#include <linux/printk.h>
diff --git a/drivers/usb/gadget/usbstring.c b/drivers/usb/gadget/usbstring.c
index e2464ad..4617a95 100644
--- a/drivers/usb/gadget/usbstring.c
+++ b/drivers/usb/gadget/usbstring.c
@@ -6,7 +6,6 @@
* Remy Bohmer <linux@bohmer.net>
*/
-#include <common.h>
#include <linux/errno.h>
#include <linux/usb/ch9.h>
#include <linux/usb/gadget.h>
diff --git a/drivers/usb/host/dwc2.c b/drivers/usb/host/dwc2.c
index 637eb2d..a9dbb85 100644
--- a/drivers/usb/host/dwc2.c
+++ b/drivers/usb/host/dwc2.c
@@ -4,7 +4,6 @@
* Copyright (C) 2014 Marek Vasut <marex@denx.de>
*/
-#include <common.h>
#include <clk.h>
#include <cpu_func.h>
#include <dm.h>
diff --git a/drivers/usb/host/dwc3-of-simple.c b/drivers/usb/host/dwc3-of-simple.c
index f9df59d..d52e7d2 100644
--- a/drivers/usb/host/dwc3-of-simple.c
+++ b/drivers/usb/host/dwc3-of-simple.c
@@ -10,7 +10,6 @@
* Author: Neil Armstrong <narmstron@baylibre.com>
*/
-#include <common.h>
#include <dm.h>
#include <reset.h>
#include <clk.h>
diff --git a/drivers/usb/host/dwc3-sti-glue.c b/drivers/usb/host/dwc3-sti-glue.c
index 4a3ab61..3e6834e 100644
--- a/drivers/usb/host/dwc3-sti-glue.c
+++ b/drivers/usb/host/dwc3-sti-glue.c
@@ -6,7 +6,6 @@
* Author(s): Patrice Chotard, <patrice.chotard@foss.st.com> for STMicroelectronics.
*/
-#include <common.h>
#include <log.h>
#include <asm/global_data.h>
#include <asm/io.h>
diff --git a/drivers/usb/host/ehci-atmel.c b/drivers/usb/host/ehci-atmel.c
index c6d50fd..ee75122 100644
--- a/drivers/usb/host/ehci-atmel.c
+++ b/drivers/usb/host/ehci-atmel.c
@@ -5,7 +5,6 @@
* Written-by: Bo Shen <voice.shen@atmel.com>
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <log.h>
diff --git a/drivers/usb/host/ehci-exynos.c b/drivers/usb/host/ehci-exynos.c
index c1cdd4b..1e4a5a0 100644
--- a/drivers/usb/host/ehci-exynos.c
+++ b/drivers/usb/host/ehci-exynos.c
@@ -6,7 +6,6 @@
* Vivek Gautam <gautam.vivek@samsung.com>
*/
-#include <common.h>
#include <dm.h>
#include <fdtdec.h>
#include <log.h>
diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
index 0569dd5..ee3eb06 100644
--- a/drivers/usb/host/ehci-fsl.c
+++ b/drivers/usb/host/ehci-fsl.c
@@ -7,7 +7,6 @@
* Author: Tor Krill tor@excito.com
*/
-#include <common.h>
#include <env.h>
#include <log.h>
#include <pci.h>
diff --git a/drivers/usb/host/ehci-generic.c b/drivers/usb/host/ehci-generic.c
index 936e304..23c3ed2 100644
--- a/drivers/usb/host/ehci-generic.c
+++ b/drivers/usb/host/ehci-generic.c
@@ -3,7 +3,6 @@
* Copyright (C) 2015 Alexey Brodkin <abrodkin@synopsys.com>
*/
-#include <common.h>
#include <clk.h>
#include <log.h>
#include <dm/device_compat.h>
diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c
index 9839aa1..7d5519c 100644
--- a/drivers/usb/host/ehci-hcd.c
+++ b/drivers/usb/host/ehci-hcd.c
@@ -6,7 +6,6 @@
*
* All rights reserved.
*/
-#include <common.h>
#include <cpu_func.h>
#include <dm.h>
#include <errno.h>
diff --git a/drivers/usb/host/ehci-marvell.c b/drivers/usb/host/ehci-marvell.c
index 6093c8f..ca0ab57 100644
--- a/drivers/usb/host/ehci-marvell.c
+++ b/drivers/usb/host/ehci-marvell.c
@@ -5,7 +5,6 @@
* Written-by: Prafulla Wadaskar <prafulla@marvell.com>
*/
-#include <common.h>
#include <log.h>
#include <asm/global_data.h>
#include <asm/io.h>
diff --git a/drivers/usb/host/ehci-msm.c b/drivers/usb/host/ehci-msm.c
index 98fe7bc..a081f71 100644
--- a/drivers/usb/host/ehci-msm.c
+++ b/drivers/usb/host/ehci-msm.c
@@ -7,7 +7,6 @@
* Based on Linux driver
*/
-#include <common.h>
#include <dm.h>
#include <dm/lists.h>
#include <errno.h>
diff --git a/drivers/usb/host/ehci-mx5.c b/drivers/usb/host/ehci-mx5.c
index c112798..fb91265 100644
--- a/drivers/usb/host/ehci-mx5.c
+++ b/drivers/usb/host/ehci-mx5.c
@@ -4,7 +4,6 @@
* Copyright (C) 2010 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <log.h>
#include <usb.h>
#include <errno.h>
diff --git a/drivers/usb/host/ehci-mx6.c b/drivers/usb/host/ehci-mx6.c
index a35fcca..31cd8a5 100644
--- a/drivers/usb/host/ehci-mx6.c
+++ b/drivers/usb/host/ehci-mx6.c
@@ -4,7 +4,6 @@
* Copyright (C) 2010 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <clk.h>
#include <log.h>
#include <usb.h>
diff --git a/drivers/usb/host/ehci-mxs.c b/drivers/usb/host/ehci-mxs.c
index ddf7cc2..95af5c9 100644
--- a/drivers/usb/host/ehci-mxs.c
+++ b/drivers/usb/host/ehci-mxs.c
@@ -6,7 +6,6 @@
* on behalf of DENX Software Engineering GmbH
*/
-#include <common.h>
#include <asm/io.h>
#include <asm/arch/imx-regs.h>
#include <errno.h>
diff --git a/drivers/usb/host/ehci-npcm.c b/drivers/usb/host/ehci-npcm.c
index 357a561..d2a9965 100644
--- a/drivers/usb/host/ehci-npcm.c
+++ b/drivers/usb/host/ehci-npcm.c
@@ -3,7 +3,6 @@
* Copyright (c) 2021 Nuvoton Technology Corp.
*/
-#include <common.h>
#include <dm.h>
#include <generic-phy.h>
#include <reset.h>
diff --git a/drivers/usb/host/ehci-omap.c b/drivers/usb/host/ehci-omap.c
index 765336a..a95fcad 100644
--- a/drivers/usb/host/ehci-omap.c
+++ b/drivers/usb/host/ehci-omap.c
@@ -10,8 +10,8 @@
*
*/
-#include <common.h>
#include <log.h>
+#include <time.h>
#include <usb.h>
#include <linux/delay.h>
#include <usb/ulpi.h>
diff --git a/drivers/usb/host/ehci-pci.c b/drivers/usb/host/ehci-pci.c
index e98ab31..5726865 100644
--- a/drivers/usb/host/ehci-pci.c
+++ b/drivers/usb/host/ehci-pci.c
@@ -4,7 +4,6 @@
* All rights reserved.
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <init.h>
diff --git a/drivers/usb/host/ehci-tegra.c b/drivers/usb/host/ehci-tegra.c
index 2cf1625..343893b 100644
--- a/drivers/usb/host/ehci-tegra.c
+++ b/drivers/usb/host/ehci-tegra.c
@@ -5,7 +5,6 @@
* Copyright (c) 2013 Lucas Stach
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <linux/delay.h>
diff --git a/drivers/usb/host/ehci-vf.c b/drivers/usb/host/ehci-vf.c
index 648e136..5afe28e 100644
--- a/drivers/usb/host/ehci-vf.c
+++ b/drivers/usb/host/ehci-vf.c
@@ -6,7 +6,6 @@
* Based on ehci-mx6 driver
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <usb.h>
diff --git a/drivers/usb/host/ehci-zynq.c b/drivers/usb/host/ehci-zynq.c
index f7e458c..dfaff5c 100644
--- a/drivers/usb/host/ehci-zynq.c
+++ b/drivers/usb/host/ehci-zynq.c
@@ -5,7 +5,6 @@
* USB Low level initialization(Specific to zynq)
*/
-#include <common.h>
#include <dm.h>
#include <usb.h>
#include <asm/arch/hardware.h>
diff --git a/drivers/usb/host/ohci-at91.c b/drivers/usb/host/ohci-at91.c
index 9b955c1..b170f26 100644
--- a/drivers/usb/host/ohci-at91.c
+++ b/drivers/usb/host/ohci-at91.c
@@ -4,7 +4,6 @@
* DENX Software Engineering <mk@denx.de>
*/
-#include <common.h>
#include <asm/arch/clk.h>
int usb_cpu_init(void)
diff --git a/drivers/usb/host/ohci-da8xx.c b/drivers/usb/host/ohci-da8xx.c
index d3d73d2..d321d14 100644
--- a/drivers/usb/host/ohci-da8xx.c
+++ b/drivers/usb/host/ohci-da8xx.c
@@ -3,7 +3,6 @@
* Copyright (C) 2012 Sughosh Ganu <urwithsughosh@gmail.com>
*/
-#include <common.h>
#include <malloc.h>
#include <asm/io.h>
#include <clk.h>
diff --git a/drivers/usb/host/ohci-generic.c b/drivers/usb/host/ohci-generic.c
index ceed191..f1325cd 100644
--- a/drivers/usb/host/ohci-generic.c
+++ b/drivers/usb/host/ohci-generic.c
@@ -3,7 +3,6 @@
* Copyright (C) 2015 Alexey Brodkin <abrodkin@synopsys.com>
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <log.h>
diff --git a/drivers/usb/host/ohci-hcd.c b/drivers/usb/host/ohci-hcd.c
index 3f44181..c020d13 100644
--- a/drivers/usb/host/ohci-hcd.c
+++ b/drivers/usb/host/ohci-hcd.c
@@ -27,7 +27,7 @@
* to activate workaround for bug #41 or this driver will NOT work!
*/
-#include <common.h>
+#include <config.h>
#include <cpu_func.h>
#include <asm/byteorder.h>
#include <dm.h>
diff --git a/drivers/usb/host/ohci-lpc32xx.c b/drivers/usb/host/ohci-lpc32xx.c
index a04b296..ed04cae 100644
--- a/drivers/usb/host/ohci-lpc32xx.c
+++ b/drivers/usb/host/ohci-lpc32xx.c
@@ -7,7 +7,6 @@
* Copyright (c) 2015 Tyco Fire Protection Products.
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <init.h>
diff --git a/drivers/usb/host/ohci-npcm.c b/drivers/usb/host/ohci-npcm.c
index 9e1d529..ffeb6bc 100644
--- a/drivers/usb/host/ohci-npcm.c
+++ b/drivers/usb/host/ohci-npcm.c
@@ -3,7 +3,6 @@
* Copyright (c) 2021 Nuvoton Technology Corp.
*/
-#include <common.h>
#include <dm.h>
#include <generic-phy.h>
#include <reset.h>
diff --git a/drivers/usb/host/ohci-pci.c b/drivers/usb/host/ohci-pci.c
index f061aec..f10f109 100644
--- a/drivers/usb/host/ohci-pci.c
+++ b/drivers/usb/host/ohci-pci.c
@@ -5,7 +5,6 @@
*
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <pci.h>
diff --git a/drivers/usb/host/r8a66597-hcd.c b/drivers/usb/host/r8a66597-hcd.c
index 3ccbc16..f0b18bf 100644
--- a/drivers/usb/host/r8a66597-hcd.c
+++ b/drivers/usb/host/r8a66597-hcd.c
@@ -5,7 +5,6 @@
* Copyright (C) 2008 Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
*/
-#include <common.h>
#include <console.h>
#include <dm.h>
#include <log.h>
diff --git a/drivers/usb/host/usb-sandbox.c b/drivers/usb/host/usb-sandbox.c
index 3d4f8d6..e26f0b2 100644
--- a/drivers/usb/host/usb-sandbox.c
+++ b/drivers/usb/host/usb-sandbox.c
@@ -4,7 +4,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <usb.h>
diff --git a/drivers/usb/host/usb-uclass.c b/drivers/usb/host/usb-uclass.c
index a1cd0ad..cd3a07e 100644
--- a/drivers/usb/host/usb-uclass.c
+++ b/drivers/usb/host/usb-uclass.c
@@ -8,7 +8,6 @@
#define LOG_CATEGORY UCLASS_USB
-#include <common.h>
#include <bootdev.h>
#include <dm.h>
#include <errno.h>
diff --git a/drivers/usb/host/usb_bootdev.c b/drivers/usb/host/usb_bootdev.c
index 7fa1c60..362b46d 100644
--- a/drivers/usb/host/usb_bootdev.c
+++ b/drivers/usb/host/usb_bootdev.c
@@ -6,7 +6,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <bootdev.h>
#include <dm.h>
#include <usb.h>
diff --git a/drivers/usb/host/xhci-brcm.c b/drivers/usb/host/xhci-brcm.c
index fe17924..2ffad14 100644
--- a/drivers/usb/host/xhci-brcm.c
+++ b/drivers/usb/host/xhci-brcm.c
@@ -3,7 +3,6 @@
* Copyright (C) 2019 Broadcom.
*/
-#include <common.h>
#include <dm.h>
#include <fdtdec.h>
#include <usb.h>
diff --git a/drivers/usb/host/xhci-dwc3.c b/drivers/usb/host/xhci-dwc3.c
index 6cebe1c..e3e0cef 100644
--- a/drivers/usb/host/xhci-dwc3.c
+++ b/drivers/usb/host/xhci-dwc3.c
@@ -8,7 +8,6 @@
*/
#include <clk.h>
-#include <common.h>
#include <dm.h>
#include <generic-phy.h>
#include <log.h>
diff --git a/drivers/usb/host/xhci-exynos5.c b/drivers/usb/host/xhci-exynos5.c
index 270be93..6a2d422 100644
--- a/drivers/usb/host/xhci-exynos5.c
+++ b/drivers/usb/host/xhci-exynos5.c
@@ -12,7 +12,6 @@
* exynos5 specific PHY-init sequence.
*/
-#include <common.h>
#include <dm.h>
#include <fdtdec.h>
#include <log.h>
diff --git a/drivers/usb/host/xhci-fsl.c b/drivers/usb/host/xhci-fsl.c
index e67e09e..3484ae1 100644
--- a/drivers/usb/host/xhci-fsl.c
+++ b/drivers/usb/host/xhci-fsl.c
@@ -7,7 +7,6 @@
* Author: Ramneek Mehresh<ramneek.mehresh@freescale.com>
*/
-#include <common.h>
#include <log.h>
#include <usb.h>
#include <linux/errno.h>
diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c
index 72b7530..045b0fb 100644
--- a/drivers/usb/host/xhci-mem.c
+++ b/drivers/usb/host/xhci-mem.c
@@ -13,7 +13,6 @@
* Vikas Sajjan <vikas.sajjan@samsung.com>
*/
-#include <common.h>
#include <cpu_func.h>
#include <dm.h>
#include <log.h>
diff --git a/drivers/usb/host/xhci-mtk.c b/drivers/usb/host/xhci-mtk.c
index 63dfb79..7e288f0 100644
--- a/drivers/usb/host/xhci-mtk.c
+++ b/drivers/usb/host/xhci-mtk.c
@@ -5,7 +5,6 @@
*/
#include <clk.h>
-#include <common.h>
#include <dm.h>
#include <dm/device_compat.h>
#include <dm/devres.h>
diff --git a/drivers/usb/host/xhci-mvebu.c b/drivers/usb/host/xhci-mvebu.c
index 46b89de..1338b10 100644
--- a/drivers/usb/host/xhci-mvebu.c
+++ b/drivers/usb/host/xhci-mvebu.c
@@ -5,7 +5,6 @@
* MVEBU USB HOST xHCI Controller
*/
-#include <common.h>
#include <dm.h>
#include <fdtdec.h>
#include <log.h>
diff --git a/drivers/usb/host/xhci-omap.c b/drivers/usb/host/xhci-omap.c
index 501129d..66da94c 100644
--- a/drivers/usb/host/xhci-omap.c
+++ b/drivers/usb/host/xhci-omap.c
@@ -8,7 +8,6 @@
* Author: Dan Murphy <dmurphy@ti.com>
*/
-#include <common.h>
#include <log.h>
#include <usb.h>
#include <linux/errno.h>
diff --git a/drivers/usb/host/xhci-pci.c b/drivers/usb/host/xhci-pci.c
index 11f1c02..f6972af 100644
--- a/drivers/usb/host/xhci-pci.c
+++ b/drivers/usb/host/xhci-pci.c
@@ -5,7 +5,6 @@
* All rights reserved.
*/
-#include <common.h>
#include <dm.h>
#include <dm/device_compat.h>
#include <init.h>
diff --git a/drivers/usb/host/xhci-rcar.c b/drivers/usb/host/xhci-rcar.c
index fedcf78..38c5928 100644
--- a/drivers/usb/host/xhci-rcar.c
+++ b/drivers/usb/host/xhci-rcar.c
@@ -5,7 +5,6 @@
* Renesas RCar USB HOST xHCI Controller
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <fdtdec.h>
diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c
index b60661f..1360a59 100644
--- a/drivers/usb/host/xhci-ring.c
+++ b/drivers/usb/host/xhci-ring.c
@@ -13,7 +13,6 @@
* Vikas Sajjan <vikas.sajjan@samsung.com>
*/
-#include <common.h>
#include <cpu_func.h>
#include <log.h>
#include <asm/byteorder.h>
@@ -685,6 +684,9 @@
reset_ep(udev, ep_index);
ring = virt_dev->eps[ep_index].ring;
+ if (!ring)
+ return -EINVAL;
+
/*
* How much data is (potentially) left before the 64KB boundary?
* XHCI Spec puts restriction( TABLE 49 and 6.4.1 section of XHCI Spec)
@@ -871,6 +873,8 @@
ep_index = usb_pipe_ep_index(pipe);
ep_ring = virt_dev->eps[ep_index].ring;
+ if (!ep_ring)
+ return -EINVAL;
/*
* Check to see if the max packet size for the default control
diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
index d13cbff..d30725d3 100644
--- a/drivers/usb/host/xhci.c
+++ b/drivers/usb/host/xhci.c
@@ -19,7 +19,6 @@
* The quirk devices support hasn't been given yet.
*/
-#include <common.h>
#include <cpu_func.h>
#include <dm.h>
#include <dm/device_compat.h>
@@ -475,67 +474,34 @@
}
/**
- * Configure the endpoint, programming the device contexts.
+ * Fill endpoint contexts for interface descriptor ifdesc.
*
- * @param udev pointer to the USB device structure
- * Return: returns the status of the xhci_configure_endpoints
+ * @param udev pointer to the USB device structure
+ * @param ctrl pointer to the xhci pravte device structure
+ * @param virt_dev pointer to the xhci virtual device structure
+ * @param ifdesc pointer to the USB interface config descriptor
+ * Return: returns the status of xhci_init_ep_contexts_if
*/
-static int xhci_set_configuration(struct usb_device *udev)
+static int xhci_init_ep_contexts_if(struct usb_device *udev,
+ struct xhci_ctrl *ctrl,
+ struct xhci_virt_device *virt_dev,
+ struct usb_interface *ifdesc
+ )
{
- struct xhci_container_ctx *in_ctx;
- struct xhci_container_ctx *out_ctx;
- struct xhci_input_control_ctx *ctrl_ctx;
- struct xhci_slot_ctx *slot_ctx;
struct xhci_ep_ctx *ep_ctx[MAX_EP_CTX_NUM];
int cur_ep;
- int max_ep_flag = 0;
int ep_index;
unsigned int dir;
unsigned int ep_type;
- struct xhci_ctrl *ctrl = xhci_get_ctrl(udev);
- int num_of_ep;
- int ep_flag = 0;
u64 trb_64 = 0;
- int slot_id = udev->slot_id;
- struct xhci_virt_device *virt_dev = ctrl->devs[slot_id];
- struct usb_interface *ifdesc;
u32 max_esit_payload;
unsigned int interval;
unsigned int mult;
unsigned int max_burst;
unsigned int avg_trb_len;
unsigned int err_count = 0;
+ int num_of_ep = ifdesc->no_of_ep;
- out_ctx = virt_dev->out_ctx;
- in_ctx = virt_dev->in_ctx;
-
- num_of_ep = udev->config.if_desc[0].no_of_ep;
- ifdesc = &udev->config.if_desc[0];
-
- ctrl_ctx = xhci_get_input_control_ctx(in_ctx);
- /* Initialize the input context control */
- ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG);
- ctrl_ctx->drop_flags = 0;
-
- /* EP_FLAG gives values 1 & 4 for EP1OUT and EP2IN */
- for (cur_ep = 0; cur_ep < num_of_ep; cur_ep++) {
- ep_flag = xhci_get_ep_index(&ifdesc->ep_desc[cur_ep]);
- ctrl_ctx->add_flags |= cpu_to_le32(1 << (ep_flag + 1));
- if (max_ep_flag < ep_flag)
- max_ep_flag = ep_flag;
- }
-
- xhci_inval_cache((uintptr_t)out_ctx->bytes, out_ctx->size);
-
- /* slot context */
- xhci_slot_copy(ctrl, in_ctx, out_ctx);
- slot_ctx = xhci_get_slot_ctx(ctrl, in_ctx);
- slot_ctx->dev_info &= ~(cpu_to_le32(LAST_CTX_MASK));
- slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(max_ep_flag + 1) | 0);
-
- xhci_endpoint_copy(ctrl, in_ctx, out_ctx, 0);
-
- /* filling up ep contexts */
for (cur_ep = 0; cur_ep < num_of_ep; cur_ep++) {
struct usb_endpoint_descriptor *endpt_desc = NULL;
struct usb_ss_ep_comp_descriptor *ss_ep_comp_desc = NULL;
@@ -561,7 +527,8 @@
avg_trb_len = max_esit_payload;
ep_index = xhci_get_ep_index(endpt_desc);
- ep_ctx[ep_index] = xhci_get_ep_ctx(ctrl, in_ctx, ep_index);
+ ep_ctx[ep_index] = xhci_get_ep_ctx(ctrl, virt_dev->in_ctx,
+ ep_index);
/* Allocate the ep rings */
virt_dev->eps[ep_index].ring = xhci_ring_alloc(ctrl, 1, true);
@@ -614,6 +581,72 @@
}
}
+ return 0;
+}
+
+/**
+ * Configure the endpoint, programming the device contexts.
+ *
+ * @param udev pointer to the USB device structure
+ * Return: returns the status of the xhci_configure_endpoints
+ */
+static int xhci_set_configuration(struct usb_device *udev)
+{
+ struct xhci_container_ctx *out_ctx;
+ struct xhci_container_ctx *in_ctx;
+ struct xhci_input_control_ctx *ctrl_ctx;
+ struct xhci_slot_ctx *slot_ctx;
+ int err;
+ int cur_ep;
+ int max_ep_flag = 0;
+ struct xhci_ctrl *ctrl = xhci_get_ctrl(udev);
+ int num_of_ep;
+ int ep_flag = 0;
+ int slot_id = udev->slot_id;
+ struct xhci_virt_device *virt_dev = ctrl->devs[slot_id];
+ struct usb_interface *ifdesc;
+ unsigned int ifnum;
+ unsigned int max_ifnum = min((unsigned int)USB_MAX_ACTIVE_INTERFACES,
+ (unsigned int)udev->config.no_of_if);
+
+ out_ctx = virt_dev->out_ctx;
+ in_ctx = virt_dev->in_ctx;
+
+ ctrl_ctx = xhci_get_input_control_ctx(in_ctx);
+ /* Initialize the input context control */
+ ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG);
+ ctrl_ctx->drop_flags = 0;
+
+ for (ifnum = 0; ifnum < max_ifnum; ifnum++) {
+ ifdesc = &udev->config.if_desc[ifnum];
+ num_of_ep = ifdesc->no_of_ep;
+ /* EP_FLAG gives values 1 & 4 for EP1OUT and EP2IN */
+ for (cur_ep = 0; cur_ep < num_of_ep; cur_ep++) {
+ ep_flag = xhci_get_ep_index(&ifdesc->ep_desc[cur_ep]);
+ ctrl_ctx->add_flags |= cpu_to_le32(1 << (ep_flag + 1));
+ if (max_ep_flag < ep_flag)
+ max_ep_flag = ep_flag;
+ }
+ }
+
+ xhci_inval_cache((uintptr_t)out_ctx->bytes, out_ctx->size);
+
+ /* slot context */
+ xhci_slot_copy(ctrl, in_ctx, out_ctx);
+ slot_ctx = xhci_get_slot_ctx(ctrl, in_ctx);
+ slot_ctx->dev_info &= ~(cpu_to_le32(LAST_CTX_MASK));
+ slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(max_ep_flag + 1) | 0);
+
+ xhci_endpoint_copy(ctrl, in_ctx, out_ctx, 0);
+
+ /* filling up ep contexts */
+ for (ifnum = 0; ifnum < max_ifnum; ifnum++) {
+ ifdesc = &udev->config.if_desc[ifnum];
+ err = xhci_init_ep_contexts_if(udev, ctrl, virt_dev, ifdesc);
+ if (err < 0)
+ return err;
+ }
+
return xhci_configure_endpoints(udev, false);
}
diff --git a/drivers/usb/isp1760/isp1760-hcd.c b/drivers/usb/isp1760/isp1760-hcd.c
index a6c4d97..96c483f 100644
--- a/drivers/usb/isp1760/isp1760-hcd.c
+++ b/drivers/usb/isp1760/isp1760-hcd.c
@@ -7,7 +7,6 @@
*/
#include <hexdump.h>
-#include <common.h>
#include <asm/cache.h>
#include <cpu_func.h>
#include <dm.h>
diff --git a/drivers/usb/isp1760/isp1760-if.c b/drivers/usb/isp1760/isp1760-if.c
index c96ab45..54246b4 100644
--- a/drivers/usb/isp1760/isp1760-if.c
+++ b/drivers/usb/isp1760/isp1760-if.c
@@ -6,7 +6,6 @@
* (c) 2007 Sebastian Siewior <bigeasy@linutronix.de>
*/
-#include <common.h>
#include <dm.h>
#include <dm/device-internal.h>
#include <dm/device_compat.h>
diff --git a/drivers/usb/isp1760/isp1760-uboot.c b/drivers/usb/isp1760/isp1760-uboot.c
index 203500a..8dcb776 100644
--- a/drivers/usb/isp1760/isp1760-uboot.c
+++ b/drivers/usb/isp1760/isp1760-uboot.c
@@ -6,7 +6,6 @@
*
*/
-#include <common.h>
#include <dm.h>
#include <dm/device-internal.h>
#include <dm/device_compat.h>
diff --git a/drivers/usb/mtu3/mtu3_plat.c b/drivers/usb/mtu3/mtu3_plat.c
index b1b22b9..ca86b58 100644
--- a/drivers/usb/mtu3/mtu3_plat.c
+++ b/drivers/usb/mtu3/mtu3_plat.c
@@ -5,7 +5,6 @@
* Author: Chunfeng Yun <chunfeng.yun@mediatek.com>
*/
-#include <common.h>
#include <dm/lists.h>
#include <linux/iopoll.h>
diff --git a/drivers/usb/musb-new/am35x.c b/drivers/usb/musb-new/am35x.c
index 0a52e09..42bc816 100644
--- a/drivers/usb/musb-new/am35x.c
+++ b/drivers/usb/musb-new/am35x.c
@@ -24,7 +24,6 @@
#include <plat/usb.h>
#else
-#include <common.h>
#include <asm/omap_musb.h>
#include <linux/bug.h>
#include <linux/delay.h>
diff --git a/drivers/usb/musb-new/da8xx.c b/drivers/usb/musb-new/da8xx.c
index 68fc0c3..7caf03c 100644
--- a/drivers/usb/musb-new/da8xx.c
+++ b/drivers/usb/musb-new/da8xx.c
@@ -13,7 +13,6 @@
*
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <dm/device-internal.h>
diff --git a/drivers/usb/musb-new/mt85xx.c b/drivers/usb/musb-new/mt85xx.c
index 1e632dc..14b28bb 100644
--- a/drivers/usb/musb-new/mt85xx.c
+++ b/drivers/usb/musb-new/mt85xx.c
@@ -9,7 +9,6 @@
*
* This file is part of the Inventra Controller Driver for Linux.
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <dm/device_compat.h>
diff --git a/drivers/usb/musb-new/musb_core.c b/drivers/usb/musb-new/musb_core.c
index 00da554..257e768 100644
--- a/drivers/usb/musb-new/musb_core.c
+++ b/drivers/usb/musb-new/musb_core.c
@@ -79,7 +79,6 @@
#include <linux/platform_device.h>
#include <linux/io.h>
#else
-#include <common.h>
#include <dm.h>
#include <dm/device_compat.h>
#include <usb.h>
diff --git a/drivers/usb/musb-new/musb_dsps.c b/drivers/usb/musb-new/musb_dsps.c
index a8ff743..b73f353 100644
--- a/drivers/usb/musb-new/musb_dsps.c
+++ b/drivers/usb/musb-new/musb_dsps.c
@@ -31,7 +31,6 @@
#include <plat/usb.h>
#else
-#include <common.h>
#include <dm.h>
#include <dm/device_compat.h>
#include <asm/omap_musb.h>
diff --git a/drivers/usb/musb-new/musb_gadget.c b/drivers/usb/musb-new/musb_gadget.c
index c608396..29e225a 100644
--- a/drivers/usb/musb-new/musb_gadget.c
+++ b/drivers/usb/musb-new/musb_gadget.c
@@ -22,7 +22,6 @@
#include <linux/dma-mapping.h>
#include <linux/slab.h>
#else
-#include <common.h>
#include <dm.h>
#include <dm/device_compat.h>
#include <linux/bug.h>
diff --git a/drivers/usb/musb-new/musb_gadget_ep0.c b/drivers/usb/musb-new/musb_gadget_ep0.c
index 55ce8de..63eee31 100644
--- a/drivers/usb/musb-new/musb_gadget_ep0.c
+++ b/drivers/usb/musb-new/musb_gadget_ep0.c
@@ -18,7 +18,6 @@
#include <linux/device.h>
#include <linux/interrupt.h>
#else
-#include <common.h>
#include <dm.h>
#include <dm/device_compat.h>
#include <linux/printk.h>
diff --git a/drivers/usb/musb-new/musb_host.c b/drivers/usb/musb-new/musb_host.c
index e5905d9..2f2fc7c 100644
--- a/drivers/usb/musb-new/musb_host.c
+++ b/drivers/usb/musb-new/musb_host.c
@@ -21,7 +21,6 @@
#include <linux/list.h>
#include <linux/dma-mapping.h>
#else
-#include <common.h>
#include <dm.h>
#include <dm/device_compat.h>
#include <usb.h>
diff --git a/drivers/usb/musb-new/musb_uboot.c b/drivers/usb/musb-new/musb_uboot.c
index 7cea9a2..43ab324 100644
--- a/drivers/usb/musb-new/musb_uboot.c
+++ b/drivers/usb/musb-new/musb_uboot.c
@@ -1,4 +1,3 @@
-#include <common.h>
#include <console.h>
#include <dm.h>
#include <malloc.h>
diff --git a/drivers/usb/musb-new/omap2430.c b/drivers/usb/musb-new/omap2430.c
index 308eff8..c8dd730 100644
--- a/drivers/usb/musb-new/omap2430.c
+++ b/drivers/usb/musb-new/omap2430.c
@@ -8,7 +8,6 @@
*
* This file is part of the Inventra Controller Driver for Linux.
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <serial.h>
diff --git a/drivers/usb/musb-new/pic32.c b/drivers/usb/musb-new/pic32.c
index 4ed5e6e..0b25e58 100644
--- a/drivers/usb/musb-new/pic32.c
+++ b/drivers/usb/musb-new/pic32.c
@@ -9,7 +9,6 @@
* Based on the dsps "glue layer" code.
*/
-#include <common.h>
#include <dm.h>
#include <asm/global_data.h>
#include <dm/device_compat.h>
diff --git a/drivers/usb/musb-new/sunxi.c b/drivers/usb/musb-new/sunxi.c
index 91f082f..b577ba4 100644
--- a/drivers/usb/musb-new/sunxi.c
+++ b/drivers/usb/musb-new/sunxi.c
@@ -15,7 +15,6 @@
*
* This file is part of the Inventra Controller Driver for Linux.
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <generic-phy.h>
@@ -506,6 +505,16 @@
return 0;
}
+/*
+ * The Linux driver has a config struct, its fields mapping to this driver
+ * like this:
+ * .hdrc_config:
+ * sunxi_musb_hdrc_config_5eps => musb_config
+ * sunxi_musb_hdrc_config_4eps => musb_config_h3
+ * .has_sram: always enabled, ideally no-op on SoCs not using it
+ * .has_reset: automatically detected from DT
+ * .no_configdata: handled via Kconfig's CONFIG_USB_MUSB_FIXED_CONFIGDATA
+ */
static const struct sunxi_musb_config sun4i_a10_cfg = {
.config = &musb_config,
};
@@ -518,6 +527,10 @@
.config = &musb_config_h3,
};
+static const struct sunxi_musb_config suniv_f1c100s_cfg = {
+ .config = &musb_config,
+};
+
static const struct udevice_id sunxi_musb_ids[] = {
{ .compatible = "allwinner,sun4i-a10-musb",
.data = (ulong)&sun4i_a10_cfg },
@@ -527,6 +540,8 @@
.data = (ulong)&sun6i_a31_cfg },
{ .compatible = "allwinner,sun8i-h3-musb",
.data = (ulong)&sun8i_h3_cfg },
+ { .compatible = "allwinner,suniv-f1c100s-musb",
+ .data = (ulong)&suniv_f1c100s_cfg },
{ }
};
diff --git a/drivers/usb/musb-new/ti-musb.c b/drivers/usb/musb-new/ti-musb.c
index ed5e519..76e8b88 100644
--- a/drivers/usb/musb-new/ti-musb.c
+++ b/drivers/usb/musb-new/ti-musb.c
@@ -5,7 +5,6 @@
* (C) Copyright 2016
* Texas Instruments Incorporated, <www.ti.com>
*/
-#include <common.h>
#include <command.h>
#include <console.h>
#include <dm.h>
diff --git a/drivers/usb/musb-new/ux500.c b/drivers/usb/musb-new/ux500.c
index 57c7d56..6b4ef3c 100644
--- a/drivers/usb/musb-new/ux500.c
+++ b/drivers/usb/musb-new/ux500.c
@@ -1,7 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+
/* Copyright (C) 2019 Stephan Gerhold */
-#include <common.h>
#include <dm.h>
#include <generic-phy.h>
#include <dm/device_compat.h>
diff --git a/drivers/usb/musb/am35x.c b/drivers/usb/musb/am35x.c
index f945f1f..2c23043 100644
--- a/drivers/usb/musb/am35x.c
+++ b/drivers/usb/musb/am35x.c
@@ -9,7 +9,6 @@
* Copyright (c) 2010 Texas Instruments Incorporated
*/
-#include <common.h>
#include <linux/delay.h>
#include "am35x.h"
diff --git a/drivers/usb/musb/musb_core.c b/drivers/usb/musb/musb_core.c
index 9651f07..260552e 100644
--- a/drivers/usb/musb/musb_core.c
+++ b/drivers/usb/musb/musb_core.c
@@ -8,7 +8,6 @@
* Author: Thomas Abraham t-abraham@ti.com, Texas Instruments
*/
-#include <common.h>
#include <linux/bitops.h>
#include "musb_core.h"
diff --git a/drivers/usb/musb/musb_hcd.c b/drivers/usb/musb/musb_hcd.c
index 4676cab..c95c6a4 100644
--- a/drivers/usb/musb/musb_hcd.c
+++ b/drivers/usb/musb/musb_hcd.c
@@ -7,7 +7,6 @@
* Author: Thomas Abraham t-abraham@ti.com, Texas Instruments
*/
-#include <common.h>
#include <log.h>
#include <usb.h>
#include <linux/delay.h>
diff --git a/drivers/usb/musb/musb_udc.c b/drivers/usb/musb/musb_udc.c
index 2ffcb7c..696855e 100644
--- a/drivers/usb/musb/musb_udc.c
+++ b/drivers/usb/musb/musb_udc.c
@@ -37,7 +37,6 @@
* -------------------------------------------------------------------------
*/
-#include <common.h>
#include <hang.h>
#include <serial.h>
#include <usbdevice.h>
diff --git a/drivers/usb/phy/rockchip_usb2_phy.c b/drivers/usb/phy/rockchip_usb2_phy.c
index c46ad86..9ec5b2d 100644
--- a/drivers/usb/phy/rockchip_usb2_phy.c
+++ b/drivers/usb/phy/rockchip_usb2_phy.c
@@ -3,7 +3,6 @@
* Copyright 2016 Rockchip Electronics Co., Ltd
*/
-#include <common.h>
#include <hang.h>
#include <log.h>
#include <asm/global_data.h>
diff --git a/drivers/usb/ulpi/omap-ulpi-viewport.c b/drivers/usb/ulpi/omap-ulpi-viewport.c
index 1b01cd4..6f0c3eb 100644
--- a/drivers/usb/ulpi/omap-ulpi-viewport.c
+++ b/drivers/usb/ulpi/omap-ulpi-viewport.c
@@ -7,7 +7,6 @@
* Author: Govindraj R <govindraj.raja@ti.com>
*/
-#include <common.h>
#include <log.h>
#include <asm/io.h>
#include <linux/delay.h>
diff --git a/drivers/usb/ulpi/ulpi-viewport.c b/drivers/usb/ulpi/ulpi-viewport.c
index 55a6280..bac20a0 100644
--- a/drivers/usb/ulpi/ulpi-viewport.c
+++ b/drivers/usb/ulpi/ulpi-viewport.c
@@ -13,7 +13,6 @@
* Copyright (C) 2011 Google, Inc.
*/
-#include <common.h>
#include <asm/io.h>
#include <linux/delay.h>
#include <usb/ulpi.h>
diff --git a/drivers/usb/ulpi/ulpi.c b/drivers/usb/ulpi/ulpi.c
index b5d2c2c..128adcb 100644
--- a/drivers/usb/ulpi/ulpi.c
+++ b/drivers/usb/ulpi/ulpi.c
@@ -19,7 +19,6 @@
* Freescale Semiconductors
*/
-#include <common.h>
#include <exports.h>
#include <log.h>
#include <linux/delay.h>
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index 6f319ba..7808ae7 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -180,6 +180,7 @@
config CONSOLE_TRUETYPE
bool "Support a console that uses TrueType fonts"
+ select X86_HARDFP if X86
help
TrueTrype fonts can provide outline-drawing capability rather than
needing to provide a bitmap for each font and size that is needed.
@@ -521,6 +522,14 @@
Say Y here if you want to enable support for Orise Technology
otm8009a 480x800 dsi 2dl panel.
+config VIDEO_LCD_LG_LD070WX3
+ bool "LD070WX3 DSI LCD panel support"
+ depends on PANEL && BACKLIGHT
+ select VIDEO_MIPI_DSI
+ help
+ Say Y here if you want to enable support for LG LD070WX3
+ 800x1280 DSI video mode panel.
+
config VIDEO_LCD_RAYDIUM_RM68200
bool "RM68200 DSI LCD panel support"
select VIDEO_MIPI_DSI
@@ -546,6 +555,15 @@
IPS-LCD module with Renesas R69328 IC. The panel has a 720x1280
resolution and uses 24 bit RGB per pixel.
+config VIDEO_LCD_SAMSUNG_LTL106HL02
+ tristate "Samsung LTL106HL02 1920x1080 DSI video mode panel"
+ depends on PANEL && BACKLIGHT
+ select VIDEO_MIPI_DSI
+ help
+ Say Y here if you want to enable support for Samsung LTL106HL02
+ LCD module found in Microsoft Surface 2. The panel has a FullHD
+ resolution (1920x1080).
+
config VIDEO_LCD_SSD2828
bool "SSD2828 bridge chip"
---help---
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index fdc2937..f3f70cd 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -58,10 +58,12 @@
obj-$(CONFIG_VIDEO_LCD_ENDEAVORU) += endeavoru-panel.o
obj-$(CONFIG_VIDEO_LCD_HIMAX_HX8394) += himax-hx8394.o
obj-$(CONFIG_VIDEO_LCD_HITACHI_TX18D42VM) += hitachi_tx18d42vm_lcd.o
+obj-$(CONFIG_VIDEO_LCD_LG_LD070WX3) += lg-ld070wx3.o
obj-$(CONFIG_VIDEO_LCD_ORISETECH_OTM8009A) += orisetech_otm8009a.o
obj-$(CONFIG_VIDEO_LCD_RAYDIUM_RM68200) += raydium-rm68200.o
obj-$(CONFIG_VIDEO_LCD_RENESAS_R61307) += renesas-r61307.o
obj-$(CONFIG_VIDEO_LCD_RENESAS_R69328) += renesas-r69328.o
+obj-$(CONFIG_VIDEO_LCD_SAMSUNG_LTL106HL02) += samsung-ltl106hl02.o
obj-$(CONFIG_VIDEO_LCD_SSD2828) += ssd2828.o
obj-$(CONFIG_VIDEO_LCD_TDO_TL070WSH30) += tdo-tl070wsh30.o
obj-$(CONFIG_VIDEO_MCDE_SIMPLE) += mcde_simple.o
diff --git a/drivers/video/anx9804.c b/drivers/video/anx9804.c
index 52b5988..a149e6f 100644
--- a/drivers/video/anx9804.c
+++ b/drivers/video/anx9804.c
@@ -9,7 +9,6 @@
* interface for driving eDP TFT displays.
*/
-#include <common.h>
#include <i2c.h>
#include <linux/delay.h>
#include "anx98xx-edp.h"
diff --git a/drivers/video/atmel_hlcdfb.c b/drivers/video/atmel_hlcdfb.c
index 652ba14..89bc0ee 100644
--- a/drivers/video/atmel_hlcdfb.c
+++ b/drivers/video/atmel_hlcdfb.c
@@ -5,7 +5,6 @@
* Copyright (C) 2012 Atmel Corporation
*/
-#include <common.h>
#include <cpu_func.h>
#include <log.h>
#include <malloc.h>
diff --git a/drivers/video/atmel_lcdfb.c b/drivers/video/atmel_lcdfb.c
index 5a7a54a..281c3a1 100644
--- a/drivers/video/atmel_lcdfb.c
+++ b/drivers/video/atmel_lcdfb.c
@@ -5,7 +5,6 @@
* Copyright (C) 2007 Atmel Corporation
*/
-#include <common.h>
#include <atmel_lcd.h>
#include <dm.h>
#include <fdtdec.h>
diff --git a/drivers/video/backlight-uclass.c b/drivers/video/backlight-uclass.c
index c14996d..2a09b2d 100644
--- a/drivers/video/backlight-uclass.c
+++ b/drivers/video/backlight-uclass.c
@@ -6,7 +6,6 @@
#define LOG_CATEGORY UCLASS_PANEL_BACKLIGHT
-#include <common.h>
#include <dm.h>
#include <backlight.h>
diff --git a/drivers/video/backlight_gpio.c b/drivers/video/backlight_gpio.c
index eea824a..b26fa9a 100644
--- a/drivers/video/backlight_gpio.c
+++ b/drivers/video/backlight_gpio.c
@@ -4,7 +4,6 @@
* Author: Patrick Delaunay <patrick.delaunay@foss.st.com>
*/
-#include <common.h>
#include <dm.h>
#include <backlight.h>
#include <log.h>
diff --git a/drivers/video/bcm2835.c b/drivers/video/bcm2835.c
index 63efa76..0c81e60 100644
--- a/drivers/video/bcm2835.c
+++ b/drivers/video/bcm2835.c
@@ -3,7 +3,6 @@
* (C) Copyright 2012 Stephen Warren
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <video.h>
diff --git a/drivers/video/bmp.c b/drivers/video/bmp.c
index bab6fa7..291ed36 100644
--- a/drivers/video/bmp.c
+++ b/drivers/video/bmp.c
@@ -8,7 +8,6 @@
* BMP handling routines
*/
-#include <common.h>
#include <bmp_layout.h>
#include <command.h>
#include <dm.h>
diff --git a/drivers/video/bochs.c b/drivers/video/bochs.c
index 022ea38..00e673a 100644
--- a/drivers/video/bochs.c
+++ b/drivers/video/bochs.c
@@ -5,7 +5,6 @@
#define LOG_CATEGORY UCLASS_VIDEO
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <pci.h>
diff --git a/drivers/video/bridge/Kconfig b/drivers/video/bridge/Kconfig
index 2311ca2..ab91727 100644
--- a/drivers/video/bridge/Kconfig
+++ b/drivers/video/bridge/Kconfig
@@ -7,6 +7,16 @@
requires LVDS, an eDP->LVDS bridge chip can be used to provide the
necessary conversion. This option enables support for these devices.
+config VIDEO_BRIDGE_PARADE_DP501
+ bool "Support Parade DP501 DP & DVI/HDMI dual mode transmitter"
+ depends on PANEL && DM_GPIO
+ select DM_I2C
+ help
+ The Parade DP501 is a DP & DVI/HDMI dual-mode transmitter. It
+ enables an RGB/Parallel SOC output to be converted, packed and
+ serialized into either DP or TMDS output device. Only DisplayPort
+ functionality of this transmitter has been implemented and tested.
+
config VIDEO_BRIDGE_PARADE_PS862X
bool "Support Parade PS862X DP->LVDS bridge"
depends on VIDEO_BRIDGE
@@ -40,3 +50,12 @@
select VIDEO_MIPI_DSI
help
Solomon SSD2824 SPI RGB-DSI bridge driver wrapped into panel uClass.
+
+config VIDEO_BRIDGE_TOSHIBA_TC358768
+ bool "Support Toshiba TC358768 MIPI DSI bridge"
+ depends on PANEL && DM_GPIO
+ select VIDEO_MIPI_DSI
+ select DM_I2C
+ help
+ Toshiba TC358768AXBG/TC358778XBG DSI bridge chip driver.
+ Found in Asus Transformer Infinity TF700T.
diff --git a/drivers/video/bridge/Makefile b/drivers/video/bridge/Makefile
index 22625c8..58697e3 100644
--- a/drivers/video/bridge/Makefile
+++ b/drivers/video/bridge/Makefile
@@ -4,7 +4,9 @@
# Written by Simon Glass <sjg@chromium.org>
obj-$(CONFIG_VIDEO_BRIDGE) += video-bridge-uclass.o
+obj-$(CONFIG_VIDEO_BRIDGE_PARADE_DP501) += dp501.o
obj-$(CONFIG_VIDEO_BRIDGE_PARADE_PS862X) += ps862x.o
obj-$(CONFIG_VIDEO_BRIDGE_NXP_PTN3460) += ptn3460.o
obj-$(CONFIG_VIDEO_BRIDGE_ANALOGIX_ANX6345) += anx6345.o
obj-$(CONFIG_VIDEO_BRIDGE_SOLOMON_SSD2825) += ssd2825.o
+obj-$(CONFIG_VIDEO_BRIDGE_TOSHIBA_TC358768) += tc358768.o
diff --git a/drivers/video/bridge/anx6345.c b/drivers/video/bridge/anx6345.c
index 93fa25f..8cee4c9 100644
--- a/drivers/video/bridge/anx6345.c
+++ b/drivers/video/bridge/anx6345.c
@@ -3,7 +3,6 @@
* Copyright (C) 2017 Vasily Khoruzhick <anarsoul@gmail.com>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <i2c.h>
diff --git a/drivers/video/bridge/dp501.c b/drivers/video/bridge/dp501.c
new file mode 100644
index 0000000..095e3e7
--- /dev/null
+++ b/drivers/video/bridge/dp501.c
@@ -0,0 +1,579 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2024 Jonas Schwöbel <jonasschwoebel@yahoo.de>
+ * Copyright (C) 2024 Svyatoslav Ryhel <clamor95@gmail.com>
+ */
+
+#include <dm.h>
+#include <i2c.h>
+#include <log.h>
+#include <backlight.h>
+#include <panel.h>
+#include <linux/delay.h>
+#include <linux/err.h>
+#include <power/regulator.h>
+
+#include <asm/gpio.h>
+
+/* TOP */
+#define TOPCFG0 0x00
+#define ROMI2C_PRESCALE 0x01
+#define HDCPI2C_PRESCALE 0x02
+#define GPIO 0x03
+#define GPIO_OUT_ENB 0x04
+#define TESTI2C_CTL 0x05
+#define I2CMTIMEOUT 0x06
+#define TOPCFG1 0x07
+#define TOPCFG2 0x08
+#define TOPCFG3 0x09
+#define TOPCFG4 0x0A
+#define CLKSWRST 0x0B
+#define CADETB_CTL 0x0C
+
+/* Video Attribute */
+#define HTOTAL_L 0x10
+#define HTOTAL_H 0x11
+#define HSTART_L 0x12
+#define HSTART_H 0x13
+#define HWIDTH_L 0x14
+#define HWIDTH_H 0x15
+#define VTOTAL_L 0x16
+#define VTOTAL_H 0x17
+#define VSTART_L 0x18
+#define VSTART_H 0x19
+#define VHEIGHT_L 0x1A
+#define VHEIGHT_H 0x1B
+#define HSPHSW_L 0x1C
+#define HSPHSW_H 0x1D
+#define VSPVSW_L 0x1E
+#define VSPVSW_H 0x1F
+#define MISC0 0x20
+#define MISC1 0x21
+
+/* Video Capture */
+#define VCAPCTRL0 0x24
+#define VCAPCTRL1 0x25
+#define VCAPCTRL2 0x26
+#define VCAPCTRL3 0x27
+#define VCAPCTRL4 0x28
+#define VCAP_MEASURE 0x29
+
+/* Main Link Control */
+#define NVID_L 0x2C
+#define NVID_M 0x2D
+#define NVID_H 0x2E
+#define LINK_CTRL0 0x2F
+#define LINK_CTRL1 0x30
+#define LINK_DEBUG 0x31
+#define ERR_POS 0x32
+#define ERR_PAT 0x33
+#define LINK_DEB_SEL 0x34
+#define IDLE_PATTERN 0x35
+#define TU_SIZE 0x36
+#define CRC_CTRL 0x37
+#define CRC_OUT 0x38
+
+/* AVI-2 InfoFrame */
+#define SD_CTRL0 0x3A
+#define SD_CTRL1 0x3B
+#define SD_HB0 0x3C
+#define SD_HB1 0x3D
+#define SD_HB2 0x3E
+#define SD_HB3 0x3F
+#define SD_DB0 0x40
+#define SD_DB1 0x41
+#define SD_DB2 0x42
+#define SD_DB3 0x43
+#define SD_DB4 0x44
+#define SD_DB5 0x45
+#define SD_DB6 0x46
+#define SD_DB7 0x47
+#define SD_DB8 0x48
+#define SD_DB9 0x49
+#define SD_DB10 0x4A
+#define SD_DB11 0x4B
+#define SD_DB12 0x4C
+#define SD_DB13 0x4D
+#define SD_DB14 0x4E
+#define SD_DB15 0x4F
+
+/* Aux Channel and PCS */
+#define DPCD_REV 0X50
+#define MAX_LINK_RATE 0x51
+#define MAX_LANE_COUNT 0x52
+#define MAX_DOWNSPREAD 0x53
+#define NORP 0x54
+#define DOWNSTRMPORT_PRE 0x55
+#define MLINK_CH_CODING 0x56
+#define RCV_P0_CAP0 0x58
+#define RCV_P0_CAP1 0x59
+#define RCV_P1_CAP0 0x5A
+#define RCV_P1_CAP1 0x5B
+#define DOWNSPREAD_CTL 0x5C
+#define LINK_BW 0x5D
+#define LANE_CNT 0x5E
+#define TRAINING_CTL 0x5F
+#define QUALTEST_CTL 0x60
+#define SINK_COUNT 0x61
+#define DEV_SERVICE_IRQ 0x62
+#define LANE01_STATUS 0x63
+#define LANE23_STATUS 0x64
+#define LANE_STATUS_UPDATE 0x65
+#define SINK_STATUS 0x66
+#define AUX_NOISE 0x67
+#define TEST_MODE 0x69
+#define TEST_PATTERN0 0x6A
+#define TEST_PATTERN1 0x6B
+#define TEST_PATTERN2 0x6C
+#define SIGNATURE 0x6D
+#define PCSCFG 0x6E
+#define AUXCTRL0 0x6f
+#define AUXCTRL2 0x70
+#define AUXCTRL1 0x71
+#define HPDCTL0 0x72
+#define HPDCTL1 0x73
+#define LINK_STATE_CTRL 0x74
+#define SWRST 0x75
+#define LINK_IRQ 0x76
+#define AUXIRQ_CTRL 0x77
+#define HPD2_IRQ_CTRL 0x78
+#define SW_TRAIN_CTRL 0x79
+#define SW_DRV_SET 0x7A
+#define SW_PRE_SET 0x7B
+#define DPCD_ADDR_L 0x7D
+#define DPCD_ADDR_M 0x7E
+#define DPCD_ADDR_H 0x7F
+#define DPCD_LENGTH 0x80
+#define DPCD_WDATA 0x81
+#define DPCD_RDATA 0x82
+#define DPCD_CTL 0x83
+#define DPCD_STATUS 0x84
+#define AUX_STATUS 0x85
+#define I2CTOAUX_RELENGTH 0x86
+#define AUX_RETRY_CTRL 0x87
+#define TIMEOUT_CTRL 0x88
+#define I2CCMD_OPT1 0x89
+#define AUXCMD_ERR_IRQ 0x8A
+#define AUXCMD_OPT2 0x8B
+#define HDCP_Reserved 0x8C
+
+/* Audio InfoFrame */
+#define TX_MVID0 0x90
+#define TX_MVID1 0x91
+#define TX_MVID2 0x92
+#define TX_MVID_OFF 0x93
+#define TX_MAUD0 0x94
+#define TX_MAUD1 0x95
+#define TX_MAUD2 0x96
+#define TX_MAUD_OFF 0x97
+#define MN_CTRL 0x98
+#define MOUT0 0x99
+#define MOUT1 0x9A
+#define MOUT2 0x9B
+
+/* Audio Control */
+#define NAUD_L 0x9F
+#define NAUD_M 0xA0
+#define NAUD_H 0xA1
+#define AUD_CTRL0 0xA2
+#define AUD_CTRL1 0xA3
+#define LANE_POL 0xAA
+#define LANE_EN 0xAB
+#define LANE_MAP 0xAC
+#define SCR_POLY0 0xAD
+#define SCR_POLY1 0xAE
+#define PRBS7_POLY 0xAF
+
+/* Video Pre-process */
+#define MISC_SHDOW 0xB0
+#define VCAPCPCTL0 0xB1
+#define VCAPCPCTL1 0xB2
+#define VCAPCPCTL2 0xB3
+#define CSCPAR 0xB4
+#define I2CTODPCDSTATUS2 0xBA
+#define AUXCTL_REG 0xBB
+
+/* Page 2 */
+#define SEL_PIO1 0x24
+#define SEL_PIO2 0x25
+#define SEL_PIO3 0x26
+#define CHIP_VER_L 0x82
+
+struct dp501_priv {
+ struct udevice *panel;
+ struct display_timing timing;
+
+ struct udevice *chip2;
+
+ struct udevice *vdd;
+ struct gpio_desc reset_gpio;
+ struct gpio_desc enable_gpio;
+};
+
+static int dp501_sw_init(struct udevice *dev)
+{
+ struct dp501_priv *priv = dev_get_priv(dev);
+ int i;
+ u8 val;
+
+ dm_i2c_reg_write(dev, TOPCFG4, 0x30);
+ udelay(200);
+ dm_i2c_reg_write(dev, TOPCFG4, 0x0c);
+ dm_i2c_reg_write(dev, 0x8f, 0x02);
+
+ /* check for connected panel during 1 msec */
+ for (i = 0; i < 5; i++) {
+ val = dm_i2c_reg_read(dev, 0x8d);
+ val &= BIT(2);
+ if (val)
+ break;
+
+ udelay(200);
+ }
+
+ if (!val) {
+ log_debug("%s: panel is not connected!\n", __func__);
+ return -ENODEV;
+ }
+
+ dm_i2c_reg_write(priv->chip2, SEL_PIO1, 0x02);
+ dm_i2c_reg_write(priv->chip2, SEL_PIO2, 0x04);
+ dm_i2c_reg_write(priv->chip2, SEL_PIO3, 0x10);
+
+ dm_i2c_reg_write(dev, LINK_STATE_CTRL, 0xa0);
+ dm_i2c_reg_write(dev, 0x8f, 0x02);
+ dm_i2c_reg_write(dev, TOPCFG1, 0x16);
+ dm_i2c_reg_write(dev, TOPCFG0, 0x24);
+ dm_i2c_reg_write(dev, HPD2_IRQ_CTRL, 0x30);
+ dm_i2c_reg_write(dev, AUXIRQ_CTRL, 0xff);
+ dm_i2c_reg_write(dev, LINK_IRQ, 0xff);
+
+ /* auto detect DVO timing */
+ dm_i2c_reg_write(dev, VCAPCTRL3, 0x30);
+
+ /* reset tpfifo at v blank */
+ dm_i2c_reg_write(dev, LINK_CTRL0, 0x82);
+
+ dm_i2c_reg_write(dev, VCAPCTRL4, 0x07);
+ dm_i2c_reg_write(dev, AUX_RETRY_CTRL, 0x7f);
+ dm_i2c_reg_write(dev, TIMEOUT_CTRL, 0x1e);
+ dm_i2c_reg_write(dev, AUXCTL_REG, 0x06);
+
+ /* DPCD readable */
+ dm_i2c_reg_write(dev, HPDCTL0, 0xa9);
+
+ /* Scramble on */
+ dm_i2c_reg_write(dev, QUALTEST_CTL, 0x00);
+
+ dm_i2c_reg_write(dev, 0x8f, 0x02);
+
+ dm_i2c_reg_write(dev, VCAPCTRL0, 0xc4);
+
+ /* set color depth 8bit (0x00: 6bit; 0x20: 8bit; 0x40: 10bit) */
+ dm_i2c_reg_write(dev, MISC0, 0x20);
+
+ dm_i2c_reg_write(dev, VCAPCPCTL2, 0x01);
+
+ /* check if bridge returns ready status */
+ for (i = 0; i < 5; i++) {
+ val = dm_i2c_reg_read(dev, LINK_IRQ);
+ val &= BIT(0);
+ if (val)
+ break;
+
+ udelay(200);
+ }
+
+ if (!val) {
+ log_debug("%s: bridge is not ready\n", __func__);
+ return -ENODEV;
+ }
+
+ return 0;
+}
+
+static void dpcd_configure(struct udevice *dev, u32 config, bool write)
+{
+ dm_i2c_reg_write(dev, DPCD_ADDR_L, (u8)(config >> 8));
+ dm_i2c_reg_write(dev, DPCD_ADDR_M, (u8)(config >> 16));
+ dm_i2c_reg_write(dev, DPCD_ADDR_H, (u8)((config >> 24) | BIT(7)));
+ dm_i2c_reg_write(dev, DPCD_LENGTH, 0x00);
+ dm_i2c_reg_write(dev, LINK_IRQ, 0x20);
+
+ if (write)
+ dm_i2c_reg_write(dev, DPCD_WDATA, (u8)(config & 0xff));
+
+ dm_i2c_reg_write(dev, DPCD_CTL, 0x01);
+
+ udelay(10);
+}
+
+static int dump_dpcd_data(struct udevice *dev, u32 config, u8 *data)
+{
+ int i;
+ u8 value;
+
+ dpcd_configure(dev, config, false);
+
+ value = dm_i2c_reg_read(dev, DPCD_CTL);
+ if (value)
+ return -ENODATA;
+
+ for (i = 0; i < 5; i++) {
+ value = dm_i2c_reg_read(dev, LINK_IRQ);
+ value &= BIT(5);
+ if (value)
+ break;
+
+ udelay(100);
+ }
+
+ if (!value)
+ return -ENODATA;
+
+ value = dm_i2c_reg_read(dev, DPCD_STATUS);
+ if (!(value & 0xe0))
+ *data = dm_i2c_reg_read(dev, DPCD_RDATA);
+ else
+ return -ENODATA;
+
+ return 0;
+}
+
+static int dp501_dpcd_dump(struct udevice *dev, u32 config, u8 *data)
+{
+ int i, ret;
+
+ for (i = 0; i < 5; i++) {
+ ret = dump_dpcd_data(dev, config, data);
+ if (!ret)
+ break;
+
+ udelay(100);
+ }
+
+ return ret;
+}
+
+static int dp501_reset_link(struct udevice *dev)
+{
+ dm_i2c_reg_write(dev, TRAINING_CTL, 0x00);
+ dm_i2c_reg_write(dev, SWRST, 0xf8);
+ dm_i2c_reg_write(dev, SWRST, 0x00);
+
+ return -ENODEV;
+}
+
+static int dp501_link_training(struct udevice *dev)
+{
+ int i, ret;
+ u8 lane, link, link_out;
+ u8 lane_cnt, lane01, lane23;
+
+ dpcd_configure(dev, 0x030000, true);
+ dpcd_configure(dev, 0x03011c, true);
+ dpcd_configure(dev, 0x0301f8, true);
+
+ ret = dp501_dpcd_dump(dev, 0x90000100, &link);
+ if (ret) {
+ log_debug("%s: link dump failed %d\n", __func__, ret);
+ return dp501_reset_link(dev);
+ }
+
+ ret = dp501_dpcd_dump(dev, 0x90000200, &lane);
+ if (ret) {
+ log_debug("%s: lane dump failed %d\n", __func__, ret);
+ return dp501_reset_link(dev);
+ }
+
+ /* Software trainig */
+ for (i = 10; i > 0; i--) {
+ dm_i2c_reg_write(dev, LINK_BW, link);
+ dm_i2c_reg_write(dev, LANE_CNT, lane | BIT(7));
+
+ link_out = dm_i2c_reg_read(dev, LINK_BW);
+ lane_cnt = dm_i2c_reg_read(dev, LANE_CNT);
+
+ if (link_out == link &&
+ (lane_cnt == (lane | BIT(7))))
+ break;
+
+ udelay(500);
+ }
+
+ if (!i)
+ return dp501_reset_link(dev);
+
+ dm_i2c_reg_write(dev, LINK_STATE_CTRL, 0x00);
+ dm_i2c_reg_write(dev, TRAINING_CTL, 0x0d);
+
+ /* check if bridge returns link ready status */
+ for (i = 0; i < 100; i++) {
+ link_out = dm_i2c_reg_read(dev, LINK_IRQ);
+ link_out &= BIT(1);
+ if (link_out) {
+ dm_i2c_reg_write(dev, LINK_IRQ, 0xff);
+ break;
+ }
+
+ udelay(100);
+ }
+
+ if (!link_out) {
+ log_debug("%s: link prepare failed %d\n",
+ __func__, link_out);
+ return dp501_reset_link(dev);
+ }
+
+ lane01 = dm_i2c_reg_read(dev, LANE01_STATUS);
+ lane23 = dm_i2c_reg_read(dev, LANE23_STATUS);
+
+ switch (lane_cnt & 0xf) {
+ case 4:
+ if (lane01 == 0x77 &&
+ lane23 == 0x77)
+ return 0;
+ break;
+
+ case 2:
+ if (lane01 == 0x77)
+ return 0;
+ break;
+
+ default:
+ if ((lane01 & 7) == 7)
+ return 0;
+ break;
+ }
+
+ return dp501_reset_link(dev);
+}
+
+static int dp501_attach(struct udevice *dev)
+{
+ struct dp501_priv *priv = dev_get_priv(dev);
+ int ret;
+
+ ret = dp501_sw_init(dev);
+ if (ret)
+ return ret;
+
+ mdelay(90);
+
+ ret = dp501_link_training(dev);
+ if (ret)
+ return ret;
+
+ /* Perform panel HW setup */
+ return panel_enable_backlight(priv->panel);
+}
+
+static int dp501_set_backlight(struct udevice *dev, int percent)
+{
+ struct dp501_priv *priv = dev_get_priv(dev);
+
+ return panel_set_backlight(priv->panel, percent);
+}
+
+static int dp501_panel_timings(struct udevice *dev,
+ struct display_timing *timing)
+{
+ struct dp501_priv *priv = dev_get_priv(dev);
+
+ memcpy(timing, &priv->timing, sizeof(*timing));
+ return 0;
+}
+
+static void dp501_hw_init(struct dp501_priv *priv)
+{
+ dm_gpio_set_value(&priv->reset_gpio, 1);
+
+ regulator_set_enable_if_allowed(priv->vdd, 1);
+ dm_gpio_set_value(&priv->enable_gpio, 1);
+
+ udelay(100);
+
+ dm_gpio_set_value(&priv->reset_gpio, 0);
+ mdelay(80);
+}
+
+static int dp501_setup(struct udevice *dev)
+{
+ struct dm_i2c_chip *chip = dev_get_parent_plat(dev);
+ struct dp501_priv *priv = dev_get_priv(dev);
+ struct udevice *bus = dev_get_parent(dev);
+ int ret;
+
+ /* get panel */
+ ret = uclass_get_device_by_phandle(UCLASS_PANEL, dev,
+ "panel", &priv->panel);
+ if (ret) {
+ log_debug("%s: Cannot get panel: ret=%d\n", __func__, ret);
+ return log_ret(ret);
+ }
+
+ /* get regulators */
+ ret = device_get_supply_regulator(dev, "power-supply", &priv->vdd);
+ if (ret) {
+ log_debug("%s: vddc regulator error: %d\n", __func__, ret);
+ if (ret != -ENOENT)
+ return log_ret(ret);
+ }
+
+ /* get gpios */
+ ret = gpio_request_by_name(dev, "reset-gpios", 0,
+ &priv->reset_gpio, GPIOD_IS_OUT);
+ if (ret) {
+ log_debug("%s: Could not decode reset-gpios (%d)\n",
+ __func__, ret);
+ return ret;
+ }
+
+ ret = gpio_request_by_name(dev, "enable-gpios", 0,
+ &priv->enable_gpio, GPIOD_IS_OUT);
+ if (ret) {
+ log_debug("%s: Could not decode enable-gpios (%d)\n",
+ __func__, ret);
+ return ret;
+ }
+
+ ret = i2c_get_chip(bus, chip->chip_addr + 2, 1, &priv->chip2);
+ if (ret) {
+ log_debug("%s: cannot get second PMIC I2C chip (err %d)\n",
+ __func__, ret);
+ return ret;
+ }
+
+ dp501_hw_init(priv);
+
+ /* get EDID */
+ return panel_get_display_timing(priv->panel, &priv->timing);
+}
+
+static int dp501_probe(struct udevice *dev)
+{
+ if (device_get_uclass_id(dev->parent) != UCLASS_I2C)
+ return -EPROTONOSUPPORT;
+
+ return dp501_setup(dev);
+}
+
+struct panel_ops dp501_ops = {
+ .enable_backlight = dp501_attach,
+ .set_backlight = dp501_set_backlight,
+ .get_display_timing = dp501_panel_timings,
+};
+
+static const struct udevice_id dp501_ids[] = {
+ { .compatible = "parade,dp501" },
+ { }
+};
+
+U_BOOT_DRIVER(dp501) = {
+ .name = "dp501",
+ .id = UCLASS_PANEL,
+ .of_match = dp501_ids,
+ .ops = &dp501_ops,
+ .probe = dp501_probe,
+ .priv_auto = sizeof(struct dp501_priv),
+};
diff --git a/drivers/video/bridge/ps862x.c b/drivers/video/bridge/ps862x.c
index d1d22a6..efd0375 100644
--- a/drivers/video/bridge/ps862x.c
+++ b/drivers/video/bridge/ps862x.c
@@ -4,7 +4,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <i2c.h>
diff --git a/drivers/video/bridge/ptn3460.c b/drivers/video/bridge/ptn3460.c
index 4760f04..5851e1e 100644
--- a/drivers/video/bridge/ptn3460.c
+++ b/drivers/video/bridge/ptn3460.c
@@ -4,7 +4,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <video_bridge.h>
diff --git a/drivers/video/bridge/ssd2825.c b/drivers/video/bridge/ssd2825.c
index cea20dc..f978021 100644
--- a/drivers/video/bridge/ssd2825.c
+++ b/drivers/video/bridge/ssd2825.c
@@ -3,7 +3,6 @@
* Copyright (c) 2022 Svyatoslav Ryhel <clamor95@gmail.com>
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <log.h>
@@ -349,39 +348,6 @@
struct ssd2825_bridge_priv *priv = dev_get_priv(dev);
struct mipi_dsi_device *device = &priv->device;
struct display_timing *dt = &priv->timing;
- int ret;
-
- ret = clk_prepare_enable(priv->tx_clk);
- if (ret) {
- log_err("error enabling tx_clk (%d)\n", ret);
- return ret;
- }
-
- ret = dm_gpio_set_value(&priv->power_gpio, 1);
- if (ret) {
- log_err("error changing power-gpios (%d)\n", ret);
- return ret;
- }
- mdelay(10);
-
- ret = dm_gpio_set_value(&priv->reset_gpio, 0);
- if (ret) {
- log_err("error changing reset-gpios (%d)\n", ret);
- return ret;
- }
- mdelay(10);
-
- ret = dm_gpio_set_value(&priv->reset_gpio, 1);
- if (ret) {
- log_err("error changing reset-gpios (%d)\n", ret);
- return ret;
- }
- mdelay(10);
-
- /* Perform panel HW setup */
- ret = panel_enable_backlight(priv->panel);
- if (ret)
- return ret;
/* Perform SW reset */
ssd2825_write_register(dev, SSD2825_OPERATION_CTRL_REG, 0x0100);
@@ -417,17 +383,15 @@
SSD2825_CONF_REG_ECD | SSD2825_CONF_REG_EOT);
ssd2825_write_register(dev, SSD2825_VC_CTRL_REG, 0x0000);
- /* Set up SW panel configuration */
- ret = panel_set_backlight(priv->panel, BACKLIGHT_DEFAULT);
- if (ret)
- return ret;
-
- return 0;
+ /* Perform panel setup */
+ return panel_enable_backlight(priv->panel);
}
static int ssd2825_bridge_set_panel(struct udevice *dev, int percent)
{
- return 0;
+ struct ssd2825_bridge_priv *priv = dev_get_priv(dev);
+
+ return panel_set_backlight(priv->panel, percent);
}
static int ssd2825_bridge_panel_timings(struct udevice *dev,
@@ -440,6 +404,45 @@
return 0;
}
+static int ssd2825_bridge_hw_init(struct udevice *dev)
+{
+ struct ssd2825_bridge_priv *priv = dev_get_priv(dev);
+ int ret;
+
+ ret = clk_prepare_enable(priv->tx_clk);
+ if (ret) {
+ log_debug("%s: error enabling tx_clk (%d)\n",
+ __func__, ret);
+ return ret;
+ }
+
+ ret = dm_gpio_set_value(&priv->power_gpio, 1);
+ if (ret) {
+ log_debug("%s: error changing power-gpios (%d)\n",
+ __func__, ret);
+ return ret;
+ }
+ mdelay(10);
+
+ ret = dm_gpio_set_value(&priv->reset_gpio, 0);
+ if (ret) {
+ log_debug("%s: error changing reset-gpios (%d)\n",
+ __func__, ret);
+ return ret;
+ }
+ mdelay(10);
+
+ ret = dm_gpio_set_value(&priv->reset_gpio, 1);
+ if (ret) {
+ log_debug("%s: error changing reset-gpios (%d)\n",
+ __func__, ret);
+ return ret;
+ }
+ mdelay(10);
+
+ return 0;
+}
+
static int ssd2825_bridge_probe(struct udevice *dev)
{
struct ssd2825_bridge_priv *priv = dev_get_priv(dev);
@@ -496,7 +499,7 @@
return PTR_ERR(priv->tx_clk);
}
- return 0;
+ return ssd2825_bridge_hw_init(dev);
}
static const struct panel_ops ssd2825_bridge_ops = {
diff --git a/drivers/video/bridge/tc358768.c b/drivers/video/bridge/tc358768.c
new file mode 100644
index 0000000..19b6ca2
--- /dev/null
+++ b/drivers/video/bridge/tc358768.c
@@ -0,0 +1,985 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2020 Texas Instruments Incorporated
+ * Copyright (C) 2022 Svyatoslav Ryhel <clamor95@gmail.com>
+ */
+
+#include <clk.h>
+#include <dm.h>
+#include <i2c.h>
+#include <log.h>
+#include <mipi_display.h>
+#include <mipi_dsi.h>
+#include <backlight.h>
+#include <panel.h>
+#include <linux/delay.h>
+#include <linux/err.h>
+#include <linux/kernel.h>
+#include <linux/math64.h>
+#include <power/regulator.h>
+
+#include <asm/gpio.h>
+
+/* Global (16-bit addressable) */
+#define TC358768_CHIPID 0x0000
+#define TC358768_SYSCTL 0x0002
+#define TC358768_CONFCTL 0x0004
+#define TC358768_VSDLY 0x0006
+#define TC358768_DATAFMT 0x0008
+#define TC358768_GPIOEN 0x000E
+#define TC358768_GPIODIR 0x0010
+#define TC358768_GPIOIN 0x0012
+#define TC358768_GPIOOUT 0x0014
+#define TC358768_PLLCTL0 0x0016
+#define TC358768_PLLCTL1 0x0018
+#define TC358768_CMDBYTE 0x0022
+#define TC358768_PP_MISC 0x0032
+#define TC358768_DSITX_DT 0x0050
+#define TC358768_FIFOSTATUS 0x00F8
+
+/* Debug (16-bit addressable) */
+#define TC358768_VBUFCTRL 0x00E0
+#define TC358768_DBG_WIDTH 0x00E2
+#define TC358768_DBG_VBLANK 0x00E4
+#define TC358768_DBG_DATA 0x00E8
+
+/* TX PHY (32-bit addressable) */
+#define TC358768_CLW_DPHYCONTTX 0x0100
+#define TC358768_D0W_DPHYCONTTX 0x0104
+#define TC358768_D1W_DPHYCONTTX 0x0108
+#define TC358768_D2W_DPHYCONTTX 0x010C
+#define TC358768_D3W_DPHYCONTTX 0x0110
+#define TC358768_CLW_CNTRL 0x0140
+#define TC358768_D0W_CNTRL 0x0144
+#define TC358768_D1W_CNTRL 0x0148
+#define TC358768_D2W_CNTRL 0x014C
+#define TC358768_D3W_CNTRL 0x0150
+
+/* TX PPI (32-bit addressable) */
+#define TC358768_STARTCNTRL 0x0204
+#define TC358768_DSITXSTATUS 0x0208
+#define TC358768_LINEINITCNT 0x0210
+#define TC358768_LPTXTIMECNT 0x0214
+#define TC358768_TCLK_HEADERCNT 0x0218
+#define TC358768_TCLK_TRAILCNT 0x021C
+#define TC358768_THS_HEADERCNT 0x0220
+#define TC358768_TWAKEUP 0x0224
+#define TC358768_TCLK_POSTCNT 0x0228
+#define TC358768_THS_TRAILCNT 0x022C
+#define TC358768_HSTXVREGCNT 0x0230
+#define TC358768_HSTXVREGEN 0x0234
+#define TC358768_TXOPTIONCNTRL 0x0238
+#define TC358768_BTACNTRL1 0x023C
+
+/* TX CTRL (32-bit addressable) */
+#define TC358768_DSI_CONTROL 0x040C
+#define TC358768_DSI_STATUS 0x0410
+#define TC358768_DSI_INT 0x0414
+#define TC358768_DSI_INT_ENA 0x0418
+#define TC358768_DSICMD_RDFIFO 0x0430
+#define TC358768_DSI_ACKERR 0x0434
+#define TC358768_DSI_ACKERR_INTENA 0x0438
+#define TC358768_DSI_ACKERR_HALT 0x043c
+#define TC358768_DSI_RXERR 0x0440
+#define TC358768_DSI_RXERR_INTENA 0x0444
+#define TC358768_DSI_RXERR_HALT 0x0448
+#define TC358768_DSI_ERR 0x044C
+#define TC358768_DSI_ERR_INTENA 0x0450
+#define TC358768_DSI_ERR_HALT 0x0454
+#define TC358768_DSI_CONFW 0x0500
+#define TC358768_DSI_LPCMD 0x0500
+#define TC358768_DSI_RESET 0x0504
+#define TC358768_DSI_INT_CLR 0x050C
+#define TC358768_DSI_START 0x0518
+
+/* DSITX CTRL (16-bit addressable) */
+#define TC358768_DSICMD_TX 0x0600
+#define TC358768_DSICMD_TYPE 0x0602
+#define TC358768_DSICMD_WC 0x0604
+#define TC358768_DSICMD_WD0 0x0610
+#define TC358768_DSICMD_WD1 0x0612
+#define TC358768_DSICMD_WD2 0x0614
+#define TC358768_DSICMD_WD3 0x0616
+#define TC358768_DSI_EVENT 0x0620
+#define TC358768_DSI_VSW 0x0622
+#define TC358768_DSI_VBPR 0x0624
+#define TC358768_DSI_VACT 0x0626
+#define TC358768_DSI_HSW 0x0628
+#define TC358768_DSI_HBPR 0x062A
+#define TC358768_DSI_HACT 0x062C
+
+/* TC358768_DSI_CONTROL (0x040C) register */
+#define TC358768_DSI_CONTROL_DIS_MODE BIT(15)
+#define TC358768_DSI_CONTROL_TXMD BIT(7)
+#define TC358768_DSI_CONTROL_HSCKMD BIT(5)
+#define TC358768_DSI_CONTROL_EOTDIS BIT(0)
+
+/* TC358768_DSI_CONFW (0x0500) register */
+#define TC358768_DSI_CONFW_MODE_SET (5 << 29)
+#define TC358768_DSI_CONFW_MODE_CLR (6 << 29)
+#define TC358768_DSI_CONFW_ADDR_DSI_CONTROL (3 << 24)
+
+#define NANO 1000000000UL
+#define PICO 1000000000000ULL
+
+struct tc358768_priv {
+ struct mipi_dsi_host host;
+ struct mipi_dsi_device device;
+
+ struct udevice *panel;
+ struct display_timing timing;
+
+ struct udevice *vddc;
+ struct udevice *vddmipi;
+ struct udevice *vddio;
+
+ struct clk *refclk;
+
+ struct gpio_desc reset_gpio;
+
+ u32 pd_lines; /* number of Parallel Port Input Data Lines */
+ u32 dsi_lanes; /* number of DSI Lanes */
+
+ /* Parameters for PLL programming */
+ u32 fbd; /* PLL feedback divider */
+ u32 prd; /* PLL input divider */
+ u32 frs; /* PLL Freqency range for HSCK (post divider) */
+
+ u32 dsiclk; /* pll_clk / 2 */
+};
+
+static void tc358768_read(struct udevice *dev, u32 reg, u32 *val)
+{
+ int count;
+ u8 buf[4] = { 0, 0, 0, 0 };
+
+ /* 16-bit register? */
+ if (reg < 0x100 || reg >= 0x600)
+ count = 2;
+ else
+ count = 4;
+
+ dm_i2c_read(dev, reg, buf, count);
+ *val = (buf[0] << 8) | (buf[1] & 0xff) |
+ (buf[2] << 24) | (buf[3] << 16);
+
+ log_debug("%s 0x%04x >> 0x%08x\n",
+ __func__, reg, *val);
+}
+
+static void tc358768_write(struct udevice *dev, u32 reg, u32 val)
+{
+ int count;
+ u8 buf[4];
+
+ /* 16-bit register? */
+ if (reg < 0x100 || reg >= 0x600)
+ count = 2;
+ else
+ count = 4;
+
+ buf[0] = val >> 8;
+ buf[1] = val & 0xff;
+ buf[2] = val >> 24;
+ buf[3] = val >> 16;
+
+ log_debug("%s 0x%04x << 0x%08x\n",
+ __func__, reg, val);
+
+ dm_i2c_write(dev, reg, buf, count);
+}
+
+static void tc358768_update_bits(struct udevice *dev, u32 reg, u32 mask,
+ u32 val)
+{
+ u32 tmp, orig;
+
+ tc358768_read(dev, reg, &orig);
+
+ tmp = orig & ~mask;
+ tmp |= val & mask;
+ if (tmp != orig)
+ tc358768_write(dev, reg, tmp);
+}
+
+static ssize_t tc358768_dsi_host_transfer(struct mipi_dsi_host *host,
+ const struct mipi_dsi_msg *msg)
+{
+ struct udevice *dev = (struct udevice *)host->dev;
+ struct mipi_dsi_packet packet;
+ int ret;
+
+ if (msg->rx_len) {
+ log_debug("%s: MIPI rx is not supported\n", __func__);
+ return -EOPNOTSUPP;
+ }
+
+ if (msg->tx_len > 8) {
+ log_debug("%s: Maximum 8 byte MIPI tx is supported\n", __func__);
+ return -EOPNOTSUPP;
+ }
+
+ ret = mipi_dsi_create_packet(&packet, msg);
+ if (ret)
+ return ret;
+
+ if (mipi_dsi_packet_format_is_short(msg->type)) {
+ tc358768_write(dev, TC358768_DSICMD_TYPE,
+ (0x10 << 8) | (packet.header[0] & 0x3f));
+ tc358768_write(dev, TC358768_DSICMD_WC, 0);
+ tc358768_write(dev, TC358768_DSICMD_WD0,
+ (packet.header[2] << 8) | packet.header[1]);
+ } else {
+ int i;
+
+ tc358768_write(dev, TC358768_DSICMD_TYPE,
+ (0x40 << 8) | (packet.header[0] & 0x3f));
+ tc358768_write(dev, TC358768_DSICMD_WC, packet.payload_length);
+ for (i = 0; i < packet.payload_length; i += 2) {
+ u16 val = packet.payload[i];
+
+ if (i + 1 < packet.payload_length)
+ val |= packet.payload[i + 1] << 8;
+
+ tc358768_write(dev, TC358768_DSICMD_WD0 + i, val);
+ }
+ }
+
+ /* start transfer */
+ tc358768_write(dev, TC358768_DSICMD_TX, 1);
+
+ return packet.size;
+}
+
+static const struct mipi_dsi_host_ops tc358768_dsi_host_ops = {
+ .transfer = tc358768_dsi_host_transfer,
+};
+
+static void tc358768_sw_reset(struct udevice *dev)
+{
+ /* Assert Reset */
+ tc358768_write(dev, TC358768_SYSCTL, 1);
+ mdelay(5);
+
+ /* Release Reset, Exit Sleep */
+ tc358768_write(dev, TC358768_SYSCTL, 0);
+}
+
+static void tc358768_hw_enable(struct tc358768_priv *priv)
+{
+ int ret;
+
+ ret = clk_prepare_enable(priv->refclk);
+ if (ret)
+ log_debug("%s: error enabling refclk (%d)\n", __func__, ret);
+
+ ret = regulator_set_enable_if_allowed(priv->vddc, true);
+ if (ret)
+ log_debug("%s: error enabling vddc (%d)\n", __func__, ret);
+
+ ret = regulator_set_enable_if_allowed(priv->vddmipi, true);
+ if (ret)
+ log_debug("%s: error enabling vddmipi (%d)\n", __func__, ret);
+
+ mdelay(10);
+
+ ret = regulator_set_enable_if_allowed(priv->vddio, true);
+ if (ret)
+ log_debug("%s: error enabling vddio (%d)\n", __func__, ret);
+
+ mdelay(2);
+
+ /*
+ * The RESX is active low (GPIO_ACTIVE_LOW).
+ * DEASSERT (value = 0) the reset_gpio to enable the chip
+ */
+ ret = dm_gpio_set_value(&priv->reset_gpio, 0);
+ if (ret)
+ log_debug("%s: error changing reset-gpio (%d)\n", __func__, ret);
+
+ /* wait for encoder clocks to stabilize */
+ mdelay(2);
+}
+
+static u32 tc358768_pclk_to_pll(struct tc358768_priv *priv, u32 pclk)
+{
+ return (u32)div_u64((u64)pclk * priv->pd_lines, priv->dsi_lanes);
+}
+
+static int tc358768_calc_pll(struct tc358768_priv *priv,
+ struct display_timing *dt)
+{
+ static const u32 frs_limits[] = {
+ 1000000000,
+ 500000000,
+ 250000000,
+ 125000000,
+ 62500000
+ };
+ unsigned long refclk;
+ u32 prd, target_pll, i, max_pll, min_pll;
+ u32 frs, best_diff, best_pll, best_prd, best_fbd;
+
+ target_pll = tc358768_pclk_to_pll(priv, dt->pixelclock.typ);
+
+ /* pll_clk = RefClk * FBD / PRD * (1 / (2^FRS)) */
+
+ for (i = 0; i < ARRAY_SIZE(frs_limits); i++)
+ if (target_pll >= frs_limits[i])
+ break;
+
+ if (i == ARRAY_SIZE(frs_limits) || i == 0)
+ return -EINVAL;
+
+ frs = i - 1;
+ max_pll = frs_limits[i - 1];
+ min_pll = frs_limits[i];
+
+ refclk = clk_get_rate(priv->refclk);
+
+ best_diff = UINT_MAX;
+ best_pll = 0;
+ best_prd = 0;
+ best_fbd = 0;
+
+ for (prd = 1; prd <= 16; ++prd) {
+ u32 divisor = prd * (1 << frs);
+ u32 fbd;
+
+ for (fbd = 1; fbd <= 512; ++fbd) {
+ u32 pll, diff, pll_in;
+
+ pll = (u32)div_u64((u64)refclk * fbd, divisor);
+
+ if (pll >= max_pll || pll < min_pll)
+ continue;
+
+ pll_in = (u32)div_u64((u64)refclk, prd);
+ if (pll_in < 4000000)
+ continue;
+
+ diff = max(pll, target_pll) - min(pll, target_pll);
+
+ if (diff < best_diff) {
+ best_diff = diff;
+ best_pll = pll;
+ best_prd = prd;
+ best_fbd = fbd;
+
+ if (best_diff == 0)
+ goto found;
+ }
+ }
+ }
+
+ if (best_diff == UINT_MAX) {
+ log_debug("%s: could not find suitable PLL setup\n", __func__);
+ return -EINVAL;
+ }
+
+found:
+ priv->fbd = best_fbd;
+ priv->prd = best_prd;
+ priv->frs = frs;
+ priv->dsiclk = best_pll / 2;
+
+ return 0;
+}
+
+static void tc358768_setup_pll(struct udevice *dev)
+{
+ struct tc358768_priv *priv = dev_get_priv(dev);
+ u32 fbd, prd, frs;
+ int ret;
+
+ ret = tc358768_calc_pll(priv, &priv->timing);
+ if (ret)
+ log_debug("%s: PLL calculation failed: %d\n", __func__, ret);
+
+ fbd = priv->fbd;
+ prd = priv->prd;
+ frs = priv->frs;
+
+ log_debug("%s: PLL: refclk %lu, fbd %u, prd %u, frs %u\n", __func__,
+ clk_get_rate(priv->refclk), fbd, prd, frs);
+ log_debug("%s: PLL: pll_clk: %u, DSIClk %u, HSByteClk %u\n", __func__,
+ priv->dsiclk * 2, priv->dsiclk, priv->dsiclk / 4);
+
+ /* PRD[15:12] FBD[8:0] */
+ tc358768_write(dev, TC358768_PLLCTL0, ((prd - 1) << 12) | (fbd - 1));
+
+ /* FRS[11:10] LBWS[9:8] CKEN[4] RESETB[1] EN[0] */
+ tc358768_write(dev, TC358768_PLLCTL1,
+ (frs << 10) | (0x2 << 8) | BIT(1) | BIT(0));
+
+ /* wait for lock */
+ mdelay(5);
+
+ /* FRS[11:10] LBWS[9:8] CKEN[4] PLL_CKEN[4] RESETB[1] EN[0] */
+ tc358768_write(dev, TC358768_PLLCTL1,
+ (frs << 10) | (0x2 << 8) | BIT(4) | BIT(1) | BIT(0));
+}
+
+static u32 tc358768_ns_to_cnt(u32 ns, u32 period_ps)
+{
+ return DIV_ROUND_UP(ns * 1000, period_ps);
+}
+
+static u32 tc358768_ps_to_ns(u32 ps)
+{
+ return ps / 1000;
+}
+
+static u32 tc358768_dpi_to_ns(u32 val, u32 pclk)
+{
+ return (u32)div_u64((u64)val * NANO, pclk);
+}
+
+/* Convert value in DPI pixel clock units to DSI byte count */
+static u32 tc358768_dpi_to_dsi_bytes(struct tc358768_priv *priv, u32 val)
+{
+ u64 m = (u64)val * priv->dsiclk / 4 * priv->dsi_lanes;
+ u64 n = priv->timing.pixelclock.typ;
+
+ return (u32)div_u64(m + n - 1, n);
+}
+
+static u32 tc358768_dsi_bytes_to_ns(struct tc358768_priv *priv, u32 val)
+{
+ u64 m = (u64)val * NANO;
+ u64 n = priv->dsiclk / 4 * priv->dsi_lanes;
+
+ return (u32)div_u64(m, n);
+}
+
+static int tc358768_attach(struct udevice *dev)
+{
+ struct tc358768_priv *priv = dev_get_priv(dev);
+ struct mipi_dsi_device *device = &priv->device;
+ struct display_timing *dt = &priv->timing;
+ u32 val, val2, lptxcnt, hact, data_type;
+ s32 raw_val;
+ u32 hsbyteclk_ps, dsiclk_ps, ui_ps;
+ u32 dsiclk, hsbyteclk;
+ int i;
+ /* In pixelclock units */
+ u32 dpi_htot, dpi_data_start;
+ /* In byte units */
+ u32 dsi_dpi_htot, dsi_dpi_data_start;
+ u32 dsi_hsw, dsi_hbp, dsi_hact, dsi_hfp;
+ const u32 dsi_hss = 4; /* HSS is a short packet (4 bytes) */
+ /* In hsbyteclk units */
+ u32 dsi_vsdly;
+ const u32 internal_dly = 40;
+
+ if (device->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS) {
+ debug("%s: Non-continuous mode unimplemented, falling back to continuous\n", __func__);
+ device->mode_flags &= ~MIPI_DSI_CLOCK_NON_CONTINUOUS;
+ }
+
+ tc358768_hw_enable(priv);
+ tc358768_sw_reset(dev);
+
+ tc358768_setup_pll(dev);
+
+ dsiclk = priv->dsiclk;
+ hsbyteclk = dsiclk / 4;
+
+ /* Data Format Control Register */
+ val = BIT(2) | BIT(1) | BIT(0); /* rdswap_en | dsitx_en | txdt_en */
+ switch (device->format) {
+ case MIPI_DSI_FMT_RGB888:
+ val |= (0x3 << 4);
+ hact = dt->hactive.typ * 3;
+ data_type = MIPI_DSI_PACKED_PIXEL_STREAM_24;
+ break;
+ case MIPI_DSI_FMT_RGB666:
+ val |= (0x4 << 4);
+ hact = dt->hactive.typ * 3;
+ data_type = MIPI_DSI_PACKED_PIXEL_STREAM_18;
+ break;
+ case MIPI_DSI_FMT_RGB666_PACKED:
+ val |= (0x4 << 4) | BIT(3);
+ hact = dt->hactive.typ * 18 / 8;
+ data_type = MIPI_DSI_PIXEL_STREAM_3BYTE_18;
+ break;
+ case MIPI_DSI_FMT_RGB565:
+ val |= (0x5 << 4);
+ hact = dt->hactive.typ * 2;
+ data_type = MIPI_DSI_PACKED_PIXEL_STREAM_16;
+ break;
+ default:
+ log_debug("%s: Invalid data format (%u)\n",
+ __func__, device->format);
+ return -EINVAL;
+ }
+
+ /*
+ * There are three important things to make TC358768 work correctly,
+ * which are not trivial to manage:
+ *
+ * 1. Keep the DPI line-time and the DSI line-time as close to each
+ * other as possible.
+ * 2. TC358768 goes to LP mode after each line's active area. The DSI
+ * HFP period has to be long enough for entering and exiting LP mode.
+ * But it is not clear how to calculate this.
+ * 3. VSDly (video start delay) has to be long enough to ensure that the
+ * DSI TX does not start transmitting until we have started receiving
+ * pixel data from the DPI input. It is not clear how to calculate
+ * this either.
+ */
+
+ dpi_htot = dt->hactive.typ + dt->hfront_porch.typ +
+ dt->hsync_len.typ + dt->hback_porch.typ;
+ dpi_data_start = dt->hsync_len.typ + dt->hback_porch.typ;
+
+ log_debug("%s: dpi horiz timing (pclk): %u + %u + %u + %u = %u\n", __func__,
+ dt->hsync_len.typ, dt->hback_porch.typ, dt->hactive.typ,
+ dt->hfront_porch.typ, dpi_htot);
+
+ log_debug("%s: dpi horiz timing (ns): %u + %u + %u + %u = %u\n", __func__,
+ tc358768_dpi_to_ns(dt->hsync_len.typ, dt->pixelclock.typ),
+ tc358768_dpi_to_ns(dt->hback_porch.typ, dt->pixelclock.typ),
+ tc358768_dpi_to_ns(dt->hactive.typ, dt->pixelclock.typ),
+ tc358768_dpi_to_ns(dt->hfront_porch.typ, dt->pixelclock.typ),
+ tc358768_dpi_to_ns(dpi_htot, dt->pixelclock.typ));
+
+ log_debug("%s: dpi data start (ns): %u + %u = %u\n", __func__,
+ tc358768_dpi_to_ns(dt->hsync_len.typ, dt->pixelclock.typ),
+ tc358768_dpi_to_ns(dt->hback_porch.typ, dt->pixelclock.typ),
+ tc358768_dpi_to_ns(dpi_data_start, dt->pixelclock.typ));
+
+ dsi_dpi_htot = tc358768_dpi_to_dsi_bytes(priv, dpi_htot);
+ dsi_dpi_data_start = tc358768_dpi_to_dsi_bytes(priv, dpi_data_start);
+
+ if (device->mode_flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE) {
+ dsi_hsw = tc358768_dpi_to_dsi_bytes(priv, dt->hsync_len.typ);
+ dsi_hbp = tc358768_dpi_to_dsi_bytes(priv, dt->hback_porch.typ);
+ } else {
+ /* HBP is included in HSW in event mode */
+ dsi_hbp = 0;
+ dsi_hsw = tc358768_dpi_to_dsi_bytes(priv,
+ dt->hsync_len.typ +
+ dt->hback_porch.typ);
+
+ /*
+ * The pixel packet includes the actual pixel data, and:
+ * DSI packet header = 4 bytes
+ * DCS code = 1 byte
+ * DSI packet footer = 2 bytes
+ */
+ dsi_hact = hact + 4 + 1 + 2;
+
+ dsi_hfp = dsi_dpi_htot - dsi_hact - dsi_hsw - dsi_hss;
+
+ /*
+ * Here we should check if HFP is long enough for entering LP
+ * and exiting LP, but it's not clear how to calculate that.
+ * Instead, this is a naive algorithm that just adjusts the HFP
+ * and HSW so that HFP is (at least) roughly 2/3 of the total
+ * blanking time.
+ */
+ if (dsi_hfp < (dsi_hfp + dsi_hsw + dsi_hss) * 2 / 3) {
+ u32 old_hfp = dsi_hfp;
+ u32 old_hsw = dsi_hsw;
+ u32 tot = dsi_hfp + dsi_hsw + dsi_hss;
+
+ dsi_hsw = tot / 3;
+
+ /*
+ * Seems like sometimes HSW has to be divisible by num-lanes, but
+ * not always...
+ */
+ dsi_hsw = roundup(dsi_hsw, priv->dsi_lanes);
+
+ dsi_hfp = dsi_dpi_htot - dsi_hact - dsi_hsw - dsi_hss;
+
+ log_debug("%s: hfp too short, adjusting dsi hfp and dsi hsw from %u, %u to %u, %u\n",
+ __func__, old_hfp, old_hsw, dsi_hfp, dsi_hsw);
+ }
+
+ log_debug("%s: dsi horiz timing (bytes): %u, %u + %u + %u + %u = %u\n", __func__,
+ dsi_hss, dsi_hsw, dsi_hbp, dsi_hact, dsi_hfp,
+ dsi_hss + dsi_hsw + dsi_hbp + dsi_hact + dsi_hfp);
+
+ log_debug("%s: dsi horiz timing (ns): %u + %u + %u + %u + %u = %u\n", __func__,
+ tc358768_dsi_bytes_to_ns(priv, dsi_hss),
+ tc358768_dsi_bytes_to_ns(priv, dsi_hsw),
+ tc358768_dsi_bytes_to_ns(priv, dsi_hbp),
+ tc358768_dsi_bytes_to_ns(priv, dsi_hact),
+ tc358768_dsi_bytes_to_ns(priv, dsi_hfp),
+ tc358768_dsi_bytes_to_ns(priv, dsi_hss + dsi_hsw +
+ dsi_hbp + dsi_hact + dsi_hfp));
+ }
+
+ /* VSDly calculation */
+
+ /* Start with the HW internal delay */
+ dsi_vsdly = internal_dly;
+
+ /* Convert to byte units as the other variables are in byte units */
+ dsi_vsdly *= priv->dsi_lanes;
+
+ /* Do we need more delay, in addition to the internal? */
+ if (dsi_dpi_data_start > dsi_vsdly + dsi_hss + dsi_hsw + dsi_hbp) {
+ dsi_vsdly = dsi_dpi_data_start - dsi_hss - dsi_hsw - dsi_hbp;
+ dsi_vsdly = roundup(dsi_vsdly, priv->dsi_lanes);
+ }
+
+ log_debug("%s: dsi data start (bytes) %u + %u + %u + %u = %u\n", __func__,
+ dsi_vsdly, dsi_hss, dsi_hsw, dsi_hbp,
+ dsi_vsdly + dsi_hss + dsi_hsw + dsi_hbp);
+
+ log_debug("%s: dsi data start (ns) %u + %u + %u + %u = %u\n", __func__,
+ tc358768_dsi_bytes_to_ns(priv, dsi_vsdly),
+ tc358768_dsi_bytes_to_ns(priv, dsi_hss),
+ tc358768_dsi_bytes_to_ns(priv, dsi_hsw),
+ tc358768_dsi_bytes_to_ns(priv, dsi_hbp),
+ tc358768_dsi_bytes_to_ns(priv, dsi_vsdly + dsi_hss + dsi_hsw + dsi_hbp));
+
+ /* Convert back to hsbyteclk */
+ dsi_vsdly /= priv->dsi_lanes;
+
+ /*
+ * The docs say that there is an internal delay of 40 cycles.
+ * However, we get underflows if we follow that rule. If we
+ * instead ignore the internal delay, things work. So either
+ * the docs are wrong or the calculations are wrong.
+ *
+ * As a temporary fix, add the internal delay here, to counter
+ * the subtraction when writing the register.
+ */
+ dsi_vsdly += internal_dly;
+
+ /* Clamp to the register max */
+ if (dsi_vsdly - internal_dly > 0x3ff) {
+ log_warning("%s: VSDly too high, underflows likely\n", __func__);
+ dsi_vsdly = 0x3ff + internal_dly;
+ }
+
+ /* VSDly[9:0] */
+ tc358768_write(dev, TC358768_VSDLY, dsi_vsdly - internal_dly);
+
+ tc358768_write(dev, TC358768_DATAFMT, val);
+ tc358768_write(dev, TC358768_DSITX_DT, data_type);
+
+ /* Enable D-PHY (HiZ->LP11) */
+ tc358768_write(dev, TC358768_CLW_CNTRL, 0x0000);
+ /* Enable lanes */
+ for (i = 0; i < device->lanes; i++)
+ tc358768_write(dev, TC358768_D0W_CNTRL + i * 4, 0x0000);
+
+ /* Set up D-PHY CONTTX */
+ tc358768_write(dev, TC358768_CLW_DPHYCONTTX, 0x0203);
+ /* Adjust lanes */
+ for (i = 0; i < device->lanes; i++)
+ tc358768_write(dev, TC358768_D0W_DPHYCONTTX + i * 4, 0x0203);
+
+ /* DSI Timings */
+ hsbyteclk_ps = (u32)div_u64(PICO, hsbyteclk);
+ dsiclk_ps = (u32)div_u64(PICO, dsiclk);
+ ui_ps = dsiclk_ps / 2;
+ log_debug("%s: dsiclk: %u ps, ui %u ps, hsbyteclk %u ps\n",
+ __func__, dsiclk_ps, ui_ps, hsbyteclk_ps);
+
+ /* LP11 > 100us for D-PHY Rx Init */
+ val = tc358768_ns_to_cnt(100 * 1000, hsbyteclk_ps) - 1;
+ log_debug("%s: LINEINITCNT: 0x%x\n", __func__, val);
+ tc358768_write(dev, TC358768_LINEINITCNT, val);
+
+ /* LPTimeCnt > 50ns */
+ val = tc358768_ns_to_cnt(50, hsbyteclk_ps) - 1;
+ lptxcnt = val;
+ log_debug("%s: LPTXTIMECNT: 0x%x\n", __func__, val);
+ tc358768_write(dev, TC358768_LPTXTIMECNT, val);
+
+ /* 38ns < TCLK_PREPARE < 95ns */
+ val = tc358768_ns_to_cnt(65, hsbyteclk_ps) - 1;
+ log_debug("%s: TCLK_PREPARECNT: 0x%x\n", __func__, val);
+ /* TCLK_PREPARE + TCLK_ZERO > 300ns */
+ val2 = tc358768_ns_to_cnt(300 - tc358768_ps_to_ns(2 * ui_ps),
+ hsbyteclk_ps) - 2;
+ log_debug("%s: TCLK_ZEROCNT: 0x%x\n", __func__, val2);
+ val |= val2 << 8;
+ tc358768_write(dev, TC358768_TCLK_HEADERCNT, val);
+
+ /* TCLK_TRAIL > 60ns AND TEOT <= 105 ns + 12*UI */
+ raw_val = tc358768_ns_to_cnt(60 + tc358768_ps_to_ns(2 * ui_ps),
+ hsbyteclk_ps) - 5;
+ val = clamp(raw_val, 0, 127);
+ log_debug("%s: TCLK_TRAILCNT: 0x%x\n", __func__, val);
+ tc358768_write(dev, TC358768_TCLK_TRAILCNT, val);
+
+ /* 40ns + 4*UI < THS_PREPARE < 85ns + 6*UI */
+ val = 50 + tc358768_ps_to_ns(4 * ui_ps);
+ val = tc358768_ns_to_cnt(val, hsbyteclk_ps) - 1;
+ log_debug("%s: THS_PREPARECNT: 0x%x\n", __func__, val);
+ /* THS_PREPARE + THS_ZERO > 145ns + 10*UI */
+ raw_val = tc358768_ns_to_cnt(145 - tc358768_ps_to_ns(3 * ui_ps),
+ hsbyteclk_ps) - 10;
+ val2 = clamp(raw_val, 0, 127);
+ log_debug("%s: THS_ZEROCNT: 0x%x\n", __func__, val2);
+ val |= val2 << 8;
+ tc358768_write(dev, TC358768_THS_HEADERCNT, val);
+
+ /* TWAKEUP > 1ms in lptxcnt steps */
+ val = tc358768_ns_to_cnt(1020000, hsbyteclk_ps);
+ val = val / (lptxcnt + 1) - 1;
+ log_debug("%s: TWAKEUP: 0x%x\n", __func__, val);
+ tc358768_write(dev, TC358768_TWAKEUP, val);
+
+ /* TCLK_POSTCNT > 60ns + 52*UI */
+ val = tc358768_ns_to_cnt(60 + tc358768_ps_to_ns(52 * ui_ps),
+ hsbyteclk_ps) - 3;
+ log_debug("%s: TCLK_POSTCNT: 0x%x\n", __func__, val);
+ tc358768_write(dev, TC358768_TCLK_POSTCNT, val);
+
+ /* max(60ns + 4*UI, 8*UI) < THS_TRAILCNT < 105ns + 12*UI */
+ raw_val = tc358768_ns_to_cnt(60 + tc358768_ps_to_ns(18 * ui_ps),
+ hsbyteclk_ps) - 4;
+ val = clamp(raw_val, 0, 15);
+ log_debug("%s: THS_TRAILCNT: 0x%x\n", __func__, val);
+ tc358768_write(dev, TC358768_THS_TRAILCNT, val);
+
+ val = BIT(0);
+ for (i = 0; i < device->lanes; i++)
+ val |= BIT(i + 1);
+ tc358768_write(dev, TC358768_HSTXVREGEN, val);
+
+ tc358768_write(dev, TC358768_TXOPTIONCNTRL,
+ (device->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS) ? 0 : BIT(0));
+
+ /* TXTAGOCNT[26:16] RXTASURECNT[10:0] */
+ val = tc358768_ps_to_ns((lptxcnt + 1) * hsbyteclk_ps * 4);
+ val = tc358768_ns_to_cnt(val, hsbyteclk_ps) / 4 - 1;
+ log_debug("%s: TXTAGOCNT: 0x%x\n", __func__, val);
+ val2 = tc358768_ns_to_cnt(tc358768_ps_to_ns((lptxcnt + 1) * hsbyteclk_ps),
+ hsbyteclk_ps) - 2;
+ log_debug("%s: RXTASURECNT: 0x%x\n", __func__, val2);
+ val = val << 16 | val2;
+ tc358768_write(dev, TC358768_BTACNTRL1, val);
+
+ /* START[0] */
+ tc358768_write(dev, TC358768_STARTCNTRL, 1);
+
+ if (device->mode_flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE) {
+ /* Set pulse mode */
+ tc358768_write(dev, TC358768_DSI_EVENT, 0);
+
+ /* vact */
+ tc358768_write(dev, TC358768_DSI_VACT, dt->vactive.typ);
+ /* vsw */
+ tc358768_write(dev, TC358768_DSI_VSW, dt->vsync_len.typ);
+ /* vbp */
+ tc358768_write(dev, TC358768_DSI_VBPR, dt->vback_porch.typ);
+ } else {
+ /* Set event mode */
+ tc358768_write(dev, TC358768_DSI_EVENT, 1);
+
+ /* vact */
+ tc358768_write(dev, TC358768_DSI_VACT, dt->vactive.typ);
+
+ /* vsw (+ vbp) */
+ tc358768_write(dev, TC358768_DSI_VSW,
+ dt->vsync_len.typ + dt->vback_porch.typ);
+ /* vbp (not used in event mode) */
+ tc358768_write(dev, TC358768_DSI_VBPR, 0);
+ }
+
+ /* hsw (bytes) */
+ tc358768_write(dev, TC358768_DSI_HSW, dsi_hsw);
+
+ /* hbp (bytes) */
+ tc358768_write(dev, TC358768_DSI_HBPR, dsi_hbp);
+
+ /* hact (bytes) */
+ tc358768_write(dev, TC358768_DSI_HACT, hact);
+
+ /* VSYNC polarity */
+ tc358768_update_bits(dev, TC358768_CONFCTL, BIT(5),
+ (dt->flags & DISPLAY_FLAGS_VSYNC_HIGH) ? BIT(5) : 0);
+
+ /* HSYNC polarity */
+ tc358768_update_bits(dev, TC358768_PP_MISC, BIT(0),
+ (dt->flags & DISPLAY_FLAGS_HSYNC_LOW) ? BIT(0) : 0);
+
+ /* Start DSI Tx */
+ tc358768_write(dev, TC358768_DSI_START, 0x1);
+
+ /* Configure DSI_Control register */
+ val = TC358768_DSI_CONFW_MODE_CLR | TC358768_DSI_CONFW_ADDR_DSI_CONTROL;
+ val |= TC358768_DSI_CONTROL_TXMD | TC358768_DSI_CONTROL_HSCKMD |
+ 0x3 << 1 | TC358768_DSI_CONTROL_EOTDIS;
+ tc358768_write(dev, TC358768_DSI_CONFW, val);
+
+ val = TC358768_DSI_CONFW_MODE_SET | TC358768_DSI_CONFW_ADDR_DSI_CONTROL;
+ val |= (device->lanes - 1) << 1;
+
+ val |= TC358768_DSI_CONTROL_TXMD;
+
+ if (!(device->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS))
+ val |= TC358768_DSI_CONTROL_HSCKMD;
+
+ /*
+ * TODO: Actually MIPI_DSI_MODE_NO_EOT_PACKET
+ *
+ * Many of the DSI flags have names opposite to their
+ * actual effects, e.g. MIPI_DSI_MODE_EOT_PACKET means
+ * that EoT packets will actually be disabled.
+ */
+ if (device->mode_flags & MIPI_DSI_MODE_EOT_PACKET)
+ val |= TC358768_DSI_CONTROL_EOTDIS;
+
+ tc358768_write(dev, TC358768_DSI_CONFW, val);
+
+ val = TC358768_DSI_CONFW_MODE_CLR |
+ TC358768_DSI_CONFW_ADDR_DSI_CONTROL |
+ TC358768_DSI_CONTROL_DIS_MODE; /* DSI mode */
+ tc358768_write(dev, TC358768_DSI_CONFW, val);
+
+ /* clear FrmStop and RstPtr */
+ tc358768_update_bits(dev, TC358768_PP_MISC, 0x3 << 14, 0);
+
+ /* set PP_en */
+ tc358768_update_bits(dev, TC358768_CONFCTL, BIT(6), BIT(6));
+
+ /* Set up panel configuration */
+ return panel_enable_backlight(priv->panel);
+}
+
+static int tc358768_set_backlight(struct udevice *dev, int percent)
+{
+ struct tc358768_priv *priv = dev_get_priv(dev);
+
+ return panel_set_backlight(priv->panel, percent);
+}
+
+static int tc358768_panel_timings(struct udevice *dev,
+ struct display_timing *timing)
+{
+ struct tc358768_priv *priv = dev_get_priv(dev);
+
+ /* Default to positive sync */
+
+ if (!(priv->timing.flags &
+ (DISPLAY_FLAGS_HSYNC_LOW | DISPLAY_FLAGS_HSYNC_HIGH)))
+ priv->timing.flags |= DISPLAY_FLAGS_HSYNC_HIGH;
+
+ if (!(priv->timing.flags &
+ (DISPLAY_FLAGS_VSYNC_LOW | DISPLAY_FLAGS_VSYNC_HIGH)))
+ priv->timing.flags |= DISPLAY_FLAGS_VSYNC_HIGH;
+
+ memcpy(timing, &priv->timing, sizeof(*timing));
+
+ return 0;
+}
+
+static int tc358768_setup(struct udevice *dev)
+{
+ struct tc358768_priv *priv = dev_get_priv(dev);
+ struct mipi_dsi_device *device = &priv->device;
+ struct mipi_dsi_panel_plat *mipi_plat;
+ int ret;
+
+ /* The bridge uses 16 bit registers */
+ ret = i2c_set_chip_offset_len(dev, 2);
+ if (ret) {
+ log_debug("%s: set_chip_offset_len failed: %d\n",
+ __func__, ret);
+ return ret;
+ }
+
+ ret = uclass_get_device_by_phandle(UCLASS_PANEL, dev,
+ "panel", &priv->panel);
+ if (ret) {
+ log_debug("%s: Cannot get panel: ret=%d\n", __func__, ret);
+ return log_ret(ret);
+ }
+
+ panel_get_display_timing(priv->panel, &priv->timing);
+
+ mipi_plat = dev_get_plat(priv->panel);
+ mipi_plat->device = device;
+
+ priv->host.dev = (struct device *)dev;
+ priv->host.ops = &tc358768_dsi_host_ops;
+
+ device->host = &priv->host;
+ device->lanes = mipi_plat->lanes;
+ device->format = mipi_plat->format;
+ device->mode_flags = mipi_plat->mode_flags;
+
+ priv->pd_lines = mipi_dsi_pixel_format_to_bpp(device->format);
+ priv->dsi_lanes = device->lanes;
+
+ /* get regulators */
+ ret = device_get_supply_regulator(dev, "vddc-supply", &priv->vddc);
+ if (ret) {
+ log_debug("%s: vddc regulator error: %d\n", __func__, ret);
+ if (ret != -ENOENT)
+ return log_ret(ret);
+ }
+
+ ret = device_get_supply_regulator(dev, "vddmipi-supply", &priv->vddmipi);
+ if (ret) {
+ log_debug("%s: vddmipi regulator error: %d\n", __func__, ret);
+ if (ret != -ENOENT)
+ return log_ret(ret);
+ }
+
+ ret = device_get_supply_regulator(dev, "vddio-supply", &priv->vddio);
+ if (ret) {
+ log_debug("%s: vddio regulator error: %d\n", __func__, ret);
+ if (ret != -ENOENT)
+ return log_ret(ret);
+ }
+
+ /* get clk */
+ priv->refclk = devm_clk_get(dev, "refclk");
+ if (IS_ERR(priv->refclk)) {
+ log_debug("%s: Could not get refclk: %ld\n",
+ __func__, PTR_ERR(priv->refclk));
+ return PTR_ERR(priv->refclk);
+ }
+
+ /* get gpios */
+ ret = gpio_request_by_name(dev, "reset-gpios", 0,
+ &priv->reset_gpio, GPIOD_IS_OUT);
+ if (ret) {
+ log_debug("%s: Could not decode reset-gpios (%d)\n", __func__, ret);
+ return ret;
+ }
+
+ dm_gpio_set_value(&priv->reset_gpio, 1);
+
+ return 0;
+}
+
+static int tc358768_probe(struct udevice *dev)
+{
+ if (device_get_uclass_id(dev->parent) != UCLASS_I2C)
+ return -EPROTONOSUPPORT;
+
+ return tc358768_setup(dev);
+}
+
+struct panel_ops tc358768_ops = {
+ .enable_backlight = tc358768_attach,
+ .set_backlight = tc358768_set_backlight,
+ .get_display_timing = tc358768_panel_timings,
+};
+
+static const struct udevice_id tc358768_ids[] = {
+ { .compatible = "toshiba,tc358768" },
+ { .compatible = "toshiba,tc358778" },
+ { }
+};
+
+U_BOOT_DRIVER(tc358768) = {
+ .name = "tc358768",
+ .id = UCLASS_PANEL,
+ .of_match = tc358768_ids,
+ .ops = &tc358768_ops,
+ .probe = tc358768_probe,
+ .priv_auto = sizeof(struct tc358768_priv),
+};
diff --git a/drivers/video/bridge/video-bridge-uclass.c b/drivers/video/bridge/video-bridge-uclass.c
index f389bc6..2084a2e 100644
--- a/drivers/video/bridge/video-bridge-uclass.c
+++ b/drivers/video/bridge/video-bridge-uclass.c
@@ -6,7 +6,6 @@
#define LOG_CATEGORY UCLASS_VIDEO_BRIDGE
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <edid.h>
diff --git a/drivers/video/broadwell_igd.c b/drivers/video/broadwell_igd.c
index 83b6c90..a26154a 100644
--- a/drivers/video/broadwell_igd.c
+++ b/drivers/video/broadwell_igd.c
@@ -5,12 +5,12 @@
* Copyright (C) 2016 Google, Inc
*/
-#include <common.h>
#include <bios_emul.h>
#include <bootstage.h>
#include <dm.h>
#include <init.h>
#include <log.h>
+#include <time.h>
#include <vesa.h>
#include <video.h>
#include <asm/cpu.h>
diff --git a/drivers/video/console_normal.c b/drivers/video/console_normal.c
index 34ef5a5..6f4194a 100644
--- a/drivers/video/console_normal.c
+++ b/drivers/video/console_normal.c
@@ -6,7 +6,6 @@
* (C) Copyright 2023 Dzmitry Sankouski <dsankouski@gmail.com>
*/
-#include <common.h>
#include <charset.h>
#include <dm.h>
#include <video.h>
diff --git a/drivers/video/console_rotate.c b/drivers/video/console_rotate.c
index e4303df..dc96983 100644
--- a/drivers/video/console_rotate.c
+++ b/drivers/video/console_rotate.c
@@ -6,7 +6,6 @@
* (C) Copyright 2023 Dzmitry Sankouski <dsankouski@gmail.com>
*/
-#include <common.h>
#include <charset.h>
#include <dm.h>
#include <video.h>
diff --git a/drivers/video/console_truetype.c b/drivers/video/console_truetype.c
index 362458a..c435162 100644
--- a/drivers/video/console_truetype.c
+++ b/drivers/video/console_truetype.c
@@ -3,11 +3,11 @@
* Copyright (c) 2016 Google, Inc
*/
-#include <common.h>
#include <abuf.h>
#include <dm.h>
#include <log.h>
#include <malloc.h>
+#include <spl.h>
#include <video.h>
#include <video_console.h>
@@ -802,6 +802,9 @@
struct console_tt_store store;
const uint size = sizeof(store);
+ if (spl_phase() <= PHASE_SPL)
+ return -ENOSYS;
+
/*
* store the whole priv structure as it is simpler that picking out
* what we need
@@ -823,6 +826,9 @@
struct console_tt_priv *priv = dev_get_priv(dev);
struct console_tt_store store;
+ if (spl_phase() <= PHASE_SPL)
+ return -ENOSYS;
+
memcpy(&store, abuf_data(buf), sizeof(store));
vc_priv->xcur_frac = store.cur.xpos_frac;
@@ -847,6 +853,9 @@
uint out, val;
int ret;
+ if (spl_phase() <= PHASE_SPL)
+ return -ENOSYS;
+
if (!visible)
return 0;
diff --git a/drivers/video/coreboot.c b/drivers/video/coreboot.c
index 5b718ae..9aede26 100644
--- a/drivers/video/coreboot.c
+++ b/drivers/video/coreboot.c
@@ -3,7 +3,6 @@
* Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
*/
-#include <common.h>
#include <dm.h>
#include <init.h>
#include <vesa.h>
diff --git a/drivers/video/display-uclass.c b/drivers/video/display-uclass.c
index 2da3d1d..61a73e1 100644
--- a/drivers/video/display-uclass.c
+++ b/drivers/video/display-uclass.c
@@ -5,7 +5,6 @@
#define LOG_CATEGORY UCLASS_DISPLAY
-#include <common.h>
#include <dm.h>
#include <display.h>
#include <edid.h>
diff --git a/drivers/video/dsi-host-uclass.c b/drivers/video/dsi-host-uclass.c
index 6e5256e..fde275a 100644
--- a/drivers/video/dsi-host-uclass.c
+++ b/drivers/video/dsi-host-uclass.c
@@ -7,7 +7,6 @@
#define LOG_CATEGORY UCLASS_DSI_HOST
-#include <common.h>
#include <dm.h>
#include <dsi_host.h>
diff --git a/drivers/video/dw_hdmi.c b/drivers/video/dw_hdmi.c
index c4fbb18..35559ce 100644
--- a/drivers/video/dw_hdmi.c
+++ b/drivers/video/dw_hdmi.c
@@ -5,13 +5,14 @@
* Copyright 2017 Jernej Skrabec <jernej.skrabec@siol.net>
*/
-#include <common.h>
#include <fdtdec.h>
#include <log.h>
#include <asm/io.h>
#include <i2c.h>
#include <media_bus_format.h>
+#include <time.h>
#include <linux/delay.h>
+#include <linux/errno.h>
#include "dw_hdmi.h"
struct tmds_n_cts {
@@ -78,10 +79,10 @@
{
switch (hdmi->reg_io_width) {
case 1:
- writeb(val, hdmi->ioaddr + offset);
+ writeb(val, (void *)(hdmi->ioaddr + offset));
break;
case 4:
- writel(val, hdmi->ioaddr + (offset << 2));
+ writel(val, (void *)(hdmi->ioaddr + (offset << 2)));
break;
default:
debug("reg_io_width has unsupported width!\n");
@@ -93,9 +94,9 @@
{
switch (hdmi->reg_io_width) {
case 1:
- return readb(hdmi->ioaddr + offset);
+ return readb((void *)(hdmi->ioaddr + offset));
case 4:
- return readl(hdmi->ioaddr + (offset << 2));
+ return readl((void *)(hdmi->ioaddr + (offset << 2)));
default:
debug("reg_io_width has unsupported width!\n");
break;
@@ -936,6 +937,22 @@
return -1;
}
+int dw_hdmi_detect_hpd(struct dw_hdmi *hdmi)
+{
+ int ret;
+
+ ret = dw_hdmi_phy_wait_for_hpd(hdmi);
+ if (ret < 0) {
+ debug("hdmi can not get hpd signal\n");
+ return -ENODEV;
+ }
+
+ if (hdmi->ops && hdmi->ops->read_hpd)
+ hdmi->ops->read_hpd(hdmi, true);
+
+ return 0;
+}
+
void dw_hdmi_phy_init(struct dw_hdmi *hdmi)
{
/* enable phy i2cm done irq */
@@ -988,7 +1005,7 @@
hdmi_av_composer(hdmi, edid);
- ret = hdmi->phy_set(hdmi, edid->pixelclock.typ);
+ ret = hdmi->ops->phy_set(hdmi, edid->pixelclock.typ);
if (ret)
return ret;
@@ -1009,10 +1026,18 @@
return 0;
}
+static const struct dw_hdmi_phy_ops dw_hdmi_synopsys_phy_ops = {
+ .phy_set = dw_hdmi_phy_cfg,
+};
+
void dw_hdmi_init(struct dw_hdmi *hdmi)
{
uint ih_mute;
+ /* hook Synopsys PHYs ops */
+ if (!hdmi->ops)
+ hdmi->ops = &dw_hdmi_synopsys_phy_ops;
+
/*
* boot up defaults are:
* hdmi_ih_mute = 0x03 (disabled)
@@ -1037,4 +1062,7 @@
/* enable i2c client nack % arbitration error irq */
hdmi_write(hdmi, ~0x44, HDMI_I2CM_CTLINT);
+
+ if (hdmi->ops && hdmi->ops->setup_hpd)
+ hdmi->ops->setup_hpd(hdmi);
}
diff --git a/drivers/video/dw_mipi_dsi.c b/drivers/video/dw_mipi_dsi.c
index a7e0784..c74fe67 100644
--- a/drivers/video/dw_mipi_dsi.c
+++ b/drivers/video/dw_mipi_dsi.c
@@ -9,7 +9,6 @@
* the Linux Kernel driver drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c.
*/
-#include <common.h>
#include <clk.h>
#include <dsi_host.h>
#include <dm.h>
diff --git a/drivers/video/efi.c b/drivers/video/efi.c
index 28ac15f..78d123f 100644
--- a/drivers/video/efi.c
+++ b/drivers/video/efi.c
@@ -7,7 +7,6 @@
#define LOG_CATEGORY LOGC_EFI
-#include <common.h>
#include <dm.h>
#include <efi_api.h>
#include <log.h>
diff --git a/drivers/video/endeavoru-panel.c b/drivers/video/endeavoru-panel.c
index 79a2721..d4ba4d8 100644
--- a/drivers/video/endeavoru-panel.c
+++ b/drivers/video/endeavoru-panel.c
@@ -3,7 +3,6 @@
* Copyright (c) 2022 Svyatoslav Ryhel <clamor95@gmail.com>
*/
-#include <common.h>
#include <backlight.h>
#include <dm.h>
#include <panel.h>
@@ -57,61 +56,8 @@
static int endeavoru_panel_enable_backlight(struct udevice *dev)
{
- struct endeavoru_panel_priv *priv = dev_get_priv(dev);
- int ret;
-
- ret = dm_gpio_set_value(&priv->reset_gpio, 1);
- if (ret) {
- log_err("error changing reset-gpios (%d)\n", ret);
- return ret;
- }
- mdelay(5);
-
- ret = regulator_set_enable_if_allowed(priv->vddio, 1);
- if (ret) {
- log_err("error enabling iovcc-supply (%d)\n", ret);
- return ret;
- }
- mdelay(1);
-
- ret = regulator_set_enable_if_allowed(priv->vdd, 1);
- if (ret) {
- log_err("error enabling vcc-supply (%d)\n", ret);
- return ret;
- }
- mdelay(20);
-
- ret = dm_gpio_set_value(&priv->reset_gpio, 0);
- if (ret) {
- log_err("error changing reset-gpios (%d)\n", ret);
- return ret;
- }
- mdelay(2);
-
- /* Reset panel */
- ret = dm_gpio_set_value(&priv->reset_gpio, 1);
- if (ret) {
- log_err("error changing reset-gpios (%d)\n", ret);
- return ret;
- }
- mdelay(1);
-
- ret = dm_gpio_set_value(&priv->reset_gpio, 0);
- if (ret) {
- log_err("error changing reset-gpios (%d)\n", ret);
- return ret;
- }
- mdelay(25);
-
- return 0;
-}
-
-static int endeavoru_panel_set_backlight(struct udevice *dev, int percent)
-{
- struct endeavoru_panel_priv *priv = dev_get_priv(dev);
struct mipi_dsi_panel_plat *plat = dev_get_plat(dev);
struct mipi_dsi_device *dsi = plat->device;
- int ret;
dcs_write_one(dsi, 0xc2, 0x08);
@@ -160,18 +106,22 @@
dcs_write_one(dsi, 0x55, 0x80);
dcs_write_one(dsi, 0x5e, 0x06);
+ /* Set backlight */
+ dcs_write_one(dsi, 0x51, 0x96);
+
+ return 0;
+}
+
+static int endeavoru_panel_set_backlight(struct udevice *dev, int percent)
+{
+ struct endeavoru_panel_priv *priv = dev_get_priv(dev);
+ int ret;
+
ret = backlight_enable(priv->backlight);
if (ret)
return ret;
- /* Set backlight */
- dcs_write_one(dsi, 0x51, 0x96);
-
- ret = backlight_set_brightness(priv->backlight, percent);
- if (ret)
- return ret;
-
- return 0;
+ return backlight_set_brightness(priv->backlight, percent);
}
static int endeavoru_panel_timings(struct udevice *dev,
@@ -217,6 +167,63 @@
return 0;
}
+static int endeavoru_panel_hw_init(struct udevice *dev)
+{
+ struct endeavoru_panel_priv *priv = dev_get_priv(dev);
+ int ret;
+
+ ret = dm_gpio_set_value(&priv->reset_gpio, 1);
+ if (ret) {
+ log_debug("%s: error changing reset-gpios (%d)\n",
+ __func__, ret);
+ return ret;
+ }
+ mdelay(5);
+
+ ret = regulator_set_enable_if_allowed(priv->vddio, 1);
+ if (ret) {
+ log_debug("%s: error enabling iovcc-supply (%d)\n",
+ __func__, ret);
+ return ret;
+ }
+ mdelay(1);
+
+ ret = regulator_set_enable_if_allowed(priv->vdd, 1);
+ if (ret) {
+ log_debug("%s: error enabling vcc-supply (%d)\n",
+ __func__, ret);
+ return ret;
+ }
+ mdelay(20);
+
+ ret = dm_gpio_set_value(&priv->reset_gpio, 0);
+ if (ret) {
+ log_debug("%s: error changing reset-gpios (%d)\n",
+ __func__, ret);
+ return ret;
+ }
+ mdelay(2);
+
+ /* Reset panel */
+ ret = dm_gpio_set_value(&priv->reset_gpio, 1);
+ if (ret) {
+ log_debug("%s: error changing reset-gpios (%d)\n",
+ __func__, ret);
+ return ret;
+ }
+ mdelay(1);
+
+ ret = dm_gpio_set_value(&priv->reset_gpio, 0);
+ if (ret) {
+ log_debug("%s: error changing reset-gpios (%d)\n",
+ __func__, ret);
+ return ret;
+ }
+ mdelay(25);
+
+ return 0;
+}
+
static int endeavoru_panel_probe(struct udevice *dev)
{
struct mipi_dsi_panel_plat *plat = dev_get_plat(dev);
@@ -226,7 +233,7 @@
plat->format = MIPI_DSI_FMT_RGB888;
plat->mode_flags = MIPI_DSI_MODE_VIDEO;
- return 0;
+ return endeavoru_panel_hw_init(dev);
}
static const struct panel_ops endeavoru_panel_ops = {
diff --git a/drivers/video/exynos/exynos_dp.c b/drivers/video/exynos/exynos_dp.c
index 59838da..b0afb23 100644
--- a/drivers/video/exynos/exynos_dp.c
+++ b/drivers/video/exynos/exynos_dp.c
@@ -5,7 +5,6 @@
* Author: Donghwa Lee <dh09.lee@samsung.com>
*/
-#include <common.h>
#include <dm.h>
#include <display.h>
#include <fdtdec.h>
diff --git a/drivers/video/exynos/exynos_dp_lowlevel.c b/drivers/video/exynos/exynos_dp_lowlevel.c
index ae500a7..f007b31 100644
--- a/drivers/video/exynos/exynos_dp_lowlevel.c
+++ b/drivers/video/exynos/exynos_dp_lowlevel.c
@@ -6,7 +6,6 @@
*/
#include <config.h>
-#include <common.h>
#include <log.h>
#include <linux/delay.h>
#include <linux/err.h>
diff --git a/drivers/video/exynos/exynos_fb.c b/drivers/video/exynos/exynos_fb.c
index 86970a6..0407a3f 100644
--- a/drivers/video/exynos/exynos_fb.c
+++ b/drivers/video/exynos/exynos_fb.c
@@ -7,7 +7,6 @@
*/
#include <config.h>
-#include <common.h>
#include <display.h>
#include <div64.h>
#include <dm.h>
diff --git a/drivers/video/exynos/exynos_mipi_dsi.c b/drivers/video/exynos/exynos_mipi_dsi.c
index 804fcd0..edeb0a8 100644
--- a/drivers/video/exynos/exynos_mipi_dsi.c
+++ b/drivers/video/exynos/exynos_mipi_dsi.c
@@ -6,7 +6,6 @@
* Author: Donghwa Lee <dh09.lee@samsung.com>
*/
-#include <common.h>
#include <log.h>
#include <malloc.h>
#include <fdtdec.h>
diff --git a/drivers/video/exynos/exynos_mipi_dsi_common.c b/drivers/video/exynos/exynos_mipi_dsi_common.c
index be67ceb..fc2767a 100644
--- a/drivers/video/exynos/exynos_mipi_dsi_common.c
+++ b/drivers/video/exynos/exynos_mipi_dsi_common.c
@@ -6,7 +6,6 @@
* Author: Donghwa Lee <dh09.lee@samsung.com>
*/
-#include <common.h>
#include <log.h>
#include <linux/delay.h>
#include <linux/err.h>
diff --git a/drivers/video/exynos/exynos_mipi_dsi_lowlevel.c b/drivers/video/exynos/exynos_mipi_dsi_lowlevel.c
index 8111acd..9f18b5d 100644
--- a/drivers/video/exynos/exynos_mipi_dsi_lowlevel.c
+++ b/drivers/video/exynos/exynos_mipi_dsi_lowlevel.c
@@ -6,7 +6,6 @@
* Author: Donghwa Lee <dh09.lee@samsung.com>
*/
-#include <common.h>
#include <asm/arch/dsim.h>
#include <asm/arch/mipi_dsim.h>
#include <asm/arch/power.h>
diff --git a/drivers/video/himax-hx8394.c b/drivers/video/himax-hx8394.c
index 63637b4..cb7f93e 100644
--- a/drivers/video/himax-hx8394.c
+++ b/drivers/video/himax-hx8394.c
@@ -2,7 +2,6 @@
/*
* Copyright (C) 2022 Ondrej Jirman <megi@xff.cz>
*/
-#include <common.h>
#include <backlight.h>
#include <dm.h>
#include <mipi_dsi.h>
diff --git a/drivers/video/hitachi_tx18d42vm_lcd.c b/drivers/video/hitachi_tx18d42vm_lcd.c
index 95984fe..68f7b75 100644
--- a/drivers/video/hitachi_tx18d42vm_lcd.c
+++ b/drivers/video/hitachi_tx18d42vm_lcd.c
@@ -5,7 +5,6 @@
* (C) Copyright 2015 Hans de Goede <hdegoede@redhat.com>
*/
-#include <common.h>
#include <malloc.h>
#include <linux/delay.h>
diff --git a/drivers/video/hx8238d.c b/drivers/video/hx8238d.c
index 6ee97cb..2491a32 100644
--- a/drivers/video/hx8238d.c
+++ b/drivers/video/hx8238d.c
@@ -12,7 +12,6 @@
*
*/
-#include <common.h>
#include <dm.h>
#include <panel.h>
#include <spi.h>
diff --git a/drivers/video/ihs_video_out.c b/drivers/video/ihs_video_out.c
index 73b8f4b..bf4d499 100644
--- a/drivers/video/ihs_video_out.c
+++ b/drivers/video/ihs_video_out.c
@@ -9,7 +9,6 @@
* Dirk Eibach, Guntermann & Drunck GmbH, dirk.eibach@gdsys.de
*/
-#include <common.h>
#include <display.h>
#include <dm.h>
#include <log.h>
diff --git a/drivers/video/imx/ipu_common.c b/drivers/video/imx/ipu_common.c
index b0a99c9..d582fb8 100644
--- a/drivers/video/imx/ipu_common.c
+++ b/drivers/video/imx/ipu_common.c
@@ -11,7 +11,7 @@
*/
/* #define DEBUG */
-#include <common.h>
+#include <config.h>
#include <log.h>
#include <linux/delay.h>
#include <linux/types.h>
diff --git a/drivers/video/imx/ipu_disp.c b/drivers/video/imx/ipu_disp.c
index 144322e..aaba7d1 100644
--- a/drivers/video/imx/ipu_disp.c
+++ b/drivers/video/imx/ipu_disp.c
@@ -12,7 +12,6 @@
/* #define DEBUG */
-#include <common.h>
#include <log.h>
#include <linux/delay.h>
#include <linux/types.h>
diff --git a/drivers/video/imx/mxc_ipuv3_fb.c b/drivers/video/imx/mxc_ipuv3_fb.c
index 7e60385..039b220 100644
--- a/drivers/video/imx/mxc_ipuv3_fb.c
+++ b/drivers/video/imx/mxc_ipuv3_fb.c
@@ -10,7 +10,6 @@
* (C) Copyright 2004-2010 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <log.h>
#include <part.h>
#include <asm/cache.h>
diff --git a/drivers/video/ivybridge_igd.c b/drivers/video/ivybridge_igd.c
index c2cc976..ad68864 100644
--- a/drivers/video/ivybridge_igd.c
+++ b/drivers/video/ivybridge_igd.c
@@ -3,7 +3,6 @@
* Copyright (C) 2016 Google, Inc
*/
-#include <common.h>
#include <bios_emul.h>
#include <dm.h>
#include <errno.h>
diff --git a/drivers/video/lg-ld070wx3.c b/drivers/video/lg-ld070wx3.c
new file mode 100644
index 0000000..610a06f
--- /dev/null
+++ b/drivers/video/lg-ld070wx3.c
@@ -0,0 +1,186 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * LG LD070WX3-SL01 DSI panel driver
+ *
+ * Copyright (c) 2023 Svyatoslav Ryhel <clamor95@gmail.com>
+ */
+
+#include <backlight.h>
+#include <dm.h>
+#include <panel.h>
+#include <log.h>
+#include <mipi_dsi.h>
+#include <linux/delay.h>
+#include <power/regulator.h>
+
+struct lg_ld070wx3_priv {
+ struct udevice *vdd;
+ struct udevice *vcc;
+
+ struct udevice *backlight;
+};
+
+static struct display_timing default_timing = {
+ .pixelclock.typ = 70000000,
+ .hactive.typ = 800,
+ .hfront_porch.typ = 32,
+ .hback_porch.typ = 48,
+ .hsync_len.typ = 8,
+ .vactive.typ = 1280,
+ .vfront_porch.typ = 5,
+ .vback_porch.typ = 3,
+ .vsync_len.typ = 1,
+};
+
+static void dcs_write_one(struct mipi_dsi_device *dsi, u8 cmd, u8 data)
+{
+ mipi_dsi_dcs_write(dsi, cmd, &data, 1);
+}
+
+static int lg_ld070wx3_enable_backlight(struct udevice *dev)
+{
+ struct mipi_dsi_panel_plat *plat = dev_get_plat(dev);
+ struct mipi_dsi_device *dsi = plat->device;
+ int ret;
+
+ ret = mipi_dsi_dcs_soft_reset(dsi);
+ if (ret < 0) {
+ log_debug("%s: failed to soft reset panel: %d\n",
+ __func__, ret);
+ return ret;
+ }
+
+ /* Delay before sending new command after soft reset */
+ mdelay(20);
+
+ /* Differential input impedance selection */
+ dcs_write_one(dsi, 0xAE, 0x0B);
+
+ /* Enter test mode 1 and 2*/
+ dcs_write_one(dsi, 0xEE, 0xEA);
+ dcs_write_one(dsi, 0xEF, 0x5F);
+
+ /* Increased MIPI CLK driving ability */
+ dcs_write_one(dsi, 0xF2, 0x68);
+
+ /* Exit test mode 1 and 2 */
+ dcs_write_one(dsi, 0xEE, 0x00);
+ dcs_write_one(dsi, 0xEF, 0x00);
+
+ return 0;
+}
+
+static int lg_ld070wx3_set_backlight(struct udevice *dev, int percent)
+{
+ struct lg_ld070wx3_priv *priv = dev_get_priv(dev);
+ int ret;
+
+ ret = backlight_enable(priv->backlight);
+ if (ret)
+ return ret;
+
+ return backlight_set_brightness(priv->backlight, percent);
+}
+
+static int lg_ld070wx3_timings(struct udevice *dev,
+ struct display_timing *timing)
+{
+ memcpy(timing, &default_timing, sizeof(*timing));
+ return 0;
+}
+
+static int lg_ld070wx3_of_to_plat(struct udevice *dev)
+{
+ struct lg_ld070wx3_priv *priv = dev_get_priv(dev);
+ int ret;
+
+ ret = uclass_get_device_by_phandle(UCLASS_PANEL_BACKLIGHT, dev,
+ "backlight", &priv->backlight);
+ if (ret) {
+ log_debug("%s: cannot get backlight: ret = %d\n",
+ __func__, ret);
+ return ret;
+ }
+
+ ret = uclass_get_device_by_phandle(UCLASS_REGULATOR, dev,
+ "vdd-supply", &priv->vdd);
+ if (ret) {
+ log_debug("%s: cannot get vdd-supply: ret = %d\n",
+ __func__, ret);
+ return ret;
+ }
+
+ ret = uclass_get_device_by_phandle(UCLASS_REGULATOR, dev,
+ "vcc-supply", &priv->vcc);
+ if (ret) {
+ log_debug("%s: cannot get vcc-supply: ret = %d\n",
+ __func__, ret);
+ return ret;
+ }
+
+ return 0;
+}
+
+static int lg_ld070wx3_hw_init(struct udevice *dev)
+{
+ struct lg_ld070wx3_priv *priv = dev_get_priv(dev);
+ int ret;
+
+ ret = regulator_set_enable_if_allowed(priv->vcc, 1);
+ if (ret) {
+ log_debug("%s: enabling vcc-supply failed (%d)\n",
+ __func__, ret);
+ return ret;
+ }
+
+ ret = regulator_set_enable_if_allowed(priv->vdd, 1);
+ if (ret) {
+ log_debug("%s: enabling vdd-supply failed (%d)\n",
+ __func__, ret);
+ return ret;
+ }
+
+ /*
+ * According to spec delay between enabling supply is 0,
+ * for regulators to reach required voltage ~5ms needed.
+ * MIPI interface signal for setup requires additional
+ * 110ms which in total results in 115ms.
+ */
+ mdelay(115);
+
+ return 0;
+}
+
+static int lg_ld070wx3_probe(struct udevice *dev)
+{
+ struct mipi_dsi_panel_plat *plat = dev_get_plat(dev);
+
+ /* fill characteristics of DSI data link */
+ plat->lanes = 4;
+ plat->format = MIPI_DSI_FMT_RGB888;
+ plat->mode_flags = MIPI_DSI_MODE_VIDEO;
+
+ return lg_ld070wx3_hw_init(dev);
+}
+
+static const struct panel_ops lg_ld070wx3_ops = {
+ .enable_backlight = lg_ld070wx3_enable_backlight,
+ .set_backlight = lg_ld070wx3_set_backlight,
+ .get_display_timing = lg_ld070wx3_timings,
+};
+
+static const struct udevice_id lg_ld070wx3_ids[] = {
+ { .compatible = "lg,ld070wx3-sl01" },
+ { }
+};
+
+U_BOOT_DRIVER(lg_ld070wx3) = {
+ .name = "lg_ld070wx3",
+ .id = UCLASS_PANEL,
+ .of_match = lg_ld070wx3_ids,
+ .ops = &lg_ld070wx3_ops,
+ .of_to_plat = lg_ld070wx3_of_to_plat,
+ .probe = lg_ld070wx3_probe,
+ .plat_auto = sizeof(struct mipi_dsi_panel_plat),
+ .priv_auto = sizeof(struct lg_ld070wx3_priv),
+};
diff --git a/drivers/video/lm3533_backlight.c b/drivers/video/lm3533_backlight.c
index 00297a0..6b51fa0 100644
--- a/drivers/video/lm3533_backlight.c
+++ b/drivers/video/lm3533_backlight.c
@@ -6,7 +6,6 @@
#define LOG_CATEGORY UCLASS_PANEL_BACKLIGHT
#include <backlight.h>
-#include <common.h>
#include <dm.h>
#include <i2c.h>
#include <log.h>
diff --git a/drivers/video/logicore_dp_tx.c b/drivers/video/logicore_dp_tx.c
index 624084d..643a77a 100644
--- a/drivers/video/logicore_dp_tx.c
+++ b/drivers/video/logicore_dp_tx.c
@@ -9,7 +9,6 @@
* Dirk Eibach, Guntermann & Drunck GmbH, dirk.eibach@gdsys.cc
*/
-#include <common.h>
#include <clk.h>
#include <display.h>
#include <dm.h>
diff --git a/drivers/video/mali_dp.c b/drivers/video/mali_dp.c
index dbb2f53..c892126 100644
--- a/drivers/video/mali_dp.c
+++ b/drivers/video/mali_dp.c
@@ -5,7 +5,6 @@
*
*/
#define DEBUG
-#include <common.h>
#include <malloc.h>
#include <video.h>
#include <dm.h>
diff --git a/drivers/video/mcde_simple.c b/drivers/video/mcde_simple.c
index 0924cee..2ba5d0d 100644
--- a/drivers/video/mcde_simple.c
+++ b/drivers/video/mcde_simple.c
@@ -1,7 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+
/* Copyright (C) 2019 Stephan Gerhold */
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <video.h>
diff --git a/drivers/video/meson/meson_canvas.c b/drivers/video/meson/meson_canvas.c
index eccac2f..dd4c546 100644
--- a/drivers/video/meson/meson_canvas.c
+++ b/drivers/video/meson/meson_canvas.c
@@ -6,7 +6,6 @@
* Author: Neil Armstrong <narmstrong@baylibre.com>
*/
-#include <common.h>
#include <dm.h>
#include <asm/io.h>
diff --git a/drivers/video/meson/meson_dw_hdmi.c b/drivers/video/meson/meson_dw_hdmi.c
index 5db0190..587df7b 100644
--- a/drivers/video/meson/meson_dw_hdmi.c
+++ b/drivers/video/meson/meson_dw_hdmi.c
@@ -4,7 +4,6 @@
* Author: Jorge Ramirez-Ortiz <jramirez@baylibre.com>
*/
-#include <common.h>
#include <display.h>
#include <dm.h>
#include <edid.h>
@@ -375,6 +374,10 @@
return -ETIMEDOUT;
}
+static const struct dw_hdmi_phy_ops dw_hdmi_meson_phy_ops = {
+ .phy_set = meson_dw_hdmi_phy_init,
+};
+
static int meson_dw_hdmi_probe(struct udevice *dev)
{
struct meson_dw_hdmi *priv = dev_get_priv(dev);
@@ -397,7 +400,7 @@
priv->hdmi.hdmi_data.enc_out_bus_format = MEDIA_BUS_FMT_RGB888_1X24;
priv->hdmi.hdmi_data.enc_in_bus_format = MEDIA_BUS_FMT_YUV8_1X24;
- priv->hdmi.phy_set = meson_dw_hdmi_phy_init;
+ priv->hdmi.ops = &dw_hdmi_meson_phy_ops;
if (meson_hdmi_is_compatible(priv, HDMI_COMPATIBLE_G12A))
priv->hdmi.reg_io_width = 1;
else {
diff --git a/drivers/video/meson/meson_plane.c b/drivers/video/meson/meson_plane.c
index e3f784e..899ce22 100644
--- a/drivers/video/meson/meson_plane.c
+++ b/drivers/video/meson/meson_plane.c
@@ -6,7 +6,6 @@
* Author: Neil Armstrong <narmstrong@baylibre.com>
*/
-#include <common.h>
#include <dm.h>
#include <asm/io.h>
#include <linux/bitfield.h>
diff --git a/drivers/video/meson/meson_vclk.c b/drivers/video/meson/meson_vclk.c
index e718a00..4761ff6 100644
--- a/drivers/video/meson/meson_vclk.c
+++ b/drivers/video/meson/meson_vclk.c
@@ -6,7 +6,6 @@
* Author: Neil Armstrong <narmstrong@baylibre.com>
*/
-#include <common.h>
#include <dm.h>
#include <edid.h>
#include <linux/bitops.h>
diff --git a/drivers/video/meson/meson_venc.c b/drivers/video/meson/meson_venc.c
index e7366dd..1bc6aaf 100644
--- a/drivers/video/meson/meson_venc.c
+++ b/drivers/video/meson/meson_venc.c
@@ -6,7 +6,6 @@
* Author: Neil Armstrong <narmstrong@baylibre.com>
*/
-#include <common.h>
#include <dm.h>
#include <edid.h>
#include <fdtdec.h>
diff --git a/drivers/video/meson/meson_vpu.c b/drivers/video/meson/meson_vpu.c
index 67d4ce7..ca62772 100644
--- a/drivers/video/meson/meson_vpu.c
+++ b/drivers/video/meson/meson_vpu.c
@@ -6,7 +6,6 @@
* Author: Neil Armstrong <narmstrong@baylibre.com>
*/
-#include <common.h>
#include <display.h>
#include <dm.h>
#include <efi_loader.h>
diff --git a/drivers/video/meson/meson_vpu_init.c b/drivers/video/meson/meson_vpu_init.c
index c9808e1..0e34cef 100644
--- a/drivers/video/meson/meson_vpu_init.c
+++ b/drivers/video/meson/meson_vpu_init.c
@@ -8,7 +8,6 @@
#define DEBUG
-#include <common.h>
#include <dm.h>
#include <asm/io.h>
#include <linux/bitops.h>
diff --git a/drivers/video/mipi_dsi.c b/drivers/video/mipi_dsi.c
index ecacea1..dc949c8 100644
--- a/drivers/video/mipi_dsi.c
+++ b/drivers/video/mipi_dsi.c
@@ -32,7 +32,6 @@
*
*/
-#include <common.h>
#include <clk.h>
#include <display.h>
#include <dm.h>
diff --git a/drivers/video/mvebu_lcd.c b/drivers/video/mvebu_lcd.c
index d3d07e5..3fc5640 100644
--- a/drivers/video/mvebu_lcd.c
+++ b/drivers/video/mvebu_lcd.c
@@ -5,7 +5,6 @@
* Initialization of LCD interface and setup of SPLASH screen image
*/
-#include <common.h>
#include <dm.h>
#include <part.h>
#include <video.h>
diff --git a/drivers/video/mxsfb.c b/drivers/video/mxsfb.c
index 515363f..792d631 100644
--- a/drivers/video/mxsfb.c
+++ b/drivers/video/mxsfb.c
@@ -4,7 +4,6 @@
*
* Copyright (C) 2011-2013 Marek Vasut <marex@denx.de>
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <env.h>
diff --git a/drivers/video/nexell/s5pxx18_dp.c b/drivers/video/nexell/s5pxx18_dp.c
index 2248f47..16a489b 100644
--- a/drivers/video/nexell/s5pxx18_dp.c
+++ b/drivers/video/nexell/s5pxx18_dp.c
@@ -6,7 +6,6 @@
*/
#include <config.h>
-#include <common.h>
#include <errno.h>
#include <log.h>
#include <asm/arch/reset.h>
diff --git a/drivers/video/nexell/s5pxx18_dp_hdmi.c b/drivers/video/nexell/s5pxx18_dp_hdmi.c
index 3f1fb8a..109d9f2 100644
--- a/drivers/video/nexell/s5pxx18_dp_hdmi.c
+++ b/drivers/video/nexell/s5pxx18_dp_hdmi.c
@@ -6,7 +6,6 @@
*/
#include <config.h>
-#include <common.h>
#include <errno.h>
#include <log.h>
diff --git a/drivers/video/nexell/s5pxx18_dp_lvds.c b/drivers/video/nexell/s5pxx18_dp_lvds.c
index f8ea63f..5db8d2b 100644
--- a/drivers/video/nexell/s5pxx18_dp_lvds.c
+++ b/drivers/video/nexell/s5pxx18_dp_lvds.c
@@ -6,8 +6,8 @@
*/
#include <config.h>
-#include <common.h>
#include <errno.h>
+#include <stdio.h>
#include <asm/arch/nexell.h>
#include <asm/arch/reset.h>
diff --git a/drivers/video/nexell/s5pxx18_dp_mipi.c b/drivers/video/nexell/s5pxx18_dp_mipi.c
index 670272b..58493a8 100644
--- a/drivers/video/nexell/s5pxx18_dp_mipi.c
+++ b/drivers/video/nexell/s5pxx18_dp_mipi.c
@@ -6,7 +6,6 @@
*/
#include <config.h>
-#include <common.h>
#include <errno.h>
#include <asm/arch/nexell.h>
diff --git a/drivers/video/nexell/s5pxx18_dp_rgb.c b/drivers/video/nexell/s5pxx18_dp_rgb.c
index 44e8edb..6abb8b5 100644
--- a/drivers/video/nexell/s5pxx18_dp_rgb.c
+++ b/drivers/video/nexell/s5pxx18_dp_rgb.c
@@ -6,8 +6,8 @@
*/
#include <config.h>
-#include <common.h>
#include <errno.h>
+#include <stdio.h>
#include <asm/arch/display.h>
diff --git a/drivers/video/nexell/soc/s5pxx18_soc_disptop.h b/drivers/video/nexell/soc/s5pxx18_soc_disptop.h
index c7bf504..4ad3532 100644
--- a/drivers/video/nexell/soc/s5pxx18_soc_disptop.h
+++ b/drivers/video/nexell/soc/s5pxx18_soc_disptop.h
@@ -8,6 +8,7 @@
#ifndef _S5PXX18_SOC_DISPTOP_H_
#define _S5PXX18_SOC_DISPTOP_H_
+#include <linux/types.h>
#include "s5pxx18_soc_disptype.h"
#define NUMBER_OF_DISPTOP_MODULE 1
diff --git a/drivers/video/nexell_display.c b/drivers/video/nexell_display.c
index af2698f..7bda33f 100644
--- a/drivers/video/nexell_display.c
+++ b/drivers/video/nexell_display.c
@@ -8,7 +8,6 @@
*/
#include <config.h>
-#include <common.h>
#include <command.h>
#include <dm.h>
#include <mapmem.h>
diff --git a/drivers/video/omap3_dss.c b/drivers/video/omap3_dss.c
index 432b16b..0b7ce34 100644
--- a/drivers/video/omap3_dss.c
+++ b/drivers/video/omap3_dss.c
@@ -25,7 +25,6 @@
* MA 02111-1307 USA
*/
-#include <common.h>
#include <asm/io.h>
#include <asm/arch/dss.h>
diff --git a/drivers/video/orisetech_otm8009a.c b/drivers/video/orisetech_otm8009a.c
index 848f174..a29e909 100644
--- a/drivers/video/orisetech_otm8009a.c
+++ b/drivers/video/orisetech_otm8009a.c
@@ -7,7 +7,6 @@
* This otm8009a panel driver is inspired from the Linux Kernel driver
* drivers/gpu/drm/panel/panel-orisetech-otm8009a.c.
*/
-#include <common.h>
#include <backlight.h>
#include <dm.h>
#include <mipi_dsi.h>
diff --git a/drivers/video/panel-uclass.c b/drivers/video/panel-uclass.c
index 1f7e20e..52a3466 100644
--- a/drivers/video/panel-uclass.c
+++ b/drivers/video/panel-uclass.c
@@ -6,7 +6,6 @@
#define LOG_CATEGORY UCLASS_PANEL
-#include <common.h>
#include <dm.h>
#include <panel.h>
diff --git a/drivers/video/pwm_backlight.c b/drivers/video/pwm_backlight.c
index 1c747d9..a4576c8 100644
--- a/drivers/video/pwm_backlight.c
+++ b/drivers/video/pwm_backlight.c
@@ -6,7 +6,6 @@
#define LOG_CATEGORY UCLASS_PANEL_BACKLIGHT
-#include <common.h>
#include <dm.h>
#include <backlight.h>
#include <log.h>
diff --git a/drivers/video/raydium-rm68200.c b/drivers/video/raydium-rm68200.c
index f1fce55..b8662ca 100644
--- a/drivers/video/raydium-rm68200.c
+++ b/drivers/video/raydium-rm68200.c
@@ -7,7 +7,6 @@
* This rm68200 panel driver is inspired from the Linux Kernel driver
* drivers/gpu/drm/panel/panel-raydium-rm68200.c.
*/
-#include <common.h>
#include <backlight.h>
#include <dm.h>
#include <mipi_dsi.h>
diff --git a/drivers/video/renesas-r61307.c b/drivers/video/renesas-r61307.c
index 426fdc6..a3697bc 100644
--- a/drivers/video/renesas-r61307.c
+++ b/drivers/video/renesas-r61307.c
@@ -5,7 +5,6 @@
* Copyright (c) 2022 Svyatoslav Ryhel <clamor95@gmail.com>
*/
-#include <common.h>
#include <backlight.h>
#include <dm.h>
#include <panel.h>
@@ -19,7 +18,7 @@
#include <power/regulator.h>
/*
- * The datasheet is not publicly available, all values are
+ * The datasheet is not publicly available, all values are
* taken from the downstream. If you have access to datasheets,
* corrections are welcome.
*/
@@ -120,42 +119,6 @@
static int renesas_r61307_enable_backlight(struct udevice *dev)
{
struct renesas_r61307_priv *priv = dev_get_priv(dev);
- int ret;
-
- ret = regulator_set_enable_if_allowed(priv->vcc, 1);
- if (ret) {
- log_err("enabling vcc-supply failed (%d)\n", ret);
- return ret;
- }
- mdelay(5);
-
- ret = regulator_set_enable_if_allowed(priv->iovcc, 1);
- if (ret) {
- log_err("enabling iovcc-supply failed (%d)\n", ret);
- return ret;
- }
-
- ret = dm_gpio_set_value(&priv->reset_gpio, 0);
- if (ret) {
- log_err("changing reset-gpio failed (%d)\n", ret);
- return ret;
- }
- mdelay(5);
-
- ret = dm_gpio_set_value(&priv->reset_gpio, 1);
- if (ret) {
- log_err("changing reset-gpio failed (%d)\n", ret);
- return ret;
- }
-
- mdelay(5);
-
- return 0;
-}
-
-static int renesas_r61307_set_backlight(struct udevice *dev, int percent)
-{
- struct renesas_r61307_priv *priv = dev_get_priv(dev);
struct mipi_dsi_panel_plat *plat = dev_get_plat(dev);
struct mipi_dsi_device *dsi = plat->device;
int ret;
@@ -205,18 +168,23 @@
log_err("failed to set display on: %d\n", ret);
return ret;
}
-
mdelay(50);
+ return 0;
+}
+
+static int renesas_r61307_set_backlight(struct udevice *dev, int percent)
+{
+ struct renesas_r61307_priv *priv = dev_get_priv(dev);
+ int ret;
+
ret = backlight_enable(priv->backlight);
if (ret)
return ret;
- ret = backlight_set_brightness(priv->backlight, percent);
- if (ret)
- return ret;
+ mdelay(5);
- return 0;
+ return backlight_set_brightness(priv->backlight, percent);
}
static int renesas_r61307_timings(struct udevice *dev,
@@ -266,6 +234,46 @@
return 0;
}
+static int renesas_r61307_hw_init(struct udevice *dev)
+{
+ struct renesas_r61307_priv *priv = dev_get_priv(dev);
+ int ret;
+
+ ret = regulator_set_enable_if_allowed(priv->vcc, 1);
+ if (ret) {
+ log_debug("%s: enabling vcc-supply failed (%d)\n",
+ __func__, ret);
+ return ret;
+ }
+ mdelay(5);
+
+ ret = regulator_set_enable_if_allowed(priv->iovcc, 1);
+ if (ret) {
+ log_debug("%s: enabling iovcc-supply failed (%d)\n",
+ __func__, ret);
+ return ret;
+ }
+
+ ret = dm_gpio_set_value(&priv->reset_gpio, 0);
+ if (ret) {
+ log_debug("%s: changing reset-gpio failed (%d)\n",
+ __func__, ret);
+ return ret;
+ }
+ mdelay(5);
+
+ ret = dm_gpio_set_value(&priv->reset_gpio, 1);
+ if (ret) {
+ log_debug("%s: changing reset-gpio failed (%d)\n",
+ __func__, ret);
+ return ret;
+ }
+
+ mdelay(5);
+
+ return 0;
+}
+
static int renesas_r61307_probe(struct udevice *dev)
{
struct mipi_dsi_panel_plat *plat = dev_get_plat(dev);
@@ -275,7 +283,7 @@
plat->format = MIPI_DSI_FMT_RGB888;
plat->mode_flags = MIPI_DSI_MODE_VIDEO;
- return 0;
+ return renesas_r61307_hw_init(dev);
}
static const struct panel_ops renesas_r61307_ops = {
diff --git a/drivers/video/renesas-r69328.c b/drivers/video/renesas-r69328.c
index d2f7169..9861c3f 100644
--- a/drivers/video/renesas-r69328.c
+++ b/drivers/video/renesas-r69328.c
@@ -5,7 +5,6 @@
* Copyright (c) 2022 Svyatoslav Ryhel <clamor95@gmail.com>
*/
-#include <common.h>
#include <backlight.h>
#include <dm.h>
#include <panel.h>
@@ -19,7 +18,7 @@
#include <power/regulator.h>
/*
- * The datasheet is not publicly available, all values are
+ * The datasheet is not publicly available, all values are
* taken from the downstream. If you have access to datasheets,
* corrections are welcome.
*/
@@ -65,37 +64,6 @@
static int renesas_r69328_enable_backlight(struct udevice *dev)
{
- struct renesas_r69328_priv *priv = dev_get_priv(dev);
- int ret;
-
- ret = dm_gpio_set_value(&priv->enable_gpio, 1);
- if (ret) {
- log_err("error changing enable-gpios (%d)\n", ret);
- return ret;
- }
- mdelay(5);
-
- ret = dm_gpio_set_value(&priv->reset_gpio, 0);
- if (ret) {
- log_err("error changing reset-gpios (%d)\n", ret);
- return ret;
- }
- mdelay(5);
-
- ret = dm_gpio_set_value(&priv->reset_gpio, 1);
- if (ret) {
- log_err("error changing reset-gpios (%d)\n", ret);
- return ret;
- }
-
- mdelay(5);
-
- return 0;
-}
-
-static int renesas_r69328_set_backlight(struct udevice *dev, int percent)
-{
- struct renesas_r69328_priv *priv = dev_get_priv(dev);
struct mipi_dsi_panel_plat *plat = dev_get_plat(dev);
struct mipi_dsi_device *dsi = plat->device;
int ret;
@@ -153,18 +121,23 @@
log_err("failed to set display on: %d\n", ret);
return ret;
}
-
mdelay(50);
+ return 0;
+}
+
+static int renesas_r69328_set_backlight(struct udevice *dev, int percent)
+{
+ struct renesas_r69328_priv *priv = dev_get_priv(dev);
+ int ret;
+
ret = backlight_enable(priv->backlight);
if (ret)
return ret;
- ret = backlight_set_brightness(priv->backlight, percent);
- if (ret)
- return ret;
+ mdelay(5);
- return 0;
+ return backlight_set_brightness(priv->backlight, percent);
}
static int renesas_r69328_timings(struct udevice *dev,
@@ -203,6 +176,39 @@
return 0;
}
+static int renesas_r69328_hw_init(struct udevice *dev)
+{
+ struct renesas_r69328_priv *priv = dev_get_priv(dev);
+ int ret;
+
+ ret = dm_gpio_set_value(&priv->enable_gpio, 1);
+ if (ret) {
+ log_debug("%s: error changing enable-gpios (%d)\n",
+ __func__, ret);
+ return ret;
+ }
+ mdelay(5);
+
+ ret = dm_gpio_set_value(&priv->reset_gpio, 0);
+ if (ret) {
+ log_debug("%s: error changing reset-gpios (%d)\n",
+ __func__, ret);
+ return ret;
+ }
+ mdelay(5);
+
+ ret = dm_gpio_set_value(&priv->reset_gpio, 1);
+ if (ret) {
+ log_debug("%s: error changing reset-gpios (%d)\n",
+ __func__, ret);
+ return ret;
+ }
+
+ mdelay(5);
+
+ return 0;
+}
+
static int renesas_r69328_probe(struct udevice *dev)
{
struct mipi_dsi_panel_plat *plat = dev_get_plat(dev);
@@ -212,7 +218,7 @@
plat->format = MIPI_DSI_FMT_RGB888;
plat->mode_flags = MIPI_DSI_MODE_VIDEO;
- return 0;
+ return renesas_r69328_hw_init(dev);
}
static const struct panel_ops renesas_r69328_ops = {
diff --git a/drivers/video/rockchip/Makefile b/drivers/video/rockchip/Makefile
index 8128289..f55bece 100644
--- a/drivers/video/rockchip/Makefile
+++ b/drivers/video/rockchip/Makefile
@@ -6,10 +6,12 @@
ifdef CONFIG_VIDEO_ROCKCHIP
obj-y += rk_vop.o
obj-$(CONFIG_ROCKCHIP_RK3288) += rk3288_vop.o
+obj-$(CONFIG_ROCKCHIP_RK3328) += rk3328_vop.o
obj-$(CONFIG_ROCKCHIP_RK3399) += rk3399_vop.o
obj-$(CONFIG_DISPLAY_ROCKCHIP_EDP) += rk_edp.o
obj-$(CONFIG_DISPLAY_ROCKCHIP_LVDS) += rk_lvds.o
obj-hdmi-$(CONFIG_ROCKCHIP_RK3288) += rk3288_hdmi.o
+obj-hdmi-$(CONFIG_ROCKCHIP_RK3328) += rk3328_hdmi.o
obj-hdmi-$(CONFIG_ROCKCHIP_RK3399) += rk3399_hdmi.o
obj-$(CONFIG_DISPLAY_ROCKCHIP_HDMI) += rk_hdmi.o $(obj-hdmi-y)
obj-mipi-$(CONFIG_ROCKCHIP_RK3288) += rk3288_mipi.o
diff --git a/drivers/video/rockchip/dw_mipi_dsi_rockchip.c b/drivers/video/rockchip/dw_mipi_dsi_rockchip.c
index fb78463..fa51217 100644
--- a/drivers/video/rockchip/dw_mipi_dsi_rockchip.c
+++ b/drivers/video/rockchip/dw_mipi_dsi_rockchip.c
@@ -24,7 +24,6 @@
#include <dm/lists.h>
#include <linux/iopoll.h>
-#include <common.h>
#include <log.h>
#include <video.h>
#include <dm/device-internal.h>
diff --git a/drivers/video/rockchip/rk3288_hdmi.c b/drivers/video/rockchip/rk3288_hdmi.c
index efa8754..3d39f31 100644
--- a/drivers/video/rockchip/rk3288_hdmi.c
+++ b/drivers/video/rockchip/rk3288_hdmi.c
@@ -3,7 +3,6 @@
* Copyright (c) 2017 Theobroma Systems Design und Consulting GmbH
*/
-#include <common.h>
#include <clk.h>
#include <display.h>
#include <dm.h>
diff --git a/drivers/video/rockchip/rk3288_mipi.c b/drivers/video/rockchip/rk3288_mipi.c
index 9d42119..850fe31 100644
--- a/drivers/video/rockchip/rk3288_mipi.c
+++ b/drivers/video/rockchip/rk3288_mipi.c
@@ -4,7 +4,6 @@
* Author: Eric Gao <eric.gao@rock-chips.com>
*/
-#include <common.h>
#include <clk.h>
#include <display.h>
#include <dm.h>
diff --git a/drivers/video/rockchip/rk3288_vop.c b/drivers/video/rockchip/rk3288_vop.c
index a468385..282831e 100644
--- a/drivers/video/rockchip/rk3288_vop.c
+++ b/drivers/video/rockchip/rk3288_vop.c
@@ -5,7 +5,6 @@
* Copyright 2014 Rockchip Inc.
*/
-#include <common.h>
#include <display.h>
#include <dm.h>
#include <regmap.h>
diff --git a/drivers/video/rockchip/rk3328_hdmi.c b/drivers/video/rockchip/rk3328_hdmi.c
new file mode 100644
index 0000000..763669c
--- /dev/null
+++ b/drivers/video/rockchip/rk3328_hdmi.c
@@ -0,0 +1,126 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2023 Edgeble AI Technologies Pvt. Ltd.
+ */
+
+#include <clk.h>
+#include <display.h>
+#include <dm.h>
+#include <dw_hdmi.h>
+#include <asm/io.h>
+#include <asm/arch-rockchip/grf_rk3328.h>
+#include "rk_hdmi.h"
+
+#define RK3328_IO_3V_DOMAIN (7 << (9 + 16))
+#define RK3328_IO_5V_DOMAIN ((7 << 9) | (3 << (9 + 16)))
+#define RK3328_IO_DDC_IN_MSK ((3 << 10) | (3 << (10 + 16)))
+#define RK3328_IO_CTRL_BY_HDMI ((1 << 13) | (1 << (13 + 16)))
+
+static int rk3328_hdmi_enable(struct udevice *dev, int panel_bpp,
+ const struct display_timing *edid)
+{
+ struct rk_hdmi_priv *priv = dev_get_priv(dev);
+
+ return dw_hdmi_enable(&priv->hdmi, edid);
+}
+
+static int rk3328_dw_hdmi_phy_cfg(struct dw_hdmi *hdmi, uint pixclock)
+{
+ struct rk_hdmi_priv *priv = container_of(hdmi, struct rk_hdmi_priv, hdmi);
+ int ret;
+
+ ret = generic_phy_init(&priv->phy);
+ if (ret) {
+ printf("failed to init phy (ret=%d)\n", ret);
+ return ret;
+ }
+
+ ret = generic_phy_power_on(&priv->phy);
+ if (ret) {
+ printf("failed to power on phy (ret=%d)\n", ret);
+ return ret;
+ }
+
+ return 0;
+}
+
+static void rk3328_dw_hdmi_setup_hpd(struct dw_hdmi *hdmi)
+{
+ struct rk_hdmi_priv *priv = container_of(hdmi, struct rk_hdmi_priv, hdmi);
+ struct rk3328_grf_regs *grf = priv->grf;
+
+ writel(RK3328_IO_DDC_IN_MSK, &grf->soc_con[2]);
+ writel(RK3328_IO_CTRL_BY_HDMI, &grf->soc_con[3]);
+}
+
+static void rk3328_dw_hdmi_read_hpd(struct dw_hdmi *hdmi, bool hpd_status)
+{
+ struct rk_hdmi_priv *priv = container_of(hdmi, struct rk_hdmi_priv, hdmi);
+ struct rk3328_grf_regs *grf = priv->grf;
+
+ if (hpd_status)
+ writel(RK3328_IO_5V_DOMAIN, &grf->soc_con[4]);
+ else
+ writel(RK3328_IO_3V_DOMAIN, &grf->soc_con[4]);
+}
+
+static const struct dw_hdmi_phy_ops dw_hdmi_rk3328_phy_ops = {
+ .phy_set = rk3328_dw_hdmi_phy_cfg,
+ .setup_hpd = rk3328_dw_hdmi_setup_hpd,
+ .read_hpd = rk3328_dw_hdmi_read_hpd,
+};
+
+static int rk3328_hdmi_of_to_plat(struct udevice *dev)
+{
+ struct rk_hdmi_priv *priv = dev_get_priv(dev);
+ struct dw_hdmi *hdmi = &priv->hdmi;
+
+ hdmi->i2c_clk_high = 0x71;
+ hdmi->i2c_clk_low = 0x76;
+
+ rk_hdmi_of_to_plat(dev);
+
+ hdmi->ops = &dw_hdmi_rk3328_phy_ops;
+
+ return 0;
+}
+
+static int rk3328_hdmi_probe(struct udevice *dev)
+{
+ struct rk_hdmi_priv *priv = dev_get_priv(dev);
+ int ret;
+
+ ret = generic_phy_get_by_name(dev, "hdmi", &priv->phy);
+ if (ret) {
+ printf("failed to get hdmi phy\n");
+ return ret;
+ };
+
+ ret = rk_hdmi_probe(dev);
+ if (ret) {
+ printf("failed to probe rk hdmi\n");
+ return ret;
+ }
+
+ return 0;
+}
+
+static const struct dm_display_ops rk3328_hdmi_ops = {
+ .read_edid = rk_hdmi_read_edid,
+ .enable = rk3328_hdmi_enable,
+};
+
+static const struct udevice_id rk3328_hdmi_ids[] = {
+ { .compatible = "rockchip,rk3328-dw-hdmi" },
+ { }
+};
+
+U_BOOT_DRIVER(rk3328_hdmi_rockchip) = {
+ .name = "rk3328_hdmi_rockchip",
+ .id = UCLASS_DISPLAY,
+ .of_match = rk3328_hdmi_ids,
+ .ops = &rk3328_hdmi_ops,
+ .of_to_plat = rk3328_hdmi_of_to_plat,
+ .probe = rk3328_hdmi_probe,
+ .priv_auto = sizeof(struct rk_hdmi_priv),
+};
diff --git a/drivers/video/rockchip/rk3328_vop.c b/drivers/video/rockchip/rk3328_vop.c
new file mode 100644
index 0000000..55233f1
--- /dev/null
+++ b/drivers/video/rockchip/rk3328_vop.c
@@ -0,0 +1,83 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2023 Edgeble AI Technologies Pvt. Ltd.
+ */
+
+#include <dm.h>
+#include <video.h>
+#include <asm/io.h>
+#include "rk_vop.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static void rk3328_set_pin_polarity(struct udevice *dev,
+ enum vop_modes mode, u32 polarity)
+{
+ struct rk_vop_priv *priv = dev_get_priv(dev);
+ struct rk3288_vop *regs = priv->regs;
+
+ switch (mode) {
+ case VOP_MODE_HDMI:
+ clrsetbits_le32(®s->dsp_ctrl1,
+ M_RK3399_DSP_HDMI_POL,
+ V_RK3399_DSP_HDMI_POL(polarity));
+ break;
+ default:
+ debug("%s: unsupported output mode %x\n", __func__, mode);
+ }
+}
+
+static int rk3328_vop_probe(struct udevice *dev)
+{
+ /* Before relocation we don't need to do anything */
+ if (!(gd->flags & GD_FLG_RELOC))
+ return 0;
+
+ return rk_vop_probe(dev);
+}
+
+static int rk3328_vop_remove(struct udevice *dev)
+{
+ struct rk_vop_priv *priv = dev_get_priv(dev);
+ struct rk3288_vop *regs = priv->regs;
+ struct rk3288_vop *win_regs = priv->regs + priv->win_offset;
+
+ /* FIXME: Explicit disabling of WIN0 is needed to avoid iommu
+ * page-fault in Linux, better handling of iommu-address in
+ * Linux might drop this.
+ */
+ clrbits_le32(&win_regs->win0_ctrl0, M_WIN0_EN);
+ writel(0x01, ®s->reg_cfg_done);
+
+ return 0;
+}
+
+struct rkvop_driverdata rk3328_driverdata = {
+ .dsp_offset = 0x490,
+ .win_offset = 0xd0,
+ .features = VOP_FEATURE_OUTPUT_10BIT,
+ .set_pin_polarity = rk3328_set_pin_polarity,
+};
+
+static const struct udevice_id rk3328_vop_ids[] = {
+ {
+ .compatible = "rockchip,rk3328-vop",
+ .data = (ulong)&rk3328_driverdata
+ },
+ { /* sentile */ }
+};
+
+static const struct video_ops rk3328_vop_ops = {
+};
+
+U_BOOT_DRIVER(rk3328_vop) = {
+ .name = "rk3328_vop",
+ .id = UCLASS_VIDEO,
+ .of_match = rk3328_vop_ids,
+ .ops = &rk3328_vop_ops,
+ .bind = rk_vop_bind,
+ .probe = rk3328_vop_probe,
+ .remove = rk3328_vop_remove,
+ .priv_auto = sizeof(struct rk_vop_priv),
+ .flags = DM_FLAG_PRE_RELOC | DM_FLAG_OS_PREPARE,
+};
diff --git a/drivers/video/rockchip/rk3399_hdmi.c b/drivers/video/rockchip/rk3399_hdmi.c
index 5f3f5d2..c7630cc 100644
--- a/drivers/video/rockchip/rk3399_hdmi.c
+++ b/drivers/video/rockchip/rk3399_hdmi.c
@@ -3,7 +3,6 @@
* Copyright (c) 2017 Theobroma Systems Design und Consulting GmbH
*/
-#include <common.h>
#include <clk.h>
#include <display.h>
#include <dm.h>
diff --git a/drivers/video/rockchip/rk3399_mipi.c b/drivers/video/rockchip/rk3399_mipi.c
index b62d808..57e36ee 100644
--- a/drivers/video/rockchip/rk3399_mipi.c
+++ b/drivers/video/rockchip/rk3399_mipi.c
@@ -4,7 +4,6 @@
* Author: Eric Gao <eric.gao@rock-chips.com>
*/
-#include <common.h>
#include <clk.h>
#include <display.h>
#include <dm.h>
diff --git a/drivers/video/rockchip/rk3399_vop.c b/drivers/video/rockchip/rk3399_vop.c
index cb589c7..17e1601 100644
--- a/drivers/video/rockchip/rk3399_vop.c
+++ b/drivers/video/rockchip/rk3399_vop.c
@@ -5,7 +5,6 @@
* Copyright 2014 Rockchip Inc.
*/
-#include <common.h>
#include <display.h>
#include <dm.h>
#include <log.h>
diff --git a/drivers/video/rockchip/rk_edp.c b/drivers/video/rockchip/rk_edp.c
index 5f68a61..eb881ba 100644
--- a/drivers/video/rockchip/rk_edp.c
+++ b/drivers/video/rockchip/rk_edp.c
@@ -4,7 +4,6 @@
* Copyright 2014 Rockchip Inc.
*/
-#include <common.h>
#include <clk.h>
#include <display.h>
#include <dm.h>
diff --git a/drivers/video/rockchip/rk_hdmi.c b/drivers/video/rockchip/rk_hdmi.c
index 044a29e..0ac0a3a 100644
--- a/drivers/video/rockchip/rk_hdmi.c
+++ b/drivers/video/rockchip/rk_hdmi.c
@@ -5,7 +5,6 @@
* Copyright 2014 Rockchip Inc.
*/
-#include <common.h>
#include <clk.h>
#include <display.h>
#include <dm.h>
@@ -89,7 +88,6 @@
/* hdmi->i2c_clk_{high,low} are set up by the SoC driver */
hdmi->reg_io_width = 4;
- hdmi->phy_set = dw_hdmi_phy_cfg;
priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
@@ -111,14 +109,12 @@
struct dw_hdmi *hdmi = &priv->hdmi;
int ret;
- ret = dw_hdmi_phy_wait_for_hpd(hdmi);
- if (ret < 0) {
- debug("hdmi can not get hpd signal\n");
- return -1;
- }
-
dw_hdmi_init(hdmi);
dw_hdmi_phy_init(hdmi);
+ ret = dw_hdmi_detect_hpd(hdmi);
+ if (ret < 0)
+ return ret;
+
return 0;
}
diff --git a/drivers/video/rockchip/rk_hdmi.h b/drivers/video/rockchip/rk_hdmi.h
index 200dbae..dcfba3d 100644
--- a/drivers/video/rockchip/rk_hdmi.h
+++ b/drivers/video/rockchip/rk_hdmi.h
@@ -6,6 +6,8 @@
#ifndef __RK_HDMI_H__
#define __RK_HDMI_H__
+#include <generic-phy.h>
+
struct rkhdmi_driverdata {
/* configuration */
u8 i2c_clk_high;
@@ -19,6 +21,7 @@
struct rk_hdmi_priv {
struct dw_hdmi hdmi;
+ struct phy phy;
void *grf;
};
diff --git a/drivers/video/rockchip/rk_lvds.c b/drivers/video/rockchip/rk_lvds.c
index d0a015e..c969dae 100644
--- a/drivers/video/rockchip/rk_lvds.c
+++ b/drivers/video/rockchip/rk_lvds.c
@@ -3,7 +3,6 @@
* Copyright 2016 Rockchip Inc.
*/
-#include <common.h>
#include <display.h>
#include <dm.h>
#include <edid.h>
diff --git a/drivers/video/rockchip/rk_mipi.c b/drivers/video/rockchip/rk_mipi.c
index f14cbc6..0a60308 100644
--- a/drivers/video/rockchip/rk_mipi.c
+++ b/drivers/video/rockchip/rk_mipi.c
@@ -4,7 +4,6 @@
* Author: Eric Gao <eric.gao@rock-chips.com>
*/
-#include <common.h>
#include <clk.h>
#include <display.h>
#include <dm.h>
diff --git a/drivers/video/rockchip/rk_vop.c b/drivers/video/rockchip/rk_vop.c
index c514e2a..17dfe62 100644
--- a/drivers/video/rockchip/rk_vop.c
+++ b/drivers/video/rockchip/rk_vop.c
@@ -4,7 +4,6 @@
* Copyright 2014 Rockchip Inc.
*/
-#include <common.h>
#include <clk.h>
#include <display.h>
#include <dm.h>
@@ -39,11 +38,14 @@
DCLK_INVERT = 3
};
-static void rkvop_enable(struct udevice *dev, struct rk3288_vop *regs, ulong fbbase,
+static void rkvop_enable(struct udevice *dev, ulong fbbase,
int fb_bits_per_pixel,
const struct display_timing *edid,
struct reset_ctl *dclk_rst)
{
+ struct rk_vop_priv *priv = dev_get_priv(dev);
+ struct rk3288_vop *regs = priv->regs;
+ struct rk3288_vop *win_regs = priv->regs + priv->win_offset;
u32 lb_mode;
u32 rgb_mode;
u32 hactive = edid->hactive.typ;
@@ -51,32 +53,32 @@
int ret;
writel(V_ACT_WIDTH(hactive - 1) | V_ACT_HEIGHT(vactive - 1),
- ®s->win0_act_info);
+ &win_regs->win0_act_info);
writel(V_DSP_XST(edid->hsync_len.typ + edid->hback_porch.typ) |
V_DSP_YST(edid->vsync_len.typ + edid->vback_porch.typ),
- ®s->win0_dsp_st);
+ &win_regs->win0_dsp_st);
writel(V_DSP_WIDTH(hactive - 1) |
V_DSP_HEIGHT(vactive - 1),
- ®s->win0_dsp_info);
+ &win_regs->win0_dsp_info);
- clrsetbits_le32(®s->win0_color_key, M_WIN0_KEY_EN | M_WIN0_KEY_COLOR,
+ clrsetbits_le32(&win_regs->win0_color_key, M_WIN0_KEY_EN | M_WIN0_KEY_COLOR,
V_WIN0_KEY_EN(0) | V_WIN0_KEY_COLOR(0));
switch (fb_bits_per_pixel) {
case 16:
rgb_mode = RGB565;
- writel(V_RGB565_VIRWIDTH(hactive), ®s->win0_vir);
+ writel(V_RGB565_VIRWIDTH(hactive), &win_regs->win0_vir);
break;
case 24:
rgb_mode = RGB888;
- writel(V_RGB888_VIRWIDTH(hactive), ®s->win0_vir);
+ writel(V_RGB888_VIRWIDTH(hactive), &win_regs->win0_vir);
break;
case 32:
default:
rgb_mode = ARGB8888;
- writel(V_ARGB888_VIRWIDTH(hactive), ®s->win0_vir);
+ writel(V_ARGB888_VIRWIDTH(hactive), &win_regs->win0_vir);
break;
}
@@ -89,12 +91,12 @@
else
lb_mode = LB_RGB_1280X8;
- clrsetbits_le32(®s->win0_ctrl0,
+ clrsetbits_le32(&win_regs->win0_ctrl0,
M_WIN0_LB_MODE | M_WIN0_DATA_FMT | M_WIN0_EN,
V_WIN0_LB_MODE(lb_mode) | V_WIN0_DATA_FMT(rgb_mode) |
V_WIN0_EN(1));
- writel(fbbase, ®s->win0_yrgb_mst);
+ writel(fbbase, &win_regs->win0_yrgb_mst);
writel(0x01, ®s->reg_cfg_done); /* enable reg config */
ret = reset_assert(dclk_rst);
@@ -162,6 +164,7 @@
{
struct rk_vop_priv *priv = dev_get_priv(dev);
struct rk3288_vop *regs = priv->regs;
+ struct rk3288_vop *dsp_regs = priv->regs + priv->dsp_offset;
struct rkvop_driverdata *data =
(struct rkvop_driverdata *)dev_get_driver_data(dev);
@@ -195,27 +198,27 @@
writel(V_HSYNC(hsync_len) |
V_HORPRD(hsync_len + hback_porch + hactive + hfront_porch),
- ®s->dsp_htotal_hs_end);
+ &dsp_regs->dsp_htotal_hs_end);
writel(V_HEAP(hsync_len + hback_porch + hactive) |
V_HASP(hsync_len + hback_porch),
- ®s->dsp_hact_st_end);
+ &dsp_regs->dsp_hact_st_end);
writel(V_VSYNC(vsync_len) |
V_VERPRD(vsync_len + vback_porch + vactive + vfront_porch),
- ®s->dsp_vtotal_vs_end);
+ &dsp_regs->dsp_vtotal_vs_end);
writel(V_VAEP(vsync_len + vback_porch + vactive)|
V_VASP(vsync_len + vback_porch),
- ®s->dsp_vact_st_end);
+ &dsp_regs->dsp_vact_st_end);
writel(V_HEAP(hsync_len + hback_porch + hactive) |
V_HASP(hsync_len + hback_porch),
- ®s->post_dsp_hact_info);
+ &dsp_regs->post_dsp_hact_info);
writel(V_VAEP(vsync_len + vback_porch + vactive)|
V_VASP(vsync_len + vback_porch),
- ®s->post_dsp_vact_info);
+ &dsp_regs->post_dsp_vact_info);
writel(0x01, ®s->reg_cfg_done); /* enable reg config */
}
@@ -243,9 +246,7 @@
static int rk_display_init(struct udevice *dev, ulong fbbase, ofnode ep_node)
{
struct video_priv *uc_priv = dev_get_uclass_priv(dev);
- struct rk_vop_priv *priv = dev_get_priv(dev);
int vop_id, remote_vop_id;
- struct rk3288_vop *regs = priv->regs;
struct display_timing timing;
struct udevice *disp;
int ret;
@@ -380,7 +381,7 @@
return ret;
}
- rkvop_enable(dev, regs, fbbase, 1 << l2bpp, &timing, &dclk_rst);
+ rkvop_enable(dev, fbbase, 1 << l2bpp, &timing, &dclk_rst);
ret = display_enable(disp, 1 << l2bpp, &timing);
if (ret)
@@ -415,6 +416,8 @@
{
struct video_uc_plat *plat = dev_get_uclass_plat(dev);
struct rk_vop_priv *priv = dev_get_priv(dev);
+ struct rkvop_driverdata *ops =
+ (struct rkvop_driverdata *)dev_get_driver_data(dev);
int ret = 0;
ofnode port, node;
struct reset_ctl ahb_rst;
@@ -448,6 +451,8 @@
#endif
priv->regs = dev_read_addr_ptr(dev);
+ priv->win_offset = ops->win_offset;
+ priv->dsp_offset = ops->dsp_offset;
/*
* Try all the ports until we find one that works. In practice this
diff --git a/drivers/video/rockchip/rk_vop.h b/drivers/video/rockchip/rk_vop.h
index 0528fb2..eba68d8 100644
--- a/drivers/video/rockchip/rk_vop.h
+++ b/drivers/video/rockchip/rk_vop.h
@@ -11,6 +11,8 @@
struct rk_vop_priv {
void *grf;
void *regs;
+ int win_offset;
+ int dsp_offset;
};
enum vop_features {
@@ -18,6 +20,8 @@
};
struct rkvop_driverdata {
+ int win_offset;
+ int dsp_offset;
/* configuration */
u32 features;
/* block-specific setters/getters */
diff --git a/drivers/video/samsung-ltl106hl02.c b/drivers/video/samsung-ltl106hl02.c
new file mode 100644
index 0000000..5e6c11c
--- /dev/null
+++ b/drivers/video/samsung-ltl106hl02.c
@@ -0,0 +1,157 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Samsung LTL106HL02-001 DSI panel driver
+ *
+ * Copyright (c) 2020 Anton Bambura <jenneron@protonmail.com>
+ * Copyright (c) 2023 Svyatoslav Ryhel <clamor95@gmail.com>
+ * Copyright (c) 2024 Jonas Schwöbel <jonasschwoebel@yahoo.de>
+ */
+
+#include <backlight.h>
+#include <dm.h>
+#include <panel.h>
+#include <log.h>
+#include <mipi_dsi.h>
+#include <asm/gpio.h>
+#include <linux/delay.h>
+#include <power/regulator.h>
+
+struct samsung_ltl106hl02_priv {
+ struct udevice *vdd;
+ struct udevice *backlight;
+
+ struct gpio_desc reset_gpio;
+};
+
+static struct display_timing default_timing = {
+ .pixelclock.typ = 137000000,
+ .hactive.typ = 1920,
+ .hfront_porch.typ = 32,
+ .hback_porch.typ = 64,
+ .hsync_len.typ = 32,
+ .vactive.typ = 1080,
+ .vfront_porch.typ = 2,
+ .vback_porch.typ = 26,
+ .vsync_len.typ = 3,
+};
+
+static int samsung_ltl106hl02_enable_backlight(struct udevice *dev)
+{
+ struct mipi_dsi_panel_plat *plat = dev_get_plat(dev);
+ struct mipi_dsi_device *dsi = plat->device;
+ int ret;
+
+ ret = mipi_dsi_dcs_exit_sleep_mode(dsi);
+ if (ret < 0) {
+ log_debug("%s: failed to exit sleep mode: %d\n",
+ __func__, ret);
+ return ret;
+ }
+ mdelay(70);
+
+ ret = mipi_dsi_dcs_set_display_on(dsi);
+ if (ret < 0) {
+ log_debug("%s: failed to enable display: %d\n",
+ __func__, ret);
+ return ret;
+ }
+ mdelay(5);
+
+ return 0;
+}
+
+static int samsung_ltl106hl02_set_backlight(struct udevice *dev, int percent)
+{
+ struct samsung_ltl106hl02_priv *priv = dev_get_priv(dev);
+ int ret;
+
+ ret = backlight_enable(priv->backlight);
+ if (ret)
+ return ret;
+
+ return backlight_set_brightness(priv->backlight, percent);
+}
+
+static int samsung_ltl106hl02_timings(struct udevice *dev,
+ struct display_timing *timing)
+{
+ memcpy(timing, &default_timing, sizeof(*timing));
+ return 0;
+}
+
+static int samsung_ltl106hl02_of_to_plat(struct udevice *dev)
+{
+ struct samsung_ltl106hl02_priv *priv = dev_get_priv(dev);
+ int ret;
+
+ ret = uclass_get_device_by_phandle(UCLASS_PANEL_BACKLIGHT, dev,
+ "backlight", &priv->backlight);
+ if (ret) {
+ log_debug("%s: cannot get backlight: ret = %d\n",
+ __func__, ret);
+ return ret;
+ }
+
+ ret = uclass_get_device_by_phandle(UCLASS_REGULATOR, dev,
+ "vdd-supply", &priv->vdd);
+ if (ret)
+ log_debug("%s: cannot get vdd-supply: error %d\n",
+ __func__, ret);
+
+ ret = gpio_request_by_name(dev, "reset-gpios", 0,
+ &priv->reset_gpio, GPIOD_IS_OUT);
+ if (ret)
+ log_debug("%s: cannot get reset-gpios: error %d\n",
+ __func__, ret);
+
+ return 0;
+}
+
+static int samsung_ltl106hl02_hw_init(struct udevice *dev)
+{
+ struct samsung_ltl106hl02_priv *priv = dev_get_priv(dev);
+
+ dm_gpio_set_value(&priv->reset_gpio, 1);
+ regulator_set_enable_if_allowed(priv->vdd, 1);
+
+ /* Dataheets states at least 8.5 msec for vdd stabilization */
+ mdelay(10);
+
+ dm_gpio_set_value(&priv->reset_gpio, 0);
+
+ return 0;
+}
+
+static int samsung_ltl106hl02_probe(struct udevice *dev)
+{
+ struct mipi_dsi_panel_plat *plat = dev_get_plat(dev);
+
+ /* fill characteristics of DSI data link */
+ plat->lanes = 4;
+ plat->format = MIPI_DSI_FMT_RGB888;
+ plat->mode_flags = MIPI_DSI_MODE_VIDEO;
+
+ return samsung_ltl106hl02_hw_init(dev);
+}
+
+static const struct panel_ops samsung_ltl106hl02_ops = {
+ .enable_backlight = samsung_ltl106hl02_enable_backlight,
+ .set_backlight = samsung_ltl106hl02_set_backlight,
+ .get_display_timing = samsung_ltl106hl02_timings,
+};
+
+static const struct udevice_id samsung_ltl106hl02_ids[] = {
+ { .compatible = "samsung,ltl106hl02-001" },
+ { }
+};
+
+U_BOOT_DRIVER(samsung_ltl106hl02) = {
+ .name = "samsung_ltl106hl02",
+ .id = UCLASS_PANEL,
+ .of_match = samsung_ltl106hl02_ids,
+ .ops = &samsung_ltl106hl02_ops,
+ .of_to_plat = samsung_ltl106hl02_of_to_plat,
+ .probe = samsung_ltl106hl02_probe,
+ .plat_auto = sizeof(struct mipi_dsi_panel_plat),
+ .priv_auto = sizeof(struct samsung_ltl106hl02_priv),
+};
diff --git a/drivers/video/sandbox_dsi_host.c b/drivers/video/sandbox_dsi_host.c
index c84a27e..7025ac9 100644
--- a/drivers/video/sandbox_dsi_host.c
+++ b/drivers/video/sandbox_dsi_host.c
@@ -3,7 +3,6 @@
* Copyright (C) 2019, STMicroelectronics - All Rights Reserved
*/
-#include <common.h>
#include <display.h>
#include <dm.h>
#include <dsi_host.h>
diff --git a/drivers/video/sandbox_osd.c b/drivers/video/sandbox_osd.c
index 2a854d3..bedc32b 100644
--- a/drivers/video/sandbox_osd.c
+++ b/drivers/video/sandbox_osd.c
@@ -3,7 +3,6 @@
* (C) Copyright 2018
* Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc
*/
-#include <common.h>
#include <display.h>
#include <dm.h>
#include <malloc.h>
diff --git a/drivers/video/sandbox_sdl.c b/drivers/video/sandbox_sdl.c
index 9081c7d..69dfa93 100644
--- a/drivers/video/sandbox_sdl.c
+++ b/drivers/video/sandbox_sdl.c
@@ -3,7 +3,6 @@
* Copyright (c) 2013 Google, Inc
*/
-#include <common.h>
#include <dm.h>
#include <fdtdec.h>
#include <log.h>
diff --git a/drivers/video/seps525.c b/drivers/video/seps525.c
index 74c8721..86cd301 100644
--- a/drivers/video/seps525.c
+++ b/drivers/video/seps525.c
@@ -6,7 +6,6 @@
* Copyright (C) 2020 Xilinx Inc.
*/
-#include <common.h>
#include <command.h>
#include <cpu_func.h>
#include <dm.h>
diff --git a/drivers/video/simple_panel.c b/drivers/video/simple_panel.c
index efb122b..b6c5b05 100644
--- a/drivers/video/simple_panel.c
+++ b/drivers/video/simple_panel.c
@@ -4,34 +4,24 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <backlight.h>
#include <dm.h>
+#include <edid.h>
+#include <i2c.h>
#include <log.h>
#include <mipi_dsi.h>
#include <panel.h>
#include <asm/gpio.h>
#include <power/regulator.h>
+#define EDID_I2C_ADDR 0x50
+
struct simple_panel_priv {
struct udevice *reg;
struct udevice *backlight;
struct gpio_desc enable;
};
-/* List of supported DSI panels */
-enum {
- PANEL_NON_DSI,
- PANASONIC_VVX10F004B00,
-};
-
-static const struct mipi_dsi_panel_plat panasonic_vvx10f004b00 = {
- .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
- MIPI_DSI_CLOCK_NON_CONTINUOUS,
- .format = MIPI_DSI_FMT_RGB888,
- .lanes = 4,
-};
-
static int simple_panel_enable_backlight(struct udevice *dev)
{
struct simple_panel_priv *priv = dev_get_priv(dev);
@@ -62,13 +52,71 @@
return 0;
}
+#if CONFIG_IS_ENABLED(I2C_EDID) && CONFIG_IS_ENABLED(DM_I2C)
+static int simple_panel_get_edid_timing(struct udevice *dev,
+ struct display_timing *timings)
+{
+ struct udevice *panel_ddc, *panel_edid;
+ struct display_timing edid_timing;
+ u8 edid_buf[EDID_SIZE] = { 0 };
+ int ret, bpc;
+ /* Check for DDC i2c if no timings are provided */
+ ret = uclass_get_device_by_phandle(UCLASS_I2C, dev,
+ "ddc-i2c-bus",
+ &panel_ddc);
+ if (ret) {
+ log_debug("%s: cannot get DDC i2c bus: error %d\n",
+ __func__, ret);
+ return ret;
+ }
+
+ ret = dm_i2c_probe(panel_ddc, EDID_I2C_ADDR, 0, &panel_edid);
+ if (ret) {
+ log_debug("%s: cannot probe EDID: error %d\n",
+ __func__, ret);
+ return ret;
+ }
+
+ ret = dm_i2c_read(panel_edid, 0, edid_buf, sizeof(edid_buf));
+ if (ret) {
+ log_debug("%s: cannot dump EDID buffer: error %d\n",
+ __func__, ret);
+ return ret;
+ }
+
+ ret = edid_get_timing(edid_buf, sizeof(edid_buf),
+ &edid_timing, &bpc);
+ if (ret) {
+ log_debug("%s: cannot decode EDID info: error %d\n",
+ __func__, ret);
+ return ret;
+ }
+
+ memcpy(timings, &edid_timing, sizeof(*timings));
+
+ return 0;
+}
+#else
+static int simple_panel_get_edid_timing(struct udevice *dev,
+ struct display_timing *timings)
+{
+ return -ENOTSUPP;
+}
+#endif
+
static int simple_panel_get_display_timing(struct udevice *dev,
struct display_timing *timings)
{
const void *blob = gd->fdt_blob;
+ int ret;
- return fdtdec_decode_display_timing(blob, dev_of_offset(dev),
- 0, timings);
+ /* Check for timing subnode if panel node first */
+ ret = fdtdec_decode_display_timing(blob, dev_of_offset(dev),
+ 0, timings);
+ if (!ret)
+ return ret;
+
+ return simple_panel_get_edid_timing(dev, timings);
}
static int simple_panel_of_to_plat(struct udevice *dev)
@@ -111,7 +159,8 @@
{
struct simple_panel_priv *priv = dev_get_priv(dev);
struct mipi_dsi_panel_plat *plat = dev_get_plat(dev);
- const u32 dsi_data = dev_get_driver_data(dev);
+ struct mipi_dsi_panel_plat *dsi_data =
+ (struct mipi_dsi_panel_plat *)dev_get_driver_data(dev);
int ret;
ret = regulator_set_enable_if_allowed(priv->reg, true);
@@ -121,15 +170,8 @@
return ret;
}
- switch (dsi_data) {
- case PANASONIC_VVX10F004B00:
- memcpy(plat, &panasonic_vvx10f004b00,
- sizeof(panasonic_vvx10f004b00));
- break;
- case PANEL_NON_DSI:
- default:
- break;
- }
+ if (dsi_data)
+ memcpy(plat, dsi_data, sizeof(struct mipi_dsi_panel_plat));
return 0;
}
@@ -140,6 +182,13 @@
.get_display_timing = simple_panel_get_display_timing,
};
+static const struct mipi_dsi_panel_plat panasonic_vvx10f004b00 = {
+ .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
+ MIPI_DSI_CLOCK_NON_CONTINUOUS,
+ .format = MIPI_DSI_FMT_RGB888,
+ .lanes = 4,
+};
+
static const struct udevice_id simple_panel_ids[] = {
{ .compatible = "simple-panel" },
{ .compatible = "auo,b133xtn01" },
@@ -150,7 +199,7 @@
{ .compatible = "sharp,lq123p1jx31" },
{ .compatible = "boe,nv101wxmn51" },
{ .compatible = "panasonic,vvx10f004b00",
- .data = PANASONIC_VVX10F004B00 },
+ .data = (ulong)&panasonic_vvx10f004b00 },
{ }
};
diff --git a/drivers/video/simplefb.c b/drivers/video/simplefb.c
index 235ec76..cb518b1 100644
--- a/drivers/video/simplefb.c
+++ b/drivers/video/simplefb.c
@@ -3,7 +3,6 @@
* (C) Copyright 2017 Rob Clark
*/
-#include <common.h>
#include <dm.h>
#include <fdtdec.h>
#include <fdt_support.h>
@@ -15,14 +14,14 @@
{
struct video_uc_plat *plat = dev_get_uclass_plat(dev);
struct video_priv *uc_priv = dev_get_uclass_priv(dev);
- const void *blob = gd->fdt_blob;
- const int node = dev_of_offset(dev);
+ ofnode node = dev_ofnode(dev);
const char *format;
+ int ret;
fdt_addr_t base;
fdt_size_t size;
+ u32 width, height, rot;
- base = fdtdec_get_addr_size_auto_parent(blob, dev_of_offset(dev->parent),
- node, "reg", 0, &size, false);
+ base = dev_read_addr_size(dev, &size);
if (base == FDT_ADDR_T_NONE) {
debug("%s: Failed to decode memory region\n", __func__);
return -EINVAL;
@@ -41,17 +40,25 @@
debug("%s: Query resolution...\n", __func__);
- uc_priv->xsize = fdtdec_get_uint(blob, node, "width", 0);
- uc_priv->ysize = fdtdec_get_uint(blob, node, "height", 0);
- uc_priv->rot = fdtdec_get_uint(blob, node, "rot", 0);
- if (uc_priv->rot > 3) {
- log_debug("%s: invalid rot\n", __func__);
- return log_msg_ret("rot", -EINVAL);
+ ret = ofnode_read_u32(node, "width", &width);
+ ret = ret ?: ofnode_read_u32(node, "height", &height);
+ if (ret || !width || !height) {
+ log_err("%s: invalid width or height: %d\n", __func__, ret);
+ return ret ?: -EINVAL;
}
+ ofnode_read_u32(node, "rot", &rot);
+ uc_priv->rot = rot;
+ uc_priv->xsize = width;
+ uc_priv->ysize = height;
- format = fdt_getprop(blob, node, "format", NULL);
+ format = ofnode_read_string(node, "format");
debug("%s: %dx%d@%s\n", __func__, uc_priv->xsize, uc_priv->ysize, format);
+ if (!format) {
+ log_err("%s: please add required property \"format\"\n", __func__);
+ return -EINVAL;
+ }
+
if (strcmp(format, "r5g6b5") == 0) {
uc_priv->bpix = VIDEO_BPP16;
} else if (strcmp(format, "a8b8g8r8") == 0 ||
@@ -67,7 +74,7 @@
uc_priv->bpix = VIDEO_BPP32;
uc_priv->format = VIDEO_X2R10G10B10;
} else {
- printf("%s: invalid format: %s\n", __func__, format);
+ log_err("%s: invalid format: %s\n", __func__, format);
return -EINVAL;
}
diff --git a/drivers/video/ssd2828.c b/drivers/video/ssd2828.c
index 948f5e7..4334bbd 100644
--- a/drivers/video/ssd2828.c
+++ b/drivers/video/ssd2828.c
@@ -9,7 +9,6 @@
* interface for driving a MIPI compatible TFT display.
*/
-#include <common.h>
#include <malloc.h>
#include <mipi_display.h>
#include <asm/gpio.h>
diff --git a/drivers/video/stm32/stm32_dsi.c b/drivers/video/stm32/stm32_dsi.c
index a18c1e0..438ed41 100644
--- a/drivers/video/stm32/stm32_dsi.c
+++ b/drivers/video/stm32/stm32_dsi.c
@@ -10,7 +10,6 @@
#define LOG_CATEGORY UCLASS_VIDEO_BRIDGE
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <dsi_host.h>
diff --git a/drivers/video/stm32/stm32_ltdc.c b/drivers/video/stm32/stm32_ltdc.c
index 4f60ba8..0a062c8 100644
--- a/drivers/video/stm32/stm32_ltdc.c
+++ b/drivers/video/stm32/stm32_ltdc.c
@@ -7,7 +7,6 @@
#define LOG_CATEGORY UCLASS_VIDEO
-#include <common.h>
#include <clk.h>
#include <display.h>
#include <dm.h>
diff --git a/drivers/video/sunxi/lcdc.c b/drivers/video/sunxi/lcdc.c
index 73033c3..264d775 100644
--- a/drivers/video/sunxi/lcdc.c
+++ b/drivers/video/sunxi/lcdc.c
@@ -7,7 +7,6 @@
* (C) Copyright 2017 Jernej Skrabec <jernej.skrabec@siol.net>
*/
-#include <common.h>
#include <log.h>
#include <linux/delay.h>
diff --git a/drivers/video/sunxi/sunxi_de2.c b/drivers/video/sunxi/sunxi_de2.c
index e02d359..154641b 100644
--- a/drivers/video/sunxi/sunxi_de2.c
+++ b/drivers/video/sunxi/sunxi_de2.c
@@ -5,7 +5,6 @@
* (C) Copyright 2017 Jernej Skrabec <jernej.skrabec@siol.net>
*/
-#include <common.h>
#include <display.h>
#include <dm.h>
#include <edid.h>
diff --git a/drivers/video/sunxi/sunxi_display.c b/drivers/video/sunxi/sunxi_display.c
index 8da44a1..4a6a89e 100644
--- a/drivers/video/sunxi/sunxi_display.c
+++ b/drivers/video/sunxi/sunxi_display.c
@@ -6,7 +6,7 @@
* (C) Copyright 2014-2015 Hans de Goede <hdegoede@redhat.com>
*/
-#include <common.h>
+#include <config.h>
#include <display.h>
#include <dm.h>
#include <cpu_func.h>
diff --git a/drivers/video/sunxi/sunxi_dw_hdmi.c b/drivers/video/sunxi/sunxi_dw_hdmi.c
index 0324a05..b9c03ea 100644
--- a/drivers/video/sunxi/sunxi_dw_hdmi.c
+++ b/drivers/video/sunxi/sunxi_dw_hdmi.c
@@ -6,7 +6,6 @@
*/
#include <clk.h>
-#include <common.h>
#include <display.h>
#include <dm.h>
#include <dw_hdmi.h>
@@ -358,17 +357,19 @@
sunxi_dw_hdmi_phy_init(&priv->hdmi);
- ret = dw_hdmi_phy_wait_for_hpd(&priv->hdmi);
- if (ret < 0) {
- debug("hdmi can not get hpd signal\n");
- return -1;
- }
+ ret = dw_hdmi_detect_hpd(&priv->hdmi);
+ if (ret < 0)
+ return ret;
dw_hdmi_init(&priv->hdmi);
return 0;
}
+static const struct dw_hdmi_phy_ops dw_hdmi_sunxi_phy_ops = {
+ .phy_set = sunxi_dw_hdmi_phy_cfg,
+};
+
static int sunxi_dw_hdmi_of_to_plat(struct udevice *dev)
{
struct sunxi_dw_hdmi_priv *priv = dev_get_priv(dev);
@@ -379,7 +380,7 @@
hdmi->i2c_clk_high = 0xd8;
hdmi->i2c_clk_low = 0xfe;
hdmi->reg_io_width = 1;
- hdmi->phy_set = sunxi_dw_hdmi_phy_cfg;
+ hdmi->ops = &dw_hdmi_sunxi_phy_ops;
ret = reset_get_bulk(dev, &priv->resets);
if (ret)
diff --git a/drivers/video/sunxi/sunxi_lcd.c b/drivers/video/sunxi/sunxi_lcd.c
index 7a01cc3..953233f 100644
--- a/drivers/video/sunxi/sunxi_lcd.c
+++ b/drivers/video/sunxi/sunxi_lcd.c
@@ -5,7 +5,6 @@
* (C) Copyright 2017 Vasily Khoruzhick <anarsoul@gmail.com>
*/
-#include <common.h>
#include <display.h>
#include <log.h>
#include <video_bridge.h>
diff --git a/drivers/video/sunxi/tve_common.c b/drivers/video/sunxi/tve_common.c
index 3525137..7bc2b3b 100644
--- a/drivers/video/sunxi/tve_common.c
+++ b/drivers/video/sunxi/tve_common.c
@@ -7,7 +7,6 @@
* (C) Copyright 2017 Jernej Skrabec <jernej.skrabec@siol.net>
*/
-#include <common.h>
#include <asm/arch/tve.h>
#include <asm/io.h>
diff --git a/drivers/video/tda19988.c b/drivers/video/tda19988.c
index 2448743..ebc8521 100644
--- a/drivers/video/tda19988.c
+++ b/drivers/video/tda19988.c
@@ -5,7 +5,6 @@
* Based on the Linux driver, (C) 2012 Texas Instruments
*/
-#include <common.h>
#include <dm.h>
#include <display.h>
#include <i2c.h>
diff --git a/drivers/video/tdo-tl070wsh30.c b/drivers/video/tdo-tl070wsh30.c
index 273672d..d772958 100644
--- a/drivers/video/tdo-tl070wsh30.c
+++ b/drivers/video/tdo-tl070wsh30.c
@@ -3,7 +3,6 @@
* Copyright (C) 2020 BayLibre, SAS
* Author: Neil Armstrong <narmstrong@baylibre.com>
*/
-#include <common.h>
#include <backlight.h>
#include <dm.h>
#include <mipi_dsi.h>
diff --git a/drivers/video/tegra124/display.c b/drivers/video/tegra124/display.c
index 9261cc9..abe31e2 100644
--- a/drivers/video/tegra124/display.c
+++ b/drivers/video/tegra124/display.c
@@ -5,7 +5,6 @@
* Extracted from Chromium coreboot commit 3f59b13d
*/
-#include <common.h>
#include <bootstage.h>
#include <dm.h>
#include <edid.h>
@@ -14,6 +13,7 @@
#include <edid.h>
#include <log.h>
#include <part.h>
+#include <time.h>
#include <video.h>
#include <asm/gpio.h>
#include <asm/io.h>
diff --git a/drivers/video/tegra124/dp.c b/drivers/video/tegra124/dp.c
index b27b163..763f7ee 100644
--- a/drivers/video/tegra124/dp.c
+++ b/drivers/video/tegra124/dp.c
@@ -4,12 +4,12 @@
* Copyright 2014 Google Inc.
*/
-#include <common.h>
#include <display.h>
#include <dm.h>
#include <div64.h>
#include <errno.h>
#include <log.h>
+#include <time.h>
#include <video_bridge.h>
#include <asm/io.h>
#include <asm/arch-tegra/dc.h>
diff --git a/drivers/video/tegra124/sor.c b/drivers/video/tegra124/sor.c
index 2586851..1ce5330 100644
--- a/drivers/video/tegra124/sor.c
+++ b/drivers/video/tegra124/sor.c
@@ -3,7 +3,6 @@
* Copyright (c) 2011-2013, NVIDIA Corporation.
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <log.h>
diff --git a/drivers/video/tegra20/Makefile b/drivers/video/tegra20/Makefile
index f0b534c..a75aea2 100644
--- a/drivers/video/tegra20/Makefile
+++ b/drivers/video/tegra20/Makefile
@@ -1,5 +1,5 @@
# SPDX-License-Identifier: GPL-2.0+
obj-$(CONFIG_VIDEO_TEGRA20) += tegra-dc.o
-obj-$(CONFIG_VIDEO_DSI_TEGRA30) += tegra-dsi.o mipi-phy.o
+obj-$(CONFIG_VIDEO_DSI_TEGRA30) += tegra-dsi.o tegra-mipi.o mipi-phy.o
obj-$(CONFIG_TEGRA_BACKLIGHT_PWM) += tegra-pwm-backlight.o
diff --git a/drivers/video/tegra20/mipi-phy.c b/drivers/video/tegra20/mipi-phy.c
index c3ebc40..576262e 100644
--- a/drivers/video/tegra20/mipi-phy.c
+++ b/drivers/video/tegra20/mipi-phy.c
@@ -3,7 +3,6 @@
* Copyright (C) 2013 NVIDIA Corporation
*/
-#include <common.h>
#include <linux/err.h>
#include "mipi-phy.h"
diff --git a/drivers/video/tegra20/tegra-dc.c b/drivers/video/tegra20/tegra-dc.c
index f53ad46..d073da7 100644
--- a/drivers/video/tegra20/tegra-dc.c
+++ b/drivers/video/tegra20/tegra-dc.c
@@ -3,8 +3,8 @@
* Copyright (c) 2011 The Chromium OS Authors.
*/
-#include <common.h>
#include <backlight.h>
+#include <cpu_func.h>
#include <dm.h>
#include <fdtdec.h>
#include <log.h>
@@ -21,12 +21,20 @@
#include <asm/arch/clock.h>
#include <asm/arch/funcmux.h>
#include <asm/arch/pinmux.h>
+#include <asm/arch/powergate.h>
#include <asm/arch/pwm.h>
-#include <asm/arch/display.h>
-#include <asm/arch-tegra/timer.h>
+
+#include "tegra-dc.h"
DECLARE_GLOBAL_DATA_PTR;
+/* Holder of Tegra per-SOC DC differences */
+struct tegra_dc_soc_info {
+ bool has_timer;
+ bool has_rgb;
+ bool has_pgate;
+};
+
/* Information about the display controller */
struct tegra_lcd_priv {
int width; /* width in pixels */
@@ -35,16 +43,19 @@
struct display_timing timing;
struct udevice *panel;
struct dc_ctlr *dc; /* Display controller regmap */
+ const struct tegra_dc_soc_info *soc;
fdt_addr_t frame_buffer; /* Address of frame buffer */
unsigned pixel_clock; /* Pixel clock in Hz */
int dc_clk[2]; /* Contains clk and its parent */
+ ulong scdiv; /* Clock divider used by disp_clk_ctrl */
bool rotation; /* 180 degree panel turn */
+ bool pipe; /* DC controller: 0 for A, 1 for B */
};
enum {
/* Maximum LCD size we support */
- LCD_MAX_WIDTH = 1920,
- LCD_MAX_HEIGHT = 1200,
+ LCD_MAX_WIDTH = 2560,
+ LCD_MAX_HEIGHT = 1600,
LCD_MAX_LOG2_BPP = VIDEO_BPP16,
};
@@ -110,13 +121,11 @@
writel(val, &dc->cmd.state_ctrl);
}
-static int update_display_mode(struct dc_disp_reg *disp,
- struct tegra_lcd_priv *priv)
+static int update_display_mode(struct tegra_lcd_priv *priv)
{
+ struct dc_disp_reg *disp = &priv->dc->disp;
struct display_timing *dt = &priv->timing;
unsigned long val;
- unsigned long rate;
- unsigned long div;
writel(0x0, &disp->disp_timing_opt);
@@ -128,29 +137,22 @@
&disp->front_porch);
writel(dt->hactive.typ | (dt->vactive.typ << 16), &disp->disp_active);
- val = DE_SELECT_ACTIVE << DE_SELECT_SHIFT;
- val |= DE_CONTROL_NORMAL << DE_CONTROL_SHIFT;
- writel(val, &disp->data_enable_opt);
+ if (priv->soc->has_rgb) {
+ val = DE_SELECT_ACTIVE << DE_SELECT_SHIFT;
+ val |= DE_CONTROL_NORMAL << DE_CONTROL_SHIFT;
+ writel(val, &disp->data_enable_opt);
- val = DATA_FORMAT_DF1P1C << DATA_FORMAT_SHIFT;
- val |= DATA_ALIGNMENT_MSB << DATA_ALIGNMENT_SHIFT;
- val |= DATA_ORDER_RED_BLUE << DATA_ORDER_SHIFT;
- writel(val, &disp->disp_interface_ctrl);
+ val = DATA_FORMAT_DF1P1C << DATA_FORMAT_SHIFT;
+ val |= DATA_ALIGNMENT_MSB << DATA_ALIGNMENT_SHIFT;
+ val |= DATA_ORDER_RED_BLUE << DATA_ORDER_SHIFT;
+ writel(val, &disp->disp_interface_ctrl);
+ }
- /*
- * The pixel clock divider is in 7.1 format (where the bottom bit
- * represents 0.5). Here we calculate the divider needed to get from
- * the display clock (typically 600MHz) to the pixel clock. We round
- * up or down as requried.
- */
- rate = clock_get_periph_rate(priv->dc_clk[0], priv->dc_clk[1]);
- div = ((rate * 2 + priv->pixel_clock / 2) / priv->pixel_clock) - 2;
- debug("Display clock %lu, divider %lu\n", rate, div);
-
- writel(0x00010001, &disp->shift_clk_opt);
+ if (priv->soc->has_rgb)
+ writel(0x00010001, &disp->shift_clk_opt);
val = PIXEL_CLK_DIVIDER_PCD1 << PIXEL_CLK_DIVIDER_SHIFT;
- val |= div << SHIFT_CLK_DIVIDER_SHIFT;
+ val |= priv->scdiv << SHIFT_CLK_DIVIDER_SHIFT;
writel(val, &disp->disp_clk_ctrl);
return 0;
@@ -174,6 +176,7 @@
writel(val, &cmd->disp_pow_ctrl);
val = readl(&cmd->disp_cmd);
+ val &= ~CTRL_MODE_MASK;
val |= CTRL_MODE_C_DISPLAY << CTRL_MODE_SHIFT;
writel(val, &cmd->disp_cmd);
}
@@ -215,8 +218,11 @@
0x00020000,
};
-static void rgb_enable(struct dc_com_reg *com)
+static void rgb_enable(struct tegra_lcd_priv *priv)
{
+ struct dc_com_reg *com = &priv->dc->com;
+ struct display_timing *dt = &priv->timing;
+ u32 value;
int i;
for (i = 0; i < PIN_REG_COUNT; i++) {
@@ -225,16 +231,31 @@
writel(rgb_data_tab[i], &com->pin_output_data[i]);
}
+ /* configure H- and V-sync signal polarities */
+ value = readl(&com->pin_output_polarity[1]);
+
+ if (dt->flags & DISPLAY_FLAGS_HSYNC_LOW)
+ value |= LHS_OUTPUT_POLARITY_LOW;
+ else
+ value &= ~LHS_OUTPUT_POLARITY_LOW;
+
+ if (dt->flags & DISPLAY_FLAGS_VSYNC_LOW)
+ value |= LVS_OUTPUT_POLARITY_LOW;
+ else
+ value &= ~LVS_OUTPUT_POLARITY_LOW;
+
+ writel(value, &com->pin_output_polarity[1]);
+
for (i = 0; i < PIN_OUTPUT_SEL_COUNT; i++)
writel(rgb_sel_tab[i], &com->pin_output_sel[i]);
}
-static int setup_window(struct disp_ctl_win *win,
- struct tegra_lcd_priv *priv)
+static int setup_window(struct tegra_lcd_priv *priv,
+ struct disp_ctl_win *win)
{
if (priv->rotation) {
- win->x = priv->width * 2;
- win->y = priv->height;
+ win->x = priv->width * 2 - 1;
+ win->y = priv->height - 1;
} else {
win->x = 0;
win->y = 0;
@@ -274,12 +295,11 @@
* You should pass in the U-Boot address here, and check the contents of
* struct tegra_lcd_priv to see what was actually chosen.
*
- * @param blob Device tree blob
* @param priv Driver's private data
* @param default_lcd_base Default address of LCD frame buffer
* Return: 0 if ok, -1 on error (unsupported bits per pixel)
*/
-static int tegra_display_probe(const void *blob, struct tegra_lcd_priv *priv,
+static int tegra_display_probe(struct tegra_lcd_priv *priv,
void *default_lcd_base)
{
struct disp_ctl_win window;
@@ -288,12 +308,29 @@
priv->frame_buffer = (u32)default_lcd_base;
/*
- * We halve the rate if DISP1 paret is PLLD, since actual parent
+ * We halve the rate if DISP1 parent is PLLD, since actual parent
* is plld_out0 which is PLLD divided by 2.
*/
if (priv->dc_clk[1] == CLOCK_ID_DISPLAY)
rate /= 2;
+#ifndef CONFIG_TEGRA20
+ /* PLLD2 obeys same rules as PLLD but it is present only on T30+ */
+ if (priv->dc_clk[1] == CLOCK_ID_DISPLAY2)
+ rate /= 2;
+#endif
+
+ /*
+ * The pixel clock divider is in 7.1 format (where the bottom bit
+ * represents 0.5). Here we calculate the divider needed to get from
+ * the display clock (typically 600MHz) to the pixel clock. We round
+ * up or down as required.
+ */
+ if (!priv->scdiv)
+ priv->scdiv = ((rate * 2 + priv->pixel_clock / 2)
+ / priv->pixel_clock) - 2;
+ debug("Display clock %lu, divider %lu\n", rate, priv->scdiv);
+
/*
* HOST1X is init by default at 150MHz with PLLC as parent
*/
@@ -303,13 +340,17 @@
rate);
basic_init(&priv->dc->cmd);
- basic_init_timer(&priv->dc->disp);
- rgb_enable(&priv->dc->com);
+
+ if (priv->soc->has_timer)
+ basic_init_timer(&priv->dc->disp);
+
+ if (priv->soc->has_rgb)
+ rgb_enable(priv);
if (priv->pixel_clock)
- update_display_mode(&priv->dc->disp, priv);
+ update_display_mode(priv);
- if (setup_window(&window, priv))
+ if (setup_window(priv, &window))
return -1;
update_window(priv, &window);
@@ -322,7 +363,6 @@
struct video_uc_plat *plat = dev_get_uclass_plat(dev);
struct video_priv *uc_priv = dev_get_uclass_priv(dev);
struct tegra_lcd_priv *priv = dev_get_priv(dev);
- const void *blob = gd->fdt_blob;
int ret;
/* Initialize the Tegra display controller */
@@ -330,8 +370,42 @@
funcmux_select(PERIPH_ID_DISP1, FUNCMUX_DEFAULT);
#endif
- if (tegra_display_probe(blob, priv, (void *)plat->base)) {
- printf("%s: Failed to probe display driver\n", __func__);
+ if (priv->soc->has_pgate) {
+ uint powergate;
+
+ if (priv->pipe)
+ powergate = TEGRA_POWERGATE_DISB;
+ else
+ powergate = TEGRA_POWERGATE_DIS;
+
+ ret = tegra_powergate_power_off(powergate);
+ if (ret < 0) {
+ log_err("failed to power off DISP gate: %d", ret);
+ return ret;
+ }
+
+ ret = tegra_powergate_sequence_power_up(powergate,
+ priv->dc_clk[0]);
+ if (ret < 0) {
+ log_err("failed to power up DISP gate: %d", ret);
+ return ret;
+ }
+ }
+
+ /* Get shift clock divider from Tegra DSI if used */
+ if (!strcmp(priv->panel->name, TEGRA_DSI_A) ||
+ !strcmp(priv->panel->name, TEGRA_DSI_B)) {
+ struct tegra_dc_plat *dc_plat = dev_get_plat(priv->panel);
+
+ priv->scdiv = dc_plat->scdiv;
+ }
+
+ /* Clean the framebuffer area */
+ memset((u8 *)plat->base, 0, plat->size);
+ flush_dcache_all();
+
+ if (tegra_display_probe(priv, (void *)plat->base)) {
+ debug("%s: Failed to probe display driver\n", __func__);
return -1;
}
@@ -346,12 +420,6 @@
return ret;
}
- ret = panel_set_backlight(priv->panel, BACKLIGHT_DEFAULT);
- if (ret) {
- debug("%s: Cannot set backlight to default, ret=%d\n", __func__, ret);
- return ret;
- }
-
mmu_set_region_dcache_behaviour(priv->frame_buffer, plat->size,
DCACHE_WRITETHROUGH);
@@ -361,10 +429,10 @@
uc_priv->xsize = priv->width;
uc_priv->ysize = priv->height;
uc_priv->bpix = priv->log2_bpp;
- debug("LCD frame buffer at %pa, size %x\n", &priv->frame_buffer,
+ debug("LCD frame buffer at %08x, size %x\n", priv->frame_buffer,
plat->size);
- return 0;
+ return panel_set_backlight(priv->panel, BACKLIGHT_DEFAULT);
}
static int tegra_lcd_of_to_plat(struct udevice *dev)
@@ -383,6 +451,8 @@
return -EINVAL;
}
+ priv->soc = (struct tegra_dc_soc_info *)dev_get_driver_data(dev);
+
ret = clock_decode_pair(dev, priv->dc_clk);
if (ret < 0) {
debug("%s: Cannot decode clocks for '%s' (ret = %d)\n",
@@ -392,6 +462,9 @@
priv->rotation = dev_read_bool(dev, "nvidia,180-rotation");
+ if (!strcmp(dev->name, TEGRA_DC_B))
+ priv->pipe = 1;
+
rgb = fdt_subnode_offset(blob, node, "rgb");
if (rgb < 0) {
debug("%s: Cannot find rgb subnode for '%s' (ret=%d)\n",
@@ -417,12 +490,14 @@
return ret;
}
+ /* Fill the platform data for internal devices */
if (!strcmp(priv->panel->name, TEGRA_DSI_A) ||
!strcmp(priv->panel->name, TEGRA_DSI_B)) {
struct tegra_dc_plat *dc_plat = dev_get_plat(priv->panel);
dc_plat->dev = dev;
dc_plat->dc = priv->dc;
+ dc_plat->pipe = priv->pipe;
}
ret = panel_get_display_timing(priv->panel, &priv->timing);
@@ -464,19 +539,46 @@
static const struct video_ops tegra_lcd_ops = {
};
+static const struct tegra_dc_soc_info tegra20_dc_soc_info = {
+ .has_timer = true,
+ .has_rgb = true,
+ .has_pgate = false,
+};
+
+static const struct tegra_dc_soc_info tegra30_dc_soc_info = {
+ .has_timer = false,
+ .has_rgb = true,
+ .has_pgate = false,
+};
+
+static const struct tegra_dc_soc_info tegra114_dc_soc_info = {
+ .has_timer = false,
+ .has_rgb = false,
+ .has_pgate = true,
+};
+
static const struct udevice_id tegra_lcd_ids[] = {
- { .compatible = "nvidia,tegra20-dc" },
- { .compatible = "nvidia,tegra30-dc" },
- { }
+ {
+ .compatible = "nvidia,tegra20-dc",
+ .data = (ulong)&tegra20_dc_soc_info
+ }, {
+ .compatible = "nvidia,tegra30-dc",
+ .data = (ulong)&tegra30_dc_soc_info
+ }, {
+ .compatible = "nvidia,tegra114-dc",
+ .data = (ulong)&tegra114_dc_soc_info
+ }, {
+ /* sentinel */
+ }
};
U_BOOT_DRIVER(tegra_lcd) = {
- .name = "tegra_lcd",
- .id = UCLASS_VIDEO,
- .of_match = tegra_lcd_ids,
- .ops = &tegra_lcd_ops,
- .bind = tegra_lcd_bind,
- .probe = tegra_lcd_probe,
+ .name = "tegra_lcd",
+ .id = UCLASS_VIDEO,
+ .of_match = tegra_lcd_ids,
+ .ops = &tegra_lcd_ops,
+ .bind = tegra_lcd_bind,
+ .probe = tegra_lcd_probe,
.of_to_plat = tegra_lcd_of_to_plat,
.priv_auto = sizeof(struct tegra_lcd_priv),
};
diff --git a/drivers/video/tegra20/tegra-dc.h b/drivers/video/tegra20/tegra-dc.h
new file mode 100644
index 0000000..05042da
--- /dev/null
+++ b/drivers/video/tegra20/tegra-dc.h
@@ -0,0 +1,45 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * (C) Copyright 2010
+ * NVIDIA Corporation <www.nvidia.com>
+ */
+
+#ifndef _TEGRA_DC_H
+#define _TEGRA_DC_H
+
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
+/* arch-tegra/dc exists only because T124 uses it */
+#include <asm/arch-tegra/dc.h>
+
+#define TEGRA_DC_A "dc@54200000"
+#define TEGRA_DC_B "dc@54240000"
+#define TEGRA_DSI_A "dsi@54300000"
+#define TEGRA_DSI_B "dsi@54400000"
+
+struct tegra_dc_plat {
+ struct udevice *dev; /* Display controller device */
+ struct dc_ctlr *dc; /* Display controller regmap */
+ bool pipe; /* DC number: 0 for A, 1 for B */
+ ulong scdiv; /* Shift clock divider */
+};
+
+/* This holds information about a window which can be displayed */
+struct disp_ctl_win {
+ enum win_color_depth_id fmt; /* Color depth/format */
+ unsigned int bpp; /* Bits per pixel */
+ phys_addr_t phys_addr; /* Physical address in memory */
+ unsigned int x; /* Horizontal address offset (bytes) */
+ unsigned int y; /* Veritical address offset (bytes) */
+ unsigned int w; /* Width of source window */
+ unsigned int h; /* Height of source window */
+ unsigned int stride; /* Number of bytes per line */
+ unsigned int out_x; /* Left edge of output window (col) */
+ unsigned int out_y; /* Top edge of output window (row) */
+ unsigned int out_w; /* Width of output window in pixels */
+ unsigned int out_h; /* Height of output window in pixels */
+};
+
+#endif /* _TEGRA_DC_H */
diff --git a/drivers/video/tegra20/tegra-dsi.c b/drivers/video/tegra20/tegra-dsi.c
index a48f9c8..35a8e6c 100644
--- a/drivers/video/tegra20/tegra-dsi.c
+++ b/drivers/video/tegra20/tegra-dsi.c
@@ -4,7 +4,6 @@
* Copyright (c) 2022 Svyatoslav Ryhel <clamor95@gmail.com>
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <misc.h>
@@ -12,6 +11,7 @@
#include <mipi_dsi.h>
#include <backlight.h>
#include <panel.h>
+#include <reset.h>
#include <linux/delay.h>
#include <linux/err.h>
#include <linux/time.h>
@@ -20,17 +20,24 @@
#include <asm/gpio.h>
#include <asm/io.h>
#include <asm/arch/clock.h>
-#include <asm/arch/display.h>
-#include <asm/arch-tegra30/dsi.h>
+#include "tegra-dc.h"
+#include "tegra-dsi.h"
#include "mipi-phy.h"
+/* List of supported DSI bridges */
+enum {
+ DSI_V0,
+ DSI_V1,
+};
+
struct tegra_dsi_priv {
struct mipi_dsi_host host;
struct mipi_dsi_device device;
struct mipi_dphy_timing dphy_timing;
struct udevice *panel;
+ struct udevice *mipi;
struct display_timing timing;
struct dsi_ctlr *dsi;
@@ -41,6 +48,8 @@
int dsi_clk;
int video_fifo_depth;
int host_fifo_depth;
+
+ u32 version;
};
static void tegra_dc_enable_controller(struct udevice *dev)
@@ -501,6 +510,41 @@
writel(value, TEGRA_VI_BASE + (CSI_CIL_PAD_CONFIG << 2));
}
+static void tegra_dsi_mipi_calibrate(struct tegra_dsi_priv *priv)
+{
+ struct dsi_pad_ctrl_reg *pad = &priv->dsi->pad;
+ u32 value;
+ int ret;
+
+ ret = misc_set_enabled(priv->mipi, true);
+ if (ret)
+ log_debug("%s: failed to enable MIPI calibration: %d\n",
+ __func__, ret);
+
+ writel(0, &pad->pad_ctrl);
+ writel(0, &pad->pad_ctrl_1);
+ writel(0, &pad->pad_ctrl_2);
+ writel(0, &pad->pad_ctrl_3);
+ writel(0, &pad->pad_ctrl_4);
+
+ /* DSI pad enable */
+ value = DSI_PAD_CONTROL_VS1_PULLDN(0) | DSI_PAD_CONTROL_VS1_PDIO(0);
+ writel(value, &pad->pad_ctrl);
+
+ value = DSI_PAD_SLEW_UP(0x7) | DSI_PAD_SLEW_DN(0x7) |
+ DSI_PAD_LP_UP(0x1) | DSI_PAD_LP_DN(0x1) |
+ DSI_PAD_OUT_CLK(0x0);
+ writel(value, &pad->pad_ctrl_2);
+
+ value = DSI_PAD_PREEMP_PD_CLK(0x3) | DSI_PAD_PREEMP_PU_CLK(0x3) |
+ DSI_PAD_PREEMP_PD(0x03) | DSI_PAD_PREEMP_PU(0x3);
+ writel(value, &pad->pad_ctrl_3);
+
+ ret = misc_write(priv->mipi, 0, NULL, 0);
+ if (ret)
+ log_debug("%s: MIPI calibration failed %d\n", __func__, ret);
+}
+
static void tegra_dsi_set_timeout(struct dsi_timeout_reg *rtimeout,
unsigned long bclk,
unsigned int vrefresh)
@@ -664,10 +708,25 @@
u32 value;
int ret;
+ /* If for some reasone DSI is enabled then it needs to
+ * be disabled in order for the panel initialization
+ * commands to be properly sent.
+ */
+ value = readl(&misc->dsi_pwr_ctrl);
+
+ if (value & DSI_POWER_CONTROL_ENABLE) {
+ value = readl(&misc->dsi_pwr_ctrl);
+ value &= ~DSI_POWER_CONTROL_ENABLE;
+ writel(value, &misc->dsi_pwr_ctrl);
+ }
+
/* Disable interrupt */
writel(0, &misc->int_enable);
- tegra_dsi_pad_calibrate(&priv->dsi->pad);
+ if (priv->version)
+ tegra_dsi_mipi_calibrate(priv);
+ else
+ tegra_dsi_pad_calibrate(&priv->dsi->pad);
tegra_dsi_get_muldiv(device->format, &mul, &div);
@@ -706,12 +765,6 @@
if (ret)
return ret;
- tegra_dsi_configure(dev, 0);
-
- ret = panel_set_backlight(priv->panel, BACKLIGHT_DEFAULT);
- if (ret)
- return ret;
-
tegra_dsi_configure(dev, device->mode_flags);
tegra_dc_enable_controller(dev);
@@ -726,8 +779,10 @@
static int tegra_dsi_bridge_set_panel(struct udevice *dev, int percent)
{
- /* Is not used in tegra dc */
- return 0;
+ struct tegra_dsi_priv *priv = dev_get_priv(dev);
+
+ /* Turn on/off backlight */
+ return panel_set_backlight(priv->panel, percent);
}
static int tegra_dsi_panel_timings(struct udevice *dev,
@@ -743,6 +798,7 @@
static void tegra_dsi_init_clocks(struct udevice *dev)
{
struct tegra_dsi_priv *priv = dev_get_priv(dev);
+ struct tegra_dc_plat *dc_plat = dev_get_plat(dev);
struct mipi_dsi_device *device = &priv->device;
unsigned int mul, div;
unsigned long bclk, plld;
@@ -754,6 +810,19 @@
plld = DIV_ROUND_UP(bclk * 8, USEC_PER_SEC);
+ dc_plat->scdiv = ((plld * USEC_PER_SEC +
+ priv->timing.pixelclock.typ / 2) /
+ priv->timing.pixelclock.typ) - 2;
+
+ /*
+ * BUG: If DISP1 is a PLLD/D2 child, it cannot go over 370MHz. The
+ * cause of this is not quite clear. This can be overcomed by
+ * halving the PLLD/D2 if the target rate is > 800MHz. This way
+ * DISP1 and DSI clocks will be equal.
+ */
+ if (plld > 800)
+ plld /= 2;
+
switch (clock_get_osc_freq()) {
case CLOCK_OSC_FREQ_12_0: /* OSC is 12Mhz */
case CLOCK_OSC_FREQ_48_0: /* OSC is 48Mhz */
@@ -790,17 +859,27 @@
struct tegra_dsi_priv *priv = dev_get_priv(dev);
struct mipi_dsi_device *device = &priv->device;
struct mipi_dsi_panel_plat *mipi_plat;
+ struct reset_ctl reset_ctl;
int ret;
+ priv->version = dev_get_driver_data(dev);
+
priv->dsi = (struct dsi_ctlr *)dev_read_addr_ptr(dev);
if (!priv->dsi) {
printf("%s: No display controller address\n", __func__);
return -EINVAL;
}
- priv->video_fifo_depth = 480;
+ priv->video_fifo_depth = 1920;
priv->host_fifo_depth = 64;
+ ret = reset_get_by_name(dev, "dsi", &reset_ctl);
+ if (ret) {
+ log_debug("%s: reset_get_by_name() failed: %d\n",
+ __func__, ret);
+ return ret;
+ }
+
ret = uclass_get_device_by_phandle(UCLASS_REGULATOR, dev,
"avdd-dsi-csi-supply", &priv->avdd);
if (ret)
@@ -814,6 +893,16 @@
return log_ret(ret);
}
+ if (priv->version) {
+ ret = uclass_get_device_by_phandle(UCLASS_MISC, dev,
+ "nvidia,mipi-calibrate",
+ &priv->mipi);
+ if (ret) {
+ log_debug("%s: cannot get MIPI: error %d\n", __func__, ret);
+ return ret;
+ }
+ }
+
panel_get_display_timing(priv->panel, &priv->timing);
mipi_plat = dev_get_plat(priv->panel);
@@ -829,12 +918,17 @@
tegra_dsi_get_format(device->format, &priv->format);
+ reset_assert(&reset_ctl);
+
ret = regulator_set_enable_if_allowed(priv->avdd, true);
if (ret && ret != -ENOSYS)
return ret;
tegra_dsi_init_clocks(dev);
+ mdelay(2);
+ reset_deassert(&reset_ctl);
+
return 0;
}
@@ -845,7 +939,8 @@
};
static const struct udevice_id tegra_dsi_bridge_ids[] = {
- { .compatible = "nvidia,tegra30-dsi" },
+ { .compatible = "nvidia,tegra30-dsi", .data = DSI_V0 },
+ { .compatible = "nvidia,tegra114-dsi", .data = DSI_V1 },
{ }
};
diff --git a/arch/arm/include/asm/arch-tegra30/dsi.h b/drivers/video/tegra20/tegra-dsi.h
similarity index 89%
rename from arch/arm/include/asm/arch-tegra30/dsi.h
rename to drivers/video/tegra20/tegra-dsi.h
index 7ade132..69dac4b 100644
--- a/arch/arm/include/asm/arch-tegra30/dsi.h
+++ b/drivers/video/tegra20/tegra-dsi.h
@@ -4,8 +4,8 @@
* NVIDIA Corporation <www.nvidia.com>
*/
-#ifndef __ASM_ARCH_TEGRA_DSI_H
-#define __ASM_ARCH_TEGRA_DSI_H
+#ifndef _TEGRA_DSI_H
+#define _TEGRA_DSI_H
#ifndef __ASSEMBLY__
#include <linux/bitops.h>
@@ -105,6 +105,10 @@
uint pad_ctrl_cd; /* _PAD_CONTROL_CD_0 */
uint pad_cd_status; /* _PAD_CD_STATUS_0 */
uint dsi_vid_mode_control; /* _DSI_VID_MODE_CONTROL_0 */
+ uint pad_ctrl_1; /* _PAD_CONTROL_1 */
+ uint pad_ctrl_2; /* _PAD_CONTROL_2 */
+ uint pad_ctrl_3; /* _PAD_CONTROL_3 */
+ uint pad_ctrl_4; /* _PAD_CONTROL_4 */
};
/* Display Serial Interface (DSI_) regs */
@@ -184,6 +188,20 @@
#define DSI_PAD_CONTROL_PAD_LPUPADJ(x) (((x) & 0x3) << 14)
#define DSI_PAD_CONTROL_PAD_LPDNADJ(x) (((x) & 0x3) << 12)
+#define DSI_PAD_CONTROL_VS1_PDIO(x) (((x) & 0xf) << 0)
+#define DSI_PAD_CONTROL_VS1_PULLDN(x) (((x) & 0xf) << 16)
+
+#define DSI_PAD_OUT_CLK(x) (((x) & 0x7) << 0)
+#define DSI_PAD_LP_DN(x) (((x) & 0x7) << 4)
+#define DSI_PAD_LP_UP(x) (((x) & 0x7) << 8)
+#define DSI_PAD_SLEW_DN(x) (((x) & 0x7) << 12)
+#define DSI_PAD_SLEW_UP(x) (((x) & 0x7) << 16)
+
+#define DSI_PAD_PREEMP_PD_CLK(x) (((x) & 0x3) << 12)
+#define DSI_PAD_PREEMP_PU_CLK(x) (((x) & 0x3) << 8)
+#define DSI_PAD_PREEMP_PD(x) (((x) & 0x3) << 4)
+#define DSI_PAD_PREEMP_PU(x) (((x) & 0x3) << 0)
+
/*
* pixel format as used in the DSI_CONTROL_FORMAT field
*/
@@ -214,4 +232,4 @@
#define PAD_DRIV_DN_REF(x) (((x) & 0x7) << 16)
#define PAD_DRIV_UP_REF(x) (((x) & 0x7) << 8)
-#endif /* __ASM_ARCH_TEGRA_DSI_H */
+#endif /* _TEGRA_DSI_H */
diff --git a/drivers/video/tegra20/tegra-mipi.c b/drivers/video/tegra20/tegra-mipi.c
new file mode 100644
index 0000000..2df3c1a
--- /dev/null
+++ b/drivers/video/tegra20/tegra-mipi.c
@@ -0,0 +1,188 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2013 NVIDIA Corporation
+ * Copyright (c) 2023 Svyatoslav Ryhel <clamor95@gmail.com>
+ */
+
+#include <dm.h>
+#include <clk.h>
+#include <misc.h>
+#include <linux/delay.h>
+#include <linux/iopoll.h>
+
+#include <asm/io.h>
+
+/* MIPI control registers 0x00 ~ 0x60 */
+struct mipi_ctlr {
+ uint mipi_cal_ctrl;
+ uint mipi_cal_autocal_ctrl;
+ uint mipi_cal_status;
+
+ uint unused1[2];
+
+ uint mipi_cal_config_csia;
+ uint mipi_cal_config_csib;
+ uint mipi_cal_config_csic;
+ uint mipi_cal_config_csid;
+ uint mipi_cal_config_csie;
+
+ uint unused2[4];
+
+ uint mipi_cal_config_dsia;
+ uint mipi_cal_config_dsib;
+ uint mipi_cal_config_dsic;
+ uint mipi_cal_config_dsid;
+
+ uint unused3[4];
+
+ uint mipi_cal_bias_pad_cfg0;
+ uint mipi_cal_bias_pad_cfg1;
+ uint mipi_cal_bias_pad_cfg2;
+};
+
+#define MIPI_CAL_CTRL_NOISE_FILTER(x) (((x) & 0xf) << 26)
+#define MIPI_CAL_CTRL_PRESCALE(x) (((x) & 0x3) << 24)
+#define MIPI_CAL_CTRL_CLKEN_OVR BIT(4)
+#define MIPI_CAL_CTRL_START BIT(0)
+
+#define MIPI_CAL_STATUS_DONE BIT(16)
+#define MIPI_CAL_STATUS_ACTIVE BIT(0)
+
+#define MIPI_CAL_OVERIDE(x) (((x) & 0x1) << 30)
+#define MIPI_CAL_SEL(x) (((x) & 0x1) << 21)
+#define MIPI_CAL_HSPDOS(x) (((x) & 0x1f) << 16)
+#define MIPI_CAL_HSPUOS(x) (((x) & 0x1f) << 8)
+#define MIPI_CAL_TERMOS(x) (((x) & 0x1f) << 0)
+
+#define MIPI_CAL_BIAS_PAD_PDVCLAMP BIT(1)
+#define MIPI_CAL_BIAS_PAD_E_VCLAMP_REF BIT(0)
+
+#define MIPI_CAL_BIAS_PAD_DRV_DN_REF(x) (((x) & 0x7) << 16)
+#define MIPI_CAL_BIAS_PAD_DRV_UP_REF(x) (((x) & 0x7) << 8)
+
+#define MIPI_CAL_BIAS_PAD_VCLAMP(x) (((x) & 0x7) << 16)
+#define MIPI_CAL_BIAS_PAD_VAUXP(x) (((x) & 0x7) << 4)
+#define MIPI_CAL_BIAS_PAD_PDVREG BIT(1)
+
+struct tegra_mipi_priv {
+ struct mipi_ctlr *mipi;
+ struct clk *mipi_cal;
+};
+
+static int tegra_mipi_calibrate(struct udevice *dev, int offset, const void *buf,
+ int size)
+{
+ struct tegra_mipi_priv *priv = dev_get_priv(dev);
+ u32 value;
+
+ value = MIPI_CAL_BIAS_PAD_DRV_DN_REF(0x2) |
+ MIPI_CAL_BIAS_PAD_DRV_UP_REF(0x0);
+ writel(value, &priv->mipi->mipi_cal_bias_pad_cfg1);
+
+ value = readl(&priv->mipi->mipi_cal_bias_pad_cfg2);
+ value &= ~MIPI_CAL_BIAS_PAD_VCLAMP(0x7);
+ value &= ~MIPI_CAL_BIAS_PAD_VAUXP(0x7);
+ writel(value, &priv->mipi->mipi_cal_bias_pad_cfg2);
+
+ value = MIPI_CAL_OVERIDE(0x0) | MIPI_CAL_SEL(0x1) |
+ MIPI_CAL_HSPDOS(0x0) | MIPI_CAL_HSPUOS(0x4) |
+ MIPI_CAL_TERMOS(0x5);
+ writel(value, &priv->mipi->mipi_cal_config_dsia);
+ writel(value, &priv->mipi->mipi_cal_config_dsib);
+
+ /* Deselect PAD C */
+ value = readl(&priv->mipi->mipi_cal_config_dsic);
+ value &= ~(MIPI_CAL_SEL(0x1));
+ writel(value, &priv->mipi->mipi_cal_config_dsic);
+
+ /* Deselect PAD D */
+ value = readl(&priv->mipi->mipi_cal_config_dsid);
+ value &= ~(MIPI_CAL_SEL(0x1));
+ writel(value, &priv->mipi->mipi_cal_config_dsid);
+
+ value = readl(&priv->mipi->mipi_cal_ctrl);
+ value &= ~MIPI_CAL_CTRL_NOISE_FILTER(0xf);
+ value &= ~MIPI_CAL_CTRL_PRESCALE(0x3);
+ value |= MIPI_CAL_CTRL_NOISE_FILTER(0xa) |
+ MIPI_CAL_CTRL_PRESCALE(0x2) |
+ MIPI_CAL_CTRL_CLKEN_OVR;
+ writel(value, &priv->mipi->mipi_cal_ctrl);
+
+ /* clear any pending status bits */
+ value = readl(&priv->mipi->mipi_cal_status);
+ writel(value, &priv->mipi->mipi_cal_status);
+
+ value = readl(&priv->mipi->mipi_cal_ctrl);
+ value |= MIPI_CAL_CTRL_START;
+ writel(value, &priv->mipi->mipi_cal_ctrl);
+
+ /*
+ * Wait for min 72uS to let calibration logic finish calibration
+ * sequence codes before waiting for pads idle state to apply the
+ * results.
+ */
+ udelay(80);
+
+ return readl_poll_sleep_timeout(&priv->mipi->mipi_cal_status, value,
+ !(value & MIPI_CAL_STATUS_ACTIVE) &&
+ (value & MIPI_CAL_STATUS_DONE), 100,
+ 250000);
+}
+
+static int tegra_mipi_enable(struct udevice *dev, bool val)
+{
+ struct tegra_mipi_priv *priv = dev_get_priv(dev);
+ u32 value;
+
+ clk_enable(priv->mipi_cal);
+
+ value = readl(&priv->mipi->mipi_cal_bias_pad_cfg0);
+ value &= ~MIPI_CAL_BIAS_PAD_PDVCLAMP;
+ value |= MIPI_CAL_BIAS_PAD_E_VCLAMP_REF;
+ writel(value, &priv->mipi->mipi_cal_bias_pad_cfg0);
+
+ value = readl(&priv->mipi->mipi_cal_bias_pad_cfg2);
+ value &= ~MIPI_CAL_BIAS_PAD_PDVREG;
+ writel(value, &priv->mipi->mipi_cal_bias_pad_cfg2);
+
+ return 0;
+}
+
+static const struct misc_ops tegra_mipi_ops = {
+ .write = tegra_mipi_calibrate,
+ .set_enabled = tegra_mipi_enable,
+};
+
+static int tegra_mipi_probe(struct udevice *dev)
+{
+ struct tegra_mipi_priv *priv = dev_get_priv(dev);
+
+ priv->mipi = (struct mipi_ctlr *)dev_read_addr_ptr(dev);
+ if (!priv->mipi) {
+ log_debug("%s: no MIPI controller address\n", __func__);
+ return -EINVAL;
+ }
+
+ priv->mipi_cal = devm_clk_get(dev, NULL);
+ if (IS_ERR(priv->mipi_cal)) {
+ log_debug("%s: Could not get MIPI clock: %ld\n",
+ __func__, PTR_ERR(priv->mipi_cal));
+ return PTR_ERR(priv->mipi_cal);
+ }
+
+ return 0;
+}
+
+static const struct udevice_id tegra_mipi_ids[] = {
+ { .compatible = "nvidia,tegra114-mipi" },
+ { }
+};
+
+U_BOOT_DRIVER(tegra_mipi) = {
+ .name = "tegra_mipi",
+ .id = UCLASS_MISC,
+ .ops = &tegra_mipi_ops,
+ .of_match = tegra_mipi_ids,
+ .probe = tegra_mipi_probe,
+ .priv_auto = sizeof(struct tegra_mipi_priv),
+};
diff --git a/drivers/video/tegra20/tegra-pwm-backlight.c b/drivers/video/tegra20/tegra-pwm-backlight.c
index bb677da..79d8a02 100644
--- a/drivers/video/tegra20/tegra-pwm-backlight.c
+++ b/drivers/video/tegra20/tegra-pwm-backlight.c
@@ -6,7 +6,6 @@
#define LOG_CATEGORY UCLASS_PANEL_BACKLIGHT
#include <backlight.h>
-#include <common.h>
#include <dm.h>
#include <i2c.h>
#include <log.h>
@@ -15,7 +14,8 @@
#include <asm/io.h>
#include <asm/gpio.h>
-#include <asm/arch/display.h>
+
+#include "tegra-dc.h"
#define TEGRA_DISPLAY_A_BASE 0x54200000
#define TEGRA_DISPLAY_B_BASE 0x54240000
diff --git a/drivers/video/ti/tilcdc-panel.c b/drivers/video/ti/tilcdc-panel.c
index df95086..d407652 100644
--- a/drivers/video/ti/tilcdc-panel.c
+++ b/drivers/video/ti/tilcdc-panel.c
@@ -5,7 +5,6 @@
* Copyright (C) 2020 Dario Binacchi <dariobin@libero.it>
*/
-#include <common.h>
#include <backlight.h>
#include <clk.h>
#include <display.h>
diff --git a/drivers/video/ti/tilcdc.c b/drivers/video/ti/tilcdc.c
index 2734754..493e2f1 100644
--- a/drivers/video/ti/tilcdc.c
+++ b/drivers/video/ti/tilcdc.c
@@ -3,7 +3,6 @@
* Copyright (C) 2020 Dario Binacchi <dariobin@libero.it>
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <dm/device_compat.h>
diff --git a/drivers/video/tidss/tidss_drv.c b/drivers/video/tidss/tidss_drv.c
index 1380c6b..865d4bd 100644
--- a/drivers/video/tidss/tidss_drv.c
+++ b/drivers/video/tidss/tidss_drv.c
@@ -9,7 +9,6 @@
* Author: Tomi Valkeinen <tomi.valkeinen@ti.com>
*/
-#include <common.h>
#include <dm.h>
#include <clk.h>
#include <log.h>
diff --git a/drivers/video/vesa.c b/drivers/video/vesa.c
index 50912c5..ab756ac 100644
--- a/drivers/video/vesa.c
+++ b/drivers/video/vesa.c
@@ -3,7 +3,6 @@
* Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <pci.h>
diff --git a/drivers/video/vidconsole-uclass.c b/drivers/video/vidconsole-uclass.c
index 5f89f6a..80e7adf 100644
--- a/drivers/video/vidconsole-uclass.c
+++ b/drivers/video/vidconsole-uclass.c
@@ -9,7 +9,6 @@
#define LOG_CATEGORY UCLASS_VIDEO_CONSOLE
-#include <common.h>
#include <abuf.h>
#include <charset.h>
#include <command.h>
@@ -126,6 +125,7 @@
priv->xcur_frac = VID_TO_POS(x);
priv->xstart_frac = priv->xcur_frac;
priv->ycur = y;
+ vidconsole_entry_start(dev);
}
/**
@@ -135,8 +135,10 @@
* @row: new row
* @col: new column
*/
-static void set_cursor_position(struct vidconsole_priv *priv, int row, int col)
+static void set_cursor_position(struct udevice *dev, int row, int col)
{
+ struct vidconsole_priv *priv = dev_get_uclass_priv(dev);
+
/*
* Ensure we stay in the bounds of the screen.
*/
@@ -145,9 +147,7 @@
if (col >= priv->cols)
col = priv->cols - 1;
- priv->ycur = row * priv->y_charsize;
- priv->xcur_frac = priv->xstart_frac +
- VID_TO_POS(col * priv->x_charsize);
+ vidconsole_position_cursor(dev, col, row);
}
/**
@@ -194,7 +194,7 @@
int row = priv->row_saved;
int col = priv->col_saved;
- set_cursor_position(priv, row, col);
+ set_cursor_position(dev, row, col);
priv->escape = 0;
return;
}
@@ -256,7 +256,7 @@
if (row < 0)
row = 0;
/* Right and bottom overflows are handled in the callee. */
- set_cursor_position(priv, row, col);
+ set_cursor_position(dev, row, col);
break;
}
case 'H':
@@ -280,7 +280,7 @@
if (col)
--col;
- set_cursor_position(priv, row, col);
+ set_cursor_position(dev, row, col);
break;
}
diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c
index 3571e62..ff1382f 100644
--- a/drivers/video/video-uclass.c
+++ b/drivers/video/video-uclass.c
@@ -5,7 +5,6 @@
#define LOG_CATEGORY UCLASS_VIDEO
-#include <common.h>
#include <bloblist.h>
#include <console.h>
#include <cpu_func.h>
@@ -404,6 +403,10 @@
{
struct udevice *dev;
+ /* Assume video to be active if SPL passed video hand-off to U-boot */
+ if (IS_ENABLED(CONFIG_SPL_VIDEO_HANDOFF) && spl_phase() > PHASE_SPL)
+ return true;
+
for (uclass_find_first_device(UCLASS_VIDEO, &dev);
dev;
uclass_find_next_device(&dev)) {
diff --git a/drivers/video/video_bmp.c b/drivers/video/video_bmp.c
index 45f003c..ad512d9 100644
--- a/drivers/video/video_bmp.c
+++ b/drivers/video/video_bmp.c
@@ -3,7 +3,6 @@
* Copyright (c) 2015 Google, Inc
*/
-#include <common.h>
#include <bmp_layout.h>
#include <dm.h>
#include <log.h>
diff --git a/drivers/video/video_osd-uclass.c b/drivers/video/video_osd-uclass.c
index 0d3aae4..9236863 100644
--- a/drivers/video/video_osd-uclass.c
+++ b/drivers/video/video_osd-uclass.c
@@ -6,7 +6,6 @@
#define LOG_CATEGORY UCLASS_VIDEO_OSD
-#include <common.h>
#include <dm.h>
#include <video_osd.h>
diff --git a/drivers/video/videomodes.c b/drivers/video/videomodes.c
index 35955a5..d86d867 100644
--- a/drivers/video/videomodes.c
+++ b/drivers/video/videomodes.c
@@ -55,7 +55,6 @@
"myvideo" and setting the variable "videomode=myvideo"..
****************************************************************************/
-#include <common.h>
#include <edid.h>
#include <env.h>
#include <errno.h>
diff --git a/drivers/video/zynqmp/zynqmp_dpsub.c b/drivers/video/zynqmp/zynqmp_dpsub.c
index def4dcf..1405b29 100644
--- a/drivers/video/zynqmp/zynqmp_dpsub.c
+++ b/drivers/video/zynqmp/zynqmp_dpsub.c
@@ -6,7 +6,6 @@
* Xilinx displayport(DP) Tx Subsytem driver
*/
-#include <common.h>
#include <clk.h>
#include <cpu_func.h>
#include <dm.h>
diff --git a/drivers/virtio/virtio-uclass.c b/drivers/virtio/virtio-uclass.c
index c542016..1dbc1a5 100644
--- a/drivers/virtio/virtio-uclass.c
+++ b/drivers/virtio/virtio-uclass.c
@@ -17,7 +17,6 @@
#define LOG_CATEGORY UCLASS_VIRTIO
-#include <common.h>
#include <bootdev.h>
#include <dm.h>
#include <log.h>
diff --git a/drivers/virtio/virtio_blk.c b/drivers/virtio/virtio_blk.c
index 9581058..3404f61 100644
--- a/drivers/virtio/virtio_blk.c
+++ b/drivers/virtio/virtio_blk.c
@@ -6,7 +6,6 @@
#define LOG_CATEGORY UCLASS_VIRTIO
-#include <common.h>
#include <blk.h>
#include <dm.h>
#include <part.h>
diff --git a/drivers/virtio/virtio_mmio.c b/drivers/virtio/virtio_mmio.c
index 78c15c8..1cd737a 100644
--- a/drivers/virtio/virtio_mmio.c
+++ b/drivers/virtio/virtio_mmio.c
@@ -7,7 +7,6 @@
* Ported from Linux drivers/virtio/virtio_mmio.c
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <virtio_types.h>
diff --git a/drivers/virtio/virtio_net.c b/drivers/virtio/virtio_net.c
index 1794f73..0e5367a 100644
--- a/drivers/virtio/virtio_net.c
+++ b/drivers/virtio/virtio_net.c
@@ -4,7 +4,6 @@
* Copyright (C) 2018, Bin Meng <bmeng.cn@gmail.com>
*/
-#include <common.h>
#include <dm.h>
#include <net.h>
#include <virtio_types.h>
diff --git a/drivers/virtio/virtio_pci_legacy.c b/drivers/virtio/virtio_pci_legacy.c
index aa89604..15f8c6e 100644
--- a/drivers/virtio/virtio_pci_legacy.c
+++ b/drivers/virtio/virtio_pci_legacy.c
@@ -6,7 +6,6 @@
* Ported from Linux drivers/virtio/virtio_pci*.c
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <virtio_types.h>
diff --git a/drivers/virtio/virtio_pci_modern.c b/drivers/virtio/virtio_pci_modern.c
index 3cdc2d2..5850e0c 100644
--- a/drivers/virtio/virtio_pci_modern.c
+++ b/drivers/virtio/virtio_pci_modern.c
@@ -6,7 +6,6 @@
* Ported from Linux drivers/virtio/virtio_pci*.c
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <virtio_types.h>
diff --git a/drivers/virtio/virtio_ring.c b/drivers/virtio/virtio_ring.c
index c9adcce..306fa5b 100644
--- a/drivers/virtio/virtio_ring.c
+++ b/drivers/virtio/virtio_ring.c
@@ -7,7 +7,6 @@
*/
#include <bouncebuf.h>
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <malloc.h>
diff --git a/drivers/virtio/virtio_rng.c b/drivers/virtio/virtio_rng.c
index 786359a..90a371a 100644
--- a/drivers/virtio/virtio_rng.c
+++ b/drivers/virtio/virtio_rng.c
@@ -3,7 +3,6 @@
* Copyright (c) 2019, Linaro Limited
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <rng.h>
diff --git a/drivers/virtio/virtio_sandbox.c b/drivers/virtio/virtio_sandbox.c
index b34f1d6..0f1ebef 100644
--- a/drivers/virtio/virtio_sandbox.c
+++ b/drivers/virtio/virtio_sandbox.c
@@ -5,7 +5,6 @@
* VirtIO Sandbox transport driver, for testing purpose only
*/
-#include <common.h>
#include <dm.h>
#include <virtio_types.h>
#include <virtio.h>
diff --git a/drivers/w1-eeprom/ds24xxx.c b/drivers/w1-eeprom/ds24xxx.c
index 4be378b..413d8bc 100644
--- a/drivers/w1-eeprom/ds24xxx.c
+++ b/drivers/w1-eeprom/ds24xxx.c
@@ -7,7 +7,6 @@
*
*/
-#include <common.h>
#include <linux/err.h>
#include <dm.h>
#include <w1-eeprom.h>
diff --git a/drivers/w1-eeprom/ds2502.c b/drivers/w1-eeprom/ds2502.c
index a67f5ed..db9f41e 100644
--- a/drivers/w1-eeprom/ds2502.c
+++ b/drivers/w1-eeprom/ds2502.c
@@ -20,7 +20,6 @@
* Martin Fuzzey <martin.fuzzey@flowbird.group>
*/
-#include <common.h>
#include <dm.h>
#include <dm/device_compat.h>
#include <linux/err.h>
diff --git a/drivers/w1-eeprom/eep_sandbox.c b/drivers/w1-eeprom/eep_sandbox.c
index 27c7f9f..2a69ca2 100644
--- a/drivers/w1-eeprom/eep_sandbox.c
+++ b/drivers/w1-eeprom/eep_sandbox.c
@@ -4,7 +4,6 @@
*
*/
-#include <common.h>
#include <linux/err.h>
#include <dm.h>
#include <w1-eeprom.h>
diff --git a/drivers/w1-eeprom/w1-eeprom-uclass.c b/drivers/w1-eeprom/w1-eeprom-uclass.c
index 70ba537..3919aad 100644
--- a/drivers/w1-eeprom/w1-eeprom-uclass.c
+++ b/drivers/w1-eeprom/w1-eeprom-uclass.c
@@ -12,7 +12,6 @@
#define LOG_CATEGORY UCLASS_W1_EEPROM
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <w1.h>
diff --git a/drivers/w1/mxc_w1.c b/drivers/w1/mxc_w1.c
index b96c1a0..9ebfc13 100644
--- a/drivers/w1/mxc_w1.c
+++ b/drivers/w1/mxc_w1.c
@@ -17,7 +17,6 @@
* Martin Fuzzey <martin.fuzzey@flowbird.group>
*/
-#include <common.h>
#include <asm/arch/clock.h>
#include <dm.h>
#include <dm/device_compat.h>
diff --git a/drivers/w1/w1-gpio.c b/drivers/w1/w1-gpio.c
index 9346f81..759f94e 100644
--- a/drivers/w1/w1-gpio.c
+++ b/drivers/w1/w1-gpio.c
@@ -7,7 +7,6 @@
*
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <w1.h>
diff --git a/drivers/w1/w1-uclass.c b/drivers/w1/w1-uclass.c
index a4247ec..9637ed2 100644
--- a/drivers/w1/w1-uclass.c
+++ b/drivers/w1/w1-uclass.c
@@ -14,7 +14,6 @@
#define LOG_CATEGORY UCLASS_W1
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <log.h>
diff --git a/drivers/watchdog/armada-37xx-wdt.c b/drivers/watchdog/armada-37xx-wdt.c
index e09f5ac..4b51178 100644
--- a/drivers/watchdog/armada-37xx-wdt.c
+++ b/drivers/watchdog/armada-37xx-wdt.c
@@ -5,7 +5,6 @@
* Marek Behún <kabel@kernel.org>
*/
-#include <common.h>
#include <dm.h>
#include <wdt.h>
#include <asm/global_data.h>
diff --git a/drivers/watchdog/ast2600_wdt.c b/drivers/watchdog/ast2600_wdt.c
index bc98420..190490f 100644
--- a/drivers/watchdog/ast2600_wdt.c
+++ b/drivers/watchdog/ast2600_wdt.c
@@ -3,7 +3,6 @@
* Copyright (c) 2020 Aspeed Technology, Inc
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <log.h>
diff --git a/drivers/watchdog/ast_wdt.c b/drivers/watchdog/ast_wdt.c
index f7b5a1a..e61e13f 100644
--- a/drivers/watchdog/ast_wdt.c
+++ b/drivers/watchdog/ast_wdt.c
@@ -3,7 +3,6 @@
* Copyright 2017 Google, Inc
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <log.h>
diff --git a/drivers/watchdog/at91sam9_wdt.c b/drivers/watchdog/at91sam9_wdt.c
index 647ae32..c809a89 100644
--- a/drivers/watchdog/at91sam9_wdt.c
+++ b/drivers/watchdog/at91sam9_wdt.c
@@ -18,7 +18,6 @@
#include <asm/global_data.h>
#include <asm/io.h>
#include <asm/arch/at91_wdt.h>
-#include <common.h>
#include <div64.h>
#include <dm.h>
#include <errno.h>
diff --git a/drivers/watchdog/bcm6345_wdt.c b/drivers/watchdog/bcm6345_wdt.c
index 677b134..6ebe901 100644
--- a/drivers/watchdog/bcm6345_wdt.c
+++ b/drivers/watchdog/bcm6345_wdt.c
@@ -7,7 +7,6 @@
* Copyright (C) 2008 Florian Fainelli <florian@openwrt.org>
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <wdt.h>
diff --git a/drivers/watchdog/cdns_wdt.c b/drivers/watchdog/cdns_wdt.c
index 743ab64..cb5a786 100644
--- a/drivers/watchdog/cdns_wdt.c
+++ b/drivers/watchdog/cdns_wdt.c
@@ -6,7 +6,6 @@
* Author(s): Shreenidhi Shedi <yesshedi@gmail.com>
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <wdt.h>
diff --git a/drivers/watchdog/cortina_wdt.c b/drivers/watchdog/cortina_wdt.c
index 7ab9d7b..9f09ac0 100644
--- a/drivers/watchdog/cortina_wdt.c
+++ b/drivers/watchdog/cortina_wdt.c
@@ -4,7 +4,6 @@
*
*/
-#include <common.h>
#include <dm.h>
#include <hang.h>
#include <asm/io.h>
diff --git a/drivers/watchdog/designware_wdt.c b/drivers/watchdog/designware_wdt.c
index b22e0ee..bd9d710 100644
--- a/drivers/watchdog/designware_wdt.c
+++ b/drivers/watchdog/designware_wdt.c
@@ -4,7 +4,6 @@
*/
#include <clk.h>
-#include <common.h>
#include <dm.h>
#include <reset.h>
#include <wdt.h>
diff --git a/drivers/watchdog/ftwdt010_wdt.c b/drivers/watchdog/ftwdt010_wdt.c
index 1f5f301..4769b96 100644
--- a/drivers/watchdog/ftwdt010_wdt.c
+++ b/drivers/watchdog/ftwdt010_wdt.c
@@ -14,7 +14,6 @@
* 22/08/2022 Port to DM
*/
-#include <common.h>
#include <dm.h>
#include <wdt.h>
#include <log.h>
diff --git a/drivers/watchdog/imx_watchdog.c b/drivers/watchdog/imx_watchdog.c
index 894158b..ea77021 100644
--- a/drivers/watchdog/imx_watchdog.c
+++ b/drivers/watchdog/imx_watchdog.c
@@ -4,7 +4,6 @@
* Licensed under the GPL-2 or later.
*/
-#include <common.h>
#include <cpu_func.h>
#include <dm.h>
#include <hang.h>
diff --git a/drivers/watchdog/mcf_wdt.c b/drivers/watchdog/mcf_wdt.c
index b36488b..5092a25 100644
--- a/drivers/watchdog/mcf_wdt.c
+++ b/drivers/watchdog/mcf_wdt.c
@@ -6,7 +6,7 @@
*
*/
-#include <common.h>
+#include <config.h>
#include <dm.h>
#include <hang.h>
#include <asm/io.h>
diff --git a/drivers/watchdog/mpc8xxx_wdt.c b/drivers/watchdog/mpc8xxx_wdt.c
index f28636c..036ff69 100644
--- a/drivers/watchdog/mpc8xxx_wdt.c
+++ b/drivers/watchdog/mpc8xxx_wdt.c
@@ -3,7 +3,6 @@
* Copyright 2017 CS Systemes d'Information
*/
-#include <common.h>
#include <env.h>
#include <dm.h>
#include <wdt.h>
diff --git a/drivers/watchdog/mt7621_wdt.c b/drivers/watchdog/mt7621_wdt.c
index f7d201b..6308d96 100644
--- a/drivers/watchdog/mt7621_wdt.c
+++ b/drivers/watchdog/mt7621_wdt.c
@@ -9,7 +9,6 @@
* Copyright (C) 2013 John Crispin <blogic@openwrt.org>
*/
-#include <common.h>
#include <dm.h>
#include <wdt.h>
#include <asm/global_data.h>
diff --git a/drivers/watchdog/mtk_wdt.c b/drivers/watchdog/mtk_wdt.c
index 368b368..706deb9 100644
--- a/drivers/watchdog/mtk_wdt.c
+++ b/drivers/watchdog/mtk_wdt.c
@@ -6,7 +6,6 @@
* Author: Ryder Lee <ryder.lee@mediatek.com>
*/
-#include <common.h>
#include <dm.h>
#include <hang.h>
#include <wdt.h>
diff --git a/drivers/watchdog/omap_wdt.c b/drivers/watchdog/omap_wdt.c
index f0e57b4..5fd02dd 100644
--- a/drivers/watchdog/omap_wdt.c
+++ b/drivers/watchdog/omap_wdt.c
@@ -36,7 +36,6 @@
* Use the driver model and standard identifiers; handle bigger timeouts.
*/
-#include <common.h>
#include <log.h>
#include <watchdog.h>
#include <asm/ti-common/omap_wdt.h>
diff --git a/drivers/watchdog/orion_wdt.c b/drivers/watchdog/orion_wdt.c
index 127766d..4562b2a 100644
--- a/drivers/watchdog/orion_wdt.c
+++ b/drivers/watchdog/orion_wdt.c
@@ -12,7 +12,6 @@
* warranty of any kind, whether express or implied.
*/
-#include <common.h>
#include <dm.h>
#include <clk.h>
#include <log.h>
diff --git a/drivers/watchdog/rti_wdt.c b/drivers/watchdog/rti_wdt.c
index 8d93f19..99168d0 100644
--- a/drivers/watchdog/rti_wdt.c
+++ b/drivers/watchdog/rti_wdt.c
@@ -8,7 +8,6 @@
* Derived from linux/drivers/watchdog/rti_wdt.c
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <dm/device_compat.h>
diff --git a/drivers/watchdog/s5p_wdt.c b/drivers/watchdog/s5p_wdt.c
index 80524a0..c244f15 100644
--- a/drivers/watchdog/s5p_wdt.c
+++ b/drivers/watchdog/s5p_wdt.c
@@ -4,7 +4,6 @@
* Minkyu Kang <mk7.kang@samsung.com>
*/
-#include <common.h>
#include <asm/io.h>
#include <asm/arch/cpu.h>
#include <asm/arch/watchdog.h>
diff --git a/drivers/watchdog/sandbox_alarm-wdt.c b/drivers/watchdog/sandbox_alarm-wdt.c
index 71bb5d9..8dbbfc2 100644
--- a/drivers/watchdog/sandbox_alarm-wdt.c
+++ b/drivers/watchdog/sandbox_alarm-wdt.c
@@ -1,4 +1,3 @@
-#include <common.h>
#include <dm.h>
#include <os.h>
#include <wdt.h>
diff --git a/drivers/watchdog/sandbox_wdt.c b/drivers/watchdog/sandbox_wdt.c
index 535614f..cd5eadb 100644
--- a/drivers/watchdog/sandbox_wdt.c
+++ b/drivers/watchdog/sandbox_wdt.c
@@ -3,7 +3,6 @@
* Copyright 2017 Google, Inc
*/
-#include <common.h>
#include <dm.h>
#include <wdt.h>
#include <asm/state.h>
diff --git a/drivers/watchdog/sbsa_gwdt.c b/drivers/watchdog/sbsa_gwdt.c
index 96d0466..0358552 100644
--- a/drivers/watchdog/sbsa_gwdt.c
+++ b/drivers/watchdog/sbsa_gwdt.c
@@ -7,7 +7,6 @@
#include <asm/global_data.h>
#include <asm/io.h>
-#include <common.h>
#include <dm/device.h>
#include <dm/fdtaddr.h>
#include <dm/read.h>
diff --git a/drivers/watchdog/sl28cpld-wdt.c b/drivers/watchdog/sl28cpld-wdt.c
index af5a6b1..c5b4f8a 100644
--- a/drivers/watchdog/sl28cpld-wdt.c
+++ b/drivers/watchdog/sl28cpld-wdt.c
@@ -5,7 +5,6 @@
* Copyright (c) 2021 Michael Walle <michael@walle.cc>
*/
-#include <common.h>
#include <dm.h>
#include <wdt.h>
#include <sl28cpld.h>
diff --git a/drivers/watchdog/sp805_wdt.c b/drivers/watchdog/sp805_wdt.c
index 6d58fd3..10fe3e2 100644
--- a/drivers/watchdog/sp805_wdt.c
+++ b/drivers/watchdog/sp805_wdt.c
@@ -8,7 +8,6 @@
#include <log.h>
#include <asm/global_data.h>
#include <asm/io.h>
-#include <common.h>
#include <clk.h>
#include <dm/device.h>
#include <dm/fdtaddr.h>
diff --git a/drivers/watchdog/stm32mp_wdt.c b/drivers/watchdog/stm32mp_wdt.c
index 7ebcd25..97ab8cf 100644
--- a/drivers/watchdog/stm32mp_wdt.c
+++ b/drivers/watchdog/stm32mp_wdt.c
@@ -5,7 +5,6 @@
#define LOG_CATEGORY UCLASS_WDT
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <log.h>
diff --git a/drivers/watchdog/tangier_wdt.c b/drivers/watchdog/tangier_wdt.c
index bdc6559..8fbfac3 100644
--- a/drivers/watchdog/tangier_wdt.c
+++ b/drivers/watchdog/tangier_wdt.c
@@ -2,7 +2,6 @@
/*
* Copyright (c) 2017 Intel Corporation
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <wdt.h>
diff --git a/drivers/watchdog/ulp_wdog.c b/drivers/watchdog/ulp_wdog.c
index 0eea04e..83f19dc 100644
--- a/drivers/watchdog/ulp_wdog.c
+++ b/drivers/watchdog/ulp_wdog.c
@@ -3,7 +3,6 @@
* Copyright (C) 2016 Freescale Semiconductor, Inc.
*/
-#include <common.h>
#include <cpu_func.h>
#include <asm/io.h>
#include <asm/arch/imx-regs.h>
diff --git a/drivers/watchdog/wdt-uclass.c b/drivers/watchdog/wdt-uclass.c
index 417e8d7..c88312e 100644
--- a/drivers/watchdog/wdt-uclass.c
+++ b/drivers/watchdog/wdt-uclass.c
@@ -5,7 +5,6 @@
#define LOG_CATEGORY UCLASS_WDT
-#include <common.h>
#include <cyclic.h>
#include <div64.h>
#include <dm.h>
diff --git a/drivers/watchdog/xilinx_tb_wdt.c b/drivers/watchdog/xilinx_tb_wdt.c
index b38c400..8a8e553 100644
--- a/drivers/watchdog/xilinx_tb_wdt.c
+++ b/drivers/watchdog/xilinx_tb_wdt.c
@@ -8,7 +8,6 @@
* Copyright (c) 2011-2018 Xilinx Inc.
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <wdt.h>
diff --git a/drivers/watchdog/xilinx_wwdt.c b/drivers/watchdog/xilinx_wwdt.c
index 963ab22..41eff1a 100644
--- a/drivers/watchdog/xilinx_wwdt.c
+++ b/drivers/watchdog/xilinx_wwdt.c
@@ -9,7 +9,6 @@
*/
#include <clk.h>
-#include <common.h>
#include <dm.h>
#include <regmap.h>
#include <wdt.h>
diff --git a/drivers/xen/events.c b/drivers/xen/events.c
index 2ebe20d..fa8b13d 100644
--- a/drivers/xen/events.c
+++ b/drivers/xen/events.c
@@ -14,7 +14,6 @@
*
* [1] - http://xenbits.xen.org/gitweb/?p=mini-os.git;a=summary
*/
-#include <common.h>
#include <log.h>
#include <asm/io.h>
diff --git a/drivers/xen/gnttab.c b/drivers/xen/gnttab.c
index 31e96e2..005694a 100644
--- a/drivers/xen/gnttab.c
+++ b/drivers/xen/gnttab.c
@@ -14,7 +14,6 @@
*
* [1] - http://xenbits.xen.org/gitweb/?p=mini-os.git;a=summary
*/
-#include <common.h>
#include <asm/global_data.h>
#include <linux/compiler.h>
#include <log.h>
diff --git a/drivers/xen/hypervisor.c b/drivers/xen/hypervisor.c
index 0b2311b..d28df82 100644
--- a/drivers/xen/hypervisor.c
+++ b/drivers/xen/hypervisor.c
@@ -8,7 +8,6 @@
* Copyright (c) 2005, Grzegorz Milos, gm281@cam.ac.uk,Intel Research Cambridge
* Copyright (c) 2020, EPAM Systems Inc.
*/
-#include <common.h>
#include <cpu_func.h>
#include <log.h>
#include <memalign.h>
diff --git a/drivers/xen/pvblock.c b/drivers/xen/pvblock.c
index 1df04e2..0e47ffb 100644
--- a/drivers/xen/pvblock.c
+++ b/drivers/xen/pvblock.c
@@ -7,7 +7,6 @@
#define LOG_CATEGORY UCLASS_PVBLOCK
#include <blk.h>
-#include <common.h>
#include <dm.h>
#include <dm/device-internal.h>
#include <malloc.h>
@@ -79,7 +78,7 @@
};
/**
- * struct blkfront_aiocb - AIO сontrol block
+ * struct blkfront_aiocb - AIO control block
* @aio_dev: Blockfront device
* @aio_buf: Memory buffer, which must be sector-aligned for
* @aio_dev sector
diff --git a/drivers/xen/xenbus.c b/drivers/xen/xenbus.c
index 177d144..36de525 100644
--- a/drivers/xen/xenbus.c
+++ b/drivers/xen/xenbus.c
@@ -15,7 +15,6 @@
* [1] - http://xenbits.xen.org/gitweb/?p=mini-os.git;a=summary
*/
-#include <common.h>
#include <log.h>
#include <asm/armv8/mmu.h>
diff --git a/dts/Kconfig b/dts/Kconfig
index b9b6367..6883a00 100644
--- a/dts/Kconfig
+++ b/dts/Kconfig
@@ -101,6 +101,30 @@
the dts/upstream subtree, they can override this option to have the
DT build from existing U-Boot tree location instead.
+config OF_UPSTREAM_BUILD_VENDOR
+ bool "Build all devicetree files for a particular vendor"
+ depends on OF_UPSTREAM
+ help
+ Enable building all devicetree files for a particular vendor. This
+ is useful for generic U-Boot configurations where many boards can
+ be supported with a single binary.
+
+ This is only available for platforms using upstream devicetree.
+
+config OF_UPSTREAM_VENDOR
+ string "Vendor to build all upstream devicetree files for"
+ depends on OF_UPSTREAM_BUILD_VENDOR
+ default "qcom" if ARCH_SNAPDRAGON
+ default "rockchip" if ARCH_ROCKCHIP
+ default "amlogic" if ARCH_MESON
+ default "allwinner" if ARCH_SUNXI
+ default "mediatek" if ARCH_MEDIATEK
+ default "marvell" if ARCH_MVEBU || ARCH_KIRKWOOD
+ default "xilinx" if ARCH_VERSAL || ARCH_ZYNQ
+ default "nvidia" if ARCH_TEGRA
+ help
+ Select the vendor to build all devicetree files for.
+
choice
prompt "Provider of DTB for DT control"
depends on OF_CONTROL
diff --git a/env/Kconfig b/env/Kconfig
index 7885c8b..9641abe 100644
--- a/env/Kconfig
+++ b/env/Kconfig
@@ -312,7 +312,7 @@
config ENV_IS_IN_ONENAND
bool "Environment is in OneNAND"
- depends on !CHAIN_OF_TRUST
+ depends on !CHAIN_OF_TRUST && CMD_ONENAND
help
Define this if you want to put your local device's environment in
OneNAND.
@@ -472,7 +472,7 @@
string "Device and partition for where to store the environemt in FAT"
depends on ENV_IS_IN_FAT
default "0:1" if TI_COMMON_CMD_OPTIONS
- default "0:auto" if ARCH_ZYNQ || ARCH_ZYNQMP || ARCH_VERSAL
+ default "0:auto" if ARCH_ZYNQ || ARCH_ZYNQMP || ARCH_VERSAL || ARCH_VERSAL_NET
default ":auto" if ARCH_SUNXI
default "0" if ARCH_AT91
help
diff --git a/env/attr.c b/env/attr.c
index a958c71..fed5b21 100644
--- a/env/attr.c
+++ b/env/attr.c
@@ -4,13 +4,13 @@
* Joe Hershberger, National Instruments, joe.hershberger@ni.com
*/
+#include <stdio.h>
#ifdef USE_HOSTCC /* Eliminate "ANSI does not permit..." warnings */
#include <stdint.h>
-#include <stdio.h>
#include <linux/linux_string.h>
#else
-#include <common.h>
#include <slre.h>
+#include <vsprintf.h>
#endif
#include <env_attr.h>
diff --git a/env/callback.c b/env/callback.c
index 98ddba0..b7cbccd 100644
--- a/env/callback.c
+++ b/env/callback.c
@@ -4,7 +4,6 @@
* Joe Hershberger, National Instruments, joe.hershberger@ni.com
*/
-#include <common.h>
#include <env.h>
#include <env_internal.h>
#include <asm/global_data.h>
diff --git a/env/common.c b/env/common.c
index 48a5651..d8c276d 100644
--- a/env/common.c
+++ b/env/common.c
@@ -7,7 +7,6 @@
* Andreas Heppel <aheppel@sysgo.de>
*/
-#include <common.h>
#include <bootstage.h>
#include <command.h>
#include <env.h>
diff --git a/env/eeprom.c b/env/eeprom.c
index 7ce7e99..b290b10 100644
--- a/env/eeprom.c
+++ b/env/eeprom.c
@@ -7,7 +7,6 @@
* Andreas Heppel <aheppel@sysgo.de>
*/
-#include <common.h>
#include <command.h>
#include <eeprom.h>
#include <env.h>
diff --git a/env/env.c b/env/env.c
index bae3f64..bcc189e 100644
--- a/env/env.c
+++ b/env/env.c
@@ -4,13 +4,13 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <env.h>
#include <env_internal.h>
#include <log.h>
#include <asm/global_data.h>
#include <linux/bitops.h>
#include <linux/bug.h>
+#include <linux/errno.h>
DECLARE_GLOBAL_DATA_PTR;
diff --git a/env/ext4.c b/env/ext4.c
index da26705..eb16568 100644
--- a/env/ext4.c
+++ b/env/ext4.c
@@ -18,7 +18,6 @@
* Manjunatha C Achar <a.manjunatha@samsung.com>
*/
-#include <common.h>
#include <part.h>
#include <command.h>
diff --git a/env/fat.c b/env/fat.c
index 3172130..2a40f12 100644
--- a/env/fat.c
+++ b/env/fat.c
@@ -6,7 +6,6 @@
* Maximilian Schwerin <mvs@tigris.de>
*/
-#include <common.h>
#include <command.h>
#include <env.h>
#include <env_internal.h>
diff --git a/env/flags.c b/env/flags.c
index e286636..233fd46 100644
--- a/env/flags.c
+++ b/env/flags.c
@@ -8,9 +8,9 @@
#include <linux/string.h>
#include <linux/ctype.h>
+#include <stdio.h>
#ifdef USE_HOSTCC /* Eliminate "ANSI does not permit..." warnings */
#include <stdint.h>
-#include <stdio.h>
#include "fw_env_private.h"
#include "fw_env.h"
#include <env_attr.h>
@@ -18,7 +18,7 @@
#define env_get fw_getenv
#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
#else
-#include <common.h>
+#include <linux/kernel.h>
#include <env_internal.h>
#endif
diff --git a/env/flash.c b/env/flash.c
index 1e75f8c..1bd6e70 100644
--- a/env/flash.c
+++ b/env/flash.c
@@ -9,7 +9,6 @@
/* #define DEBUG */
-#include <common.h>
#include <command.h>
#include <env.h>
#include <env_internal.h>
diff --git a/env/mmc.c b/env/mmc.c
index da84cdd..776df07 100644
--- a/env/mmc.c
+++ b/env/mmc.c
@@ -5,7 +5,6 @@
/* #define DEBUG */
-#include <common.h>
#include <asm/global_data.h>
#include <command.h>
@@ -436,6 +435,7 @@
ret = env_import_redund((char *)tmp_env1, read1_fail, (char *)tmp_env2,
read2_fail, H_EXTERNAL);
+ printf("Reading from %sMMC(%d)... ", gd->env_valid == ENV_REDUND ? "redundant " : "", dev);
fini:
fini_mmc_for_env(mmc);
@@ -475,6 +475,8 @@
goto fini;
}
+ printf("Reading from MMC(%d)... ", dev);
+
ret = env_import(buf, 1, H_EXTERNAL);
if (!ret) {
ep = (env_t *)buf;
diff --git a/env/nand.c b/env/nand.c
index df300b1..fef5697 100644
--- a/env/nand.c
+++ b/env/nand.c
@@ -13,7 +13,6 @@
* Andreas Heppel <aheppel@sysgo.de>
*/
-#include <common.h>
#include <command.h>
#include <env.h>
#include <env_internal.h>
diff --git a/env/nowhere.c b/env/nowhere.c
index 9ebc357..326f27d 100644
--- a/env/nowhere.c
+++ b/env/nowhere.c
@@ -7,7 +7,6 @@
* Andreas Heppel <aheppel@sysgo.de>
*/
-#include <common.h>
#include <command.h>
#include <env.h>
#include <env_internal.h>
diff --git a/env/nvram.c b/env/nvram.c
index 229c34f..d49cd0f 100644
--- a/env/nvram.c
+++ b/env/nvram.c
@@ -7,7 +7,6 @@
* Andreas Heppel <aheppel@sysgo.de>
*/
-#include <common.h>
#include <command.h>
#include <env.h>
#include <env_internal.h>
diff --git a/env/onenand.c b/env/onenand.c
index 1faa2cb..8c349ef 100644
--- a/env/onenand.c
+++ b/env/onenand.c
@@ -7,7 +7,6 @@
* Kyungmin Park <kyungmin.park@samsung.com>
*/
-#include <common.h>
#include <command.h>
#include <env_internal.h>
#include <asm/global_data.h>
diff --git a/env/remote.c b/env/remote.c
index 166bebf..0cc383c 100644
--- a/env/remote.c
+++ b/env/remote.c
@@ -5,10 +5,10 @@
/* #define DEBUG */
-#include <common.h>
#include <command.h>
#include <env_internal.h>
#include <asm/global_data.h>
+#include <linux/errno.h>
#include <linux/stddef.h>
#include <u-boot/crc.h>
diff --git a/env/sf.c b/env/sf.c
index 8f5c03b..c747e17 100644
--- a/env/sf.c
+++ b/env/sf.c
@@ -8,7 +8,6 @@
*
* (C) Copyright 2008 Atmel Corporation
*/
-#include <common.h>
#include <dm.h>
#include <env.h>
#include <env_internal.h>
diff --git a/env/ubi.c b/env/ubi.c
index 445d34f..0c3e93c 100644
--- a/env/ubi.c
+++ b/env/ubi.c
@@ -4,7 +4,6 @@
* Joe Hershberger <joe.hershberger@ni.com>
*/
-#include <common.h>
#include <asm/global_data.h>
#include <command.h>
diff --git a/examples/api/demo.c b/examples/api/demo.c
index d586174..677d13b 100644
--- a/examples/api/demo.c
+++ b/examples/api/demo.c
@@ -5,7 +5,7 @@
* Written by: Rafal Jaworowski <raj@semihalf.com>
*/
-#include <common.h>
+#include <stdio.h>
#include <env.h>
#include <linux/types.h>
#include <api_public.h>
diff --git a/examples/api/glue.c b/examples/api/glue.c
index 075d307..08c21a8 100644
--- a/examples/api/glue.c
+++ b/examples/api/glue.c
@@ -3,7 +3,6 @@
* (C) Copyright 2007-2008 Semihalf, Rafal Jaworowski <raj@semihalf.com>
*/
-#include <common.h>
#include <env.h>
#include <linux/types.h>
#include <api_public.h>
diff --git a/examples/api/libgenwrap.c b/examples/api/libgenwrap.c
index 3aa2228..bfd88e1 100644
--- a/examples/api/libgenwrap.c
+++ b/examples/api/libgenwrap.c
@@ -9,7 +9,6 @@
* existing code e.g. operations on strings and similar.
*/
-#include <common.h>
#include <command.h>
#include <hang.h>
#include <linux/delay.h>
diff --git a/examples/standalone/atmel_df_pow2.c b/examples/standalone/atmel_df_pow2.c
index dcb25da..ed0d7ae 100644
--- a/examples/standalone/atmel_df_pow2.c
+++ b/examples/standalone/atmel_df_pow2.c
@@ -6,7 +6,6 @@
* Licensed under the 2-clause BSD.
*/
-#include <common.h>
#include <exports.h>
#include <spi.h>
#include <linux/delay.h>
diff --git a/examples/standalone/sched.c b/examples/standalone/sched.c
index 1c52960..d507163 100644
--- a/examples/standalone/sched.c
+++ b/examples/standalone/sched.c
@@ -1,6 +1,5 @@
// SPDX-License-Identifier: GPL-2.0+
-#include <common.h>
#include <exports.h>
/*
diff --git a/examples/standalone/stubs.c b/examples/standalone/stubs.c
index 6511557..04e8acb 100644
--- a/examples/standalone/stubs.c
+++ b/examples/standalone/stubs.c
@@ -1,4 +1,3 @@
-#include <common.h>
#include <exports.h>
#include <linux/compiler.h>
diff --git a/fs/btrfs/dev.c b/fs/btrfs/dev.c
index cb3b971..e27a032 100644
--- a/fs/btrfs/dev.c
+++ b/fs/btrfs/dev.c
@@ -5,7 +5,6 @@
* 2017 Marek Behún, CZ.NIC, kabel@kernel.org
*/
-#include <common.h>
#include <blk.h>
#include <compiler.h>
#include <fs_internal.h>
diff --git a/fs/btrfs/disk-io.c b/fs/btrfs/disk-io.c
index 7eaa7e9..e5bfaf4 100644
--- a/fs/btrfs/disk-io.c
+++ b/fs/btrfs/disk-io.c
@@ -1,5 +1,4 @@
// SPDX-License-Identifier: GPL-2.0+
-#include <common.h>
#include <fs_internal.h>
#include <log.h>
#include <uuid.h>
diff --git a/fs/btrfs/volumes.c b/fs/btrfs/volumes.c
index 7d4095d..8ec545e 100644
--- a/fs/btrfs/volumes.c
+++ b/fs/btrfs/volumes.c
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+
#include <stdlib.h>
-#include <common.h>
+#include <errno.h>
#include <fs_internal.h>
#include "ctree.h"
#include "disk-io.h"
diff --git a/fs/cbfs/cbfs.c b/fs/cbfs/cbfs.c
index 714f4ba..ad55832 100644
--- a/fs/cbfs/cbfs.c
+++ b/fs/cbfs/cbfs.c
@@ -3,10 +3,10 @@
* Copyright (c) 2011 The Chromium OS Authors. All rights reserved.
*/
-#include <common.h>
#include <cbfs.h>
#include <log.h>
#include <malloc.h>
+#include <linux/errno.h>
#include <asm/byteorder.h>
/* Offset of master header from the start of a coreboot ROM */
diff --git a/fs/cramfs/cramfs.c b/fs/cramfs/cramfs.c
index abb2de3..22148ff 100644
--- a/fs/cramfs/cramfs.c
+++ b/fs/cramfs/cramfs.c
@@ -24,7 +24,7 @@
* The actual compression is based on zlib, see the other files.
*/
-#include <common.h>
+#include <stdio.h>
#include <malloc.h>
#include <asm/byteorder.h>
#include <linux/stat.h>
diff --git a/fs/cramfs/uncompress.c b/fs/cramfs/uncompress.c
index 0d071b6..2141edf 100644
--- a/fs/cramfs/uncompress.c
+++ b/fs/cramfs/uncompress.c
@@ -20,7 +20,7 @@
* then is used by multiple filesystems.
*/
-#include <common.h>
+#include <stdio.h>
#include <cyclic.h>
#include <malloc.h>
#include <watchdog.h>
diff --git a/fs/erofs/Kconfig b/fs/erofs/Kconfig
index ee4e777..c846335 100644
--- a/fs/erofs/Kconfig
+++ b/fs/erofs/Kconfig
@@ -19,3 +19,18 @@
help
Enable fixed-sized output compression for EROFS.
If you don't want to enable compression feature, say N.
+
+config FS_EROFS_ZIP_DEFLATE
+ bool "EROFS DEFLATE compressed data support"
+ depends on FS_EROFS_ZIP
+ select ZLIB
+ help
+ Saying Y here includes support for reading EROFS file systems
+ containing DEFLATE compressed data. It gives better compression
+ ratios than the default LZ4 format, while it costs more CPU
+ overhead.
+
+ DEFLATE support is an experimental feature for now and so most
+ file systems will be readable without selecting this option.
+
+ If unsure, say N.
diff --git a/fs/erofs/decompress.c b/fs/erofs/decompress.c
index e04e5c3..ec74816 100644
--- a/fs/erofs/decompress.c
+++ b/fs/erofs/decompress.c
@@ -1,6 +1,85 @@
// SPDX-License-Identifier: GPL-2.0+
#include "decompress.h"
+#if IS_ENABLED(CONFIG_ZLIB)
+#include <u-boot/zlib.h>
+
+/* report a zlib or i/o error */
+static int zerr(int ret)
+{
+ switch (ret) {
+ case Z_STREAM_ERROR:
+ return -EINVAL;
+ case Z_DATA_ERROR:
+ return -EIO;
+ case Z_MEM_ERROR:
+ return -ENOMEM;
+ case Z_ERRNO:
+ default:
+ return -EFAULT;
+ }
+}
+
+static int z_erofs_decompress_deflate(struct z_erofs_decompress_req *rq)
+{
+ u8 *dest = (u8 *)rq->out;
+ u8 *src = (u8 *)rq->in;
+ u8 *buff = NULL;
+ unsigned int inputmargin = 0;
+ z_stream strm;
+ int ret;
+
+ while (!src[inputmargin & (erofs_blksiz() - 1)])
+ if (!(++inputmargin & (erofs_blksiz() - 1)))
+ break;
+
+ if (inputmargin >= rq->inputsize)
+ return -EFSCORRUPTED;
+
+ if (rq->decodedskip) {
+ buff = malloc(rq->decodedlength);
+ if (!buff)
+ return -ENOMEM;
+ dest = buff;
+ }
+
+ /* allocate inflate state */
+ strm.zalloc = Z_NULL;
+ strm.zfree = Z_NULL;
+ strm.opaque = Z_NULL;
+ strm.avail_in = 0;
+ strm.next_in = Z_NULL;
+ ret = inflateInit2(&strm, -15);
+ if (ret != Z_OK) {
+ free(buff);
+ return zerr(ret);
+ }
+
+ strm.next_in = src + inputmargin;
+ strm.avail_in = rq->inputsize - inputmargin;
+ strm.next_out = dest;
+ strm.avail_out = rq->decodedlength;
+
+ ret = inflate(&strm, rq->partial_decoding ? Z_SYNC_FLUSH : Z_FINISH);
+ if (ret != Z_STREAM_END || strm.total_out != rq->decodedlength) {
+ if (ret != Z_OK || !rq->partial_decoding) {
+ ret = zerr(ret);
+ goto out_inflate_end;
+ }
+ }
+
+ if (rq->decodedskip)
+ memcpy(rq->out, dest + rq->decodedskip,
+ rq->decodedlength - rq->decodedskip);
+
+out_inflate_end:
+ inflateEnd(&strm);
+ if (buff)
+ free(buff);
+ return ret;
+}
+#endif
+
#if IS_ENABLED(CONFIG_LZ4)
#include <u-boot/lz4.h>
static int z_erofs_decompress_lz4(struct z_erofs_decompress_req *rq)
@@ -94,5 +173,9 @@
if (rq->alg == Z_EROFS_COMPRESSION_LZ4)
return z_erofs_decompress_lz4(rq);
#endif
+#if IS_ENABLED(CONFIG_ZLIB)
+ if (rq->alg == Z_EROFS_COMPRESSION_DEFLATE)
+ return z_erofs_decompress_deflate(rq);
+#endif
return -EOPNOTSUPP;
}
diff --git a/fs/erofs/erofs_fs.h b/fs/erofs/erofs_fs.h
index 158e2c6..5bac4fe 100644
--- a/fs/erofs/erofs_fs.h
+++ b/fs/erofs/erofs_fs.h
@@ -304,6 +304,7 @@
enum {
Z_EROFS_COMPRESSION_LZ4 = 0,
Z_EROFS_COMPRESSION_LZMA = 1,
+ Z_EROFS_COMPRESSION_DEFLATE = 2,
Z_EROFS_COMPRESSION_MAX
};
diff --git a/fs/ext4/dev.c b/fs/ext4/dev.c
index 168443d..3fd8980 100644
--- a/fs/ext4/dev.c
+++ b/fs/ext4/dev.c
@@ -22,7 +22,6 @@
* fs/ext2/dev.c file in uboot.
*/
-#include <common.h>
#include <blk.h>
#include <config.h>
#include <fs_internal.h>
diff --git a/fs/ext4/ext4_common.c b/fs/ext4/ext4_common.c
index 365c514..857c15d 100644
--- a/fs/ext4/ext4_common.c
+++ b/fs/ext4/ext4_common.c
@@ -18,7 +18,6 @@
* ext4write : Based on generic ext4 protocol.
*/
-#include <common.h>
#include <blk.h>
#include <ext_common.h>
#include <ext4fs.h>
@@ -765,11 +764,6 @@
struct ext2_inode *first_inode = NULL;
struct ext2_inode temp_inode;
- if (*dirname != '/') {
- printf("Please supply Absolute path\n");
- return -1;
- }
-
/* TODO: input validation make equivalent to linux */
depth_dirname = zalloc(strlen(dirname) + 1);
if (!depth_dirname)
diff --git a/fs/ext4/ext4_journal.c b/fs/ext4/ext4_journal.c
index 1a340b4..02c4ac2 100644
--- a/fs/ext4/ext4_journal.c
+++ b/fs/ext4/ext4_journal.c
@@ -13,7 +13,6 @@
* Copyright 1998-2000 Red Hat, Inc --- All Rights Reserved
*/
-#include <common.h>
#include <blk.h>
#include <ext4fs.h>
#include <log.h>
@@ -430,7 +429,7 @@
printf("Recovery required\n");
} else {
if (recovery_flag == RECOVER)
- printf("File System is consistent\n");
+ log_debug("File System is consistent\n");
goto end;
}
diff --git a/fs/ext4/ext4_write.c b/fs/ext4/ext4_write.c
index ea4c5d4..38da392 100644
--- a/fs/ext4/ext4_write.c
+++ b/fs/ext4/ext4_write.c
@@ -21,7 +21,6 @@
*/
-#include <common.h>
#include <blk.h>
#include <log.h>
#include <malloc.h>
@@ -847,6 +846,7 @@
{
int ret = 0;
struct ext2_inode *file_inode = NULL;
+ struct ext2_inode *existing_file_inode = NULL;
unsigned char *inode_buffer = NULL;
int parent_inodeno;
int inodeno;
@@ -900,6 +900,15 @@
/* check if the filename is already present in root */
existing_file_inodeno = ext4fs_filename_unlink(filename);
if (existing_file_inodeno != -1) {
+ existing_file_inode = (struct ext2_inode *)zalloc(fs->inodesz);
+ if (!existing_file_inode)
+ goto fail;
+ ret = ext4fs_iget(existing_file_inodeno, existing_file_inode);
+ if (ret) {
+ free(existing_file_inode);
+ goto fail;
+ }
+
ret = ext4fs_delete_file(existing_file_inodeno);
fs->first_pass_bbmap = 0;
fs->curr_blkno = 0;
@@ -948,9 +957,15 @@
sizebytes = 0;
}
} else {
- file_inode->mode = cpu_to_le16(S_IFREG | S_IRWXU | S_IRGRP |
- S_IROTH | S_IXGRP | S_IXOTH);
+ if (existing_file_inode) {
+ file_inode->mode = existing_file_inode->mode;
+ } else {
+ file_inode->mode = cpu_to_le16(S_IFREG | S_IRWXU | S_IRGRP |
+ S_IROTH | S_IXGRP | S_IXOTH);
+ }
}
+ if (existing_file_inode)
+ free(existing_file_inode);
/* ToDo: Update correct time */
file_inode->mtime = cpu_to_le32(timestamp);
file_inode->atime = cpu_to_le32(timestamp);
diff --git a/fs/ext4/ext4fs.c b/fs/ext4/ext4fs.c
index 33e200f..da59cb0 100644
--- a/fs/ext4/ext4fs.c
+++ b/fs/ext4/ext4fs.c
@@ -20,7 +20,6 @@
* ext4write : Based on generic ext4 protocol.
*/
-#include <common.h>
#include <blk.h>
#include <ext_common.h>
#include <ext4fs.h>
diff --git a/fs/fat/fat.c b/fs/fat/fat.c
index 14e53cf..e2570e8 100644
--- a/fs/fat/fat.c
+++ b/fs/fat/fat.c
@@ -10,7 +10,6 @@
#define LOG_CATEGORY LOGC_FS
-#include <common.h>
#include <blk.h>
#include <config.h>
#include <exports.h>
@@ -1254,7 +1253,7 @@
static void __maybe_unused fat2rtc(u16 date, u16 time, struct rtc_time *tm)
{
tm->tm_mday = date & 0x1f;
- tm->tm_mon = (date & 0x1e0) >> 4;
+ tm->tm_mon = (date & 0x1e0) >> 5;
tm->tm_year = (date >> 9) + 1980;
tm->tm_sec = (time & 0x1f) << 1;
diff --git a/fs/fat/fat_write.c b/fs/fat/fat_write.c
index 8b5d669..ea877ee 100644
--- a/fs/fat/fat_write.c
+++ b/fs/fat/fat_write.c
@@ -7,7 +7,6 @@
#define LOG_CATEGORY LOGC_FS
-#include <common.h>
#include <command.h>
#include <config.h>
#include <div64.h>
@@ -18,6 +17,7 @@
#include <rand.h>
#include <asm/byteorder.h>
#include <asm/cache.h>
+#include <dm/uclass.h>
#include <linux/ctype.h>
#include <linux/math64.h>
#include "fat.c"
@@ -1152,6 +1152,41 @@
}
/**
+ * dentry_set_time() - set change time
+ *
+ * @dentptr: directory entry
+ */
+static void dentry_set_time(dir_entry *dentptr)
+{
+ if (CONFIG_IS_ENABLED(DM_RTC)) {
+ struct udevice *dev;
+ struct rtc_time tm;
+ u16 date;
+ u16 time;
+
+ uclass_first_device(UCLASS_RTC, &dev);
+ if (!dev)
+ goto err;
+ if (dm_rtc_get(dev, &tm))
+ goto err;
+ if (tm.tm_year < 1980 || tm.tm_year > 2107)
+ goto err;
+ date = (tm.tm_mday & 0x1f) |
+ ((tm.tm_mon & 0xf) << 5) |
+ ((tm.tm_year - 1980) << 9);
+ time = (tm.tm_sec > 1) |
+ ((tm.tm_min & 0x3f) << 5) |
+ (tm.tm_hour << 11);
+ dentptr->date = date;
+ dentptr->time = time;
+ return;
+ }
+err:
+ dentptr->date = 0x2821; /* 2000-01-01 */
+ dentptr->time = 0;
+}
+
+/**
* fill_dentry() - fill directory entry with shortname
*
* @mydata: private filesystem parameters
@@ -1171,6 +1206,12 @@
dentptr->attr = attr;
+ /* Set change date */
+ dentry_set_time(dentptr);
+ /* Set creation date */
+ dentptr->cdate = dentptr->date;
+ dentptr->ctime = dentptr->time;
+
memcpy(&dentptr->nameext, shortname, SHORT_NAME_SIZE);
}
@@ -1376,6 +1417,8 @@
/* Update file size in a directory entry */
retdent->size = cpu_to_le32(pos + size);
+ /* Update change date */
+ dentry_set_time(retdent);
} else {
/* Create a new file */
char shortname[SHORT_NAME_SIZE];
diff --git a/fs/fs.c b/fs/fs.c
index acf465b..bed1f72 100644
--- a/fs/fs.c
+++ b/fs/fs.c
@@ -9,7 +9,6 @@
#include <config.h>
#include <display_options.h>
#include <errno.h>
-#include <common.h>
#include <env.h>
#include <lmb.h>
#include <log.h>
@@ -21,6 +20,7 @@
#include <fs.h>
#include <sandboxfs.h>
#include <semihostingfs.h>
+#include <time.h>
#include <ubifs_uboot.h>
#include <btrfs.h>
#include <asm/global_data.h>
diff --git a/fs/fs_internal.c b/fs/fs_internal.c
index 111f91b..51c1719 100644
--- a/fs/fs_internal.c
+++ b/fs/fs_internal.c
@@ -7,7 +7,6 @@
#define LOG_CATEGORY LOGC_CORE
-#include <common.h>
#include <blk.h>
#include <compiler.h>
#include <log.h>
diff --git a/fs/jffs2/compr_zlib.c b/fs/jffs2/compr_zlib.c
index d306b6d..e1e3c15 100644
--- a/fs/jffs2/compr_zlib.c
+++ b/fs/jffs2/compr_zlib.c
@@ -35,8 +35,6 @@
*
*/
-#include <common.h>
-#include <config.h>
#include <jffs2/jffs2.h>
#include <jffs2/mini_inflate.h>
diff --git a/fs/jffs2/jffs2_1pass.c b/fs/jffs2/jffs2_1pass.c
index 49ba82e..5b7d7f4 100644
--- a/fs/jffs2/jffs2_1pass.c
+++ b/fs/jffs2/jffs2_1pass.c
@@ -111,7 +111,6 @@
*/
-#include <common.h>
#include <config.h>
#include <malloc.h>
#include <div64.h>
diff --git a/fs/jffs2/mergesort.c b/fs/jffs2/mergesort.c
index fca77aa..495937d 100644
--- a/fs/jffs2/mergesort.c
+++ b/fs/jffs2/mergesort.c
@@ -7,7 +7,6 @@
* http://www.chiark.greenend.org.uk/~sgtatham/algorithms/listsort.html
*/
-#include <common.h>
#include "jffs2_private.h"
int sort_list(struct b_list *list)
diff --git a/fs/sandbox/host_bootdev.c b/fs/sandbox/host_bootdev.c
index 3ef5362..3f74972 100644
--- a/fs/sandbox/host_bootdev.c
+++ b/fs/sandbox/host_bootdev.c
@@ -6,7 +6,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <bootdev.h>
#include <bootflow.h>
#include <bootmeth.h>
diff --git a/fs/sandbox/sandboxfs.c b/fs/sandbox/sandboxfs.c
index 4ae41d5..773b583 100644
--- a/fs/sandbox/sandboxfs.c
+++ b/fs/sandbox/sandboxfs.c
@@ -3,7 +3,7 @@
* Copyright (c) 2012, Google Inc.
*/
-#include <common.h>
+#include <stdio.h>
#include <fs.h>
#include <malloc.h>
#include <os.h>
diff --git a/fs/semihostingfs.c b/fs/semihostingfs.c
index 3592338..77e39ca 100644
--- a/fs/semihostingfs.c
+++ b/fs/semihostingfs.c
@@ -4,7 +4,7 @@
* Copyright (c) 2012, Google Inc.
*/
-#include <common.h>
+#include <stdio.h>
#include <fs.h>
#include <malloc.h>
#include <os.h>
diff --git a/fs/ubifs/super.c b/fs/ubifs/super.c
index 3e71603..788f88f 100644
--- a/fs/ubifs/super.c
+++ b/fs/ubifs/super.c
@@ -29,7 +29,6 @@
#include <linux/writeback.h>
#else
-#include <common.h>
#include <malloc.h>
#include <memalign.h>
#include <linux/bitops.h>
diff --git a/fs/ubifs/ubifs.c b/fs/ubifs/ubifs.c
index a509584..75de01e 100644
--- a/fs/ubifs/ubifs.c
+++ b/fs/ubifs/ubifs.c
@@ -11,7 +11,6 @@
* Adrian Hunter
*/
-#include <common.h>
#include <env.h>
#include <gzip.h>
#include <log.h>
diff --git a/fs/yaffs2/yaffs_mtdif.c b/fs/yaffs2/yaffs_mtdif.c
index 50fed2d..0eec22b 100644
--- a/fs/yaffs2/yaffs_mtdif.c
+++ b/fs/yaffs2/yaffs_mtdif.c
@@ -12,7 +12,6 @@
*/
/* XXX U-BOOT XXX */
-#include <common.h>
#include "yportenv.h"
diff --git a/fs/yaffs2/yaffs_mtdif2.c b/fs/yaffs2/yaffs_mtdif2.c
index 81a4d96..2bf171f 100644
--- a/fs/yaffs2/yaffs_mtdif2.c
+++ b/fs/yaffs2/yaffs_mtdif2.c
@@ -14,7 +14,6 @@
/* mtd interface for YAFFS2 */
/* XXX U-BOOT XXX */
-#include <common.h>
#include <linux/bug.h>
#include <linux/errno.h>
diff --git a/fs/yaffs2/yaffs_uboot_glue.c b/fs/yaffs2/yaffs_uboot_glue.c
index 0a92056..deddbaa 100644
--- a/fs/yaffs2/yaffs_uboot_glue.c
+++ b/fs/yaffs2/yaffs_uboot_glue.c
@@ -19,7 +19,6 @@
* This version now uses the ydevconfig mechanism to set up partitions.
*/
-#include <common.h>
#include <div64.h>
#include <malloc.h>
#include <linux/printk.h>
diff --git a/fs/zfs/dev.c b/fs/zfs/dev.c
index 251e7d1..722c6a8 100644
--- a/fs/zfs/dev.c
+++ b/fs/zfs/dev.c
@@ -8,7 +8,6 @@
*/
-#include <common.h>
#include <config.h>
#include <fs_internal.h>
#include <zfs_common.h>
@@ -26,5 +25,5 @@
int zfs_devread(int sector, int byte_offset, int byte_len, char *buf)
{
return fs_devread(zfs_blk_desc, part_info, sector, byte_offset,
- byte_len, buf);
+ byte_len, buf) ? 0 : 1;
}
diff --git a/fs/zfs/zfs.c b/fs/zfs/zfs.c
index 1fec96c..c44e7ec 100644
--- a/fs/zfs/zfs.c
+++ b/fs/zfs/zfs.c
@@ -10,7 +10,6 @@
* Copyright 2004 Sun Microsystems, Inc.
*/
-#include <common.h>
#include <log.h>
#include <malloc.h>
#include <linux/stat.h>
@@ -655,7 +654,7 @@
dn->endian)
<< SPA_MINBLOCKSHIFT;
*buf = malloc(size);
- if (*buf) {
+ if (!*buf) {
err = ZFS_ERR_OUT_OF_MEMORY;
break;
}
@@ -1559,6 +1558,10 @@
return 0;
}
+int is_word_aligned_ptr(void *ptr) {
+ return ((uintptr_t)ptr & (sizeof(void *) - 1)) == 0;
+}
+
int
zfs_nvlist_lookup_uint64(char *nvlist, char *name, uint64_t *out)
{
@@ -1574,6 +1577,20 @@
return ZFS_ERR_BAD_FS;
}
+ /* On arm64, calling be64_to_cpu() on a value stored at a memory address
+ * that's not 8-byte aligned causes the CPU to reset. Avoid that by copying the
+ * value somewhere else if needed.
+ */
+ if (!is_word_aligned_ptr((void *)nvpair)) {
+ uint64_t *alignedptr = malloc(sizeof(uint64_t));
+ if (!alignedptr)
+ return 0;
+ memcpy(alignedptr, nvpair, sizeof(uint64_t));
+ *out = be64_to_cpu(*alignedptr);
+ free(alignedptr);
+ return 1;
+ }
+
*out = be64_to_cpu(*(uint64_t *) nvpair);
return 1;
}
@@ -1617,6 +1634,11 @@
&size, 0);
if (!found)
return 0;
+
+ /* Allocate 12 bytes in addition to the nvlist size: One uint32 before the
+ * nvlist to hold the encoding method, and two zero uint32's after the
+ * nvlist as the NULL terminator.
+ */
ret = calloc(1, size + 3 * sizeof(uint32_t));
if (!ret)
return 0;
@@ -2112,7 +2134,7 @@
* Find requested blkid and the offset within that block.
*/
uint64_t blkid = file->offset + red;
- blkid = do_div(blkid, blksz);
+ uint64_t blkoff = do_div(blkid, blksz);
free(data->file_buf);
data->file_buf = 0;
@@ -2127,8 +2149,7 @@
movesize = min(length, data->file_end - (int)file->offset - red);
- memmove(buf, data->file_buf + file->offset + red
- - data->file_start, movesize);
+ memmove(buf, data->file_buf + blkoff, movesize);
buf += movesize;
length -= movesize;
red += movesize;
diff --git a/fs/zfs/zfs_fletcher.c b/fs/zfs/zfs_fletcher.c
index 008a303..b06c335 100644
--- a/fs/zfs/zfs_fletcher.c
+++ b/fs/zfs/zfs_fletcher.c
@@ -8,7 +8,6 @@
* Use is subject to license terms.
*/
-#include <common.h>
#include <malloc.h>
#include <linux/stat.h>
#include <linux/time.h>
diff --git a/fs/zfs/zfs_lzjb.c b/fs/zfs/zfs_lzjb.c
index b42d498..e79c5b4 100644
--- a/fs/zfs/zfs_lzjb.c
+++ b/fs/zfs/zfs_lzjb.c
@@ -8,7 +8,6 @@
* Use is subject to license terms.
*/
-#include <common.h>
#include <malloc.h>
#include <linux/stat.h>
#include <linux/time.h>
diff --git a/fs/zfs/zfs_sha256.c b/fs/zfs/zfs_sha256.c
index cb5b1c0..602d752 100644
--- a/fs/zfs/zfs_sha256.c
+++ b/fs/zfs/zfs_sha256.c
@@ -8,7 +8,6 @@
* Use is subject to license terms.
*/
-#include <common.h>
#include <malloc.h>
#include <linux/stat.h>
#include <linux/time.h>
diff --git a/include/acpi/acpi_s3.h b/include/acpi/acpi_s3.h
index d3f271f..f7bea94 100644
--- a/include/acpi/acpi_s3.h
+++ b/include/acpi/acpi_s3.h
@@ -37,6 +37,9 @@
#ifndef __ASSEMBLY__
+#include <linux/errno.h>
+#include <linux/types.h>
+
extern char __wakeup[];
extern int __wakeup_size;
diff --git a/include/acpi/acpigen.h b/include/acpi/acpigen.h
index 2c269ed..3aa94d7 100644
--- a/include/acpi/acpigen.h
+++ b/include/acpi/acpigen.h
@@ -121,7 +121,7 @@
*
* @percent: Percent of the core CPU operating frequency that will be
* available when this throttling state is invoked
- * @power: Throttling state’s maximum power dissipation (mw)
+ * @power: Throttling state's maximum power dissipation (mw)
* @latency: Worst-case latency (uS) that the CPU is unavailable during a
* transition from any throttling state to this throttling state
* @control: Value to be written to the Processor Control Register
@@ -920,7 +920,7 @@
* @ctx: ACPI context pointer
* @domain: Dependency domain number to which this P state entry belongs
* @numprocs: Number of processors belonging to the domain for this logical
- * processor’s P-states
+ * processor's P-states
* @coordtype: Coordination type
*/
void acpigen_write_psd_package(struct acpi_ctx *ctx, uint domain, uint numprocs,
@@ -972,7 +972,7 @@
* @ctx: ACPI context pointer
* @domain: dependency domain number to which this T state entry belongs
* @numprocs: Number of processors belonging to the domain for this logical
- * processor’s T-states
+ * processor's T-states
* @coordtype: Coordination type
*/
void acpigen_write_tsd_package(struct acpi_ctx *ctx, uint domain, uint numprocs,
diff --git a/include/adc.h b/include/adc.h
index 0d1a666..15e4cdb 100644
--- a/include/adc.h
+++ b/include/adc.h
@@ -7,6 +7,8 @@
#ifndef _ADC_H_
#define _ADC_H_
+#include <stdbool.h>
+
/* ADC_CHANNEL() - ADC channel bit mask, to select only required channels */
#define ADC_CHANNEL(x) (1 << x)
diff --git a/include/android_ab.h b/include/android_ab.h
index 1fee758..dbf2034 100644
--- a/include/android_ab.h
+++ b/include/android_ab.h
@@ -6,6 +6,8 @@
#ifndef __ANDROID_AB_H
#define __ANDROID_AB_H
+#include <stdbool.h>
+
struct blk_desc;
struct disk_partition;
diff --git a/include/api_public.h b/include/api_public.h
index 5a4465e..e89572c 100644
--- a/include/api_public.h
+++ b/include/api_public.h
@@ -8,6 +8,8 @@
#ifndef _API_PUBLIC_H_
#define _API_PUBLIC_H_
+#include <linux/types.h>
+
#define API_EINVAL 1 /* invalid argument(s) */
#define API_ENODEV 2 /* no device */
#define API_ENOMEM 3 /* no memory */
diff --git a/include/atf_common.h b/include/atf_common.h
index d69892f..5ae4509 100644
--- a/include/atf_common.h
+++ b/include/atf_common.h
@@ -74,6 +74,8 @@
#ifndef __ASSEMBLY__
+#include <linux/types.h>
+
/*******************************************************************************
* Structure used for telling the next BL how much of a particular type of
* memory is available for its use and how much is already used.
diff --git a/include/audio_codec.h b/include/audio_codec.h
index a81a315..a87b76c 100644
--- a/include/audio_codec.h
+++ b/include/audio_codec.h
@@ -7,6 +7,8 @@
#ifndef __AUDIO_CODEC_H__
#define __AUDIO_CODEC_H__
+#include <linux/types.h>
+
struct udevice;
/*
diff --git a/include/autoboot.h b/include/autoboot.h
index eb20499..c68bd79 100644
--- a/include/autoboot.h
+++ b/include/autoboot.h
@@ -12,6 +12,7 @@
#define __AUTOBOOT_H
#include <stdbool.h>
+#include <stddef.h>
#ifdef CONFIG_SANDBOX
diff --git a/include/axi.h b/include/axi.h
index 59fb0b2..133a06e 100644
--- a/include/axi.h
+++ b/include/axi.h
@@ -7,6 +7,8 @@
#ifndef _AXI_H_
#define _AXI_H_
+#include <linux/types.h>
+
struct udevice;
/**
diff --git a/include/bmp_layout.h b/include/bmp_layout.h
index a5c9498..eabbd25 100644
--- a/include/bmp_layout.h
+++ b/include/bmp_layout.h
@@ -10,6 +10,8 @@
#ifndef _BMP_H_
#define _BMP_H_
+#include <linux/compiler.h>
+
struct __packed bmp_color_table_entry {
__u8 blue;
__u8 green;
diff --git a/include/bootm.h b/include/bootm.h
index 9e0f8d6..6116070 100644
--- a/include/bootm.h
+++ b/include/bootm.h
@@ -273,21 +273,24 @@
int bootm_process_cmdline_env(int flags);
/**
- * zboot_start() - Boot a zimage
+ * zboot_run() - Run through the various steps to boot a zimage
*
* Boot a zimage, given the component parts
*
* @addr: Address where the bzImage is moved before booting, either
* BZIMAGE_LOAD_ADDR or ZIMAGE_LOAD_ADDR
- * @base: Pointer to the boot parameters, typically at address
- * DEFAULT_SETUP_BASE
+ * @size: Size of bzImage, or 0 to detect this
* @initrd: Address of the initial ramdisk, or 0 if none
* @initrd_size: Size of the initial ramdisk, or 0 if none
- * @cmdline: Command line to use for booting
+ * @base_addr: If non-zero, this indicates that the boot parameters have already
+ * been loaded by the caller to this address, so the load_zimage() call
+ * in zboot_load() will be skipped when booting
+ * @cmdline: If non-NULL, the environment variable containing the command line
+ * to use for booting
* Return: -EFAULT on error (normally it does not return)
*/
-int zboot_start(ulong addr, ulong size, ulong initrd, ulong initrd_size,
- ulong base, char *cmdline);
+int zboot_run(ulong addr, ulong size, ulong initrd, ulong initrd_size,
+ ulong base, char *cmdline);
/*
* zimage_get_kernel_version() - Get the version string from a kernel
diff --git a/include/bootmeth.h b/include/bootmeth.h
index 0fc3610..cd95173 100644
--- a/include/bootmeth.h
+++ b/include/bootmeth.h
@@ -7,6 +7,8 @@
#ifndef __bootmeth_h
#define __bootmeth_h
+#include <linux/bitops.h>
+
struct blk_desc;
struct bootflow;
struct bootflow_iter;
diff --git a/include/bootstd.h b/include/bootstd.h
index 99ce7b6..ac756e9 100644
--- a/include/bootstd.h
+++ b/include/bootstd.h
@@ -10,6 +10,8 @@
#define __bootstd_h
#include <dm/ofnode_decl.h>
+#include <linux/list.h>
+#include <linux/types.h>
struct udevice;
diff --git a/include/cedit.h b/include/cedit.h
index f43cafa..a31b424 100644
--- a/include/cedit.h
+++ b/include/cedit.h
@@ -7,12 +7,15 @@
#ifndef __CEDIT_H
#define __CEDIT_H
+#include <stdbool.h>
#include <dm/ofnode_decl.h>
+#include <linux/types.h>
struct abuf;
struct expo;
struct scene;
struct video_priv;
+struct udevice;
enum {
/* size increment for writing FDT */
diff --git a/include/common.h b/include/common.h
deleted file mode 100644
index a79c2bb..0000000
--- a/include/common.h
+++ /dev/null
@@ -1,33 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Common header file for U-Boot
- *
- * This file still includes quite a few headers that should be included
- * individually as needed. Patches to remove things are welcome.
- *
- * (C) Copyright 2000-2009
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- */
-
-#ifndef __COMMON_H_
-#define __COMMON_H_ 1
-
-#ifndef __ASSEMBLY__ /* put C only stuff in this section */
-#include <config.h>
-#include <errno.h>
-#include <time.h>
-#include <linux/types.h>
-#include <linux/string.h>
-#include <stdarg.h>
-#include <stdio.h>
-#include <linux/kernel.h>
-#include <asm/u-boot.h> /* boot information for Linux kernel */
-#include <vsprintf.h>
-#endif /* __ASSEMBLY__ */
-
-/* Pull in stuff for the build system */
-#ifdef DO_DEPS_ONLY
-# include <env_internal.h>
-#endif
-
-#endif /* __COMMON_H_ */
diff --git a/include/configs/apalis-imx8.h b/include/configs/apalis-imx8.h
index 845705c..c8ec034 100644
--- a/include/configs/apalis-imx8.h
+++ b/include/configs/apalis-imx8.h
@@ -46,8 +46,6 @@
"fdt_board=eval\0" \
"initrd_addr=0x83800000\0" \
"initrd_high=0xffffffffffffffff\0" \
- "setup=setenv setupargs console=tty1 console=${console},${baudrate} " \
- "consoleblank=0 earlycon\0" \
"update_uboot=askenv confirm Did you load flash.bin resp. u-boot-dtb.imx (y/N)?; " \
"if test \"$confirm\" = \"y\"; then " \
"setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt " \
diff --git a/include/configs/apalis_imx6.h b/include/configs/apalis_imx6.h
index 8a9f3ef..0df3917 100644
--- a/include/configs/apalis_imx6.h
+++ b/include/configs/apalis_imx6.h
@@ -64,12 +64,9 @@
#define CFG_EXTRA_ENV_SETTINGS \
BOOTENV \
- "boot_file=zImage\0" \
"boot_script_dhcp=boot.scr\0" \
"console=ttymxc0\0" \
- "defargs=enable_wait_mode=off vmalloc=400M\0" \
"fdt_board=eval\0" \
- "fdt_fixup=;\0" \
MEM_LAYOUT_ENV_SETTINGS \
UBOOT_UPDATE \
"setethupdate=if env exists ethaddr; then; else setenv ethaddr " \
@@ -80,16 +77,12 @@
"|| setenv drive 2; mmc rescan; load ${interface} ${drive}:1" \
" ${loadaddr} flash_blk.img && " \
"source ${loadaddr}\0" \
- "setup=setenv setupargs fec_mac=${ethaddr} " \
- "consoleblank=0 no_console_suspend=1 console=tty1 " \
- "console=${console},${baudrate}n8\0 " \
"setupdate=run setsdupdate || run setusbupdate || run setethupdate\0" \
"setusbupdate=usb start && setenv interface usb; setenv drive 0; " \
"load ${interface} ${drive}:1 ${loadaddr} flash_blk.img && " \
"source ${loadaddr}\0" \
"splashpos=m,m\0" \
- "splashimage=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
- "vidargs=mxc_hdmi.only_cea=1 fbmem=32M\0"
+ "splashimage=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0"
/* Miscellaneous configurable options */
diff --git a/include/configs/apple.h b/include/configs/apple.h
index 0576bc0..1e08b11 100644
--- a/include/configs/apple.h
+++ b/include/configs/apple.h
@@ -6,29 +6,13 @@
/* Environment */
#define ENV_DEVICE_SETTINGS \
"stdin=serial,usbkbd,spikbd\0" \
- "stdout=serial,vidconsole\0" \
- "stderr=serial,vidconsole\0"
+ "stdout=vidconsole,serial\0" \
+ "stderr=vidconsole,serial\0"
-#if IS_ENABLED(CONFIG_CMD_NVME)
- #define BOOT_TARGET_NVME(func) func(NVME, nvme, 0)
-#else
- #define BOOT_TARGET_NVME(func)
-#endif
-
-#if IS_ENABLED(CONFIG_CMD_USB)
- #define BOOT_TARGET_USB(func) func(USB, usb, 0)
-#else
- #define BOOT_TARGET_USB(func)
-#endif
-
-#define BOOT_TARGET_DEVICES(func) \
- BOOT_TARGET_NVME(func) \
- BOOT_TARGET_USB(func)
-
-#include <config_distro_bootcmd.h>
+#define BOOT_TARGETS "nvme usb"
#define CFG_EXTRA_ENV_SETTINGS \
ENV_DEVICE_SETTINGS \
- BOOTENV
+ "boot_targets=" BOOT_TARGETS "\0"
#endif
diff --git a/include/configs/arbel.h b/include/configs/arbel.h
index 576ee37..d8ccc45 100644
--- a/include/configs/arbel.h
+++ b/include/configs/arbel.h
@@ -7,7 +7,7 @@
#define __CONFIG_ARBEL_H
#define CFG_SYS_SDRAM_BASE 0x0
-#define CFG_SYS_BOOTMAPSZ (128 << 20)
+#define CFG_SYS_BOOTMAPSZ (192 << 20)
#define CFG_SYS_BOOTM_LEN (20 << 20)
#define CFG_SYS_INIT_RAM_ADDR CFG_SYS_SDRAM_BASE
#define CFG_SYS_INIT_RAM_SIZE 0x8000
diff --git a/include/configs/colibri-imx6ull.h b/include/configs/colibri-imx6ull.h
index 561a61e..8860cee 100644
--- a/include/configs/colibri-imx6ull.h
+++ b/include/configs/colibri-imx6ull.h
@@ -48,12 +48,12 @@
"ubiargs=ubi.mtd=ubi root=ubi0:rootfs rw rootfstype=ubifs " \
"ubi.fm_autoconvert=1\0" \
"ubiboot=run setup; " \
- "setenv bootargs ${defargs} ${ubiargs} " \
- "${setupargs} ${vidargs} ${tdxargs}; echo Booting from NAND...; " \
+ "setenv bootargs ${ubiargs} " \
+ "${setupargs} ${tdxargs}; echo Booting from NAND...; " \
"ubi part ubi &&" \
"ubi read ${kernel_addr_r} kernel && " \
"ubi read ${fdt_addr_r} dtb && " \
- "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \
+ "bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \
#if defined(CONFIG_TARGET_COLIBRI_IMX6ULL_NAND)
/* Run Distro Boot script if ubiboot fails */
@@ -86,11 +86,7 @@
UBOOT_UPDATE \
"boot_script_dhcp=boot.scr\0" \
"console=ttymxc0\0" \
- "defargs=user_debug=30\0" \
"fdt_board=eval-v3\0" \
- "fdt_fixup=;\0" \
- "ip_dyn=yes\0" \
- "kernel_file=zImage\0" \
"setethupdate=if env exists ethaddr; then; else setenv ethaddr " \
"00:14:2d:00:00:00; fi; tftpboot ${loadaddr} " \
"${board}/flash_eth.img && source ${loadaddr}\0" \
@@ -99,7 +95,7 @@
"${board}/flash_blk.img && source ${loadaddr}\0" \
"setup=setenv setupargs " \
"console=tty1 console=${console}" \
- ",${baudrate}n8 ${memargs} ${mtdparts} consoleblank=0\0" \
+ ",${baudrate}n8 ${memargs} ${mtdparts}\0" \
"setupdate=run setsdupdate || run setusbupdate || run setethupdate\0" \
"setusbupdate=usb start && setenv interface usb && " \
"fatload ${interface} 0:1 ${loadaddr} " \
diff --git a/include/configs/colibri-imx8x.h b/include/configs/colibri-imx8x.h
index 042fcb8..2b7fea3 100644
--- a/include/configs/colibri-imx8x.h
+++ b/include/configs/colibri-imx8x.h
@@ -40,8 +40,6 @@
"fdt_board=eval-v3\0" \
"initrd_addr=0x83800000\0" \
"initrd_high=0xffffffffffffffff\0" \
- "setup=setenv setupargs console=tty1 console=${console},${baudrate} " \
- "consoleblank=0 earlycon\0" \
"update_uboot=askenv confirm Did you load flash.bin resp. u-boot-dtb.imx (y/N)?; " \
"if test \"$confirm\" = \"y\"; then " \
"setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt " \
diff --git a/include/configs/colibri_imx6.h b/include/configs/colibri_imx6.h
index 4b28418..79e5b87 100644
--- a/include/configs/colibri_imx6.h
+++ b/include/configs/colibri_imx6.h
@@ -58,12 +58,9 @@
#define CFG_EXTRA_ENV_SETTINGS \
BOOTENV \
- "boot_file=zImage\0" \
"boot_script_dhcp=boot.scr\0" \
"console=ttymxc0\0" \
- "defargs=enable_wait_mode=off galcore.contiguousSize=50331648\0" \
"fdt_board=eval-v3\0" \
- "fdt_fixup=;\0" \
MEM_LAYOUT_ENV_SETTINGS \
UBOOT_UPDATE \
"setethupdate=if env exists ethaddr; then; else setenv ethaddr " \
@@ -72,16 +69,12 @@
"setsdupdate=setenv interface mmc; setenv drive 1; mmc rescan; load " \
"${interface} ${drive}:1 ${loadaddr} flash_blk.img && " \
"source ${loadaddr}\0" \
- "setup=setenv setupargs fec_mac=${ethaddr} " \
- "consoleblank=0 no_console_suspend=1 console=tty1 " \
- "console=${console},${baudrate}n8\0 " \
"setupdate=run setsdupdate || run setusbupdate || run setethupdate\0" \
"setusbupdate=usb start && setenv interface usb; setenv drive 0; " \
"load ${interface} ${drive}:1 ${loadaddr} flash_blk.img && " \
"source ${loadaddr}\0" \
"splashpos=m,m\0" \
- "splashimage=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
- "vidargs=fbmem=8M\0"
+ "splashimage=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0"
/* Miscellaneous configurable options */
diff --git a/include/configs/colibri_imx7.h b/include/configs/colibri_imx7.h
index 7a9f4af..33133a0b 100644
--- a/include/configs/colibri_imx7.h
+++ b/include/configs/colibri_imx7.h
@@ -89,12 +89,12 @@
"ubiargs=ubi.mtd=ubi root=ubi0:rootfs rootfstype=ubifs " \
"ubi.fm_autoconvert=1\0" \
"ubiboot=run setup; " \
- "setenv bootargs ${defargs} ${ubiargs} " \
- "${setupargs} ${vidargs} ${tdxargs}; echo Booting from NAND...; " \
+ "setenv bootargs ${ubiargs} " \
+ "${setupargs} ${tdxargs}; echo Booting from NAND...; " \
"ubi part ubi && run m4boot && " \
"ubi read ${kernel_addr_r} kernel && " \
"ubi read ${fdt_addr_r} dtb && " \
- "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \
+ "bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \
#if defined(CONFIG_TARGET_COLIBRI_IMX7_NAND)
#define MODULE_EXTRA_ENV_SETTINGS \
@@ -123,15 +123,10 @@
MEM_LAYOUT_ENV_SETTINGS \
MODULE_EXTRA_ENV_SETTINGS \
UBOOT_UPDATE \
- "boot_file=zImage\0" \
"boot_script_dhcp=boot.scr\0" \
"console=ttymxc0\0" \
- "defargs=\0" \
"fdt_board=eval-v3\0" \
- "fdt_fixup=;\0" \
"m4boot=;\0" \
- "ip_dyn=yes\0" \
- "kernel_file=zImage\0" \
"setethupdate=if env exists ethaddr; then; else setenv ethaddr " \
"00:14:2d:00:00:00; fi; tftpboot ${loadaddr} " \
"${board}/flash_eth.img && source ${loadaddr}\0" \
@@ -140,7 +135,7 @@
"${board}/flash_blk.img && source ${loadaddr}\0" \
"setup=setenv setupargs " \
"console=tty1 console=${console}" \
- ",${baudrate}n8 ${memargs} ${mtdparts} consoleblank=0\0" \
+ ",${baudrate}n8 ${memargs} ${mtdparts}\0" \
"setupdate=run setsdupdate || run setusbupdate || run setethupdate\0" \
"setusbupdate=usb start && setenv interface usb && " \
"fatload ${interface} 0:1 ${loadaddr} " \
diff --git a/include/configs/endeavoru.h b/include/configs/endeavoru.h
index 46c582e..348078f 100644
--- a/include/configs/endeavoru.h
+++ b/include/configs/endeavoru.h
@@ -53,7 +53,8 @@
"boot_block_size_r=0x200000\0" \
"boot_block_size=0x1000\0" \
"bootloader_file=u-boot-dtb-tegra.bin\0" \
- "check_button=gpio input 179; test $? -eq 0\0" \
+ "button_cmd_0_name=Volume Down\0" \
+ "button_cmd_0=bootmenu\0" \
"partitions=name=emmc,start=0,size=-,uuid=${uuid_gpt_rootfs}\0" \
ENDEAVORU_BOOTMENU
diff --git a/include/configs/evb_rk3328.h b/include/configs/evb_rk3328.h
index d10e5b1..c985080 100644
--- a/include/configs/evb_rk3328.h
+++ b/include/configs/evb_rk3328.h
@@ -6,6 +6,11 @@
#ifndef __EVB_RK3328_H
#define __EVB_RK3328_H
+#define ROCKCHIP_DEVICE_SETTINGS \
+ "stdin=serial,usbkbd\0" \
+ "stdout=serial,vidconsole\0" \
+ "stderr=serial,vidconsole\0"
+
#include <configs/rk3328_common.h>
#endif
diff --git a/include/configs/grouper.h b/include/configs/grouper.h
index 93304dd..8064b88 100644
--- a/include/configs/grouper.h
+++ b/include/configs/grouper.h
@@ -49,7 +49,10 @@
"boot_block_size_r=0x200000\0" \
"boot_block_size=0x1000\0" \
"bootloader_file=u-boot-dtb-tegra.bin\0" \
- "check_button=gpio input 131; test $? -eq 0;\0" \
+ "button_cmd_0_name=Volume Down\0" \
+ "button_cmd_0=bootmenu\0" \
+ "button_cmd_1_name=Lid\0" \
+ "button_cmd_1=poweroff\0" \
"partitions=name=emmc,start=0,size=-,uuid=${uuid_gpt_rootfs}\0" \
GROUPER_BOOTMENU
diff --git a/include/configs/hmibsc.h b/include/configs/hmibsc.h
new file mode 100644
index 0000000..27404c8
--- /dev/null
+++ b/include/configs/hmibsc.h
@@ -0,0 +1,16 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Board configuration file for HMIBSC
+ *
+ * (C) Copyright 2024 Sumit Garg <sumit.garg@linaro.org>
+ */
+
+#ifndef __CONFIGS_HMIBSC_H
+#define __CONFIGS_HMIBSC_H
+
+/* PHY needs a longer aneg time */
+#define PHY_ANEG_TIMEOUT 8000
+
+#define CFG_ENV_FLAGS_LIST_STATIC "BOOT_A_LEFT:dw,BOOT_B_LEFT:dw,BOOT_ORDER:sw"
+
+#endif
diff --git a/include/configs/jethub.h b/include/configs/jethub.h
index e22db49..2c44bfc 100644
--- a/include/configs/jethub.h
+++ b/include/configs/jethub.h
@@ -11,7 +11,7 @@
#if defined(CONFIG_MESON_AXG)
#define BOOTENV_DEV_RESCUE(devtypeu, devtypel, instance) \
"bootcmd_rescue=" \
- "if gpio input 10; then " \
+ "if gpio input periphs-banks10; then " \
"run bootcmd_mmc0; " \
"run bootcmd_usb0;" \
"fi;\0"
diff --git a/include/configs/meson64.h b/include/configs/meson64.h
index efab9a6..65fa5f3 100644
--- a/include/configs/meson64.h
+++ b/include/configs/meson64.h
@@ -120,6 +120,12 @@
#include <config_distro_bootcmd.h>
+#ifdef CONFIG_OF_UPSTREAM
+#define FDTFILE_NAME CONFIG_DEFAULT_DEVICE_TREE ".dtb"
+#else
+#define FDTFILE_NAME "amlogic/" CONFIG_DEFAULT_DEVICE_TREE ".dtb"
+#endif
+
#ifndef CFG_EXTRA_ENV_SETTINGS
#define CFG_EXTRA_ENV_SETTINGS \
"stdin=" STDIN_CFG "\0" \
@@ -133,7 +139,7 @@
"pxefile_addr_r=" PXEFILE_ADDR_R "\0" \
"fdtoverlay_addr_r=" FDTOVERLAY_ADDR_R "\0" \
"ramdisk_addr_r=" RAMDISK_ADDR_R "\0" \
- "fdtfile=amlogic/" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \
+ "fdtfile=" FDTFILE_NAME "\0" \
"dfu_alt_info=fitimage ram " KERNEL_ADDR_R " 0x4000000 \0" \
BOOTENV
#endif
diff --git a/include/configs/mt7621.h b/include/configs/mt7621.h
index bf2bc2d..e6dba70 100644
--- a/include/configs/mt7621.h
+++ b/include/configs/mt7621.h
@@ -14,9 +14,6 @@
#define CFG_SYS_INIT_SP_OFFSET 0x800000
-/* MMC */
-#define MMC_SUPPORTS_TUNING
-
/* Serial SPL */
#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_SERIAL)
#define CFG_SYS_NS16550_CLK 50000000
diff --git a/include/configs/mt7623.h b/include/configs/mt7623.h
index fca234a..6f42cd3 100644
--- a/include/configs/mt7623.h
+++ b/include/configs/mt7623.h
@@ -11,9 +11,6 @@
#include <linux/sizes.h>
-/* MMC */
-#define MMC_SUPPORTS_TUNING
-
/* DRAM */
#define CFG_SYS_SDRAM_BASE 0x80000000
diff --git a/include/configs/octeontx2_common.h b/include/configs/octeontx2_common.h
index c4db385..f415dff 100644
--- a/include/configs/octeontx2_common.h
+++ b/include/configs/octeontx2_common.h
@@ -19,9 +19,4 @@
"loadaddr=20080000\0" \
"ethrotate=yes\0"
-#if defined(CONFIG_MMC_OCTEONTX)
-#define MMC_SUPPORTS_TUNING
-/** EMMC specific defines */
-#endif
-
#endif /* __OCTEONTX2_COMMON_H__ */
diff --git a/include/configs/poleg.h b/include/configs/poleg.h
index 2a2d85c..14ead16 100644
--- a/include/configs/poleg.h
+++ b/include/configs/poleg.h
@@ -30,9 +30,9 @@
"eth2addr=00:00:F7:A0:00:FE\0" \
"eth3addr=00:00:F7:A0:00:FF\0" \
"console=ttyS0,115200n8\0" \
- "earlycon=uart8250,mmio32,0xf0000000\0" \
+ "earlycon=uart8250,mmio32,0xf0001000\0" \
"common_bootargs=setenv bootargs earlycon=${earlycon} root=/dev/ram " \
- "console=${console} mem=${mem} ramdisk_size=48000 basemac=${ethaddr}\0" \
+ "console=${console} mem=${mem} ramdisk_size=48000 basemac=${ethaddr} oops=panic panic=20\0" \
"sd_prog=fatload mmc 0 10000000 image-bmc; cp.b 10000000 80000000 ${filesize}\0" \
"sd_run=fatload mmc 0 10000000 image-bmc; bootm 10200000\0" \
"\0"
diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h
index e920ec7..2c40674 100644
--- a/include/configs/rk3328_common.h
+++ b/include/configs/rk3328_common.h
@@ -26,6 +26,7 @@
ENV_MEM_LAYOUT_SETTINGS \
"fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
"partitions=" PARTS_DEFAULT \
+ ROCKCHIP_DEVICE_SETTINGS \
"boot_targets=" BOOT_TARGETS "\0"
#endif
diff --git a/include/configs/tegra-common-post.h b/include/configs/tegra-common-post.h
index 0d0965e..fc74980 100644
--- a/include/configs/tegra-common-post.h
+++ b/include/configs/tegra-common-post.h
@@ -7,33 +7,7 @@
#ifndef __TEGRA_COMMON_POST_H
#define __TEGRA_COMMON_POST_H
-#if IS_ENABLED(CONFIG_CMD_USB)
-#define BOOT_TARGET_USB(func) func(USB, usb, 0)
-#else
-#define BOOT_TARGET_USB(func)
-#endif
-
-#if CONFIG_IS_ENABLED(CMD_DHCP) && CONFIG_IS_ENABLED(CMD_PXE)
-#define BOOT_TARGET_PXE(func) func(PXE, pxe, na)
-#else
-#define BOOT_TARGET_PXE(func)
-#endif
-
-#if CONFIG_IS_ENABLED(CMD_DHCP)
-#define BOOT_TARGET_DHCP(func) func(DHCP, dhcp, na)
-#else
-#define BOOT_TARGET_DHCP(func)
-#endif
-
-#ifndef BOOT_TARGET_DEVICES
-#define BOOT_TARGET_DEVICES(func) \
- func(MMC, mmc, 1) \
- func(MMC, mmc, 0) \
- BOOT_TARGET_USB(func) \
- BOOT_TARGET_PXE(func) \
- BOOT_TARGET_DHCP(func)
-#endif
-#include <config_distro_bootcmd.h>
+#define BOOT_TARGETS "mmc1 mmc0 usb pxe dhcp"
#ifdef CONFIG_TEGRA_KEYBOARD
#define STDIN_KBD_KBC ",tegra-kbc"
@@ -88,7 +62,7 @@
MEM_LAYOUT_ENV_SETTINGS \
"fdt_high=" FDT_HIGH "\0" \
"initrd_high=" INITRD_HIGH "\0" \
- BOOTENV \
+ "boot_targets=" BOOT_TARGETS "\0" \
BOARD_EXTRA_ENV_SETTINGS
#endif /* __TEGRA_COMMON_POST_H */
diff --git a/include/configs/transformer-common.h b/include/configs/transformer-common.h
index 3b7db0a..bb6817c 100644
--- a/include/configs/transformer-common.h
+++ b/include/configs/transformer-common.h
@@ -71,18 +71,20 @@
"bootmenu_1=mount external storage=usb start && ums 0 mmc 1; bootmenu\0" \
"bootmenu_2=fastboot=echo Starting Fastboot protocol ...; fastboot usb 0; bootmenu\0" \
"bootmenu_3=update bootloader=run flash_uboot\0" \
- "bootmenu_4=enter console=usb start; setenv skip_boot 1; exit\0" \
- "bootmenu_5=reboot RCM=enterrcm\0" \
- "bootmenu_6=reboot=reset\0" \
- "bootmenu_7=power off=poweroff\0" \
+ "bootmenu_4=reboot RCM=enterrcm\0" \
+ "bootmenu_5=reboot=reset\0" \
+ "bootmenu_6=power off=poweroff\0" \
"bootmenu_delay=-1\0"
#define BOARD_EXTRA_ENV_SETTINGS \
"spi_size=0x400000\0" \
"boot_block_size_r=0x200000\0" \
"boot_block_size=0x1000\0" \
- "check_button=gpio input ${gpio_button}; test $? -eq 0;\0" \
"bootloader_file=u-boot-dtb-tegra.bin\0" \
+ "button_cmd_0_name=Volume Down\0" \
+ "button_cmd_0=bootmenu\0" \
+ "button_cmd_1_name=Lid sensor\0" \
+ "button_cmd_1=poweroff\0" \
"partitions=name=emmc,start=0,size=-,uuid=${uuid_gpt_rootfs}\0" \
TRANSFORMER_BOOTMENU
diff --git a/include/configs/verdin-am62.h b/include/configs/verdin-am62.h
index 9d2e37f..ac44809 100644
--- a/include/configs/verdin-am62.h
+++ b/include/configs/verdin-am62.h
@@ -39,12 +39,9 @@
#define CFG_EXTRA_ENV_SETTINGS \
BOOTENV \
MEM_LAYOUT_ENV_SETTINGS \
- "boot_scripts=boot.scr\0" \
"boot_script_dhcp=boot.scr\0" \
"console=ttyS2\0" \
"fdt_board=dev\0" \
- "setup=setenv setupargs console=tty1 console=${console},${baudrate} " \
- "consoleblank=0 earlycon=ns16550a,mmio32,0x02800000\0" \
"update_tiboot3=askenv confirm Did you load tiboot3.bin (y/N)?; " \
"if test \"$confirm\" = \"y\"; then " \
"setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt " \
diff --git a/include/configs/verdin-imx8mm.h b/include/configs/verdin-imx8mm.h
index a7ea028..34238d3 100644
--- a/include/configs/verdin-imx8mm.h
+++ b/include/configs/verdin-imx8mm.h
@@ -37,14 +37,11 @@
#define CFG_EXTRA_ENV_SETTINGS \
BOOTENV \
MEM_LAYOUT_ENV_SETTINGS \
- "boot_file=Image\0" \
"boot_script_dhcp=boot.scr\0" \
"console=ttymxc0\0" \
"fdt_board=dev\0" \
"initrd_addr=0x43800000\0" \
"initrd_high=0xffffffffffffffff\0" \
- "setup=setenv setupargs console=tty1 console=${console},${baudrate} " \
- "consoleblank=0 earlycon\0" \
"update_uboot=askenv confirm Did you load flash.bin (y/N)?; " \
"if test \"$confirm\" = \"y\"; then " \
"setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt " \
diff --git a/include/configs/verdin-imx8mp.h b/include/configs/verdin-imx8mp.h
index 256bab0..0b88e95 100644
--- a/include/configs/verdin-imx8mp.h
+++ b/include/configs/verdin-imx8mp.h
@@ -13,7 +13,6 @@
(QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
#ifdef CONFIG_SPL_BUILD
-/*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
#define CFG_MALLOC_F_ADDR 0x184000
@@ -40,15 +39,11 @@
#define CFG_EXTRA_ENV_SETTINGS \
BOOTENV \
MEM_LAYOUT_ENV_SETTINGS \
- "boot_file=Image\0" \
- "boot_scripts=boot.scr\0" \
"boot_script_dhcp=boot.scr\0" \
"console=ttymxc2\0" \
"fdt_board=dev\0" \
"initrd_addr=0x43800000\0" \
"initrd_high=0xffffffffffffffff\0" \
- "setup=setenv setupargs console=tty1 console=${console},${baudrate} " \
- "consoleblank=0 earlycon\0" \
"update_uboot=askenv confirm Did you load flash.bin (y/N)?; " \
"if test \"$confirm\" = \"y\"; then " \
"setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt " \
diff --git a/include/configs/x3-t30.h b/include/configs/x3-t30.h
index 1453254..78a2012 100644
--- a/include/configs/x3-t30.h
+++ b/include/configs/x3-t30.h
@@ -54,7 +54,8 @@
"boot_block_size_r=0x200000\0" \
"boot_block_size=0x1000\0" \
"bootloader_file=u-boot-dtb-tegra.bin\0" \
- "check_button=gpio input 116; test $? -eq 0\0" \
+ "button_cmd_0_name=Volume Down\0" \
+ "button_cmd_0=bootmenu\0" \
"partitions=name=emmc,start=0,size=-,uuid=${uuid_gpt_rootfs}\0" \
X3_BOOTMENU
diff --git a/include/ddr_spd.h b/include/ddr_spd.h
index fe163da..c4d199f 100644
--- a/include/ddr_spd.h
+++ b/include/ddr_spd.h
@@ -6,6 +6,8 @@
#ifndef _DDR_SPD_H_
#define _DDR_SPD_H_
+#include <linux/types.h>
+
/*
* Format from "JEDEC Standard No. 21-C,
* Appendix D: Rev 1.0: SPD's for DDR SDRAM
diff --git a/include/display.h b/include/display.h
index 3d01217..e8d8aaa 100644
--- a/include/display.h
+++ b/include/display.h
@@ -6,6 +6,8 @@
#ifndef _DISPLAY_H
#define _DISPLAY_H
+#include <linux/types.h>
+
struct udevice;
struct display_timing;
diff --git a/include/dm/of.h b/include/dm/of.h
index b1c934f..b7404c1 100644
--- a/include/dm/of.h
+++ b/include/dm/of.h
@@ -7,7 +7,6 @@
#ifndef _DM_OF_H
#define _DM_OF_H
-#include <asm/u-boot.h>
#include <asm/global_data.h>
/* integer value within a device tree property which references another node */
diff --git a/include/dm/test.h b/include/dm/test.h
index b593750..0273741 100644
--- a/include/dm/test.h
+++ b/include/dm/test.h
@@ -6,6 +6,8 @@
#ifndef __DM_TEST_H
#define __DM_TEST_H
+#include <linux/types.h>
+
struct udevice;
/**
diff --git a/include/dt-bindings/ata/ahci.h b/include/dt-bindings/ata/ahci.h
deleted file mode 100644
index b3f3b7c..0000000
--- a/include/dt-bindings/ata/ahci.h
+++ /dev/null
@@ -1,20 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */
-/*
- * This header provides constants for most AHCI bindings.
- */
-
-#ifndef _DT_BINDINGS_ATA_AHCI_H
-#define _DT_BINDINGS_ATA_AHCI_H
-
-/* Host Bus Adapter generic platform capabilities */
-#define HBA_SSS (1 << 27)
-#define HBA_SMPS (1 << 28)
-
-/* Host Bus Adapter port-specific platform capabilities */
-#define HBA_PORT_HPCP (1 << 18)
-#define HBA_PORT_MPSP (1 << 19)
-#define HBA_PORT_CPD (1 << 20)
-#define HBA_PORT_ESP (1 << 21)
-#define HBA_PORT_FBSCP (1 << 22)
-
-#endif
diff --git a/include/dt-bindings/clock/imx93-clock.h b/include/dt-bindings/clock/imx93-clock.h
index 35a1f62..787c9e7 100644
--- a/include/dt-bindings/clock/imx93-clock.h
+++ b/include/dt-bindings/clock/imx93-clock.h
@@ -203,6 +203,7 @@
#define IMX93_CLK_ARM_PLL 198
#define IMX93_CLK_A55_SEL 199
#define IMX93_CLK_A55_CORE 200
-#define IMX93_CLK_END 201
+#define IMX93_CLK_PDM_IPG 201
+#define IMX93_CLK_END 202
#endif
diff --git a/include/dt-bindings/gpio/gpio.h b/include/dt-bindings/gpio/gpio.h
deleted file mode 100644
index c029467..0000000
--- a/include/dt-bindings/gpio/gpio.h
+++ /dev/null
@@ -1,42 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * This header provides constants for most GPIO bindings.
- *
- * Most GPIO bindings include a flags cell as part of the GPIO specifier.
- * In most cases, the format of the flags cell uses the standard values
- * defined in this header.
- */
-
-#ifndef _DT_BINDINGS_GPIO_GPIO_H
-#define _DT_BINDINGS_GPIO_GPIO_H
-
-/* Bit 0 express polarity */
-#define GPIO_ACTIVE_HIGH 0
-#define GPIO_ACTIVE_LOW 1
-
-/* Bit 1 express single-endedness */
-#define GPIO_PUSH_PULL 0
-#define GPIO_SINGLE_ENDED 2
-
-/* Bit 2 express Open drain or open source */
-#define GPIO_LINE_OPEN_SOURCE 0
-#define GPIO_LINE_OPEN_DRAIN 4
-
-/*
- * Open Drain/Collector is the combination of single-ended open drain interface.
- * Open Source/Emitter is the combination of single-ended open source interface.
- */
-#define GPIO_OPEN_DRAIN (GPIO_SINGLE_ENDED | GPIO_LINE_OPEN_DRAIN)
-#define GPIO_OPEN_SOURCE (GPIO_SINGLE_ENDED | GPIO_LINE_OPEN_SOURCE)
-
-/* Bit 3 express GPIO suspend/resume and reset persistence */
-#define GPIO_PERSISTENT 0
-#define GPIO_TRANSITORY 8
-
-/* Bit 4 express pull up */
-#define GPIO_PULL_UP 16
-
-/* Bit 5 express pull down */
-#define GPIO_PULL_DOWN 32
-
-#endif
diff --git a/include/dt-bindings/gpio/meson-axg-gpio.h b/include/dt-bindings/gpio/meson-axg-gpio.h
deleted file mode 100644
index 25bb1ff..0000000
--- a/include/dt-bindings/gpio/meson-axg-gpio.h
+++ /dev/null
@@ -1,116 +0,0 @@
-/*
- * Copyright (c) 2017 Amlogic, Inc. All rights reserved.
- * Author: Xingyu Chen <xingyu.chen@amlogic.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef _DT_BINDINGS_MESON_AXG_GPIO_H
-#define _DT_BINDINGS_MESON_AXG_GPIO_H
-
-/* First GPIO chip */
-#define GPIOAO_0 0
-#define GPIOAO_1 1
-#define GPIOAO_2 2
-#define GPIOAO_3 3
-#define GPIOAO_4 4
-#define GPIOAO_5 5
-#define GPIOAO_6 6
-#define GPIOAO_7 7
-#define GPIOAO_8 8
-#define GPIOAO_9 9
-#define GPIOAO_10 10
-#define GPIOAO_11 11
-#define GPIOAO_12 12
-#define GPIOAO_13 13
-#define GPIO_TEST_N 14
-
-/* Second GPIO chip */
-#define GPIOZ_0 0
-#define GPIOZ_1 1
-#define GPIOZ_2 2
-#define GPIOZ_3 3
-#define GPIOZ_4 4
-#define GPIOZ_5 5
-#define GPIOZ_6 6
-#define GPIOZ_7 7
-#define GPIOZ_8 8
-#define GPIOZ_9 9
-#define GPIOZ_10 10
-#define BOOT_0 11
-#define BOOT_1 12
-#define BOOT_2 13
-#define BOOT_3 14
-#define BOOT_4 15
-#define BOOT_5 16
-#define BOOT_6 17
-#define BOOT_7 18
-#define BOOT_8 19
-#define BOOT_9 20
-#define BOOT_10 21
-#define BOOT_11 22
-#define BOOT_12 23
-#define BOOT_13 24
-#define BOOT_14 25
-#define GPIOA_0 26
-#define GPIOA_1 27
-#define GPIOA_2 28
-#define GPIOA_3 29
-#define GPIOA_4 30
-#define GPIOA_5 31
-#define GPIOA_6 32
-#define GPIOA_7 33
-#define GPIOA_8 34
-#define GPIOA_9 35
-#define GPIOA_10 36
-#define GPIOA_11 37
-#define GPIOA_12 38
-#define GPIOA_13 39
-#define GPIOA_14 40
-#define GPIOA_15 41
-#define GPIOA_16 42
-#define GPIOA_17 43
-#define GPIOA_18 44
-#define GPIOA_19 45
-#define GPIOA_20 46
-#define GPIOX_0 47
-#define GPIOX_1 48
-#define GPIOX_2 49
-#define GPIOX_3 50
-#define GPIOX_4 51
-#define GPIOX_5 52
-#define GPIOX_6 53
-#define GPIOX_7 54
-#define GPIOX_8 55
-#define GPIOX_9 56
-#define GPIOX_10 57
-#define GPIOX_11 58
-#define GPIOX_12 59
-#define GPIOX_13 60
-#define GPIOX_14 61
-#define GPIOX_15 62
-#define GPIOX_16 63
-#define GPIOX_17 64
-#define GPIOX_18 65
-#define GPIOX_19 66
-#define GPIOX_20 67
-#define GPIOX_21 68
-#define GPIOX_22 69
-#define GPIOY_0 70
-#define GPIOY_1 71
-#define GPIOY_2 72
-#define GPIOY_3 73
-#define GPIOY_4 74
-#define GPIOY_5 75
-#define GPIOY_6 76
-#define GPIOY_7 77
-#define GPIOY_8 78
-#define GPIOY_9 79
-#define GPIOY_10 80
-#define GPIOY_11 81
-#define GPIOY_12 82
-#define GPIOY_13 83
-#define GPIOY_14 84
-#define GPIOY_15 85
-
-#endif /* _DT_BINDINGS_MESON_AXG_GPIO_H */
diff --git a/include/dt-bindings/gpio/meson-g12a-gpio.h b/include/dt-bindings/gpio/meson-g12a-gpio.h
deleted file mode 100644
index f7bd693..0000000
--- a/include/dt-bindings/gpio/meson-g12a-gpio.h
+++ /dev/null
@@ -1,114 +0,0 @@
-/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */
-/*
- * Copyright (c) 2018 Amlogic, Inc. All rights reserved.
- * Author: Xingyu Chen <xingyu.chen@amlogic.com>
- */
-
-#ifndef _DT_BINDINGS_MESON_G12A_GPIO_H
-#define _DT_BINDINGS_MESON_G12A_GPIO_H
-
-/* First GPIO chip */
-#define GPIOAO_0 0
-#define GPIOAO_1 1
-#define GPIOAO_2 2
-#define GPIOAO_3 3
-#define GPIOAO_4 4
-#define GPIOAO_5 5
-#define GPIOAO_6 6
-#define GPIOAO_7 7
-#define GPIOAO_8 8
-#define GPIOAO_9 9
-#define GPIOAO_10 10
-#define GPIOAO_11 11
-#define GPIOE_0 12
-#define GPIOE_1 13
-#define GPIOE_2 14
-
-/* Second GPIO chip */
-#define GPIOZ_0 0
-#define GPIOZ_1 1
-#define GPIOZ_2 2
-#define GPIOZ_3 3
-#define GPIOZ_4 4
-#define GPIOZ_5 5
-#define GPIOZ_6 6
-#define GPIOZ_7 7
-#define GPIOZ_8 8
-#define GPIOZ_9 9
-#define GPIOZ_10 10
-#define GPIOZ_11 11
-#define GPIOZ_12 12
-#define GPIOZ_13 13
-#define GPIOZ_14 14
-#define GPIOZ_15 15
-#define GPIOH_0 16
-#define GPIOH_1 17
-#define GPIOH_2 18
-#define GPIOH_3 19
-#define GPIOH_4 20
-#define GPIOH_5 21
-#define GPIOH_6 22
-#define GPIOH_7 23
-#define GPIOH_8 24
-#define BOOT_0 25
-#define BOOT_1 26
-#define BOOT_2 27
-#define BOOT_3 28
-#define BOOT_4 29
-#define BOOT_5 30
-#define BOOT_6 31
-#define BOOT_7 32
-#define BOOT_8 33
-#define BOOT_9 34
-#define BOOT_10 35
-#define BOOT_11 36
-#define BOOT_12 37
-#define BOOT_13 38
-#define BOOT_14 39
-#define BOOT_15 40
-#define GPIOC_0 41
-#define GPIOC_1 42
-#define GPIOC_2 43
-#define GPIOC_3 44
-#define GPIOC_4 45
-#define GPIOC_5 46
-#define GPIOC_6 47
-#define GPIOC_7 48
-#define GPIOA_0 49
-#define GPIOA_1 50
-#define GPIOA_2 51
-#define GPIOA_3 52
-#define GPIOA_4 53
-#define GPIOA_5 54
-#define GPIOA_6 55
-#define GPIOA_7 56
-#define GPIOA_8 57
-#define GPIOA_9 58
-#define GPIOA_10 59
-#define GPIOA_11 60
-#define GPIOA_12 61
-#define GPIOA_13 62
-#define GPIOA_14 63
-#define GPIOA_15 64
-#define GPIOX_0 65
-#define GPIOX_1 66
-#define GPIOX_2 67
-#define GPIOX_3 68
-#define GPIOX_4 69
-#define GPIOX_5 70
-#define GPIOX_6 71
-#define GPIOX_7 72
-#define GPIOX_8 73
-#define GPIOX_9 74
-#define GPIOX_10 75
-#define GPIOX_11 76
-#define GPIOX_12 77
-#define GPIOX_13 78
-#define GPIOX_14 79
-#define GPIOX_15 80
-#define GPIOX_16 81
-#define GPIOX_17 82
-#define GPIOX_18 83
-#define GPIOX_19 84
-
-#endif /* _DT_BINDINGS_MESON_G12A_GPIO_H */
diff --git a/include/dt-bindings/gpio/meson-gxbb-gpio.h b/include/dt-bindings/gpio/meson-gxbb-gpio.h
deleted file mode 100644
index 489c75b..0000000
--- a/include/dt-bindings/gpio/meson-gxbb-gpio.h
+++ /dev/null
@@ -1,148 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * GPIO definitions for Amlogic Meson GXBB SoCs
- *
- * Copyright (C) 2016 Endless Mobile, Inc.
- * Author: Carlo Caione <carlo@endlessm.com>
- */
-
-#ifndef _DT_BINDINGS_MESON_GXBB_GPIO_H
-#define _DT_BINDINGS_MESON_GXBB_GPIO_H
-
-#define GPIOAO_0 0
-#define GPIOAO_1 1
-#define GPIOAO_2 2
-#define GPIOAO_3 3
-#define GPIOAO_4 4
-#define GPIOAO_5 5
-#define GPIOAO_6 6
-#define GPIOAO_7 7
-#define GPIOAO_8 8
-#define GPIOAO_9 9
-#define GPIOAO_10 10
-#define GPIOAO_11 11
-#define GPIOAO_12 12
-#define GPIOAO_13 13
-#define GPIO_TEST_N 14
-
-#define GPIOZ_0 0
-#define GPIOZ_1 1
-#define GPIOZ_2 2
-#define GPIOZ_3 3
-#define GPIOZ_4 4
-#define GPIOZ_5 5
-#define GPIOZ_6 6
-#define GPIOZ_7 7
-#define GPIOZ_8 8
-#define GPIOZ_9 9
-#define GPIOZ_10 10
-#define GPIOZ_11 11
-#define GPIOZ_12 12
-#define GPIOZ_13 13
-#define GPIOZ_14 14
-#define GPIOZ_15 15
-#define GPIOH_0 16
-#define GPIOH_1 17
-#define GPIOH_2 18
-#define GPIOH_3 19
-#define BOOT_0 20
-#define BOOT_1 21
-#define BOOT_2 22
-#define BOOT_3 23
-#define BOOT_4 24
-#define BOOT_5 25
-#define BOOT_6 26
-#define BOOT_7 27
-#define BOOT_8 28
-#define BOOT_9 29
-#define BOOT_10 30
-#define BOOT_11 31
-#define BOOT_12 32
-#define BOOT_13 33
-#define BOOT_14 34
-#define BOOT_15 35
-#define BOOT_16 36
-#define BOOT_17 37
-#define CARD_0 38
-#define CARD_1 39
-#define CARD_2 40
-#define CARD_3 41
-#define CARD_4 42
-#define CARD_5 43
-#define CARD_6 44
-#define GPIODV_0 45
-#define GPIODV_1 46
-#define GPIODV_2 47
-#define GPIODV_3 48
-#define GPIODV_4 49
-#define GPIODV_5 50
-#define GPIODV_6 51
-#define GPIODV_7 52
-#define GPIODV_8 53
-#define GPIODV_9 54
-#define GPIODV_10 55
-#define GPIODV_11 56
-#define GPIODV_12 57
-#define GPIODV_13 58
-#define GPIODV_14 59
-#define GPIODV_15 60
-#define GPIODV_16 61
-#define GPIODV_17 62
-#define GPIODV_18 63
-#define GPIODV_19 64
-#define GPIODV_20 65
-#define GPIODV_21 66
-#define GPIODV_22 67
-#define GPIODV_23 68
-#define GPIODV_24 69
-#define GPIODV_25 70
-#define GPIODV_26 71
-#define GPIODV_27 72
-#define GPIODV_28 73
-#define GPIODV_29 74
-#define GPIOY_0 75
-#define GPIOY_1 76
-#define GPIOY_2 77
-#define GPIOY_3 78
-#define GPIOY_4 79
-#define GPIOY_5 80
-#define GPIOY_6 81
-#define GPIOY_7 82
-#define GPIOY_8 83
-#define GPIOY_9 84
-#define GPIOY_10 85
-#define GPIOY_11 86
-#define GPIOY_12 87
-#define GPIOY_13 88
-#define GPIOY_14 89
-#define GPIOY_15 90
-#define GPIOY_16 91
-#define GPIOX_0 92
-#define GPIOX_1 93
-#define GPIOX_2 94
-#define GPIOX_3 95
-#define GPIOX_4 96
-#define GPIOX_5 97
-#define GPIOX_6 98
-#define GPIOX_7 99
-#define GPIOX_8 100
-#define GPIOX_9 101
-#define GPIOX_10 102
-#define GPIOX_11 103
-#define GPIOX_12 104
-#define GPIOX_13 105
-#define GPIOX_14 106
-#define GPIOX_15 107
-#define GPIOX_16 108
-#define GPIOX_17 109
-#define GPIOX_18 110
-#define GPIOX_19 111
-#define GPIOX_20 112
-#define GPIOX_21 113
-#define GPIOX_22 114
-#define GPIOCLK_0 115
-#define GPIOCLK_1 116
-#define GPIOCLK_2 117
-#define GPIOCLK_3 118
-
-#endif
diff --git a/include/dt-bindings/gpio/meson-gxl-gpio.h b/include/dt-bindings/gpio/meson-gxl-gpio.h
deleted file mode 100644
index 0a001ae..0000000
--- a/include/dt-bindings/gpio/meson-gxl-gpio.h
+++ /dev/null
@@ -1,125 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * GPIO definitions for Amlogic Meson GXL SoCs
- *
- * Copyright (C) 2016 Endless Mobile, Inc.
- * Author: Carlo Caione <carlo@endlessm.com>
- */
-
-#ifndef _DT_BINDINGS_MESON_GXL_GPIO_H
-#define _DT_BINDINGS_MESON_GXL_GPIO_H
-
-#define GPIOAO_0 0
-#define GPIOAO_1 1
-#define GPIOAO_2 2
-#define GPIOAO_3 3
-#define GPIOAO_4 4
-#define GPIOAO_5 5
-#define GPIOAO_6 6
-#define GPIOAO_7 7
-#define GPIOAO_8 8
-#define GPIOAO_9 9
-#define GPIO_TEST_N 10
-
-#define GPIOZ_0 0
-#define GPIOZ_1 1
-#define GPIOZ_2 2
-#define GPIOZ_3 3
-#define GPIOZ_4 4
-#define GPIOZ_5 5
-#define GPIOZ_6 6
-#define GPIOZ_7 7
-#define GPIOZ_8 8
-#define GPIOZ_9 9
-#define GPIOZ_10 10
-#define GPIOZ_11 11
-#define GPIOZ_12 12
-#define GPIOZ_13 13
-#define GPIOZ_14 14
-#define GPIOZ_15 15
-#define GPIOH_0 16
-#define GPIOH_1 17
-#define GPIOH_2 18
-#define GPIOH_3 19
-#define GPIOH_4 20
-#define GPIOH_5 21
-#define GPIOH_6 22
-#define GPIOH_7 23
-#define GPIOH_8 24
-#define GPIOH_9 25
-#define BOOT_0 26
-#define BOOT_1 27
-#define BOOT_2 28
-#define BOOT_3 29
-#define BOOT_4 30
-#define BOOT_5 31
-#define BOOT_6 32
-#define BOOT_7 33
-#define BOOT_8 34
-#define BOOT_9 35
-#define BOOT_10 36
-#define BOOT_11 37
-#define BOOT_12 38
-#define BOOT_13 39
-#define BOOT_14 40
-#define BOOT_15 41
-#define CARD_0 42
-#define CARD_1 43
-#define CARD_2 44
-#define CARD_3 45
-#define CARD_4 46
-#define CARD_5 47
-#define CARD_6 48
-#define GPIODV_0 49
-#define GPIODV_1 50
-#define GPIODV_2 51
-#define GPIODV_3 52
-#define GPIODV_4 53
-#define GPIODV_5 54
-#define GPIODV_6 55
-#define GPIODV_7 56
-#define GPIODV_8 57
-#define GPIODV_9 58
-#define GPIODV_10 59
-#define GPIODV_11 60
-#define GPIODV_12 61
-#define GPIODV_13 62
-#define GPIODV_14 63
-#define GPIODV_15 64
-#define GPIODV_16 65
-#define GPIODV_17 66
-#define GPIODV_18 67
-#define GPIODV_19 68
-#define GPIODV_20 69
-#define GPIODV_21 70
-#define GPIODV_22 71
-#define GPIODV_23 72
-#define GPIODV_24 73
-#define GPIODV_25 74
-#define GPIODV_26 75
-#define GPIODV_27 76
-#define GPIODV_28 77
-#define GPIODV_29 78
-#define GPIOX_0 79
-#define GPIOX_1 80
-#define GPIOX_2 81
-#define GPIOX_3 82
-#define GPIOX_4 83
-#define GPIOX_5 84
-#define GPIOX_6 85
-#define GPIOX_7 86
-#define GPIOX_8 87
-#define GPIOX_9 88
-#define GPIOX_10 89
-#define GPIOX_11 90
-#define GPIOX_12 91
-#define GPIOX_13 92
-#define GPIOX_14 93
-#define GPIOX_15 94
-#define GPIOX_16 95
-#define GPIOX_17 96
-#define GPIOX_18 97
-#define GPIOCLK_0 98
-#define GPIOCLK_1 99
-
-#endif
diff --git a/include/dt-bindings/input/gpio-keys.h b/include/dt-bindings/input/gpio-keys.h
deleted file mode 100644
index 8962df7..0000000
--- a/include/dt-bindings/input/gpio-keys.h
+++ /dev/null
@@ -1,13 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * This header provides constants for gpio keys bindings.
- */
-
-#ifndef _DT_BINDINGS_GPIO_KEYS_H
-#define _DT_BINDINGS_GPIO_KEYS_H
-
-#define EV_ACT_ANY 0x00 /* asserted or deasserted */
-#define EV_ACT_ASSERTED 0x01 /* asserted */
-#define EV_ACT_DEASSERTED 0x02 /* deasserted */
-
-#endif /* _DT_BINDINGS_GPIO_KEYS_H */
diff --git a/include/dt-bindings/input/input.h b/include/dt-bindings/input/input.h
deleted file mode 100644
index a214133..0000000
--- a/include/dt-bindings/input/input.h
+++ /dev/null
@@ -1,17 +0,0 @@
-/*
- * This header provides constants for most input bindings.
- *
- * Most input bindings include key code, matrix key code format.
- * In most cases, key code and matrix key code format uses
- * the standard values/macro defined in this header.
- */
-
-#ifndef _DT_BINDINGS_INPUT_INPUT_H
-#define _DT_BINDINGS_INPUT_INPUT_H
-
-#include "linux-event-codes.h"
-
-#define MATRIX_KEY(row, col, code) \
- ((((row) & 0xFF) << 24) | (((col) & 0xFF) << 16) | ((code) & 0xFFFF))
-
-#endif /* _DT_BINDINGS_INPUT_INPUT_H */
diff --git a/include/dt-bindings/input/linux-event-codes.h b/include/dt-bindings/input/linux-event-codes.h
deleted file mode 100644
index 331458c..0000000
--- a/include/dt-bindings/input/linux-event-codes.h
+++ /dev/null
@@ -1,806 +0,0 @@
-/*
- * Input event codes
- *
- * *** IMPORTANT ***
- * This file is not only included from C-code but also from devicetree source
- * files. As such this file MUST only contain comments and defines.
- *
- * Copyright (c) 1999-2002 Vojtech Pavlik
- * Copyright (c) 2015 Hans de Goede <hdegoede@redhat.com>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- */
-#ifndef _UAPI_INPUT_EVENT_CODES_H
-#define _UAPI_INPUT_EVENT_CODES_H
-
-/*
- * Device properties and quirks
- */
-
-#define INPUT_PROP_POINTER 0x00 /* needs a pointer */
-#define INPUT_PROP_DIRECT 0x01 /* direct input devices */
-#define INPUT_PROP_BUTTONPAD 0x02 /* has button(s) under pad */
-#define INPUT_PROP_SEMI_MT 0x03 /* touch rectangle only */
-#define INPUT_PROP_TOPBUTTONPAD 0x04 /* softbuttons at top of pad */
-#define INPUT_PROP_POINTING_STICK 0x05 /* is a pointing stick */
-#define INPUT_PROP_ACCELEROMETER 0x06 /* has accelerometer */
-
-#define INPUT_PROP_MAX 0x1f
-#define INPUT_PROP_CNT (INPUT_PROP_MAX + 1)
-
-/*
- * Event types
- */
-
-#define EV_SYN 0x00
-#define EV_KEY 0x01
-#define EV_REL 0x02
-#define EV_ABS 0x03
-#define EV_MSC 0x04
-#define EV_SW 0x05
-#define EV_LED 0x11
-#define EV_SND 0x12
-#define EV_REP 0x14
-#define EV_FF 0x15
-#define EV_PWR 0x16
-#define EV_FF_STATUS 0x17
-#define EV_MAX 0x1f
-#define EV_CNT (EV_MAX+1)
-
-/*
- * Synchronization events.
- */
-
-#define SYN_REPORT 0
-#define SYN_CONFIG 1
-#define SYN_MT_REPORT 2
-#define SYN_DROPPED 3
-#define SYN_MAX 0xf
-#define SYN_CNT (SYN_MAX+1)
-
-/*
- * Keys and buttons
- *
- * Most of the keys/buttons are modeled after USB HUT 1.12
- * (see http://www.usb.org/developers/hidpage).
- * Abbreviations in the comments:
- * AC - Application Control
- * AL - Application Launch Button
- * SC - System Control
- */
-
-#define KEY_RESERVED 0
-#define KEY_ESC 1
-#define KEY_1 2
-#define KEY_2 3
-#define KEY_3 4
-#define KEY_4 5
-#define KEY_5 6
-#define KEY_6 7
-#define KEY_7 8
-#define KEY_8 9
-#define KEY_9 10
-#define KEY_0 11
-#define KEY_MINUS 12
-#define KEY_EQUAL 13
-#define KEY_BACKSPACE 14
-#define KEY_TAB 15
-#define KEY_Q 16
-#define KEY_W 17
-#define KEY_E 18
-#define KEY_R 19
-#define KEY_T 20
-#define KEY_Y 21
-#define KEY_U 22
-#define KEY_I 23
-#define KEY_O 24
-#define KEY_P 25
-#define KEY_LEFTBRACE 26
-#define KEY_RIGHTBRACE 27
-#define KEY_ENTER 28
-#define KEY_LEFTCTRL 29
-#define KEY_A 30
-#define KEY_S 31
-#define KEY_D 32
-#define KEY_F 33
-#define KEY_G 34
-#define KEY_H 35
-#define KEY_J 36
-#define KEY_K 37
-#define KEY_L 38
-#define KEY_SEMICOLON 39
-#define KEY_APOSTROPHE 40
-#define KEY_GRAVE 41
-#define KEY_LEFTSHIFT 42
-#define KEY_BACKSLASH 43
-#define KEY_Z 44
-#define KEY_X 45
-#define KEY_C 46
-#define KEY_V 47
-#define KEY_B 48
-#define KEY_N 49
-#define KEY_M 50
-#define KEY_COMMA 51
-#define KEY_DOT 52
-#define KEY_SLASH 53
-#define KEY_RIGHTSHIFT 54
-#define KEY_KPASTERISK 55
-#define KEY_LEFTALT 56
-#define KEY_SPACE 57
-#define KEY_CAPSLOCK 58
-#define KEY_F1 59
-#define KEY_F2 60
-#define KEY_F3 61
-#define KEY_F4 62
-#define KEY_F5 63
-#define KEY_F6 64
-#define KEY_F7 65
-#define KEY_F8 66
-#define KEY_F9 67
-#define KEY_F10 68
-#define KEY_NUMLOCK 69
-#define KEY_SCROLLLOCK 70
-#define KEY_KP7 71
-#define KEY_KP8 72
-#define KEY_KP9 73
-#define KEY_KPMINUS 74
-#define KEY_KP4 75
-#define KEY_KP5 76
-#define KEY_KP6 77
-#define KEY_KPPLUS 78
-#define KEY_KP1 79
-#define KEY_KP2 80
-#define KEY_KP3 81
-#define KEY_KP0 82
-#define KEY_KPDOT 83
-
-#define KEY_ZENKAKUHANKAKU 85
-#define KEY_102ND 86
-#define KEY_F11 87
-#define KEY_F12 88
-#define KEY_RO 89
-#define KEY_KATAKANA 90
-#define KEY_HIRAGANA 91
-#define KEY_HENKAN 92
-#define KEY_KATAKANAHIRAGANA 93
-#define KEY_MUHENKAN 94
-#define KEY_KPJPCOMMA 95
-#define KEY_KPENTER 96
-#define KEY_RIGHTCTRL 97
-#define KEY_KPSLASH 98
-#define KEY_SYSRQ 99
-#define KEY_RIGHTALT 100
-#define KEY_LINEFEED 101
-#define KEY_HOME 102
-#define KEY_UP 103
-#define KEY_PAGEUP 104
-#define KEY_LEFT 105
-#define KEY_RIGHT 106
-#define KEY_END 107
-#define KEY_DOWN 108
-#define KEY_PAGEDOWN 109
-#define KEY_INSERT 110
-#define KEY_DELETE 111
-#define KEY_MACRO 112
-#define KEY_MUTE 113
-#define KEY_VOLUMEDOWN 114
-#define KEY_VOLUMEUP 115
-#define KEY_POWER 116 /* SC System Power Down */
-#define KEY_KPEQUAL 117
-#define KEY_KPPLUSMINUS 118
-#define KEY_PAUSE 119
-#define KEY_SCALE 120 /* AL Compiz Scale (Expose) */
-
-#define KEY_KPCOMMA 121
-#define KEY_HANGEUL 122
-#define KEY_HANGUEL KEY_HANGEUL
-#define KEY_HANJA 123
-#define KEY_YEN 124
-#define KEY_LEFTMETA 125
-#define KEY_RIGHTMETA 126
-#define KEY_COMPOSE 127
-
-#define KEY_STOP 128 /* AC Stop */
-#define KEY_AGAIN 129
-#define KEY_PROPS 130 /* AC Properties */
-#define KEY_UNDO 131 /* AC Undo */
-#define KEY_FRONT 132
-#define KEY_COPY 133 /* AC Copy */
-#define KEY_OPEN 134 /* AC Open */
-#define KEY_PASTE 135 /* AC Paste */
-#define KEY_FIND 136 /* AC Search */
-#define KEY_CUT 137 /* AC Cut */
-#define KEY_HELP 138 /* AL Integrated Help Center */
-#define KEY_MENU 139 /* Menu (show menu) */
-#define KEY_CALC 140 /* AL Calculator */
-#define KEY_SETUP 141
-#define KEY_SLEEP 142 /* SC System Sleep */
-#define KEY_WAKEUP 143 /* System Wake Up */
-#define KEY_FILE 144 /* AL Local Machine Browser */
-#define KEY_SENDFILE 145
-#define KEY_DELETEFILE 146
-#define KEY_XFER 147
-#define KEY_PROG1 148
-#define KEY_PROG2 149
-#define KEY_WWW 150 /* AL Internet Browser */
-#define KEY_MSDOS 151
-#define KEY_COFFEE 152 /* AL Terminal Lock/Screensaver */
-#define KEY_SCREENLOCK KEY_COFFEE
-#define KEY_ROTATE_DISPLAY 153 /* Display orientation for e.g. tablets */
-#define KEY_DIRECTION KEY_ROTATE_DISPLAY
-#define KEY_CYCLEWINDOWS 154
-#define KEY_MAIL 155
-#define KEY_BOOKMARKS 156 /* AC Bookmarks */
-#define KEY_COMPUTER 157
-#define KEY_BACK 158 /* AC Back */
-#define KEY_FORWARD 159 /* AC Forward */
-#define KEY_CLOSECD 160
-#define KEY_EJECTCD 161
-#define KEY_EJECTCLOSECD 162
-#define KEY_NEXTSONG 163
-#define KEY_PLAYPAUSE 164
-#define KEY_PREVIOUSSONG 165
-#define KEY_STOPCD 166
-#define KEY_RECORD 167
-#define KEY_REWIND 168
-#define KEY_PHONE 169 /* Media Select Telephone */
-#define KEY_ISO 170
-#define KEY_CONFIG 171 /* AL Consumer Control Configuration */
-#define KEY_HOMEPAGE 172 /* AC Home */
-#define KEY_REFRESH 173 /* AC Refresh */
-#define KEY_EXIT 174 /* AC Exit */
-#define KEY_MOVE 175
-#define KEY_EDIT 176
-#define KEY_SCROLLUP 177
-#define KEY_SCROLLDOWN 178
-#define KEY_KPLEFTPAREN 179
-#define KEY_KPRIGHTPAREN 180
-#define KEY_NEW 181 /* AC New */
-#define KEY_REDO 182 /* AC Redo/Repeat */
-
-#define KEY_F13 183
-#define KEY_F14 184
-#define KEY_F15 185
-#define KEY_F16 186
-#define KEY_F17 187
-#define KEY_F18 188
-#define KEY_F19 189
-#define KEY_F20 190
-#define KEY_F21 191
-#define KEY_F22 192
-#define KEY_F23 193
-#define KEY_F24 194
-
-#define KEY_PLAYCD 200
-#define KEY_PAUSECD 201
-#define KEY_PROG3 202
-#define KEY_PROG4 203
-#define KEY_DASHBOARD 204 /* AL Dashboard */
-#define KEY_SUSPEND 205
-#define KEY_CLOSE 206 /* AC Close */
-#define KEY_PLAY 207
-#define KEY_FASTFORWARD 208
-#define KEY_BASSBOOST 209
-#define KEY_PRINT 210 /* AC Print */
-#define KEY_HP 211
-#define KEY_CAMERA 212
-#define KEY_SOUND 213
-#define KEY_QUESTION 214
-#define KEY_EMAIL 215
-#define KEY_CHAT 216
-#define KEY_SEARCH 217
-#define KEY_CONNECT 218
-#define KEY_FINANCE 219 /* AL Checkbook/Finance */
-#define KEY_SPORT 220
-#define KEY_SHOP 221
-#define KEY_ALTERASE 222
-#define KEY_CANCEL 223 /* AC Cancel */
-#define KEY_BRIGHTNESSDOWN 224
-#define KEY_BRIGHTNESSUP 225
-#define KEY_MEDIA 226
-
-#define KEY_SWITCHVIDEOMODE 227 /* Cycle between available video
- outputs (Monitor/LCD/TV-out/etc) */
-#define KEY_KBDILLUMTOGGLE 228
-#define KEY_KBDILLUMDOWN 229
-#define KEY_KBDILLUMUP 230
-
-#define KEY_SEND 231 /* AC Send */
-#define KEY_REPLY 232 /* AC Reply */
-#define KEY_FORWARDMAIL 233 /* AC Forward Msg */
-#define KEY_SAVE 234 /* AC Save */
-#define KEY_DOCUMENTS 235
-
-#define KEY_BATTERY 236
-
-#define KEY_BLUETOOTH 237
-#define KEY_WLAN 238
-#define KEY_UWB 239
-
-#define KEY_UNKNOWN 240
-
-#define KEY_VIDEO_NEXT 241 /* drive next video source */
-#define KEY_VIDEO_PREV 242 /* drive previous video source */
-#define KEY_BRIGHTNESS_CYCLE 243 /* brightness up, after max is min */
-#define KEY_BRIGHTNESS_AUTO 244 /* Set Auto Brightness: manual
- brightness control is off,
- rely on ambient */
-#define KEY_BRIGHTNESS_ZERO KEY_BRIGHTNESS_AUTO
-#define KEY_DISPLAY_OFF 245 /* display device to off state */
-
-#define KEY_WWAN 246 /* Wireless WAN (LTE, UMTS, GSM, etc.) */
-#define KEY_WIMAX KEY_WWAN
-#define KEY_RFKILL 247 /* Key that controls all radios */
-
-#define KEY_MICMUTE 248 /* Mute / unmute the microphone */
-
-/* Code 255 is reserved for special needs of AT keyboard driver */
-
-#define BTN_MISC 0x100
-#define BTN_0 0x100
-#define BTN_1 0x101
-#define BTN_2 0x102
-#define BTN_3 0x103
-#define BTN_4 0x104
-#define BTN_5 0x105
-#define BTN_6 0x106
-#define BTN_7 0x107
-#define BTN_8 0x108
-#define BTN_9 0x109
-
-#define BTN_MOUSE 0x110
-#define BTN_LEFT 0x110
-#define BTN_RIGHT 0x111
-#define BTN_MIDDLE 0x112
-#define BTN_SIDE 0x113
-#define BTN_EXTRA 0x114
-#define BTN_FORWARD 0x115
-#define BTN_BACK 0x116
-#define BTN_TASK 0x117
-
-#define BTN_JOYSTICK 0x120
-#define BTN_TRIGGER 0x120
-#define BTN_THUMB 0x121
-#define BTN_THUMB2 0x122
-#define BTN_TOP 0x123
-#define BTN_TOP2 0x124
-#define BTN_PINKIE 0x125
-#define BTN_BASE 0x126
-#define BTN_BASE2 0x127
-#define BTN_BASE3 0x128
-#define BTN_BASE4 0x129
-#define BTN_BASE5 0x12a
-#define BTN_BASE6 0x12b
-#define BTN_DEAD 0x12f
-
-#define BTN_GAMEPAD 0x130
-#define BTN_SOUTH 0x130
-#define BTN_A BTN_SOUTH
-#define BTN_EAST 0x131
-#define BTN_B BTN_EAST
-#define BTN_C 0x132
-#define BTN_NORTH 0x133
-#define BTN_X BTN_NORTH
-#define BTN_WEST 0x134
-#define BTN_Y BTN_WEST
-#define BTN_Z 0x135
-#define BTN_TL 0x136
-#define BTN_TR 0x137
-#define BTN_TL2 0x138
-#define BTN_TR2 0x139
-#define BTN_SELECT 0x13a
-#define BTN_START 0x13b
-#define BTN_MODE 0x13c
-#define BTN_THUMBL 0x13d
-#define BTN_THUMBR 0x13e
-
-#define BTN_DIGI 0x140
-#define BTN_TOOL_PEN 0x140
-#define BTN_TOOL_RUBBER 0x141
-#define BTN_TOOL_BRUSH 0x142
-#define BTN_TOOL_PENCIL 0x143
-#define BTN_TOOL_AIRBRUSH 0x144
-#define BTN_TOOL_FINGER 0x145
-#define BTN_TOOL_MOUSE 0x146
-#define BTN_TOOL_LENS 0x147
-#define BTN_TOOL_QUINTTAP 0x148 /* Five fingers on trackpad */
-#define BTN_TOUCH 0x14a
-#define BTN_STYLUS 0x14b
-#define BTN_STYLUS2 0x14c
-#define BTN_TOOL_DOUBLETAP 0x14d
-#define BTN_TOOL_TRIPLETAP 0x14e
-#define BTN_TOOL_QUADTAP 0x14f /* Four fingers on trackpad */
-
-#define BTN_WHEEL 0x150
-#define BTN_GEAR_DOWN 0x150
-#define BTN_GEAR_UP 0x151
-
-#define KEY_OK 0x160
-#define KEY_SELECT 0x161
-#define KEY_GOTO 0x162
-#define KEY_CLEAR 0x163
-#define KEY_POWER2 0x164
-#define KEY_OPTION 0x165
-#define KEY_INFO 0x166 /* AL OEM Features/Tips/Tutorial */
-#define KEY_TIME 0x167
-#define KEY_VENDOR 0x168
-#define KEY_ARCHIVE 0x169
-#define KEY_PROGRAM 0x16a /* Media Select Program Guide */
-#define KEY_CHANNEL 0x16b
-#define KEY_FAVORITES 0x16c
-#define KEY_EPG 0x16d
-#define KEY_PVR 0x16e /* Media Select Home */
-#define KEY_MHP 0x16f
-#define KEY_LANGUAGE 0x170
-#define KEY_TITLE 0x171
-#define KEY_SUBTITLE 0x172
-#define KEY_ANGLE 0x173
-#define KEY_ZOOM 0x174
-#define KEY_MODE 0x175
-#define KEY_KEYBOARD 0x176
-#define KEY_SCREEN 0x177
-#define KEY_PC 0x178 /* Media Select Computer */
-#define KEY_TV 0x179 /* Media Select TV */
-#define KEY_TV2 0x17a /* Media Select Cable */
-#define KEY_VCR 0x17b /* Media Select VCR */
-#define KEY_VCR2 0x17c /* VCR Plus */
-#define KEY_SAT 0x17d /* Media Select Satellite */
-#define KEY_SAT2 0x17e
-#define KEY_CD 0x17f /* Media Select CD */
-#define KEY_TAPE 0x180 /* Media Select Tape */
-#define KEY_RADIO 0x181
-#define KEY_TUNER 0x182 /* Media Select Tuner */
-#define KEY_PLAYER 0x183
-#define KEY_TEXT 0x184
-#define KEY_DVD 0x185 /* Media Select DVD */
-#define KEY_AUX 0x186
-#define KEY_MP3 0x187
-#define KEY_AUDIO 0x188 /* AL Audio Browser */
-#define KEY_VIDEO 0x189 /* AL Movie Browser */
-#define KEY_DIRECTORY 0x18a
-#define KEY_LIST 0x18b
-#define KEY_MEMO 0x18c /* Media Select Messages */
-#define KEY_CALENDAR 0x18d
-#define KEY_RED 0x18e
-#define KEY_GREEN 0x18f
-#define KEY_YELLOW 0x190
-#define KEY_BLUE 0x191
-#define KEY_CHANNELUP 0x192 /* Channel Increment */
-#define KEY_CHANNELDOWN 0x193 /* Channel Decrement */
-#define KEY_FIRST 0x194
-#define KEY_LAST 0x195 /* Recall Last */
-#define KEY_AB 0x196
-#define KEY_NEXT 0x197
-#define KEY_RESTART 0x198
-#define KEY_SLOW 0x199
-#define KEY_SHUFFLE 0x19a
-#define KEY_BREAK 0x19b
-#define KEY_PREVIOUS 0x19c
-#define KEY_DIGITS 0x19d
-#define KEY_TEEN 0x19e
-#define KEY_TWEN 0x19f
-#define KEY_VIDEOPHONE 0x1a0 /* Media Select Video Phone */
-#define KEY_GAMES 0x1a1 /* Media Select Games */
-#define KEY_ZOOMIN 0x1a2 /* AC Zoom In */
-#define KEY_ZOOMOUT 0x1a3 /* AC Zoom Out */
-#define KEY_ZOOMRESET 0x1a4 /* AC Zoom */
-#define KEY_WORDPROCESSOR 0x1a5 /* AL Word Processor */
-#define KEY_EDITOR 0x1a6 /* AL Text Editor */
-#define KEY_SPREADSHEET 0x1a7 /* AL Spreadsheet */
-#define KEY_GRAPHICSEDITOR 0x1a8 /* AL Graphics Editor */
-#define KEY_PRESENTATION 0x1a9 /* AL Presentation App */
-#define KEY_DATABASE 0x1aa /* AL Database App */
-#define KEY_NEWS 0x1ab /* AL Newsreader */
-#define KEY_VOICEMAIL 0x1ac /* AL Voicemail */
-#define KEY_ADDRESSBOOK 0x1ad /* AL Contacts/Address Book */
-#define KEY_MESSENGER 0x1ae /* AL Instant Messaging */
-#define KEY_DISPLAYTOGGLE 0x1af /* Turn display (LCD) on and off */
-#define KEY_BRIGHTNESS_TOGGLE KEY_DISPLAYTOGGLE
-#define KEY_SPELLCHECK 0x1b0 /* AL Spell Check */
-#define KEY_LOGOFF 0x1b1 /* AL Logoff */
-
-#define KEY_DOLLAR 0x1b2
-#define KEY_EURO 0x1b3
-
-#define KEY_FRAMEBACK 0x1b4 /* Consumer - transport controls */
-#define KEY_FRAMEFORWARD 0x1b5
-#define KEY_CONTEXT_MENU 0x1b6 /* GenDesc - system context menu */
-#define KEY_MEDIA_REPEAT 0x1b7 /* Consumer - transport control */
-#define KEY_10CHANNELSUP 0x1b8 /* 10 channels up (10+) */
-#define KEY_10CHANNELSDOWN 0x1b9 /* 10 channels down (10-) */
-#define KEY_IMAGES 0x1ba /* AL Image Browser */
-
-#define KEY_DEL_EOL 0x1c0
-#define KEY_DEL_EOS 0x1c1
-#define KEY_INS_LINE 0x1c2
-#define KEY_DEL_LINE 0x1c3
-
-#define KEY_FN 0x1d0
-#define KEY_FN_ESC 0x1d1
-#define KEY_FN_F1 0x1d2
-#define KEY_FN_F2 0x1d3
-#define KEY_FN_F3 0x1d4
-#define KEY_FN_F4 0x1d5
-#define KEY_FN_F5 0x1d6
-#define KEY_FN_F6 0x1d7
-#define KEY_FN_F7 0x1d8
-#define KEY_FN_F8 0x1d9
-#define KEY_FN_F9 0x1da
-#define KEY_FN_F10 0x1db
-#define KEY_FN_F11 0x1dc
-#define KEY_FN_F12 0x1dd
-#define KEY_FN_1 0x1de
-#define KEY_FN_2 0x1df
-#define KEY_FN_D 0x1e0
-#define KEY_FN_E 0x1e1
-#define KEY_FN_F 0x1e2
-#define KEY_FN_S 0x1e3
-#define KEY_FN_B 0x1e4
-
-#define KEY_BRL_DOT1 0x1f1
-#define KEY_BRL_DOT2 0x1f2
-#define KEY_BRL_DOT3 0x1f3
-#define KEY_BRL_DOT4 0x1f4
-#define KEY_BRL_DOT5 0x1f5
-#define KEY_BRL_DOT6 0x1f6
-#define KEY_BRL_DOT7 0x1f7
-#define KEY_BRL_DOT8 0x1f8
-#define KEY_BRL_DOT9 0x1f9
-#define KEY_BRL_DOT10 0x1fa
-
-#define KEY_NUMERIC_0 0x200 /* used by phones, remote controls, */
-#define KEY_NUMERIC_1 0x201 /* and other keypads */
-#define KEY_NUMERIC_2 0x202
-#define KEY_NUMERIC_3 0x203
-#define KEY_NUMERIC_4 0x204
-#define KEY_NUMERIC_5 0x205
-#define KEY_NUMERIC_6 0x206
-#define KEY_NUMERIC_7 0x207
-#define KEY_NUMERIC_8 0x208
-#define KEY_NUMERIC_9 0x209
-#define KEY_NUMERIC_STAR 0x20a
-#define KEY_NUMERIC_POUND 0x20b
-#define KEY_NUMERIC_A 0x20c /* Phone key A - HUT Telephony 0xb9 */
-#define KEY_NUMERIC_B 0x20d
-#define KEY_NUMERIC_C 0x20e
-#define KEY_NUMERIC_D 0x20f
-
-#define KEY_CAMERA_FOCUS 0x210
-#define KEY_WPS_BUTTON 0x211 /* WiFi Protected Setup key */
-
-#define KEY_TOUCHPAD_TOGGLE 0x212 /* Request switch touchpad on or off */
-#define KEY_TOUCHPAD_ON 0x213
-#define KEY_TOUCHPAD_OFF 0x214
-
-#define KEY_CAMERA_ZOOMIN 0x215
-#define KEY_CAMERA_ZOOMOUT 0x216
-#define KEY_CAMERA_UP 0x217
-#define KEY_CAMERA_DOWN 0x218
-#define KEY_CAMERA_LEFT 0x219
-#define KEY_CAMERA_RIGHT 0x21a
-
-#define KEY_ATTENDANT_ON 0x21b
-#define KEY_ATTENDANT_OFF 0x21c
-#define KEY_ATTENDANT_TOGGLE 0x21d /* Attendant call on or off */
-#define KEY_LIGHTS_TOGGLE 0x21e /* Reading light on or off */
-
-#define BTN_DPAD_UP 0x220
-#define BTN_DPAD_DOWN 0x221
-#define BTN_DPAD_LEFT 0x222
-#define BTN_DPAD_RIGHT 0x223
-
-#define KEY_ALS_TOGGLE 0x230 /* Ambient light sensor */
-
-#define KEY_BUTTONCONFIG 0x240 /* AL Button Configuration */
-#define KEY_TASKMANAGER 0x241 /* AL Task/Project Manager */
-#define KEY_JOURNAL 0x242 /* AL Log/Journal/Timecard */
-#define KEY_CONTROLPANEL 0x243 /* AL Control Panel */
-#define KEY_APPSELECT 0x244 /* AL Select Task/Application */
-#define KEY_SCREENSAVER 0x245 /* AL Screen Saver */
-#define KEY_VOICECOMMAND 0x246 /* Listening Voice Command */
-
-#define KEY_BRIGHTNESS_MIN 0x250 /* Set Brightness to Minimum */
-#define KEY_BRIGHTNESS_MAX 0x251 /* Set Brightness to Maximum */
-
-#define KEY_KBDINPUTASSIST_PREV 0x260
-#define KEY_KBDINPUTASSIST_NEXT 0x261
-#define KEY_KBDINPUTASSIST_PREVGROUP 0x262
-#define KEY_KBDINPUTASSIST_NEXTGROUP 0x263
-#define KEY_KBDINPUTASSIST_ACCEPT 0x264
-#define KEY_KBDINPUTASSIST_CANCEL 0x265
-
-#define BTN_TRIGGER_HAPPY 0x2c0
-#define BTN_TRIGGER_HAPPY1 0x2c0
-#define BTN_TRIGGER_HAPPY2 0x2c1
-#define BTN_TRIGGER_HAPPY3 0x2c2
-#define BTN_TRIGGER_HAPPY4 0x2c3
-#define BTN_TRIGGER_HAPPY5 0x2c4
-#define BTN_TRIGGER_HAPPY6 0x2c5
-#define BTN_TRIGGER_HAPPY7 0x2c6
-#define BTN_TRIGGER_HAPPY8 0x2c7
-#define BTN_TRIGGER_HAPPY9 0x2c8
-#define BTN_TRIGGER_HAPPY10 0x2c9
-#define BTN_TRIGGER_HAPPY11 0x2ca
-#define BTN_TRIGGER_HAPPY12 0x2cb
-#define BTN_TRIGGER_HAPPY13 0x2cc
-#define BTN_TRIGGER_HAPPY14 0x2cd
-#define BTN_TRIGGER_HAPPY15 0x2ce
-#define BTN_TRIGGER_HAPPY16 0x2cf
-#define BTN_TRIGGER_HAPPY17 0x2d0
-#define BTN_TRIGGER_HAPPY18 0x2d1
-#define BTN_TRIGGER_HAPPY19 0x2d2
-#define BTN_TRIGGER_HAPPY20 0x2d3
-#define BTN_TRIGGER_HAPPY21 0x2d4
-#define BTN_TRIGGER_HAPPY22 0x2d5
-#define BTN_TRIGGER_HAPPY23 0x2d6
-#define BTN_TRIGGER_HAPPY24 0x2d7
-#define BTN_TRIGGER_HAPPY25 0x2d8
-#define BTN_TRIGGER_HAPPY26 0x2d9
-#define BTN_TRIGGER_HAPPY27 0x2da
-#define BTN_TRIGGER_HAPPY28 0x2db
-#define BTN_TRIGGER_HAPPY29 0x2dc
-#define BTN_TRIGGER_HAPPY30 0x2dd
-#define BTN_TRIGGER_HAPPY31 0x2de
-#define BTN_TRIGGER_HAPPY32 0x2df
-#define BTN_TRIGGER_HAPPY33 0x2e0
-#define BTN_TRIGGER_HAPPY34 0x2e1
-#define BTN_TRIGGER_HAPPY35 0x2e2
-#define BTN_TRIGGER_HAPPY36 0x2e3
-#define BTN_TRIGGER_HAPPY37 0x2e4
-#define BTN_TRIGGER_HAPPY38 0x2e5
-#define BTN_TRIGGER_HAPPY39 0x2e6
-#define BTN_TRIGGER_HAPPY40 0x2e7
-
-/* We avoid low common keys in module aliases so they don't get huge. */
-#define KEY_MIN_INTERESTING KEY_MUTE
-#define KEY_MAX 0x2ff
-#define KEY_CNT (KEY_MAX+1)
-
-/*
- * Relative axes
- */
-
-#define REL_X 0x00
-#define REL_Y 0x01
-#define REL_Z 0x02
-#define REL_RX 0x03
-#define REL_RY 0x04
-#define REL_RZ 0x05
-#define REL_HWHEEL 0x06
-#define REL_DIAL 0x07
-#define REL_WHEEL 0x08
-#define REL_MISC 0x09
-#define REL_MAX 0x0f
-#define REL_CNT (REL_MAX+1)
-
-/*
- * Absolute axes
- */
-
-#define ABS_X 0x00
-#define ABS_Y 0x01
-#define ABS_Z 0x02
-#define ABS_RX 0x03
-#define ABS_RY 0x04
-#define ABS_RZ 0x05
-#define ABS_THROTTLE 0x06
-#define ABS_RUDDER 0x07
-#define ABS_WHEEL 0x08
-#define ABS_GAS 0x09
-#define ABS_BRAKE 0x0a
-#define ABS_HAT0X 0x10
-#define ABS_HAT0Y 0x11
-#define ABS_HAT1X 0x12
-#define ABS_HAT1Y 0x13
-#define ABS_HAT2X 0x14
-#define ABS_HAT2Y 0x15
-#define ABS_HAT3X 0x16
-#define ABS_HAT3Y 0x17
-#define ABS_PRESSURE 0x18
-#define ABS_DISTANCE 0x19
-#define ABS_TILT_X 0x1a
-#define ABS_TILT_Y 0x1b
-#define ABS_TOOL_WIDTH 0x1c
-
-#define ABS_VOLUME 0x20
-
-#define ABS_MISC 0x28
-
-#define ABS_MT_SLOT 0x2f /* MT slot being modified */
-#define ABS_MT_TOUCH_MAJOR 0x30 /* Major axis of touching ellipse */
-#define ABS_MT_TOUCH_MINOR 0x31 /* Minor axis (omit if circular) */
-#define ABS_MT_WIDTH_MAJOR 0x32 /* Major axis of approaching ellipse */
-#define ABS_MT_WIDTH_MINOR 0x33 /* Minor axis (omit if circular) */
-#define ABS_MT_ORIENTATION 0x34 /* Ellipse orientation */
-#define ABS_MT_POSITION_X 0x35 /* Center X touch position */
-#define ABS_MT_POSITION_Y 0x36 /* Center Y touch position */
-#define ABS_MT_TOOL_TYPE 0x37 /* Type of touching device */
-#define ABS_MT_BLOB_ID 0x38 /* Group a set of packets as a blob */
-#define ABS_MT_TRACKING_ID 0x39 /* Unique ID of initiated contact */
-#define ABS_MT_PRESSURE 0x3a /* Pressure on contact area */
-#define ABS_MT_DISTANCE 0x3b /* Contact hover distance */
-#define ABS_MT_TOOL_X 0x3c /* Center X tool position */
-#define ABS_MT_TOOL_Y 0x3d /* Center Y tool position */
-
-
-#define ABS_MAX 0x3f
-#define ABS_CNT (ABS_MAX+1)
-
-/*
- * Switch events
- */
-
-#define SW_LID 0x00 /* set = lid shut */
-#define SW_TABLET_MODE 0x01 /* set = tablet mode */
-#define SW_HEADPHONE_INSERT 0x02 /* set = inserted */
-#define SW_RFKILL_ALL 0x03 /* rfkill master switch, type "any"
- set = radio enabled */
-#define SW_RADIO SW_RFKILL_ALL /* deprecated */
-#define SW_MICROPHONE_INSERT 0x04 /* set = inserted */
-#define SW_DOCK 0x05 /* set = plugged into dock */
-#define SW_LINEOUT_INSERT 0x06 /* set = inserted */
-#define SW_JACK_PHYSICAL_INSERT 0x07 /* set = mechanical switch set */
-#define SW_VIDEOOUT_INSERT 0x08 /* set = inserted */
-#define SW_CAMERA_LENS_COVER 0x09 /* set = lens covered */
-#define SW_KEYPAD_SLIDE 0x0a /* set = keypad slide out */
-#define SW_FRONT_PROXIMITY 0x0b /* set = front proximity sensor active */
-#define SW_ROTATE_LOCK 0x0c /* set = rotate locked/disabled */
-#define SW_LINEIN_INSERT 0x0d /* set = inserted */
-#define SW_MUTE_DEVICE 0x0e /* set = device disabled */
-#define SW_PEN_INSERTED 0x0f /* set = pen inserted */
-#define SW_MAX 0x10
-#define SW_CNT (SW_MAX+1)
-
-/*
- * Misc events
- */
-
-#define MSC_SERIAL 0x00
-#define MSC_PULSELED 0x01
-#define MSC_GESTURE 0x02
-#define MSC_RAW 0x03
-#define MSC_SCAN 0x04
-#define MSC_TIMESTAMP 0x05
-#define MSC_MAX 0x07
-#define MSC_CNT (MSC_MAX+1)
-
-/*
- * LEDs
- */
-
-#define LED_NUML 0x00
-#define LED_CAPSL 0x01
-#define LED_SCROLLL 0x02
-#define LED_COMPOSE 0x03
-#define LED_KANA 0x04
-#define LED_SLEEP 0x05
-#define LED_SUSPEND 0x06
-#define LED_MUTE 0x07
-#define LED_MISC 0x08
-#define LED_MAIL 0x09
-#define LED_CHARGING 0x0a
-#define LED_MAX 0x0f
-#define LED_CNT (LED_MAX+1)
-
-/*
- * Autorepeat values
- */
-
-#define REP_DELAY 0x00
-#define REP_PERIOD 0x01
-#define REP_MAX 0x01
-#define REP_CNT (REP_MAX+1)
-
-/*
- * Sounds
- */
-
-#define SND_CLICK 0x00
-#define SND_BELL 0x01
-#define SND_TONE 0x02
-#define SND_MAX 0x07
-#define SND_CNT (SND_MAX+1)
-
-#endif
diff --git a/include/dt-bindings/interrupt-controller/irq.h b/include/dt-bindings/interrupt-controller/irq.h
deleted file mode 100644
index 33a1003..0000000
--- a/include/dt-bindings/interrupt-controller/irq.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/*
- * This header provides constants for most IRQ bindings.
- *
- * Most IRQ bindings include a flags cell as part of the IRQ specifier.
- * In most cases, the format of the flags cell uses the standard values
- * defined in this header.
- */
-
-#ifndef _DT_BINDINGS_INTERRUPT_CONTROLLER_IRQ_H
-#define _DT_BINDINGS_INTERRUPT_CONTROLLER_IRQ_H
-
-#define IRQ_TYPE_NONE 0
-#define IRQ_TYPE_EDGE_RISING 1
-#define IRQ_TYPE_EDGE_FALLING 2
-#define IRQ_TYPE_EDGE_BOTH (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)
-#define IRQ_TYPE_LEVEL_HIGH 4
-#define IRQ_TYPE_LEVEL_LOW 8
-
-#endif
diff --git a/include/dt-bindings/leds/common.h b/include/dt-bindings/leds/common.h
deleted file mode 100644
index 9a0d33d..0000000
--- a/include/dt-bindings/leds/common.h
+++ /dev/null
@@ -1,106 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * This header provides macros for the common LEDs device tree bindings.
- *
- * Copyright (C) 2015, Samsung Electronics Co., Ltd.
- * Author: Jacek Anaszewski <j.anaszewski@samsung.com>
- *
- * Copyright (C) 2019 Jacek Anaszewski <jacek.anaszewski@gmail.com>
- * Copyright (C) 2020 Pavel Machek <pavel@ucw.cz>
- */
-
-#ifndef __DT_BINDINGS_LEDS_H
-#define __DT_BINDINGS_LEDS_H
-
-/* External trigger type */
-#define LEDS_TRIG_TYPE_EDGE 0
-#define LEDS_TRIG_TYPE_LEVEL 1
-
-/* Boost modes */
-#define LEDS_BOOST_OFF 0
-#define LEDS_BOOST_ADAPTIVE 1
-#define LEDS_BOOST_FIXED 2
-
-/* Standard LED colors */
-#define LED_COLOR_ID_WHITE 0
-#define LED_COLOR_ID_RED 1
-#define LED_COLOR_ID_GREEN 2
-#define LED_COLOR_ID_BLUE 3
-#define LED_COLOR_ID_AMBER 4
-#define LED_COLOR_ID_VIOLET 5
-#define LED_COLOR_ID_YELLOW 6
-#define LED_COLOR_ID_IR 7
-#define LED_COLOR_ID_MULTI 8 /* For multicolor LEDs */
-#define LED_COLOR_ID_RGB 9 /* For multicolor LEDs that can do arbitrary color,
- so this would include RGBW and similar */
-#define LED_COLOR_ID_PURPLE 10
-#define LED_COLOR_ID_ORANGE 11
-#define LED_COLOR_ID_PINK 12
-#define LED_COLOR_ID_CYAN 13
-#define LED_COLOR_ID_LIME 14
-#define LED_COLOR_ID_MAX 15
-
-/* Standard LED functions */
-/* Keyboard LEDs, usually it would be input4::capslock etc. */
-/* Obsolete equivalent: "shift-key-light" */
-#define LED_FUNCTION_CAPSLOCK "capslock"
-#define LED_FUNCTION_SCROLLLOCK "scrolllock"
-#define LED_FUNCTION_NUMLOCK "numlock"
-/* Obsolete equivalents: "tpacpi::thinklight" (IBM/Lenovo Thinkpads),
- "lp5523:kb{1,2,3,4,5,6}" (Nokia N900) */
-#define LED_FUNCTION_KBD_BACKLIGHT "kbd_backlight"
-
-/* System LEDs, usually found on system body.
- platform::mute (etc) is sometimes seen, :mute would be better */
-#define LED_FUNCTION_POWER "power"
-#define LED_FUNCTION_DISK "disk"
-
-/* Obsolete: "platform:*:charging" (allwinner sun50i) */
-#define LED_FUNCTION_CHARGING "charging"
-/* Used RGB notification LEDs common on phones.
- Obsolete equivalents: "status-led:{red,green,blue}" (Motorola Droid 4),
- "lp5523:{r,g,b}" (Nokia N900) */
-#define LED_FUNCTION_STATUS "status"
-
-#define LED_FUNCTION_MICMUTE "micmute"
-#define LED_FUNCTION_MUTE "mute"
-
-/* Used for player LEDs as found on game controllers from e.g. Nintendo, Sony. */
-#define LED_FUNCTION_PLAYER1 "player-1"
-#define LED_FUNCTION_PLAYER2 "player-2"
-#define LED_FUNCTION_PLAYER3 "player-3"
-#define LED_FUNCTION_PLAYER4 "player-4"
-#define LED_FUNCTION_PLAYER5 "player-5"
-
-/* Miscelleaus functions. Use functions above if you can. */
-#define LED_FUNCTION_ACTIVITY "activity"
-#define LED_FUNCTION_ALARM "alarm"
-#define LED_FUNCTION_BACKLIGHT "backlight"
-#define LED_FUNCTION_BLUETOOTH "bluetooth"
-#define LED_FUNCTION_BOOT "boot"
-#define LED_FUNCTION_CPU "cpu"
-#define LED_FUNCTION_DEBUG "debug"
-#define LED_FUNCTION_DISK_ACTIVITY "disk-activity"
-#define LED_FUNCTION_DISK_ERR "disk-err"
-#define LED_FUNCTION_DISK_READ "disk-read"
-#define LED_FUNCTION_DISK_WRITE "disk-write"
-#define LED_FUNCTION_FAULT "fault"
-#define LED_FUNCTION_FLASH "flash"
-#define LED_FUNCTION_HEARTBEAT "heartbeat"
-#define LED_FUNCTION_INDICATOR "indicator"
-#define LED_FUNCTION_LAN "lan"
-#define LED_FUNCTION_MAIL "mail"
-#define LED_FUNCTION_MTD "mtd"
-#define LED_FUNCTION_PANIC "panic"
-#define LED_FUNCTION_PROGRAMMING "programming"
-#define LED_FUNCTION_RX "rx"
-#define LED_FUNCTION_SD "sd"
-#define LED_FUNCTION_STANDBY "standby"
-#define LED_FUNCTION_TORCH "torch"
-#define LED_FUNCTION_TX "tx"
-#define LED_FUNCTION_USB "usb"
-#define LED_FUNCTION_WAN "wan"
-#define LED_FUNCTION_WLAN "wlan"
-#define LED_FUNCTION_WPS "wps"
-
-#endif /* __DT_BINDINGS_LEDS_H */
diff --git a/include/dt-bindings/mux/mux.h b/include/dt-bindings/mux/mux.h
deleted file mode 100644
index 0427192..0000000
--- a/include/dt-bindings/mux/mux.h
+++ /dev/null
@@ -1,17 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * This header provides constants for most Multiplexer bindings.
- *
- * Most Multiplexer bindings specify an idle state. In most cases, the
- * the multiplexer can be left as is when idle, and in some cases it can
- * disconnect the input/output and leave the multiplexer in a high
- * impedance state.
- */
-
-#ifndef _DT_BINDINGS_MUX_MUX_H
-#define _DT_BINDINGS_MUX_MUX_H
-
-#define MUX_IDLE_AS_IS (-1)
-#define MUX_IDLE_DISCONNECT (-2)
-
-#endif
diff --git a/include/dt-bindings/phy/phy.h b/include/dt-bindings/phy/phy.h
deleted file mode 100644
index f48c9ac..0000000
--- a/include/dt-bindings/phy/phy.h
+++ /dev/null
@@ -1,26 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- *
- * This header provides constants for the phy framework
- *
- * Copyright (C) 2014 STMicroelectronics
- * Author: Gabriel Fernandez <gabriel.fernandez@st.com>
- */
-
-#ifndef _DT_BINDINGS_PHY
-#define _DT_BINDINGS_PHY
-
-#define PHY_NONE 0
-#define PHY_TYPE_SATA 1
-#define PHY_TYPE_PCIE 2
-#define PHY_TYPE_USB2 3
-#define PHY_TYPE_USB3 4
-#define PHY_TYPE_UFS 5
-#define PHY_TYPE_DP 6
-#define PHY_TYPE_XPCS 7
-#define PHY_TYPE_SGMII 8
-#define PHY_TYPE_QSGMII 9
-#define PHY_TYPE_DPHY 10
-#define PHY_TYPE_CPHY 11
-
-#endif /* _DT_BINDINGS_PHY */
diff --git a/include/dt-bindings/power/meson-axg-power.h b/include/dt-bindings/power/meson-axg-power.h
deleted file mode 100644
index e524388..0000000
--- a/include/dt-bindings/power/meson-axg-power.h
+++ /dev/null
@@ -1,14 +0,0 @@
-/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */
-/*
- * Copyright (c) 2020 BayLibre, SAS
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- */
-
-#ifndef _DT_BINDINGS_MESON_AXG_POWER_H
-#define _DT_BINDINGS_MESON_AXG_POWER_H
-
-#define PWRC_AXG_VPU_ID 0
-#define PWRC_AXG_ETHERNET_MEM_ID 1
-#define PWRC_AXG_AUDIO_ID 2
-
-#endif
diff --git a/include/dt-bindings/power/meson-g12a-power.h b/include/dt-bindings/power/meson-g12a-power.h
deleted file mode 100644
index bb5e67a..0000000
--- a/include/dt-bindings/power/meson-g12a-power.h
+++ /dev/null
@@ -1,13 +0,0 @@
-/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */
-/*
- * Copyright (c) 2019 BayLibre, SAS
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- */
-
-#ifndef _DT_BINDINGS_MESON_G12A_POWER_H
-#define _DT_BINDINGS_MESON_G12A_POWER_H
-
-#define PWRC_G12A_VPU_ID 0
-#define PWRC_G12A_ETH_ID 1
-
-#endif
diff --git a/include/dt-bindings/power/meson-gxbb-power.h b/include/dt-bindings/power/meson-gxbb-power.h
deleted file mode 100644
index 1262dac..0000000
--- a/include/dt-bindings/power/meson-gxbb-power.h
+++ /dev/null
@@ -1,13 +0,0 @@
-/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */
-/*
- * Copyright (c) 2019 BayLibre, SAS
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- */
-
-#ifndef _DT_BINDINGS_MESON_GXBB_POWER_H
-#define _DT_BINDINGS_MESON_GXBB_POWER_H
-
-#define PWRC_GXBB_VPU_ID 0
-#define PWRC_GXBB_ETHERNET_MEM_ID 1
-
-#endif
diff --git a/include/dt-bindings/power/meson-sm1-power.h b/include/dt-bindings/power/meson-sm1-power.h
deleted file mode 100644
index a020ab0..0000000
--- a/include/dt-bindings/power/meson-sm1-power.h
+++ /dev/null
@@ -1,18 +0,0 @@
-/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */
-/*
- * Copyright (c) 2019 BayLibre, SAS
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- */
-
-#ifndef _DT_BINDINGS_MESON_SM1_POWER_H
-#define _DT_BINDINGS_MESON_SM1_POWER_H
-
-#define PWRC_SM1_VPU_ID 0
-#define PWRC_SM1_NNA_ID 1
-#define PWRC_SM1_USB_ID 2
-#define PWRC_SM1_PCIE_ID 3
-#define PWRC_SM1_GE2D_ID 4
-#define PWRC_SM1_AUDIO_ID 5
-#define PWRC_SM1_ETH_ID 6
-
-#endif
diff --git a/include/dt-bindings/pwm/pwm.h b/include/dt-bindings/pwm/pwm.h
deleted file mode 100644
index 96f49e8..0000000
--- a/include/dt-bindings/pwm/pwm.h
+++ /dev/null
@@ -1,14 +0,0 @@
-/*
- * This header provides constants for most PWM bindings.
- *
- * Most PWM bindings can include a flags cell as part of the PWM specifier.
- * In most cases, the format of the flags cell uses the standard values
- * defined in this header.
- */
-
-#ifndef _DT_BINDINGS_PWM_PWM_H
-#define _DT_BINDINGS_PWM_PWM_H
-
-#define PWM_POLARITY_INVERTED (1 << 0)
-
-#endif
diff --git a/include/dt-bindings/reset/amlogic,meson-axg-audio-arb.h b/include/dt-bindings/reset/amlogic,meson-axg-audio-arb.h
deleted file mode 100644
index 1ef8078..0000000
--- a/include/dt-bindings/reset/amlogic,meson-axg-audio-arb.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/* SPDX-License-Identifier: (GPL-2.0 OR MIT)
- *
- * Copyright (c) 2018 Baylibre SAS.
- * Author: Jerome Brunet <jbrunet@baylibre.com>
- */
-
-#ifndef _DT_BINDINGS_AMLOGIC_MESON_AXG_AUDIO_ARB_H
-#define _DT_BINDINGS_AMLOGIC_MESON_AXG_AUDIO_ARB_H
-
-#define AXG_ARB_TODDR_A 0
-#define AXG_ARB_TODDR_B 1
-#define AXG_ARB_TODDR_C 2
-#define AXG_ARB_FRDDR_A 3
-#define AXG_ARB_FRDDR_B 4
-#define AXG_ARB_FRDDR_C 5
-#define AXG_ARB_TODDR_D 6
-#define AXG_ARB_FRDDR_D 7
-
-#endif /* _DT_BINDINGS_AMLOGIC_MESON_AXG_AUDIO_ARB_H */
diff --git a/include/dt-bindings/reset/amlogic,meson-axg-reset.h b/include/dt-bindings/reset/amlogic,meson-axg-reset.h
deleted file mode 100644
index 0f2e0fe..0000000
--- a/include/dt-bindings/reset/amlogic,meson-axg-reset.h
+++ /dev/null
@@ -1,123 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause */
-/*
- * Copyright (c) 2016 BayLibre, SAS.
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- *
- * Copyright (c) 2017 Amlogic, inc.
- * Author: Yixun Lan <yixun.lan@amlogic.com>
- *
- */
-
-#ifndef _DT_BINDINGS_AMLOGIC_MESON_AXG_RESET_H
-#define _DT_BINDINGS_AMLOGIC_MESON_AXG_RESET_H
-
-/* RESET0 */
-#define RESET_HIU 0
-#define RESET_PCIE_A 1
-#define RESET_PCIE_B 2
-#define RESET_DDR_TOP 3
-/* 4 */
-#define RESET_VIU 5
-#define RESET_PCIE_PHY 6
-#define RESET_PCIE_APB 7
-/* 8 */
-/* 9 */
-#define RESET_VENC 10
-#define RESET_ASSIST 11
-/* 12 */
-#define RESET_VCBUS 13
-/* 14 */
-/* 15 */
-#define RESET_GIC 16
-#define RESET_CAPB3_DECODE 17
-/* 18-21 */
-#define RESET_SYS_CPU_CAPB3 22
-#define RESET_CBUS_CAPB3 23
-#define RESET_AHB_CNTL 24
-#define RESET_AHB_DATA 25
-#define RESET_VCBUS_CLK81 26
-#define RESET_MMC 27
-/* 28-31 */
-/* RESET1 */
-/* 32 */
-/* 33 */
-#define RESET_USB_OTG 34
-#define RESET_DDR 35
-#define RESET_AO_RESET 36
-/* 37 */
-#define RESET_AHB_SRAM 38
-/* 39 */
-/* 40 */
-#define RESET_DMA 41
-#define RESET_ISA 42
-#define RESET_ETHERNET 43
-/* 44 */
-#define RESET_SD_EMMC_B 45
-#define RESET_SD_EMMC_C 46
-#define RESET_ROM_BOOT 47
-#define RESET_SYS_CPU_0 48
-#define RESET_SYS_CPU_1 49
-#define RESET_SYS_CPU_2 50
-#define RESET_SYS_CPU_3 51
-#define RESET_SYS_CPU_CORE_0 52
-#define RESET_SYS_CPU_CORE_1 53
-#define RESET_SYS_CPU_CORE_2 54
-#define RESET_SYS_CPU_CORE_3 55
-#define RESET_SYS_PLL_DIV 56
-#define RESET_SYS_CPU_AXI 57
-#define RESET_SYS_CPU_L2 58
-#define RESET_SYS_CPU_P 59
-#define RESET_SYS_CPU_MBIST 60
-/* 61-63 */
-/* RESET2 */
-/* 64 */
-/* 65 */
-#define RESET_AUDIO 66
-/* 67 */
-#define RESET_MIPI_HOST 68
-#define RESET_AUDIO_LOCKER 69
-#define RESET_GE2D 70
-/* 71-76 */
-#define RESET_AO_CPU_RESET 77
-/* 78-95 */
-/* RESET3 */
-#define RESET_RING_OSCILLATOR 96
-/* 97-127 */
-/* RESET4 */
-/* 128 */
-/* 129 */
-#define RESET_MIPI_PHY 130
-/* 131-140 */
-#define RESET_VENCL 141
-#define RESET_I2C_MASTER_2 142
-#define RESET_I2C_MASTER_1 143
-/* 144-159 */
-/* RESET5 */
-/* 160-191 */
-/* RESET6 */
-#define RESET_PERIPHS_GENERAL 192
-#define RESET_PERIPHS_SPICC 193
-/* 194 */
-/* 195 */
-#define RESET_PERIPHS_I2C_MASTER_0 196
-/* 197-200 */
-#define RESET_PERIPHS_UART_0 201
-#define RESET_PERIPHS_UART_1 202
-/* 203-204 */
-#define RESET_PERIPHS_SPI_0 205
-#define RESET_PERIPHS_I2C_MASTER_3 206
-/* 207-223 */
-/* RESET7 */
-#define RESET_USB_DDR_0 224
-#define RESET_USB_DDR_1 225
-#define RESET_USB_DDR_2 226
-#define RESET_USB_DDR_3 227
-/* 228 */
-#define RESET_DEVICE_MMC_ARB 229
-/* 230 */
-#define RESET_VID_LOCK 231
-#define RESET_A9_DMC_PIPEL 232
-#define RESET_DMC_VPU_PIPEL 233
-/* 234-255 */
-
-#endif
diff --git a/include/dt-bindings/reset/amlogic,meson-g12a-audio-reset.h b/include/dt-bindings/reset/amlogic,meson-g12a-audio-reset.h
deleted file mode 100644
index f805129..0000000
--- a/include/dt-bindings/reset/amlogic,meson-g12a-audio-reset.h
+++ /dev/null
@@ -1,53 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * Copyright (c) 2019 BayLibre, SAS.
- * Author: Jerome Brunet <jbrunet@baylibre.com>
- *
- */
-
-#ifndef _DT_BINDINGS_AMLOGIC_MESON_G12A_AUDIO_RESET_H
-#define _DT_BINDINGS_AMLOGIC_MESON_G12A_AUDIO_RESET_H
-
-#define AUD_RESET_PDM 0
-#define AUD_RESET_TDMIN_A 1
-#define AUD_RESET_TDMIN_B 2
-#define AUD_RESET_TDMIN_C 3
-#define AUD_RESET_TDMIN_LB 4
-#define AUD_RESET_LOOPBACK 5
-#define AUD_RESET_TODDR_A 6
-#define AUD_RESET_TODDR_B 7
-#define AUD_RESET_TODDR_C 8
-#define AUD_RESET_FRDDR_A 9
-#define AUD_RESET_FRDDR_B 10
-#define AUD_RESET_FRDDR_C 11
-#define AUD_RESET_TDMOUT_A 12
-#define AUD_RESET_TDMOUT_B 13
-#define AUD_RESET_TDMOUT_C 14
-#define AUD_RESET_SPDIFOUT 15
-#define AUD_RESET_SPDIFOUT_B 16
-#define AUD_RESET_SPDIFIN 17
-#define AUD_RESET_EQDRC 18
-#define AUD_RESET_RESAMPLE 19
-#define AUD_RESET_DDRARB 20
-#define AUD_RESET_POWDET 21
-#define AUD_RESET_TORAM 22
-#define AUD_RESET_TOACODEC 23
-#define AUD_RESET_TOHDMITX 24
-#define AUD_RESET_CLKTREE 25
-
-/* SM1 added resets */
-#define AUD_RESET_RESAMPLE_B 26
-#define AUD_RESET_TOVAD 27
-#define AUD_RESET_LOCKER 28
-#define AUD_RESET_SPDIFIN_LB 29
-#define AUD_RESET_FRATV 30
-#define AUD_RESET_FRHDMIRX 31
-#define AUD_RESET_FRDDR_D 32
-#define AUD_RESET_TODDR_D 33
-#define AUD_RESET_LOOPBACK_B 34
-#define AUD_RESET_EARCTX 35
-#define AUD_RESET_EARCRX 36
-#define AUD_RESET_FRDDR_E 37
-#define AUD_RESET_TODDR_E 38
-
-#endif
diff --git a/include/dt-bindings/reset/amlogic,meson-g12a-reset.h b/include/dt-bindings/reset/amlogic,meson-g12a-reset.h
deleted file mode 100644
index 6d487c5..0000000
--- a/include/dt-bindings/reset/amlogic,meson-g12a-reset.h
+++ /dev/null
@@ -1,137 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause */
-/*
- * Copyright (c) 2019 BayLibre, SAS.
- * Author: Jerome Brunet <jbrunet@baylibre.com>
- *
- */
-
-#ifndef _DT_BINDINGS_AMLOGIC_MESON_G12A_RESET_H
-#define _DT_BINDINGS_AMLOGIC_MESON_G12A_RESET_H
-
-/* RESET0 */
-#define RESET_HIU 0
-/* 1 */
-#define RESET_DOS 2
-/* 3-4 */
-#define RESET_VIU 5
-#define RESET_AFIFO 6
-#define RESET_VID_PLL_DIV 7
-/* 8-9 */
-#define RESET_VENC 10
-#define RESET_ASSIST 11
-#define RESET_PCIE_CTRL_A 12
-#define RESET_VCBUS 13
-#define RESET_PCIE_PHY 14
-#define RESET_PCIE_APB 15
-#define RESET_GIC 16
-#define RESET_CAPB3_DECODE 17
-/* 18 */
-#define RESET_HDMITX_CAPB3 19
-#define RESET_DVALIN_CAPB3 20
-#define RESET_DOS_CAPB3 21
-/* 22 */
-#define RESET_CBUS_CAPB3 23
-#define RESET_AHB_CNTL 24
-#define RESET_AHB_DATA 25
-#define RESET_VCBUS_CLK81 26
-/* 27-31 */
-/* RESET1 */
-/* 32 */
-#define RESET_DEMUX 33
-#define RESET_USB 34
-#define RESET_DDR 35
-/* 36 */
-#define RESET_BT656 37
-#define RESET_AHB_SRAM 38
-/* 39 */
-#define RESET_PARSER 40
-/* 41 */
-#define RESET_ISA 42
-#define RESET_ETHERNET 43
-#define RESET_SD_EMMC_A 44
-#define RESET_SD_EMMC_B 45
-#define RESET_SD_EMMC_C 46
-/* 47 */
-#define RESET_USB_PHY20 48
-#define RESET_USB_PHY21 49
-/* 50-60 */
-#define RESET_AUDIO_CODEC 61
-/* 62-63 */
-/* RESET2 */
-/* 64 */
-#define RESET_AUDIO 65
-#define RESET_HDMITX_PHY 66
-/* 67 */
-#define RESET_MIPI_DSI_HOST 68
-#define RESET_ALOCKER 69
-#define RESET_GE2D 70
-#define RESET_PARSER_REG 71
-#define RESET_PARSER_FETCH 72
-#define RESET_CTL 73
-#define RESET_PARSER_TOP 74
-/* 75-77 */
-#define RESET_DVALIN 78
-#define RESET_HDMITX 79
-/* 80-95 */
-/* RESET3 */
-/* 96-95 */
-#define RESET_DEMUX_TOP 105
-#define RESET_DEMUX_DES_PL 106
-#define RESET_DEMUX_S2P_0 107
-#define RESET_DEMUX_S2P_1 108
-#define RESET_DEMUX_0 109
-#define RESET_DEMUX_1 110
-#define RESET_DEMUX_2 111
-/* 112-127 */
-/* RESET4 */
-/* 128-129 */
-#define RESET_MIPI_DSI_PHY 130
-/* 131-132 */
-#define RESET_RDMA 133
-#define RESET_VENCI 134
-#define RESET_VENCP 135
-/* 136 */
-#define RESET_VDAC 137
-/* 138-139 */
-#define RESET_VDI6 140
-#define RESET_VENCL 141
-#define RESET_I2C_M1 142
-#define RESET_I2C_M2 143
-/* 144-159 */
-/* RESET5 */
-/* 160-191 */
-/* RESET6 */
-#define RESET_GEN 192
-#define RESET_SPICC0 193
-#define RESET_SC 194
-#define RESET_SANA_3 195
-#define RESET_I2C_M0 196
-#define RESET_TS_PLL 197
-#define RESET_SPICC1 198
-#define RESET_STREAM 199
-#define RESET_TS_CPU 200
-#define RESET_UART0 201
-#define RESET_UART1_2 202
-#define RESET_ASYNC0 203
-#define RESET_ASYNC1 204
-#define RESET_SPIFC0 205
-#define RESET_I2C_M3 206
-/* 207-223 */
-/* RESET7 */
-#define RESET_USB_DDR_0 224
-#define RESET_USB_DDR_1 225
-#define RESET_USB_DDR_2 226
-#define RESET_USB_DDR_3 227
-#define RESET_TS_GPU 228
-#define RESET_DEVICE_MMC_ARB 229
-#define RESET_DVALIN_DMC_PIPL 230
-#define RESET_VID_LOCK 231
-#define RESET_NIC_DMC_PIPL 232
-#define RESET_DMC_VPU_PIPL 233
-#define RESET_GE2D_DMC_PIPL 234
-#define RESET_HCODEC_DMC_PIPL 235
-#define RESET_WAVE420_DMC_PIPL 236
-#define RESET_HEVCF_DMC_PIPL 237
-/* 238-255 */
-
-#endif
diff --git a/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h b/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h
deleted file mode 100644
index 883bfd3..0000000
--- a/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h
+++ /dev/null
@@ -1,161 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
-/*
- * Copyright (c) 2016 BayLibre, SAS.
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- */
-#ifndef _DT_BINDINGS_AMLOGIC_MESON_GXBB_RESET_H
-#define _DT_BINDINGS_AMLOGIC_MESON_GXBB_RESET_H
-
-/* RESET0 */
-#define RESET_HIU 0
-/* 1 */
-#define RESET_DOS_RESET 2
-#define RESET_DDR_TOP 3
-#define RESET_DCU_RESET 4
-#define RESET_VIU 5
-#define RESET_AIU 6
-#define RESET_VID_PLL_DIV 7
-/* 8 */
-#define RESET_PMUX 9
-#define RESET_VENC 10
-#define RESET_ASSIST 11
-#define RESET_AFIFO2 12
-#define RESET_VCBUS 13
-/* 14 */
-/* 15 */
-#define RESET_GIC 16
-#define RESET_CAPB3_DECODE 17
-#define RESET_NAND_CAPB3 18
-#define RESET_HDMITX_CAPB3 19
-#define RESET_MALI_CAPB3 20
-#define RESET_DOS_CAPB3 21
-#define RESET_SYS_CPU_CAPB3 22
-#define RESET_CBUS_CAPB3 23
-#define RESET_AHB_CNTL 24
-#define RESET_AHB_DATA 25
-#define RESET_VCBUS_CLK81 26
-#define RESET_MMC 27
-#define RESET_MIPI_0 28
-#define RESET_MIPI_1 29
-#define RESET_MIPI_2 30
-#define RESET_MIPI_3 31
-/* RESET1 */
-#define RESET_CPPM 32
-#define RESET_DEMUX 33
-#define RESET_USB_OTG 34
-#define RESET_DDR 35
-#define RESET_AO_RESET 36
-#define RESET_BT656 37
-#define RESET_AHB_SRAM 38
-/* 39 */
-#define RESET_PARSER 40
-#define RESET_BLKMV 41
-#define RESET_ISA 42
-#define RESET_ETHERNET 43
-#define RESET_SD_EMMC_A 44
-#define RESET_SD_EMMC_B 45
-#define RESET_SD_EMMC_C 46
-#define RESET_ROM_BOOT 47
-#define RESET_SYS_CPU_0 48
-#define RESET_SYS_CPU_1 49
-#define RESET_SYS_CPU_2 50
-#define RESET_SYS_CPU_3 51
-#define RESET_SYS_CPU_CORE_0 52
-#define RESET_SYS_CPU_CORE_1 53
-#define RESET_SYS_CPU_CORE_2 54
-#define RESET_SYS_CPU_CORE_3 55
-#define RESET_SYS_PLL_DIV 56
-#define RESET_SYS_CPU_AXI 57
-#define RESET_SYS_CPU_L2 58
-#define RESET_SYS_CPU_P 59
-#define RESET_SYS_CPU_MBIST 60
-#define RESET_ACODEC 61
-/* 62 */
-/* 63 */
-/* RESET2 */
-#define RESET_VD_RMEM 64
-#define RESET_AUDIN 65
-#define RESET_HDMI_TX 66
-/* 67 */
-/* 68 */
-/* 69 */
-#define RESET_GE2D 70
-#define RESET_PARSER_REG 71
-#define RESET_PARSER_FETCH 72
-#define RESET_PARSER_CTL 73
-#define RESET_PARSER_TOP 74
-/* 75 */
-/* 76 */
-#define RESET_AO_CPU_RESET 77
-#define RESET_MALI 78
-#define RESET_HDMI_SYSTEM_RESET 79
-/* 80-95 */
-/* RESET3 */
-#define RESET_RING_OSCILLATOR 96
-#define RESET_SYS_CPU 97
-#define RESET_EFUSE 98
-#define RESET_SYS_CPU_BVCI 99
-#define RESET_AIFIFO 100
-#define RESET_TVFE 101
-#define RESET_AHB_BRIDGE_CNTL 102
-/* 103 */
-#define RESET_AUDIO_DAC 104
-#define RESET_DEMUX_TOP 105
-#define RESET_DEMUX_DES 106
-#define RESET_DEMUX_S2P_0 107
-#define RESET_DEMUX_S2P_1 108
-#define RESET_DEMUX_RESET_0 109
-#define RESET_DEMUX_RESET_1 110
-#define RESET_DEMUX_RESET_2 111
-/* 112-127 */
-/* RESET4 */
-/* 128 */
-/* 129 */
-/* 130 */
-/* 131 */
-#define RESET_DVIN_RESET 132
-#define RESET_RDMA 133
-#define RESET_VENCI 134
-#define RESET_VENCP 135
-/* 136 */
-#define RESET_VDAC 137
-#define RESET_RTC 138
-/* 139 */
-#define RESET_VDI6 140
-#define RESET_VENCL 141
-#define RESET_I2C_MASTER_2 142
-#define RESET_I2C_MASTER_1 143
-/* 144-159 */
-/* RESET5 */
-/* 160-191 */
-/* RESET6 */
-#define RESET_PERIPHS_GENERAL 192
-#define RESET_PERIPHS_SPICC 193
-#define RESET_PERIPHS_SMART_CARD 194
-#define RESET_PERIPHS_SAR_ADC 195
-#define RESET_PERIPHS_I2C_MASTER_0 196
-#define RESET_SANA 197
-/* 198 */
-#define RESET_PERIPHS_STREAM_INTERFACE 199
-#define RESET_PERIPHS_SDIO 200
-#define RESET_PERIPHS_UART_0 201
-#define RESET_PERIPHS_UART_1_2 202
-#define RESET_PERIPHS_ASYNC_0 203
-#define RESET_PERIPHS_ASYNC_1 204
-#define RESET_PERIPHS_SPI_0 205
-#define RESET_PERIPHS_SDHC 206
-#define RESET_UART_SLIP 207
-/* 208-223 */
-/* RESET7 */
-#define RESET_USB_DDR_0 224
-#define RESET_USB_DDR_1 225
-#define RESET_USB_DDR_2 226
-#define RESET_USB_DDR_3 227
-/* 228 */
-#define RESET_DEVICE_MMC_ARB 229
-/* 230 */
-#define RESET_VID_LOCK 231
-#define RESET_A9_DMC_PIPEL 232
-/* 233-255 */
-
-#endif
diff --git a/include/dt-bindings/sound/meson-aiu.h b/include/dt-bindings/sound/meson-aiu.h
deleted file mode 100644
index 1051b8a..0000000
--- a/include/dt-bindings/sound/meson-aiu.h
+++ /dev/null
@@ -1,18 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef __DT_MESON_AIU_H
-#define __DT_MESON_AIU_H
-
-#define AIU_CPU 0
-#define AIU_HDMI 1
-#define AIU_ACODEC 2
-
-#define CPU_I2S_FIFO 0
-#define CPU_SPDIF_FIFO 1
-#define CPU_I2S_ENCODER 2
-#define CPU_SPDIF_ENCODER 3
-
-#define CTRL_I2S 0
-#define CTRL_PCM 1
-#define CTRL_OUT 2
-
-#endif /* __DT_MESON_AIU_H */
diff --git a/include/dt-bindings/sound/meson-g12a-toacodec.h b/include/dt-bindings/sound/meson-g12a-toacodec.h
deleted file mode 100644
index 69d7a75..0000000
--- a/include/dt-bindings/sound/meson-g12a-toacodec.h
+++ /dev/null
@@ -1,10 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef __DT_MESON_G12A_TOACODEC_H
-#define __DT_MESON_G12A_TOACODEC_H
-
-#define TOACODEC_IN_A 0
-#define TOACODEC_IN_B 1
-#define TOACODEC_IN_C 2
-#define TOACODEC_OUT 3
-
-#endif /* __DT_MESON_G12A_TOACODEC_H */
diff --git a/include/dt-bindings/sound/meson-g12a-tohdmitx.h b/include/dt-bindings/sound/meson-g12a-tohdmitx.h
deleted file mode 100644
index c5e1f48..0000000
--- a/include/dt-bindings/sound/meson-g12a-tohdmitx.h
+++ /dev/null
@@ -1,13 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef __DT_MESON_G12A_TOHDMITX_H
-#define __DT_MESON_G12A_TOHDMITX_H
-
-#define TOHDMITX_I2S_IN_A 0
-#define TOHDMITX_I2S_IN_B 1
-#define TOHDMITX_I2S_IN_C 2
-#define TOHDMITX_I2S_OUT 3
-#define TOHDMITX_SPDIF_IN_A 4
-#define TOHDMITX_SPDIF_IN_B 5
-#define TOHDMITX_SPDIF_OUT 6
-
-#endif /* __DT_MESON_G12A_TOHDMITX_H */
diff --git a/include/dt-bindings/spmi/spmi.h b/include/dt-bindings/spmi/spmi.h
deleted file mode 100644
index ad4a434..0000000
--- a/include/dt-bindings/spmi/spmi.h
+++ /dev/null
@@ -1,10 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
- */
-#ifndef __DT_BINDINGS_SPMI_H
-#define __DT_BINDINGS_SPMI_H
-
-#define SPMI_USID 0
-#define SPMI_GSID 1
-
-#endif
diff --git a/include/dt-bindings/thermal/thermal.h b/include/dt-bindings/thermal/thermal.h
deleted file mode 100644
index 7871e5f..0000000
--- a/include/dt-bindings/thermal/thermal.h
+++ /dev/null
@@ -1,15 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * This header provides constants for most thermal bindings.
- *
- * Copyright (C) 2013 Texas Instruments
- * Eduardo Valentin <eduardo.valentin@ti.com>
- */
-
-#ifndef _DT_BINDINGS_THERMAL_THERMAL_H
-#define _DT_BINDINGS_THERMAL_THERMAL_H
-
-/* On cooling devices upper and lower limits */
-#define THERMAL_NO_LIMIT (~0)
-
-#endif
diff --git a/include/dt-bindings/usb/pd.h b/include/dt-bindings/usb/pd.h
deleted file mode 100644
index 985f2bb..0000000
--- a/include/dt-bindings/usb/pd.h
+++ /dev/null
@@ -1,88 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef __DT_POWER_DELIVERY_H
-#define __DT_POWER_DELIVERY_H
-
-/* Power delivery Power Data Object definitions */
-#define PDO_TYPE_FIXED 0
-#define PDO_TYPE_BATT 1
-#define PDO_TYPE_VAR 2
-#define PDO_TYPE_APDO 3
-
-#define PDO_TYPE_SHIFT 30
-#define PDO_TYPE_MASK 0x3
-
-#define PDO_TYPE(t) ((t) << PDO_TYPE_SHIFT)
-
-#define PDO_VOLT_MASK 0x3ff
-#define PDO_CURR_MASK 0x3ff
-#define PDO_PWR_MASK 0x3ff
-
-#define PDO_FIXED_DUAL_ROLE (1 << 29) /* Power role swap supported */
-#define PDO_FIXED_SUSPEND (1 << 28) /* USB Suspend supported (Source) */
-#define PDO_FIXED_HIGHER_CAP (1 << 28) /* Requires more than vSafe5V (Sink) */
-#define PDO_FIXED_EXTPOWER (1 << 27) /* Externally powered */
-#define PDO_FIXED_USB_COMM (1 << 26) /* USB communications capable */
-#define PDO_FIXED_DATA_SWAP (1 << 25) /* Data role swap supported */
-#define PDO_FIXED_VOLT_SHIFT 10 /* 50mV units */
-#define PDO_FIXED_CURR_SHIFT 0 /* 10mA units */
-
-#define PDO_FIXED_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_FIXED_VOLT_SHIFT)
-#define PDO_FIXED_CURR(ma) ((((ma) / 10) & PDO_CURR_MASK) << PDO_FIXED_CURR_SHIFT)
-
-#define PDO_FIXED(mv, ma, flags) \
- (PDO_TYPE(PDO_TYPE_FIXED) | (flags) | \
- PDO_FIXED_VOLT(mv) | PDO_FIXED_CURR(ma))
-
-#define VSAFE5V 5000 /* mv units */
-
-#define PDO_BATT_MAX_VOLT_SHIFT 20 /* 50mV units */
-#define PDO_BATT_MIN_VOLT_SHIFT 10 /* 50mV units */
-#define PDO_BATT_MAX_PWR_SHIFT 0 /* 250mW units */
-
-#define PDO_BATT_MIN_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_BATT_MIN_VOLT_SHIFT)
-#define PDO_BATT_MAX_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_BATT_MAX_VOLT_SHIFT)
-#define PDO_BATT_MAX_POWER(mw) ((((mw) / 250) & PDO_PWR_MASK) << PDO_BATT_MAX_PWR_SHIFT)
-
-#define PDO_BATT(min_mv, max_mv, max_mw) \
- (PDO_TYPE(PDO_TYPE_BATT) | PDO_BATT_MIN_VOLT(min_mv) | \
- PDO_BATT_MAX_VOLT(max_mv) | PDO_BATT_MAX_POWER(max_mw))
-
-#define PDO_VAR_MAX_VOLT_SHIFT 20 /* 50mV units */
-#define PDO_VAR_MIN_VOLT_SHIFT 10 /* 50mV units */
-#define PDO_VAR_MAX_CURR_SHIFT 0 /* 10mA units */
-
-#define PDO_VAR_MIN_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_VAR_MIN_VOLT_SHIFT)
-#define PDO_VAR_MAX_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_VAR_MAX_VOLT_SHIFT)
-#define PDO_VAR_MAX_CURR(ma) ((((ma) / 10) & PDO_CURR_MASK) << PDO_VAR_MAX_CURR_SHIFT)
-
-#define PDO_VAR(min_mv, max_mv, max_ma) \
- (PDO_TYPE(PDO_TYPE_VAR) | PDO_VAR_MIN_VOLT(min_mv) | \
- PDO_VAR_MAX_VOLT(max_mv) | PDO_VAR_MAX_CURR(max_ma))
-
-#define APDO_TYPE_PPS 0
-
-#define PDO_APDO_TYPE_SHIFT 28 /* Only valid value currently is 0x0 - PPS */
-#define PDO_APDO_TYPE_MASK 0x3
-
-#define PDO_APDO_TYPE(t) ((t) << PDO_APDO_TYPE_SHIFT)
-
-#define PDO_PPS_APDO_MAX_VOLT_SHIFT 17 /* 100mV units */
-#define PDO_PPS_APDO_MIN_VOLT_SHIFT 8 /* 100mV units */
-#define PDO_PPS_APDO_MAX_CURR_SHIFT 0 /* 50mA units */
-
-#define PDO_PPS_APDO_VOLT_MASK 0xff
-#define PDO_PPS_APDO_CURR_MASK 0x7f
-
-#define PDO_PPS_APDO_MIN_VOLT(mv) \
- ((((mv) / 100) & PDO_PPS_APDO_VOLT_MASK) << PDO_PPS_APDO_MIN_VOLT_SHIFT)
-#define PDO_PPS_APDO_MAX_VOLT(mv) \
- ((((mv) / 100) & PDO_PPS_APDO_VOLT_MASK) << PDO_PPS_APDO_MAX_VOLT_SHIFT)
-#define PDO_PPS_APDO_MAX_CURR(ma) \
- ((((ma) / 50) & PDO_PPS_APDO_CURR_MASK) << PDO_PPS_APDO_MAX_CURR_SHIFT)
-
-#define PDO_PPS_APDO(min_mv, max_mv, max_ma) \
- (PDO_TYPE(PDO_TYPE_APDO) | PDO_APDO_TYPE(APDO_TYPE_PPS) | \
- PDO_PPS_APDO_MIN_VOLT(min_mv) | PDO_PPS_APDO_MAX_VOLT(max_mv) | \
- PDO_PPS_APDO_MAX_CURR(max_ma))
-
- #endif /* __DT_POWER_DELIVERY_H */
diff --git a/include/dw_hdmi.h b/include/dw_hdmi.h
index 8acae38..f4d66ed 100644
--- a/include/dw_hdmi.h
+++ b/include/dw_hdmi.h
@@ -534,6 +534,14 @@
struct hdmi_vmode video_mode;
};
+struct dw_hdmi;
+
+struct dw_hdmi_phy_ops {
+ int (*phy_set)(struct dw_hdmi *hdmi, uint mpixelclock);
+ void (*read_hpd)(struct dw_hdmi *hdmi, bool hdp_status);
+ void (*setup_hpd)(struct dw_hdmi *hdmi);
+};
+
struct dw_hdmi {
ulong ioaddr;
const struct hdmi_mpll_config *mpll_cfg;
@@ -543,8 +551,8 @@
u8 reg_io_width;
struct hdmi_data_info hdmi_data;
struct udevice *ddc_bus;
+ const struct dw_hdmi_phy_ops *ops;
- int (*phy_set)(struct dw_hdmi *hdmi, uint mpixelclock);
void (*write_reg)(struct dw_hdmi *hdmi, u8 val, int offset);
u8 (*read_reg)(struct dw_hdmi *hdmi, int offset);
};
@@ -556,5 +564,6 @@
int dw_hdmi_enable(struct dw_hdmi *hdmi, const struct display_timing *edid);
int dw_hdmi_read_edid(struct dw_hdmi *hdmi, u8 *buf, int buf_size);
void dw_hdmi_init(struct dw_hdmi *hdmi);
+int dw_hdmi_detect_hpd(struct dw_hdmi *hdmi);
#endif
diff --git a/include/eeprom.h b/include/eeprom.h
index f9c6542..e223e4c 100644
--- a/include/eeprom.h
+++ b/include/eeprom.h
@@ -8,6 +8,8 @@
#define __EEPROM_LEGACY_H
#if defined(CONFIG_CMD_EEPROM) || defined(CONFIG_ENV_IS_IN_EEPROM)
+#include <linux/types.h>
+
void eeprom_init(int bus);
int eeprom_read(uint dev_addr, uint offset, uchar *buffer, uint cnt);
int eeprom_write(uint dev_addr, uint offset, uchar *buffer, uint cnt);
diff --git a/include/efi.h b/include/efi.h
index f0e5faa..c3c4b93 100644
--- a/include/efi.h
+++ b/include/efi.h
@@ -492,13 +492,14 @@
/*
* Variable Attributes
*/
-#define EFI_VARIABLE_NON_VOLATILE 0x0000000000000001
-#define EFI_VARIABLE_BOOTSERVICE_ACCESS 0x0000000000000002
-#define EFI_VARIABLE_RUNTIME_ACCESS 0x0000000000000004
-#define EFI_VARIABLE_HARDWARE_ERROR_RECORD 0x0000000000000008
-#define EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS 0x0000000000000010
-#define EFI_VARIABLE_TIME_BASED_AUTHENTICATED_WRITE_ACCESS 0x0000000000000020
-#define EFI_VARIABLE_APPEND_WRITE 0x0000000000000040
+#define EFI_VARIABLE_NON_VOLATILE 0x00000001
+#define EFI_VARIABLE_BOOTSERVICE_ACCESS 0x00000002
+#define EFI_VARIABLE_RUNTIME_ACCESS 0x00000004
+#define EFI_VARIABLE_HARDWARE_ERROR_RECORD 0x00000008
+#define EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS 0x00000010
+#define EFI_VARIABLE_TIME_BASED_AUTHENTICATED_WRITE_ACCESS 0x00000020
+#define EFI_VARIABLE_APPEND_WRITE 0x00000040
+#define EFI_VARIABLE_ENHANCED_AUTHENTICATED_ACCESS 0x00000080
#define EFI_VARIABLE_MASK (EFI_VARIABLE_NON_VOLATILE | \
EFI_VARIABLE_BOOTSERVICE_ACCESS | \
@@ -506,7 +507,8 @@
EFI_VARIABLE_HARDWARE_ERROR_RECORD | \
EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS | \
EFI_VARIABLE_TIME_BASED_AUTHENTICATED_WRITE_ACCESS | \
- EFI_VARIABLE_APPEND_WRITE)
+ EFI_VARIABLE_APPEND_WRITE | \
+ EFI_VARIABLE_ENHANCED_AUTHENTICATED_ACCESS)
/**
* efi_get_priv() - Get access to the EFI-private information
diff --git a/include/efi_loader.h b/include/efi_loader.h
index 7daca0a..9600941 100644
--- a/include/efi_loader.h
+++ b/include/efi_loader.h
@@ -159,6 +159,10 @@
#define EFICONFIG_AUTO_GENERATED_ENTRY_GUID \
EFI_GUID(0x8108ac4e, 0x9f11, 0x4d59, \
0x85, 0x0e, 0xe2, 0x1a, 0x52, 0x2c, 0x59, 0xb2)
+#define U_BOOT_EFI_RT_VAR_FILE_GUID \
+ EFI_GUID(0xb2ac5fc9, 0x92b7, 0x4acd, \
+ 0xae, 0xac, 0x11, 0xe8, 0x18, 0xc3, 0x13, 0x0c)
+
/* Use internal device tree when starting UEFI application */
#define EFI_FDT_USE_INTERNAL NULL
@@ -345,9 +349,6 @@
extern const efi_guid_t efi_guid_text_input_protocol;
extern const efi_guid_t efi_guid_text_output_protocol;
-extern char __efi_runtime_start[], __efi_runtime_stop[];
-extern char __efi_runtime_rel_start[], __efi_runtime_rel_stop[];
-
/**
* struct efi_open_protocol_info_item - open protocol info item
*
@@ -742,7 +743,7 @@
efi_status_t efi_file_size(struct efi_file_handle *fh, efi_uintn_t *size);
/* get a device path from a Boot#### option */
-struct efi_device_path *efi_get_dp_from_boot(const efi_guid_t guid);
+struct efi_device_path *efi_get_dp_from_boot(const efi_guid_t *guid);
/* get len, string (used in u-boot crypto from a guid */
const char *guid_to_sha_str(const efi_guid_t *guid);
diff --git a/include/efi_selftest.h b/include/efi_selftest.h
index 5bcebb3..1b70884 100644
--- a/include/efi_selftest.h
+++ b/include/efi_selftest.h
@@ -148,6 +148,17 @@
u16 efi_st_get_key(void);
/**
+ * efi_st_query_variable_common - Common variable tests for boottime/runtime
+ *
+ * @runtime: Pointer to services table
+ * @attributes: Attributes used
+ *
+ * Return: EFI_ST_SUCCESS/FAILURE
+ */
+int efi_st_query_variable_common(struct efi_runtime_services *runtime,
+ u32 attributes);
+
+/**
* struct efi_unit_test - EFI unit test
*
* The &struct efi_unit_test structure provides a interface to an EFI unit test.
diff --git a/include/efi_tcg2.h b/include/efi_tcg2.h
index b21c5cb..a75b5a3 100644
--- a/include/efi_tcg2.h
+++ b/include/efi_tcg2.h
@@ -150,16 +150,14 @@
* the variable.
* @variable_data_length: The size of the variable data.
* @unicode_name: The CHAR16 unicode name of the variable
- * without NULL-terminator.
- * @variable_data: The data parameter of the efi variable
- * in the GetVariable() API.
+ * without NULL-terminator followed by data.
*/
struct efi_tcg2_uefi_variable_data {
efi_guid_t variable_name;
u64 unicode_name_length;
u64 variable_data_length;
- u16 unicode_name[1];
- u8 variable_data[1];
+ u16 unicode_name[];
+ // u8 variable_data[];
};
/**
diff --git a/include/efi_variable.h b/include/efi_variable.h
index 805e6c5..223bb9a 100644
--- a/include/efi_variable.h
+++ b/include/efi_variable.h
@@ -8,7 +8,7 @@
#include <linux/bitops.h>
-#define EFI_VARIABLE_READ_ONLY BIT(31)
+#define EFI_VARIABLE_READ_ONLY 0x80000000
enum efi_auth_var_type {
EFI_AUTH_VAR_NONE = 0,
@@ -271,13 +271,16 @@
*
* @variable_name_size: size of variable_name buffer in bytes
* @variable_name: name of uefi variable's name in u16
+ * @mask: bitmask with required attributes of variables to be collected.
+ * variables are only collected if all of the required
+ * attributes match. Use 0 to skip matching
* @vendor: vendor's guid
*
* Return: status code
*/
efi_status_t __efi_runtime
efi_get_next_variable_name_mem(efi_uintn_t *variable_name_size, u16 *variable_name,
- efi_guid_t *vendor);
+ efi_guid_t *vendor, u32 mask);
/**
* efi_get_variable_mem() - Runtime common code across efi variable
* implementations for GetVariable() from
@@ -289,12 +292,15 @@
* @data_size: size of the buffer to which the variable value is copied
* @data: buffer to which the variable value is copied
* @timep: authentication time (seconds since start of epoch)
+ * @mask: bitmask with required attributes of variables to be collected.
+ * variables are only collected if all of the required
+ * attributes match. Use 0 to skip matching
* Return: status code
*/
efi_status_t __efi_runtime
efi_get_variable_mem(const u16 *variable_name, const efi_guid_t *vendor,
u32 *attributes, efi_uintn_t *data_size, void *data,
- u64 *timep);
+ u64 *timep, u32 mask);
/**
* efi_get_variable_runtime() - runtime implementation of GetVariable()
@@ -334,4 +340,10 @@
*/
void efi_var_buf_update(struct efi_var_file *var_buf);
+efi_status_t __efi_runtime efi_var_collect_mem(struct efi_var_file *buf,
+ efi_uintn_t *lenp,
+ u32 check_attr_mask);
+
+u32 efi_var_entry_len(struct efi_var_entry *var);
+
#endif
diff --git a/include/env_callback.h b/include/env_callback.h
index 23bc650..8e500aa 100644
--- a/include/env_callback.h
+++ b/include/env_callback.h
@@ -7,6 +7,7 @@
#ifndef __ENV_CALLBACK_H__
#define __ENV_CALLBACK_H__
+#include <config.h>
#include <env_flags.h>
#include <linker_lists.h>
#include <search.h>
diff --git a/include/env_default.h b/include/env_default.h
index 2ca4a08..076ffdd 100644
--- a/include/env_default.h
+++ b/include/env_default.h
@@ -7,6 +7,7 @@
* Andreas Heppel <aheppel@sysgo.de>
*/
+#include <config.h>
#include <env_callback.h>
#include <linux/stringify.h>
@@ -99,6 +100,17 @@
#ifdef CONFIG_SYS_SOC
"soc=" CONFIG_SYS_SOC "\0"
#endif
+#ifdef CONFIG_USB_HOST
+ "usb_ignorelist="
+#ifdef CONFIG_USB_KEYBOARD
+ /* Ignore Yubico devices. Currently only a single USB keyboard device is
+ * supported and the emulated HID keyboard Yubikeys present is useless
+ * as keyboard.
+ */
+ "0x1050:*,"
+#endif
+ "\0"
+#endif
#ifdef CONFIG_ENV_IMPORT_FDT
"env_fdt_path=" CONFIG_ENV_FDT_PATH "\0"
#endif
diff --git a/include/env_flags.h b/include/env_flags.h
index d785f87..2476043 100644
--- a/include/env_flags.h
+++ b/include/env_flags.h
@@ -7,6 +7,8 @@
#ifndef __ENV_FLAGS_H__
#define __ENV_FLAGS_H__
+#include <config.h>
+
enum env_flags_vartype {
env_flags_vartype_string,
env_flags_vartype_decimal,
diff --git a/include/event.h b/include/event.h
index a8f046d..fb353ad 100644
--- a/include/event.h
+++ b/include/event.h
@@ -316,7 +316,7 @@
__used ll_entry_declare(struct evspy_info, _type ## _3_ ## _func, \
evspy_info) = _ESPY_REC(_type, _func)
-/* Simple spy with no function arguemnts */
+/* Simple spy with no function arguments */
#define EVENT_SPY_SIMPLE(_type, _func) \
__used ll_entry_declare(struct evspy_info_simple, \
_type ## _3_ ## _func, \
diff --git a/include/extension_board.h b/include/extension_board.h
index 3b75b5b..87d404c 100644
--- a/include/extension_board.h
+++ b/include/extension_board.h
@@ -7,6 +7,8 @@
#ifndef __EXTENSION_SUPPORT_H
#define __EXTENSION_SUPPORT_H
+#include <linux/list.h>
+
struct extension {
struct list_head list;
char name[32];
diff --git a/include/fastboot.h b/include/fastboot.h
index 1e7920e..2ca1b90 100644
--- a/include/fastboot.h
+++ b/include/fastboot.h
@@ -48,6 +48,7 @@
FASTBOOT_COMMAND_OEM_BOOTBUS,
FASTBOOT_COMMAND_OEM_RUN,
FASTBOOT_COMMAND_OEM_CONSOLE,
+ FASTBOOT_COMMAND_OEM_BOARD,
FASTBOOT_COMMAND_ACMD,
FASTBOOT_COMMAND_UCMD,
FASTBOOT_COMMAND_COUNT
diff --git a/include/fdt_support.h b/include/fdt_support.h
index 25600d6..4b71b89 100644
--- a/include/fdt_support.h
+++ b/include/fdt_support.h
@@ -423,6 +423,8 @@
int fdt_setup_simplefb_node(void *fdt, int node, u64 base_address, u32 width,
u32 height, u32 stride, const char *format);
+int fdt_add_fb_mem_rsv(void *blob);
+
int fdt_overlay_apply_verbose(void *fdt, void *fdto);
int fdt_valid(struct fdt_header **blobp);
diff --git a/include/flash.h b/include/flash.h
index 3710a27..0f73697 100644
--- a/include/flash.h
+++ b/include/flash.h
@@ -7,6 +7,8 @@
#ifndef _FLASH_H_
#define _FLASH_H_
+#include <linux/types.h>
+
/*-----------------------------------------------------------------------
* FLASH Info: contains chip specific data, per FLASH bank
*/
diff --git a/include/fsl_errata.h b/include/fsl_errata.h
index 4454764..9f07072 100644
--- a/include/fsl_errata.h
+++ b/include/fsl_errata.h
@@ -7,7 +7,7 @@
#define _FSL_ERRATA_H
#if defined(CONFIG_PPC)
-#include <asm/processor.h>
+#include <asm/ppc.h>
#elif defined(CONFIG_ARCH_LS1021A)
#include <asm/arch-ls102xa/immap_ls102xa.h>
#elif defined(CONFIG_FSL_LAYERSCAPE)
diff --git a/include/fsl_ifc.h b/include/fsl_ifc.h
index f9a0a70..4991d93 100644
--- a/include/fsl_ifc.h
+++ b/include/fsl_ifc.h
@@ -12,6 +12,8 @@
#include <part.h>
#ifdef CONFIG_ARM
#include <asm/arch/soc.h>
+#else
+#include <asm/ppc.h>
#endif
#define FSL_IFC_V1_1_0 0x01010000
diff --git a/include/fsl_immap.h b/include/fsl_immap.h
index 5297c0b..54d6e0a 100644
--- a/include/fsl_immap.h
+++ b/include/fsl_immap.h
@@ -7,6 +7,9 @@
#ifndef __FSL_IMMAP_H
#define __FSL_IMMAP_H
+
+#include <linux/types.h>
+
/*
* DDR memory controller registers
* This structure works for mpc83xx (DDR2 and DDR3), mpc85xx, mpc86xx.
diff --git a/include/fuse.h b/include/fuse.h
index d48dcdf..4519821 100644
--- a/include/fuse.h
+++ b/include/fuse.h
@@ -11,6 +11,8 @@
#ifndef _FUSE_H_
#define _FUSE_H_
+#include <linux/types.h>
+
/*
* Read/Sense/Program/Override interface:
* bank: Fuse bank
diff --git a/include/gzip.h b/include/gzip.h
index e578b28..5e0d0ec 100644
--- a/include/gzip.h
+++ b/include/gzip.h
@@ -7,6 +7,8 @@
#ifndef __GZIP_H
#define __GZIP_H
+#include <linux/types.h>
+
struct blk_desc;
/**
diff --git a/include/handoff.h b/include/handoff.h
index 0104b83..c0ae7b1 100644
--- a/include/handoff.h
+++ b/include/handoff.h
@@ -10,6 +10,7 @@
#if CONFIG_IS_ENABLED(HANDOFF)
+#include <linux/types.h>
#include <asm/handoff.h>
/**
diff --git a/include/host_arch.h b/include/host_arch.h
index 169d494..261194b 100644
--- a/include/host_arch.h
+++ b/include/host_arch.h
@@ -16,6 +16,8 @@
export HOST_ARCH_X86_64=0x8664
#endif
+#include <version.h>
+
#define HOST_ARCH_AARCH64 0xaa64
#define HOST_ARCH_ARM 0x00a7
#define HOST_ARCH_RISCV32 0x5032
diff --git a/include/i2c_eeprom.h b/include/i2c_eeprom.h
index cba991e..1fe32d2 100644
--- a/include/i2c_eeprom.h
+++ b/include/i2c_eeprom.h
@@ -7,6 +7,7 @@
#define __I2C_EEPROM
#include <linux/errno.h>
+#include <linux/types.h>
struct udevice;
diff --git a/include/image.h b/include/image.h
index 21de70f..acffd17 100644
--- a/include/image.h
+++ b/include/image.h
@@ -946,7 +946,7 @@
int image_check_hcrc(const struct legacy_img_hdr *hdr);
int image_check_dcrc(const struct legacy_img_hdr *hdr);
#ifndef USE_HOSTCC
-ulong env_get_bootm_low(void);
+phys_addr_t env_get_bootm_low(void);
phys_size_t env_get_bootm_size(void);
phys_size_t env_get_bootm_mapsize(void);
#endif
diff --git a/include/imx_container.h b/include/imx_container.h
index 54cd684..691c764 100644
--- a/include/imx_container.h
+++ b/include/imx_container.h
@@ -50,10 +50,10 @@
u8 length_lsb;
u8 length_msb;
u8 tag;
- u16 srk_table_offset;
u16 cert_offset;
- u16 blob_offset;
+ u16 srk_table_offset;
u16 signature_offset;
+ u16 blob_offset;
u32 reserved;
} __packed;
diff --git a/include/init.h b/include/init.h
index 630d867..2c10171 100644
--- a/include/init.h
+++ b/include/init.h
@@ -401,6 +401,8 @@
/* Show arch-specific information for the 'bd' command */
void arch_print_bdinfo(void);
+struct cmd_tbl;
+
int do_bdinfo(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]);
#endif /* __ASSEMBLY__ */
diff --git a/include/jffs2/load_kernel.h b/include/jffs2/load_kernel.h
index 9346d7e..fa4600e 100644
--- a/include/jffs2/load_kernel.h
+++ b/include/jffs2/load_kernel.h
@@ -10,6 +10,7 @@
*-----------------------------------------------------------------------*/
#include <linux/list.h>
+#include <linux/string.h>
/* mtd device types */
#define MTD_DEV_TYPE_NOR 0x0001
diff --git a/include/libata.h b/include/libata.h
index a55e931..fa39d21 100644
--- a/include/libata.h
+++ b/include/libata.h
@@ -10,6 +10,7 @@
#ifndef __LIBATA_H__
#define __LIBATA_H__
+#include <linux/types.h>
enum {
/* various global constants */
diff --git a/include/linux/compat.h b/include/linux/compat.h
index f8e3570..6238145 100644
--- a/include/linux/compat.h
+++ b/include/linux/compat.h
@@ -5,6 +5,7 @@
#include <cyclic.h>
#include <log.h>
#include <malloc.h>
+#include <time.h>
#include <asm/processor.h>
diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h
index 7a66c7a..ee18a63 100644
--- a/include/linux/mtd/mtd.h
+++ b/include/linux/mtd/mtd.h
@@ -153,7 +153,7 @@
uint32_t flags;
uint64_t size; // Total size of the MTD
- /* "Major" erase size for the device. Naïve users may take this
+ /* "Major" erase size for the device. Naive users may take this
* to be the only erase size available, or may use the more detailed
* information below if they desire
*/
diff --git a/include/linux/mtd/omap_gpmc.h b/include/linux/mtd/omap_gpmc.h
index f08e700..2dbf988 100644
--- a/include/linux/mtd/omap_gpmc.h
+++ b/include/linux/mtd/omap_gpmc.h
@@ -8,6 +8,8 @@
#ifndef __ASM_OMAP_GPMC_H
#define __ASM_OMAP_GPMC_H
+#include <linux/types.h>
+
/* Maximum Number of Chip Selects */
#define GPMC_CS_NUM 8
diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h
index fb002ae..4abaf47 100644
--- a/include/linux/mtd/rawnand.h
+++ b/include/linux/mtd/rawnand.h
@@ -249,6 +249,13 @@
*/
#define NAND_USE_BOUNCE_BUFFER 0x00100000
+/*
+ * Do not try to tweak the timings at runtime. This is needed when the
+ * controller initializes the timings on itself or when it relies on
+ * configuration done by the bootloader.
+ */
+#define NAND_KEEP_TIMINGS 0x00800000
+
/* Options set by nand scan */
/* bbt has already been read */
#define NAND_BBT_SCANNED 0x40000000
diff --git a/include/linux/mtd/spinand.h b/include/linux/mtd/spinand.h
index 6f479fa..13b5a52 100644
--- a/include/linux/mtd/spinand.h
+++ b/include/linux/mtd/spinand.h
@@ -251,6 +251,7 @@
extern const struct spinand_manufacturer toshiba_spinand_manufacturer;
extern const struct spinand_manufacturer winbond_spinand_manufacturer;
extern const struct spinand_manufacturer esmt_c8_spinand_manufacturer;
+extern const struct spinand_manufacturer xtx_spinand_manufacturer;
/**
* struct spinand_op_variants - SPI NAND operation variants
diff --git a/include/mailbox.h b/include/mailbox.h
index 323b6c2..e70266f 100644
--- a/include/mailbox.h
+++ b/include/mailbox.h
@@ -6,6 +6,8 @@
#ifndef _MAILBOX_H
#define _MAILBOX_H
+#include <linux/types.h>
+
/**
* A mailbox is a hardware mechanism for transferring small fixed-size messages
* and/or notifications between the CPU on which U-Boot runs and some other
diff --git a/include/mcheck.h b/include/mcheck.h
new file mode 100644
index 0000000..bd506ae
--- /dev/null
+++ b/include/mcheck.h
@@ -0,0 +1,51 @@
+/* SPDX-License-Identifier: GPL-2.1+ */
+/*
+ * Copyright (C) 1996-2024 Free Software Foundation, Inc.
+ * This file is part of the GNU C Library.
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License as published by the Free Software Foundation; either
+ * version 2.1 of the License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * Lesser General Public License for more details.
+ * <https://www.gnu.org/licenses/>.
+ */
+#ifndef _MCHECK_H
+#define _MCHECK_H 1
+
+/*
+ * Return values for `mprobe': these are the kinds of inconsistencies that
+ * `mcheck' enables detection of.
+ */
+enum mcheck_status {
+ MCHECK_DISABLED = -1, /* Consistency checking is not turned on. */
+ MCHECK_OK, /* Block is fine. */
+ MCHECK_FREE, /* Block freed twice. */
+ MCHECK_HEAD, /* Memory before the block was clobbered. */
+ MCHECK_TAIL /* Memory after the block was clobbered. */
+};
+
+typedef void (*mcheck_abortfunc_t)(enum mcheck_status, const void *p);
+
+int mcheck(mcheck_abortfunc_t func);
+
+/*
+ * Similar to `mcheck' but performs checks for all block whenever one of
+ * the memory handling functions is called. This can be very slow.
+ */
+int mcheck_pedantic(mcheck_abortfunc_t f);
+
+/* Force check of all blocks now. */
+void mcheck_check_all(void);
+
+/*
+ * Check for aberrations in a particular malloc'd block. These are the
+ * same checks that `mcheck' does, when you free or reallocate a block.
+ */
+enum mcheck_status mprobe(void *__ptr);
+
+#endif
diff --git a/include/mmc.h b/include/mmc.h
index 1022db3..7f19003 100644
--- a/include/mmc.h
+++ b/include/mmc.h
@@ -18,13 +18,6 @@
struct bd_info;
-#if CONFIG_IS_ENABLED(MMC_HS200_SUPPORT)
-#define MMC_SUPPORTS_TUNING
-#endif
-#if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT)
-#define MMC_SUPPORTS_TUNING
-#endif
-
/* SD/MMC version bits; 8 flags, 8 major, 8 minor, 8 change */
#define SD_VERSION_SD (1U << 31)
#define MMC_VERSION_MMC (1U << 30)
@@ -485,7 +478,7 @@
*/
int (*get_wp)(struct udevice *dev);
-#ifdef MMC_SUPPORTS_TUNING
+#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING)
/**
* execute_tuning() - Start the tuning process
*
@@ -590,7 +583,7 @@
uint f_max;
uint b_max;
unsigned char part_type;
-#ifdef CONFIG_MMC_PWRSEQ
+#if CONFIG_IS_ENABLED(MMC_PWRSEQ)
struct udevice *pwr_dev;
#endif
};
@@ -736,7 +729,8 @@
* accessing the boot partitions
*/
u32 quirks;
- u8 hs400_tuning;
+ bool tuning:1;
+ bool hs400_tuning:1;
enum bus_mode user_speed_mode; /* input speed mode from user */
};
@@ -795,7 +789,7 @@
int mmc_initialize(struct bd_info *bis);
int mmc_init_device(int num);
int mmc_init(struct mmc *mmc);
-int mmc_send_tuning(struct mmc *mmc, u32 opcode, int *cmd_error);
+int mmc_send_tuning(struct mmc *mmc, u32 opcode);
int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data);
int mmc_deinit(struct mmc *mmc);
@@ -808,7 +802,7 @@
*/
int mmc_of_parse(struct udevice *dev, struct mmc_config *cfg);
-#ifdef CONFIG_MMC_PWRSEQ
+#if CONFIG_IS_ENABLED(MMC_PWRSEQ)
/**
* mmc_pwrseq_get_power() - get a power device from device tree
*
diff --git a/include/mpc85xx.h b/include/mpc85xx.h
index 636734d..ff86c7c 100644
--- a/include/mpc85xx.h
+++ b/include/mpc85xx.h
@@ -6,6 +6,7 @@
#ifndef __MPC85xx_H__
#define __MPC85xx_H__
+#include <config.h>
#if defined(CONFIG_E500)
#include <e500.h>
#endif
diff --git a/include/nand.h b/include/nand.h
index 220ffa2..cdba738 100644
--- a/include/nand.h
+++ b/include/nand.h
@@ -8,8 +8,6 @@
#ifndef _NAND_H_
#define _NAND_H_
-#include <config.h>
-
extern void nand_init(void);
void nand_reinit(void);
unsigned long nand_size(void);
diff --git a/include/netdev.h b/include/netdev.h
index 2a7f40e..2a06d9a 100644
--- a/include/netdev.h
+++ b/include/netdev.h
@@ -10,9 +10,12 @@
#ifndef _NETDEV_H_
#define _NETDEV_H_
+
+#include <linux/types.h>
#include <phy_interface.h>
struct udevice;
+struct bd_info;
/*
* Board and CPU-specific initialization functions
diff --git a/include/pci.h b/include/pci.h
index aad2337..ea3b739 100644
--- a/include/pci.h
+++ b/include/pci.h
@@ -520,6 +520,7 @@
#ifndef __ASSEMBLY__
+#include <linux/types.h>
#include <dm/pci.h>
#ifdef CONFIG_SYS_PCI_64BIT
diff --git a/include/phy_interface.h b/include/phy_interface.h
index 31be322..b74f4cc 100644
--- a/include/phy_interface.h
+++ b/include/phy_interface.h
@@ -11,6 +11,7 @@
#define _PHY_INTERFACE_H
#include <string.h>
+#include <linux/kernel.h>
typedef enum {
PHY_INTERFACE_MODE_NA, /* don't touch */
diff --git a/include/power/tps65941.h b/include/power/tps65941.h
index a2bc681..cec8533 100644
--- a/include/power/tps65941.h
+++ b/include/power/tps65941.h
@@ -3,11 +3,14 @@
#define TPS659413 0x2
#define TPS659414 0x3
#define LP876441 0x4
+#define TPS65224 0x5
/* I2C device address for pmic tps65941 */
#define TPS65941_I2C_ADDR (0x12 >> 1)
#define TPS65941_LDO_NUM 4
#define TPS65941_BUCK_NUM 5
+#define TPS65224_LDO_NUM 3
+#define TPS65224_BUCK_NUM 4
/* Drivers name */
#define TPS65941_LDO_DRIVER "tps65941_ldo"
@@ -25,3 +28,30 @@
#define TPS65941_LDO_MODE_MASK 0x1
#define TPS65941_LDO_BYPASS_EN 0x80
#define TP65941_BUCK_CONF_SLEW_MASK 0x7
+
+#define TPS65224_BUCK_VOLT_MAX 3300000
+#define TPS65224_BUCK1_VOLT_MAX_HEX 0xFD
+#define TPS65224_BUCK234_VOLT_MAX_HEX 0x45
+
+#define TPS65224_BUCK_CONF_SLEW_MASK 0x3
+#define TPS65224_LDO_VOLT_MASK (0x3F << 1)
+
+#define TPS65224_LDO1_VOLT_MIN_HEX 0x0C
+#define TPS65224_LDO23_VOLT_MIN_HEX 0x00
+#define TPS65224_LDO1_VOLT_MAX_HEX 0x36
+#define TPS65224_LDO23_VOLT_MAX_HEX 0x38
+
+#define TPS65224_LDO1_VOLT_MAX 3300000
+#define TPS65224_LDO23_VOLT_MAX 3400000
+#define TPS65224_LDO1_VOLT_MIN 1200000
+#define TPS65224_LDO23_VOLT_MIN 600000
+
+#define TPS65224_LDO_STEP 50000
+
+#define TPS65224_LDO_BYP_CONFIG 7
+
+#define TPS65224_LDO1_VOLT_BYP_MIN 2200000
+#define TPS65224_LDO1_VOLT_BYP_MAX 3600000
+
+#define TPS65224_LDO23_VOLT_BYP_MIN 1500000
+#define TPS65224_LDO23_VOLT_BYP_MAX 5500000
diff --git a/include/ram.h b/include/ram.h
index 2fc971d..3600bb5 100644
--- a/include/ram.h
+++ b/include/ram.h
@@ -7,6 +7,8 @@
#ifndef __RAM_H
#define __RAM_H
+#include <linux/types.h>
+
struct udevice;
struct ram_info {
diff --git a/include/s_record.h b/include/s_record.h
index 3ece695..aab09d9 100644
--- a/include/s_record.h
+++ b/include/s_record.h
@@ -4,6 +4,8 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
+#include <linux/types.h>
+
/*--------------------------------------------------------------------------
*
* Motorola S-Record Format:
diff --git a/include/sdhci.h b/include/sdhci.h
index a1b74e3..31a49ca 100644
--- a/include/sdhci.h
+++ b/include/sdhci.h
@@ -11,6 +11,7 @@
#include <linux/bitops.h>
#include <linux/types.h>
+#include <linux/kernel.h>
#include <asm/io.h>
#include <mmc.h>
#include <asm/gpio.h>
@@ -291,16 +292,21 @@
* Return: 0 if successful, -ve on error
*/
int (*set_enhanced_strobe)(struct sdhci_host *host);
+
+#ifdef CONFIG_MMC_SDHCI_ADMA_HELPERS
+ void (*adma_write_desc)(struct sdhci_host *host, void **desc,
+ dma_addr_t addr, int len, bool end);
+#endif
};
#define ADMA_MAX_LEN 65532
-#ifdef CONFIG_DMA_ADDR_T_64BIT
-#define ADMA_DESC_LEN 16
+#ifdef CONFIG_MMC_SDHCI_ADMA_64BIT
+#define ADMA_DESC_LEN 12
#else
#define ADMA_DESC_LEN 8
#endif
-#define ADMA_TABLE_NO_ENTRIES (CONFIG_SYS_MMC_MAX_BLK_COUNT * \
- MMC_MAX_BLOCK_LEN) / ADMA_MAX_LEN
+#define ADMA_TABLE_NO_ENTRIES DIV_ROUND_UP(CONFIG_SYS_MMC_MAX_BLK_COUNT * \
+ MMC_MAX_BLOCK_LEN, ADMA_MAX_LEN)
#define ADMA_TABLE_SZ (ADMA_TABLE_NO_ENTRIES * ADMA_DESC_LEN)
@@ -319,7 +325,7 @@
u8 reserved;
u16 len;
u32 addr_lo;
-#ifdef CONFIG_DMA_ADDR_T_64BIT
+#ifdef CONFIG_MMC_SDHCI_ADMA_64BIT
u32 addr_hi;
#endif
} __packed;
@@ -526,8 +532,11 @@
#else
#endif
+void sdhci_adma_write_desc(struct sdhci_host *host, void **next_desc,
+ dma_addr_t addr, int len, bool end);
struct sdhci_adma_desc *sdhci_adma_init(void);
-void sdhci_prepare_adma_table(struct sdhci_adma_desc *table,
- struct mmc_data *data, dma_addr_t addr);
+void sdhci_prepare_adma_table(struct sdhci_host *host,
+ struct sdhci_adma_desc *table,
+ struct mmc_data *data, dma_addr_t start_addr);
#endif /* __SDHCI_HW_H */
diff --git a/include/sm.h b/include/sm.h
index afa9c89..fbc156a 100644
--- a/include/sm.h
+++ b/include/sm.h
@@ -19,7 +19,7 @@
* implementation of the driver you are using.
*/
-#include <asm/types.h>
+#include <linux/types.h>
#include <asm/ptrace.h>
struct udevice;
diff --git a/include/soc/qcom/geni-se.h b/include/soc/qcom/geni-se.h
new file mode 100644
index 0000000..698a925
--- /dev/null
+++ b/include/soc/qcom/geni-se.h
@@ -0,0 +1,265 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
+ */
+
+#ifndef _QCOM_GENI_SE
+#define _QCOM_GENI_SE
+
+/* Protocols supported by GENI Serial Engines */
+enum geni_se_protocol_type {
+ GENI_SE_NONE,
+ GENI_SE_SPI,
+ GENI_SE_UART,
+ GENI_SE_I2C,
+ GENI_SE_I3C,
+ GENI_SE_SPI_SLAVE,
+};
+
+#define QUP_HW_VER_REG 0x4
+
+/* Common SE registers */
+#define GENI_INIT_CFG_REVISION 0x0
+#define GENI_S_INIT_CFG_REVISION 0x4
+#define GENI_FORCE_DEFAULT_REG 0x20
+#define GENI_OUTPUT_CTRL 0x24
+#define GENI_CGC_CTRL 0x28
+#define SE_GENI_STATUS 0x40
+#define GENI_SER_M_CLK_CFG 0x48
+#define GENI_SER_S_CLK_CFG 0x4c
+#define GENI_IF_DISABLE_RO 0x64
+#define GENI_FW_REVISION_RO 0x68
+#define SE_GENI_CLK_SEL 0x7c
+#define SE_GENI_CFG_SEQ_START 0x84
+#define SE_GENI_BYTE_GRAN 0x254
+#define SE_GENI_DMA_MODE_EN 0x258
+#define SE_GENI_TX_PACKING_CFG0 0x260
+#define SE_GENI_TX_PACKING_CFG1 0x264
+#define SE_GENI_RX_PACKING_CFG0 0x284
+#define SE_GENI_RX_PACKING_CFG1 0x288
+#define SE_GENI_M_CMD0 0x600
+#define SE_GENI_M_CMD_CTRL_REG 0x604
+#define SE_GENI_M_IRQ_STATUS 0x610
+#define SE_GENI_M_IRQ_EN 0x614
+#define SE_GENI_M_IRQ_CLEAR 0x618
+#define SE_GENI_S_CMD0 0x630
+#define SE_GENI_S_CMD_CTRL_REG 0x634
+#define SE_GENI_S_IRQ_STATUS 0x640
+#define SE_GENI_S_IRQ_EN 0x644
+#define SE_GENI_S_IRQ_CLEAR 0x648
+#define SE_GENI_TX_FIFOn 0x700
+#define SE_GENI_RX_FIFOn 0x780
+#define SE_GENI_TX_FIFO_STATUS 0x800
+#define SE_GENI_RX_FIFO_STATUS 0x804
+#define SE_GENI_TX_WATERMARK_REG 0x80c
+#define SE_GENI_RX_WATERMARK_REG 0x810
+#define SE_GENI_RX_RFR_WATERMARK_REG 0x814
+#define SE_GENI_IOS 0x908
+#define SE_DMA_TX_IRQ_STAT 0xc40
+#define SE_DMA_TX_IRQ_CLR 0xc44
+#define SE_DMA_TX_FSM_RST 0xc58
+#define SE_DMA_RX_IRQ_STAT 0xd40
+#define SE_DMA_RX_IRQ_CLR 0xd44
+#define SE_DMA_RX_LEN_IN 0xd54
+#define SE_DMA_RX_FSM_RST 0xd58
+#define SE_GSI_EVENT_EN 0xe18
+#define SE_IRQ_EN 0xe1c
+#define SE_HW_PARAM_0 0xe24
+#define SE_HW_PARAM_1 0xe28
+
+/* GENI_FORCE_DEFAULT_REG fields */
+#define FORCE_DEFAULT BIT(0)
+
+/* GENI_OUTPUT_CTRL fields */
+#define GENI_IO_MUX_0_EN BIT(0)
+#define DEFAULT_IO_OUTPUT_CTRL_MSK GENMASK(6, 0)
+
+/* GENI_CGC_CTRL fields */
+#define CFG_AHB_CLK_CGC_ON BIT(0)
+#define CFG_AHB_WR_ACLK_CGC_ON BIT(1)
+#define DATA_AHB_CLK_CGC_ON BIT(2)
+#define SCLK_CGC_ON BIT(3)
+#define TX_CLK_CGC_ON BIT(4)
+#define RX_CLK_CGC_ON BIT(5)
+#define EXT_CLK_CGC_ON BIT(6)
+#define PROG_RAM_HCLK_OFF BIT(8)
+#define PROG_RAM_SCLK_OFF BIT(9)
+#define DEFAULT_CGC_EN GENMASK(6, 0)
+
+/* GENI_STATUS fields */
+#define M_GENI_CMD_ACTIVE BIT(0)
+#define S_GENI_CMD_ACTIVE BIT(12)
+
+/* GENI_SER_M_CLK_CFG/GENI_SER_S_CLK_CFG */
+#define SER_CLK_EN BIT(0)
+#define CLK_DIV_MSK GENMASK(15, 4)
+#define CLK_DIV_SHFT 4
+
+/* GENI_IF_DISABLE_RO fields */
+#define FIFO_IF_DISABLE (BIT(0))
+
+/* GENI_FW_REVISION_RO fields */
+#define FW_REV_PROTOCOL_MSK GENMASK(15, 8)
+#define FW_REV_PROTOCOL_SHFT 8
+
+/* GENI_CLK_SEL fields */
+#define CLK_SEL_MSK GENMASK(2, 0)
+
+/* SE_GENI_CFG_SEQ_START fields */
+#define START_TRIGGER BIT(0)
+
+/* SE_IRQ_EN fields */
+#define DMA_RX_IRQ_EN BIT(0)
+#define DMA_TX_IRQ_EN BIT(1)
+#define GENI_M_IRQ_EN BIT(2)
+#define GENI_S_IRQ_EN BIT(3)
+
+/* SE_GENI_DMA_MODE_EN */
+#define GENI_DMA_MODE_EN BIT(0)
+
+/* GENI_M_CMD0 fields */
+#define M_OPCODE_MSK GENMASK(31, 27)
+#define M_OPCODE_SHFT 27
+#define M_PARAMS_MSK GENMASK(26, 0)
+
+/* GENI_M_CMD_CTRL_REG */
+#define M_GENI_CMD_CANCEL BIT(2)
+#define M_GENI_CMD_ABORT BIT(1)
+#define M_GENI_DISABLE BIT(0)
+
+/* GENI_S_CMD0 fields */
+#define S_OPCODE_MSK GENMASK(31, 27)
+#define S_OPCODE_SHFT 27
+#define S_PARAMS_MSK GENMASK(26, 0)
+
+/* GENI_S_CMD_CTRL_REG */
+#define S_GENI_CMD_CANCEL BIT(2)
+#define S_GENI_CMD_ABORT BIT(1)
+#define S_GENI_DISABLE BIT(0)
+
+/* GENI_M_IRQ_EN fields */
+#define M_CMD_DONE_EN BIT(0)
+#define M_CMD_OVERRUN_EN BIT(1)
+#define M_ILLEGAL_CMD_EN BIT(2)
+#define M_CMD_FAILURE_EN BIT(3)
+#define M_CMD_CANCEL_EN BIT(4)
+#define M_CMD_ABORT_EN BIT(5)
+#define M_TIMESTAMP_EN BIT(6)
+#define M_RX_IRQ_EN BIT(7)
+#define M_GP_SYNC_IRQ_0_EN BIT(8)
+#define M_GP_IRQ_0_EN BIT(9)
+#define M_GP_IRQ_1_EN BIT(10)
+#define M_GP_IRQ_2_EN BIT(11)
+#define M_GP_IRQ_3_EN BIT(12)
+#define M_GP_IRQ_4_EN BIT(13)
+#define M_GP_IRQ_5_EN BIT(14)
+#define M_TX_FIFO_NOT_EMPTY_EN BIT(21)
+#define M_IO_DATA_DEASSERT_EN BIT(22)
+#define M_IO_DATA_ASSERT_EN BIT(23)
+#define M_RX_FIFO_RD_ERR_EN BIT(24)
+#define M_RX_FIFO_WR_ERR_EN BIT(25)
+#define M_RX_FIFO_WATERMARK_EN BIT(26)
+#define M_RX_FIFO_LAST_EN BIT(27)
+#define M_TX_FIFO_RD_ERR_EN BIT(28)
+#define M_TX_FIFO_WR_ERR_EN BIT(29)
+#define M_TX_FIFO_WATERMARK_EN BIT(30)
+#define M_SEC_IRQ_EN BIT(31)
+#define M_COMMON_GENI_M_IRQ_EN (GENMASK(6, 1) | \
+ M_IO_DATA_DEASSERT_EN | \
+ M_IO_DATA_ASSERT_EN | M_RX_FIFO_RD_ERR_EN | \
+ M_RX_FIFO_WR_ERR_EN | M_TX_FIFO_RD_ERR_EN | \
+ M_TX_FIFO_WR_ERR_EN)
+
+/* GENI_S_IRQ_EN fields */
+#define S_CMD_DONE_EN BIT(0)
+#define S_CMD_OVERRUN_EN BIT(1)
+#define S_ILLEGAL_CMD_EN BIT(2)
+#define S_CMD_FAILURE_EN BIT(3)
+#define S_CMD_CANCEL_EN BIT(4)
+#define S_CMD_ABORT_EN BIT(5)
+#define S_GP_SYNC_IRQ_0_EN BIT(8)
+#define S_GP_IRQ_0_EN BIT(9)
+#define S_GP_IRQ_1_EN BIT(10)
+#define S_GP_IRQ_2_EN BIT(11)
+#define S_GP_IRQ_3_EN BIT(12)
+#define S_GP_IRQ_4_EN BIT(13)
+#define S_GP_IRQ_5_EN BIT(14)
+#define S_IO_DATA_DEASSERT_EN BIT(22)
+#define S_IO_DATA_ASSERT_EN BIT(23)
+#define S_RX_FIFO_RD_ERR_EN BIT(24)
+#define S_RX_FIFO_WR_ERR_EN BIT(25)
+#define S_RX_FIFO_WATERMARK_EN BIT(26)
+#define S_RX_FIFO_LAST_EN BIT(27)
+#define S_COMMON_GENI_S_IRQ_EN (GENMASK(5, 1) | GENMASK(13, 9) | \
+ S_RX_FIFO_RD_ERR_EN | S_RX_FIFO_WR_ERR_EN)
+
+/* GENI_/TX/RX/RX_RFR/_WATERMARK_REG fields */
+#define WATERMARK_MSK GENMASK(5, 0)
+
+/* GENI_TX_FIFO_STATUS fields */
+#define TX_FIFO_WC GENMASK(27, 0)
+
+/* GENI_RX_FIFO_STATUS fields */
+#define RX_LAST BIT(31)
+#define RX_LAST_BYTE_VALID_MSK GENMASK(30, 28)
+#define RX_LAST_BYTE_VALID_SHFT 28
+#define RX_FIFO_WC_MSK GENMASK(24, 0)
+
+/* SE_GENI_IOS fields */
+#define IO2_DATA_IN BIT(1)
+#define RX_DATA_IN BIT(0)
+
+/* SE_DMA_TX_IRQ_STAT Register fields */
+#define TX_DMA_DONE BIT(0)
+#define TX_EOT BIT(1)
+#define TX_SBE BIT(2)
+#define TX_RESET_DONE BIT(3)
+
+/* SE_DMA_RX_IRQ_STAT Register fields */
+#define RX_DMA_DONE BIT(0)
+#define RX_EOT BIT(1)
+#define RX_SBE BIT(2)
+#define RX_RESET_DONE BIT(3)
+#define RX_FLUSH_DONE BIT(4)
+#define RX_DMA_PARITY_ERR BIT(5)
+#define RX_DMA_BREAK GENMASK(8, 7)
+#define RX_GENI_GP_IRQ GENMASK(10, 5)
+#define RX_GENI_CANCEL_IRQ BIT(11)
+#define RX_GENI_GP_IRQ_EXT GENMASK(13, 12)
+
+/* SE_HW_PARAM_0 fields */
+#define TX_FIFO_WIDTH_MSK GENMASK(29, 24)
+#define TX_FIFO_WIDTH_SHFT 24
+/*
+ * For QUP HW Version >= 3.10 Tx fifo depth support is increased
+ * to 256bytes and corresponding bits are 16 to 23
+ */
+#define TX_FIFO_DEPTH_MSK_256_BYTES GENMASK(23, 16)
+#define TX_FIFO_DEPTH_MSK GENMASK(21, 16)
+#define TX_FIFO_DEPTH_SHFT 16
+
+/* SE_HW_PARAM_1 fields */
+#define RX_FIFO_WIDTH_MSK GENMASK(29, 24)
+#define RX_FIFO_WIDTH_SHFT 24
+/*
+ * For QUP HW Version >= 3.10 Rx fifo depth support is increased
+ * to 256bytes and corresponding bits are 16 to 23
+ */
+#define RX_FIFO_DEPTH_MSK_256_BYTES GENMASK(23, 16)
+#define RX_FIFO_DEPTH_MSK GENMASK(21, 16)
+#define RX_FIFO_DEPTH_SHFT 16
+
+#define HW_VER_MAJOR_MASK GENMASK(31, 28)
+#define HW_VER_MAJOR_SHFT 28
+#define HW_VER_MINOR_MASK GENMASK(27, 16)
+#define HW_VER_MINOR_SHFT 16
+#define HW_VER_STEP_MASK GENMASK(15, 0)
+
+#define GENI_SE_VERSION_MAJOR(ver) ((ver & HW_VER_MAJOR_MASK) >> HW_VER_MAJOR_SHFT)
+#define GENI_SE_VERSION_MINOR(ver) ((ver & HW_VER_MINOR_MASK) >> HW_VER_MINOR_SHFT)
+#define GENI_SE_VERSION_STEP(ver) (ver & HW_VER_STEP_MASK)
+
+/* QUP SE VERSION value for major number 2 and minor number 5 */
+#define QUP_SE_VERSION_2_5 0x20050000
+
+#endif
diff --git a/include/splash.h b/include/splash.h
index c392237..83c6fa9 100644
--- a/include/splash.h
+++ b/include/splash.h
@@ -23,6 +23,7 @@
#define _SPLASH_H_
#include <errno.h>
+#include <linux/types.h>
enum splash_storage {
SPLASH_STORAGE_NAND,
diff --git a/include/turris-omnia-mcu-interface.h b/include/turris-omnia-mcu-interface.h
new file mode 100644
index 0000000..3c4638f
--- /dev/null
+++ b/include/turris-omnia-mcu-interface.h
@@ -0,0 +1,248 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * CZ.NIC's Turris Omnia MCU I2C interface commands definitions
+ *
+ * 2023 by Marek Behún <kabel@kernel.org>
+ */
+
+#ifndef __TURRIS_OMNIA_MCU_INTERFACE_H
+#define __TURRIS_OMNIA_MCU_INTERFACE_H
+
+#include <linux/bitops.h>
+
+enum omnia_commands_e {
+ CMD_GET_STATUS_WORD = 0x01, /* slave sends status word back */
+ CMD_GENERAL_CONTROL = 0x02,
+ CMD_LED_MODE = 0x03, /* default/user */
+ CMD_LED_STATE = 0x04, /* LED on/off */
+ CMD_LED_COLOR = 0x05, /* LED number + RED + GREEN + BLUE */
+ CMD_USER_VOLTAGE = 0x06,
+ CMD_SET_BRIGHTNESS = 0x07,
+ CMD_GET_BRIGHTNESS = 0x08,
+ CMD_GET_RESET = 0x09,
+ CMD_GET_FW_VERSION_APP = 0x0A, /* 20B git hash number */
+ CMD_SET_WATCHDOG_STATE = 0x0B, /* 0 - disable
+ * 1 - enable / ping
+ * after boot watchdog is started
+ * with 2 minutes timeout
+ */
+
+ /* CMD_WATCHDOG_STATUS = 0x0C, not implemented anymore */
+
+ CMD_GET_WATCHDOG_STATE = 0x0D,
+ CMD_GET_FW_VERSION_BOOT = 0x0E, /* 20B git hash number */
+ CMD_GET_FW_CHECKSUM = 0x0F, /* 4B length, 4B checksum */
+
+ /* available if FEATURES_SUPPORTED bit set in status word */
+ CMD_GET_FEATURES = 0x10,
+
+ /* available if EXT_CMD bit set in features */
+ CMD_GET_EXT_STATUS_DWORD = 0x11,
+ CMD_EXT_CONTROL = 0x12,
+ CMD_GET_EXT_CONTROL_STATUS = 0x13,
+
+ /* available if NEW_INT_API bit set in features */
+ CMD_GET_INT_AND_CLEAR = 0x14,
+ CMD_GET_INT_MASK = 0x15,
+ CMD_SET_INT_MASK = 0x16,
+
+ /* available if FLASHING bit set in features */
+ CMD_FLASH = 0x19,
+
+ /* available if WDT_PING bit set in features */
+ CMD_SET_WDT_TIMEOUT = 0x20,
+ CMD_GET_WDT_TIMELEFT = 0x21,
+
+ /* available if POWEROFF_WAKEUP bit set in features */
+ CMD_SET_WAKEUP = 0x22,
+ CMD_GET_UPTIME_AND_WAKEUP = 0x23,
+ CMD_POWER_OFF = 0x24,
+
+ /* available if USB_OVC_PROT_SETTING bit set in features */
+ CMD_SET_USB_OVC_PROT = 0x25,
+ CMD_GET_USB_OVC_PROT = 0x26,
+
+ /* available if TRNG bit set in features */
+ CMD_TRNG_COLLECT_ENTROPY = 0x28,
+
+ /* available if CRYPTO bit set in features */
+ CMD_CRYPTO_GET_PUBLIC_KEY = 0x29,
+ CMD_CRYPTO_SIGN_MESSAGE = 0x2A,
+ CMD_CRYPTO_COLLECT_SIGNATURE = 0x2B,
+
+ /* available if BOARD_INFO it set in features */
+ CMD_BOARD_INFO_GET = 0x2C,
+ CMD_BOARD_INFO_BURN = 0x2D,
+
+ /* available only at address 0x2b (led-controller) */
+ /* available only if LED_GAMMA_CORRECTION bit set in features */
+ CMD_SET_GAMMA_CORRECTION = 0x30,
+ CMD_GET_GAMMA_CORRECTION = 0x31,
+
+ /* available only at address 0x2b (led-controller) */
+ /* available only if PER_LED_CORRECTION bit set in features */
+ /* available only if FROM_BIT_16_INVALID bit NOT set in features */
+ CMD_SET_LED_CORRECTIONS = 0x32,
+ CMD_GET_LED_CORRECTIONS = 0x33,
+};
+
+enum omnia_flashing_commands_e {
+ FLASH_CMD_UNLOCK = 0x01,
+ FLASH_CMD_SIZE_AND_CSUM = 0x02,
+ FLASH_CMD_PROGRAM = 0x03,
+ FLASH_CMD_RESET = 0x04,
+};
+
+enum omnia_sts_word_e {
+ STS_MCU_TYPE_MASK = GENMASK(1, 0),
+ STS_MCU_TYPE_STM32 = 0 << 0,
+ STS_MCU_TYPE_GD32 = 1 << 0,
+ STS_MCU_TYPE_MKL = 2 << 0,
+ STS_FEATURES_SUPPORTED = BIT(2),
+ STS_USER_REGULATOR_NOT_SUPPORTED = BIT(3),
+ STS_CARD_DET = BIT(4),
+ STS_MSATA_IND = BIT(5),
+ STS_USB30_OVC = BIT(6),
+ STS_USB31_OVC = BIT(7),
+ STS_USB30_PWRON = BIT(8),
+ STS_USB31_PWRON = BIT(9),
+ STS_ENABLE_4V5 = BIT(10),
+ STS_BUTTON_MODE = BIT(11),
+ STS_BUTTON_PRESSED = BIT(12),
+ STS_BUTTON_COUNTER_MASK = GENMASK(15, 13)
+};
+
+enum omnia_ctl_byte_e {
+ CTL_LIGHT_RST = BIT(0),
+ CTL_HARD_RST = BIT(1),
+ /* BIT(2) is currently reserved */
+ CTL_USB30_PWRON = BIT(3),
+ CTL_USB31_PWRON = BIT(4),
+ CTL_ENABLE_4V5 = BIT(5),
+ CTL_BUTTON_MODE = BIT(6),
+ CTL_BOOTLOADER = BIT(7)
+};
+
+enum omnia_features_e {
+ FEAT_PERIPH_MCU = BIT(0),
+ FEAT_EXT_CMDS = BIT(1),
+ FEAT_WDT_PING = BIT(2),
+ FEAT_LED_STATE_EXT_MASK = GENMASK(4, 3),
+ FEAT_LED_STATE_EXT = 1 << 3,
+ FEAT_LED_STATE_EXT_V32 = 2 << 3,
+ FEAT_LED_GAMMA_CORRECTION = BIT(5),
+ FEAT_NEW_INT_API = BIT(6),
+ FEAT_BOOTLOADER = BIT(7),
+ FEAT_FLASHING = BIT(8),
+ FEAT_NEW_MESSAGE_API = BIT(9),
+ FEAT_BRIGHTNESS_INT = BIT(10),
+ FEAT_POWEROFF_WAKEUP = BIT(11),
+ FEAT_CAN_OLD_MESSAGE_API = BIT(12),
+ FEAT_TRNG = BIT(13),
+ FEAT_CRYPTO = BIT(14),
+ FEAT_BOARD_INFO = BIT(15),
+
+ /*
+ * Orginally the features command replied only 16 bits. If more were
+ * read, either the I2C transaction failed or 0xff bytes were sent.
+ * Therefore to consider bits 16 - 31 valid, one bit (20) was reserved
+ * to be zero.
+ */
+
+ /* Bits 16 - 19 correspond to bits 0 - 3 of status word */
+ FEAT_MCU_TYPE_MASK = GENMASK(17, 16),
+ FEAT_MCU_TYPE_STM32 = 0 << 16,
+ FEAT_MCU_TYPE_GD32 = 1 << 16,
+ FEAT_MCU_TYPE_MKL = 2 << 16,
+ FEAT_FEATURES_SUPPORTED = BIT(18),
+ FEAT_USER_REGULATOR_NOT_SUPPORTED = BIT(19),
+
+ /* must not be set */
+ FEAT_FROM_BIT_16_INVALID = BIT(20),
+
+ FEAT_PER_LED_CORRECTION = BIT(21),
+ FEAT_USB_OVC_PROT_SETTING = BIT(22),
+};
+
+enum omnia_ext_sts_dword_e {
+ EXT_STS_SFP_nDET = BIT(0),
+ EXT_STS_LED_STATES_MASK = GENMASK(31, 12),
+ EXT_STS_WLAN0_MSATA_LED = BIT(12),
+ EXT_STS_WLAN1_LED = BIT(13),
+ EXT_STS_WLAN2_LED = BIT(14),
+ EXT_STS_WPAN0_LED = BIT(15),
+ EXT_STS_WPAN1_LED = BIT(16),
+ EXT_STS_WPAN2_LED = BIT(17),
+ EXT_STS_WAN_LED0 = BIT(18),
+ EXT_STS_WAN_LED1 = BIT(19),
+ EXT_STS_LAN0_LED0 = BIT(20),
+ EXT_STS_LAN0_LED1 = BIT(21),
+ EXT_STS_LAN1_LED0 = BIT(22),
+ EXT_STS_LAN1_LED1 = BIT(23),
+ EXT_STS_LAN2_LED0 = BIT(24),
+ EXT_STS_LAN2_LED1 = BIT(25),
+ EXT_STS_LAN3_LED0 = BIT(26),
+ EXT_STS_LAN3_LED1 = BIT(27),
+ EXT_STS_LAN4_LED0 = BIT(28),
+ EXT_STS_LAN4_LED1 = BIT(29),
+ EXT_STS_LAN5_LED0 = BIT(30),
+ EXT_STS_LAN5_LED1 = BIT(31),
+};
+
+enum omnia_ext_ctl_e {
+ EXT_CTL_nRES_MMC = BIT(0),
+ EXT_CTL_nRES_LAN = BIT(1),
+ EXT_CTL_nRES_PHY = BIT(2),
+ EXT_CTL_nPERST0 = BIT(3),
+ EXT_CTL_nPERST1 = BIT(4),
+ EXT_CTL_nPERST2 = BIT(5),
+ EXT_CTL_PHY_SFP = BIT(6),
+ EXT_CTL_PHY_SFP_AUTO = BIT(7),
+ EXT_CTL_nVHV_CTRL = BIT(8),
+};
+
+enum omnia_int_e {
+ INT_CARD_DET = BIT(0),
+ INT_MSATA_IND = BIT(1),
+ INT_USB30_OVC = BIT(2),
+ INT_USB31_OVC = BIT(3),
+ INT_BUTTON_PRESSED = BIT(4),
+ INT_SFP_nDET = BIT(5),
+ INT_BRIGHTNESS_CHANGED = BIT(6),
+ INT_TRNG = BIT(7),
+ INT_MESSAGE_SIGNED = BIT(8),
+
+ INT_LED_STATES_MASK = GENMASK(31, 12),
+ INT_WLAN0_MSATA_LED = BIT(12),
+ INT_WLAN1_LED = BIT(13),
+ INT_WLAN2_LED = BIT(14),
+ INT_WPAN0_LED = BIT(15),
+ INT_WPAN1_LED = BIT(16),
+ INT_WPAN2_LED = BIT(17),
+ INT_WAN_LED0 = BIT(18),
+ INT_WAN_LED1 = BIT(19),
+ INT_LAN0_LED0 = BIT(20),
+ INT_LAN0_LED1 = BIT(21),
+ INT_LAN1_LED0 = BIT(22),
+ INT_LAN1_LED1 = BIT(23),
+ INT_LAN2_LED0 = BIT(24),
+ INT_LAN2_LED1 = BIT(25),
+ INT_LAN3_LED0 = BIT(26),
+ INT_LAN3_LED1 = BIT(27),
+ INT_LAN4_LED0 = BIT(28),
+ INT_LAN4_LED1 = BIT(29),
+ INT_LAN5_LED0 = BIT(30),
+ INT_LAN5_LED1 = BIT(31),
+};
+
+enum omnia_cmd_poweroff_e {
+ CMD_POWER_OFF_POWERON_BUTTON = BIT(0),
+ CMD_POWER_OFF_MAGIC = 0xdead,
+};
+
+enum cmd_usb_ovc_prot_e {
+ CMD_xET_USB_OVC_PROT_PORT_MASK = GENMASK(3, 0),
+ CMD_xET_USB_OVC_PROT_ENABLE = BIT(4),
+};
+
+#endif /* __TURRIS_OMNIA_MCU_INTERFACE_H */
diff --git a/include/u-boot/sha1.h b/include/u-boot/sha1.h
index 09fee59..c1e9f67 100644
--- a/include/u-boot/sha1.h
+++ b/include/u-boot/sha1.h
@@ -14,6 +14,8 @@
#ifndef _SHA1_H
#define _SHA1_H
+#include <linux/types.h>
+
#ifdef __cplusplus
extern "C" {
#endif
diff --git a/include/u-boot/sha256.h b/include/u-boot/sha256.h
index 9aa1251..a4fe176 100644
--- a/include/u-boot/sha256.h
+++ b/include/u-boot/sha256.h
@@ -1,6 +1,8 @@
#ifndef _SHA256_H
#define _SHA256_H
+#include <linux/types.h>
+
#define SHA256_SUM_LEN 32
#define SHA256_DER_LEN 19
diff --git a/include/u-boot/sha512.h b/include/u-boot/sha512.h
index 516729d..90bd96a 100644
--- a/include/u-boot/sha512.h
+++ b/include/u-boot/sha512.h
@@ -1,6 +1,8 @@
#ifndef _SHA512_H
#define _SHA512_H
+#include <linux/types.h>
+
#define SHA384_SUM_LEN 48
#define SHA384_DER_LEN 19
#define SHA512_SUM_LEN 64
diff --git a/include/u-boot/zlib.h b/include/u-boot/zlib.h
index a33cc87..ee19f46 100644
--- a/include/u-boot/zlib.h
+++ b/include/u-boot/zlib.h
@@ -49,9 +49,6 @@
extern "C" {
#endif
-#define ZLIB_VERSION "1.2.3"
-#define ZLIB_VERNUM 0x1230
-
/* #include "zconf.h" */ /* included directly here */
/* zconf.h -- configuration of the zlib compression library
* Copyright (C) 1995-2005 Jean-loup Gailly.
@@ -484,7 +481,6 @@
#define Z_DATA_ERROR (-3)
#define Z_MEM_ERROR (-4)
#define Z_BUF_ERROR (-5)
-#define Z_VERSION_ERROR (-6)
/* Return codes for the compression/decompression functions. Negative
* values are errors, positive values are used for special but normal events.
*/
@@ -523,11 +519,11 @@
ZEXTERN int ZEXPORT deflate OF((z_streamp strm, int flush));
ZEXTERN int ZEXPORT deflateInit_ OF((z_streamp strm, int level,
- const char *version, int stream_size));
+ int stream_size));
ZEXTERN int ZEXPORT deflateEnd OF((z_streamp strm));
ZEXTERN int ZEXPORT deflateInit2_ OF((z_streamp strm, int level, int method,
int windowBits, int memLevel,
- int strategy, const char *version,
+ int strategy,
int stream_size));
ZEXTERN int ZEXPORT deflateReset OF((z_streamp strm));
ZEXTERN int ZEXPORT deflateSetDictionary OF((z_streamp strm,
@@ -553,7 +549,7 @@
ZEXTERN int ZEXPORT inflateInit_ OF((z_streamp strm,
- const char *version, int stream_size));
+ int stream_size));
ZEXTERN int ZEXPORT inflate OF((z_streamp strm, int flush));
/*
inflate decompresses as much data as possible, and stops when the input
@@ -743,11 +739,11 @@
*/
ZEXTERN int ZEXPORT inflateInit2_ OF((z_streamp strm, int windowBits,
- const char *version, int stream_size));
+ int stream_size));
#define inflateInit(strm) \
- inflateInit_((strm), ZLIB_VERSION, sizeof(z_stream))
+ inflateInit_((strm), sizeof(z_stream))
#define inflateInit2(strm, windowBits) \
- inflateInit2_((strm), (windowBits), ZLIB_VERSION, sizeof(z_stream))
+ inflateInit2_((strm), (windowBits), sizeof(z_stream))
#if !defined(ZUTIL_H) && !defined(NO_DUMMY_DECL)
struct internal_state {int dummy;}; /* hack for buggy compilers */
diff --git a/include/usb.h b/include/usb.h
index 09e3f0c..3aafdc8 100644
--- a/include/usb.h
+++ b/include/usb.h
@@ -49,6 +49,12 @@
*/
#define USB_TIMEOUT_MS(pipe) (usb_pipebulk(pipe) ? 5000 : 1000)
+/*
+ * The xhcd hcd driver prepares only a limited number interfaces / endpoints.
+ * Define this limit so that drivers do not exceed it.
+ */
+#define USB_MAX_ACTIVE_INTERFACES 2
+
/* device request (setup) */
struct devrequest {
__u8 requesttype;
diff --git a/include/virtio.h b/include/virtio.h
index 062a246..1ab0ec5 100644
--- a/include/virtio.h
+++ b/include/virtio.h
@@ -23,6 +23,7 @@
#include <virtio_types.h>
#include <linux/bitops.h>
#include <linux/bug.h>
+#include <linux/typecheck.h>
#define VIRTIO_ID_NET 1 /* virtio net */
#define VIRTIO_ID_BLOCK 2 /* virtio block */
#define VIRTIO_ID_RNG 4 /* virtio rng */
diff --git a/include/xen/events.h b/include/xen/events.h
index 82bd18b..f0a8ef3 100644
--- a/include/xen/events.h
+++ b/include/xen/events.h
@@ -15,6 +15,7 @@
#ifndef _EVENTS_H_
#define _EVENTS_H_
+#include <asm/ptrace.h>
#include <asm/xen/hypercall.h>
#include <xen/interface/event_channel.h>
diff --git a/lib/Kconfig b/lib/Kconfig
index 37ac14f..189e6eb 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -348,7 +348,7 @@
Enables function tracing within U-Boot. This allows recording of call
traces including timing information. The command can write data to
memory for exporting for analysis (e.g. using bootchart).
- See doc/README.trace for full details.
+ See doc/develop/trace.rst for full details.
config TRACE_BUFFER_SIZE
hex "Size of trace buffer in U-Boot"
@@ -416,7 +416,7 @@
config CIRCBUF
bool "Enable circular buffer support"
-source lib/dhry/Kconfig
+source "lib/dhry/Kconfig"
menu "Security support"
@@ -429,10 +429,10 @@
supported by the algorithm but only a 128-bit key is supported at
present.
-source lib/ecdsa/Kconfig
-source lib/rsa/Kconfig
-source lib/crypto/Kconfig
-source lib/crypt/Kconfig
+source "lib/ecdsa/Kconfig"
+source "lib/rsa/Kconfig"
+source "lib/crypto/Kconfig"
+source "lib/crypt/Kconfig"
config TPM
bool "Trusted Platform Module (TPM) Support"
@@ -1081,9 +1081,9 @@
help
A simple parser for SMBIOS data.
-source lib/efi/Kconfig
-source lib/efi_loader/Kconfig
-source lib/optee/Kconfig
+source "lib/efi/Kconfig"
+source "lib/efi_loader/Kconfig"
+source "lib/optee/Kconfig"
config TEST_FDTDEC
bool "enable fdtdec test"
@@ -1148,4 +1148,4 @@
endmenu
-source lib/fwu_updates/Kconfig
+source "lib/fwu_updates/Kconfig"
diff --git a/lib/charset.c b/lib/charset.c
index df4f040..182c92a 100644
--- a/lib/charset.c
+++ b/lib/charset.c
@@ -387,7 +387,7 @@
* > 0 if the first different u16 in s1 is greater than the
* corresponding u16 in s2
*/
-int u16_strncmp(const u16 *s1, const u16 *s2, size_t n)
+int __efi_runtime u16_strncmp(const u16 *s1, const u16 *s2, size_t n)
{
int ret = 0;
diff --git a/lib/crypto/x509_cert_parser.c b/lib/crypto/x509_cert_parser.c
index a0f0689..34de75a 100644
--- a/lib/crypto/x509_cert_parser.c
+++ b/lib/crypto/x509_cert_parser.c
@@ -535,7 +535,7 @@
* Decode an ASN.1 universal time or generalised time field into a struct the
* kernel can handle and check it for validity. The time is decoded thus:
*
- * [RFC5280 §4.1.2.5]
+ * [RFC5280 paragraph 74.1.2.5]
* CAs conforming to this profile MUST always encode certificate validity
* dates through the year 2049 as UTCTime; certificate validity dates in
* 2050 or later MUST be encoded as GeneralizedTime. Conforming
diff --git a/lib/efi_loader/Kconfig b/lib/efi_loader/Kconfig
index a7c3e05..430bb7f 100644
--- a/lib/efi_loader/Kconfig
+++ b/lib/efi_loader/Kconfig
@@ -44,7 +44,6 @@
config EFI_BOOTMGR
bool "UEFI Boot Manager"
default y
- select BOOTMETH_GLOBAL if BOOTSTD
help
Select this option if you want to select the UEFI binary to be booted
via UEFI variables Boot####, BootOrder, and BootNext. You should also
@@ -63,6 +62,22 @@
Select this option if you want non-volatile UEFI variables to be
stored as file /ubootefi.var on the EFI system partition.
+config EFI_RT_VOLATILE_STORE
+ bool "Allow variable runtime services in volatile storage (e.g RAM)"
+ depends on EFI_VARIABLE_FILE_STORE
+ help
+ When EFI variables are stored on file we don't allow SetVariableRT,
+ since the OS doesn't know how to write that file. At he same time
+ we copy runtime variables in DRAM and support GetVariableRT
+
+ Enable this option to allow SetVariableRT on the RAM backend of
+ the EFI variable storage. The OS will be responsible for syncing
+ the RAM contents to the file, otherwise any changes made during
+ runtime won't persist reboots.
+ Authenticated variables are not supported. Note that this will
+ violate the EFI spec since writing auth variables will return
+ EFI_INVALID_PARAMETER
+
config EFI_MM_COMM_TEE
bool "UEFI variables storage service via the trusted world"
depends on OPTEE
@@ -130,7 +145,7 @@
config EFI_VAR_SEED_FILE
string "File with initial values of non-volatile UEFI variables"
- default ubootefi.var
+ default "ubootefi.var"
help
File with initial values of non-volatile UEFI variables. The file must
be in the same format as the storage in the EFI system partition. The
diff --git a/lib/efi_loader/Makefile b/lib/efi_loader/Makefile
index fcb0af7..034e366 100644
--- a/lib/efi_loader/Makefile
+++ b/lib/efi_loader/Makefile
@@ -6,8 +6,7 @@
# This file only gets included with CONFIG_EFI_LOADER set, so all
# object inclusion implicitly depends on it
-asflags-y += -DHOST_ARCH="$(HOST_ARCH)" -I.
-ccflags-y += -DHOST_ARCH="$(HOST_ARCH)"
+asflags-y += -I.
CFLAGS_efi_boottime.o += \
-DFW_VERSION="0x$(VERSION)" \
@@ -72,11 +71,11 @@
obj-$(CONFIG_EFI_UNICODE_COLLATION_PROTOCOL2) += efi_unicode_collation.o
obj-y += efi_var_common.o
obj-y += efi_var_mem.o
-obj-y += efi_var_file.o
ifeq ($(CONFIG_EFI_MM_COMM_TEE),y)
obj-y += efi_variable_tee.o
else
obj-y += efi_variable.o
+obj-y += efi_var_file.o
obj-$(CONFIG_EFI_VARIABLES_PRESEED) += efi_var_seed.o
endif
obj-y += efi_watchdog.o
diff --git a/lib/efi_loader/efi_acpi.c b/lib/efi_loader/efi_acpi.c
index 67bbd2a..67bd7f8 100644
--- a/lib/efi_loader/efi_acpi.c
+++ b/lib/efi_loader/efi_acpi.c
@@ -41,7 +41,7 @@
}
addr = gd_acpi_start();
- printf("EFI using ACPI tables at %lx\n", addr);
+ log_debug("EFI using ACPI tables at %lx\n", addr);
/* And expose them to our EFI payload */
return efi_install_configuration_table(&acpi_guid,
diff --git a/lib/efi_loader/efi_bootmgr.c b/lib/efi_loader/efi_bootmgr.c
index 4ac5192..7da3139 100644
--- a/lib/efi_loader/efi_bootmgr.c
+++ b/lib/efi_loader/efi_bootmgr.c
@@ -613,9 +613,12 @@
void *load_option;
efi_uintn_t size;
efi_status_t ret;
+ u32 attributes;
+
+ *handle = NULL;
+ *load_options = NULL;
efi_create_indexed_name(varname, sizeof(varname), "Boot", n);
-
load_option = efi_get_var(varname, &efi_global_variable_guid, &size);
if (!load_option)
return EFI_LOAD_ERROR;
@@ -626,55 +629,54 @@
goto error;
}
- if (lo.attributes & LOAD_OPTION_ACTIVE) {
- u32 attributes;
-
- log_debug("trying to load \"%ls\" from %pD\n", lo.label,
- lo.file_path);
-
- if (EFI_DP_TYPE(lo.file_path, MEDIA_DEVICE, FILE_PATH)) {
- /* file_path doesn't contain a device path */
- ret = try_load_from_short_path(lo.file_path, handle);
- } else if (EFI_DP_TYPE(lo.file_path, MESSAGING_DEVICE, MSG_URI)) {
- if (IS_ENABLED(CONFIG_EFI_HTTP_BOOT))
- ret = try_load_from_uri_path(
- (struct efi_device_path_uri *)lo.file_path,
- lo.label, handle);
- else
- ret = EFI_LOAD_ERROR;
- } else {
- ret = try_load_from_media(lo.file_path, handle);
- }
- if (ret != EFI_SUCCESS) {
- log_warning("Loading %ls '%ls' failed\n",
- varname, lo.label);
- goto error;
- }
-
- attributes = EFI_VARIABLE_BOOTSERVICE_ACCESS |
- EFI_VARIABLE_RUNTIME_ACCESS;
- ret = efi_set_variable_int(u"BootCurrent",
- &efi_global_variable_guid,
- attributes, sizeof(n), &n, false);
- if (ret != EFI_SUCCESS)
- goto unload;
- /* try to register load file2 for initrd's */
- if (IS_ENABLED(CONFIG_EFI_LOAD_FILE2_INITRD)) {
- ret = efi_initrd_register();
- if (ret != EFI_SUCCESS)
- goto unload;
- }
-
- log_info("Booting: %ls\n", lo.label);
- } else {
+ if (!(lo.attributes & LOAD_OPTION_ACTIVE)) {
ret = EFI_LOAD_ERROR;
+ goto error;
}
- /* Set load options */
+ log_debug("trying to load \"%ls\" from %pD\n", lo.label, lo.file_path);
+
+ if (EFI_DP_TYPE(lo.file_path, MEDIA_DEVICE, FILE_PATH)) {
+ /* file_path doesn't contain a device path */
+ ret = try_load_from_short_path(lo.file_path, handle);
+ } else if (EFI_DP_TYPE(lo.file_path, MESSAGING_DEVICE, MSG_URI)) {
+ if (IS_ENABLED(CONFIG_EFI_HTTP_BOOT))
+ ret = try_load_from_uri_path(
+ (struct efi_device_path_uri *)lo.file_path,
+ lo.label, handle);
+ else
+ ret = EFI_LOAD_ERROR;
+ } else {
+ ret = try_load_from_media(lo.file_path, handle);
+ }
+ if (ret != EFI_SUCCESS) {
+ log_warning("Loading %ls '%ls' failed\n",
+ varname, lo.label);
+ goto error;
+ }
+
+ attributes = EFI_VARIABLE_BOOTSERVICE_ACCESS |
+ EFI_VARIABLE_RUNTIME_ACCESS;
+ ret = efi_set_variable_int(u"BootCurrent", &efi_global_variable_guid,
+ attributes, sizeof(n), &n, false);
+ if (ret != EFI_SUCCESS)
+ goto error;
+
+ /* try to register load file2 for initrd's */
+ if (IS_ENABLED(CONFIG_EFI_LOAD_FILE2_INITRD)) {
+ ret = efi_initrd_register();
+ if (ret != EFI_SUCCESS)
+ goto error;
+ }
+
+ log_info("Booting: %ls\n", lo.label);
+
+ /* Ignore the optional data in auto-generated boot options */
if (size >= sizeof(efi_guid_t) &&
!guidcmp(lo.optional_data, &efi_guid_bootmenu_auto_generated))
size = 0;
+ /* Set optional data in loaded file protocol */
if (size) {
*load_options = malloc(size);
if (!*load_options) {
@@ -683,18 +685,15 @@
}
memcpy(*load_options, lo.optional_data, size);
ret = efi_set_load_options(*handle, size, *load_options);
- } else {
- *load_options = NULL;
+ if (ret != EFI_SUCCESS)
+ free(load_options);
}
error:
- free(load_option);
-
- return ret;
-
-unload:
- if (EFI_CALL(efi_unload_image(*handle)) != EFI_SUCCESS)
+ if (ret != EFI_SUCCESS && *handle &&
+ EFI_CALL(efi_unload_image(*handle)) != EFI_SUCCESS)
log_err("Unloading image failed\n");
+
free(load_option);
return ret;
@@ -1210,15 +1209,21 @@
return CMD_RET_FAILURE;
}
- ret = efi_install_fdt(fdt);
- if (ret != EFI_SUCCESS)
- return ret;
-
ret = efi_bootmgr_load(&handle, &load_options);
if (ret != EFI_SUCCESS) {
log_notice("EFI boot manager: Cannot load any image\n");
return ret;
}
+ ret = efi_install_fdt(fdt);
+ if (ret != EFI_SUCCESS) {
+ if (EFI_CALL(efi_unload_image(handle)) == EFI_SUCCESS)
+ free(load_options);
+ else
+ log_err("Unloading image failed\n");
+
+ return ret;
+ }
+
return do_bootefi_exec(handle, load_options);
}
diff --git a/lib/efi_loader/efi_device_path.c b/lib/efi_loader/efi_device_path.c
index 46aa59b..aec224d 100644
--- a/lib/efi_loader/efi_device_path.c
+++ b/lib/efi_loader/efi_device_path.c
@@ -102,7 +102,7 @@
* See UEFI spec, section 3.1.2 for "short-form device path".
*
* @dp: original device-path
- * @Return: shortened device-path or NULL
+ * Return: shortened device-path or NULL
*/
struct efi_device_path *efi_dp_shorten(struct efi_device_path *dp)
{
diff --git a/lib/efi_loader/efi_helper.c b/lib/efi_loader/efi_helper.c
index 58761fa..73d0279 100644
--- a/lib/efi_loader/efi_helper.c
+++ b/lib/efi_loader/efi_helper.c
@@ -72,7 +72,7 @@
*
* Return: device path or NULL. Caller must free the returned value
*/
-struct efi_device_path *efi_get_dp_from_boot(const efi_guid_t guid)
+struct efi_device_path *efi_get_dp_from_boot(const efi_guid_t *guid)
{
struct efi_load_option lo;
void *var_value;
@@ -92,7 +92,7 @@
if (ret != EFI_SUCCESS)
goto err;
- return efi_dp_from_lo(&lo, &guid);
+ return efi_dp_from_lo(&lo, guid);
err:
free(var_value);
@@ -544,16 +544,9 @@
}
}
- efi_restore_gd();
-
out:
free(load_options);
- if (IS_ENABLED(CONFIG_EFI_LOAD_FILE2_INITRD)) {
- if (efi_initrd_deregister() != EFI_SUCCESS)
- log_err("Failed to remove loadfile2 for initrd\n");
- }
-
/* Notify EFI_EVENT_GROUP_RETURN_TO_EFIBOOTMGR event group. */
list_for_each_entry(evt, &efi_events, link) {
if (evt->group &&
diff --git a/lib/efi_loader/efi_load_initrd.c b/lib/efi_loader/efi_load_initrd.c
index 2b467b5..d911354 100644
--- a/lib/efi_loader/efi_load_initrd.c
+++ b/lib/efi_loader/efi_load_initrd.c
@@ -63,7 +63,7 @@
* We can then use this specific return value and not install the
* protocol, while allowing the boot to continue
*/
- dp = efi_get_dp_from_boot(efi_lf2_initrd_guid);
+ dp = efi_get_dp_from_boot(&efi_lf2_initrd_guid);
if (!dp)
return EFI_INVALID_PARAMETER;
@@ -184,41 +184,6 @@
}
/**
- * efi_initrd_register() - create handle for loading initial RAM disk
- *
- * This function creates a new handle and installs a Linux specific vendor
- * device path and an EFI_LOAD_FILE2_PROTOCOL. Linux uses the device path
- * to identify the handle and then calls the LoadFile service of the
- * EFI_LOAD_FILE2_PROTOCOL to read the initial RAM disk.
- *
- * Return: status code
- */
-efi_status_t efi_initrd_register(void)
-{
- efi_status_t ret;
-
- /*
- * Allow the user to continue if Boot#### file path is not set for
- * an initrd
- */
- ret = check_initrd();
- if (ret == EFI_INVALID_PARAMETER)
- return EFI_SUCCESS;
- if (ret != EFI_SUCCESS)
- return ret;
-
- ret = efi_install_multiple_protocol_interfaces(&efi_initrd_handle,
- /* initramfs */
- &efi_guid_device_path, &dp_lf2_handle,
- /* LOAD_FILE2 */
- &efi_guid_load_file2_protocol,
- &efi_lf2_protocol,
- NULL);
-
- return ret;
-}
-
-/**
* efi_initrd_deregister() - delete the handle for loading initial RAM disk
*
* This will delete the handle containing the Linux specific vendor device
@@ -245,3 +210,66 @@
return ret;
}
+
+/**
+ * efi_initrd_return_notify() - return to efibootmgr callback
+ *
+ * @event: the event for which this notification function is registered
+ * @context: event context
+ */
+static void EFIAPI efi_initrd_return_notify(struct efi_event *event,
+ void *context)
+{
+ efi_status_t ret;
+
+ EFI_ENTRY("%p, %p", event, context);
+ ret = efi_initrd_deregister();
+ EFI_EXIT(ret);
+}
+
+/**
+ * efi_initrd_register() - create handle for loading initial RAM disk
+ *
+ * This function creates a new handle and installs a Linux specific vendor
+ * device path and an EFI_LOAD_FILE2_PROTOCOL. Linux uses the device path
+ * to identify the handle and then calls the LoadFile service of the
+ * EFI_LOAD_FILE2_PROTOCOL to read the initial RAM disk.
+ *
+ * Return: status code
+ */
+efi_status_t efi_initrd_register(void)
+{
+ efi_status_t ret;
+ struct efi_event *event;
+
+ /*
+ * Allow the user to continue if Boot#### file path is not set for
+ * an initrd
+ */
+ ret = check_initrd();
+ if (ret == EFI_INVALID_PARAMETER)
+ return EFI_SUCCESS;
+ if (ret != EFI_SUCCESS)
+ return ret;
+
+ ret = efi_install_multiple_protocol_interfaces(&efi_initrd_handle,
+ /* initramfs */
+ &efi_guid_device_path, &dp_lf2_handle,
+ /* LOAD_FILE2 */
+ &efi_guid_load_file2_protocol,
+ &efi_lf2_protocol,
+ NULL);
+ if (ret != EFI_SUCCESS) {
+ log_err("installing EFI_LOAD_FILE2_PROTOCOL failed\n");
+ return ret;
+ }
+
+ ret = efi_create_event(EVT_NOTIFY_SIGNAL, TPL_CALLBACK,
+ efi_initrd_return_notify, NULL,
+ &efi_guid_event_group_return_to_efibootmgr,
+ &event);
+ if (ret != EFI_SUCCESS)
+ log_err("Creating event failed\n");
+
+ return ret;
+}
diff --git a/lib/efi_loader/efi_memory.c b/lib/efi_loader/efi_memory.c
index edfad2d..12cf23f 100644
--- a/lib/efi_loader/efi_memory.c
+++ b/lib/efi_loader/efi_memory.c
@@ -15,6 +15,7 @@
#include <watchdog.h>
#include <asm/cache.h>
#include <asm/global_data.h>
+#include <asm/sections.h>
#include <linux/list_sort.h>
#include <linux/sizes.h>
@@ -933,8 +934,8 @@
* Add Runtime Services. We mark surrounding boottime code as runtime as
* well to fulfill the runtime alignment constraints but avoid padding.
*/
- runtime_start = (ulong)&__efi_runtime_start & ~runtime_mask;
- runtime_end = (ulong)&__efi_runtime_stop;
+ runtime_start = (uintptr_t)__efi_runtime_start & ~runtime_mask;
+ runtime_end = (uintptr_t)__efi_runtime_stop;
runtime_end = (runtime_end + runtime_mask) & ~runtime_mask;
runtime_pages = (runtime_end - runtime_start) >> EFI_PAGE_SHIFT;
efi_add_memory_map_pg(runtime_start, runtime_pages,
diff --git a/lib/efi_loader/efi_runtime.c b/lib/efi_loader/efi_runtime.c
index 9185f18..011bcd0 100644
--- a/lib/efi_loader/efi_runtime.c
+++ b/lib/efi_loader/efi_runtime.c
@@ -10,6 +10,7 @@
#include <dm.h>
#include <elf.h>
#include <efi_loader.h>
+#include <efi_variable.h>
#include <log.h>
#include <malloc.h>
#include <rtc.h>
@@ -110,6 +111,7 @@
*/
efi_status_t efi_init_runtime_supported(void)
{
+ const efi_guid_t efi_guid_efi_rt_var_file = U_BOOT_EFI_RT_VAR_FILE_GUID;
efi_status_t ret;
struct efi_rt_properties_table *rt_table;
@@ -127,6 +129,50 @@
EFI_RT_SUPPORTED_SET_VIRTUAL_ADDRESS_MAP |
EFI_RT_SUPPORTED_CONVERT_POINTER;
+ if (IS_ENABLED(CONFIG_EFI_VARIABLE_FILE_STORE))
+ rt_table->runtime_services_supported |=
+ EFI_RT_SUPPORTED_QUERY_VARIABLE_INFO;
+
+ if (IS_ENABLED(CONFIG_EFI_RT_VOLATILE_STORE)) {
+ u8 s = 0;
+
+ ret = efi_set_variable_int(u"RTStorageVolatile",
+ &efi_guid_efi_rt_var_file,
+ EFI_VARIABLE_BOOTSERVICE_ACCESS |
+ EFI_VARIABLE_RUNTIME_ACCESS |
+ EFI_VARIABLE_READ_ONLY,
+ sizeof(EFI_VAR_FILE_NAME),
+ EFI_VAR_FILE_NAME, false);
+ if (ret != EFI_SUCCESS) {
+ log_err("Failed to set RTStorageVolatile\n");
+ return ret;
+ }
+ /*
+ * This variable needs to be visible so users can read it,
+ * but the real contents are going to be filled during
+ * GetVariable
+ */
+ ret = efi_set_variable_int(u"VarToFile",
+ &efi_guid_efi_rt_var_file,
+ EFI_VARIABLE_BOOTSERVICE_ACCESS |
+ EFI_VARIABLE_RUNTIME_ACCESS |
+ EFI_VARIABLE_READ_ONLY,
+ sizeof(s),
+ &s, false);
+ if (ret != EFI_SUCCESS) {
+ log_err("Failed to set VarToFile\n");
+ efi_set_variable_int(u"RTStorageVolatile",
+ &efi_guid_efi_rt_var_file,
+ EFI_VARIABLE_BOOTSERVICE_ACCESS |
+ EFI_VARIABLE_RUNTIME_ACCESS |
+ EFI_VARIABLE_READ_ONLY,
+ 0, NULL, false);
+
+ return ret;
+ }
+ rt_table->runtime_services_supported |= EFI_RT_SUPPORTED_SET_VARIABLE;
+ }
+
/*
* This value must be synced with efi_runtime_detach_list
* as well as efi_runtime_services.
@@ -669,14 +715,14 @@
void efi_runtime_relocate(ulong offset, struct efi_mem_desc *map)
{
#ifdef IS_RELA
- struct elf_rela *rel = (void*)&__efi_runtime_rel_start;
+ struct elf_rela *rel = (void *)__efi_runtime_rel_start;
#else
- struct elf_rel *rel = (void*)&__efi_runtime_rel_start;
+ struct elf_rel *rel = (void *)__efi_runtime_rel_start;
static ulong lastoff = CONFIG_TEXT_BASE;
#endif
debug("%s: Relocating to offset=%lx\n", __func__, offset);
- for (; (ulong)rel < (ulong)&__efi_runtime_rel_stop; rel++) {
+ for (; (uintptr_t)rel < (uintptr_t)__efi_runtime_rel_stop; rel++) {
ulong base = CONFIG_TEXT_BASE;
ulong *p;
ulong newaddr;
diff --git a/lib/efi_loader/efi_var_common.c b/lib/efi_loader/efi_var_common.c
index d528747..ea8d2a4 100644
--- a/lib/efi_loader/efi_var_common.c
+++ b/lib/efi_loader/efi_var_common.c
@@ -1,4 +1,3 @@
-// SPDX-License-Identifier: GPL-2.0+
/*
* UEFI runtime variable services
*
@@ -9,6 +8,7 @@
#include <efi_loader.h>
#include <efi_variable.h>
#include <stdlib.h>
+#include <u-boot/crc.h>
enum efi_secure_mode {
EFI_MODE_SETUP,
@@ -99,7 +99,7 @@
data_size, data);
/* Make sure that the EFI_VARIABLE_READ_ONLY flag is not set */
- if (attributes & ~(u32)EFI_VARIABLE_MASK)
+ if (attributes & ~EFI_VARIABLE_MASK)
ret = EFI_INVALID_PARAMETER;
else
ret = efi_set_variable_int(variable_name, vendor, attributes,
@@ -162,11 +162,6 @@
EFI_ENTRY("%x %p %p %p", attributes, maximum_variable_storage_size,
remaining_variable_storage_size, maximum_variable_size);
- if (!maximum_variable_storage_size ||
- !remaining_variable_storage_size ||
- !maximum_variable_size)
- return EFI_EXIT(EFI_INVALID_PARAMETER);
-
ret = efi_query_variable_info_int(attributes,
maximum_variable_storage_size,
remaining_variable_storage_size,
@@ -181,7 +176,8 @@
{
efi_status_t ret;
- ret = efi_get_variable_mem(variable_name, guid, attributes, data_size, data, NULL);
+ ret = efi_get_variable_mem(variable_name, guid, attributes, data_size,
+ data, NULL, EFI_VARIABLE_RUNTIME_ACCESS);
/* Remove EFI_VARIABLE_READ_ONLY flag */
if (attributes)
@@ -194,7 +190,8 @@
efi_get_next_variable_name_runtime(efi_uintn_t *variable_name_size,
u16 *variable_name, efi_guid_t *guid)
{
- return efi_get_next_variable_name_mem(variable_name_size, variable_name, guid);
+ return efi_get_next_variable_name_mem(variable_name_size, variable_name,
+ guid, EFI_VARIABLE_RUNTIME_ACCESS);
}
/**
@@ -416,3 +413,76 @@
return buf;
}
+
+/**
+ * efi_var_collect() - Copy EFI variables matching attributes mask
+ *
+ * @bufp: buffer containing variable collection
+ * @lenp: buffer length
+ * @attr_mask: mask of matched attributes
+ *
+ * Return: Status code
+ */
+efi_status_t __maybe_unused efi_var_collect(struct efi_var_file **bufp, loff_t *lenp,
+ u32 check_attr_mask)
+{
+ size_t len = EFI_VAR_BUF_SIZE;
+ struct efi_var_file *buf;
+ struct efi_var_entry *var, *old_var;
+ size_t old_var_name_length = 2;
+
+ *bufp = NULL; /* Avoid double free() */
+ buf = calloc(1, len);
+ if (!buf)
+ return EFI_OUT_OF_RESOURCES;
+ var = buf->var;
+ old_var = var;
+ for (;;) {
+ efi_uintn_t data_length, var_name_length;
+ u8 *data;
+ efi_status_t ret;
+
+ if ((uintptr_t)buf + len <=
+ (uintptr_t)var->name + old_var_name_length)
+ return EFI_BUFFER_TOO_SMALL;
+
+ var_name_length = (uintptr_t)buf + len - (uintptr_t)var->name;
+ memcpy(var->name, old_var->name, old_var_name_length);
+ guidcpy(&var->guid, &old_var->guid);
+ ret = efi_get_next_variable_name_int(
+ &var_name_length, var->name, &var->guid);
+ if (ret == EFI_NOT_FOUND)
+ break;
+ if (ret != EFI_SUCCESS) {
+ free(buf);
+ return ret;
+ }
+ old_var_name_length = var_name_length;
+ old_var = var;
+
+ data = (u8 *)var->name + old_var_name_length;
+ data_length = (uintptr_t)buf + len - (uintptr_t)data;
+ ret = efi_get_variable_int(var->name, &var->guid,
+ &var->attr, &data_length, data,
+ &var->time);
+ if (ret != EFI_SUCCESS) {
+ free(buf);
+ return ret;
+ }
+ if ((var->attr & check_attr_mask) == check_attr_mask) {
+ var->length = data_length;
+ var = (struct efi_var_entry *)ALIGN((uintptr_t)data + data_length, 8);
+ }
+ }
+
+ buf->reserved = 0;
+ buf->magic = EFI_VAR_FILE_MAGIC;
+ len = (uintptr_t)var - (uintptr_t)buf;
+ buf->crc32 = crc32(0, (u8 *)buf->var,
+ len - sizeof(struct efi_var_file));
+ buf->length = len;
+ *bufp = buf;
+ *lenp = len;
+
+ return EFI_SUCCESS;
+}
diff --git a/lib/efi_loader/efi_var_file.c b/lib/efi_loader/efi_var_file.c
index 532b6b4..413e179 100644
--- a/lib/efi_loader/efi_var_file.c
+++ b/lib/efi_loader/efi_var_file.c
@@ -52,70 +52,6 @@
return EFI_SUCCESS;
}
-efi_status_t __maybe_unused efi_var_collect(struct efi_var_file **bufp, loff_t *lenp,
- u32 check_attr_mask)
-{
- size_t len = EFI_VAR_BUF_SIZE;
- struct efi_var_file *buf;
- struct efi_var_entry *var, *old_var;
- size_t old_var_name_length = 2;
-
- *bufp = NULL; /* Avoid double free() */
- buf = calloc(1, len);
- if (!buf)
- return EFI_OUT_OF_RESOURCES;
- var = buf->var;
- old_var = var;
- for (;;) {
- efi_uintn_t data_length, var_name_length;
- u8 *data;
- efi_status_t ret;
-
- if ((uintptr_t)buf + len <=
- (uintptr_t)var->name + old_var_name_length)
- return EFI_BUFFER_TOO_SMALL;
-
- var_name_length = (uintptr_t)buf + len - (uintptr_t)var->name;
- memcpy(var->name, old_var->name, old_var_name_length);
- guidcpy(&var->guid, &old_var->guid);
- ret = efi_get_next_variable_name_int(
- &var_name_length, var->name, &var->guid);
- if (ret == EFI_NOT_FOUND)
- break;
- if (ret != EFI_SUCCESS) {
- free(buf);
- return ret;
- }
- old_var_name_length = var_name_length;
- old_var = var;
-
- data = (u8 *)var->name + old_var_name_length;
- data_length = (uintptr_t)buf + len - (uintptr_t)data;
- ret = efi_get_variable_int(var->name, &var->guid,
- &var->attr, &data_length, data,
- &var->time);
- if (ret != EFI_SUCCESS) {
- free(buf);
- return ret;
- }
- if ((var->attr & check_attr_mask) == check_attr_mask) {
- var->length = data_length;
- var = (struct efi_var_entry *)ALIGN((uintptr_t)data + data_length, 8);
- }
- }
-
- buf->reserved = 0;
- buf->magic = EFI_VAR_FILE_MAGIC;
- len = (uintptr_t)var - (uintptr_t)buf;
- buf->crc32 = crc32(0, (u8 *)buf->var,
- len - sizeof(struct efi_var_file));
- buf->length = len;
- *bufp = buf;
- *lenp = len;
-
- return EFI_SUCCESS;
-}
-
/**
* efi_var_to_file() - save non-volatile variables as file
*
diff --git a/lib/efi_loader/efi_var_mem.c b/lib/efi_loader/efi_var_mem.c
index 6c21cec..139e16a 100644
--- a/lib/efi_loader/efi_var_mem.c
+++ b/lib/efi_loader/efi_var_mem.c
@@ -61,6 +61,23 @@
return match;
}
+/**
+ * efi_var_entry_len() - Get the entry len including headers & name
+ *
+ * @var: pointer to variable start
+ *
+ * Return: 8-byte aligned variable entry length
+ */
+
+u32 __efi_runtime efi_var_entry_len(struct efi_var_entry *var)
+{
+ if (!var)
+ return 0;
+
+ return ALIGN((sizeof(u16) * (u16_strlen(var->name) + 1)) +
+ var->length + sizeof(*var), 8);
+}
+
struct efi_var_entry __efi_runtime
*efi_var_mem_find(const efi_guid_t *guid, const u16 *name,
struct efi_var_entry **next)
@@ -185,53 +202,6 @@
}
/**
- * efi_var_mem_bs_del() - delete boot service only variables
- */
-static void efi_var_mem_bs_del(void)
-{
- struct efi_var_entry *var = efi_var_buf->var;
-
- for (;;) {
- struct efi_var_entry *last;
-
- last = (struct efi_var_entry *)
- ((uintptr_t)efi_var_buf + efi_var_buf->length);
- if (var >= last)
- break;
- if (var->attr & EFI_VARIABLE_RUNTIME_ACCESS) {
- u16 *data;
-
- /* skip variable */
- for (data = var->name; *data; ++data)
- ;
- ++data;
- var = (struct efi_var_entry *)
- ALIGN((uintptr_t)data + var->length, 8);
- } else {
- /* delete variable */
- efi_var_mem_del(var);
- }
- }
-}
-
-/**
- * efi_var_mem_notify_exit_boot_services() - ExitBootService callback
- *
- * @event: callback event
- * @context: callback context
- */
-static void EFIAPI
-efi_var_mem_notify_exit_boot_services(struct efi_event *event, void *context)
-{
- EFI_ENTRY("%p, %p", event, context);
-
- /* Delete boot service only variables */
- efi_var_mem_bs_del();
-
- EFI_EXIT(EFI_SUCCESS);
-}
-
-/**
* efi_var_mem_notify_exit_boot_services() - SetVirtualMemoryMap callback
*
* @event: callback event
@@ -261,13 +231,7 @@
efi_var_buf->magic = EFI_VAR_FILE_MAGIC;
efi_var_buf->length = (uintptr_t)efi_var_buf->var -
(uintptr_t)efi_var_buf;
- /* crc32 for 0 bytes = 0 */
- ret = efi_create_event(EVT_SIGNAL_EXIT_BOOT_SERVICES, TPL_CALLBACK,
- efi_var_mem_notify_exit_boot_services, NULL,
- NULL, &event);
- if (ret != EFI_SUCCESS)
- return ret;
ret = efi_create_event(EVT_SIGNAL_VIRTUAL_ADDRESS_CHANGE, TPL_CALLBACK,
efi_var_mem_notify_virtual_address_map, NULL,
NULL, &event);
@@ -276,10 +240,71 @@
return ret;
}
+/**
+ * efi_var_collect_mem() - Copy EFI variables matching attributes mask from
+ * efi_var_buf
+ *
+ * @buf: buffer containing variable collection
+ * @lenp: buffer length
+ * @mask: mask of matched attributes
+ *
+ * Return: Status code
+ */
+efi_status_t __efi_runtime
+efi_var_collect_mem(struct efi_var_file *buf, efi_uintn_t *lenp, u32 mask)
+{
+ static struct efi_var_file __efi_runtime_data hdr = {
+ .magic = EFI_VAR_FILE_MAGIC,
+ };
+ struct efi_var_entry *last, *var, *var_to;
+
+ hdr.length = sizeof(struct efi_var_file);
+
+ var = efi_var_buf->var;
+ last = (struct efi_var_entry *)
+ ((uintptr_t)efi_var_buf + efi_var_buf->length);
+ if (buf)
+ var_to = buf->var;
+
+ while (var < last) {
+ u32 len = efi_var_entry_len(var);
+
+ if ((var->attr & mask) != mask) {
+ var = (void *)((uintptr_t)var + len);
+ continue;
+ }
+
+ hdr.length += len;
+
+ if (buf && hdr.length <= *lenp) {
+ efi_memcpy_runtime(var_to, var, len);
+ var_to = (void *)var_to + len;
+ }
+ var = (void *)var + len;
+ }
+
+ if (!buf && hdr.length <= *lenp) {
+ *lenp = hdr.length;
+ return EFI_INVALID_PARAMETER;
+ }
+
+ if (!buf || hdr.length > *lenp) {
+ *lenp = hdr.length;
+ return EFI_BUFFER_TOO_SMALL;
+ }
+ hdr.crc32 = crc32(0, (u8 *)buf->var,
+ hdr.length - sizeof(struct efi_var_file));
+
+ efi_memcpy_runtime(buf, &hdr, sizeof(hdr));
+ *lenp = hdr.length;
+
+ return EFI_SUCCESS;
+}
+
efi_status_t __efi_runtime
efi_get_variable_mem(const u16 *variable_name, const efi_guid_t *vendor,
u32 *attributes, efi_uintn_t *data_size, void *data,
- u64 *timep)
+ u64 *timep, u32 mask)
{
efi_uintn_t old_size;
struct efi_var_entry *var;
@@ -291,11 +316,22 @@
if (!var)
return EFI_NOT_FOUND;
+ /*
+ * This function is used at runtime to dump EFI variables.
+ * The memory backend we keep around has BS-only variables as
+ * well. At runtime we filter them here
+ */
+ if (mask && !((var->attr & mask) == mask))
+ return EFI_NOT_FOUND;
+
if (attributes)
*attributes = var->attr;
if (timep)
*timep = var->time;
+ if (!u16_strcmp(variable_name, u"VarToFile"))
+ return efi_var_collect_mem(data, data_size, EFI_VARIABLE_NON_VOLATILE);
+
old_size = *data_size;
*data_size = var->length;
if (old_size < var->length)
@@ -315,7 +351,8 @@
efi_status_t __efi_runtime
efi_get_next_variable_name_mem(efi_uintn_t *variable_name_size,
- u16 *variable_name, efi_guid_t *vendor)
+ u16 *variable_name, efi_guid_t *vendor,
+ u32 mask)
{
struct efi_var_entry *var;
efi_uintn_t len, old_size;
@@ -324,6 +361,7 @@
if (!variable_name_size || !variable_name || !vendor)
return EFI_INVALID_PARAMETER;
+skip:
len = *variable_name_size >> 1;
if (u16_strnlen(variable_name, len) == len)
return EFI_INVALID_PARAMETER;
@@ -347,6 +385,11 @@
efi_memcpy_runtime(variable_name, var->name, *variable_name_size);
efi_memcpy_runtime(vendor, &var->guid, sizeof(efi_guid_t));
+ if (mask && !((var->attr & mask) == mask)) {
+ *variable_name_size = old_size;
+ goto skip;
+ }
+
return EFI_SUCCESS;
}
diff --git a/lib/efi_loader/efi_variable.c b/lib/efi_loader/efi_variable.c
index 40f7a0f..1cc02ac 100644
--- a/lib/efi_loader/efi_variable.c
+++ b/lib/efi_loader/efi_variable.c
@@ -163,6 +163,7 @@
break;
default:
/* TODO: support private authenticated variables */
+ ret = EFI_UNSUPPORTED;
goto err;
}
@@ -208,35 +209,44 @@
u32 *attributes, efi_uintn_t *data_size, void *data,
u64 *timep)
{
- return efi_get_variable_mem(variable_name, vendor, attributes, data_size, data, timep);
+ return efi_get_variable_mem(variable_name, vendor, attributes, data_size,
+ data, timep, 0);
}
efi_status_t __efi_runtime
efi_get_next_variable_name_int(efi_uintn_t *variable_name_size,
u16 *variable_name, efi_guid_t *vendor)
{
- return efi_get_next_variable_name_mem(variable_name_size, variable_name, vendor);
+ return efi_get_next_variable_name_mem(variable_name_size, variable_name,
+ vendor, 0);
}
-efi_status_t efi_set_variable_int(const u16 *variable_name,
- const efi_guid_t *vendor,
- u32 attributes, efi_uintn_t data_size,
- const void *data, bool ro_check)
+/**
+ * setvariable_allowed() - checks defined by the UEFI spec for setvariable
+ *
+ * @variable_name: name of the variable
+ * @vendor: vendor GUID
+ * @attributes: attributes of the variable
+ * @data_size: size of the buffer with the variable value
+ * @data: buffer with the variable value
+ * Return: status code
+ */
+static efi_status_t __efi_runtime
+setvariable_allowed(const u16 *variable_name, const efi_guid_t *vendor,
+ u32 attributes, efi_uintn_t data_size, const void *data)
{
- struct efi_var_entry *var;
- efi_uintn_t ret;
- bool append, delete;
- u64 time = 0;
- enum efi_auth_var_type var_type;
-
if (!variable_name || !*variable_name || !vendor)
return EFI_INVALID_PARAMETER;
if (data_size && !data)
return EFI_INVALID_PARAMETER;
- /* EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS is deprecated */
- if (attributes & EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS)
+ /*
+ * EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS is deprecated.
+ * We don't support EFI_VARIABLE_ENHANCED_AUTHENTICATED_ACCESS.
+ */
+ if (attributes & (EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS | \
+ EFI_VARIABLE_ENHANCED_AUTHENTICATED_ACCESS))
return EFI_UNSUPPORTED;
/* Make sure if runtime bit is set, boot service bit is set also */
@@ -256,10 +266,29 @@
!(attributes & EFI_VARIABLE_BOOTSERVICE_ACCESS)))
return EFI_INVALID_PARAMETER;
+ return EFI_SUCCESS;
+}
+
+efi_status_t efi_set_variable_int(const u16 *variable_name,
+ const efi_guid_t *vendor,
+ u32 attributes, efi_uintn_t data_size,
+ const void *data, bool ro_check)
+{
+ struct efi_var_entry *var;
+ efi_uintn_t ret;
+ bool append, delete;
+ u64 time = 0;
+ enum efi_auth_var_type var_type;
+
+ ret = setvariable_allowed(variable_name, vendor, attributes, data_size,
+ data);
+ if (ret != EFI_SUCCESS)
+ return ret;
+
/* check if a variable exists */
var = efi_var_mem_find(vendor, variable_name, NULL);
append = !!(attributes & EFI_VARIABLE_APPEND_WRITE);
- attributes &= ~(u32)EFI_VARIABLE_APPEND_WRITE;
+ attributes &= ~EFI_VARIABLE_APPEND_WRITE;
delete = !append && (!data_size || !attributes);
/* check attributes */
@@ -276,17 +305,27 @@
/* attributes won't be changed */
if (!delete &&
((ro_check && var->attr != attributes) ||
- (!ro_check && ((var->attr & ~(u32)EFI_VARIABLE_READ_ONLY)
- != (attributes & ~(u32)EFI_VARIABLE_READ_ONLY))))) {
+ (!ro_check && ((var->attr & ~EFI_VARIABLE_READ_ONLY)
+ != (attributes & ~EFI_VARIABLE_READ_ONLY))))) {
return EFI_INVALID_PARAMETER;
}
time = var->time;
} else {
- if (delete || append)
- /*
- * Trying to delete or to update a non-existent
- * variable.
- */
+ /*
+ * UEFI specification does not clearly describe the expected
+ * behavior of append write with data size 0, we follow
+ * the EDK II reference implementation.
+ */
+ if (append && !data_size)
+ return EFI_SUCCESS;
+
+ /*
+ * EFI_VARIABLE_APPEND_WRITE to non-existent variable is accepted
+ * and new variable is created in EDK II reference implementation.
+ * We follow it and only check the deletion here.
+ */
+ if (delete)
+ /* Trying to delete a non-existent variable. */
return EFI_NOT_FOUND;
}
@@ -329,7 +368,11 @@
/* EFI_NOT_FOUND has been handled before */
attributes = var->attr;
ret = EFI_SUCCESS;
- } else if (append) {
+ } else if (append && var) {
+ /*
+ * data is appended if EFI_VARIABLE_APPEND_WRITE is set and
+ * variable exists.
+ */
u16 *old_data = var->name;
for (; *old_data; ++old_data)
@@ -342,11 +385,12 @@
ret = efi_var_mem_ins(variable_name, vendor, attributes,
data_size, data, 0, NULL, time);
}
- efi_var_mem_del(var);
if (ret != EFI_SUCCESS)
return ret;
+ efi_var_mem_del(var);
+
if (var_type == EFI_AUTH_VAR_PK)
ret = efi_init_secure_state();
else
@@ -362,12 +406,15 @@
return EFI_SUCCESS;
}
-efi_status_t efi_query_variable_info_int(u32 attributes,
- u64 *maximum_variable_storage_size,
- u64 *remaining_variable_storage_size,
- u64 *maximum_variable_size)
+efi_status_t __efi_runtime
+efi_query_variable_info_int(u32 attributes,
+ u64 *maximum_variable_storage_size,
+ u64 *remaining_variable_storage_size,
+ u64 *maximum_variable_size)
{
- if (attributes == 0)
+ if (!maximum_variable_storage_size ||
+ !remaining_variable_storage_size ||
+ !maximum_variable_size || !attributes)
return EFI_INVALID_PARAMETER;
/* EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS is deprecated */
@@ -384,7 +431,7 @@
EFI_VARIABLE_RUNTIME_ACCESS)
return EFI_INVALID_PARAMETER;
- if (attributes & ~(u32)EFI_VARIABLE_MASK)
+ if (attributes & ~EFI_VARIABLE_MASK)
return EFI_INVALID_PARAMETER;
*maximum_variable_storage_size = EFI_VAR_BUF_SIZE -
@@ -416,7 +463,17 @@
u64 *remaining_variable_storage_size,
u64 *maximum_variable_size)
{
- return EFI_UNSUPPORTED;
+ if (!(attributes & EFI_VARIABLE_RUNTIME_ACCESS))
+ return EFI_INVALID_PARAMETER;
+ if ((attributes & (EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS |
+ EFI_VARIABLE_TIME_BASED_AUTHENTICATED_WRITE_ACCESS |
+ EFI_VARIABLE_ENHANCED_AUTHENTICATED_ACCESS)))
+ return EFI_UNSUPPORTED;
+
+ return efi_query_variable_info_int(attributes,
+ maximum_variable_storage_size,
+ remaining_variable_storage_size,
+ maximum_variable_size);
}
/**
@@ -434,7 +491,79 @@
u32 attributes, efi_uintn_t data_size,
const void *data)
{
- return EFI_UNSUPPORTED;
+ struct efi_var_entry *var;
+ efi_uintn_t ret;
+ bool append, delete;
+ u64 time = 0;
+
+ if (!IS_ENABLED(CONFIG_EFI_RT_VOLATILE_STORE))
+ return EFI_UNSUPPORTED;
+
+ /*
+ * Authenticated variables are not supported. The EFI spec
+ * in §32.3.6 requires keys to be stored in non-volatile storage which
+ * is tamper and delete resistant.
+ * The rest of the checks are in setvariable_allowed()
+ */
+ if (attributes & EFI_VARIABLE_TIME_BASED_AUTHENTICATED_WRITE_ACCESS)
+ return EFI_INVALID_PARAMETER;
+
+ ret = setvariable_allowed(variable_name, vendor, attributes, data_size,
+ data);
+ if (ret != EFI_SUCCESS)
+ return ret;
+
+ /* check if a variable exists */
+ var = efi_var_mem_find(vendor, variable_name, NULL);
+ append = !!(attributes & EFI_VARIABLE_APPEND_WRITE);
+ attributes &= ~EFI_VARIABLE_APPEND_WRITE;
+ delete = !append && (!data_size || !attributes);
+
+ /* BS only variables are hidden deny writing them */
+ if (!delete && !(attributes & EFI_VARIABLE_RUNTIME_ACCESS))
+ return EFI_INVALID_PARAMETER;
+
+ if (var) {
+ if (var->attr & EFI_VARIABLE_READ_ONLY ||
+ !(var->attr & EFI_VARIABLE_NON_VOLATILE))
+ return EFI_WRITE_PROTECTED;
+
+ /* attributes won't be changed */
+ if (!delete && (((var->attr & ~EFI_VARIABLE_READ_ONLY) !=
+ (attributes & ~EFI_VARIABLE_READ_ONLY))))
+ return EFI_INVALID_PARAMETER;
+ time = var->time;
+ } else {
+ if (!(attributes & EFI_VARIABLE_NON_VOLATILE))
+ return EFI_INVALID_PARAMETER;
+ if (append && !data_size)
+ return EFI_SUCCESS;
+ if (delete)
+ return EFI_NOT_FOUND;
+ }
+
+ if (delete) {
+ /* EFI_NOT_FOUND has been handled before */
+ attributes = var->attr;
+ ret = EFI_SUCCESS;
+ } else if (append && var) {
+ u16 *old_data = (void *)((uintptr_t)var->name +
+ sizeof(u16) * (u16_strlen(var->name) + 1));
+
+ ret = efi_var_mem_ins(variable_name, vendor, attributes,
+ var->length, old_data, data_size, data,
+ time);
+ } else {
+ ret = efi_var_mem_ins(variable_name, vendor, attributes,
+ data_size, data, 0, NULL, time);
+ }
+
+ if (ret != EFI_SUCCESS)
+ return ret;
+ /* We are always inserting new variables, get rid of the old copy */
+ efi_var_mem_del(var);
+
+ return EFI_SUCCESS;
}
/**
diff --git a/lib/efi_loader/efi_variable_tee.c b/lib/efi_loader/efi_variable_tee.c
index dde135f..8b6b0a3 100644
--- a/lib/efi_loader/efi_variable_tee.c
+++ b/lib/efi_loader/efi_variable_tee.c
@@ -873,6 +873,11 @@
efi_status_t ret;
u8 *comm_buf;
+ if (!max_variable_storage_size ||
+ !remain_variable_storage_size ||
+ !max_variable_size || !attributes)
+ return EFI_INVALID_PARAMETER;
+
payload_size = sizeof(*mm_query_info);
comm_buf = setup_mm_hdr((void **)&mm_query_info, payload_size,
SMM_VARIABLE_FUNCTION_QUERY_VARIABLE_INFO,
@@ -959,11 +964,6 @@
log_err("Unable to notify the MM partition for ExitBootServices\n");
free(comm_buf);
- /*
- * Populate the list for runtime variables.
- * asking EFI_VARIABLE_RUNTIME_ACCESS is redundant, since
- * efi_var_mem_notify_exit_boot_services will clean those, but that's fine
- */
ret = efi_var_collect(&var_buf, &len, EFI_VARIABLE_RUNTIME_ACCESS);
if (ret != EFI_SUCCESS)
log_err("Can't populate EFI variables. No runtime variables will be available\n");
diff --git a/lib/efi_selftest/Makefile b/lib/efi_selftest/Makefile
index e4d7542..4147018 100644
--- a/lib/efi_selftest/Makefile
+++ b/lib/efi_selftest/Makefile
@@ -45,6 +45,7 @@
efi_selftest_textoutput.o \
efi_selftest_tpl.o \
efi_selftest_util.o \
+efi_selftest_variables_common.o \
efi_selftest_variables.o \
efi_selftest_variables_runtime.o \
efi_selftest_watchdog.o
diff --git a/lib/efi_selftest/efi_selftest_variables.c b/lib/efi_selftest/efi_selftest_variables.c
index c7a3fdb..3d5f38c 100644
--- a/lib/efi_selftest/efi_selftest_variables.c
+++ b/lib/efi_selftest/efi_selftest_variables.c
@@ -51,15 +51,12 @@
u16 varname[EFI_ST_MAX_VARNAME_SIZE];
int flag;
efi_guid_t guid;
- u64 max_storage, rem_storage, max_size;
+ int test_ret;
- ret = runtime->query_variable_info(EFI_VARIABLE_BOOTSERVICE_ACCESS,
- &max_storage, &rem_storage,
- &max_size);
- if (ret != EFI_SUCCESS) {
- efi_st_todo("QueryVariableInfo failed\n");
- } else if (!max_storage || !rem_storage || !max_size) {
- efi_st_error("QueryVariableInfo: wrong info\n");
+ test_ret = efi_st_query_variable_common(runtime,
+ EFI_VARIABLE_BOOTSERVICE_ACCESS);
+ if (test_ret != EFI_ST_SUCCESS) {
+ efi_st_error("QueryVariableInfo failed\n");
return EFI_ST_FAILURE;
}
/* Set variable 0 */
@@ -131,13 +128,57 @@
(unsigned int)len);
if (memcmp(data, v, len))
efi_st_todo("GetVariable returned wrong value\n");
- /* Append variable 2 */
+
+ /* Append variable 2, write to non-existent variable with datasize=0 */
+ ret = runtime->set_variable(u"efi_none", &guid_vendor1,
+ EFI_VARIABLE_BOOTSERVICE_ACCESS |
+ EFI_VARIABLE_APPEND_WRITE,
+ 0, v);
+ if (ret != EFI_SUCCESS) {
+ efi_st_error(
+ "SetVariable(APPEND_WRITE) with size 0 to non-existent variable returns wrong code\n");
+ return EFI_ST_FAILURE;
+ }
+ len = EFI_ST_MAX_DATA_SIZE;
+ ret = runtime->get_variable(u"efi_none", &guid_vendor1,
+ &attr, &len, data);
+ if (ret != EFI_NOT_FOUND) {
+ efi_st_error("Variable must not be created\n");
+ return EFI_ST_FAILURE;
+ }
+ /* Append variable 2, write to non-existent variable with valid data size*/
ret = runtime->set_variable(u"efi_none", &guid_vendor1,
EFI_VARIABLE_BOOTSERVICE_ACCESS |
EFI_VARIABLE_APPEND_WRITE,
15, v);
+ if (ret != EFI_SUCCESS) {
+ efi_st_error("SetVariable(APPEND_WRITE) with valid size and data to non-existent variable must be succcessful\n");
+ return EFI_ST_FAILURE;
+ }
+ len = EFI_ST_MAX_DATA_SIZE;
+ ret = runtime->get_variable(u"efi_none", &guid_vendor1,
+ &attr, &len, data);
+ if (ret != EFI_SUCCESS) {
+ efi_st_error("GetVariable failed\n");
+ return EFI_ST_FAILURE;
+ }
+ if (len != 15)
+ efi_st_todo("GetVariable returned wrong length %u\n",
+ (unsigned int)len);
+ if (memcmp(data, v, len))
+ efi_st_todo("GetVariable returned wrong value\n");
+ /* Delete variable efi_none */
+ ret = runtime->set_variable(u"efi_none", &guid_vendor1,
+ 0, 0, NULL);
+ if (ret != EFI_SUCCESS) {
+ efi_st_error("SetVariable failed\n");
+ return EFI_ST_FAILURE;
+ }
+ len = EFI_ST_MAX_DATA_SIZE;
+ ret = runtime->get_variable(u"efi_none", &guid_vendor1,
+ &attr, &len, data);
if (ret != EFI_NOT_FOUND) {
- efi_st_error("SetVariable(APPEND_WRITE) with size 0 to non-existent variable returns wrong code\n");
+ efi_st_error("Variable was not deleted\n");
return EFI_ST_FAILURE;
}
/* Enumerate variables */
diff --git a/lib/efi_selftest/efi_selftest_variables_common.c b/lib/efi_selftest/efi_selftest_variables_common.c
new file mode 100644
index 0000000..453bc87
--- /dev/null
+++ b/lib/efi_selftest/efi_selftest_variables_common.c
@@ -0,0 +1,102 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * efi_selftest_variables_runtime
+ *
+ * Copyright (c) 2024 Ilias Apalodimas <ilias.apalodimas@linaro.org>
+ *
+ * This unit test checks common service across boottime/runtime
+ */
+
+#include <efi_selftest.h>
+
+#define EFI_INVALID_ATTR BIT(30)
+
+int efi_st_query_variable_common(struct efi_runtime_services *runtime,
+ u32 attributes)
+{
+ efi_status_t ret;
+ u64 max_storage, rem_storage, max_size;
+
+ ret = runtime->query_variable_info(attributes,
+ &max_storage, &rem_storage,
+ &max_size);
+ if (ret != EFI_SUCCESS) {
+ efi_st_error("QueryVariableInfo failed\n");
+ return EFI_ST_FAILURE;
+ } else if (!max_storage || !rem_storage || !max_size) {
+ efi_st_error("QueryVariableInfo: wrong info\n");
+ return EFI_ST_FAILURE;
+ }
+
+ ret = runtime->query_variable_info(EFI_VARIABLE_RUNTIME_ACCESS,
+ &max_storage, &rem_storage,
+ &max_size);
+ if (ret != EFI_INVALID_PARAMETER) {
+ efi_st_error("QueryVariableInfo failed\n");
+ return EFI_ST_FAILURE;
+ }
+
+ ret = runtime->query_variable_info(attributes,
+ NULL, &rem_storage,
+ &max_size);
+ if (ret != EFI_INVALID_PARAMETER) {
+ efi_st_error("QueryVariableInfo failed\n");
+ return EFI_ST_FAILURE;
+ }
+
+ ret = runtime->query_variable_info(attributes,
+ &max_storage, NULL,
+ &max_size);
+ if (ret != EFI_INVALID_PARAMETER) {
+ efi_st_error("QueryVariableInfo failed\n");
+ return EFI_ST_FAILURE;
+ }
+
+ ret = runtime->query_variable_info(attributes,
+ &max_storage, &rem_storage,
+ NULL);
+ if (ret != EFI_INVALID_PARAMETER) {
+ efi_st_error("QueryVariableInfo failed\n");
+ return EFI_ST_FAILURE;
+ }
+
+ ret = runtime->query_variable_info(0, &max_storage, &rem_storage,
+ &max_size);
+ if (ret != EFI_INVALID_PARAMETER) {
+ efi_st_error("QueryVariableInfo failed\n");
+ return EFI_ST_FAILURE;
+ }
+
+ ret = runtime->query_variable_info(attributes |
+ EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS |
+ EFI_VARIABLE_NON_VOLATILE,
+ &max_storage, &rem_storage,
+ &max_size);
+ if (ret != EFI_UNSUPPORTED) {
+ efi_st_error("QueryVariableInfo failed\n");
+ return EFI_ST_FAILURE;
+ }
+
+ ret = runtime->query_variable_info(EFI_VARIABLE_NON_VOLATILE,
+ &max_storage, &rem_storage,
+ &max_size);
+ if (ret != EFI_INVALID_PARAMETER) {
+ efi_st_error("QueryVariableInfo failed\n");
+ return EFI_ST_FAILURE;
+ }
+
+ /*
+ * Use a mix existing/non-existing attribute bits from the
+ * UEFI spec
+ */
+ ret = runtime->query_variable_info(attributes | EFI_INVALID_ATTR |
+ EFI_VARIABLE_NON_VOLATILE,
+ &max_storage, &rem_storage,
+ &max_size);
+ if (ret != EFI_INVALID_PARAMETER) {
+ efi_st_error("QueryVariableInfo failed\n");
+ return EFI_ST_FAILURE;
+ }
+
+ return EFI_ST_SUCCESS;
+}
diff --git a/lib/efi_selftest/efi_selftest_variables_runtime.c b/lib/efi_selftest/efi_selftest_variables_runtime.c
index 4700d94..379c4f9 100644
--- a/lib/efi_selftest/efi_selftest_variables_runtime.c
+++ b/lib/efi_selftest/efi_selftest_variables_runtime.c
@@ -10,6 +10,8 @@
*/
#include <efi_selftest.h>
+#include <efi_variable.h>
+#include <u-boot/crc.h>
#define EFI_ST_MAX_DATA_SIZE 16
#define EFI_ST_MAX_VARNAME_SIZE 40
@@ -17,6 +19,8 @@
static struct efi_boot_services *boottime;
static struct efi_runtime_services *runtime;
static const efi_guid_t guid_vendor0 = EFI_GLOBAL_VARIABLE_GUID;
+static const efi_guid_t __efi_runtime_data efi_rt_var_guid =
+ U_BOOT_EFI_RT_VAR_FILE_GUID;
/*
* Setup unit test.
@@ -41,30 +45,251 @@
static int execute(void)
{
efi_status_t ret;
- efi_uintn_t len;
+ efi_uintn_t len, avail, append_len = 17;
u32 attr;
u8 v[16] = {0x5d, 0xd1, 0x5e, 0x51, 0x5a, 0x05, 0xc7, 0x0c,
0x35, 0x4a, 0xae, 0x87, 0xa5, 0xdf, 0x0f, 0x65,};
+ u8 v2[CONFIG_EFI_VAR_BUF_SIZE];
u8 data[EFI_ST_MAX_DATA_SIZE];
+ u8 data2[CONFIG_EFI_VAR_BUF_SIZE];
u16 varname[EFI_ST_MAX_VARNAME_SIZE];
efi_guid_t guid;
u64 max_storage, rem_storage, max_size;
+ int test_ret;
- ret = runtime->query_variable_info(EFI_VARIABLE_BOOTSERVICE_ACCESS,
+ memset(v2, 0x1, sizeof(v2));
+
+ if (IS_ENABLED(CONFIG_EFI_VARIABLE_FILE_STORE)) {
+ test_ret = efi_st_query_variable_common(runtime, EFI_VARIABLE_BOOTSERVICE_ACCESS |
+ EFI_VARIABLE_RUNTIME_ACCESS);
+ if (test_ret != EFI_ST_SUCCESS) {
+ efi_st_error("QueryVariableInfo failed\n");
+ return EFI_ST_FAILURE;
+ }
+ } else {
+ ret = runtime->query_variable_info(EFI_VARIABLE_BOOTSERVICE_ACCESS,
&max_storage, &rem_storage,
&max_size);
- if (ret != EFI_UNSUPPORTED) {
- efi_st_error("QueryVariableInfo failed\n");
- return EFI_ST_FAILURE;
+ if (ret != EFI_UNSUPPORTED) {
+ efi_st_error("QueryVariableInfo failed\n");
+ return EFI_ST_FAILURE;
+ }
}
ret = runtime->set_variable(u"efi_st_var0", &guid_vendor0,
EFI_VARIABLE_BOOTSERVICE_ACCESS |
EFI_VARIABLE_RUNTIME_ACCESS,
3, v + 4);
- if (ret != EFI_UNSUPPORTED) {
- efi_st_error("SetVariable failed\n");
- return EFI_ST_FAILURE;
+ if (IS_ENABLED(CONFIG_EFI_RT_VOLATILE_STORE)) {
+ efi_uintn_t prev_len, delta;
+ struct efi_var_entry *var;
+ struct efi_var_file *hdr;
+
+ /* At runtime only non-volatile variables may be set. */
+ if (ret != EFI_INVALID_PARAMETER) {
+ efi_st_error("SetVariable failed\n");
+ return EFI_ST_FAILURE;
+ }
+
+ /* runtime atttribute must be set */
+ ret = runtime->set_variable(u"efi_st_var0", &guid_vendor0,
+ EFI_VARIABLE_BOOTSERVICE_ACCESS |
+ EFI_VARIABLE_NON_VOLATILE,
+ 3, v + 4);
+ if (ret != EFI_INVALID_PARAMETER) {
+ efi_st_error("SetVariable failed\n");
+ return EFI_ST_FAILURE;
+ }
+
+ len = sizeof(data);
+ ret = runtime->get_variable(u"RTStorageVolatile",
+ &efi_rt_var_guid,
+ &attr, &len, data);
+ if (ret != EFI_SUCCESS) {
+ efi_st_error("GetVariable failed\n");
+ return EFI_ST_FAILURE;
+ }
+
+ if (len != sizeof(EFI_VAR_FILE_NAME) ||
+ memcmp(data, EFI_VAR_FILE_NAME, sizeof(EFI_VAR_FILE_NAME))) {
+ data[len - 1] = 0;
+ efi_st_error("RTStorageVolatile = %s\n", data);
+ return EFI_ST_FAILURE;
+ }
+
+ len = sizeof(data2);
+ ret = runtime->get_variable(u"VarToFile", &efi_rt_var_guid,
+ &attr, &len, data2);
+ if (ret != EFI_SUCCESS) {
+ efi_st_error("GetVariable failed\n");
+ return EFI_ST_FAILURE;
+ }
+ /*
+ * VarToFile size must change once a variable is inserted
+ * Store it now, we'll use it later
+ */
+ prev_len = len;
+ ret = runtime->set_variable(u"efi_st_var0", &guid_vendor0,
+ EFI_VARIABLE_BOOTSERVICE_ACCESS |
+ EFI_VARIABLE_RUNTIME_ACCESS |
+ EFI_VARIABLE_NON_VOLATILE,
+ sizeof(v2),
+ v2);
+ /*
+ * This will try to update VarToFile as well and must fail,
+ * without changing or deleting VarToFile
+ */
+ if (ret != EFI_OUT_OF_RESOURCES) {
+ efi_st_error("SetVariable failed\n");
+ return EFI_ST_FAILURE;
+ }
+ len = sizeof(data2);
+ ret = runtime->get_variable(u"VarToFile", &efi_rt_var_guid,
+ &attr, &len, data2);
+ if (ret != EFI_SUCCESS || prev_len != len) {
+ efi_st_error("Get/SetVariable failed\n");
+ return EFI_ST_FAILURE;
+ }
+
+ /* Add an 8byte aligned variable */
+ ret = runtime->set_variable(u"efi_st_var0", &guid_vendor0,
+ EFI_VARIABLE_BOOTSERVICE_ACCESS |
+ EFI_VARIABLE_RUNTIME_ACCESS |
+ EFI_VARIABLE_NON_VOLATILE,
+ sizeof(v), v);
+ if (ret != EFI_SUCCESS) {
+ efi_st_error("SetVariable failed\n");
+ return EFI_ST_FAILURE;
+ }
+
+ /* Delete it by setting the attrs to 0 */
+ ret = runtime->set_variable(u"efi_st_var0", &guid_vendor0,
+ 0, sizeof(v), v);
+ if (ret != EFI_SUCCESS) {
+ efi_st_error("SetVariable failed\n");
+ return EFI_ST_FAILURE;
+ }
+
+ /* Add it back */
+ ret = runtime->set_variable(u"efi_st_var0", &guid_vendor0,
+ EFI_VARIABLE_BOOTSERVICE_ACCESS |
+ EFI_VARIABLE_RUNTIME_ACCESS |
+ EFI_VARIABLE_NON_VOLATILE,
+ sizeof(v), v);
+ if (ret != EFI_SUCCESS) {
+ efi_st_error("SetVariable failed\n");
+ return EFI_ST_FAILURE;
+ }
+
+ /* Delete it again by setting the size to 0 */
+ ret = runtime->set_variable(u"efi_st_var0", &guid_vendor0,
+ EFI_VARIABLE_BOOTSERVICE_ACCESS |
+ EFI_VARIABLE_RUNTIME_ACCESS |
+ EFI_VARIABLE_NON_VOLATILE,
+ 0, NULL);
+ if (ret != EFI_SUCCESS) {
+ efi_st_error("SetVariable failed\n");
+ return EFI_ST_FAILURE;
+ }
+
+ /* Delete it again and make sure it's not there */
+ ret = runtime->set_variable(u"efi_st_var0", &guid_vendor0,
+ EFI_VARIABLE_BOOTSERVICE_ACCESS |
+ EFI_VARIABLE_RUNTIME_ACCESS |
+ EFI_VARIABLE_NON_VOLATILE,
+ 0, NULL);
+ if (ret != EFI_NOT_FOUND) {
+ efi_st_error("SetVariable failed\n");
+ return EFI_ST_FAILURE;
+ }
+
+ /*
+ * Add a non-aligned variable
+ * VarToFile updates must include efi_st_var0
+ */
+ ret = runtime->set_variable(u"efi_st_var0", &guid_vendor0,
+ EFI_VARIABLE_BOOTSERVICE_ACCESS |
+ EFI_VARIABLE_RUNTIME_ACCESS |
+ EFI_VARIABLE_NON_VOLATILE,
+ 9, v + 4);
+ if (ret != EFI_SUCCESS) {
+ efi_st_error("SetVariable failed\n");
+ return EFI_ST_FAILURE;
+ }
+ var = efi_var_mem_find(&guid_vendor0, u"efi_st_var0", NULL);
+ if (!var) {
+ efi_st_error("GetVariable failed\n");
+ return EFI_ST_FAILURE;
+ }
+ delta = efi_var_entry_len(var);
+ len = sizeof(data2);
+ ret = runtime->get_variable(u"VarToFile", &efi_rt_var_guid,
+ &attr, &len, data2);
+ if (ret != EFI_SUCCESS || prev_len + delta != len) {
+ efi_st_error("Get/SetVariable failed\n");
+ return EFI_ST_FAILURE;
+ }
+
+ /*
+ * Append on an existing variable must update VarToFile
+ * Our variable entries are 8-byte aligned.
+ * Adding a single byte will fit on the existing space
+ */
+ prev_len = len;
+ avail = efi_var_entry_len(var) -
+ (sizeof(u16) * (u16_strlen(var->name) + 1) + sizeof(*var)) -
+ var->length;
+ if (avail >= append_len)
+ delta = 0;
+ else
+ delta = ALIGN(append_len - avail, 8);
+ ret = runtime->set_variable(u"efi_st_var0", &guid_vendor0,
+ EFI_VARIABLE_BOOTSERVICE_ACCESS |
+ EFI_VARIABLE_RUNTIME_ACCESS |
+ EFI_VARIABLE_APPEND_WRITE |
+ EFI_VARIABLE_NON_VOLATILE,
+ append_len, v2);
+ if (ret != EFI_SUCCESS) {
+ efi_st_error("SetVariable failed\n");
+ return EFI_ST_FAILURE;
+ }
+ len = sizeof(data2);
+ ret = runtime->get_variable(u"VarToFile", &efi_rt_var_guid,
+ &attr, &len, data2);
+ if (ret != EFI_SUCCESS) {
+ efi_st_error("GetVariable failed\n");
+ return EFI_ST_FAILURE;
+ }
+ if (prev_len + delta != len) {
+ efi_st_error("Unexpected VarToFile size");
+ return EFI_ST_FAILURE;
+ }
+
+ /* Make sure that variable contains a valid file */
+ hdr = (struct efi_var_file *)data2;
+ if (hdr->magic != EFI_VAR_FILE_MAGIC ||
+ len != hdr->length ||
+ hdr->crc32 != crc32(0, (u8 *)((uintptr_t)data2 + sizeof(struct efi_var_file)),
+ len - sizeof(struct efi_var_file))) {
+ efi_st_error("VarToFile invalid header\n");
+ return EFI_ST_FAILURE;
+ }
+
+ /* Variables that are BS, RT and volatile are RO after EBS */
+ ret = runtime->set_variable(u"VarToFile", &efi_rt_var_guid,
+ EFI_VARIABLE_BOOTSERVICE_ACCESS |
+ EFI_VARIABLE_RUNTIME_ACCESS |
+ EFI_VARIABLE_NON_VOLATILE,
+ sizeof(v), v);
+ if (ret != EFI_WRITE_PROTECTED) {
+ efi_st_error("Get/SetVariable failed\n");
+ return EFI_ST_FAILURE;
+ }
+ } else {
+ if (ret != EFI_UNSUPPORTED) {
+ efi_st_error("SetVariable failed\n");
+ return EFI_ST_FAILURE;
+ }
}
len = EFI_ST_MAX_DATA_SIZE;
ret = runtime->get_variable(u"PlatformLangCodes", &guid_vendor0,
diff --git a/lib/gzip.c b/lib/gzip.c
index 5d9c195..a9a3df5 100644
--- a/lib/gzip.c
+++ b/lib/gzip.c
@@ -67,7 +67,7 @@
r = deflateInit2_(&s, Z_BEST_SPEED, Z_DEFLATED, window,
DEF_MEM_LEVEL, Z_DEFAULT_STRATEGY,
- ZLIB_VERSION, sizeof(z_stream));
+ sizeof(z_stream));
if (r != Z_OK) {
printf ("Error: deflateInit2_() returned %d\n", r);
return -1;
diff --git a/lib/rsa/rsa-verify.c b/lib/rsa/rsa-verify.c
index 1007b69..d3b4f71 100644
--- a/lib/rsa/rsa-verify.c
+++ b/lib/rsa/rsa-verify.c
@@ -342,7 +342,7 @@
return -EINVAL;
}
- debug("Checksum algorithm: %s", checksum->name);
+ debug("Checksum algorithm: %s\n", checksum->name);
/* Sanity check for stack size */
if (sig_len > RSA_MAX_SIG_BITS / 8) {
@@ -444,13 +444,13 @@
const char *algo;
if (node < 0) {
- debug("%s: Skipping invalid node", __func__);
+ debug("%s: Skipping invalid node\n", __func__);
return -EBADF;
}
algo = fdt_getprop(blob, node, "algo", NULL);
if (strcmp(info->name, algo)) {
- debug("%s: Wrong algo: have %s, expected %s", __func__,
+ debug("%s: Wrong algo: have %s, expected %s\n", __func__,
info->name, algo);
return -EFAULT;
}
@@ -470,7 +470,7 @@
prop.rr = fdt_getprop(blob, node, "rsa,r-squared", NULL);
if (!prop.num_bits || !prop.modulus || !prop.rr) {
- debug("%s: Missing RSA key info", __func__);
+ debug("%s: Missing RSA key info\n", __func__);
return -EFAULT;
}
diff --git a/lib/uuid.c b/lib/uuid.c
index 2d7d995..dfa2320 100644
--- a/lib/uuid.c
+++ b/lib/uuid.c
@@ -378,7 +378,7 @@
struct udevice *devp;
u32 randv = 0;
- if (IS_ENABLED(CONFIG_DM_RNG)) {
+ if (CONFIG_IS_ENABLED(DM_RNG)) {
ret = uclass_get_device(UCLASS_RNG, 0, &devp);
if (!ret) {
ret = dm_rng_read(devp, &randv, sizeof(randv));
diff --git a/lib/zlib/deflate.c b/lib/zlib/deflate.c
index 4549f4d..7e1ed4f 100644
--- a/lib/zlib/deflate.c
+++ b/lib/zlib/deflate.c
@@ -196,37 +196,30 @@
zmemzero((Bytef *)s->head, (unsigned)(s->hash_size-1)*sizeof(*s->head));
/* ========================================================================= */
-int ZEXPORT deflateInit_(strm, level, version, stream_size)
+int ZEXPORT deflateInit_(strm, level, stream_size)
z_streamp strm;
int level;
- const char *version;
int stream_size;
{
return deflateInit2_(strm, level, Z_DEFLATED, MAX_WBITS, DEF_MEM_LEVEL,
- Z_DEFAULT_STRATEGY, version, stream_size);
+ Z_DEFAULT_STRATEGY, stream_size);
/* To do: ignore strm->next_in if we use it as window */
}
/* ========================================================================= */
int ZEXPORT deflateInit2_(strm, level, method, windowBits, memLevel, strategy,
- version, stream_size)
+ stream_size)
z_streamp strm;
int level;
int method;
int windowBits;
int memLevel;
int strategy;
- const char *version;
int stream_size;
{
deflate_state *s;
int wrap = 1;
- static const char my_version[] = ZLIB_VERSION;
- if (version == Z_NULL || version[0] != my_version[0] ||
- stream_size != sizeof(z_stream)) {
- return Z_VERSION_ERROR;
- }
if (strm == Z_NULL) return Z_STREAM_ERROR;
strm->msg = Z_NULL;
diff --git a/lib/zlib/inffast.c b/lib/zlib/inffast.c
index e3c7f3b..5e2a65a 100644
--- a/lib/zlib/inffast.c
+++ b/lib/zlib/inffast.c
@@ -1,5 +1,5 @@
/* inffast.c -- fast decoding
- * Copyright (C) 1995-2004 Mark Adler
+ * Copyright (C) 1995-2008, 2010, 2013 Mark Adler
* For conditions of distribution and use, see copyright notice in zlib.h
*/
@@ -12,25 +12,6 @@
#ifndef ASMINF
-/* Allow machine dependent optimization for post-increment or pre-increment.
- Based on testing to date,
- Pre-increment preferred for:
- - PowerPC G3 (Adler)
- - MIPS R5000 (Randers-Pehrson)
- Post-increment preferred for:
- - none
- No measurable difference:
- - Pentium III (Anderson)
- - M68060 (Nikl)
- */
-#ifdef POSTINC
-# define OFF 0
-# define PUP(a) *(a)++
-#else
-# define OFF 1
-# define PUP(a) *++(a)
-#endif
-
/*
Decode literal, length, and distance codes and write out the resulting
literal and match bytes until either not enough input or output is
@@ -66,12 +47,13 @@
requires strm->avail_out >= 258 for each loop to avoid checking for
output space.
*/
-void inflate_fast(z_streamp strm, unsigned start)
-/* start: inflate()'s starting value for strm->avail_out */
+void ZLIB_INTERNAL inflate_fast(strm, start)
+z_streamp strm;
+unsigned start; /* inflate()'s starting value for strm->avail_out */
{
struct inflate_state FAR *state;
- unsigned char FAR *in; /* local strm->next_in */
- unsigned char FAR *last; /* while in < last, enough input available */
+ z_const unsigned char FAR *in; /* local strm->next_in */
+ z_const unsigned char FAR *last; /* have enough input while in < last */
unsigned char FAR *out; /* local strm->next_out */
unsigned char FAR *beg; /* inflate()'s initial strm->next_out */
unsigned char FAR *end; /* while out < end, enough space available */
@@ -80,7 +62,7 @@
#endif
unsigned wsize; /* window size or zero if not using window */
unsigned whave; /* valid bytes in the window */
- unsigned write; /* window write index */
+ unsigned wnext; /* window write index */
unsigned char FAR *window; /* allocated sliding window, if wsize != 0 */
unsigned long hold; /* local strm->hold */
unsigned bits; /* local strm->bits */
@@ -88,7 +70,7 @@
code const FAR *dcode; /* local strm->distcode */
unsigned lmask; /* mask for first level of length codes */
unsigned dmask; /* mask for first level of distance codes */
- code this; /* retrieved table entry */
+ code here; /* retrieved table entry */
unsigned op; /* code bits, operation, extra bits, or */
/* window position, window bytes to copy */
unsigned len; /* match length, unused bytes */
@@ -97,7 +79,7 @@
/* copy state to local variables */
state = (struct inflate_state FAR *)strm->state;
- in = strm->next_in - OFF;
+ in = strm->next_in;
last = in + (strm->avail_in - 5);
if (in > last && strm->avail_in > 5) {
/*
@@ -107,7 +89,7 @@
strm->avail_in = 0xffffffff - (uintptr_t)in;
last = in + (strm->avail_in - 5);
}
- out = strm->next_out - OFF;
+ out = strm->next_out;
beg = out - (start - strm->avail_out);
end = out + (strm->avail_out - 257);
#ifdef INFLATE_STRICT
@@ -115,7 +97,7 @@
#endif
wsize = state->wsize;
whave = state->whave;
- write = state->write;
+ wnext = state->wnext;
window = state->window;
hold = state->hold;
bits = state->bits;
@@ -128,29 +110,29 @@
input data or output space */
do {
if (bits < 15) {
- hold += (unsigned long)(PUP(in)) << bits;
+ hold += (unsigned long)(*in++) << bits;
bits += 8;
- hold += (unsigned long)(PUP(in)) << bits;
+ hold += (unsigned long)(*in++) << bits;
bits += 8;
}
- this = lcode[hold & lmask];
+ here = lcode[hold & lmask];
dolen:
- op = (unsigned)(this.bits);
+ op = (unsigned)(here.bits);
hold >>= op;
bits -= op;
- op = (unsigned)(this.op);
+ op = (unsigned)(here.op);
if (op == 0) { /* literal */
- Tracevv((stderr, this.val >= 0x20 && this.val < 0x7f ?
+ Tracevv((stderr, here.val >= 0x20 && here.val < 0x7f ?
"inflate: literal '%c'\n" :
- "inflate: literal 0x%02x\n", this.val));
- PUP(out) = (unsigned char)(this.val);
+ "inflate: literal 0x%02x\n", here.val));
+ *out++ = (unsigned char)(here.val);
}
else if (op & 16) { /* length base */
- len = (unsigned)(this.val);
+ len = (unsigned)(here.val);
op &= 15; /* number of extra bits */
if (op) {
if (bits < op) {
- hold += (unsigned long)(PUP(in)) << bits;
+ hold += (unsigned long)(*in++) << bits;
bits += 8;
}
len += (unsigned)hold & ((1U << op) - 1);
@@ -159,25 +141,25 @@
}
Tracevv((stderr, "inflate: length %u\n", len));
if (bits < 15) {
- hold += (unsigned long)(PUP(in)) << bits;
+ hold += (unsigned long)(*in++) << bits;
bits += 8;
- hold += (unsigned long)(PUP(in)) << bits;
+ hold += (unsigned long)(*in++) << bits;
bits += 8;
}
- this = dcode[hold & dmask];
+ here = dcode[hold & dmask];
dodist:
- op = (unsigned)(this.bits);
+ op = (unsigned)(here.bits);
hold >>= op;
bits -= op;
- op = (unsigned)(this.op);
+ op = (unsigned)(here.op);
if (op & 16) { /* distance base */
- dist = (unsigned)(this.val);
+ dist = (unsigned)(here.val);
op &= 15; /* number of extra bits */
if (bits < op) {
- hold += (unsigned long)(PUP(in)) << bits;
+ hold += (unsigned long)(*in++) << bits;
bits += 8;
if (bits < op) {
- hold += (unsigned long)(PUP(in)) << bits;
+ hold += (unsigned long)(*in++) << bits;
bits += 8;
}
}
@@ -196,108 +178,80 @@
if (dist > op) { /* see if copy from window */
op = dist - op; /* distance back in window */
if (op > whave) {
- strm->msg = (char *)"invalid distance too far back";
+ strm->msg =
+ (char *)"invalid distance too far back";
state->mode = BAD;
break;
}
- from = window - OFF;
- if (write == 0) { /* very common case */
+ from = window;
+ if (wnext == 0) { /* very common case */
from += wsize - op;
if (op < len) { /* some from window */
len -= op;
do {
- PUP(out) = PUP(from);
+ *out++ = *from++;
} while (--op);
from = out - dist; /* rest from output */
}
}
- else if (write < op) { /* wrap around window */
- from += wsize + write - op;
- op -= write;
+ else if (wnext < op) { /* wrap around window */
+ from += wsize + wnext - op;
+ op -= wnext;
if (op < len) { /* some from end of window */
len -= op;
do {
- PUP(out) = PUP(from);
+ *out++ = *from++;
} while (--op);
- from = window - OFF;
- if (write < len) { /* some from start of window */
- op = write;
+ from = window;
+ if (wnext < len) { /* some from start of window */
+ op = wnext;
len -= op;
do {
- PUP(out) = PUP(from);
+ *out++ = *from++;
} while (--op);
from = out - dist; /* rest from output */
}
}
}
else { /* contiguous in window */
- from += write - op;
+ from += wnext - op;
if (op < len) { /* some from window */
len -= op;
do {
- PUP(out) = PUP(from);
+ *out++ = *from++;
} while (--op);
from = out - dist; /* rest from output */
}
}
while (len > 2) {
- PUP(out) = PUP(from);
- PUP(out) = PUP(from);
- PUP(out) = PUP(from);
+ *out++ = *from++;
+ *out++ = *from++;
+ *out++ = *from++;
len -= 3;
}
if (len) {
- PUP(out) = PUP(from);
+ *out++ = *from++;
if (len > 1)
- PUP(out) = PUP(from);
+ *out++ = *from++;
}
}
else {
- unsigned short *sout;
- unsigned long loops;
-
from = out - dist; /* copy direct from output */
- /* minimum length is three */
- /* Align out addr */
- if (!((long)(out - 1 + OFF) & 1)) {
- PUP(out) = PUP(from);
- len--;
- }
- sout = (unsigned short *)(out - OFF);
- if (dist > 2 ) {
- unsigned short *sfrom;
-
- sfrom = (unsigned short *)(from - OFF);
- loops = len >> 1;
- do
- PUP(sout) = get_unaligned(++sfrom);
- while (--loops);
- out = (unsigned char *)sout + OFF;
- from = (unsigned char *)sfrom + OFF;
- } else { /* dist == 1 or dist == 2 */
- unsigned short pat16;
-
- pat16 = *(sout-2+2*OFF);
- if (dist == 1)
-#if defined(__BIG_ENDIAN)
- pat16 = (pat16 & 0xff) | ((pat16 & 0xff ) << 8);
-#elif defined(__LITTLE_ENDIAN)
- pat16 = (pat16 & 0xff00) | ((pat16 & 0xff00 ) >> 8);
-#else
-#error __BIG_ENDIAN nor __LITTLE_ENDIAN is defined
-#endif
- loops = len >> 1;
- do
- PUP(sout) = pat16;
- while (--loops);
- out = (unsigned char *)sout + OFF;
- }
- if (len & 1)
- PUP(out) = PUP(from);
+ do { /* minimum length is three */
+ *out++ = *from++;
+ *out++ = *from++;
+ *out++ = *from++;
+ len -= 3;
+ } while (len > 2);
+ if (len) {
+ *out++ = *from++;
+ if (len > 1)
+ *out++ = *from++;
+ }
}
}
else if ((op & 64) == 0) { /* 2nd level distance code */
- this = dcode[this.val + (hold & ((1U << op) - 1))];
+ here = dcode[here.val + (hold & ((1U << op) - 1))];
goto dodist;
}
else {
@@ -307,7 +261,7 @@
}
}
else if ((op & 64) == 0) { /* 2nd level length code */
- this = lcode[this.val + (hold & ((1U << op) - 1))];
+ here = lcode[here.val + (hold & ((1U << op) - 1))];
goto dolen;
}
else if (op & 32) { /* end-of-block */
@@ -329,8 +283,8 @@
hold &= (1U << bits) - 1;
/* update state and return */
- strm->next_in = in + OFF;
- strm->next_out = out + OFF;
+ strm->next_in = in;
+ strm->next_out = out;
strm->avail_in = (unsigned)(in < last ? 5 + (last - in) : 5 - (in - last));
strm->avail_out = (unsigned)(out < end ?
257 + (end - out) : 257 - (out - end));
@@ -343,7 +297,7 @@
inflate_fast() speedups that turned out slower (on a PowerPC G3 750CXe):
- Using bit fields for code structure
- Different op definition to avoid & for extra bits (do & for table bits)
- - Three separate decoding do-loops for direct, window, and write == 0
+ - Three separate decoding do-loops for direct, window, and wnext == 0
- Special case for distance > 1 copies to do overlapped load and store copy
- Explicit branch predictions (based on measured branch probabilities)
- Deferring match copy and interspersed it with decoding subsequent codes
diff --git a/lib/zlib/inflate.c b/lib/zlib/inflate.c
index 8f767b7..f7e81fc 100644
--- a/lib/zlib/inflate.c
+++ b/lib/zlib/inflate.c
@@ -21,7 +21,7 @@
state->head = Z_NULL;
state->wsize = 0;
state->whave = 0;
- state->write = 0;
+ state->wnext = 0;
state->hold = 0;
state->bits = 0;
state->lencode = state->distcode = state->next = state->codes;
@@ -30,14 +30,11 @@
return Z_OK;
}
-int ZEXPORT inflateInit2_(z_streamp strm, int windowBits, const char *version,
+int ZEXPORT inflateInit2_(z_streamp strm, int windowBits,
int stream_size)
{
struct inflate_state FAR *state;
- if (version == Z_NULL || version[0] != ZLIB_VERSION[0] ||
- stream_size != (int)(sizeof(z_stream)))
- return Z_VERSION_ERROR;
if (strm == Z_NULL) return Z_STREAM_ERROR;
strm->msg = Z_NULL; /* in case we return an error */
if (strm->zalloc == (alloc_func)0) {
@@ -70,9 +67,9 @@
return inflateReset(strm);
}
-int ZEXPORT inflateInit_(z_streamp strm, const char *version, int stream_size)
+int ZEXPORT inflateInit_(z_streamp strm, int stream_size)
{
- return inflateInit2_(strm, DEF_WBITS, version, stream_size);
+ return inflateInit2_(strm, DEF_WBITS, stream_size);
}
local void fixedtables(struct inflate_state FAR *state)
@@ -115,7 +112,7 @@
/* if window not in use yet, initialize */
if (state->wsize == 0) {
state->wsize = 1U << state->wbits;
- state->write = 0;
+ state->wnext = 0;
state->whave = 0;
}
@@ -123,22 +120,22 @@
copy = out - strm->avail_out;
if (copy >= state->wsize) {
zmemcpy(state->window, strm->next_out - state->wsize, state->wsize);
- state->write = 0;
+ state->wnext = 0;
state->whave = state->wsize;
}
else {
- dist = state->wsize - state->write;
+ dist = state->wsize - state->wnext;
if (dist > copy) dist = copy;
- zmemcpy(state->window + state->write, strm->next_out - copy, dist);
+ zmemcpy(state->window + state->wnext, strm->next_out - copy, dist);
copy -= dist;
if (copy) {
zmemcpy(state->window, strm->next_out - copy, copy);
- state->write = copy;
+ state->wnext = copy;
state->whave = state->wsize;
}
else {
- state->write += dist;
- if (state->write == state->wsize) state->write = 0;
+ state->wnext += dist;
+ if (state->wnext == state->wsize) state->wnext = 0;
if (state->whave < state->wsize) state->whave += dist;
}
}
@@ -823,12 +820,12 @@
copy = out - left;
if (state->offset > copy) { /* copy from window */
copy = state->offset - copy;
- if (copy > state->write) {
- copy -= state->write;
+ if (copy > state->wnext) {
+ copy -= state->wnext;
from = state->window + (state->wsize - copy);
}
else
- from = state->window + (state->write - copy);
+ from = state->window + (state->wnext - copy);
if (copy > state->length) copy = state->length;
}
else { /* copy from output */
diff --git a/lib/zlib/inflate.h b/lib/zlib/inflate.h
index 07bd3e7..2657d61 100644
--- a/lib/zlib/inflate.h
+++ b/lib/zlib/inflate.h
@@ -88,7 +88,7 @@
unsigned wbits; /* log base 2 of requested window size */
unsigned wsize; /* window size or zero if not using window */
unsigned whave; /* valid bytes in the window */
- unsigned write; /* window write index */
+ unsigned wnext; /* window write index */
unsigned char FAR *window; /* allocated sliding window, if needed */
/* bit accumulator */
unsigned long hold; /* input bit accumulator */
diff --git a/lib/zlib/zutil.c b/lib/zlib/zutil.c
index 609aac5..ec21b45 100644
--- a/lib/zlib/zutil.c
+++ b/lib/zlib/zutil.c
@@ -21,7 +21,6 @@
"data error", /* Z_DATA_ERROR (-3) */
"insufficient memory", /* Z_MEM_ERROR (-4) */
"buffer error", /* Z_BUF_ERROR (-5) */
-"incompatible version",/* Z_VERSION_ERROR (-6) */
""};
#ifdef DEBUG
diff --git a/net/arp.c b/net/arp.c
index 37848ad..bc1e25f 100644
--- a/net/arp.c
+++ b/net/arp.c
@@ -9,10 +9,10 @@
* Copyright 2000-2002 Wolfgang Denk, wd@denx.de
*/
-#include <common.h>
#include <env.h>
#include <log.h>
#include <net.h>
+#include <vsprintf.h>
#include <linux/delay.h>
#include "arp.h"
diff --git a/net/bootp.c b/net/bootp.c
index 6800290..9dfb507 100644
--- a/net/bootp.c
+++ b/net/bootp.c
@@ -8,7 +8,6 @@
* Copyright 2000-2004 Wolfgang Denk, wd@denx.de
*/
-#include <common.h>
#include <bootstage.h>
#include <command.h>
#include <env.h>
@@ -883,6 +882,14 @@
break;
case 28: /* Ignore Broadcast Address Option */
break;
+ case 40: /* NIS Domain name */
+ if (net_nis_domain[0] == 0) {
+ size = truncate_sz("NIS Domain Name",
+ sizeof(net_nis_domain), oplen);
+ memcpy(&net_nis_domain, popt + 2, size);
+ net_nis_domain[size] = 0;
+ }
+ break;
#if defined(CONFIG_CMD_SNTP) && defined(CONFIG_BOOTP_NTPSERVER)
case 42: /* NTP server IP */
net_copy_ip(&net_ntp_server, (popt + 2));
diff --git a/net/cdp.c b/net/cdp.c
index a8f890e..d4cfc58 100644
--- a/net/cdp.c
+++ b/net/cdp.c
@@ -9,7 +9,6 @@
* Copyright 2000-2002 Wolfgang Denk, wd@denx.de
*/
-#include <common.h>
#include <net.h>
#include "cdp.h"
diff --git a/net/dhcpv6.c b/net/dhcpv6.c
index 4aea779..54619ee 100644
--- a/net/dhcpv6.c
+++ b/net/dhcpv6.c
@@ -7,7 +7,6 @@
/* Simple DHCP6 network layer implementation. */
-#include <common.h>
#include <net6.h>
#include <malloc.h>
#include <linux/delay.h>
diff --git a/net/dns.c b/net/dns.c
index 5b1fe5b..c2f0ab9 100644
--- a/net/dns.c
+++ b/net/dns.c
@@ -22,7 +22,6 @@
* this stuff is worth it, you can buy me a beer in return.
*/
-#include <common.h>
#include <command.h>
#include <env.h>
#include <log.h>
diff --git a/net/eth-uclass.c b/net/eth-uclass.c
index 3d0ec91..4e3933f 100644
--- a/net/eth-uclass.c
+++ b/net/eth-uclass.c
@@ -7,7 +7,6 @@
#define LOG_CATEGORY UCLASS_ETH
-#include <common.h>
#include <bootdev.h>
#include <bootstage.h>
#include <dm.h>
diff --git a/net/eth_bootdev.c b/net/eth_bootdev.c
index 869adf8..6ee54e3 100644
--- a/net/eth_bootdev.c
+++ b/net/eth_bootdev.c
@@ -8,7 +8,6 @@
#define LOG_CATEGORY UCLASS_BOOTSTD
-#include <common.h>
#include <bootdev.h>
#include <bootflow.h>
#include <command.h>
diff --git a/net/eth_common.c b/net/eth_common.c
index 14d4c07..89b5bb3 100644
--- a/net/eth_common.c
+++ b/net/eth_common.c
@@ -5,7 +5,6 @@
* Joe Hershberger, National Instruments
*/
-#include <common.h>
#include <bootstage.h>
#include <dm.h>
#include <env.h>
diff --git a/net/fastboot_tcp.c b/net/fastboot_tcp.c
index 2eb52ea..d1fccbc 100644
--- a/net/fastboot_tcp.c
+++ b/net/fastboot_tcp.c
@@ -3,7 +3,6 @@
* Copyright (C) 2023 The Android Open Source Project
*/
-#include <common.h>
#include <fastboot.h>
#include <net.h>
#include <net/fastboot_tcp.h>
diff --git a/net/fastboot_udp.c b/net/fastboot_udp.c
index 6fee441..d147951 100644
--- a/net/fastboot_udp.c
+++ b/net/fastboot_udp.c
@@ -3,7 +3,6 @@
* Copyright (C) 2016 The Android Open Source Project
*/
-#include <common.h>
#include <command.h>
#include <fastboot.h>
#include <net.h>
diff --git a/net/link_local.c b/net/link_local.c
index 8aec3c7..1797213 100644
--- a/net/link_local.c
+++ b/net/link_local.c
@@ -11,7 +11,6 @@
* Licensed under the GPL v2 or later
*/
-#include <common.h>
#include <env.h>
#include <log.h>
#include <net.h>
diff --git a/net/mdio-mux-uclass.c b/net/mdio-mux-uclass.c
index 94b90e0..ee188b5 100644
--- a/net/mdio-mux-uclass.c
+++ b/net/mdio-mux-uclass.c
@@ -4,7 +4,6 @@
* Alex Marginean, NXP
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <miiphy.h>
diff --git a/net/mdio-uclass.c b/net/mdio-uclass.c
index 0ebfb2f..4f052ae 100644
--- a/net/mdio-uclass.c
+++ b/net/mdio-uclass.c
@@ -4,7 +4,6 @@
* Alex Marginean, NXP
*/
-#include <common.h>
#include <dm.h>
#include <dm/lists.h>
#include <eth_phy.h>
diff --git a/net/ndisc.c b/net/ndisc.c
index d1cec06..d417c59 100644
--- a/net/ndisc.c
+++ b/net/ndisc.c
@@ -9,7 +9,6 @@
/* Neighbour Discovery for IPv6 */
-#include <common.h>
#include <net.h>
#include <net6.h>
#include <ndisc.h>
diff --git a/net/net.c b/net/net.c
index 0fb2d25..23b5d33 100644
--- a/net/net.c
+++ b/net/net.c
@@ -81,7 +81,6 @@
*/
-#include <common.h>
#include <bootstage.h>
#include <command.h>
#include <console.h>
diff --git a/net/net6.c b/net/net6.c
index 2dd64c0..4cff98d 100644
--- a/net/net6.c
+++ b/net/net6.c
@@ -9,12 +9,12 @@
/* Simple IPv6 network layer implementation */
-#include <common.h>
#include <env_internal.h>
#include <malloc.h>
#include <net.h>
#include <net6.h>
#include <ndisc.h>
+#include <vsprintf.h>
/* NULL IPv6 address */
struct in6_addr const net_null_addr_ip6 = ZERO_IPV6_ADDR;
diff --git a/net/net_rand.h b/net/net_rand.h
index d3c5559..686e85f 100644
--- a/net/net_rand.h
+++ b/net/net_rand.h
@@ -42,7 +42,7 @@
struct udevice *devp;
u32 randv = 0;
- if (IS_ENABLED(CONFIG_DM_RNG)) {
+ if (CONFIG_IS_ENABLED(DM_RNG)) {
ret = uclass_get_device(UCLASS_RNG, 0, &devp);
if (ret) {
ret = dm_rng_read(devp, &randv, sizeof(randv));
diff --git a/net/nfs.c b/net/nfs.c
index 7a8887e..acc7106 100644
--- a/net/nfs.c
+++ b/net/nfs.c
@@ -30,7 +30,6 @@
* September 27, 2018. As of now, NFSv3 is the default choice. If the server
* does not support NFSv3, we fall back to versions 2 or 1. */
-#include <common.h>
#include <command.h>
#include <display_options.h>
#ifdef CONFIG_SYS_DIRECT_FLASH_NFS
@@ -57,7 +56,8 @@
static int nfs_len;
static const ulong nfs_timeout = CONFIG_NFS_TIMEOUT;
-static char dirfh[NFS_FHSIZE]; /* NFSv2 / NFSv3 file handle of directory */
+static char dirfh[NFS3_FHSIZE]; /* NFSv2 / NFSv3 file handle of directory */
+static unsigned int dirfh3_length; /* (variable) length of dirfh when NFSv3 */
static char filefh[NFS3_FHSIZE]; /* NFSv2 / NFSv3 file handle */
static unsigned int filefh3_length; /* (variable) length of filefh when NFSv3 */
@@ -377,9 +377,9 @@
rpc_req(PROG_NFS, NFS_LOOKUP, data, len);
} else { /* NFS_V3 */
- *p++ = htonl(NFS_FHSIZE); /* Dir handle length */
- memcpy(p, dirfh, NFS_FHSIZE);
- p += (NFS_FHSIZE / 4);
+ *p++ = htonl(dirfh3_length); /* Dir handle length */
+ memcpy(p, dirfh, dirfh3_length);
+ p += (dirfh3_length / 4);
*p++ = htonl(fnamelen);
if (fnamelen & 3)
*(p + fnamelen / 4) = 0;
@@ -565,7 +565,14 @@
fs_mounted = 1;
/* NFSv2 and NFSv3 use same structure */
- memcpy(dirfh, rpc_pkt.u.reply.data + 1, NFS_FHSIZE);
+ if (choosen_nfs_version != NFS_V3) {
+ memcpy(dirfh, rpc_pkt.u.reply.data + 1, NFS_FHSIZE);
+ } else {
+ dirfh3_length = ntohl(rpc_pkt.u.reply.data[1]);
+ if (dirfh3_length > NFS3_FHSIZE)
+ dirfh3_length = NFS3_FHSIZE;
+ memcpy(dirfh, rpc_pkt.u.reply.data + 2, dirfh3_length);
+ }
return 0;
}
diff --git a/net/pcap.c b/net/pcap.c
index 4036d8a..c959e3e 100644
--- a/net/pcap.c
+++ b/net/pcap.c
@@ -3,10 +3,10 @@
* Copyright 2019 Ramon Fried <rfried.dev@gmail.com>
*/
-#include <common.h>
#include <net.h>
#include <net/pcap.h>
#include <time.h>
+#include <linux/errno.h>
#include <asm/io.h>
#define LINKTYPE_ETHERNET 1
diff --git a/net/ping6.c b/net/ping6.c
index 4882a17..2479e08 100644
--- a/net/ping6.c
+++ b/net/ping6.c
@@ -9,7 +9,6 @@
/* Simple ping6 implementation */
-#include <common.h>
#include <net.h>
#include <net6.h>
#include "ndisc.h"
diff --git a/net/rarp.c b/net/rarp.c
index 231b623..a6b564e 100644
--- a/net/rarp.c
+++ b/net/rarp.c
@@ -4,7 +4,6 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
#include <command.h>
#include <log.h>
#include <net.h>
diff --git a/net/sntp.c b/net/sntp.c
index dac0f8c..73d1d87 100644
--- a/net/sntp.c
+++ b/net/sntp.c
@@ -5,7 +5,6 @@
*
*/
-#include <common.h>
#include <command.h>
#include <dm.h>
#include <log.h>
diff --git a/net/tcp.c b/net/tcp.c
index a713e1d..b0cc8a1 100644
--- a/net/tcp.c
+++ b/net/tcp.c
@@ -17,7 +17,6 @@
* - TCP application (eg wget)
* Next Step HTTPS?
*/
-#include <common.h>
#include <command.h>
#include <console.h>
#include <env_internal.h>
diff --git a/net/tftp.c b/net/tftp.c
index 2e33541..6b16bdc 100644
--- a/net/tftp.c
+++ b/net/tftp.c
@@ -5,7 +5,6 @@
* Copyright 2011 Comelit Group SpA,
* Luca Ceresoli <luca.ceresoli@comelit.it>
*/
-#include <common.h>
#include <command.h>
#include <display_options.h>
#include <efi_loader.h>
diff --git a/net/udp.c b/net/udp.c
index a93822f..3716226 100644
--- a/net/udp.c
+++ b/net/udp.c
@@ -3,7 +3,6 @@
* Copyright (C) 2020 Philippe Reynes <philippe.reynes@softathome.com>
*/
-#include <common.h>
#include <net.h>
#include <net/udp.h>
diff --git a/net/wget.c b/net/wget.c
index 817c5eb..f1dd7ab 100644
--- a/net/wget.c
+++ b/net/wget.c
@@ -6,7 +6,6 @@
#include <asm/global_data.h>
#include <command.h>
-#include <common.h>
#include <display_options.h>
#include <env.h>
#include <image.h>
@@ -50,6 +49,7 @@
static unsigned int packets;
static unsigned int initial_data_seq_num;
+static unsigned int next_data_seq_num;
static enum wget_state current_wget_state;
@@ -272,17 +272,18 @@
current_wget_state = WGET_TRANSFERRING;
+ initial_data_seq_num = tcp_seq_num + hlen;
+ next_data_seq_num = tcp_seq_num + len;
+
if (strstr((char *)pkt, http_ok) == 0) {
debug_cond(DEBUG_WGET,
"wget: Connected Bad Xfer\n");
- initial_data_seq_num = tcp_seq_num + hlen;
wget_loop_state = NETLOOP_FAIL;
wget_send(action, tcp_seq_num, tcp_ack_num, len);
} else {
debug_cond(DEBUG_WGET,
"wget: Connctd pkt %p hlen %x\n",
pkt, hlen);
- initial_data_seq_num = tcp_seq_num + hlen;
pos = strstr((char *)pkt, content_len);
if (!pos) {
@@ -396,9 +397,13 @@
"wget: Transferring, seq=%x, ack=%x,len=%x\n",
tcp_seq_num, tcp_ack_num, len);
- if (tcp_seq_num >= initial_data_seq_num &&
- store_block(pkt, tcp_seq_num - initial_data_seq_num,
- len) != 0) {
+ if (next_data_seq_num != tcp_seq_num) {
+ debug_cond(DEBUG_WGET, "wget: seq=%x packet was lost\n", next_data_seq_num);
+ return;
+ }
+ next_data_seq_num = tcp_seq_num + len;
+
+ if (store_block(pkt, tcp_seq_num - initial_data_seq_num, len) != 0) {
wget_fail("wget: store error\n",
tcp_seq_num, tcp_ack_num, action);
net_set_state(NETLOOP_FAIL);
diff --git a/net/wol.c b/net/wol.c
index 0a62566..96478ba 100644
--- a/net/wol.c
+++ b/net/wol.c
@@ -3,7 +3,6 @@
* Copyright 2018 Lothar Felten, lothar.felten@gmail.com
*/
-#include <common.h>
#include <command.h>
#include <env.h>
#include <net.h>
diff --git a/post/cpu/mpc83xx/ecc.c b/post/cpu/mpc83xx/ecc.c
index 68da8ff..766eafa 100644
--- a/post/cpu/mpc83xx/ecc.c
+++ b/post/cpu/mpc83xx/ecc.c
@@ -8,7 +8,7 @@
* Dave Liu <daveliu@freescale.com>
*/
-#include <common.h>
+#include <config.h>
#include <cpu_func.h>
#include <irq_func.h>
#include <log.h>
diff --git a/post/drivers/flash.c b/post/drivers/flash.c
index a1fcf1f..21e2f94 100644
--- a/post/drivers/flash.c
+++ b/post/drivers/flash.c
@@ -7,7 +7,7 @@
*/
#if CFG_POST & CFG_SYS_POST_FLASH
-#include <common.h>
+#include <config.h>
#include <malloc.h>
#include <post.h>
#include <flash.h>
diff --git a/post/drivers/i2c.c b/post/drivers/i2c.c
index 557d632..11c3c83 100644
--- a/post/drivers/i2c.c
+++ b/post/drivers/i2c.c
@@ -21,7 +21,7 @@
* #endif
*/
-#include <common.h>
+#include <config.h>
#include <log.h>
#include <post.h>
#include <i2c.h>
diff --git a/post/drivers/memory.c b/post/drivers/memory.c
index 1be2b41..8d4ae6f 100644
--- a/post/drivers/memory.c
+++ b/post/drivers/memory.c
@@ -4,7 +4,7 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
+#include <config.h>
#include <log.h>
#include <asm/global_data.h>
diff --git a/post/drivers/rtc.c b/post/drivers/rtc.c
index cc7a498..030954e 100644
--- a/post/drivers/rtc.c
+++ b/post/drivers/rtc.c
@@ -4,7 +4,7 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
+#include <config.h>
/*
* RTC test
diff --git a/post/lib_powerpc/andi.c b/post/lib_powerpc/andi.c
index 4f30216..3f525f5 100644
--- a/post/lib_powerpc/andi.c
+++ b/post/lib_powerpc/andi.c
@@ -4,7 +4,7 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
+#include <config.h>
#include <irq_func.h>
/*
diff --git a/post/lib_powerpc/b.c b/post/lib_powerpc/b.c
index 0ec032d..9c9931c 100644
--- a/post/lib_powerpc/b.c
+++ b/post/lib_powerpc/b.c
@@ -4,7 +4,7 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
+#include <config.h>
#include <irq_func.h>
/*
diff --git a/post/lib_powerpc/cmp.c b/post/lib_powerpc/cmp.c
index 57f2b96..9237dd5 100644
--- a/post/lib_powerpc/cmp.c
+++ b/post/lib_powerpc/cmp.c
@@ -4,7 +4,7 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
+#include <config.h>
#include <irq_func.h>
/*
diff --git a/post/lib_powerpc/cmpi.c b/post/lib_powerpc/cmpi.c
index 6e2bd63..6436586 100644
--- a/post/lib_powerpc/cmpi.c
+++ b/post/lib_powerpc/cmpi.c
@@ -4,7 +4,7 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
+#include <config.h>
#include <irq_func.h>
/*
diff --git a/post/lib_powerpc/complex.c b/post/lib_powerpc/complex.c
index 751bce6..2899dec 100644
--- a/post/lib_powerpc/complex.c
+++ b/post/lib_powerpc/complex.c
@@ -4,7 +4,7 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
+#include <config.h>
#include <irq_func.h>
/*
diff --git a/post/lib_powerpc/cpu.c b/post/lib_powerpc/cpu.c
index 98a8c63..e41e6b3 100644
--- a/post/lib_powerpc/cpu.c
+++ b/post/lib_powerpc/cpu.c
@@ -4,7 +4,7 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
+#include <config.h>
#include <cpu_func.h>
/*
diff --git a/post/lib_powerpc/cr.c b/post/lib_powerpc/cr.c
index 3c7b611..1e011f1 100644
--- a/post/lib_powerpc/cr.c
+++ b/post/lib_powerpc/cr.c
@@ -4,7 +4,7 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
+#include <config.h>
#include <irq_func.h>
/*
diff --git a/post/lib_powerpc/fpu/20001122-1.c b/post/lib_powerpc/fpu/20001122-1.c
index 9c1c886..d6b7bc6 100644
--- a/post/lib_powerpc/fpu/20001122-1.c
+++ b/post/lib_powerpc/fpu/20001122-1.c
@@ -7,7 +7,7 @@
* This file is originally a part of the GCC testsuite.
*/
-#include <common.h>
+#include <config.h>
#include <post.h>
diff --git a/post/lib_powerpc/fpu/20010114-2.c b/post/lib_powerpc/fpu/20010114-2.c
index 01bac50..5e79c4c 100644
--- a/post/lib_powerpc/fpu/20010114-2.c
+++ b/post/lib_powerpc/fpu/20010114-2.c
@@ -7,7 +7,7 @@
* This file is originally a part of the GCC testsuite.
*/
-#include <common.h>
+#include <config.h>
#include <post.h>
diff --git a/post/lib_powerpc/fpu/20010226-1.c b/post/lib_powerpc/fpu/20010226-1.c
index cc4aa0d..a65ffce 100644
--- a/post/lib_powerpc/fpu/20010226-1.c
+++ b/post/lib_powerpc/fpu/20010226-1.c
@@ -7,7 +7,7 @@
* This file is originally a part of the GCC testsuite.
*/
-#include <common.h>
+#include <config.h>
#include <post.h>
diff --git a/post/lib_powerpc/fpu/980619-1.c b/post/lib_powerpc/fpu/980619-1.c
index 111a201..8ad256e 100644
--- a/post/lib_powerpc/fpu/980619-1.c
+++ b/post/lib_powerpc/fpu/980619-1.c
@@ -7,7 +7,7 @@
* This file is originally a part of the GCC testsuite.
*/
-#include <common.h>
+#include <config.h>
#include <post.h>
diff --git a/post/lib_powerpc/fpu/acc1.c b/post/lib_powerpc/fpu/acc1.c
index 63cc3ee..408c391 100644
--- a/post/lib_powerpc/fpu/acc1.c
+++ b/post/lib_powerpc/fpu/acc1.c
@@ -7,7 +7,7 @@
* This file is originally a part of the GCC testsuite.
*/
-#include <common.h>
+#include <config.h>
#include <post.h>
diff --git a/post/lib_powerpc/fpu/compare-fp-1.c b/post/lib_powerpc/fpu/compare-fp-1.c
index 4b45896..4b8537e 100644
--- a/post/lib_powerpc/fpu/compare-fp-1.c
+++ b/post/lib_powerpc/fpu/compare-fp-1.c
@@ -9,7 +9,7 @@
* This file is originally a part of the GCC testsuite.
*/
-#include <common.h>
+#include <config.h>
#include <post.h>
diff --git a/post/lib_powerpc/fpu/fpu.c b/post/lib_powerpc/fpu/fpu.c
index 59109f7..2afe27a 100644
--- a/post/lib_powerpc/fpu/fpu.c
+++ b/post/lib_powerpc/fpu/fpu.c
@@ -6,7 +6,7 @@
* Author: Sergei Poselenov <sposelenov@emcraft.com>
*/
-#include <common.h>
+#include <config.h>
/*
* FPU test
diff --git a/post/lib_powerpc/fpu/mul-subnormal-single-1.c b/post/lib_powerpc/fpu/mul-subnormal-single-1.c
index 891aa95..6b86e55 100644
--- a/post/lib_powerpc/fpu/mul-subnormal-single-1.c
+++ b/post/lib_powerpc/fpu/mul-subnormal-single-1.c
@@ -9,7 +9,7 @@
* numbers) are rounded to within 0.5 ulp. PR other/14354.
*/
-#include <common.h>
+#include <config.h>
#include <post.h>
diff --git a/post/lib_powerpc/load.c b/post/lib_powerpc/load.c
index e4ac6bf..0a2a422 100644
--- a/post/lib_powerpc/load.c
+++ b/post/lib_powerpc/load.c
@@ -4,7 +4,7 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
+#include <config.h>
#include <irq_func.h>
/*
diff --git a/post/lib_powerpc/multi.c b/post/lib_powerpc/multi.c
index 4df4579..6f99144 100644
--- a/post/lib_powerpc/multi.c
+++ b/post/lib_powerpc/multi.c
@@ -4,7 +4,7 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
+#include <config.h>
#include <irq_func.h>
#include <log.h>
diff --git a/post/lib_powerpc/rlwimi.c b/post/lib_powerpc/rlwimi.c
index da21913..35a9e9b 100644
--- a/post/lib_powerpc/rlwimi.c
+++ b/post/lib_powerpc/rlwimi.c
@@ -4,7 +4,7 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
+#include <config.h>
#include <irq_func.h>
/*
diff --git a/post/lib_powerpc/rlwinm.c b/post/lib_powerpc/rlwinm.c
index b0b976f..2995eb3 100644
--- a/post/lib_powerpc/rlwinm.c
+++ b/post/lib_powerpc/rlwinm.c
@@ -4,7 +4,7 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
+#include <config.h>
#include <irq_func.h>
/*
diff --git a/post/lib_powerpc/rlwnm.c b/post/lib_powerpc/rlwnm.c
index 22cd456..3ba3a76 100644
--- a/post/lib_powerpc/rlwnm.c
+++ b/post/lib_powerpc/rlwnm.c
@@ -4,7 +4,7 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
+#include <config.h>
#include <irq_func.h>
/*
diff --git a/post/lib_powerpc/srawi.c b/post/lib_powerpc/srawi.c
index a103df7..bd59ac4 100644
--- a/post/lib_powerpc/srawi.c
+++ b/post/lib_powerpc/srawi.c
@@ -4,7 +4,7 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
+#include <config.h>
#include <irq_func.h>
/*
diff --git a/post/lib_powerpc/store.c b/post/lib_powerpc/store.c
index 71a4b6a..470ea37 100644
--- a/post/lib_powerpc/store.c
+++ b/post/lib_powerpc/store.c
@@ -4,7 +4,7 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
+#include <config.h>
#include <irq_func.h>
/*
diff --git a/post/lib_powerpc/string.c b/post/lib_powerpc/string.c
index 21e02bc..c4ea5cf 100644
--- a/post/lib_powerpc/string.c
+++ b/post/lib_powerpc/string.c
@@ -4,7 +4,7 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
+#include <config.h>
#include <irq_func.h>
/*
diff --git a/post/lib_powerpc/three.c b/post/lib_powerpc/three.c
index 68339b0..e65d7f0 100644
--- a/post/lib_powerpc/three.c
+++ b/post/lib_powerpc/three.c
@@ -4,7 +4,7 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
+#include <config.h>
#include <irq_func.h>
/*
diff --git a/post/lib_powerpc/threei.c b/post/lib_powerpc/threei.c
index 885dd8c..0c3a2e6 100644
--- a/post/lib_powerpc/threei.c
+++ b/post/lib_powerpc/threei.c
@@ -4,7 +4,7 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
+#include <config.h>
#include <irq_func.h>
/*
diff --git a/post/lib_powerpc/threex.c b/post/lib_powerpc/threex.c
index 62ac713..24ebc98 100644
--- a/post/lib_powerpc/threex.c
+++ b/post/lib_powerpc/threex.c
@@ -4,7 +4,7 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
+#include <config.h>
#include <irq_func.h>
/*
diff --git a/post/lib_powerpc/two.c b/post/lib_powerpc/two.c
index 7985669..28c70ec 100644
--- a/post/lib_powerpc/two.c
+++ b/post/lib_powerpc/two.c
@@ -4,7 +4,7 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
+#include <config.h>
#include <irq_func.h>
/*
diff --git a/post/lib_powerpc/twox.c b/post/lib_powerpc/twox.c
index 33d1a1d..7f6a898 100644
--- a/post/lib_powerpc/twox.c
+++ b/post/lib_powerpc/twox.c
@@ -4,7 +4,7 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
+#include <config.h>
#include <irq_func.h>
/*
diff --git a/post/post.c b/post/post.c
index 946d909..705f94c 100644
--- a/post/post.c
+++ b/post/post.c
@@ -4,7 +4,7 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
+#include <config.h>
#include <bootstage.h>
#include <env.h>
#include <log.h>
diff --git a/post/tests.c b/post/tests.c
index 8cea428..208710a 100644
--- a/post/tests.c
+++ b/post/tests.c
@@ -4,7 +4,8 @@
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
-#include <common.h>
+#include <config.h>
+#include <linux/kernel.h>
#include <post.h>
diff --git a/scripts/Makefile.autoconf b/scripts/Makefile.autoconf
index 8208ffe..b42f9b5 100644
--- a/scripts/Makefile.autoconf
+++ b/scripts/Makefile.autoconf
@@ -45,7 +45,7 @@
quiet_cmd_autoconf_dep = GEN $@
cmd_autoconf_dep = $(CC) -x c -DDO_DEPS_ONLY -M -MP $(c_flags) \
- -MQ include/config/auto.conf $(srctree)/include/common.h > $@ || { \
+ -MQ include/config/auto.conf include/config.h > $@ || { \
rm $@; false; \
}
include/autoconf.mk.dep: include/config.h FORCE
@@ -70,7 +70,7 @@
quiet_cmd_u_boot_cfg = CFG $@
cmd_u_boot_cfg = \
- $(CPP) $(c_flags) $2 -DDO_DEPS_ONLY -dM $(srctree)/include/common.h > $@.tmp && { \
+ $(CPP) $(c_flags) $2 -DDO_DEPS_ONLY -dM include/config.h > $@.tmp && { \
grep 'define CONFIG_' $@.tmp | \
sed '/define CONFIG_IS_ENABLED(/d;/define CONFIG_IF_ENABLED_INT(/d;/define CONFIG_VAL(/d;' > $@; \
rm $@.tmp; \
diff --git a/scripts/Makefile.dts b/scripts/Makefile.dts
index 5e2429c..790f3c5 100644
--- a/scripts/Makefile.dts
+++ b/scripts/Makefile.dts
@@ -1,3 +1,16 @@
# SPDX-License-Identifier: GPL-2.0+
dtb-y += $(patsubst %,%.dtb,$(subst ",,$(CONFIG_DEFAULT_DEVICE_TREE) $(CONFIG_OF_LIST) $(CONFIG_SPL_OF_LIST)))
+
+ifeq ($(CONFIG_OF_UPSTREAM_BUILD_VENDOR),y)
+ifeq ($(CONFIG_ARM64),y)
+dt_dir := $(srctree)/dts/upstream/src/arm64
+else
+dt_dir := $(srctree)/dts/upstream/src/$(ARCH)
+endif
+
+dtb-vendor_dts := $(patsubst %.dts,%.dtb,$(wildcard $(dt_dir)/$(subst ",,$(CONFIG_OF_UPSTREAM_VENDOR))/*.dts))
+
+dtb-y += $(subst $(dt_dir)/,,$(dtb-vendor_dts))
+
+endif
diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib
index 1285731..62f8751 100644
--- a/scripts/Makefile.lib
+++ b/scripts/Makefile.lib
@@ -334,7 +334,7 @@
(cat $< > $(pre-tmp)); \
$(foreach f,$(subst $(quote),,$(dtsi_include_list)), \
echo '$(pound)include "$(f)"' >> $(pre-tmp);) \
- $(HOSTCC) -E $(dtc_cpp_flags) -x assembler-with-cpp -o $(dtc-tmp) $(pre-tmp) ; \
+ $(HOSTCC) -E $(dtc_cpp_flags) -I$(obj) -x assembler-with-cpp -o $(dtc-tmp) $(pre-tmp) ; \
$(DTC) -O dtb -o $@ -b 0 \
-i $(dir $<) -i $(u_boot_dtsi_loc) $(DTC_FLAGS) \
-d $(depfile).dtc.tmp $(dtc-tmp) || \
diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl
index d074ba2..1868f1b 100644
--- a/scripts/Makefile.spl
+++ b/scripts/Makefile.spl
@@ -381,6 +381,11 @@
$(objtree)/tools/mkexynosspl) $(VAR_SIZE_PARAM) $< $@
endif
+$(obj)/u-boot-spl.ldr: $(obj)/u-boot-spl
+ $(CREATE_LDR_ENV)
+ $(LDR) -T $(CONFIG_LDR_CPU) -c $@ $< $(LDR_FLAGS)
+ $(BOARD_SIZE_CHECK)
+
quiet_cmd_objcopy = OBJCOPY $@
cmd_objcopy = $(OBJCOPY) $(OBJCOPYFLAGS) $(OBJCOPYFLAGS_$(@F)) $< $@
@@ -575,7 +580,7 @@
SPL_OF_LIST_TARGETS = $(patsubst %,dts/%.dtb,$(subst ",,$(CONFIG_SPL_OF_LIST)))
SHRUNK_ARCH_DTB = $(addprefix $(obj)/,$(SPL_OF_LIST_TARGETS))
-$(dir $(SHRUNK_ARCH_DTB)):
+$(sort $(dir $(SHRUNK_ARCH_DTB))):
$(shell [ -d $@ ] || mkdir -p $@)
.SECONDEXPANSION:
diff --git a/scripts/gen_ll_addressable_symbols.sh b/scripts/gen_ll_addressable_symbols.sh
index d086480..13f670a 100755
--- a/scripts/gen_ll_addressable_symbols.sh
+++ b/scripts/gen_ll_addressable_symbols.sh
@@ -10,6 +10,6 @@
set -e
-echo '#include <common.h>'
+echo '#include <linux/compiler.h>'
$@ 2>/dev/null | grep -oe '_u_boot_list_2_[a-zA-Z0-9_]*_2_[a-zA-Z0-9_]*' | \
sort -u | sed -e 's/^\(.*\)/extern char \1[];\n__ADDRESSABLE(\1);/'
diff --git a/test/bloblist.c b/test/bloblist.c
index 1c60bba..7c63682 100644
--- a/test/bloblist.c
+++ b/test/bloblist.c
@@ -3,7 +3,6 @@
* Copyright (c) 2018, Google Inc. All rights reserved.
*/
-#include <common.h>
#include <bloblist.h>
#include <log.h>
#include <mapmem.h>
diff --git a/test/boot/bootdev.c b/test/boot/bootdev.c
index 0702fcc..6e94000 100644
--- a/test/boot/bootdev.c
+++ b/test/boot/bootdev.c
@@ -6,7 +6,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <bootstd.h>
#include <dm.h>
#include <bootdev.h>
diff --git a/test/boot/bootflow.c b/test/boot/bootflow.c
index 4845b71..4511cfa 100644
--- a/test/boot/bootflow.c
+++ b/test/boot/bootflow.c
@@ -6,13 +6,13 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <bootdev.h>
#include <bootflow.h>
#include <bootmeth.h>
#include <bootstd.h>
#include <cli.h>
#include <dm.h>
+#include <efi_default_filename.h>
#include <expo.h>
#ifdef CONFIG_SANDBOX
#include <asm/test.h>
@@ -179,7 +179,8 @@
ut_assert_nextline(" 3 efi media mmc 0 mmc1.bootdev.whole ");
ut_assert_nextline(" ** No partition found, err=-2: No such file or directory");
ut_assert_nextline(" 4 extlinux ready mmc 1 mmc1.bootdev.part_1 /extlinux/extlinux.conf");
- ut_assert_nextline(" 5 efi fs mmc 1 mmc1.bootdev.part_1 efi/boot/bootsbox.efi");
+ ut_assert_nextline(" 5 efi fs mmc 1 mmc1.bootdev.part_1 /EFI/BOOT/"
+ BOOTEFI_NAME);
ut_assert_skip_to_line("Scanning bootdev 'mmc0.bootdev':");
ut_assert_skip_to_line(
@@ -377,7 +378,7 @@
if (!IS_ENABLED(CONFIG_EFI_BOOTMGR))
return -EAGAIN;
ut_assertok(uclass_first_device_err(UCLASS_BOOTSTD, &bootstd));
- ut_assertok(device_bind(bootstd, DM_DRIVER_GET(bootmeth_efi_mgr),
+ ut_assertok(device_bind(bootstd, DM_DRIVER_GET(bootmeth_3efi_mgr),
"efi_mgr", 0, ofnode_null(), &dev));
ut_assertok(device_probe(dev));
sandbox_set_fake_efi_mgr_dev(dev, true);
diff --git a/test/boot/bootmeth.c b/test/boot/bootmeth.c
index e498eee..113b789 100644
--- a/test/boot/bootmeth.c
+++ b/test/boot/bootmeth.c
@@ -6,7 +6,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <bootmeth.h>
#include <bootstd.h>
#include <dm.h>
diff --git a/test/boot/bootstd_common.c b/test/boot/bootstd_common.c
index cc97e25..e505395 100644
--- a/test/boot/bootstd_common.c
+++ b/test/boot/bootstd_common.c
@@ -6,7 +6,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <bootdev.h>
#include <bootstd.h>
#include <dm.h>
diff --git a/test/boot/cedit.c b/test/boot/cedit.c
index aa41719..fd19da0 100644
--- a/test/boot/cedit.c
+++ b/test/boot/cedit.c
@@ -4,7 +4,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <cedit.h>
#include <env.h>
#include <expo.h>
diff --git a/test/boot/expo.c b/test/boot/expo.c
index 714fdfa..6ea0184 100644
--- a/test/boot/expo.c
+++ b/test/boot/expo.c
@@ -4,7 +4,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <command.h>
#include <dm.h>
#include <expo.h>
diff --git a/test/boot/image.c b/test/boot/image.c
index 2844b05..0894e30 100644
--- a/test/boot/image.c
+++ b/test/boot/image.c
@@ -6,7 +6,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <image.h>
#include <test/suites.h>
#include <test/ut.h>
diff --git a/test/boot/measurement.c b/test/boot/measurement.c
index 9db2ed3..29be495 100644
--- a/test/boot/measurement.c
+++ b/test/boot/measurement.c
@@ -6,7 +6,6 @@
* Written by Eddie James <eajames@linux.ibm.com>
*/
-#include <common.h>
#include <bootm.h>
#include <malloc.h>
#include <test/suites.h>
diff --git a/test/boot/vbe_fixup.c b/test/boot/vbe_fixup.c
index eba5c4e..540816e 100644
--- a/test/boot/vbe_fixup.c
+++ b/test/boot/vbe_fixup.c
@@ -6,7 +6,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <dm/ofnode.h>
#include <linux/libfdt.h>
#include <test/test.h>
diff --git a/test/boot/vbe_simple.c b/test/boot/vbe_simple.c
index 5e61840..3672b74 100644
--- a/test/boot/vbe_simple.c
+++ b/test/boot/vbe_simple.c
@@ -6,7 +6,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <bootmeth.h>
#include <dm.h>
#include <image.h>
diff --git a/test/bootm.c b/test/bootm.c
index 4bb3ca0..26c1555 100644
--- a/test/bootm.c
+++ b/test/bootm.c
@@ -5,7 +5,6 @@
* Copyright 2020 Google LLC
*/
-#include <common.h>
#include <bootm.h>
#include <asm/global_data.h>
#include <test/suites.h>
diff --git a/test/cmd/addrmap.c b/test/cmd/addrmap.c
index 1eb5955..7b8f49f 100644
--- a/test/cmd/addrmap.c
+++ b/test/cmd/addrmap.c
@@ -5,7 +5,6 @@
* Copyright (C) 2021, Bin Meng <bmeng.cn@gmail.com>
*/
-#include <common.h>
#include <console.h>
#include <test/suites.h>
#include <test/ut.h>
diff --git a/test/cmd/armffa.c b/test/cmd/armffa.c
index 9a44a39..38f40b7 100644
--- a/test/cmd/armffa.c
+++ b/test/cmd/armffa.c
@@ -8,7 +8,6 @@
* Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
*/
-#include <common.h>
#include <string.h>
#include <asm/sandbox_arm_ffa.h>
#include <dm/test.h>
diff --git a/test/cmd/bdinfo.c b/test/cmd/bdinfo.c
index 4977d01..027848c 100644
--- a/test/cmd/bdinfo.c
+++ b/test/cmd/bdinfo.c
@@ -5,7 +5,6 @@
* Copyright 2023 Marek Vasut <marek.vasut+renesas@mailbox.org>
*/
-#include <common.h>
#include <console.h>
#include <mapmem.h>
#include <asm/global_data.h>
diff --git a/test/cmd/exit.c b/test/cmd/exit.c
index 7e160f7..d310ec8 100644
--- a/test/cmd/exit.c
+++ b/test/cmd/exit.c
@@ -5,7 +5,6 @@
* Copyright 2022 Marek Vasut <marex@denx.de>
*/
-#include <common.h>
#include <console.h>
#include <mapmem.h>
#include <asm/global_data.h>
diff --git a/test/cmd/fdt.c b/test/cmd/fdt.c
index 5470855..a0faf5a 100644
--- a/test/cmd/fdt.c
+++ b/test/cmd/fdt.c
@@ -5,7 +5,6 @@
* Copyright 2022 Google LLC
*/
-#include <common.h>
#include <console.h>
#include <fdt_support.h>
#include <mapmem.h>
diff --git a/test/cmd/font.c b/test/cmd/font.c
index 1fe05c1..a8905ce 100644
--- a/test/cmd/font.c
+++ b/test/cmd/font.c
@@ -5,7 +5,6 @@
* Copyright 2022 Google LLC
*/
-#include <common.h>
#include <console.h>
#include <dm.h>
#include <video_console.h>
diff --git a/test/cmd/history.c b/test/cmd/history.c
index 06517fc..6964bfa 100644
--- a/test/cmd/history.c
+++ b/test/cmd/history.c
@@ -6,7 +6,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <cli.h>
#include <command.h>
#include <test/lib.h>
diff --git a/test/cmd/loadm.c b/test/cmd/loadm.c
index 41e005a..dff8a97 100644
--- a/test/cmd/loadm.c
+++ b/test/cmd/loadm.c
@@ -9,7 +9,6 @@
* Rui Miguel Silva <rui.silva@linaro.org>
*/
-#include <common.h>
#include <console.h>
#include <mapmem.h>
#include <asm/global_data.h>
diff --git a/test/cmd/mem.c b/test/cmd/mem.c
index d76f47c..f1bbab6 100644
--- a/test/cmd/mem.c
+++ b/test/cmd/mem.c
@@ -5,7 +5,6 @@
* Copyright 2020 Google LLC
*/
-#include <common.h>
#include <command.h>
#include <test/suites.h>
#include <test/test.h>
diff --git a/test/cmd/mem_search.c b/test/cmd/mem_search.c
index f80c9c4..55ad2fa 100644
--- a/test/cmd/mem_search.c
+++ b/test/cmd/mem_search.c
@@ -6,7 +6,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <console.h>
#include <mapmem.h>
#include <dm/test.h>
diff --git a/test/cmd/pci_mps.c b/test/cmd/pci_mps.c
index fd96f4f..2a64143 100644
--- a/test/cmd/pci_mps.c
+++ b/test/cmd/pci_mps.c
@@ -7,7 +7,6 @@
* Written by Stephen Carlson <stcarlso@linux.microsoft.com>
*/
-#include <common.h>
#include <console.h>
#include <test/suites.h>
#include <test/ut.h>
diff --git a/test/cmd/pinmux.c b/test/cmd/pinmux.c
index df40bb7..4253baa 100644
--- a/test/cmd/pinmux.c
+++ b/test/cmd/pinmux.c
@@ -5,7 +5,6 @@
* Copyright (C) 2021, STMicroelectronics - All Rights Reserved
*/
-#include <common.h>
#include <command.h>
#include <dm.h>
#include <dm/test.h>
diff --git a/test/cmd/rw.c b/test/cmd/rw.c
index 98302bf..edd762e 100644
--- a/test/cmd/rw.c
+++ b/test/cmd/rw.c
@@ -3,7 +3,6 @@
* Tests for read and write commands
*/
-#include <common.h>
#include <dm/test.h>
#include <mapmem.h>
#include <part.h>
diff --git a/test/cmd/seama.c b/test/cmd/seama.c
index b1b5693..b60f655 100644
--- a/test/cmd/seama.c
+++ b/test/cmd/seama.c
@@ -5,7 +5,6 @@
* Copyright (C) 2021 Linus Walleij <linus.walleij@linaro.org>
*/
-#include <common.h>
#include <command.h>
#include <dm.h>
#include <test/suites.h>
diff --git a/test/cmd/setexpr.c b/test/cmd/setexpr.c
index ee329e9..d50ce58 100644
--- a/test/cmd/setexpr.c
+++ b/test/cmd/setexpr.c
@@ -6,7 +6,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <console.h>
#include <mapmem.h>
#include <dm/test.h>
diff --git a/test/cmd/temperature.c b/test/cmd/temperature.c
index 2a1ea06..3649726 100644
--- a/test/cmd/temperature.c
+++ b/test/cmd/temperature.c
@@ -5,7 +5,6 @@
* Copyright (C) 2022 Sartura Ltd.
*/
-#include <common.h>
#include <command.h>
#include <dm.h>
#include <dm/test.h>
diff --git a/test/cmd/test_echo.c b/test/cmd/test_echo.c
index 091e4f8..cde74eb 100644
--- a/test/cmd/test_echo.c
+++ b/test/cmd/test_echo.c
@@ -5,7 +5,6 @@
* Copyright 2020, Heinrich Schuchadt <xypron.glpk@gmx.de>
*/
-#include <common.h>
#include <command.h>
#include <asm/global_data.h>
#include <display_options.h>
diff --git a/test/cmd/test_pause.c b/test/cmd/test_pause.c
index 2b85cce..3703290 100644
--- a/test/cmd/test_pause.c
+++ b/test/cmd/test_pause.c
@@ -5,7 +5,6 @@
* Copyright 2022, Samuel Dionne-Riel <samuel@dionne-riel.com>
*/
-#include <common.h>
#include <asm/global_data.h>
#include <test/lib.h>
#include <test/ut.h>
diff --git a/test/cmd/wget.c b/test/cmd/wget.c
index ed83fc9..356a4dc 100644
--- a/test/cmd/wget.c
+++ b/test/cmd/wget.c
@@ -6,7 +6,6 @@
* Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
*/
-#include <common.h>
#include <command.h>
#include <dm.h>
#include <env.h>
diff --git a/test/cmd_ut.c b/test/cmd_ut.c
index 0677ce0..4e4aa8f 100644
--- a/test/cmd_ut.c
+++ b/test/cmd_ut.c
@@ -4,9 +4,9 @@
* Joe Hershberger, National Instruments, joe.hershberger@ni.com
*/
-#include <common.h>
#include <command.h>
#include <console.h>
+#include <vsprintf.h>
#include <test/suites.h>
#include <test/test.h>
#include <test/ut.h>
diff --git a/test/command_ut.c b/test/command_ut.c
index a74bd10..2b8d28d 100644
--- a/test/command_ut.c
+++ b/test/command_ut.c
@@ -5,7 +5,6 @@
#define DEBUG
-#include <common.h>
#include <command.h>
#include <env.h>
#include <log.h>
diff --git a/test/common/cmd_ut_common.c b/test/common/cmd_ut_common.c
index 2c02678..2f03a58 100644
--- a/test/common/cmd_ut_common.c
+++ b/test/common/cmd_ut_common.c
@@ -6,7 +6,6 @@
* Unit tests for common functions
*/
-#include <common.h>
#include <command.h>
#include <test/common.h>
#include <test/suites.h>
diff --git a/test/common/cread.c b/test/common/cread.c
index 4edc773..e159cae 100644
--- a/test/common/cread.c
+++ b/test/common/cread.c
@@ -3,8 +3,8 @@
* Copyright 2023 Google LLC
*/
-#include <common.h>
#include <cli.h>
+#include <time.h>
#include <test/common.h>
#include <test/test.h>
#include <test/ut.h>
diff --git a/test/common/cyclic.c b/test/common/cyclic.c
index 6e758e8..461f8cf 100644
--- a/test/common/cyclic.c
+++ b/test/common/cyclic.c
@@ -3,7 +3,6 @@
* Copyright (C) 2022 Stefan Roese <sr@denx.de>
*/
-#include <common.h>
#include <cyclic.h>
#include <dm.h>
#include <test/common.h>
diff --git a/test/common/event.c b/test/common/event.c
index b462694..de433d3 100644
--- a/test/common/event.c
+++ b/test/common/event.c
@@ -6,7 +6,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <dm.h>
#include <event.h>
#include <test/common.h>
diff --git a/test/common/test_autoboot.c b/test/common/test_autoboot.c
index 42a1e4a..4ba1dcc 100644
--- a/test/common/test_autoboot.c
+++ b/test/common/test_autoboot.c
@@ -6,7 +6,6 @@
*/
#include <autoboot.h>
-#include <common.h>
#include <test/common.h>
#include <test/test.h>
#include <test/ut.h>
diff --git a/test/compression.c b/test/compression.c
index 3df9081..aa1d38b 100644
--- a/test/compression.c
+++ b/test/compression.c
@@ -3,7 +3,6 @@
* Copyright (c) 2013, The Chromium Authors
*/
-#include <common.h>
#include <abuf.h>
#include <bootm.h>
#include <command.h>
diff --git a/test/dm/Makefile b/test/dm/Makefile
index a3ce7b3..c12589d 100644
--- a/test/dm/Makefile
+++ b/test/dm/Makefile
@@ -102,7 +102,7 @@
obj-$(CONFIG_SYSRESET) += sysreset.o
obj-$(CONFIG_DM_REGULATOR) += regulator.o
obj-$(CONFIG_CMD_RKMTD) += rkmtd.o
-obj-$(CONFIG_DM_RNG) += rng.o
+obj-$(CONFIG_$(SPL_TPL_)DM_RNG) += rng.o
obj-$(CONFIG_DM_RTC) += rtc.o
obj-$(CONFIG_SCMI_FIRMWARE) += scmi.o
obj-$(CONFIG_SCSI) += scsi.o
diff --git a/test/dm/acpi.c b/test/dm/acpi.c
index f14b396..4db2171 100644
--- a/test/dm/acpi.c
+++ b/test/dm/acpi.c
@@ -6,7 +6,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <console.h>
#include <dm.h>
#include <malloc.h>
diff --git a/test/dm/acpi_dp.c b/test/dm/acpi_dp.c
index 44bcabd..87bd8ae 100644
--- a/test/dm/acpi_dp.c
+++ b/test/dm/acpi_dp.c
@@ -6,7 +6,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <dm.h>
#include <uuid.h>
#include <acpi/acpigen.h>
diff --git a/test/dm/acpigen.c b/test/dm/acpigen.c
index 15b2b6f..7113219 100644
--- a/test/dm/acpigen.c
+++ b/test/dm/acpigen.c
@@ -6,7 +6,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <dm.h>
#include <irq.h>
#include <malloc.h>
diff --git a/test/dm/adc.c b/test/dm/adc.c
index 740167e..a26a677 100644
--- a/test/dm/adc.c
+++ b/test/dm/adc.c
@@ -6,7 +6,6 @@
* Przemyslaw Marczak <p.marczak@samsung.com>
*/
-#include <common.h>
#include <adc.h>
#include <dm.h>
#include <dm/root.h>
diff --git a/test/dm/audio.c b/test/dm/audio.c
index add15ae..3d1d821 100644
--- a/test/dm/audio.c
+++ b/test/dm/audio.c
@@ -4,7 +4,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <audio_codec.h>
#include <dm.h>
#include <dm/test.h>
diff --git a/test/dm/axi.c b/test/dm/axi.c
index dc029df..0900a9b 100644
--- a/test/dm/axi.c
+++ b/test/dm/axi.c
@@ -4,7 +4,6 @@
* Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc
*/
-#include <common.h>
#include <axi.h>
#include <dm.h>
#include <log.h>
diff --git a/test/dm/blk.c b/test/dm/blk.c
index 799f1e4..d03aec3 100644
--- a/test/dm/blk.c
+++ b/test/dm/blk.c
@@ -3,7 +3,6 @@
* Copyright (C) 2015 Google, Inc
*/
-#include <common.h>
#include <blk.h>
#include <dm.h>
#include <part.h>
diff --git a/test/dm/blkmap.c b/test/dm/blkmap.c
index 7a163d6..7581e62 100644
--- a/test/dm/blkmap.c
+++ b/test/dm/blkmap.c
@@ -4,7 +4,6 @@
* Author: Tobias Waldekranz <tobias@waldekranz.com>
*/
-#include <common.h>
#include <blk.h>
#include <blkmap.h>
#include <dm.h>
diff --git a/test/dm/bootcount.c b/test/dm/bootcount.c
index b77b472..9cfc7d4 100644
--- a/test/dm/bootcount.c
+++ b/test/dm/bootcount.c
@@ -3,7 +3,6 @@
* (C) 2018 Theobroma Systems Design und Consulting GmbH
*/
-#include <common.h>
#include <dm.h>
#include <bootcount.h>
#include <log.h>
diff --git a/test/dm/bus.c b/test/dm/bus.c
index 89a6aa6..a338c7f 100644
--- a/test/dm/bus.c
+++ b/test/dm/bus.c
@@ -3,7 +3,6 @@
* Copyright (c) 2014 Google, Inc
*/
-#include <common.h>
#ifdef CONFIG_SANDBOX
#include <log.h>
#include <os.h>
diff --git a/test/dm/button.c b/test/dm/button.c
index 830d96f..9157ec9 100644
--- a/test/dm/button.c
+++ b/test/dm/button.c
@@ -5,7 +5,6 @@
* Based on led.c
*/
-#include <common.h>
#include <dm.h>
#include <adc.h>
#include <button.h>
diff --git a/test/dm/cache.c b/test/dm/cache.c
index bbd8f98..d2f3bfe 100644
--- a/test/dm/cache.c
+++ b/test/dm/cache.c
@@ -3,7 +3,6 @@
* Copyright (C) 2019 Intel Corporation <www.intel.com>
*/
-#include <common.h>
#include <dm.h>
#include <dm/test.h>
diff --git a/test/dm/clk.c b/test/dm/clk.c
index 57fabbd..a966471 100644
--- a/test/dm/clk.c
+++ b/test/dm/clk.c
@@ -3,7 +3,6 @@
* Copyright (C) 2015 Google, Inc
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <log.h>
diff --git a/test/dm/clk_ccf.c b/test/dm/clk_ccf.c
index 61dad8d..15fba31 100644
--- a/test/dm/clk_ccf.c
+++ b/test/dm/clk_ccf.c
@@ -4,7 +4,6 @@
* Lukasz Majewski, DENX Software Engineering, lukma@denx.de
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <asm/clk.h>
diff --git a/test/dm/core.c b/test/dm/core.c
index 7f3f8d1..4741c81 100644
--- a/test/dm/core.c
+++ b/test/dm/core.c
@@ -5,7 +5,6 @@
* Copyright (c) 2013 Google, Inc
*/
-#include <common.h>
#include <errno.h>
#include <dm.h>
#include <fdtdec.h>
diff --git a/test/dm/cpu.c b/test/dm/cpu.c
index 5734cd0..acba810 100644
--- a/test/dm/cpu.c
+++ b/test/dm/cpu.c
@@ -4,7 +4,6 @@
* Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <dm/test.h>
diff --git a/test/dm/cros_ec.c b/test/dm/cros_ec.c
index 30cb70e..ac0055f 100644
--- a/test/dm/cros_ec.c
+++ b/test/dm/cros_ec.c
@@ -3,7 +3,6 @@
* Copyright 2021 Google LLC
*/
-#include <common.h>
#include <cros_ec.h>
#include <dm.h>
#include <asm/test.h>
diff --git a/test/dm/cros_ec_pwm.c b/test/dm/cros_ec_pwm.c
index f8d6e1e..f68ee6f 100644
--- a/test/dm/cros_ec_pwm.c
+++ b/test/dm/cros_ec_pwm.c
@@ -1,6 +1,5 @@
// SPDX-License-Identifier: GPL-2.0+
-#include <common.h>
#include <cros_ec.h>
#include <dm.h>
#include <pwm.h>
diff --git a/test/dm/devres.c b/test/dm/devres.c
index 3df0f64..95a470b 100644
--- a/test/dm/devres.c
+++ b/test/dm/devres.c
@@ -5,7 +5,6 @@
* Copyright 2019 Google LLC
*/
-#include <common.h>
#include <errno.h>
#include <dm.h>
#include <log.h>
diff --git a/test/dm/dma.c b/test/dm/dma.c
index cce47cb..949710f 100644
--- a/test/dm/dma.c
+++ b/test/dm/dma.c
@@ -6,7 +6,6 @@
* Grygorii Strashko <grygorii.strashko@ti.com>
*/
-#include <common.h>
#include <dm.h>
#include <malloc.h>
#include <dm/test.h>
diff --git a/test/dm/dsi_host.c b/test/dm/dsi_host.c
index 6e0a5df..68686a4 100644
--- a/test/dm/dsi_host.c
+++ b/test/dm/dsi_host.c
@@ -4,7 +4,6 @@
* Author(s): Yannick Fertre <yannick.fertre@st.com> for STMicroelectronics.
*/
-#include <common.h>
#include <dm.h>
#include <dsi_host.h>
#include <asm/state.h>
diff --git a/test/dm/efi_media.c b/test/dm/efi_media.c
index e343a0e..9d0ed0f 100644
--- a/test/dm/efi_media.c
+++ b/test/dm/efi_media.c
@@ -5,7 +5,6 @@
* Copyright 2021 Google LLC
*/
-#include <common.h>
#include <dm.h>
#include <asm/test.h>
#include <dm/test.h>
diff --git a/test/dm/eth.c b/test/dm/eth.c
index bb3dcc6..820b8cb 100644
--- a/test/dm/eth.c
+++ b/test/dm/eth.c
@@ -6,7 +6,6 @@
* Joe Hershberger <joe.hershberger@ni.com>
*/
-#include <common.h>
#include <dm.h>
#include <env.h>
#include <fdtdec.h>
diff --git a/test/dm/fastboot.c b/test/dm/fastboot.c
index 758538d..5d938eb 100644
--- a/test/dm/fastboot.c
+++ b/test/dm/fastboot.c
@@ -3,7 +3,6 @@
* Copyright (C) 2015 Google, Inc
*/
-#include <common.h>
#include <dm.h>
#include <fastboot.h>
#include <fb_mmc.h>
diff --git a/test/dm/fdtdec.c b/test/dm/fdtdec.c
index 087d484..b484414 100644
--- a/test/dm/fdtdec.c
+++ b/test/dm/fdtdec.c
@@ -3,7 +3,6 @@
* Copyright 2020 NXP
*/
-#include <common.h>
#include <dm.h>
#include <asm/global_data.h>
#include <dm/of_extra.h>
diff --git a/test/dm/ffa.c b/test/dm/ffa.c
index 6912666..fa6d54d 100644
--- a/test/dm/ffa.c
+++ b/test/dm/ffa.c
@@ -8,7 +8,6 @@
* Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
*/
-#include <common.h>
#include <console.h>
#include <dm.h>
#include <asm/sandbox_arm_ffa.h>
diff --git a/test/dm/firmware.c b/test/dm/firmware.c
index f37bccf..ec68e81 100644
--- a/test/dm/firmware.c
+++ b/test/dm/firmware.c
@@ -3,7 +3,6 @@
* Copyright (C) 2018 Xilinx, Inc.
*/
-#include <common.h>
#include <dm.h>
#include <syscon.h>
#include <asm/test.h>
diff --git a/test/dm/fwu_mdata.c b/test/dm/fwu_mdata.c
index 52018f6..43ce3d0 100644
--- a/test/dm/fwu_mdata.c
+++ b/test/dm/fwu_mdata.c
@@ -5,7 +5,6 @@
*/
#include <blk.h>
-#include <common.h>
#include <dm.h>
#include <fwu.h>
#include <fwu_mdata.h>
diff --git a/test/dm/gpio.c b/test/dm/gpio.c
index 0d88ec2..957ab25 100644
--- a/test/dm/gpio.c
+++ b/test/dm/gpio.c
@@ -3,7 +3,6 @@
* Copyright (C) 2013 Google, Inc
*/
-#include <common.h>
#include <fdtdec.h>
#include <dm.h>
#include <log.h>
diff --git a/test/dm/host.c b/test/dm/host.c
index ca05a36..e514f84 100644
--- a/test/dm/host.c
+++ b/test/dm/host.c
@@ -4,7 +4,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <blk.h>
#include <dm.h>
#include <fs.h>
diff --git a/test/dm/hwspinlock.c b/test/dm/hwspinlock.c
index 995759d..a05b183 100644
--- a/test/dm/hwspinlock.c
+++ b/test/dm/hwspinlock.c
@@ -3,7 +3,6 @@
* Copyright (C) 2018, STMicroelectronics - All Rights Reserved
*/
-#include <common.h>
#include <dm.h>
#include <hwspinlock.h>
#include <asm/state.h>
diff --git a/test/dm/i2c.c b/test/dm/i2c.c
index b46a22e..e9cf9f7 100644
--- a/test/dm/i2c.c
+++ b/test/dm/i2c.c
@@ -5,7 +5,6 @@
* Note: Test coverage does not include 10-bit addressing
*/
-#include <common.h>
#include <dm.h>
#include <fdtdec.h>
#include <i2c.h>
diff --git a/test/dm/i2s.c b/test/dm/i2s.c
index c2bf4d5..a3d3a31 100644
--- a/test/dm/i2s.c
+++ b/test/dm/i2s.c
@@ -4,7 +4,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <dm.h>
#include <i2s.h>
#include <asm/test.h>
diff --git a/test/dm/iommu.c b/test/dm/iommu.c
index 62d38f1..acea5f2 100644
--- a/test/dm/iommu.c
+++ b/test/dm/iommu.c
@@ -3,7 +3,6 @@
* Copyright (C) 2021 Mark Kettenis <kettenis@openbsd.org>
*/
-#include <common.h>
#include <dm.h>
#include <dm/test.h>
#include <dm/uclass-internal.h>
diff --git a/test/dm/irq.c b/test/dm/irq.c
index 51dd5e4..d22772a 100644
--- a/test/dm/irq.c
+++ b/test/dm/irq.c
@@ -5,7 +5,6 @@
* Copyright 2019 Google LLC
*/
-#include <common.h>
#include <dm.h>
#include <irq.h>
#include <acpi/acpi_device.h>
diff --git a/test/dm/k210_pll.c b/test/dm/k210_pll.c
index 354720f..2a58149 100644
--- a/test/dm/k210_pll.c
+++ b/test/dm/k210_pll.c
@@ -3,7 +3,6 @@
* Copyright (C) 2020 Sean Anderson <seanga2@gmail.com>
*/
-#include <common.h>
/* For DIV_ROUND_DOWN_ULL, defined in linux/kernel.h */
#include <div64.h>
#include <dm/test.h>
diff --git a/test/dm/led.c b/test/dm/led.c
index eed3f46..c28fa04 100644
--- a/test/dm/led.c
+++ b/test/dm/led.c
@@ -3,7 +3,6 @@
* Copyright (C) 2015 Google, Inc
*/
-#include <common.h>
#include <dm.h>
#include <led.h>
#include <asm/gpio.h>
diff --git a/test/dm/mailbox.c b/test/dm/mailbox.c
index 7ad8a1c..14f72d5 100644
--- a/test/dm/mailbox.c
+++ b/test/dm/mailbox.c
@@ -3,7 +3,6 @@
* Copyright (c) 2016, NVIDIA CORPORATION.
*/
-#include <common.h>
#include <dm.h>
#include <malloc.h>
#include <dm/test.h>
diff --git a/test/dm/mdio.c b/test/dm/mdio.c
index f863c52..7ececf3 100644
--- a/test/dm/mdio.c
+++ b/test/dm/mdio.c
@@ -4,7 +4,6 @@
* Alex Marginean, NXP
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <miiphy.h>
diff --git a/test/dm/mdio_mux.c b/test/dm/mdio_mux.c
index bfe3518..33a7e97 100644
--- a/test/dm/mdio_mux.c
+++ b/test/dm/mdio_mux.c
@@ -4,7 +4,6 @@
* Alex Marginean, NXP
*/
-#include <common.h>
#include <dm.h>
#include <miiphy.h>
#include <misc.h>
diff --git a/test/dm/misc.c b/test/dm/misc.c
index 8bdd8c6..ad856fd 100644
--- a/test/dm/misc.c
+++ b/test/dm/misc.c
@@ -4,7 +4,6 @@
* Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc
*/
-#include <common.h>
#include <dm.h>
#include <dm/test.h>
#include <misc.h>
diff --git a/test/dm/mmc.c b/test/dm/mmc.c
index b1eb8be..c0abea7 100644
--- a/test/dm/mmc.c
+++ b/test/dm/mmc.c
@@ -3,7 +3,6 @@
* Copyright (C) 2015 Google, Inc
*/
-#include <common.h>
#include <dm.h>
#include <mmc.h>
#include <part.h>
diff --git a/test/dm/mux-cmd.c b/test/dm/mux-cmd.c
index 11c237b..d4bb8be 100644
--- a/test/dm/mux-cmd.c
+++ b/test/dm/mux-cmd.c
@@ -3,7 +3,6 @@
* Copyright (C) 2020 Texas Instruments Inc.
* Pratyush Yadav <p.yadav@ti.com>
*/
-#include <common.h>
#include <dm.h>
#include <mux.h>
#include <mux-internal.h>
@@ -13,6 +12,7 @@
#include <test/ut.h>
#include <console.h>
#include <rand.h>
+#include <time.h>
#define BUF_SIZE 256
diff --git a/test/dm/mux-emul.c b/test/dm/mux-emul.c
index c6aeeb7..febd521 100644
--- a/test/dm/mux-emul.c
+++ b/test/dm/mux-emul.c
@@ -3,7 +3,6 @@
* Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/
* Pratyush Yadav <p.yadav@ti.com>
*/
-#include <common.h>
#include <dm.h>
#include <mux.h>
#include <mux-internal.h>
diff --git a/test/dm/mux-mmio.c b/test/dm/mux-mmio.c
index 27c881d..3a871a1 100644
--- a/test/dm/mux-mmio.c
+++ b/test/dm/mux-mmio.c
@@ -4,7 +4,6 @@
* Jean-Jacques Hiblot <jjhiblot@ti.com>
*/
-#include <common.h>
#include <dm.h>
#include <mux.h>
#include <regmap.h>
diff --git a/test/dm/nop.c b/test/dm/nop.c
index f7d9a0f..0c79431 100644
--- a/test/dm/nop.c
+++ b/test/dm/nop.c
@@ -6,7 +6,6 @@
* Jean-Jacques Hiblot <jjhiblot@ti.com>
*/
-#include <common.h>
#include <dm.h>
#include <dm/ofnode.h>
#include <dm/lists.h>
diff --git a/test/dm/nvmxip.c b/test/dm/nvmxip.c
index f0ad47d..537959a 100644
--- a/test/dm/nvmxip.c
+++ b/test/dm/nvmxip.c
@@ -8,7 +8,6 @@
* Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
*/
-#include <common.h>
#include <blk.h>
#include <console.h>
#include <dm.h>
diff --git a/test/dm/of_extra.c b/test/dm/of_extra.c
index ac2d886..3c31bfc 100644
--- a/test/dm/of_extra.c
+++ b/test/dm/of_extra.c
@@ -4,7 +4,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <dm.h>
#include <dm/of_extra.h>
#include <dm/test.h>
diff --git a/test/dm/of_platdata.c b/test/dm/of_platdata.c
index a241c42..d4939e8 100644
--- a/test/dm/of_platdata.c
+++ b/test/dm/of_platdata.c
@@ -1,6 +1,5 @@
// SPDX-License-Identifier: GPL-2.0+
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <dt-structs.h>
diff --git a/test/dm/ofnode.c b/test/dm/ofnode.c
index a5bc43a..39191d7 100644
--- a/test/dm/ofnode.c
+++ b/test/dm/ofnode.c
@@ -16,7 +16,6 @@
* behaviour of each ofnode function, since that is done by the normal ones.
*/
-#include <common.h>
#include <abuf.h>
#include <dm.h>
#include <log.h>
diff --git a/test/dm/ofread.c b/test/dm/ofread.c
index 3523860..69d03c4 100644
--- a/test/dm/ofread.c
+++ b/test/dm/ofread.c
@@ -1,6 +1,5 @@
// SPDX-License-Identifier: GPL-2.0+
-#include <common.h>
#include <dm.h>
#include <dm/test.h>
#include <test/ut.h>
diff --git a/test/dm/osd.c b/test/dm/osd.c
index 6279b39..cf4a3a5 100644
--- a/test/dm/osd.c
+++ b/test/dm/osd.c
@@ -4,7 +4,6 @@
* Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc
*/
-#include <common.h>
#include <display_options.h>
#include <dm.h>
#include <video_osd.h>
diff --git a/test/dm/p2sb.c b/test/dm/p2sb.c
index df24709..3ada1fc 100644
--- a/test/dm/p2sb.c
+++ b/test/dm/p2sb.c
@@ -5,7 +5,6 @@
* Copyright 2019 Google LLC
*/
-#include <common.h>
#include <dm.h>
#include <p2sb.h>
#include <asm/test.h>
diff --git a/test/dm/panel.c b/test/dm/panel.c
index 4d435a0..8be7c39 100644
--- a/test/dm/panel.c
+++ b/test/dm/panel.c
@@ -6,7 +6,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <backlight.h>
#include <dm.h>
#include <panel.h>
diff --git a/test/dm/part.c b/test/dm/part.c
index d6e4345..cabb31d 100644
--- a/test/dm/part.c
+++ b/test/dm/part.c
@@ -3,7 +3,6 @@
* Copyright (C) 2020 Sean Anderson <sean.anderson@seco.com>
*/
-#include <common.h>
#include <dm.h>
#include <mmc.h>
#include <part.h>
diff --git a/test/dm/pch.c b/test/dm/pch.c
index 53f7bbf..b37b856 100644
--- a/test/dm/pch.c
+++ b/test/dm/pch.c
@@ -3,7 +3,6 @@
* Copyright 2018 Google LLC
*/
-#include <common.h>
#include <dm.h>
#include <pch.h>
#include <asm/test.h>
diff --git a/test/dm/pci.c b/test/dm/pci.c
index 8c5e7da..9b97f2e 100644
--- a/test/dm/pci.c
+++ b/test/dm/pci.c
@@ -3,7 +3,6 @@
* Copyright (C) 2015 Google, Inc
*/
-#include <common.h>
#include <dm.h>
#include <asm/io.h>
#include <asm/test.h>
diff --git a/test/dm/pci_ep.c b/test/dm/pci_ep.c
index 9941abd..e82fc53 100644
--- a/test/dm/pci_ep.c
+++ b/test/dm/pci_ep.c
@@ -3,7 +3,6 @@
* Copyright (C) 2019 Ramon Fried
*/
-#include <common.h>
#include <dm.h>
#include <hexdump.h>
#include <pci_ep.h>
diff --git a/test/dm/phy.c b/test/dm/phy.c
index 0cf3689..d14117f 100644
--- a/test/dm/phy.c
+++ b/test/dm/phy.c
@@ -4,7 +4,6 @@
* Written by Jean-Jacques Hiblot <jjhiblot@ti.com>
*/
-#include <common.h>
#include <dm.h>
#include <generic-phy.h>
#include <log.h>
diff --git a/test/dm/phys2bus.c b/test/dm/phys2bus.c
index 342f2fa..1ee2150 100644
--- a/test/dm/phys2bus.c
+++ b/test/dm/phys2bus.c
@@ -3,7 +3,6 @@
* Copyright (c) 2020 Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
*/
-#include <common.h>
#include <dm.h>
#include <mapmem.h>
#include <phys2bus.h>
diff --git a/test/dm/pinmux.c b/test/dm/pinmux.c
index 6880b2d..cfbe3ef 100644
--- a/test/dm/pinmux.c
+++ b/test/dm/pinmux.c
@@ -3,7 +3,6 @@
* Copyright (C) 2020 Sean Anderson <seanga2@gmail.com>
*/
-#include <common.h>
#include <dm.h>
#include <dm/pinctrl.h>
#include <dm/test.h>
diff --git a/test/dm/pmc.c b/test/dm/pmc.c
index e70227e..bbad1ee 100644
--- a/test/dm/pmc.c
+++ b/test/dm/pmc.c
@@ -5,7 +5,6 @@
* Copyright 2019 Google LLC
*/
-#include <common.h>
#include <dm.h>
#include <power/acpi_pmc.h>
#include <dm/test.h>
diff --git a/test/dm/pmic.c b/test/dm/pmic.c
index ce67120..53a6f03 100644
--- a/test/dm/pmic.c
+++ b/test/dm/pmic.c
@@ -6,7 +6,6 @@
* Przemyslaw Marczak <p.marczak@samsung.com>
*/
-#include <common.h>
#include <errno.h>
#include <dm.h>
#include <fdtdec.h>
diff --git a/test/dm/power-domain.c b/test/dm/power-domain.c
index 8604b5d..120a905 100644
--- a/test/dm/power-domain.c
+++ b/test/dm/power-domain.c
@@ -3,7 +3,6 @@
* Copyright (c) 2016, NVIDIA CORPORATION.
*/
-#include <common.h>
#include <dm.h>
#include <malloc.h>
#include <dm/test.h>
diff --git a/test/dm/pwm.c b/test/dm/pwm.c
index dff626c..8013334 100644
--- a/test/dm/pwm.c
+++ b/test/dm/pwm.c
@@ -3,7 +3,6 @@
* Copyright (C) 2017 Google, Inc
*/
-#include <common.h>
#include <dm.h>
#include <pwm.h>
#include <asm/test.h>
diff --git a/test/dm/qfw.c b/test/dm/qfw.c
index f3f3568..3c35416 100644
--- a/test/dm/qfw.c
+++ b/test/dm/qfw.c
@@ -3,7 +3,6 @@
* Copyright 2021 Asherah Connor <ashe@kivikakk.ee>
*/
-#include <common.h>
#include <qfw.h>
#include <dm.h>
#include <asm/test.h>
diff --git a/test/dm/ram.c b/test/dm/ram.c
index f624343..188c7c3 100644
--- a/test/dm/ram.c
+++ b/test/dm/ram.c
@@ -3,7 +3,6 @@
* Copyright (C) 2015 Google, Inc
*/
-#include <common.h>
#include <dm.h>
#include <ram.h>
#include <asm/global_data.h>
diff --git a/test/dm/read.c b/test/dm/read.c
index 7768aa2..4ecf181 100644
--- a/test/dm/read.c
+++ b/test/dm/read.c
@@ -3,7 +3,6 @@
* Copyright (c) 2020 Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
*/
-#include <common.h>
#include <dm.h>
#include <dm/device.h>
#include <dm/ofnode.h>
diff --git a/test/dm/reboot-mode.c b/test/dm/reboot-mode.c
index fbb9c3a..160b4da 100644
--- a/test/dm/reboot-mode.c
+++ b/test/dm/reboot-mode.c
@@ -3,7 +3,6 @@
* (C) 2018 Theobroma Systems Design und Consulting GmbH
*/
-#include <common.h>
#include <dm.h>
#include <reboot-mode/reboot-mode.h>
#include <env.h>
diff --git a/test/dm/regmap.c b/test/dm/regmap.c
index 8560f2a..1398f8f 100644
--- a/test/dm/regmap.c
+++ b/test/dm/regmap.c
@@ -3,13 +3,13 @@
* Copyright (C) 2015 Google, Inc
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <mapmem.h>
#include <regmap.h>
#include <syscon.h>
#include <rand.h>
+#include <time.h>
#include <asm/test.h>
#include <dm/test.h>
#include <dm/devres.h>
diff --git a/test/dm/regulator.c b/test/dm/regulator.c
index 86f4862..9e45fd1 100644
--- a/test/dm/regulator.c
+++ b/test/dm/regulator.c
@@ -6,7 +6,6 @@
* Przemyslaw Marczak <p.marczak@samsung.com>
*/
-#include <common.h>
#include <errno.h>
#include <dm.h>
#include <fdtdec.h>
diff --git a/test/dm/remoteproc.c b/test/dm/remoteproc.c
index f6f9e50..ef9e8e5 100644
--- a/test/dm/remoteproc.c
+++ b/test/dm/remoteproc.c
@@ -3,7 +3,8 @@
* (C) Copyright 2015
* Texas Instruments Incorporated - https://www.ti.com/
*/
-#include <common.h>
+
+#include <config.h>
#include <dm.h>
#include <elf.h>
#include <errno.h>
diff --git a/test/dm/reset.c b/test/dm/reset.c
index e2d6f45..d3158bf 100644
--- a/test/dm/reset.c
+++ b/test/dm/reset.c
@@ -3,7 +3,6 @@
* Copyright (c) 2016, NVIDIA CORPORATION.
*/
-#include <common.h>
#include <dm.h>
#include <dm/device-internal.h>
#include <log.h>
diff --git a/test/dm/rkmtd.c b/test/dm/rkmtd.c
index 3c3e8ef..3dc9ca1 100644
--- a/test/dm/rkmtd.c
+++ b/test/dm/rkmtd.c
@@ -8,7 +8,6 @@
* Copyright (C) 2023 Johan Jonker <jbx6244@gmail.com>
*/
-#include <common.h>
#include <blk.h>
#include <dm.h>
#include <fs.h>
diff --git a/test/dm/rng.c b/test/dm/rng.c
index 6d1f688..c8ed6ca 100644
--- a/test/dm/rng.c
+++ b/test/dm/rng.c
@@ -3,7 +3,6 @@
* Copyright (c) 2019, Linaro Limited
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <rng.h>
diff --git a/test/dm/rtc.c b/test/dm/rtc.c
index bf97dbb..a8aa419 100644
--- a/test/dm/rtc.c
+++ b/test/dm/rtc.c
@@ -4,7 +4,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <console.h>
#include <dm.h>
#include <i2c.h>
diff --git a/test/dm/scmi.c b/test/dm/scmi.c
index adf36ff..69fc900 100644
--- a/test/dm/scmi.c
+++ b/test/dm/scmi.c
@@ -12,7 +12,6 @@
* unknown SCMI protocol ID.
*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <reset.h>
diff --git a/test/dm/scsi.c b/test/dm/scsi.c
index 380cfc8..5180159 100644
--- a/test/dm/scsi.c
+++ b/test/dm/scsi.c
@@ -3,7 +3,6 @@
* Copyright (C) 2015 Google, Inc
*/
-#include <common.h>
#include <dm.h>
#include <part.h>
#include <scsi.h>
diff --git a/test/dm/serial.c b/test/dm/serial.c
index 34b783e..34c0d4d 100644
--- a/test/dm/serial.c
+++ b/test/dm/serial.c
@@ -3,7 +3,6 @@
* Copyright (c) 2018, STMicroelectronics
*/
-#include <common.h>
#include <log.h>
#include <serial.h>
#include <dm.h>
diff --git a/test/dm/sf.c b/test/dm/sf.c
index 17d43fe..0e3a0f1 100644
--- a/test/dm/sf.c
+++ b/test/dm/sf.c
@@ -3,7 +3,6 @@
* Copyright (C) 2013 Google, Inc
*/
-#include <common.h>
#include <command.h>
#include <dm.h>
#include <fdtdec.h>
diff --git a/test/dm/simple-bus.c b/test/dm/simple-bus.c
index 3530b47..8a730ba 100644
--- a/test/dm/simple-bus.c
+++ b/test/dm/simple-bus.c
@@ -3,7 +3,6 @@
* Copyright (C) 2021, Bin Meng <bmeng.cn@gmail.com>
*/
-#include <common.h>
#include <dm.h>
#include <dm/test.h>
#include <dm/simple_bus.h>
diff --git a/test/dm/simple-pm-bus.c b/test/dm/simple-pm-bus.c
index 792c745..9949cb3 100644
--- a/test/dm/simple-pm-bus.c
+++ b/test/dm/simple-pm-bus.c
@@ -3,7 +3,6 @@
* Copyright (C) 2020 Sean Anderson <seanga2@gmail.com>
*/
-#include <common.h>
#include <dm.h>
#include <dm/test.h>
#include <dm/device-internal.h>
diff --git a/test/dm/sm.c b/test/dm/sm.c
index 7ebb0c9..4d95c2a 100644
--- a/test/dm/sm.c
+++ b/test/dm/sm.c
@@ -5,7 +5,6 @@
* Author: Alexey Romanov <avromanov@salutedevices.com>
*/
-#include <common.h>
#include <dm.h>
#include <sm.h>
#include <sandbox-sm.h>
diff --git a/test/dm/smem.c b/test/dm/smem.c
index 289fb59..adcbfe5 100644
--- a/test/dm/smem.c
+++ b/test/dm/smem.c
@@ -3,7 +3,6 @@
* Copyright (C) 2018 Ramon Fried <ramon.fried@gmail.com>
*/
-#include <common.h>
#include <dm.h>
#include <smem.h>
#include <dm/test.h>
diff --git a/test/dm/soc.c b/test/dm/soc.c
index 8f6c97f..cb0ac15 100644
--- a/test/dm/soc.c
+++ b/test/dm/soc.c
@@ -6,7 +6,6 @@
* Dave Gerlach <d-gerlach@ti.com>
*/
-#include <common.h>
#include <dm.h>
#include <dm/test.h>
#include <dm/uclass-internal.h>
diff --git a/test/dm/sound.c b/test/dm/sound.c
index 15d545a..f4e6215 100644
--- a/test/dm/sound.c
+++ b/test/dm/sound.c
@@ -4,7 +4,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <dm.h>
#include <sound.h>
#include <dm/test.h>
diff --git a/test/dm/spi.c b/test/dm/spi.c
index 325799b..1ab2dd7 100644
--- a/test/dm/spi.c
+++ b/test/dm/spi.c
@@ -3,7 +3,6 @@
* Copyright (C) 2013 Google, Inc
*/
-#include <common.h>
#include <dm.h>
#include <fdtdec.h>
#include <spi.h>
diff --git a/test/dm/spmi.c b/test/dm/spmi.c
index 97bb0eb..e10ae8d 100644
--- a/test/dm/spmi.c
+++ b/test/dm/spmi.c
@@ -3,7 +3,6 @@
* (C) Copyright 2015 Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
*/
-#include <common.h>
#include <fdtdec.h>
#include <dm.h>
#include <malloc.h>
diff --git a/test/dm/syscon-reset.c b/test/dm/syscon-reset.c
index eeaddf8..ba19504 100644
--- a/test/dm/syscon-reset.c
+++ b/test/dm/syscon-reset.c
@@ -3,7 +3,6 @@
* Copyright (C) 2020 Sean Anderson <seanga2@gmail.com>
*/
-#include <common.h>
#include <dm.h>
#include <dm/test.h>
#include <regmap.h>
diff --git a/test/dm/syscon.c b/test/dm/syscon.c
index be23297..04d324e 100644
--- a/test/dm/syscon.c
+++ b/test/dm/syscon.c
@@ -3,7 +3,6 @@
* Copyright (C) 2015 Google, Inc
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <syscon.h>
diff --git a/test/dm/sysinfo-gpio.c b/test/dm/sysinfo-gpio.c
index 2e494b3..24a99da 100644
--- a/test/dm/sysinfo-gpio.c
+++ b/test/dm/sysinfo-gpio.c
@@ -3,7 +3,6 @@
* Copyright (C) 2021 Sean Anderson <sean.anderson@seco.com>
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <sysinfo.h>
diff --git a/test/dm/sysinfo.c b/test/dm/sysinfo.c
index 96b3a8e..7444a58 100644
--- a/test/dm/sysinfo.c
+++ b/test/dm/sysinfo.c
@@ -4,7 +4,6 @@
* Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <dm/test.h>
diff --git a/test/dm/sysreset.c b/test/dm/sysreset.c
index 5aa69e0..f3a859b 100644
--- a/test/dm/sysreset.c
+++ b/test/dm/sysreset.c
@@ -3,7 +3,6 @@
* Copyright (C) 2015 Google, Inc
*/
-#include <common.h>
#include <dm.h>
#include <sysreset.h>
#include <asm/state.h>
diff --git a/test/dm/tag.c b/test/dm/tag.c
index 8ae8a1f..bce8a35 100644
--- a/test/dm/tag.c
+++ b/test/dm/tag.c
@@ -6,7 +6,6 @@
* Author: AKASHI Takahiro
*/
-#include <common.h>
#include <dm/tag.h>
#include <dm/test.h> /* DM_TEST() */
#include <test/test.h> /* struct unit_test_state */
diff --git a/test/dm/tee.c b/test/dm/tee.c
index 7a11bf8..bb02a9b 100644
--- a/test/dm/tee.c
+++ b/test/dm/tee.c
@@ -3,7 +3,6 @@
* Copyright (C) 2018 Linaro Limited
*/
-#include <common.h>
#include <dm.h>
#include <log.h>
#include <malloc.h>
diff --git a/test/dm/test-dm.c b/test/dm/test-dm.c
index e73a1dd..4bc2c45 100644
--- a/test/dm/test-dm.c
+++ b/test/dm/test-dm.c
@@ -3,7 +3,6 @@
* Copyright (c) 2013 Google, Inc
*/
-#include <common.h>
#include <test/suites.h>
#include <test/test.h>
diff --git a/test/dm/test-driver.c b/test/dm/test-driver.c
index 02cb974..851177c 100644
--- a/test/dm/test-driver.c
+++ b/test/dm/test-driver.c
@@ -6,7 +6,6 @@
* Pavel Herrmann <morpheus.ibis@gmail.com>
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <log.h>
diff --git a/test/dm/test-fdt.c b/test/dm/test-fdt.c
index 72d0eb5..18c89ee 100644
--- a/test/dm/test-fdt.c
+++ b/test/dm/test-fdt.c
@@ -3,7 +3,6 @@
* Copyright (c) 2013 Google, Inc
*/
-#include <common.h>
#include <dm.h>
#include <errno.h>
#include <fdtdec.h>
diff --git a/test/dm/test-uclass.c b/test/dm/test-uclass.c
index 0677017..9a80cc6 100644
--- a/test/dm/test-uclass.c
+++ b/test/dm/test-uclass.c
@@ -6,7 +6,6 @@
* Pavel Herrmann <morpheus.ibis@gmail.com>
*/
-#include <common.h>
#include <log.h>
#include <malloc.h>
#include <dm.h>
diff --git a/test/dm/timer.c b/test/dm/timer.c
index 9f94d47..7fcefc4 100644
--- a/test/dm/timer.c
+++ b/test/dm/timer.c
@@ -3,7 +3,6 @@
* Copyright (C) 2015 Thomas Chou <thomas@wytron.com.tw>
*/
-#include <common.h>
#include <dm.h>
#include <timer.h>
#include <dm/test.h>
diff --git a/test/dm/tpm.c b/test/dm/tpm.c
index cde933a..0e413c0 100644
--- a/test/dm/tpm.c
+++ b/test/dm/tpm.c
@@ -4,7 +4,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <dm.h>
#include <tpm_api.h>
#include <dm/test.h>
diff --git a/test/dm/usb.c b/test/dm/usb.c
index 7671ef1..9a57193 100644
--- a/test/dm/usb.c
+++ b/test/dm/usb.c
@@ -3,7 +3,6 @@
* Copyright (C) 2015 Google, Inc
*/
-#include <common.h>
#include <console.h>
#include <dm.h>
#include <part.h>
diff --git a/test/dm/video.c b/test/dm/video.c
index d907f68..7dfbeb9 100644
--- a/test/dm/video.c
+++ b/test/dm/video.c
@@ -4,7 +4,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <bzlib.h>
#include <dm.h>
#include <gzip.h>
diff --git a/test/dm/virtio.c b/test/dm/virtio.c
index 3e108cd..3efd7c7 100644
--- a/test/dm/virtio.c
+++ b/test/dm/virtio.c
@@ -3,7 +3,6 @@
* Copyright (C) 2018, Bin Meng <bmeng.cn@gmail.com>
*/
-#include <common.h>
#include <dm.h>
#include <virtio_types.h>
#include <virtio.h>
diff --git a/test/dm/virtio_device.c b/test/dm/virtio_device.c
index fdda4da..63dc534 100644
--- a/test/dm/virtio_device.c
+++ b/test/dm/virtio_device.c
@@ -3,7 +3,6 @@
* Copyright (C) 2018, Bin Meng <bmeng.cn@gmail.com>
*/
-#include <common.h>
#include <dm.h>
#include <virtio_types.h>
#include <virtio.h>
diff --git a/test/dm/virtio_rng.c b/test/dm/virtio_rng.c
index 8b9a04b..ab7d862 100644
--- a/test/dm/virtio_rng.c
+++ b/test/dm/virtio_rng.c
@@ -4,7 +4,6 @@
* Written by Andrew Scull <ascull@google.com>
*/
-#include <common.h>
#include <dm.h>
#include <virtio_types.h>
#include <virtio.h>
diff --git a/test/dm/wdt.c b/test/dm/wdt.c
index 2bbebcd..1df2da2 100644
--- a/test/dm/wdt.c
+++ b/test/dm/wdt.c
@@ -3,9 +3,9 @@
* Copyright 2017 Google, Inc
*/
-#include <common.h>
#include <cyclic.h>
#include <dm.h>
+#include <time.h>
#include <wdt.h>
#include <asm/gpio.h>
#include <asm/state.h>
diff --git a/test/env/attr.c b/test/env/attr.c
index 8d5c0f1..de5d5d4 100644
--- a/test/env/attr.c
+++ b/test/env/attr.c
@@ -4,7 +4,6 @@
* Joe Hershberger, National Instruments, joe.hershberger@ni.com
*/
-#include <common.h>
#include <command.h>
#include <env_attr.h>
#include <test/env.h>
diff --git a/test/env/cmd_ut_env.c b/test/env/cmd_ut_env.c
index d65a321..13e0998 100644
--- a/test/env/cmd_ut_env.c
+++ b/test/env/cmd_ut_env.c
@@ -4,7 +4,6 @@
* Joe Hershberger, National Instruments, joe.hershberger@ni.com
*/
-#include <common.h>
#include <command.h>
#include <test/env.h>
#include <test/suites.h>
diff --git a/test/env/fdt.c b/test/env/fdt.c
index 30bfa88..c495ac7 100644
--- a/test/env/fdt.c
+++ b/test/env/fdt.c
@@ -1,4 +1,3 @@
-#include <common.h>
#include <command.h>
#include <env_attr.h>
#include <test/env.h>
diff --git a/test/env/hashtable.c b/test/env/hashtable.c
index 70102f9..ccdf013 100644
--- a/test/env/hashtable.c
+++ b/test/env/hashtable.c
@@ -4,11 +4,11 @@
* Roman Kapl, SYSGO, rka@sysgo.com
*/
-#include <common.h>
#include <command.h>
#include <log.h>
#include <search.h>
#include <stdio.h>
+#include <vsprintf.h>
#include <test/env.h>
#include <test/ut.h>
diff --git a/test/fuzz/cmd_fuzz.c b/test/fuzz/cmd_fuzz.c
index d0bc7b8..faa1404 100644
--- a/test/fuzz/cmd_fuzz.c
+++ b/test/fuzz/cmd_fuzz.c
@@ -5,7 +5,6 @@
*/
#include <command.h>
-#include <common.h>
#include <dm.h>
#include <fuzzing_engine.h>
#include <test/fuzz.h>
diff --git a/test/fuzz/virtio.c b/test/fuzz/virtio.c
index 8a47667..836eb9a 100644
--- a/test/fuzz/virtio.c
+++ b/test/fuzz/virtio.c
@@ -4,7 +4,6 @@
* Written by Andrew Scull <ascull@google.com>
*/
-#include <common.h>
#include <dm.h>
#include <virtio.h>
#include <virtio_ring.h>
diff --git a/test/image/spl_load.c b/test/image/spl_load.c
index e1036ef..7cbad40 100644
--- a/test/image/spl_load.c
+++ b/test/image/spl_load.c
@@ -3,7 +3,6 @@
* Copyright (C) 2023 Sean Anderson <seanga2@gmail.com>
*/
-#include <common.h>
#include <image.h>
#include <imx_container.h>
#include <mapmem.h>
diff --git a/test/image/spl_load_fs.c b/test/image/spl_load_fs.c
index a89189e..935078b 100644
--- a/test/image/spl_load_fs.c
+++ b/test/image/spl_load_fs.c
@@ -3,7 +3,6 @@
* Copyright (C) 2023 Sean Anderson <seanga2@gmail.com>
*/
-#include <common.h>
#include <blk.h>
#include <ext_common.h>
#include <ext4fs.h>
diff --git a/test/image/spl_load_net.c b/test/image/spl_load_net.c
index 9d067a7..4af6e21 100644
--- a/test/image/spl_load_net.c
+++ b/test/image/spl_load_net.c
@@ -3,7 +3,6 @@
* Copyright (C) 2023 Sean Anderson <seanga2@gmail.com>
*/
-#include <common.h>
#include <dm.h>
#include <spl.h>
#include <test/spl.h>
diff --git a/test/image/spl_load_nor.c b/test/image/spl_load_nor.c
index de56863..f53a672 100644
--- a/test/image/spl_load_nor.c
+++ b/test/image/spl_load_nor.c
@@ -3,7 +3,6 @@
* Copyright (C) 2023 Sean Anderson <seanga2@gmail.com>
*/
-#include <common.h>
#include <dm.h>
#include <spl.h>
#include <asm/io.h>
diff --git a/test/image/spl_load_os.c b/test/image/spl_load_os.c
index 26228a8..7d5fb9b 100644
--- a/test/image/spl_load_os.c
+++ b/test/image/spl_load_os.c
@@ -4,7 +4,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <image.h>
#include <os.h>
#include <spl.h>
diff --git a/test/image/spl_load_spi.c b/test/image/spl_load_spi.c
index 54a9546..80836dc 100644
--- a/test/image/spl_load_spi.c
+++ b/test/image/spl_load_spi.c
@@ -3,7 +3,6 @@
* Copyright (C) 2023 Sean Anderson <seanga2@gmail.com>
*/
-#include <common.h>
#include <dm.h>
#include <spi_flash.h>
#include <spl.h>
diff --git a/test/lib/abuf.c b/test/lib/abuf.c
index 42803b2..7c0481a 100644
--- a/test/lib/abuf.c
+++ b/test/lib/abuf.c
@@ -4,7 +4,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <abuf.h>
#include <mapmem.h>
#include <test/lib.h>
diff --git a/test/lib/asn1.c b/test/lib/asn1.c
index a66cdd7..4842b70 100644
--- a/test/lib/asn1.c
+++ b/test/lib/asn1.c
@@ -6,7 +6,6 @@
* Unit test for asn1 compiler and asn1 decoder function via various parsers
*/
-#include <common.h>
#include <command.h>
#include <test/lib.h>
#include <test/test.h>
diff --git a/test/lib/cmd_ut_lib.c b/test/lib/cmd_ut_lib.c
index f1ac015..f98cb9b 100644
--- a/test/lib/cmd_ut_lib.c
+++ b/test/lib/cmd_ut_lib.c
@@ -5,7 +5,6 @@
* Unit tests for library functions
*/
-#include <common.h>
#include <command.h>
#include <test/lib.h>
#include <test/suites.h>
diff --git a/test/lib/efi_device_path.c b/test/lib/efi_device_path.c
index 24e2f23..290c876 100644
--- a/test/lib/efi_device_path.c
+++ b/test/lib/efi_device_path.c
@@ -5,7 +5,6 @@
* Copyright (c) 2020 Heinrich Schuchardt <xypron.glpk@gmx.de>
*/
-#include <common.h>
#include <efi_loader.h>
#include <test/lib.h>
#include <test/test.h>
diff --git a/test/lib/efi_image_region.c b/test/lib/efi_image_region.c
index 0b888f8..3ca49dc 100644
--- a/test/lib/efi_image_region.c
+++ b/test/lib/efi_image_region.c
@@ -3,7 +3,6 @@
* (C) Copyright 2020, Heinrich Schuchardt <xypron.glpk@gmx.de>
*/
-#include <common.h>
#include <efi_loader.h>
#include <test/lib.h>
#include <test/test.h>
diff --git a/test/lib/getopt.c b/test/lib/getopt.c
index 3c68b93..388a076 100644
--- a/test/lib/getopt.c
+++ b/test/lib/getopt.c
@@ -6,7 +6,6 @@
* posix/tst-getopt-cancel.c
*/
-#include <common.h>
#include <getopt.h>
#include <test/lib.h>
#include <test/test.h>
diff --git a/test/lib/hexdump.c b/test/lib/hexdump.c
index 5dccf43..d531a83 100644
--- a/test/lib/hexdump.c
+++ b/test/lib/hexdump.c
@@ -4,7 +4,6 @@
* Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc
*/
-#include <common.h>
#include <hexdump.h>
#include <test/lib.h>
#include <test/test.h>
diff --git a/test/lib/kconfig.c b/test/lib/kconfig.c
index 3914f69..0c463bb 100644
--- a/test/lib/kconfig.c
+++ b/test/lib/kconfig.c
@@ -6,7 +6,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <test/lib.h>
#include <test/test.h>
#include <test/ut.h>
diff --git a/test/lib/kconfig_spl.c b/test/lib/kconfig_spl.c
index 8f8a341..3bd8abd 100644
--- a/test/lib/kconfig_spl.c
+++ b/test/lib/kconfig_spl.c
@@ -6,7 +6,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <test/lib.h>
#include <test/test.h>
#include <test/ut.h>
diff --git a/test/lib/lmb.c b/test/lib/lmb.c
index 7e4368d..4b5b6e5 100644
--- a/test/lib/lmb.c
+++ b/test/lib/lmb.c
@@ -3,7 +3,6 @@
* (C) Copyright 2018 Simon Goldschmidt
*/
-#include <common.h>
#include <dm.h>
#include <lmb.h>
#include <log.h>
diff --git a/test/lib/longjmp.c b/test/lib/longjmp.c
index 201367a..79d889b 100644
--- a/test/lib/longjmp.c
+++ b/test/lib/longjmp.c
@@ -5,7 +5,6 @@
* Copyright (c) 2021, Heinrich Schuchardt <xypron.glpk@gmx.de>
*/
-#include <common.h>
#include <test/lib.h>
#include <test/test.h>
#include <test/ut.h>
diff --git a/test/lib/rsa.c b/test/lib/rsa.c
index 44f8ade..40f7001 100644
--- a/test/lib/rsa.c
+++ b/test/lib/rsa.c
@@ -6,7 +6,6 @@
* Unit test for rsa_verify() function
*/
-#include <common.h>
#include <command.h>
#include <image.h>
#include <test/lib.h>
diff --git a/test/lib/sscanf.c b/test/lib/sscanf.c
index 772e4b9..9fe5521 100644
--- a/test/lib/sscanf.c
+++ b/test/lib/sscanf.c
@@ -9,7 +9,6 @@
* Unit tests for sscanf() function
*/
-#include <common.h>
#include <command.h>
#include <log.h>
#include <test/lib.h>
diff --git a/test/lib/string.c b/test/lib/string.c
index 5dcf4d6..d08dbca 100644
--- a/test/lib/string.c
+++ b/test/lib/string.c
@@ -9,7 +9,6 @@
* This has to be considered in testing.
*/
-#include <common.h>
#include <command.h>
#include <log.h>
#include <test/lib.h>
diff --git a/test/lib/strlcat.c b/test/lib/strlcat.c
index d8453fe..d1a0293 100644
--- a/test/lib/strlcat.c
+++ b/test/lib/strlcat.c
@@ -6,7 +6,6 @@
* These tests adapted from glibc's string/test-strncat.c
*/
-#include <common.h>
#include <test/lib.h>
#include <test/test.h>
#include <test/ut.h>
diff --git a/test/lib/test_aes.c b/test/lib/test_aes.c
index cbc712f..cfd9d8c 100644
--- a/test/lib/test_aes.c
+++ b/test/lib/test_aes.c
@@ -5,7 +5,6 @@
* Unit tests for aes functions
*/
-#include <common.h>
#include <command.h>
#include <hexdump.h>
#include <rand.h>
diff --git a/test/lib/test_crypt.c b/test/lib/test_crypt.c
index fb21edf..dcdadd9 100644
--- a/test/lib/test_crypt.c
+++ b/test/lib/test_crypt.c
@@ -5,7 +5,6 @@
* Unit test for crypt-style password hashing
*/
-#include <common.h>
#include <test/lib.h>
#include <test/test.h>
#include <test/ut.h>
diff --git a/test/lib/test_errno_str.c b/test/lib/test_errno_str.c
index 8a9f1fd..67f7644 100644
--- a/test/lib/test_errno_str.c
+++ b/test/lib/test_errno_str.c
@@ -9,7 +9,6 @@
* This has to be considered in testing.
*/
-#include <common.h>
#include <command.h>
#include <errno.h>
#include <test/lib.h>
diff --git a/test/lib/test_print.c b/test/lib/test_print.c
index 79b67c7..c7fc50a 100644
--- a/test/lib/test_print.c
+++ b/test/lib/test_print.c
@@ -5,7 +5,6 @@
* Copyright 2020, Heinrich Schuchadt <xypron.glpk@gmx.de>
*/
-#include <common.h>
#include <command.h>
#include <display_options.h>
#include <asm/global_data.h>
diff --git a/test/lib/uuid.c b/test/lib/uuid.c
index e24331a..0914f2c 100644
--- a/test/lib/uuid.c
+++ b/test/lib/uuid.c
@@ -8,7 +8,6 @@
* Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
*/
-#include <common.h>
#include <uuid.h>
#include <test/lib.h>
#include <test/test.h>
diff --git a/test/log/cont_test.c b/test/log/cont_test.c
index de7b7f0..036d44b 100644
--- a/test/log/cont_test.c
+++ b/test/log/cont_test.c
@@ -5,7 +5,6 @@
* Test continuation of log messages.
*/
-#include <common.h>
#include <console.h>
#include <asm/global_data.h>
#include <test/log.h>
diff --git a/test/log/log_filter.c b/test/log/log_filter.c
index b644b40..9cc891d 100644
--- a/test/log/log_filter.c
+++ b/test/log/log_filter.c
@@ -3,7 +3,6 @@
* Copyright (C) 2020 Sean Anderson <seanga2@gmail.com>
*/
-#include <common.h>
#include <console.h>
#include <log.h>
#include <asm/global_data.h>
diff --git a/test/log/log_test.c b/test/log/log_test.c
index c5abff8..855353a 100644
--- a/test/log/log_test.c
+++ b/test/log/log_test.c
@@ -6,7 +6,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <command.h>
#include <log.h>
#include <asm/global_data.h>
diff --git a/test/log/log_ut.c b/test/log/log_ut.c
index 5aa3a18..6617ed8 100644
--- a/test/log/log_ut.c
+++ b/test/log/log_ut.c
@@ -5,7 +5,6 @@
* Logging function tests.
*/
-#include <common.h>
#include <console.h>
#include <log.h>
#include <test/log.h>
diff --git a/test/log/nolog_ndebug.c b/test/log/nolog_ndebug.c
index bd9a4f4..b714a16 100644
--- a/test/log/nolog_ndebug.c
+++ b/test/log/nolog_ndebug.c
@@ -5,7 +5,6 @@
* Logging function tests for CONFIG_LOG=n without #define DEBUG
*/
-#include <common.h>
#include <console.h>
#include <log.h>
#include <asm/global_data.h>
diff --git a/test/log/nolog_test.c b/test/log/nolog_test.c
index 4e52e5b..c4c0fa6 100644
--- a/test/log/nolog_test.c
+++ b/test/log/nolog_test.c
@@ -8,7 +8,6 @@
/* Needed for testing log_debug() */
#define DEBUG 1
-#include <common.h>
#include <console.h>
#include <log.h>
#include <asm/global_data.h>
diff --git a/test/log/pr_cont_test.c b/test/log/pr_cont_test.c
index df4520d..30f30d9 100644
--- a/test/log/pr_cont_test.c
+++ b/test/log/pr_cont_test.c
@@ -5,7 +5,6 @@
* Test continuation of log messages using pr_cont().
*/
-#include <common.h>
#include <console.h>
#include <test/log.h>
#include <test/test.h>
diff --git a/test/log/syslog_test.c b/test/log/syslog_test.c
index 4db649d..c4180f7 100644
--- a/test/log/syslog_test.c
+++ b/test/log/syslog_test.c
@@ -10,7 +10,6 @@
/* Override CONFIG_LOG_MAX_LEVEL */
#define LOG_DEBUG
-#include <common.h>
#include <asm/global_data.h>
#include <dm/device.h>
#include <hexdump.h>
diff --git a/test/log/syslog_test_ndebug.c b/test/log/syslog_test_ndebug.c
index 4438791..b10e636 100644
--- a/test/log/syslog_test_ndebug.c
+++ b/test/log/syslog_test_ndebug.c
@@ -7,7 +7,6 @@
* Invoke the test with: ./u-boot -d arch/sandbox/dts/test.dtb
*/
-#include <common.h>
#include <asm/global_data.h>
#include <dm/device.h>
#include <hexdump.h>
diff --git a/test/optee/cmd_ut_optee.c b/test/optee/cmd_ut_optee.c
index c3887ab..c6f50e0 100644
--- a/test/optee/cmd_ut_optee.c
+++ b/test/optee/cmd_ut_optee.c
@@ -3,7 +3,6 @@
* Copyright (C) 2019, Theobroma Systems Design und Consulting GmbH
*/
-#include <common.h>
#include <command.h>
#include <errno.h>
#include <fdt_support.h>
diff --git a/test/overlay/cmd_ut_overlay.c b/test/overlay/cmd_ut_overlay.c
index 56a3df1..bcb29a2 100644
--- a/test/overlay/cmd_ut_overlay.c
+++ b/test/overlay/cmd_ut_overlay.c
@@ -4,7 +4,6 @@
* Copyright (c) 2016 Free Electrons
*/
-#include <common.h>
#include <command.h>
#include <errno.h>
#include <fdt_support.h>
diff --git a/test/print_ut.c b/test/print_ut.c
index bb844d2..bded2b6 100644
--- a/test/print_ut.c
+++ b/test/print_ut.c
@@ -3,7 +3,6 @@
* Copyright (c) 2012, The Chromium Authors
*/
-#include <common.h>
#include <command.h>
#include <efi_api.h>
#include <display_options.h>
diff --git a/test/py/test.py b/test/py/test.py
index 95859a6..7c47790 100755
--- a/test/py/test.py
+++ b/test/py/test.py
@@ -11,7 +11,6 @@
import os.path
import sys
import pytest
-from pkg_resources import load_entry_point
if __name__ == '__main__':
# argv; py.test test_directory_name user-supplied-arguments
diff --git a/test/py/tests/test_efi_capsule/capsule_gen_binman.dts b/test/py/tests/test_efi_capsule/capsule_gen_binman.dts
index e8a1858..1a62c26 100644
--- a/test/py/tests/test_efi_capsule/capsule_gen_binman.dts
+++ b/test/py/tests/test_efi_capsule/capsule_gen_binman.dts
@@ -55,42 +55,6 @@
};
capsule1 {
- filename = "Test01";
- efi-capsule {
- image-index = <0x1>;
- image-guid = SANDBOX_UBOOT_IMAGE_GUID;
-
- text {
- text = "u-boot:New";
- };
- };
- };
-
- capsule2 {
- filename = "Test02";
- efi-capsule {
- image-index = <0x2>;
- image-guid = SANDBOX_UBOOT_ENV_IMAGE_GUID;
-
- text {
- text = "u-boot-env:New";
- };
- };
- };
-
- capsule3 {
- filename = "Test03";
- efi-capsule {
- image-index = <0x1>;
- image-guid = SANDBOX_INCORRECT_GUID;
-
- text {
- text = "u-boot:New";
- };
- };
- };
-
- capsule4 {
filename = "Test04";
efi-capsule {
image-index = <0x1>;
@@ -102,7 +66,7 @@
};
};
- capsule5 {
+ capsule2 {
filename = "Test05";
efi-capsule {
image-index = <0x1>;
@@ -114,46 +78,7 @@
};
};
- capsule6 {
- filename = "Test101";
- efi-capsule {
- image-index = <0x1>;
- fw-version = <0x5>;
- image-guid = SANDBOX_UBOOT_IMAGE_GUID;
-
- text {
- text = "u-boot:New";
- };
- };
- };
-
- capsule7 {
- filename = "Test102";
- efi-capsule {
- image-index = <0x2>;
- fw-version = <0xa>;
- image-guid = SANDBOX_UBOOT_ENV_IMAGE_GUID;
-
- text {
- text = "u-boot-env:New";
- };
- };
- };
-
- capsule8 {
- filename = "Test103";
- efi-capsule {
- image-index = <0x1>;
- fw-version = <0x2>;
- image-guid = SANDBOX_UBOOT_IMAGE_GUID;
-
- text {
- text = "u-boot:New";
- };
- };
- };
-
- capsule9 {
+ capsule3 {
filename = "Test104";
efi-capsule {
image-index = <0x1>;
@@ -166,7 +91,7 @@
};
};
- capsule10 {
+ capsule4 {
filename = "Test105";
efi-capsule {
image-index = <0x1>;
@@ -179,37 +104,7 @@
};
};
- capsule11 {
- filename = "Test11";
- efi-capsule {
- image-index = <0x1>;
- image-guid = SANDBOX_UBOOT_IMAGE_GUID;
- private-key = CAPSULE_PRIV_KEY;
- public-key-cert = CAPSULE_PUB_KEY;
- monotonic-count = <0x1>;
-
- text {
- text = "u-boot:New";
- };
- };
- };
-
- capsule12 {
- filename = "Test12";
- efi-capsule {
- image-index = <0x1>;
- image-guid = SANDBOX_UBOOT_IMAGE_GUID;
- private-key = CAPSULE_INVAL_KEY;
- public-key-cert = CAPSULE_INVAL_PUB_KEY;
- monotonic-count = <0x1>;
-
- text {
- text = "u-boot:New";
- };
- };
- };
-
- capsule13 {
+ capsule5 {
filename = "Test13";
efi-capsule {
image-index = <0x1>;
@@ -224,7 +119,7 @@
};
};
- capsule14 {
+ capsule6 {
filename = "Test14";
efi-capsule {
image-index = <0x1>;
@@ -239,55 +134,7 @@
};
};
- capsule15 {
- filename = "Test111";
- efi-capsule {
- image-index = <0x1>;
- fw-version = <0x5>;
- image-guid = SANDBOX_UBOOT_IMAGE_GUID;
- private-key = CAPSULE_PRIV_KEY;
- public-key-cert = CAPSULE_PUB_KEY;
- monotonic-count = <0x1>;
-
- text {
- text = "u-boot:New";
- };
- };
- };
-
- capsule16 {
- filename = "Test112";
- efi-capsule {
- image-index = <0x2>;
- fw-version = <0xa>;
- image-guid = SANDBOX_UBOOT_ENV_IMAGE_GUID;
- private-key = CAPSULE_PRIV_KEY;
- public-key-cert = CAPSULE_PUB_KEY;
- monotonic-count = <0x1>;
-
- text {
- text = "u-boot-env:New";
- };
- };
- };
-
- capsule17 {
- filename = "Test113";
- efi-capsule {
- image-index = <0x1>;
- fw-version = <0x2>;
- image-guid = SANDBOX_UBOOT_IMAGE_GUID;
- private-key = CAPSULE_PRIV_KEY;
- public-key-cert = CAPSULE_PUB_KEY;
- monotonic-count = <0x1>;
-
- text {
- text = "u-boot:New";
- };
- };
- };
-
- capsule18 {
+ capsule7 {
filename = "Test114";
efi-capsule {
image-index = <0x1>;
@@ -303,7 +150,7 @@
};
};
- capsule19 {
+ capsule8 {
filename = "Test115";
efi-capsule {
image-index = <0x1>;
diff --git a/test/py/tests/test_efi_capsule/conftest.py b/test/py/tests/test_efi_capsule/conftest.py
index dd41da9..80b1297 100644
--- a/test/py/tests/test_efi_capsule/conftest.py
+++ b/test/py/tests/test_efi_capsule/conftest.py
@@ -85,6 +85,7 @@
check_call('cd %s; '
'./tools/binman/binman --toolpath %s/tools build -u -d %s/capsule_binman.dtb -O %s -m --allow-missing -I %s -I ./board/sandbox -I ./arch/sandbox/dts'
% (u_boot_config.source_dir, u_boot_config.build_dir, data_dir, data_dir, data_dir), shell=True)
+ check_call('cp %s/Test* %s' % (u_boot_config.build_dir, data_dir), shell=True)
os.environ['PYTHONPATH'] = pythonpath
# Create a disk image with EFI system partition
diff --git a/test/py/tests/test_efi_secboot/test_signed.py b/test/py/tests/test_efi_secboot/test_signed.py
index 2f862a2..5000a4a 100644
--- a/test/py/tests/test_efi_secboot/test_signed.py
+++ b/test/py/tests/test_efi_secboot/test_signed.py
@@ -62,13 +62,13 @@
'efidebug boot order 1',
'efidebug test bootmgr'])
assert('\'HELLO1\' failed' in ''.join(output))
- assert('efi_start_image() returned: 26' in ''.join(output))
+ assert('efi_bootmgr_load() returned: 26' in ''.join(output))
output = u_boot_console.run_command_list([
'efidebug boot add -b 2 HELLO2 host 0:1 /helloworld.efi -s ""',
'efidebug boot order 2',
'efidebug test bootmgr'])
assert '\'HELLO2\' failed' in ''.join(output)
- assert 'efi_start_image() returned: 26' in ''.join(output)
+ assert 'efi_bootmgr_load() returned: 26' in ''.join(output)
with u_boot_console.log.section('Test Case 2b'):
# Test Case 2b, authenticated by db
@@ -80,7 +80,7 @@
'efidebug boot order 2',
'efidebug test bootmgr'])
assert '\'HELLO2\' failed' in ''.join(output)
- assert 'efi_start_image() returned: 26' in ''.join(output)
+ assert 'efi_bootmgr_load() returned: 26' in ''.join(output)
output = u_boot_console.run_command_list([
'efidebug boot order 1',
'bootefi bootmgr'])
@@ -108,7 +108,7 @@
'efidebug boot order 1',
'efidebug test bootmgr'])
assert '\'HELLO\' failed' in ''.join(output)
- assert 'efi_start_image() returned: 26' in ''.join(output)
+ assert 'efi_bootmgr_load() returned: 26' in ''.join(output)
with u_boot_console.log.section('Test Case 3b'):
# Test Case 3b, rejected by dbx even if db allows
@@ -120,7 +120,7 @@
'efidebug boot order 1',
'efidebug test bootmgr'])
assert '\'HELLO\' failed' in ''.join(output)
- assert 'efi_start_image() returned: 26' in ''.join(output)
+ assert 'efi_bootmgr_load() returned: 26' in ''.join(output)
def test_efi_signed_image_auth4(self, u_boot_console, efi_boot_env):
"""
@@ -146,7 +146,7 @@
'efidebug boot order 1',
'efidebug test bootmgr'])
assert '\'HELLO\' failed' in ''.join(output)
- assert 'efi_start_image() returned: 26' in ''.join(output)
+ assert 'efi_bootmgr_load() returned: 26' in ''.join(output)
def test_efi_signed_image_auth5(self, u_boot_console, efi_boot_env):
"""
@@ -196,7 +196,7 @@
'efidebug boot order 1',
'efidebug test bootmgr'])
assert '\'HELLO\' failed' in ''.join(output)
- assert 'efi_start_image() returned: 26' in ''.join(output)
+ assert 'efi_bootmgr_load() returned: 26' in ''.join(output)
with u_boot_console.log.section('Test Case 5d'):
# Test Case 5d, rejected if both of signatures are revoked
@@ -208,7 +208,7 @@
'efidebug boot order 1',
'efidebug test bootmgr'])
assert '\'HELLO\' failed' in ''.join(output)
- assert 'efi_start_image() returned: 26' in ''.join(output)
+ assert 'efi_bootmgr_load() returned: 26' in ''.join(output)
# Try rejection in reverse order.
u_boot_console.restart_uboot()
@@ -233,7 +233,7 @@
'efidebug boot order 1',
'efidebug test bootmgr'])
assert '\'HELLO\' failed' in ''.join(output)
- assert 'efi_start_image() returned: 26' in ''.join(output)
+ assert 'efi_bootmgr_load() returned: 26' in ''.join(output)
def test_efi_signed_image_auth6(self, u_boot_console, efi_boot_env):
"""
@@ -268,7 +268,7 @@
'efidebug boot order 1',
'efidebug test bootmgr'])
assert '\'HELLO\' failed' in ''.join(output)
- assert 'efi_start_image() returned: 26' in ''.join(output)
+ assert 'efi_bootmgr_load() returned: 26' in ''.join(output)
with u_boot_console.log.section('Test Case 6c'):
# Test Case 6c, rejected by image's digest in dbx
@@ -282,7 +282,7 @@
'efidebug boot order 1',
'efidebug test bootmgr'])
assert '\'HELLO\' failed' in ''.join(output)
- assert 'efi_start_image() returned: 26' in ''.join(output)
+ assert 'efi_bootmgr_load() returned: 26' in ''.join(output)
def test_efi_signed_image_auth7(self, u_boot_console, efi_boot_env):
"""
@@ -310,7 +310,7 @@
'efidebug boot order 1',
'efidebug test bootmgr'])
assert '\'HELLO\' failed' in ''.join(output)
- assert 'efi_start_image() returned: 26' in ''.join(output)
+ assert 'efi_bootmgr_load() returned: 26' in ''.join(output)
# sha512 of an x509 cert in dbx
u_boot_console.restart_uboot()
@@ -333,7 +333,7 @@
'efidebug boot order 1',
'efidebug test bootmgr'])
assert '\'HELLO\' failed' in ''.join(output)
- assert 'efi_start_image() returned: 26' in ''.join(output)
+ assert 'efi_bootmgr_load() returned: 26' in ''.join(output)
def test_efi_signed_image_auth8(self, u_boot_console, efi_boot_env):
"""
@@ -368,4 +368,4 @@
'efidebug test bootmgr'])
assert(not 'hELLO, world!' in ''.join(output))
assert('\'HELLO1\' failed' in ''.join(output))
- assert('efi_start_image() returned: 26' in ''.join(output))
+ assert('efi_bootmgr_load() returned: 26' in ''.join(output))
diff --git a/test/py/tests/test_efi_secboot/test_signed_intca.py b/test/py/tests/test_efi_secboot/test_signed_intca.py
index 8d9a5f3..cf90620 100644
--- a/test/py/tests/test_efi_secboot/test_signed_intca.py
+++ b/test/py/tests/test_efi_secboot/test_signed_intca.py
@@ -43,7 +43,7 @@
'efidebug boot order 1',
'efidebug test bootmgr'])
assert '\'HELLO_a\' failed' in ''.join(output)
- assert 'efi_start_image() returned: 26' in ''.join(output)
+ assert 'efi_bootmgr_load() returned: 26' in ''.join(output)
with u_boot_console.log.section('Test Case 1b'):
# Test Case 1b, signed and authenticated by root CA
@@ -74,7 +74,7 @@
'efidebug boot order 1',
'efidebug test bootmgr'])
assert '\'HELLO_abc\' failed' in ''.join(output)
- assert 'efi_start_image() returned: 26' in ''.join(output)
+ assert 'efi_bootmgr_load() returned: 26' in ''.join(output)
with u_boot_console.log.section('Test Case 2b'):
# Test Case 2b, signed and authenticated by root CA
@@ -84,7 +84,7 @@
'efidebug boot order 1',
'efidebug test bootmgr'])
assert '\'HELLO_abc\' failed' in ''.join(output)
- assert 'efi_start_image() returned: 26' in ''.join(output)
+ assert 'efi_bootmgr_load() returned: 26' in ''.join(output)
with u_boot_console.log.section('Test Case 2c'):
# Test Case 2c, signed and authenticated by root CA
@@ -122,7 +122,7 @@
assert 'Hello, world!' in ''.join(output)
# Or,
# assert '\'HELLO_abc\' failed' in ''.join(output)
- # assert 'efi_start_image() returned: 26' in ''.join(output)
+ # assert 'efi_bootmgr_load() returned: 26' in ''.join(output)
with u_boot_console.log.section('Test Case 3b'):
# Test Case 3b, revoked by root CA in dbx
@@ -132,4 +132,4 @@
'efidebug boot order 1',
'efidebug test bootmgr'])
assert '\'HELLO_abc\' failed' in ''.join(output)
- assert 'efi_start_image() returned: 26' in ''.join(output)
+ assert 'efi_bootmgr_load() returned: 26' in ''.join(output)
diff --git a/test/py/tests/test_efi_secboot/test_unsigned.py b/test/py/tests/test_efi_secboot/test_unsigned.py
index 7c078f2..b4320ae 100644
--- a/test/py/tests/test_efi_secboot/test_unsigned.py
+++ b/test/py/tests/test_efi_secboot/test_unsigned.py
@@ -42,7 +42,7 @@
output = u_boot_console.run_command_list([
'efidebug boot order 1',
'efidebug test bootmgr'])
- assert 'efi_start_image() returned: 26' in ''.join(output)
+ assert 'efi_bootmgr_load() returned: 26' in ''.join(output)
assert 'Hello, world!' not in ''.join(output)
def test_efi_unsigned_image_auth2(self, u_boot_console, efi_boot_env):
@@ -95,7 +95,7 @@
output = u_boot_console.run_command_list([
'efidebug boot order 1',
'efidebug test bootmgr'])
- assert 'efi_start_image() returned: 26' in ''.join(output)
+ assert 'efi_bootmgr_load() returned: 26' in ''.join(output)
assert 'Hello, world!' not in ''.join(output)
with u_boot_console.log.section('Test Case 3b'):
@@ -113,5 +113,5 @@
output = u_boot_console.run_command_list([
'efidebug boot order 1',
'efidebug test bootmgr'])
- assert 'efi_start_image() returned: 26' in ''.join(output)
+ assert 'efi_bootmgr_load() returned: 26' in ''.join(output)
assert 'Hello, world!' not in ''.join(output)
diff --git a/test/py/tests/test_eficonfig/test_eficonfig.py b/test/py/tests/test_eficonfig/test_eficonfig.py
index b0a6cc4..1d8e033 100644
--- a/test/py/tests/test_eficonfig/test_eficonfig.py
+++ b/test/py/tests/test_eficonfig/test_eficonfig.py
@@ -224,7 +224,7 @@
# Change the Boot Order
press_up_down_enter_and_wait(0, 2, True, None)
- # Check the curren BootOrder
+ # Check the current BootOrder
for i in ('test 2', 'test 1', 'host 0:1', 'Save', 'Quit'):
u_boot_console.p.expect([i])
# move 'test 2' to the second entry
@@ -269,7 +269,7 @@
u_boot_console.run_command('eficonfig', wait_for_prompt=False)
# Select 'Edit Boot Option'
press_up_down_enter_and_wait(0, 1, True, None)
- # Check the curren BootOrder
+ # Check the current BootOrder
for i in ('test 1', 'Quit'):
u_boot_console.p.expect([i])
press_up_down_enter_and_wait(0, 0, True, None)
@@ -326,7 +326,7 @@
# Select 'Delete Boot Option'
press_up_down_enter_and_wait(0, 3, True, None)
- # Check the curren BootOrder
+ # Check the current BootOrder
for i in ('test 3', 'Quit'):
u_boot_console.p.expect([i])
diff --git a/test/py/tests/test_optee_rpmb.py b/test/py/tests/test_optee_rpmb.py
new file mode 100644
index 0000000..8a081b5
--- /dev/null
+++ b/test/py/tests/test_optee_rpmb.py
@@ -0,0 +1,20 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Tests for OP-TEE RPMB read/write support
+
+"""
+This tests optee_rpmb cmd in U-Boot
+"""
+
+import pytest
+import u_boot_utils as util
+
+@pytest.mark.buildconfigspec('cmd_optee_rpmb')
+def test_optee_rpmb_read_write(u_boot_console):
+ """Test OP-TEE RPMB cmd read/write
+ """
+ response = u_boot_console.run_command('optee_rpmb write_pvalue test_variable test_value')
+ assert response == 'Wrote 11 bytes'
+
+ response = u_boot_console.run_command('optee_rpmb read_pvalue test_variable 11')
+ assert response == 'Read 11 bytes, value = test_value'
\ No newline at end of file
diff --git a/test/py/tests/test_scsi.py b/test/py/tests/test_scsi.py
index be2e283..445693c 100644
--- a/test/py/tests/test_scsi.py
+++ b/test/py/tests/test_scsi.py
@@ -87,6 +87,6 @@
def test_scsi_part(u_boot_console):
test_scsi_dev(u_boot_console)
output = u_boot_console.run_command('scsi part')
- assert 'Partition Map for SCSI device' in output
+ assert 'Partition Map for scsi device' in output
output = u_boot_console.run_command('echo $?')
assert output.endswith('0')
diff --git a/test/stdint/int-types.c b/test/stdint/int-types.c
index f6d09e8..9051e32 100644
--- a/test/stdint/int-types.c
+++ b/test/stdint/int-types.c
@@ -1,4 +1,4 @@
-#include <common.h>
+#include <linux/types.h>
int test_types(void)
{
diff --git a/test/str_ut.c b/test/str_ut.c
index fa9328e..3897798 100644
--- a/test/str_ut.c
+++ b/test/str_ut.c
@@ -3,7 +3,6 @@
* Copyright 2020 Google LLC
*/
-#include <common.h>
#include <vsprintf.h>
#include <test/suites.h>
#include <test/test.h>
diff --git a/test/test-main.c b/test/test-main.c
index b7015d9..3fa6f6e 100644
--- a/test/test-main.c
+++ b/test/test-main.c
@@ -4,7 +4,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <blk.h>
#include <console.h>
#include <cyclic.h>
diff --git a/test/time_ut.c b/test/time_ut.c
index 80b82db..149c4b5 100644
--- a/test/time_ut.c
+++ b/test/time_ut.c
@@ -4,7 +4,6 @@
* Written by Simon Glass <sjg@chromium.org>
*/
-#include <common.h>
#include <command.h>
#include <errno.h>
#include <time.h>
diff --git a/test/unicode_ut.c b/test/unicode_ut.c
index 47c3f52..13e29c9 100644
--- a/test/unicode_ut.c
+++ b/test/unicode_ut.c
@@ -5,7 +5,6 @@
* Copyright (c) 2018 Heinrich Schuchardt <xypron.glpk@gmx.de>
*/
-#include <common.h>
#include <charset.h>
#include <command.h>
#include <efi_loader.h>
diff --git a/test/ut.c b/test/ut.c
index 628e9dc..ae99831 100644
--- a/test/ut.c
+++ b/test/ut.c
@@ -5,7 +5,6 @@
* Copyright (c) 2013 Google, Inc
*/
-#include <common.h>
#include <console.h>
#include <malloc.h>
#ifdef CONFIG_SANDBOX
diff --git a/tools/binman/btool/mkimage.py b/tools/binman/btool/mkimage.py
index d5b407c..39a4c8c 100644
--- a/tools/binman/btool/mkimage.py
+++ b/tools/binman/btool/mkimage.py
@@ -11,7 +11,7 @@
"""Image generation for U-Boot
This bintool supports running `mkimage` with some basic parameters as
- neeed by binman.
+ needed by binman.
Normally binman uses the mkimage built by U-Boot. But when run outside the
U-Boot build system, binman can use the version installed in your system.
diff --git a/tools/binman/btool/openssl.py b/tools/binman/btool/openssl.py
index fe81a1f..c6df64c 100644
--- a/tools/binman/btool/openssl.py
+++ b/tools/binman/btool/openssl.py
@@ -283,6 +283,7 @@
basicConstraints = CA:true
1.3.6.1.4.1.294.1.3=ASN1:SEQUENCE:swrv
1.3.6.1.4.1.294.1.9=ASN1:SEQUENCE:ext_boot_info
+1.3.6.1.4.1.294.1.8=ASN1:SEQUENCE:debug
[swrv]
swrv=INTEGER:{sw_rev}
@@ -323,6 +324,12 @@
shaType = OID:{sha_type}
shaValue = FORMAT:HEX,OCT:{hashval_sysfw_data}
+[ debug ]
+debugUID = FORMAT:HEX,OCT:0000000000000000000000000000000000000000000000000000000000000000
+debugType = INTEGER:4
+coreDbgEn = INTEGER:0
+coreDbgSecEn = INTEGER:0
+
{sysfw_inner_cert_ext_boot_block}
{dm_data_ext_boot_block}
diff --git a/tools/binman/etype/nxp_imx8mimage.py b/tools/binman/etype/nxp_imx8mimage.py
new file mode 100644
index 0000000..3585120
--- /dev/null
+++ b/tools/binman/etype/nxp_imx8mimage.py
@@ -0,0 +1,74 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright 2023-2024 Marek Vasut <marex@denx.de>
+# Written with much help from Simon Glass <sjg@chromium.org>
+#
+# Entry-type module for generating the i.MX8M mkimage -T imx8mimage
+# configuration file and invocation of mkimage -T imx8mimage on the
+# configuration file and input data.
+#
+
+from collections import OrderedDict
+
+from binman.entry import Entry
+from binman.etype.mkimage import Entry_mkimage
+from binman.etype.section import Entry_section
+from binman import elf
+from dtoc import fdt_util
+from u_boot_pylib import tools
+
+class Entry_nxp_imx8mimage(Entry_mkimage):
+ """NXP i.MX8M imx8mimage .cfg file generator and mkimage invoker
+
+ Properties / Entry arguments:
+ - nxp,boot-from - device to boot from (e.g. 'sd')
+ - nxp,loader-address - loader address (SPL text base)
+ - nxp,rom-version - BootROM version ('2' for i.MX8M Nano and Plus)
+ """
+
+ def __init__(self, section, etype, node):
+ super().__init__(section, etype, node)
+ self.required_props = ['nxp,boot-from', 'nxp,rom-version', 'nxp,loader-address']
+
+ def ReadNode(self):
+ super().ReadNode()
+ self.boot_from = fdt_util.GetString(self._node, 'nxp,boot-from')
+ self.loader_address = fdt_util.GetInt(self._node, 'nxp,loader-address')
+ self.rom_version = fdt_util.GetInt(self._node, 'nxp,rom-version')
+ self.ReadEntries()
+
+ def BuildSectionData(self, required):
+ data, input_fname, uniq = self.collect_contents_to_file(
+ self._entries.values(), 'input')
+ # Generate mkimage configuration file similar to imx8mimage.cfg
+ # and pass it to mkimage to generate SPL image for us here.
+ cfg_fname = tools.get_output_filename('nxp.imx8mimage.cfg.%s' % uniq)
+ with open(cfg_fname, 'w') as outf:
+ print('ROM_VERSION v%d' % self.rom_version, file=outf)
+ print('BOOT_FROM %s' % self.boot_from, file=outf)
+ print('LOADER %s %#x' % (input_fname, self.loader_address), file=outf)
+
+ output_fname = tools.get_output_filename(f'cfg-out.{uniq}')
+ args = ['-d', input_fname, '-n', cfg_fname, '-T', 'imx8mimage',
+ output_fname]
+ if self.mkimage.run_cmd(*args) is not None:
+ return tools.read_file(output_fname)
+ else:
+ # Bintool is missing; just use the input data as the output
+ self.record_missing_bintool(self.mkimage)
+ return data
+
+ def SetImagePos(self, image_pos):
+ # Customized SoC specific SetImagePos which skips the mkimage etype
+ # implementation and removes the 0x48 offset introduced there. That
+ # offset is only used for uImage/fitImage, which is not the case in
+ # here.
+ upto = 0x00
+ for entry in super().GetEntries().values():
+ entry.SetOffsetSize(upto, None)
+
+ # Give up if any entries lack a size
+ if entry.size is None:
+ return
+ upto += entry.size
+
+ Entry_section.SetImagePos(self, image_pos)
diff --git a/tools/binman/etype/ti_board_config.py b/tools/binman/etype/ti_board_config.py
index 2c3bb8f..c10d66e 100644
--- a/tools/binman/etype/ti_board_config.py
+++ b/tools/binman/etype/ti_board_config.py
@@ -248,7 +248,7 @@
yaml_config = config.YamlLintConfig("extends: default")
for p in yamllint.linter.run(open(self._config_file, "r"), yaml_config):
- self.Raise(f"Yamllint error: {p.line}: {p.rule}")
+ self.Raise(f"Yamllint error: Line {p.line} in {self._config_file}: {p.rule}")
try:
validate(self.file_yaml, self.schema_yaml)
except Exception as e:
diff --git a/tools/buildman/test.py b/tools/buildman/test.py
index bdd3d84..f92add7 100644
--- a/tools/buildman/test.py
+++ b/tools/buildman/test.py
@@ -195,7 +195,7 @@
Args:
echo_lines: True to echo lines to the terminal to aid test
development
- kwdisplay_args: Dict of arguemnts to pass to
+ kwdisplay_args: Dict of arguments to pass to
Builder.SetDisplayOptions()
Returns:
diff --git a/tools/dtoc/dtb_platdata.py b/tools/dtoc/dtb_platdata.py
index 39f416c..89066e6 100644
--- a/tools/dtoc/dtb_platdata.py
+++ b/tools/dtoc/dtb_platdata.py
@@ -835,7 +835,6 @@
def generate_uclasses(self):
self.out('\n')
- self.out('#include <common.h>\n')
self.out('#include <dm.h>\n')
self.out('#include <dt-structs.h>\n')
self.out('\n')
@@ -1059,7 +1058,6 @@
self.out('/* Allow use of U_BOOT_DRVINFO() in this file */\n')
self.out('#define DT_PLAT_C\n')
self.out('\n')
- self.out('#include <common.h>\n')
self.out('#include <dm.h>\n')
self.out('#include <dt-structs.h>\n')
self.out('\n')
@@ -1092,7 +1090,6 @@
See the documentation in doc/driver-model/of-plat.rst for more
information.
"""
- self.out('#include <common.h>\n')
self.out('#include <dm.h>\n')
self.out('#include <dt-structs.h>\n')
self.out('\n')
diff --git a/tools/dtoc/test_dtoc.py b/tools/dtoc/test_dtoc.py
index 597c93e..c4a0889 100755
--- a/tools/dtoc/test_dtoc.py
+++ b/tools/dtoc/test_dtoc.py
@@ -63,7 +63,6 @@
/* Allow use of U_BOOT_DRVINFO() in this file */
#define DT_PLAT_C
-#include <common.h>
#include <dm.h>
#include <dt-structs.h>
'''
@@ -417,7 +416,6 @@
'''
uclass_text_inst = '''
-#include <common.h>
#include <dm.h>
#include <dt-structs.h>
@@ -521,7 +519,6 @@
* This was generated by dtoc from a .dtb (device tree binary) file.
*/
-#include <common.h>
#include <dm.h>
#include <dt-structs.h>
diff --git a/tools/fit_common.c b/tools/fit_common.c
index 2d417d4..d1cde16 100644
--- a/tools/fit_common.c
+++ b/tools/fit_common.c
@@ -23,6 +23,8 @@
#include <image.h>
#include <u-boot/crc.h>
+#define COPYFILE_BUFSIZE (64 * 1024)
+
void fit_print_header(const void *fit, struct image_tool_params *params)
{
fit_print_contents(fit);
@@ -145,14 +147,14 @@
goto out;
}
- buf = calloc(1, 512);
+ buf = calloc(1, COPYFILE_BUFSIZE);
if (!buf) {
printf("Can't allocate buffer to copy file\n");
goto out;
}
while (1) {
- size = read(fd_src, buf, 512);
+ size = read(fd_src, buf, COPYFILE_BUFSIZE);
if (size < 0) {
printf("Can't read file %s\n", src);
goto out;
diff --git a/tools/fit_image.c b/tools/fit_image.c
index beef1fa..0fccfbb 100644
--- a/tools/fit_image.c
+++ b/tools/fit_image.c
@@ -137,7 +137,7 @@
int ret;
int fd;
- fd = open(fname, O_RDWR | O_BINARY);
+ fd = open(fname, O_RDONLY | O_BINARY);
if (fd < 0) {
fprintf(stderr, "%s: Can't open %s: %s\n",
params->cmdname, fname, strerror(errno));
diff --git a/tools/image-host.c b/tools/image-host.c
index b2a0f2e..7bfc0cb 100644
--- a/tools/image-host.c
+++ b/tools/image-host.c
@@ -346,17 +346,17 @@
unsigned char *key_iv_data, int expected_size)
{
char filename[PATH_MAX];
- int ret = -1;
+ int ret;
ret = snprintf(filename, sizeof(filename), "%s/%s%s",
keydir, key_iv_name, ".bin");
if (ret >= sizeof(filename)) {
- printf("Can't format the key or IV filename when setting up the cipher: insufficient buffer space\n");
- ret = -1;
+ fprintf(stderr, "Can't format the key or IV filename when setting up the cipher: insufficient buffer space\n");
+ return -1;
}
if (ret < 0) {
- printf("Can't format the key or IV filename when setting up the cipher: snprintf error\n");
- ret = -1;
+ fprintf(stderr, "Can't format the key or IV filename when setting up the cipher: snprintf error\n");
+ return -1;
}
ret = fit_image_read_data(filename, key_iv_data, expected_size);
diff --git a/tools/proftool.c b/tools/proftool.c
index fca45e4..c2e3809 100644
--- a/tools/proftool.c
+++ b/tools/proftool.c
@@ -290,7 +290,7 @@
"Options:\n"
" -c <cfg>\tSpecify config file\n"
" -f <subtype>\tSpecify output subtype\n"
- " -m <map>\tSpecify Systen.map file\n"
+ " -m <map>\tSpecify System.map file\n"
" -o <fname>\tSpecify output file\n"
" -t <fname>\tSpecify trace data file (from U-Boot 'trace calls')\n"
" -v <0-4>\tSpecify verbosity\n"
@@ -306,7 +306,7 @@
}
/**
- * h_cmp_offset - bsearch() function to compare two functions bny their offset
+ * h_cmp_offset - bsearch() function to compare two functions by their offset
*
* @v1: Pointer to first function (struct func_info)
* @v2: Pointer to second function (struct func_info)
@@ -431,7 +431,7 @@
static struct func_info *find_caller_by_offset(uint offset)
{
int low; /* least function that could be a match */
- int high; /* greated function that could be a match */
+ int high; /* greatest function that could be a match */
struct func_info key;
low = 0;
@@ -1352,7 +1352,7 @@
}
if (!(func->flags & FUNCF_TRACE)) {
- debug("Funcion '%s' is excluded from trace\n",
+ debug("Function '%s' is excluded from trace\n",
func->name);
skip_count++;
continue;
@@ -1781,7 +1781,8 @@
*
* This works by maintaining a string shared across all recursive calls. The
* function name for this node is added to the existing string, to make up the
- * full call-stack description. For example, on entry, @str might contain:
+ * full call-stack description. For example, on entry, @str_buf->data might
+ * contain:
*
* "initf_bootstage;bootstage_mark_name"
* ^ @base
@@ -1795,18 +1796,18 @@
* @fout: Output file
* @out_format: Output format to use
* @node: Node to output (pass the whole tree at first)
- * @str: String to use to build the output line (e.g. 500 charas long)
- * @maxlen: Maximum length of string
+ * @str_buf: String buffer to use to build the output line
* @base: Current base position in the string
* @treep: Returns the resulting flamegraph tree
* Returns 0 if OK, -1 on error
*/
static int output_tree(FILE *fout, enum out_format_t out_format,
- const struct flame_node *node, char *str, int maxlen,
+ const struct flame_node *node, struct abuf *str_buf,
int base)
{
const struct flame_node *child;
int pos;
+ char *str = abuf_data(str_buf);
if (node->count) {
if (out_format == OUT_FMT_FLAMEGRAPH_CALLS) {
@@ -1832,18 +1833,29 @@
if (pos)
str[pos++] = ';';
list_for_each_entry(child, &node->child_head, sibling_node) {
- int len;
+ int len, needed;
len = strlen(child->func->name);
- if (pos + len + 1 >= maxlen) {
- fprintf(stderr, "String too short (%d chars)\n",
- maxlen);
- return -1;
+ needed = pos + len + 1;
+ if (needed > abuf_size(str_buf)) {
+ /*
+ * We need to re-allocate the string buffer; increase
+ * its size by multiples of 500 characters.
+ */
+ needed = 500 * ((needed / 500) + 1);
+ if (!abuf_realloc(str_buf, needed))
+ return -1;
+ str = abuf_data(str_buf);
+ memset(str + pos, 0, abuf_size(str_buf) - pos);
}
strcpy(str + pos, child->func->name);
- if (output_tree(fout, out_format, child, str, maxlen,
- pos + len))
+ if (output_tree(fout, out_format, child, str_buf, pos + len))
return -1;
+ /*
+ * Update our pointer as the string buffer might have been
+ * re-allocated.
+ */
+ str = abuf_data(str_buf);
}
return 0;
@@ -1859,16 +1871,24 @@
static int make_flamegraph(FILE *fout, enum out_format_t out_format)
{
struct flame_node *tree;
- char str[500];
+ struct abuf str_buf;
+ char *str;
+ int ret = 0;
if (make_flame_tree(out_format, &tree))
return -1;
- *str = '\0';
- if (output_tree(fout, out_format, tree, str, sizeof(str), 0))
+ abuf_init(&str_buf);
+ if (!abuf_realloc(&str_buf, 500))
return -1;
- return 0;
+ str = abuf_data(&str_buf);
+ memset(str, 0, abuf_size(&str_buf));
+ if (output_tree(fout, out_format, tree, &str_buf, 0))
+ ret = -1;
+
+ abuf_uninit(&str_buf);
+ return ret;
}
/**