m68k: Remove dead code

There are no mcf5227x platforms, remove the CPU code.

Signed-off-by: Tom Rini <trini@konsulko.com>
diff --git a/arch/m68k/Kconfig b/arch/m68k/Kconfig
index 7f6e431..e609ae0 100644
--- a/arch/m68k/Kconfig
+++ b/arch/m68k/Kconfig
@@ -53,12 +53,6 @@
         select DM_SERIAL
 	bool
 
-config MCF5227x
-	select OF_CONTROL
-	select DM
-        select DM_SERIAL
-	bool
-
 # processor type
 config M5208
 	bool
diff --git a/arch/m68k/cpu/mcf5227x/Makefile b/arch/m68k/cpu/mcf5227x/Makefile
deleted file mode 100644
index 6a38c48..0000000
--- a/arch/m68k/cpu/mcf5227x/Makefile
+++ /dev/null
@@ -1,9 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-#
-# (C) Copyright 2000-2004
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-
-# ccflags-y += -DET_DEBUG
-
-extra-y	= start.o
-obj-y	= cpu.o speed.o cpu_init.o interrupts.o dspi.o
diff --git a/arch/m68k/cpu/mcf5227x/cpu.c b/arch/m68k/cpu/mcf5227x/cpu.c
deleted file mode 100644
index a7adf64..0000000
--- a/arch/m68k/cpu/mcf5227x/cpu.c
+++ /dev/null
@@ -1,67 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- *
- * (C) Copyright 2000-2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc.
- * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
- */
-
-#include <common.h>
-#include <init.h>
-#include <vsprintf.h>
-#include <watchdog.h>
-#include <command.h>
-#include <asm/global_data.h>
-#include <linux/delay.h>
-
-#include <asm/immap.h>
-#include <asm/io.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-int do_reset(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
-{
-	rcm_t *rcm = (rcm_t *) (MMAP_RCM);
-	udelay(1000);
-	setbits_8(&rcm->rcr, RCM_RCR_SOFTRST);
-
-	/* we don't return! */
-	return 0;
-};
-
-#if defined(CONFIG_DISPLAY_CPUINFO)
-int print_cpuinfo(void)
-{
-	ccm_t *ccm = (ccm_t *) MMAP_CCM;
-	u16 msk;
-	u16 id = 0;
-	u8 ver;
-
-	puts("CPU:   ");
-	msk = (in_be16(&ccm->cir) >> 6);
-	ver = (in_be16(&ccm->cir) & 0x003f);
-	switch (msk) {
-	case 0x6c:
-		id = 52277;
-		break;
-	}
-
-	if (id) {
-		char buf1[32], buf2[32], buf3[32];
-
-		printf("Freescale MCF%d (Mask:%01x Version:%x)\n", id, msk,
-		       ver);
-		printf("       CPU CLK %s MHz BUS CLK %s MHz FLB CLK %s MHz\n",
-		       strmhz(buf1, gd->cpu_clk),
-		       strmhz(buf2, gd->bus_clk),
-		       strmhz(buf3, gd->arch.flb_clk));
-		printf("       INP CLK %s MHz VCO CLK %s MHz\n",
-		       strmhz(buf1, gd->arch.inp_clk),
-		       strmhz(buf2, gd->arch.vco_clk));
-	}
-
-	return 0;
-}
-#endif /* CONFIG_DISPLAY_CPUINFO */
diff --git a/arch/m68k/cpu/mcf5227x/cpu_init.c b/arch/m68k/cpu/mcf5227x/cpu_init.c
deleted file mode 100644
index 4ab13b4..0000000
--- a/arch/m68k/cpu/mcf5227x/cpu_init.c
+++ /dev/null
@@ -1,152 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- *
- * (C) Copyright 2000-2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2004-2007, 2012 Freescale Semiconductor, Inc.
- * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
- */
-
-#include <common.h>
-#include <cpu_func.h>
-#include <init.h>
-#include <watchdog.h>
-
-#include <asm/immap.h>
-#include <asm/io.h>
-#include <asm/rtc.h>
-#include <linux/compiler.h>
-
-void cfspi_port_conf(void)
-{
-	gpio_t *gpio = (gpio_t *)MMAP_GPIO;
-
-	out_8(&gpio->par_dspi,
-	      GPIO_PAR_DSPI_SIN_SIN | GPIO_PAR_DSPI_SOUT_SOUT |
-	      GPIO_PAR_DSPI_SCK_SCK);
-}
-
-/*
- * Breath some life into the CPU...
- *
- * Set up the memory map,
- * initialize a bunch of registers,
- * initialize the UPM's
- */
-void cpu_init_f(void)
-{
-	gpio_t *gpio = (gpio_t *) MMAP_GPIO;
-	fbcs_t *fbcs __maybe_unused = (fbcs_t *) MMAP_FBCS;
-
-#if !defined(CONFIG_CF_SBF)
-	scm1_t *scm1 = (scm1_t *) MMAP_SCM1;
-	pll_t *pll = (pll_t *)MMAP_PLL;
-
-	/* Workaround, must place before fbcs */
-	out_be32(&pll->psr, 0x12);
-
-	out_be32(&scm1->mpr, 0x77777777);
-	out_be32(&scm1->pacra, 0);
-	out_be32(&scm1->pacrb, 0);
-	out_be32(&scm1->pacrc, 0);
-	out_be32(&scm1->pacrd, 0);
-	out_be32(&scm1->pacre, 0);
-	out_be32(&scm1->pacrf, 0);
-	out_be32(&scm1->pacrg, 0);
-	out_be32(&scm1->pacri, 0);
-
-#if (defined(CONFIG_SYS_CS0_BASE) && defined(CONFIG_SYS_CS0_MASK) \
-     && defined(CONFIG_SYS_CS0_CTRL))
-	out_be32(&fbcs->csar0, CONFIG_SYS_CS0_BASE);
-	out_be32(&fbcs->cscr0, CONFIG_SYS_CS0_CTRL);
-	out_be32(&fbcs->csmr0, CONFIG_SYS_CS0_MASK);
-#endif
-#endif				/* CONFIG_CF_SBF */
-
-#if (defined(CONFIG_SYS_CS1_BASE) && defined(CONFIG_SYS_CS1_MASK) \
-     && defined(CONFIG_SYS_CS1_CTRL))
-	out_be32(&fbcs->csar1, CONFIG_SYS_CS1_BASE);
-	out_be32(&fbcs->cscr1, CONFIG_SYS_CS1_CTRL);
-	out_be32(&fbcs->csmr1, CONFIG_SYS_CS1_MASK);
-#endif
-
-#if (defined(CONFIG_SYS_CS2_BASE) && defined(CONFIG_SYS_CS2_MASK) \
-     && defined(CONFIG_SYS_CS2_CTRL))
-	out_be32(&fbcs->csar2, CONFIG_SYS_CS2_BASE);
-	out_be32(&fbcs->cscr2, CONFIG_SYS_CS2_CTRL);
-	out_be32(&fbcs->csmr2, CONFIG_SYS_CS2_MASK);
-#endif
-
-#if (defined(CONFIG_SYS_CS3_BASE) && defined(CONFIG_SYS_CS3_MASK) \
-     && defined(CONFIG_SYS_CS3_CTRL))
-	out_be32(&fbcs->csar3, CONFIG_SYS_CS3_BASE);
-	out_be32(&fbcs->cscr3, CONFIG_SYS_CS3_CTRL);
-	out_be32(&fbcs->csmr3, CONFIG_SYS_CS3_MASK);
-#endif
-
-#if (defined(CONFIG_SYS_CS4_BASE) && defined(CONFIG_SYS_CS4_MASK) \
-     && defined(CONFIG_SYS_CS4_CTRL))
-	out_be32(&fbcs->csar4, CONFIG_SYS_CS4_BASE);
-	out_be32(&fbcs->cscr4, CONFIG_SYS_CS4_CTRL);
-	out_be32(&fbcs->csmr4, CONFIG_SYS_CS4_MASK);
-#endif
-
-#if (defined(CONFIG_SYS_CS5_BASE) && defined(CONFIG_SYS_CS5_MASK) \
-     && defined(CONFIG_SYS_CS5_CTRL))
-	out_be32(&fbcs->csar5, CONFIG_SYS_CS5_BASE);
-	out_be32(&fbcs->cscr5, CONFIG_SYS_CS5_CTRL);
-	out_be32(&fbcs->csmr5, CONFIG_SYS_CS5_MASK);
-#endif
-
-#ifdef CONFIG_SYS_I2C_FSL
-	out_8(&gpio->par_i2c, GPIO_PAR_I2C_SCL_SCL | GPIO_PAR_I2C_SDA_SDA);
-#endif
-
-	icache_enable();
-
-	cfspi_port_conf();
-}
-
-/*
- * initialize higher level parts of CPU like timers
- */
-int cpu_init_r(void)
-{
-#ifdef CONFIG_MCFRTC
-	rtc_t *rtc = (rtc_t *)(CONFIG_SYS_MCFRTC_BASE);
-	rtcex_t *rtcex = (rtcex_t *)&rtc->extended;
-
-	out_be32(&rtcex->gocu, (CONFIG_SYS_RTC_OSCILLATOR >> 16) & 0xffff);
-	out_be32(&rtcex->gocl, CONFIG_SYS_RTC_OSCILLATOR & 0xffff);
-#endif
-
-	return (0);
-}
-
-void uart_port_conf(int port)
-{
-	gpio_t *gpio = (gpio_t *) MMAP_GPIO;
-
-	/* Setup Ports: */
-	switch (port) {
-	case 0:
-		clrbits_be16(&gpio->par_uart,
-			~(GPIO_PAR_UART_U0TXD_UNMASK & GPIO_PAR_UART_U0RXD_UNMASK));
-		setbits_be16(&gpio->par_uart,
-			GPIO_PAR_UART_U0TXD_U0TXD | GPIO_PAR_UART_U0RXD_U0RXD);
-		break;
-	case 1:
-		clrbits_be16(&gpio->par_uart,
-			~(GPIO_PAR_UART_U1TXD_UNMASK & GPIO_PAR_UART_U1RXD_UNMASK));
-		setbits_be16(&gpio->par_uart,
-			GPIO_PAR_UART_U1TXD_U1TXD | GPIO_PAR_UART_U1RXD_U1RXD);
-		break;
-	case 2:
-		clrbits_8(&gpio->par_dspi,
-			~(GPIO_PAR_DSPI_SIN_UNMASK & GPIO_PAR_DSPI_SOUT_UNMASK));
-		out_8(&gpio->par_dspi,
-			GPIO_PAR_DSPI_SIN_U2RXD | GPIO_PAR_DSPI_SOUT_U2TXD);
-		break;
-	}
-}
diff --git a/arch/m68k/cpu/mcf5227x/dspi.c b/arch/m68k/cpu/mcf5227x/dspi.c
deleted file mode 100644
index 8fc4da2..0000000
--- a/arch/m68k/cpu/mcf5227x/dspi.c
+++ /dev/null
@@ -1,43 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * (C) Copyright 2019
- * Angelo Dureghello <angleo@sysam.it>
- *
- * CPU specific dspi routines
- */
-
-#include <common.h>
-#include <asm/immap.h>
-#include <asm/io.h>
-
-#ifdef CONFIG_CF_DSPI
-void dspi_chip_select(int cs)
-{
-	struct gpio *gpio = (struct gpio *)MMAP_GPIO;
-
-	switch (cs) {
-	case 0:
-		clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS0_UNMASK);
-		setbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS0_PCS0);
-		break;
-	case 2:
-		clrbits_8(&gpio->par_timer, ~GPIO_PAR_TIMER_T2IN_UNMASK);
-		setbits_8(&gpio->par_timer, GPIO_PAR_TIMER_T2IN_DSPIPCS2);
-		break;
-	}
-}
-
-void dspi_chip_unselect(int cs)
-{
-	struct gpio *gpio = (struct gpio *)MMAP_GPIO;
-
-	switch (cs) {
-	case 0:
-		clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS0_PCS0);
-		break;
-	case 2:
-		clrbits_8(&gpio->par_timer, ~GPIO_PAR_TIMER_T2IN_UNMASK);
-		break;
-	}
-}
-#endif /* CONFIG_CF_DSPI */
diff --git a/arch/m68k/cpu/mcf5227x/interrupts.c b/arch/m68k/cpu/mcf5227x/interrupts.c
deleted file mode 100644
index 5a6a88c..0000000
--- a/arch/m68k/cpu/mcf5227x/interrupts.c
+++ /dev/null
@@ -1,37 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- *
- * (C) Copyright 2000-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc.
- * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
- */
-
-/* CPU specific interrupt routine */
-#include <common.h>
-#include <irq_func.h>
-#include <asm/immap.h>
-#include <asm/io.h>
-
-int interrupt_init(void)
-{
-	int0_t *intp = (int0_t *) (CONFIG_SYS_INTR_BASE);
-
-	/* Make sure all interrupts are disabled */
-	setbits_be32(&intp->imrh0, 0xffffffff);
-	setbits_be32(&intp->imrl0, 0xffffffff);
-
-	enable_interrupts();
-	return 0;
-}
-
-#if defined(CONFIG_MCFTMR)
-void dtimer_intr_setup(void)
-{
-	int0_t *intp = (int0_t *) (CONFIG_SYS_INTR_BASE);
-
-	out_8(&intp->icr0[CONFIG_SYS_TMRINTR_NO], CONFIG_SYS_TMRINTR_PRI);
-	clrbits_be32(&intp->imrh0, CONFIG_SYS_TMRINTR_MASK);
-}
-#endif
diff --git a/arch/m68k/cpu/mcf5227x/speed.c b/arch/m68k/cpu/mcf5227x/speed.c
deleted file mode 100644
index fa9d5cb..0000000
--- a/arch/m68k/cpu/mcf5227x/speed.c
+++ /dev/null
@@ -1,127 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- *
- * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc.
- * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
- */
-
-#include <common.h>
-#include <clock_legacy.h>
-#include <asm/global_data.h>
-#include <asm/processor.h>
-
-#include <asm/immap.h>
-#include <asm/io.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-/*
- * Low Power Divider specifications
- */
-#define CLOCK_LPD_MIN		(1 << 0)	/* Divider (decoded) */
-#define CLOCK_LPD_MAX		(1 << 15)	/* Divider (decoded) */
-
-#define CLOCK_PLL_FVCO_MAX	540000000
-#define CLOCK_PLL_FVCO_MIN	300000000
-
-#define CLOCK_PLL_FSYS_MAX	266666666
-#define CLOCK_PLL_FSYS_MIN	100000000
-#define MHZ			1000000
-
-void clock_enter_limp(int lpdiv)
-{
-	ccm_t *ccm = (ccm_t *)MMAP_CCM;
-	int i, j;
-
-	/* Check bounds of divider */
-	if (lpdiv < CLOCK_LPD_MIN)
-		lpdiv = CLOCK_LPD_MIN;
-	if (lpdiv > CLOCK_LPD_MAX)
-		lpdiv = CLOCK_LPD_MAX;
-
-	/* Round divider down to nearest power of two */
-	for (i = 0, j = lpdiv; j != 1; j >>= 1, i++) ;
-
-	/* Apply the divider to the system clock */
-	clrsetbits_be16(&ccm->cdr, 0x0f00, CCM_CDR_LPDIV(i));
-
-	/* Enable Limp Mode */
-	setbits_be16(&ccm->misccr, CCM_MISCCR_LIMP);
-}
-
-/*
- * brief   Exit Limp mode
- * warning The PLL should be set and locked prior to exiting Limp mode
- */
-void clock_exit_limp(void)
-{
-	ccm_t *ccm = (ccm_t *)MMAP_CCM;
-	pll_t *pll = (pll_t *)MMAP_PLL;
-
-	/* Exit Limp mode */
-	clrbits_be16(&ccm->misccr, CCM_MISCCR_LIMP);
-
-	/* Wait for the PLL to lock */
-	while (!(in_be32(&pll->psr) & PLL_PSR_LOCK))
-		;
-}
-
-/*
- * get_clocks() fills in gd->cpu_clock and gd->bus_clk
- */
-int get_clocks(void)
-{
-
-	ccm_t *ccm = (ccm_t *)MMAP_CCM;
-	pll_t *pll = (pll_t *)MMAP_PLL;
-	int vco, temp, pcrvalue, pfdr;
-	u8 bootmode;
-
-	pcrvalue = in_be32(&pll->pcr) & 0xFF0F0FFF;
-	pfdr = pcrvalue >> 24;
-
-	if (pfdr == 0x1E)
-		bootmode = 0;	/* Normal Mode */
-
-#ifdef CONFIG_CF_SBF
-	bootmode = 3;		/* Serial Mode */
-#endif
-
-	if (bootmode == 0) {
-		/* Normal mode */
-		vco = ((in_be32(&pll->pcr) & 0xFF000000) >> 24) * CONFIG_SYS_INPUT_CLKSRC;
-		if ((vco < CLOCK_PLL_FVCO_MIN) || (vco > CLOCK_PLL_FVCO_MAX)) {
-			/* Default value */
-			pcrvalue = (in_be32(&pll->pcr) & 0x00FFFFFF);
-			pcrvalue |= 0x1E << 24;
-			out_be32(&pll->pcr, pcrvalue);
-			vco =
-			    ((in_be32(&pll->pcr) & 0xFF000000) >> 24) *
-			    CONFIG_SYS_INPUT_CLKSRC;
-		}
-		gd->arch.vco_clk = vco;	/* Vco clock */
-	} else if (bootmode == 3) {
-		/* serial mode */
-		vco = ((in_be32(&pll->pcr) & 0xFF000000) >> 24) * CONFIG_SYS_INPUT_CLKSRC;
-		gd->arch.vco_clk = vco;	/* Vco clock */
-	}
-
-	if ((in_be16(&ccm->ccr) & CCM_MISCCR_LIMP) == CCM_MISCCR_LIMP) {
-		/* Limp mode */
-	} else {
-		gd->arch.inp_clk = CONFIG_SYS_INPUT_CLKSRC; /* Input clock */
-
-		temp = (in_be32(&pll->pcr) & PLL_PCR_OUTDIV1_MASK) + 1;
-		gd->cpu_clk = vco / temp;	/* cpu clock */
-
-		temp = ((in_be32(&pll->pcr) & PLL_PCR_OUTDIV2_MASK) >> 4) + 1;
-		gd->arch.flb_clk = vco / temp;	/* flexbus clock */
-		gd->bus_clk = gd->arch.flb_clk;
-	}
-
-#ifdef CONFIG_SYS_I2C_FSL
-	gd->arch.i2c1_clk = gd->bus_clk;
-#endif
-
-	return (0);
-}
diff --git a/arch/m68k/cpu/mcf5227x/start.S b/arch/m68k/cpu/mcf5227x/start.S
deleted file mode 100644
index 632f1b1..0000000
--- a/arch/m68k/cpu/mcf5227x/start.S
+++ /dev/null
@@ -1,491 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright (C) 2003	Josef Baumgartner <josef.baumgartner@telex.de>
- * Based on code from Bernhard Kuhn <bkuhn@metrowerks.com>
- */
-
-#include <asm-offsets.h>
-#include <config.h>
-#include <asm/cache.h>
-
-#define _START	_start
-#define _FAULT	_fault
-
-#define SAVE_ALL						\
-	move.w	#0x2700,%sr;		/* disable intrs */	\
-	subl	#60,%sp;		/* space for 15 regs */ \
-	moveml	%d0-%d7/%a0-%a6,%sp@;
-
-#define RESTORE_ALL						\
-	moveml	%sp@,%d0-%d7/%a0-%a6;				\
-	addl	#60,%sp;		/* space for 15 regs */ \
-	rte;
-
-#if defined(CONFIG_CF_SBF)
-#define ASM_DRAMINIT	(asm_dram_init - CONFIG_SYS_TEXT_BASE + \
-	CONFIG_SYS_INIT_RAM_ADDR)
-#define ASM_SBF_IMG_HDR	(asm_sbf_img_hdr - CONFIG_SYS_TEXT_BASE + \
-	CONFIG_SYS_INIT_RAM_ADDR)
-#endif
-
-.text
-
-/*
- * Vector table. This is used for initial platform startup.
- * These vectors are to catch any un-intended traps.
- */
-_vectors:
-#if defined(CONFIG_CF_SBF)
-INITSP:	.long	0			/* Initial SP	*/
-INITPC:	.long	ASM_DRAMINIT		/* Initial PC	*/
-#else
-INITSP:	.long	0			/* Initial SP	*/
-INITPC:	.long	_START			/* Initial PC	*/
-#endif
-
-vector02_0F:
-.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
-.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
-
-/* Reserved */
-vector10_17:
-.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
-
-vector18_1F:
-.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
-
-#if !defined(CONFIG_CF_SBF)
-/* TRAP #0 - #15 */
-vector20_2F:
-.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
-.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
-
-/* Reserved	*/
-vector30_3F:
-.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
-.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
-
-vector64_127:
-.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
-.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
-.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
-.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
-.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
-.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
-.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
-.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
-
-vector128_191:
-.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
-.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
-.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
-.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
-.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
-.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
-.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
-.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
-
-vector192_255:
-.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
-.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
-.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
-.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
-.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
-.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
-.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
-.long	_FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
-#endif
-
-#if defined(CONFIG_CF_SBF)
-	/* Image header: chksum 4 bytes, len 4 bytes, img dest 4 bytes */
-asm_sbf_img_hdr:
-	.long	0x00000000		/* checksum, not yet implemented */
-	.long	0x00020000		/* image length */
-	.long	CONFIG_SYS_TEXT_BASE	/* image to be relocated at */
-
-asm_dram_init:
-	move.l	#(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
-	movec	%d0, %RAMBAR1		/* init Rambar */
-
-	move.l	#(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET), %sp
-	clr.l	%sp@-
-
-	/* Must disable global address */
-	move.l	#0xFC008000, %a1
-	move.l	#(CONFIG_SYS_CS0_BASE), (%a1)
-	move.l	#0xFC008008, %a1
-	move.l	#(CONFIG_SYS_CS0_CTRL), (%a1)
-	move.l	#0xFC008004, %a1
-	move.l	#(CONFIG_SYS_CS0_MASK), (%a1)
-
-	/*
-	 * Dram Initialization
-	 * a1, a2, and d0
-	 */
-	move.l	#0xFC0A4074, %a1
-	move.b	#(CONFIG_SYS_SDRAM_DRV_STRENGTH), (%a1)
-	nop
-
-	/* SDRAM Chip 0 and 1 */
-	move.l	#0xFC0B8110, %a1
-	move.l	#0xFC0B8114, %a2
-
-	/* calculate the size */
-	move.l	#0x13, %d1
-	move.l	#(CONFIG_SYS_SDRAM_SIZE), %d2
-#ifdef CONFIG_SYS_SDRAM_BASE1
-	lsr.l	#1, %d2
-#endif
-
-dramsz_loop:
-	lsr.l	#1, %d2
-	add.l	#1, %d1
-	cmp.l	#1, %d2
-	bne	dramsz_loop
-
-	/* SDRAM Chip 0 and 1 */
-	move.l	#(CONFIG_SYS_SDRAM_BASE), (%a1)
-	or.l	%d1, (%a1)
-#ifdef CONFIG_SYS_SDRAM_BASE1
-	move.l	#(CONFIG_SYS_SDRAM_BASE1), (%a2)
-	or.l	%d1, (%a2)
-#endif
-	nop
-
-	/* dram cfg1 and cfg2 */
-	move.l	#0xFC0B8008, %a1
-	move.l	#(CONFIG_SYS_SDRAM_CFG1), (%a1)
-	nop
-	move.l	#0xFC0B800C, %a2
-	move.l	#(CONFIG_SYS_SDRAM_CFG2), (%a2)
-	nop
-
-	move.l	#0xFC0B8000, %a1	/* Mode */
-	move.l	#0xFC0B8004, %a2	/* Ctrl */
-
-	/* Issue PALL */
-	move.l	#(CONFIG_SYS_SDRAM_CTRL + 2), (%a2)
-	nop
-
-	/* Issue LEMR */
-	move.l	#(CONFIG_SYS_SDRAM_MODE), (%a1)
-	nop
-	move.l	#(CONFIG_SYS_SDRAM_EMOD), (%a1)
-	nop
-
-	move.l	#1000, %d0
-wait1000:
-	nop
-	subq.l	#1, %d0
-	bne	wait1000
-
-	/* Issue PALL */
-	move.l	#(CONFIG_SYS_SDRAM_CTRL + 2), (%a2)
-	nop
-
-	/* Perform two refresh cycles */
-	move.l	#(CONFIG_SYS_SDRAM_CTRL + 4), %d0
-	nop
-	move.l	%d0, (%a2)
-	move.l	%d0, (%a2)
-	nop
-
-	move.l	#(CONFIG_SYS_SDRAM_CTRL), %d0
-	and.l	#0x7FFFFFFF, %d0
-	or.l	#0x10000c00, %d0
-	move.l	%d0, (%a2)
-	nop
-
-	/*
-	 * DSPI Initialization
-	 * a0 - general, sram - 0x80008000 - 32, see M52277EVB.h
-	 * a1 - dspi status
-	 * a2 - dtfr
-	 * a3 - drfr
-	 * a4 - Dst addr
-	 */
-
-	/* Enable pins for DSPI mode - chip-selects are enabled later */
-	move.l	#0xFC0A4036, %a0
-	move.b	#0x3F, %d0
-	move.b	%d0, (%a0)
-
-	/* DSPI CS */
-#ifdef CONFIG_SYS_DSPI_CS0
-	move.b	(%a0), %d0
-	or.l	#0xC0, %d0
-	move.b	%d0, (%a0)
-#endif
-#ifdef CONFIG_SYS_DSPI_CS2
-	move.l	#0xFC0A4037, %a0
-	move.b	(%a0), %d0
-	or.l	#0x10, %d0
-	move.b	%d0, (%a0)
-#endif
-	nop
-
-	/* Configure DSPI module */
-	move.l	#0xFC05C000, %a0
-	move.l	#0x80FF0C00, (%a0)	/* Master, clear TX/RX FIFO */
-
-	move.l	#0xFC05C00C, %a0
-	move.l	#0x3E000011, (%a0)
-
-	move.l	#0xFC05C034, %a2	/* dtfr */
-	move.l	#0xFC05C03B, %a3	/* drfr */
-
-	move.l	#(ASM_SBF_IMG_HDR + 4), %a1
-	move.l	(%a1)+, %d5
-	move.l	(%a1), %a4
-
-	move.l	#(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_SBFHDR_DATA_OFFSET), %a0
-	move.l	#(CONFIG_SYS_SBFHDR_SIZE), %d4
-
-	move.l	#0xFC05C02C, %a1	/* dspi status */
-
-	/* Issue commands and address */
-	move.l	#0x8004000B, %d2	/* Fast Read Cmd */
-	jsr	asm_dspi_wr_status
-	jsr	asm_dspi_rd_status
-
-	move.l	#0x80040000, %d2	/* Address byte 2 */
-	jsr	asm_dspi_wr_status
-	jsr	asm_dspi_rd_status
-
-	move.l	#0x80040000, %d2	/* Address byte 1 */
-	jsr	asm_dspi_wr_status
-	jsr	asm_dspi_rd_status
-
-	move.l	#0x80040000, %d2	/* Address byte 0 */
-	jsr	asm_dspi_wr_status
-	jsr	asm_dspi_rd_status
-
-	move.l	#0x80040000, %d2	/* Dummy Wr and Rd */
-	jsr	asm_dspi_wr_status
-	jsr	asm_dspi_rd_status
-
-	/* Transfer serial boot header to sram */
-asm_dspi_rd_loop1:
-	move.l	#0x80040000, %d2
-	jsr	asm_dspi_wr_status
-	jsr	asm_dspi_rd_status
-
-	move.b	%d1, (%a0)		/* read, copy to dst */
-
-	add.l	#1, %a0			/* inc dst by 1 */
-	sub.l	#1, %d4			/* dec cnt by 1 */
-	bne	asm_dspi_rd_loop1
-
-	/* Transfer u-boot from serial flash to memory */
-asm_dspi_rd_loop2:
-	move.l	#0x80040000, %d2
-	jsr	asm_dspi_wr_status
-	jsr	asm_dspi_rd_status
-
-	move.b	%d1, (%a4)		/* read, copy to dst */
-
-	add.l	#1, %a4			/* inc dst by 1 */
-	sub.l	#1, %d5			/* dec cnt by 1 */
-	bne	asm_dspi_rd_loop2
-
-	move.l	#0x00040000, %d2	/* Terminate */
-	jsr	asm_dspi_wr_status
-	jsr	asm_dspi_rd_status
-
-	/* jump to memory and execute */
-	move.l	#(CONFIG_SYS_TEXT_BASE + 0x400), %a0
-	move.l	%a0, (%a1)
-	jmp	(%a0)
-
-asm_dspi_wr_status:
-	move.l	(%a1), %d0		/* status */
-	and.l	#0x0000F000, %d0
-	cmp.l	#0x00003000, %d0
-	bgt	asm_dspi_wr_status
-
-	move.l	%d2, (%a2)
-	rts
-
-asm_dspi_rd_status:
-	move.l	(%a1), %d0		/* status */
-	and.l	#0x000000F0, %d0
-	lsr.l	#4, %d0
-	cmp.l	#0, %d0
-	beq	asm_dspi_rd_status
-
-	move.b	(%a3), %d1
-	rts
-#endif /* CONFIG_CF_SBF */
-
-.text
-	. = 0x400
-.globl _start
-_start:
-	nop
-	nop
-	move.w	#0x2700,%sr		/* Mask off Interrupt */
-
-	/* Set vector base register at the beginning of the Flash */
-#if defined(CONFIG_CF_SBF)
-	move.l	#CONFIG_SYS_TEXT_BASE, %d0
-	movec	%d0, %VBR
-#else
-	move.l	#CONFIG_SYS_FLASH_BASE, %d0
-	movec	%d0, %VBR
-
-	move.l	#(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
-	movec	%d0, %RAMBAR1
-#endif
-
-	/* invalidate and disable cache */
-	move.l	#CF_CACR_CINV, %d0	/* Invalidate cache cmd */
-	movec	%d0, %CACR		/* Invalidate cache */
-	move.l	#0, %d0
-	movec	%d0, %ACR0
-	movec	%d0, %ACR1
-
-	/* initialize general use internal ram */
-	move.l	#0, %d0
-	move.l	#(ICACHE_STATUS), %a1	/* icache */
-	move.l	#(DCACHE_STATUS), %a2	/* icache */
-	move.l	%d0, (%a1)
-	move.l	%d0, (%a2)
-
-	/* put relocation table address to a5 */
-	move.l	#__got_start, %a5
-
-	/* setup stack initially on top of internal static ram  */
-	move.l	#(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE), %sp
-
-	/*
-	 * if configured, malloc_f arena will be reserved first,
-	 * then (and always) gd struct space will be reserved
-	 */
-	move.l	%sp, -(%sp)
-	bsr	board_init_f_alloc_reserve
-
-	/* update stack and frame-pointers */
-	move.l	%d0, %sp
-	move.l	%sp, %fp
-
-	/* initialize reserved area */
-	move.l	%d0, -(%sp)
-	bsr	board_init_f_init_reserve
-
-	/* run low-level CPU init code (from flash) */
-	bsr	cpu_init_f
-	clr.l	%sp@-
-
-	/* run low-level board init code (from flash) */
-	move.l	#board_init_f, %a1
-	jsr	(%a1)
-
-	/* board_init_f() does not return */
-
-/******************************************************************************/
-
-/*
- * void relocate_code(addr_sp, gd, addr_moni)
- *
- * This "function" does not return, instead it continues in RAM
- * after relocating the monitor code.
- *
- * r3 = dest
- * r4 = src
- * r5 = length in bytes
- * r6 = cachelinesize
- */
-.globl relocate_code
-relocate_code:
-	link.w	%a6,#0
-	move.l	8(%a6), %sp		/* set new stack pointer */
-
-	move.l	12(%a6), %d0		/* Save copy of Global Data pointer */
-	move.l	16(%a6), %a0		/* Save copy of Destination Address */
-
-	move.l	#CONFIG_SYS_MONITOR_BASE, %a1
-	move.l	#__init_end, %a2
-	move.l	%a0, %a3
-
-	/* copy the code to RAM */
-1:
-	move.l	(%a1)+, (%a3)+
-	cmp.l	%a1,%a2
-	bgt.s	1b
-
-/*
- * We are done. Do not return, instead branch to second part of board
- * initialization, now running from RAM.
- */
-	move.l	%a0, %a1
-	add.l	#(in_ram - CONFIG_SYS_MONITOR_BASE), %a1
-	jmp	(%a1)
-
-in_ram:
-
-clear_bss:
-	/*
-	 * Now clear BSS segment
-	 */
-	move.l	%a0, %a1
-	add.l	#(_sbss - CONFIG_SYS_MONITOR_BASE),%a1
-	move.l	%a0, %d1
-	add.l	#(_ebss - CONFIG_SYS_MONITOR_BASE),%d1
-6:
-	clr.l	(%a1)+
-	cmp.l	%a1,%d1
-	bgt.s	6b
-
-	/*
-	 * fix got table in RAM
-	 */
-	move.l	%a0, %a1
-	add.l	#(__got_start - CONFIG_SYS_MONITOR_BASE),%a1
-	move.l	%a1,%a5			/* fix got pointer register a5 */
-
-	move.l	%a0, %a2
-	add.l	#(__got_end - CONFIG_SYS_MONITOR_BASE),%a2
-
-7:
-	move.l	(%a1),%d1
-	sub.l	#_start,%d1
-	add.l	%a0,%d1
-	move.l	%d1,(%a1)+
-	cmp.l	%a2, %a1
-	bne	7b
-
-	/* calculate relative jump to board_init_r in ram */
-	move.l	%a0, %a1
-	add.l	#(board_init_r - CONFIG_SYS_MONITOR_BASE), %a1
-
-	/* set parameters for board_init_r */
-	move.l	%a0,-(%sp)		/* dest_addr */
-	move.l	%d0,-(%sp)		/* gd */
-	jsr	(%a1)
-
-/******************************************************************************/
-
-/* exception code */
-.globl _fault
-_fault:
-	bra	_fault
-
-.globl _exc_handler
-_exc_handler:
-	SAVE_ALL
-	movel	%sp,%sp@-
-	bsr	exc_handler
-	addql	#4,%sp
-	RESTORE_ALL
-
-.globl _int_handler
-_int_handler:
-	SAVE_ALL
-	movel	%sp,%sp@-
-	bsr	int_handler
-	addql	#4,%sp
-	RESTORE_ALL
-
-/******************************************************************************/
-
-.align 4