phy: zynqmp: Add serdes/psgtr driver
Add PSGTR driver for Xilinx ZynqMP.
The most of configurations are taken from Linux kernel psgtr driver.
USB3.0 and SGMII configurations are tested on SOM. In SGMII case also
IOU_SLCR reg is updated to get proper clock setup and signal detection
configuration.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Link: https://lore.kernel.org/r/36e6e9d3baf8511af1916e91e4887032ca2b6c20.1641458978.git.michal.simek@xilinx.com
diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index 4767d21..d797984 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -281,6 +281,13 @@
help
Support the USB3.0 PHY in NXP i.MX8MQ SoC
+config PHY_XILINX_ZYNQMP
+ tristate "Xilinx ZynqMP PHY driver"
+ depends on PHY && ARCH_ZYNQMP
+ help
+ Enable this to support ZynqMP High Speed Gigabit Transceiver
+ that is part of ZynqMP SoC.
+
source "drivers/phy/rockchip/Kconfig"
source "drivers/phy/cadence/Kconfig"
source "drivers/phy/ti/Kconfig"