treewide: Enable SPL_SEPARATE_BSS if SPL_BSS_START_ADDR is used
If .bss does not immediately follow the end of the image, then
CONFIG_SPL_SEPARATE_BSS must be selected. Typically, the location of bss
is specified by using CONFIG_SPL_BSS_START_ADDR in a linker script. On
these arches, CONFIG_SPL_SEPARATE_BSS should be enabled. If there is an
option to use an alternate boot script (e.g. CONFIG_SPL_LDSCRIPT is just
a default), just imply. If there is not, select.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index efe33a5..342652e 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -8,6 +8,7 @@
bool
select PHYS_64BIT
select SYS_CACHE_SHIFT_6
+ imply SPL_SEPARATE_BSS
config ARM64_CRC32
bool "Enable support for CRC32 instruction"
@@ -267,6 +268,7 @@
bool
select SYS_CACHE_SHIFT_5
imply SYS_ARM_MMU
+ imply SPL_SEPARATE_BSS
config CPU_ARM946ES
bool
@@ -277,6 +279,7 @@
bool
select SYS_CACHE_SHIFT_5
imply SYS_ARM_MMU
+ imply SPL_SEPARATE_BSS
config CPU_ARM1176
bool
@@ -624,6 +627,7 @@
bool "Marvell Orion"
select CPU_ARM926EJS
select GPIO_EXTRA_HEADER
+ select SPL_SEPARATE_BSS if SPL
config TARGET_STV0991
bool "Support stv0991"
@@ -814,6 +818,7 @@
imply TI_SYSC if DM && OF_CONTROL
imply FIT
imply DM_EVENT
+ imply SPL_SEPARATE_BSS
config ARCH_MESON
bool "Amlogic Meson"
@@ -957,6 +962,7 @@
select SYS_FSL_SEC_LE
imply MXC_GPIO
imply SYS_THUMB_BUILD
+ imply SPL_SEPARATE_BSS
if ARCH_MX6
config SPL_LDSCRIPT