ARM: tegra: Rename pcie-controller to pcie
Recent versions of DTC have checks for PCI host bridge device tree nodes
that are named something other than "pci" or "pcie". Fix all occurrences
of such nodes for Tegra boards to avoid potential warnings from DTC.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
diff --git a/arch/arm/dts/tegra124-apalis.dts b/arch/arm/dts/tegra124-apalis.dts
index fe08d3e..a962c0a 100644
--- a/arch/arm/dts/tegra124-apalis.dts
+++ b/arch/arm/dts/tegra124-apalis.dts
@@ -77,7 +77,7 @@
reg = <0x0 0x80000000 0x0 0x80000000>;
};
- pcie-controller@01003000 {
+ pcie@1003000 {
status = "okay";
avddio-pex-supply = <&vdd_1v05>;
avdd-pex-pll-supply = <&vdd_1v05>;
diff --git a/arch/arm/dts/tegra124-cei-tk1-som.dts b/arch/arm/dts/tegra124-cei-tk1-som.dts
index b1dd418..e5b41f3 100644
--- a/arch/arm/dts/tegra124-cei-tk1-som.dts
+++ b/arch/arm/dts/tegra124-cei-tk1-som.dts
@@ -29,7 +29,7 @@
reg = <0x80000000 0x80000000>;
};
- pcie-controller@01003000 {
+ pcie@1003000 {
status = "okay";
avddio-pex-supply = <&vdd_1v05_run>;
diff --git a/arch/arm/dts/tegra124-jetson-tk1.dts b/arch/arm/dts/tegra124-jetson-tk1.dts
index d642043..59e080a 100644
--- a/arch/arm/dts/tegra124-jetson-tk1.dts
+++ b/arch/arm/dts/tegra124-jetson-tk1.dts
@@ -29,7 +29,7 @@
reg = <0x80000000 0x80000000>;
};
- pcie-controller@01003000 {
+ pcie@1003000 {
status = "okay";
avddio-pex-supply = <&vdd_1v05_run>;
diff --git a/arch/arm/dts/tegra124.dtsi b/arch/arm/dts/tegra124.dtsi
index 83d6348..f473ba2 100644
--- a/arch/arm/dts/tegra124.dtsi
+++ b/arch/arm/dts/tegra124.dtsi
@@ -14,7 +14,7 @@
interrupt-parent = <&lic>;
- pcie-controller@01003000 {
+ pcie@1003000 {
compatible = "nvidia,tegra124-pcie";
device_type = "pci";
reg = <0x01003000 0x00000800 /* PADS registers */
diff --git a/arch/arm/dts/tegra186-p2771-0000-000.dts b/arch/arm/dts/tegra186-p2771-0000-000.dts
index d97c6fd..84e850d 100644
--- a/arch/arm/dts/tegra186-p2771-0000-000.dts
+++ b/arch/arm/dts/tegra186-p2771-0000-000.dts
@@ -11,7 +11,7 @@
power-gpios = <&gpio_main TEGRA_MAIN_GPIO(P, 5) GPIO_ACTIVE_HIGH>;
};
- pcie-controller@10003000 {
+ pcie@10003000 {
status = "okay";
pci@1,0 {
diff --git a/arch/arm/dts/tegra186-p2771-0000-500.dts b/arch/arm/dts/tegra186-p2771-0000-500.dts
index 393a8b2..1ac8ab4 100644
--- a/arch/arm/dts/tegra186-p2771-0000-500.dts
+++ b/arch/arm/dts/tegra186-p2771-0000-500.dts
@@ -11,7 +11,7 @@
power-gpios = <&gpio_main TEGRA_MAIN_GPIO(P, 6) GPIO_ACTIVE_HIGH>;
};
- pcie-controller@10003000 {
+ pcie@10003000 {
status = "okay";
pci@1,0 {
diff --git a/arch/arm/dts/tegra186.dtsi b/arch/arm/dts/tegra186.dtsi
index dd9e3b8..0a9db98 100644
--- a/arch/arm/dts/tegra186.dtsi
+++ b/arch/arm/dts/tegra186.dtsi
@@ -217,7 +217,7 @@
#interrupt-cells = <2>;
};
- pcie-controller@10003000 {
+ pcie@10003000 {
compatible = "nvidia,tegra186-pcie";
device_type = "pci";
reg = <0x0 0x10003000 0x0 0x00000800 /* PADS registers */
diff --git a/arch/arm/dts/tegra20-harmony.dts b/arch/arm/dts/tegra20-harmony.dts
index 0c90705..7fe7d52 100644
--- a/arch/arm/dts/tegra20-harmony.dts
+++ b/arch/arm/dts/tegra20-harmony.dts
@@ -599,7 +599,7 @@
nvidia,sys-clock-req-active-high;
};
- pcie-controller@80003000 {
+ pcie@80003000 {
status = "okay";
avdd-pex-supply = <&pci_vdd_reg>;
diff --git a/arch/arm/dts/tegra20-trimslice.dts b/arch/arm/dts/tegra20-trimslice.dts
index 31f509a..e19001e 100644
--- a/arch/arm/dts/tegra20-trimslice.dts
+++ b/arch/arm/dts/tegra20-trimslice.dts
@@ -30,7 +30,7 @@
spi-max-frequency = <25000000>;
};
- pcie-controller@80003000 {
+ pcie@80003000 {
status = "okay";
avdd-pex-supply = <&pci_vdd_reg>;
diff --git a/arch/arm/dts/tegra20.dtsi b/arch/arm/dts/tegra20.dtsi
index e21ee25..275b343 100644
--- a/arch/arm/dts/tegra20.dtsi
+++ b/arch/arm/dts/tegra20.dtsi
@@ -580,7 +580,7 @@
reset-names = "fuse";
};
- pcie-controller@80003000 {
+ pcie@80003000 {
compatible = "nvidia,tegra20-pcie";
device_type = "pci";
reg = <0x80003000 0x00000800 /* PADS registers */
diff --git a/arch/arm/dts/tegra210-p2371-2180.dts b/arch/arm/dts/tegra210-p2371-2180.dts
index da4349b..c2f497c 100644
--- a/arch/arm/dts/tegra210-p2371-2180.dts
+++ b/arch/arm/dts/tegra210-p2371-2180.dts
@@ -21,7 +21,7 @@
reg = <0x0 0x80000000 0x0 0xc0000000>;
};
- pcie-controller@01003000 {
+ pcie@1003000 {
status = "okay";
pci@1,0 {
diff --git a/arch/arm/dts/tegra210.dtsi b/arch/arm/dts/tegra210.dtsi
index 229fed0..3ec54b1 100644
--- a/arch/arm/dts/tegra210.dtsi
+++ b/arch/arm/dts/tegra210.dtsi
@@ -11,7 +11,7 @@
#address-cells = <2>;
#size-cells = <2>;
- pcie-controller@01003000 {
+ pcie@1003000 {
compatible = "nvidia,tegra210-pcie";
device_type = "pci";
reg = <0x0 0x01003000 0x0 0x00000800 /* PADS registers */
diff --git a/arch/arm/dts/tegra30-apalis.dts b/arch/arm/dts/tegra30-apalis.dts
index 1a9ce27..77502df 100644
--- a/arch/arm/dts/tegra30-apalis.dts
+++ b/arch/arm/dts/tegra30-apalis.dts
@@ -32,7 +32,7 @@
reg = <0x80000000 0x40000000>;
};
- pcie-controller@00003000 {
+ pcie@3000 {
status = "okay";
avdd-pexa-supply = <&vdd2_reg>;
vdd-pexa-supply = <&vdd2_reg>;
diff --git a/arch/arm/dts/tegra30-beaver.dts b/arch/arm/dts/tegra30-beaver.dts
index f5fbbe8..9bb097b 100644
--- a/arch/arm/dts/tegra30-beaver.dts
+++ b/arch/arm/dts/tegra30-beaver.dts
@@ -28,7 +28,7 @@
reg = <0x80000000 0x7ff00000>;
};
- pcie-controller@00003000 {
+ pcie@3000 {
status = "okay";
avdd-pexa-supply = <&ldo1_reg>;
diff --git a/arch/arm/dts/tegra30-cardhu.dts b/arch/arm/dts/tegra30-cardhu.dts
index 5b9798c..7534861 100644
--- a/arch/arm/dts/tegra30-cardhu.dts
+++ b/arch/arm/dts/tegra30-cardhu.dts
@@ -27,7 +27,7 @@
reg = <0x80000000 0x40000000>;
};
- pcie-controller@00003000 {
+ pcie@3000 {
status = "okay";
/* AVDD_PEXA and VDD_PEXA inputs are grounded on Cardhu. */
diff --git a/arch/arm/dts/tegra30.dtsi b/arch/arm/dts/tegra30.dtsi
index 5030065..f198bc0 100644
--- a/arch/arm/dts/tegra30.dtsi
+++ b/arch/arm/dts/tegra30.dtsi
@@ -10,7 +10,7 @@
compatible = "nvidia,tegra30";
interrupt-parent = <&lic>;
- pcie-controller@00003000 {
+ pcie@3000 {
compatible = "nvidia,tegra30-pcie";
device_type = "pci";
reg = <0x00003000 0x00000800 /* PADS registers */