Blackfin: bfin_sdh: set all timer bits before transfer
The timer register is 32bits, not 16bit, so 0xFFFF won't fill it.
Write out -1 to make sure to fill the whole thing.
Signed-off-by: Cliff Cai <cliff.cai@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
diff --git a/drivers/mmc/bfin_sdh.c b/drivers/mmc/bfin_sdh.c
index 5670939..f9da6a3 100644
--- a/drivers/mmc/bfin_sdh.c
+++ b/drivers/mmc/bfin_sdh.c
@@ -123,7 +123,7 @@
bfin_write_SDH_DATA_CTL(data_ctl);
dma_cfg = WDSIZE_32 | RESTART | WNR | DMAEN;
- bfin_write_SDH_DATA_TIMER(0xFFFF);
+ bfin_write_SDH_DATA_TIMER(-1);
blackfin_dcache_flush_invalidate_range(data->dest,
data->dest + data->blocksize);