arc: introduce separate section for interrupt vector table
Even though existing implementation works fine in preparation to
submission of ARCv2 architecture we need this change.
In case of ARCv2 interrupt vector table consists of just addresses
of corresponding handlers. And if those addresses will be in .text
section then assembler will encode them as everything in .text section
as middle-endian and then on real execution CPU will read swapped
addresses and will jump into the wild.
Once introduced new section is situated so .text section remains the
first which allows us to use common linker option for linking everything
to a specified CONFIG_SYS_TEXT_BASE.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Signed-off-by: Igor Guryanov <guryanov@synopsys.com>
diff --git a/arch/arc/cpu/arc700/Makefile b/arch/arc/cpu/arc700/Makefile
index cdc5002..021e3a2 100644
--- a/arch/arc/cpu/arc700/Makefile
+++ b/arch/arc/cpu/arc700/Makefile
@@ -4,10 +4,9 @@
# SPDX-License-Identifier: GPL-2.0+
#
-extra-y += start.o
-
obj-y += cache.o
obj-y += cpu.o
obj-y += interrupts.o
obj-y += reset.o
+obj-y += start.o
obj-y += timer.o
diff --git a/arch/arc/cpu/arc700/start.S b/arch/arc/cpu/arc700/start.S
index 2318282..01cfba4 100644
--- a/arch/arc/cpu/arc700/start.S
+++ b/arch/arc/cpu/arc700/start.S
@@ -88,11 +88,11 @@
#endif
.endm
+.section .ivt, "ax",@progbits
.align 4
-.globl _start
-_start:
+_ivt:
/* Critical system events */
- j reset /* 0 - 0x000 */
+ j _start /* 0 - 0x000 */
j memory_error /* 1 - 0x008 */
j instruction_error /* 2 - 0x010 */
@@ -110,6 +110,28 @@
j EV_Trap /* 0x128, Trap exception (0x25) */
j EV_Extension /* 0x130, Extn Intruction Excp (0x26) */
+.text
+.globl _start
+_start:
+ /* Setup interrupt vector base that matches "__text_start" */
+ sr __ivt_start, [ARC_AUX_INTR_VEC_BASE]
+
+ /* Setup stack pointer */
+ mov %sp, CONFIG_SYS_INIT_SP_ADDR
+ mov %fp, %sp
+
+ /* Clear bss */
+ mov %r0, __bss_start
+ mov %r1, __bss_end
+
+clear_bss:
+ st.ab 0, [%r0, 4]
+ brlt %r0, %r1, clear_bss
+
+ /* Zero the one and only argument of "board_init_f" */
+ mov_s %r0, 0
+ j board_init_f
+
memory_error:
SAVE_ALL_SYS
SAVE_EXCEPTION_SOURCE
@@ -164,27 +186,6 @@
mov %r0, %sp
j do_extension
-
-reset:
- /* Setup interrupt vector base that matches "__text_start" */
- sr __text_start, [ARC_AUX_INTR_VEC_BASE]
-
- /* Setup stack pointer */
- mov %sp, CONFIG_SYS_INIT_SP_ADDR
- mov %fp, %sp
-
- /* Clear bss */
- mov %r0, __bss_start
- mov %r1, __bss_end
-
-clear_bss:
- st.ab 0, [%r0, 4]
- brlt %r0, %r1, clear_bss
-
- /* Zero the one and only argument of "board_init_f" */
- mov_s %r0, 0
- j board_init_f
-
/*
* void relocate_code (addr_sp, gd, addr_moni)
*
diff --git a/arch/arc/cpu/arc700/u-boot.lds b/arch/arc/cpu/arc700/u-boot.lds
index 2d01b21..ccddbf7 100644
--- a/arch/arc/cpu/arc700/u-boot.lds
+++ b/arch/arc/cpu/arc700/u-boot.lds
@@ -13,7 +13,6 @@
.text : {
*(.__text_start)
*(.__image_copy_start)
- CPUDIR/start.o (.text*)
*(.text*)
}
@@ -23,6 +22,20 @@
*(.__text_end)
}
+ . = ALIGN(1024);
+ .ivt_start : {
+ *(.__ivt_start)
+ }
+
+ .ivt :
+ {
+ *(.ivt)
+ }
+
+ .ivt_end : {
+ *(.__ivt_end)
+ }
+
. = ALIGN(4);
.rodata : {
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))