dm: i2c: use CONFIG_IS_ENABLED macro for DM_I2C/DM_I2C_GPIO
Use CONFIG_IS_ENABLED() macro, which provides more convenient
way to check $(SPL)DM_I2C/$(SPL)DM_I2C_GPIO configs
for both SPL and U-Boot proper.
CONFIG_IS_ENABLED(DM_I2C) expands to:
- 1 if CONFIG_SPL_BUILD is undefined and CONFIG_DM_I2C is set to 'y',
- 1 if CONFIG_SPL_BUILD is defined and CONFIG_SPL_DM_I2C is set to 'y',
- 0 otherwise.
All occurences were replaced automatically using these bash cmds:
$ find . -type f -exec sed -i
's/ifndef CONFIG_DM_I2C/if !CONFIG_IS_ENABLED(DM_I2C)/g' {} +
$ find . -type f -exec sed -i
's/ifdef CONFIG_DM_I2C/if CONFIG_IS_ENABLED(DM_I2C)/g' {} +
$ find . -type f -exec sed -i
's/defined(CONFIG_DM_I2C)/CONFIG_IS_ENABLED(DM_I2C)/g' {} +
$ find . -type f -exec sed -i
's/ifndef CONFIG_DM_I2C_GPIO/if !CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} +
$ find . -type f -exec sed -i
's/ifdef CONFIG_DM_I2C_GPIO/if CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} +
$ find . -type f -exec sed -i
's/defined(CONFIG_DM_I2C_GPIO)/CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} +
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
diff --git a/board/freescale/common/dcu_sii9022a.c b/board/freescale/common/dcu_sii9022a.c
index 832ae25..9137d24 100644
--- a/board/freescale/common/dcu_sii9022a.c
+++ b/board/freescale/common/dcu_sii9022a.c
@@ -64,7 +64,7 @@
u8 temp;
u16 temp1, temp2;
u32 temp3;
-#ifdef CONFIG_DM_I2C
+#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *dev;
int ret;
diff --git a/board/freescale/common/diu_ch7301.c b/board/freescale/common/diu_ch7301.c
index 02a2718..05e6a3a 100644
--- a/board/freescale/common/diu_ch7301.c
+++ b/board/freescale/common/diu_ch7301.c
@@ -53,7 +53,7 @@
u8 temp;
temp = I2C_DVI_TEST_PATTERN_VAL;
-#ifdef CONFIG_DM_I2C
+#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *dev;
ret = i2c_get_chip_for_busnum(CONFIG_SYS_I2C_DVI_BUS_NUM,
diff --git a/board/freescale/common/emc2305.c b/board/freescale/common/emc2305.c
index 12ad4b3..9a75c5a 100644
--- a/board/freescale/common/emc2305.c
+++ b/board/freescale/common/emc2305.c
@@ -24,7 +24,7 @@
I2C_EMC2305_FAN5};
for (index = 0; index < NUM_OF_FANS; index++) {
-#ifndef CONFIG_DM_I2C
+#if !CONFIG_IS_ENABLED(DM_I2C)
if (i2c_write(chip_addr, Fan[index], 1, &data, 1) != 0) {
printf("Error: failed to change fan speed @%x\n",
Fan[index]);
@@ -48,7 +48,7 @@
u8 data;
data = I2C_EMC2305_CMD;
-#ifndef CONFIG_DM_I2C
+#if !CONFIG_IS_ENABLED(DM_I2C)
if (i2c_write(chip_addr, I2C_EMC2305_CONF, 1, &data, 1) != 0)
printf("Error: failed to configure EMC2305\n");
#else
diff --git a/board/freescale/common/qixis.c b/board/freescale/common/qixis.c
index 1696c24..2bb838c 100644
--- a/board/freescale/common/qixis.c
+++ b/board/freescale/common/qixis.c
@@ -32,7 +32,7 @@
#ifdef CONFIG_SYS_I2C_FPGA_ADDR
u8 qixis_read_i2c(unsigned int reg)
{
-#ifndef CONFIG_DM_I2C
+#if !CONFIG_IS_ENABLED(DM_I2C)
return i2c_reg_read(CONFIG_SYS_I2C_FPGA_ADDR, reg);
#else
struct udevice *dev;
@@ -47,7 +47,7 @@
void qixis_write_i2c(unsigned int reg, u8 value)
{
u8 val = value;
-#ifndef CONFIG_DM_I2C
+#if !CONFIG_IS_ENABLED(DM_I2C)
i2c_reg_write(CONFIG_SYS_I2C_FPGA_ADDR, reg, val);
#else
struct udevice *dev;
diff --git a/board/freescale/common/sys_eeprom.c b/board/freescale/common/sys_eeprom.c
index 33ae4c1..be0fda0 100644
--- a/board/freescale/common/sys_eeprom.c
+++ b/board/freescale/common/sys_eeprom.c
@@ -152,7 +152,7 @@
{
int ret;
#ifdef CONFIG_SYS_EEPROM_BUS_NUM
-#ifndef CONFIG_DM_I2C
+#if !CONFIG_IS_ENABLED(DM_I2C)
unsigned int bus;
#endif
#endif
@@ -161,13 +161,13 @@
return 0;
#ifdef CONFIG_SYS_EEPROM_BUS_NUM
-#ifndef CONFIG_DM_I2C
+#if !CONFIG_IS_ENABLED(DM_I2C)
bus = i2c_get_bus_num();
i2c_set_bus_num(CONFIG_SYS_EEPROM_BUS_NUM);
#endif
#endif
-#ifndef CONFIG_DM_I2C
+#if !CONFIG_IS_ENABLED(DM_I2C)
ret = i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0,
CONFIG_SYS_I2C_EEPROM_ADDR_LEN,
(void *)&e, sizeof(e));
@@ -186,7 +186,7 @@
#endif
#ifdef CONFIG_SYS_EEPROM_BUS_NUM
-#ifndef CONFIG_DM_I2C
+#if !CONFIG_IS_ENABLED(DM_I2C)
i2c_set_bus_num(bus);
#endif
#endif
@@ -223,7 +223,7 @@
int i;
void *p;
#ifdef CONFIG_SYS_EEPROM_BUS_NUM
-#ifndef CONFIG_DM_I2C
+#if !CONFIG_IS_ENABLED(DM_I2C)
unsigned int bus;
#endif
#endif
@@ -237,7 +237,7 @@
#endif
update_crc();
-#ifndef CONFIG_DM_I2C
+#if !CONFIG_IS_ENABLED(DM_I2C)
#ifdef CONFIG_SYS_EEPROM_BUS_NUM
bus = i2c_get_bus_num();
i2c_set_bus_num(CONFIG_SYS_EEPROM_BUS_NUM);
@@ -250,7 +250,7 @@
* complete a given write.
*/
for (i = 0, p = &e; i < sizeof(e); i += 8, p += 8) {
-#ifndef CONFIG_DM_I2C
+#if !CONFIG_IS_ENABLED(DM_I2C)
ret = i2c_write(CONFIG_SYS_I2C_EEPROM_ADDR, i,
CONFIG_SYS_I2C_EEPROM_ADDR_LEN,
p, min((int)(sizeof(e) - i), 8));
@@ -279,7 +279,7 @@
/* Verify the write by reading back the EEPROM and comparing */
struct eeprom e2;
-#ifndef CONFIG_DM_I2C
+#if !CONFIG_IS_ENABLED(DM_I2C)
ret = i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0,
CONFIG_SYS_I2C_EEPROM_ADDR_LEN,
(void *)&e2, sizeof(e2));
@@ -302,7 +302,7 @@
ret = -1;
}
-#ifndef CONFIG_DM_I2C
+#if !CONFIG_IS_ENABLED(DM_I2C)
#ifdef CONFIG_SYS_EEPROM_BUS_NUM
i2c_set_bus_num(bus);
#endif
@@ -594,7 +594,7 @@
u8 minor; /* 0x05 Board revision, minor */
} be;
-#ifndef CONFIG_DM_I2C
+#if !CONFIG_IS_ENABLED(DM_I2C)
i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0, CONFIG_SYS_I2C_EEPROM_ADDR_LEN,
(void *)&be, sizeof(be));
#else
diff --git a/board/freescale/common/vid.c b/board/freescale/common/vid.c
index 2617f61..20f5421 100644
--- a/board/freescale/common/vid.c
+++ b/board/freescale/common/vid.c
@@ -65,14 +65,14 @@
u8 byte;
int i;
const int ir_i2c_addr[] = {0x38, 0x08, 0x09};
-#ifdef CONFIG_DM_I2C
+#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *dev;
#endif
/* Check all the address */
for (i = 0; i < (sizeof(ir_i2c_addr)/sizeof(ir_i2c_addr[0])); i++) {
i2caddress = ir_i2c_addr[i];
-#ifndef CONFIG_DM_I2C
+#if !CONFIG_IS_ENABLED(DM_I2C)
ret = i2c_read(i2caddress,
IR36021_MFR_ID_OFFSET, 1, (void *)&byte,
sizeof(byte));
@@ -117,12 +117,12 @@
int i, ret, voltage_read = 0;
u16 vol_mon;
u8 buf[2];
-#ifdef CONFIG_DM_I2C
+#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *dev;
#endif
for (i = 0; i < NUM_READINGS; i++) {
-#ifndef CONFIG_DM_I2C
+#if !CONFIG_IS_ENABLED(DM_I2C)
ret = i2c_read(I2C_VOL_MONITOR_ADDR,
I2C_VOL_MONITOR_BUS_V_OFFSET, 1,
(void *)&buf, 2);
@@ -160,12 +160,12 @@
int i, ret, voltage_read = 0;
u16 vol_mon;
u8 buf;
-#ifdef CONFIG_DM_I2C
+#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *dev;
#endif
for (i = 0; i < NUM_READINGS; i++) {
-#ifndef CONFIG_DM_I2C
+#if !CONFIG_IS_ENABLED(DM_I2C)
ret = i2c_read(i2caddress,
IR36021_LOOP1_VOUT_OFFSET,
1, (void *)&buf, 1);
@@ -213,7 +213,7 @@
int ret, vcode = 0;
u8 chan = PWM_CHANNEL0;
-#ifndef CONFIG_DM_I2C
+#if !CONFIG_IS_ENABLED(DM_I2C)
/* select the PAGE 0 using PMBus commands PAGE for VDD*/
ret = i2c_write(I2C_VOL_MONITOR_ADDR,
PMBUS_CMD_PAGE, 1, &chan, 1);
@@ -229,7 +229,7 @@
return ret;
}
-#ifndef CONFIG_DM_I2C
+#if !CONFIG_IS_ENABLED(DM_I2C)
/*read the output voltage using PMBus command READ_VOUT*/
ret = i2c_read(I2C_VOL_MONITOR_ADDR,
PMBUS_CMD_READ_VOUT, 1, (void *)&vcode, 2);
@@ -344,7 +344,7 @@
vid = DIV_ROUND_UP(vdd - 245, 5);
#endif
-#ifndef CONFIG_DM_I2C
+#if !CONFIG_IS_ENABLED(DM_I2C)
ret = i2c_write(i2caddress, IR36021_LOOP1_MANUAL_ID_OFFSET,
1, (void *)&vid, sizeof(vid));
#else
@@ -392,7 +392,7 @@
vdd & 0xFF, (vdd & 0xFF00) >> 8};
/* Write the desired voltage code to the regulator */
-#ifndef CONFIG_DM_I2C
+#if !CONFIG_IS_ENABLED(DM_I2C)
/* Check write protect state */
ret = i2c_read(I2C_VOL_MONITOR_ADDR,
PMBUS_CMD_WRITE_PROTECT, 1,
@@ -621,7 +621,7 @@
}
/* check IR chip work on Intel mode*/
-#ifndef CONFIG_DM_I2C
+#if !CONFIG_IS_ENABLED(DM_I2C)
ret = i2c_read(i2caddress,
IR36021_INTEL_MODE_OOFSET,
1, (void *)&buf, 1);
@@ -803,7 +803,7 @@
}
/* check IR chip work on Intel mode*/
-#ifndef CONFIG_DM_I2C
+#if !CONFIG_IS_ENABLED(DM_I2C)
ret = i2c_read(i2caddress,
IR36021_INTEL_MODE_OOFSET,
1, (void *)&buf, 1);
diff --git a/board/freescale/common/vsc3316_3308.c b/board/freescale/common/vsc3316_3308.c
index 8aceb8e..c51f3c5 100644
--- a/board/freescale/common/vsc3316_3308.c
+++ b/board/freescale/common/vsc3316_3308.c
@@ -34,7 +34,7 @@
/* enable 2-wire Serial InterFace (I2C) */
data = 0x02;
-#ifdef CONFIG_DM_I2C
+#if CONFIG_IS_ENABLED(DM_I2C)
int ret, bus_num = 0;
struct udevice *dev;
@@ -62,7 +62,7 @@
debug("VSC:Initializing VSC3316 at I2C address 0x%2x"
" for Tx\n", vsc_addr);
-#ifdef CONFIG_DM_I2C
+#if CONFIG_IS_ENABLED(DM_I2C)
int bus_num = 0;
struct udevice *dev;
@@ -185,7 +185,7 @@
debug("VSC:Initializing VSC3308 at I2C address 0x%x for Tx\n",
vsc_addr);
-#ifdef CONFIG_DM_I2C
+#if CONFIG_IS_ENABLED(DM_I2C)
int bus_num = 0;
struct udevice *dev;
@@ -385,7 +385,7 @@
debug("VSC:Initializing VSC3308 at I2C address 0x%x"
" for Tx\n", vsc_addr);
-#ifdef CONFIG_DM_I2C
+#if CONFIG_IS_ENABLED(DM_I2C)
int bus_num = 0;
struct udevice *dev;
@@ -509,7 +509,7 @@
/* For new crosspoint configuration to occur, WP bit of
* CORE_CONFIG_REG should be set 1 and then reset to 0 */
-#ifdef CONFIG_DM_I2C
+#if CONFIG_IS_ENABLED(DM_I2C)
int ret, bus_num = 0;
struct udevice *dev;
diff --git a/board/freescale/ls1012aqds/ls1012aqds.c b/board/freescale/ls1012aqds/ls1012aqds.c
index b77808e..cfe3f33 100644
--- a/board/freescale/ls1012aqds/ls1012aqds.c
+++ b/board/freescale/ls1012aqds/ls1012aqds.c
@@ -112,7 +112,7 @@
u8 mux_sdhc_cd = 0x80;
int bus_num = 0;
-#ifdef CONFIG_DM_I2C
+#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *dev;
int ret;
diff --git a/board/freescale/ls1012ardb/eth.c b/board/freescale/ls1012ardb/eth.c
index 2241d06..bb3fbc7 100644
--- a/board/freescale/ls1012ardb/eth.c
+++ b/board/freescale/ls1012ardb/eth.c
@@ -29,7 +29,7 @@
{
#ifdef CONFIG_TARGET_LS1012ARDB
/* Through reset IO expander reset both RGMII and SGMII PHYs */
-#ifdef CONFIG_DM_I2C
+#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *dev;
int ret;
diff --git a/board/freescale/ls1012ardb/ls1012ardb.c b/board/freescale/ls1012ardb/ls1012ardb.c
index ed6dc9f..41bcf6f 100644
--- a/board/freescale/ls1012ardb/ls1012ardb.c
+++ b/board/freescale/ls1012ardb/ls1012ardb.c
@@ -43,7 +43,7 @@
puts("Board: LS1012ARDB ");
/* Initialize i2c early for Serial flash bank information */
-#if defined(CONFIG_DM_I2C)
+#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *dev;
ret = i2c_get_chip_for_busnum(bus_num, I2C_MUX_IO_ADDR,
@@ -195,7 +195,7 @@
u8 io = 0;
int ret, bus_num = 0;
-#if defined(CONFIG_DM_I2C)
+#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *dev;
ret = i2c_get_chip_for_busnum(bus_num, I2C_MUX_IO_ADDR,
@@ -234,7 +234,7 @@
* 10 - eMMC Memory
* 11 - SPI
*/
-#if defined(CONFIG_DM_I2C)
+#if CONFIG_IS_ENABLED(DM_I2C)
ret = dm_i2c_read(dev, I2C_MUX_IO_0, &io, 1);
#else
ret = i2c_read(I2C_MUX_IO_ADDR, I2C_MUX_IO_0, 1, &io, 1);
@@ -273,7 +273,7 @@
u8 data = 0xf4, chip_addr = 0x24, offset_addr = 0x03;
int ret, bus_num = 0;
-#if defined(CONFIG_DM_I2C)
+#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *dev;
ret = i2c_get_chip_for_busnum(bus_num, chip_addr,
@@ -338,7 +338,7 @@
u8 chip_addr = 0x24;
int ret, i, bus_num = 0;
-#if defined(CONFIG_DM_I2C)
+#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *dev;
ret = i2c_get_chip_for_busnum(bus_num, chip_addr,
@@ -361,7 +361,7 @@
* CS routed to SPI memory bank2
*/
for (i = 0; i < sizeof(data); i++) {
-#if defined(CONFIG_DM_I2C)
+#if CONFIG_IS_ENABLED(DM_I2C)
ret = dm_i2c_write(dev, offset_addr[i], &data[i], 1);
#else /* Non DM I2C support - will be removed */
ret = i2c_write(chip_addr, offset_addr[i], 1, &data[i], 1);
diff --git a/board/freescale/ls1021aqds/dcu.c b/board/freescale/ls1021aqds/dcu.c
index f66961c..7532f7c 100644
--- a/board/freescale/ls1021aqds/dcu.c
+++ b/board/freescale/ls1021aqds/dcu.c
@@ -20,7 +20,7 @@
static int select_i2c_ch_pca9547(u8 ch, int bus_num)
{
int ret;
-#ifdef CONFIG_DM_I2C
+#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *dev;
ret = i2c_get_chip_for_busnum(bus_num, I2C_MUX_PCA_ADDR_PRI,
@@ -65,7 +65,7 @@
u8 ch;
/* Mux I2C3+I2C4 as HSYNC+VSYNC */
-#ifdef CONFIG_DM_I2C
+#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *dev;
/* QIXIS device mount on I2C1 bus*/
@@ -113,7 +113,7 @@
pixval = 1000000000 / dcu_fb_videomode->pixclock;
pixval *= 1000;
-#ifndef CONFIG_DM_I2C
+#if !CONFIG_IS_ENABLED(DM_I2C)
i2c_set_bus_num(CONFIG_SYS_I2C_DVI_BUS_NUM);
#endif
select_i2c_ch_pca9547(I2C_MUX_CH_CH7301,
diff --git a/board/freescale/ls1021aqds/ls1021aqds.c b/board/freescale/ls1021aqds/ls1021aqds.c
index 4169a0f..aa1f602 100644
--- a/board/freescale/ls1021aqds/ls1021aqds.c
+++ b/board/freescale/ls1021aqds/ls1021aqds.c
@@ -144,7 +144,7 @@
int select_i2c_ch_pca9547(u8 ch, int bus_num)
{
int ret;
-#ifdef CONFIG_DM_I2C
+#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *dev;
ret = i2c_get_chip_for_busnum(bus_num, I2C_MUX_PCA_ADDR_PRI,
diff --git a/board/freescale/ls1021atwr/ls1021atwr.c b/board/freescale/ls1021atwr/ls1021atwr.c
index 0cd38a1..4c3be42 100644
--- a/board/freescale/ls1021atwr/ls1021atwr.c
+++ b/board/freescale/ls1021atwr/ls1021atwr.c
@@ -458,7 +458,7 @@
#define MC34VR500_ADDR 0x8
#define MC34VR500_DEVICEID 0x4
#define MC34VR500_DEVICEID_MASK 0x0f
-#ifdef CONFIG_DM_I2C
+#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *dev;
int ret;
diff --git a/board/freescale/ls1028a/ls1028a.c b/board/freescale/ls1028a/ls1028a.c
index f3c1d95..5269fd3 100644
--- a/board/freescale/ls1028a/ls1028a.c
+++ b/board/freescale/ls1028a/ls1028a.c
@@ -92,7 +92,7 @@
#if defined(CONFIG_TARGET_LS1028ARDB)
u8 val = I2C_MUX_CH_DEFAULT;
-#ifndef CONFIG_DM_I2C
+#if !CONFIG_IS_ENABLED(DM_I2C)
i2c_write(I2C_MUX_PCA_ADDR_PRI, 0x0b, 1, &val, 1);
#else
struct udevice *dev;
diff --git a/board/freescale/ls1043aqds/ls1043aqds.c b/board/freescale/ls1043aqds/ls1043aqds.c
index 44e4c61..5b131d1 100644
--- a/board/freescale/ls1043aqds/ls1043aqds.c
+++ b/board/freescale/ls1043aqds/ls1043aqds.c
@@ -283,7 +283,7 @@
{
int ret;
-#ifdef CONFIG_DM_I2C
+#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *dev;
ret = i2c_get_chip_for_busnum(bus_num, I2C_MUX_PCA_ADDR_PRI,
@@ -338,7 +338,7 @@
/* Retimer is connected to I2C1_CH7_CH5 */
select_i2c_ch_pca9547(I2C_MUX_CH7, bus_num);
reg = I2C_MUX_CH5;
-#ifdef CONFIG_DM_I2C
+#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *dev;
int ret;
diff --git a/board/freescale/ls1046afrwy/ls1046afrwy.c b/board/freescale/ls1046afrwy/ls1046afrwy.c
index 9813a36..f1709dc 100644
--- a/board/freescale/ls1046afrwy/ls1046afrwy.c
+++ b/board/freescale/ls1046afrwy/ls1046afrwy.c
@@ -42,7 +42,7 @@
{
int ret;
-#ifdef CONFIG_DM_I2C
+#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *dev;
ret = i2c_get_chip_for_busnum(bus_num, I2C_MUX_PCA_ADDR_PRI,
diff --git a/board/freescale/ls1046aqds/ls1046aqds.c b/board/freescale/ls1046aqds/ls1046aqds.c
index 3c96c90..2069442 100644
--- a/board/freescale/ls1046aqds/ls1046aqds.c
+++ b/board/freescale/ls1046aqds/ls1046aqds.c
@@ -279,7 +279,7 @@
int select_i2c_ch_pca9547(u8 ch, int bus_num)
{
int ret;
-#ifdef CONFIG_DM_I2C
+#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *dev;
ret = i2c_get_chip_for_busnum(bus_num, I2C_MUX_PCA_ADDR_PRI,
diff --git a/board/freescale/ls1088a/eth_ls1088aqds.c b/board/freescale/ls1088a/eth_ls1088aqds.c
index bf4f57e..140733d 100644
--- a/board/freescale/ls1088a/eth_ls1088aqds.c
+++ b/board/freescale/ls1088a/eth_ls1088aqds.c
@@ -114,12 +114,12 @@
{0x18, NULL}, {0x23, ®_val[3]},
{0x2d, ®_val[4]}, {4, ®_val[5]},
};
-#ifdef CONFIG_DM_I2C
+#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *udev;
#endif
/* Set I2c to Slot 1 */
-#ifndef CONFIG_DM_I2C
+#if !CONFIG_IS_ENABLED(DM_I2C)
ret = i2c_write(0x77, 0, 0, &a, 1);
#else
ret = i2c_get_chip_for_busnum(0, 0x77, 1, &udev);
@@ -173,7 +173,7 @@
return;
}
-#ifdef CONFIG_DM_I2C
+#if CONFIG_IS_ENABLED(DM_I2C)
i2c_get_chip_for_busnum(0, i2c_phy_addr, 1, &udev);
#endif
@@ -184,7 +184,7 @@
reg_pair[5].val = &ch_b_eq[i];
reg_pair[6].val = &ch_b_ctl2[j];
for (k = 0; k < 10; k++) {
-#ifndef CONFIG_DM_I2C
+#if !CONFIG_IS_ENABLED(DM_I2C)
ret = i2c_write(i2c_phy_addr,
reg_pair[k].addr,
1, reg_pair[k].val, 1);
@@ -257,12 +257,12 @@
const char *dev = mdio_names[EMI1_SLOT1];
int ret = 0;
unsigned short value;
-#ifdef CONFIG_DM_I2C
+#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *udev;
#endif
/* Set I2c to Slot 1 */
-#ifndef CONFIG_DM_I2C
+#if !CONFIG_IS_ENABLED(DM_I2C)
ret = i2c_write(0x77, 0, 0, &a, 1);
#else
ret = i2c_get_chip_for_busnum(0, 0x77, 1, &udev);
@@ -304,7 +304,7 @@
return;
}
-#ifdef CONFIG_DM_I2C
+#if CONFIG_IS_ENABLED(DM_I2C)
i2c_get_chip_for_busnum(0, i2c_phy_addr, 1, &udev);
#endif
@@ -316,7 +316,7 @@
reg_pair[6].val = &ch_b_ctl2[j];
for (k = 0; k < 10; k++) {
-#ifndef CONFIG_DM_I2C
+#if !CONFIG_IS_ENABLED(DM_I2C)
ret = i2c_write(i2c_phy_addr,
reg_pair[k].addr,
1, reg_pair[k].val, 1);
diff --git a/board/freescale/ls1088a/ls1088a.c b/board/freescale/ls1088a/ls1088a.c
index 2ba6a39..e76ea01 100644
--- a/board/freescale/ls1088a/ls1088a.c
+++ b/board/freescale/ls1088a/ls1088a.c
@@ -379,7 +379,7 @@
{
int ret;
-#ifndef CONFIG_DM_I2C
+#if !CONFIG_IS_ENABLED(DM_I2C)
ret = i2c_write(I2C_MUX_PCA_ADDR_PRI, 0, 1, &ch, 1);
#else
struct udevice *dev;
@@ -406,7 +406,7 @@
/* Access to Control/Shared register */
reg = 0x0;
-#ifndef CONFIG_DM_I2C
+#if !CONFIG_IS_ENABLED(DM_I2C)
i2c_write(I2C_RETIMER_ADDR, 0xff, 1, ®, 1);
#else
struct udevice *dev;
@@ -416,7 +416,7 @@
#endif
/* Read device revision and ID */
-#ifndef CONFIG_DM_I2C
+#if !CONFIG_IS_ENABLED(DM_I2C)
i2c_read(I2C_RETIMER_ADDR, 1, 1, ®, 1);
#else
dm_i2c_read(dev, 1, ®, 1);
@@ -425,20 +425,20 @@
/* Enable Broadcast. All writes target all channel register sets */
reg = 0x0c;
-#ifndef CONFIG_DM_I2C
+#if !CONFIG_IS_ENABLED(DM_I2C)
i2c_write(I2C_RETIMER_ADDR, 0xff, 1, ®, 1);
#else
dm_i2c_write(dev, 0xff, ®, 1);
#endif
/* Reset Channel Registers */
-#ifndef CONFIG_DM_I2C
+#if !CONFIG_IS_ENABLED(DM_I2C)
i2c_read(I2C_RETIMER_ADDR, 0, 1, ®, 1);
#else
dm_i2c_read(dev, 0, ®, 1);
#endif
reg |= 0x4;
-#ifndef CONFIG_DM_I2C
+#if !CONFIG_IS_ENABLED(DM_I2C)
i2c_write(I2C_RETIMER_ADDR, 0, 1, ®, 1);
#else
dm_i2c_write(dev, 0, ®, 1);
@@ -446,45 +446,45 @@
/* Set data rate as 10.3125 Gbps */
reg = 0x90;
-#ifndef CONFIG_DM_I2C
+#if !CONFIG_IS_ENABLED(DM_I2C)
i2c_write(I2C_RETIMER_ADDR, 0x60, 1, ®, 1);
#else
dm_i2c_write(dev, 0x60, ®, 1);
#endif
reg = 0xb3;
-#ifndef CONFIG_DM_I2C
+#if !CONFIG_IS_ENABLED(DM_I2C)
i2c_write(I2C_RETIMER_ADDR, 0x61, 1, ®, 1);
#else
dm_i2c_write(dev, 0x61, ®, 1);
#endif
reg = 0x90;
-#ifndef CONFIG_DM_I2C
+#if !CONFIG_IS_ENABLED(DM_I2C)
i2c_write(I2C_RETIMER_ADDR, 0x62, 1, ®, 1);
#else
dm_i2c_write(dev, 0x62, ®, 1);
#endif
reg = 0xb3;
-#ifndef CONFIG_DM_I2C
+#if !CONFIG_IS_ENABLED(DM_I2C)
i2c_write(I2C_RETIMER_ADDR, 0x63, 1, ®, 1);
#else
dm_i2c_write(dev, 0x63, ®, 1);
#endif
reg = 0xcd;
-#ifndef CONFIG_DM_I2C
+#if !CONFIG_IS_ENABLED(DM_I2C)
i2c_write(I2C_RETIMER_ADDR, 0x64, 1, ®, 1);
#else
dm_i2c_write(dev, 0x64, ®, 1);
#endif
/* Select VCO Divider to full rate (000) */
-#ifndef CONFIG_DM_I2C
+#if !CONFIG_IS_ENABLED(DM_I2C)
i2c_read(I2C_RETIMER_ADDR, 0x2F, 1, ®, 1);
#else
dm_i2c_read(dev, 0x2F, ®, 1);
#endif
reg &= 0x0f;
reg |= 0x70;
-#ifndef CONFIG_DM_I2C
+#if !CONFIG_IS_ENABLED(DM_I2C)
i2c_write(I2C_RETIMER_ADDR, 0x2F, 1, ®, 1);
#else
dm_i2c_write(dev, 0x2F, ®, 1);
@@ -496,7 +496,7 @@
/* Access to Control/Shared register */
reg = 0x0;
-#ifndef CONFIG_DM_I2C
+#if !CONFIG_IS_ENABLED(DM_I2C)
i2c_write(I2C_RETIMER_ADDR2, 0xff, 1, ®, 1);
#else
i2c_get_chip_for_busnum(0, I2C_RETIMER_ADDR2, 1, &dev);
@@ -504,7 +504,7 @@
#endif
/* Read device revision and ID */
-#ifndef CONFIG_DM_I2C
+#if !CONFIG_IS_ENABLED(DM_I2C)
i2c_read(I2C_RETIMER_ADDR2, 1, 1, ®, 1);
#else
dm_i2c_read(dev, 1, ®, 1);
@@ -513,20 +513,20 @@
/* Enable Broadcast. All writes target all channel register sets */
reg = 0x0c;
-#ifndef CONFIG_DM_I2C
+#if !CONFIG_IS_ENABLED(DM_I2C)
i2c_write(I2C_RETIMER_ADDR2, 0xff, 1, ®, 1);
#else
dm_i2c_write(dev, 0xff, ®, 1);
#endif
/* Reset Channel Registers */
-#ifndef CONFIG_DM_I2C
+#if !CONFIG_IS_ENABLED(DM_I2C)
i2c_read(I2C_RETIMER_ADDR2, 0, 1, ®, 1);
#else
dm_i2c_read(dev, 0, ®, 1);
#endif
reg |= 0x4;
-#ifndef CONFIG_DM_I2C
+#if !CONFIG_IS_ENABLED(DM_I2C)
i2c_write(I2C_RETIMER_ADDR2, 0, 1, ®, 1);
#else
dm_i2c_write(dev, 0, ®, 1);
@@ -534,45 +534,45 @@
/* Set data rate as 10.3125 Gbps */
reg = 0x90;
-#ifndef CONFIG_DM_I2C
+#if !CONFIG_IS_ENABLED(DM_I2C)
i2c_write(I2C_RETIMER_ADDR2, 0x60, 1, ®, 1);
#else
dm_i2c_write(dev, 0x60, ®, 1);
#endif
reg = 0xb3;
-#ifndef CONFIG_DM_I2C
+#if !CONFIG_IS_ENABLED(DM_I2C)
i2c_write(I2C_RETIMER_ADDR2, 0x61, 1, ®, 1);
#else
dm_i2c_write(dev, 0x61, ®, 1);
#endif
reg = 0x90;
-#ifndef CONFIG_DM_I2C
+#if !CONFIG_IS_ENABLED(DM_I2C)
i2c_write(I2C_RETIMER_ADDR2, 0x62, 1, ®, 1);
#else
dm_i2c_write(dev, 0x62, ®, 1);
#endif
reg = 0xb3;
-#ifndef CONFIG_DM_I2C
+#if !CONFIG_IS_ENABLED(DM_I2C)
i2c_write(I2C_RETIMER_ADDR2, 0x63, 1, ®, 1);
#else
dm_i2c_write(dev, 0x63, ®, 1);
#endif
reg = 0xcd;
-#ifndef CONFIG_DM_I2C
+#if !CONFIG_IS_ENABLED(DM_I2C)
i2c_write(I2C_RETIMER_ADDR2, 0x64, 1, ®, 1);
#else
dm_i2c_write(dev, 0x64, ®, 1);
#endif
/* Select VCO Divider to full rate (000) */
-#ifndef CONFIG_DM_I2C
+#if !CONFIG_IS_ENABLED(DM_I2C)
i2c_read(I2C_RETIMER_ADDR2, 0x2F, 1, ®, 1);
#else
dm_i2c_read(dev, 0x2F, ®, 1);
#endif
reg &= 0x0f;
reg |= 0x70;
-#ifndef CONFIG_DM_I2C
+#if !CONFIG_IS_ENABLED(DM_I2C)
i2c_write(I2C_RETIMER_ADDR2, 0x2F, 1, ®, 1);
#else
dm_i2c_write(dev, 0x2F, ®, 1);
@@ -640,7 +640,7 @@
u8 chan = PWM_CHANNEL0;
/* Select the PAGE 0 using PMBus commands PAGE for VDD */
-#ifndef CONFIG_DM_I2C
+#if !CONFIG_IS_ENABLED(DM_I2C)
ret = i2c_write(I2C_SVDD_MONITOR_ADDR,
PMBUS_CMD_PAGE, 1, &chan, 1);
#else
@@ -658,7 +658,7 @@
}
/* Read the output voltage using PMBus command READ_VOUT */
-#ifndef CONFIG_DM_I2C
+#if !CONFIG_IS_ENABLED(DM_I2C)
ret = i2c_read(I2C_SVDD_MONITOR_ADDR,
PMBUS_CMD_READ_VOUT, 1, (void *)&vcode, 2);
#else
@@ -679,7 +679,7 @@
svdd & 0xFF, (svdd & 0xFF00) >> 8};
/* Write the desired voltage code to the SVDD regulator */
-#ifndef CONFIG_DM_I2C
+#if !CONFIG_IS_ENABLED(DM_I2C)
ret = i2c_write(I2C_SVDD_MONITOR_ADDR,
PMBUS_CMD_PAGE_PLUS_WRITE, 1, (void *)&buff, 5);
#else
@@ -720,7 +720,7 @@
printf("SVDD changing of RDB\n");
/* Read the BRDCFG54 via CLPD */
-#ifndef CONFIG_DM_I2C
+#if !CONFIG_IS_ENABLED(DM_I2C)
ret = i2c_read(CONFIG_SYS_I2C_FPGA_ADDR,
QIXIS_BRDCFG4_OFFSET, 1, (void *)&brdcfg4, 1);
#else
@@ -740,7 +740,7 @@
brdcfg4 = brdcfg4 | 0x08;
/* Write to the BRDCFG4 */
-#ifndef CONFIG_DM_I2C
+#if !CONFIG_IS_ENABLED(DM_I2C)
ret = i2c_write(CONFIG_SYS_I2C_FPGA_ADDR,
QIXIS_BRDCFG4_OFFSET, 1, (void *)&brdcfg4, 1);
#else
diff --git a/board/freescale/ls2080aqds/eth.c b/board/freescale/ls2080aqds/eth.c
index 4b7f855..914cd0a 100644
--- a/board/freescale/ls2080aqds/eth.c
+++ b/board/freescale/ls2080aqds/eth.c
@@ -125,12 +125,12 @@
};
int *riser_phy_addr = &xqsgii_riser_phy_addr[0];
-#ifdef CONFIG_DM_I2C
+#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *udev;
#endif
/* Set I2c to Slot 1 */
-#ifndef CONFIG_DM_I2C
+#if !CONFIG_IS_ENABLED(DM_I2C)
ret = i2c_write(0x77, 0, 0, &a, 1);
#else
ret = i2c_get_chip_for_busnum(0, 0x77, 1, &udev);
@@ -151,7 +151,7 @@
mii_bus = 1;
dpmac_id = dpmac + 9;
a = 0xb;
-#ifndef CONFIG_DM_I2C
+#if !CONFIG_IS_ENABLED(DM_I2C)
ret = i2c_write(0x76, 0, 0, &a, 1);
#else
ret = i2c_get_chip_for_busnum(0, 0x76, 1, &udev);
@@ -198,7 +198,7 @@
reg_pair[6].val = &ch_b_ctl2[j];
for (k = 0; k < 10; k++) {
-#ifndef CONFIG_DM_I2C
+#if !CONFIG_IS_ENABLED(DM_I2C)
ret = i2c_write(i2c_addr[dpmac],
reg_pair[k].addr,
1, reg_pair[k].val, 1);
@@ -277,12 +277,12 @@
const char *dev = "LS2080A_QDS_MDIO0";
int ret = 0;
unsigned short value;
-#ifdef CONFIG_DM_I2C
+#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *udev;
#endif
/* Set I2c to Slot 1 */
-#ifndef CONFIG_DM_I2C
+#if !CONFIG_IS_ENABLED(DM_I2C)
ret = i2c_write(0x77, 0, 0, &a, 1);
#else
ret = i2c_get_chip_for_busnum(0, 0x77, 1, &udev);
@@ -347,7 +347,7 @@
reg_pair[6].val = &ch_b_ctl2[j];
for (k = 0; k < 10; k++) {
-#ifndef CONFIG_DM_I2C
+#if !CONFIG_IS_ENABLED(DM_I2C)
ret = i2c_write(i2c_phy_addr,
reg_pair[k].addr,
1, reg_pair[k].val, 1);
diff --git a/board/freescale/ls2080aqds/ls2080aqds.c b/board/freescale/ls2080aqds/ls2080aqds.c
index a6f6897..9572319 100644
--- a/board/freescale/ls2080aqds/ls2080aqds.c
+++ b/board/freescale/ls2080aqds/ls2080aqds.c
@@ -164,7 +164,7 @@
int select_i2c_ch_pca9547(u8 ch)
{
int ret;
-#ifdef CONFIG_DM_I2C
+#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *dev;
ret = i2c_get_chip_for_busnum(0, I2C_MUX_PCA_ADDR_PRI, 1, &dev);
@@ -238,7 +238,7 @@
select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT);
#ifdef CONFIG_RTC_ENABLE_32KHZ_OUTPUT
-#ifdef CONFIG_DM_I2C
+#if CONFIG_IS_ENABLED(DM_I2C)
rtc_enable_32khz_output(0, CONFIG_SYS_I2C_RTC_ADDR);
#else
rtc_enable_32khz_output();
diff --git a/board/freescale/ls2080ardb/ls2080ardb.c b/board/freescale/ls2080ardb/ls2080ardb.c
index 26ce5a8..c5ae02b 100644
--- a/board/freescale/ls2080ardb/ls2080ardb.c
+++ b/board/freescale/ls2080ardb/ls2080ardb.c
@@ -167,7 +167,7 @@
{
int ret;
-#ifndef CONFIG_DM_I2C
+#if !CONFIG_IS_ENABLED(DM_I2C)
ret = i2c_write(I2C_MUX_PCA_ADDR_PRI, 0, 1, &ch, 1);
#else
struct udevice *dev;
diff --git a/board/freescale/lx2160a/lx2160a.c b/board/freescale/lx2160a/lx2160a.c
index 1d203ec..b32e487 100644
--- a/board/freescale/lx2160a/lx2160a.c
+++ b/board/freescale/lx2160a/lx2160a.c
@@ -83,7 +83,7 @@
{
int ret;
-#ifndef CONFIG_DM_I2C
+#if !CONFIG_IS_ENABLED(DM_I2C)
ret = i2c_write(I2C_MUX_PCA_ADDR_PRI, 0, 1, &ch, 1);
#else
struct udevice *dev;
diff --git a/board/freescale/p1010rdb/p1010rdb.c b/board/freescale/p1010rdb/p1010rdb.c
index 7e007da..9043633 100644
--- a/board/freescale/p1010rdb/p1010rdb.c
+++ b/board/freescale/p1010rdb/p1010rdb.c
@@ -141,7 +141,7 @@
ccsr_gur_t __iomem *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
u8 tmp;
-#ifdef CONFIG_DM_I2C
+#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *dev;
int ret;
#if defined(CONFIG_TARGET_P1010RDB_PA)
@@ -377,7 +377,7 @@
u8 val;
int bus_num = I2C_PCA9557_BUS_NUM;
-#ifdef CONFIG_DM_I2C
+#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *dev;
int ret;
@@ -419,7 +419,7 @@
printf("Board: %sRDB-PA, ", cpu->name);
#elif defined(CONFIG_TARGET_P1010RDB_PB)
printf("Board: %sRDB-PB, ", cpu->name);
-#ifdef CONFIG_DM_I2C
+#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *dev;
int ret;
@@ -462,7 +462,7 @@
case 0xe:
puts("SDHC\n");
val = 0x60; /* set pca9557 pin input/output */
-#ifdef CONFIG_DM_I2C
+#if CONFIG_IS_ENABLED(DM_I2C)
dm_i2c_write(dev, 3, &val, 1);
#else
i2c_write(I2C_PCA9557_ADDR2, 3, 1, &val, 1);
diff --git a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
index 4584f01..8273384 100644
--- a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
+++ b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
@@ -173,7 +173,7 @@
in_8(&cpld_data->pcba_rev) & 0x0F);
/* Initialize i2c early for rom_loc and flash bank information */
- #if defined(CONFIG_DM_I2C)
+ #if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *dev;
int ret;
diff --git a/board/freescale/t102xrdb/t102xrdb.c b/board/freescale/t102xrdb/t102xrdb.c
index 2770e10..51a36ab 100644
--- a/board/freescale/t102xrdb/t102xrdb.c
+++ b/board/freescale/t102xrdb/t102xrdb.c
@@ -259,7 +259,7 @@
u8 tmp;
int bus_num = I2C_PCA6408_BUS_NUM;
-#ifdef CONFIG_DM_I2C
+#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *dev;
int ret;
diff --git a/board/freescale/t208xqds/t208xqds.c b/board/freescale/t208xqds/t208xqds.c
index dedf722..36bb399 100644
--- a/board/freescale/t208xqds/t208xqds.c
+++ b/board/freescale/t208xqds/t208xqds.c
@@ -83,7 +83,7 @@
{
int ret;
-#ifdef CONFIG_DM_I2C
+#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *dev;
ret = i2c_get_chip_for_busnum(bus_num, I2C_MUX_PCA_ADDR_PRI, 1, &dev);