dts: add Qualcomm rbx boards
Add initial support for the RB1, RB2, and RB5 Robotice Platforms.
These boards are based on the QCM2290, SM6115, and SM8250 SoC
respectively.
Initial support includes:
* Internal MMC on RB1 and RB2
* USB host mode on all boards
* SDHCI card support on all boards
These boards, like the Dragonboard845c, rely on the first-stage EDK2
based bootloader to chainload u-boot.
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 8cbba92..07059dc 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -607,7 +607,10 @@
qcs404-evb.dtb \
axolotl.dtb \
enchilada.dtb \
- fajita.dtb
+ fajita.dtb \
+ rb1.dtb \
+ rb2.dtb \
+ rb5.dtb
dtb-$(CONFIG_TARGET_STEMMY) += ste-ux500-samsung-stemmy.dtb
diff --git a/arch/arm/dts/rb1.dts b/arch/arm/dts/rb1.dts
new file mode 100644
index 0000000..26843b2
--- /dev/null
+++ b/arch/arm/dts/rb1.dts
@@ -0,0 +1,110 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+/*
+ * Copyright (c) 2023, Linaro Ltd
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/arm/qcom,ids.h>
+
+#include "qcm2290.dtsi"
+
+/ {
+ model = "Qualcomm Technologies, Inc. Robotics RB1";
+ compatible = "qcom,qrb2210-rb1", "qcom,qrb2210", "qcom,qcm2290";
+ qcom,msm-id = <QCOM_ID_QRB2210 0x10000>;
+ qcom,board-id = <QCOM_BOARD_ID(QRD, 0, 0) 0>;
+
+ aliases {
+ serial0 = &uart4;
+ sdhc1 = &sdhc_1;
+ sdhc2 = &sdhc_2;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ smbios {
+ compatible = "u-boot,sysinfo-smbios";
+
+ smbios {
+ system {
+ manufacturer = "Qualcomm Technologies, Inc.";
+ product = "Qualcomm Robotics RB1";
+ };
+
+ baseboard {
+ manufacturer = "Thundercomm";
+ product = "TurboX-C2210-SoM";
+ };
+ };
+ };
+};
+
+&sdhc_1 {
+ clocks = <&gcc GCC_SDCC1_AHB_CLK>,
+ <&gcc GCC_SDCC1_APPS_CLK>,
+ <&gcc GCC_SDCC1_ICE_CORE_CLK>;
+ clock-names = "iface",
+ "core",
+ "ice";
+
+ non-removable;
+ supports-cqe;
+ no-sdio;
+ no-sd;
+ status = "okay";
+};
+
+&sdhc_2 {
+ clocks = <&gcc GCC_SDCC2_AHB_CLK>,
+ <&gcc GCC_SDCC2_APPS_CLK>;
+ clock-names = "iface",
+ "core";
+
+ clock-frequency = <200000000>;
+
+ cd-gpios = <&tlmm 88 GPIO_ACTIVE_LOW>;
+
+ no-sdio;
+ no-mmc;
+
+ /* SD card support is broken currently */
+ status = "disabled";
+};
+
+&qupv3_id_0 {
+ status = "okay";
+
+ /delete-property/ iommus;
+};
+
+&uart4 {
+ compatible = "qcom,geni-debug-uart";
+ status = "disabled";
+};
+
+&usb {
+ status = "okay";
+ qcom,select-utmi-as-pipe-clk;
+
+ //dr_mode = "host";
+};
+
+&usb_dwc3 {
+ dr_mode = "host";
+ maximum-speed = "high-speed";
+};
+
+&usb_hsphy {
+ status = "okay";
+
+ /* Disable ref clk because rpmcc isn't supported */
+ clocks = <&gcc GCC_AHB2PHY_USB_CLK>;
+ clock-names = "cfg_ahb";
+};
+
+&xo_board {
+ clock-frequency = <38400000>;
+};
diff --git a/arch/arm/dts/rb2.dts b/arch/arm/dts/rb2.dts
new file mode 100644
index 0000000..740df3a
--- /dev/null
+++ b/arch/arm/dts/rb2.dts
@@ -0,0 +1,119 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2023, Linaro Limited
+ * Based on Linux devicetree
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/arm/qcom,ids.h>
+
+#include "sm6115.dtsi"
+
+/ {
+ model = "Qualcomm Technologies, Inc. QRB4210 RB2";
+ compatible = "qcom,qrb4210-rb2", "qcom,qrb4210";
+ qcom,msm-id = <QCOM_ID_QRB4210 0x10000>;
+ qcom,board-id = <QCOM_BOARD_ID(QRD, 5, 1) 0>;
+
+ aliases {
+ serial0 = &uart4;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ clocks {
+ clk40M: can-clk {
+ compatible = "fixed-clock";
+ clock-frequency = <40000000>;
+ #clock-cells = <0>;
+ };
+ };
+
+ smbios {
+ compatible = "u-boot,sysinfo-smbios";
+
+ smbios {
+ system {
+ manufacturer = "Qualcomm Technologies, Inc.";
+ product = "Qualcomm Robotics RB2";
+ };
+
+ baseboard {
+ manufacturer = "Thundercomm";
+ product = "TurboX-C4210-SoM";
+ };
+ };
+ };
+};
+
+&sdhc_1 {
+ /* Remove rpmcc clocks */
+ clocks = <&gcc GCC_SDCC1_AHB_CLK>,
+ <&gcc GCC_SDCC1_APPS_CLK>,
+ <&gcc GCC_SDCC1_ICE_CORE_CLK>;
+ clock-names = "iface", "core", "ice";
+
+ no-sdio;
+ non-removable;
+
+ status = "okay";
+};
+
+&sdhc_2 {
+ /* Remove rpmcc clocks */
+ clocks = <&gcc GCC_SDCC2_AHB_CLK>,
+ <&gcc GCC_SDCC2_APPS_CLK>;
+ clock-names = "iface", "core";
+
+ no-sdio;
+
+ clock-frequency = <200000000>;
+
+ cd-gpios = <&tlmm 88 GPIO_ACTIVE_LOW>;
+
+ /* SD card support is broken currently */
+ status = "disabled";
+};
+
+&sleep_clk {
+ clock-frequency = <32000>;
+};
+
+&tlmm {
+ gpio-reserved-ranges = <43 2>, <49 1>, <54 1>,
+ <56 3>, <61 2>, <64 1>,
+ <68 1>, <72 8>, <96 1>;
+};
+
+&uart4 {
+ status = "okay";
+};
+
+&usb {
+ status = "okay";
+ qcom,select-utmi-as-pipe-clk;
+};
+
+&usb_dwc3 {
+ dr_mode = "host";
+ maximum-speed = "high-speed";
+
+ /* We don't support superspeed in u-boot so remove the SSPHY */
+ phys = <&usb_hsphy>;
+ phy-names = "usb2-phy";
+};
+
+&usb_hsphy {
+ status = "okay";
+
+ /* Disable ref clk because rpmcc isn't supported */
+ clocks = <&gcc GCC_AHB2PHY_USB_CLK>;
+ clock-names = "cfg_ahb";
+};
+
+&xo_board {
+ clock-frequency = <19200000>;
+};
diff --git a/arch/arm/dts/rb5.dts b/arch/arm/dts/rb5.dts
new file mode 100644
index 0000000..50df90b
--- /dev/null
+++ b/arch/arm/dts/rb5.dts
@@ -0,0 +1,149 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2023, Linaro Ltd.
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/arm/qcom,ids.h>
+
+#include "sm8250.dtsi"
+
+/ {
+ model = "Qualcomm Technologies, Inc. Robotics RB5";
+ compatible = "qcom,qrb5165-rb5", "qcom,qrb5165", "qcom,sm8250";
+ qcom,msm-id = <QCOM_ID_QRB5165 0x20001>;
+ qcom,board-id = <QCOM_BOARD_ID(QRD, 0, 0) 3>;
+
+ aliases {
+ serial0 = &uart12;
+ serial1 = &uart6;
+ sdhc2 = &sdhc_2;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ smbios {
+ compatible = "u-boot,sysinfo-smbios";
+
+ smbios {
+ system {
+ manufacturer = "Qualcomm Technologies, Inc.";
+ product = "Qualcomm Robotics RB5";
+ };
+
+ baseboard {
+ manufacturer = "Thundercomm";
+ product = "TurboX-C5165-SoM";
+ };
+ };
+ };
+};
+
+&sdhc_2 {
+ /* SD card support is broken currently */
+ status = "disabled";
+
+ /* We don't support rpmhcc in u-boot */
+ clocks = <&gcc GCC_SDCC2_AHB_CLK>,
+ <&gcc GCC_SDCC2_APPS_CLK>;
+ clock-names = "iface", "core";
+
+ clock-frequency = <200000000>;
+
+ //cd-gpios = <&tlmm 77 GPIO_ACTIVE_LOW>;
+ broken-cd;
+
+ resets = <&gcc GCC_SDCC2_BCR>;
+
+ pinctrl-0 = <&sdc2_default_state &sdc2_card_det_n>;
+ pinctrl-names = "default";
+
+ bus-width = <4>;
+ no-sdio;
+ no-mmc;
+};
+
+&tlmm {
+ gpio-reserved-ranges = <40 4>;
+};
+
+&uart12 {
+ status = "okay";
+};
+
+&ufs_mem_hc {
+ status = "okay";
+
+ clocks =
+ <&gcc GCC_UFS_PHY_AXI_CLK>,
+ <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>,
+ <&gcc GCC_UFS_PHY_AHB_CLK>,
+ <&gcc GCC_UFS_PHY_UNIPRO_CORE_CLK>,
+ <&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>,
+ <&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>,
+ <&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>;
+ clock-names =
+ "core_clk",
+ "bus_aggr_clk",
+ "iface_clk",
+ "core_clk_unipro",
+ "tx_lane0_sync_clk",
+ "rx_lane0_sync_clk",
+ "rx_lane1_sync_clk";
+};
+
+&ufs_mem_phy {
+ status = "okay";
+
+ clocks = <&gcc GCC_UFS_PHY_PHY_AUX_CLK>;
+ clock-names = "ref_aux";
+};
+
+&usb_2 {
+ status = "okay";
+ qcom,select-utmi-as-pipe-clk;
+};
+
+&usb_2_dwc3 {
+ dr_mode = "host";
+
+ phys = <&usb_2_hsphy>;
+ phy-names = "usb2-phy";
+};
+
+&usb_2_hsphy {
+ /* We don't support rpmhcc in u-boot */
+ /delete-property/ clocks;
+ /delete-property/ clock-names;
+ status = "okay";
+};
+
+&tlmm {
+ sdc2_default_state: sdc2-default-state {
+ clk-pins {
+ pins = "sdc2_clk";
+ bias-disable;
+ drive-strength = <16>;
+ };
+
+ cmd-pins {
+ pins = "sdc2_cmd";
+ bias-pull-up;
+ drive-strength = <10>;
+ };
+
+ data-pins {
+ pins = "sdc2_data";
+ bias-pull-up;
+ drive-strength = <10>;
+ };
+ };
+
+ sdc2_card_det_n: sd-card-det-n-state {
+ pins = "gpio77";
+ function = "gpio";
+ };
+};