MPC85xx: Add MPC8569 CPU support

There is a workaround for MPC8569 CPU Errata, which needs to set Bit 13 of
LBCR in 4K bootpage. We setup a temp TLB for eLBC controller in bootpage,
then invalidate it after LBCR bit 13 is set.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
diff --git a/drivers/misc/fsl_law.c b/drivers/misc/fsl_law.c
index 58340c1..be43a3e 100644
--- a/drivers/misc/fsl_law.c
+++ b/drivers/misc/fsl_law.c
@@ -35,7 +35,7 @@
     defined(CONFIG_MPC8560) || defined(CONFIG_MPC8555)
 #define FSL_HW_NUM_LAWS 8
 #elif defined(CONFIG_MPC8548) || defined(CONFIG_MPC8544) || \
-      defined(CONFIG_MPC8568) || \
+      defined(CONFIG_MPC8568) || defined(CONFIG_MPC8569) || \
       defined(CONFIG_MPC8641) || defined(CONFIG_MPC8610)
 #define FSL_HW_NUM_LAWS 10
 #elif defined(CONFIG_MPC8536) || defined(CONFIG_MPC8572) || \