TQM885D: Exchanged SDRAM timing by a more relaxed timing.
CAS-Latency=2, Write Recovery Time tWR=2
The max. supported bus frequency is 66 MHz. Therefore, changed
threshold to switch from 1:1 mode to 2:1 from 80 MHz to 66 MHz.
Signed-off-by: Martin Krause <martin.krause@tqs.de>
diff --git a/cpu/mpc8xx/speed.c b/cpu/mpc8xx/speed.c
index 101d5f9..11b0893 100644
--- a/cpu/mpc8xx/speed.c
+++ b/cpu/mpc8xx/speed.c
@@ -259,11 +259,8 @@
*/
sccr_reg = immr->im_clkrst.car_sccr;
sccr_reg &= ~SCCR_EBDF11;
-#if defined(CONFIG_TQM885D)
- if (gd->cpu_clk <= 80000000) {
-#else
+
if (gd->cpu_clk <= 66000000) {
-#endif
sccr_reg |= SCCR_EBDF00; /* bus division factor = 1 */
gd->bus_clk = gd->cpu_clk;
} else {