ventana: Add support for the LTC3676 PMIC

The LTC3676 PMIC is used instead of the PFUZE100 PMIC on the
GW51xx/GW52xx/GW53xx Ventana baseboards. In order to support the IMX6Q SoC
at 1GHz on those baseboards, we need to adjust the voltage scaling for the SW1
and SW3 DC/DC converters on the LTC3676 for 1225mV. Note that the scalar
values for the LTC3676 are board-specific as they relate to a resistor devider
chosen by the board design.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c
index 7bc69bd..137f817 100644
--- a/board/gateworks/gw_ventana/gw_ventana.c
+++ b/board/gateworks/gw_ventana/gw_ventana.c
@@ -30,6 +30,7 @@
 #include <mtd_node.h>
 #include <netdev.h>
 #include <power/pmic.h>
+#include <power/ltc3676_pmic.h>
 #include <power/pfuze100_pmic.h>
 #include <fdt_support.h>
 #include <jffs2/load_kernel.h>
@@ -732,6 +733,62 @@
 	},
 };
 
+/* setup board specific PMIC */
+int power_init_board(void)
+{
+	struct pmic *p;
+	u32 reg;
+
+	/* configure PFUZE100 PMIC */
+	if (board_type == GW54xx || board_type == GW54proto) {
+		power_pfuze100_init(I2C_PMIC);
+		p = pmic_get("PFUZE100_PMIC");
+		if (p && !pmic_probe(p)) {
+			pmic_reg_read(p, PFUZE100_DEVICEID, &reg);
+			printf("PMIC:  PFUZE100 ID=0x%02x\n", reg);
+
+			/* Set VGEN1 to 1.5V and enable */
+			pmic_reg_read(p, PFUZE100_VGEN1VOL, &reg);
+			reg &= ~(LDO_VOL_MASK);
+			reg |= (LDOA_1_50V | LDO_EN);
+			pmic_reg_write(p, PFUZE100_VGEN1VOL, reg);
+
+			/* Set SWBST to 5.0V and enable */
+			pmic_reg_read(p, PFUZE100_SWBSTCON1, &reg);
+			reg &= ~(SWBST_MODE_MASK | SWBST_VOL_MASK);
+			reg |= (SWBST_5_00V | SWBST_MODE_AUTO);
+			pmic_reg_write(p, PFUZE100_SWBSTCON1, reg);
+		}
+	}
+
+	/* configure LTC3676 PMIC */
+	else {
+		power_ltc3676_init(I2C_PMIC);
+		p = pmic_get("LTC3676_PMIC");
+		if (p && !pmic_probe(p)) {
+			puts("PMIC:  LTC3676\n");
+			/* set board-specific scalar to 1225mV for IMX6Q@1GHz */
+			if (is_cpu_type(MXC_CPU_MX6Q)) {
+				/* mask PGOOD during SW1 transition */
+				reg = 0x1d | LTC3676_PGOOD_MASK;
+				pmic_reg_write(p, LTC3676_DVB1B, reg);
+				/* set SW1 (VDD_SOC) to 1259mV */
+				reg = 0x1d;
+				pmic_reg_write(p, LTC3676_DVB1A, reg);
+
+				/* mask PGOOD during SW3 transition */
+				reg = 0x1d | LTC3676_PGOOD_MASK;
+				pmic_reg_write(p, LTC3676_DVB3B, reg);
+				/*set SW3 (VDD_ARM) to 1259mV */
+				reg = 0x1d;
+				pmic_reg_write(p, LTC3676_DVB3A, reg);
+			}
+		}
+	}
+
+	return 0;
+}
+
 /* setup GPIO pinmux and default configuration per baseboard */
 static void setup_board_gpio(int board)
 {
@@ -1075,29 +1132,6 @@
 		setenv("serial#", str);
 	}
 
-	/* configure PFUZE100 PMIC (not used on all Ventana baseboards) */
-	power_pfuze100_init(I2C_PMIC);
-	if (board_type == GW54xx || board_type == GW54proto) {
-		struct pmic *p = pmic_get("PFUZE100_PMIC");
-		u32 reg;
-
-		if (p && !pmic_probe(p)) {
-			pmic_reg_read(p, PFUZE100_DEVICEID, &reg);
-			printf("PMIC:  PFUZE100 ID=0x%02x\n", reg);
-
-			/* Set VGEN1 to 1.5V and enable */
-			pmic_reg_read(p, PFUZE100_VGEN1VOL, &reg);
-			reg &= ~(LDO_VOL_MASK);
-			reg |= (LDOA_1_50V | LDO_EN);
-			pmic_reg_write(p, PFUZE100_VGEN1VOL, reg);
-
-			/* Set SWBST to 5.0V and enable */
-			pmic_reg_read(p, PFUZE100_SWBSTCON1, &reg);
-			reg &= ~(SWBST_MODE_MASK | SWBST_VOL_MASK);
-			reg |= (SWBST_5_00V | SWBST_MODE_AUTO);
-			pmic_reg_write(p, PFUZE100_SWBSTCON1, reg);
-		}
-	}
 
 	/* setup baseboard specific GPIO pinmux and config */
 	setup_board_gpio(board_type);
diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h
index 3398390..b984f27 100644
--- a/include/configs/gw_ventana.h
+++ b/include/configs/gw_ventana.h
@@ -136,6 +136,8 @@
 #define CONFIG_POWER_I2C
 #define CONFIG_POWER_PFUZE100
 #define CONFIG_POWER_PFUZE100_I2C_ADDR	0x08
+#define CONFIG_POWER_LTC3676
+#define CONFIG_POWER_LTC3676_I2C_ADDR  0x3c
 
 /* Various command support */
 #include <config_cmd_default.h>