| commit | dac3bf20fb2c9b03476be0d73db620f62ab3cee1 | [log] [tgz] |
|---|---|---|
| author | Vignesh R <vigneshr@ti.com> | Wed Jul 06 10:20:55 2016 +0530 |
| committer | Jagan Teki <jteki@openedev.com> | Sat Jul 09 20:16:32 2016 +0530 |
| tree | baae7a2ca8cd9342f5879bcfca6e20495037a455 | |
| parent | fdf02a36c52cb96717b64113775c4251ecd49596 [diff] |
spi: cadence_qspi_apb: Support 32 bit AHB address AHB address can be as long as 32 bit, hence remove the CQSPI_REG_INDIRECTRDSTARTADDR mask. Since AHB address is passed from DT and read as u32 value, it anyway does not make sense to mask upper bits. Signed-off-by: Vignesh R <vigneshr@ti.com> Tested-by: Marek Vasut <marex@denx.de> Acked-by: Marek Vasut <marex@denx.de> Reviewed-by: Jagan Teki <jteki@openedev.com>