| commit | 23e2da27d3de94117c099a511c7bfec759ede623 | [log] [tgz] |
|---|---|---|
| author | Ye Li <ye.li@nxp.com> | Tue Jan 26 22:01:58 2016 +0800 |
| committer | Stefano Babic <sbabic@denx.de> | Tue Feb 02 21:25:50 2016 +0100 |
| tree | 90207b89532bcfcf7f216c7e3224d0b50d52018f | |
| parent | 9655ebdd50c42f24179d738e4e6230c048f41de1 [diff] |
imx: mx6ul/sx: Fix issue in LCDIF clock dividers calculation The checking with max frequency supported is not correct, because the temp is calculated by max pre and post dividers. We can decrease any divider to meet the max frequency limitation. Actually, the calculation below the codes is doing this way to find best pre and post dividers. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Stefano Babic <sbabic@denx.de>