imx8mn: support get_cpu_rev
Add a dummy cpu type and support get_cpu_rev for i.MX8MN
Signed-off-by: Peng Fan <peng.fan@nxp.com>
diff --git a/arch/arm/include/asm/arch-imx/cpu.h b/arch/arm/include/asm/arch-imx/cpu.h
index 3a85492..b0f4dd0 100644
--- a/arch/arm/include/asm/arch-imx/cpu.h
+++ b/arch/arm/include/asm/arch-imx/cpu.h
@@ -32,6 +32,7 @@
#define MXC_CPU_IMX8MMDL 0x88 /* dummy ID */
#define MXC_CPU_IMX8MMS 0x89 /* dummy ID */
#define MXC_CPU_IMX8MMSL 0x8a /* dummy ID */
+#define MXC_CPU_IMX8MN 0x8b /* dummy ID */
#define MXC_CPU_IMX8QXP_A0 0x90 /* dummy ID */
#define MXC_CPU_IMX8QM 0x91 /* dummy ID */
#define MXC_CPU_IMX8QXP 0x92 /* dummy ID */
diff --git a/arch/arm/include/asm/mach-imx/sys_proto.h b/arch/arm/include/asm/mach-imx/sys_proto.h
index 1e627c8..459d73d 100644
--- a/arch/arm/include/asm/mach-imx/sys_proto.h
+++ b/arch/arm/include/asm/mach-imx/sys_proto.h
@@ -53,6 +53,8 @@
#define is_imx8mmdl() (is_cpu_type(MXC_CPU_IMX8MMDL))
#define is_imx8mms() (is_cpu_type(MXC_CPU_IMX8MMS))
#define is_imx8mmsl() (is_cpu_type(MXC_CPU_IMX8MMSL))
+#define is_imx8mn() (is_cpu_type(MXC_CPU_IMX8MN))
+
#define is_imx8qxp() (is_cpu_type(MXC_CPU_IMX8QXP))
#ifdef CONFIG_MX6
diff --git a/arch/arm/mach-imx/cpu.c b/arch/arm/mach-imx/cpu.c
index d39f607..4db37c7 100644
--- a/arch/arm/mach-imx/cpu.c
+++ b/arch/arm/mach-imx/cpu.c
@@ -92,6 +92,8 @@
const char *get_imx_type(u32 imxtype)
{
switch (imxtype) {
+ case MXC_CPU_IMX8MN:
+ return "8MNano";/* Quad-core version of the imx8mn */
case MXC_CPU_IMX8MM:
return "8MMQ"; /* Quad-core version of the imx8mm */
case MXC_CPU_IMX8MML:
diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c
index a924af4..82fa7ae 100644
--- a/arch/arm/mach-imx/imx8m/soc.c
+++ b/arch/arm/mach-imx/imx8m/soc.c
@@ -197,7 +197,9 @@
reg &= 0xff;
/* i.MX8MM */
- if (major_low == 0x41) {
+ if (major_low == 0x42) {
+ return (MXC_CPU_IMX8MN << 12) | reg;
+ } else if (major_low == 0x41) {
type = get_cpu_variant_type(MXC_CPU_IMX8MM);
} else {
if (reg == CHIP_REV_1_0) {