dm: serial: bcm6345: fix baud rate clock calculation
It's currently bugged and doesn't work for even cases.
Right shift bits instead of dividing and fix even cases.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
diff --git a/drivers/serial/serial_bcm6345.c b/drivers/serial/serial_bcm6345.c
index 14c1bf2..0843b48 100644
--- a/drivers/serial/serial_bcm6345.c
+++ b/drivers/serial/serial_bcm6345.c
@@ -157,11 +157,11 @@
UART_FIFO_CFG_TX_4);
/* set baud rate */
- val = (clk / baudrate) / 16;
+ val = ((clk / baudrate) >> 4);
if (val & 0x1)
- val = val;
+ val = (val >> 1);
else
- val = val / 2 - 1;
+ val = (val >> 1) - 1;
writel_be(val, base + UART_BAUD_REG);
/* clear interrupts */
@@ -243,7 +243,7 @@
ret = clk_get_by_index(dev, 0, &clk);
if (ret < 0)
return ret;
- priv->uartclk = clk_get_rate(&clk) / 2;
+ priv->uartclk = clk_get_rate(&clk);
clk_free(&clk);
/* initialize serial */