Fix incorrect array size of phy settings for 405EX

Change bd_t->bi_phy* arrays from 1 to 2 for PPC405EX since
405EX has 2 ethernet interfaces.

Signed-off-by: Bernhard Weirich <bernhard.weirich@riedel.net>
Signed-off-by: Stefan Roese <sr@denx.de>
diff --git a/arch/powerpc/include/asm/u-boot.h b/arch/powerpc/include/asm/u-boot.h
index b377705..721692a 100644
--- a/arch/powerpc/include/asm/u-boot.h
+++ b/arch/powerpc/include/asm/u-boot.h
@@ -132,7 +132,7 @@
     defined(CONFIG_460EX) || defined(CONFIG_460GT)
 	int		bi_phynum[4];           /* Determines phy mapping */
 	int		bi_phymode[4];          /* Determines phy mode */
-#elif defined(CONFIG_405EP) || defined(CONFIG_440)
+#elif defined(CONFIG_405EP) || defined(CONFIG_405EX) || defined(CONFIG_440)
 	int		bi_phynum[2];           /* Determines phy mapping */
 	int		bi_phymode[2];          /* Determines phy mode */
 #else