ram: rockchip: Add common ddr type configs

We have common ddr types in rockchip or in general. So use
the common ddr type names instead of per Rockchip SoC to
avoid confusion.

The respective ddr type names will use on the associated
ddr SoC driver as these drivers are built per SoC at a time.

Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
diff --git a/board/engicam/px30_core/Kconfig b/board/engicam/px30_core/Kconfig
index a03be78..924c30f 100644
--- a/board/engicam/px30_core/Kconfig
+++ b/board/engicam/px30_core/Kconfig
@@ -11,6 +11,6 @@
 
 config BOARD_SPECIFIC_OPTIONS # dummy
 	def_bool y
-	select RAM_PX30_DDR4 
+	select RAM_ROCKCHIP_DDR4
 
 endif
diff --git a/configs/khadas-edge-captain-rk3399_defconfig b/configs/khadas-edge-captain-rk3399_defconfig
index 754fd4e..f6e90bf 100644
--- a/configs/khadas-edge-captain-rk3399_defconfig
+++ b/configs/khadas-edge-captain-rk3399_defconfig
@@ -53,7 +53,7 @@
 CONFIG_REGULATOR_PWM=y
 CONFIG_REGULATOR_RK8XX=y
 CONFIG_PWM_ROCKCHIP=y
-CONFIG_RAM_RK3399_LPDDR4=y
+CONFIG_RAM_ROCKCHIP_LPDDR4=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_SYS_NS16550_MEM32=y
diff --git a/configs/khadas-edge-rk3399_defconfig b/configs/khadas-edge-rk3399_defconfig
index 7518f7f..f74963c 100644
--- a/configs/khadas-edge-rk3399_defconfig
+++ b/configs/khadas-edge-rk3399_defconfig
@@ -52,7 +52,7 @@
 CONFIG_REGULATOR_PWM=y
 CONFIG_REGULATOR_RK8XX=y
 CONFIG_PWM_ROCKCHIP=y
-CONFIG_RAM_RK3399_LPDDR4=y
+CONFIG_RAM_ROCKCHIP_LPDDR4=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_SYS_NS16550_MEM32=y
diff --git a/configs/khadas-edge-v-rk3399_defconfig b/configs/khadas-edge-v-rk3399_defconfig
index 4c4301a..3abfef1 100644
--- a/configs/khadas-edge-v-rk3399_defconfig
+++ b/configs/khadas-edge-v-rk3399_defconfig
@@ -53,7 +53,7 @@
 CONFIG_REGULATOR_PWM=y
 CONFIG_REGULATOR_RK8XX=y
 CONFIG_PWM_ROCKCHIP=y
-CONFIG_RAM_RK3399_LPDDR4=y
+CONFIG_RAM_ROCKCHIP_LPDDR4=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_SYS_NS16550_MEM32=y
diff --git a/configs/leez-rk3399_defconfig b/configs/leez-rk3399_defconfig
index 5a958ee..bee55f8 100644
--- a/configs/leez-rk3399_defconfig
+++ b/configs/leez-rk3399_defconfig
@@ -48,7 +48,7 @@
 CONFIG_REGULATOR_PWM=y
 CONFIG_REGULATOR_RK8XX=y
 CONFIG_PWM_ROCKCHIP=y
-CONFIG_RAM_RK3399_LPDDR4=y
+CONFIG_RAM_ROCKCHIP_LPDDR4=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_SYS_NS16550_MEM32=y
diff --git a/configs/nanopi-r4s-rk3399_defconfig b/configs/nanopi-r4s-rk3399_defconfig
index 40a45a0..0ef5486 100644
--- a/configs/nanopi-r4s-rk3399_defconfig
+++ b/configs/nanopi-r4s-rk3399_defconfig
@@ -49,7 +49,7 @@
 CONFIG_REGULATOR_PWM=y
 CONFIG_REGULATOR_RK8XX=y
 CONFIG_PWM_ROCKCHIP=y
-CONFIG_RAM_RK3399_LPDDR4=y
+CONFIG_RAM_ROCKCHIP_LPDDR4=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_SYS_NS16550_MEM32=y
diff --git a/configs/pinebook-pro-rk3399_defconfig b/configs/pinebook-pro-rk3399_defconfig
index dfbf5e7..c885cba 100644
--- a/configs/pinebook-pro-rk3399_defconfig
+++ b/configs/pinebook-pro-rk3399_defconfig
@@ -74,7 +74,7 @@
 CONFIG_REGULATOR_PWM=y
 CONFIG_REGULATOR_RK8XX=y
 CONFIG_PWM_ROCKCHIP=y
-CONFIG_RAM_RK3399_LPDDR4=y
+CONFIG_RAM_ROCKCHIP_LPDDR4=y
 CONFIG_DM_RESET=y
 CONFIG_DM_RNG=y
 CONFIG_RNG_ROCKCHIP=y
diff --git a/configs/roc-pc-mezzanine-rk3399_defconfig b/configs/roc-pc-mezzanine-rk3399_defconfig
index e800110..00239c2 100644
--- a/configs/roc-pc-mezzanine-rk3399_defconfig
+++ b/configs/roc-pc-mezzanine-rk3399_defconfig
@@ -69,7 +69,7 @@
 CONFIG_REGULATOR_RK8XX=y
 CONFIG_PWM_ROCKCHIP=y
 # CONFIG_RAM_ROCKCHIP_DEBUG is not set
-CONFIG_RAM_RK3399_LPDDR4=y
+CONFIG_RAM_ROCKCHIP_LPDDR4=y
 CONFIG_DM_RESET=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_SHIFT=2
diff --git a/configs/roc-pc-rk3399_defconfig b/configs/roc-pc-rk3399_defconfig
index d68e03f..ed70ce0 100644
--- a/configs/roc-pc-rk3399_defconfig
+++ b/configs/roc-pc-rk3399_defconfig
@@ -68,7 +68,7 @@
 CONFIG_REGULATOR_RK8XX=y
 CONFIG_PWM_ROCKCHIP=y
 # CONFIG_RAM_ROCKCHIP_DEBUG is not set
-CONFIG_RAM_RK3399_LPDDR4=y
+CONFIG_RAM_ROCKCHIP_LPDDR4=y
 CONFIG_DM_RESET=y
 CONFIG_DM_RNG=y
 CONFIG_RNG_ROCKCHIP=y
diff --git a/configs/rock-pi-4-rk3399_defconfig b/configs/rock-pi-4-rk3399_defconfig
index 7c49ccd..ac182ee 100644
--- a/configs/rock-pi-4-rk3399_defconfig
+++ b/configs/rock-pi-4-rk3399_defconfig
@@ -64,7 +64,7 @@
 CONFIG_REGULATOR_PWM=y
 CONFIG_REGULATOR_RK8XX=y
 CONFIG_PWM_ROCKCHIP=y
-CONFIG_RAM_RK3399_LPDDR4=y
+CONFIG_RAM_ROCKCHIP_LPDDR4=y
 CONFIG_DM_RESET=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_SHIFT=2
diff --git a/configs/rock-pi-4c-rk3399_defconfig b/configs/rock-pi-4c-rk3399_defconfig
index 4f61a0f..292436b 100644
--- a/configs/rock-pi-4c-rk3399_defconfig
+++ b/configs/rock-pi-4c-rk3399_defconfig
@@ -64,7 +64,7 @@
 CONFIG_REGULATOR_PWM=y
 CONFIG_REGULATOR_RK8XX=y
 CONFIG_PWM_ROCKCHIP=y
-CONFIG_RAM_RK3399_LPDDR4=y
+CONFIG_RAM_ROCKCHIP_LPDDR4=y
 CONFIG_DM_RESET=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_SHIFT=2
diff --git a/configs/rockpro64-rk3399_defconfig b/configs/rockpro64-rk3399_defconfig
index 5b8d678..6422b9f 100644
--- a/configs/rockpro64-rk3399_defconfig
+++ b/configs/rockpro64-rk3399_defconfig
@@ -71,7 +71,7 @@
 CONFIG_REGULATOR_PWM=y
 CONFIG_REGULATOR_RK8XX=y
 CONFIG_PWM_ROCKCHIP=y
-CONFIG_RAM_RK3399_LPDDR4=y
+CONFIG_RAM_ROCKCHIP_LPDDR4=y
 CONFIG_DM_RESET=y
 CONFIG_DM_RNG=y
 CONFIG_RNG_ROCKCHIP=y
diff --git a/drivers/ram/rockchip/Kconfig b/drivers/ram/rockchip/Kconfig
index c29d5e8..67c63ec 100644
--- a/drivers/ram/rockchip/Kconfig
+++ b/drivers/ram/rockchip/Kconfig
@@ -11,9 +11,10 @@
 	help
 	  This enable sdram common driver
 
+if RAM_ROCKCHIP
+
 config RAM_ROCKCHIP_DEBUG
 	bool "Rockchip ram drivers debugging"
-	depends on RAM_ROCKCHIP
 	default y
 	help
 	  This enables debugging ram driver API's for the platforms
@@ -22,31 +23,28 @@
 	  This is an option for developers to understand the ram drivers
 	  initialization, configurations and etc.
 
-config RAM_PX30_DDR4
-	bool "DDR4 support for Rockchip PX30"
-	depends on RAM_ROCKCHIP && ROCKCHIP_PX30
+config RAM_ROCKCHIP_DDR4
+	bool "DDR4 support for Rockchip SoCs"
 	help
 	  This enables DDR4 sdram support instead of the default DDR3 support
-	  on Rockchip PC30 SoCs.
+	  on Rockchip SoCs.
 
-config RAM_PX30_LPDDR2
-	bool "LPDDR2 support for Rockchip PX30"
-	depends on RAM_ROCKCHIP && ROCKCHIP_PX30
+config RAM_ROCKCHIP_LPDDR2
+	bool "LPDDR2 support for Rockchip SoCs"
 	help
 	  This enables LPDDR2 sdram support instead of the default DDR3 support
-	  on Rockchip PC30 SoCs.
+	  on Rockchip SoCs.
 
-config RAM_PX30_LPDDR3
-	bool "LPDDR3 support for Rockchip PX30"
-	depends on RAM_ROCKCHIP && ROCKCHIP_PX30
+config RAM_ROCKCHIP_LPDDR3
+	bool "LPDDR3 support for Rockchip SoCs"
 	help
 	  This enables LPDDR3 sdram support instead of the default DDR3 support
-	  on Rockchip PC30 SoCs.
+	  on Rockchip SoCs.
 
-config RAM_RK3399_LPDDR4
-	bool "LPDDR4 support for Rockchip RK3399"
-	depends on RAM_ROCKCHIP && ROCKCHIP_RK3399
+config RAM_ROCKCHIP_LPDDR4
+	bool "LPDDR4 support for Rockchip SoCs"
 	help
 	  This enables LPDDR4 sdram code support for the platforms based
-	  on Rockchip RK3399 SoC.
+	  on Rockchip SoCs.
 
+endif # RAM_ROCKCHIP
diff --git a/drivers/ram/rockchip/sdram_px30.c b/drivers/ram/rockchip/sdram_px30.c
index 98b2593..8618514 100644
--- a/drivers/ram/rockchip/sdram_px30.c
+++ b/drivers/ram/rockchip/sdram_px30.c
@@ -125,11 +125,11 @@
 struct dram_info dram_info;
 
 struct px30_sdram_params sdram_configs[] = {
-#if defined(CONFIG_RAM_PX30_DDR4)
+#if defined(CONFIG_RAM_ROCKCHIP_DDR4)
 #include	"sdram-px30-ddr4-detect-333.inc"
-#elif defined(CONFIG_RAM_PX30_LPDDR2)
+#elif defined(CONFIG_RAM_ROCKCHIP_LPDDR2)
 #include	"sdram-px30-lpddr2-detect-333.inc"
-#elif defined(CONFIG_RAM_PX30_LPDDR3)
+#elif defined(CONFIG_RAM_ROCKCHIP_LPDDR3)
 #include	"sdram-px30-lpddr3-detect-333.inc"
 #else
 #include	"sdram-px30-ddr3-detect-333.inc"
diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c
index 136e4ed..56fd863 100644
--- a/drivers/ram/rockchip/sdram_rk3399.c
+++ b/drivers/ram/rockchip/sdram_rk3399.c
@@ -1625,7 +1625,7 @@
 	rk_clrsetreg(&pmusgrf->soc_con4, 0x1f << 10, stride << 10);
 }
 
-#if !defined(CONFIG_RAM_RK3399_LPDDR4)
+#if !defined(CONFIG_RAM_ROCKCHIP_LPDDR4)
 static int data_training_first(struct dram_info *dram, u32 channel, u8 rank,
 			       struct rk3399_sdram_params *params)
 {
@@ -2558,8 +2558,7 @@
 
 	return 0;
 }
-
-#endif /* CONFIG_RAM_RK3399_LPDDR4 */
+#endif /* CONFIG_RAM_ROCKCHIP_LPDDR4 */
 
 /* CS0,n=1
  * CS1,n=2
@@ -3059,7 +3058,7 @@
 #endif
 
 static const struct sdram_rk3399_ops rk3399_ops = {
-#if !defined(CONFIG_RAM_RK3399_LPDDR4)
+#if !defined(CONFIG_RAM_ROCKCHIP_LPDDR4)
 	.data_training_first = data_training_first,
 	.set_rate_index = switch_to_phy_index1,
 	.modify_param = modify_param,