commit 276504ed3ec61ca31ed64d8a454d47c0a9847e14
author T Karthik Reddy <t.karthik.reddy@xilinx.com> Fri Aug 14 03:02:17 2020 -0600
committer Michal Simek <michal.simek@xilinx.com> Wed Sep 23 10:31:40 2020 +0200
tree 4c33a93112af34fdc7c8002420dd757d09120945
parent 31a359f87eaa66caf44dd10f89885736186537dd

xilinx: Enable uartlite driver for Versal/ZynqMP

Add CONFIG_XILINX_UARTLITE config to versal/zynqmp defconfig to
enable uartlite driver support by default.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

configs/xilinx_zynqmp_virt_defconfig

diff --git a/configs/xilinx_zynqmp_virt_defconfig b/configs/xilinx_zynqmp_virt_defconfig
index 00a53f3..23d7ddf 100644
--- a/configs/xilinx_zynqmp_virt_defconfig
+++ b/configs/xilinx_zynqmp_virt_defconfig
@@ -122,6 +122,7 @@
 CONFIG_SCSI=y
 CONFIG_DM_SCSI=y
 CONFIG_ARM_DCC=y
+CONFIG_XILINX_UARTLITE=y
 CONFIG_ZYNQ_SERIAL=y
 CONFIG_SPI=y
 CONFIG_ZYNQ_SPI=y