| commit | 295326231d1ca8e1e81dbf799a642c5348bc8804 | [log] [tgz] |
|---|---|---|
| author | Masahiro Yamada <yamada.masahiro@socionext.com> | Thu Oct 27 23:47:00 2016 +0900 |
| committer | Masahiro Yamada <yamada.masahiro@socionext.com> | Sat Oct 29 17:01:40 2016 +0900 |
| tree | 9b7619454884be032f9147f883d69d74d4631393 | |
| parent | dd39ee8a545132431b6441135c707e2c49317f8b [diff] |
ARM: uniphier: enable SSC for more PLLs for LD20 SoC For Electro-Magnetic Compatibility. Set CPLL, SPLL2, MPLL, VPPLL, GPPLL, DPLL* to SSC rate 1 percent. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>