arm: mvebu: Enable NAND controller on MVEBU SoC's
This patch enables the NAND controller on the Armada XP/38x and provides
a new function that returns the NAND controller input clock. This
function will be used by the MVEBU NAND driver.
As part of this patch, the multiple BIT macro definitions are moved
to a common place in soc.h.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Peter Morrow <peter@senient.com>
Cc: Luka Perkov <luka.perkov@sartura.hr>
diff --git a/arch/arm/mach-mvebu/cpu.c b/arch/arm/mach-mvebu/cpu.c
index fa82067..38e15aa 100644
--- a/arch/arm/mach-mvebu/cpu.c
+++ b/arch/arm/mach-mvebu/cpu.c
@@ -241,6 +241,16 @@
*/
mvebu_mbus_probe(windows, ARRAY_SIZE(windows));
+ if (mvebu_soc_family() == MVEBU_SOC_AXP) {
+ /* Enable GBE0, GBE1, LCD and NFC PUP */
+ clrsetbits_le32(ARMADA_XP_PUP_ENABLE, 0,
+ GE0_PUP_EN | GE1_PUP_EN | LCD_PUP_EN |
+ NAND_PUP_EN | SPI_PUP_EN);
+ }
+
+ /* Enable NAND and NAND arbiter */
+ clrsetbits_le32(MVEBU_SOC_DEV_MUX_REG, 0, NAND_EN | NAND_ARBITER_EN);
+
/* Disable MBUS error propagation */
clrsetbits_le32(SOC_COHERENCY_FABRIC_CTRL_REG, MBUS_ERR_PROP_EN, 0);
@@ -248,6 +258,13 @@
}
#endif /* CONFIG_ARCH_CPU_INIT */
+u32 mvebu_get_nand_clock(void)
+{
+ return CONFIG_SYS_MVEBU_PLL_CLOCK /
+ ((readl(MVEBU_CORE_DIV_CLK_CTRL(1)) &
+ NAND_ECC_DIVCKL_RATIO_MASK) >> NAND_ECC_DIVCKL_RATIO_OFFS);
+}
+
/*
* SOC specific misc init
*/