ppc4xx: AMCC Luan uses the new boardspecific DDR2 controller setup
Signed-off-by: Stefan Roese <sr@denx.de>
diff --git a/board/amcc/luan/luan.c b/board/amcc/luan/luan.c
index 2eff3b3..7b16f8a 100644
--- a/board/amcc/luan/luan.c
+++ b/board/amcc/luan/luan.c
@@ -104,6 +104,13 @@
return 0;
}
+/*
+ * Override the default functions in cpu/ppc4xx/44x_spd_ddr2.c with
+ * board specific values.
+ */
+u32 ddr_clktr(u32 default_val) {
+ return (SDRAM_CLKTR_CLKP_180_DEG_ADV);
+}
/*************************************************************************
* int testdram()
diff --git a/include/configs/luan.h b/include/configs/luan.h
index cbb59c5..e192d06 100644
--- a/include/configs/luan.h
+++ b/include/configs/luan.h
@@ -136,7 +136,6 @@
#define CONFIG_SPD_EEPROM 1 /* Use SPD EEPROM for setup */
#define SPD_EEPROM_ADDRESS {0x53, 0x52} /* SPD i2c spd addresses*/
#define CONFIG_DDR_ECC 1 /* with ECC support */
-#define CFG_44x_DDR2_CKTR_180 1 /* use 180 deg advance */
/*-----------------------------------------------------------------------
* I2C