nand: Merge changes from Linux nand driver
[backport from linux commit 02f8c6aee8df3cdc935e9bdd4f2d020306035dbe]
This patch synchronizes the nand driver with the Linux 3.0 state.
Signed-off-by: Christian Hitz <christian.hitz@aizo.com>
Cc: Scott Wood <scottwood@freescale.com>
[scottwood@freescale.com: minor fixes]
Signed-off-by: Scott Wood <scottwood@freescale.com>
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index 527d9ae..99668d5 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -1,9 +1,9 @@
/*
* linux/include/linux/mtd/nand.h
*
- * Copyright (c) 2000 David Woodhouse <dwmw2@infradead.org>
- * Steven J. Hill <sjhill@realitydiluted.com>
- * Thomas Gleixner <tglx@linutronix.de>
+ * Copyright © 2000-2010 David Woodhouse <dwmw2@infradead.org>
+ * Steven J. Hill <sjhill@realitydiluted.com>
+ * Thomas Gleixner <tglx@linutronix.de>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
@@ -36,17 +36,18 @@
extern int nand_scan_tail(struct mtd_info *mtd);
/* Free resources held by the NAND device */
-extern void nand_release (struct mtd_info *mtd);
+extern void nand_release(struct mtd_info *mtd);
/* Internal helper for board drivers which need to override command function */
extern void nand_wait_ready(struct mtd_info *mtd);
-/* This constant declares the max. oobsize / page, which
+/*
+ * This constant declares the max. oobsize / page, which
* is supported now. If you add a chip with bigger oobsize/page
* adjust this accordingly.
*/
-#define NAND_MAX_OOBSIZE 218
-#define NAND_MAX_PAGESIZE 4096
+#define NAND_MAX_OOBSIZE 576
+#define NAND_MAX_PAGESIZE 8192
/*
* Constants for hardware specific CLE/ALE/NCE function
@@ -79,10 +80,14 @@
#define NAND_CMD_SEQIN 0x80
#define NAND_CMD_RNDIN 0x85
#define NAND_CMD_READID 0x90
-#define NAND_CMD_PARAM 0xec
#define NAND_CMD_ERASE2 0xd0
+#define NAND_CMD_PARAM 0xec
#define NAND_CMD_RESET 0xff
+#define NAND_CMD_LOCK 0x2a
+#define NAND_CMD_UNLOCK1 0x23
+#define NAND_CMD_UNLOCK2 0x24
+
/* Extended commands for large page devices */
#define NAND_CMD_READSTART 0x30
#define NAND_CMD_RNDOUTSTART 0xE0
@@ -142,9 +147,10 @@
#define NAND_GET_DEVICE 0x80
-/* Option constants for bizarre disfunctionality and real
-* features
-*/
+/*
+ * Option constants for bizarre disfunctionality and real
+ * features.
+ */
/* Chip can not auto increment pages */
#define NAND_NO_AUTOINCR 0x00000001
/* Buswitdh is 16 bit */
@@ -155,23 +161,36 @@
#define NAND_CACHEPRG 0x00000008
/* Chip has copy back function */
#define NAND_COPYBACK 0x00000010
-/* AND Chip which has 4 banks and a confusing page / block
- * assignment. See Renesas datasheet for further information */
+/*
+ * AND Chip which has 4 banks and a confusing page / block
+ * assignment. See Renesas datasheet for further information.
+ */
#define NAND_IS_AND 0x00000020
-/* Chip has a array of 4 pages which can be read without
- * additional ready /busy waits */
+/*
+ * Chip has a array of 4 pages which can be read without
+ * additional ready /busy waits.
+ */
#define NAND_4PAGE_ARRAY 0x00000040
-/* Chip requires that BBT is periodically rewritten to prevent
+/*
+ * Chip requires that BBT is periodically rewritten to prevent
* bits from adjacent blocks from 'leaking' in altering data.
- * This happens with the Renesas AG-AND chips, possibly others. */
+ * This happens with the Renesas AG-AND chips, possibly others.
+ */
#define BBT_AUTO_REFRESH 0x00000080
-/* Chip does not require ready check on read. True
+/*
+ * Chip does not require ready check on read. True
* for all large page devices, as they do not support
- * autoincrement.*/
+ * autoincrement.
+ */
#define NAND_NO_READRDY 0x00000100
/* Chip does not allow subpage writes */
#define NAND_NO_SUBPAGE_WRITE 0x00000200
+/* Device is one of 'new' xD cards that expose fake nand command set */
+#define NAND_BROKEN_XD 0x00000400
+
+/* Device behaves just like nand, but is readonly */
+#define NAND_ROM 0x00000800
/* Options valid for Samsung large page devices */
#define NAND_SAMSUNG_LP_OPTIONS \
@@ -190,17 +209,29 @@
#define NAND_CHIPOPTIONS_MSK (0x0000ffff & ~NAND_NO_AUTOINCR)
/* Non chip related options */
-/* Use a flash based bad block table. This option is passed to the
- * default bad block table function. */
+/*
+ * Use a flash based bad block table. OOB identifier is saved in OOB area.
+ * This option is passed to the default bad block table function.
+ */
#define NAND_USE_FLASH_BBT 0x00010000
/* This option skips the bbt scan during initialization. */
#define NAND_SKIP_BBTSCAN 0x00020000
-/* This option is defined if the board driver allocates its own buffers
- (e.g. because it needs them DMA-coherent */
+/*
+ * This option is defined if the board driver allocates its own buffers
+ * (e.g. because it needs them DMA-coherent).
+ */
#define NAND_OWN_BUFFERS 0x00040000
+/* Chip may not exist, so silence any errors in scan */
+#define NAND_SCAN_SILENT_NODEV 0x00080000
+/*
+ * If passed additionally to NAND_USE_FLASH_BBT then BBT code will not touch
+ * the OOB area.
+ */
+#define NAND_USE_FLASH_BBT_NO_OOB 0x00800000
+/* Create an empty BBT with no vendor information if the BBT is available */
+#define NAND_CREATE_EMPTY_BBT 0x01000000
+
/* Options set by nand scan */
-/* bbt has already been read */
-#define NAND_BBT_SCANNED 0x40000000
/* Nand scan has allocated controller struct */
#define NAND_CONTROLLER_ALLOC 0x80000000
@@ -275,13 +306,13 @@
#define ONFI_CRC_BASE 0x4F4E
-
/**
* struct nand_hw_control - Control structure for hardware controller (e.g ECC generator) shared among independent devices
* @lock: protection lock
* @active: the mtd device which holds the controller currently
- * @wq: wait queue to sleep on if a NAND operation is in progress
- * used instead of the per chip wait queue when a hw controller is available
+ * @wq: wait queue to sleep on if a NAND operation is in
+ * progress used instead of the per chip wait queue
+ * when a hw controller is available.
*/
struct nand_hw_control {
/* XXX U-BOOT XXX */
@@ -302,58 +333,50 @@
* @prepad: padding information for syndrome based ecc generators
* @postpad: padding information for syndrome based ecc generators
* @layout: ECC layout control struct pointer
- * @priv: pointer to private ecc control data
+ * @priv: pointer to private ecc control data
* @hwctl: function to control hardware ecc generator. Must only
* be provided if an hardware ECC is available
* @calculate: function for ecc calculation or readback from ecc hardware
* @correct: function for ecc correction, matching to ecc generator (sw/hw)
* @read_page_raw: function to read a raw page without ECC
* @write_page_raw: function to write a raw page without ECC
- * @read_page: function to read a page according to the ecc generator requirements
- * @write_page: function to write a page according to the ecc generator requirements
+ * @read_page: function to read a page according to the ecc generator
+ * requirements.
+ * @read_subpage: function to read parts of the page covered by ECC.
+ * @write_page: function to write a page according to the ecc generator
+ * requirements.
* @read_oob: function to read chip OOB data
* @write_oob: function to write chip OOB data
*/
struct nand_ecc_ctrl {
- nand_ecc_modes_t mode;
- int steps;
- int size;
- int bytes;
- int total;
- int prepad;
- int postpad;
+ nand_ecc_modes_t mode;
+ int steps;
+ int size;
+ int bytes;
+ int total;
+ int prepad;
+ int postpad;
struct nand_ecclayout *layout;
- void *priv;
- void (*hwctl)(struct mtd_info *mtd, int mode);
- int (*calculate)(struct mtd_info *mtd,
- const uint8_t *dat,
- uint8_t *ecc_code);
- int (*correct)(struct mtd_info *mtd, uint8_t *dat,
- uint8_t *read_ecc,
- uint8_t *calc_ecc);
- int (*read_page_raw)(struct mtd_info *mtd,
- struct nand_chip *chip,
- uint8_t *buf, int page);
- void (*write_page_raw)(struct mtd_info *mtd,
- struct nand_chip *chip,
- const uint8_t *buf);
- int (*read_page)(struct mtd_info *mtd,
- struct nand_chip *chip,
- uint8_t *buf, int page);
- int (*read_subpage)(struct mtd_info *mtd,
- struct nand_chip *chip,
- uint32_t offs, uint32_t len,
- uint8_t *buf);
- void (*write_page)(struct mtd_info *mtd,
- struct nand_chip *chip,
- const uint8_t *buf);
- int (*read_oob)(struct mtd_info *mtd,
- struct nand_chip *chip,
- int page,
- int sndcmd);
- int (*write_oob)(struct mtd_info *mtd,
- struct nand_chip *chip,
- int page);
+ void *priv;
+ void (*hwctl)(struct mtd_info *mtd, int mode);
+ int (*calculate)(struct mtd_info *mtd, const uint8_t *dat,
+ uint8_t *ecc_code);
+ int (*correct)(struct mtd_info *mtd, uint8_t *dat, uint8_t *read_ecc,
+ uint8_t *calc_ecc);
+ int (*read_page_raw)(struct mtd_info *mtd, struct nand_chip *chip,
+ uint8_t *buf, int page);
+ void (*write_page_raw)(struct mtd_info *mtd, struct nand_chip *chip,
+ const uint8_t *buf);
+ int (*read_page)(struct mtd_info *mtd, struct nand_chip *chip,
+ uint8_t *buf, int page);
+ int (*read_subpage)(struct mtd_info *mtd, struct nand_chip *chip,
+ uint32_t offs, uint32_t len, uint8_t *buf);
+ void (*write_page)(struct mtd_info *mtd, struct nand_chip *chip,
+ const uint8_t *buf);
+ int (*read_oob)(struct mtd_info *mtd, struct nand_chip *chip, int page,
+ int sndcmd);
+ int (*write_oob)(struct mtd_info *mtd, struct nand_chip *chip,
+ int page);
};
/**
@@ -373,125 +396,150 @@
/**
* struct nand_chip - NAND Private Flash Chip Data
- * @IO_ADDR_R: [BOARDSPECIFIC] address to read the 8 I/O lines of the flash device
- * @IO_ADDR_W: [BOARDSPECIFIC] address to write the 8 I/O lines of the flash device
+ * @IO_ADDR_R: [BOARDSPECIFIC] address to read the 8 I/O lines of the
+ * flash device
+ * @IO_ADDR_W: [BOARDSPECIFIC] address to write the 8 I/O lines of the
+ * flash device.
* @read_byte: [REPLACEABLE] read one byte from the chip
* @read_word: [REPLACEABLE] read one word from the chip
* @write_buf: [REPLACEABLE] write data from the buffer to the chip
* @read_buf: [REPLACEABLE] read data from the chip into the buffer
- * @verify_buf: [REPLACEABLE] verify buffer contents against the chip data
+ * @verify_buf: [REPLACEABLE] verify buffer contents against the chip
+ * data.
* @select_chip: [REPLACEABLE] select chip nr
* @block_bad: [REPLACEABLE] check, if the block is bad
* @block_markbad: [REPLACEABLE] mark the block bad
- * @cmd_ctrl: [BOARDSPECIFIC] hardwarespecific funtion for controlling
+ * @cmd_ctrl: [BOARDSPECIFIC] hardwarespecific function for controlling
* ALE/CLE/nCE. Also used to write command and address
- * @dev_ready: [BOARDSPECIFIC] hardwarespecific function for accesing device ready/busy line
- * If set to NULL no access to ready/busy is available and the ready/busy information
- * is read from the chip status register
- * @cmdfunc: [REPLACEABLE] hardwarespecific function for writing commands to the chip
- * @waitfunc: [REPLACEABLE] hardwarespecific function for wait on ready
+ * @init_size: [BOARDSPECIFIC] hardwarespecific function for setting
+ * mtd->oobsize, mtd->writesize and so on.
+ * @id_data contains the 8 bytes values of NAND_CMD_READID.
+ * Return with the bus width.
+ * @dev_ready: [BOARDSPECIFIC] hardwarespecific function for accesing
+ * device ready/busy line. If set to NULL no access to
+ * ready/busy is available and the ready/busy information
+ * is read from the chip status register.
+ * @cmdfunc: [REPLACEABLE] hardwarespecific function for writing
+ * commands to the chip.
+ * @waitfunc: [REPLACEABLE] hardwarespecific function for wait on
+ * ready.
* @ecc: [BOARDSPECIFIC] ecc control ctructure
* @buffers: buffer structure for read/write
* @hwcontrol: platform-specific hardware control structure
* @ops: oob operation operands
- * @erase_cmd: [INTERN] erase command write function, selectable due to AND support
+ * @erase_cmd: [INTERN] erase command write function, selectable due
+ * to AND support.
* @scan_bbt: [REPLACEABLE] function to scan bad block table
- * @chip_delay: [BOARDSPECIFIC] chip dependent delay for transfering data from array to read regs (tR)
- * @wq: [INTERN] wait queue to sleep on if a NAND operation is in progress
+ * @chip_delay: [BOARDSPECIFIC] chip dependent delay for transferring
+ * data from array to read regs (tR).
* @state: [INTERN] the current state of the NAND device
* @oob_poi: poison value buffer
- * @page_shift: [INTERN] number of address bits in a page (column address bits)
+ * @page_shift: [INTERN] number of address bits in a page (column
+ * address bits).
* @phys_erase_shift: [INTERN] number of address bits in a physical eraseblock
* @bbt_erase_shift: [INTERN] number of address bits in a bbt entry
* @chip_shift: [INTERN] number of address bits in one chip
- * @datbuf: [INTERN] internal buffer for one page + oob
- * @oobbuf: [INTERN] oob buffer for one eraseblock
- * @oobdirty: [INTERN] indicates that oob_buf must be reinitialized
- * @data_poi: [INTERN] pointer to a data buffer
- * @options: [BOARDSPECIFIC] various chip options. They can partly be set to inform nand_scan about
- * special functionality. See the defines for further explanation
- * @badblockpos: [INTERN] position of the bad block marker in the oob area
+ * @options: [BOARDSPECIFIC] various chip options. They can partly
+ * be set to inform nand_scan about special functionality.
+ * See the defines for further explanation.
+ * @badblockpos: [INTERN] position of the bad block marker in the oob
+ * area.
+ * @badblockbits: [INTERN] number of bits to left-shift the bad block
+ * number
* @cellinfo: [INTERN] MLC/multichip data from chip ident
* @numchips: [INTERN] number of physical chips
* @chipsize: [INTERN] the size of one chip for multichip arrays
* @pagemask: [INTERN] page number mask = number of (pages / chip) - 1
- * @pagebuf: [INTERN] holds the pagenumber which is currently in data_buf
+ * @pagebuf: [INTERN] holds the pagenumber which is currently in
+ * data_buf.
* @subpagesize: [INTERN] holds the subpagesize
+ * @onfi_version: [INTERN] holds the chip ONFI version (BCD encoded),
+ * non 0 if ONFI supported.
+ * @onfi_params: [INTERN] holds the ONFI page parameter when ONFI is
+ * supported, 0 otherwise.
* @ecclayout: [REPLACEABLE] the default ecc placement scheme
* @bbt: [INTERN] bad block table pointer
- * @bbt_td: [REPLACEABLE] bad block table descriptor for flash lookup
+ * @bbt_td: [REPLACEABLE] bad block table descriptor for flash
+ * lookup.
* @bbt_md: [REPLACEABLE] bad block table mirror descriptor
- * @badblock_pattern: [REPLACEABLE] bad block scan pattern used for initial bad block scan
- * @controller: [REPLACEABLE] a pointer to a hardware controller structure
- * which is shared among multiple independend devices
+ * @badblock_pattern: [REPLACEABLE] bad block scan pattern used for initial
+ * bad block scan.
+ * @controller: [REPLACEABLE] a pointer to a hardware controller
+ * structure which is shared among multiple independend
+ * devices.
* @priv: [OPTIONAL] pointer to private chip date
- * @errstat: [OPTIONAL] hardware specific function to perform additional error status checks
- * (determine if errors are correctable)
+ * @errstat: [OPTIONAL] hardware specific function to perform
+ * additional error status checks (determine if errors are
+ * correctable).
* @write_page: [REPLACEABLE] High-level page write function
*/
struct nand_chip {
- void __iomem *IO_ADDR_R;
- void __iomem *IO_ADDR_W;
+ void __iomem *IO_ADDR_R;
+ void __iomem *IO_ADDR_W;
- uint8_t (*read_byte)(struct mtd_info *mtd);
- u16 (*read_word)(struct mtd_info *mtd);
- void (*write_buf)(struct mtd_info *mtd, const uint8_t *buf, int len);
- void (*read_buf)(struct mtd_info *mtd, uint8_t *buf, int len);
- int (*verify_buf)(struct mtd_info *mtd, const uint8_t *buf, int len);
- void (*select_chip)(struct mtd_info *mtd, int chip);
- int (*block_bad)(struct mtd_info *mtd, loff_t ofs, int getchip);
- int (*block_markbad)(struct mtd_info *mtd, loff_t ofs);
- void (*cmd_ctrl)(struct mtd_info *mtd, int dat,
- unsigned int ctrl);
- int (*dev_ready)(struct mtd_info *mtd);
- void (*cmdfunc)(struct mtd_info *mtd, unsigned command, int column, int page_addr);
- int (*waitfunc)(struct mtd_info *mtd, struct nand_chip *this);
- void (*erase_cmd)(struct mtd_info *mtd, int page);
- int (*scan_bbt)(struct mtd_info *mtd);
- int (*errstat)(struct mtd_info *mtd, struct nand_chip *this, int state, int status, int page);
- int (*write_page)(struct mtd_info *mtd, struct nand_chip *chip,
- const uint8_t *buf, int page, int cached, int raw);
+ uint8_t (*read_byte)(struct mtd_info *mtd);
+ u16 (*read_word)(struct mtd_info *mtd);
+ void (*write_buf)(struct mtd_info *mtd, const uint8_t *buf, int len);
+ void (*read_buf)(struct mtd_info *mtd, uint8_t *buf, int len);
+ int (*verify_buf)(struct mtd_info *mtd, const uint8_t *buf, int len);
+ void (*select_chip)(struct mtd_info *mtd, int chip);
+ int (*block_bad)(struct mtd_info *mtd, loff_t ofs, int getchip);
+ int (*block_markbad)(struct mtd_info *mtd, loff_t ofs);
+ void (*cmd_ctrl)(struct mtd_info *mtd, int dat, unsigned int ctrl);
+ int (*init_size)(struct mtd_info *mtd, struct nand_chip *this,
+ u8 *id_data);
+ int (*dev_ready)(struct mtd_info *mtd);
+ void (*cmdfunc)(struct mtd_info *mtd, unsigned command, int column,
+ int page_addr);
+ int(*waitfunc)(struct mtd_info *mtd, struct nand_chip *this);
+ void (*erase_cmd)(struct mtd_info *mtd, int page);
+ int (*scan_bbt)(struct mtd_info *mtd);
+ int (*errstat)(struct mtd_info *mtd, struct nand_chip *this, int state,
+ int status, int page);
+ int (*write_page)(struct mtd_info *mtd, struct nand_chip *chip,
+ const uint8_t *buf, int page, int cached, int raw);
- int chip_delay;
- unsigned int options;
+ int chip_delay;
+ unsigned int options;
- int page_shift;
- int phys_erase_shift;
- int bbt_erase_shift;
- int chip_shift;
- int numchips;
- uint64_t chipsize;
- int pagemask;
- int pagebuf;
- int subpagesize;
- uint8_t cellinfo;
- int badblockpos;
- int onfi_version;
+ int page_shift;
+ int phys_erase_shift;
+ int bbt_erase_shift;
+ int chip_shift;
+ int numchips;
+ uint64_t chipsize;
+ int pagemask;
+ int pagebuf;
+ int subpagesize;
+ uint8_t cellinfo;
+ int badblockpos;
+ int badblockbits;
+
+ int onfi_version;
#ifdef CONFIG_SYS_NAND_ONFI_DETECTION
struct nand_onfi_params onfi_params;
#endif
- int state;
+ int state;
- uint8_t *oob_poi;
- struct nand_hw_control *controller;
- struct nand_ecclayout *ecclayout;
+ uint8_t *oob_poi;
+ struct nand_hw_control *controller;
+ struct nand_ecclayout *ecclayout;
struct nand_ecc_ctrl ecc;
struct nand_buffers *buffers;
-
struct nand_hw_control hwcontrol;
struct mtd_oob_ops ops;
- uint8_t *bbt;
- struct nand_bbt_descr *bbt_td;
- struct nand_bbt_descr *bbt_md;
+ uint8_t *bbt;
+ struct nand_bbt_descr *bbt_td;
+ struct nand_bbt_descr *bbt_md;
- struct nand_bbt_descr *badblock_pattern;
+ struct nand_bbt_descr *badblock_pattern;
- void *priv;
+ void *priv;
};
/*
@@ -535,7 +583,7 @@
*/
struct nand_manufacturers {
int id;
- char * name;
+ char *name;
};
extern const struct nand_flash_dev nand_flash_ids[];
@@ -548,7 +596,7 @@
extern int nand_erase_nand(struct mtd_info *mtd, struct erase_info *instr,
int allowbbt);
extern int nand_do_read(struct mtd_info *mtd, loff_t from, size_t len,
- size_t * retlen, uint8_t * buf);
+ size_t *retlen, uint8_t *buf);
/*
* Constants for oob configuration
@@ -569,17 +617,20 @@
* @priv: hardware controller specific settings
*/
struct platform_nand_chip {
- int nr_chips;
- int chip_offset;
- int nr_partitions;
- struct mtd_partition *partitions;
- struct nand_ecclayout *ecclayout;
- int chip_delay;
- unsigned int options;
- const char **part_probe_types;
- void *priv;
+ int nr_chips;
+ int chip_offset;
+ int nr_partitions;
+ struct mtd_partition *partitions;
+ struct nand_ecclayout *ecclayout;
+ int chip_delay;
+ unsigned int options;
+ const char **part_probe_types;
+ void *priv;
};
+/* Keep gcc happy */
+struct platform_device;
+
/**
* struct platform_nand_ctrl - controller level device structure
* @hwcontrol: platform specific hardware control structure
@@ -592,12 +643,11 @@
* All fields are optional and depend on the hardware driver requirements
*/
struct platform_nand_ctrl {
- void (*hwcontrol)(struct mtd_info *mtd, int cmd);
- int (*dev_ready)(struct mtd_info *mtd);
- void (*select_chip)(struct mtd_info *mtd, int chip);
- void (*cmd_ctrl)(struct mtd_info *mtd, int dat,
- unsigned int ctrl);
- void *priv;
+ void (*hwcontrol)(struct mtd_info *mtd, int cmd);
+ int (*dev_ready)(struct mtd_info *mtd);
+ void (*select_chip)(struct mtd_info *mtd, int chip);
+ void (*cmd_ctrl)(struct mtd_info *mtd, int dat, unsigned int ctrl);
+ void *priv;
};
/**
@@ -606,8 +656,8 @@
* @ctrl: controller level device structure
*/
struct platform_nand_data {
- struct platform_nand_chip chip;
- struct platform_nand_ctrl ctrl;
+ struct platform_nand_chip chip;
+ struct platform_nand_ctrl ctrl;
};
/* Some helpers to access the data structures */