armv8: ls1088aqds: Change phy mode to PHY_INTERFACE_MODE_RGMII_ID
Since TX delay is now enabled only in PHY_INTERFACE_MODE_RGMII_ID
PHY_INTERFACE_MODE_RGMII_TXID.
These change where introduced in phy driver in commit 05b29aa0cb68
("net: phy: realtek: fix enabling of the TX-delay for RTL8211F").
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
diff --git a/board/freescale/ls1088a/eth_ls1088aqds.c b/board/freescale/ls1088a/eth_ls1088aqds.c
index de70aee..7fe446e 100644
--- a/board/freescale/ls1088a/eth_ls1088aqds.c
+++ b/board/freescale/ls1088a/eth_ls1088aqds.c
@@ -634,6 +634,7 @@
for (i = WRIOP1_DPMAC1; i < NUM_WRIOP_PORTS; i++) {
switch (wriop_get_enet_if(i)) {
case PHY_INTERFACE_MODE_RGMII:
+ case PHY_INTERFACE_MODE_RGMII_ID:
ls1088a_handle_phy_interface_rgmii(i);
break;
case PHY_INTERFACE_MODE_QSGMII:
diff --git a/drivers/net/ldpaa_eth/ls1088a.c b/drivers/net/ldpaa_eth/ls1088a.c
index 061935e..780a239 100644
--- a/drivers/net/ldpaa_eth/ls1088a.c
+++ b/drivers/net/ldpaa_eth/ls1088a.c
@@ -99,7 +99,7 @@
ec >>= FSL_CHASSIS3_RCWSR25_EC1_PRTCL_SHIFT;
if (!ec)
- wriop_init_dpmac_enet_if(4, PHY_INTERFACE_MODE_RGMII);
+ wriop_init_dpmac_enet_if(4, PHY_INTERFACE_MODE_RGMII_ID);
#endif
#ifdef CONFIG_SYS_FSL_EC2
@@ -108,7 +108,7 @@
ec >>= FSL_CHASSIS3_RCWSR25_EC2_PRTCL_SHIFT;
if (!ec)
- wriop_init_dpmac_enet_if(5, PHY_INTERFACE_MODE_RGMII);
+ wriop_init_dpmac_enet_if(5, PHY_INTERFACE_MODE_RGMII_ID);
#endif
}
#endif