Merge branch 'master' of git://www.denx.de/git/u-boot-microblaze
diff --git a/arch/arm/cpu/arm1136/mx31/timer.c b/arch/arm/cpu/arm1136/mx31/timer.c
index 86916d1..b006b60 100644
--- a/arch/arm/cpu/arm1136/mx31/timer.c
+++ b/arch/arm/cpu/arm1136/mx31/timer.c
@@ -115,13 +115,13 @@
{
ulong now = GPTCNT; /* current tick value */
- if (now >= gd->lastinc) /* normal mode (non roll) */
+ if (now >= gd->arch.lastinc) /* normal mode (non roll) */
/* move stamp forward with absolut diff ticks */
- gd->tbl += (now - gd->lastinc);
+ gd->arch.tbl += (now - gd->arch.lastinc);
else /* we have rollover of incrementer */
- gd->tbl += (0xFFFFFFFF - gd->lastinc) + now;
- gd->lastinc = now;
- return gd->tbl;
+ gd->arch.tbl += (0xFFFFFFFF - gd->arch.lastinc) + now;
+ gd->arch.lastinc = now;
+ return gd->arch.tbl;
}
ulong get_timer_masked(void)
diff --git a/arch/arm/cpu/arm1136/mx35/generic.c b/arch/arm/cpu/arm1136/mx35/generic.c
index 295a98e..d11e6f6 100644
--- a/arch/arm/cpu/arm1136/mx35/generic.c
+++ b/arch/arm/cpu/arm1136/mx35/generic.c
@@ -478,11 +478,11 @@
{
#ifdef CONFIG_FSL_ESDHC
#if CONFIG_SYS_FSL_ESDHC_ADDR == MMC_SDHC2_BASE_ADDR
- gd->sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
+ gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
#elif CONFIG_SYS_FSL_ESDHC_ADDR == MMC_SDHC3_BASE_ADDR
- gd->sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
+ gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
#else
- gd->sdhc_clk = mxc_get_clock(MXC_ESDHC1_CLK);
+ gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC1_CLK);
#endif
#endif
return 0;
diff --git a/arch/arm/cpu/arm1136/mx35/timer.c b/arch/arm/cpu/arm1136/mx35/timer.c
index 9680b7f..584ad15 100644
--- a/arch/arm/cpu/arm1136/mx35/timer.c
+++ b/arch/arm/cpu/arm1136/mx35/timer.c
@@ -32,8 +32,8 @@
DECLARE_GLOBAL_DATA_PTR;
-#define timestamp (gd->tbl)
-#define lastinc (gd->lastinc)
+#define timestamp (gd->arch.tbl)
+#define lastinc (gd->arch.lastinc)
/* General purpose timers bitfields */
#define GPTCR_SWR (1<<15) /* Software reset */
diff --git a/arch/arm/cpu/arm1136/omap24xx/timer.c b/arch/arm/cpu/arm1136/omap24xx/timer.c
index e929ae4..53015cb 100644
--- a/arch/arm/cpu/arm1136/omap24xx/timer.c
+++ b/arch/arm/cpu/arm1136/omap24xx/timer.c
@@ -51,8 +51,8 @@
*((int32_t *) (CONFIG_SYS_TIMERBASE + TCLR)) = val; /* start timer */
/* reset time */
- gd->lastinc = READ_TIMER; /* capture current incrementer value */
- gd->tbl = 0; /* start "advancing" time stamp */
+ gd->arch.lastinc = READ_TIMER; /* capture current incrementer value */
+ gd->arch.tbl = 0; /* start "advancing" time stamp */
return(0);
}
@@ -81,8 +81,8 @@
tmp = get_timer (0); /* get current timestamp */
if ((tmo + tmp + 1) < tmp) { /* if setting this forward will roll */
/* time stamp, then reset time */
- gd->lastinc = READ_TIMER; /* capture incrementer value */
- gd->tbl = 0; /* start time stamp */
+ gd->arch.lastinc = READ_TIMER; /* capture incrementer value */
+ gd->arch.tbl = 0; /* start time stamp */
} else {
tmo += tmp; /* else, set advancing stamp wake up time */
}
@@ -94,12 +94,15 @@
{
ulong now = READ_TIMER; /* current tick value */
- if (now >= gd->lastinc) /* normal mode (non roll) */
- gd->tbl += (now - gd->lastinc); /* move stamp fordward with absoulte diff ticks */
- else /* we have rollover of incrementer */
- gd->tbl += (0xFFFFFFFF - gd->lastinc) + now;
- gd->lastinc = now;
- return gd->tbl;
+ if (now >= gd->arch.lastinc) { /* normal mode (non roll) */
+ /* move stamp fordward with absoulte diff ticks */
+ gd->arch.tbl += (now - gd->arch.lastinc);
+ } else {
+ /* we have rollover of incrementer */
+ gd->arch.tbl += (0xFFFFFFFF - gd->arch.lastinc) + now;
+ }
+ gd->arch.lastinc = now;
+ return gd->arch.tbl;
}
/* waits specified delay value and resets timestamp */
diff --git a/arch/arm/cpu/arm920t/a320/timer.c b/arch/arm/cpu/arm920t/a320/timer.c
index 4bfcef2..512fb9d 100644
--- a/arch/arm/cpu/arm920t/a320/timer.c
+++ b/arch/arm/cpu/arm920t/a320/timer.c
@@ -31,14 +31,14 @@
static inline unsigned long long tick_to_time(unsigned long long tick)
{
tick *= CONFIG_SYS_HZ;
- do_div(tick, gd->timer_rate_hz);
+ do_div(tick, gd->arch.timer_rate_hz);
return tick;
}
static inline unsigned long long usec_to_tick(unsigned long long usec)
{
- usec *= gd->timer_rate_hz;
+ usec *= gd->arch.timer_rate_hz;
do_div(usec, 1000000);
return usec;
@@ -74,8 +74,8 @@
cr |= FTTMR010_TM3_ENABLE;
writel(cr, &tmr->cr);
- gd->timer_rate_hz = TIMER_CLOCK;
- gd->tbu = gd->tbl = 0;
+ gd->arch.timer_rate_hz = TIMER_CLOCK;
+ gd->arch.tbu = gd->arch.tbl = 0;
return 0;
}
@@ -89,10 +89,10 @@
ulong now = TIMER_LOAD_VAL - readl(&tmr->timer3_counter);
/* increment tbu if tbl has rolled over */
- if (now < gd->tbl)
- gd->tbu++;
- gd->tbl = now;
- return (((unsigned long long)gd->tbu) << 32) | gd->tbl;
+ if (now < gd->arch.tbl)
+ gd->arch.tbu++;
+ gd->arch.tbl = now;
+ return (((unsigned long long)gd->arch.tbu) << 32) | gd->arch.tbl;
}
void __udelay(unsigned long usec)
@@ -126,5 +126,5 @@
*/
ulong get_tbclk(void)
{
- return gd->timer_rate_hz;
+ return gd->arch.timer_rate_hz;
}
diff --git a/arch/arm/cpu/arm920t/at91/clock.c b/arch/arm/cpu/arm920t/at91/clock.c
index 09d2799..696200d 100644
--- a/arch/arm/cpu/arm920t/at91/clock.c
+++ b/arch/arm/cpu/arm920t/at91/clock.c
@@ -29,11 +29,11 @@
case AT91_PMC_MCKR_CSS_SLOW:
return CONFIG_SYS_AT91_SLOW_CLOCK;
case AT91_PMC_MCKR_CSS_MAIN:
- return gd->main_clk_rate_hz;
+ return gd->arch.main_clk_rate_hz;
case AT91_PMC_MCKR_CSS_PLLA:
- return gd->plla_rate_hz;
+ return gd->arch.plla_rate_hz;
case AT91_PMC_MCKR_CSS_PLLB:
- return gd->pllb_rate_hz;
+ return gd->arch.pllb_rate_hz;
}
return 0;
@@ -124,10 +124,10 @@
main_clock = tmp * (CONFIG_SYS_AT91_SLOW_CLOCK / 16);
}
#endif
- gd->main_clk_rate_hz = main_clock;
+ gd->arch.main_clk_rate_hz = main_clock;
/* report if PLLA is more than mildly overclocked */
- gd->plla_rate_hz = at91_pll_rate(main_clock, readl(&pmc->pllar));
+ gd->arch.plla_rate_hz = at91_pll_rate(main_clock, readl(&pmc->pllar));
#ifdef CONFIG_USB_ATMEL
/*
@@ -136,9 +136,10 @@
*
* REVISIT: assumes MCK doesn't derive from PLLB!
*/
- gd->at91_pllb_usb_init = at91_pll_calc(main_clock, 48000000 * 2) |
+ gd->arch.at91_pllb_usb_init = at91_pll_calc(main_clock, 48000000 * 2) |
AT91_PMC_PLLBR_USBDIV_2;
- gd->pllb_rate_hz = at91_pll_rate(main_clock, gd->at91_pllb_usb_init);
+ gd->arch.pllb_rate_hz = at91_pll_rate(main_clock,
+ gd->arch.at91_pllb_usb_init);
#endif
/*
@@ -146,13 +147,14 @@
* For now, assume this parentage won't change.
*/
mckr = readl(&pmc->mckr);
- gd->mck_rate_hz = at91_css_to_rate(mckr & AT91_PMC_MCKR_CSS_MASK);
- freq = gd->mck_rate_hz;
+ gd->arch.mck_rate_hz = at91_css_to_rate(mckr & AT91_PMC_MCKR_CSS_MASK);
+ freq = gd->arch.mck_rate_hz;
freq /= (1 << ((mckr & AT91_PMC_MCKR_PRES_MASK) >> 2)); /* prescale */
/* mdiv */
- gd->mck_rate_hz = freq / (1 + ((mckr & AT91_PMC_MCKR_MDIV_MASK) >> 8));
- gd->cpu_clk_rate_hz = freq;
+ gd->arch.mck_rate_hz = freq /
+ (1 + ((mckr & AT91_PMC_MCKR_MDIV_MASK) >> 8));
+ gd->arch.cpu_clk_rate_hz = freq;
return 0;
}
diff --git a/arch/arm/cpu/arm920t/at91/timer.c b/arch/arm/cpu/arm920t/at91/timer.c
index 91607b5..8ce7584 100644
--- a/arch/arm/cpu/arm920t/at91/timer.c
+++ b/arch/arm/cpu/arm920t/at91/timer.c
@@ -63,8 +63,8 @@
writel(TIMER_LOAD_VAL, &tc->tc[0].rc);
writel(AT91_TC_CCR_SWTRG | AT91_TC_CCR_CLKEN, &tc->tc[0].ccr);
- gd->lastinc = 0;
- gd->tbl = 0;
+ gd->arch.lastinc = 0;
+ gd->arch.tbl = 0;
return 0;
}
@@ -89,16 +89,16 @@
now = readl(&tc->tc[0].cv) & 0x0000ffff;
- if (now >= gd->lastinc) {
+ if (now >= gd->arch.lastinc) {
/* normal mode */
- gd->tbl += now - gd->lastinc;
+ gd->arch.tbl += now - gd->arch.lastinc;
} else {
/* we have an overflow ... */
- gd->tbl += now + TIMER_LOAD_VAL - gd->lastinc;
+ gd->arch.tbl += now + TIMER_LOAD_VAL - gd->arch.lastinc;
}
- gd->lastinc = now;
+ gd->arch.lastinc = now;
- return gd->tbl;
+ return gd->arch.tbl;
}
ulong get_timer_masked(void)
diff --git a/arch/arm/cpu/arm920t/s3c24x0/timer.c b/arch/arm/cpu/arm920t/s3c24x0/timer.c
index d8668be..d76bf18 100644
--- a/arch/arm/cpu/arm920t/s3c24x0/timer.c
+++ b/arch/arm/cpu/arm920t/s3c24x0/timer.c
@@ -45,25 +45,25 @@
/* use PWM Timer 4 because it has no output */
/* prescaler for Timer 4 is 16 */
writel(0x0f00, &timers->tcfg0);
- if (gd->tbu == 0) {
+ if (gd->arch.tbu == 0) {
/*
* for 10 ms clock period @ PCLK with 4 bit divider = 1/2
* (default) and prescaler = 16. Should be 10390
* @33.25MHz and 15625 @ 50 MHz
*/
- gd->tbu = get_PCLK() / (2 * 16 * 100);
- gd->timer_rate_hz = get_PCLK() / (2 * 16);
+ gd->arch.tbu = get_PCLK() / (2 * 16 * 100);
+ gd->arch.timer_rate_hz = get_PCLK() / (2 * 16);
}
/* load value for 10 ms timeout */
- writel(gd->tbu, &timers->tcntb4);
+ writel(gd->arch.tbu, &timers->tcntb4);
/* auto load, manual update of timer 4 */
tmr = (readl(&timers->tcon) & ~0x0700000) | 0x0600000;
writel(tmr, &timers->tcon);
/* auto load, start timer 4 */
tmr = (tmr & ~0x0700000) | 0x0500000;
writel(tmr, &timers->tcon);
- gd->lastinc = 0;
- gd->tbl = 0;
+ gd->arch.lastinc = 0;
+ gd->arch.tbl = 0;
return 0;
}
@@ -82,7 +82,7 @@
ulong start = get_ticks();
tmo = usec / 1000;
- tmo *= (gd->tbu * 100);
+ tmo *= (gd->arch.tbu * 100);
tmo /= 1000;
while ((ulong) (get_ticks() - start) < tmo)
@@ -93,7 +93,7 @@
{
ulong tmr = get_ticks();
- return tmr / (gd->timer_rate_hz / CONFIG_SYS_HZ);
+ return tmr / (gd->arch.timer_rate_hz / CONFIG_SYS_HZ);
}
void udelay_masked(unsigned long usec)
@@ -104,10 +104,10 @@
if (usec >= 1000) {
tmo = usec / 1000;
- tmo *= (gd->tbu * 100);
+ tmo *= (gd->arch.tbu * 100);
tmo /= 1000;
} else {
- tmo = usec * (gd->tbu * 100);
+ tmo = usec * (gd->arch.tbu * 100);
tmo /= (1000 * 1000);
}
@@ -128,16 +128,16 @@
struct s3c24x0_timers *timers = s3c24x0_get_base_timers();
ulong now = readl(&timers->tcnto4) & 0xffff;
- if (gd->lastinc >= now) {
+ if (gd->arch.lastinc >= now) {
/* normal mode */
- gd->tbl += gd->lastinc - now;
+ gd->arch.tbl += gd->arch.lastinc - now;
} else {
/* we have an overflow ... */
- gd->tbl += gd->lastinc + gd->tbu - now;
+ gd->arch.tbl += gd->arch.lastinc + gd->arch.tbu - now;
}
- gd->lastinc = now;
+ gd->arch.lastinc = now;
- return gd->tbl;
+ return gd->arch.tbl;
}
/*
diff --git a/arch/arm/cpu/arm926ejs/armada100/timer.c b/arch/arm/cpu/arm926ejs/armada100/timer.c
index 355cd6d..948607f 100644
--- a/arch/arm/cpu/arm926ejs/armada100/timer.c
+++ b/arch/arm/cpu/arm926ejs/armada100/timer.c
@@ -61,7 +61,7 @@
#define COUNT_RD_REQ 0x1
DECLARE_GLOBAL_DATA_PTR;
-/* Using gd->tbu from timestamp and gd->tbl for lastdec */
+/* Using gd->arch.tbu from timestamp and gd->arch.tbl for lastdec */
/* For preventing risk of instability in reading counter value,
* first set read request to register cvwr and then read same
@@ -82,16 +82,16 @@
{
ulong now = read_timer();
- if (now >= gd->tbl) {
+ if (now >= gd->arch.tbl) {
/* normal mode */
- gd->tbu += now - gd->tbl;
+ gd->arch.tbu += now - gd->arch.tbl;
} else {
/* we have an overflow ... */
- gd->tbu += now + TIMER_LOAD_VAL - gd->tbl;
+ gd->arch.tbu += now + TIMER_LOAD_VAL - gd->arch.tbl;
}
- gd->tbl = now;
+ gd->arch.tbl = now;
- return gd->tbu;
+ return gd->arch.tbu;
}
ulong get_timer(ulong base)
@@ -135,9 +135,9 @@
/* Enable timer 0 */
writel(0x1, &armd1timers->cer);
- /* init the gd->tbu and gd->tbl value */
- gd->tbl = read_timer();
- gd->tbu = 0;
+ /* init the gd->arch.tbu and gd->arch.tbl value */
+ gd->arch.tbl = read_timer();
+ gd->arch.tbu = 0;
return 0;
}
diff --git a/arch/arm/cpu/arm926ejs/at91/clock.c b/arch/arm/cpu/arm926ejs/at91/clock.c
index dc5c6c4..f825388 100644
--- a/arch/arm/cpu/arm926ejs/at91/clock.c
+++ b/arch/arm/cpu/arm926ejs/at91/clock.c
@@ -29,11 +29,11 @@
case AT91_PMC_MCKR_CSS_SLOW:
return CONFIG_SYS_AT91_SLOW_CLOCK;
case AT91_PMC_MCKR_CSS_MAIN:
- return gd->main_clk_rate_hz;
+ return gd->arch.main_clk_rate_hz;
case AT91_PMC_MCKR_CSS_PLLA:
- return gd->plla_rate_hz;
+ return gd->arch.plla_rate_hz;
case AT91_PMC_MCKR_CSS_PLLB:
- return gd->pllb_rate_hz;
+ return gd->arch.pllb_rate_hz;
}
return 0;
@@ -132,10 +132,10 @@
main_clock = tmp * (CONFIG_SYS_AT91_SLOW_CLOCK / 16);
}
#endif
- gd->main_clk_rate_hz = main_clock;
+ gd->arch.main_clk_rate_hz = main_clock;
/* report if PLLA is more than mildly overclocked */
- gd->plla_rate_hz = at91_pll_rate(main_clock, readl(&pmc->pllar));
+ gd->arch.plla_rate_hz = at91_pll_rate(main_clock, readl(&pmc->pllar));
#ifdef CONFIG_USB_ATMEL
/*
@@ -144,9 +144,10 @@
*
* REVISIT: assumes MCK doesn't derive from PLLB!
*/
- gd->at91_pllb_usb_init = at91_pll_calc(main_clock, 48000000 * 2) |
+ gd->arch.at91_pllb_usb_init = at91_pll_calc(main_clock, 48000000 * 2) |
AT91_PMC_PLLBR_USBDIV_2;
- gd->pllb_rate_hz = at91_pll_rate(main_clock, gd->at91_pllb_usb_init);
+ gd->arch.pllb_rate_hz = at91_pll_rate(main_clock,
+ gd->arch.at91_pllb_usb_init);
#endif
/*
@@ -157,15 +158,15 @@
#if defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45) \
|| defined(CONFIG_AT91SAM9X5)
/* plla divisor by 2 */
- gd->plla_rate_hz /= (1 << ((mckr & 1 << 12) >> 12));
+ gd->arch.plla_rate_hz /= (1 << ((mckr & 1 << 12) >> 12));
#endif
- gd->mck_rate_hz = at91_css_to_rate(mckr & AT91_PMC_MCKR_CSS_MASK);
- freq = gd->mck_rate_hz;
+ gd->arch.mck_rate_hz = at91_css_to_rate(mckr & AT91_PMC_MCKR_CSS_MASK);
+ freq = gd->arch.mck_rate_hz;
freq /= (1 << ((mckr & AT91_PMC_MCKR_PRES_MASK) >> 2)); /* prescale */
#if defined(CONFIG_AT91SAM9G20)
/* mdiv ; (x >> 7) = ((x >> 8) * 2) */
- gd->mck_rate_hz = (mckr & AT91_PMC_MCKR_MDIV_MASK) ?
+ gd->arch.mck_rate_hz = (mckr & AT91_PMC_MCKR_MDIV_MASK) ?
freq / ((mckr & AT91_PMC_MCKR_MDIV_MASK) >> 7) : freq;
if (mckr & AT91_PMC_MCKR_MDIV_MASK)
freq /= 2; /* processor clock division */
@@ -177,14 +178,15 @@
* 2 <==> 4
* 3 <==> 3
*/
- gd->mck_rate_hz = (mckr & AT91_PMC_MCKR_MDIV_MASK) ==
+ gd->arch.mck_rate_hz = (mckr & AT91_PMC_MCKR_MDIV_MASK) ==
(AT91_PMC_MCKR_MDIV_2 | AT91_PMC_MCKR_MDIV_4)
? freq / 3
: freq / (1 << ((mckr & AT91_PMC_MCKR_MDIV_MASK) >> 8));
#else
- gd->mck_rate_hz = freq / (1 << ((mckr & AT91_PMC_MCKR_MDIV_MASK) >> 8));
+ gd->arch.mck_rate_hz = freq /
+ (1 << ((mckr & AT91_PMC_MCKR_MDIV_MASK) >> 8));
#endif
- gd->cpu_clk_rate_hz = freq;
+ gd->arch.cpu_clk_rate_hz = freq;
return 0;
}
diff --git a/arch/arm/cpu/arm926ejs/at91/timer.c b/arch/arm/cpu/arm926ejs/at91/timer.c
index f70ce83..4443fef 100644
--- a/arch/arm/cpu/arm926ejs/at91/timer.c
+++ b/arch/arm/cpu/arm926ejs/at91/timer.c
@@ -52,14 +52,14 @@
static inline unsigned long long tick_to_time(unsigned long long tick)
{
tick *= CONFIG_SYS_HZ;
- do_div(tick, gd->timer_rate_hz);
+ do_div(tick, gd->arch.timer_rate_hz);
return tick;
}
static inline unsigned long long usec_to_tick(unsigned long long usec)
{
- usec *= gd->timer_rate_hz;
+ usec *= gd->arch.timer_rate_hz;
do_div(usec, 1000000);
return usec;
@@ -79,8 +79,8 @@
/* Enable PITC */
writel(TIMER_LOAD_VAL | AT91_PIT_MR_EN , &pit->mr);
- gd->timer_rate_hz = gd->mck_rate_hz / 16;
- gd->tbu = gd->tbl = 0;
+ gd->arch.timer_rate_hz = gd->arch.mck_rate_hz / 16;
+ gd->arch.tbu = gd->arch.tbl = 0;
return 0;
}
@@ -95,10 +95,10 @@
ulong now = readl(&pit->piir);
/* increment tbu if tbl has rolled over */
- if (now < gd->tbl)
- gd->tbu++;
- gd->tbl = now;
- return (((unsigned long long)gd->tbu) << 32) | gd->tbl;
+ if (now < gd->arch.tbl)
+ gd->arch.tbu++;
+ gd->arch.tbl = now;
+ return (((unsigned long long)gd->arch.tbu) << 32) | gd->arch.tbl;
}
void __udelay(unsigned long usec)
@@ -132,5 +132,5 @@
*/
ulong get_tbclk(void)
{
- return gd->timer_rate_hz;
+ return gd->arch.timer_rate_hz;
}
diff --git a/arch/arm/cpu/arm926ejs/davinci/timer.c b/arch/arm/cpu/arm926ejs/davinci/timer.c
index 93c9e60..4142932 100644
--- a/arch/arm/cpu/arm926ejs/davinci/timer.c
+++ b/arch/arm/cpu/arm926ejs/davinci/timer.c
@@ -60,8 +60,8 @@
writel(0x0, &timer->tim34);
writel(TIMER_LOAD_VAL, &timer->prd34);
writel(2 << 22, &timer->tcr);
- gd->timer_rate_hz = CONFIG_SYS_HZ_CLOCK / TIM_CLK_DIV;
- gd->timer_reset_value = 0;
+ gd->arch.timer_rate_hz = CONFIG_SYS_HZ_CLOCK / TIM_CLK_DIV;
+ gd->arch.timer_reset_value = 0;
return(0);
}
@@ -74,27 +74,28 @@
unsigned long now = readl(&timer->tim34);
/* increment tbu if tbl has rolled over */
- if (now < gd->tbl)
- gd->tbu++;
- gd->tbl = now;
+ if (now < gd->arch.tbl)
+ gd->arch.tbu++;
+ gd->arch.tbl = now;
- return (((unsigned long long)gd->tbu) << 32) | gd->tbl;
+ return (((unsigned long long)gd->arch.tbu) << 32) | gd->arch.tbl;
}
ulong get_timer(ulong base)
{
unsigned long long timer_diff;
- timer_diff = get_ticks() - gd->timer_reset_value;
+ timer_diff = get_ticks() - gd->arch.timer_reset_value;
- return lldiv(timer_diff, (gd->timer_rate_hz / CONFIG_SYS_HZ)) - base;
+ return lldiv(timer_diff,
+ (gd->arch.timer_rate_hz / CONFIG_SYS_HZ)) - base;
}
void __udelay(unsigned long usec)
{
unsigned long long endtime;
- endtime = lldiv((unsigned long long)usec * gd->timer_rate_hz,
+ endtime = lldiv((unsigned long long)usec * gd->arch.timer_rate_hz,
1000000UL);
endtime += get_ticks();
@@ -108,7 +109,7 @@
*/
ulong get_tbclk(void)
{
- return gd->timer_rate_hz;
+ return gd->arch.timer_rate_hz;
}
#ifdef CONFIG_HW_WATCHDOG
diff --git a/arch/arm/cpu/arm926ejs/kirkwood/timer.c b/arch/arm/cpu/arm926ejs/kirkwood/timer.c
index f5d0160..85e81e3 100644
--- a/arch/arm/cpu/arm926ejs/kirkwood/timer.c
+++ b/arch/arm/cpu/arm926ejs/kirkwood/timer.c
@@ -86,8 +86,8 @@
DECLARE_GLOBAL_DATA_PTR;
-#define timestamp gd->tbl
-#define lastdec gd->lastinc
+#define timestamp gd->arch.tbl
+#define lastdec gd->arch.lastinc
ulong get_timer_masked(void)
{
diff --git a/arch/arm/cpu/arm926ejs/mb86r0x/timer.c b/arch/arm/cpu/arm926ejs/mb86r0x/timer.c
index 75314b9..c6486c1 100644
--- a/arch/arm/cpu/arm926ejs/mb86r0x/timer.c
+++ b/arch/arm/cpu/arm926ejs/mb86r0x/timer.c
@@ -35,8 +35,8 @@
DECLARE_GLOBAL_DATA_PTR;
-#define timestamp gd->tbl
-#define lastdec gd->lastinc
+#define timestamp gd->arch.tbl
+#define lastdec gd->arch.lastinc
static inline unsigned long long tick_to_time(unsigned long long tick)
{
diff --git a/arch/arm/cpu/arm926ejs/mx25/generic.c b/arch/arm/cpu/arm926ejs/mx25/generic.c
index b991418..679273b 100644
--- a/arch/arm/cpu/arm926ejs/mx25/generic.c
+++ b/arch/arm/cpu/arm926ejs/mx25/generic.c
@@ -229,9 +229,9 @@
{
#ifdef CONFIG_FSL_ESDHC
#if CONFIG_SYS_FSL_ESDHC_ADDR == IMX_MMC_SDHC2_BASE
- gd->sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
+ gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
#else
- gd->sdhc_clk = mxc_get_clock(MXC_ESDHC1_CLK);
+ gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC1_CLK);
#endif
#endif
return 0;
diff --git a/arch/arm/cpu/arm926ejs/mx25/timer.c b/arch/arm/cpu/arm926ejs/mx25/timer.c
index 4dc4041..f8bebcc 100644
--- a/arch/arm/cpu/arm926ejs/mx25/timer.c
+++ b/arch/arm/cpu/arm926ejs/mx25/timer.c
@@ -44,8 +44,8 @@
DECLARE_GLOBAL_DATA_PTR;
-#define timestamp (gd->tbl)
-#define lastinc (gd->lastinc)
+#define timestamp (gd->arch.tbl)
+#define lastinc (gd->arch.lastinc)
/*
* "time" is measured in 1 / CONFIG_SYS_HZ seconds,
diff --git a/arch/arm/cpu/arm926ejs/mx27/timer.c b/arch/arm/cpu/arm926ejs/mx27/timer.c
index a5dd684..07e132a 100644
--- a/arch/arm/cpu/arm926ejs/mx27/timer.c
+++ b/arch/arm/cpu/arm926ejs/mx27/timer.c
@@ -45,8 +45,8 @@
DECLARE_GLOBAL_DATA_PTR;
-#define timestamp (gd->tbl)
-#define lastinc (gd->lastinc)
+#define timestamp (gd->arch.tbl)
+#define lastinc (gd->arch.lastinc)
/*
* "time" is measured in 1 / CONFIG_SYS_HZ seconds,
diff --git a/arch/arm/cpu/arm926ejs/mxs/timer.c b/arch/arm/cpu/arm926ejs/mxs/timer.c
index 4ed75e6..3738411 100644
--- a/arch/arm/cpu/arm926ejs/mxs/timer.c
+++ b/arch/arm/cpu/arm926ejs/mxs/timer.c
@@ -36,8 +36,8 @@
DECLARE_GLOBAL_DATA_PTR;
-#define timestamp (gd->tbl)
-#define lastdec (gd->lastinc)
+#define timestamp (gd->arch.tbl)
+#define lastdec (gd->arch.lastinc)
/*
* This driver uses 1kHz clock source.
diff --git a/arch/arm/cpu/arm926ejs/omap/timer.c b/arch/arm/cpu/arm926ejs/omap/timer.c
index 390c9c8..34ec7b2 100644
--- a/arch/arm/cpu/arm926ejs/omap/timer.c
+++ b/arch/arm/cpu/arm926ejs/omap/timer.c
@@ -44,8 +44,8 @@
DECLARE_GLOBAL_DATA_PTR;
-#define timestamp gd->tbl
-#define lastdec gd->lastinc
+#define timestamp gd->arch.tbl
+#define lastdec gd->arch.lastinc
int timer_init (void)
{
diff --git a/arch/arm/cpu/arm926ejs/orion5x/timer.c b/arch/arm/cpu/arm926ejs/orion5x/timer.c
index 8a8aaf1..f723351 100644
--- a/arch/arm/cpu/arm926ejs/orion5x/timer.c
+++ b/arch/arm/cpu/arm926ejs/orion5x/timer.c
@@ -92,8 +92,8 @@
DECLARE_GLOBAL_DATA_PTR;
-#define timestamp gd->tbl
-#define lastdec gd->lastinc
+#define timestamp gd->arch.tbl
+#define lastdec gd->arch.lastinc
ulong get_timer_masked(void)
{
diff --git a/arch/arm/cpu/arm926ejs/pantheon/timer.c b/arch/arm/cpu/arm926ejs/pantheon/timer.c
index 28aadad..2d9ddba 100644
--- a/arch/arm/cpu/arm926ejs/pantheon/timer.c
+++ b/arch/arm/cpu/arm926ejs/pantheon/timer.c
@@ -60,7 +60,7 @@
#define COUNT_RD_REQ 0x1
DECLARE_GLOBAL_DATA_PTR;
-/* Using gd->tbu from timestamp and gd->tbl for lastdec */
+/* Using gd->arch.tbu from timestamp and gd->arch.tbl for lastdec */
/*
* For preventing risk of instability in reading counter value,
@@ -90,16 +90,16 @@
{
ulong now = read_timer();
- if (now >= gd->tbl) {
+ if (now >= gd->arch.tbl) {
/* normal mode */
- gd->tbu += now - gd->tbl;
+ gd->arch.tbu += now - gd->arch.tbl;
} else {
/* we have an overflow ... */
- gd->tbu += now + TIMER_LOAD_VAL - gd->tbl;
+ gd->arch.tbu += now + TIMER_LOAD_VAL - gd->arch.tbl;
}
- gd->tbl = now;
+ gd->arch.tbl = now;
- return gd->tbu;
+ return gd->arch.tbu;
}
ulong get_timer(ulong base)
@@ -144,9 +144,9 @@
/* Enable timer 0 */
writel(0x1, &panthtimers->cer);
- /* init the gd->tbu and gd->tbl value */
- gd->tbl = read_timer();
- gd->tbu = 0;
+ /* init the gd->arch.tbu and gd->arch.tbl value */
+ gd->arch.tbl = read_timer();
+ gd->arch.tbu = 0;
return 0;
}
diff --git a/arch/arm/cpu/arm926ejs/spear/timer.c b/arch/arm/cpu/arm926ejs/spear/timer.c
index 1dc7860..de4ba7b 100644
--- a/arch/arm/cpu/arm926ejs/spear/timer.c
+++ b/arch/arm/cpu/arm926ejs/spear/timer.c
@@ -38,8 +38,8 @@
DECLARE_GLOBAL_DATA_PTR;
-#define timestamp gd->tbl
-#define lastdec gd->lastinc
+#define timestamp gd->arch.tbl
+#define lastdec gd->arch.lastinc
int timer_init(void)
{
diff --git a/arch/arm/cpu/arm926ejs/versatile/timer.c b/arch/arm/cpu/arm926ejs/versatile/timer.c
index f58e151..b36d6d9 100644
--- a/arch/arm/cpu/arm926ejs/versatile/timer.c
+++ b/arch/arm/cpu/arm926ejs/versatile/timer.c
@@ -44,8 +44,8 @@
DECLARE_GLOBAL_DATA_PTR;
-#define timestamp gd->tbl
-#define lastdec gd->lastinc
+#define timestamp gd->arch.tbl
+#define lastdec gd->arch.lastinc
#define TIMER_ENABLE (1 << 7)
#define TIMER_MODE_MSK (1 << 6)
diff --git a/arch/arm/cpu/armv7/omap-common/timer.c b/arch/arm/cpu/armv7/omap-common/timer.c
index 9f8bc93..36bea5f 100644
--- a/arch/arm/cpu/armv7/omap-common/timer.c
+++ b/arch/arm/cpu/armv7/omap-common/timer.c
@@ -56,8 +56,9 @@
&timer_base->tclr);
/* reset time, capture current incrementer value time */
- gd->lastinc = readl(&timer_base->tcrr) / (TIMER_CLOCK / CONFIG_SYS_HZ);
- gd->tbl = 0; /* start "advancing" time stamp from 0 */
+ gd->arch.lastinc = readl(&timer_base->tcrr) /
+ (TIMER_CLOCK / CONFIG_SYS_HZ);
+ gd->arch.tbl = 0; /* start "advancing" time stamp from 0 */
return 0;
}
@@ -91,14 +92,15 @@
/* current tick value */
ulong now = readl(&timer_base->tcrr) / (TIMER_CLOCK / CONFIG_SYS_HZ);
- if (now >= gd->lastinc) /* normal mode (non roll) */
+ if (now >= gd->arch.lastinc) { /* normal mode (non roll) */
/* move stamp fordward with absoulte diff ticks */
- gd->tbl += (now - gd->lastinc);
- else /* we have rollover of incrementer */
- gd->tbl += ((TIMER_LOAD_VAL / (TIMER_CLOCK / CONFIG_SYS_HZ))
- - gd->lastinc) + now;
- gd->lastinc = now;
- return gd->tbl;
+ gd->arch.tbl += (now - gd->arch.lastinc);
+ } else { /* we have rollover of incrementer */
+ gd->arch.tbl += ((TIMER_LOAD_VAL / (TIMER_CLOCK /
+ CONFIG_SYS_HZ)) - gd->arch.lastinc) + now;
+ }
+ gd->arch.lastinc = now;
+ return gd->arch.tbl;
}
/*
diff --git a/arch/arm/cpu/armv7/s5p-common/timer.c b/arch/arm/cpu/armv7/s5p-common/timer.c
index bb0e795..e78c716 100644
--- a/arch/arm/cpu/armv7/s5p-common/timer.c
+++ b/arch/arm/cpu/armv7/s5p-common/timer.c
@@ -105,8 +105,8 @@
struct s5p_timer *const timer = s5p_get_base_timer();
/* reset time */
- gd->lastinc = readl(&timer->tcnto4);
- gd->tbl = 0;
+ gd->arch.lastinc = readl(&timer->tcnto4);
+ gd->arch.tbl = 0;
}
unsigned long get_timer_masked(void)
@@ -123,14 +123,14 @@
unsigned long now = readl(&timer->tcnto4);
unsigned long count_value = readl(&timer->tcntb4);
- if (gd->lastinc >= now)
- gd->tbl += gd->lastinc - now;
+ if (gd->arch.lastinc >= now)
+ gd->arch.tbl += gd->arch.lastinc - now;
else
- gd->tbl += gd->lastinc + count_value - now;
+ gd->arch.tbl += gd->arch.lastinc + count_value - now;
- gd->lastinc = now;
+ gd->arch.lastinc = now;
- return gd->tbl;
+ return gd->arch.tbl;
}
/*
diff --git a/arch/arm/cpu/armv7/socfpga/timer.c b/arch/arm/cpu/armv7/socfpga/timer.c
index 321e9b4..efa28c2 100644
--- a/arch/arm/cpu/armv7/socfpga/timer.c
+++ b/arch/arm/cpu/armv7/socfpga/timer.c
@@ -80,16 +80,16 @@
{
/* current tick value */
ulong now = read_timer() / (CONFIG_TIMER_CLOCK_KHZ/CONFIG_SYS_HZ);
- if (gd->lastinc >= now) {
+ if (gd->arch.lastinc >= now) {
/* normal mode (non roll) */
/* move stamp forward with absolute diff ticks */
- gd->tbl += gd->lastinc - now;
+ gd->arch.tbl += gd->arch.lastinc - now;
} else {
/* we have overflow of the count down timer */
- gd->tbl += TIMER_LOAD_VAL - gd->lastinc + now;
+ gd->arch.tbl += TIMER_LOAD_VAL - gd->arch.lastinc + now;
}
- gd->lastinc = now;
- return gd->tbl;
+ gd->arch.lastinc = now;
+ return gd->arch.tbl;
}
/*
@@ -98,7 +98,8 @@
void reset_timer(void)
{
/* capture current decrementer value time */
- gd->lastinc = read_timer() / (CONFIG_TIMER_CLOCK_KHZ/CONFIG_SYS_HZ);
+ gd->arch.lastinc = read_timer() /
+ (CONFIG_TIMER_CLOCK_KHZ / CONFIG_SYS_HZ);
/* start "advancing" time stamp from 0 */
- gd->tbl = 0;
+ gd->arch.tbl = 0;
}
diff --git a/arch/arm/cpu/armv7/u8500/timer.c b/arch/arm/cpu/armv7/u8500/timer.c
index 79aad99..a4b88f3 100644
--- a/arch/arm/cpu/armv7/u8500/timer.c
+++ b/arch/arm/cpu/armv7/u8500/timer.c
@@ -100,12 +100,14 @@
/* current tick value */
ulong now = TICKS_TO_HZ(READ_TIMER());
- if (now >= gd->lastinc) /* normal (non rollover) */
- gd->tbl += (now - gd->lastinc);
- else /* rollover */
- gd->tbl += (TICKS_TO_HZ(TIMER_LOAD_VAL) - gd->lastinc) + now;
- gd->lastinc = now;
- return gd->tbl;
+ if (now >= gd->arch.lastinc) { /* normal (non rollover) */
+ gd->arch.tbl += (now - gd->arch.lastinc);
+ } else { /* rollover */
+ gd->arch.tbl += (TICKS_TO_HZ(TIMER_LOAD_VAL) -
+ gd->arch.lastinc) + now;
+ }
+ gd->arch.lastinc = now;
+ return gd->arch.tbl;
}
/* Delay x useconds */
@@ -132,7 +134,7 @@
/*
* Emulation of Power architecture long long timebase.
*
- * TODO: Support gd->tbu for real long long timebase.
+ * TODO: Support gd->arch.tbu for real long long timebase.
*/
unsigned long long get_ticks(void)
{
diff --git a/arch/arm/cpu/armv7/zynq/timer.c b/arch/arm/cpu/armv7/zynq/timer.c
index 323e7b5..45b405a 100644
--- a/arch/arm/cpu/armv7/zynq/timer.c
+++ b/arch/arm/cpu/armv7/zynq/timer.c
@@ -83,9 +83,9 @@
emask);
/* Reset time */
- gd->lastinc = readl(&timer_base->counter) /
+ gd->arch.lastinc = readl(&timer_base->counter) /
(TIMER_TICK_HZ / CONFIG_SYS_HZ);
- gd->tbl = 0;
+ gd->arch.tbl = 0;
return 0;
}
@@ -100,16 +100,16 @@
now = readl(&timer_base->counter) / (TIMER_TICK_HZ / CONFIG_SYS_HZ);
- if (gd->lastinc >= now) {
+ if (gd->arch.lastinc >= now) {
/* Normal mode */
- gd->tbl += gd->lastinc - now;
+ gd->arch.tbl += gd->arch.lastinc - now;
} else {
/* We have an overflow ... */
- gd->tbl += gd->lastinc + TIMER_LOAD_VAL - now;
+ gd->arch.tbl += gd->arch.lastinc + TIMER_LOAD_VAL - now;
}
- gd->lastinc = now;
+ gd->arch.lastinc = now;
- return gd->tbl;
+ return gd->arch.tbl;
}
void __udelay(unsigned long usec)
diff --git a/arch/arm/cpu/ixp/timer.c b/arch/arm/cpu/ixp/timer.c
index 087ddf8..663d989 100644
--- a/arch/arm/cpu/ixp/timer.c
+++ b/arch/arm/cpu/ixp/timer.c
@@ -70,23 +70,23 @@
if (readl(IXP425_OSST) & IXP425_OSST_TIMER_TS_PEND) {
/* rollover of timestamp timer register */
- gd->timestamp += (0xFFFFFFFF - gd->lastinc) + now + 1;
+ gd->arch.timestamp += (0xFFFFFFFF - gd->arch.lastinc) + now + 1;
writel(IXP425_OSST_TIMER_TS_PEND, IXP425_OSST);
} else {
/* move stamp forward with absolut diff ticks */
- gd->timestamp += (now - gd->lastinc);
+ gd->arch.timestamp += (now - gd->arch.lastinc);
}
- gd->lastinc = now;
- return gd->timestamp;
+ gd->arch.lastinc = now;
+ return gd->arch.timestamp;
}
void reset_timer_masked(void)
{
/* capture current timestamp counter */
- gd->lastinc = readl(IXP425_OSTS_B);
+ gd->arch.lastinc = readl(IXP425_OSTS_B);
/* start "advancing" time stamp from 0 */
- gd->timestamp = 0;
+ gd->arch.timestamp = 0;
}
ulong get_timer_masked(void)
diff --git a/arch/arm/cpu/pxa/timer.c b/arch/arm/cpu/pxa/timer.c
index a8f7462..212b31e 100644
--- a/arch/arm/cpu/pxa/timer.c
+++ b/arch/arm/cpu/pxa/timer.c
@@ -31,8 +31,8 @@
#define TIMER_LOAD_VAL 0xffffffff
-#define timestamp (gd->tbl)
-#define lastinc (gd->lastinc)
+#define timestamp (gd->arch.tbl)
+#define lastinc (gd->arch.lastinc)
#if defined(CONFIG_CPU_PXA27X) || defined(CONFIG_CPU_MONAHANS)
#define TIMER_FREQ_HZ 3250000
diff --git a/arch/arm/cpu/tegra-common/timer.c b/arch/arm/cpu/tegra-common/timer.c
index 034ea5a..51902e9 100644
--- a/arch/arm/cpu/tegra-common/timer.c
+++ b/arch/arm/cpu/tegra-common/timer.c
@@ -75,14 +75,14 @@
/* current tick value */
now = timer_get_us() / (TIMER_CLK / CONFIG_SYS_HZ);
- if (now >= gd->lastinc) /* normal mode (non roll) */
+ if (now >= gd->arch.lastinc) /* normal mode (non roll) */
/* move stamp forward with absolute diff ticks */
- gd->tbl += (now - gd->lastinc);
+ gd->arch.tbl += (now - gd->arch.lastinc);
else /* we have rollover of incrementer */
- gd->tbl += ((TIMER_LOAD_VAL / (TIMER_CLK / CONFIG_SYS_HZ))
- - gd->lastinc) + now;
- gd->lastinc = now;
- return gd->tbl;
+ gd->arch.tbl += ((TIMER_LOAD_VAL / (TIMER_CLK / CONFIG_SYS_HZ))
+ - gd->arch.lastinc) + now;
+ gd->arch.lastinc = now;
+ return gd->arch.tbl;
}
/*
diff --git a/arch/arm/imx-common/speed.c b/arch/arm/imx-common/speed.c
index fbf4de3..638ee1a 100644
--- a/arch/arm/imx-common/speed.c
+++ b/arch/arm/imx-common/speed.c
@@ -37,23 +37,23 @@
#ifdef CONFIG_FSL_ESDHC
#ifdef CONFIG_FSL_USDHC
#if CONFIG_SYS_FSL_ESDHC_ADDR == USDHC2_BASE_ADDR
- gd->sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
+ gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
#elif CONFIG_SYS_FSL_ESDHC_ADDR == USDHC3_BASE_ADDR
- gd->sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
+ gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
#elif CONFIG_SYS_FSL_ESDHC_ADDR == USDHC4_BASE_ADDR
- gd->sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK);
+ gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK);
#else
- gd->sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
+ gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
#endif
#else
#if CONFIG_SYS_FSL_ESDHC_ADDR == MMC_SDHC2_BASE_ADDR
- gd->sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
+ gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
#elif CONFIG_SYS_FSL_ESDHC_ADDR == MMC_SDHC3_BASE_ADDR
- gd->sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
+ gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
#elif CONFIG_SYS_FSL_ESDHC_ADDR == MMC_SDHC4_BASE_ADDR
- gd->sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK);
+ gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK);
#else
- gd->sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
+ gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
#endif
#endif
#endif
diff --git a/arch/arm/imx-common/timer.c b/arch/arm/imx-common/timer.c
index b021903..ab37d64 100644
--- a/arch/arm/imx-common/timer.c
+++ b/arch/arm/imx-common/timer.c
@@ -48,8 +48,8 @@
DECLARE_GLOBAL_DATA_PTR;
-#define timestamp (gd->tbl)
-#define lastinc (gd->lastinc)
+#define timestamp (gd->arch.tbl)
+#define lastinc (gd->arch.lastinc)
static inline unsigned long long tick_to_time(unsigned long long tick)
{
diff --git a/arch/arm/include/asm/arch-at91/clk.h b/arch/arm/include/asm/arch-at91/clk.h
index 1e8522b..d4852a3 100644
--- a/arch/arm/include/asm/arch-at91/clk.h
+++ b/arch/arm/include/asm/arch-at91/clk.h
@@ -31,37 +31,37 @@
static inline unsigned long get_cpu_clk_rate(void)
{
DECLARE_GLOBAL_DATA_PTR;
- return gd->cpu_clk_rate_hz;
+ return gd->arch.cpu_clk_rate_hz;
}
static inline unsigned long get_main_clk_rate(void)
{
DECLARE_GLOBAL_DATA_PTR;
- return gd->main_clk_rate_hz;
+ return gd->arch.main_clk_rate_hz;
}
static inline unsigned long get_mck_clk_rate(void)
{
DECLARE_GLOBAL_DATA_PTR;
- return gd->mck_rate_hz;
+ return gd->arch.mck_rate_hz;
}
static inline unsigned long get_plla_clk_rate(void)
{
DECLARE_GLOBAL_DATA_PTR;
- return gd->plla_rate_hz;
+ return gd->arch.plla_rate_hz;
}
static inline unsigned long get_pllb_clk_rate(void)
{
DECLARE_GLOBAL_DATA_PTR;
- return gd->pllb_rate_hz;
+ return gd->arch.pllb_rate_hz;
}
static inline u32 get_pllb_init(void)
{
DECLARE_GLOBAL_DATA_PTR;
- return gd->at91_pllb_usb_init;
+ return gd->arch.at91_pllb_usb_init;
}
static inline unsigned long get_macb_pclk_rate(unsigned int dev_id)
diff --git a/arch/arm/include/asm/global_data.h b/arch/arm/include/asm/global_data.h
index 41a26ed..37ac0da 100644
--- a/arch/arm/include/asm/global_data.h
+++ b/arch/arm/include/asm/global_data.h
@@ -23,27 +23,11 @@
#ifndef __ASM_GBL_DATA_H
#define __ASM_GBL_DATA_H
-/*
- * The following data structure is placed in some memory which is
- * available very early after boot (like DPRAM on MPC8xx/MPC82xx, or
- * some locked parts of the data cache) to allow for a minimum set of
- * global variables during system initialization (until we have set
- * up the memory controller so that we can use RAM).
- */
-typedef struct global_data {
- bd_t *bd;
- unsigned long flags;
- unsigned int baudrate;
- unsigned long have_console; /* serial_init() was called */
-#ifdef CONFIG_PRE_CONSOLE_BUFFER
- unsigned long precon_buf_idx; /* Pre-Console buffer index */
-#endif
- unsigned long env_addr; /* Address of Environment struct */
- unsigned long env_valid; /* Checksum of Environment valid? */
- unsigned long fb_base; /* base address of frame buffer */
-#ifdef CONFIG_FSL_ESDHC
- unsigned long sdhc_clk;
+/* Architecture-specific global data */
+struct arch_global_data {
+#if defined(CONFIG_FSL_ESDHC)
+ u32 sdhc_clk;
#endif
#ifdef CONFIG_AT91FAMILY
/* "static data" needed by at91's clock.c */
@@ -54,38 +38,22 @@
unsigned long pllb_rate_hz;
unsigned long at91_pllb_usb_init;
#endif
-#ifdef CONFIG_ARM
/* "static data" needed by most of timer.c on ARM platforms */
- unsigned long timer_rate_hz;
- unsigned long tbl;
- unsigned long tbu;
- unsigned long long timer_reset_value;
- unsigned long lastinc;
-#endif
+ unsigned long timer_rate_hz;
+ unsigned long tbu;
+ unsigned long tbl;
+ unsigned long lastinc;
+ unsigned long long timer_reset_value;
#ifdef CONFIG_IXP425
- unsigned long timestamp;
+ unsigned long timestamp;
#endif
- unsigned long relocaddr; /* Start address of U-Boot in RAM */
- phys_size_t ram_size; /* RAM size */
- unsigned long mon_len; /* monitor len */
- unsigned long irq_sp; /* irq stack pointer */
- unsigned long start_addr_sp; /* start_addr_stackpointer */
- unsigned long reloc_off;
#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
- unsigned long tlb_addr;
- unsigned long tlb_size;
+ unsigned long tlb_addr;
+ unsigned long tlb_size;
#endif
- const void *fdt_blob; /* Our device tree, NULL if none */
- void **jt; /* jump table */
- char env_buf[32]; /* buffer for getenv() before reloc. */
-#if defined(CONFIG_POST) || defined(CONFIG_LOGBUFFER)
- unsigned long post_log_word; /* Record POST activities */
- unsigned long post_log_res; /* success of POST test */
- unsigned long post_init_f_time; /* When post_init_f started */
-#endif
-} gd_t;
+};
-#include <asm-generic/global_data_flags.h>
+#include <asm-generic/global_data.h>
#define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("r8")
diff --git a/arch/arm/lib/board.c b/arch/arm/lib/board.c
index 9f861cc..162e2cc 100644
--- a/arch/arm/lib/board.c
+++ b/arch/arm/lib/board.c
@@ -355,14 +355,14 @@
#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
/* reserve TLB table */
- gd->tlb_size = 4096 * 4;
- addr -= gd->tlb_size;
+ gd->arch.tlb_size = 4096 * 4;
+ addr -= gd->arch.tlb_size;
/* round down to next 64 kB limit */
addr &= ~(0x10000 - 1);
- gd->tlb_addr = addr;
- debug("TLB table from %08lx to %08lx\n", addr, addr + gd->tlb_size);
+ gd->arch.tlb_addr = addr;
+ debug("TLB table from %08lx to %08lx\n", addr, addr + gd->arch.tlb_size);
#endif
/* round down to next 4 kB limit */
diff --git a/arch/arm/lib/cache-cp15.c b/arch/arm/lib/cache-cp15.c
index 1cab27c..b6e5e95 100644
--- a/arch/arm/lib/cache-cp15.c
+++ b/arch/arm/lib/cache-cp15.c
@@ -46,7 +46,7 @@
void set_section_dcache(int section, enum dcache_option option)
{
- u32 *page_table = (u32 *)gd->tlb_addr;
+ u32 *page_table = (u32 *)gd->arch.tlb_addr;
u32 value;
value = (section << MMU_SECTION_SHIFT) | (3 << 10);
@@ -65,7 +65,7 @@
void mmu_set_region_dcache_behaviour(u32 start, int size,
enum dcache_option option)
{
- u32 *page_table = (u32 *)gd->tlb_addr;
+ u32 *page_table = (u32 *)gd->arch.tlb_addr;
u32 upto, end;
end = ALIGN(start + size, MMU_SECTION_SIZE) >> MMU_SECTION_SHIFT;
@@ -111,7 +111,7 @@
/* Copy the page table address to cp15 */
asm volatile("mcr p15, 0, %0, c2, c0, 0"
- : : "r" (gd->tlb_addr) : "memory");
+ : : "r" (gd->arch.tlb_addr) : "memory");
/* Set the access control to all-supervisor */
asm volatile("mcr p15, 0, %0, c3, c0, 0"
: : "r" (~0));
diff --git a/arch/avr32/cpu/cpu.c b/arch/avr32/cpu/cpu.c
index 7907837..9d82ca4 100644
--- a/arch/avr32/cpu/cpu.c
+++ b/arch/avr32/cpu/cpu.c
@@ -47,7 +47,7 @@
{
extern void _evba(void);
- gd->cpu_hz = CONFIG_SYS_OSC0_HZ;
+ gd->arch.cpu_hz = CONFIG_SYS_OSC0_HZ;
/* TODO: Move somewhere else, but needs to be run before we
* increase the clock frequency. */
@@ -59,7 +59,7 @@
clk_init();
/* Update the CPU speed according to the PLL configuration */
- gd->cpu_hz = get_cpu_clk_rate();
+ gd->arch.cpu_hz = get_cpu_clk_rate();
/* Set up the exception handler table and enable exceptions */
sysreg_write(EVBA, (unsigned long)&_evba);
diff --git a/arch/avr32/cpu/exception.c b/arch/avr32/cpu/exception.c
index b21ef1f..828fc00 100644
--- a/arch/avr32/cpu/exception.c
+++ b/arch/avr32/cpu/exception.c
@@ -112,11 +112,11 @@
printf("CPU Mode: %s\n", cpu_modes[mode]);
/* Avoid exception loops */
- if (regs->sp < (gd->stack_end - CONFIG_STACKSIZE)
- || regs->sp >= gd->stack_end)
+ if (regs->sp < (gd->arch.stack_end - CONFIG_STACKSIZE)
+ || regs->sp >= gd->arch.stack_end)
printf("\nStack pointer seems bogus, won't do stack dump\n");
else
- dump_mem("\nStack: ", regs->sp, gd->stack_end);
+ dump_mem("\nStack: ", regs->sp, gd->arch.stack_end);
panic("Unhandled exception\n");
}
diff --git a/arch/avr32/cpu/interrupts.c b/arch/avr32/cpu/interrupts.c
index 49a00f1..d87c6e1 100644
--- a/arch/avr32/cpu/interrupts.c
+++ b/arch/avr32/cpu/interrupts.c
@@ -46,7 +46,7 @@
unsigned long get_tbclk(void)
{
- return gd->cpu_hz;
+ return gd->arch.cpu_hz;
}
unsigned long long get_ticks(void)
@@ -115,8 +115,8 @@
sysreg_write(COUNT, 0);
tmp = (u64)CONFIG_SYS_HZ << 32;
- tmp += gd->cpu_hz / 2;
- do_div(tmp, gd->cpu_hz);
+ tmp += gd->arch.cpu_hz / 2;
+ do_div(tmp, gd->arch.cpu_hz);
tb_factor = (u32)tmp;
if (set_interrupt_handler(0, &timer_interrupt_handler, 3))
diff --git a/arch/avr32/include/asm/global_data.h b/arch/avr32/include/asm/global_data.h
index bf661e2..a71f199 100644
--- a/arch/avr32/include/asm/global_data.h
+++ b/arch/avr32/include/asm/global_data.h
@@ -22,35 +22,13 @@
#ifndef __ASM_GLOBAL_DATA_H__
#define __ASM_GLOBAL_DATA_H__
-/*
- * The following data structure is placed in some memory wich is
- * available very early after boot (like DPRAM on MPC8xx/MPC82xx, or
- * some locked parts of the data cache) to allow for a minimum set of
- * global variables during system initialization (until we have set
- * up the memory controller so that we can use RAM).
- */
+/* Architecture-specific global data */
+struct arch_global_data {
+ unsigned long stack_end; /* highest stack address */
+ unsigned long cpu_hz; /* cpu core clock frequency */
+};
-typedef struct global_data {
- bd_t *bd;
- unsigned long flags;
- unsigned int baudrate;
- unsigned long stack_end; /* highest stack address */
- unsigned long have_console; /* serial_init() was called */
-#ifdef CONFIG_PRE_CONSOLE_BUFFER
- unsigned long precon_buf_idx; /* Pre-Console buffer index */
-#endif
- unsigned long reloc_off; /* Relocation Offset */
- unsigned long env_addr; /* Address of env struct */
- unsigned long env_valid; /* Checksum of env valid? */
- unsigned long cpu_hz; /* cpu core clock frequency */
-#if defined(CONFIG_LCD)
- void *fb_base; /* framebuffer address */
-#endif
- void **jt; /* jump table */
- char env_buf[32]; /* buffer for getenv() before reloc. */
-} gd_t;
-
-#include <asm-generic/global_data_flags.h>
+#include <asm-generic/global_data.h>
#define DECLARE_GLOBAL_DATA_PTR register gd_t *gd asm("r5")
diff --git a/arch/avr32/lib/board.c b/arch/avr32/lib/board.c
index e3287c4..d3c8cb7 100644
--- a/arch/avr32/lib/board.c
+++ b/arch/avr32/lib/board.c
@@ -231,7 +231,7 @@
/* And finally, a new, bigger stack. */
new_sp = (unsigned long *)addr;
- gd->stack_end = addr;
+ gd->arch.stack_end = addr;
*(--new_sp) = 0;
*(--new_sp) = 0;
diff --git a/arch/avr32/lib/bootm.c b/arch/avr32/lib/bootm.c
index 74ebeca..87f3f9c 100644
--- a/arch/avr32/lib/bootm.c
+++ b/arch/avr32/lib/bootm.c
@@ -109,7 +109,7 @@
params->hdr.size = tag_size(tag_clock);
params->u.clock.clock_id = ACLOCK_BOOTCPU;
params->u.clock.clock_flags = 0;
- params->u.clock.clock_hz = gd->cpu_hz;
+ params->u.clock.clock_hz = gd->arch.cpu_hz;
#ifdef CONFIG_AT32AP7000
/*
diff --git a/arch/blackfin/include/asm/global_data.h b/arch/blackfin/include/asm/global_data.h
index d91e5a4..c2c4d4d 100644
--- a/arch/blackfin/include/asm/global_data.h
+++ b/arch/blackfin/include/asm/global_data.h
@@ -30,36 +30,11 @@
#include <asm/u-boot.h>
-/*
- * The following data structure is placed in some memory wich is
- * available very early after boot (like DPRAM on MPC8xx/MPC82xx, or
- * some locked parts of the data cache) to allow for a minimum set of
- * global variables during system initialization (until we have set
- * up the memory controller so that we can use RAM).
- */
-typedef struct global_data {
- bd_t *bd;
- unsigned long flags;
- unsigned long board_type;
- unsigned int baudrate;
- unsigned long have_console; /* serial_init() was called */
-#ifdef CONFIG_PRE_CONSOLE_BUFFER
- unsigned long precon_buf_idx; /* Pre-Console buffer index */
-#endif
- phys_size_t ram_size; /* RAM size */
- unsigned long env_addr; /* Address of Environment struct */
- unsigned long env_valid; /* Checksum of Environment valid? */
-#if defined(CONFIG_POST) || defined(CONFIG_LOGBUFFER)
- unsigned long post_log_word; /* Record POST activities */
- unsigned long post_log_res; /* success of POST test */
- unsigned long post_init_f_time; /* When post_init_f started */
-#endif
+/* Architecture-specific global data */
+struct arch_global_data {
+};
- void **jt; /* jump table */
- char env_buf[32]; /* buffer for getenv() before reloc. */
-} gd_t;
-
-#include <asm-generic/global_data_flags.h>
+#include <asm-generic/global_data.h>
#define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("P3")
diff --git a/arch/m68k/cpu/mcf5227x/cpu.c b/arch/m68k/cpu/mcf5227x/cpu.c
index 3a0ab97..705bd44 100644
--- a/arch/m68k/cpu/mcf5227x/cpu.c
+++ b/arch/m68k/cpu/mcf5227x/cpu.c
@@ -68,10 +68,10 @@
printf(" CPU CLK %s MHz BUS CLK %s MHz FLB CLK %s MHz\n",
strmhz(buf1, gd->cpu_clk),
strmhz(buf2, gd->bus_clk),
- strmhz(buf3, gd->flb_clk));
+ strmhz(buf3, gd->arch.flb_clk));
printf(" INP CLK %s MHz VCO CLK %s MHz\n",
- strmhz(buf1, gd->inp_clk),
- strmhz(buf2, gd->vco_clk));
+ strmhz(buf1, gd->arch.inp_clk),
+ strmhz(buf2, gd->arch.vco_clk));
}
return 0;
diff --git a/arch/m68k/cpu/mcf5227x/speed.c b/arch/m68k/cpu/mcf5227x/speed.c
index b94a9ed..98f554a 100644
--- a/arch/m68k/cpu/mcf5227x/speed.c
+++ b/arch/m68k/cpu/mcf5227x/speed.c
@@ -114,28 +114,28 @@
((in_be32(&pll->pcr) & 0xFF000000) >> 24) *
CONFIG_SYS_INPUT_CLKSRC;
}
- gd->vco_clk = vco; /* Vco clock */
+ gd->arch.vco_clk = vco; /* Vco clock */
} else if (bootmode == 3) {
/* serial mode */
vco = ((in_be32(&pll->pcr) & 0xFF000000) >> 24) * CONFIG_SYS_INPUT_CLKSRC;
- gd->vco_clk = vco; /* Vco clock */
+ gd->arch.vco_clk = vco; /* Vco clock */
}
if ((in_be16(&ccm->ccr) & CCM_MISCCR_LIMP) == CCM_MISCCR_LIMP) {
/* Limp mode */
} else {
- gd->inp_clk = CONFIG_SYS_INPUT_CLKSRC; /* Input clock */
+ gd->arch.inp_clk = CONFIG_SYS_INPUT_CLKSRC; /* Input clock */
temp = (in_be32(&pll->pcr) & PLL_PCR_OUTDIV1_MASK) + 1;
gd->cpu_clk = vco / temp; /* cpu clock */
temp = ((in_be32(&pll->pcr) & PLL_PCR_OUTDIV2_MASK) >> 4) + 1;
- gd->flb_clk = vco / temp; /* flexbus clock */
- gd->bus_clk = gd->flb_clk;
+ gd->arch.flb_clk = vco / temp; /* flexbus clock */
+ gd->bus_clk = gd->arch.flb_clk;
}
#ifdef CONFIG_FSL_I2C
- gd->i2c1_clk = gd->bus_clk;
+ gd->arch.i2c1_clk = gd->bus_clk;
#endif
return (0);
diff --git a/arch/m68k/cpu/mcf523x/speed.c b/arch/m68k/cpu/mcf523x/speed.c
index e2a6ae3..ae46257 100644
--- a/arch/m68k/cpu/mcf523x/speed.c
+++ b/arch/m68k/cpu/mcf523x/speed.c
@@ -48,7 +48,7 @@
gd->cpu_clk = (gd->bus_clk * 2);
#ifdef CONFIG_FSL_I2C
- gd->i2c1_clk = gd->bus_clk;
+ gd->arch.i2c1_clk = gd->bus_clk;
#endif
return (0);
diff --git a/arch/m68k/cpu/mcf52x2/speed.c b/arch/m68k/cpu/mcf52x2/speed.c
index 70abed2..ba7dbaa 100644
--- a/arch/m68k/cpu/mcf52x2/speed.c
+++ b/arch/m68k/cpu/mcf52x2/speed.c
@@ -91,9 +91,9 @@
#endif
#ifdef CONFIG_FSL_I2C
- gd->i2c1_clk = gd->bus_clk;
+ gd->arch.i2c1_clk = gd->bus_clk;
#ifdef CONFIG_SYS_I2C2_OFFSET
- gd->i2c2_clk = gd->bus_clk;
+ gd->arch.i2c2_clk = gd->bus_clk;
#endif
#endif
diff --git a/arch/m68k/cpu/mcf532x/speed.c b/arch/m68k/cpu/mcf532x/speed.c
index cfdcc8b..8efb451 100644
--- a/arch/m68k/cpu/mcf532x/speed.c
+++ b/arch/m68k/cpu/mcf532x/speed.c
@@ -271,7 +271,7 @@
gd->cpu_clk = (gd->bus_clk * 3);
#ifdef CONFIG_FSL_I2C
- gd->i2c1_clk = gd->bus_clk;
+ gd->arch.i2c1_clk = gd->bus_clk;
#endif
return (0);
diff --git a/arch/m68k/cpu/mcf5445x/cpu.c b/arch/m68k/cpu/mcf5445x/cpu.c
index b612cda..08930f4 100644
--- a/arch/m68k/cpu/mcf5445x/cpu.c
+++ b/arch/m68k/cpu/mcf5445x/cpu.c
@@ -101,16 +101,16 @@
printf(" CPU CLK %s MHz BUS CLK %s MHz FLB CLK %s MHz\n",
strmhz(buf1, gd->cpu_clk),
strmhz(buf2, gd->bus_clk),
- strmhz(buf3, gd->flb_clk));
+ strmhz(buf3, gd->arch.flb_clk));
#ifdef CONFIG_PCI
printf(" PCI CLK %s MHz INP CLK %s MHz VCO CLK %s MHz\n",
strmhz(buf1, gd->pci_clk),
- strmhz(buf2, gd->inp_clk),
- strmhz(buf3, gd->vco_clk));
+ strmhz(buf2, gd->arch.inp_clk),
+ strmhz(buf3, gd->arch.vco_clk));
#else
printf(" INP CLK %s MHz VCO CLK %s MHz\n",
- strmhz(buf1, gd->inp_clk),
- strmhz(buf2, gd->vco_clk));
+ strmhz(buf1, gd->arch.inp_clk),
+ strmhz(buf2, gd->arch.vco_clk));
#endif
}
diff --git a/arch/m68k/cpu/mcf5445x/speed.c b/arch/m68k/cpu/mcf5445x/speed.c
index 55d1c48..aa73e1f 100644
--- a/arch/m68k/cpu/mcf5445x/speed.c
+++ b/arch/m68k/cpu/mcf5445x/speed.c
@@ -233,7 +233,7 @@
out_be32(&pll->pcr, pcrvalue);
}
- gd->vco_clk = vco; /* Vco clock */
+ gd->arch.vco_clk = vco; /* Vco clock */
} else if (bootmode == 2) {
/* Normal mode */
vco = ((in_be32(&pll->pcr) & 0xFF000000) >> 24) * CONFIG_SYS_INPUT_CLKSRC;
@@ -244,17 +244,17 @@
out_be32(&pll->pcr, pcrvalue);
vco = ((in_be32(&pll->pcr) & 0xFF000000) >> 24) * CONFIG_SYS_INPUT_CLKSRC;
}
- gd->vco_clk = vco; /* Vco clock */
+ gd->arch.vco_clk = vco; /* Vco clock */
} else if (bootmode == 3) {
/* serial mode */
vco = ((in_be32(&pll->pcr) & 0xFF000000) >> 24) * CONFIG_SYS_INPUT_CLKSRC;
- gd->vco_clk = vco; /* Vco clock */
+ gd->arch.vco_clk = vco; /* Vco clock */
}
if ((in_be16(&ccm->ccr) & CCM_MISCCR_LIMP) == CCM_MISCCR_LIMP) {
/* Limp mode */
} else {
- gd->inp_clk = CONFIG_SYS_INPUT_CLKSRC; /* Input clock */
+ gd->arch.inp_clk = CONFIG_SYS_INPUT_CLKSRC; /* Input clock */
temp = (in_be32(&pll->pcr) & PLL_PCR_OUTDIV1_MASK) + 1;
gd->cpu_clk = vco / temp; /* cpu clock */
@@ -263,7 +263,7 @@
gd->bus_clk = vco / temp; /* bus clock */
temp = ((in_be32(&pll->pcr) & PLL_PCR_OUTDIV3_MASK) >> 8) + 1;
- gd->flb_clk = vco / temp; /* FlexBus clock */
+ gd->arch.flb_clk = vco / temp; /* FlexBus clock */
#ifdef CONFIG_PCI
if (bPci) {
@@ -274,7 +274,7 @@
}
#ifdef CONFIG_FSL_I2C
- gd->i2c1_clk = gd->bus_clk;
+ gd->arch.i2c1_clk = gd->bus_clk;
#endif
}
#endif
@@ -290,7 +290,7 @@
#endif
#ifdef CONFIG_FSL_I2C
- gd->i2c1_clk = gd->bus_clk;
+ gd->arch.i2c1_clk = gd->bus_clk;
#endif
return (0);
diff --git a/arch/m68k/cpu/mcf547x_8x/speed.c b/arch/m68k/cpu/mcf547x_8x/speed.c
index 31130b5..41aae9d 100644
--- a/arch/m68k/cpu/mcf547x_8x/speed.c
+++ b/arch/m68k/cpu/mcf547x_8x/speed.c
@@ -41,7 +41,7 @@
gd->cpu_clk = (gd->bus_clk * 2);
#ifdef CONFIG_FSL_I2C
- gd->i2c1_clk = gd->bus_clk;
+ gd->arch.i2c1_clk = gd->bus_clk;
#endif
return (0);
diff --git a/arch/m68k/include/asm/global_data.h b/arch/m68k/include/asm/global_data.h
index 0cdb11c..3ec298f 100644
--- a/arch/m68k/include/asm/global_data.h
+++ b/arch/m68k/include/asm/global_data.h
@@ -23,52 +23,21 @@
#ifndef __ASM_GBL_DATA_H
#define __ASM_GBL_DATA_H
-/*
- * The following data structure is placed in some memory wich is
- * available very early after boot (like DPRAM on MPC8xx/MPC82xx, or
- * some locked parts of the data cache) to allow for a minimum set of
- * global variables during system initialization (until we have set
- * up the memory controller so that we can use RAM).
- */
-typedef struct global_data {
- bd_t *bd;
- unsigned long flags;
- unsigned int baudrate;
- unsigned long cpu_clk; /* CPU clock in Hz! */
- unsigned long bus_clk;
-#ifdef CONFIG_PCI
- unsigned long pci_clk;
-#endif
-#ifdef CONFIG_EXTRA_CLOCK
- unsigned long inp_clk;
- unsigned long vco_clk;
- unsigned long flb_clk;
-#endif
+/* Architecture-specific global data */
+struct arch_global_data {
#ifdef CONFIG_FSL_I2C
unsigned long i2c1_clk;
unsigned long i2c2_clk;
#endif
- phys_size_t ram_size; /* RAM size */
- unsigned long reloc_off; /* Relocation Offset */
- unsigned long reset_status; /* reset status register at boot */
- unsigned long env_addr; /* Address of Environment struct */
- unsigned long env_valid; /* Checksum of Environment valid? */
- unsigned long have_console; /* serial_init() was called */
-#ifdef CONFIG_PRE_CONSOLE_BUFFER
- unsigned long precon_buf_idx; /* Pre-Console buffer index */
+#ifdef CONFIG_EXTRA_CLOCK
+ unsigned long inp_clk;
+ unsigned long vco_clk;
+ unsigned long flb_clk;
#endif
-#if defined(CONFIG_LCD) || defined(CONFIG_VIDEO)
- unsigned long fb_base; /* Base addr of framebuffer memory */
-#endif
-#ifdef CONFIG_BOARD_TYPES
- unsigned long board_type;
-#endif
- void **jt; /* Standalone app jump table */
- char env_buf[32]; /* buffer for getenv() before reloc. */
-} gd_t;
+};
-#include <asm-generic/global_data_flags.h>
+#include <asm-generic/global_data.h>
#if 0
extern gd_t *global_data;
diff --git a/arch/m68k/lib/board.c b/arch/m68k/lib/board.c
index e934cb6..c372ae2 100644
--- a/arch/m68k/lib/board.c
+++ b/arch/m68k/lib/board.c
@@ -349,9 +349,9 @@
bd->bi_pcifreq = gd->pci_clk; /* PCI Freq in Hz */
#endif
#ifdef CONFIG_EXTRA_CLOCK
- bd->bi_inpfreq = gd->inp_clk; /* input Freq in Hz */
- bd->bi_vcofreq = gd->vco_clk; /* vco Freq in Hz */
- bd->bi_flbfreq = gd->flb_clk; /* flexbus Freq in Hz */
+ bd->bi_inpfreq = gd->arch.inp_clk; /* input Freq in Hz */
+ bd->bi_vcofreq = gd->arch.vco_clk; /* vco Freq in Hz */
+ bd->bi_flbfreq = gd->arch.flb_clk; /* flexbus Freq in Hz */
#endif
bd->bi_baudrate = gd->baudrate; /* Console Baudrate */
diff --git a/arch/microblaze/include/asm/global_data.h b/arch/microblaze/include/asm/global_data.h
index 2111c7c..89dcef7 100644
--- a/arch/microblaze/include/asm/global_data.h
+++ b/arch/microblaze/include/asm/global_data.h
@@ -24,31 +24,12 @@
#ifndef __ASM_GBL_DATA_H
#define __ASM_GBL_DATA_H
-/*
- * The following data structure is placed in some memory wich is
- * available very early after boot (like DPRAM on MPC8xx/MPC82xx, or
- * some locked parts of the data cache) to allow for a minimum set of
- * global variables during system initialization (until we have set
- * up the memory controller so that we can use RAM).
- */
-typedef struct global_data {
- bd_t *bd;
- unsigned long flags;
- unsigned int baudrate;
- unsigned long have_console; /* serial_init() was called */
-#ifdef CONFIG_PRE_CONSOLE_BUFFER
- unsigned long precon_buf_idx; /* Pre-Console buffer index */
-#endif
- unsigned long env_addr; /* Address of Environment struct */
- const void *fdt_blob; /* Our device tree, NULL if none */
- unsigned long env_valid; /* Checksum of Environment valid? */
- unsigned long fb_base; /* base address of frame buffer */
- void **jt; /* jump table */
- char env_buf[32]; /* buffer for getenv() before reloc. */
-} gd_t;
+/* Architecture-specific global data */
+struct arch_global_data {
+};
-#include <asm-generic/global_data_flags.h>
+#include <asm-generic/global_data.h>
#define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("r31")
diff --git a/arch/mips/cpu/xburst/timer.c b/arch/mips/cpu/xburst/timer.c
index b6b3855..8c33d3c 100644
--- a/arch/mips/cpu/xburst/timer.c
+++ b/arch/mips/cpu/xburst/timer.c
@@ -34,24 +34,24 @@
void reset_timer_masked(void)
{
/* reset time */
- gd->lastinc = readl(&tcu->tcnt0);
- gd->tbl = 0;
+ gd->arch.lastinc = readl(&tcu->tcnt0);
+ gd->arch.tbl = 0;
}
ulong get_timer_masked(void)
{
ulong now = readl(&tcu->tcnt0);
- if (gd->lastinc <= now)
- gd->tbl += now - gd->lastinc; /* normal mode */
+ if (gd->arch.lastinc <= now)
+ gd->arch.tbl += now - gd->arch.lastinc; /* normal mode */
else {
/* we have an overflow ... */
- gd->tbl += TIMER_FDATA + now - gd->lastinc;
+ gd->arch.tbl += TIMER_FDATA + now - gd->arch.lastinc;
}
- gd->lastinc = now;
+ gd->arch.lastinc = now;
- return gd->tbl;
+ return gd->arch.tbl;
}
void udelay_masked(unsigned long usec)
@@ -94,8 +94,8 @@
writel(1 << TIMER_CHAN, &tcu->tscr); /* enable timer clock */
writeb(1 << TIMER_CHAN, &tcu->tesr); /* start counting up */
- gd->lastinc = 0;
- gd->tbl = 0;
+ gd->arch.lastinc = 0;
+ gd->arch.tbl = 0;
return 0;
}
@@ -112,7 +112,7 @@
void set_timer(ulong t)
{
- gd->tbl = t;
+ gd->arch.tbl = t;
}
void __udelay(unsigned long usec)
diff --git a/arch/mips/include/asm/global_data.h b/arch/mips/include/asm/global_data.h
index a735a8a..b39737f 100644
--- a/arch/mips/include/asm/global_data.h
+++ b/arch/mips/include/asm/global_data.h
@@ -26,42 +26,16 @@
#include <asm/regdef.h>
-/*
- * The following data structure is placed in some memory wich is
- * available very early after boot (like DPRAM on MPC8xx/MPC82xx, or
- * some locked parts of the data cache) to allow for a minimum set of
- * global variables during system initialization (until we have set
- * up the memory controller so that we can use RAM).
- */
-
-typedef struct global_data {
- bd_t *bd;
- unsigned long flags;
+/* Architecture-specific global data */
+struct arch_global_data {
#ifdef CONFIG_JZSOC
/* There are other clocks in the jz4740 */
- unsigned long cpu_clk; /* CPU core clock */
- unsigned long sys_clk; /* System bus clock */
- unsigned long per_clk; /* Peripheral bus clock */
- unsigned long mem_clk; /* Memory bus clock */
- unsigned long dev_clk; /* Device clock */
- /* "static data" needed by most of timer.c */
- unsigned long tbl;
- unsigned long lastinc;
+ unsigned long per_clk; /* Peripheral bus clock */
+ unsigned long dev_clk; /* Device clock */
#endif
- unsigned int baudrate;
- unsigned long have_console; /* serial_init() was called */
-#ifdef CONFIG_PRE_CONSOLE_BUFFER
- unsigned long precon_buf_idx; /* Pre-Console buffer index */
-#endif
- phys_size_t ram_size; /* RAM size */
- unsigned long reloc_off; /* Relocation Offset */
- unsigned long env_addr; /* Address of Environment struct */
- unsigned long env_valid; /* Checksum of Environment valid? */
- void **jt; /* jump table */
- char env_buf[32]; /* buffer for getenv() before reloc. */
-} gd_t;
+};
-#include <asm-generic/global_data_flags.h>
+#include <asm-generic/global_data.h>
#define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("k0")
diff --git a/arch/nds32/include/asm/global_data.h b/arch/nds32/include/asm/global_data.h
index b1feb2c..4927d52 100644
--- a/arch/nds32/include/asm/global_data.h
+++ b/arch/nds32/include/asm/global_data.h
@@ -33,39 +33,12 @@
#ifndef __ASM_GBL_DATA_H
#define __ASM_GBL_DATA_H
-/*
- * The following data structure is placed in some memory wich is
- * available very early after boot (like DPRAM on MPC8xx/MPC82xx, or
- * some locked parts of the data cache) to allow for a minimum set of
- * global variables during system initialization (until we have set
- * up the memory controller so that we can use RAM).
- */
-typedef struct global_data {
- bd_t *bd;
- unsigned long flags;
- unsigned int baudrate;
- unsigned long have_console; /* serial_init() was called */
+/* Architecture-specific global data */
+struct arch_global_data {
+};
- unsigned long reloc_off; /* Relocation Offset */
- unsigned long env_addr; /* Address of Environment struct */
- unsigned long env_valid; /* Checksum of Environment valid? */
- unsigned long fb_base; /* base address of frame buffer */
-
- unsigned long relocaddr; /* Start address of U-Boot in RAM */
- phys_size_t ram_size; /* RAM size */
- unsigned long mon_len; /* monitor len */
- unsigned long irq_sp; /* irq stack pointer */
- unsigned long start_addr_sp; /* start_addr_stackpointer */
-#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
- unsigned long tlb_addr;
-#endif
-
- void **jt; /* jump table */
- char env_buf[32]; /* buffer for getenv() before reloc. */
-} gd_t;
-
-#include <asm-generic/global_data_flags.h>
+#include <asm-generic/global_data.h>
#ifdef CONFIG_GLOBAL_DATA_NOT_REG10
extern volatile gd_t g_gd;
diff --git a/arch/nds32/lib/board.c b/arch/nds32/lib/board.c
index 91395ca..09feaf3 100644
--- a/arch/nds32/lib/board.c
+++ b/arch/nds32/lib/board.c
@@ -207,17 +207,6 @@
addr = CONFIG_SYS_SDRAM_BASE + gd->ram_size;
-#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
- /* reserve TLB table */
- addr -= (4096 * 4);
-
- /* round down to next 64 kB limit */
- addr &= ~(0x10000 - 1);
-
- gd->tlb_addr = addr;
- debug("TLB table at: %08lx\n", addr);
-#endif
-
/* round down to next 4 kB limit */
addr &= ~(4096 - 1);
debug("Top of RAM usable for U-Boot at: %08lx\n", addr);
diff --git a/arch/nios2/include/asm/global_data.h b/arch/nios2/include/asm/global_data.h
index 413b485..39c5700 100644
--- a/arch/nios2/include/asm/global_data.h
+++ b/arch/nios2/include/asm/global_data.h
@@ -23,28 +23,11 @@
#ifndef __ASM_NIOS2_GLOBALDATA_H_
#define __ASM_NIOS2_GLOBALDATA_H_
-typedef struct global_data {
- bd_t *bd;
- unsigned long flags;
- unsigned int baudrate;
- unsigned long cpu_clk; /* CPU clock in Hz! */
- unsigned long have_console; /* serial_init() was called */
-#ifdef CONFIG_PRE_CONSOLE_BUFFER
- unsigned long precon_buf_idx; /* Pre-Console buffer index */
-#endif
- phys_size_t ram_size; /* RAM size */
- unsigned long env_addr; /* Address of Environment struct */
- unsigned long env_valid; /* Checksum of Environment valid */
-#if defined(CONFIG_POST) || defined(CONFIG_LOGBUFFER)
- unsigned long post_log_word; /* Record POST activities */
- unsigned long post_log_res; /* success of POST test */
- unsigned long post_init_f_time; /* When post_init_f started */
-#endif
- void **jt; /* Standalone app jump table */
- char env_buf[32]; /* buffer for getenv() before reloc. */
-} gd_t;
+/* Architecture-specific global data */
+struct arch_global_data {
+};
-#include <asm-generic/global_data_flags.h>
+#include <asm-generic/global_data.h>
#define DECLARE_GLOBAL_DATA_PTR register gd_t *gd asm ("gp")
diff --git a/arch/openrisc/include/asm/global_data.h b/arch/openrisc/include/asm/global_data.h
index 96f3f1c..d267ccd 100644
--- a/arch/openrisc/include/asm/global_data.h
+++ b/arch/openrisc/include/asm/global_data.h
@@ -24,29 +24,12 @@
#ifndef __ASM_GBL_DATA_H
#define __ASM_GBL_DATA_H
-/*
- * The following data structure is placed in some memory wich is
- * available very early after boot (like DPRAM on MPC8xx/MPC82xx, or
- * some locked parts of the data cache) to allow for a minimum set of
- * global variables during system initialization (until we have set
- * up the memory controller so that we can use RAM).
- */
-typedef struct global_data {
- bd_t *bd;
- unsigned long flags;
- unsigned int baudrate;
- unsigned long cpu_clk; /* CPU clock in Hz! */
- unsigned long have_console; /* serial_init() was called */
- phys_size_t ram_size; /* RAM size */
- unsigned long env_addr; /* Address of Environment struct */
- unsigned long env_valid; /* Checksum of Environment valid? */
- unsigned long fb_base; /* base address of frame buffer */
- void **jt; /* jump table */
- char env_buf[32]; /* buffer for getenv() before reloc. */
-} gd_t;
+/* Architecture-specific global data */
+struct arch_global_data {
+};
-#include <asm-generic/global_data_flags.h>
+#include <asm-generic/global_data.h>
/* OR32 GCC already has r10 set as fixed-use */
#define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("r10")
diff --git a/arch/powerpc/cpu/mpc512x/cpu.c b/arch/powerpc/cpu/mpc512x/cpu.c
index a1a3bd4..bb03c6d 100644
--- a/arch/powerpc/cpu/mpc512x/cpu.c
+++ b/arch/powerpc/cpu/mpc512x/cpu.c
@@ -68,8 +68,8 @@
}
printf ("at %s MHz, CSB at %s MHz (RSR=0x%04lx)\n",
strmhz(buf1, clock),
- strmhz(buf2, gd->csb_clk),
- gd->reset_status & 0xffff);
+ strmhz(buf2, gd->arch.csb_clk),
+ gd->arch.reset_status & 0xffff);
return 0;
}
diff --git a/arch/powerpc/cpu/mpc512x/cpu_init.c b/arch/powerpc/cpu/mpc512x/cpu_init.c
index fe6beaf..32ade1b 100644
--- a/arch/powerpc/cpu/mpc512x/cpu_init.c
+++ b/arch/powerpc/cpu/mpc512x/cpu_init.c
@@ -62,7 +62,7 @@
#endif
/* RSR - Reset Status Register - clear all status */
- gd->reset_status = im->reset.rsr;
+ gd->arch.reset_status = im->reset.rsr;
out_be32(&im->reset.rsr, ~RSR_RES);
/*
diff --git a/arch/powerpc/cpu/mpc512x/i2c.c b/arch/powerpc/cpu/mpc512x/i2c.c
index 0ea1280..59040f8 100644
--- a/arch/powerpc/cpu/mpc512x/i2c.c
+++ b/arch/powerpc/cpu/mpc512x/i2c.c
@@ -250,7 +250,7 @@
{126, 128}
};
- ips = gd->ips_clk;
+ ips = gd->arch.ips_clk;
for (i = 7; i >= 0; i--) {
for (j = 7; j >= 0; j--) {
scl = 2 * (scltap[j].scl2tap +
diff --git a/arch/powerpc/cpu/mpc512x/ide.c b/arch/powerpc/cpu/mpc512x/ide.c
index dd6b2f4..7a49673 100644
--- a/arch/powerpc/cpu/mpc512x/ide.c
+++ b/arch/powerpc/cpu/mpc512x/ide.c
@@ -100,7 +100,7 @@
ide_set_reset(0);
/* Init timings : we use PIO mode 0 timings */
- t = 1000000000 / gd->ips_clk; /* period in ns */
+ t = 1000000000 / gd->arch.ips_clk; /* period in ns */
cfg.bytes.field1 = 3;
cfg.bytes.field2 = 3;
cfg.bytes.field3 = (pio_specs.t1 + t) / t;
diff --git a/arch/powerpc/cpu/mpc512x/serial.c b/arch/powerpc/cpu/mpc512x/serial.c
index 58587fd..3afbe81 100644
--- a/arch/powerpc/cpu/mpc512x/serial.c
+++ b/arch/powerpc/cpu/mpc512x/serial.c
@@ -140,7 +140,7 @@
}
/* calculate divisor for setting PSC CTUR and CTLR registers */
- baseclk = (gd->ips_clk + 8) / 16;
+ baseclk = (gd->arch.ips_clk + 8) / 16;
div = (baseclk + (baudrate / 2)) / baudrate;
out_8(&psc->ctur, (div >> 8) & 0xff);
diff --git a/arch/powerpc/cpu/mpc512x/speed.c b/arch/powerpc/cpu/mpc512x/speed.c
index 9d749f2..9a8f315 100644
--- a/arch/powerpc/cpu/mpc512x/speed.c
+++ b/arch/powerpc/cpu/mpc512x/speed.c
@@ -113,9 +113,9 @@
pci_clk = 333333;
}
- gd->ips_clk = ips_clk;
+ gd->arch.ips_clk = ips_clk;
gd->pci_clk = pci_clk;
- gd->csb_clk = csb_clk;
+ gd->arch.csb_clk = csb_clk;
gd->cpu_clk = core_clk;
gd->bus_clk = csb_clk;
return 0;
@@ -128,7 +128,7 @@
*********************************************/
ulong get_bus_freq (ulong dummy)
{
- return gd->csb_clk;
+ return gd->arch.csb_clk;
}
int do_clocks (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
@@ -137,10 +137,13 @@
printf("Clock configuration:\n");
printf(" CPU: %-4s MHz\n", strmhz(buf, gd->cpu_clk));
- printf(" Coherent System Bus: %-4s MHz\n", strmhz(buf, gd->csb_clk));
- printf(" IPS Bus: %-4s MHz\n", strmhz(buf, gd->ips_clk));
+ printf(" Coherent System Bus: %-4s MHz\n",
+ strmhz(buf, gd->arch.csb_clk));
+ printf(" IPS Bus: %-4s MHz\n",
+ strmhz(buf, gd->arch.ips_clk));
printf(" PCI: %-4s MHz\n", strmhz(buf, gd->pci_clk));
- printf(" DDR: %-4s MHz\n", strmhz(buf, 2*gd->csb_clk));
+ printf(" DDR: %-4s MHz\n",
+ strmhz(buf, 2 * gd->arch.csb_clk));
return 0;
}
diff --git a/arch/powerpc/cpu/mpc5xxx/i2c.c b/arch/powerpc/cpu/mpc5xxx/i2c.c
index b423d2f..8d5f47b 100644
--- a/arch/powerpc/cpu/mpc5xxx/i2c.c
+++ b/arch/powerpc/cpu/mpc5xxx/i2c.c
@@ -310,7 +310,7 @@
{126, 128}
};
- ipb = gd->ipb_clk;
+ ipb = gd->arch.ipb_clk;
for (i = 7; i >= 0; i--) {
for (j = 7; j >= 0; j--) {
scl = 2 * (scltap[j].scl2tap +
diff --git a/arch/powerpc/cpu/mpc5xxx/ide.c b/arch/powerpc/cpu/mpc5xxx/ide.c
index d337abb..094f62b 100644
--- a/arch/powerpc/cpu/mpc5xxx/ide.c
+++ b/arch/powerpc/cpu/mpc5xxx/ide.c
@@ -75,7 +75,7 @@
psdma->PtdCntrl |= 1;
/* Init timings : we use PIO mode 0 timings */
- period = 1000000000 / gd->ipb_clk; /* period in ns */
+ period = 1000000000 / gd->arch.ipb_clk; /* period in ns */
t0 = CALC_TIMING (600);
t2_8 = CALC_TIMING (290);
diff --git a/arch/powerpc/cpu/mpc5xxx/serial.c b/arch/powerpc/cpu/mpc5xxx/serial.c
index eb14161..1ccb4e3 100644
--- a/arch/powerpc/cpu/mpc5xxx/serial.c
+++ b/arch/powerpc/cpu/mpc5xxx/serial.c
@@ -89,7 +89,7 @@
/* select clock sources */
psc->psc_clock_select = 0;
- baseclk = (gd->ipb_clk + 16) / 32;
+ baseclk = (gd->arch.ipb_clk + 16) / 32;
/* switch to UART mode */
psc->sicr = 0;
@@ -169,7 +169,7 @@
volatile struct mpc5xxx_psc *psc = (struct mpc5xxx_psc *)dev_base;
unsigned long baseclk, div;
- baseclk = (gd->ipb_clk + 16) / 32;
+ baseclk = (gd->arch.ipb_clk + 16) / 32;
/* set up UART divisor */
div = (baseclk + (gd->baudrate/2)) / gd->baudrate;
diff --git a/arch/powerpc/cpu/mpc5xxx/speed.c b/arch/powerpc/cpu/mpc5xxx/speed.c
index 8027d3e..5353e3d 100644
--- a/arch/powerpc/cpu/mpc5xxx/speed.c
+++ b/arch/powerpc/cpu/mpc5xxx/speed.c
@@ -66,14 +66,20 @@
val = *(vu_long *)MPC5XXX_CDM_CFG;
if (val & (1 << 8)) {
- gd->ipb_clk = gd->bus_clk / 2;
+ gd->arch.ipb_clk = gd->bus_clk / 2;
} else {
- gd->ipb_clk = gd->bus_clk;
+ gd->arch.ipb_clk = gd->bus_clk;
}
switch (val & 3) {
- case 0: gd->pci_clk = gd->ipb_clk; break;
- case 1: gd->pci_clk = gd->ipb_clk / 2; break;
- default: gd->pci_clk = gd->bus_clk / 4; break;
+ case 0:
+ gd->pci_clk = gd->arch.ipb_clk;
+ break;
+ case 1:
+ gd->pci_clk = gd->arch.ipb_clk / 2;
+ break;
+ default:
+ gd->pci_clk = gd->bus_clk / 4;
+ break;
}
return (0);
@@ -85,7 +91,7 @@
printf (" Bus %s MHz, IPB %s MHz, PCI %s MHz\n",
strmhz(buf1, gd->bus_clk),
- strmhz(buf2, gd->ipb_clk),
+ strmhz(buf2, gd->arch.ipb_clk),
strmhz(buf3, gd->pci_clk)
);
return (0);
diff --git a/arch/powerpc/cpu/mpc8220/fec.c b/arch/powerpc/cpu/mpc8220/fec.c
index aaf9be1..43fa802 100644
--- a/arch/powerpc/cpu/mpc8220/fec.c
+++ b/arch/powerpc/cpu/mpc8220/fec.c
@@ -288,9 +288,11 @@
* Set MII_SPEED = (1/(mii_speed * 2)) * System Clock
* and do not drop the Preamble.
*/
- /* tbd - rtm */
- /*fec->eth->mii_speed = (((gd->ipb_clk >> 20) / 5) << 1); */
- /* No MII for 7-wire mode */
+ /*
+ * tbd - rtm
+ * fec->eth->mii_speed = (((gd->arch.ipb_clk >> 20) / 5) << 1);
+ * No MII for 7-wire mode
+ */
fec->eth->mii_speed = 0x00000030;
}
diff --git a/arch/powerpc/cpu/mpc8220/speed.c b/arch/powerpc/cpu/mpc8220/speed.c
index 62ac845..bb72e5c 100644
--- a/arch/powerpc/cpu/mpc8220/speed.c
+++ b/arch/powerpc/cpu/mpc8220/speed.c
@@ -71,7 +71,7 @@
#error clock measuring not implemented yet - define CONFIG_SYS_MPC8220_CLKIN
#endif
- gd->inp_clk = CONFIG_SYS_MPC8220_CLKIN;
+ gd->arch.inp_clk = CONFIG_SYS_MPC8220_CLKIN;
/* Read XLB to PCI(INP) clock multiplier */
pci2bus = (*((volatile u32 *)PCI_REG_PCIGSCR) &
@@ -85,7 +85,7 @@
/* FlexBus is temporary set as the same as input clock */
/* will do dynamic in the future */
- gd->flb_clk = CONFIG_SYS_MPC8220_CLKIN;
+ gd->arch.flb_clk = CONFIG_SYS_MPC8220_CLKIN;
/* CPU Clock - Read HID1 */
asm volatile ("mfspr %0, 1009":"=r" (hid1):);
@@ -97,12 +97,14 @@
for (i = 0; i < size; i++)
if (hid1 == bus2core[i].hid1) {
gd->cpu_clk = (bus2core[i].multi * gd->bus_clk) >> 1;
- gd->vco_clk = CONFIG_SYS_MPC8220_SYSPLL_VCO_MULTIPLIER * (gd->pci_clk * bus2core[i].vco_div)/2;
+ gd->arch.vco_clk =
+ CONFIG_SYS_MPC8220_SYSPLL_VCO_MULTIPLIER *
+ (gd->pci_clk * bus2core[i].vco_div) / 2;
break;
}
/* hardcoded 81MHz for now */
- gd->pev_clk = 81000000;
+ gd->arch.pev_clk = 81000000;
return (0);
}
@@ -115,7 +117,7 @@
strmhz(buf1, gd->bus_clk),
strmhz(buf2, gd->cpu_clk),
strmhz(buf3, gd->pci_clk),
- strmhz(buf4, gd->vco_clk)
+ strmhz(buf4, gd->arch.vco_clk)
);
return (0);
}
diff --git a/arch/powerpc/cpu/mpc8260/commproc.c b/arch/powerpc/cpu/mpc8260/commproc.c
index 082957e..22cef3e 100644
--- a/arch/powerpc/cpu/mpc8260/commproc.c
+++ b/arch/powerpc/cpu/mpc8260/commproc.c
@@ -30,8 +30,8 @@
/* Reclaim the DP memory for our use.
*/
- gd->dp_alloc_base = CPM_DATAONLY_BASE;
- gd->dp_alloc_top = gd->dp_alloc_base + CPM_DATAONLY_SIZE;
+ gd->arch.dp_alloc_base = CPM_DATAONLY_BASE;
+ gd->arch.dp_alloc_top = gd->arch.dp_alloc_base + CPM_DATAONLY_SIZE;
/*
* Reset CPM
@@ -60,21 +60,22 @@
uint savebase;
align_mask = align - 1;
- savebase = gd->dp_alloc_base;
+ savebase = gd->arch.dp_alloc_base;
- if ((off = (gd->dp_alloc_base & align_mask)) != 0)
- gd->dp_alloc_base += (align - off);
+ off = gd->arch.dp_alloc_base & align_mask;
+ if (off != 0)
+ gd->arch.dp_alloc_base += (align - off);
if ((off = size & align_mask) != 0)
size += align - off;
- if ((gd->dp_alloc_base + size) >= gd->dp_alloc_top) {
- gd->dp_alloc_base = savebase;
+ if ((gd->arch.dp_alloc_base + size) >= gd->arch.dp_alloc_top) {
+ gd->arch.dp_alloc_base = savebase;
panic("m8260_cpm_dpalloc: ran out of dual port ram!");
}
- retloc = gd->dp_alloc_base;
- gd->dp_alloc_base += size;
+ retloc = gd->arch.dp_alloc_base;
+ gd->arch.dp_alloc_base += size;
memset((void *)&immr->im_dprambase[retloc], 0, size);
@@ -101,7 +102,7 @@
* Baud rate clocks are zero-based in the driver code (as that maps
* to port numbers). Documentation uses 1-based numbering.
*/
-#define BRG_INT_CLK gd->brg_clk
+#define BRG_INT_CLK gd->arch.brg_clk
#define BRG_UART_CLK (BRG_INT_CLK / 16)
/* This function is used by UARTs, or anything else that uses a 16x
diff --git a/arch/powerpc/cpu/mpc8260/cpu_init.c b/arch/powerpc/cpu/mpc8260/cpu_init.c
index acd48a9..3964e60 100644
--- a/arch/powerpc/cpu/mpc8260/cpu_init.c
+++ b/arch/powerpc/cpu/mpc8260/cpu_init.c
@@ -120,7 +120,7 @@
memset ((void *) gd, 0, sizeof (gd_t));
/* RSR - Reset Status Register - clear all status (5-4) */
- gd->reset_status = immr->im_clkrst.car_rsr;
+ gd->arch.reset_status = immr->im_clkrst.car_rsr;
immr->im_clkrst.car_rsr = RSR_ALLBITS;
/* RMR - Reset Mode Register - contains checkstop reset enable (5-5) */
@@ -274,7 +274,7 @@
RSR_EHRS, "External Hard"}
};
static int n = sizeof bits / sizeof bits[0];
- ulong rsr = gd->reset_status;
+ ulong rsr = gd->arch.reset_status;
int i;
char *sep;
diff --git a/arch/powerpc/cpu/mpc8260/i2c.c b/arch/powerpc/cpu/mpc8260/i2c.c
index 7382cba..b720b1f 100644
--- a/arch/powerpc/cpu/mpc8260/i2c.c
+++ b/arch/powerpc/cpu/mpc8260/i2c.c
@@ -259,7 +259,7 @@
* divide BRGCLK by 1)
*/
debug("[I2C] Setting rate...\n");
- i2c_setrate(gd->brg_clk, CONFIG_SYS_I2C_SPEED);
+ i2c_setrate(gd->arch.brg_clk, CONFIG_SYS_I2C_SPEED);
/* Set I2C controller in master mode */
i2c->i2c_i2com = 0x01;
diff --git a/arch/powerpc/cpu/mpc8260/speed.c b/arch/powerpc/cpu/mpc8260/speed.c
index bb50dee..7841e8a 100644
--- a/arch/powerpc/cpu/mpc8260/speed.c
+++ b/arch/powerpc/cpu/mpc8260/speed.c
@@ -135,17 +135,17 @@
(get_pvr () == PVR_8260_HIP7R1) ||
(get_pvr () == PVR_8260_HIP7RA)) {
pllmf = (scmr & SCMR_PLLMF_MSKH7) >> SCMR_PLLMF_SHIFT;
- gd->vco_out = clkin * (pllmf + 1);
+ gd->arch.vco_out = clkin * (pllmf + 1);
} else { /* HiP3, HiP4 */
pllmf = (scmr & SCMR_PLLMF_MSK) >> SCMR_PLLMF_SHIFT;
plldf = (scmr & SCMR_PLLDF) ? 1 : 0;
- gd->vco_out = (clkin * 2 * (pllmf + 1)) / (plldf + 1);
+ gd->arch.vco_out = (clkin * 2 * (pllmf + 1)) / (plldf + 1);
}
- gd->cpm_clk = gd->vco_out / 2;
+ gd->arch.cpm_clk = gd->arch.vco_out / 2;
gd->bus_clk = clkin;
- gd->scc_clk = gd->vco_out / 4;
- gd->brg_clk = gd->vco_out / (1 << (2 * (dfbrg + 1)));
+ gd->arch.scc_clk = gd->arch.vco_out / 4;
+ gd->arch.brg_clk = gd->arch.vco_out / (1 << (2 * (dfbrg + 1)));
if (cp->b2c_mult > 0) {
gd->cpu_clk = (clkin * cp->b2c_mult) / 2;
@@ -173,7 +173,7 @@
pci_div = pcidf + 1;
}
- gd->pci_clk = (gd->cpm_clk * 2) / pci_div;
+ gd->pci_clk = (gd->arch.cpm_clk * 2) / pci_div;
}
#endif
@@ -231,10 +231,10 @@
plldf, pllmf, pcidf);
printf (" - vco_out %10ld, scc_clk %10ld, brg_clk %10ld\n",
- gd->vco_out, gd->scc_clk, gd->brg_clk);
+ gd->arch.vco_out, gd->arch.scc_clk, gd->arch.brg_clk);
printf (" - cpu_clk %10ld, cpm_clk %10ld, bus_clk %10ld\n",
- gd->cpu_clk, gd->cpm_clk, gd->bus_clk);
+ gd->cpu_clk, gd->arch.cpm_clk, gd->bus_clk);
#ifdef CONFIG_PCI
printf (" - pci_clk %10ld\n", gd->pci_clk);
#endif
diff --git a/arch/powerpc/cpu/mpc83xx/cpu.c b/arch/powerpc/cpu/mpc83xx/cpu.c
index e64b0c3..cc20234 100644
--- a/arch/powerpc/cpu/mpc83xx/cpu.c
+++ b/arch/powerpc/cpu/mpc83xx/cpu.c
@@ -122,7 +122,7 @@
printf(" at %s MHz, ", strmhz(buf, clock));
- printf("CSB: %s MHz\n", strmhz(buf, gd->csb_clk));
+ printf("CSB: %s MHz\n", strmhz(buf, gd->arch.csb_clk));
return 0;
}
diff --git a/arch/powerpc/cpu/mpc83xx/cpu_init.c b/arch/powerpc/cpu/mpc83xx/cpu_init.c
index 20d0600..5153351 100644
--- a/arch/powerpc/cpu/mpc83xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc83xx/cpu_init.c
@@ -232,12 +232,12 @@
clrsetbits_be32(&im->clk.sccr, sccr_mask, sccr_val);
/* RSR - Reset Status Register - clear all status (4.6.1.3) */
- gd->reset_status = __raw_readl(&im->reset.rsr);
+ gd->arch.reset_status = __raw_readl(&im->reset.rsr);
__raw_writel(~(RSR_RES), &im->reset.rsr);
/* AER - Arbiter Event Register - store status */
- gd->arbiter_event_attributes = __raw_readl(&im->arbiter.aeatr);
- gd->arbiter_event_address = __raw_readl(&im->arbiter.aeadr);
+ gd->arch.arbiter_event_attributes = __raw_readl(&im->arbiter.aeatr);
+ gd->arch.arbiter_event_address = __raw_readl(&im->arbiter.aeadr);
/*
* RMR - Reset Mode Register
@@ -440,42 +440,44 @@
"reserved"
};
- int etype = (gd->arbiter_event_attributes & AEATR_EVENT)
+ int etype = (gd->arch.arbiter_event_attributes & AEATR_EVENT)
>> AEATR_EVENT_SHIFT;
- int mstr_id = (gd->arbiter_event_attributes & AEATR_MSTR_ID)
+ int mstr_id = (gd->arch.arbiter_event_attributes & AEATR_MSTR_ID)
>> AEATR_MSTR_ID_SHIFT;
- int tbst = (gd->arbiter_event_attributes & AEATR_TBST)
+ int tbst = (gd->arch.arbiter_event_attributes & AEATR_TBST)
>> AEATR_TBST_SHIFT;
- int tsize = (gd->arbiter_event_attributes & AEATR_TSIZE)
+ int tsize = (gd->arch.arbiter_event_attributes & AEATR_TSIZE)
>> AEATR_TSIZE_SHIFT;
- int ttype = (gd->arbiter_event_attributes & AEATR_TTYPE)
+ int ttype = (gd->arch.arbiter_event_attributes & AEATR_TTYPE)
>> AEATR_TTYPE_SHIFT;
- if (!force && !gd->arbiter_event_address)
+ if (!force && !gd->arch.arbiter_event_address)
return 0;
puts("Arbiter Event Status:\n");
- printf(" Event Address: 0x%08lX\n", gd->arbiter_event_address);
+ printf(" Event Address: 0x%08lX\n",
+ gd->arch.arbiter_event_address);
printf(" Event Type: 0x%1x = %s\n", etype, event[etype]);
printf(" Master ID: 0x%02x = %s\n", mstr_id, master[mstr_id]);
printf(" Transfer Size: 0x%1x = %d bytes\n", (tbst<<3) | tsize,
tbst ? (tsize ? tsize : 8) : 16 + 8 * tsize);
printf(" Transfer Type: 0x%02x = %s\n", ttype, transfer[ttype]);
- return gd->arbiter_event_address;
+ return gd->arch.arbiter_event_address;
}
#elif defined(CONFIG_DISPLAY_AER_BRIEF)
static int print_83xx_arb_event(int force)
{
- if (!force && !gd->arbiter_event_address)
+ if (!force && !gd->arch.arbiter_event_address)
return 0;
printf("Arbiter Event Status: AEATR=0x%08lX, AEADR=0x%08lX\n",
- gd->arbiter_event_attributes, gd->arbiter_event_address);
+ gd->arch.arbiter_event_attributes,
+ gd->arch.arbiter_event_address);
- return gd->arbiter_event_address;
+ return gd->arch.arbiter_event_address;
}
#endif /* CONFIG_DISPLAY_AER_xxxx */
@@ -499,7 +501,7 @@
RSR_HRS, "External/Internal Hard"}
};
static int n = sizeof bits / sizeof bits[0];
- ulong rsr = gd->reset_status;
+ ulong rsr = gd->arch.reset_status;
int i;
char *sep;
diff --git a/arch/powerpc/cpu/mpc83xx/fdt.c b/arch/powerpc/cpu/mpc83xx/fdt.c
index 1f54781..fe553a7 100644
--- a/arch/powerpc/cpu/mpc83xx/fdt.c
+++ b/arch/powerpc/cpu/mpc83xx/fdt.c
@@ -118,7 +118,7 @@
do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
"bus-frequency", bd->bi_busfreq, 1);
do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
- "clock-frequency", gd->core_clk, 1);
+ "clock-frequency", gd->arch.core_clk, 1);
do_fixup_by_prop_u32(blob, "device_type", "soc", 4,
"bus-frequency", bd->bi_busfreq, 1);
do_fixup_by_compat_u32(blob, "fsl,soc",
diff --git a/arch/powerpc/cpu/mpc83xx/pcie.c b/arch/powerpc/cpu/mpc83xx/pcie.c
index 52d4461..609b133 100644
--- a/arch/powerpc/cpu/mpc83xx/pcie.c
+++ b/arch/powerpc/cpu/mpc83xx/pcie.c
@@ -286,8 +286,8 @@
get_clocks();
/* Configure the PCIE controller core clock ratio */
out_le32(hose_cfg_base + PEX_GCLK_RATIO,
- (((bus ? gd->pciexp2_clk : gd->pciexp1_clk) / 1000000) * 16)
- / 333);
+ (((bus ? gd->arch.pciexp2_clk : gd->arch.pciexp1_clk)
+ / 1000000) * 16) / 333);
udelay(1000000);
/* Do Type 1 bridge configuration */
diff --git a/arch/powerpc/cpu/mpc83xx/speed.c b/arch/powerpc/cpu/mpc83xx/speed.c
index b8c05d1..6be0e3a 100644
--- a/arch/powerpc/cpu/mpc83xx/speed.c
+++ b/arch/powerpc/cpu/mpc83xx/speed.c
@@ -462,53 +462,53 @@
brg_clk = qe_clk / 2;
#endif
- gd->csb_clk = csb_clk;
+ gd->arch.csb_clk = csb_clk;
#if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \
defined(CONFIG_MPC834x) || defined(CONFIG_MPC837x)
- gd->tsec1_clk = tsec1_clk;
- gd->tsec2_clk = tsec2_clk;
- gd->usbdr_clk = usbdr_clk;
+ gd->arch.tsec1_clk = tsec1_clk;
+ gd->arch.tsec2_clk = tsec2_clk;
+ gd->arch.usbdr_clk = usbdr_clk;
#elif defined(CONFIG_MPC8309)
- gd->usbdr_clk = usbdr_clk;
+ gd->arch.usbdr_clk = usbdr_clk;
#endif
#if defined(CONFIG_MPC834x)
- gd->usbmph_clk = usbmph_clk;
+ gd->arch.usbmph_clk = usbmph_clk;
#endif
#if defined(CONFIG_MPC8315)
- gd->tdm_clk = tdm_clk;
+ gd->arch.tdm_clk = tdm_clk;
#endif
#if defined(CONFIG_FSL_ESDHC)
- gd->sdhc_clk = sdhc_clk;
+ gd->arch.sdhc_clk = sdhc_clk;
#endif
- gd->core_clk = core_clk;
- gd->i2c1_clk = i2c1_clk;
+ gd->arch.core_clk = core_clk;
+ gd->arch.i2c1_clk = i2c1_clk;
#if !defined(CONFIG_MPC832x)
- gd->i2c2_clk = i2c2_clk;
+ gd->arch.i2c2_clk = i2c2_clk;
#endif
#if !defined(CONFIG_MPC8309)
- gd->enc_clk = enc_clk;
+ gd->arch.enc_clk = enc_clk;
#endif
- gd->lbiu_clk = lbiu_clk;
- gd->lclk_clk = lclk_clk;
+ gd->arch.lbiu_clk = lbiu_clk;
+ gd->arch.lclk_clk = lclk_clk;
gd->mem_clk = mem_clk;
#if defined(CONFIG_MPC8360)
- gd->mem_sec_clk = mem_sec_clk;
+ gd->arch.mem_sec_clk = mem_sec_clk;
#endif
#if defined(CONFIG_QE)
- gd->qe_clk = qe_clk;
- gd->brg_clk = brg_clk;
+ gd->arch.qe_clk = qe_clk;
+ gd->arch.brg_clk = brg_clk;
#endif
#if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \
defined(CONFIG_MPC837x)
- gd->pciexp1_clk = pciexp1_clk;
- gd->pciexp2_clk = pciexp2_clk;
+ gd->arch.pciexp1_clk = pciexp1_clk;
+ gd->arch.pciexp2_clk = pciexp2_clk;
#endif
#if defined(CONFIG_MPC837x) || defined(CONFIG_MPC8315)
- gd->sata_clk = sata_clk;
+ gd->arch.sata_clk = sata_clk;
#endif
gd->pci_clk = pci_sync_in;
- gd->cpu_clk = gd->core_clk;
- gd->bus_clk = gd->csb_clk;
+ gd->cpu_clk = gd->arch.core_clk;
+ gd->bus_clk = gd->arch.csb_clk;
return 0;
}
@@ -519,7 +519,7 @@
*********************************************/
ulong get_bus_freq(ulong dummy)
{
- return gd->csb_clk;
+ return gd->arch.csb_clk;
}
/********************************************
@@ -536,49 +536,69 @@
char buf[32];
printf("Clock configuration:\n");
- printf(" Core: %-4s MHz\n", strmhz(buf, gd->core_clk));
- printf(" Coherent System Bus: %-4s MHz\n", strmhz(buf, gd->csb_clk));
+ printf(" Core: %-4s MHz\n",
+ strmhz(buf, gd->arch.core_clk));
+ printf(" Coherent System Bus: %-4s MHz\n",
+ strmhz(buf, gd->arch.csb_clk));
#if defined(CONFIG_QE)
- printf(" QE: %-4s MHz\n", strmhz(buf, gd->qe_clk));
- printf(" BRG: %-4s MHz\n", strmhz(buf, gd->brg_clk));
+ printf(" QE: %-4s MHz\n",
+ strmhz(buf, gd->arch.qe_clk));
+ printf(" BRG: %-4s MHz\n",
+ strmhz(buf, gd->arch.brg_clk));
#endif
- printf(" Local Bus Controller:%-4s MHz\n", strmhz(buf, gd->lbiu_clk));
- printf(" Local Bus: %-4s MHz\n", strmhz(buf, gd->lclk_clk));
+ printf(" Local Bus Controller:%-4s MHz\n",
+ strmhz(buf, gd->arch.lbiu_clk));
+ printf(" Local Bus: %-4s MHz\n",
+ strmhz(buf, gd->arch.lclk_clk));
printf(" DDR: %-4s MHz\n", strmhz(buf, gd->mem_clk));
#if defined(CONFIG_MPC8360)
- printf(" DDR Secondary: %-4s MHz\n", strmhz(buf, gd->mem_sec_clk));
+ printf(" DDR Secondary: %-4s MHz\n",
+ strmhz(buf, gd->arch.mem_sec_clk));
#endif
#if !defined(CONFIG_MPC8309)
- printf(" SEC: %-4s MHz\n", strmhz(buf, gd->enc_clk));
+ printf(" SEC: %-4s MHz\n",
+ strmhz(buf, gd->arch.enc_clk));
#endif
- printf(" I2C1: %-4s MHz\n", strmhz(buf, gd->i2c1_clk));
+ printf(" I2C1: %-4s MHz\n",
+ strmhz(buf, gd->arch.i2c1_clk));
#if !defined(CONFIG_MPC832x)
- printf(" I2C2: %-4s MHz\n", strmhz(buf, gd->i2c2_clk));
+ printf(" I2C2: %-4s MHz\n",
+ strmhz(buf, gd->arch.i2c2_clk));
#endif
#if defined(CONFIG_MPC8315)
- printf(" TDM: %-4s MHz\n", strmhz(buf, gd->tdm_clk));
+ printf(" TDM: %-4s MHz\n",
+ strmhz(buf, gd->arch.tdm_clk));
#endif
#if defined(CONFIG_FSL_ESDHC)
- printf(" SDHC: %-4s MHz\n", strmhz(buf, gd->sdhc_clk));
+ printf(" SDHC: %-4s MHz\n",
+ strmhz(buf, gd->arch.sdhc_clk));
#endif
#if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \
defined(CONFIG_MPC834x) || defined(CONFIG_MPC837x)
- printf(" TSEC1: %-4s MHz\n", strmhz(buf, gd->tsec1_clk));
- printf(" TSEC2: %-4s MHz\n", strmhz(buf, gd->tsec2_clk));
- printf(" USB DR: %-4s MHz\n", strmhz(buf, gd->usbdr_clk));
+ printf(" TSEC1: %-4s MHz\n",
+ strmhz(buf, gd->arch.tsec1_clk));
+ printf(" TSEC2: %-4s MHz\n",
+ strmhz(buf, gd->arch.tsec2_clk));
+ printf(" USB DR: %-4s MHz\n",
+ strmhz(buf, gd->arch.usbdr_clk));
#elif defined(CONFIG_MPC8309)
- printf(" USB DR: %-4s MHz\n", strmhz(buf, gd->usbdr_clk));
+ printf(" USB DR: %-4s MHz\n",
+ strmhz(buf, gd->arch.usbdr_clk));
#endif
#if defined(CONFIG_MPC834x)
- printf(" USB MPH: %-4s MHz\n", strmhz(buf, gd->usbmph_clk));
+ printf(" USB MPH: %-4s MHz\n",
+ strmhz(buf, gd->arch.usbmph_clk));
#endif
#if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \
defined(CONFIG_MPC837x)
- printf(" PCIEXP1: %-4s MHz\n", strmhz(buf, gd->pciexp1_clk));
- printf(" PCIEXP2: %-4s MHz\n", strmhz(buf, gd->pciexp2_clk));
+ printf(" PCIEXP1: %-4s MHz\n",
+ strmhz(buf, gd->arch.pciexp1_clk));
+ printf(" PCIEXP2: %-4s MHz\n",
+ strmhz(buf, gd->arch.pciexp2_clk));
#endif
#if defined(CONFIG_MPC837x) || defined(CONFIG_MPC8315)
- printf(" SATA: %-4s MHz\n", strmhz(buf, gd->sata_clk));
+ printf(" SATA: %-4s MHz\n",
+ strmhz(buf, gd->arch.sata_clk));
#endif
return 0;
}
diff --git a/arch/powerpc/cpu/mpc85xx/commproc.c b/arch/powerpc/cpu/mpc85xx/commproc.c
index 292b723..37e7062 100644
--- a/arch/powerpc/cpu/mpc85xx/commproc.c
+++ b/arch/powerpc/cpu/mpc85xx/commproc.c
@@ -43,8 +43,8 @@
/* Reclaim the DP memory for our use.
*/
- gd->dp_alloc_base = CPM_DATAONLY_BASE;
- gd->dp_alloc_top = gd->dp_alloc_base + CPM_DATAONLY_SIZE;
+ gd->arch.dp_alloc_base = CPM_DATAONLY_BASE;
+ gd->arch.dp_alloc_top = gd->arch.dp_alloc_base + CPM_DATAONLY_SIZE;
/*
* Reset CPM
@@ -69,21 +69,22 @@
uint savebase;
align_mask = align - 1;
- savebase = gd->dp_alloc_base;
+ savebase = gd->arch.dp_alloc_base;
- if ((off = (gd->dp_alloc_base & align_mask)) != 0)
- gd->dp_alloc_base += (align - off);
+ off = gd->arch.dp_alloc_base & align_mask;
+ if (off != 0)
+ gd->arch.dp_alloc_base += (align - off);
if ((off = size & align_mask) != 0)
size += align - off;
- if ((gd->dp_alloc_base + size) >= gd->dp_alloc_top) {
- gd->dp_alloc_base = savebase;
+ if ((gd->arch.dp_alloc_base + size) >= gd->arch.dp_alloc_top) {
+ gd->arch.dp_alloc_base = savebase;
panic("m8560_cpm_dpalloc: ran out of dual port ram!");
}
- retloc = gd->dp_alloc_base;
- gd->dp_alloc_base += size;
+ retloc = gd->arch.dp_alloc_base;
+ gd->arch.dp_alloc_base += size;
memset((void *)&(cpm->im_dprambase[retloc]), 0, size);
@@ -110,7 +111,7 @@
* Baud rate clocks are zero-based in the driver code (as that maps
* to port numbers). Documentation uses 1-based numbering.
*/
-#define BRG_INT_CLK gd->brg_clk
+#define BRG_INT_CLK gd->arch.brg_clk
#define BRG_UART_CLK ((BRG_INT_CLK + 15) / 16)
/* This function is used by UARTS, or anything else that uses a 16x
diff --git a/arch/powerpc/cpu/mpc85xx/cpu.c b/arch/powerpc/cpu/mpc85xx/cpu.c
index 9b9832c..df2ab6d 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu.c
@@ -104,7 +104,7 @@
puts("CPU: ");
}
- cpu = gd->cpu;
+ cpu = gd->arch.cpu;
puts(cpu->name);
if (IS_E_PROCESSOR(svr))
diff --git a/arch/powerpc/cpu/mpc85xx/fdt.c b/arch/powerpc/cpu/mpc85xx/fdt.c
index 3a268aa..d381cf9 100644
--- a/arch/powerpc/cpu/mpc85xx/fdt.c
+++ b/arch/powerpc/cpu/mpc85xx/fdt.c
@@ -637,9 +637,9 @@
"bus-frequency", bd->bi_busfreq, 1);
do_fixup_by_compat_u32(blob, "fsl,pq3-localbus",
- "bus-frequency", gd->lbc_clk, 1);
+ "bus-frequency", gd->arch.lbc_clk, 1);
do_fixup_by_compat_u32(blob, "fsl,elbc",
- "bus-frequency", gd->lbc_clk, 1);
+ "bus-frequency", gd->arch.lbc_clk, 1);
#ifdef CONFIG_QE
ft_qe_setup(blob);
ft_fixup_qe_snum(blob);
diff --git a/arch/powerpc/cpu/mpc85xx/speed.c b/arch/powerpc/cpu/mpc85xx/speed.c
index 801ee07..297f2ed 100644
--- a/arch/powerpc/cpu/mpc85xx/speed.c
+++ b/arch/powerpc/cpu/mpc85xx/speed.c
@@ -391,11 +391,11 @@
gd->cpu_clk = sys_info.freqProcessor[0];
gd->bus_clk = sys_info.freqSystemBus;
gd->mem_clk = sys_info.freqDDRBus;
- gd->lbc_clk = sys_info.freqLocalBus;
+ gd->arch.lbc_clk = sys_info.freqLocalBus;
#ifdef CONFIG_QE
- gd->qe_clk = sys_info.freqQE;
- gd->brg_clk = gd->qe_clk / 2;
+ gd->arch.qe_clk = sys_info.freqQE;
+ gd->arch.brg_clk = gd->arch.qe_clk / 2;
#endif
/*
* The base clock for I2C depends on the actual SOC. Unfortunately,
@@ -406,7 +406,7 @@
*/
#if defined(CONFIG_MPC8540) || defined(CONFIG_MPC8541) || \
defined(CONFIG_MPC8560) || defined(CONFIG_MPC8555)
- gd->i2c1_clk = sys_info.freqSystemBus;
+ gd->arch.i2c1_clk = sys_info.freqSystemBus;
#elif defined(CONFIG_MPC8544)
/*
* On the 8544, the I2C clock is the same as the SEC clock. This can be
@@ -416,29 +416,29 @@
* PORDEVSR2_SEC_CFG bit is 0 on all 85xx boards that are not an 8544.
*/
if (gur->pordevsr2 & MPC85xx_PORDEVSR2_SEC_CFG)
- gd->i2c1_clk = sys_info.freqSystemBus / 3;
+ gd->arch.i2c1_clk = sys_info.freqSystemBus / 3;
else
- gd->i2c1_clk = sys_info.freqSystemBus / 2;
+ gd->arch.i2c1_clk = sys_info.freqSystemBus / 2;
#else
/* Most 85xx SOCs use CCB/2, so this is the default behavior. */
- gd->i2c1_clk = sys_info.freqSystemBus / 2;
+ gd->arch.i2c1_clk = sys_info.freqSystemBus / 2;
#endif
- gd->i2c2_clk = gd->i2c1_clk;
+ gd->arch.i2c2_clk = gd->arch.i2c1_clk;
#if defined(CONFIG_FSL_ESDHC)
#if defined(CONFIG_MPC8569) || defined(CONFIG_P1010) ||\
defined(CONFIG_P1014)
- gd->sdhc_clk = gd->bus_clk;
+ gd->arch.sdhc_clk = gd->bus_clk;
#else
- gd->sdhc_clk = gd->bus_clk / 2;
+ gd->arch.sdhc_clk = gd->bus_clk / 2;
#endif
#endif /* defined(CONFIG_FSL_ESDHC) */
#if defined(CONFIG_CPM2)
- gd->vco_out = 2*sys_info.freqSystemBus;
- gd->cpm_clk = gd->vco_out / 2;
- gd->scc_clk = gd->vco_out / 4;
- gd->brg_clk = gd->vco_out / (1 << (2 * (dfbrg + 1)));
+ gd->arch.vco_out = 2*sys_info.freqSystemBus;
+ gd->arch.cpm_clk = gd->arch.vco_out / 2;
+ gd->arch.scc_clk = gd->arch.vco_out / 4;
+ gd->arch.brg_clk = gd->arch.vco_out / (1 << (2 * (dfbrg + 1)));
#endif
if(gd->cpu_clk != 0) return (0);
diff --git a/arch/powerpc/cpu/mpc85xx/tlb.c b/arch/powerpc/cpu/mpc85xx/tlb.c
index 23d3357..0dff37f 100644
--- a/arch/powerpc/cpu/mpc85xx/tlb.c
+++ b/arch/powerpc/cpu/mpc85xx/tlb.c
@@ -99,7 +99,7 @@
int i = idx / 32;
int bit = idx % 32;
- gd->used_tlb_cams[i] |= (1 << bit);
+ gd->arch.used_tlb_cams[i] |= (1 << bit);
}
static inline void free_tlb_cam(u8 idx)
@@ -107,7 +107,7 @@
int i = idx / 32;
int bit = idx % 32;
- gd->used_tlb_cams[i] &= ~(1 << bit);
+ gd->arch.used_tlb_cams[i] &= ~(1 << bit);
}
void init_used_tlb_cams(void)
@@ -116,7 +116,7 @@
unsigned int num_cam = mfspr(SPRN_TLB1CFG) & 0xfff;
for (i = 0; i < ((CONFIG_SYS_NUM_TLBCAMS+31)/32); i++)
- gd->used_tlb_cams[i] = 0;
+ gd->arch.used_tlb_cams[i] = 0;
/* walk all the entries */
for (i = 0; i < num_cam; i++) {
@@ -133,7 +133,7 @@
u32 idx;
for (i = 0; i < ((CONFIG_SYS_NUM_TLBCAMS+31)/32); i++) {
- idx = ffz(gd->used_tlb_cams[i]);
+ idx = ffz(gd->arch.used_tlb_cams[i]);
if (idx != 32)
break;
diff --git a/arch/powerpc/cpu/mpc86xx/cpu.c b/arch/powerpc/cpu/mpc86xx/cpu.c
index d2c8c78..c553415 100644
--- a/arch/powerpc/cpu/mpc86xx/cpu.c
+++ b/arch/powerpc/cpu/mpc86xx/cpu.c
@@ -67,7 +67,7 @@
}
puts("CPU: ");
- cpu = gd->cpu;
+ cpu = gd->arch.cpu;
puts(cpu->name);
diff --git a/arch/powerpc/cpu/mpc86xx/fdt.c b/arch/powerpc/cpu/mpc86xx/fdt.c
index 2f955fe..26a65c5 100644
--- a/arch/powerpc/cpu/mpc86xx/fdt.c
+++ b/arch/powerpc/cpu/mpc86xx/fdt.c
@@ -34,10 +34,10 @@
#if defined(CONFIG_MPC8641)
do_fixup_by_compat_u32(blob, "fsl,mpc8641-localbus",
- "bus-frequency", gd->lbc_clk, 1);
+ "bus-frequency", gd->arch.lbc_clk, 1);
#endif
do_fixup_by_compat_u32(blob, "fsl,elbc",
- "bus-frequency", gd->lbc_clk, 1);
+ "bus-frequency", gd->arch.lbc_clk, 1);
fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
diff --git a/arch/powerpc/cpu/mpc86xx/speed.c b/arch/powerpc/cpu/mpc86xx/speed.c
index a2d0a8a..18c1eea 100644
--- a/arch/powerpc/cpu/mpc86xx/speed.c
+++ b/arch/powerpc/cpu/mpc86xx/speed.c
@@ -120,7 +120,7 @@
get_sys_info(&sys_info);
gd->cpu_clk = sys_info.freqProcessor;
gd->bus_clk = sys_info.freqSystemBus;
- gd->lbc_clk = sys_info.freqLocalBus;
+ gd->arch.lbc_clk = sys_info.freqLocalBus;
/*
* The base clock for I2C depends on the actual SOC. Unfortunately,
@@ -130,11 +130,11 @@
* AN2919.
*/
#ifdef CONFIG_MPC8610
- gd->i2c1_clk = sys_info.freqSystemBus;
+ gd->arch.i2c1_clk = sys_info.freqSystemBus;
#else
- gd->i2c1_clk = sys_info.freqSystemBus / 2;
+ gd->arch.i2c1_clk = sys_info.freqSystemBus / 2;
#endif
- gd->i2c2_clk = gd->i2c1_clk;
+ gd->arch.i2c2_clk = gd->arch.i2c1_clk;
if (gd->cpu_clk != 0)
return 0;
diff --git a/arch/powerpc/cpu/mpc8xx/commproc.c b/arch/powerpc/cpu/mpc8xx/commproc.c
index 5fe01ff..a364782 100644
--- a/arch/powerpc/cpu/mpc8xx/commproc.c
+++ b/arch/powerpc/cpu/mpc8xx/commproc.c
@@ -31,8 +31,8 @@
int dpram_init (void)
{
/* Reclaim the DP memory for our use. */
- gd->dp_alloc_base = CPM_DATAONLY_BASE;
- gd->dp_alloc_top = CPM_DATAONLY_BASE + CPM_DATAONLY_SIZE;
+ gd->arch.dp_alloc_base = CPM_DATAONLY_BASE;
+ gd->arch.dp_alloc_top = CPM_DATAONLY_BASE + CPM_DATAONLY_SIZE;
return (0);
}
@@ -43,19 +43,19 @@
*/
uint dpram_alloc (uint size)
{
- uint addr = gd->dp_alloc_base;
+ uint addr = gd->arch.dp_alloc_base;
- if ((gd->dp_alloc_base + size) >= gd->dp_alloc_top)
+ if ((gd->arch.dp_alloc_base + size) >= gd->arch.dp_alloc_top)
return (CPM_DP_NOSPACE);
- gd->dp_alloc_base += size;
+ gd->arch.dp_alloc_base += size;
return addr;
}
uint dpram_base (void)
{
- return gd->dp_alloc_base;
+ return gd->arch.dp_alloc_base;
}
/* Allocate some memory from the dual ported ram. We may want to
@@ -66,12 +66,12 @@
{
uint addr, mask = align - 1;
- addr = (gd->dp_alloc_base + mask) & ~mask;
+ addr = (gd->arch.dp_alloc_base + mask) & ~mask;
- if ((addr + size) >= gd->dp_alloc_top)
+ if ((addr + size) >= gd->arch.dp_alloc_top)
return (CPM_DP_NOSPACE);
- gd->dp_alloc_base = addr + size;
+ gd->arch.dp_alloc_base = addr + size;
return addr;
}
@@ -80,6 +80,6 @@
{
uint mask = align - 1;
- return (gd->dp_alloc_base + mask) & ~mask;
+ return (gd->arch.dp_alloc_base + mask) & ~mask;
}
#endif /* CONFIG_SYS_ALLOC_DPRAM */
diff --git a/arch/powerpc/cpu/mpc8xx/fdt.c b/arch/powerpc/cpu/mpc8xx/fdt.c
index 7130983..7edd7e4 100644
--- a/arch/powerpc/cpu/mpc8xx/fdt.c
+++ b/arch/powerpc/cpu/mpc8xx/fdt.c
@@ -37,7 +37,7 @@
do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
"clock-frequency", bd->bi_intfreq, 1);
do_fixup_by_compat_u32(blob, "fsl,cpm-brg", "clock-frequency",
- gd->brg_clk, 1);
+ gd->arch.brg_clk, 1);
/* Fixup ethernet MAC addresses */
fdt_fixup_ethernet(blob);
diff --git a/arch/powerpc/cpu/mpc8xx/speed.c b/arch/powerpc/cpu/mpc8xx/speed.c
index 6e13e5d..091b49f 100644
--- a/arch/powerpc/cpu/mpc8xx/speed.c
+++ b/arch/powerpc/cpu/mpc8xx/speed.c
@@ -192,7 +192,7 @@
divider = 64;
break;
}
- gd->brg_clk = gd->cpu_clk/divider;
+ gd->arch.brg_clk = gd->cpu_clk/divider;
}
#if !defined(CONFIG_8xx_CPUCLK_DEFAULT)
diff --git a/arch/powerpc/cpu/mpc8xxx/cpu.c b/arch/powerpc/cpu/mpc8xxx/cpu.c
index ab454f5..39525fb 100644
--- a/arch/powerpc/cpu/mpc8xxx/cpu.c
+++ b/arch/powerpc/cpu/mpc8xxx/cpu.c
@@ -148,7 +148,7 @@
u32 cpu_mask(void)
{
ccsr_pic_t __iomem *pic = (void *)CONFIG_SYS_MPC8xxx_PIC_ADDR;
- struct cpu_type *cpu = gd->cpu;
+ struct cpu_type *cpu = gd->arch.cpu;
/* better to query feature reporting register than just assume 1 */
if (cpu == &cpu_type_unknown)
@@ -166,7 +166,7 @@
*/
int cpu_numcores(void)
{
- struct cpu_type *cpu = gd->cpu;
+ struct cpu_type *cpu = gd->arch.cpu;
/*
* Report # of cores in terms of the cpu_mask if we haven't
@@ -196,7 +196,7 @@
svr = get_svr();
ver = SVR_SOC_VER(svr);
- gd->cpu = identify_cpu(ver);
+ gd->arch.cpu = identify_cpu(ver);
return 0;
}
@@ -204,7 +204,7 @@
/* Once in memory, compute mask & # cores once and save them off */
int fixup_cpu(void)
{
- struct cpu_type *cpu = gd->cpu;
+ struct cpu_type *cpu = gd->arch.cpu;
if (cpu->num_cores == 0) {
cpu->mask = cpu_mask();
diff --git a/arch/powerpc/cpu/mpc8xxx/law.c b/arch/powerpc/cpu/mpc8xxx/law.c
index ce1d71e..6f9d568 100644
--- a/arch/powerpc/cpu/mpc8xxx/law.c
+++ b/arch/powerpc/cpu/mpc8xxx/law.c
@@ -69,7 +69,7 @@
void set_law(u8 idx, phys_addr_t addr, enum law_size sz, enum law_trgt_if id)
{
- gd->used_laws |= (1 << idx);
+ gd->arch.used_laws |= (1 << idx);
out_be32(LAWAR_ADDR(idx), 0);
set_law_base_addr(idx, addr);
@@ -81,7 +81,7 @@
void disable_law(u8 idx)
{
- gd->used_laws &= ~(1 << idx);
+ gd->arch.used_laws &= ~(1 << idx);
out_be32(LAWAR_ADDR(idx), 0);
set_law_base_addr(idx, 0);
@@ -112,7 +112,7 @@
int set_next_law(phys_addr_t addr, enum law_size sz, enum law_trgt_if id)
{
- u32 idx = ffz(gd->used_laws);
+ u32 idx = ffz(gd->arch.used_laws);
if (idx >= FSL_HW_NUM_LAWS)
return -1;
@@ -128,11 +128,11 @@
u32 idx;
/* we have no LAWs free */
- if (gd->used_laws == -1)
+ if (gd->arch.used_laws == -1)
return -1;
/* grab the last free law */
- idx = __ilog2(~(gd->used_laws));
+ idx = __ilog2(~(gd->arch.used_laws));
if (idx >= FSL_HW_NUM_LAWS)
return -1;
@@ -240,9 +240,9 @@
int i;
#if FSL_HW_NUM_LAWS < 32
- gd->used_laws = ~((1 << FSL_HW_NUM_LAWS) - 1);
+ gd->arch.used_laws = ~((1 << FSL_HW_NUM_LAWS) - 1);
#elif FSL_HW_NUM_LAWS == 32
- gd->used_laws = 0;
+ gd->arch.used_laws = 0;
#else
#error FSL_HW_NUM_LAWS can not be greater than 32 w/o code changes
#endif
@@ -255,7 +255,7 @@
u32 lawar = in_be32(LAWAR_ADDR(i));
if (lawar & LAW_EN)
- gd->used_laws |= (1 << i);
+ gd->arch.used_laws |= (1 << i);
}
#if (defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL)) || \
diff --git a/arch/powerpc/cpu/ppc4xx/4xx_uart.c b/arch/powerpc/cpu/ppc4xx/4xx_uart.c
index 38ba60b..2ab185f 100644
--- a/arch/powerpc/cpu/ppc4xx/4xx_uart.c
+++ b/arch/powerpc/cpu/ppc4xx/4xx_uart.c
@@ -296,10 +296,10 @@
* the UART divisor is available
*/
#ifdef CONFIG_SYS_EXT_SERIAL_CLOCK
- gd->uart_clk = CONFIG_SYS_EXT_SERIAL_CLOCK;
+ gd->arch.uart_clk = CONFIG_SYS_EXT_SERIAL_CLOCK;
#else
get_sys_info(&sys_info);
- gd->uart_clk = sys_info.freqUART / udiv;
+ gd->arch.uart_clk = sys_info.freqUART / udiv;
#endif
return clk;
diff --git a/arch/powerpc/cpu/ppc4xx/fdt.c b/arch/powerpc/cpu/ppc4xx/fdt.c
index 5ddb880..37f5817 100644
--- a/arch/powerpc/cpu/ppc4xx/fdt.c
+++ b/arch/powerpc/cpu/ppc4xx/fdt.c
@@ -141,7 +141,7 @@
/*
* Fixup all UART clocks for CPU internal UARTs
- * (only these UARTs are definitely clocked by gd->uart_clk)
+ * (only these UARTs are definitely clocked by gd->arch.uart_clk)
*
* These UARTs are direct childs of /plb/opb. This code
* does not touch any UARTs that are connected to the ebc.
@@ -160,7 +160,7 @@
(fdt_node_check_compatible(blob, off, "ns16550") == 0))
fdt_setprop(blob, off,
"clock-frequency",
- (void*)&(gd->uart_clk), 4);
+ (void *)&gd->arch.uart_clk, 4);
}
/*
diff --git a/arch/powerpc/include/asm/global_data.h b/arch/powerpc/include/asm/global_data.h
index cb3a80b..d5db854 100644
--- a/arch/powerpc/include/asm/global_data.h
+++ b/arch/powerpc/include/asm/global_data.h
@@ -27,76 +27,61 @@
#include "config.h"
#include "asm/types.h"
-/*
- * The following data structure is placed in some memory wich is
- * available very early after boot (like DPRAM on MPC8xx/MPC82xx, or
- * some locked parts of the data cache) to allow for a minimum set of
- * global variables during system initialization (until we have set
- * up the memory controller so that we can use RAM).
- */
-
-typedef struct global_data {
- bd_t *bd;
- unsigned long flags;
- unsigned int baudrate;
- unsigned long cpu_clk; /* CPU clock in Hz! */
- unsigned long bus_clk;
+/* Architecture-specific global data */
+struct arch_global_data {
+#if defined(CONFIG_FSL_ESDHC)
+ u32 sdhc_clk;
+#endif
#if defined(CONFIG_8xx)
- unsigned long brg_clk;
+ unsigned long brg_clk;
#endif
#if defined(CONFIG_CPM2)
/* There are many clocks on the MPC8260 - see page 9-5 */
- unsigned long vco_out;
- unsigned long cpm_clk;
- unsigned long scc_clk;
- unsigned long brg_clk;
-#ifdef CONFIG_PCI
- unsigned long pci_clk;
+ unsigned long vco_out;
+ unsigned long cpm_clk;
+ unsigned long scc_clk;
+ unsigned long brg_clk;
#endif
-#endif
- unsigned long mem_clk;
+ /* TODO: sjg@chromium.org: Should these be unslgned long? */
#if defined(CONFIG_MPC83xx)
/* There are other clocks in the MPC83XX */
u32 csb_clk;
-#if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \
+# if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \
defined(CONFIG_MPC834x) || defined(CONFIG_MPC837x)
u32 tsec1_clk;
u32 tsec2_clk;
u32 usbdr_clk;
-#elif defined(CONFIG_MPC8309)
+# elif defined(CONFIG_MPC8309)
u32 usbdr_clk;
-#endif
-#if defined (CONFIG_MPC834x)
+# endif
+# if defined(CONFIG_MPC834x)
u32 usbmph_clk;
-#endif /* CONFIG_MPC834x */
-#if defined(CONFIG_MPC8315)
+# endif /* CONFIG_MPC834x */
+# if defined(CONFIG_MPC8315)
u32 tdm_clk;
-#endif
+# endif
u32 core_clk;
u32 enc_clk;
u32 lbiu_clk;
u32 lclk_clk;
- u32 pci_clk;
-#if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \
+# if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \
defined(CONFIG_MPC837x)
u32 pciexp1_clk;
u32 pciexp2_clk;
-#endif
-#if defined(CONFIG_MPC837x) || defined(CONFIG_MPC8315)
+# endif
+# if defined(CONFIG_MPC837x) || defined(CONFIG_MPC8315)
u32 sata_clk;
-#endif
-#if defined(CONFIG_MPC8360)
- u32 mem_sec_clk;
-#endif /* CONFIG_MPC8360 */
-#endif
-#if defined(CONFIG_FSL_ESDHC)
- u32 sdhc_clk;
+# endif
+# if defined(CONFIG_MPC8360)
+ u32 mem_sec_clk;
+# endif /* CONFIG_MPC8360 */
#endif
#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
u32 lbc_clk;
void *cpu;
#endif /* CONFIG_MPC85xx || CONFIG_MPC86xx */
-#if defined(CONFIG_MPC83xx) || defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
+#if defined(CONFIG_MPC83xx) || defined(CONFIG_MPC85xx) || \
+ defined(CONFIG_MPC86xx)
u32 i2c1_clk;
u32 i2c2_clk;
#endif
@@ -113,68 +98,32 @@
u32 used_tlb_cams[(CONFIG_SYS_NUM_TLBCAMS+31)/32];
#endif
#if defined(CONFIG_MPC5xxx)
- unsigned long ipb_clk;
- unsigned long pci_clk;
+ unsigned long ipb_clk;
#endif
#if defined(CONFIG_MPC512X)
u32 ips_clk;
u32 csb_clk;
- u32 pci_clk;
#endif /* CONFIG_MPC512X */
#if defined(CONFIG_MPC8220)
- unsigned long bExtUart;
- unsigned long inp_clk;
- unsigned long pci_clk;
- unsigned long vco_clk;
- unsigned long pev_clk;
- unsigned long flb_clk;
+ unsigned long inp_clk;
+ unsigned long vco_clk;
+ unsigned long pev_clk;
+ unsigned long flb_clk;
#endif
- phys_size_t ram_size; /* RAM size */
- unsigned long reset_status; /* reset status register at boot */
+ unsigned long reset_status; /* reset status register at boot */
#if defined(CONFIG_MPC83xx)
- unsigned long arbiter_event_attributes;
- unsigned long arbiter_event_address;
-#endif
- unsigned long env_addr; /* Address of Environment struct */
- unsigned long env_valid; /* Checksum of Environment valid? */
- unsigned long have_console; /* serial_init() was called */
-#ifdef CONFIG_PRE_CONSOLE_BUFFER
- unsigned long precon_buf_idx; /* Pre-Console buffer index */
+ unsigned long arbiter_event_attributes;
+ unsigned long arbiter_event_address;
#endif
#if defined(CONFIG_SYS_ALLOC_DPRAM) || defined(CONFIG_CPM2)
- unsigned int dp_alloc_base;
- unsigned int dp_alloc_top;
+ unsigned int dp_alloc_base;
+ unsigned int dp_alloc_top;
#endif
#if defined(CONFIG_4xx)
- u32 uart_clk;
+ u32 uart_clk;
#endif /* CONFIG_4xx */
#if defined(CONFIG_SYS_GT_6426x)
- unsigned int mirror_hack[16];
-#endif
-#if defined(CONFIG_A3000) || \
- defined(CONFIG_HIDDEN_DRAGON) || \
- defined(CONFIG_MUSENKI) || \
- defined(CONFIG_SANDPOINT)
- void * console_addr;
-#endif
- unsigned long relocaddr; /* Start address of U-Boot in RAM */
-#if defined(CONFIG_LCD) || defined(CONFIG_VIDEO)
- unsigned long fb_base; /* Base address of framebuffer memory */
-#endif
-#if defined(CONFIG_POST) || defined(CONFIG_LOGBUFFER)
- unsigned long post_log_word; /* Record POST activities */
- unsigned long post_log_res; /* success of POST test */
- unsigned long post_init_f_time; /* When post_init_f started */
-#endif
-#ifdef CONFIG_BOARD_TYPES
- unsigned long board_type;
-#endif
-#ifdef CONFIG_MODEM_SUPPORT
- unsigned long do_mdm_init;
- unsigned long be_quiet;
-#endif
-#if defined(CONFIG_LWMON) || defined(CONFIG_LWMON5)
- unsigned long kbd_status;
+ unsigned int mirror_hack[16];
#endif
#ifdef CONFIG_SYS_FPGA_COUNT
unsigned fpga_state[CONFIG_SYS_FPGA_COUNT];
@@ -182,11 +131,12 @@
#if defined(CONFIG_WD_MAX_RATE)
unsigned long long wdt_last; /* trace watch-dog triggering rate */
#endif
- void **jt; /* jump table */
- char env_buf[32]; /* buffer for getenv() before reloc. */
-} gd_t;
+#if defined(CONFIG_LWMON) || defined(CONFIG_LWMON5)
+ unsigned long kbd_status;
+#endif
+};
-#include <asm-generic/global_data_flags.h>
+#include <asm-generic/global_data.h>
#if 1
#define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("r2")
diff --git a/arch/powerpc/lib/board.c b/arch/powerpc/lib/board.c
index 6a7bf4b..12270a4 100644
--- a/arch/powerpc/lib/board.c
+++ b/arch/powerpc/lib/board.c
@@ -556,11 +556,11 @@
#endif
#if defined(CONFIG_MPC8220)
bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
- bd->bi_inpfreq = gd->inp_clk;
+ bd->bi_inpfreq = gd->arch.inp_clk;
bd->bi_pcifreq = gd->pci_clk;
- bd->bi_vcofreq = gd->vco_clk;
- bd->bi_pevfreq = gd->pev_clk;
- bd->bi_flbfreq = gd->flb_clk;
+ bd->bi_vcofreq = gd->arch.vco_clk;
+ bd->bi_pevfreq = gd->arch.pev_clk;
+ bd->bi_flbfreq = gd->arch.flb_clk;
/* store bootparam to sram (backward compatible), here? */
{
@@ -568,10 +568,10 @@
*sram++ = gd->ram_size;
*sram++ = gd->bus_clk;
- *sram++ = gd->inp_clk;
+ *sram++ = gd->arch.inp_clk;
*sram++ = gd->cpu_clk;
- *sram++ = gd->vco_clk;
- *sram++ = gd->flb_clk;
+ *sram++ = gd->arch.vco_clk;
+ *sram++ = gd->arch.flb_clk;
*sram++ = 0xb8c3ba11; /* boot signature */
}
#endif
@@ -580,16 +580,16 @@
bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
#if defined(CONFIG_CPM2)
- bd->bi_cpmfreq = gd->cpm_clk;
- bd->bi_brgfreq = gd->brg_clk;
- bd->bi_sccfreq = gd->scc_clk;
- bd->bi_vco = gd->vco_out;
+ bd->bi_cpmfreq = gd->arch.cpm_clk;
+ bd->bi_brgfreq = gd->arch.brg_clk;
+ bd->bi_sccfreq = gd->arch.scc_clk;
+ bd->bi_vco = gd->arch.vco_out;
#endif /* CONFIG_CPM2 */
#if defined(CONFIG_MPC512X)
- bd->bi_ipsfreq = gd->ips_clk;
+ bd->bi_ipsfreq = gd->arch.ips_clk;
#endif /* CONFIG_MPC512X */
#if defined(CONFIG_MPC5xxx)
- bd->bi_ipbfreq = gd->ipb_clk;
+ bd->bi_ipbfreq = gd->arch.ipb_clk;
bd->bi_pcifreq = gd->pci_clk;
#endif /* CONFIG_MPC5xxx */
bd->bi_baudrate = gd->baudrate; /* Console Baudrate */
@@ -649,10 +649,11 @@
#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
/*
- * The gd->cpu pointer is set to an address in flash before relocation.
- * We need to update it to point to the same CPU entry in RAM.
+ * The gd->arch.cpu pointer is set to an address in flash before
+ * relocation. We need to update it to point to the same CPU entry
+ * in RAM.
*/
- gd->cpu += dest_addr - CONFIG_SYS_MONITOR_BASE;
+ gd->arch.cpu += dest_addr - CONFIG_SYS_MONITOR_BASE;
/*
* If we didn't know the cpu mask & # cores, we can save them of
diff --git a/arch/sandbox/cpu/cpu.c b/arch/sandbox/cpu/cpu.c
index d7684d3..b2788d5 100644
--- a/arch/sandbox/cpu/cpu.c
+++ b/arch/sandbox/cpu/cpu.c
@@ -54,7 +54,7 @@
void *map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)
{
- return (void *)(gd->ram_buf + paddr);
+ return (void *)(gd->arch.ram_buf + paddr);
}
void flush_dcache_range(unsigned long start, unsigned long stop)
diff --git a/arch/sandbox/include/asm/global_data.h b/arch/sandbox/include/asm/global_data.h
index 78a751d..3bedf77 100644
--- a/arch/sandbox/include/asm/global_data.h
+++ b/arch/sandbox/include/asm/global_data.h
@@ -25,30 +25,13 @@
#ifndef __ASM_GBL_DATA_H
#define __ASM_GBL_DATA_H
-/*
- * The following data structure is placed in some memory wich is
- * available very early after boot (like DPRAM on MPC8xx/MPC82xx, or
- * some locked parts of the data cache) to allow for a minimum set of
- * global variables during system initialization (until we have set
- * up the memory controller so that we can use RAM).
- */
-typedef struct global_data {
- bd_t *bd;
- unsigned long flags;
- unsigned int baudrate;
- unsigned long have_console; /* serial_init() was called */
- unsigned long env_addr; /* Address of Environment struct */
- unsigned long env_valid; /* Checksum of Environment valid? */
- unsigned long fb_base; /* base address of frame buffer */
+/* Architecture-specific global data */
+struct arch_global_data {
u8 *ram_buf; /* emulated RAM buffer */
- phys_size_t ram_size; /* RAM size */
- const void *fdt_blob; /* Our device tree, NULL if none */
- void **jt; /* jump table */
- char env_buf[32]; /* buffer for getenv() before reloc. */
-} gd_t;
+};
-#include <asm-generic/global_data_flags.h>
+#include <asm-generic/global_data.h>
#define DECLARE_GLOBAL_DATA_PTR extern gd_t *gd
diff --git a/arch/sandbox/lib/board.c b/arch/sandbox/lib/board.c
index 83858c1..3752fab 100644
--- a/arch/sandbox/lib/board.c
+++ b/arch/sandbox/lib/board.c
@@ -174,7 +174,7 @@
mem = os_malloc(CONFIG_SYS_SDRAM_SIZE);
assert(mem);
- gd->ram_buf = mem;
+ gd->arch.ram_buf = mem;
addr = (ulong)(mem + size);
/*
@@ -227,8 +227,8 @@
#endif
/* The Malloc area is at the top of simulated DRAM */
- mem_malloc_init((ulong)gd->ram_buf + gd->ram_size - TOTAL_MALLOC_LEN,
- TOTAL_MALLOC_LEN);
+ mem_malloc_init((ulong)gd->arch.ram_buf + gd->ram_size -
+ TOTAL_MALLOC_LEN, TOTAL_MALLOC_LEN);
/* initialize environment */
env_relocate();
diff --git a/arch/sh/include/asm/global_data.h b/arch/sh/include/asm/global_data.h
index 9a2c193..0360230 100644
--- a/arch/sh/include/asm/global_data.h
+++ b/arch/sh/include/asm/global_data.h
@@ -27,24 +27,11 @@
#ifndef __ASM_SH_GLOBALDATA_H_
#define __ASM_SH_GLOBALDATA_H_
-typedef struct global_data
-{
- bd_t *bd;
- unsigned long flags;
- unsigned int baudrate;
- unsigned long cpu_clk; /* CPU clock in Hz! */
- unsigned long have_console; /* serial_init() was called */
-#ifdef CONFIG_PRE_CONSOLE_BUFFER
- unsigned long precon_buf_idx; /* Pre-Console buffer index */
-#endif
- phys_size_t ram_size; /* RAM size */
- unsigned long env_addr; /* Address of Environment struct */
- unsigned long env_valid; /* Checksum of Environment valid */
- void **jt; /* Standalone app jump table */
- char env_buf[32]; /* buffer for getenv() before reloc. */
-} gd_t;
+/* Architecture-specific global data */
+struct arch_global_data {
+};
-#include <asm-generic/global_data_flags.h>
+#include <asm-generic/global_data.h>
#define DECLARE_GLOBAL_DATA_PTR register gd_t *gd asm ("r13")
diff --git a/arch/sparc/include/asm/global_data.h b/arch/sparc/include/asm/global_data.h
index aa63b35..9f019b1 100644
--- a/arch/sparc/include/asm/global_data.h
+++ b/arch/sparc/include/asm/global_data.h
@@ -29,54 +29,11 @@
#include "asm/types.h"
-/*
- * The following data structure is placed in some memory wich is
- * available very early after boot (like DPRAM on MPC8xx/MPC82xx, or
- * some locked parts of the data cache) to allow for a minimum set of
- * global variables during system initialization (until we have set
- * up the memory controller so that we can use RAM).
- */
+/* Architecture-specific global data */
+struct arch_global_data {
+};
-typedef struct global_data {
- bd_t *bd;
- unsigned long flags;
- unsigned int baudrate;
- unsigned long cpu_clk; /* CPU clock in Hz! */
- unsigned long bus_clk;
-
- phys_size_t ram_size; /* RAM size */
- unsigned long reloc_off; /* Relocation Offset */
- unsigned long reset_status; /* reset status register at boot */
- unsigned long env_addr; /* Address of Environment struct */
- unsigned long env_valid; /* Checksum of Environment valid? */
- unsigned long have_console; /* serial_init() was called */
-
-#ifdef CONFIG_PRE_CONSOLE_BUFFER
- unsigned long precon_buf_idx; /* Pre-Console buffer index */
-#endif
-#if defined(CONFIG_LCD) || defined(CONFIG_VIDEO)
- unsigned long fb_base; /* Base address of framebuffer memory */
-#endif
-#if defined(CONFIG_POST) || defined(CONFIG_LOGBUFFER)
- unsigned long post_log_word; /* Record POST activities */
- unsigned long post_log_res; /* success of POST test */
- unsigned long post_init_f_time; /* When post_init_f started */
-#endif
-#ifdef CONFIG_BOARD_TYPES
- unsigned long board_type;
-#endif
-#ifdef CONFIG_MODEM_SUPPORT
- unsigned long do_mdm_init;
- unsigned long be_quiet;
-#endif
-#ifdef CONFIG_LWMON
- unsigned long kbd_status;
-#endif
- void **jt; /* jump table */
- char env_buf[32]; /* buffer for getenv() before reloc. */
-} gd_t;
-
-#include <asm-generic/global_data_flags.h>
+#include <asm-generic/global_data.h>
#define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("%g7")
diff --git a/arch/x86/cpu/cpu.c b/arch/x86/cpu/cpu.c
index 315e87a..6a23974 100644
--- a/arch/x86/cpu/cpu.c
+++ b/arch/x86/cpu/cpu.c
@@ -100,7 +100,9 @@
gdt_addr[X86_GDT_ENTRY_32BIT_DS] = GDT_ENTRY(0xc093, 0, 0xfffff);
/* FS: data, read/write, 4 GB, base (Global Data Pointer) */
- gdt_addr[X86_GDT_ENTRY_32BIT_FS] = GDT_ENTRY(0xc093, (ulong)id, 0xfffff);
+ id->arch.gd_addr = id;
+ gdt_addr[X86_GDT_ENTRY_32BIT_FS] = GDT_ENTRY(0xc093,
+ (ulong)&id->arch.gd_addr, 0xfffff);
/* 16-bit CS: code, read/execute, 64 kB, base 0 */
gdt_addr[X86_GDT_ENTRY_16BIT_CS] = GDT_ENTRY(0x109b, 0, 0x0ffff);
diff --git a/arch/x86/cpu/start.S b/arch/x86/cpu/start.S
index e960e21..f389584 100644
--- a/arch/x86/cpu/start.S
+++ b/arch/x86/cpu/start.S
@@ -113,9 +113,6 @@
/* Set second parameter to setup_gdt */
movl %esp, %edx
- /* gd->gd_addr = gd (Required to allow gd->xyz to work) */
- movl %eax, (%eax)
-
/* Setup global descriptor table so gd->xyz works */
call setup_gdt
@@ -171,9 +168,6 @@
/* Set second parameter to setup_gdt */
movl %esp, %edx
- /* gd->gd_addr = gd (Required to allow gd->xyz to work) */
- movl %eax, (%eax)
-
/* Setup global descriptor table so gd->xyz works */
call setup_gdt
diff --git a/arch/x86/include/asm/global_data.h b/arch/x86/include/asm/global_data.h
index dc6402b..8a96fc9 100644
--- a/arch/x86/include/asm/global_data.h
+++ b/arch/x86/include/asm/global_data.h
@@ -23,46 +23,19 @@
#ifndef __ASM_GBL_DATA_H
#define __ASM_GBL_DATA_H
-/*
- * The following data structure is placed in some memory wich is
- * available very early after boot (like DPRAM on MPC8xx/MPC82xx, or
- * some locked parts of the data cache) to allow for a minimum set of
- * global variables during system initialization (until we have set
- * up the memory controller so that we can use RAM).
- */
#ifndef __ASSEMBLY__
-#include <asm/u-boot.h>
-
-typedef struct global_data gd_t;
-
-struct global_data {
- /* NOTE: gd_addr MUST be first member of struct global_data! */
- gd_t *gd_addr; /* Location of Global Data */
- bd_t *bd;
- unsigned long flags;
- unsigned int baudrate;
- unsigned long have_console; /* serial_init() was called */
-#ifdef CONFIG_PRE_CONSOLE_BUFFER
- unsigned long precon_buf_idx; /* Pre-Console buffer index */
-#endif
- unsigned long reloc_off; /* Relocation Offset */
- unsigned long load_off; /* Load Offset */
- unsigned long env_addr; /* Address of Environment struct */
- unsigned long env_valid; /* Checksum of Environment valid? */
- unsigned long cpu_clk; /* CPU clock in Hz! */
- unsigned long bus_clk;
- unsigned long relocaddr; /* Start address of U-Boot in RAM */
- unsigned long start_addr_sp; /* start_addr_stackpointer */
- unsigned long gdt_addr; /* Location of GDT */
- phys_size_t ram_size; /* RAM size */
- unsigned long reset_status; /* reset status register at boot */
- const void *fdt_blob; /* Our device tree, NULL if none */
- void **jt; /* jump table */
- char env_buf[32]; /* buffer for getenv() before reloc. */
+/* Architecture-specific global data */
+struct arch_global_data {
+ struct global_data *gd_addr; /* Location of Global Data */
};
+#endif
+
+#include <asm-generic/global_data.h>
+
+#ifndef __ASSEMBLY__
static inline gd_t *get_fs_gd_ptr(void)
{
gd_t *gd_ptr;
@@ -76,8 +49,6 @@
#endif
-#include <asm-generic/global_data_flags.h>
-
/*
* Our private Global Data Flags
*/
diff --git a/board/evb64260/mpsc.c b/board/evb64260/mpsc.c
index f3dc20b..9c211ac 100644
--- a/board/evb64260/mpsc.c
+++ b/board/evb64260/mpsc.c
@@ -88,7 +88,7 @@
/* GT64240A errata: cant read MPSC/BRG registers... so make mirrors in ram for read/modify write */
-#define MIRROR_HACK ((struct _tag_mirror_hack *)&(gd->mirror_hack[0]))
+#define MIRROR_HACK ((struct _tag_mirror_hack *)&(gd->arch.mirror_hack[0]))
#define GT_REG_WRITE_MIRROR_G(a,d) {MIRROR_HACK->a ## _M = d; GT_REG_WRITE(a,d);}
#define GTREGREAD_MIRROR_G(a) (MIRROR_HACK->a ## _M)
diff --git a/board/freescale/b4860qds/b4860qds.c b/board/freescale/b4860qds/b4860qds.c
index 3c470db..41887c2 100644
--- a/board/freescale/b4860qds/b4860qds.c
+++ b/board/freescale/b4860qds/b4860qds.c
@@ -50,7 +50,7 @@
{
char buf[64];
u8 sw;
- struct cpu_type *cpu = gd->cpu;
+ struct cpu_type *cpu = gd->arch.cpu;
ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
unsigned int i;
static const char *const freq[] = {"100", "125", "156.25", "161.13",
diff --git a/board/freescale/bsc9131rdb/bsc9131rdb.c b/board/freescale/bsc9131rdb/bsc9131rdb.c
index 2e0e55f..fe870b6 100644
--- a/board/freescale/bsc9131rdb/bsc9131rdb.c
+++ b/board/freescale/bsc9131rdb/bsc9131rdb.c
@@ -59,7 +59,7 @@
{
struct cpu_type *cpu;
- cpu = gd->cpu;
+ cpu = gd->arch.cpu;
printf("Board: %sRDB\n", cpu->name);
return 0;
diff --git a/board/freescale/bsc9132qds/bsc9132qds.c b/board/freescale/bsc9132qds/bsc9132qds.c
index bcac5c1..6e1b558 100644
--- a/board/freescale/bsc9132qds/bsc9132qds.c
+++ b/board/freescale/bsc9132qds/bsc9132qds.c
@@ -184,7 +184,7 @@
struct cpu_type *cpu;
u8 sw;
- cpu = gd->cpu;
+ cpu = gd->arch.cpu;
printf("Board: %sQDS\n", cpu->name);
printf("Sys ID: 0x%02x, Sys Ver: 0x%02x, FPGA Ver: 0x%02x,\n",
diff --git a/board/freescale/corenet_ds/corenet_ds.c b/board/freescale/corenet_ds/corenet_ds.c
index 21428e3..48f7155 100644
--- a/board/freescale/corenet_ds/corenet_ds.c
+++ b/board/freescale/corenet_ds/corenet_ds.c
@@ -42,7 +42,7 @@
int checkboard (void)
{
u8 sw;
- struct cpu_type *cpu = gd->cpu;
+ struct cpu_type *cpu = gd->arch.cpu;
ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
unsigned int i;
static const char * const freq[] = {"100", "125", "156.25", "212.5" };
diff --git a/board/freescale/p1010rdb/ddr.c b/board/freescale/p1010rdb/ddr.c
index 6d00caf..49310bd 100644
--- a/board/freescale/p1010rdb/ddr.c
+++ b/board/freescale/p1010rdb/ddr.c
@@ -99,7 +99,7 @@
struct cpu_type *cpu;
phys_size_t ddr_size;
- cpu = gd->cpu;
+ cpu = gd->arch.cpu;
/* P1014 and it's derivatives support max 16it DDR width */
if (cpu->soc_ver == SVR_P1014)
ddr_size = (CONFIG_SYS_DRAM_SIZE / 2);
@@ -144,7 +144,7 @@
panic("Unsupported DDR data rate %s MT/s data rate\n",
strmhz(buf, ddr_freq));
- cpu = gd->cpu;
+ cpu = gd->arch.cpu;
/* P1014 and it's derivatives support max 16bit DDR width */
if (cpu->soc_ver == SVR_P1014) {
ddr_cfg_regs.ddr_sdram_cfg &= ~SDRAM_CFG_DBW_MASK;
@@ -237,7 +237,7 @@
popts->trwt_override = 1;
popts->trwt = 0;
- cpu = gd->cpu;
+ cpu = gd->arch.cpu;
/* P1014 and it's derivatives support max 16it DDR width */
if (cpu->soc_ver == SVR_P1014)
popts->data_bus_width = DDR_DATA_BUS_WIDTH_16;
diff --git a/board/freescale/p1010rdb/p1010rdb.c b/board/freescale/p1010rdb/p1010rdb.c
index dfeb86f..11e2e8a 100644
--- a/board/freescale/p1010rdb/p1010rdb.c
+++ b/board/freescale/p1010rdb/p1010rdb.c
@@ -164,7 +164,7 @@
{
struct cpu_type *cpu;
- cpu = gd->cpu;
+ cpu = gd->arch.cpu;
printf("Board: %sRDB\n", cpu->name);
return 0;
@@ -178,7 +178,7 @@
struct cpu_type *cpu;
int num = 0;
- cpu = gd->cpu;
+ cpu = gd->arch.cpu;
#ifdef CONFIG_TSEC1
SET_STD_TSEC_INFO(tsec_info[num], 1);
@@ -283,7 +283,7 @@
phys_size_t size;
struct cpu_type *cpu;
- cpu = gd->cpu;
+ cpu = gd->arch.cpu;
ft_cpu_setup(blob, bd);
diff --git a/board/freescale/p1_p2_rdb/ddr.c b/board/freescale/p1_p2_rdb/ddr.c
index 916439c..b16b8c8 100644
--- a/board/freescale/p1_p2_rdb/ddr.c
+++ b/board/freescale/p1_p2_rdb/ddr.c
@@ -202,7 +202,7 @@
struct cpu_type *cpu;
ulong ddr_freq, ddr_freq_mhz;
- cpu = gd->cpu;
+ cpu = gd->arch.cpu;
/* P1020 and it's derivatives support max 32bit DDR width */
if (cpu->soc_ver == SVR_P1020 || cpu->soc_ver == SVR_P1011) {
ddr_size = (CONFIG_SYS_SDRAM_SIZE * 1024 * 1024 / 2);
diff --git a/board/freescale/p1_p2_rdb/p1_p2_rdb.c b/board/freescale/p1_p2_rdb/p1_p2_rdb.c
index 437eaf0..9c6683d 100644
--- a/board/freescale/p1_p2_rdb/p1_p2_rdb.c
+++ b/board/freescale/p1_p2_rdb/p1_p2_rdb.c
@@ -108,7 +108,7 @@
else
panic ("Unexpected Board REV %x detected!!\n", board_rev_gpio);
- cpu = gd->cpu;
+ cpu = gd->arch.cpu;
printf ("Board: %sRDB Rev%c\n", cpu->name, board_rev);
setbits_be32(&pgpio->gpdir, GPIO_DIR);
diff --git a/board/freescale/p2041rdb/p2041rdb.c b/board/freescale/p2041rdb/p2041rdb.c
index 4e4d18f..a706a6d 100644
--- a/board/freescale/p2041rdb/p2041rdb.c
+++ b/board/freescale/p2041rdb/p2041rdb.c
@@ -43,7 +43,7 @@
int checkboard(void)
{
u8 sw;
- struct cpu_type *cpu = gd->cpu;
+ struct cpu_type *cpu = gd->arch.cpu;
ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
unsigned int i;
diff --git a/board/freescale/t4qds/t4qds.c b/board/freescale/t4qds/t4qds.c
index e81846f..3c95f3f 100644
--- a/board/freescale/t4qds/t4qds.c
+++ b/board/freescale/t4qds/t4qds.c
@@ -58,7 +58,7 @@
{
char buf[64];
u8 sw;
- struct cpu_type *cpu = gd->cpu;
+ struct cpu_type *cpu = gd->arch.cpu;
ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
unsigned int i;
diff --git a/board/gdsys/405ep/405ep.c b/board/gdsys/405ep/405ep.c
index bc9b7d0..6221171 100644
--- a/board/gdsys/405ep/405ep.c
+++ b/board/gdsys/405ep/405ep.c
@@ -38,14 +38,14 @@
int get_fpga_state(unsigned dev)
{
- return gd->fpga_state[dev];
+ return gd->arch.fpga_state[dev];
}
void print_fpga_state(unsigned dev)
{
- if (gd->fpga_state[dev] & FPGA_STATE_DONE_FAILED)
+ if (gd->arch.fpga_state[dev] & FPGA_STATE_DONE_FAILED)
puts(" Waiting for FPGA-DONE timed out.\n");
- if (gd->fpga_state[dev] & FPGA_STATE_REFLECTION_FAILED)
+ if (gd->arch.fpga_state[dev] & FPGA_STATE_REFLECTION_FAILED)
puts(" FPGA reflection test failed.\n");
}
@@ -54,7 +54,7 @@
unsigned k;
for (k = 0; k < CONFIG_SYS_FPGA_COUNT; ++k)
- gd->fpga_state[k] = 0;
+ gd->arch.fpga_state[k] = 0;
mtdcr(UIC0SR, 0xFFFFFFFF); /* clear all ints */
mtdcr(UIC0ER, 0x00000000); /* disable all ints */
@@ -78,7 +78,7 @@
unsigned ctr;
for (k = 0; k < CONFIG_SYS_FPGA_COUNT; ++k)
- gd->fpga_state[k] = 0;
+ gd->arch.fpga_state[k] = 0;
/*
* reset FPGA
@@ -94,7 +94,8 @@
while (!gd405ep_get_fpga_done(k)) {
udelay(100000);
if (ctr++ > 5) {
- gd->fpga_state[k] |= FPGA_STATE_DONE_FAILED;
+ gd->arch.fpga_state[k] |=
+ FPGA_STATE_DONE_FAILED;
break;
}
}
@@ -126,7 +127,7 @@
udelay(100000);
if (ctr++ > 5) {
- gd->fpga_state[k] |=
+ gd->arch.fpga_state[k] |=
FPGA_STATE_REFLECTION_FAILED;
break;
}
diff --git a/board/gdsys/405ex/405ex.c b/board/gdsys/405ex/405ex.c
index 5766c0f..32e24c0 100644
--- a/board/gdsys/405ex/405ex.c
+++ b/board/gdsys/405ex/405ex.c
@@ -15,14 +15,14 @@
int get_fpga_state(unsigned dev)
{
- return gd->fpga_state[dev];
+ return gd->arch.fpga_state[dev];
}
void print_fpga_state(unsigned dev)
{
- if (gd->fpga_state[dev] & FPGA_STATE_DONE_FAILED)
+ if (gd->arch.fpga_state[dev] & FPGA_STATE_DONE_FAILED)
puts(" Waiting for FPGA-DONE timed out.\n");
- if (gd->fpga_state[dev] & FPGA_STATE_REFLECTION_FAILED)
+ if (gd->arch.fpga_state[dev] & FPGA_STATE_REFLECTION_FAILED)
puts(" FPGA reflection test failed.\n");
}
@@ -192,7 +192,7 @@
unsigned ctr;
for (k = 0; k < CONFIG_SYS_FPGA_COUNT; ++k)
- gd->fpga_state[k] = 0;
+ gd->arch.fpga_state[k] = 0;
/*
* reset FPGA
@@ -208,7 +208,8 @@
while (!gd405ex_get_fpga_done(k)) {
udelay(100000);
if (ctr++ > 5) {
- gd->fpga_state[k] |= FPGA_STATE_DONE_FAILED;
+ gd->arch.fpga_state[k] |=
+ FPGA_STATE_DONE_FAILED;
break;
}
}
@@ -240,7 +241,7 @@
udelay(100000);
if (ctr++ > 5) {
- gd->fpga_state[k] |=
+ gd->arch.fpga_state[k] |=
FPGA_STATE_REFLECTION_FAILED;
break;
}
diff --git a/board/gdsys/405ex/io64.c b/board/gdsys/405ex/io64.c
index 41fdef7..7d2899d 100644
--- a/board/gdsys/405ex/io64.c
+++ b/board/gdsys/405ex/io64.c
@@ -359,7 +359,7 @@
if (i2c_probe(0x22)) { /* i2c_probe returns 0 on success */
for (k = 0; k < CONFIG_SYS_FPGA_COUNT; ++k)
- gd->fpga_state[k] |= FPGA_STATE_PLATFORM;
+ gd->arch.fpga_state[k] |= FPGA_STATE_PLATFORM;
} else {
pca9698_direction_output(0x22, 39, 1);
}
diff --git a/board/inka4x0/inkadiag.c b/board/inka4x0/inkadiag.c
index cf82f61..1c01bb4 100644
--- a/board/inka4x0/inkadiag.c
+++ b/board/inka4x0/inkadiag.c
@@ -187,7 +187,7 @@
/* select clock sources */
out_be16(&psc->psc_clock_select, 0);
- baseclk = (gd->ipb_clk + 16) / 32;
+ baseclk = (gd->arch.ipb_clk + 16) / 32;
/* switch to UART mode */
out_be32(&psc->sicr, 0);
@@ -369,7 +369,7 @@
{
volatile struct mpc5xxx_gpt *gpt = (struct mpc5xxx_gpt *)(BUZZER_GPT);
- const u32 prescale = gd->ipb_clk / freq / 128;
+ const u32 prescale = gd->arch.ipb_clk / freq / 128;
const u32 count = 128;
const u32 width = 64;
@@ -405,9 +405,9 @@
freq = simple_strtol(argv[0], NULL, 0);
/* avoid zero prescale in buzzer_turn_on() */
- if (freq > gd->ipb_clk / 128) {
+ if (freq > gd->arch.ipb_clk / 128) {
printf("%dHz exceeds maximum (%ldHz)\n", freq,
- gd->ipb_clk / 128);
+ gd->arch.ipb_clk / 128);
} else if (!freq)
printf("Zero frequency is senseless\n");
else
diff --git a/board/lwmon/lwmon.c b/board/lwmon/lwmon.c
index b5e524b..34c6675 100644
--- a/board/lwmon/lwmon.c
+++ b/board/lwmon/lwmon.c
@@ -482,7 +482,7 @@
i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
- gd->kbd_status = 0;
+ gd->arch.kbd_status = 0;
/* Forced by PIC. Delays <= 175us loose */
udelay(1000);
@@ -496,7 +496,7 @@
/* clear "irrelevant" bits. Recommended by Martin Rajek, LWN */
errcd &= ~(KEYBD_STATUS_H_RESET|KEYBD_STATUS_BROWNOUT);
if (errcd) {
- gd->kbd_status |= errcd << 8;
+ gd->arch.kbd_status |= errcd << 8;
}
/* Reset error code and verify */
val = KEYBD_CMD_RESET_ERRORS;
@@ -509,7 +509,7 @@
val &= KEYBD_STATUS_MASK; /* clear unused bits */
if (val) { /* permanent error, report it */
- gd->kbd_status |= val;
+ gd->arch.kbd_status |= val;
return;
}
@@ -568,8 +568,8 @@
{
uchar kbd_data[KEYBD_DATALEN];
char keybd_env[2 * KEYBD_DATALEN + 1];
- uchar kbd_init_status = gd->kbd_status >> 8;
- uchar kbd_status = gd->kbd_status;
+ uchar kbd_init_status = gd->arch.kbd_status >> 8;
+ uchar kbd_status = gd->arch.kbd_status;
uchar val;
char *str;
int i;
diff --git a/board/lwmon5/kbd.c b/board/lwmon5/kbd.c
index 5231c7a..b66f681 100644
--- a/board/lwmon5/kbd.c
+++ b/board/lwmon5/kbd.c
@@ -113,7 +113,7 @@
i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
- gd->kbd_status = 0;
+ gd->arch.kbd_status = 0;
/* Forced by PIC. Delays <= 175us loose */
udelay(1000);
@@ -127,7 +127,7 @@
/* clear "irrelevant" bits. Recommended by Martin Rajek, LWN */
errcd &= ~(KEYBD_STATUS_H_RESET|KEYBD_STATUS_BROWNOUT);
if (errcd) {
- gd->kbd_status |= errcd << 8;
+ gd->arch.kbd_status |= errcd << 8;
}
/* Reset error code and verify */
val = KEYBD_CMD_RESET_ERRORS;
@@ -140,7 +140,7 @@
val &= KEYBD_STATUS_MASK; /* clear unused bits */
if (val) { /* permanent error, report it */
- gd->kbd_status |= val;
+ gd->arch.kbd_status |= val;
return;
}
@@ -216,8 +216,8 @@
{
uchar kbd_data[KEYBD_DATALEN];
char keybd_env[2 * KEYBD_DATALEN + 1];
- uchar kbd_init_status = gd->kbd_status >> 8;
- uchar kbd_status = gd->kbd_status;
+ uchar kbd_init_status = gd->arch.kbd_status >> 8;
+ uchar kbd_status = gd->arch.kbd_status;
uchar val;
ushort data, inv_data;
char *str;
diff --git a/board/lwmon5/lwmon5.c b/board/lwmon5/lwmon5.c
index ecd9536..29e24fb 100644
--- a/board/lwmon5/lwmon5.c
+++ b/board/lwmon5/lwmon5.c
@@ -357,16 +357,16 @@
* Don't allow watch-dog triggering more frequently than
* the predefined value CONFIG_WD_MAX_RATE [ticks].
*/
- if (ct >= gd->wdt_last) {
- if ((ct - gd->wdt_last) < CONFIG_WD_MAX_RATE)
+ if (ct >= gd->arch.wdt_last) {
+ if ((ct - gd->arch.wdt_last) < CONFIG_WD_MAX_RATE)
return;
} else {
/* Time base counter had been reset */
- if (((unsigned long long)(-1) - gd->wdt_last + ct) <
+ if (((unsigned long long)(-1) - gd->arch.wdt_last + ct) <
CONFIG_WD_MAX_RATE)
return;
}
- gd->wdt_last = get_ticks();
+ gd->arch.wdt_last = get_ticks();
#endif
/*
diff --git a/board/sc3/init.S b/board/sc3/init.S
index d374db4..6352368 100644
--- a/board/sc3/init.S
+++ b/board/sc3/init.S
@@ -71,7 +71,8 @@
* This is need for the external flash access
*/
lis r25,0x0800
- ori r25,r25,0x0280 /* 0000 1000 0xxx 0000 0000 0010 100x xxxx = 0x03800280
+ /* 0000 1000 0xxx 0000 0000 0010 100x xxxx = 0x03800280 */
+ ori r25,r25,0x0280
/*
* Second, create a fast timing:
* 90ns first cycle - 3 clock access
@@ -79,7 +80,8 @@
* This is used for the internal access
*/
lis r26,0x8900
- ori r26,r26,0x0280 /* 1000 1001 0xxx 0000 0000 0010 100x xxxx
+ /* 1000 1001 0xxx 0000 0000 0010 100x xxxx */
+ ori r26,r26,0x0280
/*
* We can't change settings on CS# if we currently use them.
* -> load a few instructions into cache and run this code from cache
diff --git a/common/cmd_bdinfo.c b/common/cmd_bdinfo.c
index 28b5241..85279d5 100644
--- a/common/cmd_bdinfo.c
+++ b/common/cmd_bdinfo.c
@@ -388,13 +388,15 @@
#endif
printf("baudrate = %u bps\n", bd->bi_baudrate);
#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
- print_num("TLB addr", gd->tlb_addr);
+ print_num("TLB addr", gd->arch.tlb_addr);
#endif
print_num("relocaddr", gd->relocaddr);
print_num("reloc off", gd->reloc_off);
print_num("irq_sp", gd->irq_sp); /* irq stack pointer */
print_num("sp start ", gd->start_addr_sp);
+#if defined(CONFIG_LCD) || defined(CONFIG_VIDEO)
print_num("FB base ", gd->fb_base);
+#endif
/*
* TODO: Currently only support for davinci SOC's is added.
* Remove this check once all the board implement this.
@@ -480,7 +482,9 @@
print_eth(0);
printf("ip_addr = %s\n", getenv("ipaddr"));
#endif
+#if defined(CONFIG_LCD) || defined(CONFIG_VIDEO)
print_num("FB base ", gd->fb_base);
+#endif
return 0;
}
diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c
index 1b8a8c1..7ae5d5b 100644
--- a/common/cmd_bootm.c
+++ b/common/cmd_bootm.c
@@ -498,7 +498,8 @@
return CMD_RET_USAGE;
}
- if (images.state >= state) {
+ if (images.state < BOOTM_STATE_START ||
+ images.state >= state) {
printf("Trying to execute a command out of order\n");
return CMD_RET_USAGE;
}
diff --git a/common/cmd_immap.c b/common/cmd_immap.c
index 1f59c1e..fdf9489 100644
--- a/common/cmd_immap.c
+++ b/common/cmd_immap.c
@@ -453,7 +453,7 @@
#if defined(CONFIG_8xx)
ulong clock = gd->cpu_clk;
#elif defined(CONFIG_8260)
- ulong clock = gd->brg_clk;
+ ulong clock = gd->arch.brg_clk;
#endif
printf ("BRG%d:", n);
diff --git a/common/cmd_time.c b/common/cmd_time.c
index 6dbdbbf..9808cd6 100644
--- a/common/cmd_time.c
+++ b/common/cmd_time.c
@@ -22,36 +22,6 @@
#include <common.h>
#include <command.h>
-/*
- * TODO(clchiou): This function actually minics the bottom-half of the
- * run_command() function. Since this function has ARM-dependent timer
- * codes, we cannot merge it with the run_command() for now.
- */
-static int run_command_and_time_it(int flag, int argc, char * const argv[],
- ulong *cycles)
-{
- cmd_tbl_t *cmdtp = find_cmd(argv[0]);
- int retval = 0;
-
- if (!cmdtp) {
- printf("%s: command not found\n", argv[0]);
- return 1;
- }
- if (argc > cmdtp->maxargs)
- return CMD_RET_USAGE;
-
- /*
- * TODO(clchiou): get_timer_masked() is only defined in certain ARM
- * boards. We could use the new timer API that Graeme is proposing
- * so that this piece of code would be arch-independent.
- */
- *cycles = get_timer_masked();
- retval = cmdtp->cmd(cmdtp, flag, argc, argv);
- *cycles = get_timer_masked() - *cycles;
-
- return retval;
-}
-
static void report_time(ulong cycles)
{
ulong minutes, seconds, milliseconds;
@@ -75,11 +45,12 @@
{
ulong cycles = 0;
int retval = 0;
+ int repeatable;
if (argc == 1)
return CMD_RET_USAGE;
- retval = run_command_and_time_it(0, argc - 1, argv + 1, &cycles);
+ retval = cmd_process(0, argc - 1, argv + 1, &repeatable, &cycles);
report_time(cycles);
return retval;
diff --git a/common/command.c b/common/command.c
index 50c8429..305a236 100644
--- a/common/command.c
+++ b/common/command.c
@@ -513,7 +513,7 @@
}
enum command_ret_t cmd_process(int flag, int argc, char * const argv[],
- int *repeatable)
+ int *repeatable, ulong *ticks)
{
enum command_ret_t rc = CMD_RET_SUCCESS;
cmd_tbl_t *cmdtp;
@@ -543,7 +543,11 @@
/* If OK so far, then do the command */
if (!rc) {
+ if (ticks)
+ *ticks = get_timer(0);
rc = cmd_call(cmdtp, flag, argc, argv);
+ if (ticks)
+ *ticks = get_timer(*ticks);
*repeatable &= cmdtp->repeatable;
}
if (rc == CMD_RET_USAGE)
diff --git a/common/env_mmc.c b/common/env_mmc.c
index ce21671..02bd5ae 100644
--- a/common/env_mmc.c
+++ b/common/env_mmc.c
@@ -46,13 +46,11 @@
#define CONFIG_ENV_OFFSET 0
#endif
-static int __mmc_get_env_addr(struct mmc *mmc, u32 *env_addr)
+__weak int mmc_get_env_addr(struct mmc *mmc, u32 *env_addr)
{
*env_addr = CONFIG_ENV_OFFSET;
return 0;
}
-int mmc_get_env_addr(struct mmc *mmc, u32 *env_addr)
- __attribute__((weak, alias("__mmc_get_env_addr")));
int env_init(void)
{
diff --git a/common/hush.c b/common/hush.c
index eb6c879..cc81c9c 100644
--- a/common/hush.c
+++ b/common/hush.c
@@ -1665,7 +1665,7 @@
}
/* Process the command */
return cmd_process(flag, child->argc, child->argv,
- &flag_repeat);
+ &flag_repeat, NULL);
#endif
}
#ifndef __U_BOOT__
diff --git a/common/main.c b/common/main.c
index 5d8454e..e2d2e09 100644
--- a/common/main.c
+++ b/common/main.c
@@ -225,6 +225,7 @@
int abortboot(int bootdelay)
{
int abort = 0;
+ unsigned long ts;
#ifdef CONFIG_MENUPROMPT
printf(CONFIG_MENUPROMPT);
@@ -248,11 +249,10 @@
#endif
while ((bootdelay > 0) && (!abort)) {
- int i;
-
--bootdelay;
- /* delay 100 * 10ms */
- for (i=0; !abort && i<100; ++i) {
+ /* delay 1000 ms */
+ ts = get_timer(0);
+ do {
if (tstc()) { /* we got a key press */
abort = 1; /* don't auto boot */
bootdelay = 0; /* no more delay */
@@ -264,7 +264,7 @@
break;
}
udelay(10000);
- }
+ } while (!abort && get_timer(ts) < 1000);
printf("\b\b\b%2d ", bootdelay);
}
@@ -1452,7 +1452,7 @@
continue;
}
- if (cmd_process(flag, argc, argv, &repeatable))
+ if (cmd_process(flag, argc, argv, &repeatable, NULL))
rc = -1;
/* Did the user stop this? */
diff --git a/common/stdio.c b/common/stdio.c
index 97ff9cf..5d5117c 100644
--- a/common/stdio.c
+++ b/common/stdio.c
@@ -207,7 +207,7 @@
/* Initialize the list */
INIT_LIST_HEAD(&(devs.list));
-#ifdef CONFIG_ARM_DCC_MULTI
+#ifdef CONFIG_ARM_DCC
drv_arm_dcc_init ();
#endif
#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
diff --git a/drivers/block/systemace.c b/drivers/block/systemace.c
index 87c6cbc..bf29cbb 100644
--- a/drivers/block/systemace.c
+++ b/drivers/block/systemace.c
@@ -83,7 +83,7 @@
}
static unsigned long systemace_read(int dev, unsigned long start,
- unsigned long blkcnt, void *buffer);
+ lbaint_t blkcnt, void *buffer);
static block_dev_desc_t systemace_dev = { 0 };
@@ -149,7 +149,7 @@
* number of blocks read. A zero return indicates an error.
*/
static unsigned long systemace_read(int dev, unsigned long start,
- unsigned long blkcnt, void *buffer)
+ lbaint_t blkcnt, void *buffer)
{
int retry;
unsigned blk_countdown;
diff --git a/drivers/i2c/fsl_i2c.c b/drivers/i2c/fsl_i2c.c
index 3cb232f..1c7265d 100644
--- a/drivers/i2c/fsl_i2c.c
+++ b/drivers/i2c/fsl_i2c.c
@@ -217,9 +217,9 @@
static unsigned int get_i2c_clock(int bus)
{
if (bus)
- return gd->i2c2_clk; /* I2C2 clock */
+ return gd->arch.i2c2_clk; /* I2C2 clock */
else
- return gd->i2c1_clk; /* I2C1 clock */
+ return gd->arch.i2c1_clk; /* I2C1 clock */
}
void
@@ -468,7 +468,8 @@
int i2c_set_bus_speed(unsigned int speed)
{
- unsigned int i2c_clk = (i2c_bus_num == 1) ? gd->i2c2_clk : gd->i2c1_clk;
+ unsigned int i2c_clk = (i2c_bus_num == 1)
+ ? gd->arch.i2c2_clk : gd->arch.i2c1_clk;
writeb(0, &i2c_dev[i2c_bus_num]->cr); /* stop controller */
i2c_bus_speed[i2c_bus_num] =
diff --git a/drivers/input/ps2ser.c b/drivers/input/ps2ser.c
index a655a16..bcbe52a 100644
--- a/drivers/input/ps2ser.c
+++ b/drivers/input/ps2ser.c
@@ -80,7 +80,7 @@
/* select clock sources */
psc->psc_clock_select = 0;
- baseclk = (gd->ipb_clk + 16) / 32;
+ baseclk = (gd->arch.ipb_clk + 16) / 32;
/* switch to UART mode */
psc->sicr = 0;
diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index 3d5c9c0..b90f3e7 100644
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -583,7 +583,7 @@
mmc->host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
mmc->f_min = 400000;
- mmc->f_max = MIN(gd->sdhc_clk, 52000000);
+ mmc->f_max = MIN(gd->arch.sdhc_clk, 52000000);
mmc->b_max = 0;
mmc_register(mmc);
@@ -598,7 +598,7 @@
cfg = malloc(sizeof(struct fsl_esdhc_cfg));
memset(cfg, 0, sizeof(struct fsl_esdhc_cfg));
cfg->esdhc_base = CONFIG_SYS_FSL_ESDHC_ADDR;
- cfg->sdhc_clk = gd->sdhc_clk;
+ cfg->sdhc_clk = gd->arch.sdhc_clk;
return fsl_esdhc_initialize(bis, cfg);
}
@@ -616,7 +616,7 @@
#endif
do_fixup_by_compat_u32(blob, compat, "clock-frequency",
- gd->sdhc_clk, 1);
+ gd->arch.sdhc_clk, 1);
do_fixup_by_compat(blob, compat, "status", "okay",
4 + 1, 1);
diff --git a/drivers/mtd/spi/stmicro.c b/drivers/mtd/spi/stmicro.c
index 30b626a..9ec938a 100644
--- a/drivers/mtd/spi/stmicro.c
+++ b/drivers/mtd/spi/stmicro.c
@@ -93,6 +93,12 @@
.name = "M25P128",
},
{
+ .id = 0xba17,
+ .pages_per_sector = 256,
+ .nr_sectors = 128,
+ .name = "N25Q064",
+ },
+ {
.id = 0xba18,
.pages_per_sector = 256,
.nr_sectors = 256,
diff --git a/drivers/net/mpc512x_fec.c b/drivers/net/mpc512x_fec.c
index ad57d56..427e0b8 100644
--- a/drivers/net/mpc512x_fec.c
+++ b/drivers/net/mpc512x_fec.c
@@ -304,7 +304,7 @@
* and do not drop the Preamble.
*/
out_be32(&fec->eth->mii_speed,
- (((gd->ips_clk / 1000000) / 5) + 1) << 1);
+ (((gd->arch.ips_clk / 1000000) / 5) + 1) << 1);
/*
* Reset PHY, then delay 300ns
diff --git a/drivers/net/mpc5xxx_fec.c b/drivers/net/mpc5xxx_fec.c
index 3d180db..1093ba5 100644
--- a/drivers/net/mpc5xxx_fec.c
+++ b/drivers/net/mpc5xxx_fec.c
@@ -440,8 +440,9 @@
/*
* Set MII_SPEED = (1/(mii_speed * 2)) * System Clock
* and do not drop the Preamble.
+ * No MII for 7-wire mode
*/
- fec->eth->mii_speed = (((gd->ipb_clk >> 20) / 5) << 1); /* No MII for 7-wire mode */
+ fec->eth->mii_speed = (((gd->arch.ipb_clk >> 20) / 5) << 1);
}
if (fec->xcv_type != SEVENWIRE) {
@@ -644,8 +645,9 @@
/*
* Set MII_SPEED = (1/(mii_speed * 2)) * System Clock
* and do not drop the Preamble.
+ * No MII for 7-wire mode
*/
- fec->eth->mii_speed = (((gd->ipb_clk >> 20) / 5) << 1); /* No MII for 7-wire mode */
+ fec->eth->mii_speed = (((gd->arch.ipb_clk >> 20) / 5) << 1);
}
#if (DEBUG & 0x3)
@@ -909,8 +911,9 @@
/*
* Set MII_SPEED = (1/(mii_speed * 2)) * System Clock
* and do not drop the Preamble.
+ * No MII for 7-wire mode
*/
- fec->eth->mii_speed = (((gd->ipb_clk >> 20) / 5) << 1); /* No MII for 7-wire mode */
+ fec->eth->mii_speed = (((gd->arch.ipb_clk >> 20) / 5) << 1);
}
dev->priv = (void *)fec;
diff --git a/drivers/qe/fdt.c b/drivers/qe/fdt.c
index 73e9060..5a0f277 100644
--- a/drivers/qe/fdt.c
+++ b/drivers/qe/fdt.c
@@ -75,16 +75,16 @@
void ft_qe_setup(void *blob)
{
do_fixup_by_prop_u32(blob, "device_type", "qe", 4,
- "bus-frequency", gd->qe_clk, 1);
+ "bus-frequency", gd->arch.qe_clk, 1);
do_fixup_by_prop_u32(blob, "device_type", "qe", 4,
- "brg-frequency", gd->brg_clk, 1);
+ "brg-frequency", gd->arch.brg_clk, 1);
do_fixup_by_compat_u32(blob, "fsl,qe",
- "clock-frequency", gd->qe_clk, 1);
+ "clock-frequency", gd->arch.qe_clk, 1);
do_fixup_by_compat_u32(blob, "fsl,qe",
- "bus-frequency", gd->qe_clk, 1);
+ "bus-frequency", gd->arch.qe_clk, 1);
do_fixup_by_compat_u32(blob, "fsl,qe",
- "brg-frequency", gd->brg_clk, 1);
+ "brg-frequency", gd->arch.brg_clk, 1);
do_fixup_by_compat_u32(blob, "fsl,qe-gtm",
- "clock-frequency", gd->qe_clk / 2, 1);
+ "clock-frequency", gd->arch.qe_clk / 2, 1);
fdt_fixup_qe_firmware(blob);
}
diff --git a/drivers/qe/qe.c b/drivers/qe/qe.c
index 345587b..5fd2135 100644
--- a/drivers/qe/qe.c
+++ b/drivers/qe/qe.c
@@ -58,21 +58,22 @@
uint savebase;
align_mask = align - 1;
- savebase = gd->mp_alloc_base;
+ savebase = gd->arch.mp_alloc_base;
- if ((off = (gd->mp_alloc_base & align_mask)) != 0)
- gd->mp_alloc_base += (align - off);
+ off = gd->arch.mp_alloc_base & align_mask;
+ if (off != 0)
+ gd->arch.mp_alloc_base += (align - off);
if ((off = size & align_mask) != 0)
size += (align - off);
- if ((gd->mp_alloc_base + size) >= gd->mp_alloc_top) {
- gd->mp_alloc_base = savebase;
+ if ((gd->arch.mp_alloc_base + size) >= gd->arch.mp_alloc_top) {
+ gd->arch.mp_alloc_base = savebase;
printf("%s: ran out of ram.\n", __FUNCTION__);
}
- retloc = gd->mp_alloc_base;
- gd->mp_alloc_base += size;
+ retloc = gd->arch.mp_alloc_base;
+ gd->arch.mp_alloc_base += size;
memset((void *)&qe_immr->muram[retloc], 0, size);
@@ -183,8 +184,8 @@
out_be32(&qe_immr->iram.iready,QE_IRAM_READY);
#endif
- gd->mp_alloc_base = QE_DATAONLY_BASE;
- gd->mp_alloc_top = gd->mp_alloc_base + QE_DATAONLY_SIZE;
+ gd->arch.mp_alloc_base = QE_DATAONLY_BASE;
+ gd->arch.mp_alloc_top = gd->arch.mp_alloc_base + QE_DATAONLY_SIZE;
qe_sdma_init();
qe_snums_init();
@@ -220,7 +221,7 @@
from CLKn pin, we have te change the function.
*/
-#define BRG_CLK (gd->brg_clk)
+#define BRG_CLK (gd->arch.brg_clk)
int qe_set_brg(uint brg, uint rate)
{
diff --git a/drivers/serial/arm_dcc.c b/drivers/serial/arm_dcc.c
index 7b5ecb5..c217c88 100644
--- a/drivers/serial/arm_dcc.c
+++ b/drivers/serial/arm_dcc.c
@@ -89,15 +89,6 @@
#define TIMEOUT_COUNT 0x4000000
-#ifndef CONFIG_ARM_DCC_MULTI
-#define arm_dcc_init serial_init
-void serial_setbrg(void) {}
-#define arm_dcc_getc serial_getc
-#define arm_dcc_putc serial_putc
-#define arm_dcc_puts serial_puts
-#define arm_dcc_tstc serial_tstc
-#endif
-
int arm_dcc_init(void)
{
return 0;
@@ -147,16 +138,10 @@
return reg;
}
-#ifdef CONFIG_ARM_DCC_MULTI
static struct stdio_dev arm_dcc_dev;
int drv_arm_dcc_init(void)
{
- int rc;
-
- /* Device initialization */
- memset(&arm_dcc_dev, 0, sizeof(arm_dcc_dev));
-
strcpy(arm_dcc_dev.name, "dcc");
arm_dcc_dev.ext = 0; /* No extensions */
arm_dcc_dev.flags = DEV_FLAGS_INPUT | DEV_FLAGS_OUTPUT;
@@ -167,4 +152,8 @@
return stdio_register(&arm_dcc_dev);
}
-#endif
+
+__weak struct serial_device *default_serial_console(void)
+{
+ return NULL;
+}
diff --git a/examples/standalone/mem_to_mem_idma2intr.c b/examples/standalone/mem_to_mem_idma2intr.c
index d0a75ea..e466c90 100644
--- a/examples/standalone/mem_to_mem_idma2intr.c
+++ b/examples/standalone/mem_to_mem_idma2intr.c
@@ -356,7 +356,7 @@
/* Pointer to initial global data area */
if (dpinit_done == 0) {
- dpbase = gd->dp_alloc_base;
+ dpbase = gd->arch.dp_alloc_base;
dpinit_done = 1;
}
@@ -369,7 +369,7 @@
if ((off = size & align_mask) != 0)
size += align - off;
- if ((dpbase + size) >= gd->dp_alloc_top) {
+ if ((dpbase + size) >= gd->arch.dp_alloc_top) {
dpbase = savebase;
printf ("dpalloc: ran out of dual port ram!");
return 0;
diff --git a/fs/fat/fat.c b/fs/fat/fat.c
index 25d3318..66d5473 100644
--- a/fs/fat/fat.c
+++ b/fs/fat/fat.c
@@ -33,6 +33,13 @@
#include <part.h>
#include <malloc.h>
#include <linux/compiler.h>
+#include <linux/ctype.h>
+
+#ifdef CONFIG_SUPPORT_VFAT
+static const int vfat_enabled = 1;
+#else
+static const int vfat_enabled = 0;
+#endif
/*
* Convert a string to lowercase.
@@ -40,7 +47,7 @@
static void downcase(char *str)
{
while (*str != '\0') {
- TOLOWER(*str);
+ *str = tolower(*str);
str++;
}
}
@@ -441,7 +448,6 @@
} while (1);
}
-#ifdef CONFIG_SUPPORT_VFAT
/*
* Extract the file name information from 'slotptr' into 'l_name',
* starting at l_name[*idx].
@@ -576,7 +582,6 @@
return ret;
}
-#endif /* CONFIG_SUPPORT_VFAT */
/*
* Get the directory entry associated with 'filename' from the directory
@@ -617,8 +622,8 @@
continue;
}
if ((dentptr->attr & ATTR_VOLUME)) {
-#ifdef CONFIG_SUPPORT_VFAT
- if ((dentptr->attr & ATTR_VFAT) == ATTR_VFAT &&
+ if (vfat_enabled &&
+ (dentptr->attr & ATTR_VFAT) == ATTR_VFAT &&
(dentptr->name[0] & LAST_LONG_ENTRY_MASK)) {
prevcksum = ((dir_slot *)dentptr)->alias_checksum;
get_vfatname(mydata, curclust,
@@ -658,9 +663,7 @@
continue;
}
debug("vfatname: |%s|\n", l_name);
- } else
-#endif
- {
+ } else {
/* Volume label or VFAT entry */
dentptr++;
continue;
@@ -674,14 +677,15 @@
debug("Dentname == NULL - %d\n", i);
return NULL;
}
-#ifdef CONFIG_SUPPORT_VFAT
- __u8 csum = mkcksum(dentptr->name, dentptr->ext);
- if (dols && csum == prevcksum) {
- prevcksum = 0xffff;
- dentptr++;
- continue;
+ if (vfat_enabled) {
+ __u8 csum = mkcksum(dentptr->name, dentptr->ext);
+ if (dols && csum == prevcksum) {
+ prevcksum = 0xffff;
+ dentptr++;
+ continue;
+ }
}
-#endif
+
get_name(dentptr, s_name);
if (dols) {
int isdir = (dentptr->attr & ATTR_DIR);
@@ -884,9 +888,9 @@
return -1;
}
-#ifdef CONFIG_SUPPORT_VFAT
- debug("VFAT Support enabled\n");
-#endif
+ if (vfat_enabled)
+ debug("VFAT Support enabled\n");
+
debug("FAT%d, fat_sect: %d, fatlength: %d\n",
mydata->fatsize, mydata->fat_sect, mydata->fatlength);
debug("Rootdir begins at cluster: %d, sector: %d, offset: %x\n"
@@ -952,10 +956,12 @@
continue;
}
- csum = mkcksum(dentptr->name, dentptr->ext);
+ if (vfat_enabled)
+ csum = mkcksum(dentptr->name, dentptr->ext);
+
if (dentptr->attr & ATTR_VOLUME) {
-#ifdef CONFIG_SUPPORT_VFAT
- if ((dentptr->attr & ATTR_VFAT) == ATTR_VFAT &&
+ if (vfat_enabled &&
+ (dentptr->attr & ATTR_VFAT) == ATTR_VFAT &&
(dentptr->name[0] & LAST_LONG_ENTRY_MASK)) {
prevcksum =
((dir_slot *)dentptr)->alias_checksum;
@@ -999,9 +1005,7 @@
}
debug("Rootvfatname: |%s|\n",
l_name);
- } else
-#endif
- {
+ } else {
/* Volume label or VFAT entry */
dentptr++;
continue;
@@ -1015,13 +1019,13 @@
}
goto exit;
}
-#ifdef CONFIG_SUPPORT_VFAT
- else if (dols == LS_ROOT && csum == prevcksum) {
+ else if (vfat_enabled &&
+ dols == LS_ROOT && csum == prevcksum) {
prevcksum = 0xffff;
dentptr++;
continue;
}
-#endif
+
get_name(dentptr, s_name);
if (dols == LS_ROOT) {
diff --git a/fs/fat/fat_write.c b/fs/fat/fat_write.c
index 4a1bda0..b4022aa 100644
--- a/fs/fat/fat_write.c
+++ b/fs/fat/fat_write.c
@@ -28,6 +28,7 @@
#include <fat.h>
#include <asm/byteorder.h>
#include <part.h>
+#include <linux/ctype.h>
#include "fat.c"
static void uppercase(char *str, int len)
@@ -35,7 +36,7 @@
int i;
for (i = 0; i < len; i++) {
- TOUPPER(*str);
+ *str = toupper(*str);
str++;
}
}
@@ -248,7 +249,6 @@
return ret;
}
-#ifdef CONFIG_SUPPORT_VFAT
/*
* Set the file name information from 'name' into 'slotptr',
*/
@@ -468,8 +468,6 @@
return 0;
}
-#endif
-
/*
* Set the entry at index 'entry' in a FAT (16/32) table.
*/
@@ -853,16 +851,14 @@
continue;
}
if ((dentptr->attr & ATTR_VOLUME)) {
-#ifdef CONFIG_SUPPORT_VFAT
- if ((dentptr->attr & ATTR_VFAT) &&
+ if (vfat_enabled &&
+ (dentptr->attr & ATTR_VFAT) &&
(dentptr->name[0] & LAST_LONG_ENTRY_MASK)) {
get_long_file_name(mydata, curclust,
get_dentfromdir_block,
&dentptr, l_name);
debug("vfatname: |%s|\n", l_name);
- } else
-#endif
- {
+ } else {
/* Volume label or VFAT entry */
dentptr++;
if (is_next_clust(mydata, dentptr))
diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h
new file mode 100644
index 0000000..b8ac024
--- /dev/null
+++ b/include/asm-generic/global_data.h
@@ -0,0 +1,102 @@
+/*
+ * Copyright (c) 2012 The Chromium OS Authors.
+ * (C) Copyright 2002-2010
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __ASM_GENERIC_GBL_DATA_H
+#define __ASM_GENERIC_GBL_DATA_H
+/*
+ * The following data structure is placed in some memory which is
+ * available very early after boot (like DPRAM on MPC8xx/MPC82xx, or
+ * some locked parts of the data cache) to allow for a minimum set of
+ * global variables during system initialization (until we have set
+ * up the memory controller so that we can use RAM).
+ *
+ * Keep it *SMALL* and remember to set GENERATED_GBL_DATA_SIZE > sizeof(gd_t)
+ *
+ * Each architecture has its own private fields. For now all are private
+ */
+
+#ifndef __ASSEMBLY__
+typedef struct global_data {
+ bd_t *bd;
+ unsigned long flags;
+ unsigned long baudrate;
+ unsigned long cpu_clk; /* CPU clock in Hz! */
+ unsigned long bus_clk;
+ /* We cannot bracket this with CONFIG_PCI due to mpc5xxx */
+ unsigned long pci_clk;
+ unsigned long mem_clk;
+#if defined(CONFIG_LCD) || defined(CONFIG_VIDEO)
+ unsigned long fb_base; /* Base address of framebuffer mem */
+#endif
+#if defined(CONFIG_POST) || defined(CONFIG_LOGBUFFER)
+ unsigned long post_log_word; /* Record POST activities */
+ unsigned long post_log_res; /* success of POST test */
+ unsigned long post_init_f_time; /* When post_init_f started */
+#endif
+#ifdef CONFIG_BOARD_TYPES
+ unsigned long board_type;
+#endif
+ unsigned long have_console; /* serial_init() was called */
+#ifdef CONFIG_PRE_CONSOLE_BUFFER
+ unsigned long precon_buf_idx; /* Pre-Console buffer index */
+#endif
+#ifdef CONFIG_MODEM_SUPPORT
+ unsigned long do_mdm_init;
+ unsigned long be_quiet;
+#endif
+ unsigned long env_addr; /* Address of Environment struct */
+ unsigned long env_valid; /* Checksum of Environment valid? */
+
+ /* TODO: is this the same as relocaddr, or something else? */
+ unsigned long dest_addr; /* Post-relocation address of U-Boot */
+ unsigned long dest_addr_sp;
+ unsigned long ram_top; /* Top address of RAM used by U-Boot */
+
+ unsigned long relocaddr; /* Start address of U-Boot in RAM */
+ phys_size_t ram_size; /* RAM size */
+ unsigned long mon_len; /* monitor len */
+ unsigned long irq_sp; /* irq stack pointer */
+ unsigned long start_addr_sp; /* start_addr_stackpointer */
+ unsigned long reloc_off;
+ struct global_data *new_gd; /* relocated global data */
+ const void *fdt_blob; /* Our device tree, NULL if none */
+ void **jt; /* jump table */
+ char env_buf[32]; /* buffer for getenv() before reloc. */
+ struct arch_global_data arch; /* architecture-specific data */
+} gd_t;
+#endif
+
+/*
+ * Global Data Flags
+ */
+#define GD_FLG_RELOC 0x00001 /* Code was relocated to RAM */
+#define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */
+#define GD_FLG_SILENT 0x00004 /* Silent mode */
+#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */
+#define GD_FLG_POSTSTOP 0x00010 /* POST seqeunce aborted */
+#define GD_FLG_LOGINIT 0x00020 /* Log Buffer has been initialized */
+#define GD_FLG_DISABLE_CONSOLE 0x00040 /* Disable console (in & out) */
+#define GD_FLG_ENV_READY 0x00080 /* Env. imported into hash table */
+
+#endif /* __ASM_GENERIC_GBL_DATA_H */
diff --git a/include/command.h b/include/command.h
index 476e7cf..3785eb9 100644
--- a/include/command.h
+++ b/include/command.h
@@ -139,10 +139,12 @@
* @param repeatable This function sets this to 0 if the command is not
* repeatable. If the command is repeatable, the value
* is left unchanged.
+ * @param ticks If ticks is not null, this function set it to the
+ * number of ticks the command took to complete.
* @return 0 if the command succeeded, 1 if it failed
*/
int cmd_process(int flag, int argc, char * const argv[],
- int *repeatable);
+ int *repeatable, unsigned long *ticks);
#endif /* __ASSEMBLY__ */
diff --git a/include/configs/apx4devkit.h b/include/configs/apx4devkit.h
index 6764b47..73c66af 100644
--- a/include/configs/apx4devkit.h
+++ b/include/configs/apx4devkit.h
@@ -175,7 +175,6 @@
#define CONFIG_FEC_MXC_PHYADDR 0
#define IMX_FEC_BASE MXS_ENET0_BASE
#define CONFIG_MII
-#define CONFIG_DISCOVER_PHY
#define CONFIG_FEC_XCV_TYPE RMII
#endif
diff --git a/include/configs/sc_sps_1.h b/include/configs/sc_sps_1.h
index cb99d58..f807a61 100644
--- a/include/configs/sc_sps_1.h
+++ b/include/configs/sc_sps_1.h
@@ -160,7 +160,6 @@
#define CONFIG_FEC_MXC
#define CONFIG_FEC_MXC_MULTI
#define CONFIG_MII
-#define CONFIG_DISCOVER_PHY
#define CONFIG_FEC_XCV_TYPE RMII
#define CONFIG_PHYLIB
#define CONFIG_PHY_SMSC
diff --git a/include/fat.h b/include/fat.h
index 706cd7a..b28c3fd 100644
--- a/include/fat.h
+++ b/include/fat.h
@@ -98,9 +98,6 @@
#endif
#endif
-#define TOLOWER(c) if((c) >= 'A' && (c) <= 'Z'){(c)+=('a' - 'A');}
-#define TOUPPER(c) if ((c) >= 'a' && (c) <= 'z') \
- (c) -= ('a' - 'A');
#define START(dent) (FAT2CPU16((dent)->start) \
+ (mydata->fatsize != 32 ? 0 : \
(FAT2CPU16((dent)->starthi) << 16)))
diff --git a/include/stdio_dev.h b/include/stdio_dev.h
index 932d093..9451740 100644
--- a/include/stdio_dev.h
+++ b/include/stdio_dev.h
@@ -99,7 +99,7 @@
struct stdio_dev* stdio_get_by_name(const char* name);
struct stdio_dev* stdio_clone(struct stdio_dev *dev);
-#ifdef CONFIG_ARM_DCC_MULTI
+#ifdef CONFIG_ARM_DCC
int drv_arm_dcc_init(void);
#endif
#ifdef CONFIG_LCD