NDS32: Generic Board Support and Unsupport

	Add nds32 ag101p generic board support.

Signed-off-by: Kun-Hua Huang <kunhua@andestech.com>
diff --git a/arch/Kconfig b/arch/Kconfig
index e952bb1..4f73819 100644
--- a/arch/Kconfig
+++ b/arch/Kconfig
@@ -56,6 +56,8 @@
 
 config NDS32
 	bool "NDS32 architecture"
+	select HAVE_GENERIC_BOARD
+	select SYS_GENERIC_BOARD
 
 config NIOS2
 	bool "Nios II architecture"
diff --git a/arch/nds32/cpu/n1213/Makefile b/arch/nds32/cpu/n1213/Makefile
index 8ab1fce..7d5ae96 100644
--- a/arch/nds32/cpu/n1213/Makefile
+++ b/arch/nds32/cpu/n1213/Makefile
@@ -12,4 +12,3 @@
 extra-y	= start.o
 
 obj-$(if $(filter ag101,$(SOC)),y) += ag101/
-obj-$(if $(filter ag102,$(SOC)),y) += ag102/
diff --git a/arch/nds32/cpu/n1213/ag101/lowlevel_init.S b/arch/nds32/cpu/n1213/ag101/lowlevel_init.S
index d6484b9..1a94868 100644
--- a/arch/nds32/cpu/n1213/ag101/lowlevel_init.S
+++ b/arch/nds32/cpu/n1213/ag101/lowlevel_init.S
@@ -205,8 +205,8 @@
 	 * Remapping
 	 */
 	led	0x1a
-	write32	SDMC_B0_BSR_A, SDMC_B0_BSR_D		! 0x00001100
-	write32	SDMC_B1_BSR_A, SDMC_B1_BSR_D		! 0x00001140
+	write32	SDMC_B0_BSR_A, SDMC_B0_BSR_D		! 0x00001800
+	write32	SDMC_B1_BSR_A, SDMC_B1_BSR_D		! 0x00001880
 
 	/* clear empty BSR registers */
 	led	0x1b
@@ -272,7 +272,11 @@
 	 */
 	led	0x1c
 	write32 SDMC_B0_BSR_A, 0x00001000
-	write32 SDMC_B1_BSR_A, 0x00001040
+	write32 SDMC_B1_BSR_A, 0x00001200
+	li $r5, CONFIG_SYS_TEXT_BASE	/* flash base address */
+	add $r11, $r11, $r5	/* add flash address offset for ret */
+	add $r10, $r10, $r5
+	move $lp, $r11
 	setbf15	AHBC_CR_A, FTAHBC020S_CR_REMAP		! 0x1
 
   /*
@@ -282,9 +286,9 @@
 	li	$r5, AHBC_BSR6_A
 	lwi $r6, [$r5]
 	li  $r4, 0xfff0ffff
-	and $r6 ,$r4 , $r6
+	and $r6 ,$r4, $r6
 	li	$r4, 0x000b0000
-	or  $r6, $r4,	$r6
+	or  $r6, $r4, $r6
 	swi	$r6, [$r5]
 
   /*
@@ -299,7 +303,7 @@
 	or  $r5, $r5, $r6
 	swi $r5,	[$r4]
 #endif /* #ifdef CONFIG_MEM_REMAP */
-	move	$lp, $r11
+	move $lp, $r11
 2:
 	ret
 
diff --git a/arch/nds32/cpu/n1213/start.S b/arch/nds32/cpu/n1213/start.S
index 0d96c52..2f0b76c 100644
--- a/arch/nds32/cpu/n1213/start.S
+++ b/arch/nds32/cpu/n1213/start.S
@@ -153,8 +153,11 @@
  * $sp must be 8-byte alignment for ABI compliance.
  */
 call_board_init_f:
-	li	$sp, CONFIG_SYS_INIT_SP_ADDR
-	li	$r0, 0x00000000
+	li		$sp, CONFIG_SYS_INIT_SP_ADDR
+	li		$r10, GD_SIZE	/* get GD size */
+	sub		$sp, $sp, $r10	/* GD start addr */
+	move	$r10, $sp
+	li		$r0, 0x00000000
 
 #ifdef __PIC__
 #ifdef __NDS32_N1213_43U1H__
diff --git a/arch/nds32/include/asm/u-boot.h b/arch/nds32/include/asm/u-boot.h
index 44e72d4..2efdeb1 100644
--- a/arch/nds32/include/asm/u-boot.h
+++ b/arch/nds32/include/asm/u-boot.h
@@ -30,6 +30,7 @@
 	unsigned long	bi_flashstart;	/* start of FLASH memory */
 	unsigned long	bi_flashsize;	/* size	 of FLASH memory */
 	unsigned long	bi_flashoffset; /* reserved area for startup monitor */
+	unsigned char	bi_enetaddr[6];
 
 	struct				/* RAM configuration */
 	{
diff --git a/arch/nds32/lib/Makefile b/arch/nds32/lib/Makefile
index 6ea96db..1a0d26f 100644
--- a/arch/nds32/lib/Makefile
+++ b/arch/nds32/lib/Makefile
@@ -9,7 +9,6 @@
 # SPDX-License-Identifier:	GPL-2.0+
 #
 
-obj-y += board.o
 obj-y += cache.o
 obj-$(CONFIG_CMD_BOOTM) += bootm.o
 obj-y += interrupts.o
diff --git a/arch/nds32/lib/board.c b/arch/nds32/lib/board.c
deleted file mode 100644
index 24a09bc..0000000
--- a/arch/nds32/lib/board.c
+++ /dev/null
@@ -1,398 +0,0 @@
-/*
- * (C) Copyright 2002-2006
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * Copyright (C) 2011 Andes Technology Corporation
- * Shawn Lin, Andes Technology Corporation <nobuhiro@andestech.com>
- * Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com>
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-#include <command.h>
-#include <malloc.h>
-#include <stdio_dev.h>
-#include <timestamp.h>
-#include <version.h>
-#include <net.h>
-#include <serial.h>
-#include <nand.h>
-#include <onenand_uboot.h>
-#include <mmc.h>
-#include <asm/sections.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#if defined(CONFIG_SYS_I2C)
-#include <i2c.h>
-#endif
-
-ulong monitor_flash_len;
-
-/*
- * Init Utilities
- */
-
-#if !defined(CONFIG_BAUDRATE)
-#define CONFIG_BAUDRATE 38400
-#endif
-static int init_baudrate(void)
-{
-	gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE);
-	return 0;
-}
-
-/*
- * WARNING: this code looks "cleaner" than the PowerPC version, but
- * has the disadvantage that you either get nothing, or everything.
- * On PowerPC, you might see "DRAM: " before the system hangs - which
- * gives a simple yet clear indication which part of the
- * initialization if failing.
- */
-static int display_dram_config(void)
-{
-	int i;
-
-#ifdef DEBUG
-	puts("RAM Configuration:\n");
-
-	for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
-		printf("Bank #%d: %08lx ", i, gd->bd->bi_dram[i].start);
-		print_size(gd->bd->bi_dram[i].size, "\n");
-	}
-#else
-	ulong size = 0;
-
-	for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++)
-		size += gd->bd->bi_dram[i].size;
-
-	puts("DRAM:  ");
-	print_size(size, "\n");
-#endif
-
-	return 0;
-}
-
-#ifndef CONFIG_SYS_NO_FLASH
-static void display_flash_config(ulong size)
-{
-	puts("Flash: ");
-	print_size(size, "\n");
-}
-#endif /* CONFIG_SYS_NO_FLASH */
-
-#if defined(CONFIG_CMD_PCI) || defined(CONFIG_PCI)
-#include <pci.h>
-static int nds32_pci_init(void)
-{
-	pci_init();
-	return 0;
-}
-#endif /* CONFIG_CMD_PCI || CONFIG_PCI */
-
-#if defined(CONFIG_PMU) || defined(CONFIG_PCU)
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT
-static int pmu_init(void)
-{
-#if defined(CONFIG_FTPMU010_POWER)
-#ifdef __NDS32_N1213_43U1H__	/* AG101: internal definition in toolchain */
-	ftpmu010_sdram_clk_disable(CONFIG_SYS_FTPMU010_PDLLCR0_HCLKOUTDIS);
-	ftpmu010_mfpsr_select_dev(FTPMU010_MFPSR_AC97CLKSEL);
-	ftpmu010_sdramhtc_set(CONFIG_SYS_FTPMU010_SDRAMHTC);
-#endif	/* __NDS32_N1213_43U1H__ */
-#endif
-	return 0;
-}
-#endif
-#endif
-
-/*
- * Breathe some life into the board...
- *
- * Initialize a serial port as console, and carry out some hardware
- * tests.
- *
- * The first part of initialization is running from Flash memory;
- * its main purpose is to initialize the RAM so that we
- * can relocate the monitor code to RAM.
- */
-
-/*
- * All attempts to come up with a "common" initialization sequence
- * that works for all boards and architectures failed: some of the
- * requirements are just _too_ different. To get rid of the resulting
- * mess of board dependent #ifdef'ed code we now make the whole
- * initialization sequence configurable to the user.
- *
- * The requirements for any new initalization function is simple: it
- * receives a pointer to the "global data" structure as it's only
- * argument, and returns an integer return code, where 0 means
- * "continue" and != 0 means "fatal error, hang the system".
- */
-typedef int (init_fnc_t)(void);
-
-void __dram_init_banksize(void)
-{
-	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
-	gd->bd->bi_dram[0].size =  gd->ram_size;
-}
-void dram_init_banksize(void)
-	__attribute__((weak, alias("__dram_init_banksize")));
-
-init_fnc_t *init_sequence[] = {
-#if defined(CONFIG_ARCH_CPU_INIT)
-	arch_cpu_init,		/* basic arch cpu dependent setup */
-#endif
-#if defined(CONFIG_PMU) || defined(CONFIG_PCU)
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT
-	pmu_init,
-#endif
-#endif
-	board_init,		/* basic board dependent setup */
-#if defined(CONFIG_USE_IRQ)
-	interrupt_init,		/* set up exceptions */
-#endif
-	timer_init,		/* initialize timer */
-	env_init,		/* initialize environment */
-	init_baudrate,		/* initialze baudrate settings */
-	serial_init,		/* serial communications setup */
-	console_init_f,		/* stage 1 init of console */
-#if defined(CONFIG_DISPLAY_BOARDINFO)
-	checkboard,		/* display board info */
-#endif
-#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
-	init_func_i2c,
-#endif
-	dram_init,		/* configure available RAM banks */
-	display_dram_config,
-	NULL,
-};
-
-void board_init_f(ulong bootflag)
-{
-	bd_t *bd;
-	init_fnc_t **init_fnc_ptr;
-	gd_t *id;
-	ulong addr, addr_sp;
-
-	/* Pointer is writable since we allocated a register for it */
-	gd = (gd_t *) ((CONFIG_SYS_INIT_SP_ADDR) & ~0x07);
-
-	memset((void *)gd, 0, GENERATED_GBL_DATA_SIZE);
-
-	gd->mon_len = (unsigned int)(&__bss_end) - (unsigned int)(&_start);
-
-	for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) {
-		if ((*init_fnc_ptr)() != 0)
-			hang();
-	}
-
-	debug("monitor len: %08lX\n", gd->mon_len);
-	/*
-	 * Ram is setup, size stored in gd !!
-	 */
-	debug("ramsize: %08lX\n", gd->ram_size);
-
-	addr = CONFIG_SYS_SDRAM_BASE + gd->ram_size;
-
-	/* round down to next 4 kB limit */
-	addr &= ~(4096 - 1);
-	debug("Top of RAM usable for U-Boot at: %08lx\n", addr);
-
-#ifdef CONFIG_LCD
-#ifdef CONFIG_FB_ADDR
-	gd->fb_base = CONFIG_FB_ADDR;
-#else
-	/* reserve memory for LCD display (always full pages) */
-	addr = lcd_setmem(addr);
-	gd->fb_base = addr;
-#endif /* CONFIG_FB_ADDR */
-#endif /* CONFIG_LCD */
-
-	/*
-	 * reserve memory for U-Boot code, data & bss
-	 * round down to next 4 kB limit
-	 */
-	addr -= gd->mon_len;
-	addr &= ~(4096 - 1);
-
-	debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10, addr);
-
-	/*
-	 * reserve memory for malloc() arena
-	 */
-	addr_sp = addr - TOTAL_MALLOC_LEN;
-	debug("Reserving %dk for malloc() at: %08lx\n",
-			TOTAL_MALLOC_LEN >> 10, addr_sp);
-	/*
-	 * (permanently) allocate a Board Info struct
-	 * and a permanent copy of the "global" data
-	 */
-	addr_sp -= GENERATED_BD_INFO_SIZE;
-	bd = (bd_t *) addr_sp;
-	gd->bd = bd;
-	memset((void *)bd, 0, GENERATED_BD_INFO_SIZE);
-	debug("Reserving %zu Bytes for Board Info at: %08lx\n",
-			GENERATED_BD_INFO_SIZE, addr_sp);
-
-	addr_sp -= GENERATED_GBL_DATA_SIZE;
-	id = (gd_t *) addr_sp;
-	debug("Reserving %zu Bytes for Global Data at: %08lx\n",
-			GENERATED_GBL_DATA_SIZE, addr_sp);
-
-	/* setup stackpointer for exeptions */
-	gd->irq_sp = addr_sp;
-#ifdef CONFIG_USE_IRQ
-	addr_sp -= (CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ);
-	debug("Reserving %zu Bytes for IRQ stack at: %08lx\n",
-		CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ, addr_sp);
-#endif
-	/* leave 3 words for abort-stack    */
-	addr_sp -= 12;
-
-	/* 8-byte alignment for ABI compliance */
-	addr_sp &= ~0x07;
-	debug("New Stack Pointer is: %08lx\n", addr_sp);
-
-	/* Ram isn't board specific, so move it to board code ... */
-	dram_init_banksize();
-	display_dram_config();	/* and display it */
-
-	gd->relocaddr = addr;
-	gd->start_addr_sp = addr_sp;
-
-	gd->reloc_off = addr - _TEXT_BASE;
-
-	debug("relocation Offset is: %08lx\n", gd->reloc_off);
-	memcpy(id, (void *)gd, GENERATED_GBL_DATA_SIZE);
-
-	relocate_code(addr_sp, id, addr);
-
-	/* NOTREACHED - relocate_code() does not return */
-}
-
-/*
- * This is the next part if the initialization sequence: we are now
- * running from RAM and have a "normal" C environment, i. e. global
- * data can be written, BSS has been cleared, the stack size in not
- * that critical any more, etc.
- */
-void board_init_r(gd_t *id, ulong dest_addr)
-{
-	bd_t *bd;
-	ulong malloc_start;
-
-	gd = id;
-	bd = gd->bd;
-
-	gd->flags |= GD_FLG_RELOC;	/* tell others: relocation done */
-
-	monitor_flash_len = (ulong)&_end - (ulong)&_start;
-	debug("monitor flash len: %08lX\n", monitor_flash_len);
-
-	board_init();	/* Setup chipselects */
-
-#if defined(CONFIG_NEEDS_MANUAL_RELOC)
-	/*
-	 * We have to relocate the command table manually
-	 */
-	fixup_cmdtable(ll_entry_start(cmd_tbl_t, cmd),
-			ll_entry_count(cmd_tbl_t, cmd));
-#endif /* defined(CONFIG_NEEDS_MANUAL_RELOC) */
-
-	serial_initialize();
-
-	debug("Now running in RAM - U-Boot at: %08lx\n", dest_addr);
-
-	/* The Malloc area is immediately below the monitor copy in DRAM */
-	malloc_start = dest_addr - TOTAL_MALLOC_LEN;
-	mem_malloc_init(malloc_start, TOTAL_MALLOC_LEN);
-
-#ifndef CONFIG_SYS_NO_FLASH
-	/* configure available FLASH banks */
-	gd->bd->bi_flashstart = CONFIG_SYS_FLASH_BASE;
-	gd->bd->bi_flashsize = flash_init();
-	gd->bd->bi_flashoffset = CONFIG_SYS_FLASH_BASE + gd->bd->bi_flashsize;
-
-	if (gd->bd->bi_flashsize)
-			display_flash_config(gd->bd->bi_flashsize);
-#endif /* CONFIG_SYS_NO_FLASH */
-
-#if defined(CONFIG_CMD_NAND)
-	puts("NAND:  ");
-	nand_init();		/* go init the NAND */
-#endif
-
-#if defined(CONFIG_CMD_IDE)
-	puts("IDE:   ");
-	ide_init();
-#endif
-
-#ifdef CONFIG_GENERIC_MMC
-	puts("MMC:   ");
-	mmc_initialize(gd->bd);
-#endif
-
-#if defined(CONFIG_SYS_I2C_ADAPTERS)
-	i2c_reloc_fixup();
-#endif
-
-	/* initialize environment */
-	env_relocate();
-
-#if defined(CONFIG_CMD_PCI) || defined(CONFIG_PCI)
-	puts("PCI:   ");
-	nds32_pci_init();
-#endif
-
-	stdio_init();	/* get the devices list going. */
-
-	jumptable_init();
-
-#if defined(CONFIG_API)
-	/* Initialize API */
-	api_init();
-#endif
-
-	console_init_r();	/* fully init console as a device */
-
-#if defined(CONFIG_ARCH_MISC_INIT)
-	/* miscellaneous arch dependent initialisations */
-	arch_misc_init();
-#endif
-#if defined(CONFIG_MISC_INIT_R)
-	/* miscellaneous platform dependent initialisations */
-	misc_init_r();
-#endif
-
-#if defined(CONFIG_USE_IRQ)
-	/* set up exceptions */
-	interrupt_init();
-	/* enable exceptions */
-	enable_interrupts();
-#endif
-
-	/* Initialize from environment */
-	load_addr = getenv_ulong("loadaddr", 16, load_addr);
-
-#ifdef CONFIG_BOARD_LATE_INIT
-	board_late_init();
-#endif
-
-#if defined(CONFIG_CMD_NET)
-	puts("Net:   ");
-
-	eth_initialize();
-#if defined(CONFIG_RESET_PHY_R)
-	debug("Reset Ethernet PHY\n");
-	reset_phy();
-#endif
-#endif
-
-	/* main_loop() can return to retry autoboot, if so just run it again. */
-	for (;;)
-		main_loop();
-
-	/* NOTREACHED - no way out of command loop except booting */
-}
diff --git a/arch/nds32/lib/interrupts.c b/arch/nds32/lib/interrupts.c
index d86cc23..72ff78d 100644
--- a/arch/nds32/lib/interrupts.c
+++ b/arch/nds32/lib/interrupts.c
@@ -35,6 +35,10 @@
 
 #ifdef CONFIG_USE_INTERRUPT
 
+int interrupt_init(void)
+{
+	return 0;
+}
 /* enable interrupts */
 void enable_interrupts(void)
 {
diff --git a/board/AndesTech/adp-ag101p/adp-ag101p.c b/board/AndesTech/adp-ag101p/adp-ag101p.c
index dd8a6653..84c77f7 100644
--- a/board/AndesTech/adp-ag101p/adp-ag101p.c
+++ b/board/AndesTech/adp-ag101p/adp-ag101p.c
@@ -28,7 +28,6 @@
 	gd->bd->bi_arch_number = MACH_TYPE_ADPAG101P;
 	gd->bd->bi_boot_params = PHYS_SDRAM_0 + 0x400;
 
-	ftsmc020_init();	/* initialize Flash */
 	return 0;
 }
 
diff --git a/common/board_f.c b/common/board_f.c
index fe75656..613332e 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -272,6 +272,8 @@
 	gd->mon_len = (ulong)&_end - (ulong)_init;
 #elif defined(CONFIG_BLACKFIN) || defined(CONFIG_NIOS2)
 	gd->mon_len = CONFIG_SYS_MONITOR_LEN;
+#elif defined(CONFIG_NDS32)
+	gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start);
 #else
 	/* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
 	gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
@@ -792,7 +794,8 @@
 	/* TODO: can we rename this to timer_init()? */
 	init_timebase,
 #endif
-#if defined(CONFIG_ARM) || defined(CONFIG_MIPS) || defined(CONFIG_BLACKFIN)
+#if defined(CONFIG_ARM) || defined(CONFIG_MIPS) || \
+		defined(CONFIG_BLACKFIN) || defined(CONFIG_NDS32)
 	timer_init,		/* initialize timer */
 #endif
 #ifdef CONFIG_SYS_ALLOC_DPRAM
@@ -858,7 +861,8 @@
 #endif
 	announce_dram_init,
 	/* TODO: unify all these dram functions? */
-#if defined(CONFIG_ARM) || defined(CONFIG_X86) || defined(CONFIG_MICROBLAZE) || defined(CONFIG_AVR32)
+#if defined(CONFIG_ARM) || defined(CONFIG_X86) || defined(CONFIG_NDS32) || \
+		defined(CONFIG_MICROBLAZE) || defined(CONFIG_AVR32)
 	dram_init,		/* configure available RAM banks */
 #endif
 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K)
diff --git a/common/board_r.c b/common/board_r.c
index bf6c725..f8c1baa 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -132,6 +132,8 @@
 {
 #ifdef __ARM__
 	monitor_flash_len = _end - __image_copy_start;
+#elif defined(CONFIG_NDS32)
+	monitor_flash_len = (ulong)&_end - (ulong)&_start;
 #elif !defined(CONFIG_SANDBOX) && !defined(CONFIG_NIOS2)
 	monitor_flash_len = (ulong)&__init_end - gd->relocaddr;
 #endif
@@ -711,7 +713,7 @@
 #ifdef CONFIG_DM
 	initr_dm,
 #endif
-#ifdef CONFIG_ARM
+#if defined(CONFIG_ARM) || defined(CONFIG_NDS32)
 	board_init,	/* Setup chipselects */
 #endif
 	/*
diff --git a/common/command.c b/common/command.c
index 381e6a2..972ae28 100644
--- a/common/command.c
+++ b/common/command.c
@@ -445,7 +445,7 @@
 		ulong addr;
 
 		addr = (ulong)(cmdtp->cmd) + gd->reloc_off;
-#if DEBUG_COMMANDS
+#ifdef DEBUG_COMMANDS
 		printf("Command \"%s\": 0x%08lx => 0x%08lx\n",
 		       cmdtp->name, (ulong)(cmdtp->cmd), addr);
 #endif
diff --git a/doc/README.ag101p b/doc/README.ag101p
new file mode 100644
index 0000000..8fc0ac5
--- /dev/null
+++ b/doc/README.ag101p
@@ -0,0 +1,36 @@
+Andes Technology SoC AG101P
+===========================
+
+AG101P is the mainline SoC produced by Andes Technology using N1213 CPU core
+with FPU and DDR contoller support.
+AG101P has integrated both AHB and APB bus and many periphals for application
+and product development.
+
+ADP-AG101P
+=========
+
+ADP-AG101P is the SoC with AG101 hardcore CPU.
+
+Configurations
+==============
+
+CONFIG_MEM_REMAP:
+	Doing memory remap is essential for preparing some non-OS or RTOS
+	applications.
+
+CONFIG_SKIP_LOWLEVEL_INIT:
+	If you want to boot this system from SPI ROM and bypass e-bios (the
+	other boot loader on ROM). You should undefine CONFIG_SKIP_LOWLEVEL_INIT
+	in "include/configs/adp-ag101p.h".
+
+Build and boot steps
+====================
+
+build:
+1. Prepare the toolchains and make sure the $PATH to toolchains is correct.
+2. Use `make adp-ag101p_defconfig` in u-boot root to build the image.
+
+Burn u-boot to SPI ROM:
+====================
+
+This section will be added later.
diff --git a/include/configs/adp-ag101p.h b/include/configs/adp-ag101p.h
index 94fcdbd..849b08e 100644
--- a/include/configs/adp-ag101p.h
+++ b/include/configs/adp-ag101p.h
@@ -20,22 +20,29 @@
 
 #define CONFIG_SKIP_LOWLEVEL_INIT
 
+#define CONFIG_SYS_GENERIC_GLOBAL_DATA
+
 /*
  * Definitions related to passing arguments to kernel.
  */
 #define CONFIG_CMDLINE_TAG			/* send commandline to Kernel */
 #define CONFIG_SETUP_MEMORY_TAGS	/* send memory definition to kernel */
 #define CONFIG_INITRD_TAG			/* send initrd params */
+#define CONFIG_NEEDS_MANUAL_RELOC
 
 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
 #define CONFIG_MEM_REMAP
 #endif
 
 #ifdef CONFIG_SKIP_LOWLEVEL_INIT
-#define CONFIG_SYS_TEXT_BASE	0x03200000
+#define CONFIG_SYS_TEXT_BASE	0x00500000
+#else
+#ifdef CONFIG_MEM_REMAP
+#define CONFIG_SYS_TEXT_BASE	0x80000000
 #else
 #define CONFIG_SYS_TEXT_BASE	0x00000000
 #endif
+#endif
 
 /*
  * Timer
@@ -225,20 +232,33 @@
 /*
  * Physical Memory Map
  */
-#if defined(CONFIG_MEM_REMAP) || defined(CONFIG_SKIP_LOWLEVEL_INIT)
-#define PHYS_SDRAM_0		0x00000000	/* SDRAM Bank #1 */
-#if defined(CONFIG_MEM_REMAP)
-#define PHYS_SDRAM_0_AT_INIT	0x10000000	/* SDRAM Bank #1 before remap*/
+#ifdef CONFIG_SKIP_LOWLEVEL_INIT
+#define PHYS_SDRAM_0	0x00000000  /* SDRAM Bank #1 */
+#else
+#ifdef CONFIG_MEM_REMAP
+#define PHYS_SDRAM_0	0x00000000	/* SDRAM Bank #1 */
+#else
+#define PHYS_SDRAM_0	0x80000000	/* SDRAM Bank #1 */
 #endif
-#else	/* !CONFIG_SKIP_LOWLEVEL_INIT && !CONFIG_MEM_REMAP */
-#define PHYS_SDRAM_0		0x10000000	/* SDRAM Bank #1 */
 #endif
+
 #define PHYS_SDRAM_1 \
 	(PHYS_SDRAM_0 + PHYS_SDRAM_0_SIZE)	/* SDRAM Bank #2 */
 
 #define CONFIG_NR_DRAM_BANKS	2		/* we have 2 bank of DRAM */
-#define PHYS_SDRAM_0_SIZE	0x04000000	/* 64 MB */
-#define PHYS_SDRAM_1_SIZE	0x04000000	/* 64 MB */
+
+#ifdef CONFIG_SKIP_LOWLEVEL_INIT
+#define PHYS_SDRAM_0_SIZE	0x20000000	/* 512 MB */
+#define PHYS_SDRAM_1_SIZE	0x20000000	/* 512 MB */
+#else
+#ifdef CONFIG_MEM_REMAP
+#define PHYS_SDRAM_0_SIZE	0x20000000	/* 512 MB */
+#define PHYS_SDRAM_1_SIZE	0x20000000	/* 512 MB */
+#else
+#define PHYS_SDRAM_0_SIZE	0x08000000	/* 128 MB */
+#define PHYS_SDRAM_1_SIZE	0x08000000	/* 128 MB */
+#endif
+#endif
 
 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_0
 
@@ -318,19 +338,20 @@
 
 #define CONFIG_SYS_FLASH_CFI_WIDTH	FLASH_CFI_16BIT
 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
+#define CONFIG_SYS_CFI_FLASH_STATUS_POLL
 
 /* support JEDEC */
 
 /* Do not use CONFIG_FLASH_CFI_LEGACY to detect on board flash */
 #ifdef CONFIG_SKIP_LOWLEVEL_INIT
-#define PHYS_FLASH_1			0x80400000	/* BANK 1 */
-#else	/* !CONFIG_SKIP_LOWLEVEL_INIT */
+#define PHYS_FLASH_1			0x80000000	/* BANK 0 */
+#else
 #ifdef CONFIG_MEM_REMAP
 #define PHYS_FLASH_1			0x80000000	/* BANK 0 */
 #else
 #define PHYS_FLASH_1			0x00000000	/* BANK 0 */
+#endif
 #endif	/* CONFIG_MEM_REMAP */
-#endif	/* CONFIG_SKIP_LOWLEVEL_INIT */
 
 #define CONFIG_SYS_FLASH_BASE		PHYS_FLASH_1
 #define CONFIG_SYS_FLASH_BANKS_LIST	{ PHYS_FLASH_1, }
@@ -345,11 +366,12 @@
  * but we have only 1 bank connected to flash on board
  */
 #define CONFIG_SYS_MAX_FLASH_BANKS	1
+#define CONFIG_SYS_FLASH_BANKS_SIZES {0x4000000}
 
 /* max number of sectors on one chip */
-#define CONFIG_FLASH_SECTOR_SIZE	(0x10000*2*2)
+#define CONFIG_FLASH_SECTOR_SIZE	(0x10000*2)
 #define CONFIG_ENV_SECT_SIZE		CONFIG_FLASH_SECTOR_SIZE
-#define CONFIG_SYS_MAX_FLASH_SECT	128
+#define CONFIG_SYS_MAX_FLASH_SECT	512
 
 /* environments */
 #define CONFIG_ENV_IS_IN_FLASH