commit 2f439e805e945b410b0043db82f9666eb03914ba
author Ruchika Gupta <ruchika.gupta@freescale.com> Wed Jun 08 22:52:48 2011 -0500
committer Kumar Gala <galak@kernel.crashing.org> Mon Oct 03 08:52:14 2011 -0500
tree 61162cdbb7769fd94f64561bfd8e5b73add14cf8
parent 550a24921112370cb6b236fa5ff95b38919c2a96

powerpc/85xx: Add Secure Boot support on P1010RDB for NOR, NAND & SPIFLASH

Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Signed-off-by: Kuldip Giroh <kuldip.giroh@freescale.com>

include/configs/P1010RDB.h

diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h
index ff35fb1..ca6178a 100644
--- a/include/configs/P1010RDB.h
+++ b/include/configs/P1010RDB.h
@@ -59,6 +59,13 @@
 #endif /* CONFIG_NAND_SPL */
 #endif
 
+
+#ifdef CONFIG_NAND_SECBOOT	/* NAND Boot */
+#define CONFIG_RAMBOOT_NAND
+#define CONFIG_SYS_TEXT_BASE		0x11000000
+#define CONFIG_RESET_VECTOR_ADDRESS	0x1107fffc
+#endif
+
 #ifndef CONFIG_SYS_TEXT_BASE
 #define CONFIG_SYS_TEXT_BASE		0xeff80000
 #endif
@@ -345,7 +352,7 @@
 #define CONFIG_SYS_NAND_DDR_LAW		11
 
 /* Set up IFC registers for boot location NOR/NAND */
-#ifdef CONFIG_NAND_U_BOOT
+#if defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_NAND_SECBOOT)
 #define CONFIG_SYS_CSPR0		CONFIG_SYS_NAND_CSPR
 #define CONFIG_SYS_AMASK0		CONFIG_SYS_NAND_AMASK
 #define CONFIG_SYS_CSOR0		CONFIG_SYS_NAND_CSOR
@@ -501,7 +508,7 @@
  * SPI interface will not be available in case of NAND boot SPI CS0 will be
  * used for SLIC
  */
-#ifndef CONFIG_NAND_U_BOOT
+#if !defined(CONFIG_NAND_U_BOOT) || !defined(CONFIG_NAND_SECBOOT)
 /* eSPI - Enhanced SPI */
 #define CONFIG_FSL_ESPI
 #define CONFIG_SPI_FLASH
@@ -762,4 +769,8 @@
 
 #define CONFIG_BOOTCOMMAND CONFIG_RAMBOOTCOMMAND
 
+#ifdef CONFIG_SECURE_BOOT
+#include <asm/fsl_secure_boot.h>
+#endif
+
 #endif	/* __CONFIG_H */