| commit | 309484516576d74e0868ac6399b36e56e9d30a3e | [log] [tgz] |
|---|---|---|
| author | Minda Chen <minda.chen@starfivetech.com> | Thu Jul 20 19:37:27 2023 +0800 |
| committer | Leo Yu-Chi Liang <ycliang@andestech.com> | Wed Aug 02 11:02:32 2023 +0800 |
| tree | b8b56966ecd07e6b65f8bb16a6eb524d21472346 | |
| parent | a6a0d6a19121c722a263714eae4d511bb2580f3c [diff] |
net: rtl8169: Fix DMA minimal aligned compile warning in RISC-V For RISC-V architeture, hardware maintain the dcache coherency. Software do not flush the cache. So even cache-line size larger than descriptor size, driver can work. Signed-off-by: Minda Chen <minda.chen@starfivetech.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>