mpc8641: Support 36-bit physical addressing

This patch creates a memory map with all the devices
in 36-bit physical space, in addition to the 32-bit map.
The CCSR relocation is moved (again, sorry) to
allow for the physical address to be 36 bits - this
requires translation to be enabled.  With 36-bit physical
addressing enabled, we are no longer running with VA=PA
translations.  This means we have to distinguish between
the two in the config file.  The existing region name is
used to indicate the virtual address, and a _PHYS variety
is created to represent the physical address.

Large physical addressing is not enabled by default.
Set CONFIG_PHYS_64BIT in the config file to turn this on.

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
diff --git a/cpu/mpc86xx/start.S b/cpu/mpc86xx/start.S
index 0aa8a4f..efd654c 100644
--- a/cpu/mpc86xx/start.S
+++ b/cpu/mpc86xx/start.S
@@ -209,11 +209,6 @@
 	sync
 #endif
 
-#if (CONFIG_SYS_CCSRBAR_DEFAULT != CONFIG_SYS_CCSRBAR)
-	/* setup ccsrbar now while we're in real mode */
-	bl      setup_ccsrbar
-#endif
-
 	/*
 	 * Calculate absolute address in FLASH and jump there
 	 *------------------------------------------------------*/
@@ -267,6 +262,10 @@
 	sync
 #endif
 
+#if (CONFIG_SYS_CCSRBAR_DEFAULT != CONFIG_SYS_CCSRBAR)
+	bl      setup_ccsrbar
+#endif
+
 	/* set up the stack pointer in our newly created
 	 * cache-ram (r1) */
 	lis	r1, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)@h
@@ -414,6 +413,26 @@
 	mtspr   DBAT6L, r4
 	mtspr   DBAT6U, r3
 	isync
+
+#if(CONFIG_SYS_CCSRBAR_DEFAULT != CONFIG_SYS_CCSRBAR)
+	/* IBAT 7 */
+	lis	r4, CONFIG_SYS_CCSR_DEFAULT_IBATL@h
+	ori     r4, r4, CONFIG_SYS_CCSR_DEFAULT_IBATL@l
+	lis	r3, CONFIG_SYS_CCSR_DEFAULT_IBATU@h
+	ori     r3, r3, CONFIG_SYS_CCSR_DEFAULT_IBATU@l
+	mtspr   IBAT7L, r4
+	mtspr   IBAT7U, r3
+	isync
+
+	/* DBAT 7 */
+	lis	r4, CONFIG_SYS_CCSR_DEFAULT_DBATL@h
+	ori     r4, r4, CONFIG_SYS_CCSR_DEFAULT_DBATL@l
+	lis	r3, CONFIG_SYS_CCSR_DEFAULT_DBATU@h
+	ori     r3, r3, CONFIG_SYS_CCSR_DEFAULT_DBATU@l
+	mtspr   DBAT7L, r4
+	mtspr   DBAT7U, r3
+	isync
+#endif
 	blr
 
 	.globl clear_tlbs
@@ -860,17 +879,20 @@
 	lis	r4, CONFIG_SYS_CCSRBAR_DEFAULT@h
 	ori	r4, r4, CONFIG_SYS_CCSRBAR_DEFAULT@l
 
-	lis	r5, CONFIG_SYS_CCSRBAR@h
-	ori	r5, r5, CONFIG_SYS_CCSRBAR@l
-	srwi	r6,r5,12
-	stw	r6, 0(r4)
+	lis	r5, CONFIG_SYS_CCSRBAR_PHYS_LOW@h
+	ori	r5, r5, CONFIG_SYS_CCSRBAR_PHYS_LOW@l
+	srwi	r5,r5,12
+	li	r6, CONFIG_SYS_CCSRBAR_PHYS_HIGH@l
+	rlwimi	r5,r6,20,8,11
+	stw	r5, 0(r4) /* Store physical value of CCSR */
 	isync
 
-	lis	r5, 0xffff
-	ori	r5,r5,0xf000
+	lis	r5, TEXT_BASE@h
+	ori	r5,r5,TEXT_BASE@l
 	lwz	r5, 0(r5)
 	isync
 
+	/* Use VA of CCSR to do read */
 	lis	r3, CONFIG_SYS_CCSRBAR@h
 	lwz	r5, CONFIG_SYS_CCSRBAR@l(r3)
 	isync