| commit | 31531f6fdb22ab0e938f465e799d8191733981ae | [log] [tgz] |
|---|---|---|
| author | Kever Yang <kever.yang@rock-chips.com> | Tue Jan 07 15:15:20 2020 +0800 |
| committer | Kever Yang <kever.yang@rock-chips.com> | Thu Jan 30 11:44:01 2020 +0800 |
| tree | 9a513c3da9ae38b6179585b106f4c4a434fbc241 | |
| parent | 338b86c9b3058c17c272ac4eb82ddb566e33a023 [diff] |
ram: rk3328: only do data traning for cs0 No need to do twice data training for rk3328 ddr sdram, we re-use the setting for both channel. And adjust the sdram_init properly for correct init flow. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: YouMin Chen <cym@rock-chips.com>