configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py
Signed-off-by: Tom Rini <trini@konsulko.com>
diff --git a/configs/MPC832XEMDS_ATM_defconfig b/configs/MPC832XEMDS_ATM_defconfig
index f54b035..3eda9a4 100644
--- a/configs/MPC832XEMDS_ATM_defconfig
+++ b/configs/MPC832XEMDS_ATM_defconfig
@@ -68,9 +68,53 @@
CONFIG_LBLAW3_BASE=0xF8008000
CONFIG_LBLAW3_NAME="PIB"
CONFIG_LBLAW3_LENGTH_64_KBYTES=y
+CONFIG_ELBC_BR0_OR0=y
+CONFIG_BR0_OR0_NAME="FLASH"
+CONFIG_BR0_OR0_BASE=0xFE000000
+CONFIG_BR0_PORTSIZE_16BIT=y
+CONFIG_OR0_AM_16_MBYTES=y
+CONFIG_OR0_XAM_SET=y
+CONFIG_OR0_SCY_15=y
+CONFIG_OR0_CSNT_EARLIER=y
+CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
+CONFIG_OR0_XACS_EXTENDED=y
+CONFIG_OR0_TRLX_RELAXED=y
+CONFIG_OR0_EHTR_8_CYCLE=y
+CONFIG_OR0_EAD_EXTRA=y
+CONFIG_ELBC_BR1_OR1=y
+CONFIG_BR1_OR1_NAME="BCSR"
+CONFIG_BR1_OR1_BASE=0xF8000000
+CONFIG_OR1_XAM_SET=y
+CONFIG_OR1_SCY_15=y
+CONFIG_OR1_CSNT_EARLIER=y
+CONFIG_OR1_XACS_EXTENDED=y
+CONFIG_OR1_TRLX_RELAXED=y
+CONFIG_OR1_EHTR_8_CYCLE=y
+CONFIG_OR1_EAD_EXTRA=y
+CONFIG_ELBC_BR2_OR2=y
+CONFIG_BR2_OR2_NAME="PIB1"
+CONFIG_BR2_OR2_BASE=0xF8008000
+CONFIG_OR2_XAM_SET=y
+CONFIG_OR2_SCY_15=y
+CONFIG_OR2_CSNT_EARLIER=y
+CONFIG_OR2_XACS_EXTENDED=y
+CONFIG_OR2_TRLX_RELAXED=y
+CONFIG_OR2_EHTR_8_CYCLE=y
+CONFIG_OR2_EAD_EXTRA=y
+CONFIG_ELBC_BR3_OR3=y
+CONFIG_BR3_OR3_NAME="PIB2"
+CONFIG_BR3_OR3_BASE=0xF8010000
+CONFIG_OR3_XAM_SET=y
+CONFIG_OR3_SCY_15=y
+CONFIG_OR3_CSNT_EARLIER=y
+CONFIG_OR3_XACS_EXTENDED=y
+CONFIG_OR3_TRLX_RELAXED=y
+CONFIG_OR3_EHTR_8_CYCLE=y
+CONFIG_OR3_EAD_EXTRA=y
CONFIG_HID0_FINAL_EMCP=y
CONFIG_HID0_FINAL_ICE=y
CONFIG_HID2_HBE=y
+CONFIG_LCRR_CLKDIV_2=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PQ_MDS_PIB=1,PQ_MDS_PIB_ATM=1"
@@ -91,58 +135,3 @@
CONFIG_QE=y
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
-CONFIG_ELBC_BR0_OR0=y
-CONFIG_BR0_OR0_NAME="FLASH"
-CONFIG_BR0_OR0_BASE=0xFE000000
-CONFIG_BR0_MACHINE_GPCM=y
-CONFIG_BR0_PORTSIZE_16BIT=y
-CONFIG_OR0_AM_16_MBYTES=y
-CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
-CONFIG_OR0_CSNT_EARLIER=y
-CONFIG_OR0_EAD_EXTRA=y
-CONFIG_OR0_SCY_15=y
-CONFIG_OR0_XACS_EXTENDED=y
-CONFIG_OR0_XAM_SET=y
-CONFIG_OR0_TRLX_RELAXED=y
-CONFIG_OR0_EHTR_8_CYCLE=y
-CONFIG_ELBC_BR1_OR1=y
-CONFIG_BR1_OR1_NAME="BCSR"
-CONFIG_BR1_OR1_BASE=0xF8000000
-CONFIG_BR1_MACHINE_GPCM=y
-CONFIG_BR1_PORTSIZE_8BIT=y
-CONFIG_OR1_AM_32_KBYTES=y
-CONFIG_OR1_CSNT_EARLIER=y
-CONFIG_OR1_EAD_EXTRA=y
-CONFIG_OR1_SCY_15=y
-CONFIG_OR1_XACS_EXTENDED=y
-CONFIG_OR1_XAM_SET=y
-CONFIG_OR1_TRLX_RELAXED=y
-CONFIG_OR1_EHTR_8_CYCLE=y
-CONFIG_ELBC_BR2_OR2=y
-CONFIG_BR2_OR2_NAME="PIB1"
-CONFIG_BR2_OR2_BASE=0xF8008000
-CONFIG_BR2_MACHINE_GPCM=y
-CONFIG_BR2_PORTSIZE_8BIT=y
-CONFIG_OR2_AM_32_KBYTES=y
-CONFIG_OR2_CSNT_EARLIER=y
-CONFIG_OR2_EAD_EXTRA=y
-CONFIG_OR2_SCY_15=y
-CONFIG_OR2_XACS_EXTENDED=y
-CONFIG_OR2_XAM_SET=y
-CONFIG_OR2_TRLX_RELAXED=y
-CONFIG_OR2_EHTR_8_CYCLE=y
-CONFIG_ELBC_BR3_OR3=y
-CONFIG_BR3_OR3_NAME="PIB2"
-CONFIG_BR3_OR3_BASE=0xF8010000
-CONFIG_BR3_MACHINE_GPCM=y
-CONFIG_BR3_PORTSIZE_8BIT=y
-CONFIG_OR3_AM_32_KBYTES=y
-CONFIG_OR3_CSNT_EARLIER=y
-CONFIG_OR3_EAD_EXTRA=y
-CONFIG_OR3_SCY_15=y
-CONFIG_OR3_XACS_EXTENDED=y
-CONFIG_OR3_XAM_SET=y
-CONFIG_OR3_TRLX_RELAXED=y
-CONFIG_OR3_EHTR_8_CYCLE=y
-CONFIG_LCRR_DBYP_PLL_BYPASSED=y
-CONFIG_LCRR_CLKDIV_2=y