configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py
Signed-off-by: Tom Rini <trini@konsulko.com>
diff --git a/configs/tuge1_defconfig b/configs/tuge1_defconfig
index 31edb38..22ba192 100644
--- a/configs/tuge1_defconfig
+++ b/configs/tuge1_defconfig
@@ -1,5 +1,6 @@
CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0xF0000000
+CONFIG_SYS_BOOTCOUNT_ADDR=0xE0113FF8
CONFIG_SYS_CLK_FREQ=66000000
CONFIG_MPC83xx=y
CONFIG_HIGH_BATS=y
@@ -78,6 +79,34 @@
CONFIG_LBLAW2_BASE=0xA0000000
CONFIG_LBLAW2_NAME="APP1"
CONFIG_LBLAW2_LENGTH_256_MBYTES=y
+CONFIG_ELBC_BR0_OR0=y
+CONFIG_BR0_OR0_NAME="FLASH"
+CONFIG_BR0_OR0_BASE=0xF0000000
+CONFIG_BR0_PORTSIZE_16BIT=y
+CONFIG_OR0_AM_256_MBYTES=y
+CONFIG_OR0_SCY_5=y
+CONFIG_OR0_CSNT_EARLIER=y
+CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
+CONFIG_OR0_TRLX_RELAXED=y
+CONFIG_OR0_EAD_EXTRA=y
+CONFIG_ELBC_BR1_OR1=y
+CONFIG_BR1_OR1_NAME="KMBEC_FPGA"
+CONFIG_BR1_OR1_BASE=0xE8000000
+CONFIG_OR1_AM_128_MBYTES=y
+CONFIG_OR1_SCY_2=y
+CONFIG_OR1_CSNT_EARLIER=y
+CONFIG_OR1_ACS_HALF_CYCLE_EARLIER=y
+CONFIG_OR1_TRLX_RELAXED=y
+CONFIG_OR1_EAD_EXTRA=y
+CONFIG_ELBC_BR2_OR2=y
+CONFIG_BR2_OR2_NAME="APP1"
+CONFIG_BR2_OR2_BASE=0xA0000000
+CONFIG_OR2_AM_256_MBYTES=y
+CONFIG_OR2_SCY_2=y
+CONFIG_OR2_CSNT_EARLIER=y
+CONFIG_OR2_ACS_QUARTER_CYCLE_EARLIER=y
+CONFIG_OR2_TRLX_RELAXED=y
+CONFIG_OR2_EAD_EXTRA=y
CONFIG_HID0_FINAL_EMCP=y
CONFIG_HID0_FINAL_ICE=y
CONFIG_HID2_HBE=y
@@ -85,6 +114,8 @@
CONFIG_ACR_RPTCNT_4=y
CONFIG_ACR_APARK_MASTER=y
CONFIG_ACR_PARKM_USB_I2C1_BOOT=y
+CONFIG_LCRR_EADC_1=y
+CONFIG_LCRR_CLKDIV_2=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_MISC_INIT_R=y
@@ -111,7 +142,6 @@
# CONFIG_CMD_UBIFS is not set
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_BOOTCOUNT_BOOTLIMIT=3
-CONFIG_SYS_BOOTCOUNT_ADDR=0xE0113FF8
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_MTD_DEVICE=y
@@ -124,40 +154,3 @@
CONFIG_QE=y
CONFIG_SYS_NS16550=y
CONFIG_OF_LIBFDT=y
-CONFIG_ELBC_BR0_OR0=y
-CONFIG_BR0_OR0_NAME="FLASH"
-CONFIG_BR0_OR0_BASE=0xF0000000
-CONFIG_BR0_MACHINE_GPCM=y
-CONFIG_BR0_PORTSIZE_16BIT=y
-CONFIG_OR0_AM_256_MBYTES=y
-CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
-CONFIG_OR0_CSNT_EARLIER=y
-CONFIG_OR0_EAD_EXTRA=y
-CONFIG_OR0_SCY_5=y
-CONFIG_OR0_TRLX_RELAXED=y
-CONFIG_ELBC_BR1_OR1=y
-CONFIG_BR1_OR1_NAME="KMBEC_FPGA"
-CONFIG_BR1_OR1_BASE=0xE8000000
-CONFIG_BR1_MACHINE_GPCM=y
-CONFIG_BR1_PORTSIZE_8BIT=y
-CONFIG_OR1_AM_128_MBYTES=y
-CONFIG_OR1_ACS_HALF_CYCLE_EARLIER=y
-CONFIG_OR1_CSNT_EARLIER=y
-CONFIG_OR1_EAD_EXTRA=y
-CONFIG_OR1_SCY_2=y
-CONFIG_OR1_TRLX_RELAXED=y
-CONFIG_ELBC_BR2_OR2=y
-CONFIG_BR2_OR2_NAME="APP1"
-CONFIG_BR2_OR2_BASE=0xA0000000
-CONFIG_BR2_MACHINE_GPCM=y
-CONFIG_BR2_PORTSIZE_8BIT=y
-CONFIG_OR2_AM_256_MBYTES=y
-CONFIG_OR2_ACS_QUARTER_CYCLE_EARLIER=y
-CONFIG_OR2_CSNT_EARLIER=y
-CONFIG_OR2_EAD_EXTRA=y
-CONFIG_OR2_SCY_2=y
-CONFIG_OR2_TRLX_RELAXED=y
-CONFIG_OR2_EHTR_4_CYCLE=y
-CONFIG_LCRR_DBYP_PLL_BYPASSED=y
-CONFIG_LCRR_EADC_1=y
-CONFIG_LCRR_CLKDIV_2=y