| commit | bbd108a08225b1239b1ec1c10e8131fba6a3a95a | [log] [tgz] |
|---|---|---|
| author | Patrick Delaunay <patrick.delaunay@st.com> | Wed Jan 30 13:07:06 2019 +0100 |
| committer | Tom Rini <trini@konsulko.com> | Sat Feb 09 07:50:57 2019 -0500 |
| tree | 3324114ed3c850227bebde0f28d258b303028b50 | |
| parent | e74b74c52876d776dda7a7ee5e2a8d555eaa5c4f [diff] |
clk: stm32mp1: correctly handle Clock Spreading Generator To activate the csg option, the driver need to set the bit2 of PLLNCR register = SSCG_CTRL: Spread Spectrum Clock Generator of PLLn enable. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>